From 6c288f11e6cd710a9924fd65ea588b3c4f529822 Mon Sep 17 00:00:00 2001 From: "jk7744.park" Date: Tue, 8 Sep 2015 21:44:20 +0900 Subject: [PATCH] tizen 2.3.1 release --- COPYING.LIBGLOSS | 287 - COPYING.NEWLIB | 879 - ChangeLog | 223 + Makefile.def | 15 +- Makefile.in | 541 +- Makefile.tpl | 25 +- bfd/.gitignore | 40 + bfd/ChangeLog | 1885 ++ bfd/Makefile.am | 26 +- bfd/Makefile.in | 34 +- bfd/aix386-core.c | 3 +- bfd/aout-adobe.c | 4 +- bfd/aout-arm.c | 8 +- bfd/aout-target.h | 6 +- bfd/aout-tic30.c | 6 +- bfd/aoutx.h | 23 +- bfd/archive.c | 117 +- bfd/archures.c | 70 +- bfd/bfd-in.h | 24 +- bfd/bfd-in2.h | 305 +- bfd/bfd.c | 6 +- bfd/bfdio.c | 29 +- bfd/bfdwin.c | 41 +- bfd/binary.c | 4 +- bfd/bout.c | 6 +- bfd/cache.c | 31 +- bfd/cisco-core.c | 11 +- bfd/coff-alpha.c | 8 +- bfd/coff-aux.c | 5 +- bfd/coff-i386.c | 12 +- bfd/coff-i860.c | 1 + bfd/coff-i960.c | 4 +- bfd/coff-ia64.c | 3 +- bfd/coff-mcore.c | 4 +- bfd/coff-mips.c | 10 +- bfd/coff-or32.c | 3 +- bfd/coff-ppc.c | 5 +- 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binutils/defparse.c | 1966 ++ binutils/defparse.h | 123 + binutils/doc/Makefile.in | 1 + binutils/doc/addr2line.1 | 287 + binutils/doc/ar.1 | 439 + binutils/doc/binutils.info | 4726 ++++ binutils/doc/binutils.texi | 88 +- binutils/doc/cxxfilt.man | 338 + binutils/doc/dlltool.1 | 531 + binutils/doc/elfedit.1 | 235 + binutils/doc/nlmconv.1 | 244 + binutils/doc/nm.1 | 518 + binutils/doc/objcopy.1 | 962 + binutils/doc/objdump.1 | 836 + binutils/doc/ranlib.1 | 192 + binutils/doc/readelf.1 | 450 + binutils/doc/size.1 | 268 + binutils/doc/strings.1 | 257 + binutils/doc/strip.1 | 392 + binutils/doc/windmc.1 | 353 + binutils/doc/windres.1 | 361 + binutils/dwarf-mode.el | 167 + binutils/dwarf.c | 584 +- binutils/dwarf.h | 4 + binutils/elfedit.c | 7 +- binutils/makefile.vms | 12 +- binutils/mcparse.c | 2156 ++ binutils/mcparse.h | 103 + binutils/nlmheader.c | 2698 ++ binutils/nlmheader.h | 135 + binutils/nm.c | 6 + binutils/objcopy.c | 90 +- binutils/objdump.c | 111 +- binutils/objdump.h | 50 + binutils/od-xcoff.c | 1667 ++ binutils/po/.cvsignore | 1 - binutils/po/POTFILES.in | 4 + binutils/po/bg.gmo | Bin 0 -> 45189 bytes binutils/po/binutils.pot | 3550 ++- binutils/po/da.gmo | Bin 0 -> 69960 bytes binutils/po/da.po | 117 +- binutils/po/es.gmo | Bin 0 -> 181430 bytes binutils/po/es.po | 1937 +- binutils/po/fi.gmo | Bin 0 -> 173759 bytes binutils/po/fr.gmo | Bin 0 -> 178907 bytes binutils/po/id.gmo | Bin 0 -> 153153 bytes binutils/po/ja.gmo | Bin 0 -> 184894 bytes binutils/po/ja.po | 113 +- binutils/po/ro.gmo | Bin 0 -> 20265 bytes binutils/po/ru.gmo | Bin 0 -> 216900 bytes binutils/po/rw.gmo | Bin 0 -> 615 bytes binutils/po/sk.gmo | Bin 0 -> 149635 bytes binutils/po/sv.gmo | Bin 0 -> 113208 bytes binutils/po/tr.gmo | Bin 0 -> 129842 bytes binutils/po/uk.gmo | Bin 0 -> 172392 bytes binutils/po/vi.gmo | Bin 0 -> 172896 bytes binutils/po/zh_CN.gmo | Bin 0 -> 75892 bytes binutils/po/zh_TW.gmo | Bin 0 -> 121475 bytes binutils/rcparse.c | 4597 ++++ binutils/rcparse.h | 297 + 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cpu/ChangeLog | 24 + cpu/fr30.cpu | 1861 ++ cpu/fr30.opc | 253 + cpu/ip2k.cpu | 1480 ++ cpu/ip2k.opc | 633 + cpu/mep-avc.cpu | 1423 ++ cpu/mep-avc2.cpu | 1987 ++ cpu/mep-c5.cpu | 281 + cpu/mep-core.cpu | 3082 +++ cpu/mep-default.cpu | 27 + cpu/mep-ext-cop.cpu | 25 + cpu/mep-fmax.cpu | 340 + cpu/mep-h1.cpu | 49 + cpu/mep-ivc2.cpu | 9777 ++++++++ cpu/mep-rhcop.cpu | 342 + cpu/mep-sample-ucidsp.cpu | 120 + cpu/mep.cpu | 21 + cpu/mep.opc | 1669 ++ cpu/openrisc.cpu | 774 + cpu/openrisc.opc | 164 + cpu/xstormy16.cpu | 1965 ++ cpu/xstormy16.opc | 168 + debian/README.cross | 26 - debian/README.source | 2 - debian/binutils-gold.overrides | 5 - debian/binutils-gold.postrm | 15 - debian/binutils-gold.preinst | 25 - debian/binutils-hppa64.overrides | 8 - debian/binutils-hppa64.postinst | 7 - debian/binutils-hppa64.postrm | 7 - debian/binutils-hppa64.shlibs.in | 2 - debian/binutils-multiarch.overrides | 10 - debian/binutils-multiarch.postinst | 52 - debian/binutils-multiarch.postrm.in | 49 - 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elfcpp/ChangeLog | 11 + elfcpp/dwarf.h | 48 +- elfcpp/elfcpp.h | 5 +- etc/add-log.el | 573 - etc/add-log.vi | 11 - etc/configure.info | 2773 +++ etc/standards.info | 5744 +++++ gas/.gitignore | 9 + gas/ChangeLog | 1048 +- gas/Makefile.am | 4 + gas/Makefile.in | 34 + gas/NEWS | 5 +- gas/as.c | 5 +- gas/bfin-lex.c | 3559 +++ gas/bfin-parse.c | 7951 ++++++ gas/bfin-parse.h | 414 + gas/cgen.c | 27 +- gas/cgen.h | 13 +- gas/cond.c | 10 +- gas/config/obj-coff.c | 11 +- gas/config/obj-elf.c | 15 +- gas/config/obj-evax.c | 12 +- gas/config/obj-evax.h | 21 +- gas/config/obj-macho.c | 255 +- gas/config/tc-alpha.c | 169 +- gas/config/tc-arm.c | 349 +- gas/config/tc-arm.h | 6 + gas/config/tc-cr16.c | 32 +- gas/config/tc-cris.c | 4 + gas/config/tc-i386.c | 247 +- gas/config/tc-i386.h | 10 +- gas/config/tc-ia64.c | 8 +- gas/config/tc-m32r.c | 4 +- gas/config/tc-mips.c | 6878 ++++-- gas/config/tc-mips.h | 1 + gas/config/tc-mt.c | 4 +- gas/config/tc-pj.c | 2 +- gas/config/tc-ppc.c | 302 +- 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gas/testsuite/gas/arm/ld-sp-warn-v7r.l | 3 + gas/testsuite/gas/arm/ld-sp-warn.d | 3 + gas/testsuite/gas/arm/ld-sp-warn.l | 5 + gas/testsuite/gas/arm/ld-sp-warn.s | 8 + gas/testsuite/gas/arm/ldr-global.d | 14 + gas/testsuite/gas/arm/ldr-global.s | 22 + gas/testsuite/gas/arm/ldrd-unpredictable.d | 2 + gas/testsuite/gas/arm/ldrd-unpredictable.l | 7 + gas/testsuite/gas/arm/ldrd-unpredictable.s | 14 + gas/testsuite/gas/arm/ldst-offset0.d | 51 + gas/testsuite/gas/arm/ldst-offset0.s | 66 + gas/testsuite/gas/arm/neon-const.d | 1 + gas/testsuite/gas/arm/neon-const.s | 2 + gas/testsuite/gas/arm/offset-1.d | 23 + gas/testsuite/gas/arm/offset-1.s | 16 + gas/testsuite/gas/arm/req.l | 2 +- gas/testsuite/gas/arm/shift-bad.d | 3 + gas/testsuite/gas/arm/shift-bad.l | 9 + gas/testsuite/gas/arm/shift-bad.s | 15 + gas/testsuite/gas/arm/strex-bad-t.d | 3 + gas/testsuite/gas/arm/strex-bad-t.l | 24 + gas/testsuite/gas/arm/strex-bad-t.s | 32 + gas/testsuite/gas/arm/strex-t.d | 14 + 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+- gas/testsuite/gas/i386/arch-10-1.l | 2 +- gas/testsuite/gas/i386/arch-10-2.l | 2 +- gas/testsuite/gas/i386/arch-10-3.l | 2 +- gas/testsuite/gas/i386/arch-10-4.l | 2 +- gas/testsuite/gas/i386/arch-10-lzcnt.d | 43 + gas/testsuite/gas/i386/arch-10.s | 2 +- gas/testsuite/gas/i386/avx-gather-intel.d | 108 + gas/testsuite/gas/i386/avx-gather.d | 107 + gas/testsuite/gas/i386/avx-gather.s | 109 + gas/testsuite/gas/i386/avx-intel.d | 10 +- gas/testsuite/gas/i386/avx.d | 10 +- gas/testsuite/gas/i386/avx.s | 18 +- gas/testsuite/gas/i386/avx2-intel.d | 182 + gas/testsuite/gas/i386/avx2.d | 181 + gas/testsuite/gas/i386/avx2.s | 268 + gas/testsuite/gas/i386/avx256int-intel.d | 553 + gas/testsuite/gas/i386/avx256int.d | 552 + gas/testsuite/gas/i386/avx256int.s | 593 + gas/testsuite/gas/i386/bmi2-intel.d | 52 + gas/testsuite/gas/i386/bmi2.d | 51 + gas/testsuite/gas/i386/bmi2.s | 59 + gas/testsuite/gas/i386/dw2-compress-1.d | 2 +- gas/testsuite/gas/i386/i386.exp | 28 + gas/testsuite/gas/i386/ilp32/ilp32.exp | 1 - gas/testsuite/gas/i386/ilp32/inval.l | 23 - gas/testsuite/gas/i386/ilp32/inval.s | 6 - gas/testsuite/gas/i386/ilp32/quad.d | 10 +- gas/testsuite/gas/i386/ilp32/x86-64-avx-intel.d | 10 +- gas/testsuite/gas/i386/ilp32/x86-64-avx.d | 10 +- gas/testsuite/gas/i386/ilp32/x86-64-branch.d | 4 + gas/testsuite/gas/i386/ilp32/x86-64-pcrel.d | 20 +- gas/testsuite/gas/i386/ilp32/x86-64-pcrel.s | 2 + gas/testsuite/gas/i386/inval-invpcid.l | 21 + gas/testsuite/gas/i386/inval-invpcid.s | 11 + gas/testsuite/gas/i386/invpcid-intel.d | 14 + gas/testsuite/gas/i386/invpcid.d | 13 + gas/testsuite/gas/i386/invpcid.s | 8 + gas/testsuite/gas/i386/k1om-inval.l | 2 + gas/testsuite/gas/i386/k1om-inval.s | 2 + gas/testsuite/gas/i386/k1om.d | 259 + gas/testsuite/gas/i386/nops-1-bdver2.d | 162 + gas/testsuite/gas/i386/x86-64-arch-2-lzcnt.d | 42 + gas/testsuite/gas/i386/x86-64-arch-2.s | 2 +- gas/testsuite/gas/i386/x86-64-avx-gather-intel.d | 204 + gas/testsuite/gas/i386/x86-64-avx-gather.d | 203 + gas/testsuite/gas/i386/x86-64-avx-gather.s | 213 + gas/testsuite/gas/i386/x86-64-avx-intel.d | 10 +- gas/testsuite/gas/i386/x86-64-avx.d | 10 +- gas/testsuite/gas/i386/x86-64-avx.s | 18 +- gas/testsuite/gas/i386/x86-64-avx2-intel.d | 182 + gas/testsuite/gas/i386/x86-64-avx2.d | 181 + gas/testsuite/gas/i386/x86-64-avx2.s | 268 + gas/testsuite/gas/i386/x86-64-avx256int-intel.d | 555 + gas/testsuite/gas/i386/x86-64-avx256int.d | 554 + gas/testsuite/gas/i386/x86-64-avx256int.s | 599 + gas/testsuite/gas/i386/x86-64-bmi2-intel.d | 156 + gas/testsuite/gas/i386/x86-64-bmi2.d | 155 + gas/testsuite/gas/i386/x86-64-bmi2.s | 175 + gas/testsuite/gas/i386/x86-64-branch.d | 6 +- gas/testsuite/gas/i386/x86-64-branch.s | 4 + gas/testsuite/gas/i386/x86-64-inval-invpcid.l | 25 + gas/testsuite/gas/i386/x86-64-inval-invpcid.s | 13 + gas/testsuite/gas/i386/x86-64-invpcid-intel.d | 14 + gas/testsuite/gas/i386/x86-64-invpcid.d | 13 + gas/testsuite/gas/i386/x86-64-invpcid.s | 8 + gas/testsuite/gas/i386/x86-64-nops-1-bdver2.d | 162 + gas/testsuite/gas/ia64/ia64.exp | 3 + gas/testsuite/gas/ia64/pr13167.d | 43 + gas/testsuite/gas/ia64/pr13167.s | 9 + gas/testsuite/gas/m68k/all.exp | 1 + gas/testsuite/gas/m68k/mode5.d | 2 + gas/testsuite/gas/m68k/mode5.s | 2 + gas/testsuite/gas/mips/24k-branch-delay-1.d | 13 +- gas/testsuite/gas/mips/24k-triple-stores-1.d | 12 +- gas/testsuite/gas/mips/24k-triple-stores-10.d | 12 +- gas/testsuite/gas/mips/24k-triple-stores-11.d | 9 +- gas/testsuite/gas/mips/24k-triple-stores-2.d | 8 +- gas/testsuite/gas/mips/24k-triple-stores-3.d | 155 +- gas/testsuite/gas/mips/24k-triple-stores-4.d | 8 +- gas/testsuite/gas/mips/24k-triple-stores-5.d | 57 +- gas/testsuite/gas/mips/24k-triple-stores-6.d | 57 +- gas/testsuite/gas/mips/24k-triple-stores-7.d | 145 +- gas/testsuite/gas/mips/24k-triple-stores-8.d | 8 +- gas/testsuite/gas/mips/24k-triple-stores-9.d | 11 +- gas/testsuite/gas/mips/and.d | 2 +- gas/testsuite/gas/mips/and.s | 7 +- gas/testsuite/gas/mips/beq.s | 1 + gas/testsuite/gas/mips/bge.s | 8 +- gas/testsuite/gas/mips/bgeu.s | 6 +- gas/testsuite/gas/mips/blt.s | 8 +- gas/testsuite/gas/mips/bltu.s | 6 +- gas/testsuite/gas/mips/branch-misc-2.s | 1 + gas/testsuite/gas/mips/cache.d | 28 + gas/testsuite/gas/mips/cache.s | 41 + gas/testsuite/gas/mips/daddi.d | 26 + gas/testsuite/gas/mips/daddi.s | 32 + gas/testsuite/gas/mips/dli.s | 4 +- gas/testsuite/gas/mips/elf-jal.d | 1 + gas/testsuite/gas/mips/elf-rel27.d | 10 +- gas/testsuite/gas/mips/elf-rel4.s | 2 +- gas/testsuite/gas/mips/elf_ase_micromips-2.d | 8 + gas/testsuite/gas/mips/elf_ase_micromips.d | 8 + gas/testsuite/gas/mips/jal-mask-1.s | 13 + gas/testsuite/gas/mips/jal-mask-11.d | 27 + gas/testsuite/gas/mips/jal-mask-12.d | 27 + gas/testsuite/gas/mips/jal-mask-2.s | 17 + gas/testsuite/gas/mips/jal-mask-21.d | 35 + gas/testsuite/gas/mips/jal-mask-22.d | 35 + gas/testsuite/gas/mips/jal.d | 1 + gas/testsuite/gas/mips/jal.s | 4 + gas/testsuite/gas/mips/l_d-n32.d | 312 +- gas/testsuite/gas/mips/l_d-n64.d | 600 +- gas/testsuite/gas/mips/l_d.d | 312 +- gas/testsuite/gas/mips/lb-pic.s | 1 + gas/testsuite/gas/mips/ld-n32.d | 312 +- gas/testsuite/gas/mips/ld-n64.d | 600 +- gas/testsuite/gas/mips/ld.d | 480 +- gas/testsuite/gas/mips/ld.s | 1 + gas/testsuite/gas/mips/li.d | 2 +- gas/testsuite/gas/mips/li.s | 5 +- gas/testsuite/gas/mips/lifloat.d | 4 +- gas/testsuite/gas/mips/loc-swap-2.d | 49 + gas/testsuite/gas/mips/loc-swap-2.s | 21 + gas/testsuite/gas/mips/loc-swap-dis.d | 34 + gas/testsuite/gas/mips/loc-swap.d | 61 + gas/testsuite/gas/mips/loc-swap.s | 48 + gas/testsuite/gas/mips/mcu.d | 122 + gas/testsuite/gas/mips/mcu.s | 70 + gas/testsuite/gas/mips/micromips-branch-delay.d | 283 + gas/testsuite/gas/mips/micromips-branch-delay.l | 24 + gas/testsuite/gas/mips/micromips-branch-delay.s | 146 + .../gas/mips/micromips-branch-relax-pic.d | 625 + .../gas/mips/micromips-branch-relax-pic.l | 50 + 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gas/testsuite/gas/mips/micromips@mips32r2.d | 44 + .../gas/mips/micromips@mips4-branch-likely.d | 17 + gas/testsuite/gas/mips/micromips@mips4-fp.d | 50 + gas/testsuite/gas/mips/micromips@mips4.d | 13 + gas/testsuite/gas/mips/micromips@mips5-fp.d | 69 + gas/testsuite/gas/mips/micromips@mips64-cp2.d | 13 + gas/testsuite/gas/mips/micromips@mips64-cp2.s | 18 + gas/testsuite/gas/mips/micromips@mips64.d | 13 + gas/testsuite/gas/mips/micromips@mips64r2.d | 47 + gas/testsuite/gas/mips/micromips@pref.d | 38 + gas/testsuite/gas/mips/micromips@relax-at.d | 397 + gas/testsuite/gas/mips/micromips@relax-swap3.d | 22 + gas/testsuite/gas/mips/micromips@relax.d | 397 + gas/testsuite/gas/mips/micromips@rol-hw.d | 29 + gas/testsuite/gas/mips/micromips@uld2-eb.d | 21 + gas/testsuite/gas/mips/micromips@uld2-el.d | 21 + gas/testsuite/gas/mips/micromips@ulh2-eb.d | 43 + gas/testsuite/gas/mips/micromips@ulh2-el.d | 43 + gas/testsuite/gas/mips/micromips@ulw2-eb-ilocks.d | 21 + gas/testsuite/gas/mips/micromips@ulw2-el-ilocks.d | 21 + gas/testsuite/gas/mips/mips.exp | 111 +- gas/testsuite/gas/mips/mips16-e.d | 4 +- gas/testsuite/gas/mips/mips16-f.d | 2 +- gas/testsuite/gas/mips/mips16@loc-swap-2.d | 49 + gas/testsuite/gas/mips/mips16@loc-swap-dis.d | 35 + gas/testsuite/gas/mips/mips16@loc-swap.d | 61 + gas/testsuite/gas/mips/mips16@relax-swap3.d | 15 + gas/testsuite/gas/mips/mips32-imm.d | 12 + gas/testsuite/gas/mips/mips32-imm.s | 14 + gas/testsuite/gas/mips/mips32.d | 12 +- gas/testsuite/gas/mips/mips32.s | 12 +- gas/testsuite/gas/mips/mips4-fp.s | 7 +- gas/testsuite/gas/mips/mips4.s | 7 +- gas/testsuite/gas/mips/{mips5.d => mips5-fp.d} | 2 +- gas/testsuite/gas/mips/{mips5.l => mips5-fp.l} | 0 gas/testsuite/gas/mips/{mips5.s => mips5-fp.s} | 0 gas/testsuite/gas/mips/mipsel16-e.d | 4 +- gas/testsuite/gas/mips/mipsel16-f.d | 2 +- gas/testsuite/gas/mips/pr12915.d | 15 + gas/testsuite/gas/mips/pr12915.s | 5 + gas/testsuite/gas/mips/pref.d | 29 + gas/testsuite/gas/mips/reginfo-1.s | 3 + gas/testsuite/gas/mips/reginfo-1a.d | 9 + gas/testsuite/gas/mips/reginfo-1b.d | 9 + gas/testsuite/gas/mips/relax-at.d | 1 + gas/testsuite/gas/mips/relax-swap3.d | 21 + gas/testsuite/gas/mips/relax-swap3.s | 14 + gas/testsuite/gas/mips/relax.d | 1 + gas/testsuite/gas/mips/relax.s | 4 + gas/testsuite/gas/mips/s_d-n32.d | 312 +- gas/testsuite/gas/mips/s_d-n64.d | 600 +- gas/testsuite/gas/mips/s_d.d | 312 +- gas/testsuite/gas/mips/sd-n32.d | 312 +- gas/testsuite/gas/mips/sd-n64.d | 600 +- gas/testsuite/gas/mips/sd.d | 480 +- gas/testsuite/gas/mips/tmips16-e.d | 4 +- gas/testsuite/gas/mips/tmips16-f.d | 2 +- gas/testsuite/gas/mips/tmipsel16-e.d | 4 +- gas/testsuite/gas/mips/tmipsel16-f.d | 2 +- gas/testsuite/gas/mips/trunc.d | 4 +- gas/testsuite/gas/mips/vr4111.d | 8 +- gas/testsuite/gas/mips/vr4130.d | 118 + gas/testsuite/gas/mips/vr4130.s | 67 + gas/testsuite/gas/ppc/476.d | 2 +- gas/testsuite/gas/ppc/476.s | 2 +- gas/testsuite/gas/ppc/a2.d | 2 +- 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Unless otherwise noted in the body of the source file(s), the following copyright -notices will apply to the contents of the libgloss subdirectory: - -(1) Red Hat Incorporated - -Copyright (c) 1994-2009 Red Hat, Inc. All rights reserved. - -This copyrighted material is made available to anyone wishing to use, modify, -copy, or redistribute it subject to the terms and conditions of the BSD -License. This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY expressed or implied, including the implied warranties -of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. A copy of this license -is available at http://www.opensource.org/licenses. Any Red Hat trademarks that -are incorporated in the source code or documentation are not subject to the BSD -License and may only be used or replicated with the express permission of -Red Hat, Inc. - -(2) University of California, Berkeley - -Copyright (c) 1981-2000 The Regents of the University of California. -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - * Neither the name of the University nor the names of its contributors may - be used to endorse or promote products derived from this software without - specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. - -(3) DJ Delorie - -Copyright (C) 1993 DJ Delorie -All rights reserved. - -Redistribution and use in source and binary forms is permitted -provided that the above copyright notice and following paragraph are -duplicated in all such forms. - -This file is distributed WITHOUT ANY WARRANTY; without even the implied -warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - -(4) (formerly GPL for fr30) - -The GPL is no longer applicable to the fr30 platform. The piece of -code (syscalls.c) referencing the GPL has been officially relicensed. - -(5) Advanced Micro Devices - -Copyright 1989, 1990 Advanced Micro Devices, Inc. - -This software is the property of Advanced Micro Devices, Inc (AMD) which -specifically grants the user the right to modify, use and distribute this -software provided this notice is not removed or altered. All other rights -are reserved by AMD. - -AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS -SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL -DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR -USE OF THIS SOFTWARE. - -So that all may benefit from your experience, please report any problems -or suggestions about this software to the 29K Technical Support Center at -800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or -0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118. - -Advanced Micro Devices, Inc. -29K Support Products -Mail Stop 573 -5900 E. Ben White Blvd. -Austin, TX 78741 -800-292-9263 - -(6) Array Technology Corporation and MIPS (mips/lsi33k-stub.h) - -COPYRIGHT (C) 1991, 1992 ARRAY TECHNOLOGY CORPORATION - All Rights Reserved - -This software is confidential information which is proprietary to and -a trade secret of ARRAY Technology Corporation. Use, duplication, or -disclosure is subject to the terms of a separate license agreement. - -Copyright 1985 by MIPS Computer Systems, Inc. - -(7) University of Utah and the Computer Systems Laboratory (CSL) - [applies only to hppa*-*-pro* targets] -Copyright (c) 1990,1994 The University of Utah and -the Computer Systems Laboratory (CSL). All rights reserved. - -Permission to use, copy, modify and distribute this software is hereby -granted provided that (1) source code retains these copyright, permission, -and disclaimer notices, and (2) redistributions including binaries -reproduce the notices in supporting documentation, and (3) all advertising -materials mentioning features or use of this software display the following -acknowledgement: ``This product includes software developed by the -Computer Systems Laboratory at the University of Utah.'' - -THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS -IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF -ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - -CSL requests users of this software to return to csl-dist@cs.utah.edu any -improvements that they make and grant CSL redistribution rights. - -(8) Sun Microsystems - -Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. - -Developed at SunPro, a Sun Microsystems, Inc. business. -Permission to use, copy, modify, and distribute this -software is freely granted, provided that this notice is preserved. - -(9) Hewlett Packard - -(c) Copyright 1986 HEWLETT-PACKARD COMPANY - -To anyone who acknowledges that this file is provided "AS IS" -without any express or implied warranty: - -permission to use, copy, modify, and distribute this file -for any purpose is hereby granted without fee, provided that -the above copyright notice and this notice appears in all -copies, and that the name of Hewlett-Packard Company not be -used in advertising or publicity pertaining to distribution -of the software without specific, written prior permission. -Hewlett-Packard Company makes no representations about the -suitability of this software for any purpose. - -(10) Hans-Peter Nilsson - -Copyright (C) 2001 Hans-Peter Nilsson - -Permission to use, copy, modify, and distribute this software is -freely granted, provided that the above copyright notice, this notice -and the following disclaimer are preserved with no changes. - -THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR -IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR -PURPOSE. - -(11) IBM Corp. spu processor (only spu-* targets) - -(C) Copyright IBM Corp. 2005, 2006 - -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, -this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright -notice, this list of conditions and the following disclaimer in the -documentation and/or other materials provided with the distribution. - * Neither the name of IBM nor the names of its contributors may be -used to endorse or promote products derived from this software without -specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -POSSIBILITY OF SUCH DAMAGE. - -(12) Jon Beniston (only lm32-* targets) - - Contributed by Jon Beniston - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - SUCH DAMAGE. - -(13) - Xilinx, Inc. (microblaze-* and powerpc-* targets) - -Copyright (c) 2004, 2009 Xilinx, Inc. All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - -1. Redistributions source code must retain the above copyright notice, -this list of conditions and the following disclaimer. - -2. Redistributions in binary form must reproduce the above copyright -notice, this list of conditions and the following disclaimer in the -documentation and/or other materials provided with the distribution. - -3. Neither the name of Xilinx nor the names of its contributors may be -used to endorse or promote products derived from this software without -specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS -IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED -TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - - -(14) - National Semiconductor Corporation - -Copyright (c) 2004 National Semiconductor Corporation - -The authors hereby grant permission to use, copy, modify, distribute, -and license this software and its documentation for any purpose, provided -that existing copyright notices are retained in all copies and that this -notice is included verbatim in any distributions. No written agreement, -license, or royalty fee is required for any of the authorized uses. -Modifications to this software may be copyrighted by their authors -and need not follow the licensing terms described here, provided that -the new terms are clearly indicated on the first page of each file where -they apply. - - -(15) - CodeSourcery, Inc. (tic6x-* targets) - -Copyright (c) 2010 CodeSourcery, Inc. -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - * Neither the name of CodeSourcery nor the - names of its contributors may be used to endorse or promote products - derived from this software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY CODESOURCERY, INC. ``AS IS'' AND ANY -EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL CODESOURCERY BE LIABLE FOR ANY -DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/COPYING.NEWLIB b/COPYING.NEWLIB deleted file mode 100644 index 7f90c7e..0000000 --- a/COPYING.NEWLIB +++ /dev/null @@ -1,879 +0,0 @@ -The newlib subdirectory is a collection of software from several sources. - -Each file may have its own copyright/license that is embedded in the source -file. Unless otherwise noted in the body of the source file(s), the following copyright -notices will apply to the contents of the newlib subdirectory: - -(1) Red Hat Incorporated - -Copyright (c) 1994-2009 Red Hat, Inc. All rights reserved. - -This copyrighted material is made available to anyone wishing to use, -modify, copy, or redistribute it subject to the terms and conditions -of the BSD License. This program is distributed in the hope that -it will be useful, but WITHOUT ANY WARRANTY expressed or implied, -including the implied warranties of MERCHANTABILITY or FITNESS FOR -A PARTICULAR PURPOSE. A copy of this license is available at -http://www.opensource.org/licenses. Any Red Hat trademarks that are -incorporated in the source code or documentation are not subject to -the BSD License and may only be used or replicated with the express -permission of Red Hat, Inc. - -(2) University of California, Berkeley - -Copyright (c) 1981-2000 The Regents of the University of California. -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - * Neither the name of the University nor the names of its contributors - may be used to endorse or promote products derived from this software - without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. - -(3) David M. Gay (AT&T 1991, Lucent 1998) - -The author of this software is David M. Gay. - -Copyright (c) 1991 by AT&T. - -Permission to use, copy, modify, and distribute this software for any -purpose without fee is hereby granted, provided that this entire notice -is included in all copies of any software which is or includes a copy -or modification of this software and in all copies of the supporting -documentation for such software. - -THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED -WARRANTY. IN PARTICULAR, NEITHER THE AUTHOR NOR AT&T MAKES ANY -REPRESENTATION OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY -OF THIS SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE. - -------------------------------------------------------------------- - -The author of this software is David M. Gay. - -Copyright (C) 1998-2001 by Lucent Technologies -All Rights Reserved - -Permission to use, copy, modify, and distribute this software and -its documentation for any purpose and without fee is hereby -granted, provided that the above copyright notice appear in all -copies and that both that the copyright notice and this -permission notice and warranty disclaimer appear in supporting -documentation, and that the name of Lucent or any of its entities -not be used in advertising or publicity pertaining to -distribution of the software without specific, written prior -permission. - -LUCENT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. -IN NO EVENT SHALL LUCENT OR ANY OF ITS ENTITIES BE LIABLE FOR ANY -SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER -IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, -ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF -THIS SOFTWARE. - - -(4) Advanced Micro Devices - -Copyright 1989, 1990 Advanced Micro Devices, Inc. - -This software is the property of Advanced Micro Devices, Inc (AMD) which -specifically grants the user the right to modify, use and distribute this -software provided this notice is not removed or altered. All other rights -are reserved by AMD. - -AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS -SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL -DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR -USE OF THIS SOFTWARE. - -So that all may benefit from your experience, please report any problems -or suggestions about this software to the 29K Technical Support Center at -800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or -0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118. - -Advanced Micro Devices, Inc. -29K Support Products -Mail Stop 573 -5900 E. Ben White Blvd. -Austin, TX 78741 -800-292-9263 - -(5) C.W. Sandmann - -Copyright (C) 1993 C.W. Sandmann - -This file may be freely distributed as long as the author's name remains. - -(6) Eric Backus - -(C) Copyright 1992 Eric Backus - -This software may be used freely so long as this copyright notice is -left intact. There is no warrantee on this software. - -(7) Sun Microsystems - -Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. - -Developed at SunPro, a Sun Microsystems, Inc. business. -Permission to use, copy, modify, and distribute this -software is freely granted, provided that this notice is preserved. - -(8) Hewlett Packard - -(c) Copyright 1986 HEWLETT-PACKARD COMPANY - -To anyone who acknowledges that this file is provided "AS IS" -without any express or implied warranty: - permission to use, copy, modify, and distribute this file -for any purpose is hereby granted without fee, provided that -the above copyright notice and this notice appears in all -copies, and that the name of Hewlett-Packard Company not be -used in advertising or publicity pertaining to distribution -of the software without specific, written prior permission. -Hewlett-Packard Company makes no representations about the -suitability of this software for any purpose. - -(9) Hans-Peter Nilsson - -Copyright (C) 2001 Hans-Peter Nilsson - -Permission to use, copy, modify, and distribute this software is -freely granted, provided that the above copyright notice, this notice -and the following disclaimer are preserved with no changes. - -THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR -IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR -PURPOSE. - -(10) Stephane Carrez (m68hc11-elf/m68hc12-elf targets only) - -Copyright (C) 1999, 2000, 2001, 2002 Stephane Carrez (stcarrez@nerim.fr) - -The authors hereby grant permission to use, copy, modify, distribute, -and license this software and its documentation for any purpose, provided -that existing copyright notices are retained in all copies and that this -notice is included verbatim in any distributions. No written agreement, -license, or royalty fee is required for any of the authorized uses. -Modifications to this software may be copyrighted by their authors -and need not follow the licensing terms described here, provided that -the new terms are clearly indicated on the first page of each file where -they apply. - -(11) Christopher G. Demetriou - -Copyright (c) 2001 Christopher G. Demetriou -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions -are met: -1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. -2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. -3. The name of the author may not be used to endorse or promote products - derived from this software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -(12) SuperH, Inc. - -Copyright 2002 SuperH, Inc. All rights reserved - -This software is the property of SuperH, Inc (SuperH) which specifically -grants the user the right to modify, use and distribute this software -provided this notice is not removed or altered. All other rights are -reserved by SuperH. - -SUPERH MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO -THIS SOFTWARE. IN NO EVENT SHALL SUPERH BE LIABLE FOR INDIRECT, SPECIAL, -INCIDENTAL OR CONSEQUENTIAL DAMAGES IN CONNECTION WITH OR ARISING FROM -THE FURNISHING, PERFORMANCE, OR USE OF THIS SOFTWARE. - -So that all may benefit from your experience, please report any problems -or suggestions about this software to the SuperH Support Center via -e-mail at softwaresupport@superh.com . - -SuperH, Inc. -405 River Oaks Parkway -San Jose -CA 95134 -USA - -(13) Royal Institute of Technology - -Copyright (c) 1999 Kungliga Tekniska Högskolan -(Royal Institute of Technology, Stockholm, Sweden). -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions -are met: - -1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - -2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - -3. Neither the name of KTH nor the names of its contributors may be - used to endorse or promote products derived from this software without - specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY KTH AND ITS CONTRIBUTORS ``AS IS'' AND ANY -EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR -PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL KTH OR ITS CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR -BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF -ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -(14) Alexey Zelkin - -Copyright (c) 2000, 2001 Alexey Zelkin -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions -are met: -1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. -2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - -THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -SUCH DAMAGE. - -(15) Andrey A. Chernov - -Copyright (C) 1997 by Andrey A. Chernov, Moscow, Russia. -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions -are met: -1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. -2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - -THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE -FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -SUCH DAMAGE. - -(16) FreeBSD - -Copyright (c) 1997-2002 FreeBSD Project. -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions -are met: -1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. -2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - -THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -SUCH DAMAGE. - -(17) S. L. Moshier - -Author: S. L. Moshier. - -Copyright (c) 1984,2000 S.L. Moshier - -Permission to use, copy, modify, and distribute this software for any -purpose without fee is hereby granted, provided that this entire notice -is included in all copies of any software which is or includes a copy -or modification of this software and in all copies of the supporting -documentation for such software. - -THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED -WARRANTY. IN PARTICULAR, THE AUTHOR MAKES NO REPRESENTATION -OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY OF THIS -SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE. - -(18) Citrus Project - -Copyright (c)1999 Citrus Project, -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions -are met: -1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. -2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - -THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -SUCH DAMAGE. - -(19) Todd C. Miller - -Copyright (c) 1998 Todd C. Miller -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions -are met: -1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. -2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. -3. The name of the author may not be used to endorse or promote products - derived from this software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, -INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY -AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL -THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, -EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, -PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; -OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF -ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -(20) DJ Delorie (i386) -Copyright (C) 1991 DJ Delorie -All rights reserved. - -Redistribution and use in source and binary forms is permitted -provided that the above copyright notice and following paragraph are -duplicated in all such forms. - -This file is distributed WITHOUT ANY WARRANTY; without even the implied -warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - -(21) Free Software Foundation LGPL License (*-linux* targets only) - - Copyright (C) 1990-1999, 2000, 2001 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Mark Kettenis , 1997. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, write to the Free - Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - 02110-1301 USA. - -(22) Xavier Leroy LGPL License (i[3456]86-*-linux* targets only) - -Copyright (C) 1996 Xavier Leroy (Xavier.Leroy@inria.fr) - -This program is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License -as published by the Free Software Foundation; either version 2 -of the License, or (at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU Library General Public License for more details. - -(23) Intel (i960) - -Copyright (c) 1993 Intel Corporation - -Intel hereby grants you permission to copy, modify, and distribute this -software and its documentation. Intel grants this permission provided -that the above copyright notice appears in all copies and that both the -copyright notice and this permission notice appear in supporting -documentation. In addition, Intel grants this permission provided that -you prominently mark as "not part of the original" any modifications -made to this software or documentation, and that the name of Intel -Corporation not be used in advertising or publicity pertaining to -distribution of the software or the documentation without specific, -written prior permission. - -Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR -IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY -OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or -representations regarding the use of, or the results of the use of, -the software and documentation in terms of correctness, accuracy, -reliability, currentness, or otherwise; and you rely on the software, -documentation and results solely at your own risk. - -IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, -LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES -OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM -PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. - -(24) Hewlett-Packard (hppa targets only) - -(c) Copyright 1986 HEWLETT-PACKARD COMPANY - -To anyone who acknowledges that this file is provided "AS IS" -without any express or implied warranty: - permission to use, copy, modify, and distribute this file -for any purpose is hereby granted without fee, provided that -the above copyright notice and this notice appears in all -copies, and that the name of Hewlett-Packard Company not be -used in advertising or publicity pertaining to distribution -of the software without specific, written prior permission. -Hewlett-Packard Company makes no representations about the -suitability of this software for any purpose. - -(25) Henry Spencer (only *-linux targets) - -Copyright 1992, 1993, 1994 Henry Spencer. All rights reserved. -This software is not subject to any license of the American Telephone -and Telegraph Company or of the Regents of the University of California. - -Permission is granted to anyone to use this software for any purpose on -any computer system, and to alter it and redistribute it, subject -to the following restrictions: - -1. The author is not responsible for the consequences of use of this - software, no matter how awful, even if they arise from flaws in it. - -2. The origin of this software must not be misrepresented, either by - explicit claim or by omission. Since few users ever read sources, - credits must appear in the documentation. - -3. Altered versions must be plainly marked as such, and must not be - misrepresented as being the original software. Since few users - ever read sources, credits must appear in the documentation. - -4. This notice may not be removed or altered. - -(26) Mike Barcroft - -Copyright (c) 2001 Mike Barcroft -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions -are met: -1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. -2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - -THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -SUCH DAMAGE. - -(27) Konstantin Chuguev (--enable-newlib-iconv) - -Copyright (c) 1999, 2000 - Konstantin Chuguev. All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions -are met: -1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. -2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - -THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -SUCH DAMAGE. - - iconv (Charset Conversion Library) v2.0 - -(28) Artem Bityuckiy (--enable-newlib-iconv) - -Copyright (c) 2003, Artem B. Bityuckiy, SoftMine Corporation. -Rights transferred to Franklin Electronic Publishers. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions -are met: -1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. -2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - -THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -SUCH DAMAGE. - -(29) IBM, Sony, Toshiba (only spu-* targets) - - (C) Copyright 2001,2006, - International Business Machines Corporation, - Sony Computer Entertainment, Incorporated, - Toshiba Corporation, - - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - * Neither the names of the copyright holders nor the names of their - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - -(30) - Alex Tatmanjants (targets using libc/posix) - - Copyright (c) 1995 Alex Tatmanjants - at Electronni Visti IA, Kiev, Ukraine. - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND - ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - SUCH DAMAGE. - -(31) - M. Warner Losh (targets using libc/posix) - - Copyright (c) 1998, M. Warner Losh - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - SUCH DAMAGE. - -(32) - Andrey A. Chernov (targets using libc/posix) - - Copyright (C) 1996 by Andrey A. Chernov, Moscow, Russia. - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND - ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - SUCH DAMAGE. - -(33) - Daniel Eischen (targets using libc/posix) - - Copyright (c) 2001 Daniel Eischen . - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - SUCH DAMAGE. - - -(34) - Jon Beniston (only lm32-* targets) - - Contributed by Jon Beniston - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - SUCH DAMAGE. - - -(35) - ARM Ltd (arm and thumb variant targets only) - - Copyright (c) 2009 ARM Ltd - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - 3. The name of the company may not be used to endorse or promote - products derived from this software without specific prior written - permission. - - THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED - WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -(36) - Xilinx, Inc. (microblaze-* and powerpc-* targets) - -Copyright (c) 2004, 2009 Xilinx, Inc. All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - -1. Redistributions source code must retain the above copyright notice, -this list of conditions and the following disclaimer. - -2. Redistributions in binary form must reproduce the above copyright -notice, this list of conditions and the following disclaimer in the -documentation and/or other materials provided with the distribution. - -3. Neither the name of Xilinx nor the names of its contributors may be -used to endorse or promote products derived from this software without -specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS -IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED -TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - - -(37) Texas Instruments Incorporated (tic6x-* targets) - -Copyright (c) 1996-2010 Texas Instruments Incorporated -http://www.ti.com/ - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - Neither the name of Texas Instruments Incorporated nor the names - of its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -(38) National Semiconductor (cr16-* and crx-* targets) - -Copyright (c) 2004 National Semiconductor Corporation - -The authors hereby grant permission to use, copy, modify, distribute, -and license this software and its documentation for any purpose, provided -that existing copyright notices are retained in all copies and that this -notice is included verbatim in any distributions. No written agreement, -license, or royalty fee is required for any of the authorized uses. -Modifications to this software may be copyrighted by their authors -and need not follow the licensing terms described here, provided that -the new terms are clearly indicated on the first page of each file where -they apply. - diff --git a/ChangeLog b/ChangeLog index adbd25c..e572d95 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,226 @@ +2011-08-19 Joel Brobecker + + * src-release (GDB_SUPPORT_DIRS): Add 'cpu'. + +2011-08-14 Yao Qi + + Merge from gcc: + + 2011-08-14 Yao Qi + * configure.ac (tic6x-*-*): Remove gdb from noconfigdirs. + * configure: Regenerate. + +2011-07-26 Ian Lance Taylor + + Merge from gcc: + + 2011-07-26 Ian Lance Taylor + * configure.ac: Set have_compiler based on whether gcc directory + exists, rather than on whether gcc is in configdirs. + * configure: Rebuild. + + 2011-07-20 David Edelsohn + * Makefile.tpl (POSTSTAGE1_CONFIGURE_FLAGS): Add libsupc++ to + link directories. + * Makefile.in: Rebuild. + + 2011-07-20 Ian Lance Taylor + PR bootstrap/49787 + * configure.ac: Move --enable-bootstrap handling earlier in file. + If --enable-bootstrap and either --enable-build-with-cxx or + --enable-build-poststage1-with-cxx, enable C++ automatically. + * configure: Rebuild. + + 2011-07-19 Ian Lance Taylor + * configure.ac: Add --enable-build-poststage1-with-cxx. If set, + make C++ a boot_language. Set and substitute + POSTSTAGE1_CONFIGURE_FLAGS. + * Makefile.tpl (POSTSTAGE1_CONFIGURE_FLAGS): New variable. + (STAGE[+id+]_CONFIGURE_FLAGS): Add $(POSTSTAGE1_CONFIGURE_FLAGS). + * configure, Makefile.in: Rebuild. + + 2011-07-16 Jason Merrill + * Makefile.def (language=c++): Add check-c++0x and + check-target-libmudflap-c++. + * Makefile.tpl (check-target-libmudflap-c++): New. + * Makefile.in: Regenerate. + + 2011-07-16 Matthias Klose + * Makefile.tpl (EXTRA_CONFIGARGS_LIBJAVA): Define. + * Makefile.def (target_modules/libjava): Pass + $(EXTRA_CONFIGARGS_LIBJAVA). + * configure.ac: Pass --disable-static in EXTRA_CONFIGARGS_LIBJAVA, + if not configured with --enable-static-libjava. + * Makefile.in: Regenerate. + * configure: Likewise. + + 2011-06-22 Hans-Peter Nilsson + PR regression/47836 + PR bootstrap/23656 + PR other/47733 + PR bootstrap/49247 + PR c/48825 + * configure.ac (target_libraries): Remove target-libiberty. + Remove case-statement setting skipdirs=target-libiberty for + multiple targets. Remove checking target_configdirs and + removing target-libiberty but keeping target-libgcc if + otherwise empty. + * Makefile.def (target_modules): Don't add libiberty. + (dependencies): Remove all traces of target-libiberty. + * configure, Makefile.in: Regenerate. + +2011-07-22 Jason Merrill + + * Makefile.def (language=c++): Add check-c++0x and + check-target-libmudflap-c++. + * Makefile.tpl (check-target-libmudflap-c++): New. + * Makefile.in: Regenerate. + +2011-07-18 Rainer Orth + + * configure: Regenerate. + +2011-07-07 Rainer Orth + + PR target/39150 + * configure.ac (i[3456789]86-*-solaris2*): Also accept + x86_64-*-solaris2.1[0-9]*. + * configure: Regenerate. + +2011-06-13 Walter Lee + + * configure.ac (tilepro-*-*) New case. + (tilegx-*-*): Likewise. + * configure: Regenerate. + +2011-06-06 Nick Clifton + + * config.sub: Sync from upstream. + +2011-05-08 Doug Kwan + + Merge from gcc: + + 2011-05-08 Doug Kwan + + * configure.ac: Propagate LDFLAGS_FOR_TARGET. + * configure: Regenerated. + * Makefile.tpl (LDFLAGS_FOR_TARGET): Use LDFLAGS_FOR_TARGET + value from configure. + * Makefile.in: Regenerated. + +2011-05-05 Joseph Myers + + * configure.ac (alpha*-dec-osf*, i[[3456789]]86-*-rdos*, + sh*-*-pe|mips*-*-pe|arm-wince-pe, sparc-*-sunos4*, *-*-aix*, + *-*-beos*, *-*-chorusos, *-*-dragonfly*, *-*-freebsd*, *-*-linux* + | *-*-gnu* | *-*-k*bsd*-gnu | *-*-kopensolaris*-gnu, *-*-lynxos*, + *-*-mingw*, *-*-netbsd*, *-*-netware*, *-*-tpf*, *-*-uclinux*, + *-*-vxworks*): Disable newlib and libgloss in separate case + statement. + (i[[3456789]]86-*-linux*): Move logic allowing newlib to be built + to separate case statement. + (*-*-chorusos, *-*-dragonfly*, *-*-freebsd*, *-*-netbsd*, + *-*-netware*, *-*-tpf*, *-*-uclinux*, *-*-vxworks*, + alpha*-dec-osf*, alpha*-*-linux*, am33_2.0-*-linux*, sh-*-linux*, + sh*-*-pe|mips*-*-pe|*arm-wince-pe, arm-*-coff, arm-*-elf* | + arm*-*-eabi*, arm*-*-linux-gnueabi, arm*-*-symbianelf*, avr-*-*, + bfin-*-*, cris-*-* | crisv32-*-*, frv-*-*, i[[3456789]]86-*-coff | + i[[3456789]]86-*-elf, i[[3456789]]86-w64-mingw*, + i[[3456789]]86-*-mingw*, x86_64-*-mingw*, + i[[3456789]]86-*-interix*, i[[3456789]]86-*-beos*, + i[[3456789]]86-*-rdos*, m32r-*-*, + m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*, m68k-*-elf*, m68*-*-* + | fido-*-*, powerpc-*-aix*, powerpc-*-beos*, powerpc-*-eabi, + powerpc-*-eabi* | powerpcle-*-eabi* | powerpc-*-rtems*, + rs6000-*-lynxos*, rs6000-*-aix*, mips*-*-linux*, sparclet-*-aout* + | sparc86x-*-*, sparc-*-elf*, sparc64-*-elf*, sparclite-*-*, + sparc-*-sunos4*, sparc-*-solaris* | sparc64-*-solaris* | + sparcv9-*-solaris*, *-*-linux* | *-*-gnu* | *-*-k*bsd*-gnu | + *-*-kopensolaris*-gnu, *-*-lynxos*, *-*-*): Don't disable newlib + and libgloss in main case over targets. Remove most empty cases + in main case over targets. + * configure: Regenerate. + +2011-05-04 Joseph Myers + + * configure.ac: Remove code setting special library locations for + hppa*64*-*-hpux11*. Remove code setting compiler for + sparc-sun-solaris2*. + * configure: Regenerate. + +2011-05-04 Joseph Myers + + * configure.ac: Separate libgloss_dir settings from general case + over targets. + * configure: Regenerate. + +2011-04-28 Joseph Myers + + * configure.ac (*-*-dragonfly*, *-*-freebsd*, *-*-netbsd*, + alpha*-dec-osf*, alpha*-*-linux*, alpha*-*-*, sh-*-linux*, + arm-*-elf* | arm*-*-eabi*, arm*-*-linux-gnueabi, frv-*-*): Remove + cases in libgcj-disabling case statement. + (hppa*64*-*-linux*): Set unsupported_languages instead of + disabling target-zlib. + (hppa*64*-*-*): Restrict case in libgcj-disabling case statement + to hppa*64*-*-hpux*. + (hppa*-*-*): Restrict case in libgcj-disabling case statement to + hppa*-*-hpux*. + (ia64*-*-elf*, ia64*-**-hpux*, i[[3456789]]86-*-elf, + i[[3456789]]86-*-linux*, *-*-cygwin*, i[[3456789]]86-*-interix*, + i[[3456789]]86-*-solaris2*, m32r-*-*, m68k-*-elf*, m68*-*-* | + fido-*-*, powerpc-*-eabi, powerpc-*-eabi* | powerpcle-*-eabi* | + powerpc-*-rtems*, mips*-*-linux*, mips*-*-*, sh-*-* | sh64-*-*, + sparc-*-elf*, sparc64-*-elf*, sparc-*-solaris* | + sparc64-*-solaris* | sparcv9-*-solaris*, *-*-linux* | *-*-gnu* | + *-*-k*bsd*-gnu | *-*-kopensolaris*-gnu, *-*-*): Remove cases in + libgcj-disabling case statement. + * configure: Regenerate. + +2011-04-28 Joseph Myers + + * configure.ac: Disable Java for targets not supporting libffi. + (*-*-chorusos, *-*-kaos*, am33_2.0-*-linux*, sh*-*-pe|mips*-*-pe): + Remove cases in Java-disabling statement. + (*arm-wince-pe): Change to arm-wince-pe. + (arc-*-*, arm-*-coff, arm-*-pe*, arm-*-riscix*, avr-*-*): Remove + cases in Java-disabling statement. + (bfin-*-*): Don't disable Java again. + (c4x-*-* | tic4x-*-*, tic54x-*-*, cr16-*-*, d10v-*-*, d30v-*-*, + fr30-*-elf*, moxie-*-*, h8300*-*-*, h8500-*-*, hppa1.1-*-osf* | + hppa1.1-*-bsd*, hppa*-*-*elf* | hppa*-*-lites* | hppa*-*-openbsd*, + hppa*-*-pro*, i960-*-*, i[[3456789]]86-*-coff, + i[[3456789]]86-*-pe, i[[3456789]]86-*-sco3.2v5*, + i[[3456789]]86-*-sco*, i[[3456789]]86-*-sysv4*, + i[[3456789]]86-*-beos*, i[[3456789]]86-*-rdos*, + m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*): Remove cases in + Java-disabling statement. + (mmix-*-*): Don't disable Java again. + (mt-*-*, powerpc*-*-winnt* | powerpc*-*-pe*, powerpcle-*-solaris*, + powerpc-*-beos*, rs6000-*-lynxos*, rs6000-*-*, m68k-apollo-*, + microblaze*, mips*-sde-elf*, mips*-*-irix5*, mips*-*-bsd*, + sparclet-*-aout* | sparc86x-*-*, sparclite-*-*, sparc-*-sunos4*, + tic6x-*-*, v810-*-*, vax-*-*): Remove cases in Java-disabling + statement. + * configure: Regenerate. + +2011-04-28 Joseph Myers + + Merge from GCC: + + 2011-04-18 Jack Howarth + + PR lto/48086 + * configure.ac: Re-enable LTO on *-apple-darwin9*. + * configure: Regenerate. + +2011-04-28 Joseph Myers + + * configure.ac: Separate cases disabling Java and Java libraries + from general case over targets. + * configure: Regenerate. + 2011-04-06 Joseph Myers * configure.ac (build_tools): Remove build-byacc. diff --git a/Makefile.def b/Makefile.def index f499180..5116341 100644 --- a/Makefile.def +++ b/Makefile.def @@ -131,9 +131,9 @@ target_modules = { module= libtermcap; no_check=true; missing=maintainer-clean; }; target_modules = { module= winsup; }; target_modules = { module= libgloss; no_check=true; }; -target_modules = { module= libiberty; }; target_modules = { module= libffi; }; -target_modules = { module= libjava; raw_cxx=true; }; +target_modules = { module= libjava; raw_cxx=true; + extra_configure_flags="$(EXTRA_CONFIGARGS_LIBJAVA)"; }; target_modules = { module= zlib; }; target_modules = { module= boehm-gc; }; target_modules = { module= rda; }; @@ -481,7 +481,6 @@ lang_env_dependencies = { module=libiberty; no_c=true; }; dependencies = { module=configure-target-boehm-gc; on=all-target-libstdc++-v3; }; dependencies = { module=configure-target-fastjar; on=configure-target-zlib; }; dependencies = { module=all-target-fastjar; on=all-target-zlib; }; -dependencies = { module=all-target-fastjar; on=all-target-libiberty; }; dependencies = { module=configure-target-libgo; on=configure-target-libffi; }; dependencies = { module=configure-target-libgo; on=all-target-libstdc++-v3; }; dependencies = { module=all-target-libgo; on=all-target-libffi; }; @@ -493,9 +492,7 @@ dependencies = { module=all-target-libjava; on=all-target-zlib; }; dependencies = { module=all-target-libjava; on=all-target-boehm-gc; }; dependencies = { module=all-target-libjava; on=all-target-libffi; }; dependencies = { module=configure-target-libobjc; on=configure-target-boehm-gc; }; -dependencies = { module=all-target-libobjc; on=all-target-libiberty; }; dependencies = { module=all-target-libobjc; on=all-target-boehm-gc; }; -dependencies = { module=all-target-libstdc++-v3; on=all-target-libiberty; }; dependencies = { module=configure-target-libstdc++-v3; on=configure-target-libgomp; }; // parallel_list.o and parallel_settings.o depend on omp.h, which is // generated by the libgomp configure. Unfortunately, due to the use of @@ -508,17 +505,15 @@ lang_env_dependencies = { module=rda; }; lang_env_dependencies = { module=winsup; }; dependencies = { module=all-target-libgloss; on=all-target-newlib; }; -dependencies = { module=all-target-winsup; on=all-target-libiberty; }; dependencies = { module=all-target-winsup; on=all-target-libtermcap; }; -dependencies = { module=configure-target-libiberty; on=all-binutils; }; -dependencies = { module=configure-target-libiberty; on=all-ld; }; dependencies = { module=configure-target-newlib; on=all-binutils; }; dependencies = { module=configure-target-newlib; on=all-ld; }; dependencies = { module=configure-target-libgfortran; on=all-target-libquadmath; }; languages = { language=c; gcc-check-target=check-gcc; }; -languages = { language=c++; gcc-check-target=check-c++; - lib-check-target=check-target-libstdc++-v3; }; +languages = { language=c++; gcc-check-target="check-c++ check-c++0x"; + lib-check-target=check-target-libstdc++-v3; + lib-check-target=check-target-libmudflap-c++; }; languages = { language=fortran; gcc-check-target=check-fortran; lib-check-target=check-target-libquadmath; lib-check-target=check-target-libgfortran; }; diff --git a/Makefile.in b/Makefile.in index 5cc0356..d1206bd 100644 --- a/Makefile.in +++ b/Makefile.in @@ -237,10 +237,13 @@ POSTSTAGE1_CXX_EXPORT = \ CXX="$(STAGE_CC_WRAPPER) $$r/$(HOST_SUBDIR)/prev-gcc/g++$(exeext) \ -B$$r/$(HOST_SUBDIR)/prev-gcc/ -B$(build_tooldir)/bin/ -nostdinc++ \ -B$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/src/.libs \ + -B$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/libsupc++/.libs \ -I$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/include/$(TARGET_SUBDIR) \ -I$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/include \ -I$$s/libstdc++-v3/libsupc++ \ - -L$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/src/.libs"; export CXX; \ + -L$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/src/.libs \ + -L$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/libsupc++/.libs"; \ + export CXX; \ CXX_FOR_BUILD="$$CXX"; export CXX_FOR_BUILD; @endif target-libstdc++-v3-bootstrap @@ -316,6 +319,8 @@ HOST_CLOOGINC = @clooginc@ HOST_LIBELFLIBS = @libelflibs@ HOST_LIBELFINC = @libelfinc@ +EXTRA_CONFIGARGS_LIBJAVA = @EXTRA_CONFIGARGS_LIBJAVA@ + # ---------------------------------------------- # Programs producing files for the BUILD machine # ---------------------------------------------- @@ -413,6 +418,7 @@ TFLAGS = STAGE_CFLAGS = $(BOOT_CFLAGS) STAGE_TFLAGS = $(TFLAGS) STAGE_CONFIGURE_FLAGS=@stage2_werror_flag@ +POSTSTAGE1_CONFIGURE_FLAGS = @POSTSTAGE1_CONFIGURE_FLAGS@ # Defaults for stage 1; some are overridden below. @@ -423,7 +429,10 @@ STAGE1_CXXFLAGS = $(CXXFLAGS) STAGE1_CXXFLAGS = $(STAGE1_CFLAGS) @endif target-libstdc++-v3-bootstrap STAGE1_TFLAGS = $(STAGE_TFLAGS) -STAGE1_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) +# STAGE1_CONFIGURE_FLAGS overridden below, so we can use +# POSTSTAGE1_CONFIGURE_FLAGS here. +STAGE1_CONFIGURE_FLAGS = \ + $(STAGE_CONFIGURE_FLAGS) $(POSTSTAGE1_CONFIGURE_FLAGS) # Defaults for stage 2; some are overridden below. STAGE2_CFLAGS = $(STAGE_CFLAGS) @@ -433,7 +442,10 @@ STAGE2_CXXFLAGS = $(CXXFLAGS) STAGE2_CXXFLAGS = $(STAGE2_CFLAGS) @endif target-libstdc++-v3-bootstrap STAGE2_TFLAGS = $(STAGE_TFLAGS) -STAGE2_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) +# STAGE1_CONFIGURE_FLAGS overridden below, so we can use +# POSTSTAGE1_CONFIGURE_FLAGS here. +STAGE2_CONFIGURE_FLAGS = \ + $(STAGE_CONFIGURE_FLAGS) $(POSTSTAGE1_CONFIGURE_FLAGS) # Defaults for stage 3; some are overridden below. STAGE3_CFLAGS = $(STAGE_CFLAGS) @@ -443,7 +455,10 @@ STAGE3_CXXFLAGS = $(CXXFLAGS) STAGE3_CXXFLAGS = $(STAGE3_CFLAGS) @endif target-libstdc++-v3-bootstrap STAGE3_TFLAGS = $(STAGE_TFLAGS) -STAGE3_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) +# STAGE1_CONFIGURE_FLAGS overridden below, so we can use +# POSTSTAGE1_CONFIGURE_FLAGS here. +STAGE3_CONFIGURE_FLAGS = \ + $(STAGE_CONFIGURE_FLAGS) $(POSTSTAGE1_CONFIGURE_FLAGS) # Defaults for stage 4; some are overridden below. STAGE4_CFLAGS = $(STAGE_CFLAGS) @@ -453,7 +468,10 @@ STAGE4_CXXFLAGS = $(CXXFLAGS) STAGE4_CXXFLAGS = $(STAGE4_CFLAGS) @endif target-libstdc++-v3-bootstrap STAGE4_TFLAGS = $(STAGE_TFLAGS) -STAGE4_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) +# STAGE1_CONFIGURE_FLAGS overridden below, so we can use +# POSTSTAGE1_CONFIGURE_FLAGS here. +STAGE4_CONFIGURE_FLAGS = \ + $(STAGE_CONFIGURE_FLAGS) $(POSTSTAGE1_CONFIGURE_FLAGS) # Defaults for stage profile; some are overridden below. STAGEprofile_CFLAGS = $(STAGE_CFLAGS) @@ -463,7 +481,10 @@ STAGEprofile_CXXFLAGS = $(CXXFLAGS) STAGEprofile_CXXFLAGS = $(STAGEprofile_CFLAGS) @endif target-libstdc++-v3-bootstrap STAGEprofile_TFLAGS = $(STAGE_TFLAGS) -STAGEprofile_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) +# STAGE1_CONFIGURE_FLAGS overridden below, so we can use +# POSTSTAGE1_CONFIGURE_FLAGS here. +STAGEprofile_CONFIGURE_FLAGS = \ + $(STAGE_CONFIGURE_FLAGS) $(POSTSTAGE1_CONFIGURE_FLAGS) # Defaults for stage feedback; some are overridden below. STAGEfeedback_CFLAGS = $(STAGE_CFLAGS) @@ -473,7 +494,10 @@ STAGEfeedback_CXXFLAGS = $(CXXFLAGS) STAGEfeedback_CXXFLAGS = $(STAGEfeedback_CFLAGS) @endif target-libstdc++-v3-bootstrap STAGEfeedback_TFLAGS = $(STAGE_TFLAGS) -STAGEfeedback_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) +# STAGE1_CONFIGURE_FLAGS overridden below, so we can use +# POSTSTAGE1_CONFIGURE_FLAGS here. +STAGEfeedback_CONFIGURE_FLAGS = \ + $(STAGE_CONFIGURE_FLAGS) $(POSTSTAGE1_CONFIGURE_FLAGS) # Only build the C compiler for stage1, because that is the only one that @@ -491,6 +515,9 @@ STAGE1_LANGUAGES = @stage1_languages@ # the last argument when conflicting --enable arguments are passed. # * Likewise, we force-disable coverage flags, since the installed # compiler probably has never heard of them. +# * Don't remove this, because above we added +# POSTSTAGE1_CONFIGURE_FLAGS to STAGE_CONFIGURE_FLAGS, which +# we don't want for STAGE1_CONFIGURE_FLAGS. STAGE1_CONFIGURE_FLAGS = --disable-intermodule $(STAGE1_CHECKING) \ --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" @@ -541,7 +568,7 @@ CXXFLAGS_FOR_TARGET = @CXXFLAGS_FOR_TARGET@ LIBCFLAGS_FOR_TARGET = $(CFLAGS_FOR_TARGET) LIBCXXFLAGS_FOR_TARGET = $(CXXFLAGS_FOR_TARGET) -fno-implicit-templates -LDFLAGS_FOR_TARGET = +LDFLAGS_FOR_TARGET = @LDFLAGS_FOR_TARGET@ GOCFLAGS_FOR_TARGET = -O2 -g FLAGS_FOR_TARGET = @FLAGS_FOR_TARGET@ @@ -917,7 +944,6 @@ configure-target: \ maybe-configure-target-libtermcap \ maybe-configure-target-winsup \ maybe-configure-target-libgloss \ - maybe-configure-target-libiberty \ maybe-configure-target-libffi \ maybe-configure-target-libjava \ maybe-configure-target-zlib \ @@ -1062,7 +1088,6 @@ all-target: maybe-all-target-libgo all-target: maybe-all-target-libtermcap all-target: maybe-all-target-winsup all-target: maybe-all-target-libgloss -all-target: maybe-all-target-libiberty all-target: maybe-all-target-libffi all-target: maybe-all-target-libjava all-target: maybe-all-target-zlib @@ -1147,7 +1172,6 @@ info-target: maybe-info-target-libgo info-target: maybe-info-target-libtermcap info-target: maybe-info-target-winsup info-target: maybe-info-target-libgloss -info-target: maybe-info-target-libiberty info-target: maybe-info-target-libffi info-target: maybe-info-target-libjava info-target: maybe-info-target-zlib @@ -1225,7 +1249,6 @@ dvi-target: maybe-dvi-target-libgo dvi-target: maybe-dvi-target-libtermcap dvi-target: maybe-dvi-target-winsup dvi-target: maybe-dvi-target-libgloss -dvi-target: maybe-dvi-target-libiberty dvi-target: maybe-dvi-target-libffi dvi-target: maybe-dvi-target-libjava dvi-target: maybe-dvi-target-zlib @@ -1303,7 +1326,6 @@ pdf-target: maybe-pdf-target-libgo pdf-target: maybe-pdf-target-libtermcap pdf-target: maybe-pdf-target-winsup pdf-target: maybe-pdf-target-libgloss -pdf-target: maybe-pdf-target-libiberty pdf-target: maybe-pdf-target-libffi pdf-target: maybe-pdf-target-libjava pdf-target: maybe-pdf-target-zlib @@ -1381,7 +1403,6 @@ html-target: maybe-html-target-libgo html-target: maybe-html-target-libtermcap html-target: maybe-html-target-winsup html-target: maybe-html-target-libgloss -html-target: maybe-html-target-libiberty html-target: maybe-html-target-libffi html-target: maybe-html-target-libjava html-target: maybe-html-target-zlib @@ -1459,7 +1480,6 @@ TAGS-target: maybe-TAGS-target-libgo TAGS-target: maybe-TAGS-target-libtermcap TAGS-target: maybe-TAGS-target-winsup TAGS-target: maybe-TAGS-target-libgloss -TAGS-target: maybe-TAGS-target-libiberty TAGS-target: maybe-TAGS-target-libffi TAGS-target: maybe-TAGS-target-libjava TAGS-target: maybe-TAGS-target-zlib @@ -1537,7 +1557,6 @@ install-info-target: maybe-install-info-target-libgo install-info-target: maybe-install-info-target-libtermcap install-info-target: maybe-install-info-target-winsup install-info-target: maybe-install-info-target-libgloss -install-info-target: maybe-install-info-target-libiberty install-info-target: maybe-install-info-target-libffi install-info-target: maybe-install-info-target-libjava install-info-target: maybe-install-info-target-zlib @@ -1615,7 +1634,6 @@ install-pdf-target: maybe-install-pdf-target-libgo install-pdf-target: maybe-install-pdf-target-libtermcap install-pdf-target: maybe-install-pdf-target-winsup install-pdf-target: maybe-install-pdf-target-libgloss -install-pdf-target: maybe-install-pdf-target-libiberty install-pdf-target: maybe-install-pdf-target-libffi install-pdf-target: maybe-install-pdf-target-libjava install-pdf-target: maybe-install-pdf-target-zlib @@ -1693,7 +1711,6 @@ install-html-target: maybe-install-html-target-libgo install-html-target: maybe-install-html-target-libtermcap install-html-target: maybe-install-html-target-winsup install-html-target: maybe-install-html-target-libgloss -install-html-target: maybe-install-html-target-libiberty install-html-target: maybe-install-html-target-libffi install-html-target: maybe-install-html-target-libjava install-html-target: maybe-install-html-target-zlib @@ -1771,7 +1788,6 @@ installcheck-target: maybe-installcheck-target-libgo installcheck-target: maybe-installcheck-target-libtermcap installcheck-target: maybe-installcheck-target-winsup installcheck-target: maybe-installcheck-target-libgloss -installcheck-target: maybe-installcheck-target-libiberty installcheck-target: maybe-installcheck-target-libffi installcheck-target: maybe-installcheck-target-libjava installcheck-target: maybe-installcheck-target-zlib @@ -1849,7 +1865,6 @@ mostlyclean-target: maybe-mostlyclean-target-libgo mostlyclean-target: maybe-mostlyclean-target-libtermcap mostlyclean-target: maybe-mostlyclean-target-winsup mostlyclean-target: maybe-mostlyclean-target-libgloss -mostlyclean-target: maybe-mostlyclean-target-libiberty mostlyclean-target: maybe-mostlyclean-target-libffi mostlyclean-target: maybe-mostlyclean-target-libjava mostlyclean-target: maybe-mostlyclean-target-zlib @@ -1927,7 +1942,6 @@ clean-target: maybe-clean-target-libgo clean-target: maybe-clean-target-libtermcap clean-target: maybe-clean-target-winsup clean-target: maybe-clean-target-libgloss -clean-target: maybe-clean-target-libiberty clean-target: maybe-clean-target-libffi clean-target: maybe-clean-target-libjava clean-target: maybe-clean-target-zlib @@ -2005,7 +2019,6 @@ distclean-target: maybe-distclean-target-libgo distclean-target: maybe-distclean-target-libtermcap distclean-target: maybe-distclean-target-winsup distclean-target: maybe-distclean-target-libgloss -distclean-target: maybe-distclean-target-libiberty distclean-target: maybe-distclean-target-libffi distclean-target: maybe-distclean-target-libjava distclean-target: maybe-distclean-target-zlib @@ -2083,7 +2096,6 @@ maintainer-clean-target: maybe-maintainer-clean-target-libgo maintainer-clean-target: maybe-maintainer-clean-target-libtermcap maintainer-clean-target: maybe-maintainer-clean-target-winsup maintainer-clean-target: maybe-maintainer-clean-target-libgloss -maintainer-clean-target: maybe-maintainer-clean-target-libiberty maintainer-clean-target: maybe-maintainer-clean-target-libffi maintainer-clean-target: maybe-maintainer-clean-target-libjava maintainer-clean-target: maybe-maintainer-clean-target-zlib @@ -2216,7 +2228,6 @@ check-target: \ maybe-check-target-libtermcap \ maybe-check-target-winsup \ maybe-check-target-libgloss \ - maybe-check-target-libiberty \ maybe-check-target-libffi \ maybe-check-target-libjava \ maybe-check-target-zlib \ @@ -2366,7 +2377,6 @@ install-target: \ maybe-install-target-libtermcap \ maybe-install-target-winsup \ maybe-install-target-libgloss \ - maybe-install-target-libiberty \ maybe-install-target-libffi \ maybe-install-target-libjava \ maybe-install-target-zlib \ @@ -2463,7 +2473,6 @@ install-strip-target: \ maybe-install-strip-target-libtermcap \ maybe-install-strip-target-winsup \ maybe-install-strip-target-libgloss \ - maybe-install-strip-target-libiberty \ maybe-install-strip-target-libffi \ maybe-install-strip-target-libjava \ maybe-install-strip-target-zlib \ @@ -36413,463 +36422,6 @@ maintainer-clean-target-libgloss: -.PHONY: configure-target-libiberty maybe-configure-target-libiberty -maybe-configure-target-libiberty: -@if gcc-bootstrap -configure-target-libiberty: stage_current -@endif gcc-bootstrap -@if target-libiberty -maybe-configure-target-libiberty: configure-target-libiberty -configure-target-libiberty: - @: $(MAKE); $(unstage) - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - echo "Checking multilib configuration for libiberty..."; \ - $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libiberty ; \ - $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libiberty/multilib.tmp 2> /dev/null ; \ - if test -r $(TARGET_SUBDIR)/libiberty/multilib.out; then \ - if cmp -s $(TARGET_SUBDIR)/libiberty/multilib.tmp $(TARGET_SUBDIR)/libiberty/multilib.out; then \ - rm -f $(TARGET_SUBDIR)/libiberty/multilib.tmp; \ - else \ - rm -f $(TARGET_SUBDIR)/libiberty/Makefile; \ - mv $(TARGET_SUBDIR)/libiberty/multilib.tmp $(TARGET_SUBDIR)/libiberty/multilib.out; \ - fi; \ - else \ - mv $(TARGET_SUBDIR)/libiberty/multilib.tmp $(TARGET_SUBDIR)/libiberty/multilib.out; \ - fi; \ - test ! -f $(TARGET_SUBDIR)/libiberty/Makefile || exit 0; \ - $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libiberty ; \ - $(NORMAL_TARGET_EXPORTS) \ - echo Configuring in $(TARGET_SUBDIR)/libiberty; \ - cd "$(TARGET_SUBDIR)/libiberty" || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(TARGET_SUBDIR)/libiberty/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/libiberty"; \ - libsrcdir="$$s/libiberty"; \ - rm -f no-such-file || : ; \ - CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ - $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ - --target=${target_alias} $${srcdiroption} \ - || exit 1 -@endif target-libiberty - - - - - -.PHONY: all-target-libiberty maybe-all-target-libiberty -maybe-all-target-libiberty: -@if gcc-bootstrap -all-target-libiberty: stage_current -@endif gcc-bootstrap -@if target-libiberty -TARGET-target-libiberty=all -maybe-all-target-libiberty: all-target-libiberty -all-target-libiberty: configure-target-libiberty - @: $(MAKE); $(unstage) - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS) \ - $(TARGET-target-libiberty)) -@endif target-libiberty - - - - - -.PHONY: check-target-libiberty maybe-check-target-libiberty -maybe-check-target-libiberty: -@if target-libiberty -maybe-check-target-libiberty: check-target-libiberty - -check-target-libiberty: - @: $(MAKE); $(unstage) - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(TARGET_FLAGS_TO_PASS) check) - -@endif target-libiberty - -.PHONY: install-target-libiberty maybe-install-target-libiberty -maybe-install-target-libiberty: -@if target-libiberty -maybe-install-target-libiberty: install-target-libiberty - -install-target-libiberty: installdirs - @: $(MAKE); $(unstage) - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(TARGET_FLAGS_TO_PASS) install) - -@endif target-libiberty - -.PHONY: install-strip-target-libiberty maybe-install-strip-target-libiberty -maybe-install-strip-target-libiberty: -@if target-libiberty -maybe-install-strip-target-libiberty: install-strip-target-libiberty - -install-strip-target-libiberty: installdirs - @: $(MAKE); $(unstage) - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(TARGET_FLAGS_TO_PASS) install-strip) - -@endif target-libiberty - -# Other targets (info, dvi, pdf, etc.) - -.PHONY: maybe-info-target-libiberty info-target-libiberty -maybe-info-target-libiberty: -@if target-libiberty -maybe-info-target-libiberty: info-target-libiberty - -info-target-libiberty: \ - configure-target-libiberty - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing info in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - info) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-dvi-target-libiberty dvi-target-libiberty -maybe-dvi-target-libiberty: -@if target-libiberty -maybe-dvi-target-libiberty: dvi-target-libiberty - -dvi-target-libiberty: \ - configure-target-libiberty - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing dvi in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - dvi) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-pdf-target-libiberty pdf-target-libiberty -maybe-pdf-target-libiberty: -@if target-libiberty -maybe-pdf-target-libiberty: pdf-target-libiberty - -pdf-target-libiberty: \ - configure-target-libiberty - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing pdf in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - pdf) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-html-target-libiberty html-target-libiberty -maybe-html-target-libiberty: -@if target-libiberty -maybe-html-target-libiberty: html-target-libiberty - -html-target-libiberty: \ - configure-target-libiberty - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing html in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - html) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-TAGS-target-libiberty TAGS-target-libiberty -maybe-TAGS-target-libiberty: -@if target-libiberty -maybe-TAGS-target-libiberty: TAGS-target-libiberty - -TAGS-target-libiberty: \ - configure-target-libiberty - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing TAGS in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - TAGS) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-install-info-target-libiberty install-info-target-libiberty -maybe-install-info-target-libiberty: -@if target-libiberty -maybe-install-info-target-libiberty: install-info-target-libiberty - -install-info-target-libiberty: \ - configure-target-libiberty \ - info-target-libiberty - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing install-info in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - install-info) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-install-pdf-target-libiberty install-pdf-target-libiberty -maybe-install-pdf-target-libiberty: -@if target-libiberty -maybe-install-pdf-target-libiberty: install-pdf-target-libiberty - -install-pdf-target-libiberty: \ - configure-target-libiberty \ - pdf-target-libiberty - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing install-pdf in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - install-pdf) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-install-html-target-libiberty install-html-target-libiberty -maybe-install-html-target-libiberty: -@if target-libiberty -maybe-install-html-target-libiberty: install-html-target-libiberty - -install-html-target-libiberty: \ - configure-target-libiberty \ - html-target-libiberty - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing install-html in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - install-html) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-installcheck-target-libiberty installcheck-target-libiberty -maybe-installcheck-target-libiberty: -@if target-libiberty -maybe-installcheck-target-libiberty: installcheck-target-libiberty - -installcheck-target-libiberty: \ - configure-target-libiberty - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing installcheck in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - installcheck) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-mostlyclean-target-libiberty mostlyclean-target-libiberty -maybe-mostlyclean-target-libiberty: -@if target-libiberty -maybe-mostlyclean-target-libiberty: mostlyclean-target-libiberty - -mostlyclean-target-libiberty: - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing mostlyclean in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - mostlyclean) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-clean-target-libiberty clean-target-libiberty -maybe-clean-target-libiberty: -@if target-libiberty -maybe-clean-target-libiberty: clean-target-libiberty - -clean-target-libiberty: - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing clean in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - clean) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-distclean-target-libiberty distclean-target-libiberty -maybe-distclean-target-libiberty: -@if target-libiberty -maybe-distclean-target-libiberty: distclean-target-libiberty - -distclean-target-libiberty: - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing distclean in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - distclean) \ - || exit 1 - -@endif target-libiberty - -.PHONY: maybe-maintainer-clean-target-libiberty maintainer-clean-target-libiberty -maybe-maintainer-clean-target-libiberty: -@if target-libiberty -maybe-maintainer-clean-target-libiberty: maintainer-clean-target-libiberty - -maintainer-clean-target-libiberty: - @: $(MAKE); $(unstage) - @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \ - r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libiberty" ; \ - for flag in $(EXTRA_TARGET_FLAGS); do \ - eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ - done; \ - (cd $(TARGET_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ - "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ - "RANLIB=$${RANLIB}" \ - "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ - maintainer-clean) \ - || exit 1 - -@endif target-libiberty - - - - - .PHONY: configure-target-libffi maybe-configure-target-libffi maybe-configure-target-libffi: @if gcc-bootstrap @@ -37366,7 +36918,7 @@ configure-target-libjava: rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ - --target=${target_alias} $${srcdiroption} \ + --target=${target_alias} $${srcdiroption} $(EXTRA_CONFIGARGS_LIBJAVA) \ || exit 1 @endif target-libjava @@ -40593,6 +40145,13 @@ maintainer-clean-target-libgomp: +@if target-libmudflap +.PHONY: check-target-libmudflap-c++ +check-target-libmudflap-c++: + $(MAKE) RUNTESTFLAGS="$(RUNTESTFLAGS) c++frags.exp" check-target-libmudflap + +@endif target-libmudflap + # ---------- # GCC module # ---------- @@ -40626,8 +40185,8 @@ check-gcc-c++: r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ $(HOST_EXPORTS) \ - (cd gcc && $(MAKE) $(GCC_FLAGS_TO_PASS) check-c++); -check-c++: check-gcc-c++ check-target-libstdc++-v3 + (cd gcc && $(MAKE) $(GCC_FLAGS_TO_PASS) check-c++ check-c++0x); +check-c++: check-gcc-c++ check-target-libstdc++-v3 check-target-libmudflap-c++ .PHONY: check-gcc-fortran check-fortran check-gcc-fortran: @@ -42665,7 +42224,6 @@ configure-target-libgo: stage_last configure-target-libtermcap: stage_last configure-target-winsup: stage_last configure-target-libgloss: stage_last -configure-target-libiberty: stage_last configure-target-libffi: stage_last configure-target-libjava: stage_last configure-target-zlib: stage_last @@ -42693,7 +42251,6 @@ configure-target-libgo: maybe-all-gcc configure-target-libtermcap: maybe-all-gcc configure-target-winsup: maybe-all-gcc configure-target-libgloss: maybe-all-gcc -configure-target-libiberty: maybe-all-gcc configure-target-libffi: maybe-all-gcc configure-target-libjava: maybe-all-gcc configure-target-zlib: maybe-all-gcc @@ -43400,7 +42957,6 @@ all-m4: maybe-all-build-texinfo configure-target-boehm-gc: maybe-all-target-libstdc++-v3 configure-target-fastjar: maybe-configure-target-zlib all-target-fastjar: maybe-all-target-zlib -all-target-fastjar: maybe-all-target-libiberty configure-target-libgo: maybe-configure-target-libffi configure-target-libgo: maybe-all-target-libstdc++-v3 all-target-libgo: maybe-all-target-libffi @@ -43412,9 +42968,7 @@ all-target-libjava: maybe-all-target-zlib all-target-libjava: maybe-all-target-boehm-gc all-target-libjava: maybe-all-target-libffi configure-target-libobjc: maybe-configure-target-boehm-gc -all-target-libobjc: maybe-all-target-libiberty all-target-libobjc: maybe-all-target-boehm-gc -all-target-libstdc++-v3: maybe-all-target-libiberty configure-target-libstdc++-v3: maybe-configure-target-libgomp configure-stage1-target-libstdc++-v3: maybe-configure-stage1-target-libgomp @@ -43432,10 +42986,7 @@ all-stage4-target-libstdc++-v3: maybe-configure-stage4-target-libgomp all-stageprofile-target-libstdc++-v3: maybe-configure-stageprofile-target-libgomp all-stagefeedback-target-libstdc++-v3: maybe-configure-stagefeedback-target-libgomp all-target-libgloss: maybe-all-target-newlib -all-target-winsup: maybe-all-target-libiberty all-target-winsup: maybe-all-target-libtermcap -configure-target-libiberty: maybe-all-binutils -configure-target-libiberty: maybe-all-ld configure-target-newlib: maybe-all-binutils configure-target-newlib: maybe-all-ld configure-target-libgfortran: maybe-all-target-libquadmath @@ -43473,7 +43024,6 @@ configure-target-libgo: maybe-all-target-libgcc configure-target-libtermcap: maybe-all-target-libgcc configure-target-winsup: maybe-all-target-libgcc configure-target-libgloss: maybe-all-target-libgcc -configure-target-libiberty: maybe-all-target-libgcc configure-target-libffi: maybe-all-target-libgcc configure-target-libjava: maybe-all-target-libgcc configure-target-zlib: maybe-all-target-libgcc @@ -43505,7 +43055,6 @@ configure-target-libtermcap: maybe-all-target-newlib maybe-all-target-libgloss configure-target-winsup: maybe-all-target-newlib maybe-all-target-libgloss - configure-target-libffi: maybe-all-target-newlib maybe-all-target-libgloss configure-target-libjava: maybe-all-target-newlib maybe-all-target-libgloss diff --git a/Makefile.tpl b/Makefile.tpl index f7312d9..4dd2391 100644 --- a/Makefile.tpl +++ b/Makefile.tpl @@ -240,10 +240,13 @@ POSTSTAGE1_CXX_EXPORT = \ CXX="$(STAGE_CC_WRAPPER) $$r/$(HOST_SUBDIR)/prev-gcc/g++$(exeext) \ -B$$r/$(HOST_SUBDIR)/prev-gcc/ -B$(build_tooldir)/bin/ -nostdinc++ \ -B$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/src/.libs \ + -B$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/libsupc++/.libs \ -I$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/include/$(TARGET_SUBDIR) \ -I$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/include \ -I$$s/libstdc++-v3/libsupc++ \ - -L$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/src/.libs"; export CXX; \ + -L$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/src/.libs \ + -L$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/libsupc++/.libs"; \ + export CXX; \ CXX_FOR_BUILD="$$CXX"; export CXX_FOR_BUILD; @endif target-libstdc++-v3-bootstrap @@ -319,6 +322,8 @@ HOST_CLOOGINC = @clooginc@ HOST_LIBELFLIBS = @libelflibs@ HOST_LIBELFINC = @libelfinc@ +EXTRA_CONFIGARGS_LIBJAVA = @EXTRA_CONFIGARGS_LIBJAVA@ + # ---------------------------------------------- # Programs producing files for the BUILD machine # ---------------------------------------------- @@ -416,6 +421,7 @@ TFLAGS = STAGE_CFLAGS = $(BOOT_CFLAGS) STAGE_TFLAGS = $(TFLAGS) STAGE_CONFIGURE_FLAGS=@stage2_werror_flag@ +POSTSTAGE1_CONFIGURE_FLAGS = @POSTSTAGE1_CONFIGURE_FLAGS@ [+ FOR bootstrap-stage +] # Defaults for stage [+id+]; some are overridden below. @@ -426,7 +432,10 @@ STAGE[+id+]_CXXFLAGS = $(CXXFLAGS) STAGE[+id+]_CXXFLAGS = $(STAGE[+id+]_CFLAGS) @endif target-libstdc++-v3-bootstrap STAGE[+id+]_TFLAGS = $(STAGE_TFLAGS) -STAGE[+id+]_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) +# STAGE1_CONFIGURE_FLAGS overridden below, so we can use +# POSTSTAGE1_CONFIGURE_FLAGS here. +STAGE[+id+]_CONFIGURE_FLAGS = \ + $(STAGE_CONFIGURE_FLAGS) $(POSTSTAGE1_CONFIGURE_FLAGS) [+ ENDFOR bootstrap-stage +] # Only build the C compiler for stage1, because that is the only one that @@ -444,6 +453,9 @@ STAGE1_LANGUAGES = @stage1_languages@ # the last argument when conflicting --enable arguments are passed. # * Likewise, we force-disable coverage flags, since the installed # compiler probably has never heard of them. +# * Don't remove this, because above we added +# POSTSTAGE1_CONFIGURE_FLAGS to STAGE[+id+]_CONFIGURE_FLAGS, which +# we don't want for STAGE1_CONFIGURE_FLAGS. STAGE1_CONFIGURE_FLAGS = --disable-intermodule $(STAGE1_CHECKING) \ --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" @@ -494,7 +506,7 @@ CXXFLAGS_FOR_TARGET = @CXXFLAGS_FOR_TARGET@ LIBCFLAGS_FOR_TARGET = $(CFLAGS_FOR_TARGET) LIBCXXFLAGS_FOR_TARGET = $(CXXFLAGS_FOR_TARGET) -fno-implicit-templates -LDFLAGS_FOR_TARGET = +LDFLAGS_FOR_TARGET = @LDFLAGS_FOR_TARGET@ GOCFLAGS_FOR_TARGET = -O2 -g FLAGS_FOR_TARGET = @FLAGS_FOR_TARGET@ @@ -1391,6 +1403,13 @@ ENDIF raw_cxx +] [+ ENDFOR recursive_targets +] [+ ENDFOR target_modules +] +@if target-libmudflap +.PHONY: check-target-libmudflap-c++ +check-target-libmudflap-c++: + $(MAKE) RUNTESTFLAGS="$(RUNTESTFLAGS) c++frags.exp" check-target-libmudflap + +@endif target-libmudflap + # ---------- # GCC module # ---------- diff --git a/bfd/.gitignore b/bfd/.gitignore new file mode 100644 index 0000000..3316133 --- /dev/null +++ b/bfd/.gitignore @@ -0,0 +1,40 @@ +/bfd-in3.h +/bfd.h +/bfd_stdint.h +/bfdver.h +/elf32-ia64.c +/elf32-target.h +/elf64-ia64.c +/elf64-target.h +/libtool-soversion +/ofiles +/peigen.c +/pepigen.c +/pex64igen.c +/stmp-bfd-h +/targmatch.h + +/doc/aoutx.texi +/doc/archive.texi +/doc/archures.texi +/doc/bfdio.texi +/doc/bfdt.texi +/doc/bfdver.texi +/doc/bfdwin.texi +/doc/cache.texi +/doc/chew +/doc/coffcode.texi +/doc/core.texi +/doc/elf.texi +/doc/elfcode.texi +/doc/format.texi +/doc/hash.texi +/doc/init.texi +/doc/libbfd.texi +/doc/linker.texi +/doc/mmo.texi +/doc/opncls.texi +/doc/reloc.texi +/doc/section.texi +/doc/syms.texi +/doc/targets.texi diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 94f3e22..65db027 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,1888 @@ +2011-11-21 Tristan Gingold + + * configure.in: Bump version to 2.22 + * Makefile.am (RELEASE): Set. + * configure, Makefile.in: Regenerate. + +2011-11-15 Maxim Kuvyrkov + + Backport from mainline: + + 2011-11-14 Maxim Kuvyrkov + * elfxx-mips.c (mips_n64_exe_plt0_entry): Use 64-bit move. + +2011-11-15 Alan Modra + Andreas Tobler + + * elflink.c (_bfd_elf_create_got_section): Replace + bfd_make_section_with_flags with bfd_make_section_anyway_with_flags. + (_bfd_elf_link_create_dynamic_sections): Likewise. + * elf32-ppc.c (ppc_elf_create_glink): Likewise. + (ppc_elf_create_dynamic_sections): Likewise. + +2011-11-09 Alan Modra + + * elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Mark syms in + executables when export_dynamic. + +2011-11-08 Alan Modra + + * elf64-ppc.c (struct ppc64_elf_obj_tdata): Rename + ha_relocs_not_using_r2 to unexpected_toc_insn. + (ok_lo_toc_insn): New function. + (ppc64_elf_edit_toc): Check insn on lo toc reloc. Emit warning. + (ppc64_elf_relocate_section): Don't check insn on lo toc reloc here. + Handle addic on lo toc reloc. + +2011-10-25 Alan Modra + + Apply mainline patches + 2011-10-20 Alan Modra + * elf32-i386.c (i386_opcode16): Delete. + (elf_i386_check_tls_transition): Use memcmp to compare contents. + * elf64-x86-64.c (x86_64_opcode16, x86_64_opcode32): Delete. + (elf_x86_64_check_tls_transition): Use memcmp to compare contents. + + 2011-10-19 Alan Modra + PR ld/13311 + * elflink.c (elf_link_output_extsym): Correct test for warning when + forced local executable syms are referenced from shared libraries. + + 2011-10-19 Alan Modra + PR ld/13254 + * elflink.c (bfd_elf_final_link): Emit error_textrel error. + + 2011-10-17 Alan Modra + PR ld/12975 + PR ld/13195 + * elf64-ppc.c (ppc64_elf_gc_mark_dynamic_ref): Apply 2011-09-15 + and 2011-09-29 bfd_elf_gc_mark_dynamic_ref_symbol changes here too. + + 2011-10-11 Alan Modra + PR binutils/13278 + * archive.c (bfd_generic_archive_p): Only check first element + when target_defaulted. + (_bfd_construct_extended_name_table): Use ar_maxnamelen. + (_bfd_archive_bsd44_construct_extended_name_table): Likewise. + + 2011-10-11 Alan Modra + PR binutils/13257 + * archive.c (_bfd_find_nested_archive, _bfd_get_elt_at_filepos): Open + thin archive element using container target if not defaulted. + + 2011-10-10 Alan Modra + * elf64-ppc.c (ppc64_elf_howto_table): Add R_PPC64_TOCSAVE entry. + (struct ppc_link_hash_table): Add tocsave_htab. + (struct tocsave_entry): New. + (tocsave_htab_hash, tocsave_htab_eq, tocsave_find): New functions. + (ppc64_elf_link_hash_table_create): Create tocsave_htab.. + (ppc64_elf_link_hash_table_free): ..and delete it. + (build_plt_stub): Always put STD_R2_40R1 first. + (ppc64_elf_size_stubs): Check for R_PPC64_TOCSAVE following reloc + on plt call. If present add prologue nop location to tocsave_htab. + (ppc64_elf_relocate_section): Convert prologue nop to std. Skip + first insn of plt call stub when R_PPC64_TOCSAVE present. + + 2011-10-08 H.J. Lu + PR ld/13250 + * elflink.c (elf_link_add_object_symbols): Preserve the maximum + alignment and size for common symbols. + + 2011-10-08 Alan Modra + PR ld/13229 + PR ld/13244 + * elflink.c (elf_link_add_object_symbols): Don't make IR symbols + dynamic. + + 2011-10-08 Alan Modra + * elflink.c (elf_link_output_extsym): Strip defined plugin symbols + even when strip_discarded is false. + + 2011-09-30 Alan Modra + PR ld/13235 + * elf64-ppc.c (struct ppc64_elf_obj_tdata): Add ha_relocs_not_using_r2. + (ppc64_elf_edit_toc): Check HA relocs. + (ha_reloc_match): Delete function. + (ppc64_elf_relocate_section): Remove delayed HA nop optimization. + Instead do it and low part optimization based on + ha_relocs_not_using_r2. + +2011-10-18 David S. Miller + + PR binutils/13301 + * elfxx-sparc.c (sparc_elf_find_reloc_at_ofs): New function. + (_bfd_sparc_elf_relocate_section): Always move the __tls_get_addr + call delay slot instruction forward 4 bytes when performing + relaxation. + +2011-10-18 H.J. Lu + + PR ld/13177 + * elflink.c (elf_gc_sweep_symbol): Don't hide symbols without PLT + nor GOT references. + +2011-10-14 Hans-Peter Nilsson + + * elf32-cris.c (cris_elf_gc_sweep_hook) + : Fix missing update of gotplt refcount for + global symbols. + : New cases for similar missing + updates of the plt refcount. + (elf_cris_adjust_gotplt_to_got): Assert integrity of the gotplt + refcount in relation to the plt refcount. + +2011-10-13 Richard Sandiford + + * elf32-arm.c (elf32_arm_final_link_relocate): Mark PLT calls via + stubs as resolved. + +2011-09-29 H.J. Lu + + PR ld/13195 + * elflink.c (_bfd_elf_merge_symbol): Don't set dynamic_def when + clearing def_dynamic. + (elf_link_add_object_symbols): Likewise. Set dynamic_def when + setting def_dynamic. + (bfd_elf_gc_mark_dynamic_ref_symbol): Check if a symbol is + versioned. + +2011-09-29 Alan Modra + + PR ld/13233 + * elflink.c (_bfd_elf_gc_mark_extra_sections): Mark single member + debug and special section groups. + +2011-09-26 Tristan Gingold + + * configure.in: Bump version to 2.21.90 + * configure: Regenerate. + +2011-09-21 David S. Miller + + * elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): New. + * elfxx-sparc.h: Declare it. + * elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Call it. + * elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise. + +2011-09-21 Tristan Gingold + + * mach-o.c (bfd_mach_o_convert_section_name_to_bfd): Add comment. + Deals with size limited strings. + (bfd_mach_o_build_commands): Initialize more fields. + +2011-09-15 H.J. Lu + + PR ld/13177 + * elflink.c (elf_gc_sweep_symbol): Also hide symbols without PLT + nor GOT references. + +2011-09-15 H.J. Lu + + PR ld/12975 + * bfd-in.h (bfd_elf_size_dynamic_sections): Remove pointer + to struct bfd_elf_version_tree. + + * elflink.c (elf_info_failed): Remove verdefs. + (_bfd_elf_export_symbol): Updated. + _bfd_elf_link_assign_sym_version): Likewise. + (bfd_elf_size_dynamic_sections): Remove pointer to struct + bfd_elf_version_tree. Updated. + (bfd_elf_gc_mark_dynamic_ref_symbol): Check if a symbol is hidden + by linker script. + + * linker.c (bfd_hide_sym_by_version): New. + + * bfd-in2.h: Regenerated. + +2011-09-12 H.J. Lu + + PR ld/13178 + * elf-ifunc.c (_bfd_elf_allocate_ifunc_dyn_relocs): Use .got.plt + if there are no GOT relocations. + +2011-09-09 Kai Tietz + + * peicode.h (pe_ILF_build_a_bfd): Don't remove leading underscore + for targets without symbol_leading_char. + +2011-09-08 Bernd Jendrissek + + * bfdwin.c (bfd_get_file_window): Fix memory leak. + +2011-09-07 Alan Modra + + PR ld/13131 + * bfd/elf64-ppc.c (adjust_toc_syms): Ensure ppc64_elf_howto_table + is initialized. + +2011-09-06 Alan Modra + + PR ld/13131 + * elf64-ppc.c (adjust_toc_syms): Delete redundant code. + (ppc64_elf_edit_toc): Fix style nit. Report some details + on linker failure due to reference in debug or non-alloc + sections to optimized away toc entry, and don't abort. + +2011-09-01 Christophe Lyon + + * elf32-arm.c (elf32_arm_output_arch_local_syms): Skip excluded + sections. + +2011-08-26 Nick Clifton + + * po/es.po: Updated Spanish translation. + +2011-08-19 Alan Modra + + * elf64-ppc.c (ppc64_elf_edit_toc): Ignore can_optimize bit if + we haven't seen expected -mcmodel=medium/large code relocs. + +2011-08-18 Tristan Gingold + + * mach-o.c (bfd_mach_o_read_segment): Initialize list. + +2011-08-17 Tristan Gingold + + * mach-o.c (bfd_mach_o_write_section_32): Fix typo. + +2011-08-17 Alan Modra + + PR ld/12762 + * bfd-in.h (struct bfd_section_already_linked): Forward declare. + (_bfd_handle_already_linked): Declare. + * coff-alpha.c (_bfd_ecoff_section_already_linked): Define as + _bfd_coff_section_already_linked. + * coff-mips.c (_bfd_ecoff_section_already_linked): Likewise. + * coffcode.h (coff_section_already_linked): Likewise. + * cofflink.c (coff_link_add_symbols): Revert 2011-07-09 changes. + * elf-bfd.h: Likewise. + * libbfd-in.h: Likewise. + * targets.c: Likewise. + * linker.c (bfd_section_already_linked): Likewise. + (bfd_section_already_linked_table_lookup): Likewise. + (bfd_section_already_linked_table_insert): Likewise. + (_bfd_generic_section_already_linked): Likewise. Call + _bfd_handle_already_linked. + (_bfd_handle_already_linked): New function, split out from.. + * elflink.c (_bfd_elf_section_already_linked): ..here. Revert + 2011-07-09 changes. Avoid unnecessary strcmp when matching + already_linked_list entries. Match plugin linkonce section. + (section_signature): Delete. + * coffgen.c (_bfd_coff_section_already_linked): New function. + * libcoff-in.h (_bfd_coff_section_already_linked): Declare. + * libbfd.h: Regenerate. + * libcoff.h: Regenerate. + * bfd-in2.h: Regenerate. + +2011-08-14 Alan Modra + + * elf32-ppc.c (ppc_elf_select_plt_layout): Force bss-plt when + shared and call to _mcount will go via plt. + +2011-08-14 Alan Modra + + * elf64-ppc.c: Prefix all einfo error strings with "%P: ". + * elf32-ppc.c: Likewise. + (ppc_elf_select_plt_layout): Use einfo rather than info to report + forced bss-plt. + +2011-08-12 H.J. Lu + + PR ld/13082 + * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_RELATIVE64. + (elf_x86_64_relocate_section): Treat R_X86_64_64 like R_X86_64_32 + and zero-extend it to 64bit if addend is zero for x32. Generate + R_X86_64_RELATIVE64 for x32. + +2011-08-09 Matthew Gretton-Dann + + * bfd-in.h (bfd_elf32_arm_set_target_relocs): Update prototype. + * bfd-in2.h (bfd_elf32_arm_set_target_relocs): Likewise. + * elf32-arm.c (elf32_arm_link_hash_table): New field. + (elf232_arm_link_hash_table_create): Initialise new field. + (check_use_blx): Change test depending on fix_arm1176. + (bfd_elf32_arm_set_target_relocs): Set fix_arm1176 from + command line options. + +2011-08-08 Tristan Gingold + + * mach-o.c (struct mach_o_segment_name_xlat): Add comments. + (segsec_names_xlat): Reorder elements. + (bfd_mach_o_read_section_32): Fix typo. + (bfd_mach_o_read_section_64): Fix typo. + +2011-08-08 Tristan Gingold + + * mach-o.h (BFD_MACH_O_SEGNAME_SIZE): New macro. + (BFD_MACH_O_SECTNAME_SIZE): Ditto. + (bfd_mach_o_section): Use them. Add next field. + (bfd_mach_o_segment_command): Replace sections array by + sect_head and sect_tail. + (bfd_mach_o_get_mach_o_section): New macro. + (bfd_mach_o_lookup_section): Remove. + (bfd_mach_o_new_section_hook): New function. + * mach-o.c (bfd_mach_o_normalize_section_name): Use strncmp + instead of strcmp. + (bfd_mach_o_convert_section_name_to_bfd): Replaces section + parameter with segname and sectname parameters. Adjust. + (bfd_mach_o_append_section_to_segment): New function. Use a + linked list for Mach-O sections. + (bfd_mach_o_write_segment_32): Adjust. + (bfd_mach_o_write_segment_64): Ditto. + (bfd_mach_o_build_commands): Fix comment. Adjust. + (bfd_mach_o_flatten_sections): Adjust. + (bfd_mach_o_print_section_map): Adjust. + (bfd_mach_o_set_section_flags_from_bfd): Ditto. + (bfd_mach_o_new_section_hook): New function. + (bfd_mach_o_init_section_from_mach_o): Ditto. + (bfd_mach_o_read_section_32): Remove section parameter. + Return a section instead. + (bfd_mach_o_read_section_64): Ditto. + (bfd_mach_o_read_section): Ditto. + (bfd_mach_o_make_bfd_section): Adjust. + (bfd_mach_o_read_segment): Adjust for new profile of + bfd_mach_o_read_section. + (bfd_mach_o_lookup_section): Remove. + * mach-o-target.c (bfd_mach_o_new_section_hook): Remove. + +2011-08-08 Tristan Gingold + + * mach-o.h (bfd_mach_o_version_min_command): New structure. + (bfd_mach_o_load_command): Add version_min. + (mach_o_data_struct): Fix comment. + * mach-o.c (bfd_mach_o_read_version_min): New function. + (bfd_mach_o_read_command): Handle BFD_MACH_O_LC_FUNCTION_STARTS, + BFD_MACH_O_LC_VERSION_MIN_MACOSX and + BFD_MACH_O_LC_VERSION_MIN_IPHONEOS. + (bfd_mach_o_get_name_or_null): New function. + (bfd_mach_o_get_name): Use the above new one. + (bfd_mach_o_load_command_name): Add the above new commands. + (bfd_mach_o_bfd_print_private_bfd_data): Display numerically + unknown commands. Handle BFD_MACH_O_LC_FUNCTION_STARTS, + BFD_MACH_O_LC_VERSION_MIN_MACOSX and + BFD_MACH_O_LC_VERSION_MIN_IPHONEOS. + +2011-08-08 Tristan Gingold + + * mach-o.h: Move size macros to external.h + Move reloc macros to reloc.h and x86-64.h. + * mach-o-i386.c: Includes mach-o/reloc.h + * mach-o-x86-64.c: Ditto and includes mach-o/x86-64.h + * mach-o.c: Add includes. + (bfd_mach_o_write_header): Use structure from external.h to convert. + (bfd_mach_o_write_thread): Ditto. + (bfd_mach_o_write_relocs): Ditto. + (bfd_mach_o_write_section_32): Ditto. + (bfd_mach_o_write_section_64): Ditto. + (bfd_mach_o_write_segment_32): Ditto. + (bfd_mach_o_write_segment_64): Ditto. + (bfd_mach_o_write_symtab): Ditto. + (bfd_mach_o_write_contents): Ditto. + (bfd_mach_o_read_header): Ditto. + (bfd_mach_o_read_section_32): Ditto. + (bfd_mach_o_read_section_64): Ditto. + (bfd_mach_o_read_symtab_symbol): Ditto. + (bfd_mach_o_read_dylinker): Ditto. + (bfd_mach_o_read_dylib): Ditto. + (bfd_mach_o_read_dysymtab): Ditto. + (bfd_mach_o_read_symtab): Ditto. + (bfd_mach_o_read_linkedit): Ditto. + (bfd_mach_o_read_str): Ditto. + (bfd_mach_o_read_dyld_info): Ditto. + (bfd_mach_o_read_segment): Ditto. + (bfd_mach_o_read_command): Ditto. + (bfd_mach_o_archive_p): Ditto. + (bfd_mach_o_canonicalize_one_reloc): Ditto. Change the BUF parameter. + (bfd_mach_o_canonicalize_relocs): Adjust to call the above function. + (bfd_mach_o_read_dysymtab_symbol): Rename BUF variable. + (bfd_mach_o_read_uuid): Remove useless cast. Use a macro instead + of an hard-coded value. + +2011-08-08 Tristan Gingold + + * mach-o-x86-64.c (bfd_mach_o_x86_64_mkobject): Fix cut-and-past typos. + (bfd_mach_o_x86_64_swap_reloc_out): Handle BFD_RELOC_32_PCREL, + BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64 and + BFD_RELOC_MACH_O_X86_64_GOT_LOAD. Share common code. + +2011-08-08 Tristan Gingold + + * mach-o.c (bfd_mach_o_normalize_section_name): New function. + (bfd_mach_o_convert_section_name_to_bfd): Use it. + (bfd_mach_o_get_section_type_from_name): New function. + (bfd_mach_o_get_section_attribute_from_name): Ditto. + * mach-o.h (bfd_mach_o_section): Move bfdsection field at the end. + Add comments. Add prototypes for the above new functions. + +2011-08-05 Mark Kettenis + + * netbsd-core.c (netbsd_core_vec): Init match_priority field. + +2011-08-05 Alan Modra + + * elf64-ppc.c (maybe_strip_output): New function. + (ppc64_elf_size_stubs): Use it to strip .branch_lt and .eh_frame. + +2011-08-05 Alan Modra + + PR ld/12762 + * elflink.c (_bfd_elf_section_already_linked): Return matched + status. Remove COFF comdat section handling. + * linker.c (_bfd_generic_section_already_linked): Return matched + status. Don't set SEC_GROUP in l_flags for plugin entries. + (bfd_section_already_linked): Update prototype. + * targets.c (_section_already_linked): Likewise. + * elf-bfd.h (_bfd_elf_section_already_linked): Likewise. + * libbfd-in.h (_bfd_generic_section_already_linked): Likewise. + (_bfd_nolink_section_already_linked): Update. + * libbfd.h: Regenerate. + * bfd-in2.h: Regenerate. + +2011-08-05 Alan Modra + + * elf32-ppc.c: Include dwarf2.h. + (struct ppc_elf_link_hash_table): Add glink_eh_frame. + (ppc_elf_create_glink): Create .eh_frame section. + (glink_eh_frame_cie): New array. + (ppc_elf_size_dynamic_sections): Size glink_eh_frame. + (ppc_elf_finish_dynamic_sections): Write glink_eh_frame. + +2011-08-04 Tristan Gingold + + * vms-alpha.c (_bfd_vms_write_eeom): Round vms_linkage_index. + (_bfd_vms_write_etir): Initialize vms_linkage_index to 0. + +2011-08-03 Tristan Gingold + + * mach-o.c (bfd_mach_o_canonicalize_symtab): Handle no symbols case. + (bfd_mach_o_read_symtab_symbols): Return if no symbols. + +2011-08-02 Maciej W. Rozycki + + * elfxx-mips.c (check_4byte_branch): Remove function. + (check_relocated_bzc): New function. + (_bfd_mips_elf_relax_section): Permit the relaxation of LUI + instructions that immediately follow a compact branch + instruction. + +2011-08-02 Alan Modra + + * elf64-ppc.c (build_plt_stub): Correct emitted relocs when no + plt_static_chain. + (ppc_build_one_stub): Adjust get_relocs call to suit.. + (ppc_size_one_stub): ..and reloc sizing. Correct plt size corner case. + +2011-08-01 H.J. Lu + + PR ld/13048 + * archures.c (bfd_mach_i386_intel_syntax): New. + (bfd_mach_i386_i8086): Updated. + (bfd_mach_i386_i386): Likewise. + (bfd_mach_x86_64): Likewise. + (bfd_mach_x64_32): Likewise. + (bfd_mach_i386_i386_intel_syntax): Likewise. + (bfd_mach_x86_64_intel_syntax): Likewise. + (bfd_mach_x64_32_intel_syntax): Likewise. + (bfd_mach_l1om): Likewise. + (bfd_mach_l1om_intel_syntax): Likewise. + (bfd_mach_k1om): Likewise. + (bfd_mach_k1om_intel_syntax): Likewise. + + * bfd-in2.h: Regenerated. + + * cpu-i386.c (bfd_i386_compatible): Check mach instead of + bits_per_address. + (bfd_x64_32_arch_intel_syntax): Set bits_per_address to 64. + (bfd_x64_32_arch): Likewise. + + * elf64-x86-64.c: Include "libiberty.h". + (x86_64_elf_howto_table): Append x32 R_X86_64_32. + (elf_x86_64_rtype_to_howto): Support x32 R_X86_64_32. + (elf_x86_64_reloc_type_lookup): Likewise. + (elf_x86_64_reloc_name_lookup): Likewise. + (elf_x86_64_relocate_section): Likewise. + (elf_x86_64_check_relocs): Allow R_X86_64_64 relocations for x32. + +2011-07-29 Maciej W. Rozycki + + * elfxx-mips.c (check_br32): Fix return type. + +2011-07-29 Maciej W. Rozycki + + * elfxx-mips.c (bz_insn_16): Correct opcode mask. + +2011-07-29 Maciej W. Rozycki + + * elfxx-mips.c: Adjust comments throughout. + (mips_elf_relax_delete_bytes): Reshape code. + (_bfd_mips_elf_relax_section): Remove check for + R_MICROMIPS_GPREL16 relocations. Reshape code. + +2011-07-28 Roland McGrath + + * elf32-i386.c (NACL_PLT_ENTRY_SIZE, NACLMASK): New macros. + (elf_i386_nacl_plt0_entry): New variable. + (elf_i386_plt_entry): New variable. + (elf_i386_nacl_pic_plt0_entry): New variable. + (elf_i386_nacl_pic_plt_entry): New variable. + (elf_i386_nacl_plt, elf_i386_nacl_arch_bed): New variables. + (elf_backend_arch_data): New macro setting for elf_i386_nacl_vec stanza. + (elf_backend_plt_alignment): Likewise. + + * config.bfd: Handle i[3-7]86-*-nacl*. + * elf32-i386.c (bfd_elf32_i386_nacl_vec): New backend vector stanza. + * targets.c: Support bfd_elf32_i386_nacl_vec. + * configure.in: Likewise. + * configure: Regenerated. + + * elf32-i386.c (struct elf_i386_plt_layout): New type. + (GET_PLT_ENTRY_SIZE): New macro. + (elf_i386_plt): New variable. + (struct elf_i386_backend_data): New member `plt'. + (elf_i386_arch_bed): Add initializer for it. + (elf_i386_vxworks_arch_bed): Likewise. + (elf_i386_allocate_dynrelocs): Use GET_PLT_ENTRY_SIZE. + (elf_i386_plt_sym_val): Likewise. + (elf_i386_relocate_section): Likewise. + (elf_i386_finish_dynamic_symbol): Likewise. + Also use other elf_i386_plt_layout members for PLT details. + (elf_i386_finish_dynamic_sections): Likewise. + + * elf32-i386.c (struct elf_i386_backend_data): New type. + (get_elf_i386_backend_data): New macro. + (elf_i386_arch_bed): New variable. + (elf_backend_arch_data): New macro. + (struct elf_i386_link_hash_table): Remove plt0_pad_byte and is_vxworks. + (elf_i386_link_hash_table_create): Don't initialize them. + (elf_i386_create_dynamic_sections): Find is_vxworks flags in + elf_i386_backend_data, not elf_i386_link_hash_table. + (elf_i386_adjust_dynamic_symbol): Likewise. + (elf_i386_allocate_dynrelocs): Likewise. + (elf_i386_readonly_dynrelocs): Likewise. + (elf_i386_size_dynamic_sections): Likewise. + (elf_i386_relocate_section): Likewise. + (elf_i386_finish_dynamic_symbol): Likewise. + (elf_i386_finish_dynamic_sections): Likewise. Same for plt0_pad_byte. + (elf_i386_vxworks_link_hash_table_create): Function removed. + (elf_i386_vxworks_arch_bed): New variable. + (elf_backend_arch_data): New macro in elf32-i386-vxworks stanza. + + * elf-bfd.h (elf_backend_data): New member arch_backend_data. + * elfxx-target.h (elf_backend_arch_data): New macro. + (elfNN_bed): Use it as initializer for the new member. + +2011-07-28 Mikulas Patocka + + * elf64-hppa.c (elf_hppa_final_link_relocate): Fix handling of out + of range branches. + +2011-07-26 Jakub Jelinek + + * dwarf2.c (dwarf_debug_sections): Add .debug_macro + and .zdebug_macro entry. + (dwarf_debug_section_enum): Add debug_macro. + +2011-07-26 Alan Modra + + * elf64-ppc.c: Include dwarf2.h. + (struct ppc_link_hash_table): Add glink_eh_frame. + (create_linkage_sections): Create .eh_frame section. + (ppc64_elf_size_dynamic_sections): Arrange to drop unneeded + glink_eh_frame. + (glink_eh_frame_cie): New array. + (ppc64_elf_size_stubs): Size glink_eh_frame. + (ppc64_elf_build_stubs): Init glink_eh_frame contents. + (ppc64_elf_finish_dynamic_sections): Write glink_eh_frame. + +2011-07-25 Hans-Peter Nilsson + + PR ld/12815 + * elf64-mmix.c (struct _mmix_elf_section_data): New members + has_warned_bpo and has_warned_pushj. + (mmix_final_link_relocate): Remove PARAMS and PTR macros, + converting to ISO C. Add new parameter error_message. All + callers changed. + (mmix_elf_perform_relocation): Ditto. + : + Handle the case where mmix_elf_check_common_relocs has not been + called, missing preparations for relocs of the respective type. + +2011-07-24 Chao-ying Fu + Ilie Garbacea + Maciej W. Rozycki + Joseph Myers + Catherine Moore + Richard Sandiford + + * archures.c (bfd_mach_mips_micromips): New macro. + * cpu-mips.c (I_micromips): New enum value. + (arch_info_struct): Add bfd_mach_mips_micromips. + * elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New + prototype. + (_bfd_mips_elf_relax_section): Likewise. + (_bfd_mips16_elf_reloc_unshuffle): Rename to... + (_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS + ASE. + (_bfd_mips16_elf_reloc_shuffle): Rename to... + (_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE. + (gprel16_reloc_p): Handle microMIPS ASE. + (literal_reloc_p): New function. + * elf32-mips.c (elf_micromips_howto_table_rel): New variable. + (_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE. + (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle + and _bfd_mips_elf_reloc_shuffle changes. + (mips_elf_gprel32_reloc): Update comment. + (micromips_reloc_map): New variable. + (bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE. + (mips_elf32_rtype_to_howto): Likewise. + (mips_info_to_howto_rel): Likewise. + (bfd_elf32_bfd_is_target_special_symbol): Define. + (bfd_elf32_bfd_relax_section): Likewise. + * elf64-mips.c (micromips_elf64_howto_table_rel): New variable. + (micromips_elf64_howto_table_rela): Likewise. + (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle + and _bfd_mips_elf_reloc_shuffle changes. + (micromips_reloc_map): Likewise. + (bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE. + (bfd_elf64_bfd_reloc_name_lookup): Likewise. + (mips_elf64_rtype_to_howto): Likewise. + (bfd_elf64_bfd_is_target_special_symbol): Define. + * elfn32-mips.c (elf_micromips_howto_table_rel): New variable. + (elf_micromips_howto_table_rela): Likewise. + (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle + and _bfd_mips_elf_reloc_shuffle changes. + (micromips_reloc_map): Likewise. + (bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE. + (bfd_elf32_bfd_reloc_name_lookup): Likewise. + (mips_elf_n32_rtype_to_howto): Likewise. + (bfd_elf32_bfd_is_target_special_symbol): Define. + * elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro. + (LA25_LUI_MICROMIPS_2): Likewise. + (LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise. + (LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise. + (TLS_RELOC_P): Handle microMIPS ASE. + (mips_elf_create_stub_symbol): Adjust value of stub symbol if + target is a microMIPS function. + (micromips_reloc_p): New function. + (micromips_reloc_shuffle_p): Likewise. + (got16_reloc_p, call16_reloc_p): Handle microMIPS ASE. + (got_disp_reloc_p, got_page_reloc_p): New functions. + (got_ofst_reloc_p): Likewise. + (got_hi16_reloc_p, got_lo16_reloc_p): Likewise. + (call_hi16_reloc_p, call_lo16_reloc_p): Likewise. + (hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE. + (micromips_branch_reloc_p): New function. + (tls_gd_reloc_p, tls_ldm_reloc_p): Likewise. + (tls_gottprel_reloc_p): Likewise. + (_bfd_mips16_elf_reloc_unshuffle): Rename to... + (_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS + ASE. + (_bfd_mips16_elf_reloc_shuffle): Rename to... + (_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE. + (_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE. + (mips_tls_got_index, mips_elf_got_page): Likewise. + (mips_elf_create_local_got_entry): Likewise. + (mips_elf_relocation_needs_la25_stub): Likewise. + (mips_elf_calculate_relocation): Likewise. + (mips_elf_perform_relocation): Likewise. + (_bfd_mips_elf_symbol_processing): Likewise. + (_bfd_mips_elf_add_symbol_hook): Likewise. + (_bfd_mips_elf_link_output_symbol_hook): Likewise. + (mips_elf_add_lo16_rel_addend): Likewise. + (_bfd_mips_elf_check_relocs): Likewise. + (mips_elf_adjust_addend): Likewise. + (_bfd_mips_elf_relocate_section): Likewise. + (mips_elf_create_la25_stub): Likewise. + (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. + (_bfd_mips_elf_gc_sweep_hook): Likewise. + (_bfd_mips_elf_is_target_special_symbol): New function. + (mips_elf_relax_delete_bytes): Likewise. + (opcode_descriptor): New structure. + (RA): New macro. + (OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise. + (b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables. + (beq_insn_32): Likewise. + (b_insn_16, bz_insn_16): New variables. + (BZC32_REG_FIELD): New macro. + (bz_rs_insns_32, bz_rt_insns_32): New variables. + (bzc_insns_32, bz_insns_16):Likewise. + (BZ16_REG, BZ16_REG_FIELD): New macros. + (jal_insn_32_bd16, jal_insn_32_bd32): New variables. + (jal_x_insn_32_bd32): Likewise. + (j_insn_32, jalr_insn_32): Likewise. + (ds_insns_32_bd16, ds_insns_32_bd32): Likewise. + (jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise. + (JR16_REG): New macro. + (ds_insns_16_bd16): New variable. + (lui_insn): Likewise. + (addiu_insn, addiupc_insn): Likewise. + (ADDIUPC_REG_FIELD): New macro. + (MOVE32_RD, MOVE32_RS): Likewise. + (MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise. + (move_insns_32, move_insns_16): New variables. + (nop_insn_32, nop_insn_16): Likewise. + (MATCH): New macro. + (find_match): New function. + (check_br16_dslot, check_br32_dslot): Likewise. + (check_br16, check_br32): Likewise. + (IS_BITSIZE): New macro. + (check_4byte_branch): New function. + (_bfd_mips_elf_relax_section): Likewise. + (_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16 + and microMIPS modules together. + (_bfd_mips_elf_print_private_bfd_data): Handle microMIPS ASE. + * reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation. + (BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise. + (BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise. + (BFD_RELOC_MICROMIPS_GPREL16): Likewise. + (BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise. + (BFD_RELOC_MICROMIPS_HI16_S): Likewise. + (BFD_RELOC_MICROMIPS_LO16): Likewise. + (BFD_RELOC_MICROMIPS_LITERAL): Likewise. + (BFD_RELOC_MICROMIPS_GOT16): Likewise. + (BFD_RELOC_MICROMIPS_CALL16): Likewise. + (BFD_RELOC_MICROMIPS_GOT_HI16): Likewise. + (BFD_RELOC_MICROMIPS_GOT_LO16): Likewise. + (BFD_RELOC_MICROMIPS_CALL_HI16): Likewise. + (BFD_RELOC_MICROMIPS_CALL_LO16): Likewise. + (BFD_RELOC_MICROMIPS_SUB): Likewise. + (BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise. + (BFD_RELOC_MICROMIPS_GOT_OFST): Likewise. + (BFD_RELOC_MICROMIPS_GOT_DISP): Likewise. + (BFD_RELOC_MICROMIPS_HIGHEST): Likewise. + (BFD_RELOC_MICROMIPS_HIGHER): Likewise. + (BFD_RELOC_MICROMIPS_SCN_DISP): Likewise. + (BFD_RELOC_MICROMIPS_JALR): Likewise. + (BFD_RELOC_MICROMIPS_TLS_GD): Likewise. + (BFD_RELOC_MICROMIPS_TLS_LDM): Likewise. + (BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise. + (BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise. + (BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise. + (BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise. + (BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise. + * bfd-in2.h: Regenerate. + * libbfd.h: Regenerate. + +2011-07-22 H.J. Lu + + * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. + (ALL_MACHINES_CFILES): Add cpu-k1om.c. + * Makefile.in: Regenerated. + + * archures.c (bfd_architecture): Add bfd_arch_k1om. + (bfd_k1om_arch): New. + (bfd_archures_list): Add &bfd_k1om_arch. + * bfd-in2.h: Regenerated. + + * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if + bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec + if bfd_elf64_x86_64_freebsd_vec is supported. + (targ_selvecs): Likewise. + + * configure.in: Support bfd_elf64_k1om_vec and + bfd_elf64_k1om_freebsd_vec. + * configure: Regenerated. + + * cpu-k1om.c: New. + + * elf64-x86-64.c (elf64_k1om_elf_object_p): New. + (bfd_elf64_k1om_vec): Likewise. + (bfd_elf64_k1om_freebsd_vec): Likewise. + + * targets.c (bfd_elf64_k1om_vec): New. + (bfd_elf64_k1om_freebsd_vec): Likewise. + (_bfd_target_vector): Add bfd_elf64_k1om_vec and + bfd_elf64_k1om_freebsd_vec. + +2011-07-20 Jan Kratochvil + + Fix false coff-go32-exe matches. + * coff-i386.c (TARGET_SYM) <_bfd_check_format>: Conditionally use + COFF_CHECK_FORMAT. + * coff-stgo32.c (go32_check_format): New forward declaration. + (COFF_CHECK_FORMAT): New defintion. + (go32_check_format): New function. + +2011-07-15 Alan Modra + + * configure.in: Bump version. + * configure: Regenerate. + +2011-07-14 Alan Modra + + * linker.c (_bfd_generic_section_already_linked): Set l_flags. + * elf-bfd.h (struct already_linked): Forward declare. + +2011-07-14 Alan Modra + + * elflink.c (_bfd_elf_fix_symbol_flags): Loop on indirect syms. + (_bfd_elf_adjust_dynamic_symbol): Remove FIXME. + +2011-07-14 Alan Modra + + * elf64-ppc.c (struct ppc_link_hash_table): Add plt_static_chain. + (build_plt_stub): Add plt_static_chain param, don't load r11 if false. + (build_tls_get_addr_stub): Likewise. + (ppc_build_one_stub): Update calls to above. + (ppc_size_one_stub): Adjust stub size. + (ppc64_elf_size_stubs): Add plt_static_chain param, save to htab. + * elf64-ppc.h (ppc64_elf_size_stubs): Update prototype. + +2011-07-12 Nick Clifton + + * elf32-arm.c (elf32_arm_section_flags): Delete. + (elf_backend_section_flags): Remove. + +2011-07-11 H.J. Lu + + PR ld/12982 + * elflink.c (bfd_elf_size_dynamic_sections): Also skip BFD_PLUGIN + when setting stack_flags. + +2011-07-11 Catherine Moore + + * aout-adobe.c (aout_32_bfd_lookup_section_flags): New definition. + * aout-target.h (MY_bfd_lookup_section_flags): New definition. + * aout-tic30.c (MY_bfd_lookup_section_flags): New definition. + * bfd-in2.h: Regenerated. + * bfd.c (bfd_lookup_section_flags): New definition. + * binary.c (binary_bfd_lookup_section_flags): New definition. + * bout.c (b_out_bfd_lookup_section_flags): New definition. + * coff-alpha.c (_bfd_ecoff_bfd_lookup_section_flags): New definition. + * coff-mips.c (_bfd_ecoff_bfd_lookup_section_flags): New definition. + * coff-rs6000.c (rs6000coff_vec): Include + bfd_generic_lookup_section_flags. + (pmac_xcoff_vec): Likewise. + * coffcode.h (coff_bfd_lookup_section_flags): New definition. + * coff64-rs6000.c (rs6000coff64_vec): Include + bfd_generic_lookup_section_flags. + (aix5coff64_vec): Likewise. + * ecoff.c (bfd_debug_section): Initialize flag_info field. + * elf-bfd.h (elf_backend_lookup_section_flags_hook): Declare. + (bfd_elf_lookup_section_flags): Declare. + * elflink.c (bfd_elf_lookup_section_flags): New function. + * elfxx-target.h (bfd_elfNN_bfd_lookup_section_flags): Define. + (elf_backend_lookup_section_flags_hook): Define. + (elf_backend_data): Add elf_backend_lookup_section_flags_hook. + * i386msdos.c (msdos_bfd_lookup_section_flags): New define. + * i386os9k.c (os9k_bfd_lookup_section_flags): New define. + * ieee.c (ieee_bfd_lookup_section_flags): New define. + * ihex.c (ihex_bfd_lookup_section_flags): New define. + * libbfd-in.h (_bfd_nolink_bfd_lookup_section_flags): Declare. + (bfd_generic_lookup_section_flags): Declare. + * libbfd.h: Regenerated. + * mach-o-target.c (bfd_mach_o_bfd_lookup_section_flags): New. + * mmo.c (mmo_bfd_lookup_section_flags): New definition. + * nlm-target.h (nlm_bfd_lookup_section_flags): New definition. + * oasys.c (oasys_bfd_lookup_section_flags): New definition. + * pef.c (bfd_pef_bfd_lookup_section_flags): New definition. + * plugin.c (bfd_plugin_bfd_lookup_section_flags): New definition. + * ppcboot.c (ppcboot_bfd_lookup_section_flags): New definition. + * reloc.c (bfd_generic_lookup_section_flags): New function. + * som.c (som_bfd_lookup_section_flags): New definition. + * srec.c (srec_bfd_lookup_section_flags): New definition. + * targets.c (flag_info): Declare. + (NAME##_bfd_lookup_section_flags): Add to LINK jump table. + (_bfd_lookup_section_flags): New. + * tekhex.c (tekhex_bfd_lookup_section_flags): New definition. + * versados.c (versados_bfd_lookup_section_flags): New definition. + * vms-alpha.c (alpha_vms_bfd_lookup_section_flag): New definition. + * xsym.c (bfd_sym_bfd_lookup_section_flags): New definition. + +2011-07-11 H.J. Lu + + PR ld/12978 + * elfnn-ia64.c (count_dyn_reloc): Fix a typo. + +2011-07-09 Alan Modra + + PR ld/12942 + * elflink.c (elf_link_add_object_symbols): Use elf_discarded_section + rather than kept_section to determine whether a symbol is from + a discarded section. + * cofflink.c (coff_link_add_symbols): Make symbols from discarded + sections appear undefined. + +2011-07-09 H.J. Lu + + PR ld/12942 + * elf-bfd.h (_bfd_elf_section_already_linked): Replace + "asection *" with "struct already_linked *". + * libbfd-in.h (_bfd_nolink_section_already_linked): Likewise. + (_bfd_generic_section_already_linked): Likewise. + (bfd_section_already_linked_table_insert): Likewise. + (struct already_linked): New. + (struct bfd_section_already_linked): Use it. + * elflink.c (_bfd_elf_section_already_linked): Replace. + "asection *" with "struct already_linked *". Replace the plugin + dummy with the LTO output. + * linker.c (_bfd_generic_section_already_linked): Likewise. + * targets.c (struct already_linked): Add forward declaration. + (bfd_target): Replace "struct bfd_section *" with + "struct already_linked *" in _section_already_linked. + * bfd-in2.h: Regenerate. + * libbfd.h: Regenerate. + +2011-07-06 Tristan Gingold + + * mach-o.h: Move loader related definitions to + include/mach-o/loader.h. Include it. + +2011-07-05 H.J. Lu + + * elf64-x86-64.c (elf_backend_post_process_headers): Always + define to _bfd_elf_set_osabi. + +2011-07-03 Samuel Thibault + Thomas Schwinge + + PR binutils/12913 + * elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of + ELFOSABI_LINUX alias. + * elf32-hppa.c: Likewise. + * elf32-i370.c: Likewise. + * elf64-hppa.c: Likewise. + +2011-07-01 Ian Lance Taylor + + * elf32-i386.c (elf_i386_eh_frame_plt): Correct expression: change + DW_OP_lit3 to DW_OP_lit2. + +2011-07-01 Alan Modra + + * elf32-ppc.c (ppc_elf_copy_indirect_symbol): Don't look at + dyn relocs when called to copy flags for a weak sym. + * elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Likewise. + (ppc64_elf_merge_private_bfd_data): Delete. + (bfd_elf64_bfd_merge_private_bfd_data): Define as + _bfd_generic_verify_endian_match. + +2011-06-30 Bernd Schmidt + + * bfd/elf32-tic6x.c (elf32_tic6x_set_osabi): Also set it if + link_info is NULL. + +2011-06-28 Tristan Gingold + + * vms-alpha.c (vms_private_data_struct): Make vms_linkage_index + unsigned int. + (_bfd_vms_write_etir): Write linkage index from reloc. + +2011-06-28 Fawzi Mohamed + + * mach-o.c (bfd_mach_o_read_command): Also ignore + BFD_MACH_O_LC_ROUTINES_64. + +2011-06-27 Tristan Gingold + + * vms-alpha.c (_bfd_vms_write_etir): Use 'section' to get current + section target index. + +2011-06-27 Nick Clifton + + * cisco-core.c (cisco_core_little_vec): Add initialization of + match_priority field. + +2011-06-27 Tristan Gingold + + * cache.c: Include bfd_stdint.h. + (cache_bmmap): Change profile. Return region start and size. + * bfdio.c (struct bfd_iovec): Change bmmap profile. + (bfd_mmap): Change profile and adjust. Update comment. + (memory_bmmap): Change profile. + * opncls.c (opncls_bmmap): Change profile. + * vms-lib.c (vms_lib_bmmap): Likewise. + * libbfd.h: Regenerate. + * bfd-in2.h: Regenerate. + +2011-06-27 Tristan Gingold + + * vms-misc.c (vms_time_to_time_t): Adjust overflow detection. + Add comment. + +2011-06-25 H.J. Lu + + * elf64-x86-64.c (elf_backend_post_process_headers): Don't + define for FreeBSD/x86-64 nor FreeBSD/L1OM. Define for L1OM. + +2011-06-25 Jan Kratochvil + + * elf64-x86-64.c (elf_x86_64_link_hash_table_create): Initialize + PLT_EH_FRAME. + * elf32-i386.c (elf_i386_link_hash_table): Likewise. + +2011-06-24 Richard Henderson + + PR ld/12928 + * elf64-alpha.c (elf64_alpha_relax_tls_get_addr): Recover the + tlsgd insn before swapping adjacent insns. + +2011-06-24 Tristan Gingold + + * vms-alpha.c (alpha_vms_slurp_relocs): Add a guard for relocs in the + absolute section. + +2011-06-24 Alan Modra + + PR ld/12921 + * elf.c (assign_file_positions_for_load_sections): Don't align + sh_offset for all SHT_NOBITS sections here, just .tbss sections + that don't get a PT_LOAD. + +2011-06-22 Kaz Kojima + + * elf32-sh.c (sh_elf_relocate_section): Allow R_SH_TLS_LE_32 for PIE. + (sh_elf_check_relocs): Likewise. + +2011-06-22 Richard Henderson + + * elf64-alpha.c (elf64_alpha_check_relocs): No dynamic reloc for + TPREL in a PIE image. + (alpha_dynamic_entries_for_reloc): Likewise. + (elf64_alpha_relocate_section): Allow TPREL in PIE images. + (elf64_alpha_relax_got_load): Likewise. + +2011-06-22 Ramana Radhakrishnan + + * elf32-arm.c (elf32_arm_final_link_relocate): Allow R_ARM_TLS_LE32 + for PIE. + +2011-06-22 Alan Modra + + * elflink.c (_bfd_elf_merge_symbol): Allow type changes for + plugin symbols. Fix segfault on linker scrip defined syms. + +2011-06-20 Jakub Jelinek + + PR ld/12570 + * elf-eh-frame.c (_bfd_elf_parse_eh_frame): Allow no relocations + at all for linker created .eh_frame sections. + (_bfd_elf_discard_section_eh_frame): Handle linker created + .eh_frame sections with no relocations. + * elf64-x86-64.c: Include dwarf2.h. + (elf_x86_64_eh_frame_plt): New variable. + (PLT_CIE_LENGTH, PLT_FDE_LENGTH, PLT_FDE_START_OFFSET, + PLT_FDE_LEN_OFFSET): Define. + (struct elf_x86_64_link_hash_table): Add plt_eh_frame field. + (elf_x86_64_create_dynamic_sections): Create and fill in + .eh_frame section for .plt section. + (elf_x86_64_size_dynamic_sections): Write .plt section size + into .eh_frame FDE covering .plt section. + (elf_x86_64_finish_dynamic_sections): Write .plt section + start into .eh_frame FDE covering .plt section. Call + _bfd_elf_write_section_eh_frame on htab->plt_eh_frame section. + (elf_backend_plt_alignment): Define to 4. + * elf32-i386.c: Include dwarf2.h. + (elf_i386_eh_frame_plt): New variable. + (PLT_CIE_LENGTH, PLT_FDE_LENGTH, PLT_FDE_START_OFFSET, + PLT_FDE_LEN_OFFSET): Define. + (struct elf_i386_link_hash_table): Add plt_eh_frame field. + (elf_i386_create_dynamic_sections): Create and fill in + .eh_frame section for .plt section. + (elf_i386_size_dynamic_sections): Write .plt section size + into .eh_frame FDE covering .plt section. + (elf_i386_finish_dynamic_sections): Write .plt section + start into .eh_frame FDE covering .plt section. Call + _bfd_elf_write_section_eh_frame on htab->plt_eh_frame section. + (elf_backend_plt_alignment): Define to 4. + +2011-06-19 H.J. Lu + + * elf64-x86-64.c (elf_backend_post_process_headers): Defined + for x32. + +2011-06-16 H.J. Lu + + * elf64-x86-64.c: Include and CORE_HEADER if + CORE_HEADER is defined. + (elf_x86_64_write_core_note): New. + (elf_backend_write_core_note): Likewise. + + * hosts/x86-64linux.h (uint64_t): New. + (user_regsx32_struct): Likewise. + (elf_gregx32_t): Likewise. + (ELF_NGREGX32): Likewise. + (elf_gregsetx32_t): Likewise. + (elf_prstatusx32): Likewise. + (prstatusx32_t): Likewise. + (user_fpregs32_struct): Removed. + (user_fpxregs32_struct): Likewise. + (user32): Likewise. + (elf_fpregset32_t): Likewise. + (elf_fpxregset32_t): Likewise. + (prgregset32_t): Likewise. + (prfpregset32_t): Likewise. + +2011-06-16 H.J. Lu + + * elf64-x86-64.c (elf_x86_64_grok_prstatus): Support x32. + (elf_x86_64_grok_psinfo): Likewise. + +2011-06-16 Nick Clifton + + * elf.c (elf_find_function): Fail if not provided with a symbol + table. + +2011-06-15 Ulrich Weigand + + * elf-bfd.h (elfcore_write_arm_vfp): Add prototype. + * elf.c (elfcore_grok_arm_vfp): New function. + (elfcore_grok_note): Call it to handle NT_ARM_VFP notes. + (elfcore_write_arm_vfp): New function. + (elfcore_write_register_note): Call it to handle .reg-arm-vfp. + +2011-06-14 Richard Henderson + + * elf64-alpha.c (elf64_alpha_copy_indirect_symbol): Rename from + elf64_alpha_merge_ind_symbols; adjust for the generic interface. + (elf64_alpha_always_size_sections): Don't call + elf64_alpha_merge_ind_symbols. + (elf_backend_copy_indirect_symbol): New. + +2011-06-14 Alan Modra + + PR ld/12887 + * elf-eh-frame.c (_bfd_elf_parse_eh_frame): Check sec_info_type + before doing anything. + (_bfd_elf_discard_section_eh_frame): Likewise. + +2011-06-14 Alan Modra + + * Makefile.am: Formatting. + * Makefile.in: Regenerate. + * configure.in (bfd_elf64_tilegx_vec): Add elfxx-tilegx.lo. + * po/SRC-POTFILES.in: Regnerate. + +2011-06-14 Alan Modra + + * elf32-tilepro.c (tilepro_elf_size_dynamic_sections): Don't use PTR. + (allocate_dynrelocs, readonly_dynrelocs): Replace PTR with void *. + Don't handle warning symbols here. + * elfxx-tilegx.c (tilegx_elf_size_dynamic_sections): As above. + (allocate_dynrelocs, readonly_dynrelocs): As above. + +2011-06-14 Alan Modra + + PR ld/12851 + * elflink.c (_bfd_elf_gc_mark_extra_sections): New function. + (elf_gc_sweep): Don't treat debug and sections like .comment + specially here. + (bfd_elf_gc_sections): Treat note sections as gc roots only when + not part of a group. Always call gc_mark_extra_sections. + * elf-bfd.h (_bfd_elf_gc_mark_extra_sections): Declare. + * elfxx-target.h (elf_backend_gc_mark_extra_sections): Default to + _bfd_elf_gc_mark_extra_sections. + * elf32-arm.c (elf32_arm_gc_mark_extra_sections): Call + _bfd_elf_gc_mark_extra_sections. + * elf32-tic6x.c (elf32_tic6x_gc_mark_extra_sections): Likewise. + +2011-06-13 Nick Clifton + + * elf32-tilepro.c (tilepro_elf_check_relocs): Delete unused local + variable 'local_got_offsets'. + * elfxx-tilegx.c (tilegx_elf_check_relocs): Likewise. + (tilegx_finish_dyn): Delete unused local variable 'abi_64_p'. + +2011-06-13 Walter Lee + + * Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. + (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. + (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, + and elfxx-tilegx.lo. + (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and + elfxx-tilegx.c. + (BFD64_BACKENDS): Add elf64-tilegx.lo. + (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. + * Makefile.in: Regenerate. + * arctures.c (bfd_architecture): Define bfd_arch_tilepro, + bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. + (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. + (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. + bfd-in2.h: Regenerate. + * config.bfd: Handle tilegx-*-* and tilepro-*-*. + * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, + and bfd_elf64_tilegx_vec. + * configure: Regenerate. + * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and + TILEPRO_ELF_DATA. + * libbfd.h: Regenerate. + * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, + RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, + IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, + IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, + IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, + IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, + IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, + IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, + IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, + IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, + MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, + IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, + IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, + IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, + IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, + IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, + IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} + Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, + HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, + JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, + DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, + SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, + IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, + IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, + IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, + IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, + IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, + IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, + IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, + IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, + IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, + IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, + IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, + IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, + IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, + IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, + IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, + IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, + IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, + IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, + IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, + IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, + IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, + IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, + IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, + IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, + IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, + IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, + IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, + TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} + * targets.c (bfd_elf32_tilegx_vec): Declare. + (bfd_elf32_tilepro_vec): Declare. + (bfd_elf64_tilegx_vec): Declare. + (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, + and bfd_elf64_tilegx_vec. + * cpu-tilegx.c: New file. + * cpu-tilepro.c: New file. + * elf32-tilepro.h: New file. + * elf32-tilepro.c: New file. + * elf32-tilegx.c: New file. + * elf32-tilegx.h: New file. + * elf64-tilegx.c: New file. + * elf64-tilegx.h: New file. + * elfxx-tilegx.c: New file. + * elfxx-tilegx.h: New file. + +2011-06-13 Alan Modra + + * linker.c (bfd_link_hash_traverse): Follow warning symbol link. + (_bfd_generic_link_write_global_symbol, fix_syms): Don't handle + warning symbols here. + * elf-m10300.c (elf32_mn10300_finish_hash_table_entry): Likewise. + * elf32-arm.c (allocate_dynrelocs_for_symbol, + elf32_arm_readonly_dynrelocs): Likewise. + * elf32-bfin.c (bfin_discard_copies): Likewise. + * elf32-cris.c (elf_cris_adjust_gotplt_to_got, + elf_cris_discard_excess_dso_dynamics, + elf_cris_discard_excess_program_dynamics): Likewise. + * elf32-hppa.c (allocate_plt_static, allocate_dynrelocs, + clobber_millicode_symbols, readonly_dynrelocs): Likewise. + * elf32-i370.c (i370_elf_adjust_dynindx): Likewise. + * elf32-i386.c (elf_i386_allocate_dynrelocs, + elf_i386_readonly_dynrelocs): Likewise. + * elf32-lm32.c (allocate_dynrelocs, readonly_dynrelocs): Likewise. + * elf32-m32c.c (m32c_relax_plt_check, m32c_relax_plt_realloc): Likewise. + * elf32-m32r.c (allocate_dynrelocs, readonly_dynrelocs): Likewise. + * elf32-m68k.c (elf_m68k_discard_copies): Likewise. + * elf32-microblaze.c (allocate_dynrelocs): Likewise. + * elf32-ppc.c (allocate_dynrelocs, maybe_set_textrel): Likewise. + * elf32-s390.c (allocate_dynrelocs, readonly_dynrelocs): Likewise. + * elf32-score.c (score_elf_sort_hash_table_f): Likewise. + * elf32-score7.c (score_elf_sort_hash_table_f): Likewise. + * elf32-sh.c (allocate_dynrelocs, readonly_dynrelocs): Likewise. + * elf32-tic6x.c (elf32_tic6x_allocate_dynrelocs, + elf32_tic6x_readonly_dynrelocs): Likewise. + * elf32-vax.c (elf_vax_discard_copies): Likewise. + * elf32-xstormy16.c (xstormy16_relax_plt_check, + xstormy16_relax_plt_realloc): Likewise. + * elf32-xtensa.c (elf_xtensa_allocate_dynrelocs): Likewise. + * elf64-alpha.c (elf64_alpha_output_extsym, + elf64_alpha_calc_got_offsets_for_symbol, + elf64_alpha_calc_dynrel_sizes, elf64_alpha_size_rela_got_1): Likewise. + * elf64-hppa.c (elf64_hppa_mark_exported_functions, + allocate_global_data_opd, elf64_hppa_mark_milli_and_exported_functions, + elf_hppa_unmark_useless_dynamic_symbols, + elf_hppa_remark_useless_dynamic_symbols): Likewise. + * elf64-ppc.c (ppc64_elf_gc_mark_dynamic_ref, func_desc_adjust, + adjust_opd_syms, adjust_toc_syms, allocate_dynrelocs, + readonly_dynrelocs, merge_global_got, reallocate_got, + undo_symbol_twiddle): Likewise. + * elf64-s390.c (allocate_dynrelocs, readonly_dynrelocs): Likewise. + * elf64-sh64.c (sh64_elf64_discard_copies): Likewise. + * elf64-x86-64.c (elf_x86_64_allocate_dynrelocs, + elf_x86_64_readonly_dynrelocs): Likewise. + * elflink.c (elf_link_renumber_hash_table_dynsyms, + elf_link_renumber_local_hash_table_dynsyms, _bfd_elf_export_symbol, + _bfd_elf_link_find_version_dependencies, + _bfd_elf_link_assign_sym_version, _bfd_elf_adjust_dynamic_symbol, + _bfd_elf_link_sec_merge_syms, elf_adjust_dynstr_offsets, + elf_collect_hash_codes, elf_collect_gnu_hash_codes, + elf_renumber_gnu_hash_syms, elf_gc_sweep_symbol, + elf_gc_propagate_vtable_entries_used, + elf_gc_smash_unused_vtentry_relocs, bfd_elf_gc_mark_dynamic_ref_symbol, + elf_gc_allocate_got_offsets): Likewise. + * elfnn-ia64.c (elfNN_ia64_global_dyn_info_free, + elfNN_ia64_global_dyn_sym_thunk): Likewise. + * elfxx-mips.c (mips_elf_check_symbols, mips_elf_output_extsym, + mips_elf_sort_hash_table_f, allocate_dynrelocs): Likewise. + * elfxx-sparc.c (allocate_dynrelocs, readonly_dynrelocs): Likewise. + * i386linux.c (linux_tally_symbols): Likewise. + * m68klinux.c (linux_tally_symbols): Likewise. + * sparclinux.c (linux_tally_symbols): Likewise. + * sunos.c (sunos_scan_dynamic_symbol): Likewise. + * xcofflink.c (xcoff_post_gc_symbol): Likewise. + + * elflink.c (elf_link_output_extsym): Make it a bfd_hash_traverse + function. Update all callers. + * aoutx.h (aout_link_write_other_symbol): Likewise. + * pdp11.c (aout_link_write_other_symbol): Likewise. + * cofflink.c (_bfd_coff_write_global_sym): Likewise. + * ecoff.c (ecoff_link_write_external): Likewise. + * xcofflink.c (xcoff_write_global_symbol): Likewise. + * vms-alpha.c (alpha_vms_link_output_symbol): Likewise. Handle + warning symbols. + * ecoff.c (ecoff_link_hash_traverse): Delete. + * coff-ppc.c (ppc_bfd_coff_final_link): Use bfd_hash_traverse for + _bfd_coff_write_global_sym. + * libcoff-in.h (_bfd_coff_write_global_sym): Update prototype. + * libcoff.h: Regenerate. + +2011-06-10 Nick Clifton + + * elflink.c (_bfd_elf_link_create_dynamic_sections): If the + backend does not provide a function for creating dynamic sections + then fail. + (bfd_elf_final_link): Issue a warning message if a dynamic section + has the SHT_NOTE type. + (bfd_elf_final_link): Do not look for dynamic strings in a section + that does not have the SHT_STRTAB type or the name .dynstr. + * elf32-arm.c (elf32_arm_finish_dynamic_sections): Fail if the got + section is not in the output binary. + * elf32-hppa.c (elf32_hppa_finish_dynamic_sections): Likewise. + +2011-06-09 Tristan Gingold + + * elfnn-ia64.c (elfNN_ia64_relax_section, elfNN_ia64_choose_gp) + (elfNN_ia64_relocate_section, elfNN_vms_object_p): Remove trailing + spaces. + +2011-06-09 Tristan Gingold + + * bfd.c (bfd_get_sign_extend_vma): Handle aixcoff. + +2011-06-09 Nick Clifton + + PR ld/12845 + * elf.c (_bfd_elf_init_private_section_data): Add an assertion + that the output section has an allocated bfd_elf_section_data + structure. + * elfxx-mips.c (mips_elf_check_symbols): Do not create a stub for + symbols in sections that have been removed by garbage collection. + +2011-06-08 H.J. Lu + + * elf64-x86-64.c (elf_x86_64_check_relocs): Allow R_X86_64_64 + relocations in SEC_DEBUGGING sections when building shared + libraries. + +2011-06-08 H.J. Lu + + PR ld/12851 + * elflink.c (elf_gc_sweep): Don't check SHT_NOTE sections here. + (bfd_elf_gc_sections): Also check SHT_NOTE sections. + +2011-06-08 Tristan Gingold + + * makefile.vms (OBJS): Add elfxx-ia64.obj + Remove vax case. + +2011-06-08 Alan Modra + + * aix386-core.c, * cisco-core.c, * hpux-core.c, * osf-core.c, + * sco5-core.c: Init match_priority field. + +2011-06-08 Alan Modra + + * elflink.c (_bfd_elf_archive_symbol_lookup): Follow warning and + indirect links here. + +2011-06-07 Joel Brobecker + + * irix-core.c (irix_core_vec): Add match_priority field. + +2011-06-06 Alan Modra + + * targets.c (bfd_target): Make ar_max_namelen an unsigned char. + Add match_priority. + * configure.in: Bump bfd version. + * elfcode.h (elf_object_p): Delete hacks preventing match of + EM_NONE and ELFOSABI_NONE targets when a better match exists. + * elfxx-target.h (elf_match_priority): Define and use. + * format.c (bfd_check_format_matches): Use target match_priority + to choose best of multiple matching targets. In cases with multiple + matches rerun _bfd_check_format if we don't choose the last match. + * aout-adobe.c, * aout-arm.c, * aout-target.h, * aout-tic30.c, + * binary.c, * bout.c, * coff-alpha.c, * coff-i386.c, * coff-i860.c, + * coff-i960.c, * coff-ia64.c, * coff-mips.c, * coff-or32.c, + * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic30.c, + * coff-tic54x.c, * coff-x86_64.c, * coff64-rs6000.c, * coffcode.h, + * i386msdos.c, * i386os9k.c, * ieee.c, * ihex.c, * mach-o-target.c, + * mipsbsd.c, * mmo.c, * nlm-target.h, * oasys.c, * pdp11.c, + * pe-mips.c, * pef.c, * plugin.c, * ppcboot.c, * som.c, * srec.c, + * tekhex.c, * trad-core.c, * verilog.c, * versados.c, * vms-alpha.c, + * vms-lib.c, * xsym.c: Init match_priority field. + * configure: Regenerate. + * bfd-in2.h: Regenerate. + +2011-06-04 H.J. Lu + + PR ld/12842 + * elfcode.h (elf_object_p): Revert the last change. + +2011-06-04 Alan Modra + + * archures.c (bfd_arch_get_compatible): If one arch is unknown, + return the other arch. + * elfcode.h (elf_object_p): Allow explicit match to generic ELF + target. + +2011-06-03 Bertram Felgenhauer + + PR ld/12682 + * hash.c (higher_primer_number): Add more, small, prime numbers. + (bfd_hash_set_default_size): Likewise. + +2011-06-02 Nick Clifton + + * coff-mcore.c: Fix spelling typo. + * coff-stgo32.c: Likewise. + * elf32-arm.c: Likewise. + * elf32-avr.c: Likewise. + * elf-m68hc1x.c: Likewise. + * elf32-mcore.c: Likewise. + * elf32-mep.c: Likewise. + * elf32-mt.c: Likewise. + * elf32-ppc.c: Likewise. + * elf32-xtensa.c: Likewise. + * elf64-ppc.c: Likewise. + * elfxx-mips.c: Likewise. + * netbsd.h: Likewise. + * nlmcode.h: Likewise. + * vms-alpha.c: Likewise. + * po/bfd.pot: Regenerate. + * po/SRC-POTFILES.in: Regenerate. + +2011-06-01 DJ Delorie + + * config.bfd: Add bfd_elf32_rx_be_ns_vec. + * target.c: Likewise. + * configure.in: Likewise. + * configure.in: Regenerate. + * elf32-rx.c: Add elf32-rx-be-ns target. + (rx_elf_object_p): Never allow the be-ns target by default, + only allow it if the user requests it. + +2011-06-01 H.J. Lu + + * elf32-i386.c (elf_i386_size_dynamic_sections): Properly warn + relocation in readonly section in a shared object. + * elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise. + +2011-05-31 Nick Clifton + + * archive.c (adjust_relative_path): Fix comment to prevent it + corrupting the auto-generated bfd.h. + +2011-05-31 Paul Brook + + * elf32-arm.c (elf32_arm_final_link_relocate): Only do bl conversion + for known functions. + (elf32_arm_swap_symbol_in): Only set ST_BRANCH_TO_ARM for function + symbols. + +2011-05-31 Paul Brook + + * elf32-arm.c (arm_stub_is_thumb): Add + arm_stub_long_branch_v4t_thumb_tls_pic. + (elf32_arm_final_link_relocate): TLS stubs are always ARM. + Handle Thumb stubs. + +2011-05-27 Nick Clifton + + PR binutils/12710 + * archive.c (_bfd_get_elt_at_filepos): Set correct error value if + unable to read a file pointed to by an entry in a thin archive. + (adjust_relative_path): Use lrealpath to canonicalize paths. + Handle the case where the reference path is above the current + path in the directory tree. + +2011-05-26 H.J. Lu + + PR ld/12809 + * elf64-x86-64.c (elf_x86_64_relocate_section): Handle + R_X86_64_TPOFF64 in executable. + +2011-05-26 Alan Modra + + * elf-bfd.h (SYMBOL_REFERENCES_LOCAL): Remove most of comment. + * elflink.c (_bfd_elf_symbol_refs_local_p): Expand + local_protected comment. + +2011-05-25 Tristan Gingold + + * configure.in (bfd_elf32_ia64_big_vec, bfd_elf32_ia64_hpux_big_vec) + (bfd_elf64_ia64_big_vec, bfd_elf64_ia64_hpux_big_vec) + (bfd_elf64_ia64_little_vec, bfd_elf64_ia64_vms_vec): Add elfxx-ia64.lo + * Makefile.am (BFD64_BACKENDS): Add elfxx-ia64.lo + (BFD64_BACKENDS_CFILES): Add elfxx-ia64.c + (elf32-ia64.c): Created from elfnn-ia64.c + (elf64-ia64.c): Likewise. + * elfxx-ia64.h: New file. + * elfxx-ia64.c: Split with elfnn-ia64.c. Keep only the following + functions.Includes elfxx-ia64.h. + (elfNN_ia64_reloc): Renames to ia64_elf_reloc. Adjust error message. + (IA64_HOWTO): Adjust. + (lookup_howto): Renames to ia64_elf_lookup_howto. Make it public. + (elfNN_ia64_reloc_type_lookup): Renames to + ia64_elf_reloc_type_lookup. Make it public. Adjust calls. + (elfNN_ia64_reloc_name_lookup): Renames to + ia64_elf_reloc_name_lookup. Make it public. + (elfNN_ia64_relax_br): Renames to ia64_elf_relax_br. Make it public. + (elfNN_ia64_relax_brl): Renames to ia64_elf_relax_brl. Make it + public. + (elfNN_ia64_relax_ldxmov): Renames to ia64_elf_relax_ldxmov. + Move it and make it public. Move prototype to elfxx-ia64.h + (elfNN_ia64_install_value): Renames to ia64_elf_install_value. + Move prototype to elfxx-ia64.h + * elfnn-ia64.c: New file, split from elfxx-ia64.c. + (elfNN_ia64_info_to_howto): Adjust calls. + (elfNN_ia64_relax_section): Adjust calls. + (count_dyn_reloc): Fix typo. + (elfNN_ia64_relocate_section): Adjust calls. + (elfNN_ia64_finish_dynamic_symbol): Likewise. + (bfd_elfNN_bfd_reloc_type_lookup) + (bfd_elfNN_bfd_reloc_name_lookup): Adjust macros. + * configure: Regenerate. + * Makefile.in: Regenerate. + +2011-05-23 DJ Delorie + + * elf32-rx.c (rx_elf_object_p): When reading an RX object in, undo + the vma/lma swapping done in elf32_rx_modify_program_headers. + +2011-05-23 Nick Clifton + + * elf-m10300.c (mn10300_elf_mkobject): New function. + (bfd_elf32_mkobject): Define. + +2011-05-23 Alan Modra + + * elf-bfd.h: Comment typo fix. + * elf32-ppc.c (struct ppc_elf_dyn_relocs): Delete. Replace with + struct elf_dyn_relocs throughout. + * elf64-ppc.c (struct ppc_dyn_relocs): Likewise. + +2011-05-23 Alan Modra + + * elf32-frv.c: Use info->callbacks->einfo throughout file in linker + functions rather than warning callback or _bfd_error_handler. + * elf32-ppc.c: Likewise. + * elf64-ppc.c: Likewise. + * elf32-ppc.c (ppc_elf_tls_optimize): Use %H in __tls_get_addr lost + arg error. + * elf64-ppc.c (ppc64_elf_tls_optimize): Likewise. + +2011-05-23 Alan Modra + + PR 12763 + * elf.c (assign_file_positions_for_load_sections): Set sh_offset for + .tbss, and page align same for all SHT_NOBITS sections. + +2011-05-21 Alan Modra + + PR 12763 + * elf.c (_bfd_elf_make_section_from_shdr): Set up TLS section LMAs + from PT_TLS header. + (_bfd_elf_map_sections_to_segments): Don't create a final PT_LOAD + segment if just for .tbss. + (assign_file_positions_for_load_sections): Don't report "can't + allocate in segment" errors for .tbss. + (assign_file_positions_for_non_load_sections): Don't set p_filesz + from SHT_NOBITS section filepos. + +2011-05-20 Bernd Schmidt + + * elf32-tic6x.c (elf32_tic6x_howto_table): Add entries for + R_C6000_PCR_H16 and R_C6000_PCR_L16. + (elf32_tic6x_relocate_section): Handle them. + +2011-05-18 Nick Clifton + + PR ld/12761 + * elflink.c (elf_link_add_object_symbols): Process .gnu.warning + sections when building shared libraries. + +2011-05-18 Rafał Krypa + + PR ld/12778 + * elf32-arm.c (elf32_arm_gc_sweep_hook): Use the computed dynamic + reloc pointer. + +2011-05-18 Tristan Gingold + + * xcofflink.c (xcoff_link_add_symbols): Handle C_DWARF symbols. + (xcoff_sweep): Always keep dwarf sections. + (xcoff_link_input_bfd): Handle dwarf symbols and sections. + +2011-05-18 Tristan Gingold + + * libxcoff.h (struct xcoff_dwsect_name): New type. + (XCOFF_DWSECT_NBR_NAMES): New macro. + (xcoff_dwsect_names): Declare. + * coffcode.h (sec_to_styp_flags): Handle xcoff dwarf sections. + (styp_to_sec_flags): Ditto. + (coff_new_section_hook): Ditto. + (coff_slurp_symbol_table): Handle C_DWARF and C_INFO. + * coff-rs6000.c (xcoff_dwsect_name): New variable. + +2011-05-17 Tomohiro Kashiwada + + PR ld/12759 + * elf32-rx.c (ignore_lma): New variable. + (bfd_elf32_rx_set_target_flags): Add ignore_lma parameter. + (rx_modify_program_headers): Only copy the LMA into the VMA if + ignore_lma is true. + +2011-05-17 Alan Modra + + PR ld/12760 + * coff-aux.c (coff_m68k_aux_link_add_one_symbol): Adjust "notice" call. + * elflink.c (elf_link_add_object_symbols): Likewise. + * linker.c (_bfd_generic_link_add_one_symbol): Likewise. + +2011-05-16 Alan Modra + + * linker.c (_bfd_generic_link_add_one_symbol): Don't init u.undef.weak. + +2011-05-15 Richard Sandiford + + * elfxx-mips.c (_bfd_mips_elf_check_relocs): Record both local and + global GOT entries for GOT_PAGE relocations against global symbols. + +2011-05-13 Bernd Schmidt + + * config.bfd (tic6x-*-elf, tic6x-*-uclinux): New. + (tic6x-*-*): Replaced by these. + * elf32-tic6x.c (elf32_tic6x_set_osabi): New static function. + (elf32_tic6x_check_relocs): Create dynamic sections if -shared. + (elf_backend_relocs_compatible, elf_backend_post_process_headers): + Define. + (elf32_bed, TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, TARGET_BIG_SYM, + TARGET_BIG_NAME, ELF_OSABI): Redefine twice, and include + "elf32-target.h" two more times. + * configure.in: Handle bfd_elf32_tic6x_linux_be_vec, + bfd_elf32_tic6x_linux_le_vec, bfd_elf32_tic6x_elf_be_vec and + bfd_elf32_tic6x_elf_le_vec. + * configure: Regenerate. + +2011-05-13 Jan Beulich + + * config.bfd: Add targets x86_64-*-pe and x86_64-*-pep. + +2011-05-12 Jan Kratochvil + + * config.in: Regenerated. + * configure: Regenerated. + * configure.in: New tests for HAVE_PRPSINFO_T_PR_PID, + HAVE_PRPSINFO32_T_PR_PID, HAVE_PSINFO_T_PR_PID and + HAVE_PSINFO32_T_PR_PID. + * elf.c (elfcore_grok_psinfo): Protect reading psinfo.pr_pid by + HAVE_PRPSINFO_T_PR_PID, HAVE_PRPSINFO32_T_PR_PID, HAVE_PSINFO_T_PR_PID + and HAVE_PSINFO32_T_PR_PID. + * hosts/x86-64linux.h (HAVE_PRPSINFO32_T_PR_PID): New redefinition. + +2011-05-10 Jan Kratochvil + + * elf.c (elfcore_grok_psinfo): Initialize CORE_PID for both native and + 32bit psinfo. + * elf32-ppc.c (ppc_elf_grok_psinfo): Initialize core_pid. + * elf64-ppc.c (ppc64_elf_grok_psinfo): Likewise. + +2011-05-09 Paul Brook + + * bfd-in.h (elf32_tic6x_fix_exidx_coverage): Add prototype. + * bfd-in2.h: Regenerate. + * elf32-tic6x.c: Include limits.h. + (tic6x_unwind_edit_type, tic6x_unwind_table_edit, + _tic6x_elf_section_data): New. + (elf32_tic6x_section_data): Define. + (elf32_tic6x_new_section_hook): Allocate target specific data. + (elf32_tic6x_add_unwind_table_edit): New function. + (get_tic6x_elf_section_data, elf32_tic6x_adjust_exidx_size, + elf32_tic6x_insert_cantunwind_after, elf32_tic6x_add_low31, + elf32_tic6x_copy_exidx_entry): New functions. + (elf_backend_write_section): Define. + +2011-05-09 Paul Brook + + * elf32-tic6x.c (is_tic6x_elf_unwind_section_name, + elf32_tic6x_fake_sections): New functions. + (elf_backend_fake_sections): Define. + +2011-05-09 Paul Brook + + * elf32-tic6x.c (elf32_tic6x_gc_mark_extra_sections): New function. + (elf_backend_gc_mark_extra_sections): Define. + +2011-05-07 Dave Korn + + PR ld/12365 + * cofflink.c (bfd_coff_link_input_bfd): Check for and warn about + references to symbols defined in discarded sections. + +2011-05-07 Dave Korn + + PR ld/12365 + * coffgen.c (coff_write_symbol): Assume input section is its own + output section if output_section member not set. + (coff_write_alien_symbol): Likewise. + +2011-05-07 H.J. Lu + + PR ld/12730 + * elf.c (_bfd_elf_section_offset): Check SEC_ELF_REVERSE_COPY. + + * elflink.c (elf_link_input_bfd): Reverse copy .ctors/.dtors + sections if needed. + + * section.c (SEC_ELF_REVERSE_COPY): New. + * bfd-in2.h: Regenerated. + +2011-05-07 Anders Kaseorg + + PR 12739 + * libbfd.c (bfd_get_8, bfd_get_signed_8): Use const cast. + * bfd-in2.h: Regenerate. + +2011-05-06 Tristan Gingold + + * vms-alpha.c (evax_section_flags): Remove SEC_IN_MEMORY. + (_bfd_vms_slurp_egsd): Rename old_flags to vms_flags. Handle + any code section. Add comments. + (alpha_vms_object_p): Use void * instead of PTR. + (alpha_vms_create_eisd_for_section): Fix test for setting DZRO. + (build_module_list): Guard against no DST section. Add comments. + (alpha_vms_link_output_symbol): Discard undefined symbols. + (alpha_vms_get_section_contents): Simply memcpy if the section was + already loaded. Fix typo. + (vms_new_section_hook): Use void * instead of PTR. + (vms_alpha_vec): Ditto. + +2011-05-06 Richard Sandiford + + * elf32-arm.c (cortex_a8_erratum_scan): If the stub is a Thumb + branch to a PLT entry, redirect it to the PLT's Thumb entry point. + +2011-05-05 Bernd Schmidt + + * elf32-tic6x.c (elf32_tic6x_final_link): New function. + (elf32_tic6x_merge_attributes): Do not warn for PID or PIC + mismatch. Choose the lower of the two values. + (bfd_elf32_bfd_final_link): New macro. + +2011-04-28 Tristan Gingold + + * coff-rs6000.c (_bfd_xcoff_swap_aux_in): Adjust for x_file. + (bfd_xcoff_swap_aux_out): Ditto. + * coff64-rs6000.c (_bfd_xcoff64_swap_aux_in): Ditto. + (bfd_xcoff64_swap_aux_out): Ditto. + +2011-05-04 Alan Modra + + PR ld/12727 + * elf64-ppc.c (ppc_build_one_stub ): Clear + was_undefined on dot-symbols. + +2011-05-03 Paul Brook + + + * elf32-tic6x.c (elf32_tic6x_howto_table, + elf32_tic6x_howto_table_rel, (elf32_tic6x_gc_sweep_hook, + elf32_tic6x_relocate_section, elf32_tic6x_check_relocs): + Add R_C6000_EHTYPE. + +2011-05-01 Alan Modra + + PR ld/12718 + * elf32-i386.c (elf_i386_check_relocs): Ensure dynobj set before + creating ifunc sections. + * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. + +2011-04-30 H.J. Lu + + * elf64-x86-64.c (elf_x86_64_merge_symbol): Correct parameter + names. + +2011-04-28 Tom Tromey + + * bfdio.c (memory_bstat): Pass correct size to memset. + +2011-04-28 Mike Frysinger + + * dwarf2.c (dwarf_debug_sections): Mark const. + * elf.c (special_sections): Likewise. + * libbfd-in.h (dwarf_debug_sections): Likewise. + * libbfd.h: Regenerate. + +2011-04-26 Kai Tietz + + * coffcode.h (sec_to_styp_flags): Allow linkonce for + debugging sections. + +2011-04-26 Tristan Gingold + + * coff64-rs6000.c: Convert to ISO-C. Remove PARAMS and PTR macros. + +2011-04-24 Alan Modra + + PR ld/12365 + PR ld/12696 + * coff-aux.c (coff_m68k_aux_link_add_one_symbol): Update "notice" call. + * linker.c (_bfd_link_hash_newfunc): Clear bitfields. + (_bfd_generic_link_add_one_symbol): Update "notice" call. + * elflink.c (_bfd_elf_merge_symbol): Don't skip weak redefs when + it is a redef of an IR symbol in a real BFD. + +2011-04-22 H.J. Lu + + * elf32-i386.c (elf_i386_readonly_dynrelocs): Warn relocation + in readonly section in a shared object. + (elf_i386_size_dynamic_sections): Likewise. + * elf64-x86-64.c (elf_x86_64_readonly_dynrelocs): Likewise. + (elf_x86_64_size_dynamic_sections): Likewise. + +2011-04-21 H.J. Lu + + PR ld/12694 + * elf32-i386.c (elf_i386_readonly_dynrelocs): Skip local IFUNC + symbols. + * elf64-x86-64.c (elf_x86_64_readonly_dynrelocs): Likewise. + +2011-04-21 H.J. Lu + + * elf32-i386.c (elf_i386_finish_dynamic_symbol): Return false + on dynamic symbol error. + * elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Likewise. + 2011-04-20 Tristan Gingold * config.bfd (alpha*-*-*vms*, ia64*-*-*vms*): Define targ_selvecs. diff --git a/bfd/Makefile.am b/bfd/Makefile.am index c27c16d..ea4fd28 100644 --- a/bfd/Makefile.am +++ b/bfd/Makefile.am @@ -4,7 +4,7 @@ AUTOMAKE_OPTIONS = 1.11 no-dist foreign ACLOCAL_AMFLAGS = -I . -I .. -I ../config # Uncomment the following line when doing a release. -# RELEASE=y +RELEASE=y INCDIR = $(srcdir)/../include CSEARCH = -I. -I$(srcdir) -I$(INCDIR) @@ -91,6 +91,7 @@ ALL_MACHINES = \ cpu-i370.lo \ cpu-i386.lo \ cpu-l1om.lo \ + cpu-k1om.lo \ cpu-i860.lo \ cpu-i960.lo \ cpu-ia64.lo \ @@ -132,6 +133,8 @@ ALL_MACHINES = \ cpu-tic54x.lo \ cpu-tic6x.lo \ cpu-tic80.lo \ + cpu-tilegx.lo \ + cpu-tilepro.lo \ cpu-v850.lo \ cpu-vax.lo \ cpu-w65.lo \ @@ -163,6 +166,7 @@ ALL_MACHINES_CFILES = \ cpu-i370.c \ cpu-i386.c \ cpu-l1om.c \ + cpu-k1om.c \ cpu-i860.c \ cpu-i960.c \ cpu-ia64.c \ @@ -204,6 +208,8 @@ ALL_MACHINES_CFILES = \ cpu-tic54x.c \ cpu-tic6x.c \ cpu-tic80.c \ + cpu-tilegx.c \ + cpu-tilepro.c \ cpu-v850.c \ cpu-vax.c \ cpu-w65.c \ @@ -319,6 +325,8 @@ BFD32_BACKENDS = \ elf32-sparc.lo \ elf32-spu.lo \ elf32-tic6x.lo \ + elf32-tilegx.lo \ + elf32-tilepro.lo \ elf32-v850.lo \ elf32-vax.lo \ elf32-xc16x.lo \ @@ -328,6 +336,7 @@ BFD32_BACKENDS = \ elflink.lo \ elfxx-mips.lo \ elfxx-sparc.lo \ + elfxx-tilegx.lo \ epoc-pe-arm.lo \ epoc-pei-arm.lo \ hp300bsd.lo \ @@ -500,6 +509,8 @@ BFD32_BACKENDS_CFILES = \ elf32-sparc.c \ elf32-spu.c \ elf32-tic6x.c \ + elf32-tilegx.c \ + elf32-tilepro.c \ elf32-v850.c \ elf32-vax.c \ elf32-xc16x.c \ @@ -509,6 +520,7 @@ BFD32_BACKENDS_CFILES = \ elflink.c \ elfxx-mips.c \ elfxx-sparc.c \ + elfxx-tilegx.c \ epoc-pe-arm.c \ epoc-pei-arm.c \ hp300bsd.c \ @@ -602,9 +614,11 @@ BFD64_BACKENDS = \ elf64-s390.lo \ elf64-sh64.lo \ elf64-sparc.lo \ + elf64-tilegx.lo \ elf64-x86-64.lo \ elf64.lo \ elfn32-mips.lo \ + elfxx-ia64.lo \ mach-o-x86-64.lo \ mmo.lo \ nlm32-alpha.lo \ @@ -634,9 +648,11 @@ BFD64_BACKENDS_CFILES = \ elf64-s390.c \ elf64-sh64.c \ elf64-sparc.c \ + elf64-tilegx.c \ elf64-x86-64.c \ elf64.c \ elfn32-mips.c \ + elfxx-ia64.c \ mach-o-x86-64.c \ mmo.c \ nlm32-alpha.c \ @@ -845,14 +861,14 @@ elf64-target.h : elfxx-target.h sed -e s/NN/64/g < $(srcdir)/elfxx-target.h > elf64-target.new mv -f elf64-target.new elf64-target.h -elf32-ia64.c : elfxx-ia64.c +elf32-ia64.c : elfnn-ia64.c rm -f elf32-ia64.c - sed -e s/NN/32/g < $(srcdir)/elfxx-ia64.c > elf32-ia64.new + sed -e s/NN/32/g < $(srcdir)/elfnn-ia64.c > elf32-ia64.new mv -f elf32-ia64.new elf32-ia64.c -elf64-ia64.c : elfxx-ia64.c +elf64-ia64.c : elfnn-ia64.c rm -f elf64-ia64.c - sed -e s/NN/64/g < $(srcdir)/elfxx-ia64.c > elf64-ia64.new + sed -e s/NN/64/g < $(srcdir)/elfnn-ia64.c > elf64-ia64.new mv -f elf64-ia64.new elf64-ia64.c peigen.c : peXXigen.c diff --git a/bfd/Makefile.in b/bfd/Makefile.in index 80b08af..741809c 100644 --- a/bfd/Makefile.in +++ b/bfd/Makefile.in @@ -320,7 +320,7 @@ AUTOMAKE_OPTIONS = 1.11 no-dist foreign ACLOCAL_AMFLAGS = -I . -I .. -I ../config # Uncomment the following line when doing a release. -# RELEASE=y +RELEASE = y INCDIR = $(srcdir)/../include CSEARCH = -I. -I$(srcdir) -I$(INCDIR) SUBDIRS = doc po @@ -390,6 +390,7 @@ ALL_MACHINES = \ cpu-i370.lo \ cpu-i386.lo \ cpu-l1om.lo \ + cpu-k1om.lo \ cpu-i860.lo \ cpu-i960.lo \ cpu-ia64.lo \ @@ -431,6 +432,8 @@ ALL_MACHINES = \ cpu-tic54x.lo \ cpu-tic6x.lo \ cpu-tic80.lo \ + cpu-tilegx.lo \ + cpu-tilepro.lo \ cpu-v850.lo \ cpu-vax.lo \ cpu-w65.lo \ @@ -462,6 +465,7 @@ ALL_MACHINES_CFILES = \ cpu-i370.c \ cpu-i386.c \ cpu-l1om.c \ + cpu-k1om.c \ cpu-i860.c \ cpu-i960.c \ cpu-ia64.c \ @@ -503,6 +507,8 @@ ALL_MACHINES_CFILES = \ cpu-tic54x.c \ cpu-tic6x.c \ cpu-tic80.c \ + cpu-tilegx.c \ + cpu-tilepro.c \ cpu-v850.c \ cpu-vax.c \ cpu-w65.c \ @@ -619,6 +625,8 @@ BFD32_BACKENDS = \ elf32-sparc.lo \ elf32-spu.lo \ elf32-tic6x.lo \ + elf32-tilegx.lo \ + elf32-tilepro.lo \ elf32-v850.lo \ elf32-vax.lo \ elf32-xc16x.lo \ @@ -628,6 +636,7 @@ BFD32_BACKENDS = \ elflink.lo \ elfxx-mips.lo \ elfxx-sparc.lo \ + elfxx-tilegx.lo \ epoc-pe-arm.lo \ epoc-pei-arm.lo \ hp300bsd.lo \ @@ -800,6 +809,8 @@ BFD32_BACKENDS_CFILES = \ elf32-sparc.c \ elf32-spu.c \ elf32-tic6x.c \ + elf32-tilegx.c \ + elf32-tilepro.c \ elf32-v850.c \ elf32-vax.c \ elf32-xc16x.c \ @@ -809,6 +820,7 @@ BFD32_BACKENDS_CFILES = \ elflink.c \ elfxx-mips.c \ elfxx-sparc.c \ + elfxx-tilegx.c \ epoc-pe-arm.c \ epoc-pei-arm.c \ hp300bsd.c \ @@ -903,9 +915,11 @@ BFD64_BACKENDS = \ elf64-s390.lo \ elf64-sh64.lo \ elf64-sparc.lo \ + elf64-tilegx.lo \ elf64-x86-64.lo \ elf64.lo \ elfn32-mips.lo \ + elfxx-ia64.lo \ mach-o-x86-64.lo \ mmo.lo \ nlm32-alpha.lo \ @@ -935,9 +949,11 @@ BFD64_BACKENDS_CFILES = \ elf64-s390.c \ elf64-sh64.c \ elf64-sparc.c \ + elf64-tilegx.c \ elf64-x86-64.c \ elf64.c \ elfn32-mips.c \ + elfxx-ia64.c \ mach-o-x86-64.c \ mmo.c \ nlm32-alpha.c \ @@ -1256,6 +1272,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ia64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ip2k.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-iq2000.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-k1om.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-l1om.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-lm32.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m10200.Plo@am__quote@ @@ -1293,6 +1310,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tic54x.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tic6x.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tic80.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tilegx.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tilepro.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-v850.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-vax.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-w65.Plo@am__quote@ @@ -1369,6 +1388,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-sparc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-spu.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-tic6x.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-tilegx.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-tilepro.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-v850.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-vax.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-xc16x.Plo@am__quote@ @@ -1385,12 +1406,15 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sh64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elflink.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfn32-mips.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-ia64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-mips.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-sparc.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-tilegx.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epoc-pe-arm.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epoc-pei-arm.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/format.Plo@am__quote@ @@ -1895,14 +1919,14 @@ elf64-target.h : elfxx-target.h sed -e s/NN/64/g < $(srcdir)/elfxx-target.h > elf64-target.new mv -f elf64-target.new elf64-target.h -elf32-ia64.c : elfxx-ia64.c +elf32-ia64.c : elfnn-ia64.c rm -f elf32-ia64.c - sed -e s/NN/32/g < $(srcdir)/elfxx-ia64.c > elf32-ia64.new + sed -e s/NN/32/g < $(srcdir)/elfnn-ia64.c > elf32-ia64.new mv -f elf32-ia64.new elf32-ia64.c -elf64-ia64.c : elfxx-ia64.c +elf64-ia64.c : elfnn-ia64.c rm -f elf64-ia64.c - sed -e s/NN/64/g < $(srcdir)/elfxx-ia64.c > elf64-ia64.new + sed -e s/NN/64/g < $(srcdir)/elfnn-ia64.c > elf64-ia64.new mv -f elf64-ia64.new elf64-ia64.c peigen.c : peXXigen.c diff --git a/bfd/aix386-core.c b/bfd/aix386-core.c index 634d997..121d623 100644 --- a/bfd/aix386-core.c +++ b/bfd/aix386-core.c @@ -2,7 +2,7 @@ This was based on trad-core.c, which was written by John Gilmore of Cygnus Support. Copyright 1988, 1989, 1991, 1992, 1993, 1994, 1996, 1998, 1999, 2000, - 2001, 2002, 2004, 2005, 2006, 2007 + 2001, 2002, 2004, 2005, 2006, 2007, 2010, 2011 Free Software Foundation, Inc. Written by Minh Tran-Le . Converted to back end form by Ian Lance Taylor . @@ -242,6 +242,7 @@ const bfd_target aix386_core_vec = { 0, /* leading underscore */ ' ', /* ar_pad_char */ 16, /* ar_max_namelen */ + 0, /* match priority. */ NO_GET64, NO_GETS64, NO_PUT64, NO_GET, NO_GETS, NO_PUT, NO_GET, NO_GETS, NO_PUT, /* data */ diff --git a/bfd/aout-adobe.c b/bfd/aout-adobe.c index ca0e003..c8331d8 100644 --- a/bfd/aout-adobe.c +++ b/bfd/aout-adobe.c @@ -1,6 +1,6 @@ /* BFD back-end for a.out.adobe binaries. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, - 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009 + 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2011 Free Software Foundation, Inc. Written by Cygnus Support. Based on bout.c. @@ -459,6 +459,7 @@ aout_adobe_sizeof_headers (bfd *ignore_abfd ATTRIBUTE_UNUSED, #define aout_32_get_section_contents_in_window _bfd_generic_get_section_contents_in_window #define aout_32_bfd_relax_section bfd_generic_relax_section #define aout_32_bfd_gc_sections bfd_generic_gc_sections +#define aout_32_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define aout_32_bfd_merge_sections bfd_generic_merge_sections #define aout_32_bfd_is_group_section bfd_generic_is_group_section #define aout_32_bfd_discard_group bfd_generic_discard_group @@ -487,6 +488,7 @@ const bfd_target a_out_adobe_vec = '_', /* Symbol leading char. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, diff --git a/bfd/aout-arm.c b/bfd/aout-arm.c index 9a5d155..fd93603 100644 --- a/bfd/aout-arm.c +++ b/bfd/aout-arm.c @@ -1,6 +1,6 @@ /* BFD back-end for raw ARM a.out binaries. Copyright 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, - 2007, 2009, 2010 Free Software Foundation, Inc. + 2007, 2009, 2010, 2011 Free Software Foundation, Inc. Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org) This file is part of BFD, the Binary File Descriptor library. @@ -477,6 +477,7 @@ const bfd_target aout_arm_little_vec = MY_symbol_leading_char, AR_PAD_CHAR, /* AR_pad_char. */ 15, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* Data. */ @@ -516,8 +517,9 @@ const bfd_target aout_arm_big_vec = HAS_SYMS | HAS_LOCALS | DYNAMIC | WP_TEXT | D_PAGED), (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_CODE | SEC_DATA), MY_symbol_leading_char, - AR_PAD_CHAR, /* AR_pad_char. */ - 15, /* AR_max_namelen. */ + AR_PAD_CHAR, /* AR_pad_char. */ + 15, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/bfd/aout-target.h b/bfd/aout-target.h index 5162494..f6e8bd2 100644 --- a/bfd/aout-target.h +++ b/bfd/aout-target.h @@ -1,6 +1,6 @@ /* Define a target vector and some small routines for a variant of a.out. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2009, 2010 + 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -486,6 +486,9 @@ MY_bfd_final_link (bfd *abfd, struct bfd_link_info *info) #ifndef MY_bfd_gc_sections #define MY_bfd_gc_sections bfd_generic_gc_sections #endif +#ifndef MY_bfd_lookup_section_flags +#define MY_bfd_lookup_section_flags bfd_generic_lookup_section_flags +#endif #ifndef MY_bfd_merge_sections #define MY_bfd_merge_sections bfd_generic_merge_sections #endif @@ -627,6 +630,7 @@ const bfd_target MY (vec) = MY_symbol_leading_char, AR_PAD_CHAR, /* AR_pad_char. */ 15, /* AR_max_namelen. */ + 0, /* match priority. */ #ifdef TARGET_IS_BIG_ENDIAN_P bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, diff --git a/bfd/aout-tic30.c b/bfd/aout-tic30.c index 5d5c7e2..0b01177 100644 --- a/bfd/aout-tic30.c +++ b/bfd/aout-tic30.c @@ -1,6 +1,6 @@ /* BFD back-end for TMS320C30 a.out binaries. Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2009, - 2010 + 2010, 2011 Free Software Foundation, Inc. Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au) @@ -944,6 +944,9 @@ tic30_aout_set_arch_mach (bfd *abfd, #ifndef MY_bfd_gc_sections #define MY_bfd_gc_sections bfd_generic_gc_sections #endif +#ifndef MY_bfd_lookup_section_flags +#define MY_bfd_lookup_section_flags bfd_generic_lookup_section_flags +#endif #ifndef MY_bfd_merge_sections #define MY_bfd_merge_sections bfd_generic_merge_sections #endif @@ -1080,6 +1083,7 @@ const bfd_target tic30_aout_vec = MY_symbol_leading_char, AR_PAD_CHAR, /* AR_pad_char. */ 15, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/bfd/aoutx.h b/bfd/aoutx.h index ec0bdf0..1efb715 100644 --- a/bfd/aoutx.h +++ b/bfd/aoutx.h @@ -1,6 +1,6 @@ /* BFD semi-generic back-end for a.out binaries. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -3551,8 +3551,9 @@ aout_link_includes_newfunc (struct bfd_hash_entry *entry, object. */ static bfd_boolean -aout_link_write_other_symbol (struct aout_link_hash_entry *h, void * data) +aout_link_write_other_symbol (struct bfd_hash_entry *bh, void *data) { + struct aout_link_hash_entry *h = (struct aout_link_hash_entry *) bh; struct aout_final_link_info *finfo = (struct aout_final_link_info *) data; bfd *output_bfd; int type; @@ -3719,7 +3720,7 @@ aout_link_reloc_link_order (struct aout_final_link_info *finfo, symbol. */ h->indx = -2; h->written = FALSE; - if (! aout_link_write_other_symbol (h, (void *) finfo)) + if (!aout_link_write_other_symbol (&h->root.root, finfo)) return FALSE; r_index = h->indx; } @@ -4077,8 +4078,8 @@ aout_link_input_section_std (struct aout_final_link_info *finfo, { h->indx = -2; h->written = FALSE; - if (! aout_link_write_other_symbol (h, - (void *) finfo)) + if (!aout_link_write_other_symbol (&h->root.root, + finfo)) return FALSE; } r_index = h->indx; @@ -4419,8 +4420,8 @@ aout_link_input_section_ext (struct aout_final_link_info *finfo, { h->indx = -2; h->written = FALSE; - if (! aout_link_write_other_symbol (h, - (void *) finfo)) + if (!aout_link_write_other_symbol (&h->root.root, + finfo)) return FALSE; } r_index = h->indx; @@ -5468,7 +5469,7 @@ NAME (aout, final_link) (bfd *abfd, h = aout_link_hash_lookup (aout_hash_table (info), "__DYNAMIC", FALSE, FALSE, FALSE); if (h != NULL) - aout_link_write_other_symbol (h, &aout_info); + aout_link_write_other_symbol (&h->root.root, &aout_info); } /* The most time efficient way to do the link would be to read all @@ -5542,9 +5543,9 @@ NAME (aout, final_link) (bfd *abfd, } /* Write out any symbols that we have not already written out. */ - aout_link_hash_traverse (aout_hash_table (info), - aout_link_write_other_symbol, - (void *) &aout_info); + bfd_hash_traverse (&info->hash->table, + aout_link_write_other_symbol, + &aout_info); /* Now handle any relocs we were asked to create by the linker. These did not come from any input file. We must do these after diff --git a/bfd/archive.c b/bfd/archive.c index 5de7a3e..3e333c7 100644 --- a/bfd/archive.c +++ b/bfd/archive.c @@ -343,6 +343,7 @@ static bfd * _bfd_find_nested_archive (bfd *arch_bfd, const char *filename) { bfd *abfd; + const char *target; for (abfd = arch_bfd->nested_archives; abfd != NULL; @@ -351,7 +352,10 @@ _bfd_find_nested_archive (bfd *arch_bfd, const char *filename) if (filename_cmp (filename, abfd->filename) == 0) return abfd; } - abfd = bfd_openr (filename, NULL); + target = NULL; + if (!arch_bfd->target_defaulted) + target = arch_bfd->xvec->name; + abfd = bfd_openr (filename, target); if (abfd) { abfd->archive_next = arch_bfd->nested_archives; @@ -597,6 +601,8 @@ _bfd_get_elt_at_filepos (bfd *archive, file_ptr filepos) if (bfd_is_thin_archive (archive)) { + const char *target; + /* This is a proxy entry for an external file. */ if (! IS_ABSOLUTE_PATH (filename)) { @@ -628,7 +634,12 @@ _bfd_get_elt_at_filepos (bfd *archive, file_ptr filepos) } /* It's not an element of a nested archive; open the external file as a bfd. */ - n_nfd = bfd_openr (filename, NULL); + target = NULL; + if (!archive->target_defaulted) + target = archive->xvec->name; + n_nfd = bfd_openr (filename, target); + if (n_nfd == NULL) + bfd_set_error (bfd_error_malformed_archive); } else { @@ -717,6 +728,7 @@ bfd_generic_openr_next_archived_file (bfd *archive, bfd *last_file) else { unsigned int size = arelt_size (last_file); + filestart = last_file->proxy_origin; if (! bfd_is_thin_archive (archive)) filestart += size; @@ -750,7 +762,7 @@ bfd_generic_archive_p (bfd *abfd) if (strncmp (armag, ARMAG, SARMAG) != 0 && strncmp (armag, ARMAGB, SARMAG) != 0 && ! bfd_is_thin_archive (abfd)) - return 0; + return NULL; tdata_hold = bfd_ardata (abfd); @@ -781,7 +793,7 @@ bfd_generic_archive_p (bfd *abfd) return NULL; } - if (bfd_has_map (abfd)) + if (abfd->target_defaulted && bfd_has_map (abfd)) { bfd *first; @@ -1333,19 +1345,51 @@ normalize (bfd *abfd ATTRIBUTE_UNUSED, const char *file) } #endif -/* Adjust a relative path name based on the reference path. */ - +/* Adjust a relative path name based on the reference path. + For example: + + Relative path Reference path Result + ------------- -------------- ------ + bar.o lib.a bar.o + foo/bar.o lib.a foo/bar.o + bar.o foo/lib.a ../bar.o + foo/bar.o baz/lib.a ../foo/bar.o + bar.o ../lib.a /bar.o + ; ../bar.o ../lib.a bar.o + ; ../bar.o lib.a ../bar.o + foo/bar.o ../lib.a /foo/bar.o + bar.o ../../lib.a //bar.o + bar.o foo/baz/lib.a ../../bar.o + + Note - the semicolons above are there to prevent the BFD chew + utility from interpreting those lines as prototypes to put into + the autogenerated bfd.h header... + + Note - the string is returned in a static buffer. */ + static const char * adjust_relative_path (const char * path, const char * ref_path) { static char *pathbuf = NULL; - static int pathbuf_len = 0; - const char *pathp = path; - const char *refp = ref_path; - int element_count = 0; - int len; + static unsigned int pathbuf_len = 0; + const char *pathp; + const char *refp; + char * lpath; + char * rpath; + unsigned int len; + unsigned int dir_up = 0; + unsigned int dir_down = 0; char *newp; + char * pwd = getpwd (); + const char * down; + /* Remove symlinks, '.' and '..' from the paths, if possible. */ + lpath = lrealpath (path); + pathp = lpath == NULL ? path : lpath; + + rpath = lrealpath (ref_path); + refp = rpath == NULL ? ref_path : rpath; + /* Remove common leading path elements. */ for (;;) { @@ -1363,12 +1407,42 @@ adjust_relative_path (const char * path, const char * ref_path) refp = e2 + 1; } + len = strlen (pathp) + 1; /* For each leading path element in the reference path, insert "../" into the path. */ for (; *refp; ++refp) if (IS_DIR_SEPARATOR (*refp)) - ++element_count; - len = 3 * element_count + strlen (path) + 1; + { + /* PR 12710: If the path element is "../" then instead of + inserting "../" we need to insert the name of the directory + at the current level. */ + if (refp > ref_path + 1 + && refp[-1] == '.' + && refp[-2] == '.') + dir_down ++; + else + dir_up ++; + } + + /* If the lrealpath calls above succeeded then we should never + see dir_up and dir_down both being non-zero. */ + + len += 3 * dir_up; + + if (dir_down) + { + down = pwd + strlen (pwd) - 1; + + while (dir_down && down > pwd) + { + if (IS_DIR_SEPARATOR (*down)) + --dir_down; + } + BFD_ASSERT (dir_down == 0); + len += strlen (down) + 1; + } + else + down = NULL; if (len > pathbuf_len) { @@ -1377,19 +1451,26 @@ adjust_relative_path (const char * path, const char * ref_path) pathbuf_len = 0; pathbuf = (char *) bfd_malloc (len); if (pathbuf == NULL) - return path; + goto out; pathbuf_len = len; } newp = pathbuf; - while (element_count-- > 0) + while (dir_up-- > 0) { /* FIXME: Support Windows style path separators as well. */ strcpy (newp, "../"); newp += 3; } - strcpy (newp, pathp); + if (down) + sprintf (newp, "%s/%s", down, pathp); + else + strcpy (newp, pathp); + + out: + free (lpath); + free (rpath); return pathbuf; } @@ -1431,7 +1512,7 @@ _bfd_construct_extended_name_table (bfd *abfd, char **tabloc, bfd_size_type *tablen) { - unsigned int maxname = abfd->xvec->ar_max_namelen; + unsigned int maxname = ar_maxnamelen (abfd); bfd_size_type total_namelen = 0; bfd *current; char *strptr; @@ -1626,7 +1707,7 @@ _bfd_archive_bsd44_construct_extended_name_table (bfd *abfd, bfd_size_type *tablen, const char **name) { - unsigned int maxname = abfd->xvec->ar_max_namelen; + unsigned int maxname = ar_maxnamelen (abfd); bfd *current; *tablen = 0; diff --git a/bfd/archures.c b/bfd/archures.c index cd8500f..44850e7 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -1,6 +1,6 @@ /* BFD library support routines for architectures. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Hacked by John Gilmore and Steve Chamberlain of Cygnus Support. @@ -181,17 +181,22 @@ DESCRIPTION .#define bfd_mach_mipsisa32r2 33 .#define bfd_mach_mipsisa64 64 .#define bfd_mach_mipsisa64r2 65 +.#define bfd_mach_mips_micromips 96 . bfd_arch_i386, {* Intel 386 *} -.#define bfd_mach_i386_i386 1 -.#define bfd_mach_i386_i8086 2 -.#define bfd_mach_i386_i386_intel_syntax 3 -.#define bfd_mach_x64_32 32 -.#define bfd_mach_x64_32_intel_syntax 33 -.#define bfd_mach_x86_64 64 -.#define bfd_mach_x86_64_intel_syntax 65 +.#define bfd_mach_i386_intel_syntax (1 << 0) +.#define bfd_mach_i386_i8086 (1 << 1) +.#define bfd_mach_i386_i386 (1 << 2) +.#define bfd_mach_x86_64 (1 << 3) +.#define bfd_mach_x64_32 (1 << 4) +.#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax) +.#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax) +.#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax) . bfd_arch_l1om, {* Intel L1OM *} -.#define bfd_mach_l1om 66 -.#define bfd_mach_l1om_intel_syntax 67 +.#define bfd_mach_l1om (1 << 5) +.#define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax) +. bfd_arch_k1om, {* Intel K1OM *} +.#define bfd_mach_k1om (1 << 6) +.#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax) . bfd_arch_we32k, {* AT&T WE32xxx *} . bfd_arch_tahoe, {* CCI/Harris Tahoe *} . bfd_arch_i860, {* Intel 860 *} @@ -437,6 +442,10 @@ DESCRIPTION . bfd_arch_lm32, {* Lattice Mico32 *} .#define bfd_mach_lm32 1 . bfd_arch_microblaze,{* Xilinx MicroBlaze. *} +. bfd_arch_tilepro, {* Tilera TILEPro *} +. bfd_arch_tilegx, {* Tilera TILE-Gx *} +.#define bfd_mach_tilepro 1 +.#define bfd_mach_tilegx 1 . bfd_arch_last . }; */ @@ -499,6 +508,7 @@ extern const bfd_arch_info_type bfd_i960_arch; extern const bfd_arch_info_type bfd_ia64_arch; extern const bfd_arch_info_type bfd_ip2k_arch; extern const bfd_arch_info_type bfd_iq2000_arch; +extern const bfd_arch_info_type bfd_k1om_arch; extern const bfd_arch_info_type bfd_l1om_arch; extern const bfd_arch_info_type bfd_lm32_arch; extern const bfd_arch_info_type bfd_m32c_arch; @@ -537,6 +547,8 @@ extern const bfd_arch_info_type bfd_tic4x_arch; extern const bfd_arch_info_type bfd_tic54x_arch; extern const bfd_arch_info_type bfd_tic6x_arch; extern const bfd_arch_info_type bfd_tic80_arch; +extern const bfd_arch_info_type bfd_tilegx_arch; +extern const bfd_arch_info_type bfd_tilepro_arch; extern const bfd_arch_info_type bfd_v850_arch; extern const bfd_arch_info_type bfd_vax_arch; extern const bfd_arch_info_type bfd_w65_arch; @@ -576,6 +588,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] = &bfd_ia64_arch, &bfd_ip2k_arch, &bfd_iq2000_arch, + &bfd_k1om_arch, &bfd_l1om_arch, &bfd_lm32_arch, &bfd_m32c_arch, @@ -611,6 +624,8 @@ static const bfd_arch_info_type * const bfd_archures_list[] = &bfd_tic54x_arch, &bfd_tic6x_arch, &bfd_tic80_arch, + &bfd_tilegx_arch, + &bfd_tilepro_arch, &bfd_v850_arch, &bfd_vax_arch, &bfd_w65_arch, @@ -748,25 +763,26 @@ bfd_arch_get_compatible (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns) { - const bfd * ubfd = NULL; + const bfd *ubfd, *kbfd; /* Look for an unknown architecture. */ - if (((ubfd = abfd) && ubfd->arch_info->arch == bfd_arch_unknown) - || ((ubfd = bbfd) && ubfd->arch_info->arch == bfd_arch_unknown)) - { - /* We can allow an unknown architecture if accept_unknowns - is true, or if the target is the "binary" format, which - has an unknown architecture. Since the binary format can - only be set by explicit request from the user, it is safe - to assume that they know what they are doing. */ - if (accept_unknowns - || strcmp (bfd_get_target (ubfd), "binary") == 0) - return ubfd->arch_info; - return NULL; - } - - /* Otherwise architecture-specific code has to decide. */ - return abfd->arch_info->compatible (abfd->arch_info, bbfd->arch_info); + if (abfd->arch_info->arch == bfd_arch_unknown) + ubfd = abfd, kbfd = bbfd; + else if (bbfd->arch_info->arch == bfd_arch_unknown) + ubfd = bbfd, kbfd = abfd; + else + /* Otherwise architecture-specific code has to decide. */ + return abfd->arch_info->compatible (abfd->arch_info, bbfd->arch_info); + + /* We can allow an unknown architecture if accept_unknowns + is true, or if the target is the "binary" format, which + has an unknown architecture. Since the binary format can + only be set by explicit request from the user, it is safe + to assume that they know what they are doing. */ + if (accept_unknowns + || strcmp (bfd_get_target (ubfd), "binary") == 0) + return kbfd->arch_info; + return NULL; } /* diff --git a/bfd/bfd-in.h b/bfd/bfd-in.h index d536897..a477b49 100644 --- a/bfd/bfd-in.h +++ b/bfd/bfd-in.h @@ -552,11 +552,6 @@ void bfd_putl16 (bfd_vma, void *); bfd_uint64_t bfd_get_bits (const void *, int, bfd_boolean); void bfd_put_bits (bfd_uint64_t, void *, int, bfd_boolean); -extern bfd_boolean bfd_section_already_linked_table_init (void); -extern void bfd_section_already_linked_table_free (void); - -/* Externally visible ECOFF routines. */ - #if defined(__STDC__) || defined(ALMOST_STDC) struct ecoff_debug_info; struct ecoff_debug_swap; @@ -564,8 +559,18 @@ struct ecoff_extr; struct bfd_symbol; struct bfd_link_info; struct bfd_link_hash_entry; +struct bfd_section_already_linked; struct bfd_elf_version_tree; #endif + +extern bfd_boolean bfd_section_already_linked_table_init (void); +extern void bfd_section_already_linked_table_free (void); +extern bfd_boolean _bfd_handle_already_linked + (struct bfd_section *, struct bfd_section_already_linked *, + struct bfd_link_info *); + +/* Externally visible ECOFF routines. */ + extern bfd_vma bfd_ecoff_get_gp_value (bfd * abfd); extern bfd_boolean bfd_ecoff_set_gp_value @@ -640,8 +645,7 @@ extern bfd_boolean bfd_elf_get_bfd_needed_list (bfd *, struct bfd_link_needed_list **); extern bfd_boolean bfd_elf_size_dynamic_sections (bfd *, const char *, const char *, const char *, const char *, const char *, - const char * const *, struct bfd_link_info *, struct bfd_section **, - struct bfd_elf_version_tree *); + const char * const *, struct bfd_link_info *, struct bfd_section **); extern bfd_boolean bfd_elf_size_dynsym_hash_dynstr (bfd *, struct bfd_link_info *); extern void bfd_elf_set_dt_needed_name @@ -869,7 +873,7 @@ extern bfd_boolean bfd_elf32_arm_process_before_allocation void bfd_elf32_arm_set_target_relocs (bfd *, struct bfd_link_info *, int, char *, int, int, bfd_arm_vfp11_fix, - int, int, int, int); + int, int, int, int, int); extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking (bfd *, struct bfd_link_info *); @@ -912,6 +916,10 @@ extern bfd_boolean elf32_arm_build_stubs extern bfd_boolean elf32_arm_fix_exidx_coverage (struct bfd_section **, unsigned int, struct bfd_link_info *, bfd_boolean); +/* C6x unwind section editing support. */ +extern bfd_boolean elf32_tic6x_fix_exidx_coverage +(struct bfd_section **, unsigned int, struct bfd_link_info *, bfd_boolean); + /* PowerPC @tls opcode transform/validate. */ extern unsigned int _bfd_elf_ppc_at_tls_transform (unsigned int, unsigned int); diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 76836b1..22fcdf6 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -559,11 +559,6 @@ void bfd_putl16 (bfd_vma, void *); bfd_uint64_t bfd_get_bits (const void *, int, bfd_boolean); void bfd_put_bits (bfd_uint64_t, void *, int, bfd_boolean); -extern bfd_boolean bfd_section_already_linked_table_init (void); -extern void bfd_section_already_linked_table_free (void); - -/* Externally visible ECOFF routines. */ - #if defined(__STDC__) || defined(ALMOST_STDC) struct ecoff_debug_info; struct ecoff_debug_swap; @@ -571,8 +566,18 @@ struct ecoff_extr; struct bfd_symbol; struct bfd_link_info; struct bfd_link_hash_entry; +struct bfd_section_already_linked; struct bfd_elf_version_tree; #endif + +extern bfd_boolean bfd_section_already_linked_table_init (void); +extern void bfd_section_already_linked_table_free (void); +extern bfd_boolean _bfd_handle_already_linked + (struct bfd_section *, struct bfd_section_already_linked *, + struct bfd_link_info *); + +/* Externally visible ECOFF routines. */ + extern bfd_vma bfd_ecoff_get_gp_value (bfd * abfd); extern bfd_boolean bfd_ecoff_set_gp_value @@ -647,8 +652,7 @@ extern bfd_boolean bfd_elf_get_bfd_needed_list (bfd *, struct bfd_link_needed_list **); extern bfd_boolean bfd_elf_size_dynamic_sections (bfd *, const char *, const char *, const char *, const char *, const char *, - const char * const *, struct bfd_link_info *, struct bfd_section **, - struct bfd_elf_version_tree *); + const char * const *, struct bfd_link_info *, struct bfd_section **); extern bfd_boolean bfd_elf_size_dynsym_hash_dynstr (bfd *, struct bfd_link_info *); extern void bfd_elf_set_dt_needed_name @@ -876,7 +880,7 @@ extern bfd_boolean bfd_elf32_arm_process_before_allocation void bfd_elf32_arm_set_target_relocs (bfd *, struct bfd_link_info *, int, char *, int, int, bfd_arm_vfp11_fix, - int, int, int, int); + int, int, int, int, int); extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking (bfd *, struct bfd_link_info *); @@ -919,6 +923,10 @@ extern bfd_boolean elf32_arm_build_stubs extern bfd_boolean elf32_arm_fix_exidx_coverage (struct bfd_section **, unsigned int, struct bfd_link_info *, bfd_boolean); +/* C6x unwind section editing support. */ +extern bfd_boolean elf32_tic6x_fix_exidx_coverage +(struct bfd_section **, unsigned int, struct bfd_link_info *, bfd_boolean); + /* PowerPC @tls opcode transform/validate. */ extern unsigned int _bfd_elf_ppc_at_tls_transform (unsigned int, unsigned int); @@ -1029,9 +1037,9 @@ bfd_boolean bfd_fill_in_gnu_debuglink_section #define bfd_put_signed_8 \ bfd_put_8 #define bfd_get_8(abfd, ptr) \ - (*(unsigned char *) (ptr) & 0xff) + (*(const unsigned char *) (ptr) & 0xff) #define bfd_get_signed_8(abfd, ptr) \ - (((*(unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80) + (((*(const unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80) #define bfd_put_16(abfd, val, ptr) \ BFD_SEND (abfd, bfd_putx16, ((val),(ptr))) @@ -1139,7 +1147,8 @@ long bfd_get_mtime (bfd *abfd); file_ptr bfd_get_size (bfd *abfd); void *bfd_mmap (bfd *abfd, void *addr, bfd_size_type len, - int prot, int flags, file_ptr offset); + int prot, int flags, file_ptr offset, + void **map_addr, bfd_size_type *map_len); /* Extracted from bfdwin.c. */ /* Extracted from section.c. */ @@ -1320,6 +1329,11 @@ typedef struct bfd_section sections. */ #define SEC_COFF_SHARED_LIBRARY 0x4000000 + /* This input section should be copied to output in reverse order + as an array of pointers. This is for ELF linker internal use + only. */ +#define SEC_ELF_REVERSE_COPY 0x4000000 + /* This section contains data which may be shared with other executables or shared objects. This is for COFF only. */ #define SEC_COFF_SHARED 0x8000000 @@ -1504,6 +1518,9 @@ typedef struct bfd_section /* The BFD which owns the section. */ bfd *owner; + /* INPUT_SECTION_FLAGS if specified in the linker script. */ + struct flag_info *section_flag_info; + /* A symbol which points at this section only. */ struct bfd_symbol *symbol; struct bfd_symbol **symbol_ptr_ptr; @@ -1682,6 +1699,9 @@ extern asection bfd_ind_section; /* target_index, used_by_bfd, constructor_chain, owner, */ \ 0, NULL, NULL, NULL, \ \ + /* flag_info, */ \ + NULL, \ + \ /* symbol, symbol_ptr_ptr, */ \ (struct bfd_symbol *) SYM, &SEC.symbol, \ \ @@ -1868,17 +1888,22 @@ enum bfd_architecture #define bfd_mach_mipsisa32r2 33 #define bfd_mach_mipsisa64 64 #define bfd_mach_mipsisa64r2 65 +#define bfd_mach_mips_micromips 96 bfd_arch_i386, /* Intel 386 */ -#define bfd_mach_i386_i386 1 -#define bfd_mach_i386_i8086 2 -#define bfd_mach_i386_i386_intel_syntax 3 -#define bfd_mach_x64_32 32 -#define bfd_mach_x64_32_intel_syntax 33 -#define bfd_mach_x86_64 64 -#define bfd_mach_x86_64_intel_syntax 65 +#define bfd_mach_i386_intel_syntax (1 << 0) +#define bfd_mach_i386_i8086 (1 << 1) +#define bfd_mach_i386_i386 (1 << 2) +#define bfd_mach_x86_64 (1 << 3) +#define bfd_mach_x64_32 (1 << 4) +#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax) +#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax) +#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax) bfd_arch_l1om, /* Intel L1OM */ -#define bfd_mach_l1om 66 -#define bfd_mach_l1om_intel_syntax 67 +#define bfd_mach_l1om (1 << 5) +#define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax) + bfd_arch_k1om, /* Intel K1OM */ +#define bfd_mach_k1om (1 << 6) +#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax) bfd_arch_we32k, /* AT&T WE32xxx */ bfd_arch_tahoe, /* CCI/Harris Tahoe */ bfd_arch_i860, /* Intel 860 */ @@ -2124,6 +2149,10 @@ enum bfd_architecture bfd_arch_lm32, /* Lattice Mico32 */ #define bfd_mach_lm32 1 bfd_arch_microblaze,/* Xilinx MicroBlaze. */ + bfd_arch_tilepro, /* Tilera TILEPro */ + bfd_arch_tilegx, /* Tilera TILE-Gx */ +#define bfd_mach_tilepro 1 +#define bfd_mach_tilegx 1 bfd_arch_last }; @@ -2703,9 +2732,9 @@ between two procedure entry points is < 2^21, or else a hint. */ BFD_RELOC_ALPHA_TPREL_LO16, BFD_RELOC_ALPHA_TPREL16, -/* Bits 27..2 of the relocation address shifted right 2 bits; -simple reloc otherwise. */ +/* The MIPS jump instruction. */ BFD_RELOC_MIPS_JMP, + BFD_RELOC_MICROMIPS_JMP, /* The MIPS16 jump instruction. */ BFD_RELOC_MIPS16_JMP, @@ -2753,42 +2782,75 @@ to compensate for the borrow when the low bits are added. */ /* Relocation against a MIPS literal section. */ BFD_RELOC_MIPS_LITERAL, + BFD_RELOC_MICROMIPS_LITERAL, + +/* microMIPS PC-relative relocations. */ + BFD_RELOC_MICROMIPS_7_PCREL_S1, + BFD_RELOC_MICROMIPS_10_PCREL_S1, + BFD_RELOC_MICROMIPS_16_PCREL_S1, + +/* microMIPS versions of generic BFD relocs. */ + BFD_RELOC_MICROMIPS_GPREL16, + BFD_RELOC_MICROMIPS_HI16, + BFD_RELOC_MICROMIPS_HI16_S, + BFD_RELOC_MICROMIPS_LO16, /* MIPS ELF relocations. */ BFD_RELOC_MIPS_GOT16, + BFD_RELOC_MICROMIPS_GOT16, BFD_RELOC_MIPS_CALL16, + BFD_RELOC_MICROMIPS_CALL16, BFD_RELOC_MIPS_GOT_HI16, + BFD_RELOC_MICROMIPS_GOT_HI16, BFD_RELOC_MIPS_GOT_LO16, + BFD_RELOC_MICROMIPS_GOT_LO16, BFD_RELOC_MIPS_CALL_HI16, + BFD_RELOC_MICROMIPS_CALL_HI16, BFD_RELOC_MIPS_CALL_LO16, + BFD_RELOC_MICROMIPS_CALL_LO16, BFD_RELOC_MIPS_SUB, + BFD_RELOC_MICROMIPS_SUB, BFD_RELOC_MIPS_GOT_PAGE, + BFD_RELOC_MICROMIPS_GOT_PAGE, BFD_RELOC_MIPS_GOT_OFST, + BFD_RELOC_MICROMIPS_GOT_OFST, BFD_RELOC_MIPS_GOT_DISP, + BFD_RELOC_MICROMIPS_GOT_DISP, BFD_RELOC_MIPS_SHIFT5, BFD_RELOC_MIPS_SHIFT6, BFD_RELOC_MIPS_INSERT_A, BFD_RELOC_MIPS_INSERT_B, BFD_RELOC_MIPS_DELETE, BFD_RELOC_MIPS_HIGHEST, + BFD_RELOC_MICROMIPS_HIGHEST, BFD_RELOC_MIPS_HIGHER, + BFD_RELOC_MICROMIPS_HIGHER, BFD_RELOC_MIPS_SCN_DISP, + BFD_RELOC_MICROMIPS_SCN_DISP, BFD_RELOC_MIPS_REL16, BFD_RELOC_MIPS_RELGOT, BFD_RELOC_MIPS_JALR, + BFD_RELOC_MICROMIPS_JALR, BFD_RELOC_MIPS_TLS_DTPMOD32, BFD_RELOC_MIPS_TLS_DTPREL32, BFD_RELOC_MIPS_TLS_DTPMOD64, BFD_RELOC_MIPS_TLS_DTPREL64, BFD_RELOC_MIPS_TLS_GD, + BFD_RELOC_MICROMIPS_TLS_GD, BFD_RELOC_MIPS_TLS_LDM, + BFD_RELOC_MICROMIPS_TLS_LDM, BFD_RELOC_MIPS_TLS_DTPREL_HI16, + BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16, BFD_RELOC_MIPS_TLS_DTPREL_LO16, + BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16, BFD_RELOC_MIPS_TLS_GOTTPREL, + BFD_RELOC_MICROMIPS_TLS_GOTTPREL, BFD_RELOC_MIPS_TLS_TPREL32, BFD_RELOC_MIPS_TLS_TPREL64, BFD_RELOC_MIPS_TLS_TPREL_HI16, + BFD_RELOC_MICROMIPS_TLS_TPREL_HI16, BFD_RELOC_MIPS_TLS_TPREL_LO16, + BFD_RELOC_MICROMIPS_TLS_TPREL_LO16, /* MIPS ELF relocations (VxWorks and PLT extensions). */ @@ -4790,6 +4852,178 @@ value in a word. The relocation is relative offset from */ /* This is used to tell the dynamic linker to copy the value out of the dynamic object into the runtime process image. */ BFD_RELOC_MICROBLAZE_COPY, + +/* Tilera TILEPro Relocations. */ + BFD_RELOC_TILEPRO_COPY, + BFD_RELOC_TILEPRO_GLOB_DAT, + BFD_RELOC_TILEPRO_JMP_SLOT, + BFD_RELOC_TILEPRO_RELATIVE, + BFD_RELOC_TILEPRO_BROFF_X1, + BFD_RELOC_TILEPRO_JOFFLONG_X1, + BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT, + BFD_RELOC_TILEPRO_IMM8_X0, + BFD_RELOC_TILEPRO_IMM8_Y0, + BFD_RELOC_TILEPRO_IMM8_X1, + BFD_RELOC_TILEPRO_IMM8_Y1, + BFD_RELOC_TILEPRO_DEST_IMM8_X1, + BFD_RELOC_TILEPRO_MT_IMM15_X1, + BFD_RELOC_TILEPRO_MF_IMM15_X1, + BFD_RELOC_TILEPRO_IMM16_X0, + BFD_RELOC_TILEPRO_IMM16_X1, + BFD_RELOC_TILEPRO_IMM16_X0_LO, + BFD_RELOC_TILEPRO_IMM16_X1_LO, + BFD_RELOC_TILEPRO_IMM16_X0_HI, + BFD_RELOC_TILEPRO_IMM16_X1_HI, + BFD_RELOC_TILEPRO_IMM16_X0_HA, + BFD_RELOC_TILEPRO_IMM16_X1_HA, + BFD_RELOC_TILEPRO_IMM16_X0_PCREL, + BFD_RELOC_TILEPRO_IMM16_X1_PCREL, + BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL, + BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL, + BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL, + BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL, + BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL, + BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL, + BFD_RELOC_TILEPRO_IMM16_X0_GOT, + BFD_RELOC_TILEPRO_IMM16_X1_GOT, + BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO, + BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO, + BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI, + BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI, + BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA, + BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA, + BFD_RELOC_TILEPRO_MMSTART_X0, + BFD_RELOC_TILEPRO_MMEND_X0, + BFD_RELOC_TILEPRO_MMSTART_X1, + BFD_RELOC_TILEPRO_MMEND_X1, + BFD_RELOC_TILEPRO_SHAMT_X0, + BFD_RELOC_TILEPRO_SHAMT_X1, + BFD_RELOC_TILEPRO_SHAMT_Y0, + BFD_RELOC_TILEPRO_SHAMT_Y1, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA, + BFD_RELOC_TILEPRO_TLS_DTPMOD32, + BFD_RELOC_TILEPRO_TLS_DTPOFF32, + BFD_RELOC_TILEPRO_TLS_TPOFF32, + +/* Tilera TILE-Gx Relocations. */ + BFD_RELOC_TILEGX_HW0, + BFD_RELOC_TILEGX_HW1, + BFD_RELOC_TILEGX_HW2, + BFD_RELOC_TILEGX_HW3, + BFD_RELOC_TILEGX_HW0_LAST, + BFD_RELOC_TILEGX_HW1_LAST, + BFD_RELOC_TILEGX_HW2_LAST, + BFD_RELOC_TILEGX_COPY, + BFD_RELOC_TILEGX_GLOB_DAT, + BFD_RELOC_TILEGX_JMP_SLOT, + BFD_RELOC_TILEGX_RELATIVE, + BFD_RELOC_TILEGX_BROFF_X1, + BFD_RELOC_TILEGX_JUMPOFF_X1, + BFD_RELOC_TILEGX_JUMPOFF_X1_PLT, + BFD_RELOC_TILEGX_IMM8_X0, + BFD_RELOC_TILEGX_IMM8_Y0, + BFD_RELOC_TILEGX_IMM8_X1, + BFD_RELOC_TILEGX_IMM8_Y1, + BFD_RELOC_TILEGX_DEST_IMM8_X1, + BFD_RELOC_TILEGX_MT_IMM14_X1, + BFD_RELOC_TILEGX_MF_IMM14_X1, + BFD_RELOC_TILEGX_MMSTART_X0, + BFD_RELOC_TILEGX_MMEND_X0, + BFD_RELOC_TILEGX_SHAMT_X0, + BFD_RELOC_TILEGX_SHAMT_X1, + BFD_RELOC_TILEGX_SHAMT_Y0, + BFD_RELOC_TILEGX_SHAMT_Y1, + BFD_RELOC_TILEGX_IMM16_X0_HW0, + BFD_RELOC_TILEGX_IMM16_X1_HW0, + BFD_RELOC_TILEGX_IMM16_X0_HW1, + BFD_RELOC_TILEGX_IMM16_X1_HW1, + BFD_RELOC_TILEGX_IMM16_X0_HW2, + BFD_RELOC_TILEGX_IMM16_X1_HW2, + BFD_RELOC_TILEGX_IMM16_X0_HW3, + BFD_RELOC_TILEGX_IMM16_X1_HW3, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST, + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST, + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST, + BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT, + BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT, + BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT, + BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT, + BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT, + BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT, + BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT, + BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT, + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT, + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT, + BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE, + BFD_RELOC_TILEGX_TLS_DTPMOD64, + BFD_RELOC_TILEGX_TLS_DTPOFF64, + BFD_RELOC_TILEGX_TLS_TPOFF64, + BFD_RELOC_TILEGX_TLS_DTPMOD32, + BFD_RELOC_TILEGX_TLS_DTPOFF32, + BFD_RELOC_TILEGX_TLS_TPOFF32, BFD_RELOC_UNUSED }; typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; reloc_howto_type *bfd_reloc_type_lookup @@ -5385,6 +5619,9 @@ bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags); #define bfd_gc_sections(abfd, link_info) \ BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info)) +#define bfd_lookup_section_flags(link_info, flag_info) \ + BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info)) + #define bfd_merge_sections(abfd, link_info) \ BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info)) @@ -5541,6 +5778,9 @@ enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN }; /* Forward declaration. */ typedef struct bfd_link_info _bfd_link_info; +/* Forward declaration. */ +typedef struct flag_info flag_info; + typedef struct bfd_target { /* Identifies the kind of target, e.g., SunOS4, Ultrix, etc. */ @@ -5572,7 +5812,11 @@ typedef struct bfd_target char ar_pad_char; /* The maximum number of characters in an archive header. */ - unsigned short ar_max_namelen; + unsigned char ar_max_namelen; + + /* How well this target matches, used to select between various + possible targets when more than one target matches. */ + unsigned char match_priority; /* Entries for byte swapping for data. These are different from the other entry points, since they don't take a BFD as the first argument. @@ -5806,6 +6050,7 @@ typedef struct bfd_target NAME##_bfd_final_link, \ NAME##_bfd_link_split_section, \ NAME##_bfd_gc_sections, \ + NAME##_bfd_lookup_section_flags, \ NAME##_bfd_merge_sections, \ NAME##_bfd_is_group_section, \ NAME##_bfd_discard_group, \ @@ -5850,6 +6095,10 @@ typedef struct bfd_target /* Remove sections that are not referenced from the output. */ bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *); + /* Sets the bitmask of allowed and disallowed section flags. */ + void (*_bfd_lookup_section_flags) (struct bfd_link_info *, + struct flag_info *); + /* Attempt to merge SEC_MERGE sections. */ bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *); @@ -5861,8 +6110,8 @@ typedef struct bfd_target /* Check if SEC has been already linked during a reloceatable or final link. */ - void (*_section_already_linked) (bfd *, struct bfd_section *, - struct bfd_link_info *); + bfd_boolean (*_section_already_linked) (bfd *, asection *, + struct bfd_link_info *); /* Define a common symbol. */ bfd_boolean (*_bfd_define_common_symbol) (bfd *, struct bfd_link_info *, @@ -5931,7 +6180,8 @@ bfd_boolean bfd_link_split_section (bfd *abfd, asection *sec); #define bfd_link_split_section(abfd, sec) \ BFD_SEND (abfd, _bfd_link_split_section, (abfd, sec)) -void bfd_section_already_linked (bfd *abfd, asection *sec, +bfd_boolean bfd_section_already_linked (bfd *abfd, + asection *sec, struct bfd_link_info *info); #define bfd_section_already_linked(abfd, sec, info) \ @@ -5948,6 +6198,9 @@ struct bfd_elf_version_tree * bfd_find_version_for_sym (struct bfd_elf_version_tree *verdefs, const char *sym_name, bfd_boolean *hide); +bfd_boolean bfd_hide_sym_by_version + (struct bfd_elf_version_tree *verdefs, const char *sym_name); + /* Extracted from simple.c. */ bfd_byte *bfd_simple_get_relocated_section_contents (bfd *abfd, asection *sec, bfd_byte *outbuf, asymbol **symbol_table); diff --git a/bfd/bfd.c b/bfd/bfd.c index c729d63..7c14c7a 100644 --- a/bfd/bfd.c +++ b/bfd/bfd.c @@ -1031,7 +1031,8 @@ bfd_get_sign_extend_vma (bfd *abfd) || strcmp (name, "pe-x86-64") == 0 || strcmp (name, "pei-x86-64") == 0 || strcmp (name, "pe-arm-wince-little") == 0 - || strcmp (name, "pei-arm-wince-little") == 0) + || strcmp (name, "pei-arm-wince-little") == 0 + || strcmp (name, "aixcoff-rs6000") == 0) return 1; if (CONST_STRNEQ (name, "mach-o")) @@ -1373,6 +1374,9 @@ DESCRIPTION .#define bfd_gc_sections(abfd, link_info) \ . BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info)) . +.#define bfd_lookup_section_flags(link_info, flag_info) \ +. BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info)) +. .#define bfd_merge_sections(abfd, link_info) \ . BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info)) . diff --git a/bfd/bfdio.c b/bfd/bfdio.c index ce92781..841c781 100644 --- a/bfd/bfdio.c +++ b/bfd/bfdio.c @@ -1,7 +1,7 @@ /* Low-level I/O routines for BFDs. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 + 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -158,9 +158,15 @@ DESCRIPTION . int (*bclose) (struct bfd *abfd); . int (*bflush) (struct bfd *abfd); . int (*bstat) (struct bfd *abfd, struct stat *sb); -. {* Just like mmap: (void*)-1 on failure, mmapped address on success. *} +. {* Mmap a part of the files. ADDR, LEN, PROT, FLAGS and OFFSET are the usual +. mmap parameter, except that LEN and OFFSET do not need to be page +. aligned. Returns (void *)-1 on failure, mmapped address on success. +. Also write in MAP_ADDR the address of the page aligned buffer and in +. MAP_LEN the size mapped (a page multiple). Use unmap with MAP_ADDR and +. MAP_LEN to unmap. *} . void *(*bmmap) (struct bfd *abfd, void *addr, bfd_size_type len, -. int prot, int flags, file_ptr offset); +. int prot, int flags, file_ptr offset, +. void **map_addr, bfd_size_type *map_len); .}; .extern const struct bfd_iovec _bfd_memory_iovec; @@ -423,23 +429,28 @@ FUNCTION SYNOPSIS void *bfd_mmap (bfd *abfd, void *addr, bfd_size_type len, - int prot, int flags, file_ptr offset); + int prot, int flags, file_ptr offset, + void **map_addr, bfd_size_type *map_len); DESCRIPTION Return mmap()ed region of the file, if possible and implemented. + LEN and OFFSET do not need to be page aligned. The page aligned + address and length are written to MAP_ADDR and MAP_LEN. */ void * bfd_mmap (bfd *abfd, void *addr, bfd_size_type len, - int prot, int flags, file_ptr offset) + int prot, int flags, file_ptr offset, + void **map_addr, bfd_size_type *map_len) { void *ret = (void *)-1; if (abfd->iovec == NULL) return ret; - return abfd->iovec->bmmap (abfd, addr, len, prot, flags, offset); + return abfd->iovec->bmmap (abfd, addr, len, prot, flags, offset, + map_addr, map_len); } /* Memory file I/O operations. */ @@ -577,7 +588,7 @@ memory_bstat (bfd *abfd, struct stat *statbuf) { struct bfd_in_memory *bim = (struct bfd_in_memory *) abfd->iostream; - memset (statbuf, 0, sizeof (statbuf)); + memset (statbuf, 0, sizeof (*statbuf)); statbuf->st_size = bim->size; return 0; @@ -586,7 +597,9 @@ memory_bstat (bfd *abfd, struct stat *statbuf) static void * memory_bmmap (bfd *abfd ATTRIBUTE_UNUSED, void *addr ATTRIBUTE_UNUSED, bfd_size_type len ATTRIBUTE_UNUSED, int prot ATTRIBUTE_UNUSED, - int flags ATTRIBUTE_UNUSED, file_ptr offset ATTRIBUTE_UNUSED) + int flags ATTRIBUTE_UNUSED, file_ptr offset ATTRIBUTE_UNUSED, + void **map_addr ATTRIBUTE_UNUSED, + bfd_size_type *map_len ATTRIBUTE_UNUSED) { return (void *)-1; } diff --git a/bfd/bfdwin.c b/bfd/bfdwin.c index 63ad5ed..4103e9c 100644 --- a/bfd/bfdwin.c +++ b/bfd/bfdwin.c @@ -1,5 +1,5 @@ /* Support for memory-mapped windows into a BFD. - Copyright 1995, 1996, 2001, 2002, 2003, 2005, 2007, 2008, 2009 + Copyright 1995, 1996, 2001, 2002, 2003, 2005, 2007, 2008, 2009, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -128,17 +128,16 @@ bfd_get_file_window (bfd *abfd, if (pagesize == 0) abort (); - if (i == 0) + if (i == NULL) { i = bfd_zmalloc (sizeof (bfd_window_internal)); - windowp->i = i; - if (i == 0) + if (i == NULL) return FALSE; - i->data = 0; + i->data = NULL; } #ifdef HAVE_MMAP if (ok_to_map - && (i->data == 0 || i->mapped == 1) + && (i->data == NULL || i->mapped == 1) && (abfd->flags & BFD_IN_MEMORY) == 0) { file_ptr file_offset, offset2; @@ -156,9 +155,9 @@ bfd_get_file_window (bfd *abfd, if (abfd->iostream == NULL && (abfd->iovec == NULL || abfd->iovec->bseek (abfd, offset, SEEK_SET) != 0)) - return FALSE; - fd = fileno ((FILE *) abfd->iostream); + goto free_and_fail; + fd = fileno ((FILE *) abfd->iostream); /* Compute offsets and size for mmap and for the user's data. */ offset2 = offset % pagesize; if (offset2 < 0) @@ -169,10 +168,10 @@ bfd_get_file_window (bfd *abfd, real_size -= real_size % pagesize; /* If we're re-using a memory region, make sure it's big enough. */ - if (i->data && i->size < size) + if (i->data != NULL && i->size < size) { munmap (i->data, i->size); - i->data = 0; + i->data = NULL; } i->data = mmap (i->data, real_size, writable ? PROT_WRITE | PROT_READ : PROT_READ, @@ -185,11 +184,10 @@ bfd_get_file_window (bfd *abfd, /* An error happened. Report it, or try using malloc, or something. */ bfd_set_error (bfd_error_system_call); - i->data = 0; windowp->data = 0; if (debug_windows) fprintf (stderr, "\t\tmmap failed!\n"); - return FALSE; + goto free_and_fail; } if (debug_windows) fprintf (stderr, "\n\tmapped %ld at %p, offset is %ld\n", @@ -198,6 +196,8 @@ bfd_get_file_window (bfd *abfd, windowp->data = (bfd_byte *) i->data + offset2; windowp->size = size; i->mapped = 1; + i->refcount = 1; + windowp->i = i; return TRUE; } else if (debug_windows) @@ -228,15 +228,18 @@ bfd_get_file_window (bfd *abfd, if (i->data == NULL) { if (size_to_alloc == 0) - return TRUE; - return FALSE; + { + windowp->i = i; + return TRUE; + } + goto free_and_fail; } i->refcount = 1; if (bfd_seek (abfd, offset, SEEK_SET) != 0) - return FALSE; + goto free_and_fail; i->size = bfd_bread (i->data, size, abfd); if (i->size != size) - return FALSE; + goto free_and_fail; i->mapped = 0; #ifdef HAVE_MPROTECT if (!writable) @@ -249,7 +252,13 @@ bfd_get_file_window (bfd *abfd, #endif windowp->data = i->data; windowp->size = i->size; + windowp->i = i; return TRUE; + + free_and_fail: + /* We have a bfd_window_internal, but an error occurred. Free it. */ + free (i); + return FALSE; } #endif /* USE_MMAP */ diff --git a/bfd/binary.c b/bfd/binary.c index 2af0293..700c862 100644 --- a/bfd/binary.c +++ b/bfd/binary.c @@ -1,6 +1,6 @@ /* BFD back-end for binary objects. Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, - 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc. + 2004, 2005, 2006, 2007, 2009, 2011 Free Software Foundation, Inc. Written by Ian Lance Taylor, Cygnus Support, This file is part of BFD, the Binary File Descriptor library. @@ -299,6 +299,7 @@ binary_sizeof_headers (bfd *abfd ATTRIBUTE_UNUSED, #define binary_bfd_get_relocated_section_contents bfd_generic_get_relocated_section_contents #define binary_bfd_relax_section bfd_generic_relax_section #define binary_bfd_gc_sections bfd_generic_gc_sections +#define binary_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define binary_bfd_merge_sections bfd_generic_merge_sections #define binary_bfd_is_group_section bfd_generic_is_group_section #define binary_bfd_discard_group bfd_generic_discard_group @@ -326,6 +327,7 @@ const bfd_target binary_vec = 0, /* symbol_leading_char */ ' ', /* ar_pad_char */ 16, /* ar_max_namelen */ + 255, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ diff --git a/bfd/bout.c b/bfd/bout.c index 34c1a6b..cfd4abb 100644 --- a/bfd/bout.c +++ b/bfd/bout.c @@ -1,6 +1,6 @@ /* BFD back-end for Intel 960 b.out binaries. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -1387,6 +1387,7 @@ b_out_bfd_get_relocated_section_contents (bfd *output_bfd, #define b_out_bfd_final_link _bfd_generic_final_link #define b_out_bfd_link_split_section _bfd_generic_link_split_section #define b_out_bfd_gc_sections bfd_generic_gc_sections +#define b_out_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define b_out_bfd_merge_sections bfd_generic_merge_sections #define b_out_bfd_is_group_section bfd_generic_is_group_section #define b_out_bfd_discard_group bfd_generic_discard_group @@ -1409,7 +1410,7 @@ const bfd_target b_out_vec_big_host = '_', /* Symbol leading char. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ - + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* Data. */ @@ -1451,6 +1452,7 @@ const bfd_target b_out_vec_little_host = '_', /* Symbol leading char. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* Data. */ diff --git a/bfd/cache.c b/bfd/cache.c index 2239c28..5ddbbe4 100644 --- a/bfd/cache.c +++ b/bfd/cache.c @@ -45,6 +45,7 @@ SUBSECTION #include "bfd.h" #include "libbfd.h" #include "libiberty.h" +#include "bfd_stdint.h" #ifdef HAVE_MMAP #include @@ -398,7 +399,9 @@ cache_bmmap (struct bfd *abfd ATTRIBUTE_UNUSED, bfd_size_type len ATTRIBUTE_UNUSED, int prot ATTRIBUTE_UNUSED, int flags ATTRIBUTE_UNUSED, - file_ptr offset ATTRIBUTE_UNUSED) + file_ptr offset ATTRIBUTE_UNUSED, + void **map_addr ATTRIBUTE_UNUSED, + bfd_size_type *map_len ATTRIBUTE_UNUSED) { void *ret = (void *) -1; @@ -407,13 +410,35 @@ cache_bmmap (struct bfd *abfd ATTRIBUTE_UNUSED, #ifdef HAVE_MMAP else { - FILE *f = bfd_cache_lookup (abfd, CACHE_NO_SEEK_ERROR); + static uintptr_t pagesize_m1; + FILE *f; + file_ptr pg_offset; + bfd_size_type pg_len; + + f = bfd_cache_lookup (abfd, CACHE_NO_SEEK_ERROR); if (f == NULL) return ret; - ret = mmap (addr, len, prot, flags, fileno (f), offset); + if (pagesize_m1 == 0) + pagesize_m1 = getpagesize () - 1; + + /* Handle archive members. */ + if (abfd->my_archive != NULL) + offset += abfd->origin; + + /* Align. */ + pg_offset = offset & ~pagesize_m1; + pg_len = (len + (offset - pg_offset) + pagesize_m1) & ~pagesize_m1; + + ret = mmap (addr, pg_len, prot, flags, fileno (f), pg_offset); if (ret == (void *) -1) bfd_set_error (bfd_error_system_call); + else + { + *map_addr = ret; + *map_len = pg_len; + ret += offset & pagesize_m1; + } } #endif diff --git a/bfd/cisco-core.c b/bfd/cisco-core.c index 29a7423..40eaca9 100644 --- a/bfd/cisco-core.c +++ b/bfd/cisco-core.c @@ -1,5 +1,6 @@ /* BFD back-end for CISCO crash dumps. - Copyright 1994, 1997, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2010 + Copyright 1994, 1997, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, + 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -332,9 +333,10 @@ const bfd_target cisco_core_big_vec = HAS_LINENO | HAS_DEBUG | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED), (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */ - 0, /* symbol prefix */ - ' ', /* ar_pad_char */ - 16, /* ar_max_namelen */ + 0, /* symbol prefix */ + ' ', /* ar_pad_char */ + 16, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ @@ -385,6 +387,7 @@ const bfd_target cisco_core_little_vec = 0, /* symbol prefix */ ' ', /* ar_pad_char */ 16, /* ar_max_namelen */ + 0, /* match_priority */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ diff --git a/bfd/coff-alpha.c b/bfd/coff-alpha.c index 12b49ac..4466e4d 100644 --- a/bfd/coff-alpha.c +++ b/bfd/coff-alpha.c @@ -1,6 +1,6 @@ /* BFD back-end for ALPHA Extended-Coff files. Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, - 2003, 2004, 2005, 2007, 2008, 2009, 2010 + 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Modified from coff-mips.c by Steve Chamberlain and Ian Lance Taylor . @@ -2393,6 +2393,9 @@ static const struct ecoff_backend_data alpha_ecoff_backend_data = #define _bfd_ecoff_get_section_contents_in_window \ _bfd_generic_get_section_contents_in_window +/* Input section flag lookup is generic. */ +#define _bfd_ecoff_bfd_lookup_section_flags bfd_generic_lookup_section_flags + /* Relaxing sections is generic. */ #define _bfd_ecoff_bfd_relax_section bfd_generic_relax_section #define _bfd_ecoff_bfd_gc_sections bfd_generic_gc_sections @@ -2400,7 +2403,7 @@ static const struct ecoff_backend_data alpha_ecoff_backend_data = #define _bfd_ecoff_bfd_is_group_section bfd_generic_is_group_section #define _bfd_ecoff_bfd_discard_group bfd_generic_discard_group #define _bfd_ecoff_section_already_linked \ - _bfd_generic_section_already_linked + _bfd_coff_section_already_linked #define _bfd_ecoff_bfd_define_common_symbol bfd_generic_define_common_symbol const bfd_target ecoffalpha_little_vec = @@ -2418,6 +2421,7 @@ const bfd_target ecoffalpha_little_vec = 0, /* leading underscore */ ' ', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ diff --git a/bfd/coff-aux.c b/bfd/coff-aux.c index af1db03..84805a8 100644 --- a/bfd/coff-aux.c +++ b/bfd/coff-aux.c @@ -1,5 +1,5 @@ /* BFD back-end for Apple M68K COFF A/UX 3.x files. - Copyright 1996, 1997, 2000, 2002, 2005, 2007, 2008 + Copyright 1996, 1997, 2000, 2002, 2005, 2007, 2008, 2011 Free Software Foundation, Inc. Written by Richard Henderson . @@ -105,7 +105,8 @@ coff_m68k_aux_link_add_one_symbol (info, abfd, name, flags, section, value, && (bfd_hash_lookup (info->notice_hash, name, FALSE, FALSE) != (struct bfd_hash_entry *) NULL)) { - if (! (*info->callbacks->notice) (info, name, abfd, section, value)) + if (! (*info->callbacks->notice) (info, h, abfd, section, value, + flags, string)) return FALSE; } diff --git a/bfd/coff-i386.c b/bfd/coff-i386.c index 57c47d0..2f17a55 100644 --- a/bfd/coff-i386.c +++ b/bfd/coff-i386.c @@ -1,6 +1,6 @@ /* BFD back-end for Intel 386 COFF files. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009 + 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -661,6 +661,7 @@ const bfd_target #endif '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, @@ -670,8 +671,13 @@ const bfd_target bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */ /* Note that we allow an object file to be treated as a core file as well. */ - {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ - bfd_generic_archive_p, coff_object_p}, + /* bfd_check_format */ +#ifdef COFF_CHECK_FORMAT + {_bfd_dummy_target, COFF_CHECK_FORMAT, + bfd_generic_archive_p, COFF_CHECK_FORMAT}, +#else + {_bfd_dummy_target, coff_object_p, bfd_generic_archive_p, coff_object_p}, +#endif {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ bfd_false}, {bfd_false, coff_write_object_contents, /* bfd_write_contents */ diff --git a/bfd/coff-i860.c b/bfd/coff-i860.c index d50b070..9eb39a5 100644 --- a/bfd/coff-i860.c +++ b/bfd/coff-i860.c @@ -677,6 +677,7 @@ const bfd_target '_', /* leading underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, diff --git a/bfd/coff-i960.c b/bfd/coff-i960.c index d0374d2..928315f 100644 --- a/bfd/coff-i960.c +++ b/bfd/coff-i960.c @@ -1,6 +1,7 @@ /* BFD back-end for Intel 960 COFF files. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1997, 1999, 2000, 2001, - 2002, 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc. + 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2011 + Free Software Foundation, Inc. Written by Cygnus Support. This file is part of BFD, the Binary File Descriptor library. @@ -656,6 +657,7 @@ const bfd_target icoff_big_vec = '_', /* leading underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, diff --git a/bfd/coff-ia64.c b/bfd/coff-ia64.c index 38d9ac6..86e7617 100644 --- a/bfd/coff-ia64.c +++ b/bfd/coff-ia64.c @@ -1,5 +1,5 @@ /* BFD back-end for HP/Intel IA-64 COFF files. - Copyright 1999, 2000, 2001, 2002, 2005, 2007, 2008, 2009 + Copyright 1999, 2000, 2001, 2002, 2005, 2007, 2008, 2009, 2011 Free Software Foundation, Inc. Contributed by David Mosberger @@ -176,6 +176,7 @@ const bfd_target #endif '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, diff --git a/bfd/coff-mcore.c b/bfd/coff-mcore.c index 8b2f9d7..27b2ec3 100644 --- a/bfd/coff-mcore.c +++ b/bfd/coff-mcore.c @@ -1,5 +1,5 @@ /* BFD back-end for Motorola MCore COFF/PE - Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2010 + Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -377,7 +377,7 @@ coff_mcore_relocate_section (output_bfd, info, input_bfd, input_section, if (info->relocatable) return TRUE; - /* Check if we have the same endianess */ + /* Check if we have the same endianness */ if ( input_bfd->xvec->byteorder != output_bfd->xvec->byteorder && output_bfd->xvec->byteorder != BFD_ENDIAN_UNKNOWN) { diff --git a/bfd/coff-mips.c b/bfd/coff-mips.c index 34fda3a..4048ca8 100644 --- a/bfd/coff-mips.c +++ b/bfd/coff-mips.c @@ -1,6 +1,6 @@ /* BFD back-end for MIPS Extended-Coff files. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009 + 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2011 Free Software Foundation, Inc. Original version by Per Bothner. Full support added by Ian Lance Taylor, ian@cygnus.com. @@ -1410,13 +1410,16 @@ static const struct ecoff_backend_data mips_ecoff_backend_data = /* GC of sections is not done. */ #define _bfd_ecoff_bfd_gc_sections bfd_generic_gc_sections +/* Input section flags is not implemented. */ +#define _bfd_ecoff_bfd_lookup_section_flags bfd_generic_lookup_section_flags + /* Merging of sections is not done. */ #define _bfd_ecoff_bfd_merge_sections bfd_generic_merge_sections #define _bfd_ecoff_bfd_is_group_section bfd_generic_is_group_section #define _bfd_ecoff_bfd_discard_group bfd_generic_discard_group #define _bfd_ecoff_section_already_linked \ - _bfd_generic_section_already_linked + _bfd_coff_section_already_linked #define _bfd_ecoff_bfd_define_common_symbol bfd_generic_define_common_symbol extern const bfd_target ecoff_big_vec; @@ -1436,6 +1439,7 @@ const bfd_target ecoff_little_vec = 0, /* leading underscore */ ' ', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ @@ -1480,6 +1484,7 @@ const bfd_target ecoff_big_vec = 0, /* leading underscore */ ' ', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, @@ -1523,6 +1528,7 @@ const bfd_target ecoff_biglittle_vec = 0, /* leading underscore */ ' ', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ diff --git a/bfd/coff-or32.c b/bfd/coff-or32.c index 30801fb..a9683df 100644 --- a/bfd/coff-or32.c +++ b/bfd/coff-or32.c @@ -1,5 +1,5 @@ /* BFD back-end for OpenRISC 1000 COFF binaries. - Copyright 2002, 2003, 2004, 2005, 2006, 2007, 2008 + Copyright 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2011 Free Software Foundation, Inc. Contributed by Ivan Guzvinec @@ -594,6 +594,7 @@ const bfd_target or32coff_big_vec = '_', /* Leading underscore. */ '/', /* ar_pad_char. */ 15, /* ar_max_namelen. */ + 0, /* match priority. */ /* Data. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, diff --git a/bfd/coff-ppc.c b/bfd/coff-ppc.c index 69e10d8..b37a224 100644 --- a/bfd/coff-ppc.c +++ b/bfd/coff-ppc.c @@ -2401,8 +2401,7 @@ ppc_bfd_coff_final_link (abfd, info) /* Write out the global symbols. */ finfo.failed = FALSE; - coff_link_hash_traverse (coff_hash_table (info), _bfd_coff_write_global_sym, - (PTR) &finfo); + bfd_hash_traverse (&info->hash->table, _bfd_coff_write_global_sym, &finfo); if (finfo.failed) goto error_return; @@ -2582,6 +2581,7 @@ const bfd_target TARGET_LITTLE_SYM = 0, /* leading char */ '/', /* ar_pad_char */ 15, /* ar_max_namelen??? FIXMEmgo */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, @@ -2641,6 +2641,7 @@ const bfd_target TARGET_BIG_SYM = 0, /* leading char */ '/', /* ar_pad_char */ 15, /* ar_max_namelen??? FIXMEmgo */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, diff --git a/bfd/coff-rs6000.c b/bfd/coff-rs6000.c index 41bec09..5d9b5ae 100644 --- a/bfd/coff-rs6000.c +++ b/bfd/coff-rs6000.c @@ -1,6 +1,6 @@ /* BFD back-end for IBM RS/6000 "XCOFF" files. Copyright 1990-1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, - 2008, 2009, 2010 + 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Metin G. Ozisik, Mimi Phuong-Thao Vo, and John Gilmore. Archive support from Damon A. Permezel. @@ -463,23 +463,23 @@ _bfd_xcoff_swap_aux_in (bfd *abfd, PTR ext1, int type, int in_class, switch (in_class) { case C_FILE: - if (ext->x_file.x_fname[0] == 0) + if (ext->x_file.x_n.x_fname[0] == 0) { in->x_file.x_n.x_zeroes = 0; in->x_file.x_n.x_offset = - H_GET_32 (abfd, ext->x_file.x_n.x_offset); + H_GET_32 (abfd, ext->x_file.x_n.x_n.x_offset); } else { if (numaux > 1) { if (indx == 0) - memcpy (in->x_file.x_fname, ext->x_file.x_fname, + memcpy (in->x_file.x_fname, ext->x_file.x_n.x_fname, numaux * sizeof (AUXENT)); } else { - memcpy (in->x_file.x_fname, ext->x_file.x_fname, FILNMLEN); + memcpy (in->x_file.x_fname, ext->x_file.x_n.x_fname, FILNMLEN); } } goto end; @@ -578,12 +578,13 @@ _bfd_xcoff_swap_aux_out (bfd *abfd, PTR inp, int type, int in_class, case C_FILE: if (in->x_file.x_fname[0] == 0) { - H_PUT_32 (abfd, 0, ext->x_file.x_n.x_zeroes); - H_PUT_32 (abfd, in->x_file.x_n.x_offset, ext->x_file.x_n.x_offset); + H_PUT_32 (abfd, 0, ext->x_file.x_n.x_n.x_zeroes); + H_PUT_32 (abfd, in->x_file.x_n.x_offset, + ext->x_file.x_n.x_n.x_offset); } else { - memcpy (ext->x_file.x_fname, in->x_file.x_fname, FILNMLEN); + memcpy (ext->x_file.x_n.x_fname, in->x_file.x_fname, FILNMLEN); } goto end; @@ -3861,6 +3862,18 @@ static unsigned long xcoff_glink_code[9] = 0x00000000, /* traceback table */ }; +/* Table to convert DWARF flags to section names. */ + +const struct xcoff_dwsect_name xcoff_dwsect_names[] = { + { SSUBTYP_DWINFO, ".dwinfo", TRUE }, + { SSUBTYP_DWLINE, ".dwline", TRUE }, + { SSUBTYP_DWPBNMS, ".dwpbnms", TRUE }, + { SSUBTYP_DWPBTYP, ".dwpbtyp", TRUE }, + { SSUBTYP_DWARNGE, ".dwarnge", TRUE }, + { SSUBTYP_DWABREV, ".dwabrev", FALSE }, + { SSUBTYP_DWSTR, ".dwstr", TRUE }, + { SSUBTYP_DWRNGES, ".dwrnges", TRUE } +}; static const struct xcoff_backend_data_rec bfd_xcoff_backend_data = { @@ -3973,6 +3986,7 @@ const bfd_target rs6000coff_vec = 0, /* leading char */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ /* data */ bfd_getb64, @@ -4088,6 +4102,7 @@ const bfd_target rs6000coff_vec = _bfd_xcoff_bfd_final_link, _bfd_generic_link_split_section, bfd_generic_gc_sections, + bfd_generic_lookup_section_flags, bfd_generic_merge_sections, bfd_generic_is_group_section, bfd_generic_discard_group, @@ -4226,6 +4241,7 @@ const bfd_target pmac_xcoff_vec = 0, /* leading char */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ /* data */ bfd_getb64, @@ -4341,6 +4357,7 @@ const bfd_target pmac_xcoff_vec = _bfd_xcoff_bfd_final_link, _bfd_generic_link_split_section, bfd_generic_gc_sections, + bfd_generic_lookup_section_flags, bfd_generic_merge_sections, bfd_generic_is_group_section, bfd_generic_discard_group, diff --git a/bfd/coff-sh.c b/bfd/coff-sh.c index b77af7c..e707add 100644 --- a/bfd/coff-sh.c +++ b/bfd/coff-sh.c @@ -3185,6 +3185,7 @@ const bfd_target shcoff_small_vec = '_', /* leading symbol underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ @@ -3229,6 +3230,7 @@ const bfd_target shlcoff_small_vec = '_', /* leading symbol underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ diff --git a/bfd/coff-stgo32.c b/bfd/coff-stgo32.c index 78a4936..c10194e 100644 --- a/bfd/coff-stgo32.c +++ b/bfd/coff-stgo32.c @@ -1,6 +1,6 @@ /* BFD back-end for Intel 386 COFF files (DJGPP variant with a stub). - Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2005, 2006, 2007, 2009 - Free Software Foundation, Inc. + Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2005, 2006, 2007, 2009, + 2011 Free Software Foundation, Inc. Written by Robert Hoehne. This file is part of BFD, the Binary File Descriptor library. @@ -95,6 +95,10 @@ create_go32_stub PARAMS ((bfd *)); #define COFF_ADJUST_AUX_OUT_PRE adjust_aux_out_pre #define COFF_ADJUST_AUX_OUT_POST adjust_aux_out_post +static const bfd_target *go32_check_format (bfd *abfd); + +#define COFF_CHECK_FORMAT go32_check_format + static bfd_boolean go32_stubbed_coff_bfd_copy_private_bfd_data PARAMS ((bfd *, bfd *)); @@ -102,9 +106,9 @@ static bfd_boolean #include "coff-i386.c" -/* This macro is used, because I cannot assume the endianess of the +/* This macro is used, because I cannot assume the endianness of the host system. */ -#define _H(index) (H_GET_16 (abfd, (header+index*2))) +#define _H(index) (H_GET_16 (abfd, (header + index * 2))) /* These bytes are a 2048-byte DOS executable, which loads the COFF image into memory and then runs it. It is called 'stub'. */ @@ -414,3 +418,23 @@ go32_stubbed_coff_bfd_copy_private_bfd_data (ibfd, obfd) return TRUE; } + +/* coff_object_p only checks 2 bytes F_MAGIC at GO32_STUBSIZE inside the file + which is too fragile. */ + +static const bfd_target * +go32_check_format (bfd *abfd) +{ + char mz[2]; + + if (bfd_bread (mz, 2, abfd) != 2 || mz[0] != 'M' || mz[1] != 'Z') + { + bfd_set_error (bfd_error_wrong_format); + return NULL; + } + + if (bfd_seek (abfd, 0, SEEK_SET) != 0) + return NULL; + + return coff_object_p (abfd); +} diff --git a/bfd/coff-tic30.c b/bfd/coff-tic30.c index 7670afe..497d340 100644 --- a/bfd/coff-tic30.c +++ b/bfd/coff-tic30.c @@ -1,5 +1,5 @@ /* BFD back-end for TMS320C30 coff binaries. - Copyright 1998, 1999, 2000, 2001, 2002, 2005, 2007, 2008 + Copyright 1998, 1999, 2000, 2001, 2002, 2005, 2007, 2008, 2011 Free Software Foundation, Inc. Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au) @@ -203,6 +203,7 @@ const bfd_target tic30_coff_vec = '_', /* leading symbol underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ diff --git a/bfd/coff-tic54x.c b/bfd/coff-tic54x.c index 672897d..3c353da 100644 --- a/bfd/coff-tic54x.c +++ b/bfd/coff-tic54x.c @@ -1,5 +1,5 @@ /* BFD back-end for TMS320C54X coff binaries. - Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008 + Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2011 Free Software Foundation, Inc. Contributed by Timothy Wall (twall@cygnus.com) @@ -446,6 +446,7 @@ const bfd_target tic54x_coff0_vec = '_', /* leading symbol underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ @@ -490,6 +491,7 @@ const bfd_target tic54x_coff0_beh_vec = '_', /* leading symbol underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ @@ -535,6 +537,7 @@ const bfd_target tic54x_coff1_vec = '_', /* leading symbol underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ @@ -580,6 +583,7 @@ const bfd_target tic54x_coff1_beh_vec = '_', /* leading symbol underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ @@ -625,6 +629,7 @@ const bfd_target tic54x_coff2_vec = '_', /* leading symbol underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ @@ -670,6 +675,7 @@ const bfd_target tic54x_coff2_beh_vec = '_', /* leading symbol underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ diff --git a/bfd/coff-x86_64.c b/bfd/coff-x86_64.c index c739d69..d8a8a2e 100644 --- a/bfd/coff-x86_64.c +++ b/bfd/coff-x86_64.c @@ -1,5 +1,6 @@ /* BFD back-end for AMD 64 COFF files. - Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc. + Copyright 2006, 2007, 2008, 2009, 2010, 2011 + Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -762,6 +763,7 @@ const bfd_target #endif '/', /* Ar_pad_char. */ 15, /* Ar_max_namelen. */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, diff --git a/bfd/coff64-rs6000.c b/bfd/coff64-rs6000.c index b154b67..031385d 100644 --- a/bfd/coff64-rs6000.c +++ b/bfd/coff64-rs6000.c @@ -1,6 +1,6 @@ /* BFD back-end for IBM RS/6000 "XCOFF64" files. Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, - 2010 + 2010, 2011 Free Software Foundation, Inc. Written Clinton Popetz. Contributed by Cygnus Support. @@ -85,106 +85,104 @@ #define coff_SWAP_lineno_out _bfd_xcoff64_swap_lineno_out static void _bfd_xcoff64_swap_lineno_in - PARAMS ((bfd *, PTR, PTR)); + (bfd *, void *, void *); static unsigned int _bfd_xcoff64_swap_lineno_out - PARAMS ((bfd *, PTR, PTR)); + (bfd *, void *, void *); static bfd_boolean _bfd_xcoff64_put_symbol_name - PARAMS ((bfd *, struct bfd_strtab_hash *, struct internal_syment *, - const char *)); + (bfd *, struct bfd_strtab_hash *, struct internal_syment *, const char *); static bfd_boolean _bfd_xcoff64_put_ldsymbol_name - PARAMS ((bfd *, struct xcoff_loader_info *, struct internal_ldsym *, - const char *)); + (bfd *, struct xcoff_loader_info *, struct internal_ldsym *, const char *); static void _bfd_xcoff64_swap_sym_in - PARAMS ((bfd *, PTR, PTR)); + (bfd *, void *, void *); static unsigned int _bfd_xcoff64_swap_sym_out - PARAMS ((bfd *, PTR, PTR)); + (bfd *, void *, void *); static void _bfd_xcoff64_swap_aux_in - PARAMS ((bfd *, PTR, int, int, int, int, PTR)); + (bfd *, void *, int, int, int, int, void *); static unsigned int _bfd_xcoff64_swap_aux_out - PARAMS ((bfd *, PTR, int, int, int, int, PTR)); + (bfd *, void *, int, int, int, int, void *); static void xcoff64_swap_reloc_in - PARAMS ((bfd *, PTR, PTR)); + (bfd *, void *, void *); static unsigned int xcoff64_swap_reloc_out - PARAMS ((bfd *, PTR, PTR)); + (bfd *, void *, void *); extern bfd_boolean _bfd_xcoff_mkobject - PARAMS ((bfd *)); + (bfd *); extern bfd_boolean _bfd_xcoff_copy_private_bfd_data - PARAMS ((bfd *, bfd *)); + (bfd *, bfd *); extern bfd_boolean _bfd_xcoff_is_local_label_name - PARAMS ((bfd *, const char *)); + (bfd *, const char *); extern void xcoff64_rtype2howto - PARAMS ((arelent *, struct internal_reloc *)); + (arelent *, struct internal_reloc *); extern reloc_howto_type * xcoff64_reloc_type_lookup - PARAMS ((bfd *, bfd_reloc_code_real_type)); + (bfd *, bfd_reloc_code_real_type); extern bfd_boolean _bfd_xcoff_slurp_armap - PARAMS ((bfd *)); -extern PTR _bfd_xcoff_read_ar_hdr - PARAMS ((bfd *)); + (bfd *); +extern void *_bfd_xcoff_read_ar_hdr + (bfd *); extern bfd *_bfd_xcoff_openr_next_archived_file - PARAMS ((bfd *, bfd *)); + (bfd *, bfd *); extern int _bfd_xcoff_stat_arch_elt - PARAMS ((bfd *, struct stat *)); + (bfd *, struct stat *); extern bfd_boolean _bfd_xcoff_write_armap - PARAMS ((bfd *, unsigned int, struct orl *, unsigned int, int)); + (bfd *, unsigned int, struct orl *, unsigned int, int); extern bfd_boolean _bfd_xcoff_write_archive_contents - PARAMS ((bfd *)); + (bfd *); extern int _bfd_xcoff_sizeof_headers - PARAMS ((bfd *, struct bfd_link_info *)); + (bfd *, struct bfd_link_info *); extern void _bfd_xcoff_swap_sym_in - PARAMS ((bfd *, PTR, PTR)); + (bfd *, void *, void *); extern unsigned int _bfd_xcoff_swap_sym_out - PARAMS ((bfd *, PTR, PTR)); + (bfd *, void *, void *); extern void _bfd_xcoff_swap_aux_in - PARAMS ((bfd *, PTR, int, int, int, int, PTR)); + (bfd *, void *, int, int, int, int, void *); extern unsigned int _bfd_xcoff_swap_aux_out - PARAMS ((bfd *, PTR, int, int, int, int, PTR)); + (bfd *, void *, int, int, int, int, void *); static void xcoff64_swap_ldhdr_in - PARAMS ((bfd *, const PTR, struct internal_ldhdr *)); + (bfd *, const void *, struct internal_ldhdr *); static void xcoff64_swap_ldhdr_out - PARAMS ((bfd *, const struct internal_ldhdr *, PTR d)); + (bfd *, const struct internal_ldhdr *, void *d); static void xcoff64_swap_ldsym_in - PARAMS ((bfd *, const PTR, struct internal_ldsym *)); + (bfd *, const void *, struct internal_ldsym *); static void xcoff64_swap_ldsym_out - PARAMS ((bfd *, const struct internal_ldsym *, PTR d)); + (bfd *, const struct internal_ldsym *, void *d); static void xcoff64_swap_ldrel_in - PARAMS ((bfd *, const PTR, struct internal_ldrel *)); + (bfd *, const void *, struct internal_ldrel *); static void xcoff64_swap_ldrel_out - PARAMS ((bfd *, const struct internal_ldrel *, PTR d)); + (bfd *, const struct internal_ldrel *, void *d); static bfd_boolean xcoff64_write_object_contents - PARAMS ((bfd *)); + (bfd *); static bfd_boolean xcoff64_ppc_relocate_section - PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, - struct internal_reloc *, struct internal_syment *, - asection **)); + (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, + struct internal_reloc *, struct internal_syment *, + asection **); static bfd_boolean xcoff64_slurp_armap - PARAMS ((bfd *)); + (bfd *); static const bfd_target *xcoff64_archive_p - PARAMS ((bfd *)); + (bfd *); static bfd *xcoff64_openr_next_archived_file - PARAMS ((bfd *, bfd *)); + (bfd *, bfd *); static int xcoff64_sizeof_headers - PARAMS ((bfd *, struct bfd_link_info *)); + (bfd *, struct bfd_link_info *); static asection *xcoff64_create_csect_from_smclas - PARAMS ((bfd *, union internal_auxent *, const char *)); + (bfd *, union internal_auxent *, const char *); static bfd_boolean xcoff64_is_lineno_count_overflow - PARAMS ((bfd *, bfd_vma)); + (bfd *, bfd_vma); static bfd_boolean xcoff64_is_reloc_count_overflow - PARAMS ((bfd *, bfd_vma)); + (bfd *, bfd_vma); static bfd_vma xcoff64_loader_symbol_offset - PARAMS ((bfd *, struct internal_ldhdr *)); + (bfd *, struct internal_ldhdr *); static bfd_vma xcoff64_loader_reloc_offset - PARAMS ((bfd *, struct internal_ldhdr *)); + (bfd *, struct internal_ldhdr *); static bfd_boolean xcoff64_generate_rtinit - PARAMS ((bfd *, const char *, const char *, bfd_boolean)); + (bfd *, const char *, const char *, bfd_boolean); static bfd_boolean xcoff64_bad_format_hook - PARAMS ((bfd *, PTR )); + (bfd *, void *); /* Relocation functions */ static bfd_boolean xcoff64_reloc_type_br - PARAMS ((XCOFF_RELOC_FUNCTION_ARGS)); + (XCOFF_RELOC_FUNCTION_ARGS); bfd_boolean (*xcoff64_calculate_relocation[XCOFF_MAX_CALCULATE_RELOCATION]) - PARAMS ((XCOFF_RELOC_FUNCTION_ARGS)) = + (XCOFF_RELOC_FUNCTION_ARGS) = { xcoff_reloc_type_pos, /* R_POS (0x00) */ xcoff_reloc_type_neg, /* R_NEG (0x01) */ @@ -242,13 +240,13 @@ bfd_boolean (*xcoff64_calculate_relocation[XCOFF_MAX_CALCULATE_RELOCATION]) #define coff_bfd_reloc_name_lookup xcoff64_reloc_name_lookup #ifdef AIX_CORE extern const bfd_target * rs6000coff_core_p - PARAMS ((bfd *abfd)); + (bfd *abfd); extern bfd_boolean rs6000coff_core_file_matches_executable_p - PARAMS ((bfd *cbfd, bfd *ebfd)); + (bfd *cbfd, bfd *ebfd); extern char *rs6000coff_core_file_failing_command - PARAMS ((bfd *abfd)); + (bfd *abfd); extern int rs6000coff_core_file_failing_signal - PARAMS ((bfd *abfd)); + (bfd *abfd); #define CORE_FILE_P rs6000coff_core_p #define coff_core_file_failing_command \ rs6000coff_core_file_failing_command @@ -286,10 +284,7 @@ extern int rs6000coff_core_file_failing_signal /* For XCOFF64, the effective width of symndx changes depending on whether we are the first entry. Sigh. */ static void -_bfd_xcoff64_swap_lineno_in (abfd, ext1, in1) - bfd *abfd; - PTR ext1; - PTR in1; +_bfd_xcoff64_swap_lineno_in (bfd *abfd, void *ext1, void *in1) { LINENO *ext = (LINENO *) ext1; struct internal_lineno *in = (struct internal_lineno *) in1; @@ -302,10 +297,7 @@ _bfd_xcoff64_swap_lineno_in (abfd, ext1, in1) } static unsigned int -_bfd_xcoff64_swap_lineno_out (abfd, inp, outp) - bfd *abfd; - PTR inp; - PTR outp; +_bfd_xcoff64_swap_lineno_out (bfd *abfd, void *inp, void *outp) { struct internal_lineno *in = (struct internal_lineno *) inp; struct external_lineno *ext = (struct external_lineno *) outp; @@ -322,10 +314,7 @@ _bfd_xcoff64_swap_lineno_out (abfd, inp, outp) } static void -_bfd_xcoff64_swap_sym_in (abfd, ext1, in1) - bfd *abfd; - PTR ext1; - PTR in1; +_bfd_xcoff64_swap_sym_in (bfd *abfd, void *ext1, void *in1) { struct external_syment *ext = (struct external_syment *) ext1; struct internal_syment *in = (struct internal_syment *) in1; @@ -340,10 +329,7 @@ _bfd_xcoff64_swap_sym_in (abfd, ext1, in1) } static unsigned int -_bfd_xcoff64_swap_sym_out (abfd, inp, extp) - bfd *abfd; - PTR inp; - PTR extp; +_bfd_xcoff64_swap_sym_out (bfd *abfd, void *inp, void *extp) { struct internal_syment *in = (struct internal_syment *) inp; struct external_syment *ext = (struct external_syment *) extp; @@ -358,14 +344,8 @@ _bfd_xcoff64_swap_sym_out (abfd, inp, extp) } static void -_bfd_xcoff64_swap_aux_in (abfd, ext1, type, in_class, indx, numaux, in1) - bfd *abfd; - PTR ext1; - int type; - int in_class; - int indx; - int numaux; - PTR in1; +_bfd_xcoff64_swap_aux_in (bfd *abfd, void *ext1, int type, int in_class, + int indx, int numaux, void *in1) { union external_auxent *ext = (union external_auxent *) ext1; union internal_auxent *in = (union internal_auxent *) in1; @@ -373,14 +353,15 @@ _bfd_xcoff64_swap_aux_in (abfd, ext1, type, in_class, indx, numaux, in1) switch (in_class) { case C_FILE: - if (ext->x_file.x_n.x_zeroes[0] == 0) + if (ext->x_file.x_n.x_n.x_zeroes[0] == 0) { in->x_file.x_n.x_zeroes = 0; - in->x_file.x_n.x_offset = H_GET_32 (abfd, ext->x_file.x_n.x_offset); + in->x_file.x_n.x_offset = + H_GET_32 (abfd, ext->x_file.x_n.x_n.x_offset); } else { - memcpy (in->x_file.x_fname, ext->x_file.x_fname, FILNMLEN); + memcpy (in->x_file.x_fname, ext->x_file.x_n.x_fname, FILNMLEN); } goto end; @@ -450,30 +431,27 @@ _bfd_xcoff64_swap_aux_in (abfd, ext1, type, in_class, indx, numaux, in1) } static unsigned int -_bfd_xcoff64_swap_aux_out (abfd, inp, type, in_class, indx, numaux, extp) - bfd *abfd; - PTR inp; - int type; - int in_class; - int indx ATTRIBUTE_UNUSED; - int numaux ATTRIBUTE_UNUSED; - PTR extp; +_bfd_xcoff64_swap_aux_out (bfd *abfd, void *inp, int type, int in_class, + int indx ATTRIBUTE_UNUSED, + int numaux ATTRIBUTE_UNUSED, + void *extp) { union internal_auxent *in = (union internal_auxent *) inp; union external_auxent *ext = (union external_auxent *) extp; - memset ((PTR) ext, 0, bfd_coff_auxesz (abfd)); + memset (ext, 0, bfd_coff_auxesz (abfd)); switch (in_class) { case C_FILE: if (in->x_file.x_n.x_zeroes == 0) { - H_PUT_32 (abfd, 0, ext->x_file.x_n.x_zeroes); - H_PUT_32 (abfd, in->x_file.x_n.x_offset, ext->x_file.x_n.x_offset); + H_PUT_32 (abfd, 0, ext->x_file.x_n.x_n.x_zeroes); + H_PUT_32 (abfd, in->x_file.x_n.x_offset, + ext->x_file.x_n.x_n.x_offset); } else { - memcpy (ext->x_file.x_fname, in->x_file.x_fname, FILNMLEN); + memcpy (ext->x_file.x_n.x_fname, in->x_file.x_fname, FILNMLEN); } H_PUT_8 (abfd, _AUX_FILE, ext->x_auxtype.x_auxtype); goto end; @@ -541,11 +519,9 @@ _bfd_xcoff64_swap_aux_out (abfd, inp, type, in_class, indx, numaux, extp) } static bfd_boolean -_bfd_xcoff64_put_symbol_name (abfd, strtab, sym, name) - bfd *abfd; - struct bfd_strtab_hash *strtab; - struct internal_syment *sym; - const char *name; +_bfd_xcoff64_put_symbol_name (bfd *abfd, struct bfd_strtab_hash *strtab, + struct internal_syment *sym, + const char *name) { bfd_boolean hash; bfd_size_type indx; @@ -567,11 +543,10 @@ _bfd_xcoff64_put_symbol_name (abfd, strtab, sym, name) } static bfd_boolean -_bfd_xcoff64_put_ldsymbol_name (abfd, ldinfo, ldsym, name) - bfd *abfd ATTRIBUTE_UNUSED; - struct xcoff_loader_info *ldinfo; - struct internal_ldsym *ldsym; - const char *name; +_bfd_xcoff64_put_ldsymbol_name (bfd *abfd ATTRIBUTE_UNUSED, + struct xcoff_loader_info *ldinfo, + struct internal_ldsym *ldsym, + const char *name) { size_t len; len = strlen (name); @@ -615,10 +590,9 @@ _bfd_xcoff64_put_ldsymbol_name (abfd, ldinfo, ldsym, name) /* Swap in the ldhdr structure. */ static void -xcoff64_swap_ldhdr_in (abfd, s, dst) - bfd *abfd; - const PTR s; - struct internal_ldhdr *dst; +xcoff64_swap_ldhdr_in (bfd *abfd, + const void *s, + struct internal_ldhdr *dst) { const struct external_ldhdr *src = (const struct external_ldhdr *) s; @@ -637,10 +611,7 @@ xcoff64_swap_ldhdr_in (abfd, s, dst) /* Swap out the ldhdr structure. */ static void -xcoff64_swap_ldhdr_out (abfd, src, d) - bfd *abfd; - const struct internal_ldhdr *src; - PTR d; +xcoff64_swap_ldhdr_out (bfd *abfd, const struct internal_ldhdr *src, void *d) { struct external_ldhdr *dst = (struct external_ldhdr *) d; @@ -659,10 +630,7 @@ xcoff64_swap_ldhdr_out (abfd, src, d) /* Swap in the ldsym structure. */ static void -xcoff64_swap_ldsym_in (abfd, s, dst) - bfd *abfd; - const PTR s; - struct internal_ldsym *dst; +xcoff64_swap_ldsym_in (bfd *abfd, const void *s, struct internal_ldsym *dst) { const struct external_ldsym *src = (const struct external_ldsym *) s; /* XCOFF64 does not use l_zeroes like XCOFF32 @@ -681,10 +649,7 @@ xcoff64_swap_ldsym_in (abfd, s, dst) /* Swap out the ldsym structure. */ static void -xcoff64_swap_ldsym_out (abfd, src, d) - bfd *abfd; - const struct internal_ldsym *src; - PTR d; +xcoff64_swap_ldsym_out (bfd *abfd, const struct internal_ldsym *src, void *d) { struct external_ldsym *dst = (struct external_ldsym *) d; @@ -698,10 +663,7 @@ xcoff64_swap_ldsym_out (abfd, src, d) } static void -xcoff64_swap_reloc_in (abfd, s, d) - bfd *abfd; - PTR s; - PTR d; +xcoff64_swap_reloc_in (bfd *abfd, void *s, void *d) { struct external_reloc *src = (struct external_reloc *) s; struct internal_reloc *dst = (struct internal_reloc *) d; @@ -715,10 +677,7 @@ xcoff64_swap_reloc_in (abfd, s, d) } static unsigned int -xcoff64_swap_reloc_out (abfd, s, d) - bfd *abfd; - PTR s; - PTR d; +xcoff64_swap_reloc_out (bfd *abfd, void *s, void *d) { struct internal_reloc *src = (struct internal_reloc *) s; struct external_reloc *dst = (struct external_reloc *) d; @@ -734,10 +693,7 @@ xcoff64_swap_reloc_out (abfd, s, d) /* Swap in the ldrel structure. */ static void -xcoff64_swap_ldrel_in (abfd, s, dst) - bfd *abfd; - const PTR s; - struct internal_ldrel *dst; +xcoff64_swap_ldrel_in (bfd *abfd, const void *s, struct internal_ldrel *dst) { const struct external_ldrel *src = (const struct external_ldrel *) s; @@ -750,10 +706,7 @@ xcoff64_swap_ldrel_in (abfd, s, dst) /* Swap out the ldrel structure. */ static void -xcoff64_swap_ldrel_out (abfd, src, d) - bfd *abfd; - const struct internal_ldrel *src; - PTR d; +xcoff64_swap_ldrel_out (bfd *abfd, const struct internal_ldrel *src, void *d) { struct external_ldrel *dst = (struct external_ldrel *) d; @@ -764,8 +717,7 @@ xcoff64_swap_ldrel_out (abfd, src, d) } static bfd_boolean -xcoff64_write_object_contents (abfd) - bfd *abfd; +xcoff64_write_object_contents (bfd *abfd) { asection *current; bfd_boolean hasrelocs = FALSE; @@ -776,9 +728,9 @@ xcoff64_write_object_contents (abfd) file_ptr sym_base; unsigned long reloc_size = 0; unsigned long lnno_size = 0; - asection *text_sec = ((void *) 0); - asection *data_sec = ((void *) 0); - asection *bss_sec = ((void *) 0); + asection *text_sec = NULL; + asection *data_sec = NULL; + asection *bss_sec = NULL; struct internal_filehdr internal_f; struct internal_aouthdr internal_a; @@ -898,7 +850,7 @@ xcoff64_write_object_contents (abfd) amount = bfd_coff_scnhsz (abfd); if (bfd_coff_swap_scnhdr_out (abfd, §ion, &buff) == 0 - || bfd_bwrite ((PTR) (&buff), amount, abfd) != amount) + || bfd_bwrite (&buff, amount, abfd) != amount) return FALSE; } @@ -1081,8 +1033,8 @@ xcoff64_write_object_contents (abfd) if (buff == NULL) return FALSE; - bfd_coff_swap_filehdr_out (abfd, (PTR) &internal_f, (PTR) buff); - amount = bfd_bwrite ((PTR) buff, amount, abfd); + bfd_coff_swap_filehdr_out (abfd, &internal_f, buff); + amount = bfd_bwrite (buff, amount, abfd); free (buff); @@ -1099,8 +1051,8 @@ xcoff64_write_object_contents (abfd) if (buff == NULL) return FALSE; - bfd_coff_swap_aouthdr_out (abfd, (PTR) &internal_a, (PTR) buff); - amount = bfd_bwrite ((PTR) buff, amount, abfd); + bfd_coff_swap_aouthdr_out (abfd, &internal_a, buff); + amount = bfd_bwrite (buff, amount, abfd); free (buff); @@ -1112,18 +1064,16 @@ xcoff64_write_object_contents (abfd) } static bfd_boolean -xcoff64_reloc_type_br (input_bfd, input_section, output_bfd, rel, sym, howto, - val, addend, relocation, contents) - bfd *input_bfd; - asection *input_section; - bfd *output_bfd ATTRIBUTE_UNUSED; - struct internal_reloc *rel; - struct internal_syment *sym ATTRIBUTE_UNUSED; - struct reloc_howto_struct *howto; - bfd_vma val; - bfd_vma addend; - bfd_vma *relocation; - bfd_byte *contents; +xcoff64_reloc_type_br (bfd *input_bfd, + asection *input_section, + bfd *output_bfd ATTRIBUTE_UNUSED, + struct internal_reloc *rel, + struct internal_syment *sym ATTRIBUTE_UNUSED, + struct reloc_howto_struct *howto, + bfd_vma val, + bfd_vma addend, + bfd_vma *relocation, + bfd_byte *contents) { struct xcoff_link_hash_entry *h; bfd_vma section_offset; @@ -1221,17 +1171,14 @@ xcoff64_reloc_type_br (input_bfd, input_section, output_bfd, rel, sym, howto, See xcoff_ppc_relocation_section for more information. */ bfd_boolean -xcoff64_ppc_relocate_section (output_bfd, info, input_bfd, - input_section, contents, relocs, syms, - sections) - bfd *output_bfd; - struct bfd_link_info *info; - bfd *input_bfd; - asection *input_section; - bfd_byte *contents; - struct internal_reloc *relocs; - struct internal_syment *syms; - asection **sections; +xcoff64_ppc_relocate_section (bfd *output_bfd, + struct bfd_link_info *info, + bfd *input_bfd, + asection *input_section, + bfd_byte *contents, + struct internal_reloc *relocs, + struct internal_syment *syms, + asection **sections) { struct internal_reloc *rel; struct internal_reloc *relend; @@ -1829,9 +1776,7 @@ reloc_howto_type xcoff64_howto_table[] = }; void -xcoff64_rtype2howto (relent, internal) - arelent *relent; - struct internal_reloc *internal; +xcoff64_rtype2howto (arelent *relent, struct internal_reloc *internal) { if (internal->r_type > R_RBRC) abort (); @@ -1868,9 +1813,8 @@ xcoff64_rtype2howto (relent, internal) } reloc_howto_type * -xcoff64_reloc_type_lookup (abfd, code) - bfd *abfd ATTRIBUTE_UNUSED; - bfd_reloc_code_real_type code; +xcoff64_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type code) { switch (code) { @@ -1913,8 +1857,7 @@ xcoff64_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, /* Read in the armap of an XCOFF archive. */ static bfd_boolean -xcoff64_slurp_armap (abfd) - bfd *abfd; +xcoff64_slurp_armap (bfd *abfd) { file_ptr off; size_t namlen; @@ -1946,7 +1889,7 @@ xcoff64_slurp_armap (abfd) return FALSE; /* The symbol table starts with a normal archive header. */ - if (bfd_bread ((PTR) &hdr, (bfd_size_type) SIZEOF_AR_HDR_BIG, abfd) + if (bfd_bread (&hdr, (bfd_size_type) SIZEOF_AR_HDR_BIG, abfd) != SIZEOF_AR_HDR_BIG) return FALSE; @@ -1962,7 +1905,7 @@ xcoff64_slurp_armap (abfd) contents = (bfd_byte *) bfd_alloc (abfd, sz); if (contents == NULL) return FALSE; - if (bfd_bread ((PTR) contents, sz, abfd) != sz) + if (bfd_bread (contents, sz, abfd) != sz) return FALSE; /* The symbol table starts with an eight byte count. */ @@ -2009,8 +1952,7 @@ xcoff64_slurp_armap (abfd) /* See if this is an NEW XCOFF archive. */ static const bfd_target * -xcoff64_archive_p (abfd) - bfd *abfd; +xcoff64_archive_p (bfd *abfd) { struct artdata *tdata_hold; char magic[SXCOFFARMAG]; @@ -2018,7 +1960,7 @@ xcoff64_archive_p (abfd) struct xcoff_ar_file_hdr_big hdr; bfd_size_type amt = SXCOFFARMAG; - if (bfd_bread ((PTR) magic, amt, abfd) != amt) + if (bfd_bread (magic, amt, abfd) != amt) { if (bfd_get_error () != bfd_error_system_call) bfd_set_error (bfd_error_wrong_format); @@ -2036,7 +1978,7 @@ xcoff64_archive_p (abfd) /* Now read the rest of the file header. */ amt = SIZEOF_AR_FILE_HDR_BIG - SXCOFFARMAG; - if (bfd_bread ((PTR) &hdr.memoff, amt, abfd) != amt) + if (bfd_bread (&hdr.memoff, amt, abfd) != amt) { if (bfd_get_error () != bfd_error_system_call) bfd_set_error (bfd_error_wrong_format); @@ -2083,9 +2025,7 @@ xcoff64_archive_p (abfd) /* Open the next element in an XCOFF archive. */ static bfd * -xcoff64_openr_next_archived_file (archive, last_file) - bfd *archive; - bfd *last_file; +xcoff64_openr_next_archived_file (bfd *archive, bfd *last_file) { bfd_vma filestart; @@ -2141,13 +2081,9 @@ xcoff64_sizeof_headers (bfd *abfd, return size; } - - static asection * -xcoff64_create_csect_from_smclas (abfd, aux, symbol_name) - bfd *abfd; - union internal_auxent *aux; - const char *symbol_name; +xcoff64_create_csect_from_smclas (bfd *abfd, union internal_auxent *aux, + const char *symbol_name) { asection *return_value = NULL; @@ -2181,41 +2117,35 @@ xcoff64_create_csect_from_smclas (abfd, aux, symbol_name) } static bfd_boolean -xcoff64_is_lineno_count_overflow (abfd, value) - bfd *abfd ATTRIBUTE_UNUSED; - bfd_vma value ATTRIBUTE_UNUSED; +xcoff64_is_lineno_count_overflow (bfd *abfd ATTRIBUTE_UNUSED, + bfd_vma value ATTRIBUTE_UNUSED) { return FALSE; } static bfd_boolean -xcoff64_is_reloc_count_overflow (abfd, value) - bfd *abfd ATTRIBUTE_UNUSED; - bfd_vma value ATTRIBUTE_UNUSED; +xcoff64_is_reloc_count_overflow (bfd *abfd ATTRIBUTE_UNUSED, + bfd_vma value ATTRIBUTE_UNUSED) { return FALSE; } static bfd_vma -xcoff64_loader_symbol_offset (abfd, ldhdr) - bfd *abfd ATTRIBUTE_UNUSED; - struct internal_ldhdr *ldhdr; +xcoff64_loader_symbol_offset (bfd *abfd ATTRIBUTE_UNUSED, + struct internal_ldhdr *ldhdr) { return (ldhdr->l_symoff); } static bfd_vma -xcoff64_loader_reloc_offset (abfd, ldhdr) - bfd *abfd ATTRIBUTE_UNUSED; - struct internal_ldhdr *ldhdr; +xcoff64_loader_reloc_offset (bfd *abfd ATTRIBUTE_UNUSED, + struct internal_ldhdr *ldhdr) { return (ldhdr->l_rldoff); } static bfd_boolean -xcoff64_bad_format_hook (abfd, filehdr) - bfd * abfd; - PTR filehdr; +xcoff64_bad_format_hook (bfd * abfd, void *filehdr) { struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr; @@ -2230,11 +2160,8 @@ xcoff64_bad_format_hook (abfd, filehdr) } static bfd_boolean -xcoff64_generate_rtinit (abfd, init, fini, rtld) - bfd *abfd; - const char *init; - const char *fini; - bfd_boolean rtld; +xcoff64_generate_rtinit (bfd *abfd, const char *init, const char *fini, + bfd_boolean rtld) { bfd_byte filehdr_ext[FILHSZ]; bfd_byte scnhdr_ext[SCNHSZ * 3]; @@ -2695,6 +2622,7 @@ const bfd_target rs6000coff64_vec = 0, /* leading char */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ /* data */ bfd_getb64, @@ -2810,6 +2738,7 @@ const bfd_target rs6000coff64_vec = _bfd_xcoff_bfd_final_link, _bfd_generic_link_split_section, bfd_generic_gc_sections, + bfd_generic_lookup_section_flags, bfd_generic_merge_sections, bfd_generic_is_group_section, bfd_generic_discard_group, @@ -2826,19 +2755,18 @@ const bfd_target rs6000coff64_vec = /* Opposite endian version, none exists */ NULL, - (void *) &bfd_xcoff_backend_data, + &bfd_xcoff_backend_data, }; extern const bfd_target *xcoff64_core_p - PARAMS ((bfd *)); + (bfd *); extern bfd_boolean xcoff64_core_file_matches_executable_p - PARAMS ((bfd *, bfd *)); + (bfd *, bfd *); extern char *xcoff64_core_file_failing_command - PARAMS ((bfd *)); + (bfd *); extern int xcoff64_core_file_failing_signal - PARAMS ((bfd *)); -#define xcoff64_core_file_pid \ - _bfd_nocore_core_file_pid + (bfd *); +#define xcoff64_core_file_pid _bfd_nocore_core_file_pid /* AIX 5 */ static const struct xcoff_backend_data_rec bfd_xcoff_aix5_backend_data = @@ -2951,6 +2879,7 @@ const bfd_target aix5coff64_vec = 0, /* leading char */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ /* data */ bfd_getb64, @@ -3066,6 +2995,7 @@ const bfd_target aix5coff64_vec = _bfd_xcoff_bfd_final_link, _bfd_generic_link_split_section, bfd_generic_gc_sections, + bfd_generic_lookup_section_flags, bfd_generic_merge_sections, bfd_generic_is_group_section, bfd_generic_discard_group, @@ -3082,5 +3012,5 @@ const bfd_target aix5coff64_vec = /* Opposite endian version, none exists. */ NULL, - (void *) & bfd_xcoff_aix5_backend_data, + & bfd_xcoff_aix5_backend_data, }; diff --git a/bfd/coffcode.h b/bfd/coffcode.h index 9db86b5..6f9685b 100644 --- a/bfd/coffcode.h +++ b/bfd/coffcode.h @@ -1,6 +1,6 @@ /* Support for the generic parts of most COFF variants, for BFD. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -581,6 +581,17 @@ sec_to_styp_flags (const char *sec_name, flagword sec_flags) { styp_flags = STYP_TYPCHK; } + else if (sec_flags & SEC_DEBUGGING) + { + int i; + + for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) + if (!strcmp (sec_name, xcoff_dwsect_names[i].name)) + { + styp_flags = STYP_DWARF | xcoff_dwsect_names[i].flag; + break; + } + } #endif /* Try and figure out what it should be */ else if (sec_flags & SEC_CODE) @@ -658,7 +669,10 @@ sec_to_styp_flags (const char *sec_name, flagword sec_flags) /* FIXME: There is no gas syntax to specify the debug section flag. */ if (is_dbg) - sec_flags = SEC_DEBUGGING | SEC_READONLY; + { + sec_flags &= (SEC_LINK_ONCE | SEC_LINK_DUPLICATES_DISCARD); + sec_flags |= SEC_DEBUGGING | SEC_READONLY; + } /* skip LOAD */ /* READONLY later */ @@ -773,6 +787,10 @@ styp_to_sec_flags (bfd *abfd ATTRIBUTE_UNUSED, } else if (styp_flags & STYP_PAD) sec_flags = 0; +#ifdef RS6000COFF_C + else if (styp_flags & STYP_DWARF) + sec_flags |= SEC_DEBUGGING; +#endif else if (strcmp (name, _TEXT) == 0) { if (sec_flags & SEC_NEVER_LOAD) @@ -1714,6 +1732,7 @@ coff_new_section_hook (bfd * abfd, asection * section) { combined_entry_type *native; bfd_size_type amt; + unsigned char sclass = C_STAT; section->alignment_power = COFF_DEFAULT_SECTION_ALIGNMENT_POWER; @@ -1721,9 +1740,22 @@ coff_new_section_hook (bfd * abfd, asection * section) if (bfd_xcoff_text_align_power (abfd) != 0 && strcmp (bfd_get_section_name (abfd, section), ".text") == 0) section->alignment_power = bfd_xcoff_text_align_power (abfd); - if (bfd_xcoff_data_align_power (abfd) != 0 + else if (bfd_xcoff_data_align_power (abfd) != 0 && strcmp (bfd_get_section_name (abfd, section), ".data") == 0) section->alignment_power = bfd_xcoff_data_align_power (abfd); + else + { + int i; + + for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) + if (strcmp (bfd_get_section_name (abfd, section), + xcoff_dwsect_names[i].name) == 0) + { + section->alignment_power = 0; + sclass = C_DWARF; + break; + } + } #endif /* Set up the section symbol. */ @@ -1747,7 +1779,7 @@ coff_new_section_hook (bfd * abfd, asection * section) for n_numaux is already correct. */ native->u.syment.n_type = T_NULL; - native->u.syment.n_sclass = C_STAT; + native->u.syment.n_sclass = sclass; coffsymbol (section->symbol)->native = native; @@ -4752,6 +4784,10 @@ coff_slurp_symbol_table (bfd * abfd) case C_THUMBLABEL: /* Thumb label. */ case C_THUMBSTATFUNC:/* Thumb static function. */ #endif +#ifdef RS6000COFF_C + case C_DWARF: /* A label in a dwarf section. */ + case C_INFO: /* A label in a comment section. */ +#endif case C_LABEL: /* Label. */ if (src->u.syment.n_scnum == N_DEBUG) dst->symbol.flags = BSF_DEBUGGING; @@ -5616,6 +5652,10 @@ static bfd_coff_backend_data ticoff1_swap_table = #define coff_bfd_gc_sections bfd_generic_gc_sections #endif +#ifndef coff_bfd_lookup_section_flags +#define coff_bfd_lookup_section_flags bfd_generic_lookup_section_flags +#endif + #ifndef coff_bfd_merge_sections #define coff_bfd_merge_sections bfd_generic_merge_sections #endif @@ -5630,7 +5670,7 @@ static bfd_coff_backend_data ticoff1_swap_table = #ifndef coff_section_already_linked #define coff_section_already_linked \ - _bfd_generic_section_already_linked + _bfd_coff_section_already_linked #endif #ifndef coff_bfd_define_common_symbol @@ -5652,6 +5692,7 @@ const bfd_target VAR = \ UNDER, /* Leading symbol underscore. */ \ '/', /* AR_pad_char. */ \ 15, /* AR_max_namelen. */ \ + 0, /* match priority. */ \ \ /* Data conversion functions. */ \ bfd_getb64, bfd_getb_signed_64, bfd_putb64, \ @@ -5702,6 +5743,7 @@ const bfd_target VAR = \ UNDER, /* Leading symbol underscore. */ \ '/', /* AR_pad_char. */ \ 15, /* AR_max_namelen. */ \ + 0, /* match priority. */ \ \ /* Data conversion functions. */ \ bfd_getb64, bfd_getb_signed_64, bfd_putb64, \ @@ -5752,6 +5794,7 @@ const bfd_target VAR = \ UNDER, /* Leading symbol underscore. */ \ '/', /* AR_pad_char. */ \ 15, /* AR_max_namelen. */ \ + 0, /* match priority. */ \ \ /* Data conversion functions. */ \ bfd_getl64, bfd_getl_signed_64, bfd_putl64, \ diff --git a/bfd/coffgen.c b/bfd/coffgen.c index fc82d57..bbb0acc 100644 --- a/bfd/coffgen.c +++ b/bfd/coffgen.c @@ -915,6 +915,9 @@ coff_write_symbol (bfd *abfd, unsigned int numaux = native->u.syment.n_numaux; int type = native->u.syment.n_type; int n_sclass = (int) native->u.syment.n_sclass; + asection *output_section = symbol->section->output_section + ? symbol->section->output_section + : symbol->section; void * buf; bfd_size_type symesz; @@ -933,7 +936,7 @@ coff_write_symbol (bfd *abfd, else native->u.syment.n_scnum = - symbol->section->output_section->target_index; + output_section->target_index; coff_fix_symbol_name (abfd, symbol, native, string_size_p, debug_string_section_p, debug_string_size_p); @@ -990,6 +993,9 @@ coff_write_alien_symbol (bfd *abfd, { combined_entry_type *native; combined_entry_type dummy; + asection *output_section = symbol->section->output_section + ? symbol->section->output_section + : symbol->section; native = &dummy; native->u.syment.n_type = T_NULL; @@ -1015,12 +1021,11 @@ coff_write_alien_symbol (bfd *abfd, } else { - native->u.syment.n_scnum = - symbol->section->output_section->target_index; + native->u.syment.n_scnum = output_section->target_index; native->u.syment.n_value = (symbol->value + symbol->section->output_offset); if (! obj_pe (abfd)) - native->u.syment.n_value += symbol->section->output_section->vma; + native->u.syment.n_value += output_section->vma; /* Copy the any flags from the file header into the symbol. FIXME: Why? */ @@ -2394,3 +2399,70 @@ bfd_coff_get_comdat_section (bfd *abfd, struct bfd_section *sec) else return NULL; } + +bfd_boolean +_bfd_coff_section_already_linked (bfd *abfd, + asection *sec, + struct bfd_link_info *info) +{ + flagword flags; + const char *name, *key; + struct bfd_section_already_linked *l; + struct bfd_section_already_linked_hash_entry *already_linked_list; + struct coff_comdat_info *s_comdat; + + flags = sec->flags; + if ((flags & SEC_LINK_ONCE) == 0) + return FALSE; + + /* The COFF backend linker doesn't support group sections. */ + if ((flags & SEC_GROUP) != 0) + return FALSE; + + name = bfd_get_section_name (abfd, sec); + s_comdat = bfd_coff_get_comdat_section (abfd, sec); + + if (s_comdat != NULL) + key = s_comdat->name; + else + { + if (CONST_STRNEQ (name, ".gnu.linkonce.") + && (key = strchr (name + sizeof (".gnu.linkonce.") - 1, '.')) != NULL) + key++; + else + /* FIXME: gcc as of 2011-09 emits sections like .text$, + .xdata$ and .pdata$ only the first of which has a + comdat key. Should these all match the LTO IR key? */ + key = name; + } + + already_linked_list = bfd_section_already_linked_table_lookup (key); + + for (l = already_linked_list->entry; l != NULL; l = l->next) + { + struct coff_comdat_info *l_comdat; + + l_comdat = bfd_coff_get_comdat_section (l->sec->owner, l->sec); + + /* The section names must match, and both sections must be + comdat and have the same comdat name, or both sections must + be non-comdat. LTO IR plugin sections are an exception. They + are always named .gnu.linkonce.t. ( is some string) + and match any comdat section with comdat name of , and + any linkonce section with the same suffix, ie. + .gnu.linkonce.*.. */ + if (((s_comdat != NULL) == (l_comdat != NULL) + && strcmp (name, l->sec->name) == 0) + || (l->sec->owner->flags & BFD_PLUGIN) != 0) + { + /* The section has already been linked. See if we should + issue a warning. */ + return _bfd_handle_already_linked (sec, l, info); + } + } + + /* This is the first section with this name. Record it. */ + if (!bfd_section_already_linked_table_insert (already_linked_list, sec)) + info->callbacks->einfo (_("%F%P: already_linked_table: %E\n")); + return FALSE; +} diff --git a/bfd/cofflink.c b/bfd/cofflink.c index 33de7fe..bca1364 100644 --- a/bfd/cofflink.c +++ b/bfd/cofflink.c @@ -1,6 +1,6 @@ /* COFF specific linker code. Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, - 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. + 2004, 2005, 2006, 2007, 2008, 2009, 2011 Free Software Foundation, Inc. Written by Ian Lance Taylor, Cygnus Support. This file is part of BFD, the Binary File Descriptor library. @@ -1019,8 +1019,7 @@ _bfd_coff_final_link (bfd *abfd, /* Write out the global symbols. */ finfo.failed = FALSE; - coff_link_hash_traverse (coff_hash_table (info), - _bfd_coff_write_global_sym, &finfo); + bfd_hash_traverse (&info->hash->table, _bfd_coff_write_global_sym, &finfo); if (finfo.failed) goto error_return; @@ -2365,6 +2364,35 @@ _bfd_coff_link_input_bfd (struct coff_final_link_info *finfo, bfd *input_bfd) if (internal_relocs == NULL) return FALSE; + /* Run through the relocs looking for relocs against symbols + coming from discarded sections and complain about them. */ + irel = internal_relocs; + for (; irel < &internal_relocs[o->reloc_count]; irel++) + { + struct coff_link_hash_entry *h; + asection *ps = NULL; + long symndx = irel->r_symndx; + if (symndx < 0) + continue; + h = obj_coff_sym_hashes (input_bfd)[symndx]; + if (h == NULL) + continue; + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct coff_link_hash_entry *) h->root.u.i.link; + if (h->root.type == bfd_link_hash_defined + || h->root.type == bfd_link_hash_defweak) + ps = h->root.u.def.section; + if (ps == NULL) + continue; + /* Complain if definition comes from an excluded section. */ + if (ps->flags & SEC_EXCLUDE) + (*finfo->info->callbacks->einfo) + (_("%X`%s' referenced in section `%A' of %B: " + "defined in discarded section `%A' of %B\n"), + h->root.root.string, o, input_bfd, ps, ps->owner); + } + /* Call processor specific code to relocate the section contents. */ if (! bfd_coff_relocate_section (output_bfd, finfo->info, @@ -2487,11 +2515,12 @@ _bfd_coff_link_input_bfd (struct coff_final_link_info *finfo, bfd *input_bfd) return TRUE; } -/* Write out a global symbol. Called via coff_link_hash_traverse. */ +/* Write out a global symbol. Called via bfd_hash_traverse. */ bfd_boolean -_bfd_coff_write_global_sym (struct coff_link_hash_entry *h, void *data) +_bfd_coff_write_global_sym (struct bfd_hash_entry *bh, void *data) { + struct coff_link_hash_entry *h = (struct coff_link_hash_entry *) bh; struct coff_final_link_info *finfo = (struct coff_final_link_info *) data; bfd *output_bfd; struct internal_syment isym; @@ -2716,7 +2745,7 @@ _bfd_coff_write_task_globals (struct coff_link_hash_entry *h, void *data) case bfd_link_hash_defweak: save_global_to_static = finfo->global_to_static; finfo->global_to_static = TRUE; - rtnval = _bfd_coff_write_global_sym (h, data); + rtnval = _bfd_coff_write_global_sym (&h->root.root, data); finfo->global_to_static = save_global_to_static; break; default: diff --git a/bfd/config.bfd b/bfd/config.bfd index 2cf6be4..3b9872a 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -100,6 +100,8 @@ s390*) targ_archs=bfd_s390_arch ;; sh*) targ_archs=bfd_sh_arch ;; sparc*) targ_archs=bfd_sparc_arch ;; spu*) targ_archs=bfd_spu_arch ;; +tilegx*) targ_archs=bfd_tilegx_arch ;; +tilepro*) targ_archs=bfd_tilepro_arch ;; v850*) targ_archs=bfd_v850_arch ;; x86_64*) targ_archs=bfd_i386_arch ;; xtensa*) targ_archs=bfd_xtensa_arch ;; @@ -458,13 +460,13 @@ case "${targ}" in i[3-7]86-*-solaris2*) targ_defvec=bfd_elf32_i386_sol2_vec targ_selvecs="i386coff_vec" - targ64_selvecs="bfd_elf64_x86_64_sol2_vec bfd_elf64_l1om_vec" + targ64_selvecs="bfd_elf64_x86_64_sol2_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec" want64=true ;; #ifdef BFD64 x86_64-*-solaris2*) targ_defvec=bfd_elf32_i386_sol2_vec - targ_selvecs="bfd_elf64_x86_64_sol2_vec bfd_elf64_l1om_vec i386coff_vec" + targ_selvecs="bfd_elf64_x86_64_sol2_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec i386coff_vec" want64=true ;; #endif @@ -484,7 +486,7 @@ case "${targ}" in ;; i[3-7]86-*-dicos*) targ_defvec=bfd_elf32_i386_vec - targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf64_l1om_vec" + targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec" ;; *-*-msdosdjgpp* | *-*-go32* ) targ_defvec=go32coff_vec @@ -513,7 +515,7 @@ case "${targ}" in ;; i[3-7]86-*-dragonfly*) targ_defvec=bfd_elf32_i386_vec - targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf64_l1om_vec" + targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec" ;; i[3-7]86-*-freebsdaout* | i[3-7]86-*-freebsd[12].* | \ i[3-7]86-*-freebsd[12]) @@ -524,7 +526,7 @@ case "${targ}" in i[3-7]86-*-freebsd* | i[3-7]86-*-kfreebsd*-gnu) targ_defvec=bfd_elf32_i386_freebsd_vec targ_selvecs="bfd_elf32_i386_vec i386pei_vec i386coff_vec" - targ64_selvecs="bfd_elf64_x86_64_freebsd_vec bfd_elf64_x86_64_vec x86_64pei_vec bfd_elf64_l1om_vec bfd_elf64_l1om_freebsd_vec" + targ64_selvecs="bfd_elf64_x86_64_freebsd_vec bfd_elf64_x86_64_vec x86_64pei_vec bfd_elf64_l1om_vec bfd_elf64_l1om_freebsd_vec bfd_elf64_k1om_vec bfd_elf64_k1om_freebsd_vec" # FreeBSD <= 4.0 supports only the old nonstandard way of ABI labelling. case "${targ}" in i[3-7]86-*-freebsd3* | i[3-7]86-*-freebsd4 | i[3-7]86-*-freebsd4.0*) @@ -534,7 +536,7 @@ case "${targ}" in i[3-7]86-*-netbsdelf* | i[3-7]86-*-netbsd*-gnu* | i[3-7]86-*-knetbsd*-gnu) targ_defvec=bfd_elf32_i386_vec targ_selvecs=i386netbsd_vec - targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf64_l1om_vec" + targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec" ;; i[3-7]86-*-netbsdpe*) targ_defvec=i386pe_vec @@ -562,7 +564,11 @@ case "${targ}" in i[3-7]86-*-linux-*) targ_defvec=bfd_elf32_i386_vec targ_selvecs="i386linux_vec i386pei_vec" - targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf32_x86_64_vec bfd_elf64_l1om_vec" + targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf32_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec" + ;; + i[3-7]86-*-nacl*) + targ_defvec=bfd_elf32_i386_nacl_vec + targ_selvecs="bfd_elf32_i386_vec" ;; #ifdef BFD64 x86_64-*-darwin*) @@ -573,37 +579,37 @@ case "${targ}" in ;; x86_64-*-dicos*) targ_defvec=bfd_elf64_x86_64_vec - targ_selvecs="bfd_elf32_i386_vec bfd_elf64_l1om_vec" + targ_selvecs="bfd_elf32_i386_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec" want64=true ;; x86_64-*-elf*) targ_defvec=bfd_elf64_x86_64_vec - targ_selvecs="bfd_elf32_i386_vec bfd_elf64_l1om_vec i386coff_vec" + targ_selvecs="bfd_elf32_i386_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec i386coff_vec" want64=true ;; x86_64-*-dragonfly*) targ_defvec=bfd_elf64_x86_64_vec - targ_selvecs="bfd_elf32_i386_vec bfd_elf64_l1om_vec" + targ_selvecs="bfd_elf32_i386_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec" want64=true ;; x86_64-*-freebsd* | x86_64-*-kfreebsd*-gnu) targ_defvec=bfd_elf64_x86_64_freebsd_vec - targ_selvecs="bfd_elf32_i386_freebsd_vec i386coff_vec i386pei_vec x86_64pei_vec bfd_elf32_i386_vec bfd_elf64_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_l1om_freebsd_vec" + targ_selvecs="bfd_elf32_i386_freebsd_vec i386coff_vec i386pei_vec x86_64pei_vec bfd_elf32_i386_vec bfd_elf64_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_l1om_freebsd_vec bfd_elf64_k1om_vec bfd_elf64_k1om_freebsd_vec" want64=true ;; x86_64-*-netbsd* | x86_64-*-openbsd*) targ_defvec=bfd_elf64_x86_64_vec - targ_selvecs="bfd_elf32_i386_vec i386netbsd_vec i386coff_vec i386pei_vec x86_64pei_vec bfd_elf64_l1om_vec" + targ_selvecs="bfd_elf32_i386_vec i386netbsd_vec i386coff_vec i386pei_vec x86_64pei_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec" want64=true ;; x86_64-*-linux-*) targ_defvec=bfd_elf64_x86_64_vec - targ_selvecs="bfd_elf32_i386_vec bfd_elf32_x86_64_vec i386linux_vec i386pei_vec x86_64pei_vec bfd_elf64_l1om_vec" + targ_selvecs="bfd_elf32_i386_vec bfd_elf32_x86_64_vec i386linux_vec i386pei_vec x86_64pei_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec" want64=true ;; - x86_64-*-mingw*) + x86_64-*-mingw* | x86_64-*-pe | x86_64-*-pep) targ_defvec=x86_64pe_vec - targ_selvecs="x86_64pe_vec x86_64pei_vec bfd_elf64_x86_64_vec bfd_elf64_l1om_vec i386pe_vec i386pei_vec bfd_elf32_i386_vec" + targ_selvecs="x86_64pe_vec x86_64pei_vec bfd_elf64_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec i386pe_vec i386pei_vec bfd_elf32_i386_vec" want64=true targ_underscore=no ;; @@ -712,12 +718,12 @@ case "${targ}" in targ_defvec=bfd_elf32_lm32_vec targ_selvecs=bfd_elf32_lm32fdpic_vec ;; - + lm32-*-*linux*) targ_defvec=bfd_elf32_lm32fdpic_vec targ_selvecs=bfd_elf32_lm32_vec ;; - + m32c-*-elf | m32c-*-rtems*) targ_defvec=bfd_elf32_m32c_vec ;; @@ -925,11 +931,11 @@ case "${targ}" in want64=true ;; #endif - mips*el-sde-elf*) + mips*el-sde-elf*) targ_defvec=bfd_elf32_tradlittlemips_vec targ_selvecs="bfd_elf32_tradbigmips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec" want64=true - ;; + ;; mips*-sde-elf*) targ_defvec=bfd_elf32_tradbigmips_vec targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec" @@ -1189,7 +1195,7 @@ case "${targ}" in rx-*-elf) targ_defvec=bfd_elf32_rx_le_vec - targ_selvecs="bfd_elf32_rx_be_vec bfd_elf32_rx_le_vec" + targ_selvecs="bfd_elf32_rx_be_vec bfd_elf32_rx_le_vec bfd_elf32_rx_be_ns_vec" ;; s390-*-linux*) @@ -1465,9 +1471,14 @@ case "${targ}" in ;; #endif - tic6x-*-*) - targ_defvec=bfd_elf32_tic6x_le_vec - targ_selvecs=bfd_elf32_tic6x_be_vec + tic6x-*-elf) + targ_defvec=bfd_elf32_tic6x_elf_le_vec + targ_selvecs="bfd_elf32_tic6x_elf_be_vec bfd_elf32_tic6x_le_vec bfd_elf32_tic6x_be_vec" + ;; + + tic6x-*-uclinux) + targ_defvec=bfd_elf32_tic6x_linux_le_vec + targ_selvecs="bfd_elf32_tic6x_linux_be_vec bfd_elf32_tic6x_le_vec bfd_elf32_tic6x_be_vec" ;; tic80*-*-*) @@ -1475,6 +1486,17 @@ case "${targ}" in targ_underscore=yes ;; +#ifdef BFD64 + tilegx-*-*) + targ_defvec=bfd_elf64_tilegx_vec + targ_selvecs=bfd_elf32_tilegx_vec + ;; +#endif + + tilepro-*-*) + targ_defvec=bfd_elf32_tilepro_vec + ;; + v850*-*-*) targ_defvec=bfd_elf32_v850_vec ;; @@ -1523,7 +1545,7 @@ case "${targ}" in xc16x-*-elf) targ_defvec=bfd_elf32_xc16x_vec ;; - + z80-*-*) targ_defvec=z80coff_vec targ_underscore=no @@ -1585,3 +1607,10 @@ case "${targ_defvec} ${targ_selvecs}" in targ_archs="$targ_archs bfd_l1om_arch" ;; esac + +# If we support Intel K1OM target, then add support for bfd_k1om_arch. +case "${targ_defvec} ${targ_selvecs}" in + *bfd_elf64_k1om_vec*) + targ_archs="$targ_archs bfd_k1om_arch" + ;; +esac diff --git a/bfd/config.in b/bfd/config.in index b0b97a2..98157e1 100644 --- a/bfd/config.in +++ b/bfd/config.in @@ -144,9 +144,15 @@ /* Define if has prpsinfo32_t. */ #undef HAVE_PRPSINFO32_T +/* Define if has prpsinfo32_t.pr_pid. */ +#undef HAVE_PRPSINFO32_T_PR_PID + /* Define if has prpsinfo_t. */ #undef HAVE_PRPSINFO_T +/* Define if has prpsinfo_t.pr_pid. */ +#undef HAVE_PRPSINFO_T_PR_PID + /* Define if has prstatus32_t. */ #undef HAVE_PRSTATUS32_T @@ -162,9 +168,15 @@ /* Define if has psinfo32_t. */ #undef HAVE_PSINFO32_T +/* Define if has psinfo32_t.pr_pid. */ +#undef HAVE_PSINFO32_T_PR_PID + /* Define if has psinfo_t. */ #undef HAVE_PSINFO_T +/* Define if has psinfo_t.pr_pid. */ +#undef HAVE_PSINFO_T_PR_PID + /* Define if has pstatus32_t. */ #undef HAVE_PSTATUS32_T diff --git a/bfd/configure b/bfd/configure index d587593..bc242b9 100755 --- a/bfd/configure +++ b/bfd/configure @@ -3988,7 +3988,7 @@ fi # Define the identity of the package. PACKAGE=bfd - VERSION=2.21.51 + VERSION=2.22 cat >>confdefs.h <<_ACEOF @@ -14379,6 +14379,43 @@ $as_echo "#define HAVE_PRPSINFO_T 1" >>confdefs.h { $as_echo "$as_me:${as_lineno-$LINENO}: result: $bfd_cv_have_sys_procfs_type_prpsinfo_t" >&5 $as_echo "$bfd_cv_have_sys_procfs_type_prpsinfo_t" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for prpsinfo_t.pr_pid in sys/procfs.h" >&5 +$as_echo_n "checking for prpsinfo_t.pr_pid in sys/procfs.h... " >&6; } + if test "${bfd_cv_have_sys_procfs_type_member_prpsinfo_t_pr_pid+set}" = set; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +#define _SYSCALL32 +/* Needed for new procfs interface on sparc-solaris. */ +#define _STRUCTURED_PROC 1 +#include +int +main () +{ +prpsinfo_t avar; void* aref = (void*) &avar.pr_pid + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + bfd_cv_have_sys_procfs_type_member_prpsinfo_t_pr_pid=yes +else + bfd_cv_have_sys_procfs_type_member_prpsinfo_t_pr_pid=no + +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + + if test $bfd_cv_have_sys_procfs_type_member_prpsinfo_t_pr_pid = yes; then + +$as_echo "#define HAVE_PRPSINFO_T_PR_PID 1" >>confdefs.h + + fi + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $bfd_cv_have_sys_procfs_type_member_prpsinfo_t_pr_pid" >&5 +$as_echo "$bfd_cv_have_sys_procfs_type_member_prpsinfo_t_pr_pid" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for prpsinfo32_t in sys/procfs.h" >&5 $as_echo_n "checking for prpsinfo32_t in sys/procfs.h... " >&6; } if test "${bfd_cv_have_sys_procfs_type_prpsinfo32_t+set}" = set; then : @@ -14416,6 +14453,43 @@ $as_echo "#define HAVE_PRPSINFO32_T 1" >>confdefs.h { $as_echo "$as_me:${as_lineno-$LINENO}: result: $bfd_cv_have_sys_procfs_type_prpsinfo32_t" >&5 $as_echo "$bfd_cv_have_sys_procfs_type_prpsinfo32_t" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for prpsinfo32_t.pr_pid in sys/procfs.h" >&5 +$as_echo_n "checking for prpsinfo32_t.pr_pid in sys/procfs.h... " >&6; } + if test "${bfd_cv_have_sys_procfs_type_member_prpsinfo32_t_pr_pid+set}" = set; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +#define _SYSCALL32 +/* Needed for new procfs interface on sparc-solaris. */ +#define _STRUCTURED_PROC 1 +#include +int +main () +{ +prpsinfo32_t avar; void* aref = (void*) &avar.pr_pid + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + bfd_cv_have_sys_procfs_type_member_prpsinfo32_t_pr_pid=yes +else + bfd_cv_have_sys_procfs_type_member_prpsinfo32_t_pr_pid=no + +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + + if test $bfd_cv_have_sys_procfs_type_member_prpsinfo32_t_pr_pid = yes; then + +$as_echo "#define HAVE_PRPSINFO32_T_PR_PID 1" >>confdefs.h + + fi + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $bfd_cv_have_sys_procfs_type_member_prpsinfo32_t_pr_pid" >&5 +$as_echo "$bfd_cv_have_sys_procfs_type_member_prpsinfo32_t_pr_pid" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for psinfo_t in sys/procfs.h" >&5 $as_echo_n "checking for psinfo_t in sys/procfs.h... " >&6; } if test "${bfd_cv_have_sys_procfs_type_psinfo_t+set}" = set; then : @@ -14453,6 +14527,43 @@ $as_echo "#define HAVE_PSINFO_T 1" >>confdefs.h { $as_echo "$as_me:${as_lineno-$LINENO}: result: $bfd_cv_have_sys_procfs_type_psinfo_t" >&5 $as_echo "$bfd_cv_have_sys_procfs_type_psinfo_t" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for psinfo_t.pr_pid in sys/procfs.h" >&5 +$as_echo_n "checking for psinfo_t.pr_pid in sys/procfs.h... " >&6; } + if test "${bfd_cv_have_sys_procfs_type_member_psinfo_t_pr_pid+set}" = set; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +#define _SYSCALL32 +/* Needed for new procfs interface on sparc-solaris. */ +#define _STRUCTURED_PROC 1 +#include +int +main () +{ +psinfo_t avar; void* aref = (void*) &avar.pr_pid + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + bfd_cv_have_sys_procfs_type_member_psinfo_t_pr_pid=yes +else + bfd_cv_have_sys_procfs_type_member_psinfo_t_pr_pid=no + +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + + if test $bfd_cv_have_sys_procfs_type_member_psinfo_t_pr_pid = yes; then + +$as_echo "#define HAVE_PSINFO_T_PR_PID 1" >>confdefs.h + + fi + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $bfd_cv_have_sys_procfs_type_member_psinfo_t_pr_pid" >&5 +$as_echo "$bfd_cv_have_sys_procfs_type_member_psinfo_t_pr_pid" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for psinfo32_t in sys/procfs.h" >&5 $as_echo_n "checking for psinfo32_t in sys/procfs.h... " >&6; } if test "${bfd_cv_have_sys_procfs_type_psinfo32_t+set}" = set; then : @@ -14490,6 +14601,43 @@ $as_echo "#define HAVE_PSINFO32_T 1" >>confdefs.h { $as_echo "$as_me:${as_lineno-$LINENO}: result: $bfd_cv_have_sys_procfs_type_psinfo32_t" >&5 $as_echo "$bfd_cv_have_sys_procfs_type_psinfo32_t" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for psinfo32_t.pr_pid in sys/procfs.h" >&5 +$as_echo_n "checking for psinfo32_t.pr_pid in sys/procfs.h... " >&6; } + if test "${bfd_cv_have_sys_procfs_type_member_psinfo32_t_pr_pid+set}" = set; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +#define _SYSCALL32 +/* Needed for new procfs interface on sparc-solaris. */ +#define _STRUCTURED_PROC 1 +#include +int +main () +{ +psinfo32_t avar; void* aref = (void*) &avar.pr_pid + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + bfd_cv_have_sys_procfs_type_member_psinfo32_t_pr_pid=yes +else + bfd_cv_have_sys_procfs_type_member_psinfo32_t_pr_pid=no + +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + + if test $bfd_cv_have_sys_procfs_type_member_psinfo32_t_pr_pid = yes; then + +$as_echo "#define HAVE_PSINFO32_T_PR_PID 1" >>confdefs.h + + fi + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $bfd_cv_have_sys_procfs_type_member_psinfo32_t_pr_pid" >&5 +$as_echo "$bfd_cv_have_sys_procfs_type_member_psinfo32_t_pr_pid" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for lwpstatus_t in sys/procfs.h" >&5 $as_echo_n "checking for lwpstatus_t in sys/procfs.h... " >&6; } if test "${bfd_cv_have_sys_procfs_type_lwpstatus_t+set}" = set; then : @@ -15062,13 +15210,14 @@ do bfd_elf32_i370_vec) tb="$tb elf32-i370.lo elf32.lo $elf" ;; bfd_elf32_i386_sol2_vec) tb="$tb elf32-i386.lo elf-ifunc.lo elf-vxworks.lo elf32.lo $elf" ;; bfd_elf32_i386_freebsd_vec) tb="$tb elf32-i386.lo elf-ifunc.lo elf-vxworks.lo elf32.lo $elf" ;; + bfd_elf32_i386_nacl_vec) tb="$tb elf32-i386.lo elf-ifunc.lo elf-vxworks.lo elf32.lo $elf" ;; bfd_elf32_i386_vxworks_vec) tb="$tb elf32-i386.lo elf-ifunc.lo elf-vxworks.lo elf32.lo $elf" ;; bfd_elf32_i386_vec) tb="$tb elf32-i386.lo elf-ifunc.lo elf-vxworks.lo elf32.lo $elf" ;; bfd_elf32_i860_little_vec) tb="$tb elf32-i860.lo elf32.lo $elf" ;; bfd_elf32_i860_vec) tb="$tb elf32-i860.lo elf32.lo $elf" ;; bfd_elf32_i960_vec) tb="$tb elf32-i960.lo elf32.lo $elf" ;; - bfd_elf32_ia64_big_vec) tb="$tb elf32-ia64.lo elf32.lo $elf" ;; - bfd_elf32_ia64_hpux_big_vec) tb="$tb elf32-ia64.lo elf32.lo $elf";; + bfd_elf32_ia64_big_vec) tb="$tb elf32-ia64.lo elfxx-ia64.lo elf32.lo $elf" ;; + bfd_elf32_ia64_hpux_big_vec) tb="$tb elf32-ia64.lo elfxx-ia64.lo elf32.lo $elf";; bfd_elf32_ip2k_vec) tb="$tb elf32-ip2k.lo elf32.lo $elf" ;; bfd_elf32_iq2000_vec) tb="$tb elf32-iq2000.lo elf32.lo $elf" ;; bfd_elf32_lm32_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; @@ -15116,6 +15265,7 @@ do bfd_elf32_powerpc_vxworks_vec) tb="$tb elf32-ppc.lo elf-vxworks.lo elf32.lo $elf" ;; bfd_elf32_rx_le_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; bfd_elf32_rx_be_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; + bfd_elf32_rx_be_ns_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; bfd_elf32_s390_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;; bfd_elf32_bigscore_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64;; bfd_elf32_littlescore_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64;; @@ -15145,6 +15295,12 @@ do bfd_elf32_spu_vec) tb="$tb elf32-spu.lo elf32.lo $elf" ;; bfd_elf32_tic6x_be_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; bfd_elf32_tic6x_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; + bfd_elf32_tic6x_linux_be_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; + bfd_elf32_tic6x_linux_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; + bfd_elf32_tic6x_elf_be_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; + bfd_elf32_tic6x_elf_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; + bfd_elf32_tilegx_vec) tb="$tb elf32-tilegx.lo elfxx-tilegx.lo elf32.lo $elf" ; target_size=32 ;; + bfd_elf32_tilepro_vec) tb="$tb elf32-tilepro.lo elf32.lo $elf" ;; bfd_elf32_tradbigmips_vec | bfd_elf32_tradbigmips_freebsd_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;; bfd_elf32_tradlittlemips_vec | bfd_elf32_tradlittlemips_freebsd_vec) @@ -15162,10 +15318,10 @@ do bfd_elf64_bigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;; bfd_elf64_hppa_linux_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_hppa_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;; - bfd_elf64_ia64_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;; - bfd_elf64_ia64_hpux_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;; - bfd_elf64_ia64_little_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;; - bfd_elf64_ia64_vms_vec) tb="$tb elf64-ia64.lo elf64.lo vms-lib.lo vms-misc.lo $elf"; target_size=64 ;; + bfd_elf64_ia64_big_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_ia64_hpux_big_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_ia64_little_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_ia64_vms_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo vms-lib.lo vms-misc.lo $elf"; target_size=64 ;; bfd_elf64_little_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;; bfd_elf64_mmix_vec) tb="$tb elf64-mmix.lo elf64.lo $elf" target_size=64 ;; @@ -15181,6 +15337,7 @@ do bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_sparc_freebsd_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_sparc_sol2_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_tilegx_vec) tb="$tb elf64-tilegx.lo elfxx-tilegx.lo elf64.lo $elf" ; target_size=64 ;; bfd_elf64_tradbigmips_vec | bfd_elf64_tradbigmips_freebsd_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;; bfd_elf64_tradlittlemips_vec | bfd_elf64_tradlittlemips_freebsd_vec) @@ -15191,6 +15348,8 @@ do bfd_elf32_x86_64_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo elf32.lo $elf"; target_size=64 ;; bfd_elf64_l1om_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_l1om_freebsd_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_k1om_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_k1om_freebsd_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; bfd_mmo_vec) tb="$tb mmo.lo" target_size=64 ;; bfd_powerpc_pe_vec) tb="$tb pe-ppc.lo peigen.lo cofflink.lo" ;; bfd_powerpc_pei_vec) tb="$tb pei-ppc.lo peigen.lo cofflink.lo" ;; diff --git a/bfd/configure.in b/bfd/configure.in index eaba44c..435aaaa 100644 --- a/bfd/configure.in +++ b/bfd/configure.in @@ -8,7 +8,7 @@ AC_CONFIG_SRCDIR([libbfd.c]) AC_CANONICAL_TARGET AC_ISC_POSIX -AM_INIT_AUTOMAKE(bfd, 2.21.51) +AM_INIT_AUTOMAKE(bfd, 2.22) dnl These must be called before LT_INIT, because it may want dnl to call AC_CHECK_PROG. @@ -488,9 +488,13 @@ changequote([,])dnl BFD_HAVE_SYS_PROCFS_TYPE(pxstatus_t) BFD_HAVE_SYS_PROCFS_TYPE(pstatus32_t) BFD_HAVE_SYS_PROCFS_TYPE(prpsinfo_t) + BFD_HAVE_SYS_PROCFS_TYPE_MEMBER(prpsinfo_t, pr_pid) BFD_HAVE_SYS_PROCFS_TYPE(prpsinfo32_t) + BFD_HAVE_SYS_PROCFS_TYPE_MEMBER(prpsinfo32_t, pr_pid) BFD_HAVE_SYS_PROCFS_TYPE(psinfo_t) + BFD_HAVE_SYS_PROCFS_TYPE_MEMBER(psinfo_t, pr_pid) BFD_HAVE_SYS_PROCFS_TYPE(psinfo32_t) + BFD_HAVE_SYS_PROCFS_TYPE_MEMBER(psinfo32_t, pr_pid) BFD_HAVE_SYS_PROCFS_TYPE(lwpstatus_t) BFD_HAVE_SYS_PROCFS_TYPE(lwpxstatus_t) BFD_HAVE_SYS_PROCFS_TYPE_MEMBER(lwpstatus_t, pr_context) @@ -705,13 +709,14 @@ do bfd_elf32_i370_vec) tb="$tb elf32-i370.lo elf32.lo $elf" ;; bfd_elf32_i386_sol2_vec) tb="$tb elf32-i386.lo elf-ifunc.lo elf-vxworks.lo elf32.lo $elf" ;; bfd_elf32_i386_freebsd_vec) tb="$tb elf32-i386.lo elf-ifunc.lo elf-vxworks.lo elf32.lo $elf" ;; + bfd_elf32_i386_nacl_vec) tb="$tb elf32-i386.lo elf-ifunc.lo elf-vxworks.lo elf32.lo $elf" ;; bfd_elf32_i386_vxworks_vec) tb="$tb elf32-i386.lo elf-ifunc.lo elf-vxworks.lo elf32.lo $elf" ;; bfd_elf32_i386_vec) tb="$tb elf32-i386.lo elf-ifunc.lo elf-vxworks.lo elf32.lo $elf" ;; bfd_elf32_i860_little_vec) tb="$tb elf32-i860.lo elf32.lo $elf" ;; bfd_elf32_i860_vec) tb="$tb elf32-i860.lo elf32.lo $elf" ;; bfd_elf32_i960_vec) tb="$tb elf32-i960.lo elf32.lo $elf" ;; - bfd_elf32_ia64_big_vec) tb="$tb elf32-ia64.lo elf32.lo $elf" ;; - bfd_elf32_ia64_hpux_big_vec) tb="$tb elf32-ia64.lo elf32.lo $elf";; + bfd_elf32_ia64_big_vec) tb="$tb elf32-ia64.lo elfxx-ia64.lo elf32.lo $elf" ;; + bfd_elf32_ia64_hpux_big_vec) tb="$tb elf32-ia64.lo elfxx-ia64.lo elf32.lo $elf";; bfd_elf32_ip2k_vec) tb="$tb elf32-ip2k.lo elf32.lo $elf" ;; bfd_elf32_iq2000_vec) tb="$tb elf32-iq2000.lo elf32.lo $elf" ;; bfd_elf32_lm32_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; @@ -759,6 +764,7 @@ do bfd_elf32_powerpc_vxworks_vec) tb="$tb elf32-ppc.lo elf-vxworks.lo elf32.lo $elf" ;; bfd_elf32_rx_le_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; bfd_elf32_rx_be_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; + bfd_elf32_rx_be_ns_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; bfd_elf32_s390_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;; bfd_elf32_bigscore_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64;; bfd_elf32_littlescore_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64;; @@ -788,6 +794,12 @@ do bfd_elf32_spu_vec) tb="$tb elf32-spu.lo elf32.lo $elf" ;; bfd_elf32_tic6x_be_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; bfd_elf32_tic6x_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; + bfd_elf32_tic6x_linux_be_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; + bfd_elf32_tic6x_linux_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; + bfd_elf32_tic6x_elf_be_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; + bfd_elf32_tic6x_elf_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;; + bfd_elf32_tilegx_vec) tb="$tb elf32-tilegx.lo elfxx-tilegx.lo elf32.lo $elf" ; target_size=32 ;; + bfd_elf32_tilepro_vec) tb="$tb elf32-tilepro.lo elf32.lo $elf" ;; bfd_elf32_tradbigmips_vec | bfd_elf32_tradbigmips_freebsd_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;; bfd_elf32_tradlittlemips_vec | bfd_elf32_tradlittlemips_freebsd_vec) @@ -805,10 +817,10 @@ do bfd_elf64_bigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;; bfd_elf64_hppa_linux_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_hppa_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;; - bfd_elf64_ia64_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;; - bfd_elf64_ia64_hpux_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;; - bfd_elf64_ia64_little_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;; - bfd_elf64_ia64_vms_vec) tb="$tb elf64-ia64.lo elf64.lo vms-lib.lo vms-misc.lo $elf"; target_size=64 ;; + bfd_elf64_ia64_big_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_ia64_hpux_big_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_ia64_little_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_ia64_vms_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo vms-lib.lo vms-misc.lo $elf"; target_size=64 ;; bfd_elf64_little_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;; bfd_elf64_mmix_vec) tb="$tb elf64-mmix.lo elf64.lo $elf" target_size=64 ;; @@ -824,6 +836,7 @@ do bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_sparc_freebsd_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_sparc_sol2_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_tilegx_vec) tb="$tb elf64-tilegx.lo elfxx-tilegx.lo elf64.lo $elf" ; target_size=64 ;; bfd_elf64_tradbigmips_vec | bfd_elf64_tradbigmips_freebsd_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;; bfd_elf64_tradlittlemips_vec | bfd_elf64_tradlittlemips_freebsd_vec) @@ -834,6 +847,8 @@ do bfd_elf32_x86_64_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo elf32.lo $elf"; target_size=64 ;; bfd_elf64_l1om_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_l1om_freebsd_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_k1om_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; + bfd_elf64_k1om_freebsd_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; bfd_mmo_vec) tb="$tb mmo.lo" target_size=64 ;; bfd_powerpc_pe_vec) tb="$tb pe-ppc.lo peigen.lo cofflink.lo" ;; bfd_powerpc_pei_vec) tb="$tb pei-ppc.lo peigen.lo cofflink.lo" ;; diff --git a/bfd/cpu-i386.c b/bfd/cpu-i386.c index c4f41c5..f98c0e5 100644 --- a/bfd/cpu-i386.c +++ b/bfd/cpu-i386.c @@ -31,7 +31,8 @@ bfd_i386_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *compat = bfd_default_compatible (a, b); /* Don't allow mixing x64_32 with x86_64. */ - if (compat && a->bits_per_address != b->bits_per_address) + if (compat + && (a->mach & bfd_mach_x64_32) != (b->mach & bfd_mach_x64_32)) compat = NULL; return compat; @@ -40,7 +41,7 @@ bfd_i386_compatible (const bfd_arch_info_type *a, static const bfd_arch_info_type bfd_x64_32_arch_intel_syntax = { 64, /* 64 bits in a word */ - 32, /* 32 bits in an address */ + 64, /* 64 bits in an address */ 8, /* 8 bits in a byte */ bfd_arch_i386, bfd_mach_x64_32_intel_syntax, @@ -104,7 +105,7 @@ static const bfd_arch_info_type i8086_arch = static const bfd_arch_info_type bfd_x64_32_arch = { 64, /* 64 bits in a word */ - 32, /* 32 bits in an address */ + 64, /* 64 bits in an address */ 8, /* 8 bits in a byte */ bfd_arch_i386, bfd_mach_x64_32, diff --git a/bfd/cpu-k1om.c b/bfd/cpu-k1om.c new file mode 100644 index 0000000..fa030ae --- /dev/null +++ b/bfd/cpu-k1om.c @@ -0,0 +1,56 @@ +/* BFD support for the Intel K1OM architecture. + Copyright 2011 + Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" + +static const bfd_arch_info_type bfd_k1om_arch_intel_syntax = +{ + 64, /* 64 bits in a word */ + 64, /* 64 bits in an address */ + 8, /* 8 bits in a byte */ + bfd_arch_k1om, + bfd_mach_k1om_intel_syntax, + "k1om:intel", + "k1om:intel", + 3, + TRUE, + bfd_default_compatible, + bfd_default_scan, + 0 +}; + +const bfd_arch_info_type bfd_k1om_arch = +{ + 64, /* 64 bits in a word */ + 64, /* 64 bits in an address */ + 8, /* 8 bits in a byte */ + bfd_arch_k1om, + bfd_mach_k1om, + "k1om", + "k1om", + 3, + TRUE, + bfd_default_compatible, + bfd_default_scan, + &bfd_k1om_arch_intel_syntax +}; diff --git a/bfd/cpu-mips.c b/bfd/cpu-mips.c index f102a24..42d43a9 100644 --- a/bfd/cpu-mips.c +++ b/bfd/cpu-mips.c @@ -93,7 +93,8 @@ enum I_loongson_2f, I_loongson_3a, I_mipsocteon, - I_xlr + I_xlr, + I_micromips }; #define NN(index) (&arch_info_struct[(index) + 1]) @@ -133,7 +134,8 @@ static const bfd_arch_info_type arch_info_struct[] = N (64, 64, bfd_mach_mips_loongson_2f, "mips:loongson_2f", FALSE, NN(I_loongson_2f)), N (64, 64, bfd_mach_mips_loongson_3a, "mips:loongson_3a", FALSE, NN(I_loongson_3a)), N (64, 64, bfd_mach_mips_octeon,"mips:octeon", FALSE, NN(I_mipsocteon)), - N (64, 64, bfd_mach_mips_xlr, "mips:xlr", FALSE, 0) + N (64, 64, bfd_mach_mips_xlr, "mips:xlr", FALSE, NN(I_xlr)), + N (64, 64, bfd_mach_mips_micromips,"mips:micromips",FALSE,0) }; /* The default architecture is mips:3000, but with a machine number of diff --git a/bfd/cpu-tilegx.c b/bfd/cpu-tilegx.c new file mode 100644 index 0000000..aa2fe80 --- /dev/null +++ b/bfd/cpu-tilegx.c @@ -0,0 +1,39 @@ +/* BFD support for the TILE-Gx processor. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "bfd.h" +#include "sysdep.h" +#include "libbfd.h" + +const bfd_arch_info_type bfd_tilegx_arch = + { + 64, /* 64 bits in a word */ + 64, /* 64 bits in an address */ + 8, /* 8 bits in a byte */ + bfd_arch_tilegx, + bfd_mach_tilegx, + "tilegx", + "tilegx", + 3, + TRUE, + bfd_default_compatible, + bfd_default_scan, + 0, + }; diff --git a/bfd/cpu-tilepro.c b/bfd/cpu-tilepro.c new file mode 100644 index 0000000..cadd006 --- /dev/null +++ b/bfd/cpu-tilepro.c @@ -0,0 +1,39 @@ +/* BFD support for the TILEPro processor. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "bfd.h" +#include "sysdep.h" +#include "libbfd.h" + +const bfd_arch_info_type bfd_tilepro_arch = + { + 32, /* 32 bits in a word */ + 32, /* 32 bits in an address */ + 8, /* 8 bits in a byte */ + bfd_arch_tilepro, + bfd_mach_tilepro, + "tilepro", + "tilepro", + 3, + TRUE, + bfd_default_compatible, + bfd_default_scan, + 0, + }; diff --git a/bfd/doc/aoutx.texi b/bfd/doc/aoutx.texi new file mode 100644 index 0000000..7cf9787 --- /dev/null +++ b/bfd/doc/aoutx.texi @@ -0,0 +1,213 @@ +@section a.out backends + + +@strong{Description}@* +BFD supports a number of different flavours of a.out format, +though the major differences are only the sizes of the +structures on disk, and the shape of the relocation +information. + +The support is split into a basic support file @file{aoutx.h} +and other files which derive functions from the base. One +derivation file is @file{aoutf1.h} (for a.out flavour 1), and +adds to the basic a.out functions support for sun3, sun4, 386 +and 29k a.out files, to create a target jump vector for a +specific target. + +This information is further split out into more specific files +for each machine, including @file{sunos.c} for sun3 and sun4, +@file{newsos3.c} for the Sony NEWS, and @file{demo64.c} for a +demonstration of a 64 bit a.out format. + +The base file @file{aoutx.h} defines general mechanisms for +reading and writing records to and from disk and various +other methods which BFD requires. It is included by +@file{aout32.c} and @file{aout64.c} to form the names +@code{aout_32_swap_exec_header_in}, @code{aout_64_swap_exec_header_in}, etc. + +As an example, this is what goes on to make the back end for a +sun4, from @file{aout32.c}: + +@example + #define ARCH_SIZE 32 + #include "aoutx.h" +@end example + +Which exports names: + +@example + ... + aout_32_canonicalize_reloc + aout_32_find_nearest_line + aout_32_get_lineno + aout_32_get_reloc_upper_bound + ... +@end example + +from @file{sunos.c}: + +@example + #define TARGET_NAME "a.out-sunos-big" + #define VECNAME sunos_big_vec + #include "aoutf1.h" +@end example + +requires all the names from @file{aout32.c}, and produces the jump vector + +@example + sunos_big_vec +@end example + +The file @file{host-aout.c} is a special case. It is for a large set +of hosts that use ``more or less standard'' a.out files, and +for which cross-debugging is not interesting. It uses the +standard 32-bit a.out support routines, but determines the +file offsets and addresses of the text, data, and BSS +sections, the machine architecture and machine type, and the +entry point address, in a host-dependent manner. Once these +values have been determined, generic code is used to handle +the object file. + +When porting it to run on a new system, you must supply: + +@example + HOST_PAGE_SIZE + HOST_SEGMENT_SIZE + HOST_MACHINE_ARCH (optional) + HOST_MACHINE_MACHINE (optional) + HOST_TEXT_START_ADDR + HOST_STACK_END_ADDR +@end example + +in the file @file{../include/sys/h-@var{XXX}.h} (for your host). These +values, plus the structures and macros defined in @file{a.out.h} on +your host system, will produce a BFD target that will access +ordinary a.out files on your host. To configure a new machine +to use @file{host-aout.c}, specify: + +@example + TDEFAULTS = -DDEFAULT_VECTOR=host_aout_big_vec + TDEPFILES= host-aout.o trad-core.o +@end example + +in the @file{config/@var{XXX}.mt} file, and modify @file{configure.in} +to use the +@file{@var{XXX}.mt} file (by setting "@code{bfd_target=XXX}") when your +configuration is selected. + +@subsection Relocations + + +@strong{Description}@* +The file @file{aoutx.h} provides for both the @emph{standard} +and @emph{extended} forms of a.out relocation records. + +The standard records contain only an +address, a symbol index, and a type field. The extended records +(used on 29ks and sparcs) also have a full integer for an +addend. + +@subsection Internal entry points + + +@strong{Description}@* +@file{aoutx.h} exports several routines for accessing the +contents of an a.out file, which are gathered and exported in +turn by various format specific files (eg sunos.c). + +@findex aout_@var{size}_swap_exec_header_in +@subsubsection @code{aout_@var{size}_swap_exec_header_in} +@strong{Synopsis} +@example +void aout_@var{size}_swap_exec_header_in, + (bfd *abfd, + struct external_exec *bytes, + struct internal_exec *execp); +@end example +@strong{Description}@* +Swap the information in an executable header @var{raw_bytes} taken +from a raw byte stream memory image into the internal exec header +structure @var{execp}. + +@findex aout_@var{size}_swap_exec_header_out +@subsubsection @code{aout_@var{size}_swap_exec_header_out} +@strong{Synopsis} +@example +void aout_@var{size}_swap_exec_header_out + (bfd *abfd, + struct internal_exec *execp, + struct external_exec *raw_bytes); +@end example +@strong{Description}@* +Swap the information in an internal exec header structure +@var{execp} into the buffer @var{raw_bytes} ready for writing to disk. + +@findex aout_@var{size}_some_aout_object_p +@subsubsection @code{aout_@var{size}_some_aout_object_p} +@strong{Synopsis} +@example +const bfd_target *aout_@var{size}_some_aout_object_p + (bfd *abfd, + struct internal_exec *execp, + const bfd_target *(*callback_to_real_object_p) (bfd *)); +@end example +@strong{Description}@* +Some a.out variant thinks that the file open in @var{abfd} +checking is an a.out file. Do some more checking, and set up +for access if it really is. Call back to the calling +environment's "finish up" function just before returning, to +handle any last-minute setup. + +@findex aout_@var{size}_mkobject +@subsubsection @code{aout_@var{size}_mkobject} +@strong{Synopsis} +@example +bfd_boolean aout_@var{size}_mkobject, (bfd *abfd); +@end example +@strong{Description}@* +Initialize BFD @var{abfd} for use with a.out files. + +@findex aout_@var{size}_machine_type +@subsubsection @code{aout_@var{size}_machine_type} +@strong{Synopsis} +@example +enum machine_type aout_@var{size}_machine_type + (enum bfd_architecture arch, + unsigned long machine, + bfd_boolean *unknown); +@end example +@strong{Description}@* +Keep track of machine architecture and machine type for +a.out's. Return the @code{machine_type} for a particular +architecture and machine, or @code{M_UNKNOWN} if that exact architecture +and machine can't be represented in a.out format. + +If the architecture is understood, machine type 0 (default) +is always understood. + +@findex aout_@var{size}_set_arch_mach +@subsubsection @code{aout_@var{size}_set_arch_mach} +@strong{Synopsis} +@example +bfd_boolean aout_@var{size}_set_arch_mach, + (bfd *, + enum bfd_architecture arch, + unsigned long machine); +@end example +@strong{Description}@* +Set the architecture and the machine of the BFD @var{abfd} to the +values @var{arch} and @var{machine}. Verify that @var{abfd}'s format +can support the architecture required. + +@findex aout_@var{size}_new_section_hook +@subsubsection @code{aout_@var{size}_new_section_hook} +@strong{Synopsis} +@example +bfd_boolean aout_@var{size}_new_section_hook, + (bfd *abfd, + asection *newsect); +@end example +@strong{Description}@* +Called by the BFD in response to a @code{bfd_make_section} +request. + diff --git a/bfd/doc/archive.texi b/bfd/doc/archive.texi new file mode 100644 index 0000000..3d0a97d --- /dev/null +++ b/bfd/doc/archive.texi @@ -0,0 +1,99 @@ +@section Archives + + +@strong{Description}@* +An archive (or library) is just another BFD. It has a symbol +table, although there's not much a user program will do with it. + +The big difference between an archive BFD and an ordinary BFD +is that the archive doesn't have sections. Instead it has a +chain of BFDs that are considered its contents. These BFDs can +be manipulated like any other. The BFDs contained in an +archive opened for reading will all be opened for reading. You +may put either input or output BFDs into an archive opened for +output; they will be handled correctly when the archive is closed. + +Use @code{bfd_openr_next_archived_file} to step through +the contents of an archive opened for input. You don't +have to read the entire archive if you don't want +to! Read it until you find what you want. + +Archive contents of output BFDs are chained through the +@code{next} pointer in a BFD. The first one is findable through +the @code{archive_head} slot of the archive. Set it with +@code{bfd_set_archive_head} (q.v.). A given BFD may be in only one +open output archive at a time. + +As expected, the BFD archive code is more general than the +archive code of any given environment. BFD archives may +contain files of different formats (e.g., a.out and coff) and +even different architectures. You may even place archives +recursively into archives! + +This can cause unexpected confusion, since some archive +formats are more expressive than others. For instance, Intel +COFF archives can preserve long filenames; SunOS a.out archives +cannot. If you move a file from the first to the second +format and back again, the filename may be truncated. +Likewise, different a.out environments have different +conventions as to how they truncate filenames, whether they +preserve directory names in filenames, etc. When +interoperating with native tools, be sure your files are +homogeneous. + +Beware: most of these formats do not react well to the +presence of spaces in filenames. We do the best we can, but +can't always handle this case due to restrictions in the format of +archives. Many Unix utilities are braindead in regards to +spaces and such in filenames anyway, so this shouldn't be much +of a restriction. + +Archives are supported in BFD in @code{archive.c}. + +@subsection Archive functions + + +@findex bfd_get_next_mapent +@subsubsection @code{bfd_get_next_mapent} +@strong{Synopsis} +@example +symindex bfd_get_next_mapent + (bfd *abfd, symindex previous, carsym **sym); +@end example +@strong{Description}@* +Step through archive @var{abfd}'s symbol table (if it +has one). Successively update @var{sym} with the next symbol's +information, returning that symbol's (internal) index into the +symbol table. + +Supply @code{BFD_NO_MORE_SYMBOLS} as the @var{previous} entry to get +the first one; returns @code{BFD_NO_MORE_SYMBOLS} when you've already +got the last one. + +A @code{carsym} is a canonical archive symbol. The only +user-visible element is its name, a null-terminated string. + +@findex bfd_set_archive_head +@subsubsection @code{bfd_set_archive_head} +@strong{Synopsis} +@example +bfd_boolean bfd_set_archive_head (bfd *output, bfd *new_head); +@end example +@strong{Description}@* +Set the head of the chain of +BFDs contained in the archive @var{output} to @var{new_head}. + +@findex bfd_openr_next_archived_file +@subsubsection @code{bfd_openr_next_archived_file} +@strong{Synopsis} +@example +bfd *bfd_openr_next_archived_file (bfd *archive, bfd *previous); +@end example +@strong{Description}@* +Provided a BFD, @var{archive}, containing an archive and NULL, open +an input BFD on the first contained element and returns that. +Subsequent calls should pass +the archive and the previous return value to return a created +BFD to the next contained element. NULL is returned when there +are no more. + diff --git a/bfd/doc/archures.texi b/bfd/doc/archures.texi new file mode 100644 index 0000000..683d165 --- /dev/null +++ b/bfd/doc/archures.texi @@ -0,0 +1,649 @@ +@section Architectures +BFD keeps one atom in a BFD describing the +architecture of the data attached to the BFD: a pointer to a +@code{bfd_arch_info_type}. + +Pointers to structures can be requested independently of a BFD +so that an architecture's information can be interrogated +without access to an open BFD. + +The architecture information is provided by each architecture package. +The set of default architectures is selected by the macro +@code{SELECT_ARCHITECTURES}. This is normally set up in the +@file{config/@var{target}.mt} file of your choice. If the name is not +defined, then all the architectures supported are included. + +When BFD starts up, all the architectures are called with an +initialize method. It is up to the architecture back end to +insert as many items into the list of architectures as it wants to; +generally this would be one for each machine and one for the +default case (an item with a machine field of 0). + +BFD's idea of an architecture is implemented in @file{archures.c}. + +@subsection bfd_architecture + + +@strong{Description}@* +This enum gives the object file's CPU architecture, in a +global sense---i.e., what processor family does it belong to? +Another field indicates which processor within +the family is in use. The machine gives a number which +distinguishes different versions of the architecture, +containing, for example, 2 and 3 for Intel i960 KA and i960 KB, +and 68020 and 68030 for Motorola 68020 and 68030. +@example +enum bfd_architecture +@{ + bfd_arch_unknown, /* File arch not known. */ + bfd_arch_obscure, /* Arch known, not one of these. */ + bfd_arch_m68k, /* Motorola 68xxx */ +#define bfd_mach_m68000 1 +#define bfd_mach_m68008 2 +#define bfd_mach_m68010 3 +#define bfd_mach_m68020 4 +#define bfd_mach_m68030 5 +#define bfd_mach_m68040 6 +#define bfd_mach_m68060 7 +#define bfd_mach_cpu32 8 +#define bfd_mach_fido 9 +#define bfd_mach_mcf_isa_a_nodiv 10 +#define bfd_mach_mcf_isa_a 11 +#define bfd_mach_mcf_isa_a_mac 12 +#define bfd_mach_mcf_isa_a_emac 13 +#define bfd_mach_mcf_isa_aplus 14 +#define bfd_mach_mcf_isa_aplus_mac 15 +#define bfd_mach_mcf_isa_aplus_emac 16 +#define bfd_mach_mcf_isa_b_nousp 17 +#define bfd_mach_mcf_isa_b_nousp_mac 18 +#define bfd_mach_mcf_isa_b_nousp_emac 19 +#define bfd_mach_mcf_isa_b 20 +#define bfd_mach_mcf_isa_b_mac 21 +#define bfd_mach_mcf_isa_b_emac 22 +#define bfd_mach_mcf_isa_b_float 23 +#define bfd_mach_mcf_isa_b_float_mac 24 +#define bfd_mach_mcf_isa_b_float_emac 25 +#define bfd_mach_mcf_isa_c 26 +#define bfd_mach_mcf_isa_c_mac 27 +#define bfd_mach_mcf_isa_c_emac 28 +#define bfd_mach_mcf_isa_c_nodiv 29 +#define bfd_mach_mcf_isa_c_nodiv_mac 30 +#define bfd_mach_mcf_isa_c_nodiv_emac 31 + bfd_arch_vax, /* DEC Vax */ + bfd_arch_i960, /* Intel 960 */ + /* The order of the following is important. + lower number indicates a machine type that + only accepts a subset of the instructions + available to machines with higher numbers. + The exception is the "ca", which is + incompatible with all other machines except + "core". */ + +#define bfd_mach_i960_core 1 +#define bfd_mach_i960_ka_sa 2 +#define bfd_mach_i960_kb_sb 3 +#define bfd_mach_i960_mc 4 +#define bfd_mach_i960_xa 5 +#define bfd_mach_i960_ca 6 +#define bfd_mach_i960_jx 7 +#define bfd_mach_i960_hx 8 + + bfd_arch_or32, /* OpenRISC 32 */ + + bfd_arch_sparc, /* SPARC */ +#define bfd_mach_sparc 1 +/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */ +#define bfd_mach_sparc_sparclet 2 +#define bfd_mach_sparc_sparclite 3 +#define bfd_mach_sparc_v8plus 4 +#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ +#define bfd_mach_sparc_sparclite_le 6 +#define bfd_mach_sparc_v9 7 +#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ +#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ +#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ +/* Nonzero if MACH has the v9 instruction set. */ +#define bfd_mach_sparc_v9_p(mach) \ + ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \ + && (mach) != bfd_mach_sparc_sparclite_le) +/* Nonzero if MACH is a 64 bit sparc architecture. */ +#define bfd_mach_sparc_64bit_p(mach) \ + ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb) + bfd_arch_spu, /* PowerPC SPU */ +#define bfd_mach_spu 256 + bfd_arch_mips, /* MIPS Rxxxx */ +#define bfd_mach_mips3000 3000 +#define bfd_mach_mips3900 3900 +#define bfd_mach_mips4000 4000 +#define bfd_mach_mips4010 4010 +#define bfd_mach_mips4100 4100 +#define bfd_mach_mips4111 4111 +#define bfd_mach_mips4120 4120 +#define bfd_mach_mips4300 4300 +#define bfd_mach_mips4400 4400 +#define bfd_mach_mips4600 4600 +#define bfd_mach_mips4650 4650 +#define bfd_mach_mips5000 5000 +#define bfd_mach_mips5400 5400 +#define bfd_mach_mips5500 5500 +#define bfd_mach_mips6000 6000 +#define bfd_mach_mips7000 7000 +#define bfd_mach_mips8000 8000 +#define bfd_mach_mips9000 9000 +#define bfd_mach_mips10000 10000 +#define bfd_mach_mips12000 12000 +#define bfd_mach_mips14000 14000 +#define bfd_mach_mips16000 16000 +#define bfd_mach_mips16 16 +#define bfd_mach_mips5 5 +#define bfd_mach_mips_loongson_2e 3001 +#define bfd_mach_mips_loongson_2f 3002 +#define bfd_mach_mips_loongson_3a 3003 +#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */ +#define bfd_mach_mips_octeon 6501 +#define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */ +#define bfd_mach_mipsisa32 32 +#define bfd_mach_mipsisa32r2 33 +#define bfd_mach_mipsisa64 64 +#define bfd_mach_mipsisa64r2 65 +#define bfd_mach_mips_micromips 96 + bfd_arch_i386, /* Intel 386 */ +#define bfd_mach_i386_intel_syntax (1 << 0) +#define bfd_mach_i386_i8086 (1 << 1) +#define bfd_mach_i386_i386 (1 << 2) +#define bfd_mach_x86_64 (1 << 3) +#define bfd_mach_x64_32 (1 << 4) +#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax) +#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax) +#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax) + bfd_arch_l1om, /* Intel L1OM */ +#define bfd_mach_l1om (1 << 5) +#define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax) + bfd_arch_k1om, /* Intel K1OM */ +#define bfd_mach_k1om (1 << 6) +#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax) + bfd_arch_we32k, /* AT&T WE32xxx */ + bfd_arch_tahoe, /* CCI/Harris Tahoe */ + bfd_arch_i860, /* Intel 860 */ + bfd_arch_i370, /* IBM 360/370 Mainframes */ + bfd_arch_romp, /* IBM ROMP PC/RT */ + bfd_arch_convex, /* Convex */ + bfd_arch_m88k, /* Motorola 88xxx */ + bfd_arch_m98k, /* Motorola 98xxx */ + bfd_arch_pyramid, /* Pyramid Technology */ + bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300) */ +#define bfd_mach_h8300 1 +#define bfd_mach_h8300h 2 +#define bfd_mach_h8300s 3 +#define bfd_mach_h8300hn 4 +#define bfd_mach_h8300sn 5 +#define bfd_mach_h8300sx 6 +#define bfd_mach_h8300sxn 7 + bfd_arch_pdp11, /* DEC PDP-11 */ + bfd_arch_plugin, + bfd_arch_powerpc, /* PowerPC */ +#define bfd_mach_ppc 32 +#define bfd_mach_ppc64 64 +#define bfd_mach_ppc_403 403 +#define bfd_mach_ppc_403gc 4030 +#define bfd_mach_ppc_405 405 +#define bfd_mach_ppc_505 505 +#define bfd_mach_ppc_601 601 +#define bfd_mach_ppc_602 602 +#define bfd_mach_ppc_603 603 +#define bfd_mach_ppc_ec603e 6031 +#define bfd_mach_ppc_604 604 +#define bfd_mach_ppc_620 620 +#define bfd_mach_ppc_630 630 +#define bfd_mach_ppc_750 750 +#define bfd_mach_ppc_860 860 +#define bfd_mach_ppc_a35 35 +#define bfd_mach_ppc_rs64ii 642 +#define bfd_mach_ppc_rs64iii 643 +#define bfd_mach_ppc_7400 7400 +#define bfd_mach_ppc_e500 500 +#define bfd_mach_ppc_e500mc 5001 +#define bfd_mach_ppc_e500mc64 5005 +#define bfd_mach_ppc_titan 83 + bfd_arch_rs6000, /* IBM RS/6000 */ +#define bfd_mach_rs6k 6000 +#define bfd_mach_rs6k_rs1 6001 +#define bfd_mach_rs6k_rsc 6003 +#define bfd_mach_rs6k_rs2 6002 + bfd_arch_hppa, /* HP PA RISC */ +#define bfd_mach_hppa10 10 +#define bfd_mach_hppa11 11 +#define bfd_mach_hppa20 20 +#define bfd_mach_hppa20w 25 + bfd_arch_d10v, /* Mitsubishi D10V */ +#define bfd_mach_d10v 1 +#define bfd_mach_d10v_ts2 2 +#define bfd_mach_d10v_ts3 3 + bfd_arch_d30v, /* Mitsubishi D30V */ + bfd_arch_dlx, /* DLX */ + bfd_arch_m68hc11, /* Motorola 68HC11 */ + bfd_arch_m68hc12, /* Motorola 68HC12 */ +#define bfd_mach_m6812_default 0 +#define bfd_mach_m6812 1 +#define bfd_mach_m6812s 2 + bfd_arch_z8k, /* Zilog Z8000 */ +#define bfd_mach_z8001 1 +#define bfd_mach_z8002 2 + bfd_arch_h8500, /* Renesas H8/500 (formerly Hitachi H8/500) */ + bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH) */ +#define bfd_mach_sh 1 +#define bfd_mach_sh2 0x20 +#define bfd_mach_sh_dsp 0x2d +#define bfd_mach_sh2a 0x2a +#define bfd_mach_sh2a_nofpu 0x2b +#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1 +#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2 +#define bfd_mach_sh2a_or_sh4 0x2a3 +#define bfd_mach_sh2a_or_sh3e 0x2a4 +#define bfd_mach_sh2e 0x2e +#define bfd_mach_sh3 0x30 +#define bfd_mach_sh3_nommu 0x31 +#define bfd_mach_sh3_dsp 0x3d +#define bfd_mach_sh3e 0x3e +#define bfd_mach_sh4 0x40 +#define bfd_mach_sh4_nofpu 0x41 +#define bfd_mach_sh4_nommu_nofpu 0x42 +#define bfd_mach_sh4a 0x4a +#define bfd_mach_sh4a_nofpu 0x4b +#define bfd_mach_sh4al_dsp 0x4d +#define bfd_mach_sh5 0x50 + bfd_arch_alpha, /* Dec Alpha */ +#define bfd_mach_alpha_ev4 0x10 +#define bfd_mach_alpha_ev5 0x20 +#define bfd_mach_alpha_ev6 0x30 + bfd_arch_arm, /* Advanced Risc Machines ARM. */ +#define bfd_mach_arm_unknown 0 +#define bfd_mach_arm_2 1 +#define bfd_mach_arm_2a 2 +#define bfd_mach_arm_3 3 +#define bfd_mach_arm_3M 4 +#define bfd_mach_arm_4 5 +#define bfd_mach_arm_4T 6 +#define bfd_mach_arm_5 7 +#define bfd_mach_arm_5T 8 +#define bfd_mach_arm_5TE 9 +#define bfd_mach_arm_XScale 10 +#define bfd_mach_arm_ep9312 11 +#define bfd_mach_arm_iWMMXt 12 +#define bfd_mach_arm_iWMMXt2 13 + bfd_arch_ns32k, /* National Semiconductors ns32000 */ + bfd_arch_w65, /* WDC 65816 */ + bfd_arch_tic30, /* Texas Instruments TMS320C30 */ + bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */ +#define bfd_mach_tic3x 30 +#define bfd_mach_tic4x 40 + bfd_arch_tic54x, /* Texas Instruments TMS320C54X */ + bfd_arch_tic6x, /* Texas Instruments TMS320C6X */ + bfd_arch_tic80, /* TI TMS320c80 (MVP) */ + bfd_arch_v850, /* NEC V850 */ +#define bfd_mach_v850 1 +#define bfd_mach_v850e 'E' +#define bfd_mach_v850e1 '1' +#define bfd_mach_v850e2 0x4532 +#define bfd_mach_v850e2v3 0x45325633 + bfd_arch_arc, /* ARC Cores */ +#define bfd_mach_arc_5 5 +#define bfd_mach_arc_6 6 +#define bfd_mach_arc_7 7 +#define bfd_mach_arc_8 8 + bfd_arch_m32c, /* Renesas M16C/M32C. */ +#define bfd_mach_m16c 0x75 +#define bfd_mach_m32c 0x78 + bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D) */ +#define bfd_mach_m32r 1 /* For backwards compatibility. */ +#define bfd_mach_m32rx 'x' +#define bfd_mach_m32r2 '2' + bfd_arch_mn10200, /* Matsushita MN10200 */ + bfd_arch_mn10300, /* Matsushita MN10300 */ +#define bfd_mach_mn10300 300 +#define bfd_mach_am33 330 +#define bfd_mach_am33_2 332 + bfd_arch_fr30, +#define bfd_mach_fr30 0x46523330 + bfd_arch_frv, +#define bfd_mach_frv 1 +#define bfd_mach_frvsimple 2 +#define bfd_mach_fr300 300 +#define bfd_mach_fr400 400 +#define bfd_mach_fr450 450 +#define bfd_mach_frvtomcat 499 /* fr500 prototype */ +#define bfd_mach_fr500 500 +#define bfd_mach_fr550 550 + bfd_arch_moxie, /* The moxie processor */ +#define bfd_mach_moxie 1 + bfd_arch_mcore, + bfd_arch_mep, +#define bfd_mach_mep 1 +#define bfd_mach_mep_h1 0x6831 +#define bfd_mach_mep_c5 0x6335 + bfd_arch_ia64, /* HP/Intel ia64 */ +#define bfd_mach_ia64_elf64 64 +#define bfd_mach_ia64_elf32 32 + bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */ +#define bfd_mach_ip2022 1 +#define bfd_mach_ip2022ext 2 + bfd_arch_iq2000, /* Vitesse IQ2000. */ +#define bfd_mach_iq2000 1 +#define bfd_mach_iq10 2 + bfd_arch_mt, +#define bfd_mach_ms1 1 +#define bfd_mach_mrisc2 2 +#define bfd_mach_ms2 3 + bfd_arch_pj, + bfd_arch_avr, /* Atmel AVR microcontrollers. */ +#define bfd_mach_avr1 1 +#define bfd_mach_avr2 2 +#define bfd_mach_avr25 25 +#define bfd_mach_avr3 3 +#define bfd_mach_avr31 31 +#define bfd_mach_avr35 35 +#define bfd_mach_avr4 4 +#define bfd_mach_avr5 5 +#define bfd_mach_avr51 51 +#define bfd_mach_avr6 6 +#define bfd_mach_avrxmega1 101 +#define bfd_mach_avrxmega2 102 +#define bfd_mach_avrxmega3 103 +#define bfd_mach_avrxmega4 104 +#define bfd_mach_avrxmega5 105 +#define bfd_mach_avrxmega6 106 +#define bfd_mach_avrxmega7 107 + bfd_arch_bfin, /* ADI Blackfin */ +#define bfd_mach_bfin 1 + bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */ +#define bfd_mach_cr16 1 + bfd_arch_cr16c, /* National Semiconductor CompactRISC. */ +#define bfd_mach_cr16c 1 + bfd_arch_crx, /* National Semiconductor CRX. */ +#define bfd_mach_crx 1 + bfd_arch_cris, /* Axis CRIS */ +#define bfd_mach_cris_v0_v10 255 +#define bfd_mach_cris_v32 32 +#define bfd_mach_cris_v10_v32 1032 + bfd_arch_rx, /* Renesas RX. */ +#define bfd_mach_rx 0x75 + bfd_arch_s390, /* IBM s390 */ +#define bfd_mach_s390_31 31 +#define bfd_mach_s390_64 64 + bfd_arch_score, /* Sunplus score */ +#define bfd_mach_score3 3 +#define bfd_mach_score7 7 + bfd_arch_openrisc, /* OpenRISC */ + bfd_arch_mmix, /* Donald Knuth's educational processor. */ + bfd_arch_xstormy16, +#define bfd_mach_xstormy16 1 + bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */ +#define bfd_mach_msp11 11 +#define bfd_mach_msp110 110 +#define bfd_mach_msp12 12 +#define bfd_mach_msp13 13 +#define bfd_mach_msp14 14 +#define bfd_mach_msp15 15 +#define bfd_mach_msp16 16 +#define bfd_mach_msp21 21 +#define bfd_mach_msp31 31 +#define bfd_mach_msp32 32 +#define bfd_mach_msp33 33 +#define bfd_mach_msp41 41 +#define bfd_mach_msp42 42 +#define bfd_mach_msp43 43 +#define bfd_mach_msp44 44 + bfd_arch_xc16x, /* Infineon's XC16X Series. */ +#define bfd_mach_xc16x 1 +#define bfd_mach_xc16xl 2 +#define bfd_mach_xc16xs 3 + bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ +#define bfd_mach_xtensa 1 + bfd_arch_z80, +#define bfd_mach_z80strict 1 /* No undocumented opcodes. */ +#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */ +#define bfd_mach_z80full 7 /* All undocumented instructions. */ +#define bfd_mach_r800 11 /* R800: successor with multiplication. */ + bfd_arch_lm32, /* Lattice Mico32 */ +#define bfd_mach_lm32 1 + bfd_arch_microblaze,/* Xilinx MicroBlaze. */ + bfd_arch_tilepro, /* Tilera TILEPro */ + bfd_arch_tilegx, /* Tilera TILE-Gx */ +#define bfd_mach_tilepro 1 +#define bfd_mach_tilegx 1 + bfd_arch_last + @}; +@end example + +@subsection bfd_arch_info + + +@strong{Description}@* +This structure contains information on architectures for use +within BFD. +@example + +typedef struct bfd_arch_info +@{ + int bits_per_word; + int bits_per_address; + int bits_per_byte; + enum bfd_architecture arch; + unsigned long mach; + const char *arch_name; + const char *printable_name; + unsigned int section_align_power; + /* TRUE if this is the default machine for the architecture. + The default arch should be the first entry for an arch so that + all the entries for that arch can be accessed via @code{next}. */ + bfd_boolean the_default; + const struct bfd_arch_info * (*compatible) + (const struct bfd_arch_info *a, const struct bfd_arch_info *b); + + bfd_boolean (*scan) (const struct bfd_arch_info *, const char *); + + const struct bfd_arch_info *next; +@} +bfd_arch_info_type; + +@end example + +@findex bfd_printable_name +@subsubsection @code{bfd_printable_name} +@strong{Synopsis} +@example +const char *bfd_printable_name (bfd *abfd); +@end example +@strong{Description}@* +Return a printable string representing the architecture and machine +from the pointer to the architecture info structure. + +@findex bfd_scan_arch +@subsubsection @code{bfd_scan_arch} +@strong{Synopsis} +@example +const bfd_arch_info_type *bfd_scan_arch (const char *string); +@end example +@strong{Description}@* +Figure out if BFD supports any cpu which could be described with +the name @var{string}. Return a pointer to an @code{arch_info} +structure if a machine is found, otherwise NULL. + +@findex bfd_arch_list +@subsubsection @code{bfd_arch_list} +@strong{Synopsis} +@example +const char **bfd_arch_list (void); +@end example +@strong{Description}@* +Return a freshly malloced NULL-terminated vector of the names +of all the valid BFD architectures. Do not modify the names. + +@findex bfd_arch_get_compatible +@subsubsection @code{bfd_arch_get_compatible} +@strong{Synopsis} +@example +const bfd_arch_info_type *bfd_arch_get_compatible + (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns); +@end example +@strong{Description}@* +Determine whether two BFDs' architectures and machine types +are compatible. Calculates the lowest common denominator +between the two architectures and machine types implied by +the BFDs and returns a pointer to an @code{arch_info} structure +describing the compatible machine. + +@findex bfd_default_arch_struct +@subsubsection @code{bfd_default_arch_struct} +@strong{Description}@* +The @code{bfd_default_arch_struct} is an item of +@code{bfd_arch_info_type} which has been initialized to a fairly +generic state. A BFD starts life by pointing to this +structure, until the correct back end has determined the real +architecture of the file. +@example +extern const bfd_arch_info_type bfd_default_arch_struct; +@end example + +@findex bfd_set_arch_info +@subsubsection @code{bfd_set_arch_info} +@strong{Synopsis} +@example +void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg); +@end example +@strong{Description}@* +Set the architecture info of @var{abfd} to @var{arg}. + +@findex bfd_default_set_arch_mach +@subsubsection @code{bfd_default_set_arch_mach} +@strong{Synopsis} +@example +bfd_boolean bfd_default_set_arch_mach + (bfd *abfd, enum bfd_architecture arch, unsigned long mach); +@end example +@strong{Description}@* +Set the architecture and machine type in BFD @var{abfd} +to @var{arch} and @var{mach}. Find the correct +pointer to a structure and insert it into the @code{arch_info} +pointer. + +@findex bfd_get_arch +@subsubsection @code{bfd_get_arch} +@strong{Synopsis} +@example +enum bfd_architecture bfd_get_arch (bfd *abfd); +@end example +@strong{Description}@* +Return the enumerated type which describes the BFD @var{abfd}'s +architecture. + +@findex bfd_get_mach +@subsubsection @code{bfd_get_mach} +@strong{Synopsis} +@example +unsigned long bfd_get_mach (bfd *abfd); +@end example +@strong{Description}@* +Return the long type which describes the BFD @var{abfd}'s +machine. + +@findex bfd_arch_bits_per_byte +@subsubsection @code{bfd_arch_bits_per_byte} +@strong{Synopsis} +@example +unsigned int bfd_arch_bits_per_byte (bfd *abfd); +@end example +@strong{Description}@* +Return the number of bits in one of the BFD @var{abfd}'s +architecture's bytes. + +@findex bfd_arch_bits_per_address +@subsubsection @code{bfd_arch_bits_per_address} +@strong{Synopsis} +@example +unsigned int bfd_arch_bits_per_address (bfd *abfd); +@end example +@strong{Description}@* +Return the number of bits in one of the BFD @var{abfd}'s +architecture's addresses. + +@findex bfd_default_compatible +@subsubsection @code{bfd_default_compatible} +@strong{Synopsis} +@example +const bfd_arch_info_type *bfd_default_compatible + (const bfd_arch_info_type *a, const bfd_arch_info_type *b); +@end example +@strong{Description}@* +The default function for testing for compatibility. + +@findex bfd_default_scan +@subsubsection @code{bfd_default_scan} +@strong{Synopsis} +@example +bfd_boolean bfd_default_scan + (const struct bfd_arch_info *info, const char *string); +@end example +@strong{Description}@* +The default function for working out whether this is an +architecture hit and a machine hit. + +@findex bfd_get_arch_info +@subsubsection @code{bfd_get_arch_info} +@strong{Synopsis} +@example +const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd); +@end example +@strong{Description}@* +Return the architecture info struct in @var{abfd}. + +@findex bfd_lookup_arch +@subsubsection @code{bfd_lookup_arch} +@strong{Synopsis} +@example +const bfd_arch_info_type *bfd_lookup_arch + (enum bfd_architecture arch, unsigned long machine); +@end example +@strong{Description}@* +Look for the architecture info structure which matches the +arguments @var{arch} and @var{machine}. A machine of 0 matches the +machine/architecture structure which marks itself as the +default. + +@findex bfd_printable_arch_mach +@subsubsection @code{bfd_printable_arch_mach} +@strong{Synopsis} +@example +const char *bfd_printable_arch_mach + (enum bfd_architecture arch, unsigned long machine); +@end example +@strong{Description}@* +Return a printable string representing the architecture and +machine type. + +This routine is depreciated. + +@findex bfd_octets_per_byte +@subsubsection @code{bfd_octets_per_byte} +@strong{Synopsis} +@example +unsigned int bfd_octets_per_byte (bfd *abfd); +@end example +@strong{Description}@* +Return the number of octets (8-bit quantities) per target byte +(minimum addressable unit). In most cases, this will be one, but some +DSP targets have 16, 32, or even 48 bits per byte. + +@findex bfd_arch_mach_octets_per_byte +@subsubsection @code{bfd_arch_mach_octets_per_byte} +@strong{Synopsis} +@example +unsigned int bfd_arch_mach_octets_per_byte + (enum bfd_architecture arch, unsigned long machine); +@end example +@strong{Description}@* +See bfd_octets_per_byte. + +This routine is provided for those cases where a bfd * is not +available + diff --git a/bfd/doc/bfd.info b/bfd/doc/bfd.info new file mode 100644 index 0000000..bffd41a --- /dev/null +++ b/bfd/doc/bfd.info @@ -0,0 +1,12145 @@ +This is bfd.info, produced by makeinfo version 4.8 from bfd.texinfo. + +INFO-DIR-SECTION Software development +START-INFO-DIR-ENTRY +* Bfd: (bfd). The Binary File Descriptor library. +END-INFO-DIR-ENTRY + + This file documents the BFD library. + + Copyright (C) 1991, 2000, 2001, 2003, 2006, 2007, 2008 Free Software +Foundation, Inc. + + Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License, Version 1.3 or +any later version published by the Free Software Foundation; with the +Invariant Sections being "GNU General Public License" and "Funding Free +Software", the Front-Cover texts being (a) (see below), and with the +Back-Cover Texts being (b) (see below). A copy of the license is +included in the section entitled "GNU Free Documentation License". + + (a) The FSF's Front-Cover Text is: + + A GNU Manual + + (b) The FSF's Back-Cover Text is: + + You have freedom to copy and modify this GNU Manual, like GNU +software. Copies published by the Free Software Foundation raise +funds for GNU development. + + +File: bfd.info, Node: Top, Next: Overview, Prev: (dir), Up: (dir) + + This file documents the binary file descriptor library libbfd. + +* Menu: + +* Overview:: Overview of BFD +* BFD front end:: BFD front end +* BFD back ends:: BFD back ends +* GNU Free Documentation License:: GNU Free Documentation License +* BFD Index:: BFD Index + + +File: bfd.info, Node: Overview, Next: BFD front end, Prev: Top, Up: Top + +1 Introduction +************** + +BFD is a package which allows applications to use the same routines to +operate on object files whatever the object file format. A new object +file format can be supported simply by creating a new BFD back end and +adding it to the library. + + BFD is split into two parts: the front end, and the back ends (one +for each object file format). + * The front end of BFD provides the interface to the user. It manages + memory and various canonical data structures. The front end also + decides which back end to use and when to call back end routines. + + * The back ends provide BFD its view of the real world. Each back + end provides a set of calls which the BFD front end can use to + maintain its canonical form. The back ends also may keep around + information for their own use, for greater efficiency. + +* Menu: + +* History:: History +* How It Works:: How It Works +* What BFD Version 2 Can Do:: What BFD Version 2 Can Do + + +File: bfd.info, Node: History, Next: How It Works, Prev: Overview, Up: Overview + +1.1 History +=========== + +One spur behind BFD was the desire, on the part of the GNU 960 team at +Intel Oregon, for interoperability of applications on their COFF and +b.out file formats. Cygnus was providing GNU support for the team, and +was contracted to provide the required functionality. + + The name came from a conversation David Wallace was having with +Richard Stallman about the library: RMS said that it would be quite +hard--David said "BFD". Stallman was right, but the name stuck. + + At the same time, Ready Systems wanted much the same thing, but for +different object file formats: IEEE-695, Oasys, Srecords, a.out and 68k +coff. + + BFD was first implemented by members of Cygnus Support; Steve +Chamberlain (`sac@cygnus.com'), John Gilmore (`gnu@cygnus.com'), K. +Richard Pixley (`rich@cygnus.com') and David Henkel-Wallace +(`gumby@cygnus.com'). + + +File: bfd.info, Node: How It Works, Next: What BFD Version 2 Can Do, Prev: History, Up: Overview + +1.2 How To Use BFD +================== + +To use the library, include `bfd.h' and link with `libbfd.a'. + + BFD provides a common interface to the parts of an object file for a +calling application. + + When an application successfully opens a target file (object, +archive, or whatever), a pointer to an internal structure is returned. +This pointer points to a structure called `bfd', described in `bfd.h'. +Our convention is to call this pointer a BFD, and instances of it +within code `abfd'. All operations on the target object file are +applied as methods to the BFD. The mapping is defined within `bfd.h' +in a set of macros, all beginning with `bfd_' to reduce namespace +pollution. + + For example, this sequence does what you would probably expect: +return the number of sections in an object file attached to a BFD +`abfd'. + + #include "bfd.h" + + unsigned int number_of_sections (abfd) + bfd *abfd; + { + return bfd_count_sections (abfd); + } + + The abstraction used within BFD is that an object file has: + + * a header, + + * a number of sections containing raw data (*note Sections::), + + * a set of relocations (*note Relocations::), and + + * some symbol information (*note Symbols::). + Also, BFDs opened for archives have the additional attribute of an +index and contain subordinate BFDs. This approach is fine for a.out and +coff, but loses efficiency when applied to formats such as S-records and +IEEE-695. + + +File: bfd.info, Node: What BFD Version 2 Can Do, Prev: How It Works, Up: Overview + +1.3 What BFD Version 2 Can Do +============================= + +When an object file is opened, BFD subroutines automatically determine +the format of the input object file. They then build a descriptor in +memory with pointers to routines that will be used to access elements of +the object file's data structures. + + As different information from the object files is required, BFD +reads from different sections of the file and processes them. For +example, a very common operation for the linker is processing symbol +tables. Each BFD back end provides a routine for converting between +the object file's representation of symbols and an internal canonical +format. When the linker asks for the symbol table of an object file, it +calls through a memory pointer to the routine from the relevant BFD +back end which reads and converts the table into a canonical form. The +linker then operates upon the canonical form. When the link is finished +and the linker writes the output file's symbol table, another BFD back +end routine is called to take the newly created symbol table and +convert it into the chosen output format. + +* Menu: + +* BFD information loss:: Information Loss +* Canonical format:: The BFD canonical object-file format + + +File: bfd.info, Node: BFD information loss, Next: Canonical format, Up: What BFD Version 2 Can Do + +1.3.1 Information Loss +---------------------- + +_Information can be lost during output._ The output formats supported +by BFD do not provide identical facilities, and information which can +be described in one form has nowhere to go in another format. One +example of this is alignment information in `b.out'. There is nowhere +in an `a.out' format file to store alignment information on the +contained data, so when a file is linked from `b.out' and an `a.out' +image is produced, alignment information will not propagate to the +output file. (The linker will still use the alignment information +internally, so the link is performed correctly). + + Another example is COFF section names. COFF files may contain an +unlimited number of sections, each one with a textual section name. If +the target of the link is a format which does not have many sections +(e.g., `a.out') or has sections without names (e.g., the Oasys format), +the link cannot be done simply. You can circumvent this problem by +describing the desired input-to-output section mapping with the linker +command language. + + _Information can be lost during canonicalization._ The BFD internal +canonical form of the external formats is not exhaustive; there are +structures in input formats for which there is no direct representation +internally. This means that the BFD back ends cannot maintain all +possible data richness through the transformation between external to +internal and back to external formats. + + This limitation is only a problem when an application reads one +format and writes another. Each BFD back end is responsible for +maintaining as much data as possible, and the internal BFD canonical +form has structures which are opaque to the BFD core, and exported only +to the back ends. When a file is read in one format, the canonical form +is generated for BFD and the application. At the same time, the back +end saves away any information which may otherwise be lost. If the data +is then written back in the same format, the back end routine will be +able to use the canonical form provided by the BFD core as well as the +information it prepared earlier. Since there is a great deal of +commonality between back ends, there is no information lost when +linking or copying big endian COFF to little endian COFF, or `a.out' to +`b.out'. When a mixture of formats is linked, the information is only +lost from the files whose format differs from the destination. + + +File: bfd.info, Node: Canonical format, Prev: BFD information loss, Up: What BFD Version 2 Can Do + +1.3.2 The BFD canonical object-file format +------------------------------------------ + +The greatest potential for loss of information occurs when there is the +least overlap between the information provided by the source format, +that stored by the canonical format, and that needed by the destination +format. A brief description of the canonical form may help you +understand which kinds of data you can count on preserving across +conversions. + +_files_ + Information stored on a per-file basis includes target machine + architecture, particular implementation format type, a demand + pageable bit, and a write protected bit. Information like Unix + magic numbers is not stored here--only the magic numbers' meaning, + so a `ZMAGIC' file would have both the demand pageable bit and the + write protected text bit set. The byte order of the target is + stored on a per-file basis, so that big- and little-endian object + files may be used with one another. + +_sections_ + Each section in the input file contains the name of the section, + the section's original address in the object file, size and + alignment information, various flags, and pointers into other BFD + data structures. + +_symbols_ + Each symbol contains a pointer to the information for the object + file which originally defined it, its name, its value, and various + flag bits. When a BFD back end reads in a symbol table, it + relocates all symbols to make them relative to the base of the + section where they were defined. Doing this ensures that each + symbol points to its containing section. Each symbol also has a + varying amount of hidden private data for the BFD back end. Since + the symbol points to the original file, the private data format + for that symbol is accessible. `ld' can operate on a collection + of symbols of wildly different formats without problems. + + Normal global and simple local symbols are maintained on output, + so an output file (no matter its format) will retain symbols + pointing to functions and to global, static, and common variables. + Some symbol information is not worth retaining; in `a.out', type + information is stored in the symbol table as long symbol names. + This information would be useless to most COFF debuggers; the + linker has command line switches to allow users to throw it away. + + There is one word of type information within the symbol, so if the + format supports symbol type information within symbols (for + example, COFF, IEEE, Oasys) and the type is simple enough to fit + within one word (nearly everything but aggregates), the + information will be preserved. + +_relocation level_ + Each canonical BFD relocation record contains a pointer to the + symbol to relocate to, the offset of the data to relocate, the + section the data is in, and a pointer to a relocation type + descriptor. Relocation is performed by passing messages through + the relocation type descriptor and the symbol pointer. Therefore, + relocations can be performed on output data using a relocation + method that is only available in one of the input formats. For + instance, Oasys provides a byte relocation format. A relocation + record requesting this relocation type would point indirectly to a + routine to perform this, so the relocation may be performed on a + byte being written to a 68k COFF file, even though 68k COFF has no + such relocation type. + +_line numbers_ + Object formats can contain, for debugging purposes, some form of + mapping between symbols, source line numbers, and addresses in the + output file. These addresses have to be relocated along with the + symbol information. Each symbol with an associated list of line + number records points to the first record of the list. The head + of a line number list consists of a pointer to the symbol, which + allows finding out the address of the function whose line number + is being described. The rest of the list is made up of pairs: + offsets into the section and line numbers. Any format which can + simply derive this information can pass it successfully between + formats (COFF, IEEE and Oasys). + + +File: bfd.info, Node: BFD front end, Next: BFD back ends, Prev: Overview, Up: Top + +2 BFD Front End +*************** + +2.1 `typedef bfd' +================= + +A BFD has type `bfd'; objects of this type are the cornerstone of any +application using BFD. Using BFD consists of making references though +the BFD and to data in the BFD. + + Here is the structure that defines the type `bfd'. It contains the +major data about the file and pointers to the rest of the data. + + + enum bfd_direction + { + no_direction = 0, + read_direction = 1, + write_direction = 2, + both_direction = 3 + }; + + struct bfd + { + /* A unique identifier of the BFD */ + unsigned int id; + + /* The filename the application opened the BFD with. */ + const char *filename; + + /* A pointer to the target jump table. */ + const struct bfd_target *xvec; + + /* The IOSTREAM, and corresponding IO vector that provide access + to the file backing the BFD. */ + void *iostream; + const struct bfd_iovec *iovec; + + /* The caching routines use these to maintain a + least-recently-used list of BFDs. */ + struct bfd *lru_prev, *lru_next; + + /* When a file is closed by the caching routines, BFD retains + state information on the file here... */ + ufile_ptr where; + + /* File modified time, if mtime_set is TRUE. */ + long mtime; + + /* Reserved for an unimplemented file locking extension. */ + int ifd; + + /* The format which belongs to the BFD. (object, core, etc.) */ + bfd_format format; + + /* The direction with which the BFD was opened. */ + enum bfd_direction direction; + + /* Format_specific flags. */ + flagword flags; + + /* Values that may appear in the flags field of a BFD. These also + appear in the object_flags field of the bfd_target structure, where + they indicate the set of flags used by that backend (not all flags + are meaningful for all object file formats) (FIXME: at the moment, + the object_flags values have mostly just been copied from backend + to another, and are not necessarily correct). */ + + #define BFD_NO_FLAGS 0x00 + + /* BFD contains relocation entries. */ + #define HAS_RELOC 0x01 + + /* BFD is directly executable. */ + #define EXEC_P 0x02 + + /* BFD has line number information (basically used for F_LNNO in a + COFF header). */ + #define HAS_LINENO 0x04 + + /* BFD has debugging information. */ + #define HAS_DEBUG 0x08 + + /* BFD has symbols. */ + #define HAS_SYMS 0x10 + + /* BFD has local symbols (basically used for F_LSYMS in a COFF + header). */ + #define HAS_LOCALS 0x20 + + /* BFD is a dynamic object. */ + #define DYNAMIC 0x40 + + /* Text section is write protected (if D_PAGED is not set, this is + like an a.out NMAGIC file) (the linker sets this by default, but + clears it for -r or -N). */ + #define WP_TEXT 0x80 + + /* BFD is dynamically paged (this is like an a.out ZMAGIC file) (the + linker sets this by default, but clears it for -r or -n or -N). */ + #define D_PAGED 0x100 + + /* BFD is relaxable (this means that bfd_relax_section may be able to + do something) (sometimes bfd_relax_section can do something even if + this is not set). */ + #define BFD_IS_RELAXABLE 0x200 + + /* This may be set before writing out a BFD to request using a + traditional format. For example, this is used to request that when + writing out an a.out object the symbols not be hashed to eliminate + duplicates. */ + #define BFD_TRADITIONAL_FORMAT 0x400 + + /* This flag indicates that the BFD contents are actually cached + in memory. If this is set, iostream points to a bfd_in_memory + struct. */ + #define BFD_IN_MEMORY 0x800 + + /* The sections in this BFD specify a memory page. */ + #define HAS_LOAD_PAGE 0x1000 + + /* This BFD has been created by the linker and doesn't correspond + to any input file. */ + #define BFD_LINKER_CREATED 0x2000 + + /* This may be set before writing out a BFD to request that it + be written using values for UIDs, GIDs, timestamps, etc. that + will be consistent from run to run. */ + #define BFD_DETERMINISTIC_OUTPUT 0x4000 + + /* Compress sections in this BFD. */ + #define BFD_COMPRESS 0x8000 + + /* Decompress sections in this BFD. */ + #define BFD_DECOMPRESS 0x10000 + + /* BFD is a dummy, for plugins. */ + #define BFD_PLUGIN 0x20000 + + /* Flags bits to be saved in bfd_preserve_save. */ + #define BFD_FLAGS_SAVED \ + (BFD_IN_MEMORY | BFD_COMPRESS | BFD_DECOMPRESS | BFD_PLUGIN) + + /* Flags bits which are for BFD use only. */ + #define BFD_FLAGS_FOR_BFD_USE_MASK \ + (BFD_IN_MEMORY | BFD_COMPRESS | BFD_DECOMPRESS | BFD_LINKER_CREATED \ + | BFD_PLUGIN | BFD_TRADITIONAL_FORMAT | BFD_DETERMINISTIC_OUTPUT) + + /* Currently my_archive is tested before adding origin to + anything. I believe that this can become always an add of + origin, with origin set to 0 for non archive files. */ + ufile_ptr origin; + + /* The origin in the archive of the proxy entry. This will + normally be the same as origin, except for thin archives, + when it will contain the current offset of the proxy in the + thin archive rather than the offset of the bfd in its actual + container. */ + ufile_ptr proxy_origin; + + /* A hash table for section names. */ + struct bfd_hash_table section_htab; + + /* Pointer to linked list of sections. */ + struct bfd_section *sections; + + /* The last section on the section list. */ + struct bfd_section *section_last; + + /* The number of sections. */ + unsigned int section_count; + + /* Stuff only useful for object files: + The start address. */ + bfd_vma start_address; + + /* Used for input and output. */ + unsigned int symcount; + + /* Symbol table for output BFD (with symcount entries). + Also used by the linker to cache input BFD symbols. */ + struct bfd_symbol **outsymbols; + + /* Used for slurped dynamic symbol tables. */ + unsigned int dynsymcount; + + /* Pointer to structure which contains architecture information. */ + const struct bfd_arch_info *arch_info; + + /* Stuff only useful for archives. */ + void *arelt_data; + struct bfd *my_archive; /* The containing archive BFD. */ + struct bfd *archive_next; /* The next BFD in the archive. */ + struct bfd *archive_head; /* The first BFD in the archive. */ + struct bfd *nested_archives; /* List of nested archive in a flattened + thin archive. */ + + /* A chain of BFD structures involved in a link. */ + struct bfd *link_next; + + /* A field used by _bfd_generic_link_add_archive_symbols. This will + be used only for archive elements. */ + int archive_pass; + + /* Used by the back end to hold private data. */ + union + { + struct aout_data_struct *aout_data; + struct artdata *aout_ar_data; + struct _oasys_data *oasys_obj_data; + struct _oasys_ar_data *oasys_ar_data; + struct coff_tdata *coff_obj_data; + struct pe_tdata *pe_obj_data; + struct xcoff_tdata *xcoff_obj_data; + struct ecoff_tdata *ecoff_obj_data; + struct ieee_data_struct *ieee_data; + struct ieee_ar_data_struct *ieee_ar_data; + struct srec_data_struct *srec_data; + struct verilog_data_struct *verilog_data; + struct ihex_data_struct *ihex_data; + struct tekhex_data_struct *tekhex_data; + struct elf_obj_tdata *elf_obj_data; + struct nlm_obj_tdata *nlm_obj_data; + struct bout_data_struct *bout_data; + struct mmo_data_struct *mmo_data; + struct sun_core_struct *sun_core_data; + struct sco5_core_struct *sco5_core_data; + struct trad_core_struct *trad_core_data; + struct som_data_struct *som_data; + struct hpux_core_struct *hpux_core_data; + struct hppabsd_core_struct *hppabsd_core_data; + struct sgi_core_struct *sgi_core_data; + struct lynx_core_struct *lynx_core_data; + struct osf_core_struct *osf_core_data; + struct cisco_core_struct *cisco_core_data; + struct versados_data_struct *versados_data; + struct netbsd_core_struct *netbsd_core_data; + struct mach_o_data_struct *mach_o_data; + struct mach_o_fat_data_struct *mach_o_fat_data; + struct plugin_data_struct *plugin_data; + struct bfd_pef_data_struct *pef_data; + struct bfd_pef_xlib_data_struct *pef_xlib_data; + struct bfd_sym_data_struct *sym_data; + void *any; + } + tdata; + + /* Used by the application to hold private data. */ + void *usrdata; + + /* Where all the allocated stuff under this BFD goes. This is a + struct objalloc *, but we use void * to avoid requiring the inclusion + of objalloc.h. */ + void *memory; + + /* Is the file descriptor being cached? That is, can it be closed as + needed, and re-opened when accessed later? */ + unsigned int cacheable : 1; + + /* Marks whether there was a default target specified when the + BFD was opened. This is used to select which matching algorithm + to use to choose the back end. */ + unsigned int target_defaulted : 1; + + /* ... and here: (``once'' means at least once). */ + unsigned int opened_once : 1; + + /* Set if we have a locally maintained mtime value, rather than + getting it from the file each time. */ + unsigned int mtime_set : 1; + + /* Flag set if symbols from this BFD should not be exported. */ + unsigned int no_export : 1; + + /* Remember when output has begun, to stop strange things + from happening. */ + unsigned int output_has_begun : 1; + + /* Have archive map. */ + unsigned int has_armap : 1; + + /* Set if this is a thin archive. */ + unsigned int is_thin_archive : 1; + + /* Set if only required symbols should be added in the link hash table for + this object. Used by VMS linkers. */ + unsigned int selective_search : 1; + }; + +2.2 Error reporting +=================== + +Most BFD functions return nonzero on success (check their individual +documentation for precise semantics). On an error, they call +`bfd_set_error' to set an error condition that callers can check by +calling `bfd_get_error'. If that returns `bfd_error_system_call', then +check `errno'. + + The easiest way to report a BFD error to the user is to use +`bfd_perror'. + +2.2.1 Type `bfd_error_type' +--------------------------- + +The values returned by `bfd_get_error' are defined by the enumerated +type `bfd_error_type'. + + + typedef enum bfd_error + { + bfd_error_no_error = 0, + bfd_error_system_call, + bfd_error_invalid_target, + bfd_error_wrong_format, + bfd_error_wrong_object_format, + bfd_error_invalid_operation, + bfd_error_no_memory, + bfd_error_no_symbols, + bfd_error_no_armap, + bfd_error_no_more_archived_files, + bfd_error_malformed_archive, + bfd_error_file_not_recognized, + bfd_error_file_ambiguously_recognized, + bfd_error_no_contents, + bfd_error_nonrepresentable_section, + bfd_error_no_debug_section, + bfd_error_bad_value, + bfd_error_file_truncated, + bfd_error_file_too_big, + bfd_error_on_input, + bfd_error_invalid_error_code + } + bfd_error_type; + +2.2.1.1 `bfd_get_error' +....................... + +*Synopsis* + bfd_error_type bfd_get_error (void); + *Description* +Return the current BFD error condition. + +2.2.1.2 `bfd_set_error' +....................... + +*Synopsis* + void bfd_set_error (bfd_error_type error_tag, ...); + *Description* +Set the BFD error condition to be ERROR_TAG. If ERROR_TAG is +bfd_error_on_input, then this function takes two more parameters, the +input bfd where the error occurred, and the bfd_error_type error. + +2.2.1.3 `bfd_errmsg' +.................... + +*Synopsis* + const char *bfd_errmsg (bfd_error_type error_tag); + *Description* +Return a string describing the error ERROR_TAG, or the system error if +ERROR_TAG is `bfd_error_system_call'. + +2.2.1.4 `bfd_perror' +.................... + +*Synopsis* + void bfd_perror (const char *message); + *Description* +Print to the standard error stream a string describing the last BFD +error that occurred, or the last system error if the last BFD error was +a system call failure. If MESSAGE is non-NULL and non-empty, the error +string printed is preceded by MESSAGE, a colon, and a space. It is +followed by a newline. + +2.2.2 BFD error handler +----------------------- + +Some BFD functions want to print messages describing the problem. They +call a BFD error handler function. This function may be overridden by +the program. + + The BFD error handler acts like printf. + + + typedef void (*bfd_error_handler_type) (const char *, ...); + +2.2.2.1 `bfd_set_error_handler' +............................... + +*Synopsis* + bfd_error_handler_type bfd_set_error_handler (bfd_error_handler_type); + *Description* +Set the BFD error handler function. Returns the previous function. + +2.2.2.2 `bfd_set_error_program_name' +.................................... + +*Synopsis* + void bfd_set_error_program_name (const char *); + *Description* +Set the program name to use when printing a BFD error. This is printed +before the error message followed by a colon and space. The string +must not be changed after it is passed to this function. + +2.2.2.3 `bfd_get_error_handler' +............................... + +*Synopsis* + bfd_error_handler_type bfd_get_error_handler (void); + *Description* +Return the BFD error handler function. + +2.3 Miscellaneous +================= + +2.3.1 Miscellaneous functions +----------------------------- + +2.3.1.1 `bfd_get_reloc_upper_bound' +................................... + +*Synopsis* + long bfd_get_reloc_upper_bound (bfd *abfd, asection *sect); + *Description* +Return the number of bytes required to store the relocation information +associated with section SECT attached to bfd ABFD. If an error occurs, +return -1. + +2.3.1.2 `bfd_canonicalize_reloc' +................................ + +*Synopsis* + long bfd_canonicalize_reloc + (bfd *abfd, asection *sec, arelent **loc, asymbol **syms); + *Description* +Call the back end associated with the open BFD ABFD and translate the +external form of the relocation information attached to SEC into the +internal canonical form. Place the table into memory at LOC, which has +been preallocated, usually by a call to `bfd_get_reloc_upper_bound'. +Returns the number of relocs, or -1 on error. + + The SYMS table is also needed for horrible internal magic reasons. + +2.3.1.3 `bfd_set_reloc' +....................... + +*Synopsis* + void bfd_set_reloc + (bfd *abfd, asection *sec, arelent **rel, unsigned int count); + *Description* +Set the relocation pointer and count within section SEC to the values +REL and COUNT. The argument ABFD is ignored. + +2.3.1.4 `bfd_set_file_flags' +............................ + +*Synopsis* + bfd_boolean bfd_set_file_flags (bfd *abfd, flagword flags); + *Description* +Set the flag word in the BFD ABFD to the value FLAGS. + + Possible errors are: + * `bfd_error_wrong_format' - The target bfd was not of object format. + + * `bfd_error_invalid_operation' - The target bfd was open for + reading. + + * `bfd_error_invalid_operation' - The flag word contained a bit + which was not applicable to the type of file. E.g., an attempt + was made to set the `D_PAGED' bit on a BFD format which does not + support demand paging. + +2.3.1.5 `bfd_get_arch_size' +........................... + +*Synopsis* + int bfd_get_arch_size (bfd *abfd); + *Description* +Returns the architecture address size, in bits, as determined by the +object file's format. For ELF, this information is included in the +header. + + *Returns* +Returns the arch size in bits if known, `-1' otherwise. + +2.3.1.6 `bfd_get_sign_extend_vma' +................................. + +*Synopsis* + int bfd_get_sign_extend_vma (bfd *abfd); + *Description* +Indicates if the target architecture "naturally" sign extends an +address. Some architectures implicitly sign extend address values when +they are converted to types larger than the size of an address. For +instance, bfd_get_start_address() will return an address sign extended +to fill a bfd_vma when this is the case. + + *Returns* +Returns `1' if the target architecture is known to sign extend +addresses, `0' if the target architecture is known to not sign extend +addresses, and `-1' otherwise. + +2.3.1.7 `bfd_set_start_address' +............................... + +*Synopsis* + bfd_boolean bfd_set_start_address (bfd *abfd, bfd_vma vma); + *Description* +Make VMA the entry point of output BFD ABFD. + + *Returns* +Returns `TRUE' on success, `FALSE' otherwise. + +2.3.1.8 `bfd_get_gp_size' +......................... + +*Synopsis* + unsigned int bfd_get_gp_size (bfd *abfd); + *Description* +Return the maximum size of objects to be optimized using the GP +register under MIPS ECOFF. This is typically set by the `-G' argument +to the compiler, assembler or linker. + +2.3.1.9 `bfd_set_gp_size' +......................... + +*Synopsis* + void bfd_set_gp_size (bfd *abfd, unsigned int i); + *Description* +Set the maximum size of objects to be optimized using the GP register +under ECOFF or MIPS ELF. This is typically set by the `-G' argument to +the compiler, assembler or linker. + +2.3.1.10 `bfd_scan_vma' +....................... + +*Synopsis* + bfd_vma bfd_scan_vma (const char *string, const char **end, int base); + *Description* +Convert, like `strtoul', a numerical expression STRING into a `bfd_vma' +integer, and return that integer. (Though without as many bells and +whistles as `strtoul'.) The expression is assumed to be unsigned +(i.e., positive). If given a BASE, it is used as the base for +conversion. A base of 0 causes the function to interpret the string in +hex if a leading "0x" or "0X" is found, otherwise in octal if a leading +zero is found, otherwise in decimal. + + If the value would overflow, the maximum `bfd_vma' value is returned. + +2.3.1.11 `bfd_copy_private_header_data' +....................................... + +*Synopsis* + bfd_boolean bfd_copy_private_header_data (bfd *ibfd, bfd *obfd); + *Description* +Copy private BFD header information from the BFD IBFD to the the BFD +OBFD. This copies information that may require sections to exist, but +does not require symbol tables. Return `true' on success, `false' on +error. Possible error returns are: + + * `bfd_error_no_memory' - Not enough memory exists to create private + data for OBFD. + + #define bfd_copy_private_header_data(ibfd, obfd) \ + BFD_SEND (obfd, _bfd_copy_private_header_data, \ + (ibfd, obfd)) + +2.3.1.12 `bfd_copy_private_bfd_data' +.................................... + +*Synopsis* + bfd_boolean bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd); + *Description* +Copy private BFD information from the BFD IBFD to the the BFD OBFD. +Return `TRUE' on success, `FALSE' on error. Possible error returns are: + + * `bfd_error_no_memory' - Not enough memory exists to create private + data for OBFD. + + #define bfd_copy_private_bfd_data(ibfd, obfd) \ + BFD_SEND (obfd, _bfd_copy_private_bfd_data, \ + (ibfd, obfd)) + +2.3.1.13 `bfd_merge_private_bfd_data' +..................................... + +*Synopsis* + bfd_boolean bfd_merge_private_bfd_data (bfd *ibfd, bfd *obfd); + *Description* +Merge private BFD information from the BFD IBFD to the the output file +BFD OBFD when linking. Return `TRUE' on success, `FALSE' on error. +Possible error returns are: + + * `bfd_error_no_memory' - Not enough memory exists to create private + data for OBFD. + + #define bfd_merge_private_bfd_data(ibfd, obfd) \ + BFD_SEND (obfd, _bfd_merge_private_bfd_data, \ + (ibfd, obfd)) + +2.3.1.14 `bfd_set_private_flags' +................................ + +*Synopsis* + bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags); + *Description* +Set private BFD flag information in the BFD ABFD. Return `TRUE' on +success, `FALSE' on error. Possible error returns are: + + * `bfd_error_no_memory' - Not enough memory exists to create private + data for OBFD. + + #define bfd_set_private_flags(abfd, flags) \ + BFD_SEND (abfd, _bfd_set_private_flags, (abfd, flags)) + +2.3.1.15 `Other functions' +.......................... + +*Description* +The following functions exist but have not yet been documented. + #define bfd_sizeof_headers(abfd, info) \ + BFD_SEND (abfd, _bfd_sizeof_headers, (abfd, info)) + + #define bfd_find_nearest_line(abfd, sec, syms, off, file, func, line) \ + BFD_SEND (abfd, _bfd_find_nearest_line, \ + (abfd, sec, syms, off, file, func, line)) + + #define bfd_find_line(abfd, syms, sym, file, line) \ + BFD_SEND (abfd, _bfd_find_line, \ + (abfd, syms, sym, file, line)) + + #define bfd_find_inliner_info(abfd, file, func, line) \ + BFD_SEND (abfd, _bfd_find_inliner_info, \ + (abfd, file, func, line)) + + #define bfd_debug_info_start(abfd) \ + BFD_SEND (abfd, _bfd_debug_info_start, (abfd)) + + #define bfd_debug_info_end(abfd) \ + BFD_SEND (abfd, _bfd_debug_info_end, (abfd)) + + #define bfd_debug_info_accumulate(abfd, section) \ + BFD_SEND (abfd, _bfd_debug_info_accumulate, (abfd, section)) + + #define bfd_stat_arch_elt(abfd, stat) \ + BFD_SEND (abfd, _bfd_stat_arch_elt,(abfd, stat)) + + #define bfd_update_armap_timestamp(abfd) \ + BFD_SEND (abfd, _bfd_update_armap_timestamp, (abfd)) + + #define bfd_set_arch_mach(abfd, arch, mach)\ + BFD_SEND ( abfd, _bfd_set_arch_mach, (abfd, arch, mach)) + + #define bfd_relax_section(abfd, section, link_info, again) \ + BFD_SEND (abfd, _bfd_relax_section, (abfd, section, link_info, again)) + + #define bfd_gc_sections(abfd, link_info) \ + BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info)) + + #define bfd_lookup_section_flags(link_info, flag_info) \ + BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info)) + + #define bfd_merge_sections(abfd, link_info) \ + BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info)) + + #define bfd_is_group_section(abfd, sec) \ + BFD_SEND (abfd, _bfd_is_group_section, (abfd, sec)) + + #define bfd_discard_group(abfd, sec) \ + BFD_SEND (abfd, _bfd_discard_group, (abfd, sec)) + + #define bfd_link_hash_table_create(abfd) \ + BFD_SEND (abfd, _bfd_link_hash_table_create, (abfd)) + + #define bfd_link_hash_table_free(abfd, hash) \ + BFD_SEND (abfd, _bfd_link_hash_table_free, (hash)) + + #define bfd_link_add_symbols(abfd, info) \ + BFD_SEND (abfd, _bfd_link_add_symbols, (abfd, info)) + + #define bfd_link_just_syms(abfd, sec, info) \ + BFD_SEND (abfd, _bfd_link_just_syms, (sec, info)) + + #define bfd_final_link(abfd, info) \ + BFD_SEND (abfd, _bfd_final_link, (abfd, info)) + + #define bfd_free_cached_info(abfd) \ + BFD_SEND (abfd, _bfd_free_cached_info, (abfd)) + + #define bfd_get_dynamic_symtab_upper_bound(abfd) \ + BFD_SEND (abfd, _bfd_get_dynamic_symtab_upper_bound, (abfd)) + + #define bfd_print_private_bfd_data(abfd, file)\ + BFD_SEND (abfd, _bfd_print_private_bfd_data, (abfd, file)) + + #define bfd_canonicalize_dynamic_symtab(abfd, asymbols) \ + BFD_SEND (abfd, _bfd_canonicalize_dynamic_symtab, (abfd, asymbols)) + + #define bfd_get_synthetic_symtab(abfd, count, syms, dyncount, dynsyms, ret) \ + BFD_SEND (abfd, _bfd_get_synthetic_symtab, (abfd, count, syms, \ + dyncount, dynsyms, ret)) + + #define bfd_get_dynamic_reloc_upper_bound(abfd) \ + BFD_SEND (abfd, _bfd_get_dynamic_reloc_upper_bound, (abfd)) + + #define bfd_canonicalize_dynamic_reloc(abfd, arels, asyms) \ + BFD_SEND (abfd, _bfd_canonicalize_dynamic_reloc, (abfd, arels, asyms)) + + extern bfd_byte *bfd_get_relocated_section_contents + (bfd *, struct bfd_link_info *, struct bfd_link_order *, bfd_byte *, + bfd_boolean, asymbol **); + +2.3.1.16 `bfd_alt_mach_code' +............................ + +*Synopsis* + bfd_boolean bfd_alt_mach_code (bfd *abfd, int alternative); + *Description* +When more than one machine code number is available for the same +machine type, this function can be used to switch between the preferred +one (alternative == 0) and any others. Currently, only ELF supports +this feature, with up to two alternate machine codes. + + struct bfd_preserve + { + void *marker; + void *tdata; + flagword flags; + const struct bfd_arch_info *arch_info; + struct bfd_section *sections; + struct bfd_section *section_last; + unsigned int section_count; + struct bfd_hash_table section_htab; + }; + +2.3.1.17 `bfd_preserve_save' +............................ + +*Synopsis* + bfd_boolean bfd_preserve_save (bfd *, struct bfd_preserve *); + *Description* +When testing an object for compatibility with a particular target +back-end, the back-end object_p function needs to set up certain fields +in the bfd on successfully recognizing the object. This typically +happens in a piecemeal fashion, with failures possible at many points. +On failure, the bfd is supposed to be restored to its initial state, +which is virtually impossible. However, restoring a subset of the bfd +state works in practice. This function stores the subset and +reinitializes the bfd. + +2.3.1.18 `bfd_preserve_restore' +............................... + +*Synopsis* + void bfd_preserve_restore (bfd *, struct bfd_preserve *); + *Description* +This function restores bfd state saved by bfd_preserve_save. If MARKER +is non-NULL in struct bfd_preserve then that block and all subsequently +bfd_alloc'd memory is freed. + +2.3.1.19 `bfd_preserve_finish' +.............................. + +*Synopsis* + void bfd_preserve_finish (bfd *, struct bfd_preserve *); + *Description* +This function should be called when the bfd state saved by +bfd_preserve_save is no longer needed. ie. when the back-end object_p +function returns with success. + +2.3.1.20 `bfd_emul_get_maxpagesize' +................................... + +*Synopsis* + bfd_vma bfd_emul_get_maxpagesize (const char *); + *Description* +Returns the maximum page size, in bytes, as determined by emulation. + + *Returns* +Returns the maximum page size in bytes for ELF, 0 otherwise. + +2.3.1.21 `bfd_emul_set_maxpagesize' +................................... + +*Synopsis* + void bfd_emul_set_maxpagesize (const char *, bfd_vma); + *Description* +For ELF, set the maximum page size for the emulation. It is a no-op +for other formats. + +2.3.1.22 `bfd_emul_get_commonpagesize' +...................................... + +*Synopsis* + bfd_vma bfd_emul_get_commonpagesize (const char *); + *Description* +Returns the common page size, in bytes, as determined by emulation. + + *Returns* +Returns the common page size in bytes for ELF, 0 otherwise. + +2.3.1.23 `bfd_emul_set_commonpagesize' +...................................... + +*Synopsis* + void bfd_emul_set_commonpagesize (const char *, bfd_vma); + *Description* +For ELF, set the common page size for the emulation. It is a no-op for +other formats. + +2.3.1.24 `bfd_demangle' +....................... + +*Synopsis* + char *bfd_demangle (bfd *, const char *, int); + *Description* +Wrapper around cplus_demangle. Strips leading underscores and other +such chars that would otherwise confuse the demangler. If passed a g++ +v3 ABI mangled name, returns a buffer allocated with malloc holding the +demangled name. Returns NULL otherwise and on memory alloc failure. + +2.3.1.25 `struct bfd_iovec' +........................... + +*Description* +The `struct bfd_iovec' contains the internal file I/O class. Each +`BFD' has an instance of this class and all file I/O is routed through +it (it is assumed that the instance implements all methods listed +below). + struct bfd_iovec + { + /* To avoid problems with macros, a "b" rather than "f" + prefix is prepended to each method name. */ + /* Attempt to read/write NBYTES on ABFD's IOSTREAM storing/fetching + bytes starting at PTR. Return the number of bytes actually + transfered (a read past end-of-file returns less than NBYTES), + or -1 (setting `bfd_error') if an error occurs. */ + file_ptr (*bread) (struct bfd *abfd, void *ptr, file_ptr nbytes); + file_ptr (*bwrite) (struct bfd *abfd, const void *ptr, + file_ptr nbytes); + /* Return the current IOSTREAM file offset, or -1 (setting `bfd_error' + if an error occurs. */ + file_ptr (*btell) (struct bfd *abfd); + /* For the following, on successful completion a value of 0 is returned. + Otherwise, a value of -1 is returned (and `bfd_error' is set). */ + int (*bseek) (struct bfd *abfd, file_ptr offset, int whence); + int (*bclose) (struct bfd *abfd); + int (*bflush) (struct bfd *abfd); + int (*bstat) (struct bfd *abfd, struct stat *sb); + /* Mmap a part of the files. ADDR, LEN, PROT, FLAGS and OFFSET are the usual + mmap parameter, except that LEN and OFFSET do not need to be page + aligned. Returns (void *)-1 on failure, mmapped address on success. + Also write in MAP_ADDR the address of the page aligned buffer and in + MAP_LEN the size mapped (a page multiple). Use unmap with MAP_ADDR and + MAP_LEN to unmap. */ + void *(*bmmap) (struct bfd *abfd, void *addr, bfd_size_type len, + int prot, int flags, file_ptr offset, + void **map_addr, bfd_size_type *map_len); + }; + extern const struct bfd_iovec _bfd_memory_iovec; + +2.3.1.26 `bfd_get_mtime' +........................ + +*Synopsis* + long bfd_get_mtime (bfd *abfd); + *Description* +Return the file modification time (as read from the file system, or +from the archive header for archive members). + +2.3.1.27 `bfd_get_size' +....................... + +*Synopsis* + file_ptr bfd_get_size (bfd *abfd); + *Description* +Return the file size (as read from file system) for the file associated +with BFD ABFD. + + The initial motivation for, and use of, this routine is not so we +can get the exact size of the object the BFD applies to, since that +might not be generally possible (archive members for example). It +would be ideal if someone could eventually modify it so that such +results were guaranteed. + + Instead, we want to ask questions like "is this NNN byte sized +object I'm about to try read from file offset YYY reasonable?" As as +example of where we might do this, some object formats use string +tables for which the first `sizeof (long)' bytes of the table contain +the size of the table itself, including the size bytes. If an +application tries to read what it thinks is one of these string tables, +without some way to validate the size, and for some reason the size is +wrong (byte swapping error, wrong location for the string table, etc.), +the only clue is likely to be a read error when it tries to read the +table, or a "virtual memory exhausted" error when it tries to allocate +15 bazillon bytes of space for the 15 bazillon byte table it is about +to read. This function at least allows us to answer the question, "is +the size reasonable?". + +2.3.1.28 `bfd_mmap' +................... + +*Synopsis* + void *bfd_mmap (bfd *abfd, void *addr, bfd_size_type len, + int prot, int flags, file_ptr offset, + void **map_addr, bfd_size_type *map_len); + *Description* +Return mmap()ed region of the file, if possible and implemented. LEN +and OFFSET do not need to be page aligned. The page aligned address +and length are written to MAP_ADDR and MAP_LEN. + +* Menu: + +* Memory Usage:: +* Initialization:: +* Sections:: +* Symbols:: +* Archives:: +* Formats:: +* Relocations:: +* Core Files:: +* Targets:: +* Architectures:: +* Opening and Closing:: +* Internal:: +* File Caching:: +* Linker Functions:: +* Hash Tables:: + + +File: bfd.info, Node: Memory Usage, Next: Initialization, Prev: BFD front end, Up: BFD front end + +2.4 Memory Usage +================ + +BFD keeps all of its internal structures in obstacks. There is one +obstack per open BFD file, into which the current state is stored. When +a BFD is closed, the obstack is deleted, and so everything which has +been allocated by BFD for the closing file is thrown away. + + BFD does not free anything created by an application, but pointers +into `bfd' structures become invalid on a `bfd_close'; for example, +after a `bfd_close' the vector passed to `bfd_canonicalize_symtab' is +still around, since it has been allocated by the application, but the +data that it pointed to are lost. + + The general rule is to not close a BFD until all operations dependent +upon data from the BFD have been completed, or all the data from within +the file has been copied. To help with the management of memory, there +is a function (`bfd_alloc_size') which returns the number of bytes in +obstacks associated with the supplied BFD. This could be used to select +the greediest open BFD, close it to reclaim the memory, perform some +operation and reopen the BFD again, to get a fresh copy of the data +structures. + + +File: bfd.info, Node: Initialization, Next: Sections, Prev: Memory Usage, Up: BFD front end + +2.5 Initialization +================== + +2.5.1 Initialization functions +------------------------------ + +These are the functions that handle initializing a BFD. + +2.5.1.1 `bfd_init' +.................. + +*Synopsis* + void bfd_init (void); + *Description* +This routine must be called before any other BFD function to initialize +magical internal data structures. + + +File: bfd.info, Node: Sections, Next: Symbols, Prev: Initialization, Up: BFD front end + +2.6 Sections +============ + +The raw data contained within a BFD is maintained through the section +abstraction. A single BFD may have any number of sections. It keeps +hold of them by pointing to the first; each one points to the next in +the list. + + Sections are supported in BFD in `section.c'. + +* Menu: + +* Section Input:: +* Section Output:: +* typedef asection:: +* section prototypes:: + + +File: bfd.info, Node: Section Input, Next: Section Output, Prev: Sections, Up: Sections + +2.6.1 Section input +------------------- + +When a BFD is opened for reading, the section structures are created +and attached to the BFD. + + Each section has a name which describes the section in the outside +world--for example, `a.out' would contain at least three sections, +called `.text', `.data' and `.bss'. + + Names need not be unique; for example a COFF file may have several +sections named `.data'. + + Sometimes a BFD will contain more than the "natural" number of +sections. A back end may attach other sections containing constructor +data, or an application may add a section (using `bfd_make_section') to +the sections attached to an already open BFD. For example, the linker +creates an extra section `COMMON' for each input file's BFD to hold +information about common storage. + + The raw data is not necessarily read in when the section descriptor +is created. Some targets may leave the data in place until a +`bfd_get_section_contents' call is made. Other back ends may read in +all the data at once. For example, an S-record file has to be read +once to determine the size of the data. An IEEE-695 file doesn't +contain raw data in sections, but data and relocation expressions +intermixed, so the data area has to be parsed to get out the data and +relocations. + + +File: bfd.info, Node: Section Output, Next: typedef asection, Prev: Section Input, Up: Sections + +2.6.2 Section output +-------------------- + +To write a new object style BFD, the various sections to be written +have to be created. They are attached to the BFD in the same way as +input sections; data is written to the sections using +`bfd_set_section_contents'. + + Any program that creates or combines sections (e.g., the assembler +and linker) must use the `asection' fields `output_section' and +`output_offset' to indicate the file sections to which each section +must be written. (If the section is being created from scratch, +`output_section' should probably point to the section itself and +`output_offset' should probably be zero.) + + The data to be written comes from input sections attached (via +`output_section' pointers) to the output sections. The output section +structure can be considered a filter for the input section: the output +section determines the vma of the output data and the name, but the +input section determines the offset into the output section of the data +to be written. + + E.g., to create a section "O", starting at 0x100, 0x123 long, +containing two subsections, "A" at offset 0x0 (i.e., at vma 0x100) and +"B" at offset 0x20 (i.e., at vma 0x120) the `asection' structures would +look like: + + section name "A" + output_offset 0x00 + size 0x20 + output_section -----------> section name "O" + | vma 0x100 + section name "B" | size 0x123 + output_offset 0x20 | + size 0x103 | + output_section --------| + +2.6.3 Link orders +----------------- + +The data within a section is stored in a "link_order". These are much +like the fixups in `gas'. The link_order abstraction allows a section +to grow and shrink within itself. + + A link_order knows how big it is, and which is the next link_order +and where the raw data for it is; it also points to a list of +relocations which apply to it. + + The link_order is used by the linker to perform relaxing on final +code. The compiler creates code which is as big as necessary to make +it work without relaxing, and the user can select whether to relax. +Sometimes relaxing takes a lot of time. The linker runs around the +relocations to see if any are attached to data which can be shrunk, if +so it does it on a link_order by link_order basis. + + +File: bfd.info, Node: typedef asection, Next: section prototypes, Prev: Section Output, Up: Sections + +2.6.4 typedef asection +---------------------- + +Here is the section structure: + + + typedef struct bfd_section + { + /* The name of the section; the name isn't a copy, the pointer is + the same as that passed to bfd_make_section. */ + const char *name; + + /* A unique sequence number. */ + int id; + + /* Which section in the bfd; 0..n-1 as sections are created in a bfd. */ + int index; + + /* The next section in the list belonging to the BFD, or NULL. */ + struct bfd_section *next; + + /* The previous section in the list belonging to the BFD, or NULL. */ + struct bfd_section *prev; + + /* The field flags contains attributes of the section. Some + flags are read in from the object file, and some are + synthesized from other information. */ + flagword flags; + + #define SEC_NO_FLAGS 0x000 + + /* Tells the OS to allocate space for this section when loading. + This is clear for a section containing debug information only. */ + #define SEC_ALLOC 0x001 + + /* Tells the OS to load the section from the file when loading. + This is clear for a .bss section. */ + #define SEC_LOAD 0x002 + + /* The section contains data still to be relocated, so there is + some relocation information too. */ + #define SEC_RELOC 0x004 + + /* A signal to the OS that the section contains read only data. */ + #define SEC_READONLY 0x008 + + /* The section contains code only. */ + #define SEC_CODE 0x010 + + /* The section contains data only. */ + #define SEC_DATA 0x020 + + /* The section will reside in ROM. */ + #define SEC_ROM 0x040 + + /* The section contains constructor information. This section + type is used by the linker to create lists of constructors and + destructors used by `g++'. When a back end sees a symbol + which should be used in a constructor list, it creates a new + section for the type of name (e.g., `__CTOR_LIST__'), attaches + the symbol to it, and builds a relocation. To build the lists + of constructors, all the linker has to do is catenate all the + sections called `__CTOR_LIST__' and relocate the data + contained within - exactly the operations it would peform on + standard data. */ + #define SEC_CONSTRUCTOR 0x080 + + /* The section has contents - a data section could be + `SEC_ALLOC' | `SEC_HAS_CONTENTS'; a debug section could be + `SEC_HAS_CONTENTS' */ + #define SEC_HAS_CONTENTS 0x100 + + /* An instruction to the linker to not output the section + even if it has information which would normally be written. */ + #define SEC_NEVER_LOAD 0x200 + + /* The section contains thread local data. */ + #define SEC_THREAD_LOCAL 0x400 + + /* The section has GOT references. This flag is only for the + linker, and is currently only used by the elf32-hppa back end. + It will be set if global offset table references were detected + in this section, which indicate to the linker that the section + contains PIC code, and must be handled specially when doing a + static link. */ + #define SEC_HAS_GOT_REF 0x800 + + /* The section contains common symbols (symbols may be defined + multiple times, the value of a symbol is the amount of + space it requires, and the largest symbol value is the one + used). Most targets have exactly one of these (which we + translate to bfd_com_section_ptr), but ECOFF has two. */ + #define SEC_IS_COMMON 0x1000 + + /* The section contains only debugging information. For + example, this is set for ELF .debug and .stab sections. + strip tests this flag to see if a section can be + discarded. */ + #define SEC_DEBUGGING 0x2000 + + /* The contents of this section are held in memory pointed to + by the contents field. This is checked by bfd_get_section_contents, + and the data is retrieved from memory if appropriate. */ + #define SEC_IN_MEMORY 0x4000 + + /* The contents of this section are to be excluded by the + linker for executable and shared objects unless those + objects are to be further relocated. */ + #define SEC_EXCLUDE 0x8000 + + /* The contents of this section are to be sorted based on the sum of + the symbol and addend values specified by the associated relocation + entries. Entries without associated relocation entries will be + appended to the end of the section in an unspecified order. */ + #define SEC_SORT_ENTRIES 0x10000 + + /* When linking, duplicate sections of the same name should be + discarded, rather than being combined into a single section as + is usually done. This is similar to how common symbols are + handled. See SEC_LINK_DUPLICATES below. */ + #define SEC_LINK_ONCE 0x20000 + + /* If SEC_LINK_ONCE is set, this bitfield describes how the linker + should handle duplicate sections. */ + #define SEC_LINK_DUPLICATES 0xc0000 + + /* This value for SEC_LINK_DUPLICATES means that duplicate + sections with the same name should simply be discarded. */ + #define SEC_LINK_DUPLICATES_DISCARD 0x0 + + /* This value for SEC_LINK_DUPLICATES means that the linker + should warn if there are any duplicate sections, although + it should still only link one copy. */ + #define SEC_LINK_DUPLICATES_ONE_ONLY 0x40000 + + /* This value for SEC_LINK_DUPLICATES means that the linker + should warn if any duplicate sections are a different size. */ + #define SEC_LINK_DUPLICATES_SAME_SIZE 0x80000 + + /* This value for SEC_LINK_DUPLICATES means that the linker + should warn if any duplicate sections contain different + contents. */ + #define SEC_LINK_DUPLICATES_SAME_CONTENTS \ + (SEC_LINK_DUPLICATES_ONE_ONLY | SEC_LINK_DUPLICATES_SAME_SIZE) + + /* This section was created by the linker as part of dynamic + relocation or other arcane processing. It is skipped when + going through the first-pass output, trusting that someone + else up the line will take care of it later. */ + #define SEC_LINKER_CREATED 0x100000 + + /* This section should not be subject to garbage collection. + Also set to inform the linker that this section should not be + listed in the link map as discarded. */ + #define SEC_KEEP 0x200000 + + /* This section contains "short" data, and should be placed + "near" the GP. */ + #define SEC_SMALL_DATA 0x400000 + + /* Attempt to merge identical entities in the section. + Entity size is given in the entsize field. */ + #define SEC_MERGE 0x800000 + + /* If given with SEC_MERGE, entities to merge are zero terminated + strings where entsize specifies character size instead of fixed + size entries. */ + #define SEC_STRINGS 0x1000000 + + /* This section contains data about section groups. */ + #define SEC_GROUP 0x2000000 + + /* The section is a COFF shared library section. This flag is + only for the linker. If this type of section appears in + the input file, the linker must copy it to the output file + without changing the vma or size. FIXME: Although this + was originally intended to be general, it really is COFF + specific (and the flag was renamed to indicate this). It + might be cleaner to have some more general mechanism to + allow the back end to control what the linker does with + sections. */ + #define SEC_COFF_SHARED_LIBRARY 0x4000000 + + /* This input section should be copied to output in reverse order + as an array of pointers. This is for ELF linker internal use + only. */ + #define SEC_ELF_REVERSE_COPY 0x4000000 + + /* This section contains data which may be shared with other + executables or shared objects. This is for COFF only. */ + #define SEC_COFF_SHARED 0x8000000 + + /* When a section with this flag is being linked, then if the size of + the input section is less than a page, it should not cross a page + boundary. If the size of the input section is one page or more, + it should be aligned on a page boundary. This is for TI + TMS320C54X only. */ + #define SEC_TIC54X_BLOCK 0x10000000 + + /* Conditionally link this section; do not link if there are no + references found to any symbol in the section. This is for TI + TMS320C54X only. */ + #define SEC_TIC54X_CLINK 0x20000000 + + /* Indicate that section has the no read flag set. This happens + when memory read flag isn't set. */ + #define SEC_COFF_NOREAD 0x40000000 + + /* End of section flags. */ + + /* Some internal packed boolean fields. */ + + /* See the vma field. */ + unsigned int user_set_vma : 1; + + /* A mark flag used by some of the linker backends. */ + unsigned int linker_mark : 1; + + /* Another mark flag used by some of the linker backends. Set for + output sections that have an input section. */ + unsigned int linker_has_input : 1; + + /* Mark flag used by some linker backends for garbage collection. */ + unsigned int gc_mark : 1; + + /* Section compression status. */ + unsigned int compress_status : 2; + #define COMPRESS_SECTION_NONE 0 + #define COMPRESS_SECTION_DONE 1 + #define DECOMPRESS_SECTION_SIZED 2 + + /* The following flags are used by the ELF linker. */ + + /* Mark sections which have been allocated to segments. */ + unsigned int segment_mark : 1; + + /* Type of sec_info information. */ + unsigned int sec_info_type:3; + #define ELF_INFO_TYPE_NONE 0 + #define ELF_INFO_TYPE_STABS 1 + #define ELF_INFO_TYPE_MERGE 2 + #define ELF_INFO_TYPE_EH_FRAME 3 + #define ELF_INFO_TYPE_JUST_SYMS 4 + + /* Nonzero if this section uses RELA relocations, rather than REL. */ + unsigned int use_rela_p:1; + + /* Bits used by various backends. The generic code doesn't touch + these fields. */ + + unsigned int sec_flg0:1; + unsigned int sec_flg1:1; + unsigned int sec_flg2:1; + unsigned int sec_flg3:1; + unsigned int sec_flg4:1; + unsigned int sec_flg5:1; + + /* End of internal packed boolean fields. */ + + /* The virtual memory address of the section - where it will be + at run time. The symbols are relocated against this. The + user_set_vma flag is maintained by bfd; if it's not set, the + backend can assign addresses (for example, in `a.out', where + the default address for `.data' is dependent on the specific + target and various flags). */ + bfd_vma vma; + + /* The load address of the section - where it would be in a + rom image; really only used for writing section header + information. */ + bfd_vma lma; + + /* The size of the section in octets, as it will be output. + Contains a value even if the section has no contents (e.g., the + size of `.bss'). */ + bfd_size_type size; + + /* For input sections, the original size on disk of the section, in + octets. This field should be set for any section whose size is + changed by linker relaxation. It is required for sections where + the linker relaxation scheme doesn't cache altered section and + reloc contents (stabs, eh_frame, SEC_MERGE, some coff relaxing + targets), and thus the original size needs to be kept to read the + section multiple times. For output sections, rawsize holds the + section size calculated on a previous linker relaxation pass. */ + bfd_size_type rawsize; + + /* The compressed size of the section in octets. */ + bfd_size_type compressed_size; + + /* Relaxation table. */ + struct relax_table *relax; + + /* Count of used relaxation table entries. */ + int relax_count; + + + /* If this section is going to be output, then this value is the + offset in *bytes* into the output section of the first byte in the + input section (byte ==> smallest addressable unit on the + target). In most cases, if this was going to start at the + 100th octet (8-bit quantity) in the output section, this value + would be 100. However, if the target byte size is 16 bits + (bfd_octets_per_byte is "2"), this value would be 50. */ + bfd_vma output_offset; + + /* The output section through which to map on output. */ + struct bfd_section *output_section; + + /* The alignment requirement of the section, as an exponent of 2 - + e.g., 3 aligns to 2^3 (or 8). */ + unsigned int alignment_power; + + /* If an input section, a pointer to a vector of relocation + records for the data in this section. */ + struct reloc_cache_entry *relocation; + + /* If an output section, a pointer to a vector of pointers to + relocation records for the data in this section. */ + struct reloc_cache_entry **orelocation; + + /* The number of relocation records in one of the above. */ + unsigned reloc_count; + + /* Information below is back end specific - and not always used + or updated. */ + + /* File position of section data. */ + file_ptr filepos; + + /* File position of relocation info. */ + file_ptr rel_filepos; + + /* File position of line data. */ + file_ptr line_filepos; + + /* Pointer to data for applications. */ + void *userdata; + + /* If the SEC_IN_MEMORY flag is set, this points to the actual + contents. */ + unsigned char *contents; + + /* Attached line number information. */ + alent *lineno; + + /* Number of line number records. */ + unsigned int lineno_count; + + /* Entity size for merging purposes. */ + unsigned int entsize; + + /* Points to the kept section if this section is a link-once section, + and is discarded. */ + struct bfd_section *kept_section; + + /* When a section is being output, this value changes as more + linenumbers are written out. */ + file_ptr moving_line_filepos; + + /* What the section number is in the target world. */ + int target_index; + + void *used_by_bfd; + + /* If this is a constructor section then here is a list of the + relocations created to relocate items within it. */ + struct relent_chain *constructor_chain; + + /* The BFD which owns the section. */ + bfd *owner; + + /* INPUT_SECTION_FLAGS if specified in the linker script. */ + struct flag_info *section_flag_info; + + /* A symbol which points at this section only. */ + struct bfd_symbol *symbol; + struct bfd_symbol **symbol_ptr_ptr; + + /* Early in the link process, map_head and map_tail are used to build + a list of input sections attached to an output section. Later, + output sections use these fields for a list of bfd_link_order + structs. */ + union { + struct bfd_link_order *link_order; + struct bfd_section *s; + } map_head, map_tail; + } asection; + + /* Relax table contains information about instructions which can + be removed by relaxation -- replacing a long address with a + short address. */ + struct relax_table { + /* Address where bytes may be deleted. */ + bfd_vma addr; + + /* Number of bytes to be deleted. */ + int size; + }; + + /* These sections are global, and are managed by BFD. The application + and target back end are not permitted to change the values in + these sections. New code should use the section_ptr macros rather + than referring directly to the const sections. The const sections + may eventually vanish. */ + #define BFD_ABS_SECTION_NAME "*ABS*" + #define BFD_UND_SECTION_NAME "*UND*" + #define BFD_COM_SECTION_NAME "*COM*" + #define BFD_IND_SECTION_NAME "*IND*" + + /* The absolute section. */ + extern asection bfd_abs_section; + #define bfd_abs_section_ptr ((asection *) &bfd_abs_section) + #define bfd_is_abs_section(sec) ((sec) == bfd_abs_section_ptr) + /* Pointer to the undefined section. */ + extern asection bfd_und_section; + #define bfd_und_section_ptr ((asection *) &bfd_und_section) + #define bfd_is_und_section(sec) ((sec) == bfd_und_section_ptr) + /* Pointer to the common section. */ + extern asection bfd_com_section; + #define bfd_com_section_ptr ((asection *) &bfd_com_section) + /* Pointer to the indirect section. */ + extern asection bfd_ind_section; + #define bfd_ind_section_ptr ((asection *) &bfd_ind_section) + #define bfd_is_ind_section(sec) ((sec) == bfd_ind_section_ptr) + + #define bfd_is_const_section(SEC) \ + ( ((SEC) == bfd_abs_section_ptr) \ + || ((SEC) == bfd_und_section_ptr) \ + || ((SEC) == bfd_com_section_ptr) \ + || ((SEC) == bfd_ind_section_ptr)) + + /* Macros to handle insertion and deletion of a bfd's sections. These + only handle the list pointers, ie. do not adjust section_count, + target_index etc. */ + #define bfd_section_list_remove(ABFD, S) \ + do \ + { \ + asection *_s = S; \ + asection *_next = _s->next; \ + asection *_prev = _s->prev; \ + if (_prev) \ + _prev->next = _next; \ + else \ + (ABFD)->sections = _next; \ + if (_next) \ + _next->prev = _prev; \ + else \ + (ABFD)->section_last = _prev; \ + } \ + while (0) + #define bfd_section_list_append(ABFD, S) \ + do \ + { \ + asection *_s = S; \ + bfd *_abfd = ABFD; \ + _s->next = NULL; \ + if (_abfd->section_last) \ + { \ + _s->prev = _abfd->section_last; \ + _abfd->section_last->next = _s; \ + } \ + else \ + { \ + _s->prev = NULL; \ + _abfd->sections = _s; \ + } \ + _abfd->section_last = _s; \ + } \ + while (0) + #define bfd_section_list_prepend(ABFD, S) \ + do \ + { \ + asection *_s = S; \ + bfd *_abfd = ABFD; \ + _s->prev = NULL; \ + if (_abfd->sections) \ + { \ + _s->next = _abfd->sections; \ + _abfd->sections->prev = _s; \ + } \ + else \ + { \ + _s->next = NULL; \ + _abfd->section_last = _s; \ + } \ + _abfd->sections = _s; \ + } \ + while (0) + #define bfd_section_list_insert_after(ABFD, A, S) \ + do \ + { \ + asection *_a = A; \ + asection *_s = S; \ + asection *_next = _a->next; \ + _s->next = _next; \ + _s->prev = _a; \ + _a->next = _s; \ + if (_next) \ + _next->prev = _s; \ + else \ + (ABFD)->section_last = _s; \ + } \ + while (0) + #define bfd_section_list_insert_before(ABFD, B, S) \ + do \ + { \ + asection *_b = B; \ + asection *_s = S; \ + asection *_prev = _b->prev; \ + _s->prev = _prev; \ + _s->next = _b; \ + _b->prev = _s; \ + if (_prev) \ + _prev->next = _s; \ + else \ + (ABFD)->sections = _s; \ + } \ + while (0) + #define bfd_section_removed_from_list(ABFD, S) \ + ((S)->next == NULL ? (ABFD)->section_last != (S) : (S)->next->prev != (S)) + + #define BFD_FAKE_SECTION(SEC, FLAGS, SYM, NAME, IDX) \ + /* name, id, index, next, prev, flags, user_set_vma, */ \ + { NAME, IDX, 0, NULL, NULL, FLAGS, 0, \ + \ + /* linker_mark, linker_has_input, gc_mark, decompress_status, */ \ + 0, 0, 1, 0, \ + \ + /* segment_mark, sec_info_type, use_rela_p, */ \ + 0, 0, 0, \ + \ + /* sec_flg0, sec_flg1, sec_flg2, sec_flg3, sec_flg4, sec_flg5, */ \ + 0, 0, 0, 0, 0, 0, \ + \ + /* vma, lma, size, rawsize, compressed_size, relax, relax_count, */ \ + 0, 0, 0, 0, 0, 0, 0, \ + \ + /* output_offset, output_section, alignment_power, */ \ + 0, (struct bfd_section *) &SEC, 0, \ + \ + /* relocation, orelocation, reloc_count, filepos, rel_filepos, */ \ + NULL, NULL, 0, 0, 0, \ + \ + /* line_filepos, userdata, contents, lineno, lineno_count, */ \ + 0, NULL, NULL, NULL, 0, \ + \ + /* entsize, kept_section, moving_line_filepos, */ \ + 0, NULL, 0, \ + \ + /* target_index, used_by_bfd, constructor_chain, owner, */ \ + 0, NULL, NULL, NULL, \ + \ + /* flag_info, */ \ + NULL, \ + \ + /* symbol, symbol_ptr_ptr, */ \ + (struct bfd_symbol *) SYM, &SEC.symbol, \ + \ + /* map_head, map_tail */ \ + { NULL }, { NULL } \ + } + + +File: bfd.info, Node: section prototypes, Prev: typedef asection, Up: Sections + +2.6.5 Section prototypes +------------------------ + +These are the functions exported by the section handling part of BFD. + +2.6.5.1 `bfd_section_list_clear' +................................ + +*Synopsis* + void bfd_section_list_clear (bfd *); + *Description* +Clears the section list, and also resets the section count and hash +table entries. + +2.6.5.2 `bfd_get_section_by_name' +................................. + +*Synopsis* + asection *bfd_get_section_by_name (bfd *abfd, const char *name); + *Description* +Run through ABFD and return the one of the `asection's whose name +matches NAME, otherwise `NULL'. *Note Sections::, for more information. + + This should only be used in special cases; the normal way to process +all sections of a given name is to use `bfd_map_over_sections' and +`strcmp' on the name (or better yet, base it on the section flags or +something else) for each section. + +2.6.5.3 `bfd_get_section_by_name_if' +.................................... + +*Synopsis* + asection *bfd_get_section_by_name_if + (bfd *abfd, + const char *name, + bfd_boolean (*func) (bfd *abfd, asection *sect, void *obj), + void *obj); + *Description* +Call the provided function FUNC for each section attached to the BFD +ABFD whose name matches NAME, passing OBJ as an argument. The function +will be called as if by + + func (abfd, the_section, obj); + + It returns the first section for which FUNC returns true, otherwise +`NULL'. + +2.6.5.4 `bfd_get_unique_section_name' +..................................... + +*Synopsis* + char *bfd_get_unique_section_name + (bfd *abfd, const char *templat, int *count); + *Description* +Invent a section name that is unique in ABFD by tacking a dot and a +digit suffix onto the original TEMPLAT. If COUNT is non-NULL, then it +specifies the first number tried as a suffix to generate a unique name. +The value pointed to by COUNT will be incremented in this case. + +2.6.5.5 `bfd_make_section_old_way' +.................................. + +*Synopsis* + asection *bfd_make_section_old_way (bfd *abfd, const char *name); + *Description* +Create a new empty section called NAME and attach it to the end of the +chain of sections for the BFD ABFD. An attempt to create a section with +a name which is already in use returns its pointer without changing the +section chain. + + It has the funny name since this is the way it used to be before it +was rewritten.... + + Possible errors are: + * `bfd_error_invalid_operation' - If output has already started for + this BFD. + + * `bfd_error_no_memory' - If memory allocation fails. + +2.6.5.6 `bfd_make_section_anyway_with_flags' +............................................ + +*Synopsis* + asection *bfd_make_section_anyway_with_flags + (bfd *abfd, const char *name, flagword flags); + *Description* +Create a new empty section called NAME and attach it to the end of the +chain of sections for ABFD. Create a new section even if there is +already a section with that name. Also set the attributes of the new +section to the value FLAGS. + + Return `NULL' and set `bfd_error' on error; possible errors are: + * `bfd_error_invalid_operation' - If output has already started for + ABFD. + + * `bfd_error_no_memory' - If memory allocation fails. + +2.6.5.7 `bfd_make_section_anyway' +................................. + +*Synopsis* + asection *bfd_make_section_anyway (bfd *abfd, const char *name); + *Description* +Create a new empty section called NAME and attach it to the end of the +chain of sections for ABFD. Create a new section even if there is +already a section with that name. + + Return `NULL' and set `bfd_error' on error; possible errors are: + * `bfd_error_invalid_operation' - If output has already started for + ABFD. + + * `bfd_error_no_memory' - If memory allocation fails. + +2.6.5.8 `bfd_make_section_with_flags' +..................................... + +*Synopsis* + asection *bfd_make_section_with_flags + (bfd *, const char *name, flagword flags); + *Description* +Like `bfd_make_section_anyway', but return `NULL' (without calling +bfd_set_error ()) without changing the section chain if there is +already a section named NAME. Also set the attributes of the new +section to the value FLAGS. If there is an error, return `NULL' and set +`bfd_error'. + +2.6.5.9 `bfd_make_section' +.......................... + +*Synopsis* + asection *bfd_make_section (bfd *, const char *name); + *Description* +Like `bfd_make_section_anyway', but return `NULL' (without calling +bfd_set_error ()) without changing the section chain if there is +already a section named NAME. If there is an error, return `NULL' and +set `bfd_error'. + +2.6.5.10 `bfd_set_section_flags' +................................ + +*Synopsis* + bfd_boolean bfd_set_section_flags + (bfd *abfd, asection *sec, flagword flags); + *Description* +Set the attributes of the section SEC in the BFD ABFD to the value +FLAGS. Return `TRUE' on success, `FALSE' on error. Possible error +returns are: + + * `bfd_error_invalid_operation' - The section cannot have one or + more of the attributes requested. For example, a .bss section in + `a.out' may not have the `SEC_HAS_CONTENTS' field set. + +2.6.5.11 `bfd_rename_section' +............................. + +*Synopsis* + void bfd_rename_section + (bfd *abfd, asection *sec, const char *newname); + *Description* +Rename section SEC in ABFD to NEWNAME. + +2.6.5.12 `bfd_map_over_sections' +................................ + +*Synopsis* + void bfd_map_over_sections + (bfd *abfd, + void (*func) (bfd *abfd, asection *sect, void *obj), + void *obj); + *Description* +Call the provided function FUNC for each section attached to the BFD +ABFD, passing OBJ as an argument. The function will be called as if by + + func (abfd, the_section, obj); + + This is the preferred method for iterating over sections; an +alternative would be to use a loop: + + section *p; + for (p = abfd->sections; p != NULL; p = p->next) + func (abfd, p, ...) + +2.6.5.13 `bfd_sections_find_if' +............................... + +*Synopsis* + asection *bfd_sections_find_if + (bfd *abfd, + bfd_boolean (*operation) (bfd *abfd, asection *sect, void *obj), + void *obj); + *Description* +Call the provided function OPERATION for each section attached to the +BFD ABFD, passing OBJ as an argument. The function will be called as if +by + + operation (abfd, the_section, obj); + + It returns the first section for which OPERATION returns true. + +2.6.5.14 `bfd_set_section_size' +............................... + +*Synopsis* + bfd_boolean bfd_set_section_size + (bfd *abfd, asection *sec, bfd_size_type val); + *Description* +Set SEC to the size VAL. If the operation is ok, then `TRUE' is +returned, else `FALSE'. + + Possible error returns: + * `bfd_error_invalid_operation' - Writing has started to the BFD, so + setting the size is invalid. + +2.6.5.15 `bfd_set_section_contents' +................................... + +*Synopsis* + bfd_boolean bfd_set_section_contents + (bfd *abfd, asection *section, const void *data, + file_ptr offset, bfd_size_type count); + *Description* +Sets the contents of the section SECTION in BFD ABFD to the data +starting in memory at DATA. The data is written to the output section +starting at offset OFFSET for COUNT octets. + + Normally `TRUE' is returned, else `FALSE'. Possible error returns +are: + * `bfd_error_no_contents' - The output section does not have the + `SEC_HAS_CONTENTS' attribute, so nothing can be written to it. + + * and some more too + This routine is front end to the back end function +`_bfd_set_section_contents'. + +2.6.5.16 `bfd_get_section_contents' +................................... + +*Synopsis* + bfd_boolean bfd_get_section_contents + (bfd *abfd, asection *section, void *location, file_ptr offset, + bfd_size_type count); + *Description* +Read data from SECTION in BFD ABFD into memory starting at LOCATION. +The data is read at an offset of OFFSET from the start of the input +section, and is read for COUNT bytes. + + If the contents of a constructor with the `SEC_CONSTRUCTOR' flag set +are requested or if the section does not have the `SEC_HAS_CONTENTS' +flag set, then the LOCATION is filled with zeroes. If no errors occur, +`TRUE' is returned, else `FALSE'. + +2.6.5.17 `bfd_malloc_and_get_section' +..................................... + +*Synopsis* + bfd_boolean bfd_malloc_and_get_section + (bfd *abfd, asection *section, bfd_byte **buf); + *Description* +Read all data from SECTION in BFD ABFD into a buffer, *BUF, malloc'd by +this function. + +2.6.5.18 `bfd_copy_private_section_data' +........................................ + +*Synopsis* + bfd_boolean bfd_copy_private_section_data + (bfd *ibfd, asection *isec, bfd *obfd, asection *osec); + *Description* +Copy private section information from ISEC in the BFD IBFD to the +section OSEC in the BFD OBFD. Return `TRUE' on success, `FALSE' on +error. Possible error returns are: + + * `bfd_error_no_memory' - Not enough memory exists to create private + data for OSEC. + + #define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \ + BFD_SEND (obfd, _bfd_copy_private_section_data, \ + (ibfd, isection, obfd, osection)) + +2.6.5.19 `bfd_generic_is_group_section' +....................................... + +*Synopsis* + bfd_boolean bfd_generic_is_group_section (bfd *, const asection *sec); + *Description* +Returns TRUE if SEC is a member of a group. + +2.6.5.20 `bfd_generic_discard_group' +.................................... + +*Synopsis* + bfd_boolean bfd_generic_discard_group (bfd *abfd, asection *group); + *Description* +Remove all members of GROUP from the output. + + +File: bfd.info, Node: Symbols, Next: Archives, Prev: Sections, Up: BFD front end + +2.7 Symbols +=========== + +BFD tries to maintain as much symbol information as it can when it +moves information from file to file. BFD passes information to +applications though the `asymbol' structure. When the application +requests the symbol table, BFD reads the table in the native form and +translates parts of it into the internal format. To maintain more than +the information passed to applications, some targets keep some +information "behind the scenes" in a structure only the particular back +end knows about. For example, the coff back end keeps the original +symbol table structure as well as the canonical structure when a BFD is +read in. On output, the coff back end can reconstruct the output symbol +table so that no information is lost, even information unique to coff +which BFD doesn't know or understand. If a coff symbol table were read, +but were written through an a.out back end, all the coff specific +information would be lost. The symbol table of a BFD is not necessarily +read in until a canonicalize request is made. Then the BFD back end +fills in a table provided by the application with pointers to the +canonical information. To output symbols, the application provides BFD +with a table of pointers to pointers to `asymbol's. This allows +applications like the linker to output a symbol as it was read, since +the "behind the scenes" information will be still available. + +* Menu: + +* Reading Symbols:: +* Writing Symbols:: +* Mini Symbols:: +* typedef asymbol:: +* symbol handling functions:: + + +File: bfd.info, Node: Reading Symbols, Next: Writing Symbols, Prev: Symbols, Up: Symbols + +2.7.1 Reading symbols +--------------------- + +There are two stages to reading a symbol table from a BFD: allocating +storage, and the actual reading process. This is an excerpt from an +application which reads the symbol table: + + long storage_needed; + asymbol **symbol_table; + long number_of_symbols; + long i; + + storage_needed = bfd_get_symtab_upper_bound (abfd); + + if (storage_needed < 0) + FAIL + + if (storage_needed == 0) + return; + + symbol_table = xmalloc (storage_needed); + ... + number_of_symbols = + bfd_canonicalize_symtab (abfd, symbol_table); + + if (number_of_symbols < 0) + FAIL + + for (i = 0; i < number_of_symbols; i++) + process_symbol (symbol_table[i]); + + All storage for the symbols themselves is in an objalloc connected +to the BFD; it is freed when the BFD is closed. + + +File: bfd.info, Node: Writing Symbols, Next: Mini Symbols, Prev: Reading Symbols, Up: Symbols + +2.7.2 Writing symbols +--------------------- + +Writing of a symbol table is automatic when a BFD open for writing is +closed. The application attaches a vector of pointers to pointers to +symbols to the BFD being written, and fills in the symbol count. The +close and cleanup code reads through the table provided and performs +all the necessary operations. The BFD output code must always be +provided with an "owned" symbol: one which has come from another BFD, +or one which has been created using `bfd_make_empty_symbol'. Here is an +example showing the creation of a symbol table with only one element: + + #include "bfd.h" + int main (void) + { + bfd *abfd; + asymbol *ptrs[2]; + asymbol *new; + + abfd = bfd_openw ("foo","a.out-sunos-big"); + bfd_set_format (abfd, bfd_object); + new = bfd_make_empty_symbol (abfd); + new->name = "dummy_symbol"; + new->section = bfd_make_section_old_way (abfd, ".text"); + new->flags = BSF_GLOBAL; + new->value = 0x12345; + + ptrs[0] = new; + ptrs[1] = 0; + + bfd_set_symtab (abfd, ptrs, 1); + bfd_close (abfd); + return 0; + } + + ./makesym + nm foo + 00012345 A dummy_symbol + + Many formats cannot represent arbitrary symbol information; for +instance, the `a.out' object format does not allow an arbitrary number +of sections. A symbol pointing to a section which is not one of +`.text', `.data' or `.bss' cannot be described. + + +File: bfd.info, Node: Mini Symbols, Next: typedef asymbol, Prev: Writing Symbols, Up: Symbols + +2.7.3 Mini Symbols +------------------ + +Mini symbols provide read-only access to the symbol table. They use +less memory space, but require more time to access. They can be useful +for tools like nm or objdump, which may have to handle symbol tables of +extremely large executables. + + The `bfd_read_minisymbols' function will read the symbols into +memory in an internal form. It will return a `void *' pointer to a +block of memory, a symbol count, and the size of each symbol. The +pointer is allocated using `malloc', and should be freed by the caller +when it is no longer needed. + + The function `bfd_minisymbol_to_symbol' will take a pointer to a +minisymbol, and a pointer to a structure returned by +`bfd_make_empty_symbol', and return a `asymbol' structure. The return +value may or may not be the same as the value from +`bfd_make_empty_symbol' which was passed in. + + +File: bfd.info, Node: typedef asymbol, Next: symbol handling functions, Prev: Mini Symbols, Up: Symbols + +2.7.4 typedef asymbol +--------------------- + +An `asymbol' has the form: + + + typedef struct bfd_symbol + { + /* A pointer to the BFD which owns the symbol. This information + is necessary so that a back end can work out what additional + information (invisible to the application writer) is carried + with the symbol. + + This field is *almost* redundant, since you can use section->owner + instead, except that some symbols point to the global sections + bfd_{abs,com,und}_section. This could be fixed by making + these globals be per-bfd (or per-target-flavor). FIXME. */ + struct bfd *the_bfd; /* Use bfd_asymbol_bfd(sym) to access this field. */ + + /* The text of the symbol. The name is left alone, and not copied; the + application may not alter it. */ + const char *name; + + /* The value of the symbol. This really should be a union of a + numeric value with a pointer, since some flags indicate that + a pointer to another symbol is stored here. */ + symvalue value; + + /* Attributes of a symbol. */ + #define BSF_NO_FLAGS 0x00 + + /* The symbol has local scope; `static' in `C'. The value + is the offset into the section of the data. */ + #define BSF_LOCAL (1 << 0) + + /* The symbol has global scope; initialized data in `C'. The + value is the offset into the section of the data. */ + #define BSF_GLOBAL (1 << 1) + + /* The symbol has global scope and is exported. The value is + the offset into the section of the data. */ + #define BSF_EXPORT BSF_GLOBAL /* No real difference. */ + + /* A normal C symbol would be one of: + `BSF_LOCAL', `BSF_COMMON', `BSF_UNDEFINED' or + `BSF_GLOBAL'. */ + + /* The symbol is a debugging record. The value has an arbitrary + meaning, unless BSF_DEBUGGING_RELOC is also set. */ + #define BSF_DEBUGGING (1 << 2) + + /* The symbol denotes a function entry point. Used in ELF, + perhaps others someday. */ + #define BSF_FUNCTION (1 << 3) + + /* Used by the linker. */ + #define BSF_KEEP (1 << 5) + #define BSF_KEEP_G (1 << 6) + + /* A weak global symbol, overridable without warnings by + a regular global symbol of the same name. */ + #define BSF_WEAK (1 << 7) + + /* This symbol was created to point to a section, e.g. ELF's + STT_SECTION symbols. */ + #define BSF_SECTION_SYM (1 << 8) + + /* The symbol used to be a common symbol, but now it is + allocated. */ + #define BSF_OLD_COMMON (1 << 9) + + /* In some files the type of a symbol sometimes alters its + location in an output file - ie in coff a `ISFCN' symbol + which is also `C_EXT' symbol appears where it was + declared and not at the end of a section. This bit is set + by the target BFD part to convey this information. */ + #define BSF_NOT_AT_END (1 << 10) + + /* Signal that the symbol is the label of constructor section. */ + #define BSF_CONSTRUCTOR (1 << 11) + + /* Signal that the symbol is a warning symbol. The name is a + warning. The name of the next symbol is the one to warn about; + if a reference is made to a symbol with the same name as the next + symbol, a warning is issued by the linker. */ + #define BSF_WARNING (1 << 12) + + /* Signal that the symbol is indirect. This symbol is an indirect + pointer to the symbol with the same name as the next symbol. */ + #define BSF_INDIRECT (1 << 13) + + /* BSF_FILE marks symbols that contain a file name. This is used + for ELF STT_FILE symbols. */ + #define BSF_FILE (1 << 14) + + /* Symbol is from dynamic linking information. */ + #define BSF_DYNAMIC (1 << 15) + + /* The symbol denotes a data object. Used in ELF, and perhaps + others someday. */ + #define BSF_OBJECT (1 << 16) + + /* This symbol is a debugging symbol. The value is the offset + into the section of the data. BSF_DEBUGGING should be set + as well. */ + #define BSF_DEBUGGING_RELOC (1 << 17) + + /* This symbol is thread local. Used in ELF. */ + #define BSF_THREAD_LOCAL (1 << 18) + + /* This symbol represents a complex relocation expression, + with the expression tree serialized in the symbol name. */ + #define BSF_RELC (1 << 19) + + /* This symbol represents a signed complex relocation expression, + with the expression tree serialized in the symbol name. */ + #define BSF_SRELC (1 << 20) + + /* This symbol was created by bfd_get_synthetic_symtab. */ + #define BSF_SYNTHETIC (1 << 21) + + /* This symbol is an indirect code object. Unrelated to BSF_INDIRECT. + The dynamic linker will compute the value of this symbol by + calling the function that it points to. BSF_FUNCTION must + also be also set. */ + #define BSF_GNU_INDIRECT_FUNCTION (1 << 22) + /* This symbol is a globally unique data object. The dynamic linker + will make sure that in the entire process there is just one symbol + with this name and type in use. BSF_OBJECT must also be set. */ + #define BSF_GNU_UNIQUE (1 << 23) + + flagword flags; + + /* A pointer to the section to which this symbol is + relative. This will always be non NULL, there are special + sections for undefined and absolute symbols. */ + struct bfd_section *section; + + /* Back end special data. */ + union + { + void *p; + bfd_vma i; + } + udata; + } + asymbol; + + +File: bfd.info, Node: symbol handling functions, Prev: typedef asymbol, Up: Symbols + +2.7.5 Symbol handling functions +------------------------------- + +2.7.5.1 `bfd_get_symtab_upper_bound' +.................................... + +*Description* +Return the number of bytes required to store a vector of pointers to +`asymbols' for all the symbols in the BFD ABFD, including a terminal +NULL pointer. If there are no symbols in the BFD, then return 0. If an +error occurs, return -1. + #define bfd_get_symtab_upper_bound(abfd) \ + BFD_SEND (abfd, _bfd_get_symtab_upper_bound, (abfd)) + +2.7.5.2 `bfd_is_local_label' +............................ + +*Synopsis* + bfd_boolean bfd_is_local_label (bfd *abfd, asymbol *sym); + *Description* +Return TRUE if the given symbol SYM in the BFD ABFD is a compiler +generated local label, else return FALSE. + +2.7.5.3 `bfd_is_local_label_name' +................................. + +*Synopsis* + bfd_boolean bfd_is_local_label_name (bfd *abfd, const char *name); + *Description* +Return TRUE if a symbol with the name NAME in the BFD ABFD is a +compiler generated local label, else return FALSE. This just checks +whether the name has the form of a local label. + #define bfd_is_local_label_name(abfd, name) \ + BFD_SEND (abfd, _bfd_is_local_label_name, (abfd, name)) + +2.7.5.4 `bfd_is_target_special_symbol' +...................................... + +*Synopsis* + bfd_boolean bfd_is_target_special_symbol (bfd *abfd, asymbol *sym); + *Description* +Return TRUE iff a symbol SYM in the BFD ABFD is something special to +the particular target represented by the BFD. Such symbols should +normally not be mentioned to the user. + #define bfd_is_target_special_symbol(abfd, sym) \ + BFD_SEND (abfd, _bfd_is_target_special_symbol, (abfd, sym)) + +2.7.5.5 `bfd_canonicalize_symtab' +................................. + +*Description* +Read the symbols from the BFD ABFD, and fills in the vector LOCATION +with pointers to the symbols and a trailing NULL. Return the actual +number of symbol pointers, not including the NULL. + #define bfd_canonicalize_symtab(abfd, location) \ + BFD_SEND (abfd, _bfd_canonicalize_symtab, (abfd, location)) + +2.7.5.6 `bfd_set_symtab' +........................ + +*Synopsis* + bfd_boolean bfd_set_symtab + (bfd *abfd, asymbol **location, unsigned int count); + *Description* +Arrange that when the output BFD ABFD is closed, the table LOCATION of +COUNT pointers to symbols will be written. + +2.7.5.7 `bfd_print_symbol_vandf' +................................ + +*Synopsis* + void bfd_print_symbol_vandf (bfd *abfd, void *file, asymbol *symbol); + *Description* +Print the value and flags of the SYMBOL supplied to the stream FILE. + +2.7.5.8 `bfd_make_empty_symbol' +............................... + +*Description* +Create a new `asymbol' structure for the BFD ABFD and return a pointer +to it. + + This routine is necessary because each back end has private +information surrounding the `asymbol'. Building your own `asymbol' and +pointing to it will not create the private information, and will cause +problems later on. + #define bfd_make_empty_symbol(abfd) \ + BFD_SEND (abfd, _bfd_make_empty_symbol, (abfd)) + +2.7.5.9 `_bfd_generic_make_empty_symbol' +........................................ + +*Synopsis* + asymbol *_bfd_generic_make_empty_symbol (bfd *); + *Description* +Create a new `asymbol' structure for the BFD ABFD and return a pointer +to it. Used by core file routines, binary back-end and anywhere else +where no private info is needed. + +2.7.5.10 `bfd_make_debug_symbol' +................................ + +*Description* +Create a new `asymbol' structure for the BFD ABFD, to be used as a +debugging symbol. Further details of its use have yet to be worked out. + #define bfd_make_debug_symbol(abfd,ptr,size) \ + BFD_SEND (abfd, _bfd_make_debug_symbol, (abfd, ptr, size)) + +2.7.5.11 `bfd_decode_symclass' +.............................. + +*Description* +Return a character corresponding to the symbol class of SYMBOL, or '?' +for an unknown class. + + *Synopsis* + int bfd_decode_symclass (asymbol *symbol); + +2.7.5.12 `bfd_is_undefined_symclass' +.................................... + +*Description* +Returns non-zero if the class symbol returned by bfd_decode_symclass +represents an undefined symbol. Returns zero otherwise. + + *Synopsis* + bfd_boolean bfd_is_undefined_symclass (int symclass); + +2.7.5.13 `bfd_symbol_info' +.......................... + +*Description* +Fill in the basic info about symbol that nm needs. Additional info may +be added by the back-ends after calling this function. + + *Synopsis* + void bfd_symbol_info (asymbol *symbol, symbol_info *ret); + +2.7.5.14 `bfd_copy_private_symbol_data' +....................................... + +*Synopsis* + bfd_boolean bfd_copy_private_symbol_data + (bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym); + *Description* +Copy private symbol information from ISYM in the BFD IBFD to the symbol +OSYM in the BFD OBFD. Return `TRUE' on success, `FALSE' on error. +Possible error returns are: + + * `bfd_error_no_memory' - Not enough memory exists to create private + data for OSEC. + + #define bfd_copy_private_symbol_data(ibfd, isymbol, obfd, osymbol) \ + BFD_SEND (obfd, _bfd_copy_private_symbol_data, \ + (ibfd, isymbol, obfd, osymbol)) + + +File: bfd.info, Node: Archives, Next: Formats, Prev: Symbols, Up: BFD front end + +2.8 Archives +============ + +*Description* +An archive (or library) is just another BFD. It has a symbol table, +although there's not much a user program will do with it. + + The big difference between an archive BFD and an ordinary BFD is +that the archive doesn't have sections. Instead it has a chain of BFDs +that are considered its contents. These BFDs can be manipulated like +any other. The BFDs contained in an archive opened for reading will +all be opened for reading. You may put either input or output BFDs +into an archive opened for output; they will be handled correctly when +the archive is closed. + + Use `bfd_openr_next_archived_file' to step through the contents of +an archive opened for input. You don't have to read the entire archive +if you don't want to! Read it until you find what you want. + + Archive contents of output BFDs are chained through the `next' +pointer in a BFD. The first one is findable through the `archive_head' +slot of the archive. Set it with `bfd_set_archive_head' (q.v.). A +given BFD may be in only one open output archive at a time. + + As expected, the BFD archive code is more general than the archive +code of any given environment. BFD archives may contain files of +different formats (e.g., a.out and coff) and even different +architectures. You may even place archives recursively into archives! + + This can cause unexpected confusion, since some archive formats are +more expressive than others. For instance, Intel COFF archives can +preserve long filenames; SunOS a.out archives cannot. If you move a +file from the first to the second format and back again, the filename +may be truncated. Likewise, different a.out environments have different +conventions as to how they truncate filenames, whether they preserve +directory names in filenames, etc. When interoperating with native +tools, be sure your files are homogeneous. + + Beware: most of these formats do not react well to the presence of +spaces in filenames. We do the best we can, but can't always handle +this case due to restrictions in the format of archives. Many Unix +utilities are braindead in regards to spaces and such in filenames +anyway, so this shouldn't be much of a restriction. + + Archives are supported in BFD in `archive.c'. + +2.8.1 Archive functions +----------------------- + +2.8.1.1 `bfd_get_next_mapent' +............................. + +*Synopsis* + symindex bfd_get_next_mapent + (bfd *abfd, symindex previous, carsym **sym); + *Description* +Step through archive ABFD's symbol table (if it has one). Successively +update SYM with the next symbol's information, returning that symbol's +(internal) index into the symbol table. + + Supply `BFD_NO_MORE_SYMBOLS' as the PREVIOUS entry to get the first +one; returns `BFD_NO_MORE_SYMBOLS' when you've already got the last one. + + A `carsym' is a canonical archive symbol. The only user-visible +element is its name, a null-terminated string. + +2.8.1.2 `bfd_set_archive_head' +.............................. + +*Synopsis* + bfd_boolean bfd_set_archive_head (bfd *output, bfd *new_head); + *Description* +Set the head of the chain of BFDs contained in the archive OUTPUT to +NEW_HEAD. + +2.8.1.3 `bfd_openr_next_archived_file' +...................................... + +*Synopsis* + bfd *bfd_openr_next_archived_file (bfd *archive, bfd *previous); + *Description* +Provided a BFD, ARCHIVE, containing an archive and NULL, open an input +BFD on the first contained element and returns that. Subsequent calls +should pass the archive and the previous return value to return a +created BFD to the next contained element. NULL is returned when there +are no more. + + +File: bfd.info, Node: Formats, Next: Relocations, Prev: Archives, Up: BFD front end + +2.9 File formats +================ + +A format is a BFD concept of high level file contents type. The formats +supported by BFD are: + + * `bfd_object' + The BFD may contain data, symbols, relocations and debug info. + + * `bfd_archive' + The BFD contains other BFDs and an optional index. + + * `bfd_core' + The BFD contains the result of an executable core dump. + +2.9.1 File format functions +--------------------------- + +2.9.1.1 `bfd_check_format' +.......................... + +*Synopsis* + bfd_boolean bfd_check_format (bfd *abfd, bfd_format format); + *Description* +Verify if the file attached to the BFD ABFD is compatible with the +format FORMAT (i.e., one of `bfd_object', `bfd_archive' or `bfd_core'). + + If the BFD has been set to a specific target before the call, only +the named target and format combination is checked. If the target has +not been set, or has been set to `default', then all the known target +backends is interrogated to determine a match. If the default target +matches, it is used. If not, exactly one target must recognize the +file, or an error results. + + The function returns `TRUE' on success, otherwise `FALSE' with one +of the following error codes: + + * `bfd_error_invalid_operation' - if `format' is not one of + `bfd_object', `bfd_archive' or `bfd_core'. + + * `bfd_error_system_call' - if an error occured during a read - even + some file mismatches can cause bfd_error_system_calls. + + * `file_not_recognised' - none of the backends recognised the file + format. + + * `bfd_error_file_ambiguously_recognized' - more than one backend + recognised the file format. + +2.9.1.2 `bfd_check_format_matches' +.................................. + +*Synopsis* + bfd_boolean bfd_check_format_matches + (bfd *abfd, bfd_format format, char ***matching); + *Description* +Like `bfd_check_format', except when it returns FALSE with `bfd_errno' +set to `bfd_error_file_ambiguously_recognized'. In that case, if +MATCHING is not NULL, it will be filled in with a NULL-terminated list +of the names of the formats that matched, allocated with `malloc'. +Then the user may choose a format and try again. + + When done with the list that MATCHING points to, the caller should +free it. + +2.9.1.3 `bfd_set_format' +........................ + +*Synopsis* + bfd_boolean bfd_set_format (bfd *abfd, bfd_format format); + *Description* +This function sets the file format of the BFD ABFD to the format +FORMAT. If the target set in the BFD does not support the format +requested, the format is invalid, or the BFD is not open for writing, +then an error occurs. + +2.9.1.4 `bfd_format_string' +........................... + +*Synopsis* + const char *bfd_format_string (bfd_format format); + *Description* +Return a pointer to a const string `invalid', `object', `archive', +`core', or `unknown', depending upon the value of FORMAT. + + +File: bfd.info, Node: Relocations, Next: Core Files, Prev: Formats, Up: BFD front end + +2.10 Relocations +================ + +BFD maintains relocations in much the same way it maintains symbols: +they are left alone until required, then read in en-masse and +translated into an internal form. A common routine +`bfd_perform_relocation' acts upon the canonical form to do the fixup. + + Relocations are maintained on a per section basis, while symbols are +maintained on a per BFD basis. + + All that a back end has to do to fit the BFD interface is to create +a `struct reloc_cache_entry' for each relocation in a particular +section, and fill in the right bits of the structures. + +* Menu: + +* typedef arelent:: +* howto manager:: + + +File: bfd.info, Node: typedef arelent, Next: howto manager, Prev: Relocations, Up: Relocations + +2.10.1 typedef arelent +---------------------- + +This is the structure of a relocation entry: + + + typedef enum bfd_reloc_status + { + /* No errors detected. */ + bfd_reloc_ok, + + /* The relocation was performed, but there was an overflow. */ + bfd_reloc_overflow, + + /* The address to relocate was not within the section supplied. */ + bfd_reloc_outofrange, + + /* Used by special functions. */ + bfd_reloc_continue, + + /* Unsupported relocation size requested. */ + bfd_reloc_notsupported, + + /* Unused. */ + bfd_reloc_other, + + /* The symbol to relocate against was undefined. */ + bfd_reloc_undefined, + + /* The relocation was performed, but may not be ok - presently + generated only when linking i960 coff files with i960 b.out + symbols. If this type is returned, the error_message argument + to bfd_perform_relocation will be set. */ + bfd_reloc_dangerous + } + bfd_reloc_status_type; + + + typedef struct reloc_cache_entry + { + /* A pointer into the canonical table of pointers. */ + struct bfd_symbol **sym_ptr_ptr; + + /* offset in section. */ + bfd_size_type address; + + /* addend for relocation value. */ + bfd_vma addend; + + /* Pointer to how to perform the required relocation. */ + reloc_howto_type *howto; + + } + arelent; + *Description* +Here is a description of each of the fields within an `arelent': + + * `sym_ptr_ptr' + The symbol table pointer points to a pointer to the symbol +associated with the relocation request. It is the pointer into the +table returned by the back end's `canonicalize_symtab' action. *Note +Symbols::. The symbol is referenced through a pointer to a pointer so +that tools like the linker can fix up all the symbols of the same name +by modifying only one pointer. The relocation routine looks in the +symbol and uses the base of the section the symbol is attached to and +the value of the symbol as the initial relocation offset. If the symbol +pointer is zero, then the section provided is looked up. + + * `address' + The `address' field gives the offset in bytes from the base of the +section data which owns the relocation record to the first byte of +relocatable information. The actual data relocated will be relative to +this point; for example, a relocation type which modifies the bottom +two bytes of a four byte word would not touch the first byte pointed to +in a big endian world. + + * `addend' + The `addend' is a value provided by the back end to be added (!) to +the relocation offset. Its interpretation is dependent upon the howto. +For example, on the 68k the code: + + char foo[]; + main() + { + return foo[0x12345678]; + } + + Could be compiled into: + + linkw fp,#-4 + moveb @#12345678,d0 + extbl d0 + unlk fp + rts + + This could create a reloc pointing to `foo', but leave the offset in +the data, something like: + + RELOCATION RECORDS FOR [.text]: + offset type value + 00000006 32 _foo + + 00000000 4e56 fffc ; linkw fp,#-4 + 00000004 1039 1234 5678 ; moveb @#12345678,d0 + 0000000a 49c0 ; extbl d0 + 0000000c 4e5e ; unlk fp + 0000000e 4e75 ; rts + + Using coff and an 88k, some instructions don't have enough space in +them to represent the full address range, and pointers have to be +loaded in two parts. So you'd get something like: + + or.u r13,r0,hi16(_foo+0x12345678) + ld.b r2,r13,lo16(_foo+0x12345678) + jmp r1 + + This should create two relocs, both pointing to `_foo', and with +0x12340000 in their addend field. The data would consist of: + + RELOCATION RECORDS FOR [.text]: + offset type value + 00000002 HVRT16 _foo+0x12340000 + 00000006 LVRT16 _foo+0x12340000 + + 00000000 5da05678 ; or.u r13,r0,0x5678 + 00000004 1c4d5678 ; ld.b r2,r13,0x5678 + 00000008 f400c001 ; jmp r1 + + The relocation routine digs out the value from the data, adds it to +the addend to get the original offset, and then adds the value of +`_foo'. Note that all 32 bits have to be kept around somewhere, to cope +with carry from bit 15 to bit 16. + + One further example is the sparc and the a.out format. The sparc has +a similar problem to the 88k, in that some instructions don't have room +for an entire offset, but on the sparc the parts are created in odd +sized lumps. The designers of the a.out format chose to not use the +data within the section for storing part of the offset; all the offset +is kept within the reloc. Anything in the data should be ignored. + + save %sp,-112,%sp + sethi %hi(_foo+0x12345678),%g2 + ldsb [%g2+%lo(_foo+0x12345678)],%i0 + ret + restore + + Both relocs contain a pointer to `foo', and the offsets contain junk. + + RELOCATION RECORDS FOR [.text]: + offset type value + 00000004 HI22 _foo+0x12345678 + 00000008 LO10 _foo+0x12345678 + + 00000000 9de3bf90 ; save %sp,-112,%sp + 00000004 05000000 ; sethi %hi(_foo+0),%g2 + 00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0 + 0000000c 81c7e008 ; ret + 00000010 81e80000 ; restore + + * `howto' + The `howto' field can be imagined as a relocation instruction. It is +a pointer to a structure which contains information on what to do with +all of the other information in the reloc record and data section. A +back end would normally have a relocation instruction set and turn +relocations into pointers to the correct structure on input - but it +would be possible to create each howto field on demand. + +2.10.1.1 `enum complain_overflow' +................................. + +Indicates what sort of overflow checking should be done when performing +a relocation. + + + enum complain_overflow + { + /* Do not complain on overflow. */ + complain_overflow_dont, + + /* Complain if the value overflows when considered as a signed + number one bit larger than the field. ie. A bitfield of N bits + is allowed to represent -2**n to 2**n-1. */ + complain_overflow_bitfield, + + /* Complain if the value overflows when considered as a signed + number. */ + complain_overflow_signed, + + /* Complain if the value overflows when considered as an + unsigned number. */ + complain_overflow_unsigned + }; + +2.10.1.2 `reloc_howto_type' +........................... + +The `reloc_howto_type' is a structure which contains all the +information that libbfd needs to know to tie up a back end's data. + + struct bfd_symbol; /* Forward declaration. */ + + struct reloc_howto_struct + { + /* The type field has mainly a documentary use - the back end can + do what it wants with it, though normally the back end's + external idea of what a reloc number is stored + in this field. For example, a PC relative word relocation + in a coff environment has the type 023 - because that's + what the outside world calls a R_PCRWORD reloc. */ + unsigned int type; + + /* The value the final relocation is shifted right by. This drops + unwanted data from the relocation. */ + unsigned int rightshift; + + /* The size of the item to be relocated. This is *not* a + power-of-two measure. To get the number of bytes operated + on by a type of relocation, use bfd_get_reloc_size. */ + int size; + + /* The number of bits in the item to be relocated. This is used + when doing overflow checking. */ + unsigned int bitsize; + + /* The relocation is relative to the field being relocated. */ + bfd_boolean pc_relative; + + /* The bit position of the reloc value in the destination. + The relocated value is left shifted by this amount. */ + unsigned int bitpos; + + /* What type of overflow error should be checked for when + relocating. */ + enum complain_overflow complain_on_overflow; + + /* If this field is non null, then the supplied function is + called rather than the normal function. This allows really + strange relocation methods to be accommodated (e.g., i960 callj + instructions). */ + bfd_reloc_status_type (*special_function) + (bfd *, arelent *, struct bfd_symbol *, void *, asection *, + bfd *, char **); + + /* The textual name of the relocation type. */ + char *name; + + /* Some formats record a relocation addend in the section contents + rather than with the relocation. For ELF formats this is the + distinction between USE_REL and USE_RELA (though the code checks + for USE_REL == 1/0). The value of this field is TRUE if the + addend is recorded with the section contents; when performing a + partial link (ld -r) the section contents (the data) will be + modified. The value of this field is FALSE if addends are + recorded with the relocation (in arelent.addend); when performing + a partial link the relocation will be modified. + All relocations for all ELF USE_RELA targets should set this field + to FALSE (values of TRUE should be looked on with suspicion). + However, the converse is not true: not all relocations of all ELF + USE_REL targets set this field to TRUE. Why this is so is peculiar + to each particular target. For relocs that aren't used in partial + links (e.g. GOT stuff) it doesn't matter what this is set to. */ + bfd_boolean partial_inplace; + + /* src_mask selects the part of the instruction (or data) to be used + in the relocation sum. If the target relocations don't have an + addend in the reloc, eg. ELF USE_REL, src_mask will normally equal + dst_mask to extract the addend from the section contents. If + relocations do have an addend in the reloc, eg. ELF USE_RELA, this + field should be zero. Non-zero values for ELF USE_RELA targets are + bogus as in those cases the value in the dst_mask part of the + section contents should be treated as garbage. */ + bfd_vma src_mask; + + /* dst_mask selects which parts of the instruction (or data) are + replaced with a relocated value. */ + bfd_vma dst_mask; + + /* When some formats create PC relative instructions, they leave + the value of the pc of the place being relocated in the offset + slot of the instruction, so that a PC relative relocation can + be made just by adding in an ordinary offset (e.g., sun3 a.out). + Some formats leave the displacement part of an instruction + empty (e.g., m88k bcs); this flag signals the fact. */ + bfd_boolean pcrel_offset; + }; + +2.10.1.3 `The HOWTO Macro' +.......................... + +*Description* +The HOWTO define is horrible and will go away. + #define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \ + { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC } + + *Description* +And will be replaced with the totally magic way. But for the moment, we +are compatible, so do it this way. + #define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \ + HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \ + NAME, FALSE, 0, 0, IN) + + *Description* +This is used to fill in an empty howto entry in an array. + #define EMPTY_HOWTO(C) \ + HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \ + NULL, FALSE, 0, 0, FALSE) + + *Description* +Helper routine to turn a symbol into a relocation value. + #define HOWTO_PREPARE(relocation, symbol) \ + { \ + if (symbol != NULL) \ + { \ + if (bfd_is_com_section (symbol->section)) \ + { \ + relocation = 0; \ + } \ + else \ + { \ + relocation = symbol->value; \ + } \ + } \ + } + +2.10.1.4 `bfd_get_reloc_size' +............................. + +*Synopsis* + unsigned int bfd_get_reloc_size (reloc_howto_type *); + *Description* +For a reloc_howto_type that operates on a fixed number of bytes, this +returns the number of bytes operated on. + +2.10.1.5 `arelent_chain' +........................ + +*Description* +How relocs are tied together in an `asection': + typedef struct relent_chain + { + arelent relent; + struct relent_chain *next; + } + arelent_chain; + +2.10.1.6 `bfd_check_overflow' +............................. + +*Synopsis* + bfd_reloc_status_type bfd_check_overflow + (enum complain_overflow how, + unsigned int bitsize, + unsigned int rightshift, + unsigned int addrsize, + bfd_vma relocation); + *Description* +Perform overflow checking on RELOCATION which has BITSIZE significant +bits and will be shifted right by RIGHTSHIFT bits, on a machine with +addresses containing ADDRSIZE significant bits. The result is either of +`bfd_reloc_ok' or `bfd_reloc_overflow'. + +2.10.1.7 `bfd_perform_relocation' +................................. + +*Synopsis* + bfd_reloc_status_type bfd_perform_relocation + (bfd *abfd, + arelent *reloc_entry, + void *data, + asection *input_section, + bfd *output_bfd, + char **error_message); + *Description* +If OUTPUT_BFD is supplied to this function, the generated image will be +relocatable; the relocations are copied to the output file after they +have been changed to reflect the new state of the world. There are two +ways of reflecting the results of partial linkage in an output file: by +modifying the output data in place, and by modifying the relocation +record. Some native formats (e.g., basic a.out and basic coff) have no +way of specifying an addend in the relocation type, so the addend has +to go in the output data. This is no big deal since in these formats +the output data slot will always be big enough for the addend. Complex +reloc types with addends were invented to solve just this problem. The +ERROR_MESSAGE argument is set to an error message if this return +`bfd_reloc_dangerous'. + +2.10.1.8 `bfd_install_relocation' +................................. + +*Synopsis* + bfd_reloc_status_type bfd_install_relocation + (bfd *abfd, + arelent *reloc_entry, + void *data, bfd_vma data_start, + asection *input_section, + char **error_message); + *Description* +This looks remarkably like `bfd_perform_relocation', except it does not +expect that the section contents have been filled in. I.e., it's +suitable for use when creating, rather than applying a relocation. + + For now, this function should be considered reserved for the +assembler. + + +File: bfd.info, Node: howto manager, Prev: typedef arelent, Up: Relocations + +2.10.2 The howto manager +------------------------ + +When an application wants to create a relocation, but doesn't know what +the target machine might call it, it can find out by using this bit of +code. + +2.10.2.1 `bfd_reloc_code_type' +.............................. + +*Description* +The insides of a reloc code. The idea is that, eventually, there will +be one enumerator for every type of relocation we ever do. Pass one of +these values to `bfd_reloc_type_lookup', and it'll return a howto +pointer. + + This does mean that the application must determine the correct +enumerator value; you can't get a howto pointer from a random set of +attributes. + + Here are the possible values for `enum bfd_reloc_code_real': + + -- : BFD_RELOC_64 + -- : BFD_RELOC_32 + -- : BFD_RELOC_26 + -- : BFD_RELOC_24 + -- : BFD_RELOC_16 + -- : BFD_RELOC_14 + -- : BFD_RELOC_8 + Basic absolute relocations of N bits. + + -- : BFD_RELOC_64_PCREL + -- : BFD_RELOC_32_PCREL + -- : BFD_RELOC_24_PCREL + -- : BFD_RELOC_16_PCREL + -- : BFD_RELOC_12_PCREL + -- : BFD_RELOC_8_PCREL + PC-relative relocations. Sometimes these are relative to the + address of the relocation itself; sometimes they are relative to + the start of the section containing the relocation. It depends on + the specific target. + + The 24-bit relocation is used in some Intel 960 configurations. + + -- : BFD_RELOC_32_SECREL + Section relative relocations. Some targets need this for DWARF2. + + -- : BFD_RELOC_32_GOT_PCREL + -- : BFD_RELOC_16_GOT_PCREL + -- : BFD_RELOC_8_GOT_PCREL + -- : BFD_RELOC_32_GOTOFF + -- : BFD_RELOC_16_GOTOFF + -- : BFD_RELOC_LO16_GOTOFF + -- : BFD_RELOC_HI16_GOTOFF + -- : BFD_RELOC_HI16_S_GOTOFF + -- : BFD_RELOC_8_GOTOFF + -- : BFD_RELOC_64_PLT_PCREL + -- : BFD_RELOC_32_PLT_PCREL + -- : BFD_RELOC_24_PLT_PCREL + -- : BFD_RELOC_16_PLT_PCREL + -- : BFD_RELOC_8_PLT_PCREL + -- : BFD_RELOC_64_PLTOFF + -- : BFD_RELOC_32_PLTOFF + -- : BFD_RELOC_16_PLTOFF + -- : BFD_RELOC_LO16_PLTOFF + -- : BFD_RELOC_HI16_PLTOFF + -- : BFD_RELOC_HI16_S_PLTOFF + -- : BFD_RELOC_8_PLTOFF + For ELF. + + -- : BFD_RELOC_68K_GLOB_DAT + -- : BFD_RELOC_68K_JMP_SLOT + -- : BFD_RELOC_68K_RELATIVE + -- : BFD_RELOC_68K_TLS_GD32 + -- : BFD_RELOC_68K_TLS_GD16 + -- : BFD_RELOC_68K_TLS_GD8 + -- : BFD_RELOC_68K_TLS_LDM32 + -- : BFD_RELOC_68K_TLS_LDM16 + -- : BFD_RELOC_68K_TLS_LDM8 + -- : BFD_RELOC_68K_TLS_LDO32 + -- : BFD_RELOC_68K_TLS_LDO16 + -- : BFD_RELOC_68K_TLS_LDO8 + -- : BFD_RELOC_68K_TLS_IE32 + -- : BFD_RELOC_68K_TLS_IE16 + -- : BFD_RELOC_68K_TLS_IE8 + -- : BFD_RELOC_68K_TLS_LE32 + -- : BFD_RELOC_68K_TLS_LE16 + -- : BFD_RELOC_68K_TLS_LE8 + Relocations used by 68K ELF. + + -- : BFD_RELOC_32_BASEREL + -- : BFD_RELOC_16_BASEREL + -- : BFD_RELOC_LO16_BASEREL + -- : BFD_RELOC_HI16_BASEREL + -- : BFD_RELOC_HI16_S_BASEREL + -- : BFD_RELOC_8_BASEREL + -- : BFD_RELOC_RVA + Linkage-table relative. + + -- : BFD_RELOC_8_FFnn + Absolute 8-bit relocation, but used to form an address like 0xFFnn. + + -- : BFD_RELOC_32_PCREL_S2 + -- : BFD_RELOC_16_PCREL_S2 + -- : BFD_RELOC_23_PCREL_S2 + These PC-relative relocations are stored as word displacements - + i.e., byte displacements shifted right two bits. The 30-bit word + displacement (<<32_PCREL_S2>> - 32 bits, shifted 2) is used on the + SPARC. (SPARC tools generally refer to this as <>.) The + signed 16-bit displacement is used on the MIPS, and the 23-bit + displacement is used on the Alpha. + + -- : BFD_RELOC_HI22 + -- : BFD_RELOC_LO10 + High 22 bits and low 10 bits of 32-bit value, placed into lower + bits of the target word. These are used on the SPARC. + + -- : BFD_RELOC_GPREL16 + -- : BFD_RELOC_GPREL32 + For systems that allocate a Global Pointer register, these are + displacements off that register. These relocation types are + handled specially, because the value the register will have is + decided relatively late. + + -- : BFD_RELOC_I960_CALLJ + Reloc types used for i960/b.out. + + -- : BFD_RELOC_NONE + -- : BFD_RELOC_SPARC_WDISP22 + -- : BFD_RELOC_SPARC22 + -- : BFD_RELOC_SPARC13 + -- : BFD_RELOC_SPARC_GOT10 + -- : BFD_RELOC_SPARC_GOT13 + -- : BFD_RELOC_SPARC_GOT22 + -- : BFD_RELOC_SPARC_PC10 + -- : BFD_RELOC_SPARC_PC22 + -- : BFD_RELOC_SPARC_WPLT30 + -- : BFD_RELOC_SPARC_COPY + -- : BFD_RELOC_SPARC_GLOB_DAT + -- : BFD_RELOC_SPARC_JMP_SLOT + -- : BFD_RELOC_SPARC_RELATIVE + -- : BFD_RELOC_SPARC_UA16 + -- : BFD_RELOC_SPARC_UA32 + -- : BFD_RELOC_SPARC_UA64 + -- : BFD_RELOC_SPARC_GOTDATA_HIX22 + -- : BFD_RELOC_SPARC_GOTDATA_LOX10 + -- : BFD_RELOC_SPARC_GOTDATA_OP_HIX22 + -- : BFD_RELOC_SPARC_GOTDATA_OP_LOX10 + -- : BFD_RELOC_SPARC_GOTDATA_OP + -- : BFD_RELOC_SPARC_JMP_IREL + -- : BFD_RELOC_SPARC_IRELATIVE + SPARC ELF relocations. There is probably some overlap with other + relocation types already defined. + + -- : BFD_RELOC_SPARC_BASE13 + -- : BFD_RELOC_SPARC_BASE22 + I think these are specific to SPARC a.out (e.g., Sun 4). + + -- : BFD_RELOC_SPARC_64 + -- : BFD_RELOC_SPARC_10 + -- : BFD_RELOC_SPARC_11 + -- : BFD_RELOC_SPARC_OLO10 + -- : BFD_RELOC_SPARC_HH22 + -- : BFD_RELOC_SPARC_HM10 + -- : BFD_RELOC_SPARC_LM22 + -- : BFD_RELOC_SPARC_PC_HH22 + -- : BFD_RELOC_SPARC_PC_HM10 + -- : BFD_RELOC_SPARC_PC_LM22 + -- : BFD_RELOC_SPARC_WDISP16 + -- : BFD_RELOC_SPARC_WDISP19 + -- : BFD_RELOC_SPARC_7 + -- : BFD_RELOC_SPARC_6 + -- : BFD_RELOC_SPARC_5 + -- : BFD_RELOC_SPARC_DISP64 + -- : BFD_RELOC_SPARC_PLT32 + -- : BFD_RELOC_SPARC_PLT64 + -- : BFD_RELOC_SPARC_HIX22 + -- : BFD_RELOC_SPARC_LOX10 + -- : BFD_RELOC_SPARC_H44 + -- : BFD_RELOC_SPARC_M44 + -- : BFD_RELOC_SPARC_L44 + -- : BFD_RELOC_SPARC_REGISTER + SPARC64 relocations + + -- : BFD_RELOC_SPARC_REV32 + SPARC little endian relocation + + -- : BFD_RELOC_SPARC_TLS_GD_HI22 + -- : BFD_RELOC_SPARC_TLS_GD_LO10 + -- : BFD_RELOC_SPARC_TLS_GD_ADD + -- : BFD_RELOC_SPARC_TLS_GD_CALL + -- : BFD_RELOC_SPARC_TLS_LDM_HI22 + -- : BFD_RELOC_SPARC_TLS_LDM_LO10 + -- : BFD_RELOC_SPARC_TLS_LDM_ADD + -- : BFD_RELOC_SPARC_TLS_LDM_CALL + -- : BFD_RELOC_SPARC_TLS_LDO_HIX22 + -- : BFD_RELOC_SPARC_TLS_LDO_LOX10 + -- : BFD_RELOC_SPARC_TLS_LDO_ADD + -- : BFD_RELOC_SPARC_TLS_IE_HI22 + -- : BFD_RELOC_SPARC_TLS_IE_LO10 + -- : BFD_RELOC_SPARC_TLS_IE_LD + -- : BFD_RELOC_SPARC_TLS_IE_LDX + -- : BFD_RELOC_SPARC_TLS_IE_ADD + -- : BFD_RELOC_SPARC_TLS_LE_HIX22 + -- : BFD_RELOC_SPARC_TLS_LE_LOX10 + -- : BFD_RELOC_SPARC_TLS_DTPMOD32 + -- : BFD_RELOC_SPARC_TLS_DTPMOD64 + -- : BFD_RELOC_SPARC_TLS_DTPOFF32 + -- : BFD_RELOC_SPARC_TLS_DTPOFF64 + -- : BFD_RELOC_SPARC_TLS_TPOFF32 + -- : BFD_RELOC_SPARC_TLS_TPOFF64 + SPARC TLS relocations + + -- : BFD_RELOC_SPU_IMM7 + -- : BFD_RELOC_SPU_IMM8 + -- : BFD_RELOC_SPU_IMM10 + -- : BFD_RELOC_SPU_IMM10W + -- : BFD_RELOC_SPU_IMM16 + -- : BFD_RELOC_SPU_IMM16W + -- : BFD_RELOC_SPU_IMM18 + -- : BFD_RELOC_SPU_PCREL9a + -- : BFD_RELOC_SPU_PCREL9b + -- : BFD_RELOC_SPU_PCREL16 + -- : BFD_RELOC_SPU_LO16 + -- : BFD_RELOC_SPU_HI16 + -- : BFD_RELOC_SPU_PPU32 + -- : BFD_RELOC_SPU_PPU64 + -- : BFD_RELOC_SPU_ADD_PIC + SPU Relocations. + + -- : BFD_RELOC_ALPHA_GPDISP_HI16 + Alpha ECOFF and ELF relocations. Some of these treat the symbol or + "addend" in some special way. For GPDISP_HI16 ("gpdisp") + relocations, the symbol is ignored when writing; when reading, it + will be the absolute section symbol. The addend is the + displacement in bytes of the "lda" instruction from the "ldah" + instruction (which is at the address of this reloc). + + -- : BFD_RELOC_ALPHA_GPDISP_LO16 + For GPDISP_LO16 ("ignore") relocations, the symbol is handled as + with GPDISP_HI16 relocs. The addend is ignored when writing the + relocations out, and is filled in with the file's GP value on + reading, for convenience. + + -- : BFD_RELOC_ALPHA_GPDISP + The ELF GPDISP relocation is exactly the same as the GPDISP_HI16 + relocation except that there is no accompanying GPDISP_LO16 + relocation. + + -- : BFD_RELOC_ALPHA_LITERAL + -- : BFD_RELOC_ALPHA_ELF_LITERAL + -- : BFD_RELOC_ALPHA_LITUSE + The Alpha LITERAL/LITUSE relocs are produced by a symbol reference; + the assembler turns it into a LDQ instruction to load the address + of the symbol, and then fills in a register in the real + instruction. + + The LITERAL reloc, at the LDQ instruction, refers to the .lita + section symbol. The addend is ignored when writing, but is filled + in with the file's GP value on reading, for convenience, as with + the GPDISP_LO16 reloc. + + The ELF_LITERAL reloc is somewhere between 16_GOTOFF and + GPDISP_LO16. It should refer to the symbol to be referenced, as + with 16_GOTOFF, but it generates output not based on the position + within the .got section, but relative to the GP value chosen for + the file during the final link stage. + + The LITUSE reloc, on the instruction using the loaded address, + gives information to the linker that it might be able to use to + optimize away some literal section references. The symbol is + ignored (read as the absolute section symbol), and the "addend" + indicates the type of instruction using the register: 1 - "memory" + fmt insn 2 - byte-manipulation (byte offset reg) 3 - jsr (target + of branch) + + -- : BFD_RELOC_ALPHA_HINT + The HINT relocation indicates a value that should be filled into + the "hint" field of a jmp/jsr/ret instruction, for possible branch- + prediction logic which may be provided on some processors. + + -- : BFD_RELOC_ALPHA_LINKAGE + The LINKAGE relocation outputs a linkage pair in the object file, + which is filled by the linker. + + -- : BFD_RELOC_ALPHA_CODEADDR + The CODEADDR relocation outputs a STO_CA in the object file, which + is filled by the linker. + + -- : BFD_RELOC_ALPHA_GPREL_HI16 + -- : BFD_RELOC_ALPHA_GPREL_LO16 + The GPREL_HI/LO relocations together form a 32-bit offset from the + GP register. + + -- : BFD_RELOC_ALPHA_BRSGP + Like BFD_RELOC_23_PCREL_S2, except that the source and target must + share a common GP, and the target address is adjusted for + STO_ALPHA_STD_GPLOAD. + + -- : BFD_RELOC_ALPHA_NOP + The NOP relocation outputs a NOP if the longword displacement + between two procedure entry points is < 2^21. + + -- : BFD_RELOC_ALPHA_BSR + The BSR relocation outputs a BSR if the longword displacement + between two procedure entry points is < 2^21. + + -- : BFD_RELOC_ALPHA_LDA + The LDA relocation outputs a LDA if the longword displacement + between two procedure entry points is < 2^16. + + -- : BFD_RELOC_ALPHA_BOH + The BOH relocation outputs a BSR if the longword displacement + between two procedure entry points is < 2^21, or else a hint. + + -- : BFD_RELOC_ALPHA_TLSGD + -- : BFD_RELOC_ALPHA_TLSLDM + -- : BFD_RELOC_ALPHA_DTPMOD64 + -- : BFD_RELOC_ALPHA_GOTDTPREL16 + -- : BFD_RELOC_ALPHA_DTPREL64 + -- : BFD_RELOC_ALPHA_DTPREL_HI16 + -- : BFD_RELOC_ALPHA_DTPREL_LO16 + -- : BFD_RELOC_ALPHA_DTPREL16 + -- : BFD_RELOC_ALPHA_GOTTPREL16 + -- : BFD_RELOC_ALPHA_TPREL64 + -- : BFD_RELOC_ALPHA_TPREL_HI16 + -- : BFD_RELOC_ALPHA_TPREL_LO16 + -- : BFD_RELOC_ALPHA_TPREL16 + Alpha thread-local storage relocations. + + -- : BFD_RELOC_MIPS_JMP + -- : BFD_RELOC_MICROMIPS_JMP + The MIPS jump instruction. + + -- : BFD_RELOC_MIPS16_JMP + The MIPS16 jump instruction. + + -- : BFD_RELOC_MIPS16_GPREL + MIPS16 GP relative reloc. + + -- : BFD_RELOC_HI16 + High 16 bits of 32-bit value; simple reloc. + + -- : BFD_RELOC_HI16_S + High 16 bits of 32-bit value but the low 16 bits will be sign + extended and added to form the final result. If the low 16 bits + form a negative number, we need to add one to the high value to + compensate for the borrow when the low bits are added. + + -- : BFD_RELOC_LO16 + Low 16 bits. + + -- : BFD_RELOC_HI16_PCREL + High 16 bits of 32-bit pc-relative value + + -- : BFD_RELOC_HI16_S_PCREL + High 16 bits of 32-bit pc-relative value, adjusted + + -- : BFD_RELOC_LO16_PCREL + Low 16 bits of pc-relative value + + -- : BFD_RELOC_MIPS16_GOT16 + -- : BFD_RELOC_MIPS16_CALL16 + Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of + 16-bit immediate fields + + -- : BFD_RELOC_MIPS16_HI16 + MIPS16 high 16 bits of 32-bit value. + + -- : BFD_RELOC_MIPS16_HI16_S + MIPS16 high 16 bits of 32-bit value but the low 16 bits will be + sign extended and added to form the final result. If the low 16 + bits form a negative number, we need to add one to the high value + to compensate for the borrow when the low bits are added. + + -- : BFD_RELOC_MIPS16_LO16 + MIPS16 low 16 bits. + + -- : BFD_RELOC_MIPS_LITERAL + -- : BFD_RELOC_MICROMIPS_LITERAL + Relocation against a MIPS literal section. + + -- : BFD_RELOC_MICROMIPS_7_PCREL_S1 + -- : BFD_RELOC_MICROMIPS_10_PCREL_S1 + -- : BFD_RELOC_MICROMIPS_16_PCREL_S1 + microMIPS PC-relative relocations. + + -- : BFD_RELOC_MICROMIPS_GPREL16 + -- : BFD_RELOC_MICROMIPS_HI16 + -- : BFD_RELOC_MICROMIPS_HI16_S + -- : BFD_RELOC_MICROMIPS_LO16 + microMIPS versions of generic BFD relocs. + + -- : BFD_RELOC_MIPS_GOT16 + -- : BFD_RELOC_MICROMIPS_GOT16 + -- : BFD_RELOC_MIPS_CALL16 + -- : BFD_RELOC_MICROMIPS_CALL16 + -- : BFD_RELOC_MIPS_GOT_HI16 + -- : BFD_RELOC_MICROMIPS_GOT_HI16 + -- : BFD_RELOC_MIPS_GOT_LO16 + -- : BFD_RELOC_MICROMIPS_GOT_LO16 + -- : BFD_RELOC_MIPS_CALL_HI16 + -- : BFD_RELOC_MICROMIPS_CALL_HI16 + -- : BFD_RELOC_MIPS_CALL_LO16 + -- : BFD_RELOC_MICROMIPS_CALL_LO16 + -- : BFD_RELOC_MIPS_SUB + -- : BFD_RELOC_MICROMIPS_SUB + -- : BFD_RELOC_MIPS_GOT_PAGE + -- : BFD_RELOC_MICROMIPS_GOT_PAGE + -- : BFD_RELOC_MIPS_GOT_OFST + -- : BFD_RELOC_MICROMIPS_GOT_OFST + -- : BFD_RELOC_MIPS_GOT_DISP + -- : BFD_RELOC_MICROMIPS_GOT_DISP + -- : BFD_RELOC_MIPS_SHIFT5 + -- : BFD_RELOC_MIPS_SHIFT6 + -- : BFD_RELOC_MIPS_INSERT_A + -- : BFD_RELOC_MIPS_INSERT_B + -- : BFD_RELOC_MIPS_DELETE + -- : BFD_RELOC_MIPS_HIGHEST + -- : BFD_RELOC_MICROMIPS_HIGHEST + -- : BFD_RELOC_MIPS_HIGHER + -- : BFD_RELOC_MICROMIPS_HIGHER + -- : BFD_RELOC_MIPS_SCN_DISP + -- : BFD_RELOC_MICROMIPS_SCN_DISP + -- : BFD_RELOC_MIPS_REL16 + -- : BFD_RELOC_MIPS_RELGOT + -- : BFD_RELOC_MIPS_JALR + -- : BFD_RELOC_MICROMIPS_JALR + -- : BFD_RELOC_MIPS_TLS_DTPMOD32 + -- : BFD_RELOC_MIPS_TLS_DTPREL32 + -- : BFD_RELOC_MIPS_TLS_DTPMOD64 + -- : BFD_RELOC_MIPS_TLS_DTPREL64 + -- : BFD_RELOC_MIPS_TLS_GD + -- : BFD_RELOC_MICROMIPS_TLS_GD + -- : BFD_RELOC_MIPS_TLS_LDM + -- : BFD_RELOC_MICROMIPS_TLS_LDM + -- : BFD_RELOC_MIPS_TLS_DTPREL_HI16 + -- : BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16 + -- : BFD_RELOC_MIPS_TLS_DTPREL_LO16 + -- : BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16 + -- : BFD_RELOC_MIPS_TLS_GOTTPREL + -- : BFD_RELOC_MICROMIPS_TLS_GOTTPREL + -- : BFD_RELOC_MIPS_TLS_TPREL32 + -- : BFD_RELOC_MIPS_TLS_TPREL64 + -- : BFD_RELOC_MIPS_TLS_TPREL_HI16 + -- : BFD_RELOC_MICROMIPS_TLS_TPREL_HI16 + -- : BFD_RELOC_MIPS_TLS_TPREL_LO16 + -- : BFD_RELOC_MICROMIPS_TLS_TPREL_LO16 + MIPS ELF relocations. + + -- : BFD_RELOC_MIPS_COPY + -- : BFD_RELOC_MIPS_JUMP_SLOT + MIPS ELF relocations (VxWorks and PLT extensions). + + -- : BFD_RELOC_MOXIE_10_PCREL + Moxie ELF relocations. + + -- : BFD_RELOC_FRV_LABEL16 + -- : BFD_RELOC_FRV_LABEL24 + -- : BFD_RELOC_FRV_LO16 + -- : BFD_RELOC_FRV_HI16 + -- : BFD_RELOC_FRV_GPREL12 + -- : BFD_RELOC_FRV_GPRELU12 + -- : BFD_RELOC_FRV_GPREL32 + -- : BFD_RELOC_FRV_GPRELHI + -- : BFD_RELOC_FRV_GPRELLO + -- : BFD_RELOC_FRV_GOT12 + -- : BFD_RELOC_FRV_GOTHI + -- : BFD_RELOC_FRV_GOTLO + -- : BFD_RELOC_FRV_FUNCDESC + -- : BFD_RELOC_FRV_FUNCDESC_GOT12 + -- : BFD_RELOC_FRV_FUNCDESC_GOTHI + -- : BFD_RELOC_FRV_FUNCDESC_GOTLO + -- : BFD_RELOC_FRV_FUNCDESC_VALUE + -- : BFD_RELOC_FRV_FUNCDESC_GOTOFF12 + -- : BFD_RELOC_FRV_FUNCDESC_GOTOFFHI + -- : BFD_RELOC_FRV_FUNCDESC_GOTOFFLO + -- : BFD_RELOC_FRV_GOTOFF12 + -- : BFD_RELOC_FRV_GOTOFFHI + -- : BFD_RELOC_FRV_GOTOFFLO + -- : BFD_RELOC_FRV_GETTLSOFF + -- : BFD_RELOC_FRV_TLSDESC_VALUE + -- : BFD_RELOC_FRV_GOTTLSDESC12 + -- : BFD_RELOC_FRV_GOTTLSDESCHI + -- : BFD_RELOC_FRV_GOTTLSDESCLO + -- : BFD_RELOC_FRV_TLSMOFF12 + -- : BFD_RELOC_FRV_TLSMOFFHI + -- : BFD_RELOC_FRV_TLSMOFFLO + -- : BFD_RELOC_FRV_GOTTLSOFF12 + -- : BFD_RELOC_FRV_GOTTLSOFFHI + -- : BFD_RELOC_FRV_GOTTLSOFFLO + -- : BFD_RELOC_FRV_TLSOFF + -- : BFD_RELOC_FRV_TLSDESC_RELAX + -- : BFD_RELOC_FRV_GETTLSOFF_RELAX + -- : BFD_RELOC_FRV_TLSOFF_RELAX + -- : BFD_RELOC_FRV_TLSMOFF + Fujitsu Frv Relocations. + + -- : BFD_RELOC_MN10300_GOTOFF24 + This is a 24bit GOT-relative reloc for the mn10300. + + -- : BFD_RELOC_MN10300_GOT32 + This is a 32bit GOT-relative reloc for the mn10300, offset by two + bytes in the instruction. + + -- : BFD_RELOC_MN10300_GOT24 + This is a 24bit GOT-relative reloc for the mn10300, offset by two + bytes in the instruction. + + -- : BFD_RELOC_MN10300_GOT16 + This is a 16bit GOT-relative reloc for the mn10300, offset by two + bytes in the instruction. + + -- : BFD_RELOC_MN10300_COPY + Copy symbol at runtime. + + -- : BFD_RELOC_MN10300_GLOB_DAT + Create GOT entry. + + -- : BFD_RELOC_MN10300_JMP_SLOT + Create PLT entry. + + -- : BFD_RELOC_MN10300_RELATIVE + Adjust by program base. + + -- : BFD_RELOC_MN10300_SYM_DIFF + Together with another reloc targeted at the same location, allows + for a value that is the difference of two symbols in the same + section. + + -- : BFD_RELOC_MN10300_ALIGN + The addend of this reloc is an alignment power that must be + honoured at the offset's location, regardless of linker relaxation. + + -- : BFD_RELOC_386_GOT32 + -- : BFD_RELOC_386_PLT32 + -- : BFD_RELOC_386_COPY + -- : BFD_RELOC_386_GLOB_DAT + -- : BFD_RELOC_386_JUMP_SLOT + -- : BFD_RELOC_386_RELATIVE + -- : BFD_RELOC_386_GOTOFF + -- : BFD_RELOC_386_GOTPC + -- : BFD_RELOC_386_TLS_TPOFF + -- : BFD_RELOC_386_TLS_IE + -- : BFD_RELOC_386_TLS_GOTIE + -- : BFD_RELOC_386_TLS_LE + -- : BFD_RELOC_386_TLS_GD + -- : BFD_RELOC_386_TLS_LDM + -- : BFD_RELOC_386_TLS_LDO_32 + -- : BFD_RELOC_386_TLS_IE_32 + -- : BFD_RELOC_386_TLS_LE_32 + -- : BFD_RELOC_386_TLS_DTPMOD32 + -- : BFD_RELOC_386_TLS_DTPOFF32 + -- : BFD_RELOC_386_TLS_TPOFF32 + -- : BFD_RELOC_386_TLS_GOTDESC + -- : BFD_RELOC_386_TLS_DESC_CALL + -- : BFD_RELOC_386_TLS_DESC + -- : BFD_RELOC_386_IRELATIVE + i386/elf relocations + + -- : BFD_RELOC_X86_64_GOT32 + -- : BFD_RELOC_X86_64_PLT32 + -- : BFD_RELOC_X86_64_COPY + -- : BFD_RELOC_X86_64_GLOB_DAT + -- : BFD_RELOC_X86_64_JUMP_SLOT + -- : BFD_RELOC_X86_64_RELATIVE + -- : BFD_RELOC_X86_64_GOTPCREL + -- : BFD_RELOC_X86_64_32S + -- : BFD_RELOC_X86_64_DTPMOD64 + -- : BFD_RELOC_X86_64_DTPOFF64 + -- : BFD_RELOC_X86_64_TPOFF64 + -- : BFD_RELOC_X86_64_TLSGD + -- : BFD_RELOC_X86_64_TLSLD + -- : BFD_RELOC_X86_64_DTPOFF32 + -- : BFD_RELOC_X86_64_GOTTPOFF + -- : BFD_RELOC_X86_64_TPOFF32 + -- : BFD_RELOC_X86_64_GOTOFF64 + -- : BFD_RELOC_X86_64_GOTPC32 + -- : BFD_RELOC_X86_64_GOT64 + -- : BFD_RELOC_X86_64_GOTPCREL64 + -- : BFD_RELOC_X86_64_GOTPC64 + -- : BFD_RELOC_X86_64_GOTPLT64 + -- : BFD_RELOC_X86_64_PLTOFF64 + -- : BFD_RELOC_X86_64_GOTPC32_TLSDESC + -- : BFD_RELOC_X86_64_TLSDESC_CALL + -- : BFD_RELOC_X86_64_TLSDESC + -- : BFD_RELOC_X86_64_IRELATIVE + x86-64/elf relocations + + -- : BFD_RELOC_NS32K_IMM_8 + -- : BFD_RELOC_NS32K_IMM_16 + -- : BFD_RELOC_NS32K_IMM_32 + -- : BFD_RELOC_NS32K_IMM_8_PCREL + -- : BFD_RELOC_NS32K_IMM_16_PCREL + -- : BFD_RELOC_NS32K_IMM_32_PCREL + -- : BFD_RELOC_NS32K_DISP_8 + -- : BFD_RELOC_NS32K_DISP_16 + -- : BFD_RELOC_NS32K_DISP_32 + -- : BFD_RELOC_NS32K_DISP_8_PCREL + -- : BFD_RELOC_NS32K_DISP_16_PCREL + -- : BFD_RELOC_NS32K_DISP_32_PCREL + ns32k relocations + + -- : BFD_RELOC_PDP11_DISP_8_PCREL + -- : BFD_RELOC_PDP11_DISP_6_PCREL + PDP11 relocations + + -- : BFD_RELOC_PJ_CODE_HI16 + -- : BFD_RELOC_PJ_CODE_LO16 + -- : BFD_RELOC_PJ_CODE_DIR16 + -- : BFD_RELOC_PJ_CODE_DIR32 + -- : BFD_RELOC_PJ_CODE_REL16 + -- : BFD_RELOC_PJ_CODE_REL32 + Picojava relocs. Not all of these appear in object files. + + -- : BFD_RELOC_PPC_B26 + -- : BFD_RELOC_PPC_BA26 + -- : BFD_RELOC_PPC_TOC16 + -- : BFD_RELOC_PPC_B16 + -- : BFD_RELOC_PPC_B16_BRTAKEN + -- : BFD_RELOC_PPC_B16_BRNTAKEN + -- : BFD_RELOC_PPC_BA16 + -- : BFD_RELOC_PPC_BA16_BRTAKEN + -- : BFD_RELOC_PPC_BA16_BRNTAKEN + -- : BFD_RELOC_PPC_COPY + -- : BFD_RELOC_PPC_GLOB_DAT + -- : BFD_RELOC_PPC_JMP_SLOT + -- : BFD_RELOC_PPC_RELATIVE + -- : BFD_RELOC_PPC_LOCAL24PC + -- : BFD_RELOC_PPC_EMB_NADDR32 + -- : BFD_RELOC_PPC_EMB_NADDR16 + -- : BFD_RELOC_PPC_EMB_NADDR16_LO + -- : BFD_RELOC_PPC_EMB_NADDR16_HI + -- : BFD_RELOC_PPC_EMB_NADDR16_HA + -- : BFD_RELOC_PPC_EMB_SDAI16 + -- : BFD_RELOC_PPC_EMB_SDA2I16 + -- : BFD_RELOC_PPC_EMB_SDA2REL + -- : BFD_RELOC_PPC_EMB_SDA21 + -- : BFD_RELOC_PPC_EMB_MRKREF + -- : BFD_RELOC_PPC_EMB_RELSEC16 + -- : BFD_RELOC_PPC_EMB_RELST_LO + -- : BFD_RELOC_PPC_EMB_RELST_HI + -- : BFD_RELOC_PPC_EMB_RELST_HA + -- : BFD_RELOC_PPC_EMB_BIT_FLD + -- : BFD_RELOC_PPC_EMB_RELSDA + -- : BFD_RELOC_PPC64_HIGHER + -- : BFD_RELOC_PPC64_HIGHER_S + -- : BFD_RELOC_PPC64_HIGHEST + -- : BFD_RELOC_PPC64_HIGHEST_S + -- : BFD_RELOC_PPC64_TOC16_LO + -- : BFD_RELOC_PPC64_TOC16_HI + -- : BFD_RELOC_PPC64_TOC16_HA + -- : BFD_RELOC_PPC64_TOC + -- : BFD_RELOC_PPC64_PLTGOT16 + -- : BFD_RELOC_PPC64_PLTGOT16_LO + -- : BFD_RELOC_PPC64_PLTGOT16_HI + -- : BFD_RELOC_PPC64_PLTGOT16_HA + -- : BFD_RELOC_PPC64_ADDR16_DS + -- : BFD_RELOC_PPC64_ADDR16_LO_DS + -- : BFD_RELOC_PPC64_GOT16_DS + -- : BFD_RELOC_PPC64_GOT16_LO_DS + -- : BFD_RELOC_PPC64_PLT16_LO_DS + -- : BFD_RELOC_PPC64_SECTOFF_DS + -- : BFD_RELOC_PPC64_SECTOFF_LO_DS + -- : BFD_RELOC_PPC64_TOC16_DS + -- : BFD_RELOC_PPC64_TOC16_LO_DS + -- : BFD_RELOC_PPC64_PLTGOT16_DS + -- : BFD_RELOC_PPC64_PLTGOT16_LO_DS + Power(rs6000) and PowerPC relocations. + + -- : BFD_RELOC_PPC_TLS + -- : BFD_RELOC_PPC_TLSGD + -- : BFD_RELOC_PPC_TLSLD + -- : BFD_RELOC_PPC_DTPMOD + -- : BFD_RELOC_PPC_TPREL16 + -- : BFD_RELOC_PPC_TPREL16_LO + -- : BFD_RELOC_PPC_TPREL16_HI + -- : BFD_RELOC_PPC_TPREL16_HA + -- : BFD_RELOC_PPC_TPREL + -- : BFD_RELOC_PPC_DTPREL16 + -- : BFD_RELOC_PPC_DTPREL16_LO + -- : BFD_RELOC_PPC_DTPREL16_HI + -- : BFD_RELOC_PPC_DTPREL16_HA + -- : BFD_RELOC_PPC_DTPREL + -- : BFD_RELOC_PPC_GOT_TLSGD16 + -- : BFD_RELOC_PPC_GOT_TLSGD16_LO + -- : BFD_RELOC_PPC_GOT_TLSGD16_HI + -- : BFD_RELOC_PPC_GOT_TLSGD16_HA + -- : BFD_RELOC_PPC_GOT_TLSLD16 + -- : BFD_RELOC_PPC_GOT_TLSLD16_LO + -- : BFD_RELOC_PPC_GOT_TLSLD16_HI + -- : BFD_RELOC_PPC_GOT_TLSLD16_HA + -- : BFD_RELOC_PPC_GOT_TPREL16 + -- : BFD_RELOC_PPC_GOT_TPREL16_LO + -- : BFD_RELOC_PPC_GOT_TPREL16_HI + -- : BFD_RELOC_PPC_GOT_TPREL16_HA + -- : BFD_RELOC_PPC_GOT_DTPREL16 + -- : BFD_RELOC_PPC_GOT_DTPREL16_LO + -- : BFD_RELOC_PPC_GOT_DTPREL16_HI + -- : BFD_RELOC_PPC_GOT_DTPREL16_HA + -- : BFD_RELOC_PPC64_TPREL16_DS + -- : BFD_RELOC_PPC64_TPREL16_LO_DS + -- : BFD_RELOC_PPC64_TPREL16_HIGHER + -- : BFD_RELOC_PPC64_TPREL16_HIGHERA + -- : BFD_RELOC_PPC64_TPREL16_HIGHEST + -- : BFD_RELOC_PPC64_TPREL16_HIGHESTA + -- : BFD_RELOC_PPC64_DTPREL16_DS + -- : BFD_RELOC_PPC64_DTPREL16_LO_DS + -- : BFD_RELOC_PPC64_DTPREL16_HIGHER + -- : BFD_RELOC_PPC64_DTPREL16_HIGHERA + -- : BFD_RELOC_PPC64_DTPREL16_HIGHEST + -- : BFD_RELOC_PPC64_DTPREL16_HIGHESTA + PowerPC and PowerPC64 thread-local storage relocations. + + -- : BFD_RELOC_I370_D12 + IBM 370/390 relocations + + -- : BFD_RELOC_CTOR + The type of reloc used to build a constructor table - at the moment + probably a 32 bit wide absolute relocation, but the target can + choose. It generally does map to one of the other relocation + types. + + -- : BFD_RELOC_ARM_PCREL_BRANCH + ARM 26 bit pc-relative branch. The lowest two bits must be zero + and are not stored in the instruction. + + -- : BFD_RELOC_ARM_PCREL_BLX + ARM 26 bit pc-relative branch. The lowest bit must be zero and is + not stored in the instruction. The 2nd lowest bit comes from a 1 + bit field in the instruction. + + -- : BFD_RELOC_THUMB_PCREL_BLX + Thumb 22 bit pc-relative branch. The lowest bit must be zero and + is not stored in the instruction. The 2nd lowest bit comes from a + 1 bit field in the instruction. + + -- : BFD_RELOC_ARM_PCREL_CALL + ARM 26-bit pc-relative branch for an unconditional BL or BLX + instruction. + + -- : BFD_RELOC_ARM_PCREL_JUMP + ARM 26-bit pc-relative branch for B or conditional BL instruction. + + -- : BFD_RELOC_THUMB_PCREL_BRANCH7 + -- : BFD_RELOC_THUMB_PCREL_BRANCH9 + -- : BFD_RELOC_THUMB_PCREL_BRANCH12 + -- : BFD_RELOC_THUMB_PCREL_BRANCH20 + -- : BFD_RELOC_THUMB_PCREL_BRANCH23 + -- : BFD_RELOC_THUMB_PCREL_BRANCH25 + Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches. The + lowest bit must be zero and is not stored in the instruction. + Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an + "nn" one smaller in all cases. Note further that BRANCH23 + corresponds to R_ARM_THM_CALL. + + -- : BFD_RELOC_ARM_OFFSET_IMM + 12-bit immediate offset, used in ARM-format ldr and str + instructions. + + -- : BFD_RELOC_ARM_THUMB_OFFSET + 5-bit immediate offset, used in Thumb-format ldr and str + instructions. + + -- : BFD_RELOC_ARM_TARGET1 + Pc-relative or absolute relocation depending on target. Used for + entries in .init_array sections. + + -- : BFD_RELOC_ARM_ROSEGREL32 + Read-only segment base relative address. + + -- : BFD_RELOC_ARM_SBREL32 + Data segment base relative address. + + -- : BFD_RELOC_ARM_TARGET2 + This reloc is used for references to RTTI data from exception + handling tables. The actual definition depends on the target. It + may be a pc-relative or some form of GOT-indirect relocation. + + -- : BFD_RELOC_ARM_PREL31 + 31-bit PC relative address. + + -- : BFD_RELOC_ARM_MOVW + -- : BFD_RELOC_ARM_MOVT + -- : BFD_RELOC_ARM_MOVW_PCREL + -- : BFD_RELOC_ARM_MOVT_PCREL + -- : BFD_RELOC_ARM_THUMB_MOVW + -- : BFD_RELOC_ARM_THUMB_MOVT + -- : BFD_RELOC_ARM_THUMB_MOVW_PCREL + -- : BFD_RELOC_ARM_THUMB_MOVT_PCREL + Low and High halfword relocations for MOVW and MOVT instructions. + + -- : BFD_RELOC_ARM_JUMP_SLOT + -- : BFD_RELOC_ARM_GLOB_DAT + -- : BFD_RELOC_ARM_GOT32 + -- : BFD_RELOC_ARM_PLT32 + -- : BFD_RELOC_ARM_RELATIVE + -- : BFD_RELOC_ARM_GOTOFF + -- : BFD_RELOC_ARM_GOTPC + -- : BFD_RELOC_ARM_GOT_PREL + Relocations for setting up GOTs and PLTs for shared libraries. + + -- : BFD_RELOC_ARM_TLS_GD32 + -- : BFD_RELOC_ARM_TLS_LDO32 + -- : BFD_RELOC_ARM_TLS_LDM32 + -- : BFD_RELOC_ARM_TLS_DTPOFF32 + -- : BFD_RELOC_ARM_TLS_DTPMOD32 + -- : BFD_RELOC_ARM_TLS_TPOFF32 + -- : BFD_RELOC_ARM_TLS_IE32 + -- : BFD_RELOC_ARM_TLS_LE32 + -- : BFD_RELOC_ARM_TLS_GOTDESC + -- : BFD_RELOC_ARM_TLS_CALL + -- : BFD_RELOC_ARM_THM_TLS_CALL + -- : BFD_RELOC_ARM_TLS_DESCSEQ + -- : BFD_RELOC_ARM_THM_TLS_DESCSEQ + -- : BFD_RELOC_ARM_TLS_DESC + ARM thread-local storage relocations. + + -- : BFD_RELOC_ARM_ALU_PC_G0_NC + -- : BFD_RELOC_ARM_ALU_PC_G0 + -- : BFD_RELOC_ARM_ALU_PC_G1_NC + -- : BFD_RELOC_ARM_ALU_PC_G1 + -- : BFD_RELOC_ARM_ALU_PC_G2 + -- : BFD_RELOC_ARM_LDR_PC_G0 + -- : BFD_RELOC_ARM_LDR_PC_G1 + -- : BFD_RELOC_ARM_LDR_PC_G2 + -- : BFD_RELOC_ARM_LDRS_PC_G0 + -- : BFD_RELOC_ARM_LDRS_PC_G1 + -- : BFD_RELOC_ARM_LDRS_PC_G2 + -- : BFD_RELOC_ARM_LDC_PC_G0 + -- : BFD_RELOC_ARM_LDC_PC_G1 + -- : BFD_RELOC_ARM_LDC_PC_G2 + -- : BFD_RELOC_ARM_ALU_SB_G0_NC + -- : BFD_RELOC_ARM_ALU_SB_G0 + -- : BFD_RELOC_ARM_ALU_SB_G1_NC + -- : BFD_RELOC_ARM_ALU_SB_G1 + -- : BFD_RELOC_ARM_ALU_SB_G2 + -- : BFD_RELOC_ARM_LDR_SB_G0 + -- : BFD_RELOC_ARM_LDR_SB_G1 + -- : BFD_RELOC_ARM_LDR_SB_G2 + -- : BFD_RELOC_ARM_LDRS_SB_G0 + -- : BFD_RELOC_ARM_LDRS_SB_G1 + -- : BFD_RELOC_ARM_LDRS_SB_G2 + -- : BFD_RELOC_ARM_LDC_SB_G0 + -- : BFD_RELOC_ARM_LDC_SB_G1 + -- : BFD_RELOC_ARM_LDC_SB_G2 + ARM group relocations. + + -- : BFD_RELOC_ARM_V4BX + Annotation of BX instructions. + + -- : BFD_RELOC_ARM_IRELATIVE + ARM support for STT_GNU_IFUNC. + + -- : BFD_RELOC_ARM_IMMEDIATE + -- : BFD_RELOC_ARM_ADRL_IMMEDIATE + -- : BFD_RELOC_ARM_T32_IMMEDIATE + -- : BFD_RELOC_ARM_T32_ADD_IMM + -- : BFD_RELOC_ARM_T32_IMM12 + -- : BFD_RELOC_ARM_T32_ADD_PC12 + -- : BFD_RELOC_ARM_SHIFT_IMM + -- : BFD_RELOC_ARM_SMC + -- : BFD_RELOC_ARM_HVC + -- : BFD_RELOC_ARM_SWI + -- : BFD_RELOC_ARM_MULTI + -- : BFD_RELOC_ARM_CP_OFF_IMM + -- : BFD_RELOC_ARM_CP_OFF_IMM_S2 + -- : BFD_RELOC_ARM_T32_CP_OFF_IMM + -- : BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 + -- : BFD_RELOC_ARM_ADR_IMM + -- : BFD_RELOC_ARM_LDR_IMM + -- : BFD_RELOC_ARM_LITERAL + -- : BFD_RELOC_ARM_IN_POOL + -- : BFD_RELOC_ARM_OFFSET_IMM8 + -- : BFD_RELOC_ARM_T32_OFFSET_U8 + -- : BFD_RELOC_ARM_T32_OFFSET_IMM + -- : BFD_RELOC_ARM_HWLITERAL + -- : BFD_RELOC_ARM_THUMB_ADD + -- : BFD_RELOC_ARM_THUMB_IMM + -- : BFD_RELOC_ARM_THUMB_SHIFT + These relocs are only used within the ARM assembler. They are not + (at present) written to any object files. + + -- : BFD_RELOC_SH_PCDISP8BY2 + -- : BFD_RELOC_SH_PCDISP12BY2 + -- : BFD_RELOC_SH_IMM3 + -- : BFD_RELOC_SH_IMM3U + -- : BFD_RELOC_SH_DISP12 + -- : BFD_RELOC_SH_DISP12BY2 + -- : BFD_RELOC_SH_DISP12BY4 + -- : BFD_RELOC_SH_DISP12BY8 + -- : BFD_RELOC_SH_DISP20 + -- : BFD_RELOC_SH_DISP20BY8 + -- : BFD_RELOC_SH_IMM4 + -- : BFD_RELOC_SH_IMM4BY2 + -- : BFD_RELOC_SH_IMM4BY4 + -- : BFD_RELOC_SH_IMM8 + -- : BFD_RELOC_SH_IMM8BY2 + -- : BFD_RELOC_SH_IMM8BY4 + -- : BFD_RELOC_SH_PCRELIMM8BY2 + -- : BFD_RELOC_SH_PCRELIMM8BY4 + -- : BFD_RELOC_SH_SWITCH16 + -- : BFD_RELOC_SH_SWITCH32 + -- : BFD_RELOC_SH_USES + -- : BFD_RELOC_SH_COUNT + -- : BFD_RELOC_SH_ALIGN + -- : BFD_RELOC_SH_CODE + -- : BFD_RELOC_SH_DATA + -- : BFD_RELOC_SH_LABEL + -- : BFD_RELOC_SH_LOOP_START + -- : BFD_RELOC_SH_LOOP_END + -- : BFD_RELOC_SH_COPY + -- : BFD_RELOC_SH_GLOB_DAT + -- : BFD_RELOC_SH_JMP_SLOT + -- : BFD_RELOC_SH_RELATIVE + -- : BFD_RELOC_SH_GOTPC + -- : BFD_RELOC_SH_GOT_LOW16 + -- : BFD_RELOC_SH_GOT_MEDLOW16 + -- : BFD_RELOC_SH_GOT_MEDHI16 + -- : BFD_RELOC_SH_GOT_HI16 + -- : BFD_RELOC_SH_GOTPLT_LOW16 + -- : BFD_RELOC_SH_GOTPLT_MEDLOW16 + -- : BFD_RELOC_SH_GOTPLT_MEDHI16 + -- : BFD_RELOC_SH_GOTPLT_HI16 + -- : BFD_RELOC_SH_PLT_LOW16 + -- : BFD_RELOC_SH_PLT_MEDLOW16 + -- : BFD_RELOC_SH_PLT_MEDHI16 + -- : BFD_RELOC_SH_PLT_HI16 + -- : BFD_RELOC_SH_GOTOFF_LOW16 + -- : BFD_RELOC_SH_GOTOFF_MEDLOW16 + -- : BFD_RELOC_SH_GOTOFF_MEDHI16 + -- : BFD_RELOC_SH_GOTOFF_HI16 + -- : BFD_RELOC_SH_GOTPC_LOW16 + -- : BFD_RELOC_SH_GOTPC_MEDLOW16 + -- : BFD_RELOC_SH_GOTPC_MEDHI16 + -- : BFD_RELOC_SH_GOTPC_HI16 + -- : BFD_RELOC_SH_COPY64 + -- : BFD_RELOC_SH_GLOB_DAT64 + -- : BFD_RELOC_SH_JMP_SLOT64 + -- : BFD_RELOC_SH_RELATIVE64 + -- : BFD_RELOC_SH_GOT10BY4 + -- : BFD_RELOC_SH_GOT10BY8 + -- : BFD_RELOC_SH_GOTPLT10BY4 + -- : BFD_RELOC_SH_GOTPLT10BY8 + -- : BFD_RELOC_SH_GOTPLT32 + -- : BFD_RELOC_SH_SHMEDIA_CODE + -- : BFD_RELOC_SH_IMMU5 + -- : BFD_RELOC_SH_IMMS6 + -- : BFD_RELOC_SH_IMMS6BY32 + -- : BFD_RELOC_SH_IMMU6 + -- : BFD_RELOC_SH_IMMS10 + -- : BFD_RELOC_SH_IMMS10BY2 + -- : BFD_RELOC_SH_IMMS10BY4 + -- : BFD_RELOC_SH_IMMS10BY8 + -- : BFD_RELOC_SH_IMMS16 + -- : BFD_RELOC_SH_IMMU16 + -- : BFD_RELOC_SH_IMM_LOW16 + -- : BFD_RELOC_SH_IMM_LOW16_PCREL + -- : BFD_RELOC_SH_IMM_MEDLOW16 + -- : BFD_RELOC_SH_IMM_MEDLOW16_PCREL + -- : BFD_RELOC_SH_IMM_MEDHI16 + -- : BFD_RELOC_SH_IMM_MEDHI16_PCREL + -- : BFD_RELOC_SH_IMM_HI16 + -- : BFD_RELOC_SH_IMM_HI16_PCREL + -- : BFD_RELOC_SH_PT_16 + -- : BFD_RELOC_SH_TLS_GD_32 + -- : BFD_RELOC_SH_TLS_LD_32 + -- : BFD_RELOC_SH_TLS_LDO_32 + -- : BFD_RELOC_SH_TLS_IE_32 + -- : BFD_RELOC_SH_TLS_LE_32 + -- : BFD_RELOC_SH_TLS_DTPMOD32 + -- : BFD_RELOC_SH_TLS_DTPOFF32 + -- : BFD_RELOC_SH_TLS_TPOFF32 + -- : BFD_RELOC_SH_GOT20 + -- : BFD_RELOC_SH_GOTOFF20 + -- : BFD_RELOC_SH_GOTFUNCDESC + -- : BFD_RELOC_SH_GOTFUNCDESC20 + -- : BFD_RELOC_SH_GOTOFFFUNCDESC + -- : BFD_RELOC_SH_GOTOFFFUNCDESC20 + -- : BFD_RELOC_SH_FUNCDESC + Renesas / SuperH SH relocs. Not all of these appear in object + files. + + -- : BFD_RELOC_ARC_B22_PCREL + ARC Cores relocs. ARC 22 bit pc-relative branch. The lowest two + bits must be zero and are not stored in the instruction. The high + 20 bits are installed in bits 26 through 7 of the instruction. + + -- : BFD_RELOC_ARC_B26 + ARC 26 bit absolute branch. The lowest two bits must be zero and + are not stored in the instruction. The high 24 bits are installed + in bits 23 through 0. + + -- : BFD_RELOC_BFIN_16_IMM + ADI Blackfin 16 bit immediate absolute reloc. + + -- : BFD_RELOC_BFIN_16_HIGH + ADI Blackfin 16 bit immediate absolute reloc higher 16 bits. + + -- : BFD_RELOC_BFIN_4_PCREL + ADI Blackfin 'a' part of LSETUP. + + -- : BFD_RELOC_BFIN_5_PCREL + ADI Blackfin. + + -- : BFD_RELOC_BFIN_16_LOW + ADI Blackfin 16 bit immediate absolute reloc lower 16 bits. + + -- : BFD_RELOC_BFIN_10_PCREL + ADI Blackfin. + + -- : BFD_RELOC_BFIN_11_PCREL + ADI Blackfin 'b' part of LSETUP. + + -- : BFD_RELOC_BFIN_12_PCREL_JUMP + ADI Blackfin. + + -- : BFD_RELOC_BFIN_12_PCREL_JUMP_S + ADI Blackfin Short jump, pcrel. + + -- : BFD_RELOC_BFIN_24_PCREL_CALL_X + ADI Blackfin Call.x not implemented. + + -- : BFD_RELOC_BFIN_24_PCREL_JUMP_L + ADI Blackfin Long Jump pcrel. + + -- : BFD_RELOC_BFIN_GOT17M4 + -- : BFD_RELOC_BFIN_GOTHI + -- : BFD_RELOC_BFIN_GOTLO + -- : BFD_RELOC_BFIN_FUNCDESC + -- : BFD_RELOC_BFIN_FUNCDESC_GOT17M4 + -- : BFD_RELOC_BFIN_FUNCDESC_GOTHI + -- : BFD_RELOC_BFIN_FUNCDESC_GOTLO + -- : BFD_RELOC_BFIN_FUNCDESC_VALUE + -- : BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4 + -- : BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI + -- : BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO + -- : BFD_RELOC_BFIN_GOTOFF17M4 + -- : BFD_RELOC_BFIN_GOTOFFHI + -- : BFD_RELOC_BFIN_GOTOFFLO + ADI Blackfin FD-PIC relocations. + + -- : BFD_RELOC_BFIN_GOT + ADI Blackfin GOT relocation. + + -- : BFD_RELOC_BFIN_PLTPC + ADI Blackfin PLTPC relocation. + + -- : BFD_ARELOC_BFIN_PUSH + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_CONST + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_ADD + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_SUB + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_MULT + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_DIV + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_MOD + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_LSHIFT + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_RSHIFT + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_AND + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_OR + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_XOR + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_LAND + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_LOR + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_LEN + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_NEG + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_COMP + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_PAGE + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_HWPAGE + ADI Blackfin arithmetic relocation. + + -- : BFD_ARELOC_BFIN_ADDR + ADI Blackfin arithmetic relocation. + + -- : BFD_RELOC_D10V_10_PCREL_R + Mitsubishi D10V relocs. This is a 10-bit reloc with the right 2 + bits assumed to be 0. + + -- : BFD_RELOC_D10V_10_PCREL_L + Mitsubishi D10V relocs. This is a 10-bit reloc with the right 2 + bits assumed to be 0. This is the same as the previous reloc + except it is in the left container, i.e., shifted left 15 bits. + + -- : BFD_RELOC_D10V_18 + This is an 18-bit reloc with the right 2 bits assumed to be 0. + + -- : BFD_RELOC_D10V_18_PCREL + This is an 18-bit reloc with the right 2 bits assumed to be 0. + + -- : BFD_RELOC_D30V_6 + Mitsubishi D30V relocs. This is a 6-bit absolute reloc. + + -- : BFD_RELOC_D30V_9_PCREL + This is a 6-bit pc-relative reloc with the right 3 bits assumed to + be 0. + + -- : BFD_RELOC_D30V_9_PCREL_R + This is a 6-bit pc-relative reloc with the right 3 bits assumed to + be 0. Same as the previous reloc but on the right side of the + container. + + -- : BFD_RELOC_D30V_15 + This is a 12-bit absolute reloc with the right 3 bitsassumed to be + 0. + + -- : BFD_RELOC_D30V_15_PCREL + This is a 12-bit pc-relative reloc with the right 3 bits assumed + to be 0. + + -- : BFD_RELOC_D30V_15_PCREL_R + This is a 12-bit pc-relative reloc with the right 3 bits assumed + to be 0. Same as the previous reloc but on the right side of the + container. + + -- : BFD_RELOC_D30V_21 + This is an 18-bit absolute reloc with the right 3 bits assumed to + be 0. + + -- : BFD_RELOC_D30V_21_PCREL + This is an 18-bit pc-relative reloc with the right 3 bits assumed + to be 0. + + -- : BFD_RELOC_D30V_21_PCREL_R + This is an 18-bit pc-relative reloc with the right 3 bits assumed + to be 0. Same as the previous reloc but on the right side of the + container. + + -- : BFD_RELOC_D30V_32 + This is a 32-bit absolute reloc. + + -- : BFD_RELOC_D30V_32_PCREL + This is a 32-bit pc-relative reloc. + + -- : BFD_RELOC_DLX_HI16_S + DLX relocs + + -- : BFD_RELOC_DLX_LO16 + DLX relocs + + -- : BFD_RELOC_DLX_JMP26 + DLX relocs + + -- : BFD_RELOC_M32C_HI8 + -- : BFD_RELOC_M32C_RL_JUMP + -- : BFD_RELOC_M32C_RL_1ADDR + -- : BFD_RELOC_M32C_RL_2ADDR + Renesas M16C/M32C Relocations. + + -- : BFD_RELOC_M32R_24 + Renesas M32R (formerly Mitsubishi M32R) relocs. This is a 24 bit + absolute address. + + -- : BFD_RELOC_M32R_10_PCREL + This is a 10-bit pc-relative reloc with the right 2 bits assumed + to be 0. + + -- : BFD_RELOC_M32R_18_PCREL + This is an 18-bit reloc with the right 2 bits assumed to be 0. + + -- : BFD_RELOC_M32R_26_PCREL + This is a 26-bit reloc with the right 2 bits assumed to be 0. + + -- : BFD_RELOC_M32R_HI16_ULO + This is a 16-bit reloc containing the high 16 bits of an address + used when the lower 16 bits are treated as unsigned. + + -- : BFD_RELOC_M32R_HI16_SLO + This is a 16-bit reloc containing the high 16 bits of an address + used when the lower 16 bits are treated as signed. + + -- : BFD_RELOC_M32R_LO16 + This is a 16-bit reloc containing the lower 16 bits of an address. + + -- : BFD_RELOC_M32R_SDA16 + This is a 16-bit reloc containing the small data area offset for + use in add3, load, and store instructions. + + -- : BFD_RELOC_M32R_GOT24 + -- : BFD_RELOC_M32R_26_PLTREL + -- : BFD_RELOC_M32R_COPY + -- : BFD_RELOC_M32R_GLOB_DAT + -- : BFD_RELOC_M32R_JMP_SLOT + -- : BFD_RELOC_M32R_RELATIVE + -- : BFD_RELOC_M32R_GOTOFF + -- : BFD_RELOC_M32R_GOTOFF_HI_ULO + -- : BFD_RELOC_M32R_GOTOFF_HI_SLO + -- : BFD_RELOC_M32R_GOTOFF_LO + -- : BFD_RELOC_M32R_GOTPC24 + -- : BFD_RELOC_M32R_GOT16_HI_ULO + -- : BFD_RELOC_M32R_GOT16_HI_SLO + -- : BFD_RELOC_M32R_GOT16_LO + -- : BFD_RELOC_M32R_GOTPC_HI_ULO + -- : BFD_RELOC_M32R_GOTPC_HI_SLO + -- : BFD_RELOC_M32R_GOTPC_LO + For PIC. + + -- : BFD_RELOC_V850_9_PCREL + This is a 9-bit reloc + + -- : BFD_RELOC_V850_22_PCREL + This is a 22-bit reloc + + -- : BFD_RELOC_V850_SDA_16_16_OFFSET + This is a 16 bit offset from the short data area pointer. + + -- : BFD_RELOC_V850_SDA_15_16_OFFSET + This is a 16 bit offset (of which only 15 bits are used) from the + short data area pointer. + + -- : BFD_RELOC_V850_ZDA_16_16_OFFSET + This is a 16 bit offset from the zero data area pointer. + + -- : BFD_RELOC_V850_ZDA_15_16_OFFSET + This is a 16 bit offset (of which only 15 bits are used) from the + zero data area pointer. + + -- : BFD_RELOC_V850_TDA_6_8_OFFSET + This is an 8 bit offset (of which only 6 bits are used) from the + tiny data area pointer. + + -- : BFD_RELOC_V850_TDA_7_8_OFFSET + This is an 8bit offset (of which only 7 bits are used) from the + tiny data area pointer. + + -- : BFD_RELOC_V850_TDA_7_7_OFFSET + This is a 7 bit offset from the tiny data area pointer. + + -- : BFD_RELOC_V850_TDA_16_16_OFFSET + This is a 16 bit offset from the tiny data area pointer. + + -- : BFD_RELOC_V850_TDA_4_5_OFFSET + This is a 5 bit offset (of which only 4 bits are used) from the + tiny data area pointer. + + -- : BFD_RELOC_V850_TDA_4_4_OFFSET + This is a 4 bit offset from the tiny data area pointer. + + -- : BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET + This is a 16 bit offset from the short data area pointer, with the + bits placed non-contiguously in the instruction. + + -- : BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET + This is a 16 bit offset from the zero data area pointer, with the + bits placed non-contiguously in the instruction. + + -- : BFD_RELOC_V850_CALLT_6_7_OFFSET + This is a 6 bit offset from the call table base pointer. + + -- : BFD_RELOC_V850_CALLT_16_16_OFFSET + This is a 16 bit offset from the call table base pointer. + + -- : BFD_RELOC_V850_LONGCALL + Used for relaxing indirect function calls. + + -- : BFD_RELOC_V850_LONGJUMP + Used for relaxing indirect jumps. + + -- : BFD_RELOC_V850_ALIGN + Used to maintain alignment whilst relaxing. + + -- : BFD_RELOC_V850_LO16_SPLIT_OFFSET + This is a variation of BFD_RELOC_LO16 that can be used in v850e + ld.bu instructions. + + -- : BFD_RELOC_V850_16_PCREL + This is a 16-bit reloc. + + -- : BFD_RELOC_V850_17_PCREL + This is a 17-bit reloc. + + -- : BFD_RELOC_V850_23 + This is a 23-bit reloc. + + -- : BFD_RELOC_V850_32_PCREL + This is a 32-bit reloc. + + -- : BFD_RELOC_V850_32_ABS + This is a 32-bit reloc. + + -- : BFD_RELOC_V850_16_SPLIT_OFFSET + This is a 16-bit reloc. + + -- : BFD_RELOC_V850_16_S1 + This is a 16-bit reloc. + + -- : BFD_RELOC_V850_LO16_S1 + Low 16 bits. 16 bit shifted by 1. + + -- : BFD_RELOC_V850_CALLT_15_16_OFFSET + This is a 16 bit offset from the call table base pointer. + + -- : BFD_RELOC_V850_32_GOTPCREL + DSO relocations. + + -- : BFD_RELOC_V850_16_GOT + DSO relocations. + + -- : BFD_RELOC_V850_32_GOT + DSO relocations. + + -- : BFD_RELOC_V850_22_PLT_PCREL + DSO relocations. + + -- : BFD_RELOC_V850_32_PLT_PCREL + DSO relocations. + + -- : BFD_RELOC_V850_COPY + DSO relocations. + + -- : BFD_RELOC_V850_GLOB_DAT + DSO relocations. + + -- : BFD_RELOC_V850_JMP_SLOT + DSO relocations. + + -- : BFD_RELOC_V850_RELATIVE + DSO relocations. + + -- : BFD_RELOC_V850_16_GOTOFF + DSO relocations. + + -- : BFD_RELOC_V850_32_GOTOFF + DSO relocations. + + -- : BFD_RELOC_V850_CODE + start code. + + -- : BFD_RELOC_V850_DATA + start data in text. + + -- : BFD_RELOC_MN10300_32_PCREL + This is a 32bit pcrel reloc for the mn10300, offset by two bytes + in the instruction. + + -- : BFD_RELOC_MN10300_16_PCREL + This is a 16bit pcrel reloc for the mn10300, offset by two bytes + in the instruction. + + -- : BFD_RELOC_TIC30_LDP + This is a 8bit DP reloc for the tms320c30, where the most + significant 8 bits of a 24 bit word are placed into the least + significant 8 bits of the opcode. + + -- : BFD_RELOC_TIC54X_PARTLS7 + This is a 7bit reloc for the tms320c54x, where the least + significant 7 bits of a 16 bit word are placed into the least + significant 7 bits of the opcode. + + -- : BFD_RELOC_TIC54X_PARTMS9 + This is a 9bit DP reloc for the tms320c54x, where the most + significant 9 bits of a 16 bit word are placed into the least + significant 9 bits of the opcode. + + -- : BFD_RELOC_TIC54X_23 + This is an extended address 23-bit reloc for the tms320c54x. + + -- : BFD_RELOC_TIC54X_16_OF_23 + This is a 16-bit reloc for the tms320c54x, where the least + significant 16 bits of a 23-bit extended address are placed into + the opcode. + + -- : BFD_RELOC_TIC54X_MS7_OF_23 + This is a reloc for the tms320c54x, where the most significant 7 + bits of a 23-bit extended address are placed into the opcode. + + -- : BFD_RELOC_C6000_PCR_S21 + -- : BFD_RELOC_C6000_PCR_S12 + -- : BFD_RELOC_C6000_PCR_S10 + -- : BFD_RELOC_C6000_PCR_S7 + -- : BFD_RELOC_C6000_ABS_S16 + -- : BFD_RELOC_C6000_ABS_L16 + -- : BFD_RELOC_C6000_ABS_H16 + -- : BFD_RELOC_C6000_SBR_U15_B + -- : BFD_RELOC_C6000_SBR_U15_H + -- : BFD_RELOC_C6000_SBR_U15_W + -- : BFD_RELOC_C6000_SBR_S16 + -- : BFD_RELOC_C6000_SBR_L16_B + -- : BFD_RELOC_C6000_SBR_L16_H + -- : BFD_RELOC_C6000_SBR_L16_W + -- : BFD_RELOC_C6000_SBR_H16_B + -- : BFD_RELOC_C6000_SBR_H16_H + -- : BFD_RELOC_C6000_SBR_H16_W + -- : BFD_RELOC_C6000_SBR_GOT_U15_W + -- : BFD_RELOC_C6000_SBR_GOT_L16_W + -- : BFD_RELOC_C6000_SBR_GOT_H16_W + -- : BFD_RELOC_C6000_DSBT_INDEX + -- : BFD_RELOC_C6000_PREL31 + -- : BFD_RELOC_C6000_COPY + -- : BFD_RELOC_C6000_JUMP_SLOT + -- : BFD_RELOC_C6000_EHTYPE + -- : BFD_RELOC_C6000_PCR_H16 + -- : BFD_RELOC_C6000_PCR_L16 + -- : BFD_RELOC_C6000_ALIGN + -- : BFD_RELOC_C6000_FPHEAD + -- : BFD_RELOC_C6000_NOCMP + TMS320C6000 relocations. + + -- : BFD_RELOC_FR30_48 + This is a 48 bit reloc for the FR30 that stores 32 bits. + + -- : BFD_RELOC_FR30_20 + This is a 32 bit reloc for the FR30 that stores 20 bits split up + into two sections. + + -- : BFD_RELOC_FR30_6_IN_4 + This is a 16 bit reloc for the FR30 that stores a 6 bit word + offset in 4 bits. + + -- : BFD_RELOC_FR30_8_IN_8 + This is a 16 bit reloc for the FR30 that stores an 8 bit byte + offset into 8 bits. + + -- : BFD_RELOC_FR30_9_IN_8 + This is a 16 bit reloc for the FR30 that stores a 9 bit short + offset into 8 bits. + + -- : BFD_RELOC_FR30_10_IN_8 + This is a 16 bit reloc for the FR30 that stores a 10 bit word + offset into 8 bits. + + -- : BFD_RELOC_FR30_9_PCREL + This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative + short offset into 8 bits. + + -- : BFD_RELOC_FR30_12_PCREL + This is a 16 bit reloc for the FR30 that stores a 12 bit pc + relative short offset into 11 bits. + + -- : BFD_RELOC_MCORE_PCREL_IMM8BY4 + -- : BFD_RELOC_MCORE_PCREL_IMM11BY2 + -- : BFD_RELOC_MCORE_PCREL_IMM4BY2 + -- : BFD_RELOC_MCORE_PCREL_32 + -- : BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2 + -- : BFD_RELOC_MCORE_RVA + Motorola Mcore relocations. + + -- : BFD_RELOC_MEP_8 + -- : BFD_RELOC_MEP_16 + -- : BFD_RELOC_MEP_32 + -- : BFD_RELOC_MEP_PCREL8A2 + -- : BFD_RELOC_MEP_PCREL12A2 + -- : BFD_RELOC_MEP_PCREL17A2 + -- : BFD_RELOC_MEP_PCREL24A2 + -- : BFD_RELOC_MEP_PCABS24A2 + -- : BFD_RELOC_MEP_LOW16 + -- : BFD_RELOC_MEP_HI16U + -- : BFD_RELOC_MEP_HI16S + -- : BFD_RELOC_MEP_GPREL + -- : BFD_RELOC_MEP_TPREL + -- : BFD_RELOC_MEP_TPREL7 + -- : BFD_RELOC_MEP_TPREL7A2 + -- : BFD_RELOC_MEP_TPREL7A4 + -- : BFD_RELOC_MEP_UIMM24 + -- : BFD_RELOC_MEP_ADDR24A4 + -- : BFD_RELOC_MEP_GNU_VTINHERIT + -- : BFD_RELOC_MEP_GNU_VTENTRY + Toshiba Media Processor Relocations. + + -- : BFD_RELOC_MMIX_GETA + -- : BFD_RELOC_MMIX_GETA_1 + -- : BFD_RELOC_MMIX_GETA_2 + -- : BFD_RELOC_MMIX_GETA_3 + These are relocations for the GETA instruction. + + -- : BFD_RELOC_MMIX_CBRANCH + -- : BFD_RELOC_MMIX_CBRANCH_J + -- : BFD_RELOC_MMIX_CBRANCH_1 + -- : BFD_RELOC_MMIX_CBRANCH_2 + -- : BFD_RELOC_MMIX_CBRANCH_3 + These are relocations for a conditional branch instruction. + + -- : BFD_RELOC_MMIX_PUSHJ + -- : BFD_RELOC_MMIX_PUSHJ_1 + -- : BFD_RELOC_MMIX_PUSHJ_2 + -- : BFD_RELOC_MMIX_PUSHJ_3 + -- : BFD_RELOC_MMIX_PUSHJ_STUBBABLE + These are relocations for the PUSHJ instruction. + + -- : BFD_RELOC_MMIX_JMP + -- : BFD_RELOC_MMIX_JMP_1 + -- : BFD_RELOC_MMIX_JMP_2 + -- : BFD_RELOC_MMIX_JMP_3 + These are relocations for the JMP instruction. + + -- : BFD_RELOC_MMIX_ADDR19 + This is a relocation for a relative address as in a GETA + instruction or a branch. + + -- : BFD_RELOC_MMIX_ADDR27 + This is a relocation for a relative address as in a JMP + instruction. + + -- : BFD_RELOC_MMIX_REG_OR_BYTE + This is a relocation for an instruction field that may be a general + register or a value 0..255. + + -- : BFD_RELOC_MMIX_REG + This is a relocation for an instruction field that may be a general + register. + + -- : BFD_RELOC_MMIX_BASE_PLUS_OFFSET + This is a relocation for two instruction fields holding a register + and an offset, the equivalent of the relocation. + + -- : BFD_RELOC_MMIX_LOCAL + This relocation is an assertion that the expression is not + allocated as a global register. It does not modify contents. + + -- : BFD_RELOC_AVR_7_PCREL + This is a 16 bit reloc for the AVR that stores 8 bit pc relative + short offset into 7 bits. + + -- : BFD_RELOC_AVR_13_PCREL + This is a 16 bit reloc for the AVR that stores 13 bit pc relative + short offset into 12 bits. + + -- : BFD_RELOC_AVR_16_PM + This is a 16 bit reloc for the AVR that stores 17 bit value + (usually program memory address) into 16 bits. + + -- : BFD_RELOC_AVR_LO8_LDI + This is a 16 bit reloc for the AVR that stores 8 bit value (usually + data memory address) into 8 bit immediate value of LDI insn. + + -- : BFD_RELOC_AVR_HI8_LDI + This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 + bit of data memory address) into 8 bit immediate value of LDI insn. + + -- : BFD_RELOC_AVR_HH8_LDI + This is a 16 bit reloc for the AVR that stores 8 bit value (most + high 8 bit of program memory address) into 8 bit immediate value + of LDI insn. + + -- : BFD_RELOC_AVR_MS8_LDI + This is a 16 bit reloc for the AVR that stores 8 bit value (most + high 8 bit of 32 bit value) into 8 bit immediate value of LDI insn. + + -- : BFD_RELOC_AVR_LO8_LDI_NEG + This is a 16 bit reloc for the AVR that stores negated 8 bit value + (usually data memory address) into 8 bit immediate value of SUBI + insn. + + -- : BFD_RELOC_AVR_HI8_LDI_NEG + This is a 16 bit reloc for the AVR that stores negated 8 bit value + (high 8 bit of data memory address) into 8 bit immediate value of + SUBI insn. + + -- : BFD_RELOC_AVR_HH8_LDI_NEG + This is a 16 bit reloc for the AVR that stores negated 8 bit value + (most high 8 bit of program memory address) into 8 bit immediate + value of LDI or SUBI insn. + + -- : BFD_RELOC_AVR_MS8_LDI_NEG + This is a 16 bit reloc for the AVR that stores negated 8 bit value + (msb of 32 bit value) into 8 bit immediate value of LDI insn. + + -- : BFD_RELOC_AVR_LO8_LDI_PM + This is a 16 bit reloc for the AVR that stores 8 bit value (usually + command address) into 8 bit immediate value of LDI insn. + + -- : BFD_RELOC_AVR_LO8_LDI_GS + This is a 16 bit reloc for the AVR that stores 8 bit value + (command address) into 8 bit immediate value of LDI insn. If the + address is beyond the 128k boundary, the linker inserts a jump + stub for this reloc in the lower 128k. + + -- : BFD_RELOC_AVR_HI8_LDI_PM + This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 + bit of command address) into 8 bit immediate value of LDI insn. + + -- : BFD_RELOC_AVR_HI8_LDI_GS + This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 + bit of command address) into 8 bit immediate value of LDI insn. + If the address is beyond the 128k boundary, the linker inserts a + jump stub for this reloc below 128k. + + -- : BFD_RELOC_AVR_HH8_LDI_PM + This is a 16 bit reloc for the AVR that stores 8 bit value (most + high 8 bit of command address) into 8 bit immediate value of LDI + insn. + + -- : BFD_RELOC_AVR_LO8_LDI_PM_NEG + This is a 16 bit reloc for the AVR that stores negated 8 bit value + (usually command address) into 8 bit immediate value of SUBI insn. + + -- : BFD_RELOC_AVR_HI8_LDI_PM_NEG + This is a 16 bit reloc for the AVR that stores negated 8 bit value + (high 8 bit of 16 bit command address) into 8 bit immediate value + of SUBI insn. + + -- : BFD_RELOC_AVR_HH8_LDI_PM_NEG + This is a 16 bit reloc for the AVR that stores negated 8 bit value + (high 6 bit of 22 bit command address) into 8 bit immediate value + of SUBI insn. + + -- : BFD_RELOC_AVR_CALL + This is a 32 bit reloc for the AVR that stores 23 bit value into + 22 bits. + + -- : BFD_RELOC_AVR_LDI + This is a 16 bit reloc for the AVR that stores all needed bits for + absolute addressing with ldi with overflow check to linktime + + -- : BFD_RELOC_AVR_6 + This is a 6 bit reloc for the AVR that stores offset for ldd/std + instructions + + -- : BFD_RELOC_AVR_6_ADIW + This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw + instructions + + -- : BFD_RELOC_RX_NEG8 + -- : BFD_RELOC_RX_NEG16 + -- : BFD_RELOC_RX_NEG24 + -- : BFD_RELOC_RX_NEG32 + -- : BFD_RELOC_RX_16_OP + -- : BFD_RELOC_RX_24_OP + -- : BFD_RELOC_RX_32_OP + -- : BFD_RELOC_RX_8U + -- : BFD_RELOC_RX_16U + -- : BFD_RELOC_RX_24U + -- : BFD_RELOC_RX_DIR3U_PCREL + -- : BFD_RELOC_RX_DIFF + -- : BFD_RELOC_RX_GPRELB + -- : BFD_RELOC_RX_GPRELW + -- : BFD_RELOC_RX_GPRELL + -- : BFD_RELOC_RX_SYM + -- : BFD_RELOC_RX_OP_SUBTRACT + -- : BFD_RELOC_RX_OP_NEG + -- : BFD_RELOC_RX_ABS8 + -- : BFD_RELOC_RX_ABS16 + -- : BFD_RELOC_RX_ABS16_REV + -- : BFD_RELOC_RX_ABS32 + -- : BFD_RELOC_RX_ABS32_REV + -- : BFD_RELOC_RX_ABS16U + -- : BFD_RELOC_RX_ABS16UW + -- : BFD_RELOC_RX_ABS16UL + -- : BFD_RELOC_RX_RELAX + Renesas RX Relocations. + + -- : BFD_RELOC_390_12 + Direct 12 bit. + + -- : BFD_RELOC_390_GOT12 + 12 bit GOT offset. + + -- : BFD_RELOC_390_PLT32 + 32 bit PC relative PLT address. + + -- : BFD_RELOC_390_COPY + Copy symbol at runtime. + + -- : BFD_RELOC_390_GLOB_DAT + Create GOT entry. + + -- : BFD_RELOC_390_JMP_SLOT + Create PLT entry. + + -- : BFD_RELOC_390_RELATIVE + Adjust by program base. + + -- : BFD_RELOC_390_GOTPC + 32 bit PC relative offset to GOT. + + -- : BFD_RELOC_390_GOT16 + 16 bit GOT offset. + + -- : BFD_RELOC_390_PC16DBL + PC relative 16 bit shifted by 1. + + -- : BFD_RELOC_390_PLT16DBL + 16 bit PC rel. PLT shifted by 1. + + -- : BFD_RELOC_390_PC32DBL + PC relative 32 bit shifted by 1. + + -- : BFD_RELOC_390_PLT32DBL + 32 bit PC rel. PLT shifted by 1. + + -- : BFD_RELOC_390_GOTPCDBL + 32 bit PC rel. GOT shifted by 1. + + -- : BFD_RELOC_390_GOT64 + 64 bit GOT offset. + + -- : BFD_RELOC_390_PLT64 + 64 bit PC relative PLT address. + + -- : BFD_RELOC_390_GOTENT + 32 bit rel. offset to GOT entry. + + -- : BFD_RELOC_390_GOTOFF64 + 64 bit offset to GOT. + + -- : BFD_RELOC_390_GOTPLT12 + 12-bit offset to symbol-entry within GOT, with PLT handling. + + -- : BFD_RELOC_390_GOTPLT16 + 16-bit offset to symbol-entry within GOT, with PLT handling. + + -- : BFD_RELOC_390_GOTPLT32 + 32-bit offset to symbol-entry within GOT, with PLT handling. + + -- : BFD_RELOC_390_GOTPLT64 + 64-bit offset to symbol-entry within GOT, with PLT handling. + + -- : BFD_RELOC_390_GOTPLTENT + 32-bit rel. offset to symbol-entry within GOT, with PLT handling. + + -- : BFD_RELOC_390_PLTOFF16 + 16-bit rel. offset from the GOT to a PLT entry. + + -- : BFD_RELOC_390_PLTOFF32 + 32-bit rel. offset from the GOT to a PLT entry. + + -- : BFD_RELOC_390_PLTOFF64 + 64-bit rel. offset from the GOT to a PLT entry. + + -- : BFD_RELOC_390_TLS_LOAD + -- : BFD_RELOC_390_TLS_GDCALL + -- : BFD_RELOC_390_TLS_LDCALL + -- : BFD_RELOC_390_TLS_GD32 + -- : BFD_RELOC_390_TLS_GD64 + -- : BFD_RELOC_390_TLS_GOTIE12 + -- : BFD_RELOC_390_TLS_GOTIE32 + -- : BFD_RELOC_390_TLS_GOTIE64 + -- : BFD_RELOC_390_TLS_LDM32 + -- : BFD_RELOC_390_TLS_LDM64 + -- : BFD_RELOC_390_TLS_IE32 + -- : BFD_RELOC_390_TLS_IE64 + -- : BFD_RELOC_390_TLS_IEENT + -- : BFD_RELOC_390_TLS_LE32 + -- : BFD_RELOC_390_TLS_LE64 + -- : BFD_RELOC_390_TLS_LDO32 + -- : BFD_RELOC_390_TLS_LDO64 + -- : BFD_RELOC_390_TLS_DTPMOD + -- : BFD_RELOC_390_TLS_DTPOFF + -- : BFD_RELOC_390_TLS_TPOFF + s390 tls relocations. + + -- : BFD_RELOC_390_20 + -- : BFD_RELOC_390_GOT20 + -- : BFD_RELOC_390_GOTPLT20 + -- : BFD_RELOC_390_TLS_GOTIE20 + Long displacement extension. + + -- : BFD_RELOC_SCORE_GPREL15 + Score relocations Low 16 bit for load/store + + -- : BFD_RELOC_SCORE_DUMMY2 + -- : BFD_RELOC_SCORE_JMP + This is a 24-bit reloc with the right 1 bit assumed to be 0 + + -- : BFD_RELOC_SCORE_BRANCH + This is a 19-bit reloc with the right 1 bit assumed to be 0 + + -- : BFD_RELOC_SCORE_IMM30 + This is a 32-bit reloc for 48-bit instructions. + + -- : BFD_RELOC_SCORE_IMM32 + This is a 32-bit reloc for 48-bit instructions. + + -- : BFD_RELOC_SCORE16_JMP + This is a 11-bit reloc with the right 1 bit assumed to be 0 + + -- : BFD_RELOC_SCORE16_BRANCH + This is a 8-bit reloc with the right 1 bit assumed to be 0 + + -- : BFD_RELOC_SCORE_BCMP + This is a 9-bit reloc with the right 1 bit assumed to be 0 + + -- : BFD_RELOC_SCORE_GOT15 + -- : BFD_RELOC_SCORE_GOT_LO16 + -- : BFD_RELOC_SCORE_CALL15 + -- : BFD_RELOC_SCORE_DUMMY_HI16 + Undocumented Score relocs + + -- : BFD_RELOC_IP2K_FR9 + Scenix IP2K - 9-bit register number / data address + + -- : BFD_RELOC_IP2K_BANK + Scenix IP2K - 4-bit register/data bank number + + -- : BFD_RELOC_IP2K_ADDR16CJP + Scenix IP2K - low 13 bits of instruction word address + + -- : BFD_RELOC_IP2K_PAGE3 + Scenix IP2K - high 3 bits of instruction word address + + -- : BFD_RELOC_IP2K_LO8DATA + -- : BFD_RELOC_IP2K_HI8DATA + -- : BFD_RELOC_IP2K_EX8DATA + Scenix IP2K - ext/low/high 8 bits of data address + + -- : BFD_RELOC_IP2K_LO8INSN + -- : BFD_RELOC_IP2K_HI8INSN + Scenix IP2K - low/high 8 bits of instruction word address + + -- : BFD_RELOC_IP2K_PC_SKIP + Scenix IP2K - even/odd PC modifier to modify snb pcl.0 + + -- : BFD_RELOC_IP2K_TEXT + Scenix IP2K - 16 bit word address in text section. + + -- : BFD_RELOC_IP2K_FR_OFFSET + Scenix IP2K - 7-bit sp or dp offset + + -- : BFD_RELOC_VPE4KMATH_DATA + -- : BFD_RELOC_VPE4KMATH_INSN + Scenix VPE4K coprocessor - data/insn-space addressing + + -- : BFD_RELOC_VTABLE_INHERIT + -- : BFD_RELOC_VTABLE_ENTRY + These two relocations are used by the linker to determine which of + the entries in a C++ virtual function table are actually used. + When the -gc-sections option is given, the linker will zero out + the entries that are not used, so that the code for those + functions need not be included in the output. + + VTABLE_INHERIT is a zero-space relocation used to describe to the + linker the inheritance tree of a C++ virtual function table. The + relocation's symbol should be the parent class' vtable, and the + relocation should be located at the child vtable. + + VTABLE_ENTRY is a zero-space relocation that describes the use of a + virtual function table entry. The reloc's symbol should refer to + the table of the class mentioned in the code. Off of that base, + an offset describes the entry that is being used. For Rela hosts, + this offset is stored in the reloc's addend. For Rel hosts, we + are forced to put this offset in the reloc's section offset. + + -- : BFD_RELOC_IA64_IMM14 + -- : BFD_RELOC_IA64_IMM22 + -- : BFD_RELOC_IA64_IMM64 + -- : BFD_RELOC_IA64_DIR32MSB + -- : BFD_RELOC_IA64_DIR32LSB + -- : BFD_RELOC_IA64_DIR64MSB + -- : BFD_RELOC_IA64_DIR64LSB + -- : BFD_RELOC_IA64_GPREL22 + -- : BFD_RELOC_IA64_GPREL64I + -- : BFD_RELOC_IA64_GPREL32MSB + -- : BFD_RELOC_IA64_GPREL32LSB + -- : BFD_RELOC_IA64_GPREL64MSB + -- : BFD_RELOC_IA64_GPREL64LSB + -- : BFD_RELOC_IA64_LTOFF22 + -- : BFD_RELOC_IA64_LTOFF64I + -- : BFD_RELOC_IA64_PLTOFF22 + -- : BFD_RELOC_IA64_PLTOFF64I + -- : BFD_RELOC_IA64_PLTOFF64MSB + -- : BFD_RELOC_IA64_PLTOFF64LSB + -- : BFD_RELOC_IA64_FPTR64I + -- : BFD_RELOC_IA64_FPTR32MSB + -- : BFD_RELOC_IA64_FPTR32LSB + -- : BFD_RELOC_IA64_FPTR64MSB + -- : BFD_RELOC_IA64_FPTR64LSB + -- : BFD_RELOC_IA64_PCREL21B + -- : BFD_RELOC_IA64_PCREL21BI + -- : BFD_RELOC_IA64_PCREL21M + -- : BFD_RELOC_IA64_PCREL21F + -- : BFD_RELOC_IA64_PCREL22 + -- : BFD_RELOC_IA64_PCREL60B + -- : BFD_RELOC_IA64_PCREL64I + -- : BFD_RELOC_IA64_PCREL32MSB + -- : BFD_RELOC_IA64_PCREL32LSB + -- : BFD_RELOC_IA64_PCREL64MSB + -- : BFD_RELOC_IA64_PCREL64LSB + -- : BFD_RELOC_IA64_LTOFF_FPTR22 + -- : BFD_RELOC_IA64_LTOFF_FPTR64I + -- : BFD_RELOC_IA64_LTOFF_FPTR32MSB + -- : BFD_RELOC_IA64_LTOFF_FPTR32LSB + -- : BFD_RELOC_IA64_LTOFF_FPTR64MSB + -- : BFD_RELOC_IA64_LTOFF_FPTR64LSB + -- : BFD_RELOC_IA64_SEGREL32MSB + -- : BFD_RELOC_IA64_SEGREL32LSB + -- : BFD_RELOC_IA64_SEGREL64MSB + -- : BFD_RELOC_IA64_SEGREL64LSB + -- : BFD_RELOC_IA64_SECREL32MSB + -- : BFD_RELOC_IA64_SECREL32LSB + -- : BFD_RELOC_IA64_SECREL64MSB + -- : BFD_RELOC_IA64_SECREL64LSB + -- : BFD_RELOC_IA64_REL32MSB + -- : BFD_RELOC_IA64_REL32LSB + -- : BFD_RELOC_IA64_REL64MSB + -- : BFD_RELOC_IA64_REL64LSB + -- : BFD_RELOC_IA64_LTV32MSB + -- : BFD_RELOC_IA64_LTV32LSB + -- : BFD_RELOC_IA64_LTV64MSB + -- : BFD_RELOC_IA64_LTV64LSB + -- : BFD_RELOC_IA64_IPLTMSB + -- : BFD_RELOC_IA64_IPLTLSB + -- : BFD_RELOC_IA64_COPY + -- : BFD_RELOC_IA64_LTOFF22X + -- : BFD_RELOC_IA64_LDXMOV + -- : BFD_RELOC_IA64_TPREL14 + -- : BFD_RELOC_IA64_TPREL22 + -- : BFD_RELOC_IA64_TPREL64I + -- : BFD_RELOC_IA64_TPREL64MSB + -- : BFD_RELOC_IA64_TPREL64LSB + -- : BFD_RELOC_IA64_LTOFF_TPREL22 + -- : BFD_RELOC_IA64_DTPMOD64MSB + -- : BFD_RELOC_IA64_DTPMOD64LSB + -- : BFD_RELOC_IA64_LTOFF_DTPMOD22 + -- : BFD_RELOC_IA64_DTPREL14 + -- : BFD_RELOC_IA64_DTPREL22 + -- : BFD_RELOC_IA64_DTPREL64I + -- : BFD_RELOC_IA64_DTPREL32MSB + -- : BFD_RELOC_IA64_DTPREL32LSB + -- : BFD_RELOC_IA64_DTPREL64MSB + -- : BFD_RELOC_IA64_DTPREL64LSB + -- : BFD_RELOC_IA64_LTOFF_DTPREL22 + Intel IA64 Relocations. + + -- : BFD_RELOC_M68HC11_HI8 + Motorola 68HC11 reloc. This is the 8 bit high part of an absolute + address. + + -- : BFD_RELOC_M68HC11_LO8 + Motorola 68HC11 reloc. This is the 8 bit low part of an absolute + address. + + -- : BFD_RELOC_M68HC11_3B + Motorola 68HC11 reloc. This is the 3 bit of a value. + + -- : BFD_RELOC_M68HC11_RL_JUMP + Motorola 68HC11 reloc. This reloc marks the beginning of a + jump/call instruction. It is used for linker relaxation to + correctly identify beginning of instruction and change some + branches to use PC-relative addressing mode. + + -- : BFD_RELOC_M68HC11_RL_GROUP + Motorola 68HC11 reloc. This reloc marks a group of several + instructions that gcc generates and for which the linker + relaxation pass can modify and/or remove some of them. + + -- : BFD_RELOC_M68HC11_LO16 + Motorola 68HC11 reloc. This is the 16-bit lower part of an + address. It is used for 'call' instruction to specify the symbol + address without any special transformation (due to memory bank + window). + + -- : BFD_RELOC_M68HC11_PAGE + Motorola 68HC11 reloc. This is a 8-bit reloc that specifies the + page number of an address. It is used by 'call' instruction to + specify the page number of the symbol. + + -- : BFD_RELOC_M68HC11_24 + Motorola 68HC11 reloc. This is a 24-bit reloc that represents the + address with a 16-bit value and a 8-bit page number. The symbol + address is transformed to follow the 16K memory bank of 68HC12 + (seen as mapped in the window). + + -- : BFD_RELOC_M68HC12_5B + Motorola 68HC12 reloc. This is the 5 bits of a value. + + -- : BFD_RELOC_16C_NUM08 + -- : BFD_RELOC_16C_NUM08_C + -- : BFD_RELOC_16C_NUM16 + -- : BFD_RELOC_16C_NUM16_C + -- : BFD_RELOC_16C_NUM32 + -- : BFD_RELOC_16C_NUM32_C + -- : BFD_RELOC_16C_DISP04 + -- : BFD_RELOC_16C_DISP04_C + -- : BFD_RELOC_16C_DISP08 + -- : BFD_RELOC_16C_DISP08_C + -- : BFD_RELOC_16C_DISP16 + -- : BFD_RELOC_16C_DISP16_C + -- : BFD_RELOC_16C_DISP24 + -- : BFD_RELOC_16C_DISP24_C + -- : BFD_RELOC_16C_DISP24a + -- : BFD_RELOC_16C_DISP24a_C + -- : BFD_RELOC_16C_REG04 + -- : BFD_RELOC_16C_REG04_C + -- : BFD_RELOC_16C_REG04a + -- : BFD_RELOC_16C_REG04a_C + -- : BFD_RELOC_16C_REG14 + -- : BFD_RELOC_16C_REG14_C + -- : BFD_RELOC_16C_REG16 + -- : BFD_RELOC_16C_REG16_C + -- : BFD_RELOC_16C_REG20 + -- : BFD_RELOC_16C_REG20_C + -- : BFD_RELOC_16C_ABS20 + -- : BFD_RELOC_16C_ABS20_C + -- : BFD_RELOC_16C_ABS24 + -- : BFD_RELOC_16C_ABS24_C + -- : BFD_RELOC_16C_IMM04 + -- : BFD_RELOC_16C_IMM04_C + -- : BFD_RELOC_16C_IMM16 + -- : BFD_RELOC_16C_IMM16_C + -- : BFD_RELOC_16C_IMM20 + -- : BFD_RELOC_16C_IMM20_C + -- : BFD_RELOC_16C_IMM24 + -- : BFD_RELOC_16C_IMM24_C + -- : BFD_RELOC_16C_IMM32 + -- : BFD_RELOC_16C_IMM32_C + NS CR16C Relocations. + + -- : BFD_RELOC_CR16_NUM8 + -- : BFD_RELOC_CR16_NUM16 + -- : BFD_RELOC_CR16_NUM32 + -- : BFD_RELOC_CR16_NUM32a + -- : BFD_RELOC_CR16_REGREL0 + -- : BFD_RELOC_CR16_REGREL4 + -- : BFD_RELOC_CR16_REGREL4a + -- : BFD_RELOC_CR16_REGREL14 + -- : BFD_RELOC_CR16_REGREL14a + -- : BFD_RELOC_CR16_REGREL16 + -- : BFD_RELOC_CR16_REGREL20 + -- : BFD_RELOC_CR16_REGREL20a + -- : BFD_RELOC_CR16_ABS20 + -- : BFD_RELOC_CR16_ABS24 + -- : BFD_RELOC_CR16_IMM4 + -- : BFD_RELOC_CR16_IMM8 + -- : BFD_RELOC_CR16_IMM16 + -- : BFD_RELOC_CR16_IMM20 + -- : BFD_RELOC_CR16_IMM24 + -- : BFD_RELOC_CR16_IMM32 + -- : BFD_RELOC_CR16_IMM32a + -- : BFD_RELOC_CR16_DISP4 + -- : BFD_RELOC_CR16_DISP8 + -- : BFD_RELOC_CR16_DISP16 + -- : BFD_RELOC_CR16_DISP20 + -- : BFD_RELOC_CR16_DISP24 + -- : BFD_RELOC_CR16_DISP24a + -- : BFD_RELOC_CR16_SWITCH8 + -- : BFD_RELOC_CR16_SWITCH16 + -- : BFD_RELOC_CR16_SWITCH32 + -- : BFD_RELOC_CR16_GOT_REGREL20 + -- : BFD_RELOC_CR16_GOTC_REGREL20 + -- : BFD_RELOC_CR16_GLOB_DAT + NS CR16 Relocations. + + -- : BFD_RELOC_CRX_REL4 + -- : BFD_RELOC_CRX_REL8 + -- : BFD_RELOC_CRX_REL8_CMP + -- : BFD_RELOC_CRX_REL16 + -- : BFD_RELOC_CRX_REL24 + -- : BFD_RELOC_CRX_REL32 + -- : BFD_RELOC_CRX_REGREL12 + -- : BFD_RELOC_CRX_REGREL22 + -- : BFD_RELOC_CRX_REGREL28 + -- : BFD_RELOC_CRX_REGREL32 + -- : BFD_RELOC_CRX_ABS16 + -- : BFD_RELOC_CRX_ABS32 + -- : BFD_RELOC_CRX_NUM8 + -- : BFD_RELOC_CRX_NUM16 + -- : BFD_RELOC_CRX_NUM32 + -- : BFD_RELOC_CRX_IMM16 + -- : BFD_RELOC_CRX_IMM32 + -- : BFD_RELOC_CRX_SWITCH8 + -- : BFD_RELOC_CRX_SWITCH16 + -- : BFD_RELOC_CRX_SWITCH32 + NS CRX Relocations. + + -- : BFD_RELOC_CRIS_BDISP8 + -- : BFD_RELOC_CRIS_UNSIGNED_5 + -- : BFD_RELOC_CRIS_SIGNED_6 + -- : BFD_RELOC_CRIS_UNSIGNED_6 + -- : BFD_RELOC_CRIS_SIGNED_8 + -- : BFD_RELOC_CRIS_UNSIGNED_8 + -- : BFD_RELOC_CRIS_SIGNED_16 + -- : BFD_RELOC_CRIS_UNSIGNED_16 + -- : BFD_RELOC_CRIS_LAPCQ_OFFSET + -- : BFD_RELOC_CRIS_UNSIGNED_4 + These relocs are only used within the CRIS assembler. They are not + (at present) written to any object files. + + -- : BFD_RELOC_CRIS_COPY + -- : BFD_RELOC_CRIS_GLOB_DAT + -- : BFD_RELOC_CRIS_JUMP_SLOT + -- : BFD_RELOC_CRIS_RELATIVE + Relocs used in ELF shared libraries for CRIS. + + -- : BFD_RELOC_CRIS_32_GOT + 32-bit offset to symbol-entry within GOT. + + -- : BFD_RELOC_CRIS_16_GOT + 16-bit offset to symbol-entry within GOT. + + -- : BFD_RELOC_CRIS_32_GOTPLT + 32-bit offset to symbol-entry within GOT, with PLT handling. + + -- : BFD_RELOC_CRIS_16_GOTPLT + 16-bit offset to symbol-entry within GOT, with PLT handling. + + -- : BFD_RELOC_CRIS_32_GOTREL + 32-bit offset to symbol, relative to GOT. + + -- : BFD_RELOC_CRIS_32_PLT_GOTREL + 32-bit offset to symbol with PLT entry, relative to GOT. + + -- : BFD_RELOC_CRIS_32_PLT_PCREL + 32-bit offset to symbol with PLT entry, relative to this + relocation. + + -- : BFD_RELOC_CRIS_32_GOT_GD + -- : BFD_RELOC_CRIS_16_GOT_GD + -- : BFD_RELOC_CRIS_32_GD + -- : BFD_RELOC_CRIS_DTP + -- : BFD_RELOC_CRIS_32_DTPREL + -- : BFD_RELOC_CRIS_16_DTPREL + -- : BFD_RELOC_CRIS_32_GOT_TPREL + -- : BFD_RELOC_CRIS_16_GOT_TPREL + -- : BFD_RELOC_CRIS_32_TPREL + -- : BFD_RELOC_CRIS_16_TPREL + -- : BFD_RELOC_CRIS_DTPMOD + -- : BFD_RELOC_CRIS_32_IE + Relocs used in TLS code for CRIS. + + -- : BFD_RELOC_860_COPY + -- : BFD_RELOC_860_GLOB_DAT + -- : BFD_RELOC_860_JUMP_SLOT + -- : BFD_RELOC_860_RELATIVE + -- : BFD_RELOC_860_PC26 + -- : BFD_RELOC_860_PLT26 + -- : BFD_RELOC_860_PC16 + -- : BFD_RELOC_860_LOW0 + -- : BFD_RELOC_860_SPLIT0 + -- : BFD_RELOC_860_LOW1 + -- : BFD_RELOC_860_SPLIT1 + -- : BFD_RELOC_860_LOW2 + -- : BFD_RELOC_860_SPLIT2 + -- : BFD_RELOC_860_LOW3 + -- : BFD_RELOC_860_LOGOT0 + -- : BFD_RELOC_860_SPGOT0 + -- : BFD_RELOC_860_LOGOT1 + -- : BFD_RELOC_860_SPGOT1 + -- : BFD_RELOC_860_LOGOTOFF0 + -- : BFD_RELOC_860_SPGOTOFF0 + -- : BFD_RELOC_860_LOGOTOFF1 + -- : BFD_RELOC_860_SPGOTOFF1 + -- : BFD_RELOC_860_LOGOTOFF2 + -- : BFD_RELOC_860_LOGOTOFF3 + -- : BFD_RELOC_860_LOPC + -- : BFD_RELOC_860_HIGHADJ + -- : BFD_RELOC_860_HAGOT + -- : BFD_RELOC_860_HAGOTOFF + -- : BFD_RELOC_860_HAPC + -- : BFD_RELOC_860_HIGH + -- : BFD_RELOC_860_HIGOT + -- : BFD_RELOC_860_HIGOTOFF + Intel i860 Relocations. + + -- : BFD_RELOC_OPENRISC_ABS_26 + -- : BFD_RELOC_OPENRISC_REL_26 + OpenRISC Relocations. + + -- : BFD_RELOC_H8_DIR16A8 + -- : BFD_RELOC_H8_DIR16R8 + -- : BFD_RELOC_H8_DIR24A8 + -- : BFD_RELOC_H8_DIR24R8 + -- : BFD_RELOC_H8_DIR32A16 + H8 elf Relocations. + + -- : BFD_RELOC_XSTORMY16_REL_12 + -- : BFD_RELOC_XSTORMY16_12 + -- : BFD_RELOC_XSTORMY16_24 + -- : BFD_RELOC_XSTORMY16_FPTR16 + Sony Xstormy16 Relocations. + + -- : BFD_RELOC_RELC + Self-describing complex relocations. + + -- : BFD_RELOC_XC16X_PAG + -- : BFD_RELOC_XC16X_POF + -- : BFD_RELOC_XC16X_SEG + -- : BFD_RELOC_XC16X_SOF + Infineon Relocations. + + -- : BFD_RELOC_VAX_GLOB_DAT + -- : BFD_RELOC_VAX_JMP_SLOT + -- : BFD_RELOC_VAX_RELATIVE + Relocations used by VAX ELF. + + -- : BFD_RELOC_MT_PC16 + Morpho MT - 16 bit immediate relocation. + + -- : BFD_RELOC_MT_HI16 + Morpho MT - Hi 16 bits of an address. + + -- : BFD_RELOC_MT_LO16 + Morpho MT - Low 16 bits of an address. + + -- : BFD_RELOC_MT_GNU_VTINHERIT + Morpho MT - Used to tell the linker which vtable entries are used. + + -- : BFD_RELOC_MT_GNU_VTENTRY + Morpho MT - Used to tell the linker which vtable entries are used. + + -- : BFD_RELOC_MT_PCINSN8 + Morpho MT - 8 bit immediate relocation. + + -- : BFD_RELOC_MSP430_10_PCREL + -- : BFD_RELOC_MSP430_16_PCREL + -- : BFD_RELOC_MSP430_16 + -- : BFD_RELOC_MSP430_16_PCREL_BYTE + -- : BFD_RELOC_MSP430_16_BYTE + -- : BFD_RELOC_MSP430_2X_PCREL + -- : BFD_RELOC_MSP430_RL_PCREL + msp430 specific relocation codes + + -- : BFD_RELOC_IQ2000_OFFSET_16 + -- : BFD_RELOC_IQ2000_OFFSET_21 + -- : BFD_RELOC_IQ2000_UHI16 + IQ2000 Relocations. + + -- : BFD_RELOC_XTENSA_RTLD + Special Xtensa relocation used only by PLT entries in ELF shared + objects to indicate that the runtime linker should set the value + to one of its own internal functions or data structures. + + -- : BFD_RELOC_XTENSA_GLOB_DAT + -- : BFD_RELOC_XTENSA_JMP_SLOT + -- : BFD_RELOC_XTENSA_RELATIVE + Xtensa relocations for ELF shared objects. + + -- : BFD_RELOC_XTENSA_PLT + Xtensa relocation used in ELF object files for symbols that may + require PLT entries. Otherwise, this is just a generic 32-bit + relocation. + + -- : BFD_RELOC_XTENSA_DIFF8 + -- : BFD_RELOC_XTENSA_DIFF16 + -- : BFD_RELOC_XTENSA_DIFF32 + Xtensa relocations to mark the difference of two local symbols. + These are only needed to support linker relaxation and can be + ignored when not relaxing. The field is set to the value of the + difference assuming no relaxation. The relocation encodes the + position of the first symbol so the linker can determine whether + to adjust the field value. + + -- : BFD_RELOC_XTENSA_SLOT0_OP + -- : BFD_RELOC_XTENSA_SLOT1_OP + -- : BFD_RELOC_XTENSA_SLOT2_OP + -- : BFD_RELOC_XTENSA_SLOT3_OP + -- : BFD_RELOC_XTENSA_SLOT4_OP + -- : BFD_RELOC_XTENSA_SLOT5_OP + -- : BFD_RELOC_XTENSA_SLOT6_OP + -- : BFD_RELOC_XTENSA_SLOT7_OP + -- : BFD_RELOC_XTENSA_SLOT8_OP + -- : BFD_RELOC_XTENSA_SLOT9_OP + -- : BFD_RELOC_XTENSA_SLOT10_OP + -- : BFD_RELOC_XTENSA_SLOT11_OP + -- : BFD_RELOC_XTENSA_SLOT12_OP + -- : BFD_RELOC_XTENSA_SLOT13_OP + -- : BFD_RELOC_XTENSA_SLOT14_OP + Generic Xtensa relocations for instruction operands. Only the slot + number is encoded in the relocation. The relocation applies to the + last PC-relative immediate operand, or if there are no PC-relative + immediates, to the last immediate operand. + + -- : BFD_RELOC_XTENSA_SLOT0_ALT + -- : BFD_RELOC_XTENSA_SLOT1_ALT + -- : BFD_RELOC_XTENSA_SLOT2_ALT + -- : BFD_RELOC_XTENSA_SLOT3_ALT + -- : BFD_RELOC_XTENSA_SLOT4_ALT + -- : BFD_RELOC_XTENSA_SLOT5_ALT + -- : BFD_RELOC_XTENSA_SLOT6_ALT + -- : BFD_RELOC_XTENSA_SLOT7_ALT + -- : BFD_RELOC_XTENSA_SLOT8_ALT + -- : BFD_RELOC_XTENSA_SLOT9_ALT + -- : BFD_RELOC_XTENSA_SLOT10_ALT + -- : BFD_RELOC_XTENSA_SLOT11_ALT + -- : BFD_RELOC_XTENSA_SLOT12_ALT + -- : BFD_RELOC_XTENSA_SLOT13_ALT + -- : BFD_RELOC_XTENSA_SLOT14_ALT + Alternate Xtensa relocations. Only the slot is encoded in the + relocation. The meaning of these relocations is opcode-specific. + + -- : BFD_RELOC_XTENSA_OP0 + -- : BFD_RELOC_XTENSA_OP1 + -- : BFD_RELOC_XTENSA_OP2 + Xtensa relocations for backward compatibility. These have all been + replaced by BFD_RELOC_XTENSA_SLOT0_OP. + + -- : BFD_RELOC_XTENSA_ASM_EXPAND + Xtensa relocation to mark that the assembler expanded the + instructions from an original target. The expansion size is + encoded in the reloc size. + + -- : BFD_RELOC_XTENSA_ASM_SIMPLIFY + Xtensa relocation to mark that the linker should simplify + assembler-expanded instructions. This is commonly used internally + by the linker after analysis of a BFD_RELOC_XTENSA_ASM_EXPAND. + + -- : BFD_RELOC_XTENSA_TLSDESC_FN + -- : BFD_RELOC_XTENSA_TLSDESC_ARG + -- : BFD_RELOC_XTENSA_TLS_DTPOFF + -- : BFD_RELOC_XTENSA_TLS_TPOFF + -- : BFD_RELOC_XTENSA_TLS_FUNC + -- : BFD_RELOC_XTENSA_TLS_ARG + -- : BFD_RELOC_XTENSA_TLS_CALL + Xtensa TLS relocations. + + -- : BFD_RELOC_Z80_DISP8 + 8 bit signed offset in (ix+d) or (iy+d). + + -- : BFD_RELOC_Z8K_DISP7 + DJNZ offset. + + -- : BFD_RELOC_Z8K_CALLR + CALR offset. + + -- : BFD_RELOC_Z8K_IMM4L + 4 bit value. + + -- : BFD_RELOC_LM32_CALL + -- : BFD_RELOC_LM32_BRANCH + -- : BFD_RELOC_LM32_16_GOT + -- : BFD_RELOC_LM32_GOTOFF_HI16 + -- : BFD_RELOC_LM32_GOTOFF_LO16 + -- : BFD_RELOC_LM32_COPY + -- : BFD_RELOC_LM32_GLOB_DAT + -- : BFD_RELOC_LM32_JMP_SLOT + -- : BFD_RELOC_LM32_RELATIVE + Lattice Mico32 relocations. + + -- : BFD_RELOC_MACH_O_SECTDIFF + Difference between two section addreses. Must be followed by a + BFD_RELOC_MACH_O_PAIR. + + -- : BFD_RELOC_MACH_O_PAIR + Pair of relocation. Contains the first symbol. + + -- : BFD_RELOC_MACH_O_X86_64_BRANCH32 + -- : BFD_RELOC_MACH_O_X86_64_BRANCH8 + PCREL relocations. They are marked as branch to create PLT entry + if required. + + -- : BFD_RELOC_MACH_O_X86_64_GOT + Used when referencing a GOT entry. + + -- : BFD_RELOC_MACH_O_X86_64_GOT_LOAD + Used when loading a GOT entry with movq. It is specially marked + so that the linker could optimize the movq to a leaq if possible. + + -- : BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32 + Symbol will be substracted. Must be followed by a BFD_RELOC_64. + + -- : BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64 + Symbol will be substracted. Must be followed by a BFD_RELOC_64. + + -- : BFD_RELOC_MACH_O_X86_64_PCREL32_1 + Same as BFD_RELOC_32_PCREL but with an implicit -1 addend. + + -- : BFD_RELOC_MACH_O_X86_64_PCREL32_2 + Same as BFD_RELOC_32_PCREL but with an implicit -2 addend. + + -- : BFD_RELOC_MACH_O_X86_64_PCREL32_4 + Same as BFD_RELOC_32_PCREL but with an implicit -4 addend. + + -- : BFD_RELOC_MICROBLAZE_32_LO + This is a 32 bit reloc for the microblaze that stores the low 16 + bits of a value + + -- : BFD_RELOC_MICROBLAZE_32_LO_PCREL + This is a 32 bit pc-relative reloc for the microblaze that stores + the low 16 bits of a value + + -- : BFD_RELOC_MICROBLAZE_32_ROSDA + This is a 32 bit reloc for the microblaze that stores a value + relative to the read-only small data area anchor + + -- : BFD_RELOC_MICROBLAZE_32_RWSDA + This is a 32 bit reloc for the microblaze that stores a value + relative to the read-write small data area anchor + + -- : BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM + This is a 32 bit reloc for the microblaze to handle expressions of + the form "Symbol Op Symbol" + + -- : BFD_RELOC_MICROBLAZE_64_NONE + This is a 64 bit reloc that stores the 32 bit pc relative value in + two words (with an imm instruction). No relocation is done here - + only used for relaxing + + -- : BFD_RELOC_MICROBLAZE_64_GOTPC + This is a 64 bit reloc that stores the 32 bit pc relative value in + two words (with an imm instruction). The relocation is + PC-relative GOT offset + + -- : BFD_RELOC_MICROBLAZE_64_GOT + This is a 64 bit reloc that stores the 32 bit pc relative value in + two words (with an imm instruction). The relocation is GOT offset + + -- : BFD_RELOC_MICROBLAZE_64_PLT + This is a 64 bit reloc that stores the 32 bit pc relative value in + two words (with an imm instruction). The relocation is + PC-relative offset into PLT + + -- : BFD_RELOC_MICROBLAZE_64_GOTOFF + This is a 64 bit reloc that stores the 32 bit GOT relative value + in two words (with an imm instruction). The relocation is + relative offset from _GLOBAL_OFFSET_TABLE_ + + -- : BFD_RELOC_MICROBLAZE_32_GOTOFF + This is a 32 bit reloc that stores the 32 bit GOT relative value + in a word. The relocation is relative offset from + + -- : BFD_RELOC_MICROBLAZE_COPY + This is used to tell the dynamic linker to copy the value out of + the dynamic object into the runtime process image. + + -- : BFD_RELOC_TILEPRO_COPY + -- : BFD_RELOC_TILEPRO_GLOB_DAT + -- : BFD_RELOC_TILEPRO_JMP_SLOT + -- : BFD_RELOC_TILEPRO_RELATIVE + -- : BFD_RELOC_TILEPRO_BROFF_X1 + -- : BFD_RELOC_TILEPRO_JOFFLONG_X1 + -- : BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT + -- : BFD_RELOC_TILEPRO_IMM8_X0 + -- : BFD_RELOC_TILEPRO_IMM8_Y0 + -- : BFD_RELOC_TILEPRO_IMM8_X1 + -- : BFD_RELOC_TILEPRO_IMM8_Y1 + -- : BFD_RELOC_TILEPRO_DEST_IMM8_X1 + -- : BFD_RELOC_TILEPRO_MT_IMM15_X1 + -- : BFD_RELOC_TILEPRO_MF_IMM15_X1 + -- : BFD_RELOC_TILEPRO_IMM16_X0 + -- : BFD_RELOC_TILEPRO_IMM16_X1 + -- : BFD_RELOC_TILEPRO_IMM16_X0_LO + -- : BFD_RELOC_TILEPRO_IMM16_X1_LO + -- : BFD_RELOC_TILEPRO_IMM16_X0_HI + -- : BFD_RELOC_TILEPRO_IMM16_X1_HI + -- : BFD_RELOC_TILEPRO_IMM16_X0_HA + -- : BFD_RELOC_TILEPRO_IMM16_X1_HA + -- : BFD_RELOC_TILEPRO_IMM16_X0_PCREL + -- : BFD_RELOC_TILEPRO_IMM16_X1_PCREL + -- : BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL + -- : BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL + -- : BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL + -- : BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL + -- : BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL + -- : BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL + -- : BFD_RELOC_TILEPRO_IMM16_X0_GOT + -- : BFD_RELOC_TILEPRO_IMM16_X1_GOT + -- : BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO + -- : BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO + -- : BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI + -- : BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI + -- : BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA + -- : BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA + -- : BFD_RELOC_TILEPRO_MMSTART_X0 + -- : BFD_RELOC_TILEPRO_MMEND_X0 + -- : BFD_RELOC_TILEPRO_MMSTART_X1 + -- : BFD_RELOC_TILEPRO_MMEND_X1 + -- : BFD_RELOC_TILEPRO_SHAMT_X0 + -- : BFD_RELOC_TILEPRO_SHAMT_X1 + -- : BFD_RELOC_TILEPRO_SHAMT_Y0 + -- : BFD_RELOC_TILEPRO_SHAMT_Y1 + -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD + -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD + -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO + -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO + -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI + -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI + -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA + -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA + -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE + -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE + -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO + -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO + -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI + -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI + -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA + -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA + -- : BFD_RELOC_TILEPRO_TLS_DTPMOD32 + -- : BFD_RELOC_TILEPRO_TLS_DTPOFF32 + -- : BFD_RELOC_TILEPRO_TLS_TPOFF32 + Tilera TILEPro Relocations. + + -- : BFD_RELOC_TILEGX_HW0 + -- : BFD_RELOC_TILEGX_HW1 + -- : BFD_RELOC_TILEGX_HW2 + -- : BFD_RELOC_TILEGX_HW3 + -- : BFD_RELOC_TILEGX_HW0_LAST + -- : BFD_RELOC_TILEGX_HW1_LAST + -- : BFD_RELOC_TILEGX_HW2_LAST + -- : BFD_RELOC_TILEGX_COPY + -- : BFD_RELOC_TILEGX_GLOB_DAT + -- : BFD_RELOC_TILEGX_JMP_SLOT + -- : BFD_RELOC_TILEGX_RELATIVE + -- : BFD_RELOC_TILEGX_BROFF_X1 + -- : BFD_RELOC_TILEGX_JUMPOFF_X1 + -- : BFD_RELOC_TILEGX_JUMPOFF_X1_PLT + -- : BFD_RELOC_TILEGX_IMM8_X0 + -- : BFD_RELOC_TILEGX_IMM8_Y0 + -- : BFD_RELOC_TILEGX_IMM8_X1 + -- : BFD_RELOC_TILEGX_IMM8_Y1 + -- : BFD_RELOC_TILEGX_DEST_IMM8_X1 + -- : BFD_RELOC_TILEGX_MT_IMM14_X1 + -- : BFD_RELOC_TILEGX_MF_IMM14_X1 + -- : BFD_RELOC_TILEGX_MMSTART_X0 + -- : BFD_RELOC_TILEGX_MMEND_X0 + -- : BFD_RELOC_TILEGX_SHAMT_X0 + -- : BFD_RELOC_TILEGX_SHAMT_X1 + -- : BFD_RELOC_TILEGX_SHAMT_Y0 + -- : BFD_RELOC_TILEGX_SHAMT_Y1 + -- : BFD_RELOC_TILEGX_IMM16_X0_HW0 + -- : BFD_RELOC_TILEGX_IMM16_X1_HW0 + -- : BFD_RELOC_TILEGX_IMM16_X0_HW1 + -- : BFD_RELOC_TILEGX_IMM16_X1_HW1 + -- : BFD_RELOC_TILEGX_IMM16_X0_HW2 + -- : BFD_RELOC_TILEGX_IMM16_X1_HW2 + -- : BFD_RELOC_TILEGX_IMM16_X0_HW3 + -- : BFD_RELOC_TILEGX_IMM16_X1_HW3 + -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST + -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST + -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST + -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST + -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST + -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST + -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL + -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT + -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT + -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT + -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT + -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT + -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT + -- : BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT + -- : BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT + -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT + -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT + -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT + -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT + -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT + -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT + -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD + -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE + -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE + -- : BFD_RELOC_TILEGX_TLS_DTPMOD64 + -- : BFD_RELOC_TILEGX_TLS_DTPOFF64 + -- : BFD_RELOC_TILEGX_TLS_TPOFF64 + -- : BFD_RELOC_TILEGX_TLS_DTPMOD32 + -- : BFD_RELOC_TILEGX_TLS_DTPOFF32 + -- : BFD_RELOC_TILEGX_TLS_TPOFF32 + Tilera TILE-Gx Relocations. + + + typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; + +2.10.2.2 `bfd_reloc_type_lookup' +................................ + +*Synopsis* + reloc_howto_type *bfd_reloc_type_lookup + (bfd *abfd, bfd_reloc_code_real_type code); + reloc_howto_type *bfd_reloc_name_lookup + (bfd *abfd, const char *reloc_name); + *Description* +Return a pointer to a howto structure which, when invoked, will perform +the relocation CODE on data from the architecture noted. + +2.10.2.3 `bfd_default_reloc_type_lookup' +........................................ + +*Synopsis* + reloc_howto_type *bfd_default_reloc_type_lookup + (bfd *abfd, bfd_reloc_code_real_type code); + *Description* +Provides a default relocation lookup routine for any architecture. + +2.10.2.4 `bfd_get_reloc_code_name' +.................................. + +*Synopsis* + const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code); + *Description* +Provides a printable name for the supplied relocation code. Useful +mainly for printing error messages. + +2.10.2.5 `bfd_generic_relax_section' +.................................... + +*Synopsis* + bfd_boolean bfd_generic_relax_section + (bfd *abfd, + asection *section, + struct bfd_link_info *, + bfd_boolean *); + *Description* +Provides default handling for relaxing for back ends which don't do +relaxing. + +2.10.2.6 `bfd_generic_gc_sections' +.................................. + +*Synopsis* + bfd_boolean bfd_generic_gc_sections + (bfd *, struct bfd_link_info *); + *Description* +Provides default handling for relaxing for back ends which don't do +section gc - i.e., does nothing. + +2.10.2.7 `bfd_generic_lookup_section_flags' +........................................... + +*Synopsis* + void bfd_generic_lookup_section_flags + (struct bfd_link_info *, struct flag_info *); + *Description* +Provides default handling for section flags lookup - i.e., does nothing. + +2.10.2.8 `bfd_generic_merge_sections' +..................................... + +*Synopsis* + bfd_boolean bfd_generic_merge_sections + (bfd *, struct bfd_link_info *); + *Description* +Provides default handling for SEC_MERGE section merging for back ends +which don't have SEC_MERGE support - i.e., does nothing. + +2.10.2.9 `bfd_generic_get_relocated_section_contents' +..................................................... + +*Synopsis* + bfd_byte *bfd_generic_get_relocated_section_contents + (bfd *abfd, + struct bfd_link_info *link_info, + struct bfd_link_order *link_order, + bfd_byte *data, + bfd_boolean relocatable, + asymbol **symbols); + *Description* +Provides default handling of relocation effort for back ends which +can't be bothered to do it efficiently. + + +File: bfd.info, Node: Core Files, Next: Targets, Prev: Relocations, Up: BFD front end + +2.11 Core files +=============== + +2.11.1 Core file functions +-------------------------- + +*Description* +These are functions pertaining to core files. + +2.11.1.1 `bfd_core_file_failing_command' +........................................ + +*Synopsis* + const char *bfd_core_file_failing_command (bfd *abfd); + *Description* +Return a read-only string explaining which program was running when it +failed and produced the core file ABFD. + +2.11.1.2 `bfd_core_file_failing_signal' +....................................... + +*Synopsis* + int bfd_core_file_failing_signal (bfd *abfd); + *Description* +Returns the signal number which caused the core dump which generated +the file the BFD ABFD is attached to. + +2.11.1.3 `bfd_core_file_pid' +............................ + +*Synopsis* + int bfd_core_file_pid (bfd *abfd); + *Description* +Returns the PID of the process the core dump the BFD ABFD is attached +to was generated from. + +2.11.1.4 `core_file_matches_executable_p' +......................................... + +*Synopsis* + bfd_boolean core_file_matches_executable_p + (bfd *core_bfd, bfd *exec_bfd); + *Description* +Return `TRUE' if the core file attached to CORE_BFD was generated by a +run of the executable file attached to EXEC_BFD, `FALSE' otherwise. + +2.11.1.5 `generic_core_file_matches_executable_p' +................................................. + +*Synopsis* + bfd_boolean generic_core_file_matches_executable_p + (bfd *core_bfd, bfd *exec_bfd); + *Description* +Return TRUE if the core file attached to CORE_BFD was generated by a +run of the executable file attached to EXEC_BFD. The match is based on +executable basenames only. + + Note: When not able to determine the core file failing command or +the executable name, we still return TRUE even though we're not sure +that core file and executable match. This is to avoid generating a +false warning in situations where we really don't know whether they +match or not. + + +File: bfd.info, Node: Targets, Next: Architectures, Prev: Core Files, Up: BFD front end + +2.12 Targets +============ + +*Description* +Each port of BFD to a different machine requires the creation of a +target back end. All the back end provides to the root part of BFD is a +structure containing pointers to functions which perform certain low +level operations on files. BFD translates the applications's requests +through a pointer into calls to the back end routines. + + When a file is opened with `bfd_openr', its format and target are +unknown. BFD uses various mechanisms to determine how to interpret the +file. The operations performed are: + + * Create a BFD by calling the internal routine `_bfd_new_bfd', then + call `bfd_find_target' with the target string supplied to + `bfd_openr' and the new BFD pointer. + + * If a null target string was provided to `bfd_find_target', look up + the environment variable `GNUTARGET' and use that as the target + string. + + * If the target string is still `NULL', or the target string is + `default', then use the first item in the target vector as the + target type, and set `target_defaulted' in the BFD to cause + `bfd_check_format' to loop through all the targets. *Note + bfd_target::. *Note Formats::. + + * Otherwise, inspect the elements in the target vector one by one, + until a match on target name is found. When found, use it. + + * Otherwise return the error `bfd_error_invalid_target' to + `bfd_openr'. + + * `bfd_openr' attempts to open the file using `bfd_open_file', and + returns the BFD. + Once the BFD has been opened and the target selected, the file +format may be determined. This is done by calling `bfd_check_format' on +the BFD with a suggested format. If `target_defaulted' has been set, +each possible target type is tried to see if it recognizes the +specified format. `bfd_check_format' returns `TRUE' when the caller +guesses right. + +* Menu: + +* bfd_target:: + + +File: bfd.info, Node: bfd_target, Prev: Targets, Up: Targets + +2.12.1 bfd_target +----------------- + +*Description* +This structure contains everything that BFD knows about a target. It +includes things like its byte order, name, and which routines to call +to do various operations. + + Every BFD points to a target structure with its `xvec' member. + + The macros below are used to dispatch to functions through the +`bfd_target' vector. They are used in a number of macros further down +in `bfd.h', and are also used when calling various routines by hand +inside the BFD implementation. The ARGLIST argument must be +parenthesized; it contains all the arguments to the called function. + + They make the documentation (more) unpleasant to read, so if someone +wants to fix this and not break the above, please do. + #define BFD_SEND(bfd, message, arglist) \ + ((*((bfd)->xvec->message)) arglist) + + #ifdef DEBUG_BFD_SEND + #undef BFD_SEND + #define BFD_SEND(bfd, message, arglist) \ + (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \ + ((*((bfd)->xvec->message)) arglist) : \ + (bfd_assert (__FILE__,__LINE__), NULL)) + #endif + For operations which index on the BFD format: + #define BFD_SEND_FMT(bfd, message, arglist) \ + (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist) + + #ifdef DEBUG_BFD_SEND + #undef BFD_SEND_FMT + #define BFD_SEND_FMT(bfd, message, arglist) \ + (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \ + (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist) : \ + (bfd_assert (__FILE__,__LINE__), NULL)) + #endif + This is the structure which defines the type of BFD this is. The +`xvec' member of the struct `bfd' itself points here. Each module that +implements access to a different target under BFD, defines one of these. + + FIXME, these names should be rationalised with the names of the +entry points which call them. Too bad we can't have one macro to define +them both! + enum bfd_flavour + { + bfd_target_unknown_flavour, + bfd_target_aout_flavour, + bfd_target_coff_flavour, + bfd_target_ecoff_flavour, + bfd_target_xcoff_flavour, + bfd_target_elf_flavour, + bfd_target_ieee_flavour, + bfd_target_nlm_flavour, + bfd_target_oasys_flavour, + bfd_target_tekhex_flavour, + bfd_target_srec_flavour, + bfd_target_verilog_flavour, + bfd_target_ihex_flavour, + bfd_target_som_flavour, + bfd_target_os9k_flavour, + bfd_target_versados_flavour, + bfd_target_msdos_flavour, + bfd_target_ovax_flavour, + bfd_target_evax_flavour, + bfd_target_mmo_flavour, + bfd_target_mach_o_flavour, + bfd_target_pef_flavour, + bfd_target_pef_xlib_flavour, + bfd_target_sym_flavour + }; + + enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN }; + + /* Forward declaration. */ + typedef struct bfd_link_info _bfd_link_info; + + /* Forward declaration. */ + typedef struct flag_info flag_info; + + typedef struct bfd_target + { + /* Identifies the kind of target, e.g., SunOS4, Ultrix, etc. */ + char *name; + + /* The "flavour" of a back end is a general indication about + the contents of a file. */ + enum bfd_flavour flavour; + + /* The order of bytes within the data area of a file. */ + enum bfd_endian byteorder; + + /* The order of bytes within the header parts of a file. */ + enum bfd_endian header_byteorder; + + /* A mask of all the flags which an executable may have set - + from the set `BFD_NO_FLAGS', `HAS_RELOC', ...`D_PAGED'. */ + flagword object_flags; + + /* A mask of all the flags which a section may have set - from + the set `SEC_NO_FLAGS', `SEC_ALLOC', ...`SET_NEVER_LOAD'. */ + flagword section_flags; + + /* The character normally found at the front of a symbol. + (if any), perhaps `_'. */ + char symbol_leading_char; + + /* The pad character for file names within an archive header. */ + char ar_pad_char; + + /* The maximum number of characters in an archive header. */ + unsigned char ar_max_namelen; + + /* How well this target matches, used to select between various + possible targets when more than one target matches. */ + unsigned char match_priority; + + /* Entries for byte swapping for data. These are different from the + other entry points, since they don't take a BFD as the first argument. + Certain other handlers could do the same. */ + bfd_uint64_t (*bfd_getx64) (const void *); + bfd_int64_t (*bfd_getx_signed_64) (const void *); + void (*bfd_putx64) (bfd_uint64_t, void *); + bfd_vma (*bfd_getx32) (const void *); + bfd_signed_vma (*bfd_getx_signed_32) (const void *); + void (*bfd_putx32) (bfd_vma, void *); + bfd_vma (*bfd_getx16) (const void *); + bfd_signed_vma (*bfd_getx_signed_16) (const void *); + void (*bfd_putx16) (bfd_vma, void *); + + /* Byte swapping for the headers. */ + bfd_uint64_t (*bfd_h_getx64) (const void *); + bfd_int64_t (*bfd_h_getx_signed_64) (const void *); + void (*bfd_h_putx64) (bfd_uint64_t, void *); + bfd_vma (*bfd_h_getx32) (const void *); + bfd_signed_vma (*bfd_h_getx_signed_32) (const void *); + void (*bfd_h_putx32) (bfd_vma, void *); + bfd_vma (*bfd_h_getx16) (const void *); + bfd_signed_vma (*bfd_h_getx_signed_16) (const void *); + void (*bfd_h_putx16) (bfd_vma, void *); + + /* Format dependent routines: these are vectors of entry points + within the target vector structure, one for each format to check. */ + + /* Check the format of a file being read. Return a `bfd_target *' or zero. */ + const struct bfd_target *(*_bfd_check_format[bfd_type_end]) (bfd *); + + /* Set the format of a file being written. */ + bfd_boolean (*_bfd_set_format[bfd_type_end]) (bfd *); + + /* Write cached information into a file being written, at `bfd_close'. */ + bfd_boolean (*_bfd_write_contents[bfd_type_end]) (bfd *); + The general target vector. These vectors are initialized using the +BFD_JUMP_TABLE macros. + + /* Generic entry points. */ + #define BFD_JUMP_TABLE_GENERIC(NAME) \ + NAME##_close_and_cleanup, \ + NAME##_bfd_free_cached_info, \ + NAME##_new_section_hook, \ + NAME##_get_section_contents, \ + NAME##_get_section_contents_in_window + + /* Called when the BFD is being closed to do any necessary cleanup. */ + bfd_boolean (*_close_and_cleanup) (bfd *); + /* Ask the BFD to free all cached information. */ + bfd_boolean (*_bfd_free_cached_info) (bfd *); + /* Called when a new section is created. */ + bfd_boolean (*_new_section_hook) (bfd *, sec_ptr); + /* Read the contents of a section. */ + bfd_boolean (*_bfd_get_section_contents) + (bfd *, sec_ptr, void *, file_ptr, bfd_size_type); + bfd_boolean (*_bfd_get_section_contents_in_window) + (bfd *, sec_ptr, bfd_window *, file_ptr, bfd_size_type); + + /* Entry points to copy private data. */ + #define BFD_JUMP_TABLE_COPY(NAME) \ + NAME##_bfd_copy_private_bfd_data, \ + NAME##_bfd_merge_private_bfd_data, \ + _bfd_generic_init_private_section_data, \ + NAME##_bfd_copy_private_section_data, \ + NAME##_bfd_copy_private_symbol_data, \ + NAME##_bfd_copy_private_header_data, \ + NAME##_bfd_set_private_flags, \ + NAME##_bfd_print_private_bfd_data + + /* Called to copy BFD general private data from one object file + to another. */ + bfd_boolean (*_bfd_copy_private_bfd_data) (bfd *, bfd *); + /* Called to merge BFD general private data from one object file + to a common output file when linking. */ + bfd_boolean (*_bfd_merge_private_bfd_data) (bfd *, bfd *); + /* Called to initialize BFD private section data from one object file + to another. */ + #define bfd_init_private_section_data(ibfd, isec, obfd, osec, link_info) \ + BFD_SEND (obfd, _bfd_init_private_section_data, (ibfd, isec, obfd, osec, link_info)) + bfd_boolean (*_bfd_init_private_section_data) + (bfd *, sec_ptr, bfd *, sec_ptr, struct bfd_link_info *); + /* Called to copy BFD private section data from one object file + to another. */ + bfd_boolean (*_bfd_copy_private_section_data) + (bfd *, sec_ptr, bfd *, sec_ptr); + /* Called to copy BFD private symbol data from one symbol + to another. */ + bfd_boolean (*_bfd_copy_private_symbol_data) + (bfd *, asymbol *, bfd *, asymbol *); + /* Called to copy BFD private header data from one object file + to another. */ + bfd_boolean (*_bfd_copy_private_header_data) + (bfd *, bfd *); + /* Called to set private backend flags. */ + bfd_boolean (*_bfd_set_private_flags) (bfd *, flagword); + + /* Called to print private BFD data. */ + bfd_boolean (*_bfd_print_private_bfd_data) (bfd *, void *); + + /* Core file entry points. */ + #define BFD_JUMP_TABLE_CORE(NAME) \ + NAME##_core_file_failing_command, \ + NAME##_core_file_failing_signal, \ + NAME##_core_file_matches_executable_p, \ + NAME##_core_file_pid + + char * (*_core_file_failing_command) (bfd *); + int (*_core_file_failing_signal) (bfd *); + bfd_boolean (*_core_file_matches_executable_p) (bfd *, bfd *); + int (*_core_file_pid) (bfd *); + + /* Archive entry points. */ + #define BFD_JUMP_TABLE_ARCHIVE(NAME) \ + NAME##_slurp_armap, \ + NAME##_slurp_extended_name_table, \ + NAME##_construct_extended_name_table, \ + NAME##_truncate_arname, \ + NAME##_write_armap, \ + NAME##_read_ar_hdr, \ + NAME##_write_ar_hdr, \ + NAME##_openr_next_archived_file, \ + NAME##_get_elt_at_index, \ + NAME##_generic_stat_arch_elt, \ + NAME##_update_armap_timestamp + + bfd_boolean (*_bfd_slurp_armap) (bfd *); + bfd_boolean (*_bfd_slurp_extended_name_table) (bfd *); + bfd_boolean (*_bfd_construct_extended_name_table) + (bfd *, char **, bfd_size_type *, const char **); + void (*_bfd_truncate_arname) (bfd *, const char *, char *); + bfd_boolean (*write_armap) + (bfd *, unsigned int, struct orl *, unsigned int, int); + void * (*_bfd_read_ar_hdr_fn) (bfd *); + bfd_boolean (*_bfd_write_ar_hdr_fn) (bfd *, bfd *); + bfd * (*openr_next_archived_file) (bfd *, bfd *); + #define bfd_get_elt_at_index(b,i) BFD_SEND (b, _bfd_get_elt_at_index, (b,i)) + bfd * (*_bfd_get_elt_at_index) (bfd *, symindex); + int (*_bfd_stat_arch_elt) (bfd *, struct stat *); + bfd_boolean (*_bfd_update_armap_timestamp) (bfd *); + + /* Entry points used for symbols. */ + #define BFD_JUMP_TABLE_SYMBOLS(NAME) \ + NAME##_get_symtab_upper_bound, \ + NAME##_canonicalize_symtab, \ + NAME##_make_empty_symbol, \ + NAME##_print_symbol, \ + NAME##_get_symbol_info, \ + NAME##_bfd_is_local_label_name, \ + NAME##_bfd_is_target_special_symbol, \ + NAME##_get_lineno, \ + NAME##_find_nearest_line, \ + _bfd_generic_find_line, \ + NAME##_find_inliner_info, \ + NAME##_bfd_make_debug_symbol, \ + NAME##_read_minisymbols, \ + NAME##_minisymbol_to_symbol + + long (*_bfd_get_symtab_upper_bound) (bfd *); + long (*_bfd_canonicalize_symtab) + (bfd *, struct bfd_symbol **); + struct bfd_symbol * + (*_bfd_make_empty_symbol) (bfd *); + void (*_bfd_print_symbol) + (bfd *, void *, struct bfd_symbol *, bfd_print_symbol_type); + #define bfd_print_symbol(b,p,s,e) BFD_SEND (b, _bfd_print_symbol, (b,p,s,e)) + void (*_bfd_get_symbol_info) + (bfd *, struct bfd_symbol *, symbol_info *); + #define bfd_get_symbol_info(b,p,e) BFD_SEND (b, _bfd_get_symbol_info, (b,p,e)) + bfd_boolean (*_bfd_is_local_label_name) (bfd *, const char *); + bfd_boolean (*_bfd_is_target_special_symbol) (bfd *, asymbol *); + alent * (*_get_lineno) (bfd *, struct bfd_symbol *); + bfd_boolean (*_bfd_find_nearest_line) + (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma, + const char **, const char **, unsigned int *); + bfd_boolean (*_bfd_find_line) + (bfd *, struct bfd_symbol **, struct bfd_symbol *, + const char **, unsigned int *); + bfd_boolean (*_bfd_find_inliner_info) + (bfd *, const char **, const char **, unsigned int *); + /* Back-door to allow format-aware applications to create debug symbols + while using BFD for everything else. Currently used by the assembler + when creating COFF files. */ + asymbol * (*_bfd_make_debug_symbol) + (bfd *, void *, unsigned long size); + #define bfd_read_minisymbols(b, d, m, s) \ + BFD_SEND (b, _read_minisymbols, (b, d, m, s)) + long (*_read_minisymbols) + (bfd *, bfd_boolean, void **, unsigned int *); + #define bfd_minisymbol_to_symbol(b, d, m, f) \ + BFD_SEND (b, _minisymbol_to_symbol, (b, d, m, f)) + asymbol * (*_minisymbol_to_symbol) + (bfd *, bfd_boolean, const void *, asymbol *); + + /* Routines for relocs. */ + #define BFD_JUMP_TABLE_RELOCS(NAME) \ + NAME##_get_reloc_upper_bound, \ + NAME##_canonicalize_reloc, \ + NAME##_bfd_reloc_type_lookup, \ + NAME##_bfd_reloc_name_lookup + + long (*_get_reloc_upper_bound) (bfd *, sec_ptr); + long (*_bfd_canonicalize_reloc) + (bfd *, sec_ptr, arelent **, struct bfd_symbol **); + /* See documentation on reloc types. */ + reloc_howto_type * + (*reloc_type_lookup) (bfd *, bfd_reloc_code_real_type); + reloc_howto_type * + (*reloc_name_lookup) (bfd *, const char *); + + + /* Routines used when writing an object file. */ + #define BFD_JUMP_TABLE_WRITE(NAME) \ + NAME##_set_arch_mach, \ + NAME##_set_section_contents + + bfd_boolean (*_bfd_set_arch_mach) + (bfd *, enum bfd_architecture, unsigned long); + bfd_boolean (*_bfd_set_section_contents) + (bfd *, sec_ptr, const void *, file_ptr, bfd_size_type); + + /* Routines used by the linker. */ + #define BFD_JUMP_TABLE_LINK(NAME) \ + NAME##_sizeof_headers, \ + NAME##_bfd_get_relocated_section_contents, \ + NAME##_bfd_relax_section, \ + NAME##_bfd_link_hash_table_create, \ + NAME##_bfd_link_hash_table_free, \ + NAME##_bfd_link_add_symbols, \ + NAME##_bfd_link_just_syms, \ + NAME##_bfd_copy_link_hash_symbol_type, \ + NAME##_bfd_final_link, \ + NAME##_bfd_link_split_section, \ + NAME##_bfd_gc_sections, \ + NAME##_bfd_lookup_section_flags, \ + NAME##_bfd_merge_sections, \ + NAME##_bfd_is_group_section, \ + NAME##_bfd_discard_group, \ + NAME##_section_already_linked, \ + NAME##_bfd_define_common_symbol + + int (*_bfd_sizeof_headers) (bfd *, struct bfd_link_info *); + bfd_byte * (*_bfd_get_relocated_section_contents) + (bfd *, struct bfd_link_info *, struct bfd_link_order *, + bfd_byte *, bfd_boolean, struct bfd_symbol **); + + bfd_boolean (*_bfd_relax_section) + (bfd *, struct bfd_section *, struct bfd_link_info *, bfd_boolean *); + + /* Create a hash table for the linker. Different backends store + different information in this table. */ + struct bfd_link_hash_table * + (*_bfd_link_hash_table_create) (bfd *); + + /* Release the memory associated with the linker hash table. */ + void (*_bfd_link_hash_table_free) (struct bfd_link_hash_table *); + + /* Add symbols from this object file into the hash table. */ + bfd_boolean (*_bfd_link_add_symbols) (bfd *, struct bfd_link_info *); + + /* Indicate that we are only retrieving symbol values from this section. */ + void (*_bfd_link_just_syms) (asection *, struct bfd_link_info *); + + /* Copy the symbol type of a linker hash table entry. */ + #define bfd_copy_link_hash_symbol_type(b, t, f) \ + BFD_SEND (b, _bfd_copy_link_hash_symbol_type, (b, t, f)) + void (*_bfd_copy_link_hash_symbol_type) + (bfd *, struct bfd_link_hash_entry *, struct bfd_link_hash_entry *); + + /* Do a link based on the link_order structures attached to each + section of the BFD. */ + bfd_boolean (*_bfd_final_link) (bfd *, struct bfd_link_info *); + + /* Should this section be split up into smaller pieces during linking. */ + bfd_boolean (*_bfd_link_split_section) (bfd *, struct bfd_section *); + + /* Remove sections that are not referenced from the output. */ + bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *); + + /* Sets the bitmask of allowed and disallowed section flags. */ + void (*_bfd_lookup_section_flags) (struct bfd_link_info *, + struct flag_info *); + + /* Attempt to merge SEC_MERGE sections. */ + bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *); + + /* Is this section a member of a group? */ + bfd_boolean (*_bfd_is_group_section) (bfd *, const struct bfd_section *); + + /* Discard members of a group. */ + bfd_boolean (*_bfd_discard_group) (bfd *, struct bfd_section *); + + /* Check if SEC has been already linked during a reloceatable or + final link. */ + bfd_boolean (*_section_already_linked) (bfd *, asection *, + struct bfd_link_info *); + + /* Define a common symbol. */ + bfd_boolean (*_bfd_define_common_symbol) (bfd *, struct bfd_link_info *, + struct bfd_link_hash_entry *); + + /* Routines to handle dynamic symbols and relocs. */ + #define BFD_JUMP_TABLE_DYNAMIC(NAME) \ + NAME##_get_dynamic_symtab_upper_bound, \ + NAME##_canonicalize_dynamic_symtab, \ + NAME##_get_synthetic_symtab, \ + NAME##_get_dynamic_reloc_upper_bound, \ + NAME##_canonicalize_dynamic_reloc + + /* Get the amount of memory required to hold the dynamic symbols. */ + long (*_bfd_get_dynamic_symtab_upper_bound) (bfd *); + /* Read in the dynamic symbols. */ + long (*_bfd_canonicalize_dynamic_symtab) + (bfd *, struct bfd_symbol **); + /* Create synthetized symbols. */ + long (*_bfd_get_synthetic_symtab) + (bfd *, long, struct bfd_symbol **, long, struct bfd_symbol **, + struct bfd_symbol **); + /* Get the amount of memory required to hold the dynamic relocs. */ + long (*_bfd_get_dynamic_reloc_upper_bound) (bfd *); + /* Read in the dynamic relocs. */ + long (*_bfd_canonicalize_dynamic_reloc) + (bfd *, arelent **, struct bfd_symbol **); + A pointer to an alternative bfd_target in case the current one is not +satisfactory. This can happen when the target cpu supports both big +and little endian code, and target chosen by the linker has the wrong +endianness. The function open_output() in ld/ldlang.c uses this field +to find an alternative output format that is suitable. + /* Opposite endian version of this target. */ + const struct bfd_target * alternative_target; + + /* Data for use by back-end routines, which isn't + generic enough to belong in this structure. */ + const void *backend_data; + + } bfd_target; + +2.12.1.1 `bfd_set_default_target' +................................. + +*Synopsis* + bfd_boolean bfd_set_default_target (const char *name); + *Description* +Set the default target vector to use when recognizing a BFD. This +takes the name of the target, which may be a BFD target name or a +configuration triplet. + +2.12.1.2 `bfd_find_target' +.......................... + +*Synopsis* + const bfd_target *bfd_find_target (const char *target_name, bfd *abfd); + *Description* +Return a pointer to the transfer vector for the object target named +TARGET_NAME. If TARGET_NAME is `NULL', choose the one in the +environment variable `GNUTARGET'; if that is null or not defined, then +choose the first entry in the target list. Passing in the string +"default" or setting the environment variable to "default" will cause +the first entry in the target list to be returned, and +"target_defaulted" will be set in the BFD if ABFD isn't `NULL'. This +causes `bfd_check_format' to loop over all the targets to find the one +that matches the file being read. + +2.12.1.3 `bfd_get_target_info' +.............................. + +*Synopsis* + const bfd_target *bfd_get_target_info (const char *target_name, + bfd *abfd, + bfd_boolean *is_bigendian, + int *underscoring, + const char **def_target_arch); + *Description* +Return a pointer to the transfer vector for the object target named +TARGET_NAME. If TARGET_NAME is `NULL', choose the one in the +environment variable `GNUTARGET'; if that is null or not defined, then +choose the first entry in the target list. Passing in the string +"default" or setting the environment variable to "default" will cause +the first entry in the target list to be returned, and +"target_defaulted" will be set in the BFD if ABFD isn't `NULL'. This +causes `bfd_check_format' to loop over all the targets to find the one +that matches the file being read. If IS_BIGENDIAN is not `NULL', then +set this value to target's endian mode. True for big-endian, FALSE for +little-endian or for invalid target. If UNDERSCORING is not `NULL', +then set this value to target's underscoring mode. Zero for +none-underscoring, -1 for invalid target, else the value of target +vector's symbol underscoring. If DEF_TARGET_ARCH is not `NULL', then +set it to the architecture string specified by the target_name. + +2.12.1.4 `bfd_target_list' +.......................... + +*Synopsis* + const char ** bfd_target_list (void); + *Description* +Return a freshly malloced NULL-terminated vector of the names of all +the valid BFD targets. Do not modify the names. + +2.12.1.5 `bfd_seach_for_target' +............................... + +*Synopsis* + const bfd_target *bfd_search_for_target + (int (*search_func) (const bfd_target *, void *), + void *); + *Description* +Return a pointer to the first transfer vector in the list of transfer +vectors maintained by BFD that produces a non-zero result when passed +to the function SEARCH_FUNC. The parameter DATA is passed, unexamined, +to the search function. + + +File: bfd.info, Node: Architectures, Next: Opening and Closing, Prev: Targets, Up: BFD front end + +2.13 Architectures +================== + +BFD keeps one atom in a BFD describing the architecture of the data +attached to the BFD: a pointer to a `bfd_arch_info_type'. + + Pointers to structures can be requested independently of a BFD so +that an architecture's information can be interrogated without access +to an open BFD. + + The architecture information is provided by each architecture +package. The set of default architectures is selected by the macro +`SELECT_ARCHITECTURES'. This is normally set up in the +`config/TARGET.mt' file of your choice. If the name is not defined, +then all the architectures supported are included. + + When BFD starts up, all the architectures are called with an +initialize method. It is up to the architecture back end to insert as +many items into the list of architectures as it wants to; generally +this would be one for each machine and one for the default case (an +item with a machine field of 0). + + BFD's idea of an architecture is implemented in `archures.c'. + +2.13.1 bfd_architecture +----------------------- + +*Description* +This enum gives the object file's CPU architecture, in a global +sense--i.e., what processor family does it belong to? Another field +indicates which processor within the family is in use. The machine +gives a number which distinguishes different versions of the +architecture, containing, for example, 2 and 3 for Intel i960 KA and +i960 KB, and 68020 and 68030 for Motorola 68020 and 68030. + enum bfd_architecture + { + bfd_arch_unknown, /* File arch not known. */ + bfd_arch_obscure, /* Arch known, not one of these. */ + bfd_arch_m68k, /* Motorola 68xxx */ + #define bfd_mach_m68000 1 + #define bfd_mach_m68008 2 + #define bfd_mach_m68010 3 + #define bfd_mach_m68020 4 + #define bfd_mach_m68030 5 + #define bfd_mach_m68040 6 + #define bfd_mach_m68060 7 + #define bfd_mach_cpu32 8 + #define bfd_mach_fido 9 + #define bfd_mach_mcf_isa_a_nodiv 10 + #define bfd_mach_mcf_isa_a 11 + #define bfd_mach_mcf_isa_a_mac 12 + #define bfd_mach_mcf_isa_a_emac 13 + #define bfd_mach_mcf_isa_aplus 14 + #define bfd_mach_mcf_isa_aplus_mac 15 + #define bfd_mach_mcf_isa_aplus_emac 16 + #define bfd_mach_mcf_isa_b_nousp 17 + #define bfd_mach_mcf_isa_b_nousp_mac 18 + #define bfd_mach_mcf_isa_b_nousp_emac 19 + #define bfd_mach_mcf_isa_b 20 + #define bfd_mach_mcf_isa_b_mac 21 + #define bfd_mach_mcf_isa_b_emac 22 + #define bfd_mach_mcf_isa_b_float 23 + #define bfd_mach_mcf_isa_b_float_mac 24 + #define bfd_mach_mcf_isa_b_float_emac 25 + #define bfd_mach_mcf_isa_c 26 + #define bfd_mach_mcf_isa_c_mac 27 + #define bfd_mach_mcf_isa_c_emac 28 + #define bfd_mach_mcf_isa_c_nodiv 29 + #define bfd_mach_mcf_isa_c_nodiv_mac 30 + #define bfd_mach_mcf_isa_c_nodiv_emac 31 + bfd_arch_vax, /* DEC Vax */ + bfd_arch_i960, /* Intel 960 */ + /* The order of the following is important. + lower number indicates a machine type that + only accepts a subset of the instructions + available to machines with higher numbers. + The exception is the "ca", which is + incompatible with all other machines except + "core". */ + + #define bfd_mach_i960_core 1 + #define bfd_mach_i960_ka_sa 2 + #define bfd_mach_i960_kb_sb 3 + #define bfd_mach_i960_mc 4 + #define bfd_mach_i960_xa 5 + #define bfd_mach_i960_ca 6 + #define bfd_mach_i960_jx 7 + #define bfd_mach_i960_hx 8 + + bfd_arch_or32, /* OpenRISC 32 */ + + bfd_arch_sparc, /* SPARC */ + #define bfd_mach_sparc 1 + /* The difference between v8plus and v9 is that v9 is a true 64 bit env. */ + #define bfd_mach_sparc_sparclet 2 + #define bfd_mach_sparc_sparclite 3 + #define bfd_mach_sparc_v8plus 4 + #define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ + #define bfd_mach_sparc_sparclite_le 6 + #define bfd_mach_sparc_v9 7 + #define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ + #define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ + #define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ + /* Nonzero if MACH has the v9 instruction set. */ + #define bfd_mach_sparc_v9_p(mach) \ + ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \ + && (mach) != bfd_mach_sparc_sparclite_le) + /* Nonzero if MACH is a 64 bit sparc architecture. */ + #define bfd_mach_sparc_64bit_p(mach) \ + ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb) + bfd_arch_spu, /* PowerPC SPU */ + #define bfd_mach_spu 256 + bfd_arch_mips, /* MIPS Rxxxx */ + #define bfd_mach_mips3000 3000 + #define bfd_mach_mips3900 3900 + #define bfd_mach_mips4000 4000 + #define bfd_mach_mips4010 4010 + #define bfd_mach_mips4100 4100 + #define bfd_mach_mips4111 4111 + #define bfd_mach_mips4120 4120 + #define bfd_mach_mips4300 4300 + #define bfd_mach_mips4400 4400 + #define bfd_mach_mips4600 4600 + #define bfd_mach_mips4650 4650 + #define bfd_mach_mips5000 5000 + #define bfd_mach_mips5400 5400 + #define bfd_mach_mips5500 5500 + #define bfd_mach_mips6000 6000 + #define bfd_mach_mips7000 7000 + #define bfd_mach_mips8000 8000 + #define bfd_mach_mips9000 9000 + #define bfd_mach_mips10000 10000 + #define bfd_mach_mips12000 12000 + #define bfd_mach_mips14000 14000 + #define bfd_mach_mips16000 16000 + #define bfd_mach_mips16 16 + #define bfd_mach_mips5 5 + #define bfd_mach_mips_loongson_2e 3001 + #define bfd_mach_mips_loongson_2f 3002 + #define bfd_mach_mips_loongson_3a 3003 + #define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */ + #define bfd_mach_mips_octeon 6501 + #define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */ + #define bfd_mach_mipsisa32 32 + #define bfd_mach_mipsisa32r2 33 + #define bfd_mach_mipsisa64 64 + #define bfd_mach_mipsisa64r2 65 + #define bfd_mach_mips_micromips 96 + bfd_arch_i386, /* Intel 386 */ + #define bfd_mach_i386_intel_syntax (1 << 0) + #define bfd_mach_i386_i8086 (1 << 1) + #define bfd_mach_i386_i386 (1 << 2) + #define bfd_mach_x86_64 (1 << 3) + #define bfd_mach_x64_32 (1 << 4) + #define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax) + #define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax) + #define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax) + bfd_arch_l1om, /* Intel L1OM */ + #define bfd_mach_l1om (1 << 5) + #define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax) + bfd_arch_k1om, /* Intel K1OM */ + #define bfd_mach_k1om (1 << 6) + #define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax) + bfd_arch_we32k, /* AT&T WE32xxx */ + bfd_arch_tahoe, /* CCI/Harris Tahoe */ + bfd_arch_i860, /* Intel 860 */ + bfd_arch_i370, /* IBM 360/370 Mainframes */ + bfd_arch_romp, /* IBM ROMP PC/RT */ + bfd_arch_convex, /* Convex */ + bfd_arch_m88k, /* Motorola 88xxx */ + bfd_arch_m98k, /* Motorola 98xxx */ + bfd_arch_pyramid, /* Pyramid Technology */ + bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300) */ + #define bfd_mach_h8300 1 + #define bfd_mach_h8300h 2 + #define bfd_mach_h8300s 3 + #define bfd_mach_h8300hn 4 + #define bfd_mach_h8300sn 5 + #define bfd_mach_h8300sx 6 + #define bfd_mach_h8300sxn 7 + bfd_arch_pdp11, /* DEC PDP-11 */ + bfd_arch_plugin, + bfd_arch_powerpc, /* PowerPC */ + #define bfd_mach_ppc 32 + #define bfd_mach_ppc64 64 + #define bfd_mach_ppc_403 403 + #define bfd_mach_ppc_403gc 4030 + #define bfd_mach_ppc_405 405 + #define bfd_mach_ppc_505 505 + #define bfd_mach_ppc_601 601 + #define bfd_mach_ppc_602 602 + #define bfd_mach_ppc_603 603 + #define bfd_mach_ppc_ec603e 6031 + #define bfd_mach_ppc_604 604 + #define bfd_mach_ppc_620 620 + #define bfd_mach_ppc_630 630 + #define bfd_mach_ppc_750 750 + #define bfd_mach_ppc_860 860 + #define bfd_mach_ppc_a35 35 + #define bfd_mach_ppc_rs64ii 642 + #define bfd_mach_ppc_rs64iii 643 + #define bfd_mach_ppc_7400 7400 + #define bfd_mach_ppc_e500 500 + #define bfd_mach_ppc_e500mc 5001 + #define bfd_mach_ppc_e500mc64 5005 + #define bfd_mach_ppc_titan 83 + bfd_arch_rs6000, /* IBM RS/6000 */ + #define bfd_mach_rs6k 6000 + #define bfd_mach_rs6k_rs1 6001 + #define bfd_mach_rs6k_rsc 6003 + #define bfd_mach_rs6k_rs2 6002 + bfd_arch_hppa, /* HP PA RISC */ + #define bfd_mach_hppa10 10 + #define bfd_mach_hppa11 11 + #define bfd_mach_hppa20 20 + #define bfd_mach_hppa20w 25 + bfd_arch_d10v, /* Mitsubishi D10V */ + #define bfd_mach_d10v 1 + #define bfd_mach_d10v_ts2 2 + #define bfd_mach_d10v_ts3 3 + bfd_arch_d30v, /* Mitsubishi D30V */ + bfd_arch_dlx, /* DLX */ + bfd_arch_m68hc11, /* Motorola 68HC11 */ + bfd_arch_m68hc12, /* Motorola 68HC12 */ + #define bfd_mach_m6812_default 0 + #define bfd_mach_m6812 1 + #define bfd_mach_m6812s 2 + bfd_arch_z8k, /* Zilog Z8000 */ + #define bfd_mach_z8001 1 + #define bfd_mach_z8002 2 + bfd_arch_h8500, /* Renesas H8/500 (formerly Hitachi H8/500) */ + bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH) */ + #define bfd_mach_sh 1 + #define bfd_mach_sh2 0x20 + #define bfd_mach_sh_dsp 0x2d + #define bfd_mach_sh2a 0x2a + #define bfd_mach_sh2a_nofpu 0x2b + #define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1 + #define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2 + #define bfd_mach_sh2a_or_sh4 0x2a3 + #define bfd_mach_sh2a_or_sh3e 0x2a4 + #define bfd_mach_sh2e 0x2e + #define bfd_mach_sh3 0x30 + #define bfd_mach_sh3_nommu 0x31 + #define bfd_mach_sh3_dsp 0x3d + #define bfd_mach_sh3e 0x3e + #define bfd_mach_sh4 0x40 + #define bfd_mach_sh4_nofpu 0x41 + #define bfd_mach_sh4_nommu_nofpu 0x42 + #define bfd_mach_sh4a 0x4a + #define bfd_mach_sh4a_nofpu 0x4b + #define bfd_mach_sh4al_dsp 0x4d + #define bfd_mach_sh5 0x50 + bfd_arch_alpha, /* Dec Alpha */ + #define bfd_mach_alpha_ev4 0x10 + #define bfd_mach_alpha_ev5 0x20 + #define bfd_mach_alpha_ev6 0x30 + bfd_arch_arm, /* Advanced Risc Machines ARM. */ + #define bfd_mach_arm_unknown 0 + #define bfd_mach_arm_2 1 + #define bfd_mach_arm_2a 2 + #define bfd_mach_arm_3 3 + #define bfd_mach_arm_3M 4 + #define bfd_mach_arm_4 5 + #define bfd_mach_arm_4T 6 + #define bfd_mach_arm_5 7 + #define bfd_mach_arm_5T 8 + #define bfd_mach_arm_5TE 9 + #define bfd_mach_arm_XScale 10 + #define bfd_mach_arm_ep9312 11 + #define bfd_mach_arm_iWMMXt 12 + #define bfd_mach_arm_iWMMXt2 13 + bfd_arch_ns32k, /* National Semiconductors ns32000 */ + bfd_arch_w65, /* WDC 65816 */ + bfd_arch_tic30, /* Texas Instruments TMS320C30 */ + bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */ + #define bfd_mach_tic3x 30 + #define bfd_mach_tic4x 40 + bfd_arch_tic54x, /* Texas Instruments TMS320C54X */ + bfd_arch_tic6x, /* Texas Instruments TMS320C6X */ + bfd_arch_tic80, /* TI TMS320c80 (MVP) */ + bfd_arch_v850, /* NEC V850 */ + #define bfd_mach_v850 1 + #define bfd_mach_v850e 'E' + #define bfd_mach_v850e1 '1' + #define bfd_mach_v850e2 0x4532 + #define bfd_mach_v850e2v3 0x45325633 + bfd_arch_arc, /* ARC Cores */ + #define bfd_mach_arc_5 5 + #define bfd_mach_arc_6 6 + #define bfd_mach_arc_7 7 + #define bfd_mach_arc_8 8 + bfd_arch_m32c, /* Renesas M16C/M32C. */ + #define bfd_mach_m16c 0x75 + #define bfd_mach_m32c 0x78 + bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D) */ + #define bfd_mach_m32r 1 /* For backwards compatibility. */ + #define bfd_mach_m32rx 'x' + #define bfd_mach_m32r2 '2' + bfd_arch_mn10200, /* Matsushita MN10200 */ + bfd_arch_mn10300, /* Matsushita MN10300 */ + #define bfd_mach_mn10300 300 + #define bfd_mach_am33 330 + #define bfd_mach_am33_2 332 + bfd_arch_fr30, + #define bfd_mach_fr30 0x46523330 + bfd_arch_frv, + #define bfd_mach_frv 1 + #define bfd_mach_frvsimple 2 + #define bfd_mach_fr300 300 + #define bfd_mach_fr400 400 + #define bfd_mach_fr450 450 + #define bfd_mach_frvtomcat 499 /* fr500 prototype */ + #define bfd_mach_fr500 500 + #define bfd_mach_fr550 550 + bfd_arch_moxie, /* The moxie processor */ + #define bfd_mach_moxie 1 + bfd_arch_mcore, + bfd_arch_mep, + #define bfd_mach_mep 1 + #define bfd_mach_mep_h1 0x6831 + #define bfd_mach_mep_c5 0x6335 + bfd_arch_ia64, /* HP/Intel ia64 */ + #define bfd_mach_ia64_elf64 64 + #define bfd_mach_ia64_elf32 32 + bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */ + #define bfd_mach_ip2022 1 + #define bfd_mach_ip2022ext 2 + bfd_arch_iq2000, /* Vitesse IQ2000. */ + #define bfd_mach_iq2000 1 + #define bfd_mach_iq10 2 + bfd_arch_mt, + #define bfd_mach_ms1 1 + #define bfd_mach_mrisc2 2 + #define bfd_mach_ms2 3 + bfd_arch_pj, + bfd_arch_avr, /* Atmel AVR microcontrollers. */ + #define bfd_mach_avr1 1 + #define bfd_mach_avr2 2 + #define bfd_mach_avr25 25 + #define bfd_mach_avr3 3 + #define bfd_mach_avr31 31 + #define bfd_mach_avr35 35 + #define bfd_mach_avr4 4 + #define bfd_mach_avr5 5 + #define bfd_mach_avr51 51 + #define bfd_mach_avr6 6 + #define bfd_mach_avrxmega1 101 + #define bfd_mach_avrxmega2 102 + #define bfd_mach_avrxmega3 103 + #define bfd_mach_avrxmega4 104 + #define bfd_mach_avrxmega5 105 + #define bfd_mach_avrxmega6 106 + #define bfd_mach_avrxmega7 107 + bfd_arch_bfin, /* ADI Blackfin */ + #define bfd_mach_bfin 1 + bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */ + #define bfd_mach_cr16 1 + bfd_arch_cr16c, /* National Semiconductor CompactRISC. */ + #define bfd_mach_cr16c 1 + bfd_arch_crx, /* National Semiconductor CRX. */ + #define bfd_mach_crx 1 + bfd_arch_cris, /* Axis CRIS */ + #define bfd_mach_cris_v0_v10 255 + #define bfd_mach_cris_v32 32 + #define bfd_mach_cris_v10_v32 1032 + bfd_arch_rx, /* Renesas RX. */ + #define bfd_mach_rx 0x75 + bfd_arch_s390, /* IBM s390 */ + #define bfd_mach_s390_31 31 + #define bfd_mach_s390_64 64 + bfd_arch_score, /* Sunplus score */ + #define bfd_mach_score3 3 + #define bfd_mach_score7 7 + bfd_arch_openrisc, /* OpenRISC */ + bfd_arch_mmix, /* Donald Knuth's educational processor. */ + bfd_arch_xstormy16, + #define bfd_mach_xstormy16 1 + bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */ + #define bfd_mach_msp11 11 + #define bfd_mach_msp110 110 + #define bfd_mach_msp12 12 + #define bfd_mach_msp13 13 + #define bfd_mach_msp14 14 + #define bfd_mach_msp15 15 + #define bfd_mach_msp16 16 + #define bfd_mach_msp21 21 + #define bfd_mach_msp31 31 + #define bfd_mach_msp32 32 + #define bfd_mach_msp33 33 + #define bfd_mach_msp41 41 + #define bfd_mach_msp42 42 + #define bfd_mach_msp43 43 + #define bfd_mach_msp44 44 + bfd_arch_xc16x, /* Infineon's XC16X Series. */ + #define bfd_mach_xc16x 1 + #define bfd_mach_xc16xl 2 + #define bfd_mach_xc16xs 3 + bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ + #define bfd_mach_xtensa 1 + bfd_arch_z80, + #define bfd_mach_z80strict 1 /* No undocumented opcodes. */ + #define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */ + #define bfd_mach_z80full 7 /* All undocumented instructions. */ + #define bfd_mach_r800 11 /* R800: successor with multiplication. */ + bfd_arch_lm32, /* Lattice Mico32 */ + #define bfd_mach_lm32 1 + bfd_arch_microblaze,/* Xilinx MicroBlaze. */ + bfd_arch_tilepro, /* Tilera TILEPro */ + bfd_arch_tilegx, /* Tilera TILE-Gx */ + #define bfd_mach_tilepro 1 + #define bfd_mach_tilegx 1 + bfd_arch_last + }; + +2.13.2 bfd_arch_info +-------------------- + +*Description* +This structure contains information on architectures for use within BFD. + + typedef struct bfd_arch_info + { + int bits_per_word; + int bits_per_address; + int bits_per_byte; + enum bfd_architecture arch; + unsigned long mach; + const char *arch_name; + const char *printable_name; + unsigned int section_align_power; + /* TRUE if this is the default machine for the architecture. + The default arch should be the first entry for an arch so that + all the entries for that arch can be accessed via `next'. */ + bfd_boolean the_default; + const struct bfd_arch_info * (*compatible) + (const struct bfd_arch_info *a, const struct bfd_arch_info *b); + + bfd_boolean (*scan) (const struct bfd_arch_info *, const char *); + + const struct bfd_arch_info *next; + } + bfd_arch_info_type; + +2.13.2.1 `bfd_printable_name' +............................. + +*Synopsis* + const char *bfd_printable_name (bfd *abfd); + *Description* +Return a printable string representing the architecture and machine +from the pointer to the architecture info structure. + +2.13.2.2 `bfd_scan_arch' +........................ + +*Synopsis* + const bfd_arch_info_type *bfd_scan_arch (const char *string); + *Description* +Figure out if BFD supports any cpu which could be described with the +name STRING. Return a pointer to an `arch_info' structure if a machine +is found, otherwise NULL. + +2.13.2.3 `bfd_arch_list' +........................ + +*Synopsis* + const char **bfd_arch_list (void); + *Description* +Return a freshly malloced NULL-terminated vector of the names of all +the valid BFD architectures. Do not modify the names. + +2.13.2.4 `bfd_arch_get_compatible' +.................................. + +*Synopsis* + const bfd_arch_info_type *bfd_arch_get_compatible + (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns); + *Description* +Determine whether two BFDs' architectures and machine types are +compatible. Calculates the lowest common denominator between the two +architectures and machine types implied by the BFDs and returns a +pointer to an `arch_info' structure describing the compatible machine. + +2.13.2.5 `bfd_default_arch_struct' +.................................. + +*Description* +The `bfd_default_arch_struct' is an item of `bfd_arch_info_type' which +has been initialized to a fairly generic state. A BFD starts life by +pointing to this structure, until the correct back end has determined +the real architecture of the file. + extern const bfd_arch_info_type bfd_default_arch_struct; + +2.13.2.6 `bfd_set_arch_info' +............................ + +*Synopsis* + void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg); + *Description* +Set the architecture info of ABFD to ARG. + +2.13.2.7 `bfd_default_set_arch_mach' +.................................... + +*Synopsis* + bfd_boolean bfd_default_set_arch_mach + (bfd *abfd, enum bfd_architecture arch, unsigned long mach); + *Description* +Set the architecture and machine type in BFD ABFD to ARCH and MACH. +Find the correct pointer to a structure and insert it into the +`arch_info' pointer. + +2.13.2.8 `bfd_get_arch' +....................... + +*Synopsis* + enum bfd_architecture bfd_get_arch (bfd *abfd); + *Description* +Return the enumerated type which describes the BFD ABFD's architecture. + +2.13.2.9 `bfd_get_mach' +....................... + +*Synopsis* + unsigned long bfd_get_mach (bfd *abfd); + *Description* +Return the long type which describes the BFD ABFD's machine. + +2.13.2.10 `bfd_arch_bits_per_byte' +.................................. + +*Synopsis* + unsigned int bfd_arch_bits_per_byte (bfd *abfd); + *Description* +Return the number of bits in one of the BFD ABFD's architecture's bytes. + +2.13.2.11 `bfd_arch_bits_per_address' +..................................... + +*Synopsis* + unsigned int bfd_arch_bits_per_address (bfd *abfd); + *Description* +Return the number of bits in one of the BFD ABFD's architecture's +addresses. + +2.13.2.12 `bfd_default_compatible' +.................................. + +*Synopsis* + const bfd_arch_info_type *bfd_default_compatible + (const bfd_arch_info_type *a, const bfd_arch_info_type *b); + *Description* +The default function for testing for compatibility. + +2.13.2.13 `bfd_default_scan' +............................ + +*Synopsis* + bfd_boolean bfd_default_scan + (const struct bfd_arch_info *info, const char *string); + *Description* +The default function for working out whether this is an architecture +hit and a machine hit. + +2.13.2.14 `bfd_get_arch_info' +............................. + +*Synopsis* + const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd); + *Description* +Return the architecture info struct in ABFD. + +2.13.2.15 `bfd_lookup_arch' +........................... + +*Synopsis* + const bfd_arch_info_type *bfd_lookup_arch + (enum bfd_architecture arch, unsigned long machine); + *Description* +Look for the architecture info structure which matches the arguments +ARCH and MACHINE. A machine of 0 matches the machine/architecture +structure which marks itself as the default. + +2.13.2.16 `bfd_printable_arch_mach' +................................... + +*Synopsis* + const char *bfd_printable_arch_mach + (enum bfd_architecture arch, unsigned long machine); + *Description* +Return a printable string representing the architecture and machine +type. + + This routine is depreciated. + +2.13.2.17 `bfd_octets_per_byte' +............................... + +*Synopsis* + unsigned int bfd_octets_per_byte (bfd *abfd); + *Description* +Return the number of octets (8-bit quantities) per target byte (minimum +addressable unit). In most cases, this will be one, but some DSP +targets have 16, 32, or even 48 bits per byte. + +2.13.2.18 `bfd_arch_mach_octets_per_byte' +......................................... + +*Synopsis* + unsigned int bfd_arch_mach_octets_per_byte + (enum bfd_architecture arch, unsigned long machine); + *Description* +See bfd_octets_per_byte. + + This routine is provided for those cases where a bfd * is not +available + + +File: bfd.info, Node: Opening and Closing, Next: Internal, Prev: Architectures, Up: BFD front end + + /* Set to N to open the next N BFDs using an alternate id space. */ + extern unsigned int bfd_use_reserved_id; + +2.14 Opening and closing BFDs +============================= + +2.14.1 Functions for opening and closing +---------------------------------------- + +2.14.1.1 `bfd_fopen' +.................... + +*Synopsis* + bfd *bfd_fopen (const char *filename, const char *target, + const char *mode, int fd); + *Description* +Open the file FILENAME with the target TARGET. Return a pointer to the +created BFD. If FD is not -1, then `fdopen' is used to open the file; +otherwise, `fopen' is used. MODE is passed directly to `fopen' or +`fdopen'. + + Calls `bfd_find_target', so TARGET is interpreted as by that +function. + + The new BFD is marked as cacheable iff FD is -1. + + If `NULL' is returned then an error has occured. Possible errors +are `bfd_error_no_memory', `bfd_error_invalid_target' or `system_call' +error. + +2.14.1.2 `bfd_openr' +.................... + +*Synopsis* + bfd *bfd_openr (const char *filename, const char *target); + *Description* +Open the file FILENAME (using `fopen') with the target TARGET. Return +a pointer to the created BFD. + + Calls `bfd_find_target', so TARGET is interpreted as by that +function. + + If `NULL' is returned then an error has occured. Possible errors +are `bfd_error_no_memory', `bfd_error_invalid_target' or `system_call' +error. + +2.14.1.3 `bfd_fdopenr' +...................... + +*Synopsis* + bfd *bfd_fdopenr (const char *filename, const char *target, int fd); + *Description* +`bfd_fdopenr' is to `bfd_fopenr' much like `fdopen' is to `fopen'. It +opens a BFD on a file already described by the FD supplied. + + When the file is later `bfd_close'd, the file descriptor will be +closed. If the caller desires that this file descriptor be cached by +BFD (opened as needed, closed as needed to free descriptors for other +opens), with the supplied FD used as an initial file descriptor (but +subject to closure at any time), call bfd_set_cacheable(bfd, 1) on the +returned BFD. The default is to assume no caching; the file descriptor +will remain open until `bfd_close', and will not be affected by BFD +operations on other files. + + Possible errors are `bfd_error_no_memory', +`bfd_error_invalid_target' and `bfd_error_system_call'. + +2.14.1.4 `bfd_openstreamr' +.......................... + +*Synopsis* + bfd *bfd_openstreamr (const char *, const char *, void *); + *Description* +Open a BFD for read access on an existing stdio stream. When the BFD +is passed to `bfd_close', the stream will be closed. + +2.14.1.5 `bfd_openr_iovec' +.......................... + +*Synopsis* + bfd *bfd_openr_iovec (const char *filename, const char *target, + void *(*open_func) (struct bfd *nbfd, + void *open_closure), + void *open_closure, + file_ptr (*pread_func) (struct bfd *nbfd, + void *stream, + void *buf, + file_ptr nbytes, + file_ptr offset), + int (*close_func) (struct bfd *nbfd, + void *stream), + int (*stat_func) (struct bfd *abfd, + void *stream, + struct stat *sb)); + *Description* +Create and return a BFD backed by a read-only STREAM. The STREAM is +created using OPEN_FUNC, accessed using PREAD_FUNC and destroyed using +CLOSE_FUNC. + + Calls `bfd_find_target', so TARGET is interpreted as by that +function. + + Calls OPEN_FUNC (which can call `bfd_zalloc' and `bfd_get_filename') +to obtain the read-only stream backing the BFD. OPEN_FUNC either +succeeds returning the non-`NULL' STREAM, or fails returning `NULL' +(setting `bfd_error'). + + Calls PREAD_FUNC to request NBYTES of data from STREAM starting at +OFFSET (e.g., via a call to `bfd_read'). PREAD_FUNC either succeeds +returning the number of bytes read (which can be less than NBYTES when +end-of-file), or fails returning -1 (setting `bfd_error'). + + Calls CLOSE_FUNC when the BFD is later closed using `bfd_close'. +CLOSE_FUNC either succeeds returning 0, or fails returning -1 (setting +`bfd_error'). + + Calls STAT_FUNC to fill in a stat structure for bfd_stat, +bfd_get_size, and bfd_get_mtime calls. STAT_FUNC returns 0 on success, +or returns -1 on failure (setting `bfd_error'). + + If `bfd_openr_iovec' returns `NULL' then an error has occurred. +Possible errors are `bfd_error_no_memory', `bfd_error_invalid_target' +and `bfd_error_system_call'. + +2.14.1.6 `bfd_openw' +.................... + +*Synopsis* + bfd *bfd_openw (const char *filename, const char *target); + *Description* +Create a BFD, associated with file FILENAME, using the file format +TARGET, and return a pointer to it. + + Possible errors are `bfd_error_system_call', `bfd_error_no_memory', +`bfd_error_invalid_target'. + +2.14.1.7 `bfd_close' +.................... + +*Synopsis* + bfd_boolean bfd_close (bfd *abfd); + *Description* +Close a BFD. If the BFD was open for writing, then pending operations +are completed and the file written out and closed. If the created file +is executable, then `chmod' is called to mark it as such. + + All memory attached to the BFD is released. + + The file descriptor associated with the BFD is closed (even if it +was passed in to BFD by `bfd_fdopenr'). + + *Returns* +`TRUE' is returned if all is ok, otherwise `FALSE'. + +2.14.1.8 `bfd_close_all_done' +............................. + +*Synopsis* + bfd_boolean bfd_close_all_done (bfd *); + *Description* +Close a BFD. Differs from `bfd_close' since it does not complete any +pending operations. This routine would be used if the application had +just used BFD for swapping and didn't want to use any of the writing +code. + + If the created file is executable, then `chmod' is called to mark it +as such. + + All memory attached to the BFD is released. + + *Returns* +`TRUE' is returned if all is ok, otherwise `FALSE'. + +2.14.1.9 `bfd_create' +..................... + +*Synopsis* + bfd *bfd_create (const char *filename, bfd *templ); + *Description* +Create a new BFD in the manner of `bfd_openw', but without opening a +file. The new BFD takes the target from the target used by TEMPL. The +format is always set to `bfd_object'. + +2.14.1.10 `bfd_make_writable' +............................. + +*Synopsis* + bfd_boolean bfd_make_writable (bfd *abfd); + *Description* +Takes a BFD as created by `bfd_create' and converts it into one like as +returned by `bfd_openw'. It does this by converting the BFD to +BFD_IN_MEMORY. It's assumed that you will call `bfd_make_readable' on +this bfd later. + + *Returns* +`TRUE' is returned if all is ok, otherwise `FALSE'. + +2.14.1.11 `bfd_make_readable' +............................. + +*Synopsis* + bfd_boolean bfd_make_readable (bfd *abfd); + *Description* +Takes a BFD as created by `bfd_create' and `bfd_make_writable' and +converts it into one like as returned by `bfd_openr'. It does this by +writing the contents out to the memory buffer, then reversing the +direction. + + *Returns* +`TRUE' is returned if all is ok, otherwise `FALSE'. + +2.14.1.12 `bfd_alloc' +..................... + +*Synopsis* + void *bfd_alloc (bfd *abfd, bfd_size_type wanted); + *Description* +Allocate a block of WANTED bytes of memory attached to `abfd' and +return a pointer to it. + +2.14.1.13 `bfd_alloc2' +...................... + +*Synopsis* + void *bfd_alloc2 (bfd *abfd, bfd_size_type nmemb, bfd_size_type size); + *Description* +Allocate a block of NMEMB elements of SIZE bytes each of memory +attached to `abfd' and return a pointer to it. + +2.14.1.14 `bfd_zalloc' +...................... + +*Synopsis* + void *bfd_zalloc (bfd *abfd, bfd_size_type wanted); + *Description* +Allocate a block of WANTED bytes of zeroed memory attached to `abfd' +and return a pointer to it. + +2.14.1.15 `bfd_zalloc2' +....................... + +*Synopsis* + void *bfd_zalloc2 (bfd *abfd, bfd_size_type nmemb, bfd_size_type size); + *Description* +Allocate a block of NMEMB elements of SIZE bytes each of zeroed memory +attached to `abfd' and return a pointer to it. + +2.14.1.16 `bfd_calc_gnu_debuglink_crc32' +........................................ + +*Synopsis* + unsigned long bfd_calc_gnu_debuglink_crc32 + (unsigned long crc, const unsigned char *buf, bfd_size_type len); + *Description* +Computes a CRC value as used in the .gnu_debuglink section. Advances +the previously computed CRC value by computing and adding in the crc32 +for LEN bytes of BUF. + + *Returns* +Return the updated CRC32 value. + +2.14.1.17 `get_debug_link_info' +............................... + +*Synopsis* + char *get_debug_link_info (bfd *abfd, unsigned long *crc32_out); + *Description* +fetch the filename and CRC32 value for any separate debuginfo +associated with ABFD. Return NULL if no such info found, otherwise +return filename and update CRC32_OUT. + +2.14.1.18 `separate_debug_file_exists' +...................................... + +*Synopsis* + bfd_boolean separate_debug_file_exists + (char *name, unsigned long crc32); + *Description* +Checks to see if NAME is a file and if its contents match CRC32. + +2.14.1.19 `find_separate_debug_file' +.................................... + +*Synopsis* + char *find_separate_debug_file (bfd *abfd); + *Description* +Searches ABFD for a reference to separate debugging information, scans +various locations in the filesystem, including the file tree rooted at +DEBUG_FILE_DIRECTORY, and returns a filename of such debugging +information if the file is found and has matching CRC32. Returns NULL +if no reference to debugging file exists, or file cannot be found. + +2.14.1.20 `bfd_follow_gnu_debuglink' +.................................... + +*Synopsis* + char *bfd_follow_gnu_debuglink (bfd *abfd, const char *dir); + *Description* +Takes a BFD and searches it for a .gnu_debuglink section. If this +section is found, it examines the section for the name and checksum of +a '.debug' file containing auxiliary debugging information. It then +searches the filesystem for this .debug file in some standard +locations, including the directory tree rooted at DIR, and if found +returns the full filename. + + If DIR is NULL, it will search a default path configured into libbfd +at build time. [XXX this feature is not currently implemented]. + + *Returns* +`NULL' on any errors or failure to locate the .debug file, otherwise a +pointer to a heap-allocated string containing the filename. The caller +is responsible for freeing this string. + +2.14.1.21 `bfd_create_gnu_debuglink_section' +............................................ + +*Synopsis* + struct bfd_section *bfd_create_gnu_debuglink_section + (bfd *abfd, const char *filename); + *Description* +Takes a BFD and adds a .gnu_debuglink section to it. The section is +sized to be big enough to contain a link to the specified FILENAME. + + *Returns* +A pointer to the new section is returned if all is ok. Otherwise +`NULL' is returned and bfd_error is set. + +2.14.1.22 `bfd_fill_in_gnu_debuglink_section' +............................................. + +*Synopsis* + bfd_boolean bfd_fill_in_gnu_debuglink_section + (bfd *abfd, struct bfd_section *sect, const char *filename); + *Description* +Takes a BFD and containing a .gnu_debuglink section SECT and fills in +the contents of the section to contain a link to the specified +FILENAME. The filename should be relative to the current directory. + + *Returns* +`TRUE' is returned if all is ok. Otherwise `FALSE' is returned and +bfd_error is set. + + +File: bfd.info, Node: Internal, Next: File Caching, Prev: Opening and Closing, Up: BFD front end + +2.15 Implementation details +=========================== + +2.15.1 Internal functions +------------------------- + +*Description* +These routines are used within BFD. They are not intended for export, +but are documented here for completeness. + +2.15.1.1 `bfd_write_bigendian_4byte_int' +........................................ + +*Synopsis* + bfd_boolean bfd_write_bigendian_4byte_int (bfd *, unsigned int); + *Description* +Write a 4 byte integer I to the output BFD ABFD, in big endian order +regardless of what else is going on. This is useful in archives. + +2.15.1.2 `bfd_put_size' +....................... + +2.15.1.3 `bfd_get_size' +....................... + +*Description* +These macros as used for reading and writing raw data in sections; each +access (except for bytes) is vectored through the target format of the +BFD and mangled accordingly. The mangling performs any necessary endian +translations and removes alignment restrictions. Note that types +accepted and returned by these macros are identical so they can be +swapped around in macros--for example, `libaout.h' defines `GET_WORD' +to either `bfd_get_32' or `bfd_get_64'. + + In the put routines, VAL must be a `bfd_vma'. If we are on a system +without prototypes, the caller is responsible for making sure that is +true, with a cast if necessary. We don't cast them in the macro +definitions because that would prevent `lint' or `gcc -Wall' from +detecting sins such as passing a pointer. To detect calling these with +less than a `bfd_vma', use `gcc -Wconversion' on a host with 64 bit +`bfd_vma''s. + + /* Byte swapping macros for user section data. */ + + #define bfd_put_8(abfd, val, ptr) \ + ((void) (*((unsigned char *) (ptr)) = (val) & 0xff)) + #define bfd_put_signed_8 \ + bfd_put_8 + #define bfd_get_8(abfd, ptr) \ + (*(const unsigned char *) (ptr) & 0xff) + #define bfd_get_signed_8(abfd, ptr) \ + (((*(const unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80) + + #define bfd_put_16(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_putx16, ((val),(ptr))) + #define bfd_put_signed_16 \ + bfd_put_16 + #define bfd_get_16(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx16, (ptr)) + #define bfd_get_signed_16(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx_signed_16, (ptr)) + + #define bfd_put_32(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_putx32, ((val),(ptr))) + #define bfd_put_signed_32 \ + bfd_put_32 + #define bfd_get_32(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx32, (ptr)) + #define bfd_get_signed_32(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx_signed_32, (ptr)) + + #define bfd_put_64(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_putx64, ((val), (ptr))) + #define bfd_put_signed_64 \ + bfd_put_64 + #define bfd_get_64(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx64, (ptr)) + #define bfd_get_signed_64(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx_signed_64, (ptr)) + + #define bfd_get(bits, abfd, ptr) \ + ((bits) == 8 ? (bfd_vma) bfd_get_8 (abfd, ptr) \ + : (bits) == 16 ? bfd_get_16 (abfd, ptr) \ + : (bits) == 32 ? bfd_get_32 (abfd, ptr) \ + : (bits) == 64 ? bfd_get_64 (abfd, ptr) \ + : (abort (), (bfd_vma) - 1)) + + #define bfd_put(bits, abfd, val, ptr) \ + ((bits) == 8 ? bfd_put_8 (abfd, val, ptr) \ + : (bits) == 16 ? bfd_put_16 (abfd, val, ptr) \ + : (bits) == 32 ? bfd_put_32 (abfd, val, ptr) \ + : (bits) == 64 ? bfd_put_64 (abfd, val, ptr) \ + : (abort (), (void) 0)) + +2.15.1.4 `bfd_h_put_size' +......................... + +*Description* +These macros have the same function as their `bfd_get_x' brethren, +except that they are used for removing information for the header +records of object files. Believe it or not, some object files keep +their header records in big endian order and their data in little +endian order. + + /* Byte swapping macros for file header data. */ + + #define bfd_h_put_8(abfd, val, ptr) \ + bfd_put_8 (abfd, val, ptr) + #define bfd_h_put_signed_8(abfd, val, ptr) \ + bfd_put_8 (abfd, val, ptr) + #define bfd_h_get_8(abfd, ptr) \ + bfd_get_8 (abfd, ptr) + #define bfd_h_get_signed_8(abfd, ptr) \ + bfd_get_signed_8 (abfd, ptr) + + #define bfd_h_put_16(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_h_putx16, (val, ptr)) + #define bfd_h_put_signed_16 \ + bfd_h_put_16 + #define bfd_h_get_16(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx16, (ptr)) + #define bfd_h_get_signed_16(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx_signed_16, (ptr)) + + #define bfd_h_put_32(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_h_putx32, (val, ptr)) + #define bfd_h_put_signed_32 \ + bfd_h_put_32 + #define bfd_h_get_32(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx32, (ptr)) + #define bfd_h_get_signed_32(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx_signed_32, (ptr)) + + #define bfd_h_put_64(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_h_putx64, (val, ptr)) + #define bfd_h_put_signed_64 \ + bfd_h_put_64 + #define bfd_h_get_64(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx64, (ptr)) + #define bfd_h_get_signed_64(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx_signed_64, (ptr)) + + /* Aliases for the above, which should eventually go away. */ + + #define H_PUT_64 bfd_h_put_64 + #define H_PUT_32 bfd_h_put_32 + #define H_PUT_16 bfd_h_put_16 + #define H_PUT_8 bfd_h_put_8 + #define H_PUT_S64 bfd_h_put_signed_64 + #define H_PUT_S32 bfd_h_put_signed_32 + #define H_PUT_S16 bfd_h_put_signed_16 + #define H_PUT_S8 bfd_h_put_signed_8 + #define H_GET_64 bfd_h_get_64 + #define H_GET_32 bfd_h_get_32 + #define H_GET_16 bfd_h_get_16 + #define H_GET_8 bfd_h_get_8 + #define H_GET_S64 bfd_h_get_signed_64 + #define H_GET_S32 bfd_h_get_signed_32 + #define H_GET_S16 bfd_h_get_signed_16 + #define H_GET_S8 bfd_h_get_signed_8 + +2.15.1.5 `bfd_log2' +................... + +*Synopsis* + unsigned int bfd_log2 (bfd_vma x); + *Description* +Return the log base 2 of the value supplied, rounded up. E.g., an X of +1025 returns 11. A X of 0 returns 0. + + +File: bfd.info, Node: File Caching, Next: Linker Functions, Prev: Internal, Up: BFD front end + +2.16 File caching +================= + +The file caching mechanism is embedded within BFD and allows the +application to open as many BFDs as it wants without regard to the +underlying operating system's file descriptor limit (often as low as 20 +open files). The module in `cache.c' maintains a least recently used +list of `BFD_CACHE_MAX_OPEN' files, and exports the name +`bfd_cache_lookup', which runs around and makes sure that the required +BFD is open. If not, then it chooses a file to close, closes it and +opens the one wanted, returning its file handle. + +2.16.1 Caching functions +------------------------ + +2.16.1.1 `bfd_cache_init' +......................... + +*Synopsis* + bfd_boolean bfd_cache_init (bfd *abfd); + *Description* +Add a newly opened BFD to the cache. + +2.16.1.2 `bfd_cache_close' +.......................... + +*Synopsis* + bfd_boolean bfd_cache_close (bfd *abfd); + *Description* +Remove the BFD ABFD from the cache. If the attached file is open, then +close it too. + + *Returns* +`FALSE' is returned if closing the file fails, `TRUE' is returned if +all is well. + +2.16.1.3 `bfd_cache_close_all' +.............................. + +*Synopsis* + bfd_boolean bfd_cache_close_all (void); + *Description* +Remove all BFDs from the cache. If the attached file is open, then +close it too. + + *Returns* +`FALSE' is returned if closing one of the file fails, `TRUE' is +returned if all is well. + +2.16.1.4 `bfd_open_file' +........................ + +*Synopsis* + FILE* bfd_open_file (bfd *abfd); + *Description* +Call the OS to open a file for ABFD. Return the `FILE *' (possibly +`NULL') that results from this operation. Set up the BFD so that +future accesses know the file is open. If the `FILE *' returned is +`NULL', then it won't have been put in the cache, so it won't have to +be removed from it. + + +File: bfd.info, Node: Linker Functions, Next: Hash Tables, Prev: File Caching, Up: BFD front end + +2.17 Linker Functions +===================== + +The linker uses three special entry points in the BFD target vector. +It is not necessary to write special routines for these entry points +when creating a new BFD back end, since generic versions are provided. +However, writing them can speed up linking and make it use +significantly less runtime memory. + + The first routine creates a hash table used by the other routines. +The second routine adds the symbols from an object file to the hash +table. The third routine takes all the object files and links them +together to create the output file. These routines are designed so +that the linker proper does not need to know anything about the symbols +in the object files that it is linking. The linker merely arranges the +sections as directed by the linker script and lets BFD handle the +details of symbols and relocs. + + The second routine and third routines are passed a pointer to a +`struct bfd_link_info' structure (defined in `bfdlink.h') which holds +information relevant to the link, including the linker hash table +(which was created by the first routine) and a set of callback +functions to the linker proper. + + The generic linker routines are in `linker.c', and use the header +file `genlink.h'. As of this writing, the only back ends which have +implemented versions of these routines are a.out (in `aoutx.h') and +ECOFF (in `ecoff.c'). The a.out routines are used as examples +throughout this section. + +* Menu: + +* Creating a Linker Hash Table:: +* Adding Symbols to the Hash Table:: +* Performing the Final Link:: + + +File: bfd.info, Node: Creating a Linker Hash Table, Next: Adding Symbols to the Hash Table, Prev: Linker Functions, Up: Linker Functions + +2.17.1 Creating a linker hash table +----------------------------------- + +The linker routines must create a hash table, which must be derived +from `struct bfd_link_hash_table' described in `bfdlink.c'. *Note Hash +Tables::, for information on how to create a derived hash table. This +entry point is called using the target vector of the linker output file. + + The `_bfd_link_hash_table_create' entry point must allocate and +initialize an instance of the desired hash table. If the back end does +not require any additional information to be stored with the entries in +the hash table, the entry point may simply create a `struct +bfd_link_hash_table'. Most likely, however, some additional +information will be needed. + + For example, with each entry in the hash table the a.out linker +keeps the index the symbol has in the final output file (this index +number is used so that when doing a relocatable link the symbol index +used in the output file can be quickly filled in when copying over a +reloc). The a.out linker code defines the required structures and +functions for a hash table derived from `struct bfd_link_hash_table'. +The a.out linker hash table is created by the function +`NAME(aout,link_hash_table_create)'; it simply allocates space for the +hash table, initializes it, and returns a pointer to it. + + When writing the linker routines for a new back end, you will +generally not know exactly which fields will be required until you have +finished. You should simply create a new hash table which defines no +additional fields, and then simply add fields as they become necessary. + + +File: bfd.info, Node: Adding Symbols to the Hash Table, Next: Performing the Final Link, Prev: Creating a Linker Hash Table, Up: Linker Functions + +2.17.2 Adding symbols to the hash table +--------------------------------------- + +The linker proper will call the `_bfd_link_add_symbols' entry point for +each object file or archive which is to be linked (typically these are +the files named on the command line, but some may also come from the +linker script). The entry point is responsible for examining the file. +For an object file, BFD must add any relevant symbol information to +the hash table. For an archive, BFD must determine which elements of +the archive should be used and adding them to the link. + + The a.out version of this entry point is +`NAME(aout,link_add_symbols)'. + +* Menu: + +* Differing file formats:: +* Adding symbols from an object file:: +* Adding symbols from an archive:: + + +File: bfd.info, Node: Differing file formats, Next: Adding symbols from an object file, Prev: Adding Symbols to the Hash Table, Up: Adding Symbols to the Hash Table + +2.17.2.1 Differing file formats +............................... + +Normally all the files involved in a link will be of the same format, +but it is also possible to link together different format object files, +and the back end must support that. The `_bfd_link_add_symbols' entry +point is called via the target vector of the file to be added. This +has an important consequence: the function may not assume that the hash +table is the type created by the corresponding +`_bfd_link_hash_table_create' vector. All the `_bfd_link_add_symbols' +function can assume about the hash table is that it is derived from +`struct bfd_link_hash_table'. + + Sometimes the `_bfd_link_add_symbols' function must store some +information in the hash table entry to be used by the `_bfd_final_link' +function. In such a case the output bfd xvec must be checked to make +sure that the hash table was created by an object file of the same +format. + + The `_bfd_final_link' routine must be prepared to handle a hash +entry without any extra information added by the +`_bfd_link_add_symbols' function. A hash entry without extra +information will also occur when the linker script directs the linker +to create a symbol. Note that, regardless of how a hash table entry is +added, all the fields will be initialized to some sort of null value by +the hash table entry initialization function. + + See `ecoff_link_add_externals' for an example of how to check the +output bfd before saving information (in this case, the ECOFF external +symbol debugging information) in a hash table entry. + + +File: bfd.info, Node: Adding symbols from an object file, Next: Adding symbols from an archive, Prev: Differing file formats, Up: Adding Symbols to the Hash Table + +2.17.2.2 Adding symbols from an object file +........................................... + +When the `_bfd_link_add_symbols' routine is passed an object file, it +must add all externally visible symbols in that object file to the hash +table. The actual work of adding the symbol to the hash table is +normally handled by the function `_bfd_generic_link_add_one_symbol'. +The `_bfd_link_add_symbols' routine is responsible for reading all the +symbols from the object file and passing the correct information to +`_bfd_generic_link_add_one_symbol'. + + The `_bfd_link_add_symbols' routine should not use +`bfd_canonicalize_symtab' to read the symbols. The point of providing +this routine is to avoid the overhead of converting the symbols into +generic `asymbol' structures. + + `_bfd_generic_link_add_one_symbol' handles the details of combining +common symbols, warning about multiple definitions, and so forth. It +takes arguments which describe the symbol to add, notably symbol flags, +a section, and an offset. The symbol flags include such things as +`BSF_WEAK' or `BSF_INDIRECT'. The section is a section in the object +file, or something like `bfd_und_section_ptr' for an undefined symbol +or `bfd_com_section_ptr' for a common symbol. + + If the `_bfd_final_link' routine is also going to need to read the +symbol information, the `_bfd_link_add_symbols' routine should save it +somewhere attached to the object file BFD. However, the information +should only be saved if the `keep_memory' field of the `info' argument +is TRUE, so that the `-no-keep-memory' linker switch is effective. + + The a.out function which adds symbols from an object file is +`aout_link_add_object_symbols', and most of the interesting work is in +`aout_link_add_symbols'. The latter saves pointers to the hash tables +entries created by `_bfd_generic_link_add_one_symbol' indexed by symbol +number, so that the `_bfd_final_link' routine does not have to call the +hash table lookup routine to locate the entry. + + +File: bfd.info, Node: Adding symbols from an archive, Prev: Adding symbols from an object file, Up: Adding Symbols to the Hash Table + +2.17.2.3 Adding symbols from an archive +....................................... + +When the `_bfd_link_add_symbols' routine is passed an archive, it must +look through the symbols defined by the archive and decide which +elements of the archive should be included in the link. For each such +element it must call the `add_archive_element' linker callback, and it +must add the symbols from the object file to the linker hash table. +(The callback may in fact indicate that a replacement BFD should be +used, in which case the symbols from that BFD should be added to the +linker hash table instead.) + + In most cases the work of looking through the symbols in the archive +should be done by the `_bfd_generic_link_add_archive_symbols' function. +This function builds a hash table from the archive symbol table and +looks through the list of undefined symbols to see which elements +should be included. `_bfd_generic_link_add_archive_symbols' is passed +a function to call to make the final decision about adding an archive +element to the link and to do the actual work of adding the symbols to +the linker hash table. + + The function passed to `_bfd_generic_link_add_archive_symbols' must +read the symbols of the archive element and decide whether the archive +element should be included in the link. If the element is to be +included, the `add_archive_element' linker callback routine must be +called with the element as an argument, and the element's symbols must +be added to the linker hash table just as though the element had itself +been passed to the `_bfd_link_add_symbols' function. The +`add_archive_element' callback has the option to indicate that it would +like to replace the element archive with a substitute BFD, in which +case it is the symbols of that substitute BFD that must be added to the +linker hash table instead. + + When the a.out `_bfd_link_add_symbols' function receives an archive, +it calls `_bfd_generic_link_add_archive_symbols' passing +`aout_link_check_archive_element' as the function argument. +`aout_link_check_archive_element' calls `aout_link_check_ar_symbols'. +If the latter decides to add the element (an element is only added if +it provides a real, non-common, definition for a previously undefined +or common symbol) it calls the `add_archive_element' callback and then +`aout_link_check_archive_element' calls `aout_link_add_symbols' to +actually add the symbols to the linker hash table - possibly those of a +substitute BFD, if the `add_archive_element' callback avails itself of +that option. + + The ECOFF back end is unusual in that it does not normally call +`_bfd_generic_link_add_archive_symbols', because ECOFF archives already +contain a hash table of symbols. The ECOFF back end searches the +archive itself to avoid the overhead of creating a new hash table. + + +File: bfd.info, Node: Performing the Final Link, Prev: Adding Symbols to the Hash Table, Up: Linker Functions + +2.17.3 Performing the final link +-------------------------------- + +When all the input files have been processed, the linker calls the +`_bfd_final_link' entry point of the output BFD. This routine is +responsible for producing the final output file, which has several +aspects. It must relocate the contents of the input sections and copy +the data into the output sections. It must build an output symbol +table including any local symbols from the input files and the global +symbols from the hash table. When producing relocatable output, it must +modify the input relocs and write them into the output file. There may +also be object format dependent work to be done. + + The linker will also call the `write_object_contents' entry point +when the BFD is closed. The two entry points must work together in +order to produce the correct output file. + + The details of how this works are inevitably dependent upon the +specific object file format. The a.out `_bfd_final_link' routine is +`NAME(aout,final_link)'. + +* Menu: + +* Information provided by the linker:: +* Relocating the section contents:: +* Writing the symbol table:: + + +File: bfd.info, Node: Information provided by the linker, Next: Relocating the section contents, Prev: Performing the Final Link, Up: Performing the Final Link + +2.17.3.1 Information provided by the linker +........................................... + +Before the linker calls the `_bfd_final_link' entry point, it sets up +some data structures for the function to use. + + The `input_bfds' field of the `bfd_link_info' structure will point +to a list of all the input files included in the link. These files are +linked through the `link_next' field of the `bfd' structure. + + Each section in the output file will have a list of `link_order' +structures attached to the `map_head.link_order' field (the +`link_order' structure is defined in `bfdlink.h'). These structures +describe how to create the contents of the output section in terms of +the contents of various input sections, fill constants, and, +eventually, other types of information. They also describe relocs that +must be created by the BFD backend, but do not correspond to any input +file; this is used to support -Ur, which builds constructors while +generating a relocatable object file. + + +File: bfd.info, Node: Relocating the section contents, Next: Writing the symbol table, Prev: Information provided by the linker, Up: Performing the Final Link + +2.17.3.2 Relocating the section contents +........................................ + +The `_bfd_final_link' function should look through the `link_order' +structures attached to each section of the output file. Each +`link_order' structure should either be handled specially, or it should +be passed to the function `_bfd_default_link_order' which will do the +right thing (`_bfd_default_link_order' is defined in `linker.c'). + + For efficiency, a `link_order' of type `bfd_indirect_link_order' +whose associated section belongs to a BFD of the same format as the +output BFD must be handled specially. This type of `link_order' +describes part of an output section in terms of a section belonging to +one of the input files. The `_bfd_final_link' function should read the +contents of the section and any associated relocs, apply the relocs to +the section contents, and write out the modified section contents. If +performing a relocatable link, the relocs themselves must also be +modified and written out. + + The functions `_bfd_relocate_contents' and +`_bfd_final_link_relocate' provide some general support for performing +the actual relocations, notably overflow checking. Their arguments +include information about the symbol the relocation is against and a +`reloc_howto_type' argument which describes the relocation to perform. +These functions are defined in `reloc.c'. + + The a.out function which handles reading, relocating, and writing +section contents is `aout_link_input_section'. The actual relocation +is done in `aout_link_input_section_std' and +`aout_link_input_section_ext'. + + +File: bfd.info, Node: Writing the symbol table, Prev: Relocating the section contents, Up: Performing the Final Link + +2.17.3.3 Writing the symbol table +................................. + +The `_bfd_final_link' function must gather all the symbols in the input +files and write them out. It must also write out all the symbols in +the global hash table. This must be controlled by the `strip' and +`discard' fields of the `bfd_link_info' structure. + + The local symbols of the input files will not have been entered into +the linker hash table. The `_bfd_final_link' routine must consider +each input file and include the symbols in the output file. It may be +convenient to do this when looking through the `link_order' structures, +or it may be done by stepping through the `input_bfds' list. + + The `_bfd_final_link' routine must also traverse the global hash +table to gather all the externally visible symbols. It is possible +that most of the externally visible symbols may be written out when +considering the symbols of each input file, but it is still necessary +to traverse the hash table since the linker script may have defined +some symbols that are not in any of the input files. + + The `strip' field of the `bfd_link_info' structure controls which +symbols are written out. The possible values are listed in +`bfdlink.h'. If the value is `strip_some', then the `keep_hash' field +of the `bfd_link_info' structure is a hash table of symbols to keep; +each symbol should be looked up in this hash table, and only symbols +which are present should be included in the output file. + + If the `strip' field of the `bfd_link_info' structure permits local +symbols to be written out, the `discard' field is used to further +controls which local symbols are included in the output file. If the +value is `discard_l', then all local symbols which begin with a certain +prefix are discarded; this is controlled by the +`bfd_is_local_label_name' entry point. + + The a.out backend handles symbols by calling +`aout_link_write_symbols' on each input BFD and then traversing the +global hash table with the function `aout_link_write_other_symbol'. It +builds a string table while writing out the symbols, which is written +to the output file at the end of `NAME(aout,final_link)'. + +2.17.3.4 `bfd_link_split_section' +................................. + +*Synopsis* + bfd_boolean bfd_link_split_section (bfd *abfd, asection *sec); + *Description* +Return nonzero if SEC should be split during a reloceatable or final +link. + #define bfd_link_split_section(abfd, sec) \ + BFD_SEND (abfd, _bfd_link_split_section, (abfd, sec)) + +2.17.3.5 `bfd_section_already_linked' +..................................... + +*Synopsis* + bfd_boolean bfd_section_already_linked (bfd *abfd, + asection *sec, + struct bfd_link_info *info); + *Description* +Check if DATA has been already linked during a reloceatable or final +link. Return TRUE if it has. + #define bfd_section_already_linked(abfd, sec, info) \ + BFD_SEND (abfd, _section_already_linked, (abfd, sec, info)) + +2.17.3.6 `bfd_generic_define_common_symbol' +........................................... + +*Synopsis* + bfd_boolean bfd_generic_define_common_symbol + (bfd *output_bfd, struct bfd_link_info *info, + struct bfd_link_hash_entry *h); + *Description* +Convert common symbol H into a defined symbol. Return TRUE on success +and FALSE on failure. + #define bfd_define_common_symbol(output_bfd, info, h) \ + BFD_SEND (output_bfd, _bfd_define_common_symbol, (output_bfd, info, h)) + +2.17.3.7 `bfd_find_version_for_sym ' +.................................... + +*Synopsis* + struct bfd_elf_version_tree * bfd_find_version_for_sym + (struct bfd_elf_version_tree *verdefs, + const char *sym_name, bfd_boolean *hide); + *Description* +Search an elf version script tree for symbol versioning info and export +/ don't-export status for a given symbol. Return non-NULL on success +and NULL on failure; also sets the output `hide' boolean parameter. + +2.17.3.8 `bfd_hide_sym_by_version' +.................................. + +*Synopsis* + bfd_boolean bfd_hide_sym_by_version + (struct bfd_elf_version_tree *verdefs, const char *sym_name); + *Description* +Search an elf version script tree for symbol versioning info for a +given symbol. Return TRUE if the symbol is hidden. + + +File: bfd.info, Node: Hash Tables, Prev: Linker Functions, Up: BFD front end + +2.18 Hash Tables +================ + +BFD provides a simple set of hash table functions. Routines are +provided to initialize a hash table, to free a hash table, to look up a +string in a hash table and optionally create an entry for it, and to +traverse a hash table. There is currently no routine to delete an +string from a hash table. + + The basic hash table does not permit any data to be stored with a +string. However, a hash table is designed to present a base class from +which other types of hash tables may be derived. These derived types +may store additional information with the string. Hash tables were +implemented in this way, rather than simply providing a data pointer in +a hash table entry, because they were designed for use by the linker +back ends. The linker may create thousands of hash table entries, and +the overhead of allocating private data and storing and following +pointers becomes noticeable. + + The basic hash table code is in `hash.c'. + +* Menu: + +* Creating and Freeing a Hash Table:: +* Looking Up or Entering a String:: +* Traversing a Hash Table:: +* Deriving a New Hash Table Type:: + + +File: bfd.info, Node: Creating and Freeing a Hash Table, Next: Looking Up or Entering a String, Prev: Hash Tables, Up: Hash Tables + +2.18.1 Creating and freeing a hash table +---------------------------------------- + +To create a hash table, create an instance of a `struct bfd_hash_table' +(defined in `bfd.h') and call `bfd_hash_table_init' (if you know +approximately how many entries you will need, the function +`bfd_hash_table_init_n', which takes a SIZE argument, may be used). +`bfd_hash_table_init' returns `FALSE' if some sort of error occurs. + + The function `bfd_hash_table_init' take as an argument a function to +use to create new entries. For a basic hash table, use the function +`bfd_hash_newfunc'. *Note Deriving a New Hash Table Type::, for why +you would want to use a different value for this argument. + + `bfd_hash_table_init' will create an objalloc which will be used to +allocate new entries. You may allocate memory on this objalloc using +`bfd_hash_allocate'. + + Use `bfd_hash_table_free' to free up all the memory that has been +allocated for a hash table. This will not free up the `struct +bfd_hash_table' itself, which you must provide. + + Use `bfd_hash_set_default_size' to set the default size of hash +table to use. + + +File: bfd.info, Node: Looking Up or Entering a String, Next: Traversing a Hash Table, Prev: Creating and Freeing a Hash Table, Up: Hash Tables + +2.18.2 Looking up or entering a string +-------------------------------------- + +The function `bfd_hash_lookup' is used both to look up a string in the +hash table and to create a new entry. + + If the CREATE argument is `FALSE', `bfd_hash_lookup' will look up a +string. If the string is found, it will returns a pointer to a `struct +bfd_hash_entry'. If the string is not found in the table +`bfd_hash_lookup' will return `NULL'. You should not modify any of the +fields in the returns `struct bfd_hash_entry'. + + If the CREATE argument is `TRUE', the string will be entered into +the hash table if it is not already there. Either way a pointer to a +`struct bfd_hash_entry' will be returned, either to the existing +structure or to a newly created one. In this case, a `NULL' return +means that an error occurred. + + If the CREATE argument is `TRUE', and a new entry is created, the +COPY argument is used to decide whether to copy the string onto the +hash table objalloc or not. If COPY is passed as `FALSE', you must be +careful not to deallocate or modify the string as long as the hash table +exists. + + +File: bfd.info, Node: Traversing a Hash Table, Next: Deriving a New Hash Table Type, Prev: Looking Up or Entering a String, Up: Hash Tables + +2.18.3 Traversing a hash table +------------------------------ + +The function `bfd_hash_traverse' may be used to traverse a hash table, +calling a function on each element. The traversal is done in a random +order. + + `bfd_hash_traverse' takes as arguments a function and a generic +`void *' pointer. The function is called with a hash table entry (a +`struct bfd_hash_entry *') and the generic pointer passed to +`bfd_hash_traverse'. The function must return a `boolean' value, which +indicates whether to continue traversing the hash table. If the +function returns `FALSE', `bfd_hash_traverse' will stop the traversal +and return immediately. + + +File: bfd.info, Node: Deriving a New Hash Table Type, Prev: Traversing a Hash Table, Up: Hash Tables + +2.18.4 Deriving a new hash table type +------------------------------------- + +Many uses of hash tables want to store additional information which +each entry in the hash table. Some also find it convenient to store +additional information with the hash table itself. This may be done +using a derived hash table. + + Since C is not an object oriented language, creating a derived hash +table requires sticking together some boilerplate routines with a few +differences specific to the type of hash table you want to create. + + An example of a derived hash table is the linker hash table. The +structures for this are defined in `bfdlink.h'. The functions are in +`linker.c'. + + You may also derive a hash table from an already derived hash table. +For example, the a.out linker backend code uses a hash table derived +from the linker hash table. + +* Menu: + +* Define the Derived Structures:: +* Write the Derived Creation Routine:: +* Write Other Derived Routines:: + + +File: bfd.info, Node: Define the Derived Structures, Next: Write the Derived Creation Routine, Prev: Deriving a New Hash Table Type, Up: Deriving a New Hash Table Type + +2.18.4.1 Define the derived structures +...................................... + +You must define a structure for an entry in the hash table, and a +structure for the hash table itself. + + The first field in the structure for an entry in the hash table must +be of the type used for an entry in the hash table you are deriving +from. If you are deriving from a basic hash table this is `struct +bfd_hash_entry', which is defined in `bfd.h'. The first field in the +structure for the hash table itself must be of the type of the hash +table you are deriving from itself. If you are deriving from a basic +hash table, this is `struct bfd_hash_table'. + + For example, the linker hash table defines `struct +bfd_link_hash_entry' (in `bfdlink.h'). The first field, `root', is of +type `struct bfd_hash_entry'. Similarly, the first field in `struct +bfd_link_hash_table', `table', is of type `struct bfd_hash_table'. + + +File: bfd.info, Node: Write the Derived Creation Routine, Next: Write Other Derived Routines, Prev: Define the Derived Structures, Up: Deriving a New Hash Table Type + +2.18.4.2 Write the derived creation routine +........................................... + +You must write a routine which will create and initialize an entry in +the hash table. This routine is passed as the function argument to +`bfd_hash_table_init'. + + In order to permit other hash tables to be derived from the hash +table you are creating, this routine must be written in a standard way. + + The first argument to the creation routine is a pointer to a hash +table entry. This may be `NULL', in which case the routine should +allocate the right amount of space. Otherwise the space has already +been allocated by a hash table type derived from this one. + + After allocating space, the creation routine must call the creation +routine of the hash table type it is derived from, passing in a pointer +to the space it just allocated. This will initialize any fields used +by the base hash table. + + Finally the creation routine must initialize any local fields for +the new hash table type. + + Here is a boilerplate example of a creation routine. FUNCTION_NAME +is the name of the routine. ENTRY_TYPE is the type of an entry in the +hash table you are creating. BASE_NEWFUNC is the name of the creation +routine of the hash table type your hash table is derived from. + + struct bfd_hash_entry * + FUNCTION_NAME (struct bfd_hash_entry *entry, + struct bfd_hash_table *table, + const char *string) + { + struct ENTRY_TYPE *ret = (ENTRY_TYPE *) entry; + + /* Allocate the structure if it has not already been allocated by a + derived class. */ + if (ret == NULL) + { + ret = bfd_hash_allocate (table, sizeof (* ret)); + if (ret == NULL) + return NULL; + } + + /* Call the allocation method of the base class. */ + ret = ((ENTRY_TYPE *) + BASE_NEWFUNC ((struct bfd_hash_entry *) ret, table, string)); + + /* Initialize the local fields here. */ + + return (struct bfd_hash_entry *) ret; + } + *Description* +The creation routine for the linker hash table, which is in `linker.c', +looks just like this example. FUNCTION_NAME is +`_bfd_link_hash_newfunc'. ENTRY_TYPE is `struct bfd_link_hash_entry'. +BASE_NEWFUNC is `bfd_hash_newfunc', the creation routine for a basic +hash table. + + `_bfd_link_hash_newfunc' also initializes the local fields in a +linker hash table entry: `type', `written' and `next'. + + +File: bfd.info, Node: Write Other Derived Routines, Prev: Write the Derived Creation Routine, Up: Deriving a New Hash Table Type + +2.18.4.3 Write other derived routines +..................................... + +You will want to write other routines for your new hash table, as well. + + You will want an initialization routine which calls the +initialization routine of the hash table you are deriving from and +initializes any other local fields. For the linker hash table, this is +`_bfd_link_hash_table_init' in `linker.c'. + + You will want a lookup routine which calls the lookup routine of the +hash table you are deriving from and casts the result. The linker hash +table uses `bfd_link_hash_lookup' in `linker.c' (this actually takes an +additional argument which it uses to decide how to return the looked up +value). + + You may want a traversal routine. This should just call the +traversal routine of the hash table you are deriving from with +appropriate casts. The linker hash table uses `bfd_link_hash_traverse' +in `linker.c'. + + These routines may simply be defined as macros. For example, the +a.out backend linker hash table, which is derived from the linker hash +table, uses macros for the lookup and traversal routines. These are +`aout_link_hash_lookup' and `aout_link_hash_traverse' in aoutx.h. + + +File: bfd.info, Node: BFD back ends, Next: GNU Free Documentation License, Prev: BFD front end, Up: Top + +3 BFD back ends +*************** + +* Menu: + +* What to Put Where:: +* aout :: a.out backends +* coff :: coff backends +* elf :: elf backends +* mmo :: mmo backend + + +File: bfd.info, Node: What to Put Where, Next: aout, Prev: BFD back ends, Up: BFD back ends + +3.1 What to Put Where +===================== + +All of BFD lives in one directory. + + +File: bfd.info, Node: aout, Next: coff, Prev: What to Put Where, Up: BFD back ends + +3.2 a.out backends +================== + +*Description* +BFD supports a number of different flavours of a.out format, though the +major differences are only the sizes of the structures on disk, and the +shape of the relocation information. + + The support is split into a basic support file `aoutx.h' and other +files which derive functions from the base. One derivation file is +`aoutf1.h' (for a.out flavour 1), and adds to the basic a.out functions +support for sun3, sun4, 386 and 29k a.out files, to create a target +jump vector for a specific target. + + This information is further split out into more specific files for +each machine, including `sunos.c' for sun3 and sun4, `newsos3.c' for +the Sony NEWS, and `demo64.c' for a demonstration of a 64 bit a.out +format. + + The base file `aoutx.h' defines general mechanisms for reading and +writing records to and from disk and various other methods which BFD +requires. It is included by `aout32.c' and `aout64.c' to form the names +`aout_32_swap_exec_header_in', `aout_64_swap_exec_header_in', etc. + + As an example, this is what goes on to make the back end for a sun4, +from `aout32.c': + + #define ARCH_SIZE 32 + #include "aoutx.h" + + Which exports names: + + ... + aout_32_canonicalize_reloc + aout_32_find_nearest_line + aout_32_get_lineno + aout_32_get_reloc_upper_bound + ... + + from `sunos.c': + + #define TARGET_NAME "a.out-sunos-big" + #define VECNAME sunos_big_vec + #include "aoutf1.h" + + requires all the names from `aout32.c', and produces the jump vector + + sunos_big_vec + + The file `host-aout.c' is a special case. It is for a large set of +hosts that use "more or less standard" a.out files, and for which +cross-debugging is not interesting. It uses the standard 32-bit a.out +support routines, but determines the file offsets and addresses of the +text, data, and BSS sections, the machine architecture and machine +type, and the entry point address, in a host-dependent manner. Once +these values have been determined, generic code is used to handle the +object file. + + When porting it to run on a new system, you must supply: + + HOST_PAGE_SIZE + HOST_SEGMENT_SIZE + HOST_MACHINE_ARCH (optional) + HOST_MACHINE_MACHINE (optional) + HOST_TEXT_START_ADDR + HOST_STACK_END_ADDR + + in the file `../include/sys/h-XXX.h' (for your host). These values, +plus the structures and macros defined in `a.out.h' on your host +system, will produce a BFD target that will access ordinary a.out files +on your host. To configure a new machine to use `host-aout.c', specify: + + TDEFAULTS = -DDEFAULT_VECTOR=host_aout_big_vec + TDEPFILES= host-aout.o trad-core.o + + in the `config/XXX.mt' file, and modify `configure.in' to use the +`XXX.mt' file (by setting "`bfd_target=XXX'") when your configuration +is selected. + +3.2.1 Relocations +----------------- + +*Description* +The file `aoutx.h' provides for both the _standard_ and _extended_ +forms of a.out relocation records. + + The standard records contain only an address, a symbol index, and a +type field. The extended records (used on 29ks and sparcs) also have a +full integer for an addend. + +3.2.2 Internal entry points +--------------------------- + +*Description* +`aoutx.h' exports several routines for accessing the contents of an +a.out file, which are gathered and exported in turn by various format +specific files (eg sunos.c). + +3.2.2.1 `aout_SIZE_swap_exec_header_in' +....................................... + +*Synopsis* + void aout_SIZE_swap_exec_header_in, + (bfd *abfd, + struct external_exec *bytes, + struct internal_exec *execp); + *Description* +Swap the information in an executable header RAW_BYTES taken from a raw +byte stream memory image into the internal exec header structure EXECP. + +3.2.2.2 `aout_SIZE_swap_exec_header_out' +........................................ + +*Synopsis* + void aout_SIZE_swap_exec_header_out + (bfd *abfd, + struct internal_exec *execp, + struct external_exec *raw_bytes); + *Description* +Swap the information in an internal exec header structure EXECP into +the buffer RAW_BYTES ready for writing to disk. + +3.2.2.3 `aout_SIZE_some_aout_object_p' +...................................... + +*Synopsis* + const bfd_target *aout_SIZE_some_aout_object_p + (bfd *abfd, + struct internal_exec *execp, + const bfd_target *(*callback_to_real_object_p) (bfd *)); + *Description* +Some a.out variant thinks that the file open in ABFD checking is an +a.out file. Do some more checking, and set up for access if it really +is. Call back to the calling environment's "finish up" function just +before returning, to handle any last-minute setup. + +3.2.2.4 `aout_SIZE_mkobject' +............................ + +*Synopsis* + bfd_boolean aout_SIZE_mkobject, (bfd *abfd); + *Description* +Initialize BFD ABFD for use with a.out files. + +3.2.2.5 `aout_SIZE_machine_type' +................................ + +*Synopsis* + enum machine_type aout_SIZE_machine_type + (enum bfd_architecture arch, + unsigned long machine, + bfd_boolean *unknown); + *Description* +Keep track of machine architecture and machine type for a.out's. Return +the `machine_type' for a particular architecture and machine, or +`M_UNKNOWN' if that exact architecture and machine can't be represented +in a.out format. + + If the architecture is understood, machine type 0 (default) is +always understood. + +3.2.2.6 `aout_SIZE_set_arch_mach' +................................. + +*Synopsis* + bfd_boolean aout_SIZE_set_arch_mach, + (bfd *, + enum bfd_architecture arch, + unsigned long machine); + *Description* +Set the architecture and the machine of the BFD ABFD to the values ARCH +and MACHINE. Verify that ABFD's format can support the architecture +required. + +3.2.2.7 `aout_SIZE_new_section_hook' +.................................... + +*Synopsis* + bfd_boolean aout_SIZE_new_section_hook, + (bfd *abfd, + asection *newsect); + *Description* +Called by the BFD in response to a `bfd_make_section' request. + + +File: bfd.info, Node: coff, Next: elf, Prev: aout, Up: BFD back ends + +3.3 coff backends +================= + +BFD supports a number of different flavours of coff format. The major +differences between formats are the sizes and alignments of fields in +structures on disk, and the occasional extra field. + + Coff in all its varieties is implemented with a few common files and +a number of implementation specific files. For example, The 88k bcs +coff format is implemented in the file `coff-m88k.c'. This file +`#include's `coff/m88k.h' which defines the external structure of the +coff format for the 88k, and `coff/internal.h' which defines the +internal structure. `coff-m88k.c' also defines the relocations used by +the 88k format *Note Relocations::. + + The Intel i960 processor version of coff is implemented in +`coff-i960.c'. This file has the same structure as `coff-m88k.c', +except that it includes `coff/i960.h' rather than `coff-m88k.h'. + +3.3.1 Porting to a new version of coff +-------------------------------------- + +The recommended method is to select from the existing implementations +the version of coff which is most like the one you want to use. For +example, we'll say that i386 coff is the one you select, and that your +coff flavour is called foo. Copy `i386coff.c' to `foocoff.c', copy +`../include/coff/i386.h' to `../include/coff/foo.h', and add the lines +to `targets.c' and `Makefile.in' so that your new back end is used. +Alter the shapes of the structures in `../include/coff/foo.h' so that +they match what you need. You will probably also have to add `#ifdef's +to the code in `coff/internal.h' and `coffcode.h' if your version of +coff is too wild. + + You can verify that your new BFD backend works quite simply by +building `objdump' from the `binutils' directory, and making sure that +its version of what's going on and your host system's idea (assuming it +has the pretty standard coff dump utility, usually called `att-dump' or +just `dump') are the same. Then clean up your code, and send what +you've done to Cygnus. Then your stuff will be in the next release, and +you won't have to keep integrating it. + +3.3.2 How the coff backend works +-------------------------------- + +3.3.2.1 File layout +................... + +The Coff backend is split into generic routines that are applicable to +any Coff target and routines that are specific to a particular target. +The target-specific routines are further split into ones which are +basically the same for all Coff targets except that they use the +external symbol format or use different values for certain constants. + + The generic routines are in `coffgen.c'. These routines work for +any Coff target. They use some hooks into the target specific code; +the hooks are in a `bfd_coff_backend_data' structure, one of which +exists for each target. + + The essentially similar target-specific routines are in +`coffcode.h'. This header file includes executable C code. The +various Coff targets first include the appropriate Coff header file, +make any special defines that are needed, and then include `coffcode.h'. + + Some of the Coff targets then also have additional routines in the +target source file itself. + + For example, `coff-i960.c' includes `coff/internal.h' and +`coff/i960.h'. It then defines a few constants, such as `I960', and +includes `coffcode.h'. Since the i960 has complex relocation types, +`coff-i960.c' also includes some code to manipulate the i960 relocs. +This code is not in `coffcode.h' because it would not be used by any +other target. + +3.3.2.2 Coff long section names +............................... + +In the standard Coff object format, section names are limited to the +eight bytes available in the `s_name' field of the `SCNHDR' section +header structure. The format requires the field to be NUL-padded, but +not necessarily NUL-terminated, so the longest section names permitted +are a full eight characters. + + The Microsoft PE variants of the Coff object file format add an +extension to support the use of long section names. This extension is +defined in section 4 of the Microsoft PE/COFF specification (rev 8.1). +If a section name is too long to fit into the section header's `s_name' +field, it is instead placed into the string table, and the `s_name' +field is filled with a slash ("/") followed by the ASCII decimal +representation of the offset of the full name relative to the string +table base. + + Note that this implies that the extension can only be used in object +files, as executables do not contain a string table. The standard +specifies that long section names from objects emitted into executable +images are to be truncated. + + However, as a GNU extension, BFD can generate executable images that +contain a string table and long section names. This would appear to be +technically valid, as the standard only says that Coff debugging +information is deprecated, not forbidden, and in practice it works, +although some tools that parse PE files expecting the MS standard +format may become confused; `PEview' is one known example. + + The functionality is supported in BFD by code implemented under the +control of the macro `COFF_LONG_SECTION_NAMES'. If not defined, the +format does not support long section names in any way. If defined, it +is used to initialise a flag, `_bfd_coff_long_section_names', and a +hook function pointer, `_bfd_coff_set_long_section_names', in the Coff +backend data structure. The flag controls the generation of long +section names in output BFDs at runtime; if it is false, as it will be +by default when generating an executable image, long section names are +truncated; if true, the long section names extension is employed. The +hook points to a function that allows the value of the flag to be +altered at runtime, on formats that support long section names at all; +on other formats it points to a stub that returns an error indication. +With input BFDs, the flag is set according to whether any long section +names are detected while reading the section headers. For a completely +new BFD, the flag is set to the default for the target format. This +information can be used by a client of the BFD library when deciding +what output format to generate, and means that a BFD that is opened for +read and subsequently converted to a writeable BFD and modified +in-place will retain whatever format it had on input. + + If `COFF_LONG_SECTION_NAMES' is simply defined (blank), or is +defined to the value "1", then long section names are enabled by +default; if it is defined to the value zero, they are disabled by +default (but still accepted in input BFDs). The header `coffcode.h' +defines a macro, `COFF_DEFAULT_LONG_SECTION_NAMES', which is used in +the backends to initialise the backend data structure fields +appropriately; see the comments for further detail. + +3.3.2.3 Bit twiddling +..................... + +Each flavour of coff supported in BFD has its own header file +describing the external layout of the structures. There is also an +internal description of the coff layout, in `coff/internal.h'. A major +function of the coff backend is swapping the bytes and twiddling the +bits to translate the external form of the structures into the normal +internal form. This is all performed in the `bfd_swap'_thing_direction +routines. Some elements are different sizes between different versions +of coff; it is the duty of the coff version specific include file to +override the definitions of various packing routines in `coffcode.h'. +E.g., the size of line number entry in coff is sometimes 16 bits, and +sometimes 32 bits. `#define'ing `PUT_LNSZ_LNNO' and `GET_LNSZ_LNNO' +will select the correct one. No doubt, some day someone will find a +version of coff which has a varying field size not catered to at the +moment. To port BFD, that person will have to add more `#defines'. +Three of the bit twiddling routines are exported to `gdb'; +`coff_swap_aux_in', `coff_swap_sym_in' and `coff_swap_lineno_in'. `GDB' +reads the symbol table on its own, but uses BFD to fix things up. More +of the bit twiddlers are exported for `gas'; `coff_swap_aux_out', +`coff_swap_sym_out', `coff_swap_lineno_out', `coff_swap_reloc_out', +`coff_swap_filehdr_out', `coff_swap_aouthdr_out', +`coff_swap_scnhdr_out'. `Gas' currently keeps track of all the symbol +table and reloc drudgery itself, thereby saving the internal BFD +overhead, but uses BFD to swap things on the way out, making cross +ports much safer. Doing so also allows BFD (and thus the linker) to +use the same header files as `gas', which makes one avenue to disaster +disappear. + +3.3.2.4 Symbol reading +...................... + +The simple canonical form for symbols used by BFD is not rich enough to +keep all the information available in a coff symbol table. The back end +gets around this problem by keeping the original symbol table around, +"behind the scenes". + + When a symbol table is requested (through a call to +`bfd_canonicalize_symtab'), a request gets through to +`coff_get_normalized_symtab'. This reads the symbol table from the coff +file and swaps all the structures inside into the internal form. It +also fixes up all the pointers in the table (represented in the file by +offsets from the first symbol in the table) into physical pointers to +elements in the new internal table. This involves some work since the +meanings of fields change depending upon context: a field that is a +pointer to another structure in the symbol table at one moment may be +the size in bytes of a structure at the next. Another pass is made +over the table. All symbols which mark file names (`C_FILE' symbols) +are modified so that the internal string points to the value in the +auxent (the real filename) rather than the normal text associated with +the symbol (`".file"'). + + At this time the symbol names are moved around. Coff stores all +symbols less than nine characters long physically within the symbol +table; longer strings are kept at the end of the file in the string +table. This pass moves all strings into memory and replaces them with +pointers to the strings. + + The symbol table is massaged once again, this time to create the +canonical table used by the BFD application. Each symbol is inspected +in turn, and a decision made (using the `sclass' field) about the +various flags to set in the `asymbol'. *Note Symbols::. The generated +canonical table shares strings with the hidden internal symbol table. + + Any linenumbers are read from the coff file too, and attached to the +symbols which own the functions the linenumbers belong to. + +3.3.2.5 Symbol writing +...................... + +Writing a symbol to a coff file which didn't come from a coff file will +lose any debugging information. The `asymbol' structure remembers the +BFD from which the symbol was taken, and on output the back end makes +sure that the same destination target as source target is present. + + When the symbols have come from a coff file then all the debugging +information is preserved. + + Symbol tables are provided for writing to the back end in a vector +of pointers to pointers. This allows applications like the linker to +accumulate and output large symbol tables without having to do too much +byte copying. + + This function runs through the provided symbol table and patches +each symbol marked as a file place holder (`C_FILE') to point to the +next file place holder in the list. It also marks each `offset' field +in the list with the offset from the first symbol of the current symbol. + + Another function of this procedure is to turn the canonical value +form of BFD into the form used by coff. Internally, BFD expects symbol +values to be offsets from a section base; so a symbol physically at +0x120, but in a section starting at 0x100, would have the value 0x20. +Coff expects symbols to contain their final value, so symbols have +their values changed at this point to reflect their sum with their +owning section. This transformation uses the `output_section' field of +the `asymbol''s `asection' *Note Sections::. + + * `coff_mangle_symbols' + This routine runs though the provided symbol table and uses the +offsets generated by the previous pass and the pointers generated when +the symbol table was read in to create the structured hierarchy +required by coff. It changes each pointer to a symbol into the index +into the symbol table of the asymbol. + + * `coff_write_symbols' + This routine runs through the symbol table and patches up the +symbols from their internal form into the coff way, calls the bit +twiddlers, and writes out the table to the file. + +3.3.2.6 `coff_symbol_type' +.......................... + +*Description* +The hidden information for an `asymbol' is described in a +`combined_entry_type': + + + typedef struct coff_ptr_struct + { + /* Remembers the offset from the first symbol in the file for + this symbol. Generated by coff_renumber_symbols. */ + unsigned int offset; + + /* Should the value of this symbol be renumbered. Used for + XCOFF C_BSTAT symbols. Set by coff_slurp_symbol_table. */ + unsigned int fix_value : 1; + + /* Should the tag field of this symbol be renumbered. + Created by coff_pointerize_aux. */ + unsigned int fix_tag : 1; + + /* Should the endidx field of this symbol be renumbered. + Created by coff_pointerize_aux. */ + unsigned int fix_end : 1; + + /* Should the x_csect.x_scnlen field be renumbered. + Created by coff_pointerize_aux. */ + unsigned int fix_scnlen : 1; + + /* Fix up an XCOFF C_BINCL/C_EINCL symbol. The value is the + index into the line number entries. Set by coff_slurp_symbol_table. */ + unsigned int fix_line : 1; + + /* The container for the symbol structure as read and translated + from the file. */ + union + { + union internal_auxent auxent; + struct internal_syment syment; + } u; + } combined_entry_type; + + + /* Each canonical asymbol really looks like this: */ + + typedef struct coff_symbol_struct + { + /* The actual symbol which the rest of BFD works with */ + asymbol symbol; + + /* A pointer to the hidden information for this symbol */ + combined_entry_type *native; + + /* A pointer to the linenumber information for this symbol */ + struct lineno_cache_entry *lineno; + + /* Have the line numbers been relocated yet ? */ + bfd_boolean done_lineno; + } coff_symbol_type; + +3.3.2.7 `bfd_coff_backend_data' +............................... + + /* COFF symbol classifications. */ + + enum coff_symbol_classification + { + /* Global symbol. */ + COFF_SYMBOL_GLOBAL, + /* Common symbol. */ + COFF_SYMBOL_COMMON, + /* Undefined symbol. */ + COFF_SYMBOL_UNDEFINED, + /* Local symbol. */ + COFF_SYMBOL_LOCAL, + /* PE section symbol. */ + COFF_SYMBOL_PE_SECTION + }; +Special entry points for gdb to swap in coff symbol table parts: + typedef struct + { + void (*_bfd_coff_swap_aux_in) + (bfd *, void *, int, int, int, int, void *); + + void (*_bfd_coff_swap_sym_in) + (bfd *, void *, void *); + + void (*_bfd_coff_swap_lineno_in) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_aux_out) + (bfd *, void *, int, int, int, int, void *); + + unsigned int (*_bfd_coff_swap_sym_out) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_lineno_out) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_reloc_out) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_filehdr_out) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_aouthdr_out) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_scnhdr_out) + (bfd *, void *, void *); + + unsigned int _bfd_filhsz; + unsigned int _bfd_aoutsz; + unsigned int _bfd_scnhsz; + unsigned int _bfd_symesz; + unsigned int _bfd_auxesz; + unsigned int _bfd_relsz; + unsigned int _bfd_linesz; + unsigned int _bfd_filnmlen; + bfd_boolean _bfd_coff_long_filenames; + + bfd_boolean _bfd_coff_long_section_names; + bfd_boolean (*_bfd_coff_set_long_section_names) + (bfd *, int); + + unsigned int _bfd_coff_default_section_alignment_power; + bfd_boolean _bfd_coff_force_symnames_in_strings; + unsigned int _bfd_coff_debug_string_prefix_length; + + void (*_bfd_coff_swap_filehdr_in) + (bfd *, void *, void *); + + void (*_bfd_coff_swap_aouthdr_in) + (bfd *, void *, void *); + + void (*_bfd_coff_swap_scnhdr_in) + (bfd *, void *, void *); + + void (*_bfd_coff_swap_reloc_in) + (bfd *abfd, void *, void *); + + bfd_boolean (*_bfd_coff_bad_format_hook) + (bfd *, void *); + + bfd_boolean (*_bfd_coff_set_arch_mach_hook) + (bfd *, void *); + + void * (*_bfd_coff_mkobject_hook) + (bfd *, void *, void *); + + bfd_boolean (*_bfd_styp_to_sec_flags_hook) + (bfd *, void *, const char *, asection *, flagword *); + + void (*_bfd_set_alignment_hook) + (bfd *, asection *, void *); + + bfd_boolean (*_bfd_coff_slurp_symbol_table) + (bfd *); + + bfd_boolean (*_bfd_coff_symname_in_debug) + (bfd *, struct internal_syment *); + + bfd_boolean (*_bfd_coff_pointerize_aux_hook) + (bfd *, combined_entry_type *, combined_entry_type *, + unsigned int, combined_entry_type *); + + bfd_boolean (*_bfd_coff_print_aux) + (bfd *, FILE *, combined_entry_type *, combined_entry_type *, + combined_entry_type *, unsigned int); + + void (*_bfd_coff_reloc16_extra_cases) + (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *, + bfd_byte *, unsigned int *, unsigned int *); + + int (*_bfd_coff_reloc16_estimate) + (bfd *, asection *, arelent *, unsigned int, + struct bfd_link_info *); + + enum coff_symbol_classification (*_bfd_coff_classify_symbol) + (bfd *, struct internal_syment *); + + bfd_boolean (*_bfd_coff_compute_section_file_positions) + (bfd *); + + bfd_boolean (*_bfd_coff_start_final_link) + (bfd *, struct bfd_link_info *); + + bfd_boolean (*_bfd_coff_relocate_section) + (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, + struct internal_reloc *, struct internal_syment *, asection **); + + reloc_howto_type *(*_bfd_coff_rtype_to_howto) + (bfd *, asection *, struct internal_reloc *, + struct coff_link_hash_entry *, struct internal_syment *, + bfd_vma *); + + bfd_boolean (*_bfd_coff_adjust_symndx) + (bfd *, struct bfd_link_info *, bfd *, asection *, + struct internal_reloc *, bfd_boolean *); + + bfd_boolean (*_bfd_coff_link_add_one_symbol) + (struct bfd_link_info *, bfd *, const char *, flagword, + asection *, bfd_vma, const char *, bfd_boolean, bfd_boolean, + struct bfd_link_hash_entry **); + + bfd_boolean (*_bfd_coff_link_output_has_begun) + (bfd *, struct coff_final_link_info *); + + bfd_boolean (*_bfd_coff_final_link_postscript) + (bfd *, struct coff_final_link_info *); + + bfd_boolean (*_bfd_coff_print_pdata) + (bfd *, void *); + + } bfd_coff_backend_data; + + #define coff_backend_info(abfd) \ + ((bfd_coff_backend_data *) (abfd)->xvec->backend_data) + + #define bfd_coff_swap_aux_in(a,e,t,c,ind,num,i) \ + ((coff_backend_info (a)->_bfd_coff_swap_aux_in) (a,e,t,c,ind,num,i)) + + #define bfd_coff_swap_sym_in(a,e,i) \ + ((coff_backend_info (a)->_bfd_coff_swap_sym_in) (a,e,i)) + + #define bfd_coff_swap_lineno_in(a,e,i) \ + ((coff_backend_info ( a)->_bfd_coff_swap_lineno_in) (a,e,i)) + + #define bfd_coff_swap_reloc_out(abfd, i, o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_reloc_out) (abfd, i, o)) + + #define bfd_coff_swap_lineno_out(abfd, i, o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_lineno_out) (abfd, i, o)) + + #define bfd_coff_swap_aux_out(a,i,t,c,ind,num,o) \ + ((coff_backend_info (a)->_bfd_coff_swap_aux_out) (a,i,t,c,ind,num,o)) + + #define bfd_coff_swap_sym_out(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_sym_out) (abfd, i, o)) + + #define bfd_coff_swap_scnhdr_out(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_scnhdr_out) (abfd, i, o)) + + #define bfd_coff_swap_filehdr_out(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_filehdr_out) (abfd, i, o)) + + #define bfd_coff_swap_aouthdr_out(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_aouthdr_out) (abfd, i, o)) + + #define bfd_coff_filhsz(abfd) (coff_backend_info (abfd)->_bfd_filhsz) + #define bfd_coff_aoutsz(abfd) (coff_backend_info (abfd)->_bfd_aoutsz) + #define bfd_coff_scnhsz(abfd) (coff_backend_info (abfd)->_bfd_scnhsz) + #define bfd_coff_symesz(abfd) (coff_backend_info (abfd)->_bfd_symesz) + #define bfd_coff_auxesz(abfd) (coff_backend_info (abfd)->_bfd_auxesz) + #define bfd_coff_relsz(abfd) (coff_backend_info (abfd)->_bfd_relsz) + #define bfd_coff_linesz(abfd) (coff_backend_info (abfd)->_bfd_linesz) + #define bfd_coff_filnmlen(abfd) (coff_backend_info (abfd)->_bfd_filnmlen) + #define bfd_coff_long_filenames(abfd) \ + (coff_backend_info (abfd)->_bfd_coff_long_filenames) + #define bfd_coff_long_section_names(abfd) \ + (coff_backend_info (abfd)->_bfd_coff_long_section_names) + #define bfd_coff_set_long_section_names(abfd, enable) \ + ((coff_backend_info (abfd)->_bfd_coff_set_long_section_names) (abfd, enable)) + #define bfd_coff_default_section_alignment_power(abfd) \ + (coff_backend_info (abfd)->_bfd_coff_default_section_alignment_power) + #define bfd_coff_swap_filehdr_in(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_filehdr_in) (abfd, i, o)) + + #define bfd_coff_swap_aouthdr_in(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_aouthdr_in) (abfd, i, o)) + + #define bfd_coff_swap_scnhdr_in(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_scnhdr_in) (abfd, i, o)) + + #define bfd_coff_swap_reloc_in(abfd, i, o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_reloc_in) (abfd, i, o)) + + #define bfd_coff_bad_format_hook(abfd, filehdr) \ + ((coff_backend_info (abfd)->_bfd_coff_bad_format_hook) (abfd, filehdr)) + + #define bfd_coff_set_arch_mach_hook(abfd, filehdr)\ + ((coff_backend_info (abfd)->_bfd_coff_set_arch_mach_hook) (abfd, filehdr)) + #define bfd_coff_mkobject_hook(abfd, filehdr, aouthdr)\ + ((coff_backend_info (abfd)->_bfd_coff_mkobject_hook)\ + (abfd, filehdr, aouthdr)) + + #define bfd_coff_styp_to_sec_flags_hook(abfd, scnhdr, name, section, flags_ptr)\ + ((coff_backend_info (abfd)->_bfd_styp_to_sec_flags_hook)\ + (abfd, scnhdr, name, section, flags_ptr)) + + #define bfd_coff_set_alignment_hook(abfd, sec, scnhdr)\ + ((coff_backend_info (abfd)->_bfd_set_alignment_hook) (abfd, sec, scnhdr)) + + #define bfd_coff_slurp_symbol_table(abfd)\ + ((coff_backend_info (abfd)->_bfd_coff_slurp_symbol_table) (abfd)) + + #define bfd_coff_symname_in_debug(abfd, sym)\ + ((coff_backend_info (abfd)->_bfd_coff_symname_in_debug) (abfd, sym)) + + #define bfd_coff_force_symnames_in_strings(abfd)\ + (coff_backend_info (abfd)->_bfd_coff_force_symnames_in_strings) + + #define bfd_coff_debug_string_prefix_length(abfd)\ + (coff_backend_info (abfd)->_bfd_coff_debug_string_prefix_length) + + #define bfd_coff_print_aux(abfd, file, base, symbol, aux, indaux)\ + ((coff_backend_info (abfd)->_bfd_coff_print_aux)\ + (abfd, file, base, symbol, aux, indaux)) + + #define bfd_coff_reloc16_extra_cases(abfd, link_info, link_order,\ + reloc, data, src_ptr, dst_ptr)\ + ((coff_backend_info (abfd)->_bfd_coff_reloc16_extra_cases)\ + (abfd, link_info, link_order, reloc, data, src_ptr, dst_ptr)) + + #define bfd_coff_reloc16_estimate(abfd, section, reloc, shrink, link_info)\ + ((coff_backend_info (abfd)->_bfd_coff_reloc16_estimate)\ + (abfd, section, reloc, shrink, link_info)) + + #define bfd_coff_classify_symbol(abfd, sym)\ + ((coff_backend_info (abfd)->_bfd_coff_classify_symbol)\ + (abfd, sym)) + + #define bfd_coff_compute_section_file_positions(abfd)\ + ((coff_backend_info (abfd)->_bfd_coff_compute_section_file_positions)\ + (abfd)) + + #define bfd_coff_start_final_link(obfd, info)\ + ((coff_backend_info (obfd)->_bfd_coff_start_final_link)\ + (obfd, info)) + #define bfd_coff_relocate_section(obfd,info,ibfd,o,con,rel,isyms,secs)\ + ((coff_backend_info (ibfd)->_bfd_coff_relocate_section)\ + (obfd, info, ibfd, o, con, rel, isyms, secs)) + #define bfd_coff_rtype_to_howto(abfd, sec, rel, h, sym, addendp)\ + ((coff_backend_info (abfd)->_bfd_coff_rtype_to_howto)\ + (abfd, sec, rel, h, sym, addendp)) + #define bfd_coff_adjust_symndx(obfd, info, ibfd, sec, rel, adjustedp)\ + ((coff_backend_info (abfd)->_bfd_coff_adjust_symndx)\ + (obfd, info, ibfd, sec, rel, adjustedp)) + #define bfd_coff_link_add_one_symbol(info, abfd, name, flags, section,\ + value, string, cp, coll, hashp)\ + ((coff_backend_info (abfd)->_bfd_coff_link_add_one_symbol)\ + (info, abfd, name, flags, section, value, string, cp, coll, hashp)) + + #define bfd_coff_link_output_has_begun(a,p) \ + ((coff_backend_info (a)->_bfd_coff_link_output_has_begun) (a, p)) + #define bfd_coff_final_link_postscript(a,p) \ + ((coff_backend_info (a)->_bfd_coff_final_link_postscript) (a, p)) + + #define bfd_coff_have_print_pdata(a) \ + (coff_backend_info (a)->_bfd_coff_print_pdata) + #define bfd_coff_print_pdata(a,p) \ + ((coff_backend_info (a)->_bfd_coff_print_pdata) (a, p)) + + /* Macro: Returns true if the bfd is a PE executable as opposed to a + PE object file. */ + #define bfd_pei_p(abfd) \ + (CONST_STRNEQ ((abfd)->xvec->name, "pei-")) + +3.3.2.8 Writing relocations +........................... + +To write relocations, the back end steps though the canonical +relocation table and create an `internal_reloc'. The symbol index to +use is removed from the `offset' field in the symbol table supplied. +The address comes directly from the sum of the section base address and +the relocation offset; the type is dug directly from the howto field. +Then the `internal_reloc' is swapped into the shape of an +`external_reloc' and written out to disk. + +3.3.2.9 Reading linenumbers +........................... + +Creating the linenumber table is done by reading in the entire coff +linenumber table, and creating another table for internal use. + + A coff linenumber table is structured so that each function is +marked as having a line number of 0. Each line within the function is +an offset from the first line in the function. The base of the line +number information for the table is stored in the symbol associated +with the function. + + Note: The PE format uses line number 0 for a flag indicating a new +source file. + + The information is copied from the external to the internal table, +and each symbol which marks a function is marked by pointing its... + + How does this work ? + +3.3.2.10 Reading relocations +............................ + +Coff relocations are easily transformed into the internal BFD form +(`arelent'). + + Reading a coff relocation table is done in the following stages: + + * Read the entire coff relocation table into memory. + + * Process each relocation in turn; first swap it from the external + to the internal form. + + * Turn the symbol referenced in the relocation's symbol index into a + pointer into the canonical symbol table. This table is the same + as the one returned by a call to `bfd_canonicalize_symtab'. The + back end will call that routine and save the result if a + canonicalization hasn't been done. + + * The reloc index is turned into a pointer to a howto structure, in + a back end specific way. For instance, the 386 and 960 use the + `r_type' to directly produce an index into a howto table vector; + the 88k subtracts a number from the `r_type' field and creates an + addend field. + + +File: bfd.info, Node: elf, Next: mmo, Prev: coff, Up: BFD back ends + +3.4 ELF backends +================ + +BFD support for ELF formats is being worked on. Currently, the best +supported back ends are for sparc and i386 (running svr4 or Solaris 2). + + Documentation of the internals of the support code still needs to be +written. The code is changing quickly enough that we haven't bothered +yet. + + +File: bfd.info, Node: mmo, Prev: elf, Up: BFD back ends + +3.5 mmo backend +=============== + +The mmo object format is used exclusively together with Professor +Donald E. Knuth's educational 64-bit processor MMIX. The simulator +`mmix' which is available at +`http://www-cs-faculty.stanford.edu/~knuth/programs/mmix.tar.gz' +understands this format. That package also includes a combined +assembler and linker called `mmixal'. The mmo format has no advantages +feature-wise compared to e.g. ELF. It is a simple non-relocatable +object format with no support for archives or debugging information, +except for symbol value information and line numbers (which is not yet +implemented in BFD). See +`http://www-cs-faculty.stanford.edu/~knuth/mmix.html' for more +information about MMIX. The ELF format is used for intermediate object +files in the BFD implementation. + +* Menu: + +* File layout:: +* Symbol-table:: +* mmo section mapping:: + + +File: bfd.info, Node: File layout, Next: Symbol-table, Prev: mmo, Up: mmo + +3.5.1 File layout +----------------- + +The mmo file contents is not partitioned into named sections as with +e.g. ELF. Memory areas is formed by specifying the location of the +data that follows. Only the memory area `0x0000...00' to `0x01ff...ff' +is executable, so it is used for code (and constants) and the area +`0x2000...00' to `0x20ff...ff' is used for writable data. *Note mmo +section mapping::. + + There is provision for specifying "special data" of 65536 different +types. We use type 80 (decimal), arbitrarily chosen the same as the +ELF `e_machine' number for MMIX, filling it with section information +normally found in ELF objects. *Note mmo section mapping::. + + Contents is entered as 32-bit words, xor:ed over previous contents, +always zero-initialized. A word that starts with the byte `0x98' forms +a command called a `lopcode', where the next byte distinguished between +the thirteen lopcodes. The two remaining bytes, called the `Y' and `Z' +fields, or the `YZ' field (a 16-bit big-endian number), are used for +various purposes different for each lopcode. As documented in +`http://www-cs-faculty.stanford.edu/~knuth/mmixal-intro.ps.gz', the +lopcodes are: + +`lop_quote' + 0x98000001. The next word is contents, regardless of whether it + starts with 0x98 or not. + +`lop_loc' + 0x9801YYZZ, where `Z' is 1 or 2. This is a location directive, + setting the location for the next data to the next 32-bit word + (for Z = 1) or 64-bit word (for Z = 2), plus Y * 2^56. Normally + `Y' is 0 for the text segment and 2 for the data segment. + +`lop_skip' + 0x9802YYZZ. Increase the current location by `YZ' bytes. + +`lop_fixo' + 0x9803YYZZ, where `Z' is 1 or 2. Store the current location as 64 + bits into the location pointed to by the next 32-bit (Z = 1) or + 64-bit (Z = 2) word, plus Y * 2^56. + +`lop_fixr' + 0x9804YYZZ. `YZ' is stored into the current location plus 2 - 4 * + YZ. + +`lop_fixrx' + 0x980500ZZ. `Z' is 16 or 24. A value `L' derived from the + following 32-bit word are used in a manner similar to `YZ' in + lop_fixr: it is xor:ed into the current location minus 4 * L. The + first byte of the word is 0 or 1. If it is 1, then L = (LOWEST 24 + BITS OF WORD) - 2^Z, if 0, then L = (LOWEST 24 BITS OF WORD). + +`lop_file' + 0x9806YYZZ. `Y' is the file number, `Z' is count of 32-bit words. + Set the file number to `Y' and the line counter to 0. The next Z + * 4 bytes contain the file name, padded with zeros if the count is + not a multiple of four. The same `Y' may occur multiple times, + but `Z' must be 0 for all but the first occurrence. + +`lop_line' + 0x9807YYZZ. `YZ' is the line number. Together with lop_file, it + forms the source location for the next 32-bit word. Note that for + each non-lopcode 32-bit word, line numbers are assumed incremented + by one. + +`lop_spec' + 0x9808YYZZ. `YZ' is the type number. Data until the next lopcode + other than lop_quote forms special data of type `YZ'. *Note mmo + section mapping::. + + Other types than 80, (or type 80 with a content that does not + parse) is stored in sections named `.MMIX.spec_data.N' where N is + the `YZ'-type. The flags for such a sections say not to allocate + or load the data. The vma is 0. Contents of multiple occurrences + of special data N is concatenated to the data of the previous + lop_spec Ns. The location in data or code at which the lop_spec + occurred is lost. + +`lop_pre' + 0x980901ZZ. The first lopcode in a file. The `Z' field forms the + length of header information in 32-bit words, where the first word + tells the time in seconds since `00:00:00 GMT Jan 1 1970'. + +`lop_post' + 0x980a00ZZ. Z > 32. This lopcode follows after all + content-generating lopcodes in a program. The `Z' field denotes + the value of `rG' at the beginning of the program. The following + 256 - Z big-endian 64-bit words are loaded into global registers + `$G' ... `$255'. + +`lop_stab' + 0x980b0000. The next-to-last lopcode in a program. Must follow + immediately after the lop_post lopcode and its data. After this + lopcode follows all symbols in a compressed format (*note + Symbol-table::). + +`lop_end' + 0x980cYYZZ. The last lopcode in a program. It must follow the + lop_stab lopcode and its data. The `YZ' field contains the number + of 32-bit words of symbol table information after the preceding + lop_stab lopcode. + + Note that the lopcode "fixups"; `lop_fixr', `lop_fixrx' and +`lop_fixo' are not generated by BFD, but are handled. They are +generated by `mmixal'. + + This trivial one-label, one-instruction file: + + :Main TRAP 1,2,3 + + can be represented this way in mmo: + + 0x98090101 - lop_pre, one 32-bit word with timestamp. + + 0x98010002 - lop_loc, text segment, using a 64-bit address. + Note that mmixal does not emit this for the file above. + 0x00000000 - Address, high 32 bits. + 0x00000000 - Address, low 32 bits. + 0x98060002 - lop_file, 2 32-bit words for file-name. + 0x74657374 - "test" + 0x2e730000 - ".s\0\0" + 0x98070001 - lop_line, line 1. + 0x00010203 - TRAP 1,2,3 + 0x980a00ff - lop_post, setting $255 to 0. + 0x00000000 + 0x00000000 + 0x980b0000 - lop_stab for ":Main" = 0, serial 1. + 0x203a4040 *Note Symbol-table::. + 0x10404020 + 0x4d206120 + 0x69016e00 + 0x81000000 + 0x980c0005 - lop_end; symbol table contained five 32-bit words. + + +File: bfd.info, Node: Symbol-table, Next: mmo section mapping, Prev: File layout, Up: mmo + +3.5.2 Symbol table format +------------------------- + +From mmixal.w (or really, the generated mmixal.tex) in +`http://www-cs-faculty.stanford.edu/~knuth/programs/mmix.tar.gz'): +"Symbols are stored and retrieved by means of a `ternary search trie', +following ideas of Bentley and Sedgewick. (See ACM-SIAM Symp. on +Discrete Algorithms `8' (1997), 360-369; R.Sedgewick, `Algorithms in C' +(Reading, Mass. Addison-Wesley, 1998), `15.4'.) Each trie node stores +a character, and there are branches to subtries for the cases where a +given character is less than, equal to, or greater than the character +in the trie. There also is a pointer to a symbol table entry if a +symbol ends at the current node." + + So it's a tree encoded as a stream of bytes. The stream of bytes +acts on a single virtual global symbol, adding and removing characters +and signalling complete symbol points. Here, we read the stream and +create symbols at the completion points. + + First, there's a control byte `m'. If any of the listed bits in `m' +is nonzero, we execute what stands at the right, in the listed order: + + (MMO3_LEFT) + 0x40 - Traverse left trie. + (Read a new command byte and recurse.) + + (MMO3_SYMBITS) + 0x2f - Read the next byte as a character and store it in the + current character position; increment character position. + Test the bits of `m': + + (MMO3_WCHAR) + 0x80 - The character is 16-bit (so read another byte, + merge into current character. + + (MMO3_TYPEBITS) + 0xf - We have a complete symbol; parse the type, value + and serial number and do what should be done + with a symbol. The type and length information + is in j = (m & 0xf). + + (MMO3_REGQUAL_BITS) + j == 0xf: A register variable. The following + byte tells which register. + j <= 8: An absolute symbol. Read j bytes as the + big-endian number the symbol equals. + A j = 2 with two zero bytes denotes an + unknown symbol. + j > 8: As with j <= 8, but add (0x20 << 56) + to the value in the following j - 8 + bytes. + + Then comes the serial number, as a variant of + uleb128, but better named ubeb128: + Read bytes and shift the previous value left 7 + (multiply by 128). Add in the new byte, repeat + until a byte has bit 7 set. The serial number + is the computed value minus 128. + + (MMO3_MIDDLE) + 0x20 - Traverse middle trie. (Read a new command byte + and recurse.) Decrement character position. + + (MMO3_RIGHT) + 0x10 - Traverse right trie. (Read a new command byte and + recurse.) + + Let's look again at the `lop_stab' for the trivial file (*note File +layout::). + + 0x980b0000 - lop_stab for ":Main" = 0, serial 1. + 0x203a4040 + 0x10404020 + 0x4d206120 + 0x69016e00 + 0x81000000 + + This forms the trivial trie (note that the path between ":" and "M" +is redundant): + + 203a ":" + 40 / + 40 / + 10 \ + 40 / + 40 / + 204d "M" + 2061 "a" + 2069 "i" + 016e "n" is the last character in a full symbol, and + with a value represented in one byte. + 00 The value is 0. + 81 The serial number is 1. + + +File: bfd.info, Node: mmo section mapping, Prev: Symbol-table, Up: mmo + +3.5.3 mmo section mapping +------------------------- + +The implementation in BFD uses special data type 80 (decimal) to +encapsulate and describe named sections, containing e.g. debug +information. If needed, any datum in the encapsulation will be quoted +using lop_quote. First comes a 32-bit word holding the number of +32-bit words containing the zero-terminated zero-padded segment name. +After the name there's a 32-bit word holding flags describing the +section type. Then comes a 64-bit big-endian word with the section +length (in bytes), then another with the section start address. +Depending on the type of section, the contents might follow, +zero-padded to 32-bit boundary. For a loadable section (such as data +or code), the contents might follow at some later point, not +necessarily immediately, as a lop_loc with the same start address as in +the section description, followed by the contents. This in effect +forms a descriptor that must be emitted before the actual contents. +Sections described this way must not overlap. + + For areas that don't have such descriptors, synthetic sections are +formed by BFD. Consecutive contents in the two memory areas +`0x0000...00' to `0x01ff...ff' and `0x2000...00' to `0x20ff...ff' are +entered in sections named `.text' and `.data' respectively. If an area +is not otherwise described, but would together with a neighboring lower +area be less than `0x40000000' bytes long, it is joined with the lower +area and the gap is zero-filled. For other cases, a new section is +formed, named `.MMIX.sec.N'. Here, N is a number, a running count +through the mmo file, starting at 0. + + A loadable section specified as: + + .section secname,"ax" + TETRA 1,2,3,4,-1,-2009 + BYTE 80 + + and linked to address `0x4', is represented by the sequence: + + 0x98080050 - lop_spec 80 + 0x00000002 - two 32-bit words for the section name + 0x7365636e - "secn" + 0x616d6500 - "ame\0" + 0x00000033 - flags CODE, READONLY, LOAD, ALLOC + 0x00000000 - high 32 bits of section length + 0x0000001c - section length is 28 bytes; 6 * 4 + 1 + alignment to 32 bits + 0x00000000 - high 32 bits of section address + 0x00000004 - section address is 4 + 0x98010002 - 64 bits with address of following data + 0x00000000 - high 32 bits of address + 0x00000004 - low 32 bits: data starts at address 4 + 0x00000001 - 1 + 0x00000002 - 2 + 0x00000003 - 3 + 0x00000004 - 4 + 0xffffffff - -1 + 0xfffff827 - -2009 + 0x50000000 - 80 as a byte, padded with zeros. + + Note that the lop_spec wrapping does not include the section +contents. Compare this to a non-loaded section specified as: + + .section thirdsec + TETRA 200001,100002 + BYTE 38,40 + + This, when linked to address `0x200000000000001c', is represented by: + + 0x98080050 - lop_spec 80 + 0x00000002 - two 32-bit words for the section name + 0x7365636e - "thir" + 0x616d6500 - "dsec" + 0x00000010 - flag READONLY + 0x00000000 - high 32 bits of section length + 0x0000000c - section length is 12 bytes; 2 * 4 + 2 + alignment to 32 bits + 0x20000000 - high 32 bits of address + 0x0000001c - low 32 bits of address 0x200000000000001c + 0x00030d41 - 200001 + 0x000186a2 - 100002 + 0x26280000 - 38, 40 as bytes, padded with zeros + + For the latter example, the section contents must not be loaded in +memory, and is therefore specified as part of the special data. The +address is usually unimportant but might provide information for e.g. +the DWARF 2 debugging format. + + +File: bfd.info, Node: GNU Free Documentation License, Next: BFD Index, Prev: BFD back ends, Up: Top + + Version 1.3, 3 November 2008 + + Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc. + `http://fsf.org/' + + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + 0. PREAMBLE + + The purpose of this License is to make a manual, textbook, or other + functional and useful document "free" in the sense of freedom: to + assure everyone the effective freedom to copy and redistribute it, + with or without modifying it, either commercially or + noncommercially. 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Preserve the network location, if any, given in the Document + for public access to a Transparent copy of the Document, and + likewise the network locations given in the Document for + previous versions it was based on. These may be placed in + the "History" section. You may omit a network location for a + work that was published at least four years before the + Document itself, or if the original publisher of the version + it refers to gives permission. + + K. For any section Entitled "Acknowledgements" or "Dedications", + Preserve the Title of the section, and preserve in the + section all the substance and tone of each of the contributor + acknowledgements and/or dedications given therein. + + L. Preserve all the Invariant Sections of the Document, + unaltered in their text and in their titles. Section numbers + or the equivalent are not considered part of the section + titles. + + M. Delete any section Entitled "Endorsements". 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COLLECTIONS OF DOCUMENTS + + You may make a collection consisting of the Document and other + documents released under this License, and replace the individual + copies of this License in the various documents with a single copy + that is included in the collection, provided that you follow the + rules of this License for verbatim copying of each of the + documents in all other respects. + + You may extract a single document from such a collection, and + distribute it individually under this License, provided you insert + a copy of this License into the extracted document, and follow + this License in all other respects regarding verbatim copying of + that document. + + 7. AGGREGATION WITH INDEPENDENT WORKS + + A compilation of the Document or its derivatives with other + separate and independent documents or works, in or on a volume of + a storage or distribution medium, is called an "aggregate" if the + copyright resulting from the compilation is not used to limit the + legal rights of the compilation's users beyond what the individual + works permit. When the Document is included in an aggregate, this + License does not apply to the other works in the aggregate which + are not themselves derivative works of the Document. + + If the Cover Text requirement of section 3 is applicable to these + copies of the Document, then if the Document is less than one half + of the entire aggregate, the Document's Cover Texts may be placed + on covers that bracket the Document within the aggregate, or the + electronic equivalent of covers if the Document is in electronic + form. Otherwise they must appear on printed covers that bracket + the whole aggregate. + + 8. TRANSLATION + + Translation is considered a kind of modification, so you may + distribute translations of the Document under the terms of section + 4. Replacing Invariant Sections with translations requires special + permission from their copyright holders, but you may include + translations of some or all Invariant Sections in addition to the + original versions of these Invariant Sections. You may include a + translation of this License, and all the license notices in the + Document, and any Warranty Disclaimers, provided that you also + include the original English version of this License and the + original versions of those notices and disclaimers. In case of a + disagreement between the translation and the original version of + this License or a notice or disclaimer, the original version will + prevail. + + If a section in the Document is Entitled "Acknowledgements", + "Dedications", or "History", the requirement (section 4) to + Preserve its Title (section 1) will typically require changing the + actual title. + + 9. TERMINATION + + You may not copy, modify, sublicense, or distribute the Document + except as expressly provided under this License. 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If your rights have been terminated and + not permanently reinstated, receipt of a copy of some or all of + the same material does not give you any rights to use it. + + 10. FUTURE REVISIONS OF THIS LICENSE + + The Free Software Foundation may publish new, revised versions of + the GNU Free Documentation License from time to time. Such new + versions will be similar in spirit to the present version, but may + differ in detail to address new problems or concerns. See + `http://www.gnu.org/copyleft/'. + + Each version of the License is given a distinguishing version + number. If the Document specifies that a particular numbered + version of this License "or any later version" applies to it, you + have the option of following the terms and conditions either of + that specified version or of any later version that has been + published (not as a draft) by the Free Software Foundation. If + the Document does not specify a version number of this License, + you may choose any version ever published (not as a draft) by the + Free Software Foundation. If the Document specifies that a proxy + can decide which future versions of this License can be used, that + proxy's public statement of acceptance of a version permanently + authorizes you to choose that version for the Document. + + 11. RELICENSING + + "Massive Multiauthor Collaboration Site" (or "MMC Site") means any + World Wide Web server that publishes copyrightable works and also + provides prominent facilities for anybody to edit those works. A + public wiki that anybody can edit is an example of such a server. + A "Massive Multiauthor Collaboration" (or "MMC") contained in the + site means any set of copyrightable works thus published on the MMC + site. + + "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0 + license published by Creative Commons Corporation, a not-for-profit + corporation with a principal place of business in San Francisco, + California, as well as future copyleft versions of that license + published by that same organization. + + "Incorporate" means to publish or republish a Document, in whole or + in part, as part of another Document. + + An MMC is "eligible for relicensing" if it is licensed under this + License, and if all works that were first published under this + License somewhere other than this MMC, and subsequently + incorporated in whole or in part into the MMC, (1) had no cover + texts or invariant sections, and (2) were thus incorporated prior + to November 1, 2008. + + The operator of an MMC Site may republish an MMC contained in the + site under CC-BY-SA on the same site at any time before August 1, + 2009, provided the MMC is eligible for relicensing. + + +ADDENDUM: How to use this License for your documents +==================================================== + +To use this License in a document you have written, include a copy of +the License in the document and put the following copyright and license +notices just after the title page: + + Copyright (C) YEAR YOUR NAME. + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover + Texts. A copy of the license is included in the section entitled ``GNU + Free Documentation License''. + + If you have Invariant Sections, Front-Cover Texts and Back-Cover +Texts, replace the "with...Texts." line with this: + + with the Invariant Sections being LIST THEIR TITLES, with + the Front-Cover Texts being LIST, and with the Back-Cover Texts + being LIST. + + If you have Invariant Sections without Cover Texts, or some other +combination of the three, merge those two alternatives to suit the +situation. + + If your document contains nontrivial examples of program code, we +recommend releasing these examples in parallel under your choice of +free software license, such as the GNU General Public License, to +permit their use in free software. + + +File: bfd.info, Node: BFD Index, Prev: GNU Free Documentation License, Up: Top + +BFD Index +********* + +[index] +* Menu: + +* _bfd_final_link_relocate: Relocating the section contents. + (line 22) +* _bfd_generic_link_add_archive_symbols: Adding symbols from an archive. + (line 15) +* _bfd_generic_link_add_one_symbol: Adding symbols from an object file. + (line 19) +* _bfd_generic_make_empty_symbol: symbol handling functions. + (line 92) +* _bfd_link_add_symbols in target vector: Adding Symbols to the Hash Table. + (line 6) +* _bfd_link_final_link in target vector: Performing the Final Link. + (line 6) +* _bfd_link_hash_table_create in target vector: Creating a Linker Hash Table. + (line 6) +* _bfd_relocate_contents: Relocating the section contents. + (line 22) +* aout_SIZE_machine_type: aout. (line 147) +* aout_SIZE_mkobject: aout. (line 139) +* aout_SIZE_new_section_hook: aout. (line 177) +* aout_SIZE_set_arch_mach: aout. (line 164) +* aout_SIZE_some_aout_object_p: aout. (line 125) +* aout_SIZE_swap_exec_header_in: aout. (line 101) +* aout_SIZE_swap_exec_header_out: aout. (line 113) +* arelent_chain: typedef arelent. (line 336) +* BFD: Overview. (line 6) +* BFD canonical format: Canonical format. (line 11) +* bfd_alloc: Opening and Closing. + (line 214) +* bfd_alloc2: Opening and Closing. + (line 223) +* bfd_alt_mach_code: BFD front end. (line 714) +* bfd_arch_bits_per_address: Architectures. (line 540) +* bfd_arch_bits_per_byte: Architectures. (line 532) +* bfd_arch_get_compatible: Architectures. (line 475) +* bfd_arch_list: Architectures. (line 466) +* bfd_arch_mach_octets_per_byte: Architectures. (line 609) +* BFD_ARELOC_BFIN_ADD: howto manager. (line 1058) +* BFD_ARELOC_BFIN_ADDR: howto manager. (line 1109) +* BFD_ARELOC_BFIN_AND: howto manager. (line 1079) +* BFD_ARELOC_BFIN_COMP: howto manager. (line 1100) +* BFD_ARELOC_BFIN_CONST: howto manager. (line 1055) +* BFD_ARELOC_BFIN_DIV: howto manager. (line 1067) +* BFD_ARELOC_BFIN_HWPAGE: howto manager. (line 1106) +* BFD_ARELOC_BFIN_LAND: howto manager. (line 1088) +* BFD_ARELOC_BFIN_LEN: howto manager. (line 1094) +* BFD_ARELOC_BFIN_LOR: howto manager. (line 1091) +* BFD_ARELOC_BFIN_LSHIFT: howto manager. (line 1073) +* BFD_ARELOC_BFIN_MOD: howto manager. (line 1070) +* BFD_ARELOC_BFIN_MULT: howto manager. (line 1064) +* BFD_ARELOC_BFIN_NEG: howto manager. (line 1097) +* BFD_ARELOC_BFIN_OR: howto manager. (line 1082) +* BFD_ARELOC_BFIN_PAGE: howto manager. (line 1103) +* BFD_ARELOC_BFIN_PUSH: howto manager. (line 1052) +* BFD_ARELOC_BFIN_RSHIFT: howto manager. (line 1076) +* BFD_ARELOC_BFIN_SUB: howto manager. (line 1061) +* BFD_ARELOC_BFIN_XOR: howto manager. (line 1085) +* bfd_cache_close: File Caching. (line 26) +* bfd_cache_close_all: File Caching. (line 39) +* bfd_cache_init: File Caching. (line 18) +* bfd_calc_gnu_debuglink_crc32: Opening and Closing. + (line 250) +* bfd_canonicalize_reloc: BFD front end. (line 430) +* bfd_canonicalize_symtab: symbol handling functions. + (line 50) +* bfd_check_format: Formats. (line 21) +* bfd_check_format_matches: Formats. (line 52) +* bfd_check_overflow: typedef arelent. (line 348) +* bfd_close: Opening and Closing. + (line 139) +* bfd_close_all_done: Opening and Closing. + (line 157) +* bfd_coff_backend_data: coff. (line 304) +* bfd_copy_private_bfd_data: BFD front end. (line 569) +* bfd_copy_private_header_data: BFD front end. (line 551) +* bfd_copy_private_section_data: section prototypes. (line 264) +* bfd_copy_private_symbol_data: symbol handling functions. + (line 140) +* bfd_core_file_failing_command: Core Files. (line 12) +* bfd_core_file_failing_signal: Core Files. (line 21) +* bfd_core_file_pid: Core Files. (line 30) +* bfd_create: Opening and Closing. + (line 176) +* bfd_create_gnu_debuglink_section: Opening and Closing. + (line 316) +* bfd_decode_symclass: symbol handling functions. + (line 111) +* bfd_default_arch_struct: Architectures. (line 487) +* bfd_default_compatible: Architectures. (line 549) +* bfd_default_reloc_type_lookup: howto manager. (line 2626) +* bfd_default_scan: Architectures. (line 558) +* bfd_default_set_arch_mach: Architectures. (line 505) +* bfd_demangle: BFD front end. (line 812) +* bfd_emul_get_commonpagesize: BFD front end. (line 792) +* bfd_emul_get_maxpagesize: BFD front end. (line 772) +* bfd_emul_set_commonpagesize: BFD front end. (line 803) +* bfd_emul_set_maxpagesize: BFD front end. (line 783) +* bfd_errmsg: BFD front end. (line 355) +* bfd_fdopenr: Opening and Closing. + (line 49) +* bfd_fill_in_gnu_debuglink_section: Opening and Closing. + (line 330) +* bfd_find_target: bfd_target. (line 468) +* bfd_find_version_for_sym: Writing the symbol table. + (line 81) +* bfd_follow_gnu_debuglink: Opening and Closing. + (line 295) +* bfd_fopen: Opening and Closing. + (line 12) +* bfd_format_string: Formats. (line 79) +* bfd_generic_define_common_symbol: Writing the symbol table. + (line 68) +* bfd_generic_discard_group: section prototypes. (line 290) +* bfd_generic_gc_sections: howto manager. (line 2657) +* bfd_generic_get_relocated_section_contents: howto manager. (line 2686) +* bfd_generic_is_group_section: section prototypes. (line 282) +* bfd_generic_lookup_section_flags: howto manager. (line 2667) +* bfd_generic_merge_sections: howto manager. (line 2676) +* bfd_generic_relax_section: howto manager. (line 2644) +* bfd_get_arch: Architectures. (line 516) +* bfd_get_arch_info: Architectures. (line 568) +* bfd_get_arch_size: BFD front end. (line 474) +* bfd_get_error: BFD front end. (line 336) +* bfd_get_error_handler: BFD front end. (line 406) +* bfd_get_gp_size: BFD front end. (line 515) +* bfd_get_mach: Architectures. (line 524) +* bfd_get_mtime: BFD front end. (line 863) +* bfd_get_next_mapent: Archives. (line 52) +* bfd_get_reloc_code_name: howto manager. (line 2635) +* bfd_get_reloc_size: typedef arelent. (line 327) +* bfd_get_reloc_upper_bound: BFD front end. (line 420) +* bfd_get_section_by_name: section prototypes. (line 17) +* bfd_get_section_by_name_if: section prototypes. (line 31) +* bfd_get_section_contents: section prototypes. (line 237) +* bfd_get_sign_extend_vma: BFD front end. (line 487) +* bfd_get_size <1>: BFD front end. (line 872) +* bfd_get_size: Internal. (line 25) +* bfd_get_symtab_upper_bound: symbol handling functions. + (line 6) +* bfd_get_target_info: bfd_target. (line 484) +* bfd_get_unique_section_name: section prototypes. (line 50) +* bfd_h_put_size: Internal. (line 97) +* bfd_hash_allocate: Creating and Freeing a Hash Table. + (line 17) +* bfd_hash_lookup: Looking Up or Entering a String. + (line 6) +* bfd_hash_newfunc: Creating and Freeing a Hash Table. + (line 12) +* bfd_hash_set_default_size: Creating and Freeing a Hash Table. + (line 25) +* bfd_hash_table_free: Creating and Freeing a Hash Table. + (line 21) +* bfd_hash_table_init: Creating and Freeing a Hash Table. + (line 6) +* bfd_hash_table_init_n: Creating and Freeing a Hash Table. + (line 6) +* bfd_hash_traverse: Traversing a Hash Table. + (line 6) +* bfd_hide_sym_by_version: Writing the symbol table. + (line 93) +* bfd_init: Initialization. (line 11) +* bfd_install_relocation: typedef arelent. (line 389) +* bfd_is_local_label: symbol handling functions. + (line 17) +* bfd_is_local_label_name: symbol handling functions. + (line 26) +* bfd_is_target_special_symbol: symbol handling functions. + (line 38) +* bfd_is_undefined_symclass: symbol handling functions. + (line 120) +* bfd_link_split_section: Writing the symbol table. + (line 44) +* bfd_log2: Internal. (line 164) +* bfd_lookup_arch: Architectures. (line 576) +* bfd_make_debug_symbol: symbol handling functions. + (line 102) +* bfd_make_empty_symbol: symbol handling functions. + (line 78) +* bfd_make_readable: Opening and Closing. + (line 200) +* bfd_make_section: section prototypes. (line 129) +* bfd_make_section_anyway: section prototypes. (line 100) +* bfd_make_section_anyway_with_flags: section prototypes. (line 82) +* bfd_make_section_old_way: section prototypes. (line 62) +* bfd_make_section_with_flags: section prototypes. (line 116) +* bfd_make_writable: Opening and Closing. + (line 186) +* bfd_malloc_and_get_section: section prototypes. (line 254) +* bfd_map_over_sections: section prototypes. (line 164) +* bfd_merge_private_bfd_data: BFD front end. (line 585) +* bfd_mmap: BFD front end. (line 901) +* bfd_octets_per_byte: Architectures. (line 599) +* bfd_open_file: File Caching. (line 52) +* bfd_openr: Opening and Closing. + (line 33) +* bfd_openr_iovec: Opening and Closing. + (line 79) +* bfd_openr_next_archived_file: Archives. (line 78) +* bfd_openstreamr: Opening and Closing. + (line 70) +* bfd_openw: Opening and Closing. + (line 127) +* bfd_perform_relocation: typedef arelent. (line 364) +* bfd_perror: BFD front end. (line 364) +* bfd_preserve_finish: BFD front end. (line 762) +* bfd_preserve_restore: BFD front end. (line 752) +* bfd_preserve_save: BFD front end. (line 736) +* bfd_print_symbol_vandf: symbol handling functions. + (line 70) +* bfd_printable_arch_mach: Architectures. (line 587) +* bfd_printable_name: Architectures. (line 447) +* bfd_put_size: Internal. (line 22) +* BFD_RELOC_12_PCREL: howto manager. (line 39) +* BFD_RELOC_14: howto manager. (line 31) +* BFD_RELOC_16: howto manager. (line 30) +* BFD_RELOC_16_BASEREL: howto manager. (line 95) +* BFD_RELOC_16_GOT_PCREL: howto manager. (line 52) +* BFD_RELOC_16_GOTOFF: howto manager. (line 55) +* BFD_RELOC_16_PCREL: howto manager. (line 38) +* BFD_RELOC_16_PCREL_S2: howto manager. (line 107) +* BFD_RELOC_16_PLT_PCREL: howto manager. (line 63) +* BFD_RELOC_16_PLTOFF: howto manager. (line 67) +* BFD_RELOC_16C_ABS20: howto manager. (line 2018) +* BFD_RELOC_16C_ABS20_C: howto manager. (line 2019) +* BFD_RELOC_16C_ABS24: howto manager. (line 2020) +* BFD_RELOC_16C_ABS24_C: howto manager. (line 2021) +* BFD_RELOC_16C_DISP04: howto manager. (line 1998) +* BFD_RELOC_16C_DISP04_C: howto manager. (line 1999) +* BFD_RELOC_16C_DISP08: howto manager. (line 2000) +* BFD_RELOC_16C_DISP08_C: howto manager. (line 2001) +* BFD_RELOC_16C_DISP16: howto manager. (line 2002) +* BFD_RELOC_16C_DISP16_C: howto manager. (line 2003) +* BFD_RELOC_16C_DISP24: howto manager. (line 2004) +* BFD_RELOC_16C_DISP24_C: howto manager. (line 2005) +* BFD_RELOC_16C_DISP24a: howto manager. (line 2006) +* BFD_RELOC_16C_DISP24a_C: howto manager. (line 2007) +* BFD_RELOC_16C_IMM04: howto manager. (line 2022) +* BFD_RELOC_16C_IMM04_C: howto manager. (line 2023) +* BFD_RELOC_16C_IMM16: howto manager. (line 2024) +* BFD_RELOC_16C_IMM16_C: howto manager. (line 2025) +* BFD_RELOC_16C_IMM20: howto manager. (line 2026) +* BFD_RELOC_16C_IMM20_C: howto manager. (line 2027) +* BFD_RELOC_16C_IMM24: howto manager. (line 2028) +* BFD_RELOC_16C_IMM24_C: howto manager. (line 2029) +* BFD_RELOC_16C_IMM32: howto manager. (line 2030) +* BFD_RELOC_16C_IMM32_C: howto manager. (line 2031) +* BFD_RELOC_16C_NUM08: howto manager. (line 1992) +* BFD_RELOC_16C_NUM08_C: howto manager. (line 1993) +* BFD_RELOC_16C_NUM16: howto manager. (line 1994) +* BFD_RELOC_16C_NUM16_C: howto manager. (line 1995) +* BFD_RELOC_16C_NUM32: howto manager. (line 1996) +* BFD_RELOC_16C_NUM32_C: howto manager. (line 1997) +* BFD_RELOC_16C_REG04: howto manager. (line 2008) +* BFD_RELOC_16C_REG04_C: howto manager. (line 2009) +* BFD_RELOC_16C_REG04a: howto manager. (line 2010) +* BFD_RELOC_16C_REG04a_C: howto manager. (line 2011) +* BFD_RELOC_16C_REG14: howto manager. (line 2012) +* BFD_RELOC_16C_REG14_C: howto manager. (line 2013) +* BFD_RELOC_16C_REG16: howto manager. (line 2014) +* BFD_RELOC_16C_REG16_C: howto manager. (line 2015) +* BFD_RELOC_16C_REG20: howto manager. (line 2016) +* BFD_RELOC_16C_REG20_C: howto manager. (line 2017) +* BFD_RELOC_23_PCREL_S2: howto manager. (line 108) +* BFD_RELOC_24: howto manager. (line 29) +* BFD_RELOC_24_PCREL: howto manager. (line 37) +* BFD_RELOC_24_PLT_PCREL: howto manager. (line 62) +* BFD_RELOC_26: howto manager. (line 28) +* BFD_RELOC_32: howto manager. (line 27) +* BFD_RELOC_32_BASEREL: howto manager. (line 94) +* BFD_RELOC_32_GOT_PCREL: howto manager. (line 51) +* BFD_RELOC_32_GOTOFF: howto manager. (line 54) +* BFD_RELOC_32_PCREL: howto manager. (line 36) +* BFD_RELOC_32_PCREL_S2: howto manager. (line 106) +* BFD_RELOC_32_PLT_PCREL: howto manager. (line 61) +* BFD_RELOC_32_PLTOFF: howto manager. (line 66) +* BFD_RELOC_32_SECREL: howto manager. (line 48) +* BFD_RELOC_386_COPY: howto manager. (line 540) +* BFD_RELOC_386_GLOB_DAT: howto manager. (line 541) +* BFD_RELOC_386_GOT32: howto manager. (line 538) +* BFD_RELOC_386_GOTOFF: howto manager. (line 544) +* BFD_RELOC_386_GOTPC: howto manager. (line 545) +* BFD_RELOC_386_IRELATIVE: howto manager. (line 561) +* BFD_RELOC_386_JUMP_SLOT: howto manager. (line 542) +* BFD_RELOC_386_PLT32: howto manager. (line 539) +* BFD_RELOC_386_RELATIVE: howto manager. (line 543) +* BFD_RELOC_386_TLS_DESC: howto manager. (line 560) +* BFD_RELOC_386_TLS_DESC_CALL: howto manager. (line 559) +* BFD_RELOC_386_TLS_DTPMOD32: howto manager. (line 555) +* BFD_RELOC_386_TLS_DTPOFF32: howto manager. (line 556) +* BFD_RELOC_386_TLS_GD: howto manager. (line 550) +* BFD_RELOC_386_TLS_GOTDESC: howto manager. (line 558) +* BFD_RELOC_386_TLS_GOTIE: howto manager. (line 548) +* BFD_RELOC_386_TLS_IE: howto manager. (line 547) +* BFD_RELOC_386_TLS_IE_32: howto manager. (line 553) +* BFD_RELOC_386_TLS_LDM: howto manager. (line 551) +* BFD_RELOC_386_TLS_LDO_32: howto manager. (line 552) +* BFD_RELOC_386_TLS_LE: howto manager. (line 549) +* BFD_RELOC_386_TLS_LE_32: howto manager. (line 554) +* BFD_RELOC_386_TLS_TPOFF: howto manager. (line 546) +* BFD_RELOC_386_TLS_TPOFF32: howto manager. (line 557) +* BFD_RELOC_390_12: howto manager. (line 1678) +* BFD_RELOC_390_20: howto manager. (line 1778) +* BFD_RELOC_390_COPY: howto manager. (line 1687) +* BFD_RELOC_390_GLOB_DAT: howto manager. (line 1690) +* BFD_RELOC_390_GOT12: howto manager. (line 1681) +* BFD_RELOC_390_GOT16: howto manager. (line 1702) +* BFD_RELOC_390_GOT20: howto manager. (line 1779) +* BFD_RELOC_390_GOT64: howto manager. (line 1720) +* BFD_RELOC_390_GOTENT: howto manager. (line 1726) +* BFD_RELOC_390_GOTOFF64: howto manager. (line 1729) +* BFD_RELOC_390_GOTPC: howto manager. (line 1699) +* BFD_RELOC_390_GOTPCDBL: howto manager. (line 1717) +* BFD_RELOC_390_GOTPLT12: howto manager. (line 1732) +* BFD_RELOC_390_GOTPLT16: howto manager. (line 1735) +* BFD_RELOC_390_GOTPLT20: howto manager. (line 1780) +* BFD_RELOC_390_GOTPLT32: howto manager. (line 1738) +* BFD_RELOC_390_GOTPLT64: howto manager. (line 1741) +* BFD_RELOC_390_GOTPLTENT: howto manager. (line 1744) +* BFD_RELOC_390_JMP_SLOT: howto manager. (line 1693) +* BFD_RELOC_390_PC16DBL: howto manager. (line 1705) +* BFD_RELOC_390_PC32DBL: howto manager. (line 1711) +* BFD_RELOC_390_PLT16DBL: howto manager. (line 1708) +* BFD_RELOC_390_PLT32: howto manager. (line 1684) +* BFD_RELOC_390_PLT32DBL: howto manager. (line 1714) +* BFD_RELOC_390_PLT64: howto manager. (line 1723) +* BFD_RELOC_390_PLTOFF16: howto manager. (line 1747) +* BFD_RELOC_390_PLTOFF32: howto manager. (line 1750) +* BFD_RELOC_390_PLTOFF64: howto manager. (line 1753) +* BFD_RELOC_390_RELATIVE: howto manager. (line 1696) +* BFD_RELOC_390_TLS_DTPMOD: howto manager. (line 1773) +* BFD_RELOC_390_TLS_DTPOFF: howto manager. (line 1774) +* BFD_RELOC_390_TLS_GD32: howto manager. (line 1759) +* BFD_RELOC_390_TLS_GD64: howto manager. (line 1760) +* BFD_RELOC_390_TLS_GDCALL: howto manager. (line 1757) +* BFD_RELOC_390_TLS_GOTIE12: howto manager. (line 1761) +* BFD_RELOC_390_TLS_GOTIE20: howto manager. (line 1781) +* BFD_RELOC_390_TLS_GOTIE32: howto manager. (line 1762) +* BFD_RELOC_390_TLS_GOTIE64: howto manager. (line 1763) +* BFD_RELOC_390_TLS_IE32: howto manager. (line 1766) +* BFD_RELOC_390_TLS_IE64: howto manager. (line 1767) +* BFD_RELOC_390_TLS_IEENT: howto manager. (line 1768) +* BFD_RELOC_390_TLS_LDCALL: howto manager. (line 1758) +* BFD_RELOC_390_TLS_LDM32: howto manager. (line 1764) +* BFD_RELOC_390_TLS_LDM64: howto manager. (line 1765) +* BFD_RELOC_390_TLS_LDO32: howto manager. (line 1771) +* BFD_RELOC_390_TLS_LDO64: howto manager. (line 1772) +* BFD_RELOC_390_TLS_LE32: howto manager. (line 1769) +* BFD_RELOC_390_TLS_LE64: howto manager. (line 1770) +* BFD_RELOC_390_TLS_LOAD: howto manager. (line 1756) +* BFD_RELOC_390_TLS_TPOFF: howto manager. (line 1775) +* BFD_RELOC_64: howto manager. (line 26) +* BFD_RELOC_64_PCREL: howto manager. (line 35) +* BFD_RELOC_64_PLT_PCREL: howto manager. (line 60) +* BFD_RELOC_64_PLTOFF: howto manager. (line 65) +* BFD_RELOC_68K_GLOB_DAT: howto manager. (line 74) +* BFD_RELOC_68K_JMP_SLOT: howto manager. (line 75) +* BFD_RELOC_68K_RELATIVE: howto manager. (line 76) +* BFD_RELOC_68K_TLS_GD16: howto manager. (line 78) +* BFD_RELOC_68K_TLS_GD32: howto manager. (line 77) +* BFD_RELOC_68K_TLS_GD8: howto manager. (line 79) +* BFD_RELOC_68K_TLS_IE16: howto manager. (line 87) +* BFD_RELOC_68K_TLS_IE32: howto manager. (line 86) +* BFD_RELOC_68K_TLS_IE8: howto manager. (line 88) +* BFD_RELOC_68K_TLS_LDM16: howto manager. (line 81) +* BFD_RELOC_68K_TLS_LDM32: howto manager. (line 80) +* BFD_RELOC_68K_TLS_LDM8: howto manager. (line 82) +* BFD_RELOC_68K_TLS_LDO16: howto manager. (line 84) +* BFD_RELOC_68K_TLS_LDO32: howto manager. (line 83) +* BFD_RELOC_68K_TLS_LDO8: howto manager. (line 85) +* BFD_RELOC_68K_TLS_LE16: howto manager. (line 90) +* BFD_RELOC_68K_TLS_LE32: howto manager. (line 89) +* BFD_RELOC_68K_TLS_LE8: howto manager. (line 91) +* BFD_RELOC_8: howto manager. (line 32) +* BFD_RELOC_860_COPY: howto manager. (line 2146) +* BFD_RELOC_860_GLOB_DAT: howto manager. (line 2147) +* BFD_RELOC_860_HAGOT: howto manager. (line 2172) +* BFD_RELOC_860_HAGOTOFF: howto manager. (line 2173) +* BFD_RELOC_860_HAPC: howto manager. (line 2174) +* BFD_RELOC_860_HIGH: howto manager. (line 2175) +* BFD_RELOC_860_HIGHADJ: howto manager. (line 2171) +* BFD_RELOC_860_HIGOT: howto manager. (line 2176) +* BFD_RELOC_860_HIGOTOFF: howto manager. (line 2177) +* BFD_RELOC_860_JUMP_SLOT: howto manager. (line 2148) +* BFD_RELOC_860_LOGOT0: howto manager. (line 2160) +* BFD_RELOC_860_LOGOT1: howto manager. (line 2162) +* BFD_RELOC_860_LOGOTOFF0: howto manager. (line 2164) +* BFD_RELOC_860_LOGOTOFF1: howto manager. (line 2166) +* BFD_RELOC_860_LOGOTOFF2: howto manager. (line 2168) +* BFD_RELOC_860_LOGOTOFF3: howto manager. (line 2169) +* BFD_RELOC_860_LOPC: howto manager. (line 2170) +* BFD_RELOC_860_LOW0: howto manager. (line 2153) +* BFD_RELOC_860_LOW1: howto manager. (line 2155) +* BFD_RELOC_860_LOW2: howto manager. (line 2157) +* BFD_RELOC_860_LOW3: howto manager. (line 2159) +* BFD_RELOC_860_PC16: howto manager. (line 2152) +* BFD_RELOC_860_PC26: howto manager. (line 2150) +* BFD_RELOC_860_PLT26: howto manager. (line 2151) +* BFD_RELOC_860_RELATIVE: howto manager. (line 2149) +* BFD_RELOC_860_SPGOT0: howto manager. (line 2161) +* BFD_RELOC_860_SPGOT1: howto manager. (line 2163) +* BFD_RELOC_860_SPGOTOFF0: howto manager. (line 2165) +* BFD_RELOC_860_SPGOTOFF1: howto manager. (line 2167) +* BFD_RELOC_860_SPLIT0: howto manager. (line 2154) +* BFD_RELOC_860_SPLIT1: howto manager. (line 2156) +* BFD_RELOC_860_SPLIT2: howto manager. (line 2158) +* BFD_RELOC_8_BASEREL: howto manager. (line 99) +* BFD_RELOC_8_FFnn: howto manager. (line 103) +* BFD_RELOC_8_GOT_PCREL: howto manager. (line 53) +* BFD_RELOC_8_GOTOFF: howto manager. (line 59) +* BFD_RELOC_8_PCREL: howto manager. (line 40) +* BFD_RELOC_8_PLT_PCREL: howto manager. (line 64) +* BFD_RELOC_8_PLTOFF: howto manager. (line 71) +* BFD_RELOC_ALPHA_BOH: howto manager. (line 315) +* BFD_RELOC_ALPHA_BRSGP: howto manager. (line 298) +* BFD_RELOC_ALPHA_BSR: howto manager. (line 307) +* BFD_RELOC_ALPHA_CODEADDR: howto manager. (line 289) +* BFD_RELOC_ALPHA_DTPMOD64: howto manager. (line 321) +* BFD_RELOC_ALPHA_DTPREL16: howto manager. (line 326) +* BFD_RELOC_ALPHA_DTPREL64: howto manager. (line 323) +* BFD_RELOC_ALPHA_DTPREL_HI16: howto manager. (line 324) +* BFD_RELOC_ALPHA_DTPREL_LO16: howto manager. (line 325) +* BFD_RELOC_ALPHA_ELF_LITERAL: howto manager. (line 254) +* BFD_RELOC_ALPHA_GOTDTPREL16: howto manager. (line 322) +* BFD_RELOC_ALPHA_GOTTPREL16: howto manager. (line 327) +* BFD_RELOC_ALPHA_GPDISP: howto manager. (line 248) +* BFD_RELOC_ALPHA_GPDISP_HI16: howto manager. (line 234) +* BFD_RELOC_ALPHA_GPDISP_LO16: howto manager. (line 242) +* BFD_RELOC_ALPHA_GPREL_HI16: howto manager. (line 293) +* BFD_RELOC_ALPHA_GPREL_LO16: howto manager. (line 294) +* BFD_RELOC_ALPHA_HINT: howto manager. (line 280) +* BFD_RELOC_ALPHA_LDA: howto manager. (line 311) +* BFD_RELOC_ALPHA_LINKAGE: howto manager. (line 285) +* BFD_RELOC_ALPHA_LITERAL: howto manager. (line 253) +* BFD_RELOC_ALPHA_LITUSE: howto manager. (line 255) +* BFD_RELOC_ALPHA_NOP: howto manager. (line 303) +* BFD_RELOC_ALPHA_TLSGD: howto manager. (line 319) +* BFD_RELOC_ALPHA_TLSLDM: howto manager. (line 320) +* BFD_RELOC_ALPHA_TPREL16: howto manager. (line 331) +* BFD_RELOC_ALPHA_TPREL64: howto manager. (line 328) +* BFD_RELOC_ALPHA_TPREL_HI16: howto manager. (line 329) +* BFD_RELOC_ALPHA_TPREL_LO16: howto manager. (line 330) +* BFD_RELOC_ARC_B22_PCREL: howto manager. (line 987) +* BFD_RELOC_ARC_B26: howto manager. (line 992) +* BFD_RELOC_ARM_ADR_IMM: howto manager. (line 873) +* BFD_RELOC_ARM_ADRL_IMMEDIATE: howto manager. (line 859) +* BFD_RELOC_ARM_ALU_PC_G0: howto manager. (line 823) +* BFD_RELOC_ARM_ALU_PC_G0_NC: howto manager. (line 822) +* BFD_RELOC_ARM_ALU_PC_G1: howto manager. (line 825) +* BFD_RELOC_ARM_ALU_PC_G1_NC: howto manager. (line 824) +* BFD_RELOC_ARM_ALU_PC_G2: howto manager. (line 826) +* BFD_RELOC_ARM_ALU_SB_G0: howto manager. (line 837) +* BFD_RELOC_ARM_ALU_SB_G0_NC: howto manager. (line 836) +* BFD_RELOC_ARM_ALU_SB_G1: howto manager. (line 839) +* BFD_RELOC_ARM_ALU_SB_G1_NC: howto manager. (line 838) +* BFD_RELOC_ARM_ALU_SB_G2: howto manager. (line 840) +* BFD_RELOC_ARM_CP_OFF_IMM: howto manager. (line 869) +* BFD_RELOC_ARM_CP_OFF_IMM_S2: howto manager. (line 870) +* BFD_RELOC_ARM_GLOB_DAT: howto manager. (line 797) +* BFD_RELOC_ARM_GOT32: howto manager. (line 798) +* BFD_RELOC_ARM_GOT_PREL: howto manager. (line 803) +* BFD_RELOC_ARM_GOTOFF: howto manager. (line 801) +* BFD_RELOC_ARM_GOTPC: howto manager. (line 802) +* BFD_RELOC_ARM_HVC: howto manager. (line 866) +* BFD_RELOC_ARM_HWLITERAL: howto manager. (line 880) +* BFD_RELOC_ARM_IMMEDIATE: howto manager. (line 858) +* BFD_RELOC_ARM_IN_POOL: howto manager. (line 876) +* BFD_RELOC_ARM_IRELATIVE: howto manager. (line 855) +* BFD_RELOC_ARM_JUMP_SLOT: howto manager. (line 796) +* BFD_RELOC_ARM_LDC_PC_G0: howto manager. (line 833) +* BFD_RELOC_ARM_LDC_PC_G1: howto manager. (line 834) +* BFD_RELOC_ARM_LDC_PC_G2: howto manager. (line 835) +* BFD_RELOC_ARM_LDC_SB_G0: howto manager. (line 847) +* BFD_RELOC_ARM_LDC_SB_G1: howto manager. (line 848) +* BFD_RELOC_ARM_LDC_SB_G2: howto manager. (line 849) +* BFD_RELOC_ARM_LDR_IMM: howto manager. (line 874) +* BFD_RELOC_ARM_LDR_PC_G0: howto manager. (line 827) +* BFD_RELOC_ARM_LDR_PC_G1: howto manager. (line 828) +* BFD_RELOC_ARM_LDR_PC_G2: howto manager. (line 829) +* BFD_RELOC_ARM_LDR_SB_G0: howto manager. (line 841) +* BFD_RELOC_ARM_LDR_SB_G1: howto manager. (line 842) +* BFD_RELOC_ARM_LDR_SB_G2: howto manager. (line 843) +* BFD_RELOC_ARM_LDRS_PC_G0: howto manager. (line 830) +* BFD_RELOC_ARM_LDRS_PC_G1: howto manager. (line 831) +* BFD_RELOC_ARM_LDRS_PC_G2: howto manager. (line 832) +* BFD_RELOC_ARM_LDRS_SB_G0: howto manager. (line 844) +* BFD_RELOC_ARM_LDRS_SB_G1: howto manager. (line 845) +* BFD_RELOC_ARM_LDRS_SB_G2: howto manager. (line 846) +* BFD_RELOC_ARM_LITERAL: howto manager. (line 875) +* BFD_RELOC_ARM_MOVT: howto manager. (line 787) +* BFD_RELOC_ARM_MOVT_PCREL: howto manager. (line 789) +* BFD_RELOC_ARM_MOVW: howto manager. (line 786) +* BFD_RELOC_ARM_MOVW_PCREL: howto manager. (line 788) +* BFD_RELOC_ARM_MULTI: howto manager. (line 868) +* BFD_RELOC_ARM_OFFSET_IMM: howto manager. (line 760) +* BFD_RELOC_ARM_OFFSET_IMM8: howto manager. (line 877) +* BFD_RELOC_ARM_PCREL_BLX: howto manager. (line 731) +* BFD_RELOC_ARM_PCREL_BRANCH: howto manager. (line 727) +* BFD_RELOC_ARM_PCREL_CALL: howto manager. (line 741) +* BFD_RELOC_ARM_PCREL_JUMP: howto manager. (line 745) +* BFD_RELOC_ARM_PLT32: howto manager. (line 799) +* BFD_RELOC_ARM_PREL31: howto manager. (line 783) +* BFD_RELOC_ARM_RELATIVE: howto manager. (line 800) +* BFD_RELOC_ARM_ROSEGREL32: howto manager. (line 772) +* BFD_RELOC_ARM_SBREL32: howto manager. (line 775) +* BFD_RELOC_ARM_SHIFT_IMM: howto manager. (line 864) +* BFD_RELOC_ARM_SMC: howto manager. (line 865) +* BFD_RELOC_ARM_SWI: howto manager. (line 867) +* BFD_RELOC_ARM_T32_ADD_IMM: howto manager. (line 861) +* BFD_RELOC_ARM_T32_ADD_PC12: howto manager. (line 863) +* BFD_RELOC_ARM_T32_CP_OFF_IMM: howto manager. (line 871) +* BFD_RELOC_ARM_T32_CP_OFF_IMM_S2: howto manager. (line 872) +* BFD_RELOC_ARM_T32_IMM12: howto manager. (line 862) +* BFD_RELOC_ARM_T32_IMMEDIATE: howto manager. (line 860) +* BFD_RELOC_ARM_T32_OFFSET_IMM: howto manager. (line 879) +* BFD_RELOC_ARM_T32_OFFSET_U8: howto manager. (line 878) +* BFD_RELOC_ARM_TARGET1: howto manager. (line 768) +* BFD_RELOC_ARM_TARGET2: howto manager. (line 778) +* BFD_RELOC_ARM_THM_TLS_CALL: howto manager. (line 816) +* BFD_RELOC_ARM_THM_TLS_DESCSEQ: howto manager. (line 818) +* BFD_RELOC_ARM_THUMB_ADD: howto manager. (line 881) +* BFD_RELOC_ARM_THUMB_IMM: howto manager. (line 882) +* BFD_RELOC_ARM_THUMB_MOVT: howto manager. (line 791) +* BFD_RELOC_ARM_THUMB_MOVT_PCREL: howto manager. (line 793) +* BFD_RELOC_ARM_THUMB_MOVW: howto manager. (line 790) +* BFD_RELOC_ARM_THUMB_MOVW_PCREL: howto manager. (line 792) +* BFD_RELOC_ARM_THUMB_OFFSET: howto manager. (line 764) +* BFD_RELOC_ARM_THUMB_SHIFT: howto manager. (line 883) +* BFD_RELOC_ARM_TLS_CALL: howto manager. (line 815) +* BFD_RELOC_ARM_TLS_DESC: howto manager. (line 819) +* BFD_RELOC_ARM_TLS_DESCSEQ: howto manager. (line 817) +* BFD_RELOC_ARM_TLS_DTPMOD32: howto manager. (line 810) +* BFD_RELOC_ARM_TLS_DTPOFF32: howto manager. (line 809) +* BFD_RELOC_ARM_TLS_GD32: howto manager. (line 806) +* BFD_RELOC_ARM_TLS_GOTDESC: howto manager. (line 814) +* BFD_RELOC_ARM_TLS_IE32: howto manager. (line 812) +* BFD_RELOC_ARM_TLS_LDM32: howto manager. (line 808) +* BFD_RELOC_ARM_TLS_LDO32: howto manager. (line 807) +* BFD_RELOC_ARM_TLS_LE32: howto manager. (line 813) +* BFD_RELOC_ARM_TLS_TPOFF32: howto manager. (line 811) +* BFD_RELOC_ARM_V4BX: howto manager. (line 852) +* BFD_RELOC_AVR_13_PCREL: howto manager. (line 1550) +* BFD_RELOC_AVR_16_PM: howto manager. (line 1554) +* BFD_RELOC_AVR_6: howto manager. (line 1641) +* BFD_RELOC_AVR_6_ADIW: howto manager. (line 1645) +* BFD_RELOC_AVR_7_PCREL: howto manager. (line 1546) +* BFD_RELOC_AVR_CALL: howto manager. (line 1633) +* BFD_RELOC_AVR_HH8_LDI: howto manager. (line 1566) +* BFD_RELOC_AVR_HH8_LDI_NEG: howto manager. (line 1585) +* BFD_RELOC_AVR_HH8_LDI_PM: howto manager. (line 1614) +* BFD_RELOC_AVR_HH8_LDI_PM_NEG: howto manager. (line 1628) +* BFD_RELOC_AVR_HI8_LDI: howto manager. (line 1562) +* BFD_RELOC_AVR_HI8_LDI_GS: howto manager. (line 1608) +* BFD_RELOC_AVR_HI8_LDI_NEG: howto manager. (line 1580) +* BFD_RELOC_AVR_HI8_LDI_PM: howto manager. (line 1604) +* BFD_RELOC_AVR_HI8_LDI_PM_NEG: howto manager. (line 1623) +* BFD_RELOC_AVR_LDI: howto manager. (line 1637) +* BFD_RELOC_AVR_LO8_LDI: howto manager. (line 1558) +* BFD_RELOC_AVR_LO8_LDI_GS: howto manager. (line 1598) +* BFD_RELOC_AVR_LO8_LDI_NEG: howto manager. (line 1575) +* BFD_RELOC_AVR_LO8_LDI_PM: howto manager. (line 1594) +* BFD_RELOC_AVR_LO8_LDI_PM_NEG: howto manager. (line 1619) +* BFD_RELOC_AVR_MS8_LDI: howto manager. (line 1571) +* BFD_RELOC_AVR_MS8_LDI_NEG: howto manager. (line 1590) +* BFD_RELOC_BFIN_10_PCREL: howto manager. (line 1012) +* BFD_RELOC_BFIN_11_PCREL: howto manager. (line 1015) +* BFD_RELOC_BFIN_12_PCREL_JUMP: howto manager. (line 1018) +* BFD_RELOC_BFIN_12_PCREL_JUMP_S: howto manager. (line 1021) +* BFD_RELOC_BFIN_16_HIGH: howto manager. (line 1000) +* BFD_RELOC_BFIN_16_IMM: howto manager. (line 997) +* BFD_RELOC_BFIN_16_LOW: howto manager. (line 1009) +* BFD_RELOC_BFIN_24_PCREL_CALL_X: howto manager. (line 1024) +* BFD_RELOC_BFIN_24_PCREL_JUMP_L: howto manager. (line 1027) +* BFD_RELOC_BFIN_4_PCREL: howto manager. (line 1003) +* BFD_RELOC_BFIN_5_PCREL: howto manager. (line 1006) +* BFD_RELOC_BFIN_FUNCDESC: howto manager. (line 1033) +* BFD_RELOC_BFIN_FUNCDESC_GOT17M4: howto manager. (line 1034) +* BFD_RELOC_BFIN_FUNCDESC_GOTHI: howto manager. (line 1035) +* BFD_RELOC_BFIN_FUNCDESC_GOTLO: howto manager. (line 1036) +* BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4: howto manager. (line 1038) +* BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI: howto manager. (line 1039) +* BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO: howto manager. (line 1040) +* BFD_RELOC_BFIN_FUNCDESC_VALUE: howto manager. (line 1037) +* BFD_RELOC_BFIN_GOT: howto manager. (line 1046) +* BFD_RELOC_BFIN_GOT17M4: howto manager. (line 1030) +* BFD_RELOC_BFIN_GOTHI: howto manager. (line 1031) +* BFD_RELOC_BFIN_GOTLO: howto manager. (line 1032) +* BFD_RELOC_BFIN_GOTOFF17M4: howto manager. (line 1041) +* BFD_RELOC_BFIN_GOTOFFHI: howto manager. (line 1042) +* BFD_RELOC_BFIN_GOTOFFLO: howto manager. (line 1043) +* BFD_RELOC_BFIN_PLTPC: howto manager. (line 1049) +* BFD_RELOC_C6000_ABS_H16: howto manager. (line 1409) +* BFD_RELOC_C6000_ABS_L16: howto manager. (line 1408) +* BFD_RELOC_C6000_ABS_S16: howto manager. (line 1407) +* BFD_RELOC_C6000_ALIGN: howto manager. (line 1430) +* BFD_RELOC_C6000_COPY: howto manager. (line 1425) +* BFD_RELOC_C6000_DSBT_INDEX: howto manager. (line 1423) +* BFD_RELOC_C6000_EHTYPE: howto manager. (line 1427) +* BFD_RELOC_C6000_FPHEAD: howto manager. (line 1431) +* BFD_RELOC_C6000_JUMP_SLOT: howto manager. (line 1426) +* BFD_RELOC_C6000_NOCMP: howto manager. (line 1432) +* BFD_RELOC_C6000_PCR_H16: howto manager. (line 1428) +* BFD_RELOC_C6000_PCR_L16: howto manager. (line 1429) +* BFD_RELOC_C6000_PCR_S10: howto manager. (line 1405) +* BFD_RELOC_C6000_PCR_S12: howto manager. (line 1404) +* BFD_RELOC_C6000_PCR_S21: howto manager. (line 1403) +* BFD_RELOC_C6000_PCR_S7: howto manager. (line 1406) +* BFD_RELOC_C6000_PREL31: howto manager. (line 1424) +* BFD_RELOC_C6000_SBR_GOT_H16_W: howto manager. (line 1422) +* BFD_RELOC_C6000_SBR_GOT_L16_W: howto manager. (line 1421) +* BFD_RELOC_C6000_SBR_GOT_U15_W: howto manager. (line 1420) +* BFD_RELOC_C6000_SBR_H16_B: howto manager. (line 1417) +* BFD_RELOC_C6000_SBR_H16_H: howto manager. (line 1418) +* BFD_RELOC_C6000_SBR_H16_W: howto manager. (line 1419) +* BFD_RELOC_C6000_SBR_L16_B: howto manager. (line 1414) +* BFD_RELOC_C6000_SBR_L16_H: howto manager. (line 1415) +* BFD_RELOC_C6000_SBR_L16_W: howto manager. (line 1416) +* BFD_RELOC_C6000_SBR_S16: howto manager. (line 1413) +* BFD_RELOC_C6000_SBR_U15_B: howto manager. (line 1410) +* BFD_RELOC_C6000_SBR_U15_H: howto manager. (line 1411) +* BFD_RELOC_C6000_SBR_U15_W: howto manager. (line 1412) +* bfd_reloc_code_type: howto manager. (line 10) +* BFD_RELOC_CR16_ABS20: howto manager. (line 2046) +* BFD_RELOC_CR16_ABS24: howto manager. (line 2047) +* BFD_RELOC_CR16_DISP16: howto manager. (line 2057) +* BFD_RELOC_CR16_DISP20: howto manager. (line 2058) +* BFD_RELOC_CR16_DISP24: howto manager. (line 2059) +* BFD_RELOC_CR16_DISP24a: howto manager. (line 2060) +* BFD_RELOC_CR16_DISP4: howto manager. (line 2055) +* BFD_RELOC_CR16_DISP8: howto manager. (line 2056) +* BFD_RELOC_CR16_GLOB_DAT: howto manager. (line 2066) +* BFD_RELOC_CR16_GOT_REGREL20: howto manager. (line 2064) +* BFD_RELOC_CR16_GOTC_REGREL20: howto manager. (line 2065) +* BFD_RELOC_CR16_IMM16: howto manager. (line 2050) +* BFD_RELOC_CR16_IMM20: howto manager. (line 2051) +* BFD_RELOC_CR16_IMM24: howto manager. (line 2052) +* BFD_RELOC_CR16_IMM32: howto manager. (line 2053) +* BFD_RELOC_CR16_IMM32a: howto manager. (line 2054) +* BFD_RELOC_CR16_IMM4: howto manager. (line 2048) +* BFD_RELOC_CR16_IMM8: howto manager. (line 2049) +* BFD_RELOC_CR16_NUM16: howto manager. (line 2035) +* BFD_RELOC_CR16_NUM32: howto manager. (line 2036) +* BFD_RELOC_CR16_NUM32a: howto manager. (line 2037) +* BFD_RELOC_CR16_NUM8: howto manager. (line 2034) +* BFD_RELOC_CR16_REGREL0: howto manager. (line 2038) +* BFD_RELOC_CR16_REGREL14: howto manager. (line 2041) +* BFD_RELOC_CR16_REGREL14a: howto manager. (line 2042) +* BFD_RELOC_CR16_REGREL16: howto manager. (line 2043) +* BFD_RELOC_CR16_REGREL20: howto manager. (line 2044) +* BFD_RELOC_CR16_REGREL20a: howto manager. (line 2045) +* BFD_RELOC_CR16_REGREL4: howto manager. (line 2039) +* BFD_RELOC_CR16_REGREL4a: howto manager. (line 2040) +* BFD_RELOC_CR16_SWITCH16: howto manager. (line 2062) +* BFD_RELOC_CR16_SWITCH32: howto manager. (line 2063) +* BFD_RELOC_CR16_SWITCH8: howto manager. (line 2061) +* BFD_RELOC_CRIS_16_DTPREL: howto manager. (line 2137) +* BFD_RELOC_CRIS_16_GOT: howto manager. (line 2113) +* BFD_RELOC_CRIS_16_GOT_GD: howto manager. (line 2133) +* BFD_RELOC_CRIS_16_GOT_TPREL: howto manager. (line 2139) +* BFD_RELOC_CRIS_16_GOTPLT: howto manager. (line 2119) +* BFD_RELOC_CRIS_16_TPREL: howto manager. (line 2141) +* BFD_RELOC_CRIS_32_DTPREL: howto manager. (line 2136) +* BFD_RELOC_CRIS_32_GD: howto manager. (line 2134) +* BFD_RELOC_CRIS_32_GOT: howto manager. (line 2110) +* BFD_RELOC_CRIS_32_GOT_GD: howto manager. (line 2132) +* BFD_RELOC_CRIS_32_GOT_TPREL: howto manager. (line 2138) +* BFD_RELOC_CRIS_32_GOTPLT: howto manager. (line 2116) +* BFD_RELOC_CRIS_32_GOTREL: howto manager. (line 2122) +* BFD_RELOC_CRIS_32_IE: howto manager. (line 2143) +* BFD_RELOC_CRIS_32_PLT_GOTREL: howto manager. (line 2125) +* BFD_RELOC_CRIS_32_PLT_PCREL: howto manager. (line 2128) +* BFD_RELOC_CRIS_32_TPREL: howto manager. (line 2140) +* BFD_RELOC_CRIS_BDISP8: howto manager. (line 2091) +* BFD_RELOC_CRIS_COPY: howto manager. (line 2104) +* BFD_RELOC_CRIS_DTP: howto manager. (line 2135) +* BFD_RELOC_CRIS_DTPMOD: howto manager. (line 2142) +* BFD_RELOC_CRIS_GLOB_DAT: howto manager. (line 2105) +* BFD_RELOC_CRIS_JUMP_SLOT: howto manager. (line 2106) +* BFD_RELOC_CRIS_LAPCQ_OFFSET: howto manager. (line 2099) +* BFD_RELOC_CRIS_RELATIVE: howto manager. (line 2107) +* BFD_RELOC_CRIS_SIGNED_16: howto manager. (line 2097) +* BFD_RELOC_CRIS_SIGNED_6: howto manager. (line 2093) +* BFD_RELOC_CRIS_SIGNED_8: howto manager. (line 2095) +* BFD_RELOC_CRIS_UNSIGNED_16: howto manager. (line 2098) +* BFD_RELOC_CRIS_UNSIGNED_4: howto manager. (line 2100) +* BFD_RELOC_CRIS_UNSIGNED_5: howto manager. (line 2092) +* BFD_RELOC_CRIS_UNSIGNED_6: howto manager. (line 2094) +* BFD_RELOC_CRIS_UNSIGNED_8: howto manager. (line 2096) +* BFD_RELOC_CRX_ABS16: howto manager. (line 2079) +* BFD_RELOC_CRX_ABS32: howto manager. (line 2080) +* BFD_RELOC_CRX_IMM16: howto manager. (line 2084) +* BFD_RELOC_CRX_IMM32: howto manager. (line 2085) +* BFD_RELOC_CRX_NUM16: howto manager. (line 2082) +* BFD_RELOC_CRX_NUM32: howto manager. (line 2083) +* BFD_RELOC_CRX_NUM8: howto manager. (line 2081) +* BFD_RELOC_CRX_REGREL12: howto manager. (line 2075) +* BFD_RELOC_CRX_REGREL22: howto manager. (line 2076) +* BFD_RELOC_CRX_REGREL28: howto manager. (line 2077) +* BFD_RELOC_CRX_REGREL32: howto manager. (line 2078) +* BFD_RELOC_CRX_REL16: howto manager. (line 2072) +* BFD_RELOC_CRX_REL24: howto manager. (line 2073) +* BFD_RELOC_CRX_REL32: howto manager. (line 2074) +* BFD_RELOC_CRX_REL4: howto manager. (line 2069) +* BFD_RELOC_CRX_REL8: howto manager. (line 2070) +* BFD_RELOC_CRX_REL8_CMP: howto manager. (line 2071) +* BFD_RELOC_CRX_SWITCH16: howto manager. (line 2087) +* BFD_RELOC_CRX_SWITCH32: howto manager. (line 2088) +* BFD_RELOC_CRX_SWITCH8: howto manager. (line 2086) +* BFD_RELOC_CTOR: howto manager. (line 721) +* BFD_RELOC_D10V_10_PCREL_L: howto manager. (line 1116) +* BFD_RELOC_D10V_10_PCREL_R: howto manager. (line 1112) +* BFD_RELOC_D10V_18: howto manager. (line 1121) +* BFD_RELOC_D10V_18_PCREL: howto manager. (line 1124) +* BFD_RELOC_D30V_15: howto manager. (line 1139) +* BFD_RELOC_D30V_15_PCREL: howto manager. (line 1143) +* BFD_RELOC_D30V_15_PCREL_R: howto manager. (line 1147) +* BFD_RELOC_D30V_21: howto manager. (line 1152) +* BFD_RELOC_D30V_21_PCREL: howto manager. (line 1156) +* BFD_RELOC_D30V_21_PCREL_R: howto manager. (line 1160) +* BFD_RELOC_D30V_32: howto manager. (line 1165) +* BFD_RELOC_D30V_32_PCREL: howto manager. (line 1168) +* BFD_RELOC_D30V_6: howto manager. (line 1127) +* BFD_RELOC_D30V_9_PCREL: howto manager. (line 1130) +* BFD_RELOC_D30V_9_PCREL_R: howto manager. (line 1134) +* BFD_RELOC_DLX_HI16_S: howto manager. (line 1171) +* BFD_RELOC_DLX_JMP26: howto manager. (line 1177) +* BFD_RELOC_DLX_LO16: howto manager. (line 1174) +* BFD_RELOC_FR30_10_IN_8: howto manager. (line 1454) +* BFD_RELOC_FR30_12_PCREL: howto manager. (line 1462) +* BFD_RELOC_FR30_20: howto manager. (line 1438) +* BFD_RELOC_FR30_48: howto manager. (line 1435) +* BFD_RELOC_FR30_6_IN_4: howto manager. (line 1442) +* BFD_RELOC_FR30_8_IN_8: howto manager. (line 1446) +* BFD_RELOC_FR30_9_IN_8: howto manager. (line 1450) +* BFD_RELOC_FR30_9_PCREL: howto manager. (line 1458) +* BFD_RELOC_FRV_FUNCDESC: howto manager. (line 473) +* BFD_RELOC_FRV_FUNCDESC_GOT12: howto manager. (line 474) +* BFD_RELOC_FRV_FUNCDESC_GOTHI: howto manager. (line 475) +* BFD_RELOC_FRV_FUNCDESC_GOTLO: howto manager. (line 476) +* BFD_RELOC_FRV_FUNCDESC_GOTOFF12: howto manager. (line 478) +* BFD_RELOC_FRV_FUNCDESC_GOTOFFHI: howto manager. (line 479) +* BFD_RELOC_FRV_FUNCDESC_GOTOFFLO: howto manager. (line 480) +* BFD_RELOC_FRV_FUNCDESC_VALUE: howto manager. (line 477) +* BFD_RELOC_FRV_GETTLSOFF: howto manager. (line 484) +* BFD_RELOC_FRV_GETTLSOFF_RELAX: howto manager. (line 497) +* BFD_RELOC_FRV_GOT12: howto manager. (line 470) +* BFD_RELOC_FRV_GOTHI: howto manager. (line 471) +* BFD_RELOC_FRV_GOTLO: howto manager. (line 472) +* BFD_RELOC_FRV_GOTOFF12: howto manager. (line 481) +* BFD_RELOC_FRV_GOTOFFHI: howto manager. (line 482) +* BFD_RELOC_FRV_GOTOFFLO: howto manager. (line 483) +* BFD_RELOC_FRV_GOTTLSDESC12: howto manager. (line 486) +* BFD_RELOC_FRV_GOTTLSDESCHI: howto manager. (line 487) +* BFD_RELOC_FRV_GOTTLSDESCLO: howto manager. (line 488) +* BFD_RELOC_FRV_GOTTLSOFF12: howto manager. (line 492) +* BFD_RELOC_FRV_GOTTLSOFFHI: howto manager. (line 493) +* BFD_RELOC_FRV_GOTTLSOFFLO: howto manager. (line 494) +* BFD_RELOC_FRV_GPREL12: howto manager. (line 465) +* BFD_RELOC_FRV_GPREL32: howto manager. (line 467) +* BFD_RELOC_FRV_GPRELHI: howto manager. (line 468) +* BFD_RELOC_FRV_GPRELLO: howto manager. (line 469) +* BFD_RELOC_FRV_GPRELU12: howto manager. (line 466) +* BFD_RELOC_FRV_HI16: howto manager. (line 464) +* BFD_RELOC_FRV_LABEL16: howto manager. (line 461) +* BFD_RELOC_FRV_LABEL24: howto manager. (line 462) +* BFD_RELOC_FRV_LO16: howto manager. (line 463) +* BFD_RELOC_FRV_TLSDESC_RELAX: howto manager. (line 496) +* BFD_RELOC_FRV_TLSDESC_VALUE: howto manager. (line 485) +* BFD_RELOC_FRV_TLSMOFF: howto manager. (line 499) +* BFD_RELOC_FRV_TLSMOFF12: howto manager. (line 489) +* BFD_RELOC_FRV_TLSMOFFHI: howto manager. (line 490) +* BFD_RELOC_FRV_TLSMOFFLO: howto manager. (line 491) +* BFD_RELOC_FRV_TLSOFF: howto manager. (line 495) +* BFD_RELOC_FRV_TLSOFF_RELAX: howto manager. (line 498) +* BFD_RELOC_GPREL16: howto manager. (line 121) +* BFD_RELOC_GPREL32: howto manager. (line 122) +* BFD_RELOC_H8_DIR16A8: howto manager. (line 2184) +* BFD_RELOC_H8_DIR16R8: howto manager. (line 2185) +* BFD_RELOC_H8_DIR24A8: howto manager. (line 2186) +* BFD_RELOC_H8_DIR24R8: howto manager. (line 2187) +* BFD_RELOC_H8_DIR32A16: howto manager. (line 2188) +* BFD_RELOC_HI16: howto manager. (line 344) +* BFD_RELOC_HI16_BASEREL: howto manager. (line 97) +* BFD_RELOC_HI16_GOTOFF: howto manager. (line 57) +* BFD_RELOC_HI16_PCREL: howto manager. (line 356) +* BFD_RELOC_HI16_PLTOFF: howto manager. (line 69) +* BFD_RELOC_HI16_S: howto manager. (line 347) +* BFD_RELOC_HI16_S_BASEREL: howto manager. (line 98) +* BFD_RELOC_HI16_S_GOTOFF: howto manager. (line 58) +* BFD_RELOC_HI16_S_PCREL: howto manager. (line 359) +* BFD_RELOC_HI16_S_PLTOFF: howto manager. (line 70) +* BFD_RELOC_HI22: howto manager. (line 116) +* BFD_RELOC_I370_D12: howto manager. (line 718) +* BFD_RELOC_I960_CALLJ: howto manager. (line 128) +* BFD_RELOC_IA64_COPY: howto manager. (line 1928) +* BFD_RELOC_IA64_DIR32LSB: howto manager. (line 1873) +* BFD_RELOC_IA64_DIR32MSB: howto manager. (line 1872) +* BFD_RELOC_IA64_DIR64LSB: howto manager. (line 1875) +* BFD_RELOC_IA64_DIR64MSB: howto manager. (line 1874) +* BFD_RELOC_IA64_DTPMOD64LSB: howto manager. (line 1938) +* BFD_RELOC_IA64_DTPMOD64MSB: howto manager. (line 1937) +* BFD_RELOC_IA64_DTPREL14: howto manager. (line 1940) +* BFD_RELOC_IA64_DTPREL22: howto manager. (line 1941) +* BFD_RELOC_IA64_DTPREL32LSB: howto manager. (line 1944) +* BFD_RELOC_IA64_DTPREL32MSB: howto manager. (line 1943) +* BFD_RELOC_IA64_DTPREL64I: howto manager. (line 1942) +* BFD_RELOC_IA64_DTPREL64LSB: howto manager. (line 1946) +* BFD_RELOC_IA64_DTPREL64MSB: howto manager. (line 1945) +* BFD_RELOC_IA64_FPTR32LSB: howto manager. (line 1890) +* BFD_RELOC_IA64_FPTR32MSB: howto manager. (line 1889) +* BFD_RELOC_IA64_FPTR64I: howto manager. (line 1888) +* BFD_RELOC_IA64_FPTR64LSB: howto manager. (line 1892) +* BFD_RELOC_IA64_FPTR64MSB: howto manager. (line 1891) +* BFD_RELOC_IA64_GPREL22: howto manager. (line 1876) +* BFD_RELOC_IA64_GPREL32LSB: howto manager. (line 1879) +* BFD_RELOC_IA64_GPREL32MSB: howto manager. (line 1878) +* BFD_RELOC_IA64_GPREL64I: howto manager. (line 1877) +* BFD_RELOC_IA64_GPREL64LSB: howto manager. (line 1881) +* BFD_RELOC_IA64_GPREL64MSB: howto manager. (line 1880) +* BFD_RELOC_IA64_IMM14: howto manager. (line 1869) +* BFD_RELOC_IA64_IMM22: howto manager. (line 1870) +* BFD_RELOC_IA64_IMM64: howto manager. (line 1871) +* BFD_RELOC_IA64_IPLTLSB: howto manager. (line 1927) +* BFD_RELOC_IA64_IPLTMSB: howto manager. (line 1926) +* BFD_RELOC_IA64_LDXMOV: howto manager. (line 1930) +* BFD_RELOC_IA64_LTOFF22: howto manager. (line 1882) +* BFD_RELOC_IA64_LTOFF22X: howto manager. (line 1929) +* BFD_RELOC_IA64_LTOFF64I: howto manager. (line 1883) +* BFD_RELOC_IA64_LTOFF_DTPMOD22: howto manager. (line 1939) +* BFD_RELOC_IA64_LTOFF_DTPREL22: howto manager. (line 1947) +* BFD_RELOC_IA64_LTOFF_FPTR22: howto manager. (line 1904) +* BFD_RELOC_IA64_LTOFF_FPTR32LSB: howto manager. (line 1907) +* BFD_RELOC_IA64_LTOFF_FPTR32MSB: howto manager. (line 1906) +* BFD_RELOC_IA64_LTOFF_FPTR64I: howto manager. (line 1905) +* BFD_RELOC_IA64_LTOFF_FPTR64LSB: howto manager. (line 1909) +* BFD_RELOC_IA64_LTOFF_FPTR64MSB: howto manager. (line 1908) +* BFD_RELOC_IA64_LTOFF_TPREL22: howto manager. (line 1936) +* BFD_RELOC_IA64_LTV32LSB: howto manager. (line 1923) +* BFD_RELOC_IA64_LTV32MSB: howto manager. (line 1922) +* BFD_RELOC_IA64_LTV64LSB: howto manager. (line 1925) +* BFD_RELOC_IA64_LTV64MSB: howto manager. (line 1924) +* BFD_RELOC_IA64_PCREL21B: howto manager. (line 1893) +* BFD_RELOC_IA64_PCREL21BI: howto manager. (line 1894) +* BFD_RELOC_IA64_PCREL21F: howto manager. (line 1896) +* BFD_RELOC_IA64_PCREL21M: howto manager. (line 1895) +* BFD_RELOC_IA64_PCREL22: howto manager. (line 1897) +* BFD_RELOC_IA64_PCREL32LSB: howto manager. (line 1901) +* BFD_RELOC_IA64_PCREL32MSB: howto manager. (line 1900) +* BFD_RELOC_IA64_PCREL60B: howto manager. (line 1898) +* BFD_RELOC_IA64_PCREL64I: howto manager. (line 1899) +* BFD_RELOC_IA64_PCREL64LSB: howto manager. (line 1903) +* BFD_RELOC_IA64_PCREL64MSB: howto manager. (line 1902) +* BFD_RELOC_IA64_PLTOFF22: howto manager. (line 1884) +* BFD_RELOC_IA64_PLTOFF64I: howto manager. (line 1885) +* BFD_RELOC_IA64_PLTOFF64LSB: howto manager. (line 1887) +* BFD_RELOC_IA64_PLTOFF64MSB: howto manager. (line 1886) +* BFD_RELOC_IA64_REL32LSB: howto manager. (line 1919) +* BFD_RELOC_IA64_REL32MSB: howto manager. (line 1918) +* BFD_RELOC_IA64_REL64LSB: howto manager. (line 1921) +* BFD_RELOC_IA64_REL64MSB: howto manager. (line 1920) +* BFD_RELOC_IA64_SECREL32LSB: howto manager. (line 1915) +* BFD_RELOC_IA64_SECREL32MSB: howto manager. (line 1914) +* BFD_RELOC_IA64_SECREL64LSB: howto manager. (line 1917) +* BFD_RELOC_IA64_SECREL64MSB: howto manager. (line 1916) +* BFD_RELOC_IA64_SEGREL32LSB: howto manager. (line 1911) +* BFD_RELOC_IA64_SEGREL32MSB: howto manager. (line 1910) +* BFD_RELOC_IA64_SEGREL64LSB: howto manager. (line 1913) +* BFD_RELOC_IA64_SEGREL64MSB: howto manager. (line 1912) +* BFD_RELOC_IA64_TPREL14: howto manager. (line 1931) +* BFD_RELOC_IA64_TPREL22: howto manager. (line 1932) +* BFD_RELOC_IA64_TPREL64I: howto manager. (line 1933) +* BFD_RELOC_IA64_TPREL64LSB: howto manager. (line 1935) +* BFD_RELOC_IA64_TPREL64MSB: howto manager. (line 1934) +* BFD_RELOC_IP2K_ADDR16CJP: howto manager. (line 1821) +* BFD_RELOC_IP2K_BANK: howto manager. (line 1818) +* BFD_RELOC_IP2K_EX8DATA: howto manager. (line 1829) +* BFD_RELOC_IP2K_FR9: howto manager. (line 1815) +* BFD_RELOC_IP2K_FR_OFFSET: howto manager. (line 1842) +* BFD_RELOC_IP2K_HI8DATA: howto manager. (line 1828) +* BFD_RELOC_IP2K_HI8INSN: howto manager. (line 1833) +* BFD_RELOC_IP2K_LO8DATA: howto manager. (line 1827) +* BFD_RELOC_IP2K_LO8INSN: howto manager. (line 1832) +* BFD_RELOC_IP2K_PAGE3: howto manager. (line 1824) +* BFD_RELOC_IP2K_PC_SKIP: howto manager. (line 1836) +* BFD_RELOC_IP2K_TEXT: howto manager. (line 1839) +* BFD_RELOC_IQ2000_OFFSET_16: howto manager. (line 2238) +* BFD_RELOC_IQ2000_OFFSET_21: howto manager. (line 2239) +* BFD_RELOC_IQ2000_UHI16: howto manager. (line 2240) +* BFD_RELOC_LM32_16_GOT: howto manager. (line 2345) +* BFD_RELOC_LM32_BRANCH: howto manager. (line 2344) +* BFD_RELOC_LM32_CALL: howto manager. (line 2343) +* BFD_RELOC_LM32_COPY: howto manager. (line 2348) +* BFD_RELOC_LM32_GLOB_DAT: howto manager. (line 2349) +* BFD_RELOC_LM32_GOTOFF_HI16: howto manager. (line 2346) +* BFD_RELOC_LM32_GOTOFF_LO16: howto manager. (line 2347) +* BFD_RELOC_LM32_JMP_SLOT: howto manager. (line 2350) +* BFD_RELOC_LM32_RELATIVE: howto manager. (line 2351) +* BFD_RELOC_LO10: howto manager. (line 117) +* BFD_RELOC_LO16: howto manager. (line 353) +* BFD_RELOC_LO16_BASEREL: howto manager. (line 96) +* BFD_RELOC_LO16_GOTOFF: howto manager. (line 56) +* BFD_RELOC_LO16_PCREL: howto manager. (line 362) +* BFD_RELOC_LO16_PLTOFF: howto manager. (line 68) +* BFD_RELOC_M32C_HI8: howto manager. (line 1180) +* BFD_RELOC_M32C_RL_1ADDR: howto manager. (line 1182) +* BFD_RELOC_M32C_RL_2ADDR: howto manager. (line 1183) +* BFD_RELOC_M32C_RL_JUMP: howto manager. (line 1181) +* BFD_RELOC_M32R_10_PCREL: howto manager. (line 1190) +* BFD_RELOC_M32R_18_PCREL: howto manager. (line 1194) +* BFD_RELOC_M32R_24: howto manager. (line 1186) +* BFD_RELOC_M32R_26_PCREL: howto manager. (line 1197) +* BFD_RELOC_M32R_26_PLTREL: howto manager. (line 1216) +* BFD_RELOC_M32R_COPY: howto manager. (line 1217) +* BFD_RELOC_M32R_GLOB_DAT: howto manager. (line 1218) +* BFD_RELOC_M32R_GOT16_HI_SLO: howto manager. (line 1227) +* BFD_RELOC_M32R_GOT16_HI_ULO: howto manager. (line 1226) +* BFD_RELOC_M32R_GOT16_LO: howto manager. (line 1228) +* BFD_RELOC_M32R_GOT24: howto manager. (line 1215) +* BFD_RELOC_M32R_GOTOFF: howto manager. (line 1221) +* BFD_RELOC_M32R_GOTOFF_HI_SLO: howto manager. (line 1223) +* BFD_RELOC_M32R_GOTOFF_HI_ULO: howto manager. (line 1222) +* BFD_RELOC_M32R_GOTOFF_LO: howto manager. (line 1224) +* BFD_RELOC_M32R_GOTPC24: howto manager. (line 1225) +* BFD_RELOC_M32R_GOTPC_HI_SLO: howto manager. (line 1230) +* BFD_RELOC_M32R_GOTPC_HI_ULO: howto manager. (line 1229) +* BFD_RELOC_M32R_GOTPC_LO: howto manager. (line 1231) +* BFD_RELOC_M32R_HI16_SLO: howto manager. (line 1204) +* BFD_RELOC_M32R_HI16_ULO: howto manager. (line 1200) +* BFD_RELOC_M32R_JMP_SLOT: howto manager. (line 1219) +* BFD_RELOC_M32R_LO16: howto manager. (line 1208) +* BFD_RELOC_M32R_RELATIVE: howto manager. (line 1220) +* BFD_RELOC_M32R_SDA16: howto manager. (line 1211) +* BFD_RELOC_M68HC11_24: howto manager. (line 1983) +* BFD_RELOC_M68HC11_3B: howto manager. (line 1958) +* BFD_RELOC_M68HC11_HI8: howto manager. (line 1950) +* BFD_RELOC_M68HC11_LO16: howto manager. (line 1972) +* BFD_RELOC_M68HC11_LO8: howto manager. (line 1954) +* BFD_RELOC_M68HC11_PAGE: howto manager. (line 1978) +* BFD_RELOC_M68HC11_RL_GROUP: howto manager. (line 1967) +* BFD_RELOC_M68HC11_RL_JUMP: howto manager. (line 1961) +* BFD_RELOC_M68HC12_5B: howto manager. (line 1989) +* BFD_RELOC_MACH_O_PAIR: howto manager. (line 2358) +* BFD_RELOC_MACH_O_SECTDIFF: howto manager. (line 2354) +* BFD_RELOC_MACH_O_X86_64_BRANCH32: howto manager. (line 2361) +* BFD_RELOC_MACH_O_X86_64_BRANCH8: howto manager. (line 2362) +* BFD_RELOC_MACH_O_X86_64_GOT: howto manager. (line 2366) +* BFD_RELOC_MACH_O_X86_64_GOT_LOAD: howto manager. (line 2369) +* BFD_RELOC_MACH_O_X86_64_PCREL32_1: howto manager. (line 2379) +* BFD_RELOC_MACH_O_X86_64_PCREL32_2: howto manager. (line 2382) +* BFD_RELOC_MACH_O_X86_64_PCREL32_4: howto manager. (line 2385) +* BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32: howto manager. (line 2373) +* BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64: howto manager. (line 2376) +* BFD_RELOC_MCORE_PCREL_32: howto manager. (line 1469) +* BFD_RELOC_MCORE_PCREL_IMM11BY2: howto manager. (line 1467) +* BFD_RELOC_MCORE_PCREL_IMM4BY2: howto manager. (line 1468) +* BFD_RELOC_MCORE_PCREL_IMM8BY4: howto manager. (line 1466) +* BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: howto manager. (line 1470) +* BFD_RELOC_MCORE_RVA: howto manager. (line 1471) +* BFD_RELOC_MEP_16: howto manager. (line 1475) +* BFD_RELOC_MEP_32: howto manager. (line 1476) +* BFD_RELOC_MEP_8: howto manager. (line 1474) +* BFD_RELOC_MEP_ADDR24A4: howto manager. (line 1491) +* BFD_RELOC_MEP_GNU_VTENTRY: howto manager. (line 1493) +* BFD_RELOC_MEP_GNU_VTINHERIT: howto manager. (line 1492) +* BFD_RELOC_MEP_GPREL: howto manager. (line 1485) +* BFD_RELOC_MEP_HI16S: howto manager. (line 1484) +* BFD_RELOC_MEP_HI16U: howto manager. (line 1483) +* BFD_RELOC_MEP_LOW16: howto manager. (line 1482) +* BFD_RELOC_MEP_PCABS24A2: howto manager. (line 1481) +* BFD_RELOC_MEP_PCREL12A2: howto manager. (line 1478) +* BFD_RELOC_MEP_PCREL17A2: howto manager. (line 1479) +* BFD_RELOC_MEP_PCREL24A2: howto manager. (line 1480) +* BFD_RELOC_MEP_PCREL8A2: howto manager. (line 1477) +* BFD_RELOC_MEP_TPREL: howto manager. (line 1486) +* BFD_RELOC_MEP_TPREL7: howto manager. (line 1487) +* BFD_RELOC_MEP_TPREL7A2: howto manager. (line 1488) +* BFD_RELOC_MEP_TPREL7A4: howto manager. (line 1489) +* BFD_RELOC_MEP_UIMM24: howto manager. (line 1490) +* BFD_RELOC_MICROBLAZE_32_GOTOFF: howto manager. (line 2432) +* BFD_RELOC_MICROBLAZE_32_LO: howto manager. (line 2388) +* BFD_RELOC_MICROBLAZE_32_LO_PCREL: howto manager. (line 2392) +* BFD_RELOC_MICROBLAZE_32_ROSDA: howto manager. (line 2396) +* BFD_RELOC_MICROBLAZE_32_RWSDA: howto manager. (line 2400) +* BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: howto manager. (line 2404) +* BFD_RELOC_MICROBLAZE_64_GOT: howto manager. (line 2418) +* BFD_RELOC_MICROBLAZE_64_GOTOFF: howto manager. (line 2427) +* BFD_RELOC_MICROBLAZE_64_GOTPC: howto manager. (line 2413) +* BFD_RELOC_MICROBLAZE_64_NONE: howto manager. (line 2408) +* BFD_RELOC_MICROBLAZE_64_PLT: howto manager. (line 2422) +* BFD_RELOC_MICROBLAZE_COPY: howto manager. (line 2436) +* BFD_RELOC_MICROMIPS_10_PCREL_S1: howto manager. (line 387) +* BFD_RELOC_MICROMIPS_16_PCREL_S1: howto manager. (line 388) +* BFD_RELOC_MICROMIPS_7_PCREL_S1: howto manager. (line 386) +* BFD_RELOC_MICROMIPS_CALL16: howto manager. (line 400) +* BFD_RELOC_MICROMIPS_CALL_HI16: howto manager. (line 406) +* BFD_RELOC_MICROMIPS_CALL_LO16: howto manager. (line 408) +* BFD_RELOC_MICROMIPS_GOT16: howto manager. (line 398) +* BFD_RELOC_MICROMIPS_GOT_DISP: howto manager. (line 416) +* BFD_RELOC_MICROMIPS_GOT_HI16: howto manager. (line 402) +* BFD_RELOC_MICROMIPS_GOT_LO16: howto manager. (line 404) +* BFD_RELOC_MICROMIPS_GOT_OFST: howto manager. (line 414) +* BFD_RELOC_MICROMIPS_GOT_PAGE: howto manager. (line 412) +* BFD_RELOC_MICROMIPS_GPREL16: howto manager. (line 391) +* BFD_RELOC_MICROMIPS_HI16: howto manager. (line 392) +* BFD_RELOC_MICROMIPS_HI16_S: howto manager. (line 393) +* BFD_RELOC_MICROMIPS_HIGHER: howto manager. (line 425) +* BFD_RELOC_MICROMIPS_HIGHEST: howto manager. (line 423) +* BFD_RELOC_MICROMIPS_JALR: howto manager. (line 431) +* BFD_RELOC_MICROMIPS_JMP: howto manager. (line 335) +* BFD_RELOC_MICROMIPS_LITERAL: howto manager. (line 383) +* BFD_RELOC_MICROMIPS_LO16: howto manager. (line 394) +* BFD_RELOC_MICROMIPS_SCN_DISP: howto manager. (line 427) +* BFD_RELOC_MICROMIPS_SUB: howto manager. (line 410) +* BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16: howto manager. (line 441) +* BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16: howto manager. (line 443) +* BFD_RELOC_MICROMIPS_TLS_GD: howto manager. (line 437) +* BFD_RELOC_MICROMIPS_TLS_GOTTPREL: howto manager. (line 445) +* BFD_RELOC_MICROMIPS_TLS_LDM: howto manager. (line 439) +* BFD_RELOC_MICROMIPS_TLS_TPREL_HI16: howto manager. (line 449) +* BFD_RELOC_MICROMIPS_TLS_TPREL_LO16: howto manager. (line 451) +* BFD_RELOC_MIPS16_CALL16: howto manager. (line 366) +* BFD_RELOC_MIPS16_GOT16: howto manager. (line 365) +* BFD_RELOC_MIPS16_GPREL: howto manager. (line 341) +* BFD_RELOC_MIPS16_HI16: howto manager. (line 370) +* BFD_RELOC_MIPS16_HI16_S: howto manager. (line 373) +* BFD_RELOC_MIPS16_JMP: howto manager. (line 338) +* BFD_RELOC_MIPS16_LO16: howto manager. (line 379) +* BFD_RELOC_MIPS_CALL16: howto manager. (line 399) +* BFD_RELOC_MIPS_CALL_HI16: howto manager. (line 405) +* BFD_RELOC_MIPS_CALL_LO16: howto manager. (line 407) +* BFD_RELOC_MIPS_COPY: howto manager. (line 454) +* BFD_RELOC_MIPS_DELETE: howto manager. (line 421) +* BFD_RELOC_MIPS_GOT16: howto manager. (line 397) +* BFD_RELOC_MIPS_GOT_DISP: howto manager. (line 415) +* BFD_RELOC_MIPS_GOT_HI16: howto manager. (line 401) +* BFD_RELOC_MIPS_GOT_LO16: howto manager. (line 403) +* BFD_RELOC_MIPS_GOT_OFST: howto manager. (line 413) +* BFD_RELOC_MIPS_GOT_PAGE: howto manager. (line 411) +* BFD_RELOC_MIPS_HIGHER: howto manager. (line 424) +* BFD_RELOC_MIPS_HIGHEST: howto manager. (line 422) +* BFD_RELOC_MIPS_INSERT_A: howto manager. (line 419) +* BFD_RELOC_MIPS_INSERT_B: howto manager. (line 420) +* BFD_RELOC_MIPS_JALR: howto manager. (line 430) +* BFD_RELOC_MIPS_JMP: howto manager. (line 334) +* BFD_RELOC_MIPS_JUMP_SLOT: howto manager. (line 455) +* BFD_RELOC_MIPS_LITERAL: howto manager. (line 382) +* BFD_RELOC_MIPS_REL16: howto manager. (line 428) +* BFD_RELOC_MIPS_RELGOT: howto manager. (line 429) +* BFD_RELOC_MIPS_SCN_DISP: howto manager. (line 426) +* BFD_RELOC_MIPS_SHIFT5: howto manager. (line 417) +* BFD_RELOC_MIPS_SHIFT6: howto manager. (line 418) +* BFD_RELOC_MIPS_SUB: howto manager. (line 409) +* BFD_RELOC_MIPS_TLS_DTPMOD32: howto manager. (line 432) +* BFD_RELOC_MIPS_TLS_DTPMOD64: howto manager. (line 434) +* BFD_RELOC_MIPS_TLS_DTPREL32: howto manager. (line 433) +* BFD_RELOC_MIPS_TLS_DTPREL64: howto manager. (line 435) +* BFD_RELOC_MIPS_TLS_DTPREL_HI16: howto manager. (line 440) +* BFD_RELOC_MIPS_TLS_DTPREL_LO16: howto manager. (line 442) +* BFD_RELOC_MIPS_TLS_GD: howto manager. (line 436) +* BFD_RELOC_MIPS_TLS_GOTTPREL: howto manager. (line 444) +* BFD_RELOC_MIPS_TLS_LDM: howto manager. (line 438) +* BFD_RELOC_MIPS_TLS_TPREL32: howto manager. (line 446) +* BFD_RELOC_MIPS_TLS_TPREL64: howto manager. (line 447) +* BFD_RELOC_MIPS_TLS_TPREL_HI16: howto manager. (line 448) +* BFD_RELOC_MIPS_TLS_TPREL_LO16: howto manager. (line 450) +* BFD_RELOC_MMIX_ADDR19: howto manager. (line 1522) +* BFD_RELOC_MMIX_ADDR27: howto manager. (line 1526) +* BFD_RELOC_MMIX_BASE_PLUS_OFFSET: howto manager. (line 1538) +* BFD_RELOC_MMIX_CBRANCH: howto manager. (line 1502) +* BFD_RELOC_MMIX_CBRANCH_1: howto manager. (line 1504) +* BFD_RELOC_MMIX_CBRANCH_2: howto manager. (line 1505) +* BFD_RELOC_MMIX_CBRANCH_3: howto manager. (line 1506) +* BFD_RELOC_MMIX_CBRANCH_J: howto manager. (line 1503) +* BFD_RELOC_MMIX_GETA: howto manager. (line 1496) +* BFD_RELOC_MMIX_GETA_1: howto manager. (line 1497) +* BFD_RELOC_MMIX_GETA_2: howto manager. (line 1498) +* BFD_RELOC_MMIX_GETA_3: howto manager. (line 1499) +* BFD_RELOC_MMIX_JMP: howto manager. (line 1516) +* BFD_RELOC_MMIX_JMP_1: howto manager. (line 1517) +* BFD_RELOC_MMIX_JMP_2: howto manager. (line 1518) +* BFD_RELOC_MMIX_JMP_3: howto manager. (line 1519) +* BFD_RELOC_MMIX_LOCAL: howto manager. (line 1542) +* BFD_RELOC_MMIX_PUSHJ: howto manager. (line 1509) +* BFD_RELOC_MMIX_PUSHJ_1: howto manager. (line 1510) +* BFD_RELOC_MMIX_PUSHJ_2: howto manager. (line 1511) +* BFD_RELOC_MMIX_PUSHJ_3: howto manager. (line 1512) +* BFD_RELOC_MMIX_PUSHJ_STUBBABLE: howto manager. (line 1513) +* BFD_RELOC_MMIX_REG: howto manager. (line 1534) +* BFD_RELOC_MMIX_REG_OR_BYTE: howto manager. (line 1530) +* BFD_RELOC_MN10300_16_PCREL: howto manager. (line 1372) +* BFD_RELOC_MN10300_32_PCREL: howto manager. (line 1368) +* BFD_RELOC_MN10300_ALIGN: howto manager. (line 534) +* BFD_RELOC_MN10300_COPY: howto manager. (line 517) +* BFD_RELOC_MN10300_GLOB_DAT: howto manager. (line 520) +* BFD_RELOC_MN10300_GOT16: howto manager. (line 513) +* BFD_RELOC_MN10300_GOT24: howto manager. (line 509) +* BFD_RELOC_MN10300_GOT32: howto manager. (line 505) +* BFD_RELOC_MN10300_GOTOFF24: howto manager. (line 502) +* BFD_RELOC_MN10300_JMP_SLOT: howto manager. (line 523) +* BFD_RELOC_MN10300_RELATIVE: howto manager. (line 526) +* BFD_RELOC_MN10300_SYM_DIFF: howto manager. (line 529) +* BFD_RELOC_MOXIE_10_PCREL: howto manager. (line 458) +* BFD_RELOC_MSP430_10_PCREL: howto manager. (line 2229) +* BFD_RELOC_MSP430_16: howto manager. (line 2231) +* BFD_RELOC_MSP430_16_BYTE: howto manager. (line 2233) +* BFD_RELOC_MSP430_16_PCREL: howto manager. (line 2230) +* BFD_RELOC_MSP430_16_PCREL_BYTE: howto manager. (line 2232) +* BFD_RELOC_MSP430_2X_PCREL: howto manager. (line 2234) +* BFD_RELOC_MSP430_RL_PCREL: howto manager. (line 2235) +* BFD_RELOC_MT_GNU_VTENTRY: howto manager. (line 2223) +* BFD_RELOC_MT_GNU_VTINHERIT: howto manager. (line 2220) +* BFD_RELOC_MT_HI16: howto manager. (line 2214) +* BFD_RELOC_MT_LO16: howto manager. (line 2217) +* BFD_RELOC_MT_PC16: howto manager. (line 2211) +* BFD_RELOC_MT_PCINSN8: howto manager. (line 2226) +* BFD_RELOC_NONE: howto manager. (line 131) +* BFD_RELOC_NS32K_DISP_16: howto manager. (line 600) +* BFD_RELOC_NS32K_DISP_16_PCREL: howto manager. (line 603) +* BFD_RELOC_NS32K_DISP_32: howto manager. (line 601) +* BFD_RELOC_NS32K_DISP_32_PCREL: howto manager. (line 604) +* BFD_RELOC_NS32K_DISP_8: howto manager. (line 599) +* BFD_RELOC_NS32K_DISP_8_PCREL: howto manager. (line 602) +* BFD_RELOC_NS32K_IMM_16: howto manager. (line 594) +* BFD_RELOC_NS32K_IMM_16_PCREL: howto manager. (line 597) +* BFD_RELOC_NS32K_IMM_32: howto manager. (line 595) +* BFD_RELOC_NS32K_IMM_32_PCREL: howto manager. (line 598) +* BFD_RELOC_NS32K_IMM_8: howto manager. (line 593) +* BFD_RELOC_NS32K_IMM_8_PCREL: howto manager. (line 596) +* BFD_RELOC_OPENRISC_ABS_26: howto manager. (line 2180) +* BFD_RELOC_OPENRISC_REL_26: howto manager. (line 2181) +* BFD_RELOC_PDP11_DISP_6_PCREL: howto manager. (line 608) +* BFD_RELOC_PDP11_DISP_8_PCREL: howto manager. (line 607) +* BFD_RELOC_PJ_CODE_DIR16: howto manager. (line 613) +* BFD_RELOC_PJ_CODE_DIR32: howto manager. (line 614) +* BFD_RELOC_PJ_CODE_HI16: howto manager. (line 611) +* BFD_RELOC_PJ_CODE_LO16: howto manager. (line 612) +* BFD_RELOC_PJ_CODE_REL16: howto manager. (line 615) +* BFD_RELOC_PJ_CODE_REL32: howto manager. (line 616) +* BFD_RELOC_PPC64_ADDR16_DS: howto manager. (line 661) +* BFD_RELOC_PPC64_ADDR16_LO_DS: howto manager. (line 662) +* BFD_RELOC_PPC64_DTPREL16_DS: howto manager. (line 710) +* BFD_RELOC_PPC64_DTPREL16_HIGHER: howto manager. (line 712) +* BFD_RELOC_PPC64_DTPREL16_HIGHERA: howto manager. (line 713) +* BFD_RELOC_PPC64_DTPREL16_HIGHEST: howto manager. (line 714) +* BFD_RELOC_PPC64_DTPREL16_HIGHESTA: howto manager. (line 715) +* BFD_RELOC_PPC64_DTPREL16_LO_DS: howto manager. (line 711) +* BFD_RELOC_PPC64_GOT16_DS: howto manager. (line 663) +* BFD_RELOC_PPC64_GOT16_LO_DS: howto manager. (line 664) +* BFD_RELOC_PPC64_HIGHER: howto manager. (line 649) +* BFD_RELOC_PPC64_HIGHER_S: howto manager. (line 650) +* BFD_RELOC_PPC64_HIGHEST: howto manager. (line 651) +* BFD_RELOC_PPC64_HIGHEST_S: howto manager. (line 652) +* BFD_RELOC_PPC64_PLT16_LO_DS: howto manager. (line 665) +* BFD_RELOC_PPC64_PLTGOT16: howto manager. (line 657) +* BFD_RELOC_PPC64_PLTGOT16_DS: howto manager. (line 670) +* BFD_RELOC_PPC64_PLTGOT16_HA: howto manager. (line 660) +* BFD_RELOC_PPC64_PLTGOT16_HI: howto manager. (line 659) +* BFD_RELOC_PPC64_PLTGOT16_LO: howto manager. (line 658) +* BFD_RELOC_PPC64_PLTGOT16_LO_DS: howto manager. (line 671) +* BFD_RELOC_PPC64_SECTOFF_DS: howto manager. (line 666) +* BFD_RELOC_PPC64_SECTOFF_LO_DS: howto manager. (line 667) +* BFD_RELOC_PPC64_TOC: howto manager. (line 656) +* BFD_RELOC_PPC64_TOC16_DS: howto manager. (line 668) +* BFD_RELOC_PPC64_TOC16_HA: howto manager. (line 655) +* BFD_RELOC_PPC64_TOC16_HI: howto manager. (line 654) +* BFD_RELOC_PPC64_TOC16_LO: howto manager. (line 653) +* BFD_RELOC_PPC64_TOC16_LO_DS: howto manager. (line 669) +* BFD_RELOC_PPC64_TPREL16_DS: howto manager. (line 704) +* BFD_RELOC_PPC64_TPREL16_HIGHER: howto manager. (line 706) +* BFD_RELOC_PPC64_TPREL16_HIGHERA: howto manager. (line 707) +* BFD_RELOC_PPC64_TPREL16_HIGHEST: howto manager. (line 708) +* BFD_RELOC_PPC64_TPREL16_HIGHESTA: howto manager. (line 709) +* BFD_RELOC_PPC64_TPREL16_LO_DS: howto manager. (line 705) +* BFD_RELOC_PPC_B16: howto manager. (line 622) +* BFD_RELOC_PPC_B16_BRNTAKEN: howto manager. (line 624) +* BFD_RELOC_PPC_B16_BRTAKEN: howto manager. (line 623) +* BFD_RELOC_PPC_B26: howto manager. (line 619) +* BFD_RELOC_PPC_BA16: howto manager. (line 625) +* BFD_RELOC_PPC_BA16_BRNTAKEN: howto manager. (line 627) +* BFD_RELOC_PPC_BA16_BRTAKEN: howto manager. (line 626) +* BFD_RELOC_PPC_BA26: howto manager. (line 620) +* BFD_RELOC_PPC_COPY: howto manager. (line 628) +* BFD_RELOC_PPC_DTPMOD: howto manager. (line 677) +* BFD_RELOC_PPC_DTPREL: howto manager. (line 687) +* BFD_RELOC_PPC_DTPREL16: howto manager. (line 683) +* BFD_RELOC_PPC_DTPREL16_HA: howto manager. (line 686) +* BFD_RELOC_PPC_DTPREL16_HI: howto manager. (line 685) +* BFD_RELOC_PPC_DTPREL16_LO: howto manager. (line 684) +* BFD_RELOC_PPC_EMB_BIT_FLD: howto manager. (line 647) +* BFD_RELOC_PPC_EMB_MRKREF: howto manager. (line 642) +* BFD_RELOC_PPC_EMB_NADDR16: howto manager. (line 634) +* BFD_RELOC_PPC_EMB_NADDR16_HA: howto manager. (line 637) +* BFD_RELOC_PPC_EMB_NADDR16_HI: howto manager. (line 636) +* BFD_RELOC_PPC_EMB_NADDR16_LO: howto manager. (line 635) +* BFD_RELOC_PPC_EMB_NADDR32: howto manager. (line 633) +* BFD_RELOC_PPC_EMB_RELSDA: howto manager. (line 648) +* BFD_RELOC_PPC_EMB_RELSEC16: howto manager. (line 643) +* BFD_RELOC_PPC_EMB_RELST_HA: howto manager. (line 646) +* BFD_RELOC_PPC_EMB_RELST_HI: howto manager. (line 645) +* BFD_RELOC_PPC_EMB_RELST_LO: howto manager. (line 644) +* BFD_RELOC_PPC_EMB_SDA21: howto manager. (line 641) +* BFD_RELOC_PPC_EMB_SDA2I16: howto manager. (line 639) +* BFD_RELOC_PPC_EMB_SDA2REL: howto manager. (line 640) +* BFD_RELOC_PPC_EMB_SDAI16: howto manager. (line 638) +* BFD_RELOC_PPC_GLOB_DAT: howto manager. (line 629) +* BFD_RELOC_PPC_GOT_DTPREL16: howto manager. (line 700) +* BFD_RELOC_PPC_GOT_DTPREL16_HA: howto manager. (line 703) +* BFD_RELOC_PPC_GOT_DTPREL16_HI: howto manager. (line 702) +* BFD_RELOC_PPC_GOT_DTPREL16_LO: howto manager. (line 701) +* BFD_RELOC_PPC_GOT_TLSGD16: howto manager. (line 688) +* BFD_RELOC_PPC_GOT_TLSGD16_HA: howto manager. (line 691) +* BFD_RELOC_PPC_GOT_TLSGD16_HI: howto manager. (line 690) +* BFD_RELOC_PPC_GOT_TLSGD16_LO: howto manager. (line 689) +* BFD_RELOC_PPC_GOT_TLSLD16: howto manager. (line 692) +* BFD_RELOC_PPC_GOT_TLSLD16_HA: howto manager. (line 695) +* BFD_RELOC_PPC_GOT_TLSLD16_HI: howto manager. (line 694) +* BFD_RELOC_PPC_GOT_TLSLD16_LO: howto manager. (line 693) +* BFD_RELOC_PPC_GOT_TPREL16: howto manager. (line 696) +* BFD_RELOC_PPC_GOT_TPREL16_HA: howto manager. (line 699) +* BFD_RELOC_PPC_GOT_TPREL16_HI: howto manager. (line 698) +* BFD_RELOC_PPC_GOT_TPREL16_LO: howto manager. (line 697) +* BFD_RELOC_PPC_JMP_SLOT: howto manager. (line 630) +* BFD_RELOC_PPC_LOCAL24PC: howto manager. (line 632) +* BFD_RELOC_PPC_RELATIVE: howto manager. (line 631) +* BFD_RELOC_PPC_TLS: howto manager. (line 674) +* BFD_RELOC_PPC_TLSGD: howto manager. (line 675) +* BFD_RELOC_PPC_TLSLD: howto manager. (line 676) +* BFD_RELOC_PPC_TOC16: howto manager. (line 621) +* BFD_RELOC_PPC_TPREL: howto manager. (line 682) +* BFD_RELOC_PPC_TPREL16: howto manager. (line 678) +* BFD_RELOC_PPC_TPREL16_HA: howto manager. (line 681) +* BFD_RELOC_PPC_TPREL16_HI: howto manager. (line 680) +* BFD_RELOC_PPC_TPREL16_LO: howto manager. (line 679) +* BFD_RELOC_RELC: howto manager. (line 2197) +* BFD_RELOC_RVA: howto manager. (line 100) +* BFD_RELOC_RX_16_OP: howto manager. (line 1653) +* BFD_RELOC_RX_16U: howto manager. (line 1657) +* BFD_RELOC_RX_24_OP: howto manager. (line 1654) +* BFD_RELOC_RX_24U: howto manager. (line 1658) +* BFD_RELOC_RX_32_OP: howto manager. (line 1655) +* BFD_RELOC_RX_8U: howto manager. (line 1656) +* BFD_RELOC_RX_ABS16: howto manager. (line 1668) +* BFD_RELOC_RX_ABS16_REV: howto manager. (line 1669) +* BFD_RELOC_RX_ABS16U: howto manager. (line 1672) +* BFD_RELOC_RX_ABS16UL: howto manager. (line 1674) +* BFD_RELOC_RX_ABS16UW: howto manager. (line 1673) +* BFD_RELOC_RX_ABS32: howto manager. (line 1670) +* BFD_RELOC_RX_ABS32_REV: howto manager. (line 1671) +* BFD_RELOC_RX_ABS8: howto manager. (line 1667) +* BFD_RELOC_RX_DIFF: howto manager. (line 1660) +* BFD_RELOC_RX_DIR3U_PCREL: howto manager. (line 1659) +* BFD_RELOC_RX_GPRELB: howto manager. (line 1661) +* BFD_RELOC_RX_GPRELL: howto manager. (line 1663) +* BFD_RELOC_RX_GPRELW: howto manager. (line 1662) +* BFD_RELOC_RX_NEG16: howto manager. (line 1650) +* BFD_RELOC_RX_NEG24: howto manager. (line 1651) +* BFD_RELOC_RX_NEG32: howto manager. (line 1652) +* BFD_RELOC_RX_NEG8: howto manager. (line 1649) +* BFD_RELOC_RX_OP_NEG: howto manager. (line 1666) +* BFD_RELOC_RX_OP_SUBTRACT: howto manager. (line 1665) +* BFD_RELOC_RX_RELAX: howto manager. (line 1675) +* BFD_RELOC_RX_SYM: howto manager. (line 1664) +* BFD_RELOC_SCORE16_BRANCH: howto manager. (line 1803) +* BFD_RELOC_SCORE16_JMP: howto manager. (line 1800) +* BFD_RELOC_SCORE_BCMP: howto manager. (line 1806) +* BFD_RELOC_SCORE_BRANCH: howto manager. (line 1791) +* BFD_RELOC_SCORE_CALL15: howto manager. (line 1811) +* BFD_RELOC_SCORE_DUMMY2: howto manager. (line 1787) +* BFD_RELOC_SCORE_DUMMY_HI16: howto manager. (line 1812) +* BFD_RELOC_SCORE_GOT15: howto manager. (line 1809) +* BFD_RELOC_SCORE_GOT_LO16: howto manager. (line 1810) +* BFD_RELOC_SCORE_GPREL15: howto manager. (line 1784) +* BFD_RELOC_SCORE_IMM30: howto manager. (line 1794) +* BFD_RELOC_SCORE_IMM32: howto manager. (line 1797) +* BFD_RELOC_SCORE_JMP: howto manager. (line 1788) +* BFD_RELOC_SH_ALIGN: howto manager. (line 909) +* BFD_RELOC_SH_CODE: howto manager. (line 910) +* BFD_RELOC_SH_COPY: howto manager. (line 915) +* BFD_RELOC_SH_COPY64: howto manager. (line 940) +* BFD_RELOC_SH_COUNT: howto manager. (line 908) +* BFD_RELOC_SH_DATA: howto manager. (line 911) +* BFD_RELOC_SH_DISP12: howto manager. (line 891) +* BFD_RELOC_SH_DISP12BY2: howto manager. (line 892) +* BFD_RELOC_SH_DISP12BY4: howto manager. (line 893) +* BFD_RELOC_SH_DISP12BY8: howto manager. (line 894) +* BFD_RELOC_SH_DISP20: howto manager. (line 895) +* BFD_RELOC_SH_DISP20BY8: howto manager. (line 896) +* BFD_RELOC_SH_FUNCDESC: howto manager. (line 983) +* BFD_RELOC_SH_GLOB_DAT: howto manager. (line 916) +* BFD_RELOC_SH_GLOB_DAT64: howto manager. (line 941) +* BFD_RELOC_SH_GOT10BY4: howto manager. (line 944) +* BFD_RELOC_SH_GOT10BY8: howto manager. (line 945) +* BFD_RELOC_SH_GOT20: howto manager. (line 977) +* BFD_RELOC_SH_GOT_HI16: howto manager. (line 923) +* BFD_RELOC_SH_GOT_LOW16: howto manager. (line 920) +* BFD_RELOC_SH_GOT_MEDHI16: howto manager. (line 922) +* BFD_RELOC_SH_GOT_MEDLOW16: howto manager. (line 921) +* BFD_RELOC_SH_GOTFUNCDESC: howto manager. (line 979) +* BFD_RELOC_SH_GOTFUNCDESC20: howto manager. (line 980) +* BFD_RELOC_SH_GOTOFF20: howto manager. (line 978) +* BFD_RELOC_SH_GOTOFF_HI16: howto manager. (line 935) +* BFD_RELOC_SH_GOTOFF_LOW16: howto manager. (line 932) +* BFD_RELOC_SH_GOTOFF_MEDHI16: howto manager. (line 934) +* BFD_RELOC_SH_GOTOFF_MEDLOW16: howto manager. (line 933) +* BFD_RELOC_SH_GOTOFFFUNCDESC: howto manager. (line 981) +* BFD_RELOC_SH_GOTOFFFUNCDESC20: howto manager. (line 982) +* BFD_RELOC_SH_GOTPC: howto manager. (line 919) +* BFD_RELOC_SH_GOTPC_HI16: howto manager. (line 939) +* BFD_RELOC_SH_GOTPC_LOW16: howto manager. (line 936) +* BFD_RELOC_SH_GOTPC_MEDHI16: howto manager. (line 938) +* BFD_RELOC_SH_GOTPC_MEDLOW16: howto manager. (line 937) +* BFD_RELOC_SH_GOTPLT10BY4: howto manager. (line 946) +* BFD_RELOC_SH_GOTPLT10BY8: howto manager. (line 947) +* BFD_RELOC_SH_GOTPLT32: howto manager. (line 948) +* BFD_RELOC_SH_GOTPLT_HI16: howto manager. (line 927) +* BFD_RELOC_SH_GOTPLT_LOW16: howto manager. (line 924) +* BFD_RELOC_SH_GOTPLT_MEDHI16: howto manager. (line 926) +* BFD_RELOC_SH_GOTPLT_MEDLOW16: howto manager. (line 925) +* BFD_RELOC_SH_IMM3: howto manager. (line 889) +* BFD_RELOC_SH_IMM3U: howto manager. (line 890) +* BFD_RELOC_SH_IMM4: howto manager. (line 897) +* BFD_RELOC_SH_IMM4BY2: howto manager. (line 898) +* BFD_RELOC_SH_IMM4BY4: howto manager. (line 899) +* BFD_RELOC_SH_IMM8: howto manager. (line 900) +* BFD_RELOC_SH_IMM8BY2: howto manager. (line 901) +* BFD_RELOC_SH_IMM8BY4: howto manager. (line 902) +* BFD_RELOC_SH_IMM_HI16: howto manager. (line 966) +* BFD_RELOC_SH_IMM_HI16_PCREL: howto manager. (line 967) +* BFD_RELOC_SH_IMM_LOW16: howto manager. (line 960) +* BFD_RELOC_SH_IMM_LOW16_PCREL: howto manager. (line 961) +* BFD_RELOC_SH_IMM_MEDHI16: howto manager. (line 964) +* BFD_RELOC_SH_IMM_MEDHI16_PCREL: howto manager. (line 965) +* BFD_RELOC_SH_IMM_MEDLOW16: howto manager. (line 962) +* BFD_RELOC_SH_IMM_MEDLOW16_PCREL: howto manager. (line 963) +* BFD_RELOC_SH_IMMS10: howto manager. (line 954) +* BFD_RELOC_SH_IMMS10BY2: howto manager. (line 955) +* BFD_RELOC_SH_IMMS10BY4: howto manager. (line 956) +* BFD_RELOC_SH_IMMS10BY8: howto manager. (line 957) +* BFD_RELOC_SH_IMMS16: howto manager. (line 958) +* BFD_RELOC_SH_IMMS6: howto manager. (line 951) +* BFD_RELOC_SH_IMMS6BY32: howto manager. (line 952) +* BFD_RELOC_SH_IMMU16: howto manager. (line 959) +* BFD_RELOC_SH_IMMU5: howto manager. (line 950) +* BFD_RELOC_SH_IMMU6: howto manager. (line 953) +* BFD_RELOC_SH_JMP_SLOT: howto manager. (line 917) +* BFD_RELOC_SH_JMP_SLOT64: howto manager. (line 942) +* BFD_RELOC_SH_LABEL: howto manager. (line 912) +* BFD_RELOC_SH_LOOP_END: howto manager. (line 914) +* BFD_RELOC_SH_LOOP_START: howto manager. (line 913) +* BFD_RELOC_SH_PCDISP12BY2: howto manager. (line 888) +* BFD_RELOC_SH_PCDISP8BY2: howto manager. (line 887) +* BFD_RELOC_SH_PCRELIMM8BY2: howto manager. (line 903) +* BFD_RELOC_SH_PCRELIMM8BY4: howto manager. (line 904) +* BFD_RELOC_SH_PLT_HI16: howto manager. (line 931) +* BFD_RELOC_SH_PLT_LOW16: howto manager. (line 928) +* BFD_RELOC_SH_PLT_MEDHI16: howto manager. (line 930) +* BFD_RELOC_SH_PLT_MEDLOW16: howto manager. (line 929) +* BFD_RELOC_SH_PT_16: howto manager. (line 968) +* BFD_RELOC_SH_RELATIVE: howto manager. (line 918) +* BFD_RELOC_SH_RELATIVE64: howto manager. (line 943) +* BFD_RELOC_SH_SHMEDIA_CODE: howto manager. (line 949) +* BFD_RELOC_SH_SWITCH16: howto manager. (line 905) +* BFD_RELOC_SH_SWITCH32: howto manager. (line 906) +* BFD_RELOC_SH_TLS_DTPMOD32: howto manager. (line 974) +* BFD_RELOC_SH_TLS_DTPOFF32: howto manager. (line 975) +* BFD_RELOC_SH_TLS_GD_32: howto manager. (line 969) +* BFD_RELOC_SH_TLS_IE_32: howto manager. (line 972) +* BFD_RELOC_SH_TLS_LD_32: howto manager. (line 970) +* BFD_RELOC_SH_TLS_LDO_32: howto manager. (line 971) +* BFD_RELOC_SH_TLS_LE_32: howto manager. (line 973) +* BFD_RELOC_SH_TLS_TPOFF32: howto manager. (line 976) +* BFD_RELOC_SH_USES: howto manager. (line 907) +* BFD_RELOC_SPARC13: howto manager. (line 134) +* BFD_RELOC_SPARC22: howto manager. (line 133) +* BFD_RELOC_SPARC_10: howto manager. (line 163) +* BFD_RELOC_SPARC_11: howto manager. (line 164) +* BFD_RELOC_SPARC_5: howto manager. (line 176) +* BFD_RELOC_SPARC_6: howto manager. (line 175) +* BFD_RELOC_SPARC_64: howto manager. (line 162) +* BFD_RELOC_SPARC_7: howto manager. (line 174) +* BFD_RELOC_SPARC_BASE13: howto manager. (line 158) +* BFD_RELOC_SPARC_BASE22: howto manager. (line 159) +* BFD_RELOC_SPARC_COPY: howto manager. (line 141) +* BFD_RELOC_SPARC_DISP64: howto manager. (line 177) +* BFD_RELOC_SPARC_GLOB_DAT: howto manager. (line 142) +* BFD_RELOC_SPARC_GOT10: howto manager. (line 135) +* BFD_RELOC_SPARC_GOT13: howto manager. (line 136) +* BFD_RELOC_SPARC_GOT22: howto manager. (line 137) +* BFD_RELOC_SPARC_GOTDATA_HIX22: howto manager. (line 148) +* BFD_RELOC_SPARC_GOTDATA_LOX10: howto manager. (line 149) +* BFD_RELOC_SPARC_GOTDATA_OP: howto manager. (line 152) +* BFD_RELOC_SPARC_GOTDATA_OP_HIX22: howto manager. (line 150) +* BFD_RELOC_SPARC_GOTDATA_OP_LOX10: howto manager. (line 151) +* BFD_RELOC_SPARC_H44: howto manager. (line 182) +* BFD_RELOC_SPARC_HH22: howto manager. (line 166) +* BFD_RELOC_SPARC_HIX22: howto manager. (line 180) +* BFD_RELOC_SPARC_HM10: howto manager. (line 167) +* BFD_RELOC_SPARC_IRELATIVE: howto manager. (line 154) +* BFD_RELOC_SPARC_JMP_IREL: howto manager. (line 153) +* BFD_RELOC_SPARC_JMP_SLOT: howto manager. (line 143) +* BFD_RELOC_SPARC_L44: howto manager. (line 184) +* BFD_RELOC_SPARC_LM22: howto manager. (line 168) +* BFD_RELOC_SPARC_LOX10: howto manager. (line 181) +* BFD_RELOC_SPARC_M44: howto manager. (line 183) +* BFD_RELOC_SPARC_OLO10: howto manager. (line 165) +* BFD_RELOC_SPARC_PC10: howto manager. (line 138) +* BFD_RELOC_SPARC_PC22: howto manager. (line 139) +* BFD_RELOC_SPARC_PC_HH22: howto manager. (line 169) +* BFD_RELOC_SPARC_PC_HM10: howto manager. (line 170) +* BFD_RELOC_SPARC_PC_LM22: howto manager. (line 171) +* BFD_RELOC_SPARC_PLT32: howto manager. (line 178) +* BFD_RELOC_SPARC_PLT64: howto manager. (line 179) +* BFD_RELOC_SPARC_REGISTER: howto manager. (line 185) +* BFD_RELOC_SPARC_RELATIVE: howto manager. (line 144) +* BFD_RELOC_SPARC_REV32: howto manager. (line 188) +* BFD_RELOC_SPARC_TLS_DTPMOD32: howto manager. (line 209) +* BFD_RELOC_SPARC_TLS_DTPMOD64: howto manager. (line 210) +* BFD_RELOC_SPARC_TLS_DTPOFF32: howto manager. (line 211) +* BFD_RELOC_SPARC_TLS_DTPOFF64: howto manager. (line 212) +* BFD_RELOC_SPARC_TLS_GD_ADD: howto manager. (line 193) +* BFD_RELOC_SPARC_TLS_GD_CALL: howto manager. (line 194) +* BFD_RELOC_SPARC_TLS_GD_HI22: howto manager. (line 191) +* BFD_RELOC_SPARC_TLS_GD_LO10: howto manager. (line 192) +* BFD_RELOC_SPARC_TLS_IE_ADD: howto manager. (line 206) +* BFD_RELOC_SPARC_TLS_IE_HI22: howto manager. (line 202) +* BFD_RELOC_SPARC_TLS_IE_LD: howto manager. (line 204) +* BFD_RELOC_SPARC_TLS_IE_LDX: howto manager. (line 205) +* BFD_RELOC_SPARC_TLS_IE_LO10: howto manager. (line 203) +* BFD_RELOC_SPARC_TLS_LDM_ADD: howto manager. (line 197) +* BFD_RELOC_SPARC_TLS_LDM_CALL: howto manager. (line 198) +* BFD_RELOC_SPARC_TLS_LDM_HI22: howto manager. (line 195) +* BFD_RELOC_SPARC_TLS_LDM_LO10: howto manager. (line 196) +* BFD_RELOC_SPARC_TLS_LDO_ADD: howto manager. (line 201) +* BFD_RELOC_SPARC_TLS_LDO_HIX22: howto manager. (line 199) +* BFD_RELOC_SPARC_TLS_LDO_LOX10: howto manager. (line 200) +* BFD_RELOC_SPARC_TLS_LE_HIX22: howto manager. (line 207) +* BFD_RELOC_SPARC_TLS_LE_LOX10: howto manager. (line 208) +* BFD_RELOC_SPARC_TLS_TPOFF32: howto manager. (line 213) +* BFD_RELOC_SPARC_TLS_TPOFF64: howto manager. (line 214) +* BFD_RELOC_SPARC_UA16: howto manager. (line 145) +* BFD_RELOC_SPARC_UA32: howto manager. (line 146) +* BFD_RELOC_SPARC_UA64: howto manager. (line 147) +* BFD_RELOC_SPARC_WDISP16: howto manager. (line 172) +* BFD_RELOC_SPARC_WDISP19: howto manager. (line 173) +* BFD_RELOC_SPARC_WDISP22: howto manager. (line 132) +* BFD_RELOC_SPARC_WPLT30: howto manager. (line 140) +* BFD_RELOC_SPU_ADD_PIC: howto manager. (line 231) +* BFD_RELOC_SPU_HI16: howto manager. (line 228) +* BFD_RELOC_SPU_IMM10: howto manager. (line 219) +* BFD_RELOC_SPU_IMM10W: howto manager. (line 220) +* BFD_RELOC_SPU_IMM16: howto manager. (line 221) +* BFD_RELOC_SPU_IMM16W: howto manager. (line 222) +* BFD_RELOC_SPU_IMM18: howto manager. (line 223) +* BFD_RELOC_SPU_IMM7: howto manager. (line 217) +* BFD_RELOC_SPU_IMM8: howto manager. (line 218) +* BFD_RELOC_SPU_LO16: howto manager. (line 227) +* BFD_RELOC_SPU_PCREL16: howto manager. (line 226) +* BFD_RELOC_SPU_PCREL9a: howto manager. (line 224) +* BFD_RELOC_SPU_PCREL9b: howto manager. (line 225) +* BFD_RELOC_SPU_PPU32: howto manager. (line 229) +* BFD_RELOC_SPU_PPU64: howto manager. (line 230) +* BFD_RELOC_THUMB_PCREL_BLX: howto manager. (line 736) +* BFD_RELOC_THUMB_PCREL_BRANCH12: howto manager. (line 750) +* BFD_RELOC_THUMB_PCREL_BRANCH20: howto manager. (line 751) +* BFD_RELOC_THUMB_PCREL_BRANCH23: howto manager. (line 752) +* BFD_RELOC_THUMB_PCREL_BRANCH25: howto manager. (line 753) +* BFD_RELOC_THUMB_PCREL_BRANCH7: howto manager. (line 748) +* BFD_RELOC_THUMB_PCREL_BRANCH9: howto manager. (line 749) +* BFD_RELOC_TIC30_LDP: howto manager. (line 1376) +* BFD_RELOC_TIC54X_16_OF_23: howto manager. (line 1394) +* BFD_RELOC_TIC54X_23: howto manager. (line 1391) +* BFD_RELOC_TIC54X_MS7_OF_23: howto manager. (line 1399) +* BFD_RELOC_TIC54X_PARTLS7: howto manager. (line 1381) +* BFD_RELOC_TIC54X_PARTMS9: howto manager. (line 1386) +* BFD_RELOC_TILEGX_BROFF_X1: howto manager. (line 2518) +* BFD_RELOC_TILEGX_COPY: howto manager. (line 2514) +* BFD_RELOC_TILEGX_DEST_IMM8_X1: howto manager. (line 2525) +* BFD_RELOC_TILEGX_GLOB_DAT: howto manager. (line 2515) +* BFD_RELOC_TILEGX_HW0: howto manager. (line 2507) +* BFD_RELOC_TILEGX_HW0_LAST: howto manager. (line 2511) +* BFD_RELOC_TILEGX_HW1: howto manager. (line 2508) +* BFD_RELOC_TILEGX_HW1_LAST: howto manager. (line 2512) +* BFD_RELOC_TILEGX_HW2: howto manager. (line 2509) +* BFD_RELOC_TILEGX_HW2_LAST: howto manager. (line 2513) +* BFD_RELOC_TILEGX_HW3: howto manager. (line 2510) +* BFD_RELOC_TILEGX_IMM16_X0_HW0: howto manager. (line 2534) +* BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT: howto manager. (line 2562) +* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST: howto manager. (line 2542) +* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT: howto manager. (line 2570) +* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL: howto manager. (line 2556) +* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD: howto manager. (line 2584) +* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE: howto manager. (line 2598) +* BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL: howto manager. (line 2548) +* BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD: howto manager. (line 2576) +* BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE: howto manager. (line 2590) +* BFD_RELOC_TILEGX_IMM16_X0_HW1: howto manager. (line 2536) +* BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT: howto manager. (line 2564) +* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST: howto manager. (line 2544) +* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT: howto manager. (line 2572) +* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL: howto manager. (line 2558) +* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD: howto manager. (line 2586) +* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE: howto manager. (line 2600) +* BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL: howto manager. (line 2550) +* BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD: howto manager. (line 2578) +* BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE: howto manager. (line 2592) +* BFD_RELOC_TILEGX_IMM16_X0_HW2: howto manager. (line 2538) +* BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT: howto manager. (line 2566) +* BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST: howto manager. (line 2546) +* BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT: howto manager. (line 2574) +* BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL: howto manager. (line 2560) +* BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD: howto manager. (line 2588) +* BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE: howto manager. (line 2602) +* BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL: howto manager. (line 2552) +* BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD: howto manager. (line 2580) +* BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE: howto manager. (line 2594) +* BFD_RELOC_TILEGX_IMM16_X0_HW3: howto manager. (line 2540) +* BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT: howto manager. (line 2568) +* BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL: howto manager. (line 2554) +* BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD: howto manager. (line 2582) +* BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE: howto manager. (line 2596) +* BFD_RELOC_TILEGX_IMM16_X1_HW0: howto manager. (line 2535) +* BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT: howto manager. (line 2563) +* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST: howto manager. (line 2543) +* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT: howto manager. (line 2571) +* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL: howto manager. (line 2557) +* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD: howto manager. (line 2585) +* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE: howto manager. (line 2599) +* BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL: howto manager. (line 2549) +* BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD: howto manager. (line 2577) +* BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE: howto manager. (line 2591) +* BFD_RELOC_TILEGX_IMM16_X1_HW1: howto manager. (line 2537) +* BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT: howto manager. (line 2565) +* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST: howto manager. (line 2545) +* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT: howto manager. (line 2573) +* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL: howto manager. (line 2559) +* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD: howto manager. (line 2587) +* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE: howto manager. (line 2601) +* BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL: howto manager. (line 2551) +* BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD: howto manager. (line 2579) +* BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE: howto manager. (line 2593) +* BFD_RELOC_TILEGX_IMM16_X1_HW2: howto manager. (line 2539) +* BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT: howto manager. (line 2567) +* BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST: howto manager. (line 2547) +* BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT: howto manager. (line 2575) +* BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL: howto manager. (line 2561) +* BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD: howto manager. (line 2589) +* BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE: howto manager. (line 2603) +* BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL: howto manager. (line 2553) +* BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD: howto manager. (line 2581) +* BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE: howto manager. (line 2595) +* BFD_RELOC_TILEGX_IMM16_X1_HW3: howto manager. (line 2541) +* BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT: howto manager. (line 2569) +* BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL: howto manager. (line 2555) +* BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD: howto manager. (line 2583) +* BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE: howto manager. (line 2597) +* BFD_RELOC_TILEGX_IMM8_X0: howto manager. (line 2521) +* BFD_RELOC_TILEGX_IMM8_X1: howto manager. (line 2523) +* BFD_RELOC_TILEGX_IMM8_Y0: howto manager. (line 2522) +* BFD_RELOC_TILEGX_IMM8_Y1: howto manager. (line 2524) +* BFD_RELOC_TILEGX_JMP_SLOT: howto manager. (line 2516) +* BFD_RELOC_TILEGX_JUMPOFF_X1: howto manager. (line 2519) +* BFD_RELOC_TILEGX_JUMPOFF_X1_PLT: howto manager. (line 2520) +* BFD_RELOC_TILEGX_MF_IMM14_X1: howto manager. (line 2527) +* BFD_RELOC_TILEGX_MMEND_X0: howto manager. (line 2529) +* BFD_RELOC_TILEGX_MMSTART_X0: howto manager. (line 2528) +* BFD_RELOC_TILEGX_MT_IMM14_X1: howto manager. (line 2526) +* BFD_RELOC_TILEGX_RELATIVE: howto manager. (line 2517) +* BFD_RELOC_TILEGX_SHAMT_X0: howto manager. (line 2530) +* BFD_RELOC_TILEGX_SHAMT_X1: howto manager. (line 2531) +* BFD_RELOC_TILEGX_SHAMT_Y0: howto manager. (line 2532) +* BFD_RELOC_TILEGX_SHAMT_Y1: howto manager. (line 2533) +* BFD_RELOC_TILEGX_TLS_DTPMOD32: howto manager. (line 2607) +* BFD_RELOC_TILEGX_TLS_DTPMOD64: howto manager. (line 2604) +* BFD_RELOC_TILEGX_TLS_DTPOFF32: howto manager. (line 2608) +* BFD_RELOC_TILEGX_TLS_DTPOFF64: howto manager. (line 2605) +* BFD_RELOC_TILEGX_TLS_TPOFF32: howto manager. (line 2609) +* BFD_RELOC_TILEGX_TLS_TPOFF64: howto manager. (line 2606) +* BFD_RELOC_TILEPRO_BROFF_X1: howto manager. (line 2444) +* BFD_RELOC_TILEPRO_COPY: howto manager. (line 2440) +* BFD_RELOC_TILEPRO_DEST_IMM8_X1: howto manager. (line 2451) +* BFD_RELOC_TILEPRO_GLOB_DAT: howto manager. (line 2441) +* BFD_RELOC_TILEPRO_IMM16_X0: howto manager. (line 2454) +* BFD_RELOC_TILEPRO_IMM16_X0_GOT: howto manager. (line 2470) +* BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA: howto manager. (line 2476) +* BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI: howto manager. (line 2474) +* BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO: howto manager. (line 2472) +* BFD_RELOC_TILEPRO_IMM16_X0_HA: howto manager. (line 2460) +* BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL: howto manager. (line 2468) +* BFD_RELOC_TILEPRO_IMM16_X0_HI: howto manager. (line 2458) +* BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL: howto manager. (line 2466) +* BFD_RELOC_TILEPRO_IMM16_X0_LO: howto manager. (line 2456) +* BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL: howto manager. (line 2464) +* BFD_RELOC_TILEPRO_IMM16_X0_PCREL: howto manager. (line 2462) +* BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD: howto manager. (line 2486) +* BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA: howto manager. (line 2492) +* BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI: howto manager. (line 2490) +* BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO: howto manager. (line 2488) +* BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE: howto manager. (line 2494) +* BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA: howto manager. (line 2500) +* BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI: howto manager. (line 2498) +* BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO: howto manager. (line 2496) +* BFD_RELOC_TILEPRO_IMM16_X1: howto manager. (line 2455) +* BFD_RELOC_TILEPRO_IMM16_X1_GOT: howto manager. (line 2471) +* BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA: howto manager. (line 2477) +* BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI: howto manager. (line 2475) +* BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO: howto manager. (line 2473) +* BFD_RELOC_TILEPRO_IMM16_X1_HA: howto manager. (line 2461) +* BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL: howto manager. (line 2469) +* BFD_RELOC_TILEPRO_IMM16_X1_HI: howto manager. (line 2459) +* BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL: howto manager. (line 2467) +* BFD_RELOC_TILEPRO_IMM16_X1_LO: howto manager. (line 2457) +* BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL: howto manager. (line 2465) +* BFD_RELOC_TILEPRO_IMM16_X1_PCREL: howto manager. (line 2463) +* BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD: howto manager. (line 2487) +* BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA: howto manager. (line 2493) +* BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI: howto manager. (line 2491) +* BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO: howto manager. (line 2489) +* BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE: howto manager. (line 2495) +* BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA: howto manager. (line 2501) +* BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI: howto manager. (line 2499) +* BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO: howto manager. (line 2497) +* BFD_RELOC_TILEPRO_IMM8_X0: howto manager. (line 2447) +* BFD_RELOC_TILEPRO_IMM8_X1: howto manager. (line 2449) +* BFD_RELOC_TILEPRO_IMM8_Y0: howto manager. (line 2448) +* BFD_RELOC_TILEPRO_IMM8_Y1: howto manager. (line 2450) +* BFD_RELOC_TILEPRO_JMP_SLOT: howto manager. (line 2442) +* BFD_RELOC_TILEPRO_JOFFLONG_X1: howto manager. (line 2445) +* BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT: howto manager. (line 2446) +* BFD_RELOC_TILEPRO_MF_IMM15_X1: howto manager. (line 2453) +* BFD_RELOC_TILEPRO_MMEND_X0: howto manager. (line 2479) +* BFD_RELOC_TILEPRO_MMEND_X1: howto manager. (line 2481) +* BFD_RELOC_TILEPRO_MMSTART_X0: howto manager. (line 2478) +* BFD_RELOC_TILEPRO_MMSTART_X1: howto manager. (line 2480) +* BFD_RELOC_TILEPRO_MT_IMM15_X1: howto manager. (line 2452) +* BFD_RELOC_TILEPRO_RELATIVE: howto manager. (line 2443) +* BFD_RELOC_TILEPRO_SHAMT_X0: howto manager. (line 2482) +* BFD_RELOC_TILEPRO_SHAMT_X1: howto manager. (line 2483) +* BFD_RELOC_TILEPRO_SHAMT_Y0: howto manager. (line 2484) +* BFD_RELOC_TILEPRO_SHAMT_Y1: howto manager. (line 2485) +* BFD_RELOC_TILEPRO_TLS_DTPMOD32: howto manager. (line 2502) +* BFD_RELOC_TILEPRO_TLS_DTPOFF32: howto manager. (line 2503) +* BFD_RELOC_TILEPRO_TLS_TPOFF32: howto manager. (line 2504) +* bfd_reloc_type_lookup: howto manager. (line 2613) +* BFD_RELOC_V850_16_GOT: howto manager. (line 1332) +* BFD_RELOC_V850_16_GOTOFF: howto manager. (line 1356) +* BFD_RELOC_V850_16_PCREL: howto manager. (line 1302) +* BFD_RELOC_V850_16_S1: howto manager. (line 1320) +* BFD_RELOC_V850_16_SPLIT_OFFSET: howto manager. (line 1317) +* BFD_RELOC_V850_17_PCREL: howto manager. (line 1305) +* BFD_RELOC_V850_22_PCREL: howto manager. (line 1237) +* BFD_RELOC_V850_22_PLT_PCREL: howto manager. (line 1338) +* BFD_RELOC_V850_23: howto manager. (line 1308) +* BFD_RELOC_V850_32_ABS: howto manager. (line 1314) +* BFD_RELOC_V850_32_GOT: howto manager. (line 1335) +* BFD_RELOC_V850_32_GOTOFF: howto manager. (line 1359) +* BFD_RELOC_V850_32_GOTPCREL: howto manager. (line 1329) +* BFD_RELOC_V850_32_PCREL: howto manager. (line 1311) +* BFD_RELOC_V850_32_PLT_PCREL: howto manager. (line 1341) +* BFD_RELOC_V850_9_PCREL: howto manager. (line 1234) +* BFD_RELOC_V850_ALIGN: howto manager. (line 1295) +* BFD_RELOC_V850_CALLT_15_16_OFFSET: howto manager. (line 1326) +* BFD_RELOC_V850_CALLT_16_16_OFFSET: howto manager. (line 1286) +* BFD_RELOC_V850_CALLT_6_7_OFFSET: howto manager. (line 1283) +* BFD_RELOC_V850_CODE: howto manager. (line 1362) +* BFD_RELOC_V850_COPY: howto manager. (line 1344) +* BFD_RELOC_V850_DATA: howto manager. (line 1365) +* BFD_RELOC_V850_GLOB_DAT: howto manager. (line 1347) +* BFD_RELOC_V850_JMP_SLOT: howto manager. (line 1350) +* BFD_RELOC_V850_LO16_S1: howto manager. (line 1323) +* BFD_RELOC_V850_LO16_SPLIT_OFFSET: howto manager. (line 1298) +* BFD_RELOC_V850_LONGCALL: howto manager. (line 1289) +* BFD_RELOC_V850_LONGJUMP: howto manager. (line 1292) +* BFD_RELOC_V850_RELATIVE: howto manager. (line 1353) +* BFD_RELOC_V850_SDA_15_16_OFFSET: howto manager. (line 1243) +* BFD_RELOC_V850_SDA_16_16_OFFSET: howto manager. (line 1240) +* BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET: howto manager. (line 1275) +* BFD_RELOC_V850_TDA_16_16_OFFSET: howto manager. (line 1265) +* BFD_RELOC_V850_TDA_4_4_OFFSET: howto manager. (line 1272) +* BFD_RELOC_V850_TDA_4_5_OFFSET: howto manager. (line 1268) +* BFD_RELOC_V850_TDA_6_8_OFFSET: howto manager. (line 1254) +* BFD_RELOC_V850_TDA_7_7_OFFSET: howto manager. (line 1262) +* BFD_RELOC_V850_TDA_7_8_OFFSET: howto manager. (line 1258) +* BFD_RELOC_V850_ZDA_15_16_OFFSET: howto manager. (line 1250) +* BFD_RELOC_V850_ZDA_16_16_OFFSET: howto manager. (line 1247) +* BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET: howto manager. (line 1279) +* BFD_RELOC_VAX_GLOB_DAT: howto manager. (line 2206) +* BFD_RELOC_VAX_JMP_SLOT: howto manager. (line 2207) +* BFD_RELOC_VAX_RELATIVE: howto manager. (line 2208) +* BFD_RELOC_VPE4KMATH_DATA: howto manager. (line 1845) +* BFD_RELOC_VPE4KMATH_INSN: howto manager. (line 1846) +* BFD_RELOC_VTABLE_ENTRY: howto manager. (line 1850) +* BFD_RELOC_VTABLE_INHERIT: howto manager. (line 1849) +* BFD_RELOC_X86_64_32S: howto manager. (line 571) +* BFD_RELOC_X86_64_COPY: howto manager. (line 566) +* BFD_RELOC_X86_64_DTPMOD64: howto manager. (line 572) +* BFD_RELOC_X86_64_DTPOFF32: howto manager. (line 577) +* BFD_RELOC_X86_64_DTPOFF64: howto manager. (line 573) +* BFD_RELOC_X86_64_GLOB_DAT: howto manager. (line 567) +* BFD_RELOC_X86_64_GOT32: howto manager. (line 564) +* BFD_RELOC_X86_64_GOT64: howto manager. (line 582) +* BFD_RELOC_X86_64_GOTOFF64: howto manager. (line 580) +* BFD_RELOC_X86_64_GOTPC32: howto manager. (line 581) +* BFD_RELOC_X86_64_GOTPC32_TLSDESC: howto manager. (line 587) +* BFD_RELOC_X86_64_GOTPC64: howto manager. (line 584) +* BFD_RELOC_X86_64_GOTPCREL: howto manager. (line 570) +* BFD_RELOC_X86_64_GOTPCREL64: howto manager. (line 583) +* BFD_RELOC_X86_64_GOTPLT64: howto manager. (line 585) +* BFD_RELOC_X86_64_GOTTPOFF: howto manager. (line 578) +* BFD_RELOC_X86_64_IRELATIVE: howto manager. (line 590) +* BFD_RELOC_X86_64_JUMP_SLOT: howto manager. (line 568) +* BFD_RELOC_X86_64_PLT32: howto manager. (line 565) +* BFD_RELOC_X86_64_PLTOFF64: howto manager. (line 586) +* BFD_RELOC_X86_64_RELATIVE: howto manager. (line 569) +* BFD_RELOC_X86_64_TLSDESC: howto manager. (line 589) +* BFD_RELOC_X86_64_TLSDESC_CALL: howto manager. (line 588) +* BFD_RELOC_X86_64_TLSGD: howto manager. (line 575) +* BFD_RELOC_X86_64_TLSLD: howto manager. (line 576) +* BFD_RELOC_X86_64_TPOFF32: howto manager. (line 579) +* BFD_RELOC_X86_64_TPOFF64: howto manager. (line 574) +* BFD_RELOC_XC16X_PAG: howto manager. (line 2200) +* BFD_RELOC_XC16X_POF: howto manager. (line 2201) +* BFD_RELOC_XC16X_SEG: howto manager. (line 2202) +* BFD_RELOC_XC16X_SOF: howto manager. (line 2203) +* BFD_RELOC_XSTORMY16_12: howto manager. (line 2192) +* BFD_RELOC_XSTORMY16_24: howto manager. (line 2193) +* BFD_RELOC_XSTORMY16_FPTR16: howto manager. (line 2194) +* BFD_RELOC_XSTORMY16_REL_12: howto manager. (line 2191) +* BFD_RELOC_XTENSA_ASM_EXPAND: howto manager. (line 2312) +* BFD_RELOC_XTENSA_ASM_SIMPLIFY: howto manager. (line 2317) +* BFD_RELOC_XTENSA_DIFF16: howto manager. (line 2259) +* BFD_RELOC_XTENSA_DIFF32: howto manager. (line 2260) +* BFD_RELOC_XTENSA_DIFF8: howto manager. (line 2258) +* BFD_RELOC_XTENSA_GLOB_DAT: howto manager. (line 2248) +* BFD_RELOC_XTENSA_JMP_SLOT: howto manager. (line 2249) +* BFD_RELOC_XTENSA_OP0: howto manager. (line 2306) +* BFD_RELOC_XTENSA_OP1: howto manager. (line 2307) +* BFD_RELOC_XTENSA_OP2: howto manager. (line 2308) +* BFD_RELOC_XTENSA_PLT: howto manager. (line 2253) +* BFD_RELOC_XTENSA_RELATIVE: howto manager. (line 2250) +* BFD_RELOC_XTENSA_RTLD: howto manager. (line 2243) +* BFD_RELOC_XTENSA_SLOT0_ALT: howto manager. (line 2288) +* BFD_RELOC_XTENSA_SLOT0_OP: howto manager. (line 2268) +* BFD_RELOC_XTENSA_SLOT10_ALT: howto manager. (line 2298) +* BFD_RELOC_XTENSA_SLOT10_OP: howto manager. (line 2278) +* BFD_RELOC_XTENSA_SLOT11_ALT: howto manager. (line 2299) +* BFD_RELOC_XTENSA_SLOT11_OP: howto manager. (line 2279) +* BFD_RELOC_XTENSA_SLOT12_ALT: howto manager. (line 2300) +* BFD_RELOC_XTENSA_SLOT12_OP: howto manager. (line 2280) +* BFD_RELOC_XTENSA_SLOT13_ALT: howto manager. (line 2301) +* BFD_RELOC_XTENSA_SLOT13_OP: howto manager. (line 2281) +* BFD_RELOC_XTENSA_SLOT14_ALT: howto manager. (line 2302) +* BFD_RELOC_XTENSA_SLOT14_OP: howto manager. (line 2282) +* BFD_RELOC_XTENSA_SLOT1_ALT: howto manager. (line 2289) +* BFD_RELOC_XTENSA_SLOT1_OP: howto manager. (line 2269) +* BFD_RELOC_XTENSA_SLOT2_ALT: howto manager. (line 2290) +* BFD_RELOC_XTENSA_SLOT2_OP: howto manager. (line 2270) +* BFD_RELOC_XTENSA_SLOT3_ALT: howto manager. (line 2291) +* BFD_RELOC_XTENSA_SLOT3_OP: howto manager. (line 2271) +* BFD_RELOC_XTENSA_SLOT4_ALT: howto manager. (line 2292) +* BFD_RELOC_XTENSA_SLOT4_OP: howto manager. (line 2272) +* BFD_RELOC_XTENSA_SLOT5_ALT: howto manager. (line 2293) +* BFD_RELOC_XTENSA_SLOT5_OP: howto manager. (line 2273) +* BFD_RELOC_XTENSA_SLOT6_ALT: howto manager. (line 2294) +* BFD_RELOC_XTENSA_SLOT6_OP: howto manager. (line 2274) +* BFD_RELOC_XTENSA_SLOT7_ALT: howto manager. (line 2295) +* BFD_RELOC_XTENSA_SLOT7_OP: howto manager. (line 2275) +* BFD_RELOC_XTENSA_SLOT8_ALT: howto manager. (line 2296) +* BFD_RELOC_XTENSA_SLOT8_OP: howto manager. (line 2276) +* BFD_RELOC_XTENSA_SLOT9_ALT: howto manager. (line 2297) +* BFD_RELOC_XTENSA_SLOT9_OP: howto manager. (line 2277) +* BFD_RELOC_XTENSA_TLS_ARG: howto manager. (line 2327) +* BFD_RELOC_XTENSA_TLS_CALL: howto manager. (line 2328) +* BFD_RELOC_XTENSA_TLS_DTPOFF: howto manager. (line 2324) +* BFD_RELOC_XTENSA_TLS_FUNC: howto manager. (line 2326) +* BFD_RELOC_XTENSA_TLS_TPOFF: howto manager. (line 2325) +* BFD_RELOC_XTENSA_TLSDESC_ARG: howto manager. (line 2323) +* BFD_RELOC_XTENSA_TLSDESC_FN: howto manager. (line 2322) +* BFD_RELOC_Z80_DISP8: howto manager. (line 2331) +* BFD_RELOC_Z8K_CALLR: howto manager. (line 2337) +* BFD_RELOC_Z8K_DISP7: howto manager. (line 2334) +* BFD_RELOC_Z8K_IMM4L: howto manager. (line 2340) +* bfd_rename_section: section prototypes. (line 155) +* bfd_scan_arch: Architectures. (line 456) +* bfd_scan_vma: BFD front end. (line 535) +* bfd_seach_for_target: bfd_target. (line 519) +* bfd_section_already_linked: Writing the symbol table. + (line 55) +* bfd_section_list_clear: section prototypes. (line 8) +* bfd_sections_find_if: section prototypes. (line 185) +* bfd_set_arch_info: Architectures. (line 497) +* bfd_set_archive_head: Archives. (line 69) +* bfd_set_default_target: bfd_target. (line 458) +* bfd_set_error: BFD front end. (line 345) +* bfd_set_error_handler: BFD front end. (line 387) +* bfd_set_error_program_name: BFD front end. (line 396) +* bfd_set_file_flags: BFD front end. (line 455) +* bfd_set_format: Formats. (line 68) +* bfd_set_gp_size: BFD front end. (line 525) +* bfd_set_private_flags: BFD front end. (line 602) +* bfd_set_reloc: BFD front end. (line 445) +* bfd_set_section_contents: section prototypes. (line 216) +* bfd_set_section_flags: section prototypes. (line 140) +* bfd_set_section_size: section prototypes. (line 202) +* bfd_set_start_address: BFD front end. (line 504) +* bfd_set_symtab: symbol handling functions. + (line 60) +* bfd_symbol_info: symbol handling functions. + (line 130) +* bfd_target_list: bfd_target. (line 510) +* bfd_write_bigendian_4byte_int: Internal. (line 13) +* bfd_zalloc: Opening and Closing. + (line 232) +* bfd_zalloc2: Opening and Closing. + (line 241) +* coff_symbol_type: coff. (line 244) +* core_file_matches_executable_p: Core Files. (line 39) +* find_separate_debug_file: Opening and Closing. + (line 283) +* generic_core_file_matches_executable_p: Core Files. (line 49) +* get_debug_link_info: Opening and Closing. + (line 264) +* Hash tables: Hash Tables. (line 6) +* internal object-file format: Canonical format. (line 11) +* Linker: Linker Functions. (line 6) +* Other functions: BFD front end. (line 617) +* separate_debug_file_exists: Opening and Closing. + (line 274) +* struct bfd_iovec: BFD front end. (line 823) +* target vector (_bfd_final_link): Performing the Final Link. + (line 6) +* target vector (_bfd_link_add_symbols): Adding Symbols to the Hash Table. + (line 6) +* target vector (_bfd_link_hash_table_create): Creating a Linker Hash Table. + (line 6) +* The HOWTO Macro: typedef arelent. (line 288) +* what is it?: Overview. (line 6) + + + +Tag Table: +Node: Top1089 +Node: Overview1428 +Node: History2479 +Node: How It Works3425 +Node: What BFD Version 2 Can Do4968 +Node: BFD information loss6283 +Node: Canonical format8815 +Node: BFD front end13187 +Node: Memory Usage46098 +Node: Initialization47326 +Node: Sections47785 +Node: Section Input48268 +Node: Section Output49633 +Node: typedef asection52119 +Node: section prototypes77989 +Node: Symbols87884 +Node: Reading Symbols89479 +Node: Writing Symbols90586 +Node: Mini Symbols92295 +Node: typedef asymbol93269 +Node: symbol handling functions99328 +Node: Archives104670 +Node: Formats108396 +Node: Relocations111344 +Node: typedef arelent112071 +Node: howto manager127707 +Node: Core Files212506 +Node: Targets214544 +Node: bfd_target216514 +Node: Architectures239404 +Node: Opening and Closing263894 +Node: Internal275350 +Node: File Caching281695 +Node: Linker Functions283609 +Node: Creating a Linker Hash Table285282 +Node: Adding Symbols to the Hash Table287020 +Node: Differing file formats287920 +Node: Adding symbols from an object file289645 +Node: Adding symbols from an archive291796 +Node: Performing the Final Link294725 +Node: Information provided by the linker295967 +Node: Relocating the section contents297121 +Node: Writing the symbol table298872 +Node: Hash Tables303258 +Node: Creating and Freeing a Hash Table304456 +Node: Looking Up or Entering a String305706 +Node: Traversing a Hash Table306959 +Node: Deriving a New Hash Table Type307748 +Node: Define the Derived Structures308814 +Node: Write the Derived Creation Routine309895 +Node: Write Other Derived Routines312519 +Node: BFD back ends313834 +Node: What to Put Where314104 +Node: aout314284 +Node: coff320602 +Node: elf349035 +Node: mmo349436 +Node: File layout350364 +Node: Symbol-table356011 +Node: mmo section mapping359780 +Node: GNU Free Documentation License363432 +Node: BFD Index388515 + +End Tag Table diff --git a/bfd/doc/bfdio.texi b/bfd/doc/bfdio.texi new file mode 100644 index 0000000..ff8275f --- /dev/null +++ b/bfd/doc/bfdio.texi @@ -0,0 +1,95 @@ +@findex struct bfd_iovec +@subsubsection @code{struct bfd_iovec} +@strong{Description}@* +The @code{struct bfd_iovec} contains the internal file I/O class. +Each @code{BFD} has an instance of this class and all file I/O is +routed through it (it is assumed that the instance implements +all methods listed below). +@example +struct bfd_iovec +@{ + /* To avoid problems with macros, a "b" rather than "f" + prefix is prepended to each method name. */ + /* Attempt to read/write NBYTES on ABFD's IOSTREAM storing/fetching + bytes starting at PTR. Return the number of bytes actually + transfered (a read past end-of-file returns less than NBYTES), + or -1 (setting @code{bfd_error}) if an error occurs. */ + file_ptr (*bread) (struct bfd *abfd, void *ptr, file_ptr nbytes); + file_ptr (*bwrite) (struct bfd *abfd, const void *ptr, + file_ptr nbytes); + /* Return the current IOSTREAM file offset, or -1 (setting @code{bfd_error} + if an error occurs. */ + file_ptr (*btell) (struct bfd *abfd); + /* For the following, on successful completion a value of 0 is returned. + Otherwise, a value of -1 is returned (and @code{bfd_error} is set). */ + int (*bseek) (struct bfd *abfd, file_ptr offset, int whence); + int (*bclose) (struct bfd *abfd); + int (*bflush) (struct bfd *abfd); + int (*bstat) (struct bfd *abfd, struct stat *sb); + /* Mmap a part of the files. ADDR, LEN, PROT, FLAGS and OFFSET are the usual + mmap parameter, except that LEN and OFFSET do not need to be page + aligned. Returns (void *)-1 on failure, mmapped address on success. + Also write in MAP_ADDR the address of the page aligned buffer and in + MAP_LEN the size mapped (a page multiple). Use unmap with MAP_ADDR and + MAP_LEN to unmap. */ + void *(*bmmap) (struct bfd *abfd, void *addr, bfd_size_type len, + int prot, int flags, file_ptr offset, + void **map_addr, bfd_size_type *map_len); +@}; +extern const struct bfd_iovec _bfd_memory_iovec; +@end example + +@findex bfd_get_mtime +@subsubsection @code{bfd_get_mtime} +@strong{Synopsis} +@example +long bfd_get_mtime (bfd *abfd); +@end example +@strong{Description}@* +Return the file modification time (as read from the file system, or +from the archive header for archive members). + +@findex bfd_get_size +@subsubsection @code{bfd_get_size} +@strong{Synopsis} +@example +file_ptr bfd_get_size (bfd *abfd); +@end example +@strong{Description}@* +Return the file size (as read from file system) for the file +associated with BFD @var{abfd}. + +The initial motivation for, and use of, this routine is not +so we can get the exact size of the object the BFD applies to, since +that might not be generally possible (archive members for example). +It would be ideal if someone could eventually modify +it so that such results were guaranteed. + +Instead, we want to ask questions like "is this NNN byte sized +object I'm about to try read from file offset YYY reasonable?" +As as example of where we might do this, some object formats +use string tables for which the first @code{sizeof (long)} bytes of the +table contain the size of the table itself, including the size bytes. +If an application tries to read what it thinks is one of these +string tables, without some way to validate the size, and for +some reason the size is wrong (byte swapping error, wrong location +for the string table, etc.), the only clue is likely to be a read +error when it tries to read the table, or a "virtual memory +exhausted" error when it tries to allocate 15 bazillon bytes +of space for the 15 bazillon byte table it is about to read. +This function at least allows us to answer the question, "is the +size reasonable?". + +@findex bfd_mmap +@subsubsection @code{bfd_mmap} +@strong{Synopsis} +@example +void *bfd_mmap (bfd *abfd, void *addr, bfd_size_type len, + int prot, int flags, file_ptr offset, + void **map_addr, bfd_size_type *map_len); +@end example +@strong{Description}@* +Return mmap()ed region of the file, if possible and implemented. +LEN and OFFSET do not need to be page aligned. The page aligned +address and length are written to MAP_ADDR and MAP_LEN. + diff --git a/bfd/doc/bfdt.texi b/bfd/doc/bfdt.texi new file mode 100644 index 0000000..8b82750 --- /dev/null +++ b/bfd/doc/bfdt.texi @@ -0,0 +1,896 @@ +@section @code{typedef bfd} +A BFD has type @code{bfd}; objects of this type are the +cornerstone of any application using BFD. Using BFD +consists of making references though the BFD and to data in the BFD. + +Here is the structure that defines the type @code{bfd}. It +contains the major data about the file and pointers +to the rest of the data. + + +@example + +enum bfd_direction + @{ + no_direction = 0, + read_direction = 1, + write_direction = 2, + both_direction = 3 + @}; + +struct bfd +@{ + /* A unique identifier of the BFD */ + unsigned int id; + + /* The filename the application opened the BFD with. */ + const char *filename; + + /* A pointer to the target jump table. */ + const struct bfd_target *xvec; + + /* The IOSTREAM, and corresponding IO vector that provide access + to the file backing the BFD. */ + void *iostream; + const struct bfd_iovec *iovec; + + /* The caching routines use these to maintain a + least-recently-used list of BFDs. */ + struct bfd *lru_prev, *lru_next; + + /* When a file is closed by the caching routines, BFD retains + state information on the file here... */ + ufile_ptr where; + + /* File modified time, if mtime_set is TRUE. */ + long mtime; + + /* Reserved for an unimplemented file locking extension. */ + int ifd; + + /* The format which belongs to the BFD. (object, core, etc.) */ + bfd_format format; + + /* The direction with which the BFD was opened. */ + enum bfd_direction direction; + + /* Format_specific flags. */ + flagword flags; + + /* Values that may appear in the flags field of a BFD. These also + appear in the object_flags field of the bfd_target structure, where + they indicate the set of flags used by that backend (not all flags + are meaningful for all object file formats) (FIXME: at the moment, + the object_flags values have mostly just been copied from backend + to another, and are not necessarily correct). */ + +#define BFD_NO_FLAGS 0x00 + + /* BFD contains relocation entries. */ +#define HAS_RELOC 0x01 + + /* BFD is directly executable. */ +#define EXEC_P 0x02 + + /* BFD has line number information (basically used for F_LNNO in a + COFF header). */ +#define HAS_LINENO 0x04 + + /* BFD has debugging information. */ +#define HAS_DEBUG 0x08 + + /* BFD has symbols. */ +#define HAS_SYMS 0x10 + + /* BFD has local symbols (basically used for F_LSYMS in a COFF + header). */ +#define HAS_LOCALS 0x20 + + /* BFD is a dynamic object. */ +#define DYNAMIC 0x40 + + /* Text section is write protected (if D_PAGED is not set, this is + like an a.out NMAGIC file) (the linker sets this by default, but + clears it for -r or -N). */ +#define WP_TEXT 0x80 + + /* BFD is dynamically paged (this is like an a.out ZMAGIC file) (the + linker sets this by default, but clears it for -r or -n or -N). */ +#define D_PAGED 0x100 + + /* BFD is relaxable (this means that bfd_relax_section may be able to + do something) (sometimes bfd_relax_section can do something even if + this is not set). */ +#define BFD_IS_RELAXABLE 0x200 + + /* This may be set before writing out a BFD to request using a + traditional format. For example, this is used to request that when + writing out an a.out object the symbols not be hashed to eliminate + duplicates. */ +#define BFD_TRADITIONAL_FORMAT 0x400 + + /* This flag indicates that the BFD contents are actually cached + in memory. If this is set, iostream points to a bfd_in_memory + struct. */ +#define BFD_IN_MEMORY 0x800 + + /* The sections in this BFD specify a memory page. */ +#define HAS_LOAD_PAGE 0x1000 + + /* This BFD has been created by the linker and doesn't correspond + to any input file. */ +#define BFD_LINKER_CREATED 0x2000 + + /* This may be set before writing out a BFD to request that it + be written using values for UIDs, GIDs, timestamps, etc. that + will be consistent from run to run. */ +#define BFD_DETERMINISTIC_OUTPUT 0x4000 + + /* Compress sections in this BFD. */ +#define BFD_COMPRESS 0x8000 + + /* Decompress sections in this BFD. */ +#define BFD_DECOMPRESS 0x10000 + + /* BFD is a dummy, for plugins. */ +#define BFD_PLUGIN 0x20000 + + /* Flags bits to be saved in bfd_preserve_save. */ +#define BFD_FLAGS_SAVED \ + (BFD_IN_MEMORY | BFD_COMPRESS | BFD_DECOMPRESS | BFD_PLUGIN) + + /* Flags bits which are for BFD use only. */ +#define BFD_FLAGS_FOR_BFD_USE_MASK \ + (BFD_IN_MEMORY | BFD_COMPRESS | BFD_DECOMPRESS | BFD_LINKER_CREATED \ + | BFD_PLUGIN | BFD_TRADITIONAL_FORMAT | BFD_DETERMINISTIC_OUTPUT) + + /* Currently my_archive is tested before adding origin to + anything. I believe that this can become always an add of + origin, with origin set to 0 for non archive files. */ + ufile_ptr origin; + + /* The origin in the archive of the proxy entry. This will + normally be the same as origin, except for thin archives, + when it will contain the current offset of the proxy in the + thin archive rather than the offset of the bfd in its actual + container. */ + ufile_ptr proxy_origin; + + /* A hash table for section names. */ + struct bfd_hash_table section_htab; + + /* Pointer to linked list of sections. */ + struct bfd_section *sections; + + /* The last section on the section list. */ + struct bfd_section *section_last; + + /* The number of sections. */ + unsigned int section_count; + + /* Stuff only useful for object files: + The start address. */ + bfd_vma start_address; + + /* Used for input and output. */ + unsigned int symcount; + + /* Symbol table for output BFD (with symcount entries). + Also used by the linker to cache input BFD symbols. */ + struct bfd_symbol **outsymbols; + + /* Used for slurped dynamic symbol tables. */ + unsigned int dynsymcount; + + /* Pointer to structure which contains architecture information. */ + const struct bfd_arch_info *arch_info; + + /* Stuff only useful for archives. */ + void *arelt_data; + struct bfd *my_archive; /* The containing archive BFD. */ + struct bfd *archive_next; /* The next BFD in the archive. */ + struct bfd *archive_head; /* The first BFD in the archive. */ + struct bfd *nested_archives; /* List of nested archive in a flattened + thin archive. */ + + /* A chain of BFD structures involved in a link. */ + struct bfd *link_next; + + /* A field used by _bfd_generic_link_add_archive_symbols. This will + be used only for archive elements. */ + int archive_pass; + + /* Used by the back end to hold private data. */ + union + @{ + struct aout_data_struct *aout_data; + struct artdata *aout_ar_data; + struct _oasys_data *oasys_obj_data; + struct _oasys_ar_data *oasys_ar_data; + struct coff_tdata *coff_obj_data; + struct pe_tdata *pe_obj_data; + struct xcoff_tdata *xcoff_obj_data; + struct ecoff_tdata *ecoff_obj_data; + struct ieee_data_struct *ieee_data; + struct ieee_ar_data_struct *ieee_ar_data; + struct srec_data_struct *srec_data; + struct verilog_data_struct *verilog_data; + struct ihex_data_struct *ihex_data; + struct tekhex_data_struct *tekhex_data; + struct elf_obj_tdata *elf_obj_data; + struct nlm_obj_tdata *nlm_obj_data; + struct bout_data_struct *bout_data; + struct mmo_data_struct *mmo_data; + struct sun_core_struct *sun_core_data; + struct sco5_core_struct *sco5_core_data; + struct trad_core_struct *trad_core_data; + struct som_data_struct *som_data; + struct hpux_core_struct *hpux_core_data; + struct hppabsd_core_struct *hppabsd_core_data; + struct sgi_core_struct *sgi_core_data; + struct lynx_core_struct *lynx_core_data; + struct osf_core_struct *osf_core_data; + struct cisco_core_struct *cisco_core_data; + struct versados_data_struct *versados_data; + struct netbsd_core_struct *netbsd_core_data; + struct mach_o_data_struct *mach_o_data; + struct mach_o_fat_data_struct *mach_o_fat_data; + struct plugin_data_struct *plugin_data; + struct bfd_pef_data_struct *pef_data; + struct bfd_pef_xlib_data_struct *pef_xlib_data; + struct bfd_sym_data_struct *sym_data; + void *any; + @} + tdata; + + /* Used by the application to hold private data. */ + void *usrdata; + + /* Where all the allocated stuff under this BFD goes. This is a + struct objalloc *, but we use void * to avoid requiring the inclusion + of objalloc.h. */ + void *memory; + + /* Is the file descriptor being cached? That is, can it be closed as + needed, and re-opened when accessed later? */ + unsigned int cacheable : 1; + + /* Marks whether there was a default target specified when the + BFD was opened. This is used to select which matching algorithm + to use to choose the back end. */ + unsigned int target_defaulted : 1; + + /* ... and here: (``once'' means at least once). */ + unsigned int opened_once : 1; + + /* Set if we have a locally maintained mtime value, rather than + getting it from the file each time. */ + unsigned int mtime_set : 1; + + /* Flag set if symbols from this BFD should not be exported. */ + unsigned int no_export : 1; + + /* Remember when output has begun, to stop strange things + from happening. */ + unsigned int output_has_begun : 1; + + /* Have archive map. */ + unsigned int has_armap : 1; + + /* Set if this is a thin archive. */ + unsigned int is_thin_archive : 1; + + /* Set if only required symbols should be added in the link hash table for + this object. Used by VMS linkers. */ + unsigned int selective_search : 1; +@}; + +@end example +@section Error reporting +Most BFD functions return nonzero on success (check their +individual documentation for precise semantics). On an error, +they call @code{bfd_set_error} to set an error condition that callers +can check by calling @code{bfd_get_error}. +If that returns @code{bfd_error_system_call}, then check +@code{errno}. + +The easiest way to report a BFD error to the user is to +use @code{bfd_perror}. + +@subsection Type @code{bfd_error_type} +The values returned by @code{bfd_get_error} are defined by the +enumerated type @code{bfd_error_type}. + + +@example + +typedef enum bfd_error +@{ + bfd_error_no_error = 0, + bfd_error_system_call, + bfd_error_invalid_target, + bfd_error_wrong_format, + bfd_error_wrong_object_format, + bfd_error_invalid_operation, + bfd_error_no_memory, + bfd_error_no_symbols, + bfd_error_no_armap, + bfd_error_no_more_archived_files, + bfd_error_malformed_archive, + bfd_error_file_not_recognized, + bfd_error_file_ambiguously_recognized, + bfd_error_no_contents, + bfd_error_nonrepresentable_section, + bfd_error_no_debug_section, + bfd_error_bad_value, + bfd_error_file_truncated, + bfd_error_file_too_big, + bfd_error_on_input, + bfd_error_invalid_error_code +@} +bfd_error_type; + +@end example +@findex bfd_get_error +@subsubsection @code{bfd_get_error} +@strong{Synopsis} +@example +bfd_error_type bfd_get_error (void); +@end example +@strong{Description}@* +Return the current BFD error condition. + +@findex bfd_set_error +@subsubsection @code{bfd_set_error} +@strong{Synopsis} +@example +void bfd_set_error (bfd_error_type error_tag, ...); +@end example +@strong{Description}@* +Set the BFD error condition to be @var{error_tag}. +If @var{error_tag} is bfd_error_on_input, then this function +takes two more parameters, the input bfd where the error +occurred, and the bfd_error_type error. + +@findex bfd_errmsg +@subsubsection @code{bfd_errmsg} +@strong{Synopsis} +@example +const char *bfd_errmsg (bfd_error_type error_tag); +@end example +@strong{Description}@* +Return a string describing the error @var{error_tag}, or +the system error if @var{error_tag} is @code{bfd_error_system_call}. + +@findex bfd_perror +@subsubsection @code{bfd_perror} +@strong{Synopsis} +@example +void bfd_perror (const char *message); +@end example +@strong{Description}@* +Print to the standard error stream a string describing the +last BFD error that occurred, or the last system error if +the last BFD error was a system call failure. If @var{message} +is non-NULL and non-empty, the error string printed is preceded +by @var{message}, a colon, and a space. It is followed by a newline. + +@subsection BFD error handler +Some BFD functions want to print messages describing the +problem. They call a BFD error handler function. This +function may be overridden by the program. + +The BFD error handler acts like printf. + + +@example + +typedef void (*bfd_error_handler_type) (const char *, ...); + +@end example +@findex bfd_set_error_handler +@subsubsection @code{bfd_set_error_handler} +@strong{Synopsis} +@example +bfd_error_handler_type bfd_set_error_handler (bfd_error_handler_type); +@end example +@strong{Description}@* +Set the BFD error handler function. Returns the previous +function. + +@findex bfd_set_error_program_name +@subsubsection @code{bfd_set_error_program_name} +@strong{Synopsis} +@example +void bfd_set_error_program_name (const char *); +@end example +@strong{Description}@* +Set the program name to use when printing a BFD error. This +is printed before the error message followed by a colon and +space. The string must not be changed after it is passed to +this function. + +@findex bfd_get_error_handler +@subsubsection @code{bfd_get_error_handler} +@strong{Synopsis} +@example +bfd_error_handler_type bfd_get_error_handler (void); +@end example +@strong{Description}@* +Return the BFD error handler function. + +@section Miscellaneous + + +@subsection Miscellaneous functions + + +@findex bfd_get_reloc_upper_bound +@subsubsection @code{bfd_get_reloc_upper_bound} +@strong{Synopsis} +@example +long bfd_get_reloc_upper_bound (bfd *abfd, asection *sect); +@end example +@strong{Description}@* +Return the number of bytes required to store the +relocation information associated with section @var{sect} +attached to bfd @var{abfd}. If an error occurs, return -1. + +@findex bfd_canonicalize_reloc +@subsubsection @code{bfd_canonicalize_reloc} +@strong{Synopsis} +@example +long bfd_canonicalize_reloc + (bfd *abfd, asection *sec, arelent **loc, asymbol **syms); +@end example +@strong{Description}@* +Call the back end associated with the open BFD +@var{abfd} and translate the external form of the relocation +information attached to @var{sec} into the internal canonical +form. Place the table into memory at @var{loc}, which has +been preallocated, usually by a call to +@code{bfd_get_reloc_upper_bound}. Returns the number of relocs, or +-1 on error. + +The @var{syms} table is also needed for horrible internal magic +reasons. + +@findex bfd_set_reloc +@subsubsection @code{bfd_set_reloc} +@strong{Synopsis} +@example +void bfd_set_reloc + (bfd *abfd, asection *sec, arelent **rel, unsigned int count); +@end example +@strong{Description}@* +Set the relocation pointer and count within +section @var{sec} to the values @var{rel} and @var{count}. +The argument @var{abfd} is ignored. + +@findex bfd_set_file_flags +@subsubsection @code{bfd_set_file_flags} +@strong{Synopsis} +@example +bfd_boolean bfd_set_file_flags (bfd *abfd, flagword flags); +@end example +@strong{Description}@* +Set the flag word in the BFD @var{abfd} to the value @var{flags}. + +Possible errors are: +@itemize @bullet + +@item +@code{bfd_error_wrong_format} - The target bfd was not of object format. +@item +@code{bfd_error_invalid_operation} - The target bfd was open for reading. +@item +@code{bfd_error_invalid_operation} - +The flag word contained a bit which was not applicable to the +type of file. E.g., an attempt was made to set the @code{D_PAGED} bit +on a BFD format which does not support demand paging. +@end itemize + +@findex bfd_get_arch_size +@subsubsection @code{bfd_get_arch_size} +@strong{Synopsis} +@example +int bfd_get_arch_size (bfd *abfd); +@end example +@strong{Description}@* +Returns the architecture address size, in bits, as determined +by the object file's format. For ELF, this information is +included in the header. + +@strong{Returns}@* +Returns the arch size in bits if known, @code{-1} otherwise. + +@findex bfd_get_sign_extend_vma +@subsubsection @code{bfd_get_sign_extend_vma} +@strong{Synopsis} +@example +int bfd_get_sign_extend_vma (bfd *abfd); +@end example +@strong{Description}@* +Indicates if the target architecture "naturally" sign extends +an address. Some architectures implicitly sign extend address +values when they are converted to types larger than the size +of an address. For instance, bfd_get_start_address() will +return an address sign extended to fill a bfd_vma when this is +the case. + +@strong{Returns}@* +Returns @code{1} if the target architecture is known to sign +extend addresses, @code{0} if the target architecture is known to +not sign extend addresses, and @code{-1} otherwise. + +@findex bfd_set_start_address +@subsubsection @code{bfd_set_start_address} +@strong{Synopsis} +@example +bfd_boolean bfd_set_start_address (bfd *abfd, bfd_vma vma); +@end example +@strong{Description}@* +Make @var{vma} the entry point of output BFD @var{abfd}. + +@strong{Returns}@* +Returns @code{TRUE} on success, @code{FALSE} otherwise. + +@findex bfd_get_gp_size +@subsubsection @code{bfd_get_gp_size} +@strong{Synopsis} +@example +unsigned int bfd_get_gp_size (bfd *abfd); +@end example +@strong{Description}@* +Return the maximum size of objects to be optimized using the GP +register under MIPS ECOFF. This is typically set by the @code{-G} +argument to the compiler, assembler or linker. + +@findex bfd_set_gp_size +@subsubsection @code{bfd_set_gp_size} +@strong{Synopsis} +@example +void bfd_set_gp_size (bfd *abfd, unsigned int i); +@end example +@strong{Description}@* +Set the maximum size of objects to be optimized using the GP +register under ECOFF or MIPS ELF. This is typically set by +the @code{-G} argument to the compiler, assembler or linker. + +@findex bfd_scan_vma +@subsubsection @code{bfd_scan_vma} +@strong{Synopsis} +@example +bfd_vma bfd_scan_vma (const char *string, const char **end, int base); +@end example +@strong{Description}@* +Convert, like @code{strtoul}, a numerical expression +@var{string} into a @code{bfd_vma} integer, and return that integer. +(Though without as many bells and whistles as @code{strtoul}.) +The expression is assumed to be unsigned (i.e., positive). +If given a @var{base}, it is used as the base for conversion. +A base of 0 causes the function to interpret the string +in hex if a leading "0x" or "0X" is found, otherwise +in octal if a leading zero is found, otherwise in decimal. + +If the value would overflow, the maximum @code{bfd_vma} value is +returned. + +@findex bfd_copy_private_header_data +@subsubsection @code{bfd_copy_private_header_data} +@strong{Synopsis} +@example +bfd_boolean bfd_copy_private_header_data (bfd *ibfd, bfd *obfd); +@end example +@strong{Description}@* +Copy private BFD header information from the BFD @var{ibfd} to the +the BFD @var{obfd}. This copies information that may require +sections to exist, but does not require symbol tables. Return +@code{true} on success, @code{false} on error. +Possible error returns are: + +@itemize @bullet + +@item +@code{bfd_error_no_memory} - +Not enough memory exists to create private data for @var{obfd}. +@end itemize +@example +#define bfd_copy_private_header_data(ibfd, obfd) \ + BFD_SEND (obfd, _bfd_copy_private_header_data, \ + (ibfd, obfd)) +@end example + +@findex bfd_copy_private_bfd_data +@subsubsection @code{bfd_copy_private_bfd_data} +@strong{Synopsis} +@example +bfd_boolean bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd); +@end example +@strong{Description}@* +Copy private BFD information from the BFD @var{ibfd} to the +the BFD @var{obfd}. Return @code{TRUE} on success, @code{FALSE} on error. +Possible error returns are: + +@itemize @bullet + +@item +@code{bfd_error_no_memory} - +Not enough memory exists to create private data for @var{obfd}. +@end itemize +@example +#define bfd_copy_private_bfd_data(ibfd, obfd) \ + BFD_SEND (obfd, _bfd_copy_private_bfd_data, \ + (ibfd, obfd)) +@end example + +@findex bfd_merge_private_bfd_data +@subsubsection @code{bfd_merge_private_bfd_data} +@strong{Synopsis} +@example +bfd_boolean bfd_merge_private_bfd_data (bfd *ibfd, bfd *obfd); +@end example +@strong{Description}@* +Merge private BFD information from the BFD @var{ibfd} to the +the output file BFD @var{obfd} when linking. Return @code{TRUE} +on success, @code{FALSE} on error. Possible error returns are: + +@itemize @bullet + +@item +@code{bfd_error_no_memory} - +Not enough memory exists to create private data for @var{obfd}. +@end itemize +@example +#define bfd_merge_private_bfd_data(ibfd, obfd) \ + BFD_SEND (obfd, _bfd_merge_private_bfd_data, \ + (ibfd, obfd)) +@end example + +@findex bfd_set_private_flags +@subsubsection @code{bfd_set_private_flags} +@strong{Synopsis} +@example +bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags); +@end example +@strong{Description}@* +Set private BFD flag information in the BFD @var{abfd}. +Return @code{TRUE} on success, @code{FALSE} on error. Possible error +returns are: + +@itemize @bullet + +@item +@code{bfd_error_no_memory} - +Not enough memory exists to create private data for @var{obfd}. +@end itemize +@example +#define bfd_set_private_flags(abfd, flags) \ + BFD_SEND (abfd, _bfd_set_private_flags, (abfd, flags)) +@end example + +@findex Other functions +@subsubsection @code{Other functions} +@strong{Description}@* +The following functions exist but have not yet been documented. +@example +#define bfd_sizeof_headers(abfd, info) \ + BFD_SEND (abfd, _bfd_sizeof_headers, (abfd, info)) + +#define bfd_find_nearest_line(abfd, sec, syms, off, file, func, line) \ + BFD_SEND (abfd, _bfd_find_nearest_line, \ + (abfd, sec, syms, off, file, func, line)) + +#define bfd_find_line(abfd, syms, sym, file, line) \ + BFD_SEND (abfd, _bfd_find_line, \ + (abfd, syms, sym, file, line)) + +#define bfd_find_inliner_info(abfd, file, func, line) \ + BFD_SEND (abfd, _bfd_find_inliner_info, \ + (abfd, file, func, line)) + +#define bfd_debug_info_start(abfd) \ + BFD_SEND (abfd, _bfd_debug_info_start, (abfd)) + +#define bfd_debug_info_end(abfd) \ + BFD_SEND (abfd, _bfd_debug_info_end, (abfd)) + +#define bfd_debug_info_accumulate(abfd, section) \ + BFD_SEND (abfd, _bfd_debug_info_accumulate, (abfd, section)) + +#define bfd_stat_arch_elt(abfd, stat) \ + BFD_SEND (abfd, _bfd_stat_arch_elt,(abfd, stat)) + +#define bfd_update_armap_timestamp(abfd) \ + BFD_SEND (abfd, _bfd_update_armap_timestamp, (abfd)) + +#define bfd_set_arch_mach(abfd, arch, mach)\ + BFD_SEND ( abfd, _bfd_set_arch_mach, (abfd, arch, mach)) + +#define bfd_relax_section(abfd, section, link_info, again) \ + BFD_SEND (abfd, _bfd_relax_section, (abfd, section, link_info, again)) + +#define bfd_gc_sections(abfd, link_info) \ + BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info)) + +#define bfd_lookup_section_flags(link_info, flag_info) \ + BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info)) + +#define bfd_merge_sections(abfd, link_info) \ + BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info)) + +#define bfd_is_group_section(abfd, sec) \ + BFD_SEND (abfd, _bfd_is_group_section, (abfd, sec)) + +#define bfd_discard_group(abfd, sec) \ + BFD_SEND (abfd, _bfd_discard_group, (abfd, sec)) + +#define bfd_link_hash_table_create(abfd) \ + BFD_SEND (abfd, _bfd_link_hash_table_create, (abfd)) + +#define bfd_link_hash_table_free(abfd, hash) \ + BFD_SEND (abfd, _bfd_link_hash_table_free, (hash)) + +#define bfd_link_add_symbols(abfd, info) \ + BFD_SEND (abfd, _bfd_link_add_symbols, (abfd, info)) + +#define bfd_link_just_syms(abfd, sec, info) \ + BFD_SEND (abfd, _bfd_link_just_syms, (sec, info)) + +#define bfd_final_link(abfd, info) \ + BFD_SEND (abfd, _bfd_final_link, (abfd, info)) + +#define bfd_free_cached_info(abfd) \ + BFD_SEND (abfd, _bfd_free_cached_info, (abfd)) + +#define bfd_get_dynamic_symtab_upper_bound(abfd) \ + BFD_SEND (abfd, _bfd_get_dynamic_symtab_upper_bound, (abfd)) + +#define bfd_print_private_bfd_data(abfd, file)\ + BFD_SEND (abfd, _bfd_print_private_bfd_data, (abfd, file)) + +#define bfd_canonicalize_dynamic_symtab(abfd, asymbols) \ + BFD_SEND (abfd, _bfd_canonicalize_dynamic_symtab, (abfd, asymbols)) + +#define bfd_get_synthetic_symtab(abfd, count, syms, dyncount, dynsyms, ret) \ + BFD_SEND (abfd, _bfd_get_synthetic_symtab, (abfd, count, syms, \ + dyncount, dynsyms, ret)) + +#define bfd_get_dynamic_reloc_upper_bound(abfd) \ + BFD_SEND (abfd, _bfd_get_dynamic_reloc_upper_bound, (abfd)) + +#define bfd_canonicalize_dynamic_reloc(abfd, arels, asyms) \ + BFD_SEND (abfd, _bfd_canonicalize_dynamic_reloc, (abfd, arels, asyms)) + +extern bfd_byte *bfd_get_relocated_section_contents + (bfd *, struct bfd_link_info *, struct bfd_link_order *, bfd_byte *, + bfd_boolean, asymbol **); + +@end example + +@findex bfd_alt_mach_code +@subsubsection @code{bfd_alt_mach_code} +@strong{Synopsis} +@example +bfd_boolean bfd_alt_mach_code (bfd *abfd, int alternative); +@end example +@strong{Description}@* +When more than one machine code number is available for the +same machine type, this function can be used to switch between +the preferred one (alternative == 0) and any others. Currently, +only ELF supports this feature, with up to two alternate +machine codes. + + +@example +struct bfd_preserve +@{ + void *marker; + void *tdata; + flagword flags; + const struct bfd_arch_info *arch_info; + struct bfd_section *sections; + struct bfd_section *section_last; + unsigned int section_count; + struct bfd_hash_table section_htab; +@}; + +@end example +@findex bfd_preserve_save +@subsubsection @code{bfd_preserve_save} +@strong{Synopsis} +@example +bfd_boolean bfd_preserve_save (bfd *, struct bfd_preserve *); +@end example +@strong{Description}@* +When testing an object for compatibility with a particular +target back-end, the back-end object_p function needs to set +up certain fields in the bfd on successfully recognizing the +object. This typically happens in a piecemeal fashion, with +failures possible at many points. On failure, the bfd is +supposed to be restored to its initial state, which is +virtually impossible. However, restoring a subset of the bfd +state works in practice. This function stores the subset and +reinitializes the bfd. + +@findex bfd_preserve_restore +@subsubsection @code{bfd_preserve_restore} +@strong{Synopsis} +@example +void bfd_preserve_restore (bfd *, struct bfd_preserve *); +@end example +@strong{Description}@* +This function restores bfd state saved by bfd_preserve_save. +If MARKER is non-NULL in struct bfd_preserve then that block +and all subsequently bfd_alloc'd memory is freed. + +@findex bfd_preserve_finish +@subsubsection @code{bfd_preserve_finish} +@strong{Synopsis} +@example +void bfd_preserve_finish (bfd *, struct bfd_preserve *); +@end example +@strong{Description}@* +This function should be called when the bfd state saved by +bfd_preserve_save is no longer needed. ie. when the back-end +object_p function returns with success. + +@findex bfd_emul_get_maxpagesize +@subsubsection @code{bfd_emul_get_maxpagesize} +@strong{Synopsis} +@example +bfd_vma bfd_emul_get_maxpagesize (const char *); +@end example +@strong{Description}@* +Returns the maximum page size, in bytes, as determined by +emulation. + +@strong{Returns}@* +Returns the maximum page size in bytes for ELF, 0 otherwise. + +@findex bfd_emul_set_maxpagesize +@subsubsection @code{bfd_emul_set_maxpagesize} +@strong{Synopsis} +@example +void bfd_emul_set_maxpagesize (const char *, bfd_vma); +@end example +@strong{Description}@* +For ELF, set the maximum page size for the emulation. It is +a no-op for other formats. + +@findex bfd_emul_get_commonpagesize +@subsubsection @code{bfd_emul_get_commonpagesize} +@strong{Synopsis} +@example +bfd_vma bfd_emul_get_commonpagesize (const char *); +@end example +@strong{Description}@* +Returns the common page size, in bytes, as determined by +emulation. + +@strong{Returns}@* +Returns the common page size in bytes for ELF, 0 otherwise. + +@findex bfd_emul_set_commonpagesize +@subsubsection @code{bfd_emul_set_commonpagesize} +@strong{Synopsis} +@example +void bfd_emul_set_commonpagesize (const char *, bfd_vma); +@end example +@strong{Description}@* +For ELF, set the common page size for the emulation. It is +a no-op for other formats. + +@findex bfd_demangle +@subsubsection @code{bfd_demangle} +@strong{Synopsis} +@example +char *bfd_demangle (bfd *, const char *, int); +@end example +@strong{Description}@* +Wrapper around cplus_demangle. Strips leading underscores and +other such chars that would otherwise confuse the demangler. +If passed a g++ v3 ABI mangled name, returns a buffer allocated +with malloc holding the demangled name. Returns NULL otherwise +and on memory alloc failure. + diff --git a/bfd/doc/bfdver.texi b/bfd/doc/bfdver.texi new file mode 100644 index 0000000..0529522 --- /dev/null +++ b/bfd/doc/bfdver.texi @@ -0,0 +1,4 @@ +@set VERSION 2.22 +@set VERSION_PACKAGE (GNU Binutils) +@set UPDATED November 2011 +@set BUGURL @uref{http://www.sourceware.org/bugzilla/} diff --git a/bfd/doc/bfdwin.texi b/bfd/doc/bfdwin.texi new file mode 100644 index 0000000..b1fd7d5 --- /dev/null +++ b/bfd/doc/bfdwin.texi @@ -0,0 +1,2 @@ +@findex +@subsubsection @code{} diff --git a/bfd/doc/cache.texi b/bfd/doc/cache.texi new file mode 100644 index 0000000..5820a2a --- /dev/null +++ b/bfd/doc/cache.texi @@ -0,0 +1,65 @@ +@section File caching +The file caching mechanism is embedded within BFD and allows +the application to open as many BFDs as it wants without +regard to the underlying operating system's file descriptor +limit (often as low as 20 open files). The module in +@code{cache.c} maintains a least recently used list of +@code{BFD_CACHE_MAX_OPEN} files, and exports the name +@code{bfd_cache_lookup}, which runs around and makes sure that +the required BFD is open. If not, then it chooses a file to +close, closes it and opens the one wanted, returning its file +handle. + +@subsection Caching functions + + +@findex bfd_cache_init +@subsubsection @code{bfd_cache_init} +@strong{Synopsis} +@example +bfd_boolean bfd_cache_init (bfd *abfd); +@end example +@strong{Description}@* +Add a newly opened BFD to the cache. + +@findex bfd_cache_close +@subsubsection @code{bfd_cache_close} +@strong{Synopsis} +@example +bfd_boolean bfd_cache_close (bfd *abfd); +@end example +@strong{Description}@* +Remove the BFD @var{abfd} from the cache. If the attached file is open, +then close it too. + +@strong{Returns}@* +@code{FALSE} is returned if closing the file fails, @code{TRUE} is +returned if all is well. + +@findex bfd_cache_close_all +@subsubsection @code{bfd_cache_close_all} +@strong{Synopsis} +@example +bfd_boolean bfd_cache_close_all (void); +@end example +@strong{Description}@* +Remove all BFDs from the cache. If the attached file is open, +then close it too. + +@strong{Returns}@* +@code{FALSE} is returned if closing one of the file fails, @code{TRUE} is +returned if all is well. + +@findex bfd_open_file +@subsubsection @code{bfd_open_file} +@strong{Synopsis} +@example +FILE* bfd_open_file (bfd *abfd); +@end example +@strong{Description}@* +Call the OS to open a file for @var{abfd}. Return the @code{FILE *} +(possibly @code{NULL}) that results from this operation. Set up the +BFD so that future accesses know the file is open. If the @code{FILE *} +returned is @code{NULL}, then it won't have been put in the +cache, so it won't have to be removed from it. + diff --git a/bfd/doc/coffcode.texi b/bfd/doc/coffcode.texi new file mode 100644 index 0000000..e487d84 --- /dev/null +++ b/bfd/doc/coffcode.texi @@ -0,0 +1,685 @@ +@section coff backends +BFD supports a number of different flavours of coff format. +The major differences between formats are the sizes and +alignments of fields in structures on disk, and the occasional +extra field. + +Coff in all its varieties is implemented with a few common +files and a number of implementation specific files. For +example, The 88k bcs coff format is implemented in the file +@file{coff-m88k.c}. This file @code{#include}s +@file{coff/m88k.h} which defines the external structure of the +coff format for the 88k, and @file{coff/internal.h} which +defines the internal structure. @file{coff-m88k.c} also +defines the relocations used by the 88k format +@xref{Relocations}. + +The Intel i960 processor version of coff is implemented in +@file{coff-i960.c}. This file has the same structure as +@file{coff-m88k.c}, except that it includes @file{coff/i960.h} +rather than @file{coff-m88k.h}. + +@subsection Porting to a new version of coff +The recommended method is to select from the existing +implementations the version of coff which is most like the one +you want to use. For example, we'll say that i386 coff is +the one you select, and that your coff flavour is called foo. +Copy @file{i386coff.c} to @file{foocoff.c}, copy +@file{../include/coff/i386.h} to @file{../include/coff/foo.h}, +and add the lines to @file{targets.c} and @file{Makefile.in} +so that your new back end is used. Alter the shapes of the +structures in @file{../include/coff/foo.h} so that they match +what you need. You will probably also have to add +@code{#ifdef}s to the code in @file{coff/internal.h} and +@file{coffcode.h} if your version of coff is too wild. + +You can verify that your new BFD backend works quite simply by +building @file{objdump} from the @file{binutils} directory, +and making sure that its version of what's going on and your +host system's idea (assuming it has the pretty standard coff +dump utility, usually called @code{att-dump} or just +@code{dump}) are the same. Then clean up your code, and send +what you've done to Cygnus. Then your stuff will be in the +next release, and you won't have to keep integrating it. + +@subsection How the coff backend works + + +@subsubsection File layout +The Coff backend is split into generic routines that are +applicable to any Coff target and routines that are specific +to a particular target. The target-specific routines are +further split into ones which are basically the same for all +Coff targets except that they use the external symbol format +or use different values for certain constants. + +The generic routines are in @file{coffgen.c}. These routines +work for any Coff target. They use some hooks into the target +specific code; the hooks are in a @code{bfd_coff_backend_data} +structure, one of which exists for each target. + +The essentially similar target-specific routines are in +@file{coffcode.h}. This header file includes executable C code. +The various Coff targets first include the appropriate Coff +header file, make any special defines that are needed, and +then include @file{coffcode.h}. + +Some of the Coff targets then also have additional routines in +the target source file itself. + +For example, @file{coff-i960.c} includes +@file{coff/internal.h} and @file{coff/i960.h}. It then +defines a few constants, such as @code{I960}, and includes +@file{coffcode.h}. Since the i960 has complex relocation +types, @file{coff-i960.c} also includes some code to +manipulate the i960 relocs. This code is not in +@file{coffcode.h} because it would not be used by any other +target. + +@subsubsection Coff long section names +In the standard Coff object format, section names are limited to +the eight bytes available in the @code{s_name} field of the +@code{SCNHDR} section header structure. The format requires the +field to be NUL-padded, but not necessarily NUL-terminated, so +the longest section names permitted are a full eight characters. + +The Microsoft PE variants of the Coff object file format add +an extension to support the use of long section names. This +extension is defined in section 4 of the Microsoft PE/COFF +specification (rev 8.1). If a section name is too long to fit +into the section header's @code{s_name} field, it is instead +placed into the string table, and the @code{s_name} field is +filled with a slash ("/") followed by the ASCII decimal +representation of the offset of the full name relative to the +string table base. + +Note that this implies that the extension can only be used in object +files, as executables do not contain a string table. The standard +specifies that long section names from objects emitted into executable +images are to be truncated. + +However, as a GNU extension, BFD can generate executable images +that contain a string table and long section names. This +would appear to be technically valid, as the standard only says +that Coff debugging information is deprecated, not forbidden, +and in practice it works, although some tools that parse PE files +expecting the MS standard format may become confused; @file{PEview} is +one known example. + +The functionality is supported in BFD by code implemented under +the control of the macro @code{COFF_LONG_SECTION_NAMES}. If not +defined, the format does not support long section names in any way. +If defined, it is used to initialise a flag, +@code{_bfd_coff_long_section_names}, and a hook function pointer, +@code{_bfd_coff_set_long_section_names}, in the Coff backend data +structure. The flag controls the generation of long section names +in output BFDs at runtime; if it is false, as it will be by default +when generating an executable image, long section names are truncated; +if true, the long section names extension is employed. The hook +points to a function that allows the value of the flag to be altered +at runtime, on formats that support long section names at all; on +other formats it points to a stub that returns an error indication. +With input BFDs, the flag is set according to whether any long section +names are detected while reading the section headers. For a completely +new BFD, the flag is set to the default for the target format. This +information can be used by a client of the BFD library when deciding +what output format to generate, and means that a BFD that is opened +for read and subsequently converted to a writeable BFD and modified +in-place will retain whatever format it had on input. + +If @code{COFF_LONG_SECTION_NAMES} is simply defined (blank), or is +defined to the value "1", then long section names are enabled by +default; if it is defined to the value zero, they are disabled by +default (but still accepted in input BFDs). The header @file{coffcode.h} +defines a macro, @code{COFF_DEFAULT_LONG_SECTION_NAMES}, which is +used in the backends to initialise the backend data structure fields +appropriately; see the comments for further detail. + +@subsubsection Bit twiddling +Each flavour of coff supported in BFD has its own header file +describing the external layout of the structures. There is also +an internal description of the coff layout, in +@file{coff/internal.h}. A major function of the +coff backend is swapping the bytes and twiddling the bits to +translate the external form of the structures into the normal +internal form. This is all performed in the +@code{bfd_swap}_@i{thing}_@i{direction} routines. Some +elements are different sizes between different versions of +coff; it is the duty of the coff version specific include file +to override the definitions of various packing routines in +@file{coffcode.h}. E.g., the size of line number entry in coff is +sometimes 16 bits, and sometimes 32 bits. @code{#define}ing +@code{PUT_LNSZ_LNNO} and @code{GET_LNSZ_LNNO} will select the +correct one. No doubt, some day someone will find a version of +coff which has a varying field size not catered to at the +moment. To port BFD, that person will have to add more @code{#defines}. +Three of the bit twiddling routines are exported to +@code{gdb}; @code{coff_swap_aux_in}, @code{coff_swap_sym_in} +and @code{coff_swap_lineno_in}. @code{GDB} reads the symbol +table on its own, but uses BFD to fix things up. More of the +bit twiddlers are exported for @code{gas}; +@code{coff_swap_aux_out}, @code{coff_swap_sym_out}, +@code{coff_swap_lineno_out}, @code{coff_swap_reloc_out}, +@code{coff_swap_filehdr_out}, @code{coff_swap_aouthdr_out}, +@code{coff_swap_scnhdr_out}. @code{Gas} currently keeps track +of all the symbol table and reloc drudgery itself, thereby +saving the internal BFD overhead, but uses BFD to swap things +on the way out, making cross ports much safer. Doing so also +allows BFD (and thus the linker) to use the same header files +as @code{gas}, which makes one avenue to disaster disappear. + +@subsubsection Symbol reading +The simple canonical form for symbols used by BFD is not rich +enough to keep all the information available in a coff symbol +table. The back end gets around this problem by keeping the original +symbol table around, "behind the scenes". + +When a symbol table is requested (through a call to +@code{bfd_canonicalize_symtab}), a request gets through to +@code{coff_get_normalized_symtab}. This reads the symbol table from +the coff file and swaps all the structures inside into the +internal form. It also fixes up all the pointers in the table +(represented in the file by offsets from the first symbol in +the table) into physical pointers to elements in the new +internal table. This involves some work since the meanings of +fields change depending upon context: a field that is a +pointer to another structure in the symbol table at one moment +may be the size in bytes of a structure at the next. Another +pass is made over the table. All symbols which mark file names +(@code{C_FILE} symbols) are modified so that the internal +string points to the value in the auxent (the real filename) +rather than the normal text associated with the symbol +(@code{".file"}). + +At this time the symbol names are moved around. Coff stores +all symbols less than nine characters long physically +within the symbol table; longer strings are kept at the end of +the file in the string table. This pass moves all strings +into memory and replaces them with pointers to the strings. + +The symbol table is massaged once again, this time to create +the canonical table used by the BFD application. Each symbol +is inspected in turn, and a decision made (using the +@code{sclass} field) about the various flags to set in the +@code{asymbol}. @xref{Symbols}. The generated canonical table +shares strings with the hidden internal symbol table. + +Any linenumbers are read from the coff file too, and attached +to the symbols which own the functions the linenumbers belong to. + +@subsubsection Symbol writing +Writing a symbol to a coff file which didn't come from a coff +file will lose any debugging information. The @code{asymbol} +structure remembers the BFD from which the symbol was taken, and on +output the back end makes sure that the same destination target as +source target is present. + +When the symbols have come from a coff file then all the +debugging information is preserved. + +Symbol tables are provided for writing to the back end in a +vector of pointers to pointers. This allows applications like +the linker to accumulate and output large symbol tables +without having to do too much byte copying. + +This function runs through the provided symbol table and +patches each symbol marked as a file place holder +(@code{C_FILE}) to point to the next file place holder in the +list. It also marks each @code{offset} field in the list with +the offset from the first symbol of the current symbol. + +Another function of this procedure is to turn the canonical +value form of BFD into the form used by coff. Internally, BFD +expects symbol values to be offsets from a section base; so a +symbol physically at 0x120, but in a section starting at +0x100, would have the value 0x20. Coff expects symbols to +contain their final value, so symbols have their values +changed at this point to reflect their sum with their owning +section. This transformation uses the +@code{output_section} field of the @code{asymbol}'s +@code{asection} @xref{Sections}. + +@itemize @bullet + +@item +@code{coff_mangle_symbols} +@end itemize +This routine runs though the provided symbol table and uses +the offsets generated by the previous pass and the pointers +generated when the symbol table was read in to create the +structured hierarchy required by coff. It changes each pointer +to a symbol into the index into the symbol table of the asymbol. + +@itemize @bullet + +@item +@code{coff_write_symbols} +@end itemize +This routine runs through the symbol table and patches up the +symbols from their internal form into the coff way, calls the +bit twiddlers, and writes out the table to the file. + +@findex coff_symbol_type +@subsubsection @code{coff_symbol_type} +@strong{Description}@* +The hidden information for an @code{asymbol} is described in a +@code{combined_entry_type}: + + +@example + +typedef struct coff_ptr_struct +@{ + /* Remembers the offset from the first symbol in the file for + this symbol. Generated by coff_renumber_symbols. */ + unsigned int offset; + + /* Should the value of this symbol be renumbered. Used for + XCOFF C_BSTAT symbols. Set by coff_slurp_symbol_table. */ + unsigned int fix_value : 1; + + /* Should the tag field of this symbol be renumbered. + Created by coff_pointerize_aux. */ + unsigned int fix_tag : 1; + + /* Should the endidx field of this symbol be renumbered. + Created by coff_pointerize_aux. */ + unsigned int fix_end : 1; + + /* Should the x_csect.x_scnlen field be renumbered. + Created by coff_pointerize_aux. */ + unsigned int fix_scnlen : 1; + + /* Fix up an XCOFF C_BINCL/C_EINCL symbol. The value is the + index into the line number entries. Set by coff_slurp_symbol_table. */ + unsigned int fix_line : 1; + + /* The container for the symbol structure as read and translated + from the file. */ + union + @{ + union internal_auxent auxent; + struct internal_syment syment; + @} u; +@} combined_entry_type; + + +/* Each canonical asymbol really looks like this: */ + +typedef struct coff_symbol_struct +@{ + /* The actual symbol which the rest of BFD works with */ + asymbol symbol; + + /* A pointer to the hidden information for this symbol */ + combined_entry_type *native; + + /* A pointer to the linenumber information for this symbol */ + struct lineno_cache_entry *lineno; + + /* Have the line numbers been relocated yet ? */ + bfd_boolean done_lineno; +@} coff_symbol_type; +@end example +@findex bfd_coff_backend_data +@subsubsection @code{bfd_coff_backend_data} + +@example +/* COFF symbol classifications. */ + +enum coff_symbol_classification +@{ + /* Global symbol. */ + COFF_SYMBOL_GLOBAL, + /* Common symbol. */ + COFF_SYMBOL_COMMON, + /* Undefined symbol. */ + COFF_SYMBOL_UNDEFINED, + /* Local symbol. */ + COFF_SYMBOL_LOCAL, + /* PE section symbol. */ + COFF_SYMBOL_PE_SECTION +@}; + +@end example +Special entry points for gdb to swap in coff symbol table parts: +@example +typedef struct +@{ + void (*_bfd_coff_swap_aux_in) + (bfd *, void *, int, int, int, int, void *); + + void (*_bfd_coff_swap_sym_in) + (bfd *, void *, void *); + + void (*_bfd_coff_swap_lineno_in) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_aux_out) + (bfd *, void *, int, int, int, int, void *); + + unsigned int (*_bfd_coff_swap_sym_out) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_lineno_out) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_reloc_out) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_filehdr_out) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_aouthdr_out) + (bfd *, void *, void *); + + unsigned int (*_bfd_coff_swap_scnhdr_out) + (bfd *, void *, void *); + + unsigned int _bfd_filhsz; + unsigned int _bfd_aoutsz; + unsigned int _bfd_scnhsz; + unsigned int _bfd_symesz; + unsigned int _bfd_auxesz; + unsigned int _bfd_relsz; + unsigned int _bfd_linesz; + unsigned int _bfd_filnmlen; + bfd_boolean _bfd_coff_long_filenames; + + bfd_boolean _bfd_coff_long_section_names; + bfd_boolean (*_bfd_coff_set_long_section_names) + (bfd *, int); + + unsigned int _bfd_coff_default_section_alignment_power; + bfd_boolean _bfd_coff_force_symnames_in_strings; + unsigned int _bfd_coff_debug_string_prefix_length; + + void (*_bfd_coff_swap_filehdr_in) + (bfd *, void *, void *); + + void (*_bfd_coff_swap_aouthdr_in) + (bfd *, void *, void *); + + void (*_bfd_coff_swap_scnhdr_in) + (bfd *, void *, void *); + + void (*_bfd_coff_swap_reloc_in) + (bfd *abfd, void *, void *); + + bfd_boolean (*_bfd_coff_bad_format_hook) + (bfd *, void *); + + bfd_boolean (*_bfd_coff_set_arch_mach_hook) + (bfd *, void *); + + void * (*_bfd_coff_mkobject_hook) + (bfd *, void *, void *); + + bfd_boolean (*_bfd_styp_to_sec_flags_hook) + (bfd *, void *, const char *, asection *, flagword *); + + void (*_bfd_set_alignment_hook) + (bfd *, asection *, void *); + + bfd_boolean (*_bfd_coff_slurp_symbol_table) + (bfd *); + + bfd_boolean (*_bfd_coff_symname_in_debug) + (bfd *, struct internal_syment *); + + bfd_boolean (*_bfd_coff_pointerize_aux_hook) + (bfd *, combined_entry_type *, combined_entry_type *, + unsigned int, combined_entry_type *); + + bfd_boolean (*_bfd_coff_print_aux) + (bfd *, FILE *, combined_entry_type *, combined_entry_type *, + combined_entry_type *, unsigned int); + + void (*_bfd_coff_reloc16_extra_cases) + (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *, + bfd_byte *, unsigned int *, unsigned int *); + + int (*_bfd_coff_reloc16_estimate) + (bfd *, asection *, arelent *, unsigned int, + struct bfd_link_info *); + + enum coff_symbol_classification (*_bfd_coff_classify_symbol) + (bfd *, struct internal_syment *); + + bfd_boolean (*_bfd_coff_compute_section_file_positions) + (bfd *); + + bfd_boolean (*_bfd_coff_start_final_link) + (bfd *, struct bfd_link_info *); + + bfd_boolean (*_bfd_coff_relocate_section) + (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, + struct internal_reloc *, struct internal_syment *, asection **); + + reloc_howto_type *(*_bfd_coff_rtype_to_howto) + (bfd *, asection *, struct internal_reloc *, + struct coff_link_hash_entry *, struct internal_syment *, + bfd_vma *); + + bfd_boolean (*_bfd_coff_adjust_symndx) + (bfd *, struct bfd_link_info *, bfd *, asection *, + struct internal_reloc *, bfd_boolean *); + + bfd_boolean (*_bfd_coff_link_add_one_symbol) + (struct bfd_link_info *, bfd *, const char *, flagword, + asection *, bfd_vma, const char *, bfd_boolean, bfd_boolean, + struct bfd_link_hash_entry **); + + bfd_boolean (*_bfd_coff_link_output_has_begun) + (bfd *, struct coff_final_link_info *); + + bfd_boolean (*_bfd_coff_final_link_postscript) + (bfd *, struct coff_final_link_info *); + + bfd_boolean (*_bfd_coff_print_pdata) + (bfd *, void *); + +@} bfd_coff_backend_data; + +#define coff_backend_info(abfd) \ + ((bfd_coff_backend_data *) (abfd)->xvec->backend_data) + +#define bfd_coff_swap_aux_in(a,e,t,c,ind,num,i) \ + ((coff_backend_info (a)->_bfd_coff_swap_aux_in) (a,e,t,c,ind,num,i)) + +#define bfd_coff_swap_sym_in(a,e,i) \ + ((coff_backend_info (a)->_bfd_coff_swap_sym_in) (a,e,i)) + +#define bfd_coff_swap_lineno_in(a,e,i) \ + ((coff_backend_info ( a)->_bfd_coff_swap_lineno_in) (a,e,i)) + +#define bfd_coff_swap_reloc_out(abfd, i, o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_reloc_out) (abfd, i, o)) + +#define bfd_coff_swap_lineno_out(abfd, i, o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_lineno_out) (abfd, i, o)) + +#define bfd_coff_swap_aux_out(a,i,t,c,ind,num,o) \ + ((coff_backend_info (a)->_bfd_coff_swap_aux_out) (a,i,t,c,ind,num,o)) + +#define bfd_coff_swap_sym_out(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_sym_out) (abfd, i, o)) + +#define bfd_coff_swap_scnhdr_out(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_scnhdr_out) (abfd, i, o)) + +#define bfd_coff_swap_filehdr_out(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_filehdr_out) (abfd, i, o)) + +#define bfd_coff_swap_aouthdr_out(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_aouthdr_out) (abfd, i, o)) + +#define bfd_coff_filhsz(abfd) (coff_backend_info (abfd)->_bfd_filhsz) +#define bfd_coff_aoutsz(abfd) (coff_backend_info (abfd)->_bfd_aoutsz) +#define bfd_coff_scnhsz(abfd) (coff_backend_info (abfd)->_bfd_scnhsz) +#define bfd_coff_symesz(abfd) (coff_backend_info (abfd)->_bfd_symesz) +#define bfd_coff_auxesz(abfd) (coff_backend_info (abfd)->_bfd_auxesz) +#define bfd_coff_relsz(abfd) (coff_backend_info (abfd)->_bfd_relsz) +#define bfd_coff_linesz(abfd) (coff_backend_info (abfd)->_bfd_linesz) +#define bfd_coff_filnmlen(abfd) (coff_backend_info (abfd)->_bfd_filnmlen) +#define bfd_coff_long_filenames(abfd) \ + (coff_backend_info (abfd)->_bfd_coff_long_filenames) +#define bfd_coff_long_section_names(abfd) \ + (coff_backend_info (abfd)->_bfd_coff_long_section_names) +#define bfd_coff_set_long_section_names(abfd, enable) \ + ((coff_backend_info (abfd)->_bfd_coff_set_long_section_names) (abfd, enable)) +#define bfd_coff_default_section_alignment_power(abfd) \ + (coff_backend_info (abfd)->_bfd_coff_default_section_alignment_power) +#define bfd_coff_swap_filehdr_in(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_filehdr_in) (abfd, i, o)) + +#define bfd_coff_swap_aouthdr_in(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_aouthdr_in) (abfd, i, o)) + +#define bfd_coff_swap_scnhdr_in(abfd, i,o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_scnhdr_in) (abfd, i, o)) + +#define bfd_coff_swap_reloc_in(abfd, i, o) \ + ((coff_backend_info (abfd)->_bfd_coff_swap_reloc_in) (abfd, i, o)) + +#define bfd_coff_bad_format_hook(abfd, filehdr) \ + ((coff_backend_info (abfd)->_bfd_coff_bad_format_hook) (abfd, filehdr)) + +#define bfd_coff_set_arch_mach_hook(abfd, filehdr)\ + ((coff_backend_info (abfd)->_bfd_coff_set_arch_mach_hook) (abfd, filehdr)) +#define bfd_coff_mkobject_hook(abfd, filehdr, aouthdr)\ + ((coff_backend_info (abfd)->_bfd_coff_mkobject_hook)\ + (abfd, filehdr, aouthdr)) + +#define bfd_coff_styp_to_sec_flags_hook(abfd, scnhdr, name, section, flags_ptr)\ + ((coff_backend_info (abfd)->_bfd_styp_to_sec_flags_hook)\ + (abfd, scnhdr, name, section, flags_ptr)) + +#define bfd_coff_set_alignment_hook(abfd, sec, scnhdr)\ + ((coff_backend_info (abfd)->_bfd_set_alignment_hook) (abfd, sec, scnhdr)) + +#define bfd_coff_slurp_symbol_table(abfd)\ + ((coff_backend_info (abfd)->_bfd_coff_slurp_symbol_table) (abfd)) + +#define bfd_coff_symname_in_debug(abfd, sym)\ + ((coff_backend_info (abfd)->_bfd_coff_symname_in_debug) (abfd, sym)) + +#define bfd_coff_force_symnames_in_strings(abfd)\ + (coff_backend_info (abfd)->_bfd_coff_force_symnames_in_strings) + +#define bfd_coff_debug_string_prefix_length(abfd)\ + (coff_backend_info (abfd)->_bfd_coff_debug_string_prefix_length) + +#define bfd_coff_print_aux(abfd, file, base, symbol, aux, indaux)\ + ((coff_backend_info (abfd)->_bfd_coff_print_aux)\ + (abfd, file, base, symbol, aux, indaux)) + +#define bfd_coff_reloc16_extra_cases(abfd, link_info, link_order,\ + reloc, data, src_ptr, dst_ptr)\ + ((coff_backend_info (abfd)->_bfd_coff_reloc16_extra_cases)\ + (abfd, link_info, link_order, reloc, data, src_ptr, dst_ptr)) + +#define bfd_coff_reloc16_estimate(abfd, section, reloc, shrink, link_info)\ + ((coff_backend_info (abfd)->_bfd_coff_reloc16_estimate)\ + (abfd, section, reloc, shrink, link_info)) + +#define bfd_coff_classify_symbol(abfd, sym)\ + ((coff_backend_info (abfd)->_bfd_coff_classify_symbol)\ + (abfd, sym)) + +#define bfd_coff_compute_section_file_positions(abfd)\ + ((coff_backend_info (abfd)->_bfd_coff_compute_section_file_positions)\ + (abfd)) + +#define bfd_coff_start_final_link(obfd, info)\ + ((coff_backend_info (obfd)->_bfd_coff_start_final_link)\ + (obfd, info)) +#define bfd_coff_relocate_section(obfd,info,ibfd,o,con,rel,isyms,secs)\ + ((coff_backend_info (ibfd)->_bfd_coff_relocate_section)\ + (obfd, info, ibfd, o, con, rel, isyms, secs)) +#define bfd_coff_rtype_to_howto(abfd, sec, rel, h, sym, addendp)\ + ((coff_backend_info (abfd)->_bfd_coff_rtype_to_howto)\ + (abfd, sec, rel, h, sym, addendp)) +#define bfd_coff_adjust_symndx(obfd, info, ibfd, sec, rel, adjustedp)\ + ((coff_backend_info (abfd)->_bfd_coff_adjust_symndx)\ + (obfd, info, ibfd, sec, rel, adjustedp)) +#define bfd_coff_link_add_one_symbol(info, abfd, name, flags, section,\ + value, string, cp, coll, hashp)\ + ((coff_backend_info (abfd)->_bfd_coff_link_add_one_symbol)\ + (info, abfd, name, flags, section, value, string, cp, coll, hashp)) + +#define bfd_coff_link_output_has_begun(a,p) \ + ((coff_backend_info (a)->_bfd_coff_link_output_has_begun) (a, p)) +#define bfd_coff_final_link_postscript(a,p) \ + ((coff_backend_info (a)->_bfd_coff_final_link_postscript) (a, p)) + +#define bfd_coff_have_print_pdata(a) \ + (coff_backend_info (a)->_bfd_coff_print_pdata) +#define bfd_coff_print_pdata(a,p) \ + ((coff_backend_info (a)->_bfd_coff_print_pdata) (a, p)) + +/* Macro: Returns true if the bfd is a PE executable as opposed to a + PE object file. */ +#define bfd_pei_p(abfd) \ + (CONST_STRNEQ ((abfd)->xvec->name, "pei-")) +@end example +@subsubsection Writing relocations +To write relocations, the back end steps though the +canonical relocation table and create an +@code{internal_reloc}. The symbol index to use is removed from +the @code{offset} field in the symbol table supplied. The +address comes directly from the sum of the section base +address and the relocation offset; the type is dug directly +from the howto field. Then the @code{internal_reloc} is +swapped into the shape of an @code{external_reloc} and written +out to disk. + +@subsubsection Reading linenumbers +Creating the linenumber table is done by reading in the entire +coff linenumber table, and creating another table for internal use. + +A coff linenumber table is structured so that each function +is marked as having a line number of 0. Each line within the +function is an offset from the first line in the function. The +base of the line number information for the table is stored in +the symbol associated with the function. + +Note: The PE format uses line number 0 for a flag indicating a +new source file. + +The information is copied from the external to the internal +table, and each symbol which marks a function is marked by +pointing its... + +How does this work ? + +@subsubsection Reading relocations +Coff relocations are easily transformed into the internal BFD form +(@code{arelent}). + +Reading a coff relocation table is done in the following stages: + +@itemize @bullet + +@item +Read the entire coff relocation table into memory. + +@item +Process each relocation in turn; first swap it from the +external to the internal form. + +@item +Turn the symbol referenced in the relocation's symbol index +into a pointer into the canonical symbol table. +This table is the same as the one returned by a call to +@code{bfd_canonicalize_symtab}. The back end will call that +routine and save the result if a canonicalization hasn't been done. + +@item +The reloc index is turned into a pointer to a howto +structure, in a back end specific way. For instance, the 386 +and 960 use the @code{r_type} to directly produce an index +into a howto table vector; the 88k subtracts a number from the +@code{r_type} field and creates an addend field. +@end itemize + diff --git a/bfd/doc/core.texi b/bfd/doc/core.texi new file mode 100644 index 0000000..cd98c4a --- /dev/null +++ b/bfd/doc/core.texi @@ -0,0 +1,70 @@ +@section Core files + + +@subsection Core file functions + + +@strong{Description}@* +These are functions pertaining to core files. + +@findex bfd_core_file_failing_command +@subsubsection @code{bfd_core_file_failing_command} +@strong{Synopsis} +@example +const char *bfd_core_file_failing_command (bfd *abfd); +@end example +@strong{Description}@* +Return a read-only string explaining which program was running +when it failed and produced the core file @var{abfd}. + +@findex bfd_core_file_failing_signal +@subsubsection @code{bfd_core_file_failing_signal} +@strong{Synopsis} +@example +int bfd_core_file_failing_signal (bfd *abfd); +@end example +@strong{Description}@* +Returns the signal number which caused the core dump which +generated the file the BFD @var{abfd} is attached to. + +@findex bfd_core_file_pid +@subsubsection @code{bfd_core_file_pid} +@strong{Synopsis} +@example +int bfd_core_file_pid (bfd *abfd); +@end example +@strong{Description}@* +Returns the PID of the process the core dump the BFD +@var{abfd} is attached to was generated from. + +@findex core_file_matches_executable_p +@subsubsection @code{core_file_matches_executable_p} +@strong{Synopsis} +@example +bfd_boolean core_file_matches_executable_p + (bfd *core_bfd, bfd *exec_bfd); +@end example +@strong{Description}@* +Return @code{TRUE} if the core file attached to @var{core_bfd} +was generated by a run of the executable file attached to +@var{exec_bfd}, @code{FALSE} otherwise. + +@findex generic_core_file_matches_executable_p +@subsubsection @code{generic_core_file_matches_executable_p} +@strong{Synopsis} +@example +bfd_boolean generic_core_file_matches_executable_p + (bfd *core_bfd, bfd *exec_bfd); +@end example +@strong{Description}@* +Return TRUE if the core file attached to @var{core_bfd} +was generated by a run of the executable file attached +to @var{exec_bfd}. The match is based on executable +basenames only. + +Note: When not able to determine the core file failing +command or the executable name, we still return TRUE even +though we're not sure that core file and executable match. +This is to avoid generating a false warning in situations +where we really don't know whether they match or not. + diff --git a/bfd/doc/elf.texi b/bfd/doc/elf.texi new file mode 100644 index 0000000..4053386 --- /dev/null +++ b/bfd/doc/elf.texi @@ -0,0 +1,9 @@ +@section ELF backends +BFD support for ELF formats is being worked on. +Currently, the best supported back ends are for sparc and i386 +(running svr4 or Solaris 2). + +Documentation of the internals of the support code still needs +to be written. The code is changing quickly enough that we +haven't bothered yet. + diff --git a/bfd/doc/elfcode.texi b/bfd/doc/elfcode.texi new file mode 100644 index 0000000..e69de29 diff --git a/bfd/doc/format.texi b/bfd/doc/format.texi new file mode 100644 index 0000000..9674acf --- /dev/null +++ b/bfd/doc/format.texi @@ -0,0 +1,112 @@ +@section File formats +A format is a BFD concept of high level file contents type. The +formats supported by BFD are: + +@itemize @bullet + +@item +@code{bfd_object} +@end itemize +The BFD may contain data, symbols, relocations and debug info. + +@itemize @bullet + +@item +@code{bfd_archive} +@end itemize +The BFD contains other BFDs and an optional index. + +@itemize @bullet + +@item +@code{bfd_core} +@end itemize +The BFD contains the result of an executable core dump. + +@subsection File format functions + + +@findex bfd_check_format +@subsubsection @code{bfd_check_format} +@strong{Synopsis} +@example +bfd_boolean bfd_check_format (bfd *abfd, bfd_format format); +@end example +@strong{Description}@* +Verify if the file attached to the BFD @var{abfd} is compatible +with the format @var{format} (i.e., one of @code{bfd_object}, +@code{bfd_archive} or @code{bfd_core}). + +If the BFD has been set to a specific target before the +call, only the named target and format combination is +checked. If the target has not been set, or has been set to +@code{default}, then all the known target backends is +interrogated to determine a match. If the default target +matches, it is used. If not, exactly one target must recognize +the file, or an error results. + +The function returns @code{TRUE} on success, otherwise @code{FALSE} +with one of the following error codes: + +@itemize @bullet + +@item +@code{bfd_error_invalid_operation} - +if @code{format} is not one of @code{bfd_object}, @code{bfd_archive} or +@code{bfd_core}. + +@item +@code{bfd_error_system_call} - +if an error occured during a read - even some file mismatches +can cause bfd_error_system_calls. + +@item +@code{file_not_recognised} - +none of the backends recognised the file format. + +@item +@code{bfd_error_file_ambiguously_recognized} - +more than one backend recognised the file format. +@end itemize + +@findex bfd_check_format_matches +@subsubsection @code{bfd_check_format_matches} +@strong{Synopsis} +@example +bfd_boolean bfd_check_format_matches + (bfd *abfd, bfd_format format, char ***matching); +@end example +@strong{Description}@* +Like @code{bfd_check_format}, except when it returns FALSE with +@code{bfd_errno} set to @code{bfd_error_file_ambiguously_recognized}. In that +case, if @var{matching} is not NULL, it will be filled in with +a NULL-terminated list of the names of the formats that matched, +allocated with @code{malloc}. +Then the user may choose a format and try again. + +When done with the list that @var{matching} points to, the caller +should free it. + +@findex bfd_set_format +@subsubsection @code{bfd_set_format} +@strong{Synopsis} +@example +bfd_boolean bfd_set_format (bfd *abfd, bfd_format format); +@end example +@strong{Description}@* +This function sets the file format of the BFD @var{abfd} to the +format @var{format}. If the target set in the BFD does not +support the format requested, the format is invalid, or the BFD +is not open for writing, then an error occurs. + +@findex bfd_format_string +@subsubsection @code{bfd_format_string} +@strong{Synopsis} +@example +const char *bfd_format_string (bfd_format format); +@end example +@strong{Description}@* +Return a pointer to a const string +@code{invalid}, @code{object}, @code{archive}, @code{core}, or @code{unknown}, +depending upon the value of @var{format}. + diff --git a/bfd/doc/hash.texi b/bfd/doc/hash.texi new file mode 100644 index 0000000..88d9585 --- /dev/null +++ b/bfd/doc/hash.texi @@ -0,0 +1,247 @@ +@section Hash Tables +@cindex Hash tables +BFD provides a simple set of hash table functions. Routines +are provided to initialize a hash table, to free a hash table, +to look up a string in a hash table and optionally create an +entry for it, and to traverse a hash table. There is +currently no routine to delete an string from a hash table. + +The basic hash table does not permit any data to be stored +with a string. However, a hash table is designed to present a +base class from which other types of hash tables may be +derived. These derived types may store additional information +with the string. Hash tables were implemented in this way, +rather than simply providing a data pointer in a hash table +entry, because they were designed for use by the linker back +ends. The linker may create thousands of hash table entries, +and the overhead of allocating private data and storing and +following pointers becomes noticeable. + +The basic hash table code is in @code{hash.c}. + +@menu +* Creating and Freeing a Hash Table:: +* Looking Up or Entering a String:: +* Traversing a Hash Table:: +* Deriving a New Hash Table Type:: +@end menu + +@node Creating and Freeing a Hash Table, Looking Up or Entering a String, Hash Tables, Hash Tables +@subsection Creating and freeing a hash table +@findex bfd_hash_table_init +@findex bfd_hash_table_init_n +To create a hash table, create an instance of a @code{struct +bfd_hash_table} (defined in @code{bfd.h}) and call +@code{bfd_hash_table_init} (if you know approximately how many +entries you will need, the function @code{bfd_hash_table_init_n}, +which takes a @var{size} argument, may be used). +@code{bfd_hash_table_init} returns @code{FALSE} if some sort of +error occurs. + +@findex bfd_hash_newfunc +The function @code{bfd_hash_table_init} take as an argument a +function to use to create new entries. For a basic hash +table, use the function @code{bfd_hash_newfunc}. @xref{Deriving +a New Hash Table Type}, for why you would want to use a +different value for this argument. + +@findex bfd_hash_allocate +@code{bfd_hash_table_init} will create an objalloc which will be +used to allocate new entries. You may allocate memory on this +objalloc using @code{bfd_hash_allocate}. + +@findex bfd_hash_table_free +Use @code{bfd_hash_table_free} to free up all the memory that has +been allocated for a hash table. This will not free up the +@code{struct bfd_hash_table} itself, which you must provide. + +@findex bfd_hash_set_default_size +Use @code{bfd_hash_set_default_size} to set the default size of +hash table to use. + +@node Looking Up or Entering a String, Traversing a Hash Table, Creating and Freeing a Hash Table, Hash Tables +@subsection Looking up or entering a string +@findex bfd_hash_lookup +The function @code{bfd_hash_lookup} is used both to look up a +string in the hash table and to create a new entry. + +If the @var{create} argument is @code{FALSE}, @code{bfd_hash_lookup} +will look up a string. If the string is found, it will +returns a pointer to a @code{struct bfd_hash_entry}. If the +string is not found in the table @code{bfd_hash_lookup} will +return @code{NULL}. You should not modify any of the fields in +the returns @code{struct bfd_hash_entry}. + +If the @var{create} argument is @code{TRUE}, the string will be +entered into the hash table if it is not already there. +Either way a pointer to a @code{struct bfd_hash_entry} will be +returned, either to the existing structure or to a newly +created one. In this case, a @code{NULL} return means that an +error occurred. + +If the @var{create} argument is @code{TRUE}, and a new entry is +created, the @var{copy} argument is used to decide whether to +copy the string onto the hash table objalloc or not. If +@var{copy} is passed as @code{FALSE}, you must be careful not to +deallocate or modify the string as long as the hash table +exists. + +@node Traversing a Hash Table, Deriving a New Hash Table Type, Looking Up or Entering a String, Hash Tables +@subsection Traversing a hash table +@findex bfd_hash_traverse +The function @code{bfd_hash_traverse} may be used to traverse a +hash table, calling a function on each element. The traversal +is done in a random order. + +@code{bfd_hash_traverse} takes as arguments a function and a +generic @code{void *} pointer. The function is called with a +hash table entry (a @code{struct bfd_hash_entry *}) and the +generic pointer passed to @code{bfd_hash_traverse}. The function +must return a @code{boolean} value, which indicates whether to +continue traversing the hash table. If the function returns +@code{FALSE}, @code{bfd_hash_traverse} will stop the traversal and +return immediately. + +@node Deriving a New Hash Table Type, , Traversing a Hash Table, Hash Tables +@subsection Deriving a new hash table type +Many uses of hash tables want to store additional information +which each entry in the hash table. Some also find it +convenient to store additional information with the hash table +itself. This may be done using a derived hash table. + +Since C is not an object oriented language, creating a derived +hash table requires sticking together some boilerplate +routines with a few differences specific to the type of hash +table you want to create. + +An example of a derived hash table is the linker hash table. +The structures for this are defined in @code{bfdlink.h}. The +functions are in @code{linker.c}. + +You may also derive a hash table from an already derived hash +table. For example, the a.out linker backend code uses a hash +table derived from the linker hash table. + +@menu +* Define the Derived Structures:: +* Write the Derived Creation Routine:: +* Write Other Derived Routines:: +@end menu + +@node Define the Derived Structures, Write the Derived Creation Routine, Deriving a New Hash Table Type, Deriving a New Hash Table Type +@subsubsection Define the derived structures +You must define a structure for an entry in the hash table, +and a structure for the hash table itself. + +The first field in the structure for an entry in the hash +table must be of the type used for an entry in the hash table +you are deriving from. If you are deriving from a basic hash +table this is @code{struct bfd_hash_entry}, which is defined in +@code{bfd.h}. The first field in the structure for the hash +table itself must be of the type of the hash table you are +deriving from itself. If you are deriving from a basic hash +table, this is @code{struct bfd_hash_table}. + +For example, the linker hash table defines @code{struct +bfd_link_hash_entry} (in @code{bfdlink.h}). The first field, +@code{root}, is of type @code{struct bfd_hash_entry}. Similarly, +the first field in @code{struct bfd_link_hash_table}, @code{table}, +is of type @code{struct bfd_hash_table}. + +@node Write the Derived Creation Routine, Write Other Derived Routines, Define the Derived Structures, Deriving a New Hash Table Type +@subsubsection Write the derived creation routine +You must write a routine which will create and initialize an +entry in the hash table. This routine is passed as the +function argument to @code{bfd_hash_table_init}. + +In order to permit other hash tables to be derived from the +hash table you are creating, this routine must be written in a +standard way. + +The first argument to the creation routine is a pointer to a +hash table entry. This may be @code{NULL}, in which case the +routine should allocate the right amount of space. Otherwise +the space has already been allocated by a hash table type +derived from this one. + +After allocating space, the creation routine must call the +creation routine of the hash table type it is derived from, +passing in a pointer to the space it just allocated. This +will initialize any fields used by the base hash table. + +Finally the creation routine must initialize any local fields +for the new hash table type. + +Here is a boilerplate example of a creation routine. +@var{function_name} is the name of the routine. +@var{entry_type} is the type of an entry in the hash table you +are creating. @var{base_newfunc} is the name of the creation +routine of the hash table type your hash table is derived +from. + + +@example +struct bfd_hash_entry * +@var{function_name} (struct bfd_hash_entry *entry, + struct bfd_hash_table *table, + const char *string) +@{ + struct @var{entry_type} *ret = (@var{entry_type} *) entry; + + /* Allocate the structure if it has not already been allocated by a + derived class. */ + if (ret == NULL) + @{ + ret = bfd_hash_allocate (table, sizeof (* ret)); + if (ret == NULL) + return NULL; + @} + + /* Call the allocation method of the base class. */ + ret = ((@var{entry_type} *) + @var{base_newfunc} ((struct bfd_hash_entry *) ret, table, string)); + + /* Initialize the local fields here. */ + + return (struct bfd_hash_entry *) ret; +@} +@end example +@strong{Description}@* +The creation routine for the linker hash table, which is in +@code{linker.c}, looks just like this example. +@var{function_name} is @code{_bfd_link_hash_newfunc}. +@var{entry_type} is @code{struct bfd_link_hash_entry}. +@var{base_newfunc} is @code{bfd_hash_newfunc}, the creation +routine for a basic hash table. + +@code{_bfd_link_hash_newfunc} also initializes the local fields +in a linker hash table entry: @code{type}, @code{written} and +@code{next}. + +@node Write Other Derived Routines, , Write the Derived Creation Routine, Deriving a New Hash Table Type +@subsubsection Write other derived routines +You will want to write other routines for your new hash table, +as well. + +You will want an initialization routine which calls the +initialization routine of the hash table you are deriving from +and initializes any other local fields. For the linker hash +table, this is @code{_bfd_link_hash_table_init} in @code{linker.c}. + +You will want a lookup routine which calls the lookup routine +of the hash table you are deriving from and casts the result. +The linker hash table uses @code{bfd_link_hash_lookup} in +@code{linker.c} (this actually takes an additional argument which +it uses to decide how to return the looked up value). + +You may want a traversal routine. This should just call the +traversal routine of the hash table you are deriving from with +appropriate casts. The linker hash table uses +@code{bfd_link_hash_traverse} in @code{linker.c}. + +These routines may simply be defined as macros. For example, +the a.out backend linker hash table, which is derived from the +linker hash table, uses macros for the lookup and traversal +routines. These are @code{aout_link_hash_lookup} and +@code{aout_link_hash_traverse} in aoutx.h. + diff --git a/bfd/doc/init.texi b/bfd/doc/init.texi new file mode 100644 index 0000000..ab735f8 --- /dev/null +++ b/bfd/doc/init.texi @@ -0,0 +1,16 @@ +@section Initialization + + +@subsection Initialization functions +These are the functions that handle initializing a BFD. + +@findex bfd_init +@subsubsection @code{bfd_init} +@strong{Synopsis} +@example +void bfd_init (void); +@end example +@strong{Description}@* +This routine must be called before any other BFD function to +initialize magical internal data structures. + diff --git a/bfd/doc/libbfd.texi b/bfd/doc/libbfd.texi new file mode 100644 index 0000000..b0b0300 --- /dev/null +++ b/bfd/doc/libbfd.texi @@ -0,0 +1,179 @@ +@section Implementation details + + +@subsection Internal functions + + +@strong{Description}@* +These routines are used within BFD. +They are not intended for export, but are documented here for +completeness. + +@findex bfd_write_bigendian_4byte_int +@subsubsection @code{bfd_write_bigendian_4byte_int} +@strong{Synopsis} +@example +bfd_boolean bfd_write_bigendian_4byte_int (bfd *, unsigned int); +@end example +@strong{Description}@* +Write a 4 byte integer @var{i} to the output BFD @var{abfd}, in big +endian order regardless of what else is going on. This is useful in +archives. + +@findex bfd_put_size +@subsubsection @code{bfd_put_size} +@findex bfd_get_size +@subsubsection @code{bfd_get_size} +@strong{Description}@* +These macros as used for reading and writing raw data in +sections; each access (except for bytes) is vectored through +the target format of the BFD and mangled accordingly. The +mangling performs any necessary endian translations and +removes alignment restrictions. Note that types accepted and +returned by these macros are identical so they can be swapped +around in macros---for example, @file{libaout.h} defines @code{GET_WORD} +to either @code{bfd_get_32} or @code{bfd_get_64}. + +In the put routines, @var{val} must be a @code{bfd_vma}. If we are on a +system without prototypes, the caller is responsible for making +sure that is true, with a cast if necessary. We don't cast +them in the macro definitions because that would prevent @code{lint} +or @code{gcc -Wall} from detecting sins such as passing a pointer. +To detect calling these with less than a @code{bfd_vma}, use +@code{gcc -Wconversion} on a host with 64 bit @code{bfd_vma}'s. +@example + +/* Byte swapping macros for user section data. */ + +#define bfd_put_8(abfd, val, ptr) \ + ((void) (*((unsigned char *) (ptr)) = (val) & 0xff)) +#define bfd_put_signed_8 \ + bfd_put_8 +#define bfd_get_8(abfd, ptr) \ + (*(const unsigned char *) (ptr) & 0xff) +#define bfd_get_signed_8(abfd, ptr) \ + (((*(const unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80) + +#define bfd_put_16(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_putx16, ((val),(ptr))) +#define bfd_put_signed_16 \ + bfd_put_16 +#define bfd_get_16(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx16, (ptr)) +#define bfd_get_signed_16(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx_signed_16, (ptr)) + +#define bfd_put_32(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_putx32, ((val),(ptr))) +#define bfd_put_signed_32 \ + bfd_put_32 +#define bfd_get_32(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx32, (ptr)) +#define bfd_get_signed_32(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx_signed_32, (ptr)) + +#define bfd_put_64(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_putx64, ((val), (ptr))) +#define bfd_put_signed_64 \ + bfd_put_64 +#define bfd_get_64(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx64, (ptr)) +#define bfd_get_signed_64(abfd, ptr) \ + BFD_SEND (abfd, bfd_getx_signed_64, (ptr)) + +#define bfd_get(bits, abfd, ptr) \ + ((bits) == 8 ? (bfd_vma) bfd_get_8 (abfd, ptr) \ + : (bits) == 16 ? bfd_get_16 (abfd, ptr) \ + : (bits) == 32 ? bfd_get_32 (abfd, ptr) \ + : (bits) == 64 ? bfd_get_64 (abfd, ptr) \ + : (abort (), (bfd_vma) - 1)) + +#define bfd_put(bits, abfd, val, ptr) \ + ((bits) == 8 ? bfd_put_8 (abfd, val, ptr) \ + : (bits) == 16 ? bfd_put_16 (abfd, val, ptr) \ + : (bits) == 32 ? bfd_put_32 (abfd, val, ptr) \ + : (bits) == 64 ? bfd_put_64 (abfd, val, ptr) \ + : (abort (), (void) 0)) + +@end example + +@findex bfd_h_put_size +@subsubsection @code{bfd_h_put_size} +@strong{Description}@* +These macros have the same function as their @code{bfd_get_x} +brethren, except that they are used for removing information +for the header records of object files. Believe it or not, +some object files keep their header records in big endian +order and their data in little endian order. +@example + +/* Byte swapping macros for file header data. */ + +#define bfd_h_put_8(abfd, val, ptr) \ + bfd_put_8 (abfd, val, ptr) +#define bfd_h_put_signed_8(abfd, val, ptr) \ + bfd_put_8 (abfd, val, ptr) +#define bfd_h_get_8(abfd, ptr) \ + bfd_get_8 (abfd, ptr) +#define bfd_h_get_signed_8(abfd, ptr) \ + bfd_get_signed_8 (abfd, ptr) + +#define bfd_h_put_16(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_h_putx16, (val, ptr)) +#define bfd_h_put_signed_16 \ + bfd_h_put_16 +#define bfd_h_get_16(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx16, (ptr)) +#define bfd_h_get_signed_16(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx_signed_16, (ptr)) + +#define bfd_h_put_32(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_h_putx32, (val, ptr)) +#define bfd_h_put_signed_32 \ + bfd_h_put_32 +#define bfd_h_get_32(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx32, (ptr)) +#define bfd_h_get_signed_32(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx_signed_32, (ptr)) + +#define bfd_h_put_64(abfd, val, ptr) \ + BFD_SEND (abfd, bfd_h_putx64, (val, ptr)) +#define bfd_h_put_signed_64 \ + bfd_h_put_64 +#define bfd_h_get_64(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx64, (ptr)) +#define bfd_h_get_signed_64(abfd, ptr) \ + BFD_SEND (abfd, bfd_h_getx_signed_64, (ptr)) + +/* Aliases for the above, which should eventually go away. */ + +#define H_PUT_64 bfd_h_put_64 +#define H_PUT_32 bfd_h_put_32 +#define H_PUT_16 bfd_h_put_16 +#define H_PUT_8 bfd_h_put_8 +#define H_PUT_S64 bfd_h_put_signed_64 +#define H_PUT_S32 bfd_h_put_signed_32 +#define H_PUT_S16 bfd_h_put_signed_16 +#define H_PUT_S8 bfd_h_put_signed_8 +#define H_GET_64 bfd_h_get_64 +#define H_GET_32 bfd_h_get_32 +#define H_GET_16 bfd_h_get_16 +#define H_GET_8 bfd_h_get_8 +#define H_GET_S64 bfd_h_get_signed_64 +#define H_GET_S32 bfd_h_get_signed_32 +#define H_GET_S16 bfd_h_get_signed_16 +#define H_GET_S8 bfd_h_get_signed_8 + + +@end example + +@findex bfd_log2 +@subsubsection @code{bfd_log2} +@strong{Synopsis} +@example +unsigned int bfd_log2 (bfd_vma x); +@end example +@strong{Description}@* +Return the log base 2 of the value supplied, rounded up. E.g., an +@var{x} of 1025 returns 11. A @var{x} of 0 returns 0. + diff --git a/bfd/doc/linker.texi b/bfd/doc/linker.texi new file mode 100644 index 0000000..eae1662 --- /dev/null +++ b/bfd/doc/linker.texi @@ -0,0 +1,432 @@ +@section Linker Functions +@cindex Linker +The linker uses three special entry points in the BFD target +vector. It is not necessary to write special routines for +these entry points when creating a new BFD back end, since +generic versions are provided. However, writing them can +speed up linking and make it use significantly less runtime +memory. + +The first routine creates a hash table used by the other +routines. The second routine adds the symbols from an object +file to the hash table. The third routine takes all the +object files and links them together to create the output +file. These routines are designed so that the linker proper +does not need to know anything about the symbols in the object +files that it is linking. The linker merely arranges the +sections as directed by the linker script and lets BFD handle +the details of symbols and relocs. + +The second routine and third routines are passed a pointer to +a @code{struct bfd_link_info} structure (defined in +@code{bfdlink.h}) which holds information relevant to the link, +including the linker hash table (which was created by the +first routine) and a set of callback functions to the linker +proper. + +The generic linker routines are in @code{linker.c}, and use the +header file @code{genlink.h}. As of this writing, the only back +ends which have implemented versions of these routines are +a.out (in @code{aoutx.h}) and ECOFF (in @code{ecoff.c}). The a.out +routines are used as examples throughout this section. + +@menu +* Creating a Linker Hash Table:: +* Adding Symbols to the Hash Table:: +* Performing the Final Link:: +@end menu + +@node Creating a Linker Hash Table, Adding Symbols to the Hash Table, Linker Functions, Linker Functions +@subsection Creating a linker hash table +@cindex _bfd_link_hash_table_create in target vector +@cindex target vector (_bfd_link_hash_table_create) +The linker routines must create a hash table, which must be +derived from @code{struct bfd_link_hash_table} described in +@code{bfdlink.c}. @xref{Hash Tables}, for information on how to +create a derived hash table. This entry point is called using +the target vector of the linker output file. + +The @code{_bfd_link_hash_table_create} entry point must allocate +and initialize an instance of the desired hash table. If the +back end does not require any additional information to be +stored with the entries in the hash table, the entry point may +simply create a @code{struct bfd_link_hash_table}. Most likely, +however, some additional information will be needed. + +For example, with each entry in the hash table the a.out +linker keeps the index the symbol has in the final output file +(this index number is used so that when doing a relocatable +link the symbol index used in the output file can be quickly +filled in when copying over a reloc). The a.out linker code +defines the required structures and functions for a hash table +derived from @code{struct bfd_link_hash_table}. The a.out linker +hash table is created by the function +@code{NAME(aout,link_hash_table_create)}; it simply allocates +space for the hash table, initializes it, and returns a +pointer to it. + +When writing the linker routines for a new back end, you will +generally not know exactly which fields will be required until +you have finished. You should simply create a new hash table +which defines no additional fields, and then simply add fields +as they become necessary. + +@node Adding Symbols to the Hash Table, Performing the Final Link, Creating a Linker Hash Table, Linker Functions +@subsection Adding symbols to the hash table +@cindex _bfd_link_add_symbols in target vector +@cindex target vector (_bfd_link_add_symbols) +The linker proper will call the @code{_bfd_link_add_symbols} +entry point for each object file or archive which is to be +linked (typically these are the files named on the command +line, but some may also come from the linker script). The +entry point is responsible for examining the file. For an +object file, BFD must add any relevant symbol information to +the hash table. For an archive, BFD must determine which +elements of the archive should be used and adding them to the +link. + +The a.out version of this entry point is +@code{NAME(aout,link_add_symbols)}. + +@menu +* Differing file formats:: +* Adding symbols from an object file:: +* Adding symbols from an archive:: +@end menu + +@node Differing file formats, Adding symbols from an object file, Adding Symbols to the Hash Table, Adding Symbols to the Hash Table +@subsubsection Differing file formats +Normally all the files involved in a link will be of the same +format, but it is also possible to link together different +format object files, and the back end must support that. The +@code{_bfd_link_add_symbols} entry point is called via the target +vector of the file to be added. This has an important +consequence: the function may not assume that the hash table +is the type created by the corresponding +@code{_bfd_link_hash_table_create} vector. All the +@code{_bfd_link_add_symbols} function can assume about the hash +table is that it is derived from @code{struct +bfd_link_hash_table}. + +Sometimes the @code{_bfd_link_add_symbols} function must store +some information in the hash table entry to be used by the +@code{_bfd_final_link} function. In such a case the output bfd +xvec must be checked to make sure that the hash table was +created by an object file of the same format. + +The @code{_bfd_final_link} routine must be prepared to handle a +hash entry without any extra information added by the +@code{_bfd_link_add_symbols} function. A hash entry without +extra information will also occur when the linker script +directs the linker to create a symbol. Note that, regardless +of how a hash table entry is added, all the fields will be +initialized to some sort of null value by the hash table entry +initialization function. + +See @code{ecoff_link_add_externals} for an example of how to +check the output bfd before saving information (in this +case, the ECOFF external symbol debugging information) in a +hash table entry. + +@node Adding symbols from an object file, Adding symbols from an archive, Differing file formats, Adding Symbols to the Hash Table +@subsubsection Adding symbols from an object file +When the @code{_bfd_link_add_symbols} routine is passed an object +file, it must add all externally visible symbols in that +object file to the hash table. The actual work of adding the +symbol to the hash table is normally handled by the function +@code{_bfd_generic_link_add_one_symbol}. The +@code{_bfd_link_add_symbols} routine is responsible for reading +all the symbols from the object file and passing the correct +information to @code{_bfd_generic_link_add_one_symbol}. + +The @code{_bfd_link_add_symbols} routine should not use +@code{bfd_canonicalize_symtab} to read the symbols. The point of +providing this routine is to avoid the overhead of converting +the symbols into generic @code{asymbol} structures. + +@findex _bfd_generic_link_add_one_symbol +@code{_bfd_generic_link_add_one_symbol} handles the details of +combining common symbols, warning about multiple definitions, +and so forth. It takes arguments which describe the symbol to +add, notably symbol flags, a section, and an offset. The +symbol flags include such things as @code{BSF_WEAK} or +@code{BSF_INDIRECT}. The section is a section in the object +file, or something like @code{bfd_und_section_ptr} for an undefined +symbol or @code{bfd_com_section_ptr} for a common symbol. + +If the @code{_bfd_final_link} routine is also going to need to +read the symbol information, the @code{_bfd_link_add_symbols} +routine should save it somewhere attached to the object file +BFD. However, the information should only be saved if the +@code{keep_memory} field of the @code{info} argument is TRUE, so +that the @code{-no-keep-memory} linker switch is effective. + +The a.out function which adds symbols from an object file is +@code{aout_link_add_object_symbols}, and most of the interesting +work is in @code{aout_link_add_symbols}. The latter saves +pointers to the hash tables entries created by +@code{_bfd_generic_link_add_one_symbol} indexed by symbol number, +so that the @code{_bfd_final_link} routine does not have to call +the hash table lookup routine to locate the entry. + +@node Adding symbols from an archive, , Adding symbols from an object file, Adding Symbols to the Hash Table +@subsubsection Adding symbols from an archive +When the @code{_bfd_link_add_symbols} routine is passed an +archive, it must look through the symbols defined by the +archive and decide which elements of the archive should be +included in the link. For each such element it must call the +@code{add_archive_element} linker callback, and it must add the +symbols from the object file to the linker hash table. (The +callback may in fact indicate that a replacement BFD should be +used, in which case the symbols from that BFD should be added +to the linker hash table instead.) + +@findex _bfd_generic_link_add_archive_symbols +In most cases the work of looking through the symbols in the +archive should be done by the +@code{_bfd_generic_link_add_archive_symbols} function. This +function builds a hash table from the archive symbol table and +looks through the list of undefined symbols to see which +elements should be included. +@code{_bfd_generic_link_add_archive_symbols} is passed a function +to call to make the final decision about adding an archive +element to the link and to do the actual work of adding the +symbols to the linker hash table. + +The function passed to +@code{_bfd_generic_link_add_archive_symbols} must read the +symbols of the archive element and decide whether the archive +element should be included in the link. If the element is to +be included, the @code{add_archive_element} linker callback +routine must be called with the element as an argument, and +the element's symbols must be added to the linker hash table +just as though the element had itself been passed to the +@code{_bfd_link_add_symbols} function. The @code{add_archive_element} +callback has the option to indicate that it would like to +replace the element archive with a substitute BFD, in which +case it is the symbols of that substitute BFD that must be +added to the linker hash table instead. + +When the a.out @code{_bfd_link_add_symbols} function receives an +archive, it calls @code{_bfd_generic_link_add_archive_symbols} +passing @code{aout_link_check_archive_element} as the function +argument. @code{aout_link_check_archive_element} calls +@code{aout_link_check_ar_symbols}. If the latter decides to add +the element (an element is only added if it provides a real, +non-common, definition for a previously undefined or common +symbol) it calls the @code{add_archive_element} callback and then +@code{aout_link_check_archive_element} calls +@code{aout_link_add_symbols} to actually add the symbols to the +linker hash table - possibly those of a substitute BFD, if the +@code{add_archive_element} callback avails itself of that option. + +The ECOFF back end is unusual in that it does not normally +call @code{_bfd_generic_link_add_archive_symbols}, because ECOFF +archives already contain a hash table of symbols. The ECOFF +back end searches the archive itself to avoid the overhead of +creating a new hash table. + +@node Performing the Final Link, , Adding Symbols to the Hash Table, Linker Functions +@subsection Performing the final link +@cindex _bfd_link_final_link in target vector +@cindex target vector (_bfd_final_link) +When all the input files have been processed, the linker calls +the @code{_bfd_final_link} entry point of the output BFD. This +routine is responsible for producing the final output file, +which has several aspects. It must relocate the contents of +the input sections and copy the data into the output sections. +It must build an output symbol table including any local +symbols from the input files and the global symbols from the +hash table. When producing relocatable output, it must +modify the input relocs and write them into the output file. +There may also be object format dependent work to be done. + +The linker will also call the @code{write_object_contents} entry +point when the BFD is closed. The two entry points must work +together in order to produce the correct output file. + +The details of how this works are inevitably dependent upon +the specific object file format. The a.out +@code{_bfd_final_link} routine is @code{NAME(aout,final_link)}. + +@menu +* Information provided by the linker:: +* Relocating the section contents:: +* Writing the symbol table:: +@end menu + +@node Information provided by the linker, Relocating the section contents, Performing the Final Link, Performing the Final Link +@subsubsection Information provided by the linker +Before the linker calls the @code{_bfd_final_link} entry point, +it sets up some data structures for the function to use. + +The @code{input_bfds} field of the @code{bfd_link_info} structure +will point to a list of all the input files included in the +link. These files are linked through the @code{link_next} field +of the @code{bfd} structure. + +Each section in the output file will have a list of +@code{link_order} structures attached to the @code{map_head.link_order} +field (the @code{link_order} structure is defined in +@code{bfdlink.h}). These structures describe how to create the +contents of the output section in terms of the contents of +various input sections, fill constants, and, eventually, other +types of information. They also describe relocs that must be +created by the BFD backend, but do not correspond to any input +file; this is used to support -Ur, which builds constructors +while generating a relocatable object file. + +@node Relocating the section contents, Writing the symbol table, Information provided by the linker, Performing the Final Link +@subsubsection Relocating the section contents +The @code{_bfd_final_link} function should look through the +@code{link_order} structures attached to each section of the +output file. Each @code{link_order} structure should either be +handled specially, or it should be passed to the function +@code{_bfd_default_link_order} which will do the right thing +(@code{_bfd_default_link_order} is defined in @code{linker.c}). + +For efficiency, a @code{link_order} of type +@code{bfd_indirect_link_order} whose associated section belongs +to a BFD of the same format as the output BFD must be handled +specially. This type of @code{link_order} describes part of an +output section in terms of a section belonging to one of the +input files. The @code{_bfd_final_link} function should read the +contents of the section and any associated relocs, apply the +relocs to the section contents, and write out the modified +section contents. If performing a relocatable link, the +relocs themselves must also be modified and written out. + +@findex _bfd_relocate_contents +@findex _bfd_final_link_relocate +The functions @code{_bfd_relocate_contents} and +@code{_bfd_final_link_relocate} provide some general support for +performing the actual relocations, notably overflow checking. +Their arguments include information about the symbol the +relocation is against and a @code{reloc_howto_type} argument +which describes the relocation to perform. These functions +are defined in @code{reloc.c}. + +The a.out function which handles reading, relocating, and +writing section contents is @code{aout_link_input_section}. The +actual relocation is done in @code{aout_link_input_section_std} +and @code{aout_link_input_section_ext}. + +@node Writing the symbol table, , Relocating the section contents, Performing the Final Link +@subsubsection Writing the symbol table +The @code{_bfd_final_link} function must gather all the symbols +in the input files and write them out. It must also write out +all the symbols in the global hash table. This must be +controlled by the @code{strip} and @code{discard} fields of the +@code{bfd_link_info} structure. + +The local symbols of the input files will not have been +entered into the linker hash table. The @code{_bfd_final_link} +routine must consider each input file and include the symbols +in the output file. It may be convenient to do this when +looking through the @code{link_order} structures, or it may be +done by stepping through the @code{input_bfds} list. + +The @code{_bfd_final_link} routine must also traverse the global +hash table to gather all the externally visible symbols. It +is possible that most of the externally visible symbols may be +written out when considering the symbols of each input file, +but it is still necessary to traverse the hash table since the +linker script may have defined some symbols that are not in +any of the input files. + +The @code{strip} field of the @code{bfd_link_info} structure +controls which symbols are written out. The possible values +are listed in @code{bfdlink.h}. If the value is @code{strip_some}, +then the @code{keep_hash} field of the @code{bfd_link_info} +structure is a hash table of symbols to keep; each symbol +should be looked up in this hash table, and only symbols which +are present should be included in the output file. + +If the @code{strip} field of the @code{bfd_link_info} structure +permits local symbols to be written out, the @code{discard} field +is used to further controls which local symbols are included +in the output file. If the value is @code{discard_l}, then all +local symbols which begin with a certain prefix are discarded; +this is controlled by the @code{bfd_is_local_label_name} entry point. + +The a.out backend handles symbols by calling +@code{aout_link_write_symbols} on each input BFD and then +traversing the global hash table with the function +@code{aout_link_write_other_symbol}. It builds a string table +while writing out the symbols, which is written to the output +file at the end of @code{NAME(aout,final_link)}. + +@findex bfd_link_split_section +@subsubsection @code{bfd_link_split_section} +@strong{Synopsis} +@example +bfd_boolean bfd_link_split_section (bfd *abfd, asection *sec); +@end example +@strong{Description}@* +Return nonzero if @var{sec} should be split during a +reloceatable or final link. +@example +#define bfd_link_split_section(abfd, sec) \ + BFD_SEND (abfd, _bfd_link_split_section, (abfd, sec)) + +@end example + +@findex bfd_section_already_linked +@subsubsection @code{bfd_section_already_linked} +@strong{Synopsis} +@example +bfd_boolean bfd_section_already_linked (bfd *abfd, + asection *sec, + struct bfd_link_info *info); +@end example +@strong{Description}@* +Check if @var{data} has been already linked during a reloceatable +or final link. Return TRUE if it has. +@example +#define bfd_section_already_linked(abfd, sec, info) \ + BFD_SEND (abfd, _section_already_linked, (abfd, sec, info)) + +@end example + +@findex bfd_generic_define_common_symbol +@subsubsection @code{bfd_generic_define_common_symbol} +@strong{Synopsis} +@example +bfd_boolean bfd_generic_define_common_symbol + (bfd *output_bfd, struct bfd_link_info *info, + struct bfd_link_hash_entry *h); +@end example +@strong{Description}@* +Convert common symbol @var{h} into a defined symbol. +Return TRUE on success and FALSE on failure. +@example +#define bfd_define_common_symbol(output_bfd, info, h) \ + BFD_SEND (output_bfd, _bfd_define_common_symbol, (output_bfd, info, h)) + +@end example + +@findex bfd_find_version_for_sym +@subsubsection @code{bfd_find_version_for_sym } +@strong{Synopsis} +@example +struct bfd_elf_version_tree * bfd_find_version_for_sym + (struct bfd_elf_version_tree *verdefs, + const char *sym_name, bfd_boolean *hide); +@end example +@strong{Description}@* +Search an elf version script tree for symbol versioning +info and export / don't-export status for a given symbol. +Return non-NULL on success and NULL on failure; also sets +the output @samp{hide} boolean parameter. + +@findex bfd_hide_sym_by_version +@subsubsection @code{bfd_hide_sym_by_version} +@strong{Synopsis} +@example +bfd_boolean bfd_hide_sym_by_version + (struct bfd_elf_version_tree *verdefs, const char *sym_name); +@end example +@strong{Description}@* +Search an elf version script tree for symbol versioning +info for a given symbol. Return TRUE if the symbol is hidden. + diff --git a/bfd/doc/mmo.texi b/bfd/doc/mmo.texi new file mode 100644 index 0000000..b0d726a --- /dev/null +++ b/bfd/doc/mmo.texi @@ -0,0 +1,365 @@ +@section mmo backend +The mmo object format is used exclusively together with Professor +Donald E.@: Knuth's educational 64-bit processor MMIX. The simulator +@command{mmix} which is available at +@url{http://www-cs-faculty.stanford.edu/~knuth/programs/mmix.tar.gz} +understands this format. That package also includes a combined +assembler and linker called @command{mmixal}. The mmo format has +no advantages feature-wise compared to e.g. ELF. It is a simple +non-relocatable object format with no support for archives or +debugging information, except for symbol value information and +line numbers (which is not yet implemented in BFD). See +@url{http://www-cs-faculty.stanford.edu/~knuth/mmix.html} for more +information about MMIX. The ELF format is used for intermediate +object files in the BFD implementation. + +@c We want to xref the symbol table node. A feature in "chew" +@c requires that "commands" do not contain spaces in the +@c arguments. Hence the hyphen in "Symbol-table". +@menu +* File layout:: +* Symbol-table:: +* mmo section mapping:: +@end menu + +@node File layout, Symbol-table, mmo, mmo +@subsection File layout +The mmo file contents is not partitioned into named sections as +with e.g.@: ELF. Memory areas is formed by specifying the +location of the data that follows. Only the memory area +@samp{0x0000@dots{}00} to @samp{0x01ff@dots{}ff} is executable, so +it is used for code (and constants) and the area +@samp{0x2000@dots{}00} to @samp{0x20ff@dots{}ff} is used for +writable data. @xref{mmo section mapping}. + +There is provision for specifying ``special data'' of 65536 +different types. We use type 80 (decimal), arbitrarily chosen the +same as the ELF @code{e_machine} number for MMIX, filling it with +section information normally found in ELF objects. @xref{mmo +section mapping}. + +Contents is entered as 32-bit words, xor:ed over previous +contents, always zero-initialized. A word that starts with the +byte @samp{0x98} forms a command called a @samp{lopcode}, where +the next byte distinguished between the thirteen lopcodes. The +two remaining bytes, called the @samp{Y} and @samp{Z} fields, or +the @samp{YZ} field (a 16-bit big-endian number), are used for +various purposes different for each lopcode. As documented in +@url{http://www-cs-faculty.stanford.edu/~knuth/mmixal-intro.ps.gz}, +the lopcodes are: + +@table @code +@item lop_quote +0x98000001. The next word is contents, regardless of whether it +starts with 0x98 or not. + +@item lop_loc +0x9801YYZZ, where @samp{Z} is 1 or 2. This is a location +directive, setting the location for the next data to the next +32-bit word (for @math{Z = 1}) or 64-bit word (for @math{Z = 2}), +plus @math{Y * 2^56}. Normally @samp{Y} is 0 for the text segment +and 2 for the data segment. + +@item lop_skip +0x9802YYZZ. Increase the current location by @samp{YZ} bytes. + +@item lop_fixo +0x9803YYZZ, where @samp{Z} is 1 or 2. Store the current location +as 64 bits into the location pointed to by the next 32-bit +(@math{Z = 1}) or 64-bit (@math{Z = 2}) word, plus @math{Y * +2^56}. + +@item lop_fixr +0x9804YYZZ. @samp{YZ} is stored into the current location plus +@math{2 - 4 * YZ}. + +@item lop_fixrx +0x980500ZZ. @samp{Z} is 16 or 24. A value @samp{L} derived from +the following 32-bit word are used in a manner similar to +@samp{YZ} in lop_fixr: it is xor:ed into the current location +minus @math{4 * L}. The first byte of the word is 0 or 1. If it +is 1, then @math{L = (@var{lowest 24 bits of word}) - 2^Z}, if 0, +then @math{L = (@var{lowest 24 bits of word})}. + +@item lop_file +0x9806YYZZ. @samp{Y} is the file number, @samp{Z} is count of +32-bit words. Set the file number to @samp{Y} and the line +counter to 0. The next @math{Z * 4} bytes contain the file name, +padded with zeros if the count is not a multiple of four. The +same @samp{Y} may occur multiple times, but @samp{Z} must be 0 for +all but the first occurrence. + +@item lop_line +0x9807YYZZ. @samp{YZ} is the line number. Together with +lop_file, it forms the source location for the next 32-bit word. +Note that for each non-lopcode 32-bit word, line numbers are +assumed incremented by one. + +@item lop_spec +0x9808YYZZ. @samp{YZ} is the type number. Data until the next +lopcode other than lop_quote forms special data of type @samp{YZ}. +@xref{mmo section mapping}. + +Other types than 80, (or type 80 with a content that does not +parse) is stored in sections named @code{.MMIX.spec_data.@var{n}} +where @var{n} is the @samp{YZ}-type. The flags for such a +sections say not to allocate or load the data. The vma is 0. +Contents of multiple occurrences of special data @var{n} is +concatenated to the data of the previous lop_spec @var{n}s. The +location in data or code at which the lop_spec occurred is lost. + +@item lop_pre +0x980901ZZ. The first lopcode in a file. The @samp{Z} field forms the +length of header information in 32-bit words, where the first word +tells the time in seconds since @samp{00:00:00 GMT Jan 1 1970}. + +@item lop_post +0x980a00ZZ. @math{Z > 32}. This lopcode follows after all +content-generating lopcodes in a program. The @samp{Z} field +denotes the value of @samp{rG} at the beginning of the program. +The following @math{256 - Z} big-endian 64-bit words are loaded +into global registers @samp{$G} @dots{} @samp{$255}. + +@item lop_stab +0x980b0000. The next-to-last lopcode in a program. Must follow +immediately after the lop_post lopcode and its data. After this +lopcode follows all symbols in a compressed format +(@pxref{Symbol-table}). + +@item lop_end +0x980cYYZZ. The last lopcode in a program. It must follow the +lop_stab lopcode and its data. The @samp{YZ} field contains the +number of 32-bit words of symbol table information after the +preceding lop_stab lopcode. +@end table + +Note that the lopcode "fixups"; @code{lop_fixr}, @code{lop_fixrx} and +@code{lop_fixo} are not generated by BFD, but are handled. They are +generated by @code{mmixal}. + +This trivial one-label, one-instruction file: + +@example + :Main TRAP 1,2,3 +@end example + +can be represented this way in mmo: + +@example + 0x98090101 - lop_pre, one 32-bit word with timestamp. + + 0x98010002 - lop_loc, text segment, using a 64-bit address. + Note that mmixal does not emit this for the file above. + 0x00000000 - Address, high 32 bits. + 0x00000000 - Address, low 32 bits. + 0x98060002 - lop_file, 2 32-bit words for file-name. + 0x74657374 - "test" + 0x2e730000 - ".s\0\0" + 0x98070001 - lop_line, line 1. + 0x00010203 - TRAP 1,2,3 + 0x980a00ff - lop_post, setting $255 to 0. + 0x00000000 + 0x00000000 + 0x980b0000 - lop_stab for ":Main" = 0, serial 1. + 0x203a4040 @xref{Symbol-table}. + 0x10404020 + 0x4d206120 + 0x69016e00 + 0x81000000 + 0x980c0005 - lop_end; symbol table contained five 32-bit words. +@end example +@node Symbol-table, mmo section mapping, File layout, mmo +@subsection Symbol table format +From mmixal.w (or really, the generated mmixal.tex) in +@url{http://www-cs-faculty.stanford.edu/~knuth/programs/mmix.tar.gz}): +``Symbols are stored and retrieved by means of a @samp{ternary +search trie}, following ideas of Bentley and Sedgewick. (See +ACM--SIAM Symp.@: on Discrete Algorithms @samp{8} (1997), 360--369; +R.@:Sedgewick, @samp{Algorithms in C} (Reading, Mass.@: +Addison--Wesley, 1998), @samp{15.4}.) Each trie node stores a +character, and there are branches to subtries for the cases where +a given character is less than, equal to, or greater than the +character in the trie. There also is a pointer to a symbol table +entry if a symbol ends at the current node.'' + +So it's a tree encoded as a stream of bytes. The stream of bytes +acts on a single virtual global symbol, adding and removing +characters and signalling complete symbol points. Here, we read +the stream and create symbols at the completion points. + +First, there's a control byte @code{m}. If any of the listed bits +in @code{m} is nonzero, we execute what stands at the right, in +the listed order: + +@example + (MMO3_LEFT) + 0x40 - Traverse left trie. + (Read a new command byte and recurse.) + + (MMO3_SYMBITS) + 0x2f - Read the next byte as a character and store it in the + current character position; increment character position. + Test the bits of @code{m}: + + (MMO3_WCHAR) + 0x80 - The character is 16-bit (so read another byte, + merge into current character. + + (MMO3_TYPEBITS) + 0xf - We have a complete symbol; parse the type, value + and serial number and do what should be done + with a symbol. The type and length information + is in j = (m & 0xf). + + (MMO3_REGQUAL_BITS) + j == 0xf: A register variable. The following + byte tells which register. + j <= 8: An absolute symbol. Read j bytes as the + big-endian number the symbol equals. + A j = 2 with two zero bytes denotes an + unknown symbol. + j > 8: As with j <= 8, but add (0x20 << 56) + to the value in the following j - 8 + bytes. + + Then comes the serial number, as a variant of + uleb128, but better named ubeb128: + Read bytes and shift the previous value left 7 + (multiply by 128). Add in the new byte, repeat + until a byte has bit 7 set. The serial number + is the computed value minus 128. + + (MMO3_MIDDLE) + 0x20 - Traverse middle trie. (Read a new command byte + and recurse.) Decrement character position. + + (MMO3_RIGHT) + 0x10 - Traverse right trie. (Read a new command byte and + recurse.) +@end example + +Let's look again at the @code{lop_stab} for the trivial file +(@pxref{File layout}). + +@example + 0x980b0000 - lop_stab for ":Main" = 0, serial 1. + 0x203a4040 + 0x10404020 + 0x4d206120 + 0x69016e00 + 0x81000000 +@end example + +This forms the trivial trie (note that the path between ``:'' and +``M'' is redundant): + +@example + 203a ":" + 40 / + 40 / + 10 \ + 40 / + 40 / + 204d "M" + 2061 "a" + 2069 "i" + 016e "n" is the last character in a full symbol, and + with a value represented in one byte. + 00 The value is 0. + 81 The serial number is 1. +@end example + +@node mmo section mapping, , Symbol-table, mmo +@subsection mmo section mapping +The implementation in BFD uses special data type 80 (decimal) to +encapsulate and describe named sections, containing e.g.@: debug +information. If needed, any datum in the encapsulation will be +quoted using lop_quote. First comes a 32-bit word holding the +number of 32-bit words containing the zero-terminated zero-padded +segment name. After the name there's a 32-bit word holding flags +describing the section type. Then comes a 64-bit big-endian word +with the section length (in bytes), then another with the section +start address. Depending on the type of section, the contents +might follow, zero-padded to 32-bit boundary. For a loadable +section (such as data or code), the contents might follow at some +later point, not necessarily immediately, as a lop_loc with the +same start address as in the section description, followed by the +contents. This in effect forms a descriptor that must be emitted +before the actual contents. Sections described this way must not +overlap. + +For areas that don't have such descriptors, synthetic sections are +formed by BFD. Consecutive contents in the two memory areas +@samp{0x0000@dots{}00} to @samp{0x01ff@dots{}ff} and +@samp{0x2000@dots{}00} to @samp{0x20ff@dots{}ff} are entered in +sections named @code{.text} and @code{.data} respectively. If an area +is not otherwise described, but would together with a neighboring +lower area be less than @samp{0x40000000} bytes long, it is joined +with the lower area and the gap is zero-filled. For other cases, +a new section is formed, named @code{.MMIX.sec.@var{n}}. Here, +@var{n} is a number, a running count through the mmo file, +starting at 0. + +A loadable section specified as: + +@example + .section secname,"ax" + TETRA 1,2,3,4,-1,-2009 + BYTE 80 +@end example + +and linked to address @samp{0x4}, is represented by the sequence: + +@example + 0x98080050 - lop_spec 80 + 0x00000002 - two 32-bit words for the section name + 0x7365636e - "secn" + 0x616d6500 - "ame\0" + 0x00000033 - flags CODE, READONLY, LOAD, ALLOC + 0x00000000 - high 32 bits of section length + 0x0000001c - section length is 28 bytes; 6 * 4 + 1 + alignment to 32 bits + 0x00000000 - high 32 bits of section address + 0x00000004 - section address is 4 + 0x98010002 - 64 bits with address of following data + 0x00000000 - high 32 bits of address + 0x00000004 - low 32 bits: data starts at address 4 + 0x00000001 - 1 + 0x00000002 - 2 + 0x00000003 - 3 + 0x00000004 - 4 + 0xffffffff - -1 + 0xfffff827 - -2009 + 0x50000000 - 80 as a byte, padded with zeros. +@end example + +Note that the lop_spec wrapping does not include the section +contents. Compare this to a non-loaded section specified as: + +@example + .section thirdsec + TETRA 200001,100002 + BYTE 38,40 +@end example + +This, when linked to address @samp{0x200000000000001c}, is +represented by: + +@example + 0x98080050 - lop_spec 80 + 0x00000002 - two 32-bit words for the section name + 0x7365636e - "thir" + 0x616d6500 - "dsec" + 0x00000010 - flag READONLY + 0x00000000 - high 32 bits of section length + 0x0000000c - section length is 12 bytes; 2 * 4 + 2 + alignment to 32 bits + 0x20000000 - high 32 bits of address + 0x0000001c - low 32 bits of address 0x200000000000001c + 0x00030d41 - 200001 + 0x000186a2 - 100002 + 0x26280000 - 38, 40 as bytes, padded with zeros +@end example + +For the latter example, the section contents must not be +loaded in memory, and is therefore specified as part of the +special data. The address is usually unimportant but might +provide information for e.g.@: the DWARF 2 debugging format. diff --git a/bfd/doc/opncls.texi b/bfd/doc/opncls.texi new file mode 100644 index 0000000..eddf66a --- /dev/null +++ b/bfd/doc/opncls.texi @@ -0,0 +1,377 @@ + +@example +/* Set to N to open the next N BFDs using an alternate id space. */ +extern unsigned int bfd_use_reserved_id; +@end example +@section Opening and closing BFDs + + +@subsection Functions for opening and closing + + +@findex bfd_fopen +@subsubsection @code{bfd_fopen} +@strong{Synopsis} +@example +bfd *bfd_fopen (const char *filename, const char *target, + const char *mode, int fd); +@end example +@strong{Description}@* +Open the file @var{filename} with the target @var{target}. +Return a pointer to the created BFD. If @var{fd} is not -1, +then @code{fdopen} is used to open the file; otherwise, @code{fopen} +is used. @var{mode} is passed directly to @code{fopen} or +@code{fdopen}. + +Calls @code{bfd_find_target}, so @var{target} is interpreted as by +that function. + +The new BFD is marked as cacheable iff @var{fd} is -1. + +If @code{NULL} is returned then an error has occured. Possible errors +are @code{bfd_error_no_memory}, @code{bfd_error_invalid_target} or +@code{system_call} error. + +@findex bfd_openr +@subsubsection @code{bfd_openr} +@strong{Synopsis} +@example +bfd *bfd_openr (const char *filename, const char *target); +@end example +@strong{Description}@* +Open the file @var{filename} (using @code{fopen}) with the target +@var{target}. Return a pointer to the created BFD. + +Calls @code{bfd_find_target}, so @var{target} is interpreted as by +that function. + +If @code{NULL} is returned then an error has occured. Possible errors +are @code{bfd_error_no_memory}, @code{bfd_error_invalid_target} or +@code{system_call} error. + +@findex bfd_fdopenr +@subsubsection @code{bfd_fdopenr} +@strong{Synopsis} +@example +bfd *bfd_fdopenr (const char *filename, const char *target, int fd); +@end example +@strong{Description}@* +@code{bfd_fdopenr} is to @code{bfd_fopenr} much like @code{fdopen} is to +@code{fopen}. It opens a BFD on a file already described by the +@var{fd} supplied. + +When the file is later @code{bfd_close}d, the file descriptor will +be closed. If the caller desires that this file descriptor be +cached by BFD (opened as needed, closed as needed to free +descriptors for other opens), with the supplied @var{fd} used as +an initial file descriptor (but subject to closure at any time), +call bfd_set_cacheable(bfd, 1) on the returned BFD. The default +is to assume no caching; the file descriptor will remain open +until @code{bfd_close}, and will not be affected by BFD operations +on other files. + +Possible errors are @code{bfd_error_no_memory}, +@code{bfd_error_invalid_target} and @code{bfd_error_system_call}. + +@findex bfd_openstreamr +@subsubsection @code{bfd_openstreamr} +@strong{Synopsis} +@example +bfd *bfd_openstreamr (const char *, const char *, void *); +@end example +@strong{Description}@* +Open a BFD for read access on an existing stdio stream. When +the BFD is passed to @code{bfd_close}, the stream will be closed. + +@findex bfd_openr_iovec +@subsubsection @code{bfd_openr_iovec} +@strong{Synopsis} +@example +bfd *bfd_openr_iovec (const char *filename, const char *target, + void *(*open_func) (struct bfd *nbfd, + void *open_closure), + void *open_closure, + file_ptr (*pread_func) (struct bfd *nbfd, + void *stream, + void *buf, + file_ptr nbytes, + file_ptr offset), + int (*close_func) (struct bfd *nbfd, + void *stream), + int (*stat_func) (struct bfd *abfd, + void *stream, + struct stat *sb)); +@end example +@strong{Description}@* +Create and return a BFD backed by a read-only @var{stream}. +The @var{stream} is created using @var{open_func}, accessed using +@var{pread_func} and destroyed using @var{close_func}. + +Calls @code{bfd_find_target}, so @var{target} is interpreted as by +that function. + +Calls @var{open_func} (which can call @code{bfd_zalloc} and +@code{bfd_get_filename}) to obtain the read-only stream backing +the BFD. @var{open_func} either succeeds returning the +non-@code{NULL} @var{stream}, or fails returning @code{NULL} +(setting @code{bfd_error}). + +Calls @var{pread_func} to request @var{nbytes} of data from +@var{stream} starting at @var{offset} (e.g., via a call to +@code{bfd_read}). @var{pread_func} either succeeds returning the +number of bytes read (which can be less than @var{nbytes} when +end-of-file), or fails returning -1 (setting @code{bfd_error}). + +Calls @var{close_func} when the BFD is later closed using +@code{bfd_close}. @var{close_func} either succeeds returning 0, or +fails returning -1 (setting @code{bfd_error}). + +Calls @var{stat_func} to fill in a stat structure for bfd_stat, +bfd_get_size, and bfd_get_mtime calls. @var{stat_func} returns 0 +on success, or returns -1 on failure (setting @code{bfd_error}). + +If @code{bfd_openr_iovec} returns @code{NULL} then an error has +occurred. Possible errors are @code{bfd_error_no_memory}, +@code{bfd_error_invalid_target} and @code{bfd_error_system_call}. + +@findex bfd_openw +@subsubsection @code{bfd_openw} +@strong{Synopsis} +@example +bfd *bfd_openw (const char *filename, const char *target); +@end example +@strong{Description}@* +Create a BFD, associated with file @var{filename}, using the +file format @var{target}, and return a pointer to it. + +Possible errors are @code{bfd_error_system_call}, @code{bfd_error_no_memory}, +@code{bfd_error_invalid_target}. + +@findex bfd_close +@subsubsection @code{bfd_close} +@strong{Synopsis} +@example +bfd_boolean bfd_close (bfd *abfd); +@end example +@strong{Description}@* +Close a BFD. If the BFD was open for writing, then pending +operations are completed and the file written out and closed. +If the created file is executable, then @code{chmod} is called +to mark it as such. + +All memory attached to the BFD is released. + +The file descriptor associated with the BFD is closed (even +if it was passed in to BFD by @code{bfd_fdopenr}). + +@strong{Returns}@* +@code{TRUE} is returned if all is ok, otherwise @code{FALSE}. + +@findex bfd_close_all_done +@subsubsection @code{bfd_close_all_done} +@strong{Synopsis} +@example +bfd_boolean bfd_close_all_done (bfd *); +@end example +@strong{Description}@* +Close a BFD. Differs from @code{bfd_close} since it does not +complete any pending operations. This routine would be used +if the application had just used BFD for swapping and didn't +want to use any of the writing code. + +If the created file is executable, then @code{chmod} is called +to mark it as such. + +All memory attached to the BFD is released. + +@strong{Returns}@* +@code{TRUE} is returned if all is ok, otherwise @code{FALSE}. + +@findex bfd_create +@subsubsection @code{bfd_create} +@strong{Synopsis} +@example +bfd *bfd_create (const char *filename, bfd *templ); +@end example +@strong{Description}@* +Create a new BFD in the manner of @code{bfd_openw}, but without +opening a file. The new BFD takes the target from the target +used by @var{templ}. The format is always set to @code{bfd_object}. + +@findex bfd_make_writable +@subsubsection @code{bfd_make_writable} +@strong{Synopsis} +@example +bfd_boolean bfd_make_writable (bfd *abfd); +@end example +@strong{Description}@* +Takes a BFD as created by @code{bfd_create} and converts it +into one like as returned by @code{bfd_openw}. It does this +by converting the BFD to BFD_IN_MEMORY. It's assumed that +you will call @code{bfd_make_readable} on this bfd later. + +@strong{Returns}@* +@code{TRUE} is returned if all is ok, otherwise @code{FALSE}. + +@findex bfd_make_readable +@subsubsection @code{bfd_make_readable} +@strong{Synopsis} +@example +bfd_boolean bfd_make_readable (bfd *abfd); +@end example +@strong{Description}@* +Takes a BFD as created by @code{bfd_create} and +@code{bfd_make_writable} and converts it into one like as +returned by @code{bfd_openr}. It does this by writing the +contents out to the memory buffer, then reversing the +direction. + +@strong{Returns}@* +@code{TRUE} is returned if all is ok, otherwise @code{FALSE}. + +@findex bfd_alloc +@subsubsection @code{bfd_alloc} +@strong{Synopsis} +@example +void *bfd_alloc (bfd *abfd, bfd_size_type wanted); +@end example +@strong{Description}@* +Allocate a block of @var{wanted} bytes of memory attached to +@code{abfd} and return a pointer to it. + +@findex bfd_alloc2 +@subsubsection @code{bfd_alloc2} +@strong{Synopsis} +@example +void *bfd_alloc2 (bfd *abfd, bfd_size_type nmemb, bfd_size_type size); +@end example +@strong{Description}@* +Allocate a block of @var{nmemb} elements of @var{size} bytes each +of memory attached to @code{abfd} and return a pointer to it. + +@findex bfd_zalloc +@subsubsection @code{bfd_zalloc} +@strong{Synopsis} +@example +void *bfd_zalloc (bfd *abfd, bfd_size_type wanted); +@end example +@strong{Description}@* +Allocate a block of @var{wanted} bytes of zeroed memory +attached to @code{abfd} and return a pointer to it. + +@findex bfd_zalloc2 +@subsubsection @code{bfd_zalloc2} +@strong{Synopsis} +@example +void *bfd_zalloc2 (bfd *abfd, bfd_size_type nmemb, bfd_size_type size); +@end example +@strong{Description}@* +Allocate a block of @var{nmemb} elements of @var{size} bytes each +of zeroed memory attached to @code{abfd} and return a pointer to it. + +@findex bfd_calc_gnu_debuglink_crc32 +@subsubsection @code{bfd_calc_gnu_debuglink_crc32} +@strong{Synopsis} +@example +unsigned long bfd_calc_gnu_debuglink_crc32 + (unsigned long crc, const unsigned char *buf, bfd_size_type len); +@end example +@strong{Description}@* +Computes a CRC value as used in the .gnu_debuglink section. +Advances the previously computed @var{crc} value by computing +and adding in the crc32 for @var{len} bytes of @var{buf}. + +@strong{Returns}@* +Return the updated CRC32 value. + +@findex get_debug_link_info +@subsubsection @code{get_debug_link_info} +@strong{Synopsis} +@example +char *get_debug_link_info (bfd *abfd, unsigned long *crc32_out); +@end example +@strong{Description}@* +fetch the filename and CRC32 value for any separate debuginfo +associated with @var{abfd}. Return NULL if no such info found, +otherwise return filename and update @var{crc32_out}. + +@findex separate_debug_file_exists +@subsubsection @code{separate_debug_file_exists} +@strong{Synopsis} +@example +bfd_boolean separate_debug_file_exists + (char *name, unsigned long crc32); +@end example +@strong{Description}@* +Checks to see if @var{name} is a file and if its contents +match @var{crc32}. + +@findex find_separate_debug_file +@subsubsection @code{find_separate_debug_file} +@strong{Synopsis} +@example +char *find_separate_debug_file (bfd *abfd); +@end example +@strong{Description}@* +Searches @var{abfd} for a reference to separate debugging +information, scans various locations in the filesystem, including +the file tree rooted at @var{debug_file_directory}, and returns a +filename of such debugging information if the file is found and has +matching CRC32. Returns NULL if no reference to debugging file +exists, or file cannot be found. + +@findex bfd_follow_gnu_debuglink +@subsubsection @code{bfd_follow_gnu_debuglink} +@strong{Synopsis} +@example +char *bfd_follow_gnu_debuglink (bfd *abfd, const char *dir); +@end example +@strong{Description}@* +Takes a BFD and searches it for a .gnu_debuglink section. If this +section is found, it examines the section for the name and checksum +of a '.debug' file containing auxiliary debugging information. It +then searches the filesystem for this .debug file in some standard +locations, including the directory tree rooted at @var{dir}, and if +found returns the full filename. + +If @var{dir} is NULL, it will search a default path configured into +libbfd at build time. [XXX this feature is not currently +implemented]. + +@strong{Returns}@* +@code{NULL} on any errors or failure to locate the .debug file, +otherwise a pointer to a heap-allocated string containing the +filename. The caller is responsible for freeing this string. + +@findex bfd_create_gnu_debuglink_section +@subsubsection @code{bfd_create_gnu_debuglink_section} +@strong{Synopsis} +@example +struct bfd_section *bfd_create_gnu_debuglink_section + (bfd *abfd, const char *filename); +@end example +@strong{Description}@* +Takes a @var{BFD} and adds a .gnu_debuglink section to it. The section is sized +to be big enough to contain a link to the specified @var{filename}. + +@strong{Returns}@* +A pointer to the new section is returned if all is ok. Otherwise @code{NULL} is +returned and bfd_error is set. + +@findex bfd_fill_in_gnu_debuglink_section +@subsubsection @code{bfd_fill_in_gnu_debuglink_section} +@strong{Synopsis} +@example +bfd_boolean bfd_fill_in_gnu_debuglink_section + (bfd *abfd, struct bfd_section *sect, const char *filename); +@end example +@strong{Description}@* +Takes a @var{BFD} and containing a .gnu_debuglink section @var{SECT} +and fills in the contents of the section to contain a link to the +specified @var{filename}. The filename should be relative to the +current directory. + +@strong{Returns}@* +@code{TRUE} is returned if all is ok. Otherwise @code{FALSE} is returned +and bfd_error is set. + diff --git a/bfd/doc/reloc.texi b/bfd/doc/reloc.texi new file mode 100644 index 0000000..566a8e0 --- /dev/null +++ b/bfd/doc/reloc.texi @@ -0,0 +1,3200 @@ +@section Relocations +BFD maintains relocations in much the same way it maintains +symbols: they are left alone until required, then read in +en-masse and translated into an internal form. A common +routine @code{bfd_perform_relocation} acts upon the +canonical form to do the fixup. + +Relocations are maintained on a per section basis, +while symbols are maintained on a per BFD basis. + +All that a back end has to do to fit the BFD interface is to create +a @code{struct reloc_cache_entry} for each relocation +in a particular section, and fill in the right bits of the structures. + +@menu +* typedef arelent:: +* howto manager:: +@end menu + + +@node typedef arelent, howto manager, Relocations, Relocations +@subsection typedef arelent +This is the structure of a relocation entry: + + +@example + +typedef enum bfd_reloc_status +@{ + /* No errors detected. */ + bfd_reloc_ok, + + /* The relocation was performed, but there was an overflow. */ + bfd_reloc_overflow, + + /* The address to relocate was not within the section supplied. */ + bfd_reloc_outofrange, + + /* Used by special functions. */ + bfd_reloc_continue, + + /* Unsupported relocation size requested. */ + bfd_reloc_notsupported, + + /* Unused. */ + bfd_reloc_other, + + /* The symbol to relocate against was undefined. */ + bfd_reloc_undefined, + + /* The relocation was performed, but may not be ok - presently + generated only when linking i960 coff files with i960 b.out + symbols. If this type is returned, the error_message argument + to bfd_perform_relocation will be set. */ + bfd_reloc_dangerous + @} + bfd_reloc_status_type; + + +typedef struct reloc_cache_entry +@{ + /* A pointer into the canonical table of pointers. */ + struct bfd_symbol **sym_ptr_ptr; + + /* offset in section. */ + bfd_size_type address; + + /* addend for relocation value. */ + bfd_vma addend; + + /* Pointer to how to perform the required relocation. */ + reloc_howto_type *howto; + +@} +arelent; + +@end example +@strong{Description}@* +Here is a description of each of the fields within an @code{arelent}: + +@itemize @bullet + +@item +@code{sym_ptr_ptr} +@end itemize +The symbol table pointer points to a pointer to the symbol +associated with the relocation request. It is the pointer +into the table returned by the back end's +@code{canonicalize_symtab} action. @xref{Symbols}. The symbol is +referenced through a pointer to a pointer so that tools like +the linker can fix up all the symbols of the same name by +modifying only one pointer. The relocation routine looks in +the symbol and uses the base of the section the symbol is +attached to and the value of the symbol as the initial +relocation offset. If the symbol pointer is zero, then the +section provided is looked up. + +@itemize @bullet + +@item +@code{address} +@end itemize +The @code{address} field gives the offset in bytes from the base of +the section data which owns the relocation record to the first +byte of relocatable information. The actual data relocated +will be relative to this point; for example, a relocation +type which modifies the bottom two bytes of a four byte word +would not touch the first byte pointed to in a big endian +world. + +@itemize @bullet + +@item +@code{addend} +@end itemize +The @code{addend} is a value provided by the back end to be added (!) +to the relocation offset. Its interpretation is dependent upon +the howto. For example, on the 68k the code: + +@example + char foo[]; + main() + @{ + return foo[0x12345678]; + @} +@end example + +Could be compiled into: + +@example + linkw fp,#-4 + moveb @@#12345678,d0 + extbl d0 + unlk fp + rts +@end example + +This could create a reloc pointing to @code{foo}, but leave the +offset in the data, something like: + +@example +RELOCATION RECORDS FOR [.text]: +offset type value +00000006 32 _foo + +00000000 4e56 fffc ; linkw fp,#-4 +00000004 1039 1234 5678 ; moveb @@#12345678,d0 +0000000a 49c0 ; extbl d0 +0000000c 4e5e ; unlk fp +0000000e 4e75 ; rts +@end example + +Using coff and an 88k, some instructions don't have enough +space in them to represent the full address range, and +pointers have to be loaded in two parts. So you'd get something like: + +@example + or.u r13,r0,hi16(_foo+0x12345678) + ld.b r2,r13,lo16(_foo+0x12345678) + jmp r1 +@end example + +This should create two relocs, both pointing to @code{_foo}, and with +0x12340000 in their addend field. The data would consist of: + +@example +RELOCATION RECORDS FOR [.text]: +offset type value +00000002 HVRT16 _foo+0x12340000 +00000006 LVRT16 _foo+0x12340000 + +00000000 5da05678 ; or.u r13,r0,0x5678 +00000004 1c4d5678 ; ld.b r2,r13,0x5678 +00000008 f400c001 ; jmp r1 +@end example + +The relocation routine digs out the value from the data, adds +it to the addend to get the original offset, and then adds the +value of @code{_foo}. Note that all 32 bits have to be kept around +somewhere, to cope with carry from bit 15 to bit 16. + +One further example is the sparc and the a.out format. The +sparc has a similar problem to the 88k, in that some +instructions don't have room for an entire offset, but on the +sparc the parts are created in odd sized lumps. The designers of +the a.out format chose to not use the data within the section +for storing part of the offset; all the offset is kept within +the reloc. Anything in the data should be ignored. + +@example + save %sp,-112,%sp + sethi %hi(_foo+0x12345678),%g2 + ldsb [%g2+%lo(_foo+0x12345678)],%i0 + ret + restore +@end example + +Both relocs contain a pointer to @code{foo}, and the offsets +contain junk. + +@example +RELOCATION RECORDS FOR [.text]: +offset type value +00000004 HI22 _foo+0x12345678 +00000008 LO10 _foo+0x12345678 + +00000000 9de3bf90 ; save %sp,-112,%sp +00000004 05000000 ; sethi %hi(_foo+0),%g2 +00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0 +0000000c 81c7e008 ; ret +00000010 81e80000 ; restore +@end example + +@itemize @bullet + +@item +@code{howto} +@end itemize +The @code{howto} field can be imagined as a +relocation instruction. It is a pointer to a structure which +contains information on what to do with all of the other +information in the reloc record and data section. A back end +would normally have a relocation instruction set and turn +relocations into pointers to the correct structure on input - +but it would be possible to create each howto field on demand. + +@subsubsection @code{enum complain_overflow} +Indicates what sort of overflow checking should be done when +performing a relocation. + + +@example + +enum complain_overflow +@{ + /* Do not complain on overflow. */ + complain_overflow_dont, + + /* Complain if the value overflows when considered as a signed + number one bit larger than the field. ie. A bitfield of N bits + is allowed to represent -2**n to 2**n-1. */ + complain_overflow_bitfield, + + /* Complain if the value overflows when considered as a signed + number. */ + complain_overflow_signed, + + /* Complain if the value overflows when considered as an + unsigned number. */ + complain_overflow_unsigned +@}; +@end example +@subsubsection @code{reloc_howto_type} +The @code{reloc_howto_type} is a structure which contains all the +information that libbfd needs to know to tie up a back end's data. + + +@example +struct bfd_symbol; /* Forward declaration. */ + +struct reloc_howto_struct +@{ + /* The type field has mainly a documentary use - the back end can + do what it wants with it, though normally the back end's + external idea of what a reloc number is stored + in this field. For example, a PC relative word relocation + in a coff environment has the type 023 - because that's + what the outside world calls a R_PCRWORD reloc. */ + unsigned int type; + + /* The value the final relocation is shifted right by. This drops + unwanted data from the relocation. */ + unsigned int rightshift; + + /* The size of the item to be relocated. This is *not* a + power-of-two measure. To get the number of bytes operated + on by a type of relocation, use bfd_get_reloc_size. */ + int size; + + /* The number of bits in the item to be relocated. This is used + when doing overflow checking. */ + unsigned int bitsize; + + /* The relocation is relative to the field being relocated. */ + bfd_boolean pc_relative; + + /* The bit position of the reloc value in the destination. + The relocated value is left shifted by this amount. */ + unsigned int bitpos; + + /* What type of overflow error should be checked for when + relocating. */ + enum complain_overflow complain_on_overflow; + + /* If this field is non null, then the supplied function is + called rather than the normal function. This allows really + strange relocation methods to be accommodated (e.g., i960 callj + instructions). */ + bfd_reloc_status_type (*special_function) + (bfd *, arelent *, struct bfd_symbol *, void *, asection *, + bfd *, char **); + + /* The textual name of the relocation type. */ + char *name; + + /* Some formats record a relocation addend in the section contents + rather than with the relocation. For ELF formats this is the + distinction between USE_REL and USE_RELA (though the code checks + for USE_REL == 1/0). The value of this field is TRUE if the + addend is recorded with the section contents; when performing a + partial link (ld -r) the section contents (the data) will be + modified. The value of this field is FALSE if addends are + recorded with the relocation (in arelent.addend); when performing + a partial link the relocation will be modified. + All relocations for all ELF USE_RELA targets should set this field + to FALSE (values of TRUE should be looked on with suspicion). + However, the converse is not true: not all relocations of all ELF + USE_REL targets set this field to TRUE. Why this is so is peculiar + to each particular target. For relocs that aren't used in partial + links (e.g. GOT stuff) it doesn't matter what this is set to. */ + bfd_boolean partial_inplace; + + /* src_mask selects the part of the instruction (or data) to be used + in the relocation sum. If the target relocations don't have an + addend in the reloc, eg. ELF USE_REL, src_mask will normally equal + dst_mask to extract the addend from the section contents. If + relocations do have an addend in the reloc, eg. ELF USE_RELA, this + field should be zero. Non-zero values for ELF USE_RELA targets are + bogus as in those cases the value in the dst_mask part of the + section contents should be treated as garbage. */ + bfd_vma src_mask; + + /* dst_mask selects which parts of the instruction (or data) are + replaced with a relocated value. */ + bfd_vma dst_mask; + + /* When some formats create PC relative instructions, they leave + the value of the pc of the place being relocated in the offset + slot of the instruction, so that a PC relative relocation can + be made just by adding in an ordinary offset (e.g., sun3 a.out). + Some formats leave the displacement part of an instruction + empty (e.g., m88k bcs); this flag signals the fact. */ + bfd_boolean pcrel_offset; +@}; + +@end example +@findex The HOWTO Macro +@subsubsection @code{The HOWTO Macro} +@strong{Description}@* +The HOWTO define is horrible and will go away. +@example +#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \ + @{ (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC @} +@end example + +@strong{Description}@* +And will be replaced with the totally magic way. But for the +moment, we are compatible, so do it this way. +@example +#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \ + HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \ + NAME, FALSE, 0, 0, IN) + +@end example + +@strong{Description}@* +This is used to fill in an empty howto entry in an array. +@example +#define EMPTY_HOWTO(C) \ + HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \ + NULL, FALSE, 0, 0, FALSE) + +@end example + +@strong{Description}@* +Helper routine to turn a symbol into a relocation value. +@example +#define HOWTO_PREPARE(relocation, symbol) \ + @{ \ + if (symbol != NULL) \ + @{ \ + if (bfd_is_com_section (symbol->section)) \ + @{ \ + relocation = 0; \ + @} \ + else \ + @{ \ + relocation = symbol->value; \ + @} \ + @} \ + @} + +@end example + +@findex bfd_get_reloc_size +@subsubsection @code{bfd_get_reloc_size} +@strong{Synopsis} +@example +unsigned int bfd_get_reloc_size (reloc_howto_type *); +@end example +@strong{Description}@* +For a reloc_howto_type that operates on a fixed number of bytes, +this returns the number of bytes operated on. + +@findex arelent_chain +@subsubsection @code{arelent_chain} +@strong{Description}@* +How relocs are tied together in an @code{asection}: +@example +typedef struct relent_chain +@{ + arelent relent; + struct relent_chain *next; +@} +arelent_chain; + +@end example + +@findex bfd_check_overflow +@subsubsection @code{bfd_check_overflow} +@strong{Synopsis} +@example +bfd_reloc_status_type bfd_check_overflow + (enum complain_overflow how, + unsigned int bitsize, + unsigned int rightshift, + unsigned int addrsize, + bfd_vma relocation); +@end example +@strong{Description}@* +Perform overflow checking on @var{relocation} which has +@var{bitsize} significant bits and will be shifted right by +@var{rightshift} bits, on a machine with addresses containing +@var{addrsize} significant bits. The result is either of +@code{bfd_reloc_ok} or @code{bfd_reloc_overflow}. + +@findex bfd_perform_relocation +@subsubsection @code{bfd_perform_relocation} +@strong{Synopsis} +@example +bfd_reloc_status_type bfd_perform_relocation + (bfd *abfd, + arelent *reloc_entry, + void *data, + asection *input_section, + bfd *output_bfd, + char **error_message); +@end example +@strong{Description}@* +If @var{output_bfd} is supplied to this function, the +generated image will be relocatable; the relocations are +copied to the output file after they have been changed to +reflect the new state of the world. There are two ways of +reflecting the results of partial linkage in an output file: +by modifying the output data in place, and by modifying the +relocation record. Some native formats (e.g., basic a.out and +basic coff) have no way of specifying an addend in the +relocation type, so the addend has to go in the output data. +This is no big deal since in these formats the output data +slot will always be big enough for the addend. Complex reloc +types with addends were invented to solve just this problem. +The @var{error_message} argument is set to an error message if +this return @code{bfd_reloc_dangerous}. + +@findex bfd_install_relocation +@subsubsection @code{bfd_install_relocation} +@strong{Synopsis} +@example +bfd_reloc_status_type bfd_install_relocation + (bfd *abfd, + arelent *reloc_entry, + void *data, bfd_vma data_start, + asection *input_section, + char **error_message); +@end example +@strong{Description}@* +This looks remarkably like @code{bfd_perform_relocation}, except it +does not expect that the section contents have been filled in. +I.e., it's suitable for use when creating, rather than applying +a relocation. + +For now, this function should be considered reserved for the +assembler. + + +@node howto manager, , typedef arelent, Relocations +@subsection The howto manager +When an application wants to create a relocation, but doesn't +know what the target machine might call it, it can find out by +using this bit of code. + +@findex bfd_reloc_code_type +@subsubsection @code{bfd_reloc_code_type} +@strong{Description}@* +The insides of a reloc code. The idea is that, eventually, there +will be one enumerator for every type of relocation we ever do. +Pass one of these values to @code{bfd_reloc_type_lookup}, and it'll +return a howto pointer. + +This does mean that the application must determine the correct +enumerator value; you can't get a howto pointer from a random set +of attributes. + +Here are the possible values for @code{enum bfd_reloc_code_real}: + +@deffn {} BFD_RELOC_64 +@deffnx {} BFD_RELOC_32 +@deffnx {} BFD_RELOC_26 +@deffnx {} BFD_RELOC_24 +@deffnx {} BFD_RELOC_16 +@deffnx {} BFD_RELOC_14 +@deffnx {} BFD_RELOC_8 +Basic absolute relocations of N bits. +@end deffn +@deffn {} BFD_RELOC_64_PCREL +@deffnx {} BFD_RELOC_32_PCREL +@deffnx {} BFD_RELOC_24_PCREL +@deffnx {} BFD_RELOC_16_PCREL +@deffnx {} BFD_RELOC_12_PCREL +@deffnx {} BFD_RELOC_8_PCREL +PC-relative relocations. Sometimes these are relative to the address +of the relocation itself; sometimes they are relative to the start of +the section containing the relocation. It depends on the specific target. + +The 24-bit relocation is used in some Intel 960 configurations. +@end deffn +@deffn {} BFD_RELOC_32_SECREL +Section relative relocations. Some targets need this for DWARF2. +@end deffn +@deffn {} BFD_RELOC_32_GOT_PCREL +@deffnx {} BFD_RELOC_16_GOT_PCREL +@deffnx {} BFD_RELOC_8_GOT_PCREL +@deffnx {} BFD_RELOC_32_GOTOFF +@deffnx {} BFD_RELOC_16_GOTOFF +@deffnx {} BFD_RELOC_LO16_GOTOFF +@deffnx {} BFD_RELOC_HI16_GOTOFF +@deffnx {} BFD_RELOC_HI16_S_GOTOFF +@deffnx {} BFD_RELOC_8_GOTOFF +@deffnx {} BFD_RELOC_64_PLT_PCREL +@deffnx {} BFD_RELOC_32_PLT_PCREL +@deffnx {} BFD_RELOC_24_PLT_PCREL +@deffnx {} BFD_RELOC_16_PLT_PCREL +@deffnx {} BFD_RELOC_8_PLT_PCREL +@deffnx {} BFD_RELOC_64_PLTOFF +@deffnx {} BFD_RELOC_32_PLTOFF +@deffnx {} BFD_RELOC_16_PLTOFF +@deffnx {} BFD_RELOC_LO16_PLTOFF +@deffnx {} BFD_RELOC_HI16_PLTOFF +@deffnx {} BFD_RELOC_HI16_S_PLTOFF +@deffnx {} BFD_RELOC_8_PLTOFF +For ELF. +@end deffn +@deffn {} BFD_RELOC_68K_GLOB_DAT +@deffnx {} BFD_RELOC_68K_JMP_SLOT +@deffnx {} BFD_RELOC_68K_RELATIVE +@deffnx {} BFD_RELOC_68K_TLS_GD32 +@deffnx {} BFD_RELOC_68K_TLS_GD16 +@deffnx {} BFD_RELOC_68K_TLS_GD8 +@deffnx {} BFD_RELOC_68K_TLS_LDM32 +@deffnx {} BFD_RELOC_68K_TLS_LDM16 +@deffnx {} BFD_RELOC_68K_TLS_LDM8 +@deffnx {} BFD_RELOC_68K_TLS_LDO32 +@deffnx {} BFD_RELOC_68K_TLS_LDO16 +@deffnx {} BFD_RELOC_68K_TLS_LDO8 +@deffnx {} BFD_RELOC_68K_TLS_IE32 +@deffnx {} BFD_RELOC_68K_TLS_IE16 +@deffnx {} BFD_RELOC_68K_TLS_IE8 +@deffnx {} BFD_RELOC_68K_TLS_LE32 +@deffnx {} BFD_RELOC_68K_TLS_LE16 +@deffnx {} BFD_RELOC_68K_TLS_LE8 +Relocations used by 68K ELF. +@end deffn +@deffn {} BFD_RELOC_32_BASEREL +@deffnx {} BFD_RELOC_16_BASEREL +@deffnx {} BFD_RELOC_LO16_BASEREL +@deffnx {} BFD_RELOC_HI16_BASEREL +@deffnx {} BFD_RELOC_HI16_S_BASEREL +@deffnx {} BFD_RELOC_8_BASEREL +@deffnx {} BFD_RELOC_RVA +Linkage-table relative. +@end deffn +@deffn {} BFD_RELOC_8_FFnn +Absolute 8-bit relocation, but used to form an address like 0xFFnn. +@end deffn +@deffn {} BFD_RELOC_32_PCREL_S2 +@deffnx {} BFD_RELOC_16_PCREL_S2 +@deffnx {} BFD_RELOC_23_PCREL_S2 +These PC-relative relocations are stored as word displacements -- +i.e., byte displacements shifted right two bits. The 30-bit word +displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the +SPARC. (SPARC tools generally refer to this as <>.) The +signed 16-bit displacement is used on the MIPS, and the 23-bit +displacement is used on the Alpha. +@end deffn +@deffn {} BFD_RELOC_HI22 +@deffnx {} BFD_RELOC_LO10 +High 22 bits and low 10 bits of 32-bit value, placed into lower bits of +the target word. These are used on the SPARC. +@end deffn +@deffn {} BFD_RELOC_GPREL16 +@deffnx {} BFD_RELOC_GPREL32 +For systems that allocate a Global Pointer register, these are +displacements off that register. These relocation types are +handled specially, because the value the register will have is +decided relatively late. +@end deffn +@deffn {} BFD_RELOC_I960_CALLJ +Reloc types used for i960/b.out. +@end deffn +@deffn {} BFD_RELOC_NONE +@deffnx {} BFD_RELOC_SPARC_WDISP22 +@deffnx {} BFD_RELOC_SPARC22 +@deffnx {} BFD_RELOC_SPARC13 +@deffnx {} BFD_RELOC_SPARC_GOT10 +@deffnx {} BFD_RELOC_SPARC_GOT13 +@deffnx {} BFD_RELOC_SPARC_GOT22 +@deffnx {} BFD_RELOC_SPARC_PC10 +@deffnx {} BFD_RELOC_SPARC_PC22 +@deffnx {} BFD_RELOC_SPARC_WPLT30 +@deffnx {} BFD_RELOC_SPARC_COPY +@deffnx {} BFD_RELOC_SPARC_GLOB_DAT +@deffnx {} BFD_RELOC_SPARC_JMP_SLOT +@deffnx {} BFD_RELOC_SPARC_RELATIVE +@deffnx {} BFD_RELOC_SPARC_UA16 +@deffnx {} BFD_RELOC_SPARC_UA32 +@deffnx {} BFD_RELOC_SPARC_UA64 +@deffnx {} BFD_RELOC_SPARC_GOTDATA_HIX22 +@deffnx {} BFD_RELOC_SPARC_GOTDATA_LOX10 +@deffnx {} BFD_RELOC_SPARC_GOTDATA_OP_HIX22 +@deffnx {} BFD_RELOC_SPARC_GOTDATA_OP_LOX10 +@deffnx {} BFD_RELOC_SPARC_GOTDATA_OP +@deffnx {} BFD_RELOC_SPARC_JMP_IREL +@deffnx {} BFD_RELOC_SPARC_IRELATIVE +SPARC ELF relocations. There is probably some overlap with other +relocation types already defined. +@end deffn +@deffn {} BFD_RELOC_SPARC_BASE13 +@deffnx {} BFD_RELOC_SPARC_BASE22 +I think these are specific to SPARC a.out (e.g., Sun 4). +@end deffn +@deffn {} BFD_RELOC_SPARC_64 +@deffnx {} BFD_RELOC_SPARC_10 +@deffnx {} BFD_RELOC_SPARC_11 +@deffnx {} BFD_RELOC_SPARC_OLO10 +@deffnx {} BFD_RELOC_SPARC_HH22 +@deffnx {} BFD_RELOC_SPARC_HM10 +@deffnx {} BFD_RELOC_SPARC_LM22 +@deffnx {} BFD_RELOC_SPARC_PC_HH22 +@deffnx {} BFD_RELOC_SPARC_PC_HM10 +@deffnx {} BFD_RELOC_SPARC_PC_LM22 +@deffnx {} BFD_RELOC_SPARC_WDISP16 +@deffnx {} BFD_RELOC_SPARC_WDISP19 +@deffnx {} BFD_RELOC_SPARC_7 +@deffnx {} BFD_RELOC_SPARC_6 +@deffnx {} BFD_RELOC_SPARC_5 +@deffnx {} BFD_RELOC_SPARC_DISP64 +@deffnx {} BFD_RELOC_SPARC_PLT32 +@deffnx {} BFD_RELOC_SPARC_PLT64 +@deffnx {} BFD_RELOC_SPARC_HIX22 +@deffnx {} BFD_RELOC_SPARC_LOX10 +@deffnx {} BFD_RELOC_SPARC_H44 +@deffnx {} BFD_RELOC_SPARC_M44 +@deffnx {} BFD_RELOC_SPARC_L44 +@deffnx {} BFD_RELOC_SPARC_REGISTER +SPARC64 relocations +@end deffn +@deffn {} BFD_RELOC_SPARC_REV32 +SPARC little endian relocation +@end deffn +@deffn {} BFD_RELOC_SPARC_TLS_GD_HI22 +@deffnx {} BFD_RELOC_SPARC_TLS_GD_LO10 +@deffnx {} BFD_RELOC_SPARC_TLS_GD_ADD +@deffnx {} BFD_RELOC_SPARC_TLS_GD_CALL +@deffnx {} BFD_RELOC_SPARC_TLS_LDM_HI22 +@deffnx {} BFD_RELOC_SPARC_TLS_LDM_LO10 +@deffnx {} BFD_RELOC_SPARC_TLS_LDM_ADD +@deffnx {} BFD_RELOC_SPARC_TLS_LDM_CALL +@deffnx {} BFD_RELOC_SPARC_TLS_LDO_HIX22 +@deffnx {} BFD_RELOC_SPARC_TLS_LDO_LOX10 +@deffnx {} BFD_RELOC_SPARC_TLS_LDO_ADD +@deffnx {} BFD_RELOC_SPARC_TLS_IE_HI22 +@deffnx {} BFD_RELOC_SPARC_TLS_IE_LO10 +@deffnx {} BFD_RELOC_SPARC_TLS_IE_LD +@deffnx {} BFD_RELOC_SPARC_TLS_IE_LDX +@deffnx {} BFD_RELOC_SPARC_TLS_IE_ADD +@deffnx {} BFD_RELOC_SPARC_TLS_LE_HIX22 +@deffnx {} BFD_RELOC_SPARC_TLS_LE_LOX10 +@deffnx {} BFD_RELOC_SPARC_TLS_DTPMOD32 +@deffnx {} BFD_RELOC_SPARC_TLS_DTPMOD64 +@deffnx {} BFD_RELOC_SPARC_TLS_DTPOFF32 +@deffnx {} BFD_RELOC_SPARC_TLS_DTPOFF64 +@deffnx {} BFD_RELOC_SPARC_TLS_TPOFF32 +@deffnx {} BFD_RELOC_SPARC_TLS_TPOFF64 +SPARC TLS relocations +@end deffn +@deffn {} BFD_RELOC_SPU_IMM7 +@deffnx {} BFD_RELOC_SPU_IMM8 +@deffnx {} BFD_RELOC_SPU_IMM10 +@deffnx {} BFD_RELOC_SPU_IMM10W +@deffnx {} BFD_RELOC_SPU_IMM16 +@deffnx {} BFD_RELOC_SPU_IMM16W +@deffnx {} BFD_RELOC_SPU_IMM18 +@deffnx {} BFD_RELOC_SPU_PCREL9a +@deffnx {} BFD_RELOC_SPU_PCREL9b +@deffnx {} BFD_RELOC_SPU_PCREL16 +@deffnx {} BFD_RELOC_SPU_LO16 +@deffnx {} BFD_RELOC_SPU_HI16 +@deffnx {} BFD_RELOC_SPU_PPU32 +@deffnx {} BFD_RELOC_SPU_PPU64 +@deffnx {} BFD_RELOC_SPU_ADD_PIC +SPU Relocations. +@end deffn +@deffn {} BFD_RELOC_ALPHA_GPDISP_HI16 +Alpha ECOFF and ELF relocations. Some of these treat the symbol or +"addend" in some special way. +For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when +writing; when reading, it will be the absolute section symbol. The +addend is the displacement in bytes of the "lda" instruction from +the "ldah" instruction (which is at the address of this reloc). +@end deffn +@deffn {} BFD_RELOC_ALPHA_GPDISP_LO16 +For GPDISP_LO16 ("ignore") relocations, the symbol is handled as +with GPDISP_HI16 relocs. The addend is ignored when writing the +relocations out, and is filled in with the file's GP value on +reading, for convenience. +@end deffn +@deffn {} BFD_RELOC_ALPHA_GPDISP +The ELF GPDISP relocation is exactly the same as the GPDISP_HI16 +relocation except that there is no accompanying GPDISP_LO16 +relocation. +@end deffn +@deffn {} BFD_RELOC_ALPHA_LITERAL +@deffnx {} BFD_RELOC_ALPHA_ELF_LITERAL +@deffnx {} BFD_RELOC_ALPHA_LITUSE +The Alpha LITERAL/LITUSE relocs are produced by a symbol reference; +the assembler turns it into a LDQ instruction to load the address of +the symbol, and then fills in a register in the real instruction. + +The LITERAL reloc, at the LDQ instruction, refers to the .lita +section symbol. The addend is ignored when writing, but is filled +in with the file's GP value on reading, for convenience, as with the +GPDISP_LO16 reloc. + +The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16. +It should refer to the symbol to be referenced, as with 16_GOTOFF, +but it generates output not based on the position within the .got +section, but relative to the GP value chosen for the file during the +final link stage. + +The LITUSE reloc, on the instruction using the loaded address, gives +information to the linker that it might be able to use to optimize +away some literal section references. The symbol is ignored (read +as the absolute section symbol), and the "addend" indicates the type +of instruction using the register: +1 - "memory" fmt insn +2 - byte-manipulation (byte offset reg) +3 - jsr (target of branch) +@end deffn +@deffn {} BFD_RELOC_ALPHA_HINT +The HINT relocation indicates a value that should be filled into the +"hint" field of a jmp/jsr/ret instruction, for possible branch- +prediction logic which may be provided on some processors. +@end deffn +@deffn {} BFD_RELOC_ALPHA_LINKAGE +The LINKAGE relocation outputs a linkage pair in the object file, +which is filled by the linker. +@end deffn +@deffn {} BFD_RELOC_ALPHA_CODEADDR +The CODEADDR relocation outputs a STO_CA in the object file, +which is filled by the linker. +@end deffn +@deffn {} BFD_RELOC_ALPHA_GPREL_HI16 +@deffnx {} BFD_RELOC_ALPHA_GPREL_LO16 +The GPREL_HI/LO relocations together form a 32-bit offset from the +GP register. +@end deffn +@deffn {} BFD_RELOC_ALPHA_BRSGP +Like BFD_RELOC_23_PCREL_S2, except that the source and target must +share a common GP, and the target address is adjusted for +STO_ALPHA_STD_GPLOAD. +@end deffn +@deffn {} BFD_RELOC_ALPHA_NOP +The NOP relocation outputs a NOP if the longword displacement +between two procedure entry points is < 2^21. +@end deffn +@deffn {} BFD_RELOC_ALPHA_BSR +The BSR relocation outputs a BSR if the longword displacement +between two procedure entry points is < 2^21. +@end deffn +@deffn {} BFD_RELOC_ALPHA_LDA +The LDA relocation outputs a LDA if the longword displacement +between two procedure entry points is < 2^16. +@end deffn +@deffn {} BFD_RELOC_ALPHA_BOH +The BOH relocation outputs a BSR if the longword displacement +between two procedure entry points is < 2^21, or else a hint. +@end deffn +@deffn {} BFD_RELOC_ALPHA_TLSGD +@deffnx {} BFD_RELOC_ALPHA_TLSLDM +@deffnx {} BFD_RELOC_ALPHA_DTPMOD64 +@deffnx {} BFD_RELOC_ALPHA_GOTDTPREL16 +@deffnx {} BFD_RELOC_ALPHA_DTPREL64 +@deffnx {} BFD_RELOC_ALPHA_DTPREL_HI16 +@deffnx {} BFD_RELOC_ALPHA_DTPREL_LO16 +@deffnx {} BFD_RELOC_ALPHA_DTPREL16 +@deffnx {} BFD_RELOC_ALPHA_GOTTPREL16 +@deffnx {} BFD_RELOC_ALPHA_TPREL64 +@deffnx {} BFD_RELOC_ALPHA_TPREL_HI16 +@deffnx {} BFD_RELOC_ALPHA_TPREL_LO16 +@deffnx {} BFD_RELOC_ALPHA_TPREL16 +Alpha thread-local storage relocations. +@end deffn +@deffn {} BFD_RELOC_MIPS_JMP +@deffnx {} BFD_RELOC_MICROMIPS_JMP +The MIPS jump instruction. +@end deffn +@deffn {} BFD_RELOC_MIPS16_JMP +The MIPS16 jump instruction. +@end deffn +@deffn {} BFD_RELOC_MIPS16_GPREL +MIPS16 GP relative reloc. +@end deffn +@deffn {} BFD_RELOC_HI16 +High 16 bits of 32-bit value; simple reloc. +@end deffn +@deffn {} BFD_RELOC_HI16_S +High 16 bits of 32-bit value but the low 16 bits will be sign +extended and added to form the final result. If the low 16 +bits form a negative number, we need to add one to the high value +to compensate for the borrow when the low bits are added. +@end deffn +@deffn {} BFD_RELOC_LO16 +Low 16 bits. +@end deffn +@deffn {} BFD_RELOC_HI16_PCREL +High 16 bits of 32-bit pc-relative value +@end deffn +@deffn {} BFD_RELOC_HI16_S_PCREL +High 16 bits of 32-bit pc-relative value, adjusted +@end deffn +@deffn {} BFD_RELOC_LO16_PCREL +Low 16 bits of pc-relative value +@end deffn +@deffn {} BFD_RELOC_MIPS16_GOT16 +@deffnx {} BFD_RELOC_MIPS16_CALL16 +Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of +16-bit immediate fields +@end deffn +@deffn {} BFD_RELOC_MIPS16_HI16 +MIPS16 high 16 bits of 32-bit value. +@end deffn +@deffn {} BFD_RELOC_MIPS16_HI16_S +MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign +extended and added to form the final result. If the low 16 +bits form a negative number, we need to add one to the high value +to compensate for the borrow when the low bits are added. +@end deffn +@deffn {} BFD_RELOC_MIPS16_LO16 +MIPS16 low 16 bits. +@end deffn +@deffn {} BFD_RELOC_MIPS_LITERAL +@deffnx {} BFD_RELOC_MICROMIPS_LITERAL +Relocation against a MIPS literal section. +@end deffn +@deffn {} BFD_RELOC_MICROMIPS_7_PCREL_S1 +@deffnx {} BFD_RELOC_MICROMIPS_10_PCREL_S1 +@deffnx {} BFD_RELOC_MICROMIPS_16_PCREL_S1 +microMIPS PC-relative relocations. +@end deffn +@deffn {} BFD_RELOC_MICROMIPS_GPREL16 +@deffnx {} BFD_RELOC_MICROMIPS_HI16 +@deffnx {} BFD_RELOC_MICROMIPS_HI16_S +@deffnx {} BFD_RELOC_MICROMIPS_LO16 +microMIPS versions of generic BFD relocs. +@end deffn +@deffn {} BFD_RELOC_MIPS_GOT16 +@deffnx {} BFD_RELOC_MICROMIPS_GOT16 +@deffnx {} BFD_RELOC_MIPS_CALL16 +@deffnx {} BFD_RELOC_MICROMIPS_CALL16 +@deffnx {} BFD_RELOC_MIPS_GOT_HI16 +@deffnx {} BFD_RELOC_MICROMIPS_GOT_HI16 +@deffnx {} BFD_RELOC_MIPS_GOT_LO16 +@deffnx {} BFD_RELOC_MICROMIPS_GOT_LO16 +@deffnx {} BFD_RELOC_MIPS_CALL_HI16 +@deffnx {} BFD_RELOC_MICROMIPS_CALL_HI16 +@deffnx {} BFD_RELOC_MIPS_CALL_LO16 +@deffnx {} BFD_RELOC_MICROMIPS_CALL_LO16 +@deffnx {} BFD_RELOC_MIPS_SUB +@deffnx {} BFD_RELOC_MICROMIPS_SUB +@deffnx {} BFD_RELOC_MIPS_GOT_PAGE +@deffnx {} BFD_RELOC_MICROMIPS_GOT_PAGE +@deffnx {} BFD_RELOC_MIPS_GOT_OFST +@deffnx {} BFD_RELOC_MICROMIPS_GOT_OFST +@deffnx {} BFD_RELOC_MIPS_GOT_DISP +@deffnx {} BFD_RELOC_MICROMIPS_GOT_DISP +@deffnx {} BFD_RELOC_MIPS_SHIFT5 +@deffnx {} BFD_RELOC_MIPS_SHIFT6 +@deffnx {} BFD_RELOC_MIPS_INSERT_A +@deffnx {} BFD_RELOC_MIPS_INSERT_B +@deffnx {} BFD_RELOC_MIPS_DELETE +@deffnx {} BFD_RELOC_MIPS_HIGHEST +@deffnx {} BFD_RELOC_MICROMIPS_HIGHEST +@deffnx {} BFD_RELOC_MIPS_HIGHER +@deffnx {} BFD_RELOC_MICROMIPS_HIGHER +@deffnx {} BFD_RELOC_MIPS_SCN_DISP +@deffnx {} BFD_RELOC_MICROMIPS_SCN_DISP +@deffnx {} BFD_RELOC_MIPS_REL16 +@deffnx {} BFD_RELOC_MIPS_RELGOT +@deffnx {} BFD_RELOC_MIPS_JALR +@deffnx {} BFD_RELOC_MICROMIPS_JALR +@deffnx {} BFD_RELOC_MIPS_TLS_DTPMOD32 +@deffnx {} BFD_RELOC_MIPS_TLS_DTPREL32 +@deffnx {} BFD_RELOC_MIPS_TLS_DTPMOD64 +@deffnx {} BFD_RELOC_MIPS_TLS_DTPREL64 +@deffnx {} BFD_RELOC_MIPS_TLS_GD +@deffnx {} BFD_RELOC_MICROMIPS_TLS_GD +@deffnx {} BFD_RELOC_MIPS_TLS_LDM +@deffnx {} BFD_RELOC_MICROMIPS_TLS_LDM +@deffnx {} BFD_RELOC_MIPS_TLS_DTPREL_HI16 +@deffnx {} BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16 +@deffnx {} BFD_RELOC_MIPS_TLS_DTPREL_LO16 +@deffnx {} BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16 +@deffnx {} BFD_RELOC_MIPS_TLS_GOTTPREL +@deffnx {} BFD_RELOC_MICROMIPS_TLS_GOTTPREL +@deffnx {} BFD_RELOC_MIPS_TLS_TPREL32 +@deffnx {} BFD_RELOC_MIPS_TLS_TPREL64 +@deffnx {} BFD_RELOC_MIPS_TLS_TPREL_HI16 +@deffnx {} BFD_RELOC_MICROMIPS_TLS_TPREL_HI16 +@deffnx {} BFD_RELOC_MIPS_TLS_TPREL_LO16 +@deffnx {} BFD_RELOC_MICROMIPS_TLS_TPREL_LO16 +MIPS ELF relocations. +@end deffn +@deffn {} BFD_RELOC_MIPS_COPY +@deffnx {} BFD_RELOC_MIPS_JUMP_SLOT +MIPS ELF relocations (VxWorks and PLT extensions). +@end deffn +@deffn {} BFD_RELOC_MOXIE_10_PCREL +Moxie ELF relocations. +@end deffn +@deffn {} BFD_RELOC_FRV_LABEL16 +@deffnx {} BFD_RELOC_FRV_LABEL24 +@deffnx {} BFD_RELOC_FRV_LO16 +@deffnx {} BFD_RELOC_FRV_HI16 +@deffnx {} BFD_RELOC_FRV_GPREL12 +@deffnx {} BFD_RELOC_FRV_GPRELU12 +@deffnx {} BFD_RELOC_FRV_GPREL32 +@deffnx {} BFD_RELOC_FRV_GPRELHI +@deffnx {} BFD_RELOC_FRV_GPRELLO +@deffnx {} BFD_RELOC_FRV_GOT12 +@deffnx {} BFD_RELOC_FRV_GOTHI +@deffnx {} BFD_RELOC_FRV_GOTLO +@deffnx {} BFD_RELOC_FRV_FUNCDESC +@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOT12 +@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTHI +@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTLO +@deffnx {} BFD_RELOC_FRV_FUNCDESC_VALUE +@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTOFF12 +@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTOFFHI +@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTOFFLO +@deffnx {} BFD_RELOC_FRV_GOTOFF12 +@deffnx {} BFD_RELOC_FRV_GOTOFFHI +@deffnx {} BFD_RELOC_FRV_GOTOFFLO +@deffnx {} BFD_RELOC_FRV_GETTLSOFF +@deffnx {} BFD_RELOC_FRV_TLSDESC_VALUE +@deffnx {} BFD_RELOC_FRV_GOTTLSDESC12 +@deffnx {} BFD_RELOC_FRV_GOTTLSDESCHI +@deffnx {} BFD_RELOC_FRV_GOTTLSDESCLO +@deffnx {} BFD_RELOC_FRV_TLSMOFF12 +@deffnx {} BFD_RELOC_FRV_TLSMOFFHI +@deffnx {} BFD_RELOC_FRV_TLSMOFFLO +@deffnx {} BFD_RELOC_FRV_GOTTLSOFF12 +@deffnx {} BFD_RELOC_FRV_GOTTLSOFFHI +@deffnx {} BFD_RELOC_FRV_GOTTLSOFFLO +@deffnx {} BFD_RELOC_FRV_TLSOFF +@deffnx {} BFD_RELOC_FRV_TLSDESC_RELAX +@deffnx {} BFD_RELOC_FRV_GETTLSOFF_RELAX +@deffnx {} BFD_RELOC_FRV_TLSOFF_RELAX +@deffnx {} BFD_RELOC_FRV_TLSMOFF +Fujitsu Frv Relocations. +@end deffn +@deffn {} BFD_RELOC_MN10300_GOTOFF24 +This is a 24bit GOT-relative reloc for the mn10300. +@end deffn +@deffn {} BFD_RELOC_MN10300_GOT32 +This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes +in the instruction. +@end deffn +@deffn {} BFD_RELOC_MN10300_GOT24 +This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes +in the instruction. +@end deffn +@deffn {} BFD_RELOC_MN10300_GOT16 +This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes +in the instruction. +@end deffn +@deffn {} BFD_RELOC_MN10300_COPY +Copy symbol at runtime. +@end deffn +@deffn {} BFD_RELOC_MN10300_GLOB_DAT +Create GOT entry. +@end deffn +@deffn {} BFD_RELOC_MN10300_JMP_SLOT +Create PLT entry. +@end deffn +@deffn {} BFD_RELOC_MN10300_RELATIVE +Adjust by program base. +@end deffn +@deffn {} BFD_RELOC_MN10300_SYM_DIFF +Together with another reloc targeted at the same location, +allows for a value that is the difference of two symbols +in the same section. +@end deffn +@deffn {} BFD_RELOC_MN10300_ALIGN +The addend of this reloc is an alignment power that must +be honoured at the offset's location, regardless of linker +relaxation. +@end deffn +@deffn {} BFD_RELOC_386_GOT32 +@deffnx {} BFD_RELOC_386_PLT32 +@deffnx {} BFD_RELOC_386_COPY +@deffnx {} BFD_RELOC_386_GLOB_DAT +@deffnx {} BFD_RELOC_386_JUMP_SLOT +@deffnx {} BFD_RELOC_386_RELATIVE +@deffnx {} BFD_RELOC_386_GOTOFF +@deffnx {} BFD_RELOC_386_GOTPC +@deffnx {} BFD_RELOC_386_TLS_TPOFF +@deffnx {} BFD_RELOC_386_TLS_IE +@deffnx {} BFD_RELOC_386_TLS_GOTIE +@deffnx {} BFD_RELOC_386_TLS_LE +@deffnx {} BFD_RELOC_386_TLS_GD +@deffnx {} BFD_RELOC_386_TLS_LDM +@deffnx {} BFD_RELOC_386_TLS_LDO_32 +@deffnx {} BFD_RELOC_386_TLS_IE_32 +@deffnx {} BFD_RELOC_386_TLS_LE_32 +@deffnx {} BFD_RELOC_386_TLS_DTPMOD32 +@deffnx {} BFD_RELOC_386_TLS_DTPOFF32 +@deffnx {} BFD_RELOC_386_TLS_TPOFF32 +@deffnx {} BFD_RELOC_386_TLS_GOTDESC +@deffnx {} BFD_RELOC_386_TLS_DESC_CALL +@deffnx {} BFD_RELOC_386_TLS_DESC +@deffnx {} BFD_RELOC_386_IRELATIVE +i386/elf relocations +@end deffn +@deffn {} BFD_RELOC_X86_64_GOT32 +@deffnx {} BFD_RELOC_X86_64_PLT32 +@deffnx {} BFD_RELOC_X86_64_COPY +@deffnx {} BFD_RELOC_X86_64_GLOB_DAT +@deffnx {} BFD_RELOC_X86_64_JUMP_SLOT +@deffnx {} BFD_RELOC_X86_64_RELATIVE +@deffnx {} BFD_RELOC_X86_64_GOTPCREL +@deffnx {} BFD_RELOC_X86_64_32S +@deffnx {} BFD_RELOC_X86_64_DTPMOD64 +@deffnx {} BFD_RELOC_X86_64_DTPOFF64 +@deffnx {} BFD_RELOC_X86_64_TPOFF64 +@deffnx {} BFD_RELOC_X86_64_TLSGD +@deffnx {} BFD_RELOC_X86_64_TLSLD +@deffnx {} BFD_RELOC_X86_64_DTPOFF32 +@deffnx {} BFD_RELOC_X86_64_GOTTPOFF +@deffnx {} BFD_RELOC_X86_64_TPOFF32 +@deffnx {} BFD_RELOC_X86_64_GOTOFF64 +@deffnx {} BFD_RELOC_X86_64_GOTPC32 +@deffnx {} BFD_RELOC_X86_64_GOT64 +@deffnx {} BFD_RELOC_X86_64_GOTPCREL64 +@deffnx {} BFD_RELOC_X86_64_GOTPC64 +@deffnx {} BFD_RELOC_X86_64_GOTPLT64 +@deffnx {} BFD_RELOC_X86_64_PLTOFF64 +@deffnx {} BFD_RELOC_X86_64_GOTPC32_TLSDESC +@deffnx {} BFD_RELOC_X86_64_TLSDESC_CALL +@deffnx {} BFD_RELOC_X86_64_TLSDESC +@deffnx {} BFD_RELOC_X86_64_IRELATIVE +x86-64/elf relocations +@end deffn +@deffn {} BFD_RELOC_NS32K_IMM_8 +@deffnx {} BFD_RELOC_NS32K_IMM_16 +@deffnx {} BFD_RELOC_NS32K_IMM_32 +@deffnx {} BFD_RELOC_NS32K_IMM_8_PCREL +@deffnx {} BFD_RELOC_NS32K_IMM_16_PCREL +@deffnx {} BFD_RELOC_NS32K_IMM_32_PCREL +@deffnx {} BFD_RELOC_NS32K_DISP_8 +@deffnx {} BFD_RELOC_NS32K_DISP_16 +@deffnx {} BFD_RELOC_NS32K_DISP_32 +@deffnx {} BFD_RELOC_NS32K_DISP_8_PCREL +@deffnx {} BFD_RELOC_NS32K_DISP_16_PCREL +@deffnx {} BFD_RELOC_NS32K_DISP_32_PCREL +ns32k relocations +@end deffn +@deffn {} BFD_RELOC_PDP11_DISP_8_PCREL +@deffnx {} BFD_RELOC_PDP11_DISP_6_PCREL +PDP11 relocations +@end deffn +@deffn {} BFD_RELOC_PJ_CODE_HI16 +@deffnx {} BFD_RELOC_PJ_CODE_LO16 +@deffnx {} BFD_RELOC_PJ_CODE_DIR16 +@deffnx {} BFD_RELOC_PJ_CODE_DIR32 +@deffnx {} BFD_RELOC_PJ_CODE_REL16 +@deffnx {} BFD_RELOC_PJ_CODE_REL32 +Picojava relocs. Not all of these appear in object files. +@end deffn +@deffn {} BFD_RELOC_PPC_B26 +@deffnx {} BFD_RELOC_PPC_BA26 +@deffnx {} BFD_RELOC_PPC_TOC16 +@deffnx {} BFD_RELOC_PPC_B16 +@deffnx {} BFD_RELOC_PPC_B16_BRTAKEN +@deffnx {} BFD_RELOC_PPC_B16_BRNTAKEN +@deffnx {} BFD_RELOC_PPC_BA16 +@deffnx {} BFD_RELOC_PPC_BA16_BRTAKEN +@deffnx {} BFD_RELOC_PPC_BA16_BRNTAKEN +@deffnx {} BFD_RELOC_PPC_COPY +@deffnx {} BFD_RELOC_PPC_GLOB_DAT +@deffnx {} BFD_RELOC_PPC_JMP_SLOT +@deffnx {} BFD_RELOC_PPC_RELATIVE +@deffnx {} BFD_RELOC_PPC_LOCAL24PC +@deffnx {} BFD_RELOC_PPC_EMB_NADDR32 +@deffnx {} BFD_RELOC_PPC_EMB_NADDR16 +@deffnx {} BFD_RELOC_PPC_EMB_NADDR16_LO +@deffnx {} BFD_RELOC_PPC_EMB_NADDR16_HI +@deffnx {} BFD_RELOC_PPC_EMB_NADDR16_HA +@deffnx {} BFD_RELOC_PPC_EMB_SDAI16 +@deffnx {} BFD_RELOC_PPC_EMB_SDA2I16 +@deffnx {} BFD_RELOC_PPC_EMB_SDA2REL +@deffnx {} BFD_RELOC_PPC_EMB_SDA21 +@deffnx {} BFD_RELOC_PPC_EMB_MRKREF +@deffnx {} BFD_RELOC_PPC_EMB_RELSEC16 +@deffnx {} BFD_RELOC_PPC_EMB_RELST_LO +@deffnx {} BFD_RELOC_PPC_EMB_RELST_HI +@deffnx {} BFD_RELOC_PPC_EMB_RELST_HA +@deffnx {} BFD_RELOC_PPC_EMB_BIT_FLD +@deffnx {} BFD_RELOC_PPC_EMB_RELSDA +@deffnx {} BFD_RELOC_PPC64_HIGHER +@deffnx {} BFD_RELOC_PPC64_HIGHER_S +@deffnx {} BFD_RELOC_PPC64_HIGHEST +@deffnx {} BFD_RELOC_PPC64_HIGHEST_S +@deffnx {} BFD_RELOC_PPC64_TOC16_LO +@deffnx {} BFD_RELOC_PPC64_TOC16_HI +@deffnx {} BFD_RELOC_PPC64_TOC16_HA +@deffnx {} BFD_RELOC_PPC64_TOC +@deffnx {} BFD_RELOC_PPC64_PLTGOT16 +@deffnx {} BFD_RELOC_PPC64_PLTGOT16_LO +@deffnx {} BFD_RELOC_PPC64_PLTGOT16_HI +@deffnx {} BFD_RELOC_PPC64_PLTGOT16_HA +@deffnx {} BFD_RELOC_PPC64_ADDR16_DS +@deffnx {} BFD_RELOC_PPC64_ADDR16_LO_DS +@deffnx {} BFD_RELOC_PPC64_GOT16_DS +@deffnx {} BFD_RELOC_PPC64_GOT16_LO_DS +@deffnx {} BFD_RELOC_PPC64_PLT16_LO_DS +@deffnx {} BFD_RELOC_PPC64_SECTOFF_DS +@deffnx {} BFD_RELOC_PPC64_SECTOFF_LO_DS +@deffnx {} BFD_RELOC_PPC64_TOC16_DS +@deffnx {} BFD_RELOC_PPC64_TOC16_LO_DS +@deffnx {} BFD_RELOC_PPC64_PLTGOT16_DS +@deffnx {} BFD_RELOC_PPC64_PLTGOT16_LO_DS +Power(rs6000) and PowerPC relocations. +@end deffn +@deffn {} BFD_RELOC_PPC_TLS +@deffnx {} BFD_RELOC_PPC_TLSGD +@deffnx {} BFD_RELOC_PPC_TLSLD +@deffnx {} BFD_RELOC_PPC_DTPMOD +@deffnx {} BFD_RELOC_PPC_TPREL16 +@deffnx {} BFD_RELOC_PPC_TPREL16_LO +@deffnx {} BFD_RELOC_PPC_TPREL16_HI +@deffnx {} BFD_RELOC_PPC_TPREL16_HA +@deffnx {} BFD_RELOC_PPC_TPREL +@deffnx {} BFD_RELOC_PPC_DTPREL16 +@deffnx {} BFD_RELOC_PPC_DTPREL16_LO +@deffnx {} BFD_RELOC_PPC_DTPREL16_HI +@deffnx {} BFD_RELOC_PPC_DTPREL16_HA +@deffnx {} BFD_RELOC_PPC_DTPREL +@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16 +@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16_LO +@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16_HI +@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16_HA +@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16 +@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16_LO +@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16_HI +@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16_HA +@deffnx {} BFD_RELOC_PPC_GOT_TPREL16 +@deffnx {} BFD_RELOC_PPC_GOT_TPREL16_LO +@deffnx {} BFD_RELOC_PPC_GOT_TPREL16_HI +@deffnx {} BFD_RELOC_PPC_GOT_TPREL16_HA +@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16 +@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16_LO +@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16_HI +@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16_HA +@deffnx {} BFD_RELOC_PPC64_TPREL16_DS +@deffnx {} BFD_RELOC_PPC64_TPREL16_LO_DS +@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHER +@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHERA +@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHEST +@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHESTA +@deffnx {} BFD_RELOC_PPC64_DTPREL16_DS +@deffnx {} BFD_RELOC_PPC64_DTPREL16_LO_DS +@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHER +@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHERA +@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHEST +@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHESTA +PowerPC and PowerPC64 thread-local storage relocations. +@end deffn +@deffn {} BFD_RELOC_I370_D12 +IBM 370/390 relocations +@end deffn +@deffn {} BFD_RELOC_CTOR +The type of reloc used to build a constructor table - at the moment +probably a 32 bit wide absolute relocation, but the target can choose. +It generally does map to one of the other relocation types. +@end deffn +@deffn {} BFD_RELOC_ARM_PCREL_BRANCH +ARM 26 bit pc-relative branch. The lowest two bits must be zero and are +not stored in the instruction. +@end deffn +@deffn {} BFD_RELOC_ARM_PCREL_BLX +ARM 26 bit pc-relative branch. The lowest bit must be zero and is +not stored in the instruction. The 2nd lowest bit comes from a 1 bit +field in the instruction. +@end deffn +@deffn {} BFD_RELOC_THUMB_PCREL_BLX +Thumb 22 bit pc-relative branch. The lowest bit must be zero and is +not stored in the instruction. The 2nd lowest bit comes from a 1 bit +field in the instruction. +@end deffn +@deffn {} BFD_RELOC_ARM_PCREL_CALL +ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction. +@end deffn +@deffn {} BFD_RELOC_ARM_PCREL_JUMP +ARM 26-bit pc-relative branch for B or conditional BL instruction. +@end deffn +@deffn {} BFD_RELOC_THUMB_PCREL_BRANCH7 +@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH9 +@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH12 +@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH20 +@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH23 +@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH25 +Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches. +The lowest bit must be zero and is not stored in the instruction. +Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an +"nn" one smaller in all cases. Note further that BRANCH23 +corresponds to R_ARM_THM_CALL. +@end deffn +@deffn {} BFD_RELOC_ARM_OFFSET_IMM +12-bit immediate offset, used in ARM-format ldr and str instructions. +@end deffn +@deffn {} BFD_RELOC_ARM_THUMB_OFFSET +5-bit immediate offset, used in Thumb-format ldr and str instructions. +@end deffn +@deffn {} BFD_RELOC_ARM_TARGET1 +Pc-relative or absolute relocation depending on target. Used for +entries in .init_array sections. +@end deffn +@deffn {} BFD_RELOC_ARM_ROSEGREL32 +Read-only segment base relative address. +@end deffn +@deffn {} BFD_RELOC_ARM_SBREL32 +Data segment base relative address. +@end deffn +@deffn {} BFD_RELOC_ARM_TARGET2 +This reloc is used for references to RTTI data from exception handling +tables. The actual definition depends on the target. It may be a +pc-relative or some form of GOT-indirect relocation. +@end deffn +@deffn {} BFD_RELOC_ARM_PREL31 +31-bit PC relative address. +@end deffn +@deffn {} BFD_RELOC_ARM_MOVW +@deffnx {} BFD_RELOC_ARM_MOVT +@deffnx {} BFD_RELOC_ARM_MOVW_PCREL +@deffnx {} BFD_RELOC_ARM_MOVT_PCREL +@deffnx {} BFD_RELOC_ARM_THUMB_MOVW +@deffnx {} BFD_RELOC_ARM_THUMB_MOVT +@deffnx {} BFD_RELOC_ARM_THUMB_MOVW_PCREL +@deffnx {} BFD_RELOC_ARM_THUMB_MOVT_PCREL +Low and High halfword relocations for MOVW and MOVT instructions. +@end deffn +@deffn {} BFD_RELOC_ARM_JUMP_SLOT +@deffnx {} BFD_RELOC_ARM_GLOB_DAT +@deffnx {} BFD_RELOC_ARM_GOT32 +@deffnx {} BFD_RELOC_ARM_PLT32 +@deffnx {} BFD_RELOC_ARM_RELATIVE +@deffnx {} BFD_RELOC_ARM_GOTOFF +@deffnx {} BFD_RELOC_ARM_GOTPC +@deffnx {} BFD_RELOC_ARM_GOT_PREL +Relocations for setting up GOTs and PLTs for shared libraries. +@end deffn +@deffn {} BFD_RELOC_ARM_TLS_GD32 +@deffnx {} BFD_RELOC_ARM_TLS_LDO32 +@deffnx {} BFD_RELOC_ARM_TLS_LDM32 +@deffnx {} BFD_RELOC_ARM_TLS_DTPOFF32 +@deffnx {} BFD_RELOC_ARM_TLS_DTPMOD32 +@deffnx {} BFD_RELOC_ARM_TLS_TPOFF32 +@deffnx {} BFD_RELOC_ARM_TLS_IE32 +@deffnx {} BFD_RELOC_ARM_TLS_LE32 +@deffnx {} BFD_RELOC_ARM_TLS_GOTDESC +@deffnx {} BFD_RELOC_ARM_TLS_CALL +@deffnx {} BFD_RELOC_ARM_THM_TLS_CALL +@deffnx {} BFD_RELOC_ARM_TLS_DESCSEQ +@deffnx {} BFD_RELOC_ARM_THM_TLS_DESCSEQ +@deffnx {} BFD_RELOC_ARM_TLS_DESC +ARM thread-local storage relocations. +@end deffn +@deffn {} BFD_RELOC_ARM_ALU_PC_G0_NC +@deffnx {} BFD_RELOC_ARM_ALU_PC_G0 +@deffnx {} BFD_RELOC_ARM_ALU_PC_G1_NC +@deffnx {} BFD_RELOC_ARM_ALU_PC_G1 +@deffnx {} BFD_RELOC_ARM_ALU_PC_G2 +@deffnx {} BFD_RELOC_ARM_LDR_PC_G0 +@deffnx {} BFD_RELOC_ARM_LDR_PC_G1 +@deffnx {} BFD_RELOC_ARM_LDR_PC_G2 +@deffnx {} BFD_RELOC_ARM_LDRS_PC_G0 +@deffnx {} BFD_RELOC_ARM_LDRS_PC_G1 +@deffnx {} BFD_RELOC_ARM_LDRS_PC_G2 +@deffnx {} BFD_RELOC_ARM_LDC_PC_G0 +@deffnx {} BFD_RELOC_ARM_LDC_PC_G1 +@deffnx {} BFD_RELOC_ARM_LDC_PC_G2 +@deffnx {} BFD_RELOC_ARM_ALU_SB_G0_NC +@deffnx {} BFD_RELOC_ARM_ALU_SB_G0 +@deffnx {} BFD_RELOC_ARM_ALU_SB_G1_NC +@deffnx {} BFD_RELOC_ARM_ALU_SB_G1 +@deffnx {} BFD_RELOC_ARM_ALU_SB_G2 +@deffnx {} BFD_RELOC_ARM_LDR_SB_G0 +@deffnx {} BFD_RELOC_ARM_LDR_SB_G1 +@deffnx {} BFD_RELOC_ARM_LDR_SB_G2 +@deffnx {} BFD_RELOC_ARM_LDRS_SB_G0 +@deffnx {} BFD_RELOC_ARM_LDRS_SB_G1 +@deffnx {} BFD_RELOC_ARM_LDRS_SB_G2 +@deffnx {} BFD_RELOC_ARM_LDC_SB_G0 +@deffnx {} BFD_RELOC_ARM_LDC_SB_G1 +@deffnx {} BFD_RELOC_ARM_LDC_SB_G2 +ARM group relocations. +@end deffn +@deffn {} BFD_RELOC_ARM_V4BX +Annotation of BX instructions. +@end deffn +@deffn {} BFD_RELOC_ARM_IRELATIVE +ARM support for STT_GNU_IFUNC. +@end deffn +@deffn {} BFD_RELOC_ARM_IMMEDIATE +@deffnx {} BFD_RELOC_ARM_ADRL_IMMEDIATE +@deffnx {} BFD_RELOC_ARM_T32_IMMEDIATE +@deffnx {} BFD_RELOC_ARM_T32_ADD_IMM +@deffnx {} BFD_RELOC_ARM_T32_IMM12 +@deffnx {} BFD_RELOC_ARM_T32_ADD_PC12 +@deffnx {} BFD_RELOC_ARM_SHIFT_IMM +@deffnx {} BFD_RELOC_ARM_SMC +@deffnx {} BFD_RELOC_ARM_HVC +@deffnx {} BFD_RELOC_ARM_SWI +@deffnx {} BFD_RELOC_ARM_MULTI +@deffnx {} BFD_RELOC_ARM_CP_OFF_IMM +@deffnx {} BFD_RELOC_ARM_CP_OFF_IMM_S2 +@deffnx {} BFD_RELOC_ARM_T32_CP_OFF_IMM +@deffnx {} BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 +@deffnx {} BFD_RELOC_ARM_ADR_IMM +@deffnx {} BFD_RELOC_ARM_LDR_IMM +@deffnx {} BFD_RELOC_ARM_LITERAL +@deffnx {} BFD_RELOC_ARM_IN_POOL +@deffnx {} BFD_RELOC_ARM_OFFSET_IMM8 +@deffnx {} BFD_RELOC_ARM_T32_OFFSET_U8 +@deffnx {} BFD_RELOC_ARM_T32_OFFSET_IMM +@deffnx {} BFD_RELOC_ARM_HWLITERAL +@deffnx {} BFD_RELOC_ARM_THUMB_ADD +@deffnx {} BFD_RELOC_ARM_THUMB_IMM +@deffnx {} BFD_RELOC_ARM_THUMB_SHIFT +These relocs are only used within the ARM assembler. They are not +(at present) written to any object files. +@end deffn +@deffn {} BFD_RELOC_SH_PCDISP8BY2 +@deffnx {} BFD_RELOC_SH_PCDISP12BY2 +@deffnx {} BFD_RELOC_SH_IMM3 +@deffnx {} BFD_RELOC_SH_IMM3U +@deffnx {} BFD_RELOC_SH_DISP12 +@deffnx {} BFD_RELOC_SH_DISP12BY2 +@deffnx {} BFD_RELOC_SH_DISP12BY4 +@deffnx {} BFD_RELOC_SH_DISP12BY8 +@deffnx {} BFD_RELOC_SH_DISP20 +@deffnx {} BFD_RELOC_SH_DISP20BY8 +@deffnx {} BFD_RELOC_SH_IMM4 +@deffnx {} BFD_RELOC_SH_IMM4BY2 +@deffnx {} BFD_RELOC_SH_IMM4BY4 +@deffnx {} BFD_RELOC_SH_IMM8 +@deffnx {} BFD_RELOC_SH_IMM8BY2 +@deffnx {} BFD_RELOC_SH_IMM8BY4 +@deffnx {} BFD_RELOC_SH_PCRELIMM8BY2 +@deffnx {} BFD_RELOC_SH_PCRELIMM8BY4 +@deffnx {} BFD_RELOC_SH_SWITCH16 +@deffnx {} BFD_RELOC_SH_SWITCH32 +@deffnx {} BFD_RELOC_SH_USES +@deffnx {} BFD_RELOC_SH_COUNT +@deffnx {} BFD_RELOC_SH_ALIGN +@deffnx {} BFD_RELOC_SH_CODE +@deffnx {} BFD_RELOC_SH_DATA +@deffnx {} BFD_RELOC_SH_LABEL +@deffnx {} BFD_RELOC_SH_LOOP_START +@deffnx {} BFD_RELOC_SH_LOOP_END +@deffnx {} BFD_RELOC_SH_COPY +@deffnx {} BFD_RELOC_SH_GLOB_DAT +@deffnx {} BFD_RELOC_SH_JMP_SLOT +@deffnx {} BFD_RELOC_SH_RELATIVE +@deffnx {} BFD_RELOC_SH_GOTPC +@deffnx {} BFD_RELOC_SH_GOT_LOW16 +@deffnx {} BFD_RELOC_SH_GOT_MEDLOW16 +@deffnx {} BFD_RELOC_SH_GOT_MEDHI16 +@deffnx {} BFD_RELOC_SH_GOT_HI16 +@deffnx {} BFD_RELOC_SH_GOTPLT_LOW16 +@deffnx {} BFD_RELOC_SH_GOTPLT_MEDLOW16 +@deffnx {} BFD_RELOC_SH_GOTPLT_MEDHI16 +@deffnx {} BFD_RELOC_SH_GOTPLT_HI16 +@deffnx {} BFD_RELOC_SH_PLT_LOW16 +@deffnx {} BFD_RELOC_SH_PLT_MEDLOW16 +@deffnx {} BFD_RELOC_SH_PLT_MEDHI16 +@deffnx {} BFD_RELOC_SH_PLT_HI16 +@deffnx {} BFD_RELOC_SH_GOTOFF_LOW16 +@deffnx {} BFD_RELOC_SH_GOTOFF_MEDLOW16 +@deffnx {} BFD_RELOC_SH_GOTOFF_MEDHI16 +@deffnx {} BFD_RELOC_SH_GOTOFF_HI16 +@deffnx {} BFD_RELOC_SH_GOTPC_LOW16 +@deffnx {} BFD_RELOC_SH_GOTPC_MEDLOW16 +@deffnx {} BFD_RELOC_SH_GOTPC_MEDHI16 +@deffnx {} BFD_RELOC_SH_GOTPC_HI16 +@deffnx {} BFD_RELOC_SH_COPY64 +@deffnx {} BFD_RELOC_SH_GLOB_DAT64 +@deffnx {} BFD_RELOC_SH_JMP_SLOT64 +@deffnx {} BFD_RELOC_SH_RELATIVE64 +@deffnx {} BFD_RELOC_SH_GOT10BY4 +@deffnx {} BFD_RELOC_SH_GOT10BY8 +@deffnx {} BFD_RELOC_SH_GOTPLT10BY4 +@deffnx {} BFD_RELOC_SH_GOTPLT10BY8 +@deffnx {} BFD_RELOC_SH_GOTPLT32 +@deffnx {} BFD_RELOC_SH_SHMEDIA_CODE +@deffnx {} BFD_RELOC_SH_IMMU5 +@deffnx {} BFD_RELOC_SH_IMMS6 +@deffnx {} BFD_RELOC_SH_IMMS6BY32 +@deffnx {} BFD_RELOC_SH_IMMU6 +@deffnx {} BFD_RELOC_SH_IMMS10 +@deffnx {} BFD_RELOC_SH_IMMS10BY2 +@deffnx {} BFD_RELOC_SH_IMMS10BY4 +@deffnx {} BFD_RELOC_SH_IMMS10BY8 +@deffnx {} BFD_RELOC_SH_IMMS16 +@deffnx {} BFD_RELOC_SH_IMMU16 +@deffnx {} BFD_RELOC_SH_IMM_LOW16 +@deffnx {} BFD_RELOC_SH_IMM_LOW16_PCREL +@deffnx {} BFD_RELOC_SH_IMM_MEDLOW16 +@deffnx {} BFD_RELOC_SH_IMM_MEDLOW16_PCREL +@deffnx {} BFD_RELOC_SH_IMM_MEDHI16 +@deffnx {} BFD_RELOC_SH_IMM_MEDHI16_PCREL +@deffnx {} BFD_RELOC_SH_IMM_HI16 +@deffnx {} BFD_RELOC_SH_IMM_HI16_PCREL +@deffnx {} BFD_RELOC_SH_PT_16 +@deffnx {} BFD_RELOC_SH_TLS_GD_32 +@deffnx {} BFD_RELOC_SH_TLS_LD_32 +@deffnx {} BFD_RELOC_SH_TLS_LDO_32 +@deffnx {} BFD_RELOC_SH_TLS_IE_32 +@deffnx {} BFD_RELOC_SH_TLS_LE_32 +@deffnx {} BFD_RELOC_SH_TLS_DTPMOD32 +@deffnx {} BFD_RELOC_SH_TLS_DTPOFF32 +@deffnx {} BFD_RELOC_SH_TLS_TPOFF32 +@deffnx {} BFD_RELOC_SH_GOT20 +@deffnx {} BFD_RELOC_SH_GOTOFF20 +@deffnx {} BFD_RELOC_SH_GOTFUNCDESC +@deffnx {} BFD_RELOC_SH_GOTFUNCDESC20 +@deffnx {} BFD_RELOC_SH_GOTOFFFUNCDESC +@deffnx {} BFD_RELOC_SH_GOTOFFFUNCDESC20 +@deffnx {} BFD_RELOC_SH_FUNCDESC +Renesas / SuperH SH relocs. Not all of these appear in object files. +@end deffn +@deffn {} BFD_RELOC_ARC_B22_PCREL +ARC Cores relocs. +ARC 22 bit pc-relative branch. The lowest two bits must be zero and are +not stored in the instruction. The high 20 bits are installed in bits 26 +through 7 of the instruction. +@end deffn +@deffn {} BFD_RELOC_ARC_B26 +ARC 26 bit absolute branch. The lowest two bits must be zero and are not +stored in the instruction. The high 24 bits are installed in bits 23 +through 0. +@end deffn +@deffn {} BFD_RELOC_BFIN_16_IMM +ADI Blackfin 16 bit immediate absolute reloc. +@end deffn +@deffn {} BFD_RELOC_BFIN_16_HIGH +ADI Blackfin 16 bit immediate absolute reloc higher 16 bits. +@end deffn +@deffn {} BFD_RELOC_BFIN_4_PCREL +ADI Blackfin 'a' part of LSETUP. +@end deffn +@deffn {} BFD_RELOC_BFIN_5_PCREL +ADI Blackfin. +@end deffn +@deffn {} BFD_RELOC_BFIN_16_LOW +ADI Blackfin 16 bit immediate absolute reloc lower 16 bits. +@end deffn +@deffn {} BFD_RELOC_BFIN_10_PCREL +ADI Blackfin. +@end deffn +@deffn {} BFD_RELOC_BFIN_11_PCREL +ADI Blackfin 'b' part of LSETUP. +@end deffn +@deffn {} BFD_RELOC_BFIN_12_PCREL_JUMP +ADI Blackfin. +@end deffn +@deffn {} BFD_RELOC_BFIN_12_PCREL_JUMP_S +ADI Blackfin Short jump, pcrel. +@end deffn +@deffn {} BFD_RELOC_BFIN_24_PCREL_CALL_X +ADI Blackfin Call.x not implemented. +@end deffn +@deffn {} BFD_RELOC_BFIN_24_PCREL_JUMP_L +ADI Blackfin Long Jump pcrel. +@end deffn +@deffn {} BFD_RELOC_BFIN_GOT17M4 +@deffnx {} BFD_RELOC_BFIN_GOTHI +@deffnx {} BFD_RELOC_BFIN_GOTLO +@deffnx {} BFD_RELOC_BFIN_FUNCDESC +@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOT17M4 +@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOTHI +@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOTLO +@deffnx {} BFD_RELOC_BFIN_FUNCDESC_VALUE +@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4 +@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI +@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO +@deffnx {} BFD_RELOC_BFIN_GOTOFF17M4 +@deffnx {} BFD_RELOC_BFIN_GOTOFFHI +@deffnx {} BFD_RELOC_BFIN_GOTOFFLO +ADI Blackfin FD-PIC relocations. +@end deffn +@deffn {} BFD_RELOC_BFIN_GOT +ADI Blackfin GOT relocation. +@end deffn +@deffn {} BFD_RELOC_BFIN_PLTPC +ADI Blackfin PLTPC relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_PUSH +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_CONST +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_ADD +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_SUB +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_MULT +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_DIV +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_MOD +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_LSHIFT +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_RSHIFT +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_AND +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_OR +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_XOR +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_LAND +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_LOR +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_LEN +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_NEG +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_COMP +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_PAGE +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_HWPAGE +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_ARELOC_BFIN_ADDR +ADI Blackfin arithmetic relocation. +@end deffn +@deffn {} BFD_RELOC_D10V_10_PCREL_R +Mitsubishi D10V relocs. +This is a 10-bit reloc with the right 2 bits +assumed to be 0. +@end deffn +@deffn {} BFD_RELOC_D10V_10_PCREL_L +Mitsubishi D10V relocs. +This is a 10-bit reloc with the right 2 bits +assumed to be 0. This is the same as the previous reloc +except it is in the left container, i.e., +shifted left 15 bits. +@end deffn +@deffn {} BFD_RELOC_D10V_18 +This is an 18-bit reloc with the right 2 bits +assumed to be 0. +@end deffn +@deffn {} BFD_RELOC_D10V_18_PCREL +This is an 18-bit reloc with the right 2 bits +assumed to be 0. +@end deffn +@deffn {} BFD_RELOC_D30V_6 +Mitsubishi D30V relocs. +This is a 6-bit absolute reloc. +@end deffn +@deffn {} BFD_RELOC_D30V_9_PCREL +This is a 6-bit pc-relative reloc with +the right 3 bits assumed to be 0. +@end deffn +@deffn {} BFD_RELOC_D30V_9_PCREL_R +This is a 6-bit pc-relative reloc with +the right 3 bits assumed to be 0. Same +as the previous reloc but on the right side +of the container. +@end deffn +@deffn {} BFD_RELOC_D30V_15 +This is a 12-bit absolute reloc with the +right 3 bitsassumed to be 0. +@end deffn +@deffn {} BFD_RELOC_D30V_15_PCREL +This is a 12-bit pc-relative reloc with +the right 3 bits assumed to be 0. +@end deffn +@deffn {} BFD_RELOC_D30V_15_PCREL_R +This is a 12-bit pc-relative reloc with +the right 3 bits assumed to be 0. Same +as the previous reloc but on the right side +of the container. +@end deffn +@deffn {} BFD_RELOC_D30V_21 +This is an 18-bit absolute reloc with +the right 3 bits assumed to be 0. +@end deffn +@deffn {} BFD_RELOC_D30V_21_PCREL +This is an 18-bit pc-relative reloc with +the right 3 bits assumed to be 0. +@end deffn +@deffn {} BFD_RELOC_D30V_21_PCREL_R +This is an 18-bit pc-relative reloc with +the right 3 bits assumed to be 0. Same +as the previous reloc but on the right side +of the container. +@end deffn +@deffn {} BFD_RELOC_D30V_32 +This is a 32-bit absolute reloc. +@end deffn +@deffn {} BFD_RELOC_D30V_32_PCREL +This is a 32-bit pc-relative reloc. +@end deffn +@deffn {} BFD_RELOC_DLX_HI16_S +DLX relocs +@end deffn +@deffn {} BFD_RELOC_DLX_LO16 +DLX relocs +@end deffn +@deffn {} BFD_RELOC_DLX_JMP26 +DLX relocs +@end deffn +@deffn {} BFD_RELOC_M32C_HI8 +@deffnx {} BFD_RELOC_M32C_RL_JUMP +@deffnx {} BFD_RELOC_M32C_RL_1ADDR +@deffnx {} BFD_RELOC_M32C_RL_2ADDR +Renesas M16C/M32C Relocations. +@end deffn +@deffn {} BFD_RELOC_M32R_24 +Renesas M32R (formerly Mitsubishi M32R) relocs. +This is a 24 bit absolute address. +@end deffn +@deffn {} BFD_RELOC_M32R_10_PCREL +This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0. +@end deffn +@deffn {} BFD_RELOC_M32R_18_PCREL +This is an 18-bit reloc with the right 2 bits assumed to be 0. +@end deffn +@deffn {} BFD_RELOC_M32R_26_PCREL +This is a 26-bit reloc with the right 2 bits assumed to be 0. +@end deffn +@deffn {} BFD_RELOC_M32R_HI16_ULO +This is a 16-bit reloc containing the high 16 bits of an address +used when the lower 16 bits are treated as unsigned. +@end deffn +@deffn {} BFD_RELOC_M32R_HI16_SLO +This is a 16-bit reloc containing the high 16 bits of an address +used when the lower 16 bits are treated as signed. +@end deffn +@deffn {} BFD_RELOC_M32R_LO16 +This is a 16-bit reloc containing the lower 16 bits of an address. +@end deffn +@deffn {} BFD_RELOC_M32R_SDA16 +This is a 16-bit reloc containing the small data area offset for use in +add3, load, and store instructions. +@end deffn +@deffn {} BFD_RELOC_M32R_GOT24 +@deffnx {} BFD_RELOC_M32R_26_PLTREL +@deffnx {} BFD_RELOC_M32R_COPY +@deffnx {} BFD_RELOC_M32R_GLOB_DAT +@deffnx {} BFD_RELOC_M32R_JMP_SLOT +@deffnx {} BFD_RELOC_M32R_RELATIVE +@deffnx {} BFD_RELOC_M32R_GOTOFF +@deffnx {} BFD_RELOC_M32R_GOTOFF_HI_ULO +@deffnx {} BFD_RELOC_M32R_GOTOFF_HI_SLO +@deffnx {} BFD_RELOC_M32R_GOTOFF_LO +@deffnx {} BFD_RELOC_M32R_GOTPC24 +@deffnx {} BFD_RELOC_M32R_GOT16_HI_ULO +@deffnx {} BFD_RELOC_M32R_GOT16_HI_SLO +@deffnx {} BFD_RELOC_M32R_GOT16_LO +@deffnx {} BFD_RELOC_M32R_GOTPC_HI_ULO +@deffnx {} BFD_RELOC_M32R_GOTPC_HI_SLO +@deffnx {} BFD_RELOC_M32R_GOTPC_LO +For PIC. +@end deffn +@deffn {} BFD_RELOC_V850_9_PCREL +This is a 9-bit reloc +@end deffn +@deffn {} BFD_RELOC_V850_22_PCREL +This is a 22-bit reloc +@end deffn +@deffn {} BFD_RELOC_V850_SDA_16_16_OFFSET +This is a 16 bit offset from the short data area pointer. +@end deffn +@deffn {} BFD_RELOC_V850_SDA_15_16_OFFSET +This is a 16 bit offset (of which only 15 bits are used) from the +short data area pointer. +@end deffn +@deffn {} BFD_RELOC_V850_ZDA_16_16_OFFSET +This is a 16 bit offset from the zero data area pointer. +@end deffn +@deffn {} BFD_RELOC_V850_ZDA_15_16_OFFSET +This is a 16 bit offset (of which only 15 bits are used) from the +zero data area pointer. +@end deffn +@deffn {} BFD_RELOC_V850_TDA_6_8_OFFSET +This is an 8 bit offset (of which only 6 bits are used) from the +tiny data area pointer. +@end deffn +@deffn {} BFD_RELOC_V850_TDA_7_8_OFFSET +This is an 8bit offset (of which only 7 bits are used) from the tiny +data area pointer. +@end deffn +@deffn {} BFD_RELOC_V850_TDA_7_7_OFFSET +This is a 7 bit offset from the tiny data area pointer. +@end deffn +@deffn {} BFD_RELOC_V850_TDA_16_16_OFFSET +This is a 16 bit offset from the tiny data area pointer. +@end deffn +@deffn {} BFD_RELOC_V850_TDA_4_5_OFFSET +This is a 5 bit offset (of which only 4 bits are used) from the tiny +data area pointer. +@end deffn +@deffn {} BFD_RELOC_V850_TDA_4_4_OFFSET +This is a 4 bit offset from the tiny data area pointer. +@end deffn +@deffn {} BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET +This is a 16 bit offset from the short data area pointer, with the +bits placed non-contiguously in the instruction. +@end deffn +@deffn {} BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET +This is a 16 bit offset from the zero data area pointer, with the +bits placed non-contiguously in the instruction. +@end deffn +@deffn {} BFD_RELOC_V850_CALLT_6_7_OFFSET +This is a 6 bit offset from the call table base pointer. +@end deffn +@deffn {} BFD_RELOC_V850_CALLT_16_16_OFFSET +This is a 16 bit offset from the call table base pointer. +@end deffn +@deffn {} BFD_RELOC_V850_LONGCALL +Used for relaxing indirect function calls. +@end deffn +@deffn {} BFD_RELOC_V850_LONGJUMP +Used for relaxing indirect jumps. +@end deffn +@deffn {} BFD_RELOC_V850_ALIGN +Used to maintain alignment whilst relaxing. +@end deffn +@deffn {} BFD_RELOC_V850_LO16_SPLIT_OFFSET +This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu +instructions. +@end deffn +@deffn {} BFD_RELOC_V850_16_PCREL +This is a 16-bit reloc. +@end deffn +@deffn {} BFD_RELOC_V850_17_PCREL +This is a 17-bit reloc. +@end deffn +@deffn {} BFD_RELOC_V850_23 +This is a 23-bit reloc. +@end deffn +@deffn {} BFD_RELOC_V850_32_PCREL +This is a 32-bit reloc. +@end deffn +@deffn {} BFD_RELOC_V850_32_ABS +This is a 32-bit reloc. +@end deffn +@deffn {} BFD_RELOC_V850_16_SPLIT_OFFSET +This is a 16-bit reloc. +@end deffn +@deffn {} BFD_RELOC_V850_16_S1 +This is a 16-bit reloc. +@end deffn +@deffn {} BFD_RELOC_V850_LO16_S1 +Low 16 bits. 16 bit shifted by 1. +@end deffn +@deffn {} BFD_RELOC_V850_CALLT_15_16_OFFSET +This is a 16 bit offset from the call table base pointer. +@end deffn +@deffn {} BFD_RELOC_V850_32_GOTPCREL +DSO relocations. +@end deffn +@deffn {} BFD_RELOC_V850_16_GOT +DSO relocations. +@end deffn +@deffn {} BFD_RELOC_V850_32_GOT +DSO relocations. +@end deffn +@deffn {} BFD_RELOC_V850_22_PLT_PCREL +DSO relocations. +@end deffn +@deffn {} BFD_RELOC_V850_32_PLT_PCREL +DSO relocations. +@end deffn +@deffn {} BFD_RELOC_V850_COPY +DSO relocations. +@end deffn +@deffn {} BFD_RELOC_V850_GLOB_DAT +DSO relocations. +@end deffn +@deffn {} BFD_RELOC_V850_JMP_SLOT +DSO relocations. +@end deffn +@deffn {} BFD_RELOC_V850_RELATIVE +DSO relocations. +@end deffn +@deffn {} BFD_RELOC_V850_16_GOTOFF +DSO relocations. +@end deffn +@deffn {} BFD_RELOC_V850_32_GOTOFF +DSO relocations. +@end deffn +@deffn {} BFD_RELOC_V850_CODE +start code. +@end deffn +@deffn {} BFD_RELOC_V850_DATA +start data in text. +@end deffn +@deffn {} BFD_RELOC_MN10300_32_PCREL +This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the +instruction. +@end deffn +@deffn {} BFD_RELOC_MN10300_16_PCREL +This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the +instruction. +@end deffn +@deffn {} BFD_RELOC_TIC30_LDP +This is a 8bit DP reloc for the tms320c30, where the most +significant 8 bits of a 24 bit word are placed into the least +significant 8 bits of the opcode. +@end deffn +@deffn {} BFD_RELOC_TIC54X_PARTLS7 +This is a 7bit reloc for the tms320c54x, where the least +significant 7 bits of a 16 bit word are placed into the least +significant 7 bits of the opcode. +@end deffn +@deffn {} BFD_RELOC_TIC54X_PARTMS9 +This is a 9bit DP reloc for the tms320c54x, where the most +significant 9 bits of a 16 bit word are placed into the least +significant 9 bits of the opcode. +@end deffn +@deffn {} BFD_RELOC_TIC54X_23 +This is an extended address 23-bit reloc for the tms320c54x. +@end deffn +@deffn {} BFD_RELOC_TIC54X_16_OF_23 +This is a 16-bit reloc for the tms320c54x, where the least +significant 16 bits of a 23-bit extended address are placed into +the opcode. +@end deffn +@deffn {} BFD_RELOC_TIC54X_MS7_OF_23 +This is a reloc for the tms320c54x, where the most +significant 7 bits of a 23-bit extended address are placed into +the opcode. +@end deffn +@deffn {} BFD_RELOC_C6000_PCR_S21 +@deffnx {} BFD_RELOC_C6000_PCR_S12 +@deffnx {} BFD_RELOC_C6000_PCR_S10 +@deffnx {} BFD_RELOC_C6000_PCR_S7 +@deffnx {} BFD_RELOC_C6000_ABS_S16 +@deffnx {} BFD_RELOC_C6000_ABS_L16 +@deffnx {} BFD_RELOC_C6000_ABS_H16 +@deffnx {} BFD_RELOC_C6000_SBR_U15_B +@deffnx {} BFD_RELOC_C6000_SBR_U15_H +@deffnx {} BFD_RELOC_C6000_SBR_U15_W +@deffnx {} BFD_RELOC_C6000_SBR_S16 +@deffnx {} BFD_RELOC_C6000_SBR_L16_B +@deffnx {} BFD_RELOC_C6000_SBR_L16_H +@deffnx {} BFD_RELOC_C6000_SBR_L16_W +@deffnx {} BFD_RELOC_C6000_SBR_H16_B +@deffnx {} BFD_RELOC_C6000_SBR_H16_H +@deffnx {} BFD_RELOC_C6000_SBR_H16_W +@deffnx {} BFD_RELOC_C6000_SBR_GOT_U15_W +@deffnx {} BFD_RELOC_C6000_SBR_GOT_L16_W +@deffnx {} BFD_RELOC_C6000_SBR_GOT_H16_W +@deffnx {} BFD_RELOC_C6000_DSBT_INDEX +@deffnx {} BFD_RELOC_C6000_PREL31 +@deffnx {} BFD_RELOC_C6000_COPY +@deffnx {} BFD_RELOC_C6000_JUMP_SLOT +@deffnx {} BFD_RELOC_C6000_EHTYPE +@deffnx {} BFD_RELOC_C6000_PCR_H16 +@deffnx {} BFD_RELOC_C6000_PCR_L16 +@deffnx {} BFD_RELOC_C6000_ALIGN +@deffnx {} BFD_RELOC_C6000_FPHEAD +@deffnx {} BFD_RELOC_C6000_NOCMP +TMS320C6000 relocations. +@end deffn +@deffn {} BFD_RELOC_FR30_48 +This is a 48 bit reloc for the FR30 that stores 32 bits. +@end deffn +@deffn {} BFD_RELOC_FR30_20 +This is a 32 bit reloc for the FR30 that stores 20 bits split up into +two sections. +@end deffn +@deffn {} BFD_RELOC_FR30_6_IN_4 +This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in +4 bits. +@end deffn +@deffn {} BFD_RELOC_FR30_8_IN_8 +This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset +into 8 bits. +@end deffn +@deffn {} BFD_RELOC_FR30_9_IN_8 +This is a 16 bit reloc for the FR30 that stores a 9 bit short offset +into 8 bits. +@end deffn +@deffn {} BFD_RELOC_FR30_10_IN_8 +This is a 16 bit reloc for the FR30 that stores a 10 bit word offset +into 8 bits. +@end deffn +@deffn {} BFD_RELOC_FR30_9_PCREL +This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative +short offset into 8 bits. +@end deffn +@deffn {} BFD_RELOC_FR30_12_PCREL +This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative +short offset into 11 bits. +@end deffn +@deffn {} BFD_RELOC_MCORE_PCREL_IMM8BY4 +@deffnx {} BFD_RELOC_MCORE_PCREL_IMM11BY2 +@deffnx {} BFD_RELOC_MCORE_PCREL_IMM4BY2 +@deffnx {} BFD_RELOC_MCORE_PCREL_32 +@deffnx {} BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2 +@deffnx {} BFD_RELOC_MCORE_RVA +Motorola Mcore relocations. +@end deffn +@deffn {} BFD_RELOC_MEP_8 +@deffnx {} BFD_RELOC_MEP_16 +@deffnx {} BFD_RELOC_MEP_32 +@deffnx {} BFD_RELOC_MEP_PCREL8A2 +@deffnx {} BFD_RELOC_MEP_PCREL12A2 +@deffnx {} BFD_RELOC_MEP_PCREL17A2 +@deffnx {} BFD_RELOC_MEP_PCREL24A2 +@deffnx {} BFD_RELOC_MEP_PCABS24A2 +@deffnx {} BFD_RELOC_MEP_LOW16 +@deffnx {} BFD_RELOC_MEP_HI16U +@deffnx {} BFD_RELOC_MEP_HI16S +@deffnx {} BFD_RELOC_MEP_GPREL +@deffnx {} BFD_RELOC_MEP_TPREL +@deffnx {} BFD_RELOC_MEP_TPREL7 +@deffnx {} BFD_RELOC_MEP_TPREL7A2 +@deffnx {} BFD_RELOC_MEP_TPREL7A4 +@deffnx {} BFD_RELOC_MEP_UIMM24 +@deffnx {} BFD_RELOC_MEP_ADDR24A4 +@deffnx {} BFD_RELOC_MEP_GNU_VTINHERIT +@deffnx {} BFD_RELOC_MEP_GNU_VTENTRY +Toshiba Media Processor Relocations. +@end deffn +@deffn {} BFD_RELOC_MMIX_GETA +@deffnx {} BFD_RELOC_MMIX_GETA_1 +@deffnx {} BFD_RELOC_MMIX_GETA_2 +@deffnx {} BFD_RELOC_MMIX_GETA_3 +These are relocations for the GETA instruction. +@end deffn +@deffn {} BFD_RELOC_MMIX_CBRANCH +@deffnx {} BFD_RELOC_MMIX_CBRANCH_J +@deffnx {} BFD_RELOC_MMIX_CBRANCH_1 +@deffnx {} BFD_RELOC_MMIX_CBRANCH_2 +@deffnx {} BFD_RELOC_MMIX_CBRANCH_3 +These are relocations for a conditional branch instruction. +@end deffn +@deffn {} BFD_RELOC_MMIX_PUSHJ +@deffnx {} BFD_RELOC_MMIX_PUSHJ_1 +@deffnx {} BFD_RELOC_MMIX_PUSHJ_2 +@deffnx {} BFD_RELOC_MMIX_PUSHJ_3 +@deffnx {} BFD_RELOC_MMIX_PUSHJ_STUBBABLE +These are relocations for the PUSHJ instruction. +@end deffn +@deffn {} BFD_RELOC_MMIX_JMP +@deffnx {} BFD_RELOC_MMIX_JMP_1 +@deffnx {} BFD_RELOC_MMIX_JMP_2 +@deffnx {} BFD_RELOC_MMIX_JMP_3 +These are relocations for the JMP instruction. +@end deffn +@deffn {} BFD_RELOC_MMIX_ADDR19 +This is a relocation for a relative address as in a GETA instruction or +a branch. +@end deffn +@deffn {} BFD_RELOC_MMIX_ADDR27 +This is a relocation for a relative address as in a JMP instruction. +@end deffn +@deffn {} BFD_RELOC_MMIX_REG_OR_BYTE +This is a relocation for an instruction field that may be a general +register or a value 0..255. +@end deffn +@deffn {} BFD_RELOC_MMIX_REG +This is a relocation for an instruction field that may be a general +register. +@end deffn +@deffn {} BFD_RELOC_MMIX_BASE_PLUS_OFFSET +This is a relocation for two instruction fields holding a register and +an offset, the equivalent of the relocation. +@end deffn +@deffn {} BFD_RELOC_MMIX_LOCAL +This relocation is an assertion that the expression is not allocated as +a global register. It does not modify contents. +@end deffn +@deffn {} BFD_RELOC_AVR_7_PCREL +This is a 16 bit reloc for the AVR that stores 8 bit pc relative +short offset into 7 bits. +@end deffn +@deffn {} BFD_RELOC_AVR_13_PCREL +This is a 16 bit reloc for the AVR that stores 13 bit pc relative +short offset into 12 bits. +@end deffn +@deffn {} BFD_RELOC_AVR_16_PM +This is a 16 bit reloc for the AVR that stores 17 bit value (usually +program memory address) into 16 bits. +@end deffn +@deffn {} BFD_RELOC_AVR_LO8_LDI +This is a 16 bit reloc for the AVR that stores 8 bit value (usually +data memory address) into 8 bit immediate value of LDI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_HI8_LDI +This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit +of data memory address) into 8 bit immediate value of LDI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_HH8_LDI +This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit +of program memory address) into 8 bit immediate value of LDI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_MS8_LDI +This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit +of 32 bit value) into 8 bit immediate value of LDI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_LO8_LDI_NEG +This is a 16 bit reloc for the AVR that stores negated 8 bit value +(usually data memory address) into 8 bit immediate value of SUBI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_HI8_LDI_NEG +This is a 16 bit reloc for the AVR that stores negated 8 bit value +(high 8 bit of data memory address) into 8 bit immediate value of +SUBI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_HH8_LDI_NEG +This is a 16 bit reloc for the AVR that stores negated 8 bit value +(most high 8 bit of program memory address) into 8 bit immediate value +of LDI or SUBI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_MS8_LDI_NEG +This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb +of 32 bit value) into 8 bit immediate value of LDI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_LO8_LDI_PM +This is a 16 bit reloc for the AVR that stores 8 bit value (usually +command address) into 8 bit immediate value of LDI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_LO8_LDI_GS +This is a 16 bit reloc for the AVR that stores 8 bit value +(command address) into 8 bit immediate value of LDI insn. If the address +is beyond the 128k boundary, the linker inserts a jump stub for this reloc +in the lower 128k. +@end deffn +@deffn {} BFD_RELOC_AVR_HI8_LDI_PM +This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit +of command address) into 8 bit immediate value of LDI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_HI8_LDI_GS +This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit +of command address) into 8 bit immediate value of LDI insn. If the address +is beyond the 128k boundary, the linker inserts a jump stub for this reloc +below 128k. +@end deffn +@deffn {} BFD_RELOC_AVR_HH8_LDI_PM +This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit +of command address) into 8 bit immediate value of LDI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_LO8_LDI_PM_NEG +This is a 16 bit reloc for the AVR that stores negated 8 bit value +(usually command address) into 8 bit immediate value of SUBI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_HI8_LDI_PM_NEG +This is a 16 bit reloc for the AVR that stores negated 8 bit value +(high 8 bit of 16 bit command address) into 8 bit immediate value +of SUBI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_HH8_LDI_PM_NEG +This is a 16 bit reloc for the AVR that stores negated 8 bit value +(high 6 bit of 22 bit command address) into 8 bit immediate +value of SUBI insn. +@end deffn +@deffn {} BFD_RELOC_AVR_CALL +This is a 32 bit reloc for the AVR that stores 23 bit value +into 22 bits. +@end deffn +@deffn {} BFD_RELOC_AVR_LDI +This is a 16 bit reloc for the AVR that stores all needed bits +for absolute addressing with ldi with overflow check to linktime +@end deffn +@deffn {} BFD_RELOC_AVR_6 +This is a 6 bit reloc for the AVR that stores offset for ldd/std +instructions +@end deffn +@deffn {} BFD_RELOC_AVR_6_ADIW +This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw +instructions +@end deffn +@deffn {} BFD_RELOC_RX_NEG8 +@deffnx {} BFD_RELOC_RX_NEG16 +@deffnx {} BFD_RELOC_RX_NEG24 +@deffnx {} BFD_RELOC_RX_NEG32 +@deffnx {} BFD_RELOC_RX_16_OP +@deffnx {} BFD_RELOC_RX_24_OP +@deffnx {} BFD_RELOC_RX_32_OP +@deffnx {} BFD_RELOC_RX_8U +@deffnx {} BFD_RELOC_RX_16U +@deffnx {} BFD_RELOC_RX_24U +@deffnx {} BFD_RELOC_RX_DIR3U_PCREL +@deffnx {} BFD_RELOC_RX_DIFF +@deffnx {} BFD_RELOC_RX_GPRELB +@deffnx {} BFD_RELOC_RX_GPRELW +@deffnx {} BFD_RELOC_RX_GPRELL +@deffnx {} BFD_RELOC_RX_SYM +@deffnx {} BFD_RELOC_RX_OP_SUBTRACT +@deffnx {} BFD_RELOC_RX_OP_NEG +@deffnx {} BFD_RELOC_RX_ABS8 +@deffnx {} BFD_RELOC_RX_ABS16 +@deffnx {} BFD_RELOC_RX_ABS16_REV +@deffnx {} BFD_RELOC_RX_ABS32 +@deffnx {} BFD_RELOC_RX_ABS32_REV +@deffnx {} BFD_RELOC_RX_ABS16U +@deffnx {} BFD_RELOC_RX_ABS16UW +@deffnx {} BFD_RELOC_RX_ABS16UL +@deffnx {} BFD_RELOC_RX_RELAX +Renesas RX Relocations. +@end deffn +@deffn {} BFD_RELOC_390_12 +Direct 12 bit. +@end deffn +@deffn {} BFD_RELOC_390_GOT12 +12 bit GOT offset. +@end deffn +@deffn {} BFD_RELOC_390_PLT32 +32 bit PC relative PLT address. +@end deffn +@deffn {} BFD_RELOC_390_COPY +Copy symbol at runtime. +@end deffn +@deffn {} BFD_RELOC_390_GLOB_DAT +Create GOT entry. +@end deffn +@deffn {} BFD_RELOC_390_JMP_SLOT +Create PLT entry. +@end deffn +@deffn {} BFD_RELOC_390_RELATIVE +Adjust by program base. +@end deffn +@deffn {} BFD_RELOC_390_GOTPC +32 bit PC relative offset to GOT. +@end deffn +@deffn {} BFD_RELOC_390_GOT16 +16 bit GOT offset. +@end deffn +@deffn {} BFD_RELOC_390_PC16DBL +PC relative 16 bit shifted by 1. +@end deffn +@deffn {} BFD_RELOC_390_PLT16DBL +16 bit PC rel. PLT shifted by 1. +@end deffn +@deffn {} BFD_RELOC_390_PC32DBL +PC relative 32 bit shifted by 1. +@end deffn +@deffn {} BFD_RELOC_390_PLT32DBL +32 bit PC rel. PLT shifted by 1. +@end deffn +@deffn {} BFD_RELOC_390_GOTPCDBL +32 bit PC rel. GOT shifted by 1. +@end deffn +@deffn {} BFD_RELOC_390_GOT64 +64 bit GOT offset. +@end deffn +@deffn {} BFD_RELOC_390_PLT64 +64 bit PC relative PLT address. +@end deffn +@deffn {} BFD_RELOC_390_GOTENT +32 bit rel. offset to GOT entry. +@end deffn +@deffn {} BFD_RELOC_390_GOTOFF64 +64 bit offset to GOT. +@end deffn +@deffn {} BFD_RELOC_390_GOTPLT12 +12-bit offset to symbol-entry within GOT, with PLT handling. +@end deffn +@deffn {} BFD_RELOC_390_GOTPLT16 +16-bit offset to symbol-entry within GOT, with PLT handling. +@end deffn +@deffn {} BFD_RELOC_390_GOTPLT32 +32-bit offset to symbol-entry within GOT, with PLT handling. +@end deffn +@deffn {} BFD_RELOC_390_GOTPLT64 +64-bit offset to symbol-entry within GOT, with PLT handling. +@end deffn +@deffn {} BFD_RELOC_390_GOTPLTENT +32-bit rel. offset to symbol-entry within GOT, with PLT handling. +@end deffn +@deffn {} BFD_RELOC_390_PLTOFF16 +16-bit rel. offset from the GOT to a PLT entry. +@end deffn +@deffn {} BFD_RELOC_390_PLTOFF32 +32-bit rel. offset from the GOT to a PLT entry. +@end deffn +@deffn {} BFD_RELOC_390_PLTOFF64 +64-bit rel. offset from the GOT to a PLT entry. +@end deffn +@deffn {} BFD_RELOC_390_TLS_LOAD +@deffnx {} BFD_RELOC_390_TLS_GDCALL +@deffnx {} BFD_RELOC_390_TLS_LDCALL +@deffnx {} BFD_RELOC_390_TLS_GD32 +@deffnx {} BFD_RELOC_390_TLS_GD64 +@deffnx {} BFD_RELOC_390_TLS_GOTIE12 +@deffnx {} BFD_RELOC_390_TLS_GOTIE32 +@deffnx {} BFD_RELOC_390_TLS_GOTIE64 +@deffnx {} BFD_RELOC_390_TLS_LDM32 +@deffnx {} BFD_RELOC_390_TLS_LDM64 +@deffnx {} BFD_RELOC_390_TLS_IE32 +@deffnx {} BFD_RELOC_390_TLS_IE64 +@deffnx {} BFD_RELOC_390_TLS_IEENT +@deffnx {} BFD_RELOC_390_TLS_LE32 +@deffnx {} BFD_RELOC_390_TLS_LE64 +@deffnx {} BFD_RELOC_390_TLS_LDO32 +@deffnx {} BFD_RELOC_390_TLS_LDO64 +@deffnx {} BFD_RELOC_390_TLS_DTPMOD +@deffnx {} BFD_RELOC_390_TLS_DTPOFF +@deffnx {} BFD_RELOC_390_TLS_TPOFF +s390 tls relocations. +@end deffn +@deffn {} BFD_RELOC_390_20 +@deffnx {} BFD_RELOC_390_GOT20 +@deffnx {} BFD_RELOC_390_GOTPLT20 +@deffnx {} BFD_RELOC_390_TLS_GOTIE20 +Long displacement extension. +@end deffn +@deffn {} BFD_RELOC_SCORE_GPREL15 +Score relocations +Low 16 bit for load/store +@end deffn +@deffn {} BFD_RELOC_SCORE_DUMMY2 +@deffnx {} BFD_RELOC_SCORE_JMP +This is a 24-bit reloc with the right 1 bit assumed to be 0 +@end deffn +@deffn {} BFD_RELOC_SCORE_BRANCH +This is a 19-bit reloc with the right 1 bit assumed to be 0 +@end deffn +@deffn {} BFD_RELOC_SCORE_IMM30 +This is a 32-bit reloc for 48-bit instructions. +@end deffn +@deffn {} BFD_RELOC_SCORE_IMM32 +This is a 32-bit reloc for 48-bit instructions. +@end deffn +@deffn {} BFD_RELOC_SCORE16_JMP +This is a 11-bit reloc with the right 1 bit assumed to be 0 +@end deffn +@deffn {} BFD_RELOC_SCORE16_BRANCH +This is a 8-bit reloc with the right 1 bit assumed to be 0 +@end deffn +@deffn {} BFD_RELOC_SCORE_BCMP +This is a 9-bit reloc with the right 1 bit assumed to be 0 +@end deffn +@deffn {} BFD_RELOC_SCORE_GOT15 +@deffnx {} BFD_RELOC_SCORE_GOT_LO16 +@deffnx {} BFD_RELOC_SCORE_CALL15 +@deffnx {} BFD_RELOC_SCORE_DUMMY_HI16 +Undocumented Score relocs +@end deffn +@deffn {} BFD_RELOC_IP2K_FR9 +Scenix IP2K - 9-bit register number / data address +@end deffn +@deffn {} BFD_RELOC_IP2K_BANK +Scenix IP2K - 4-bit register/data bank number +@end deffn +@deffn {} BFD_RELOC_IP2K_ADDR16CJP +Scenix IP2K - low 13 bits of instruction word address +@end deffn +@deffn {} BFD_RELOC_IP2K_PAGE3 +Scenix IP2K - high 3 bits of instruction word address +@end deffn +@deffn {} BFD_RELOC_IP2K_LO8DATA +@deffnx {} BFD_RELOC_IP2K_HI8DATA +@deffnx {} BFD_RELOC_IP2K_EX8DATA +Scenix IP2K - ext/low/high 8 bits of data address +@end deffn +@deffn {} BFD_RELOC_IP2K_LO8INSN +@deffnx {} BFD_RELOC_IP2K_HI8INSN +Scenix IP2K - low/high 8 bits of instruction word address +@end deffn +@deffn {} BFD_RELOC_IP2K_PC_SKIP +Scenix IP2K - even/odd PC modifier to modify snb pcl.0 +@end deffn +@deffn {} BFD_RELOC_IP2K_TEXT +Scenix IP2K - 16 bit word address in text section. +@end deffn +@deffn {} BFD_RELOC_IP2K_FR_OFFSET +Scenix IP2K - 7-bit sp or dp offset +@end deffn +@deffn {} BFD_RELOC_VPE4KMATH_DATA +@deffnx {} BFD_RELOC_VPE4KMATH_INSN +Scenix VPE4K coprocessor - data/insn-space addressing +@end deffn +@deffn {} BFD_RELOC_VTABLE_INHERIT +@deffnx {} BFD_RELOC_VTABLE_ENTRY +These two relocations are used by the linker to determine which of +the entries in a C++ virtual function table are actually used. When +the --gc-sections option is given, the linker will zero out the entries +that are not used, so that the code for those functions need not be +included in the output. + +VTABLE_INHERIT is a zero-space relocation used to describe to the +linker the inheritance tree of a C++ virtual function table. The +relocation's symbol should be the parent class' vtable, and the +relocation should be located at the child vtable. + +VTABLE_ENTRY is a zero-space relocation that describes the use of a +virtual function table entry. The reloc's symbol should refer to the +table of the class mentioned in the code. Off of that base, an offset +describes the entry that is being used. For Rela hosts, this offset +is stored in the reloc's addend. For Rel hosts, we are forced to put +this offset in the reloc's section offset. +@end deffn +@deffn {} BFD_RELOC_IA64_IMM14 +@deffnx {} BFD_RELOC_IA64_IMM22 +@deffnx {} BFD_RELOC_IA64_IMM64 +@deffnx {} BFD_RELOC_IA64_DIR32MSB +@deffnx {} BFD_RELOC_IA64_DIR32LSB +@deffnx {} BFD_RELOC_IA64_DIR64MSB +@deffnx {} BFD_RELOC_IA64_DIR64LSB +@deffnx {} BFD_RELOC_IA64_GPREL22 +@deffnx {} BFD_RELOC_IA64_GPREL64I +@deffnx {} BFD_RELOC_IA64_GPREL32MSB +@deffnx {} BFD_RELOC_IA64_GPREL32LSB +@deffnx {} BFD_RELOC_IA64_GPREL64MSB +@deffnx {} BFD_RELOC_IA64_GPREL64LSB +@deffnx {} BFD_RELOC_IA64_LTOFF22 +@deffnx {} BFD_RELOC_IA64_LTOFF64I +@deffnx {} BFD_RELOC_IA64_PLTOFF22 +@deffnx {} BFD_RELOC_IA64_PLTOFF64I +@deffnx {} BFD_RELOC_IA64_PLTOFF64MSB +@deffnx {} BFD_RELOC_IA64_PLTOFF64LSB +@deffnx {} BFD_RELOC_IA64_FPTR64I +@deffnx {} BFD_RELOC_IA64_FPTR32MSB +@deffnx {} BFD_RELOC_IA64_FPTR32LSB +@deffnx {} BFD_RELOC_IA64_FPTR64MSB +@deffnx {} BFD_RELOC_IA64_FPTR64LSB +@deffnx {} BFD_RELOC_IA64_PCREL21B +@deffnx {} BFD_RELOC_IA64_PCREL21BI +@deffnx {} BFD_RELOC_IA64_PCREL21M +@deffnx {} BFD_RELOC_IA64_PCREL21F +@deffnx {} BFD_RELOC_IA64_PCREL22 +@deffnx {} BFD_RELOC_IA64_PCREL60B +@deffnx {} BFD_RELOC_IA64_PCREL64I +@deffnx {} BFD_RELOC_IA64_PCREL32MSB +@deffnx {} BFD_RELOC_IA64_PCREL32LSB +@deffnx {} BFD_RELOC_IA64_PCREL64MSB +@deffnx {} BFD_RELOC_IA64_PCREL64LSB +@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR22 +@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64I +@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR32MSB +@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR32LSB +@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64MSB +@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64LSB +@deffnx {} BFD_RELOC_IA64_SEGREL32MSB +@deffnx {} BFD_RELOC_IA64_SEGREL32LSB +@deffnx {} BFD_RELOC_IA64_SEGREL64MSB +@deffnx {} BFD_RELOC_IA64_SEGREL64LSB +@deffnx {} BFD_RELOC_IA64_SECREL32MSB +@deffnx {} BFD_RELOC_IA64_SECREL32LSB +@deffnx {} BFD_RELOC_IA64_SECREL64MSB +@deffnx {} BFD_RELOC_IA64_SECREL64LSB +@deffnx {} BFD_RELOC_IA64_REL32MSB +@deffnx {} BFD_RELOC_IA64_REL32LSB +@deffnx {} BFD_RELOC_IA64_REL64MSB +@deffnx {} BFD_RELOC_IA64_REL64LSB +@deffnx {} BFD_RELOC_IA64_LTV32MSB +@deffnx {} BFD_RELOC_IA64_LTV32LSB +@deffnx {} BFD_RELOC_IA64_LTV64MSB +@deffnx {} BFD_RELOC_IA64_LTV64LSB +@deffnx {} BFD_RELOC_IA64_IPLTMSB +@deffnx {} BFD_RELOC_IA64_IPLTLSB +@deffnx {} BFD_RELOC_IA64_COPY +@deffnx {} BFD_RELOC_IA64_LTOFF22X +@deffnx {} BFD_RELOC_IA64_LDXMOV +@deffnx {} BFD_RELOC_IA64_TPREL14 +@deffnx {} BFD_RELOC_IA64_TPREL22 +@deffnx {} BFD_RELOC_IA64_TPREL64I +@deffnx {} BFD_RELOC_IA64_TPREL64MSB +@deffnx {} BFD_RELOC_IA64_TPREL64LSB +@deffnx {} BFD_RELOC_IA64_LTOFF_TPREL22 +@deffnx {} BFD_RELOC_IA64_DTPMOD64MSB +@deffnx {} BFD_RELOC_IA64_DTPMOD64LSB +@deffnx {} BFD_RELOC_IA64_LTOFF_DTPMOD22 +@deffnx {} BFD_RELOC_IA64_DTPREL14 +@deffnx {} BFD_RELOC_IA64_DTPREL22 +@deffnx {} BFD_RELOC_IA64_DTPREL64I +@deffnx {} BFD_RELOC_IA64_DTPREL32MSB +@deffnx {} BFD_RELOC_IA64_DTPREL32LSB +@deffnx {} BFD_RELOC_IA64_DTPREL64MSB +@deffnx {} BFD_RELOC_IA64_DTPREL64LSB +@deffnx {} BFD_RELOC_IA64_LTOFF_DTPREL22 +Intel IA64 Relocations. +@end deffn +@deffn {} BFD_RELOC_M68HC11_HI8 +Motorola 68HC11 reloc. +This is the 8 bit high part of an absolute address. +@end deffn +@deffn {} BFD_RELOC_M68HC11_LO8 +Motorola 68HC11 reloc. +This is the 8 bit low part of an absolute address. +@end deffn +@deffn {} BFD_RELOC_M68HC11_3B +Motorola 68HC11 reloc. +This is the 3 bit of a value. +@end deffn +@deffn {} BFD_RELOC_M68HC11_RL_JUMP +Motorola 68HC11 reloc. +This reloc marks the beginning of a jump/call instruction. +It is used for linker relaxation to correctly identify beginning +of instruction and change some branches to use PC-relative +addressing mode. +@end deffn +@deffn {} BFD_RELOC_M68HC11_RL_GROUP +Motorola 68HC11 reloc. +This reloc marks a group of several instructions that gcc generates +and for which the linker relaxation pass can modify and/or remove +some of them. +@end deffn +@deffn {} BFD_RELOC_M68HC11_LO16 +Motorola 68HC11 reloc. +This is the 16-bit lower part of an address. It is used for 'call' +instruction to specify the symbol address without any special +transformation (due to memory bank window). +@end deffn +@deffn {} BFD_RELOC_M68HC11_PAGE +Motorola 68HC11 reloc. +This is a 8-bit reloc that specifies the page number of an address. +It is used by 'call' instruction to specify the page number of +the symbol. +@end deffn +@deffn {} BFD_RELOC_M68HC11_24 +Motorola 68HC11 reloc. +This is a 24-bit reloc that represents the address with a 16-bit +value and a 8-bit page number. The symbol address is transformed +to follow the 16K memory bank of 68HC12 (seen as mapped in the window). +@end deffn +@deffn {} BFD_RELOC_M68HC12_5B +Motorola 68HC12 reloc. +This is the 5 bits of a value. +@end deffn +@deffn {} BFD_RELOC_16C_NUM08 +@deffnx {} BFD_RELOC_16C_NUM08_C +@deffnx {} BFD_RELOC_16C_NUM16 +@deffnx {} BFD_RELOC_16C_NUM16_C +@deffnx {} BFD_RELOC_16C_NUM32 +@deffnx {} BFD_RELOC_16C_NUM32_C +@deffnx {} BFD_RELOC_16C_DISP04 +@deffnx {} BFD_RELOC_16C_DISP04_C +@deffnx {} BFD_RELOC_16C_DISP08 +@deffnx {} BFD_RELOC_16C_DISP08_C +@deffnx {} BFD_RELOC_16C_DISP16 +@deffnx {} BFD_RELOC_16C_DISP16_C +@deffnx {} BFD_RELOC_16C_DISP24 +@deffnx {} BFD_RELOC_16C_DISP24_C +@deffnx {} BFD_RELOC_16C_DISP24a +@deffnx {} BFD_RELOC_16C_DISP24a_C +@deffnx {} BFD_RELOC_16C_REG04 +@deffnx {} BFD_RELOC_16C_REG04_C +@deffnx {} BFD_RELOC_16C_REG04a +@deffnx {} BFD_RELOC_16C_REG04a_C +@deffnx {} BFD_RELOC_16C_REG14 +@deffnx {} BFD_RELOC_16C_REG14_C +@deffnx {} BFD_RELOC_16C_REG16 +@deffnx {} BFD_RELOC_16C_REG16_C +@deffnx {} BFD_RELOC_16C_REG20 +@deffnx {} BFD_RELOC_16C_REG20_C +@deffnx {} BFD_RELOC_16C_ABS20 +@deffnx {} BFD_RELOC_16C_ABS20_C +@deffnx {} BFD_RELOC_16C_ABS24 +@deffnx {} BFD_RELOC_16C_ABS24_C +@deffnx {} BFD_RELOC_16C_IMM04 +@deffnx {} BFD_RELOC_16C_IMM04_C +@deffnx {} BFD_RELOC_16C_IMM16 +@deffnx {} BFD_RELOC_16C_IMM16_C +@deffnx {} BFD_RELOC_16C_IMM20 +@deffnx {} BFD_RELOC_16C_IMM20_C +@deffnx {} BFD_RELOC_16C_IMM24 +@deffnx {} BFD_RELOC_16C_IMM24_C +@deffnx {} BFD_RELOC_16C_IMM32 +@deffnx {} BFD_RELOC_16C_IMM32_C +NS CR16C Relocations. +@end deffn +@deffn {} BFD_RELOC_CR16_NUM8 +@deffnx {} BFD_RELOC_CR16_NUM16 +@deffnx {} BFD_RELOC_CR16_NUM32 +@deffnx {} BFD_RELOC_CR16_NUM32a +@deffnx {} BFD_RELOC_CR16_REGREL0 +@deffnx {} BFD_RELOC_CR16_REGREL4 +@deffnx {} BFD_RELOC_CR16_REGREL4a +@deffnx {} BFD_RELOC_CR16_REGREL14 +@deffnx {} BFD_RELOC_CR16_REGREL14a +@deffnx {} BFD_RELOC_CR16_REGREL16 +@deffnx {} BFD_RELOC_CR16_REGREL20 +@deffnx {} BFD_RELOC_CR16_REGREL20a +@deffnx {} BFD_RELOC_CR16_ABS20 +@deffnx {} BFD_RELOC_CR16_ABS24 +@deffnx {} BFD_RELOC_CR16_IMM4 +@deffnx {} BFD_RELOC_CR16_IMM8 +@deffnx {} BFD_RELOC_CR16_IMM16 +@deffnx {} BFD_RELOC_CR16_IMM20 +@deffnx {} BFD_RELOC_CR16_IMM24 +@deffnx {} BFD_RELOC_CR16_IMM32 +@deffnx {} BFD_RELOC_CR16_IMM32a +@deffnx {} BFD_RELOC_CR16_DISP4 +@deffnx {} BFD_RELOC_CR16_DISP8 +@deffnx {} BFD_RELOC_CR16_DISP16 +@deffnx {} BFD_RELOC_CR16_DISP20 +@deffnx {} BFD_RELOC_CR16_DISP24 +@deffnx {} BFD_RELOC_CR16_DISP24a +@deffnx {} BFD_RELOC_CR16_SWITCH8 +@deffnx {} BFD_RELOC_CR16_SWITCH16 +@deffnx {} BFD_RELOC_CR16_SWITCH32 +@deffnx {} BFD_RELOC_CR16_GOT_REGREL20 +@deffnx {} BFD_RELOC_CR16_GOTC_REGREL20 +@deffnx {} BFD_RELOC_CR16_GLOB_DAT +NS CR16 Relocations. +@end deffn +@deffn {} BFD_RELOC_CRX_REL4 +@deffnx {} BFD_RELOC_CRX_REL8 +@deffnx {} BFD_RELOC_CRX_REL8_CMP +@deffnx {} BFD_RELOC_CRX_REL16 +@deffnx {} BFD_RELOC_CRX_REL24 +@deffnx {} BFD_RELOC_CRX_REL32 +@deffnx {} BFD_RELOC_CRX_REGREL12 +@deffnx {} BFD_RELOC_CRX_REGREL22 +@deffnx {} BFD_RELOC_CRX_REGREL28 +@deffnx {} BFD_RELOC_CRX_REGREL32 +@deffnx {} BFD_RELOC_CRX_ABS16 +@deffnx {} BFD_RELOC_CRX_ABS32 +@deffnx {} BFD_RELOC_CRX_NUM8 +@deffnx {} BFD_RELOC_CRX_NUM16 +@deffnx {} BFD_RELOC_CRX_NUM32 +@deffnx {} BFD_RELOC_CRX_IMM16 +@deffnx {} BFD_RELOC_CRX_IMM32 +@deffnx {} BFD_RELOC_CRX_SWITCH8 +@deffnx {} BFD_RELOC_CRX_SWITCH16 +@deffnx {} BFD_RELOC_CRX_SWITCH32 +NS CRX Relocations. +@end deffn +@deffn {} BFD_RELOC_CRIS_BDISP8 +@deffnx {} BFD_RELOC_CRIS_UNSIGNED_5 +@deffnx {} BFD_RELOC_CRIS_SIGNED_6 +@deffnx {} BFD_RELOC_CRIS_UNSIGNED_6 +@deffnx {} BFD_RELOC_CRIS_SIGNED_8 +@deffnx {} BFD_RELOC_CRIS_UNSIGNED_8 +@deffnx {} BFD_RELOC_CRIS_SIGNED_16 +@deffnx {} BFD_RELOC_CRIS_UNSIGNED_16 +@deffnx {} BFD_RELOC_CRIS_LAPCQ_OFFSET +@deffnx {} BFD_RELOC_CRIS_UNSIGNED_4 +These relocs are only used within the CRIS assembler. They are not +(at present) written to any object files. +@end deffn +@deffn {} BFD_RELOC_CRIS_COPY +@deffnx {} BFD_RELOC_CRIS_GLOB_DAT +@deffnx {} BFD_RELOC_CRIS_JUMP_SLOT +@deffnx {} BFD_RELOC_CRIS_RELATIVE +Relocs used in ELF shared libraries for CRIS. +@end deffn +@deffn {} BFD_RELOC_CRIS_32_GOT +32-bit offset to symbol-entry within GOT. +@end deffn +@deffn {} BFD_RELOC_CRIS_16_GOT +16-bit offset to symbol-entry within GOT. +@end deffn +@deffn {} BFD_RELOC_CRIS_32_GOTPLT +32-bit offset to symbol-entry within GOT, with PLT handling. +@end deffn +@deffn {} BFD_RELOC_CRIS_16_GOTPLT +16-bit offset to symbol-entry within GOT, with PLT handling. +@end deffn +@deffn {} BFD_RELOC_CRIS_32_GOTREL +32-bit offset to symbol, relative to GOT. +@end deffn +@deffn {} BFD_RELOC_CRIS_32_PLT_GOTREL +32-bit offset to symbol with PLT entry, relative to GOT. +@end deffn +@deffn {} BFD_RELOC_CRIS_32_PLT_PCREL +32-bit offset to symbol with PLT entry, relative to this relocation. +@end deffn +@deffn {} BFD_RELOC_CRIS_32_GOT_GD +@deffnx {} BFD_RELOC_CRIS_16_GOT_GD +@deffnx {} BFD_RELOC_CRIS_32_GD +@deffnx {} BFD_RELOC_CRIS_DTP +@deffnx {} BFD_RELOC_CRIS_32_DTPREL +@deffnx {} BFD_RELOC_CRIS_16_DTPREL +@deffnx {} BFD_RELOC_CRIS_32_GOT_TPREL +@deffnx {} BFD_RELOC_CRIS_16_GOT_TPREL +@deffnx {} BFD_RELOC_CRIS_32_TPREL +@deffnx {} BFD_RELOC_CRIS_16_TPREL +@deffnx {} BFD_RELOC_CRIS_DTPMOD +@deffnx {} BFD_RELOC_CRIS_32_IE +Relocs used in TLS code for CRIS. +@end deffn +@deffn {} BFD_RELOC_860_COPY +@deffnx {} BFD_RELOC_860_GLOB_DAT +@deffnx {} BFD_RELOC_860_JUMP_SLOT +@deffnx {} BFD_RELOC_860_RELATIVE +@deffnx {} BFD_RELOC_860_PC26 +@deffnx {} BFD_RELOC_860_PLT26 +@deffnx {} BFD_RELOC_860_PC16 +@deffnx {} BFD_RELOC_860_LOW0 +@deffnx {} BFD_RELOC_860_SPLIT0 +@deffnx {} BFD_RELOC_860_LOW1 +@deffnx {} BFD_RELOC_860_SPLIT1 +@deffnx {} BFD_RELOC_860_LOW2 +@deffnx {} BFD_RELOC_860_SPLIT2 +@deffnx {} BFD_RELOC_860_LOW3 +@deffnx {} BFD_RELOC_860_LOGOT0 +@deffnx {} BFD_RELOC_860_SPGOT0 +@deffnx {} BFD_RELOC_860_LOGOT1 +@deffnx {} BFD_RELOC_860_SPGOT1 +@deffnx {} BFD_RELOC_860_LOGOTOFF0 +@deffnx {} BFD_RELOC_860_SPGOTOFF0 +@deffnx {} BFD_RELOC_860_LOGOTOFF1 +@deffnx {} BFD_RELOC_860_SPGOTOFF1 +@deffnx {} BFD_RELOC_860_LOGOTOFF2 +@deffnx {} BFD_RELOC_860_LOGOTOFF3 +@deffnx {} BFD_RELOC_860_LOPC +@deffnx {} BFD_RELOC_860_HIGHADJ +@deffnx {} BFD_RELOC_860_HAGOT +@deffnx {} BFD_RELOC_860_HAGOTOFF +@deffnx {} BFD_RELOC_860_HAPC +@deffnx {} BFD_RELOC_860_HIGH +@deffnx {} BFD_RELOC_860_HIGOT +@deffnx {} BFD_RELOC_860_HIGOTOFF +Intel i860 Relocations. +@end deffn +@deffn {} BFD_RELOC_OPENRISC_ABS_26 +@deffnx {} BFD_RELOC_OPENRISC_REL_26 +OpenRISC Relocations. +@end deffn +@deffn {} BFD_RELOC_H8_DIR16A8 +@deffnx {} BFD_RELOC_H8_DIR16R8 +@deffnx {} BFD_RELOC_H8_DIR24A8 +@deffnx {} BFD_RELOC_H8_DIR24R8 +@deffnx {} BFD_RELOC_H8_DIR32A16 +H8 elf Relocations. +@end deffn +@deffn {} BFD_RELOC_XSTORMY16_REL_12 +@deffnx {} BFD_RELOC_XSTORMY16_12 +@deffnx {} BFD_RELOC_XSTORMY16_24 +@deffnx {} BFD_RELOC_XSTORMY16_FPTR16 +Sony Xstormy16 Relocations. +@end deffn +@deffn {} BFD_RELOC_RELC +Self-describing complex relocations. +@end deffn +@deffn {} BFD_RELOC_XC16X_PAG +@deffnx {} BFD_RELOC_XC16X_POF +@deffnx {} BFD_RELOC_XC16X_SEG +@deffnx {} BFD_RELOC_XC16X_SOF +Infineon Relocations. +@end deffn +@deffn {} BFD_RELOC_VAX_GLOB_DAT +@deffnx {} BFD_RELOC_VAX_JMP_SLOT +@deffnx {} BFD_RELOC_VAX_RELATIVE +Relocations used by VAX ELF. +@end deffn +@deffn {} BFD_RELOC_MT_PC16 +Morpho MT - 16 bit immediate relocation. +@end deffn +@deffn {} BFD_RELOC_MT_HI16 +Morpho MT - Hi 16 bits of an address. +@end deffn +@deffn {} BFD_RELOC_MT_LO16 +Morpho MT - Low 16 bits of an address. +@end deffn +@deffn {} BFD_RELOC_MT_GNU_VTINHERIT +Morpho MT - Used to tell the linker which vtable entries are used. +@end deffn +@deffn {} BFD_RELOC_MT_GNU_VTENTRY +Morpho MT - Used to tell the linker which vtable entries are used. +@end deffn +@deffn {} BFD_RELOC_MT_PCINSN8 +Morpho MT - 8 bit immediate relocation. +@end deffn +@deffn {} BFD_RELOC_MSP430_10_PCREL +@deffnx {} BFD_RELOC_MSP430_16_PCREL +@deffnx {} BFD_RELOC_MSP430_16 +@deffnx {} BFD_RELOC_MSP430_16_PCREL_BYTE +@deffnx {} BFD_RELOC_MSP430_16_BYTE +@deffnx {} BFD_RELOC_MSP430_2X_PCREL +@deffnx {} BFD_RELOC_MSP430_RL_PCREL +msp430 specific relocation codes +@end deffn +@deffn {} BFD_RELOC_IQ2000_OFFSET_16 +@deffnx {} BFD_RELOC_IQ2000_OFFSET_21 +@deffnx {} BFD_RELOC_IQ2000_UHI16 +IQ2000 Relocations. +@end deffn +@deffn {} BFD_RELOC_XTENSA_RTLD +Special Xtensa relocation used only by PLT entries in ELF shared +objects to indicate that the runtime linker should set the value +to one of its own internal functions or data structures. +@end deffn +@deffn {} BFD_RELOC_XTENSA_GLOB_DAT +@deffnx {} BFD_RELOC_XTENSA_JMP_SLOT +@deffnx {} BFD_RELOC_XTENSA_RELATIVE +Xtensa relocations for ELF shared objects. +@end deffn +@deffn {} BFD_RELOC_XTENSA_PLT +Xtensa relocation used in ELF object files for symbols that may require +PLT entries. Otherwise, this is just a generic 32-bit relocation. +@end deffn +@deffn {} BFD_RELOC_XTENSA_DIFF8 +@deffnx {} BFD_RELOC_XTENSA_DIFF16 +@deffnx {} BFD_RELOC_XTENSA_DIFF32 +Xtensa relocations to mark the difference of two local symbols. +These are only needed to support linker relaxation and can be ignored +when not relaxing. The field is set to the value of the difference +assuming no relaxation. The relocation encodes the position of the +first symbol so the linker can determine whether to adjust the field +value. +@end deffn +@deffn {} BFD_RELOC_XTENSA_SLOT0_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT1_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT2_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT3_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT4_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT5_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT6_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT7_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT8_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT9_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT10_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT11_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT12_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT13_OP +@deffnx {} BFD_RELOC_XTENSA_SLOT14_OP +Generic Xtensa relocations for instruction operands. Only the slot +number is encoded in the relocation. The relocation applies to the +last PC-relative immediate operand, or if there are no PC-relative +immediates, to the last immediate operand. +@end deffn +@deffn {} BFD_RELOC_XTENSA_SLOT0_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT1_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT2_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT3_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT4_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT5_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT6_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT7_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT8_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT9_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT10_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT11_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT12_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT13_ALT +@deffnx {} BFD_RELOC_XTENSA_SLOT14_ALT +Alternate Xtensa relocations. Only the slot is encoded in the +relocation. The meaning of these relocations is opcode-specific. +@end deffn +@deffn {} BFD_RELOC_XTENSA_OP0 +@deffnx {} BFD_RELOC_XTENSA_OP1 +@deffnx {} BFD_RELOC_XTENSA_OP2 +Xtensa relocations for backward compatibility. These have all been +replaced by BFD_RELOC_XTENSA_SLOT0_OP. +@end deffn +@deffn {} BFD_RELOC_XTENSA_ASM_EXPAND +Xtensa relocation to mark that the assembler expanded the +instructions from an original target. The expansion size is +encoded in the reloc size. +@end deffn +@deffn {} BFD_RELOC_XTENSA_ASM_SIMPLIFY +Xtensa relocation to mark that the linker should simplify +assembler-expanded instructions. This is commonly used +internally by the linker after analysis of a +BFD_RELOC_XTENSA_ASM_EXPAND. +@end deffn +@deffn {} BFD_RELOC_XTENSA_TLSDESC_FN +@deffnx {} BFD_RELOC_XTENSA_TLSDESC_ARG +@deffnx {} BFD_RELOC_XTENSA_TLS_DTPOFF +@deffnx {} BFD_RELOC_XTENSA_TLS_TPOFF +@deffnx {} BFD_RELOC_XTENSA_TLS_FUNC +@deffnx {} BFD_RELOC_XTENSA_TLS_ARG +@deffnx {} BFD_RELOC_XTENSA_TLS_CALL +Xtensa TLS relocations. +@end deffn +@deffn {} BFD_RELOC_Z80_DISP8 +8 bit signed offset in (ix+d) or (iy+d). +@end deffn +@deffn {} BFD_RELOC_Z8K_DISP7 +DJNZ offset. +@end deffn +@deffn {} BFD_RELOC_Z8K_CALLR +CALR offset. +@end deffn +@deffn {} BFD_RELOC_Z8K_IMM4L +4 bit value. +@end deffn +@deffn {} BFD_RELOC_LM32_CALL +@deffnx {} BFD_RELOC_LM32_BRANCH +@deffnx {} BFD_RELOC_LM32_16_GOT +@deffnx {} BFD_RELOC_LM32_GOTOFF_HI16 +@deffnx {} BFD_RELOC_LM32_GOTOFF_LO16 +@deffnx {} BFD_RELOC_LM32_COPY +@deffnx {} BFD_RELOC_LM32_GLOB_DAT +@deffnx {} BFD_RELOC_LM32_JMP_SLOT +@deffnx {} BFD_RELOC_LM32_RELATIVE +Lattice Mico32 relocations. +@end deffn +@deffn {} BFD_RELOC_MACH_O_SECTDIFF +Difference between two section addreses. Must be followed by a +BFD_RELOC_MACH_O_PAIR. +@end deffn +@deffn {} BFD_RELOC_MACH_O_PAIR +Pair of relocation. Contains the first symbol. +@end deffn +@deffn {} BFD_RELOC_MACH_O_X86_64_BRANCH32 +@deffnx {} BFD_RELOC_MACH_O_X86_64_BRANCH8 +PCREL relocations. They are marked as branch to create PLT entry if +required. +@end deffn +@deffn {} BFD_RELOC_MACH_O_X86_64_GOT +Used when referencing a GOT entry. +@end deffn +@deffn {} BFD_RELOC_MACH_O_X86_64_GOT_LOAD +Used when loading a GOT entry with movq. It is specially marked so that +the linker could optimize the movq to a leaq if possible. +@end deffn +@deffn {} BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32 +Symbol will be substracted. Must be followed by a BFD_RELOC_64. +@end deffn +@deffn {} BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64 +Symbol will be substracted. Must be followed by a BFD_RELOC_64. +@end deffn +@deffn {} BFD_RELOC_MACH_O_X86_64_PCREL32_1 +Same as BFD_RELOC_32_PCREL but with an implicit -1 addend. +@end deffn +@deffn {} BFD_RELOC_MACH_O_X86_64_PCREL32_2 +Same as BFD_RELOC_32_PCREL but with an implicit -2 addend. +@end deffn +@deffn {} BFD_RELOC_MACH_O_X86_64_PCREL32_4 +Same as BFD_RELOC_32_PCREL but with an implicit -4 addend. +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_32_LO +This is a 32 bit reloc for the microblaze that stores the +low 16 bits of a value +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_32_LO_PCREL +This is a 32 bit pc-relative reloc for the microblaze that +stores the low 16 bits of a value +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_32_ROSDA +This is a 32 bit reloc for the microblaze that stores a +value relative to the read-only small data area anchor +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_32_RWSDA +This is a 32 bit reloc for the microblaze that stores a +value relative to the read-write small data area anchor +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM +This is a 32 bit reloc for the microblaze to handle +expressions of the form "Symbol Op Symbol" +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_64_NONE +This is a 64 bit reloc that stores the 32 bit pc relative +value in two words (with an imm instruction). No relocation is +done here - only used for relaxing +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_64_GOTPC +This is a 64 bit reloc that stores the 32 bit pc relative +value in two words (with an imm instruction). The relocation is +PC-relative GOT offset +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_64_GOT +This is a 64 bit reloc that stores the 32 bit pc relative +value in two words (with an imm instruction). The relocation is +GOT offset +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_64_PLT +This is a 64 bit reloc that stores the 32 bit pc relative +value in two words (with an imm instruction). The relocation is +PC-relative offset into PLT +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_64_GOTOFF +This is a 64 bit reloc that stores the 32 bit GOT relative +value in two words (with an imm instruction). The relocation is +relative offset from _GLOBAL_OFFSET_TABLE_ +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_32_GOTOFF +This is a 32 bit reloc that stores the 32 bit GOT relative +value in a word. The relocation is relative offset from +@end deffn +@deffn {} BFD_RELOC_MICROBLAZE_COPY +This is used to tell the dynamic linker to copy the value out of +the dynamic object into the runtime process image. +@end deffn +@deffn {} BFD_RELOC_TILEPRO_COPY +@deffnx {} BFD_RELOC_TILEPRO_GLOB_DAT +@deffnx {} BFD_RELOC_TILEPRO_JMP_SLOT +@deffnx {} BFD_RELOC_TILEPRO_RELATIVE +@deffnx {} BFD_RELOC_TILEPRO_BROFF_X1 +@deffnx {} BFD_RELOC_TILEPRO_JOFFLONG_X1 +@deffnx {} BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT +@deffnx {} BFD_RELOC_TILEPRO_IMM8_X0 +@deffnx {} BFD_RELOC_TILEPRO_IMM8_Y0 +@deffnx {} BFD_RELOC_TILEPRO_IMM8_X1 +@deffnx {} BFD_RELOC_TILEPRO_IMM8_Y1 +@deffnx {} BFD_RELOC_TILEPRO_DEST_IMM8_X1 +@deffnx {} BFD_RELOC_TILEPRO_MT_IMM15_X1 +@deffnx {} BFD_RELOC_TILEPRO_MF_IMM15_X1 +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0 +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1 +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_LO +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_LO +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_HI +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_HI +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_HA +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_HA +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_PCREL +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_PCREL +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_GOT +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_GOT +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA +@deffnx {} BFD_RELOC_TILEPRO_MMSTART_X0 +@deffnx {} BFD_RELOC_TILEPRO_MMEND_X0 +@deffnx {} BFD_RELOC_TILEPRO_MMSTART_X1 +@deffnx {} BFD_RELOC_TILEPRO_MMEND_X1 +@deffnx {} BFD_RELOC_TILEPRO_SHAMT_X0 +@deffnx {} BFD_RELOC_TILEPRO_SHAMT_X1 +@deffnx {} BFD_RELOC_TILEPRO_SHAMT_Y0 +@deffnx {} BFD_RELOC_TILEPRO_SHAMT_Y1 +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA +@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA +@deffnx {} BFD_RELOC_TILEPRO_TLS_DTPMOD32 +@deffnx {} BFD_RELOC_TILEPRO_TLS_DTPOFF32 +@deffnx {} BFD_RELOC_TILEPRO_TLS_TPOFF32 +Tilera TILEPro Relocations. +@end deffn +@deffn {} BFD_RELOC_TILEGX_HW0 +@deffnx {} BFD_RELOC_TILEGX_HW1 +@deffnx {} BFD_RELOC_TILEGX_HW2 +@deffnx {} BFD_RELOC_TILEGX_HW3 +@deffnx {} BFD_RELOC_TILEGX_HW0_LAST +@deffnx {} BFD_RELOC_TILEGX_HW1_LAST +@deffnx {} BFD_RELOC_TILEGX_HW2_LAST +@deffnx {} BFD_RELOC_TILEGX_COPY +@deffnx {} BFD_RELOC_TILEGX_GLOB_DAT +@deffnx {} BFD_RELOC_TILEGX_JMP_SLOT +@deffnx {} BFD_RELOC_TILEGX_RELATIVE +@deffnx {} BFD_RELOC_TILEGX_BROFF_X1 +@deffnx {} BFD_RELOC_TILEGX_JUMPOFF_X1 +@deffnx {} BFD_RELOC_TILEGX_JUMPOFF_X1_PLT +@deffnx {} BFD_RELOC_TILEGX_IMM8_X0 +@deffnx {} BFD_RELOC_TILEGX_IMM8_Y0 +@deffnx {} BFD_RELOC_TILEGX_IMM8_X1 +@deffnx {} BFD_RELOC_TILEGX_IMM8_Y1 +@deffnx {} BFD_RELOC_TILEGX_DEST_IMM8_X1 +@deffnx {} BFD_RELOC_TILEGX_MT_IMM14_X1 +@deffnx {} BFD_RELOC_TILEGX_MF_IMM14_X1 +@deffnx {} BFD_RELOC_TILEGX_MMSTART_X0 +@deffnx {} BFD_RELOC_TILEGX_MMEND_X0 +@deffnx {} BFD_RELOC_TILEGX_SHAMT_X0 +@deffnx {} BFD_RELOC_TILEGX_SHAMT_X1 +@deffnx {} BFD_RELOC_TILEGX_SHAMT_Y0 +@deffnx {} BFD_RELOC_TILEGX_SHAMT_Y1 +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0 +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0 +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1 +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1 +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2 +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2 +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW3 +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW3 +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE +@deffnx {} BFD_RELOC_TILEGX_TLS_DTPMOD64 +@deffnx {} BFD_RELOC_TILEGX_TLS_DTPOFF64 +@deffnx {} BFD_RELOC_TILEGX_TLS_TPOFF64 +@deffnx {} BFD_RELOC_TILEGX_TLS_DTPMOD32 +@deffnx {} BFD_RELOC_TILEGX_TLS_DTPOFF32 +@deffnx {} BFD_RELOC_TILEGX_TLS_TPOFF32 +Tilera TILE-Gx Relocations. +@end deffn + +@example + +typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; +@end example +@findex bfd_reloc_type_lookup +@subsubsection @code{bfd_reloc_type_lookup} +@strong{Synopsis} +@example +reloc_howto_type *bfd_reloc_type_lookup + (bfd *abfd, bfd_reloc_code_real_type code); +reloc_howto_type *bfd_reloc_name_lookup + (bfd *abfd, const char *reloc_name); +@end example +@strong{Description}@* +Return a pointer to a howto structure which, when +invoked, will perform the relocation @var{code} on data from the +architecture noted. + +@findex bfd_default_reloc_type_lookup +@subsubsection @code{bfd_default_reloc_type_lookup} +@strong{Synopsis} +@example +reloc_howto_type *bfd_default_reloc_type_lookup + (bfd *abfd, bfd_reloc_code_real_type code); +@end example +@strong{Description}@* +Provides a default relocation lookup routine for any architecture. + +@findex bfd_get_reloc_code_name +@subsubsection @code{bfd_get_reloc_code_name} +@strong{Synopsis} +@example +const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code); +@end example +@strong{Description}@* +Provides a printable name for the supplied relocation code. +Useful mainly for printing error messages. + +@findex bfd_generic_relax_section +@subsubsection @code{bfd_generic_relax_section} +@strong{Synopsis} +@example +bfd_boolean bfd_generic_relax_section + (bfd *abfd, + asection *section, + struct bfd_link_info *, + bfd_boolean *); +@end example +@strong{Description}@* +Provides default handling for relaxing for back ends which +don't do relaxing. + +@findex bfd_generic_gc_sections +@subsubsection @code{bfd_generic_gc_sections} +@strong{Synopsis} +@example +bfd_boolean bfd_generic_gc_sections + (bfd *, struct bfd_link_info *); +@end example +@strong{Description}@* +Provides default handling for relaxing for back ends which +don't do section gc -- i.e., does nothing. + +@findex bfd_generic_lookup_section_flags +@subsubsection @code{bfd_generic_lookup_section_flags} +@strong{Synopsis} +@example +void bfd_generic_lookup_section_flags + (struct bfd_link_info *, struct flag_info *); +@end example +@strong{Description}@* +Provides default handling for section flags lookup +-- i.e., does nothing. + +@findex bfd_generic_merge_sections +@subsubsection @code{bfd_generic_merge_sections} +@strong{Synopsis} +@example +bfd_boolean bfd_generic_merge_sections + (bfd *, struct bfd_link_info *); +@end example +@strong{Description}@* +Provides default handling for SEC_MERGE section merging for back ends +which don't have SEC_MERGE support -- i.e., does nothing. + +@findex bfd_generic_get_relocated_section_contents +@subsubsection @code{bfd_generic_get_relocated_section_contents} +@strong{Synopsis} +@example +bfd_byte *bfd_generic_get_relocated_section_contents + (bfd *abfd, + struct bfd_link_info *link_info, + struct bfd_link_order *link_order, + bfd_byte *data, + bfd_boolean relocatable, + asymbol **symbols); +@end example +@strong{Description}@* +Provides default handling of relocation effort for back ends +which can't be bothered to do it efficiently. + diff --git a/bfd/doc/section.texi b/bfd/doc/section.texi new file mode 100644 index 0000000..5013701 --- /dev/null +++ b/bfd/doc/section.texi @@ -0,0 +1,1029 @@ +@section Sections +The raw data contained within a BFD is maintained through the +section abstraction. A single BFD may have any number of +sections. It keeps hold of them by pointing to the first; +each one points to the next in the list. + +Sections are supported in BFD in @code{section.c}. + +@menu +* Section Input:: +* Section Output:: +* typedef asection:: +* section prototypes:: +@end menu + +@node Section Input, Section Output, Sections, Sections +@subsection Section input +When a BFD is opened for reading, the section structures are +created and attached to the BFD. + +Each section has a name which describes the section in the +outside world---for example, @code{a.out} would contain at least +three sections, called @code{.text}, @code{.data} and @code{.bss}. + +Names need not be unique; for example a COFF file may have several +sections named @code{.data}. + +Sometimes a BFD will contain more than the ``natural'' number of +sections. A back end may attach other sections containing +constructor data, or an application may add a section (using +@code{bfd_make_section}) to the sections attached to an already open +BFD. For example, the linker creates an extra section +@code{COMMON} for each input file's BFD to hold information about +common storage. + +The raw data is not necessarily read in when +the section descriptor is created. Some targets may leave the +data in place until a @code{bfd_get_section_contents} call is +made. Other back ends may read in all the data at once. For +example, an S-record file has to be read once to determine the +size of the data. An IEEE-695 file doesn't contain raw data in +sections, but data and relocation expressions intermixed, so +the data area has to be parsed to get out the data and +relocations. + +@node Section Output, typedef asection, Section Input, Sections +@subsection Section output +To write a new object style BFD, the various sections to be +written have to be created. They are attached to the BFD in +the same way as input sections; data is written to the +sections using @code{bfd_set_section_contents}. + +Any program that creates or combines sections (e.g., the assembler +and linker) must use the @code{asection} fields @code{output_section} and +@code{output_offset} to indicate the file sections to which each +section must be written. (If the section is being created from +scratch, @code{output_section} should probably point to the section +itself and @code{output_offset} should probably be zero.) + +The data to be written comes from input sections attached +(via @code{output_section} pointers) to +the output sections. The output section structure can be +considered a filter for the input section: the output section +determines the vma of the output data and the name, but the +input section determines the offset into the output section of +the data to be written. + +E.g., to create a section "O", starting at 0x100, 0x123 long, +containing two subsections, "A" at offset 0x0 (i.e., at vma +0x100) and "B" at offset 0x20 (i.e., at vma 0x120) the @code{asection} +structures would look like: + +@example + section name "A" + output_offset 0x00 + size 0x20 + output_section -----------> section name "O" + | vma 0x100 + section name "B" | size 0x123 + output_offset 0x20 | + size 0x103 | + output_section --------| +@end example + +@subsection Link orders +The data within a section is stored in a @dfn{link_order}. +These are much like the fixups in @code{gas}. The link_order +abstraction allows a section to grow and shrink within itself. + +A link_order knows how big it is, and which is the next +link_order and where the raw data for it is; it also points to +a list of relocations which apply to it. + +The link_order is used by the linker to perform relaxing on +final code. The compiler creates code which is as big as +necessary to make it work without relaxing, and the user can +select whether to relax. Sometimes relaxing takes a lot of +time. The linker runs around the relocations to see if any +are attached to data which can be shrunk, if so it does it on +a link_order by link_order basis. + + +@node typedef asection, section prototypes, Section Output, Sections +@subsection typedef asection +Here is the section structure: + + +@example + +typedef struct bfd_section +@{ + /* The name of the section; the name isn't a copy, the pointer is + the same as that passed to bfd_make_section. */ + const char *name; + + /* A unique sequence number. */ + int id; + + /* Which section in the bfd; 0..n-1 as sections are created in a bfd. */ + int index; + + /* The next section in the list belonging to the BFD, or NULL. */ + struct bfd_section *next; + + /* The previous section in the list belonging to the BFD, or NULL. */ + struct bfd_section *prev; + + /* The field flags contains attributes of the section. Some + flags are read in from the object file, and some are + synthesized from other information. */ + flagword flags; + +#define SEC_NO_FLAGS 0x000 + + /* Tells the OS to allocate space for this section when loading. + This is clear for a section containing debug information only. */ +#define SEC_ALLOC 0x001 + + /* Tells the OS to load the section from the file when loading. + This is clear for a .bss section. */ +#define SEC_LOAD 0x002 + + /* The section contains data still to be relocated, so there is + some relocation information too. */ +#define SEC_RELOC 0x004 + + /* A signal to the OS that the section contains read only data. */ +#define SEC_READONLY 0x008 + + /* The section contains code only. */ +#define SEC_CODE 0x010 + + /* The section contains data only. */ +#define SEC_DATA 0x020 + + /* The section will reside in ROM. */ +#define SEC_ROM 0x040 + + /* The section contains constructor information. This section + type is used by the linker to create lists of constructors and + destructors used by @code{g++}. When a back end sees a symbol + which should be used in a constructor list, it creates a new + section for the type of name (e.g., @code{__CTOR_LIST__}), attaches + the symbol to it, and builds a relocation. To build the lists + of constructors, all the linker has to do is catenate all the + sections called @code{__CTOR_LIST__} and relocate the data + contained within - exactly the operations it would peform on + standard data. */ +#define SEC_CONSTRUCTOR 0x080 + + /* The section has contents - a data section could be + @code{SEC_ALLOC} | @code{SEC_HAS_CONTENTS}; a debug section could be + @code{SEC_HAS_CONTENTS} */ +#define SEC_HAS_CONTENTS 0x100 + + /* An instruction to the linker to not output the section + even if it has information which would normally be written. */ +#define SEC_NEVER_LOAD 0x200 + + /* The section contains thread local data. */ +#define SEC_THREAD_LOCAL 0x400 + + /* The section has GOT references. This flag is only for the + linker, and is currently only used by the elf32-hppa back end. + It will be set if global offset table references were detected + in this section, which indicate to the linker that the section + contains PIC code, and must be handled specially when doing a + static link. */ +#define SEC_HAS_GOT_REF 0x800 + + /* The section contains common symbols (symbols may be defined + multiple times, the value of a symbol is the amount of + space it requires, and the largest symbol value is the one + used). Most targets have exactly one of these (which we + translate to bfd_com_section_ptr), but ECOFF has two. */ +#define SEC_IS_COMMON 0x1000 + + /* The section contains only debugging information. For + example, this is set for ELF .debug and .stab sections. + strip tests this flag to see if a section can be + discarded. */ +#define SEC_DEBUGGING 0x2000 + + /* The contents of this section are held in memory pointed to + by the contents field. This is checked by bfd_get_section_contents, + and the data is retrieved from memory if appropriate. */ +#define SEC_IN_MEMORY 0x4000 + + /* The contents of this section are to be excluded by the + linker for executable and shared objects unless those + objects are to be further relocated. */ +#define SEC_EXCLUDE 0x8000 + + /* The contents of this section are to be sorted based on the sum of + the symbol and addend values specified by the associated relocation + entries. Entries without associated relocation entries will be + appended to the end of the section in an unspecified order. */ +#define SEC_SORT_ENTRIES 0x10000 + + /* When linking, duplicate sections of the same name should be + discarded, rather than being combined into a single section as + is usually done. This is similar to how common symbols are + handled. See SEC_LINK_DUPLICATES below. */ +#define SEC_LINK_ONCE 0x20000 + + /* If SEC_LINK_ONCE is set, this bitfield describes how the linker + should handle duplicate sections. */ +#define SEC_LINK_DUPLICATES 0xc0000 + + /* This value for SEC_LINK_DUPLICATES means that duplicate + sections with the same name should simply be discarded. */ +#define SEC_LINK_DUPLICATES_DISCARD 0x0 + + /* This value for SEC_LINK_DUPLICATES means that the linker + should warn if there are any duplicate sections, although + it should still only link one copy. */ +#define SEC_LINK_DUPLICATES_ONE_ONLY 0x40000 + + /* This value for SEC_LINK_DUPLICATES means that the linker + should warn if any duplicate sections are a different size. */ +#define SEC_LINK_DUPLICATES_SAME_SIZE 0x80000 + + /* This value for SEC_LINK_DUPLICATES means that the linker + should warn if any duplicate sections contain different + contents. */ +#define SEC_LINK_DUPLICATES_SAME_CONTENTS \ + (SEC_LINK_DUPLICATES_ONE_ONLY | SEC_LINK_DUPLICATES_SAME_SIZE) + + /* This section was created by the linker as part of dynamic + relocation or other arcane processing. It is skipped when + going through the first-pass output, trusting that someone + else up the line will take care of it later. */ +#define SEC_LINKER_CREATED 0x100000 + + /* This section should not be subject to garbage collection. + Also set to inform the linker that this section should not be + listed in the link map as discarded. */ +#define SEC_KEEP 0x200000 + + /* This section contains "short" data, and should be placed + "near" the GP. */ +#define SEC_SMALL_DATA 0x400000 + + /* Attempt to merge identical entities in the section. + Entity size is given in the entsize field. */ +#define SEC_MERGE 0x800000 + + /* If given with SEC_MERGE, entities to merge are zero terminated + strings where entsize specifies character size instead of fixed + size entries. */ +#define SEC_STRINGS 0x1000000 + + /* This section contains data about section groups. */ +#define SEC_GROUP 0x2000000 + + /* The section is a COFF shared library section. This flag is + only for the linker. If this type of section appears in + the input file, the linker must copy it to the output file + without changing the vma or size. FIXME: Although this + was originally intended to be general, it really is COFF + specific (and the flag was renamed to indicate this). It + might be cleaner to have some more general mechanism to + allow the back end to control what the linker does with + sections. */ +#define SEC_COFF_SHARED_LIBRARY 0x4000000 + + /* This input section should be copied to output in reverse order + as an array of pointers. This is for ELF linker internal use + only. */ +#define SEC_ELF_REVERSE_COPY 0x4000000 + + /* This section contains data which may be shared with other + executables or shared objects. This is for COFF only. */ +#define SEC_COFF_SHARED 0x8000000 + + /* When a section with this flag is being linked, then if the size of + the input section is less than a page, it should not cross a page + boundary. If the size of the input section is one page or more, + it should be aligned on a page boundary. This is for TI + TMS320C54X only. */ +#define SEC_TIC54X_BLOCK 0x10000000 + + /* Conditionally link this section; do not link if there are no + references found to any symbol in the section. This is for TI + TMS320C54X only. */ +#define SEC_TIC54X_CLINK 0x20000000 + + /* Indicate that section has the no read flag set. This happens + when memory read flag isn't set. */ +#define SEC_COFF_NOREAD 0x40000000 + + /* End of section flags. */ + + /* Some internal packed boolean fields. */ + + /* See the vma field. */ + unsigned int user_set_vma : 1; + + /* A mark flag used by some of the linker backends. */ + unsigned int linker_mark : 1; + + /* Another mark flag used by some of the linker backends. Set for + output sections that have an input section. */ + unsigned int linker_has_input : 1; + + /* Mark flag used by some linker backends for garbage collection. */ + unsigned int gc_mark : 1; + + /* Section compression status. */ + unsigned int compress_status : 2; +#define COMPRESS_SECTION_NONE 0 +#define COMPRESS_SECTION_DONE 1 +#define DECOMPRESS_SECTION_SIZED 2 + + /* The following flags are used by the ELF linker. */ + + /* Mark sections which have been allocated to segments. */ + unsigned int segment_mark : 1; + + /* Type of sec_info information. */ + unsigned int sec_info_type:3; +#define ELF_INFO_TYPE_NONE 0 +#define ELF_INFO_TYPE_STABS 1 +#define ELF_INFO_TYPE_MERGE 2 +#define ELF_INFO_TYPE_EH_FRAME 3 +#define ELF_INFO_TYPE_JUST_SYMS 4 + + /* Nonzero if this section uses RELA relocations, rather than REL. */ + unsigned int use_rela_p:1; + + /* Bits used by various backends. The generic code doesn't touch + these fields. */ + + unsigned int sec_flg0:1; + unsigned int sec_flg1:1; + unsigned int sec_flg2:1; + unsigned int sec_flg3:1; + unsigned int sec_flg4:1; + unsigned int sec_flg5:1; + + /* End of internal packed boolean fields. */ + + /* The virtual memory address of the section - where it will be + at run time. The symbols are relocated against this. The + user_set_vma flag is maintained by bfd; if it's not set, the + backend can assign addresses (for example, in @code{a.out}, where + the default address for @code{.data} is dependent on the specific + target and various flags). */ + bfd_vma vma; + + /* The load address of the section - where it would be in a + rom image; really only used for writing section header + information. */ + bfd_vma lma; + + /* The size of the section in octets, as it will be output. + Contains a value even if the section has no contents (e.g., the + size of @code{.bss}). */ + bfd_size_type size; + + /* For input sections, the original size on disk of the section, in + octets. This field should be set for any section whose size is + changed by linker relaxation. It is required for sections where + the linker relaxation scheme doesn't cache altered section and + reloc contents (stabs, eh_frame, SEC_MERGE, some coff relaxing + targets), and thus the original size needs to be kept to read the + section multiple times. For output sections, rawsize holds the + section size calculated on a previous linker relaxation pass. */ + bfd_size_type rawsize; + + /* The compressed size of the section in octets. */ + bfd_size_type compressed_size; + + /* Relaxation table. */ + struct relax_table *relax; + + /* Count of used relaxation table entries. */ + int relax_count; + + + /* If this section is going to be output, then this value is the + offset in *bytes* into the output section of the first byte in the + input section (byte ==> smallest addressable unit on the + target). In most cases, if this was going to start at the + 100th octet (8-bit quantity) in the output section, this value + would be 100. However, if the target byte size is 16 bits + (bfd_octets_per_byte is "2"), this value would be 50. */ + bfd_vma output_offset; + + /* The output section through which to map on output. */ + struct bfd_section *output_section; + + /* The alignment requirement of the section, as an exponent of 2 - + e.g., 3 aligns to 2^3 (or 8). */ + unsigned int alignment_power; + + /* If an input section, a pointer to a vector of relocation + records for the data in this section. */ + struct reloc_cache_entry *relocation; + + /* If an output section, a pointer to a vector of pointers to + relocation records for the data in this section. */ + struct reloc_cache_entry **orelocation; + + /* The number of relocation records in one of the above. */ + unsigned reloc_count; + + /* Information below is back end specific - and not always used + or updated. */ + + /* File position of section data. */ + file_ptr filepos; + + /* File position of relocation info. */ + file_ptr rel_filepos; + + /* File position of line data. */ + file_ptr line_filepos; + + /* Pointer to data for applications. */ + void *userdata; + + /* If the SEC_IN_MEMORY flag is set, this points to the actual + contents. */ + unsigned char *contents; + + /* Attached line number information. */ + alent *lineno; + + /* Number of line number records. */ + unsigned int lineno_count; + + /* Entity size for merging purposes. */ + unsigned int entsize; + + /* Points to the kept section if this section is a link-once section, + and is discarded. */ + struct bfd_section *kept_section; + + /* When a section is being output, this value changes as more + linenumbers are written out. */ + file_ptr moving_line_filepos; + + /* What the section number is in the target world. */ + int target_index; + + void *used_by_bfd; + + /* If this is a constructor section then here is a list of the + relocations created to relocate items within it. */ + struct relent_chain *constructor_chain; + + /* The BFD which owns the section. */ + bfd *owner; + + /* INPUT_SECTION_FLAGS if specified in the linker script. */ + struct flag_info *section_flag_info; + + /* A symbol which points at this section only. */ + struct bfd_symbol *symbol; + struct bfd_symbol **symbol_ptr_ptr; + + /* Early in the link process, map_head and map_tail are used to build + a list of input sections attached to an output section. Later, + output sections use these fields for a list of bfd_link_order + structs. */ + union @{ + struct bfd_link_order *link_order; + struct bfd_section *s; + @} map_head, map_tail; +@} asection; + +/* Relax table contains information about instructions which can + be removed by relaxation -- replacing a long address with a + short address. */ +struct relax_table @{ + /* Address where bytes may be deleted. */ + bfd_vma addr; + + /* Number of bytes to be deleted. */ + int size; +@}; + +/* These sections are global, and are managed by BFD. The application + and target back end are not permitted to change the values in + these sections. New code should use the section_ptr macros rather + than referring directly to the const sections. The const sections + may eventually vanish. */ +#define BFD_ABS_SECTION_NAME "*ABS*" +#define BFD_UND_SECTION_NAME "*UND*" +#define BFD_COM_SECTION_NAME "*COM*" +#define BFD_IND_SECTION_NAME "*IND*" + +/* The absolute section. */ +extern asection bfd_abs_section; +#define bfd_abs_section_ptr ((asection *) &bfd_abs_section) +#define bfd_is_abs_section(sec) ((sec) == bfd_abs_section_ptr) +/* Pointer to the undefined section. */ +extern asection bfd_und_section; +#define bfd_und_section_ptr ((asection *) &bfd_und_section) +#define bfd_is_und_section(sec) ((sec) == bfd_und_section_ptr) +/* Pointer to the common section. */ +extern asection bfd_com_section; +#define bfd_com_section_ptr ((asection *) &bfd_com_section) +/* Pointer to the indirect section. */ +extern asection bfd_ind_section; +#define bfd_ind_section_ptr ((asection *) &bfd_ind_section) +#define bfd_is_ind_section(sec) ((sec) == bfd_ind_section_ptr) + +#define bfd_is_const_section(SEC) \ + ( ((SEC) == bfd_abs_section_ptr) \ + || ((SEC) == bfd_und_section_ptr) \ + || ((SEC) == bfd_com_section_ptr) \ + || ((SEC) == bfd_ind_section_ptr)) + +/* Macros to handle insertion and deletion of a bfd's sections. These + only handle the list pointers, ie. do not adjust section_count, + target_index etc. */ +#define bfd_section_list_remove(ABFD, S) \ + do \ + @{ \ + asection *_s = S; \ + asection *_next = _s->next; \ + asection *_prev = _s->prev; \ + if (_prev) \ + _prev->next = _next; \ + else \ + (ABFD)->sections = _next; \ + if (_next) \ + _next->prev = _prev; \ + else \ + (ABFD)->section_last = _prev; \ + @} \ + while (0) +#define bfd_section_list_append(ABFD, S) \ + do \ + @{ \ + asection *_s = S; \ + bfd *_abfd = ABFD; \ + _s->next = NULL; \ + if (_abfd->section_last) \ + @{ \ + _s->prev = _abfd->section_last; \ + _abfd->section_last->next = _s; \ + @} \ + else \ + @{ \ + _s->prev = NULL; \ + _abfd->sections = _s; \ + @} \ + _abfd->section_last = _s; \ + @} \ + while (0) +#define bfd_section_list_prepend(ABFD, S) \ + do \ + @{ \ + asection *_s = S; \ + bfd *_abfd = ABFD; \ + _s->prev = NULL; \ + if (_abfd->sections) \ + @{ \ + _s->next = _abfd->sections; \ + _abfd->sections->prev = _s; \ + @} \ + else \ + @{ \ + _s->next = NULL; \ + _abfd->section_last = _s; \ + @} \ + _abfd->sections = _s; \ + @} \ + while (0) +#define bfd_section_list_insert_after(ABFD, A, S) \ + do \ + @{ \ + asection *_a = A; \ + asection *_s = S; \ + asection *_next = _a->next; \ + _s->next = _next; \ + _s->prev = _a; \ + _a->next = _s; \ + if (_next) \ + _next->prev = _s; \ + else \ + (ABFD)->section_last = _s; \ + @} \ + while (0) +#define bfd_section_list_insert_before(ABFD, B, S) \ + do \ + @{ \ + asection *_b = B; \ + asection *_s = S; \ + asection *_prev = _b->prev; \ + _s->prev = _prev; \ + _s->next = _b; \ + _b->prev = _s; \ + if (_prev) \ + _prev->next = _s; \ + else \ + (ABFD)->sections = _s; \ + @} \ + while (0) +#define bfd_section_removed_from_list(ABFD, S) \ + ((S)->next == NULL ? (ABFD)->section_last != (S) : (S)->next->prev != (S)) + +#define BFD_FAKE_SECTION(SEC, FLAGS, SYM, NAME, IDX) \ + /* name, id, index, next, prev, flags, user_set_vma, */ \ + @{ NAME, IDX, 0, NULL, NULL, FLAGS, 0, \ + \ + /* linker_mark, linker_has_input, gc_mark, decompress_status, */ \ + 0, 0, 1, 0, \ + \ + /* segment_mark, sec_info_type, use_rela_p, */ \ + 0, 0, 0, \ + \ + /* sec_flg0, sec_flg1, sec_flg2, sec_flg3, sec_flg4, sec_flg5, */ \ + 0, 0, 0, 0, 0, 0, \ + \ + /* vma, lma, size, rawsize, compressed_size, relax, relax_count, */ \ + 0, 0, 0, 0, 0, 0, 0, \ + \ + /* output_offset, output_section, alignment_power, */ \ + 0, (struct bfd_section *) &SEC, 0, \ + \ + /* relocation, orelocation, reloc_count, filepos, rel_filepos, */ \ + NULL, NULL, 0, 0, 0, \ + \ + /* line_filepos, userdata, contents, lineno, lineno_count, */ \ + 0, NULL, NULL, NULL, 0, \ + \ + /* entsize, kept_section, moving_line_filepos, */ \ + 0, NULL, 0, \ + \ + /* target_index, used_by_bfd, constructor_chain, owner, */ \ + 0, NULL, NULL, NULL, \ + \ + /* flag_info, */ \ + NULL, \ + \ + /* symbol, symbol_ptr_ptr, */ \ + (struct bfd_symbol *) SYM, &SEC.symbol, \ + \ + /* map_head, map_tail */ \ + @{ NULL @}, @{ NULL @} \ + @} + +@end example + +@node section prototypes, , typedef asection, Sections +@subsection Section prototypes +These are the functions exported by the section handling part of BFD. + +@findex bfd_section_list_clear +@subsubsection @code{bfd_section_list_clear} +@strong{Synopsis} +@example +void bfd_section_list_clear (bfd *); +@end example +@strong{Description}@* +Clears the section list, and also resets the section count and +hash table entries. + +@findex bfd_get_section_by_name +@subsubsection @code{bfd_get_section_by_name} +@strong{Synopsis} +@example +asection *bfd_get_section_by_name (bfd *abfd, const char *name); +@end example +@strong{Description}@* +Run through @var{abfd} and return the one of the +@code{asection}s whose name matches @var{name}, otherwise @code{NULL}. +@xref{Sections}, for more information. + +This should only be used in special cases; the normal way to process +all sections of a given name is to use @code{bfd_map_over_sections} and +@code{strcmp} on the name (or better yet, base it on the section flags +or something else) for each section. + +@findex bfd_get_section_by_name_if +@subsubsection @code{bfd_get_section_by_name_if} +@strong{Synopsis} +@example +asection *bfd_get_section_by_name_if + (bfd *abfd, + const char *name, + bfd_boolean (*func) (bfd *abfd, asection *sect, void *obj), + void *obj); +@end example +@strong{Description}@* +Call the provided function @var{func} for each section +attached to the BFD @var{abfd} whose name matches @var{name}, +passing @var{obj} as an argument. The function will be called +as if by + +@example + func (abfd, the_section, obj); +@end example + +It returns the first section for which @var{func} returns true, +otherwise @code{NULL}. + +@findex bfd_get_unique_section_name +@subsubsection @code{bfd_get_unique_section_name} +@strong{Synopsis} +@example +char *bfd_get_unique_section_name + (bfd *abfd, const char *templat, int *count); +@end example +@strong{Description}@* +Invent a section name that is unique in @var{abfd} by tacking +a dot and a digit suffix onto the original @var{templat}. If +@var{count} is non-NULL, then it specifies the first number +tried as a suffix to generate a unique name. The value +pointed to by @var{count} will be incremented in this case. + +@findex bfd_make_section_old_way +@subsubsection @code{bfd_make_section_old_way} +@strong{Synopsis} +@example +asection *bfd_make_section_old_way (bfd *abfd, const char *name); +@end example +@strong{Description}@* +Create a new empty section called @var{name} +and attach it to the end of the chain of sections for the +BFD @var{abfd}. An attempt to create a section with a name which +is already in use returns its pointer without changing the +section chain. + +It has the funny name since this is the way it used to be +before it was rewritten.... + +Possible errors are: +@itemize @bullet + +@item +@code{bfd_error_invalid_operation} - +If output has already started for this BFD. +@item +@code{bfd_error_no_memory} - +If memory allocation fails. +@end itemize + +@findex bfd_make_section_anyway_with_flags +@subsubsection @code{bfd_make_section_anyway_with_flags} +@strong{Synopsis} +@example +asection *bfd_make_section_anyway_with_flags + (bfd *abfd, const char *name, flagword flags); +@end example +@strong{Description}@* +Create a new empty section called @var{name} and attach it to the end of +the chain of sections for @var{abfd}. Create a new section even if there +is already a section with that name. Also set the attributes of the +new section to the value @var{flags}. + +Return @code{NULL} and set @code{bfd_error} on error; possible errors are: +@itemize @bullet + +@item +@code{bfd_error_invalid_operation} - If output has already started for @var{abfd}. +@item +@code{bfd_error_no_memory} - If memory allocation fails. +@end itemize + +@findex bfd_make_section_anyway +@subsubsection @code{bfd_make_section_anyway} +@strong{Synopsis} +@example +asection *bfd_make_section_anyway (bfd *abfd, const char *name); +@end example +@strong{Description}@* +Create a new empty section called @var{name} and attach it to the end of +the chain of sections for @var{abfd}. Create a new section even if there +is already a section with that name. + +Return @code{NULL} and set @code{bfd_error} on error; possible errors are: +@itemize @bullet + +@item +@code{bfd_error_invalid_operation} - If output has already started for @var{abfd}. +@item +@code{bfd_error_no_memory} - If memory allocation fails. +@end itemize + +@findex bfd_make_section_with_flags +@subsubsection @code{bfd_make_section_with_flags} +@strong{Synopsis} +@example +asection *bfd_make_section_with_flags + (bfd *, const char *name, flagword flags); +@end example +@strong{Description}@* +Like @code{bfd_make_section_anyway}, but return @code{NULL} (without calling +bfd_set_error ()) without changing the section chain if there is already a +section named @var{name}. Also set the attributes of the new section to +the value @var{flags}. If there is an error, return @code{NULL} and set +@code{bfd_error}. + +@findex bfd_make_section +@subsubsection @code{bfd_make_section} +@strong{Synopsis} +@example +asection *bfd_make_section (bfd *, const char *name); +@end example +@strong{Description}@* +Like @code{bfd_make_section_anyway}, but return @code{NULL} (without calling +bfd_set_error ()) without changing the section chain if there is already a +section named @var{name}. If there is an error, return @code{NULL} and set +@code{bfd_error}. + +@findex bfd_set_section_flags +@subsubsection @code{bfd_set_section_flags} +@strong{Synopsis} +@example +bfd_boolean bfd_set_section_flags + (bfd *abfd, asection *sec, flagword flags); +@end example +@strong{Description}@* +Set the attributes of the section @var{sec} in the BFD +@var{abfd} to the value @var{flags}. Return @code{TRUE} on success, +@code{FALSE} on error. Possible error returns are: + +@itemize @bullet + +@item +@code{bfd_error_invalid_operation} - +The section cannot have one or more of the attributes +requested. For example, a .bss section in @code{a.out} may not +have the @code{SEC_HAS_CONTENTS} field set. +@end itemize + +@findex bfd_rename_section +@subsubsection @code{bfd_rename_section} +@strong{Synopsis} +@example +void bfd_rename_section + (bfd *abfd, asection *sec, const char *newname); +@end example +@strong{Description}@* +Rename section @var{sec} in @var{abfd} to @var{newname}. + +@findex bfd_map_over_sections +@subsubsection @code{bfd_map_over_sections} +@strong{Synopsis} +@example +void bfd_map_over_sections + (bfd *abfd, + void (*func) (bfd *abfd, asection *sect, void *obj), + void *obj); +@end example +@strong{Description}@* +Call the provided function @var{func} for each section +attached to the BFD @var{abfd}, passing @var{obj} as an +argument. The function will be called as if by + +@example + func (abfd, the_section, obj); +@end example + +This is the preferred method for iterating over sections; an +alternative would be to use a loop: + +@example + section *p; + for (p = abfd->sections; p != NULL; p = p->next) + func (abfd, p, ...) +@end example + +@findex bfd_sections_find_if +@subsubsection @code{bfd_sections_find_if} +@strong{Synopsis} +@example +asection *bfd_sections_find_if + (bfd *abfd, + bfd_boolean (*operation) (bfd *abfd, asection *sect, void *obj), + void *obj); +@end example +@strong{Description}@* +Call the provided function @var{operation} for each section +attached to the BFD @var{abfd}, passing @var{obj} as an +argument. The function will be called as if by + +@example + operation (abfd, the_section, obj); +@end example + +It returns the first section for which @var{operation} returns true. + +@findex bfd_set_section_size +@subsubsection @code{bfd_set_section_size} +@strong{Synopsis} +@example +bfd_boolean bfd_set_section_size + (bfd *abfd, asection *sec, bfd_size_type val); +@end example +@strong{Description}@* +Set @var{sec} to the size @var{val}. If the operation is +ok, then @code{TRUE} is returned, else @code{FALSE}. + +Possible error returns: +@itemize @bullet + +@item +@code{bfd_error_invalid_operation} - +Writing has started to the BFD, so setting the size is invalid. +@end itemize + +@findex bfd_set_section_contents +@subsubsection @code{bfd_set_section_contents} +@strong{Synopsis} +@example +bfd_boolean bfd_set_section_contents + (bfd *abfd, asection *section, const void *data, + file_ptr offset, bfd_size_type count); +@end example +@strong{Description}@* +Sets the contents of the section @var{section} in BFD +@var{abfd} to the data starting in memory at @var{data}. The +data is written to the output section starting at offset +@var{offset} for @var{count} octets. + +Normally @code{TRUE} is returned, else @code{FALSE}. Possible error +returns are: +@itemize @bullet + +@item +@code{bfd_error_no_contents} - +The output section does not have the @code{SEC_HAS_CONTENTS} +attribute, so nothing can be written to it. +@item +and some more too +@end itemize +This routine is front end to the back end function +@code{_bfd_set_section_contents}. + +@findex bfd_get_section_contents +@subsubsection @code{bfd_get_section_contents} +@strong{Synopsis} +@example +bfd_boolean bfd_get_section_contents + (bfd *abfd, asection *section, void *location, file_ptr offset, + bfd_size_type count); +@end example +@strong{Description}@* +Read data from @var{section} in BFD @var{abfd} +into memory starting at @var{location}. The data is read at an +offset of @var{offset} from the start of the input section, +and is read for @var{count} bytes. + +If the contents of a constructor with the @code{SEC_CONSTRUCTOR} +flag set are requested or if the section does not have the +@code{SEC_HAS_CONTENTS} flag set, then the @var{location} is filled +with zeroes. If no errors occur, @code{TRUE} is returned, else +@code{FALSE}. + +@findex bfd_malloc_and_get_section +@subsubsection @code{bfd_malloc_and_get_section} +@strong{Synopsis} +@example +bfd_boolean bfd_malloc_and_get_section + (bfd *abfd, asection *section, bfd_byte **buf); +@end example +@strong{Description}@* +Read all data from @var{section} in BFD @var{abfd} +into a buffer, *@var{buf}, malloc'd by this function. + +@findex bfd_copy_private_section_data +@subsubsection @code{bfd_copy_private_section_data} +@strong{Synopsis} +@example +bfd_boolean bfd_copy_private_section_data + (bfd *ibfd, asection *isec, bfd *obfd, asection *osec); +@end example +@strong{Description}@* +Copy private section information from @var{isec} in the BFD +@var{ibfd} to the section @var{osec} in the BFD @var{obfd}. +Return @code{TRUE} on success, @code{FALSE} on error. Possible error +returns are: + +@itemize @bullet + +@item +@code{bfd_error_no_memory} - +Not enough memory exists to create private data for @var{osec}. +@end itemize +@example +#define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \ + BFD_SEND (obfd, _bfd_copy_private_section_data, \ + (ibfd, isection, obfd, osection)) +@end example + +@findex bfd_generic_is_group_section +@subsubsection @code{bfd_generic_is_group_section} +@strong{Synopsis} +@example +bfd_boolean bfd_generic_is_group_section (bfd *, const asection *sec); +@end example +@strong{Description}@* +Returns TRUE if @var{sec} is a member of a group. + +@findex bfd_generic_discard_group +@subsubsection @code{bfd_generic_discard_group} +@strong{Synopsis} +@example +bfd_boolean bfd_generic_discard_group (bfd *abfd, asection *group); +@end example +@strong{Description}@* +Remove all members of @var{group} from the output. + diff --git a/bfd/doc/syms.texi b/bfd/doc/syms.texi new file mode 100644 index 0000000..d5dc659 --- /dev/null +++ b/bfd/doc/syms.texi @@ -0,0 +1,479 @@ +@section Symbols +BFD tries to maintain as much symbol information as it can when +it moves information from file to file. BFD passes information +to applications though the @code{asymbol} structure. When the +application requests the symbol table, BFD reads the table in +the native form and translates parts of it into the internal +format. To maintain more than the information passed to +applications, some targets keep some information ``behind the +scenes'' in a structure only the particular back end knows +about. For example, the coff back end keeps the original +symbol table structure as well as the canonical structure when +a BFD is read in. On output, the coff back end can reconstruct +the output symbol table so that no information is lost, even +information unique to coff which BFD doesn't know or +understand. If a coff symbol table were read, but were written +through an a.out back end, all the coff specific information +would be lost. The symbol table of a BFD +is not necessarily read in until a canonicalize request is +made. Then the BFD back end fills in a table provided by the +application with pointers to the canonical information. To +output symbols, the application provides BFD with a table of +pointers to pointers to @code{asymbol}s. This allows applications +like the linker to output a symbol as it was read, since the ``behind +the scenes'' information will be still available. +@menu +* Reading Symbols:: +* Writing Symbols:: +* Mini Symbols:: +* typedef asymbol:: +* symbol handling functions:: +@end menu + +@node Reading Symbols, Writing Symbols, Symbols, Symbols +@subsection Reading symbols +There are two stages to reading a symbol table from a BFD: +allocating storage, and the actual reading process. This is an +excerpt from an application which reads the symbol table: + +@example + long storage_needed; + asymbol **symbol_table; + long number_of_symbols; + long i; + + storage_needed = bfd_get_symtab_upper_bound (abfd); + + if (storage_needed < 0) + FAIL + + if (storage_needed == 0) + return; + + symbol_table = xmalloc (storage_needed); + ... + number_of_symbols = + bfd_canonicalize_symtab (abfd, symbol_table); + + if (number_of_symbols < 0) + FAIL + + for (i = 0; i < number_of_symbols; i++) + process_symbol (symbol_table[i]); +@end example + +All storage for the symbols themselves is in an objalloc +connected to the BFD; it is freed when the BFD is closed. + +@node Writing Symbols, Mini Symbols, Reading Symbols, Symbols +@subsection Writing symbols +Writing of a symbol table is automatic when a BFD open for +writing is closed. The application attaches a vector of +pointers to pointers to symbols to the BFD being written, and +fills in the symbol count. The close and cleanup code reads +through the table provided and performs all the necessary +operations. The BFD output code must always be provided with an +``owned'' symbol: one which has come from another BFD, or one +which has been created using @code{bfd_make_empty_symbol}. Here is an +example showing the creation of a symbol table with only one element: + +@example + #include "bfd.h" + int main (void) + @{ + bfd *abfd; + asymbol *ptrs[2]; + asymbol *new; + + abfd = bfd_openw ("foo","a.out-sunos-big"); + bfd_set_format (abfd, bfd_object); + new = bfd_make_empty_symbol (abfd); + new->name = "dummy_symbol"; + new->section = bfd_make_section_old_way (abfd, ".text"); + new->flags = BSF_GLOBAL; + new->value = 0x12345; + + ptrs[0] = new; + ptrs[1] = 0; + + bfd_set_symtab (abfd, ptrs, 1); + bfd_close (abfd); + return 0; + @} + + ./makesym + nm foo + 00012345 A dummy_symbol +@end example + +Many formats cannot represent arbitrary symbol information; for +instance, the @code{a.out} object format does not allow an +arbitrary number of sections. A symbol pointing to a section +which is not one of @code{.text}, @code{.data} or @code{.bss} cannot +be described. + +@node Mini Symbols, typedef asymbol, Writing Symbols, Symbols +@subsection Mini Symbols +Mini symbols provide read-only access to the symbol table. +They use less memory space, but require more time to access. +They can be useful for tools like nm or objdump, which may +have to handle symbol tables of extremely large executables. + +The @code{bfd_read_minisymbols} function will read the symbols +into memory in an internal form. It will return a @code{void *} +pointer to a block of memory, a symbol count, and the size of +each symbol. The pointer is allocated using @code{malloc}, and +should be freed by the caller when it is no longer needed. + +The function @code{bfd_minisymbol_to_symbol} will take a pointer +to a minisymbol, and a pointer to a structure returned by +@code{bfd_make_empty_symbol}, and return a @code{asymbol} structure. +The return value may or may not be the same as the value from +@code{bfd_make_empty_symbol} which was passed in. + + +@node typedef asymbol, symbol handling functions, Mini Symbols, Symbols +@subsection typedef asymbol +An @code{asymbol} has the form: + + +@example + +typedef struct bfd_symbol +@{ + /* A pointer to the BFD which owns the symbol. This information + is necessary so that a back end can work out what additional + information (invisible to the application writer) is carried + with the symbol. + + This field is *almost* redundant, since you can use section->owner + instead, except that some symbols point to the global sections + bfd_@{abs,com,und@}_section. This could be fixed by making + these globals be per-bfd (or per-target-flavor). FIXME. */ + struct bfd *the_bfd; /* Use bfd_asymbol_bfd(sym) to access this field. */ + + /* The text of the symbol. The name is left alone, and not copied; the + application may not alter it. */ + const char *name; + + /* The value of the symbol. This really should be a union of a + numeric value with a pointer, since some flags indicate that + a pointer to another symbol is stored here. */ + symvalue value; + + /* Attributes of a symbol. */ +#define BSF_NO_FLAGS 0x00 + + /* The symbol has local scope; @code{static} in @code{C}. The value + is the offset into the section of the data. */ +#define BSF_LOCAL (1 << 0) + + /* The symbol has global scope; initialized data in @code{C}. The + value is the offset into the section of the data. */ +#define BSF_GLOBAL (1 << 1) + + /* The symbol has global scope and is exported. The value is + the offset into the section of the data. */ +#define BSF_EXPORT BSF_GLOBAL /* No real difference. */ + + /* A normal C symbol would be one of: + @code{BSF_LOCAL}, @code{BSF_COMMON}, @code{BSF_UNDEFINED} or + @code{BSF_GLOBAL}. */ + + /* The symbol is a debugging record. The value has an arbitrary + meaning, unless BSF_DEBUGGING_RELOC is also set. */ +#define BSF_DEBUGGING (1 << 2) + + /* The symbol denotes a function entry point. Used in ELF, + perhaps others someday. */ +#define BSF_FUNCTION (1 << 3) + + /* Used by the linker. */ +#define BSF_KEEP (1 << 5) +#define BSF_KEEP_G (1 << 6) + + /* A weak global symbol, overridable without warnings by + a regular global symbol of the same name. */ +#define BSF_WEAK (1 << 7) + + /* This symbol was created to point to a section, e.g. ELF's + STT_SECTION symbols. */ +#define BSF_SECTION_SYM (1 << 8) + + /* The symbol used to be a common symbol, but now it is + allocated. */ +#define BSF_OLD_COMMON (1 << 9) + + /* In some files the type of a symbol sometimes alters its + location in an output file - ie in coff a @code{ISFCN} symbol + which is also @code{C_EXT} symbol appears where it was + declared and not at the end of a section. This bit is set + by the target BFD part to convey this information. */ +#define BSF_NOT_AT_END (1 << 10) + + /* Signal that the symbol is the label of constructor section. */ +#define BSF_CONSTRUCTOR (1 << 11) + + /* Signal that the symbol is a warning symbol. The name is a + warning. The name of the next symbol is the one to warn about; + if a reference is made to a symbol with the same name as the next + symbol, a warning is issued by the linker. */ +#define BSF_WARNING (1 << 12) + + /* Signal that the symbol is indirect. This symbol is an indirect + pointer to the symbol with the same name as the next symbol. */ +#define BSF_INDIRECT (1 << 13) + + /* BSF_FILE marks symbols that contain a file name. This is used + for ELF STT_FILE symbols. */ +#define BSF_FILE (1 << 14) + + /* Symbol is from dynamic linking information. */ +#define BSF_DYNAMIC (1 << 15) + + /* The symbol denotes a data object. Used in ELF, and perhaps + others someday. */ +#define BSF_OBJECT (1 << 16) + + /* This symbol is a debugging symbol. The value is the offset + into the section of the data. BSF_DEBUGGING should be set + as well. */ +#define BSF_DEBUGGING_RELOC (1 << 17) + + /* This symbol is thread local. Used in ELF. */ +#define BSF_THREAD_LOCAL (1 << 18) + + /* This symbol represents a complex relocation expression, + with the expression tree serialized in the symbol name. */ +#define BSF_RELC (1 << 19) + + /* This symbol represents a signed complex relocation expression, + with the expression tree serialized in the symbol name. */ +#define BSF_SRELC (1 << 20) + + /* This symbol was created by bfd_get_synthetic_symtab. */ +#define BSF_SYNTHETIC (1 << 21) + + /* This symbol is an indirect code object. Unrelated to BSF_INDIRECT. + The dynamic linker will compute the value of this symbol by + calling the function that it points to. BSF_FUNCTION must + also be also set. */ +#define BSF_GNU_INDIRECT_FUNCTION (1 << 22) + /* This symbol is a globally unique data object. The dynamic linker + will make sure that in the entire process there is just one symbol + with this name and type in use. BSF_OBJECT must also be set. */ +#define BSF_GNU_UNIQUE (1 << 23) + + flagword flags; + + /* A pointer to the section to which this symbol is + relative. This will always be non NULL, there are special + sections for undefined and absolute symbols. */ + struct bfd_section *section; + + /* Back end special data. */ + union + @{ + void *p; + bfd_vma i; + @} + udata; +@} +asymbol; + +@end example + +@node symbol handling functions, , typedef asymbol, Symbols +@subsection Symbol handling functions + + +@findex bfd_get_symtab_upper_bound +@subsubsection @code{bfd_get_symtab_upper_bound} +@strong{Description}@* +Return the number of bytes required to store a vector of pointers +to @code{asymbols} for all the symbols in the BFD @var{abfd}, +including a terminal NULL pointer. If there are no symbols in +the BFD, then return 0. If an error occurs, return -1. +@example +#define bfd_get_symtab_upper_bound(abfd) \ + BFD_SEND (abfd, _bfd_get_symtab_upper_bound, (abfd)) + +@end example + +@findex bfd_is_local_label +@subsubsection @code{bfd_is_local_label} +@strong{Synopsis} +@example +bfd_boolean bfd_is_local_label (bfd *abfd, asymbol *sym); +@end example +@strong{Description}@* +Return TRUE if the given symbol @var{sym} in the BFD @var{abfd} is +a compiler generated local label, else return FALSE. + +@findex bfd_is_local_label_name +@subsubsection @code{bfd_is_local_label_name} +@strong{Synopsis} +@example +bfd_boolean bfd_is_local_label_name (bfd *abfd, const char *name); +@end example +@strong{Description}@* +Return TRUE if a symbol with the name @var{name} in the BFD +@var{abfd} is a compiler generated local label, else return +FALSE. This just checks whether the name has the form of a +local label. +@example +#define bfd_is_local_label_name(abfd, name) \ + BFD_SEND (abfd, _bfd_is_local_label_name, (abfd, name)) + +@end example + +@findex bfd_is_target_special_symbol +@subsubsection @code{bfd_is_target_special_symbol} +@strong{Synopsis} +@example +bfd_boolean bfd_is_target_special_symbol (bfd *abfd, asymbol *sym); +@end example +@strong{Description}@* +Return TRUE iff a symbol @var{sym} in the BFD @var{abfd} is something +special to the particular target represented by the BFD. Such symbols +should normally not be mentioned to the user. +@example +#define bfd_is_target_special_symbol(abfd, sym) \ + BFD_SEND (abfd, _bfd_is_target_special_symbol, (abfd, sym)) + +@end example + +@findex bfd_canonicalize_symtab +@subsubsection @code{bfd_canonicalize_symtab} +@strong{Description}@* +Read the symbols from the BFD @var{abfd}, and fills in +the vector @var{location} with pointers to the symbols and +a trailing NULL. +Return the actual number of symbol pointers, not +including the NULL. +@example +#define bfd_canonicalize_symtab(abfd, location) \ + BFD_SEND (abfd, _bfd_canonicalize_symtab, (abfd, location)) + +@end example + +@findex bfd_set_symtab +@subsubsection @code{bfd_set_symtab} +@strong{Synopsis} +@example +bfd_boolean bfd_set_symtab + (bfd *abfd, asymbol **location, unsigned int count); +@end example +@strong{Description}@* +Arrange that when the output BFD @var{abfd} is closed, +the table @var{location} of @var{count} pointers to symbols +will be written. + +@findex bfd_print_symbol_vandf +@subsubsection @code{bfd_print_symbol_vandf} +@strong{Synopsis} +@example +void bfd_print_symbol_vandf (bfd *abfd, void *file, asymbol *symbol); +@end example +@strong{Description}@* +Print the value and flags of the @var{symbol} supplied to the +stream @var{file}. + +@findex bfd_make_empty_symbol +@subsubsection @code{bfd_make_empty_symbol} +@strong{Description}@* +Create a new @code{asymbol} structure for the BFD @var{abfd} +and return a pointer to it. + +This routine is necessary because each back end has private +information surrounding the @code{asymbol}. Building your own +@code{asymbol} and pointing to it will not create the private +information, and will cause problems later on. +@example +#define bfd_make_empty_symbol(abfd) \ + BFD_SEND (abfd, _bfd_make_empty_symbol, (abfd)) + +@end example + +@findex _bfd_generic_make_empty_symbol +@subsubsection @code{_bfd_generic_make_empty_symbol} +@strong{Synopsis} +@example +asymbol *_bfd_generic_make_empty_symbol (bfd *); +@end example +@strong{Description}@* +Create a new @code{asymbol} structure for the BFD @var{abfd} +and return a pointer to it. Used by core file routines, +binary back-end and anywhere else where no private info +is needed. + +@findex bfd_make_debug_symbol +@subsubsection @code{bfd_make_debug_symbol} +@strong{Description}@* +Create a new @code{asymbol} structure for the BFD @var{abfd}, +to be used as a debugging symbol. Further details of its use have +yet to be worked out. +@example +#define bfd_make_debug_symbol(abfd,ptr,size) \ + BFD_SEND (abfd, _bfd_make_debug_symbol, (abfd, ptr, size)) + +@end example + +@findex bfd_decode_symclass +@subsubsection @code{bfd_decode_symclass} +@strong{Description}@* +Return a character corresponding to the symbol +class of @var{symbol}, or '?' for an unknown class. + +@strong{Synopsis} +@example +int bfd_decode_symclass (asymbol *symbol); +@end example +@findex bfd_is_undefined_symclass +@subsubsection @code{bfd_is_undefined_symclass} +@strong{Description}@* +Returns non-zero if the class symbol returned by +bfd_decode_symclass represents an undefined symbol. +Returns zero otherwise. + +@strong{Synopsis} +@example +bfd_boolean bfd_is_undefined_symclass (int symclass); +@end example +@findex bfd_symbol_info +@subsubsection @code{bfd_symbol_info} +@strong{Description}@* +Fill in the basic info about symbol that nm needs. +Additional info may be added by the back-ends after +calling this function. + +@strong{Synopsis} +@example +void bfd_symbol_info (asymbol *symbol, symbol_info *ret); +@end example +@findex bfd_copy_private_symbol_data +@subsubsection @code{bfd_copy_private_symbol_data} +@strong{Synopsis} +@example +bfd_boolean bfd_copy_private_symbol_data + (bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym); +@end example +@strong{Description}@* +Copy private symbol information from @var{isym} in the BFD +@var{ibfd} to the symbol @var{osym} in the BFD @var{obfd}. +Return @code{TRUE} on success, @code{FALSE} on error. Possible error +returns are: + +@itemize @bullet + +@item +@code{bfd_error_no_memory} - +Not enough memory exists to create private data for @var{osec}. +@end itemize +@example +#define bfd_copy_private_symbol_data(ibfd, isymbol, obfd, osymbol) \ + BFD_SEND (obfd, _bfd_copy_private_symbol_data, \ + (ibfd, isymbol, obfd, osymbol)) + +@end example + diff --git a/bfd/doc/targets.texi b/bfd/doc/targets.texi new file mode 100644 index 0000000..b25f2f8 --- /dev/null +++ b/bfd/doc/targets.texi @@ -0,0 +1,616 @@ +@section Targets + + +@strong{Description}@* +Each port of BFD to a different machine requires the creation +of a target back end. All the back end provides to the root +part of BFD is a structure containing pointers to functions +which perform certain low level operations on files. BFD +translates the applications's requests through a pointer into +calls to the back end routines. + +When a file is opened with @code{bfd_openr}, its format and +target are unknown. BFD uses various mechanisms to determine +how to interpret the file. The operations performed are: + +@itemize @bullet + +@item +Create a BFD by calling the internal routine +@code{_bfd_new_bfd}, then call @code{bfd_find_target} with the +target string supplied to @code{bfd_openr} and the new BFD pointer. + +@item +If a null target string was provided to @code{bfd_find_target}, +look up the environment variable @code{GNUTARGET} and use +that as the target string. + +@item +If the target string is still @code{NULL}, or the target string is +@code{default}, then use the first item in the target vector +as the target type, and set @code{target_defaulted} in the BFD to +cause @code{bfd_check_format} to loop through all the targets. +@xref{bfd_target}. @xref{Formats}. + +@item +Otherwise, inspect the elements in the target vector +one by one, until a match on target name is found. When found, +use it. + +@item +Otherwise return the error @code{bfd_error_invalid_target} to +@code{bfd_openr}. + +@item +@code{bfd_openr} attempts to open the file using +@code{bfd_open_file}, and returns the BFD. +@end itemize +Once the BFD has been opened and the target selected, the file +format may be determined. This is done by calling +@code{bfd_check_format} on the BFD with a suggested format. +If @code{target_defaulted} has been set, each possible target +type is tried to see if it recognizes the specified format. +@code{bfd_check_format} returns @code{TRUE} when the caller guesses right. +@menu +* bfd_target:: +@end menu + +@node bfd_target, , Targets, Targets + +@subsection bfd_target + + +@strong{Description}@* +This structure contains everything that BFD knows about a +target. It includes things like its byte order, name, and which +routines to call to do various operations. + +Every BFD points to a target structure with its @code{xvec} +member. + +The macros below are used to dispatch to functions through the +@code{bfd_target} vector. They are used in a number of macros further +down in @file{bfd.h}, and are also used when calling various +routines by hand inside the BFD implementation. The @var{arglist} +argument must be parenthesized; it contains all the arguments +to the called function. + +They make the documentation (more) unpleasant to read, so if +someone wants to fix this and not break the above, please do. +@example +#define BFD_SEND(bfd, message, arglist) \ + ((*((bfd)->xvec->message)) arglist) + +#ifdef DEBUG_BFD_SEND +#undef BFD_SEND +#define BFD_SEND(bfd, message, arglist) \ + (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \ + ((*((bfd)->xvec->message)) arglist) : \ + (bfd_assert (__FILE__,__LINE__), NULL)) +#endif +@end example +For operations which index on the BFD format: +@example +#define BFD_SEND_FMT(bfd, message, arglist) \ + (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist) + +#ifdef DEBUG_BFD_SEND +#undef BFD_SEND_FMT +#define BFD_SEND_FMT(bfd, message, arglist) \ + (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \ + (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist) : \ + (bfd_assert (__FILE__,__LINE__), NULL)) +#endif + +@end example +This is the structure which defines the type of BFD this is. The +@code{xvec} member of the struct @code{bfd} itself points here. Each +module that implements access to a different target under BFD, +defines one of these. + +FIXME, these names should be rationalised with the names of +the entry points which call them. Too bad we can't have one +macro to define them both! +@example +enum bfd_flavour +@{ + bfd_target_unknown_flavour, + bfd_target_aout_flavour, + bfd_target_coff_flavour, + bfd_target_ecoff_flavour, + bfd_target_xcoff_flavour, + bfd_target_elf_flavour, + bfd_target_ieee_flavour, + bfd_target_nlm_flavour, + bfd_target_oasys_flavour, + bfd_target_tekhex_flavour, + bfd_target_srec_flavour, + bfd_target_verilog_flavour, + bfd_target_ihex_flavour, + bfd_target_som_flavour, + bfd_target_os9k_flavour, + bfd_target_versados_flavour, + bfd_target_msdos_flavour, + bfd_target_ovax_flavour, + bfd_target_evax_flavour, + bfd_target_mmo_flavour, + bfd_target_mach_o_flavour, + bfd_target_pef_flavour, + bfd_target_pef_xlib_flavour, + bfd_target_sym_flavour +@}; + +enum bfd_endian @{ BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN @}; + +/* Forward declaration. */ +typedef struct bfd_link_info _bfd_link_info; + +/* Forward declaration. */ +typedef struct flag_info flag_info; + +typedef struct bfd_target +@{ + /* Identifies the kind of target, e.g., SunOS4, Ultrix, etc. */ + char *name; + + /* The "flavour" of a back end is a general indication about + the contents of a file. */ + enum bfd_flavour flavour; + + /* The order of bytes within the data area of a file. */ + enum bfd_endian byteorder; + + /* The order of bytes within the header parts of a file. */ + enum bfd_endian header_byteorder; + + /* A mask of all the flags which an executable may have set - + from the set @code{BFD_NO_FLAGS}, @code{HAS_RELOC}, ...@code{D_PAGED}. */ + flagword object_flags; + + /* A mask of all the flags which a section may have set - from + the set @code{SEC_NO_FLAGS}, @code{SEC_ALLOC}, ...@code{SET_NEVER_LOAD}. */ + flagword section_flags; + + /* The character normally found at the front of a symbol. + (if any), perhaps `_'. */ + char symbol_leading_char; + + /* The pad character for file names within an archive header. */ + char ar_pad_char; + + /* The maximum number of characters in an archive header. */ + unsigned char ar_max_namelen; + + /* How well this target matches, used to select between various + possible targets when more than one target matches. */ + unsigned char match_priority; + + /* Entries for byte swapping for data. These are different from the + other entry points, since they don't take a BFD as the first argument. + Certain other handlers could do the same. */ + bfd_uint64_t (*bfd_getx64) (const void *); + bfd_int64_t (*bfd_getx_signed_64) (const void *); + void (*bfd_putx64) (bfd_uint64_t, void *); + bfd_vma (*bfd_getx32) (const void *); + bfd_signed_vma (*bfd_getx_signed_32) (const void *); + void (*bfd_putx32) (bfd_vma, void *); + bfd_vma (*bfd_getx16) (const void *); + bfd_signed_vma (*bfd_getx_signed_16) (const void *); + void (*bfd_putx16) (bfd_vma, void *); + + /* Byte swapping for the headers. */ + bfd_uint64_t (*bfd_h_getx64) (const void *); + bfd_int64_t (*bfd_h_getx_signed_64) (const void *); + void (*bfd_h_putx64) (bfd_uint64_t, void *); + bfd_vma (*bfd_h_getx32) (const void *); + bfd_signed_vma (*bfd_h_getx_signed_32) (const void *); + void (*bfd_h_putx32) (bfd_vma, void *); + bfd_vma (*bfd_h_getx16) (const void *); + bfd_signed_vma (*bfd_h_getx_signed_16) (const void *); + void (*bfd_h_putx16) (bfd_vma, void *); + + /* Format dependent routines: these are vectors of entry points + within the target vector structure, one for each format to check. */ + + /* Check the format of a file being read. Return a @code{bfd_target *} or zero. */ + const struct bfd_target *(*_bfd_check_format[bfd_type_end]) (bfd *); + + /* Set the format of a file being written. */ + bfd_boolean (*_bfd_set_format[bfd_type_end]) (bfd *); + + /* Write cached information into a file being written, at @code{bfd_close}. */ + bfd_boolean (*_bfd_write_contents[bfd_type_end]) (bfd *); + +@end example +The general target vector. These vectors are initialized using the +BFD_JUMP_TABLE macros. +@example + + /* Generic entry points. */ +#define BFD_JUMP_TABLE_GENERIC(NAME) \ + NAME##_close_and_cleanup, \ + NAME##_bfd_free_cached_info, \ + NAME##_new_section_hook, \ + NAME##_get_section_contents, \ + NAME##_get_section_contents_in_window + + /* Called when the BFD is being closed to do any necessary cleanup. */ + bfd_boolean (*_close_and_cleanup) (bfd *); + /* Ask the BFD to free all cached information. */ + bfd_boolean (*_bfd_free_cached_info) (bfd *); + /* Called when a new section is created. */ + bfd_boolean (*_new_section_hook) (bfd *, sec_ptr); + /* Read the contents of a section. */ + bfd_boolean (*_bfd_get_section_contents) + (bfd *, sec_ptr, void *, file_ptr, bfd_size_type); + bfd_boolean (*_bfd_get_section_contents_in_window) + (bfd *, sec_ptr, bfd_window *, file_ptr, bfd_size_type); + + /* Entry points to copy private data. */ +#define BFD_JUMP_TABLE_COPY(NAME) \ + NAME##_bfd_copy_private_bfd_data, \ + NAME##_bfd_merge_private_bfd_data, \ + _bfd_generic_init_private_section_data, \ + NAME##_bfd_copy_private_section_data, \ + NAME##_bfd_copy_private_symbol_data, \ + NAME##_bfd_copy_private_header_data, \ + NAME##_bfd_set_private_flags, \ + NAME##_bfd_print_private_bfd_data + + /* Called to copy BFD general private data from one object file + to another. */ + bfd_boolean (*_bfd_copy_private_bfd_data) (bfd *, bfd *); + /* Called to merge BFD general private data from one object file + to a common output file when linking. */ + bfd_boolean (*_bfd_merge_private_bfd_data) (bfd *, bfd *); + /* Called to initialize BFD private section data from one object file + to another. */ +#define bfd_init_private_section_data(ibfd, isec, obfd, osec, link_info) \ + BFD_SEND (obfd, _bfd_init_private_section_data, (ibfd, isec, obfd, osec, link_info)) + bfd_boolean (*_bfd_init_private_section_data) + (bfd *, sec_ptr, bfd *, sec_ptr, struct bfd_link_info *); + /* Called to copy BFD private section data from one object file + to another. */ + bfd_boolean (*_bfd_copy_private_section_data) + (bfd *, sec_ptr, bfd *, sec_ptr); + /* Called to copy BFD private symbol data from one symbol + to another. */ + bfd_boolean (*_bfd_copy_private_symbol_data) + (bfd *, asymbol *, bfd *, asymbol *); + /* Called to copy BFD private header data from one object file + to another. */ + bfd_boolean (*_bfd_copy_private_header_data) + (bfd *, bfd *); + /* Called to set private backend flags. */ + bfd_boolean (*_bfd_set_private_flags) (bfd *, flagword); + + /* Called to print private BFD data. */ + bfd_boolean (*_bfd_print_private_bfd_data) (bfd *, void *); + + /* Core file entry points. */ +#define BFD_JUMP_TABLE_CORE(NAME) \ + NAME##_core_file_failing_command, \ + NAME##_core_file_failing_signal, \ + NAME##_core_file_matches_executable_p, \ + NAME##_core_file_pid + + char * (*_core_file_failing_command) (bfd *); + int (*_core_file_failing_signal) (bfd *); + bfd_boolean (*_core_file_matches_executable_p) (bfd *, bfd *); + int (*_core_file_pid) (bfd *); + + /* Archive entry points. */ +#define BFD_JUMP_TABLE_ARCHIVE(NAME) \ + NAME##_slurp_armap, \ + NAME##_slurp_extended_name_table, \ + NAME##_construct_extended_name_table, \ + NAME##_truncate_arname, \ + NAME##_write_armap, \ + NAME##_read_ar_hdr, \ + NAME##_write_ar_hdr, \ + NAME##_openr_next_archived_file, \ + NAME##_get_elt_at_index, \ + NAME##_generic_stat_arch_elt, \ + NAME##_update_armap_timestamp + + bfd_boolean (*_bfd_slurp_armap) (bfd *); + bfd_boolean (*_bfd_slurp_extended_name_table) (bfd *); + bfd_boolean (*_bfd_construct_extended_name_table) + (bfd *, char **, bfd_size_type *, const char **); + void (*_bfd_truncate_arname) (bfd *, const char *, char *); + bfd_boolean (*write_armap) + (bfd *, unsigned int, struct orl *, unsigned int, int); + void * (*_bfd_read_ar_hdr_fn) (bfd *); + bfd_boolean (*_bfd_write_ar_hdr_fn) (bfd *, bfd *); + bfd * (*openr_next_archived_file) (bfd *, bfd *); +#define bfd_get_elt_at_index(b,i) BFD_SEND (b, _bfd_get_elt_at_index, (b,i)) + bfd * (*_bfd_get_elt_at_index) (bfd *, symindex); + int (*_bfd_stat_arch_elt) (bfd *, struct stat *); + bfd_boolean (*_bfd_update_armap_timestamp) (bfd *); + + /* Entry points used for symbols. */ +#define BFD_JUMP_TABLE_SYMBOLS(NAME) \ + NAME##_get_symtab_upper_bound, \ + NAME##_canonicalize_symtab, \ + NAME##_make_empty_symbol, \ + NAME##_print_symbol, \ + NAME##_get_symbol_info, \ + NAME##_bfd_is_local_label_name, \ + NAME##_bfd_is_target_special_symbol, \ + NAME##_get_lineno, \ + NAME##_find_nearest_line, \ + _bfd_generic_find_line, \ + NAME##_find_inliner_info, \ + NAME##_bfd_make_debug_symbol, \ + NAME##_read_minisymbols, \ + NAME##_minisymbol_to_symbol + + long (*_bfd_get_symtab_upper_bound) (bfd *); + long (*_bfd_canonicalize_symtab) + (bfd *, struct bfd_symbol **); + struct bfd_symbol * + (*_bfd_make_empty_symbol) (bfd *); + void (*_bfd_print_symbol) + (bfd *, void *, struct bfd_symbol *, bfd_print_symbol_type); +#define bfd_print_symbol(b,p,s,e) BFD_SEND (b, _bfd_print_symbol, (b,p,s,e)) + void (*_bfd_get_symbol_info) + (bfd *, struct bfd_symbol *, symbol_info *); +#define bfd_get_symbol_info(b,p,e) BFD_SEND (b, _bfd_get_symbol_info, (b,p,e)) + bfd_boolean (*_bfd_is_local_label_name) (bfd *, const char *); + bfd_boolean (*_bfd_is_target_special_symbol) (bfd *, asymbol *); + alent * (*_get_lineno) (bfd *, struct bfd_symbol *); + bfd_boolean (*_bfd_find_nearest_line) + (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma, + const char **, const char **, unsigned int *); + bfd_boolean (*_bfd_find_line) + (bfd *, struct bfd_symbol **, struct bfd_symbol *, + const char **, unsigned int *); + bfd_boolean (*_bfd_find_inliner_info) + (bfd *, const char **, const char **, unsigned int *); + /* Back-door to allow format-aware applications to create debug symbols + while using BFD for everything else. Currently used by the assembler + when creating COFF files. */ + asymbol * (*_bfd_make_debug_symbol) + (bfd *, void *, unsigned long size); +#define bfd_read_minisymbols(b, d, m, s) \ + BFD_SEND (b, _read_minisymbols, (b, d, m, s)) + long (*_read_minisymbols) + (bfd *, bfd_boolean, void **, unsigned int *); +#define bfd_minisymbol_to_symbol(b, d, m, f) \ + BFD_SEND (b, _minisymbol_to_symbol, (b, d, m, f)) + asymbol * (*_minisymbol_to_symbol) + (bfd *, bfd_boolean, const void *, asymbol *); + + /* Routines for relocs. */ +#define BFD_JUMP_TABLE_RELOCS(NAME) \ + NAME##_get_reloc_upper_bound, \ + NAME##_canonicalize_reloc, \ + NAME##_bfd_reloc_type_lookup, \ + NAME##_bfd_reloc_name_lookup + + long (*_get_reloc_upper_bound) (bfd *, sec_ptr); + long (*_bfd_canonicalize_reloc) + (bfd *, sec_ptr, arelent **, struct bfd_symbol **); + /* See documentation on reloc types. */ + reloc_howto_type * + (*reloc_type_lookup) (bfd *, bfd_reloc_code_real_type); + reloc_howto_type * + (*reloc_name_lookup) (bfd *, const char *); + + + /* Routines used when writing an object file. */ +#define BFD_JUMP_TABLE_WRITE(NAME) \ + NAME##_set_arch_mach, \ + NAME##_set_section_contents + + bfd_boolean (*_bfd_set_arch_mach) + (bfd *, enum bfd_architecture, unsigned long); + bfd_boolean (*_bfd_set_section_contents) + (bfd *, sec_ptr, const void *, file_ptr, bfd_size_type); + + /* Routines used by the linker. */ +#define BFD_JUMP_TABLE_LINK(NAME) \ + NAME##_sizeof_headers, \ + NAME##_bfd_get_relocated_section_contents, \ + NAME##_bfd_relax_section, \ + NAME##_bfd_link_hash_table_create, \ + NAME##_bfd_link_hash_table_free, \ + NAME##_bfd_link_add_symbols, \ + NAME##_bfd_link_just_syms, \ + NAME##_bfd_copy_link_hash_symbol_type, \ + NAME##_bfd_final_link, \ + NAME##_bfd_link_split_section, \ + NAME##_bfd_gc_sections, \ + NAME##_bfd_lookup_section_flags, \ + NAME##_bfd_merge_sections, \ + NAME##_bfd_is_group_section, \ + NAME##_bfd_discard_group, \ + NAME##_section_already_linked, \ + NAME##_bfd_define_common_symbol + + int (*_bfd_sizeof_headers) (bfd *, struct bfd_link_info *); + bfd_byte * (*_bfd_get_relocated_section_contents) + (bfd *, struct bfd_link_info *, struct bfd_link_order *, + bfd_byte *, bfd_boolean, struct bfd_symbol **); + + bfd_boolean (*_bfd_relax_section) + (bfd *, struct bfd_section *, struct bfd_link_info *, bfd_boolean *); + + /* Create a hash table for the linker. Different backends store + different information in this table. */ + struct bfd_link_hash_table * + (*_bfd_link_hash_table_create) (bfd *); + + /* Release the memory associated with the linker hash table. */ + void (*_bfd_link_hash_table_free) (struct bfd_link_hash_table *); + + /* Add symbols from this object file into the hash table. */ + bfd_boolean (*_bfd_link_add_symbols) (bfd *, struct bfd_link_info *); + + /* Indicate that we are only retrieving symbol values from this section. */ + void (*_bfd_link_just_syms) (asection *, struct bfd_link_info *); + + /* Copy the symbol type of a linker hash table entry. */ +#define bfd_copy_link_hash_symbol_type(b, t, f) \ + BFD_SEND (b, _bfd_copy_link_hash_symbol_type, (b, t, f)) + void (*_bfd_copy_link_hash_symbol_type) + (bfd *, struct bfd_link_hash_entry *, struct bfd_link_hash_entry *); + + /* Do a link based on the link_order structures attached to each + section of the BFD. */ + bfd_boolean (*_bfd_final_link) (bfd *, struct bfd_link_info *); + + /* Should this section be split up into smaller pieces during linking. */ + bfd_boolean (*_bfd_link_split_section) (bfd *, struct bfd_section *); + + /* Remove sections that are not referenced from the output. */ + bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *); + + /* Sets the bitmask of allowed and disallowed section flags. */ + void (*_bfd_lookup_section_flags) (struct bfd_link_info *, + struct flag_info *); + + /* Attempt to merge SEC_MERGE sections. */ + bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *); + + /* Is this section a member of a group? */ + bfd_boolean (*_bfd_is_group_section) (bfd *, const struct bfd_section *); + + /* Discard members of a group. */ + bfd_boolean (*_bfd_discard_group) (bfd *, struct bfd_section *); + + /* Check if SEC has been already linked during a reloceatable or + final link. */ + bfd_boolean (*_section_already_linked) (bfd *, asection *, + struct bfd_link_info *); + + /* Define a common symbol. */ + bfd_boolean (*_bfd_define_common_symbol) (bfd *, struct bfd_link_info *, + struct bfd_link_hash_entry *); + + /* Routines to handle dynamic symbols and relocs. */ +#define BFD_JUMP_TABLE_DYNAMIC(NAME) \ + NAME##_get_dynamic_symtab_upper_bound, \ + NAME##_canonicalize_dynamic_symtab, \ + NAME##_get_synthetic_symtab, \ + NAME##_get_dynamic_reloc_upper_bound, \ + NAME##_canonicalize_dynamic_reloc + + /* Get the amount of memory required to hold the dynamic symbols. */ + long (*_bfd_get_dynamic_symtab_upper_bound) (bfd *); + /* Read in the dynamic symbols. */ + long (*_bfd_canonicalize_dynamic_symtab) + (bfd *, struct bfd_symbol **); + /* Create synthetized symbols. */ + long (*_bfd_get_synthetic_symtab) + (bfd *, long, struct bfd_symbol **, long, struct bfd_symbol **, + struct bfd_symbol **); + /* Get the amount of memory required to hold the dynamic relocs. */ + long (*_bfd_get_dynamic_reloc_upper_bound) (bfd *); + /* Read in the dynamic relocs. */ + long (*_bfd_canonicalize_dynamic_reloc) + (bfd *, arelent **, struct bfd_symbol **); + +@end example +A pointer to an alternative bfd_target in case the current one is not +satisfactory. This can happen when the target cpu supports both big +and little endian code, and target chosen by the linker has the wrong +endianness. The function open_output() in ld/ldlang.c uses this field +to find an alternative output format that is suitable. +@example + /* Opposite endian version of this target. */ + const struct bfd_target * alternative_target; + + /* Data for use by back-end routines, which isn't + generic enough to belong in this structure. */ + const void *backend_data; + +@} bfd_target; + +@end example + +@findex bfd_set_default_target +@subsubsection @code{bfd_set_default_target} +@strong{Synopsis} +@example +bfd_boolean bfd_set_default_target (const char *name); +@end example +@strong{Description}@* +Set the default target vector to use when recognizing a BFD. +This takes the name of the target, which may be a BFD target +name or a configuration triplet. + +@findex bfd_find_target +@subsubsection @code{bfd_find_target} +@strong{Synopsis} +@example +const bfd_target *bfd_find_target (const char *target_name, bfd *abfd); +@end example +@strong{Description}@* +Return a pointer to the transfer vector for the object target +named @var{target_name}. If @var{target_name} is @code{NULL}, +choose the one in the environment variable @code{GNUTARGET}; if +that is null or not defined, then choose the first entry in the +target list. Passing in the string "default" or setting the +environment variable to "default" will cause the first entry in +the target list to be returned, and "target_defaulted" will be +set in the BFD if @var{abfd} isn't @code{NULL}. This causes +@code{bfd_check_format} to loop over all the targets to find the +one that matches the file being read. + +@findex bfd_get_target_info +@subsubsection @code{bfd_get_target_info} +@strong{Synopsis} +@example +const bfd_target *bfd_get_target_info (const char *target_name, + bfd *abfd, + bfd_boolean *is_bigendian, + int *underscoring, + const char **def_target_arch); +@end example +@strong{Description}@* +Return a pointer to the transfer vector for the object target +named @var{target_name}. If @var{target_name} is @code{NULL}, +choose the one in the environment variable @code{GNUTARGET}; if +that is null or not defined, then choose the first entry in the +target list. Passing in the string "default" or setting the +environment variable to "default" will cause the first entry in +the target list to be returned, and "target_defaulted" will be +set in the BFD if @var{abfd} isn't @code{NULL}. This causes +@code{bfd_check_format} to loop over all the targets to find the +one that matches the file being read. +If @var{is_bigendian} is not @code{NULL}, then set this value to target's +endian mode. True for big-endian, FALSE for little-endian or for +invalid target. +If @var{underscoring} is not @code{NULL}, then set this value to target's +underscoring mode. Zero for none-underscoring, -1 for invalid target, +else the value of target vector's symbol underscoring. +If @var{def_target_arch} is not @code{NULL}, then set it to the architecture +string specified by the target_name. + +@findex bfd_target_list +@subsubsection @code{bfd_target_list} +@strong{Synopsis} +@example +const char ** bfd_target_list (void); +@end example +@strong{Description}@* +Return a freshly malloced NULL-terminated +vector of the names of all the valid BFD targets. Do not +modify the names. + +@findex bfd_seach_for_target +@subsubsection @code{bfd_seach_for_target} +@strong{Synopsis} +@example +const bfd_target *bfd_search_for_target + (int (*search_func) (const bfd_target *, void *), + void *); +@end example +@strong{Description}@* +Return a pointer to the first transfer vector in the list of +transfer vectors maintained by BFD that produces a non-zero +result when passed to the function @var{search_func}. The +parameter @var{data} is passed, unexamined, to the search +function. + diff --git a/bfd/dwarf2.c b/bfd/dwarf2.c index 3db2395..3cd2f7d 100644 --- a/bfd/dwarf2.c +++ b/bfd/dwarf2.c @@ -278,7 +278,7 @@ struct attr_abbrev /* Map of uncompressed DWARF debug section name to compressed one. It is terminated by NULL uncompressed_name. */ -struct dwarf_debug_section dwarf_debug_sections[] = +const struct dwarf_debug_section dwarf_debug_sections[] = { { ".debug_abbrev", ".zdebug_abbrev" }, { ".debug_aranges", ".zdebug_aranges" }, @@ -287,6 +287,7 @@ struct dwarf_debug_section dwarf_debug_sections[] = { ".debug_line", ".zdebug_line" }, { ".debug_loc", ".zdebug_loc" }, { ".debug_macinfo", ".zdebug_macinfo" }, + { ".debug_macro", ".zdebug_macro" }, { ".debug_pubnames", ".zdebug_pubnames" }, { ".debug_pubtypes", ".zdebug_pubtypes" }, { ".debug_ranges", ".zdebug_ranges" }, @@ -314,6 +315,7 @@ enum dwarf_debug_section_enum debug_line, debug_loc, debug_macinfo, + debug_macro, debug_pubnames, debug_pubtypes, debug_ranges, diff --git a/bfd/ecoff.c b/bfd/ecoff.c index f85627d..b76266d 100644 --- a/bfd/ecoff.c +++ b/bfd/ecoff.c @@ -1,6 +1,6 @@ /* Generic ECOFF (Extended-COFF) routines. Copyright 1990, 1991, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Original version by Per Bothner. Full support added by Ian Lance Taylor, ian@cygnus.com. @@ -73,6 +73,8 @@ static asection bfd_debug_section = 0, NULL, 0, /* target_index, used_by_bfd, constructor_chain, owner, */ 0, NULL, NULL, NULL, + /* flag_info, */ + NULL, /* symbol, */ NULL, /* symbol_ptr_ptr, */ @@ -3231,14 +3233,6 @@ _bfd_ecoff_bfd_link_hash_table_create (bfd *abfd) ((struct ecoff_link_hash_entry *) \ bfd_link_hash_lookup (&(table)->root, (string), (create), (copy), (follow))) -/* Traverse an ECOFF link hash table. */ - -#define ecoff_link_hash_traverse(table, func, info) \ - (bfd_link_hash_traverse \ - (&(table)->root, \ - (bfd_boolean (*) (struct bfd_link_hash_entry *, void *)) (func), \ - (info))) - /* Get the ECOFF link hash table from the info structure. This is just a cast. */ @@ -4259,8 +4253,9 @@ ecoff_reloc_link_order (bfd *output_bfd, the hash table. */ static bfd_boolean -ecoff_link_write_external (struct ecoff_link_hash_entry *h, void * data) +ecoff_link_write_external (struct bfd_hash_entry *bh, void * data) { + struct ecoff_link_hash_entry *h = (struct ecoff_link_hash_entry *) bh; struct extsym_info *einfo = (struct extsym_info *) data; bfd *output_bfd = einfo->abfd; bfd_boolean strip; @@ -4491,9 +4486,7 @@ _bfd_ecoff_bfd_final_link (bfd *abfd, struct bfd_link_info *info) /* Write out the external symbols. */ einfo.abfd = abfd; einfo.info = info; - ecoff_link_hash_traverse (ecoff_hash_table (info), - ecoff_link_write_external, - (void *) &einfo); + bfd_hash_traverse (&info->hash->table, ecoff_link_write_external, &einfo); if (info->relocatable) { diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h index 735d2b5..d6e2ab2 100644 --- a/bfd/elf-bfd.h +++ b/bfd/elf-bfd.h @@ -1,6 +1,6 @@ /* BFD back-end data structures for ELF files. Copyright 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, - 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -232,11 +232,7 @@ struct elf_link_hash_entry }; /* Will references to this symbol always reference the symbol - in this object? STV_PROTECTED is excluded from the visibility test - here so that function pointer comparisons work properly. Since - function symbols not defined in an app are set to their .plt entry, - it's necessary for shared libs to also reference the .plt even - though the symbol is really local to the shared lib. */ + in this object? */ #define SYMBOL_REFERENCES_LOCAL(INFO, H) \ _bfd_elf_symbol_refs_local_p (H, INFO, 0) @@ -432,6 +428,8 @@ enum elf_target_id TIC6X_ELF_DATA, X86_64_ELF_DATA, XTENSA_ELF_DATA, + TILEGX_ELF_DATA, + TILEPRO_ELF_DATA, GENERIC_ELF_DATA }; @@ -716,6 +714,10 @@ struct elf_backend_data /* The BFD flags applied to sections created for dynamic linking. */ flagword dynamic_sec_flags; + /* Architecture-specific data for this backend. + This is actually a pointer to some type like struct elf_ARCH_data. */ + const void *arch_data; + /* A function to translate an ELF RELA relocation to a BFD arelent structure. */ void (*elf_info_to_howto) @@ -1114,6 +1116,11 @@ struct elf_backend_data char *(*elf_backend_write_core_note) (bfd *abfd, char *buf, int *bufsiz, int note_type, ...); + /* This function, if defined, is called to convert target-specific + section flag names into hex values. */ + flagword (*elf_backend_lookup_section_flags_hook) + (char *); + /* This function returns class of a reloc type. */ enum elf_reloc_type_class (*elf_backend_reloc_type_class) (const Elf_Internal_Rela *); @@ -1550,7 +1557,7 @@ struct elf_obj_tdata const char *dt_name; /* The linker emulation needs to know what audit libs - are used by a dynamic object. */ + are used by a dynamic object. */ const char *dt_audit; /* Records the result of `get_program_header_size'. */ @@ -1794,8 +1801,8 @@ extern bfd_boolean _bfd_elf_match_sections_by_type (bfd *, const asection *, bfd *, const asection *); extern bfd_boolean bfd_elf_is_group_section (bfd *, const struct bfd_section *); -extern void _bfd_elf_section_already_linked - (bfd *, struct bfd_section *, struct bfd_link_info *); +extern bfd_boolean _bfd_elf_section_already_linked + (bfd *, asection *, struct bfd_link_info *); extern void bfd_elf_set_group_contents (bfd *, asection *, void *); extern asection *_bfd_elf_check_kept_section @@ -1889,7 +1896,7 @@ extern bfd_boolean bfd_section_from_phdr extern int _bfd_elf_symbol_from_bfd_symbol (bfd *, asymbol **); -extern Elf_Internal_Sym *bfd_sym_from_r_symndx +extern Elf_Internal_Sym *bfd_sym_from_r_symndx (struct sym_cache *, bfd *, unsigned long); extern asection *bfd_section_from_elf_index (bfd *, unsigned int); @@ -2173,6 +2180,9 @@ extern bfd_boolean _bfd_elf_gc_mark_fdes extern bfd_boolean _bfd_elf_gc_mark (struct bfd_link_info *, asection *, elf_gc_mark_hook_fn); +extern bfd_boolean _bfd_elf_gc_mark_extra_sections + (struct bfd_link_info *, elf_gc_mark_hook_fn); + extern bfd_boolean bfd_elf_gc_common_finalize_got_offsets (bfd *, struct bfd_link_info *); @@ -2192,6 +2202,9 @@ extern bfd_boolean _bfd_elf_is_function_type (unsigned int); extern int bfd_elf_get_default_section_type (flagword); +extern void bfd_elf_lookup_section_flags + (struct bfd_link_info *, struct flag_info *); + extern Elf_Internal_Phdr * _bfd_elf_find_segment_containing_section (bfd * abfd, asection * section); @@ -2224,6 +2237,8 @@ extern char *elfcore_write_s390_ctrs (bfd *, char *, int *, const void *, int); extern char *elfcore_write_s390_prefix (bfd *, char *, int *, const void *, int); +extern char *elfcore_write_arm_vfp + (bfd *, char *, int *, const void *, int); extern char *elfcore_write_lwpstatus (bfd *, char *, int *, long, int, const void *); extern char *elfcore_write_register_note @@ -2260,7 +2275,7 @@ extern bfd_boolean _bfd_elf_merge_unknown_attribute_low (bfd *, bfd *, int); extern bfd_boolean _bfd_elf_merge_unknown_attribute_list (bfd *, bfd *); extern Elf_Internal_Shdr *_bfd_elf_single_rel_hdr (asection *sec); -/* The linker may needs to keep track of the number of relocs that it +/* The linker may need to keep track of the number of relocs that it decides to copy as dynamic relocs in check_relocs for each symbol. This is so that it can later discard them if they are found to be unnecessary. We can store the information in a field extending the @@ -2378,7 +2393,7 @@ extern asection _bfd_elf_large_com_section; /* This macro is to avoid lots of duplicated code in the body of the loop over relocations in xxx_relocate_section() in the various elfxx-xxxx.c files. - + Handle relocations against symbols from removed linkonce sections, or sections discarded by a linker script. When doing a relocatable link, we remove such relocations. Otherwise, we just want the diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c index 0a22138..54142b2 100644 --- a/bfd/elf-eh-frame.c +++ b/bfd/elf-eh-frame.c @@ -1,5 +1,5 @@ /* .eh_frame section optimization. - Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Jakub Jelinek . @@ -490,7 +490,8 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, if (hdr_info->parsed_eh_frames) return; - if (sec->size == 0) + if (sec->size == 0 + || sec->sec_info_type != ELF_INFO_TYPE_NONE) { /* This file does not contain .eh_frame information. */ return; @@ -777,8 +778,6 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, } else { - asection *rsec; - /* Find the corresponding CIE. */ unsigned int cie_offset = this_inf->offset + 4 - hdr_id; for (cie = local_cies; cie < local_cies + cie_count; cie++) @@ -794,17 +793,22 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, = cie->cie_inf->add_augmentation_size; ENSURE_NO_RELOCS (buf); - REQUIRE (GET_RELOC (buf)); - - /* Chain together the FDEs for each section. */ - rsec = _bfd_elf_gc_mark_rsec (info, sec, gc_mark_hook, cookie); - /* RSEC will be NULL if FDE was cleared out as it was belonging to - a discarded SHT_GROUP. */ - if (rsec) + if ((sec->flags & SEC_LINKER_CREATED) == 0 || cookie->rels != NULL) { - REQUIRE (rsec->owner == abfd); - this_inf->u.fde.next_for_section = elf_fde_list (rsec); - elf_fde_list (rsec) = this_inf; + asection *rsec; + + REQUIRE (GET_RELOC (buf)); + + /* Chain together the FDEs for each section. */ + rsec = _bfd_elf_gc_mark_rsec (info, sec, gc_mark_hook, cookie); + /* RSEC will be NULL if FDE was cleared out as it was belonging to + a discarded SHT_GROUP. */ + if (rsec) + { + REQUIRE (rsec->owner == abfd); + this_inf->u.fde.next_for_section = elf_fde_list (rsec); + elf_fde_list (rsec) = this_inf; + } } /* Skip the initial location and address range. */ @@ -1133,10 +1137,16 @@ _bfd_elf_discard_section_eh_frame struct eh_frame_hdr_info *hdr_info; unsigned int ptr_size, offset; + if (sec->sec_info_type != ELF_INFO_TYPE_EH_FRAME) + return FALSE; + sec_info = (struct eh_frame_sec_info *) elf_section_data (sec)->sec_info; if (sec_info == NULL) return FALSE; + ptr_size = (get_elf_backend_data (sec->owner) + ->elf_backend_eh_frame_address_size (sec->owner, sec)); + hdr_info = &elf_hash_table (info)->eh_info; for (ent = sec_info->entry; ent < sec_info->entry + sec_info->count; ++ent) if (ent->size == 4) @@ -1145,11 +1155,25 @@ _bfd_elf_discard_section_eh_frame ent->removed = sec->map_head.s != NULL; else if (!ent->cie) { - cookie->rel = cookie->rels + ent->reloc_index; - /* FIXME: octets_per_byte. */ - BFD_ASSERT (cookie->rel < cookie->relend - && cookie->rel->r_offset == ent->offset + 8); - if (!(*reloc_symbol_deleted_p) (ent->offset + 8, cookie)) + bfd_boolean keep; + if ((sec->flags & SEC_LINKER_CREATED) != 0 && cookie->rels == NULL) + { + unsigned int width + = get_DW_EH_PE_width (ent->fde_encoding, ptr_size); + bfd_vma value + = read_value (abfd, sec->contents + ent->offset + 8 + width, + width, get_DW_EH_PE_signed (ent->fde_encoding)); + keep = value != 0; + } + else + { + cookie->rel = cookie->rels + ent->reloc_index; + /* FIXME: octets_per_byte. */ + BFD_ASSERT (cookie->rel < cookie->relend + && cookie->rel->r_offset == ent->offset + 8); + keep = !(*reloc_symbol_deleted_p) (ent->offset + 8, cookie); + } + if (keep) { if (info->shared && (((ent->fde_encoding & 0x70) == DW_EH_PE_absptr @@ -1178,8 +1202,6 @@ _bfd_elf_discard_section_eh_frame sec_info->cies = NULL; } - ptr_size = (get_elf_backend_data (sec->owner) - ->elf_backend_eh_frame_address_size (sec->owner, sec)); offset = 0; for (ent = sec_info->entry; ent < sec_info->entry + sec_info->count; ++ent) if (!ent->removed) diff --git a/bfd/elf-ifunc.c b/bfd/elf-ifunc.c index 81429b8..3ba96c7 100644 --- a/bfd/elf-ifunc.c +++ b/bfd/elf-ifunc.c @@ -299,9 +299,10 @@ keep: 5. Otherwise use .got so that it can be shared among different objects at run-time. We only need to relocate .got entry in shared object. */ - if ((info->shared - && (h->dynindx == -1 - || h->forced_local)) + if (h->got.refcount <= 0 + || (info->shared + && (h->dynindx == -1 + || h->forced_local)) || (!info->shared && !h->pointer_equality_needed) || (info->executable && info->shared) diff --git a/bfd/elf-m10300.c b/bfd/elf-m10300.c index bdca122..8276a2f 100644 --- a/bfd/elf-m10300.c +++ b/bfd/elf-m10300.c @@ -1,6 +1,6 @@ /* Matsushita 10300 specific support for 32-bit ELF Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, - 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -1602,9 +1602,6 @@ elf32_mn10300_finish_hash_table_entry (struct bfd_hash_entry *gen_entry, entry = (struct elf32_mn10300_link_hash_entry *) gen_entry; - if (entry->root.root.type == bfd_link_hash_warning) - entry = (struct elf32_mn10300_link_hash_entry *) entry->root.root.u.i.link; - /* If we already know we want to convert "call" to "calls" for calls to this symbol, then return now. */ if (entry->flags == MN10300_CONVERT_CALL_TO_CALLS) @@ -4882,6 +4879,22 @@ _bfd_mn10300_elf_reloc_type_class (const Elf_Internal_Rela *rela) } } +/* Allocate space for an MN10300 extension to the bfd elf data structure. */ + +static bfd_boolean +mn10300_elf_mkobject (bfd *abfd) +{ + /* We do not actually need any extra room in the bfd elf data structure. + But we do need the object_id of the structure to be set to + MN10300_ELF_DATA so that elflink.c:elf_link_add_object_symols() will call + our mn10300_elf_check_relocs function which will then allocate space in + the .got section for any GOT based relocs. */ + return bfd_elf_allocate_object (abfd, sizeof (struct elf_obj_tdata), + MN10300_ELF_DATA); +} + +#define bfd_elf32_mkobject mn10300_elf_mkobject + #ifndef ELF_ARCH #define TARGET_LITTLE_SYM bfd_elf32_mn10300_vec #define TARGET_LITTLE_NAME "elf32-mn10300" diff --git a/bfd/elf.c b/bfd/elf.c index 71de844..aa40c33 100644 --- a/bfd/elf.c +++ b/bfd/elf.c @@ -976,7 +976,9 @@ _bfd_elf_make_section_from_shdr (bfd *abfd, phdr = elf_tdata (abfd)->phdr; for (i = 0; i < elf_elfheader (abfd)->e_phnum; i++, phdr++) { - if (phdr->p_type == PT_LOAD + if (((phdr->p_type == PT_LOAD + && (hdr->sh_flags & SHF_TLS) == 0) + || phdr->p_type == PT_TLS) && ELF_SECTION_IN_SEGMENT (hdr, phdr)) { if ((flags & SEC_LOAD) == 0) @@ -2164,7 +2166,7 @@ static const struct bfd_elf_special_section special_sections_z[] = { NULL, 0, 0, 0, 0 } }; -static const struct bfd_elf_special_section *special_sections[] = +static const struct bfd_elf_special_section * const special_sections[] = { special_sections_b, /* 'b' */ special_sections_c, /* 'c' */ @@ -3987,8 +3989,12 @@ _bfd_elf_map_sections_to_segments (bfd *abfd, struct bfd_link_info *info) phdr_in_segment = FALSE; } - /* Create a final PT_LOAD program segment. */ - if (last_hdr != NULL) + /* Create a final PT_LOAD program segment, but not if it's just + for .tbss. */ + if (last_hdr != NULL + && (i - phdr_index != 1 + || ((last_hdr->flags & (SEC_THREAD_LOCAL | SEC_LOAD)) + != SEC_THREAD_LOCAL))) { m = make_mapping (abfd, sections, phdr_index, i, phdr_in_segment); if (m == NULL) @@ -4684,6 +4690,21 @@ assign_file_positions_for_load_sections (bfd *abfd, if (this_hdr->sh_type != SHT_NOBITS) off += this_hdr->sh_size; } + else if (this_hdr->sh_type == SHT_NOBITS + && (this_hdr->sh_flags & SHF_TLS) != 0 + && this_hdr->sh_offset == 0) + { + /* This is a .tbss section that didn't get a PT_LOAD. + (See _bfd_elf_map_sections_to_segments "Create a + final PT_LOAD".) Set sh_offset to the value it + would have if we had created a zero p_filesz and + p_memsz PT_LOAD header for the section. This + also makes the PT_TLS header have the same + p_offset value. */ + bfd_vma adjust = vma_page_aligned_bias (this_hdr->sh_addr, + off, align); + this_hdr->sh_offset = sec->filepos = off + adjust; + } if (this_hdr->sh_type != SHT_NOBITS) { @@ -4748,7 +4769,8 @@ assign_file_positions_for_load_sections (bfd *abfd, sec = m->sections[i]; this_hdr = &(elf_section_data(sec)->this_hdr); - if (!ELF_SECTION_IN_SEGMENT_1 (this_hdr, p, check_vma, 0)) + if (!ELF_SECTION_IN_SEGMENT_1 (this_hdr, p, check_vma, 0) + && !ELF_TBSS_SPECIAL (this_hdr, p)) { (*_bfd_error_handler) (_("%B: section `%A' can't be allocated in segment %d"), @@ -4919,17 +4941,21 @@ assign_file_positions_for_non_load_sections (bfd *abfd, && (p->p_type != PT_NOTE || bfd_get_format (abfd) != bfd_core)) { - Elf_Internal_Shdr *hdr; - asection *sect; - BFD_ASSERT (!m->includes_filehdr && !m->includes_phdrs); - sect = m->sections[m->count - 1]; - hdr = &elf_section_data (sect)->this_hdr; - p->p_filesz = sect->filepos - m->sections[0]->filepos; - if (hdr->sh_type != SHT_NOBITS) - p->p_filesz += hdr->sh_size; + p->p_filesz = 0; p->p_offset = m->sections[0]->filepos; + for (i = m->count; i-- != 0;) + { + asection *sect = m->sections[i]; + Elf_Internal_Shdr *hdr = &elf_section_data (sect)->this_hdr; + if (hdr->sh_type != SHT_NOBITS) + { + p->p_filesz = (sect->filepos - m->sections[0]->filepos + + hdr->sh_size); + break; + } + } } } else if (m->includes_filehdr) @@ -6248,6 +6274,8 @@ _bfd_elf_init_private_section_data (bfd *ibfd, || obfd->xvec->flavour != bfd_target_elf_flavour) return TRUE; + BFD_ASSERT (elf_section_data (osec) != NULL); + /* For objcopy and relocatable link, don't copy the output ELF section type from input if the output BFD section flags have been set to something different. For a final link allow some flags @@ -7365,6 +7393,9 @@ elf_find_function (bfd *abfd, enum { nothing_seen, symbol_seen, file_after_symbol_seen } state; const struct elf_backend_data *bed = get_elf_backend_data (abfd); + if (symbols == NULL) + return FALSE; + filename = NULL; func = NULL; file = NULL; @@ -7950,6 +7981,12 @@ elfcore_grok_s390_prefix (bfd *abfd, Elf_Internal_Note *note) return elfcore_make_note_pseudosection (abfd, ".reg-s390-prefix", note); } +static bfd_boolean +elfcore_grok_arm_vfp (bfd *abfd, Elf_Internal_Note *note) +{ + return elfcore_make_note_pseudosection (abfd, ".reg-arm-vfp", note); +} + #if defined (HAVE_PRPSINFO_T) typedef prpsinfo_t elfcore_psinfo_t; #if defined (HAVE_PRPSINFO32_T) /* Sparc64 cross Sparc32 */ @@ -8000,6 +8037,9 @@ elfcore_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) memcpy (&psinfo, note->descdata, sizeof (psinfo)); +#if defined (HAVE_PSINFO_T_PR_PID) || defined (HAVE_PRPSINFO_T_PR_PID) + elf_tdata (abfd)->core_pid = psinfo.pr_pid; +#endif elf_tdata (abfd)->core_program = _bfd_elfcore_strndup (abfd, psinfo.pr_fname, sizeof (psinfo.pr_fname)); @@ -8016,6 +8056,9 @@ elfcore_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) memcpy (&psinfo, note->descdata, sizeof (psinfo)); +#if defined (HAVE_PSINFO32_T_PR_PID) || defined (HAVE_PRPSINFO32_T_PR_PID) + elf_tdata (abfd)->core_pid = psinfo.pr_pid; +#endif elf_tdata (abfd)->core_program = _bfd_elfcore_strndup (abfd, psinfo.pr_fname, sizeof (psinfo.pr_fname)); @@ -8363,6 +8406,13 @@ elfcore_grok_note (bfd *abfd, Elf_Internal_Note *note) else return TRUE; + case NT_ARM_VFP: + if (note->namesz == 6 + && strcmp (note->namedata, "LINUX") == 0) + return elfcore_grok_arm_vfp (abfd, note); + else + return TRUE; + case NT_PRPSINFO: case NT_PSINFO: if (bed->elf_backend_grok_psinfo) @@ -9117,6 +9167,18 @@ elfcore_write_s390_prefix (bfd *abfd, } char * +elfcore_write_arm_vfp (bfd *abfd, + char *buf, + int *bufsiz, + const void *arm_vfp, + int size) +{ + char *note_name = "LINUX"; + return elfcore_write_note (abfd, buf, bufsiz, + note_name, NT_ARM_VFP, arm_vfp, size); +} + +char * elfcore_write_register_note (bfd *abfd, char *buf, int *bufsiz, @@ -9146,6 +9208,8 @@ elfcore_write_register_note (bfd *abfd, return elfcore_write_s390_ctrs (abfd, buf, bufsiz, data, size); if (strcmp (section, ".reg-s390-prefix") == 0) return elfcore_write_s390_prefix (abfd, buf, bufsiz, data, size); + if (strcmp (section, ".reg-arm-vfp") == 0) + return elfcore_write_arm_vfp (abfd, buf, bufsiz, data, size); return NULL; } @@ -9379,6 +9443,12 @@ _bfd_elf_section_offset (bfd *abfd, case ELF_INFO_TYPE_EH_FRAME: return _bfd_elf_eh_frame_section_offset (abfd, info, sec, offset); default: + if ((sec->flags & SEC_ELF_REVERSE_COPY) != 0) + { + const struct elf_backend_data *bed = get_elf_backend_data (abfd); + bfd_size_type address_size = bed->s->arch_size / 8; + offset = sec->size - offset - address_size; + } return offset; } } @@ -9540,11 +9610,11 @@ _bfd_elf_set_osabi (bfd * abfd, i_ehdrp->e_ident[EI_OSABI] = get_elf_backend_data (abfd)->elf_osabi; /* To make things simpler for the loader on Linux systems we set the - osabi field to ELFOSABI_LINUX if the binary contains symbols of + osabi field to ELFOSABI_GNU if the binary contains symbols of the STT_GNU_IFUNC type or STB_GNU_UNIQUE binding. */ if (i_ehdrp->e_ident[EI_OSABI] == ELFOSABI_NONE && elf_tdata (abfd)->has_gnu_symbols) - i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_LINUX; + i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_GNU; } diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index 035d584..1f6c1a0 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -229,8 +229,8 @@ static reloc_howto_type elf32_arm_howto_table_1[] = bfd_elf_generic_reloc, /* special_function */ "R_ARM_THM_CALL", /* name */ FALSE, /* partial_inplace */ - 0x07ff07ff, /* src_mask */ - 0x07ff07ff, /* dst_mask */ + 0x07ff2fff, /* src_mask */ + 0x07ff2fff, /* dst_mask */ TRUE), /* pcrel_offset */ HOWTO (R_ARM_THM_PC8, /* type */ @@ -293,7 +293,7 @@ static reloc_howto_type elf32_arm_howto_table_1[] = HOWTO (R_ARM_XPC25, /* type */ 2, /* rightshift */ 2, /* size (0 = byte, 1 = short, 2 = long) */ - 25, /* bitsize */ + 24, /* bitsize */ TRUE, /* pc_relative */ 0, /* bitpos */ complain_overflow_signed,/* complain_on_overflow */ @@ -308,15 +308,15 @@ static reloc_howto_type elf32_arm_howto_table_1[] = HOWTO (R_ARM_THM_XPC22, /* type */ 2, /* rightshift */ 2, /* size (0 = byte, 1 = short, 2 = long) */ - 22, /* bitsize */ + 24, /* bitsize */ TRUE, /* pc_relative */ 0, /* bitpos */ complain_overflow_signed,/* complain_on_overflow */ bfd_elf_generic_reloc, /* special_function */ "R_ARM_THM_XPC22", /* name */ FALSE, /* partial_inplace */ - 0x07ff07ff, /* src_mask */ - 0x07ff07ff, /* dst_mask */ + 0x07ff2fff, /* src_mask */ + 0x07ff2fff, /* dst_mask */ TRUE), /* pcrel_offset */ /* Dynamic TLS relocations. */ @@ -2776,6 +2776,9 @@ struct elf32_arm_link_hash_table /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */ int fix_cortex_a8; + /* Whether we should fix the ARM1176 BLX immediate issue. */ + int fix_arm1176; + /* Nonzero if the ARM/Thumb BLX instructions are available for use. */ int use_blx; @@ -3315,6 +3318,7 @@ elf32_arm_link_hash_table_create (bfd *abfd) ret->vfp11_erratum_glue_size = 0; ret->num_vfp11_fixes = 0; ret->fix_cortex_a8 = 0; + ret->fix_arm1176 = 0; ret->bfd_of_glue_owner = NULL; ret->byteswap_code = 0; ret->target1_is_rel = 0; @@ -3427,6 +3431,7 @@ arm_stub_is_thumb (enum elf32_arm_stub_type stub_type) case arm_stub_long_branch_v4t_thumb_arm: case arm_stub_short_branch_v4t_thumb_arm: case arm_stub_long_branch_v4t_thumb_arm_pic: + case arm_stub_long_branch_v4t_thumb_tls_pic: case arm_stub_long_branch_thumb_only_pic: return TRUE; case arm_stub_none: @@ -4556,6 +4561,7 @@ cortex_a8_erratum_scan (bfd *input_bfd, bfd_vma target; enum elf32_arm_stub_type stub_type = arm_stub_none; struct a8_erratum_reloc key, *found; + bfd_boolean use_plt = FALSE; key.from = base_vma + i; found = (struct a8_erratum_reloc *) @@ -4567,7 +4573,6 @@ cortex_a8_erratum_scan (bfd *input_bfd, { char *error_message = NULL; struct elf_link_hash_entry *entry; - bfd_boolean use_plt = FALSE; /* We don't care about the error returned from this function, only if there is glue or not. */ @@ -4671,6 +4676,12 @@ cortex_a8_erratum_scan (bfd *input_bfd, offset = (bfd_signed_vma) (found->destination - pc_for_insn); + /* If the stub will use a Thumb-mode branch to a + PLT target, redirect it to the preceding Thumb + entry point. */ + if (stub_type != arm_stub_a8_veneer_blx && use_plt) + offset -= PLT_THUMB_STUB_SIZE; + target = pc_for_insn + offset; /* The BLX stub is ARM-mode code. Adjust the offset to @@ -5923,9 +5934,21 @@ bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info) static void check_use_blx (struct elf32_arm_link_hash_table *globals) { - if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, - Tag_CPU_arch) > 2) - globals->use_blx = 1; + int cpu_arch; + + cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, + Tag_CPU_arch); + + if (globals->fix_arm1176) + { + if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K) + globals->use_blx = 1; + } + else + { + if (cpu_arch > TAG_CPU_ARCH_V4T) + globals->use_blx = 1; + } } bfd_boolean @@ -6779,7 +6802,8 @@ bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd, int use_blx, bfd_arm_vfp11_fix vfp11_fix, int no_enum_warn, int no_wchar_warn, - int pic_veneer, int fix_cortex_a8) + int pic_veneer, int fix_cortex_a8, + int fix_arm1176) { struct elf32_arm_link_hash_table *globals; @@ -6804,6 +6828,7 @@ bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd, globals->vfp11_fix = vfp11_fix; globals->pic_veneer = pic_veneer; globals->fix_cortex_a8 = fix_cortex_a8; + globals->fix_arm1176 = fix_arm1176; BFD_ASSERT (is_arm_elf (output_bfd)); elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn; @@ -8200,10 +8225,15 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto, sym_sec, h, rel, globals, stub_type); - if (stub_entry != NULL) - value = (stub_entry->stub_offset - + stub_entry->stub_sec->output_offset - + stub_entry->stub_sec->output_section->vma); + { + if (stub_entry != NULL) + value = (stub_entry->stub_offset + + stub_entry->stub_sec->output_offset + + stub_entry->stub_sec->output_section->vma); + + if (plt_offset != (bfd_vma) -1) + *unresolved_reloc_p = FALSE; + } } else { @@ -8297,7 +8327,7 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto, case, mode switching is performed by the stub. */ if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry) value |= (1 << 28); - else + else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN) { value &= ~(bfd_vma)(1 << 28); value |= (1 << 24); @@ -8628,9 +8658,14 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto, rel, globals, stub_type); if (stub_entry != NULL) - value = (stub_entry->stub_offset - + stub_entry->stub_sec->output_offset - + stub_entry->stub_sec->output_section->vma); + { + value = (stub_entry->stub_offset + + stub_entry->stub_sec->output_offset + + stub_entry->stub_sec->output_section->vma); + + if (plt_offset != (bfd_vma) -1) + *unresolved_reloc_p = FALSE; + } /* If this call becomes a call to Arm, force BLX. */ if (globals->use_blx && (r_type == R_ARM_THM_CALL)) @@ -9298,6 +9333,9 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto, || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL) { bfd_signed_vma offset; + /* TLS stubs are arm mode. The original symbol is a + data object, so branch_type is bogus. */ + branch_type = ST_BRANCH_TO_ARM; enum elf32_arm_stub_type stub_type = arm_type_of_stub (info, input_section, rel, st_type, &branch_type, @@ -9342,16 +9380,25 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto, input_section->output_offset + rel->r_offset + 4); - /* Round up the offset to a word boundary */ - offset = (offset + 2) & ~2; + if (stub_type != arm_stub_none + && arm_stub_is_thumb (stub_type)) + { + lower_insn = 0xd000; + } + else + { + lower_insn = 0xc000; + /* Round up the offset to a word boundary */ + offset = (offset + 2) & ~2; + } + neg = offset < 0; upper_insn = (0xf000 | ((offset >> 12) & 0x3ff) | (neg << 10)); - lower_insn = (0xc000 - | (((!((offset >> 23) & 1)) ^ neg) << 13) + lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13) | (((!((offset >> 22) & 1)) ^ neg) << 11) - | ((offset >> 1) & 0x7ff)); + | ((offset >> 1) & 0x7ff); bfd_put_16 (input_bfd, upper_insn, hit_data); bfd_put_16 (input_bfd, lower_insn, hit_data + 2); return bfd_reloc_ok; @@ -9435,7 +9482,7 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto, } case R_ARM_TLS_LE32: - if (info->shared) + if (info->shared && !info->pie) { (*_bfd_error_handler) (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"), @@ -10214,7 +10261,7 @@ elf32_arm_relocate_section (bfd * output_bfd, - relocation; addend += msec->output_section->vma + msec->output_offset; - /* Cases here must match those in the preceeding + /* Cases here must match those in the preceding switch statement. */ switch (r_type) { @@ -12019,7 +12066,7 @@ elf32_arm_gc_sweep_hook (bfd * abfd, struct elf_dyn_relocs *p; if (h != NULL) - pp = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs; + pp = &(eh->dyn_relocs); else { Elf_Internal_Sym *isym; @@ -12032,7 +12079,7 @@ elf32_arm_gc_sweep_hook (bfd * abfd, if (pp == NULL) return FALSE; } - for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next) + for (; (p = *pp) != NULL; pp = &p->next) if (p->sec == sec) { /* Everything must go for SEC. */ @@ -12448,6 +12495,8 @@ elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info, Elf_Internal_Shdr **elf_shdrp; bfd_boolean again; + _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook); + /* Marking EH data may cause additional code sections to be marked, requiring multiple passes. */ again = TRUE; @@ -12768,12 +12817,6 @@ allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct elf32_arm_link_hash_entry *) h; info = (struct bfd_link_info *) inf; @@ -13137,9 +13180,6 @@ elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf) struct elf32_arm_link_hash_entry * eh; struct elf_dyn_relocs * p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct elf32_arm_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) { @@ -13725,6 +13765,10 @@ elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info dynobj = elf_hash_table (info)->dynobj; sgot = htab->root.sgotplt; + /* A broken linker script might have discarded the dynamic sections. + Catch this here so that we do not seg-fault later on. */ + if (sgot != NULL && bfd_is_abs_section (sgot->output_section)) + return FALSE; sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); if (elf_hash_table (info)->dynamic_sections_created) @@ -14085,17 +14129,6 @@ elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela) } } -/* Set the right machine number for an Arm ELF file. */ - -static bfd_boolean -elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr) -{ - if (hdr->sh_type == SHT_NOTE) - *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS; - - return TRUE; -} - static void elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED) { @@ -14483,7 +14516,8 @@ elf32_arm_output_arch_local_syms (bfd *output_bfd, == SEC_HAS_CONTENTS && get_arm_elf_section_data (osi.sec) != NULL && get_arm_elf_section_data (osi.sec)->mapcount == 0 - && osi.sec->size > 0) + && osi.sec->size > 0 + && (osi.sec->flags & SEC_EXCLUDE) == 0) { osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd, osi.sec->output_section); @@ -15112,12 +15146,16 @@ elf32_arm_swap_symbol_in (bfd * abfd, /* New EABI objects mark thumb function symbols by setting the low bit of the address. */ - if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC - || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC) - && (dst->st_value & 1)) + if (ELF_ST_TYPE (dst->st_info) == STT_FUNC + || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC) { - dst->st_value &= ~(bfd_vma) 1; - dst->st_target_internal = ST_BRANCH_TO_THUMB; + if (dst->st_value & 1) + { + dst->st_value &= ~(bfd_vma) 1; + dst->st_target_internal = ST_BRANCH_TO_THUMB; + } + else + dst->st_target_internal = ST_BRANCH_TO_ARM; } else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC) { @@ -15127,7 +15165,7 @@ elf32_arm_swap_symbol_in (bfd * abfd, else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION) dst->st_target_internal = ST_BRANCH_LONG; else - dst->st_target_internal = ST_BRANCH_TO_ARM; + dst->st_target_internal = ST_BRANCH_UNKNOWN; return TRUE; } @@ -15317,7 +15355,6 @@ const struct elf_size_info elf32_arm_size_info = #define elf_backend_post_process_headers elf32_arm_post_process_headers #define elf_backend_reloc_type_class elf32_arm_reloc_type_class #define elf_backend_object_p elf32_arm_object_p -#define elf_backend_section_flags elf32_arm_section_flags #define elf_backend_fake_sections elf32_arm_fake_sections #define elf_backend_section_from_shdr elf32_arm_section_from_shdr #define elf_backend_final_write_processing elf32_arm_final_write_processing @@ -15425,7 +15462,7 @@ elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd) bfd_boolean flags_compatible = TRUE; asection *sec; - /* Check if we have the same endianess. */ + /* Check if we have the same endianness. */ if (! _bfd_generic_verify_endian_match (ibfd, obfd)) return FALSE; diff --git a/bfd/elf32-avr.c b/bfd/elf32-avr.c index 1bc40c4..6d20aef 100644 --- a/bfd/elf32-avr.c +++ b/bfd/elf32-avr.c @@ -1,6 +1,6 @@ /* AVR-specific support for 32-bit ELF Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, - 2010 Free Software Foundation, Inc. + 2010, 2011 Free Software Foundation, Inc. Contributed by Denis Chertykov This file is part of BFD, the Binary File Descriptor library. @@ -2008,10 +2008,10 @@ elf32_avr_relax_section (bfd *abfd, if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb)) { /* The next insn is a ret. We possibly could delete - this ret. First we need to check for preceeding + this ret. First we need to check for preceding sbis/sbic/sbrs or cpse "skip" instructions. */ - int there_is_preceeding_non_skip_insn = 1; + int there_is_preceding_non_skip_insn = 1; bfd_vma address_of_ret; address_of_ret = dot + insn_size; @@ -2023,51 +2023,52 @@ elf32_avr_relax_section (bfd *abfd, printf ("found jmp / ret sequence at address 0x%x\n", (int) dot); - /* We have to make sure that there is a preceeding insn. */ + /* We have to make sure that there is a preceding insn. */ if (irel->r_offset >= 2) { - unsigned char preceeding_msb; - unsigned char preceeding_lsb; - preceeding_msb = + unsigned char preceding_msb; + unsigned char preceding_lsb; + + preceding_msb = bfd_get_8 (abfd, contents + irel->r_offset - 1); - preceeding_lsb = + preceding_lsb = bfd_get_8 (abfd, contents + irel->r_offset - 2); /* sbic. */ - if (0x99 == preceeding_msb) - there_is_preceeding_non_skip_insn = 0; + if (0x99 == preceding_msb) + there_is_preceding_non_skip_insn = 0; /* sbis. */ - if (0x9b == preceeding_msb) - there_is_preceeding_non_skip_insn = 0; + if (0x9b == preceding_msb) + there_is_preceding_non_skip_insn = 0; /* sbrc */ - if ((0xfc == (preceeding_msb & 0xfe) - && (0x00 == (preceeding_lsb & 0x08)))) - there_is_preceeding_non_skip_insn = 0; + if ((0xfc == (preceding_msb & 0xfe) + && (0x00 == (preceding_lsb & 0x08)))) + there_is_preceding_non_skip_insn = 0; /* sbrs */ - if ((0xfe == (preceeding_msb & 0xfe) - && (0x00 == (preceeding_lsb & 0x08)))) - there_is_preceeding_non_skip_insn = 0; + if ((0xfe == (preceding_msb & 0xfe) + && (0x00 == (preceding_lsb & 0x08)))) + there_is_preceding_non_skip_insn = 0; /* cpse */ - if (0x10 == (preceeding_msb & 0xfc)) - there_is_preceeding_non_skip_insn = 0; + if (0x10 == (preceding_msb & 0xfc)) + there_is_preceding_non_skip_insn = 0; - if (there_is_preceeding_non_skip_insn == 0) + if (there_is_preceding_non_skip_insn == 0) if (debug_relax) - printf ("preceeding skip insn prevents deletion of" - " ret insn at addr 0x%x in section %s\n", + printf ("preceding skip insn prevents deletion of" + " ret insn at Addy 0x%x in section %s\n", (int) dot + 2, sec->name); } else { /* There is no previous instruction. */ - there_is_preceeding_non_skip_insn = 0; + there_is_preceding_non_skip_insn = 0; } - if (there_is_preceeding_non_skip_insn) + if (there_is_preceding_non_skip_insn) { /* We now only have to make sure that there is no local label defined at the address of the ret diff --git a/bfd/elf32-bfin.c b/bfd/elf32-bfin.c index 40c2c04..b112dfc 100644 --- a/bfd/elf32-bfin.c +++ b/bfd/elf32-bfin.c @@ -5451,9 +5451,6 @@ bfin_discard_copies (struct elf_link_hash_entry *h, PTR inf) struct bfd_link_info *info = (struct bfd_link_info *) inf; struct bfin_pcrel_relocs_copied *s; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (!h->def_regular || (!info->symbolic && !h->forced_local)) { if ((info->flags & DF_TEXTREL) == 0) diff --git a/bfd/elf32-cris.c b/bfd/elf32-cris.c index 9644e9b..243a8ec 100644 --- a/bfd/elf32-cris.c +++ b/bfd/elf32-cris.c @@ -1,6 +1,6 @@ /* CRIS-specific support for 32-bit ELF. Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, - 2010 Free Software Foundation, Inc. + 2010, 2011 Free Software Foundation, Inc. Contributed by Axis Communications AB. Written by Hans-Peter Nilsson, based on elf32-fr30.c PIC and shlib bits based primarily on elf32-m68k.c and elf32-i386.c. @@ -2663,6 +2663,9 @@ cris_elf_gc_sweep_hook (bfd *abfd, /* For local symbols, treat these like GOT relocs. */ if (h == NULL) goto local_got_reloc; + else + /* For global symbols, adjust the reloc-specific refcount. */ + elf_cris_hash_entry (h)->gotplt_refcount--; /* Fall through. */ case R_CRIS_32_PLT_GOTREL: @@ -2671,10 +2674,14 @@ cris_elf_gc_sweep_hook (bfd *abfd, local_got_refcounts[-1]--; /* Fall through. */ + case R_CRIS_8: + case R_CRIS_16: + case R_CRIS_32: case R_CRIS_8_PCREL: case R_CRIS_16_PCREL: case R_CRIS_32_PCREL: case R_CRIS_32_PLT_PCREL: + /* Negate the increment we did in cris_elf_check_relocs. */ if (h != NULL) { if (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT @@ -2733,8 +2740,10 @@ elf_cris_adjust_gotplt_to_got (h, p) { struct bfd_link_info *info = (struct bfd_link_info *) p; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct elf_cris_link_hash_entry *) h->root.root.u.i.link; + /* A GOTPLT reloc, when activated, is supposed to be included into + the PLT refcount. */ + BFD_ASSERT (h->gotplt_refcount == 0 + || h->gotplt_refcount <= h->root.plt.refcount); /* If nobody wanted a GOTPLT with this symbol, we're done. */ if (h->gotplt_refcount <= 0) @@ -3956,9 +3965,6 @@ elf_cris_discard_excess_dso_dynamics (h, inf) struct elf_cris_pcrel_relocs_copied *s; struct bfd_link_info *info = (struct bfd_link_info *) inf; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct elf_cris_link_hash_entry *) h->root.root.u.i.link; - /* If a symbol has been forced local or we have found a regular definition for the symbolic link case, then we won't be needing any relocs. */ @@ -4014,9 +4020,6 @@ elf_cris_discard_excess_program_dynamics (h, inf) { struct bfd_link_info *info = (struct bfd_link_info *) inf; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct elf_cris_link_hash_entry *) h->root.root.u.i.link; - /* If we're not creating a shared library and have a symbol which is referred to by .got references, but the symbol is defined locally, (or rather, not defined by a DSO) then lose the reloc for the .got diff --git a/bfd/elf32-frv.c b/bfd/elf32-frv.c index 8cd26f1..7f3c4dd 100644 --- a/bfd/elf32-frv.c +++ b/bfd/elf32-frv.c @@ -1,5 +1,5 @@ /* FRV-specific support for 32-bit ELF. - Copyright 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + Copyright 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -2884,8 +2884,9 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, osec, sym, rel->r_addend)) { - (*_bfd_error_handler) - (_("%B(%A+0x%x): relocation to `%s+%x' may have caused the error above"), + info->callbacks->einfo + (_("%H: relocation to `%s+%v'" + " may have caused the error above\n"), input_bfd, input_section, rel->r_offset, name, rel->r_addend); return FALSE; } @@ -2897,9 +2898,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, picrel = NULL; if (h && ! FRVFDPIC_SYM_LOCAL (info, h)) { - info->callbacks->warning - (info, _("relocation references symbol not defined in the module"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: relocation references symbol" + " not defined in the module\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } break; @@ -2972,10 +2974,9 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this a call instruction? */ if ((insn & (unsigned long)0x01fc0000) != 0x003c0000) { - r = info->callbacks->warning - (info, - _("R_FRV_GETTLSOFF not applied to a call instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_GETTLSOFF not applied to a call instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3014,10 +3015,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this an lddi instruction? */ if ((insn & (unsigned long)0x01fc0000) != 0x00cc0000) { - r = info->callbacks->warning - (info, - _("R_FRV_GOTTLSDESC12 not applied to an lddi instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_GOTTLSDESC12" + " not applied to an lddi instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3085,10 +3086,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this a sethi instruction? */ if ((insn & (unsigned long)0x01ff0000) != 0x00f80000) { - r = info->callbacks->warning - (info, - _("R_FRV_GOTTLSDESCHI not applied to a sethi instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_GOTTLSDESCHI" + " not applied to a sethi instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3122,11 +3123,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this a setlo or setlos instruction? */ if ((insn & (unsigned long)0x01f70000) != 0x00f40000) { - r = info->callbacks->warning - (info, - _("R_FRV_GOTTLSDESCLO" - " not applied to a setlo or setlos instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_GOTTLSDESCLO" + " not applied to a setlo or setlos instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3170,10 +3170,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this an ldd instruction? */ if ((insn & (unsigned long)0x01fc0fc0) != 0x00080140) { - r = info->callbacks->warning - (info, - _("R_FRV_TLSDESC_RELAX not applied to an ldd instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_TLSDESC_RELAX" + " not applied to an ldd instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3254,11 +3254,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this a calll or callil instruction? */ if ((insn & (unsigned long)0x7ff80fc0) != 0x02300000) { - r = info->callbacks->warning - (info, - _("R_FRV_GETTLSOFF_RELAX" - " not applied to a calll instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_GETTLSOFF_RELAX" + " not applied to a calll instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3309,10 +3308,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this an ldi instruction? */ if ((insn & (unsigned long)0x01fc0000) != 0x00c80000) { - r = info->callbacks->warning - (info, - _("R_FRV_GOTTLSOFF12 not applied to an ldi instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_GOTTLSOFF12" + " not applied to an ldi instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3339,10 +3338,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this a sethi instruction? */ if ((insn & (unsigned long)0x01ff0000) != 0x00f80000) { - r = info->callbacks->warning - (info, - _("R_FRV_GOTTLSOFFHI not applied to a sethi instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_GOTTLSOFFHI" + " not applied to a sethi instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3368,11 +3367,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this a setlo or setlos instruction? */ if ((insn & (unsigned long)0x01f70000) != 0x00f40000) { - r = info->callbacks->warning - (info, - _("R_FRV_GOTTLSOFFLO" - " not applied to a setlo or setlos instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_GOTTLSOFFLO" + " not applied to a setlo or setlos instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3399,10 +3397,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this an ld instruction? */ if ((insn & (unsigned long)0x01fc0fc0) != 0x00080100) { - r = info->callbacks->warning - (info, - _("R_FRV_TLSOFF_RELAX not applied to an ld instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_TLSOFF_RELAX" + " not applied to an ld instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3444,10 +3442,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this a sethi instruction? */ if ((insn & (unsigned long)0x01ff0000) != 0x00f80000) { - r = info->callbacks->warning - (info, - _("R_FRV_TLSMOFFHI not applied to a sethi instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_TLSMOFFHI" + " not applied to a sethi instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3471,11 +3469,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, /* Is this a setlo or setlos instruction? */ if ((insn & (unsigned long)0x01f70000) != 0x00f40000) { - r = info->callbacks->warning - (info, - _("R_FRV_TLSMOFFLO" - " not applied to a setlo or setlos instruction"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("R_FRV_TLSMOFFLO" + " not applied to a setlo or setlos instruction\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3593,9 +3590,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, { if (addend) { - info->callbacks->warning - (info, _("R_FRV_FUNCDESC references dynamic symbol with nonzero addend"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_FUNCDESC references dynamic symbol" + " with nonzero addend\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } dynindx = h->dynindx; @@ -3633,10 +3631,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, input_section ->output_section)) { - info->callbacks->warning - (info, - _("cannot emit fixups in read-only section"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: cannot emit fixups" + " in read-only section\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3664,10 +3662,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, input_section ->output_section)) { - info->callbacks->warning - (info, - _("cannot emit dynamic relocations in read-only section"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: cannot emit dynamic relocations" + " in read-only section\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3713,9 +3711,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, { if (addend && r_type == R_FRV_FUNCDESC_VALUE) { - info->callbacks->warning - (info, _("R_FRV_FUNCDESC_VALUE references dynamic symbol with nonzero addend"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: R_FRV_FUNCDESC_VALUE" + " references dynamic symbol with nonzero addend\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } dynindx = h->dynindx; @@ -3754,10 +3753,9 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, input_section ->output_section)) { - info->callbacks->warning - (info, - _("cannot emit fixups in read-only section"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: cannot emit fixups in read-only section\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } if (!h || h->root.type != bfd_link_hash_undefweak) @@ -3798,10 +3796,10 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, input_section ->output_section)) { - info->callbacks->warning - (info, - _("cannot emit dynamic relocations in read-only section"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: cannot emit dynamic relocations" + " in read-only section\n"), + input_bfd, input_section, rel->r_offset); return FALSE; } @@ -3969,16 +3967,9 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, && !(picrel && picrel->symndx == -1 && picrel->d.h->root.type == bfd_link_hash_undefined)) { - if (info->shared || info->pie) - (*_bfd_error_handler) - (_("%B(%A+0x%lx): reloc against `%s': %s"), - input_bfd, input_section, (long)rel->r_offset, name, - _("relocation references a different segment")); - else - info->callbacks->warning - (info, - _("relocation references a different segment"), - name, input_bfd, input_section, rel->r_offset); + info->callbacks->einfo + (_("%H: reloc against `%s' references a different segment\n"), + input_bfd, input_section, rel->r_offset, name); } if (!silence_segment_error && (info->shared || info->pie)) return FALSE; @@ -4126,9 +4117,9 @@ elf32_frv_relocate_section (output_bfd, info, input_bfd, input_section, if (msg) { - (*_bfd_error_handler) - (_("%B(%A+0x%lx): reloc against `%s': %s"), - input_bfd, input_section, (long)rel->r_offset, name, msg); + info->callbacks->einfo + (_("%H: reloc against `%s': %s\n"), + input_bfd, input_section, rel->r_offset, name, msg); return FALSE; } @@ -5882,8 +5873,8 @@ elf32_frvfdpic_finish_dynamic_sections (bfd *output_bfd, != (frvfdpic_gotfixup_section (info)->reloc_count * 4)) { error: - (*_bfd_error_handler) - ("LINKER BUG: .rofixup section size mismatch"); + info->callbacks->einfo + ("LINKER BUG: .rofixup section size mismatch\n"); return FALSE; } @@ -6402,8 +6393,8 @@ elf32_frv_check_relocs (abfd, info, sec, relocs) default: bad_reloc: - (*_bfd_error_handler) - (_("%B: unsupported relocation type %i"), + info->callbacks->einfo + (_("%B: unsupported relocation type %i\n"), abfd, ELF32_R_TYPE (rel->r_info)); return FALSE; } diff --git a/bfd/elf32-hppa.c b/bfd/elf32-hppa.c index 81bc042..7f0f2cb 100644 --- a/bfd/elf32-hppa.c +++ b/bfd/elf32-hppa.c @@ -1,6 +1,6 @@ /* BFD back-end for HP PA-RISC ELF files. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000, 2001, - 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Original code by @@ -950,9 +950,9 @@ elf32_hppa_object_p (bfd *abfd) i_ehdrp = elf_elfheader (abfd); if (strcmp (bfd_get_target (abfd), "elf32-hppa-linux") == 0) { - /* GCC on hppa-linux produces binaries with OSABI=Linux, + /* GCC on hppa-linux produces binaries with OSABI=GNU, but the kernel produces corefiles with OSABI=SysV. */ - if (i_ehdrp->e_ident[EI_OSABI] != ELFOSABI_LINUX && + if (i_ehdrp->e_ident[EI_OSABI] != ELFOSABI_GNU && i_ehdrp->e_ident[EI_OSABI] != ELFOSABI_NONE) /* aka SYSV */ return FALSE; } @@ -1938,9 +1938,6 @@ allocate_plt_static (struct elf_link_hash_entry *eh, void *inf) if (eh->root.type == bfd_link_hash_indirect) return TRUE; - if (eh->root.type == bfd_link_hash_warning) - eh = (struct elf_link_hash_entry *) eh->root.u.i.link; - info = (struct bfd_link_info *) inf; hh = hppa_elf_hash_entry (eh); htab = hppa_link_hash_table (info); @@ -2008,9 +2005,6 @@ allocate_dynrelocs (struct elf_link_hash_entry *eh, void *inf) if (eh->root.type == bfd_link_hash_indirect) return TRUE; - if (eh->root.type == bfd_link_hash_warning) - eh = (struct elf_link_hash_entry *) eh->root.u.i.link; - info = inf; htab = hppa_link_hash_table (info); if (htab == NULL) @@ -2170,9 +2164,6 @@ static bfd_boolean clobber_millicode_symbols (struct elf_link_hash_entry *eh, struct bfd_link_info *info) { - if (eh->root.type == bfd_link_hash_warning) - eh = (struct elf_link_hash_entry *) eh->root.u.i.link; - if (eh->type == STT_PARISC_MILLI && !eh->forced_local) { @@ -2189,9 +2180,6 @@ readonly_dynrelocs (struct elf_link_hash_entry *eh, void *inf) struct elf32_hppa_link_hash_entry *hh; struct elf32_hppa_dyn_reloc_entry *hdh_p; - if (eh->root.type == bfd_link_hash_warning) - eh = (struct elf_link_hash_entry *) eh->root.u.i.link; - hh = hppa_elf_hash_entry (eh); for (hdh_p = hh->dyn_relocs; hdh_p != NULL; hdh_p = hdh_p->hdh_next) { @@ -4498,6 +4486,7 @@ elf32_hppa_finish_dynamic_sections (bfd *output_bfd, bfd *dynobj; struct elf32_hppa_link_hash_table *htab; asection *sdyn; + asection * sgot; htab = hppa_link_hash_table (info); if (htab == NULL) @@ -4505,6 +4494,12 @@ elf32_hppa_finish_dynamic_sections (bfd *output_bfd, dynobj = htab->etab.dynobj; + sgot = htab->sgot; + /* A broken linker script might have discarded the dynamic sections. + Catch this here so that we do not seg-fault later on. */ + if (sgot != NULL && bfd_is_abs_section (sgot->output_section)) + return FALSE; + sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); if (htab->etab.dynamic_sections_created) @@ -4569,19 +4564,19 @@ elf32_hppa_finish_dynamic_sections (bfd *output_bfd, } } - if (htab->sgot != NULL && htab->sgot->size != 0) + if (sgot != NULL && sgot->size != 0) { /* Fill in the first entry in the global offset table. We use it to point to our dynamic section, if we have one. */ bfd_put_32 (output_bfd, sdyn ? sdyn->output_section->vma + sdyn->output_offset : 0, - htab->sgot->contents); + sgot->contents); /* The second entry is reserved for use by the dynamic linker. */ - memset (htab->sgot->contents + GOT_ENTRY_SIZE, 0, GOT_ENTRY_SIZE); + memset (sgot->contents + GOT_ENTRY_SIZE, 0, GOT_ENTRY_SIZE); /* Set .got entry size. */ - elf_section_data (htab->sgot->output_section) + elf_section_data (sgot->output_section) ->this_hdr.sh_entsize = GOT_ENTRY_SIZE; } @@ -4601,8 +4596,8 @@ elf32_hppa_finish_dynamic_sections (bfd *output_bfd, if ((htab->splt->output_offset + htab->splt->output_section->vma + htab->splt->size) - != (htab->sgot->output_offset - + htab->sgot->output_section->vma)) + != (sgot->output_offset + + sgot->output_section->vma)) { (*_bfd_error_handler) (_(".got section not immediately after .plt section")); @@ -4683,7 +4678,7 @@ elf32_hppa_elf_get_symbol_type (Elf_Internal_Sym *elf_sym, int type) #undef TARGET_BIG_NAME #define TARGET_BIG_NAME "elf32-hppa-linux" #undef ELF_OSABI -#define ELF_OSABI ELFOSABI_LINUX +#define ELF_OSABI ELFOSABI_GNU #undef elf32_bed #define elf32_bed elf32_hppa_linux_bed diff --git a/bfd/elf32-i370.c b/bfd/elf32-i370.c index a6174c2..8082927 100644 --- a/bfd/elf32-i370.c +++ b/bfd/elf32-i370.c @@ -1,6 +1,6 @@ /* i370-specific support for 32-bit ELF Copyright 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002, 2003, 2004, - 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc. + 2005, 2006, 2007, 2008, 2010, 2011 Free Software Foundation, Inc. Written by Ian Lance Taylor, Cygnus Support. Hacked by Linas Vepstas for i370 linas@linas.org @@ -562,9 +562,6 @@ i370_elf_adjust_dynindx (struct elf_link_hash_entry *h, void * cparg) h->dynindx, *cp); #endif - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (h->dynindx != -1) h->dynindx += *cp; @@ -1371,7 +1368,7 @@ i370_elf_relocate_section (bfd *output_bfd, #define ELF_MACHINE_ALT1 EM_I370_OLD #endif #define ELF_MAXPAGESIZE 0x1000 -#define ELF_OSABI ELFOSABI_LINUX +#define ELF_OSABI ELFOSABI_GNU #define elf_info_to_howto i370_elf_info_to_howto diff --git a/bfd/elf32-i386.c b/bfd/elf32-i386.c index 8934d27..d518d01 100644 --- a/bfd/elf32-i386.c +++ b/bfd/elf32-i386.c @@ -29,6 +29,7 @@ #include "bfd_stdint.h" #include "objalloc.h" #include "hashtab.h" +#include "dwarf2.h" /* 386 uses REL relocations instead of RELA. */ #define USE_REL 1 @@ -574,12 +575,135 @@ static const bfd_byte elf_i386_pic_plt_entry[PLT_ENTRY_SIZE] = 0, 0, 0, 0 /* replaced with offset to start of .plt. */ }; +/* .eh_frame covering the .plt section. */ + +static const bfd_byte elf_i386_eh_frame_plt[] = +{ +#define PLT_CIE_LENGTH 20 +#define PLT_FDE_LENGTH 36 +#define PLT_FDE_START_OFFSET 4 + PLT_CIE_LENGTH + 8 +#define PLT_FDE_LEN_OFFSET 4 + PLT_CIE_LENGTH + 12 + PLT_CIE_LENGTH, 0, 0, 0, /* CIE length */ + 0, 0, 0, 0, /* CIE ID */ + 1, /* CIE version */ + 'z', 'R', 0, /* Augmentation string */ + 1, /* Code alignment factor */ + 0x7c, /* Data alignment factor */ + 8, /* Return address column */ + 1, /* Augmentation size */ + DW_EH_PE_pcrel | DW_EH_PE_sdata4, /* FDE encoding */ + DW_CFA_def_cfa, 4, 4, /* DW_CFA_def_cfa: r4 (esp) ofs 4 */ + DW_CFA_offset + 8, 1, /* DW_CFA_offset: r8 (eip) at cfa-4 */ + DW_CFA_nop, DW_CFA_nop, + + PLT_FDE_LENGTH, 0, 0, 0, /* FDE length */ + PLT_CIE_LENGTH + 8, 0, 0, 0, /* CIE pointer */ + 0, 0, 0, 0, /* R_386_PC32 .plt goes here */ + 0, 0, 0, 0, /* .plt size goes here */ + 0, /* Augmentation size */ + DW_CFA_def_cfa_offset, 8, /* DW_CFA_def_cfa_offset: 8 */ + DW_CFA_advance_loc + 6, /* DW_CFA_advance_loc: 6 to __PLT__+6 */ + DW_CFA_def_cfa_offset, 12, /* DW_CFA_def_cfa_offset: 12 */ + DW_CFA_advance_loc + 10, /* DW_CFA_advance_loc: 10 to __PLT__+16 */ + DW_CFA_def_cfa_expression, /* DW_CFA_def_cfa_expression */ + 11, /* Block length */ + DW_OP_breg4, 4, /* DW_OP_breg4 (esp): 4 */ + DW_OP_breg8, 0, /* DW_OP_breg8 (eip): 0 */ + DW_OP_lit15, DW_OP_and, DW_OP_lit11, DW_OP_ge, + DW_OP_lit2, DW_OP_shl, DW_OP_plus, + DW_CFA_nop, DW_CFA_nop, DW_CFA_nop, DW_CFA_nop +}; + +struct elf_i386_plt_layout +{ + /* The first entry in an absolute procedure linkage table looks like this. */ + const bfd_byte *plt0_entry; + unsigned int plt0_entry_size; + + /* Offsets into plt0_entry that are to be replaced with GOT[1] and GOT[2]. */ + unsigned int plt0_got1_offset; + unsigned int plt0_got2_offset; + + /* Later entries in an absolute procedure linkage table look like this. */ + const bfd_byte *plt_entry; + unsigned int plt_entry_size; + + /* Offsets into plt_entry that are to be replaced with... */ + unsigned int plt_got_offset; /* ... address of this symbol in .got. */ + unsigned int plt_reloc_offset; /* ... offset into relocation table. */ + unsigned int plt_plt_offset; /* ... offset to start of .plt. */ + + /* Offset into plt_entry where the initial value of the GOT entry points. */ + unsigned int plt_lazy_offset; + + /* The first entry in a PIC procedure linkage table looks like this. */ + const bfd_byte *pic_plt0_entry; + + /* Subsequent entries in a PIC procedure linkage table look like this. */ + const bfd_byte *pic_plt_entry; + + /* .eh_frame covering the .plt section. */ + const bfd_byte *eh_frame_plt; + unsigned int eh_frame_plt_size; +}; + +#define GET_PLT_ENTRY_SIZE(abfd) \ + get_elf_i386_backend_data (abfd)->plt->plt_entry_size + +/* These are the standard parameters. */ +static const struct elf_i386_plt_layout elf_i386_plt = + { + elf_i386_plt0_entry, /* plt0_entry */ + sizeof (elf_i386_plt0_entry), /* plt0_entry_size */ + 2, /* plt0_got1_offset */ + 8, /* plt0_got2_offset */ + elf_i386_plt_entry, /* plt_entry */ + PLT_ENTRY_SIZE, /* plt_entry_size */ + 2, /* plt_got_offset */ + 7, /* plt_reloc_offset */ + 12, /* plt_plt_offset */ + 6, /* plt_lazy_offset */ + elf_i386_pic_plt0_entry, /* pic_plt0_entry */ + elf_i386_pic_plt_entry, /* pic_plt_entry */ + elf_i386_eh_frame_plt, /* eh_frame_plt */ + sizeof (elf_i386_eh_frame_plt), /* eh_frame_plt_size */ + }; + + /* On VxWorks, the .rel.plt.unloaded section has absolute relocations for the PLTResolve stub and then for each PLT entry. */ #define PLTRESOLVE_RELOCS_SHLIB 0 #define PLTRESOLVE_RELOCS 2 #define PLT_NON_JUMP_SLOT_RELOCS 2 +/* Architecture-specific backend data for i386. */ + +struct elf_i386_backend_data +{ + /* Parameters describing PLT generation. */ + const struct elf_i386_plt_layout *plt; + + /* Value used to fill the unused bytes of the first PLT entry. */ + bfd_byte plt0_pad_byte; + + /* True if the target system is VxWorks. */ + int is_vxworks; +}; + +#define get_elf_i386_backend_data(abfd) \ + ((const struct elf_i386_backend_data *) \ + get_elf_backend_data (abfd)->arch_data) + +/* These are the standard parameters. */ +static const struct elf_i386_backend_data elf_i386_arch_bed = + { + &elf_i386_plt, /* plt */ + 0, /* plt0_pad_byte */ + 0, /* is_vxworks */ + }; + +#define elf_backend_arch_data &elf_i386_arch_bed + /* i386 ELF linker hash entry. */ struct elf_i386_link_hash_entry @@ -655,6 +779,7 @@ struct elf_i386_link_hash_table /* Short-cuts to get to dynamic linker sections. */ asection *sdynbss; asection *srelbss; + asection *plt_eh_frame; union { @@ -679,14 +804,8 @@ struct elf_i386_link_hash_table /* The (unloaded but important) .rel.plt.unloaded section on VxWorks. */ asection *srelplt2; - /* True if the target system is VxWorks. */ - int is_vxworks; - /* The index of the next unused R_386_TLS_DESC slot in .rel.plt. */ bfd_vma next_tls_desc_index; - - /* Value used to fill the last word of the first plt entry. */ - bfd_byte plt0_pad_byte; }; /* Get the i386 ELF linker hash table from a link_info structure. */ @@ -820,13 +939,12 @@ elf_i386_link_hash_table_create (bfd *abfd) ret->sdynbss = NULL; ret->srelbss = NULL; + ret->plt_eh_frame = NULL; ret->tls_ldm_got.refcount = 0; ret->next_tls_desc_index = 0; ret->sgotplt_jump_table_size = 0; ret->sym_cache.abfd = NULL; - ret->is_vxworks = 0; ret->srelplt2 = NULL; - ret->plt0_pad_byte = 0; ret->tls_module_base = NULL; ret->loc_hash_table = htab_try_create (1024, @@ -882,11 +1000,30 @@ elf_i386_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) || (!info->shared && !htab->srelbss)) abort (); - if (htab->is_vxworks + if (get_elf_i386_backend_data (dynobj)->is_vxworks && !elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2)) return FALSE; + if (!info->no_ld_generated_unwind_info + && bfd_get_section_by_name (dynobj, ".eh_frame") == NULL + && htab->elf.splt != NULL) + { + flagword flags = get_elf_backend_data (dynobj)->dynamic_sec_flags; + htab->plt_eh_frame + = bfd_make_section_with_flags (dynobj, ".eh_frame", + flags | SEC_READONLY); + if (htab->plt_eh_frame == NULL + || !bfd_set_section_alignment (dynobj, htab->plt_eh_frame, 2)) + return FALSE; + + htab->plt_eh_frame->size = sizeof (elf_i386_eh_frame_plt); + htab->plt_eh_frame->contents + = bfd_alloc (dynobj, htab->plt_eh_frame->size); + memcpy (htab->plt_eh_frame->contents, elf_i386_eh_frame_plt, + sizeof (elf_i386_eh_frame_plt)); + } + return TRUE; } @@ -957,13 +1094,6 @@ elf_i386_copy_indirect_symbol (struct bfd_link_info *info, _bfd_elf_link_hash_copy_indirect (info, dir, ind); } -typedef union - { - unsigned char c[2]; - uint16_t i; - } -i386_opcode16; - /* Return TRUE if the TLS access code sequence support transition from R_TYPE. */ @@ -1134,8 +1264,8 @@ elf_i386_check_tls_transition (bfd *abfd, asection *sec, if (offset + 2 <= sec->size) { /* Make sure that it's a call *x@tlsdesc(%rax). */ - static i386_opcode16 call = { { 0xff, 0x10 } }; - return bfd_get_16 (abfd, contents + offset) == call.i; + static const unsigned char call[] = { 0xff, 0x10 }; + return memcmp (contents + offset, call, 2) == 0; } return FALSE; @@ -1376,7 +1506,9 @@ elf_i386_check_relocs (bfd *abfd, case R_386_PLT32: case R_386_GOT32: case R_386_GOTOFF: - if (!_bfd_elf_create_ifunc_sections (abfd, info)) + if (htab->elf.dynobj == NULL) + htab->elf.dynobj = abfd; + if (!_bfd_elf_create_ifunc_sections (htab->elf.dynobj, info)) return FALSE; break; } @@ -1453,7 +1585,7 @@ elf_i386_check_relocs (bfd *abfd, if (! elf_i386_tls_transition (info, abfd, sec, NULL, symtab_hdr, sym_hashes, &r_type, GOT_UNKNOWN, - rel, rel_end, h, r_symndx)) + rel, rel_end, h, r_symndx)) return FALSE; switch (r_type) @@ -1851,7 +1983,7 @@ elf_i386_gc_sweep_hook (bfd *abfd, if (! elf_i386_tls_transition (info, abfd, sec, NULL, symtab_hdr, sym_hashes, &r_type, GOT_UNKNOWN, - rel, relend, h, r_symndx)) + rel, relend, h, r_symndx)) return FALSE; switch (r_type) @@ -2016,7 +2148,8 @@ elf_i386_adjust_dynamic_symbol (struct bfd_link_info *info, we can keep the dynamic relocs and avoid the copy reloc. This doesn't work on VxWorks, where we can not have dynamic relocations (other than copy and jump slot relocations) in an executable. */ - if (ELIMINATE_COPY_RELOCS && !htab->is_vxworks) + if (ELIMINATE_COPY_RELOCS + && !get_elf_i386_backend_data (info->output_bfd)->is_vxworks) { struct elf_i386_link_hash_entry * eh; struct elf_dyn_relocs *p; @@ -2077,15 +2210,11 @@ elf_i386_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) struct elf_i386_link_hash_table *htab; struct elf_i386_link_hash_entry *eh; struct elf_dyn_relocs *p; + unsigned plt_entry_size; if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; eh = (struct elf_i386_link_hash_entry *) h; info = (struct bfd_link_info *) inf; @@ -2093,13 +2222,14 @@ elf_i386_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) if (htab == NULL) return FALSE; + plt_entry_size = GET_PLT_ENTRY_SIZE (info->output_bfd); + /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it here if it is defined and referenced in a non-shared object. */ if (h->type == STT_GNU_IFUNC && h->def_regular) - return _bfd_elf_allocate_ifunc_dyn_relocs (info, h, - &eh->dyn_relocs, - PLT_ENTRY_SIZE, 4); + return _bfd_elf_allocate_ifunc_dyn_relocs (info, h, &eh->dyn_relocs, + plt_entry_size, 4); else if (htab->elf.dynamic_sections_created && h->plt.refcount > 0) { @@ -2120,7 +2250,7 @@ elf_i386_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) /* If this is the first .plt entry, make room for the special first entry. */ if (s->size == 0) - s->size += PLT_ENTRY_SIZE; + s->size += plt_entry_size; h->plt.offset = s->size; @@ -2137,7 +2267,7 @@ elf_i386_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) } /* Make room for this entry. */ - s->size += PLT_ENTRY_SIZE; + s->size += plt_entry_size; /* We also need to make an entry in the .got.plt section, which will be placed in the .got section by the linker script. */ @@ -2147,7 +2277,8 @@ elf_i386_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) htab->elf.srelplt->size += sizeof (Elf32_External_Rel); htab->next_tls_desc_index++; - if (htab->is_vxworks && !info->shared) + if (get_elf_i386_backend_data (info->output_bfd)->is_vxworks + && !info->shared) { /* VxWorks has a second set of relocations for each PLT entry in executables. They go in a separate relocation section, @@ -2157,7 +2288,7 @@ elf_i386_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) R_386_32 relocation for _GLOBAL_OFFSET_TABLE_ + 4 and an R_386_32 relocation for _GLOBAL_OFFSET_TABLE_ + 8. */ - if (h->plt.offset == PLT_ENTRY_SIZE) + if (h->plt.offset == plt_entry_size) htab->srelplt2->size += (sizeof (Elf32_External_Rel) * 2); /* There are two extra relocations for each subsequent PLT entry: @@ -2277,7 +2408,7 @@ elf_i386_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) } } - if (htab->is_vxworks) + if (get_elf_i386_backend_data (info->output_bfd)->is_vxworks) { struct elf_dyn_relocs **pp; for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) @@ -2381,8 +2512,9 @@ elf_i386_readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) struct elf_i386_link_hash_entry *eh; struct elf_dyn_relocs *p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; + /* Skip local IFUNC symbols. */ + if (h->forced_local && h->type == STT_GNU_IFUNC) + return TRUE; eh = (struct elf_i386_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) @@ -2395,6 +2527,11 @@ elf_i386_readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) info->flags |= DF_TEXTREL; + if (info->warn_shared_textrel && info->shared) + info->callbacks->einfo (_("%P: %B: warning: relocation against `%s' in readonly section `%A'.\n"), + p->sec->owner, h->root.root.string, + p->sec); + /* Not an error, just cut short the traversal. */ return FALSE; } @@ -2405,8 +2542,7 @@ elf_i386_readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) /* Set the sizes of the dynamic sections. */ static bfd_boolean -elf_i386_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, - struct bfd_link_info *info) +elf_i386_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) { struct elf_i386_link_hash_table *htab; bfd *dynobj; @@ -2466,7 +2602,7 @@ elf_i386_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, linker script /DISCARD/, so we'll be discarding the relocs too. */ } - else if (htab->is_vxworks + else if (get_elf_i386_backend_data (output_bfd)->is_vxworks && strcmp (p->sec->output_section->name, ".tls_vars") == 0) { @@ -2477,8 +2613,14 @@ elf_i386_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, { srel = elf_section_data (p->sec)->sreloc; srel->size += p->count * sizeof (Elf32_External_Rel); - if ((p->sec->output_section->flags & SEC_READONLY) != 0) - info->flags |= DF_TEXTREL; + if ((p->sec->output_section->flags & SEC_READONLY) != 0 + && (info->flags & DF_TEXTREL) == 0) + { + info->flags |= DF_TEXTREL; + if (info->warn_shared_textrel && info->shared) + info->callbacks->einfo (_("%P: %B: warning: relocation in readonly section `%A'.\n"), + p->sec->owner, p->sec); + } } } } @@ -2658,6 +2800,13 @@ elf_i386_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, return FALSE; } + if (htab->plt_eh_frame != NULL + && htab->elf.splt != NULL + && htab->elf.splt->size != 0 + && (htab->elf.splt->flags & SEC_EXCLUDE) == 0) + bfd_put_32 (dynobj, htab->elf.splt->size, + htab->plt_eh_frame->contents + PLT_FDE_LEN_OFFSET); + if (htab->elf.dynamic_sections_created) { /* Add some entries to the .dynamic section. We fill in the @@ -2702,7 +2851,7 @@ elf_i386_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, return FALSE; } } - if (htab->is_vxworks + if (get_elf_i386_backend_data (output_bfd)->is_vxworks && !elf_vxworks_add_dynamic_entries (output_bfd, info)) return FALSE; } @@ -2865,6 +3014,7 @@ elf_i386_relocate_section (bfd *output_bfd, Elf_Internal_Rela *rel; Elf_Internal_Rela *relend; bfd_boolean is_vxworks_tls; + unsigned plt_entry_size; BFD_ASSERT (is_i386_elf (input_bfd)); @@ -2877,12 +3027,15 @@ elf_i386_relocate_section (bfd *output_bfd, local_tlsdesc_gotents = elf_i386_local_tlsdesc_gotent (input_bfd); /* We have to handle relocations in vxworks .tls_vars sections specially, because the dynamic loader is 'weird'. */ - is_vxworks_tls = (htab->is_vxworks && info->shared + is_vxworks_tls = (get_elf_i386_backend_data (output_bfd)->is_vxworks + && info->shared && !strcmp (input_section->output_section->name, ".tls_vars")); elf_i386_set_tls_module_base (info); + plt_entry_size = GET_PLT_ENTRY_SIZE (output_bfd); + rel = relocs; relend = relocs + input_section->reloc_count; for (; rel < relend; rel++) @@ -3010,7 +3163,7 @@ elf_i386_relocate_section (bfd *output_bfd, if (h == NULL) abort (); - /* Set STT_GNU_IFUNC symbol value. */ + /* Set STT_GNU_IFUNC symbol value. */ h->root.u.def.value = sym->st_value; h->root.u.def.section = sec; } @@ -3108,7 +3261,7 @@ elf_i386_relocate_section (bfd *output_bfd, /* This symbol is resolved locally. */ outrel.r_info = ELF32_R_INFO (0, R_386_IRELATIVE); bfd_put_32 (output_bfd, - (h->root.u.def.value + (h->root.u.def.value + h->root.u.def.section->output_section->vma + h->root.u.def.section->output_offset), contents + offset); @@ -3149,13 +3302,13 @@ elf_i386_relocate_section (bfd *output_bfd, if (htab->elf.splt != NULL) { - plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1; + plt_index = h->plt.offset / plt_entry_size - 1; off = (plt_index + 3) * 4; base_got = htab->elf.sgotplt; } else { - plt_index = h->plt.offset / PLT_ENTRY_SIZE; + plt_index = h->plt.offset / plt_entry_size; off = plt_index * 4; base_got = htab->elf.igotplt; } @@ -3774,7 +3927,7 @@ elf_i386_relocate_section (bfd *output_bfd, relocation - elf_i386_dtpoff_base (info), htab->elf.sgot->contents + off); else if (dr_type == R_386_TLS_TPOFF32 && indx == 0) - bfd_put_32 (output_bfd, + bfd_put_32 (output_bfd, elf_i386_dtpoff_base (info) - relocation, htab->elf.sgot->contents + off); else if (dr_type != R_386_TLS_DESC) @@ -4151,11 +4304,16 @@ elf_i386_finish_dynamic_symbol (bfd *output_bfd, Elf_Internal_Sym *sym) { struct elf_i386_link_hash_table *htab; + unsigned plt_entry_size; + const struct elf_i386_backend_data *abed; htab = elf_i386_hash_table (info); if (htab == NULL) return FALSE; + abed = get_elf_i386_backend_data (output_bfd); + plt_entry_size = GET_PLT_ENTRY_SIZE (output_bfd); + if (h->plt.offset != (bfd_vma) -1) { bfd_vma plt_index; @@ -4189,7 +4347,7 @@ elf_i386_finish_dynamic_symbol (bfd *output_bfd, || plt == NULL || gotplt == NULL || relplt == NULL) - abort (); + return FALSE; /* Get the index in the procedure linkage table which corresponds to this symbol. This is the index of this symbol @@ -4204,27 +4362,28 @@ elf_i386_finish_dynamic_symbol (bfd *output_bfd, if (plt == htab->elf.splt) { - plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1; + plt_index = h->plt.offset / plt_entry_size - 1; got_offset = (plt_index + 3) * 4; } else { - plt_index = h->plt.offset / PLT_ENTRY_SIZE; + plt_index = h->plt.offset / plt_entry_size; got_offset = plt_index * 4; } /* Fill in the entry in the procedure linkage table. */ if (! info->shared) { - memcpy (plt->contents + h->plt.offset, elf_i386_plt_entry, - PLT_ENTRY_SIZE); + memcpy (plt->contents + h->plt.offset, abed->plt->plt_entry, + abed->plt->plt_entry_size); bfd_put_32 (output_bfd, (gotplt->output_section->vma + gotplt->output_offset + got_offset), - plt->contents + h->plt.offset + 2); + plt->contents + h->plt.offset + + abed->plt->plt_got_offset); - if (htab->is_vxworks) + if (abed->is_vxworks) { int s, k, reloc_index; @@ -4232,7 +4391,8 @@ elf_i386_finish_dynamic_symbol (bfd *output_bfd, for this PLT entry. */ /* S: Current slot number (zero-based). */ - s = (h->plt.offset - PLT_ENTRY_SIZE) / PLT_ENTRY_SIZE; + s = ((h->plt.offset - abed->plt->plt_entry_size) + / abed->plt->plt_entry_size); /* K: Number of relocations for PLTResolve. */ if (info->shared) k = PLTRESOLVE_RELOCS_SHLIB; @@ -4262,19 +4422,23 @@ elf_i386_finish_dynamic_symbol (bfd *output_bfd, } else { - memcpy (plt->contents + h->plt.offset, elf_i386_pic_plt_entry, - PLT_ENTRY_SIZE); + memcpy (plt->contents + h->plt.offset, abed->plt->pic_plt_entry, + abed->plt->plt_entry_size); bfd_put_32 (output_bfd, got_offset, - plt->contents + h->plt.offset + 2); + plt->contents + h->plt.offset + + abed->plt->plt_got_offset); } /* Don't fill PLT entry for static executables. */ if (plt == htab->elf.splt) { bfd_put_32 (output_bfd, plt_index * sizeof (Elf32_External_Rel), - plt->contents + h->plt.offset + 7); - bfd_put_32 (output_bfd, - (h->plt.offset + PLT_ENTRY_SIZE), - plt->contents + h->plt.offset + 12); + plt->contents + h->plt.offset + + abed->plt->plt_reloc_offset); + bfd_put_32 (output_bfd, - (h->plt.offset + + abed->plt->plt_plt_offset + 4), + plt->contents + h->plt.offset + + abed->plt->plt_plt_offset); } /* Fill in the entry in the global offset table. */ @@ -4282,7 +4446,7 @@ elf_i386_finish_dynamic_symbol (bfd *output_bfd, (plt->output_section->vma + plt->output_offset + h->plt.offset - + 6), + + abed->plt->plt_lazy_offset), gotplt->contents + got_offset); /* Fill in the entry in the .rel.plt section. */ @@ -4299,7 +4463,7 @@ elf_i386_finish_dynamic_symbol (bfd *output_bfd, R_386_IRELATIVE instead of R_386_JUMP_SLOT. Store addend in the .got.plt section. */ bfd_put_32 (output_bfd, - (h->root.u.def.value + (h->root.u.def.value + h->root.u.def.section->output_section->vma + h->root.u.def.section->output_offset), gotplt->contents + got_offset); @@ -4423,7 +4587,8 @@ do_glob_dat: is relative to the ".got" section. */ if (sym != NULL && (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || (!htab->is_vxworks && h == htab->elf.hgot))) + || (!abed->is_vxworks + && h == htab->elf.hgot))) sym->st_shndx = SHN_ABS; return TRUE; @@ -4438,7 +4603,7 @@ elf_i386_finish_local_dynamic_symbol (void **slot, void *inf) struct elf_link_hash_entry *h = (struct elf_link_hash_entry *) *slot; struct bfd_link_info *info - = (struct bfd_link_info *) inf; + = (struct bfd_link_info *) inf; return elf_i386_finish_dynamic_symbol (info->output_bfd, info, h, NULL); @@ -4472,6 +4637,7 @@ elf_i386_finish_dynamic_sections (bfd *output_bfd, struct elf_i386_link_hash_table *htab; bfd *dynobj; asection *sdyn; + const struct elf_i386_backend_data *abed; htab = elf_i386_hash_table (info); if (htab == NULL) @@ -4479,6 +4645,7 @@ elf_i386_finish_dynamic_sections (bfd *output_bfd, dynobj = htab->elf.dynobj; sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); + abed = get_elf_i386_backend_data (output_bfd); if (htab->elf.dynamic_sections_created) { @@ -4499,8 +4666,8 @@ elf_i386_finish_dynamic_sections (bfd *output_bfd, switch (dyn.d_tag) { default: - if (htab->is_vxworks - && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn)) + if (abed->is_vxworks + && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn)) break; continue; @@ -4553,31 +4720,33 @@ elf_i386_finish_dynamic_sections (bfd *output_bfd, { if (info->shared) { - memcpy (htab->elf.splt->contents, elf_i386_pic_plt0_entry, - sizeof (elf_i386_pic_plt0_entry)); - memset (htab->elf.splt->contents + sizeof (elf_i386_pic_plt0_entry), - htab->plt0_pad_byte, - PLT_ENTRY_SIZE - sizeof (elf_i386_pic_plt0_entry)); + memcpy (htab->elf.splt->contents, abed->plt->pic_plt0_entry, + abed->plt->plt0_entry_size); + memset (htab->elf.splt->contents + abed->plt->plt0_entry_size, + abed->plt0_pad_byte, + abed->plt->plt_entry_size - abed->plt->plt0_entry_size); } else { - memcpy (htab->elf.splt->contents, elf_i386_plt0_entry, - sizeof(elf_i386_plt0_entry)); - memset (htab->elf.splt->contents + sizeof (elf_i386_plt0_entry), - htab->plt0_pad_byte, - PLT_ENTRY_SIZE - sizeof (elf_i386_plt0_entry)); + memcpy (htab->elf.splt->contents, abed->plt->plt0_entry, + abed->plt->plt0_entry_size); + memset (htab->elf.splt->contents + abed->plt->plt0_entry_size, + abed->plt0_pad_byte, + abed->plt->plt_entry_size - abed->plt->plt0_entry_size); bfd_put_32 (output_bfd, (htab->elf.sgotplt->output_section->vma + htab->elf.sgotplt->output_offset + 4), - htab->elf.splt->contents + 2); + htab->elf.splt->contents + + abed->plt->plt0_got1_offset); bfd_put_32 (output_bfd, (htab->elf.sgotplt->output_section->vma + htab->elf.sgotplt->output_offset + 8), - htab->elf.splt->contents + 8); + htab->elf.splt->contents + + abed->plt->plt0_got2_offset); - if (htab->is_vxworks) + if (abed->is_vxworks) { Elf_Internal_Rela rel; @@ -4586,14 +4755,14 @@ elf_i386_finish_dynamic_sections (bfd *output_bfd, the PLT directly. */ rel.r_offset = (htab->elf.splt->output_section->vma + htab->elf.splt->output_offset - + 2); + + abed->plt->plt0_got1_offset); rel.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_386_32); bfd_elf32_swap_reloc_out (output_bfd, &rel, htab->srelplt2->contents); /* Generate a relocation for _GLOBAL_OFFSET_TABLE_ + 8. */ rel.r_offset = (htab->elf.splt->output_section->vma + htab->elf.splt->output_offset - + 8); + + abed->plt->plt0_got2_offset); rel.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_386_32); bfd_elf32_swap_reloc_out (output_bfd, &rel, htab->srelplt2->contents + @@ -4607,9 +4776,10 @@ elf_i386_finish_dynamic_sections (bfd *output_bfd, ->this_hdr.sh_entsize = 4; /* Correct the .rel.plt.unloaded relocations. */ - if (htab->is_vxworks && !info->shared) + if (abed->is_vxworks && !info->shared) { - int num_plts = (htab->elf.splt->size / PLT_ENTRY_SIZE) - 1; + int num_plts = (htab->elf.splt->size + / abed->plt->plt_entry_size) - 1; unsigned char *p; p = htab->srelplt2->contents; @@ -4658,6 +4828,33 @@ elf_i386_finish_dynamic_sections (bfd *output_bfd, elf_section_data (htab->elf.sgotplt->output_section)->this_hdr.sh_entsize = 4; } + /* Adjust .eh_frame for .plt section. */ + if (htab->plt_eh_frame != NULL) + { + if (htab->elf.splt != NULL + && htab->elf.splt->size != 0 + && (htab->elf.splt->flags & SEC_EXCLUDE) == 0 + && htab->elf.splt->output_section != NULL + && htab->plt_eh_frame->output_section != NULL) + { + bfd_vma plt_start = htab->elf.splt->output_section->vma; + bfd_vma eh_frame_start = htab->plt_eh_frame->output_section->vma + + htab->plt_eh_frame->output_offset + + PLT_FDE_START_OFFSET; + bfd_put_signed_32 (dynobj, plt_start - eh_frame_start, + htab->plt_eh_frame->contents + + PLT_FDE_START_OFFSET); + } + if (htab->plt_eh_frame->sec_info_type + == ELF_INFO_TYPE_EH_FRAME) + { + if (! _bfd_elf_write_section_eh_frame (output_bfd, info, + htab->plt_eh_frame, + htab->plt_eh_frame->contents)) + return FALSE; + } + } + if (htab->elf.sgot && htab->elf.sgot->size > 0) elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize = 4; @@ -4676,7 +4873,7 @@ static bfd_vma elf_i386_plt_sym_val (bfd_vma i, const asection *plt, const arelent *rel ATTRIBUTE_UNUSED) { - return plt->vma + (i + 1) * PLT_ENTRY_SIZE; + return plt->vma + (i + 1) * GET_PLT_ENTRY_SIZE (plt->owner); } /* Return TRUE if symbol should be hashed in the `.gnu.hash' section. */ @@ -4725,6 +4922,7 @@ elf_i386_add_symbol_hook (bfd * abfd, #define elf_backend_plt_readonly 1 #define elf_backend_want_plt_sym 0 #define elf_backend_got_header_size 12 +#define elf_backend_plt_alignment 4 /* Support RELA for objdump of prelink objects. */ #define elf_info_to_howto elf_i386_info_to_howto_rel @@ -4825,39 +5023,192 @@ elf_i386_fbsd_post_process_headers (bfd *abfd, struct bfd_link_info *info) #include "elf32-target.h" -/* VxWorks support. */ +/* Native Client support. */ #undef TARGET_LITTLE_SYM -#define TARGET_LITTLE_SYM bfd_elf32_i386_vxworks_vec +#define TARGET_LITTLE_SYM bfd_elf32_i386_nacl_vec #undef TARGET_LITTLE_NAME -#define TARGET_LITTLE_NAME "elf32-i386-vxworks" +#define TARGET_LITTLE_NAME "elf32-i386-nacl" +#undef elf32_bed +#define elf32_bed elf32_i386_nacl_bed + +#undef ELF_MAXPAGESIZE +#define ELF_MAXPAGESIZE 0x10000 + +/* Restore defaults. */ #undef ELF_OSABI +#undef elf_backend_want_plt_sym +#define elf_backend_want_plt_sym 0 +#undef elf_backend_post_process_headers +#define elf_backend_post_process_headers _bfd_elf_set_osabi +#undef elf_backend_static_tls_alignment -/* Like elf_i386_link_hash_table_create but with tweaks for VxWorks. */ +/* NaCl uses substantially different PLT entries for the same effects. */ -static struct bfd_link_hash_table * -elf_i386_vxworks_link_hash_table_create (bfd *abfd) -{ - struct bfd_link_hash_table *ret; - struct elf_i386_link_hash_table *htab; +#undef elf_backend_plt_alignment +#define elf_backend_plt_alignment 5 +#define NACL_PLT_ENTRY_SIZE 64 +#define NACLMASK 0xe0 /* 32-byte alignment mask. */ - ret = elf_i386_link_hash_table_create (abfd); - if (ret) - { - htab = (struct elf_i386_link_hash_table *) ret; - htab->is_vxworks = 1; - htab->plt0_pad_byte = 0x90; - } +static const bfd_byte elf_i386_nacl_plt0_entry[] = + { + 0xff, 0x35, /* pushl contents of address */ + 0, 0, 0, 0, /* replaced with address of .got + 4. */ + 0x8b, 0x0d, /* movl contents of address, %ecx */ + 0, 0, 0, 0, /* replaced with address of .got + 8. */ + 0x83, 0xe1, NACLMASK, /* andl $NACLMASK, %ecx */ + 0xff, 0xe1 /* jmp *%ecx */ + }; + +static const bfd_byte elf_i386_nacl_plt_entry[NACL_PLT_ENTRY_SIZE] = + { + 0x8b, 0x0d, /* movl contents of address, %ecx */ + 0, 0, 0, 0, /* replaced with GOT slot address. */ + 0x83, 0xe1, NACLMASK, /* andl $NACLMASK, %ecx */ + 0xff, 0xe1, /* jmp *%ecx */ + + /* Pad to the next 32-byte boundary with nop instructions. */ + 0x90, + 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, + 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, + + /* Lazy GOT entries point here (32-byte aligned). */ + 0x68, /* pushl immediate */ + 0, 0, 0, 0, /* replaced with reloc offset. */ + 0xe9, /* jmp relative */ + 0, 0, 0, 0, /* replaced with offset to .plt. */ + + /* Pad to the next 32-byte boundary with nop instructions. */ + 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, + 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, + 0x90, 0x90 + }; + +static const bfd_byte +elf_i386_nacl_pic_plt0_entry[sizeof (elf_i386_nacl_plt0_entry)] = + { + 0xff, 0x73, 0x04, /* pushl 4(%ebx) */ + 0x8b, 0x4b, 0x08, /* mov 0x8(%ebx), %ecx */ + 0x83, 0xe1, 0xe0, /* and $NACLMASK, %ecx */ + 0xff, 0xe1, /* jmp *%ecx */ + 0x90 /* nop */ + }; + +static const bfd_byte elf_i386_nacl_pic_plt_entry[NACL_PLT_ENTRY_SIZE] = + { + 0x8b, 0x8b, /* movl offset(%ebx), %ecx */ + 0, 0, 0, 0, /* replaced with offset of this symbol in .got. */ + 0x83, 0xe1, 0xe0, /* andl $NACLMASK, %ecx */ + 0xff, 0xe1, /* jmp *%ecx */ + + /* Pad to the next 32-byte boundary with nop instructions. */ + 0x90, + 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, + 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, + + /* Lazy GOT entries point here (32-byte aligned). */ + 0x68, /* pushl immediate */ + 0, 0, 0, 0, /* replaced with offset into relocation table. */ + 0xe9, /* jmp relative */ + 0, 0, 0, 0, /* replaced with offset to start of .plt. */ + + /* Pad to the next 32-byte boundary with nop instructions. */ + 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, + 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, + 0x90, 0x90 + }; + +static const bfd_byte elf_i386_nacl_eh_frame_plt[] = + { +#if (PLT_CIE_LENGTH != 20 \ + || PLT_FDE_LENGTH != 36 \ + || PLT_FDE_START_OFFSET != 4 + PLT_CIE_LENGTH + 8 \ + || PLT_FDE_LEN_OFFSET != 4 + PLT_CIE_LENGTH + 12) +# error "Need elf_i386_backend_data parameters for eh_frame_plt offsets!" +#endif + PLT_CIE_LENGTH, 0, 0, 0, /* CIE length */ + 0, 0, 0, 0, /* CIE ID */ + 1, /* CIE version */ + 'z', 'R', 0, /* Augmentation string */ + 1, /* Code alignment factor */ + 0x7c, /* Data alignment factor: -4 */ + 8, /* Return address column */ + 1, /* Augmentation size */ + DW_EH_PE_pcrel | DW_EH_PE_sdata4, /* FDE encoding */ + DW_CFA_def_cfa, 4, 4, /* DW_CFA_def_cfa: r4 (esp) ofs 4 */ + DW_CFA_offset + 8, 1, /* DW_CFA_offset: r8 (eip) at cfa-4 */ + DW_CFA_nop, DW_CFA_nop, + + PLT_FDE_LENGTH, 0, 0, 0, /* FDE length */ + PLT_CIE_LENGTH + 8, 0, 0, 0, /* CIE pointer */ + 0, 0, 0, 0, /* R_386_PC32 .plt goes here */ + 0, 0, 0, 0, /* .plt size goes here */ + 0, /* Augmentation size */ + DW_CFA_def_cfa_offset, 8, /* DW_CFA_def_cfa_offset: 8 */ + DW_CFA_advance_loc + 6, /* DW_CFA_advance_loc: 6 to __PLT__+6 */ + DW_CFA_def_cfa_offset, 12, /* DW_CFA_def_cfa_offset: 12 */ + DW_CFA_advance_loc + 58, /* DW_CFA_advance_loc: 58 to __PLT__+64 */ + DW_CFA_def_cfa_expression, /* DW_CFA_def_cfa_expression */ + 13, /* Block length */ + DW_OP_breg4, 4, /* DW_OP_breg4 (esp): 4 */ + DW_OP_breg8, 0, /* DW_OP_breg8 (eip): 0 */ + DW_OP_const1u, 63, DW_OP_and, DW_OP_const1u, 37, DW_OP_ge, + DW_OP_lit2, DW_OP_shl, DW_OP_plus, + DW_CFA_nop, DW_CFA_nop + }; + +static const struct elf_i386_plt_layout elf_i386_nacl_plt = + { + elf_i386_nacl_plt0_entry, /* plt0_entry */ + sizeof (elf_i386_nacl_plt0_entry), /* plt0_entry_size */ + 2, /* plt0_got1_offset */ + 8, /* plt0_got2_offset */ + elf_i386_nacl_plt_entry, /* plt_entry */ + NACL_PLT_ENTRY_SIZE, /* plt_entry_size */ + 2, /* plt_got_offset */ + 33, /* plt_reloc_offset */ + 38, /* plt_plt_offset */ + 32, /* plt_lazy_offset */ + elf_i386_nacl_pic_plt0_entry, /* pic_plt0_entry */ + elf_i386_nacl_pic_plt_entry, /* pic_plt_entry */ + elf_i386_nacl_eh_frame_plt, /* eh_frame_plt */ + sizeof (elf_i386_nacl_eh_frame_plt),/* eh_frame_plt_size */ + }; + +static const struct elf_i386_backend_data elf_i386_nacl_arch_bed = + { + &elf_i386_nacl_plt, /* plt */ + 0x90, /* plt0_pad_byte: nop insn */ + 0, /* is_vxworks */ + }; - return ret; -} +#undef elf_backend_arch_data +#define elf_backend_arch_data &elf_i386_nacl_arch_bed + +#include "elf32-target.h" + +/* VxWorks support. */ + +#undef TARGET_LITTLE_SYM +#define TARGET_LITTLE_SYM bfd_elf32_i386_vxworks_vec +#undef TARGET_LITTLE_NAME +#define TARGET_LITTLE_NAME "elf32-i386-vxworks" +#undef ELF_OSABI +#undef elf_backend_plt_alignment +#define elf_backend_plt_alignment 4 + +static const struct elf_i386_backend_data elf_i386_vxworks_arch_bed = + { + &elf_i386_plt, /* plt */ + 0x90, /* plt0_pad_byte */ + 1, /* is_vxworks */ + }; +#undef elf_backend_arch_data +#define elf_backend_arch_data &elf_i386_vxworks_arch_bed #undef elf_backend_relocs_compatible #undef elf_backend_post_process_headers -#undef bfd_elf32_bfd_link_hash_table_create -#define bfd_elf32_bfd_link_hash_table_create \ - elf_i386_vxworks_link_hash_table_create #undef elf_backend_add_symbol_hook #define elf_backend_add_symbol_hook \ elf_vxworks_add_symbol_hook diff --git a/bfd/elf32-lm32.c b/bfd/elf32-lm32.c index b6e8ba0..07add20 100644 --- a/bfd/elf32-lm32.c +++ b/bfd/elf32-lm32.c @@ -1,5 +1,5 @@ /* Lattice Mico32-specific support for 32-bit ELF - Copyright 2008, 2009, 2010 Free Software Foundation, Inc. + Copyright 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Contributed by Jon Beniston This file is part of BFD, the Binary File Descriptor library. @@ -1918,12 +1918,6 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - info = (struct bfd_link_info *) inf; htab = lm32_elf_hash_table (info); if (htab == NULL) @@ -2110,9 +2104,6 @@ readonly_dynrelocs (struct elf_link_hash_entry *h, void * inf) struct elf_lm32_link_hash_entry *eh; struct elf_lm32_dyn_relocs *p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct elf_lm32_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) { diff --git a/bfd/elf32-m32c.c b/bfd/elf32-m32c.c index e9cabaa..cf7ad99 100644 --- a/bfd/elf32-m32c.c +++ b/bfd/elf32-m32c.c @@ -1,5 +1,5 @@ /* M16C/M32C specific support for 32-bit ELF. - Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010 + Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -989,9 +989,6 @@ m32c_relax_plt_check (struct elf_link_hash_entry *h, { struct relax_plt_data *data = (struct relax_plt_data *) xdata; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (h->plt.offset != (bfd_vma) -1) { bfd_vma address; @@ -1024,9 +1021,6 @@ m32c_relax_plt_realloc (struct elf_link_hash_entry *h, { bfd_vma *entry = (bfd_vma *) xdata; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (h->plt.offset != (bfd_vma) -1) { h->plt.offset = *entry; diff --git a/bfd/elf32-m32r.c b/bfd/elf32-m32r.c index 0b114bd..51ef61e 100644 --- a/bfd/elf32-m32r.c +++ b/bfd/elf32-m32r.c @@ -1,6 +1,6 @@ /* M32R-specific support for 32-bit ELF. Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, - 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -1977,12 +1977,6 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - info = (struct bfd_link_info *) inf; htab = m32r_elf_hash_table (info); if (htab == NULL) @@ -2169,9 +2163,6 @@ readonly_dynrelocs (struct elf_link_hash_entry *h, void * inf) struct elf_m32r_link_hash_entry *eh; struct elf_m32r_dyn_relocs *p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct elf_m32r_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) { diff --git a/bfd/elf32-m68hc1x.c b/bfd/elf32-m68hc1x.c index 40b0c86..961dce4 100644 --- a/bfd/elf32-m68hc1x.c +++ b/bfd/elf32-m68hc1x.c @@ -1,6 +1,6 @@ /* Motorola 68HC11/HC12-specific support for 32-bit ELF Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, - 2009, 2010 Free Software Foundation, Inc. + 2009, 2010, 2011 Free Software Foundation, Inc. Contributed by Stephane Carrez (stcarrez@nerim.fr) This file is part of BFD, the Binary File Descriptor library. @@ -1188,7 +1188,7 @@ _bfd_m68hc11_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) flagword new_flags; bfd_boolean ok = TRUE; - /* Check if we have the same endianess */ + /* Check if we have the same endianness */ if (!_bfd_generic_verify_endian_match (ibfd, obfd)) return FALSE; diff --git a/bfd/elf32-m68k.c b/bfd/elf32-m68k.c index b4f7bc2..612525c 100644 --- a/bfd/elf32-m68k.c +++ b/bfd/elf32-m68k.c @@ -1,6 +1,7 @@ /* Motorola 68k series support for 32-bit ELF Copyright 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, - 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. + 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 + Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -3466,9 +3467,6 @@ elf_m68k_discard_copies (h, inf) struct bfd_link_info *info = (struct bfd_link_info *) inf; struct elf_m68k_pcrel_relocs_copied *s; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (!SYMBOL_CALLS_LOCAL (info, h)) { if ((info->flags & DF_TEXTREL) == 0) diff --git a/bfd/elf32-mcore.c b/bfd/elf32-mcore.c index 0863b44..31cc095 100644 --- a/bfd/elf32-mcore.c +++ b/bfd/elf32-mcore.c @@ -1,6 +1,6 @@ /* Motorola MCore specific support for 32-bit ELF Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, - 2007 Free Software Foundation, Inc. + 2007, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -55,7 +55,7 @@ mcore_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) flagword old_flags; flagword new_flags; - /* Check if we have the same endianess. */ + /* Check if we have the same endianness. */ if (! _bfd_generic_verify_endian_match (ibfd, obfd)) return FALSE; diff --git a/bfd/elf32-mep.c b/bfd/elf32-mep.c index b688d67..6fecb25 100644 --- a/bfd/elf32-mep.c +++ b/bfd/elf32-mep.c @@ -606,7 +606,7 @@ mep_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) flagword old_flags, new_flags; flagword old_partial, new_partial; - /* Check if we have the same endianess. */ + /* Check if we have the same endianness. */ if (_bfd_generic_verify_endian_match (ibfd, obfd) == FALSE) return FALSE; diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c index 2d460ab..b180dc4 100644 --- a/bfd/elf32-microblaze.c +++ b/bfd/elf32-microblaze.c @@ -2382,12 +2382,6 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - info = (struct bfd_link_info *) dat; htab = elf32_mb_hash_table (info); if (htab == NULL) diff --git a/bfd/elf32-mips.c b/bfd/elf32-mips.c index 3392207..fd3d4ba 100644 --- a/bfd/elf32-mips.c +++ b/bfd/elf32-mips.c @@ -832,6 +832,508 @@ static reloc_howto_type elf_mips16_howto_table_rel[] = FALSE), /* pcrel_offset */ }; +static reloc_howto_type elf_micromips_howto_table_rel[] = +{ + EMPTY_HOWTO (130), + EMPTY_HOWTO (131), + EMPTY_HOWTO (132), + + /* 26 bit jump address. */ + HOWTO (R_MICROMIPS_26_S1, /* type */ + 1, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 26, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + /* This needs complex overflow + detection, because the upper four + bits must match the PC. */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_26_S1", /* name */ + TRUE, /* partial_inplace */ + 0x3ffffff, /* src_mask */ + 0x3ffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of symbol value. */ + HOWTO (R_MICROMIPS_HI16, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_hi16_reloc, /* special_function */ + "R_MICROMIPS_HI16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of symbol value. */ + HOWTO (R_MICROMIPS_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_lo16_reloc, /* special_function */ + "R_MICROMIPS_LO16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* GP relative reference. */ + HOWTO (R_MICROMIPS_GPREL16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf32_gprel16_reloc, /* special_function */ + "R_MICROMIPS_GPREL16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Reference to literal section. */ + HOWTO (R_MICROMIPS_LITERAL, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf32_gprel16_reloc, /* special_function */ + "R_MICROMIPS_LITERAL", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Reference to global offset table. */ + HOWTO (R_MICROMIPS_GOT16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_got16_reloc, /* special_function */ + "R_MICROMIPS_GOT16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* This is for microMIPS branches. */ + HOWTO (R_MICROMIPS_PC7_S1, /* type */ + 1, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 7, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC7_S1", /* name */ + TRUE, /* partial_inplace */ + 0x0000007f, /* src_mask */ + 0x0000007f, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_MICROMIPS_PC10_S1, /* type */ + 1, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 10, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC10_S1", /* name */ + TRUE, /* partial_inplace */ + 0x000003ff, /* src_mask */ + 0x000003ff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_MICROMIPS_PC16_S1, /* type */ + 1, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC16_S1", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* 16 bit call through global offset table. */ + HOWTO (R_MICROMIPS_CALL16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + EMPTY_HOWTO (143), + EMPTY_HOWTO (144), + + /* Displacement in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_DISP, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_DISP",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Displacement to page pointer in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_PAGE, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_PAGE",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Offset from page pointer in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_OFST, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_OFST",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_GOT_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_HI16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_GOT_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_LO16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* 64 bit subtraction. Used in the N32 ABI. */ + HOWTO (R_MICROMIPS_SUB, /* type */ + 0, /* rightshift */ + 4, /* size (0 = byte, 1 = short, 2 = long) */ + 64, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_SUB", /* name */ + TRUE, /* partial_inplace */ + MINUS_ONE, /* src_mask */ + MINUS_ONE, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Get the higher value of a 64 bit addend. */ + HOWTO (R_MICROMIPS_HIGHER, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_HIGHER", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Get the highest value of a 64 bit addend. */ + HOWTO (R_MICROMIPS_HIGHEST, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_HIGHEST", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_CALL_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL_HI16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_CALL_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL_LO16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Section displacement. */ + HOWTO (R_MICROMIPS_SCN_DISP, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_SCN_DISP",/* name */ + TRUE, /* partial_inplace */ + 0xffffffff, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Protected jump conversion. This is an optimization hint. No + relocation is required for correctness. */ + HOWTO (R_MICROMIPS_JALR, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_JALR", /* name */ + FALSE, /* partial_inplace */ + 0x00000000, /* src_mask */ + 0x00000000, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of symbol value. Note that the high 16 bits of symbol values + must be zero. This is used for relaxation. */ + HOWTO (R_MICROMIPS_HI0_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_HI0_LO16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + EMPTY_HOWTO (158), + EMPTY_HOWTO (159), + EMPTY_HOWTO (160), + EMPTY_HOWTO (161), + + /* TLS general dynamic variable reference. */ + HOWTO (R_MICROMIPS_TLS_GD, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_TLS_GD", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* TLS local dynamic variable reference. */ + HOWTO (R_MICROMIPS_TLS_LDM, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_TLS_LDM", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* TLS local dynamic offset. */ + HOWTO (R_MICROMIPS_TLS_DTPREL_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_TLS_DTPREL_HI16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* TLS local dynamic offset. */ + HOWTO (R_MICROMIPS_TLS_DTPREL_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_TLS_DTPREL_LO16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* TLS thread pointer offset. */ + HOWTO (R_MICROMIPS_TLS_GOTTPREL, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_TLS_GOTTPREL", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + EMPTY_HOWTO (167), + EMPTY_HOWTO (168), + + /* TLS thread pointer offset. */ + HOWTO (R_MICROMIPS_TLS_TPREL_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_TLS_TPREL_HI16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* TLS thread pointer offset. */ + HOWTO (R_MICROMIPS_TLS_TPREL_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_TLS_TPREL_LO16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + EMPTY_HOWTO (171), + + /* GP- and PC-relative relocations. */ + HOWTO (R_MICROMIPS_GPREL7_S2, /* type */ + 2, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 7, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf32_gprel16_reloc, /* special_function */ + "R_MICROMIPS_GPREL7_S2", /* name */ + TRUE, /* partial_inplace */ + 0x0000007f, /* src_mask */ + 0x0000007f, /* dst_mask */ + FALSE), /* pcrel_offset */ + + HOWTO (R_MICROMIPS_PC23_S2, /* type */ + 2, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 23, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC23_S2", /* name */ + TRUE, /* partial_inplace */ + 0x007fffff, /* src_mask */ + 0x007fffff, /* dst_mask */ + TRUE), /* pcrel_offset */ +}; + /* 16 bit offset for pc-relative branches. */ static reloc_howto_type elf_mips_gnu_rel16_s2 = HOWTO (R_MIPS_GNU_REL16_S2, /* type */ @@ -1033,10 +1535,12 @@ _bfd_mips_elf32_gprel16_reloc (bfd *abfd, arelent *reloc_entry, { bfd_boolean relocatable; bfd_reloc_status_type ret; + bfd_byte *location; bfd_vma gp; - /* R_MIPS_LITERAL relocations are defined for local symbols only. */ - if (reloc_entry->howto->type == R_MIPS_LITERAL + /* R_MIPS_LITERAL/R_MICROMIPS_LITERAL relocations are defined for local + symbols only. */ + if (literal_reloc_p (reloc_entry->howto->type) && output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0 && (symbol->flags & BSF_LOCAL) != 0) @@ -1059,9 +1563,16 @@ _bfd_mips_elf32_gprel16_reloc (bfd *abfd, arelent *reloc_entry, if (ret != bfd_reloc_ok) return ret; - return _bfd_mips_elf_gprel16_with_gp (abfd, symbol, reloc_entry, - input_section, relocatable, - data, gp); + location = (bfd_byte *) data + reloc_entry->address; + _bfd_mips_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE, + location); + ret = _bfd_mips_elf_gprel16_with_gp (abfd, symbol, reloc_entry, + input_section, relocatable, + data, gp); + _bfd_mips_elf_reloc_shuffle (abfd, reloc_entry->howto->type, !relocatable, + location); + + return ret; } /* Do a R_MIPS_GPREL32 relocation. This is a 32 bit value which must @@ -1219,13 +1730,13 @@ mips16_gprel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol, return ret; location = (bfd_byte *) data + reloc_entry->address; - _bfd_mips16_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE, - location); + _bfd_mips_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE, + location); ret = _bfd_mips_elf_gprel16_with_gp (abfd, symbol, reloc_entry, input_section, relocatable, data, gp); - _bfd_mips16_elf_reloc_shuffle (abfd, reloc_entry->howto->type, !relocatable, - location); + _bfd_mips_elf_reloc_shuffle (abfd, reloc_entry->howto->type, !relocatable, + location); return ret; } @@ -1287,6 +1798,47 @@ static const struct elf_reloc_map mips16_reloc_map[] = { BFD_RELOC_MIPS16_LO16, R_MIPS16_LO16 - R_MIPS16_min }, }; +static const struct elf_reloc_map micromips_reloc_map[] = +{ + { BFD_RELOC_MICROMIPS_JMP, R_MICROMIPS_26_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_HI16_S, R_MICROMIPS_HI16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_LO16, R_MICROMIPS_LO16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GPREL16, R_MICROMIPS_GPREL16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_LITERAL, R_MICROMIPS_LITERAL - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT16, R_MICROMIPS_GOT16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_7_PCREL_S1, R_MICROMIPS_PC7_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_10_PCREL_S1, R_MICROMIPS_PC10_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_16_PCREL_S1, R_MICROMIPS_PC16_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_CALL16, R_MICROMIPS_CALL16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_DISP, R_MICROMIPS_GOT_DISP - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_PAGE - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_OFST, R_MICROMIPS_GOT_OFST - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_HI16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_LO16, R_MICROMIPS_GOT_LO16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_SUB, R_MICROMIPS_SUB - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_HIGHER, R_MICROMIPS_HIGHER - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_HIGHEST, R_MICROMIPS_HIGHEST - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_CALL_HI16, R_MICROMIPS_CALL_HI16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_CALL_LO16, R_MICROMIPS_CALL_LO16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_SCN_DISP, R_MICROMIPS_SCN_DISP - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_JALR, R_MICROMIPS_JALR - R_MICROMIPS_min }, + /* There is no BFD reloc for R_MICROMIPS_HI0_LO16. */ + { BFD_RELOC_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_GD - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_TLS_LDM, R_MICROMIPS_TLS_LDM - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16, + R_MICROMIPS_TLS_DTPREL_HI16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16, + R_MICROMIPS_TLS_DTPREL_LO16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_TLS_GOTTPREL, + R_MICROMIPS_TLS_GOTTPREL - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_TLS_TPREL_HI16, + R_MICROMIPS_TLS_TPREL_HI16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_TLS_TPREL_LO16, + R_MICROMIPS_TLS_TPREL_LO16 - R_MICROMIPS_min }, + /* There is no BFD reloc for R_MICROMIPS_GPREL7_S2. */ + /* There is no BFD reloc for R_MICROMIPS_PC23_S2. */ +}; + /* Given a BFD reloc type, return a howto structure. */ static reloc_howto_type * @@ -1295,6 +1847,7 @@ bfd_elf32_bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code) unsigned int i; reloc_howto_type *howto_table = elf_mips_howto_table_rel; reloc_howto_type *howto16_table = elf_mips16_howto_table_rel; + reloc_howto_type *howto_micromips_table = elf_micromips_howto_table_rel; for (i = 0; i < sizeof (mips_reloc_map) / sizeof (struct elf_reloc_map); i++) @@ -1310,6 +1863,13 @@ bfd_elf32_bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code) return &howto16_table[(int) mips16_reloc_map[i].elf_val]; } + for (i = 0; i < sizeof (micromips_reloc_map) / sizeof (struct elf_reloc_map); + i++) + { + if (micromips_reloc_map[i].bfd_val == code) + return &howto_micromips_table[(int) micromips_reloc_map[i].elf_val]; + } + switch (code) { default: @@ -1361,6 +1921,14 @@ bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, && strcasecmp (elf_mips16_howto_table_rel[i].name, r_name) == 0) return &elf_mips16_howto_table_rel[i]; + for (i = 0; + i < (sizeof (elf_micromips_howto_table_rel) + / sizeof (elf_micromips_howto_table_rel[0])); + i++) + if (elf_micromips_howto_table_rel[i].name != NULL + && strcasecmp (elf_micromips_howto_table_rel[i].name, r_name) == 0) + return &elf_micromips_howto_table_rel[i]; + if (strcasecmp (elf_mips_gnu_pcrel32.name, r_name) == 0) return &elf_mips_gnu_pcrel32; if (strcasecmp (elf_mips_gnu_rel16_s2.name, r_name) == 0) @@ -1398,6 +1966,8 @@ mips_elf32_rtype_to_howto (unsigned int r_type, case R_MIPS_JUMP_SLOT: return &elf_mips_jump_slot_howto; default: + if (r_type >= R_MICROMIPS_min && r_type < R_MICROMIPS_max) + return &elf_micromips_howto_table_rel[r_type - R_MICROMIPS_min]; if (r_type >= R_MIPS16_min && r_type < R_MIPS16_max) return &elf_mips16_howto_table_rel[r_type - R_MIPS16_min]; BFD_ASSERT (r_type < (unsigned int) R_MIPS_max); @@ -1422,7 +1992,7 @@ mips_info_to_howto_rel (bfd *abfd, arelent *cache_ptr, Elf_Internal_Rela *dst) when we do the relocation, because the symbol manipulations done by the linker may cause us to lose track of the input BFD. */ if (((*cache_ptr->sym_ptr_ptr)->flags & BSF_SECTION_SYM) != 0 - && (gprel16_reloc_p (r_type) || r_type == (unsigned int) R_MIPS_LITERAL)) + && (gprel16_reloc_p (r_type) || literal_reloc_p (r_type))) cache_ptr->addend = elf_gp (abfd); } @@ -1671,6 +2241,8 @@ static const struct ecoff_debug_swap mips_elf32_ecoff_debug_swap = { #define elf_backend_mips_rtype_to_howto mips_elf32_rtype_to_howto #define bfd_elf32_bfd_is_local_label_name \ mips_elf_is_local_label_name +#define bfd_elf32_bfd_is_target_special_symbol \ + _bfd_mips_elf_is_target_special_symbol #define bfd_elf32_find_nearest_line _bfd_mips_elf_find_nearest_line #define bfd_elf32_find_inliner_info _bfd_mips_elf_find_inliner_info #define bfd_elf32_new_section_hook _bfd_mips_elf_new_section_hook @@ -1685,6 +2257,7 @@ static const struct ecoff_debug_swap mips_elf32_ecoff_debug_swap = { #define bfd_elf32_bfd_set_private_flags _bfd_mips_elf_set_private_flags #define bfd_elf32_bfd_print_private_bfd_data \ _bfd_mips_elf_print_private_bfd_data +#define bfd_elf32_bfd_relax_section _bfd_mips_elf_relax_section /* Support for SGI-ish mips targets. */ #define TARGET_LITTLE_SYM bfd_elf32_littlemips_vec diff --git a/bfd/elf32-mt.c b/bfd/elf32-mt.c index a3172bc..1be5d00 100644 --- a/bfd/elf32-mt.c +++ b/bfd/elf32-mt.c @@ -1,5 +1,5 @@ /* Morpho Technologies MT specific support for 32-bit ELF - Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 + Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -521,7 +521,7 @@ mt_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) flagword old_flags, new_flags; bfd_boolean ok = TRUE; - /* Check if we have the same endianess. */ + /* Check if we have the same endianness. */ if (_bfd_generic_verify_endian_match (ibfd, obfd) == FALSE) return FALSE; diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c index c736375..0c25c3e 100644 --- a/bfd/elf32-ppc.c +++ b/bfd/elf32-ppc.c @@ -1,6 +1,7 @@ /* PowerPC-specific support for 32-bit ELF Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, - 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 + Free Software Foundation, Inc. Written by Ian Lance Taylor, Cygnus Support. This file is part of BFD, the Binary File Descriptor library. @@ -35,6 +36,7 @@ #include "elf/ppc.h" #include "elf32-ppc.h" #include "elf-vxworks.h" +#include "dwarf2.h" /* RELA relocations are used here. */ @@ -1881,6 +1883,8 @@ ppc_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) return FALSE; case 128: /* Linux/PPC elf_prpsinfo. */ + elf_tdata (abfd)->core_pid + = bfd_get_32 (abfd, note->descdata + 16); elf_tdata (abfd)->core_program = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16); elf_tdata (abfd)->core_command @@ -2559,26 +2563,6 @@ ppc_elf_get_synthetic_symtab (bfd *abfd, long symcount, asymbol **syms, ppc_elf_finish_dynamic_sections is one of the last functions called. */ -/* The PPC linker needs to keep track of the number of relocs that it - decides to copy as dynamic relocs in check_relocs for each symbol. - This is so that it can later discard them if they are found to be - unnecessary. We store the information in a field extending the - regular ELF linker hash table. */ - -struct ppc_elf_dyn_relocs -{ - struct ppc_elf_dyn_relocs *next; - - /* The input section of the reloc. */ - asection *sec; - - /* Total number of relocs copied for the input section. */ - bfd_size_type count; - - /* Number of pc-relative relocs copied for the input section. */ - bfd_size_type pc_count; -}; - /* Track PLT entries needed for a given symbol. We might need more than one glink entry per symbol when generating a pic binary. */ struct plt_entry @@ -2653,7 +2637,7 @@ struct ppc_elf_link_hash_entry elf_linker_section_pointers_t *linker_section_pointer; /* Track dynamic relocs copied for this symbol. */ - struct ppc_elf_dyn_relocs *dyn_relocs; + struct elf_dyn_relocs *dyn_relocs; /* Contexts in which symbol is used in the GOT (or TOC). TLS_GD .. TLS_TLS bits are or'd into the mask as the @@ -2696,6 +2680,7 @@ struct ppc_elf_link_hash_table asection *relsbss; elf_linker_section_t sdata[2]; asection *sbss; + asection *glink_eh_frame; /* The (unloaded but important) .rela.plt.unloaded on VxWorks. */ asection *srelplt2; @@ -2886,6 +2871,17 @@ ppc_elf_create_glink (bfd *abfd, struct bfd_link_info *info) || !bfd_set_section_alignment (abfd, s, 4)) return FALSE; + if (!info->no_ld_generated_unwind_info) + { + flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_HAS_CONTENTS + | SEC_IN_MEMORY | SEC_LINKER_CREATED); + s = bfd_make_section_anyway_with_flags (abfd, ".eh_frame", flags); + htab->glink_eh_frame = s; + if (s == NULL + || !bfd_set_section_alignment (abfd, s, 2)) + return FALSE; + } + flags = SEC_ALLOC | SEC_LINKER_CREATED; s = bfd_make_section_anyway_with_flags (abfd, ".iplt", flags); htab->iplt = s; @@ -2895,7 +2891,7 @@ ppc_elf_create_glink (bfd *abfd, struct bfd_link_info *info) flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED); - s = bfd_make_section_with_flags (abfd, ".rela.iplt", flags); + s = bfd_make_section_anyway_with_flags (abfd, ".rela.iplt", flags); htab->reliplt = s; if (s == NULL || ! bfd_set_section_alignment (abfd, s, 2)) @@ -2928,8 +2924,8 @@ ppc_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) return FALSE; htab->dynbss = bfd_get_section_by_name (abfd, ".dynbss"); - s = bfd_make_section_with_flags (abfd, ".dynsbss", - SEC_ALLOC | SEC_LINKER_CREATED); + s = bfd_make_section_anyway_with_flags (abfd, ".dynsbss", + SEC_ALLOC | SEC_LINKER_CREATED); htab->dynsbss = s; if (s == NULL) return FALSE; @@ -2939,7 +2935,7 @@ ppc_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) htab->relbss = bfd_get_section_by_name (abfd, ".rela.bss"); flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED); - s = bfd_make_section_with_flags (abfd, ".rela.sbss", flags); + s = bfd_make_section_anyway_with_flags (abfd, ".rela.sbss", flags); htab->relsbss = s; if (s == NULL || ! bfd_set_section_alignment (abfd, s, 2)) @@ -2974,18 +2970,39 @@ ppc_elf_copy_indirect_symbol (struct bfd_link_info *info, edir = (struct ppc_elf_link_hash_entry *) dir; eind = (struct ppc_elf_link_hash_entry *) ind; + edir->tls_mask |= eind->tls_mask; + edir->has_sda_refs |= eind->has_sda_refs; + + /* If called to transfer flags for a weakdef during processing + of elf_adjust_dynamic_symbol, don't copy non_got_ref. + We clear it ourselves for ELIMINATE_COPY_RELOCS. */ + if (!(ELIMINATE_COPY_RELOCS + && eind->elf.root.type != bfd_link_hash_indirect + && edir->elf.dynamic_adjusted)) + edir->elf.non_got_ref |= eind->elf.non_got_ref; + + edir->elf.ref_dynamic |= eind->elf.ref_dynamic; + edir->elf.ref_regular |= eind->elf.ref_regular; + edir->elf.ref_regular_nonweak |= eind->elf.ref_regular_nonweak; + edir->elf.needs_plt |= eind->elf.needs_plt; + edir->elf.pointer_equality_needed |= eind->elf.pointer_equality_needed; + + /* If we were called to copy over info for a weak sym, that's all. */ + if (eind->elf.root.type != bfd_link_hash_indirect) + return; + if (eind->dyn_relocs != NULL) { if (edir->dyn_relocs != NULL) { - struct ppc_elf_dyn_relocs **pp; - struct ppc_elf_dyn_relocs *p; + struct elf_dyn_relocs **pp; + struct elf_dyn_relocs *p; /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) { - struct ppc_elf_dyn_relocs *q; + struct elf_dyn_relocs *q; for (q = edir->dyn_relocs; q != NULL; q = q->next) if (q->sec == p->sec) @@ -3005,27 +3022,6 @@ ppc_elf_copy_indirect_symbol (struct bfd_link_info *info, eind->dyn_relocs = NULL; } - edir->tls_mask |= eind->tls_mask; - edir->has_sda_refs |= eind->has_sda_refs; - - /* If called to transfer flags for a weakdef during processing - of elf_adjust_dynamic_symbol, don't copy non_got_ref. - We clear it ourselves for ELIMINATE_COPY_RELOCS. */ - if (!(ELIMINATE_COPY_RELOCS - && eind->elf.root.type != bfd_link_hash_indirect - && edir->elf.dynamic_adjusted)) - edir->elf.non_got_ref |= eind->elf.non_got_ref; - - edir->elf.ref_dynamic |= eind->elf.ref_dynamic; - edir->elf.ref_regular |= eind->elf.ref_regular; - edir->elf.ref_regular_nonweak |= eind->elf.ref_regular_nonweak; - edir->elf.needs_plt |= eind->elf.needs_plt; - edir->elf.pointer_equality_needed |= eind->elf.pointer_equality_needed; - - /* If we were called to copy over info for a weak sym, that's all. */ - if (eind->elf.root.type != bfd_link_hash_indirect) - return; - /* Copy over the GOT refcount entries that we may have already seen to the symbol which just became indirect. */ edir->elf.got.refcount += eind->elf.got.refcount; @@ -3701,12 +3697,9 @@ ppc_elf_check_relocs (bfd *abfd, { /* It does not make sense to have a procedure linkage table entry for a local symbol. */ - (*_bfd_error_handler) (_("%B(%A+0x%lx): %s reloc against " - "local symbol"), - abfd, - sec, - (long) rel->r_offset, - ppc_elf_howto_table[r_type]->name); + info->callbacks->einfo (_("%P: %H: %s reloc against local symbol\n"), + abfd, sec, rel->r_offset, + ppc_elf_howto_table[r_type]->name); bfd_set_error (bfd_error_bad_value); return FALSE; } @@ -3931,8 +3924,8 @@ ppc_elf_check_relocs (bfd *abfd, && (h->root.type == bfd_link_hash_defweak || !h->def_regular))) { - struct ppc_elf_dyn_relocs *p; - struct ppc_elf_dyn_relocs **rel_head; + struct elf_dyn_relocs *p; + struct elf_dyn_relocs **rel_head; #ifdef DEBUG fprintf (stderr, @@ -3978,7 +3971,7 @@ ppc_elf_check_relocs (bfd *abfd, s = sec; vpp = &elf_section_data (s)->local_dynrel; - rel_head = (struct ppc_elf_dyn_relocs **) vpp; + rel_head = (struct elf_dyn_relocs **) vpp; } p = *rel_head; @@ -4165,7 +4158,7 @@ ppc_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) if (!is_ppc_elf (ibfd) || !is_ppc_elf (obfd)) return TRUE; - /* Check if we have the same endianess. */ + /* Check if we have the same endianness. */ if (! _bfd_generic_verify_endian_match (ibfd, obfd)) return FALSE; @@ -4263,8 +4256,27 @@ ppc_elf_select_plt_layout (bfd *output_bfd ATTRIBUTE_UNUSED, if (htab->plt_type == PLT_UNSET) { + struct elf_link_hash_entry *h; + if (plt_style == PLT_OLD) htab->plt_type = PLT_OLD; + else if (info->shared + && htab->elf.dynamic_sections_created + && (h = elf_link_hash_lookup (&htab->elf, "_mcount", + FALSE, FALSE, TRUE)) != NULL + && (h->type == STT_FUNC + || h->needs_plt) + && h->ref_regular + && !(SYMBOL_CALLS_LOCAL (info, h) + || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT + && h->root.type == bfd_link_hash_undefweak))) + { + /* Profiling of shared libs (and pies) is not supported with + secure plt, because ppc32 does profiling before a + function prologue and a secure plt pic call stubs needs + r30 to be set up. */ + htab->plt_type = PLT_OLD; + } else { bfd *ibfd; @@ -4292,7 +4304,13 @@ ppc_elf_select_plt_layout (bfd *output_bfd ATTRIBUTE_UNUSED, } } if (htab->plt_type == PLT_OLD && plt_style == PLT_NEW) - info->callbacks->info (_("Using bss-plt due to %B"), htab->old_bfd); + { + if (htab->old_bfd != NULL) + info->callbacks->einfo (_("%P: bss-plt forced due to %B\n"), + htab->old_bfd); + else + info->callbacks->einfo (_("%P: bss-plt forced by profiling\n")); + } BFD_ASSERT (htab->plt_type != PLT_VXWORKS); @@ -4382,7 +4400,7 @@ ppc_elf_gc_sweep_hook (bfd *abfd, r_symndx = ELF32_R_SYM (rel->r_info); if (r_symndx >= symtab_hdr->sh_info) { - struct ppc_elf_dyn_relocs **pp, *p; + struct elf_dyn_relocs **pp, *p; struct ppc_elf_link_hash_entry *eh; h = sym_hashes[r_symndx - symtab_hdr->sh_info]; @@ -4702,7 +4720,7 @@ ppc_elf_tls_optimize (bfd *obfd ATTRIBUTE_UNUSED, && !expecting_tls_get_addr && is_branch_reloc (r_type)) { - info->callbacks->minfo ("%C __tls_get_addr lost arg, " + info->callbacks->minfo ("%H __tls_get_addr lost arg, " "TLS optimization disabled\n", ibfd, sec, rel->r_offset); if (elf_section_data (sec)->relocs != relstart) @@ -4788,7 +4806,7 @@ ppc_elf_tls_optimize (bfd *obfd ATTRIBUTE_UNUSED, could just mark this symbol to exclude it from tls optimization but it's safer to skip the entire optimization. */ - info->callbacks->minfo (_("%C arg lost __tls_get_addr, " + info->callbacks->minfo (_("%H arg lost __tls_get_addr, " "TLS optimization disabled\n"), ibfd, sec, rel->r_offset); if (elf_section_data (sec)->relocs != relstart) @@ -4880,7 +4898,7 @@ ppc_elf_tls_optimize (bfd *obfd ATTRIBUTE_UNUSED, static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *h) { - struct ppc_elf_dyn_relocs *p; + struct elf_dyn_relocs *p; for (p = ppc_elf_hash_entry (h)->dyn_relocs; p != NULL; p = p->next) { @@ -5023,8 +5041,8 @@ ppc_elf_adjust_dynamic_symbol (struct bfd_link_info *info, if (h->size == 0) { - (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"), - h->root.root.string); + info->callbacks->einfo (_("%P: dynamic variable `%s' is zero size\n"), + h->root.root.string); return TRUE; } @@ -5164,17 +5182,11 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) struct bfd_link_info *info = inf; struct ppc_elf_link_hash_entry *eh; struct ppc_elf_link_hash_table *htab; - struct ppc_elf_dyn_relocs *p; + struct elf_dyn_relocs *p; if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - htab = ppc_elf_hash_table (info); if (htab->elf.dynamic_sections_created || h->type == STT_GNU_IFUNC) @@ -5422,7 +5434,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) then they should avoid writing weird assembly. */ if (SYMBOL_CALLS_LOCAL (info, h)) { - struct ppc_elf_dyn_relocs **pp; + struct elf_dyn_relocs **pp; for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) { @@ -5437,7 +5449,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) if (htab->is_vxworks) { - struct ppc_elf_dyn_relocs **pp; + struct elf_dyn_relocs **pp; for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) { @@ -5524,9 +5536,6 @@ maybe_set_textrel (struct elf_link_hash_entry *h, void *info) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (readonly_dynrelocs (h)) { ((struct bfd_link_info *) info)->flags |= DF_TEXTREL; @@ -5537,6 +5546,20 @@ maybe_set_textrel (struct elf_link_hash_entry *h, void *info) return TRUE; } +static const unsigned char glink_eh_frame_cie[] = +{ + 0, 0, 0, 16, /* length. */ + 0, 0, 0, 0, /* id. */ + 1, /* CIE version. */ + 'z', 'R', 0, /* Augmentation string. */ + 4, /* Code alignment. */ + 0x7c, /* Data alignment. */ + 65, /* RA reg. */ + 1, /* Augmentation size. */ + DW_EH_PE_pcrel | DW_EH_PE_sdata4, /* FDE encoding. */ + DW_CFA_def_cfa, 1, 0 /* def_cfa: r1 offset 0. */ +}; + /* Set the sizes of the dynamic sections. */ static bfd_boolean @@ -5589,9 +5612,9 @@ ppc_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, for (s = ibfd->sections; s != NULL; s = s->next) { - struct ppc_elf_dyn_relocs *p; + struct elf_dyn_relocs *p; - for (p = ((struct ppc_elf_dyn_relocs *) + for (p = ((struct elf_dyn_relocs *) elf_section_data (s)->local_dynrel); p != NULL; p = p->next) @@ -5797,6 +5820,21 @@ ppc_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, } } + if (htab->glink != NULL + && htab->glink->size != 0 + && htab->glink_eh_frame != NULL + && !bfd_is_abs_section (htab->glink_eh_frame->output_section)) + { + s = htab->glink_eh_frame; + s->size = sizeof (glink_eh_frame_cie) + 20; + if (info->shared) + { + s->size += 4; + if (htab->glink->size - GLINK_PLTRESOLVE + 8 >= 256) + s->size += 4; + } + } + /* We've now determined the sizes of the various dynamic sections. Allocate memory for them. */ relocs = FALSE; @@ -5820,6 +5858,7 @@ ppc_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, } else if (s == htab->iplt || s == htab->glink + || s == htab->glink_eh_frame || s == htab->sgotplt || s == htab->sbss || s == htab->dynbss @@ -7220,8 +7259,8 @@ ppc_elf_relocate_section (bfd *output_bfd, switch (r_type) { default: - (*_bfd_error_handler) - (_("%B: unknown relocation type %d for symbol %s"), + info->callbacks->einfo + (_("%P: %B: unknown relocation type %d for symbol %s\n"), input_bfd, (int) r_type, sym_name); bfd_set_error (bfd_error_bad_value); @@ -7481,11 +7520,9 @@ ppc_elf_relocate_section (bfd *output_bfd, generated by a hash table traversal, the value in the got at entry m+n bears little relation to the entry m. */ if (addend != 0) - (*_bfd_error_handler) - (_("%B(%A+0x%lx): non-zero addend on %s reloc against `%s'"), - input_bfd, - input_section, - (long) rel->r_offset, + info->callbacks->einfo + (_("%P: %H: non-zero addend on %s reloc against `%s'\n"), + input_bfd, input_section, rel->r_offset, howto->name, sym_name); } @@ -7679,12 +7716,10 @@ ppc_elf_relocate_section (bfd *output_bfd, non-executable to apply text relocations. So we'll segfault when trying to run the indirection function to resolve the reloc. */ - (*_bfd_error_handler) - (_("%B(%A+0x%lx): relocation %s for indirect " - "function %s unsupported"), - input_bfd, - input_section, - (long) rel->r_offset, + info->callbacks->einfo + (_("%P: %H: relocation %s for indirect " + "function %s unsupported\n"), + input_bfd, input_section, rel->r_offset, howto->name, sym_name); ret = FALSE; @@ -7909,9 +7944,9 @@ ppc_elf_relocate_section (bfd *output_bfd, || (CONST_STRNEQ (name, ".sbss") && (name[5] == 0 || name[5] == '.')))) { - (*_bfd_error_handler) - (_("%B: the target (%s) of a %s relocation is " - "in the wrong output section (%s)"), + info->callbacks->einfo + (_("%P: %B: the target (%s) of a %s relocation is " + "in the wrong output section (%s)\n"), input_bfd, sym_name, howto->name, @@ -7939,9 +7974,9 @@ ppc_elf_relocate_section (bfd *output_bfd, if (! (CONST_STRNEQ (name, ".sdata2") || CONST_STRNEQ (name, ".sbss2"))) { - (*_bfd_error_handler) - (_("%B: the target (%s) of a %s relocation is " - "in the wrong output section (%s)"), + info->callbacks->einfo + (_("%P: %B: the target (%s) of a %s relocation is " + "in the wrong output section (%s)\n"), input_bfd, sym_name, howto->name, @@ -7986,9 +8021,9 @@ ppc_elf_relocate_section (bfd *output_bfd, } else { - (*_bfd_error_handler) - (_("%B: the target (%s) of a %s relocation is " - "in the wrong output section (%s)"), + info->callbacks->einfo + (_("%P: %B: the target (%s) of a %s relocation is " + "in the wrong output section (%s)\n"), input_bfd, sym_name, howto->name, @@ -8058,8 +8093,8 @@ ppc_elf_relocate_section (bfd *output_bfd, case R_PPC_EMB_RELST_HI: case R_PPC_EMB_RELST_HA: case R_PPC_EMB_BIT_FLD: - (*_bfd_error_handler) - (_("%B: relocation %s is not yet supported for symbol %s."), + info->callbacks->einfo + (_("%P: %B: relocation %s is not yet supported for symbol %s\n"), input_bfd, howto->name, sym_name); @@ -8117,11 +8152,9 @@ ppc_elf_relocate_section (bfd *output_bfd, && !((input_section->flags & SEC_DEBUGGING) != 0 && h->def_dynamic)) { - (*_bfd_error_handler) - (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"), - input_bfd, - input_section, - (long) rel->r_offset, + info->callbacks->einfo + (_("%P: %H: unresolvable %s relocation against symbol `%s'\n"), + input_bfd, input_section, rel->r_offset, howto->name, sym_name); ret = FALSE; @@ -8166,10 +8199,10 @@ ppc_elf_relocate_section (bfd *output_bfd, } else { - (*_bfd_error_handler) - (_("%B(%A+0x%lx): %s reloc against `%s': error %d"), - input_bfd, input_section, - (long) rel->r_offset, howto->name, sym_name, (int) r); + info->callbacks->einfo + (_("%P: %H: %s reloc against `%s': error %d\n"), + input_bfd, input_section, rel->r_offset, + howto->name, sym_name, (int) r); ret = FALSE; } } @@ -8658,10 +8691,10 @@ ppc_elf_finish_dynamic_sections (bfd *output_bfd, } else { - (*_bfd_error_handler) (_("%s not defined in linker created %s"), - htab->elf.hgot->root.root.string, - (htab->sgotplt != NULL - ? htab->sgotplt->name : htab->got->name)); + info->callbacks->einfo (_("%P: %s not defined in linker created %s\n"), + htab->elf.hgot->root.root.string, + (htab->sgotplt != NULL + ? htab->sgotplt->name : htab->got->name)); bfd_set_error (bfd_error_bad_value); ret = FALSE; } @@ -8950,6 +8983,78 @@ ppc_elf_finish_dynamic_sections (bfd *output_bfd, } } + if (htab->glink_eh_frame != NULL + && htab->glink_eh_frame->contents != NULL) + { + unsigned char *p = htab->glink_eh_frame->contents; + bfd_vma val; + + memcpy (p, glink_eh_frame_cie, sizeof (glink_eh_frame_cie)); + /* CIE length (rewrite in case little-endian). */ + bfd_put_32 (htab->elf.dynobj, sizeof (glink_eh_frame_cie) - 4, p); + p += sizeof (glink_eh_frame_cie); + /* FDE length. */ + val = htab->glink_eh_frame->size - 4 - sizeof (glink_eh_frame_cie); + bfd_put_32 (htab->elf.dynobj, val, p); + p += 4; + /* CIE pointer. */ + val = p - htab->glink_eh_frame->contents; + bfd_put_32 (htab->elf.dynobj, val, p); + p += 4; + /* Offset to .glink. */ + val = (htab->glink->output_section->vma + + htab->glink->output_offset); + val -= (htab->glink_eh_frame->output_section->vma + + htab->glink_eh_frame->output_offset); + val -= p - htab->glink_eh_frame->contents; + bfd_put_32 (htab->elf.dynobj, val, p); + p += 4; + /* .glink size. */ + bfd_put_32 (htab->elf.dynobj, htab->glink->size, p); + p += 4; + /* Augmentation. */ + p += 1; + + if (info->shared + && htab->elf.dynamic_sections_created) + { + bfd_vma adv = (htab->glink->size - GLINK_PLTRESOLVE + 8) >> 2; + if (adv < 64) + *p++ = DW_CFA_advance_loc + adv; + else if (adv < 256) + { + *p++ = DW_CFA_advance_loc1; + *p++ = adv; + } + else if (adv < 65536) + { + *p++ = DW_CFA_advance_loc2; + bfd_put_16 (htab->elf.dynobj, adv, p); + p += 2; + } + else + { + *p++ = DW_CFA_advance_loc4; + bfd_put_32 (htab->elf.dynobj, adv, p); + p += 4; + } + *p++ = DW_CFA_register; + *p++ = 65; + p++; + *p++ = DW_CFA_advance_loc + 4; + *p++ = DW_CFA_restore_extended; + *p++ = 65; + } + BFD_ASSERT ((bfd_vma) ((p + 3 - htab->glink_eh_frame->contents) & -4) + == htab->glink_eh_frame->size); + + if (htab->glink_eh_frame->sec_info_type == ELF_INFO_TYPE_EH_FRAME + && !_bfd_elf_write_section_eh_frame (output_bfd, info, + htab->glink_eh_frame, + htab->glink_eh_frame->contents)) + return FALSE; + } + return ret; } diff --git a/bfd/elf32-rx.c b/bfd/elf32-rx.c index 55f2eaa..f049f6e 100644 --- a/bfd/elf32-rx.c +++ b/bfd/elf32-rx.c @@ -28,6 +28,11 @@ #define RX_OPCODE_BIG_ENDIAN 0 +/* This is a meta-target that's used only with objcopy, to avoid the + endian-swap we would otherwise get. We check for this in + rx_elf_object_p(). */ +const bfd_target bfd_elf32_rx_be_ns_vec; + #ifdef DEBUG char * rx_get_reloc (long); void rx_dump_symtab (bfd *, void *, void *); @@ -2855,13 +2860,16 @@ rx_elf_set_private_flags (bfd * abfd, flagword flags) } static bfd_boolean no_warn_mismatch = FALSE; +static bfd_boolean ignore_lma = TRUE; -void bfd_elf32_rx_set_target_flags (bfd_boolean); +void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean); void -bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch) +bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch, + bfd_boolean user_ignore_lma) { no_warn_mismatch = user_no_warn_mismatch; + ignore_lma = user_ignore_lma; } /* Merge backend specific data from an object file to the output @@ -2951,8 +2959,65 @@ elf32_rx_machine (bfd * abfd) static bfd_boolean rx_elf_object_p (bfd * abfd) { + int i; + unsigned int u; + Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr; + int nphdrs = elf_elfheader (abfd)->e_phnum; + sec_ptr bsec; + + /* We never want to automatically choose the non-swapping big-endian + target. The user can only get that explicitly, such as with -I + and objcopy. */ + if (abfd->xvec == &bfd_elf32_rx_be_ns_vec + && abfd->target_defaulted) + return FALSE; + bfd_default_set_arch_mach (abfd, bfd_arch_rx, elf32_rx_machine (abfd)); + + /* For each PHDR in the object, we must find some section that + corresponds (based on matching file offsets) and use its VMA + information to reconstruct the p_vaddr field we clobbered when we + wrote it out. */ + for (i=0; inum_elf_sections; u++) + { + Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u]; + + if (phdr[i].p_offset <= (bfd_vma) sec->sh_offset + && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1)) + { + /* Found one! The difference between the two addresses, + plus the difference between the two file offsets, is + enough information to reconstruct the lma. */ + + /* Example where they aren't: + PHDR[1] = lma fffc0100 offset 00002010 size 00000100 + SEC[6] = vma 00000050 offset 00002050 size 00000040 + + The correct LMA for the section is fffc0140 + (2050-2010). + */ + + phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset); + break; + } + } + + /* We must update the bfd sections as well, so we don't stop + with one match. */ + bsec = abfd->sections; + while (bsec) + { + if (phdr[i].p_vaddr <= bsec->lma + && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1)) + { + bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr); + } + bsec = bsec->next; + } + } + return TRUE; } @@ -3332,22 +3397,24 @@ elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED, phdr = tdata->phdr; count = tdata->program_header_size / bed->s->sizeof_phdr; - for (i = count; i-- != 0; ) - if (phdr[i].p_type == PT_LOAD) - { - /* The Renesas tools expect p_paddr to be zero. However, - there is no other way to store the writable data in ROM for - startup initialization. So, we let the linker *think* - we're using paddr and vaddr the "usual" way, but at the - last minute we move the paddr into the vaddr (which is what - the simulator uses) and zero out paddr. Note that this - does not affect the section headers, just the program - headers. We hope. */ + if (ignore_lma) + for (i = count; i-- != 0;) + if (phdr[i].p_type == PT_LOAD) + { + /* The Renesas tools expect p_paddr to be zero. However, + there is no other way to store the writable data in ROM for + startup initialization. So, we let the linker *think* + we're using paddr and vaddr the "usual" way, but at the + last minute we move the paddr into the vaddr (which is what + the simulator uses) and zero out paddr. Note that this + does not affect the section headers, just the program + headers. We hope. */ phdr[i].p_vaddr = phdr[i].p_paddr; - /* If we zero out p_paddr, then the LMA in the section table +#if 0 /* If we zero out p_paddr, then the LMA in the section table becomes wrong. */ - /*phdr[i].p_paddr = 0;*/ - } + phdr[i].p_paddr = 0; +#endif + } return TRUE; } @@ -3381,3 +3448,21 @@ elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED, #define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper #include "elf32-target.h" + +/* We define a second big-endian target that doesn't have the custom + section get/set hooks, for times when we want to preserve the + pre-swapped .text sections (like objcopy). */ + +#undef TARGET_BIG_SYM +#define TARGET_BIG_SYM bfd_elf32_rx_be_ns_vec +#undef TARGET_BIG_NAME +#define TARGET_BIG_NAME "elf32-rx-be-ns" +#undef TARGET_LITTLE_SYM + +#undef bfd_elf32_get_section_contents +#undef bfd_elf32_set_section_contents + +#undef elf32_bed +#define elf32_bed elf32_rx_be_ns_bed + +#include "elf32-target.h" diff --git a/bfd/elf32-s390.c b/bfd/elf32-s390.c index 46e9541..98437d0 100644 --- a/bfd/elf32-s390.c +++ b/bfd/elf32-s390.c @@ -1,6 +1,6 @@ /* IBM S/390-specific support for 32-bit ELF - Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 - Free Software Foundation, Inc. + Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, + 2011 Free Software Foundation, Inc. Contributed by Carl B. Pedersen and Martin Schwidefsky. This file is part of BFD, the Binary File Descriptor library. @@ -1696,12 +1696,6 @@ allocate_dynrelocs (h, inf) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - info = (struct bfd_link_info *) inf; htab = elf_s390_hash_table (info); @@ -1922,9 +1916,6 @@ readonly_dynrelocs (h, inf) struct elf_s390_link_hash_entry *eh; struct elf_s390_dyn_relocs *p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct elf_s390_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) { diff --git a/bfd/elf32-score.c b/bfd/elf32-score.c index 1c08c8a..b437624 100644 --- a/bfd/elf32-score.c +++ b/bfd/elf32-score.c @@ -1,5 +1,6 @@ /* 32-bit ELF support for S+core. - Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + Copyright 2006, 2007, 2008, 2009, 2010, 2011 + Free Software Foundation, Inc. Contributed by Brain.lin (brain.lin@sunplusct.com) Mei Ligang (ligang@sunnorth.com.cn) @@ -1037,9 +1038,6 @@ score_elf_sort_hash_table_f (struct score_elf_link_hash_entry *h, void *data) { struct score_elf_hash_sort_data *hsd = data; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct score_elf_link_hash_entry *) h->root.root.u.i.link; - /* Symbols without dynamic symbol table entries aren't interesting at all. */ if (h->root.dynindx == -1) return TRUE; diff --git a/bfd/elf32-score7.c b/bfd/elf32-score7.c index 9ce3bf1..3e98bfc 100644 --- a/bfd/elf32-score7.c +++ b/bfd/elf32-score7.c @@ -1,5 +1,5 @@ /* 32-bit ELF support for S+core. - Copyright 2009, 2010 Free Software Foundation, Inc. + Copyright 2009, 2010, 2011 Free Software Foundation, Inc. Contributed by Brain.lin (brain.lin@sunplusct.com) Mei Ligang (ligang@sunnorth.com.cn) @@ -920,9 +920,6 @@ score_elf_sort_hash_table_f (struct score_elf_link_hash_entry *h, void *data) { struct score_elf_hash_sort_data *hsd = data; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct score_elf_link_hash_entry *) h->root.root.u.i.link; - /* Symbols without dynamic symbol table entries aren't interesting at all. */ if (h->root.dynindx == -1) return TRUE; diff --git a/bfd/elf32-sh.c b/bfd/elf32-sh.c index e15f51c..ca2c4af 100644 --- a/bfd/elf32-sh.c +++ b/bfd/elf32-sh.c @@ -1,6 +1,6 @@ /* Renesas / SuperH SH specific support for 32-bit ELF Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, - 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Contributed by Ian Lance Taylor, Cygnus Support. This file is part of BFD, the Binary File Descriptor library. @@ -2977,12 +2977,6 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - info = (struct bfd_link_info *) inf; htab = sh_elf_hash_table (info); if (htab == NULL) @@ -3321,9 +3315,6 @@ readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) struct elf_sh_link_hash_entry *eh; struct elf_sh_dyn_relocs *p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct elf_sh_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) { @@ -5525,7 +5516,7 @@ sh_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, check_segment[0] = check_segment[1] = -1; - if (! info->shared) + if (! info->shared || info->pie) { relocation = tpoff (info, relocation); addend = rel->r_addend; @@ -6623,7 +6614,7 @@ sh_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, asection *sec, break; case R_SH_TLS_LE_32: - if (info->shared) + if (info->shared && !info->pie) { (*_bfd_error_handler) (_("%B: TLS local exec code cannot be linked into shared objects"), diff --git a/bfd/elf32-sparc.c b/bfd/elf32-sparc.c index 2d9deab..f722fcc 100644 --- a/bfd/elf32-sparc.c +++ b/bfd/elf32-sparc.c @@ -1,6 +1,7 @@ /* SPARC-specific support for 32-bit ELF Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, - 2003, 2004, 2005, 2006, 2007, 2010 Free Software Foundation, Inc. + 2003, 2004, 2005, 2006, 2007, 2010, 2011 + Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -110,7 +111,7 @@ elf32_sparc_merge_private_bfd_data (bfd *ibfd, bfd *obfd) return FALSE; } - return TRUE; + return _bfd_sparc_elf_merge_private_bfd_data (ibfd, obfd); } /* The final processing done just before writing out the object file. diff --git a/bfd/elf32-tic6x.c b/bfd/elf32-tic6x.c index b898aab..19287fe 100644 --- a/bfd/elf32-tic6x.c +++ b/bfd/elf32-tic6x.c @@ -22,6 +22,7 @@ MA 02110-1301, USA. */ #include "sysdep.h" +#include #include "bfd.h" #include "libbfd.h" #include "libiberty.h" @@ -75,6 +76,52 @@ struct elf32_tic6x_link_hash_entry struct elf_dyn_relocs *dyn_relocs; }; +typedef enum +{ + DELETE_EXIDX_ENTRY, + INSERT_EXIDX_CANTUNWIND_AT_END +} +tic6x_unwind_edit_type; + +/* A (sorted) list of edits to apply to an unwind table. */ +typedef struct tic6x_unwind_table_edit +{ + tic6x_unwind_edit_type type; + /* Note: we sometimes want to insert an unwind entry corresponding to a + section different from the one we're currently writing out, so record the + (text) section this edit relates to here. */ + asection *linked_section; + unsigned int index; + struct tic6x_unwind_table_edit *next; +} +tic6x_unwind_table_edit; + +typedef struct _tic6x_elf_section_data +{ + /* Information about mapping symbols. */ + struct bfd_elf_section_data elf; + /* Information about unwind tables. */ + union + { + /* Unwind info attached to a text section. */ + struct + { + asection *tic6x_exidx_sec; + } text; + + /* Unwind info attached to an .c6xabi.exidx section. */ + struct + { + tic6x_unwind_table_edit *unwind_edit_list; + tic6x_unwind_table_edit *unwind_edit_tail; + } exidx; + } u; +} +_tic6x_elf_section_data; + +#define elf32_tic6x_section_data(sec) \ + ((_tic6x_elf_section_data *) elf_section_data (sec)) + struct elf32_tic6x_obj_tdata { struct elf_obj_tdata root; @@ -468,9 +515,45 @@ static reloc_howto_type elf32_tic6x_howto_table[] = 0, /* src_mask */ 0xffffffff, /* dst_mask */ FALSE), /* pcrel_offset */ - EMPTY_HOWTO (28), - EMPTY_HOWTO (29), - EMPTY_HOWTO (30), + HOWTO (R_C6000_EHTYPE, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_C6000_EHTYPE", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + HOWTO (R_C6000_PCR_H16, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 7, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_C6000_PCR_H16", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0x007fff80, /* dst_mask */ + TRUE), /* pcrel_offset */ + HOWTO (R_C6000_PCR_L16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 7, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_C6000_PCR_L16", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0x007fff80, /* dst_mask */ + TRUE), /* pcrel_offset */ EMPTY_HOWTO (31), EMPTY_HOWTO (32), EMPTY_HOWTO (33), @@ -1040,9 +1123,21 @@ static reloc_howto_type elf32_tic6x_howto_table_rel[] = 0, /* src_mask */ 0xffffffff, /* dst_mask */ FALSE), /* pcrel_offset */ - EMPTY_HOWTO (28), - EMPTY_HOWTO (29), - EMPTY_HOWTO (30), + HOWTO (R_C6000_EHTYPE, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_C6000_EHTYPE", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + EMPTY_HOWTO (R_C6000_PCR_H16), + EMPTY_HOWTO (R_C6000_PCR_L16), EMPTY_HOWTO (31), EMPTY_HOWTO (32), EMPTY_HOWTO (33), @@ -1495,6 +1590,31 @@ elf32_tic6x_link_hash_table_create (bfd *abfd) return &ret->elf.root; } +static bfd_boolean +elf32_tic6x_final_link (bfd *abfd, struct bfd_link_info *info) +{ + if (info->shared) + { + obj_attribute *out_attr; + out_attr = elf_known_obj_attributes_proc (abfd); + if (out_attr[Tag_ABI_PIC].i == 0) + { + _bfd_error_handler (_("warning: generating a shared library " + "containing non-PIC code")); + } + if (out_attr[Tag_ABI_PID].i == 0) + { + _bfd_error_handler (_("warning: generating a shared library " + "containing non-PID code")); + } + } + /* Invoke the regular ELF backend linker to do all the work. */ + if (!bfd_elf_final_link (abfd, info)) + return FALSE; + + return TRUE; +} + /* Destroy a C6X ELF linker hash table. */ static void @@ -1790,6 +1910,85 @@ elf32_tic6x_finish_dynamic_symbol (bfd * output_bfd, return TRUE; } +/* Unwinding tables are not referenced directly. This pass marks them as + required if the corresponding code section is marked. */ + +static bfd_boolean +elf32_tic6x_gc_mark_extra_sections (struct bfd_link_info *info, + elf_gc_mark_hook_fn gc_mark_hook) +{ + bfd *sub; + Elf_Internal_Shdr **elf_shdrp; + bfd_boolean again; + + _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook); + + /* Marking EH data may cause additional code sections to be marked, + requiring multiple passes. */ + again = TRUE; + while (again) + { + again = FALSE; + for (sub = info->input_bfds; sub != NULL; sub = sub->link_next) + { + asection *o; + + if (! is_tic6x_elf (sub)) + continue; + + elf_shdrp = elf_elfsections (sub); + for (o = sub->sections; o != NULL; o = o->next) + { + Elf_Internal_Shdr *hdr; + + hdr = &elf_section_data (o)->this_hdr; + if (hdr->sh_type == SHT_C6000_UNWIND + && hdr->sh_link + && hdr->sh_link < elf_numsections (sub) + && !o->gc_mark + && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark) + { + again = TRUE; + if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) + return FALSE; + } + } + } + } + + return TRUE; +} + +/* Return TRUE if this is an unwinding table index. */ + +static bfd_boolean +is_tic6x_elf_unwind_section_name (const char *name) +{ + return (CONST_STRNEQ (name, ELF_STRING_C6000_unwind) + || CONST_STRNEQ (name, ELF_STRING_C6000_unwind_once)); +} + + +/* Set the type and flags for an unwinding index table. We do this by + the section name, which is a hack, but ought to work. */ + +static bfd_boolean +elf32_tic6x_fake_sections (bfd *abfd ATTRIBUTE_UNUSED, + Elf_Internal_Shdr *hdr, asection *sec) +{ + const char * name; + + name = bfd_get_section_name (abfd, sec); + + if (is_tic6x_elf_unwind_section_name (name)) + { + hdr->sh_type = SHT_C6000_UNWIND; + hdr->sh_flags |= SHF_LINK_ORDER; + } + + return TRUE; +} + /* Update the got entry reference counts for the section being removed. */ static bfd_boolean @@ -1853,6 +2052,7 @@ elf32_tic6x_gc_sweep_hook (bfd *abfd, case R_C6000_SBR_GOT_U15_W: case R_C6000_SBR_GOT_L16_W: case R_C6000_SBR_GOT_H16_W: + case R_C6000_EHTYPE: if (h != NULL) { if (h->got.refcount > 0) @@ -1993,6 +2193,18 @@ elf32_tic6x_new_section_hook (bfd *abfd, asection *sec) { bfd_boolean ret; + /* Allocate target specific section data. */ + if (!sec->used_by_bfd) + { + _tic6x_elf_section_data *sdata; + bfd_size_type amt = sizeof (*sdata); + + sdata = (_tic6x_elf_section_data *) bfd_zalloc (abfd, amt); + if (sdata == NULL) + return FALSE; + sec->used_by_bfd = sdata; + } + ret = _bfd_elf_new_section_hook (abfd, sec); sec->use_rela_p = elf32_tic6x_tdata (abfd)->use_rela_p; @@ -2078,7 +2290,7 @@ elf32_tic6x_relocate_section (bfd *output_bfd, Elf_Internal_Sym *sym; asection *sec; struct elf_link_hash_entry *h; - bfd_vma off, relocation; + bfd_vma off, off2, relocation; bfd_boolean unresolved_reloc; bfd_reloc_status_type r; struct bfd_link_hash_entry *sbh; @@ -2192,6 +2404,20 @@ elf32_tic6x_relocate_section (bfd *output_bfd, unresolved_reloc = FALSE; break; + case R_C6000_PCR_H16: + case R_C6000_PCR_L16: + off = (input_section->output_section->vma + + input_section->output_offset + + rel->r_offset); + /* These must be calculated as R = S - FP(FP(PC) - A). + PC, here, is the value we just computed in OFF. RELOCATION + has the address of S + A. */ + relocation -= rel->r_addend; + off2 = ((off & ~(bfd_vma)0x1f) - rel->r_addend) & (bfd_vma)~0x1f; + off2 = relocation - off2; + relocation = off + off2; + break; + case R_C6000_DSBT_INDEX: relocation = elf32_tic6x_hash_table (info)->params.dsbt_index; if (!info->shared || relocation != 0) @@ -2323,6 +2549,7 @@ elf32_tic6x_relocate_section (bfd *output_bfd, case R_C6000_SBR_GOT_U15_W: case R_C6000_SBR_GOT_L16_W: case R_C6000_SBR_GOT_H16_W: + case R_C6000_EHTYPE: /* Relocation is to the entry for this symbol in the global offset table. */ if (htab->elf.sgot == NULL) @@ -2577,7 +2804,7 @@ elf32_tic6x_check_relocs (bfd *abfd, struct bfd_link_info *info, /* Create dynamic sections for relocatable executables so that we can copy relocations. */ - if (elf32_tic6x_using_dsbt (abfd) + if ((info->shared || elf32_tic6x_using_dsbt (abfd)) && ! htab->elf.dynamic_sections_created) { if (! _bfd_elf_link_create_dynamic_sections (abfd, info)) @@ -2646,6 +2873,7 @@ elf32_tic6x_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_C6000_SBR_GOT_U15_W: case R_C6000_SBR_GOT_L16_W: case R_C6000_SBR_GOT_H16_W: + case R_C6000_EHTYPE: /* This symbol requires a global offset table entry. */ if (h != NULL) { @@ -2901,13 +3129,7 @@ elf32_tic6x_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; eh = (struct elf32_tic6x_link_hash_entry *) h; - info = (struct bfd_link_info *) inf; htab = elf32_tic6x_hash_table (info); @@ -3051,9 +3273,6 @@ elf32_tic6x_readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) struct elf32_tic6x_link_hash_entry *eh; struct elf_dyn_relocs *p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct elf32_tic6x_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) { @@ -3737,24 +3956,10 @@ elf32_tic6x_merge_attributes (bfd *ibfd, bfd *obfd) } break; - case Tag_ABI_PID: - if (out_attr[i].i != in_attr[i].i) - { - _bfd_error_handler - (_("warning: %B and %B differ in position-dependence of " - "data addressing"), - obfd, ibfd); - } - break; - case Tag_ABI_PIC: - if (out_attr[i].i != in_attr[i].i) - { - _bfd_error_handler - (_("warning: %B and %B differ in position-dependence of " - "code addressing"), - obfd, ibfd); - } + case Tag_ABI_PID: + if (out_attr[i].i > in_attr[i].i) + out_attr[i].i = in_attr[i].i; break; case Tag_ABI_array_object_alignment: @@ -3862,6 +4067,417 @@ elf32_tic6x_copy_private_data (bfd * ibfd, bfd * obfd) return TRUE; } +/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero, + adds the edit to the start of the list. (The list must be built in order of + ascending TINDEX: the function's callers are primarily responsible for + maintaining that condition). */ + +static void +elf32_tic6x_add_unwind_table_edit (tic6x_unwind_table_edit **head, + tic6x_unwind_table_edit **tail, + tic6x_unwind_edit_type type, + asection *linked_section, + unsigned int tindex) +{ + tic6x_unwind_table_edit *new_edit = (tic6x_unwind_table_edit *) + xmalloc (sizeof (tic6x_unwind_table_edit)); + + new_edit->type = type; + new_edit->linked_section = linked_section; + new_edit->index = tindex; + + if (tindex > 0) + { + new_edit->next = NULL; + + if (*tail) + (*tail)->next = new_edit; + + (*tail) = new_edit; + + if (!*head) + (*head) = new_edit; + } + else + { + new_edit->next = *head; + + if (!*tail) + *tail = new_edit; + + *head = new_edit; + } +} + +static _tic6x_elf_section_data * +get_tic6x_elf_section_data (asection * sec) +{ + if (sec && sec->owner && is_tic6x_elf (sec->owner)) + return elf32_tic6x_section_data (sec); + else + return NULL; +} + + +/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST must be negative. */ +static void +elf32_tic6x_adjust_exidx_size (asection *exidx_sec, int adjust) +{ + asection *out_sec; + + if (!exidx_sec->rawsize) + exidx_sec->rawsize = exidx_sec->size; + + bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust); + out_sec = exidx_sec->output_section; + /* Adjust size of output section. */ + bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust); +} + +/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */ +static void +elf32_tic6x_insert_cantunwind_after (asection *text_sec, asection *exidx_sec) +{ + struct _tic6x_elf_section_data *exidx_data; + + exidx_data = get_tic6x_elf_section_data (exidx_sec); + elf32_tic6x_add_unwind_table_edit ( + &exidx_data->u.exidx.unwind_edit_list, + &exidx_data->u.exidx.unwind_edit_tail, + INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX); + + elf32_tic6x_adjust_exidx_size (exidx_sec, 8); +} + +/* Scan .cx6abi.exidx tables, and create a list describing edits which + should be made to those tables, such that: + + 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries. + 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind + codes which have been inlined into the index). + + If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged. + + The edits are applied when the tables are written + (in elf32_tic6x_write_section). +*/ + +bfd_boolean +elf32_tic6x_fix_exidx_coverage (asection **text_section_order, + unsigned int num_text_sections, + struct bfd_link_info *info, + bfd_boolean merge_exidx_entries) +{ + bfd *inp; + unsigned int last_second_word = 0, i; + asection *last_exidx_sec = NULL; + asection *last_text_sec = NULL; + int last_unwind_type = -1; + + /* Walk over all EXIDX sections, and create backlinks from the corrsponding + text sections. */ + for (inp = info->input_bfds; inp != NULL; inp = inp->link_next) + { + asection *sec; + + for (sec = inp->sections; sec != NULL; sec = sec->next) + { + struct bfd_elf_section_data *elf_sec = elf_section_data (sec); + Elf_Internal_Shdr *hdr = &elf_sec->this_hdr; + + if (!hdr || hdr->sh_type != SHT_C6000_UNWIND) + continue; + + if (elf_sec->linked_to) + { + Elf_Internal_Shdr *linked_hdr + = &elf_section_data (elf_sec->linked_to)->this_hdr; + struct _tic6x_elf_section_data *linked_sec_tic6x_data + = get_tic6x_elf_section_data (linked_hdr->bfd_section); + + if (linked_sec_tic6x_data == NULL) + continue; + + /* Link this .c6xabi.exidx section back from the + text section it describes. */ + linked_sec_tic6x_data->u.text.tic6x_exidx_sec = sec; + } + } + } + + /* Walk all text sections in order of increasing VMA. Eilminate duplicate + index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes), + and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */ + + for (i = 0; i < num_text_sections; i++) + { + asection *sec = text_section_order[i]; + asection *exidx_sec; + struct _tic6x_elf_section_data *tic6x_data + = get_tic6x_elf_section_data (sec); + struct _tic6x_elf_section_data *exidx_data; + bfd_byte *contents = NULL; + int deleted_exidx_bytes = 0; + bfd_vma j; + tic6x_unwind_table_edit *unwind_edit_head = NULL; + tic6x_unwind_table_edit *unwind_edit_tail = NULL; + Elf_Internal_Shdr *hdr; + bfd *ibfd; + + if (tic6x_data == NULL) + continue; + + exidx_sec = tic6x_data->u.text.tic6x_exidx_sec; + if (exidx_sec == NULL) + { + /* Section has no unwind data. */ + if (last_unwind_type == 0 || !last_exidx_sec) + continue; + + /* Ignore zero sized sections. */ + if (sec->size == 0) + continue; + + elf32_tic6x_insert_cantunwind_after (last_text_sec, last_exidx_sec); + last_unwind_type = 0; + continue; + } + + /* Skip /DISCARD/ sections. */ + if (bfd_is_abs_section (exidx_sec->output_section)) + continue; + + hdr = &elf_section_data (exidx_sec)->this_hdr; + if (hdr->sh_type != SHT_C6000_UNWIND) + continue; + + exidx_data = get_tic6x_elf_section_data (exidx_sec); + if (exidx_data == NULL) + continue; + + ibfd = exidx_sec->owner; + + if (hdr->contents != NULL) + contents = hdr->contents; + else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents)) + /* An error? */ + continue; + + for (j = 0; j < hdr->sh_size; j += 8) + { + unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4); + int unwind_type; + int elide = 0; + + /* An EXIDX_CANTUNWIND entry. */ + if (second_word == 1) + { + if (last_unwind_type == 0) + elide = 1; + unwind_type = 0; + } + /* Inlined unwinding data. Merge if equal to previous. */ + else if ((second_word & 0x80000000) != 0) + { + if (merge_exidx_entries + && last_second_word == second_word + && last_unwind_type == 1) + elide = 1; + unwind_type = 1; + last_second_word = second_word; + } + /* Normal table entry. In theory we could merge these too, + but duplicate entries are likely to be much less common. */ + else + unwind_type = 2; + + if (elide) + { + elf32_tic6x_add_unwind_table_edit (&unwind_edit_head, + &unwind_edit_tail, DELETE_EXIDX_ENTRY, NULL, j / 8); + + deleted_exidx_bytes += 8; + } + + last_unwind_type = unwind_type; + } + + /* Free contents if we allocated it ourselves. */ + if (contents != hdr->contents) + free (contents); + + /* Record edits to be applied later (in elf32_tic6x_write_section). */ + exidx_data->u.exidx.unwind_edit_list = unwind_edit_head; + exidx_data->u.exidx.unwind_edit_tail = unwind_edit_tail; + + if (deleted_exidx_bytes > 0) + elf32_tic6x_adjust_exidx_size (exidx_sec, -deleted_exidx_bytes); + + last_exidx_sec = exidx_sec; + last_text_sec = sec; + } + + /* Add terminating CANTUNWIND entry. */ + if (last_exidx_sec && last_unwind_type != 0) + elf32_tic6x_insert_cantunwind_after (last_text_sec, last_exidx_sec); + + return TRUE; +} + +/* Add ADDEND to lower 31 bits of VAL, leaving other bits unmodified. */ + +static unsigned long +elf32_tic6x_add_low31 (unsigned long val, bfd_vma addend) +{ + return (val & ~0x7ffffffful) | ((val + addend) & 0x7ffffffful); +} + +/* Copy an .c6xabi.exidx table entry, adding OFFSET to (applied) PREL31 + relocations. OFFSET is in bytes, and will be scaled before encoding. */ + + +static void +elf32_tic6x_copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, + bfd_vma offset) +{ + unsigned long first_word = bfd_get_32 (output_bfd, from); + unsigned long second_word = bfd_get_32 (output_bfd, from + 4); + + offset >>= 1; + /* High bit of first word is supposed to be zero. */ + if ((first_word & 0x80000000ul) == 0) + first_word = elf32_tic6x_add_low31 (first_word, offset); + + /* If the high bit of the first word is clear, and the bit pattern is not 0x1 + (EXIDX_CANTUNWIND), this is an offset to an .c6xabi.extab entry. */ + if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0)) + second_word = elf32_tic6x_add_low31 (second_word, offset); + + bfd_put_32 (output_bfd, first_word, to); + bfd_put_32 (output_bfd, second_word, to + 4); +} + +/* Do the actual mangling of exception index tables. */ + +static bfd_boolean +elf32_tic6x_write_section (bfd *output_bfd, + struct bfd_link_info *link_info, + asection *sec, + bfd_byte *contents) +{ + _tic6x_elf_section_data *tic6x_data; + struct elf32_tic6x_link_hash_table *globals + = elf32_tic6x_hash_table (link_info); + bfd_vma offset = sec->output_section->vma + sec->output_offset; + + if (globals == NULL) + return FALSE; + + /* If this section has not been allocated an _tic6x_elf_section_data + structure then we cannot record anything. */ + tic6x_data = get_tic6x_elf_section_data (sec); + if (tic6x_data == NULL) + return FALSE; + + if (tic6x_data->elf.this_hdr.sh_type != SHT_C6000_UNWIND) + return FALSE; + + tic6x_unwind_table_edit *edit_node + = tic6x_data->u.exidx.unwind_edit_list; + /* Now, sec->size is the size of the section we will write. The original + size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND + markers) was sec->rawsize. (This isn't the case if we perform no + edits, then rawsize will be zero and we should use size). */ + bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size); + unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size; + unsigned int in_index, out_index; + bfd_vma add_to_offsets = 0; + + for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;) + { + if (edit_node) + { + unsigned int edit_index = edit_node->index; + + if (in_index < edit_index && in_index * 8 < input_size) + { + elf32_tic6x_copy_exidx_entry (output_bfd, + edited_contents + out_index * 8, + contents + in_index * 8, add_to_offsets); + out_index++; + in_index++; + } + else if (in_index == edit_index + || (in_index * 8 >= input_size + && edit_index == UINT_MAX)) + { + switch (edit_node->type) + { + case DELETE_EXIDX_ENTRY: + in_index++; + add_to_offsets += 8; + break; + + case INSERT_EXIDX_CANTUNWIND_AT_END: + { + asection *text_sec = edit_node->linked_section; + bfd_vma text_offset = text_sec->output_section->vma + + text_sec->output_offset + + text_sec->size; + bfd_vma exidx_offset = offset + out_index * 8; + unsigned long prel31_offset; + + /* Note: this is meant to be equivalent to an + R_C6000_PREL31 relocation. These synthetic + EXIDX_CANTUNWIND markers are not relocated by the + usual BFD method. */ + prel31_offset = ((text_offset - exidx_offset) >> 1) + & 0x7ffffffful; + + /* First address we can't unwind. */ + bfd_put_32 (output_bfd, prel31_offset, + &edited_contents[out_index * 8]); + + /* Code for EXIDX_CANTUNWIND. */ + bfd_put_32 (output_bfd, 0x1, + &edited_contents[out_index * 8 + 4]); + + out_index++; + add_to_offsets -= 8; + } + break; + } + + edit_node = edit_node->next; + } + } + else + { + /* No more edits, copy remaining entries verbatim. */ + elf32_tic6x_copy_exidx_entry (output_bfd, + edited_contents + out_index * 8, + contents + in_index * 8, add_to_offsets); + out_index++; + in_index++; + } + } + + if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD)) + bfd_set_section_contents (output_bfd, sec->output_section, + edited_contents, + (file_ptr) sec->output_offset, sec->size); + + return TRUE; +} + +static void +elf32_tic6x_set_osabi (bfd *abfd, struct bfd_link_info *link_info) +{ + if (link_info != NULL && link_info->relocatable) + return; + _bfd_elf_set_osabi (abfd, link_info); +} + #define TARGET_LITTLE_SYM bfd_elf32_tic6x_le_vec #define TARGET_LITTLE_NAME "elf32-tic6x-le" #define TARGET_BIG_SYM bfd_elf32_tic6x_be_vec @@ -3894,7 +4510,9 @@ elf32_tic6x_copy_private_data (bfd * ibfd, bfd * obfd) #define elf_backend_plt_readonly 1 #define elf_backend_rela_normal 1 #define elf_backend_got_header_size 8 +#define elf_backend_fake_sections elf32_tic6x_fake_sections #define elf_backend_gc_sweep_hook elf32_tic6x_gc_sweep_hook +#define elf_backend_gc_mark_extra_sections elf32_tic6x_gc_mark_extra_sections #define elf_backend_modify_program_headers \ elf32_tic6x_modify_program_headers #define elf_backend_create_dynamic_sections \ @@ -3909,6 +4527,7 @@ elf32_tic6x_copy_private_data (bfd * ibfd, bfd * obfd) #define elf_backend_section_from_bfd_section \ elf32_tic6x_section_from_bfd_section #define elf_backend_relocate_section elf32_tic6x_relocate_section +#define elf_backend_relocs_compatible _bfd_elf_relocs_compatible #define elf_backend_finish_dynamic_symbol \ elf32_tic6x_finish_dynamic_symbol #define elf_backend_always_size_sections \ @@ -3917,6 +4536,9 @@ elf32_tic6x_copy_private_data (bfd * ibfd, bfd * obfd) elf32_tic6x_size_dynamic_sections #define elf_backend_finish_dynamic_sections \ elf32_tic6x_finish_dynamic_sections +#define bfd_elf32_bfd_final_link \ + elf32_tic6x_final_link +#define elf_backend_write_section elf32_tic6x_write_section #define elf_info_to_howto elf32_tic6x_info_to_howto #define elf_info_to_howto_rel elf32_tic6x_info_to_howto_rel @@ -3924,5 +4546,42 @@ elf32_tic6x_copy_private_data (bfd * ibfd, bfd * obfd) #define elf_backend_omit_section_dynsym elf32_tic6x_link_omit_section_dynsym #define elf_backend_plt_sym_val elf32_tic6x_plt_sym_val +#include "elf32-target.h" + +#undef elf32_bed +#define elf32_bed elf32_tic6x_linux_bed + +#undef TARGET_LITTLE_SYM +#define TARGET_LITTLE_SYM bfd_elf32_tic6x_linux_le_vec +#undef TARGET_LITTLE_NAME +#define TARGET_LITTLE_NAME "elf32-tic6x-linux-le" +#undef TARGET_BIG_SYM +#define TARGET_BIG_SYM bfd_elf32_tic6x_linux_be_vec +#undef TARGET_BIG_NAME +#define TARGET_BIG_NAME "elf32-tic6x-linux-be" +#undef ELF_OSABI +#define ELF_OSABI ELFOSABI_C6000_LINUX + +#undef elf_backend_post_process_headers +#define elf_backend_post_process_headers elf32_tic6x_set_osabi + +#include "elf32-target.h" + +#undef elf32_bed +#define elf32_bed elf32_tic6x_elf_bed + +#undef TARGET_LITTLE_SYM +#define TARGET_LITTLE_SYM bfd_elf32_tic6x_elf_le_vec +#undef TARGET_LITTLE_NAME +#define TARGET_LITTLE_NAME "elf32-tic6x-elf-le" +#undef TARGET_BIG_SYM +#define TARGET_BIG_SYM bfd_elf32_tic6x_elf_be_vec +#undef TARGET_BIG_NAME +#define TARGET_BIG_NAME "elf32-tic6x-elf-be" +#undef ELF_OSABI +#define ELF_OSABI ELFOSABI_C6000_ELFABI + +#undef elf_backend_post_process_headers +#define elf_backend_post_process_headers elf32_tic6x_set_osabi #include "elf32-target.h" diff --git a/bfd/elf32-tilegx.c b/bfd/elf32-tilegx.c new file mode 100644 index 0000000..902e9ba --- /dev/null +++ b/bfd/elf32-tilegx.c @@ -0,0 +1,132 @@ +/* TILE-Gx-specific support for 32-bit ELF. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" +#include "elf-bfd.h" +#include "elfxx-tilegx.h" +#include "elf32-tilegx.h" + + +/* Support for core dump NOTE sections. */ + +static bfd_boolean +tilegx_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) +{ + int offset; + size_t size; + + if (note->descsz != TILEGX_PRSTATUS_SIZEOF) + return FALSE; + + /* pr_cursig */ + elf_tdata (abfd)->core_signal = + bfd_get_16 (abfd, note->descdata + TILEGX_PRSTATUS_OFFSET_PR_CURSIG); + + /* pr_pid */ + elf_tdata (abfd)->core_pid = + bfd_get_32 (abfd, note->descdata + TILEGX_PRSTATUS_OFFSET_PR_PID); + + /* pr_reg */ + offset = TILEGX_PRSTATUS_OFFSET_PR_REG; + size = TILEGX_GREGSET_T_SIZE; + + /* Make a ".reg/999" section. */ + return _bfd_elfcore_make_pseudosection (abfd, ".reg", + size, note->descpos + offset); +} + +static bfd_boolean +tilegx_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) +{ + if (note->descsz != TILEGX_PRPSINFO_SIZEOF) + return FALSE; + + elf_tdata (abfd)->core_program + = _bfd_elfcore_strndup (abfd, note->descdata + TILEGX_PRPSINFO_OFFSET_PR_FNAME, 16); + elf_tdata (abfd)->core_command + = _bfd_elfcore_strndup (abfd, note->descdata + TILEGX_PRPSINFO_OFFSET_PR_PSARGS, ELF_PR_PSARGS_SIZE); + + + /* Note that for some reason, a spurious space is tacked + onto the end of the args in some (at least one anyway) + implementations, so strip it off if it exists. */ + { + char *command = elf_tdata (abfd)->core_command; + int n = strlen (command); + + if (0 < n && command[n - 1] == ' ') + command[n - 1] = '\0'; + } + + return TRUE; +} + + +#define ELF_ARCH bfd_arch_tilegx +#define ELF_TARGET_ID TILEGX_ELF_DATA +#define ELF_MACHINE_CODE EM_TILEGX +#define ELF_MAXPAGESIZE 0x10000 +#define ELF_COMMONPAGESIZE 0x10000 + +#define TARGET_LITTLE_SYM bfd_elf32_tilegx_vec +#define TARGET_LITTLE_NAME "elf32-tilegx" + +#define elf_backend_reloc_type_class tilegx_reloc_type_class + +#define bfd_elf32_bfd_reloc_name_lookup tilegx_reloc_name_lookup +#define bfd_elf32_bfd_link_hash_table_create tilegx_elf_link_hash_table_create +#define bfd_elf32_bfd_reloc_type_lookup tilegx_reloc_type_lookup +#define bfd_elf32_bfd_merge_private_bfd_data \ + _bfd_tilegx_elf_merge_private_bfd_data + +#define elf_backend_copy_indirect_symbol tilegx_elf_copy_indirect_symbol +#define elf_backend_create_dynamic_sections tilegx_elf_create_dynamic_sections +#define elf_backend_check_relocs tilegx_elf_check_relocs +#define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol +#define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections +#define elf_backend_relocate_section tilegx_elf_relocate_section +#define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol +#define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +#define elf_backend_gc_mark_hook tilegx_elf_gc_mark_hook +#define elf_backend_gc_sweep_hook tilegx_elf_gc_sweep_hook +#define elf_backend_plt_sym_val tilegx_elf_plt_sym_val +#define elf_info_to_howto_rel NULL +#define elf_info_to_howto tilegx_info_to_howto_rela +#define elf_backend_grok_prstatus tilegx_elf_grok_prstatus +#define elf_backend_grok_psinfo tilegx_elf_grok_psinfo +#define elf_backend_additional_program_headers tilegx_additional_program_headers + +#define elf_backend_init_index_section _bfd_elf_init_1_index_section + +#define elf_backend_can_gc_sections 1 +#define elf_backend_can_refcount 1 +#define elf_backend_want_got_plt 1 +#define elf_backend_plt_readonly 1 +/* Align PLT mod 64 byte L2 line size. */ +#define elf_backend_plt_alignment 6 +#define elf_backend_want_plt_sym 1 +#define elf_backend_got_header_size 4 +#define elf_backend_rela_normal 1 +#define elf_backend_default_execstack 0 + +#include "elf32-target.h" diff --git a/bfd/elf32-tilegx.h b/bfd/elf32-tilegx.h new file mode 100644 index 0000000..091bde1 --- /dev/null +++ b/bfd/elf32-tilegx.h @@ -0,0 +1,38 @@ +/* TILE-Gx-specific support for 32-bit ELF. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#ifndef _ELF32_TILEGX_H +#define _ELF32_TILEGX_H + +/* This file contains sizes and offsets of Linux data structures. */ + +#define TILEGX_PRSTATUS_SIZEOF 592 +#define TILEGX_PRSTATUS_OFFSET_PR_CURSIG 12 +#define TILEGX_PRSTATUS_OFFSET_PR_PID 24 +#define TILEGX_PRSTATUS_OFFSET_PR_REG 72 + +#define TILEGX_PRPSINFO_SIZEOF 128 +#define TILEGX_PRPSINFO_OFFSET_PR_FNAME 32 +#define TILEGX_PRPSINFO_OFFSET_PR_PSARGS 48 +#define ELF_PR_PSARGS_SIZE 80 + +#define TILEGX_GREGSET_T_SIZE 512 + +#endif /* _ELF32_TILEGX_H */ diff --git a/bfd/elf32-tilepro.c b/bfd/elf32-tilepro.c new file mode 100644 index 0000000..f2aed9c --- /dev/null +++ b/bfd/elf32-tilepro.c @@ -0,0 +1,3604 @@ +/* TILEPro-specific support for 32-bit ELF. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "bfd.h" +#include "sysdep.h" +#include "libbfd.h" +#include "elf-bfd.h" +#include "elf/tilepro.h" +#include "opcode/tilepro.h" +#include "libiberty.h" +#include "elf32-tilepro.h" + +#define TILEPRO_BYTES_PER_WORD 4 + +static reloc_howto_type tilepro_elf_howto_table [] = +{ + /* This reloc does nothing. */ + HOWTO (R_TILEPRO_NONE, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_NONE", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 32 bit absolute relocation. */ + HOWTO (R_TILEPRO_32, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_32", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 16 bit absolute relocation. */ + HOWTO (R_TILEPRO_16, /* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_16", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* An 8 bit absolute relocation. */ + HOWTO (R_TILEPRO_8, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 8, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_unsigned, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_8", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 32 bit pc-relative relocation. */ + HOWTO (R_TILEPRO_32_PCREL,/* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_32_PCREL", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffffffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* A 16 bit pc-relative relocation. */ + HOWTO (R_TILEPRO_16_PCREL,/* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_16_PCREL", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* An 8 bit pc-relative relocation. */ + HOWTO (R_TILEPRO_8_PCREL, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 8, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_8_PCREL",/* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* A 16 bit relocation without overflow. */ + HOWTO (R_TILEPRO_LO16, /* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_LO16", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* The high order 16 bits of an address. */ + HOWTO (R_TILEPRO_HI16, /* type */ + 16, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_HI16", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* The high order 16 bits of an address, plus 1 if the contents of + the low 16 bits, treated as a signed number, is negative. */ + HOWTO (R_TILEPRO_HA16, /* type */ + 16, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_HA16", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + HOWTO (R_TILEPRO_COPY, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_COPY", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEPRO_GLOB_DAT, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_GLOB_DAT", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEPRO_JMP_SLOT, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_JMP_SLOT", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEPRO_RELATIVE, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_RELATIVE", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEPRO_BROFF_X1, /* type */ + TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 17, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_BROFF_X1", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + -1, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEPRO_JOFFLONG_X1, /* type */ + TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 29, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_JOFFLONG_X1", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + -1, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEPRO_JOFFLONG_X1_PLT, /* type */ + TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 29, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_JOFFLONG_X1_PLT", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + -1, /* dst_mask */ + TRUE), /* pcrel_offset */ + +#define TILEPRO_IMM_HOWTO(name, size, bitsize) \ + HOWTO (name, 0, size, bitsize, FALSE, 0, \ + complain_overflow_signed, bfd_elf_generic_reloc, \ + #name, FALSE, 0, -1, FALSE) + +#define TILEPRO_UIMM_HOWTO(name, size, bitsize) \ + HOWTO (name, 0, size, bitsize, FALSE, 0, \ + complain_overflow_unsigned, bfd_elf_generic_reloc, \ + #name, FALSE, 0, -1, FALSE) + + TILEPRO_IMM_HOWTO(R_TILEPRO_IMM8_X0, 0, 8), + TILEPRO_IMM_HOWTO(R_TILEPRO_IMM8_Y0, 0, 8), + TILEPRO_IMM_HOWTO(R_TILEPRO_IMM8_X1, 0, 8), + TILEPRO_IMM_HOWTO(R_TILEPRO_IMM8_Y1, 0, 8), + TILEPRO_UIMM_HOWTO(R_TILEPRO_MT_IMM15_X1, 1, 15), + TILEPRO_UIMM_HOWTO(R_TILEPRO_MF_IMM15_X1, 1, 15), + TILEPRO_IMM_HOWTO(R_TILEPRO_IMM16_X0, 1, 16), + TILEPRO_IMM_HOWTO(R_TILEPRO_IMM16_X1, 1, 16), + +#define TILEPRO_IMM16_HOWTO(name, rshift) \ + HOWTO (name, rshift, 1, 16, FALSE, 0, \ + complain_overflow_dont, bfd_elf_generic_reloc, \ + #name, FALSE, 0, 0xffff, FALSE) + + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X0_LO, 0), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X1_LO, 0), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X0_HI, 16), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X1_HI, 16), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X0_HA, 16), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X1_HA, 16), + + /* PC-relative offsets. */ + + HOWTO (R_TILEPRO_IMM16_X0_PCREL, /* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_IMM16_X0_PCREL",/* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + -1, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEPRO_IMM16_X1_PCREL, /* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_IMM16_X1_PCREL",/* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + -1, /* dst_mask */ + TRUE), /* pcrel_offset */ + +#define TILEPRO_IMM16_HOWTO_PCREL(name, rshift) \ + HOWTO (name, rshift, 1, 16, TRUE, 0, \ + complain_overflow_dont, bfd_elf_generic_reloc, \ + #name, FALSE, 0, 0xffff, TRUE) + + TILEPRO_IMM16_HOWTO_PCREL (R_TILEPRO_IMM16_X0_LO_PCREL, 0), + TILEPRO_IMM16_HOWTO_PCREL (R_TILEPRO_IMM16_X1_LO_PCREL, 0), + TILEPRO_IMM16_HOWTO_PCREL (R_TILEPRO_IMM16_X0_HI_PCREL, 16), + TILEPRO_IMM16_HOWTO_PCREL (R_TILEPRO_IMM16_X1_HI_PCREL, 16), + TILEPRO_IMM16_HOWTO_PCREL (R_TILEPRO_IMM16_X0_HA_PCREL, 16), + TILEPRO_IMM16_HOWTO_PCREL (R_TILEPRO_IMM16_X1_HA_PCREL, 16), + + /* Byte offset into GOT for a particular symbol. */ + TILEPRO_IMM_HOWTO(R_TILEPRO_IMM16_X0_GOT, 1, 16), + TILEPRO_IMM_HOWTO(R_TILEPRO_IMM16_X1_GOT, 1, 16), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X0_GOT_LO, 0), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X1_GOT_LO, 0), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X0_GOT_HI, 16), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X1_GOT_HI, 16), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X0_GOT_HA, 16), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X1_GOT_HA, 16), + + TILEPRO_UIMM_HOWTO(R_TILEPRO_MMSTART_X0, 0, 5), + TILEPRO_UIMM_HOWTO(R_TILEPRO_MMEND_X0, 0, 5), + TILEPRO_UIMM_HOWTO(R_TILEPRO_MMSTART_X1, 0, 5), + TILEPRO_UIMM_HOWTO(R_TILEPRO_MMEND_X1, 0, 5), + + TILEPRO_UIMM_HOWTO(R_TILEPRO_SHAMT_X0, 0, 5), + TILEPRO_UIMM_HOWTO(R_TILEPRO_SHAMT_X1, 0, 5), + TILEPRO_UIMM_HOWTO(R_TILEPRO_SHAMT_Y0, 0, 5), + TILEPRO_UIMM_HOWTO(R_TILEPRO_SHAMT_Y1, 0, 5), + + TILEPRO_IMM_HOWTO(R_TILEPRO_DEST_IMM8_X1, 0, 8), + + /* These relocs are currently not defined. */ + EMPTY_HOWTO (56), + EMPTY_HOWTO (57), + EMPTY_HOWTO (58), + EMPTY_HOWTO (59), + EMPTY_HOWTO (60), + EMPTY_HOWTO (61), + EMPTY_HOWTO (62), + EMPTY_HOWTO (63), + EMPTY_HOWTO (64), + EMPTY_HOWTO (65), + + /* Offsets into the GOT of TLS Descriptors. */ + + HOWTO (R_TILEPRO_IMM16_X0_TLS_GD,/* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_IMM16_X0_TLS_GD",/* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + HOWTO (R_TILEPRO_IMM16_X1_TLS_GD,/* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_IMM16_X1_TLS_GD",/* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X0_TLS_GD_LO, 0), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X1_TLS_GD_LO, 0), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X0_TLS_GD_HI, 16), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X1_TLS_GD_HI, 16), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X0_TLS_GD_HA, 16), + TILEPRO_IMM16_HOWTO (R_TILEPRO_IMM16_X1_TLS_GD_HA, 16), + + /* Offsets into the GOT of TLS Descriptors. */ + + HOWTO (R_TILEPRO_IMM16_X0_TLS_IE,/* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_IMM16_X0_TLS_IE",/* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + -1, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEPRO_IMM16_X1_TLS_IE,/* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEPRO_IMM16_X1_TLS_IE",/* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + -1, /* dst_mask */ + TRUE), /* pcrel_offset */ + +#define TILEPRO_IMM16_HOWTO_TLS_IE(name, rshift) \ + HOWTO (name, rshift, 1, 16, FALSE, 0, \ + complain_overflow_dont, bfd_elf_generic_reloc, \ + #name, FALSE, 0, 0xffff, TRUE) + + TILEPRO_IMM16_HOWTO_TLS_IE (R_TILEPRO_IMM16_X0_TLS_IE_LO, 0), + TILEPRO_IMM16_HOWTO_TLS_IE (R_TILEPRO_IMM16_X1_TLS_IE_LO, 0), + TILEPRO_IMM16_HOWTO_TLS_IE (R_TILEPRO_IMM16_X0_TLS_IE_HI, 16), + TILEPRO_IMM16_HOWTO_TLS_IE (R_TILEPRO_IMM16_X1_TLS_IE_HI, 16), + TILEPRO_IMM16_HOWTO_TLS_IE (R_TILEPRO_IMM16_X0_TLS_IE_HA, 16), + TILEPRO_IMM16_HOWTO_TLS_IE (R_TILEPRO_IMM16_X1_TLS_IE_HA, 16), + + /* These are common with the Solaris TLS implementation. */ + HOWTO(R_TILEPRO_TLS_DTPMOD32, 0, 0, 0, FALSE, 0, complain_overflow_dont, + bfd_elf_generic_reloc, "R_TILEPRO_TLS_DTPMOD32", + FALSE, 0, 0, TRUE), + HOWTO(R_TILEPRO_TLS_DTPOFF32, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_TILEPRO_TLS_DTPOFF32", + FALSE, 0, 0xFFFFFFFF, TRUE), + HOWTO(R_TILEPRO_TLS_TPOFF32, 0, 0, 0, FALSE, 0, complain_overflow_dont, + bfd_elf_generic_reloc, "R_TILEPRO_TLS_TPOFF32", + FALSE, 0, 0, TRUE) + +}; + +static reloc_howto_type tilepro_elf_howto_table2 [] = +{ + /* GNU extension to record C++ vtable hierarchy */ + HOWTO (R_TILEPRO_GNU_VTINHERIT, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + NULL, /* special_function */ + "R_TILEPRO_GNU_VTINHERIT", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* GNU extension to record C++ vtable member usage */ + HOWTO (R_TILEPRO_GNU_VTENTRY, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_elf_rel_vtable_reloc_fn, /* special_function */ + "R_TILEPRO_GNU_VTENTRY", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ + +}; + +/* Map BFD reloc types to TILEPRO ELF reloc types. */ + +typedef struct tilepro_reloc_map +{ + bfd_reloc_code_real_type bfd_reloc_val; + unsigned int tilepro_reloc_val; + reloc_howto_type * table; +} reloc_map; + +static const reloc_map tilepro_reloc_map [] = +{ +#define TH_REMAP(bfd, tilepro) \ + { bfd, tilepro, tilepro_elf_howto_table }, + + /* Standard relocations. */ + TH_REMAP (BFD_RELOC_NONE, R_TILEPRO_NONE) + TH_REMAP (BFD_RELOC_32, R_TILEPRO_32) + TH_REMAP (BFD_RELOC_16, R_TILEPRO_16) + TH_REMAP (BFD_RELOC_8, R_TILEPRO_8) + TH_REMAP (BFD_RELOC_32_PCREL, R_TILEPRO_32_PCREL) + TH_REMAP (BFD_RELOC_16_PCREL, R_TILEPRO_16_PCREL) + TH_REMAP (BFD_RELOC_8_PCREL, R_TILEPRO_8_PCREL) + TH_REMAP (BFD_RELOC_LO16, R_TILEPRO_LO16) + TH_REMAP (BFD_RELOC_HI16, R_TILEPRO_HI16) + TH_REMAP (BFD_RELOC_HI16_S, R_TILEPRO_HA16) + + /* Custom relocations. */ + TH_REMAP (BFD_RELOC_TILEPRO_COPY, R_TILEPRO_COPY) + TH_REMAP (BFD_RELOC_TILEPRO_GLOB_DAT, R_TILEPRO_GLOB_DAT) + TH_REMAP (BFD_RELOC_TILEPRO_JMP_SLOT, R_TILEPRO_JMP_SLOT) + TH_REMAP (BFD_RELOC_TILEPRO_RELATIVE, R_TILEPRO_RELATIVE) + TH_REMAP (BFD_RELOC_TILEPRO_BROFF_X1, R_TILEPRO_BROFF_X1) + TH_REMAP (BFD_RELOC_TILEPRO_JOFFLONG_X1, R_TILEPRO_JOFFLONG_X1) + TH_REMAP (BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT, R_TILEPRO_JOFFLONG_X1_PLT) + TH_REMAP (BFD_RELOC_TILEPRO_IMM8_X0, R_TILEPRO_IMM8_X0) + TH_REMAP (BFD_RELOC_TILEPRO_IMM8_Y0, R_TILEPRO_IMM8_Y0) + TH_REMAP (BFD_RELOC_TILEPRO_IMM8_X1, R_TILEPRO_IMM8_X1) + TH_REMAP (BFD_RELOC_TILEPRO_IMM8_Y1, R_TILEPRO_IMM8_Y1) + TH_REMAP (BFD_RELOC_TILEPRO_DEST_IMM8_X1, R_TILEPRO_DEST_IMM8_X1) + TH_REMAP (BFD_RELOC_TILEPRO_MT_IMM15_X1, R_TILEPRO_MT_IMM15_X1) + TH_REMAP (BFD_RELOC_TILEPRO_MF_IMM15_X1, R_TILEPRO_MF_IMM15_X1) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0, R_TILEPRO_IMM16_X0) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1, R_TILEPRO_IMM16_X1) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_LO, R_TILEPRO_IMM16_X0_LO) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_LO, R_TILEPRO_IMM16_X1_LO) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_HI, R_TILEPRO_IMM16_X0_HI) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_HI, R_TILEPRO_IMM16_X1_HI) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_HA, R_TILEPRO_IMM16_X0_HA) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_HA, R_TILEPRO_IMM16_X1_HA) + + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_PCREL, R_TILEPRO_IMM16_X0_PCREL) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_PCREL, R_TILEPRO_IMM16_X1_PCREL) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL, R_TILEPRO_IMM16_X0_LO_PCREL) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL, R_TILEPRO_IMM16_X1_LO_PCREL) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL, R_TILEPRO_IMM16_X0_HI_PCREL) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL, R_TILEPRO_IMM16_X1_HI_PCREL) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL, R_TILEPRO_IMM16_X0_HA_PCREL) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL, R_TILEPRO_IMM16_X1_HA_PCREL) + + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_GOT, R_TILEPRO_IMM16_X0_GOT) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_GOT, R_TILEPRO_IMM16_X1_GOT) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO, R_TILEPRO_IMM16_X0_GOT_LO) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO, R_TILEPRO_IMM16_X1_GOT_LO) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI, R_TILEPRO_IMM16_X0_GOT_HI) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI, R_TILEPRO_IMM16_X1_GOT_HI) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA, R_TILEPRO_IMM16_X0_GOT_HA) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA, R_TILEPRO_IMM16_X1_GOT_HA) + + TH_REMAP (BFD_RELOC_TILEPRO_MMSTART_X0, R_TILEPRO_MMSTART_X0) + TH_REMAP (BFD_RELOC_TILEPRO_MMEND_X0, R_TILEPRO_MMEND_X0) + TH_REMAP (BFD_RELOC_TILEPRO_MMSTART_X1, R_TILEPRO_MMSTART_X1) + TH_REMAP (BFD_RELOC_TILEPRO_MMEND_X1, R_TILEPRO_MMEND_X1) + TH_REMAP (BFD_RELOC_TILEPRO_SHAMT_X0, R_TILEPRO_SHAMT_X0) + TH_REMAP (BFD_RELOC_TILEPRO_SHAMT_X1, R_TILEPRO_SHAMT_X1) + TH_REMAP (BFD_RELOC_TILEPRO_SHAMT_Y0, R_TILEPRO_SHAMT_Y0) + TH_REMAP (BFD_RELOC_TILEPRO_SHAMT_Y1, R_TILEPRO_SHAMT_Y1) + + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD, R_TILEPRO_IMM16_X0_TLS_GD) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD, R_TILEPRO_IMM16_X1_TLS_GD) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO, R_TILEPRO_IMM16_X0_TLS_GD_LO) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO, R_TILEPRO_IMM16_X1_TLS_GD_LO) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI, R_TILEPRO_IMM16_X0_TLS_GD_HI) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI, R_TILEPRO_IMM16_X1_TLS_GD_HI) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA, R_TILEPRO_IMM16_X0_TLS_GD_HA) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA, R_TILEPRO_IMM16_X1_TLS_GD_HA) + + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE, R_TILEPRO_IMM16_X0_TLS_IE) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE, R_TILEPRO_IMM16_X1_TLS_IE) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO, R_TILEPRO_IMM16_X0_TLS_IE_LO) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO, R_TILEPRO_IMM16_X1_TLS_IE_LO) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI, R_TILEPRO_IMM16_X0_TLS_IE_HI) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI, R_TILEPRO_IMM16_X1_TLS_IE_HI) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA, R_TILEPRO_IMM16_X0_TLS_IE_HA) + TH_REMAP (BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA, R_TILEPRO_IMM16_X1_TLS_IE_HA) + + TH_REMAP (BFD_RELOC_TILEPRO_TLS_DTPMOD32, R_TILEPRO_TLS_DTPMOD32) + TH_REMAP (BFD_RELOC_TILEPRO_TLS_DTPOFF32, R_TILEPRO_TLS_DTPOFF32) + TH_REMAP (BFD_RELOC_TILEPRO_TLS_TPOFF32, R_TILEPRO_TLS_TPOFF32) + +#undef TH_REMAP + + { BFD_RELOC_VTABLE_INHERIT, R_TILEPRO_GNU_VTINHERIT, tilepro_elf_howto_table2 }, + { BFD_RELOC_VTABLE_ENTRY, R_TILEPRO_GNU_VTENTRY, tilepro_elf_howto_table2 }, +}; + + + +/* The TILEPro linker needs to keep track of the number of relocs that it + decides to copy as dynamic relocs in check_relocs for each symbol. + This is so that it can later discard them if they are found to be + unnecessary. We store the information in a field extending the + regular ELF linker hash table. */ + +struct tilepro_elf_dyn_relocs +{ + struct tilepro_elf_dyn_relocs *next; + + /* The input section of the reloc. */ + asection *sec; + + /* Total number of relocs copied for the input section. */ + bfd_size_type count; + + /* Number of pc-relative relocs copied for the input section. */ + bfd_size_type pc_count; +}; + +/* TILEPRO ELF linker hash entry. */ + +struct tilepro_elf_link_hash_entry +{ + struct elf_link_hash_entry elf; + + /* Track dynamic relocs copied for this symbol. */ + struct tilepro_elf_dyn_relocs *dyn_relocs; + +#define GOT_UNKNOWN 0 +#define GOT_NORMAL 1 +#define GOT_TLS_GD 2 +#define GOT_TLS_IE 4 + unsigned char tls_type; +}; + +#define tilepro_elf_hash_entry(ent) \ + ((struct tilepro_elf_link_hash_entry *)(ent)) + +struct _bfd_tilepro_elf_obj_tdata +{ + struct elf_obj_tdata root; + + /* tls_type for each local got entry. */ + char *local_got_tls_type; +}; + +#define _bfd_tilepro_elf_tdata(abfd) \ + ((struct _bfd_tilepro_elf_obj_tdata *) (abfd)->tdata.any) + +#define _bfd_tilepro_elf_local_got_tls_type(abfd) \ + (_bfd_tilepro_elf_tdata (abfd)->local_got_tls_type) + +#define is_tilepro_elf(bfd) \ + (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ + && elf_tdata (bfd) != NULL \ + && elf_object_id (bfd) == TILEPRO_ELF_DATA) + +#include "elf/common.h" +#include "elf/internal.h" + +struct tilepro_elf_link_hash_table +{ + struct elf_link_hash_table elf; + + /* Short-cuts to get to dynamic linker sections. */ + asection *sdynbss; + asection *srelbss; + + /* Small local sym to section mapping cache. */ + struct sym_cache sym_cache; +}; + +/* Get the Tilepro ELF linker hash table from a link_info structure. */ +#define tilepro_elf_hash_table(p) \ + (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \ + == TILEPRO_ELF_DATA \ + ? ((struct tilepro_elf_link_hash_table *) ((p)->hash)) : NULL) + +static reloc_howto_type * +tilepro_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type code) +{ + unsigned int i; + + for (i = ARRAY_SIZE (tilepro_reloc_map); --i;) + { + const reloc_map * entry; + + entry = tilepro_reloc_map + i; + + if (entry->bfd_reloc_val == code) + return entry->table + (entry->tilepro_reloc_val + - entry->table[0].type); + } + + return NULL; +} + +static reloc_howto_type * +tilepro_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, + const char *r_name) +{ + unsigned int i; + + for (i = 0; + i < (sizeof (tilepro_elf_howto_table) + / sizeof (tilepro_elf_howto_table[0])); + i++) + if (tilepro_elf_howto_table[i].name != NULL + && strcasecmp (tilepro_elf_howto_table[i].name, r_name) == 0) + return &tilepro_elf_howto_table[i]; + + return NULL; +} + +/* Set the howto pointer for an TILEPro ELF reloc. */ + +static void +tilepro_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED, + arelent * cache_ptr, + Elf_Internal_Rela * dst) +{ + unsigned int r_type = ELF32_R_TYPE (dst->r_info); + + if (r_type <= (unsigned int) R_TILEPRO_TLS_TPOFF32) + cache_ptr->howto = &tilepro_elf_howto_table [r_type]; + else if (r_type - R_TILEPRO_GNU_VTINHERIT + <= (unsigned int) R_TILEPRO_GNU_VTENTRY) + cache_ptr->howto + = &tilepro_elf_howto_table2 [r_type - R_TILEPRO_GNU_VTINHERIT]; + else + abort (); +} + +typedef tilepro_bundle_bits (*tilepro_create_func)(int); + +static const tilepro_create_func reloc_to_create_func[] = +{ + /* The first fourteen relocation types don't correspond to operands */ + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + + /* The remaining relocations are used for immediate operands */ + create_BrOff_X1, + create_JOffLong_X1, + create_JOffLong_X1, + create_Imm8_X0, + create_Imm8_Y0, + create_Imm8_X1, + create_Imm8_Y1, + create_MT_Imm15_X1, + create_MF_Imm15_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_MMStart_X0, + create_MMEnd_X0, + create_MMStart_X1, + create_MMEnd_X1, + create_ShAmt_X0, + create_ShAmt_X1, + create_ShAmt_Y0, + create_ShAmt_Y1, + + create_Dest_Imm8_X1, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1 +}; + +#define NELEMS(a) ((int) (sizeof (a) / sizeof ((a)[0]))) + +/* Support for core dump NOTE sections. */ + +static bfd_boolean +tilepro_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) +{ + int offset; + size_t size; + + if (note->descsz != TILEPRO_PRSTATUS_SIZEOF) + return FALSE; + + /* pr_cursig */ + elf_tdata (abfd)->core_signal = + bfd_get_16 (abfd, note->descdata + TILEPRO_PRSTATUS_OFFSET_PR_CURSIG); + + /* pr_pid */ + elf_tdata (abfd)->core_pid = + bfd_get_32 (abfd, note->descdata + TILEPRO_PRSTATUS_OFFSET_PR_PID); + + /* pr_reg */ + offset = TILEPRO_PRSTATUS_OFFSET_PR_REG; + size = TILEPRO_GREGSET_T_SIZE; + + /* Make a ".reg/999" section. */ + return _bfd_elfcore_make_pseudosection (abfd, ".reg", + size, note->descpos + offset); +} + +static bfd_boolean +tilepro_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) +{ + if (note->descsz != TILEPRO_PRPSINFO_SIZEOF) + return FALSE; + + elf_tdata (abfd)->core_program + = _bfd_elfcore_strndup (abfd, + note->descdata + TILEPRO_PRPSINFO_OFFSET_PR_FNAME, + 16); + elf_tdata (abfd)->core_command + = _bfd_elfcore_strndup (abfd, + note->descdata + TILEPRO_PRPSINFO_OFFSET_PR_PSARGS, + ELF_PR_PSARGS_SIZE); + + + /* Note that for some reason, a spurious space is tacked + onto the end of the args in some (at least one anyway) + implementations, so strip it off if it exists. */ + { + char *command = elf_tdata (abfd)->core_command; + int n = strlen (command); + + if (0 < n && command[n - 1] == ' ') + command[n - 1] = '\0'; + } + + return TRUE; +} + + +static void +tilepro_elf_append_rela_32 (bfd *abfd, asection *s, Elf_Internal_Rela *rel) +{ + Elf32_External_Rela *loc32; + + loc32 = (Elf32_External_Rela *) s->contents; + loc32 += s->reloc_count++; + bfd_elf32_swap_reloca_out (abfd, rel, (bfd_byte *) loc32); +} + +/* PLT/GOT stuff */ + +/* The procedure linkage table starts with the following header: + + { + rli r29, r29, 16 + lwadd r28, r27, 4 + } + lw r27, r27 + { + info 10 ## SP not offset, return PC in LR + jr r27 + } + + Subsequent entries are the following, jumping to the header at the end: + + lnk r28 +1: + { + auli r28, r28, <_GLOBAL_OFFSET_TABLE_ - 1b + MY_GOT_OFFSET> + auli r27, r28, <_GLOBAL_OFFSET_TABLE_ - 1b> + } + { + addli r28, r28, <_GLOBAL_OFFSET_TABLE_ - 1b + MY_GOT_OFFSET> + addli r27, r27, <_GLOBAL_OFFSET_TABLE_ - 1b> + } + { + auli r29, zero, MY_PLT_INDEX + lw r28, r28 + } + { + info 10 ## SP not offset, return PC in LR + jr r28 + } + + We initially store MY_PLT_INDEX in the high bits so that we can use the all + 16 bits as an unsigned offset; if we use the low bits we would get an + unwanted sign extension. The PLT header then rotates the index to get the + right value, before calling the resolution routine. This computation can + fit in unused bundle slots so it's free. + + This code sequence lets the code at at the start of the PLT determine + which PLT entry was executed by examining 'r29'. + + Note that MY_PLT_INDEX skips over the header entries, so the first + actual jump table entry has index zero. +*/ + +#define PLT_HEADER_SIZE_IN_BUNDLES 3 +#define PLT_ENTRY_SIZE_IN_BUNDLES 5 + +#define PLT_HEADER_SIZE \ + (PLT_HEADER_SIZE_IN_BUNDLES * TILEPRO_BUNDLE_SIZE_IN_BYTES) +#define PLT_ENTRY_SIZE \ + (PLT_ENTRY_SIZE_IN_BUNDLES * TILEPRO_BUNDLE_SIZE_IN_BYTES) + +/* The size in bytes of an entry in the global offset table. */ + +#define GOT_ENTRY_SIZE TILEPRO_BYTES_PER_WORD + +#define GOTPLT_HEADER_SIZE (2 * GOT_ENTRY_SIZE) + + +static const bfd_byte +tilepro_plt0_entry[PLT_HEADER_SIZE] = +{ + 0x5d, 0x07, 0x03, 0x70, + 0x6e, 0x23, 0xd0, 0x30, /* { rli r29, r29, 16 ; lwadd r28, r27, 4 } */ + 0x00, 0x50, 0xba, 0x6d, + 0x00, 0x08, 0x6d, 0xdc, /* { lw r27, r27 } */ + 0xff, 0xaf, 0x10, 0x50, + 0x60, 0x03, 0x18, 0x08, /* { info 10 ; jr r27 } */ +}; + +static const bfd_byte +tilepro_short_plt_entry[PLT_ENTRY_SIZE] = +{ + 0x00, 0x50, 0x16, 0x70, + 0x0e, 0x00, 0x1a, 0x08, /* { lnk r28 } */ + 0x1c, 0x07, 0x00, 0xa0, + 0x8d, 0x03, 0x00, 0x18, /* { addli r28, r28, 0 ; addli r27, r28, 0 } */ + 0xdd, 0x0f, 0x00, 0x30, + 0x8e, 0x73, 0x0b, 0x40, /* { auli r29, zero, 0 ; lw r28, r28 } */ + 0xff, 0xaf, 0x10, 0x50, + 0x80, 0x03, 0x18, 0x08, /* { info 10 ; jr r28 } */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const bfd_byte +tilepro_long_plt_entry[PLT_ENTRY_SIZE] = +{ + 0x00, 0x50, 0x16, 0x70, + 0x0e, 0x00, 0x1a, 0x08, /* { lnk r28 } */ + 0x1c, 0x07, 0x00, 0xb0, + 0x8d, 0x03, 0x00, 0x20, /* { auli r28, r28, 0 ; auli r27, r28, 0 } */ + 0x1c, 0x07, 0x00, 0xa0, + 0x6d, 0x03, 0x00, 0x18, /* { addli r28, r28, 0 ; addli r27, r27, 0 } */ + 0xdd, 0x0f, 0x00, 0x30, + 0x8e, 0x73, 0x0b, 0x40, /* { auli r29, zero, 0 ; lw r28, r28 } */ + 0xff, 0xaf, 0x10, 0x50, + 0x80, 0x03, 0x18, 0x08, /* { info 10 ; jr r28 } */ +}; + +static bfd_vma +tilepro_ha16(bfd_vma vma) +{ + return ((vma >> 16) + ((vma >> 15) & 1)) & 0xffff; +} + +static int +tilepro_plt_entry_build (asection *splt, asection *sgotplt, bfd_vma offset, + bfd_vma *r_offset) +{ + int plt_index = (offset - PLT_HEADER_SIZE) / PLT_ENTRY_SIZE; + int got_offset = plt_index * GOT_ENTRY_SIZE + GOTPLT_HEADER_SIZE; + tilepro_bundle_bits *pc; + + /* Compute the distance from the got entry to the lnk. */ + bfd_signed_vma dist_got_entry = sgotplt->output_section->vma + + sgotplt->output_offset + + got_offset + - splt->output_section->vma + - splt->output_offset + - offset + - TILEPRO_BUNDLE_SIZE_IN_BYTES; + + /* Compute the distance to GOTPLT[0]. */ + bfd_signed_vma dist_got0 = dist_got_entry - got_offset; + + /* Check whether we can use the short plt entry with 16-bit offset. */ + bfd_boolean short_plt_entry = + (dist_got_entry <= 0x7fff && dist_got0 >= -0x8000); + + /* Copy the plt entry template. */ + memcpy (splt->contents + offset, + short_plt_entry ? tilepro_short_plt_entry : tilepro_long_plt_entry, + PLT_ENTRY_SIZE); + + /* Write the immediate offsets. */ + pc = (tilepro_bundle_bits *)(splt->contents + offset); + pc++; + + if (!short_plt_entry) + { + /* { auli r28, r28, &GOTPLT[MY_GOT_INDEX] ; auli r27, r28, &GOTPLT[0] } */ + *pc++ |= create_Imm16_X0 (tilepro_ha16 (dist_got_entry)) + | create_Imm16_X1 (tilepro_ha16 (dist_got0)); + } + + /* { addli r28, r28, &GOTPLT[MY_GOT_INDEX] ; addli r27, r28, &GOTPLT[0] } or + { addli r28, r28, &GOTPLT[MY_GOT_INDEX] ; addli r27, r27, &GOTPLT[0] } */ + *pc++ |= create_Imm16_X0 (dist_got_entry) + | create_Imm16_X1 (dist_got0); + + /* { auli r29, zero, MY_PLT_INDEX ; lw r28, r28 } */ + *pc |= create_Imm16_X0 (plt_index); + + /* Set the relocation offset. */ + *r_offset = got_offset; + + return plt_index; +} + +#define TILEPRO_ELF_RELA_BYTES (sizeof(Elf32_External_Rela)) + + +/* Create an entry in an TILEPro ELF linker hash table. */ + +static struct bfd_hash_entry * +link_hash_newfunc (struct bfd_hash_entry *entry, + struct bfd_hash_table *table, const char *string) +{ + /* Allocate the structure if it has not already been allocated by a + subclass. */ + if (entry == NULL) + { + entry = + bfd_hash_allocate (table, + sizeof (struct tilepro_elf_link_hash_entry)); + if (entry == NULL) + return entry; + } + + /* Call the allocation method of the superclass. */ + entry = _bfd_elf_link_hash_newfunc (entry, table, string); + if (entry != NULL) + { + struct tilepro_elf_link_hash_entry *eh; + + eh = (struct tilepro_elf_link_hash_entry *) entry; + eh->dyn_relocs = NULL; + eh->tls_type = GOT_UNKNOWN; + } + + return entry; +} + +/* Create a TILEPRO ELF linker hash table. */ + +static struct bfd_link_hash_table * +tilepro_elf_link_hash_table_create (bfd *abfd) +{ + struct tilepro_elf_link_hash_table *ret; + bfd_size_type amt = sizeof (struct tilepro_elf_link_hash_table); + + ret = (struct tilepro_elf_link_hash_table *) bfd_zmalloc (amt); + if (ret == NULL) + return NULL; + + if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc, + sizeof (struct tilepro_elf_link_hash_entry), + TILEPRO_ELF_DATA)) + { + free (ret); + return NULL; + } + + return &ret->elf.root; +} + +/* Create the .got section. */ + +static bfd_boolean +tilepro_elf_create_got_section (bfd *abfd, struct bfd_link_info *info) +{ + flagword flags; + asection *s, *s_got; + struct elf_link_hash_entry *h; + const struct elf_backend_data *bed = get_elf_backend_data (abfd); + struct elf_link_hash_table *htab = elf_hash_table (info); + + /* This function may be called more than once. */ + s = bfd_get_section_by_name (abfd, ".got"); + if (s != NULL && (s->flags & SEC_LINKER_CREATED) != 0) + return TRUE; + + flags = bed->dynamic_sec_flags; + + s = bfd_make_section_with_flags (abfd, + (bed->rela_plts_and_copies_p + ? ".rela.got" : ".rel.got"), + (bed->dynamic_sec_flags + | SEC_READONLY)); + if (s == NULL + || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) + return FALSE; + htab->srelgot = s; + + s = s_got = bfd_make_section_with_flags (abfd, ".got", flags); + if (s == NULL + || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) + return FALSE; + htab->sgot = s; + + /* The first bit of the global offset table is the header. */ + s->size += bed->got_header_size; + + if (bed->want_got_plt) + { + s = bfd_make_section_with_flags (abfd, ".got.plt", flags); + if (s == NULL + || !bfd_set_section_alignment (abfd, s, + bed->s->log_file_align)) + return FALSE; + htab->sgotplt = s; + + /* Reserve room for the header. */ + s->size += GOTPLT_HEADER_SIZE; + } + + if (bed->want_got_sym) + { + /* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got + section. We don't do this in the linker script because we don't want + to define the symbol if we are not creating a global offset + table. */ + h = _bfd_elf_define_linkage_sym (abfd, info, s_got, + "_GLOBAL_OFFSET_TABLE_"); + elf_hash_table (info)->hgot = h; + if (h == NULL) + return FALSE; + } + + return TRUE; +} + +/* Create .plt, .rela.plt, .got, .got.plt, .rela.got, .dynbss, and + .rela.bss sections in DYNOBJ, and set up shortcuts to them in our + hash table. */ + +static bfd_boolean +tilepro_elf_create_dynamic_sections (bfd *dynobj, + struct bfd_link_info *info) +{ + struct tilepro_elf_link_hash_table *htab; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + if (!tilepro_elf_create_got_section (dynobj, info)) + return FALSE; + + if (!_bfd_elf_create_dynamic_sections (dynobj, info)) + return FALSE; + + htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss"); + if (!info->shared) + htab->srelbss = bfd_get_section_by_name (dynobj, ".rela.bss"); + + if (!htab->elf.splt || !htab->elf.srelplt || !htab->sdynbss + || (!info->shared && !htab->srelbss)) + abort (); + + return TRUE; +} + +/* Copy the extra info we tack onto an elf_link_hash_entry. */ + +static void +tilepro_elf_copy_indirect_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *dir, + struct elf_link_hash_entry *ind) +{ + struct tilepro_elf_link_hash_entry *edir, *eind; + + edir = (struct tilepro_elf_link_hash_entry *) dir; + eind = (struct tilepro_elf_link_hash_entry *) ind; + + if (eind->dyn_relocs != NULL) + { + if (edir->dyn_relocs != NULL) + { + struct tilepro_elf_dyn_relocs **pp; + struct tilepro_elf_dyn_relocs *p; + + /* Add reloc counts against the indirect sym to the direct sym + list. Merge any entries against the same section. */ + for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) + { + struct tilepro_elf_dyn_relocs *q; + + for (q = edir->dyn_relocs; q != NULL; q = q->next) + if (q->sec == p->sec) + { + q->pc_count += p->pc_count; + q->count += p->count; + *pp = p->next; + break; + } + if (q == NULL) + pp = &p->next; + } + *pp = edir->dyn_relocs; + } + + edir->dyn_relocs = eind->dyn_relocs; + eind->dyn_relocs = NULL; + } + + if (ind->root.type == bfd_link_hash_indirect + && dir->got.refcount <= 0) + { + edir->tls_type = eind->tls_type; + eind->tls_type = GOT_UNKNOWN; + } + _bfd_elf_link_hash_copy_indirect (info, dir, ind); +} + +/* Look through the relocs for a section during the first phase, and + allocate space in the global offset table or procedure linkage + table. */ + +static bfd_boolean +tilepro_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, + asection *sec, const Elf_Internal_Rela *relocs) +{ + struct tilepro_elf_link_hash_table *htab; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + const Elf_Internal_Rela *rel; + const Elf_Internal_Rela *rel_end; + asection *sreloc; + int num_relocs; + + if (info->relocatable) + return TRUE; + + htab = tilepro_elf_hash_table (info); + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + sym_hashes = elf_sym_hashes (abfd); + + sreloc = NULL; + + num_relocs = sec->reloc_count; + + BFD_ASSERT (is_tilepro_elf (abfd) || num_relocs == 0); + + if (htab->elf.dynobj == NULL) + htab->elf.dynobj = abfd; + + rel_end = relocs + num_relocs; + for (rel = relocs; rel < rel_end; rel++) + { + unsigned int r_type; + unsigned long r_symndx; + struct elf_link_hash_entry *h; + int tls_type; + + r_symndx = ELF32_R_SYM (rel->r_info); + r_type = ELF32_R_TYPE (rel->r_info); + + if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr)) + { + (*_bfd_error_handler) (_("%B: bad symbol index: %d"), + abfd, r_symndx); + return FALSE; + } + + if (r_symndx < symtab_hdr->sh_info) + h = NULL; + else + { + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + } + + switch (r_type) + { + case R_TILEPRO_IMM16_X0_TLS_GD: + case R_TILEPRO_IMM16_X1_TLS_GD: + case R_TILEPRO_IMM16_X0_TLS_GD_LO: + case R_TILEPRO_IMM16_X1_TLS_GD_LO: + case R_TILEPRO_IMM16_X0_TLS_GD_HI: + case R_TILEPRO_IMM16_X1_TLS_GD_HI: + case R_TILEPRO_IMM16_X0_TLS_GD_HA: + case R_TILEPRO_IMM16_X1_TLS_GD_HA: + tls_type = GOT_TLS_GD; + goto have_got_reference; + + case R_TILEPRO_IMM16_X0_TLS_IE: + case R_TILEPRO_IMM16_X1_TLS_IE: + case R_TILEPRO_IMM16_X0_TLS_IE_LO: + case R_TILEPRO_IMM16_X1_TLS_IE_LO: + case R_TILEPRO_IMM16_X0_TLS_IE_HI: + case R_TILEPRO_IMM16_X1_TLS_IE_HI: + case R_TILEPRO_IMM16_X0_TLS_IE_HA: + case R_TILEPRO_IMM16_X1_TLS_IE_HA: + tls_type = GOT_TLS_IE; + if (info->shared) + info->flags |= DF_STATIC_TLS; + goto have_got_reference; + + case R_TILEPRO_IMM16_X0_GOT: + case R_TILEPRO_IMM16_X1_GOT: + case R_TILEPRO_IMM16_X0_GOT_LO: + case R_TILEPRO_IMM16_X1_GOT_LO: + case R_TILEPRO_IMM16_X0_GOT_HI: + case R_TILEPRO_IMM16_X1_GOT_HI: + case R_TILEPRO_IMM16_X0_GOT_HA: + case R_TILEPRO_IMM16_X1_GOT_HA: + tls_type = GOT_NORMAL; + /* Fall Through */ + + have_got_reference: + /* This symbol requires a global offset table entry. */ + { + int old_tls_type; + + if (h != NULL) + { + h->got.refcount += 1; + old_tls_type = tilepro_elf_hash_entry(h)->tls_type; + } + else + { + bfd_signed_vma *local_got_refcounts; + + /* This is a global offset table entry for a local symbol. */ + local_got_refcounts = elf_local_got_refcounts (abfd); + if (local_got_refcounts == NULL) + { + bfd_size_type size; + + size = symtab_hdr->sh_info; + size *= (sizeof (bfd_signed_vma) + sizeof(char)); + local_got_refcounts = ((bfd_signed_vma *) + bfd_zalloc (abfd, size)); + if (local_got_refcounts == NULL) + return FALSE; + elf_local_got_refcounts (abfd) = local_got_refcounts; + _bfd_tilepro_elf_local_got_tls_type (abfd) + = (char *) (local_got_refcounts + symtab_hdr->sh_info); + } + local_got_refcounts[r_symndx] += 1; + old_tls_type = + _bfd_tilepro_elf_local_got_tls_type (abfd) [r_symndx]; + } + + /* If a TLS symbol is accessed using IE at least once, + there is no point to use dynamic model for it. */ + if (old_tls_type != tls_type && old_tls_type != GOT_UNKNOWN + && (old_tls_type != GOT_TLS_GD + || tls_type != GOT_TLS_IE)) + { + if (old_tls_type == GOT_TLS_IE && tls_type == GOT_TLS_GD) + tls_type = old_tls_type; + else + { + (*_bfd_error_handler) + (_("%B: `%s' accessed both as normal and thread local symbol"), + abfd, h ? h->root.root.string : ""); + return FALSE; + } + } + + if (old_tls_type != tls_type) + { + if (h != NULL) + tilepro_elf_hash_entry (h)->tls_type = tls_type; + else + _bfd_tilepro_elf_local_got_tls_type (abfd) [r_symndx] = + tls_type; + } + } + + if (htab->elf.sgot == NULL) + { + if (!tilepro_elf_create_got_section (htab->elf.dynobj, info)) + return FALSE; + } + break; + + case R_TILEPRO_JOFFLONG_X1_PLT: + /* This symbol requires a procedure linkage table entry. We + actually build the entry in adjust_dynamic_symbol, + because this might be a case of linking PIC code without + linking in any dynamic objects, in which case we don't + need to generate a procedure linkage table after all. */ + + if (h != NULL) + { + h->needs_plt = 1; + h->plt.refcount += 1; + } + break; + + case R_TILEPRO_32_PCREL: + case R_TILEPRO_16_PCREL: + case R_TILEPRO_8_PCREL: + case R_TILEPRO_IMM16_X0_PCREL: + case R_TILEPRO_IMM16_X1_PCREL: + case R_TILEPRO_IMM16_X0_LO_PCREL: + case R_TILEPRO_IMM16_X1_LO_PCREL: + case R_TILEPRO_IMM16_X0_HI_PCREL: + case R_TILEPRO_IMM16_X1_HI_PCREL: + case R_TILEPRO_IMM16_X0_HA_PCREL: + case R_TILEPRO_IMM16_X1_HA_PCREL: + if (h != NULL) + h->non_got_ref = 1; + + if (h != NULL + && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + break; + /* Fall through. */ + + case R_TILEPRO_32: + case R_TILEPRO_16: + case R_TILEPRO_8: + case R_TILEPRO_LO16: + case R_TILEPRO_HI16: + case R_TILEPRO_HA16: + case R_TILEPRO_COPY: + case R_TILEPRO_GLOB_DAT: + case R_TILEPRO_JMP_SLOT: + case R_TILEPRO_RELATIVE: + case R_TILEPRO_BROFF_X1: + case R_TILEPRO_JOFFLONG_X1: + case R_TILEPRO_IMM8_X0: + case R_TILEPRO_IMM8_Y0: + case R_TILEPRO_IMM8_X1: + case R_TILEPRO_IMM8_Y1: + case R_TILEPRO_DEST_IMM8_X1: + case R_TILEPRO_MT_IMM15_X1: + case R_TILEPRO_MF_IMM15_X1: + case R_TILEPRO_IMM16_X0: + case R_TILEPRO_IMM16_X1: + case R_TILEPRO_IMM16_X0_LO: + case R_TILEPRO_IMM16_X1_LO: + case R_TILEPRO_IMM16_X0_HI: + case R_TILEPRO_IMM16_X1_HI: + case R_TILEPRO_IMM16_X0_HA: + case R_TILEPRO_IMM16_X1_HA: + case R_TILEPRO_MMSTART_X0: + case R_TILEPRO_MMEND_X0: + case R_TILEPRO_MMSTART_X1: + case R_TILEPRO_MMEND_X1: + case R_TILEPRO_SHAMT_X0: + case R_TILEPRO_SHAMT_X1: + case R_TILEPRO_SHAMT_Y0: + case R_TILEPRO_SHAMT_Y1: + if (h != NULL) + { + h->non_got_ref = 1; + + if (!info->shared) + { + /* We may need a .plt entry if the function this reloc + refers to is in a shared lib. */ + h->plt.refcount += 1; + } + } + + /* If we are creating a shared library, and this is a reloc + against a global symbol, or a non PC relative reloc + against a local symbol, then we need to copy the reloc + into the shared library. However, if we are linking with + -Bsymbolic, we do not need to copy a reloc against a + global symbol which is defined in an object we are + including in the link (i.e., DEF_REGULAR is set). At + this point we have not seen all the input files, so it is + possible that DEF_REGULAR is not set now but will be set + later (it is never cleared). In case of a weak definition, + DEF_REGULAR may be cleared later by a strong definition in + a shared library. We account for that possibility below by + storing information in the relocs_copied field of the hash + table entry. A similar situation occurs when creating + shared libraries and symbol visibility changes render the + symbol local. + + If on the other hand, we are creating an executable, we + may need to keep relocations for symbols satisfied by a + dynamic library if we manage to avoid copy relocs for the + symbol. */ + if ((info->shared + && (sec->flags & SEC_ALLOC) != 0 + && (! tilepro_elf_howto_table[r_type].pc_relative + || (h != NULL + && (! info->symbolic + || h->root.type == bfd_link_hash_defweak + || !h->def_regular)))) + || (!info->shared + && (sec->flags & SEC_ALLOC) != 0 + && h != NULL + && (h->root.type == bfd_link_hash_defweak + || !h->def_regular))) + { + struct tilepro_elf_dyn_relocs *p; + struct tilepro_elf_dyn_relocs **head; + + /* When creating a shared object, we must copy these + relocs into the output file. We create a reloc + section in dynobj and make room for the reloc. */ + if (sreloc == NULL) + { + sreloc = _bfd_elf_make_dynamic_reloc_section + (sec, htab->elf.dynobj, 2, abfd, /*rela?*/ TRUE); + + if (sreloc == NULL) + return FALSE; + } + + /* If this is a global symbol, we count the number of + relocations we need for this symbol. */ + if (h != NULL) + head = + &((struct tilepro_elf_link_hash_entry *) h)->dyn_relocs; + else + { + /* Track dynamic relocs needed for local syms too. + We really need local syms available to do this + easily. Oh well. */ + + asection *s; + void *vpp; + Elf_Internal_Sym *isym; + + isym = bfd_sym_from_r_symndx (&htab->sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; + + s = bfd_section_from_elf_index (abfd, isym->st_shndx); + if (s == NULL) + s = sec; + + vpp = &elf_section_data (s)->local_dynrel; + head = (struct tilepro_elf_dyn_relocs **) vpp; + } + + p = *head; + if (p == NULL || p->sec != sec) + { + bfd_size_type amt = sizeof *p; + p = ((struct tilepro_elf_dyn_relocs *) + bfd_alloc (htab->elf.dynobj, amt)); + if (p == NULL) + return FALSE; + p->next = *head; + *head = p; + p->sec = sec; + p->count = 0; + p->pc_count = 0; + } + + p->count += 1; + if (tilepro_elf_howto_table[r_type].pc_relative) + p->pc_count += 1; + } + + break; + + case R_TILEPRO_GNU_VTINHERIT: + if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) + return FALSE; + break; + + case R_TILEPRO_GNU_VTENTRY: + if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend)) + return FALSE; + break; + + default: + break; + } + } + + return TRUE; +} + + +static asection * +tilepro_elf_gc_mark_hook (asection *sec, + struct bfd_link_info *info, + Elf_Internal_Rela *rel, + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) +{ + if (h != NULL) + { + switch (ELF32_R_TYPE (rel->r_info)) + { + case R_TILEPRO_GNU_VTINHERIT: + case R_TILEPRO_GNU_VTENTRY: + break; + } + } + + return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); +} + +/* Update the got entry reference counts for the section being removed. */ +static bfd_boolean +tilepro_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, + asection *sec, const Elf_Internal_Rela *relocs) +{ + struct tilepro_elf_link_hash_table *htab; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + bfd_signed_vma *local_got_refcounts; + const Elf_Internal_Rela *rel, *relend; + + if (info->relocatable) + return TRUE; + + BFD_ASSERT (is_tilepro_elf (abfd) || sec->reloc_count == 0); + + elf_section_data (sec)->local_dynrel = NULL; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + symtab_hdr = &elf_symtab_hdr (abfd); + sym_hashes = elf_sym_hashes (abfd); + local_got_refcounts = elf_local_got_refcounts (abfd); + + relend = relocs + sec->reloc_count; + for (rel = relocs; rel < relend; rel++) + { + unsigned long r_symndx; + unsigned int r_type; + struct elf_link_hash_entry *h = NULL; + + r_symndx = ELF32_R_SYM (rel->r_info); + if (r_symndx >= symtab_hdr->sh_info) + { + struct tilepro_elf_link_hash_entry *eh; + struct tilepro_elf_dyn_relocs **pp; + struct tilepro_elf_dyn_relocs *p; + + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + eh = (struct tilepro_elf_link_hash_entry *) h; + for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next) + if (p->sec == sec) + { + /* Everything must go for SEC. */ + *pp = p->next; + break; + } + } + + r_type = ELF32_R_TYPE (rel->r_info); + switch (r_type) + { + case R_TILEPRO_IMM16_X0_GOT: + case R_TILEPRO_IMM16_X1_GOT: + case R_TILEPRO_IMM16_X0_GOT_LO: + case R_TILEPRO_IMM16_X1_GOT_LO: + case R_TILEPRO_IMM16_X0_GOT_HI: + case R_TILEPRO_IMM16_X1_GOT_HI: + case R_TILEPRO_IMM16_X0_GOT_HA: + case R_TILEPRO_IMM16_X1_GOT_HA: + case R_TILEPRO_IMM16_X0_TLS_GD: + case R_TILEPRO_IMM16_X1_TLS_GD: + case R_TILEPRO_IMM16_X0_TLS_GD_LO: + case R_TILEPRO_IMM16_X1_TLS_GD_LO: + case R_TILEPRO_IMM16_X0_TLS_GD_HI: + case R_TILEPRO_IMM16_X1_TLS_GD_HI: + case R_TILEPRO_IMM16_X0_TLS_GD_HA: + case R_TILEPRO_IMM16_X1_TLS_GD_HA: + case R_TILEPRO_IMM16_X0_TLS_IE: + case R_TILEPRO_IMM16_X1_TLS_IE: + case R_TILEPRO_IMM16_X0_TLS_IE_LO: + case R_TILEPRO_IMM16_X1_TLS_IE_LO: + case R_TILEPRO_IMM16_X0_TLS_IE_HI: + case R_TILEPRO_IMM16_X1_TLS_IE_HI: + case R_TILEPRO_IMM16_X0_TLS_IE_HA: + case R_TILEPRO_IMM16_X1_TLS_IE_HA: + if (h != NULL) + { + if (h->got.refcount > 0) + h->got.refcount--; + } + else + { + if (local_got_refcounts[r_symndx] > 0) + local_got_refcounts[r_symndx]--; + } + break; + + case R_TILEPRO_32_PCREL: + case R_TILEPRO_16_PCREL: + case R_TILEPRO_8_PCREL: + case R_TILEPRO_IMM16_X0_PCREL: + case R_TILEPRO_IMM16_X1_PCREL: + case R_TILEPRO_IMM16_X0_LO_PCREL: + case R_TILEPRO_IMM16_X1_LO_PCREL: + case R_TILEPRO_IMM16_X0_HI_PCREL: + case R_TILEPRO_IMM16_X1_HI_PCREL: + case R_TILEPRO_IMM16_X0_HA_PCREL: + case R_TILEPRO_IMM16_X1_HA_PCREL: + if (h != NULL + && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + break; + /* Fall through. */ + + case R_TILEPRO_32: + case R_TILEPRO_16: + case R_TILEPRO_8: + case R_TILEPRO_LO16: + case R_TILEPRO_HI16: + case R_TILEPRO_HA16: + case R_TILEPRO_COPY: + case R_TILEPRO_GLOB_DAT: + case R_TILEPRO_JMP_SLOT: + case R_TILEPRO_RELATIVE: + case R_TILEPRO_BROFF_X1: + case R_TILEPRO_JOFFLONG_X1: + case R_TILEPRO_IMM8_X0: + case R_TILEPRO_IMM8_Y0: + case R_TILEPRO_IMM8_X1: + case R_TILEPRO_IMM8_Y1: + case R_TILEPRO_DEST_IMM8_X1: + case R_TILEPRO_MT_IMM15_X1: + case R_TILEPRO_MF_IMM15_X1: + case R_TILEPRO_IMM16_X0: + case R_TILEPRO_IMM16_X1: + case R_TILEPRO_IMM16_X0_LO: + case R_TILEPRO_IMM16_X1_LO: + case R_TILEPRO_IMM16_X0_HI: + case R_TILEPRO_IMM16_X1_HI: + case R_TILEPRO_IMM16_X0_HA: + case R_TILEPRO_IMM16_X1_HA: + case R_TILEPRO_MMSTART_X0: + case R_TILEPRO_MMEND_X0: + case R_TILEPRO_MMSTART_X1: + case R_TILEPRO_MMEND_X1: + case R_TILEPRO_SHAMT_X0: + case R_TILEPRO_SHAMT_X1: + case R_TILEPRO_SHAMT_Y0: + case R_TILEPRO_SHAMT_Y1: + if (info->shared) + break; + /* Fall through. */ + + case R_TILEPRO_JOFFLONG_X1_PLT: + if (h != NULL) + { + if (h->plt.refcount > 0) + h->plt.refcount--; + } + break; + + default: + break; + } + } + + return TRUE; +} + +/* Adjust a symbol defined by a dynamic object and referenced by a + regular object. The current definition is in some section of the + dynamic object, but we're not including those sections. We have to + change the definition to something the rest of the link can + understand. */ + +static bfd_boolean +tilepro_elf_adjust_dynamic_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *h) +{ + struct tilepro_elf_link_hash_table *htab; + struct tilepro_elf_link_hash_entry * eh; + struct tilepro_elf_dyn_relocs *p; + asection *s; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + /* Make sure we know what is going on here. */ + BFD_ASSERT (htab->elf.dynobj != NULL + && (h->needs_plt + || h->u.weakdef != NULL + || (h->def_dynamic + && h->ref_regular + && !h->def_regular))); + + /* If this is a function, put it in the procedure linkage table. We + will fill in the contents of the procedure linkage table later + (although we could actually do it here). */ + if (h->type == STT_FUNC || h->needs_plt) + { + if (h->plt.refcount <= 0 + || SYMBOL_CALLS_LOCAL (info, h) + || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT + && h->root.type == bfd_link_hash_undefweak)) + { + /* This case can occur if we saw a R_TILEPRO_JOFFLONG_X1_PLT + reloc in an input file, but the symbol was never referred + to by a dynamic object, or if all references were garbage + collected. In such a case, we don't actually need to build + a procedure linkage table, and we can just do a + R_TILEPRO_JOFFLONG_X1 relocation instead. */ + h->plt.offset = (bfd_vma) -1; + h->needs_plt = 0; + } + + return TRUE; + } + else + h->plt.offset = (bfd_vma) -1; + + /* If this is a weak symbol, and there is a real definition, the + processor independent code will have arranged for us to see the + real definition first, and we can just use the same value. */ + if (h->u.weakdef != NULL) + { + BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined + || h->u.weakdef->root.type == bfd_link_hash_defweak); + h->root.u.def.section = h->u.weakdef->root.u.def.section; + h->root.u.def.value = h->u.weakdef->root.u.def.value; + return TRUE; + } + + /* This is a reference to a symbol defined by a dynamic object which + is not a function. */ + + /* If we are creating a shared library, we must presume that the + only references to the symbol are via the global offset table. + For such cases we need not do anything here; the relocations will + be handled correctly by relocate_section. */ + if (info->shared) + return TRUE; + + /* If there are no references to this symbol that do not use the + GOT, we don't need to generate a copy reloc. */ + if (!h->non_got_ref) + return TRUE; + + /* If -z nocopyreloc was given, we won't generate them either. */ + if (info->nocopyreloc) + { + h->non_got_ref = 0; + return TRUE; + } + + eh = (struct tilepro_elf_link_hash_entry *) h; + for (p = eh->dyn_relocs; p != NULL; p = p->next) + { + s = p->sec->output_section; + if (s != NULL && (s->flags & SEC_READONLY) != 0) + break; + } + + /* If we didn't find any dynamic relocs in read-only sections, then + we'll be keeping the dynamic relocs and avoiding the copy reloc. */ + if (p == NULL) + { + h->non_got_ref = 0; + return TRUE; + } + + if (h->size == 0) + { + (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"), + h->root.root.string); + return TRUE; + } + + /* We must allocate the symbol in our .dynbss section, which will + become part of the .bss section of the executable. There will be + an entry for this symbol in the .dynsym section. The dynamic + object will contain position independent code, so all references + from the dynamic object to this symbol will go through the global + offset table. The dynamic linker will use the .dynsym entry to + determine the address it must put in the global offset table, so + both the dynamic object and the regular object will refer to the + same memory location for the variable. */ + + /* We must generate a R_TILEPRO_COPY reloc to tell the dynamic linker + to copy the initial value out of the dynamic object and into the + runtime process image. We need to remember the offset into the + .rel.bss section we are going to use. */ + if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) + { + htab->srelbss->size += TILEPRO_ELF_RELA_BYTES; + h->needs_copy = 1; + } + + return _bfd_elf_adjust_dynamic_copy (h, htab->sdynbss); +} + +/* Allocate space in .plt, .got and associated reloc sections for + dynamic relocs. */ + +static bfd_boolean +allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) +{ + struct bfd_link_info *info; + struct tilepro_elf_link_hash_table *htab; + struct tilepro_elf_link_hash_entry *eh; + struct tilepro_elf_dyn_relocs *p; + + if (h->root.type == bfd_link_hash_indirect) + return TRUE; + + info = (struct bfd_link_info *) inf; + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + if (htab->elf.dynamic_sections_created + && h->plt.refcount > 0) + { + /* Make sure this symbol is output as a dynamic symbol. + Undefined weak syms won't yet be marked as dynamic. */ + if (h->dynindx == -1 + && !h->forced_local) + { + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + return FALSE; + } + + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, info->shared, h)) + { + asection *s = htab->elf.splt; + + /* Allocate room for the header. */ + if (s->size == 0) + { + s->size = PLT_HEADER_SIZE; + } + + h->plt.offset = s->size; + + /* If this symbol is not defined in a regular file, and we are + not generating a shared library, then set the symbol to this + location in the .plt. This is required to make function + pointers compare as equal between the normal executable and + the shared library. */ + if (! info->shared + && !h->def_regular) + { + h->root.u.def.section = s; + h->root.u.def.value = h->plt.offset; + } + + /* Make room for this entry. */ + s->size += PLT_ENTRY_SIZE; + + /* We also need to make an entry in the .got.plt section. */ + htab->elf.sgotplt->size += GOT_ENTRY_SIZE; + + /* We also need to make an entry in the .rela.plt section. */ + htab->elf.srelplt->size += TILEPRO_ELF_RELA_BYTES; + } + else + { + h->plt.offset = (bfd_vma) -1; + h->needs_plt = 0; + } + } + else + { + h->plt.offset = (bfd_vma) -1; + h->needs_plt = 0; + } + + if (h->got.refcount > 0) + { + asection *s; + bfd_boolean dyn; + int tls_type = tilepro_elf_hash_entry(h)->tls_type; + + /* Make sure this symbol is output as a dynamic symbol. + Undefined weak syms won't yet be marked as dynamic. */ + if (h->dynindx == -1 + && !h->forced_local) + { + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + return FALSE; + } + + s = htab->elf.sgot; + h->got.offset = s->size; + s->size += TILEPRO_BYTES_PER_WORD; + /* R_TILEPRO_IMM16_Xn_TLS_GD entries need 2 consecutive GOT slots. */ + if (tls_type == GOT_TLS_GD) + s->size += TILEPRO_BYTES_PER_WORD; + dyn = htab->elf.dynamic_sections_created; + /* R_TILEPRO_IMM16_Xn_TLS_IE_xxx needs one dynamic relocation, + R_TILEPRO_IMM16_Xn_TLS_GD_xxx needs two if local symbol and two if + global. */ + if (tls_type == GOT_TLS_GD || tls_type == GOT_TLS_IE) + htab->elf.srelgot->size += 2 * TILEPRO_ELF_RELA_BYTES; + else if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)) + htab->elf.srelgot->size += TILEPRO_ELF_RELA_BYTES; + } + else + h->got.offset = (bfd_vma) -1; + + eh = (struct tilepro_elf_link_hash_entry *) h; + if (eh->dyn_relocs == NULL) + return TRUE; + + /* In the shared -Bsymbolic case, discard space allocated for + dynamic pc-relative relocs against symbols which turn out to be + defined in regular objects. For the normal shared case, discard + space for pc-relative relocs that have become local due to symbol + visibility changes. */ + + if (info->shared) + { + if (SYMBOL_CALLS_LOCAL (info, h)) + { + struct tilepro_elf_dyn_relocs **pp; + + for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) + { + p->count -= p->pc_count; + p->pc_count = 0; + if (p->count == 0) + *pp = p->next; + else + pp = &p->next; + } + } + + /* Also discard relocs on undefined weak syms with non-default + visibility. */ + if (eh->dyn_relocs != NULL + && h->root.type == bfd_link_hash_undefweak) + { + if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) + eh->dyn_relocs = NULL; + + /* Make sure undefined weak symbols are output as a dynamic + symbol in PIEs. */ + else if (h->dynindx == -1 + && !h->forced_local) + { + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + return FALSE; + } + } + } + else + { + /* For the non-shared case, discard space for relocs against + symbols which turn out to need copy relocs or are not + dynamic. */ + + if (!h->non_got_ref + && ((h->def_dynamic + && !h->def_regular) + || (htab->elf.dynamic_sections_created + && (h->root.type == bfd_link_hash_undefweak + || h->root.type == bfd_link_hash_undefined)))) + { + /* Make sure this symbol is output as a dynamic symbol. + Undefined weak syms won't yet be marked as dynamic. */ + if (h->dynindx == -1 + && !h->forced_local) + { + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + return FALSE; + } + + /* If that succeeded, we know we'll be keeping all the + relocs. */ + if (h->dynindx != -1) + goto keep; + } + + eh->dyn_relocs = NULL; + + keep: ; + } + + /* Finally, allocate space. */ + for (p = eh->dyn_relocs; p != NULL; p = p->next) + { + asection *sreloc = elf_section_data (p->sec)->sreloc; + sreloc->size += p->count * TILEPRO_ELF_RELA_BYTES; + } + + return TRUE; +} + +/* Find any dynamic relocs that apply to read-only sections. */ + +static bfd_boolean +readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) +{ + struct tilepro_elf_link_hash_entry *eh; + struct tilepro_elf_dyn_relocs *p; + + eh = (struct tilepro_elf_link_hash_entry *) h; + for (p = eh->dyn_relocs; p != NULL; p = p->next) + { + asection *s = p->sec->output_section; + + if (s != NULL && (s->flags & SEC_READONLY) != 0) + { + struct bfd_link_info *info = (struct bfd_link_info *) inf; + + info->flags |= DF_TEXTREL; + + /* Not an error, just cut short the traversal. */ + return FALSE; + } + } + return TRUE; +} + +/* Return true if the dynamic symbol for a given section should be + omitted when creating a shared library. */ + +static bfd_boolean +tilepro_elf_omit_section_dynsym (bfd *output_bfd, + struct bfd_link_info *info, + asection *p) +{ + /* We keep the .got section symbol so that explicit relocations + against the _GLOBAL_OFFSET_TABLE_ symbol emitted in PIC mode + can be turned into relocations against the .got symbol. */ + if (strcmp (p->name, ".got") == 0) + return FALSE; + + return _bfd_elf_link_omit_section_dynsym (output_bfd, info, p); +} + +/* Set the sizes of the dynamic sections. */ + +#define ELF32_DYNAMIC_INTERPRETER "/lib/ld.so.1" + +static bfd_boolean +tilepro_elf_size_dynamic_sections (bfd *output_bfd, + struct bfd_link_info *info) +{ + (void)output_bfd; + + struct tilepro_elf_link_hash_table *htab; + bfd *dynobj; + asection *s; + bfd *ibfd; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; + BFD_ASSERT (dynobj != NULL); + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* Set the contents of the .interp section to the interpreter. */ + if (info->executable) + { + s = bfd_get_section_by_name (dynobj, ".interp"); + BFD_ASSERT (s != NULL); + s->size = sizeof ELF32_DYNAMIC_INTERPRETER; + s->contents = (unsigned char *) ELF32_DYNAMIC_INTERPRETER; + } + } + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ + for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) + { + bfd_signed_vma *local_got; + bfd_signed_vma *end_local_got; + char *local_tls_type; + bfd_size_type locsymcount; + Elf_Internal_Shdr *symtab_hdr; + asection *srel; + + if (! is_tilepro_elf (ibfd)) + continue; + + for (s = ibfd->sections; s != NULL; s = s->next) + { + struct tilepro_elf_dyn_relocs *p; + + for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next) + { + if (!bfd_is_abs_section (p->sec) + && bfd_is_abs_section (p->sec->output_section)) + { + /* Input section has been discarded, either because + it is a copy of a linkonce section or due to + linker script /DISCARD/, so we'll be discarding + the relocs too. */ + } + else if (p->count != 0) + { + srel = elf_section_data (p->sec)->sreloc; + srel->size += p->count * TILEPRO_ELF_RELA_BYTES; + if ((p->sec->output_section->flags & SEC_READONLY) != 0) + info->flags |= DF_TEXTREL; + } + } + } + + local_got = elf_local_got_refcounts (ibfd); + if (!local_got) + continue; + + symtab_hdr = &elf_symtab_hdr (ibfd); + locsymcount = symtab_hdr->sh_info; + end_local_got = local_got + locsymcount; + local_tls_type = _bfd_tilepro_elf_local_got_tls_type (ibfd); + s = htab->elf.sgot; + srel = htab->elf.srelgot; + for (; local_got < end_local_got; ++local_got, ++local_tls_type) + { + if (*local_got > 0) + { + *local_got = s->size; + s->size += TILEPRO_BYTES_PER_WORD; + if (*local_tls_type == GOT_TLS_GD) + s->size += TILEPRO_BYTES_PER_WORD; + if (info->shared + || *local_tls_type == GOT_TLS_GD + || *local_tls_type == GOT_TLS_IE) + srel->size += TILEPRO_ELF_RELA_BYTES; + } + else + *local_got = (bfd_vma) -1; + } + } + + /* Allocate global sym .plt and .got entries, and space for global + sym dynamic relocs. */ + elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, info); + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* If the .got section is more than 0x8000 bytes, we add + 0x8000 to the value of _GLOBAL_OFFSET_TABLE_, so that 16 + bit relocations have a greater chance of working. */ + if (htab->elf.sgot->size >= 0x8000 + && elf_hash_table (info)->hgot->root.u.def.value == 0) + elf_hash_table (info)->hgot->root.u.def.value = 0x8000; + } + + if (htab->elf.sgotplt) + { + struct elf_link_hash_entry *got; + got = elf_link_hash_lookup (elf_hash_table (info), + "_GLOBAL_OFFSET_TABLE_", + FALSE, FALSE, FALSE); + + /* Don't allocate .got.plt section if there are no GOT nor PLT + entries and there is no refeence to _GLOBAL_OFFSET_TABLE_. */ + if ((got == NULL + || !got->ref_regular_nonweak) + && (htab->elf.sgotplt->size + == GOTPLT_HEADER_SIZE) + && (htab->elf.splt == NULL + || htab->elf.splt->size == 0) + && (htab->elf.sgot == NULL + || (htab->elf.sgot->size + == get_elf_backend_data (output_bfd)->got_header_size))) + htab->elf.sgotplt->size = 0; + } + + /* The check_relocs and adjust_dynamic_symbol entry points have + determined the sizes of the various dynamic sections. Allocate + memory for them. */ + for (s = dynobj->sections; s != NULL; s = s->next) + { + if ((s->flags & SEC_LINKER_CREATED) == 0) + continue; + + if (s == htab->elf.splt + || s == htab->elf.sgot + || s == htab->elf.sgotplt + || s == htab->sdynbss) + { + /* Strip this section if we don't need it; see the + comment below. */ + } + else if (strncmp (s->name, ".rela", 5) == 0) + { + if (s->size != 0) + { + /* We use the reloc_count field as a counter if we need + to copy relocs into the output file. */ + s->reloc_count = 0; + } + } + else + { + /* It's not one of our sections. */ + continue; + } + + if (s->size == 0) + { + /* If we don't need this section, strip it from the + output file. This is mostly to handle .rela.bss and + .rela.plt. We must create both sections in + create_dynamic_sections, because they must be created + before the linker maps input sections to output + sections. The linker does that before + adjust_dynamic_symbol is called, and it is that + function which decides whether anything needs to go + into these sections. */ + s->flags |= SEC_EXCLUDE; + continue; + } + + if ((s->flags & SEC_HAS_CONTENTS) == 0) + continue; + + /* Allocate memory for the section contents. Zero the memory + for the benefit of .rela.plt, which has 4 unused entries + at the beginning, and we don't want garbage. */ + s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size); + if (s->contents == NULL) + return FALSE; + } + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* Add some entries to the .dynamic section. We fill in the + values later, in tilepro_elf_finish_dynamic_sections, but we + must add the entries now so that we get the correct size for + the .dynamic section. The DT_DEBUG entry is filled in by the + dynamic linker and used by the debugger. */ +#define add_dynamic_entry(TAG, VAL) \ + _bfd_elf_add_dynamic_entry (info, TAG, VAL) + + if (info->executable) + { + if (!add_dynamic_entry (DT_DEBUG, 0)) + return FALSE; + } + + if (htab->elf.srelplt->size != 0) + { + if (!add_dynamic_entry (DT_PLTGOT, 0) + || !add_dynamic_entry (DT_PLTRELSZ, 0) + || !add_dynamic_entry (DT_PLTREL, DT_RELA) + || !add_dynamic_entry (DT_JMPREL, 0)) + return FALSE; + } + + if (!add_dynamic_entry (DT_RELA, 0) + || !add_dynamic_entry (DT_RELASZ, 0) + || !add_dynamic_entry (DT_RELAENT, TILEPRO_ELF_RELA_BYTES)) + return FALSE; + + /* If any dynamic relocs apply to a read-only section, + then we need a DT_TEXTREL entry. */ + if ((info->flags & DF_TEXTREL) == 0) + elf_link_hash_traverse (&htab->elf, readonly_dynrelocs, info); + + if (info->flags & DF_TEXTREL) + { + if (!add_dynamic_entry (DT_TEXTREL, 0)) + return FALSE; + } + } +#undef add_dynamic_entry + + return TRUE; +} + +/* Return the base VMA address which should be subtracted from real addresses + when resolving @dtpoff relocation. + This is PT_TLS segment p_vaddr. */ + +static bfd_vma +dtpoff_base (struct bfd_link_info *info) +{ + /* If tls_sec is NULL, we should have signalled an error already. */ + if (elf_hash_table (info)->tls_sec == NULL) + return 0; + return elf_hash_table (info)->tls_sec->vma; +} + +/* Return the relocation value for R_TILEPRO_TLS_TPOFF32. */ + +static bfd_vma +tpoff (struct bfd_link_info *info, bfd_vma address) +{ + struct elf_link_hash_table *htab = elf_hash_table (info); + + /* If tls_sec is NULL, we should have signalled an error already. */ + if (htab->tls_sec == NULL) + return 0; + + return (address - htab->tls_sec->vma); +} + +/* Relocate an TILEPRO ELF section. + + The RELOCATE_SECTION function is called by the new ELF backend linker + to handle the relocations for a section. + + The relocs are always passed as Rela structures. + + This function is responsible for adjusting the section contents as + necessary, and (if generating a relocatable output file) adjusting + the reloc addend as necessary. + + This function does not have to worry about setting the reloc + address or the reloc symbol index. + + LOCAL_SYMS is a pointer to the swapped in local symbols. + + LOCAL_SECTIONS is an array giving the section in the input file + corresponding to the st_shndx field of each local symbol. + + The global hash table entry for the global symbols can be found + via elf_sym_hashes (input_bfd). + + When generating relocatable output, this function must handle + STB_LOCAL/STT_SECTION symbols specially. The output symbol is + going to be the section symbol corresponding to the output + section, which means that the addend must be adjusted + accordingly. */ + +static bfd_boolean +tilepro_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, + bfd *input_bfd, asection *input_section, + bfd_byte *contents, Elf_Internal_Rela *relocs, + Elf_Internal_Sym *local_syms, + asection **local_sections) +{ + struct tilepro_elf_link_hash_table *htab; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + bfd_vma *local_got_offsets; + bfd_vma got_base; + asection *sreloc; + Elf_Internal_Rela *rel; + Elf_Internal_Rela *relend; + int num_relocs; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + symtab_hdr = &elf_symtab_hdr (input_bfd); + sym_hashes = elf_sym_hashes (input_bfd); + local_got_offsets = elf_local_got_offsets (input_bfd); + + if (elf_hash_table (info)->hgot == NULL) + got_base = 0; + else + got_base = elf_hash_table (info)->hgot->root.u.def.value; + + sreloc = elf_section_data (input_section)->sreloc; + + rel = relocs; + num_relocs = input_section->reloc_count; + relend = relocs + num_relocs; + for (; rel < relend; rel++) + { + int r_type, tls_type; + reloc_howto_type *howto; + unsigned long r_symndx; + struct elf_link_hash_entry *h; + Elf_Internal_Sym *sym; + tilepro_create_func create_func; + asection *sec; + bfd_vma relocation; + bfd_reloc_status_type r; + const char *name; + bfd_vma off; + bfd_boolean is_plt = FALSE; + + bfd_boolean unresolved_reloc; + + r_type = ELF32_R_TYPE (rel->r_info); + if (r_type == R_TILEPRO_GNU_VTINHERIT + || r_type == R_TILEPRO_GNU_VTENTRY) + continue; + + if ((unsigned int)r_type >= NELEMS(tilepro_elf_howto_table)) + { + /* Not clear if we need to check here, but just be paranoid. */ + (*_bfd_error_handler) + (_("%B: unrecognized relocation (0x%x) in section `%A'"), + input_bfd, r_type, input_section); + bfd_set_error (bfd_error_bad_value); + return FALSE; + } + + howto = tilepro_elf_howto_table + r_type; + + /* This is a final link. */ + r_symndx = ELF32_R_SYM (rel->r_info); + h = NULL; + sym = NULL; + sec = NULL; + unresolved_reloc = FALSE; + if (r_symndx < symtab_hdr->sh_info) + { + sym = local_syms + r_symndx; + sec = local_sections[r_symndx]; + relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); + } + else + { + bfd_boolean warned; + + RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, + r_symndx, symtab_hdr, sym_hashes, + h, sec, relocation, + unresolved_reloc, warned); + if (warned) + { + /* To avoid generating warning messages about truncated + relocations, set the relocation's address to be the same as + the start of this section. */ + if (input_section->output_section != NULL) + relocation = input_section->output_section->vma; + else + relocation = 0; + } + } + + if (sec != NULL && elf_discarded_section (sec)) + RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, + rel, relend, howto, contents); + + if (info->relocatable) + continue; + + if (h != NULL) + name = h->root.root.string; + else + { + name = (bfd_elf_string_from_elf_section + (input_bfd, symtab_hdr->sh_link, sym->st_name)); + if (name == NULL || *name == '\0') + name = bfd_section_name (input_bfd, sec); + } + + switch (r_type) + { + case R_TILEPRO_IMM16_X0_GOT: + case R_TILEPRO_IMM16_X1_GOT: + case R_TILEPRO_IMM16_X0_GOT_LO: + case R_TILEPRO_IMM16_X1_GOT_LO: + case R_TILEPRO_IMM16_X0_GOT_HI: + case R_TILEPRO_IMM16_X1_GOT_HI: + case R_TILEPRO_IMM16_X0_GOT_HA: + case R_TILEPRO_IMM16_X1_GOT_HA: + /* Relocation is to the entry for this symbol in the global + offset table. */ + if (htab->elf.sgot == NULL) + abort (); + + if (h != NULL) + { + bfd_boolean dyn; + + off = h->got.offset; + BFD_ASSERT (off != (bfd_vma) -1); + dyn = elf_hash_table (info)->dynamic_sections_created; + + if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) + || (info->shared + && SYMBOL_REFERENCES_LOCAL (info, h))) + { + /* This is actually a static link, or it is a + -Bsymbolic link and the symbol is defined + locally, or the symbol was forced to be local + because of a version file. We must initialize + this entry in the global offset table. Since the + offset must always be a multiple + of 4 for 32-bit, we use the least significant bit + to record whether we have initialized it already. + + When doing a dynamic link, we create a .rela.got + relocation entry to initialize the value. This + is done in the finish_dynamic_symbol routine. */ + if ((off & 1) != 0) + off &= ~1; + else + { + bfd_put_32 (output_bfd, relocation, + htab->elf.sgot->contents + off); + h->got.offset |= 1; + } + } + else + unresolved_reloc = FALSE; + } + else + { + BFD_ASSERT (local_got_offsets != NULL + && local_got_offsets[r_symndx] != (bfd_vma) -1); + + off = local_got_offsets[r_symndx]; + + /* The offset must always be a multiple of 4 on 32-bit. + We use the least significant bit to record + whether we have already processed this entry. */ + if ((off & 1) != 0) + off &= ~1; + else + { + if (info->shared) + { + asection *s; + Elf_Internal_Rela outrel; + + /* We need to generate a R_TILEPRO_RELATIVE reloc + for the dynamic linker. */ + s = htab->elf.srelgot; + BFD_ASSERT (s != NULL); + + outrel.r_offset = (htab->elf.sgot->output_section->vma + + htab->elf.sgot->output_offset + + off); + outrel.r_info = ELF32_R_INFO (0, R_TILEPRO_RELATIVE); + outrel.r_addend = relocation; + relocation = 0; + tilepro_elf_append_rela_32 (output_bfd, s, &outrel); + } + + bfd_put_32 (output_bfd, relocation, + htab->elf.sgot->contents + off); + local_got_offsets[r_symndx] |= 1; + } + } + relocation = htab->elf.sgot->output_offset + off - got_base; + break; + + case R_TILEPRO_JOFFLONG_X1_PLT: + /* Relocation is to the entry for this symbol in the + procedure linkage table. */ + BFD_ASSERT (h != NULL); + + if (h->plt.offset == (bfd_vma) -1 || htab->elf.splt == NULL) + { + /* We didn't make a PLT entry for this symbol. This + happens when statically linking PIC code, or when + using -Bsymbolic. */ + break; + } + + relocation = (htab->elf.splt->output_section->vma + + htab->elf.splt->output_offset + + h->plt.offset); + unresolved_reloc = FALSE; + break; + + case R_TILEPRO_32_PCREL: + case R_TILEPRO_16_PCREL: + case R_TILEPRO_8_PCREL: + case R_TILEPRO_IMM16_X0_PCREL: + case R_TILEPRO_IMM16_X1_PCREL: + case R_TILEPRO_IMM16_X0_LO_PCREL: + case R_TILEPRO_IMM16_X1_LO_PCREL: + case R_TILEPRO_IMM16_X0_HI_PCREL: + case R_TILEPRO_IMM16_X1_HI_PCREL: + case R_TILEPRO_IMM16_X0_HA_PCREL: + case R_TILEPRO_IMM16_X1_HA_PCREL: + if (h != NULL + && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + break; + /* Fall through. */ + case R_TILEPRO_32: + case R_TILEPRO_16: + case R_TILEPRO_8: + case R_TILEPRO_LO16: + case R_TILEPRO_HI16: + case R_TILEPRO_HA16: + case R_TILEPRO_COPY: + case R_TILEPRO_GLOB_DAT: + case R_TILEPRO_JMP_SLOT: + case R_TILEPRO_RELATIVE: + case R_TILEPRO_BROFF_X1: + case R_TILEPRO_JOFFLONG_X1: + case R_TILEPRO_IMM8_X0: + case R_TILEPRO_IMM8_Y0: + case R_TILEPRO_IMM8_X1: + case R_TILEPRO_IMM8_Y1: + case R_TILEPRO_DEST_IMM8_X1: + case R_TILEPRO_MT_IMM15_X1: + case R_TILEPRO_MF_IMM15_X1: + case R_TILEPRO_IMM16_X0: + case R_TILEPRO_IMM16_X1: + case R_TILEPRO_IMM16_X0_LO: + case R_TILEPRO_IMM16_X1_LO: + case R_TILEPRO_IMM16_X0_HI: + case R_TILEPRO_IMM16_X1_HI: + case R_TILEPRO_IMM16_X0_HA: + case R_TILEPRO_IMM16_X1_HA: + case R_TILEPRO_MMSTART_X0: + case R_TILEPRO_MMEND_X0: + case R_TILEPRO_MMSTART_X1: + case R_TILEPRO_MMEND_X1: + case R_TILEPRO_SHAMT_X0: + case R_TILEPRO_SHAMT_X1: + case R_TILEPRO_SHAMT_Y0: + case R_TILEPRO_SHAMT_Y1: + if ((input_section->flags & SEC_ALLOC) == 0) + break; + + if ((info->shared + && (h == NULL + || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT + || h->root.type != bfd_link_hash_undefweak) + && (! howto->pc_relative + || !SYMBOL_CALLS_LOCAL (info, h))) + || (!info->shared + && h != NULL + && h->dynindx != -1 + && !h->non_got_ref + && ((h->def_dynamic + && !h->def_regular) + || h->root.type == bfd_link_hash_undefweak + || h->root.type == bfd_link_hash_undefined))) + { + Elf_Internal_Rela outrel; + bfd_boolean skip, relocate = FALSE; + + /* When generating a shared object, these relocations + are copied into the output file to be resolved at run + time. */ + + BFD_ASSERT (sreloc != NULL); + + skip = FALSE; + + outrel.r_offset = + _bfd_elf_section_offset (output_bfd, info, input_section, + rel->r_offset); + if (outrel.r_offset == (bfd_vma) -1) + skip = TRUE; + else if (outrel.r_offset == (bfd_vma) -2) + skip = TRUE, relocate = TRUE; + outrel.r_offset += (input_section->output_section->vma + + input_section->output_offset); + + switch (r_type) + { + case R_TILEPRO_32_PCREL: + case R_TILEPRO_16_PCREL: + case R_TILEPRO_8_PCREL: + /* If the symbol is not dynamic, we should not keep + a dynamic relocation. But an .rela.* slot has been + allocated for it, output R_TILEPRO_NONE. + FIXME: Add code tracking needed dynamic relocs as + e.g. i386 has. */ + if (h->dynindx == -1) + skip = TRUE, relocate = TRUE; + break; + } + + if (skip) + memset (&outrel, 0, sizeof outrel); + /* h->dynindx may be -1 if the symbol was marked to + become local. */ + else if (h != NULL && + h->dynindx != -1 + && (! is_plt + || !info->shared + || !SYMBOLIC_BIND (info, h) + || !h->def_regular)) + { + BFD_ASSERT (h->dynindx != -1); + outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); + outrel.r_addend = rel->r_addend; + } + else + { + if (r_type == R_TILEPRO_32) + { + outrel.r_info = ELF32_R_INFO (0, R_TILEPRO_RELATIVE); + outrel.r_addend = relocation + rel->r_addend; + } + else + { + long indx; + + outrel.r_addend = relocation + rel->r_addend; + + if (is_plt) + sec = htab->elf.splt; + + if (bfd_is_abs_section (sec)) + indx = 0; + else if (sec == NULL || sec->owner == NULL) + { + bfd_set_error (bfd_error_bad_value); + return FALSE; + } + else + { + asection *osec; + + /* We are turning this relocation into one + against a section symbol. It would be + proper to subtract the symbol's value, + osec->vma, from the emitted reloc addend, + but ld.so expects buggy relocs. */ + osec = sec->output_section; + indx = elf_section_data (osec)->dynindx; + + if (indx == 0) + { + osec = htab->elf.text_index_section; + indx = elf_section_data (osec)->dynindx; + } + + /* FIXME: we really should be able to link non-pic + shared libraries. */ + if (indx == 0) + { + BFD_FAIL (); + (*_bfd_error_handler) + (_("%B: probably compiled without -fPIC?"), + input_bfd); + bfd_set_error (bfd_error_bad_value); + return FALSE; + } + } + + outrel.r_info = ELF32_R_INFO (indx, r_type); + } + } + + tilepro_elf_append_rela_32 (output_bfd, sreloc, &outrel); + + /* This reloc will be computed at runtime, so there's no + need to do anything now. */ + if (! relocate) + continue; + } + break; + + case R_TILEPRO_IMM16_X0_TLS_GD: + case R_TILEPRO_IMM16_X1_TLS_GD: + case R_TILEPRO_IMM16_X0_TLS_GD_LO: + case R_TILEPRO_IMM16_X1_TLS_GD_LO: + case R_TILEPRO_IMM16_X0_TLS_GD_HI: + case R_TILEPRO_IMM16_X1_TLS_GD_HI: + case R_TILEPRO_IMM16_X0_TLS_GD_HA: + case R_TILEPRO_IMM16_X1_TLS_GD_HA: + tls_type = GOT_TLS_GD; + goto have_tls_reference; + + case R_TILEPRO_IMM16_X0_TLS_IE: + case R_TILEPRO_IMM16_X1_TLS_IE: + case R_TILEPRO_IMM16_X0_TLS_IE_LO: + case R_TILEPRO_IMM16_X1_TLS_IE_LO: + case R_TILEPRO_IMM16_X0_TLS_IE_HI: + case R_TILEPRO_IMM16_X1_TLS_IE_HI: + case R_TILEPRO_IMM16_X0_TLS_IE_HA: + case R_TILEPRO_IMM16_X1_TLS_IE_HA: + tls_type = GOT_TLS_IE; + /* Fall through. */ + + have_tls_reference: + if (h == NULL && local_got_offsets) + tls_type + = _bfd_tilepro_elf_local_got_tls_type (input_bfd) [r_symndx]; + else if (h != NULL) + { + tls_type = tilepro_elf_hash_entry(h)->tls_type; + } + if (tls_type == GOT_TLS_IE) + switch (r_type) + { + case R_TILEPRO_IMM16_X0_TLS_GD: + r_type = R_TILEPRO_IMM16_X0_TLS_IE; + break; + case R_TILEPRO_IMM16_X1_TLS_GD: + r_type = R_TILEPRO_IMM16_X1_TLS_IE; + break; + case R_TILEPRO_IMM16_X0_TLS_GD_LO: + r_type = R_TILEPRO_IMM16_X0_TLS_IE_LO; + break; + case R_TILEPRO_IMM16_X1_TLS_GD_LO: + r_type = R_TILEPRO_IMM16_X1_TLS_IE_LO; + break; + case R_TILEPRO_IMM16_X0_TLS_GD_HI: + r_type = R_TILEPRO_IMM16_X0_TLS_IE_HI; + break; + case R_TILEPRO_IMM16_X1_TLS_GD_HI: + r_type = R_TILEPRO_IMM16_X1_TLS_IE_HI; + break; + case R_TILEPRO_IMM16_X0_TLS_GD_HA: + r_type = R_TILEPRO_IMM16_X0_TLS_IE_HA; + break; + case R_TILEPRO_IMM16_X1_TLS_GD_HA: + r_type = R_TILEPRO_IMM16_X1_TLS_IE_HA; + break; + } + + if (h != NULL) + { + off = h->got.offset; + h->got.offset |= 1; + } + else + { + BFD_ASSERT (local_got_offsets != NULL); + off = local_got_offsets[r_symndx]; + local_got_offsets[r_symndx] |= 1; + } + + if (htab->elf.sgot == NULL) + abort (); + + if ((off & 1) != 0) + off &= ~1; + else + { + Elf_Internal_Rela outrel; + int indx = 0; + bfd_boolean need_relocs = FALSE; + + if (htab->elf.srelgot == NULL) + abort (); + + if (h != NULL) + { + bfd_boolean dyn; + dyn = htab->elf.dynamic_sections_created; + + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) + && (!info->shared + || !SYMBOL_REFERENCES_LOCAL (info, h))) + { + indx = h->dynindx; + } + } + + /* The GOT entries have not been initialized yet. Do it + now, and emit any relocations. */ + if ((info->shared || indx != 0) + && (h == NULL + || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT + || h->root.type != bfd_link_hash_undefweak)) + need_relocs = TRUE; + + switch (r_type) + { + case R_TILEPRO_IMM16_X0_TLS_IE: + case R_TILEPRO_IMM16_X1_TLS_IE: + case R_TILEPRO_IMM16_X0_TLS_IE_LO: + case R_TILEPRO_IMM16_X1_TLS_IE_LO: + case R_TILEPRO_IMM16_X0_TLS_IE_HI: + case R_TILEPRO_IMM16_X1_TLS_IE_HI: + case R_TILEPRO_IMM16_X0_TLS_IE_HA: + case R_TILEPRO_IMM16_X1_TLS_IE_HA: + if (need_relocs) { + bfd_put_32 (output_bfd, 0, htab->elf.sgot->contents + off); + outrel.r_offset = (htab->elf.sgot->output_section->vma + + htab->elf.sgot->output_offset + off); + outrel.r_addend = 0; + if (indx == 0) + outrel.r_addend = relocation - dtpoff_base (info); + outrel.r_info = ELF32_R_INFO (indx, R_TILEPRO_TLS_TPOFF32); + tilepro_elf_append_rela_32 (output_bfd, htab->elf.srelgot, + &outrel); + } else { + bfd_put_32 (output_bfd, tpoff (info, relocation), + htab->elf.sgot->contents + off); + } + break; + + case R_TILEPRO_IMM16_X0_TLS_GD: + case R_TILEPRO_IMM16_X1_TLS_GD: + case R_TILEPRO_IMM16_X0_TLS_GD_LO: + case R_TILEPRO_IMM16_X1_TLS_GD_LO: + case R_TILEPRO_IMM16_X0_TLS_GD_HI: + case R_TILEPRO_IMM16_X1_TLS_GD_HI: + case R_TILEPRO_IMM16_X0_TLS_GD_HA: + case R_TILEPRO_IMM16_X1_TLS_GD_HA: + if (need_relocs) { + outrel.r_offset = (htab->elf.sgot->output_section->vma + + htab->elf.sgot->output_offset + off); + outrel.r_addend = 0; + outrel.r_info = ELF32_R_INFO (indx, R_TILEPRO_TLS_DTPMOD32); + bfd_put_32 (output_bfd, 0, htab->elf.sgot->contents + off); + tilepro_elf_append_rela_32 (output_bfd, htab->elf.srelgot, + &outrel); + if (indx == 0) + { + BFD_ASSERT (! unresolved_reloc); + bfd_put_32 (output_bfd, + relocation - dtpoff_base (info), + (htab->elf.sgot->contents + off + + TILEPRO_BYTES_PER_WORD)); + } + else + { + bfd_put_32 (output_bfd, 0, + (htab->elf.sgot->contents + off + + TILEPRO_BYTES_PER_WORD)); + outrel.r_info = ELF32_R_INFO (indx, + R_TILEPRO_TLS_DTPOFF32); + outrel.r_offset += TILEPRO_BYTES_PER_WORD; + tilepro_elf_append_rela_32 (output_bfd, + htab->elf.srelgot, &outrel); + } + } + + else { + /* If we are not emitting relocations for a + general dynamic reference, then we must be in a + static link or an executable link with the + symbol binding locally. Mark it as belonging + to module 1, the executable. */ + bfd_put_32 (output_bfd, 1, + htab->elf.sgot->contents + off ); + bfd_put_32 (output_bfd, relocation - dtpoff_base (info), + htab->elf.sgot->contents + off + + TILEPRO_BYTES_PER_WORD); + } + break; + } + } + + if (off >= (bfd_vma) -2) + abort (); + + relocation = htab->elf.sgot->output_offset + off - got_base; + unresolved_reloc = FALSE; + howto = tilepro_elf_howto_table + r_type; + break; + + default: + break; + } + + /* Dynamic relocs are not propagated for SEC_DEBUGGING sections + because such sections are not SEC_ALLOC and thus ld.so will + not process them. */ + if (unresolved_reloc + && !((input_section->flags & SEC_DEBUGGING) != 0 + && h->def_dynamic)) + (*_bfd_error_handler) + (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"), + input_bfd, + input_section, + (long) rel->r_offset, + howto->name, + h->root.root.string); + + r = bfd_reloc_continue; + + /* For the _HA types, we add 0x8000 so that if bit 15 is set, + * we will increment bit 16. The howto->rightshift takes care + * of the rest for us. */ + switch (r_type) + { + case R_TILEPRO_HA16: + case R_TILEPRO_IMM16_X0_HA: + case R_TILEPRO_IMM16_X1_HA: + case R_TILEPRO_IMM16_X0_HA_PCREL: + case R_TILEPRO_IMM16_X1_HA_PCREL: + case R_TILEPRO_IMM16_X0_GOT_HA: + case R_TILEPRO_IMM16_X1_GOT_HA: + case R_TILEPRO_IMM16_X0_TLS_GD_HA: + case R_TILEPRO_IMM16_X1_TLS_GD_HA: + case R_TILEPRO_IMM16_X0_TLS_IE_HA: + case R_TILEPRO_IMM16_X1_TLS_IE_HA: + relocation += 0x8000; + break; + } + + /* Get the operand creation function, if any. */ + create_func = reloc_to_create_func[r_type]; + if (create_func == NULL) + { + r = _bfd_final_link_relocate (howto, input_bfd, input_section, + contents, rel->r_offset, + relocation, rel->r_addend); + } + else + { + if (howto->pc_relative) + { + relocation -= + input_section->output_section->vma + input_section->output_offset; + if (howto->pcrel_offset) + relocation -= rel->r_offset; + } + + bfd_byte *data; + + /* Add the relocation addend if any to the final target value */ + relocation += rel->r_addend; + + /* Do basic range checking */ + r = bfd_check_overflow (howto->complain_on_overflow, + howto->bitsize, + howto->rightshift, + 32, + relocation); + + /* + * Write the relocated value out into the raw section data. + * Don't put a relocation out in the .rela section. + */ + tilepro_bundle_bits mask = create_func(-1); + tilepro_bundle_bits value = create_func(relocation >> howto->rightshift); + + /* Only touch bytes while the mask is not 0, so we + don't write to out of bounds memory if this is actually + a 16-bit switch instruction. */ + for (data = contents + rel->r_offset; mask != 0; data++) + { + bfd_byte byte_mask = (bfd_byte)mask; + *data = (*data & ~byte_mask) | ((bfd_byte)value & byte_mask); + mask >>= 8; + value >>= 8; + } + } + + if (r != bfd_reloc_ok) + { + const char *msg = NULL; + + switch (r) + { + case bfd_reloc_overflow: + r = info->callbacks->reloc_overflow + (info, (h ? &h->root : NULL), name, howto->name, + (bfd_vma) 0, input_bfd, input_section, rel->r_offset); + break; + + case bfd_reloc_undefined: + r = info->callbacks->undefined_symbol + (info, name, input_bfd, input_section, rel->r_offset, + TRUE); + break; + + case bfd_reloc_outofrange: + msg = _("internal error: out of range error"); + break; + + case bfd_reloc_notsupported: + msg = _("internal error: unsupported relocation error"); + break; + + case bfd_reloc_dangerous: + msg = _("internal error: dangerous relocation"); + break; + + default: + msg = _("internal error: unknown error"); + break; + } + + if (msg) + r = info->callbacks->warning + (info, msg, name, input_bfd, input_section, rel->r_offset); + + if (! r) + return FALSE; + } + } + + return TRUE; +} + +/* Finish up dynamic symbol handling. We set the contents of various + dynamic sections here. */ + +static bfd_boolean +tilepro_elf_finish_dynamic_symbol (bfd *output_bfd, + struct bfd_link_info *info, + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) +{ + struct tilepro_elf_link_hash_table *htab; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + if (h->plt.offset != (bfd_vma) -1) + { + asection *splt; + asection *srela; + asection *sgotplt; + Elf_Internal_Rela rela; + bfd_byte *loc; + bfd_vma r_offset; + + int rela_index; + + /* This symbol has an entry in the PLT. Set it up. */ + + BFD_ASSERT (h->dynindx != -1); + + splt = htab->elf.splt; + srela = htab->elf.srelplt; + sgotplt = htab->elf.sgotplt; + + if (splt == NULL || srela == NULL) + abort (); + + /* Fill in the entry in the procedure linkage table. */ + rela_index = tilepro_plt_entry_build (splt, sgotplt, h->plt.offset, + &r_offset); + + /* Fill in the entry in the global offset table, which initially points + to the beginning of the plt. */ + bfd_put_32 (output_bfd, splt->output_section->vma + splt->output_offset, + sgotplt->contents + r_offset); + + /* Fill in the entry in the .rela.plt section. */ + rela.r_offset = (sgotplt->output_section->vma + + sgotplt->output_offset + + r_offset); + rela.r_addend = 0; + rela.r_info = ELF32_R_INFO (h->dynindx, R_TILEPRO_JMP_SLOT); + + loc = srela->contents + rela_index * sizeof (Elf32_External_Rela); + bfd_elf32_swap_reloca_out (output_bfd, &rela, loc); + + if (!h->def_regular) + { + /* Mark the symbol as undefined, rather than as defined in + the .plt section. Leave the value alone. */ + sym->st_shndx = SHN_UNDEF; + /* If the symbol is weak, we do need to clear the value. + Otherwise, the PLT entry would provide a definition for + the symbol even if the symbol wasn't defined anywhere, + and so the symbol would never be NULL. */ + if (!h->ref_regular_nonweak) + sym->st_value = 0; + } + } + + if (h->got.offset != (bfd_vma) -1 + && tilepro_elf_hash_entry(h)->tls_type != GOT_TLS_GD + && tilepro_elf_hash_entry(h)->tls_type != GOT_TLS_IE) + { + asection *sgot; + asection *srela; + Elf_Internal_Rela rela; + + /* This symbol has an entry in the GOT. Set it up. */ + + sgot = htab->elf.sgot; + srela = htab->elf.srelgot; + BFD_ASSERT (sgot != NULL && srela != NULL); + + rela.r_offset = (sgot->output_section->vma + + sgot->output_offset + + (h->got.offset &~ (bfd_vma) 1)); + + /* If this is a -Bsymbolic link, and the symbol is defined + locally, we just want to emit a RELATIVE reloc. Likewise if + the symbol was forced to be local because of a version file. + The entry in the global offset table will already have been + initialized in the relocate_section function. */ + if (info->shared + && (info->symbolic || h->dynindx == -1) + && h->def_regular) + { + asection *sec = h->root.u.def.section; + rela.r_info = ELF32_R_INFO (0, R_TILEPRO_RELATIVE); + rela.r_addend = (h->root.u.def.value + + sec->output_section->vma + + sec->output_offset); + } + else + { + rela.r_info = ELF32_R_INFO (h->dynindx, R_TILEPRO_GLOB_DAT); + rela.r_addend = 0; + } + + bfd_put_32 (output_bfd, 0, + sgot->contents + (h->got.offset & ~(bfd_vma) 1)); + tilepro_elf_append_rela_32 (output_bfd, srela, &rela); + } + + if (h->needs_copy) + { + asection *s; + Elf_Internal_Rela rela; + + /* This symbols needs a copy reloc. Set it up. */ + BFD_ASSERT (h->dynindx != -1); + + s = bfd_get_section_by_name (h->root.u.def.section->owner, + ".rela.bss"); + BFD_ASSERT (s != NULL); + + rela.r_offset = (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + rela.r_info = ELF32_R_INFO (h->dynindx, R_TILEPRO_COPY); + rela.r_addend = 0; + tilepro_elf_append_rela_32 (output_bfd, s, &rela); + } + + /* Mark some specially defined symbols as absolute. */ + if (strcmp (h->root.root.string, "_DYNAMIC") == 0 + || (h == htab->elf.hgot || h == htab->elf.hplt)) + sym->st_shndx = SHN_ABS; + + return TRUE; +} + +/* Finish up the dynamic sections. */ + +static bfd_boolean +tilepro_finish_dyn (bfd *output_bfd, struct bfd_link_info *info, + bfd *dynobj, asection *sdyn, + asection *splt ATTRIBUTE_UNUSED) +{ + Elf32_External_Dyn *dyncon, *dynconend; + struct tilepro_elf_link_hash_table *htab; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dyncon = (Elf32_External_Dyn *) sdyn->contents; + dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); + for (; dyncon < dynconend; dyncon++) + { + Elf_Internal_Dyn dyn; + asection *s; + + bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); + + switch (dyn.d_tag) + { + case DT_PLTGOT: + s = htab->elf.sgotplt; + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + break; + case DT_JMPREL: + s = htab->elf.srelplt; + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + break; + case DT_PLTRELSZ: + s = htab->elf.srelplt; + dyn.d_un.d_val = s->size; + break; + default: + continue; + } + + bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); + } + return TRUE; +} + +static bfd_boolean +tilepro_elf_finish_dynamic_sections (bfd *output_bfd, + struct bfd_link_info *info) +{ + bfd *dynobj; + asection *sdyn; + struct tilepro_elf_link_hash_table *htab; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; + + sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); + + if (elf_hash_table (info)->dynamic_sections_created) + { + asection *splt; + bfd_boolean ret; + + splt = bfd_get_section_by_name (dynobj, ".plt"); + BFD_ASSERT (splt != NULL && sdyn != NULL); + + ret = tilepro_finish_dyn (output_bfd, info, dynobj, sdyn, splt); + + if (ret != TRUE) + return ret; + + /* Fill in the first entry in the procedure linkage table. */ + if (splt->size > 0) + memcpy (splt->contents, tilepro_plt0_entry, PLT_HEADER_SIZE); + + elf_section_data (splt->output_section)->this_hdr.sh_entsize + = PLT_ENTRY_SIZE; + } + + if (htab->elf.sgotplt) + { + if (bfd_is_abs_section (htab->elf.sgotplt->output_section)) + { + (*_bfd_error_handler) + (_("discarded output section: `%A'"), htab->elf.sgotplt); + return FALSE; + } + + if (htab->elf.sgotplt->size > 0) + { + /* Write the first two entries in .got.plt, needed for the dynamic + linker. */ + bfd_put_32 (output_bfd, (bfd_vma) -1, + htab->elf.sgotplt->contents); + bfd_put_32 (output_bfd, (bfd_vma) 0, + htab->elf.sgotplt->contents + GOT_ENTRY_SIZE); + } + + elf_section_data (htab->elf.sgotplt->output_section)->this_hdr.sh_entsize + = GOT_ENTRY_SIZE; + } + + if (htab->elf.sgot) + { + if (htab->elf.sgot->size > 0) + { + /* Set the first entry in the global offset table to the address of + the dynamic section. */ + bfd_vma val = (sdyn ? + sdyn->output_section->vma + sdyn->output_offset : + 0); + bfd_put_32 (output_bfd, val, htab->elf.sgot->contents); + } + + elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize + = GOT_ENTRY_SIZE; + } + + return TRUE; +} + + + +/* Return address for Ith PLT stub in section PLT, for relocation REL + or (bfd_vma) -1 if it should not be included. */ + +static bfd_vma +tilepro_elf_plt_sym_val (bfd_vma i, const asection *plt, + const arelent *rel ATTRIBUTE_UNUSED) +{ + return plt->vma + PLT_HEADER_SIZE + i * PLT_ENTRY_SIZE; +} + +static enum elf_reloc_type_class +tilepro_reloc_type_class (const Elf_Internal_Rela *rela) +{ + switch ((int) ELF32_R_TYPE (rela->r_info)) + { + case R_TILEPRO_RELATIVE: + return reloc_class_relative; + case R_TILEPRO_JMP_SLOT: + return reloc_class_plt; + case R_TILEPRO_COPY: + return reloc_class_copy; + default: + return reloc_class_normal; + } +} + +static int +tilepro_additional_program_headers (bfd *abfd, + struct bfd_link_info *info ATTRIBUTE_UNUSED) +{ + /* Each .intrpt section specified by the user adds another PT_LOAD + header since the sections are discontiguous. */ + static const char intrpt_sections[4][9] = + { + ".intrpt0", ".intrpt1", ".intrpt2", ".intrpt3" + }; + int count = 0; + int i; + + for (i = 0; i < 4; i++) + { + asection *sec = bfd_get_section_by_name (abfd, intrpt_sections[i]); + if (sec != NULL && (sec->flags & SEC_LOAD) != 0) + ++count; + } + + /* Add four "padding" headers in to leave room in case a custom linker + script does something fancy. Otherwise ld complains that it ran + out of program headers and refuses to link. */ + count += 4; + + return count; +} + +#define ELF_ARCH bfd_arch_tilepro +#define ELF_TARGET_ID TILEPRO_ELF_DATA +#define ELF_MACHINE_CODE EM_TILEPRO +#define ELF_MAXPAGESIZE 0x10000 +#define ELF_COMMONPAGESIZE 0x10000 + +#define TARGET_LITTLE_SYM bfd_elf32_tilepro_vec +#define TARGET_LITTLE_NAME "elf32-tilepro" + +#define elf_backend_reloc_type_class tilepro_reloc_type_class + +#define bfd_elf32_bfd_reloc_name_lookup tilepro_reloc_name_lookup +#define bfd_elf32_bfd_link_hash_table_create tilepro_elf_link_hash_table_create +#define bfd_elf32_bfd_reloc_type_lookup tilepro_reloc_type_lookup + +#define elf_backend_copy_indirect_symbol tilepro_elf_copy_indirect_symbol +#define elf_backend_create_dynamic_sections tilepro_elf_create_dynamic_sections +#define elf_backend_check_relocs tilepro_elf_check_relocs +#define elf_backend_adjust_dynamic_symbol tilepro_elf_adjust_dynamic_symbol +#define elf_backend_omit_section_dynsym tilepro_elf_omit_section_dynsym +#define elf_backend_size_dynamic_sections tilepro_elf_size_dynamic_sections +#define elf_backend_relocate_section tilepro_elf_relocate_section +#define elf_backend_finish_dynamic_symbol tilepro_elf_finish_dynamic_symbol +#define elf_backend_finish_dynamic_sections tilepro_elf_finish_dynamic_sections +#define elf_backend_gc_mark_hook tilepro_elf_gc_mark_hook +#define elf_backend_gc_sweep_hook tilepro_elf_gc_sweep_hook +#define elf_backend_plt_sym_val tilepro_elf_plt_sym_val +#define elf_info_to_howto_rel NULL +#define elf_info_to_howto tilepro_info_to_howto_rela +#define elf_backend_grok_prstatus tilepro_elf_grok_prstatus +#define elf_backend_grok_psinfo tilepro_elf_grok_psinfo +#define elf_backend_additional_program_headers tilepro_additional_program_headers + +#define elf_backend_init_index_section _bfd_elf_init_1_index_section + +#define elf_backend_can_gc_sections 1 +#define elf_backend_can_refcount 1 +#define elf_backend_want_got_plt 1 +#define elf_backend_plt_readonly 1 +/* Align PLT mod 64 byte L2 line size. */ +#define elf_backend_plt_alignment 6 +#define elf_backend_want_plt_sym 1 +#define elf_backend_got_header_size GOT_ENTRY_SIZE +#define elf_backend_rela_normal 1 +#define elf_backend_default_execstack 0 + +#include "elf32-target.h" diff --git a/bfd/elf32-tilepro.h b/bfd/elf32-tilepro.h new file mode 100644 index 0000000..bdfe2cd --- /dev/null +++ b/bfd/elf32-tilepro.h @@ -0,0 +1,38 @@ +/* TILEPro-specific support for 32-bit ELF. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#ifndef _ELF32_TILEPRO_H +#define _ELF32_TILEPRO_H + +/* This file contains sizes and offsets of Linux data structures. */ + +#define TILEPRO_PRSTATUS_SIZEOF 332 +#define TILEPRO_PRSTATUS_OFFSET_PR_CURSIG 12 +#define TILEPRO_PRSTATUS_OFFSET_PR_PID 24 +#define TILEPRO_PRSTATUS_OFFSET_PR_REG 72 + +#define TILEPRO_PRPSINFO_SIZEOF 128 +#define TILEPRO_PRPSINFO_OFFSET_PR_FNAME 32 +#define TILEPRO_PRPSINFO_OFFSET_PR_PSARGS 48 +#define ELF_PR_PSARGS_SIZE 80 + +#define TILEPRO_GREGSET_T_SIZE 256 + +#endif /* _ELF32_TILEPRO_H */ diff --git a/bfd/elf32-vax.c b/bfd/elf32-vax.c index 78f14ec..643381c 100644 --- a/bfd/elf32-vax.c +++ b/bfd/elf32-vax.c @@ -1,6 +1,7 @@ /* VAX series support for 32-bit ELF Copyright 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, - 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 + Free Software Foundation, Inc. Contributed by Matt Thomas . This file is part of BFD, the Binary File Descriptor library. @@ -1272,9 +1273,6 @@ elf_vax_discard_copies (struct elf_vax_link_hash_entry *h, { struct elf_vax_pcrel_relocs_copied *s; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct elf_vax_link_hash_entry *) h->root.root.u.i.link; - /* We only discard relocs for symbols defined in a regular object. */ if (!h->root.def_regular) return TRUE; diff --git a/bfd/elf32-xstormy16.c b/bfd/elf32-xstormy16.c index 09c894e..6141783 100644 --- a/bfd/elf32-xstormy16.c +++ b/bfd/elf32-xstormy16.c @@ -1,5 +1,5 @@ /* Xstormy16-specific support for 32-bit ELF. - Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 + Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -537,9 +537,6 @@ xstormy16_relax_plt_check (struct elf_link_hash_entry *h, void * xdata) { struct relax_plt_data *data = (struct relax_plt_data *) xdata; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (h->plt.offset != (bfd_vma) -1) { bfd_vma address; @@ -571,9 +568,6 @@ xstormy16_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata) { bfd_vma *entry = (bfd_vma *) xdata; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (h->plt.offset != (bfd_vma) -1) { h->plt.offset = *entry; diff --git a/bfd/elf32-xtensa.c b/bfd/elf32-xtensa.c index fd41244..c6e4fb4 100644 --- a/bfd/elf32-xtensa.c +++ b/bfd/elf32-xtensa.c @@ -1,5 +1,5 @@ /* Xtensa-specific support for 32-bit ELF. - Copyright 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + Copyright 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -1531,9 +1531,6 @@ elf_xtensa_allocate_dynrelocs (struct elf_link_hash_entry *h, void *arg) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - info = (struct bfd_link_info *) arg; htab = elf_xtensa_hash_table (info); if (htab == NULL) @@ -3466,7 +3463,7 @@ elf_xtensa_merge_private_bfd_data (bfd *ibfd, bfd *obfd) unsigned out_mach, in_mach; flagword out_flag, in_flag; - /* Check if we have the same endianess. */ + /* Check if we have the same endianness. */ if (!_bfd_generic_verify_endian_match (ibfd, obfd)) return FALSE; diff --git a/bfd/elf64-alpha.c b/bfd/elf64-alpha.c index 33b27ac..6076709 100644 --- a/bfd/elf64-alpha.c +++ b/bfd/elf64-alpha.c @@ -1553,9 +1553,6 @@ elf64_alpha_output_extsym (struct alpha_elf_link_hash_entry *h, PTR data) bfd_boolean strip; asection *sec, *output_section; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct alpha_elf_link_hash_entry *) h->root.root.u.i.link; - if (h->root.indx == -2) strip = FALSE; else if ((h->root.def_dynamic @@ -1885,10 +1882,13 @@ elf64_alpha_check_relocs (bfd *abfd, struct bfd_link_info *info, break; case R_ALPHA_TPREL64: - if (info->shared || maybe_dynamic) + if (info->shared && !info->pie) + { + info->flags |= DF_STATIC_TLS; + need = NEED_DYNREL; + } + else if (maybe_dynamic) need = NEED_DYNREL; - if (info->shared) - info->flags |= DF_STATIC_TLS; break; } @@ -2151,23 +2151,29 @@ elf64_alpha_merge_symbol_attribute (struct elf_link_hash_entry *h, indirect to the new ones. Consolidate the got and reloc information in these situations. */ -static bfd_boolean -elf64_alpha_merge_ind_symbols (struct alpha_elf_link_hash_entry *hi, - PTR dummy ATTRIBUTE_UNUSED) +static void +elf64_alpha_copy_indirect_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *dir, + struct elf_link_hash_entry *ind) { - struct alpha_elf_link_hash_entry *hs; + struct alpha_elf_link_hash_entry *hi + = (struct alpha_elf_link_hash_entry *) ind; + struct alpha_elf_link_hash_entry *hs + = (struct alpha_elf_link_hash_entry *) dir; - if (hi->root.root.type != bfd_link_hash_indirect) - return TRUE; - hs = hi; - do { - hs = (struct alpha_elf_link_hash_entry *)hs->root.root.u.i.link; - } while (hs->root.root.type == bfd_link_hash_indirect); + /* Do the merging in the superclass. */ + _bfd_elf_link_hash_copy_indirect(info, dir, ind); /* Merge the flags. Whee. */ - hs->flags |= hi->flags; + /* ??? It's unclear to me what's really supposed to happen when + "merging" defweak and defined symbols, given that we don't + actually throw away the defweak. This more-or-less copies + the logic related to got and plt entries in the superclass. */ + if (ind->root.type != bfd_link_hash_indirect) + return; + /* Merge the .got entries. Cannibalize the old symbol's list in doing so, since we don't need it anymore. */ @@ -2220,8 +2226,6 @@ elf64_alpha_merge_ind_symbols (struct alpha_elf_link_hash_entry *hi, } } hi->reloc_entries = NULL; - - return TRUE; } /* Is it possible to merge two object file's .got tables? */ @@ -2390,9 +2394,6 @@ elf64_alpha_calc_got_offsets_for_symbol (struct alpha_elf_link_hash_entry *h, { struct alpha_elf_got_entry *gotent; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct alpha_elf_link_hash_entry *) h->root.root.u.i.link; - for (gotent = h->got_entries; gotent; gotent = gotent->next) if (gotent->use_count > 0) { @@ -2631,10 +2632,6 @@ elf64_alpha_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, if (htab == NULL) return FALSE; - /* First, take care of the indirect symbols created by versioning. */ - alpha_elf_link_hash_traverse (htab, elf64_alpha_merge_ind_symbols, - NULL); - if (!elf64_alpha_size_got_sections (info)) return FALSE; @@ -2657,7 +2654,7 @@ elf64_alpha_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, /* The number of dynamic relocations required by a static relocation. */ static int -alpha_dynamic_entries_for_reloc (int r_type, int dynamic, int shared) +alpha_dynamic_entries_for_reloc (int r_type, int dynamic, int shared, int pie) { switch (r_type) { @@ -2667,16 +2664,18 @@ alpha_dynamic_entries_for_reloc (int r_type, int dynamic, int shared) case R_ALPHA_TLSLDM: return shared; case R_ALPHA_LITERAL: - case R_ALPHA_GOTTPREL: return dynamic || shared; + case R_ALPHA_GOTTPREL: + return dynamic || (shared && !pie); case R_ALPHA_GOTDTPREL: return dynamic; /* May appear in data sections. */ case R_ALPHA_REFLONG: case R_ALPHA_REFQUAD: - case R_ALPHA_TPREL64: return dynamic || shared; + case R_ALPHA_TPREL64: + return dynamic || (shared && !pie); /* Everything else is illegal. We'll issue an error during relocate_section. */ @@ -2695,9 +2694,6 @@ elf64_alpha_calc_dynrel_sizes (struct alpha_elf_link_hash_entry *h, struct alpha_elf_reloc_entry *relent; unsigned long entries; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct alpha_elf_link_hash_entry *) h->root.root.u.i.link; - /* If the symbol was defined as a common symbol in a regular object file, and there was no definition in any dynamic object, then the linker will have allocated space for the symbol in a common @@ -2727,7 +2723,7 @@ elf64_alpha_calc_dynrel_sizes (struct alpha_elf_link_hash_entry *h, for (relent = h->reloc_entries; relent; relent = relent->next) { entries = alpha_dynamic_entries_for_reloc (relent->rtype, dynamic, - info->shared); + info->shared, info->pie); if (entries) { relent->srel->size += @@ -2751,9 +2747,6 @@ elf64_alpha_size_rela_got_1 (struct alpha_elf_link_hash_entry *h, struct alpha_elf_got_entry *gotent; unsigned long entries; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct alpha_elf_link_hash_entry *) h->root.root.u.i.link; - /* If we're using a plt for this symbol, then all of its relocations for its got entries go into .rela.plt. */ if (h->root.needs_plt) @@ -2773,8 +2766,8 @@ elf64_alpha_size_rela_got_1 (struct alpha_elf_link_hash_entry *h, entries = 0; for (gotent = h->got_entries; gotent ; gotent = gotent->next) if (gotent->use_count > 0) - entries += alpha_dynamic_entries_for_reloc (gotent->reloc_type, - dynamic, info->shared); + entries += alpha_dynamic_entries_for_reloc (gotent->reloc_type, dynamic, + info->shared, info->pie); if (entries > 0) { @@ -2824,7 +2817,7 @@ elf64_alpha_size_rela_got_section (struct bfd_link_info *info) gotent ; gotent = gotent->next) if (gotent->use_count > 0) entries += (alpha_dynamic_entries_for_reloc - (gotent->reloc_type, 0, info->shared)); + (gotent->reloc_type, 0, info->shared, info->pie)); } } @@ -3056,7 +3049,8 @@ elf64_alpha_relax_got_load (struct alpha_relax_info *info, bfd_vma symval, return TRUE; /* Can't use local-exec relocations in shared libraries. */ - if (r_type == R_ALPHA_GOTTPREL && info->link_info->shared) + if (r_type == R_ALPHA_GOTTPREL + && (info->link_info->shared && !info->link_info->pie)) return TRUE; if (r_type == R_ALPHA_LITERAL) @@ -3514,6 +3508,13 @@ elf64_alpha_relax_tls_get_addr (struct alpha_relax_info *info, bfd_vma symval, pos[3] = info->contents + gpdisp->r_offset; pos[4] = pos[3] + gpdisp->r_addend; + /* Beware of the compiler hoisting part of the sequence out a loop + and adjusting the destination register for the TLSGD insn. If this + happens, there will be a move into $16 before the JSR insn, so only + transformations of the first insn pair should use this register. */ + tlsgd_reg = bfd_get_32 (info->abfd, pos[0]); + tlsgd_reg = (tlsgd_reg >> 21) & 31; + /* Generally, the positions are not allowed to be out of order, lest the modified insn sequence have different register lifetimes. We can make an exception when pos 1 is adjacent to pos 0. */ @@ -3581,13 +3582,6 @@ elf64_alpha_relax_tls_get_addr (struct alpha_relax_info *info, bfd_vma symval, use_gottprel = FALSE; new_symndx = is_gd ? ELF64_R_SYM (irel->r_info) : STN_UNDEF; - /* Beware of the compiler hoisting part of the sequence out a loop - and adjusting the destination register for the TLSGD insn. If this - happens, there will be a move into $16 before the JSR insn, so only - transformations of the first insn pair should use this register. */ - tlsgd_reg = bfd_get_32 (info->abfd, pos[0]); - tlsgd_reg = (tlsgd_reg >> 21) & 31; - switch (!dynamic && !info->link_info->shared) { case 1: @@ -4521,7 +4515,7 @@ elf64_alpha_relocate_section (bfd *output_bfd, struct bfd_link_info *info, else if (r_type == R_ALPHA_TPREL64) { BFD_ASSERT (elf_hash_table (info)->tls_sec != NULL); - if (!info->shared) + if (!info->shared || info->pie) { value -= tp_base; goto default_reloc; @@ -4642,7 +4636,7 @@ elf64_alpha_relocate_section (bfd *output_bfd, struct bfd_link_info *info, case R_ALPHA_TPRELHI: case R_ALPHA_TPRELLO: case R_ALPHA_TPREL16: - if (info->shared) + if (info->shared && !info->pie) { (*_bfd_error_handler) (_("%B: TLS local exec code cannot be linked into shared objects"), @@ -5455,6 +5449,8 @@ static const struct elf_size_info alpha_elf_size_info = elf64_alpha_adjust_dynamic_symbol #define elf_backend_merge_symbol_attribute \ elf64_alpha_merge_symbol_attribute +#define elf_backend_copy_indirect_symbol \ + elf64_alpha_copy_indirect_symbol #define elf_backend_always_size_sections \ elf64_alpha_always_size_sections #define elf_backend_size_dynamic_sections \ diff --git a/bfd/elf64-hppa.c b/bfd/elf64-hppa.c index d8213a0..057a92d 100644 --- a/bfd/elf64-hppa.c +++ b/bfd/elf64-hppa.c @@ -1,6 +1,6 @@ /* Support for HPPA 64-bit ELF 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, - 2010 Free Software Foundation, Inc. + 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -329,9 +329,9 @@ elf64_hppa_object_p (bfd *abfd) i_ehdrp = elf_elfheader (abfd); if (strcmp (bfd_get_target (abfd), "elf64-hppa-linux") == 0) { - /* GCC on hppa-linux produces binaries with OSABI=Linux, + /* GCC on hppa-linux produces binaries with OSABI=GNU, but the kernel produces corefiles with OSABI=SysV. */ - if (i_ehdrp->e_ident[EI_OSABI] != ELFOSABI_LINUX + if (i_ehdrp->e_ident[EI_OSABI] != ELFOSABI_GNU && i_ehdrp->e_ident[EI_OSABI] != ELFOSABI_NONE) /* aka SYSV */ return FALSE; } @@ -937,9 +937,6 @@ elf64_hppa_mark_exported_functions (struct elf_link_hash_entry *eh, void *data) if (hppa_info == NULL) return FALSE; - if (eh->root.type == bfd_link_hash_warning) - eh = (struct elf_link_hash_entry *) eh->root.u.i.link; - if (eh && (eh->root.type == bfd_link_hash_defined || eh->root.type == bfd_link_hash_defweak) @@ -1056,10 +1053,6 @@ allocate_global_data_opd (struct elf_link_hash_entry *eh, void *data) if (hh && hh->want_opd) { - while (hh->eh.root.type == bfd_link_hash_indirect - || hh->eh.root.type == bfd_link_hash_warning) - hh = hppa_elf_hash_entry (hh->eh.root.u.i.link); - /* We never need an opd entry for a symbol which is not defined by this output file. */ if (hh && (hh->eh.root.type == bfd_link_hash_undefined @@ -1512,19 +1505,15 @@ static bfd_boolean elf64_hppa_mark_milli_and_exported_functions (struct elf_link_hash_entry *eh, void *data) { - struct elf_link_hash_entry *elf = eh; - struct bfd_link_info *info = (struct bfd_link_info *)data; - - if (elf->root.type == bfd_link_hash_warning) - elf = (struct elf_link_hash_entry *) elf->root.u.i.link; + struct bfd_link_info *info = (struct bfd_link_info *) data; - if (elf->type == STT_PARISC_MILLI) + if (eh->type == STT_PARISC_MILLI) { - if (elf->dynindx != -1) + if (eh->dynindx != -1) { - elf->dynindx = -1; + eh->dynindx = -1; _bfd_elf_strtab_delref (elf_hash_table (info)->dynstr, - elf->dynstr_index); + eh->dynstr_index); } return TRUE; } @@ -2839,9 +2828,6 @@ elf_hppa_unmark_useless_dynamic_symbols (struct elf_link_hash_entry *h, { struct bfd_link_info *info = data; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - /* If we are not creating a shared library, and this symbol is referenced by a shared library but is not defined anywhere, then the generic code will warn that it is undefined. @@ -2873,9 +2859,6 @@ elf_hppa_remark_useless_dynamic_symbols (struct elf_link_hash_entry *h, { struct bfd_link_info *info = data; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - /* If we are not creating a shared library, and this symbol is referenced by a shared library but is not defined anywhere, then the generic code will warn that it is undefined. @@ -3289,13 +3272,13 @@ elf_hppa_final_link_relocate (Elf_Internal_Rela *rel, && value + addend + max_branch_offset >= 2*max_branch_offset) { (*_bfd_error_handler) - (_("%B(%A+0x%lx): cannot reach %s"), + (_("%B(%A+0x" BFD_VMA_FMT "x): cannot reach %s"), input_bfd, input_section, offset, - eh->root.root.string); + eh ? eh->root.root.string : "unknown"); bfd_set_error (bfd_error_bad_value); - return bfd_reloc_notsupported; + return bfd_reloc_overflow; } /* Adjust for any field selectors. */ @@ -4114,7 +4097,7 @@ const struct elf_size_info hppa64_elf_size_info = #undef TARGET_BIG_NAME #define TARGET_BIG_NAME "elf64-hppa-linux" #undef ELF_OSABI -#define ELF_OSABI ELFOSABI_LINUX +#define ELF_OSABI ELFOSABI_GNU #undef elf_backend_post_process_headers #define elf_backend_post_process_headers _bfd_elf_set_osabi #undef elf64_bed diff --git a/bfd/elf64-mips.c b/bfd/elf64-mips.c index 3eeb341..3feb1bb 100644 --- a/bfd/elf64-mips.c +++ b/bfd/elf64-mips.c @@ -1688,6 +1688,605 @@ static reloc_howto_type mips16_elf64_howto_table_rela[] = FALSE), /* pcrel_offset */ }; +static reloc_howto_type micromips_elf64_howto_table_rel[] = +{ + EMPTY_HOWTO (130), + EMPTY_HOWTO (131), + EMPTY_HOWTO (132), + + /* 26 bit jump address. */ + HOWTO (R_MICROMIPS_26_S1, /* type */ + 1, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 26, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + /* This needs complex overflow + detection, because the upper four + bits must match the PC. */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_26_S1", /* name */ + TRUE, /* partial_inplace */ + 0x3ffffff, /* src_mask */ + 0x3ffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of symbol value. */ + HOWTO (R_MICROMIPS_HI16, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_hi16_reloc, /* special_function */ + "R_MICROMIPS_HI16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of symbol value. */ + HOWTO (R_MICROMIPS_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_lo16_reloc, /* special_function */ + "R_MICROMIPS_LO16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* GP relative reference. */ + HOWTO (R_MICROMIPS_GPREL16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf32_gprel16_reloc, /* special_function */ + "R_MICROMIPS_GPREL16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Reference to literal section. */ + HOWTO (R_MICROMIPS_LITERAL, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf32_gprel16_reloc, /* special_function */ + "R_MICROMIPS_LITERAL", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Reference to global offset table. */ + HOWTO (R_MICROMIPS_GOT16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_got16_reloc, /* special_function */ + "R_MICROMIPS_GOT16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* This is for microMIPS branches. */ + HOWTO (R_MICROMIPS_PC7_S1, /* type */ + 1, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 7, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC7_S1", /* name */ + TRUE, /* partial_inplace */ + 0x0000007f, /* src_mask */ + 0x0000007f, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_MICROMIPS_PC10_S1, /* type */ + 1, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 10, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC10_S1", /* name */ + TRUE, /* partial_inplace */ + 0x000003ff, /* src_mask */ + 0x000003ff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_MICROMIPS_PC16_S1, /* type */ + 1, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC16_S1", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* 16 bit call through global offset table. */ + HOWTO (R_MICROMIPS_CALL16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + EMPTY_HOWTO (143), + EMPTY_HOWTO (144), + + /* Displacement in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_DISP, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_DISP",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Displacement to page pointer in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_PAGE, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_PAGE",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Offset from page pointer in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_OFST, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_OFST",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_GOT_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_HI16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_GOT_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_LO16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* 64 bit subtraction. Used in the N32 ABI. */ + HOWTO (R_MICROMIPS_SUB, /* type */ + 0, /* rightshift */ + 4, /* size (0 = byte, 1 = short, 2 = long) */ + 64, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_SUB", /* name */ + TRUE, /* partial_inplace */ + MINUS_ONE, /* src_mask */ + MINUS_ONE, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* We don't support these for REL relocations, because it means building + the addend from a R_MICROMIPS_HIGHEST/R_MICROMIPS_HIGHER/ + R_MICROMIPS_HI16/R_MICROMIPS_LO16 sequence with varying ordering, + using fallable heuristics. */ + EMPTY_HOWTO (R_MICROMIPS_HIGHER), + EMPTY_HOWTO (R_MICROMIPS_HIGHEST), + + /* High 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_CALL_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL_HI16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_CALL_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL_LO16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ +}; + +static reloc_howto_type micromips_elf64_howto_table_rela[] = +{ + EMPTY_HOWTO (130), + EMPTY_HOWTO (131), + EMPTY_HOWTO (132), + + /* 26 bit jump address. */ + HOWTO (R_MICROMIPS_26_S1, /* type */ + 1, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 26, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + /* This needs complex overflow + detection, because the upper four + bits must match the PC. */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_26_S1", /* name */ + FALSE, /* partial_inplace */ + 0x3ffffff, /* src_mask */ + 0x3ffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of symbol value. */ + HOWTO (R_MICROMIPS_HI16, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_hi16_reloc, /* special_function */ + "R_MICROMIPS_HI16", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of symbol value. */ + HOWTO (R_MICROMIPS_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_lo16_reloc, /* special_function */ + "R_MICROMIPS_LO16", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* GP relative reference. */ + HOWTO (R_MICROMIPS_GPREL16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf32_gprel16_reloc, /* special_function */ + "R_MICROMIPS_GPREL16", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Reference to literal section. */ + HOWTO (R_MICROMIPS_LITERAL, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf32_gprel16_reloc, /* special_function */ + "R_MICROMIPS_LITERAL", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Reference to global offset table. */ + HOWTO (R_MICROMIPS_GOT16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_got16_reloc, /* special_function */ + "R_MICROMIPS_GOT16", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* This is for microMIPS branches. */ + HOWTO (R_MICROMIPS_PC7_S1, /* type */ + 1, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 7, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC7_S1", /* name */ + FALSE, /* partial_inplace */ + 0x0000007f, /* src_mask */ + 0x0000007f, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_MICROMIPS_PC10_S1, /* type */ + 1, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 10, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC10_S1", /* name */ + FALSE, /* partial_inplace */ + 0x000003ff, /* src_mask */ + 0x000003ff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_MICROMIPS_PC16_S1, /* type */ + 1, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC16_S1", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* 16 bit call through global offset table. */ + HOWTO (R_MICROMIPS_CALL16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL16", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + EMPTY_HOWTO (143), + EMPTY_HOWTO (144), + + /* Displacement in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_DISP, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_DISP",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Displacement to page pointer in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_PAGE, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_PAGE",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Offset from page pointer in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_OFST, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_OFST",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_GOT_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_HI16",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_GOT_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_LO16",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* 64 bit subtraction. Used in the N32 ABI. */ + HOWTO (R_MICROMIPS_SUB, /* type */ + 0, /* rightshift */ + 4, /* size (0 = byte, 1 = short, 2 = long) */ + 64, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_SUB", /* name */ + FALSE, /* partial_inplace */ + MINUS_ONE, /* src_mask */ + MINUS_ONE, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Get the higher value of a 64 bit addend. */ + HOWTO (R_MICROMIPS_HIGHER, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_HIGHER", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Get the highest value of a 64 bit addend. */ + HOWTO (R_MICROMIPS_HIGHEST, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_HIGHEST", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_CALL_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL_HI16",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_CALL_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL_LO16",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ +}; + /* GNU extension to record C++ vtable hierarchy */ static reloc_howto_type elf_mips_gnu_vtinherit_howto = HOWTO (R_MIPS_GNU_VTINHERIT, /* type */ @@ -2231,13 +2830,13 @@ mips16_gprel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol, return ret; location = (bfd_byte *) data + reloc_entry->address; - _bfd_mips16_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE, - location); + _bfd_mips_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE, + location); ret = _bfd_mips_elf_gprel16_with_gp (abfd, symbol, reloc_entry, input_section, relocatable, data, gp); - _bfd_mips16_elf_reloc_shuffle (abfd, reloc_entry->howto->type, !relocatable, - location); + _bfd_mips_elf_reloc_shuffle (abfd, reloc_entry->howto->type, !relocatable, + location); return ret; } @@ -2311,6 +2910,29 @@ static const struct elf_reloc_map mips16_reloc_map[] = { BFD_RELOC_MIPS16_LO16, R_MIPS16_LO16 - R_MIPS16_min }, }; +static const struct elf_reloc_map micromips_reloc_map[] = +{ + { BFD_RELOC_MICROMIPS_JMP, R_MICROMIPS_26_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_HI16_S, R_MICROMIPS_HI16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_LO16, R_MICROMIPS_LO16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GPREL16, R_MICROMIPS_GPREL16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_LITERAL, R_MICROMIPS_LITERAL - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT16, R_MICROMIPS_GOT16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_7_PCREL_S1, R_MICROMIPS_PC7_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_10_PCREL_S1, R_MICROMIPS_PC10_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_16_PCREL_S1, R_MICROMIPS_PC16_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_CALL16, R_MICROMIPS_CALL16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_DISP, R_MICROMIPS_GOT_DISP - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_PAGE - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_OFST, R_MICROMIPS_GOT_OFST - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_HI16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_LO16, R_MICROMIPS_GOT_LO16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_SUB, R_MICROMIPS_SUB - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_HIGHER, R_MICROMIPS_HIGHER - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_HIGHEST, R_MICROMIPS_HIGHEST - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_CALL_HI16, R_MICROMIPS_CALL_HI16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_CALL_LO16, R_MICROMIPS_CALL_LO16 - R_MICROMIPS_min }, +}; /* Given a BFD reloc type, return a howto structure. */ static reloc_howto_type * @@ -2322,6 +2944,7 @@ bfd_elf64_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, relocation variant. */ reloc_howto_type *howto_table = mips_elf64_howto_table_rela; reloc_howto_type *howto16_table = mips16_elf64_howto_table_rela; + reloc_howto_type *howto_micromips_table = micromips_elf64_howto_table_rela; for (i = 0; i < sizeof (mips_reloc_map) / sizeof (struct elf_reloc_map); i++) @@ -2337,6 +2960,13 @@ bfd_elf64_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, return &howto16_table[(int) mips16_reloc_map[i].elf_val]; } + for (i = 0; i < sizeof (micromips_reloc_map) / sizeof (struct elf_reloc_map); + i++) + { + if (micromips_reloc_map[i].bfd_val == code) + return &howto_micromips_table[(int) micromips_reloc_map[i].elf_val]; + } + switch (code) { case BFD_RELOC_VTABLE_INHERIT: @@ -2374,6 +3004,14 @@ bfd_elf64_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, && strcasecmp (mips16_elf64_howto_table_rela[i].name, r_name) == 0) return &mips16_elf64_howto_table_rela[i]; + for (i = 0; + i < (sizeof (micromips_elf64_howto_table_rela) + / sizeof (micromips_elf64_howto_table_rela[0])); + i++) + if (micromips_elf64_howto_table_rela[i].name != NULL + && strcasecmp (micromips_elf64_howto_table_rela[i].name, r_name) == 0) + return µmips_elf64_howto_table_rela[i]; + if (strcasecmp (elf_mips_gnu_vtinherit_howto.name, r_name) == 0) return &elf_mips_gnu_vtinherit_howto; if (strcasecmp (elf_mips_gnu_vtentry_howto.name, r_name) == 0) @@ -2411,6 +3049,13 @@ mips_elf64_rtype_to_howto (unsigned int r_type, bfd_boolean rela_p) case R_MIPS_JUMP_SLOT: return &elf_mips_jump_slot_howto; default: + if (r_type >= R_MICROMIPS_min && r_type < R_MICROMIPS_max) + { + if (rela_p) + return µmips_elf64_howto_table_rela[r_type - R_MICROMIPS_min]; + else + return µmips_elf64_howto_table_rel[r_type - R_MICROMIPS_min]; + } if (r_type >= R_MIPS16_min && r_type < R_MIPS16_max) { if (rela_p) @@ -3279,6 +3924,8 @@ const struct elf_size_info mips_elf64_size_info = /* We don't set bfd_elf64_bfd_is_local_label_name because the 32-bit MIPS-specific function only applies to IRIX5, which had no 64-bit ABI. */ +#define bfd_elf64_bfd_is_target_special_symbol \ + _bfd_mips_elf_is_target_special_symbol #define bfd_elf64_find_nearest_line _bfd_mips_elf_find_nearest_line #define bfd_elf64_find_inliner_info _bfd_mips_elf_find_inliner_info #define bfd_elf64_new_section_hook _bfd_mips_elf_new_section_hook diff --git a/bfd/elf64-mmix.c b/bfd/elf64-mmix.c index 8c00a78..ecc9ad0 100644 --- a/bfd/elf64-mmix.c +++ b/bfd/elf64-mmix.c @@ -75,6 +75,13 @@ struct _mmix_elf_section_data stubs_size_sum for relocation. */ bfd_size_type stub_offset; } pjs; + + /* Whether there has been a warning that this section could not be + linked due to a specific cause. FIXME: a way to access the + linker info or output section, then stuff the limiter guard + there. */ + bfd_boolean has_warned_bpo; + bfd_boolean has_warned_pushj; }; #define mmix_elf_section_data(sec) \ @@ -190,11 +197,11 @@ static bfd_boolean mmix_elf_relocate_section Elf_Internal_Rela *, Elf_Internal_Sym *, asection **)); static bfd_reloc_status_type mmix_final_link_relocate - PARAMS ((reloc_howto_type *, asection *, bfd_byte *, - bfd_vma, bfd_signed_vma, bfd_vma, const char *, asection *)); + (reloc_howto_type *, asection *, bfd_byte *, bfd_vma, bfd_signed_vma, + bfd_vma, const char *, asection *, char **); static bfd_reloc_status_type mmix_elf_perform_relocation - PARAMS ((asection *, reloc_howto_type *, PTR, bfd_vma, bfd_vma)); + (asection *, reloc_howto_type *, void *, bfd_vma, bfd_vma, char **); static bfd_boolean mmix_elf_section_from_bfd_section PARAMS ((bfd *, asection *, int *)); @@ -934,12 +941,9 @@ mmix_elf_new_section_hook (abfd, sec) R_MMIX_ADDR19 and R_MMIX_ADDR27 are just filled in. */ static bfd_reloc_status_type -mmix_elf_perform_relocation (isec, howto, datap, addr, value) - asection *isec; - reloc_howto_type *howto; - PTR datap; - bfd_vma addr; - bfd_vma value; +mmix_elf_perform_relocation (asection *isec, reloc_howto_type *howto, + void *datap, bfd_vma addr, bfd_vma value, + char **error_message) { bfd *abfd = isec->owner; bfd_reloc_status_type flag = bfd_reloc_ok; @@ -1013,6 +1017,36 @@ mmix_elf_perform_relocation (isec, howto, datap, addr, value) + mmix_elf_section_data (isec)->pjs.stub_offset); bfd_vma stubaddr; + if (mmix_elf_section_data (isec)->pjs.n_pushj_relocs == 0) + { + /* This shouldn't happen when linking to ELF or mmo, so + this is an attempt to link to "binary", right? We + can't access the output bfd, so we can't verify that + assumption. We only know that the critical + mmix_elf_check_common_relocs has not been called, + which happens when the output format is different + from the input format (and is not mmo). */ + if (! mmix_elf_section_data (isec)->has_warned_pushj) + { + /* For the first such error per input section, produce + a verbose message. */ + *error_message + = _("invalid input relocation when producing" + " non-ELF, non-mmo format output." + "\n Please use the objcopy program to convert from" + " ELF or mmo," + "\n or assemble using" + " \"-no-expand\" (for gcc, \"-Wa,-no-expand\""); + mmix_elf_section_data (isec)->has_warned_pushj = TRUE; + return bfd_reloc_dangerous; + } + + /* For subsequent errors, return this one, which is + rate-limited but looks a little bit different, + hopefully without affecting user-friendliness. */ + return bfd_reloc_overflow; + } + /* The address doesn't fit, so redirect the PUSHJ to the location of the stub. */ r = mmix_elf_perform_relocation (isec, @@ -1025,7 +1059,8 @@ mmix_elf_perform_relocation (isec, howto, datap, addr, value) + size + (mmix_elf_section_data (isec) ->pjs.stub_offset) - - addr); + - addr, + error_message); if (r != bfd_reloc_ok) return r; @@ -1049,7 +1084,8 @@ mmix_elf_perform_relocation (isec, howto, datap, addr, value) [R_MMIX_ADDR27], stubcontents, stubaddr, - value + addr - stubaddr); + value + addr - stubaddr, + error_message); mmix_elf_section_data (isec)->pjs.stub_offset += 4; if (size + mmix_elf_section_data (isec)->pjs.stub_offset @@ -1161,12 +1197,43 @@ mmix_elf_perform_relocation (isec, howto, datap, addr, value) { struct bpo_reloc_section_info *bpodata = mmix_elf_section_data (isec)->bpo.reloc; - asection *bpo_greg_section - = bpodata->bpo_greg_section; - struct bpo_greg_section_info *gregdata - = mmix_elf_section_data (bpo_greg_section)->bpo.greg; - size_t bpo_index - = gregdata->bpo_reloc_indexes[bpodata->bpo_index++]; + asection *bpo_greg_section; + struct bpo_greg_section_info *gregdata; + size_t bpo_index; + + if (bpodata == NULL) + { + /* This shouldn't happen when linking to ELF or mmo, so + this is an attempt to link to "binary", right? We + can't access the output bfd, so we can't verify that + assumption. We only know that the critical + mmix_elf_check_common_relocs has not been called, which + happens when the output format is different from the + input format (and is not mmo). */ + if (! mmix_elf_section_data (isec)->has_warned_bpo) + { + /* For the first such error per input section, produce + a verbose message. */ + *error_message + = _("invalid input relocation when producing" + " non-ELF, non-mmo format output." + "\n Please use the objcopy program to convert from" + " ELF or mmo," + "\n or compile using the gcc-option" + " \"-mno-base-addresses\"."); + mmix_elf_section_data (isec)->has_warned_bpo = TRUE; + return bfd_reloc_dangerous; + } + + /* For subsequent errors, return this one, which is + rate-limited but looks a little bit different, + hopefully without affecting user-friendliness. */ + return bfd_reloc_overflow; + } + + bpo_greg_section = bpodata->bpo_greg_section; + gregdata = mmix_elf_section_data (bpo_greg_section)->bpo.greg; + bpo_index = gregdata->bpo_reloc_indexes[bpodata->bpo_index++]; /* A consistency check: The value we now have in "relocation" must be the same as the value we stored for that relocation. It @@ -1260,7 +1327,7 @@ mmix_elf_reloc (abfd, reloc_entry, symbol, data, input_section, PTR data; asection *input_section; bfd *output_bfd; - char **error_message ATTRIBUTE_UNUSED; + char **error_message; { bfd_vma relocation; bfd_reloc_status_type r; @@ -1322,7 +1389,8 @@ mmix_elf_reloc (abfd, reloc_entry, symbol, data, input_section, data, reloc_entry->address, reloc_entry->addend, relocation, bfd_asymbol_name (symbol), - reloc_target_output_section); + reloc_target_output_section, + error_message); } /* Relocate an MMIX ELF section. Modified from elf32-fr30.c; look to it @@ -1454,7 +1522,7 @@ mmix_elf_relocate_section (output_bfd, info, input_bfd, input_section, + size + mmix_elf_section_data (input_section) ->pjs.stub_offset, - NULL, NULL) != bfd_reloc_ok) + NULL, NULL, NULL) != bfd_reloc_ok) return FALSE; /* Put a JMP insn at the stub; it goes with the @@ -1494,7 +1562,7 @@ mmix_elf_relocate_section (output_bfd, info, input_bfd, input_section, r = mmix_final_link_relocate (howto, input_section, contents, rel->r_offset, - rel->r_addend, relocation, name, sec); + rel->r_addend, relocation, name, sec, NULL); if (r != bfd_reloc_ok) { @@ -1551,16 +1619,11 @@ mmix_elf_relocate_section (output_bfd, info, input_bfd, input_section, routines. A few relocs we have to do ourselves. */ static bfd_reloc_status_type -mmix_final_link_relocate (howto, input_section, contents, - r_offset, r_addend, relocation, symname, symsec) - reloc_howto_type *howto; - asection *input_section; - bfd_byte *contents; - bfd_vma r_offset; - bfd_signed_vma r_addend; - bfd_vma relocation; - const char *symname; - asection *symsec; +mmix_final_link_relocate (reloc_howto_type *howto, asection *input_section, + bfd_byte *contents, bfd_vma r_offset, + bfd_signed_vma r_addend, bfd_vma relocation, + const char *symname, asection *symsec, + char **error_message) { bfd_reloc_status_type r = bfd_reloc_ok; bfd_vma addr @@ -1587,7 +1650,7 @@ mmix_final_link_relocate (howto, input_section, contents, + r_offset); r = mmix_elf_perform_relocation (input_section, howto, contents, - addr, srel); + addr, srel, error_message); break; case R_MMIX_BASE_PLUS_OFFSET: @@ -1669,7 +1732,7 @@ mmix_final_link_relocate (howto, input_section, contents, do_mmix_reloc: contents += r_offset; r = mmix_elf_perform_relocation (input_section, howto, contents, - addr, srel); + addr, srel, error_message); break; case R_MMIX_LOCAL: diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c index 13ae9a2..93d1314 100644 --- a/bfd/elf64-ppc.c +++ b/bfd/elf64-ppc.c @@ -34,6 +34,7 @@ #include "elf-bfd.h" #include "elf/ppc64.h" #include "elf64-ppc.h" +#include "dwarf2.h" static bfd_reloc_status_type ppc64_elf_ha_reloc (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); @@ -80,7 +81,7 @@ static bfd_vma opd_entry_value #define bfd_elf64_mkobject ppc64_elf_mkobject #define bfd_elf64_bfd_reloc_type_lookup ppc64_elf_reloc_type_lookup #define bfd_elf64_bfd_reloc_name_lookup ppc64_elf_reloc_name_lookup -#define bfd_elf64_bfd_merge_private_bfd_data ppc64_elf_merge_private_bfd_data +#define bfd_elf64_bfd_merge_private_bfd_data _bfd_generic_verify_endian_match #define bfd_elf64_new_section_hook ppc64_elf_new_section_hook #define bfd_elf64_bfd_link_hash_table_create ppc64_elf_link_hash_table_create #define bfd_elf64_bfd_link_hash_table_free ppc64_elf_link_hash_table_free @@ -1281,6 +1282,20 @@ static reloc_howto_type ppc64_elf_howto_raw[] = { 0, /* dst_mask */ FALSE), /* pcrel_offset */ + HOWTO (R_PPC64_TOCSAVE, + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_PPC64_TOCSAVE", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ + /* Computes the load module index of the load module that contains the definition of its TLS sym. */ HOWTO (R_PPC64_DTPMOD64, @@ -2597,7 +2612,11 @@ struct ppc64_elf_obj_tdata /* Nonzero if this bfd has small toc/got relocs, ie. that expect the reloc to be in the range -32768 to 32767. */ - unsigned int has_small_toc_reloc; + unsigned int has_small_toc_reloc : 1; + + /* Set if toc/got ha relocs detected not using r2, or lo reloc + instruction not one we handle. */ + unsigned int unexpected_toc_insn : 1; }; #define ppc64_elf_tdata(bfd) \ @@ -2670,6 +2689,8 @@ ppc64_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) if (note->descsz != 136) return FALSE; + elf_tdata (abfd)->core_pid + = bfd_get_32 (abfd, note->descdata + 24); elf_tdata (abfd)->core_program = _bfd_elfcore_strndup (abfd, note->descdata + 40, 16); elf_tdata (abfd)->core_command @@ -2725,35 +2746,6 @@ ppc64_elf_write_core_note (bfd *abfd, char *buf, int *bufsiz, int note_type, } } -/* Merge backend specific data from an object file to the output - object file when linking. */ - -static bfd_boolean -ppc64_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) -{ - /* Check if we have the same endianess. */ - if (ibfd->xvec->byteorder != obfd->xvec->byteorder - && ibfd->xvec->byteorder != BFD_ENDIAN_UNKNOWN - && obfd->xvec->byteorder != BFD_ENDIAN_UNKNOWN) - { - const char *msg; - - if (bfd_big_endian (ibfd)) - msg = _("%B: compiled for a big endian system " - "and target is little endian"); - else - msg = _("%B: compiled for a little endian system " - "and target is big endian"); - - (*_bfd_error_handler) (msg, ibfd); - - bfd_set_error (bfd_error_wrong_format); - return FALSE; - } - - return TRUE; -} - /* Add extra PPC sections. */ static const struct bfd_elf_special_section ppc64_elf_special_sections[]= @@ -3485,26 +3477,6 @@ ppc64_elf_get_synthetic_symtab (bfd *abfd, calls may use the function descriptor symbol, ie. "bl foo". This behaves exactly as "bl .foo". */ -/* The linker needs to keep track of the number of relocs that it - decides to copy as dynamic relocs in check_relocs for each symbol. - This is so that it can later discard them if they are found to be - unnecessary. We store the information in a field extending the - regular ELF linker hash table. */ - -struct ppc_dyn_relocs -{ - struct ppc_dyn_relocs *next; - - /* The input section of the reloc. */ - asection *sec; - - /* Total number of relocs copied for the input section. */ - bfd_size_type count; - - /* Number of pc-relative relocs copied for the input section. */ - bfd_size_type pc_count; -}; - /* Of those relocs that might be copied as dynamic relocs, this function selects those that must be copied when linking a shared library, even when the symbol is local. */ @@ -3671,7 +3643,7 @@ struct ppc_link_hash_entry } u; /* Track dynamic relocs copied for this symbol. */ - struct ppc_dyn_relocs *dyn_relocs; + struct elf_dyn_relocs *dyn_relocs; /* Link between function code and descriptor symbols. */ struct ppc_link_hash_entry *oh; @@ -3720,6 +3692,9 @@ struct ppc_link_hash_table /* Another hash table for plt_branch stubs. */ struct bfd_hash_table branch_hash_table; + /* Hash table for function prologue tocsave. */ + htab_t tocsave_htab; + /* Linker stub bfd. */ bfd *stub_bfd; @@ -3767,6 +3742,7 @@ struct ppc_link_hash_table asection *sfpr; asection *brlt; asection *relbrlt; + asection *glink_eh_frame; /* Shortcut to .__tls_get_addr and __tls_get_addr. */ struct ppc_link_hash_entry *tls_get_addr; @@ -3781,6 +3757,9 @@ struct ppc_link_hash_table /* Number of stubs against global syms. */ unsigned long stub_globals; + /* Set if PLT call stubs should load r11. */ + unsigned int plt_static_chain:1; + /* Set if we should emit symbols for stubs. */ unsigned int emit_stub_syms:1; @@ -3962,6 +3941,26 @@ link_hash_newfunc (struct bfd_hash_entry *entry, return entry; } +struct tocsave_entry { + asection *sec; + bfd_vma offset; +}; + +static hashval_t +tocsave_htab_hash (const void *p) +{ + const struct tocsave_entry *e = (const struct tocsave_entry *) p; + return ((bfd_vma)(intptr_t) e->sec ^ e->offset) >> 3; +} + +static int +tocsave_htab_eq (const void *p1, const void *p2) +{ + const struct tocsave_entry *e1 = (const struct tocsave_entry *) p1; + const struct tocsave_entry *e2 = (const struct tocsave_entry *) p2; + return e1->sec == e2->sec && e1->offset == e2->offset; +} + /* Create a ppc64 ELF linker hash table. */ static struct bfd_link_hash_table * @@ -3992,6 +3991,13 @@ ppc64_elf_link_hash_table_create (bfd *abfd) sizeof (struct ppc_branch_hash_entry))) return NULL; + htab->tocsave_htab = htab_try_create (1024, + tocsave_htab_hash, + tocsave_htab_eq, + NULL); + if (htab->tocsave_htab == NULL) + return NULL; + /* Initializing two fields of the union is just cosmetic. We really only care about glist, but when compiled on a 32-bit host the bfd_vma fields are larger. Setting the bfd_vma to zero makes @@ -4013,10 +4019,12 @@ ppc64_elf_link_hash_table_create (bfd *abfd) static void ppc64_elf_link_hash_table_free (struct bfd_link_hash_table *hash) { - struct ppc_link_hash_table *ret = (struct ppc_link_hash_table *) hash; + struct ppc_link_hash_table *htab = (struct ppc_link_hash_table *) hash; - bfd_hash_table_free (&ret->stub_hash_table); - bfd_hash_table_free (&ret->branch_hash_table); + bfd_hash_table_free (&htab->stub_hash_table); + bfd_hash_table_free (&htab->branch_hash_table); + if (htab->tocsave_htab) + htab_delete (htab->tocsave_htab); _bfd_generic_link_hash_table_free (hash); } @@ -4136,8 +4144,9 @@ ppc_get_stub_entry (const asection *input_section, static struct ppc_stub_hash_entry * ppc_add_stub (const char *stub_name, asection *section, - struct ppc_link_hash_table *htab) + struct bfd_link_info *info) { + struct ppc_link_hash_table *htab = ppc_hash_table (info); asection *link_sec; asection *stub_sec; struct ppc_stub_hash_entry *stub_entry; @@ -4174,8 +4183,8 @@ ppc_add_stub (const char *stub_name, TRUE, FALSE); if (stub_entry == NULL) { - (*_bfd_error_handler) (_("%B: cannot create stub entry %s"), - section->owner, stub_name); + info->callbacks->einfo (_("%P: %B: cannot create stub entry %s\n"), + section->owner, stub_name); return NULL; } @@ -4213,6 +4222,18 @@ create_linkage_sections (bfd *dynobj, struct bfd_link_info *info) || ! bfd_set_section_alignment (dynobj, htab->glink, 3)) return FALSE; + if (!info->no_ld_generated_unwind_info) + { + flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_HAS_CONTENTS + | SEC_IN_MEMORY | SEC_LINKER_CREATED); + htab->glink_eh_frame = bfd_make_section_anyway_with_flags (dynobj, + ".eh_frame", + flags); + if (htab->glink_eh_frame == NULL + || !bfd_set_section_alignment (abfd, htab->glink_eh_frame, 2)) + return FALSE; + } + flags = SEC_ALLOC | SEC_LINKER_CREATED; htab->iplt = bfd_make_section_anyway_with_flags (dynobj, ".iplt", flags); if (htab->iplt == NULL @@ -4395,19 +4416,42 @@ ppc64_elf_copy_indirect_symbol (struct bfd_link_info *info, edir = (struct ppc_link_hash_entry *) dir; eind = (struct ppc_link_hash_entry *) ind; + edir->is_func |= eind->is_func; + edir->is_func_descriptor |= eind->is_func_descriptor; + edir->tls_mask |= eind->tls_mask; + if (eind->oh != NULL) + edir->oh = ppc_follow_link (eind->oh); + + /* If called to transfer flags for a weakdef during processing + of elf_adjust_dynamic_symbol, don't copy NON_GOT_REF. + We clear it ourselves for ELIMINATE_COPY_RELOCS. */ + if (!(ELIMINATE_COPY_RELOCS + && eind->elf.root.type != bfd_link_hash_indirect + && edir->elf.dynamic_adjusted)) + edir->elf.non_got_ref |= eind->elf.non_got_ref; + + edir->elf.ref_dynamic |= eind->elf.ref_dynamic; + edir->elf.ref_regular |= eind->elf.ref_regular; + edir->elf.ref_regular_nonweak |= eind->elf.ref_regular_nonweak; + edir->elf.needs_plt |= eind->elf.needs_plt; + + /* If we were called to copy over info for a weak sym, that's all. */ + if (eind->elf.root.type != bfd_link_hash_indirect) + return; + /* Copy over any dynamic relocs we may have on the indirect sym. */ if (eind->dyn_relocs != NULL) { if (edir->dyn_relocs != NULL) { - struct ppc_dyn_relocs **pp; - struct ppc_dyn_relocs *p; + struct elf_dyn_relocs **pp; + struct elf_dyn_relocs *p; /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) { - struct ppc_dyn_relocs *q; + struct elf_dyn_relocs *q; for (q = edir->dyn_relocs; q != NULL; q = q->next) if (q->sec == p->sec) @@ -4427,29 +4471,6 @@ ppc64_elf_copy_indirect_symbol (struct bfd_link_info *info, eind->dyn_relocs = NULL; } - edir->is_func |= eind->is_func; - edir->is_func_descriptor |= eind->is_func_descriptor; - edir->tls_mask |= eind->tls_mask; - if (eind->oh != NULL) - edir->oh = ppc_follow_link (eind->oh); - - /* If called to transfer flags for a weakdef during processing - of elf_adjust_dynamic_symbol, don't copy NON_GOT_REF. - We clear it ourselves for ELIMINATE_COPY_RELOCS. */ - if (!(ELIMINATE_COPY_RELOCS - && eind->elf.root.type != bfd_link_hash_indirect - && edir->elf.dynamic_adjusted)) - edir->elf.non_got_ref |= eind->elf.non_got_ref; - - edir->elf.ref_dynamic |= eind->elf.ref_dynamic; - edir->elf.ref_regular |= eind->elf.ref_regular; - edir->elf.ref_regular_nonweak |= eind->elf.ref_regular_nonweak; - edir->elf.needs_plt |= eind->elf.needs_plt; - - /* If we were called to copy over info for a weak sym, that's all. */ - if (eind->elf.root.type != bfd_link_hash_indirect) - return; - /* Copy over got entries that we may have already seen to the symbol which just became indirect. */ if (eind->elf.got.glist != NULL) @@ -5403,8 +5424,8 @@ ppc64_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, || (!info->shared && ifunc != NULL)) { - struct ppc_dyn_relocs *p; - struct ppc_dyn_relocs **head; + struct elf_dyn_relocs *p; + struct elf_dyn_relocs **head; /* We must copy these reloc types into the output file. Create a reloc section in dynobj and make room for @@ -5443,7 +5464,7 @@ ppc64_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, s = sec; vpp = &elf_section_data (s)->local_dynrel; - head = (struct ppc_dyn_relocs **) vpp; + head = (struct elf_dyn_relocs **) vpp; } p = *head; @@ -5686,9 +5707,6 @@ ppc64_elf_gc_mark_dynamic_ref (struct elf_link_hash_entry *h, void *inf) struct ppc_link_hash_entry *eh = (struct ppc_link_hash_entry *) h; struct ppc_link_hash_entry *fdh; - if (eh->elf.root.type == bfd_link_hash_warning) - eh = (struct ppc_link_hash_entry *) eh->elf.root.u.i.link; - /* Dynamic linking info is on the func descriptor sym. */ fdh = defined_func_desc (eh); if (fdh != NULL) @@ -5700,7 +5718,10 @@ ppc64_elf_gc_mark_dynamic_ref (struct elf_link_hash_entry *h, void *inf) || (!info->executable && eh->elf.def_regular && ELF_ST_VISIBILITY (eh->elf.other) != STV_INTERNAL - && ELF_ST_VISIBILITY (eh->elf.other) != STV_HIDDEN))) + && ELF_ST_VISIBILITY (eh->elf.other) != STV_HIDDEN + && (strchr (eh->elf.root.root.string, ELF_VER_CHR) != NULL + || !bfd_hide_sym_by_version (info->version_info, + eh->elf.root.root.string))))) { asection *code_sec; struct ppc_link_hash_entry *fh; @@ -5852,8 +5873,8 @@ ppc64_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, if (r_symndx >= symtab_hdr->sh_info) { struct ppc_link_hash_entry *eh; - struct ppc_dyn_relocs **pp; - struct ppc_dyn_relocs *p; + struct elf_dyn_relocs **pp; + struct elf_dyn_relocs *p; h = sym_hashes[r_symndx - symtab_hdr->sh_info]; h = elf_follow_link (h); @@ -6231,9 +6252,6 @@ func_desc_adjust (struct elf_link_hash_entry *h, void *inf) if (fh->elf.root.type == bfd_link_hash_indirect) return TRUE; - if (fh->elf.root.type == bfd_link_hash_warning) - fh = (struct ppc_link_hash_entry *) fh->elf.root.u.i.link; - info = inf; htab = ppc_hash_table (info); if (htab == NULL) @@ -6471,7 +6489,7 @@ ppc64_elf_adjust_dynamic_symbol (struct bfd_link_info *info, if (ELIMINATE_COPY_RELOCS) { struct ppc_link_hash_entry * eh; - struct ppc_dyn_relocs *p; + struct elf_dyn_relocs *p; eh = (struct ppc_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) @@ -6497,9 +6515,9 @@ ppc64_elf_adjust_dynamic_symbol (struct bfd_link_info *info, function pointers, vtable refs and suchlike in read-only sections. Allow them to proceed, but warn that this might break at runtime. */ - (*_bfd_error_handler) - (_("copy reloc against `%s' requires lazy plt linking; " - "avoid setting LD_BIND_NOW=1 or upgrade gcc"), + info->callbacks->einfo + (_("%P: copy reloc against `%s' requires lazy plt linking; " + "avoid setting LD_BIND_NOW=1 or upgrade gcc\n"), h->root.root.string); } @@ -6508,8 +6526,8 @@ ppc64_elf_adjust_dynamic_symbol (struct bfd_link_info *info, if (h->size == 0) { - (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"), - h->root.root.string); + info->callbacks->einfo (_("%P: dynamic variable `%s' is zero size\n"), + h->root.root.string); return TRUE; } @@ -6746,6 +6764,55 @@ get_tls_mask (unsigned char **tls_maskp, return 1; } +/* Find (or create) an entry in the tocsave hash table. */ + +static struct tocsave_entry * +tocsave_find (struct ppc_link_hash_table *htab, + enum insert_option insert, + Elf_Internal_Sym **local_syms, + const Elf_Internal_Rela *irela, + bfd *ibfd) +{ + unsigned long r_indx; + struct elf_link_hash_entry *h; + Elf_Internal_Sym *sym; + struct tocsave_entry ent, *p; + hashval_t hash; + struct tocsave_entry **slot; + + r_indx = ELF64_R_SYM (irela->r_info); + if (!get_sym_h (&h, &sym, &ent.sec, NULL, local_syms, r_indx, ibfd)) + return NULL; + if (ent.sec == NULL || ent.sec->output_section == NULL) + { + (*_bfd_error_handler) + (_("%B: undefined symbol on R_PPC64_TOCSAVE relocation")); + return NULL; + } + + if (h != NULL) + ent.offset = h->root.u.def.value; + else + ent.offset = sym->st_value; + ent.offset += irela->r_addend; + + hash = tocsave_htab_hash (&ent); + slot = ((struct tocsave_entry **) + htab_find_slot_with_hash (htab->tocsave_htab, &ent, hash, insert)); + if (slot == NULL) + return NULL; + + if (*slot == NULL) + { + p = (struct tocsave_entry *) bfd_alloc (ibfd, sizeof (*p)); + if (p == NULL) + return NULL; + *p = ent; + *slot = p; + } + return *slot; +} + /* Adjust all global syms defined in opd sections. In gcc generated code for the old ABI, these will already have been done. */ @@ -6759,9 +6826,6 @@ adjust_opd_syms (struct elf_link_hash_entry *h, void *inf ATTRIBUTE_UNUSED) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (h->root.type != bfd_link_hash_defined && h->root.type != bfd_link_hash_defweak) return TRUE; @@ -6811,8 +6875,8 @@ dec_dynrel_count (bfd_vma r_info, asection *sym_sec) { enum elf_ppc64_reloc_type r_type; - struct ppc_dyn_relocs *p; - struct ppc_dyn_relocs **pp; + struct elf_dyn_relocs *p; + struct elf_dyn_relocs **pp; /* Can this reloc be dynamic? This switch, and later tests here should be kept in sync with the code in check_relocs. */ @@ -6897,12 +6961,12 @@ dec_dynrel_count (bfd_vma r_info, if (sym_sec != NULL) { void *vpp = &elf_section_data (sym_sec)->local_dynrel; - pp = (struct ppc_dyn_relocs **) vpp; + pp = (struct elf_dyn_relocs **) vpp; } else { void *vpp = &elf_section_data (sec)->local_dynrel; - pp = (struct ppc_dyn_relocs **) vpp; + pp = (struct elf_dyn_relocs **) vpp; } /* elf_gc_sweep may have already removed all dyn relocs associated @@ -6926,8 +6990,8 @@ dec_dynrel_count (bfd_vma r_info, pp = &p->next; } - (*_bfd_error_handler) (_("dynreloc miscount for %B, section %A"), - sec->owner, sec); + info->callbacks->einfo (_("%P: dynreloc miscount for %B, section %A\n"), + sec->owner, sec); bfd_set_error (bfd_error_bad_value); return FALSE; } @@ -7598,7 +7662,7 @@ ppc64_elf_tls_optimize (struct bfd_link_info *info) && !found_tls_get_addr_arg && is_branch_reloc (r_type)) { - info->callbacks->minfo (_("%C __tls_get_addr lost arg, " + info->callbacks->minfo (_("%H __tls_get_addr lost arg, " "TLS optimization disabled\n"), ibfd, sec, rel->r_offset); ret = TRUE; @@ -7792,7 +7856,7 @@ ppc64_elf_tls_optimize (struct bfd_link_info *info) could just mark this symbol to exclude it from tls optimization but it's safer to skip the entire optimization. */ - info->callbacks->minfo (_("%C arg lost __tls_get_addr, " + info->callbacks->minfo (_("%H arg lost __tls_get_addr, " "TLS optimization disabled\n"), ibfd, sec, rel->r_offset); ret = TRUE; @@ -7919,12 +7983,6 @@ adjust_toc_syms (struct elf_link_hash_entry *h, void *inf) struct adjust_toc_info *toc_inf = (struct adjust_toc_info *) inf; unsigned long i; - if (h->root.type == bfd_link_hash_indirect) - return TRUE; - - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (h->root.type != bfd_link_hash_defined && h->root.type != bfd_link_hash_defweak) return TRUE; @@ -7959,6 +8017,32 @@ adjust_toc_syms (struct elf_link_hash_entry *h, void *inf) return TRUE; } +/* Return TRUE iff INSN is one we expect on a _LO variety toc/got reloc. */ + +static bfd_boolean +ok_lo_toc_insn (unsigned int insn) +{ + return ((insn & (0x3f << 26)) == 14u << 26 /* addi */ + || (insn & (0x3f << 26)) == 32u << 26 /* lwz */ + || (insn & (0x3f << 26)) == 34u << 26 /* lbz */ + || (insn & (0x3f << 26)) == 36u << 26 /* stw */ + || (insn & (0x3f << 26)) == 38u << 26 /* stb */ + || (insn & (0x3f << 26)) == 40u << 26 /* lhz */ + || (insn & (0x3f << 26)) == 42u << 26 /* lha */ + || (insn & (0x3f << 26)) == 44u << 26 /* sth */ + || (insn & (0x3f << 26)) == 46u << 26 /* lmw */ + || (insn & (0x3f << 26)) == 47u << 26 /* stmw */ + || (insn & (0x3f << 26)) == 48u << 26 /* lfs */ + || (insn & (0x3f << 26)) == 50u << 26 /* lfd */ + || (insn & (0x3f << 26)) == 52u << 26 /* stfs */ + || (insn & (0x3f << 26)) == 54u << 26 /* stfd */ + || ((insn & (0x3f << 26)) == 58u << 26 /* lwa,ld,lmd */ + && (insn & 3) != 1) + || ((insn & (0x3f << 26)) == 62u << 26 /* std, stmd */ + && ((insn & 3) == 0 || (insn & 3) == 3)) + || (insn & (0x3f << 26)) == 12u << 26 /* addic */); +} + /* Examine all relocs referencing .toc sections in order to remove unused .toc entries. */ @@ -8213,10 +8297,66 @@ ppc64_elf_edit_toc (struct bfd_link_info *info) struct elf_link_hash_entry *h; Elf_Internal_Sym *sym; bfd_vma val; + enum {no_check, check_lo, check_ha} insn_check; r_type = ELF64_R_TYPE (rel->r_info); switch (r_type) { + default: + insn_check = no_check; + break; + + case R_PPC64_GOT_TLSLD16_HA: + case R_PPC64_GOT_TLSGD16_HA: + case R_PPC64_GOT_TPREL16_HA: + case R_PPC64_GOT_DTPREL16_HA: + case R_PPC64_GOT16_HA: + case R_PPC64_TOC16_HA: + insn_check = check_ha; + break; + + case R_PPC64_GOT_TLSLD16_LO: + case R_PPC64_GOT_TLSGD16_LO: + case R_PPC64_GOT_TPREL16_LO_DS: + case R_PPC64_GOT_DTPREL16_LO_DS: + case R_PPC64_GOT16_LO: + case R_PPC64_GOT16_LO_DS: + case R_PPC64_TOC16_LO: + case R_PPC64_TOC16_LO_DS: + insn_check = check_lo; + break; + } + + if (insn_check != no_check) + { + bfd_vma off = rel->r_offset & ~3; + unsigned char buf[4]; + unsigned int insn; + + if (!bfd_get_section_contents (ibfd, sec, buf, off, 4)) + { + free (used); + goto error_ret; + } + insn = bfd_get_32 (ibfd, buf); + if (insn_check == check_lo + ? !ok_lo_toc_insn (insn) + : ((insn & ((0x3f << 26) | 0x1f << 16)) + != ((15u << 26) | (2 << 16)) /* addis rt,2,imm */)) + { + char str[12]; + + ppc64_elf_tdata (ibfd)->unexpected_toc_insn = 1; + sprintf (str, "%#08x", insn); + info->callbacks->einfo + (_("%P: %H: toc optimization is not supported for" + " %s instruction.\n"), + ibfd, sec, rel->r_offset & ~3, str); + } + } + + switch (r_type) + { case R_PPC64_TOC16: case R_PPC64_TOC16_LO: case R_PPC64_TOC16_HI: @@ -8264,7 +8404,10 @@ ppc64_elf_edit_toc (struct bfd_link_info *info) case R_PPC64_TOC16_LO_DS: off = rel->r_offset + (bfd_big_endian (ibfd) ? -2 : 3); if (!bfd_get_section_contents (ibfd, sec, &opc, off, 1)) - return FALSE; + { + free (used); + goto error_ret; + } if ((opc & (0x3f << 2)) == (58u << 2)) break; /* Fall thru */ @@ -8308,7 +8451,7 @@ ppc64_elf_edit_toc (struct bfd_link_info *info) some_unused = 1; last = 0; } - else if (*drop) + else if ((*drop & ref_from_discarded) != 0) { some_unused = 1; last = ref_from_discarded; @@ -8426,7 +8569,15 @@ ppc64_elf_edit_toc (struct bfd_link_info *info) break; default: - abort (); + if (!ppc64_elf_howto_table[R_PPC64_ADDR32]) + ppc_howto_init (); + info->callbacks->einfo + (_("%P: %H: %s relocation references " + "optimized away TOC entry\n"), + ibfd, sec, rel->r_offset, + ppc64_elf_howto_table[r_type]->name); + bfd_set_error (bfd_error_bad_value); + goto error_ret; } rel->r_addend = tocrel->r_addend; elf_section_data (sec)->relocs = relstart; @@ -8614,15 +8765,12 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) struct ppc_link_hash_table *htab; asection *s; struct ppc_link_hash_entry *eh; - struct ppc_dyn_relocs *p; + struct elf_dyn_relocs *p; struct got_entry **pgent, *gent; if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - info = (struct bfd_link_info *) inf; htab = ppc_hash_table (info); if (htab == NULL) @@ -8778,7 +8926,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) then they should avoid writing weird assembly. */ if (SYMBOL_CALLS_LOCAL (info, h)) { - struct ppc_dyn_relocs **pp; + struct elf_dyn_relocs **pp; for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) { @@ -8861,10 +9009,7 @@ static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) { struct ppc_link_hash_entry *eh; - struct ppc_dyn_relocs *p; - - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; + struct elf_dyn_relocs *p; eh = (struct ppc_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) @@ -8936,7 +9081,7 @@ ppc64_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, for (s = ibfd->sections; s != NULL; s = s->next) { - struct ppc_dyn_relocs *p; + struct elf_dyn_relocs *p; for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next) { @@ -9086,6 +9231,12 @@ ppc64_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, /* Strip this section if we don't need it; see the comment below. */ } + else if (s == htab->glink_eh_frame) + { + if (!bfd_is_abs_section (s->output_section)) + /* Not sized yet. */ + continue; + } else if (CONST_STRNEQ (s->name, ".rela")) { if (s->size != 0) @@ -9317,7 +9468,8 @@ ppc_type_of_stub (asection *input_sec, /* Build a .plt call stub. */ static inline bfd_byte * -build_plt_stub (bfd *obfd, bfd_byte *p, int offset, Elf_Internal_Rela *r) +build_plt_stub (bfd *obfd, bfd_byte *p, int offset, Elf_Internal_Rela *r, + bfd_boolean plt_static_chain) { #define PPC_LO(v) ((v) & 0xffff) #define PPC_HI(v) (((v) >> 16) & 0xffff) @@ -9327,11 +9479,12 @@ build_plt_stub (bfd *obfd, bfd_byte *p, int offset, Elf_Internal_Rela *r) { if (r != NULL) { + r[0].r_offset += 4; r[0].r_info = ELF64_R_INFO (0, R_PPC64_TOC16_HA); - r[1].r_offset = r[0].r_offset + 8; + r[1].r_offset = r[0].r_offset + 4; r[1].r_info = ELF64_R_INFO (0, R_PPC64_TOC16_LO_DS); r[1].r_addend = r[0].r_addend; - if (PPC_HA (offset + 16) != PPC_HA (offset)) + if (PPC_HA (offset + 8 + 8 * plt_static_chain) != PPC_HA (offset)) { r[2].r_offset = r[1].r_offset + 4; r[2].r_info = ELF64_R_INFO (0, R_PPC64_TOC16_LO); @@ -9342,22 +9495,26 @@ build_plt_stub (bfd *obfd, bfd_byte *p, int offset, Elf_Internal_Rela *r) r[2].r_offset = r[1].r_offset + 8; r[2].r_info = ELF64_R_INFO (0, R_PPC64_TOC16_LO_DS); r[2].r_addend = r[0].r_addend + 8; - r[3].r_offset = r[2].r_offset + 4; - r[3].r_info = ELF64_R_INFO (0, R_PPC64_TOC16_LO_DS); - r[3].r_addend = r[0].r_addend + 16; + if (plt_static_chain) + { + r[3].r_offset = r[2].r_offset + 4; + r[3].r_info = ELF64_R_INFO (0, R_PPC64_TOC16_LO_DS); + r[3].r_addend = r[0].r_addend + 16; + } } } - bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (offset), p), p += 4; bfd_put_32 (obfd, STD_R2_40R1, p), p += 4; + bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (offset), p), p += 4; bfd_put_32 (obfd, LD_R11_0R12 | PPC_LO (offset), p), p += 4; - if (PPC_HA (offset + 16) != PPC_HA (offset)) + if (PPC_HA (offset + 8 + 8 * plt_static_chain) != PPC_HA (offset)) { bfd_put_32 (obfd, ADDI_R12_R12 | PPC_LO (offset), p), p += 4; offset = 0; } bfd_put_32 (obfd, MTCTR_R11, p), p += 4; bfd_put_32 (obfd, LD_R2_0R12 | PPC_LO (offset + 8), p), p += 4; - bfd_put_32 (obfd, LD_R11_0R12 | PPC_LO (offset + 16), p), p += 4; + if (plt_static_chain) + bfd_put_32 (obfd, LD_R11_0R12 | PPC_LO (offset + 16), p), p += 4; bfd_put_32 (obfd, BCTR, p), p += 4; } else @@ -9366,7 +9523,7 @@ build_plt_stub (bfd *obfd, bfd_byte *p, int offset, Elf_Internal_Rela *r) { r[0].r_offset += 4; r[0].r_info = ELF64_R_INFO (0, R_PPC64_TOC16_DS); - if (PPC_HA (offset + 16) != PPC_HA (offset)) + if (PPC_HA (offset + 8 + 8 * plt_static_chain) != PPC_HA (offset)) { r[1].r_offset = r[0].r_offset + 4; r[1].r_info = ELF64_R_INFO (0, R_PPC64_TOC16); @@ -9376,21 +9533,25 @@ build_plt_stub (bfd *obfd, bfd_byte *p, int offset, Elf_Internal_Rela *r) { r[1].r_offset = r[0].r_offset + 8; r[1].r_info = ELF64_R_INFO (0, R_PPC64_TOC16_DS); - r[1].r_addend = r[0].r_addend + 16; - r[2].r_offset = r[1].r_offset + 4; - r[2].r_info = ELF64_R_INFO (0, R_PPC64_TOC16_DS); - r[2].r_addend = r[0].r_addend + 8; + r[1].r_addend = r[0].r_addend + 8 + 8 * plt_static_chain; + if (plt_static_chain) + { + r[2].r_offset = r[1].r_offset + 4; + r[2].r_info = ELF64_R_INFO (0, R_PPC64_TOC16_DS); + r[2].r_addend = r[0].r_addend + 8; + } } } bfd_put_32 (obfd, STD_R2_40R1, p), p += 4; bfd_put_32 (obfd, LD_R11_0R2 | PPC_LO (offset), p), p += 4; - if (PPC_HA (offset + 16) != PPC_HA (offset)) + if (PPC_HA (offset + 8 + 8 * plt_static_chain) != PPC_HA (offset)) { bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (offset), p), p += 4; offset = 0; } bfd_put_32 (obfd, MTCTR_R11, p), p += 4; - bfd_put_32 (obfd, LD_R11_0R2 | PPC_LO (offset + 16), p), p += 4; + if (plt_static_chain) + bfd_put_32 (obfd, LD_R11_0R2 | PPC_LO (offset + 16), p), p += 4; bfd_put_32 (obfd, LD_R2_0R2 | PPC_LO (offset + 8), p), p += 4; bfd_put_32 (obfd, BCTR, p), p += 4; } @@ -9415,7 +9576,7 @@ build_plt_stub (bfd *obfd, bfd_byte *p, int offset, Elf_Internal_Rela *r) static inline bfd_byte * build_tls_get_addr_stub (bfd *obfd, bfd_byte *p, int offset, - Elf_Internal_Rela *r) + Elf_Internal_Rela *r, bfd_boolean plt_static_chain) { bfd_put_32 (obfd, LD_R11_0R3 + 0, p), p += 4; bfd_put_32 (obfd, LD_R12_0R3 + 8, p), p += 4; @@ -9429,7 +9590,7 @@ build_tls_get_addr_stub (bfd *obfd, bfd_byte *p, int offset, if (r != NULL) r[0].r_offset += 9 * 4; - p = build_plt_stub (obfd, p, offset, r); + p = build_plt_stub (obfd, p, offset, r, plt_static_chain); bfd_put_32 (obfd, BCTRL, p - 4); bfd_put_32 (obfd, LD_R11_0R1 + 32, p), p += 4; @@ -9471,9 +9632,10 @@ get_relocs (asection *sec, int count) } static bfd_vma -get_r2off (struct ppc_link_hash_table *htab, +get_r2off (struct bfd_link_info *info, struct ppc_stub_hash_entry *stub_entry) { + struct ppc_link_hash_table *htab = ppc_hash_table (info); bfd_vma r2off = htab->stub_group[stub_entry->target_section->id].toc_off; if (r2off == 0) @@ -9487,15 +9649,15 @@ get_r2off (struct ppc_link_hash_table *htab, if (strcmp (opd->name, ".opd") != 0 || opd->reloc_count != 0) { - (*_bfd_error_handler) (_("cannot find opd entry toc for %s"), - stub_entry->h->elf.root.root.string); + info->callbacks->einfo (_("%P: cannot find opd entry toc for %s\n"), + stub_entry->h->elf.root.root.string); bfd_set_error (bfd_error_bad_value); return 0; } if (!bfd_get_section_contents (opd->owner, opd, buf, opd_off + 8, 8)) return 0; r2off = bfd_get_64 (opd->owner, buf); - r2off -= elf_gp (stub_entry->id_sec->output_section->owner); + r2off -= elf_gp (info->output_bfd); } r2off -= htab->stub_group[stub_entry->id_sec->id].toc_off; return r2off; @@ -9545,7 +9707,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) size = 4; if (stub_entry->stub_type == ppc_stub_long_branch_r2off) { - bfd_vma r2off = get_r2off (htab, stub_entry); + bfd_vma r2off = get_r2off (info, stub_entry); if (r2off == 0) { @@ -9569,8 +9731,8 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) if (off + (1 << 25) >= (bfd_vma) (1 << 26)) { - (*_bfd_error_handler) (_("long branch stub `%s' offset overflow"), - stub_entry->root.string); + info->callbacks->einfo (_("%P: long branch stub `%s' offset overflow\n"), + stub_entry->root.string); htab->stub_error = TRUE; return FALSE; } @@ -9628,8 +9790,8 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) FALSE, FALSE); if (br_entry == NULL) { - (*_bfd_error_handler) (_("can't find branch stub `%s'"), - stub_entry->root.string); + info->callbacks->einfo (_("%P: can't find branch stub `%s'\n"), + stub_entry->root.string); htab->stub_error = TRUE; return FALSE; } @@ -9689,8 +9851,8 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) if (off + 0x80008000 > 0xffffffff || (off & 7) != 0) { - (*_bfd_error_handler) - (_("linkage table error against `%s'"), + info->callbacks->einfo + (_("%P: linkage table error against `%s'\n"), stub_entry->root.string); bfd_set_error (bfd_error_bad_value); htab->stub_error = TRUE; @@ -9735,7 +9897,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) } else { - bfd_vma r2off = get_r2off (htab, stub_entry); + bfd_vma r2off = get_r2off (info, stub_entry); if (r2off == 0) { @@ -9789,6 +9951,8 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) these checks could now disappear. */ if (fh->elf.root.type == bfd_link_hash_undefined) fh->elf.root.type = bfd_link_hash_undefweak; + /* Stop undo_symbol_twiddle changing it back to undefined. */ + fh->was_undefined = 0; } /* Now build the stub. */ @@ -9829,8 +9993,8 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) if (off + 0x80008000 > 0xffffffff || (off & 7) != 0) { - (*_bfd_error_handler) - (_("linkage table error against `%s'"), + info->callbacks->einfo + (_("%P: linkage table error against `%s'\n"), stub_entry->h != NULL ? stub_entry->h->elf.root.root.string : ""); @@ -9843,8 +10007,10 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) if (info->emitrelocations) { r = get_relocs (stub_entry->stub_sec, - (2 + (PPC_HA (off) != 0) - + (PPC_HA (off + 16) == PPC_HA (off)))); + (2 + + (PPC_HA (off) != 0) + + (htab->plt_static_chain + && PPC_HA (off + 16) == PPC_HA (off)))); if (r == NULL) return FALSE; r[0].r_offset = loc - stub_entry->stub_sec->contents; @@ -9856,9 +10022,11 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) && (stub_entry->h == htab->tls_get_addr_fd || stub_entry->h == htab->tls_get_addr) && !htab->no_tls_get_addr_opt) - p = build_tls_get_addr_stub (htab->stub_bfd, loc, off, r); + p = build_tls_get_addr_stub (htab->stub_bfd, loc, off, r, + htab->plt_static_chain); else - p = build_plt_stub (htab->stub_bfd, loc, off, r); + p = build_plt_stub (htab->stub_bfd, loc, off, r, + htab->plt_static_chain); size = p - loc; break; @@ -9945,9 +10113,11 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) - htab->stub_group[stub_entry->id_sec->id].toc_off); size = PLT_CALL_STUB_SIZE; + if (!htab->plt_static_chain) + size -= 4; if (PPC_HA (off) == 0) size -= 4; - if (PPC_HA (off + 16) != PPC_HA (off)) + if (PPC_HA (off + 8 + 8 * htab->plt_static_chain) != PPC_HA (off)) size += 4; if (stub_entry->h != NULL && (stub_entry->h == htab->tls_get_addr_fd @@ -9957,7 +10127,10 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) if (info->emitrelocations) { stub_entry->stub_sec->reloc_count - += 2 + (PPC_HA (off) != 0) + (PPC_HA (off + 16) == PPC_HA (off)); + += (2 + + (PPC_HA (off) != 0) + + (htab->plt_static_chain + && PPC_HA (off + 16) == PPC_HA (off))); stub_entry->stub_sec->flags |= SEC_RELOC; } } @@ -9982,7 +10155,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) size = 4; if (stub_entry->stub_type == ppc_stub_long_branch_r2off) { - r2off = get_r2off (htab, stub_entry); + r2off = get_r2off (info, stub_entry); if (r2off == 0) { htab->stub_error = TRUE; @@ -10004,8 +10177,8 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) TRUE, FALSE); if (br_entry == NULL) { - (*_bfd_error_handler) (_("can't build branch stub `%s'"), - stub_entry->root.string); + info->callbacks->einfo (_("%P: can't build branch stub `%s'\n"), + stub_entry->root.string); htab->stub_error = TRUE; return FALSE; } @@ -10231,9 +10404,6 @@ merge_global_got (struct elf_link_hash_entry *h, void *inf ATTRIBUTE_UNUSED) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - merge_got_entries (&h->got.glist); return TRUE; @@ -10250,9 +10420,6 @@ reallocate_got (struct elf_link_hash_entry *h, void *inf) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - for (gent = h->got.glist; gent != NULL; gent = gent->next) if (!gent->is_indirect) allocate_got (h, (struct bfd_link_info *) inf, gent); @@ -10883,6 +11050,40 @@ group_sections (struct ppc_link_hash_table *htab, #undef PREV_SEC } +static const unsigned char glink_eh_frame_cie[] = +{ + 0, 0, 0, 16, /* length. */ + 0, 0, 0, 0, /* id. */ + 1, /* CIE version. */ + 'z', 'R', 0, /* Augmentation string. */ + 4, /* Code alignment. */ + 0x78, /* Data alignment. */ + 65, /* RA reg. */ + 1, /* Augmentation size. */ + DW_EH_PE_pcrel | DW_EH_PE_sdata4, /* FDE encoding. */ + DW_CFA_def_cfa, 1, 0 /* def_cfa: r1 offset 0. */ +}; + +/* Stripping output sections is normally done before dynamic section + symbols have been allocated. This function is called later, and + handles cases like htab->brlt which is mapped to its own output + section. */ + +static void +maybe_strip_output (struct bfd_link_info *info, asection *isec) +{ + if (isec->size == 0 + && isec->output_section->size == 0 + && !bfd_section_removed_from_list (info->output_bfd, + isec->output_section) + && elf_section_data (isec->output_section)->dynindx == 0) + { + isec->output_section->flags |= SEC_EXCLUDE; + bfd_section_list_remove (info->output_bfd, isec->output_section); + info->output_bfd->section_count--; + } +} + /* Determine and set the size of the stub section for a final link. The basic idea here is to examine all the relocations looking for @@ -10890,7 +11091,8 @@ group_sections (struct ppc_link_hash_table *htab, instruction. */ bfd_boolean -ppc64_elf_size_stubs (struct bfd_link_info *info, bfd_signed_vma group_size) +ppc64_elf_size_stubs (struct bfd_link_info *info, bfd_signed_vma group_size, + bfd_boolean plt_static_chain) { bfd_size_type stub_group_size; bfd_boolean stubs_always_before_branch; @@ -10899,6 +11101,7 @@ ppc64_elf_size_stubs (struct bfd_link_info *info, bfd_signed_vma group_size) if (htab == NULL) return FALSE; + htab->plt_static_chain = plt_static_chain; stubs_always_before_branch = group_size < 0; if (group_size < 0) stub_group_size = -group_size; @@ -11130,6 +11333,14 @@ ppc64_elf_size_stubs (struct bfd_link_info *info, bfd_signed_vma group_size) continue; } + if (stub_type == ppc_stub_plt_call + && irela + 1 < irelaend + && irela[1].r_offset == irela->r_offset + 4 + && ELF64_R_TYPE (irela[1].r_info) == R_PPC64_TOCSAVE + && !tocsave_find (htab, INSERT, + &local_syms, irela + 1, input_bfd)) + goto error_ret_free_internal; + /* Support for grouping stub sections. */ id_sec = htab->stub_group[section->id].link_sec; @@ -11147,7 +11358,7 @@ ppc64_elf_size_stubs (struct bfd_link_info *info, bfd_signed_vma group_size) continue; } - stub_entry = ppc_add_stub (stub_name, section, htab); + stub_entry = ppc_add_stub (stub_name, section, info); if (stub_entry == NULL) { free (stub_name); @@ -11224,6 +11435,25 @@ ppc64_elf_size_stubs (struct bfd_link_info *info, bfd_signed_vma group_size) htab->glink->flags |= SEC_RELOC; } + if (htab->glink_eh_frame != NULL + && !bfd_is_abs_section (htab->glink_eh_frame->output_section) + && (htab->glink_eh_frame->flags & SEC_EXCLUDE) == 0) + { + bfd_size_type size = 0; + + for (stub_sec = htab->stub_bfd->sections; + stub_sec != NULL; + stub_sec = stub_sec->next) + if ((stub_sec->flags & SEC_LINKER_CREATED) == 0) + size += 20; + if (htab->glink != NULL && htab->glink->size != 0) + size += 24; + if (size != 0) + size += sizeof (glink_eh_frame_cie); + htab->glink_eh_frame->rawsize = htab->glink_eh_frame->size; + htab->glink_eh_frame->size = size; + } + for (stub_sec = htab->stub_bfd->sections; stub_sec != NULL; stub_sec = stub_sec->next) @@ -11233,17 +11463,18 @@ ppc64_elf_size_stubs (struct bfd_link_info *info, bfd_signed_vma group_size) /* Exit from this loop when no stubs have been added, and no stubs have changed size. */ - if (stub_sec == NULL) + if (stub_sec == NULL + && (htab->glink_eh_frame == NULL + || htab->glink_eh_frame->rawsize == htab->glink_eh_frame->size)) break; /* Ask the linker to do its stuff. */ (*htab->layout_sections_again) (); } - /* It would be nice to strip htab->brlt from the output if the - section is empty, but it's too late. If we strip sections here, - the dynamic symbol table is corrupted since the section symbol - for the stripped section isn't written. */ + maybe_strip_output (info, htab->brlt); + if (htab->glink_eh_frame != NULL) + maybe_strip_output (info, htab->glink_eh_frame); return TRUE; } @@ -11448,6 +11679,100 @@ ppc64_elf_build_stubs (bfd_boolean emit_stub_syms, return FALSE; } + if (htab->glink_eh_frame != NULL + && htab->glink_eh_frame->size != 0) + { + bfd_vma val; + + p = bfd_zalloc (htab->glink_eh_frame->owner, htab->glink_eh_frame->size); + if (p == NULL) + return FALSE; + htab->glink_eh_frame->contents = p; + + htab->glink_eh_frame->rawsize = htab->glink_eh_frame->size; + + memcpy (p, glink_eh_frame_cie, sizeof (glink_eh_frame_cie)); + /* CIE length (rewrite in case little-endian). */ + bfd_put_32 (htab->elf.dynobj, sizeof (glink_eh_frame_cie) - 4, p); + p += sizeof (glink_eh_frame_cie); + + for (stub_sec = htab->stub_bfd->sections; + stub_sec != NULL; + stub_sec = stub_sec->next) + if ((stub_sec->flags & SEC_LINKER_CREATED) == 0) + { + /* FDE length. */ + bfd_put_32 (htab->elf.dynobj, 16, p); + p += 4; + /* CIE pointer. */ + val = p - htab->glink_eh_frame->contents; + bfd_put_32 (htab->elf.dynobj, val, p); + p += 4; + /* Offset to stub section. */ + val = (stub_sec->output_section->vma + + stub_sec->output_offset); + val -= (htab->glink_eh_frame->output_section->vma + + htab->glink_eh_frame->output_offset); + val -= p - htab->glink_eh_frame->contents; + if (val + 0x80000000 > 0xffffffff) + { + info->callbacks->einfo + (_("%P: %s offset too large for .eh_frame sdata4 encoding"), + stub_sec->name); + return FALSE; + } + bfd_put_32 (htab->elf.dynobj, val, p); + p += 4; + /* stub section size. */ + bfd_put_32 (htab->elf.dynobj, stub_sec->rawsize, p); + p += 4; + /* Augmentation. */ + p += 1; + /* Pad. */ + p += 3; + } + if (htab->glink != NULL && htab->glink->size != 0) + { + /* FDE length. */ + bfd_put_32 (htab->elf.dynobj, 20, p); + p += 4; + /* CIE pointer. */ + val = p - htab->glink_eh_frame->contents; + bfd_put_32 (htab->elf.dynobj, val, p); + p += 4; + /* Offset to .glink. */ + val = (htab->glink->output_section->vma + + htab->glink->output_offset + + 8); + val -= (htab->glink_eh_frame->output_section->vma + + htab->glink_eh_frame->output_offset); + val -= p - htab->glink_eh_frame->contents; + if (val + 0x80000000 > 0xffffffff) + { + info->callbacks->einfo + (_("%P: %s offset too large for .eh_frame sdata4 encoding"), + htab->glink->name); + return FALSE; + } + bfd_put_32 (htab->elf.dynobj, val, p); + p += 4; + /* .glink size. */ + bfd_put_32 (htab->elf.dynobj, htab->glink->rawsize - 8, p); + p += 4; + /* Augmentation. */ + p += 1; + + *p++ = DW_CFA_advance_loc + 1; + *p++ = DW_CFA_register; + *p++ = 65; + *p++ = 12; + *p++ = DW_CFA_advance_loc + 4; + *p++ = DW_CFA_restore_extended; + *p++ = 65; + } + htab->glink_eh_frame->size = p - htab->glink_eh_frame->contents; + } + /* Build the stubs as directed by the stub hash table. */ bfd_hash_traverse (&htab->stub_hash_table, ppc_build_one_stub, info); @@ -11465,10 +11790,12 @@ ppc64_elf_build_stubs (bfd_boolean emit_stub_syms, } if (stub_sec != NULL - || htab->glink->rawsize != htab->glink->size) + || htab->glink->rawsize != htab->glink->size + || (htab->glink_eh_frame != NULL + && htab->glink_eh_frame->rawsize != htab->glink_eh_frame->size)) { htab->stub_error = TRUE; - (*_bfd_error_handler) (_("stubs don't match calculated size")); + info->callbacks->einfo (_("%P: stubs don't match calculated size\n")); } if (htab->stub_error) @@ -11507,9 +11834,6 @@ undo_symbol_twiddle (struct elf_link_hash_entry *h, void *inf ATTRIBUTE_UNUSED) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct ppc_link_hash_entry *) h; if (eh->elf.root.type != bfd_link_hash_undefweak || !eh->was_undefined) return TRUE; @@ -11545,63 +11869,6 @@ ppc64_elf_action_discarded (asection *sec) return _bfd_elf_default_action_discarded (sec); } -/* REL points to a low-part reloc on a largetoc instruction sequence. - Find the matching high-part reloc instruction and verify that it - is addis REG,x,imm. If so, set *REG to x and return a pointer to - the high-part reloc. */ - -static const Elf_Internal_Rela * -ha_reloc_match (const Elf_Internal_Rela *relocs, - const Elf_Internal_Rela *rel, - unsigned int *reg, - bfd_boolean match_addend, - const bfd *input_bfd, - const bfd_byte *contents) -{ - enum elf_ppc64_reloc_type r_type, r_type_ha; - bfd_vma r_info_ha, r_addend; - - r_type = ELF64_R_TYPE (rel->r_info); - switch (r_type) - { - case R_PPC64_GOT_TLSLD16_LO: - case R_PPC64_GOT_TLSGD16_LO: - case R_PPC64_GOT_TPREL16_LO_DS: - case R_PPC64_GOT_DTPREL16_LO_DS: - case R_PPC64_GOT16_LO: - case R_PPC64_TOC16_LO: - r_type_ha = r_type + 2; - break; - case R_PPC64_GOT16_LO_DS: - r_type_ha = R_PPC64_GOT16_HA; - break; - case R_PPC64_TOC16_LO_DS: - r_type_ha = R_PPC64_TOC16_HA; - break; - default: - abort (); - } - r_info_ha = ELF64_R_INFO (ELF64_R_SYM (rel->r_info), r_type_ha); - r_addend = rel->r_addend; - - while (--rel >= relocs) - if (rel->r_info == r_info_ha - && (!match_addend - || rel->r_addend == r_addend)) - { - const bfd_byte *p = contents + (rel->r_offset & ~3); - unsigned int insn = bfd_get_32 (input_bfd, p); - if ((insn & (0x3f << 26)) == (15u << 26) /* addis rt,x,imm */ - && (insn & (0x1f << 21)) == (*reg << 21)) - { - *reg = (insn >> 16) & 0x1f; - return rel; - } - break; - } - return NULL; -} - /* The RELOCATE_SECTION function is called by the ELF backend linker to handle the relocations for a section. @@ -11649,9 +11916,7 @@ ppc64_elf_relocate_section (bfd *output_bfd, Elf_Internal_Rela outrel; bfd_byte *loc; struct got_entry **local_got_ents; - unsigned char *ha_opt; bfd_vma TOCstart; - bfd_boolean no_ha_opt; bfd_boolean ret = TRUE; bfd_boolean is_opd; /* Disabled until we sort out how ld should choose 'y' vs 'at'. */ @@ -11677,8 +11942,6 @@ ppc64_elf_relocate_section (bfd *output_bfd, symtab_hdr = &elf_symtab_hdr (input_bfd); sym_hashes = elf_sym_hashes (input_bfd); is_opd = ppc64_elf_section_data (input_section)->sec_type == sec_opd; - ha_opt = NULL; - no_ha_opt = FALSE; rel = relocs; relend = relocs + input_section->reloc_count; @@ -11828,13 +12091,11 @@ ppc64_elf_relocate_section (bfd *output_bfd, /* R_PPC64_TLS is OK against a symbol in the TOC. */ ; else - (*_bfd_error_handler) + info->callbacks->einfo (!IS_PPC64_TLS_RELOC (r_type) - ? _("%B(%A+0x%lx): %s used with TLS symbol %s") - : _("%B(%A+0x%lx): %s used with non-TLS symbol %s"), - input_bfd, - input_section, - (long) rel->r_offset, + ? _("%P: %H: %s used with TLS symbol %s\n") + : _("%P: %H: %s used with non-TLS symbol %s\n"), + input_bfd, input_section, rel->r_offset, ppc64_elf_howto_table[r_type]->name, sym_name); } @@ -12244,6 +12505,21 @@ ppc64_elf_relocate_section (bfd *output_bfd, default: break; + case R_PPC64_TOCSAVE: + if (relocation + addend == (rel->r_offset + + input_section->output_offset + + input_section->output_section->vma) + && tocsave_find (htab, NO_INSERT, + &local_syms, rel, input_bfd)) + { + insn = bfd_get_32 (input_bfd, contents + rel->r_offset); + if (insn == NOP + || insn == CROR_151515 || insn == CROR_313131) + bfd_put_32 (input_bfd, STD_R2_40R1, + contents + rel->r_offset); + } + break; + /* Branch taken prediction relocations. */ case R_PPC64_ADDR14_BRTAKEN: case R_PPC64_REL14_BRTAKEN: @@ -12330,23 +12606,19 @@ ppc64_elf_relocate_section (bfd *output_bfd, ".init") == 0 || strcmp (input_section->output_section->name, ".fini") == 0) - (*_bfd_error_handler) - (_("%B(%A+0x%lx): automatic multiple TOCs " + info->callbacks->einfo + (_("%P: %H: automatic multiple TOCs " "not supported using your crt files; " - "recompile with -mminimal-toc or upgrade gcc"), - input_bfd, - input_section, - (long) rel->r_offset); + "recompile with -mminimal-toc or upgrade gcc\n"), + input_bfd, input_section, rel->r_offset); else - (*_bfd_error_handler) - (_("%B(%A+0x%lx): sibling call optimization to `%s' " + info->callbacks->einfo + (_("%P: %H: sibling call optimization to `%s' " "does not allow automatic multiple TOCs; " "recompile with -mminimal-toc or " "-fno-optimize-sibling-calls, " - "or make `%s' extern"), - input_bfd, - input_section, - (long) rel->r_offset, + "or make `%s' extern\n"), + input_bfd, input_section, rel->r_offset, sym_name, sym_name); bfd_set_error (bfd_error_bad_value); @@ -12400,6 +12672,12 @@ ppc64_elf_relocate_section (bfd *output_bfd, + stub_entry->stub_sec->output_offset + stub_entry->stub_sec->output_section->vma); addend = 0; + + if (stub_entry->stub_type == ppc_stub_plt_call + && rel + 1 < relend + && rel[1].r_offset == rel->r_offset + 4 + && ELF64_R_TYPE (rel[1].r_info) == R_PPC64_TOCSAVE) + relocation += 4; } if (insn != 0) @@ -12447,8 +12725,8 @@ ppc64_elf_relocate_section (bfd *output_bfd, switch (r_type) { default: - (*_bfd_error_handler) - (_("%B: unknown relocation type %d for symbol %s"), + info->callbacks->einfo + (_("%P: %B: unknown relocation type %d for symbol %s\n"), input_bfd, (int) r_type, sym_name); bfd_set_error (bfd_error_bad_value); @@ -12459,6 +12737,7 @@ ppc64_elf_relocate_section (bfd *output_bfd, case R_PPC64_TLS: case R_PPC64_TLSGD: case R_PPC64_TLSLD: + case R_PPC64_TOCSAVE: case R_PPC64_GNU_VTINHERIT: case R_PPC64_GNU_VTENTRY: continue; @@ -12952,12 +13231,10 @@ ppc64_elf_relocate_section (bfd *output_bfd, ? h->elf.type == STT_GNU_IFUNC : ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC) { - (*_bfd_error_handler) - (_("%B(%A+0x%lx): relocation %s for indirect " - "function %s unsupported"), - input_bfd, - input_section, - (long) rel->r_offset, + info->callbacks->einfo + (_("%P: %H: relocation %s for indirect " + "function %s unsupported\n"), + input_bfd, input_section, rel->r_offset, ppc64_elf_howto_table[r_type]->name, sym_name); ret = FALSE; @@ -13059,8 +13336,8 @@ ppc64_elf_relocate_section (bfd *output_bfd, case R_PPC64_PLTREL64: /* These ones haven't been implemented yet. */ - (*_bfd_error_handler) - (_("%B: relocation %s is not supported for symbol %s."), + info->callbacks->einfo + (_("%P: %B: relocation %s is not supported for symbol %s\n"), input_bfd, ppc64_elf_howto_table[r_type]->name, sym_name); @@ -13098,7 +13375,12 @@ ppc64_elf_relocate_section (bfd *output_bfd, case R_PPC64_GOT_DTPREL16_HA: case R_PPC64_GOT16_HA: case R_PPC64_TOC16_HA: - /* nop is done later. */ + if (htab->do_toc_opt && relocation + addend + 0x8000 < 0x10000 + && !ppc64_elf_tdata (input_bfd)->unexpected_toc_insn) + { + bfd_byte *p = contents + (rel->r_offset & ~3); + bfd_put_32 (input_bfd, NOP, p); + } break; case R_PPC64_GOT_TLSLD16_LO: @@ -13109,56 +13391,23 @@ ppc64_elf_relocate_section (bfd *output_bfd, case R_PPC64_GOT16_LO_DS: case R_PPC64_TOC16_LO: case R_PPC64_TOC16_LO_DS: - if (htab->do_toc_opt && relocation + addend + 0x8000 < 0x10000) + if (htab->do_toc_opt && relocation + addend + 0x8000 < 0x10000 + && !ppc64_elf_tdata (input_bfd)->unexpected_toc_insn) { bfd_byte *p = contents + (rel->r_offset & ~3); insn = bfd_get_32 (input_bfd, p); - if ((insn & (0x3f << 26)) == 14u << 26 /* addi */ - || (insn & (0x3f << 26)) == 32u << 26 /* lwz */ - || (insn & (0x3f << 26)) == 34u << 26 /* lbz */ - || (insn & (0x3f << 26)) == 36u << 26 /* stw */ - || (insn & (0x3f << 26)) == 38u << 26 /* stb */ - || (insn & (0x3f << 26)) == 40u << 26 /* lhz */ - || (insn & (0x3f << 26)) == 42u << 26 /* lha */ - || (insn & (0x3f << 26)) == 44u << 26 /* sth */ - || (insn & (0x3f << 26)) == 46u << 26 /* lmw */ - || (insn & (0x3f << 26)) == 47u << 26 /* stmw */ - || (insn & (0x3f << 26)) == 48u << 26 /* lfs */ - || (insn & (0x3f << 26)) == 50u << 26 /* lfd */ - || (insn & (0x3f << 26)) == 52u << 26 /* stfs */ - || (insn & (0x3f << 26)) == 54u << 26 /* stfd */ - || ((insn & (0x3f << 26)) == 58u << 26 /* lwa,ld,lmd */ - && (insn & 3) != 1) - || ((insn & (0x3f << 26)) == 62u << 26 /* std, stmd */ - && ((insn & 3) == 0 || (insn & 3) == 3))) + if ((insn & (0x3f << 26)) == 12u << 26 /* addic */) { - unsigned int reg = (insn >> 16) & 0x1f; - const Elf_Internal_Rela *ha; - bfd_boolean match_addend; - - match_addend = (sym != NULL - && ELF_ST_TYPE (sym->st_info) == STT_SECTION); - ha = ha_reloc_match (relocs, rel, ®, match_addend, - input_bfd, contents); - if (ha != NULL) - { - insn &= ~(0x1f << 16); - insn |= reg << 16; - bfd_put_32 (input_bfd, insn, p); - if (ha_opt == NULL) - { - ha_opt = bfd_zmalloc (input_section->reloc_count); - if (ha_opt == NULL) - return FALSE; - } - ha_opt[ha - relocs] = 1; - } - else - /* If we don't find a matching high part insn, - something is fishy. Refuse to nop any high - part insn in this section. */ - no_ha_opt = TRUE; + /* Transform addic to addi when we change reg. */ + insn &= ~((0x3f << 26) | (0x1f << 16)); + insn |= (14u << 26) | (2 << 16); } + else + { + insn &= ~(0x1f << 16); + insn |= 2 << 16; + } + bfd_put_32 (input_bfd, insn, p); } break; } @@ -13236,9 +13485,9 @@ ppc64_elf_relocate_section (bfd *output_bfd, mask = 15; if (((relocation + addend) & mask) != 0) { - (*_bfd_error_handler) - (_("%B(%A+0x%lx): error: %s not a multiple of %u"), - input_bfd, input_section, (long) rel->r_offset, + info->callbacks->einfo + (_("%P: %H: error: %s not a multiple of %u\n"), + input_bfd, input_section, rel->r_offset, ppc64_elf_howto_table[r_type]->name, mask + 1); bfd_set_error (bfd_error_bad_value); @@ -13255,11 +13504,9 @@ ppc64_elf_relocate_section (bfd *output_bfd, && !((input_section->flags & SEC_DEBUGGING) != 0 && h->elf.def_dynamic)) { - (*_bfd_error_handler) - (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"), - input_bfd, - input_section, - (long) rel->r_offset, + info->callbacks->einfo + (_("%P: %H: unresolvable %s relocation against symbol `%s'\n"), + input_bfd, input_section, rel->r_offset, ppc64_elf_howto_table[(int) r_type]->name, h->elf.root.root.string); ret = FALSE; @@ -13302,11 +13549,9 @@ ppc64_elf_relocate_section (bfd *output_bfd, } else { - (*_bfd_error_handler) - (_("%B(%A+0x%lx): %s reloc against `%s': error %d"), - input_bfd, - input_section, - (long) rel->r_offset, + info->callbacks->einfo + (_("%P: %H: %s reloc against `%s': error %d\n"), + input_bfd, input_section, rel->r_offset, ppc64_elf_howto_table[r_type]->name, sym_name, (int) r); @@ -13315,23 +13560,6 @@ ppc64_elf_relocate_section (bfd *output_bfd, } } - if (ha_opt != NULL) - { - if (!no_ha_opt) - { - unsigned char *opt = ha_opt; - rel = relocs; - relend = relocs + input_section->reloc_count; - for (; rel < relend; opt++, rel++) - if (*opt != 0) - { - bfd_byte *p = contents + (rel->r_offset & ~3); - bfd_put_32 (input_bfd, NOP, p); - } - } - free (ha_opt); - } - /* If we're emitting relocations, then shortly after this function returns, reloc offsets and addends for this section will be adjusted. Worse, reloc symbol indices will be for the output @@ -13629,6 +13857,14 @@ ppc64_elf_finish_dynamic_sections (bfd *output_bfd, NULL)) return FALSE; + + if (htab->glink_eh_frame != NULL + && htab->glink_eh_frame->sec_info_type == ELF_INFO_TYPE_EH_FRAME + && !_bfd_elf_write_section_eh_frame (output_bfd, info, + htab->glink_eh_frame, + htab->glink_eh_frame->contents)) + return FALSE; + /* We need to handle writing out multiple GOT sections ourselves, since we didn't add them to DYNOBJ. We know dynobj is the first bfd. */ diff --git a/bfd/elf64-ppc.h b/bfd/elf64-ppc.h index c905d30..9026c56 100644 --- a/bfd/elf64-ppc.h +++ b/bfd/elf64-ppc.h @@ -1,5 +1,5 @@ /* PowerPC64-specific support for 64-bit ELF. - Copyright 2002, 2003, 2004, 2005, 2007, 2008, 2010 + Copyright 2002, 2003, 2004, 2005, 2007, 2008, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -49,7 +49,7 @@ bfd_boolean ppc64_elf_check_init_fini bfd_boolean ppc64_elf_next_input_section (struct bfd_link_info *, asection *); bfd_boolean ppc64_elf_size_stubs - (struct bfd_link_info *, bfd_signed_vma); + (struct bfd_link_info *, bfd_signed_vma, bfd_boolean); bfd_boolean ppc64_elf_build_stubs (bfd_boolean, struct bfd_link_info *, char **); void ppc64_elf_restore_symbols diff --git a/bfd/elf64-s390.c b/bfd/elf64-s390.c index 671cb93..9884da0 100644 --- a/bfd/elf64-s390.c +++ b/bfd/elf64-s390.c @@ -1,6 +1,6 @@ /* IBM S/390-specific support for 64-bit ELF Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, - 2010 Free Software Foundation, Inc. + 2010, 2011 Free Software Foundation, Inc. Contributed Martin Schwidefsky (schwidefsky@de.ibm.com). This file is part of BFD, the Binary File Descriptor library. @@ -1680,12 +1680,6 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - info = (struct bfd_link_info *) inf; htab = elf_s390_hash_table (info); if (htab == NULL) @@ -1907,9 +1901,6 @@ readonly_dynrelocs (h, inf) struct elf_s390_link_hash_entry *eh; struct elf_s390_dyn_relocs *p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct elf_s390_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) { diff --git a/bfd/elf64-sh64.c b/bfd/elf64-sh64.c index 9692304..bbef2a2 100644 --- a/bfd/elf64-sh64.c +++ b/bfd/elf64-sh64.c @@ -1,6 +1,6 @@ /* SuperH SH64-specific support for 64-bit ELF Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, - 2010 Free Software Foundation, Inc. + 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -3422,9 +3422,6 @@ sh64_elf64_discard_copies (struct elf_sh64_link_hash_entry *h, { struct elf_sh64_pcrel_relocs_copied *s; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct elf_sh64_link_hash_entry *) h->root.root.u.i.link; - /* We only discard relocs for symbols defined in a regular object. */ if (!h->root.def_regular) return TRUE; diff --git a/bfd/elf64-sparc.c b/bfd/elf64-sparc.c index c4e97a7..f5bfe75 100644 --- a/bfd/elf64-sparc.c +++ b/bfd/elf64-sparc.c @@ -1,6 +1,7 @@ /* SPARC-specific support for 64-bit ELF Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, - 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 + Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -714,7 +715,7 @@ elf64_sparc_merge_private_bfd_data (bfd *ibfd, bfd *obfd) return FALSE; } } - return TRUE; + return _bfd_sparc_elf_merge_private_bfd_data (ibfd, obfd); } /* MARCO: Set the correct entry size for the .stab section. */ diff --git a/bfd/elf64-tilegx.c b/bfd/elf64-tilegx.c new file mode 100644 index 0000000..e30ca80 --- /dev/null +++ b/bfd/elf64-tilegx.c @@ -0,0 +1,132 @@ +/* TILE-Gx-specific support for 64-bit ELF. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" +#include "elf-bfd.h" +#include "elfxx-tilegx.h" +#include "elf64-tilegx.h" + + +/* Support for core dump NOTE sections. */ + +static bfd_boolean +tilegx_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) +{ + int offset; + size_t size; + + if (note->descsz != TILEGX_PRSTATUS_SIZEOF) + return FALSE; + + /* pr_cursig */ + elf_tdata (abfd)->core_signal = + bfd_get_16 (abfd, note->descdata + TILEGX_PRSTATUS_OFFSET_PR_CURSIG); + + /* pr_pid */ + elf_tdata (abfd)->core_pid = + bfd_get_32 (abfd, note->descdata + TILEGX_PRSTATUS_OFFSET_PR_PID); + + /* pr_reg */ + offset = TILEGX_PRSTATUS_OFFSET_PR_REG; + size = TILEGX_GREGSET_T_SIZE; + + /* Make a ".reg/999" section. */ + return _bfd_elfcore_make_pseudosection (abfd, ".reg", + size, note->descpos + offset); +} + +static bfd_boolean +tilegx_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) +{ + if (note->descsz != TILEGX_PRPSINFO_SIZEOF) + return FALSE; + + elf_tdata (abfd)->core_program + = _bfd_elfcore_strndup (abfd, note->descdata + TILEGX_PRPSINFO_OFFSET_PR_FNAME, 16); + elf_tdata (abfd)->core_command + = _bfd_elfcore_strndup (abfd, note->descdata + TILEGX_PRPSINFO_OFFSET_PR_PSARGS, ELF_PR_PSARGS_SIZE); + + + /* Note that for some reason, a spurious space is tacked + onto the end of the args in some (at least one anyway) + implementations, so strip it off if it exists. */ + { + char *command = elf_tdata (abfd)->core_command; + int n = strlen (command); + + if (0 < n && command[n - 1] == ' ') + command[n - 1] = '\0'; + } + + return TRUE; +} + + +#define ELF_ARCH bfd_arch_tilegx +#define ELF_TARGET_ID TILEGX_ELF_DATA +#define ELF_MACHINE_CODE EM_TILEGX +#define ELF_MAXPAGESIZE 0x10000 +#define ELF_COMMONPAGESIZE 0x10000 + +#define TARGET_LITTLE_SYM bfd_elf64_tilegx_vec +#define TARGET_LITTLE_NAME "elf64-tilegx" + +#define elf_backend_reloc_type_class tilegx_reloc_type_class + +#define bfd_elf64_bfd_reloc_name_lookup tilegx_reloc_name_lookup +#define bfd_elf64_bfd_link_hash_table_create tilegx_elf_link_hash_table_create +#define bfd_elf64_bfd_reloc_type_lookup tilegx_reloc_type_lookup +#define bfd_elf64_bfd_merge_private_bfd_data \ + _bfd_tilegx_elf_merge_private_bfd_data + +#define elf_backend_copy_indirect_symbol tilegx_elf_copy_indirect_symbol +#define elf_backend_create_dynamic_sections tilegx_elf_create_dynamic_sections +#define elf_backend_check_relocs tilegx_elf_check_relocs +#define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol +#define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections +#define elf_backend_relocate_section tilegx_elf_relocate_section +#define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol +#define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +#define elf_backend_gc_mark_hook tilegx_elf_gc_mark_hook +#define elf_backend_gc_sweep_hook tilegx_elf_gc_sweep_hook +#define elf_backend_plt_sym_val tilegx_elf_plt_sym_val +#define elf_info_to_howto_rel NULL +#define elf_info_to_howto tilegx_info_to_howto_rela +#define elf_backend_grok_prstatus tilegx_elf_grok_prstatus +#define elf_backend_grok_psinfo tilegx_elf_grok_psinfo +#define elf_backend_additional_program_headers tilegx_additional_program_headers + +#define elf_backend_init_index_section _bfd_elf_init_1_index_section + +#define elf_backend_can_gc_sections 1 +#define elf_backend_can_refcount 1 +#define elf_backend_want_got_plt 1 +#define elf_backend_plt_readonly 1 +/* Align PLT mod 64 byte L2 line size. */ +#define elf_backend_plt_alignment 6 +#define elf_backend_want_plt_sym 1 +#define elf_backend_got_header_size 8 +#define elf_backend_rela_normal 1 +#define elf_backend_default_execstack 0 + +#include "elf64-target.h" diff --git a/bfd/elf64-tilegx.h b/bfd/elf64-tilegx.h new file mode 100644 index 0000000..91a7c75 --- /dev/null +++ b/bfd/elf64-tilegx.h @@ -0,0 +1,38 @@ +/* TILE-Gx-specific support for 64-bit ELF. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#ifndef _ELF64_TILEGX_H +#define _ELF64_TILEGX_H + +/* This file contains sizes and offsets of Linux data structures. */ + +#define TILEGX_PRSTATUS_SIZEOF 632 +#define TILEGX_PRSTATUS_OFFSET_PR_CURSIG 12 +#define TILEGX_PRSTATUS_OFFSET_PR_PID 32 +#define TILEGX_PRSTATUS_OFFSET_PR_REG 112 + +#define TILEGX_PRPSINFO_SIZEOF 136 +#define TILEGX_PRPSINFO_OFFSET_PR_FNAME 40 +#define TILEGX_PRPSINFO_OFFSET_PR_PSARGS 56 +#define ELF_PR_PSARGS_SIZE 80 + +#define TILEGX_GREGSET_T_SIZE 512 + +#endif /* _ELF64_TILEGX_H */ diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c index 84ee101..3a2444b 100644 --- a/bfd/elf64-x86-64.c +++ b/bfd/elf64-x86-64.c @@ -29,9 +29,16 @@ #include "bfd_stdint.h" #include "objalloc.h" #include "hashtab.h" +#include "dwarf2.h" +#include "libiberty.h" #include "elf/x86-64.h" +#ifdef CORE_HEADER +#include +#include CORE_HEADER +#endif + /* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */ #define MINUS_ONE (~ (bfd_vma) 0) @@ -157,6 +164,9 @@ static reloc_howto_type x86_64_elf_howto_table[] = HOWTO(R_X86_64_IRELATIVE, 0, 4, 64, FALSE, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_X86_64_IRELATIVE", FALSE, MINUS_ONE, MINUS_ONE, FALSE), + HOWTO(R_X86_64_RELATIVE64, 0, 4, 64, FALSE, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_X86_64_RELATIVE64", FALSE, MINUS_ONE, + MINUS_ONE, FALSE), /* We have a gap in the reloc numbers here. R_X86_64_standard counts the number up to this point, and @@ -172,7 +182,12 @@ static reloc_howto_type x86_64_elf_howto_table[] = /* GNU extension to record C++ vtable member usage. */ HOWTO (R_X86_64_GNU_VTENTRY, 0, 4, 0, FALSE, 0, complain_overflow_dont, _bfd_elf_rel_vtable_reloc_fn, "R_X86_64_GNU_VTENTRY", FALSE, 0, 0, - FALSE) + FALSE), + +/* Use complain_overflow_bitfield on R_X86_64_32 for x32. */ + HOWTO(R_X86_64_32, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_X86_64_32", FALSE, 0xffffffff, 0xffffffff, + FALSE) }; #define IS_X86_64_PCREL_TYPE(TYPE) \ @@ -235,8 +250,15 @@ elf_x86_64_rtype_to_howto (bfd *abfd, unsigned r_type) { unsigned i; - if (r_type < (unsigned int) R_X86_64_GNU_VTINHERIT - || r_type >= (unsigned int) R_X86_64_max) + if (r_type == (unsigned int) R_X86_64_32) + { + if (ABI_64_P (abfd)) + i = r_type; + else + i = ARRAY_SIZE (x86_64_elf_howto_table) - 1; + } + else if (r_type < (unsigned int) R_X86_64_GNU_VTINHERIT + || r_type >= (unsigned int) R_X86_64_max) { if (r_type >= (unsigned int) R_X86_64_standard) { @@ -270,15 +292,21 @@ elf_x86_64_reloc_type_lookup (bfd *abfd, } static reloc_howto_type * -elf_x86_64_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, +elf_x86_64_reloc_name_lookup (bfd *abfd, const char *r_name) { unsigned int i; - for (i = 0; - i < (sizeof (x86_64_elf_howto_table) - / sizeof (x86_64_elf_howto_table[0])); - i++) + if (!ABI_64_P (abfd) && strcasecmp (r_name, "R_X86_64_32") == 0) + { + /* Get x32 R_X86_64_32. */ + reloc_howto_type *reloc + = &x86_64_elf_howto_table[ARRAY_SIZE (x86_64_elf_howto_table) - 1]; + BFD_ASSERT (reloc->type == (unsigned int) R_X86_64_32); + return reloc; + } + + for (i = 0; i < ARRAY_SIZE (x86_64_elf_howto_table); i++) if (x86_64_elf_howto_table[i].name != NULL && strcasecmp (x86_64_elf_howto_table[i].name, r_name) == 0) return &x86_64_elf_howto_table[i]; @@ -311,6 +339,19 @@ elf_x86_64_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) default: return FALSE; + case 296: /* sizeof(istruct elf_prstatus) on Linux/x32 */ + /* pr_cursig */ + elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12); + + /* pr_pid */ + elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24); + + /* pr_reg */ + offset = 72; + size = 216; + + break; + case 336: /* sizeof(istruct elf_prstatus) on Linux/x86_64 */ /* pr_cursig */ elf_tdata (abfd)->core_signal @@ -340,6 +381,15 @@ elf_x86_64_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) default: return FALSE; + case 124: /* sizeof(struct elf_prpsinfo) on Linux/x32 */ + elf_tdata (abfd)->core_pid + = bfd_get_32 (abfd, note->descdata + 12); + elf_tdata (abfd)->core_program + = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); + elf_tdata (abfd)->core_command + = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); + break; + case 136: /* sizeof(struct elf_prpsinfo) on Linux/x86_64 */ elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24); @@ -363,6 +413,99 @@ elf_x86_64_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) return TRUE; } + +#ifdef CORE_HEADER +static char * +elf_x86_64_write_core_note (bfd *abfd, char *buf, int *bufsiz, + int note_type, ...) +{ + const struct elf_backend_data *bed = get_elf_backend_data (abfd); + const void *p; + int size; + va_list ap; + const char *fname, *psargs; + long pid; + int cursig; + const void *gregs; + + switch (note_type) + { + default: + return NULL; + + case NT_PRPSINFO: + va_start (ap, note_type); + fname = va_arg (ap, const char *); + psargs = va_arg (ap, const char *); + va_end (ap); + + if (bed->s->elfclass == ELFCLASS32) + { + prpsinfo32_t data; + memset (&data, 0, sizeof (data)); + strncpy (data.pr_fname, fname, sizeof (data.pr_fname)); + strncpy (data.pr_psargs, psargs, sizeof (data.pr_psargs)); + p = (const void *) &data; + size = sizeof (data); + } + else + { + prpsinfo_t data; + memset (&data, 0, sizeof (data)); + strncpy (data.pr_fname, fname, sizeof (data.pr_fname)); + strncpy (data.pr_psargs, psargs, sizeof (data.pr_psargs)); + p = (const void *) &data; + size = sizeof (data); + } + break; + + case NT_PRSTATUS: + va_start (ap, note_type); + pid = va_arg (ap, long); + cursig = va_arg (ap, int); + gregs = va_arg (ap, const void *); + va_end (ap); + + if (bed->s->elfclass == ELFCLASS32) + { + if (bed->elf_machine_code == EM_X86_64) + { + prstatusx32_t prstat; + memset (&prstat, 0, sizeof (prstat)); + prstat.pr_pid = pid; + prstat.pr_cursig = cursig; + memcpy (&prstat.pr_reg, gregs, sizeof (prstat.pr_reg)); + p = (const void *) &prstat; + size = sizeof (prstat); + } + else + { + prstatus32_t prstat; + memset (&prstat, 0, sizeof (prstat)); + prstat.pr_pid = pid; + prstat.pr_cursig = cursig; + memcpy (&prstat.pr_reg, gregs, sizeof (prstat.pr_reg)); + p = (const void *) &prstat; + size = sizeof (prstat); + } + } + else + { + prstatus_t prstat; + memset (&prstat, 0, sizeof (prstat)); + prstat.pr_pid = pid; + prstat.pr_cursig = cursig; + memcpy (&prstat.pr_reg, gregs, sizeof (prstat.pr_reg)); + p = (const void *) &prstat; + size = sizeof (prstat); + } + break; + } + + return elfcore_write_note (abfd, buf, bufsiz, "CORE", note_type, p, + size); +} +#endif /* Functions for the x86-64 ELF linker. */ @@ -408,6 +551,45 @@ static const bfd_byte elf_x86_64_plt_entry[PLT_ENTRY_SIZE] = 0, 0, 0, 0 /* replaced with offset to start of .plt0. */ }; +/* .eh_frame covering the .plt section. */ + +static const bfd_byte elf_x86_64_eh_frame_plt[] = +{ +#define PLT_CIE_LENGTH 20 +#define PLT_FDE_LENGTH 36 +#define PLT_FDE_START_OFFSET 4 + PLT_CIE_LENGTH + 8 +#define PLT_FDE_LEN_OFFSET 4 + PLT_CIE_LENGTH + 12 + PLT_CIE_LENGTH, 0, 0, 0, /* CIE length */ + 0, 0, 0, 0, /* CIE ID */ + 1, /* CIE version */ + 'z', 'R', 0, /* Augmentation string */ + 1, /* Code alignment factor */ + 0x78, /* Data alignment factor */ + 16, /* Return address column */ + 1, /* Augmentation size */ + DW_EH_PE_pcrel | DW_EH_PE_sdata4, /* FDE encoding */ + DW_CFA_def_cfa, 7, 8, /* DW_CFA_def_cfa: r7 (rsp) ofs 8 */ + DW_CFA_offset + 16, 1, /* DW_CFA_offset: r16 (rip) at cfa-8 */ + DW_CFA_nop, DW_CFA_nop, + + PLT_FDE_LENGTH, 0, 0, 0, /* FDE length */ + PLT_CIE_LENGTH + 8, 0, 0, 0, /* CIE pointer */ + 0, 0, 0, 0, /* R_X86_64_PC32 .plt goes here */ + 0, 0, 0, 0, /* .plt size goes here */ + 0, /* Augmentation size */ + DW_CFA_def_cfa_offset, 16, /* DW_CFA_def_cfa_offset: 16 */ + DW_CFA_advance_loc + 6, /* DW_CFA_advance_loc: 6 to __PLT__+6 */ + DW_CFA_def_cfa_offset, 24, /* DW_CFA_def_cfa_offset: 24 */ + DW_CFA_advance_loc + 10, /* DW_CFA_advance_loc: 10 to __PLT__+16 */ + DW_CFA_def_cfa_expression, /* DW_CFA_def_cfa_expression */ + 11, /* Block length */ + DW_OP_breg7, 8, /* DW_OP_breg7 (rsp): 8 */ + DW_OP_breg16, 0, /* DW_OP_breg16 (rip): 0 */ + DW_OP_lit15, DW_OP_and, DW_OP_lit11, DW_OP_ge, + DW_OP_lit3, DW_OP_shl, DW_OP_plus, + DW_CFA_nop, DW_CFA_nop, DW_CFA_nop, DW_CFA_nop +}; + /* x86-64 ELF linker hash entry. */ struct elf_x86_64_link_hash_entry @@ -481,6 +663,7 @@ struct elf_x86_64_link_hash_table /* Short-cuts to get to dynamic linker sections. */ asection *sdynbss; asection *srelbss; + asection *plt_eh_frame; union { @@ -649,6 +832,7 @@ elf_x86_64_link_hash_table_create (bfd *abfd) ret->sdynbss = NULL; ret->srelbss = NULL; + ret->plt_eh_frame = NULL; ret->sym_cache.abfd = NULL; ret->tlsdesc_plt = 0; ret->tlsdesc_got = 0; @@ -727,6 +911,24 @@ elf_x86_64_create_dynamic_sections (bfd *dynobj, || (!info->shared && !htab->srelbss)) abort (); + if (!info->no_ld_generated_unwind_info + && bfd_get_section_by_name (dynobj, ".eh_frame") == NULL + && htab->elf.splt != NULL) + { + flagword flags = get_elf_backend_data (dynobj)->dynamic_sec_flags; + htab->plt_eh_frame + = bfd_make_section_with_flags (dynobj, ".eh_frame", + flags | SEC_READONLY); + if (htab->plt_eh_frame == NULL + || !bfd_set_section_alignment (dynobj, htab->plt_eh_frame, 3)) + return FALSE; + + htab->plt_eh_frame->size = sizeof (elf_x86_64_eh_frame_plt); + htab->plt_eh_frame->contents + = bfd_alloc (dynobj, htab->plt_eh_frame->size); + memcpy (htab->plt_eh_frame->contents, elf_x86_64_eh_frame_plt, + sizeof (elf_x86_64_eh_frame_plt)); + } return TRUE; } @@ -805,20 +1007,6 @@ elf64_x86_64_elf_object_p (bfd *abfd) return TRUE; } -typedef union - { - unsigned char c[2]; - uint16_t i; - } -x86_64_opcode16; - -typedef union - { - unsigned char c[4]; - uint32_t i; - } -x86_64_opcode32; - /* Return TRUE if the TLS access code sequence support transition from R_TYPE. */ @@ -874,24 +1062,23 @@ elf_x86_64_check_tls_transition (bfd *abfd, .word 0x6666; rex64; call __tls_get_addr can transit to different access model. */ - static x86_64_opcode32 call = { { 0x66, 0x66, 0x48, 0xe8 } }; + static const unsigned char call[] = { 0x66, 0x66, 0x48, 0xe8 }; + static const unsigned char leaq[] = { 0x66, 0x48, 0x8d, 0x3d }; + if ((offset + 12) > sec->size - || bfd_get_32 (abfd, contents + offset + 4) != call.i) + || memcmp (contents + offset + 4, call, 4) != 0) return FALSE; if (ABI_64_P (abfd)) { - static x86_64_opcode32 leaq = { { 0x66, 0x48, 0x8d, 0x3d } }; if (offset < 4 - || bfd_get_32 (abfd, contents + offset - 4) != leaq.i) + || memcmp (contents + offset - 4, leaq, 4) != 0) return FALSE; } else { - static x86_64_opcode16 lea = { { 0x8d, 0x3d } }; if (offset < 3 - || bfd_get_8 (abfd, contents + offset - 3) != 0x48 - || bfd_get_16 (abfd, contents + offset - 2) != lea.i) + || memcmp (contents + offset - 3, leaq + 1, 3) != 0) return FALSE; } } @@ -902,15 +1089,13 @@ elf_x86_64_check_tls_transition (bfd *abfd, call __tls_get_addr can transit to different access model. */ - static x86_64_opcode32 ld = { { 0x48, 0x8d, 0x3d, 0xe8 } }; - x86_64_opcode32 op; + static const unsigned char lea[] = { 0x48, 0x8d, 0x3d }; if (offset < 3 || (offset + 9) > sec->size) return FALSE; - op.i = bfd_get_32 (abfd, contents + offset - 3); - op.c[3] = bfd_get_8 (abfd, contents + offset + 4); - if (op.i != ld.i) + if (memcmp (contents + offset - 3, lea, 3) != 0 + || 0xe8 != *(contents + offset + 4)) return FALSE; } @@ -989,8 +1174,8 @@ elf_x86_64_check_tls_transition (bfd *abfd, if (offset + 2 <= sec->size) { /* Make sure that it's a call *x@tlsdesc(%rax). */ - static x86_64_opcode16 call = { { 0xff, 0x10 } }; - return bfd_get_16 (abfd, contents + offset) == call.i; + static const unsigned char call[] = { 0xff, 0x10 }; + return memcmp (contents + offset, call, 2) == 0; } return FALSE; @@ -1216,7 +1401,6 @@ elf_x86_64_check_relocs (bfd *abfd, struct bfd_link_info *info, default: break; - case R_X86_64_64: case R_X86_64_DTPOFF64: case R_X86_64_TPOFF64: case R_X86_64_PC64: @@ -1261,7 +1445,9 @@ elf_x86_64_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_X86_64_PLT32: case R_X86_64_GOTPCREL: case R_X86_64_GOTPCREL64: - if (!_bfd_elf_create_ifunc_sections (abfd, info)) + if (htab->elf.dynobj == NULL) + htab->elf.dynobj = abfd; + if (!_bfd_elf_create_ifunc_sections (htab->elf.dynobj, info)) return FALSE; break; } @@ -2030,8 +2216,6 @@ elf_x86_64_allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; eh = (struct elf_x86_64_link_hash_entry *) h; info = (struct bfd_link_info *) inf; @@ -2296,8 +2480,9 @@ elf_x86_64_readonly_dynrelocs (struct elf_link_hash_entry *h, struct elf_x86_64_link_hash_entry *eh; struct elf_dyn_relocs *p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; + /* Skip local IFUNC symbols. */ + if (h->forced_local && h->type == STT_GNU_IFUNC) + return TRUE; eh = (struct elf_x86_64_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) @@ -2310,6 +2495,11 @@ elf_x86_64_readonly_dynrelocs (struct elf_link_hash_entry *h, info->flags |= DF_TEXTREL; + if (info->warn_shared_textrel && info->shared) + info->callbacks->einfo (_("%P: %B: warning: relocation against `%s' in readonly section `%A'.\n"), + p->sec->owner, h->root.root.string, + p->sec); + /* Not an error, just cut short the traversal. */ return FALSE; } @@ -2388,8 +2578,14 @@ elf_x86_64_size_dynamic_sections (bfd *output_bfd, { srel = elf_section_data (p->sec)->sreloc; srel->size += p->count * bed->s->sizeof_rela; - if ((p->sec->output_section->flags & SEC_READONLY) != 0) - info->flags |= DF_TEXTREL; + if ((p->sec->output_section->flags & SEC_READONLY) != 0 + && (info->flags & DF_TEXTREL) == 0) + { + info->flags |= DF_TEXTREL; + if (info->warn_shared_textrel && info->shared) + info->callbacks->einfo (_("%P: %B: warning: relocation in readonly section `%A'.\n"), + p->sec->owner, p->sec); + } } } } @@ -2582,6 +2778,13 @@ elf_x86_64_size_dynamic_sections (bfd *output_bfd, return FALSE; } + if (htab->plt_eh_frame != NULL + && htab->elf.splt != NULL + && htab->elf.splt->size != 0 + && (htab->elf.splt->flags & SEC_EXCLUDE) == 0) + bfd_put_32 (dynobj, htab->elf.splt->size, + htab->plt_eh_frame->contents + PLT_FDE_LEN_OFFSET); + if (htab->elf.dynamic_sections_created) { /* Add some entries to the .dynamic section. We fill in the @@ -2816,7 +3019,12 @@ elf_x86_64_relocate_section (bfd *output_bfd, return FALSE; } - howto = x86_64_elf_howto_table + r_type; + if (r_type != (int) R_X86_64_32 + || ABI_64_P (output_bfd)) + howto = x86_64_elf_howto_table + r_type; + else + howto = (x86_64_elf_howto_table + + ARRAY_SIZE (x86_64_elf_howto_table) - 1); r_symndx = htab->r_sym (rel->r_info); h = NULL; sym = NULL; @@ -2861,6 +3069,16 @@ elf_x86_64_relocate_section (bfd *output_bfd, if (info->relocatable) continue; + if (rel->r_addend == 0 + && r_type == R_X86_64_64 + && !ABI_64_P (output_bfd)) + { + /* For x32, treat R_X86_64_64 like R_X86_64_32 and zero-extend + it to 64bit if addend is zero. */ + r_type = R_X86_64_32; + memset (contents + rel->r_offset + 4, 0, 4); + } + /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it here if it is defined in a non-shared object. */ if (h != NULL @@ -3375,6 +3593,14 @@ elf_x86_64_relocate_section (bfd *output_bfd, outrel.r_info = htab->r_info (0, R_X86_64_RELATIVE); outrel.r_addend = relocation + rel->r_addend; } + else if (r_type == R_X86_64_64 + && !ABI_64_P (output_bfd)) + { + relocate = TRUE; + outrel.r_info = htab->r_info (0, + R_X86_64_RELATIVE64); + outrel.r_addend = relocation + rel->r_addend; + } else { long sindx; @@ -3846,6 +4072,7 @@ elf_x86_64_relocate_section (bfd *output_bfd, break; case R_X86_64_TPOFF32: + case R_X86_64_TPOFF64: BFD_ASSERT (info->executable); relocation = elf_x86_64_tpoff (info, relocation); break; @@ -3961,7 +4188,7 @@ elf_x86_64_finish_dynamic_symbol (bfd *output_bfd, || plt == NULL || gotplt == NULL || relplt == NULL) - abort (); + return FALSE; /* Get the index in the procedure linkage table which corresponds to this symbol. This is the index of this symbol @@ -4381,6 +4608,33 @@ elf_x86_64_finish_dynamic_sections (bfd *output_bfd, GOT_ENTRY_SIZE; } + /* Adjust .eh_frame for .plt section. */ + if (htab->plt_eh_frame != NULL) + { + if (htab->elf.splt != NULL + && htab->elf.splt->size != 0 + && (htab->elf.splt->flags & SEC_EXCLUDE) == 0 + && htab->elf.splt->output_section != NULL + && htab->plt_eh_frame->output_section != NULL) + { + bfd_vma plt_start = htab->elf.splt->output_section->vma; + bfd_vma eh_frame_start = htab->plt_eh_frame->output_section->vma + + htab->plt_eh_frame->output_offset + + PLT_FDE_START_OFFSET; + bfd_put_signed_32 (dynobj, plt_start - eh_frame_start, + htab->plt_eh_frame->contents + + PLT_FDE_START_OFFSET); + } + if (htab->plt_eh_frame->sec_info_type + == ELF_INFO_TYPE_EH_FRAME) + { + if (! _bfd_elf_write_section_eh_frame (output_bfd, info, + htab->plt_eh_frame, + htab->plt_eh_frame->contents)) + return FALSE; + } + } + if (htab->elf.sgot && htab->elf.sgot->size > 0) elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize = GOT_ENTRY_SIZE; @@ -4536,14 +4790,14 @@ elf_x86_64_merge_symbol (struct bfd_link_info *info ATTRIBUTE_UNUSED, bfd_boolean *override ATTRIBUTE_UNUSED, bfd_boolean *type_change_ok ATTRIBUTE_UNUSED, bfd_boolean *size_change_ok ATTRIBUTE_UNUSED, - bfd_boolean *newdef ATTRIBUTE_UNUSED, - bfd_boolean *newdyn, + bfd_boolean *newdyn ATTRIBUTE_UNUSED, + bfd_boolean *newdef, bfd_boolean *newdyncommon ATTRIBUTE_UNUSED, bfd_boolean *newweak ATTRIBUTE_UNUSED, bfd *abfd ATTRIBUTE_UNUSED, asection **sec, - bfd_boolean *olddef ATTRIBUTE_UNUSED, - bfd_boolean *olddyn, + bfd_boolean *olddyn ATTRIBUTE_UNUSED, + bfd_boolean *olddef, bfd_boolean *olddyncommon ATTRIBUTE_UNUSED, bfd_boolean *oldweak ATTRIBUTE_UNUSED, bfd *oldbfd, @@ -4552,9 +4806,9 @@ elf_x86_64_merge_symbol (struct bfd_link_info *info ATTRIBUTE_UNUSED, /* A normal common symbol and a large common symbol result in a normal common symbol. We turn the large common symbol into a normal one. */ - if (!*olddyn + if (!*olddef && h->root.type == bfd_link_hash_common - && !*newdyn + && !*newdef && bfd_is_com_section (*sec) && *oldsec != *sec) { @@ -4647,6 +4901,7 @@ static const struct bfd_elf_special_section #define elf_backend_want_plt_sym 0 #define elf_backend_got_header_size (GOT_ENTRY_SIZE*3) #define elf_backend_rela_normal 1 +#define elf_backend_plt_alignment 4 #define elf_info_to_howto elf_x86_64_info_to_howto @@ -4669,6 +4924,9 @@ static const struct bfd_elf_special_section #define elf_backend_gc_sweep_hook elf_x86_64_gc_sweep_hook #define elf_backend_grok_prstatus elf_x86_64_grok_prstatus #define elf_backend_grok_psinfo elf_x86_64_grok_psinfo +#ifdef CORE_HEADER +#define elf_backend_write_core_note elf_x86_64_write_core_note +#endif #define elf_backend_reloc_type_class elf_x86_64_reloc_type_class #define elf_backend_relocate_section elf_x86_64_relocate_section #define elf_backend_size_dynamic_sections elf_x86_64_size_dynamic_sections @@ -4702,7 +4960,6 @@ static const struct bfd_elf_special_section #define elf_backend_hash_symbol \ elf_x86_64_hash_symbol -#undef elf_backend_post_process_headers #define elf_backend_post_process_headers _bfd_elf_set_osabi #include "elf64-target.h" @@ -4778,7 +5035,6 @@ elf64_l1om_elf_object_p (bfd *abfd) #undef elf_backend_object_p #define elf_backend_object_p elf64_l1om_elf_object_p -#undef elf_backend_post_process_headers #undef elf_backend_static_tls_alignment #undef elf_backend_want_plt_sym @@ -4799,8 +5055,55 @@ elf64_l1om_elf_object_p (bfd *abfd) #undef elf64_bed #define elf64_bed elf64_l1om_fbsd_bed -#undef elf_backend_post_process_headers -#define elf_backend_post_process_headers _bfd_elf_set_osabi +#include "elf64-target.h" + +/* Intel K1OM support. */ + +static bfd_boolean +elf64_k1om_elf_object_p (bfd *abfd) +{ + /* Set the right machine number for an K1OM elf64 file. */ + bfd_default_set_arch_mach (abfd, bfd_arch_k1om, bfd_mach_k1om); + return TRUE; +} + +#undef TARGET_LITTLE_SYM +#define TARGET_LITTLE_SYM bfd_elf64_k1om_vec +#undef TARGET_LITTLE_NAME +#define TARGET_LITTLE_NAME "elf64-k1om" +#undef ELF_ARCH +#define ELF_ARCH bfd_arch_k1om + +#undef ELF_MACHINE_CODE +#define ELF_MACHINE_CODE EM_K1OM + +#undef ELF_OSABI + +#undef elf64_bed +#define elf64_bed elf64_k1om_bed + +#undef elf_backend_object_p +#define elf_backend_object_p elf64_k1om_elf_object_p + +#undef elf_backend_static_tls_alignment + +#undef elf_backend_want_plt_sym +#define elf_backend_want_plt_sym 0 + +#include "elf64-target.h" + +/* FreeBSD K1OM support. */ + +#undef TARGET_LITTLE_SYM +#define TARGET_LITTLE_SYM bfd_elf64_k1om_freebsd_vec +#undef TARGET_LITTLE_NAME +#define TARGET_LITTLE_NAME "elf64-k1om-freebsd" + +#undef ELF_OSABI +#define ELF_OSABI ELFOSABI_FREEBSD + +#undef elf64_bed +#define elf64_bed elf64_k1om_fbsd_bed #include "elf64-target.h" @@ -4838,8 +5141,6 @@ elf32_x86_64_elf_object_p (bfd *abfd) #undef ELF_OSABI -#undef elf_backend_post_process_headers - #undef elf_backend_object_p #define elf_backend_object_p \ elf32_x86_64_elf_object_p diff --git a/bfd/elfcode.h b/bfd/elfcode.h index d8833df..b7e0226 100644 --- a/bfd/elfcode.h +++ b/bfd/elfcode.h @@ -499,7 +499,6 @@ elf_object_p (bfd *abfd) asection *s; bfd_size_type amt; const bfd_target *target; - const bfd_target * const *target_ptr; preserve.marker = NULL; @@ -588,34 +587,9 @@ elf_object_p (bfd *abfd) && (ebd->elf_machine_alt1 == 0 || i_ehdrp->e_machine != ebd->elf_machine_alt1) && (ebd->elf_machine_alt2 == 0 - || i_ehdrp->e_machine != ebd->elf_machine_alt2)) - { - if (ebd->elf_machine_code != EM_NONE) - goto got_wrong_format_error; - - /* This is the generic ELF target. Let it match any ELF target - for which we do not have a specific backend. */ - for (target_ptr = bfd_target_vector; *target_ptr != NULL; target_ptr++) - { - const struct elf_backend_data *back; - - if ((*target_ptr)->flavour != bfd_target_elf_flavour) - continue; - back = xvec_get_elf_backend_data (*target_ptr); - if (back->s->arch_size != ARCH_SIZE) - continue; - if (back->elf_machine_code == i_ehdrp->e_machine - || (back->elf_machine_alt1 != 0 - && back->elf_machine_alt1 == i_ehdrp->e_machine) - || (back->elf_machine_alt2 != 0 - && back->elf_machine_alt2 == i_ehdrp->e_machine)) - { - /* target_ptr is an ELF backend which matches this - object file, so reject the generic ELF target. */ - goto got_wrong_format_error; - } - } - } + || i_ehdrp->e_machine != ebd->elf_machine_alt2) + && ebd->elf_machine_code != EM_NONE) + goto got_wrong_format_error; if (i_ehdrp->e_type == ET_EXEC) abfd->flags |= EXEC_P; @@ -633,43 +607,9 @@ elf_object_p (bfd *abfd) } if (ebd->elf_machine_code != EM_NONE - && i_ehdrp->e_ident[EI_OSABI] != ebd->elf_osabi) - { - if (ebd->elf_osabi != ELFOSABI_NONE) - goto got_wrong_format_error; - - /* This is an ELFOSABI_NONE ELF target. Let it match any ELF - target of the compatible machine for which we do not have a - backend with matching ELFOSABI. */ - for (target_ptr = bfd_target_vector; - *target_ptr != NULL; - target_ptr++) - { - const struct elf_backend_data *back; - - /* Skip this target and targets with incompatible byte - order. */ - if (*target_ptr == target - || (*target_ptr)->flavour != bfd_target_elf_flavour - || (*target_ptr)->byteorder != target->byteorder - || ((*target_ptr)->header_byteorder - != target->header_byteorder)) - continue; - - back = xvec_get_elf_backend_data (*target_ptr); - if (back->elf_osabi == i_ehdrp->e_ident[EI_OSABI] - && (back->elf_machine_code == i_ehdrp->e_machine - || (back->elf_machine_alt1 != 0 - && back->elf_machine_alt1 == i_ehdrp->e_machine) - || (back->elf_machine_alt2 != 0 - && back->elf_machine_alt2 == i_ehdrp->e_machine))) - { - /* target_ptr is an ELF backend which matches this - object file, so reject the ELFOSABI_NONE ELF target. */ - goto got_wrong_format_error; - } - } - } + && i_ehdrp->e_ident[EI_OSABI] != ebd->elf_osabi + && ebd->elf_osabi != ELFOSABI_NONE) + goto got_wrong_format_error; if (i_ehdrp->e_shoff != 0) { diff --git a/bfd/elflink.c b/bfd/elflink.c index 3a4d22c..fc4266b 100644 --- a/bfd/elflink.c +++ b/bfd/elflink.c @@ -36,7 +36,6 @@ struct elf_info_failed { struct bfd_link_info *info; - struct bfd_elf_version_tree *verdefs; bfd_boolean failed; }; @@ -111,17 +110,17 @@ _bfd_elf_create_got_section (bfd *abfd, struct bfd_link_info *info) flags = bed->dynamic_sec_flags; - s = bfd_make_section_with_flags (abfd, - (bed->rela_plts_and_copies_p - ? ".rela.got" : ".rel.got"), - (bed->dynamic_sec_flags - | SEC_READONLY)); + s = bfd_make_section_anyway_with_flags (abfd, + (bed->rela_plts_and_copies_p + ? ".rela.got" : ".rel.got"), + (bed->dynamic_sec_flags + | SEC_READONLY)); if (s == NULL || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) return FALSE; htab->srelgot = s; - s = bfd_make_section_with_flags (abfd, ".got", flags); + s = bfd_make_section_anyway_with_flags (abfd, ".got", flags); if (s == NULL || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) return FALSE; @@ -129,7 +128,7 @@ _bfd_elf_create_got_section (bfd *abfd, struct bfd_link_info *info) if (bed->want_got_plt) { - s = bfd_make_section_with_flags (abfd, ".got.plt", flags); + s = bfd_make_section_anyway_with_flags (abfd, ".got.plt", flags); if (s == NULL || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) @@ -207,44 +206,44 @@ _bfd_elf_link_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) shared library does not. */ if (info->executable) { - s = bfd_make_section_with_flags (abfd, ".interp", - flags | SEC_READONLY); + s = bfd_make_section_anyway_with_flags (abfd, ".interp", + flags | SEC_READONLY); if (s == NULL) return FALSE; } /* Create sections to hold version informations. These are removed if they are not needed. */ - s = bfd_make_section_with_flags (abfd, ".gnu.version_d", - flags | SEC_READONLY); + s = bfd_make_section_anyway_with_flags (abfd, ".gnu.version_d", + flags | SEC_READONLY); if (s == NULL || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) return FALSE; - s = bfd_make_section_with_flags (abfd, ".gnu.version", - flags | SEC_READONLY); + s = bfd_make_section_anyway_with_flags (abfd, ".gnu.version", + flags | SEC_READONLY); if (s == NULL || ! bfd_set_section_alignment (abfd, s, 1)) return FALSE; - s = bfd_make_section_with_flags (abfd, ".gnu.version_r", - flags | SEC_READONLY); + s = bfd_make_section_anyway_with_flags (abfd, ".gnu.version_r", + flags | SEC_READONLY); if (s == NULL || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) return FALSE; - s = bfd_make_section_with_flags (abfd, ".dynsym", - flags | SEC_READONLY); + s = bfd_make_section_anyway_with_flags (abfd, ".dynsym", + flags | SEC_READONLY); if (s == NULL || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) return FALSE; - s = bfd_make_section_with_flags (abfd, ".dynstr", - flags | SEC_READONLY); + s = bfd_make_section_anyway_with_flags (abfd, ".dynstr", + flags | SEC_READONLY); if (s == NULL) return FALSE; - s = bfd_make_section_with_flags (abfd, ".dynamic", flags); + s = bfd_make_section_anyway_with_flags (abfd, ".dynamic", flags); if (s == NULL || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) return FALSE; @@ -260,7 +259,8 @@ _bfd_elf_link_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) if (info->emit_hash) { - s = bfd_make_section_with_flags (abfd, ".hash", flags | SEC_READONLY); + s = bfd_make_section_anyway_with_flags (abfd, ".hash", + flags | SEC_READONLY); if (s == NULL || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) return FALSE; @@ -269,8 +269,8 @@ _bfd_elf_link_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) if (info->emit_gnu_hash) { - s = bfd_make_section_with_flags (abfd, ".gnu.hash", - flags | SEC_READONLY); + s = bfd_make_section_anyway_with_flags (abfd, ".gnu.hash", + flags | SEC_READONLY); if (s == NULL || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) return FALSE; @@ -286,7 +286,8 @@ _bfd_elf_link_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) /* Let the backend create the rest of the sections. This lets the backend set the right flags. The backend will normally create the .got and .plt sections. */ - if (! (*bed->elf_backend_create_dynamic_sections) (abfd, info)) + if (bed->elf_backend_create_dynamic_sections == NULL + || ! (*bed->elf_backend_create_dynamic_sections) (abfd, info)) return FALSE; elf_hash_table (info)->dynamic_sections_created = TRUE; @@ -320,7 +321,7 @@ _bfd_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) if (bed->plt_readonly) pltflags |= SEC_READONLY; - s = bfd_make_section_with_flags (abfd, ".plt", pltflags); + s = bfd_make_section_anyway_with_flags (abfd, ".plt", pltflags); if (s == NULL || ! bfd_set_section_alignment (abfd, s, bed->plt_alignment)) return FALSE; @@ -337,10 +338,10 @@ _bfd_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) return FALSE; } - s = bfd_make_section_with_flags (abfd, - (bed->rela_plts_and_copies_p - ? ".rela.plt" : ".rel.plt"), - flags | SEC_READONLY); + s = bfd_make_section_anyway_with_flags (abfd, + (bed->rela_plts_and_copies_p + ? ".rela.plt" : ".rel.plt"), + flags | SEC_READONLY); if (s == NULL || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) return FALSE; @@ -357,9 +358,8 @@ _bfd_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) image and use a R_*_COPY reloc to tell the dynamic linker to initialize them at run time. The linker script puts the .dynbss section into the .bss section of the final image. */ - s = bfd_make_section_with_flags (abfd, ".dynbss", - (SEC_ALLOC - | SEC_LINKER_CREATED)); + s = bfd_make_section_anyway_with_flags (abfd, ".dynbss", + (SEC_ALLOC | SEC_LINKER_CREATED)); if (s == NULL) return FALSE; @@ -376,10 +376,10 @@ _bfd_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) copy relocs. */ if (! info->shared) { - s = bfd_make_section_with_flags (abfd, - (bed->rela_plts_and_copies_p - ? ".rela.bss" : ".rel.bss"), - flags | SEC_READONLY); + s = bfd_make_section_anyway_with_flags (abfd, + (bed->rela_plts_and_copies_p + ? ".rela.bss" : ".rel.bss"), + flags | SEC_READONLY); if (s == NULL || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) return FALSE; @@ -721,9 +721,6 @@ elf_link_renumber_hash_table_dynsyms (struct elf_link_hash_entry *h, { size_t *count = (size_t *) data; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (h->forced_local) return TRUE; @@ -743,9 +740,6 @@ elf_link_renumber_local_hash_table_dynsyms (struct elf_link_hash_entry *h, { size_t *count = (size_t *) data; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (!h->forced_local) return TRUE; @@ -1085,11 +1079,15 @@ _bfd_elf_merge_symbol (bfd *abfd, return TRUE; } + /* Plugin symbol type isn't currently set. Stop bogus errors. */ + if (oldbfd != NULL && (oldbfd->flags & BFD_PLUGIN) != 0) + *type_change_ok = TRUE; + /* Check TLS symbol. We don't check undefined symbol introduced by "ld -u". */ - if ((ELF_ST_TYPE (sym->st_info) == STT_TLS || h->type == STT_TLS) - && ELF_ST_TYPE (sym->st_info) != h->type - && oldbfd != NULL) + else if (oldbfd != NULL + && ELF_ST_TYPE (sym->st_info) != h->type + && (ELF_ST_TYPE (sym->st_info) == STT_TLS || h->type == STT_TLS)) { bfd *ntbfd, *tbfd; bfd_boolean ntdef, tdef; @@ -1240,7 +1238,6 @@ _bfd_elf_merge_symbol (bfd *abfd, { h->def_dynamic = 0; h->ref_dynamic = 1; - h->dynamic_def = 1; } /* FIXME: Should we check type and size for protected symbol? */ h->size = 0; @@ -1427,7 +1424,11 @@ _bfd_elf_merge_symbol (bfd *abfd, /* Skip weak definitions of symbols that are already defined. */ if (newdef && olddef && newweak) { - *skip = TRUE; + /* Don't skip new non-IR weak syms. */ + if (!(oldbfd != NULL + && (oldbfd->flags & BFD_PLUGIN) != 0 + && (abfd->flags & BFD_PLUGIN) == 0)) + *skip = TRUE; /* Merge st_other. If the symbol already has a dynamic index, but visibility says it should not be visible, turn it into a @@ -1808,32 +1809,23 @@ _bfd_elf_export_symbol (struct elf_link_hash_entry *h, void *data) { struct elf_info_failed *eif = (struct elf_info_failed *) data; - /* Ignore this if we won't export it. */ - if (!eif->info->export_dynamic && !h->dynamic) - return TRUE; - /* Ignore indirect symbols. These are added by the versioning code. */ if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; + /* Ignore this if we won't export it. */ + if (!eif->info->export_dynamic && !h->dynamic) + return TRUE; if (h->dynindx == -1 - && (h->def_regular - || h->ref_regular)) + && (h->def_regular || h->ref_regular) + && ! bfd_hide_sym_by_version (eif->info->version_info, + h->root.root.string)) { - bfd_boolean hide; - - if (eif->verdefs == NULL - || (bfd_find_version_for_sym (eif->verdefs, h->root.root.string, &hide) - && !hide)) + if (! bfd_elf_link_record_dynamic_symbol (eif->info, h)) { - if (! bfd_elf_link_record_dynamic_symbol (eif->info, h)) - { - eif->failed = TRUE; - return FALSE; - } + eif->failed = TRUE; + return FALSE; } } @@ -1854,9 +1846,6 @@ _bfd_elf_link_find_version_dependencies (struct elf_link_hash_entry *h, Elf_Internal_Vernaux *a; bfd_size_type amt; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - /* We only care about symbols defined in shared objects with version information. */ if (!h->def_dynamic @@ -1942,9 +1931,6 @@ _bfd_elf_link_assign_sym_version (struct elf_link_hash_entry *h, void *data) sinfo = (struct elf_info_failed *) data; info = sinfo->info; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - /* Fix the symbol flags. */ eif.failed = FALSE; eif.info = info; @@ -1987,7 +1973,7 @@ _bfd_elf_link_assign_sym_version (struct elf_link_hash_entry *h, void *data) } /* Look for the version. If we find it, it is no longer weak. */ - for (t = sinfo->verdefs; t != NULL; t = t->next) + for (t = sinfo->info->version_info; t != NULL; t = t->next) { if (strcmp (t->name, p) == 0) { @@ -2056,9 +2042,12 @@ _bfd_elf_link_assign_sym_version (struct elf_link_hash_entry *h, void *data) version_index = 1; /* Don't count anonymous version tag. */ - if (sinfo->verdefs != NULL && sinfo->verdefs->vernum == 0) + if (sinfo->info->version_info != NULL + && sinfo->info->version_info->vernum == 0) version_index = 0; - for (pp = &sinfo->verdefs; *pp != NULL; pp = &(*pp)->next) + for (pp = &sinfo->info->version_info; + *pp != NULL; + pp = &(*pp)->next) ++version_index; t->vernum = version_index; @@ -2084,12 +2073,13 @@ _bfd_elf_link_assign_sym_version (struct elf_link_hash_entry *h, void *data) /* If we don't have a version for this symbol, see if we can find something. */ - if (h->verinfo.vertree == NULL && sinfo->verdefs != NULL) + if (h->verinfo.vertree == NULL && sinfo->info->version_info != NULL) { bfd_boolean hide; - h->verinfo.vertree = bfd_find_version_for_sym (sinfo->verdefs, - h->root.root.string, &hide); + h->verinfo.vertree + = bfd_find_version_for_sym (sinfo->info->version_info, + h->root.root.string, &hide); if (h->verinfo.vertree != NULL && hide) (*bed->elf_backend_hide_symbol) (info, h, TRUE); } @@ -2523,7 +2513,7 @@ _bfd_elf_fix_symbol_flags (struct elf_link_hash_entry *h, struct elf_link_hash_entry *weakdef; weakdef = h->u.weakdef; - if (h->root.type == bfd_link_hash_indirect) + while (h->root.type == bfd_link_hash_indirect) h = (struct elf_link_hash_entry *) h->root.u.i.link; BFD_ASSERT (h->root.type == bfd_link_hash_defined @@ -2560,17 +2550,6 @@ _bfd_elf_adjust_dynamic_symbol (struct elf_link_hash_entry *h, void *data) if (! is_elf_hash_table (eif->info->hash)) return FALSE; - if (h->root.type == bfd_link_hash_warning) - { - h->got = elf_hash_table (eif->info)->init_got_offset; - h->plt = elf_hash_table (eif->info)->init_plt_offset; - - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - } - /* Ignore indirect symbols. These are added by the versioning code. */ if (h->root.type == bfd_link_hash_indirect) return TRUE; @@ -2638,12 +2617,12 @@ _bfd_elf_adjust_dynamic_symbol (struct elf_link_hash_entry *h, void *data) if (h->u.weakdef != NULL) { - /* If we get to this point, we know there is an implicit - reference by a regular object file via the weak symbol H. - FIXME: Is this really true? What if the traversal finds - H->U.WEAKDEF before it finds H? */ + /* If we get to this point, there is an implicit reference to + H->U.WEAKDEF by a regular object file via the weak symbol H. */ h->u.weakdef->ref_regular = 1; + /* Ensure that the backend adjust_dynamic_symbol function sees + H->U.WEAKDEF before H by recursively calling ourselves. */ if (! _bfd_elf_adjust_dynamic_symbol (h->u.weakdef, eif)) return FALSE; } @@ -2726,9 +2705,6 @@ _bfd_elf_link_sec_merge_syms (struct elf_link_hash_entry *h, void *data) { asection *sec; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if ((h->root.type == bfd_link_hash_defined || h->root.type == bfd_link_hash_defweak) && ((sec = h->root.u.def.section)->flags & SEC_MERGE) @@ -2878,8 +2854,10 @@ _bfd_elf_symbol_refs_local_p (struct elf_link_hash_entry *h, return TRUE; /* Function pointer equality tests may require that STV_PROTECTED - symbols be treated as dynamic symbols, even when we know that the - dynamic linker will resolve them locally. */ + symbols be treated as dynamic symbols. If the address of a + function not defined in an executable is set to that function's + plt entry in the executable, then the address of the function in + a shared library must also be the plt entry in the executable. */ return local_protected; } @@ -3174,9 +3152,6 @@ elf_adjust_dynstr_offsets (struct elf_link_hash_entry *h, void *data) { struct elf_strtab_hash *dynstr = (struct elf_strtab_hash *) data; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (h->dynindx != -1) h->dynstr_index = _bfd_elf_strtab_offset (dynstr, h->dynstr_index); return TRUE; @@ -3420,7 +3395,8 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info) .gnu.warning.SYMBOL are treated as warning symbols for the given symbol. This differs from .gnu.warning sections, which generate warnings when they are included in an output file. */ - if (info->executable) + /* PR 12761: Also generate this warning when building shared libraries. */ + if (info->executable || info->shared) { asection *s; @@ -3811,7 +3787,7 @@ error_free_dyn: /* Make a special call to the linker "notice" function to tell it that we are about to handle an as-needed lib. */ if (!(*info->callbacks->notice) (info, NULL, abfd, NULL, - notice_as_needed)) + notice_as_needed, 0, NULL)) goto error_free_vers; /* Clone the symbol table and sym hashes. Remember some @@ -3920,7 +3896,7 @@ error_free_dyn: sec = bfd_section_from_elf_index (abfd, isym->st_shndx); if (sec == NULL) sec = bfd_abs_section_ptr; - else if (sec->kept_section) + else if (elf_discarded_section (sec)) { /* Symbols from discarded section are undefined. We keep its visibility. */ @@ -4376,7 +4352,6 @@ error_free_dyn: { h->def_dynamic = 0; h->ref_dynamic = 1; - h->dynamic_def = 1; } } if (! info->executable @@ -4389,7 +4364,10 @@ error_free_dyn: if (! definition) h->ref_dynamic = 1; else - h->def_dynamic = 1; + { + h->def_dynamic = 1; + h->dynamic_def = 1; + } if (h->def_regular || h->ref_regular || (h->u.weakdef != NULL @@ -4398,11 +4376,13 @@ error_free_dyn: dynsym = TRUE; } + /* We don't want to make debug symbol dynamic. */ if (definition && (sec->flags & SEC_DEBUGGING) && !info->relocatable) - { - /* We don't want to make debug symbol dynamic. */ - dynsym = FALSE; - } + dynsym = FALSE; + + /* Nor should we make plugin symbols dynamic. */ + if ((abfd->flags & BFD_PLUGIN) != 0) + dynsym = FALSE; if (definition) h->target_internal = isym->st_target_internal; @@ -4535,6 +4515,8 @@ error_free_dyn: { struct bfd_hash_entry *p; struct elf_link_hash_entry *h; + bfd_size_type size; + unsigned int alignment_power; for (p = htab->root.table.table[i]; p != NULL; p = p->next) { @@ -4544,6 +4526,20 @@ error_free_dyn: if (h->dynindx >= old_dynsymcount) _bfd_elf_strtab_delref (htab->dynstr, h->dynstr_index); + /* Preserve the maximum alignment and size for common + symbols even if this dynamic lib isn't on DT_NEEDED + since it can still be loaded at the run-time by another + dynamic lib. */ + if (h->root.type == bfd_link_hash_common) + { + size = h->root.u.c.size; + alignment_power = h->root.u.c.p->alignment_power; + } + else + { + size = 0; + alignment_power = 0; + } memcpy (p, old_ent, htab->root.table.entsize); old_ent = (char *) old_ent + htab->root.table.entsize; h = (struct elf_link_hash_entry *) p; @@ -4552,13 +4548,20 @@ error_free_dyn: memcpy (h->root.u.i.link, old_ent, htab->root.table.entsize); old_ent = (char *) old_ent + htab->root.table.entsize; } + else if (h->root.type == bfd_link_hash_common) + { + if (size > h->root.u.c.size) + h->root.u.c.size = size; + if (alignment_power > h->root.u.c.p->alignment_power) + h->root.u.c.p->alignment_power = alignment_power; + } } } /* Make a special call to the linker "notice" function to tell it that symbols added for crefs may need to be removed. */ if (!(*info->callbacks->notice) (info, NULL, abfd, NULL, - notice_not_needed)) + notice_not_needed, 0, NULL)) goto error_free_vers; free (old_tab); @@ -4572,7 +4575,7 @@ error_free_dyn: if (old_tab != NULL) { if (!(*info->callbacks->notice) (info, NULL, abfd, NULL, - notice_needed)) + notice_needed, 0, NULL)) goto error_free_vers; free (old_tab); old_tab = NULL; @@ -4905,7 +4908,7 @@ _bfd_elf_archive_symbol_lookup (bfd *abfd, char *p, *copy; size_t len, first; - h = elf_link_hash_lookup (elf_hash_table (info), name, FALSE, FALSE, FALSE); + h = elf_link_hash_lookup (elf_hash_table (info), name, FALSE, FALSE, TRUE); if (h != NULL) return h; @@ -4928,14 +4931,14 @@ _bfd_elf_archive_symbol_lookup (bfd *abfd, memcpy (copy, name, first); memcpy (copy + first, name + first + 1, len - first); - h = elf_link_hash_lookup (elf_hash_table (info), copy, FALSE, FALSE, FALSE); + h = elf_link_hash_lookup (elf_hash_table (info), copy, FALSE, FALSE, TRUE); if (h == NULL) { /* We also need to check references to the symbol without the version. */ copy[first - 1] = '\0'; h = elf_link_hash_lookup (elf_hash_table (info), copy, - FALSE, FALSE, FALSE); + FALSE, FALSE, TRUE); } bfd_release (abfd, copy); @@ -5168,9 +5171,6 @@ elf_collect_hash_codes (struct elf_link_hash_entry *h, void *data) unsigned long ha; char *alc = NULL; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - /* Ignore indirect symbols. These are added by the versioning code. */ if (h->dynindx == -1) return TRUE; @@ -5239,9 +5239,6 @@ elf_collect_gnu_hash_codes (struct elf_link_hash_entry *h, void *data) unsigned long ha; char *alc = NULL; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - /* Ignore indirect symbols. These are added by the versioning code. */ if (h->dynindx == -1) return TRUE; @@ -5292,9 +5289,6 @@ elf_renumber_gnu_hash_syms (struct elf_link_hash_entry *h, void *data) unsigned long int bucket; unsigned long int val; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - /* Ignore indirect symbols. */ if (h->dynindx == -1) return TRUE; @@ -5522,8 +5516,7 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd, const char *depaudit, const char * const *auxiliary_filters, struct bfd_link_info *info, - asection **sinterpptr, - struct bfd_elf_version_tree *verdefs) + asection **sinterpptr) { bfd_size_type soname_indx; bfd *dynobj; @@ -5554,7 +5547,8 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd, { asection *s; - if (inputobj->flags & (DYNAMIC | EXEC_P | BFD_LINKER_CREATED)) + if (inputobj->flags + & (DYNAMIC | EXEC_P | BFD_PLUGIN | BFD_LINKER_CREATED)) continue; s = bfd_get_section_by_name (inputobj, ".note.GNU-stack"); if (s) @@ -5699,7 +5693,6 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd, } eif.info = info; - eif.verdefs = verdefs; eif.failed = FALSE; /* If we are supposed to export all symbols into the dynamic symbol @@ -5715,7 +5708,7 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd, } /* Make all global versions with definition. */ - for (t = verdefs; t != NULL; t = t->next) + for (t = info->version_info; t != NULL; t = t->next) for (d = t->globals.list; d != NULL; d = d->next) if (!d->symver && d->literal) { @@ -5768,7 +5761,6 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd, /* Attach all the symbols to their version information. */ asvinfo.info = info; - asvinfo.verdefs = verdefs; asvinfo.failed = FALSE; elf_link_hash_traverse (elf_hash_table (info), @@ -5781,7 +5773,7 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd, { /* Check if all global versions have a definition. */ all_defined = TRUE; - for (t = verdefs; t != NULL; t = t->next) + for (t = info->version_info; t != NULL; t = t->next) for (d = t->globals.list; d != NULL; d = d->next) if (d->literal && !d->symver && !d->script) { @@ -5914,6 +5906,7 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd, if (elf_hash_table (info)->dynamic_sections_created) { unsigned long section_sym_count; + struct bfd_elf_version_tree *verdefs; asection *s; /* Set up the version definition section. */ @@ -5922,7 +5915,7 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd, /* We may have created additional version definitions if we are just linking a regular application. */ - verdefs = asvinfo.verdefs; + verdefs = info->version_info; /* Skip anonymous version tag. */ if (verdefs != NULL && verdefs->vernum == 0) @@ -8598,8 +8591,9 @@ elf_link_check_versioned_symbol (struct bfd_link_info *info, global symbols. */ static bfd_boolean -elf_link_output_extsym (struct elf_link_hash_entry *h, void *data) +elf_link_output_extsym (struct bfd_hash_entry *bh, void *data) { + struct elf_link_hash_entry *h = (struct elf_link_hash_entry *) bh; struct elf_outext_info *eoinfo = (struct elf_outext_info *) data; struct elf_final_link_info *finfo = eoinfo->finfo; bfd_boolean strip; @@ -8665,10 +8659,11 @@ elf_link_output_extsym (struct elf_link_hash_entry *h, void *data) /* We should also warn if a forced local symbol is referenced from shared libraries. */ - if (! finfo->info->relocatable - && (! finfo->info->shared) + if (!finfo->info->relocatable + && finfo->info->executable && h->forced_local && h->ref_dynamic + && h->def_regular && !h->dynamic_def && !h->dynamic_weak && ! elf_link_check_versioned_symbol (finfo->info, bed, h)) @@ -8710,10 +8705,12 @@ elf_link_output_extsym (struct elf_link_hash_entry *h, void *data) && bfd_hash_lookup (finfo->info->keep_hash, h->root.root.string, FALSE, FALSE) == NULL) strip = TRUE; - else if (finfo->info->strip_discarded - && (h->root.type == bfd_link_hash_defined - || h->root.type == bfd_link_hash_defweak) - && elf_discarded_section (h->root.u.def.section)) + else if ((h->root.type == bfd_link_hash_defined + || h->root.type == bfd_link_hash_defweak) + && ((finfo->info->strip_discarded + && elf_discarded_section (h->root.u.def.section)) + || (h->root.u.def.section->owner != NULL + && (h->root.u.def.section->owner->flags & BFD_PLUGIN) != 0))) strip = TRUE; else if ((h->root.type == bfd_link_hash_undefined || h->root.type == bfd_link_hash_undefweak) @@ -9117,6 +9114,9 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) asection *o; const struct elf_backend_data *bed; struct elf_link_hash_entry **sym_hashes; + bfd_size_type address_size; + bfd_vma r_type_mask; + int r_sym_shift; output_bfd = finfo->output_bfd; bed = get_elf_backend_data (output_bfd); @@ -9287,6 +9287,19 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) *pindex = indx; } + if (bed->s->arch_size == 32) + { + r_type_mask = 0xff; + r_sym_shift = 8; + address_size = 4; + } + else + { + r_type_mask = 0xffffffff; + r_sym_shift = 32; + address_size = 8; + } + /* Relocate the contents of each section. */ sym_hashes = elf_sym_hashes (input_bfd); for (o = input_bfd->sections; o != NULL; o = o->next) @@ -9391,8 +9404,6 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) { Elf_Internal_Rela *internal_relocs; Elf_Internal_Rela *rel, *relend; - bfd_vma r_type_mask; - int r_sym_shift; int action_discarded; int ret; @@ -9404,15 +9415,27 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) && o->reloc_count > 0) return FALSE; - if (bed->s->arch_size == 32) + /* We need to reverse-copy input .ctors/.dtors sections if + they are placed in .init_array/.finit_array for output. */ + if (o->size > address_size + && ((strncmp (o->name, ".ctors", 6) == 0 + && strcmp (o->output_section->name, + ".init_array") == 0) + || (strncmp (o->name, ".dtors", 6) == 0 + && strcmp (o->output_section->name, + ".fini_array") == 0)) + && (o->name[6] == 0 || o->name[6] == '.')) { - r_type_mask = 0xff; - r_sym_shift = 8; - } - else - { - r_type_mask = 0xffffffff; - r_sym_shift = 32; + if (o->size != o->reloc_count * address_size) + { + (*_bfd_error_handler) + (_("error: %B: size of section %A is not " + "multiple of address size"), + input_bfd, o); + bfd_set_error (bfd_error_on_input); + return FALSE; + } + o->flags |= SEC_ELF_REVERSE_COPY; } action_discarded = -1; @@ -9873,12 +9896,34 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) default: { /* FIXME: octets_per_byte. */ - if (! (o->flags & SEC_EXCLUDE) - && ! bfd_set_section_contents (output_bfd, o->output_section, - contents, - (file_ptr) o->output_offset, - o->size)) - return FALSE; + if (! (o->flags & SEC_EXCLUDE)) + { + file_ptr offset = (file_ptr) o->output_offset; + bfd_size_type todo = o->size; + if ((o->flags & SEC_ELF_REVERSE_COPY)) + { + /* Reverse-copy input section to output. */ + do + { + todo -= address_size; + if (! bfd_set_section_contents (output_bfd, + o->output_section, + contents + todo, + offset, + address_size)) + return FALSE; + if (todo == 0) + break; + offset += address_size; + } + while (1); + } + else if (! bfd_set_section_contents (output_bfd, + o->output_section, + contents, + offset, todo)) + return FALSE; + } } break; } @@ -10767,8 +10812,7 @@ bfd_elf_final_link (bfd *abfd, struct bfd_link_info *info) eoinfo.failed = FALSE; eoinfo.finfo = &finfo; eoinfo.localsyms = TRUE; - elf_link_hash_traverse (elf_hash_table (info), elf_link_output_extsym, - &eoinfo); + bfd_hash_traverse (&info->hash->table, elf_link_output_extsym, &eoinfo); if (eoinfo.failed) return FALSE; @@ -10877,8 +10921,7 @@ bfd_elf_final_link (bfd *abfd, struct bfd_link_info *info) eoinfo.failed = FALSE; eoinfo.localsyms = FALSE; eoinfo.finfo = &finfo; - elf_link_hash_traverse (elf_hash_table (info), elf_link_output_extsym, - &eoinfo); + bfd_hash_traverse (&info->hash->table, elf_link_output_extsym, &eoinfo); if (eoinfo.failed) return FALSE; @@ -11094,6 +11137,13 @@ bfd_elf_final_link (bfd *abfd, struct bfd_link_info *info) (_("%B: could not find output section %s"), abfd, name); goto error_return; } + if (elf_section_data (o->output_section)->this_hdr.sh_type == SHT_NOTE) + { + (*_bfd_error_handler) + (_("warning: section '%s' is being made into a note"), name); + bfd_set_error (bfd_error_nonrepresentable_section); + goto error_return; + } dyn.d_un.d_ptr = o->vma; break; @@ -11138,7 +11188,8 @@ bfd_elf_final_link (bfd *abfd, struct bfd_link_info *info) goto error_return; /* Check for DT_TEXTREL (late, in case the backend removes it). */ - if (info->warn_shared_textrel && info->shared) + if ((info->warn_shared_textrel && info->shared) + || info->error_textrel) { bfd_byte *dyncon, *dynconend; @@ -11156,8 +11207,12 @@ bfd_elf_final_link (bfd *abfd, struct bfd_link_info *info) if (dyn.d_tag == DT_TEXTREL) { - info->callbacks->einfo - (_("%P: warning: creating a DT_TEXTREL in a shared object.\n")); + if (info->error_textrel) + info->callbacks->einfo + (_("%P%X: read-only segment has dynamic relocations.\n")); + else + info->callbacks->einfo + (_("%P: warning: creating a DT_TEXTREL in a shared object.\n")); break; } } @@ -11181,7 +11236,7 @@ bfd_elf_final_link (bfd *abfd, struct bfd_link_info *info) continue; if ((elf_section_data (o->output_section)->this_hdr.sh_type != SHT_STRTAB) - || strcmp (bfd_get_section_name (abfd, o), ".dynstr") != 0) + && (strcmp (bfd_get_section_name (abfd, o), ".dynstr") != 0)) { /* FIXME: octets_per_byte. */ if (! bfd_set_section_contents (abfd, o->output_section, @@ -11613,6 +11668,50 @@ _bfd_elf_gc_mark (struct bfd_link_info *info, return ret; } +/* Keep debug and special sections. */ + +bfd_boolean +_bfd_elf_gc_mark_extra_sections (struct bfd_link_info *info, + elf_gc_mark_hook_fn mark_hook ATTRIBUTE_UNUSED) +{ + bfd *ibfd; + + for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) + { + asection *isec; + bfd_boolean some_kept; + + if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour) + continue; + + /* Ensure all linker created sections are kept, and see whether + any other section is already marked. */ + some_kept = FALSE; + for (isec = ibfd->sections; isec != NULL; isec = isec->next) + { + if ((isec->flags & SEC_LINKER_CREATED) != 0) + isec->gc_mark = 1; + else if (isec->gc_mark) + some_kept = TRUE; + } + + /* If no section in this file will be kept, then we can + toss out debug sections. */ + if (!some_kept) + continue; + + /* Keep debug and special sections like .comment when they are + not part of a group, or when we have single-member groups. */ + for (isec = ibfd->sections; isec != NULL; isec = isec->next) + if ((elf_next_in_group (isec) == NULL + || elf_next_in_group (isec) == isec) + && ((isec->flags & SEC_DEBUGGING) != 0 + || (isec->flags & (SEC_ALLOC | SEC_LOAD | SEC_RELOC)) == 0)) + isec->gc_mark = 1; + } + return TRUE; +} + /* Sweep symbols in swept sections. Called via elf_link_hash_traverse. */ struct elf_gc_sweep_symbol_info @@ -11625,9 +11724,6 @@ struct elf_gc_sweep_symbol_info static bfd_boolean elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) { - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if ((h->root.type == bfd_link_hash_defined || h->root.type == bfd_link_hash_defweak) && !h->root.u.def.section->gc_mark @@ -11673,13 +11769,6 @@ elf_gc_sweep (bfd *abfd, struct bfd_link_info *info) asection *first = elf_next_in_group (o); o->gc_mark = first->gc_mark; } - else if ((o->flags & (SEC_DEBUGGING | SEC_LINKER_CREATED)) != 0 - || (o->flags & (SEC_ALLOC | SEC_LOAD | SEC_RELOC)) == 0 - || elf_section_data (o)->this_hdr.sh_type == SHT_NOTE) - { - /* Keep debug, special and SHT_NOTE sections. */ - o->gc_mark = 1; - } if (o->gc_mark) continue; @@ -11740,9 +11829,6 @@ elf_gc_sweep (bfd *abfd, struct bfd_link_info *info) static bfd_boolean elf_gc_propagate_vtable_entries_used (struct elf_link_hash_entry *h, void *okp) { - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - /* Those that are not vtables. */ if (h->vtable == NULL || h->vtable->parent == NULL) return TRUE; @@ -11804,9 +11890,6 @@ elf_gc_smash_unused_vtentry_relocs (struct elf_link_hash_entry *h, void *okp) const struct elf_backend_data *bed; unsigned int log_file_align; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - /* Take care of both those symbols that do not describe vtables as well as those that are not loaded. */ if (h->vtable == NULL || h->vtable->parent == NULL) @@ -11854,16 +11937,16 @@ bfd_elf_gc_mark_dynamic_ref_symbol (struct elf_link_hash_entry *h, void *inf) { struct bfd_link_info *info = (struct bfd_link_info *) inf; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if ((h->root.type == bfd_link_hash_defined || h->root.type == bfd_link_hash_defweak) && (h->ref_dynamic - || (!info->executable + || ((!info->executable || info->export_dynamic) && h->def_regular && ELF_ST_VISIBILITY (h->other) != STV_INTERNAL - && ELF_ST_VISIBILITY (h->other) != STV_HIDDEN))) + && ELF_ST_VISIBILITY (h->other) != STV_HIDDEN + && (strchr (h->root.root.string, ELF_VER_CHR) != NULL + || !bfd_hide_sym_by_version (info->version_info, + h->root.root.string))))) h->root.u.def.section->flags |= SEC_KEEP; return TRUE; @@ -11959,15 +12042,23 @@ bfd_elf_gc_sections (bfd *abfd, struct bfd_link_info *info) if (bfd_get_flavour (sub) != bfd_target_elf_flavour) continue; + /* Start at sections marked with SEC_KEEP (ref _bfd_elf_gc_keep). + Also treat note sections as a root, if the section is not part + of a group. */ for (o = sub->sections; o != NULL; o = o->next) - if ((o->flags & (SEC_EXCLUDE | SEC_KEEP)) == SEC_KEEP && !o->gc_mark) - if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) - return FALSE; + if (!o->gc_mark + && (o->flags & SEC_EXCLUDE) == 0 + && ((o->flags & SEC_KEEP) != 0 + || (elf_section_data (o)->this_hdr.sh_type == SHT_NOTE + && elf_next_in_group (o) == NULL ))) + { + if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) + return FALSE; + } } /* Allow the backend to mark additional target specific sections. */ - if (bed->gc_mark_extra_sections) - bed->gc_mark_extra_sections (info, gc_mark_hook); + bed->gc_mark_extra_sections (info, gc_mark_hook); /* ... and mark SEC_EXCLUDE for those that go. */ return elf_gc_sweep (abfd, info); @@ -12110,6 +12201,83 @@ bfd_elf_gc_record_vtentry (bfd *abfd ATTRIBUTE_UNUSED, return TRUE; } +/* Map an ELF section header flag to its corresponding string. */ +typedef struct +{ + char *flag_name; + flagword flag_value; +} elf_flags_to_name_table; + +static elf_flags_to_name_table elf_flags_to_names [] = +{ + { "SHF_WRITE", SHF_WRITE }, + { "SHF_ALLOC", SHF_ALLOC }, + { "SHF_EXECINSTR", SHF_EXECINSTR }, + { "SHF_MERGE", SHF_MERGE }, + { "SHF_STRINGS", SHF_STRINGS }, + { "SHF_INFO_LINK", SHF_INFO_LINK}, + { "SHF_LINK_ORDER", SHF_LINK_ORDER}, + { "SHF_OS_NONCONFORMING", SHF_OS_NONCONFORMING}, + { "SHF_GROUP", SHF_GROUP }, + { "SHF_TLS", SHF_TLS }, + { "SHF_MASKOS", SHF_MASKOS }, + { "SHF_EXCLUDE", SHF_EXCLUDE }, +}; + +void +bfd_elf_lookup_section_flags (struct bfd_link_info *info, + struct flag_info *finfo) +{ + bfd *output_bfd = info->output_bfd; + const struct elf_backend_data *bed = get_elf_backend_data (output_bfd); + struct flag_info_list *tf = finfo->flag_list; + int with_hex = 0; + int without_hex = 0; + + for (tf = finfo->flag_list; tf != NULL; tf = tf->next) + { + int i; + if (bed->elf_backend_lookup_section_flags_hook) + { + flagword hexval = + (*bed->elf_backend_lookup_section_flags_hook) ((char *) tf->name); + + if (hexval != 0) + { + if (tf->with == with_flags) + with_hex |= hexval; + else if (tf->with == without_flags) + without_hex |= hexval; + tf->valid = TRUE; + continue; + } + } + for (i = 0; i < 12; i++) + { + if (!strcmp (tf->name, elf_flags_to_names[i].flag_name)) + { + if (tf->with == with_flags) + with_hex |= elf_flags_to_names[i].flag_value; + else if (tf->with == without_flags) + without_hex |= elf_flags_to_names[i].flag_value; + tf->valid = TRUE; + continue; + } + } + if (tf->valid == FALSE) + { + info->callbacks->einfo + (_("Unrecognized INPUT_SECTION_FLAG %s\n"), tf->name); + return; + } + } + finfo->flags_initialized = TRUE; + finfo->only_with_flags |= with_hex; + finfo->not_with_flags |= without_hex; + + return; +} + struct alloc_got_off_arg { bfd_vma gotoff; struct bfd_link_info *info; @@ -12125,9 +12293,6 @@ elf_gc_allocate_got_offsets (struct elf_link_hash_entry *h, void *arg) bfd *obfd = gofarg->info->output_bfd; const struct elf_backend_data *bed = get_elf_backend_data (obfd); - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (h->got.refcount > 0) { h->got.offset = gofarg->gotoff; @@ -12370,139 +12535,69 @@ bfd_elf_discard_info (bfd *output_bfd, struct bfd_link_info *info) return ret; } -/* For a SHT_GROUP section, return the group signature. For other - sections, return the normal section name. */ - -static const char * -section_signature (asection *sec) -{ - if ((sec->flags & SEC_GROUP) != 0 - && elf_next_in_group (sec) != NULL - && elf_group_name (elf_next_in_group (sec)) != NULL) - return elf_group_name (elf_next_in_group (sec)); - return sec->name; -} - -void -_bfd_elf_section_already_linked (bfd *abfd, asection *sec, +bfd_boolean +_bfd_elf_section_already_linked (bfd *abfd, + asection *sec, struct bfd_link_info *info) { flagword flags; - const char *name, *p; + const char *name, *key; struct bfd_section_already_linked *l; struct bfd_section_already_linked_hash_entry *already_linked_list; if (sec->output_section == bfd_abs_section_ptr) - return; + return FALSE; flags = sec->flags; /* Return if it isn't a linkonce section. A comdat group section also has SEC_LINK_ONCE set. */ if ((flags & SEC_LINK_ONCE) == 0) - return; + return FALSE; /* Don't put group member sections on our list of already linked sections. They are handled as a group via their group section. */ if (elf_sec_group (sec) != NULL) - return; - - /* FIXME: When doing a relocatable link, we may have trouble - copying relocations in other sections that refer to local symbols - in the section being discarded. Those relocations will have to - be converted somehow; as of this writing I'm not sure that any of - the backends handle that correctly. - - It is tempting to instead not discard link once sections when - doing a relocatable link (technically, they should be discarded - whenever we are building constructors). However, that fails, - because the linker winds up combining all the link once sections - into a single large link once section, which defeats the purpose - of having link once sections in the first place. - - Also, not merging link once sections in a relocatable link - causes trouble for MIPS ELF, which relies on link once semantics - to handle the .reginfo section correctly. */ - - name = section_signature (sec); + return FALSE; - if (CONST_STRNEQ (name, ".gnu.linkonce.") - && (p = strchr (name + sizeof (".gnu.linkonce.") - 1, '.')) != NULL) - p++; + /* For a SHT_GROUP section, use the group signature as the key. */ + name = sec->name; + if ((flags & SEC_GROUP) != 0 + && elf_next_in_group (sec) != NULL + && elf_group_name (elf_next_in_group (sec)) != NULL) + key = elf_group_name (elf_next_in_group (sec)); else - p = name; + { + /* Otherwise we should have a .gnu.linkonce.. section. */ + if (CONST_STRNEQ (name, ".gnu.linkonce.") + && (key = strchr (name + sizeof (".gnu.linkonce.") - 1, '.')) != NULL) + key++; + else + /* Must be a user linkonce section that doesn't follow gcc's + naming convention. In this case we won't be matching + single member groups. */ + key = name; + } - already_linked_list = bfd_section_already_linked_table_lookup (p); + already_linked_list = bfd_section_already_linked_table_lookup (key); for (l = already_linked_list->entry; l != NULL; l = l->next) { /* We may have 2 different types of sections on the list: group - sections and linkonce sections. Match like sections. */ - if ((flags & SEC_GROUP) == (l->sec->flags & SEC_GROUP) - && strcmp (name, section_signature (l->sec)) == 0 - && bfd_coff_get_comdat_section (l->sec->owner, l->sec) == NULL) + sections with a signature of ( is some string), + and linkonce sections named .gnu.linkonce... + Match like sections. LTO plugin sections are an exception. + They are always named .gnu.linkonce.t. and match either + type of section. */ + if (((flags & SEC_GROUP) == (l->sec->flags & SEC_GROUP) + && ((flags & SEC_GROUP) != 0 + || strcmp (name, l->sec->name) == 0)) + || (l->sec->owner->flags & BFD_PLUGIN) != 0) { /* The section has already been linked. See if we should issue a warning. */ - switch (flags & SEC_LINK_DUPLICATES) - { - default: - abort (); - - case SEC_LINK_DUPLICATES_DISCARD: - break; - - case SEC_LINK_DUPLICATES_ONE_ONLY: - (*_bfd_error_handler) - (_("%B: ignoring duplicate section `%A'"), - abfd, sec); - break; - - case SEC_LINK_DUPLICATES_SAME_SIZE: - if (sec->size != l->sec->size) - (*_bfd_error_handler) - (_("%B: duplicate section `%A' has different size"), - abfd, sec); - break; - - case SEC_LINK_DUPLICATES_SAME_CONTENTS: - if (sec->size != l->sec->size) - (*_bfd_error_handler) - (_("%B: duplicate section `%A' has different size"), - abfd, sec); - else if (sec->size != 0) - { - bfd_byte *sec_contents, *l_sec_contents; - - if (!bfd_malloc_and_get_section (abfd, sec, &sec_contents)) - (*_bfd_error_handler) - (_("%B: warning: could not read contents of section `%A'"), - abfd, sec); - else if (!bfd_malloc_and_get_section (l->sec->owner, l->sec, - &l_sec_contents)) - (*_bfd_error_handler) - (_("%B: warning: could not read contents of section `%A'"), - l->sec->owner, l->sec); - else if (memcmp (sec_contents, l_sec_contents, sec->size) != 0) - (*_bfd_error_handler) - (_("%B: warning: duplicate section `%A' has different contents"), - abfd, sec); - - if (sec_contents) - free (sec_contents); - if (l_sec_contents) - free (l_sec_contents); - } - break; - } - - /* Set the output_section field so that lang_add_section - does not create a lang_input_section structure for this - section. Since there might be a symbol in the section - being discarded, we must retain a pointer to the section - which we are really going to use. */ - sec->output_section = bfd_abs_section_ptr; - sec->kept_section = l->sec; + if (!_bfd_handle_already_linked (sec, l, info)) + return FALSE; if (flags & SEC_GROUP) { @@ -12521,13 +12616,12 @@ _bfd_elf_section_already_linked (bfd *abfd, asection *sec, } } - return; + return TRUE; } } /* A single member comdat group section may be discarded by a linkonce section and vice versa. */ - if ((flags & SEC_GROUP) != 0) { asection *first = elf_next_in_group (sec); @@ -12536,7 +12630,6 @@ _bfd_elf_section_already_linked (bfd *abfd, asection *sec, /* Check this single member group against linkonce sections. */ for (l = already_linked_list->entry; l != NULL; l = l->next) if ((l->sec->flags & SEC_GROUP) == 0 - && bfd_coff_get_comdat_section (l->sec->owner, l->sec) == NULL && bfd_elf_match_symbols_in_sections (l->sec, first, info)) { first->output_section = bfd_abs_section_ptr; @@ -12585,8 +12678,9 @@ _bfd_elf_section_already_linked (bfd *abfd, asection *sec, } /* This is the first section with this name. Record it. */ - if (! bfd_section_already_linked_table_insert (already_linked_list, sec)) + if (!bfd_section_already_linked_table_insert (already_linked_list, sec)) info->callbacks->einfo (_("%F%P: already_linked_table: %E\n")); + return sec->output_section == bfd_abs_section_ptr; } bfd_boolean diff --git a/bfd/elfn32-mips.c b/bfd/elfn32-mips.c index da18621..00ec8b0 100644 --- a/bfd/elfn32-mips.c +++ b/bfd/elfn32-mips.c @@ -1653,6 +1653,605 @@ static reloc_howto_type elf_mips16_howto_table_rela[] = FALSE), /* pcrel_offset */ }; +static reloc_howto_type elf_micromips_howto_table_rel[] = +{ + EMPTY_HOWTO (130), + EMPTY_HOWTO (131), + EMPTY_HOWTO (132), + + /* 26 bit jump address. */ + HOWTO (R_MICROMIPS_26_S1, /* type */ + 1, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 26, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + /* This needs complex overflow + detection, because the upper four + bits must match the PC. */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_26_S1", /* name */ + TRUE, /* partial_inplace */ + 0x3ffffff, /* src_mask */ + 0x3ffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of symbol value. */ + HOWTO (R_MICROMIPS_HI16, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_hi16_reloc, /* special_function */ + "R_MICROMIPS_HI16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of symbol value. */ + HOWTO (R_MICROMIPS_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_lo16_reloc, /* special_function */ + "R_MICROMIPS_LO16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* GP relative reference. */ + HOWTO (R_MICROMIPS_GPREL16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf32_gprel16_reloc, /* special_function */ + "R_MICROMIPS_GPREL16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Reference to literal section. */ + HOWTO (R_MICROMIPS_LITERAL, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf32_gprel16_reloc, /* special_function */ + "R_MICROMIPS_LITERAL", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Reference to global offset table. */ + HOWTO (R_MICROMIPS_GOT16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_got16_reloc, /* special_function */ + "R_MICROMIPS_GOT16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* This is for microMIPS branches. */ + HOWTO (R_MICROMIPS_PC7_S1, /* type */ + 1, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 7, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC7_S1", /* name */ + TRUE, /* partial_inplace */ + 0x0000007f, /* src_mask */ + 0x0000007f, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_MICROMIPS_PC10_S1, /* type */ + 1, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 10, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC10_S1", /* name */ + TRUE, /* partial_inplace */ + 0x000003ff, /* src_mask */ + 0x000003ff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_MICROMIPS_PC16_S1, /* type */ + 1, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC16_S1", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* 16 bit call through global offset table. */ + HOWTO (R_MICROMIPS_CALL16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL16", /* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + EMPTY_HOWTO (143), + EMPTY_HOWTO (144), + + /* Displacement in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_DISP, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_DISP",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Displacement to page pointer in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_PAGE, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_PAGE",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Offset from page pointer in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_OFST, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_OFST",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_GOT_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_HI16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_GOT_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_LO16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* 64 bit subtraction. Used in the N32 ABI. */ + HOWTO (R_MICROMIPS_SUB, /* type */ + 0, /* rightshift */ + 4, /* size (0 = byte, 1 = short, 2 = long) */ + 64, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_SUB", /* name */ + TRUE, /* partial_inplace */ + MINUS_ONE, /* src_mask */ + MINUS_ONE, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* We don't support these for REL relocations, because it means building + the addend from a R_MICROMIPS_HIGHEST/R_MICROMIPS_HIGHER/ + R_MICROMIPS_HI16/R_MICROMIPS_LO16 sequence with varying ordering, + using fallable heuristics. */ + EMPTY_HOWTO (R_MICROMIPS_HIGHER), + EMPTY_HOWTO (R_MICROMIPS_HIGHEST), + + /* High 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_CALL_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL_HI16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_CALL_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL_LO16",/* name */ + TRUE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ +}; + +static reloc_howto_type elf_micromips_howto_table_rela[] = +{ + EMPTY_HOWTO (130), + EMPTY_HOWTO (131), + EMPTY_HOWTO (132), + + /* 26 bit jump address. */ + HOWTO (R_MICROMIPS_26_S1, /* type */ + 1, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 26, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + /* This needs complex overflow + detection, because the upper four + bits must match the PC. */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_26_S1", /* name */ + FALSE, /* partial_inplace */ + 0x3ffffff, /* src_mask */ + 0x3ffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of symbol value. */ + HOWTO (R_MICROMIPS_HI16, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_hi16_reloc, /* special_function */ + "R_MICROMIPS_HI16", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of symbol value. */ + HOWTO (R_MICROMIPS_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_lo16_reloc, /* special_function */ + "R_MICROMIPS_LO16", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* GP relative reference. */ + HOWTO (R_MICROMIPS_GPREL16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf32_gprel16_reloc, /* special_function */ + "R_MICROMIPS_GPREL16", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Reference to literal section. */ + HOWTO (R_MICROMIPS_LITERAL, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf32_gprel16_reloc, /* special_function */ + "R_MICROMIPS_LITERAL", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Reference to global offset table. */ + HOWTO (R_MICROMIPS_GOT16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_got16_reloc, /* special_function */ + "R_MICROMIPS_GOT16", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* This is for microMIPS branches. */ + HOWTO (R_MICROMIPS_PC7_S1, /* type */ + 1, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 7, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC7_S1", /* name */ + FALSE, /* partial_inplace */ + 0x0000007f, /* src_mask */ + 0x0000007f, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_MICROMIPS_PC10_S1, /* type */ + 1, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 10, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC10_S1", /* name */ + FALSE, /* partial_inplace */ + 0x000003ff, /* src_mask */ + 0x000003ff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_MICROMIPS_PC16_S1, /* type */ + 1, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_PC16_S1", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* 16 bit call through global offset table. */ + HOWTO (R_MICROMIPS_CALL16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL16", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + EMPTY_HOWTO (143), + EMPTY_HOWTO (144), + + /* Displacement in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_DISP, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_DISP",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Displacement to page pointer in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_PAGE, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_PAGE",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Offset from page pointer in the global offset table. */ + HOWTO (R_MICROMIPS_GOT_OFST, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_OFST",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_GOT_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_HI16",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_GOT_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_GOT_LO16",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* 64 bit subtraction. Used in the N32 ABI. */ + HOWTO (R_MICROMIPS_SUB, /* type */ + 0, /* rightshift */ + 4, /* size (0 = byte, 1 = short, 2 = long) */ + 64, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_SUB", /* name */ + FALSE, /* partial_inplace */ + MINUS_ONE, /* src_mask */ + MINUS_ONE, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Get the higher value of a 64 bit addend. */ + HOWTO (R_MICROMIPS_HIGHER, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_HIGHER", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Get the highest value of a 64 bit addend. */ + HOWTO (R_MICROMIPS_HIGHEST, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_HIGHEST", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_CALL_HI16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL_HI16",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Low 16 bits of displacement in global offset table. */ + HOWTO (R_MICROMIPS_CALL_LO16, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MICROMIPS_CALL_LO16",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ +}; + /* GNU extension to record C++ vtable hierarchy */ static reloc_howto_type elf_mips_gnu_vtinherit_howto = HOWTO (R_MIPS_GNU_VTINHERIT, /* type */ @@ -2047,13 +2646,13 @@ mips16_gprel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol, return ret; location = (bfd_byte *) data + reloc_entry->address; - _bfd_mips16_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE, - location); + _bfd_mips_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE, + location); ret = _bfd_mips_elf_gprel16_with_gp (abfd, symbol, reloc_entry, input_section, relocatable, data, gp); - _bfd_mips16_elf_reloc_shuffle (abfd, reloc_entry->howto->type, !relocatable, - location); + _bfd_mips_elf_reloc_shuffle (abfd, reloc_entry->howto->type, !relocatable, + location); return ret; } @@ -2127,6 +2726,30 @@ static const struct elf_reloc_map mips16_reloc_map[] = { BFD_RELOC_MIPS16_LO16, R_MIPS16_LO16 - R_MIPS16_min }, }; +static const struct elf_reloc_map micromips_reloc_map[] = +{ + { BFD_RELOC_MICROMIPS_JMP, R_MICROMIPS_26_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_HI16_S, R_MICROMIPS_HI16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_LO16, R_MICROMIPS_LO16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GPREL16, R_MICROMIPS_GPREL16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_LITERAL, R_MICROMIPS_LITERAL - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT16, R_MICROMIPS_GOT16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_7_PCREL_S1, R_MICROMIPS_PC7_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_10_PCREL_S1, R_MICROMIPS_PC10_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_16_PCREL_S1, R_MICROMIPS_PC16_S1 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_CALL16, R_MICROMIPS_CALL16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_DISP, R_MICROMIPS_GOT_DISP - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_PAGE - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_OFST, R_MICROMIPS_GOT_OFST - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_HI16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_GOT_LO16, R_MICROMIPS_GOT_LO16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_SUB, R_MICROMIPS_SUB - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_HIGHER, R_MICROMIPS_HIGHER - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_HIGHEST, R_MICROMIPS_HIGHEST - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_CALL_HI16, R_MICROMIPS_CALL_HI16 - R_MICROMIPS_min }, + { BFD_RELOC_MICROMIPS_CALL_LO16, R_MICROMIPS_CALL_LO16 - R_MICROMIPS_min }, +}; + /* Given a BFD reloc type, return a howto structure. */ static reloc_howto_type * @@ -2138,6 +2761,7 @@ bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, relocation variant. */ reloc_howto_type *howto_table = elf_mips_howto_table_rela; reloc_howto_type *howto16_table = elf_mips16_howto_table_rela; + reloc_howto_type *howto_micromips_table = elf_micromips_howto_table_rela; for (i = 0; i < sizeof (mips_reloc_map) / sizeof (struct elf_reloc_map); i++) @@ -2153,6 +2777,13 @@ bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, return &howto16_table[(int) mips16_reloc_map[i].elf_val]; } + for (i = 0; i < sizeof (micromips_reloc_map) / sizeof (struct elf_reloc_map); + i++) + { + if (micromips_reloc_map[i].bfd_val == code) + return &howto_micromips_table[(int) micromips_reloc_map[i].elf_val]; + } + switch (code) { case BFD_RELOC_VTABLE_INHERIT: @@ -2191,6 +2822,14 @@ bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, && strcasecmp (elf_mips16_howto_table_rela[i].name, r_name) == 0) return &elf_mips16_howto_table_rela[i]; + for (i = 0; + i < (sizeof (elf_micromips_howto_table_rela) + / sizeof (elf_micromips_howto_table_rela[0])); + i++) + if (elf_micromips_howto_table_rela[i].name != NULL + && strcasecmp (elf_micromips_howto_table_rela[i].name, r_name) == 0) + return &elf_micromips_howto_table_rela[i]; + if (strcasecmp (elf_mips_gnu_vtinherit_howto.name, r_name) == 0) return &elf_mips_gnu_vtinherit_howto; if (strcasecmp (elf_mips_gnu_vtentry_howto.name, r_name) == 0) @@ -2228,6 +2867,13 @@ mips_elf_n32_rtype_to_howto (unsigned int r_type, bfd_boolean rela_p) case R_MIPS_JUMP_SLOT: return &elf_mips_jump_slot_howto; default: + if (r_type >= R_MICROMIPS_min && r_type < R_MICROMIPS_max) + { + if (rela_p) + return &elf_micromips_howto_table_rela[r_type - R_MICROMIPS_min]; + else + return &elf_micromips_howto_table_rel[r_type - R_MICROMIPS_min]; + } if (r_type >= R_MIPS16_min && r_type < R_MIPS16_max) { if (rela_p) @@ -2499,6 +3145,8 @@ static const struct ecoff_debug_swap mips_elf32_ecoff_debug_swap = { #define elf_backend_write_section _bfd_mips_elf_write_section #define elf_backend_mips_irix_compat elf_n32_mips_irix_compat #define elf_backend_mips_rtype_to_howto mips_elf_n32_rtype_to_howto +#define bfd_elf32_bfd_is_target_special_symbol \ + _bfd_mips_elf_is_target_special_symbol #define bfd_elf32_find_nearest_line _bfd_mips_elf_find_nearest_line #define bfd_elf32_find_inliner_info _bfd_mips_elf_find_inliner_info #define bfd_elf32_new_section_hook _bfd_mips_elf_new_section_hook diff --git a/bfd/elfnn-ia64.c b/bfd/elfnn-ia64.c new file mode 100644 index 0000000..3e2ee0b --- /dev/null +++ b/bfd/elfnn-ia64.c @@ -0,0 +1,5457 @@ +/* IA-64 support for 64-bit ELF + Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, + 2008, 2009, 2010, 2011 Free Software Foundation, Inc. + Contributed by David Mosberger-Tang + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" +#include "elf-bfd.h" +#include "opcode/ia64.h" +#include "elf/ia64.h" +#include "objalloc.h" +#include "hashtab.h" +#include "bfd_stdint.h" +#include "elfxx-ia64.h" + +#define ARCH_SIZE NN + +#if ARCH_SIZE == 64 +#define LOG_SECTION_ALIGN 3 +#endif + +#if ARCH_SIZE == 32 +#define LOG_SECTION_ALIGN 2 +#endif + +/* Only add code for vms when the vms target is enabled. This is required + because it depends on vms-lib.c for its archive format and we don't want + to compile that code if it is not used. */ +#if ARCH_SIZE == 64 && \ + (defined (HAVE_bfd_elf64_ia64_vms_vec) || defined (HAVE_all_vecs)) +#define INCLUDE_IA64_VMS +#endif + +typedef struct bfd_hash_entry *(*new_hash_entry_func) + (struct bfd_hash_entry *, struct bfd_hash_table *, const char *); + +/* In dynamically (linker-) created sections, we generally need to keep track + of the place a symbol or expression got allocated to. This is done via hash + tables that store entries of the following type. */ + +struct elfNN_ia64_dyn_sym_info +{ + /* The addend for which this entry is relevant. */ + bfd_vma addend; + + bfd_vma got_offset; + bfd_vma fptr_offset; + bfd_vma pltoff_offset; + bfd_vma plt_offset; + bfd_vma plt2_offset; + bfd_vma tprel_offset; + bfd_vma dtpmod_offset; + bfd_vma dtprel_offset; + + /* The symbol table entry, if any, that this was derived from. */ + struct elf_link_hash_entry *h; + + /* Used to count non-got, non-plt relocations for delayed sizing + of relocation sections. */ + struct elfNN_ia64_dyn_reloc_entry + { + struct elfNN_ia64_dyn_reloc_entry *next; + asection *srel; + int type; + int count; + + /* Is this reloc against readonly section? */ + bfd_boolean reltext; + } *reloc_entries; + + /* TRUE when the section contents have been updated. */ + unsigned got_done : 1; + unsigned fptr_done : 1; + unsigned pltoff_done : 1; + unsigned tprel_done : 1; + unsigned dtpmod_done : 1; + unsigned dtprel_done : 1; + + /* TRUE for the different kinds of linker data we want created. */ + unsigned want_got : 1; + unsigned want_gotx : 1; + unsigned want_fptr : 1; + unsigned want_ltoff_fptr : 1; + unsigned want_plt : 1; + unsigned want_plt2 : 1; + unsigned want_pltoff : 1; + unsigned want_tprel : 1; + unsigned want_dtpmod : 1; + unsigned want_dtprel : 1; +}; + +struct elfNN_ia64_local_hash_entry +{ + int id; + unsigned int r_sym; + /* The number of elements in elfNN_ia64_dyn_sym_info array. */ + unsigned int count; + /* The number of sorted elements in elfNN_ia64_dyn_sym_info array. */ + unsigned int sorted_count; + /* The size of elfNN_ia64_dyn_sym_info array. */ + unsigned int size; + /* The array of elfNN_ia64_dyn_sym_info. */ + struct elfNN_ia64_dyn_sym_info *info; + + /* TRUE if this hash entry's addends was translated for + SHF_MERGE optimization. */ + unsigned sec_merge_done : 1; +}; + +struct elfNN_ia64_link_hash_entry +{ + struct elf_link_hash_entry root; + /* The number of elements in elfNN_ia64_dyn_sym_info array. */ + unsigned int count; + /* The number of sorted elements in elfNN_ia64_dyn_sym_info array. */ + unsigned int sorted_count; + /* The size of elfNN_ia64_dyn_sym_info array. */ + unsigned int size; + /* The array of elfNN_ia64_dyn_sym_info. */ + struct elfNN_ia64_dyn_sym_info *info; +}; + +struct elfNN_ia64_link_hash_table +{ + /* The main hash table. */ + struct elf_link_hash_table root; + + asection *fptr_sec; /* Function descriptor table (or NULL). */ + asection *rel_fptr_sec; /* Dynamic relocation section for same. */ + asection *pltoff_sec; /* Private descriptors for plt (or NULL). */ + asection *rel_pltoff_sec; /* Dynamic relocation section for same. */ + + bfd_size_type minplt_entries; /* Number of minplt entries. */ + unsigned reltext : 1; /* Are there relocs against readonly sections? */ + unsigned self_dtpmod_done : 1;/* Has self DTPMOD entry been finished? */ + bfd_vma self_dtpmod_offset; /* .got offset to self DTPMOD entry. */ + /* There are maybe R_IA64_GPREL22 relocations, including those + optimized from R_IA64_LTOFF22X, against non-SHF_IA_64_SHORT + sections. We need to record those sections so that we can choose + a proper GP to cover all R_IA64_GPREL22 relocations. */ + asection *max_short_sec; /* Maximum short output section. */ + bfd_vma max_short_offset; /* Maximum short offset. */ + asection *min_short_sec; /* Minimum short output section. */ + bfd_vma min_short_offset; /* Minimum short offset. */ + + htab_t loc_hash_table; + void *loc_hash_memory; +}; + +struct elfNN_ia64_allocate_data +{ + struct bfd_link_info *info; + bfd_size_type ofs; + bfd_boolean only_got; +}; + +#define elfNN_ia64_hash_table(p) \ + (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \ + == IA64_ELF_DATA ? ((struct elfNN_ia64_link_hash_table *) ((p)->hash)) : NULL) + +static struct elfNN_ia64_dyn_sym_info * get_dyn_sym_info + (struct elfNN_ia64_link_hash_table *ia64_info, + struct elf_link_hash_entry *h, + bfd *abfd, const Elf_Internal_Rela *rel, bfd_boolean create); +static bfd_boolean elfNN_ia64_dynamic_symbol_p + (struct elf_link_hash_entry *h, struct bfd_link_info *info, int); +static bfd_boolean elfNN_ia64_choose_gp + (bfd *abfd, struct bfd_link_info *info, bfd_boolean final); +static void elfNN_ia64_dyn_sym_traverse + (struct elfNN_ia64_link_hash_table *ia64_info, + bfd_boolean (*func) (struct elfNN_ia64_dyn_sym_info *, PTR), + PTR info); +static bfd_boolean allocate_global_data_got + (struct elfNN_ia64_dyn_sym_info *dyn_i, PTR data); +static bfd_boolean allocate_global_fptr_got + (struct elfNN_ia64_dyn_sym_info *dyn_i, PTR data); +static bfd_boolean allocate_local_got + (struct elfNN_ia64_dyn_sym_info *dyn_i, PTR data); +static bfd_boolean elfNN_ia64_hpux_vec + (const bfd_target *vec); +static bfd_boolean allocate_dynrel_entries + (struct elfNN_ia64_dyn_sym_info *dyn_i, PTR data); +static asection *get_pltoff + (bfd *abfd, struct bfd_link_info *info, + struct elfNN_ia64_link_hash_table *ia64_info); + +/* ia64-specific relocation. */ + +/* Given a ELF reloc, return the matching HOWTO structure. */ + +static void +elfNN_ia64_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, + arelent *bfd_reloc, + Elf_Internal_Rela *elf_reloc) +{ + bfd_reloc->howto + = ia64_elf_lookup_howto ((unsigned int) ELFNN_R_TYPE (elf_reloc->r_info)); +} + +#define PLT_HEADER_SIZE (3 * 16) +#define PLT_MIN_ENTRY_SIZE (1 * 16) +#define PLT_FULL_ENTRY_SIZE (2 * 16) +#define PLT_RESERVED_WORDS 3 + +static const bfd_byte plt_header[PLT_HEADER_SIZE] = +{ + 0x0b, 0x10, 0x00, 0x1c, 0x00, 0x21, /* [MMI] mov r2=r14;; */ + 0xe0, 0x00, 0x08, 0x00, 0x48, 0x00, /* addl r14=0,r2 */ + 0x00, 0x00, 0x04, 0x00, /* nop.i 0x0;; */ + 0x0b, 0x80, 0x20, 0x1c, 0x18, 0x14, /* [MMI] ld8 r16=[r14],8;; */ + 0x10, 0x41, 0x38, 0x30, 0x28, 0x00, /* ld8 r17=[r14],8 */ + 0x00, 0x00, 0x04, 0x00, /* nop.i 0x0;; */ + 0x11, 0x08, 0x00, 0x1c, 0x18, 0x10, /* [MIB] ld8 r1=[r14] */ + 0x60, 0x88, 0x04, 0x80, 0x03, 0x00, /* mov b6=r17 */ + 0x60, 0x00, 0x80, 0x00 /* br.few b6;; */ +}; + +static const bfd_byte plt_min_entry[PLT_MIN_ENTRY_SIZE] = +{ + 0x11, 0x78, 0x00, 0x00, 0x00, 0x24, /* [MIB] mov r15=0 */ + 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, /* nop.i 0x0 */ + 0x00, 0x00, 0x00, 0x40 /* br.few 0 ;; */ +}; + +static const bfd_byte plt_full_entry[PLT_FULL_ENTRY_SIZE] = +{ + 0x0b, 0x78, 0x00, 0x02, 0x00, 0x24, /* [MMI] addl r15=0,r1;; */ + 0x00, 0x41, 0x3c, 0x70, 0x29, 0xc0, /* ld8.acq r16=[r15],8*/ + 0x01, 0x08, 0x00, 0x84, /* mov r14=r1;; */ + 0x11, 0x08, 0x00, 0x1e, 0x18, 0x10, /* [MIB] ld8 r1=[r15] */ + 0x60, 0x80, 0x04, 0x80, 0x03, 0x00, /* mov b6=r16 */ + 0x60, 0x00, 0x80, 0x00 /* br.few b6;; */ +}; + +#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" + +static const bfd_byte oor_brl[16] = +{ + 0x05, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* brl.sptk.few tgt;; */ + 0x00, 0x00, 0x00, 0xc0 +}; + +static const bfd_byte oor_ip[48] = +{ + 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, /* movl r15=0 */ + 0x01, 0x00, 0x00, 0x60, + 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MII] nop.m 0 */ + 0x00, 0x01, 0x00, 0x60, 0x00, 0x00, /* mov r16=ip;; */ + 0xf2, 0x80, 0x00, 0x80, /* add r16=r15,r16;; */ + 0x11, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MIB] nop.m 0 */ + 0x60, 0x80, 0x04, 0x80, 0x03, 0x00, /* mov b6=r16 */ + 0x60, 0x00, 0x80, 0x00 /* br b6;; */ +}; + +static size_t oor_branch_size = sizeof (oor_brl); + +void +bfd_elfNN_ia64_after_parse (int itanium) +{ + oor_branch_size = itanium ? sizeof (oor_ip) : sizeof (oor_brl); +} + + +/* Rename some of the generic section flags to better document how they + are used here. */ +#define skip_relax_pass_0 sec_flg0 +#define skip_relax_pass_1 sec_flg1 + +/* These functions do relaxation for IA-64 ELF. */ + +static void +elfNN_ia64_update_short_info (asection *sec, bfd_vma offset, + struct elfNN_ia64_link_hash_table *ia64_info) +{ + /* Skip ABS and SHF_IA_64_SHORT sections. */ + if (sec == bfd_abs_section_ptr + || (sec->flags & SEC_SMALL_DATA) != 0) + return; + + if (!ia64_info->min_short_sec) + { + ia64_info->max_short_sec = sec; + ia64_info->max_short_offset = offset; + ia64_info->min_short_sec = sec; + ia64_info->min_short_offset = offset; + } + else if (sec == ia64_info->max_short_sec + && offset > ia64_info->max_short_offset) + ia64_info->max_short_offset = offset; + else if (sec == ia64_info->min_short_sec + && offset < ia64_info->min_short_offset) + ia64_info->min_short_offset = offset; + else if (sec->output_section->vma + > ia64_info->max_short_sec->vma) + { + ia64_info->max_short_sec = sec; + ia64_info->max_short_offset = offset; + } + else if (sec->output_section->vma + < ia64_info->min_short_sec->vma) + { + ia64_info->min_short_sec = sec; + ia64_info->min_short_offset = offset; + } +} + +static bfd_boolean +elfNN_ia64_relax_section (bfd *abfd, asection *sec, + struct bfd_link_info *link_info, + bfd_boolean *again) +{ + struct one_fixup + { + struct one_fixup *next; + asection *tsec; + bfd_vma toff; + bfd_vma trampoff; + }; + + Elf_Internal_Shdr *symtab_hdr; + Elf_Internal_Rela *internal_relocs; + Elf_Internal_Rela *irel, *irelend; + bfd_byte *contents; + Elf_Internal_Sym *isymbuf = NULL; + struct elfNN_ia64_link_hash_table *ia64_info; + struct one_fixup *fixups = NULL; + bfd_boolean changed_contents = FALSE; + bfd_boolean changed_relocs = FALSE; + bfd_boolean changed_got = FALSE; + bfd_boolean skip_relax_pass_0 = TRUE; + bfd_boolean skip_relax_pass_1 = TRUE; + bfd_vma gp = 0; + + /* Assume we're not going to change any sizes, and we'll only need + one pass. */ + *again = FALSE; + + if (link_info->relocatable) + (*link_info->callbacks->einfo) + (_("%P%F: --relax and -r may not be used together\n")); + + /* Don't even try to relax for non-ELF outputs. */ + if (!is_elf_hash_table (link_info->hash)) + return FALSE; + + /* Nothing to do if there are no relocations or there is no need for + the current pass. */ + if ((sec->flags & SEC_RELOC) == 0 + || sec->reloc_count == 0 + || (link_info->relax_pass == 0 && sec->skip_relax_pass_0) + || (link_info->relax_pass == 1 && sec->skip_relax_pass_1)) + return TRUE; + + ia64_info = elfNN_ia64_hash_table (link_info); + if (ia64_info == NULL) + return FALSE; + + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + + /* Load the relocations for this section. */ + internal_relocs = (_bfd_elf_link_read_relocs + (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, + link_info->keep_memory)); + if (internal_relocs == NULL) + return FALSE; + + irelend = internal_relocs + sec->reloc_count; + + /* Get the section contents. */ + if (elf_section_data (sec)->this_hdr.contents != NULL) + contents = elf_section_data (sec)->this_hdr.contents; + else + { + if (!bfd_malloc_and_get_section (abfd, sec, &contents)) + goto error_return; + } + + for (irel = internal_relocs; irel < irelend; irel++) + { + unsigned long r_type = ELFNN_R_TYPE (irel->r_info); + bfd_vma symaddr, reladdr, trampoff, toff, roff; + asection *tsec; + struct one_fixup *f; + bfd_size_type amt; + bfd_boolean is_branch; + struct elfNN_ia64_dyn_sym_info *dyn_i; + char symtype; + + switch (r_type) + { + case R_IA64_PCREL21B: + case R_IA64_PCREL21BI: + case R_IA64_PCREL21M: + case R_IA64_PCREL21F: + /* In pass 1, all br relaxations are done. We can skip it. */ + if (link_info->relax_pass == 1) + continue; + skip_relax_pass_0 = FALSE; + is_branch = TRUE; + break; + + case R_IA64_PCREL60B: + /* We can't optimize brl to br in pass 0 since br relaxations + will increase the code size. Defer it to pass 1. */ + if (link_info->relax_pass == 0) + { + skip_relax_pass_1 = FALSE; + continue; + } + is_branch = TRUE; + break; + + case R_IA64_GPREL22: + /* Update max_short_sec/min_short_sec. */ + + case R_IA64_LTOFF22X: + case R_IA64_LDXMOV: + /* We can't relax ldx/mov in pass 0 since br relaxations will + increase the code size. Defer it to pass 1. */ + if (link_info->relax_pass == 0) + { + skip_relax_pass_1 = FALSE; + continue; + } + is_branch = FALSE; + break; + + default: + continue; + } + + /* Get the value of the symbol referred to by the reloc. */ + if (ELFNN_R_SYM (irel->r_info) < symtab_hdr->sh_info) + { + /* A local symbol. */ + Elf_Internal_Sym *isym; + + /* Read this BFD's local symbols. */ + if (isymbuf == NULL) + { + isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; + if (isymbuf == NULL) + isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, + symtab_hdr->sh_info, 0, + NULL, NULL, NULL); + if (isymbuf == 0) + goto error_return; + } + + isym = isymbuf + ELFNN_R_SYM (irel->r_info); + if (isym->st_shndx == SHN_UNDEF) + continue; /* We can't do anything with undefined symbols. */ + else if (isym->st_shndx == SHN_ABS) + tsec = bfd_abs_section_ptr; + else if (isym->st_shndx == SHN_COMMON) + tsec = bfd_com_section_ptr; + else if (isym->st_shndx == SHN_IA_64_ANSI_COMMON) + tsec = bfd_com_section_ptr; + else + tsec = bfd_section_from_elf_index (abfd, isym->st_shndx); + + toff = isym->st_value; + dyn_i = get_dyn_sym_info (ia64_info, NULL, abfd, irel, FALSE); + symtype = ELF_ST_TYPE (isym->st_info); + } + else + { + unsigned long indx; + struct elf_link_hash_entry *h; + + indx = ELFNN_R_SYM (irel->r_info) - symtab_hdr->sh_info; + h = elf_sym_hashes (abfd)[indx]; + BFD_ASSERT (h != NULL); + + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + + dyn_i = get_dyn_sym_info (ia64_info, h, abfd, irel, FALSE); + + /* For branches to dynamic symbols, we're interested instead + in a branch to the PLT entry. */ + if (is_branch && dyn_i && dyn_i->want_plt2) + { + /* Internal branches shouldn't be sent to the PLT. + Leave this for now and we'll give an error later. */ + if (r_type != R_IA64_PCREL21B) + continue; + + tsec = ia64_info->root.splt; + toff = dyn_i->plt2_offset; + BFD_ASSERT (irel->r_addend == 0); + } + + /* Can't do anything else with dynamic symbols. */ + else if (elfNN_ia64_dynamic_symbol_p (h, link_info, r_type)) + continue; + + else + { + /* We can't do anything with undefined symbols. */ + if (h->root.type == bfd_link_hash_undefined + || h->root.type == bfd_link_hash_undefweak) + continue; + + tsec = h->root.u.def.section; + toff = h->root.u.def.value; + } + + symtype = h->type; + } + + if (tsec->sec_info_type == ELF_INFO_TYPE_MERGE) + { + /* At this stage in linking, no SEC_MERGE symbol has been + adjusted, so all references to such symbols need to be + passed through _bfd_merged_section_offset. (Later, in + relocate_section, all SEC_MERGE symbols *except* for + section symbols have been adjusted.) + + gas may reduce relocations against symbols in SEC_MERGE + sections to a relocation against the section symbol when + the original addend was zero. When the reloc is against + a section symbol we should include the addend in the + offset passed to _bfd_merged_section_offset, since the + location of interest is the original symbol. On the + other hand, an access to "sym+addend" where "sym" is not + a section symbol should not include the addend; Such an + access is presumed to be an offset from "sym"; The + location of interest is just "sym". */ + if (symtype == STT_SECTION) + toff += irel->r_addend; + + toff = _bfd_merged_section_offset (abfd, &tsec, + elf_section_data (tsec)->sec_info, + toff); + + if (symtype != STT_SECTION) + toff += irel->r_addend; + } + else + toff += irel->r_addend; + + symaddr = tsec->output_section->vma + tsec->output_offset + toff; + + roff = irel->r_offset; + + if (is_branch) + { + bfd_signed_vma offset; + + reladdr = (sec->output_section->vma + + sec->output_offset + + roff) & (bfd_vma) -4; + + /* The .plt section is aligned at 32byte and the .text section + is aligned at 64byte. The .text section is right after the + .plt section. After the first relaxation pass, linker may + increase the gap between the .plt and .text sections up + to 32byte. We assume linker will always insert 32byte + between the .plt and .text sections after the the first + relaxation pass. */ + if (tsec == ia64_info->root.splt) + offset = -0x1000000 + 32; + else + offset = -0x1000000; + + /* If the branch is in range, no need to do anything. */ + if ((bfd_signed_vma) (symaddr - reladdr) >= offset + && (bfd_signed_vma) (symaddr - reladdr) <= 0x0FFFFF0) + { + /* If the 60-bit branch is in 21-bit range, optimize it. */ + if (r_type == R_IA64_PCREL60B) + { + ia64_elf_relax_brl (contents, roff); + + irel->r_info + = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), + R_IA64_PCREL21B); + + /* If the original relocation offset points to slot + 1, change it to slot 2. */ + if ((irel->r_offset & 3) == 1) + irel->r_offset += 1; + } + + continue; + } + else if (r_type == R_IA64_PCREL60B) + continue; + else if (ia64_elf_relax_br (contents, roff)) + { + irel->r_info + = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), + R_IA64_PCREL60B); + + /* Make the relocation offset point to slot 1. */ + irel->r_offset = (irel->r_offset & ~((bfd_vma) 0x3)) + 1; + continue; + } + + /* We can't put a trampoline in a .init/.fini section. Issue + an error. */ + if (strcmp (sec->output_section->name, ".init") == 0 + || strcmp (sec->output_section->name, ".fini") == 0) + { + (*_bfd_error_handler) + (_("%B: Can't relax br at 0x%lx in section `%A'. Please use brl or indirect branch."), + sec->owner, sec, (unsigned long) roff); + bfd_set_error (bfd_error_bad_value); + goto error_return; + } + + /* If the branch and target are in the same section, you've + got one honking big section and we can't help you unless + you are branching backwards. You'll get an error message + later. */ + if (tsec == sec && toff > roff) + continue; + + /* Look for an existing fixup to this address. */ + for (f = fixups; f ; f = f->next) + if (f->tsec == tsec && f->toff == toff) + break; + + if (f == NULL) + { + /* Two alternatives: If it's a branch to a PLT entry, we can + make a copy of the FULL_PLT entry. Otherwise, we'll have + to use a `brl' insn to get where we're going. */ + + size_t size; + + if (tsec == ia64_info->root.splt) + size = sizeof (plt_full_entry); + else + size = oor_branch_size; + + /* Resize the current section to make room for the new branch. */ + trampoff = (sec->size + 15) & (bfd_vma) -16; + + /* If trampoline is out of range, there is nothing we + can do. */ + offset = trampoff - (roff & (bfd_vma) -4); + if (offset < -0x1000000 || offset > 0x0FFFFF0) + continue; + + amt = trampoff + size; + contents = (bfd_byte *) bfd_realloc (contents, amt); + if (contents == NULL) + goto error_return; + sec->size = amt; + + if (tsec == ia64_info->root.splt) + { + memcpy (contents + trampoff, plt_full_entry, size); + + /* Hijack the old relocation for use as the PLTOFF reloc. */ + irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), + R_IA64_PLTOFF22); + irel->r_offset = trampoff; + } + else + { + if (size == sizeof (oor_ip)) + { + memcpy (contents + trampoff, oor_ip, size); + irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), + R_IA64_PCREL64I); + irel->r_addend -= 16; + irel->r_offset = trampoff + 2; + } + else + { + memcpy (contents + trampoff, oor_brl, size); + irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), + R_IA64_PCREL60B); + irel->r_offset = trampoff + 2; + } + + } + + /* Record the fixup so we don't do it again this section. */ + f = (struct one_fixup *) + bfd_malloc ((bfd_size_type) sizeof (*f)); + f->next = fixups; + f->tsec = tsec; + f->toff = toff; + f->trampoff = trampoff; + fixups = f; + } + else + { + /* If trampoline is out of range, there is nothing we + can do. */ + offset = f->trampoff - (roff & (bfd_vma) -4); + if (offset < -0x1000000 || offset > 0x0FFFFF0) + continue; + + /* Nop out the reloc, since we're finalizing things here. */ + irel->r_info = ELFNN_R_INFO (0, R_IA64_NONE); + } + + /* Fix up the existing branch to hit the trampoline. */ + if (ia64_elf_install_value (contents + roff, offset, r_type) + != bfd_reloc_ok) + goto error_return; + + changed_contents = TRUE; + changed_relocs = TRUE; + } + else + { + /* Fetch the gp. */ + if (gp == 0) + { + bfd *obfd = sec->output_section->owner; + gp = _bfd_get_gp_value (obfd); + if (gp == 0) + { + if (!elfNN_ia64_choose_gp (obfd, link_info, FALSE)) + goto error_return; + gp = _bfd_get_gp_value (obfd); + } + } + + /* If the data is out of range, do nothing. */ + if ((bfd_signed_vma) (symaddr - gp) >= 0x200000 + ||(bfd_signed_vma) (symaddr - gp) < -0x200000) + continue; + + if (r_type == R_IA64_GPREL22) + elfNN_ia64_update_short_info (tsec->output_section, + tsec->output_offset + toff, + ia64_info); + else if (r_type == R_IA64_LTOFF22X) + { + irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), + R_IA64_GPREL22); + changed_relocs = TRUE; + if (dyn_i->want_gotx) + { + dyn_i->want_gotx = 0; + changed_got |= !dyn_i->want_got; + } + + elfNN_ia64_update_short_info (tsec->output_section, + tsec->output_offset + toff, + ia64_info); + } + else + { + ia64_elf_relax_ldxmov (contents, roff); + irel->r_info = ELFNN_R_INFO (0, R_IA64_NONE); + changed_contents = TRUE; + changed_relocs = TRUE; + } + } + } + + /* ??? If we created fixups, this may push the code segment large + enough that the data segment moves, which will change the GP. + Reset the GP so that we re-calculate next round. We need to + do this at the _beginning_ of the next round; now will not do. */ + + /* Clean up and go home. */ + while (fixups) + { + struct one_fixup *f = fixups; + fixups = fixups->next; + free (f); + } + + if (isymbuf != NULL + && symtab_hdr->contents != (unsigned char *) isymbuf) + { + if (! link_info->keep_memory) + free (isymbuf); + else + { + /* Cache the symbols for elf_link_input_bfd. */ + symtab_hdr->contents = (unsigned char *) isymbuf; + } + } + + if (contents != NULL + && elf_section_data (sec)->this_hdr.contents != contents) + { + if (!changed_contents && !link_info->keep_memory) + free (contents); + else + { + /* Cache the section contents for elf_link_input_bfd. */ + elf_section_data (sec)->this_hdr.contents = contents; + } + } + + if (elf_section_data (sec)->relocs != internal_relocs) + { + if (!changed_relocs) + free (internal_relocs); + else + elf_section_data (sec)->relocs = internal_relocs; + } + + if (changed_got) + { + struct elfNN_ia64_allocate_data data; + data.info = link_info; + data.ofs = 0; + ia64_info->self_dtpmod_offset = (bfd_vma) -1; + + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_global_data_got, &data); + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_global_fptr_got, &data); + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_local_got, &data); + ia64_info->root.sgot->size = data.ofs; + + if (ia64_info->root.dynamic_sections_created + && ia64_info->root.srelgot != NULL) + { + /* Resize .rela.got. */ + ia64_info->root.srelgot->size = 0; + if (link_info->shared + && ia64_info->self_dtpmod_offset != (bfd_vma) -1) + ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); + data.only_got = TRUE; + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_dynrel_entries, + &data); + } + } + + if (link_info->relax_pass == 0) + { + /* Pass 0 is only needed to relax br. */ + sec->skip_relax_pass_0 = skip_relax_pass_0; + sec->skip_relax_pass_1 = skip_relax_pass_1; + } + + *again = changed_contents || changed_relocs; + return TRUE; + + error_return: + if (isymbuf != NULL && (unsigned char *) isymbuf != symtab_hdr->contents) + free (isymbuf); + if (contents != NULL + && elf_section_data (sec)->this_hdr.contents != contents) + free (contents); + if (internal_relocs != NULL + && elf_section_data (sec)->relocs != internal_relocs) + free (internal_relocs); + return FALSE; +} +#undef skip_relax_pass_0 +#undef skip_relax_pass_1 + +/* Return TRUE if NAME is an unwind table section name. */ + +static inline bfd_boolean +is_unwind_section_name (bfd *abfd, const char *name) +{ + if (elfNN_ia64_hpux_vec (abfd->xvec) + && !strcmp (name, ELF_STRING_ia64_unwind_hdr)) + return FALSE; + + return ((CONST_STRNEQ (name, ELF_STRING_ia64_unwind) + && ! CONST_STRNEQ (name, ELF_STRING_ia64_unwind_info)) + || CONST_STRNEQ (name, ELF_STRING_ia64_unwind_once)); +} + +/* Handle an IA-64 specific section when reading an object file. This + is called when bfd_section_from_shdr finds a section with an unknown + type. */ + +static bfd_boolean +elfNN_ia64_section_from_shdr (bfd *abfd, + Elf_Internal_Shdr *hdr, + const char *name, + int shindex) +{ + /* There ought to be a place to keep ELF backend specific flags, but + at the moment there isn't one. We just keep track of the + sections by their name, instead. Fortunately, the ABI gives + suggested names for all the MIPS specific sections, so we will + probably get away with this. */ + switch (hdr->sh_type) + { + case SHT_IA_64_UNWIND: + case SHT_IA_64_HP_OPT_ANOT: + break; + + case SHT_IA_64_EXT: + if (strcmp (name, ELF_STRING_ia64_archext) != 0) + return FALSE; + break; + + default: + return FALSE; + } + + if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) + return FALSE; + + return TRUE; +} + +/* Convert IA-64 specific section flags to bfd internal section flags. */ + +/* ??? There is no bfd internal flag equivalent to the SHF_IA_64_NORECOV + flag. */ + +static bfd_boolean +elfNN_ia64_section_flags (flagword *flags, + const Elf_Internal_Shdr *hdr) +{ + if (hdr->sh_flags & SHF_IA_64_SHORT) + *flags |= SEC_SMALL_DATA; + + return TRUE; +} + +/* Set the correct type for an IA-64 ELF section. We do this by the + section name, which is a hack, but ought to work. */ + +static bfd_boolean +elfNN_ia64_fake_sections (bfd *abfd, Elf_Internal_Shdr *hdr, + asection *sec) +{ + const char *name; + + name = bfd_get_section_name (abfd, sec); + + if (is_unwind_section_name (abfd, name)) + { + /* We don't have the sections numbered at this point, so sh_info + is set later, in elfNN_ia64_final_write_processing. */ + hdr->sh_type = SHT_IA_64_UNWIND; + hdr->sh_flags |= SHF_LINK_ORDER; + } + else if (strcmp (name, ELF_STRING_ia64_archext) == 0) + hdr->sh_type = SHT_IA_64_EXT; + else if (strcmp (name, ".HP.opt_annot") == 0) + hdr->sh_type = SHT_IA_64_HP_OPT_ANOT; + else if (strcmp (name, ".reloc") == 0) + /* This is an ugly, but unfortunately necessary hack that is + needed when producing EFI binaries on IA-64. It tells + elf.c:elf_fake_sections() not to consider ".reloc" as a section + containing ELF relocation info. We need this hack in order to + be able to generate ELF binaries that can be translated into + EFI applications (which are essentially COFF objects). Those + files contain a COFF ".reloc" section inside an ELFNN object, + which would normally cause BFD to segfault because it would + attempt to interpret this section as containing relocation + entries for section "oc". With this hack enabled, ".reloc" + will be treated as a normal data section, which will avoid the + segfault. However, you won't be able to create an ELFNN binary + with a section named "oc" that needs relocations, but that's + the kind of ugly side-effects you get when detecting section + types based on their names... In practice, this limitation is + unlikely to bite. */ + hdr->sh_type = SHT_PROGBITS; + + if (sec->flags & SEC_SMALL_DATA) + hdr->sh_flags |= SHF_IA_64_SHORT; + + /* Some HP linkers look for the SHF_IA_64_HP_TLS flag instead of SHF_TLS. */ + + if (elfNN_ia64_hpux_vec (abfd->xvec) && (sec->flags & SHF_TLS)) + hdr->sh_flags |= SHF_IA_64_HP_TLS; + + return TRUE; +} + +/* The final processing done just before writing out an IA-64 ELF + object file. */ + +static void +elfNN_ia64_final_write_processing (bfd *abfd, + bfd_boolean linker ATTRIBUTE_UNUSED) +{ + Elf_Internal_Shdr *hdr; + asection *s; + + for (s = abfd->sections; s; s = s->next) + { + hdr = &elf_section_data (s)->this_hdr; + switch (hdr->sh_type) + { + case SHT_IA_64_UNWIND: + /* The IA-64 processor-specific ABI requires setting sh_link + to the unwind section, whereas HP-UX requires sh_info to + do so. For maximum compatibility, we'll set both for + now... */ + hdr->sh_info = hdr->sh_link; + break; + } + } + + if (! elf_flags_init (abfd)) + { + unsigned long flags = 0; + + if (abfd->xvec->byteorder == BFD_ENDIAN_BIG) + flags |= EF_IA_64_BE; + if (bfd_get_mach (abfd) == bfd_mach_ia64_elf64) + flags |= EF_IA_64_ABI64; + + elf_elfheader(abfd)->e_flags = flags; + elf_flags_init (abfd) = TRUE; + } +} + +/* Hook called by the linker routine which adds symbols from an object + file. We use it to put .comm items in .sbss, and not .bss. */ + +static bfd_boolean +elfNN_ia64_add_symbol_hook (bfd *abfd, + struct bfd_link_info *info, + Elf_Internal_Sym *sym, + const char **namep ATTRIBUTE_UNUSED, + flagword *flagsp ATTRIBUTE_UNUSED, + asection **secp, + bfd_vma *valp) +{ + if (sym->st_shndx == SHN_COMMON + && !info->relocatable + && sym->st_size <= elf_gp_size (abfd)) + { + /* Common symbols less than or equal to -G nn bytes are + automatically put into .sbss. */ + + asection *scomm = bfd_get_section_by_name (abfd, ".scommon"); + + if (scomm == NULL) + { + scomm = bfd_make_section_with_flags (abfd, ".scommon", + (SEC_ALLOC + | SEC_IS_COMMON + | SEC_LINKER_CREATED)); + if (scomm == NULL) + return FALSE; + } + + *secp = scomm; + *valp = sym->st_size; + } + + return TRUE; +} + +/* Return the number of additional phdrs we will need. */ + +static int +elfNN_ia64_additional_program_headers (bfd *abfd, + struct bfd_link_info *info ATTRIBUTE_UNUSED) +{ + asection *s; + int ret = 0; + + /* See if we need a PT_IA_64_ARCHEXT segment. */ + s = bfd_get_section_by_name (abfd, ELF_STRING_ia64_archext); + if (s && (s->flags & SEC_LOAD)) + ++ret; + + /* Count how many PT_IA_64_UNWIND segments we need. */ + for (s = abfd->sections; s; s = s->next) + if (is_unwind_section_name (abfd, s->name) && (s->flags & SEC_LOAD)) + ++ret; + + return ret; +} + +static bfd_boolean +elfNN_ia64_modify_segment_map (bfd *abfd, + struct bfd_link_info *info ATTRIBUTE_UNUSED) +{ + struct elf_segment_map *m, **pm; + Elf_Internal_Shdr *hdr; + asection *s; + + /* If we need a PT_IA_64_ARCHEXT segment, it must come before + all PT_LOAD segments. */ + s = bfd_get_section_by_name (abfd, ELF_STRING_ia64_archext); + if (s && (s->flags & SEC_LOAD)) + { + for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next) + if (m->p_type == PT_IA_64_ARCHEXT) + break; + if (m == NULL) + { + m = ((struct elf_segment_map *) + bfd_zalloc (abfd, (bfd_size_type) sizeof *m)); + if (m == NULL) + return FALSE; + + m->p_type = PT_IA_64_ARCHEXT; + m->count = 1; + m->sections[0] = s; + + /* We want to put it after the PHDR and INTERP segments. */ + pm = &elf_tdata (abfd)->segment_map; + while (*pm != NULL + && ((*pm)->p_type == PT_PHDR + || (*pm)->p_type == PT_INTERP)) + pm = &(*pm)->next; + + m->next = *pm; + *pm = m; + } + } + + /* Install PT_IA_64_UNWIND segments, if needed. */ + for (s = abfd->sections; s; s = s->next) + { + hdr = &elf_section_data (s)->this_hdr; + if (hdr->sh_type != SHT_IA_64_UNWIND) + continue; + + if (s && (s->flags & SEC_LOAD)) + { + for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next) + if (m->p_type == PT_IA_64_UNWIND) + { + int i; + + /* Look through all sections in the unwind segment + for a match since there may be multiple sections + to a segment. */ + for (i = m->count - 1; i >= 0; --i) + if (m->sections[i] == s) + break; + + if (i >= 0) + break; + } + + if (m == NULL) + { + m = ((struct elf_segment_map *) + bfd_zalloc (abfd, (bfd_size_type) sizeof *m)); + if (m == NULL) + return FALSE; + + m->p_type = PT_IA_64_UNWIND; + m->count = 1; + m->sections[0] = s; + m->next = NULL; + + /* We want to put it last. */ + pm = &elf_tdata (abfd)->segment_map; + while (*pm != NULL) + pm = &(*pm)->next; + *pm = m; + } + } + } + + return TRUE; +} + +/* Turn on PF_IA_64_NORECOV if needed. This involves traversing all of + the input sections for each output section in the segment and testing + for SHF_IA_64_NORECOV on each. */ + +static bfd_boolean +elfNN_ia64_modify_program_headers (bfd *abfd, + struct bfd_link_info *info ATTRIBUTE_UNUSED) +{ + struct elf_obj_tdata *tdata = elf_tdata (abfd); + struct elf_segment_map *m; + Elf_Internal_Phdr *p; + + for (p = tdata->phdr, m = tdata->segment_map; m != NULL; m = m->next, p++) + if (m->p_type == PT_LOAD) + { + int i; + for (i = m->count - 1; i >= 0; --i) + { + struct bfd_link_order *order = m->sections[i]->map_head.link_order; + + while (order != NULL) + { + if (order->type == bfd_indirect_link_order) + { + asection *is = order->u.indirect.section; + bfd_vma flags = elf_section_data(is)->this_hdr.sh_flags; + if (flags & SHF_IA_64_NORECOV) + { + p->p_flags |= PF_IA_64_NORECOV; + goto found; + } + } + order = order->next; + } + } + found:; + } + + return TRUE; +} + +/* According to the Tahoe assembler spec, all labels starting with a + '.' are local. */ + +static bfd_boolean +elfNN_ia64_is_local_label_name (bfd *abfd ATTRIBUTE_UNUSED, + const char *name) +{ + return name[0] == '.'; +} + +/* Should we do dynamic things to this symbol? */ + +static bfd_boolean +elfNN_ia64_dynamic_symbol_p (struct elf_link_hash_entry *h, + struct bfd_link_info *info, int r_type) +{ + bfd_boolean ignore_protected + = ((r_type & 0xf8) == 0x40 /* FPTR relocs */ + || (r_type & 0xf8) == 0x50); /* LTOFF_FPTR relocs */ + + return _bfd_elf_dynamic_symbol_p (h, info, ignore_protected); +} + +static struct bfd_hash_entry* +elfNN_ia64_new_elf_hash_entry (struct bfd_hash_entry *entry, + struct bfd_hash_table *table, + const char *string) +{ + struct elfNN_ia64_link_hash_entry *ret; + ret = (struct elfNN_ia64_link_hash_entry *) entry; + + /* Allocate the structure if it has not already been allocated by a + subclass. */ + if (!ret) + ret = bfd_hash_allocate (table, sizeof (*ret)); + + if (!ret) + return 0; + + /* Call the allocation method of the superclass. */ + ret = ((struct elfNN_ia64_link_hash_entry *) + _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, + table, string)); + + ret->info = NULL; + ret->count = 0; + ret->sorted_count = 0; + ret->size = 0; + return (struct bfd_hash_entry *) ret; +} + +static void +elfNN_ia64_hash_copy_indirect (struct bfd_link_info *info, + struct elf_link_hash_entry *xdir, + struct elf_link_hash_entry *xind) +{ + struct elfNN_ia64_link_hash_entry *dir, *ind; + + dir = (struct elfNN_ia64_link_hash_entry *) xdir; + ind = (struct elfNN_ia64_link_hash_entry *) xind; + + /* Copy down any references that we may have already seen to the + symbol which just became indirect. */ + + dir->root.ref_dynamic |= ind->root.ref_dynamic; + dir->root.ref_regular |= ind->root.ref_regular; + dir->root.ref_regular_nonweak |= ind->root.ref_regular_nonweak; + dir->root.needs_plt |= ind->root.needs_plt; + + if (ind->root.root.type != bfd_link_hash_indirect) + return; + + /* Copy over the got and plt data. This would have been done + by check_relocs. */ + + if (ind->info != NULL) + { + struct elfNN_ia64_dyn_sym_info *dyn_i; + unsigned int count; + + if (dir->info) + free (dir->info); + + dir->info = ind->info; + dir->count = ind->count; + dir->sorted_count = ind->sorted_count; + dir->size = ind->size; + + ind->info = NULL; + ind->count = 0; + ind->sorted_count = 0; + ind->size = 0; + + /* Fix up the dyn_sym_info pointers to the global symbol. */ + for (count = dir->count, dyn_i = dir->info; + count != 0; + count--, dyn_i++) + dyn_i->h = &dir->root; + } + + /* Copy over the dynindx. */ + + if (ind->root.dynindx != -1) + { + if (dir->root.dynindx != -1) + _bfd_elf_strtab_delref (elf_hash_table (info)->dynstr, + dir->root.dynstr_index); + dir->root.dynindx = ind->root.dynindx; + dir->root.dynstr_index = ind->root.dynstr_index; + ind->root.dynindx = -1; + ind->root.dynstr_index = 0; + } +} + +static void +elfNN_ia64_hash_hide_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *xh, + bfd_boolean force_local) +{ + struct elfNN_ia64_link_hash_entry *h; + struct elfNN_ia64_dyn_sym_info *dyn_i; + unsigned int count; + + h = (struct elfNN_ia64_link_hash_entry *)xh; + + _bfd_elf_link_hash_hide_symbol (info, &h->root, force_local); + + for (count = h->count, dyn_i = h->info; + count != 0; + count--, dyn_i++) + { + dyn_i->want_plt2 = 0; + dyn_i->want_plt = 0; + } +} + +/* Compute a hash of a local hash entry. */ + +static hashval_t +elfNN_ia64_local_htab_hash (const void *ptr) +{ + struct elfNN_ia64_local_hash_entry *entry + = (struct elfNN_ia64_local_hash_entry *) ptr; + + return ELF_LOCAL_SYMBOL_HASH (entry->id, entry->r_sym); +} + +/* Compare local hash entries. */ + +static int +elfNN_ia64_local_htab_eq (const void *ptr1, const void *ptr2) +{ + struct elfNN_ia64_local_hash_entry *entry1 + = (struct elfNN_ia64_local_hash_entry *) ptr1; + struct elfNN_ia64_local_hash_entry *entry2 + = (struct elfNN_ia64_local_hash_entry *) ptr2; + + return entry1->id == entry2->id && entry1->r_sym == entry2->r_sym; +} + +/* Create the derived linker hash table. The IA-64 ELF port uses this + derived hash table to keep information specific to the IA-64 ElF + linker (without using static variables). */ + +static struct bfd_link_hash_table * +elfNN_ia64_hash_table_create (bfd *abfd) +{ + struct elfNN_ia64_link_hash_table *ret; + + ret = bfd_zmalloc ((bfd_size_type) sizeof (*ret)); + if (!ret) + return NULL; + + if (!_bfd_elf_link_hash_table_init (&ret->root, abfd, + elfNN_ia64_new_elf_hash_entry, + sizeof (struct elfNN_ia64_link_hash_entry), + IA64_ELF_DATA)) + { + free (ret); + return NULL; + } + + ret->loc_hash_table = htab_try_create (1024, elfNN_ia64_local_htab_hash, + elfNN_ia64_local_htab_eq, NULL); + ret->loc_hash_memory = objalloc_create (); + if (!ret->loc_hash_table || !ret->loc_hash_memory) + { + free (ret); + return NULL; + } + + return &ret->root.root; +} + +/* Free the global elfNN_ia64_dyn_sym_info array. */ + +static bfd_boolean +elfNN_ia64_global_dyn_info_free (void **xentry, + PTR unused ATTRIBUTE_UNUSED) +{ + struct elfNN_ia64_link_hash_entry *entry + = (struct elfNN_ia64_link_hash_entry *) xentry; + + if (entry->info) + { + free (entry->info); + entry->info = NULL; + entry->count = 0; + entry->sorted_count = 0; + entry->size = 0; + } + + return TRUE; +} + +/* Free the local elfNN_ia64_dyn_sym_info array. */ + +static bfd_boolean +elfNN_ia64_local_dyn_info_free (void **slot, + PTR unused ATTRIBUTE_UNUSED) +{ + struct elfNN_ia64_local_hash_entry *entry + = (struct elfNN_ia64_local_hash_entry *) *slot; + + if (entry->info) + { + free (entry->info); + entry->info = NULL; + entry->count = 0; + entry->sorted_count = 0; + entry->size = 0; + } + + return TRUE; +} + +/* Destroy IA-64 linker hash table. */ + +static void +elfNN_ia64_hash_table_free (struct bfd_link_hash_table *hash) +{ + struct elfNN_ia64_link_hash_table *ia64_info + = (struct elfNN_ia64_link_hash_table *) hash; + if (ia64_info->loc_hash_table) + { + htab_traverse (ia64_info->loc_hash_table, + elfNN_ia64_local_dyn_info_free, NULL); + htab_delete (ia64_info->loc_hash_table); + } + if (ia64_info->loc_hash_memory) + objalloc_free ((struct objalloc *) ia64_info->loc_hash_memory); + elf_link_hash_traverse (&ia64_info->root, + elfNN_ia64_global_dyn_info_free, NULL); + _bfd_generic_link_hash_table_free (hash); +} + +/* Traverse both local and global hash tables. */ + +struct elfNN_ia64_dyn_sym_traverse_data +{ + bfd_boolean (*func) (struct elfNN_ia64_dyn_sym_info *, PTR); + PTR data; +}; + +static bfd_boolean +elfNN_ia64_global_dyn_sym_thunk (struct bfd_hash_entry *xentry, + PTR xdata) +{ + struct elfNN_ia64_link_hash_entry *entry + = (struct elfNN_ia64_link_hash_entry *) xentry; + struct elfNN_ia64_dyn_sym_traverse_data *data + = (struct elfNN_ia64_dyn_sym_traverse_data *) xdata; + struct elfNN_ia64_dyn_sym_info *dyn_i; + unsigned int count; + + for (count = entry->count, dyn_i = entry->info; + count != 0; + count--, dyn_i++) + if (! (*data->func) (dyn_i, data->data)) + return FALSE; + return TRUE; +} + +static bfd_boolean +elfNN_ia64_local_dyn_sym_thunk (void **slot, PTR xdata) +{ + struct elfNN_ia64_local_hash_entry *entry + = (struct elfNN_ia64_local_hash_entry *) *slot; + struct elfNN_ia64_dyn_sym_traverse_data *data + = (struct elfNN_ia64_dyn_sym_traverse_data *) xdata; + struct elfNN_ia64_dyn_sym_info *dyn_i; + unsigned int count; + + for (count = entry->count, dyn_i = entry->info; + count != 0; + count--, dyn_i++) + if (! (*data->func) (dyn_i, data->data)) + return FALSE; + return TRUE; +} + +static void +elfNN_ia64_dyn_sym_traverse (struct elfNN_ia64_link_hash_table *ia64_info, + bfd_boolean (*func) (struct elfNN_ia64_dyn_sym_info *, PTR), + PTR data) +{ + struct elfNN_ia64_dyn_sym_traverse_data xdata; + + xdata.func = func; + xdata.data = data; + + elf_link_hash_traverse (&ia64_info->root, + elfNN_ia64_global_dyn_sym_thunk, &xdata); + htab_traverse (ia64_info->loc_hash_table, + elfNN_ia64_local_dyn_sym_thunk, &xdata); +} + +static bfd_boolean +elfNN_ia64_create_dynamic_sections (bfd *abfd, + struct bfd_link_info *info) +{ + struct elfNN_ia64_link_hash_table *ia64_info; + asection *s; + + if (! _bfd_elf_create_dynamic_sections (abfd, info)) + return FALSE; + + ia64_info = elfNN_ia64_hash_table (info); + if (ia64_info == NULL) + return FALSE; + + { + flagword flags = bfd_get_section_flags (abfd, ia64_info->root.sgot); + bfd_set_section_flags (abfd, ia64_info->root.sgot, + SEC_SMALL_DATA | flags); + /* The .got section is always aligned at 8 bytes. */ + bfd_set_section_alignment (abfd, ia64_info->root.sgot, 3); + } + + if (!get_pltoff (abfd, info, ia64_info)) + return FALSE; + + s = bfd_make_section_with_flags (abfd, ".rela.IA_64.pltoff", + (SEC_ALLOC | SEC_LOAD + | SEC_HAS_CONTENTS + | SEC_IN_MEMORY + | SEC_LINKER_CREATED + | SEC_READONLY)); + if (s == NULL + || !bfd_set_section_alignment (abfd, s, LOG_SECTION_ALIGN)) + return FALSE; + ia64_info->rel_pltoff_sec = s; + + return TRUE; +} + +/* Find and/or create a hash entry for local symbol. */ +static struct elfNN_ia64_local_hash_entry * +get_local_sym_hash (struct elfNN_ia64_link_hash_table *ia64_info, + bfd *abfd, const Elf_Internal_Rela *rel, + bfd_boolean create) +{ + struct elfNN_ia64_local_hash_entry e, *ret; + asection *sec = abfd->sections; + hashval_t h = ELF_LOCAL_SYMBOL_HASH (sec->id, + ELFNN_R_SYM (rel->r_info)); + void **slot; + + e.id = sec->id; + e.r_sym = ELFNN_R_SYM (rel->r_info); + slot = htab_find_slot_with_hash (ia64_info->loc_hash_table, &e, h, + create ? INSERT : NO_INSERT); + + if (!slot) + return NULL; + + if (*slot) + return (struct elfNN_ia64_local_hash_entry *) *slot; + + ret = (struct elfNN_ia64_local_hash_entry *) + objalloc_alloc ((struct objalloc *) ia64_info->loc_hash_memory, + sizeof (struct elfNN_ia64_local_hash_entry)); + if (ret) + { + memset (ret, 0, sizeof (*ret)); + ret->id = sec->id; + ret->r_sym = ELFNN_R_SYM (rel->r_info); + *slot = ret; + } + return ret; +} + +/* Used to sort elfNN_ia64_dyn_sym_info array. */ + +static int +addend_compare (const void *xp, const void *yp) +{ + const struct elfNN_ia64_dyn_sym_info *x + = (const struct elfNN_ia64_dyn_sym_info *) xp; + const struct elfNN_ia64_dyn_sym_info *y + = (const struct elfNN_ia64_dyn_sym_info *) yp; + + return x->addend < y->addend ? -1 : x->addend > y->addend ? 1 : 0; +} + +/* Sort elfNN_ia64_dyn_sym_info array and remove duplicates. */ + +static unsigned int +sort_dyn_sym_info (struct elfNN_ia64_dyn_sym_info *info, + unsigned int count) +{ + bfd_vma curr, prev, got_offset; + unsigned int i, kept, dupes, diff, dest, src, len; + + qsort (info, count, sizeof (*info), addend_compare); + + /* Find the first duplicate. */ + prev = info [0].addend; + got_offset = info [0].got_offset; + for (i = 1; i < count; i++) + { + curr = info [i].addend; + if (curr == prev) + { + /* For duplicates, make sure that GOT_OFFSET is valid. */ + if (got_offset == (bfd_vma) -1) + got_offset = info [i].got_offset; + break; + } + got_offset = info [i].got_offset; + prev = curr; + } + + /* We may move a block of elements to here. */ + dest = i++; + + /* Remove duplicates. */ + if (i < count) + { + while (i < count) + { + /* For duplicates, make sure that the kept one has a valid + got_offset. */ + kept = dest - 1; + if (got_offset != (bfd_vma) -1) + info [kept].got_offset = got_offset; + + curr = info [i].addend; + got_offset = info [i].got_offset; + + /* Move a block of elements whose first one is different from + the previous. */ + if (curr == prev) + { + for (src = i + 1; src < count; src++) + { + if (info [src].addend != curr) + break; + /* For duplicates, make sure that GOT_OFFSET is + valid. */ + if (got_offset == (bfd_vma) -1) + got_offset = info [src].got_offset; + } + + /* Make sure that the kept one has a valid got_offset. */ + if (got_offset != (bfd_vma) -1) + info [kept].got_offset = got_offset; + } + else + src = i; + + if (src >= count) + break; + + /* Find the next duplicate. SRC will be kept. */ + prev = info [src].addend; + got_offset = info [src].got_offset; + for (dupes = src + 1; dupes < count; dupes ++) + { + curr = info [dupes].addend; + if (curr == prev) + { + /* Make sure that got_offset is valid. */ + if (got_offset == (bfd_vma) -1) + got_offset = info [dupes].got_offset; + + /* For duplicates, make sure that the kept one has + a valid got_offset. */ + if (got_offset != (bfd_vma) -1) + info [dupes - 1].got_offset = got_offset; + break; + } + got_offset = info [dupes].got_offset; + prev = curr; + } + + /* How much to move. */ + len = dupes - src; + i = dupes + 1; + + if (len == 1 && dupes < count) + { + /* If we only move 1 element, we combine it with the next + one. There must be at least a duplicate. Find the + next different one. */ + for (diff = dupes + 1, src++; diff < count; diff++, src++) + { + if (info [diff].addend != curr) + break; + /* Make sure that got_offset is valid. */ + if (got_offset == (bfd_vma) -1) + got_offset = info [diff].got_offset; + } + + /* Makre sure that the last duplicated one has an valid + offset. */ + BFD_ASSERT (curr == prev); + if (got_offset != (bfd_vma) -1) + info [diff - 1].got_offset = got_offset; + + if (diff < count) + { + /* Find the next duplicate. Track the current valid + offset. */ + prev = info [diff].addend; + got_offset = info [diff].got_offset; + for (dupes = diff + 1; dupes < count; dupes ++) + { + curr = info [dupes].addend; + if (curr == prev) + { + /* For duplicates, make sure that GOT_OFFSET + is valid. */ + if (got_offset == (bfd_vma) -1) + got_offset = info [dupes].got_offset; + break; + } + got_offset = info [dupes].got_offset; + prev = curr; + diff++; + } + + len = diff - src + 1; + i = diff + 1; + } + } + + memmove (&info [dest], &info [src], len * sizeof (*info)); + + dest += len; + } + + count = dest; + } + else + { + /* When we get here, either there is no duplicate at all or + the only duplicate is the last element. */ + if (dest < count) + { + /* If the last element is a duplicate, make sure that the + kept one has a valid got_offset. We also update count. */ + if (got_offset != (bfd_vma) -1) + info [dest - 1].got_offset = got_offset; + count = dest; + } + } + + return count; +} + +/* Find and/or create a descriptor for dynamic symbol info. This will + vary based on global or local symbol, and the addend to the reloc. + + We don't sort when inserting. Also, we sort and eliminate + duplicates if there is an unsorted section. Typically, this will + only happen once, because we do all insertions before lookups. We + then use bsearch to do a lookup. This also allows lookups to be + fast. So we have fast insertion (O(log N) due to duplicate check), + fast lookup (O(log N)) and one sort (O(N log N) expected time). + Previously, all lookups were O(N) because of the use of the linked + list and also all insertions were O(N) because of the check for + duplicates. There are some complications here because the array + size grows occasionally, which may add an O(N) factor, but this + should be rare. Also, we free the excess array allocation, which + requires a copy which is O(N), but this only happens once. */ + +static struct elfNN_ia64_dyn_sym_info * +get_dyn_sym_info (struct elfNN_ia64_link_hash_table *ia64_info, + struct elf_link_hash_entry *h, bfd *abfd, + const Elf_Internal_Rela *rel, bfd_boolean create) +{ + struct elfNN_ia64_dyn_sym_info **info_p, *info, *dyn_i, key; + unsigned int *count_p, *sorted_count_p, *size_p; + unsigned int count, sorted_count, size; + bfd_vma addend = rel ? rel->r_addend : 0; + bfd_size_type amt; + + if (h) + { + struct elfNN_ia64_link_hash_entry *global_h; + + global_h = (struct elfNN_ia64_link_hash_entry *) h; + info_p = &global_h->info; + count_p = &global_h->count; + sorted_count_p = &global_h->sorted_count; + size_p = &global_h->size; + } + else + { + struct elfNN_ia64_local_hash_entry *loc_h; + + loc_h = get_local_sym_hash (ia64_info, abfd, rel, create); + if (!loc_h) + { + BFD_ASSERT (!create); + return NULL; + } + + info_p = &loc_h->info; + count_p = &loc_h->count; + sorted_count_p = &loc_h->sorted_count; + size_p = &loc_h->size; + } + + count = *count_p; + sorted_count = *sorted_count_p; + size = *size_p; + info = *info_p; + if (create) + { + /* When we create the array, we don't check for duplicates, + except in the previously sorted section if one exists, and + against the last inserted entry. This allows insertions to + be fast. */ + if (info) + { + if (sorted_count) + { + /* Try bsearch first on the sorted section. */ + key.addend = addend; + dyn_i = bsearch (&key, info, sorted_count, + sizeof (*info), addend_compare); + + if (dyn_i) + { + return dyn_i; + } + } + + /* Do a quick check for the last inserted entry. */ + dyn_i = info + count - 1; + if (dyn_i->addend == addend) + { + return dyn_i; + } + } + + if (size == 0) + { + /* It is the very first element. We create the array of size + 1. */ + size = 1; + amt = size * sizeof (*info); + info = bfd_malloc (amt); + } + else if (size <= count) + { + /* We double the array size every time when we reach the + size limit. */ + size += size; + amt = size * sizeof (*info); + info = bfd_realloc (info, amt); + } + else + goto has_space; + + if (info == NULL) + return NULL; + *size_p = size; + *info_p = info; + +has_space: + /* Append the new one to the array. */ + dyn_i = info + count; + memset (dyn_i, 0, sizeof (*dyn_i)); + dyn_i->got_offset = (bfd_vma) -1; + dyn_i->addend = addend; + + /* We increment count only since the new ones are unsorted and + may have duplicate. */ + (*count_p)++; + } + else + { + /* It is a lookup without insertion. Sort array if part of the + array isn't sorted. */ + if (count != sorted_count) + { + count = sort_dyn_sym_info (info, count); + *count_p = count; + *sorted_count_p = count; + } + + /* Free unused memory. */ + if (size != count) + { + amt = count * sizeof (*info); + info = bfd_malloc (amt); + if (info != NULL) + { + memcpy (info, *info_p, amt); + free (*info_p); + *size_p = count; + *info_p = info; + } + } + + key.addend = addend; + dyn_i = bsearch (&key, info, count, + sizeof (*info), addend_compare); + } + + return dyn_i; +} + +static asection * +get_got (bfd *abfd, struct bfd_link_info *info, + struct elfNN_ia64_link_hash_table *ia64_info) +{ + asection *got; + bfd *dynobj; + + got = ia64_info->root.sgot; + if (!got) + { + flagword flags; + + dynobj = ia64_info->root.dynobj; + if (!dynobj) + ia64_info->root.dynobj = dynobj = abfd; + if (!_bfd_elf_create_got_section (dynobj, info)) + return 0; + + got = ia64_info->root.sgot; + + /* The .got section is always aligned at 8 bytes. */ + if (!bfd_set_section_alignment (abfd, got, 3)) + return 0; + + flags = bfd_get_section_flags (abfd, got); + bfd_set_section_flags (abfd, got, SEC_SMALL_DATA | flags); + } + + return got; +} + +/* Create function descriptor section (.opd). This section is called .opd + because it contains "official procedure descriptors". The "official" + refers to the fact that these descriptors are used when taking the address + of a procedure, thus ensuring a unique address for each procedure. */ + +static asection * +get_fptr (bfd *abfd, struct bfd_link_info *info, + struct elfNN_ia64_link_hash_table *ia64_info) +{ + asection *fptr; + bfd *dynobj; + + fptr = ia64_info->fptr_sec; + if (!fptr) + { + dynobj = ia64_info->root.dynobj; + if (!dynobj) + ia64_info->root.dynobj = dynobj = abfd; + + fptr = bfd_make_section_with_flags (dynobj, ".opd", + (SEC_ALLOC + | SEC_LOAD + | SEC_HAS_CONTENTS + | SEC_IN_MEMORY + | (info->pie ? 0 : SEC_READONLY) + | SEC_LINKER_CREATED)); + if (!fptr + || !bfd_set_section_alignment (abfd, fptr, 4)) + { + BFD_ASSERT (0); + return NULL; + } + + ia64_info->fptr_sec = fptr; + + if (info->pie) + { + asection *fptr_rel; + fptr_rel = bfd_make_section_with_flags (dynobj, ".rela.opd", + (SEC_ALLOC | SEC_LOAD + | SEC_HAS_CONTENTS + | SEC_IN_MEMORY + | SEC_LINKER_CREATED + | SEC_READONLY)); + if (fptr_rel == NULL + || !bfd_set_section_alignment (abfd, fptr_rel, + LOG_SECTION_ALIGN)) + { + BFD_ASSERT (0); + return NULL; + } + + ia64_info->rel_fptr_sec = fptr_rel; + } + } + + return fptr; +} + +static asection * +get_pltoff (bfd *abfd, struct bfd_link_info *info ATTRIBUTE_UNUSED, + struct elfNN_ia64_link_hash_table *ia64_info) +{ + asection *pltoff; + bfd *dynobj; + + pltoff = ia64_info->pltoff_sec; + if (!pltoff) + { + dynobj = ia64_info->root.dynobj; + if (!dynobj) + ia64_info->root.dynobj = dynobj = abfd; + + pltoff = bfd_make_section_with_flags (dynobj, + ELF_STRING_ia64_pltoff, + (SEC_ALLOC + | SEC_LOAD + | SEC_HAS_CONTENTS + | SEC_IN_MEMORY + | SEC_SMALL_DATA + | SEC_LINKER_CREATED)); + if (!pltoff + || !bfd_set_section_alignment (abfd, pltoff, 4)) + { + BFD_ASSERT (0); + return NULL; + } + + ia64_info->pltoff_sec = pltoff; + } + + return pltoff; +} + +static asection * +get_reloc_section (bfd *abfd, + struct elfNN_ia64_link_hash_table *ia64_info, + asection *sec, bfd_boolean create) +{ + const char *srel_name; + asection *srel; + bfd *dynobj; + + srel_name = (bfd_elf_string_from_elf_section + (abfd, elf_elfheader(abfd)->e_shstrndx, + _bfd_elf_single_rel_hdr (sec)->sh_name)); + if (srel_name == NULL) + return NULL; + + dynobj = ia64_info->root.dynobj; + if (!dynobj) + ia64_info->root.dynobj = dynobj = abfd; + + srel = bfd_get_section_by_name (dynobj, srel_name); + if (srel == NULL && create) + { + srel = bfd_make_section_with_flags (dynobj, srel_name, + (SEC_ALLOC | SEC_LOAD + | SEC_HAS_CONTENTS + | SEC_IN_MEMORY + | SEC_LINKER_CREATED + | SEC_READONLY)); + if (srel == NULL + || !bfd_set_section_alignment (dynobj, srel, + LOG_SECTION_ALIGN)) + return NULL; + } + + return srel; +} + +static bfd_boolean +count_dyn_reloc (bfd *abfd, struct elfNN_ia64_dyn_sym_info *dyn_i, + asection *srel, int type, bfd_boolean reltext) +{ + struct elfNN_ia64_dyn_reloc_entry *rent; + + for (rent = dyn_i->reloc_entries; rent; rent = rent->next) + if (rent->srel == srel && rent->type == type) + break; + + if (!rent) + { + rent = ((struct elfNN_ia64_dyn_reloc_entry *) + bfd_alloc (abfd, (bfd_size_type) sizeof (*rent))); + if (!rent) + return FALSE; + + rent->next = dyn_i->reloc_entries; + rent->srel = srel; + rent->type = type; + rent->count = 0; + dyn_i->reloc_entries = rent; + } + rent->reltext = reltext; + rent->count++; + + return TRUE; +} + +static bfd_boolean +elfNN_ia64_check_relocs (bfd *abfd, struct bfd_link_info *info, + asection *sec, + const Elf_Internal_Rela *relocs) +{ + struct elfNN_ia64_link_hash_table *ia64_info; + const Elf_Internal_Rela *relend; + Elf_Internal_Shdr *symtab_hdr; + const Elf_Internal_Rela *rel; + asection *got, *fptr, *srel, *pltoff; + enum { + NEED_GOT = 1, + NEED_GOTX = 2, + NEED_FPTR = 4, + NEED_PLTOFF = 8, + NEED_MIN_PLT = 16, + NEED_FULL_PLT = 32, + NEED_DYNREL = 64, + NEED_LTOFF_FPTR = 128, + NEED_TPREL = 256, + NEED_DTPMOD = 512, + NEED_DTPREL = 1024 + }; + int need_entry; + struct elf_link_hash_entry *h; + unsigned long r_symndx; + bfd_boolean maybe_dynamic; + + if (info->relocatable) + return TRUE; + + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + ia64_info = elfNN_ia64_hash_table (info); + if (ia64_info == NULL) + return FALSE; + + got = fptr = srel = pltoff = NULL; + + relend = relocs + sec->reloc_count; + + /* We scan relocations first to create dynamic relocation arrays. We + modified get_dyn_sym_info to allow fast insertion and support fast + lookup in the next loop. */ + for (rel = relocs; rel < relend; ++rel) + { + r_symndx = ELFNN_R_SYM (rel->r_info); + if (r_symndx >= symtab_hdr->sh_info) + { + long indx = r_symndx - symtab_hdr->sh_info; + h = elf_sym_hashes (abfd)[indx]; + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + } + else + h = NULL; + + /* We can only get preliminary data on whether a symbol is + locally or externally defined, as not all of the input files + have yet been processed. Do something with what we know, as + this may help reduce memory usage and processing time later. */ + maybe_dynamic = (h && ((!info->executable + && (!SYMBOLIC_BIND (info, h) + || info->unresolved_syms_in_shared_libs == RM_IGNORE)) + || !h->def_regular + || h->root.type == bfd_link_hash_defweak)); + + need_entry = 0; + switch (ELFNN_R_TYPE (rel->r_info)) + { + case R_IA64_TPREL64MSB: + case R_IA64_TPREL64LSB: + if (info->shared || maybe_dynamic) + need_entry = NEED_DYNREL; + break; + + case R_IA64_LTOFF_TPREL22: + need_entry = NEED_TPREL; + if (info->shared) + info->flags |= DF_STATIC_TLS; + break; + + case R_IA64_DTPREL32MSB: + case R_IA64_DTPREL32LSB: + case R_IA64_DTPREL64MSB: + case R_IA64_DTPREL64LSB: + if (info->shared || maybe_dynamic) + need_entry = NEED_DYNREL; + break; + + case R_IA64_LTOFF_DTPREL22: + need_entry = NEED_DTPREL; + break; + + case R_IA64_DTPMOD64MSB: + case R_IA64_DTPMOD64LSB: + if (info->shared || maybe_dynamic) + need_entry = NEED_DYNREL; + break; + + case R_IA64_LTOFF_DTPMOD22: + need_entry = NEED_DTPMOD; + break; + + case R_IA64_LTOFF_FPTR22: + case R_IA64_LTOFF_FPTR64I: + case R_IA64_LTOFF_FPTR32MSB: + case R_IA64_LTOFF_FPTR32LSB: + case R_IA64_LTOFF_FPTR64MSB: + case R_IA64_LTOFF_FPTR64LSB: + need_entry = NEED_FPTR | NEED_GOT | NEED_LTOFF_FPTR; + break; + + case R_IA64_FPTR64I: + case R_IA64_FPTR32MSB: + case R_IA64_FPTR32LSB: + case R_IA64_FPTR64MSB: + case R_IA64_FPTR64LSB: + if (info->shared || h) + need_entry = NEED_FPTR | NEED_DYNREL; + else + need_entry = NEED_FPTR; + break; + + case R_IA64_LTOFF22: + case R_IA64_LTOFF64I: + need_entry = NEED_GOT; + break; + + case R_IA64_LTOFF22X: + need_entry = NEED_GOTX; + break; + + case R_IA64_PLTOFF22: + case R_IA64_PLTOFF64I: + case R_IA64_PLTOFF64MSB: + case R_IA64_PLTOFF64LSB: + need_entry = NEED_PLTOFF; + if (h) + { + if (maybe_dynamic) + need_entry |= NEED_MIN_PLT; + } + else + { + (*info->callbacks->warning) + (info, _("@pltoff reloc against local symbol"), 0, + abfd, 0, (bfd_vma) 0); + } + break; + + case R_IA64_PCREL21B: + case R_IA64_PCREL60B: + /* Depending on where this symbol is defined, we may or may not + need a full plt entry. Only skip if we know we'll not need + the entry -- static or symbolic, and the symbol definition + has already been seen. */ + if (maybe_dynamic && rel->r_addend == 0) + need_entry = NEED_FULL_PLT; + break; + + case R_IA64_IMM14: + case R_IA64_IMM22: + case R_IA64_IMM64: + case R_IA64_DIR32MSB: + case R_IA64_DIR32LSB: + case R_IA64_DIR64MSB: + case R_IA64_DIR64LSB: + /* Shared objects will always need at least a REL relocation. */ + if (info->shared || maybe_dynamic) + need_entry = NEED_DYNREL; + break; + + case R_IA64_IPLTMSB: + case R_IA64_IPLTLSB: + /* Shared objects will always need at least a REL relocation. */ + if (info->shared || maybe_dynamic) + need_entry = NEED_DYNREL; + break; + + case R_IA64_PCREL22: + case R_IA64_PCREL64I: + case R_IA64_PCREL32MSB: + case R_IA64_PCREL32LSB: + case R_IA64_PCREL64MSB: + case R_IA64_PCREL64LSB: + if (maybe_dynamic) + need_entry = NEED_DYNREL; + break; + } + + if (!need_entry) + continue; + + if ((need_entry & NEED_FPTR) != 0 + && rel->r_addend) + { + (*info->callbacks->warning) + (info, _("non-zero addend in @fptr reloc"), 0, + abfd, 0, (bfd_vma) 0); + } + + if (get_dyn_sym_info (ia64_info, h, abfd, rel, TRUE) == NULL) + return FALSE; + } + + /* Now, we only do lookup without insertion, which is very fast + with the modified get_dyn_sym_info. */ + for (rel = relocs; rel < relend; ++rel) + { + struct elfNN_ia64_dyn_sym_info *dyn_i; + int dynrel_type = R_IA64_NONE; + + r_symndx = ELFNN_R_SYM (rel->r_info); + if (r_symndx >= symtab_hdr->sh_info) + { + /* We're dealing with a global symbol -- find its hash entry + and mark it as being referenced. */ + long indx = r_symndx - symtab_hdr->sh_info; + h = elf_sym_hashes (abfd)[indx]; + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + + h->ref_regular = 1; + } + else + h = NULL; + + /* We can only get preliminary data on whether a symbol is + locally or externally defined, as not all of the input files + have yet been processed. Do something with what we know, as + this may help reduce memory usage and processing time later. */ + maybe_dynamic = (h && ((!info->executable + && (!SYMBOLIC_BIND (info, h) + || info->unresolved_syms_in_shared_libs == RM_IGNORE)) + || !h->def_regular + || h->root.type == bfd_link_hash_defweak)); + + need_entry = 0; + switch (ELFNN_R_TYPE (rel->r_info)) + { + case R_IA64_TPREL64MSB: + case R_IA64_TPREL64LSB: + if (info->shared || maybe_dynamic) + need_entry = NEED_DYNREL; + dynrel_type = R_IA64_TPREL64LSB; + if (info->shared) + info->flags |= DF_STATIC_TLS; + break; + + case R_IA64_LTOFF_TPREL22: + need_entry = NEED_TPREL; + if (info->shared) + info->flags |= DF_STATIC_TLS; + break; + + case R_IA64_DTPREL32MSB: + case R_IA64_DTPREL32LSB: + case R_IA64_DTPREL64MSB: + case R_IA64_DTPREL64LSB: + if (info->shared || maybe_dynamic) + need_entry = NEED_DYNREL; + dynrel_type = R_IA64_DTPRELNNLSB; + break; + + case R_IA64_LTOFF_DTPREL22: + need_entry = NEED_DTPREL; + break; + + case R_IA64_DTPMOD64MSB: + case R_IA64_DTPMOD64LSB: + if (info->shared || maybe_dynamic) + need_entry = NEED_DYNREL; + dynrel_type = R_IA64_DTPMOD64LSB; + break; + + case R_IA64_LTOFF_DTPMOD22: + need_entry = NEED_DTPMOD; + break; + + case R_IA64_LTOFF_FPTR22: + case R_IA64_LTOFF_FPTR64I: + case R_IA64_LTOFF_FPTR32MSB: + case R_IA64_LTOFF_FPTR32LSB: + case R_IA64_LTOFF_FPTR64MSB: + case R_IA64_LTOFF_FPTR64LSB: + need_entry = NEED_FPTR | NEED_GOT | NEED_LTOFF_FPTR; + break; + + case R_IA64_FPTR64I: + case R_IA64_FPTR32MSB: + case R_IA64_FPTR32LSB: + case R_IA64_FPTR64MSB: + case R_IA64_FPTR64LSB: + if (info->shared || h) + need_entry = NEED_FPTR | NEED_DYNREL; + else + need_entry = NEED_FPTR; + dynrel_type = R_IA64_FPTRNNLSB; + break; + + case R_IA64_LTOFF22: + case R_IA64_LTOFF64I: + need_entry = NEED_GOT; + break; + + case R_IA64_LTOFF22X: + need_entry = NEED_GOTX; + break; + + case R_IA64_PLTOFF22: + case R_IA64_PLTOFF64I: + case R_IA64_PLTOFF64MSB: + case R_IA64_PLTOFF64LSB: + need_entry = NEED_PLTOFF; + if (h) + { + if (maybe_dynamic) + need_entry |= NEED_MIN_PLT; + } + break; + + case R_IA64_PCREL21B: + case R_IA64_PCREL60B: + /* Depending on where this symbol is defined, we may or may not + need a full plt entry. Only skip if we know we'll not need + the entry -- static or symbolic, and the symbol definition + has already been seen. */ + if (maybe_dynamic && rel->r_addend == 0) + need_entry = NEED_FULL_PLT; + break; + + case R_IA64_IMM14: + case R_IA64_IMM22: + case R_IA64_IMM64: + case R_IA64_DIR32MSB: + case R_IA64_DIR32LSB: + case R_IA64_DIR64MSB: + case R_IA64_DIR64LSB: + /* Shared objects will always need at least a REL relocation. */ + if (info->shared || maybe_dynamic) + need_entry = NEED_DYNREL; + dynrel_type = R_IA64_DIRNNLSB; + break; + + case R_IA64_IPLTMSB: + case R_IA64_IPLTLSB: + /* Shared objects will always need at least a REL relocation. */ + if (info->shared || maybe_dynamic) + need_entry = NEED_DYNREL; + dynrel_type = R_IA64_IPLTLSB; + break; + + case R_IA64_PCREL22: + case R_IA64_PCREL64I: + case R_IA64_PCREL32MSB: + case R_IA64_PCREL32LSB: + case R_IA64_PCREL64MSB: + case R_IA64_PCREL64LSB: + if (maybe_dynamic) + need_entry = NEED_DYNREL; + dynrel_type = R_IA64_PCRELNNLSB; + break; + } + + if (!need_entry) + continue; + + dyn_i = get_dyn_sym_info (ia64_info, h, abfd, rel, FALSE); + + /* Record whether or not this is a local symbol. */ + dyn_i->h = h; + + /* Create what's needed. */ + if (need_entry & (NEED_GOT | NEED_GOTX | NEED_TPREL + | NEED_DTPMOD | NEED_DTPREL)) + { + if (!got) + { + got = get_got (abfd, info, ia64_info); + if (!got) + return FALSE; + } + if (need_entry & NEED_GOT) + dyn_i->want_got = 1; + if (need_entry & NEED_GOTX) + dyn_i->want_gotx = 1; + if (need_entry & NEED_TPREL) + dyn_i->want_tprel = 1; + if (need_entry & NEED_DTPMOD) + dyn_i->want_dtpmod = 1; + if (need_entry & NEED_DTPREL) + dyn_i->want_dtprel = 1; + } + if (need_entry & NEED_FPTR) + { + if (!fptr) + { + fptr = get_fptr (abfd, info, ia64_info); + if (!fptr) + return FALSE; + } + + /* FPTRs for shared libraries are allocated by the dynamic + linker. Make sure this local symbol will appear in the + dynamic symbol table. */ + if (!h && info->shared) + { + if (! (bfd_elf_link_record_local_dynamic_symbol + (info, abfd, (long) r_symndx))) + return FALSE; + } + + dyn_i->want_fptr = 1; + } + if (need_entry & NEED_LTOFF_FPTR) + dyn_i->want_ltoff_fptr = 1; + if (need_entry & (NEED_MIN_PLT | NEED_FULL_PLT)) + { + if (!ia64_info->root.dynobj) + ia64_info->root.dynobj = abfd; + h->needs_plt = 1; + dyn_i->want_plt = 1; + } + if (need_entry & NEED_FULL_PLT) + dyn_i->want_plt2 = 1; + if (need_entry & NEED_PLTOFF) + { + /* This is needed here, in case @pltoff is used in a non-shared + link. */ + if (!pltoff) + { + pltoff = get_pltoff (abfd, info, ia64_info); + if (!pltoff) + return FALSE; + } + + dyn_i->want_pltoff = 1; + } + if ((need_entry & NEED_DYNREL) && (sec->flags & SEC_ALLOC)) + { + if (!srel) + { + srel = get_reloc_section (abfd, ia64_info, sec, TRUE); + if (!srel) + return FALSE; + } + if (!count_dyn_reloc (abfd, dyn_i, srel, dynrel_type, + (sec->flags & SEC_READONLY) != 0)) + return FALSE; + } + } + + return TRUE; +} + +/* For cleanliness, and potentially faster dynamic loading, allocate + external GOT entries first. */ + +static bfd_boolean +allocate_global_data_got (struct elfNN_ia64_dyn_sym_info *dyn_i, + void * data) +{ + struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; + + if ((dyn_i->want_got || dyn_i->want_gotx) + && ! dyn_i->want_fptr + && elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info, 0)) + { + dyn_i->got_offset = x->ofs; + x->ofs += 8; + } + if (dyn_i->want_tprel) + { + dyn_i->tprel_offset = x->ofs; + x->ofs += 8; + } + if (dyn_i->want_dtpmod) + { + if (elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info, 0)) + { + dyn_i->dtpmod_offset = x->ofs; + x->ofs += 8; + } + else + { + struct elfNN_ia64_link_hash_table *ia64_info; + + ia64_info = elfNN_ia64_hash_table (x->info); + if (ia64_info == NULL) + return FALSE; + + if (ia64_info->self_dtpmod_offset == (bfd_vma) -1) + { + ia64_info->self_dtpmod_offset = x->ofs; + x->ofs += 8; + } + dyn_i->dtpmod_offset = ia64_info->self_dtpmod_offset; + } + } + if (dyn_i->want_dtprel) + { + dyn_i->dtprel_offset = x->ofs; + x->ofs += 8; + } + return TRUE; +} + +/* Next, allocate all the GOT entries used by LTOFF_FPTR relocs. */ + +static bfd_boolean +allocate_global_fptr_got (struct elfNN_ia64_dyn_sym_info *dyn_i, + void * data) +{ + struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; + + if (dyn_i->want_got + && dyn_i->want_fptr + && elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info, R_IA64_FPTRNNLSB)) + { + dyn_i->got_offset = x->ofs; + x->ofs += 8; + } + return TRUE; +} + +/* Lastly, allocate all the GOT entries for local data. */ + +static bfd_boolean +allocate_local_got (struct elfNN_ia64_dyn_sym_info *dyn_i, + PTR data) +{ + struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; + + if ((dyn_i->want_got || dyn_i->want_gotx) + && !elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info, 0)) + { + dyn_i->got_offset = x->ofs; + x->ofs += 8; + } + return TRUE; +} + +/* Search for the index of a global symbol in it's defining object file. */ + +static long +global_sym_index (struct elf_link_hash_entry *h) +{ + struct elf_link_hash_entry **p; + bfd *obj; + + BFD_ASSERT (h->root.type == bfd_link_hash_defined + || h->root.type == bfd_link_hash_defweak); + + obj = h->root.u.def.section->owner; + for (p = elf_sym_hashes (obj); *p != h; ++p) + continue; + + return p - elf_sym_hashes (obj) + elf_tdata (obj)->symtab_hdr.sh_info; +} + +/* Allocate function descriptors. We can do these for every function + in a main executable that is not exported. */ + +static bfd_boolean +allocate_fptr (struct elfNN_ia64_dyn_sym_info *dyn_i, PTR data) +{ + struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; + + if (dyn_i->want_fptr) + { + struct elf_link_hash_entry *h = dyn_i->h; + + if (h) + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + + if (!x->info->executable + && (!h + || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT + || (h->root.type != bfd_link_hash_undefweak + && h->root.type != bfd_link_hash_undefined))) + { + if (h && h->dynindx == -1) + { + BFD_ASSERT ((h->root.type == bfd_link_hash_defined) + || (h->root.type == bfd_link_hash_defweak)); + + if (!bfd_elf_link_record_local_dynamic_symbol + (x->info, h->root.u.def.section->owner, + global_sym_index (h))) + return FALSE; + } + + dyn_i->want_fptr = 0; + } + else if (h == NULL || h->dynindx == -1) + { + dyn_i->fptr_offset = x->ofs; + x->ofs += 16; + } + else + dyn_i->want_fptr = 0; + } + return TRUE; +} + +/* Allocate all the minimal PLT entries. */ + +static bfd_boolean +allocate_plt_entries (struct elfNN_ia64_dyn_sym_info *dyn_i, + PTR data) +{ + struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; + + if (dyn_i->want_plt) + { + struct elf_link_hash_entry *h = dyn_i->h; + + if (h) + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + + /* ??? Versioned symbols seem to lose NEEDS_PLT. */ + if (elfNN_ia64_dynamic_symbol_p (h, x->info, 0)) + { + bfd_size_type offset = x->ofs; + if (offset == 0) + offset = PLT_HEADER_SIZE; + dyn_i->plt_offset = offset; + x->ofs = offset + PLT_MIN_ENTRY_SIZE; + + dyn_i->want_pltoff = 1; + } + else + { + dyn_i->want_plt = 0; + dyn_i->want_plt2 = 0; + } + } + return TRUE; +} + +/* Allocate all the full PLT entries. */ + +static bfd_boolean +allocate_plt2_entries (struct elfNN_ia64_dyn_sym_info *dyn_i, + PTR data) +{ + struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; + + if (dyn_i->want_plt2) + { + struct elf_link_hash_entry *h = dyn_i->h; + bfd_size_type ofs = x->ofs; + + dyn_i->plt2_offset = ofs; + x->ofs = ofs + PLT_FULL_ENTRY_SIZE; + + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + dyn_i->h->plt.offset = ofs; + } + return TRUE; +} + +/* Allocate all the PLTOFF entries requested by relocations and + plt entries. We can't share space with allocated FPTR entries, + because the latter are not necessarily addressable by the GP. + ??? Relaxation might be able to determine that they are. */ + +static bfd_boolean +allocate_pltoff_entries (struct elfNN_ia64_dyn_sym_info *dyn_i, + PTR data) +{ + struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; + + if (dyn_i->want_pltoff) + { + dyn_i->pltoff_offset = x->ofs; + x->ofs += 16; + } + return TRUE; +} + +/* Allocate dynamic relocations for those symbols that turned out + to be dynamic. */ + +static bfd_boolean +allocate_dynrel_entries (struct elfNN_ia64_dyn_sym_info *dyn_i, + PTR data) +{ + struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; + struct elfNN_ia64_link_hash_table *ia64_info; + struct elfNN_ia64_dyn_reloc_entry *rent; + bfd_boolean dynamic_symbol, shared, resolved_zero; + + ia64_info = elfNN_ia64_hash_table (x->info); + if (ia64_info == NULL) + return FALSE; + + /* Note that this can't be used in relation to FPTR relocs below. */ + dynamic_symbol = elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info, 0); + + shared = x->info->shared; + resolved_zero = (dyn_i->h + && ELF_ST_VISIBILITY (dyn_i->h->other) + && dyn_i->h->root.type == bfd_link_hash_undefweak); + + /* Take care of the GOT and PLT relocations. */ + + if ((!resolved_zero + && (dynamic_symbol || shared) + && (dyn_i->want_got || dyn_i->want_gotx)) + || (dyn_i->want_ltoff_fptr + && dyn_i->h + && dyn_i->h->dynindx != -1)) + { + if (!dyn_i->want_ltoff_fptr + || !x->info->pie + || dyn_i->h == NULL + || dyn_i->h->root.type != bfd_link_hash_undefweak) + ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); + } + if ((dynamic_symbol || shared) && dyn_i->want_tprel) + ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); + if (dynamic_symbol && dyn_i->want_dtpmod) + ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); + if (dynamic_symbol && dyn_i->want_dtprel) + ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); + + if (x->only_got) + return TRUE; + + if (ia64_info->rel_fptr_sec && dyn_i->want_fptr) + { + if (dyn_i->h == NULL || dyn_i->h->root.type != bfd_link_hash_undefweak) + ia64_info->rel_fptr_sec->size += sizeof (ElfNN_External_Rela); + } + + if (!resolved_zero && dyn_i->want_pltoff) + { + bfd_size_type t = 0; + + /* Dynamic symbols get one IPLT relocation. Local symbols in + shared libraries get two REL relocations. Local symbols in + main applications get nothing. */ + if (dynamic_symbol) + t = sizeof (ElfNN_External_Rela); + else if (shared) + t = 2 * sizeof (ElfNN_External_Rela); + + ia64_info->rel_pltoff_sec->size += t; + } + + /* Take care of the normal data relocations. */ + + for (rent = dyn_i->reloc_entries; rent; rent = rent->next) + { + int count = rent->count; + + switch (rent->type) + { + case R_IA64_FPTR32LSB: + case R_IA64_FPTR64LSB: + /* Allocate one iff !want_fptr and not PIE, which by this point + will be true only if we're actually allocating one statically + in the main executable. Position independent executables + need a relative reloc. */ + if (dyn_i->want_fptr && !x->info->pie) + continue; + break; + case R_IA64_PCREL32LSB: + case R_IA64_PCREL64LSB: + if (!dynamic_symbol) + continue; + break; + case R_IA64_DIR32LSB: + case R_IA64_DIR64LSB: + if (!dynamic_symbol && !shared) + continue; + break; + case R_IA64_IPLTLSB: + if (!dynamic_symbol && !shared) + continue; + /* Use two REL relocations for IPLT relocations + against local symbols. */ + if (!dynamic_symbol) + count *= 2; + break; + case R_IA64_DTPREL32LSB: + case R_IA64_TPREL64LSB: + case R_IA64_DTPREL64LSB: + case R_IA64_DTPMOD64LSB: + break; + default: + abort (); + } + if (rent->reltext) + ia64_info->reltext = 1; + rent->srel->size += sizeof (ElfNN_External_Rela) * count; + } + + return TRUE; +} + +static bfd_boolean +elfNN_ia64_adjust_dynamic_symbol (struct bfd_link_info *info ATTRIBUTE_UNUSED, + struct elf_link_hash_entry *h) +{ + /* ??? Undefined symbols with PLT entries should be re-defined + to be the PLT entry. */ + + /* If this is a weak symbol, and there is a real definition, the + processor independent code will have arranged for us to see the + real definition first, and we can just use the same value. */ + if (h->u.weakdef != NULL) + { + BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined + || h->u.weakdef->root.type == bfd_link_hash_defweak); + h->root.u.def.section = h->u.weakdef->root.u.def.section; + h->root.u.def.value = h->u.weakdef->root.u.def.value; + return TRUE; + } + + /* If this is a reference to a symbol defined by a dynamic object which + is not a function, we might allocate the symbol in our .dynbss section + and allocate a COPY dynamic relocation. + + But IA-64 code is canonically PIC, so as a rule we can avoid this sort + of hackery. */ + + return TRUE; +} + +static bfd_boolean +elfNN_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, + struct bfd_link_info *info) +{ + struct elfNN_ia64_allocate_data data; + struct elfNN_ia64_link_hash_table *ia64_info; + asection *sec; + bfd *dynobj; + bfd_boolean relplt = FALSE; + + dynobj = elf_hash_table(info)->dynobj; + ia64_info = elfNN_ia64_hash_table (info); + if (ia64_info == NULL) + return FALSE; + ia64_info->self_dtpmod_offset = (bfd_vma) -1; + BFD_ASSERT(dynobj != NULL); + data.info = info; + + /* Set the contents of the .interp section to the interpreter. */ + if (ia64_info->root.dynamic_sections_created + && info->executable) + { + sec = bfd_get_section_by_name (dynobj, ".interp"); + BFD_ASSERT (sec != NULL); + sec->contents = (bfd_byte *) ELF_DYNAMIC_INTERPRETER; + sec->size = strlen (ELF_DYNAMIC_INTERPRETER) + 1; + } + + /* Allocate the GOT entries. */ + + if (ia64_info->root.sgot) + { + data.ofs = 0; + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_global_data_got, &data); + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_global_fptr_got, &data); + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_local_got, &data); + ia64_info->root.sgot->size = data.ofs; + } + + /* Allocate the FPTR entries. */ + + if (ia64_info->fptr_sec) + { + data.ofs = 0; + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_fptr, &data); + ia64_info->fptr_sec->size = data.ofs; + } + + /* Now that we've seen all of the input files, we can decide which + symbols need plt entries. Allocate the minimal PLT entries first. + We do this even though dynamic_sections_created may be FALSE, because + this has the side-effect of clearing want_plt and want_plt2. */ + + data.ofs = 0; + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_plt_entries, &data); + + ia64_info->minplt_entries = 0; + if (data.ofs) + { + ia64_info->minplt_entries + = (data.ofs - PLT_HEADER_SIZE) / PLT_MIN_ENTRY_SIZE; + } + + /* Align the pointer for the plt2 entries. */ + data.ofs = (data.ofs + 31) & (bfd_vma) -32; + + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_plt2_entries, &data); + if (data.ofs != 0 || ia64_info->root.dynamic_sections_created) + { + /* FIXME: we always reserve the memory for dynamic linker even if + there are no PLT entries since dynamic linker may assume the + reserved memory always exists. */ + + BFD_ASSERT (ia64_info->root.dynamic_sections_created); + + ia64_info->root.splt->size = data.ofs; + + /* If we've got a .plt, we need some extra memory for the dynamic + linker. We stuff these in .got.plt. */ + sec = bfd_get_section_by_name (dynobj, ".got.plt"); + sec->size = 8 * PLT_RESERVED_WORDS; + } + + /* Allocate the PLTOFF entries. */ + + if (ia64_info->pltoff_sec) + { + data.ofs = 0; + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_pltoff_entries, &data); + ia64_info->pltoff_sec->size = data.ofs; + } + + if (ia64_info->root.dynamic_sections_created) + { + /* Allocate space for the dynamic relocations that turned out to be + required. */ + + if (info->shared && ia64_info->self_dtpmod_offset != (bfd_vma) -1) + ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); + data.only_got = FALSE; + elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_dynrel_entries, &data); + } + + /* We have now determined the sizes of the various dynamic sections. + Allocate memory for them. */ + for (sec = dynobj->sections; sec != NULL; sec = sec->next) + { + bfd_boolean strip; + + if (!(sec->flags & SEC_LINKER_CREATED)) + continue; + + /* If we don't need this section, strip it from the output file. + There were several sections primarily related to dynamic + linking that must be create before the linker maps input + sections to output sections. The linker does that before + bfd_elf_size_dynamic_sections is called, and it is that + function which decides whether anything needs to go into + these sections. */ + + strip = (sec->size == 0); + + if (sec == ia64_info->root.sgot) + strip = FALSE; + else if (sec == ia64_info->root.srelgot) + { + if (strip) + ia64_info->root.srelgot = NULL; + else + /* We use the reloc_count field as a counter if we need to + copy relocs into the output file. */ + sec->reloc_count = 0; + } + else if (sec == ia64_info->fptr_sec) + { + if (strip) + ia64_info->fptr_sec = NULL; + } + else if (sec == ia64_info->rel_fptr_sec) + { + if (strip) + ia64_info->rel_fptr_sec = NULL; + else + /* We use the reloc_count field as a counter if we need to + copy relocs into the output file. */ + sec->reloc_count = 0; + } + else if (sec == ia64_info->root.splt) + { + if (strip) + ia64_info->root.splt = NULL; + } + else if (sec == ia64_info->pltoff_sec) + { + if (strip) + ia64_info->pltoff_sec = NULL; + } + else if (sec == ia64_info->rel_pltoff_sec) + { + if (strip) + ia64_info->rel_pltoff_sec = NULL; + else + { + relplt = TRUE; + /* We use the reloc_count field as a counter if we need to + copy relocs into the output file. */ + sec->reloc_count = 0; + } + } + else + { + const char *name; + + /* It's OK to base decisions on the section name, because none + of the dynobj section names depend upon the input files. */ + name = bfd_get_section_name (dynobj, sec); + + if (strcmp (name, ".got.plt") == 0) + strip = FALSE; + else if (CONST_STRNEQ (name, ".rel")) + { + if (!strip) + { + /* We use the reloc_count field as a counter if we need to + copy relocs into the output file. */ + sec->reloc_count = 0; + } + } + else + continue; + } + + if (strip) + sec->flags |= SEC_EXCLUDE; + else + { + /* Allocate memory for the section contents. */ + sec->contents = (bfd_byte *) bfd_zalloc (dynobj, sec->size); + if (sec->contents == NULL && sec->size != 0) + return FALSE; + } + } + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* Add some entries to the .dynamic section. We fill in the values + later (in finish_dynamic_sections) but we must add the entries now + so that we get the correct size for the .dynamic section. */ + + if (info->executable) + { + /* The DT_DEBUG entry is filled in by the dynamic linker and used + by the debugger. */ +#define add_dynamic_entry(TAG, VAL) \ + _bfd_elf_add_dynamic_entry (info, TAG, VAL) + + if (!add_dynamic_entry (DT_DEBUG, 0)) + return FALSE; + } + + if (!add_dynamic_entry (DT_IA_64_PLT_RESERVE, 0)) + return FALSE; + if (!add_dynamic_entry (DT_PLTGOT, 0)) + return FALSE; + + if (relplt) + { + if (!add_dynamic_entry (DT_PLTRELSZ, 0) + || !add_dynamic_entry (DT_PLTREL, DT_RELA) + || !add_dynamic_entry (DT_JMPREL, 0)) + return FALSE; + } + + if (!add_dynamic_entry (DT_RELA, 0) + || !add_dynamic_entry (DT_RELASZ, 0) + || !add_dynamic_entry (DT_RELAENT, sizeof (ElfNN_External_Rela))) + return FALSE; + + if (ia64_info->reltext) + { + if (!add_dynamic_entry (DT_TEXTREL, 0)) + return FALSE; + info->flags |= DF_TEXTREL; + } + } + + /* ??? Perhaps force __gp local. */ + + return TRUE; +} + +static void +elfNN_ia64_install_dyn_reloc (bfd *abfd, struct bfd_link_info *info, + asection *sec, asection *srel, + bfd_vma offset, unsigned int type, + long dynindx, bfd_vma addend) +{ + Elf_Internal_Rela outrel; + bfd_byte *loc; + + BFD_ASSERT (dynindx != -1); + outrel.r_info = ELFNN_R_INFO (dynindx, type); + outrel.r_addend = addend; + outrel.r_offset = _bfd_elf_section_offset (abfd, info, sec, offset); + if (outrel.r_offset >= (bfd_vma) -2) + { + /* Run for the hills. We shouldn't be outputting a relocation + for this. So do what everyone else does and output a no-op. */ + outrel.r_info = ELFNN_R_INFO (0, R_IA64_NONE); + outrel.r_addend = 0; + outrel.r_offset = 0; + } + else + outrel.r_offset += sec->output_section->vma + sec->output_offset; + + loc = srel->contents; + loc += srel->reloc_count++ * sizeof (ElfNN_External_Rela); + bfd_elfNN_swap_reloca_out (abfd, &outrel, loc); + BFD_ASSERT (sizeof (ElfNN_External_Rela) * srel->reloc_count <= srel->size); +} + +/* Store an entry for target address TARGET_ADDR in the linkage table + and return the gp-relative address of the linkage table entry. */ + +static bfd_vma +set_got_entry (bfd *abfd, struct bfd_link_info *info, + struct elfNN_ia64_dyn_sym_info *dyn_i, + long dynindx, bfd_vma addend, bfd_vma value, + unsigned int dyn_r_type) +{ + struct elfNN_ia64_link_hash_table *ia64_info; + asection *got_sec; + bfd_boolean done; + bfd_vma got_offset; + + ia64_info = elfNN_ia64_hash_table (info); + if (ia64_info == NULL) + return 0; + + got_sec = ia64_info->root.sgot; + + switch (dyn_r_type) + { + case R_IA64_TPREL64LSB: + done = dyn_i->tprel_done; + dyn_i->tprel_done = TRUE; + got_offset = dyn_i->tprel_offset; + break; + case R_IA64_DTPMOD64LSB: + if (dyn_i->dtpmod_offset != ia64_info->self_dtpmod_offset) + { + done = dyn_i->dtpmod_done; + dyn_i->dtpmod_done = TRUE; + } + else + { + done = ia64_info->self_dtpmod_done; + ia64_info->self_dtpmod_done = TRUE; + dynindx = 0; + } + got_offset = dyn_i->dtpmod_offset; + break; + case R_IA64_DTPREL32LSB: + case R_IA64_DTPREL64LSB: + done = dyn_i->dtprel_done; + dyn_i->dtprel_done = TRUE; + got_offset = dyn_i->dtprel_offset; + break; + default: + done = dyn_i->got_done; + dyn_i->got_done = TRUE; + got_offset = dyn_i->got_offset; + break; + } + + BFD_ASSERT ((got_offset & 7) == 0); + + if (! done) + { + /* Store the target address in the linkage table entry. */ + bfd_put_64 (abfd, value, got_sec->contents + got_offset); + + /* Install a dynamic relocation if needed. */ + if (((info->shared + && (!dyn_i->h + || ELF_ST_VISIBILITY (dyn_i->h->other) == STV_DEFAULT + || dyn_i->h->root.type != bfd_link_hash_undefweak) + && dyn_r_type != R_IA64_DTPREL32LSB + && dyn_r_type != R_IA64_DTPREL64LSB) + || elfNN_ia64_dynamic_symbol_p (dyn_i->h, info, dyn_r_type) + || (dynindx != -1 + && (dyn_r_type == R_IA64_FPTR32LSB + || dyn_r_type == R_IA64_FPTR64LSB))) + && (!dyn_i->want_ltoff_fptr + || !info->pie + || !dyn_i->h + || dyn_i->h->root.type != bfd_link_hash_undefweak)) + { + if (dynindx == -1 + && dyn_r_type != R_IA64_TPREL64LSB + && dyn_r_type != R_IA64_DTPMOD64LSB + && dyn_r_type != R_IA64_DTPREL32LSB + && dyn_r_type != R_IA64_DTPREL64LSB) + { + dyn_r_type = R_IA64_RELNNLSB; + dynindx = 0; + addend = value; + } + + if (bfd_big_endian (abfd)) + { + switch (dyn_r_type) + { + case R_IA64_REL32LSB: + dyn_r_type = R_IA64_REL32MSB; + break; + case R_IA64_DIR32LSB: + dyn_r_type = R_IA64_DIR32MSB; + break; + case R_IA64_FPTR32LSB: + dyn_r_type = R_IA64_FPTR32MSB; + break; + case R_IA64_DTPREL32LSB: + dyn_r_type = R_IA64_DTPREL32MSB; + break; + case R_IA64_REL64LSB: + dyn_r_type = R_IA64_REL64MSB; + break; + case R_IA64_DIR64LSB: + dyn_r_type = R_IA64_DIR64MSB; + break; + case R_IA64_FPTR64LSB: + dyn_r_type = R_IA64_FPTR64MSB; + break; + case R_IA64_TPREL64LSB: + dyn_r_type = R_IA64_TPREL64MSB; + break; + case R_IA64_DTPMOD64LSB: + dyn_r_type = R_IA64_DTPMOD64MSB; + break; + case R_IA64_DTPREL64LSB: + dyn_r_type = R_IA64_DTPREL64MSB; + break; + default: + BFD_ASSERT (FALSE); + break; + } + } + + elfNN_ia64_install_dyn_reloc (abfd, NULL, got_sec, + ia64_info->root.srelgot, + got_offset, dyn_r_type, + dynindx, addend); + } + } + + /* Return the address of the linkage table entry. */ + value = (got_sec->output_section->vma + + got_sec->output_offset + + got_offset); + + return value; +} + +/* Fill in a function descriptor consisting of the function's code + address and its global pointer. Return the descriptor's address. */ + +static bfd_vma +set_fptr_entry (bfd *abfd, struct bfd_link_info *info, + struct elfNN_ia64_dyn_sym_info *dyn_i, + bfd_vma value) +{ + struct elfNN_ia64_link_hash_table *ia64_info; + asection *fptr_sec; + + ia64_info = elfNN_ia64_hash_table (info); + if (ia64_info == NULL) + return 0; + + fptr_sec = ia64_info->fptr_sec; + + if (!dyn_i->fptr_done) + { + dyn_i->fptr_done = 1; + + /* Fill in the function descriptor. */ + bfd_put_64 (abfd, value, fptr_sec->contents + dyn_i->fptr_offset); + bfd_put_64 (abfd, _bfd_get_gp_value (abfd), + fptr_sec->contents + dyn_i->fptr_offset + 8); + if (ia64_info->rel_fptr_sec) + { + Elf_Internal_Rela outrel; + bfd_byte *loc; + + if (bfd_little_endian (abfd)) + outrel.r_info = ELFNN_R_INFO (0, R_IA64_IPLTLSB); + else + outrel.r_info = ELFNN_R_INFO (0, R_IA64_IPLTMSB); + outrel.r_addend = value; + outrel.r_offset = (fptr_sec->output_section->vma + + fptr_sec->output_offset + + dyn_i->fptr_offset); + loc = ia64_info->rel_fptr_sec->contents; + loc += ia64_info->rel_fptr_sec->reloc_count++ + * sizeof (ElfNN_External_Rela); + bfd_elfNN_swap_reloca_out (abfd, &outrel, loc); + } + } + + /* Return the descriptor's address. */ + value = (fptr_sec->output_section->vma + + fptr_sec->output_offset + + dyn_i->fptr_offset); + + return value; +} + +/* Fill in a PLTOFF entry consisting of the function's code address + and its global pointer. Return the descriptor's address. */ + +static bfd_vma +set_pltoff_entry (bfd *abfd, struct bfd_link_info *info, + struct elfNN_ia64_dyn_sym_info *dyn_i, + bfd_vma value, bfd_boolean is_plt) +{ + struct elfNN_ia64_link_hash_table *ia64_info; + asection *pltoff_sec; + + ia64_info = elfNN_ia64_hash_table (info); + if (ia64_info == NULL) + return 0; + + pltoff_sec = ia64_info->pltoff_sec; + + /* Don't do anything if this symbol uses a real PLT entry. In + that case, we'll fill this in during finish_dynamic_symbol. */ + if ((! dyn_i->want_plt || is_plt) + && !dyn_i->pltoff_done) + { + bfd_vma gp = _bfd_get_gp_value (abfd); + + /* Fill in the function descriptor. */ + bfd_put_64 (abfd, value, pltoff_sec->contents + dyn_i->pltoff_offset); + bfd_put_64 (abfd, gp, pltoff_sec->contents + dyn_i->pltoff_offset + 8); + + /* Install dynamic relocations if needed. */ + if (!is_plt + && info->shared + && (!dyn_i->h + || ELF_ST_VISIBILITY (dyn_i->h->other) == STV_DEFAULT + || dyn_i->h->root.type != bfd_link_hash_undefweak)) + { + unsigned int dyn_r_type; + + if (bfd_big_endian (abfd)) + dyn_r_type = R_IA64_RELNNMSB; + else + dyn_r_type = R_IA64_RELNNLSB; + + elfNN_ia64_install_dyn_reloc (abfd, NULL, pltoff_sec, + ia64_info->rel_pltoff_sec, + dyn_i->pltoff_offset, + dyn_r_type, 0, value); + elfNN_ia64_install_dyn_reloc (abfd, NULL, pltoff_sec, + ia64_info->rel_pltoff_sec, + dyn_i->pltoff_offset + ARCH_SIZE / 8, + dyn_r_type, 0, gp); + } + + dyn_i->pltoff_done = 1; + } + + /* Return the descriptor's address. */ + value = (pltoff_sec->output_section->vma + + pltoff_sec->output_offset + + dyn_i->pltoff_offset); + + return value; +} + +/* Return the base VMA address which should be subtracted from real addresses + when resolving @tprel() relocation. + Main program TLS (whose template starts at PT_TLS p_vaddr) + is assigned offset round(2 * size of pointer, PT_TLS p_align). */ + +static bfd_vma +elfNN_ia64_tprel_base (struct bfd_link_info *info) +{ + asection *tls_sec = elf_hash_table (info)->tls_sec; + return tls_sec->vma - align_power ((bfd_vma) ARCH_SIZE / 4, + tls_sec->alignment_power); +} + +/* Return the base VMA address which should be subtracted from real addresses + when resolving @dtprel() relocation. + This is PT_TLS segment p_vaddr. */ + +static bfd_vma +elfNN_ia64_dtprel_base (struct bfd_link_info *info) +{ + return elf_hash_table (info)->tls_sec->vma; +} + +/* Called through qsort to sort the .IA_64.unwind section during a + non-relocatable link. Set elfNN_ia64_unwind_entry_compare_bfd + to the output bfd so we can do proper endianness frobbing. */ + +static bfd *elfNN_ia64_unwind_entry_compare_bfd; + +static int +elfNN_ia64_unwind_entry_compare (const PTR a, const PTR b) +{ + bfd_vma av, bv; + + av = bfd_get_64 (elfNN_ia64_unwind_entry_compare_bfd, a); + bv = bfd_get_64 (elfNN_ia64_unwind_entry_compare_bfd, b); + + return (av < bv ? -1 : av > bv ? 1 : 0); +} + +/* Make sure we've got ourselves a nice fat __gp value. */ +static bfd_boolean +elfNN_ia64_choose_gp (bfd *abfd, struct bfd_link_info *info, bfd_boolean final) +{ + bfd_vma min_vma = (bfd_vma) -1, max_vma = 0; + bfd_vma min_short_vma = min_vma, max_short_vma = 0; + struct elf_link_hash_entry *gp; + bfd_vma gp_val; + asection *os; + struct elfNN_ia64_link_hash_table *ia64_info; + + ia64_info = elfNN_ia64_hash_table (info); + if (ia64_info == NULL) + return FALSE; + + /* Find the min and max vma of all sections marked short. Also collect + min and max vma of any type, for use in selecting a nice gp. */ + for (os = abfd->sections; os ; os = os->next) + { + bfd_vma lo, hi; + + if ((os->flags & SEC_ALLOC) == 0) + continue; + + lo = os->vma; + /* When this function is called from elfNN_ia64_final_link + the correct value to use is os->size. When called from + elfNN_ia64_relax_section we are in the middle of section + sizing; some sections will already have os->size set, others + will have os->size zero and os->rawsize the previous size. */ + hi = os->vma + (!final && os->rawsize ? os->rawsize : os->size); + if (hi < lo) + hi = (bfd_vma) -1; + + if (min_vma > lo) + min_vma = lo; + if (max_vma < hi) + max_vma = hi; + if (os->flags & SEC_SMALL_DATA) + { + if (min_short_vma > lo) + min_short_vma = lo; + if (max_short_vma < hi) + max_short_vma = hi; + } + } + + if (ia64_info->min_short_sec) + { + if (min_short_vma + > (ia64_info->min_short_sec->vma + + ia64_info->min_short_offset)) + min_short_vma = (ia64_info->min_short_sec->vma + + ia64_info->min_short_offset); + if (max_short_vma + < (ia64_info->max_short_sec->vma + + ia64_info->max_short_offset)) + max_short_vma = (ia64_info->max_short_sec->vma + + ia64_info->max_short_offset); + } + + /* See if the user wants to force a value. */ + gp = elf_link_hash_lookup (elf_hash_table (info), "__gp", FALSE, + FALSE, FALSE); + + if (gp + && (gp->root.type == bfd_link_hash_defined + || gp->root.type == bfd_link_hash_defweak)) + { + asection *gp_sec = gp->root.u.def.section; + gp_val = (gp->root.u.def.value + + gp_sec->output_section->vma + + gp_sec->output_offset); + } + else + { + /* Pick a sensible value. */ + + if (ia64_info->min_short_sec) + { + bfd_vma short_range = max_short_vma - min_short_vma; + + /* If min_short_sec is set, pick one in the middle bewteen + min_short_vma and max_short_vma. */ + if (short_range >= 0x400000) + goto overflow; + gp_val = min_short_vma + short_range / 2; + } + else + { + asection *got_sec = ia64_info->root.sgot; + + /* Start with just the address of the .got. */ + if (got_sec) + gp_val = got_sec->output_section->vma; + else if (max_short_vma != 0) + gp_val = min_short_vma; + else if (max_vma - min_vma < 0x200000) + gp_val = min_vma; + else + gp_val = max_vma - 0x200000 + 8; + } + + /* If it is possible to address the entire image, but we + don't with the choice above, adjust. */ + if (max_vma - min_vma < 0x400000 + && (max_vma - gp_val >= 0x200000 + || gp_val - min_vma > 0x200000)) + gp_val = min_vma + 0x200000; + else if (max_short_vma != 0) + { + /* If we don't cover all the short data, adjust. */ + if (max_short_vma - gp_val >= 0x200000) + gp_val = min_short_vma + 0x200000; + + /* If we're addressing stuff past the end, adjust back. */ + if (gp_val > max_vma) + gp_val = max_vma - 0x200000 + 8; + } + } + + /* Validate whether all SHF_IA_64_SHORT sections are within + range of the chosen GP. */ + + if (max_short_vma != 0) + { + if (max_short_vma - min_short_vma >= 0x400000) + { +overflow: + (*_bfd_error_handler) + (_("%s: short data segment overflowed (0x%lx >= 0x400000)"), + bfd_get_filename (abfd), + (unsigned long) (max_short_vma - min_short_vma)); + return FALSE; + } + else if ((gp_val > min_short_vma + && gp_val - min_short_vma > 0x200000) + || (gp_val < max_short_vma + && max_short_vma - gp_val >= 0x200000)) + { + (*_bfd_error_handler) + (_("%s: __gp does not cover short data segment"), + bfd_get_filename (abfd)); + return FALSE; + } + } + + _bfd_set_gp_value (abfd, gp_val); + + return TRUE; +} + +static bfd_boolean +elfNN_ia64_final_link (bfd *abfd, struct bfd_link_info *info) +{ + struct elfNN_ia64_link_hash_table *ia64_info; + asection *unwind_output_sec; + + ia64_info = elfNN_ia64_hash_table (info); + if (ia64_info == NULL) + return FALSE; + + /* Make sure we've got ourselves a nice fat __gp value. */ + if (!info->relocatable) + { + bfd_vma gp_val; + struct elf_link_hash_entry *gp; + + /* We assume after gp is set, section size will only decrease. We + need to adjust gp for it. */ + _bfd_set_gp_value (abfd, 0); + if (! elfNN_ia64_choose_gp (abfd, info, TRUE)) + return FALSE; + gp_val = _bfd_get_gp_value (abfd); + + gp = elf_link_hash_lookup (elf_hash_table (info), "__gp", FALSE, + FALSE, FALSE); + if (gp) + { + gp->root.type = bfd_link_hash_defined; + gp->root.u.def.value = gp_val; + gp->root.u.def.section = bfd_abs_section_ptr; + } + } + + /* If we're producing a final executable, we need to sort the contents + of the .IA_64.unwind section. Force this section to be relocated + into memory rather than written immediately to the output file. */ + unwind_output_sec = NULL; + if (!info->relocatable) + { + asection *s = bfd_get_section_by_name (abfd, ELF_STRING_ia64_unwind); + if (s) + { + unwind_output_sec = s->output_section; + unwind_output_sec->contents + = bfd_malloc (unwind_output_sec->size); + if (unwind_output_sec->contents == NULL) + return FALSE; + } + } + + /* Invoke the regular ELF backend linker to do all the work. */ + if (!bfd_elf_final_link (abfd, info)) + return FALSE; + + if (unwind_output_sec) + { + elfNN_ia64_unwind_entry_compare_bfd = abfd; + qsort (unwind_output_sec->contents, + (size_t) (unwind_output_sec->size / 24), + 24, + elfNN_ia64_unwind_entry_compare); + + if (! bfd_set_section_contents (abfd, unwind_output_sec, + unwind_output_sec->contents, (bfd_vma) 0, + unwind_output_sec->size)) + return FALSE; + } + + return TRUE; +} + +static bfd_boolean +elfNN_ia64_relocate_section (bfd *output_bfd, + struct bfd_link_info *info, + bfd *input_bfd, + asection *input_section, + bfd_byte *contents, + Elf_Internal_Rela *relocs, + Elf_Internal_Sym *local_syms, + asection **local_sections) +{ + struct elfNN_ia64_link_hash_table *ia64_info; + Elf_Internal_Shdr *symtab_hdr; + Elf_Internal_Rela *rel; + Elf_Internal_Rela *relend; + asection *srel; + bfd_boolean ret_val = TRUE; /* for non-fatal errors */ + bfd_vma gp_val; + + symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; + ia64_info = elfNN_ia64_hash_table (info); + if (ia64_info == NULL) + return FALSE; + + /* Infect various flags from the input section to the output section. */ + if (info->relocatable) + { + bfd_vma flags; + + flags = elf_section_data(input_section)->this_hdr.sh_flags; + flags &= SHF_IA_64_NORECOV; + + elf_section_data(input_section->output_section) + ->this_hdr.sh_flags |= flags; + } + + gp_val = _bfd_get_gp_value (output_bfd); + srel = get_reloc_section (input_bfd, ia64_info, input_section, FALSE); + + rel = relocs; + relend = relocs + input_section->reloc_count; + for (; rel < relend; ++rel) + { + struct elf_link_hash_entry *h; + struct elfNN_ia64_dyn_sym_info *dyn_i; + bfd_reloc_status_type r; + reloc_howto_type *howto; + unsigned long r_symndx; + Elf_Internal_Sym *sym; + unsigned int r_type; + bfd_vma value; + asection *sym_sec; + bfd_byte *hit_addr; + bfd_boolean dynamic_symbol_p; + bfd_boolean undef_weak_ref; + + r_type = ELFNN_R_TYPE (rel->r_info); + if (r_type > R_IA64_MAX_RELOC_CODE) + { + (*_bfd_error_handler) + (_("%B: unknown relocation type %d"), + input_bfd, (int) r_type); + bfd_set_error (bfd_error_bad_value); + ret_val = FALSE; + continue; + } + + howto = ia64_elf_lookup_howto (r_type); + r_symndx = ELFNN_R_SYM (rel->r_info); + h = NULL; + sym = NULL; + sym_sec = NULL; + undef_weak_ref = FALSE; + + if (r_symndx < symtab_hdr->sh_info) + { + /* Reloc against local symbol. */ + asection *msec; + sym = local_syms + r_symndx; + sym_sec = local_sections[r_symndx]; + msec = sym_sec; + value = _bfd_elf_rela_local_sym (output_bfd, sym, &msec, rel); + if (!info->relocatable + && (sym_sec->flags & SEC_MERGE) != 0 + && ELF_ST_TYPE (sym->st_info) == STT_SECTION + && sym_sec->sec_info_type == ELF_INFO_TYPE_MERGE) + { + struct elfNN_ia64_local_hash_entry *loc_h; + + loc_h = get_local_sym_hash (ia64_info, input_bfd, rel, FALSE); + if (loc_h && ! loc_h->sec_merge_done) + { + struct elfNN_ia64_dyn_sym_info *dynent; + unsigned int count; + + for (count = loc_h->count, dynent = loc_h->info; + count != 0; + count--, dynent++) + { + msec = sym_sec; + dynent->addend = + _bfd_merged_section_offset (output_bfd, &msec, + elf_section_data (msec)-> + sec_info, + sym->st_value + + dynent->addend); + dynent->addend -= sym->st_value; + dynent->addend += msec->output_section->vma + + msec->output_offset + - sym_sec->output_section->vma + - sym_sec->output_offset; + } + + /* We may have introduced duplicated entries. We need + to remove them properly. */ + count = sort_dyn_sym_info (loc_h->info, loc_h->count); + if (count != loc_h->count) + { + loc_h->count = count; + loc_h->sorted_count = count; + } + + loc_h->sec_merge_done = 1; + } + } + } + else + { + bfd_boolean unresolved_reloc; + bfd_boolean warned; + struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd); + + RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, + r_symndx, symtab_hdr, sym_hashes, + h, sym_sec, value, + unresolved_reloc, warned); + + if (h->root.type == bfd_link_hash_undefweak) + undef_weak_ref = TRUE; + else if (warned) + continue; + } + + if (sym_sec != NULL && elf_discarded_section (sym_sec)) + RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, + rel, relend, howto, contents); + + if (info->relocatable) + continue; + + hit_addr = contents + rel->r_offset; + value += rel->r_addend; + dynamic_symbol_p = elfNN_ia64_dynamic_symbol_p (h, info, r_type); + + switch (r_type) + { + case R_IA64_NONE: + case R_IA64_LDXMOV: + continue; + + case R_IA64_IMM14: + case R_IA64_IMM22: + case R_IA64_IMM64: + case R_IA64_DIR32MSB: + case R_IA64_DIR32LSB: + case R_IA64_DIR64MSB: + case R_IA64_DIR64LSB: + /* Install a dynamic relocation for this reloc. */ + if ((dynamic_symbol_p || info->shared) + && r_symndx != STN_UNDEF + && (input_section->flags & SEC_ALLOC) != 0) + { + unsigned int dyn_r_type; + long dynindx; + bfd_vma addend; + + BFD_ASSERT (srel != NULL); + + switch (r_type) + { + case R_IA64_IMM14: + case R_IA64_IMM22: + case R_IA64_IMM64: + /* ??? People shouldn't be doing non-pic code in + shared libraries nor dynamic executables. */ + (*_bfd_error_handler) + (_("%B: non-pic code with imm relocation against dynamic symbol `%s'"), + input_bfd, + h ? h->root.root.string + : bfd_elf_sym_name (input_bfd, symtab_hdr, sym, + sym_sec)); + ret_val = FALSE; + continue; + + default: + break; + } + + /* If we don't need dynamic symbol lookup, find a + matching RELATIVE relocation. */ + dyn_r_type = r_type; + if (dynamic_symbol_p) + { + dynindx = h->dynindx; + addend = rel->r_addend; + value = 0; + } + else + { + switch (r_type) + { + case R_IA64_DIR32MSB: + dyn_r_type = R_IA64_REL32MSB; + break; + case R_IA64_DIR32LSB: + dyn_r_type = R_IA64_REL32LSB; + break; + case R_IA64_DIR64MSB: + dyn_r_type = R_IA64_REL64MSB; + break; + case R_IA64_DIR64LSB: + dyn_r_type = R_IA64_REL64LSB; + break; + + default: + break; + } + dynindx = 0; + addend = value; + } + + elfNN_ia64_install_dyn_reloc (output_bfd, info, input_section, + srel, rel->r_offset, dyn_r_type, + dynindx, addend); + } + /* Fall through. */ + + case R_IA64_LTV32MSB: + case R_IA64_LTV32LSB: + case R_IA64_LTV64MSB: + case R_IA64_LTV64LSB: + r = ia64_elf_install_value (hit_addr, value, r_type); + break; + + case R_IA64_GPREL22: + case R_IA64_GPREL64I: + case R_IA64_GPREL32MSB: + case R_IA64_GPREL32LSB: + case R_IA64_GPREL64MSB: + case R_IA64_GPREL64LSB: + if (dynamic_symbol_p) + { + (*_bfd_error_handler) + (_("%B: @gprel relocation against dynamic symbol %s"), + input_bfd, + h ? h->root.root.string + : bfd_elf_sym_name (input_bfd, symtab_hdr, sym, + sym_sec)); + ret_val = FALSE; + continue; + } + value -= gp_val; + r = ia64_elf_install_value (hit_addr, value, r_type); + break; + + case R_IA64_LTOFF22: + case R_IA64_LTOFF22X: + case R_IA64_LTOFF64I: + dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE); + value = set_got_entry (input_bfd, info, dyn_i, (h ? h->dynindx : -1), + rel->r_addend, value, R_IA64_DIRNNLSB); + value -= gp_val; + r = ia64_elf_install_value (hit_addr, value, r_type); + break; + + case R_IA64_PLTOFF22: + case R_IA64_PLTOFF64I: + case R_IA64_PLTOFF64MSB: + case R_IA64_PLTOFF64LSB: + dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE); + value = set_pltoff_entry (output_bfd, info, dyn_i, value, FALSE); + value -= gp_val; + r = ia64_elf_install_value (hit_addr, value, r_type); + break; + + case R_IA64_FPTR64I: + case R_IA64_FPTR32MSB: + case R_IA64_FPTR32LSB: + case R_IA64_FPTR64MSB: + case R_IA64_FPTR64LSB: + dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE); + if (dyn_i->want_fptr) + { + if (!undef_weak_ref) + value = set_fptr_entry (output_bfd, info, dyn_i, value); + } + if (!dyn_i->want_fptr || info->pie) + { + long dynindx; + unsigned int dyn_r_type = r_type; + bfd_vma addend = rel->r_addend; + + /* Otherwise, we expect the dynamic linker to create + the entry. */ + + if (dyn_i->want_fptr) + { + if (r_type == R_IA64_FPTR64I) + { + /* We can't represent this without a dynamic symbol. + Adjust the relocation to be against an output + section symbol, which are always present in the + dynamic symbol table. */ + /* ??? People shouldn't be doing non-pic code in + shared libraries. Hork. */ + (*_bfd_error_handler) + (_("%B: linking non-pic code in a position independent executable"), + input_bfd); + ret_val = FALSE; + continue; + } + dynindx = 0; + addend = value; + dyn_r_type = r_type + R_IA64_RELNNLSB - R_IA64_FPTRNNLSB; + } + else if (h) + { + if (h->dynindx != -1) + dynindx = h->dynindx; + else + dynindx = (_bfd_elf_link_lookup_local_dynindx + (info, h->root.u.def.section->owner, + global_sym_index (h))); + value = 0; + } + else + { + dynindx = (_bfd_elf_link_lookup_local_dynindx + (info, input_bfd, (long) r_symndx)); + value = 0; + } + + elfNN_ia64_install_dyn_reloc (output_bfd, info, input_section, + srel, rel->r_offset, dyn_r_type, + dynindx, addend); + } + + r = ia64_elf_install_value (hit_addr, value, r_type); + break; + + case R_IA64_LTOFF_FPTR22: + case R_IA64_LTOFF_FPTR64I: + case R_IA64_LTOFF_FPTR32MSB: + case R_IA64_LTOFF_FPTR32LSB: + case R_IA64_LTOFF_FPTR64MSB: + case R_IA64_LTOFF_FPTR64LSB: + { + long dynindx; + + dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE); + if (dyn_i->want_fptr) + { + BFD_ASSERT (h == NULL || h->dynindx == -1); + if (!undef_weak_ref) + value = set_fptr_entry (output_bfd, info, dyn_i, value); + dynindx = -1; + } + else + { + /* Otherwise, we expect the dynamic linker to create + the entry. */ + if (h) + { + if (h->dynindx != -1) + dynindx = h->dynindx; + else + dynindx = (_bfd_elf_link_lookup_local_dynindx + (info, h->root.u.def.section->owner, + global_sym_index (h))); + } + else + dynindx = (_bfd_elf_link_lookup_local_dynindx + (info, input_bfd, (long) r_symndx)); + value = 0; + } + + value = set_got_entry (output_bfd, info, dyn_i, dynindx, + rel->r_addend, value, R_IA64_FPTRNNLSB); + value -= gp_val; + r = ia64_elf_install_value (hit_addr, value, r_type); + } + break; + + case R_IA64_PCREL32MSB: + case R_IA64_PCREL32LSB: + case R_IA64_PCREL64MSB: + case R_IA64_PCREL64LSB: + /* Install a dynamic relocation for this reloc. */ + if (dynamic_symbol_p && r_symndx != STN_UNDEF) + { + BFD_ASSERT (srel != NULL); + + elfNN_ia64_install_dyn_reloc (output_bfd, info, input_section, + srel, rel->r_offset, r_type, + h->dynindx, rel->r_addend); + } + goto finish_pcrel; + + case R_IA64_PCREL21B: + case R_IA64_PCREL60B: + /* We should have created a PLT entry for any dynamic symbol. */ + dyn_i = NULL; + if (h) + dyn_i = get_dyn_sym_info (ia64_info, h, NULL, NULL, FALSE); + + if (dyn_i && dyn_i->want_plt2) + { + /* Should have caught this earlier. */ + BFD_ASSERT (rel->r_addend == 0); + + value = (ia64_info->root.splt->output_section->vma + + ia64_info->root.splt->output_offset + + dyn_i->plt2_offset); + } + else + { + /* Since there's no PLT entry, Validate that this is + locally defined. */ + BFD_ASSERT (undef_weak_ref || sym_sec->output_section != NULL); + + /* If the symbol is undef_weak, we shouldn't be trying + to call it. There's every chance that we'd wind up + with an out-of-range fixup here. Don't bother setting + any value at all. */ + if (undef_weak_ref) + continue; + } + goto finish_pcrel; + + case R_IA64_PCREL21BI: + case R_IA64_PCREL21F: + case R_IA64_PCREL21M: + case R_IA64_PCREL22: + case R_IA64_PCREL64I: + /* The PCREL21BI reloc is specifically not intended for use with + dynamic relocs. PCREL21F and PCREL21M are used for speculation + fixup code, and thus probably ought not be dynamic. The + PCREL22 and PCREL64I relocs aren't emitted as dynamic relocs. */ + if (dynamic_symbol_p) + { + const char *msg; + + if (r_type == R_IA64_PCREL21BI) + msg = _("%B: @internal branch to dynamic symbol %s"); + else if (r_type == R_IA64_PCREL21F || r_type == R_IA64_PCREL21M) + msg = _("%B: speculation fixup to dynamic symbol %s"); + else + msg = _("%B: @pcrel relocation against dynamic symbol %s"); + (*_bfd_error_handler) (msg, input_bfd, + h ? h->root.root.string + : bfd_elf_sym_name (input_bfd, + symtab_hdr, + sym, + sym_sec)); + ret_val = FALSE; + continue; + } + goto finish_pcrel; + + finish_pcrel: + /* Make pc-relative. */ + value -= (input_section->output_section->vma + + input_section->output_offset + + rel->r_offset) & ~ (bfd_vma) 0x3; + r = ia64_elf_install_value (hit_addr, value, r_type); + break; + + case R_IA64_SEGREL32MSB: + case R_IA64_SEGREL32LSB: + case R_IA64_SEGREL64MSB: + case R_IA64_SEGREL64LSB: + { + /* Find the segment that contains the output_section. */ + Elf_Internal_Phdr *p = _bfd_elf_find_segment_containing_section + (output_bfd, input_section->output_section); + + if (p == NULL) + { + r = bfd_reloc_notsupported; + } + else + { + /* The VMA of the segment is the vaddr of the associated + program header. */ + if (value > p->p_vaddr) + value -= p->p_vaddr; + else + value = 0; + r = ia64_elf_install_value (hit_addr, value, r_type); + } + break; + } + + case R_IA64_SECREL32MSB: + case R_IA64_SECREL32LSB: + case R_IA64_SECREL64MSB: + case R_IA64_SECREL64LSB: + /* Make output-section relative to section where the symbol + is defined. PR 475 */ + if (sym_sec) + value -= sym_sec->output_section->vma; + r = ia64_elf_install_value (hit_addr, value, r_type); + break; + + case R_IA64_IPLTMSB: + case R_IA64_IPLTLSB: + /* Install a dynamic relocation for this reloc. */ + if ((dynamic_symbol_p || info->shared) + && (input_section->flags & SEC_ALLOC) != 0) + { + BFD_ASSERT (srel != NULL); + + /* If we don't need dynamic symbol lookup, install two + RELATIVE relocations. */ + if (!dynamic_symbol_p) + { + unsigned int dyn_r_type; + + if (r_type == R_IA64_IPLTMSB) + dyn_r_type = R_IA64_REL64MSB; + else + dyn_r_type = R_IA64_REL64LSB; + + elfNN_ia64_install_dyn_reloc (output_bfd, info, + input_section, + srel, rel->r_offset, + dyn_r_type, 0, value); + elfNN_ia64_install_dyn_reloc (output_bfd, info, + input_section, + srel, rel->r_offset + 8, + dyn_r_type, 0, gp_val); + } + else + elfNN_ia64_install_dyn_reloc (output_bfd, info, input_section, + srel, rel->r_offset, r_type, + h->dynindx, rel->r_addend); + } + + if (r_type == R_IA64_IPLTMSB) + r_type = R_IA64_DIR64MSB; + else + r_type = R_IA64_DIR64LSB; + ia64_elf_install_value (hit_addr, value, r_type); + r = ia64_elf_install_value (hit_addr + 8, gp_val, r_type); + break; + + case R_IA64_TPREL14: + case R_IA64_TPREL22: + case R_IA64_TPREL64I: + if (elf_hash_table (info)->tls_sec == NULL) + goto missing_tls_sec; + value -= elfNN_ia64_tprel_base (info); + r = ia64_elf_install_value (hit_addr, value, r_type); + break; + + case R_IA64_DTPREL14: + case R_IA64_DTPREL22: + case R_IA64_DTPREL64I: + case R_IA64_DTPREL32LSB: + case R_IA64_DTPREL32MSB: + case R_IA64_DTPREL64LSB: + case R_IA64_DTPREL64MSB: + if (elf_hash_table (info)->tls_sec == NULL) + goto missing_tls_sec; + value -= elfNN_ia64_dtprel_base (info); + r = ia64_elf_install_value (hit_addr, value, r_type); + break; + + case R_IA64_LTOFF_TPREL22: + case R_IA64_LTOFF_DTPMOD22: + case R_IA64_LTOFF_DTPREL22: + { + int got_r_type; + long dynindx = h ? h->dynindx : -1; + bfd_vma r_addend = rel->r_addend; + + switch (r_type) + { + default: + case R_IA64_LTOFF_TPREL22: + if (!dynamic_symbol_p) + { + if (elf_hash_table (info)->tls_sec == NULL) + goto missing_tls_sec; + if (!info->shared) + value -= elfNN_ia64_tprel_base (info); + else + { + r_addend += value - elfNN_ia64_dtprel_base (info); + dynindx = 0; + } + } + got_r_type = R_IA64_TPREL64LSB; + break; + case R_IA64_LTOFF_DTPMOD22: + if (!dynamic_symbol_p && !info->shared) + value = 1; + got_r_type = R_IA64_DTPMOD64LSB; + break; + case R_IA64_LTOFF_DTPREL22: + if (!dynamic_symbol_p) + { + if (elf_hash_table (info)->tls_sec == NULL) + goto missing_tls_sec; + value -= elfNN_ia64_dtprel_base (info); + } + got_r_type = R_IA64_DTPRELNNLSB; + break; + } + dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE); + value = set_got_entry (input_bfd, info, dyn_i, dynindx, r_addend, + value, got_r_type); + value -= gp_val; + r = ia64_elf_install_value (hit_addr, value, r_type); + } + break; + + default: + r = bfd_reloc_notsupported; + break; + } + + switch (r) + { + case bfd_reloc_ok: + break; + + case bfd_reloc_undefined: + /* This can happen for global table relative relocs if + __gp is undefined. This is a panic situation so we + don't try to continue. */ + (*info->callbacks->undefined_symbol) + (info, "__gp", input_bfd, input_section, rel->r_offset, 1); + return FALSE; + + case bfd_reloc_notsupported: + { + const char *name; + + if (h) + name = h->root.root.string; + else + name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, + sym_sec); + if (!(*info->callbacks->warning) (info, _("unsupported reloc"), + name, input_bfd, + input_section, rel->r_offset)) + return FALSE; + ret_val = FALSE; + } + break; + + case bfd_reloc_dangerous: + case bfd_reloc_outofrange: + case bfd_reloc_overflow: + default: +missing_tls_sec: + { + const char *name; + + if (h) + name = h->root.root.string; + else + name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, + sym_sec); + + switch (r_type) + { + case R_IA64_TPREL14: + case R_IA64_TPREL22: + case R_IA64_TPREL64I: + case R_IA64_DTPREL14: + case R_IA64_DTPREL22: + case R_IA64_DTPREL64I: + case R_IA64_DTPREL32LSB: + case R_IA64_DTPREL32MSB: + case R_IA64_DTPREL64LSB: + case R_IA64_DTPREL64MSB: + case R_IA64_LTOFF_TPREL22: + case R_IA64_LTOFF_DTPMOD22: + case R_IA64_LTOFF_DTPREL22: + (*_bfd_error_handler) + (_("%B: missing TLS section for relocation %s against `%s' at 0x%lx in section `%A'."), + input_bfd, input_section, howto->name, name, + rel->r_offset); + break; + + case R_IA64_PCREL21B: + case R_IA64_PCREL21BI: + case R_IA64_PCREL21M: + case R_IA64_PCREL21F: + if (is_elf_hash_table (info->hash)) + { + /* Relaxtion is always performed for ELF output. + Overflow failures for those relocations mean + that the section is too big to relax. */ + (*_bfd_error_handler) + (_("%B: Can't relax br (%s) to `%s' at 0x%lx in section `%A' with size 0x%lx (> 0x1000000)."), + input_bfd, input_section, howto->name, name, + rel->r_offset, input_section->size); + break; + } + default: + if (!(*info->callbacks->reloc_overflow) (info, + &h->root, + name, + howto->name, + (bfd_vma) 0, + input_bfd, + input_section, + rel->r_offset)) + return FALSE; + break; + } + + ret_val = FALSE; + } + break; + } + } + + return ret_val; +} + +static bfd_boolean +elfNN_ia64_finish_dynamic_symbol (bfd *output_bfd, + struct bfd_link_info *info, + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) +{ + struct elfNN_ia64_link_hash_table *ia64_info; + struct elfNN_ia64_dyn_sym_info *dyn_i; + + ia64_info = elfNN_ia64_hash_table (info); + if (ia64_info == NULL) + return FALSE; + + dyn_i = get_dyn_sym_info (ia64_info, h, NULL, NULL, FALSE); + + /* Fill in the PLT data, if required. */ + if (dyn_i && dyn_i->want_plt) + { + Elf_Internal_Rela outrel; + bfd_byte *loc; + asection *plt_sec; + bfd_vma plt_addr, pltoff_addr, gp_val, plt_index; + + gp_val = _bfd_get_gp_value (output_bfd); + + /* Initialize the minimal PLT entry. */ + + plt_index = (dyn_i->plt_offset - PLT_HEADER_SIZE) / PLT_MIN_ENTRY_SIZE; + plt_sec = ia64_info->root.splt; + loc = plt_sec->contents + dyn_i->plt_offset; + + memcpy (loc, plt_min_entry, PLT_MIN_ENTRY_SIZE); + ia64_elf_install_value (loc, plt_index, R_IA64_IMM22); + ia64_elf_install_value (loc+2, -dyn_i->plt_offset, R_IA64_PCREL21B); + + plt_addr = (plt_sec->output_section->vma + + plt_sec->output_offset + + dyn_i->plt_offset); + pltoff_addr = set_pltoff_entry (output_bfd, info, dyn_i, plt_addr, TRUE); + + /* Initialize the FULL PLT entry, if needed. */ + if (dyn_i->want_plt2) + { + loc = plt_sec->contents + dyn_i->plt2_offset; + + memcpy (loc, plt_full_entry, PLT_FULL_ENTRY_SIZE); + ia64_elf_install_value (loc, pltoff_addr - gp_val, R_IA64_IMM22); + + /* Mark the symbol as undefined, rather than as defined in the + plt section. Leave the value alone. */ + /* ??? We didn't redefine it in adjust_dynamic_symbol in the + first place. But perhaps elflink.c did some for us. */ + if (!h->def_regular) + sym->st_shndx = SHN_UNDEF; + } + + /* Create the dynamic relocation. */ + outrel.r_offset = pltoff_addr; + if (bfd_little_endian (output_bfd)) + outrel.r_info = ELFNN_R_INFO (h->dynindx, R_IA64_IPLTLSB); + else + outrel.r_info = ELFNN_R_INFO (h->dynindx, R_IA64_IPLTMSB); + outrel.r_addend = 0; + + /* This is fun. In the .IA_64.pltoff section, we've got entries + that correspond both to real PLT entries, and those that + happened to resolve to local symbols but need to be created + to satisfy @pltoff relocations. The .rela.IA_64.pltoff + relocations for the real PLT should come at the end of the + section, so that they can be indexed by plt entry at runtime. + + We emitted all of the relocations for the non-PLT @pltoff + entries during relocate_section. So we can consider the + existing sec->reloc_count to be the base of the array of + PLT relocations. */ + + loc = ia64_info->rel_pltoff_sec->contents; + loc += ((ia64_info->rel_pltoff_sec->reloc_count + plt_index) + * sizeof (ElfNN_External_Rela)); + bfd_elfNN_swap_reloca_out (output_bfd, &outrel, loc); + } + + /* Mark some specially defined symbols as absolute. */ + if (strcmp (h->root.root.string, "_DYNAMIC") == 0 + || h == ia64_info->root.hgot + || h == ia64_info->root.hplt) + sym->st_shndx = SHN_ABS; + + return TRUE; +} + +static bfd_boolean +elfNN_ia64_finish_dynamic_sections (bfd *abfd, + struct bfd_link_info *info) +{ + struct elfNN_ia64_link_hash_table *ia64_info; + bfd *dynobj; + + ia64_info = elfNN_ia64_hash_table (info); + if (ia64_info == NULL) + return FALSE; + + dynobj = ia64_info->root.dynobj; + + if (elf_hash_table (info)->dynamic_sections_created) + { + ElfNN_External_Dyn *dyncon, *dynconend; + asection *sdyn, *sgotplt; + bfd_vma gp_val; + + sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); + sgotplt = bfd_get_section_by_name (dynobj, ".got.plt"); + BFD_ASSERT (sdyn != NULL); + dyncon = (ElfNN_External_Dyn *) sdyn->contents; + dynconend = (ElfNN_External_Dyn *) (sdyn->contents + sdyn->size); + + gp_val = _bfd_get_gp_value (abfd); + + for (; dyncon < dynconend; dyncon++) + { + Elf_Internal_Dyn dyn; + + bfd_elfNN_swap_dyn_in (dynobj, dyncon, &dyn); + + switch (dyn.d_tag) + { + case DT_PLTGOT: + dyn.d_un.d_ptr = gp_val; + break; + + case DT_PLTRELSZ: + dyn.d_un.d_val = (ia64_info->minplt_entries + * sizeof (ElfNN_External_Rela)); + break; + + case DT_JMPREL: + /* See the comment above in finish_dynamic_symbol. */ + dyn.d_un.d_ptr = (ia64_info->rel_pltoff_sec->output_section->vma + + ia64_info->rel_pltoff_sec->output_offset + + (ia64_info->rel_pltoff_sec->reloc_count + * sizeof (ElfNN_External_Rela))); + break; + + case DT_IA_64_PLT_RESERVE: + dyn.d_un.d_ptr = (sgotplt->output_section->vma + + sgotplt->output_offset); + break; + + case DT_RELASZ: + /* Do not have RELASZ include JMPREL. This makes things + easier on ld.so. This is not what the rest of BFD set up. */ + dyn.d_un.d_val -= (ia64_info->minplt_entries + * sizeof (ElfNN_External_Rela)); + break; + } + + bfd_elfNN_swap_dyn_out (abfd, &dyn, dyncon); + } + + /* Initialize the PLT0 entry. */ + if (ia64_info->root.splt) + { + bfd_byte *loc = ia64_info->root.splt->contents; + bfd_vma pltres; + + memcpy (loc, plt_header, PLT_HEADER_SIZE); + + pltres = (sgotplt->output_section->vma + + sgotplt->output_offset + - gp_val); + + ia64_elf_install_value (loc+1, pltres, R_IA64_GPREL22); + } + } + + return TRUE; +} + +/* ELF file flag handling: */ + +/* Function to keep IA-64 specific file flags. */ +static bfd_boolean +elfNN_ia64_set_private_flags (bfd *abfd, flagword flags) +{ + BFD_ASSERT (!elf_flags_init (abfd) + || elf_elfheader (abfd)->e_flags == flags); + + elf_elfheader (abfd)->e_flags = flags; + elf_flags_init (abfd) = TRUE; + return TRUE; +} + +/* Merge backend specific data from an object file to the output + object file when linking. */ +static bfd_boolean +elfNN_ia64_merge_private_bfd_data (bfd *ibfd, bfd *obfd) +{ + flagword out_flags; + flagword in_flags; + bfd_boolean ok = TRUE; + + /* Don't even pretend to support mixed-format linking. */ + if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour + || bfd_get_flavour (obfd) != bfd_target_elf_flavour) + return FALSE; + + in_flags = elf_elfheader (ibfd)->e_flags; + out_flags = elf_elfheader (obfd)->e_flags; + + if (! elf_flags_init (obfd)) + { + elf_flags_init (obfd) = TRUE; + elf_elfheader (obfd)->e_flags = in_flags; + + if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) + && bfd_get_arch_info (obfd)->the_default) + { + return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), + bfd_get_mach (ibfd)); + } + + return TRUE; + } + + /* Check flag compatibility. */ + if (in_flags == out_flags) + return TRUE; + + /* Output has EF_IA_64_REDUCEDFP set only if all inputs have it set. */ + if (!(in_flags & EF_IA_64_REDUCEDFP) && (out_flags & EF_IA_64_REDUCEDFP)) + elf_elfheader (obfd)->e_flags &= ~EF_IA_64_REDUCEDFP; + + if ((in_flags & EF_IA_64_TRAPNIL) != (out_flags & EF_IA_64_TRAPNIL)) + { + (*_bfd_error_handler) + (_("%B: linking trap-on-NULL-dereference with non-trapping files"), + ibfd); + + bfd_set_error (bfd_error_bad_value); + ok = FALSE; + } + if ((in_flags & EF_IA_64_BE) != (out_flags & EF_IA_64_BE)) + { + (*_bfd_error_handler) + (_("%B: linking big-endian files with little-endian files"), + ibfd); + + bfd_set_error (bfd_error_bad_value); + ok = FALSE; + } + if ((in_flags & EF_IA_64_ABI64) != (out_flags & EF_IA_64_ABI64)) + { + (*_bfd_error_handler) + (_("%B: linking 64-bit files with 32-bit files"), + ibfd); + + bfd_set_error (bfd_error_bad_value); + ok = FALSE; + } + if ((in_flags & EF_IA_64_CONS_GP) != (out_flags & EF_IA_64_CONS_GP)) + { + (*_bfd_error_handler) + (_("%B: linking constant-gp files with non-constant-gp files"), + ibfd); + + bfd_set_error (bfd_error_bad_value); + ok = FALSE; + } + if ((in_flags & EF_IA_64_NOFUNCDESC_CONS_GP) + != (out_flags & EF_IA_64_NOFUNCDESC_CONS_GP)) + { + (*_bfd_error_handler) + (_("%B: linking auto-pic files with non-auto-pic files"), + ibfd); + + bfd_set_error (bfd_error_bad_value); + ok = FALSE; + } + + return ok; +} + +static bfd_boolean +elfNN_ia64_print_private_bfd_data (bfd *abfd, PTR ptr) +{ + FILE *file = (FILE *) ptr; + flagword flags = elf_elfheader (abfd)->e_flags; + + BFD_ASSERT (abfd != NULL && ptr != NULL); + + fprintf (file, "private flags = %s%s%s%s%s%s%s%s\n", + (flags & EF_IA_64_TRAPNIL) ? "TRAPNIL, " : "", + (flags & EF_IA_64_EXT) ? "EXT, " : "", + (flags & EF_IA_64_BE) ? "BE, " : "LE, ", + (flags & EF_IA_64_REDUCEDFP) ? "REDUCEDFP, " : "", + (flags & EF_IA_64_CONS_GP) ? "CONS_GP, " : "", + (flags & EF_IA_64_NOFUNCDESC_CONS_GP) ? "NOFUNCDESC_CONS_GP, " : "", + (flags & EF_IA_64_ABSOLUTE) ? "ABSOLUTE, " : "", + (flags & EF_IA_64_ABI64) ? "ABI64" : "ABI32"); + + _bfd_elf_print_private_bfd_data (abfd, ptr); + return TRUE; +} + +static enum elf_reloc_type_class +elfNN_ia64_reloc_type_class (const Elf_Internal_Rela *rela) +{ + switch ((int) ELFNN_R_TYPE (rela->r_info)) + { + case R_IA64_REL32MSB: + case R_IA64_REL32LSB: + case R_IA64_REL64MSB: + case R_IA64_REL64LSB: + return reloc_class_relative; + case R_IA64_IPLTMSB: + case R_IA64_IPLTLSB: + return reloc_class_plt; + case R_IA64_COPY: + return reloc_class_copy; + default: + return reloc_class_normal; + } +} + +static const struct bfd_elf_special_section elfNN_ia64_special_sections[] = +{ + { STRING_COMMA_LEN (".sbss"), -1, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_IA_64_SHORT }, + { STRING_COMMA_LEN (".sdata"), -1, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_IA_64_SHORT }, + { NULL, 0, 0, 0, 0 } +}; + +static bfd_boolean +elfNN_ia64_object_p (bfd *abfd) +{ + asection *sec; + asection *group, *unwi, *unw; + flagword flags; + const char *name; + char *unwi_name, *unw_name; + bfd_size_type amt; + + if (abfd->flags & DYNAMIC) + return TRUE; + + /* Flags for fake group section. */ + flags = (SEC_LINKER_CREATED | SEC_GROUP | SEC_LINK_ONCE + | SEC_EXCLUDE); + + /* We add a fake section group for each .gnu.linkonce.t.* section, + which isn't in a section group, and its unwind sections. */ + for (sec = abfd->sections; sec != NULL; sec = sec->next) + { + if (elf_sec_group (sec) == NULL + && ((sec->flags & (SEC_LINK_ONCE | SEC_CODE | SEC_GROUP)) + == (SEC_LINK_ONCE | SEC_CODE)) + && CONST_STRNEQ (sec->name, ".gnu.linkonce.t.")) + { + name = sec->name + 16; + + amt = strlen (name) + sizeof (".gnu.linkonce.ia64unwi."); + unwi_name = bfd_alloc (abfd, amt); + if (!unwi_name) + return FALSE; + + strcpy (stpcpy (unwi_name, ".gnu.linkonce.ia64unwi."), name); + unwi = bfd_get_section_by_name (abfd, unwi_name); + + amt = strlen (name) + sizeof (".gnu.linkonce.ia64unw."); + unw_name = bfd_alloc (abfd, amt); + if (!unw_name) + return FALSE; + + strcpy (stpcpy (unw_name, ".gnu.linkonce.ia64unw."), name); + unw = bfd_get_section_by_name (abfd, unw_name); + + /* We need to create a fake group section for it and its + unwind sections. */ + group = bfd_make_section_anyway_with_flags (abfd, name, + flags); + if (group == NULL) + return FALSE; + + /* Move the fake group section to the beginning. */ + bfd_section_list_remove (abfd, group); + bfd_section_list_prepend (abfd, group); + + elf_next_in_group (group) = sec; + + elf_group_name (sec) = name; + elf_next_in_group (sec) = sec; + elf_sec_group (sec) = group; + + if (unwi) + { + elf_group_name (unwi) = name; + elf_next_in_group (unwi) = sec; + elf_next_in_group (sec) = unwi; + elf_sec_group (unwi) = group; + } + + if (unw) + { + elf_group_name (unw) = name; + if (unwi) + { + elf_next_in_group (unw) = elf_next_in_group (unwi); + elf_next_in_group (unwi) = unw; + } + else + { + elf_next_in_group (unw) = sec; + elf_next_in_group (sec) = unw; + } + elf_sec_group (unw) = group; + } + + /* Fake SHT_GROUP section header. */ + elf_section_data (group)->this_hdr.bfd_section = group; + elf_section_data (group)->this_hdr.sh_type = SHT_GROUP; + } + } + return TRUE; +} + +static bfd_boolean +elfNN_ia64_hpux_vec (const bfd_target *vec) +{ + extern const bfd_target bfd_elfNN_ia64_hpux_big_vec; + return (vec == & bfd_elfNN_ia64_hpux_big_vec); +} + +static void +elfNN_hpux_post_process_headers (bfd *abfd, + struct bfd_link_info *info ATTRIBUTE_UNUSED) +{ + Elf_Internal_Ehdr *i_ehdrp = elf_elfheader (abfd); + + i_ehdrp->e_ident[EI_OSABI] = get_elf_backend_data (abfd)->elf_osabi; + i_ehdrp->e_ident[EI_ABIVERSION] = 1; +} + +static bfd_boolean +elfNN_hpux_backend_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED, + asection *sec, int *retval) +{ + if (bfd_is_com_section (sec)) + { + *retval = SHN_IA_64_ANSI_COMMON; + return TRUE; + } + return FALSE; +} + +static void +elfNN_hpux_backend_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED, + asymbol *asym) +{ + elf_symbol_type *elfsym = (elf_symbol_type *) asym; + + switch (elfsym->internal_elf_sym.st_shndx) + { + case SHN_IA_64_ANSI_COMMON: + asym->section = bfd_com_section_ptr; + asym->value = elfsym->internal_elf_sym.st_size; + asym->flags &= ~BSF_GLOBAL; + break; + } +} + +#ifdef INCLUDE_IA64_VMS + +static bfd_boolean +elfNN_vms_section_from_shdr (bfd *abfd, + Elf_Internal_Shdr *hdr, + const char *name, + int shindex) +{ + switch (hdr->sh_type) + { + case SHT_IA_64_VMS_TRACE: + case SHT_IA_64_VMS_DEBUG: + case SHT_IA_64_VMS_DEBUG_STR: + break; + + default: + return elfNN_ia64_section_from_shdr (abfd, hdr, name, shindex); + } + + if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) + return FALSE; + + return TRUE; +} + +static bfd_boolean +elfNN_vms_object_p (bfd *abfd) +{ + Elf_Internal_Ehdr *i_ehdrp = elf_elfheader (abfd); + Elf_Internal_Phdr *i_phdr = elf_tdata (abfd)->phdr; + unsigned int i; + unsigned int num_text = 0; + unsigned int num_data = 0; + unsigned int num_rodata = 0; + char name[16]; + + if (!elfNN_ia64_object_p (abfd)) + return FALSE; + + for (i = 0; i < i_ehdrp->e_phnum; i++, i_phdr++) + { + /* Is there a section for this segment? */ + bfd_vma base_vma = i_phdr->p_vaddr; + bfd_vma limit_vma = base_vma + i_phdr->p_filesz; + + if (i_phdr->p_type != PT_LOAD) + continue; + + again: + while (base_vma < limit_vma) + { + bfd_vma next_vma = limit_vma; + asection *nsec; + asection *sec; + flagword flags; + char *nname = NULL; + + /* Find a section covering base_vma. */ + for (sec = abfd->sections; sec != NULL; sec = sec->next) + { + if ((sec->flags & (SEC_ALLOC | SEC_LOAD)) == 0) + continue; + if (sec->vma <= base_vma && sec->vma + sec->size > base_vma) + { + base_vma = sec->vma + sec->size; + goto again; + } + if (sec->vma < next_vma && sec->vma + sec->size >= base_vma) + next_vma = sec->vma; + } + + /* No section covering [base_vma; next_vma). Create a fake one. */ + flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS; + if (i_phdr->p_flags & PF_X) + { + flags |= SEC_CODE; + if (num_text++ == 0) + nname = ".text"; + else + sprintf (name, ".text$%u", num_text); + } + else if ((i_phdr->p_flags & (PF_R | PF_W)) == PF_R) + { + flags |= SEC_READONLY; + sprintf (name, ".rodata$%u", num_rodata++); + } + else + { + flags |= SEC_DATA; + sprintf (name, ".data$%u", num_data++); + } + + /* Allocate name. */ + if (nname == NULL) + { + size_t name_len = strlen (name) + 1; + nname = bfd_alloc (abfd, name_len); + if (nname == NULL) + return FALSE; + memcpy (nname, name, name_len); + } + + /* Create and fill new section. */ + nsec = bfd_make_section_anyway_with_flags (abfd, nname, flags); + if (nsec == NULL) + return FALSE; + nsec->vma = base_vma; + nsec->size = next_vma - base_vma; + nsec->filepos = i_phdr->p_offset + (base_vma - i_phdr->p_vaddr); + + base_vma = next_vma; + } + } + return TRUE; +} + +static void +elfNN_vms_post_process_headers (bfd *abfd, + struct bfd_link_info *info ATTRIBUTE_UNUSED) +{ + Elf_Internal_Ehdr *i_ehdrp = elf_elfheader (abfd); + + i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_OPENVMS; + i_ehdrp->e_ident[EI_ABIVERSION] = 2; +} + +static bfd_boolean +elfNN_vms_section_processing (bfd *abfd ATTRIBUTE_UNUSED, + Elf_Internal_Shdr *hdr) +{ + if (hdr->bfd_section != NULL) + { + const char *name = bfd_get_section_name (abfd, hdr->bfd_section); + + if (strcmp (name, ".text") == 0) + hdr->sh_flags |= SHF_IA_64_VMS_SHARED; + else if ((strcmp (name, ".debug") == 0) + || (strcmp (name, ".debug_abbrev") == 0) + || (strcmp (name, ".debug_aranges") == 0) + || (strcmp (name, ".debug_frame") == 0) + || (strcmp (name, ".debug_info") == 0) + || (strcmp (name, ".debug_loc") == 0) + || (strcmp (name, ".debug_macinfo") == 0) + || (strcmp (name, ".debug_pubnames") == 0) + || (strcmp (name, ".debug_pubtypes") == 0)) + hdr->sh_type = SHT_IA_64_VMS_DEBUG; + else if ((strcmp (name, ".debug_line") == 0) + || (strcmp (name, ".debug_ranges") == 0)) + hdr->sh_type = SHT_IA_64_VMS_TRACE; + else if (strcmp (name, ".debug_str") == 0) + hdr->sh_type = SHT_IA_64_VMS_DEBUG_STR; + else if (strcmp (name, ".vms_display_name_info") == 0) + { + int idx, symcount; + asymbol **syms; + struct elf_obj_tdata *t = elf_tdata (abfd); + int buf[2]; + int demangler_sym_idx = -1; + + symcount = bfd_get_symcount (abfd); + syms = bfd_get_outsymbols (abfd); + for (idx = 0; idx < symcount; idx++) + { + asymbol *sym; + sym = syms[idx]; + if ((sym->flags & (BSF_DEBUGGING | BSF_DYNAMIC)) + && strchr (sym->name, '@') + && (strcmp (sym->section->name, BFD_ABS_SECTION_NAME) == 0)) + { + demangler_sym_idx = sym->udata.i; + break; + } + } + + hdr->sh_type = SHT_IA_64_VMS_DISPLAY_NAME_INFO; + hdr->sh_entsize = 4; + hdr->sh_addralign = 0; + hdr->sh_link = t->symtab_section; + + /* Find symtab index of demangler routine and stuff it in + the second long word of section data. */ + + if (demangler_sym_idx > -1) + { + bfd_seek (abfd, hdr->sh_offset, SEEK_SET); + bfd_bread (buf, hdr->sh_size, abfd); + buf [1] = demangler_sym_idx; + bfd_seek (abfd, hdr->sh_offset, SEEK_SET); + bfd_bwrite (buf, hdr->sh_size, abfd); + } + } + } + + return TRUE; +} + +/* The final processing done just before writing out a VMS IA-64 ELF + object file. */ + +static void +elfNN_vms_final_write_processing (bfd *abfd, + bfd_boolean linker ATTRIBUTE_UNUSED) +{ + Elf_Internal_Shdr *hdr; + asection *s; + int unwind_info_sect_idx = 0; + + for (s = abfd->sections; s; s = s->next) + { + hdr = &elf_section_data (s)->this_hdr; + + if (strcmp (bfd_get_section_name (abfd, hdr->bfd_section), + ".IA_64.unwind_info") == 0) + unwind_info_sect_idx = elf_section_data (s)->this_idx; + + switch (hdr->sh_type) + { + case SHT_IA_64_UNWIND: + /* VMS requires sh_info to point to the unwind info section. */ + hdr->sh_info = unwind_info_sect_idx; + break; + } + } + + if (! elf_flags_init (abfd)) + { + unsigned long flags = 0; + + if (abfd->xvec->byteorder == BFD_ENDIAN_BIG) + flags |= EF_IA_64_BE; + if (bfd_get_mach (abfd) == bfd_mach_ia64_elf64) + flags |= EF_IA_64_ABI64; + + elf_elfheader(abfd)->e_flags = flags; + elf_flags_init (abfd) = TRUE; + } +} + +static bfd_boolean +elfNN_vms_close_and_cleanup (bfd *abfd) +{ + if (bfd_get_format (abfd) == bfd_object) + { + long isize, irsize; + + if (elf_shstrtab (abfd) != NULL) + _bfd_elf_strtab_free (elf_shstrtab (abfd)); + + /* Pad to 8 byte boundary for IPF/VMS. */ + isize = bfd_get_size (abfd); + if ((irsize = isize/8*8) < isize) + { + int ishort = (irsize + 8) - isize; + bfd_seek (abfd, isize, SEEK_SET); + bfd_bwrite (bfd_zmalloc (ishort), ishort, abfd); + } + } + + return _bfd_generic_close_and_cleanup (abfd); +} +#endif /* INCLUDE_IA64_VMS */ + +#define TARGET_LITTLE_SYM bfd_elfNN_ia64_little_vec +#define TARGET_LITTLE_NAME "elfNN-ia64-little" +#define TARGET_BIG_SYM bfd_elfNN_ia64_big_vec +#define TARGET_BIG_NAME "elfNN-ia64-big" +#define ELF_ARCH bfd_arch_ia64 +#define ELF_TARGET_ID IA64_ELF_DATA +#define ELF_MACHINE_CODE EM_IA_64 +#define ELF_MACHINE_ALT1 1999 /* EAS2.3 */ +#define ELF_MACHINE_ALT2 1998 /* EAS2.2 */ +#define ELF_MAXPAGESIZE 0x10000 /* 64KB */ +#define ELF_COMMONPAGESIZE 0x4000 /* 16KB */ + +#define elf_backend_section_from_shdr \ + elfNN_ia64_section_from_shdr +#define elf_backend_section_flags \ + elfNN_ia64_section_flags +#define elf_backend_fake_sections \ + elfNN_ia64_fake_sections +#define elf_backend_final_write_processing \ + elfNN_ia64_final_write_processing +#define elf_backend_add_symbol_hook \ + elfNN_ia64_add_symbol_hook +#define elf_backend_additional_program_headers \ + elfNN_ia64_additional_program_headers +#define elf_backend_modify_segment_map \ + elfNN_ia64_modify_segment_map +#define elf_backend_modify_program_headers \ + elfNN_ia64_modify_program_headers +#define elf_info_to_howto \ + elfNN_ia64_info_to_howto + +#define bfd_elfNN_bfd_reloc_type_lookup \ + ia64_elf_reloc_type_lookup +#define bfd_elfNN_bfd_reloc_name_lookup \ + ia64_elf_reloc_name_lookup +#define bfd_elfNN_bfd_is_local_label_name \ + elfNN_ia64_is_local_label_name +#define bfd_elfNN_bfd_relax_section \ + elfNN_ia64_relax_section + +#define elf_backend_object_p \ + elfNN_ia64_object_p + +/* Stuff for the BFD linker: */ +#define bfd_elfNN_bfd_link_hash_table_create \ + elfNN_ia64_hash_table_create +#define bfd_elfNN_bfd_link_hash_table_free \ + elfNN_ia64_hash_table_free +#define elf_backend_create_dynamic_sections \ + elfNN_ia64_create_dynamic_sections +#define elf_backend_check_relocs \ + elfNN_ia64_check_relocs +#define elf_backend_adjust_dynamic_symbol \ + elfNN_ia64_adjust_dynamic_symbol +#define elf_backend_size_dynamic_sections \ + elfNN_ia64_size_dynamic_sections +#define elf_backend_omit_section_dynsym \ + ((bfd_boolean (*) (bfd *, struct bfd_link_info *, asection *)) bfd_true) +#define elf_backend_relocate_section \ + elfNN_ia64_relocate_section +#define elf_backend_finish_dynamic_symbol \ + elfNN_ia64_finish_dynamic_symbol +#define elf_backend_finish_dynamic_sections \ + elfNN_ia64_finish_dynamic_sections +#define bfd_elfNN_bfd_final_link \ + elfNN_ia64_final_link + +#define bfd_elfNN_bfd_merge_private_bfd_data \ + elfNN_ia64_merge_private_bfd_data +#define bfd_elfNN_bfd_set_private_flags \ + elfNN_ia64_set_private_flags +#define bfd_elfNN_bfd_print_private_bfd_data \ + elfNN_ia64_print_private_bfd_data + +#define elf_backend_plt_readonly 1 +#define elf_backend_want_plt_sym 0 +#define elf_backend_plt_alignment 5 +#define elf_backend_got_header_size 0 +#define elf_backend_want_got_plt 1 +#define elf_backend_may_use_rel_p 1 +#define elf_backend_may_use_rela_p 1 +#define elf_backend_default_use_rela_p 1 +#define elf_backend_want_dynbss 0 +#define elf_backend_copy_indirect_symbol elfNN_ia64_hash_copy_indirect +#define elf_backend_hide_symbol elfNN_ia64_hash_hide_symbol +#define elf_backend_fixup_symbol _bfd_elf_link_hash_fixup_symbol +#define elf_backend_reloc_type_class elfNN_ia64_reloc_type_class +#define elf_backend_rela_normal 1 +#define elf_backend_special_sections elfNN_ia64_special_sections +#define elf_backend_default_execstack 0 + +/* FIXME: PR 290: The Intel C compiler generates SHT_IA_64_UNWIND with + SHF_LINK_ORDER. But it doesn't set the sh_link or sh_info fields. + We don't want to flood users with so many error messages. We turn + off the warning for now. It will be turned on later when the Intel + compiler is fixed. */ +#define elf_backend_link_order_error_handler NULL + +#include "elfNN-target.h" + +/* HPUX-specific vectors. */ + +#undef TARGET_LITTLE_SYM +#undef TARGET_LITTLE_NAME +#undef TARGET_BIG_SYM +#define TARGET_BIG_SYM bfd_elfNN_ia64_hpux_big_vec +#undef TARGET_BIG_NAME +#define TARGET_BIG_NAME "elfNN-ia64-hpux-big" + +/* These are HP-UX specific functions. */ + +#undef elf_backend_post_process_headers +#define elf_backend_post_process_headers elfNN_hpux_post_process_headers + +#undef elf_backend_section_from_bfd_section +#define elf_backend_section_from_bfd_section elfNN_hpux_backend_section_from_bfd_section + +#undef elf_backend_symbol_processing +#define elf_backend_symbol_processing elfNN_hpux_backend_symbol_processing + +#undef elf_backend_want_p_paddr_set_to_zero +#define elf_backend_want_p_paddr_set_to_zero 1 + +#undef ELF_COMMONPAGESIZE +#undef ELF_OSABI +#define ELF_OSABI ELFOSABI_HPUX + +#undef elfNN_bed +#define elfNN_bed elfNN_ia64_hpux_bed + +#include "elfNN-target.h" + +/* VMS-specific vectors. */ +#ifdef INCLUDE_IA64_VMS + +#undef TARGET_LITTLE_SYM +#define TARGET_LITTLE_SYM bfd_elfNN_ia64_vms_vec +#undef TARGET_LITTLE_NAME +#define TARGET_LITTLE_NAME "elfNN-ia64-vms" +#undef TARGET_BIG_SYM +#undef TARGET_BIG_NAME + +/* These are VMS specific functions. */ + +#undef elf_backend_object_p +#define elf_backend_object_p elfNN_vms_object_p + +#undef elf_backend_section_from_shdr +#define elf_backend_section_from_shdr elfNN_vms_section_from_shdr + +#undef elf_backend_post_process_headers +#define elf_backend_post_process_headers elfNN_vms_post_process_headers + +#undef elf_backend_section_processing +#define elf_backend_section_processing elfNN_vms_section_processing + +#undef elf_backend_final_write_processing +#define elf_backend_final_write_processing elfNN_vms_final_write_processing + +#undef bfd_elfNN_close_and_cleanup +#define bfd_elfNN_close_and_cleanup elfNN_vms_close_and_cleanup + +#undef elf_backend_section_from_bfd_section + +#undef elf_backend_symbol_processing + +#undef elf_backend_want_p_paddr_set_to_zero + +#undef ELF_OSABI +#define ELF_OSABI ELFOSABI_OPENVMS + +#undef ELF_MAXPAGESIZE +#define ELF_MAXPAGESIZE 0x10000 /* 64KB */ + +#undef elfNN_bed +#define elfNN_bed elfNN_ia64_vms_bed + +/* Use VMS-style archives (in particular, don't use the standard coff + archive format). */ +#define bfd_elfNN_archive_functions + +#undef bfd_elfNN_archive_p +#define bfd_elfNN_archive_p _bfd_vms_lib_ia64_archive_p +#undef bfd_elfNN_write_archive_contents +#define bfd_elfNN_write_archive_contents _bfd_vms_lib_write_archive_contents +#undef bfd_elfNN_mkarchive +#define bfd_elfNN_mkarchive _bfd_vms_lib_ia64_mkarchive + +#define bfd_elfNN_archive_slurp_armap \ + _bfd_vms_lib_slurp_armap +#define bfd_elfNN_archive_slurp_extended_name_table \ + _bfd_vms_lib_slurp_extended_name_table +#define bfd_elfNN_archive_construct_extended_name_table \ + _bfd_vms_lib_construct_extended_name_table +#define bfd_elfNN_archive_truncate_arname \ + _bfd_vms_lib_truncate_arname +#define bfd_elfNN_archive_write_armap \ + _bfd_vms_lib_write_armap +#define bfd_elfNN_archive_read_ar_hdr \ + _bfd_vms_lib_read_ar_hdr +#define bfd_elfNN_archive_write_ar_hdr \ + _bfd_vms_lib_write_ar_hdr +#define bfd_elfNN_archive_openr_next_archived_file \ + _bfd_vms_lib_openr_next_archived_file +#define bfd_elfNN_archive_get_elt_at_index \ + _bfd_vms_lib_get_elt_at_index +#define bfd_elfNN_archive_generic_stat_arch_elt \ + _bfd_vms_lib_generic_stat_arch_elt +#define bfd_elfNN_archive_update_armap_timestamp \ + _bfd_vms_lib_update_armap_timestamp + +#include "elfNN-target.h" + +#endif /* INCLUDE_IA64_VMS */ diff --git a/bfd/elfxx-ia64.c b/bfd/elfxx-ia64.c index ca0a3bc..ff45e9a 100644 --- a/bfd/elfxx-ia64.c +++ b/bfd/elfxx-ia64.c @@ -29,16 +29,7 @@ #include "objalloc.h" #include "hashtab.h" #include "bfd_stdint.h" - -#define ARCH_SIZE NN - -#if ARCH_SIZE == 64 -#define LOG_SECTION_ALIGN 3 -#endif - -#if ARCH_SIZE == 32 -#define LOG_SECTION_ALIGN 2 -#endif +#include "elfxx-ia64.h" /* THE RULES for all the stuff the linker creates -- @@ -68,183 +59,17 @@ MIN_PLT Created by PLTOFF entries against dynamic symbols. This does not require dynamic relocations. */ -/* Only add code for vms when the vms target is enabled. This is required - because it depends on vms-lib.c for its archive format and we don't want - to compile that code if it is not used. */ -#if ARCH_SIZE == 64 && \ - (defined (HAVE_bfd_elf64_ia64_vms_vec) || defined (HAVE_all_vecs)) -#define INCLUDE_IA64_VMS -#endif - +/* ia64-specific relocation. */ #define NELEMS(a) ((int) (sizeof (a) / sizeof ((a)[0]))) -typedef struct bfd_hash_entry *(*new_hash_entry_func) - (struct bfd_hash_entry *, struct bfd_hash_table *, const char *); - -/* In dynamically (linker-) created sections, we generally need to keep track - of the place a symbol or expression got allocated to. This is done via hash - tables that store entries of the following type. */ - -struct elfNN_ia64_dyn_sym_info -{ - /* The addend for which this entry is relevant. */ - bfd_vma addend; - - bfd_vma got_offset; - bfd_vma fptr_offset; - bfd_vma pltoff_offset; - bfd_vma plt_offset; - bfd_vma plt2_offset; - bfd_vma tprel_offset; - bfd_vma dtpmod_offset; - bfd_vma dtprel_offset; - - /* The symbol table entry, if any, that this was derived from. */ - struct elf_link_hash_entry *h; - - /* Used to count non-got, non-plt relocations for delayed sizing - of relocation sections. */ - struct elfNN_ia64_dyn_reloc_entry - { - struct elfNN_ia64_dyn_reloc_entry *next; - asection *srel; - int type; - int count; - - /* Is this reloc against readonly section? */ - bfd_boolean reltext; - } *reloc_entries; - - /* TRUE when the section contents have been updated. */ - unsigned got_done : 1; - unsigned fptr_done : 1; - unsigned pltoff_done : 1; - unsigned tprel_done : 1; - unsigned dtpmod_done : 1; - unsigned dtprel_done : 1; - - /* TRUE for the different kinds of linker data we want created. */ - unsigned want_got : 1; - unsigned want_gotx : 1; - unsigned want_fptr : 1; - unsigned want_ltoff_fptr : 1; - unsigned want_plt : 1; - unsigned want_plt2 : 1; - unsigned want_pltoff : 1; - unsigned want_tprel : 1; - unsigned want_dtpmod : 1; - unsigned want_dtprel : 1; -}; - -struct elfNN_ia64_local_hash_entry -{ - int id; - unsigned int r_sym; - /* The number of elements in elfNN_ia64_dyn_sym_info array. */ - unsigned int count; - /* The number of sorted elements in elfNN_ia64_dyn_sym_info array. */ - unsigned int sorted_count; - /* The size of elfNN_ia64_dyn_sym_info array. */ - unsigned int size; - /* The array of elfNN_ia64_dyn_sym_info. */ - struct elfNN_ia64_dyn_sym_info *info; - - /* TRUE if this hash entry's addends was translated for - SHF_MERGE optimization. */ - unsigned sec_merge_done : 1; -}; - -struct elfNN_ia64_link_hash_entry -{ - struct elf_link_hash_entry root; - /* The number of elements in elfNN_ia64_dyn_sym_info array. */ - unsigned int count; - /* The number of sorted elements in elfNN_ia64_dyn_sym_info array. */ - unsigned int sorted_count; - /* The size of elfNN_ia64_dyn_sym_info array. */ - unsigned int size; - /* The array of elfNN_ia64_dyn_sym_info. */ - struct elfNN_ia64_dyn_sym_info *info; -}; - -struct elfNN_ia64_link_hash_table -{ - /* The main hash table. */ - struct elf_link_hash_table root; - - asection *fptr_sec; /* Function descriptor table (or NULL). */ - asection *rel_fptr_sec; /* Dynamic relocation section for same. */ - asection *pltoff_sec; /* Private descriptors for plt (or NULL). */ - asection *rel_pltoff_sec; /* Dynamic relocation section for same. */ - - bfd_size_type minplt_entries; /* Number of minplt entries. */ - unsigned reltext : 1; /* Are there relocs against readonly sections? */ - unsigned self_dtpmod_done : 1;/* Has self DTPMOD entry been finished? */ - bfd_vma self_dtpmod_offset; /* .got offset to self DTPMOD entry. */ - /* There are maybe R_IA64_GPREL22 relocations, including those - optimized from R_IA64_LTOFF22X, against non-SHF_IA_64_SHORT - sections. We need to record those sections so that we can choose - a proper GP to cover all R_IA64_GPREL22 relocations. */ - asection *max_short_sec; /* Maximum short output section. */ - bfd_vma max_short_offset; /* Maximum short offset. */ - asection *min_short_sec; /* Minimum short output section. */ - bfd_vma min_short_offset; /* Minimum short offset. */ - - htab_t loc_hash_table; - void *loc_hash_memory; -}; - -struct elfNN_ia64_allocate_data -{ - struct bfd_link_info *info; - bfd_size_type ofs; - bfd_boolean only_got; -}; - -#define elfNN_ia64_hash_table(p) \ - (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \ - == IA64_ELF_DATA ? ((struct elfNN_ia64_link_hash_table *) ((p)->hash)) : NULL) - -static struct elfNN_ia64_dyn_sym_info * get_dyn_sym_info - (struct elfNN_ia64_link_hash_table *ia64_info, - struct elf_link_hash_entry *h, - bfd *abfd, const Elf_Internal_Rela *rel, bfd_boolean create); -static bfd_boolean elfNN_ia64_dynamic_symbol_p - (struct elf_link_hash_entry *h, struct bfd_link_info *info, int); -static bfd_reloc_status_type elfNN_ia64_install_value - (bfd_byte *hit_addr, bfd_vma val, unsigned int r_type); -static bfd_boolean elfNN_ia64_choose_gp - (bfd *abfd, struct bfd_link_info *info, bfd_boolean final); -static void elfNN_ia64_relax_ldxmov - (bfd_byte *contents, bfd_vma off); -static void elfNN_ia64_dyn_sym_traverse - (struct elfNN_ia64_link_hash_table *ia64_info, - bfd_boolean (*func) (struct elfNN_ia64_dyn_sym_info *, PTR), - PTR info); -static bfd_boolean allocate_global_data_got - (struct elfNN_ia64_dyn_sym_info *dyn_i, PTR data); -static bfd_boolean allocate_global_fptr_got - (struct elfNN_ia64_dyn_sym_info *dyn_i, PTR data); -static bfd_boolean allocate_local_got - (struct elfNN_ia64_dyn_sym_info *dyn_i, PTR data); -static bfd_boolean elfNN_ia64_hpux_vec - (const bfd_target *vec); -static bfd_boolean allocate_dynrel_entries - (struct elfNN_ia64_dyn_sym_info *dyn_i, PTR data); -static asection *get_pltoff - (bfd *abfd, struct bfd_link_info *info, - struct elfNN_ia64_link_hash_table *ia64_info); - -/* ia64-specific relocation. */ - /* Perform a relocation. Not much to do here as all the hard work is done in elfNN_ia64_final_link_relocate. */ static bfd_reloc_status_type -elfNN_ia64_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc, - asymbol *sym ATTRIBUTE_UNUSED, - PTR data ATTRIBUTE_UNUSED, asection *input_section, - bfd *output_bfd, char **error_message) +ia64_elf_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc, + asymbol *sym ATTRIBUTE_UNUSED, + PTR data ATTRIBUTE_UNUSED, asection *input_section, + bfd *output_bfd, char **error_message) { if (output_bfd) { @@ -255,13 +80,13 @@ elfNN_ia64_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc, if (input_section->flags & SEC_DEBUGGING) return bfd_reloc_continue; - *error_message = "Unsupported call to elfNN_ia64_reloc"; + *error_message = "Unsupported call to ia64_elf_reloc"; return bfd_reloc_notsupported; } #define IA64_HOWTO(TYPE, NAME, SIZE, PCREL, IN) \ HOWTO (TYPE, 0, SIZE, 0, PCREL, 0, complain_overflow_signed, \ - elfNN_ia64_reloc, NAME, FALSE, 0, -1, IN) + ia64_elf_reloc, NAME, FALSE, 0, -1, IN) /* This table has to be sorted according to increasing number of the TYPE field. */ @@ -369,8 +194,8 @@ static unsigned char elf_code_to_howto_index[R_IA64_MAX_RELOC_CODE + 1]; /* Given a BFD reloc type, return the matching HOWTO structure. */ -static reloc_howto_type * -lookup_howto (unsigned int rtype) +reloc_howto_type * +ia64_elf_lookup_howto (unsigned int rtype) { static int inited = 0; int i; @@ -392,9 +217,9 @@ lookup_howto (unsigned int rtype) return ia64_howto_table + i; } -static reloc_howto_type* -elfNN_ia64_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, - bfd_reloc_code_real_type bfd_code) +reloc_howto_type* +ia64_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type bfd_code) { unsigned int rtype; @@ -498,12 +323,12 @@ elfNN_ia64_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, default: return 0; } - return lookup_howto (rtype); + return ia64_elf_lookup_howto (rtype); } -static reloc_howto_type * -elfNN_ia64_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, - const char *r_name) +reloc_howto_type * +ia64_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, + const char *r_name) { unsigned int i; @@ -517,82 +342,6 @@ elfNN_ia64_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, return NULL; } -/* Given a ELF reloc, return the matching HOWTO structure. */ - -static void -elfNN_ia64_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, - arelent *bfd_reloc, - Elf_Internal_Rela *elf_reloc) -{ - bfd_reloc->howto - = lookup_howto ((unsigned int) ELFNN_R_TYPE (elf_reloc->r_info)); -} - -#define PLT_HEADER_SIZE (3 * 16) -#define PLT_MIN_ENTRY_SIZE (1 * 16) -#define PLT_FULL_ENTRY_SIZE (2 * 16) -#define PLT_RESERVED_WORDS 3 - -static const bfd_byte plt_header[PLT_HEADER_SIZE] = -{ - 0x0b, 0x10, 0x00, 0x1c, 0x00, 0x21, /* [MMI] mov r2=r14;; */ - 0xe0, 0x00, 0x08, 0x00, 0x48, 0x00, /* addl r14=0,r2 */ - 0x00, 0x00, 0x04, 0x00, /* nop.i 0x0;; */ - 0x0b, 0x80, 0x20, 0x1c, 0x18, 0x14, /* [MMI] ld8 r16=[r14],8;; */ - 0x10, 0x41, 0x38, 0x30, 0x28, 0x00, /* ld8 r17=[r14],8 */ - 0x00, 0x00, 0x04, 0x00, /* nop.i 0x0;; */ - 0x11, 0x08, 0x00, 0x1c, 0x18, 0x10, /* [MIB] ld8 r1=[r14] */ - 0x60, 0x88, 0x04, 0x80, 0x03, 0x00, /* mov b6=r17 */ - 0x60, 0x00, 0x80, 0x00 /* br.few b6;; */ -}; - -static const bfd_byte plt_min_entry[PLT_MIN_ENTRY_SIZE] = -{ - 0x11, 0x78, 0x00, 0x00, 0x00, 0x24, /* [MIB] mov r15=0 */ - 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, /* nop.i 0x0 */ - 0x00, 0x00, 0x00, 0x40 /* br.few 0 ;; */ -}; - -static const bfd_byte plt_full_entry[PLT_FULL_ENTRY_SIZE] = -{ - 0x0b, 0x78, 0x00, 0x02, 0x00, 0x24, /* [MMI] addl r15=0,r1;; */ - 0x00, 0x41, 0x3c, 0x70, 0x29, 0xc0, /* ld8.acq r16=[r15],8*/ - 0x01, 0x08, 0x00, 0x84, /* mov r14=r1;; */ - 0x11, 0x08, 0x00, 0x1e, 0x18, 0x10, /* [MIB] ld8 r1=[r15] */ - 0x60, 0x80, 0x04, 0x80, 0x03, 0x00, /* mov b6=r16 */ - 0x60, 0x00, 0x80, 0x00 /* br.few b6;; */ -}; - -#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" - -static const bfd_byte oor_brl[16] = -{ - 0x05, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */ - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* brl.sptk.few tgt;; */ - 0x00, 0x00, 0x00, 0xc0 -}; - -static const bfd_byte oor_ip[48] = -{ - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */ - 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, /* movl r15=0 */ - 0x01, 0x00, 0x00, 0x60, - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MII] nop.m 0 */ - 0x00, 0x01, 0x00, 0x60, 0x00, 0x00, /* mov r16=ip;; */ - 0xf2, 0x80, 0x00, 0x80, /* add r16=r15,r16;; */ - 0x11, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MIB] nop.m 0 */ - 0x60, 0x80, 0x04, 0x80, 0x03, 0x00, /* mov b6=r16 */ - 0x60, 0x00, 0x80, 0x00 /* br b6;; */ -}; - -static size_t oor_branch_size = sizeof (oor_brl); - -void -bfd_elfNN_ia64_after_parse (int itanium) -{ - oor_branch_size = itanium ? sizeof (oor_ip) : sizeof (oor_brl); -} - #define BTYPE_SHIFT 6 #define Y_SHIFT 26 #define X6_SHIFT 27 @@ -628,8 +377,8 @@ bfd_elfNN_ia64_after_parse (int itanium) #define IS_BR_CALL(i) \ (((i) & OPCODE_BITS) == (0x5LL << OPCODE_SHIFT)) -static bfd_boolean -elfNN_ia64_relax_br (bfd_byte *contents, bfd_vma off) +bfd_boolean +ia64_elf_relax_br (bfd_byte *contents, bfd_vma off) { unsigned int template_val, mlx; bfd_vma t0, t1, s0, s1, s2, br_code; @@ -731,8 +480,8 @@ elfNN_ia64_relax_br (bfd_byte *contents, bfd_vma off) return TRUE; } -static void -elfNN_ia64_relax_brl (bfd_byte *contents, bfd_vma off) +void +ia64_elf_relax_brl (bfd_byte *contents, bfd_vma off) { int template_val; bfd_byte *hit_addr; @@ -763,601 +512,8 @@ elfNN_ia64_relax_brl (bfd_byte *contents, bfd_vma off) bfd_putl64 (t1, hit_addr + 8); } -/* Rename some of the generic section flags to better document how they - are used here. */ -#define skip_relax_pass_0 sec_flg0 -#define skip_relax_pass_1 sec_flg1 - - -/* These functions do relaxation for IA-64 ELF. */ - -static void -elfNN_ia64_update_short_info (asection *sec, bfd_vma offset, - struct elfNN_ia64_link_hash_table *ia64_info) -{ - /* Skip ABS and SHF_IA_64_SHORT sections. */ - if (sec == bfd_abs_section_ptr - || (sec->flags & SEC_SMALL_DATA) != 0) - return; - - if (!ia64_info->min_short_sec) - { - ia64_info->max_short_sec = sec; - ia64_info->max_short_offset = offset; - ia64_info->min_short_sec = sec; - ia64_info->min_short_offset = offset; - } - else if (sec == ia64_info->max_short_sec - && offset > ia64_info->max_short_offset) - ia64_info->max_short_offset = offset; - else if (sec == ia64_info->min_short_sec - && offset < ia64_info->min_short_offset) - ia64_info->min_short_offset = offset; - else if (sec->output_section->vma - > ia64_info->max_short_sec->vma) - { - ia64_info->max_short_sec = sec; - ia64_info->max_short_offset = offset; - } - else if (sec->output_section->vma - < ia64_info->min_short_sec->vma) - { - ia64_info->min_short_sec = sec; - ia64_info->min_short_offset = offset; - } -} - -static bfd_boolean -elfNN_ia64_relax_section (bfd *abfd, asection *sec, - struct bfd_link_info *link_info, - bfd_boolean *again) -{ - struct one_fixup - { - struct one_fixup *next; - asection *tsec; - bfd_vma toff; - bfd_vma trampoff; - }; - - Elf_Internal_Shdr *symtab_hdr; - Elf_Internal_Rela *internal_relocs; - Elf_Internal_Rela *irel, *irelend; - bfd_byte *contents; - Elf_Internal_Sym *isymbuf = NULL; - struct elfNN_ia64_link_hash_table *ia64_info; - struct one_fixup *fixups = NULL; - bfd_boolean changed_contents = FALSE; - bfd_boolean changed_relocs = FALSE; - bfd_boolean changed_got = FALSE; - bfd_boolean skip_relax_pass_0 = TRUE; - bfd_boolean skip_relax_pass_1 = TRUE; - bfd_vma gp = 0; - - /* Assume we're not going to change any sizes, and we'll only need - one pass. */ - *again = FALSE; - - if (link_info->relocatable) - (*link_info->callbacks->einfo) - (_("%P%F: --relax and -r may not be used together\n")); - - /* Don't even try to relax for non-ELF outputs. */ - if (!is_elf_hash_table (link_info->hash)) - return FALSE; - - /* Nothing to do if there are no relocations or there is no need for - the current pass. */ - if ((sec->flags & SEC_RELOC) == 0 - || sec->reloc_count == 0 - || (link_info->relax_pass == 0 && sec->skip_relax_pass_0) - || (link_info->relax_pass == 1 && sec->skip_relax_pass_1)) - return TRUE; - - ia64_info = elfNN_ia64_hash_table (link_info); - if (ia64_info == NULL) - return FALSE; - - symtab_hdr = &elf_tdata (abfd)->symtab_hdr; - - /* Load the relocations for this section. */ - internal_relocs = (_bfd_elf_link_read_relocs - (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, - link_info->keep_memory)); - if (internal_relocs == NULL) - return FALSE; - - irelend = internal_relocs + sec->reloc_count; - - /* Get the section contents. */ - if (elf_section_data (sec)->this_hdr.contents != NULL) - contents = elf_section_data (sec)->this_hdr.contents; - else - { - if (!bfd_malloc_and_get_section (abfd, sec, &contents)) - goto error_return; - } - - for (irel = internal_relocs; irel < irelend; irel++) - { - unsigned long r_type = ELFNN_R_TYPE (irel->r_info); - bfd_vma symaddr, reladdr, trampoff, toff, roff; - asection *tsec; - struct one_fixup *f; - bfd_size_type amt; - bfd_boolean is_branch; - struct elfNN_ia64_dyn_sym_info *dyn_i; - char symtype; - - switch (r_type) - { - case R_IA64_PCREL21B: - case R_IA64_PCREL21BI: - case R_IA64_PCREL21M: - case R_IA64_PCREL21F: - /* In pass 1, all br relaxations are done. We can skip it. */ - if (link_info->relax_pass == 1) - continue; - skip_relax_pass_0 = FALSE; - is_branch = TRUE; - break; - - case R_IA64_PCREL60B: - /* We can't optimize brl to br in pass 0 since br relaxations - will increase the code size. Defer it to pass 1. */ - if (link_info->relax_pass == 0) - { - skip_relax_pass_1 = FALSE; - continue; - } - is_branch = TRUE; - break; - - case R_IA64_GPREL22: - /* Update max_short_sec/min_short_sec. */ - - case R_IA64_LTOFF22X: - case R_IA64_LDXMOV: - /* We can't relax ldx/mov in pass 0 since br relaxations will - increase the code size. Defer it to pass 1. */ - if (link_info->relax_pass == 0) - { - skip_relax_pass_1 = FALSE; - continue; - } - is_branch = FALSE; - break; - - default: - continue; - } - - /* Get the value of the symbol referred to by the reloc. */ - if (ELFNN_R_SYM (irel->r_info) < symtab_hdr->sh_info) - { - /* A local symbol. */ - Elf_Internal_Sym *isym; - - /* Read this BFD's local symbols. */ - if (isymbuf == NULL) - { - isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; - if (isymbuf == NULL) - isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, - symtab_hdr->sh_info, 0, - NULL, NULL, NULL); - if (isymbuf == 0) - goto error_return; - } - - isym = isymbuf + ELFNN_R_SYM (irel->r_info); - if (isym->st_shndx == SHN_UNDEF) - continue; /* We can't do anything with undefined symbols. */ - else if (isym->st_shndx == SHN_ABS) - tsec = bfd_abs_section_ptr; - else if (isym->st_shndx == SHN_COMMON) - tsec = bfd_com_section_ptr; - else if (isym->st_shndx == SHN_IA_64_ANSI_COMMON) - tsec = bfd_com_section_ptr; - else - tsec = bfd_section_from_elf_index (abfd, isym->st_shndx); - - toff = isym->st_value; - dyn_i = get_dyn_sym_info (ia64_info, NULL, abfd, irel, FALSE); - symtype = ELF_ST_TYPE (isym->st_info); - } - else - { - unsigned long indx; - struct elf_link_hash_entry *h; - - indx = ELFNN_R_SYM (irel->r_info) - symtab_hdr->sh_info; - h = elf_sym_hashes (abfd)[indx]; - BFD_ASSERT (h != NULL); - - while (h->root.type == bfd_link_hash_indirect - || h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - - dyn_i = get_dyn_sym_info (ia64_info, h, abfd, irel, FALSE); - - /* For branches to dynamic symbols, we're interested instead - in a branch to the PLT entry. */ - if (is_branch && dyn_i && dyn_i->want_plt2) - { - /* Internal branches shouldn't be sent to the PLT. - Leave this for now and we'll give an error later. */ - if (r_type != R_IA64_PCREL21B) - continue; - - tsec = ia64_info->root.splt; - toff = dyn_i->plt2_offset; - BFD_ASSERT (irel->r_addend == 0); - } - - /* Can't do anything else with dynamic symbols. */ - else if (elfNN_ia64_dynamic_symbol_p (h, link_info, r_type)) - continue; - - else - { - /* We can't do anything with undefined symbols. */ - if (h->root.type == bfd_link_hash_undefined - || h->root.type == bfd_link_hash_undefweak) - continue; - - tsec = h->root.u.def.section; - toff = h->root.u.def.value; - } - - symtype = h->type; - } - - if (tsec->sec_info_type == ELF_INFO_TYPE_MERGE) - { - /* At this stage in linking, no SEC_MERGE symbol has been - adjusted, so all references to such symbols need to be - passed through _bfd_merged_section_offset. (Later, in - relocate_section, all SEC_MERGE symbols *except* for - section symbols have been adjusted.) - - gas may reduce relocations against symbols in SEC_MERGE - sections to a relocation against the section symbol when - the original addend was zero. When the reloc is against - a section symbol we should include the addend in the - offset passed to _bfd_merged_section_offset, since the - location of interest is the original symbol. On the - other hand, an access to "sym+addend" where "sym" is not - a section symbol should not include the addend; Such an - access is presumed to be an offset from "sym"; The - location of interest is just "sym". */ - if (symtype == STT_SECTION) - toff += irel->r_addend; - - toff = _bfd_merged_section_offset (abfd, &tsec, - elf_section_data (tsec)->sec_info, - toff); - - if (symtype != STT_SECTION) - toff += irel->r_addend; - } - else - toff += irel->r_addend; - - symaddr = tsec->output_section->vma + tsec->output_offset + toff; - - roff = irel->r_offset; - - if (is_branch) - { - bfd_signed_vma offset; - - reladdr = (sec->output_section->vma - + sec->output_offset - + roff) & (bfd_vma) -4; - - /* The .plt section is aligned at 32byte and the .text section - is aligned at 64byte. The .text section is right after the - .plt section. After the first relaxation pass, linker may - increase the gap between the .plt and .text sections up - to 32byte. We assume linker will always insert 32byte - between the .plt and .text sections after the the first - relaxation pass. */ - if (tsec == ia64_info->root.splt) - offset = -0x1000000 + 32; - else - offset = -0x1000000; - - /* If the branch is in range, no need to do anything. */ - if ((bfd_signed_vma) (symaddr - reladdr) >= offset - && (bfd_signed_vma) (symaddr - reladdr) <= 0x0FFFFF0) - { - /* If the 60-bit branch is in 21-bit range, optimize it. */ - if (r_type == R_IA64_PCREL60B) - { - elfNN_ia64_relax_brl (contents, roff); - - irel->r_info - = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), - R_IA64_PCREL21B); - - /* If the original relocation offset points to slot - 1, change it to slot 2. */ - if ((irel->r_offset & 3) == 1) - irel->r_offset += 1; - } - - continue; - } - else if (r_type == R_IA64_PCREL60B) - continue; - else if (elfNN_ia64_relax_br (contents, roff)) - { - irel->r_info - = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), - R_IA64_PCREL60B); - - /* Make the relocation offset point to slot 1. */ - irel->r_offset = (irel->r_offset & ~((bfd_vma) 0x3)) + 1; - continue; - } - - /* We can't put a trampoline in a .init/.fini section. Issue - an error. */ - if (strcmp (sec->output_section->name, ".init") == 0 - || strcmp (sec->output_section->name, ".fini") == 0) - { - (*_bfd_error_handler) - (_("%B: Can't relax br at 0x%lx in section `%A'. Please use brl or indirect branch."), - sec->owner, sec, (unsigned long) roff); - bfd_set_error (bfd_error_bad_value); - goto error_return; - } - - /* If the branch and target are in the same section, you've - got one honking big section and we can't help you unless - you are branching backwards. You'll get an error message - later. */ - if (tsec == sec && toff > roff) - continue; - - /* Look for an existing fixup to this address. */ - for (f = fixups; f ; f = f->next) - if (f->tsec == tsec && f->toff == toff) - break; - - if (f == NULL) - { - /* Two alternatives: If it's a branch to a PLT entry, we can - make a copy of the FULL_PLT entry. Otherwise, we'll have - to use a `brl' insn to get where we're going. */ - - size_t size; - - if (tsec == ia64_info->root.splt) - size = sizeof (plt_full_entry); - else - size = oor_branch_size; - - /* Resize the current section to make room for the new branch. */ - trampoff = (sec->size + 15) & (bfd_vma) -16; - - /* If trampoline is out of range, there is nothing we - can do. */ - offset = trampoff - (roff & (bfd_vma) -4); - if (offset < -0x1000000 || offset > 0x0FFFFF0) - continue; - - amt = trampoff + size; - contents = (bfd_byte *) bfd_realloc (contents, amt); - if (contents == NULL) - goto error_return; - sec->size = amt; - - if (tsec == ia64_info->root.splt) - { - memcpy (contents + trampoff, plt_full_entry, size); - - /* Hijack the old relocation for use as the PLTOFF reloc. */ - irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), - R_IA64_PLTOFF22); - irel->r_offset = trampoff; - } - else - { - if (size == sizeof (oor_ip)) - { - memcpy (contents + trampoff, oor_ip, size); - irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), - R_IA64_PCREL64I); - irel->r_addend -= 16; - irel->r_offset = trampoff + 2; - } - else - { - memcpy (contents + trampoff, oor_brl, size); - irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), - R_IA64_PCREL60B); - irel->r_offset = trampoff + 2; - } - - } - - /* Record the fixup so we don't do it again this section. */ - f = (struct one_fixup *) - bfd_malloc ((bfd_size_type) sizeof (*f)); - f->next = fixups; - f->tsec = tsec; - f->toff = toff; - f->trampoff = trampoff; - fixups = f; - } - else - { - /* If trampoline is out of range, there is nothing we - can do. */ - offset = f->trampoff - (roff & (bfd_vma) -4); - if (offset < -0x1000000 || offset > 0x0FFFFF0) - continue; - - /* Nop out the reloc, since we're finalizing things here. */ - irel->r_info = ELFNN_R_INFO (0, R_IA64_NONE); - } - - /* Fix up the existing branch to hit the trampoline. */ - if (elfNN_ia64_install_value (contents + roff, offset, r_type) - != bfd_reloc_ok) - goto error_return; - - changed_contents = TRUE; - changed_relocs = TRUE; - } - else - { - /* Fetch the gp. */ - if (gp == 0) - { - bfd *obfd = sec->output_section->owner; - gp = _bfd_get_gp_value (obfd); - if (gp == 0) - { - if (!elfNN_ia64_choose_gp (obfd, link_info, FALSE)) - goto error_return; - gp = _bfd_get_gp_value (obfd); - } - } - - /* If the data is out of range, do nothing. */ - if ((bfd_signed_vma) (symaddr - gp) >= 0x200000 - ||(bfd_signed_vma) (symaddr - gp) < -0x200000) - continue; - - if (r_type == R_IA64_GPREL22) - elfNN_ia64_update_short_info (tsec->output_section, - tsec->output_offset + toff, - ia64_info); - else if (r_type == R_IA64_LTOFF22X) - { - irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info), - R_IA64_GPREL22); - changed_relocs = TRUE; - if (dyn_i->want_gotx) - { - dyn_i->want_gotx = 0; - changed_got |= !dyn_i->want_got; - } - - elfNN_ia64_update_short_info (tsec->output_section, - tsec->output_offset + toff, - ia64_info); - } - else - { - elfNN_ia64_relax_ldxmov (contents, roff); - irel->r_info = ELFNN_R_INFO (0, R_IA64_NONE); - changed_contents = TRUE; - changed_relocs = TRUE; - } - } - } - - /* ??? If we created fixups, this may push the code segment large - enough that the data segment moves, which will change the GP. - Reset the GP so that we re-calculate next round. We need to - do this at the _beginning_ of the next round; now will not do. */ - - /* Clean up and go home. */ - while (fixups) - { - struct one_fixup *f = fixups; - fixups = fixups->next; - free (f); - } - - if (isymbuf != NULL - && symtab_hdr->contents != (unsigned char *) isymbuf) - { - if (! link_info->keep_memory) - free (isymbuf); - else - { - /* Cache the symbols for elf_link_input_bfd. */ - symtab_hdr->contents = (unsigned char *) isymbuf; - } - } - - if (contents != NULL - && elf_section_data (sec)->this_hdr.contents != contents) - { - if (!changed_contents && !link_info->keep_memory) - free (contents); - else - { - /* Cache the section contents for elf_link_input_bfd. */ - elf_section_data (sec)->this_hdr.contents = contents; - } - } - - if (elf_section_data (sec)->relocs != internal_relocs) - { - if (!changed_relocs) - free (internal_relocs); - else - elf_section_data (sec)->relocs = internal_relocs; - } - - if (changed_got) - { - struct elfNN_ia64_allocate_data data; - data.info = link_info; - data.ofs = 0; - ia64_info->self_dtpmod_offset = (bfd_vma) -1; - - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_global_data_got, &data); - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_global_fptr_got, &data); - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_local_got, &data); - ia64_info->root.sgot->size = data.ofs; - - if (ia64_info->root.dynamic_sections_created - && ia64_info->root.srelgot != NULL) - { - /* Resize .rela.got. */ - ia64_info->root.srelgot->size = 0; - if (link_info->shared - && ia64_info->self_dtpmod_offset != (bfd_vma) -1) - ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); - data.only_got = TRUE; - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_dynrel_entries, - &data); - } - } - - if (link_info->relax_pass == 0) - { - /* Pass 0 is only needed to relax br. */ - sec->skip_relax_pass_0 = skip_relax_pass_0; - sec->skip_relax_pass_1 = skip_relax_pass_1; - } - - *again = changed_contents || changed_relocs; - return TRUE; - - error_return: - if (isymbuf != NULL && (unsigned char *) isymbuf != symtab_hdr->contents) - free (isymbuf); - if (contents != NULL - && elf_section_data (sec)->this_hdr.contents != contents) - free (contents); - if (internal_relocs != NULL - && elf_section_data (sec)->relocs != internal_relocs) - free (internal_relocs); - return FALSE; -} -#undef skip_relax_pass_0 -#undef skip_relax_pass_1 - -static void -elfNN_ia64_relax_ldxmov (bfd_byte *contents, bfd_vma off) +void +ia64_elf_relax_ldxmov (bfd_byte *contents, bfd_vma off) { int shift, r1, r3; bfd_vma dword, insn; @@ -1386,4814 +542,224 @@ elfNN_ia64_relax_ldxmov (bfd_byte *contents, bfd_vma off) bfd_putl64 (dword, contents + off); } -/* Return TRUE if NAME is an unwind table section name. */ - -static inline bfd_boolean -is_unwind_section_name (bfd *abfd, const char *name) +bfd_reloc_status_type +ia64_elf_install_value (bfd_byte *hit_addr, bfd_vma v, unsigned int r_type) { - if (elfNN_ia64_hpux_vec (abfd->xvec) - && !strcmp (name, ELF_STRING_ia64_unwind_hdr)) - return FALSE; + const struct ia64_operand *op; + int bigendian = 0, shift = 0; + bfd_vma t0, t1, dword; + ia64_insn insn; + enum ia64_opnd opnd; + const char *err; + size_t size = 8; +#ifdef BFD_HOST_U_64_BIT + BFD_HOST_U_64_BIT val = (BFD_HOST_U_64_BIT) v; +#else + bfd_vma val = v; +#endif - return ((CONST_STRNEQ (name, ELF_STRING_ia64_unwind) - && ! CONST_STRNEQ (name, ELF_STRING_ia64_unwind_info)) - || CONST_STRNEQ (name, ELF_STRING_ia64_unwind_once)); -} + opnd = IA64_OPND_NIL; + switch (r_type) + { + case R_IA64_NONE: + case R_IA64_LDXMOV: + return bfd_reloc_ok; -/* Handle an IA-64 specific section when reading an object file. This - is called when bfd_section_from_shdr finds a section with an unknown - type. */ + /* Instruction relocations. */ -static bfd_boolean -elfNN_ia64_section_from_shdr (bfd *abfd, - Elf_Internal_Shdr *hdr, - const char *name, - int shindex) -{ - /* There ought to be a place to keep ELF backend specific flags, but - at the moment there isn't one. We just keep track of the - sections by their name, instead. Fortunately, the ABI gives - suggested names for all the MIPS specific sections, so we will - probably get away with this. */ - switch (hdr->sh_type) - { - case SHT_IA_64_UNWIND: - case SHT_IA_64_HP_OPT_ANOT: + case R_IA64_IMM14: + case R_IA64_TPREL14: + case R_IA64_DTPREL14: + opnd = IA64_OPND_IMM14; break; - case SHT_IA_64_EXT: - if (strcmp (name, ELF_STRING_ia64_archext) != 0) - return FALSE; + case R_IA64_PCREL21F: opnd = IA64_OPND_TGT25; break; + case R_IA64_PCREL21M: opnd = IA64_OPND_TGT25b; break; + case R_IA64_PCREL60B: opnd = IA64_OPND_TGT64; break; + case R_IA64_PCREL21B: + case R_IA64_PCREL21BI: + opnd = IA64_OPND_TGT25c; break; - default: - return FALSE; - } + case R_IA64_IMM22: + case R_IA64_GPREL22: + case R_IA64_LTOFF22: + case R_IA64_LTOFF22X: + case R_IA64_PLTOFF22: + case R_IA64_PCREL22: + case R_IA64_LTOFF_FPTR22: + case R_IA64_TPREL22: + case R_IA64_DTPREL22: + case R_IA64_LTOFF_TPREL22: + case R_IA64_LTOFF_DTPMOD22: + case R_IA64_LTOFF_DTPREL22: + opnd = IA64_OPND_IMM22; + break; - if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) - return FALSE; + case R_IA64_IMM64: + case R_IA64_GPREL64I: + case R_IA64_LTOFF64I: + case R_IA64_PLTOFF64I: + case R_IA64_PCREL64I: + case R_IA64_FPTR64I: + case R_IA64_LTOFF_FPTR64I: + case R_IA64_TPREL64I: + case R_IA64_DTPREL64I: + opnd = IA64_OPND_IMMU64; + break; - return TRUE; -} - -/* Convert IA-64 specific section flags to bfd internal section flags. */ - -/* ??? There is no bfd internal flag equivalent to the SHF_IA_64_NORECOV - flag. */ - -static bfd_boolean -elfNN_ia64_section_flags (flagword *flags, - const Elf_Internal_Shdr *hdr) -{ - if (hdr->sh_flags & SHF_IA_64_SHORT) - *flags |= SEC_SMALL_DATA; - - return TRUE; -} - -/* Set the correct type for an IA-64 ELF section. We do this by the - section name, which is a hack, but ought to work. */ - -static bfd_boolean -elfNN_ia64_fake_sections (bfd *abfd, Elf_Internal_Shdr *hdr, - asection *sec) -{ - const char *name; - - name = bfd_get_section_name (abfd, sec); - - if (is_unwind_section_name (abfd, name)) - { - /* We don't have the sections numbered at this point, so sh_info - is set later, in elfNN_ia64_final_write_processing. */ - hdr->sh_type = SHT_IA_64_UNWIND; - hdr->sh_flags |= SHF_LINK_ORDER; - } - else if (strcmp (name, ELF_STRING_ia64_archext) == 0) - hdr->sh_type = SHT_IA_64_EXT; - else if (strcmp (name, ".HP.opt_annot") == 0) - hdr->sh_type = SHT_IA_64_HP_OPT_ANOT; - else if (strcmp (name, ".reloc") == 0) - /* This is an ugly, but unfortunately necessary hack that is - needed when producing EFI binaries on IA-64. It tells - elf.c:elf_fake_sections() not to consider ".reloc" as a section - containing ELF relocation info. We need this hack in order to - be able to generate ELF binaries that can be translated into - EFI applications (which are essentially COFF objects). Those - files contain a COFF ".reloc" section inside an ELFNN object, - which would normally cause BFD to segfault because it would - attempt to interpret this section as containing relocation - entries for section "oc". With this hack enabled, ".reloc" - will be treated as a normal data section, which will avoid the - segfault. However, you won't be able to create an ELFNN binary - with a section named "oc" that needs relocations, but that's - the kind of ugly side-effects you get when detecting section - types based on their names... In practice, this limitation is - unlikely to bite. */ - hdr->sh_type = SHT_PROGBITS; - - if (sec->flags & SEC_SMALL_DATA) - hdr->sh_flags |= SHF_IA_64_SHORT; - - /* Some HP linkers look for the SHF_IA_64_HP_TLS flag instead of SHF_TLS. */ - - if (elfNN_ia64_hpux_vec (abfd->xvec) && (sec->flags & SHF_TLS)) - hdr->sh_flags |= SHF_IA_64_HP_TLS; - - return TRUE; -} - -/* The final processing done just before writing out an IA-64 ELF - object file. */ - -static void -elfNN_ia64_final_write_processing (bfd *abfd, - bfd_boolean linker ATTRIBUTE_UNUSED) -{ - Elf_Internal_Shdr *hdr; - asection *s; - - for (s = abfd->sections; s; s = s->next) - { - hdr = &elf_section_data (s)->this_hdr; - switch (hdr->sh_type) - { - case SHT_IA_64_UNWIND: - /* The IA-64 processor-specific ABI requires setting sh_link - to the unwind section, whereas HP-UX requires sh_info to - do so. For maximum compatibility, we'll set both for - now... */ - hdr->sh_info = hdr->sh_link; - break; - } - } - - if (! elf_flags_init (abfd)) - { - unsigned long flags = 0; - - if (abfd->xvec->byteorder == BFD_ENDIAN_BIG) - flags |= EF_IA_64_BE; - if (bfd_get_mach (abfd) == bfd_mach_ia64_elf64) - flags |= EF_IA_64_ABI64; - - elf_elfheader(abfd)->e_flags = flags; - elf_flags_init (abfd) = TRUE; - } -} - -/* Hook called by the linker routine which adds symbols from an object - file. We use it to put .comm items in .sbss, and not .bss. */ - -static bfd_boolean -elfNN_ia64_add_symbol_hook (bfd *abfd, - struct bfd_link_info *info, - Elf_Internal_Sym *sym, - const char **namep ATTRIBUTE_UNUSED, - flagword *flagsp ATTRIBUTE_UNUSED, - asection **secp, - bfd_vma *valp) -{ - if (sym->st_shndx == SHN_COMMON - && !info->relocatable - && sym->st_size <= elf_gp_size (abfd)) - { - /* Common symbols less than or equal to -G nn bytes are - automatically put into .sbss. */ - - asection *scomm = bfd_get_section_by_name (abfd, ".scommon"); - - if (scomm == NULL) - { - scomm = bfd_make_section_with_flags (abfd, ".scommon", - (SEC_ALLOC - | SEC_IS_COMMON - | SEC_LINKER_CREATED)); - if (scomm == NULL) - return FALSE; - } - - *secp = scomm; - *valp = sym->st_size; - } - - return TRUE; -} - -/* Return the number of additional phdrs we will need. */ - -static int -elfNN_ia64_additional_program_headers (bfd *abfd, - struct bfd_link_info *info ATTRIBUTE_UNUSED) -{ - asection *s; - int ret = 0; - - /* See if we need a PT_IA_64_ARCHEXT segment. */ - s = bfd_get_section_by_name (abfd, ELF_STRING_ia64_archext); - if (s && (s->flags & SEC_LOAD)) - ++ret; - - /* Count how many PT_IA_64_UNWIND segments we need. */ - for (s = abfd->sections; s; s = s->next) - if (is_unwind_section_name (abfd, s->name) && (s->flags & SEC_LOAD)) - ++ret; - - return ret; -} - -static bfd_boolean -elfNN_ia64_modify_segment_map (bfd *abfd, - struct bfd_link_info *info ATTRIBUTE_UNUSED) -{ - struct elf_segment_map *m, **pm; - Elf_Internal_Shdr *hdr; - asection *s; - - /* If we need a PT_IA_64_ARCHEXT segment, it must come before - all PT_LOAD segments. */ - s = bfd_get_section_by_name (abfd, ELF_STRING_ia64_archext); - if (s && (s->flags & SEC_LOAD)) - { - for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next) - if (m->p_type == PT_IA_64_ARCHEXT) - break; - if (m == NULL) - { - m = ((struct elf_segment_map *) - bfd_zalloc (abfd, (bfd_size_type) sizeof *m)); - if (m == NULL) - return FALSE; - - m->p_type = PT_IA_64_ARCHEXT; - m->count = 1; - m->sections[0] = s; - - /* We want to put it after the PHDR and INTERP segments. */ - pm = &elf_tdata (abfd)->segment_map; - while (*pm != NULL - && ((*pm)->p_type == PT_PHDR - || (*pm)->p_type == PT_INTERP)) - pm = &(*pm)->next; - - m->next = *pm; - *pm = m; - } - } - - /* Install PT_IA_64_UNWIND segments, if needed. */ - for (s = abfd->sections; s; s = s->next) - { - hdr = &elf_section_data (s)->this_hdr; - if (hdr->sh_type != SHT_IA_64_UNWIND) - continue; - - if (s && (s->flags & SEC_LOAD)) - { - for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next) - if (m->p_type == PT_IA_64_UNWIND) - { - int i; - - /* Look through all sections in the unwind segment - for a match since there may be multiple sections - to a segment. */ - for (i = m->count - 1; i >= 0; --i) - if (m->sections[i] == s) - break; - - if (i >= 0) - break; - } - - if (m == NULL) - { - m = ((struct elf_segment_map *) - bfd_zalloc (abfd, (bfd_size_type) sizeof *m)); - if (m == NULL) - return FALSE; - - m->p_type = PT_IA_64_UNWIND; - m->count = 1; - m->sections[0] = s; - m->next = NULL; - - /* We want to put it last. */ - pm = &elf_tdata (abfd)->segment_map; - while (*pm != NULL) - pm = &(*pm)->next; - *pm = m; - } - } - } - - return TRUE; -} - -/* Turn on PF_IA_64_NORECOV if needed. This involves traversing all of - the input sections for each output section in the segment and testing - for SHF_IA_64_NORECOV on each. */ - -static bfd_boolean -elfNN_ia64_modify_program_headers (bfd *abfd, - struct bfd_link_info *info ATTRIBUTE_UNUSED) -{ - struct elf_obj_tdata *tdata = elf_tdata (abfd); - struct elf_segment_map *m; - Elf_Internal_Phdr *p; - - for (p = tdata->phdr, m = tdata->segment_map; m != NULL; m = m->next, p++) - if (m->p_type == PT_LOAD) - { - int i; - for (i = m->count - 1; i >= 0; --i) - { - struct bfd_link_order *order = m->sections[i]->map_head.link_order; - - while (order != NULL) - { - if (order->type == bfd_indirect_link_order) - { - asection *is = order->u.indirect.section; - bfd_vma flags = elf_section_data(is)->this_hdr.sh_flags; - if (flags & SHF_IA_64_NORECOV) - { - p->p_flags |= PF_IA_64_NORECOV; - goto found; - } - } - order = order->next; - } - } - found:; - } - - return TRUE; -} - -/* According to the Tahoe assembler spec, all labels starting with a - '.' are local. */ - -static bfd_boolean -elfNN_ia64_is_local_label_name (bfd *abfd ATTRIBUTE_UNUSED, - const char *name) -{ - return name[0] == '.'; -} - -/* Should we do dynamic things to this symbol? */ - -static bfd_boolean -elfNN_ia64_dynamic_symbol_p (struct elf_link_hash_entry *h, - struct bfd_link_info *info, int r_type) -{ - bfd_boolean ignore_protected - = ((r_type & 0xf8) == 0x40 /* FPTR relocs */ - || (r_type & 0xf8) == 0x50); /* LTOFF_FPTR relocs */ - - return _bfd_elf_dynamic_symbol_p (h, info, ignore_protected); -} - -static struct bfd_hash_entry* -elfNN_ia64_new_elf_hash_entry (struct bfd_hash_entry *entry, - struct bfd_hash_table *table, - const char *string) -{ - struct elfNN_ia64_link_hash_entry *ret; - ret = (struct elfNN_ia64_link_hash_entry *) entry; - - /* Allocate the structure if it has not already been allocated by a - subclass. */ - if (!ret) - ret = bfd_hash_allocate (table, sizeof (*ret)); - - if (!ret) - return 0; - - /* Call the allocation method of the superclass. */ - ret = ((struct elfNN_ia64_link_hash_entry *) - _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, - table, string)); - - ret->info = NULL; - ret->count = 0; - ret->sorted_count = 0; - ret->size = 0; - return (struct bfd_hash_entry *) ret; -} - -static void -elfNN_ia64_hash_copy_indirect (struct bfd_link_info *info, - struct elf_link_hash_entry *xdir, - struct elf_link_hash_entry *xind) -{ - struct elfNN_ia64_link_hash_entry *dir, *ind; - - dir = (struct elfNN_ia64_link_hash_entry *) xdir; - ind = (struct elfNN_ia64_link_hash_entry *) xind; - - /* Copy down any references that we may have already seen to the - symbol which just became indirect. */ - - dir->root.ref_dynamic |= ind->root.ref_dynamic; - dir->root.ref_regular |= ind->root.ref_regular; - dir->root.ref_regular_nonweak |= ind->root.ref_regular_nonweak; - dir->root.needs_plt |= ind->root.needs_plt; - - if (ind->root.root.type != bfd_link_hash_indirect) - return; - - /* Copy over the got and plt data. This would have been done - by check_relocs. */ - - if (ind->info != NULL) - { - struct elfNN_ia64_dyn_sym_info *dyn_i; - unsigned int count; - - if (dir->info) - free (dir->info); - - dir->info = ind->info; - dir->count = ind->count; - dir->sorted_count = ind->sorted_count; - dir->size = ind->size; - - ind->info = NULL; - ind->count = 0; - ind->sorted_count = 0; - ind->size = 0; - - /* Fix up the dyn_sym_info pointers to the global symbol. */ - for (count = dir->count, dyn_i = dir->info; - count != 0; - count--, dyn_i++) - dyn_i->h = &dir->root; - } - - /* Copy over the dynindx. */ - - if (ind->root.dynindx != -1) - { - if (dir->root.dynindx != -1) - _bfd_elf_strtab_delref (elf_hash_table (info)->dynstr, - dir->root.dynstr_index); - dir->root.dynindx = ind->root.dynindx; - dir->root.dynstr_index = ind->root.dynstr_index; - ind->root.dynindx = -1; - ind->root.dynstr_index = 0; - } -} - -static void -elfNN_ia64_hash_hide_symbol (struct bfd_link_info *info, - struct elf_link_hash_entry *xh, - bfd_boolean force_local) -{ - struct elfNN_ia64_link_hash_entry *h; - struct elfNN_ia64_dyn_sym_info *dyn_i; - unsigned int count; - - h = (struct elfNN_ia64_link_hash_entry *)xh; - - _bfd_elf_link_hash_hide_symbol (info, &h->root, force_local); - - for (count = h->count, dyn_i = h->info; - count != 0; - count--, dyn_i++) - { - dyn_i->want_plt2 = 0; - dyn_i->want_plt = 0; - } -} - -/* Compute a hash of a local hash entry. */ - -static hashval_t -elfNN_ia64_local_htab_hash (const void *ptr) -{ - struct elfNN_ia64_local_hash_entry *entry - = (struct elfNN_ia64_local_hash_entry *) ptr; - - return ELF_LOCAL_SYMBOL_HASH (entry->id, entry->r_sym); -} - -/* Compare local hash entries. */ - -static int -elfNN_ia64_local_htab_eq (const void *ptr1, const void *ptr2) -{ - struct elfNN_ia64_local_hash_entry *entry1 - = (struct elfNN_ia64_local_hash_entry *) ptr1; - struct elfNN_ia64_local_hash_entry *entry2 - = (struct elfNN_ia64_local_hash_entry *) ptr2; - - return entry1->id == entry2->id && entry1->r_sym == entry2->r_sym; -} - -/* Create the derived linker hash table. The IA-64 ELF port uses this - derived hash table to keep information specific to the IA-64 ElF - linker (without using static variables). */ - -static struct bfd_link_hash_table * -elfNN_ia64_hash_table_create (bfd *abfd) -{ - struct elfNN_ia64_link_hash_table *ret; - - ret = bfd_zmalloc ((bfd_size_type) sizeof (*ret)); - if (!ret) - return NULL; - - if (!_bfd_elf_link_hash_table_init (&ret->root, abfd, - elfNN_ia64_new_elf_hash_entry, - sizeof (struct elfNN_ia64_link_hash_entry), - IA64_ELF_DATA)) - { - free (ret); - return NULL; - } - - ret->loc_hash_table = htab_try_create (1024, elfNN_ia64_local_htab_hash, - elfNN_ia64_local_htab_eq, NULL); - ret->loc_hash_memory = objalloc_create (); - if (!ret->loc_hash_table || !ret->loc_hash_memory) - { - free (ret); - return NULL; - } - - return &ret->root.root; -} - -/* Free the global elfNN_ia64_dyn_sym_info array. */ - -static bfd_boolean -elfNN_ia64_global_dyn_info_free (void **xentry, - PTR unused ATTRIBUTE_UNUSED) -{ - struct elfNN_ia64_link_hash_entry *entry - = (struct elfNN_ia64_link_hash_entry *) xentry; - - if (entry->root.root.type == bfd_link_hash_warning) - entry = (struct elfNN_ia64_link_hash_entry *) entry->root.root.u.i.link; - - if (entry->info) - { - free (entry->info); - entry->info = NULL; - entry->count = 0; - entry->sorted_count = 0; - entry->size = 0; - } - - return TRUE; -} - -/* Free the local elfNN_ia64_dyn_sym_info array. */ - -static bfd_boolean -elfNN_ia64_local_dyn_info_free (void **slot, - PTR unused ATTRIBUTE_UNUSED) -{ - struct elfNN_ia64_local_hash_entry *entry - = (struct elfNN_ia64_local_hash_entry *) *slot; - - if (entry->info) - { - free (entry->info); - entry->info = NULL; - entry->count = 0; - entry->sorted_count = 0; - entry->size = 0; - } - - return TRUE; -} - -/* Destroy IA-64 linker hash table. */ - -static void -elfNN_ia64_hash_table_free (struct bfd_link_hash_table *hash) -{ - struct elfNN_ia64_link_hash_table *ia64_info - = (struct elfNN_ia64_link_hash_table *) hash; - if (ia64_info->loc_hash_table) - { - htab_traverse (ia64_info->loc_hash_table, - elfNN_ia64_local_dyn_info_free, NULL); - htab_delete (ia64_info->loc_hash_table); - } - if (ia64_info->loc_hash_memory) - objalloc_free ((struct objalloc *) ia64_info->loc_hash_memory); - elf_link_hash_traverse (&ia64_info->root, - elfNN_ia64_global_dyn_info_free, NULL); - _bfd_generic_link_hash_table_free (hash); -} - -/* Traverse both local and global hash tables. */ - -struct elfNN_ia64_dyn_sym_traverse_data -{ - bfd_boolean (*func) (struct elfNN_ia64_dyn_sym_info *, PTR); - PTR data; -}; - -static bfd_boolean -elfNN_ia64_global_dyn_sym_thunk (struct bfd_hash_entry *xentry, - PTR xdata) -{ - struct elfNN_ia64_link_hash_entry *entry - = (struct elfNN_ia64_link_hash_entry *) xentry; - struct elfNN_ia64_dyn_sym_traverse_data *data - = (struct elfNN_ia64_dyn_sym_traverse_data *) xdata; - struct elfNN_ia64_dyn_sym_info *dyn_i; - unsigned int count; - - if (entry->root.root.type == bfd_link_hash_warning) - entry = (struct elfNN_ia64_link_hash_entry *) entry->root.root.u.i.link; - - for (count = entry->count, dyn_i = entry->info; - count != 0; - count--, dyn_i++) - if (! (*data->func) (dyn_i, data->data)) - return FALSE; - return TRUE; -} - -static bfd_boolean -elfNN_ia64_local_dyn_sym_thunk (void **slot, PTR xdata) -{ - struct elfNN_ia64_local_hash_entry *entry - = (struct elfNN_ia64_local_hash_entry *) *slot; - struct elfNN_ia64_dyn_sym_traverse_data *data - = (struct elfNN_ia64_dyn_sym_traverse_data *) xdata; - struct elfNN_ia64_dyn_sym_info *dyn_i; - unsigned int count; - - for (count = entry->count, dyn_i = entry->info; - count != 0; - count--, dyn_i++) - if (! (*data->func) (dyn_i, data->data)) - return FALSE; - return TRUE; -} - -static void -elfNN_ia64_dyn_sym_traverse (struct elfNN_ia64_link_hash_table *ia64_info, - bfd_boolean (*func) (struct elfNN_ia64_dyn_sym_info *, PTR), - PTR data) -{ - struct elfNN_ia64_dyn_sym_traverse_data xdata; - - xdata.func = func; - xdata.data = data; - - elf_link_hash_traverse (&ia64_info->root, - elfNN_ia64_global_dyn_sym_thunk, &xdata); - htab_traverse (ia64_info->loc_hash_table, - elfNN_ia64_local_dyn_sym_thunk, &xdata); -} - -static bfd_boolean -elfNN_ia64_create_dynamic_sections (bfd *abfd, - struct bfd_link_info *info) -{ - struct elfNN_ia64_link_hash_table *ia64_info; - asection *s; - - if (! _bfd_elf_create_dynamic_sections (abfd, info)) - return FALSE; - - ia64_info = elfNN_ia64_hash_table (info); - if (ia64_info == NULL) - return FALSE; - - { - flagword flags = bfd_get_section_flags (abfd, ia64_info->root.sgot); - bfd_set_section_flags (abfd, ia64_info->root.sgot, - SEC_SMALL_DATA | flags); - /* The .got section is always aligned at 8 bytes. */ - bfd_set_section_alignment (abfd, ia64_info->root.sgot, 3); - } - - if (!get_pltoff (abfd, info, ia64_info)) - return FALSE; - - s = bfd_make_section_with_flags (abfd, ".rela.IA_64.pltoff", - (SEC_ALLOC | SEC_LOAD - | SEC_HAS_CONTENTS - | SEC_IN_MEMORY - | SEC_LINKER_CREATED - | SEC_READONLY)); - if (s == NULL - || !bfd_set_section_alignment (abfd, s, LOG_SECTION_ALIGN)) - return FALSE; - ia64_info->rel_pltoff_sec = s; - - return TRUE; -} - -/* Find and/or create a hash entry for local symbol. */ -static struct elfNN_ia64_local_hash_entry * -get_local_sym_hash (struct elfNN_ia64_link_hash_table *ia64_info, - bfd *abfd, const Elf_Internal_Rela *rel, - bfd_boolean create) -{ - struct elfNN_ia64_local_hash_entry e, *ret; - asection *sec = abfd->sections; - hashval_t h = ELF_LOCAL_SYMBOL_HASH (sec->id, - ELFNN_R_SYM (rel->r_info)); - void **slot; - - e.id = sec->id; - e.r_sym = ELFNN_R_SYM (rel->r_info); - slot = htab_find_slot_with_hash (ia64_info->loc_hash_table, &e, h, - create ? INSERT : NO_INSERT); - - if (!slot) - return NULL; - - if (*slot) - return (struct elfNN_ia64_local_hash_entry *) *slot; - - ret = (struct elfNN_ia64_local_hash_entry *) - objalloc_alloc ((struct objalloc *) ia64_info->loc_hash_memory, - sizeof (struct elfNN_ia64_local_hash_entry)); - if (ret) - { - memset (ret, 0, sizeof (*ret)); - ret->id = sec->id; - ret->r_sym = ELFNN_R_SYM (rel->r_info); - *slot = ret; - } - return ret; -} - -/* Used to sort elfNN_ia64_dyn_sym_info array. */ - -static int -addend_compare (const void *xp, const void *yp) -{ - const struct elfNN_ia64_dyn_sym_info *x - = (const struct elfNN_ia64_dyn_sym_info *) xp; - const struct elfNN_ia64_dyn_sym_info *y - = (const struct elfNN_ia64_dyn_sym_info *) yp; - - return x->addend < y->addend ? -1 : x->addend > y->addend ? 1 : 0; -} - -/* Sort elfNN_ia64_dyn_sym_info array and remove duplicates. */ - -static unsigned int -sort_dyn_sym_info (struct elfNN_ia64_dyn_sym_info *info, - unsigned int count) -{ - bfd_vma curr, prev, got_offset; - unsigned int i, kept, dupes, diff, dest, src, len; - - qsort (info, count, sizeof (*info), addend_compare); - - /* Find the first duplicate. */ - prev = info [0].addend; - got_offset = info [0].got_offset; - for (i = 1; i < count; i++) - { - curr = info [i].addend; - if (curr == prev) - { - /* For duplicates, make sure that GOT_OFFSET is valid. */ - if (got_offset == (bfd_vma) -1) - got_offset = info [i].got_offset; - break; - } - got_offset = info [i].got_offset; - prev = curr; - } - - /* We may move a block of elements to here. */ - dest = i++; - - /* Remove duplicates. */ - if (i < count) - { - while (i < count) - { - /* For duplicates, make sure that the kept one has a valid - got_offset. */ - kept = dest - 1; - if (got_offset != (bfd_vma) -1) - info [kept].got_offset = got_offset; - - curr = info [i].addend; - got_offset = info [i].got_offset; - - /* Move a block of elements whose first one is different from - the previous. */ - if (curr == prev) - { - for (src = i + 1; src < count; src++) - { - if (info [src].addend != curr) - break; - /* For duplicates, make sure that GOT_OFFSET is - valid. */ - if (got_offset == (bfd_vma) -1) - got_offset = info [src].got_offset; - } - - /* Make sure that the kept one has a valid got_offset. */ - if (got_offset != (bfd_vma) -1) - info [kept].got_offset = got_offset; - } - else - src = i; - - if (src >= count) - break; - - /* Find the next duplicate. SRC will be kept. */ - prev = info [src].addend; - got_offset = info [src].got_offset; - for (dupes = src + 1; dupes < count; dupes ++) - { - curr = info [dupes].addend; - if (curr == prev) - { - /* Make sure that got_offset is valid. */ - if (got_offset == (bfd_vma) -1) - got_offset = info [dupes].got_offset; - - /* For duplicates, make sure that the kept one has - a valid got_offset. */ - if (got_offset != (bfd_vma) -1) - info [dupes - 1].got_offset = got_offset; - break; - } - got_offset = info [dupes].got_offset; - prev = curr; - } - - /* How much to move. */ - len = dupes - src; - i = dupes + 1; - - if (len == 1 && dupes < count) - { - /* If we only move 1 element, we combine it with the next - one. There must be at least a duplicate. Find the - next different one. */ - for (diff = dupes + 1, src++; diff < count; diff++, src++) - { - if (info [diff].addend != curr) - break; - /* Make sure that got_offset is valid. */ - if (got_offset == (bfd_vma) -1) - got_offset = info [diff].got_offset; - } - - /* Makre sure that the last duplicated one has an valid - offset. */ - BFD_ASSERT (curr == prev); - if (got_offset != (bfd_vma) -1) - info [diff - 1].got_offset = got_offset; - - if (diff < count) - { - /* Find the next duplicate. Track the current valid - offset. */ - prev = info [diff].addend; - got_offset = info [diff].got_offset; - for (dupes = diff + 1; dupes < count; dupes ++) - { - curr = info [dupes].addend; - if (curr == prev) - { - /* For duplicates, make sure that GOT_OFFSET - is valid. */ - if (got_offset == (bfd_vma) -1) - got_offset = info [dupes].got_offset; - break; - } - got_offset = info [dupes].got_offset; - prev = curr; - diff++; - } - - len = diff - src + 1; - i = diff + 1; - } - } - - memmove (&info [dest], &info [src], len * sizeof (*info)); - - dest += len; - } - - count = dest; - } - else - { - /* When we get here, either there is no duplicate at all or - the only duplicate is the last element. */ - if (dest < count) - { - /* If the last element is a duplicate, make sure that the - kept one has a valid got_offset. We also update count. */ - if (got_offset != (bfd_vma) -1) - info [dest - 1].got_offset = got_offset; - count = dest; - } - } - - return count; -} - -/* Find and/or create a descriptor for dynamic symbol info. This will - vary based on global or local symbol, and the addend to the reloc. - - We don't sort when inserting. Also, we sort and eliminate - duplicates if there is an unsorted section. Typically, this will - only happen once, because we do all insertions before lookups. We - then use bsearch to do a lookup. This also allows lookups to be - fast. So we have fast insertion (O(log N) due to duplicate check), - fast lookup (O(log N)) and one sort (O(N log N) expected time). - Previously, all lookups were O(N) because of the use of the linked - list and also all insertions were O(N) because of the check for - duplicates. There are some complications here because the array - size grows occasionally, which may add an O(N) factor, but this - should be rare. Also, we free the excess array allocation, which - requires a copy which is O(N), but this only happens once. */ - -static struct elfNN_ia64_dyn_sym_info * -get_dyn_sym_info (struct elfNN_ia64_link_hash_table *ia64_info, - struct elf_link_hash_entry *h, bfd *abfd, - const Elf_Internal_Rela *rel, bfd_boolean create) -{ - struct elfNN_ia64_dyn_sym_info **info_p, *info, *dyn_i, key; - unsigned int *count_p, *sorted_count_p, *size_p; - unsigned int count, sorted_count, size; - bfd_vma addend = rel ? rel->r_addend : 0; - bfd_size_type amt; - - if (h) - { - struct elfNN_ia64_link_hash_entry *global_h; - - global_h = (struct elfNN_ia64_link_hash_entry *) h; - info_p = &global_h->info; - count_p = &global_h->count; - sorted_count_p = &global_h->sorted_count; - size_p = &global_h->size; - } - else - { - struct elfNN_ia64_local_hash_entry *loc_h; - - loc_h = get_local_sym_hash (ia64_info, abfd, rel, create); - if (!loc_h) - { - BFD_ASSERT (!create); - return NULL; - } - - info_p = &loc_h->info; - count_p = &loc_h->count; - sorted_count_p = &loc_h->sorted_count; - size_p = &loc_h->size; - } - - count = *count_p; - sorted_count = *sorted_count_p; - size = *size_p; - info = *info_p; - if (create) - { - /* When we create the array, we don't check for duplicates, - except in the previously sorted section if one exists, and - against the last inserted entry. This allows insertions to - be fast. */ - if (info) - { - if (sorted_count) - { - /* Try bsearch first on the sorted section. */ - key.addend = addend; - dyn_i = bsearch (&key, info, sorted_count, - sizeof (*info), addend_compare); - - if (dyn_i) - { - return dyn_i; - } - } - - /* Do a quick check for the last inserted entry. */ - dyn_i = info + count - 1; - if (dyn_i->addend == addend) - { - return dyn_i; - } - } - - if (size == 0) - { - /* It is the very first element. We create the array of size - 1. */ - size = 1; - amt = size * sizeof (*info); - info = bfd_malloc (amt); - } - else if (size <= count) - { - /* We double the array size every time when we reach the - size limit. */ - size += size; - amt = size * sizeof (*info); - info = bfd_realloc (info, amt); - } - else - goto has_space; - - if (info == NULL) - return NULL; - *size_p = size; - *info_p = info; - -has_space: - /* Append the new one to the array. */ - dyn_i = info + count; - memset (dyn_i, 0, sizeof (*dyn_i)); - dyn_i->got_offset = (bfd_vma) -1; - dyn_i->addend = addend; - - /* We increment count only since the new ones are unsorted and - may have duplicate. */ - (*count_p)++; - } - else - { - /* It is a lookup without insertion. Sort array if part of the - array isn't sorted. */ - if (count != sorted_count) - { - count = sort_dyn_sym_info (info, count); - *count_p = count; - *sorted_count_p = count; - } - - /* Free unused memory. */ - if (size != count) - { - amt = count * sizeof (*info); - info = bfd_malloc (amt); - if (info != NULL) - { - memcpy (info, *info_p, amt); - free (*info_p); - *size_p = count; - *info_p = info; - } - } - - key.addend = addend; - dyn_i = bsearch (&key, info, count, - sizeof (*info), addend_compare); - } - - return dyn_i; -} - -static asection * -get_got (bfd *abfd, struct bfd_link_info *info, - struct elfNN_ia64_link_hash_table *ia64_info) -{ - asection *got; - bfd *dynobj; - - got = ia64_info->root.sgot; - if (!got) - { - flagword flags; - - dynobj = ia64_info->root.dynobj; - if (!dynobj) - ia64_info->root.dynobj = dynobj = abfd; - if (!_bfd_elf_create_got_section (dynobj, info)) - return 0; - - got = ia64_info->root.sgot; - - /* The .got section is always aligned at 8 bytes. */ - if (!bfd_set_section_alignment (abfd, got, 3)) - return 0; - - flags = bfd_get_section_flags (abfd, got); - bfd_set_section_flags (abfd, got, SEC_SMALL_DATA | flags); - } - - return got; -} - -/* Create function descriptor section (.opd). This section is called .opd - because it contains "official procedure descriptors". The "official" - refers to the fact that these descriptors are used when taking the address - of a procedure, thus ensuring a unique address for each procedure. */ - -static asection * -get_fptr (bfd *abfd, struct bfd_link_info *info, - struct elfNN_ia64_link_hash_table *ia64_info) -{ - asection *fptr; - bfd *dynobj; - - fptr = ia64_info->fptr_sec; - if (!fptr) - { - dynobj = ia64_info->root.dynobj; - if (!dynobj) - ia64_info->root.dynobj = dynobj = abfd; - - fptr = bfd_make_section_with_flags (dynobj, ".opd", - (SEC_ALLOC - | SEC_LOAD - | SEC_HAS_CONTENTS - | SEC_IN_MEMORY - | (info->pie ? 0 : SEC_READONLY) - | SEC_LINKER_CREATED)); - if (!fptr - || !bfd_set_section_alignment (abfd, fptr, 4)) - { - BFD_ASSERT (0); - return NULL; - } - - ia64_info->fptr_sec = fptr; - - if (info->pie) - { - asection *fptr_rel; - fptr_rel = bfd_make_section_with_flags (dynobj, ".rela.opd", - (SEC_ALLOC | SEC_LOAD - | SEC_HAS_CONTENTS - | SEC_IN_MEMORY - | SEC_LINKER_CREATED - | SEC_READONLY)); - if (fptr_rel == NULL - || !bfd_set_section_alignment (abfd, fptr_rel, - LOG_SECTION_ALIGN)) - { - BFD_ASSERT (0); - return NULL; - } - - ia64_info->rel_fptr_sec = fptr_rel; - } - } - - return fptr; -} - -static asection * -get_pltoff (bfd *abfd, struct bfd_link_info *info ATTRIBUTE_UNUSED, - struct elfNN_ia64_link_hash_table *ia64_info) -{ - asection *pltoff; - bfd *dynobj; - - pltoff = ia64_info->pltoff_sec; - if (!pltoff) - { - dynobj = ia64_info->root.dynobj; - if (!dynobj) - ia64_info->root.dynobj = dynobj = abfd; - - pltoff = bfd_make_section_with_flags (dynobj, - ELF_STRING_ia64_pltoff, - (SEC_ALLOC - | SEC_LOAD - | SEC_HAS_CONTENTS - | SEC_IN_MEMORY - | SEC_SMALL_DATA - | SEC_LINKER_CREATED)); - if (!pltoff - || !bfd_set_section_alignment (abfd, pltoff, 4)) - { - BFD_ASSERT (0); - return NULL; - } - - ia64_info->pltoff_sec = pltoff; - } - - return pltoff; -} - -static asection * -get_reloc_section (bfd *abfd, - struct elfNN_ia64_link_hash_table *ia64_info, - asection *sec, bfd_boolean create) -{ - const char *srel_name; - asection *srel; - bfd *dynobj; - - srel_name = (bfd_elf_string_from_elf_section - (abfd, elf_elfheader(abfd)->e_shstrndx, - _bfd_elf_single_rel_hdr (sec)->sh_name)); - if (srel_name == NULL) - return NULL; - - dynobj = ia64_info->root.dynobj; - if (!dynobj) - ia64_info->root.dynobj = dynobj = abfd; - - srel = bfd_get_section_by_name (dynobj, srel_name); - if (srel == NULL && create) - { - srel = bfd_make_section_with_flags (dynobj, srel_name, - (SEC_ALLOC | SEC_LOAD - | SEC_HAS_CONTENTS - | SEC_IN_MEMORY - | SEC_LINKER_CREATED - | SEC_READONLY)); - if (srel == NULL - || !bfd_set_section_alignment (dynobj, srel, - LOG_SECTION_ALIGN)) - return NULL; - } - - return srel; -} - -static bfd_boolean -count_dyn_reloc (bfd *abfd, struct elfNN_ia64_dyn_sym_info *dyn_i, - asection *srel, int type, bfd_boolean reltext) -{ - struct elfNN_ia64_dyn_reloc_entry *rent; - - for (rent = dyn_i->reloc_entries; rent; rent = rent->next) - if (rent->srel == srel && rent->type == type) - break; - - if (!rent) - { - rent = ((struct elfNN_ia64_dyn_reloc_entry *) - bfd_alloc (abfd, (bfd_size_type) sizeof (*rent))); - if (!rent) - return FALSE; - - rent->next = dyn_i->reloc_entries; - rent->srel = srel; - rent->type = type; - rent->count = 0; - dyn_i->reloc_entries = rent; - } - rent->reltext = reltext; - rent->count++; - - return TRUE; -} - -static bfd_boolean -elfNN_ia64_check_relocs (bfd *abfd, struct bfd_link_info *info, - asection *sec, - const Elf_Internal_Rela *relocs) -{ - struct elfNN_ia64_link_hash_table *ia64_info; - const Elf_Internal_Rela *relend; - Elf_Internal_Shdr *symtab_hdr; - const Elf_Internal_Rela *rel; - asection *got, *fptr, *srel, *pltoff; - enum { - NEED_GOT = 1, - NEED_GOTX = 2, - NEED_FPTR = 4, - NEED_PLTOFF = 8, - NEED_MIN_PLT = 16, - NEED_FULL_PLT = 32, - NEED_DYNREL = 64, - NEED_LTOFF_FPTR = 128, - NEED_TPREL = 256, - NEED_DTPMOD = 512, - NEED_DTPREL = 1024 - }; - int need_entry; - struct elf_link_hash_entry *h; - unsigned long r_symndx; - bfd_boolean maybe_dynamic; - - if (info->relocatable) - return TRUE; - - symtab_hdr = &elf_tdata (abfd)->symtab_hdr; - ia64_info = elfNN_ia64_hash_table (info); - if (ia64_info == NULL) - return FALSE; - - got = fptr = srel = pltoff = NULL; - - relend = relocs + sec->reloc_count; - - /* We scan relocations first to create dynamic relocation arrays. We - modified get_dyn_sym_info to allow fast insertion and support fast - lookup in the next loop. */ - for (rel = relocs; rel < relend; ++rel) - { - r_symndx = ELFNN_R_SYM (rel->r_info); - if (r_symndx >= symtab_hdr->sh_info) - { - long indx = r_symndx - symtab_hdr->sh_info; - h = elf_sym_hashes (abfd)[indx]; - while (h->root.type == bfd_link_hash_indirect - || h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - } - else - h = NULL; - - /* We can only get preliminary data on whether a symbol is - locally or externally defined, as not all of the input files - have yet been processed. Do something with what we know, as - this may help reduce memory usage and processing time later. */ - maybe_dynamic = (h && ((!info->executable - && (!SYMBOLIC_BIND (info, h) - || info->unresolved_syms_in_shared_libs == RM_IGNORE)) - || !h->def_regular - || h->root.type == bfd_link_hash_defweak)); - - need_entry = 0; - switch (ELFNN_R_TYPE (rel->r_info)) - { - case R_IA64_TPREL64MSB: - case R_IA64_TPREL64LSB: - if (info->shared || maybe_dynamic) - need_entry = NEED_DYNREL; - break; - - case R_IA64_LTOFF_TPREL22: - need_entry = NEED_TPREL; - if (info->shared) - info->flags |= DF_STATIC_TLS; - break; - - case R_IA64_DTPREL32MSB: - case R_IA64_DTPREL32LSB: - case R_IA64_DTPREL64MSB: - case R_IA64_DTPREL64LSB: - if (info->shared || maybe_dynamic) - need_entry = NEED_DYNREL; - break; - - case R_IA64_LTOFF_DTPREL22: - need_entry = NEED_DTPREL; - break; - - case R_IA64_DTPMOD64MSB: - case R_IA64_DTPMOD64LSB: - if (info->shared || maybe_dynamic) - need_entry = NEED_DYNREL; - break; - - case R_IA64_LTOFF_DTPMOD22: - need_entry = NEED_DTPMOD; - break; - - case R_IA64_LTOFF_FPTR22: - case R_IA64_LTOFF_FPTR64I: - case R_IA64_LTOFF_FPTR32MSB: - case R_IA64_LTOFF_FPTR32LSB: - case R_IA64_LTOFF_FPTR64MSB: - case R_IA64_LTOFF_FPTR64LSB: - need_entry = NEED_FPTR | NEED_GOT | NEED_LTOFF_FPTR; - break; - - case R_IA64_FPTR64I: - case R_IA64_FPTR32MSB: - case R_IA64_FPTR32LSB: - case R_IA64_FPTR64MSB: - case R_IA64_FPTR64LSB: - if (info->shared || h) - need_entry = NEED_FPTR | NEED_DYNREL; - else - need_entry = NEED_FPTR; - break; - - case R_IA64_LTOFF22: - case R_IA64_LTOFF64I: - need_entry = NEED_GOT; - break; - - case R_IA64_LTOFF22X: - need_entry = NEED_GOTX; - break; - - case R_IA64_PLTOFF22: - case R_IA64_PLTOFF64I: - case R_IA64_PLTOFF64MSB: - case R_IA64_PLTOFF64LSB: - need_entry = NEED_PLTOFF; - if (h) - { - if (maybe_dynamic) - need_entry |= NEED_MIN_PLT; - } - else - { - (*info->callbacks->warning) - (info, _("@pltoff reloc against local symbol"), 0, - abfd, 0, (bfd_vma) 0); - } - break; - - case R_IA64_PCREL21B: - case R_IA64_PCREL60B: - /* Depending on where this symbol is defined, we may or may not - need a full plt entry. Only skip if we know we'll not need - the entry -- static or symbolic, and the symbol definition - has already been seen. */ - if (maybe_dynamic && rel->r_addend == 0) - need_entry = NEED_FULL_PLT; - break; - - case R_IA64_IMM14: - case R_IA64_IMM22: - case R_IA64_IMM64: - case R_IA64_DIR32MSB: - case R_IA64_DIR32LSB: - case R_IA64_DIR64MSB: - case R_IA64_DIR64LSB: - /* Shared objects will always need at least a REL relocation. */ - if (info->shared || maybe_dynamic) - need_entry = NEED_DYNREL; - break; - - case R_IA64_IPLTMSB: - case R_IA64_IPLTLSB: - /* Shared objects will always need at least a REL relocation. */ - if (info->shared || maybe_dynamic) - need_entry = NEED_DYNREL; - break; - - case R_IA64_PCREL22: - case R_IA64_PCREL64I: - case R_IA64_PCREL32MSB: - case R_IA64_PCREL32LSB: - case R_IA64_PCREL64MSB: - case R_IA64_PCREL64LSB: - if (maybe_dynamic) - need_entry = NEED_DYNREL; - break; - } - - if (!need_entry) - continue; - - if ((need_entry & NEED_FPTR) != 0 - && rel->r_addend) - { - (*info->callbacks->warning) - (info, _("non-zero addend in @fptr reloc"), 0, - abfd, 0, (bfd_vma) 0); - } - - if (get_dyn_sym_info (ia64_info, h, abfd, rel, TRUE) == NULL) - return FALSE; - } - - /* Now, we only do lookup without insertion, which is very fast - with the modified get_dyn_sym_info. */ - for (rel = relocs; rel < relend; ++rel) - { - struct elfNN_ia64_dyn_sym_info *dyn_i; - int dynrel_type = R_IA64_NONE; - - r_symndx = ELFNN_R_SYM (rel->r_info); - if (r_symndx >= symtab_hdr->sh_info) - { - /* We're dealing with a global symbol -- find its hash entry - and mark it as being referenced. */ - long indx = r_symndx - symtab_hdr->sh_info; - h = elf_sym_hashes (abfd)[indx]; - while (h->root.type == bfd_link_hash_indirect - || h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - - h->ref_regular = 1; - } - else - h = NULL; - - /* We can only get preliminary data on whether a symbol is - locally or externally defined, as not all of the input files - have yet been processed. Do something with what we know, as - this may help reduce memory usage and processing time later. */ - maybe_dynamic = (h && ((!info->executable - && (!SYMBOLIC_BIND (info, h) - || info->unresolved_syms_in_shared_libs == RM_IGNORE)) - || !h->def_regular - || h->root.type == bfd_link_hash_defweak)); - - need_entry = 0; - switch (ELFNN_R_TYPE (rel->r_info)) - { - case R_IA64_TPREL64MSB: - case R_IA64_TPREL64LSB: - if (info->shared || maybe_dynamic) - need_entry = NEED_DYNREL; - dynrel_type = R_IA64_TPREL64LSB; - if (info->shared) - info->flags |= DF_STATIC_TLS; - break; - - case R_IA64_LTOFF_TPREL22: - need_entry = NEED_TPREL; - if (info->shared) - info->flags |= DF_STATIC_TLS; - break; - - case R_IA64_DTPREL32MSB: - case R_IA64_DTPREL32LSB: - case R_IA64_DTPREL64MSB: - case R_IA64_DTPREL64LSB: - if (info->shared || maybe_dynamic) - need_entry = NEED_DYNREL; - dynrel_type = R_IA64_DTPRELNNLSB; - break; - - case R_IA64_LTOFF_DTPREL22: - need_entry = NEED_DTPREL; - break; - - case R_IA64_DTPMOD64MSB: - case R_IA64_DTPMOD64LSB: - if (info->shared || maybe_dynamic) - need_entry = NEED_DYNREL; - dynrel_type = R_IA64_DTPMOD64LSB; - break; - - case R_IA64_LTOFF_DTPMOD22: - need_entry = NEED_DTPMOD; - break; - - case R_IA64_LTOFF_FPTR22: - case R_IA64_LTOFF_FPTR64I: - case R_IA64_LTOFF_FPTR32MSB: - case R_IA64_LTOFF_FPTR32LSB: - case R_IA64_LTOFF_FPTR64MSB: - case R_IA64_LTOFF_FPTR64LSB: - need_entry = NEED_FPTR | NEED_GOT | NEED_LTOFF_FPTR; - break; - - case R_IA64_FPTR64I: - case R_IA64_FPTR32MSB: - case R_IA64_FPTR32LSB: - case R_IA64_FPTR64MSB: - case R_IA64_FPTR64LSB: - if (info->shared || h) - need_entry = NEED_FPTR | NEED_DYNREL; - else - need_entry = NEED_FPTR; - dynrel_type = R_IA64_FPTRNNLSB; - break; - - case R_IA64_LTOFF22: - case R_IA64_LTOFF64I: - need_entry = NEED_GOT; - break; - - case R_IA64_LTOFF22X: - need_entry = NEED_GOTX; - break; - - case R_IA64_PLTOFF22: - case R_IA64_PLTOFF64I: - case R_IA64_PLTOFF64MSB: - case R_IA64_PLTOFF64LSB: - need_entry = NEED_PLTOFF; - if (h) - { - if (maybe_dynamic) - need_entry |= NEED_MIN_PLT; - } - break; - - case R_IA64_PCREL21B: - case R_IA64_PCREL60B: - /* Depending on where this symbol is defined, we may or may not - need a full plt entry. Only skip if we know we'll not need - the entry -- static or symbolic, and the symbol definition - has already been seen. */ - if (maybe_dynamic && rel->r_addend == 0) - need_entry = NEED_FULL_PLT; - break; - - case R_IA64_IMM14: - case R_IA64_IMM22: - case R_IA64_IMM64: - case R_IA64_DIR32MSB: - case R_IA64_DIR32LSB: - case R_IA64_DIR64MSB: - case R_IA64_DIR64LSB: - /* Shared objects will always need at least a REL relocation. */ - if (info->shared || maybe_dynamic) - need_entry = NEED_DYNREL; - dynrel_type = R_IA64_DIRNNLSB; - break; - - case R_IA64_IPLTMSB: - case R_IA64_IPLTLSB: - /* Shared objects will always need at least a REL relocation. */ - if (info->shared || maybe_dynamic) - need_entry = NEED_DYNREL; - dynrel_type = R_IA64_IPLTLSB; - break; - - case R_IA64_PCREL22: - case R_IA64_PCREL64I: - case R_IA64_PCREL32MSB: - case R_IA64_PCREL32LSB: - case R_IA64_PCREL64MSB: - case R_IA64_PCREL64LSB: - if (maybe_dynamic) - need_entry = NEED_DYNREL; - dynrel_type = R_IA64_PCRELNNLSB; - break; - } - - if (!need_entry) - continue; - - dyn_i = get_dyn_sym_info (ia64_info, h, abfd, rel, FALSE); - - /* Record whether or not this is a local symbol. */ - dyn_i->h = h; - - /* Create what's needed. */ - if (need_entry & (NEED_GOT | NEED_GOTX | NEED_TPREL - | NEED_DTPMOD | NEED_DTPREL)) - { - if (!got) - { - got = get_got (abfd, info, ia64_info); - if (!got) - return FALSE; - } - if (need_entry & NEED_GOT) - dyn_i->want_got = 1; - if (need_entry & NEED_GOTX) - dyn_i->want_gotx = 1; - if (need_entry & NEED_TPREL) - dyn_i->want_tprel = 1; - if (need_entry & NEED_DTPMOD) - dyn_i->want_dtpmod = 1; - if (need_entry & NEED_DTPREL) - dyn_i->want_dtprel = 1; - } - if (need_entry & NEED_FPTR) - { - if (!fptr) - { - fptr = get_fptr (abfd, info, ia64_info); - if (!fptr) - return FALSE; - } - - /* FPTRs for shared libraries are allocated by the dynamic - linker. Make sure this local symbol will appear in the - dynamic symbol table. */ - if (!h && info->shared) - { - if (! (bfd_elf_link_record_local_dynamic_symbol - (info, abfd, (long) r_symndx))) - return FALSE; - } - - dyn_i->want_fptr = 1; - } - if (need_entry & NEED_LTOFF_FPTR) - dyn_i->want_ltoff_fptr = 1; - if (need_entry & (NEED_MIN_PLT | NEED_FULL_PLT)) - { - if (!ia64_info->root.dynobj) - ia64_info->root.dynobj = abfd; - h->needs_plt = 1; - dyn_i->want_plt = 1; - } - if (need_entry & NEED_FULL_PLT) - dyn_i->want_plt2 = 1; - if (need_entry & NEED_PLTOFF) - { - /* This is needed here, in case @pltoff is used in a non-shared - link. */ - if (!pltoff) - { - pltoff = get_pltoff (abfd, info, ia64_info); - if (!pltoff) - return FALSE; - } - - dyn_i->want_pltoff = 1; - } - if ((need_entry & NEED_DYNREL) && (sec->flags & SEC_ALLOC)) - { - if (!srel) - { - srel = get_reloc_section (abfd, ia64_info, sec, TRUE); - if (!srel) - return FALSE; - } - if (!count_dyn_reloc (abfd, dyn_i, srel, dynrel_type, - (sec->flags & SEC_READONLY) != 0)) - return FALSE; - } - } - - return TRUE; -} - -/* For cleanliness, and potentially faster dynamic loading, allocate - external GOT entries first. */ - -static bfd_boolean -allocate_global_data_got (struct elfNN_ia64_dyn_sym_info *dyn_i, - void * data) -{ - struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; - - if ((dyn_i->want_got || dyn_i->want_gotx) - && ! dyn_i->want_fptr - && elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info, 0)) - { - dyn_i->got_offset = x->ofs; - x->ofs += 8; - } - if (dyn_i->want_tprel) - { - dyn_i->tprel_offset = x->ofs; - x->ofs += 8; - } - if (dyn_i->want_dtpmod) - { - if (elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info, 0)) - { - dyn_i->dtpmod_offset = x->ofs; - x->ofs += 8; - } - else - { - struct elfNN_ia64_link_hash_table *ia64_info; - - ia64_info = elfNN_ia64_hash_table (x->info); - if (ia64_info == NULL) - return FALSE; - - if (ia64_info->self_dtpmod_offset == (bfd_vma) -1) - { - ia64_info->self_dtpmod_offset = x->ofs; - x->ofs += 8; - } - dyn_i->dtpmod_offset = ia64_info->self_dtpmod_offset; - } - } - if (dyn_i->want_dtprel) - { - dyn_i->dtprel_offset = x->ofs; - x->ofs += 8; - } - return TRUE; -} - -/* Next, allocate all the GOT entries used by LTOFF_FPTR relocs. */ - -static bfd_boolean -allocate_global_fptr_got (struct elfNN_ia64_dyn_sym_info *dyn_i, - void * data) -{ - struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; - - if (dyn_i->want_got - && dyn_i->want_fptr - && elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info, R_IA64_FPTRNNLSB)) - { - dyn_i->got_offset = x->ofs; - x->ofs += 8; - } - return TRUE; -} - -/* Lastly, allocate all the GOT entries for local data. */ - -static bfd_boolean -allocate_local_got (struct elfNN_ia64_dyn_sym_info *dyn_i, - PTR data) -{ - struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; - - if ((dyn_i->want_got || dyn_i->want_gotx) - && !elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info, 0)) - { - dyn_i->got_offset = x->ofs; - x->ofs += 8; - } - return TRUE; -} - -/* Search for the index of a global symbol in it's defining object file. */ - -static long -global_sym_index (struct elf_link_hash_entry *h) -{ - struct elf_link_hash_entry **p; - bfd *obj; - - BFD_ASSERT (h->root.type == bfd_link_hash_defined - || h->root.type == bfd_link_hash_defweak); - - obj = h->root.u.def.section->owner; - for (p = elf_sym_hashes (obj); *p != h; ++p) - continue; - - return p - elf_sym_hashes (obj) + elf_tdata (obj)->symtab_hdr.sh_info; -} - -/* Allocate function descriptors. We can do these for every function - in a main executable that is not exported. */ - -static bfd_boolean -allocate_fptr (struct elfNN_ia64_dyn_sym_info *dyn_i, PTR data) -{ - struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; - - if (dyn_i->want_fptr) - { - struct elf_link_hash_entry *h = dyn_i->h; - - if (h) - while (h->root.type == bfd_link_hash_indirect - || h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - - if (!x->info->executable - && (!h - || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT - || (h->root.type != bfd_link_hash_undefweak - && h->root.type != bfd_link_hash_undefined))) - { - if (h && h->dynindx == -1) - { - BFD_ASSERT ((h->root.type == bfd_link_hash_defined) - || (h->root.type == bfd_link_hash_defweak)); - - if (!bfd_elf_link_record_local_dynamic_symbol - (x->info, h->root.u.def.section->owner, - global_sym_index (h))) - return FALSE; - } - - dyn_i->want_fptr = 0; - } - else if (h == NULL || h->dynindx == -1) - { - dyn_i->fptr_offset = x->ofs; - x->ofs += 16; - } - else - dyn_i->want_fptr = 0; - } - return TRUE; -} - -/* Allocate all the minimal PLT entries. */ - -static bfd_boolean -allocate_plt_entries (struct elfNN_ia64_dyn_sym_info *dyn_i, - PTR data) -{ - struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; - - if (dyn_i->want_plt) - { - struct elf_link_hash_entry *h = dyn_i->h; - - if (h) - while (h->root.type == bfd_link_hash_indirect - || h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - - /* ??? Versioned symbols seem to lose NEEDS_PLT. */ - if (elfNN_ia64_dynamic_symbol_p (h, x->info, 0)) - { - bfd_size_type offset = x->ofs; - if (offset == 0) - offset = PLT_HEADER_SIZE; - dyn_i->plt_offset = offset; - x->ofs = offset + PLT_MIN_ENTRY_SIZE; - - dyn_i->want_pltoff = 1; - } - else - { - dyn_i->want_plt = 0; - dyn_i->want_plt2 = 0; - } - } - return TRUE; -} - -/* Allocate all the full PLT entries. */ - -static bfd_boolean -allocate_plt2_entries (struct elfNN_ia64_dyn_sym_info *dyn_i, - PTR data) -{ - struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; - - if (dyn_i->want_plt2) - { - struct elf_link_hash_entry *h = dyn_i->h; - bfd_size_type ofs = x->ofs; - - dyn_i->plt2_offset = ofs; - x->ofs = ofs + PLT_FULL_ENTRY_SIZE; - - while (h->root.type == bfd_link_hash_indirect - || h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - dyn_i->h->plt.offset = ofs; - } - return TRUE; -} - -/* Allocate all the PLTOFF entries requested by relocations and - plt entries. We can't share space with allocated FPTR entries, - because the latter are not necessarily addressable by the GP. - ??? Relaxation might be able to determine that they are. */ - -static bfd_boolean -allocate_pltoff_entries (struct elfNN_ia64_dyn_sym_info *dyn_i, - PTR data) -{ - struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; - - if (dyn_i->want_pltoff) - { - dyn_i->pltoff_offset = x->ofs; - x->ofs += 16; - } - return TRUE; -} - -/* Allocate dynamic relocations for those symbols that turned out - to be dynamic. */ - -static bfd_boolean -allocate_dynrel_entries (struct elfNN_ia64_dyn_sym_info *dyn_i, - PTR data) -{ - struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data; - struct elfNN_ia64_link_hash_table *ia64_info; - struct elfNN_ia64_dyn_reloc_entry *rent; - bfd_boolean dynamic_symbol, shared, resolved_zero; - - ia64_info = elfNN_ia64_hash_table (x->info); - if (ia64_info == NULL) - return FALSE; - - /* Note that this can't be used in relation to FPTR relocs below. */ - dynamic_symbol = elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info, 0); - - shared = x->info->shared; - resolved_zero = (dyn_i->h - && ELF_ST_VISIBILITY (dyn_i->h->other) - && dyn_i->h->root.type == bfd_link_hash_undefweak); - - /* Take care of the GOT and PLT relocations. */ - - if ((!resolved_zero - && (dynamic_symbol || shared) - && (dyn_i->want_got || dyn_i->want_gotx)) - || (dyn_i->want_ltoff_fptr - && dyn_i->h - && dyn_i->h->dynindx != -1)) - { - if (!dyn_i->want_ltoff_fptr - || !x->info->pie - || dyn_i->h == NULL - || dyn_i->h->root.type != bfd_link_hash_undefweak) - ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); - } - if ((dynamic_symbol || shared) && dyn_i->want_tprel) - ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); - if (dynamic_symbol && dyn_i->want_dtpmod) - ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); - if (dynamic_symbol && dyn_i->want_dtprel) - ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); - - if (x->only_got) - return TRUE; - - if (ia64_info->rel_fptr_sec && dyn_i->want_fptr) - { - if (dyn_i->h == NULL || dyn_i->h->root.type != bfd_link_hash_undefweak) - ia64_info->rel_fptr_sec->size += sizeof (ElfNN_External_Rela); - } - - if (!resolved_zero && dyn_i->want_pltoff) - { - bfd_size_type t = 0; - - /* Dynamic symbols get one IPLT relocation. Local symbols in - shared libraries get two REL relocations. Local symbols in - main applications get nothing. */ - if (dynamic_symbol) - t = sizeof (ElfNN_External_Rela); - else if (shared) - t = 2 * sizeof (ElfNN_External_Rela); - - ia64_info->rel_pltoff_sec->size += t; - } - - /* Take care of the normal data relocations. */ - - for (rent = dyn_i->reloc_entries; rent; rent = rent->next) - { - int count = rent->count; - - switch (rent->type) - { - case R_IA64_FPTR32LSB: - case R_IA64_FPTR64LSB: - /* Allocate one iff !want_fptr and not PIE, which by this point - will be true only if we're actually allocating one statically - in the main executable. Position independent executables - need a relative reloc. */ - if (dyn_i->want_fptr && !x->info->pie) - continue; - break; - case R_IA64_PCREL32LSB: - case R_IA64_PCREL64LSB: - if (!dynamic_symbol) - continue; - break; - case R_IA64_DIR32LSB: - case R_IA64_DIR64LSB: - if (!dynamic_symbol && !shared) - continue; - break; - case R_IA64_IPLTLSB: - if (!dynamic_symbol && !shared) - continue; - /* Use two REL relocations for IPLT relocations - against local symbols. */ - if (!dynamic_symbol) - count *= 2; - break; - case R_IA64_DTPREL32LSB: - case R_IA64_TPREL64LSB: - case R_IA64_DTPREL64LSB: - case R_IA64_DTPMOD64LSB: - break; - default: - abort (); - } - if (rent->reltext) - ia64_info->reltext = 1; - rent->srel->size += sizeof (ElfNN_External_Rela) * count; - } - - return TRUE; -} - -static bfd_boolean -elfNN_ia64_adjust_dynamic_symbol (struct bfd_link_info *info ATTRIBUTE_UNUSED, - struct elf_link_hash_entry *h) -{ - /* ??? Undefined symbols with PLT entries should be re-defined - to be the PLT entry. */ - - /* If this is a weak symbol, and there is a real definition, the - processor independent code will have arranged for us to see the - real definition first, and we can just use the same value. */ - if (h->u.weakdef != NULL) - { - BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined - || h->u.weakdef->root.type == bfd_link_hash_defweak); - h->root.u.def.section = h->u.weakdef->root.u.def.section; - h->root.u.def.value = h->u.weakdef->root.u.def.value; - return TRUE; - } - - /* If this is a reference to a symbol defined by a dynamic object which - is not a function, we might allocate the symbol in our .dynbss section - and allocate a COPY dynamic relocation. - - But IA-64 code is canonically PIC, so as a rule we can avoid this sort - of hackery. */ - - return TRUE; -} - -static bfd_boolean -elfNN_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, - struct bfd_link_info *info) -{ - struct elfNN_ia64_allocate_data data; - struct elfNN_ia64_link_hash_table *ia64_info; - asection *sec; - bfd *dynobj; - bfd_boolean relplt = FALSE; - - dynobj = elf_hash_table(info)->dynobj; - ia64_info = elfNN_ia64_hash_table (info); - if (ia64_info == NULL) - return FALSE; - ia64_info->self_dtpmod_offset = (bfd_vma) -1; - BFD_ASSERT(dynobj != NULL); - data.info = info; - - /* Set the contents of the .interp section to the interpreter. */ - if (ia64_info->root.dynamic_sections_created - && info->executable) - { - sec = bfd_get_section_by_name (dynobj, ".interp"); - BFD_ASSERT (sec != NULL); - sec->contents = (bfd_byte *) ELF_DYNAMIC_INTERPRETER; - sec->size = strlen (ELF_DYNAMIC_INTERPRETER) + 1; - } - - /* Allocate the GOT entries. */ - - if (ia64_info->root.sgot) - { - data.ofs = 0; - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_global_data_got, &data); - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_global_fptr_got, &data); - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_local_got, &data); - ia64_info->root.sgot->size = data.ofs; - } - - /* Allocate the FPTR entries. */ - - if (ia64_info->fptr_sec) - { - data.ofs = 0; - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_fptr, &data); - ia64_info->fptr_sec->size = data.ofs; - } - - /* Now that we've seen all of the input files, we can decide which - symbols need plt entries. Allocate the minimal PLT entries first. - We do this even though dynamic_sections_created may be FALSE, because - this has the side-effect of clearing want_plt and want_plt2. */ - - data.ofs = 0; - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_plt_entries, &data); - - ia64_info->minplt_entries = 0; - if (data.ofs) - { - ia64_info->minplt_entries - = (data.ofs - PLT_HEADER_SIZE) / PLT_MIN_ENTRY_SIZE; - } - - /* Align the pointer for the plt2 entries. */ - data.ofs = (data.ofs + 31) & (bfd_vma) -32; - - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_plt2_entries, &data); - if (data.ofs != 0 || ia64_info->root.dynamic_sections_created) - { - /* FIXME: we always reserve the memory for dynamic linker even if - there are no PLT entries since dynamic linker may assume the - reserved memory always exists. */ - - BFD_ASSERT (ia64_info->root.dynamic_sections_created); - - ia64_info->root.splt->size = data.ofs; - - /* If we've got a .plt, we need some extra memory for the dynamic - linker. We stuff these in .got.plt. */ - sec = bfd_get_section_by_name (dynobj, ".got.plt"); - sec->size = 8 * PLT_RESERVED_WORDS; - } - - /* Allocate the PLTOFF entries. */ - - if (ia64_info->pltoff_sec) - { - data.ofs = 0; - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_pltoff_entries, &data); - ia64_info->pltoff_sec->size = data.ofs; - } - - if (ia64_info->root.dynamic_sections_created) - { - /* Allocate space for the dynamic relocations that turned out to be - required. */ - - if (info->shared && ia64_info->self_dtpmod_offset != (bfd_vma) -1) - ia64_info->root.srelgot->size += sizeof (ElfNN_External_Rela); - data.only_got = FALSE; - elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_dynrel_entries, &data); - } - - /* We have now determined the sizes of the various dynamic sections. - Allocate memory for them. */ - for (sec = dynobj->sections; sec != NULL; sec = sec->next) - { - bfd_boolean strip; - - if (!(sec->flags & SEC_LINKER_CREATED)) - continue; - - /* If we don't need this section, strip it from the output file. - There were several sections primarily related to dynamic - linking that must be create before the linker maps input - sections to output sections. The linker does that before - bfd_elf_size_dynamic_sections is called, and it is that - function which decides whether anything needs to go into - these sections. */ - - strip = (sec->size == 0); - - if (sec == ia64_info->root.sgot) - strip = FALSE; - else if (sec == ia64_info->root.srelgot) - { - if (strip) - ia64_info->root.srelgot = NULL; - else - /* We use the reloc_count field as a counter if we need to - copy relocs into the output file. */ - sec->reloc_count = 0; - } - else if (sec == ia64_info->fptr_sec) - { - if (strip) - ia64_info->fptr_sec = NULL; - } - else if (sec == ia64_info->rel_fptr_sec) - { - if (strip) - ia64_info->rel_fptr_sec = NULL; - else - /* We use the reloc_count field as a counter if we need to - copy relocs into the output file. */ - sec->reloc_count = 0; - } - else if (sec == ia64_info->root.splt) - { - if (strip) - ia64_info->root.splt = NULL; - } - else if (sec == ia64_info->pltoff_sec) - { - if (strip) - ia64_info->pltoff_sec = NULL; - } - else if (sec == ia64_info->rel_pltoff_sec) - { - if (strip) - ia64_info->rel_pltoff_sec = NULL; - else - { - relplt = TRUE; - /* We use the reloc_count field as a counter if we need to - copy relocs into the output file. */ - sec->reloc_count = 0; - } - } - else - { - const char *name; - - /* It's OK to base decisions on the section name, because none - of the dynobj section names depend upon the input files. */ - name = bfd_get_section_name (dynobj, sec); - - if (strcmp (name, ".got.plt") == 0) - strip = FALSE; - else if (CONST_STRNEQ (name, ".rel")) - { - if (!strip) - { - /* We use the reloc_count field as a counter if we need to - copy relocs into the output file. */ - sec->reloc_count = 0; - } - } - else - continue; - } - - if (strip) - sec->flags |= SEC_EXCLUDE; - else - { - /* Allocate memory for the section contents. */ - sec->contents = (bfd_byte *) bfd_zalloc (dynobj, sec->size); - if (sec->contents == NULL && sec->size != 0) - return FALSE; - } - } - - if (elf_hash_table (info)->dynamic_sections_created) - { - /* Add some entries to the .dynamic section. We fill in the values - later (in finish_dynamic_sections) but we must add the entries now - so that we get the correct size for the .dynamic section. */ - - if (info->executable) - { - /* The DT_DEBUG entry is filled in by the dynamic linker and used - by the debugger. */ -#define add_dynamic_entry(TAG, VAL) \ - _bfd_elf_add_dynamic_entry (info, TAG, VAL) - - if (!add_dynamic_entry (DT_DEBUG, 0)) - return FALSE; - } - - if (!add_dynamic_entry (DT_IA_64_PLT_RESERVE, 0)) - return FALSE; - if (!add_dynamic_entry (DT_PLTGOT, 0)) - return FALSE; - - if (relplt) - { - if (!add_dynamic_entry (DT_PLTRELSZ, 0) - || !add_dynamic_entry (DT_PLTREL, DT_RELA) - || !add_dynamic_entry (DT_JMPREL, 0)) - return FALSE; - } - - if (!add_dynamic_entry (DT_RELA, 0) - || !add_dynamic_entry (DT_RELASZ, 0) - || !add_dynamic_entry (DT_RELAENT, sizeof (ElfNN_External_Rela))) - return FALSE; - - if (ia64_info->reltext) - { - if (!add_dynamic_entry (DT_TEXTREL, 0)) - return FALSE; - info->flags |= DF_TEXTREL; - } - } - - /* ??? Perhaps force __gp local. */ - - return TRUE; -} - -static bfd_reloc_status_type -elfNN_ia64_install_value (bfd_byte *hit_addr, bfd_vma v, - unsigned int r_type) -{ - const struct ia64_operand *op; - int bigendian = 0, shift = 0; - bfd_vma t0, t1, dword; - ia64_insn insn; - enum ia64_opnd opnd; - const char *err; - size_t size = 8; -#ifdef BFD_HOST_U_64_BIT - BFD_HOST_U_64_BIT val = (BFD_HOST_U_64_BIT) v; -#else - bfd_vma val = v; -#endif - - opnd = IA64_OPND_NIL; - switch (r_type) - { - case R_IA64_NONE: - case R_IA64_LDXMOV: - return bfd_reloc_ok; - - /* Instruction relocations. */ - - case R_IA64_IMM14: - case R_IA64_TPREL14: - case R_IA64_DTPREL14: - opnd = IA64_OPND_IMM14; - break; - - case R_IA64_PCREL21F: opnd = IA64_OPND_TGT25; break; - case R_IA64_PCREL21M: opnd = IA64_OPND_TGT25b; break; - case R_IA64_PCREL60B: opnd = IA64_OPND_TGT64; break; - case R_IA64_PCREL21B: - case R_IA64_PCREL21BI: - opnd = IA64_OPND_TGT25c; - break; - - case R_IA64_IMM22: - case R_IA64_GPREL22: - case R_IA64_LTOFF22: - case R_IA64_LTOFF22X: - case R_IA64_PLTOFF22: - case R_IA64_PCREL22: - case R_IA64_LTOFF_FPTR22: - case R_IA64_TPREL22: - case R_IA64_DTPREL22: - case R_IA64_LTOFF_TPREL22: - case R_IA64_LTOFF_DTPMOD22: - case R_IA64_LTOFF_DTPREL22: - opnd = IA64_OPND_IMM22; - break; - - case R_IA64_IMM64: - case R_IA64_GPREL64I: - case R_IA64_LTOFF64I: - case R_IA64_PLTOFF64I: - case R_IA64_PCREL64I: - case R_IA64_FPTR64I: - case R_IA64_LTOFF_FPTR64I: - case R_IA64_TPREL64I: - case R_IA64_DTPREL64I: - opnd = IA64_OPND_IMMU64; - break; - - /* Data relocations. */ - - case R_IA64_DIR32MSB: - case R_IA64_GPREL32MSB: - case R_IA64_FPTR32MSB: - case R_IA64_PCREL32MSB: - case R_IA64_LTOFF_FPTR32MSB: - case R_IA64_SEGREL32MSB: - case R_IA64_SECREL32MSB: - case R_IA64_LTV32MSB: - case R_IA64_DTPREL32MSB: - size = 4; bigendian = 1; - break; - - case R_IA64_DIR32LSB: - case R_IA64_GPREL32LSB: - case R_IA64_FPTR32LSB: - case R_IA64_PCREL32LSB: - case R_IA64_LTOFF_FPTR32LSB: - case R_IA64_SEGREL32LSB: - case R_IA64_SECREL32LSB: - case R_IA64_LTV32LSB: - case R_IA64_DTPREL32LSB: - size = 4; bigendian = 0; - break; - - case R_IA64_DIR64MSB: - case R_IA64_GPREL64MSB: - case R_IA64_PLTOFF64MSB: - case R_IA64_FPTR64MSB: - case R_IA64_PCREL64MSB: - case R_IA64_LTOFF_FPTR64MSB: - case R_IA64_SEGREL64MSB: - case R_IA64_SECREL64MSB: - case R_IA64_LTV64MSB: - case R_IA64_TPREL64MSB: - case R_IA64_DTPMOD64MSB: - case R_IA64_DTPREL64MSB: - size = 8; bigendian = 1; - break; - - case R_IA64_DIR64LSB: - case R_IA64_GPREL64LSB: - case R_IA64_PLTOFF64LSB: - case R_IA64_FPTR64LSB: - case R_IA64_PCREL64LSB: - case R_IA64_LTOFF_FPTR64LSB: - case R_IA64_SEGREL64LSB: - case R_IA64_SECREL64LSB: - case R_IA64_LTV64LSB: - case R_IA64_TPREL64LSB: - case R_IA64_DTPMOD64LSB: - case R_IA64_DTPREL64LSB: - size = 8; bigendian = 0; - break; - - /* Unsupported / Dynamic relocations. */ - default: - return bfd_reloc_notsupported; - } - - switch (opnd) - { - case IA64_OPND_IMMU64: - hit_addr -= (intptr_t) hit_addr & 0x3; - t0 = bfd_getl64 (hit_addr); - t1 = bfd_getl64 (hit_addr + 8); - - /* tmpl/s: bits 0.. 5 in t0 - slot 0: bits 5..45 in t0 - slot 1: bits 46..63 in t0, bits 0..22 in t1 - slot 2: bits 23..63 in t1 */ - - /* First, clear the bits that form the 64 bit constant. */ - t0 &= ~(0x3ffffLL << 46); - t1 &= ~(0x7fffffLL - | (( (0x07fLL << 13) | (0x1ffLL << 27) - | (0x01fLL << 22) | (0x001LL << 21) - | (0x001LL << 36)) << 23)); - - t0 |= ((val >> 22) & 0x03ffffLL) << 46; /* 18 lsbs of imm41 */ - t1 |= ((val >> 40) & 0x7fffffLL) << 0; /* 23 msbs of imm41 */ - t1 |= ( (((val >> 0) & 0x07f) << 13) /* imm7b */ - | (((val >> 7) & 0x1ff) << 27) /* imm9d */ - | (((val >> 16) & 0x01f) << 22) /* imm5c */ - | (((val >> 21) & 0x001) << 21) /* ic */ - | (((val >> 63) & 0x001) << 36)) << 23; /* i */ - - bfd_putl64 (t0, hit_addr); - bfd_putl64 (t1, hit_addr + 8); - break; - - case IA64_OPND_TGT64: - hit_addr -= (intptr_t) hit_addr & 0x3; - t0 = bfd_getl64 (hit_addr); - t1 = bfd_getl64 (hit_addr + 8); - - /* tmpl/s: bits 0.. 5 in t0 - slot 0: bits 5..45 in t0 - slot 1: bits 46..63 in t0, bits 0..22 in t1 - slot 2: bits 23..63 in t1 */ - - /* First, clear the bits that form the 64 bit constant. */ - t0 &= ~(0x3ffffLL << 46); - t1 &= ~(0x7fffffLL - | ((1LL << 36 | 0xfffffLL << 13) << 23)); - - val >>= 4; - t0 |= ((val >> 20) & 0xffffLL) << 2 << 46; /* 16 lsbs of imm39 */ - t1 |= ((val >> 36) & 0x7fffffLL) << 0; /* 23 msbs of imm39 */ - t1 |= ((((val >> 0) & 0xfffffLL) << 13) /* imm20b */ - | (((val >> 59) & 0x1LL) << 36)) << 23; /* i */ - - bfd_putl64 (t0, hit_addr); - bfd_putl64 (t1, hit_addr + 8); - break; - - default: - switch ((intptr_t) hit_addr & 0x3) - { - case 0: shift = 5; break; - case 1: shift = 14; hit_addr += 3; break; - case 2: shift = 23; hit_addr += 6; break; - case 3: return bfd_reloc_notsupported; /* shouldn't happen... */ - } - dword = bfd_getl64 (hit_addr); - insn = (dword >> shift) & 0x1ffffffffffLL; - - op = elf64_ia64_operands + opnd; - err = (*op->insert) (op, val, &insn); - if (err) - return bfd_reloc_overflow; - - dword &= ~(0x1ffffffffffLL << shift); - dword |= (insn << shift); - bfd_putl64 (dword, hit_addr); - break; - - case IA64_OPND_NIL: - /* A data relocation. */ - if (bigendian) - if (size == 4) - bfd_putb32 (val, hit_addr); - else - bfd_putb64 (val, hit_addr); - else - if (size == 4) - bfd_putl32 (val, hit_addr); - else - bfd_putl64 (val, hit_addr); - break; - } - - return bfd_reloc_ok; -} - -static void -elfNN_ia64_install_dyn_reloc (bfd *abfd, struct bfd_link_info *info, - asection *sec, asection *srel, - bfd_vma offset, unsigned int type, - long dynindx, bfd_vma addend) -{ - Elf_Internal_Rela outrel; - bfd_byte *loc; - - BFD_ASSERT (dynindx != -1); - outrel.r_info = ELFNN_R_INFO (dynindx, type); - outrel.r_addend = addend; - outrel.r_offset = _bfd_elf_section_offset (abfd, info, sec, offset); - if (outrel.r_offset >= (bfd_vma) -2) - { - /* Run for the hills. We shouldn't be outputting a relocation - for this. So do what everyone else does and output a no-op. */ - outrel.r_info = ELFNN_R_INFO (0, R_IA64_NONE); - outrel.r_addend = 0; - outrel.r_offset = 0; - } - else - outrel.r_offset += sec->output_section->vma + sec->output_offset; - - loc = srel->contents; - loc += srel->reloc_count++ * sizeof (ElfNN_External_Rela); - bfd_elfNN_swap_reloca_out (abfd, &outrel, loc); - BFD_ASSERT (sizeof (ElfNN_External_Rela) * srel->reloc_count <= srel->size); -} - -/* Store an entry for target address TARGET_ADDR in the linkage table - and return the gp-relative address of the linkage table entry. */ - -static bfd_vma -set_got_entry (bfd *abfd, struct bfd_link_info *info, - struct elfNN_ia64_dyn_sym_info *dyn_i, - long dynindx, bfd_vma addend, bfd_vma value, - unsigned int dyn_r_type) -{ - struct elfNN_ia64_link_hash_table *ia64_info; - asection *got_sec; - bfd_boolean done; - bfd_vma got_offset; - - ia64_info = elfNN_ia64_hash_table (info); - if (ia64_info == NULL) - return 0; - - got_sec = ia64_info->root.sgot; - - switch (dyn_r_type) - { - case R_IA64_TPREL64LSB: - done = dyn_i->tprel_done; - dyn_i->tprel_done = TRUE; - got_offset = dyn_i->tprel_offset; - break; - case R_IA64_DTPMOD64LSB: - if (dyn_i->dtpmod_offset != ia64_info->self_dtpmod_offset) - { - done = dyn_i->dtpmod_done; - dyn_i->dtpmod_done = TRUE; - } - else - { - done = ia64_info->self_dtpmod_done; - ia64_info->self_dtpmod_done = TRUE; - dynindx = 0; - } - got_offset = dyn_i->dtpmod_offset; - break; - case R_IA64_DTPREL32LSB: - case R_IA64_DTPREL64LSB: - done = dyn_i->dtprel_done; - dyn_i->dtprel_done = TRUE; - got_offset = dyn_i->dtprel_offset; - break; - default: - done = dyn_i->got_done; - dyn_i->got_done = TRUE; - got_offset = dyn_i->got_offset; - break; - } - - BFD_ASSERT ((got_offset & 7) == 0); - - if (! done) - { - /* Store the target address in the linkage table entry. */ - bfd_put_64 (abfd, value, got_sec->contents + got_offset); - - /* Install a dynamic relocation if needed. */ - if (((info->shared - && (!dyn_i->h - || ELF_ST_VISIBILITY (dyn_i->h->other) == STV_DEFAULT - || dyn_i->h->root.type != bfd_link_hash_undefweak) - && dyn_r_type != R_IA64_DTPREL32LSB - && dyn_r_type != R_IA64_DTPREL64LSB) - || elfNN_ia64_dynamic_symbol_p (dyn_i->h, info, dyn_r_type) - || (dynindx != -1 - && (dyn_r_type == R_IA64_FPTR32LSB - || dyn_r_type == R_IA64_FPTR64LSB))) - && (!dyn_i->want_ltoff_fptr - || !info->pie - || !dyn_i->h - || dyn_i->h->root.type != bfd_link_hash_undefweak)) - { - if (dynindx == -1 - && dyn_r_type != R_IA64_TPREL64LSB - && dyn_r_type != R_IA64_DTPMOD64LSB - && dyn_r_type != R_IA64_DTPREL32LSB - && dyn_r_type != R_IA64_DTPREL64LSB) - { - dyn_r_type = R_IA64_RELNNLSB; - dynindx = 0; - addend = value; - } - - if (bfd_big_endian (abfd)) - { - switch (dyn_r_type) - { - case R_IA64_REL32LSB: - dyn_r_type = R_IA64_REL32MSB; - break; - case R_IA64_DIR32LSB: - dyn_r_type = R_IA64_DIR32MSB; - break; - case R_IA64_FPTR32LSB: - dyn_r_type = R_IA64_FPTR32MSB; - break; - case R_IA64_DTPREL32LSB: - dyn_r_type = R_IA64_DTPREL32MSB; - break; - case R_IA64_REL64LSB: - dyn_r_type = R_IA64_REL64MSB; - break; - case R_IA64_DIR64LSB: - dyn_r_type = R_IA64_DIR64MSB; - break; - case R_IA64_FPTR64LSB: - dyn_r_type = R_IA64_FPTR64MSB; - break; - case R_IA64_TPREL64LSB: - dyn_r_type = R_IA64_TPREL64MSB; - break; - case R_IA64_DTPMOD64LSB: - dyn_r_type = R_IA64_DTPMOD64MSB; - break; - case R_IA64_DTPREL64LSB: - dyn_r_type = R_IA64_DTPREL64MSB; - break; - default: - BFD_ASSERT (FALSE); - break; - } - } - - elfNN_ia64_install_dyn_reloc (abfd, NULL, got_sec, - ia64_info->root.srelgot, - got_offset, dyn_r_type, - dynindx, addend); - } - } - - /* Return the address of the linkage table entry. */ - value = (got_sec->output_section->vma - + got_sec->output_offset - + got_offset); - - return value; -} - -/* Fill in a function descriptor consisting of the function's code - address and its global pointer. Return the descriptor's address. */ - -static bfd_vma -set_fptr_entry (bfd *abfd, struct bfd_link_info *info, - struct elfNN_ia64_dyn_sym_info *dyn_i, - bfd_vma value) -{ - struct elfNN_ia64_link_hash_table *ia64_info; - asection *fptr_sec; - - ia64_info = elfNN_ia64_hash_table (info); - if (ia64_info == NULL) - return 0; - - fptr_sec = ia64_info->fptr_sec; - - if (!dyn_i->fptr_done) - { - dyn_i->fptr_done = 1; - - /* Fill in the function descriptor. */ - bfd_put_64 (abfd, value, fptr_sec->contents + dyn_i->fptr_offset); - bfd_put_64 (abfd, _bfd_get_gp_value (abfd), - fptr_sec->contents + dyn_i->fptr_offset + 8); - if (ia64_info->rel_fptr_sec) - { - Elf_Internal_Rela outrel; - bfd_byte *loc; - - if (bfd_little_endian (abfd)) - outrel.r_info = ELFNN_R_INFO (0, R_IA64_IPLTLSB); - else - outrel.r_info = ELFNN_R_INFO (0, R_IA64_IPLTMSB); - outrel.r_addend = value; - outrel.r_offset = (fptr_sec->output_section->vma - + fptr_sec->output_offset - + dyn_i->fptr_offset); - loc = ia64_info->rel_fptr_sec->contents; - loc += ia64_info->rel_fptr_sec->reloc_count++ - * sizeof (ElfNN_External_Rela); - bfd_elfNN_swap_reloca_out (abfd, &outrel, loc); - } - } - - /* Return the descriptor's address. */ - value = (fptr_sec->output_section->vma - + fptr_sec->output_offset - + dyn_i->fptr_offset); - - return value; -} - -/* Fill in a PLTOFF entry consisting of the function's code address - and its global pointer. Return the descriptor's address. */ - -static bfd_vma -set_pltoff_entry (bfd *abfd, struct bfd_link_info *info, - struct elfNN_ia64_dyn_sym_info *dyn_i, - bfd_vma value, bfd_boolean is_plt) -{ - struct elfNN_ia64_link_hash_table *ia64_info; - asection *pltoff_sec; - - ia64_info = elfNN_ia64_hash_table (info); - if (ia64_info == NULL) - return 0; - - pltoff_sec = ia64_info->pltoff_sec; - - /* Don't do anything if this symbol uses a real PLT entry. In - that case, we'll fill this in during finish_dynamic_symbol. */ - if ((! dyn_i->want_plt || is_plt) - && !dyn_i->pltoff_done) - { - bfd_vma gp = _bfd_get_gp_value (abfd); - - /* Fill in the function descriptor. */ - bfd_put_64 (abfd, value, pltoff_sec->contents + dyn_i->pltoff_offset); - bfd_put_64 (abfd, gp, pltoff_sec->contents + dyn_i->pltoff_offset + 8); - - /* Install dynamic relocations if needed. */ - if (!is_plt - && info->shared - && (!dyn_i->h - || ELF_ST_VISIBILITY (dyn_i->h->other) == STV_DEFAULT - || dyn_i->h->root.type != bfd_link_hash_undefweak)) - { - unsigned int dyn_r_type; - - if (bfd_big_endian (abfd)) - dyn_r_type = R_IA64_RELNNMSB; - else - dyn_r_type = R_IA64_RELNNLSB; - - elfNN_ia64_install_dyn_reloc (abfd, NULL, pltoff_sec, - ia64_info->rel_pltoff_sec, - dyn_i->pltoff_offset, - dyn_r_type, 0, value); - elfNN_ia64_install_dyn_reloc (abfd, NULL, pltoff_sec, - ia64_info->rel_pltoff_sec, - dyn_i->pltoff_offset + ARCH_SIZE / 8, - dyn_r_type, 0, gp); - } - - dyn_i->pltoff_done = 1; - } - - /* Return the descriptor's address. */ - value = (pltoff_sec->output_section->vma - + pltoff_sec->output_offset - + dyn_i->pltoff_offset); - - return value; -} - -/* Return the base VMA address which should be subtracted from real addresses - when resolving @tprel() relocation. - Main program TLS (whose template starts at PT_TLS p_vaddr) - is assigned offset round(2 * size of pointer, PT_TLS p_align). */ - -static bfd_vma -elfNN_ia64_tprel_base (struct bfd_link_info *info) -{ - asection *tls_sec = elf_hash_table (info)->tls_sec; - return tls_sec->vma - align_power ((bfd_vma) ARCH_SIZE / 4, - tls_sec->alignment_power); -} - -/* Return the base VMA address which should be subtracted from real addresses - when resolving @dtprel() relocation. - This is PT_TLS segment p_vaddr. */ - -static bfd_vma -elfNN_ia64_dtprel_base (struct bfd_link_info *info) -{ - return elf_hash_table (info)->tls_sec->vma; -} - -/* Called through qsort to sort the .IA_64.unwind section during a - non-relocatable link. Set elfNN_ia64_unwind_entry_compare_bfd - to the output bfd so we can do proper endianness frobbing. */ - -static bfd *elfNN_ia64_unwind_entry_compare_bfd; - -static int -elfNN_ia64_unwind_entry_compare (const PTR a, const PTR b) -{ - bfd_vma av, bv; - - av = bfd_get_64 (elfNN_ia64_unwind_entry_compare_bfd, a); - bv = bfd_get_64 (elfNN_ia64_unwind_entry_compare_bfd, b); - - return (av < bv ? -1 : av > bv ? 1 : 0); -} - -/* Make sure we've got ourselves a nice fat __gp value. */ -static bfd_boolean -elfNN_ia64_choose_gp (bfd *abfd, struct bfd_link_info *info, bfd_boolean final) -{ - bfd_vma min_vma = (bfd_vma) -1, max_vma = 0; - bfd_vma min_short_vma = min_vma, max_short_vma = 0; - struct elf_link_hash_entry *gp; - bfd_vma gp_val; - asection *os; - struct elfNN_ia64_link_hash_table *ia64_info; - - ia64_info = elfNN_ia64_hash_table (info); - if (ia64_info == NULL) - return FALSE; - - /* Find the min and max vma of all sections marked short. Also collect - min and max vma of any type, for use in selecting a nice gp. */ - for (os = abfd->sections; os ; os = os->next) - { - bfd_vma lo, hi; - - if ((os->flags & SEC_ALLOC) == 0) - continue; - - lo = os->vma; - /* When this function is called from elfNN_ia64_final_link - the correct value to use is os->size. When called from - elfNN_ia64_relax_section we are in the middle of section - sizing; some sections will already have os->size set, others - will have os->size zero and os->rawsize the previous size. */ - hi = os->vma + (!final && os->rawsize ? os->rawsize : os->size); - if (hi < lo) - hi = (bfd_vma) -1; - - if (min_vma > lo) - min_vma = lo; - if (max_vma < hi) - max_vma = hi; - if (os->flags & SEC_SMALL_DATA) - { - if (min_short_vma > lo) - min_short_vma = lo; - if (max_short_vma < hi) - max_short_vma = hi; - } - } - - if (ia64_info->min_short_sec) - { - if (min_short_vma - > (ia64_info->min_short_sec->vma - + ia64_info->min_short_offset)) - min_short_vma = (ia64_info->min_short_sec->vma - + ia64_info->min_short_offset); - if (max_short_vma - < (ia64_info->max_short_sec->vma - + ia64_info->max_short_offset)) - max_short_vma = (ia64_info->max_short_sec->vma - + ia64_info->max_short_offset); - } - - /* See if the user wants to force a value. */ - gp = elf_link_hash_lookup (elf_hash_table (info), "__gp", FALSE, - FALSE, FALSE); - - if (gp - && (gp->root.type == bfd_link_hash_defined - || gp->root.type == bfd_link_hash_defweak)) - { - asection *gp_sec = gp->root.u.def.section; - gp_val = (gp->root.u.def.value - + gp_sec->output_section->vma - + gp_sec->output_offset); - } - else - { - /* Pick a sensible value. */ - - if (ia64_info->min_short_sec) - { - bfd_vma short_range = max_short_vma - min_short_vma; - - /* If min_short_sec is set, pick one in the middle bewteen - min_short_vma and max_short_vma. */ - if (short_range >= 0x400000) - goto overflow; - gp_val = min_short_vma + short_range / 2; - } - else - { - asection *got_sec = ia64_info->root.sgot; - - /* Start with just the address of the .got. */ - if (got_sec) - gp_val = got_sec->output_section->vma; - else if (max_short_vma != 0) - gp_val = min_short_vma; - else if (max_vma - min_vma < 0x200000) - gp_val = min_vma; - else - gp_val = max_vma - 0x200000 + 8; - } - - /* If it is possible to address the entire image, but we - don't with the choice above, adjust. */ - if (max_vma - min_vma < 0x400000 - && (max_vma - gp_val >= 0x200000 - || gp_val - min_vma > 0x200000)) - gp_val = min_vma + 0x200000; - else if (max_short_vma != 0) - { - /* If we don't cover all the short data, adjust. */ - if (max_short_vma - gp_val >= 0x200000) - gp_val = min_short_vma + 0x200000; - - /* If we're addressing stuff past the end, adjust back. */ - if (gp_val > max_vma) - gp_val = max_vma - 0x200000 + 8; - } - } - - /* Validate whether all SHF_IA_64_SHORT sections are within - range of the chosen GP. */ - - if (max_short_vma != 0) - { - if (max_short_vma - min_short_vma >= 0x400000) - { -overflow: - (*_bfd_error_handler) - (_("%s: short data segment overflowed (0x%lx >= 0x400000)"), - bfd_get_filename (abfd), - (unsigned long) (max_short_vma - min_short_vma)); - return FALSE; - } - else if ((gp_val > min_short_vma - && gp_val - min_short_vma > 0x200000) - || (gp_val < max_short_vma - && max_short_vma - gp_val >= 0x200000)) - { - (*_bfd_error_handler) - (_("%s: __gp does not cover short data segment"), - bfd_get_filename (abfd)); - return FALSE; - } - } - - _bfd_set_gp_value (abfd, gp_val); - - return TRUE; -} - -static bfd_boolean -elfNN_ia64_final_link (bfd *abfd, struct bfd_link_info *info) -{ - struct elfNN_ia64_link_hash_table *ia64_info; - asection *unwind_output_sec; - - ia64_info = elfNN_ia64_hash_table (info); - if (ia64_info == NULL) - return FALSE; - - /* Make sure we've got ourselves a nice fat __gp value. */ - if (!info->relocatable) - { - bfd_vma gp_val; - struct elf_link_hash_entry *gp; - - /* We assume after gp is set, section size will only decrease. We - need to adjust gp for it. */ - _bfd_set_gp_value (abfd, 0); - if (! elfNN_ia64_choose_gp (abfd, info, TRUE)) - return FALSE; - gp_val = _bfd_get_gp_value (abfd); - - gp = elf_link_hash_lookup (elf_hash_table (info), "__gp", FALSE, - FALSE, FALSE); - if (gp) - { - gp->root.type = bfd_link_hash_defined; - gp->root.u.def.value = gp_val; - gp->root.u.def.section = bfd_abs_section_ptr; - } - } - - /* If we're producing a final executable, we need to sort the contents - of the .IA_64.unwind section. Force this section to be relocated - into memory rather than written immediately to the output file. */ - unwind_output_sec = NULL; - if (!info->relocatable) - { - asection *s = bfd_get_section_by_name (abfd, ELF_STRING_ia64_unwind); - if (s) - { - unwind_output_sec = s->output_section; - unwind_output_sec->contents - = bfd_malloc (unwind_output_sec->size); - if (unwind_output_sec->contents == NULL) - return FALSE; - } - } - - /* Invoke the regular ELF backend linker to do all the work. */ - if (!bfd_elf_final_link (abfd, info)) - return FALSE; - - if (unwind_output_sec) - { - elfNN_ia64_unwind_entry_compare_bfd = abfd; - qsort (unwind_output_sec->contents, - (size_t) (unwind_output_sec->size / 24), - 24, - elfNN_ia64_unwind_entry_compare); - - if (! bfd_set_section_contents (abfd, unwind_output_sec, - unwind_output_sec->contents, (bfd_vma) 0, - unwind_output_sec->size)) - return FALSE; - } - - return TRUE; -} - -static bfd_boolean -elfNN_ia64_relocate_section (bfd *output_bfd, - struct bfd_link_info *info, - bfd *input_bfd, - asection *input_section, - bfd_byte *contents, - Elf_Internal_Rela *relocs, - Elf_Internal_Sym *local_syms, - asection **local_sections) -{ - struct elfNN_ia64_link_hash_table *ia64_info; - Elf_Internal_Shdr *symtab_hdr; - Elf_Internal_Rela *rel; - Elf_Internal_Rela *relend; - asection *srel; - bfd_boolean ret_val = TRUE; /* for non-fatal errors */ - bfd_vma gp_val; - - symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; - ia64_info = elfNN_ia64_hash_table (info); - if (ia64_info == NULL) - return FALSE; - - /* Infect various flags from the input section to the output section. */ - if (info->relocatable) - { - bfd_vma flags; - - flags = elf_section_data(input_section)->this_hdr.sh_flags; - flags &= SHF_IA_64_NORECOV; - - elf_section_data(input_section->output_section) - ->this_hdr.sh_flags |= flags; - } - - gp_val = _bfd_get_gp_value (output_bfd); - srel = get_reloc_section (input_bfd, ia64_info, input_section, FALSE); - - rel = relocs; - relend = relocs + input_section->reloc_count; - for (; rel < relend; ++rel) - { - struct elf_link_hash_entry *h; - struct elfNN_ia64_dyn_sym_info *dyn_i; - bfd_reloc_status_type r; - reloc_howto_type *howto; - unsigned long r_symndx; - Elf_Internal_Sym *sym; - unsigned int r_type; - bfd_vma value; - asection *sym_sec; - bfd_byte *hit_addr; - bfd_boolean dynamic_symbol_p; - bfd_boolean undef_weak_ref; - - r_type = ELFNN_R_TYPE (rel->r_info); - if (r_type > R_IA64_MAX_RELOC_CODE) - { - (*_bfd_error_handler) - (_("%B: unknown relocation type %d"), - input_bfd, (int) r_type); - bfd_set_error (bfd_error_bad_value); - ret_val = FALSE; - continue; - } - - howto = lookup_howto (r_type); - r_symndx = ELFNN_R_SYM (rel->r_info); - h = NULL; - sym = NULL; - sym_sec = NULL; - undef_weak_ref = FALSE; - - if (r_symndx < symtab_hdr->sh_info) - { - /* Reloc against local symbol. */ - asection *msec; - sym = local_syms + r_symndx; - sym_sec = local_sections[r_symndx]; - msec = sym_sec; - value = _bfd_elf_rela_local_sym (output_bfd, sym, &msec, rel); - if (!info->relocatable - && (sym_sec->flags & SEC_MERGE) != 0 - && ELF_ST_TYPE (sym->st_info) == STT_SECTION - && sym_sec->sec_info_type == ELF_INFO_TYPE_MERGE) - { - struct elfNN_ia64_local_hash_entry *loc_h; - - loc_h = get_local_sym_hash (ia64_info, input_bfd, rel, FALSE); - if (loc_h && ! loc_h->sec_merge_done) - { - struct elfNN_ia64_dyn_sym_info *dynent; - unsigned int count; - - for (count = loc_h->count, dynent = loc_h->info; - count != 0; - count--, dynent++) - { - msec = sym_sec; - dynent->addend = - _bfd_merged_section_offset (output_bfd, &msec, - elf_section_data (msec)-> - sec_info, - sym->st_value - + dynent->addend); - dynent->addend -= sym->st_value; - dynent->addend += msec->output_section->vma - + msec->output_offset - - sym_sec->output_section->vma - - sym_sec->output_offset; - } - - /* We may have introduced duplicated entries. We need - to remove them properly. */ - count = sort_dyn_sym_info (loc_h->info, loc_h->count); - if (count != loc_h->count) - { - loc_h->count = count; - loc_h->sorted_count = count; - } - - loc_h->sec_merge_done = 1; - } - } - } - else - { - bfd_boolean unresolved_reloc; - bfd_boolean warned; - struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd); - - RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, - r_symndx, symtab_hdr, sym_hashes, - h, sym_sec, value, - unresolved_reloc, warned); - - if (h->root.type == bfd_link_hash_undefweak) - undef_weak_ref = TRUE; - else if (warned) - continue; - } - - if (sym_sec != NULL && elf_discarded_section (sym_sec)) - RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, - rel, relend, howto, contents); - - if (info->relocatable) - continue; - - hit_addr = contents + rel->r_offset; - value += rel->r_addend; - dynamic_symbol_p = elfNN_ia64_dynamic_symbol_p (h, info, r_type); - - switch (r_type) - { - case R_IA64_NONE: - case R_IA64_LDXMOV: - continue; - - case R_IA64_IMM14: - case R_IA64_IMM22: - case R_IA64_IMM64: - case R_IA64_DIR32MSB: - case R_IA64_DIR32LSB: - case R_IA64_DIR64MSB: - case R_IA64_DIR64LSB: - /* Install a dynamic relocation for this reloc. */ - if ((dynamic_symbol_p || info->shared) - && r_symndx != STN_UNDEF - && (input_section->flags & SEC_ALLOC) != 0) - { - unsigned int dyn_r_type; - long dynindx; - bfd_vma addend; - - BFD_ASSERT (srel != NULL); - - switch (r_type) - { - case R_IA64_IMM14: - case R_IA64_IMM22: - case R_IA64_IMM64: - /* ??? People shouldn't be doing non-pic code in - shared libraries nor dynamic executables. */ - (*_bfd_error_handler) - (_("%B: non-pic code with imm relocation against dynamic symbol `%s'"), - input_bfd, - h ? h->root.root.string - : bfd_elf_sym_name (input_bfd, symtab_hdr, sym, - sym_sec)); - ret_val = FALSE; - continue; - - default: - break; - } - - /* If we don't need dynamic symbol lookup, find a - matching RELATIVE relocation. */ - dyn_r_type = r_type; - if (dynamic_symbol_p) - { - dynindx = h->dynindx; - addend = rel->r_addend; - value = 0; - } - else - { - switch (r_type) - { - case R_IA64_DIR32MSB: - dyn_r_type = R_IA64_REL32MSB; - break; - case R_IA64_DIR32LSB: - dyn_r_type = R_IA64_REL32LSB; - break; - case R_IA64_DIR64MSB: - dyn_r_type = R_IA64_REL64MSB; - break; - case R_IA64_DIR64LSB: - dyn_r_type = R_IA64_REL64LSB; - break; - - default: - break; - } - dynindx = 0; - addend = value; - } - - elfNN_ia64_install_dyn_reloc (output_bfd, info, input_section, - srel, rel->r_offset, dyn_r_type, - dynindx, addend); - } - /* Fall through. */ - - case R_IA64_LTV32MSB: - case R_IA64_LTV32LSB: - case R_IA64_LTV64MSB: - case R_IA64_LTV64LSB: - r = elfNN_ia64_install_value (hit_addr, value, r_type); - break; - - case R_IA64_GPREL22: - case R_IA64_GPREL64I: - case R_IA64_GPREL32MSB: - case R_IA64_GPREL32LSB: - case R_IA64_GPREL64MSB: - case R_IA64_GPREL64LSB: - if (dynamic_symbol_p) - { - (*_bfd_error_handler) - (_("%B: @gprel relocation against dynamic symbol %s"), - input_bfd, - h ? h->root.root.string - : bfd_elf_sym_name (input_bfd, symtab_hdr, sym, - sym_sec)); - ret_val = FALSE; - continue; - } - value -= gp_val; - r = elfNN_ia64_install_value (hit_addr, value, r_type); - break; - - case R_IA64_LTOFF22: - case R_IA64_LTOFF22X: - case R_IA64_LTOFF64I: - dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE); - value = set_got_entry (input_bfd, info, dyn_i, (h ? h->dynindx : -1), - rel->r_addend, value, R_IA64_DIRNNLSB); - value -= gp_val; - r = elfNN_ia64_install_value (hit_addr, value, r_type); - break; - - case R_IA64_PLTOFF22: - case R_IA64_PLTOFF64I: - case R_IA64_PLTOFF64MSB: - case R_IA64_PLTOFF64LSB: - dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE); - value = set_pltoff_entry (output_bfd, info, dyn_i, value, FALSE); - value -= gp_val; - r = elfNN_ia64_install_value (hit_addr, value, r_type); - break; - - case R_IA64_FPTR64I: - case R_IA64_FPTR32MSB: - case R_IA64_FPTR32LSB: - case R_IA64_FPTR64MSB: - case R_IA64_FPTR64LSB: - dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE); - if (dyn_i->want_fptr) - { - if (!undef_weak_ref) - value = set_fptr_entry (output_bfd, info, dyn_i, value); - } - if (!dyn_i->want_fptr || info->pie) - { - long dynindx; - unsigned int dyn_r_type = r_type; - bfd_vma addend = rel->r_addend; - - /* Otherwise, we expect the dynamic linker to create - the entry. */ - - if (dyn_i->want_fptr) - { - if (r_type == R_IA64_FPTR64I) - { - /* We can't represent this without a dynamic symbol. - Adjust the relocation to be against an output - section symbol, which are always present in the - dynamic symbol table. */ - /* ??? People shouldn't be doing non-pic code in - shared libraries. Hork. */ - (*_bfd_error_handler) - (_("%B: linking non-pic code in a position independent executable"), - input_bfd); - ret_val = FALSE; - continue; - } - dynindx = 0; - addend = value; - dyn_r_type = r_type + R_IA64_RELNNLSB - R_IA64_FPTRNNLSB; - } - else if (h) - { - if (h->dynindx != -1) - dynindx = h->dynindx; - else - dynindx = (_bfd_elf_link_lookup_local_dynindx - (info, h->root.u.def.section->owner, - global_sym_index (h))); - value = 0; - } - else - { - dynindx = (_bfd_elf_link_lookup_local_dynindx - (info, input_bfd, (long) r_symndx)); - value = 0; - } - - elfNN_ia64_install_dyn_reloc (output_bfd, info, input_section, - srel, rel->r_offset, dyn_r_type, - dynindx, addend); - } - - r = elfNN_ia64_install_value (hit_addr, value, r_type); - break; - - case R_IA64_LTOFF_FPTR22: - case R_IA64_LTOFF_FPTR64I: - case R_IA64_LTOFF_FPTR32MSB: - case R_IA64_LTOFF_FPTR32LSB: - case R_IA64_LTOFF_FPTR64MSB: - case R_IA64_LTOFF_FPTR64LSB: - { - long dynindx; - - dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE); - if (dyn_i->want_fptr) - { - BFD_ASSERT (h == NULL || h->dynindx == -1); - if (!undef_weak_ref) - value = set_fptr_entry (output_bfd, info, dyn_i, value); - dynindx = -1; - } - else - { - /* Otherwise, we expect the dynamic linker to create - the entry. */ - if (h) - { - if (h->dynindx != -1) - dynindx = h->dynindx; - else - dynindx = (_bfd_elf_link_lookup_local_dynindx - (info, h->root.u.def.section->owner, - global_sym_index (h))); - } - else - dynindx = (_bfd_elf_link_lookup_local_dynindx - (info, input_bfd, (long) r_symndx)); - value = 0; - } - - value = set_got_entry (output_bfd, info, dyn_i, dynindx, - rel->r_addend, value, R_IA64_FPTRNNLSB); - value -= gp_val; - r = elfNN_ia64_install_value (hit_addr, value, r_type); - } - break; - - case R_IA64_PCREL32MSB: - case R_IA64_PCREL32LSB: - case R_IA64_PCREL64MSB: - case R_IA64_PCREL64LSB: - /* Install a dynamic relocation for this reloc. */ - if (dynamic_symbol_p && r_symndx != STN_UNDEF) - { - BFD_ASSERT (srel != NULL); - - elfNN_ia64_install_dyn_reloc (output_bfd, info, input_section, - srel, rel->r_offset, r_type, - h->dynindx, rel->r_addend); - } - goto finish_pcrel; - - case R_IA64_PCREL21B: - case R_IA64_PCREL60B: - /* We should have created a PLT entry for any dynamic symbol. */ - dyn_i = NULL; - if (h) - dyn_i = get_dyn_sym_info (ia64_info, h, NULL, NULL, FALSE); - - if (dyn_i && dyn_i->want_plt2) - { - /* Should have caught this earlier. */ - BFD_ASSERT (rel->r_addend == 0); - - value = (ia64_info->root.splt->output_section->vma - + ia64_info->root.splt->output_offset - + dyn_i->plt2_offset); - } - else - { - /* Since there's no PLT entry, Validate that this is - locally defined. */ - BFD_ASSERT (undef_weak_ref || sym_sec->output_section != NULL); - - /* If the symbol is undef_weak, we shouldn't be trying - to call it. There's every chance that we'd wind up - with an out-of-range fixup here. Don't bother setting - any value at all. */ - if (undef_weak_ref) - continue; - } - goto finish_pcrel; - - case R_IA64_PCREL21BI: - case R_IA64_PCREL21F: - case R_IA64_PCREL21M: - case R_IA64_PCREL22: - case R_IA64_PCREL64I: - /* The PCREL21BI reloc is specifically not intended for use with - dynamic relocs. PCREL21F and PCREL21M are used for speculation - fixup code, and thus probably ought not be dynamic. The - PCREL22 and PCREL64I relocs aren't emitted as dynamic relocs. */ - if (dynamic_symbol_p) - { - const char *msg; - - if (r_type == R_IA64_PCREL21BI) - msg = _("%B: @internal branch to dynamic symbol %s"); - else if (r_type == R_IA64_PCREL21F || r_type == R_IA64_PCREL21M) - msg = _("%B: speculation fixup to dynamic symbol %s"); - else - msg = _("%B: @pcrel relocation against dynamic symbol %s"); - (*_bfd_error_handler) (msg, input_bfd, - h ? h->root.root.string - : bfd_elf_sym_name (input_bfd, - symtab_hdr, - sym, - sym_sec)); - ret_val = FALSE; - continue; - } - goto finish_pcrel; - - finish_pcrel: - /* Make pc-relative. */ - value -= (input_section->output_section->vma - + input_section->output_offset - + rel->r_offset) & ~ (bfd_vma) 0x3; - r = elfNN_ia64_install_value (hit_addr, value, r_type); - break; - - case R_IA64_SEGREL32MSB: - case R_IA64_SEGREL32LSB: - case R_IA64_SEGREL64MSB: - case R_IA64_SEGREL64LSB: - { - /* Find the segment that contains the output_section. */ - Elf_Internal_Phdr *p = _bfd_elf_find_segment_containing_section - (output_bfd, input_section->output_section); - - if (p == NULL) - { - r = bfd_reloc_notsupported; - } - else - { - /* The VMA of the segment is the vaddr of the associated - program header. */ - if (value > p->p_vaddr) - value -= p->p_vaddr; - else - value = 0; - r = elfNN_ia64_install_value (hit_addr, value, r_type); - } - break; - } - - case R_IA64_SECREL32MSB: - case R_IA64_SECREL32LSB: - case R_IA64_SECREL64MSB: - case R_IA64_SECREL64LSB: - /* Make output-section relative to section where the symbol - is defined. PR 475 */ - if (sym_sec) - value -= sym_sec->output_section->vma; - r = elfNN_ia64_install_value (hit_addr, value, r_type); - break; - - case R_IA64_IPLTMSB: - case R_IA64_IPLTLSB: - /* Install a dynamic relocation for this reloc. */ - if ((dynamic_symbol_p || info->shared) - && (input_section->flags & SEC_ALLOC) != 0) - { - BFD_ASSERT (srel != NULL); - - /* If we don't need dynamic symbol lookup, install two - RELATIVE relocations. */ - if (!dynamic_symbol_p) - { - unsigned int dyn_r_type; - - if (r_type == R_IA64_IPLTMSB) - dyn_r_type = R_IA64_REL64MSB; - else - dyn_r_type = R_IA64_REL64LSB; - - elfNN_ia64_install_dyn_reloc (output_bfd, info, - input_section, - srel, rel->r_offset, - dyn_r_type, 0, value); - elfNN_ia64_install_dyn_reloc (output_bfd, info, - input_section, - srel, rel->r_offset + 8, - dyn_r_type, 0, gp_val); - } - else - elfNN_ia64_install_dyn_reloc (output_bfd, info, input_section, - srel, rel->r_offset, r_type, - h->dynindx, rel->r_addend); - } - - if (r_type == R_IA64_IPLTMSB) - r_type = R_IA64_DIR64MSB; - else - r_type = R_IA64_DIR64LSB; - elfNN_ia64_install_value (hit_addr, value, r_type); - r = elfNN_ia64_install_value (hit_addr + 8, gp_val, r_type); - break; - - case R_IA64_TPREL14: - case R_IA64_TPREL22: - case R_IA64_TPREL64I: - if (elf_hash_table (info)->tls_sec == NULL) - goto missing_tls_sec; - value -= elfNN_ia64_tprel_base (info); - r = elfNN_ia64_install_value (hit_addr, value, r_type); - break; - - case R_IA64_DTPREL14: - case R_IA64_DTPREL22: - case R_IA64_DTPREL64I: - case R_IA64_DTPREL32LSB: - case R_IA64_DTPREL32MSB: - case R_IA64_DTPREL64LSB: - case R_IA64_DTPREL64MSB: - if (elf_hash_table (info)->tls_sec == NULL) - goto missing_tls_sec; - value -= elfNN_ia64_dtprel_base (info); - r = elfNN_ia64_install_value (hit_addr, value, r_type); - break; - - case R_IA64_LTOFF_TPREL22: - case R_IA64_LTOFF_DTPMOD22: - case R_IA64_LTOFF_DTPREL22: - { - int got_r_type; - long dynindx = h ? h->dynindx : -1; - bfd_vma r_addend = rel->r_addend; - - switch (r_type) - { - default: - case R_IA64_LTOFF_TPREL22: - if (!dynamic_symbol_p) - { - if (elf_hash_table (info)->tls_sec == NULL) - goto missing_tls_sec; - if (!info->shared) - value -= elfNN_ia64_tprel_base (info); - else - { - r_addend += value - elfNN_ia64_dtprel_base (info); - dynindx = 0; - } - } - got_r_type = R_IA64_TPREL64LSB; - break; - case R_IA64_LTOFF_DTPMOD22: - if (!dynamic_symbol_p && !info->shared) - value = 1; - got_r_type = R_IA64_DTPMOD64LSB; - break; - case R_IA64_LTOFF_DTPREL22: - if (!dynamic_symbol_p) - { - if (elf_hash_table (info)->tls_sec == NULL) - goto missing_tls_sec; - value -= elfNN_ia64_dtprel_base (info); - } - got_r_type = R_IA64_DTPRELNNLSB; - break; - } - dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE); - value = set_got_entry (input_bfd, info, dyn_i, dynindx, r_addend, - value, got_r_type); - value -= gp_val; - r = elfNN_ia64_install_value (hit_addr, value, r_type); - } - break; - - default: - r = bfd_reloc_notsupported; - break; - } - - switch (r) - { - case bfd_reloc_ok: - break; - - case bfd_reloc_undefined: - /* This can happen for global table relative relocs if - __gp is undefined. This is a panic situation so we - don't try to continue. */ - (*info->callbacks->undefined_symbol) - (info, "__gp", input_bfd, input_section, rel->r_offset, 1); - return FALSE; - - case bfd_reloc_notsupported: - { - const char *name; - - if (h) - name = h->root.root.string; - else - name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, - sym_sec); - if (!(*info->callbacks->warning) (info, _("unsupported reloc"), - name, input_bfd, - input_section, rel->r_offset)) - return FALSE; - ret_val = FALSE; - } - break; - - case bfd_reloc_dangerous: - case bfd_reloc_outofrange: - case bfd_reloc_overflow: - default: -missing_tls_sec: - { - const char *name; - - if (h) - name = h->root.root.string; - else - name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, - sym_sec); - - switch (r_type) - { - case R_IA64_TPREL14: - case R_IA64_TPREL22: - case R_IA64_TPREL64I: - case R_IA64_DTPREL14: - case R_IA64_DTPREL22: - case R_IA64_DTPREL64I: - case R_IA64_DTPREL32LSB: - case R_IA64_DTPREL32MSB: - case R_IA64_DTPREL64LSB: - case R_IA64_DTPREL64MSB: - case R_IA64_LTOFF_TPREL22: - case R_IA64_LTOFF_DTPMOD22: - case R_IA64_LTOFF_DTPREL22: - (*_bfd_error_handler) - (_("%B: missing TLS section for relocation %s against `%s' at 0x%lx in section `%A'."), - input_bfd, input_section, howto->name, name, - rel->r_offset); - break; - - case R_IA64_PCREL21B: - case R_IA64_PCREL21BI: - case R_IA64_PCREL21M: - case R_IA64_PCREL21F: - if (is_elf_hash_table (info->hash)) - { - /* Relaxtion is always performed for ELF output. - Overflow failures for those relocations mean - that the section is too big to relax. */ - (*_bfd_error_handler) - (_("%B: Can't relax br (%s) to `%s' at 0x%lx in section `%A' with size 0x%lx (> 0x1000000)."), - input_bfd, input_section, howto->name, name, - rel->r_offset, input_section->size); - break; - } - default: - if (!(*info->callbacks->reloc_overflow) (info, - &h->root, - name, - howto->name, - (bfd_vma) 0, - input_bfd, - input_section, - rel->r_offset)) - return FALSE; - break; - } - - ret_val = FALSE; - } - break; - } - } - - return ret_val; -} - -static bfd_boolean -elfNN_ia64_finish_dynamic_symbol (bfd *output_bfd, - struct bfd_link_info *info, - struct elf_link_hash_entry *h, - Elf_Internal_Sym *sym) -{ - struct elfNN_ia64_link_hash_table *ia64_info; - struct elfNN_ia64_dyn_sym_info *dyn_i; - - ia64_info = elfNN_ia64_hash_table (info); - if (ia64_info == NULL) - return FALSE; - - dyn_i = get_dyn_sym_info (ia64_info, h, NULL, NULL, FALSE); - - /* Fill in the PLT data, if required. */ - if (dyn_i && dyn_i->want_plt) - { - Elf_Internal_Rela outrel; - bfd_byte *loc; - asection *plt_sec; - bfd_vma plt_addr, pltoff_addr, gp_val, plt_index; - - gp_val = _bfd_get_gp_value (output_bfd); - - /* Initialize the minimal PLT entry. */ - - plt_index = (dyn_i->plt_offset - PLT_HEADER_SIZE) / PLT_MIN_ENTRY_SIZE; - plt_sec = ia64_info->root.splt; - loc = plt_sec->contents + dyn_i->plt_offset; - - memcpy (loc, plt_min_entry, PLT_MIN_ENTRY_SIZE); - elfNN_ia64_install_value (loc, plt_index, R_IA64_IMM22); - elfNN_ia64_install_value (loc+2, -dyn_i->plt_offset, R_IA64_PCREL21B); - - plt_addr = (plt_sec->output_section->vma - + plt_sec->output_offset - + dyn_i->plt_offset); - pltoff_addr = set_pltoff_entry (output_bfd, info, dyn_i, plt_addr, TRUE); - - /* Initialize the FULL PLT entry, if needed. */ - if (dyn_i->want_plt2) - { - loc = plt_sec->contents + dyn_i->plt2_offset; - - memcpy (loc, plt_full_entry, PLT_FULL_ENTRY_SIZE); - elfNN_ia64_install_value (loc, pltoff_addr - gp_val, R_IA64_IMM22); - - /* Mark the symbol as undefined, rather than as defined in the - plt section. Leave the value alone. */ - /* ??? We didn't redefine it in adjust_dynamic_symbol in the - first place. But perhaps elflink.c did some for us. */ - if (!h->def_regular) - sym->st_shndx = SHN_UNDEF; - } - - /* Create the dynamic relocation. */ - outrel.r_offset = pltoff_addr; - if (bfd_little_endian (output_bfd)) - outrel.r_info = ELFNN_R_INFO (h->dynindx, R_IA64_IPLTLSB); - else - outrel.r_info = ELFNN_R_INFO (h->dynindx, R_IA64_IPLTMSB); - outrel.r_addend = 0; - - /* This is fun. In the .IA_64.pltoff section, we've got entries - that correspond both to real PLT entries, and those that - happened to resolve to local symbols but need to be created - to satisfy @pltoff relocations. The .rela.IA_64.pltoff - relocations for the real PLT should come at the end of the - section, so that they can be indexed by plt entry at runtime. - - We emitted all of the relocations for the non-PLT @pltoff - entries during relocate_section. So we can consider the - existing sec->reloc_count to be the base of the array of - PLT relocations. */ - - loc = ia64_info->rel_pltoff_sec->contents; - loc += ((ia64_info->rel_pltoff_sec->reloc_count + plt_index) - * sizeof (ElfNN_External_Rela)); - bfd_elfNN_swap_reloca_out (output_bfd, &outrel, loc); - } - - /* Mark some specially defined symbols as absolute. */ - if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || h == ia64_info->root.hgot - || h == ia64_info->root.hplt) - sym->st_shndx = SHN_ABS; - - return TRUE; -} - -static bfd_boolean -elfNN_ia64_finish_dynamic_sections (bfd *abfd, - struct bfd_link_info *info) -{ - struct elfNN_ia64_link_hash_table *ia64_info; - bfd *dynobj; - - ia64_info = elfNN_ia64_hash_table (info); - if (ia64_info == NULL) - return FALSE; - - dynobj = ia64_info->root.dynobj; - - if (elf_hash_table (info)->dynamic_sections_created) - { - ElfNN_External_Dyn *dyncon, *dynconend; - asection *sdyn, *sgotplt; - bfd_vma gp_val; - - sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); - sgotplt = bfd_get_section_by_name (dynobj, ".got.plt"); - BFD_ASSERT (sdyn != NULL); - dyncon = (ElfNN_External_Dyn *) sdyn->contents; - dynconend = (ElfNN_External_Dyn *) (sdyn->contents + sdyn->size); - - gp_val = _bfd_get_gp_value (abfd); - - for (; dyncon < dynconend; dyncon++) - { - Elf_Internal_Dyn dyn; - - bfd_elfNN_swap_dyn_in (dynobj, dyncon, &dyn); - - switch (dyn.d_tag) - { - case DT_PLTGOT: - dyn.d_un.d_ptr = gp_val; - break; - - case DT_PLTRELSZ: - dyn.d_un.d_val = (ia64_info->minplt_entries - * sizeof (ElfNN_External_Rela)); - break; - - case DT_JMPREL: - /* See the comment above in finish_dynamic_symbol. */ - dyn.d_un.d_ptr = (ia64_info->rel_pltoff_sec->output_section->vma - + ia64_info->rel_pltoff_sec->output_offset - + (ia64_info->rel_pltoff_sec->reloc_count - * sizeof (ElfNN_External_Rela))); - break; - - case DT_IA_64_PLT_RESERVE: - dyn.d_un.d_ptr = (sgotplt->output_section->vma - + sgotplt->output_offset); - break; - - case DT_RELASZ: - /* Do not have RELASZ include JMPREL. This makes things - easier on ld.so. This is not what the rest of BFD set up. */ - dyn.d_un.d_val -= (ia64_info->minplt_entries - * sizeof (ElfNN_External_Rela)); - break; - } - - bfd_elfNN_swap_dyn_out (abfd, &dyn, dyncon); - } - - /* Initialize the PLT0 entry. */ - if (ia64_info->root.splt) - { - bfd_byte *loc = ia64_info->root.splt->contents; - bfd_vma pltres; - - memcpy (loc, plt_header, PLT_HEADER_SIZE); - - pltres = (sgotplt->output_section->vma - + sgotplt->output_offset - - gp_val); - - elfNN_ia64_install_value (loc+1, pltres, R_IA64_GPREL22); - } - } - - return TRUE; -} - -/* ELF file flag handling: */ - -/* Function to keep IA-64 specific file flags. */ -static bfd_boolean -elfNN_ia64_set_private_flags (bfd *abfd, flagword flags) -{ - BFD_ASSERT (!elf_flags_init (abfd) - || elf_elfheader (abfd)->e_flags == flags); - - elf_elfheader (abfd)->e_flags = flags; - elf_flags_init (abfd) = TRUE; - return TRUE; -} - -/* Merge backend specific data from an object file to the output - object file when linking. */ -static bfd_boolean -elfNN_ia64_merge_private_bfd_data (bfd *ibfd, bfd *obfd) -{ - flagword out_flags; - flagword in_flags; - bfd_boolean ok = TRUE; - - /* Don't even pretend to support mixed-format linking. */ - if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour - || bfd_get_flavour (obfd) != bfd_target_elf_flavour) - return FALSE; - - in_flags = elf_elfheader (ibfd)->e_flags; - out_flags = elf_elfheader (obfd)->e_flags; - - if (! elf_flags_init (obfd)) - { - elf_flags_init (obfd) = TRUE; - elf_elfheader (obfd)->e_flags = in_flags; - - if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) - && bfd_get_arch_info (obfd)->the_default) - { - return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), - bfd_get_mach (ibfd)); - } - - return TRUE; - } - - /* Check flag compatibility. */ - if (in_flags == out_flags) - return TRUE; - - /* Output has EF_IA_64_REDUCEDFP set only if all inputs have it set. */ - if (!(in_flags & EF_IA_64_REDUCEDFP) && (out_flags & EF_IA_64_REDUCEDFP)) - elf_elfheader (obfd)->e_flags &= ~EF_IA_64_REDUCEDFP; - - if ((in_flags & EF_IA_64_TRAPNIL) != (out_flags & EF_IA_64_TRAPNIL)) - { - (*_bfd_error_handler) - (_("%B: linking trap-on-NULL-dereference with non-trapping files"), - ibfd); - - bfd_set_error (bfd_error_bad_value); - ok = FALSE; - } - if ((in_flags & EF_IA_64_BE) != (out_flags & EF_IA_64_BE)) - { - (*_bfd_error_handler) - (_("%B: linking big-endian files with little-endian files"), - ibfd); - - bfd_set_error (bfd_error_bad_value); - ok = FALSE; - } - if ((in_flags & EF_IA_64_ABI64) != (out_flags & EF_IA_64_ABI64)) - { - (*_bfd_error_handler) - (_("%B: linking 64-bit files with 32-bit files"), - ibfd); - - bfd_set_error (bfd_error_bad_value); - ok = FALSE; - } - if ((in_flags & EF_IA_64_CONS_GP) != (out_flags & EF_IA_64_CONS_GP)) - { - (*_bfd_error_handler) - (_("%B: linking constant-gp files with non-constant-gp files"), - ibfd); - - bfd_set_error (bfd_error_bad_value); - ok = FALSE; - } - if ((in_flags & EF_IA_64_NOFUNCDESC_CONS_GP) - != (out_flags & EF_IA_64_NOFUNCDESC_CONS_GP)) - { - (*_bfd_error_handler) - (_("%B: linking auto-pic files with non-auto-pic files"), - ibfd); - - bfd_set_error (bfd_error_bad_value); - ok = FALSE; - } - - return ok; -} - -static bfd_boolean -elfNN_ia64_print_private_bfd_data (bfd *abfd, PTR ptr) -{ - FILE *file = (FILE *) ptr; - flagword flags = elf_elfheader (abfd)->e_flags; - - BFD_ASSERT (abfd != NULL && ptr != NULL); - - fprintf (file, "private flags = %s%s%s%s%s%s%s%s\n", - (flags & EF_IA_64_TRAPNIL) ? "TRAPNIL, " : "", - (flags & EF_IA_64_EXT) ? "EXT, " : "", - (flags & EF_IA_64_BE) ? "BE, " : "LE, ", - (flags & EF_IA_64_REDUCEDFP) ? "REDUCEDFP, " : "", - (flags & EF_IA_64_CONS_GP) ? "CONS_GP, " : "", - (flags & EF_IA_64_NOFUNCDESC_CONS_GP) ? "NOFUNCDESC_CONS_GP, " : "", - (flags & EF_IA_64_ABSOLUTE) ? "ABSOLUTE, " : "", - (flags & EF_IA_64_ABI64) ? "ABI64" : "ABI32"); - - _bfd_elf_print_private_bfd_data (abfd, ptr); - return TRUE; -} - -static enum elf_reloc_type_class -elfNN_ia64_reloc_type_class (const Elf_Internal_Rela *rela) -{ - switch ((int) ELFNN_R_TYPE (rela->r_info)) - { - case R_IA64_REL32MSB: - case R_IA64_REL32LSB: - case R_IA64_REL64MSB: - case R_IA64_REL64LSB: - return reloc_class_relative; - case R_IA64_IPLTMSB: - case R_IA64_IPLTLSB: - return reloc_class_plt; - case R_IA64_COPY: - return reloc_class_copy; - default: - return reloc_class_normal; - } -} - -static const struct bfd_elf_special_section elfNN_ia64_special_sections[] = -{ - { STRING_COMMA_LEN (".sbss"), -1, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_IA_64_SHORT }, - { STRING_COMMA_LEN (".sdata"), -1, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_IA_64_SHORT }, - { NULL, 0, 0, 0, 0 } -}; - -static bfd_boolean -elfNN_ia64_object_p (bfd *abfd) -{ - asection *sec; - asection *group, *unwi, *unw; - flagword flags; - const char *name; - char *unwi_name, *unw_name; - bfd_size_type amt; - - if (abfd->flags & DYNAMIC) - return TRUE; - - /* Flags for fake group section. */ - flags = (SEC_LINKER_CREATED | SEC_GROUP | SEC_LINK_ONCE - | SEC_EXCLUDE); - - /* We add a fake section group for each .gnu.linkonce.t.* section, - which isn't in a section group, and its unwind sections. */ - for (sec = abfd->sections; sec != NULL; sec = sec->next) - { - if (elf_sec_group (sec) == NULL - && ((sec->flags & (SEC_LINK_ONCE | SEC_CODE | SEC_GROUP)) - == (SEC_LINK_ONCE | SEC_CODE)) - && CONST_STRNEQ (sec->name, ".gnu.linkonce.t.")) - { - name = sec->name + 16; - - amt = strlen (name) + sizeof (".gnu.linkonce.ia64unwi."); - unwi_name = bfd_alloc (abfd, amt); - if (!unwi_name) - return FALSE; - - strcpy (stpcpy (unwi_name, ".gnu.linkonce.ia64unwi."), name); - unwi = bfd_get_section_by_name (abfd, unwi_name); - - amt = strlen (name) + sizeof (".gnu.linkonce.ia64unw."); - unw_name = bfd_alloc (abfd, amt); - if (!unw_name) - return FALSE; - - strcpy (stpcpy (unw_name, ".gnu.linkonce.ia64unw."), name); - unw = bfd_get_section_by_name (abfd, unw_name); - - /* We need to create a fake group section for it and its - unwind sections. */ - group = bfd_make_section_anyway_with_flags (abfd, name, - flags); - if (group == NULL) - return FALSE; - - /* Move the fake group section to the beginning. */ - bfd_section_list_remove (abfd, group); - bfd_section_list_prepend (abfd, group); - - elf_next_in_group (group) = sec; - - elf_group_name (sec) = name; - elf_next_in_group (sec) = sec; - elf_sec_group (sec) = group; - - if (unwi) - { - elf_group_name (unwi) = name; - elf_next_in_group (unwi) = sec; - elf_next_in_group (sec) = unwi; - elf_sec_group (unwi) = group; - } - - if (unw) - { - elf_group_name (unw) = name; - if (unwi) - { - elf_next_in_group (unw) = elf_next_in_group (unwi); - elf_next_in_group (unwi) = unw; - } - else - { - elf_next_in_group (unw) = sec; - elf_next_in_group (sec) = unw; - } - elf_sec_group (unw) = group; - } - - /* Fake SHT_GROUP section header. */ - elf_section_data (group)->this_hdr.bfd_section = group; - elf_section_data (group)->this_hdr.sh_type = SHT_GROUP; - } - } - return TRUE; -} - -static bfd_boolean -elfNN_ia64_hpux_vec (const bfd_target *vec) -{ - extern const bfd_target bfd_elfNN_ia64_hpux_big_vec; - return (vec == & bfd_elfNN_ia64_hpux_big_vec); -} - -static void -elfNN_hpux_post_process_headers (bfd *abfd, - struct bfd_link_info *info ATTRIBUTE_UNUSED) -{ - Elf_Internal_Ehdr *i_ehdrp = elf_elfheader (abfd); - - i_ehdrp->e_ident[EI_OSABI] = get_elf_backend_data (abfd)->elf_osabi; - i_ehdrp->e_ident[EI_ABIVERSION] = 1; -} - -static bfd_boolean -elfNN_hpux_backend_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED, - asection *sec, int *retval) -{ - if (bfd_is_com_section (sec)) - { - *retval = SHN_IA_64_ANSI_COMMON; - return TRUE; - } - return FALSE; -} + /* Data relocations. */ -static void -elfNN_hpux_backend_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED, - asymbol *asym) -{ - elf_symbol_type *elfsym = (elf_symbol_type *) asym; + case R_IA64_DIR32MSB: + case R_IA64_GPREL32MSB: + case R_IA64_FPTR32MSB: + case R_IA64_PCREL32MSB: + case R_IA64_LTOFF_FPTR32MSB: + case R_IA64_SEGREL32MSB: + case R_IA64_SECREL32MSB: + case R_IA64_LTV32MSB: + case R_IA64_DTPREL32MSB: + size = 4; bigendian = 1; + break; - switch (elfsym->internal_elf_sym.st_shndx) - { - case SHN_IA_64_ANSI_COMMON: - asym->section = bfd_com_section_ptr; - asym->value = elfsym->internal_elf_sym.st_size; - asym->flags &= ~BSF_GLOBAL; + case R_IA64_DIR32LSB: + case R_IA64_GPREL32LSB: + case R_IA64_FPTR32LSB: + case R_IA64_PCREL32LSB: + case R_IA64_LTOFF_FPTR32LSB: + case R_IA64_SEGREL32LSB: + case R_IA64_SECREL32LSB: + case R_IA64_LTV32LSB: + case R_IA64_DTPREL32LSB: + size = 4; bigendian = 0; break; - } -} -#ifdef INCLUDE_IA64_VMS + case R_IA64_DIR64MSB: + case R_IA64_GPREL64MSB: + case R_IA64_PLTOFF64MSB: + case R_IA64_FPTR64MSB: + case R_IA64_PCREL64MSB: + case R_IA64_LTOFF_FPTR64MSB: + case R_IA64_SEGREL64MSB: + case R_IA64_SECREL64MSB: + case R_IA64_LTV64MSB: + case R_IA64_TPREL64MSB: + case R_IA64_DTPMOD64MSB: + case R_IA64_DTPREL64MSB: + size = 8; bigendian = 1; + break; -static bfd_boolean -elfNN_vms_section_from_shdr (bfd *abfd, - Elf_Internal_Shdr *hdr, - const char *name, - int shindex) -{ - switch (hdr->sh_type) - { - case SHT_IA_64_VMS_TRACE: - case SHT_IA_64_VMS_DEBUG: - case SHT_IA_64_VMS_DEBUG_STR: + case R_IA64_DIR64LSB: + case R_IA64_GPREL64LSB: + case R_IA64_PLTOFF64LSB: + case R_IA64_FPTR64LSB: + case R_IA64_PCREL64LSB: + case R_IA64_LTOFF_FPTR64LSB: + case R_IA64_SEGREL64LSB: + case R_IA64_SECREL64LSB: + case R_IA64_LTV64LSB: + case R_IA64_TPREL64LSB: + case R_IA64_DTPMOD64LSB: + case R_IA64_DTPREL64LSB: + size = 8; bigendian = 0; break; + /* Unsupported / Dynamic relocations. */ default: - return elfNN_ia64_section_from_shdr (abfd, hdr, name, shindex); - } - - if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) - return FALSE; - - return TRUE; -} - -static bfd_boolean -elfNN_vms_object_p (bfd *abfd) -{ - Elf_Internal_Ehdr *i_ehdrp = elf_elfheader (abfd); - Elf_Internal_Phdr *i_phdr = elf_tdata (abfd)->phdr; - unsigned int i; - unsigned int num_text = 0; - unsigned int num_data = 0; - unsigned int num_rodata = 0; - char name[16]; - - if (!elfNN_ia64_object_p (abfd)) - return FALSE; - - for (i = 0; i < i_ehdrp->e_phnum; i++, i_phdr++) - { - /* Is there a section for this segment? */ - bfd_vma base_vma = i_phdr->p_vaddr; - bfd_vma limit_vma = base_vma + i_phdr->p_filesz; - - if (i_phdr->p_type != PT_LOAD) - continue; - - again: - while (base_vma < limit_vma) - { - bfd_vma next_vma = limit_vma; - asection *nsec; - asection *sec; - flagword flags; - char *nname = NULL; - - /* Find a section covering base_vma. */ - for (sec = abfd->sections; sec != NULL; sec = sec->next) - { - if ((sec->flags & (SEC_ALLOC | SEC_LOAD)) == 0) - continue; - if (sec->vma <= base_vma && sec->vma + sec->size > base_vma) - { - base_vma = sec->vma + sec->size; - goto again; - } - if (sec->vma < next_vma && sec->vma + sec->size >= base_vma) - next_vma = sec->vma; - } - - /* No section covering [base_vma; next_vma). Create a fake one. */ - flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS; - if (i_phdr->p_flags & PF_X) - { - flags |= SEC_CODE; - if (num_text++ == 0) - nname = ".text"; - else - sprintf (name, ".text$%u", num_text); - } - else if ((i_phdr->p_flags & (PF_R | PF_W)) == PF_R) - { - flags |= SEC_READONLY; - sprintf (name, ".rodata$%u", num_rodata++); - } - else - { - flags |= SEC_DATA; - sprintf (name, ".data$%u", num_data++); - } - - /* Allocate name. */ - if (nname == NULL) - { - size_t name_len = strlen (name) + 1; - nname = bfd_alloc (abfd, name_len); - if (nname == NULL) - return FALSE; - memcpy (nname, name, name_len); - } - - /* Create and fill new section. */ - nsec = bfd_make_section_anyway_with_flags (abfd, nname, flags); - if (nsec == NULL) - return FALSE; - nsec->vma = base_vma; - nsec->size = next_vma - base_vma; - nsec->filepos = i_phdr->p_offset + (base_vma - i_phdr->p_vaddr); - - base_vma = next_vma; - } + return bfd_reloc_notsupported; } - return TRUE; -} - -static void -elfNN_vms_post_process_headers (bfd *abfd, - struct bfd_link_info *info ATTRIBUTE_UNUSED) -{ - Elf_Internal_Ehdr *i_ehdrp = elf_elfheader (abfd); - i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_OPENVMS; - i_ehdrp->e_ident[EI_ABIVERSION] = 2; -} - -static bfd_boolean -elfNN_vms_section_processing (bfd *abfd ATTRIBUTE_UNUSED, - Elf_Internal_Shdr *hdr) -{ - if (hdr->bfd_section != NULL) + switch (opnd) { - const char *name = bfd_get_section_name (abfd, hdr->bfd_section); - - if (strcmp (name, ".text") == 0) - hdr->sh_flags |= SHF_IA_64_VMS_SHARED; - else if ((strcmp (name, ".debug") == 0) - || (strcmp (name, ".debug_abbrev") == 0) - || (strcmp (name, ".debug_aranges") == 0) - || (strcmp (name, ".debug_frame") == 0) - || (strcmp (name, ".debug_info") == 0) - || (strcmp (name, ".debug_loc") == 0) - || (strcmp (name, ".debug_macinfo") == 0) - || (strcmp (name, ".debug_pubnames") == 0) - || (strcmp (name, ".debug_pubtypes") == 0)) - hdr->sh_type = SHT_IA_64_VMS_DEBUG; - else if ((strcmp (name, ".debug_line") == 0) - || (strcmp (name, ".debug_ranges") == 0)) - hdr->sh_type = SHT_IA_64_VMS_TRACE; - else if (strcmp (name, ".debug_str") == 0) - hdr->sh_type = SHT_IA_64_VMS_DEBUG_STR; - else if (strcmp (name, ".vms_display_name_info") == 0) - { - int idx, symcount; - asymbol **syms; - struct elf_obj_tdata *t = elf_tdata (abfd); - int buf[2]; - int demangler_sym_idx = -1; + case IA64_OPND_IMMU64: + hit_addr -= (intptr_t) hit_addr & 0x3; + t0 = bfd_getl64 (hit_addr); + t1 = bfd_getl64 (hit_addr + 8); - symcount = bfd_get_symcount (abfd); - syms = bfd_get_outsymbols (abfd); - for (idx = 0; idx < symcount; idx++) - { - asymbol *sym; - sym = syms[idx]; - if ((sym->flags & (BSF_DEBUGGING | BSF_DYNAMIC)) - && strchr (sym->name, '@') - && (strcmp (sym->section->name, BFD_ABS_SECTION_NAME) == 0)) - { - demangler_sym_idx = sym->udata.i; - break; - } - } + /* tmpl/s: bits 0.. 5 in t0 + slot 0: bits 5..45 in t0 + slot 1: bits 46..63 in t0, bits 0..22 in t1 + slot 2: bits 23..63 in t1 */ - hdr->sh_type = SHT_IA_64_VMS_DISPLAY_NAME_INFO; - hdr->sh_entsize = 4; - hdr->sh_addralign = 0; - hdr->sh_link = t->symtab_section; + /* First, clear the bits that form the 64 bit constant. */ + t0 &= ~(0x3ffffLL << 46); + t1 &= ~(0x7fffffLL + | (( (0x07fLL << 13) | (0x1ffLL << 27) + | (0x01fLL << 22) | (0x001LL << 21) + | (0x001LL << 36)) << 23)); - /* Find symtab index of demangler routine and stuff it in - the second long word of section data. */ + t0 |= ((val >> 22) & 0x03ffffLL) << 46; /* 18 lsbs of imm41 */ + t1 |= ((val >> 40) & 0x7fffffLL) << 0; /* 23 msbs of imm41 */ + t1 |= ( (((val >> 0) & 0x07f) << 13) /* imm7b */ + | (((val >> 7) & 0x1ff) << 27) /* imm9d */ + | (((val >> 16) & 0x01f) << 22) /* imm5c */ + | (((val >> 21) & 0x001) << 21) /* ic */ + | (((val >> 63) & 0x001) << 36)) << 23; /* i */ - if (demangler_sym_idx > -1) - { - bfd_seek (abfd, hdr->sh_offset, SEEK_SET); - bfd_bread (buf, hdr->sh_size, abfd); - buf [1] = demangler_sym_idx; - bfd_seek (abfd, hdr->sh_offset, SEEK_SET); - bfd_bwrite (buf, hdr->sh_size, abfd); - } - } - } + bfd_putl64 (t0, hit_addr); + bfd_putl64 (t1, hit_addr + 8); + break; - return TRUE; -} + case IA64_OPND_TGT64: + hit_addr -= (intptr_t) hit_addr & 0x3; + t0 = bfd_getl64 (hit_addr); + t1 = bfd_getl64 (hit_addr + 8); -/* The final processing done just before writing out a VMS IA-64 ELF - object file. */ + /* tmpl/s: bits 0.. 5 in t0 + slot 0: bits 5..45 in t0 + slot 1: bits 46..63 in t0, bits 0..22 in t1 + slot 2: bits 23..63 in t1 */ -static void -elfNN_vms_final_write_processing (bfd *abfd, - bfd_boolean linker ATTRIBUTE_UNUSED) -{ - Elf_Internal_Shdr *hdr; - asection *s; - int unwind_info_sect_idx = 0; + /* First, clear the bits that form the 64 bit constant. */ + t0 &= ~(0x3ffffLL << 46); + t1 &= ~(0x7fffffLL + | ((1LL << 36 | 0xfffffLL << 13) << 23)); - for (s = abfd->sections; s; s = s->next) - { - hdr = &elf_section_data (s)->this_hdr; + val >>= 4; + t0 |= ((val >> 20) & 0xffffLL) << 2 << 46; /* 16 lsbs of imm39 */ + t1 |= ((val >> 36) & 0x7fffffLL) << 0; /* 23 msbs of imm39 */ + t1 |= ((((val >> 0) & 0xfffffLL) << 13) /* imm20b */ + | (((val >> 59) & 0x1LL) << 36)) << 23; /* i */ - if (strcmp (bfd_get_section_name (abfd, hdr->bfd_section), - ".IA_64.unwind_info") == 0) - unwind_info_sect_idx = elf_section_data (s)->this_idx; + bfd_putl64 (t0, hit_addr); + bfd_putl64 (t1, hit_addr + 8); + break; - switch (hdr->sh_type) + default: + switch ((intptr_t) hit_addr & 0x3) { - case SHT_IA_64_UNWIND: - /* VMS requires sh_info to point to the unwind info section. */ - hdr->sh_info = unwind_info_sect_idx; - break; + case 0: shift = 5; break; + case 1: shift = 14; hit_addr += 3; break; + case 2: shift = 23; hit_addr += 6; break; + case 3: return bfd_reloc_notsupported; /* shouldn't happen... */ } - } - - if (! elf_flags_init (abfd)) - { - unsigned long flags = 0; - - if (abfd->xvec->byteorder == BFD_ENDIAN_BIG) - flags |= EF_IA_64_BE; - if (bfd_get_mach (abfd) == bfd_mach_ia64_elf64) - flags |= EF_IA_64_ABI64; - - elf_elfheader(abfd)->e_flags = flags; - elf_flags_init (abfd) = TRUE; - } -} + dword = bfd_getl64 (hit_addr); + insn = (dword >> shift) & 0x1ffffffffffLL; -static bfd_boolean -elfNN_vms_close_and_cleanup (bfd *abfd) -{ - if (bfd_get_format (abfd) == bfd_object) - { - long isize, irsize; + op = elf64_ia64_operands + opnd; + err = (*op->insert) (op, val, &insn); + if (err) + return bfd_reloc_overflow; - if (elf_shstrtab (abfd) != NULL) - _bfd_elf_strtab_free (elf_shstrtab (abfd)); + dword &= ~(0x1ffffffffffLL << shift); + dword |= (insn << shift); + bfd_putl64 (dword, hit_addr); + break; - /* Pad to 8 byte boundary for IPF/VMS. */ - isize = bfd_get_size (abfd); - if ((irsize = isize/8*8) < isize) - { - int ishort = (irsize + 8) - isize; - bfd_seek (abfd, isize, SEEK_SET); - bfd_bwrite (bfd_zmalloc (ishort), ishort, abfd); - } + case IA64_OPND_NIL: + /* A data relocation. */ + if (bigendian) + if (size == 4) + bfd_putb32 (val, hit_addr); + else + bfd_putb64 (val, hit_addr); + else + if (size == 4) + bfd_putl32 (val, hit_addr); + else + bfd_putl64 (val, hit_addr); + break; } - return _bfd_generic_close_and_cleanup (abfd); + return bfd_reloc_ok; } -#endif /* INCLUDE_IA64_VMS */ - -#define TARGET_LITTLE_SYM bfd_elfNN_ia64_little_vec -#define TARGET_LITTLE_NAME "elfNN-ia64-little" -#define TARGET_BIG_SYM bfd_elfNN_ia64_big_vec -#define TARGET_BIG_NAME "elfNN-ia64-big" -#define ELF_ARCH bfd_arch_ia64 -#define ELF_TARGET_ID IA64_ELF_DATA -#define ELF_MACHINE_CODE EM_IA_64 -#define ELF_MACHINE_ALT1 1999 /* EAS2.3 */ -#define ELF_MACHINE_ALT2 1998 /* EAS2.2 */ -#define ELF_MAXPAGESIZE 0x10000 /* 64KB */ -#define ELF_COMMONPAGESIZE 0x4000 /* 16KB */ - -#define elf_backend_section_from_shdr \ - elfNN_ia64_section_from_shdr -#define elf_backend_section_flags \ - elfNN_ia64_section_flags -#define elf_backend_fake_sections \ - elfNN_ia64_fake_sections -#define elf_backend_final_write_processing \ - elfNN_ia64_final_write_processing -#define elf_backend_add_symbol_hook \ - elfNN_ia64_add_symbol_hook -#define elf_backend_additional_program_headers \ - elfNN_ia64_additional_program_headers -#define elf_backend_modify_segment_map \ - elfNN_ia64_modify_segment_map -#define elf_backend_modify_program_headers \ - elfNN_ia64_modify_program_headers -#define elf_info_to_howto \ - elfNN_ia64_info_to_howto - -#define bfd_elfNN_bfd_reloc_type_lookup \ - elfNN_ia64_reloc_type_lookup -#define bfd_elfNN_bfd_reloc_name_lookup \ - elfNN_ia64_reloc_name_lookup -#define bfd_elfNN_bfd_is_local_label_name \ - elfNN_ia64_is_local_label_name -#define bfd_elfNN_bfd_relax_section \ - elfNN_ia64_relax_section - -#define elf_backend_object_p \ - elfNN_ia64_object_p - -/* Stuff for the BFD linker: */ -#define bfd_elfNN_bfd_link_hash_table_create \ - elfNN_ia64_hash_table_create -#define bfd_elfNN_bfd_link_hash_table_free \ - elfNN_ia64_hash_table_free -#define elf_backend_create_dynamic_sections \ - elfNN_ia64_create_dynamic_sections -#define elf_backend_check_relocs \ - elfNN_ia64_check_relocs -#define elf_backend_adjust_dynamic_symbol \ - elfNN_ia64_adjust_dynamic_symbol -#define elf_backend_size_dynamic_sections \ - elfNN_ia64_size_dynamic_sections -#define elf_backend_omit_section_dynsym \ - ((bfd_boolean (*) (bfd *, struct bfd_link_info *, asection *)) bfd_true) -#define elf_backend_relocate_section \ - elfNN_ia64_relocate_section -#define elf_backend_finish_dynamic_symbol \ - elfNN_ia64_finish_dynamic_symbol -#define elf_backend_finish_dynamic_sections \ - elfNN_ia64_finish_dynamic_sections -#define bfd_elfNN_bfd_final_link \ - elfNN_ia64_final_link - -#define bfd_elfNN_bfd_merge_private_bfd_data \ - elfNN_ia64_merge_private_bfd_data -#define bfd_elfNN_bfd_set_private_flags \ - elfNN_ia64_set_private_flags -#define bfd_elfNN_bfd_print_private_bfd_data \ - elfNN_ia64_print_private_bfd_data - -#define elf_backend_plt_readonly 1 -#define elf_backend_want_plt_sym 0 -#define elf_backend_plt_alignment 5 -#define elf_backend_got_header_size 0 -#define elf_backend_want_got_plt 1 -#define elf_backend_may_use_rel_p 1 -#define elf_backend_may_use_rela_p 1 -#define elf_backend_default_use_rela_p 1 -#define elf_backend_want_dynbss 0 -#define elf_backend_copy_indirect_symbol elfNN_ia64_hash_copy_indirect -#define elf_backend_hide_symbol elfNN_ia64_hash_hide_symbol -#define elf_backend_fixup_symbol _bfd_elf_link_hash_fixup_symbol -#define elf_backend_reloc_type_class elfNN_ia64_reloc_type_class -#define elf_backend_rela_normal 1 -#define elf_backend_special_sections elfNN_ia64_special_sections -#define elf_backend_default_execstack 0 - -/* FIXME: PR 290: The Intel C compiler generates SHT_IA_64_UNWIND with - SHF_LINK_ORDER. But it doesn't set the sh_link or sh_info fields. - We don't want to flood users with so many error messages. We turn - off the warning for now. It will be turned on later when the Intel - compiler is fixed. */ -#define elf_backend_link_order_error_handler NULL - -#include "elfNN-target.h" - -/* HPUX-specific vectors. */ - -#undef TARGET_LITTLE_SYM -#undef TARGET_LITTLE_NAME -#undef TARGET_BIG_SYM -#define TARGET_BIG_SYM bfd_elfNN_ia64_hpux_big_vec -#undef TARGET_BIG_NAME -#define TARGET_BIG_NAME "elfNN-ia64-hpux-big" - -/* These are HP-UX specific functions. */ - -#undef elf_backend_post_process_headers -#define elf_backend_post_process_headers elfNN_hpux_post_process_headers - -#undef elf_backend_section_from_bfd_section -#define elf_backend_section_from_bfd_section elfNN_hpux_backend_section_from_bfd_section - -#undef elf_backend_symbol_processing -#define elf_backend_symbol_processing elfNN_hpux_backend_symbol_processing - -#undef elf_backend_want_p_paddr_set_to_zero -#define elf_backend_want_p_paddr_set_to_zero 1 - -#undef ELF_COMMONPAGESIZE -#undef ELF_OSABI -#define ELF_OSABI ELFOSABI_HPUX - -#undef elfNN_bed -#define elfNN_bed elfNN_ia64_hpux_bed - -#include "elfNN-target.h" - -/* VMS-specific vectors. */ -#ifdef INCLUDE_IA64_VMS - -#undef TARGET_LITTLE_SYM -#define TARGET_LITTLE_SYM bfd_elfNN_ia64_vms_vec -#undef TARGET_LITTLE_NAME -#define TARGET_LITTLE_NAME "elfNN-ia64-vms" -#undef TARGET_BIG_SYM -#undef TARGET_BIG_NAME - -/* These are VMS specific functions. */ - -#undef elf_backend_object_p -#define elf_backend_object_p elfNN_vms_object_p - -#undef elf_backend_section_from_shdr -#define elf_backend_section_from_shdr elfNN_vms_section_from_shdr - -#undef elf_backend_post_process_headers -#define elf_backend_post_process_headers elfNN_vms_post_process_headers - -#undef elf_backend_section_processing -#define elf_backend_section_processing elfNN_vms_section_processing - -#undef elf_backend_final_write_processing -#define elf_backend_final_write_processing elfNN_vms_final_write_processing - -#undef bfd_elfNN_close_and_cleanup -#define bfd_elfNN_close_and_cleanup elfNN_vms_close_and_cleanup - -#undef elf_backend_section_from_bfd_section - -#undef elf_backend_symbol_processing - -#undef elf_backend_want_p_paddr_set_to_zero - -#undef ELF_OSABI -#define ELF_OSABI ELFOSABI_OPENVMS - -#undef ELF_MAXPAGESIZE -#define ELF_MAXPAGESIZE 0x10000 /* 64KB */ - -#undef elfNN_bed -#define elfNN_bed elfNN_ia64_vms_bed - -/* Use VMS-style archives (in particular, don't use the standard coff - archive format). */ -#define bfd_elfNN_archive_functions - -#undef bfd_elfNN_archive_p -#define bfd_elfNN_archive_p _bfd_vms_lib_ia64_archive_p -#undef bfd_elfNN_write_archive_contents -#define bfd_elfNN_write_archive_contents _bfd_vms_lib_write_archive_contents -#undef bfd_elfNN_mkarchive -#define bfd_elfNN_mkarchive _bfd_vms_lib_ia64_mkarchive - -#define bfd_elfNN_archive_slurp_armap \ - _bfd_vms_lib_slurp_armap -#define bfd_elfNN_archive_slurp_extended_name_table \ - _bfd_vms_lib_slurp_extended_name_table -#define bfd_elfNN_archive_construct_extended_name_table \ - _bfd_vms_lib_construct_extended_name_table -#define bfd_elfNN_archive_truncate_arname \ - _bfd_vms_lib_truncate_arname -#define bfd_elfNN_archive_write_armap \ - _bfd_vms_lib_write_armap -#define bfd_elfNN_archive_read_ar_hdr \ - _bfd_vms_lib_read_ar_hdr -#define bfd_elfNN_archive_write_ar_hdr \ - _bfd_vms_lib_write_ar_hdr -#define bfd_elfNN_archive_openr_next_archived_file \ - _bfd_vms_lib_openr_next_archived_file -#define bfd_elfNN_archive_get_elt_at_index \ - _bfd_vms_lib_get_elt_at_index -#define bfd_elfNN_archive_generic_stat_arch_elt \ - _bfd_vms_lib_generic_stat_arch_elt -#define bfd_elfNN_archive_update_armap_timestamp \ - _bfd_vms_lib_update_armap_timestamp - -#include "elfNN-target.h" - -#endif /* INCLUDE_IA64_VMS */ diff --git a/bfd/elfxx-ia64.h b/bfd/elfxx-ia64.h new file mode 100644 index 0000000..dfd9e08 --- /dev/null +++ b/bfd/elfxx-ia64.h @@ -0,0 +1,34 @@ +/* IA-64 support for 64-bit ELF + Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, + 2008, 2009, 2010 Free Software Foundation, Inc. + Contributed by David Mosberger-Tang + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +reloc_howto_type *ia64_elf_reloc_type_lookup (bfd *, bfd_reloc_code_real_type); + +reloc_howto_type *ia64_elf_reloc_name_lookup (bfd *, const char *); + +reloc_howto_type *ia64_elf_lookup_howto (unsigned int rtype); + +bfd_boolean ia64_elf_relax_br (bfd_byte *contents, bfd_vma off); +void ia64_elf_relax_brl (bfd_byte *contents, bfd_vma off); +void ia64_elf_relax_ldxmov (bfd_byte *contents, bfd_vma off); + +bfd_reloc_status_type ia64_elf_install_value (bfd_byte *hit_addr, bfd_vma v, + unsigned int r_type); diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index b804eea..33a454d 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -1,6 +1,7 @@ /* MIPS-specific support for ELF Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, - 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 + Free Software Foundation, Inc. Most of the information added by Ian Lance Taylor, Cygnus Support, . @@ -305,6 +306,12 @@ struct mips_elf_la25_stub { #define LA25_LUI(VAL) (0x3c190000 | (VAL)) /* lui t9,VAL */ #define LA25_J(VAL) (0x08000000 | (((VAL) >> 2) & 0x3ffffff)) /* j VAL */ #define LA25_ADDIU(VAL) (0x27390000 | (VAL)) /* addiu t9,t9,VAL */ +#define LA25_LUI_MICROMIPS_1(VAL) (0x41b9) /* lui t9,VAL */ +#define LA25_LUI_MICROMIPS_2(VAL) (VAL) +#define LA25_J_MICROMIPS_1(VAL) (0xd400 | (((VAL) >> 17) & 0x3ff)) /* j VAL */ +#define LA25_J_MICROMIPS_2(VAL) ((VAL) >> 1) +#define LA25_ADDIU_MICROMIPS_1(VAL) (0x3339) /* addiu t9,t9,VAL */ +#define LA25_ADDIU_MICROMIPS_2(VAL) (VAL) /* This structure is passed to mips_elf_sort_hash_table_f when sorting the dynamic symbols. */ @@ -521,7 +528,14 @@ struct mips_htab_traverse_info || r_type == R_MIPS_TLS_TPREL32 \ || r_type == R_MIPS_TLS_TPREL64 \ || r_type == R_MIPS_TLS_TPREL_HI16 \ - || r_type == R_MIPS_TLS_TPREL_LO16) + || r_type == R_MIPS_TLS_TPREL_LO16 \ + || r_type == R_MICROMIPS_TLS_GD \ + || r_type == R_MICROMIPS_TLS_LDM \ + || r_type == R_MICROMIPS_TLS_DTPREL_HI16 \ + || r_type == R_MICROMIPS_TLS_DTPREL_LO16 \ + || r_type == R_MICROMIPS_TLS_GOTTPREL \ + || r_type == R_MICROMIPS_TLS_TPREL_HI16 \ + || r_type == R_MICROMIPS_TLS_TPREL_LO16) /* Structure used to pass information to mips_elf_output_extsym. */ @@ -903,7 +917,7 @@ static const bfd_vma mips_o32_exec_plt0_entry[] = 0x8f990000, /* lw $25, %lo(&GOTPLT[0])($28) */ 0x279c0000, /* addiu $28, $28, %lo(&GOTPLT[0]) */ 0x031cc023, /* subu $24, $24, $28 */ - 0x03e07821, /* move $15, $31 */ + 0x03e07821, /* move $15, $31 # 32-bit move (addu) */ 0x0018c082, /* srl $24, $24, 2 */ 0x0320f809, /* jalr $25 */ 0x2718fffe /* subu $24, $24, 2 */ @@ -917,7 +931,7 @@ static const bfd_vma mips_n32_exec_plt0_entry[] = 0x8dd90000, /* lw $25, %lo(&GOTPLT[0])($14) */ 0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */ 0x030ec023, /* subu $24, $24, $14 */ - 0x03e07821, /* move $15, $31 */ + 0x03e07821, /* move $15, $31 # 32-bit move (addu) */ 0x0018c082, /* srl $24, $24, 2 */ 0x0320f809, /* jalr $25 */ 0x2718fffe /* subu $24, $24, 2 */ @@ -931,7 +945,7 @@ static const bfd_vma mips_n64_exec_plt0_entry[] = 0xddd90000, /* ld $25, %lo(&GOTPLT[0])($14) */ 0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */ 0x030ec023, /* subu $24, $24, $14 */ - 0x03e07821, /* move $15, $31 */ + 0x03e0782d, /* move $15, $31 # 64-bit move (daddu) */ 0x0018c0c2, /* srl $24, $24, 3 */ 0x0320f809, /* jalr $25 */ 0x2718fffe /* subu $24, $24, 2 */ @@ -1358,6 +1372,9 @@ mips_elf_create_stub_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *elfh; const char *name; + if (ELF_ST_IS_MICROMIPS (h->root.other)) + value |= 1; + /* Create a new symbol. */ name = ACONCAT ((prefix, h->root.root.root.string, NULL)); bh = NULL; @@ -1718,14 +1735,16 @@ mips_elf_check_symbols (struct mips_elf_link_hash_entry *h, void *data) struct mips_htab_traverse_info *hti; hti = (struct mips_htab_traverse_info *) data; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link; - if (!hti->info->relocatable) mips_elf_check_mips16_stubs (hti->info, h); if (mips_elf_local_pic_function_p (h)) { + /* PR 12845: If H is in a section that has been garbage + collected it will have its output section set to *ABS*. */ + if (bfd_is_abs_section (h->root.root.u.def.section->output_section)) + return TRUE; + /* H is a function that might need $25 to be valid on entry. If we're creating a non-PIC relocatable object, mark H as being PIC. If we're creating a non-relocatable object with @@ -1848,28 +1867,98 @@ mips16_reloc_p (int r_type) } } +/* Check if a microMIPS reloc. */ + +static inline bfd_boolean +micromips_reloc_p (unsigned int r_type) +{ + return r_type >= R_MICROMIPS_min && r_type < R_MICROMIPS_max; +} + +/* Similar to MIPS16, the two 16-bit halves in microMIPS must be swapped + on a little-endian system. This does not apply to R_MICROMIPS_PC7_S1 + and R_MICROMIPS_PC10_S1 relocs that apply to 16-bit instructions. */ + +static inline bfd_boolean +micromips_reloc_shuffle_p (unsigned int r_type) +{ + return (micromips_reloc_p (r_type) + && r_type != R_MICROMIPS_PC7_S1 + && r_type != R_MICROMIPS_PC10_S1); +} + static inline bfd_boolean got16_reloc_p (int r_type) { - return r_type == R_MIPS_GOT16 || r_type == R_MIPS16_GOT16; + return (r_type == R_MIPS_GOT16 + || r_type == R_MIPS16_GOT16 + || r_type == R_MICROMIPS_GOT16); } static inline bfd_boolean call16_reloc_p (int r_type) { - return r_type == R_MIPS_CALL16 || r_type == R_MIPS16_CALL16; + return (r_type == R_MIPS_CALL16 + || r_type == R_MIPS16_CALL16 + || r_type == R_MICROMIPS_CALL16); +} + +static inline bfd_boolean +got_disp_reloc_p (unsigned int r_type) +{ + return r_type == R_MIPS_GOT_DISP || r_type == R_MICROMIPS_GOT_DISP; +} + +static inline bfd_boolean +got_page_reloc_p (unsigned int r_type) +{ + return r_type == R_MIPS_GOT_PAGE || r_type == R_MICROMIPS_GOT_PAGE; +} + +static inline bfd_boolean +got_ofst_reloc_p (unsigned int r_type) +{ + return r_type == R_MIPS_GOT_OFST || r_type == R_MICROMIPS_GOT_OFST; +} + +static inline bfd_boolean +got_hi16_reloc_p (unsigned int r_type) +{ + return r_type == R_MIPS_GOT_HI16 || r_type == R_MICROMIPS_GOT_HI16; +} + +static inline bfd_boolean +got_lo16_reloc_p (unsigned int r_type) +{ + return r_type == R_MIPS_GOT_LO16 || r_type == R_MICROMIPS_GOT_LO16; +} + +static inline bfd_boolean +call_hi16_reloc_p (unsigned int r_type) +{ + return r_type == R_MIPS_CALL_HI16 || r_type == R_MICROMIPS_CALL_HI16; +} + +static inline bfd_boolean +call_lo16_reloc_p (unsigned int r_type) +{ + return r_type == R_MIPS_CALL_LO16 || r_type == R_MICROMIPS_CALL_LO16; } static inline bfd_boolean hi16_reloc_p (int r_type) { - return r_type == R_MIPS_HI16 || r_type == R_MIPS16_HI16; + return (r_type == R_MIPS_HI16 + || r_type == R_MIPS16_HI16 + || r_type == R_MICROMIPS_HI16); } static inline bfd_boolean lo16_reloc_p (int r_type) { - return r_type == R_MIPS_LO16 || r_type == R_MIPS16_LO16; + return (r_type == R_MIPS_LO16 + || r_type == R_MIPS16_LO16 + || r_type == R_MICROMIPS_LO16); } static inline bfd_boolean @@ -1881,66 +1970,89 @@ mips16_call_reloc_p (int r_type) static inline bfd_boolean jal_reloc_p (int r_type) { - return r_type == R_MIPS_26 || r_type == R_MIPS16_26; + return (r_type == R_MIPS_26 + || r_type == R_MIPS16_26 + || r_type == R_MICROMIPS_26_S1); +} + +static inline bfd_boolean +micromips_branch_reloc_p (int r_type) +{ + return (r_type == R_MICROMIPS_26_S1 + || r_type == R_MICROMIPS_PC16_S1 + || r_type == R_MICROMIPS_PC10_S1 + || r_type == R_MICROMIPS_PC7_S1); +} + +static inline bfd_boolean +tls_gd_reloc_p (unsigned int r_type) +{ + return r_type == R_MIPS_TLS_GD || r_type == R_MICROMIPS_TLS_GD; +} + +static inline bfd_boolean +tls_ldm_reloc_p (unsigned int r_type) +{ + return r_type == R_MIPS_TLS_LDM || r_type == R_MICROMIPS_TLS_LDM; +} + +static inline bfd_boolean +tls_gottprel_reloc_p (unsigned int r_type) +{ + return r_type == R_MIPS_TLS_GOTTPREL || r_type == R_MICROMIPS_TLS_GOTTPREL; } void -_bfd_mips16_elf_reloc_unshuffle (bfd *abfd, int r_type, - bfd_boolean jal_shuffle, bfd_byte *data) +_bfd_mips_elf_reloc_unshuffle (bfd *abfd, int r_type, + bfd_boolean jal_shuffle, bfd_byte *data) { - bfd_vma extend, insn, val; + bfd_vma first, second, val; - if (!mips16_reloc_p (r_type)) + if (!mips16_reloc_p (r_type) && !micromips_reloc_shuffle_p (r_type)) return; - /* Pick up the mips16 extend instruction and the real instruction. */ - extend = bfd_get_16 (abfd, data); - insn = bfd_get_16 (abfd, data + 2); - if (r_type == R_MIPS16_26) - { - if (jal_shuffle) - val = ((extend & 0xfc00) << 16) | ((extend & 0x3e0) << 11) - | ((extend & 0x1f) << 21) | insn; - else - val = extend << 16 | insn; - } + /* Pick up the first and second halfwords of the instruction. */ + first = bfd_get_16 (abfd, data); + second = bfd_get_16 (abfd, data + 2); + if (micromips_reloc_p (r_type) || (r_type == R_MIPS16_26 && !jal_shuffle)) + val = first << 16 | second; + else if (r_type != R_MIPS16_26) + val = (((first & 0xf800) << 16) | ((second & 0xffe0) << 11) + | ((first & 0x1f) << 11) | (first & 0x7e0) | (second & 0x1f)); else - val = ((extend & 0xf800) << 16) | ((insn & 0xffe0) << 11) - | ((extend & 0x1f) << 11) | (extend & 0x7e0) | (insn & 0x1f); + val = (((first & 0xfc00) << 16) | ((first & 0x3e0) << 11) + | ((first & 0x1f) << 21) | second); bfd_put_32 (abfd, val, data); } void -_bfd_mips16_elf_reloc_shuffle (bfd *abfd, int r_type, - bfd_boolean jal_shuffle, bfd_byte *data) +_bfd_mips_elf_reloc_shuffle (bfd *abfd, int r_type, + bfd_boolean jal_shuffle, bfd_byte *data) { - bfd_vma extend, insn, val; + bfd_vma first, second, val; - if (!mips16_reloc_p (r_type)) + if (!mips16_reloc_p (r_type) && !micromips_reloc_shuffle_p (r_type)) return; val = bfd_get_32 (abfd, data); - if (r_type == R_MIPS16_26) + if (micromips_reloc_p (r_type) || (r_type == R_MIPS16_26 && !jal_shuffle)) { - if (jal_shuffle) - { - insn = val & 0xffff; - extend = ((val >> 16) & 0xfc00) | ((val >> 11) & 0x3e0) - | ((val >> 21) & 0x1f); - } - else - { - insn = val & 0xffff; - extend = val >> 16; - } + second = val & 0xffff; + first = val >> 16; + } + else if (r_type != R_MIPS16_26) + { + second = ((val >> 11) & 0xffe0) | (val & 0x1f); + first = ((val >> 16) & 0xf800) | ((val >> 11) & 0x1f) | (val & 0x7e0); } else { - insn = ((val >> 11) & 0xffe0) | (val & 0x1f); - extend = ((val >> 16) & 0xf800) | ((val >> 11) & 0x1f) | (val & 0x7e0); + second = val & 0xffff; + first = ((val >> 16) & 0xfc00) | ((val >> 11) & 0x3e0) + | ((val >> 21) & 0x1f); } - bfd_put_16 (abfd, insn, data + 2); - bfd_put_16 (abfd, extend, data); + bfd_put_16 (abfd, second, data + 2); + bfd_put_16 (abfd, first, data); } bfd_reloc_status_type @@ -2081,11 +2193,11 @@ _bfd_mips_elf_lo16_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol, if (reloc_entry->address > bfd_get_section_limit (abfd, input_section)) return bfd_reloc_outofrange; - _bfd_mips16_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE, - location); - vallo = bfd_get_32 (abfd, location); - _bfd_mips16_elf_reloc_shuffle (abfd, reloc_entry->howto->type, FALSE, + _bfd_mips_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE, location); + vallo = bfd_get_32 (abfd, location); + _bfd_mips_elf_reloc_shuffle (abfd, reloc_entry->howto->type, FALSE, + location); while (mips_hi16_list != NULL) { @@ -2103,6 +2215,8 @@ _bfd_mips_elf_lo16_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol, hi->rel.howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, R_MIPS_HI16, FALSE); else if (hi->rel.howto->type == R_MIPS16_GOT16) hi->rel.howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, R_MIPS16_HI16, FALSE); + else if (hi->rel.howto->type == R_MICROMIPS_GOT16) + hi->rel.howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, R_MICROMIPS_HI16, FALSE); /* VALLO is a signed 16-bit number. Bias it by 0x8000 so that any carry or borrow will induce a change of +1 or -1 in the high part. */ @@ -2180,12 +2294,12 @@ _bfd_mips_elf_generic_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry, val += reloc_entry->addend; /* Add VAL to the relocation field. */ - _bfd_mips16_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE, - location); + _bfd_mips_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE, + location); status = _bfd_relocate_contents (reloc_entry->howto, abfd, val, location); - _bfd_mips16_elf_reloc_shuffle (abfd, reloc_entry->howto->type, FALSE, - location); + _bfd_mips_elf_reloc_shuffle (abfd, reloc_entry->howto->type, FALSE, + location); if (status != bfd_reloc_ok) return status; @@ -2403,9 +2517,6 @@ mips_elf_output_extsym (struct mips_elf_link_hash_entry *h, void *data) bfd_boolean strip; asection *sec, *output_section; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link; - if (h->root.indx == -2) strip = FALSE; else if ((h->root.def_dynamic @@ -2977,12 +3088,13 @@ mips_tls_got_index (bfd *abfd, bfd_vma got_index, unsigned char *tls_type, int r_type, struct bfd_link_info *info, struct mips_elf_link_hash_entry *h, bfd_vma symbol) { - BFD_ASSERT (r_type == R_MIPS_TLS_GOTTPREL || r_type == R_MIPS_TLS_GD - || r_type == R_MIPS_TLS_LDM); + BFD_ASSERT (tls_gottprel_reloc_p (r_type) + || tls_gd_reloc_p (r_type) + || tls_ldm_reloc_p (r_type)); mips_elf_initialize_tls_slots (abfd, got_index, tls_type, info, h, symbol); - if (r_type == R_MIPS_TLS_GOTTPREL) + if (tls_gottprel_reloc_p (r_type)) { BFD_ASSERT (*tls_type & GOT_TLS_IE); if (*tls_type & GOT_TLS_GD) @@ -2991,13 +3103,13 @@ mips_tls_got_index (bfd *abfd, bfd_vma got_index, unsigned char *tls_type, return got_index; } - if (r_type == R_MIPS_TLS_GD) + if (tls_gd_reloc_p (r_type)) { BFD_ASSERT (*tls_type & GOT_TLS_GD); return got_index; } - if (r_type == R_MIPS_TLS_LDM) + if (tls_ldm_reloc_p (r_type)) { BFD_ASSERT (*tls_type & GOT_TLS_LDM); return got_index; @@ -3279,7 +3391,7 @@ mips_elf_create_local_got_entry (bfd *abfd, struct bfd_link_info *info, struct mips_got_entry *p; entry.abfd = ibfd; - if (r_type == R_MIPS_TLS_LDM) + if (tls_ldm_reloc_p (r_type)) { entry.tls_type = GOT_TLS_LDM; entry.symndx = 0; @@ -3431,9 +3543,6 @@ mips_elf_sort_hash_table_f (struct mips_elf_link_hash_entry *h, void *data) { struct mips_elf_hash_sort_data *hsd = data; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link; - /* Symbols without dynamic symbol table entries aren't interesting at all. */ if (h->root.dynindx == -1) @@ -4813,6 +4922,11 @@ mips_elf_relocation_needs_la25_stub (bfd *input_bfd, int r_type) case R_MIPS_26: case R_MIPS_PC16: case R_MIPS16_26: + case R_MICROMIPS_26_S1: + case R_MICROMIPS_PC7_S1: + case R_MICROMIPS_PC10_S1: + case R_MICROMIPS_PC16_S1: + case R_MICROMIPS_PC23_S2: return TRUE; default: @@ -4826,7 +4940,7 @@ mips_elf_relocation_needs_la25_stub (bfd *input_bfd, int r_type) The result of the relocation calculation is stored in VALUEP. On exit, set *CROSS_MODE_JUMP_P to true if the relocation field - is a MIPS16 jump to non-MIPS16 code, or vice versa. + is a MIPS16 or microMIPS jump to standard MIPS code, or vice versa. This function returns bfd_reloc_continue if the caller need take no further action regarding this relocation, bfd_reloc_notsupported if @@ -4883,6 +4997,7 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, bfd_boolean overflowed_p; /* TRUE if this relocation refers to a MIPS16 function. */ bfd_boolean target_is_16_bit_code_p = FALSE; + bfd_boolean target_is_micromips_code_p = FALSE; struct mips_elf_link_hash_table *htab; bfd *dynobj; @@ -4935,8 +5050,8 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, addend += sec->output_section->vma + sec->output_offset; } - /* MIPS16 text labels should be treated as odd. */ - if (ELF_ST_IS_MIPS16 (sym->st_other)) + /* MIPS16/microMIPS text labels should be treated as odd. */ + if (ELF_ST_IS_COMPRESSED (sym->st_other)) ++symbol; /* Record the name of this symbol, for our caller. */ @@ -4947,6 +5062,7 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, *namep = bfd_section_name (input_bfd, sec); target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (sym->st_other); + target_is_micromips_code_p = ELF_ST_IS_MICROMIPS (sym->st_other); } else { @@ -5044,6 +5160,10 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, } target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (h->root.other); + /* If the output section is the PLT section, + then the target is not microMIPS. */ + target_is_micromips_code_p = (htab->splt != sec + && ELF_ST_IS_MICROMIPS (h->root.other)); } /* If this is a reference to a 16-bit function with a stub, we need @@ -5131,12 +5251,29 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, + h->la25_stub->stub_section->output_offset + h->la25_stub->offset); + /* Make sure MIPS16 and microMIPS are not used together. */ + if ((r_type == R_MIPS16_26 && target_is_micromips_code_p) + || (micromips_branch_reloc_p (r_type) && target_is_16_bit_code_p)) + { + (*_bfd_error_handler) + (_("MIPS16 and microMIPS functions cannot call each other")); + return bfd_reloc_notsupported; + } + /* Calls from 16-bit code to 32-bit code and vice versa require the - mode change. */ - *cross_mode_jump_p = !info->relocatable - && ((r_type == R_MIPS16_26 && !target_is_16_bit_code_p) - || ((r_type == R_MIPS_26 || r_type == R_MIPS_JALR) - && target_is_16_bit_code_p)); + mode change. However, we can ignore calls to undefined weak symbols, + which should never be executed at runtime. This exception is important + because the assembly writer may have "known" that any definition of the + symbol would be 16-bit code, and that direct jumps were therefore + acceptable. */ + *cross_mode_jump_p = (!info->relocatable + && !(h && h->root.root.type == bfd_link_hash_undefweak) + && ((r_type == R_MIPS16_26 && !target_is_16_bit_code_p) + || (r_type == R_MICROMIPS_26_S1 + && !target_is_micromips_code_p) + || ((r_type == R_MIPS_26 || r_type == R_MIPS_JALR) + && (target_is_16_bit_code_p + || target_is_micromips_code_p)))); local_p = h == NULL || SYMBOL_REFERENCES_LOCAL (info, &h->root); @@ -5148,11 +5285,13 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, if (gnu_local_gp_p) symbol = gp; - /* Global R_MIPS_GOT_PAGE relocations are equivalent to R_MIPS_GOT_DISP. - The addend is applied by the corresponding R_MIPS_GOT_OFST. */ - if (r_type == R_MIPS_GOT_PAGE && !local_p) + /* Global R_MIPS_GOT_PAGE/R_MICROMIPS_GOT_PAGE relocations are equivalent + to R_MIPS_GOT_DISP/R_MICROMIPS_GOT_DISP. The addend is applied by the + corresponding R_MIPS_GOT_OFST/R_MICROMIPS_GOT_OFST. */ + if (got_page_reloc_p (r_type) && !local_p) { - r_type = R_MIPS_GOT_DISP; + r_type = (micromips_reloc_p (r_type) + ? R_MICROMIPS_GOT_DISP : R_MIPS_GOT_DISP); addend = 0; } @@ -5169,11 +5308,21 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, case R_MIPS_CALL_HI16: case R_MIPS_GOT_LO16: case R_MIPS_CALL_LO16: + case R_MICROMIPS_CALL16: + case R_MICROMIPS_GOT16: + case R_MICROMIPS_GOT_DISP: + case R_MICROMIPS_GOT_HI16: + case R_MICROMIPS_CALL_HI16: + case R_MICROMIPS_GOT_LO16: + case R_MICROMIPS_CALL_LO16: case R_MIPS_TLS_GD: case R_MIPS_TLS_GOTTPREL: case R_MIPS_TLS_LDM: + case R_MICROMIPS_TLS_GD: + case R_MICROMIPS_TLS_GOTTPREL: + case R_MICROMIPS_TLS_LDM: /* Find the index into the GOT where this value is located. */ - if (r_type == R_MIPS_TLS_LDM) + if (tls_ldm_reloc_p (r_type)) { g = mips_elf_local_got_index (abfd, input_bfd, info, 0, 0, NULL, r_type); @@ -5185,8 +5334,8 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, /* On VxWorks, CALL relocations should refer to the .got.plt entry, which is initialized to point at the PLT stub. */ if (htab->is_vxworks - && (r_type == R_MIPS_CALL_HI16 - || r_type == R_MIPS_CALL_LO16 + && (call_hi16_reloc_p (r_type) + || call_lo16_reloc_p (r_type) || call16_reloc_p (r_type))) { BFD_ASSERT (addend == 0); @@ -5314,18 +5463,31 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, mips_elf_perform_relocation. So, we just fall through to the R_MIPS_26 case here. */ case R_MIPS_26: - if (was_local_p) - value = ((addend | ((p + 4) & 0xf0000000)) + symbol) >> 2; - else - { - value = (_bfd_mips_elf_sign_extend (addend, 28) + symbol) >> 2; - if (h->root.root.type != bfd_link_hash_undefweak) - overflowed_p = (value >> 26) != ((p + 4) >> 28); - } - value &= howto->dst_mask; + case R_MICROMIPS_26_S1: + { + unsigned int shift; + + /* Make sure the target of JALX is word-aligned. Bit 0 must be + the correct ISA mode selector and bit 1 must be 0. */ + if (*cross_mode_jump_p && (symbol & 3) != (r_type == R_MIPS_26)) + return bfd_reloc_outofrange; + + /* Shift is 2, unusually, for microMIPS JALX. */ + shift = (!*cross_mode_jump_p && r_type == R_MICROMIPS_26_S1) ? 1 : 2; + + if (was_local_p) + value = addend | ((p + 4) & (0xfc000000 << shift)); + else + value = _bfd_mips_elf_sign_extend (addend, 26 + shift); + value = (value + symbol) >> shift; + if (!was_local_p && h->root.root.type != bfd_link_hash_undefweak) + overflowed_p = (value >> 26) != ((p + 4) >> (26 + shift)); + value &= howto->dst_mask; + } break; case R_MIPS_TLS_DTPREL_HI16: + case R_MICROMIPS_TLS_DTPREL_HI16: value = (mips_elf_high (addend + symbol - dtprel_base (info)) & howto->dst_mask); break; @@ -5333,20 +5495,24 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, case R_MIPS_TLS_DTPREL_LO16: case R_MIPS_TLS_DTPREL32: case R_MIPS_TLS_DTPREL64: + case R_MICROMIPS_TLS_DTPREL_LO16: value = (symbol + addend - dtprel_base (info)) & howto->dst_mask; break; case R_MIPS_TLS_TPREL_HI16: + case R_MICROMIPS_TLS_TPREL_HI16: value = (mips_elf_high (addend + symbol - tprel_base (info)) & howto->dst_mask); break; case R_MIPS_TLS_TPREL_LO16: + case R_MICROMIPS_TLS_TPREL_LO16: value = (symbol + addend - tprel_base (info)) & howto->dst_mask; break; case R_MIPS_HI16: case R_MIPS16_HI16: + case R_MICROMIPS_HI16: if (!gp_disp_p) { value = mips_elf_high (addend + symbol); @@ -5365,6 +5531,11 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, both reloc addends by 4. */ if (r_type == R_MIPS16_HI16) value = mips_elf_high (addend + gp - p - 4); + /* The microMIPS .cpload sequence uses the same assembly + instructions as the traditional psABI version, but the + incoming $t9 has the low bit set. */ + else if (r_type == R_MICROMIPS_HI16) + value = mips_elf_high (addend + gp - p - 1); else value = mips_elf_high (addend + gp - p); overflowed_p = mips_elf_overflow_p (value, 16); @@ -5373,6 +5544,8 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, case R_MIPS_LO16: case R_MIPS16_LO16: + case R_MICROMIPS_LO16: + case R_MICROMIPS_HI0_LO16: if (!gp_disp_p) value = (symbol + addend) & howto->dst_mask; else @@ -5381,6 +5554,9 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, for this conditional. */ if (r_type == R_MIPS16_LO16) value = addend + gp - p; + else if (r_type == R_MICROMIPS_LO16 + || r_type == R_MICROMIPS_HI0_LO16) + value = addend + gp - p + 3; else value = addend + gp - p + 4; /* The MIPS ABI requires checking the R_MIPS_LO16 relocation @@ -5403,6 +5579,7 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, break; case R_MIPS_LITERAL: + case R_MICROMIPS_LITERAL: /* Because we don't merge literal sections, we can handle this just like R_MIPS_GPREL16. In the long run, we should merge shared literals, and then we will need to additional work @@ -5416,6 +5593,8 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, order. We don't need to do anything special here; the differences are handled in mips_elf_perform_relocation. */ case R_MIPS_GPREL16: + case R_MICROMIPS_GPREL7_S2: + case R_MICROMIPS_GPREL16: /* Only sign-extend the addend if it was extracted from the instruction. If the addend was separate, leave it alone, otherwise we may lose significant bits. */ @@ -5436,6 +5615,8 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, case R_MIPS16_CALL16: case R_MIPS_GOT16: case R_MIPS_CALL16: + case R_MICROMIPS_GOT16: + case R_MICROMIPS_CALL16: /* VxWorks does not have separate local and global semantics for R_MIPS*_GOT16; every relocation evaluates to "G". */ if (!htab->is_vxworks && local_p) @@ -5456,6 +5637,10 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, case R_MIPS_TLS_GOTTPREL: case R_MIPS_TLS_LDM: case R_MIPS_GOT_DISP: + case R_MICROMIPS_TLS_GD: + case R_MICROMIPS_TLS_GOTTPREL: + case R_MICROMIPS_TLS_LDM: + case R_MICROMIPS_GOT_DISP: value = g; overflowed_p = mips_elf_overflow_p (value, 16); break; @@ -5474,8 +5659,38 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, value &= howto->dst_mask; break; + case R_MICROMIPS_PC7_S1: + value = symbol + _bfd_mips_elf_sign_extend (addend, 8) - p; + overflowed_p = mips_elf_overflow_p (value, 8); + value >>= howto->rightshift; + value &= howto->dst_mask; + break; + + case R_MICROMIPS_PC10_S1: + value = symbol + _bfd_mips_elf_sign_extend (addend, 11) - p; + overflowed_p = mips_elf_overflow_p (value, 11); + value >>= howto->rightshift; + value &= howto->dst_mask; + break; + + case R_MICROMIPS_PC16_S1: + value = symbol + _bfd_mips_elf_sign_extend (addend, 17) - p; + overflowed_p = mips_elf_overflow_p (value, 17); + value >>= howto->rightshift; + value &= howto->dst_mask; + break; + + case R_MICROMIPS_PC23_S2: + value = symbol + _bfd_mips_elf_sign_extend (addend, 25) - ((p | 3) ^ 3); + overflowed_p = mips_elf_overflow_p (value, 25); + value >>= howto->rightshift; + value &= howto->dst_mask; + break; + case R_MIPS_GOT_HI16: case R_MIPS_CALL_HI16: + case R_MICROMIPS_GOT_HI16: + case R_MICROMIPS_CALL_HI16: /* We're allowed to handle these two relocations identically. The dynamic linker is allowed to handle the CALL relocations differently by creating a lazy evaluation stub. */ @@ -5486,10 +5701,13 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, case R_MIPS_GOT_LO16: case R_MIPS_CALL_LO16: + case R_MICROMIPS_GOT_LO16: + case R_MICROMIPS_CALL_LO16: value = g & howto->dst_mask; break; case R_MIPS_GOT_PAGE: + case R_MICROMIPS_GOT_PAGE: value = mips_elf_got_page (abfd, input_bfd, info, symbol + addend, NULL); if (value == MINUS_ONE) return bfd_reloc_outofrange; @@ -5498,6 +5716,7 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, break; case R_MIPS_GOT_OFST: + case R_MICROMIPS_GOT_OFST: if (local_p) mips_elf_got_page (abfd, input_bfd, info, symbol + addend, &value); else @@ -5506,26 +5725,31 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, break; case R_MIPS_SUB: + case R_MICROMIPS_SUB: value = symbol - addend; value &= howto->dst_mask; break; case R_MIPS_HIGHER: + case R_MICROMIPS_HIGHER: value = mips_elf_higher (addend + symbol); value &= howto->dst_mask; break; case R_MIPS_HIGHEST: + case R_MICROMIPS_HIGHEST: value = mips_elf_highest (addend + symbol); value &= howto->dst_mask; break; case R_MIPS_SCN_DISP: + case R_MICROMIPS_SCN_DISP: value = symbol + addend - sec->output_offset; value &= howto->dst_mask; break; case R_MIPS_JALR: + case R_MICROMIPS_JALR: /* This relocation is only a hint. In some cases, we optimize it into a bal instruction. But we don't try to optimize when the symbol does not resolve locally. */ @@ -5571,7 +5795,7 @@ mips_elf_obtain_contents (reloc_howto_type *howto, appropriate position. The SECTION is the section to which the relocation applies. CROSS_MODE_JUMP_P is true if the relocation field - is a MIPS16 jump to non-MIPS16 code, or vice versa. + is a MIPS16 or microMIPS jump to standard MIPS code, or vice versa. Returns FALSE if anything goes wrong. */ @@ -5590,7 +5814,7 @@ mips_elf_perform_relocation (struct bfd_link_info *info, /* Figure out where the relocation is occurring. */ location = contents + relocation->r_offset; - _bfd_mips16_elf_reloc_unshuffle (input_bfd, r_type, FALSE, location); + _bfd_mips_elf_reloc_unshuffle (input_bfd, r_type, FALSE, location); /* Obtain the current value. */ x = mips_elf_obtain_contents (howto, relocation, input_bfd, contents); @@ -5614,6 +5838,11 @@ mips_elf_perform_relocation (struct bfd_link_info *info, ok = ((opcode == 0x6) || (opcode == 0x7)); jalx_opcode = 0x7; } + else if (r_type == R_MICROMIPS_26_S1) + { + ok = ((opcode == 0x3d) || (opcode == 0x3c)); + jalx_opcode = 0x3c; + } else { ok = ((opcode == 0x3) || (opcode == 0x1d)); @@ -5675,8 +5904,8 @@ mips_elf_perform_relocation (struct bfd_link_info *info, /* Put the value into the output. */ bfd_put (8 * bfd_get_reloc_size (howto), input_bfd, x, location); - _bfd_mips16_elf_reloc_shuffle(input_bfd, r_type, !info->relocatable, - location); + _bfd_mips_elf_reloc_shuffle (input_bfd, r_type, !info->relocatable, + location); return TRUE; } @@ -6137,13 +6366,18 @@ _bfd_mips_elf_symbol_processing (bfd *abfd, asymbol *asym) break; } - /* If this is an odd-valued function symbol, assume it's a MIPS16 one. */ + /* If this is an odd-valued function symbol, assume it's a MIPS16 + or microMIPS one. */ if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_FUNC && (asym->value & 1) != 0) { asym->value--; - elfsym->internal_elf_sym.st_other - = ELF_ST_SET_MIPS16 (elfsym->internal_elf_sym.st_other); + if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_MICROMIPS) + elfsym->internal_elf_sym.st_other + = ELF_ST_SET_MICROMIPS (elfsym->internal_elf_sym.st_other); + else + elfsym->internal_elf_sym.st_other + = ELF_ST_SET_MIPS16 (elfsym->internal_elf_sym.st_other); } } @@ -6852,7 +7086,7 @@ _bfd_mips_elf_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, /* If this is a mips16 text symbol, add 1 to the value to make it odd. This will cause something like .word SYM to come up with the right value when it is loaded into the PC. */ - if (ELF_ST_IS_MIPS16 (sym->st_other)) + if (ELF_ST_IS_COMPRESSED (sym->st_other)) ++*valp; return TRUE; @@ -6875,7 +7109,7 @@ _bfd_mips_elf_link_output_symbol_hook && strcmp (input_sec->name, ".scommon") == 0) sym->st_shndx = SHN_MIPS_SCOMMON; - if (ELF_ST_IS_MIPS16 (sym->st_other)) + if (ELF_ST_IS_COMPRESSED (sym->st_other)) sym->st_value &= ~1; return 1; @@ -7126,9 +7360,9 @@ mips_elf_read_rel_addend (bfd *abfd, const Elf_Internal_Rela *rel, location = contents + rel->r_offset; /* Get the addend, which is stored in the input file. */ - _bfd_mips16_elf_reloc_unshuffle (abfd, r_type, FALSE, location); + _bfd_mips_elf_reloc_unshuffle (abfd, r_type, FALSE, location); addend = mips_elf_obtain_contents (howto, rel, abfd, contents); - _bfd_mips16_elf_reloc_shuffle (abfd, r_type, FALSE, location); + _bfd_mips_elf_reloc_shuffle (abfd, r_type, FALSE, location); return addend & howto->src_mask; } @@ -7153,6 +7387,8 @@ mips_elf_add_lo16_rel_addend (bfd *abfd, r_type = ELF_R_TYPE (abfd, rel->r_info); if (mips16_reloc_p (r_type)) lo16_type = R_MIPS16_LO16; + else if (micromips_reloc_p (r_type)) + lo16_type = R_MICROMIPS_LO16; else lo16_type = R_MIPS_LO16; @@ -7545,6 +7781,18 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_MIPS_TLS_GOTTPREL: case R_MIPS_TLS_GD: case R_MIPS_TLS_LDM: + case R_MICROMIPS_GOT16: + case R_MICROMIPS_CALL16: + case R_MICROMIPS_CALL_HI16: + case R_MICROMIPS_CALL_LO16: + case R_MICROMIPS_GOT_HI16: + case R_MICROMIPS_GOT_LO16: + case R_MICROMIPS_GOT_PAGE: + case R_MICROMIPS_GOT_OFST: + case R_MICROMIPS_GOT_DISP: + case R_MICROMIPS_TLS_GOTTPREL: + case R_MICROMIPS_TLS_GD: + case R_MICROMIPS_TLS_LDM: if (dynobj == NULL) elf_hash_table (info)->dynobj = dynobj = abfd; if (!mips_elf_create_got_section (dynobj, info)) @@ -7562,6 +7810,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, /* This is just a hint; it can safely be ignored. Don't set has_static_relocs for the corresponding symbol. */ case R_MIPS_JALR: + case R_MICROMIPS_JALR: break; case R_MIPS_32: @@ -7621,6 +7870,11 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_MIPS_26: case R_MIPS_PC16: case R_MIPS16_26: + case R_MICROMIPS_26_S1: + case R_MICROMIPS_PC7_S1: + case R_MICROMIPS_PC10_S1: + case R_MICROMIPS_PC16_S1: + case R_MICROMIPS_PC23_S2: if (h) ((struct mips_elf_link_hash_entry *) h)->has_static_relocs = TRUE; break; @@ -7646,9 +7900,9 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, info->flags |= DF_TEXTREL; } } - else if (r_type == R_MIPS_CALL_LO16 - || r_type == R_MIPS_GOT_LO16 - || r_type == R_MIPS_GOT_DISP + else if (call_lo16_reloc_p (r_type) + || got_lo16_reloc_p (r_type) + || got_disp_reloc_p (r_type) || (got16_reloc_p (r_type) && htab->is_vxworks)) { /* We may need a local GOT entry for this relocation. We @@ -7671,6 +7925,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, { case R_MIPS_CALL16: case R_MIPS16_CALL16: + case R_MICROMIPS_CALL16: if (h == NULL) { (*_bfd_error_handler) @@ -7683,6 +7938,8 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_MIPS_CALL_HI16: case R_MIPS_CALL_LO16: + case R_MICROMIPS_CALL_HI16: + case R_MICROMIPS_CALL_LO16: if (h != NULL) { /* Make sure there is room in the regular GOT to hold the @@ -7700,6 +7957,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, break; case R_MIPS_GOT_PAGE: + case R_MICROMIPS_GOT_PAGE: /* If this is a global, overridable symbol, GOT_PAGE will decay to GOT_DISP, so we'll need a GOT entry for it. */ if (h) @@ -7719,7 +7977,10 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_MIPS_GOT16: case R_MIPS_GOT_HI16: case R_MIPS_GOT_LO16: - if (!h || r_type == R_MIPS_GOT_PAGE) + case R_MICROMIPS_GOT16: + case R_MICROMIPS_GOT_HI16: + case R_MICROMIPS_GOT_LO16: + if (!h || got_page_reloc_p (r_type)) { /* This relocation needs (or may need, if h != NULL) a page entry in the GOT. For R_MIPS_GOT_PAGE we do not @@ -7743,23 +8004,25 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, if (!mips_elf_record_got_page_entry (info, abfd, r_symndx, addend)) return FALSE; - break; } /* Fall through. */ case R_MIPS_GOT_DISP: + case R_MICROMIPS_GOT_DISP: if (h && !mips_elf_record_global_got_symbol (h, abfd, info, FALSE, 0)) return FALSE; break; case R_MIPS_TLS_GOTTPREL: + case R_MICROMIPS_TLS_GOTTPREL: if (info->shared) info->flags |= DF_STATIC_TLS; /* Fall through */ case R_MIPS_TLS_LDM: - if (r_type == R_MIPS_TLS_LDM) + case R_MICROMIPS_TLS_LDM: + if (tls_ldm_reloc_p (r_type)) { r_symndx = STN_UNDEF; h = NULL; @@ -7767,14 +8030,15 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, /* Fall through */ case R_MIPS_TLS_GD: + case R_MICROMIPS_TLS_GD: /* This symbol requires a global offset table entry, or two for TLS GD relocations. */ { - unsigned char flag = (r_type == R_MIPS_TLS_GD - ? GOT_TLS_GD - : r_type == R_MIPS_TLS_LDM - ? GOT_TLS_LDM - : GOT_TLS_IE); + unsigned char flag; + + flag = (tls_gd_reloc_p (r_type) + ? GOT_TLS_GD + : tls_ldm_reloc_p (r_type) ? GOT_TLS_LDM : GOT_TLS_IE); if (h != NULL) { struct mips_elf_link_hash_entry *hmips = @@ -7855,6 +8119,10 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_MIPS_GPREL16: case R_MIPS_LITERAL: case R_MIPS_GPREL32: + case R_MICROMIPS_26_S1: + case R_MICROMIPS_GPREL16: + case R_MICROMIPS_LITERAL: + case R_MICROMIPS_GPREL7_S2: if (SGI_COMPAT (abfd)) mips_elf_hash_table (info)->compact_rel_size += sizeof (Elf32_External_crinfo); @@ -7895,6 +8163,10 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_MIPS_CALL_HI16: case R_MIPS_CALL_LO16: case R_MIPS_JALR: + case R_MICROMIPS_CALL16: + case R_MICROMIPS_CALL_HI16: + case R_MICROMIPS_CALL_LO16: + case R_MICROMIPS_JALR: break; } @@ -7925,6 +8197,9 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_MIPS_HI16: case R_MIPS_HIGHER: case R_MIPS_HIGHEST: + case R_MICROMIPS_HI16: + case R_MICROMIPS_HIGHER: + case R_MICROMIPS_HIGHEST: /* Don't refuse a high part relocation if it's against no symbol (e.g. part of a compound relocation). */ if (r_symndx == STN_UNDEF) @@ -7944,6 +8219,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_MIPS16_26: case R_MIPS_26: + case R_MICROMIPS_26_S1: howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, r_type, FALSE); (*_bfd_error_handler) (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"), @@ -8142,10 +8418,9 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) if (htab->is_vxworks && !info->shared) return TRUE; - /* Ignore indirect and warning symbols. All relocations against - such symbols will be redirected to the target symbol. */ - if (h->root.type == bfd_link_hash_indirect - || h->root.type == bfd_link_hash_warning) + /* Ignore indirect symbols. All relocations against such symbols + will be redirected to the target symbol. */ + if (h->root.type == bfd_link_hash_indirect) return TRUE; /* If this symbol is defined in a dynamic object, or we are creating @@ -8935,10 +9210,9 @@ mips_elf_adjust_addend (bfd *output_bfd, struct bfd_link_info *info, if (mips_elf_local_relocation_p (input_bfd, rel, local_sections)) { r_type = ELF_R_TYPE (output_bfd, rel->r_info); - if (r_type == R_MIPS16_GPREL - || r_type == R_MIPS_GPREL16 + if (gprel16_reloc_p (r_type) || r_type == R_MIPS_GPREL32 - || r_type == R_MIPS_LITERAL) + || literal_reloc_p (r_type)) { rel->r_addend += _bfd_get_gp_value (input_bfd); rel->r_addend -= _bfd_get_gp_value (output_bfd); @@ -9209,7 +9483,7 @@ _bfd_mips_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, BFD_ASSERT (name != NULL); if (!htab->small_data_overflow_reported && (gprel16_reloc_p (howto->type) - || howto->type == R_MIPS_LITERAL)) + || literal_reloc_p (howto->type))) { msg = _("small-data section exceeds 64KB;" " lower small-data size limit (see option -G)"); @@ -9227,6 +9501,16 @@ _bfd_mips_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, case bfd_reloc_ok: break; + case bfd_reloc_outofrange: + if (jal_reloc_p (howto->type)) + { + msg = _("JALX to a non-word-aligned address"); + info->callbacks->warning + (info, msg, name, input_bfd, input_section, rel->r_offset); + return FALSE; + } + /* Fall through. */ + default: abort (); break; @@ -9339,21 +9623,52 @@ mips_elf_create_la25_stub (void **slot, void *data) if (stub->stub_section != htab->strampoline) { - /* This is a simple LUI/ADIDU stub. Zero out the beginning + /* This is a simple LUI/ADDIU stub. Zero out the beginning of the section and write the two instructions at the end. */ memset (loc, 0, offset); loc += offset; - bfd_put_32 (hti->output_bfd, LA25_LUI (target_high), loc); - bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 4); + if (ELF_ST_IS_MICROMIPS (stub->h->root.other)) + { + bfd_put_16 (hti->output_bfd, LA25_LUI_MICROMIPS_1 (target_high), + loc); + bfd_put_16 (hti->output_bfd, LA25_LUI_MICROMIPS_2 (target_high), + loc + 2); + bfd_put_16 (hti->output_bfd, LA25_ADDIU_MICROMIPS_1 (target_low), + loc + 4); + bfd_put_16 (hti->output_bfd, LA25_ADDIU_MICROMIPS_2 (target_low), + loc + 6); + } + else + { + bfd_put_32 (hti->output_bfd, LA25_LUI (target_high), loc); + bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 4); + } } else { /* This is trampoline. */ loc += offset; - bfd_put_32 (hti->output_bfd, LA25_LUI (target_high), loc); - bfd_put_32 (hti->output_bfd, LA25_J (target), loc + 4); - bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 8); - bfd_put_32 (hti->output_bfd, 0, loc + 12); + if (ELF_ST_IS_MICROMIPS (stub->h->root.other)) + { + bfd_put_16 (hti->output_bfd, LA25_LUI_MICROMIPS_1 (target_high), + loc); + bfd_put_16 (hti->output_bfd, LA25_LUI_MICROMIPS_2 (target_high), + loc + 2); + bfd_put_16 (hti->output_bfd, LA25_J_MICROMIPS_1 (target), loc + 4); + bfd_put_16 (hti->output_bfd, LA25_J_MICROMIPS_2 (target), loc + 6); + bfd_put_16 (hti->output_bfd, LA25_ADDIU_MICROMIPS_1 (target_low), + loc + 8); + bfd_put_16 (hti->output_bfd, LA25_ADDIU_MICROMIPS_2 (target_low), + loc + 10); + bfd_put_32 (hti->output_bfd, 0, loc + 12); + } + else + { + bfd_put_32 (hti->output_bfd, LA25_LUI (target_high), loc); + bfd_put_32 (hti->output_bfd, LA25_J (target), loc + 4); + bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 8); + bfd_put_32 (hti->output_bfd, 0, loc + 12); + } } return TRUE; } @@ -9916,8 +10231,8 @@ _bfd_mips_vxworks_finish_dynamic_symbol (bfd *output_bfd, ++htab->srelbss->reloc_count; } - /* If this is a mips16 symbol, force the value to be even. */ - if (ELF_ST_IS_MIPS16 (sym->st_other)) + /* If this is a mips16/microMIPS symbol, force the value to be even. */ + if (ELF_ST_IS_COMPRESSED (sym->st_other)) sym->st_value &= ~1; return TRUE; @@ -11038,6 +11353,15 @@ _bfd_mips_elf_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED, case R_MIPS_GOT_DISP: case R_MIPS_GOT_PAGE: case R_MIPS_GOT_OFST: + case R_MICROMIPS_GOT16: + case R_MICROMIPS_CALL16: + case R_MICROMIPS_CALL_HI16: + case R_MICROMIPS_CALL_LO16: + case R_MICROMIPS_GOT_HI16: + case R_MICROMIPS_GOT_LO16: + case R_MICROMIPS_GOT_DISP: + case R_MICROMIPS_GOT_PAGE: + case R_MICROMIPS_GOT_OFST: /* ??? It would seem that the existing MIPS code does no sort of reference counting or whatnot on its GOT and PLT entries, so it is not possible to garbage collect them at this time. */ @@ -11211,6 +11535,15 @@ _bfd_mips_elf_write_section (bfd *output_bfd, return TRUE; } +/* microMIPS code retains local labels for linker relaxation. Omit them + from output by default for clarity. */ + +bfd_boolean +_bfd_mips_elf_is_target_special_symbol (bfd *abfd, asymbol *sym) +{ + return _bfd_elf_is_local_label_name (abfd, sym->name); +} + /* MIPS ELF uses a special find_nearest_line routine in order the handle the ECOFF debugging information. */ @@ -11536,6 +11869,902 @@ error_return: return NULL; } +static bfd_boolean +mips_elf_relax_delete_bytes (bfd *abfd, + asection *sec, bfd_vma addr, int count) +{ + Elf_Internal_Shdr *symtab_hdr; + unsigned int sec_shndx; + bfd_byte *contents; + Elf_Internal_Rela *irel, *irelend; + Elf_Internal_Sym *isym; + Elf_Internal_Sym *isymend; + struct elf_link_hash_entry **sym_hashes; + struct elf_link_hash_entry **end_hashes; + struct elf_link_hash_entry **start_hashes; + unsigned int symcount; + + sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); + contents = elf_section_data (sec)->this_hdr.contents; + + irel = elf_section_data (sec)->relocs; + irelend = irel + sec->reloc_count; + + /* Actually delete the bytes. */ + memmove (contents + addr, contents + addr + count, + (size_t) (sec->size - addr - count)); + sec->size -= count; + + /* Adjust all the relocs. */ + for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) + { + /* Get the new reloc address. */ + if (irel->r_offset > addr) + irel->r_offset -= count; + } + + BFD_ASSERT (addr % 2 == 0); + BFD_ASSERT (count % 2 == 0); + + /* Adjust the local symbols defined in this section. */ + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + isym = (Elf_Internal_Sym *) symtab_hdr->contents; + for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) + if (isym->st_shndx == sec_shndx && isym->st_value > addr) + isym->st_value -= count; + + /* Now adjust the global symbols defined in this section. */ + symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) + - symtab_hdr->sh_info); + sym_hashes = start_hashes = elf_sym_hashes (abfd); + end_hashes = sym_hashes + symcount; + + for (; sym_hashes < end_hashes; sym_hashes++) + { + struct elf_link_hash_entry *sym_hash = *sym_hashes; + + if ((sym_hash->root.type == bfd_link_hash_defined + || sym_hash->root.type == bfd_link_hash_defweak) + && sym_hash->root.u.def.section == sec) + { + bfd_vma value = sym_hash->root.u.def.value; + + if (ELF_ST_IS_MICROMIPS (sym_hash->other)) + value &= MINUS_TWO; + if (value > addr) + sym_hash->root.u.def.value -= count; + } + } + + return TRUE; +} + + +/* Opcodes needed for microMIPS relaxation as found in + opcodes/micromips-opc.c. */ + +struct opcode_descriptor { + unsigned long match; + unsigned long mask; +}; + +/* The $ra register aka $31. */ + +#define RA 31 + +/* 32-bit instruction format register fields. */ + +#define OP32_SREG(opcode) (((opcode) >> 16) & 0x1f) +#define OP32_TREG(opcode) (((opcode) >> 21) & 0x1f) + +/* Check if a 5-bit register index can be abbreviated to 3 bits. */ + +#define OP16_VALID_REG(r) \ + ((2 <= (r) && (r) <= 7) || (16 <= (r) && (r) <= 17)) + + +/* 32-bit and 16-bit branches. */ + +static const struct opcode_descriptor b_insns_32[] = { + { /* "b", "p", */ 0x40400000, 0xffff0000 }, /* bgez 0 */ + { /* "b", "p", */ 0x94000000, 0xffff0000 }, /* beq 0, 0 */ + { 0, 0 } /* End marker for find_match(). */ +}; + +static const struct opcode_descriptor bc_insn_32 = + { /* "bc(1|2)(ft)", "N,p", */ 0x42800000, 0xfec30000 }; + +static const struct opcode_descriptor bz_insn_32 = + { /* "b(g|l)(e|t)z", "s,p", */ 0x40000000, 0xff200000 }; + +static const struct opcode_descriptor bzal_insn_32 = + { /* "b(ge|lt)zal", "s,p", */ 0x40200000, 0xffa00000 }; + +static const struct opcode_descriptor beq_insn_32 = + { /* "b(eq|ne)", "s,t,p", */ 0x94000000, 0xdc000000 }; + +static const struct opcode_descriptor b_insn_16 = + { /* "b", "mD", */ 0xcc00, 0xfc00 }; + +static const struct opcode_descriptor bz_insn_16 = + { /* "b(eq|ne)z", "md,mE", */ 0x8c00, 0xdc00 }; + + +/* 32-bit and 16-bit branch EQ and NE zero. */ + +/* NOTE: All opcode tables have BEQ/BNE in the same order: first the + eq and second the ne. This convention is used when replacing a + 32-bit BEQ/BNE with the 16-bit version. */ + +#define BZC32_REG_FIELD(r) (((r) & 0x1f) << 16) + +static const struct opcode_descriptor bz_rs_insns_32[] = { + { /* "beqz", "s,p", */ 0x94000000, 0xffe00000 }, + { /* "bnez", "s,p", */ 0xb4000000, 0xffe00000 }, + { 0, 0 } /* End marker for find_match(). */ +}; + +static const struct opcode_descriptor bz_rt_insns_32[] = { + { /* "beqz", "t,p", */ 0x94000000, 0xfc01f000 }, + { /* "bnez", "t,p", */ 0xb4000000, 0xfc01f000 }, + { 0, 0 } /* End marker for find_match(). */ +}; + +static const struct opcode_descriptor bzc_insns_32[] = { + { /* "beqzc", "s,p", */ 0x40e00000, 0xffe00000 }, + { /* "bnezc", "s,p", */ 0x40a00000, 0xffe00000 }, + { 0, 0 } /* End marker for find_match(). */ +}; + +static const struct opcode_descriptor bz_insns_16[] = { + { /* "beqz", "md,mE", */ 0x8c00, 0xfc00 }, + { /* "bnez", "md,mE", */ 0xac00, 0xfc00 }, + { 0, 0 } /* End marker for find_match(). */ +}; + +/* Switch between a 5-bit register index and its 3-bit shorthand. */ + +#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0x17) + 2) +#define BZ16_REG_FIELD(r) \ + (((2 <= (r) && (r) <= 7) ? (r) : ((r) - 16)) << 7) + + +/* 32-bit instructions with a delay slot. */ + +static const struct opcode_descriptor jal_insn_32_bd16 = + { /* "jals", "a", */ 0x74000000, 0xfc000000 }; + +static const struct opcode_descriptor jal_insn_32_bd32 = + { /* "jal", "a", */ 0xf4000000, 0xfc000000 }; + +static const struct opcode_descriptor jal_x_insn_32_bd32 = + { /* "jal[x]", "a", */ 0xf0000000, 0xf8000000 }; + +static const struct opcode_descriptor j_insn_32 = + { /* "j", "a", */ 0xd4000000, 0xfc000000 }; + +static const struct opcode_descriptor jalr_insn_32 = + { /* "jalr[.hb]", "t,s", */ 0x00000f3c, 0xfc00efff }; + +/* This table can be compacted, because no opcode replacement is made. */ + +static const struct opcode_descriptor ds_insns_32_bd16[] = { + { /* "jals", "a", */ 0x74000000, 0xfc000000 }, + + { /* "jalrs[.hb]", "t,s", */ 0x00004f3c, 0xfc00efff }, + { /* "b(ge|lt)zals", "s,p", */ 0x42200000, 0xffa00000 }, + + { /* "b(g|l)(e|t)z", "s,p", */ 0x40000000, 0xff200000 }, + { /* "b(eq|ne)", "s,t,p", */ 0x94000000, 0xdc000000 }, + { /* "j", "a", */ 0xd4000000, 0xfc000000 }, + { 0, 0 } /* End marker for find_match(). */ +}; + +/* This table can be compacted, because no opcode replacement is made. */ + +static const struct opcode_descriptor ds_insns_32_bd32[] = { + { /* "jal[x]", "a", */ 0xf0000000, 0xf8000000 }, + + { /* "jalr[.hb]", "t,s", */ 0x00000f3c, 0xfc00efff }, + { /* "b(ge|lt)zal", "s,p", */ 0x40200000, 0xffa00000 }, + { 0, 0 } /* End marker for find_match(). */ +}; + + +/* 16-bit instructions with a delay slot. */ + +static const struct opcode_descriptor jalr_insn_16_bd16 = + { /* "jalrs", "my,mj", */ 0x45e0, 0xffe0 }; + +static const struct opcode_descriptor jalr_insn_16_bd32 = + { /* "jalr", "my,mj", */ 0x45c0, 0xffe0 }; + +static const struct opcode_descriptor jr_insn_16 = + { /* "jr", "mj", */ 0x4580, 0xffe0 }; + +#define JR16_REG(opcode) ((opcode) & 0x1f) + +/* This table can be compacted, because no opcode replacement is made. */ + +static const struct opcode_descriptor ds_insns_16_bd16[] = { + { /* "jalrs", "my,mj", */ 0x45e0, 0xffe0 }, + + { /* "b", "mD", */ 0xcc00, 0xfc00 }, + { /* "b(eq|ne)z", "md,mE", */ 0x8c00, 0xdc00 }, + { /* "jr", "mj", */ 0x4580, 0xffe0 }, + { 0, 0 } /* End marker for find_match(). */ +}; + + +/* LUI instruction. */ + +static const struct opcode_descriptor lui_insn = + { /* "lui", "s,u", */ 0x41a00000, 0xffe00000 }; + + +/* ADDIU instruction. */ + +static const struct opcode_descriptor addiu_insn = + { /* "addiu", "t,r,j", */ 0x30000000, 0xfc000000 }; + +static const struct opcode_descriptor addiupc_insn = + { /* "addiu", "mb,$pc,mQ", */ 0x78000000, 0xfc000000 }; + +#define ADDIUPC_REG_FIELD(r) \ + (((2 <= (r) && (r) <= 7) ? (r) : ((r) - 16)) << 23) + + +/* Relaxable instructions in a JAL delay slot: MOVE. */ + +/* The 16-bit move has rd in 9:5 and rs in 4:0. The 32-bit moves + (ADDU, OR) have rd in 15:11 and rs in 10:16. */ +#define MOVE32_RD(opcode) (((opcode) >> 11) & 0x1f) +#define MOVE32_RS(opcode) (((opcode) >> 16) & 0x1f) + +#define MOVE16_RD_FIELD(r) (((r) & 0x1f) << 5) +#define MOVE16_RS_FIELD(r) (((r) & 0x1f) ) + +static const struct opcode_descriptor move_insns_32[] = { + { /* "move", "d,s", */ 0x00000150, 0xffe007ff }, /* addu d,s,$0 */ + { /* "move", "d,s", */ 0x00000290, 0xffe007ff }, /* or d,s,$0 */ + { 0, 0 } /* End marker for find_match(). */ +}; + +static const struct opcode_descriptor move_insn_16 = + { /* "move", "mp,mj", */ 0x0c00, 0xfc00 }; + + +/* NOP instructions. */ + +static const struct opcode_descriptor nop_insn_32 = + { /* "nop", "", */ 0x00000000, 0xffffffff }; + +static const struct opcode_descriptor nop_insn_16 = + { /* "nop", "", */ 0x0c00, 0xffff }; + + +/* Instruction match support. */ + +#define MATCH(opcode, insn) ((opcode & insn.mask) == insn.match) + +static int +find_match (unsigned long opcode, const struct opcode_descriptor insn[]) +{ + unsigned long indx; + + for (indx = 0; insn[indx].mask != 0; indx++) + if (MATCH (opcode, insn[indx])) + return indx; + + return -1; +} + + +/* Branch and delay slot decoding support. */ + +/* If PTR points to what *might* be a 16-bit branch or jump, then + return the minimum length of its delay slot, otherwise return 0. + Non-zero results are not definitive as we might be checking against + the second half of another instruction. */ + +static int +check_br16_dslot (bfd *abfd, bfd_byte *ptr) +{ + unsigned long opcode; + int bdsize; + + opcode = bfd_get_16 (abfd, ptr); + if (MATCH (opcode, jalr_insn_16_bd32) != 0) + /* 16-bit branch/jump with a 32-bit delay slot. */ + bdsize = 4; + else if (MATCH (opcode, jalr_insn_16_bd16) != 0 + || find_match (opcode, ds_insns_16_bd16) >= 0) + /* 16-bit branch/jump with a 16-bit delay slot. */ + bdsize = 2; + else + /* No delay slot. */ + bdsize = 0; + + return bdsize; +} + +/* If PTR points to what *might* be a 32-bit branch or jump, then + return the minimum length of its delay slot, otherwise return 0. + Non-zero results are not definitive as we might be checking against + the second half of another instruction. */ + +static int +check_br32_dslot (bfd *abfd, bfd_byte *ptr) +{ + unsigned long opcode; + int bdsize; + + opcode = (bfd_get_16 (abfd, ptr) << 16) | bfd_get_16 (abfd, ptr + 2); + if (find_match (opcode, ds_insns_32_bd32) >= 0) + /* 32-bit branch/jump with a 32-bit delay slot. */ + bdsize = 4; + else if (find_match (opcode, ds_insns_32_bd16) >= 0) + /* 32-bit branch/jump with a 16-bit delay slot. */ + bdsize = 2; + else + /* No delay slot. */ + bdsize = 0; + + return bdsize; +} + +/* If PTR points to a 16-bit branch or jump with a 32-bit delay slot + that doesn't fiddle with REG, then return TRUE, otherwise FALSE. */ + +static bfd_boolean +check_br16 (bfd *abfd, bfd_byte *ptr, unsigned long reg) +{ + unsigned long opcode; + + opcode = bfd_get_16 (abfd, ptr); + if (MATCH (opcode, b_insn_16) + /* B16 */ + || (MATCH (opcode, jr_insn_16) && reg != JR16_REG (opcode)) + /* JR16 */ + || (MATCH (opcode, bz_insn_16) && reg != BZ16_REG (opcode)) + /* BEQZ16, BNEZ16 */ + || (MATCH (opcode, jalr_insn_16_bd32) + /* JALR16 */ + && reg != JR16_REG (opcode) && reg != RA)) + return TRUE; + + return FALSE; +} + +/* If PTR points to a 32-bit branch or jump that doesn't fiddle with REG, + then return TRUE, otherwise FALSE. */ + +static bfd_boolean +check_br32 (bfd *abfd, bfd_byte *ptr, unsigned long reg) +{ + unsigned long opcode; + + opcode = (bfd_get_16 (abfd, ptr) << 16) | bfd_get_16 (abfd, ptr + 2); + if (MATCH (opcode, j_insn_32) + /* J */ + || MATCH (opcode, bc_insn_32) + /* BC1F, BC1T, BC2F, BC2T */ + || (MATCH (opcode, jal_x_insn_32_bd32) && reg != RA) + /* JAL, JALX */ + || (MATCH (opcode, bz_insn_32) && reg != OP32_SREG (opcode)) + /* BGEZ, BGTZ, BLEZ, BLTZ */ + || (MATCH (opcode, bzal_insn_32) + /* BGEZAL, BLTZAL */ + && reg != OP32_SREG (opcode) && reg != RA) + || ((MATCH (opcode, jalr_insn_32) || MATCH (opcode, beq_insn_32)) + /* JALR, JALR.HB, BEQ, BNE */ + && reg != OP32_SREG (opcode) && reg != OP32_TREG (opcode))) + return TRUE; + + return FALSE; +} + +/* If the instruction encoding at PTR and relocations [INTERNAL_RELOCS, + IRELEND) at OFFSET indicate that there must be a compact branch there, + then return TRUE, otherwise FALSE. */ + +static bfd_boolean +check_relocated_bzc (bfd *abfd, const bfd_byte *ptr, bfd_vma offset, + const Elf_Internal_Rela *internal_relocs, + const Elf_Internal_Rela *irelend) +{ + const Elf_Internal_Rela *irel; + unsigned long opcode; + + opcode = bfd_get_16 (abfd, ptr); + opcode <<= 16; + opcode |= bfd_get_16 (abfd, ptr + 2); + if (find_match (opcode, bzc_insns_32) < 0) + return FALSE; + + for (irel = internal_relocs; irel < irelend; irel++) + if (irel->r_offset == offset + && ELF32_R_TYPE (irel->r_info) == R_MICROMIPS_PC16_S1) + return TRUE; + + return FALSE; +} + +/* Bitsize checking. */ +#define IS_BITSIZE(val, N) \ + (((((val) & ((1ULL << (N)) - 1)) ^ (1ULL << ((N) - 1))) \ + - (1ULL << ((N) - 1))) == (val)) + + +bfd_boolean +_bfd_mips_elf_relax_section (bfd *abfd, asection *sec, + struct bfd_link_info *link_info, + bfd_boolean *again) +{ + Elf_Internal_Shdr *symtab_hdr; + Elf_Internal_Rela *internal_relocs; + Elf_Internal_Rela *irel, *irelend; + bfd_byte *contents = NULL; + Elf_Internal_Sym *isymbuf = NULL; + + /* Assume nothing changes. */ + *again = FALSE; + + /* We don't have to do anything for a relocatable link, if + this section does not have relocs, or if this is not a + code section. */ + + if (link_info->relocatable + || (sec->flags & SEC_RELOC) == 0 + || sec->reloc_count == 0 + || (sec->flags & SEC_CODE) == 0) + return TRUE; + + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + + /* Get a copy of the native relocations. */ + internal_relocs = (_bfd_elf_link_read_relocs + (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL, + link_info->keep_memory)); + if (internal_relocs == NULL) + goto error_return; + + /* Walk through them looking for relaxing opportunities. */ + irelend = internal_relocs + sec->reloc_count; + for (irel = internal_relocs; irel < irelend; irel++) + { + unsigned long r_symndx = ELF32_R_SYM (irel->r_info); + unsigned int r_type = ELF32_R_TYPE (irel->r_info); + bfd_boolean target_is_micromips_code_p; + unsigned long opcode; + bfd_vma symval; + bfd_vma pcrval; + bfd_byte *ptr; + int fndopc; + + /* The number of bytes to delete for relaxation and from where + to delete these bytes starting at irel->r_offset. */ + int delcnt = 0; + int deloff = 0; + + /* If this isn't something that can be relaxed, then ignore + this reloc. */ + if (r_type != R_MICROMIPS_HI16 + && r_type != R_MICROMIPS_PC16_S1 + && r_type != R_MICROMIPS_26_S1) + continue; + + /* Get the section contents if we haven't done so already. */ + if (contents == NULL) + { + /* Get cached copy if it exists. */ + if (elf_section_data (sec)->this_hdr.contents != NULL) + contents = elf_section_data (sec)->this_hdr.contents; + /* Go get them off disk. */ + else if (!bfd_malloc_and_get_section (abfd, sec, &contents)) + goto error_return; + } + ptr = contents + irel->r_offset; + + /* Read this BFD's local symbols if we haven't done so already. */ + if (isymbuf == NULL && symtab_hdr->sh_info != 0) + { + isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; + if (isymbuf == NULL) + isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, + symtab_hdr->sh_info, 0, + NULL, NULL, NULL); + if (isymbuf == NULL) + goto error_return; + } + + /* Get the value of the symbol referred to by the reloc. */ + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ + Elf_Internal_Sym *isym; + asection *sym_sec; + + isym = isymbuf + r_symndx; + if (isym->st_shndx == SHN_UNDEF) + sym_sec = bfd_und_section_ptr; + else if (isym->st_shndx == SHN_ABS) + sym_sec = bfd_abs_section_ptr; + else if (isym->st_shndx == SHN_COMMON) + sym_sec = bfd_com_section_ptr; + else + sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); + symval = (isym->st_value + + sym_sec->output_section->vma + + sym_sec->output_offset); + target_is_micromips_code_p = ELF_ST_IS_MICROMIPS (isym->st_other); + } + else + { + unsigned long indx; + struct elf_link_hash_entry *h; + + /* An external symbol. */ + indx = r_symndx - symtab_hdr->sh_info; + h = elf_sym_hashes (abfd)[indx]; + BFD_ASSERT (h != NULL); + + if (h->root.type != bfd_link_hash_defined + && h->root.type != bfd_link_hash_defweak) + /* This appears to be a reference to an undefined + symbol. Just ignore it -- it will be caught by the + regular reloc processing. */ + continue; + + symval = (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + target_is_micromips_code_p = (!h->needs_plt + && ELF_ST_IS_MICROMIPS (h->other)); + } + + + /* For simplicity of coding, we are going to modify the + section contents, the section relocs, and the BFD symbol + table. We must tell the rest of the code not to free up this + information. It would be possible to instead create a table + of changes which have to be made, as is done in coff-mips.c; + that would be more work, but would require less memory when + the linker is run. */ + + /* Only 32-bit instructions relaxed. */ + if (irel->r_offset + 4 > sec->size) + continue; + + opcode = bfd_get_16 (abfd, ptr ) << 16; + opcode |= bfd_get_16 (abfd, ptr + 2); + + /* This is the pc-relative distance from the instruction the + relocation is applied to, to the symbol referred. */ + pcrval = (symval + - (sec->output_section->vma + sec->output_offset) + - irel->r_offset); + + /* R_MICROMIPS_HI16 / LUI relaxation to nil, performing relaxation + of corresponding R_MICROMIPS_LO16 to R_MICROMIPS_HI0_LO16 or + R_MICROMIPS_PC23_S2. The R_MICROMIPS_PC23_S2 condition is + + (symval % 4 == 0 && IS_BITSIZE (pcrval, 25)) + + where pcrval has first to be adjusted to apply against the LO16 + location (we make the adjustment later on, when we have figured + out the offset). */ + if (r_type == R_MICROMIPS_HI16 && MATCH (opcode, lui_insn)) + { + bfd_boolean bzc = FALSE; + unsigned long nextopc; + unsigned long reg; + bfd_vma offset; + + /* Give up if the previous reloc was a HI16 against this symbol + too. */ + if (irel > internal_relocs + && ELF32_R_TYPE (irel[-1].r_info) == R_MICROMIPS_HI16 + && ELF32_R_SYM (irel[-1].r_info) == r_symndx) + continue; + + /* Or if the next reloc is not a LO16 against this symbol. */ + if (irel + 1 >= irelend + || ELF32_R_TYPE (irel[1].r_info) != R_MICROMIPS_LO16 + || ELF32_R_SYM (irel[1].r_info) != r_symndx) + continue; + + /* Or if the second next reloc is a LO16 against this symbol too. */ + if (irel + 2 >= irelend + && ELF32_R_TYPE (irel[2].r_info) == R_MICROMIPS_LO16 + && ELF32_R_SYM (irel[2].r_info) == r_symndx) + continue; + + /* See if the LUI instruction *might* be in a branch delay slot. + We check whether what looks like a 16-bit branch or jump is + actually an immediate argument to a compact branch, and let + it through if so. */ + if (irel->r_offset >= 2 + && check_br16_dslot (abfd, ptr - 2) + && !(irel->r_offset >= 4 + && (bzc = check_relocated_bzc (abfd, + ptr - 4, irel->r_offset - 4, + internal_relocs, irelend)))) + continue; + if (irel->r_offset >= 4 + && !bzc + && check_br32_dslot (abfd, ptr - 4)) + continue; + + reg = OP32_SREG (opcode); + + /* We only relax adjacent instructions or ones separated with + a branch or jump that has a delay slot. The branch or jump + must not fiddle with the register used to hold the address. + Subtract 4 for the LUI itself. */ + offset = irel[1].r_offset - irel[0].r_offset; + switch (offset - 4) + { + case 0: + break; + case 2: + if (check_br16 (abfd, ptr + 4, reg)) + break; + continue; + case 4: + if (check_br32 (abfd, ptr + 4, reg)) + break; + continue; + default: + continue; + } + + nextopc = bfd_get_16 (abfd, contents + irel[1].r_offset ) << 16; + nextopc |= bfd_get_16 (abfd, contents + irel[1].r_offset + 2); + + /* Give up unless the same register is used with both + relocations. */ + if (OP32_SREG (nextopc) != reg) + continue; + + /* Now adjust pcrval, subtracting the offset to the LO16 reloc + and rounding up to take masking of the two LSBs into account. */ + pcrval = ((pcrval - offset + 3) | 3) ^ 3; + + /* R_MICROMIPS_LO16 relaxation to R_MICROMIPS_HI0_LO16. */ + if (IS_BITSIZE (symval, 16)) + { + /* Fix the relocation's type. */ + irel[1].r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_HI0_LO16); + + /* Instructions using R_MICROMIPS_LO16 have the base or + source register in bits 20:16. This register becomes $0 + (zero) as the result of the R_MICROMIPS_HI16 being 0. */ + nextopc &= ~0x001f0000; + bfd_put_16 (abfd, (nextopc >> 16) & 0xffff, + contents + irel[1].r_offset); + } + + /* R_MICROMIPS_LO16 / ADDIU relaxation to R_MICROMIPS_PC23_S2. + We add 4 to take LUI deletion into account while checking + the PC-relative distance. */ + else if (symval % 4 == 0 + && IS_BITSIZE (pcrval + 4, 25) + && MATCH (nextopc, addiu_insn) + && OP32_TREG (nextopc) == OP32_SREG (nextopc) + && OP16_VALID_REG (OP32_TREG (nextopc))) + { + /* Fix the relocation's type. */ + irel[1].r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_PC23_S2); + + /* Replace ADDIU with the ADDIUPC version. */ + nextopc = (addiupc_insn.match + | ADDIUPC_REG_FIELD (OP32_TREG (nextopc))); + + bfd_put_16 (abfd, (nextopc >> 16) & 0xffff, + contents + irel[1].r_offset); + bfd_put_16 (abfd, nextopc & 0xffff, + contents + irel[1].r_offset + 2); + } + + /* Can't do anything, give up, sigh... */ + else + continue; + + /* Fix the relocation's type. */ + irel->r_info = ELF32_R_INFO (r_symndx, R_MIPS_NONE); + + /* Delete the LUI instruction: 4 bytes at irel->r_offset. */ + delcnt = 4; + deloff = 0; + } + + /* Compact branch relaxation -- due to the multitude of macros + employed by the compiler/assembler, compact branches are not + always generated. Obviously, this can/will be fixed elsewhere, + but there is no drawback in double checking it here. */ + else if (r_type == R_MICROMIPS_PC16_S1 + && irel->r_offset + 5 < sec->size + && ((fndopc = find_match (opcode, bz_rs_insns_32)) >= 0 + || (fndopc = find_match (opcode, bz_rt_insns_32)) >= 0) + && MATCH (bfd_get_16 (abfd, ptr + 4), nop_insn_16)) + { + unsigned long reg; + + reg = OP32_SREG (opcode) ? OP32_SREG (opcode) : OP32_TREG (opcode); + + /* Replace BEQZ/BNEZ with the compact version. */ + opcode = (bzc_insns_32[fndopc].match + | BZC32_REG_FIELD (reg) + | (opcode & 0xffff)); /* Addend value. */ + + bfd_put_16 (abfd, (opcode >> 16) & 0xffff, ptr); + bfd_put_16 (abfd, opcode & 0xffff, ptr + 2); + + /* Delete the 16-bit delay slot NOP: two bytes from + irel->offset + 4. */ + delcnt = 2; + deloff = 4; + } + + /* R_MICROMIPS_PC16_S1 relaxation to R_MICROMIPS_PC10_S1. We need + to check the distance from the next instruction, so subtract 2. */ + else if (r_type == R_MICROMIPS_PC16_S1 + && IS_BITSIZE (pcrval - 2, 11) + && find_match (opcode, b_insns_32) >= 0) + { + /* Fix the relocation's type. */ + irel->r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_PC10_S1); + + /* Replace the the 32-bit opcode with a 16-bit opcode. */ + bfd_put_16 (abfd, + (b_insn_16.match + | (opcode & 0x3ff)), /* Addend value. */ + ptr); + + /* Delete 2 bytes from irel->r_offset + 2. */ + delcnt = 2; + deloff = 2; + } + + /* R_MICROMIPS_PC16_S1 relaxation to R_MICROMIPS_PC7_S1. We need + to check the distance from the next instruction, so subtract 2. */ + else if (r_type == R_MICROMIPS_PC16_S1 + && IS_BITSIZE (pcrval - 2, 8) + && (((fndopc = find_match (opcode, bz_rs_insns_32)) >= 0 + && OP16_VALID_REG (OP32_SREG (opcode))) + || ((fndopc = find_match (opcode, bz_rt_insns_32)) >= 0 + && OP16_VALID_REG (OP32_TREG (opcode))))) + { + unsigned long reg; + + reg = OP32_SREG (opcode) ? OP32_SREG (opcode) : OP32_TREG (opcode); + + /* Fix the relocation's type. */ + irel->r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_PC7_S1); + + /* Replace the the 32-bit opcode with a 16-bit opcode. */ + bfd_put_16 (abfd, + (bz_insns_16[fndopc].match + | BZ16_REG_FIELD (reg) + | (opcode & 0x7f)), /* Addend value. */ + ptr); + + /* Delete 2 bytes from irel->r_offset + 2. */ + delcnt = 2; + deloff = 2; + } + + /* R_MICROMIPS_26_S1 -- JAL to JALS relaxation for microMIPS targets. */ + else if (r_type == R_MICROMIPS_26_S1 + && target_is_micromips_code_p + && irel->r_offset + 7 < sec->size + && MATCH (opcode, jal_insn_32_bd32)) + { + unsigned long n32opc; + bfd_boolean relaxed = FALSE; + + n32opc = bfd_get_16 (abfd, ptr + 4) << 16; + n32opc |= bfd_get_16 (abfd, ptr + 6); + + if (MATCH (n32opc, nop_insn_32)) + { + /* Replace delay slot 32-bit NOP with a 16-bit NOP. */ + bfd_put_16 (abfd, nop_insn_16.match, ptr + 4); + + relaxed = TRUE; + } + else if (find_match (n32opc, move_insns_32) >= 0) + { + /* Replace delay slot 32-bit MOVE with 16-bit MOVE. */ + bfd_put_16 (abfd, + (move_insn_16.match + | MOVE16_RD_FIELD (MOVE32_RD (n32opc)) + | MOVE16_RS_FIELD (MOVE32_RS (n32opc))), + ptr + 4); + + relaxed = TRUE; + } + /* Other 32-bit instructions relaxable to 16-bit + instructions will be handled here later. */ + + if (relaxed) + { + /* JAL with 32-bit delay slot that is changed to a JALS + with 16-bit delay slot. */ + bfd_put_16 (abfd, (jal_insn_32_bd16.match >> 16) & 0xffff, + ptr); + bfd_put_16 (abfd, jal_insn_32_bd16.match & 0xffff, + ptr + 2); + + /* Delete 2 bytes from irel->r_offset + 6. */ + delcnt = 2; + deloff = 6; + } + } + + if (delcnt != 0) + { + /* Note that we've changed the relocs, section contents, etc. */ + elf_section_data (sec)->relocs = internal_relocs; + elf_section_data (sec)->this_hdr.contents = contents; + symtab_hdr->contents = (unsigned char *) isymbuf; + + /* Delete bytes depending on the delcnt and deloff. */ + if (!mips_elf_relax_delete_bytes (abfd, sec, + irel->r_offset + deloff, delcnt)) + goto error_return; + + /* That will change things, so we should relax again. + Note that this is not required, and it may be slow. */ + *again = TRUE; + } + } + + if (isymbuf != NULL + && symtab_hdr->contents != (unsigned char *) isymbuf) + { + if (! link_info->keep_memory) + free (isymbuf); + else + { + /* Cache the symbols for elf_link_input_bfd. */ + symtab_hdr->contents = (unsigned char *) isymbuf; + } + } + + if (contents != NULL + && elf_section_data (sec)->this_hdr.contents != contents) + { + if (! link_info->keep_memory) + free (contents); + else + { + /* Cache the section contents for elf_link_input_bfd. */ + elf_section_data (sec)->this_hdr.contents = contents; + } + } + + if (internal_relocs != NULL + && elf_section_data (sec)->relocs != internal_relocs) + free (internal_relocs); + + return TRUE; + + error_return: + if (isymbuf != NULL + && symtab_hdr->contents != (unsigned char *) isymbuf) + free (isymbuf); + if (contents != NULL + && elf_section_data (sec)->this_hdr.contents != contents) + free (contents); + if (internal_relocs != NULL + && elf_section_data (sec)->relocs != internal_relocs) + free (internal_relocs); + + return FALSE; +} + /* Create a MIPS ELF linker hash table. */ struct bfd_link_hash_table * @@ -12526,7 +13755,7 @@ _bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) bfd_boolean null_input_bfd = TRUE; asection *sec; - /* Check if we have the same endianess */ + /* Check if we have the same endianness. */ if (! _bfd_generic_verify_endian_match (ibfd, obfd)) { (*_bfd_error_handler) @@ -12703,9 +13932,27 @@ _bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) old_flags &= ~EF_MIPS_ABI; } - /* For now, allow arbitrary mixing of ASEs (retain the union). */ + /* Compare ASEs. Forbid linking MIPS16 and microMIPS ASE modules together + and allow arbitrary mixing of the remaining ASEs (retain the union). */ if ((new_flags & EF_MIPS_ARCH_ASE) != (old_flags & EF_MIPS_ARCH_ASE)) { + int old_micro = old_flags & EF_MIPS_ARCH_ASE_MICROMIPS; + int new_micro = new_flags & EF_MIPS_ARCH_ASE_MICROMIPS; + int old_m16 = old_flags & EF_MIPS_ARCH_ASE_M16; + int new_m16 = new_flags & EF_MIPS_ARCH_ASE_M16; + int micro_mis = old_m16 && new_micro; + int m16_mis = old_micro && new_m16; + + if (m16_mis || micro_mis) + { + (*_bfd_error_handler) + (_("%B: ASE mismatch: linking %s module with previous %s modules"), + ibfd, + m16_mis ? "MIPS16" : "microMIPS", + m16_mis ? "microMIPS" : "MIPS16"); + ok = FALSE; + } + elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ARCH_ASE; new_flags &= ~ EF_MIPS_ARCH_ASE; @@ -12900,6 +14147,9 @@ _bfd_mips_elf_print_private_bfd_data (bfd *abfd, void *ptr) if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_M16) fprintf (file, " [mips16]"); + if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_MICROMIPS) + fprintf (file, " [micromips]"); + if (elf_elfheader (abfd)->e_flags & EF_MIPS_32BITMODE) fprintf (file, " [32bitmode]"); else diff --git a/bfd/elfxx-mips.h b/bfd/elfxx-mips.h index 85cbfb8..8cb7e3b 100644 --- a/bfd/elfxx-mips.h +++ b/bfd/elfxx-mips.h @@ -82,6 +82,8 @@ extern void _bfd_mips_elf_copy_indirect_symbol struct elf_link_hash_entry *); extern bfd_boolean _bfd_mips_elf_ignore_discarded_relocs (asection *); +extern bfd_boolean _bfd_mips_elf_is_target_special_symbol + (bfd *abfd, asymbol *sym); extern bfd_boolean _bfd_mips_elf_find_nearest_line (bfd *, asection *, asymbol **, bfd_vma, const char **, const char **, unsigned int *); @@ -92,6 +94,9 @@ extern bfd_boolean _bfd_mips_elf_set_section_contents extern bfd_byte *_bfd_elf_mips_get_relocated_section_contents (bfd *, struct bfd_link_info *, struct bfd_link_order *, bfd_byte *, bfd_boolean, asymbol **); +extern bfd_boolean _bfd_mips_elf_relax_section + (bfd *abfd, asection *sec, struct bfd_link_info *link_info, + bfd_boolean *again); extern struct bfd_link_hash_table *_bfd_mips_elf_link_hash_table_create (bfd *); extern struct bfd_link_hash_table *_bfd_mips_vxworks_link_hash_table_create @@ -111,9 +116,9 @@ extern bfd_boolean _bfd_mips_elf_write_section extern bfd_boolean _bfd_mips_elf_read_ecoff_info (bfd *, asection *, struct ecoff_debug_info *); -extern void _bfd_mips16_elf_reloc_unshuffle +extern void _bfd_mips_elf_reloc_unshuffle (bfd *, int, bfd_boolean, bfd_byte *); -extern void _bfd_mips16_elf_reloc_shuffle +extern void _bfd_mips_elf_reloc_shuffle (bfd *, int, bfd_boolean, bfd_byte *); extern bfd_reloc_status_type _bfd_mips_elf_gprel16_with_gp (bfd *, asymbol *, arelent *, asection *, bfd_boolean, void *, bfd_vma); @@ -155,7 +160,16 @@ extern bfd_boolean _bfd_mips_elf_common_definition (Elf_Internal_Sym *); static inline bfd_boolean gprel16_reloc_p (unsigned int r_type) { - return r_type == R_MIPS_GPREL16 || r_type == R_MIPS16_GPREL; + return (r_type == R_MIPS_GPREL16 + || r_type == R_MIPS16_GPREL + || r_type == R_MICROMIPS_GPREL16 + || r_type == R_MICROMIPS_GPREL7_S2); +} + +static inline bfd_boolean +literal_reloc_p (int r_type) +{ + return r_type == R_MIPS_LITERAL || r_type == R_MICROMIPS_LITERAL; } #define elf_backend_common_definition _bfd_mips_elf_common_definition diff --git a/bfd/elfxx-sparc.c b/bfd/elfxx-sparc.c index f0f7907..9a15124 100644 --- a/bfd/elfxx-sparc.c +++ b/bfd/elfxx-sparc.c @@ -1,5 +1,6 @@ /* SPARC-specific support for ELF - Copyright 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + Copyright 2005, 2006, 2007, 2008, 2009, 2010, 2011 + Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -1829,6 +1830,20 @@ _bfd_sparc_elf_gc_mark_hook (asection *sec, return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); } +static Elf_Internal_Rela * +sparc_elf_find_reloc_at_ofs (Elf_Internal_Rela *rel, + Elf_Internal_Rela *relend, + bfd_vma offset) +{ + while (rel < relend) + { + if (rel->r_offset == offset) + return rel; + rel++; + } + return NULL; +} + /* Update the got entry reference counts for the section being removed. */ bfd_boolean _bfd_sparc_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, @@ -2145,12 +2160,6 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, PTR inf) if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - info = (struct bfd_link_info *) inf; htab = _bfd_sparc_elf_hash_table (info); BFD_ASSERT (htab != NULL); @@ -2426,9 +2435,6 @@ readonly_dynrelocs (struct elf_link_hash_entry *h, PTR inf) struct _bfd_sparc_elf_link_hash_entry *eh; struct _bfd_sparc_elf_dyn_relocs *p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct _bfd_sparc_elf_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) { @@ -3684,6 +3690,7 @@ _bfd_sparc_elf_relocate_section (bfd *output_bfd, if (! info->shared || (r_type == R_SPARC_TLS_GD_CALL && tls_type == GOT_TLS_IE)) { + Elf_Internal_Rela *rel2; bfd_vma insn; if (!info->shared && (h == NULL || h->dynindx == -1)) @@ -3719,7 +3726,26 @@ _bfd_sparc_elf_relocate_section (bfd *output_bfd, continue; } - bfd_put_32 (output_bfd, 0x9001c008, contents + rel->r_offset); + /* We cannot just overwrite the delay slot instruction, + as it might be what puts the %o0 argument to + __tls_get_addr into place. So we have to transpose + the delay slot with the add we patch in. */ + insn = bfd_get_32 (input_bfd, contents + rel->r_offset + 4); + bfd_put_32 (output_bfd, insn, + contents + rel->r_offset); + bfd_put_32 (output_bfd, 0x9001c008, + contents + rel->r_offset + 4); + + rel2 = rel; + while ((rel2 = sparc_elf_find_reloc_at_ofs (rel2 + 1, relend, + rel->r_offset + 4)) + != NULL) + { + /* If the instruction we moved has a relocation attached to + it, adjust the offset so that it will apply to the correct + instruction. */ + rel2->r_offset -= 4; + } continue; } @@ -4762,3 +4788,38 @@ _bfd_sparc_elf_plt_sym_val (bfd_vma i, const asection *plt, const arelent *rel) else return rel->address; } + +/* Merge backend specific data from an object file to the output + object file when linking. */ + +bfd_boolean +_bfd_sparc_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) +{ + obj_attribute *in_attr, *in_attrs; + obj_attribute *out_attr, *out_attrs; + + if (!elf_known_obj_attributes_proc (obfd)[0].i) + { + /* This is the first object. Copy the attributes. */ + _bfd_elf_copy_obj_attributes (ibfd, obfd); + + /* Use the Tag_null value to indicate the attributes have been + initialized. */ + elf_known_obj_attributes_proc (obfd)[0].i = 1; + + return TRUE; + } + + in_attrs = elf_known_obj_attributes (ibfd)[OBJ_ATTR_GNU]; + out_attrs = elf_known_obj_attributes (obfd)[OBJ_ATTR_GNU]; + + in_attr = &in_attrs[Tag_GNU_Sparc_HWCAPS]; + out_attr = &out_attrs[Tag_GNU_Sparc_HWCAPS]; + + out_attr->i |= in_attr->i; + + /* Merge Tag_compatibility attributes and any common GNU ones. */ + _bfd_elf_merge_object_attributes (ibfd, obfd); + + return TRUE; +} diff --git a/bfd/elfxx-sparc.h b/bfd/elfxx-sparc.h index 36748ec..d95e825 100644 --- a/bfd/elfxx-sparc.h +++ b/bfd/elfxx-sparc.h @@ -1,5 +1,6 @@ /* SPARC ELF specific backend routines. - Copyright 2005, 2006, 2007, 2009, 2010 Free Software Foundation, Inc. + Copyright 2005, 2006, 2007, 2009, 2010, 2011 + Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -146,3 +147,5 @@ extern bfd_boolean _bfd_sparc_elf_object_p (bfd *); extern bfd_vma _bfd_sparc_elf_plt_sym_val (bfd_vma, const asection *, const arelent *); +extern bfd_boolean _bfd_sparc_elf_merge_private_bfd_data + (bfd *, bfd *); diff --git a/bfd/elfxx-target.h b/bfd/elfxx-target.h index fab1b04..96ecce3 100644 --- a/bfd/elfxx-target.h +++ b/bfd/elfxx-target.h @@ -1,6 +1,7 @@ /* Target definitions for NN-bit ELF Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, - 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 + Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -142,7 +143,7 @@ #define elf_backend_gc_mark_hook _bfd_elf_gc_mark_hook #endif #ifndef elf_backend_gc_mark_extra_sections -#define elf_backend_gc_mark_extra_sections NULL +#define elf_backend_gc_mark_extra_sections _bfd_elf_gc_mark_extra_sections #endif #ifndef elf_backend_gc_sweep_hook #define elf_backend_gc_sweep_hook NULL @@ -173,6 +174,10 @@ #define bfd_elfNN_bfd_define_common_symbol bfd_generic_define_common_symbol #endif +#ifndef bfd_elfNN_bfd_lookup_section_flags +#define bfd_elfNN_bfd_lookup_section_flags bfd_elf_lookup_section_flags +#endif + #ifndef bfd_elfNN_bfd_make_debug_symbol #define bfd_elfNN_bfd_make_debug_symbol \ ((asymbol * (*) (bfd *, void *, unsigned long)) bfd_nullvoidptr) @@ -305,6 +310,10 @@ #define elf_info_to_howto_rel 0 #endif +#ifndef elf_backend_arch_data +#define elf_backend_arch_data NULL +#endif + #ifndef ELF_TARGET_ID #define ELF_TARGET_ID GENERIC_ELF_DATA #endif @@ -502,7 +511,7 @@ #define elf_backend_hide_symbol _bfd_elf_link_hash_hide_symbol #endif #ifndef elf_backend_fixup_symbol -#define elf_backend_fixup_symbol NULL +#define elf_backend_fixup_symbol NULL #endif #ifndef elf_backend_merge_symbol_attribute #define elf_backend_merge_symbol_attribute NULL @@ -528,6 +537,9 @@ #ifndef elf_backend_write_core_note #define elf_backend_write_core_note NULL #endif +#ifndef elf_backend_lookup_section_flags_hook +#define elf_backend_lookup_section_flags_hook NULL +#endif #ifndef elf_backend_reloc_type_class #define elf_backend_reloc_type_class _bfd_elf_reloc_type_class #endif @@ -643,6 +655,11 @@ #define elf_backend_is_function_type _bfd_elf_is_function_type #endif +#ifndef elf_match_priority +#define elf_match_priority \ + (ELF_ARCH == bfd_arch_unknown ? 2 : ELF_OSABI == ELFOSABI_NONE ? 1 : 0) +#endif + extern const struct elf_size_info _bfd_elfNN_size_info; static struct elf_backend_data elfNN_bed = @@ -655,6 +672,7 @@ static struct elf_backend_data elfNN_bed = ELF_MINPAGESIZE, /* minpagesize */ ELF_COMMONPAGESIZE, /* commonpagesize */ ELF_DYNAMIC_SEC_FLAGS, /* dynamic_sec_flags */ + elf_backend_arch_data, elf_info_to_howto, elf_info_to_howto_rel, elf_backend_sym_is_global, @@ -711,6 +729,7 @@ static struct elf_backend_data elfNN_bed = elf_backend_grok_prstatus, elf_backend_grok_psinfo, elf_backend_write_core_note, + elf_backend_lookup_section_flags_hook, elf_backend_reloc_type_class, elf_backend_discard_info, elf_backend_ignore_discarded_relocs, @@ -811,6 +830,8 @@ const bfd_target TARGET_BIG_SYM = Chapter 7 (Formats & Protocols), Archive section sets this as 15. */ 15, + elf_match_priority, + /* Routines to byte-swap various sized integers from the data sections */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, @@ -907,6 +928,8 @@ const bfd_target TARGET_LITTLE_SYM = Chapter 7 (Formats & Protocols), Archive section sets this as 15. */ 15, + elf_match_priority, + /* Routines to byte-swap various sized integers from the data sections */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, diff --git a/bfd/elfxx-tilegx.c b/bfd/elfxx-tilegx.c new file mode 100644 index 0000000..c484562 --- /dev/null +++ b/bfd/elfxx-tilegx.c @@ -0,0 +1,3957 @@ +/* TILE-Gx-specific support for ELF. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "bfd.h" +#include "sysdep.h" +#include "libbfd.h" +#include "elf-bfd.h" +#include "elf/tilegx.h" +#include "opcode/tilegx.h" +#include "libiberty.h" +#include "elfxx-tilegx.h" + +#define ABI_64_P(abfd) \ + (get_elf_backend_data (abfd)->s->elfclass == ELFCLASS64) + +#define TILEGX_ELF_WORD_BYTES(htab) \ + ((htab)->bytes_per_word) + +/* The size of an external RELA relocation. */ +#define TILEGX_ELF_RELA_BYTES(htab) \ + ((htab)->bytes_per_rela) + +/* Both 32-bit and 64-bit tilegx encode this in an identical manner, + so just take advantage of that. */ +#define TILEGX_ELF_R_TYPE(r_info) \ + ((r_info) & 0xFF) + +#define TILEGX_ELF_R_INFO(htab, in_rel, index, type) \ + ((htab)->r_info (in_rel, index, type)) + +#define TILEGX_ELF_R_SYMNDX(htab, r_info) \ + ((htab)->r_symndx(r_info)) + +#define TILEGX_ELF_DTPOFF_RELOC(htab) \ + ((htab)->dtpoff_reloc) + +#define TILEGX_ELF_DTPMOD_RELOC(htab) \ + ((htab)->dtpmod_reloc) + +#define TILEGX_ELF_TPOFF_RELOC(htab) \ + ((htab)->tpoff_reloc) + +#define TILEGX_ELF_PUT_WORD(htab, bfd, val, ptr) \ + ((htab)->put_word (bfd, val, ptr)) + +/* The name of the dynamic interpreter. This is put in the .interp + section. */ + +#define ELF64_DYNAMIC_INTERPRETER "/lib/ld.so.1" +#define ELF32_DYNAMIC_INTERPRETER "/lib32/ld.so.1" + + +static reloc_howto_type tilegx_elf_howto_table [] = +{ + /* This reloc does nothing. */ + HOWTO (R_TILEGX_NONE, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_NONE", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ +#ifdef BFD64 + /* A 64 bit absolute relocation. */ + HOWTO (R_TILEGX_64, /* type */ + 0, /* rightshift */ + 4, /* size (0 = byte, 1 = short, 2 = long) */ + 64, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_64", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffffffffffffffffULL, /* dst_mask */ + FALSE), /* pcrel_offset */ +#endif + /* A 32 bit absolute relocation. */ + HOWTO (R_TILEGX_32, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_32", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 16 bit absolute relocation. */ + HOWTO (R_TILEGX_16, /* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_16", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* An 8 bit absolute relocation. */ + HOWTO (R_TILEGX_8, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 8, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_unsigned, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_8", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xff, /* dst_mask */ + FALSE), /* pcrel_offset */ +#ifdef BFD64 + /* A 64 bit pc-relative relocation. */ + HOWTO (R_TILEGX_64_PCREL,/* type */ + 0, /* rightshift */ + 4, /* size (0 = byte, 1 = short, 2 = long) */ + 64, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_32_PCREL", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffffffffffffffffULL, /* dst_mask */ + TRUE), /* pcrel_offset */ +#endif + /* A 32 bit pc-relative relocation. */ + HOWTO (R_TILEGX_32_PCREL,/* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_32_PCREL", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffffffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* A 16 bit pc-relative relocation. */ + HOWTO (R_TILEGX_16_PCREL,/* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_16_PCREL", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* An 8 bit pc-relative relocation. */ + HOWTO (R_TILEGX_8_PCREL, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 8, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_8_PCREL",/* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* A 16 bit relocation without overflow. */ + HOWTO (R_TILEGX_HW0, /* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_HW0", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 16 bit relocation without overflow. */ + HOWTO (R_TILEGX_HW1, /* type */ + 16, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_HW1", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 16 bit relocation without overflow. */ + HOWTO (R_TILEGX_HW2, /* type */ + 32, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_HW2", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 16 bit relocation without overflow. */ + HOWTO (R_TILEGX_HW3, /* type */ + 48, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_HW3", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 16 bit relocation with overflow. */ + HOWTO (R_TILEGX_HW0_LAST, /* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_HW0_LAST", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 16 bit relocation with overflow. */ + HOWTO (R_TILEGX_HW1_LAST, /* type */ + 16, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_HW1_LAST", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 16 bit relocation with overflow. */ + HOWTO (R_TILEGX_HW2_LAST, /* type */ + 32, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_HW2_LAST", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + HOWTO (R_TILEGX_COPY, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_COPY", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEGX_GLOB_DAT, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_GLOB_DAT", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEGX_JMP_SLOT, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_JMP_SLOT", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEGX_RELATIVE, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_RELATIVE", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEGX_BROFF_X1, /* type */ + TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 17, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_BROFF_X1", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + -1, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEGX_JUMPOFF_X1, /* type */ + TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 27, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_JUMPOFF_X1", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + -1, /* dst_mask */ + TRUE), /* pcrel_offset */ + + HOWTO (R_TILEGX_JUMPOFF_X1_PLT, /* type */ + TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 27, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_TILEGX_JUMPOFF_X1_PLT", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + -1, /* dst_mask */ + TRUE), /* pcrel_offset */ + +#define TILEGX_IMM_HOWTO(name, size, bitsize) \ + HOWTO (name, 0, size, bitsize, FALSE, 0, \ + complain_overflow_signed, bfd_elf_generic_reloc, \ + #name, FALSE, 0, -1, FALSE) + +#define TILEGX_UIMM_HOWTO(name, size, bitsize) \ + HOWTO (name, 0, size, bitsize, FALSE, 0, \ + complain_overflow_unsigned, bfd_elf_generic_reloc, \ + #name, FALSE, 0, -1, FALSE) + + TILEGX_IMM_HOWTO(R_TILEGX_IMM8_X0, 0, 8), + TILEGX_IMM_HOWTO(R_TILEGX_IMM8_Y0, 0, 8), + TILEGX_IMM_HOWTO(R_TILEGX_IMM8_X1, 0, 8), + TILEGX_IMM_HOWTO(R_TILEGX_IMM8_Y1, 0, 8), + TILEGX_IMM_HOWTO(R_TILEGX_DEST_IMM8_X1, 0, 8), + + TILEGX_UIMM_HOWTO(R_TILEGX_MT_IMM14_X1, 1, 14), + TILEGX_UIMM_HOWTO(R_TILEGX_MF_IMM14_X1, 1, 14), + + TILEGX_UIMM_HOWTO(R_TILEGX_MMSTART_X0, 0, 6), + TILEGX_UIMM_HOWTO(R_TILEGX_MMEND_X0, 0, 6), + + TILEGX_UIMM_HOWTO(R_TILEGX_SHAMT_X0, 0, 6), + TILEGX_UIMM_HOWTO(R_TILEGX_SHAMT_X1, 0, 6), + TILEGX_UIMM_HOWTO(R_TILEGX_SHAMT_Y0, 0, 6), + TILEGX_UIMM_HOWTO(R_TILEGX_SHAMT_Y1, 0, 6), + +#define TILEGX_IMM16_HOWTO(name, rshift) \ + HOWTO (name, rshift, 1, 16, FALSE, 0, \ + complain_overflow_dont, bfd_elf_generic_reloc, \ + #name, FALSE, 0, 0xffff, FALSE) + + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW0, 0), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW0, 0), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW1, 16), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW1, 16), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW2, 32), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW2, 32), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW3, 48), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW3, 48), + +#define TILEGX_IMM16_HOWTO_LAST(name, rshift) \ + HOWTO (name, rshift, 1, 16, FALSE, 0, \ + complain_overflow_signed, bfd_elf_generic_reloc, \ + #name, FALSE, 0, 0xffff, FALSE) + + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X0_HW0_LAST, 0), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X1_HW0_LAST, 0), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X0_HW1_LAST, 16), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X1_HW1_LAST, 16), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X0_HW2_LAST, 32), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X1_HW2_LAST, 32), + + /* PC-relative offsets. */ + +#define TILEGX_IMM16_HOWTO_PCREL(name, rshift) \ + HOWTO (name, rshift, 1, 16, TRUE, 0, \ + complain_overflow_dont, bfd_elf_generic_reloc, \ + #name, FALSE, 0, 0xffff, TRUE) + + TILEGX_IMM16_HOWTO_PCREL (R_TILEGX_IMM16_X0_HW0_PCREL, 0), + TILEGX_IMM16_HOWTO_PCREL (R_TILEGX_IMM16_X1_HW0_PCREL, 0), + TILEGX_IMM16_HOWTO_PCREL (R_TILEGX_IMM16_X0_HW1_PCREL, 16), + TILEGX_IMM16_HOWTO_PCREL (R_TILEGX_IMM16_X1_HW1_PCREL, 16), + TILEGX_IMM16_HOWTO_PCREL (R_TILEGX_IMM16_X0_HW2_PCREL, 32), + TILEGX_IMM16_HOWTO_PCREL (R_TILEGX_IMM16_X1_HW2_PCREL, 32), + TILEGX_IMM16_HOWTO_PCREL (R_TILEGX_IMM16_X0_HW3_PCREL, 48), + TILEGX_IMM16_HOWTO_PCREL (R_TILEGX_IMM16_X1_HW3_PCREL, 48), + +#define TILEGX_IMM16_HOWTO_LAST_PCREL(name, rshift) \ + HOWTO (name, rshift, 1, 16, TRUE, 0, \ + complain_overflow_signed, bfd_elf_generic_reloc, \ + #name, FALSE, 0, 0xffff, TRUE) + + TILEGX_IMM16_HOWTO_LAST_PCREL (R_TILEGX_IMM16_X0_HW0_LAST_PCREL, 0), + TILEGX_IMM16_HOWTO_LAST_PCREL (R_TILEGX_IMM16_X1_HW0_LAST_PCREL, 0), + TILEGX_IMM16_HOWTO_LAST_PCREL (R_TILEGX_IMM16_X0_HW1_LAST_PCREL, 16), + TILEGX_IMM16_HOWTO_LAST_PCREL (R_TILEGX_IMM16_X1_HW1_LAST_PCREL, 16), + TILEGX_IMM16_HOWTO_LAST_PCREL (R_TILEGX_IMM16_X0_HW2_LAST_PCREL, 32), + TILEGX_IMM16_HOWTO_LAST_PCREL (R_TILEGX_IMM16_X1_HW2_LAST_PCREL, 32), + + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW0_GOT, 0), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW0_GOT, 0), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW1_GOT, 16), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW1_GOT, 16), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW2_GOT, 32), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW2_GOT, 32), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW3_GOT, 48), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW3_GOT, 48), + + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X0_HW0_LAST_GOT, 0), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X1_HW0_LAST_GOT, 0), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X0_HW1_LAST_GOT, 16), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X1_HW1_LAST_GOT, 16), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X0_HW2_LAST_GOT, 32), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X1_HW2_LAST_GOT, 32), + + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW0_TLS_GD, 0), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW0_TLS_GD, 0), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW1_TLS_GD, 16), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW1_TLS_GD, 16), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW2_TLS_GD, 32), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW2_TLS_GD, 32), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X0_HW3_TLS_GD, 48), + TILEGX_IMM16_HOWTO (R_TILEGX_IMM16_X1_HW3_TLS_GD, 48), + + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD, 0), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD, 0), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD, 16), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD, 16), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD, 32), + TILEGX_IMM16_HOWTO_LAST (R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD, 32), + +#define TILEGX_IMM16_HOWTO_TLS_IE(name, rshift) \ + HOWTO (name, rshift, 1, 16, FALSE, 0, \ + complain_overflow_dont, bfd_elf_generic_reloc, \ + #name, FALSE, 0, 0xffff, TRUE) + + TILEGX_IMM16_HOWTO_TLS_IE (R_TILEGX_IMM16_X0_HW0_TLS_IE, 0), + TILEGX_IMM16_HOWTO_TLS_IE (R_TILEGX_IMM16_X1_HW0_TLS_IE, 0), + TILEGX_IMM16_HOWTO_TLS_IE (R_TILEGX_IMM16_X0_HW1_TLS_IE, 16), + TILEGX_IMM16_HOWTO_TLS_IE (R_TILEGX_IMM16_X1_HW1_TLS_IE, 16), + TILEGX_IMM16_HOWTO_TLS_IE (R_TILEGX_IMM16_X0_HW2_TLS_IE, 32), + TILEGX_IMM16_HOWTO_TLS_IE (R_TILEGX_IMM16_X1_HW2_TLS_IE, 32), + TILEGX_IMM16_HOWTO_TLS_IE (R_TILEGX_IMM16_X0_HW3_TLS_IE, 48), + TILEGX_IMM16_HOWTO_TLS_IE (R_TILEGX_IMM16_X1_HW3_TLS_IE, 48), + +#define TILEGX_IMM16_HOWTO_LAST_TLS_IE(name, rshift) \ + HOWTO (name, rshift, 1, 16, FALSE, 0, \ + complain_overflow_signed, bfd_elf_generic_reloc, \ + #name, FALSE, 0, 0xffff, TRUE) + + TILEGX_IMM16_HOWTO_LAST_TLS_IE (R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE, 0), + TILEGX_IMM16_HOWTO_LAST_TLS_IE (R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE, 0), + TILEGX_IMM16_HOWTO_LAST_TLS_IE (R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE, 16), + TILEGX_IMM16_HOWTO_LAST_TLS_IE (R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE, 16), + TILEGX_IMM16_HOWTO_LAST_TLS_IE (R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE, 32), + TILEGX_IMM16_HOWTO_LAST_TLS_IE (R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE, 32), + + HOWTO(R_TILEGX_TLS_DTPMOD64, 0, 0, 0, FALSE, 0, complain_overflow_dont, + bfd_elf_generic_reloc, "R_TILEGX_TLS_DTPMOD64", + FALSE, 0, 0, TRUE), + HOWTO(R_TILEGX_TLS_DTPOFF64, 0, 4, 64, FALSE, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_TILEGX_TLS_DTPOFF64", + FALSE, 0, -1, TRUE), + HOWTO(R_TILEGX_TLS_TPOFF64, 0, 0, 0, FALSE, 0, complain_overflow_dont, + bfd_elf_generic_reloc, "R_TILEGX_TLS_TPOFF64", + FALSE, 0, 0, TRUE), + + HOWTO(R_TILEGX_TLS_DTPMOD32, 0, 0, 0, FALSE, 0, complain_overflow_dont, + bfd_elf_generic_reloc, "R_TILEGX_TLS_DTPMOD32", + FALSE, 0, 0, TRUE), + HOWTO(R_TILEGX_TLS_DTPOFF32, 0, 4, 32, FALSE, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_TILEGX_TLS_DTPOFF32", + FALSE, 0, -1, TRUE), + HOWTO(R_TILEGX_TLS_TPOFF32, 0, 0, 0, FALSE, 0, complain_overflow_dont, + bfd_elf_generic_reloc, "R_TILEGX_TLS_TPOFF32", + FALSE, 0, 0, TRUE) +}; + +static reloc_howto_type tilegx_elf_howto_table2 [] = +{ + /* GNU extension to record C++ vtable hierarchy */ + HOWTO (R_TILEGX_GNU_VTINHERIT, /* type */ + 0, /* rightshift */ + 4, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + NULL, /* special_function */ + "R_TILEGX_GNU_VTINHERIT", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* GNU extension to record C++ vtable member usage */ + HOWTO (R_TILEGX_GNU_VTENTRY, /* type */ + 0, /* rightshift */ + 4, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_elf_rel_vtable_reloc_fn, /* special_function */ + "R_TILEGX_GNU_VTENTRY", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ + +}; + +/* Map BFD reloc types to TILEGX ELF reloc types. */ + +typedef struct tilegx_reloc_map +{ + bfd_reloc_code_real_type bfd_reloc_val; + unsigned int tilegx_reloc_val; + reloc_howto_type * table; +} reloc_map; + +static const reloc_map tilegx_reloc_map [] = +{ +#define TH_REMAP(bfd, tilegx) \ + { bfd, tilegx, tilegx_elf_howto_table }, + + /* Standard relocations. */ + TH_REMAP (BFD_RELOC_NONE, R_TILEGX_NONE) + TH_REMAP (BFD_RELOC_64, R_TILEGX_64) + TH_REMAP (BFD_RELOC_32, R_TILEGX_32) + TH_REMAP (BFD_RELOC_16, R_TILEGX_16) + TH_REMAP (BFD_RELOC_8, R_TILEGX_8) + TH_REMAP (BFD_RELOC_64_PCREL, R_TILEGX_64_PCREL) + TH_REMAP (BFD_RELOC_32_PCREL, R_TILEGX_32_PCREL) + TH_REMAP (BFD_RELOC_16_PCREL, R_TILEGX_16_PCREL) + TH_REMAP (BFD_RELOC_8_PCREL, R_TILEGX_8_PCREL) + +#define SIMPLE_REMAP(t) TH_REMAP (BFD_RELOC_##t, R_##t) + + /* Custom relocations. */ + SIMPLE_REMAP (TILEGX_HW0) + SIMPLE_REMAP (TILEGX_HW1) + SIMPLE_REMAP (TILEGX_HW2) + SIMPLE_REMAP (TILEGX_HW3) + SIMPLE_REMAP (TILEGX_HW0_LAST) + SIMPLE_REMAP (TILEGX_HW1_LAST) + SIMPLE_REMAP (TILEGX_HW2_LAST) + SIMPLE_REMAP (TILEGX_COPY) + SIMPLE_REMAP (TILEGX_GLOB_DAT) + SIMPLE_REMAP (TILEGX_JMP_SLOT) + SIMPLE_REMAP (TILEGX_RELATIVE) + SIMPLE_REMAP (TILEGX_BROFF_X1) + SIMPLE_REMAP (TILEGX_JUMPOFF_X1) + SIMPLE_REMAP (TILEGX_JUMPOFF_X1_PLT) + SIMPLE_REMAP (TILEGX_IMM8_X0) + SIMPLE_REMAP (TILEGX_IMM8_Y0) + SIMPLE_REMAP (TILEGX_IMM8_X1) + SIMPLE_REMAP (TILEGX_IMM8_Y1) + SIMPLE_REMAP (TILEGX_DEST_IMM8_X1) + SIMPLE_REMAP (TILEGX_MT_IMM14_X1) + SIMPLE_REMAP (TILEGX_MF_IMM14_X1) + SIMPLE_REMAP (TILEGX_MMSTART_X0) + SIMPLE_REMAP (TILEGX_MMEND_X0) + SIMPLE_REMAP (TILEGX_SHAMT_X0) + SIMPLE_REMAP (TILEGX_SHAMT_X1) + SIMPLE_REMAP (TILEGX_SHAMT_Y0) + SIMPLE_REMAP (TILEGX_SHAMT_Y1) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW0) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW0) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW1) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW1) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW2) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW2) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW3) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW3) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW0_LAST) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW0_LAST) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW1_LAST) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW1_LAST) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW2_LAST) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW2_LAST) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW0_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW0_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW1_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW1_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW2_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW2_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW3_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW3_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW0_LAST_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW0_LAST_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW1_LAST_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW1_LAST_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW2_LAST_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW2_LAST_PCREL) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW0_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW0_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW1_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW1_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW2_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW2_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW3_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW3_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW0_LAST_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW0_LAST_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW1_LAST_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW1_LAST_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW2_LAST_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW2_LAST_GOT) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW0_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW0_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW1_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW1_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW2_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW2_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW3_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW3_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW0_LAST_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW0_LAST_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW1_LAST_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW1_LAST_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW2_LAST_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW2_LAST_TLS_GD) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW0_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW0_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW1_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW1_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW2_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW2_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW3_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW3_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW0_LAST_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW0_LAST_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW1_LAST_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW1_LAST_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X0_HW2_LAST_TLS_IE) + SIMPLE_REMAP (TILEGX_IMM16_X1_HW2_LAST_TLS_IE) + + SIMPLE_REMAP (TILEGX_TLS_DTPMOD64) + SIMPLE_REMAP (TILEGX_TLS_DTPOFF64) + SIMPLE_REMAP (TILEGX_TLS_TPOFF64) + + SIMPLE_REMAP (TILEGX_TLS_DTPMOD32) + SIMPLE_REMAP (TILEGX_TLS_DTPOFF32) + SIMPLE_REMAP (TILEGX_TLS_TPOFF32) + +#undef SIMPLE_REMAP +#undef TH_REMAP + + { BFD_RELOC_VTABLE_INHERIT, R_TILEGX_GNU_VTINHERIT, tilegx_elf_howto_table2 }, + { BFD_RELOC_VTABLE_ENTRY, R_TILEGX_GNU_VTENTRY, tilegx_elf_howto_table2 }, +}; + + + +/* The TILE-Gx linker needs to keep track of the number of relocs that it + decides to copy as dynamic relocs in check_relocs for each symbol. + This is so that it can later discard them if they are found to be + unnecessary. We store the information in a field extending the + regular ELF linker hash table. */ + +struct tilegx_elf_dyn_relocs +{ + struct tilegx_elf_dyn_relocs *next; + + /* The input section of the reloc. */ + asection *sec; + + /* Total number of relocs copied for the input section. */ + bfd_size_type count; + + /* Number of pc-relative relocs copied for the input section. */ + bfd_size_type pc_count; +}; + +/* TILEGX ELF linker hash entry. */ + +struct tilegx_elf_link_hash_entry +{ + struct elf_link_hash_entry elf; + + /* Track dynamic relocs copied for this symbol. */ + struct tilegx_elf_dyn_relocs *dyn_relocs; + +#define GOT_UNKNOWN 0 +#define GOT_NORMAL 1 +#define GOT_TLS_GD 2 +#define GOT_TLS_IE 4 + unsigned char tls_type; +}; + +#define tilegx_elf_hash_entry(ent) \ + ((struct tilegx_elf_link_hash_entry *)(ent)) + +struct _bfd_tilegx_elf_obj_tdata +{ + struct elf_obj_tdata root; + + /* tls_type for each local got entry. */ + char *local_got_tls_type; +}; + +#define _bfd_tilegx_elf_tdata(abfd) \ + ((struct _bfd_tilegx_elf_obj_tdata *) (abfd)->tdata.any) + +#define _bfd_tilegx_elf_local_got_tls_type(abfd) \ + (_bfd_tilegx_elf_tdata (abfd)->local_got_tls_type) + +#define is_tilegx_elf(bfd) \ + (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ + && elf_tdata (bfd) != NULL \ + && elf_object_id (bfd) == TILEGX_ELF_DATA) + +#include "elf/common.h" +#include "elf/internal.h" + +struct tilegx_elf_link_hash_table +{ + struct elf_link_hash_table elf; + + int bytes_per_word; + int word_align_power; + int bytes_per_rela; + int dtpmod_reloc; + int dtpoff_reloc; + int tpoff_reloc; + bfd_vma (*r_info) (Elf_Internal_Rela *, bfd_vma, bfd_vma); + bfd_vma (*r_symndx) (bfd_vma); + void (*put_word) (bfd *, bfd_vma, void *); + const char *dynamic_interpreter; + + /* Short-cuts to get to dynamic linker sections. */ + asection *sdynbss; + asection *srelbss; + + /* Small local sym to section mapping cache. */ + struct sym_cache sym_cache; +}; + + +/* Get the Tile ELF linker hash table from a link_info structure. */ +#define tilegx_elf_hash_table(p) \ + (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \ + == TILEGX_ELF_DATA ? ((struct tilegx_elf_link_hash_table *) ((p)->hash)) : NULL) + +#ifdef BFD64 +static bfd_vma +tilegx_elf_r_info_64 (Elf_Internal_Rela *in_rel ATTRIBUTE_UNUSED, + bfd_vma rel_index, + bfd_vma type) +{ + return ELF64_R_INFO (rel_index, type); +} + +static bfd_vma +tilegx_elf_r_symndx_64 (bfd_vma r_info) +{ + return ELF64_R_SYM (r_info); +} + +static void +tilegx_put_word_64 (bfd *abfd, bfd_vma val, void *ptr) +{ + bfd_put_64 (abfd, val, ptr); +} +#endif /* BFD64 */ + +static bfd_vma +tilegx_elf_r_info_32 (Elf_Internal_Rela *in_rel ATTRIBUTE_UNUSED, + bfd_vma rel_index, + bfd_vma type) +{ + return ELF32_R_INFO (rel_index, type); +} + +static bfd_vma +tilegx_elf_r_symndx_32 (bfd_vma r_info) +{ + return ELF32_R_SYM (r_info); +} + +static void +tilegx_put_word_32 (bfd *abfd, bfd_vma val, void *ptr) +{ + bfd_put_32 (abfd, val, ptr); +} + +reloc_howto_type * +tilegx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type code) +{ + unsigned int i; + + for (i = ARRAY_SIZE (tilegx_reloc_map); --i;) + { + const reloc_map * entry; + + entry = tilegx_reloc_map + i; + + if (entry->bfd_reloc_val == code) + return entry->table + (entry->tilegx_reloc_val + - entry->table[0].type); + } + + return NULL; +} + +reloc_howto_type * +tilegx_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, + const char *r_name) +{ + unsigned int i; + + for (i = 0; + i < (sizeof (tilegx_elf_howto_table) + / sizeof (tilegx_elf_howto_table[0])); + i++) + if (tilegx_elf_howto_table[i].name != NULL + && strcasecmp (tilegx_elf_howto_table[i].name, r_name) == 0) + return &tilegx_elf_howto_table[i]; + + return NULL; +} + +void +tilegx_info_to_howto_rela (bfd *abfd ATTRIBUTE_UNUSED, + arelent *cache_ptr, + Elf_Internal_Rela *dst) +{ + unsigned int r_type = TILEGX_ELF_R_TYPE (dst->r_info); + + if (r_type <= (unsigned int) R_TILEGX_TLS_TPOFF32) + cache_ptr->howto = &tilegx_elf_howto_table [r_type]; + else if (r_type - R_TILEGX_GNU_VTINHERIT + <= (unsigned int) R_TILEGX_GNU_VTENTRY) + cache_ptr->howto + = &tilegx_elf_howto_table2 [r_type - R_TILEGX_GNU_VTINHERIT]; + else + abort (); +} + +typedef tilegx_bundle_bits (*tilegx_create_func)(int); + +static const tilegx_create_func reloc_to_create_func[] = +{ + /* The first twenty relocation types don't correspond to operands */ + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + + /* The remaining relocations are used for immediate operands */ + create_BrOff_X1, + create_JumpOff_X1, + create_JumpOff_X1, + create_Imm8_X0, + create_Imm8_Y0, + create_Imm8_X1, + create_Imm8_Y1, + create_Dest_Imm8_X1, + create_MT_Imm14_X1, + create_MF_Imm14_X1, + create_BFStart_X0, + create_BFEnd_X0, + create_ShAmt_X0, + create_ShAmt_X1, + create_ShAmt_Y0, + create_ShAmt_Y1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1, + create_Imm16_X0, + create_Imm16_X1 +}; + +static void +tilegx_elf_append_rela (bfd *abfd, asection *s, Elf_Internal_Rela *rel) +{ + const struct elf_backend_data *bed; + bfd_byte *loc; + + bed = get_elf_backend_data (abfd); + loc = s->contents + (s->reloc_count++ * bed->s->sizeof_rela); + bed->s->swap_reloca_out (abfd, rel, loc); +} + +/* PLT/GOT stuff */ + +/* The procedure linkage table starts with the following header: + + ld_add r28, r27, 8 + ld r27, r27 + { + jr r27 + info 10 ## SP not offset, return PC in LR + } + + Subsequent entries are the following, jumping to the header at the end: + + { + moveli r28, <_GLOBAL_OFFSET_TABLE_ - 1f + MY_GOT_OFFSET> + lnk r26 + } +1: + { + moveli r27, <_GLOBAL_OFFSET_TABLE_ - 1b> + shl16insli r28, r28, <_GLOBAL_OFFSET_TABLE_ - 1b + MY_GOT_OFFSET> + } + { + add r28, r26, r28 + shl16insli r27, r27, <_GLOBAL_OFFSET_TABLE_ - 1b> + } + { + add r27, r26, r27 + ld r28, r28 + info 10 ## SP not offset, return PC in LR + } + { + shl16insli r29, zero, MY_PLT_INDEX + jr r28 + } + + This code sequence lets the code at at the start of the PLT determine + which PLT entry was executed by examining 'r29'. + + Note that MY_PLT_INDEX skips over the header entries, so the first + actual jump table entry has index zero. + + If the offset fits in 16 bits, + + lnk r26 +1: + { + addli r28, r26, <_GLOBAL_OFFSET_TABLE_ - 1b + MY_GOT_OFFSET> + moveli r27, <_GLOBAL_OFFSET_TABLE_ - 1b> + } + { + shl16insli r29, zero, MY_PLT_INDEX + ld r28, r28 + } + { + add r27, r26, r27 + jr r28 + } + info 10 ## SP not offset, return PC in LR + + For the purpose of backtracing, the procedure linkage table ends with the + following tail entry: + + info 10 ## SP not offset, return PC in LR + + The 32-bit versions are similar, with ld4s replacing ld, and offsets into + the GOT being multiples of 4 instead of 8. + +*/ + +#define PLT_HEADER_SIZE_IN_BUNDLES 3 +#define PLT_ENTRY_SIZE_IN_BUNDLES 5 +#define PLT_TAIL_SIZE_IN_BUNDLES 1 + +#define PLT_HEADER_SIZE \ + (PLT_HEADER_SIZE_IN_BUNDLES * TILEGX_BUNDLE_SIZE_IN_BYTES) +#define PLT_ENTRY_SIZE \ + (PLT_ENTRY_SIZE_IN_BUNDLES * TILEGX_BUNDLE_SIZE_IN_BYTES) +#define PLT_TAIL_SIZE \ + (PLT_TAIL_SIZE_IN_BUNDLES * TILEGX_BUNDLE_SIZE_IN_BYTES) + +#define GOT_ENTRY_SIZE(htab) TILEGX_ELF_WORD_BYTES (htab) + +#define GOTPLT_HEADER_SIZE(htab) (2 * GOT_ENTRY_SIZE (htab)) + +static const bfd_byte +tilegx64_plt0_entry[PLT_HEADER_SIZE] = +{ + 0x00, 0x30, 0x48, 0x51, + 0x6e, 0x43, 0xa0, 0x18, /* { ld_add r28, r27, 8 } */ + 0x00, 0x30, 0xbc, 0x35, + 0x00, 0x40, 0xde, 0x9e, /* { ld r27, r27 } */ + 0xff, 0xaf, 0x30, 0x40, + 0x60, 0x73, 0x6a, 0x28, /* { info 10 ; jr r27 } */ +}; + +static const bfd_byte +tilegx64_long_plt_entry[PLT_ENTRY_SIZE] = +{ + 0xdc, 0x0f, 0x00, 0x10, + 0x0d, 0xf0, 0x6a, 0x28, /* { moveli r28, 0 ; lnk r26 } */ + 0xdb, 0x0f, 0x00, 0x10, + 0x8e, 0x03, 0x00, 0x38, /* { moveli r27, 0 ; shl16insli r28, r28, 0 } */ + 0x9c, 0xc6, 0x0d, 0xd0, + 0x6d, 0x03, 0x00, 0x38, /* { add r28, r26, r28 ; shl16insli r27, r27, 0 } */ + 0x9b, 0xb6, 0xc5, 0xad, + 0xff, 0x57, 0xe0, 0x8e, /* { add r27, r26, r27 ; info 10 ; ld r28, r28 } */ + 0xdd, 0x0f, 0x00, 0x70, + 0x80, 0x73, 0x6a, 0x28, /* { shl16insli r29, zero, 0 ; jr r28 } */ +}; + +static const bfd_byte +tilegx64_short_plt_entry[PLT_ENTRY_SIZE] = +{ + 0x00, 0x30, 0x48, 0x51, + 0x0d, 0xf0, 0x6a, 0x28, /* { lnk r26 } */ + 0x9c, 0x06, 0x00, 0x90, + 0xed, 0x07, 0x00, 0x00, /* { addli r28, r26, 0 ; moveli r27, 0 } */ + 0xdd, 0x0f, 0x00, 0x70, + 0x8e, 0xeb, 0x6a, 0x28, /* { shl16insli r29, zero, 0 ; ld r28, r28 } */ + 0x9b, 0xb6, 0x0d, 0x50, + 0x80, 0x73, 0x6a, 0x28, /* { add r27, r26, r27 ; jr r28 } */ + 0x00, 0x30, 0x48, 0xd1, + 0xff, 0x57, 0x18, 0x18, /* { info 10 } */ +}; + +/* Reuse an existing info 10 bundle. */ +static const bfd_byte const *tilegx64_plt_tail_entry = + &tilegx64_short_plt_entry[4 * TILEGX_BUNDLE_SIZE_IN_BYTES]; + +static const bfd_byte +tilegx32_plt0_entry[PLT_HEADER_SIZE] = +{ + 0x00, 0x30, 0x48, 0x51, + 0x6e, 0x23, 0x58, 0x18, /* { ld4s_add r28, r27, 4 } */ + 0x00, 0x30, 0xbc, 0x35, + 0x00, 0x40, 0xde, 0x9c, /* { ld4s r27, r27 } */ + 0xff, 0xaf, 0x30, 0x40, + 0x60, 0x73, 0x6a, 0x28, /* { info 10 ; jr r27 } */ +}; + +static const bfd_byte +tilegx32_long_plt_entry[PLT_ENTRY_SIZE] = +{ + 0xdc, 0x0f, 0x00, 0x10, + 0x0d, 0xf0, 0x6a, 0x28, /* { moveli r28, 0 ; lnk r26 } */ + 0xdb, 0x0f, 0x00, 0x10, + 0x8e, 0x03, 0x00, 0x38, /* { moveli r27, 0 ; shl16insli r28, r28, 0 } */ + 0x9c, 0xc6, 0x0d, 0xd0, + 0x6d, 0x03, 0x00, 0x38, /* { add r28, r26, r28 ; shl16insli r27, r27, 0 } */ + 0x9b, 0xb6, 0xc5, 0xad, + 0xff, 0x57, 0xe0, 0x8c, /* { add r27, r26, r27 ; info 10 ; ld4s r28, r28 } */ + 0xdd, 0x0f, 0x00, 0x70, + 0x80, 0x73, 0x6a, 0x28, /* { shl16insli r29, zero, 0 ; jr r28 } */ +}; + +static const bfd_byte +tilegx32_short_plt_entry[PLT_ENTRY_SIZE] = +{ + 0x00, 0x30, 0x48, 0x51, + 0x0d, 0xf0, 0x6a, 0x28, /* { lnk r26 } */ + 0x9c, 0x06, 0x00, 0x90, + 0xed, 0x07, 0x00, 0x00, /* { addli r28, r26, 0 ; moveli r27, 0 } */ + 0xdd, 0x0f, 0x00, 0x70, + 0x8e, 0x9b, 0x6a, 0x28, /* { shl16insli r29, zero, 0 ; ld4s r28, r28 } */ + 0x9b, 0xb6, 0x0d, 0x50, + 0x80, 0x73, 0x6a, 0x28, /* { add r27, r26, r27 ; jr r28 } */ + 0x00, 0x30, 0x48, 0xd1, + 0xff, 0x57, 0x18, 0x18, /* { info 10 } */ +}; + +/* Reuse an existing info 10 bundle. */ +static const bfd_byte const *tilegx32_plt_tail_entry = + &tilegx64_short_plt_entry[4 * TILEGX_BUNDLE_SIZE_IN_BYTES]; + +static int +tilegx_plt_entry_build (bfd *output_bfd, + struct tilegx_elf_link_hash_table *htab, + asection *splt, asection *sgotplt, + bfd_vma offset, bfd_vma *r_offset) +{ + int plt_index = (offset - PLT_HEADER_SIZE) / PLT_ENTRY_SIZE; + int got_offset = (plt_index * GOT_ENTRY_SIZE (htab) + + GOTPLT_HEADER_SIZE (htab)); + tilegx_bundle_bits *pc; + + /* Compute the distance from the got entry to the lnk. */ + bfd_signed_vma dist_got_entry = sgotplt->output_section->vma + + sgotplt->output_offset + + got_offset + - splt->output_section->vma + - splt->output_offset + - offset + - TILEGX_BUNDLE_SIZE_IN_BYTES; + + /* Compute the distance to GOTPLT[0]. */ + bfd_signed_vma dist_got0 = dist_got_entry - got_offset; + + /* Check whether we can use the short plt entry with 16-bit offset. */ + bfd_boolean short_plt_entry = + (dist_got_entry <= 0x7fff && dist_got0 >= -0x8000); + + const tilegx_bundle_bits *plt_entry = (tilegx_bundle_bits *) + (ABI_64_P (output_bfd) ? + (short_plt_entry ? tilegx64_short_plt_entry : tilegx64_long_plt_entry) : + (short_plt_entry ? tilegx32_short_plt_entry : tilegx32_long_plt_entry)); + + /* Copy the plt entry template. */ + memcpy (splt->contents + offset, plt_entry, PLT_ENTRY_SIZE); + + /* Write the immediate offsets. */ + pc = (tilegx_bundle_bits *)(splt->contents + offset); + + if (short_plt_entry) + { + /* { lnk r28 } */ + pc++; + + /* { addli r28, r28, &GOTPLT[MY_GOT_INDEX] ; moveli r27, &GOTPLT[0] } */ + *pc++ |= create_Imm16_X0 (dist_got_entry) + | create_Imm16_X1 (dist_got0); + + /* { shl16insli r29, zero, MY_PLT_INDEX ; ld r28, r28 } */ + *pc++ |= create_Imm16_X0 (plt_index); + } + else + { + /* { moveli r28, &GOTPLT[MY_GOT_INDEX] ; lnk r26 } */ + *pc++ |= create_Imm16_X0 (dist_got_entry >> 16); + + /* { moveli r27, &GOTPLT[0] ; + shl16insli r28, r28, &GOTPLT[MY_GOT_INDEX] } */ + *pc++ |= create_Imm16_X0 (dist_got0 >> 16) + | create_Imm16_X1 (dist_got_entry); + + /* { add r28, r26, r28 ; shl16insli r27, r27, &GOTPLT[0] } */ + *pc++ |= create_Imm16_X1 (dist_got0); + + /* { add r27, r26, r27 ; info 10 ; ld r28, r28 } */ + pc++; + + /* { shl16insli r29, zero, MY_GOT_INDEX ; jr r28 } */ + *pc++ |= create_Imm16_X0 (plt_index); + } + + /* Set the relocation offset. */ + *r_offset = got_offset; + + return plt_index; +} + +/* Create an entry in an TILEGX ELF linker hash table. */ + +static struct bfd_hash_entry * +link_hash_newfunc (struct bfd_hash_entry *entry, + struct bfd_hash_table *table, const char *string) +{ + /* Allocate the structure if it has not already been allocated by a + subclass. */ + if (entry == NULL) + { + entry = + bfd_hash_allocate (table, + sizeof (struct tilegx_elf_link_hash_entry)); + if (entry == NULL) + return entry; + } + + /* Call the allocation method of the superclass. */ + entry = _bfd_elf_link_hash_newfunc (entry, table, string); + if (entry != NULL) + { + struct tilegx_elf_link_hash_entry *eh; + + eh = (struct tilegx_elf_link_hash_entry *) entry; + eh->dyn_relocs = NULL; + eh->tls_type = GOT_UNKNOWN; + } + + return entry; +} + +/* Create a TILEGX ELF linker hash table. */ + +struct bfd_link_hash_table * +tilegx_elf_link_hash_table_create (bfd *abfd) +{ + struct tilegx_elf_link_hash_table *ret; + bfd_size_type amt = sizeof (struct tilegx_elf_link_hash_table); + + ret = (struct tilegx_elf_link_hash_table *) bfd_zmalloc (amt); + if (ret == NULL) + return NULL; + +#ifdef BFD64 + if (ABI_64_P (abfd)) + { + ret->bytes_per_word = 8; + ret->word_align_power = 3; + ret->bytes_per_rela = sizeof (Elf64_External_Rela); + ret->dtpoff_reloc = R_TILEGX_TLS_DTPOFF64; + ret->dtpmod_reloc = R_TILEGX_TLS_DTPMOD64; + ret->tpoff_reloc = R_TILEGX_TLS_TPOFF64; + ret->r_info = tilegx_elf_r_info_64; + ret->r_symndx = tilegx_elf_r_symndx_64; + ret->dynamic_interpreter = ELF64_DYNAMIC_INTERPRETER; + ret->put_word = tilegx_put_word_64; + } + else +#endif + { + ret->bytes_per_word = 4; + ret->word_align_power = 2; + ret->bytes_per_rela = sizeof (Elf32_External_Rela); + ret->dtpoff_reloc = R_TILEGX_TLS_DTPOFF32; + ret->dtpmod_reloc = R_TILEGX_TLS_DTPMOD32; + ret->tpoff_reloc = R_TILEGX_TLS_TPOFF32; + ret->r_info = tilegx_elf_r_info_32; + ret->r_symndx = tilegx_elf_r_symndx_32; + ret->dynamic_interpreter = ELF32_DYNAMIC_INTERPRETER; + ret->put_word = tilegx_put_word_32; + } + + if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc, + sizeof (struct tilegx_elf_link_hash_entry), + TILEGX_ELF_DATA)) + { + free (ret); + return NULL; + } + + return &ret->elf.root; +} + +/* Create the .got section. */ + +static bfd_boolean +tilegx_elf_create_got_section (bfd *abfd, struct bfd_link_info *info) +{ + flagword flags; + asection *s, *s_got; + struct elf_link_hash_entry *h; + const struct elf_backend_data *bed = get_elf_backend_data (abfd); + struct elf_link_hash_table *htab = elf_hash_table (info); + + /* This function may be called more than once. */ + s = bfd_get_section_by_name (abfd, ".got"); + if (s != NULL && (s->flags & SEC_LINKER_CREATED) != 0) + return TRUE; + + flags = bed->dynamic_sec_flags; + + s = bfd_make_section_with_flags (abfd, + (bed->rela_plts_and_copies_p + ? ".rela.got" : ".rel.got"), + (bed->dynamic_sec_flags + | SEC_READONLY)); + if (s == NULL + || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) + return FALSE; + htab->srelgot = s; + + s = s_got = bfd_make_section_with_flags (abfd, ".got", flags); + if (s == NULL + || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) + return FALSE; + htab->sgot = s; + + /* The first bit of the global offset table is the header. */ + s->size += bed->got_header_size; + + if (bed->want_got_plt) + { + s = bfd_make_section_with_flags (abfd, ".got.plt", flags); + if (s == NULL + || !bfd_set_section_alignment (abfd, s, + bed->s->log_file_align)) + return FALSE; + htab->sgotplt = s; + + /* Reserve room for the header. */ + s->size += GOTPLT_HEADER_SIZE (tilegx_elf_hash_table (info)); + } + + if (bed->want_got_sym) + { + /* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got + section. We don't do this in the linker script because we don't want + to define the symbol if we are not creating a global offset + table. */ + h = _bfd_elf_define_linkage_sym (abfd, info, s_got, + "_GLOBAL_OFFSET_TABLE_"); + elf_hash_table (info)->hgot = h; + if (h == NULL) + return FALSE; + } + + return TRUE; +} + +/* Create .plt, .rela.plt, .got, .got.plt, .rela.got, .dynbss, and + .rela.bss sections in DYNOBJ, and set up shortcuts to them in our + hash table. */ + +bfd_boolean +tilegx_elf_create_dynamic_sections (bfd *dynobj, + struct bfd_link_info *info) +{ + struct tilegx_elf_link_hash_table *htab; + + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + if (!tilegx_elf_create_got_section (dynobj, info)) + return FALSE; + + if (!_bfd_elf_create_dynamic_sections (dynobj, info)) + return FALSE; + + htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss"); + if (!info->shared) + htab->srelbss = bfd_get_section_by_name (dynobj, ".rela.bss"); + + if (!htab->elf.splt || !htab->elf.srelplt || !htab->sdynbss + || (!info->shared && !htab->srelbss)) + abort (); + + return TRUE; +} + +/* Copy the extra info we tack onto an elf_link_hash_entry. */ + +void +tilegx_elf_copy_indirect_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *dir, + struct elf_link_hash_entry *ind) +{ + struct tilegx_elf_link_hash_entry *edir, *eind; + + edir = (struct tilegx_elf_link_hash_entry *) dir; + eind = (struct tilegx_elf_link_hash_entry *) ind; + + if (eind->dyn_relocs != NULL) + { + if (edir->dyn_relocs != NULL) + { + struct tilegx_elf_dyn_relocs **pp; + struct tilegx_elf_dyn_relocs *p; + + /* Add reloc counts against the indirect sym to the direct sym + list. Merge any entries against the same section. */ + for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) + { + struct tilegx_elf_dyn_relocs *q; + + for (q = edir->dyn_relocs; q != NULL; q = q->next) + if (q->sec == p->sec) + { + q->pc_count += p->pc_count; + q->count += p->count; + *pp = p->next; + break; + } + if (q == NULL) + pp = &p->next; + } + *pp = edir->dyn_relocs; + } + + edir->dyn_relocs = eind->dyn_relocs; + eind->dyn_relocs = NULL; + } + + if (ind->root.type == bfd_link_hash_indirect + && dir->got.refcount <= 0) + { + edir->tls_type = eind->tls_type; + eind->tls_type = GOT_UNKNOWN; + } + _bfd_elf_link_hash_copy_indirect (info, dir, ind); +} + +/* Look through the relocs for a section during the first phase, and + allocate space in the global offset table or procedure linkage + table. */ + +bfd_boolean +tilegx_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, + asection *sec, const Elf_Internal_Rela *relocs) +{ + struct tilegx_elf_link_hash_table *htab; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + const Elf_Internal_Rela *rel; + const Elf_Internal_Rela *rel_end; + asection *sreloc; + int num_relocs; + + if (info->relocatable) + return TRUE; + + htab = tilegx_elf_hash_table (info); + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + sym_hashes = elf_sym_hashes (abfd); + + sreloc = NULL; + + num_relocs = sec->reloc_count; + + BFD_ASSERT (is_tilegx_elf (abfd) || num_relocs == 0); + + if (htab->elf.dynobj == NULL) + htab->elf.dynobj = abfd; + + rel_end = relocs + num_relocs; + for (rel = relocs; rel < rel_end; rel++) + { + unsigned int r_type; + unsigned long r_symndx; + struct elf_link_hash_entry *h; + int tls_type; + + r_symndx = TILEGX_ELF_R_SYMNDX (htab, rel->r_info); + r_type = TILEGX_ELF_R_TYPE (rel->r_info); + + if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr)) + { + (*_bfd_error_handler) (_("%B: bad symbol index: %d"), + abfd, r_symndx); + return FALSE; + } + + if (r_symndx < symtab_hdr->sh_info) + h = NULL; + else + { + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + } + + switch (r_type) + { + case R_TILEGX_IMM16_X0_HW0_TLS_GD: + case R_TILEGX_IMM16_X1_HW0_TLS_GD: + case R_TILEGX_IMM16_X0_HW1_TLS_GD: + case R_TILEGX_IMM16_X1_HW1_TLS_GD: + case R_TILEGX_IMM16_X0_HW2_TLS_GD: + case R_TILEGX_IMM16_X1_HW2_TLS_GD: + case R_TILEGX_IMM16_X0_HW3_TLS_GD: + case R_TILEGX_IMM16_X1_HW3_TLS_GD: + case R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD: + case R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD: + case R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD: + tls_type = GOT_TLS_GD; + goto have_got_reference; + + case R_TILEGX_IMM16_X0_HW0_TLS_IE: + case R_TILEGX_IMM16_X1_HW0_TLS_IE: + case R_TILEGX_IMM16_X0_HW1_TLS_IE: + case R_TILEGX_IMM16_X1_HW1_TLS_IE: + case R_TILEGX_IMM16_X0_HW2_TLS_IE: + case R_TILEGX_IMM16_X1_HW2_TLS_IE: + case R_TILEGX_IMM16_X0_HW3_TLS_IE: + case R_TILEGX_IMM16_X1_HW3_TLS_IE: + case R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE: + case R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE: + case R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE: + tls_type = GOT_TLS_IE; + if (info->shared) + info->flags |= DF_STATIC_TLS; + goto have_got_reference; + + case R_TILEGX_IMM16_X0_HW0_GOT: + case R_TILEGX_IMM16_X1_HW0_GOT: + case R_TILEGX_IMM16_X0_HW1_GOT: + case R_TILEGX_IMM16_X1_HW1_GOT: + case R_TILEGX_IMM16_X0_HW2_GOT: + case R_TILEGX_IMM16_X1_HW2_GOT: + case R_TILEGX_IMM16_X0_HW3_GOT: + case R_TILEGX_IMM16_X1_HW3_GOT: + case R_TILEGX_IMM16_X0_HW0_LAST_GOT: + case R_TILEGX_IMM16_X1_HW0_LAST_GOT: + case R_TILEGX_IMM16_X0_HW1_LAST_GOT: + case R_TILEGX_IMM16_X1_HW1_LAST_GOT: + case R_TILEGX_IMM16_X0_HW2_LAST_GOT: + case R_TILEGX_IMM16_X1_HW2_LAST_GOT: + tls_type = GOT_NORMAL; + /* Fall Through */ + + have_got_reference: + /* This symbol requires a global offset table entry. */ + { + int old_tls_type; + + if (h != NULL) + { + h->got.refcount += 1; + old_tls_type = tilegx_elf_hash_entry(h)->tls_type; + } + else + { + bfd_signed_vma *local_got_refcounts; + + /* This is a global offset table entry for a local symbol. */ + local_got_refcounts = elf_local_got_refcounts (abfd); + if (local_got_refcounts == NULL) + { + bfd_size_type size; + + size = symtab_hdr->sh_info; + size *= (sizeof (bfd_signed_vma) + sizeof(char)); + local_got_refcounts = ((bfd_signed_vma *) + bfd_zalloc (abfd, size)); + if (local_got_refcounts == NULL) + return FALSE; + elf_local_got_refcounts (abfd) = local_got_refcounts; + _bfd_tilegx_elf_local_got_tls_type (abfd) + = (char *) (local_got_refcounts + symtab_hdr->sh_info); + } + local_got_refcounts[r_symndx] += 1; + old_tls_type = _bfd_tilegx_elf_local_got_tls_type (abfd) [r_symndx]; + } + + /* If a TLS symbol is accessed using IE at least once, + there is no point to use dynamic model for it. */ + if (old_tls_type != tls_type && old_tls_type != GOT_UNKNOWN + && (old_tls_type != GOT_TLS_GD + || tls_type != GOT_TLS_IE)) + { + if (old_tls_type == GOT_TLS_IE && tls_type == GOT_TLS_GD) + tls_type = old_tls_type; + else + { + (*_bfd_error_handler) + (_("%B: `%s' accessed both as normal and thread local symbol"), + abfd, h ? h->root.root.string : ""); + return FALSE; + } + } + + if (old_tls_type != tls_type) + { + if (h != NULL) + tilegx_elf_hash_entry (h)->tls_type = tls_type; + else + _bfd_tilegx_elf_local_got_tls_type (abfd) [r_symndx] = tls_type; + } + } + + if (htab->elf.sgot == NULL) + { + if (!tilegx_elf_create_got_section (htab->elf.dynobj, info)) + return FALSE; + } + break; + + case R_TILEGX_JUMPOFF_X1_PLT: + /* This symbol requires a procedure linkage table entry. We + actually build the entry in adjust_dynamic_symbol, + because this might be a case of linking PIC code without + linking in any dynamic objects, in which case we don't + need to generate a procedure linkage table after all. */ + + if (h != NULL) + { + h->needs_plt = 1; + h->plt.refcount += 1; + } + break; + + case R_TILEGX_64_PCREL: + case R_TILEGX_32_PCREL: + case R_TILEGX_16_PCREL: + case R_TILEGX_8_PCREL: + case R_TILEGX_IMM16_X0_HW0_PCREL: + case R_TILEGX_IMM16_X1_HW0_PCREL: + case R_TILEGX_IMM16_X0_HW1_PCREL: + case R_TILEGX_IMM16_X1_HW1_PCREL: + case R_TILEGX_IMM16_X0_HW2_PCREL: + case R_TILEGX_IMM16_X1_HW2_PCREL: + case R_TILEGX_IMM16_X0_HW3_PCREL: + case R_TILEGX_IMM16_X1_HW3_PCREL: + case R_TILEGX_IMM16_X0_HW0_LAST_PCREL: + case R_TILEGX_IMM16_X1_HW0_LAST_PCREL: + case R_TILEGX_IMM16_X0_HW1_LAST_PCREL: + case R_TILEGX_IMM16_X1_HW1_LAST_PCREL: + case R_TILEGX_IMM16_X0_HW2_LAST_PCREL: + case R_TILEGX_IMM16_X1_HW2_LAST_PCREL: + if (h != NULL) + h->non_got_ref = 1; + + if (h != NULL + && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + break; + /* Fall through. */ + + case R_TILEGX_64: + case R_TILEGX_32: + case R_TILEGX_16: + case R_TILEGX_8: + case R_TILEGX_HW0: + case R_TILEGX_HW1: + case R_TILEGX_HW2: + case R_TILEGX_HW3: + case R_TILEGX_HW0_LAST: + case R_TILEGX_HW1_LAST: + case R_TILEGX_HW2_LAST: + case R_TILEGX_COPY: + case R_TILEGX_GLOB_DAT: + case R_TILEGX_JMP_SLOT: + case R_TILEGX_RELATIVE: + case R_TILEGX_BROFF_X1: + case R_TILEGX_JUMPOFF_X1: + case R_TILEGX_IMM8_X0: + case R_TILEGX_IMM8_Y0: + case R_TILEGX_IMM8_X1: + case R_TILEGX_IMM8_Y1: + case R_TILEGX_DEST_IMM8_X1: + case R_TILEGX_MT_IMM14_X1: + case R_TILEGX_MF_IMM14_X1: + case R_TILEGX_MMSTART_X0: + case R_TILEGX_MMEND_X0: + case R_TILEGX_SHAMT_X0: + case R_TILEGX_SHAMT_X1: + case R_TILEGX_SHAMT_Y0: + case R_TILEGX_SHAMT_Y1: + case R_TILEGX_IMM16_X0_HW0: + case R_TILEGX_IMM16_X1_HW0: + case R_TILEGX_IMM16_X0_HW1: + case R_TILEGX_IMM16_X1_HW1: + case R_TILEGX_IMM16_X0_HW2: + case R_TILEGX_IMM16_X1_HW2: + case R_TILEGX_IMM16_X0_HW3: + case R_TILEGX_IMM16_X1_HW3: + case R_TILEGX_IMM16_X0_HW0_LAST: + case R_TILEGX_IMM16_X1_HW0_LAST: + case R_TILEGX_IMM16_X0_HW1_LAST: + case R_TILEGX_IMM16_X1_HW1_LAST: + case R_TILEGX_IMM16_X0_HW2_LAST: + case R_TILEGX_IMM16_X1_HW2_LAST: + if (h != NULL) + { + h->non_got_ref = 1; + + if (!info->shared) + { + /* We may need a .plt entry if the function this reloc + refers to is in a shared lib. */ + h->plt.refcount += 1; + } + } + + /* If we are creating a shared library, and this is a reloc + against a global symbol, or a non PC relative reloc + against a local symbol, then we need to copy the reloc + into the shared library. However, if we are linking with + -Bsymbolic, we do not need to copy a reloc against a + global symbol which is defined in an object we are + including in the link (i.e., DEF_REGULAR is set). At + this point we have not seen all the input files, so it is + possible that DEF_REGULAR is not set now but will be set + later (it is never cleared). In case of a weak definition, + DEF_REGULAR may be cleared later by a strong definition in + a shared library. We account for that possibility below by + storing information in the relocs_copied field of the hash + table entry. A similar situation occurs when creating + shared libraries and symbol visibility changes render the + symbol local. + + If on the other hand, we are creating an executable, we + may need to keep relocations for symbols satisfied by a + dynamic library if we manage to avoid copy relocs for the + symbol. */ + if ((info->shared + && (sec->flags & SEC_ALLOC) != 0 + && (! tilegx_elf_howto_table[r_type].pc_relative + || (h != NULL + && (! info->symbolic + || h->root.type == bfd_link_hash_defweak + || !h->def_regular)))) + || (!info->shared + && (sec->flags & SEC_ALLOC) != 0 + && h != NULL + && (h->root.type == bfd_link_hash_defweak + || !h->def_regular))) + { + struct tilegx_elf_dyn_relocs *p; + struct tilegx_elf_dyn_relocs **head; + + /* When creating a shared object, we must copy these + relocs into the output file. We create a reloc + section in dynobj and make room for the reloc. */ + if (sreloc == NULL) + { + sreloc = _bfd_elf_make_dynamic_reloc_section + (sec, htab->elf.dynobj, htab->word_align_power, abfd, + /*rela?*/ TRUE); + + if (sreloc == NULL) + return FALSE; + } + + /* If this is a global symbol, we count the number of + relocations we need for this symbol. */ + if (h != NULL) + head = + &((struct tilegx_elf_link_hash_entry *) h)->dyn_relocs; + else + { + /* Track dynamic relocs needed for local syms too. + We really need local syms available to do this + easily. Oh well. */ + + asection *s; + void *vpp; + Elf_Internal_Sym *isym; + + isym = bfd_sym_from_r_symndx (&htab->sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; + + s = bfd_section_from_elf_index (abfd, isym->st_shndx); + if (s == NULL) + s = sec; + + vpp = &elf_section_data (s)->local_dynrel; + head = (struct tilegx_elf_dyn_relocs **) vpp; + } + + p = *head; + if (p == NULL || p->sec != sec) + { + bfd_size_type amt = sizeof *p; + p = ((struct tilegx_elf_dyn_relocs *) + bfd_alloc (htab->elf.dynobj, amt)); + if (p == NULL) + return FALSE; + p->next = *head; + *head = p; + p->sec = sec; + p->count = 0; + p->pc_count = 0; + } + + p->count += 1; + if (tilegx_elf_howto_table[r_type].pc_relative) + p->pc_count += 1; + } + + break; + + case R_TILEGX_GNU_VTINHERIT: + if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) + return FALSE; + break; + + case R_TILEGX_GNU_VTENTRY: + if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend)) + return FALSE; + break; + + default: + break; + } + } + + return TRUE; +} + + +asection * +tilegx_elf_gc_mark_hook (asection *sec, + struct bfd_link_info *info, + Elf_Internal_Rela *rel, + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) +{ + if (h != NULL) + { + switch (TILEGX_ELF_R_TYPE (rel->r_info)) + { + case R_TILEGX_GNU_VTINHERIT: + case R_TILEGX_GNU_VTENTRY: + break; + } + } + + return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); +} + +/* Update the got entry reference counts for the section being removed. */ +bfd_boolean +tilegx_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, + asection *sec, const Elf_Internal_Rela *relocs) +{ + struct tilegx_elf_link_hash_table *htab; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + bfd_signed_vma *local_got_refcounts; + const Elf_Internal_Rela *rel, *relend; + + if (info->relocatable) + return TRUE; + + BFD_ASSERT (is_tilegx_elf (abfd) || sec->reloc_count == 0); + + elf_section_data (sec)->local_dynrel = NULL; + + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + symtab_hdr = &elf_symtab_hdr (abfd); + sym_hashes = elf_sym_hashes (abfd); + local_got_refcounts = elf_local_got_refcounts (abfd); + + relend = relocs + sec->reloc_count; + for (rel = relocs; rel < relend; rel++) + { + unsigned long r_symndx; + unsigned int r_type; + struct elf_link_hash_entry *h = NULL; + + r_symndx = TILEGX_ELF_R_SYMNDX (htab, rel->r_info); + if (r_symndx >= symtab_hdr->sh_info) + { + struct tilegx_elf_link_hash_entry *eh; + struct tilegx_elf_dyn_relocs **pp; + struct tilegx_elf_dyn_relocs *p; + + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + eh = (struct tilegx_elf_link_hash_entry *) h; + for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next) + if (p->sec == sec) + { + /* Everything must go for SEC. */ + *pp = p->next; + break; + } + } + + r_type = TILEGX_ELF_R_TYPE (rel->r_info); + + switch (r_type) + { + case R_TILEGX_IMM16_X0_HW0_GOT: + case R_TILEGX_IMM16_X1_HW0_GOT: + case R_TILEGX_IMM16_X0_HW1_GOT: + case R_TILEGX_IMM16_X1_HW1_GOT: + case R_TILEGX_IMM16_X0_HW2_GOT: + case R_TILEGX_IMM16_X1_HW2_GOT: + case R_TILEGX_IMM16_X0_HW3_GOT: + case R_TILEGX_IMM16_X1_HW3_GOT: + case R_TILEGX_IMM16_X0_HW0_LAST_GOT: + case R_TILEGX_IMM16_X1_HW0_LAST_GOT: + case R_TILEGX_IMM16_X0_HW1_LAST_GOT: + case R_TILEGX_IMM16_X1_HW1_LAST_GOT: + case R_TILEGX_IMM16_X0_HW2_LAST_GOT: + case R_TILEGX_IMM16_X1_HW2_LAST_GOT: + case R_TILEGX_IMM16_X0_HW0_TLS_GD: + case R_TILEGX_IMM16_X1_HW0_TLS_GD: + case R_TILEGX_IMM16_X0_HW1_TLS_GD: + case R_TILEGX_IMM16_X1_HW1_TLS_GD: + case R_TILEGX_IMM16_X0_HW2_TLS_GD: + case R_TILEGX_IMM16_X1_HW2_TLS_GD: + case R_TILEGX_IMM16_X0_HW3_TLS_GD: + case R_TILEGX_IMM16_X1_HW3_TLS_GD: + case R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD: + case R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD: + case R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD: + case R_TILEGX_IMM16_X0_HW0_TLS_IE: + case R_TILEGX_IMM16_X1_HW0_TLS_IE: + case R_TILEGX_IMM16_X0_HW1_TLS_IE: + case R_TILEGX_IMM16_X1_HW1_TLS_IE: + case R_TILEGX_IMM16_X0_HW2_TLS_IE: + case R_TILEGX_IMM16_X1_HW2_TLS_IE: + case R_TILEGX_IMM16_X0_HW3_TLS_IE: + case R_TILEGX_IMM16_X1_HW3_TLS_IE: + case R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE: + case R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE: + case R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE: + if (h != NULL) + { + if (h->got.refcount > 0) + h->got.refcount--; + } + else + { + if (local_got_refcounts[r_symndx] > 0) + local_got_refcounts[r_symndx]--; + } + break; + + case R_TILEGX_64_PCREL: + case R_TILEGX_32_PCREL: + case R_TILEGX_16_PCREL: + case R_TILEGX_8_PCREL: + case R_TILEGX_IMM16_X0_HW0_PCREL: + case R_TILEGX_IMM16_X1_HW0_PCREL: + case R_TILEGX_IMM16_X0_HW1_PCREL: + case R_TILEGX_IMM16_X1_HW1_PCREL: + case R_TILEGX_IMM16_X0_HW2_PCREL: + case R_TILEGX_IMM16_X1_HW2_PCREL: + case R_TILEGX_IMM16_X0_HW3_PCREL: + case R_TILEGX_IMM16_X1_HW3_PCREL: + case R_TILEGX_IMM16_X0_HW0_LAST_PCREL: + case R_TILEGX_IMM16_X1_HW0_LAST_PCREL: + case R_TILEGX_IMM16_X0_HW1_LAST_PCREL: + case R_TILEGX_IMM16_X1_HW1_LAST_PCREL: + case R_TILEGX_IMM16_X0_HW2_LAST_PCREL: + case R_TILEGX_IMM16_X1_HW2_LAST_PCREL: + if (h != NULL + && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + break; + /* Fall through. */ + + case R_TILEGX_64: + case R_TILEGX_32: + case R_TILEGX_16: + case R_TILEGX_8: + case R_TILEGX_HW0: + case R_TILEGX_HW1: + case R_TILEGX_HW2: + case R_TILEGX_HW3: + case R_TILEGX_HW0_LAST: + case R_TILEGX_HW1_LAST: + case R_TILEGX_HW2_LAST: + case R_TILEGX_COPY: + case R_TILEGX_GLOB_DAT: + case R_TILEGX_JMP_SLOT: + case R_TILEGX_RELATIVE: + case R_TILEGX_BROFF_X1: + case R_TILEGX_JUMPOFF_X1: + case R_TILEGX_IMM8_X0: + case R_TILEGX_IMM8_Y0: + case R_TILEGX_IMM8_X1: + case R_TILEGX_IMM8_Y1: + case R_TILEGX_DEST_IMM8_X1: + case R_TILEGX_MT_IMM14_X1: + case R_TILEGX_MF_IMM14_X1: + case R_TILEGX_MMSTART_X0: + case R_TILEGX_MMEND_X0: + case R_TILEGX_SHAMT_X0: + case R_TILEGX_SHAMT_X1: + case R_TILEGX_SHAMT_Y0: + case R_TILEGX_SHAMT_Y1: + case R_TILEGX_IMM16_X0_HW0: + case R_TILEGX_IMM16_X1_HW0: + case R_TILEGX_IMM16_X0_HW1: + case R_TILEGX_IMM16_X1_HW1: + case R_TILEGX_IMM16_X0_HW2: + case R_TILEGX_IMM16_X1_HW2: + case R_TILEGX_IMM16_X0_HW3: + case R_TILEGX_IMM16_X1_HW3: + case R_TILEGX_IMM16_X0_HW0_LAST: + case R_TILEGX_IMM16_X1_HW0_LAST: + case R_TILEGX_IMM16_X0_HW1_LAST: + case R_TILEGX_IMM16_X1_HW1_LAST: + case R_TILEGX_IMM16_X0_HW2_LAST: + case R_TILEGX_IMM16_X1_HW2_LAST: + if (info->shared) + break; + /* Fall through. */ + + case R_TILEGX_JUMPOFF_X1_PLT: + if (h != NULL) + { + if (h->plt.refcount > 0) + h->plt.refcount--; + } + break; + + default: + break; + } + } + + return TRUE; +} + +/* Adjust a symbol defined by a dynamic object and referenced by a + regular object. The current definition is in some section of the + dynamic object, but we're not including those sections. We have to + change the definition to something the rest of the link can + understand. */ + +bfd_boolean +tilegx_elf_adjust_dynamic_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *h) +{ + struct tilegx_elf_link_hash_table *htab; + struct tilegx_elf_link_hash_entry * eh; + struct tilegx_elf_dyn_relocs *p; + bfd *dynobj; + asection *s; + + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + dynobj = htab->elf.dynobj; + + /* Make sure we know what is going on here. */ + BFD_ASSERT (dynobj != NULL + && (h->needs_plt + || h->u.weakdef != NULL + || (h->def_dynamic + && h->ref_regular + && !h->def_regular))); + + /* If this is a function, put it in the procedure linkage table. We + will fill in the contents of the procedure linkage table later + (although we could actually do it here). */ + if (h->type == STT_FUNC || h->needs_plt) + { + if (h->plt.refcount <= 0 + || SYMBOL_CALLS_LOCAL (info, h) + || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT + && h->root.type == bfd_link_hash_undefweak)) + { + /* This case can occur if we saw a R_TILEGX_JUMPOFF_X1_PLT + reloc in an input file, but the symbol was never referred + to by a dynamic object, or if all references were garbage + collected. In such a case, we don't actually need to build + a procedure linkage table, and we can just do a + R_TILEGX_JUMPOFF_X1 relocation instead. */ + h->plt.offset = (bfd_vma) -1; + h->needs_plt = 0; + } + + return TRUE; + } + else + h->plt.offset = (bfd_vma) -1; + + /* If this is a weak symbol, and there is a real definition, the + processor independent code will have arranged for us to see the + real definition first, and we can just use the same value. */ + if (h->u.weakdef != NULL) + { + BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined + || h->u.weakdef->root.type == bfd_link_hash_defweak); + h->root.u.def.section = h->u.weakdef->root.u.def.section; + h->root.u.def.value = h->u.weakdef->root.u.def.value; + return TRUE; + } + + /* This is a reference to a symbol defined by a dynamic object which + is not a function. */ + + /* If we are creating a shared library, we must presume that the + only references to the symbol are via the global offset table. + For such cases we need not do anything here; the relocations will + be handled correctly by relocate_section. */ + if (info->shared) + return TRUE; + + /* If there are no references to this symbol that do not use the + GOT, we don't need to generate a copy reloc. */ + if (!h->non_got_ref) + return TRUE; + + /* If -z nocopyreloc was given, we won't generate them either. */ + if (info->nocopyreloc) + { + h->non_got_ref = 0; + return TRUE; + } + + eh = (struct tilegx_elf_link_hash_entry *) h; + for (p = eh->dyn_relocs; p != NULL; p = p->next) + { + s = p->sec->output_section; + if (s != NULL && (s->flags & SEC_READONLY) != 0) + break; + } + + /* If we didn't find any dynamic relocs in read-only sections, then + we'll be keeping the dynamic relocs and avoiding the copy reloc. */ + if (p == NULL) + { + h->non_got_ref = 0; + return TRUE; + } + + if (h->size == 0) + { + (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"), + h->root.root.string); + return TRUE; + } + + /* We must allocate the symbol in our .dynbss section, which will + become part of the .bss section of the executable. There will be + an entry for this symbol in the .dynsym section. The dynamic + object will contain position independent code, so all references + from the dynamic object to this symbol will go through the global + offset table. The dynamic linker will use the .dynsym entry to + determine the address it must put in the global offset table, so + both the dynamic object and the regular object will refer to the + same memory location for the variable. */ + + /* We must generate a R_TILEGX_COPY reloc to tell the dynamic linker + to copy the initial value out of the dynamic object and into the + runtime process image. We need to remember the offset into the + .rel.bss section we are going to use. */ + if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) + { + htab->srelbss->size += TILEGX_ELF_RELA_BYTES (htab); + h->needs_copy = 1; + } + + return _bfd_elf_adjust_dynamic_copy (h, htab->sdynbss); +} + +/* Allocate space in .plt, .got and associated reloc sections for + dynamic relocs. */ + +static bfd_boolean +allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) +{ + struct bfd_link_info *info; + struct tilegx_elf_link_hash_table *htab; + struct tilegx_elf_link_hash_entry *eh; + struct tilegx_elf_dyn_relocs *p; + + if (h->root.type == bfd_link_hash_indirect) + return TRUE; + + info = (struct bfd_link_info *) inf; + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + if (htab->elf.dynamic_sections_created + && h->plt.refcount > 0) + { + /* Make sure this symbol is output as a dynamic symbol. + Undefined weak syms won't yet be marked as dynamic. */ + if (h->dynindx == -1 + && !h->forced_local) + { + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + return FALSE; + } + + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, info->shared, h)) + { + asection *s = htab->elf.splt; + + /* Allocate room for the header and tail. */ + if (s->size == 0) + { + s->size = PLT_HEADER_SIZE + PLT_TAIL_SIZE; + } + + h->plt.offset = s->size - PLT_TAIL_SIZE; + + /* If this symbol is not defined in a regular file, and we are + not generating a shared library, then set the symbol to this + location in the .plt. This is required to make function + pointers compare as equal between the normal executable and + the shared library. */ + if (! info->shared + && !h->def_regular) + { + h->root.u.def.section = s; + h->root.u.def.value = h->plt.offset; + } + + /* Make room for this entry. */ + s->size += PLT_ENTRY_SIZE; + + /* We also need to make an entry in the .got.plt section. */ + htab->elf.sgotplt->size += GOT_ENTRY_SIZE (htab); + + /* We also need to make an entry in the .rela.plt section. */ + htab->elf.srelplt->size += TILEGX_ELF_RELA_BYTES (htab); + } + else + { + h->plt.offset = (bfd_vma) -1; + h->needs_plt = 0; + } + } + else + { + h->plt.offset = (bfd_vma) -1; + h->needs_plt = 0; + } + + if (h->got.refcount > 0) + { + asection *s; + bfd_boolean dyn; + int tls_type = tilegx_elf_hash_entry(h)->tls_type; + + /* Make sure this symbol is output as a dynamic symbol. + Undefined weak syms won't yet be marked as dynamic. */ + if (h->dynindx == -1 + && !h->forced_local) + { + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + return FALSE; + } + + s = htab->elf.sgot; + h->got.offset = s->size; + s->size += TILEGX_ELF_WORD_BYTES (htab); + /* TLS_GD entries need 2 consecutive GOT slots. */ + if (tls_type == GOT_TLS_GD) + s->size += TILEGX_ELF_WORD_BYTES (htab); + dyn = htab->elf.dynamic_sections_created; + /* TLS_IE needs one dynamic relocation, + TLS_GD needs two if local symbol and two if global. */ + if (tls_type == GOT_TLS_GD || tls_type == GOT_TLS_IE) + htab->elf.srelgot->size += 2 * TILEGX_ELF_RELA_BYTES (htab); + else if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)) + htab->elf.srelgot->size += TILEGX_ELF_RELA_BYTES (htab); + } + else + h->got.offset = (bfd_vma) -1; + + eh = (struct tilegx_elf_link_hash_entry *) h; + if (eh->dyn_relocs == NULL) + return TRUE; + + /* In the shared -Bsymbolic case, discard space allocated for + dynamic pc-relative relocs against symbols which turn out to be + defined in regular objects. For the normal shared case, discard + space for pc-relative relocs that have become local due to symbol + visibility changes. */ + + if (info->shared) + { + if (SYMBOL_CALLS_LOCAL (info, h)) + { + struct tilegx_elf_dyn_relocs **pp; + + for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) + { + p->count -= p->pc_count; + p->pc_count = 0; + if (p->count == 0) + *pp = p->next; + else + pp = &p->next; + } + } + + /* Also discard relocs on undefined weak syms with non-default + visibility. */ + if (eh->dyn_relocs != NULL + && h->root.type == bfd_link_hash_undefweak) + { + if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) + eh->dyn_relocs = NULL; + + /* Make sure undefined weak symbols are output as a dynamic + symbol in PIEs. */ + else if (h->dynindx == -1 + && !h->forced_local) + { + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + return FALSE; + } + } + } + else + { + /* For the non-shared case, discard space for relocs against + symbols which turn out to need copy relocs or are not + dynamic. */ + + if (!h->non_got_ref + && ((h->def_dynamic + && !h->def_regular) + || (htab->elf.dynamic_sections_created + && (h->root.type == bfd_link_hash_undefweak + || h->root.type == bfd_link_hash_undefined)))) + { + /* Make sure this symbol is output as a dynamic symbol. + Undefined weak syms won't yet be marked as dynamic. */ + if (h->dynindx == -1 + && !h->forced_local) + { + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + return FALSE; + } + + /* If that succeeded, we know we'll be keeping all the + relocs. */ + if (h->dynindx != -1) + goto keep; + } + + eh->dyn_relocs = NULL; + + keep: ; + } + + /* Finally, allocate space. */ + for (p = eh->dyn_relocs; p != NULL; p = p->next) + { + asection *sreloc = elf_section_data (p->sec)->sreloc; + sreloc->size += p->count * TILEGX_ELF_RELA_BYTES (htab); + } + + return TRUE; +} + +/* Find any dynamic relocs that apply to read-only sections. */ + +static bfd_boolean +readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) +{ + struct tilegx_elf_link_hash_entry *eh; + struct tilegx_elf_dyn_relocs *p; + + eh = (struct tilegx_elf_link_hash_entry *) h; + for (p = eh->dyn_relocs; p != NULL; p = p->next) + { + asection *s = p->sec->output_section; + + if (s != NULL && (s->flags & SEC_READONLY) != 0) + { + struct bfd_link_info *info = (struct bfd_link_info *) inf; + + info->flags |= DF_TEXTREL; + + /* Not an error, just cut short the traversal. */ + return FALSE; + } + } + return TRUE; +} + +/* Return true if the dynamic symbol for a given section should be + omitted when creating a shared library. */ + +bfd_boolean +tilegx_elf_omit_section_dynsym (bfd *output_bfd, + struct bfd_link_info *info, + asection *p) +{ + /* We keep the .got section symbol so that explicit relocations + against the _GLOBAL_OFFSET_TABLE_ symbol emitted in PIC mode + can be turned into relocations against the .got symbol. */ + if (strcmp (p->name, ".got") == 0) + return FALSE; + + return _bfd_elf_link_omit_section_dynsym (output_bfd, info, p); +} + +bfd_boolean +tilegx_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, + struct bfd_link_info *info) +{ + struct tilegx_elf_link_hash_table *htab; + bfd *dynobj; + asection *s; + bfd *ibfd; + + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; + BFD_ASSERT (dynobj != NULL); + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* Set the contents of the .interp section to the interpreter. */ + if (info->executable) + { + s = bfd_get_section_by_name (dynobj, ".interp"); + BFD_ASSERT (s != NULL); + s->size = strlen (htab->dynamic_interpreter) + 1; + s->contents = (unsigned char *) htab->dynamic_interpreter; + } + } + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ + for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) + { + bfd_signed_vma *local_got; + bfd_signed_vma *end_local_got; + char *local_tls_type; + bfd_size_type locsymcount; + Elf_Internal_Shdr *symtab_hdr; + asection *srel; + + if (! is_tilegx_elf (ibfd)) + continue; + + for (s = ibfd->sections; s != NULL; s = s->next) + { + struct tilegx_elf_dyn_relocs *p; + + for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next) + { + if (!bfd_is_abs_section (p->sec) + && bfd_is_abs_section (p->sec->output_section)) + { + /* Input section has been discarded, either because + it is a copy of a linkonce section or due to + linker script /DISCARD/, so we'll be discarding + the relocs too. */ + } + else if (p->count != 0) + { + srel = elf_section_data (p->sec)->sreloc; + srel->size += p->count * TILEGX_ELF_RELA_BYTES (htab); + if ((p->sec->output_section->flags & SEC_READONLY) != 0) + info->flags |= DF_TEXTREL; + } + } + } + + local_got = elf_local_got_refcounts (ibfd); + if (!local_got) + continue; + + symtab_hdr = &elf_symtab_hdr (ibfd); + locsymcount = symtab_hdr->sh_info; + end_local_got = local_got + locsymcount; + local_tls_type = _bfd_tilegx_elf_local_got_tls_type (ibfd); + s = htab->elf.sgot; + srel = htab->elf.srelgot; + for (; local_got < end_local_got; ++local_got, ++local_tls_type) + { + if (*local_got > 0) + { + *local_got = s->size; + s->size += TILEGX_ELF_WORD_BYTES (htab); + if (*local_tls_type == GOT_TLS_GD) + s->size += TILEGX_ELF_WORD_BYTES (htab); + if (info->shared + || *local_tls_type == GOT_TLS_GD + || *local_tls_type == GOT_TLS_IE) + srel->size += TILEGX_ELF_RELA_BYTES (htab); + } + else + *local_got = (bfd_vma) -1; + } + } + + /* Allocate global sym .plt and .got entries, and space for global + sym dynamic relocs. */ + elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, info); + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* If the .got section is more than 0x8000 bytes, we add + 0x8000 to the value of _GLOBAL_OFFSET_TABLE_, so that 16 + bit relocations have a greater chance of working. */ + if (htab->elf.sgot->size >= 0x8000 + && elf_hash_table (info)->hgot->root.u.def.value == 0) + elf_hash_table (info)->hgot->root.u.def.value = 0x8000; + } + + if (htab->elf.sgotplt) + { + struct elf_link_hash_entry *got; + got = elf_link_hash_lookup (elf_hash_table (info), + "_GLOBAL_OFFSET_TABLE_", + FALSE, FALSE, FALSE); + + /* Don't allocate .got.plt section if there are no GOT nor PLT + entries and there is no refeence to _GLOBAL_OFFSET_TABLE_. */ + if ((got == NULL + || !got->ref_regular_nonweak) + && (htab->elf.sgotplt->size + == (unsigned)GOTPLT_HEADER_SIZE (htab)) + && (htab->elf.splt == NULL + || htab->elf.splt->size == 0) + && (htab->elf.sgot == NULL + || (htab->elf.sgot->size + == get_elf_backend_data (output_bfd)->got_header_size))) + htab->elf.sgotplt->size = 0; + } + + /* The check_relocs and adjust_dynamic_symbol entry points have + determined the sizes of the various dynamic sections. Allocate + memory for them. */ + for (s = dynobj->sections; s != NULL; s = s->next) + { + if ((s->flags & SEC_LINKER_CREATED) == 0) + continue; + + if (s == htab->elf.splt + || s == htab->elf.sgot + || s == htab->elf.sgotplt + || s == htab->sdynbss) + { + /* Strip this section if we don't need it; see the + comment below. */ + } + else if (strncmp (s->name, ".rela", 5) == 0) + { + if (s->size != 0) + { + /* We use the reloc_count field as a counter if we need + to copy relocs into the output file. */ + s->reloc_count = 0; + } + } + else + { + /* It's not one of our sections. */ + continue; + } + + if (s->size == 0) + { + /* If we don't need this section, strip it from the + output file. This is mostly to handle .rela.bss and + .rela.plt. We must create both sections in + create_dynamic_sections, because they must be created + before the linker maps input sections to output + sections. The linker does that before + adjust_dynamic_symbol is called, and it is that + function which decides whether anything needs to go + into these sections. */ + s->flags |= SEC_EXCLUDE; + continue; + } + + if ((s->flags & SEC_HAS_CONTENTS) == 0) + continue; + + /* Allocate memory for the section contents. Zero the memory + for the benefit of .rela.plt, which has 4 unused entries + at the beginning, and we don't want garbage. */ + s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size); + if (s->contents == NULL) + return FALSE; + } + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* Add some entries to the .dynamic section. We fill in the + values later, in tilegx_elf_finish_dynamic_sections, but we + must add the entries now so that we get the correct size for + the .dynamic section. The DT_DEBUG entry is filled in by the + dynamic linker and used by the debugger. */ +#define add_dynamic_entry(TAG, VAL) \ + _bfd_elf_add_dynamic_entry (info, TAG, VAL) + + if (info->executable) + { + if (!add_dynamic_entry (DT_DEBUG, 0)) + return FALSE; + } + + if (htab->elf.srelplt->size != 0) + { + if (!add_dynamic_entry (DT_PLTGOT, 0) + || !add_dynamic_entry (DT_PLTRELSZ, 0) + || !add_dynamic_entry (DT_PLTREL, DT_RELA) + || !add_dynamic_entry (DT_JMPREL, 0)) + return FALSE; + } + + if (!add_dynamic_entry (DT_RELA, 0) + || !add_dynamic_entry (DT_RELASZ, 0) + || !add_dynamic_entry (DT_RELAENT, TILEGX_ELF_RELA_BYTES (htab))) + return FALSE; + + /* If any dynamic relocs apply to a read-only section, + then we need a DT_TEXTREL entry. */ + if ((info->flags & DF_TEXTREL) == 0) + elf_link_hash_traverse (&htab->elf, readonly_dynrelocs, info); + + if (info->flags & DF_TEXTREL) + { + if (!add_dynamic_entry (DT_TEXTREL, 0)) + return FALSE; + } + } +#undef add_dynamic_entry + + return TRUE; +} + +/* Return the base VMA address which should be subtracted from real addresses + when resolving @dtpoff relocation. + This is PT_TLS segment p_vaddr. */ + +static bfd_vma +dtpoff_base (struct bfd_link_info *info) +{ + /* If tls_sec is NULL, we should have signalled an error already. */ + if (elf_hash_table (info)->tls_sec == NULL) + return 0; + return elf_hash_table (info)->tls_sec->vma; +} + +/* Return the relocation value for @tpoff relocation. */ + +static bfd_vma +tpoff (struct bfd_link_info *info, bfd_vma address) +{ + struct elf_link_hash_table *htab = elf_hash_table (info); + + /* If tls_sec is NULL, we should have signalled an error already. */ + if (htab->tls_sec == NULL) + return 0; + + return (address - htab->tls_sec->vma); +} + +/* Relocate an TILEGX ELF section. + + The RELOCATE_SECTION function is called by the new ELF backend linker + to handle the relocations for a section. + + The relocs are always passed as Rela structures. + + This function is responsible for adjusting the section contents as + necessary, and (if generating a relocatable output file) adjusting + the reloc addend as necessary. + + This function does not have to worry about setting the reloc + address or the reloc symbol index. + + LOCAL_SYMS is a pointer to the swapped in local symbols. + + LOCAL_SECTIONS is an array giving the section in the input file + corresponding to the st_shndx field of each local symbol. + + The global hash table entry for the global symbols can be found + via elf_sym_hashes (input_bfd). + + When generating relocatable output, this function must handle + STB_LOCAL/STT_SECTION symbols specially. The output symbol is + going to be the section symbol corresponding to the output + section, which means that the addend must be adjusted + accordingly. */ + +bfd_boolean +tilegx_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, + bfd *input_bfd, asection *input_section, + bfd_byte *contents, Elf_Internal_Rela *relocs, + Elf_Internal_Sym *local_syms, + asection **local_sections) +{ + struct tilegx_elf_link_hash_table *htab; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + bfd_vma *local_got_offsets; + bfd_vma got_base; + asection *sreloc; + Elf_Internal_Rela *rel; + Elf_Internal_Rela *relend; + int num_relocs; + + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + symtab_hdr = &elf_symtab_hdr (input_bfd); + sym_hashes = elf_sym_hashes (input_bfd); + local_got_offsets = elf_local_got_offsets (input_bfd); + + if (elf_hash_table (info)->hgot == NULL) + got_base = 0; + else + got_base = elf_hash_table (info)->hgot->root.u.def.value; + + sreloc = elf_section_data (input_section)->sreloc; + + rel = relocs; + num_relocs = input_section->reloc_count; + relend = relocs + num_relocs; + for (; rel < relend; rel++) + { + int r_type, tls_type; + reloc_howto_type *howto; + unsigned long r_symndx; + struct elf_link_hash_entry *h; + Elf_Internal_Sym *sym; + tilegx_create_func create_func; + asection *sec; + bfd_vma relocation; + bfd_reloc_status_type r; + const char *name; + bfd_vma off; + bfd_boolean is_plt = FALSE; + + bfd_boolean unresolved_reloc; + + r_type = TILEGX_ELF_R_TYPE (rel->r_info); + if (r_type == R_TILEGX_GNU_VTINHERIT + || r_type == R_TILEGX_GNU_VTENTRY) + continue; + + if ((unsigned int)r_type >= ARRAY_SIZE (tilegx_elf_howto_table)) + { + /* Not clear if we need to check here, but just be paranoid. */ + (*_bfd_error_handler) + (_("%B: unrecognized relocation (0x%x) in section `%A'"), + input_bfd, r_type, input_section); + bfd_set_error (bfd_error_bad_value); + return FALSE; + } + + howto = tilegx_elf_howto_table + r_type; + + /* This is a final link. */ + r_symndx = TILEGX_ELF_R_SYMNDX (htab, rel->r_info); + h = NULL; + sym = NULL; + sec = NULL; + unresolved_reloc = FALSE; + if (r_symndx < symtab_hdr->sh_info) + { + sym = local_syms + r_symndx; + sec = local_sections[r_symndx]; + relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); + } + else + { + bfd_boolean warned; + + RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, + r_symndx, symtab_hdr, sym_hashes, + h, sec, relocation, + unresolved_reloc, warned); + if (warned) + { + /* To avoid generating warning messages about truncated + relocations, set the relocation's address to be the same as + the start of this section. */ + if (input_section->output_section != NULL) + relocation = input_section->output_section->vma; + else + relocation = 0; + } + } + + if (sec != NULL && elf_discarded_section (sec)) + RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, + rel, relend, howto, contents); + + if (info->relocatable) + continue; + + if (h != NULL) + name = h->root.root.string; + else + { + name = (bfd_elf_string_from_elf_section + (input_bfd, symtab_hdr->sh_link, sym->st_name)); + if (name == NULL || *name == '\0') + name = bfd_section_name (input_bfd, sec); + } + + switch (r_type) + { + case R_TILEGX_IMM16_X0_HW0_GOT: + case R_TILEGX_IMM16_X1_HW0_GOT: + case R_TILEGX_IMM16_X0_HW1_GOT: + case R_TILEGX_IMM16_X1_HW1_GOT: + case R_TILEGX_IMM16_X0_HW2_GOT: + case R_TILEGX_IMM16_X1_HW2_GOT: + case R_TILEGX_IMM16_X0_HW3_GOT: + case R_TILEGX_IMM16_X1_HW3_GOT: + case R_TILEGX_IMM16_X0_HW0_LAST_GOT: + case R_TILEGX_IMM16_X1_HW0_LAST_GOT: + case R_TILEGX_IMM16_X0_HW1_LAST_GOT: + case R_TILEGX_IMM16_X1_HW1_LAST_GOT: + case R_TILEGX_IMM16_X0_HW2_LAST_GOT: + case R_TILEGX_IMM16_X1_HW2_LAST_GOT: + /* Relocation is to the entry for this symbol in the global + offset table. */ + if (htab->elf.sgot == NULL) + abort (); + + if (h != NULL) + { + bfd_boolean dyn; + + off = h->got.offset; + BFD_ASSERT (off != (bfd_vma) -1); + dyn = elf_hash_table (info)->dynamic_sections_created; + + if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) + || (info->shared + && SYMBOL_REFERENCES_LOCAL (info, h))) + { + /* This is actually a static link, or it is a + -Bsymbolic link and the symbol is defined + locally, or the symbol was forced to be local + because of a version file. We must initialize + this entry in the global offset table. Since the + offset must always be a multiple + of 8 for 64-bit, we use the least significant bit + to record whether we have initialized it already. + + When doing a dynamic link, we create a .rela.got + relocation entry to initialize the value. This + is done in the finish_dynamic_symbol routine. */ + if ((off & 1) != 0) + off &= ~1; + else + { + TILEGX_ELF_PUT_WORD (htab, output_bfd, relocation, + htab->elf.sgot->contents + off); + h->got.offset |= 1; + } + } + else + unresolved_reloc = FALSE; + } + else + { + BFD_ASSERT (local_got_offsets != NULL + && local_got_offsets[r_symndx] != (bfd_vma) -1); + + off = local_got_offsets[r_symndx]; + + /* The offset must always be a multiple of 8 on 64-bit. + We use the least significant bit to record + whether we have already processed this entry. */ + if ((off & 1) != 0) + off &= ~1; + else + { + if (info->shared) + { + asection *s; + Elf_Internal_Rela outrel; + + /* We need to generate a R_TILEGX_RELATIVE reloc + for the dynamic linker. */ + s = htab->elf.srelgot; + BFD_ASSERT (s != NULL); + + outrel.r_offset = (htab->elf.sgot->output_section->vma + + htab->elf.sgot->output_offset + + off); + outrel.r_info = + TILEGX_ELF_R_INFO (htab, NULL, 0, R_TILEGX_RELATIVE); + outrel.r_addend = relocation; + relocation = 0; + tilegx_elf_append_rela (output_bfd, s, &outrel); + } + + TILEGX_ELF_PUT_WORD (htab, output_bfd, relocation, + htab->elf.sgot->contents + off); + local_got_offsets[r_symndx] |= 1; + } + } + relocation = htab->elf.sgot->output_offset + off - got_base; + break; + + case R_TILEGX_JUMPOFF_X1_PLT: + /* Relocation is to the entry for this symbol in the + procedure linkage table. */ + BFD_ASSERT (h != NULL); + + if (h->plt.offset == (bfd_vma) -1 || htab->elf.splt == NULL) + { + /* We didn't make a PLT entry for this symbol. This + happens when statically linking PIC code, or when + using -Bsymbolic. */ + break; + } + + relocation = (htab->elf.splt->output_section->vma + + htab->elf.splt->output_offset + + h->plt.offset); + unresolved_reloc = FALSE; + break; + + case R_TILEGX_64_PCREL: + case R_TILEGX_32_PCREL: + case R_TILEGX_16_PCREL: + case R_TILEGX_8_PCREL: + case R_TILEGX_IMM16_X0_HW0_PCREL: + case R_TILEGX_IMM16_X1_HW0_PCREL: + case R_TILEGX_IMM16_X0_HW1_PCREL: + case R_TILEGX_IMM16_X1_HW1_PCREL: + case R_TILEGX_IMM16_X0_HW2_PCREL: + case R_TILEGX_IMM16_X1_HW2_PCREL: + case R_TILEGX_IMM16_X0_HW3_PCREL: + case R_TILEGX_IMM16_X1_HW3_PCREL: + case R_TILEGX_IMM16_X0_HW0_LAST_PCREL: + case R_TILEGX_IMM16_X1_HW0_LAST_PCREL: + case R_TILEGX_IMM16_X0_HW1_LAST_PCREL: + case R_TILEGX_IMM16_X1_HW1_LAST_PCREL: + case R_TILEGX_IMM16_X0_HW2_LAST_PCREL: + case R_TILEGX_IMM16_X1_HW2_LAST_PCREL: + if (h != NULL + && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + break; + /* Fall through. */ + case R_TILEGX_64: + case R_TILEGX_32: + case R_TILEGX_16: + case R_TILEGX_8: + case R_TILEGX_HW0: + case R_TILEGX_HW1: + case R_TILEGX_HW2: + case R_TILEGX_HW3: + case R_TILEGX_HW0_LAST: + case R_TILEGX_HW1_LAST: + case R_TILEGX_HW2_LAST: + case R_TILEGX_COPY: + case R_TILEGX_GLOB_DAT: + case R_TILEGX_JMP_SLOT: + case R_TILEGX_RELATIVE: + case R_TILEGX_BROFF_X1: + case R_TILEGX_JUMPOFF_X1: + case R_TILEGX_IMM8_X0: + case R_TILEGX_IMM8_Y0: + case R_TILEGX_IMM8_X1: + case R_TILEGX_IMM8_Y1: + case R_TILEGX_DEST_IMM8_X1: + case R_TILEGX_MT_IMM14_X1: + case R_TILEGX_MF_IMM14_X1: + case R_TILEGX_MMSTART_X0: + case R_TILEGX_MMEND_X0: + case R_TILEGX_SHAMT_X0: + case R_TILEGX_SHAMT_X1: + case R_TILEGX_SHAMT_Y0: + case R_TILEGX_SHAMT_Y1: + case R_TILEGX_IMM16_X0_HW0: + case R_TILEGX_IMM16_X1_HW0: + case R_TILEGX_IMM16_X0_HW1: + case R_TILEGX_IMM16_X1_HW1: + case R_TILEGX_IMM16_X0_HW2: + case R_TILEGX_IMM16_X1_HW2: + case R_TILEGX_IMM16_X0_HW3: + case R_TILEGX_IMM16_X1_HW3: + case R_TILEGX_IMM16_X0_HW0_LAST: + case R_TILEGX_IMM16_X1_HW0_LAST: + case R_TILEGX_IMM16_X0_HW1_LAST: + case R_TILEGX_IMM16_X1_HW1_LAST: + case R_TILEGX_IMM16_X0_HW2_LAST: + case R_TILEGX_IMM16_X1_HW2_LAST: + if ((input_section->flags & SEC_ALLOC) == 0) + break; + + if ((info->shared + && (h == NULL + || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT + || h->root.type != bfd_link_hash_undefweak) + && (! howto->pc_relative + || !SYMBOL_CALLS_LOCAL (info, h))) + || (!info->shared + && h != NULL + && h->dynindx != -1 + && !h->non_got_ref + && ((h->def_dynamic + && !h->def_regular) + || h->root.type == bfd_link_hash_undefweak + || h->root.type == bfd_link_hash_undefined))) + { + Elf_Internal_Rela outrel; + bfd_boolean skip, relocate = FALSE; + + /* When generating a shared object, these relocations + are copied into the output file to be resolved at run + time. */ + + BFD_ASSERT (sreloc != NULL); + + skip = FALSE; + + outrel.r_offset = + _bfd_elf_section_offset (output_bfd, info, input_section, + rel->r_offset); + if (outrel.r_offset == (bfd_vma) -1) + skip = TRUE; + else if (outrel.r_offset == (bfd_vma) -2) + skip = TRUE, relocate = TRUE; + outrel.r_offset += (input_section->output_section->vma + + input_section->output_offset); + + switch (r_type) + { + case R_TILEGX_64_PCREL: + case R_TILEGX_32_PCREL: + case R_TILEGX_16_PCREL: + case R_TILEGX_8_PCREL: + /* If the symbol is not dynamic, we should not keep + a dynamic relocation. But an .rela.* slot has been + allocated for it, output R_TILEGX_NONE. + FIXME: Add code tracking needed dynamic relocs as + e.g. i386 has. */ + if (h->dynindx == -1) + skip = TRUE, relocate = TRUE; + break; + } + + if (skip) + memset (&outrel, 0, sizeof outrel); + /* h->dynindx may be -1 if the symbol was marked to + become local. */ + else if (h != NULL && + h->dynindx != -1 + && (! is_plt + || !info->shared + || !SYMBOLIC_BIND (info, h) + || !h->def_regular)) + { + BFD_ASSERT (h->dynindx != -1); + outrel.r_info = TILEGX_ELF_R_INFO (htab, rel, h->dynindx, r_type); + outrel.r_addend = rel->r_addend; + } + else + { + if (r_type == R_TILEGX_32 || r_type == R_TILEGX_64) + { + outrel.r_info = TILEGX_ELF_R_INFO (htab, NULL, 0, + R_TILEGX_RELATIVE); + outrel.r_addend = relocation + rel->r_addend; + } + else + { + long indx; + + outrel.r_addend = relocation + rel->r_addend; + + if (is_plt) + sec = htab->elf.splt; + + if (bfd_is_abs_section (sec)) + indx = 0; + else if (sec == NULL || sec->owner == NULL) + { + bfd_set_error (bfd_error_bad_value); + return FALSE; + } + else + { + asection *osec; + + /* We are turning this relocation into one + against a section symbol. It would be + proper to subtract the symbol's value, + osec->vma, from the emitted reloc addend, + but ld.so expects buggy relocs. */ + osec = sec->output_section; + indx = elf_section_data (osec)->dynindx; + + if (indx == 0) + { + osec = htab->elf.text_index_section; + indx = elf_section_data (osec)->dynindx; + } + + /* FIXME: we really should be able to link non-pic + shared libraries. */ + if (indx == 0) + { + BFD_FAIL (); + (*_bfd_error_handler) + (_("%B: probably compiled without -fPIC?"), + input_bfd); + bfd_set_error (bfd_error_bad_value); + return FALSE; + } + } + + outrel.r_info = TILEGX_ELF_R_INFO (htab, rel, indx, + r_type); + } + } + + tilegx_elf_append_rela (output_bfd, sreloc, &outrel); + + /* This reloc will be computed at runtime, so there's no + need to do anything now. */ + if (! relocate) + continue; + } + break; + + case R_TILEGX_IMM16_X0_HW0_TLS_GD: + case R_TILEGX_IMM16_X1_HW0_TLS_GD: + case R_TILEGX_IMM16_X0_HW1_TLS_GD: + case R_TILEGX_IMM16_X1_HW1_TLS_GD: + case R_TILEGX_IMM16_X0_HW2_TLS_GD: + case R_TILEGX_IMM16_X1_HW2_TLS_GD: + case R_TILEGX_IMM16_X0_HW3_TLS_GD: + case R_TILEGX_IMM16_X1_HW3_TLS_GD: + case R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD: + case R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD: + case R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD: + tls_type = GOT_TLS_GD; + goto have_tls_reference; + + case R_TILEGX_IMM16_X0_HW0_TLS_IE: + case R_TILEGX_IMM16_X1_HW0_TLS_IE: + case R_TILEGX_IMM16_X0_HW1_TLS_IE: + case R_TILEGX_IMM16_X1_HW1_TLS_IE: + case R_TILEGX_IMM16_X0_HW2_TLS_IE: + case R_TILEGX_IMM16_X1_HW2_TLS_IE: + case R_TILEGX_IMM16_X0_HW3_TLS_IE: + case R_TILEGX_IMM16_X1_HW3_TLS_IE: + case R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE: + case R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE: + case R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE: + tls_type = GOT_TLS_IE; + /* Fall through. */ + + have_tls_reference: + if (h == NULL && local_got_offsets) + tls_type = _bfd_tilegx_elf_local_got_tls_type (input_bfd) [r_symndx]; + else if (h != NULL) + tls_type = tilegx_elf_hash_entry(h)->tls_type; + + if (tls_type == GOT_TLS_IE) + switch (r_type) + { + case R_TILEGX_IMM16_X0_HW0_TLS_GD: + r_type = R_TILEGX_IMM16_X0_HW0_TLS_IE; + break; + case R_TILEGX_IMM16_X1_HW0_TLS_GD: + r_type = R_TILEGX_IMM16_X1_HW0_TLS_IE; + break; + case R_TILEGX_IMM16_X0_HW1_TLS_GD: + r_type = R_TILEGX_IMM16_X0_HW1_TLS_IE; + break; + case R_TILEGX_IMM16_X1_HW1_TLS_GD: + r_type = R_TILEGX_IMM16_X1_HW1_TLS_IE; + break; + case R_TILEGX_IMM16_X0_HW2_TLS_GD: + r_type = R_TILEGX_IMM16_X0_HW2_TLS_IE; + break; + case R_TILEGX_IMM16_X1_HW2_TLS_GD: + r_type = R_TILEGX_IMM16_X1_HW2_TLS_IE; + break; + case R_TILEGX_IMM16_X0_HW3_TLS_GD: + r_type = R_TILEGX_IMM16_X0_HW3_TLS_IE; + break; + case R_TILEGX_IMM16_X1_HW3_TLS_GD: + r_type = R_TILEGX_IMM16_X1_HW3_TLS_IE; + break; + case R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD: + r_type = R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE; + break; + case R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD: + r_type = R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE; + break; + case R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD: + r_type = R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE; + break; + case R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD: + r_type = R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE; + break; + case R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD: + r_type = R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE; + break; + case R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD: + r_type = R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE; + break; + } + + if (h != NULL) + { + off = h->got.offset; + h->got.offset |= 1; + } + else + { + BFD_ASSERT (local_got_offsets != NULL); + off = local_got_offsets[r_symndx]; + local_got_offsets[r_symndx] |= 1; + } + + if (htab->elf.sgot == NULL) + abort (); + + if ((off & 1) != 0) + off &= ~1; + else + { + Elf_Internal_Rela outrel; + int indx = 0; + bfd_boolean need_relocs = FALSE; + + if (htab->elf.srelgot == NULL) + abort (); + + if (h != NULL) + { + bfd_boolean dyn; + dyn = htab->elf.dynamic_sections_created; + + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) + && (!info->shared + || !SYMBOL_REFERENCES_LOCAL (info, h))) + { + indx = h->dynindx; + } + } + + /* The GOT entries have not been initialized yet. Do it + now, and emit any relocations. */ + if ((info->shared || indx != 0) + && (h == NULL + || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT + || h->root.type != bfd_link_hash_undefweak)) + need_relocs = TRUE; + + switch (r_type) + { + case R_TILEGX_IMM16_X0_HW0_TLS_IE: + case R_TILEGX_IMM16_X1_HW0_TLS_IE: + case R_TILEGX_IMM16_X0_HW1_TLS_IE: + case R_TILEGX_IMM16_X1_HW1_TLS_IE: + case R_TILEGX_IMM16_X0_HW2_TLS_IE: + case R_TILEGX_IMM16_X1_HW2_TLS_IE: + case R_TILEGX_IMM16_X0_HW3_TLS_IE: + case R_TILEGX_IMM16_X1_HW3_TLS_IE: + case R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE: + case R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE: + case R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE: + case R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE: + if (need_relocs) { + TILEGX_ELF_PUT_WORD (htab, output_bfd, 0, + htab->elf.sgot->contents + off); + outrel.r_offset = (htab->elf.sgot->output_section->vma + + htab->elf.sgot->output_offset + off); + outrel.r_addend = 0; + if (indx == 0) + outrel.r_addend = relocation - dtpoff_base (info); + outrel.r_info = TILEGX_ELF_R_INFO (htab, NULL, indx, + TILEGX_ELF_TPOFF_RELOC (htab)); + tilegx_elf_append_rela (output_bfd, htab->elf.srelgot, &outrel); + } else { + TILEGX_ELF_PUT_WORD (htab, output_bfd, + tpoff (info, relocation), + htab->elf.sgot->contents + off); + } + break; + + case R_TILEGX_IMM16_X0_HW0_TLS_GD: + case R_TILEGX_IMM16_X1_HW0_TLS_GD: + case R_TILEGX_IMM16_X0_HW1_TLS_GD: + case R_TILEGX_IMM16_X1_HW1_TLS_GD: + case R_TILEGX_IMM16_X0_HW2_TLS_GD: + case R_TILEGX_IMM16_X1_HW2_TLS_GD: + case R_TILEGX_IMM16_X0_HW3_TLS_GD: + case R_TILEGX_IMM16_X1_HW3_TLS_GD: + case R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD: + case R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD: + case R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD: + case R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD: + if (need_relocs) { + outrel.r_offset = (htab->elf.sgot->output_section->vma + + htab->elf.sgot->output_offset + off); + outrel.r_addend = 0; + outrel.r_info = TILEGX_ELF_R_INFO (htab, NULL, indx, + TILEGX_ELF_DTPMOD_RELOC (htab)); + TILEGX_ELF_PUT_WORD (htab, output_bfd, 0, + htab->elf.sgot->contents + off); + tilegx_elf_append_rela (output_bfd, htab->elf.srelgot, &outrel); + if (indx == 0) + { + BFD_ASSERT (! unresolved_reloc); + TILEGX_ELF_PUT_WORD (htab, output_bfd, + relocation - dtpoff_base (info), + (htab->elf.sgot->contents + off + + TILEGX_ELF_WORD_BYTES (htab))); + } + else + { + TILEGX_ELF_PUT_WORD (htab, output_bfd, 0, + (htab->elf.sgot->contents + off + + TILEGX_ELF_WORD_BYTES (htab))); + outrel.r_info = TILEGX_ELF_R_INFO (htab, NULL, indx, + TILEGX_ELF_DTPOFF_RELOC (htab)); + outrel.r_offset += TILEGX_ELF_WORD_BYTES (htab); + tilegx_elf_append_rela (output_bfd, htab->elf.srelgot, &outrel); + } + } + + else { + /* If we are not emitting relocations for a + general dynamic reference, then we must be in a + static link or an executable link with the + symbol binding locally. Mark it as belonging + to module 1, the executable. */ + TILEGX_ELF_PUT_WORD (htab, output_bfd, 1, + htab->elf.sgot->contents + off ); + TILEGX_ELF_PUT_WORD (htab, output_bfd, + relocation - dtpoff_base (info), + htab->elf.sgot->contents + off + + TILEGX_ELF_WORD_BYTES (htab)); + } + break; + } + } + + if (off >= (bfd_vma) -2) + abort (); + + relocation = htab->elf.sgot->output_offset + off - got_base; + unresolved_reloc = FALSE; + howto = tilegx_elf_howto_table + r_type; + break; + + default: + break; + } + + /* Dynamic relocs are not propagated for SEC_DEBUGGING sections + because such sections are not SEC_ALLOC and thus ld.so will + not process them. */ + if (unresolved_reloc + && !((input_section->flags & SEC_DEBUGGING) != 0 + && h->def_dynamic)) + (*_bfd_error_handler) + (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"), + input_bfd, + input_section, + (long) rel->r_offset, + howto->name, + h->root.root.string); + + r = bfd_reloc_continue; + + /* Get the operand creation function, if any. */ + create_func = reloc_to_create_func[r_type]; + if (create_func == NULL) + { + r = _bfd_final_link_relocate (howto, input_bfd, input_section, + contents, rel->r_offset, + relocation, rel->r_addend); + } + else + { + if (howto->pc_relative) + { + relocation -= + input_section->output_section->vma + input_section->output_offset; + if (howto->pcrel_offset) + relocation -= rel->r_offset; + } + + bfd_byte *data; + + /* Add the relocation addend if any to the final target value */ + relocation += rel->r_addend; + + /* Do basic range checking */ + r = bfd_check_overflow (howto->complain_on_overflow, + howto->bitsize, + howto->rightshift, + TILEGX_ELF_WORD_BYTES (htab) * 8, + relocation); + + /* + * Write the relocated value out into the raw section data. + * Don't put a relocation out in the .rela section. + */ + tilegx_bundle_bits mask = create_func(-1); + tilegx_bundle_bits value = create_func(relocation >> howto->rightshift); + + /* Only touch bytes while the mask is not 0, so we + don't write to out of bounds memory if this is actually + a 16-bit switch instruction. */ + for (data = contents + rel->r_offset; mask != 0; data++) + { + bfd_byte byte_mask = (bfd_byte)mask; + *data = (*data & ~byte_mask) | ((bfd_byte)value & byte_mask); + mask >>= 8; + value >>= 8; + } + } + + if (r != bfd_reloc_ok) + { + const char *msg = NULL; + + switch (r) + { + case bfd_reloc_overflow: + r = info->callbacks->reloc_overflow + (info, (h ? &h->root : NULL), name, howto->name, + (bfd_vma) 0, input_bfd, input_section, rel->r_offset); + break; + + case bfd_reloc_undefined: + r = info->callbacks->undefined_symbol + (info, name, input_bfd, input_section, rel->r_offset, + TRUE); + break; + + case bfd_reloc_outofrange: + msg = _("internal error: out of range error"); + break; + + case bfd_reloc_notsupported: + msg = _("internal error: unsupported relocation error"); + break; + + case bfd_reloc_dangerous: + msg = _("internal error: dangerous relocation"); + break; + + default: + msg = _("internal error: unknown error"); + break; + } + + if (msg) + r = info->callbacks->warning + (info, msg, name, input_bfd, input_section, rel->r_offset); + + if (! r) + return FALSE; + } + } + + return TRUE; +} + +/* Finish up dynamic symbol handling. We set the contents of various + dynamic sections here. */ + +bfd_boolean +tilegx_elf_finish_dynamic_symbol (bfd *output_bfd, + struct bfd_link_info *info, + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) +{ + struct tilegx_elf_link_hash_table *htab; + + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + if (h->plt.offset != (bfd_vma) -1) + { + asection *splt; + asection *srela; + asection *sgotplt; + Elf_Internal_Rela rela; + bfd_byte *loc; + bfd_vma r_offset; + const struct elf_backend_data *bed = get_elf_backend_data (output_bfd); + + + int rela_index; + + /* This symbol has an entry in the PLT. Set it up. */ + + BFD_ASSERT (h->dynindx != -1); + + splt = htab->elf.splt; + srela = htab->elf.srelplt; + sgotplt = htab->elf.sgotplt; + + if (splt == NULL || srela == NULL) + abort (); + + /* Fill in the entry in the procedure linkage table. */ + rela_index = tilegx_plt_entry_build (output_bfd, htab, splt, sgotplt, + h->plt.offset, &r_offset); + + /* Fill in the entry in the global offset table, which initially points + to the beginning of the plt. */ + TILEGX_ELF_PUT_WORD (htab, output_bfd, + splt->output_section->vma + splt->output_offset, + sgotplt->contents + r_offset); + + /* Fill in the entry in the .rela.plt section. */ + rela.r_offset = (sgotplt->output_section->vma + + sgotplt->output_offset + + r_offset); + rela.r_addend = 0; + rela.r_info = TILEGX_ELF_R_INFO (htab, NULL, h->dynindx, R_TILEGX_JMP_SLOT); + + loc = srela->contents + rela_index * TILEGX_ELF_RELA_BYTES (htab); + bed->s->swap_reloca_out (output_bfd, &rela, loc); + + if (!h->def_regular) + { + /* Mark the symbol as undefined, rather than as defined in + the .plt section. Leave the value alone. */ + sym->st_shndx = SHN_UNDEF; + /* If the symbol is weak, we do need to clear the value. + Otherwise, the PLT entry would provide a definition for + the symbol even if the symbol wasn't defined anywhere, + and so the symbol would never be NULL. */ + if (!h->ref_regular_nonweak) + sym->st_value = 0; + } + } + + if (h->got.offset != (bfd_vma) -1 + && tilegx_elf_hash_entry(h)->tls_type != GOT_TLS_GD + && tilegx_elf_hash_entry(h)->tls_type != GOT_TLS_IE) + { + asection *sgot; + asection *srela; + Elf_Internal_Rela rela; + + /* This symbol has an entry in the GOT. Set it up. */ + + sgot = htab->elf.sgot; + srela = htab->elf.srelgot; + BFD_ASSERT (sgot != NULL && srela != NULL); + + rela.r_offset = (sgot->output_section->vma + + sgot->output_offset + + (h->got.offset &~ (bfd_vma) 1)); + + /* If this is a -Bsymbolic link, and the symbol is defined + locally, we just want to emit a RELATIVE reloc. Likewise if + the symbol was forced to be local because of a version file. + The entry in the global offset table will already have been + initialized in the relocate_section function. */ + if (info->shared + && (info->symbolic || h->dynindx == -1) + && h->def_regular) + { + asection *sec = h->root.u.def.section; + rela.r_info = TILEGX_ELF_R_INFO (htab, NULL, 0, R_TILEGX_RELATIVE); + rela.r_addend = (h->root.u.def.value + + sec->output_section->vma + + sec->output_offset); + } + else + { + rela.r_info = TILEGX_ELF_R_INFO (htab, NULL, h->dynindx, R_TILEGX_GLOB_DAT); + rela.r_addend = 0; + } + + TILEGX_ELF_PUT_WORD (htab, output_bfd, 0, + sgot->contents + (h->got.offset & ~(bfd_vma) 1)); + tilegx_elf_append_rela (output_bfd, srela, &rela); + } + + if (h->needs_copy) + { + asection *s; + Elf_Internal_Rela rela; + + /* This symbols needs a copy reloc. Set it up. */ + BFD_ASSERT (h->dynindx != -1); + + s = bfd_get_section_by_name (h->root.u.def.section->owner, + ".rela.bss"); + BFD_ASSERT (s != NULL); + + rela.r_offset = (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + rela.r_info = TILEGX_ELF_R_INFO (htab, NULL, h->dynindx, R_TILEGX_COPY); + rela.r_addend = 0; + tilegx_elf_append_rela (output_bfd, s, &rela); + } + + /* Mark some specially defined symbols as absolute. */ + if (strcmp (h->root.root.string, "_DYNAMIC") == 0 + || (h == htab->elf.hgot || h == htab->elf.hplt)) + sym->st_shndx = SHN_ABS; + + return TRUE; +} + +/* Finish up the dynamic sections. */ + +static bfd_boolean +tilegx_finish_dyn (bfd *output_bfd, struct bfd_link_info *info, + bfd *dynobj, asection *sdyn, + asection *splt ATTRIBUTE_UNUSED) +{ + struct tilegx_elf_link_hash_table *htab; + const struct elf_backend_data *bed; + bfd_byte *dyncon, *dynconend; + size_t dynsize; + + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + bed = get_elf_backend_data (output_bfd); + dynsize = bed->s->sizeof_dyn; + dynconend = sdyn->contents + sdyn->size; + + for (dyncon = sdyn->contents; dyncon < dynconend; dyncon += dynsize) + { + Elf_Internal_Dyn dyn; + asection *s; + + bed->s->swap_dyn_in (dynobj, dyncon, &dyn); + + switch (dyn.d_tag) + { + case DT_PLTGOT: + s = htab->elf.sgotplt; + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + break; + case DT_JMPREL: + s = htab->elf.srelplt; + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + break; + case DT_PLTRELSZ: + s = htab->elf.srelplt; + dyn.d_un.d_val = s->size; + break; + default: + continue; + } + + bed->s->swap_dyn_out (output_bfd, &dyn, dyncon); + } + return TRUE; +} + +bfd_boolean +tilegx_elf_finish_dynamic_sections (bfd *output_bfd, + struct bfd_link_info *info) +{ + bfd *dynobj; + asection *sdyn; + struct tilegx_elf_link_hash_table *htab; + + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; + + sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); + + if (elf_hash_table (info)->dynamic_sections_created) + { + asection *splt; + bfd_boolean ret; + + splt = bfd_get_section_by_name (dynobj, ".plt"); + BFD_ASSERT (splt != NULL && sdyn != NULL); + + ret = tilegx_finish_dyn (output_bfd, info, dynobj, sdyn, splt); + + if (ret != TRUE) + return ret; + + /* Fill in the head and tail entries in the procedure linkage table. */ + if (splt->size > 0) + { + memcpy (splt->contents, + ABI_64_P (output_bfd) ? + tilegx64_plt0_entry : tilegx32_plt0_entry, + PLT_HEADER_SIZE); + + memcpy (splt->contents + splt->size - PLT_TAIL_SIZE, + ABI_64_P (output_bfd) ? + tilegx64_plt_tail_entry : tilegx32_plt_tail_entry, + PLT_TAIL_SIZE); + } + + elf_section_data (splt->output_section)->this_hdr.sh_entsize + = PLT_ENTRY_SIZE; + } + + if (htab->elf.sgotplt) + { + if (bfd_is_abs_section (htab->elf.sgotplt->output_section)) + { + (*_bfd_error_handler) + (_("discarded output section: `%A'"), htab->elf.sgotplt); + return FALSE; + } + + if (htab->elf.sgotplt->size > 0) + { + /* Write the first two entries in .got.plt, needed for the dynamic + linker. */ + TILEGX_ELF_PUT_WORD (htab, output_bfd, (bfd_vma) -1, + htab->elf.sgotplt->contents); + TILEGX_ELF_PUT_WORD (htab, output_bfd, (bfd_vma) 0, + htab->elf.sgotplt->contents + + GOT_ENTRY_SIZE (htab)); + } + + elf_section_data (htab->elf.sgotplt->output_section)->this_hdr.sh_entsize = + GOT_ENTRY_SIZE (htab); + } + + if (htab->elf.sgot) + { + if (htab->elf.sgot->size > 0) + { + /* Set the first entry in the global offset table to the address of + the dynamic section. */ + bfd_vma val = (sdyn ? + sdyn->output_section->vma + sdyn->output_offset : + 0); + TILEGX_ELF_PUT_WORD (htab, output_bfd, val, + htab->elf.sgot->contents); + } + + elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize = + GOT_ENTRY_SIZE (htab); + } + + return TRUE; +} + + + +/* Return address for Ith PLT stub in section PLT, for relocation REL + or (bfd_vma) -1 if it should not be included. */ + +bfd_vma +tilegx_elf_plt_sym_val (bfd_vma i, const asection *plt, + const arelent *rel ATTRIBUTE_UNUSED) +{ + return plt->vma + PLT_HEADER_SIZE + i * PLT_ENTRY_SIZE; +} + +enum elf_reloc_type_class +tilegx_reloc_type_class (const Elf_Internal_Rela *rela) +{ + switch ((int) TILEGX_ELF_R_TYPE (rela->r_info)) + { + case R_TILEGX_RELATIVE: + return reloc_class_relative; + case R_TILEGX_JMP_SLOT: + return reloc_class_plt; + case R_TILEGX_COPY: + return reloc_class_copy; + default: + return reloc_class_normal; + } +} + +int +tilegx_additional_program_headers (bfd *abfd, + struct bfd_link_info *info ATTRIBUTE_UNUSED) +{ + /* Each .intrpt section specified by the user adds another PT_LOAD + header since the sections are discontiguous. */ + static const char intrpt_sections[4][9] = + { + ".intrpt0", ".intrpt1", ".intrpt2", ".intrpt3" + }; + int count = 0; + int i; + + for (i = 0; i < 4; i++) + { + asection *sec = bfd_get_section_by_name (abfd, intrpt_sections[i]); + if (sec != NULL && (sec->flags & SEC_LOAD) != 0) + ++count; + } + + /* Add four "padding" headers in to leave room in case a custom linker + script does something fancy. Otherwise ld complains that it ran + out of program headers and refuses to link. */ + count += 4; + + return count; +} + + +bfd_boolean +_bfd_tilegx_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) +{ + const char *targ1 = bfd_get_target (ibfd); + const char *targ2 = bfd_get_target (obfd); + + if (strcmp (targ1, targ2) != 0) + { + (*_bfd_error_handler) + (_("%B: Cannot link together %s and %s objects."), + ibfd, targ1, targ2); + bfd_set_error (bfd_error_bad_value); + return FALSE; + } + + return TRUE; +} diff --git a/bfd/elfxx-tilegx.h b/bfd/elfxx-tilegx.h new file mode 100644 index 0000000..90ea5c8 --- /dev/null +++ b/bfd/elfxx-tilegx.h @@ -0,0 +1,97 @@ +/* TILE-Gx ELF specific backend routines. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "elf/common.h" +#include "elf/internal.h" + +extern enum elf_reloc_type_class +tilegx_reloc_type_class (const Elf_Internal_Rela *); + +extern reloc_howto_type * +tilegx_reloc_name_lookup (bfd *, const char *); + +extern struct bfd_link_hash_table * +tilegx_elf_link_hash_table_create (bfd *); + +extern reloc_howto_type * +tilegx_reloc_type_lookup (bfd *, bfd_reloc_code_real_type); + +extern void +tilegx_elf_copy_indirect_symbol (struct bfd_link_info *, + struct elf_link_hash_entry *, + struct elf_link_hash_entry *); + +extern bfd_boolean +tilegx_elf_create_dynamic_sections (bfd *, struct bfd_link_info *); + +extern bfd_boolean +tilegx_elf_check_relocs (bfd *, struct bfd_link_info *, + asection *, const Elf_Internal_Rela *); + +extern bfd_boolean +tilegx_elf_adjust_dynamic_symbol (struct bfd_link_info *, + struct elf_link_hash_entry *); + +extern bfd_boolean +tilegx_elf_omit_section_dynsym (bfd *, + struct bfd_link_info *, + asection *); + +extern bfd_boolean +tilegx_elf_size_dynamic_sections (bfd *, struct bfd_link_info *); + +extern bfd_boolean +tilegx_elf_relocate_section (bfd *, struct bfd_link_info *, + bfd *, asection *, + bfd_byte *, Elf_Internal_Rela *, + Elf_Internal_Sym *, + asection **); + +extern asection * +tilegx_elf_gc_mark_hook (asection *, + struct bfd_link_info *, + Elf_Internal_Rela *, + struct elf_link_hash_entry *, + Elf_Internal_Sym *); + +extern bfd_boolean +tilegx_elf_gc_sweep_hook (bfd *, struct bfd_link_info *, + asection *, const Elf_Internal_Rela *); + +extern bfd_vma +tilegx_elf_plt_sym_val (bfd_vma, const asection *, const arelent *); + +extern void +tilegx_info_to_howto_rela (bfd *, arelent *, Elf_Internal_Rela *); + +extern int +tilegx_additional_program_headers (bfd *, struct bfd_link_info *); + +extern bfd_boolean +tilegx_elf_finish_dynamic_symbol (bfd *, + struct bfd_link_info *, + struct elf_link_hash_entry *, + Elf_Internal_Sym *); + +extern bfd_boolean +tilegx_elf_finish_dynamic_sections (bfd *, struct bfd_link_info *); + +extern bfd_boolean +_bfd_tilegx_elf_merge_private_bfd_data (bfd *, bfd *); diff --git a/bfd/format.c b/bfd/format.c index 4d89a85..66b9051 100644 --- a/bfd/format.c +++ b/bfd/format.c @@ -121,8 +121,8 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching) extern const bfd_target binary_vec; const bfd_target * const *target; const bfd_target **matching_vector = NULL; - const bfd_target *save_targ, *right_targ, *ar_right_targ; - int match_count; + const bfd_target *save_targ, *right_targ, *ar_right_targ, *match_targ; + int match_count, best_count, best_match; int ar_match_index; if (matching != NULL) @@ -156,6 +156,9 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching) right_targ = 0; ar_right_targ = 0; + match_targ = 0; + best_match = 256; + best_count = 0; /* Presume the answer is yes. */ abfd->format = format; @@ -194,7 +197,8 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching) /* Don't check the default target twice. */ if (*target == &binary_vec - || (!abfd->target_defaulted && *target == save_targ)) + || (!abfd->target_defaulted && *target == save_targ) + || (*target)->match_priority > best_match) continue; abfd->xvec = *target; /* Change BFD's target temporarily. */ @@ -209,6 +213,8 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching) bfd_set_error (bfd_error_wrong_format); temp = BFD_SEND_FMT (abfd, _bfd_check_format, (abfd)); + if (temp) + match_targ = temp; if (temp && (abfd->format != bfd_archive || bfd_has_map (abfd))) { @@ -219,14 +225,18 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching) targets might match. People who want those other targets have to set the GNUTARGET variable. */ if (temp == bfd_default_vector[0]) - { - match_count = 1; - break; - } + goto ok_ret; if (matching_vector) matching_vector[match_count] = temp; match_count++; + + if (temp->match_priority < best_match) + { + best_match = temp->match_priority; + best_count = 0; + } + best_count++; } else if (temp || (err = bfd_get_error ()) == bfd_error_wrong_object_format @@ -245,6 +255,9 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching) goto err_ret; } + if (best_count == 1) + match_count = 1; + if (match_count == 0) { /* Try partial matches. */ @@ -287,9 +300,18 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching) if (match_count == 1) { - ok_ret: - abfd->xvec = right_targ; /* Change BFD's target permanently. */ + abfd->xvec = right_targ; + /* If we come out of the loop knowing that the last target that + matched is the one we want, then ABFD should still be in a usable + state (except possibly for XVEC). */ + if (match_targ != right_targ) + { + if (bfd_seek (abfd, (file_ptr) 0, SEEK_SET) != 0) + goto err_ret; + match_targ = BFD_SEND_FMT (abfd, _bfd_check_format, (abfd)); + } + ok_ret: /* If the file was opened for update, then `output_has_begun' some time ago when the file was created. Do not recompute sections sizes or alignments in _bfd_set_section_contents. diff --git a/bfd/hash.c b/bfd/hash.c index 7147b71..1de2c2a 100644 --- a/bfd/hash.c +++ b/bfd/hash.c @@ -310,28 +310,37 @@ higher_prime_number (unsigned long n) { /* These are primes that are near, but slightly smaller than, a power of two. */ - static const unsigned long primes[] = { - (unsigned long) 127, - (unsigned long) 2039, - (unsigned long) 32749, - (unsigned long) 65521, - (unsigned long) 131071, - (unsigned long) 262139, - (unsigned long) 524287, - (unsigned long) 1048573, - (unsigned long) 2097143, - (unsigned long) 4194301, - (unsigned long) 8388593, - (unsigned long) 16777213, - (unsigned long) 33554393, - (unsigned long) 67108859, - (unsigned long) 134217689, - (unsigned long) 268435399, - (unsigned long) 536870909, - (unsigned long) 1073741789, - (unsigned long) 2147483647, + static const unsigned long primes[] = + { + (unsigned long) 31, + (unsigned long) 61, + (unsigned long) 127, + (unsigned long) 251, + (unsigned long) 509, + (unsigned long) 1021, + (unsigned long) 2039, + (unsigned long) 4093, + (unsigned long) 8191, + (unsigned long) 16381, + (unsigned long) 32749, + (unsigned long) 65521, + (unsigned long) 131071, + (unsigned long) 262139, + (unsigned long) 524287, + (unsigned long) 1048573, + (unsigned long) 2097143, + (unsigned long) 4194301, + (unsigned long) 8388593, + (unsigned long) 16777213, + (unsigned long) 33554393, + (unsigned long) 67108859, + (unsigned long) 134217689, + (unsigned long) 268435399, + (unsigned long) 536870909, + (unsigned long) 1073741789, + (unsigned long) 2147483647, /* 4294967291L */ - ((unsigned long) 2147483647) + ((unsigned long) 2147483644), + ((unsigned long) 2147483647) + ((unsigned long) 2147483644), }; const unsigned long *low = &primes[0]; @@ -657,7 +666,7 @@ bfd_hash_set_default_size (unsigned long hash_size) /* Extend this prime list if you want more granularity of hash table size. */ static const unsigned long hash_size_primes[] = { - 251, 509, 1021, 2039, 4051, 8599, 16699, 32749, 65537 + 31, 61, 127, 251, 509, 1021, 2039, 4091, 8191, 16381, 32749, 65537 }; unsigned int _index; diff --git a/bfd/hosts/x86-64linux.h b/bfd/hosts/x86-64linux.h index 3bd2f8d..4ffc3f2 100644 --- a/bfd/hosts/x86-64linux.h +++ b/bfd/hosts/x86-64linux.h @@ -37,45 +37,19 @@ #include #else typedef unsigned int uint32_t; +typedef unsigned long long int uint64_t; #endif #undef HAVE_PRPSINFO32_T #define HAVE_PRPSINFO32_T +#undef HAVE_PRPSINFO32_T_PR_PID +#define HAVE_PRPSINFO32_T_PR_PID #undef HAVE_PRSTATUS32_T #define HAVE_PRSTATUS32_T /* These are the 32-bit x86 structures. */ -struct user_fpregs32_struct -{ - int32_t cwd; - int32_t swd; - int32_t twd; - int32_t fip; - int32_t fcs; - int32_t foo; - int32_t fos; - int32_t st_space [20]; -}; - -struct user_fpxregs32_struct -{ - unsigned short int cwd; - unsigned short int swd; - unsigned short int twd; - unsigned short int fop; - int32_t fip; - int32_t fcs; - int32_t foo; - int32_t fos; - int32_t mxcsr; - int32_t reserved; - int32_t st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */ - int32_t xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */ - int32_t padding[56]; -}; - struct user_regs32_struct { int32_t ebx; @@ -97,27 +71,40 @@ struct user_regs32_struct int32_t xss; }; -struct user32 +struct user_regsx32_struct { - struct user_regs32_struct regs; - int u_fpvalid; - struct user_fpregs32_struct i387; - uint32_t u_tsize; - uint32_t u_dsize; - uint32_t u_ssize; - uint32_t start_code; - uint32_t start_stack; - int32_t signal; - int reserved; - struct user_regs32_struct* u_ar0; - struct user_fpregs32_struct* u_fpstate; - uint32_t magic; - char u_comm [32]; - int u_debugreg [8]; + uint64_t r15; + uint64_t r14; + uint64_t r13; + uint64_t r12; + uint64_t rbp; + uint64_t rbx; + uint64_t r11; + uint64_t r10; + uint64_t r9; + uint64_t r8; + uint64_t rax; + uint64_t rcx; + uint64_t rdx; + uint64_t rsi; + uint64_t rdi; + uint64_t orig_rax; + uint64_t rip; + uint64_t cs; + uint64_t eflags; + uint64_t rsp; + uint64_t ss; + uint64_t fs_base; + uint64_t gs_base; + uint64_t ds; + uint64_t es; + uint64_t fs; + uint64_t gs; }; /* Type for a general-purpose register. */ -typedef unsigned int elf_greg32_t; +typedef uint32_t elf_greg32_t; +typedef uint64_t elf_gregx32_t; /* And the whole bunch of them. We could have used `struct user_regs_struct' directly in the typedef, but tradition says that @@ -125,15 +112,8 @@ typedef unsigned int elf_greg32_t; semantics, so leave it that way. */ #define ELF_NGREG32 (sizeof (struct user_regs32_struct) / sizeof(elf_greg32_t)) typedef elf_greg32_t elf_gregset32_t[ELF_NGREG32]; - -/* Register set for the floating-point registers. */ -typedef struct user_fpregs32_struct elf_fpregset32_t; - -/* Register set for the extended floating-point registers. Includes - the Pentium III SSE registers in addition to the classic - floating-point stuff. */ -typedef struct user_fpxregs32_struct elf_fpxregset32_t; - +#define ELF_NGREGX32 (sizeof (struct user_regsx32_struct) / sizeof(elf_gregx32_t)) +typedef elf_gregx32_t elf_gregsetx32_t[ELF_NGREGX32]; /* Definitions to generate Intel SVR4-like core files. These mostly have the same names as the SVR4 types with "elf_" tacked on the @@ -166,6 +146,23 @@ struct elf_prstatus32 int pr_fpvalid; /* True if math copro being used. */ }; +struct elf_prstatusx32 + { + struct elf_siginfo pr_info; /* Info associated with signal. */ + short int pr_cursig; /* Current signal. */ + unsigned int pr_sigpend; /* Set of pending signals. */ + unsigned int pr_sighold; /* Set of held signals. */ + pid_t pr_pid; + pid_t pr_ppid; + pid_t pr_pgrp; + pid_t pr_sid; + struct prstatus32_timeval pr_utime; /* User time. */ + struct prstatus32_timeval pr_stime; /* System time. */ + struct prstatus32_timeval pr_cutime; /* Cumulative user time. */ + struct prstatus32_timeval pr_cstime; /* Cumulative system time. */ + elf_gregsetx32_t pr_reg; /* GP registers. */ + int pr_fpvalid; /* True if math copro being used. */ + }; struct elf_prpsinfo32 { @@ -187,10 +184,7 @@ struct elf_prpsinfo32 Solaris interfaces that should be implemented by users of libthread_db. */ -/* Register sets. Linux has different names. */ -typedef elf_gregset_t prgregset32_t; -typedef elf_fpregset_t prfpregset32_t; - /* Process status and info. In the end we do provide typedefs for them. */ typedef struct elf_prstatus32 prstatus32_t; +typedef struct elf_prstatusx32 prstatusx32_t; typedef struct elf_prpsinfo32 prpsinfo32_t; diff --git a/bfd/hpux-core.c b/bfd/hpux-core.c index 5199014..3e8fd83 100644 --- a/bfd/hpux-core.c +++ b/bfd/hpux-core.c @@ -1,6 +1,6 @@ /* BFD back-end for HP/UX core files. Copyright 1993, 1994, 1996, 1998, 1999, 2001, 2002, 2003, 2004, 2005, 2006, - 2007, 2008 Free Software Foundation, Inc. + 2007, 2008, 2010, 2011 Free Software Foundation, Inc. Written by Stu Grossman, Cygnus Support. Converted to back-end form by Ian Lance Taylor, Cygnus SUpport @@ -387,9 +387,10 @@ const bfd_target hpux_core_vec = HAS_LINENO | HAS_DEBUG | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED), (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */ - 0, /* symbol prefix */ - ' ', /* ar_pad_char */ - 16, /* ar_max_namelen */ + 0, /* symbol prefix */ + ' ', /* ar_pad_char */ + 16, /* ar_max_namelen */ + 0, /* match priority. */ NO_GET64, NO_GETS64, NO_PUT64, /* 64 bit data */ NO_GET, NO_GETS, NO_PUT, /* 32 bit data */ NO_GET, NO_GETS, NO_PUT, /* 16 bit data */ diff --git a/bfd/i386linux.c b/bfd/i386linux.c index a5bb77d..03a2dbe 100644 --- a/bfd/i386linux.c +++ b/bfd/i386linux.c @@ -1,6 +1,6 @@ /* BFD back-end for linux flavored i386 a.out binaries. Copyright 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2001, 2002, 2003, - 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. + 2004, 2005, 2006, 2007, 2008, 2009, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -435,9 +435,6 @@ linux_tally_symbols (h, data) struct linux_link_hash_entry *h1, *h2; bfd_boolean exists; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct linux_link_hash_entry *) h->root.root.u.i.link; - if (h->root.root.type == bfd_link_hash_undefined && CONST_STRNEQ (h->root.root.root.string, NEEDS_SHRLIB)) { diff --git a/bfd/i386msdos.c b/bfd/i386msdos.c index 95d9775..b67b13e 100644 --- a/bfd/i386msdos.c +++ b/bfd/i386msdos.c @@ -1,6 +1,6 @@ /* BFD back-end for MS-DOS executables. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2001, 2002, - 2003, 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc. + 2003, 2004, 2005, 2006, 2007, 2009, 2011 Free Software Foundation, Inc. Written by Bryan Ford of the University of Utah. Contributed by the Center for Software Science at the @@ -143,6 +143,7 @@ msdos_set_section_contents (bfd *abfd, bfd_generic_get_relocated_section_contents #define msdos_bfd_relax_section bfd_generic_relax_section #define msdos_bfd_gc_sections bfd_generic_gc_sections +#define msdos_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define msdos_bfd_merge_sections bfd_generic_merge_sections #define msdos_bfd_is_group_section bfd_generic_is_group_section #define msdos_bfd_discard_group bfd_generic_discard_group @@ -188,6 +189,7 @@ const bfd_target i386msdos_vec = 0, /* leading underscore */ ' ', /* ar_pad_char */ 16, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ diff --git a/bfd/i386os9k.c b/bfd/i386os9k.c index a5e8920..3beb8a3 100644 --- a/bfd/i386os9k.c +++ b/bfd/i386os9k.c @@ -1,6 +1,6 @@ /* BFD back-end for os9000 i386 binaries. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1998, 1999, 2001, 2002, - 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc. + 2004, 2005, 2006, 2007, 2009, 2011 Free Software Foundation, Inc. Written by Cygnus Support. This file is part of BFD, the Binary File Descriptor library. @@ -167,6 +167,7 @@ os9k_sizeof_headers (bfd *abfd ATTRIBUTE_UNUSED, bfd_generic_get_relocated_section_contents #define os9k_bfd_relax_section bfd_generic_relax_section #define os9k_bfd_gc_sections bfd_generic_gc_sections +#define os9k_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define os9k_bfd_merge_sections bfd_generic_merge_sections #define os9k_bfd_is_group_section bfd_generic_is_group_section #define os9k_bfd_discard_group bfd_generic_discard_group @@ -193,6 +194,7 @@ const bfd_target i386os9k_vec = 0, /* symbol leading char */ ' ', /* ar_pad_char */ 16, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, diff --git a/bfd/ieee.c b/bfd/ieee.c index bb986c4..de1e926 100644 --- a/bfd/ieee.c +++ b/bfd/ieee.c @@ -1,6 +1,6 @@ /* BFD back-end for ieee-695 objects. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Steve Chamberlain of Cygnus Support. @@ -3772,6 +3772,7 @@ ieee_sizeof_headers (bfd *abfd ATTRIBUTE_UNUSED, bfd_generic_get_relocated_section_contents #define ieee_bfd_relax_section bfd_generic_relax_section #define ieee_bfd_gc_sections bfd_generic_gc_sections +#define ieee_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define ieee_bfd_merge_sections bfd_generic_merge_sections #define ieee_bfd_is_group_section bfd_generic_is_group_section #define ieee_bfd_discard_group bfd_generic_discard_group @@ -3801,6 +3802,7 @@ const bfd_target ieee_vec = '_', /* Leading underscore. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/bfd/ihex.c b/bfd/ihex.c index 6a9816c..09f756a 100644 --- a/bfd/ihex.c +++ b/bfd/ihex.c @@ -1,6 +1,6 @@ /* BFD back-end for Intel Hex objects. Copyright 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, - 2006, 2007, 2009 Free Software Foundation, Inc. + 2006, 2007, 2009, 2011 Free Software Foundation, Inc. Written by Ian Lance Taylor of Cygnus Support . This file is part of BFD, the Binary File Descriptor library. @@ -930,6 +930,7 @@ ihex_sizeof_headers (bfd *abfd ATTRIBUTE_UNUSED, #define ihex_bfd_get_relocated_section_contents bfd_generic_get_relocated_section_contents #define ihex_bfd_relax_section bfd_generic_relax_section #define ihex_bfd_gc_sections bfd_generic_gc_sections +#define ihex_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define ihex_bfd_merge_sections bfd_generic_merge_sections #define ihex_bfd_is_group_section bfd_generic_is_group_section #define ihex_bfd_discard_group bfd_generic_discard_group @@ -957,6 +958,7 @@ const bfd_target ihex_vec = 0, /* Leading underscore. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/bfd/irix-core.c b/bfd/irix-core.c index eb930a4..7fd5109 100644 --- a/bfd/irix-core.c +++ b/bfd/irix-core.c @@ -1,6 +1,6 @@ /* BFD back-end for Irix core files. - Copyright 1993, 1994, 1996, 1999, 2001, 2002, 2004, 2005, 2006, 2007 - Free Software Foundation, Inc. + Copyright 1993, 1994, 1996, 1999, 2001, 2002, 2004, 2005, 2006, 2007, + 2010, 2011 Free Software Foundation, Inc. Written by Stu Grossman, Cygnus Support. Converted to back-end form by Ian Lance Taylor, Cygnus Support @@ -293,6 +293,7 @@ const bfd_target irix_core_vec = 0, /* symbol prefix */ ' ', /* ar_pad_char */ 16, /* ar_max_namelen */ + 0, /* match_priority */ NO_GET64, NO_GETS64, NO_PUT64, /* 64 bit data */ NO_GET, NO_GETS, NO_PUT, /* 32 bit data */ NO_GET, NO_GETS, NO_PUT, /* 16 bit data */ diff --git a/bfd/libbfd-in.h b/bfd/libbfd-in.h index b7201bd..b6c90d1 100644 --- a/bfd/libbfd-in.h +++ b/bfd/libbfd-in.h @@ -3,7 +3,7 @@ Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, - 2010 + 2010, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -453,6 +453,9 @@ extern bfd_boolean _bfd_generic_set_section_contents #define _bfd_nolink_bfd_gc_sections \ ((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \ bfd_false) +#define _bfd_nolink_bfd_lookup_section_flags \ + ((void (*) (struct bfd_link_info *, struct flag_info *)) \ + bfd_0) #define _bfd_nolink_bfd_merge_sections \ ((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \ bfd_false) @@ -478,7 +481,8 @@ extern bfd_boolean _bfd_generic_set_section_contents #define _bfd_nolink_bfd_link_split_section \ ((bfd_boolean (*) (bfd *, struct bfd_section *)) bfd_false) #define _bfd_nolink_section_already_linked \ - ((void (*) (bfd *, struct bfd_section *, struct bfd_link_info *)) bfd_void) + ((bfd_boolean (*) (bfd *, asection *, \ + struct bfd_link_info *)) bfd_false) #define _bfd_nolink_bfd_define_common_symbol \ ((bfd_boolean (*) (bfd *, struct bfd_link_info *, \ struct bfd_link_hash_entry *)) bfd_false) @@ -598,8 +602,8 @@ extern bfd_boolean _bfd_generic_final_link extern bfd_boolean _bfd_generic_link_split_section (bfd *, struct bfd_section *); -extern void _bfd_generic_section_already_linked - (bfd *, struct bfd_section *, struct bfd_link_info *); +extern bfd_boolean _bfd_generic_section_already_linked + (bfd *, asection *, struct bfd_link_info *); /* Generic reloc_link_order processing routine. */ extern bfd_boolean _bfd_generic_reloc_link_order @@ -817,4 +821,4 @@ struct dwarf_debug_section /* Map of uncompressed DWARF debug section name to compressed one. It is terminated by NULL uncompressed_name. */ -extern struct dwarf_debug_section dwarf_debug_sections[]; +extern const struct dwarf_debug_section dwarf_debug_sections[]; diff --git a/bfd/libbfd.c b/bfd/libbfd.c index cec13d9..44651cf 100644 --- a/bfd/libbfd.c +++ b/bfd/libbfd.c @@ -431,9 +431,9 @@ DESCRIPTION .#define bfd_put_signed_8 \ . bfd_put_8 .#define bfd_get_8(abfd, ptr) \ -. (*(unsigned char *) (ptr) & 0xff) +. (*(const unsigned char *) (ptr) & 0xff) .#define bfd_get_signed_8(abfd, ptr) \ -. (((*(unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80) +. (((*(const unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80) . .#define bfd_put_16(abfd, val, ptr) \ . BFD_SEND (abfd, bfd_putx16, ((val),(ptr))) diff --git a/bfd/libbfd.h b/bfd/libbfd.h index 2e7df4f..200a6fa 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -8,7 +8,7 @@ Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, - 2010 + 2010, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -458,6 +458,9 @@ extern bfd_boolean _bfd_generic_set_section_contents #define _bfd_nolink_bfd_gc_sections \ ((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \ bfd_false) +#define _bfd_nolink_bfd_lookup_section_flags \ + ((void (*) (struct bfd_link_info *, struct flag_info *)) \ + bfd_0) #define _bfd_nolink_bfd_merge_sections \ ((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \ bfd_false) @@ -483,7 +486,8 @@ extern bfd_boolean _bfd_generic_set_section_contents #define _bfd_nolink_bfd_link_split_section \ ((bfd_boolean (*) (bfd *, struct bfd_section *)) bfd_false) #define _bfd_nolink_section_already_linked \ - ((void (*) (bfd *, struct bfd_section *, struct bfd_link_info *)) bfd_void) + ((bfd_boolean (*) (bfd *, asection *, \ + struct bfd_link_info *)) bfd_false) #define _bfd_nolink_bfd_define_common_symbol \ ((bfd_boolean (*) (bfd *, struct bfd_link_info *, \ struct bfd_link_hash_entry *)) bfd_false) @@ -603,8 +607,8 @@ extern bfd_boolean _bfd_generic_final_link extern bfd_boolean _bfd_generic_link_split_section (bfd *, struct bfd_section *); -extern void _bfd_generic_section_already_linked - (bfd *, struct bfd_section *, struct bfd_link_info *); +extern bfd_boolean _bfd_generic_section_already_linked + (bfd *, asection *, struct bfd_link_info *); /* Generic reloc_link_order processing routine. */ extern bfd_boolean _bfd_generic_reloc_link_order @@ -822,7 +826,7 @@ struct dwarf_debug_section /* Map of uncompressed DWARF debug section name to compressed one. It is terminated by NULL uncompressed_name. */ -extern struct dwarf_debug_section dwarf_debug_sections[]; +extern const struct dwarf_debug_section dwarf_debug_sections[]; /* Extracted from init.c. */ /* Extracted from libbfd.c. */ bfd_boolean bfd_write_bigendian_4byte_int (bfd *, unsigned int); @@ -850,9 +854,15 @@ struct bfd_iovec int (*bclose) (struct bfd *abfd); int (*bflush) (struct bfd *abfd); int (*bstat) (struct bfd *abfd, struct stat *sb); - /* Just like mmap: (void*)-1 on failure, mmapped address on success. */ + /* Mmap a part of the files. ADDR, LEN, PROT, FLAGS and OFFSET are the usual + mmap parameter, except that LEN and OFFSET do not need to be page + aligned. Returns (void *)-1 on failure, mmapped address on success. + Also write in MAP_ADDR the address of the page aligned buffer and in + MAP_LEN the size mapped (a page multiple). Use unmap with MAP_ADDR and + MAP_LEN to unmap. */ void *(*bmmap) (struct bfd *abfd, void *addr, bfd_size_type len, - int prot, int flags, file_ptr offset); + int prot, int flags, file_ptr offset, + void **map_addr, bfd_size_type *map_len); }; extern const struct bfd_iovec _bfd_memory_iovec; /* Extracted from bfdwin.c. */ @@ -1062,6 +1072,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_ALPHA_TPREL_LO16", "BFD_RELOC_ALPHA_TPREL16", "BFD_RELOC_MIPS_JMP", + "BFD_RELOC_MICROMIPS_JMP", "BFD_RELOC_MIPS16_JMP", "BFD_RELOC_MIPS16_GPREL", "BFD_RELOC_HI16", @@ -1076,40 +1087,69 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_MIPS16_HI16_S", "BFD_RELOC_MIPS16_LO16", "BFD_RELOC_MIPS_LITERAL", + "BFD_RELOC_MICROMIPS_LITERAL", + "BFD_RELOC_MICROMIPS_7_PCREL_S1", + "BFD_RELOC_MICROMIPS_10_PCREL_S1", + "BFD_RELOC_MICROMIPS_16_PCREL_S1", + "BFD_RELOC_MICROMIPS_GPREL16", + "BFD_RELOC_MICROMIPS_HI16", + "BFD_RELOC_MICROMIPS_HI16_S", + "BFD_RELOC_MICROMIPS_LO16", "BFD_RELOC_MIPS_GOT16", + "BFD_RELOC_MICROMIPS_GOT16", "BFD_RELOC_MIPS_CALL16", + "BFD_RELOC_MICROMIPS_CALL16", "BFD_RELOC_MIPS_GOT_HI16", + "BFD_RELOC_MICROMIPS_GOT_HI16", "BFD_RELOC_MIPS_GOT_LO16", + "BFD_RELOC_MICROMIPS_GOT_LO16", "BFD_RELOC_MIPS_CALL_HI16", + "BFD_RELOC_MICROMIPS_CALL_HI16", "BFD_RELOC_MIPS_CALL_LO16", + "BFD_RELOC_MICROMIPS_CALL_LO16", "BFD_RELOC_MIPS_SUB", + "BFD_RELOC_MICROMIPS_SUB", "BFD_RELOC_MIPS_GOT_PAGE", + "BFD_RELOC_MICROMIPS_GOT_PAGE", "BFD_RELOC_MIPS_GOT_OFST", + "BFD_RELOC_MICROMIPS_GOT_OFST", "BFD_RELOC_MIPS_GOT_DISP", + "BFD_RELOC_MICROMIPS_GOT_DISP", "BFD_RELOC_MIPS_SHIFT5", "BFD_RELOC_MIPS_SHIFT6", "BFD_RELOC_MIPS_INSERT_A", "BFD_RELOC_MIPS_INSERT_B", "BFD_RELOC_MIPS_DELETE", "BFD_RELOC_MIPS_HIGHEST", + "BFD_RELOC_MICROMIPS_HIGHEST", "BFD_RELOC_MIPS_HIGHER", + "BFD_RELOC_MICROMIPS_HIGHER", "BFD_RELOC_MIPS_SCN_DISP", + "BFD_RELOC_MICROMIPS_SCN_DISP", "BFD_RELOC_MIPS_REL16", "BFD_RELOC_MIPS_RELGOT", "BFD_RELOC_MIPS_JALR", + "BFD_RELOC_MICROMIPS_JALR", "BFD_RELOC_MIPS_TLS_DTPMOD32", "BFD_RELOC_MIPS_TLS_DTPREL32", "BFD_RELOC_MIPS_TLS_DTPMOD64", "BFD_RELOC_MIPS_TLS_DTPREL64", "BFD_RELOC_MIPS_TLS_GD", + "BFD_RELOC_MICROMIPS_TLS_GD", "BFD_RELOC_MIPS_TLS_LDM", + "BFD_RELOC_MICROMIPS_TLS_LDM", "BFD_RELOC_MIPS_TLS_DTPREL_HI16", + "BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16", "BFD_RELOC_MIPS_TLS_DTPREL_LO16", + "BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16", "BFD_RELOC_MIPS_TLS_GOTTPREL", + "BFD_RELOC_MICROMIPS_TLS_GOTTPREL", "BFD_RELOC_MIPS_TLS_TPREL32", "BFD_RELOC_MIPS_TLS_TPREL64", "BFD_RELOC_MIPS_TLS_TPREL_HI16", + "BFD_RELOC_MICROMIPS_TLS_TPREL_HI16", "BFD_RELOC_MIPS_TLS_TPREL_LO16", + "BFD_RELOC_MICROMIPS_TLS_TPREL_LO16", "BFD_RELOC_MIPS_COPY", "BFD_RELOC_MIPS_JUMP_SLOT", @@ -2268,6 +2308,174 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_MICROBLAZE_64_GOTOFF", "BFD_RELOC_MICROBLAZE_32_GOTOFF", "BFD_RELOC_MICROBLAZE_COPY", + "BFD_RELOC_TILEPRO_COPY", + "BFD_RELOC_TILEPRO_GLOB_DAT", + "BFD_RELOC_TILEPRO_JMP_SLOT", + "BFD_RELOC_TILEPRO_RELATIVE", + "BFD_RELOC_TILEPRO_BROFF_X1", + "BFD_RELOC_TILEPRO_JOFFLONG_X1", + "BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT", + "BFD_RELOC_TILEPRO_IMM8_X0", + "BFD_RELOC_TILEPRO_IMM8_Y0", + "BFD_RELOC_TILEPRO_IMM8_X1", + "BFD_RELOC_TILEPRO_IMM8_Y1", + "BFD_RELOC_TILEPRO_DEST_IMM8_X1", + "BFD_RELOC_TILEPRO_MT_IMM15_X1", + "BFD_RELOC_TILEPRO_MF_IMM15_X1", + "BFD_RELOC_TILEPRO_IMM16_X0", + "BFD_RELOC_TILEPRO_IMM16_X1", + "BFD_RELOC_TILEPRO_IMM16_X0_LO", + "BFD_RELOC_TILEPRO_IMM16_X1_LO", + "BFD_RELOC_TILEPRO_IMM16_X0_HI", + "BFD_RELOC_TILEPRO_IMM16_X1_HI", + "BFD_RELOC_TILEPRO_IMM16_X0_HA", + "BFD_RELOC_TILEPRO_IMM16_X1_HA", + "BFD_RELOC_TILEPRO_IMM16_X0_PCREL", + "BFD_RELOC_TILEPRO_IMM16_X1_PCREL", + "BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL", + "BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL", + "BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL", + "BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL", + "BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL", + "BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL", + "BFD_RELOC_TILEPRO_IMM16_X0_GOT", + "BFD_RELOC_TILEPRO_IMM16_X1_GOT", + "BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO", + "BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO", + "BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI", + "BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI", + "BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA", + "BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA", + "BFD_RELOC_TILEPRO_MMSTART_X0", + "BFD_RELOC_TILEPRO_MMEND_X0", + "BFD_RELOC_TILEPRO_MMSTART_X1", + "BFD_RELOC_TILEPRO_MMEND_X1", + "BFD_RELOC_TILEPRO_SHAMT_X0", + "BFD_RELOC_TILEPRO_SHAMT_X1", + "BFD_RELOC_TILEPRO_SHAMT_Y0", + "BFD_RELOC_TILEPRO_SHAMT_Y1", + "BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD", + "BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD", + "BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO", + "BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO", + "BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI", + "BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI", + "BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA", + "BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA", + "BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE", + "BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE", + "BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO", + "BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO", + "BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI", + "BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI", + "BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA", + "BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA", + "BFD_RELOC_TILEPRO_TLS_DTPMOD32", + "BFD_RELOC_TILEPRO_TLS_DTPOFF32", + "BFD_RELOC_TILEPRO_TLS_TPOFF32", + "BFD_RELOC_TILEGX_HW0", + "BFD_RELOC_TILEGX_HW1", + "BFD_RELOC_TILEGX_HW2", + "BFD_RELOC_TILEGX_HW3", + "BFD_RELOC_TILEGX_HW0_LAST", + "BFD_RELOC_TILEGX_HW1_LAST", + "BFD_RELOC_TILEGX_HW2_LAST", + "BFD_RELOC_TILEGX_COPY", + "BFD_RELOC_TILEGX_GLOB_DAT", + "BFD_RELOC_TILEGX_JMP_SLOT", + "BFD_RELOC_TILEGX_RELATIVE", + "BFD_RELOC_TILEGX_BROFF_X1", + "BFD_RELOC_TILEGX_JUMPOFF_X1", + "BFD_RELOC_TILEGX_JUMPOFF_X1_PLT", + "BFD_RELOC_TILEGX_IMM8_X0", + "BFD_RELOC_TILEGX_IMM8_Y0", + "BFD_RELOC_TILEGX_IMM8_X1", + "BFD_RELOC_TILEGX_IMM8_Y1", + "BFD_RELOC_TILEGX_DEST_IMM8_X1", + "BFD_RELOC_TILEGX_MT_IMM14_X1", + "BFD_RELOC_TILEGX_MF_IMM14_X1", + "BFD_RELOC_TILEGX_MMSTART_X0", + "BFD_RELOC_TILEGX_MMEND_X0", + "BFD_RELOC_TILEGX_SHAMT_X0", + "BFD_RELOC_TILEGX_SHAMT_X1", + "BFD_RELOC_TILEGX_SHAMT_Y0", + "BFD_RELOC_TILEGX_SHAMT_Y1", + "BFD_RELOC_TILEGX_IMM16_X0_HW0", + "BFD_RELOC_TILEGX_IMM16_X1_HW0", + "BFD_RELOC_TILEGX_IMM16_X0_HW1", + "BFD_RELOC_TILEGX_IMM16_X1_HW1", + "BFD_RELOC_TILEGX_IMM16_X0_HW2", + "BFD_RELOC_TILEGX_IMM16_X1_HW2", + "BFD_RELOC_TILEGX_IMM16_X0_HW3", + "BFD_RELOC_TILEGX_IMM16_X1_HW3", + "BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST", + "BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST", + "BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST", + "BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST", + "BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST", + "BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST", + "BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL", + "BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL", + "BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL", + "BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL", + "BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL", + "BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL", + "BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL", + "BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL", + "BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL", + "BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL", + "BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL", + "BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL", + "BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL", + "BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL", + "BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT", + "BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT", + "BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT", + "BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT", + "BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT", + "BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT", + "BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT", + "BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT", + "BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT", + "BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT", + "BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT", + "BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT", + "BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT", + "BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT", + "BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD", + "BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE", + "BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE", + "BFD_RELOC_TILEGX_TLS_DTPMOD64", + "BFD_RELOC_TILEGX_TLS_DTPOFF64", + "BFD_RELOC_TILEGX_TLS_TPOFF64", + "BFD_RELOC_TILEGX_TLS_DTPMOD32", + "BFD_RELOC_TILEGX_TLS_DTPOFF32", + "BFD_RELOC_TILEGX_TLS_TPOFF32", "@@overflow: BFD_RELOC_UNUSED@@", }; #endif @@ -2284,6 +2492,9 @@ bfd_boolean bfd_generic_relax_section bfd_boolean bfd_generic_gc_sections (bfd *, struct bfd_link_info *); +void bfd_generic_lookup_section_flags + (struct bfd_link_info *, struct flag_info *); + bfd_boolean bfd_generic_merge_sections (bfd *, struct bfd_link_info *); diff --git a/bfd/libcoff-in.h b/bfd/libcoff-in.h index 9d24748..00d9ab2 100644 --- a/bfd/libcoff-in.h +++ b/bfd/libcoff-in.h @@ -1,6 +1,6 @@ /* BFD COFF object file private structure. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -546,6 +546,8 @@ extern struct bfd_link_hash_table *_bfd_coff_link_hash_table_create (bfd *); extern const char *_bfd_coff_internal_syment_name (bfd *, const struct internal_syment *, char *); +extern bfd_boolean _bfd_coff_section_already_linked + (bfd *, asection *, struct bfd_link_info *); extern bfd_boolean _bfd_coff_link_add_symbols (bfd *, struct bfd_link_info *); extern bfd_boolean _bfd_coff_final_link @@ -559,7 +561,7 @@ extern bfd_boolean _bfd_coff_generic_relocate_section extern struct bfd_hash_entry *_bfd_coff_debug_merge_hash_newfunc (struct bfd_hash_entry *, struct bfd_hash_table *, const char *); extern bfd_boolean _bfd_coff_write_global_sym - (struct coff_link_hash_entry *, void *); + (struct bfd_hash_entry *, void *); extern bfd_boolean _bfd_coff_write_task_globals (struct coff_link_hash_entry *, void *); extern bfd_boolean _bfd_coff_link_input_bfd diff --git a/bfd/libcoff.h b/bfd/libcoff.h index 4f73f10..bd58c82 100644 --- a/bfd/libcoff.h +++ b/bfd/libcoff.h @@ -4,7 +4,7 @@ /* BFD COFF object file private structure. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -550,6 +550,8 @@ extern struct bfd_link_hash_table *_bfd_coff_link_hash_table_create (bfd *); extern const char *_bfd_coff_internal_syment_name (bfd *, const struct internal_syment *, char *); +extern bfd_boolean _bfd_coff_section_already_linked + (bfd *, asection *, struct bfd_link_info *); extern bfd_boolean _bfd_coff_link_add_symbols (bfd *, struct bfd_link_info *); extern bfd_boolean _bfd_coff_final_link @@ -563,7 +565,7 @@ extern bfd_boolean _bfd_coff_generic_relocate_section extern struct bfd_hash_entry *_bfd_coff_debug_merge_hash_newfunc (struct bfd_hash_entry *, struct bfd_hash_table *, const char *); extern bfd_boolean _bfd_coff_write_global_sym - (struct coff_link_hash_entry *, void *); + (struct bfd_hash_entry *, void *); extern bfd_boolean _bfd_coff_write_task_globals (struct coff_link_hash_entry *, void *); extern bfd_boolean _bfd_coff_link_input_bfd diff --git a/bfd/libxcoff.h b/bfd/libxcoff.h index 3900dd3..53a5e72 100644 --- a/bfd/libxcoff.h +++ b/bfd/libxcoff.h @@ -235,4 +235,26 @@ bfd_boolean xcoff_reloc_type_toc (XCOFF_RELOC_FUNCTION_ARGS); bfd_boolean xcoff_reloc_type_ba (XCOFF_RELOC_FUNCTION_ARGS); bfd_boolean xcoff_reloc_type_crel (XCOFF_RELOC_FUNCTION_ARGS); +/* Structure to describe dwarf sections. + Useful to convert from XCOFF section name to flag and vice-versa. + Also mark if section has a length field at the beginning. */ +struct xcoff_dwsect_name { + /* A XCOFF dwarf section is identified by its name. */ + unsigned int flag; + + /* Corresponding XCOFF section name. */ + const char *name; + + /* True if size must be prepended. */ + bfd_boolean def_size; +}; + +/* Number of entries in the array. The number is known and public so that user + can 'extend' this array by index. */ +#define XCOFF_DWSECT_NBR_NAMES 8 + +/* The dwarf sections array. */ +extern const struct xcoff_dwsect_name + xcoff_dwsect_names[XCOFF_DWSECT_NBR_NAMES]; + #endif /* LIBXCOFF_H */ diff --git a/bfd/linker.c b/bfd/linker.c index 9f2bac3..7a01e11 100644 --- a/bfd/linker.c +++ b/bfd/linker.c @@ -465,10 +465,8 @@ _bfd_link_hash_newfunc (struct bfd_hash_entry *entry, struct bfd_link_hash_entry *h = (struct bfd_link_hash_entry *) entry; /* Initialize the local fields. */ - h->type = bfd_link_hash_new; - memset (&h->u.undef.next, 0, - (sizeof (struct bfd_link_hash_entry) - - offsetof (struct bfd_link_hash_entry, u.undef.next))); + memset ((char *) &h->root + sizeof (h->root), 0, + sizeof (*h) - sizeof (h->root)); } return entry; @@ -606,21 +604,32 @@ bfd_wrapped_link_hash_lookup (bfd *abfd, return bfd_link_hash_lookup (info->hash, string, create, copy, follow); } -/* Traverse a generic link hash table. The only reason this is not a - macro is to do better type checking. This code presumes that an - argument passed as a struct bfd_hash_entry * may be caught as a - struct bfd_link_hash_entry * with no explicit cast required on the - call. */ +/* Traverse a generic link hash table. Differs from bfd_hash_traverse + in the treatment of warning symbols. When warning symbols are + created they replace the real symbol, so you don't get to see the + real symbol in a bfd_hash_travere. This traversal calls func with + the real symbol. */ void bfd_link_hash_traverse - (struct bfd_link_hash_table *table, + (struct bfd_link_hash_table *htab, bfd_boolean (*func) (struct bfd_link_hash_entry *, void *), void *info) { - bfd_hash_traverse (&table->table, - (bfd_boolean (*) (struct bfd_hash_entry *, void *)) func, - info); + unsigned int i; + + htab->table.frozen = 1; + for (i = 0; i < htab->table.size; i++) + { + struct bfd_link_hash_entry *p; + + p = (struct bfd_link_hash_entry *) htab->table.table[i]; + for (; p != NULL; p = (struct bfd_link_hash_entry *) p->root.next) + if (!(*func) (p->type == bfd_link_hash_warning ? p->u.i.link : p, info)) + goto out; + } + out: + htab->table.frozen = 0; } /* Add a symbol to the linker hash table undefs list. */ @@ -1568,6 +1577,8 @@ _bfd_generic_link_add_one_symbol (struct bfd_link_info *info, struct bfd_link_hash_entry *h; bfd_boolean cycle; + BFD_ASSERT (section != NULL); + if (bfd_is_ind_section (section) || (flags & BSF_INDIRECT) != 0) row = INDR_ROW; @@ -1609,8 +1620,8 @@ _bfd_generic_link_add_one_symbol (struct bfd_link_info *info, || (info->notice_hash != NULL && bfd_hash_lookup (info->notice_hash, name, FALSE, FALSE) != NULL)) { - if (! (*info->callbacks->notice) (info, h->root.string, abfd, section, - value)) + if (! (*info->callbacks->notice) (info, h, + abfd, section, value, flags, string)) return FALSE; } @@ -1643,7 +1654,6 @@ _bfd_generic_link_add_one_symbol (struct bfd_link_info *info, /* Make a new weak undefined symbol. */ h->type = bfd_link_hash_undefweak; h->u.undef.abfd = abfd; - h->u.undef.weak = abfd; break; case CDEF: @@ -2443,9 +2453,6 @@ _bfd_generic_link_write_global_symbol (struct generic_link_hash_entry *h, (struct generic_write_global_symbol_info *) data; asymbol *sym; - if (h->root.type == bfd_link_hash_warning) - h = (struct generic_link_hash_entry *) h->root.u.i.link; - if (h->written) return TRUE; @@ -2881,12 +2888,13 @@ FUNCTION bfd_section_already_linked SYNOPSIS - void bfd_section_already_linked (bfd *abfd, asection *sec, - struct bfd_link_info *info); + bfd_boolean bfd_section_already_linked (bfd *abfd, + asection *sec, + struct bfd_link_info *info); DESCRIPTION - Check if @var{sec} has been already linked during a reloceatable - or final link. + Check if @var{data} has been already linked during a reloceatable + or final link. Return TRUE if it has. .#define bfd_section_already_linked(abfd, sec, info) \ . BFD_SEND (abfd, _section_already_linked, (abfd, sec, info)) @@ -2980,20 +2988,109 @@ bfd_section_already_linked_table_free (void) bfd_hash_table_free (&_bfd_section_already_linked_table); } +/* Report warnings as appropriate for duplicate section SEC. + Return FALSE if we decide to keep SEC after all. */ + +bfd_boolean +_bfd_handle_already_linked (asection *sec, + struct bfd_section_already_linked *l, + struct bfd_link_info *info) +{ + switch (sec->flags & SEC_LINK_DUPLICATES) + { + default: + abort (); + + case SEC_LINK_DUPLICATES_DISCARD: + /* If we found an LTO IR match for this comdat group on + the first pass, replace it with the LTO output on the + second pass. We can't simply choose real object + files over IR because the first pass may contain a + mix of LTO and normal objects and we must keep the + first match, be it IR or real. */ + if (info->loading_lto_outputs + && (l->sec->owner->flags & BFD_PLUGIN) != 0) + { + l->sec = sec; + return FALSE; + } + break; + + case SEC_LINK_DUPLICATES_ONE_ONLY: + info->callbacks->einfo + (_("%B: ignoring duplicate section `%A'\n"), + sec->owner, sec); + break; + + case SEC_LINK_DUPLICATES_SAME_SIZE: + if ((l->sec->owner->flags & BFD_PLUGIN) != 0) + ; + else if (sec->size != l->sec->size) + info->callbacks->einfo + (_("%B: duplicate section `%A' has different size\n"), + sec->owner, sec); + break; + + case SEC_LINK_DUPLICATES_SAME_CONTENTS: + if ((l->sec->owner->flags & BFD_PLUGIN) != 0) + ; + else if (sec->size != l->sec->size) + info->callbacks->einfo + (_("%B: duplicate section `%A' has different size\n"), + sec->owner, sec); + else if (sec->size != 0) + { + bfd_byte *sec_contents, *l_sec_contents = NULL; + + if (!bfd_malloc_and_get_section (sec->owner, sec, &sec_contents)) + info->callbacks->einfo + (_("%B: could not read contents of section `%A'\n"), + sec->owner, sec); + else if (!bfd_malloc_and_get_section (l->sec->owner, l->sec, + &l_sec_contents)) + info->callbacks->einfo + (_("%B: could not read contents of section `%A'\n"), + l->sec->owner, l->sec); + else if (memcmp (sec_contents, l_sec_contents, sec->size) != 0) + info->callbacks->einfo + (_("%B: duplicate section `%A' has different contents\n"), + sec->owner, sec); + + if (sec_contents) + free (sec_contents); + if (l_sec_contents) + free (l_sec_contents); + } + break; + } + + /* Set the output_section field so that lang_add_section + does not create a lang_input_section structure for this + section. Since there might be a symbol in the section + being discarded, we must retain a pointer to the section + which we are really going to use. */ + sec->output_section = bfd_abs_section_ptr; + sec->kept_section = l->sec; + return TRUE; +} + /* This is used on non-ELF inputs. */ -void -_bfd_generic_section_already_linked (bfd *abfd, asection *sec, +bfd_boolean +_bfd_generic_section_already_linked (bfd *abfd ATTRIBUTE_UNUSED, + asection *sec, struct bfd_link_info *info) { - flagword flags; const char *name; struct bfd_section_already_linked *l; struct bfd_section_already_linked_hash_entry *already_linked_list; - flags = sec->flags; - if ((flags & SEC_LINK_ONCE) == 0) - return; + if ((sec->flags & SEC_LINK_ONCE) == 0) + return FALSE; + + /* The generic linker doesn't handle section groups. */ + if ((sec->flags & SEC_GROUP) != 0) + return FALSE; /* FIXME: When doing a relocatable link, we may have trouble copying relocations in other sections that refer to local symbols @@ -3012,81 +3109,18 @@ _bfd_generic_section_already_linked (bfd *abfd, asection *sec, already_linked_list = bfd_section_already_linked_table_lookup (name); - for (l = already_linked_list->entry; l != NULL; l = l->next) + l = already_linked_list->entry; + if (l != NULL) { - bfd_boolean skip = FALSE; - struct coff_comdat_info *s_comdat - = bfd_coff_get_comdat_section (abfd, sec); - struct coff_comdat_info *l_comdat - = bfd_coff_get_comdat_section (l->sec->owner, l->sec); - - /* We may have 3 different sections on the list: group section, - comdat section and linkonce section. SEC may be a linkonce or - comdat section. We always ignore group section. For non-COFF - inputs, we also ignore comdat section. - - FIXME: Is that safe to match a linkonce section with a comdat - section for COFF inputs? */ - if ((l->sec->flags & SEC_GROUP) != 0) - skip = TRUE; - else if (bfd_get_flavour (abfd) == bfd_target_coff_flavour) - { - if (s_comdat != NULL - && l_comdat != NULL - && strcmp (s_comdat->name, l_comdat->name) != 0) - skip = TRUE; - } - else if (l_comdat != NULL) - skip = TRUE; - - if (!skip) - { - /* The section has already been linked. See if we should - issue a warning. */ - switch (flags & SEC_LINK_DUPLICATES) - { - default: - abort (); - - case SEC_LINK_DUPLICATES_DISCARD: - break; - - case SEC_LINK_DUPLICATES_ONE_ONLY: - (*_bfd_error_handler) - (_("%B: warning: ignoring duplicate section `%A'\n"), - abfd, sec); - break; - - case SEC_LINK_DUPLICATES_SAME_CONTENTS: - /* FIXME: We should really dig out the contents of both - sections and memcmp them. The COFF/PE spec says that - the Microsoft linker does not implement this - correctly, so I'm not going to bother doing it - either. */ - /* Fall through. */ - case SEC_LINK_DUPLICATES_SAME_SIZE: - if (sec->size != l->sec->size) - (*_bfd_error_handler) - (_("%B: warning: duplicate section `%A' has different size\n"), - abfd, sec); - break; - } - - /* Set the output_section field so that lang_add_section - does not create a lang_input_section structure for this - section. Since there might be a symbol in the section - being discarded, we must retain a pointer to the section - which we are really going to use. */ - sec->output_section = bfd_abs_section_ptr; - sec->kept_section = l->sec; - - return; - } + /* The section has already been linked. See if we should + issue a warning. */ + return _bfd_handle_already_linked (sec, l, info); } /* This is the first section with this name. Record it. */ - if (! bfd_section_already_linked_table_insert (already_linked_list, sec)) + if (!bfd_section_already_linked_table_insert (already_linked_list, sec)) info->callbacks->einfo (_("%F%P: already_linked_table: %E\n")); + return FALSE; } /* Convert symbols in excluded output sections to use a kept section. */ @@ -3096,9 +3130,6 @@ fix_syms (struct bfd_link_hash_entry *h, void *data) { bfd *obfd = (bfd *) data; - if (h->type == bfd_link_hash_warning) - h = h->u.i.link; - if (h->type == bfd_link_hash_defined || h->type == bfd_link_hash_defweak) { @@ -3349,3 +3380,26 @@ bfd_find_version_for_sym (struct bfd_elf_version_tree *verdefs, return NULL; } + +/* +FUNCTION + bfd_hide_sym_by_version + +SYNOPSIS + bfd_boolean bfd_hide_sym_by_version + (struct bfd_elf_version_tree *verdefs, const char *sym_name); + +DESCRIPTION + Search an elf version script tree for symbol versioning + info for a given symbol. Return TRUE if the symbol is hidden. + +*/ + +bfd_boolean +bfd_hide_sym_by_version (struct bfd_elf_version_tree *verdefs, + const char *sym_name) +{ + bfd_boolean hidden = FALSE; + bfd_find_version_for_sym (verdefs, sym_name, &hidden); + return hidden; +} diff --git a/bfd/m68klinux.c b/bfd/m68klinux.c index 08b0010..ab5a456 100644 --- a/bfd/m68klinux.c +++ b/bfd/m68klinux.c @@ -1,6 +1,7 @@ /* BFD back-end for linux flavored m68k a.out binaries. Copyright 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2000, 2001, 2002, - 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. + 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2011 + Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -439,9 +440,6 @@ linux_tally_symbols (h, data) struct linux_link_hash_entry *h1, *h2; bfd_boolean exists; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct linux_link_hash_entry *) h->root.root.u.i.link; - if (h->root.root.type == bfd_link_hash_undefined && CONST_STRNEQ (h->root.root.root.string, NEEDS_SHRLIB)) { diff --git a/bfd/mach-o-i386.c b/bfd/mach-o-i386.c index e46cbc6..1191560 100644 --- a/bfd/mach-o-i386.c +++ b/bfd/mach-o-i386.c @@ -24,6 +24,7 @@ #include "bfd.h" #include "libbfd.h" #include "libiberty.h" +#include "mach-o/reloc.h" #define bfd_mach_o_object_p bfd_mach_o_i386_object_p #define bfd_mach_o_core_p bfd_mach_o_i386_core_p diff --git a/bfd/mach-o-target.c b/bfd/mach-o-target.c index 64c7ddf..29682c9 100644 --- a/bfd/mach-o-target.c +++ b/bfd/mach-o-target.c @@ -1,5 +1,5 @@ /* Mach-O support for BFD. - Copyright 1999, 2000, 2001, 2002, 2005, 2007, 2008, 2009, 2010 + Copyright 1999, 2000, 2001, 2002, 2005, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -27,7 +27,6 @@ #define bfd_mach_o_close_and_cleanup _bfd_generic_close_and_cleanup #define bfd_mach_o_bfd_free_cached_info _bfd_generic_bfd_free_cached_info -#define bfd_mach_o_new_section_hook _bfd_generic_new_section_hook #define bfd_mach_o_get_section_contents_in_window _bfd_generic_get_section_contents_in_window #define bfd_mach_o_bfd_is_target_special_symbol ((bfd_boolean (*) (bfd *, asymbol *)) bfd_false) #define bfd_mach_o_bfd_is_local_label_name bfd_generic_is_local_label_name @@ -51,6 +50,7 @@ #define bfd_mach_o_bfd_set_private_flags _bfd_generic_bfd_set_private_flags #define bfd_mach_o_get_section_contents _bfd_generic_get_section_contents #define bfd_mach_o_bfd_gc_sections bfd_generic_gc_sections +#define bfd_mach_o_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define bfd_mach_o_bfd_merge_sections bfd_generic_merge_sections #define bfd_mach_o_bfd_is_group_section bfd_generic_is_group_section #define bfd_mach_o_bfd_discard_group bfd_generic_discard_group @@ -118,6 +118,7 @@ const bfd_target TARGET_NAME = '_', /* symbol_leading_char. */ ' ', /* ar_pad_char. */ 16, /* ar_max_namelen. */ + 0, /* match priority. */ #if TARGET_BIG_ENDIAN bfd_getb64, bfd_getb_signed_64, bfd_putb64, diff --git a/bfd/mach-o-x86-64.c b/bfd/mach-o-x86-64.c index 005315d..2248d97 100644 --- a/bfd/mach-o-x86-64.c +++ b/bfd/mach-o-x86-64.c @@ -24,6 +24,7 @@ #include "bfd.h" #include "libbfd.h" #include "libiberty.h" +#include "mach-o/x86-64.h" #define bfd_mach_o_object_p bfd_mach_o_x86_64_object_p #define bfd_mach_o_core_p bfd_mach_o_x86_64_core_p @@ -51,11 +52,11 @@ bfd_mach_o_x86_64_mkobject (bfd *abfd) return FALSE; mdata = bfd_mach_o_get_data (abfd); - mdata->header.magic = BFD_MACH_O_MH_MAGIC; + mdata->header.magic = BFD_MACH_O_MH_MAGIC_64; mdata->header.cputype = BFD_MACH_O_CPU_TYPE_X86_64; mdata->header.cpusubtype = BFD_MACH_O_CPU_SUBTYPE_X86_ALL; mdata->header.byteorder = BFD_ENDIAN_LITTLE; - mdata->header.version = 1; + mdata->header.version = 2; return TRUE; } @@ -220,27 +221,42 @@ static bfd_boolean bfd_mach_o_x86_64_swap_reloc_out (arelent *rel, bfd_mach_o_reloc_info *rinfo) { rinfo->r_address = rel->address; + rinfo->r_scattered = 0; switch (rel->howto->type) { case BFD_RELOC_64: - rinfo->r_scattered = 0; rinfo->r_type = BFD_MACH_O_X86_64_RELOC_UNSIGNED; rinfo->r_pcrel = 0; - rinfo->r_length = rel->howto->size; /* Correct in practice. */ - if ((*rel->sym_ptr_ptr)->flags & BSF_SECTION_SYM) - { - rinfo->r_extern = 0; - rinfo->r_value = (*rel->sym_ptr_ptr)->section->target_index; - } - else - { - rinfo->r_extern = 1; - rinfo->r_value = (*rel->sym_ptr_ptr)->udata.i; - } + rinfo->r_length = 3; + break; + case BFD_RELOC_32_PCREL: + rinfo->r_type = BFD_MACH_O_X86_64_RELOC_BRANCH; + rinfo->r_pcrel = 1; + rinfo->r_length = 2; + break; + case BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64: + rinfo->r_type = BFD_MACH_O_X86_64_RELOC_SUBTRACTOR; + rinfo->r_pcrel = 0; + rinfo->r_length = 3; + break; + case BFD_RELOC_MACH_O_X86_64_GOT_LOAD: + rinfo->r_type = BFD_MACH_O_X86_64_RELOC_GOT_LOAD; + rinfo->r_pcrel = 1; + rinfo->r_length = 2; break; default: return FALSE; } + if ((*rel->sym_ptr_ptr)->flags & BSF_SECTION_SYM) + { + rinfo->r_extern = 0; + rinfo->r_value = (*rel->sym_ptr_ptr)->section->target_index; + } + else + { + rinfo->r_extern = 1; + rinfo->r_value = (*rel->sym_ptr_ptr)->udata.i; + } return TRUE; } diff --git a/bfd/mach-o.c b/bfd/mach-o.c index 0c0d1ac..91f0306 100644 --- a/bfd/mach-o.c +++ b/bfd/mach-o.c @@ -26,6 +26,8 @@ #include "libbfd.h" #include "libiberty.h" #include "aout/stab_gnu.h" +#include "mach-o/reloc.h" +#include "mach-o/external.h" #include #define bfd_mach_o_object_p bfd_mach_o_gen_object_p @@ -132,63 +134,79 @@ static const struct mach_o_section_name_xlat data_section_names_xlat[] = struct mach_o_segment_name_xlat { + /* Segment name. */ const char *segname; + + /* List of known sections for the segment. */ const struct mach_o_section_name_xlat *sections; }; +/* List of known segment names. */ + static const struct mach_o_segment_name_xlat segsec_names_xlat[] = { - { "__DWARF", dwarf_section_names_xlat }, { "__TEXT", text_section_names_xlat }, { "__DATA", data_section_names_xlat }, + { "__DWARF", dwarf_section_names_xlat }, { NULL, NULL } }; - /* Mach-O to bfd names. */ -static void -bfd_mach_o_convert_section_name_to_bfd (bfd *abfd, bfd_mach_o_section *section, - char **name, flagword *flags) +void +bfd_mach_o_normalize_section_name (const char *segname, const char *sectname, + const char **name, flagword *flags) { const struct mach_o_segment_name_xlat *seg; - char *res; - unsigned int len; - const char *pfx = ""; *name = NULL; *flags = SEC_NO_FLAGS; for (seg = segsec_names_xlat; seg->segname; seg++) { - if (strcmp (seg->segname, section->segname) == 0) + if (strncmp (seg->segname, segname, BFD_MACH_O_SEGNAME_SIZE) == 0) { const struct mach_o_section_name_xlat *sec; for (sec = seg->sections; sec->mach_o_name; sec++) { - if (strcmp (sec->mach_o_name, section->sectname) == 0) + if (strncmp (sec->mach_o_name, sectname, + BFD_MACH_O_SECTNAME_SIZE) == 0) { - len = strlen (sec->bfd_name); - res = bfd_alloc (abfd, len + 1); - - if (res == NULL) - return; - strcpy (res, sec->bfd_name); - *name = res; + *name = sec->bfd_name; *flags = sec->flags; return; } } + return; } } +} - len = strlen (section->segname) + 1 - + strlen (section->sectname) + 1; +/* Convert Mach-O section name to BFD. Try to use standard names, otherwise + forge a new name. SEGNAME and SECTNAME are 16 bytes strings. */ + +static void +bfd_mach_o_convert_section_name_to_bfd + (bfd *abfd, const char *segname, const char *sectname, + const char **name, flagword *flags) +{ + char *res; + unsigned int len; + const char *pfx = ""; + + /* First search for a canonical name. */ + bfd_mach_o_normalize_section_name (segname, sectname, name, flags); + + /* Return now if found. */ + if (*name) + return; + + len = 16 + 1 + 16 + 1; /* Put "LC_SEGMENT." prefix if the segment name is weird (ie doesn't start with an underscore. */ - if (section->segname[0] != '_') + if (segname[0] != '_') { static const char seg_pfx[] = "LC_SEGMENT."; @@ -199,8 +217,9 @@ bfd_mach_o_convert_section_name_to_bfd (bfd *abfd, bfd_mach_o_section *section, res = bfd_alloc (abfd, len); if (res == NULL) return; - snprintf (res, len, "%s%s.%s", pfx, section->segname, section->sectname); + snprintf (res, len, "%s%.16s.%.16s", pfx, segname, sectname); *name = res; + *flags = SEC_NO_FLAGS; } /* Convert a bfd section name to a Mach-O segment + section name. */ @@ -376,6 +395,13 @@ bfd_mach_o_canonicalize_symtab (bfd *abfd, asymbol **alocation) if (nsyms < 0) return nsyms; + if (nsyms == 0) + { + /* Do not try to read symbols if there are none. */ + alocation[0] = NULL; + return 0; + } + if (bfd_mach_o_read_symtab_symbols (abfd) != 0) { (*_bfd_error_handler) (_("bfd_mach_o_canonicalize_symtab: unable to load symbols")); @@ -598,25 +624,25 @@ bfd_mach_o_convert_architecture (bfd_mach_o_cpu_type mtype, static bfd_boolean bfd_mach_o_write_header (bfd *abfd, bfd_mach_o_header *header) { - unsigned char buf[32]; + struct mach_o_header_external raw; unsigned int size; size = mach_o_wide_p (header) ? BFD_MACH_O_HEADER_64_SIZE : BFD_MACH_O_HEADER_SIZE; - bfd_h_put_32 (abfd, header->magic, buf + 0); - bfd_h_put_32 (abfd, header->cputype, buf + 4); - bfd_h_put_32 (abfd, header->cpusubtype, buf + 8); - bfd_h_put_32 (abfd, header->filetype, buf + 12); - bfd_h_put_32 (abfd, header->ncmds, buf + 16); - bfd_h_put_32 (abfd, header->sizeofcmds, buf + 20); - bfd_h_put_32 (abfd, header->flags, buf + 24); + bfd_h_put_32 (abfd, header->magic, raw.magic); + bfd_h_put_32 (abfd, header->cputype, raw.cputype); + bfd_h_put_32 (abfd, header->cpusubtype, raw.cpusubtype); + bfd_h_put_32 (abfd, header->filetype, raw.filetype); + bfd_h_put_32 (abfd, header->ncmds, raw.ncmds); + bfd_h_put_32 (abfd, header->sizeofcmds, raw.sizeofcmds); + bfd_h_put_32 (abfd, header->flags, raw.flags); if (mach_o_wide_p (header)) - bfd_h_put_32 (abfd, header->reserved, buf + 28); + bfd_h_put_32 (abfd, header->reserved, raw.reserved); if (bfd_seek (abfd, 0, SEEK_SET) != 0 - || bfd_bwrite ((void *) buf, size, abfd) != size) + || bfd_bwrite (&raw, size, abfd) != size) return FALSE; return TRUE; @@ -627,7 +653,7 @@ bfd_mach_o_write_thread (bfd *abfd, bfd_mach_o_load_command *command) { bfd_mach_o_thread_command *cmd = &command->command.thread; unsigned int i; - unsigned char buf[8]; + struct mach_o_thread_command_external raw; unsigned int offset; BFD_ASSERT ((command->type == BFD_MACH_O_LC_THREAD) @@ -637,16 +663,17 @@ bfd_mach_o_write_thread (bfd *abfd, bfd_mach_o_load_command *command) for (i = 0; i < cmd->nflavours; i++) { BFD_ASSERT ((cmd->flavours[i].size % 4) == 0); - BFD_ASSERT (cmd->flavours[i].offset == (command->offset + offset + 8)); + BFD_ASSERT (cmd->flavours[i].offset == + (command->offset + offset + BFD_MACH_O_LC_SIZE)); - bfd_h_put_32 (abfd, cmd->flavours[i].flavour, buf); - bfd_h_put_32 (abfd, (cmd->flavours[i].size / 4), buf + 4); + bfd_h_put_32 (abfd, cmd->flavours[i].flavour, raw.flavour); + bfd_h_put_32 (abfd, (cmd->flavours[i].size / 4), raw.count); if (bfd_seek (abfd, command->offset + offset, SEEK_SET) != 0 - || bfd_bwrite ((void *) buf, 8, abfd) != 8) + || bfd_bwrite (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - offset += cmd->flavours[i].size + 8; + offset += cmd->flavours[i].size + sizeof (raw); } return 0; @@ -660,7 +687,8 @@ bfd_mach_o_get_reloc_upper_bound (bfd *abfd ATTRIBUTE_UNUSED, } static int -bfd_mach_o_canonicalize_one_reloc (bfd *abfd, char *buf, +bfd_mach_o_canonicalize_one_reloc (bfd *abfd, + struct mach_o_reloc_info_external *raw, arelent *res, asymbol **syms) { bfd_mach_o_data_struct *mdata = bfd_mach_o_get_data (abfd); @@ -670,8 +698,8 @@ bfd_mach_o_canonicalize_one_reloc (bfd *abfd, char *buf, bfd_vma symnum; asymbol **sym; - addr = bfd_get_32 (abfd, buf + 0); - symnum = bfd_get_32 (abfd, buf + 4); + addr = bfd_get_32 (abfd, raw->r_address); + symnum = bfd_get_32 (abfd, raw->r_symbolnum); if (addr & BFD_MACH_O_SR_SCATTERED) { @@ -738,12 +766,13 @@ bfd_mach_o_canonicalize_relocs (bfd *abfd, unsigned long filepos, arelent *res, asymbol **syms) { unsigned long i; - char *native_relocs; + struct mach_o_reloc_info_external *native_relocs; bfd_size_type native_size; /* Allocate and read relocs. */ native_size = count * BFD_MACH_O_RELENT_SIZE; - native_relocs = bfd_malloc (native_size); + native_relocs = + (struct mach_o_reloc_info_external *) bfd_malloc (native_size); if (native_relocs == NULL) return -1; @@ -753,9 +782,8 @@ bfd_mach_o_canonicalize_relocs (bfd *abfd, unsigned long filepos, for (i = 0; i < count; i++) { - char *buf = native_relocs + BFD_MACH_O_RELENT_SIZE * i; - - if (bfd_mach_o_canonicalize_one_reloc (abfd, buf, &res[i], syms) < 0) + if (bfd_mach_o_canonicalize_one_reloc (abfd, &native_relocs[i], + &res[i], syms) < 0) goto err; } free (native_relocs); @@ -885,7 +913,7 @@ bfd_mach_o_write_relocs (bfd *abfd, bfd_mach_o_section *section) for (i = 0; i < section->nreloc; i++) { arelent *rel = entries[i]; - char buf[8]; + struct mach_o_reloc_info_external raw; bfd_mach_o_reloc_info info, *pinfo = &info; /* Convert relocation to an intermediate representation. */ @@ -902,23 +930,24 @@ bfd_mach_o_write_relocs (bfd *abfd, bfd_mach_o_section *section) | BFD_MACH_O_SET_SR_LENGTH(pinfo->r_length) | BFD_MACH_O_SET_SR_TYPE(pinfo->r_type) | BFD_MACH_O_SET_SR_ADDRESS(pinfo->r_address); - bfd_put_32 (abfd, v, buf); - bfd_put_32 (abfd, pinfo->r_value, buf + 4); + /* Note: scattered relocs have field in reverse order... */ + bfd_put_32 (abfd, v, raw.r_address); + bfd_put_32 (abfd, pinfo->r_value, raw.r_symbolnum); } else { unsigned long v; - bfd_put_32 (abfd, pinfo->r_address, buf); + bfd_put_32 (abfd, pinfo->r_address, raw.r_address); v = BFD_MACH_O_SET_R_SYMBOLNUM (pinfo->r_value) | (pinfo->r_pcrel ? BFD_MACH_O_R_PCREL : 0) | BFD_MACH_O_SET_R_LENGTH (pinfo->r_length) | (pinfo->r_extern ? BFD_MACH_O_R_EXTERN : 0) | BFD_MACH_O_SET_R_TYPE (pinfo->r_type); - bfd_put_32 (abfd, v, buf + 4); + bfd_put_32 (abfd, v, raw.r_symbolnum); } - if (bfd_bwrite ((void *) buf, BFD_MACH_O_RELENT_SIZE, abfd) + if (bfd_bwrite (&raw, BFD_MACH_O_RELENT_SIZE, abfd) != BFD_MACH_O_RELENT_SIZE) return FALSE; } @@ -928,21 +957,21 @@ bfd_mach_o_write_relocs (bfd *abfd, bfd_mach_o_section *section) static int bfd_mach_o_write_section_32 (bfd *abfd, bfd_mach_o_section *section) { - unsigned char buf[BFD_MACH_O_SECTION_SIZE]; - - memcpy (buf, section->sectname, 16); - memcpy (buf + 16, section->segname, 16); - bfd_h_put_32 (abfd, section->addr, buf + 32); - bfd_h_put_32 (abfd, section->size, buf + 36); - bfd_h_put_32 (abfd, section->offset, buf + 40); - bfd_h_put_32 (abfd, section->align, buf + 44); - bfd_h_put_32 (abfd, section->reloff, buf + 48); - bfd_h_put_32 (abfd, section->nreloc, buf + 52); - bfd_h_put_32 (abfd, section->flags, buf + 56); - bfd_h_put_32 (abfd, section->reserved1, buf + 60); - bfd_h_put_32 (abfd, section->reserved2, buf + 64); - - if (bfd_bwrite ((void *) buf, BFD_MACH_O_SECTION_SIZE, abfd) + struct mach_o_section_32_external raw; + + memcpy (raw.sectname, section->sectname, 16); + memcpy (raw.segname, section->segname, 16); + bfd_h_put_32 (abfd, section->addr, raw.addr); + bfd_h_put_32 (abfd, section->size, raw.size); + bfd_h_put_32 (abfd, section->offset, raw.offset); + bfd_h_put_32 (abfd, section->align, raw.align); + bfd_h_put_32 (abfd, section->reloff, raw.reloff); + bfd_h_put_32 (abfd, section->nreloc, raw.nreloc); + bfd_h_put_32 (abfd, section->flags, raw.flags); + bfd_h_put_32 (abfd, section->reserved1, raw.reserved1); + bfd_h_put_32 (abfd, section->reserved2, raw.reserved2); + + if (bfd_bwrite (&raw, BFD_MACH_O_SECTION_SIZE, abfd) != BFD_MACH_O_SECTION_SIZE) return -1; @@ -952,22 +981,22 @@ bfd_mach_o_write_section_32 (bfd *abfd, bfd_mach_o_section *section) static int bfd_mach_o_write_section_64 (bfd *abfd, bfd_mach_o_section *section) { - unsigned char buf[BFD_MACH_O_SECTION_64_SIZE]; - - memcpy (buf, section->sectname, 16); - memcpy (buf + 16, section->segname, 16); - bfd_h_put_64 (abfd, section->addr, buf + 32); - bfd_h_put_64 (abfd, section->size, buf + 40); - bfd_h_put_32 (abfd, section->offset, buf + 48); - bfd_h_put_32 (abfd, section->align, buf + 52); - bfd_h_put_32 (abfd, section->reloff, buf + 56); - bfd_h_put_32 (abfd, section->nreloc, buf + 60); - bfd_h_put_32 (abfd, section->flags, buf + 64); - bfd_h_put_32 (abfd, section->reserved1, buf + 68); - bfd_h_put_32 (abfd, section->reserved2, buf + 72); - bfd_h_put_32 (abfd, section->reserved3, buf + 76); - - if (bfd_bwrite ((void *) buf, BFD_MACH_O_SECTION_64_SIZE, abfd) + struct mach_o_section_64_external raw; + + memcpy (raw.sectname, section->sectname, 16); + memcpy (raw.segname, section->segname, 16); + bfd_h_put_64 (abfd, section->addr, raw.addr); + bfd_h_put_64 (abfd, section->size, raw.size); + bfd_h_put_32 (abfd, section->offset, raw.offset); + bfd_h_put_32 (abfd, section->align, raw.align); + bfd_h_put_32 (abfd, section->reloff, raw.reloff); + bfd_h_put_32 (abfd, section->nreloc, raw.nreloc); + bfd_h_put_32 (abfd, section->flags, raw.flags); + bfd_h_put_32 (abfd, section->reserved1, raw.reserved1); + bfd_h_put_32 (abfd, section->reserved2, raw.reserved2); + bfd_h_put_32 (abfd, section->reserved3, raw.reserved3); + + if (bfd_bwrite (&raw, BFD_MACH_O_SECTION_64_SIZE, abfd) != BFD_MACH_O_SECTION_64_SIZE) return -1; @@ -977,33 +1006,32 @@ bfd_mach_o_write_section_64 (bfd *abfd, bfd_mach_o_section *section) static int bfd_mach_o_write_segment_32 (bfd *abfd, bfd_mach_o_load_command *command) { - unsigned char buf[BFD_MACH_O_LC_SEGMENT_SIZE]; + struct mach_o_segment_command_32_external raw; bfd_mach_o_segment_command *seg = &command->command.segment; - unsigned long i; + bfd_mach_o_section *sec; BFD_ASSERT (command->type == BFD_MACH_O_LC_SEGMENT); - for (i = 0; i < seg->nsects; i++) - if (!bfd_mach_o_write_relocs (abfd, &seg->sections[i])) + for (sec = seg->sect_head; sec != NULL; sec = sec->next) + if (!bfd_mach_o_write_relocs (abfd, sec)) return -1; - memcpy (buf, seg->segname, 16); - bfd_h_put_32 (abfd, seg->vmaddr, buf + 16); - bfd_h_put_32 (abfd, seg->vmsize, buf + 20); - bfd_h_put_32 (abfd, seg->fileoff, buf + 24); - bfd_h_put_32 (abfd, seg->filesize, buf + 28); - bfd_h_put_32 (abfd, seg->maxprot, buf + 32); - bfd_h_put_32 (abfd, seg->initprot, buf + 36); - bfd_h_put_32 (abfd, seg->nsects, buf + 40); - bfd_h_put_32 (abfd, seg->flags, buf + 44); + memcpy (raw.segname, seg->segname, 16); + bfd_h_put_32 (abfd, seg->vmaddr, raw.vmaddr); + bfd_h_put_32 (abfd, seg->vmsize, raw.vmsize); + bfd_h_put_32 (abfd, seg->fileoff, raw.fileoff); + bfd_h_put_32 (abfd, seg->filesize, raw.filesize); + bfd_h_put_32 (abfd, seg->maxprot, raw.maxprot); + bfd_h_put_32 (abfd, seg->initprot, raw.initprot); + bfd_h_put_32 (abfd, seg->nsects, raw.nsects); + bfd_h_put_32 (abfd, seg->flags, raw.flags); - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || (bfd_bwrite ((void *) buf, BFD_MACH_O_LC_SEGMENT_SIZE - 8, abfd) - != BFD_MACH_O_LC_SEGMENT_SIZE - 8)) + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bwrite (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - for (i = 0; i < seg->nsects; i++) - if (bfd_mach_o_write_section_32 (abfd, &seg->sections[i])) + for (sec = seg->sect_head; sec != NULL; sec = sec->next) + if (bfd_mach_o_write_section_32 (abfd, sec)) return -1; return 0; @@ -1012,33 +1040,32 @@ bfd_mach_o_write_segment_32 (bfd *abfd, bfd_mach_o_load_command *command) static int bfd_mach_o_write_segment_64 (bfd *abfd, bfd_mach_o_load_command *command) { - unsigned char buf[BFD_MACH_O_LC_SEGMENT_64_SIZE]; + struct mach_o_segment_command_64_external raw; bfd_mach_o_segment_command *seg = &command->command.segment; - unsigned long i; + bfd_mach_o_section *sec; BFD_ASSERT (command->type == BFD_MACH_O_LC_SEGMENT_64); - for (i = 0; i < seg->nsects; i++) - if (!bfd_mach_o_write_relocs (abfd, &seg->sections[i])) + for (sec = seg->sect_head; sec != NULL; sec = sec->next) + if (!bfd_mach_o_write_relocs (abfd, sec)) return -1; - memcpy (buf, seg->segname, 16); - bfd_h_put_64 (abfd, seg->vmaddr, buf + 16); - bfd_h_put_64 (abfd, seg->vmsize, buf + 24); - bfd_h_put_64 (abfd, seg->fileoff, buf + 32); - bfd_h_put_64 (abfd, seg->filesize, buf + 40); - bfd_h_put_32 (abfd, seg->maxprot, buf + 48); - bfd_h_put_32 (abfd, seg->initprot, buf + 52); - bfd_h_put_32 (abfd, seg->nsects, buf + 56); - bfd_h_put_32 (abfd, seg->flags, buf + 60); - - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || (bfd_bwrite ((void *) buf, BFD_MACH_O_LC_SEGMENT_64_SIZE - 8, abfd) - != BFD_MACH_O_LC_SEGMENT_64_SIZE - 8)) + memcpy (raw.segname, seg->segname, 16); + bfd_h_put_64 (abfd, seg->vmaddr, raw.vmaddr); + bfd_h_put_64 (abfd, seg->vmsize, raw.vmsize); + bfd_h_put_64 (abfd, seg->fileoff, raw.fileoff); + bfd_h_put_64 (abfd, seg->filesize, raw.filesize); + bfd_h_put_32 (abfd, seg->maxprot, raw.maxprot); + bfd_h_put_32 (abfd, seg->initprot, raw.initprot); + bfd_h_put_32 (abfd, seg->nsects, raw.nsects); + bfd_h_put_32 (abfd, seg->flags, raw.flags); + + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bwrite (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - for (i = 0; i < seg->nsects; i++) - if (bfd_mach_o_write_section_64 (abfd, &seg->sections[i])) + for (sec = seg->sect_head; sec != NULL; sec = sec->next) + if (bfd_mach_o_write_section_64 (abfd, sec)) return -1; return 0; @@ -1049,7 +1076,6 @@ bfd_mach_o_write_symtab (bfd *abfd, bfd_mach_o_load_command *command) { bfd_mach_o_data_struct *mdata = bfd_mach_o_get_data (abfd); bfd_mach_o_symtab_command *sym = &command->command.symtab; - unsigned char buf[16]; unsigned long i; unsigned int wide = bfd_mach_o_wide_p (abfd); unsigned int symlen = wide ? BFD_MACH_O_NLIST_64_SIZE : BFD_MACH_O_NLIST_SIZE; @@ -1086,17 +1112,35 @@ bfd_mach_o_write_symtab (bfd *abfd, bfd_mach_o_load_command *command) if (str_index == (bfd_size_type) -1) goto err; } - bfd_h_put_32 (abfd, str_index, buf); - bfd_h_put_8 (abfd, s->n_type, buf + 4); - bfd_h_put_8 (abfd, s->n_sect, buf + 5); - bfd_h_put_16 (abfd, s->n_desc, buf + 6); + if (wide) - bfd_h_put_64 (abfd, s->symbol.section->vma + s->symbol.value, buf + 8); + { + struct mach_o_nlist_64_external raw; + + bfd_h_put_32 (abfd, str_index, raw.n_strx); + bfd_h_put_8 (abfd, s->n_type, raw.n_type); + bfd_h_put_8 (abfd, s->n_sect, raw.n_sect); + bfd_h_put_16 (abfd, s->n_desc, raw.n_desc); + bfd_h_put_64 (abfd, s->symbol.section->vma + s->symbol.value, + raw.n_value); + + if (bfd_bwrite (&raw, sizeof (raw), abfd) != sizeof (raw)) + goto err; + } else - bfd_h_put_32 (abfd, s->symbol.section->vma + s->symbol.value, buf + 8); + { + struct mach_o_nlist_external raw; - if (bfd_bwrite ((void *) buf, symlen, abfd) != symlen) - goto err; + bfd_h_put_32 (abfd, str_index, raw.n_strx); + bfd_h_put_8 (abfd, s->n_type, raw.n_type); + bfd_h_put_8 (abfd, s->n_sect, raw.n_sect); + bfd_h_put_16 (abfd, s->n_desc, raw.n_desc); + bfd_h_put_32 (abfd, s->symbol.section->vma + s->symbol.value, + raw.n_value); + + if (bfd_bwrite (&raw, sizeof (raw), abfd) != sizeof (raw)) + goto err; + } } sym->strsize = _bfd_stringtab_size (strtab); sym->stroff = mdata->filelen; @@ -1107,14 +1151,18 @@ bfd_mach_o_write_symtab (bfd *abfd, bfd_mach_o_load_command *command) _bfd_stringtab_free (strtab); /* The command. */ - bfd_h_put_32 (abfd, sym->symoff, buf); - bfd_h_put_32 (abfd, sym->nsyms, buf + 4); - bfd_h_put_32 (abfd, sym->stroff, buf + 8); - bfd_h_put_32 (abfd, sym->strsize, buf + 12); + { + struct mach_o_symtab_command_external raw; - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || bfd_bwrite ((void *) buf, 16, abfd) != 16) - return FALSE; + bfd_h_put_32 (abfd, sym->symoff, raw.symoff); + bfd_h_put_32 (abfd, sym->nsyms, raw.nsyms); + bfd_h_put_32 (abfd, sym->stroff, raw.stroff); + bfd_h_put_32 (abfd, sym->strsize, raw.strsize); + + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bwrite (&raw, sizeof (raw), abfd) != sizeof (raw)) + return FALSE; + } return TRUE; @@ -1199,17 +1247,17 @@ bfd_mach_o_write_contents (bfd *abfd) for (i = 0; i < mdata->header.ncmds; i++) { - unsigned char buf[8]; + struct mach_o_load_command_external raw; bfd_mach_o_load_command *cur = &mdata->commands[i]; unsigned long typeflag; typeflag = cur->type | (cur->type_required ? BFD_MACH_O_LC_REQ_DYLD : 0); - bfd_h_put_32 (abfd, typeflag, buf); - bfd_h_put_32 (abfd, cur->len, buf + 4); + bfd_h_put_32 (abfd, typeflag, raw.cmd); + bfd_h_put_32 (abfd, cur->len, raw.cmdsize); if (bfd_seek (abfd, cur->offset, SEEK_SET) != 0 - || bfd_bwrite ((void *) buf, 8, abfd) != 8) + || bfd_bwrite (&raw, BFD_MACH_O_LC_SIZE, abfd) != 8) return FALSE; switch (cur->type) @@ -1259,6 +1307,40 @@ bfd_mach_o_write_contents (bfd *abfd) return TRUE; } +static void +bfd_mach_o_append_section_to_segment (bfd_mach_o_segment_command *seg, + asection *sec) +{ + bfd_mach_o_section *s = (bfd_mach_o_section *)sec->used_by_bfd; + if (seg->sect_head == NULL) + seg->sect_head = s; + else + seg->sect_tail->next = s; + seg->sect_tail = s; +} + +/* Create section Mach-O flags from BFD flags. */ + +static void +bfd_mach_o_set_section_flags_from_bfd (bfd *abfd ATTRIBUTE_UNUSED, asection *sec) +{ + flagword bfd_flags; + bfd_mach_o_section *s = bfd_mach_o_get_mach_o_section (sec); + + /* Create default flags. */ + bfd_flags = bfd_get_section_flags (abfd, sec); + if ((bfd_flags & SEC_CODE) == SEC_CODE) + s->flags = BFD_MACH_O_S_ATTR_PURE_INSTRUCTIONS + | BFD_MACH_O_S_ATTR_SOME_INSTRUCTIONS + | BFD_MACH_O_S_REGULAR; + else if ((bfd_flags & (SEC_ALLOC | SEC_LOAD)) == SEC_ALLOC) + s->flags = BFD_MACH_O_S_ZEROFILL; + else if (bfd_flags & SEC_DEBUGGING) + s->flags = BFD_MACH_O_S_REGULAR | BFD_MACH_O_S_ATTR_DEBUG; + else + s->flags = BFD_MACH_O_S_REGULAR; +} + /* Build Mach-O load commands from the sections. */ bfd_boolean @@ -1267,7 +1349,6 @@ bfd_mach_o_build_commands (bfd *abfd) bfd_mach_o_data_struct *mdata = bfd_mach_o_get_data (abfd); unsigned int wide = mach_o_wide_p (&mdata->header); bfd_mach_o_segment_command *seg; - bfd_mach_o_section *sections; asection *sec; bfd_mach_o_load_command *cmd; bfd_mach_o_load_command *symtab_cmd; @@ -1277,7 +1358,8 @@ bfd_mach_o_build_commands (bfd *abfd) if (mdata->header.ncmds) return FALSE; - /* Very simple version: 1 command (segment) containing all sections. */ + /* Very simple version: a command (segment) to contain all the sections and + a command for the symbol table. */ mdata->header.ncmds = 2; mdata->commands = bfd_alloc (abfd, mdata->header.ncmds * sizeof (bfd_mach_o_load_command)); @@ -1287,10 +1369,6 @@ bfd_mach_o_build_commands (bfd *abfd) seg = &cmd->command.segment; seg->nsects = bfd_count_sections (abfd); - sections = bfd_alloc (abfd, seg->nsects * sizeof (bfd_mach_o_section)); - if (sections == NULL) - return FALSE; - seg->sections = sections; /* Set segment command. */ if (wide) @@ -1331,35 +1409,38 @@ bfd_mach_o_build_commands (bfd *abfd) | BFD_MACH_O_PROT_EXECUTE; seg->initprot = seg->maxprot; seg->flags = 0; + seg->sect_head = NULL; + seg->sect_tail = NULL; /* Create Mach-O sections. */ target_index = 0; for (sec = abfd->sections; sec; sec = sec->next) { - sections->bfdsection = sec; - bfd_mach_o_convert_section_name_to_mach_o (abfd, sec, sections); - sections->addr = bfd_get_section_vma (abfd, sec); - sections->size = bfd_get_section_size (sec); - sections->align = bfd_get_section_alignment (abfd, sec); + bfd_mach_o_section *msect = bfd_mach_o_get_mach_o_section (sec); + + bfd_mach_o_append_section_to_segment (seg, sec); + + if (msect->flags == 0) + { + /* We suppose it hasn't been set. Convert from BFD flags. */ + bfd_mach_o_set_section_flags_from_bfd (abfd, sec); + } + msect->addr = bfd_get_section_vma (abfd, sec); + msect->size = bfd_get_section_size (sec); + msect->align = bfd_get_section_alignment (abfd, sec); - if (sections->size != 0) + if (msect->size != 0) { - mdata->filelen = FILE_ALIGN (mdata->filelen, sections->align); - sections->offset = mdata->filelen; + mdata->filelen = FILE_ALIGN (mdata->filelen, msect->align); + msect->offset = mdata->filelen; } else - sections->offset = 0; - sections->reloff = 0; - sections->nreloc = 0; - sections->reserved1 = 0; - sections->reserved2 = 0; - sections->reserved3 = 0; - - sec->filepos = sections->offset; + msect->offset = 0; + + sec->filepos = msect->offset; sec->target_index = ++target_index; - mdata->filelen += sections->size; - sections++; + mdata->filelen += msect->size; } seg->filesize = mdata->filelen - seg->fileoff; seg->vmsize = seg->filesize; @@ -1420,37 +1501,37 @@ bfd_mach_o_make_empty_symbol (bfd *abfd) static bfd_boolean bfd_mach_o_read_header (bfd *abfd, bfd_mach_o_header *header) { - unsigned char buf[32]; + struct mach_o_header_external raw; unsigned int size; bfd_vma (*get32) (const void *) = NULL; /* Just read the magic number. */ if (bfd_seek (abfd, 0, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 4, abfd) != 4) + || bfd_bread (raw.magic, sizeof (raw.magic), abfd) != 4) return FALSE; - if (bfd_getb32 (buf) == BFD_MACH_O_MH_MAGIC) + if (bfd_getb32 (raw.magic) == BFD_MACH_O_MH_MAGIC) { header->byteorder = BFD_ENDIAN_BIG; header->magic = BFD_MACH_O_MH_MAGIC; header->version = 1; get32 = bfd_getb32; } - else if (bfd_getl32 (buf) == BFD_MACH_O_MH_MAGIC) + else if (bfd_getl32 (raw.magic) == BFD_MACH_O_MH_MAGIC) { header->byteorder = BFD_ENDIAN_LITTLE; header->magic = BFD_MACH_O_MH_MAGIC; header->version = 1; get32 = bfd_getl32; } - else if (bfd_getb32 (buf) == BFD_MACH_O_MH_MAGIC_64) + else if (bfd_getb32 (raw.magic) == BFD_MACH_O_MH_MAGIC_64) { header->byteorder = BFD_ENDIAN_BIG; header->magic = BFD_MACH_O_MH_MAGIC_64; header->version = 2; get32 = bfd_getb32; } - else if (bfd_getl32 (buf) == BFD_MACH_O_MH_MAGIC_64) + else if (bfd_getl32 (raw.magic) == BFD_MACH_O_MH_MAGIC_64) { header->byteorder = BFD_ENDIAN_LITTLE; header->magic = BFD_MACH_O_MH_MAGIC_64; @@ -1468,33 +1549,67 @@ bfd_mach_o_read_header (bfd *abfd, bfd_mach_o_header *header) BFD_MACH_O_HEADER_64_SIZE : BFD_MACH_O_HEADER_SIZE; if (bfd_seek (abfd, 0, SEEK_SET) != 0 - || bfd_bread ((void *) buf, size, abfd) != size) + || bfd_bread (&raw, size, abfd) != size) return FALSE; - header->cputype = (*get32) (buf + 4); - header->cpusubtype = (*get32) (buf + 8); - header->filetype = (*get32) (buf + 12); - header->ncmds = (*get32) (buf + 16); - header->sizeofcmds = (*get32) (buf + 20); - header->flags = (*get32) (buf + 24); + header->cputype = (*get32) (raw.cputype); + header->cpusubtype = (*get32) (raw.cpusubtype); + header->filetype = (*get32) (raw.filetype); + header->ncmds = (*get32) (raw.ncmds); + header->sizeofcmds = (*get32) (raw.sizeofcmds); + header->flags = (*get32) (raw.flags); if (mach_o_wide_p (header)) - header->reserved = (*get32) (buf + 28); + header->reserved = (*get32) (raw.reserved); return TRUE; } -static asection * -bfd_mach_o_make_bfd_section (bfd *abfd, bfd_mach_o_section *section, - unsigned long prot) +bfd_boolean +bfd_mach_o_new_section_hook (bfd *abfd, asection *sec) +{ + bfd_mach_o_section *s; + + s = bfd_mach_o_get_mach_o_section (sec); + if (s == NULL) + { + flagword bfd_flags; + + s = (bfd_mach_o_section *) bfd_zalloc (abfd, sizeof (*s)); + if (s == NULL) + return FALSE; + sec->used_by_bfd = s; + s->bfdsection = sec; + + /* Create default name. */ + bfd_mach_o_convert_section_name_to_mach_o (abfd, sec, s); + + /* Create default flags. */ + bfd_flags = bfd_get_section_flags (abfd, sec); + if ((bfd_flags & SEC_CODE) == SEC_CODE) + s->flags = BFD_MACH_O_S_ATTR_PURE_INSTRUCTIONS + | BFD_MACH_O_S_ATTR_SOME_INSTRUCTIONS + | BFD_MACH_O_S_REGULAR; + else if ((bfd_flags & (SEC_ALLOC | SEC_LOAD)) == SEC_ALLOC) + s->flags = BFD_MACH_O_S_ZEROFILL; + else if (bfd_flags & SEC_DEBUGGING) + s->flags = BFD_MACH_O_S_REGULAR | BFD_MACH_O_S_ATTR_DEBUG; + else + s->flags = BFD_MACH_O_S_REGULAR; + } + + return _bfd_generic_new_section_hook (abfd, sec); +} + +static void +bfd_mach_o_init_section_from_mach_o (bfd *abfd, asection *sec, + unsigned long prot) { - asection *bfdsec; - char *sname; flagword flags; + bfd_mach_o_section *section; - bfd_mach_o_convert_section_name_to_bfd (abfd, section, &sname, &flags); - if (sname == NULL) - return NULL; + flags = bfd_get_section_flags (abfd, sec); + section = bfd_mach_o_get_mach_o_section (sec); if (flags == SEC_NO_FLAGS) { @@ -1528,103 +1643,122 @@ bfd_mach_o_make_bfd_section (bfd *abfd, bfd_mach_o_section *section, if (section->nreloc != 0) flags |= SEC_RELOC; - bfdsec = bfd_make_section_anyway_with_flags (abfd, sname, flags); - if (bfdsec == NULL) - return NULL; + bfd_set_section_flags (abfd, sec, flags); + + sec->vma = section->addr; + sec->lma = section->addr; + sec->size = section->size; + sec->filepos = section->offset; + sec->alignment_power = section->align; + sec->segment_mark = 0; + sec->reloc_count = section->nreloc; + sec->rel_filepos = section->reloff; +} - bfdsec->vma = section->addr; - bfdsec->lma = section->addr; - bfdsec->size = section->size; - bfdsec->filepos = section->offset; - bfdsec->alignment_power = section->align; - bfdsec->segment_mark = 0; - bfdsec->reloc_count = section->nreloc; - bfdsec->rel_filepos = section->reloff; +static asection * +bfd_mach_o_make_bfd_section (bfd *abfd, + const unsigned char *segname, + const unsigned char *sectname) +{ + const char *sname; + flagword flags; + + bfd_mach_o_convert_section_name_to_bfd + (abfd, (const char *)segname, (const char *)sectname, &sname, &flags); + if (sname == NULL) + return NULL; - return bfdsec; + return bfd_make_section_anyway_with_flags (abfd, sname, flags); } -static int +static asection * bfd_mach_o_read_section_32 (bfd *abfd, - bfd_mach_o_section *section, unsigned int offset, unsigned long prot) { - unsigned char buf[BFD_MACH_O_SECTION_SIZE]; + struct mach_o_section_32_external raw; + asection *sec; + bfd_mach_o_section *section; if (bfd_seek (abfd, offset, SEEK_SET) != 0 - || (bfd_bread ((void *) buf, BFD_MACH_O_SECTION_SIZE, abfd) + || (bfd_bread (&raw, BFD_MACH_O_SECTION_SIZE, abfd) != BFD_MACH_O_SECTION_SIZE)) - return -1; + return NULL; + + sec = bfd_mach_o_make_bfd_section (abfd, raw.segname, raw.sectname); + if (sec == NULL) + return NULL; - memcpy (section->sectname, buf, 16); - section->sectname[16] = '\0'; - memcpy (section->segname, buf + 16, 16); - section->segname[16] = '\0'; - section->addr = bfd_h_get_32 (abfd, buf + 32); - section->size = bfd_h_get_32 (abfd, buf + 36); - section->offset = bfd_h_get_32 (abfd, buf + 40); - section->align = bfd_h_get_32 (abfd, buf + 44); - section->reloff = bfd_h_get_32 (abfd, buf + 48); - section->nreloc = bfd_h_get_32 (abfd, buf + 52); - section->flags = bfd_h_get_32 (abfd, buf + 56); - section->reserved1 = bfd_h_get_32 (abfd, buf + 60); - section->reserved2 = bfd_h_get_32 (abfd, buf + 64); + section = bfd_mach_o_get_mach_o_section (sec); + memcpy (section->segname, raw.segname, sizeof (raw.segname)); + section->segname[BFD_MACH_O_SEGNAME_SIZE] = 0; + memcpy (section->sectname, raw.sectname, sizeof (raw.sectname)); + section->segname[BFD_MACH_O_SECTNAME_SIZE] = 0; + section->addr = bfd_h_get_32 (abfd, raw.addr); + section->size = bfd_h_get_32 (abfd, raw.size); + section->offset = bfd_h_get_32 (abfd, raw.offset); + section->align = bfd_h_get_32 (abfd, raw.align); + section->reloff = bfd_h_get_32 (abfd, raw.reloff); + section->nreloc = bfd_h_get_32 (abfd, raw.nreloc); + section->flags = bfd_h_get_32 (abfd, raw.flags); + section->reserved1 = bfd_h_get_32 (abfd, raw.reserved1); + section->reserved2 = bfd_h_get_32 (abfd, raw.reserved2); section->reserved3 = 0; - section->bfdsection = bfd_mach_o_make_bfd_section (abfd, section, prot); - if (section->bfdsection == NULL) - return -1; + bfd_mach_o_init_section_from_mach_o (abfd, sec, prot); - return 0; + return sec; } -static int +static asection * bfd_mach_o_read_section_64 (bfd *abfd, - bfd_mach_o_section *section, unsigned int offset, unsigned long prot) { - unsigned char buf[BFD_MACH_O_SECTION_64_SIZE]; + struct mach_o_section_64_external raw; + asection *sec; + bfd_mach_o_section *section; if (bfd_seek (abfd, offset, SEEK_SET) != 0 - || (bfd_bread ((void *) buf, BFD_MACH_O_SECTION_64_SIZE, abfd) + || (bfd_bread (&raw, BFD_MACH_O_SECTION_64_SIZE, abfd) != BFD_MACH_O_SECTION_64_SIZE)) - return -1; + return NULL; - memcpy (section->sectname, buf, 16); - section->sectname[16] = '\0'; - memcpy (section->segname, buf + 16, 16); - section->segname[16] = '\0'; - section->addr = bfd_h_get_64 (abfd, buf + 32); - section->size = bfd_h_get_64 (abfd, buf + 40); - section->offset = bfd_h_get_32 (abfd, buf + 48); - section->align = bfd_h_get_32 (abfd, buf + 52); - section->reloff = bfd_h_get_32 (abfd, buf + 56); - section->nreloc = bfd_h_get_32 (abfd, buf + 60); - section->flags = bfd_h_get_32 (abfd, buf + 64); - section->reserved1 = bfd_h_get_32 (abfd, buf + 68); - section->reserved2 = bfd_h_get_32 (abfd, buf + 72); - section->reserved3 = bfd_h_get_32 (abfd, buf + 76); - section->bfdsection = bfd_mach_o_make_bfd_section (abfd, section, prot); - - if (section->bfdsection == NULL) - return -1; + sec = bfd_mach_o_make_bfd_section (abfd, raw.segname, raw.sectname); + if (sec == NULL) + return NULL; - return 0; + section = bfd_mach_o_get_mach_o_section (sec); + memcpy (section->segname, raw.segname, sizeof (raw.segname)); + section->segname[BFD_MACH_O_SEGNAME_SIZE] = 0; + memcpy (section->sectname, raw.sectname, sizeof (raw.sectname)); + section->segname[BFD_MACH_O_SECTNAME_SIZE] = 0; + section->addr = bfd_h_get_64 (abfd, raw.addr); + section->size = bfd_h_get_64 (abfd, raw.size); + section->offset = bfd_h_get_32 (abfd, raw.offset); + section->align = bfd_h_get_32 (abfd, raw.align); + section->reloff = bfd_h_get_32 (abfd, raw.reloff); + section->nreloc = bfd_h_get_32 (abfd, raw.nreloc); + section->flags = bfd_h_get_32 (abfd, raw.flags); + section->reserved1 = bfd_h_get_32 (abfd, raw.reserved1); + section->reserved2 = bfd_h_get_32 (abfd, raw.reserved2); + section->reserved3 = bfd_h_get_32 (abfd, raw.reserved3); + + bfd_mach_o_init_section_from_mach_o (abfd, sec, prot); + + return sec; } -static int +static asection * bfd_mach_o_read_section (bfd *abfd, - bfd_mach_o_section *section, unsigned int offset, unsigned long prot, unsigned int wide) { if (wide) - return bfd_mach_o_read_section_64 (abfd, section, offset, prot); + return bfd_mach_o_read_section_64 (abfd, offset, prot); else - return bfd_mach_o_read_section_32 (abfd, section, offset, prot); + return bfd_mach_o_read_section_32 (abfd, offset, prot); } static int @@ -1638,7 +1772,7 @@ bfd_mach_o_read_symtab_symbol (bfd *abfd, unsigned int symwidth = wide ? BFD_MACH_O_NLIST_64_SIZE : BFD_MACH_O_NLIST_SIZE; unsigned int symoff = sym->symoff + (i * symwidth); - unsigned char buf[16]; + struct mach_o_nlist_64_external raw; unsigned char type = -1; unsigned char section = -1; short desc = -1; @@ -1649,28 +1783,30 @@ bfd_mach_o_read_symtab_symbol (bfd *abfd, BFD_ASSERT (sym->strtab != NULL); if (bfd_seek (abfd, symoff, SEEK_SET) != 0 - || bfd_bread ((void *) buf, symwidth, abfd) != symwidth) + || bfd_bread (&raw, symwidth, abfd) != symwidth) { - (*_bfd_error_handler) (_("bfd_mach_o_read_symtab_symbol: unable to read %d bytes at %lu"), - symwidth, (unsigned long) symoff); + (*_bfd_error_handler) + (_("bfd_mach_o_read_symtab_symbol: unable to read %d bytes at %lu"), + symwidth, (unsigned long) symoff); return -1; } - stroff = bfd_h_get_32 (abfd, buf); - type = bfd_h_get_8 (abfd, buf + 4); + stroff = bfd_h_get_32 (abfd, raw.n_strx); + type = bfd_h_get_8 (abfd, raw.n_type); symtype = type & BFD_MACH_O_N_TYPE; - section = bfd_h_get_8 (abfd, buf + 5); - desc = bfd_h_get_16 (abfd, buf + 6); + section = bfd_h_get_8 (abfd, raw.n_sect); + desc = bfd_h_get_16 (abfd, raw.n_desc); if (wide) - value = bfd_h_get_64 (abfd, buf + 8); + value = bfd_h_get_64 (abfd, raw.n_value); else - value = bfd_h_get_32 (abfd, buf + 8); + value = bfd_h_get_32 (abfd, raw.n_value); if (stroff >= sym->strsize) { - (*_bfd_error_handler) (_("bfd_mach_o_read_symtab_symbol: symbol name out of range (%lu >= %lu)"), - (unsigned long) stroff, - (unsigned long) sym->strsize); + (*_bfd_error_handler) + (_("bfd_mach_o_read_symtab_symbol: name out of range (%lu >= %lu)"), + (unsigned long) stroff, + (unsigned long) sym->strsize); return -1; } @@ -1830,8 +1966,11 @@ bfd_mach_o_read_symtab_symbols (bfd *abfd) unsigned long i; int ret; - if (sym->symbols) - return 0; + if (sym == NULL || sym->symbols) + { + /* Return now if there are no symbols or if already loaded. */ + return 0; + } sym->symbols = bfd_alloc (abfd, sym->nsyms * sizeof (bfd_mach_o_asymbol)); @@ -1864,18 +2003,19 @@ bfd_mach_o_read_dysymtab_symbol (bfd *abfd, { unsigned long isymoff = dysym->indirectsymoff + (i * 4); unsigned long sym_index; - unsigned char buf[4]; + unsigned char raw[4]; BFD_ASSERT (i < dysym->nindirectsyms); if (bfd_seek (abfd, isymoff, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 4, abfd) != 4) + || bfd_bread (raw, sizeof (raw), abfd) != sizeof (raw)) { - (*_bfd_error_handler) (_("bfd_mach_o_read_dysymtab_symbol: unable to read %lu bytes at %lu"), - (unsigned long) 4, isymoff); + (*_bfd_error_handler) + (_("bfd_mach_o_read_dysymtab_symbol: unable to read %lu bytes at %lu"), + (unsigned long) sizeof (raw), isymoff); return -1; } - sym_index = bfd_h_get_32 (abfd, buf); + sym_index = bfd_h_get_32 (abfd, raw); return bfd_mach_o_read_symtab_symbol (abfd, sym, s, sym_index); } @@ -1921,17 +2061,17 @@ static int bfd_mach_o_read_dylinker (bfd *abfd, bfd_mach_o_load_command *command) { bfd_mach_o_dylinker_command *cmd = &command->command.dylinker; - unsigned char buf[4]; + struct mach_o_str_command_external raw; unsigned int nameoff; BFD_ASSERT ((command->type == BFD_MACH_O_LC_ID_DYLINKER) || (command->type == BFD_MACH_O_LC_LOAD_DYLINKER)); - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 4, abfd) != 4) + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - nameoff = bfd_h_get_32 (abfd, buf + 0); + nameoff = bfd_h_get_32 (abfd, raw.str); cmd->name_offset = command->offset + nameoff; cmd->name_len = command->len - nameoff; @@ -1948,7 +2088,7 @@ static int bfd_mach_o_read_dylib (bfd *abfd, bfd_mach_o_load_command *command) { bfd_mach_o_dylib_command *cmd = &command->command.dylib; - unsigned char buf[16]; + struct mach_o_dylib_command_external raw; unsigned int nameoff; switch (command->type) @@ -1963,14 +2103,14 @@ bfd_mach_o_read_dylib (bfd *abfd, bfd_mach_o_load_command *command) return -1; } - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 16, abfd) != 16) + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - nameoff = bfd_h_get_32 (abfd, buf + 0); - cmd->timestamp = bfd_h_get_32 (abfd, buf + 4); - cmd->current_version = bfd_h_get_32 (abfd, buf + 8); - cmd->compatibility_version = bfd_h_get_32 (abfd, buf + 12); + nameoff = bfd_h_get_32 (abfd, raw.name); + cmd->timestamp = bfd_h_get_32 (abfd, raw.timestamp); + cmd->current_version = bfd_h_get_32 (abfd, raw.current_version); + cmd->compatibility_version = bfd_h_get_32 (abfd, raw.compatibility_version); cmd->name_offset = command->offset + nameoff; cmd->name_len = command->len - nameoff; @@ -1998,7 +2138,6 @@ bfd_mach_o_read_thread (bfd *abfd, bfd_mach_o_load_command *command) { bfd_mach_o_data_struct *mdata = bfd_mach_o_get_data (abfd); bfd_mach_o_thread_command *cmd = &command->command.thread; - unsigned char buf[8]; unsigned int offset; unsigned int nflavours; unsigned int i; @@ -2011,14 +2150,16 @@ bfd_mach_o_read_thread (bfd *abfd, bfd_mach_o_load_command *command) nflavours = 0; while (offset != command->len) { + struct mach_o_thread_command_external raw; + if (offset >= command->len) return -1; if (bfd_seek (abfd, command->offset + offset, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 8, abfd) != 8) + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - offset += 8 + bfd_h_get_32 (abfd, buf + 4) * 4; + offset += sizeof (raw) + bfd_h_get_32 (abfd, raw.count) * 4; nflavours++; } @@ -2033,6 +2174,8 @@ bfd_mach_o_read_thread (bfd *abfd, bfd_mach_o_load_command *command) nflavours = 0; while (offset != command->len) { + struct mach_o_thread_command_external raw; + if (offset >= command->len) return -1; @@ -2040,13 +2183,13 @@ bfd_mach_o_read_thread (bfd *abfd, bfd_mach_o_load_command *command) return -1; if (bfd_seek (abfd, command->offset + offset, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 8, abfd) != 8) + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - cmd->flavours[nflavours].flavour = bfd_h_get_32 (abfd, buf); - cmd->flavours[nflavours].offset = command->offset + offset + 8; - cmd->flavours[nflavours].size = bfd_h_get_32 (abfd, buf + 4) * 4; - offset += cmd->flavours[nflavours].size + 8; + cmd->flavours[nflavours].flavour = bfd_h_get_32 (abfd, raw.flavour); + cmd->flavours[nflavours].offset = command->offset + offset + sizeof (raw); + cmd->flavours[nflavours].size = bfd_h_get_32 (abfd, raw.count) * 4; + offset += cmd->flavours[nflavours].size + sizeof (raw); nflavours++; } @@ -2106,32 +2249,35 @@ bfd_mach_o_read_dysymtab (bfd *abfd, bfd_mach_o_load_command *command) { bfd_mach_o_dysymtab_command *cmd = &command->command.dysymtab; bfd_mach_o_data_struct *mdata = bfd_mach_o_get_data (abfd); - unsigned char buf[72]; BFD_ASSERT (command->type == BFD_MACH_O_LC_DYSYMTAB); - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 72, abfd) != 72) - return -1; + { + struct mach_o_dysymtab_command_external raw; - cmd->ilocalsym = bfd_h_get_32 (abfd, buf + 0); - cmd->nlocalsym = bfd_h_get_32 (abfd, buf + 4); - cmd->iextdefsym = bfd_h_get_32 (abfd, buf + 8); - cmd->nextdefsym = bfd_h_get_32 (abfd, buf + 12); - cmd->iundefsym = bfd_h_get_32 (abfd, buf + 16); - cmd->nundefsym = bfd_h_get_32 (abfd, buf + 20); - cmd->tocoff = bfd_h_get_32 (abfd, buf + 24); - cmd->ntoc = bfd_h_get_32 (abfd, buf + 28); - cmd->modtaboff = bfd_h_get_32 (abfd, buf + 32); - cmd->nmodtab = bfd_h_get_32 (abfd, buf + 36); - cmd->extrefsymoff = bfd_h_get_32 (abfd, buf + 40); - cmd->nextrefsyms = bfd_h_get_32 (abfd, buf + 44); - cmd->indirectsymoff = bfd_h_get_32 (abfd, buf + 48); - cmd->nindirectsyms = bfd_h_get_32 (abfd, buf + 52); - cmd->extreloff = bfd_h_get_32 (abfd, buf + 56); - cmd->nextrel = bfd_h_get_32 (abfd, buf + 60); - cmd->locreloff = bfd_h_get_32 (abfd, buf + 64); - cmd->nlocrel = bfd_h_get_32 (abfd, buf + 68); + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) + return -1; + + cmd->ilocalsym = bfd_h_get_32 (abfd, raw.ilocalsym); + cmd->nlocalsym = bfd_h_get_32 (abfd, raw.nlocalsym); + cmd->iextdefsym = bfd_h_get_32 (abfd, raw.iextdefsym); + cmd->nextdefsym = bfd_h_get_32 (abfd, raw.nextdefsym); + cmd->iundefsym = bfd_h_get_32 (abfd, raw.iundefsym); + cmd->nundefsym = bfd_h_get_32 (abfd, raw.nundefsym); + cmd->tocoff = bfd_h_get_32 (abfd, raw.tocoff); + cmd->ntoc = bfd_h_get_32 (abfd, raw.ntoc); + cmd->modtaboff = bfd_h_get_32 (abfd, raw.modtaboff); + cmd->nmodtab = bfd_h_get_32 (abfd, raw.nmodtab); + cmd->extrefsymoff = bfd_h_get_32 (abfd, raw.extrefsymoff); + cmd->nextrefsyms = bfd_h_get_32 (abfd, raw.nextrefsyms); + cmd->indirectsymoff = bfd_h_get_32 (abfd, raw.indirectsymoff); + cmd->nindirectsyms = bfd_h_get_32 (abfd, raw.nindirectsyms); + cmd->extreloff = bfd_h_get_32 (abfd, raw.extreloff); + cmd->nextrel = bfd_h_get_32 (abfd, raw.nextrel); + cmd->locreloff = bfd_h_get_32 (abfd, raw.locreloff); + cmd->nlocrel = bfd_h_get_32 (abfd, raw.nlocrel); + } if (cmd->nmodtab != 0) { @@ -2151,6 +2297,7 @@ bfd_mach_o_read_dysymtab (bfd *abfd, bfd_mach_o_load_command *command) { bfd_mach_o_dylib_module *module = &cmd->dylib_module[i]; unsigned long v; + unsigned char buf[56]; if (bfd_bread ((void *) buf, module_len, abfd) != module_len) return -1; @@ -2197,13 +2344,14 @@ bfd_mach_o_read_dysymtab (bfd *abfd, bfd_mach_o_load_command *command) for (i = 0; i < cmd->ntoc; i++) { + struct mach_o_dylib_table_of_contents_external raw; bfd_mach_o_dylib_table_of_content *toc = &cmd->dylib_toc[i]; - if (bfd_bread ((void *) buf, 8, abfd) != 8) + if (bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - toc->symbol_index = bfd_h_get_32 (abfd, buf + 0); - toc->module_index = bfd_h_get_32 (abfd, buf + 4); + toc->symbol_index = bfd_h_get_32 (abfd, raw.symbol_index); + toc->module_index = bfd_h_get_32 (abfd, raw.module_index); } } @@ -2221,12 +2369,13 @@ bfd_mach_o_read_dysymtab (bfd *abfd, bfd_mach_o_load_command *command) for (i = 0; i < cmd->nindirectsyms; i++) { + unsigned char raw[4]; unsigned int *is = &cmd->indirect_syms[i]; - if (bfd_bread ((void *) buf, 4, abfd) != 4) + if (bfd_bread (raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - *is = bfd_h_get_32 (abfd, buf + 0); + *is = bfd_h_get_32 (abfd, raw); } } @@ -2245,14 +2394,15 @@ bfd_mach_o_read_dysymtab (bfd *abfd, bfd_mach_o_load_command *command) for (i = 0; i < cmd->nextrefsyms; i++) { + unsigned char raw[4]; bfd_mach_o_dylib_reference *ref = &cmd->ext_refs[i]; - if (bfd_bread ((void *) buf, 4, abfd) != 4) + if (bfd_bread (raw, sizeof (raw), abfd) != sizeof (raw)) return -1; /* Fields isym and flags are written as bit-fields, thus we need a specific processing for endianness. */ - v = bfd_h_get_32 (abfd, buf + 0); + v = bfd_h_get_32 (abfd, raw); if (bfd_big_endian (abfd)) { ref->isym = (v >> 8) & 0xffffff; @@ -2278,18 +2428,18 @@ bfd_mach_o_read_symtab (bfd *abfd, bfd_mach_o_load_command *command) { bfd_mach_o_symtab_command *symtab = &command->command.symtab; bfd_mach_o_data_struct *mdata = bfd_mach_o_get_data (abfd); - unsigned char buf[16]; + struct mach_o_symtab_command_external raw; BFD_ASSERT (command->type == BFD_MACH_O_LC_SYMTAB); - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 16, abfd) != 16) + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - symtab->symoff = bfd_h_get_32 (abfd, buf); - symtab->nsyms = bfd_h_get_32 (abfd, buf + 4); - symtab->stroff = bfd_h_get_32 (abfd, buf + 8); - symtab->strsize = bfd_h_get_32 (abfd, buf + 12); + symtab->symoff = bfd_h_get_32 (abfd, raw.symoff); + symtab->nsyms = bfd_h_get_32 (abfd, raw.nsyms); + symtab->stroff = bfd_h_get_32 (abfd, raw.stroff); + symtab->strsize = bfd_h_get_32 (abfd, raw.strsize); symtab->symbols = NULL; symtab->strtab = NULL; @@ -2309,8 +2459,8 @@ bfd_mach_o_read_uuid (bfd *abfd, bfd_mach_o_load_command *command) BFD_ASSERT (command->type == BFD_MACH_O_LC_UUID); - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || bfd_bread ((void *) cmd->uuid, 16, abfd) != 16) + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bread (cmd->uuid, 16, abfd) != 16) return -1; return 0; @@ -2320,14 +2470,14 @@ static int bfd_mach_o_read_linkedit (bfd *abfd, bfd_mach_o_load_command *command) { bfd_mach_o_linkedit_command *cmd = &command->command.linkedit; - char buf[8]; + struct mach_o_linkedit_data_command_external raw; - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 8, abfd) != 8) + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - cmd->dataoff = bfd_get_32 (abfd, buf + 0); - cmd->datasize = bfd_get_32 (abfd, buf + 4); + cmd->dataoff = bfd_get_32 (abfd, raw.dataoff); + cmd->datasize = bfd_get_32 (abfd, raw.datasize); return 0; } @@ -2335,14 +2485,14 @@ static int bfd_mach_o_read_str (bfd *abfd, bfd_mach_o_load_command *command) { bfd_mach_o_str_command *cmd = &command->command.str; - char buf[4]; + struct mach_o_str_command_external raw; unsigned long off; - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 4, abfd) != 4) + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - off = bfd_get_32 (abfd, buf + 0); + off = bfd_get_32 (abfd, raw.str); cmd->stroff = command->offset + off; cmd->str_len = command->len - off; cmd->str = bfd_alloc (abfd, cmd->str_len); @@ -2358,96 +2508,116 @@ static int bfd_mach_o_read_dyld_info (bfd *abfd, bfd_mach_o_load_command *command) { bfd_mach_o_dyld_info_command *cmd = &command->command.dyld_info; - char buf[40]; + struct mach_o_dyld_info_command_external raw; - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || bfd_bread ((void *) buf, sizeof (buf), abfd) != sizeof (buf)) + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) return -1; - cmd->rebase_off = bfd_get_32 (abfd, buf + 0); - cmd->rebase_size = bfd_get_32 (abfd, buf + 4); - cmd->bind_off = bfd_get_32 (abfd, buf + 8); - cmd->bind_size = bfd_get_32 (abfd, buf + 12); - cmd->weak_bind_off = bfd_get_32 (abfd, buf + 16); - cmd->weak_bind_size = bfd_get_32 (abfd, buf + 20); - cmd->lazy_bind_off = bfd_get_32 (abfd, buf + 24); - cmd->lazy_bind_size = bfd_get_32 (abfd, buf + 28); - cmd->export_off = bfd_get_32 (abfd, buf + 32); - cmd->export_size = bfd_get_32 (abfd, buf + 36); + cmd->rebase_off = bfd_get_32 (abfd, raw.rebase_off); + cmd->rebase_size = bfd_get_32 (abfd, raw.rebase_size); + cmd->bind_off = bfd_get_32 (abfd, raw.bind_off); + cmd->bind_size = bfd_get_32 (abfd, raw.bind_size); + cmd->weak_bind_off = bfd_get_32 (abfd, raw.weak_bind_off); + cmd->weak_bind_size = bfd_get_32 (abfd, raw.weak_bind_size); + cmd->lazy_bind_off = bfd_get_32 (abfd, raw.lazy_bind_off); + cmd->lazy_bind_size = bfd_get_32 (abfd, raw.lazy_bind_size); + cmd->export_off = bfd_get_32 (abfd, raw.export_off); + cmd->export_size = bfd_get_32 (abfd, raw.export_size); return 0; } +static bfd_boolean +bfd_mach_o_read_version_min (bfd *abfd, bfd_mach_o_load_command *command) +{ + bfd_mach_o_version_min_command *cmd = &command->command.version_min; + struct mach_o_version_min_command_external raw; + unsigned int ver; + + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) + return FALSE; + + ver = bfd_get_32 (abfd, raw.version); + cmd->rel = ver >> 16; + cmd->maj = ver >> 8; + cmd->min = ver; + cmd->reserved = bfd_get_32 (abfd, raw.reserved); + return TRUE; +} + static int bfd_mach_o_read_segment (bfd *abfd, bfd_mach_o_load_command *command, unsigned int wide) { - unsigned char buf[64]; bfd_mach_o_segment_command *seg = &command->command.segment; unsigned long i; if (wide) { + struct mach_o_segment_command_64_external raw; + BFD_ASSERT (command->type == BFD_MACH_O_LC_SEGMENT_64); - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 64, abfd) != 64) - return -1; + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) + return -1; - memcpy (seg->segname, buf, 16); + memcpy (seg->segname, raw.segname, 16); seg->segname[16] = '\0'; - seg->vmaddr = bfd_h_get_64 (abfd, buf + 16); - seg->vmsize = bfd_h_get_64 (abfd, buf + 24); - seg->fileoff = bfd_h_get_64 (abfd, buf + 32); - seg->filesize = bfd_h_get_64 (abfd, buf + 40); - seg->maxprot = bfd_h_get_32 (abfd, buf + 48); - seg->initprot = bfd_h_get_32 (abfd, buf + 52); - seg->nsects = bfd_h_get_32 (abfd, buf + 56); - seg->flags = bfd_h_get_32 (abfd, buf + 60); + seg->vmaddr = bfd_h_get_64 (abfd, raw.vmaddr); + seg->vmsize = bfd_h_get_64 (abfd, raw.vmsize); + seg->fileoff = bfd_h_get_64 (abfd, raw.fileoff); + seg->filesize = bfd_h_get_64 (abfd, raw.filesize); + seg->maxprot = bfd_h_get_32 (abfd, raw.maxprot); + seg->initprot = bfd_h_get_32 (abfd, raw.initprot); + seg->nsects = bfd_h_get_32 (abfd, raw.nsects); + seg->flags = bfd_h_get_32 (abfd, raw.flags); } else { + struct mach_o_segment_command_32_external raw; + BFD_ASSERT (command->type == BFD_MACH_O_LC_SEGMENT); - if (bfd_seek (abfd, command->offset + 8, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 48, abfd) != 48) - return -1; + if (bfd_seek (abfd, command->offset + BFD_MACH_O_LC_SIZE, SEEK_SET) != 0 + || bfd_bread (&raw, sizeof (raw), abfd) != sizeof (raw)) + return -1; - memcpy (seg->segname, buf, 16); + memcpy (seg->segname, raw.segname, 16); seg->segname[16] = '\0'; - seg->vmaddr = bfd_h_get_32 (abfd, buf + 16); - seg->vmsize = bfd_h_get_32 (abfd, buf + 20); - seg->fileoff = bfd_h_get_32 (abfd, buf + 24); - seg->filesize = bfd_h_get_32 (abfd, buf + 28); - seg->maxprot = bfd_h_get_32 (abfd, buf + 32); - seg->initprot = bfd_h_get_32 (abfd, buf + 36); - seg->nsects = bfd_h_get_32 (abfd, buf + 40); - seg->flags = bfd_h_get_32 (abfd, buf + 44); + seg->vmaddr = bfd_h_get_32 (abfd, raw.vmaddr); + seg->vmsize = bfd_h_get_32 (abfd, raw.vmsize); + seg->fileoff = bfd_h_get_32 (abfd, raw.fileoff); + seg->filesize = bfd_h_get_32 (abfd, raw.filesize); + seg->maxprot = bfd_h_get_32 (abfd, raw.maxprot); + seg->initprot = bfd_h_get_32 (abfd, raw.initprot); + seg->nsects = bfd_h_get_32 (abfd, raw.nsects); + seg->flags = bfd_h_get_32 (abfd, raw.flags); } + seg->sect_head = NULL; + seg->sect_tail = NULL; - if (seg->nsects != 0) + for (i = 0; i < seg->nsects; i++) { - seg->sections = bfd_alloc (abfd, seg->nsects - * sizeof (bfd_mach_o_section)); - if (seg->sections == NULL) - return -1; + bfd_vma segoff; + asection *sec; - for (i = 0; i < seg->nsects; i++) - { - bfd_vma segoff; - if (wide) - segoff = command->offset + BFD_MACH_O_LC_SEGMENT_64_SIZE - + (i * BFD_MACH_O_SECTION_64_SIZE); - else - segoff = command->offset + BFD_MACH_O_LC_SEGMENT_SIZE - + (i * BFD_MACH_O_SECTION_SIZE); + if (wide) + segoff = command->offset + BFD_MACH_O_LC_SEGMENT_64_SIZE + + (i * BFD_MACH_O_SECTION_64_SIZE); + else + segoff = command->offset + BFD_MACH_O_LC_SEGMENT_SIZE + + (i * BFD_MACH_O_SECTION_SIZE); - if (bfd_mach_o_read_section - (abfd, &seg->sections[i], segoff, seg->initprot, wide) != 0) - return -1; - } + sec = bfd_mach_o_read_section (abfd, segoff, seg->initprot, wide); + if (sec == NULL) + return -1; + + bfd_mach_o_append_section_to_segment (seg, sec); } return 0; @@ -2468,17 +2638,18 @@ bfd_mach_o_read_segment_64 (bfd *abfd, bfd_mach_o_load_command *command) static int bfd_mach_o_read_command (bfd *abfd, bfd_mach_o_load_command *command) { - unsigned char buf[8]; + struct mach_o_load_command_external raw; + unsigned int cmd; /* Read command type and length. */ if (bfd_seek (abfd, command->offset, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 8, abfd) != 8) + || bfd_bread (&raw, BFD_MACH_O_LC_SIZE, abfd) != BFD_MACH_O_LC_SIZE) return -1; - command->type = bfd_h_get_32 (abfd, buf) & ~BFD_MACH_O_LC_REQ_DYLD; - command->type_required = (bfd_h_get_32 (abfd, buf) & BFD_MACH_O_LC_REQ_DYLD - ? TRUE : FALSE); - command->len = bfd_h_get_32 (abfd, buf + 4); + cmd = bfd_h_get_32 (abfd, raw.cmd); + command->type = cmd & ~BFD_MACH_O_LC_REQ_DYLD; + command->type_required = cmd & BFD_MACH_O_LC_REQ_DYLD ? TRUE : FALSE; + command->len = bfd_h_get_32 (abfd, raw.cmdsize); switch (command->type) { @@ -2523,6 +2694,7 @@ bfd_mach_o_read_command (bfd *abfd, bfd_mach_o_load_command *command) case BFD_MACH_O_LC_FVMFILE: case BFD_MACH_O_LC_PREPAGE: case BFD_MACH_O_LC_ROUTINES: + case BFD_MACH_O_LC_ROUTINES_64: break; case BFD_MACH_O_LC_SUB_FRAMEWORK: case BFD_MACH_O_LC_SUB_UMBRELLA: @@ -2545,6 +2717,7 @@ bfd_mach_o_read_command (bfd *abfd, bfd_mach_o_load_command *command) break; case BFD_MACH_O_LC_CODE_SIGNATURE: case BFD_MACH_O_LC_SEGMENT_SPLIT_INFO: + case BFD_MACH_O_LC_FUNCTION_STARTS: if (bfd_mach_o_read_linkedit (abfd, command) != 0) return -1; break; @@ -2552,6 +2725,11 @@ bfd_mach_o_read_command (bfd *abfd, bfd_mach_o_load_command *command) if (bfd_mach_o_read_dyld_info (abfd, command) != 0) return -1; break; + case BFD_MACH_O_LC_VERSION_MIN_MACOSX: + case BFD_MACH_O_LC_VERSION_MIN_IPHONEOS: + if (!bfd_mach_o_read_version_min (abfd, command)) + return -1; + break; default: (*_bfd_error_handler) (_("unable to read unknown load command 0x%lx"), (unsigned long) command->type); @@ -2566,7 +2744,7 @@ bfd_mach_o_flatten_sections (bfd *abfd) { bfd_mach_o_data_struct *mdata = bfd_mach_o_get_data (abfd); long csect = 0; - unsigned long i, j; + unsigned long i; /* Count total number of sections. */ mdata->nsects = 0; @@ -2596,12 +2774,13 @@ bfd_mach_o_flatten_sections (bfd *abfd) || mdata->commands[i].type == BFD_MACH_O_LC_SEGMENT_64) { bfd_mach_o_segment_command *seg; + bfd_mach_o_section *sec; seg = &mdata->commands[i].command.segment; BFD_ASSERT (csect + seg->nsects <= mdata->nsects); - for (j = 0; j < seg->nsects; j++) - mdata->sections[csect++] = &seg->sections[j]; + for (sec = seg->sect_head; sec != NULL; sec = sec->next) + mdata->sections[csect++] = sec; } } } @@ -2931,19 +3110,19 @@ const bfd_target * bfd_mach_o_archive_p (bfd *abfd) { mach_o_fat_data_struct *adata = NULL; - unsigned char buf[20]; + struct mach_o_fat_header_external hdr; unsigned long i; if (bfd_seek (abfd, 0, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 8, abfd) != 8) + || bfd_bread (&hdr, sizeof (hdr), abfd) != sizeof (hdr)) goto error; adata = bfd_alloc (abfd, sizeof (mach_o_fat_data_struct)); if (adata == NULL) goto error; - adata->magic = bfd_getb32 (buf); - adata->nfat_arch = bfd_getb32 (buf + 4); + adata->magic = bfd_getb32 (hdr.magic); + adata->nfat_arch = bfd_getb32 (hdr.nfat_arch); if (adata->magic != 0xcafebabe) goto error; /* Avoid matching Java bytecode files, which have the same magic number. @@ -2959,14 +3138,14 @@ bfd_mach_o_archive_p (bfd *abfd) for (i = 0; i < adata->nfat_arch; i++) { - if (bfd_seek (abfd, 8 + 20 * i, SEEK_SET) != 0 - || bfd_bread ((void *) buf, 20, abfd) != 20) + struct mach_o_fat_arch_external arch; + if (bfd_bread (&arch, sizeof (arch), abfd) != sizeof (arch)) goto error; - adata->archentries[i].cputype = bfd_getb32 (buf); - adata->archentries[i].cpusubtype = bfd_getb32 (buf + 4); - adata->archentries[i].offset = bfd_getb32 (buf + 8); - adata->archentries[i].size = bfd_getb32 (buf + 12); - adata->archentries[i].align = bfd_getb32 (buf + 16); + adata->archentries[i].cputype = bfd_getb32 (arch.cputype); + adata->archentries[i].cpusubtype = bfd_getb32 (arch.cpusubtype); + adata->archentries[i].offset = bfd_getb32 (arch.offset); + adata->archentries[i].size = bfd_getb32 (arch.size); + adata->archentries[i].align = bfd_getb32 (arch.align); } abfd->tdata.mach_o_fat_data = adata; @@ -3111,53 +3290,6 @@ bfd_mach_o_fat_extract (bfd *abfd, } int -bfd_mach_o_lookup_section (bfd *abfd, - asection *section, - bfd_mach_o_load_command **mcommand, - bfd_mach_o_section **msection) -{ - struct mach_o_data_struct *md = bfd_mach_o_get_data (abfd); - unsigned int i, j, num; - - bfd_mach_o_load_command *ncmd = NULL; - bfd_mach_o_section *nsect = NULL; - - BFD_ASSERT (mcommand != NULL); - BFD_ASSERT (msection != NULL); - - num = 0; - for (i = 0; i < md->header.ncmds; i++) - { - struct bfd_mach_o_load_command *cmd = &md->commands[i]; - struct bfd_mach_o_segment_command *seg = NULL; - - if (cmd->type != BFD_MACH_O_LC_SEGMENT - || cmd->type != BFD_MACH_O_LC_SEGMENT_64) - continue; - seg = &cmd->command.segment; - - for (j = 0; j < seg->nsects; j++) - { - struct bfd_mach_o_section *sect = &seg->sections[j]; - - if (sect->bfdsection == section) - { - if (num == 0) - { - nsect = sect; - ncmd = cmd; - } - num++; - } - } - } - - *mcommand = ncmd; - *msection = nsect; - return num; -} - -int bfd_mach_o_lookup_command (bfd *abfd, bfd_mach_o_load_command_type type, bfd_mach_o_load_command **mcommand) @@ -3247,12 +3379,24 @@ bfd_mach_o_print_flags (const bfd_mach_o_xlat_name *table, } static const char * -bfd_mach_o_get_name (const bfd_mach_o_xlat_name *table, unsigned long val) +bfd_mach_o_get_name_or_null (const bfd_mach_o_xlat_name *table, + unsigned long val) { for (; table->name; table++) if (table->val == val) return table->name; - return "*UNKNOWN*"; + return NULL; +} + +static const char * +bfd_mach_o_get_name (const bfd_mach_o_xlat_name *table, unsigned long val) +{ + const char *res = bfd_mach_o_get_name_or_null (table, val); + + if (res == NULL) + return "*UNKNOWN*"; + else + return res; } static bfd_mach_o_xlat_name bfd_mach_o_cpu_name[] = @@ -3390,9 +3534,40 @@ static bfd_mach_o_xlat_name bfd_mach_o_load_command_name[] = { "lazy_load_dylib", BFD_MACH_O_LC_LAZY_LOAD_DYLIB}, { "encryption_info", BFD_MACH_O_LC_ENCRYPTION_INFO}, { "dyld_info", BFD_MACH_O_LC_DYLD_INFO}, + { "load_upward_lib", BFD_MACH_O_LC_LOAD_UPWARD_DYLIB}, + { "version_min_macosx", BFD_MACH_O_LC_VERSION_MIN_MACOSX}, + { "version_min_iphoneos", BFD_MACH_O_LC_VERSION_MIN_IPHONEOS}, + { "function_starts", BFD_MACH_O_LC_FUNCTION_STARTS}, + { "dyld_environment", BFD_MACH_O_LC_DYLD_ENVIRONMENT}, { NULL, 0} }; +/* Get the section type from NAME. Return -1 if NAME is unknown. */ + +unsigned int +bfd_mach_o_get_section_type_from_name (const char *name) +{ + bfd_mach_o_xlat_name *x; + + for (x = bfd_mach_o_section_type_name; x->name; x++) + if (strcmp (x->name, name) == 0) + return x->val; + return (unsigned int)-1; +} + +/* Get the section attribute from NAME. Return -1 if NAME is unknown. */ + +unsigned int +bfd_mach_o_get_section_attribute_from_name (const char *name) +{ + bfd_mach_o_xlat_name *x; + + for (x = bfd_mach_o_section_attribute_name; x->name; x++) + if (strcmp (x->name, name) == 0) + return x->val; + return (unsigned int)-1; +} + static void bfd_mach_o_print_private_header (bfd *abfd, FILE *file) { @@ -3419,7 +3594,7 @@ static void bfd_mach_o_print_section_map (bfd *abfd, FILE *file) { bfd_mach_o_data_struct *mdata = bfd_mach_o_get_data (abfd); - unsigned int i, j; + unsigned int i; unsigned int sec_nbr = 0; fputs (_("Segments and Sections:\n"), file); @@ -3428,6 +3603,7 @@ bfd_mach_o_print_section_map (bfd *abfd, FILE *file) for (i = 0; i < mdata->header.ncmds; i++) { bfd_mach_o_segment_command *seg; + bfd_mach_o_section *sec; if (mdata->commands[i].type != BFD_MACH_O_LC_SEGMENT && mdata->commands[i].type != BFD_MACH_O_LC_SEGMENT_64) @@ -3444,9 +3620,9 @@ bfd_mach_o_print_section_map (bfd *abfd, FILE *file) fputc (seg->initprot & BFD_MACH_O_PROT_WRITE ? 'w' : '-', file); fputc (seg->initprot & BFD_MACH_O_PROT_EXECUTE ? 'x' : '-', file); fprintf (file, "]\n"); - for (j = 0; j < seg->nsects; j++) + + for (sec = seg->sect_head; sec != NULL; sec = sec->next) { - bfd_mach_o_section *sec = &seg->sections[j]; fprintf (file, "%02u: %-16s %-16s ", ++sec_nbr, sec->segname, sec->sectname); fprintf_vma (file, sec->addr); @@ -3512,7 +3688,7 @@ bfd_mach_o_print_segment (bfd *abfd ATTRIBUTE_UNUSED, bfd_mach_o_load_command *cmd, FILE *file) { bfd_mach_o_segment_command *seg = &cmd->command.segment; - unsigned int i; + bfd_mach_o_section *sec; fprintf (file, " name: %s\n", *seg->segname ? seg->segname : "*none*"); fprintf (file, " vmaddr: "); @@ -3529,8 +3705,8 @@ bfd_mach_o_print_segment (bfd *abfd ATTRIBUTE_UNUSED, fprintf (file, "\n"); fprintf (file, " nsects: %lu ", seg->nsects); fprintf (file, " flags: %lx\n", seg->flags); - for (i = 0; i < seg->nsects; i++) - bfd_mach_o_print_section (abfd, &seg->sections[i], file); + for (sec = seg->sect_head; sec != NULL; sec = sec->next) + bfd_mach_o_print_section (abfd, sec, file); } static void @@ -3756,9 +3932,16 @@ bfd_mach_o_bfd_print_private_bfd_data (bfd *abfd, void * ptr) for (i = 0; i < mdata->header.ncmds; i++) { bfd_mach_o_load_command *cmd = &mdata->commands[i]; + const char *cmd_name; - fprintf (file, "Load command %s:", - bfd_mach_o_get_name (bfd_mach_o_load_command_name, cmd->type)); + cmd_name = bfd_mach_o_get_name_or_null + (bfd_mach_o_load_command_name, cmd->type); + fprintf (file, "Load command "); + if (cmd_name == NULL) + fprintf (file, "0x%02x:", cmd->type); + else + fprintf (file, "%s:", cmd_name); + switch (cmd->type) { case BFD_MACH_O_LC_SEGMENT: @@ -3816,6 +3999,7 @@ bfd_mach_o_bfd_print_private_bfd_data (bfd *abfd, void * ptr) break; case BFD_MACH_O_LC_CODE_SIGNATURE: case BFD_MACH_O_LC_SEGMENT_SPLIT_INFO: + case BFD_MACH_O_LC_FUNCTION_STARTS: { bfd_mach_o_linkedit_command *linkedit = &cmd->command.linkedit; fprintf @@ -3870,8 +4054,18 @@ bfd_mach_o_bfd_print_private_bfd_data (bfd *abfd, void * ptr) fprintf (file, "\n"); bfd_mach_o_print_dyld_info (abfd, cmd, file); break; + case BFD_MACH_O_LC_VERSION_MIN_MACOSX: + case BFD_MACH_O_LC_VERSION_MIN_IPHONEOS: + { + bfd_mach_o_version_min_command *ver = &cmd->command.version_min; + + fprintf (file, " %u.%u.%u\n", ver->rel, ver->maj, ver->min); + } + break; default: fprintf (file, "\n"); + fprintf (file, " offset: 0x%08lx\n", (unsigned long)cmd->offset); + fprintf (file, " size: 0x%08lx\n", (unsigned long)cmd->len); break; } fputc ('\n', file); diff --git a/bfd/mach-o.h b/bfd/mach-o.h index d4ca600..53d97da 100644 --- a/bfd/mach-o.h +++ b/bfd/mach-o.h @@ -23,310 +23,7 @@ #define _BFD_MACH_O_H_ #include "bfd.h" - -/* Symbol n_type values. */ -#define BFD_MACH_O_N_STAB 0xe0 /* If any of these bits set, a symbolic debugging entry. */ -#define BFD_MACH_O_N_PEXT 0x10 /* Private external symbol bit. */ -#define BFD_MACH_O_N_TYPE 0x0e /* Mask for the type bits. */ -#define BFD_MACH_O_N_EXT 0x01 /* External symbol bit, set for external symbols. */ -#define BFD_MACH_O_N_UNDF 0x00 /* Undefined, n_sect == NO_SECT. */ -#define BFD_MACH_O_N_ABS 0x02 /* Absolute, n_sect == NO_SECT. */ -#define BFD_MACH_O_N_INDR 0x0a /* Indirect. */ -#define BFD_MACH_O_N_PBUD 0x0c /* Prebound undefined (defined in a dylib). */ -#define BFD_MACH_O_N_SECT 0x0e /* Defined in section number n_sect. */ - -#define BFD_MACH_O_NO_SECT 0 /* Symbol not in any section of the image. */ - -/* Symbol n_desc reference flags. */ -#define BFD_MACH_O_REFERENCE_MASK 0x0f -#define BFD_MACH_O_REFERENCE_FLAG_UNDEFINED_NON_LAZY 0x00 -#define BFD_MACH_O_REFERENCE_FLAG_UNDEFINED_LAZY 0x01 -#define BFD_MACH_O_REFERENCE_FLAG_DEFINED 0x02 -#define BFD_MACH_O_REFERENCE_FLAG_PRIVATE_DEFINED 0x03 -#define BFD_MACH_O_REFERENCE_FLAG_PRIVATE_UNDEFINED_NON_LAZY 0x04 -#define BFD_MACH_O_REFERENCE_FLAG_PRIVATE_UNDEFINED_LAZY 0x05 - -#define BFD_MACH_O_REFERENCED_DYNAMICALLY 0x10 -#define BFD_MACH_O_N_DESC_DISCARDED 0x20 -#define BFD_MACH_O_N_NO_DEAD_STRIP 0x20 -#define BFD_MACH_O_N_WEAK_REF 0x40 -#define BFD_MACH_O_N_WEAK_DEF 0x80 - -typedef enum bfd_mach_o_mach_header_magic -{ - BFD_MACH_O_MH_MAGIC = 0xfeedface, - BFD_MACH_O_MH_CIGAM = 0xcefaedfe, - BFD_MACH_O_MH_MAGIC_64 = 0xfeedfacf, - BFD_MACH_O_MH_CIGAM_64 = 0xcffaedfe -} -bfd_mach_o_mach_header_magic; - -typedef enum bfd_mach_o_ppc_thread_flavour -{ - BFD_MACH_O_PPC_THREAD_STATE = 1, - BFD_MACH_O_PPC_FLOAT_STATE = 2, - BFD_MACH_O_PPC_EXCEPTION_STATE = 3, - BFD_MACH_O_PPC_VECTOR_STATE = 4, - BFD_MACH_O_PPC_THREAD_STATE64 = 5, - BFD_MACH_O_PPC_EXCEPTION_STATE64 = 6, - BFD_MACH_O_PPC_THREAD_STATE_NONE = 7 -} -bfd_mach_o_ppc_thread_flavour; - -/* Defined in */ -typedef enum bfd_mach_o_i386_thread_flavour -{ - BFD_MACH_O_x86_THREAD_STATE32 = 1, - BFD_MACH_O_x86_FLOAT_STATE32 = 2, - BFD_MACH_O_x86_EXCEPTION_STATE32 = 3, - BFD_MACH_O_x86_THREAD_STATE64 = 4, - BFD_MACH_O_x86_FLOAT_STATE64 = 5, - BFD_MACH_O_x86_EXCEPTION_STATE64 = 6, - BFD_MACH_O_x86_THREAD_STATE = 7, - BFD_MACH_O_x86_FLOAT_STATE = 8, - BFD_MACH_O_x86_EXCEPTION_STATE = 9, - BFD_MACH_O_x86_DEBUG_STATE32 = 10, - BFD_MACH_O_x86_DEBUG_STATE64 = 11, - BFD_MACH_O_x86_DEBUG_STATE = 12, - BFD_MACH_O_x86_THREAD_STATE_NONE = 13 -} -bfd_mach_o_i386_thread_flavour; - -#define BFD_MACH_O_LC_REQ_DYLD 0x80000000 - -typedef enum bfd_mach_o_load_command_type -{ - BFD_MACH_O_LC_SEGMENT = 0x1, /* File segment to be mapped. */ - BFD_MACH_O_LC_SYMTAB = 0x2, /* Link-edit stab symbol table info (obsolete). */ - BFD_MACH_O_LC_SYMSEG = 0x3, /* Link-edit gdb symbol table info. */ - BFD_MACH_O_LC_THREAD = 0x4, /* Thread. */ - BFD_MACH_O_LC_UNIXTHREAD = 0x5, /* UNIX thread (includes a stack). */ - BFD_MACH_O_LC_LOADFVMLIB = 0x6, /* Load a fixed VM shared library. */ - BFD_MACH_O_LC_IDFVMLIB = 0x7, /* Fixed VM shared library id. */ - BFD_MACH_O_LC_IDENT = 0x8, /* Object identification information (obsolete). */ - BFD_MACH_O_LC_FVMFILE = 0x9, /* Fixed VM file inclusion. */ - BFD_MACH_O_LC_PREPAGE = 0xa, /* Prepage command (internal use). */ - BFD_MACH_O_LC_DYSYMTAB = 0xb, /* Dynamic link-edit symbol table info. */ - BFD_MACH_O_LC_LOAD_DYLIB = 0xc, /* Load a dynamically linked shared library. */ - BFD_MACH_O_LC_ID_DYLIB = 0xd, /* Dynamically linked shared lib identification. */ - BFD_MACH_O_LC_LOAD_DYLINKER = 0xe, /* Load a dynamic linker. */ - BFD_MACH_O_LC_ID_DYLINKER = 0xf, /* Dynamic linker identification. */ - BFD_MACH_O_LC_PREBOUND_DYLIB = 0x10, /* Modules prebound for a dynamically. */ - BFD_MACH_O_LC_ROUTINES = 0x11, /* Image routines. */ - BFD_MACH_O_LC_SUB_FRAMEWORK = 0x12, /* Sub framework. */ - BFD_MACH_O_LC_SUB_UMBRELLA = 0x13, /* Sub umbrella. */ - BFD_MACH_O_LC_SUB_CLIENT = 0x14, /* Sub client. */ - BFD_MACH_O_LC_SUB_LIBRARY = 0x15, /* Sub library. */ - BFD_MACH_O_LC_TWOLEVEL_HINTS = 0x16, /* Two-level namespace lookup hints. */ - BFD_MACH_O_LC_PREBIND_CKSUM = 0x17, /* Prebind checksum. */ - /* Load a dynamically linked shared library that is allowed to be - missing (weak). */ - BFD_MACH_O_LC_LOAD_WEAK_DYLIB = 0x18, - BFD_MACH_O_LC_SEGMENT_64 = 0x19, /* 64-bit segment of this file to be - mapped. */ - BFD_MACH_O_LC_ROUTINES_64 = 0x1a, /* Address of the dyld init routine - in a dylib. */ - BFD_MACH_O_LC_UUID = 0x1b, /* 128-bit UUID of the executable. */ - BFD_MACH_O_LC_RPATH = 0x1c, /* Run path addiions. */ - BFD_MACH_O_LC_CODE_SIGNATURE = 0x1d, /* Local of code signature. */ - BFD_MACH_O_LC_SEGMENT_SPLIT_INFO = 0x1e, /* Local of info to split seg. */ - BFD_MACH_O_LC_REEXPORT_DYLIB = 0x1f, /* Load and re-export lib. */ - BFD_MACH_O_LC_LAZY_LOAD_DYLIB = 0x20, /* Delay load of lib until use. */ - BFD_MACH_O_LC_ENCRYPTION_INFO = 0x21, /* Encrypted segment info. */ - BFD_MACH_O_LC_DYLD_INFO = 0x22 /* Compressed dyld information. */ -} -bfd_mach_o_load_command_type; - -#define BFD_MACH_O_CPU_IS64BIT 0x1000000 - -typedef enum bfd_mach_o_cpu_type -{ - BFD_MACH_O_CPU_TYPE_VAX = 1, - BFD_MACH_O_CPU_TYPE_MC680x0 = 6, - BFD_MACH_O_CPU_TYPE_I386 = 7, - BFD_MACH_O_CPU_TYPE_MIPS = 8, - BFD_MACH_O_CPU_TYPE_MC98000 = 10, - BFD_MACH_O_CPU_TYPE_HPPA = 11, - BFD_MACH_O_CPU_TYPE_ARM = 12, - BFD_MACH_O_CPU_TYPE_MC88000 = 13, - BFD_MACH_O_CPU_TYPE_SPARC = 14, - BFD_MACH_O_CPU_TYPE_I860 = 15, - BFD_MACH_O_CPU_TYPE_ALPHA = 16, - BFD_MACH_O_CPU_TYPE_POWERPC = 18, - BFD_MACH_O_CPU_TYPE_POWERPC_64 = (BFD_MACH_O_CPU_TYPE_POWERPC | BFD_MACH_O_CPU_IS64BIT), - BFD_MACH_O_CPU_TYPE_X86_64 = (BFD_MACH_O_CPU_TYPE_I386 | BFD_MACH_O_CPU_IS64BIT) -} -bfd_mach_o_cpu_type; - -typedef enum bfd_mach_o_cpu_subtype -{ - BFD_MACH_O_CPU_SUBTYPE_X86_ALL = 3 -} -bfd_mach_o_cpu_subtype; - -typedef enum bfd_mach_o_filetype -{ - BFD_MACH_O_MH_OBJECT = 0x01, - BFD_MACH_O_MH_EXECUTE = 0x02, - BFD_MACH_O_MH_FVMLIB = 0x03, - BFD_MACH_O_MH_CORE = 0x04, - BFD_MACH_O_MH_PRELOAD = 0x05, - BFD_MACH_O_MH_DYLIB = 0x06, - BFD_MACH_O_MH_DYLINKER = 0x07, - BFD_MACH_O_MH_BUNDLE = 0x08, - BFD_MACH_O_MH_DYLIB_STUB = 0x09, - BFD_MACH_O_MH_DSYM = 0x0a, - BFD_MACH_O_MH_KEXT_BUNDLE = 0x0b -} -bfd_mach_o_filetype; - -typedef enum bfd_mach_o_header_flags -{ - BFD_MACH_O_MH_NOUNDEFS = 0x000001, - BFD_MACH_O_MH_INCRLINK = 0x000002, - BFD_MACH_O_MH_DYLDLINK = 0x000004, - BFD_MACH_O_MH_BINDATLOAD = 0x000008, - BFD_MACH_O_MH_PREBOUND = 0x000010, - BFD_MACH_O_MH_SPLIT_SEGS = 0x000020, - BFD_MACH_O_MH_LAZY_INIT = 0x000040, - BFD_MACH_O_MH_TWOLEVEL = 0x000080, - BFD_MACH_O_MH_FORCE_FLAT = 0x000100, - BFD_MACH_O_MH_NOMULTIDEFS = 0x000200, - BFD_MACH_O_MH_NOFIXPREBINDING = 0x000400, - BFD_MACH_O_MH_PREBINDABLE = 0x000800, - BFD_MACH_O_MH_ALLMODSBOUND = 0x001000, - BFD_MACH_O_MH_SUBSECTIONS_VIA_SYMBOLS = 0x002000, - BFD_MACH_O_MH_CANONICAL = 0x004000, - BFD_MACH_O_MH_WEAK_DEFINES = 0x008000, - BFD_MACH_O_MH_BINDS_TO_WEAK = 0x010000, - BFD_MACH_O_MH_ALLOW_STACK_EXECUTION = 0x020000, - BFD_MACH_O_MH_ROOT_SAFE = 0x040000, - BFD_MACH_O_MH_SETUID_SAFE = 0x080000, - BFD_MACH_O_MH_NO_REEXPORTED_DYLIBS = 0x100000, - BFD_MACH_O_MH_PIE = 0x200000 -} -bfd_mach_o_header_flags; - -/* Constants for the type of a section. */ - -typedef enum bfd_mach_o_section_type -{ - /* Regular section. */ - BFD_MACH_O_S_REGULAR = 0x0, - - /* Zero fill on demand section. */ - BFD_MACH_O_S_ZEROFILL = 0x1, - - /* Section with only literal C strings. */ - BFD_MACH_O_S_CSTRING_LITERALS = 0x2, - - /* Section with only 4 byte literals. */ - BFD_MACH_O_S_4BYTE_LITERALS = 0x3, - - /* Section with only 8 byte literals. */ - BFD_MACH_O_S_8BYTE_LITERALS = 0x4, - - /* Section with only pointers to literals. */ - BFD_MACH_O_S_LITERAL_POINTERS = 0x5, - - /* For the two types of symbol pointers sections and the symbol stubs - section they have indirect symbol table entries. For each of the - entries in the section the indirect symbol table entries, in - corresponding order in the indirect symbol table, start at the index - stored in the reserved1 field of the section structure. Since the - indirect symbol table entries correspond to the entries in the - section the number of indirect symbol table entries is inferred from - the size of the section divided by the size of the entries in the - section. For symbol pointers sections the size of the entries in - the section is 4 bytes and for symbol stubs sections the byte size - of the stubs is stored in the reserved2 field of the section - structure. */ - - /* Section with only non-lazy symbol pointers. */ - BFD_MACH_O_S_NON_LAZY_SYMBOL_POINTERS = 0x6, - - /* Section with only lazy symbol pointers. */ - BFD_MACH_O_S_LAZY_SYMBOL_POINTERS = 0x7, - - /* Section with only symbol stubs, byte size of stub in the reserved2 - field. */ - BFD_MACH_O_S_SYMBOL_STUBS = 0x8, - - /* Section with only function pointers for initialization. */ - BFD_MACH_O_S_MOD_INIT_FUNC_POINTERS = 0x9, - - /* Section with only function pointers for termination. */ - BFD_MACH_O_S_MOD_FINI_FUNC_POINTERS = 0xa, - - /* Section contains symbols that are coalesced by the linkers. */ - BFD_MACH_O_S_COALESCED = 0xb, - - /* Zero fill on demand section (possibly larger than 4 GB). */ - BFD_MACH_O_S_GB_ZEROFILL = 0xc, - - /* Section with only pairs of function pointers for interposing. */ - BFD_MACH_O_S_INTERPOSING = 0xd, - - /* Section with only 16 byte literals. */ - BFD_MACH_O_S_16BYTE_LITERALS = 0xe, - - /* Section contains DTrace Object Format. */ - BFD_MACH_O_S_DTRACE_DOF = 0xf, - - /* Section with only lazy symbol pointers to lazy loaded dylibs. */ - BFD_MACH_O_S_LAZY_DYLIB_SYMBOL_POINTERS = 0x10 -} -bfd_mach_o_section_type; - -/* The flags field of a section structure is separated into two parts a section - type and section attributes. The section types are mutually exclusive (it - can only have one type) but the section attributes are not (it may have more - than one attribute). */ - -#define BFD_MACH_O_SECTION_TYPE_MASK 0x000000ff - -/* Constants for the section attributes part of the flags field of a section - structure. */ -#define BFD_MACH_O_SECTION_ATTRIBUTES_MASK 0xffffff00 -/* System setable attributes. */ -#define BFD_MACH_O_SECTION_ATTRIBUTES_SYS 0x00ffff00 -/* User attributes. */ -#define BFD_MACH_O_SECTION_ATTRIBUTES_USR 0xff000000 - -typedef enum bfd_mach_o_section_attribute -{ - /* Section has local relocation entries. */ - BFD_MACH_O_S_ATTR_LOC_RELOC = 0x00000100, - - /* Section has external relocation entries. */ - BFD_MACH_O_S_ATTR_EXT_RELOC = 0x00000200, - - /* Section contains some machine instructions. */ - BFD_MACH_O_S_ATTR_SOME_INSTRUCTIONS = 0x00000400, - - /* A debug section. */ - BFD_MACH_O_S_ATTR_DEBUG = 0x02000000, - - /* Used with i386 stubs. */ - BFD_MACH_O_S_SELF_MODIFYING_CODE = 0x04000000, - - /* Blocks are live if they reference live blocks. */ - BFD_MACH_O_S_ATTR_LIVE_SUPPORT = 0x08000000, - - /* No dead stripping. */ - BFD_MACH_O_S_ATTR_NO_DEAD_STRIP = 0x10000000, - - /* Section symbols can be stripped in files with MH_DYLDLINK flag. */ - BFD_MACH_O_S_ATTR_STRIP_STATIC_SYMS = 0x20000000, - - /* Section contains coalesced symbols that are not to be in the TOC of an - archive. */ - BFD_MACH_O_S_ATTR_NO_TOC = 0x40000000, - - /* Section contains only true machine instructions. */ - BFD_MACH_O_S_ATTR_PURE_INSTRUCTIONS = 0x80000000 -} -bfd_mach_o_section_attribute; +#include "mach-o/loader.h" typedef struct bfd_mach_o_header { @@ -344,14 +41,14 @@ typedef struct bfd_mach_o_header } bfd_mach_o_header; -#define BFD_MACH_O_HEADER_SIZE 28 -#define BFD_MACH_O_HEADER_64_SIZE 32 +#define BFD_MACH_O_SEGNAME_SIZE 16 +#define BFD_MACH_O_SECTNAME_SIZE 16 typedef struct bfd_mach_o_section { - asection *bfdsection; - char sectname[16 + 1]; - char segname[16 + 1]; + /* Fields present in the file. */ + char sectname[BFD_MACH_O_SECTNAME_SIZE + 1]; /* Always NUL padded. */ + char segname[BFD_MACH_O_SEGNAME_SIZE + 1]; bfd_vma addr; bfd_vma size; bfd_vma offset; @@ -362,10 +59,14 @@ typedef struct bfd_mach_o_section unsigned long reserved1; unsigned long reserved2; unsigned long reserved3; + + /* Corresponding bfd section. */ + asection *bfdsection; + + /* Simply linked list. */ + struct bfd_mach_o_section *next; } bfd_mach_o_section; -#define BFD_MACH_O_SECTION_SIZE 68 -#define BFD_MACH_O_SECTION_64_SIZE 80 typedef struct bfd_mach_o_segment_command { @@ -378,58 +79,18 @@ typedef struct bfd_mach_o_segment_command unsigned long initprot; /* Initial protection. */ unsigned long nsects; unsigned long flags; - bfd_mach_o_section *sections; + + /* Linked list of sections. */ + bfd_mach_o_section *sect_head; + bfd_mach_o_section *sect_tail; } bfd_mach_o_segment_command; -#define BFD_MACH_O_LC_SEGMENT_SIZE 56 -#define BFD_MACH_O_LC_SEGMENT_64_SIZE 72 /* Protection flags. */ #define BFD_MACH_O_PROT_READ 0x01 #define BFD_MACH_O_PROT_WRITE 0x02 #define BFD_MACH_O_PROT_EXECUTE 0x04 -/* Generic relocation types (used by i386). */ -#define BFD_MACH_O_GENERIC_RELOC_VANILLA 0 -#define BFD_MACH_O_GENERIC_RELOC_PAIR 1 -#define BFD_MACH_O_GENERIC_RELOC_SECTDIFF 2 -#define BFD_MACH_O_GENERIC_RELOC_PB_LA_PTR 3 -#define BFD_MACH_O_GENERIC_RELOC_LOCAL_SECTDIFF 4 - -/* X86-64 relocations. */ -#define BFD_MACH_O_X86_64_RELOC_UNSIGNED 0 /* Absolute addresses. */ -#define BFD_MACH_O_X86_64_RELOC_SIGNED 1 /* 32-bit disp. */ -#define BFD_MACH_O_X86_64_RELOC_BRANCH 2 /* 32-bit pcrel disp. */ -#define BFD_MACH_O_X86_64_RELOC_GOT_LOAD 3 /* Movq load of a GOT entry. */ -#define BFD_MACH_O_X86_64_RELOC_GOT 4 /* GOT reference. */ -#define BFD_MACH_O_X86_64_RELOC_SUBTRACTOR 5 /* Symbol difference. */ -#define BFD_MACH_O_X86_64_RELOC_SIGNED_1 6 /* 32-bit signed disp -1. */ -#define BFD_MACH_O_X86_64_RELOC_SIGNED_2 7 /* 32-bit signed disp -2. */ -#define BFD_MACH_O_X86_64_RELOC_SIGNED_4 8 /* 32-bit signed disp -4. */ - -/* Size of a relocation entry. */ -#define BFD_MACH_O_RELENT_SIZE 8 - -/* Fields for a normal (non-scattered) entry. */ -#define BFD_MACH_O_R_PCREL 0x01000000 -#define BFD_MACH_O_GET_R_LENGTH(s) (((s) >> 25) & 0x3) -#define BFD_MACH_O_R_EXTERN 0x08000000 -#define BFD_MACH_O_GET_R_TYPE(s) (((s) >> 28) & 0x0f) -#define BFD_MACH_O_GET_R_SYMBOLNUM(s) ((s) & 0x00ffffff) -#define BFD_MACH_O_SET_R_LENGTH(l) (((l) & 0x3) << 25) -#define BFD_MACH_O_SET_R_TYPE(t) (((t) & 0xf) << 28) -#define BFD_MACH_O_SET_R_SYMBOLNUM(s) ((s) & 0x00ffffff) - -/* Fields for a scattered entry. */ -#define BFD_MACH_O_SR_SCATTERED 0x80000000 -#define BFD_MACH_O_SR_PCREL 0x40000000 -#define BFD_MACH_O_GET_SR_LENGTH(s) (((s) >> 28) & 0x3) -#define BFD_MACH_O_GET_SR_TYPE(s) (((s) >> 24) & 0x0f) -#define BFD_MACH_O_GET_SR_ADDRESS(s) ((s) & 0x00ffffff) -#define BFD_MACH_O_SET_SR_LENGTH(l) (((l) & 0x3) << 28) -#define BFD_MACH_O_SET_SR_TYPE(t) (((t) & 0xf) << 24) -#define BFD_MACH_O_SET_SR_ADDRESS(s) ((s) & 0x00ffffff) - /* Expanded internal representation of a relocation entry. */ typedef struct bfd_mach_o_reloc_info { @@ -454,8 +115,6 @@ typedef struct bfd_mach_o_asymbol unsigned short n_desc; } bfd_mach_o_asymbol; -#define BFD_MACH_O_NLIST_SIZE 12 -#define BFD_MACH_O_NLIST_64_SIZE 16 typedef struct bfd_mach_o_symtab_command { @@ -562,8 +221,6 @@ typedef struct bfd_mach_o_dylib_module bfd_vma objc_module_info_addr; } bfd_mach_o_dylib_module; -#define BFD_MACH_O_DYLIB_MODULE_SIZE 52 -#define BFD_MACH_O_DYLIB_MODULE_64_SIZE 56 typedef struct bfd_mach_o_dylib_table_of_content { @@ -574,7 +231,6 @@ typedef struct bfd_mach_o_dylib_table_of_content unsigned long module_index; } bfd_mach_o_dylib_table_of_content; -#define BFD_MACH_O_TABLE_OF_CONTENT_SIZE 8 typedef struct bfd_mach_o_dylib_reference { @@ -806,6 +462,15 @@ typedef struct bfd_mach_o_dyld_info_command } bfd_mach_o_dyld_info_command; +typedef struct bfd_mach_o_version_min_command +{ + unsigned char rel; + unsigned char maj; + unsigned char min; + unsigned int reserved; +} +bfd_mach_o_version_min_command; + typedef struct bfd_mach_o_load_command { bfd_mach_o_load_command_type type; @@ -825,6 +490,7 @@ typedef struct bfd_mach_o_load_command bfd_mach_o_linkedit_command linkedit; bfd_mach_o_str_command str; bfd_mach_o_dyld_info_command dyld_info; + bfd_mach_o_version_min_command version_min; } command; } @@ -846,7 +512,7 @@ typedef struct mach_o_data_struct ufile_ptr filelen; /* As symtab is referenced by other load command, it is handy to have - a direct access to it. Also it is not clearly stated, only one symtab + a direct access to it. Although it is not clearly stated, only one symtab is expected. */ bfd_mach_o_symtab_command *symtab; bfd_mach_o_dysymtab_command *dysymtab; @@ -868,6 +534,10 @@ bfd_mach_o_backend_data; #define bfd_mach_o_get_backend_data(abfd) \ ((bfd_mach_o_backend_data*)(abfd)->xvec->backend_data) +/* Get the Mach-O header for section SEC. */ +#define bfd_mach_o_get_mach_o_section(sec) \ + ((bfd_mach_o_section *)(sec)->used_by_bfd) + bfd_boolean bfd_mach_o_valid (bfd *); int bfd_mach_o_read_dysymtab_symbol (bfd *, bfd_mach_o_dysymtab_command *, bfd_mach_o_symtab_command *, bfd_mach_o_asymbol *, unsigned long); int bfd_mach_o_scan_start_address (bfd *); @@ -879,8 +549,8 @@ const bfd_target *bfd_mach_o_archive_p (bfd *); bfd *bfd_mach_o_openr_next_archived_file (bfd *, bfd *); bfd_boolean bfd_mach_o_set_arch_mach (bfd *, enum bfd_architecture, unsigned long); -int bfd_mach_o_lookup_section (bfd *, asection *, bfd_mach_o_load_command **, bfd_mach_o_section **); int bfd_mach_o_lookup_command (bfd *, bfd_mach_o_load_command_type, bfd_mach_o_load_command **); +bfd_boolean bfd_mach_o_new_section_hook (bfd *, asection *); bfd_boolean bfd_mach_o_write_contents (bfd *); bfd_boolean bfd_mach_o_bfd_copy_private_symbol_data (bfd *, asymbol *, bfd *, asymbol *); @@ -913,6 +583,11 @@ bfd_boolean bfd_mach_o_set_section_contents (bfd *, asection *, const void *, file_ptr, bfd_size_type); unsigned int bfd_mach_o_version (bfd *); +unsigned int bfd_mach_o_get_section_type_from_name (const char *); +unsigned int bfd_mach_o_get_section_attribute_from_name (const char *); +void bfd_mach_o_normalize_section_name (const char *, const char *, + const char **, flagword *); + extern const bfd_target mach_o_fat_vec; #endif /* _BFD_MACH_O_H_ */ diff --git a/bfd/makefile.vms b/bfd/makefile.vms index fd94581..3c7f721 100644 --- a/bfd/makefile.vms +++ b/bfd/makefile.vms @@ -9,7 +9,7 @@ ifeq ($(ARCH),IA64) HOSTFILE=alphavms.h -OBJS:=cpu-ia64.obj,elf64-ia64.obj,\ +OBJS:=cpu-ia64.obj,elf64-ia64.obj,elfxx-ia64.obj,elf64-ia64.obj,\ vms-misc.obj,vms-lib.obj,elf-strtab.obj,corefile.obj,stabs.obj,\ merge.obj,elf-eh-frame.obj,elflink.obj,elf-attrs.obj,dwarf1.obj,elf64.obj DEFS=SELECT_VECS="&bfd_elf64_ia64_vms_vec",\ @@ -20,11 +20,6 @@ HOSTFILE=alphavms.h OBJS:=vms-alpha.obj,vms-lib.obj,vms-misc.obj,cpu-alpha.obj DEFS=SELECT_VECS="&vms_alpha_vec",SELECT_ARCHITECTURES="&bfd_alpha_arch" endif -ifeq ($(ARCH),VAX) -HOSTFILE=vaxvms.h -OBJS:=vms.obj,vms-hdr.obj,vms-gsd.obj,vms-tir.obj,vms-misc.obj,cpu-vax.obj -DEFS=SELECT_VECS="&vms_vax_vec",SELECT_ARCHITECTURES="&bfd_vax_arch" -endif OBJS:=$(OBJS),archive.obj,archive64.obj,archures.obj,bfd.obj,bfdio.obj,\ binary.obj,cache.obj,coffgen.obj,compress.obj,corefile.obj,dwarf2.obj,\ diff --git a/bfd/mipsbsd.c b/bfd/mipsbsd.c index 004ef6e..915e7bf 100644 --- a/bfd/mipsbsd.c +++ b/bfd/mipsbsd.c @@ -1,6 +1,6 @@ /* BFD backend for MIPS BSD (a.out) binaries. Copyright 1993, 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, - 2005, 2007, 2009 Free Software Foundation, Inc. + 2005, 2007, 2009, 2011 Free Software Foundation, Inc. Written by Ralph Campbell. This file is part of BFD, the Binary File Descriptor library. @@ -426,6 +426,7 @@ const bfd_target aout_mips_little_vec = MY_symbol_leading_char, ' ', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ @@ -467,6 +468,7 @@ const bfd_target aout_mips_big_vec = MY_symbol_leading_char, ' ', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ diff --git a/bfd/mmo.c b/bfd/mmo.c index 8c72788..dc45f31 100644 --- a/bfd/mmo.c +++ b/bfd/mmo.c @@ -1,5 +1,5 @@ /* BFD back-end for mmo objects (MMIX-specific object-format). - Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010 + Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Hans-Peter Nilsson (hp@bitrange.com). Infrastructure and other bits originally copied from srec.c and @@ -3190,6 +3190,7 @@ mmo_write_object_contents (bfd *abfd) #define mmo_bfd_get_relocated_section_contents \ bfd_generic_get_relocated_section_contents #define mmo_bfd_gc_sections bfd_generic_gc_sections +#define mmo_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define mmo_bfd_link_hash_table_create _bfd_generic_link_hash_table_create #define mmo_bfd_link_hash_table_free _bfd_generic_link_hash_table_free #define mmo_bfd_link_add_symbols _bfd_generic_link_add_symbols @@ -3238,6 +3239,7 @@ const bfd_target bfd_mmo_vec = 0, /* leading underscore */ ' ', /* ar_pad_char */ 16, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ diff --git a/bfd/netbsd-core.c b/bfd/netbsd-core.c index b36e3af..bc97742 100644 --- a/bfd/netbsd-core.c +++ b/bfd/netbsd-core.c @@ -281,6 +281,7 @@ const bfd_target netbsd_core_vec = 0, /* Symbol prefix. */ ' ', /* ar_pad_char. */ 16, /* ar_max_namelen. */ + 0, /* Match priority. */ NO_GET64, NO_GETS64, NO_PUT64, /* 64 bit data. */ NO_GET, NO_GETS, NO_PUT, /* 32 bit data. */ NO_GET, NO_GETS, NO_PUT, /* 16 bit data. */ diff --git a/bfd/netbsd.h b/bfd/netbsd.h index a117249..5f0303a 100644 --- a/bfd/netbsd.h +++ b/bfd/netbsd.h @@ -1,6 +1,6 @@ /* BFD back-end definitions used by all NetBSD targets. Copyright 1990, 1991, 1992, 1994, 1995, 1996, 1997, 1998, 2000, 2002, - 2005, 2007 Free Software Foundation, Inc. + 2005, 2007, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -105,10 +105,10 @@ MY (write_object_contents) (bfd *abfd) break; } - /* The NetBSD magic number is always big-endian */ + /* The NetBSD magic number is always big-endian. */ #ifndef TARGET_IS_BIG_ENDIAN_P /* XXX aren't there any macro to change byteorder of a word independent of - the host's or target's endianesses? */ + the host's or target's endiannesses? */ execp->a_info = (execp->a_info & 0xff) << 24 | (execp->a_info & 0xff00) << 8 | (execp->a_info & 0xff0000) >> 8 | (execp->a_info & 0xff000000) >> 24; diff --git a/bfd/nlm-target.h b/bfd/nlm-target.h index add6937..9a3b7be 100644 --- a/bfd/nlm-target.h +++ b/bfd/nlm-target.h @@ -1,6 +1,6 @@ /* Target definitions for 32/64-bit NLM (NetWare Loadable Module) Copyright 1993, 1994, 1998, 1999, 2000, 2001, 2002, 2003, 2004, - 2005, 2007, 2009 Free Software Foundation, Inc. + 2005, 2007, 2009, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -45,6 +45,7 @@ #define nlm_bfd_get_relocated_section_contents bfd_generic_get_relocated_section_contents #define nlm_bfd_relax_section bfd_generic_relax_section #define nlm_bfd_gc_sections bfd_generic_gc_sections +#define nlm_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define nlm_bfd_merge_sections bfd_generic_merge_sections #define nlm_bfd_is_group_section bfd_generic_is_group_section #define nlm_bfd_discard_group bfd_generic_discard_group @@ -109,6 +110,7 @@ const bfd_target TARGET_BIG_SYM = of the archiver and should be independently tunable. This value is a WAG (wild a** guess). */ 15, + 0, /* match priority. */ /* Routines to byte-swap various sized integers from the data sections. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, @@ -202,6 +204,7 @@ const bfd_target TARGET_LITTLE_SYM = of the archiver and should be independently tunable. This value is a WAG (wild a** guess). */ 15, + 0, /* match priority. */ /* Routines to byte-swap various sized integers from the data sections. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, diff --git a/bfd/nlmcode.h b/bfd/nlmcode.h index 21d2236..ba0c9c6 100644 --- a/bfd/nlmcode.h +++ b/bfd/nlmcode.h @@ -1,6 +1,6 @@ /* NLM (NetWare Loadable Module) executable support for BFD. Copyright 1993, 1994, 1995, 1998, 1999, 2000, 2001, 2002, 2003, 2004, - 2005, 2006, 2007 Free Software Foundation, Inc. + 2005, 2006, 2007, 2011 Free Software Foundation, Inc. Written by Fred Fish @ Cygnus Support, using ELF support as the template. @@ -491,7 +491,7 @@ nlm_object_p (bfd *abfd) NLM_SIGNATURE_SIZE) != 0) goto got_wrong_format_error; - /* There's no supported way to discover the endianess of an NLM, so test for + /* There's no supported way to discover the endianness of an NLM, so test for a sane version number after doing byte swapping appropriate for this XVEC. (Hack alert!) */ if (i_fxdhdrp->version > 0xFFFF) diff --git a/bfd/oasys.c b/bfd/oasys.c index 1f51449..11d2440 100644 --- a/bfd/oasys.c +++ b/bfd/oasys.c @@ -1,6 +1,6 @@ /* BFD back-end for oasys objects. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2001, - 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010 + 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Steve Chamberlain of Cygnus Support, . @@ -1196,6 +1196,7 @@ oasys_sizeof_headers (bfd *abfd ATTRIBUTE_UNUSED, #define oasys_bfd_get_relocated_section_contents bfd_generic_get_relocated_section_contents #define oasys_bfd_relax_section bfd_generic_relax_section #define oasys_bfd_gc_sections bfd_generic_gc_sections +#define oasys_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define oasys_bfd_merge_sections bfd_generic_merge_sections #define oasys_bfd_is_group_section bfd_generic_is_group_section #define oasys_bfd_discard_group bfd_generic_discard_group @@ -1224,6 +1225,7 @@ const bfd_target oasys_vec = 0, /* Leading underscore. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/bfd/opncls.c b/bfd/opncls.c index 4043200..9d33f39 100644 --- a/bfd/opncls.c +++ b/bfd/opncls.c @@ -525,7 +525,9 @@ opncls_bmmap (struct bfd *abfd ATTRIBUTE_UNUSED, bfd_size_type len ATTRIBUTE_UNUSED, int prot ATTRIBUTE_UNUSED, int flags ATTRIBUTE_UNUSED, - file_ptr offset ATTRIBUTE_UNUSED) + file_ptr offset ATTRIBUTE_UNUSED, + void **map_addr ATTRIBUTE_UNUSED, + bfd_size_type *map_len ATTRIBUTE_UNUSED) { return (void *) -1; } diff --git a/bfd/osf-core.c b/bfd/osf-core.c index 0ebbd1d..d613bdb 100644 --- a/bfd/osf-core.c +++ b/bfd/osf-core.c @@ -1,6 +1,6 @@ /* BFD back-end for OSF/1 core files. Copyright 1993, 1994, 1995, 1998, 1999, 2001, 2002, 2003, 2004, 2005, 2006, - 2007 Free Software Foundation, Inc. + 2007, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -198,9 +198,10 @@ const bfd_target osf_core_vec = HAS_LINENO | HAS_DEBUG | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED), (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */ - 0, /* symbol prefix */ - ' ', /* ar_pad_char */ - 16, /* ar_max_namelen */ + 0, /* symbol prefix */ + ' ', /* ar_pad_char */ + 16, /* ar_max_namelen */ + 0, /* match priority. */ NO_GET64, NO_GETS64, NO_PUT64, /* 64 bit data */ NO_GET, NO_GETS, NO_PUT, /* 32 bit data */ NO_GET, NO_GETS, NO_PUT, /* 16 bit data */ diff --git a/bfd/pdp11.c b/bfd/pdp11.c index 3821037..e815a43 100644 --- a/bfd/pdp11.c +++ b/bfd/pdp11.c @@ -1,5 +1,5 @@ /* BFD back-end for PDP-11 a.out binaries. - Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010 + Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -2892,8 +2892,9 @@ aout_link_includes_newfunc (struct bfd_hash_entry *entry, } static bfd_boolean -aout_link_write_other_symbol (struct aout_link_hash_entry *h, void * data) +aout_link_write_other_symbol (struct bfd_hash_entry *bh, void *data) { + struct aout_link_hash_entry *h = (struct aout_link_hash_entry *) bh; struct aout_final_link_info *finfo = (struct aout_final_link_info *) data; bfd *output_bfd; int type; @@ -3056,7 +3057,7 @@ aout_link_reloc_link_order (struct aout_final_link_info *finfo, symbol. */ h->indx = -2; h->written = FALSE; - if (! aout_link_write_other_symbol (h, (void *) finfo)) + if (!aout_link_write_other_symbol (&h->root.root, finfo)) return FALSE; r_index = h->indx; } @@ -3335,8 +3336,8 @@ pdp11_aout_link_input_section (struct aout_final_link_info *finfo, { h->indx = -2; h->written = FALSE; - if (! aout_link_write_other_symbol (h, - (void *) finfo)) + if (!aout_link_write_other_symbol (&h->root.root, + finfo)) return FALSE; } r_index = h->indx; @@ -3799,7 +3800,7 @@ NAME (aout, final_link) (bfd *abfd, h = aout_link_hash_lookup (aout_hash_table (info), "__DYNAMIC", FALSE, FALSE, FALSE); if (h != NULL) - aout_link_write_other_symbol (h, &aout_info); + aout_link_write_other_symbol (&h->root.root, &aout_info); } /* The most time efficient way to do the link would be to read all @@ -3871,9 +3872,9 @@ NAME (aout, final_link) (bfd *abfd, } /* Write out any symbols that we have not already written out. */ - aout_link_hash_traverse (aout_hash_table (info), - aout_link_write_other_symbol, - (void *) &aout_info); + bfd_hash_traverse (&info->hash->table, + aout_link_write_other_symbol, + &aout_info); /* Now handle any relocs we were asked to create by the linker. These did not come from any input file. We must do these after @@ -4511,6 +4512,7 @@ const bfd_target MY (vec) = MY_symbol_leading_char, AR_PAD_CHAR, /* AR_pad_char. */ 15, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getp32, bfd_getp_signed_32, bfd_putp32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* Data. */ diff --git a/bfd/pe-mips.c b/bfd/pe-mips.c index 42e4e83..2025e7d 100644 --- a/bfd/pe-mips.c +++ b/bfd/pe-mips.c @@ -1,6 +1,6 @@ /* BFD back-end for MIPS PE COFF files. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010 + 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Modified from coff-i386.c by DJ Delorie, dj@cygnus.com @@ -890,6 +890,7 @@ const bfd_target #endif '/', /* AR_pad_char. */ 15, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, diff --git a/bfd/pef.c b/bfd/pef.c index dcfda05..d4ad33a 100644 --- a/bfd/pef.c +++ b/bfd/pef.c @@ -48,6 +48,7 @@ #define bfd_pef_bfd_get_relocated_section_contents bfd_generic_get_relocated_section_contents #define bfd_pef_bfd_relax_section bfd_generic_relax_section #define bfd_pef_bfd_gc_sections bfd_generic_gc_sections +#define bfd_pef_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define bfd_pef_bfd_merge_sections bfd_generic_merge_sections #define bfd_pef_bfd_is_group_section bfd_generic_is_group_section #define bfd_pef_bfd_discard_group bfd_generic_discard_group @@ -1015,6 +1016,7 @@ const bfd_target pef_vec = 0, /* Symbol_leading_char. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ @@ -1167,6 +1169,7 @@ const bfd_target pef_xlib_vec = 0, /* Symbol_leading_char. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/bfd/peicode.h b/bfd/peicode.h index bca644d..5d10029 100644 --- a/bfd/peicode.h +++ b/bfd/peicode.h @@ -884,7 +884,11 @@ pe_ILF_build_a_bfd (bfd * abfd, if (import_name_type != IMPORT_NAME) { char c = symbol[0]; - if (c == '_' || c == '@' || c == '?') + + /* Check that we don't remove for targets with empty + USER_LABEL_PREFIX the leading underscore. */ + if ((c == '_' && abfd->xvec->symbol_leading_char != 0) + || c == '@' || c == '?') symbol++; } diff --git a/bfd/plugin.c b/bfd/plugin.c index dde61c8..064e273 100644 --- a/bfd/plugin.c +++ b/bfd/plugin.c @@ -1,5 +1,5 @@ /* Plugin support for BFD. - Copyright 2009 + Copyright 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -63,6 +63,7 @@ #define bfd_plugin_bfd_final_link _bfd_generic_final_link #define bfd_plugin_bfd_link_split_section _bfd_generic_link_split_section #define bfd_plugin_bfd_gc_sections bfd_generic_gc_sections +#define bfd_plugin_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define bfd_plugin_bfd_merge_sections bfd_generic_merge_sections #define bfd_plugin_bfd_is_group_section bfd_generic_is_group_section #define bfd_plugin_bfd_discard_group bfd_generic_discard_group @@ -478,6 +479,7 @@ const bfd_target plugin_vec = 0, /* symbol_leading_char. */ '/', /* ar_pad_char. */ 15, /* ar_max_namelen. */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, diff --git a/bfd/po/.cvsignore b/bfd/po/.cvsignore deleted file mode 100644 index becd153..0000000 --- a/bfd/po/.cvsignore +++ /dev/null @@ -1 +0,0 @@ -*.gmo diff --git a/bfd/po/SRC-POTFILES.in b/bfd/po/SRC-POTFILES.in index 729b704..a30fa3c 100644 --- a/bfd/po/SRC-POTFILES.in +++ b/bfd/po/SRC-POTFILES.in @@ -122,6 +122,8 @@ cpu-tic4x.c cpu-tic54x.c cpu-tic6x.c cpu-tic80.c +cpu-tilegx.c +cpu-tilepro.c cpu-v850.c cpu-vax.c cpu-w65.c @@ -201,6 +203,8 @@ elf32-sh64.c elf32-sparc.c elf32-spu.c elf32-tic6x.c +elf32-tilegx.c +elf32-tilepro.c elf32-v850.c elf32-vax.c elf32-xc16x.c @@ -217,14 +221,17 @@ elf64-ppc.c elf64-s390.c elf64-sh64.c elf64-sparc.c +elf64-tilegx.c elf64-x86-64.c elf64.c elfcode.h elfcore.h elflink.c elfn32-mips.c +elfxx-ia64.c elfxx-mips.c elfxx-sparc.c +elfxx-tilegx.c epoc-pe-arm.c epoc-pei-arm.c format.c @@ -319,6 +326,7 @@ ppcboot.c reloc.c reloc16.c riscix.c +rs6000-core.c sco5-core.c section.c simple.c @@ -345,7 +353,6 @@ vms-alpha.c vms-lib.c vms-misc.c vms.h -xcoff-target.h xcofflink.c xsym.c xsym.h diff --git a/bfd/po/bfd.pot b/bfd/po/bfd.pot index b419350..38ce82f 100644 --- a/bfd/po/bfd.pot +++ b/bfd/po/bfd.pot @@ -8,10 +8,11 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" -"POT-Creation-Date: 2010-11-05 10:27+0100\n" +"POT-Creation-Date: 2011-06-02 14:25+0100\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" +"Language: \n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=CHARSET\n" "Content-Transfer-Encoding: 8bit\n" @@ -44,132 +45,132 @@ msgid "" "%s: can not represent section for symbol `%s' in a.out object file format" msgstr "" -#: aoutx.h:1579 vms-alpha.c:7649 +#: aoutx.h:1579 vms-alpha.c:7668 msgid "*unknown*" msgstr "" -#: aoutx.h:4007 aoutx.h:4333 +#: aoutx.h:4017 aoutx.h:4343 msgid "%P: %B: unexpected relocation type\n" msgstr "" -#: aoutx.h:5364 +#: aoutx.h:5374 #, c-format msgid "%s: relocatable link from %s to %s not supported" msgstr "" -#: archive.c:2125 +#: archive.c:2194 msgid "Warning: writing archive was slow: rewriting timestamp\n" msgstr "" -#: archive.c:2416 +#: archive.c:2482 msgid "Reading archive file mod timestamp" msgstr "" -#: archive.c:2440 +#: archive.c:2506 msgid "Writing updated armap timestamp" msgstr "" -#: bfd.c:395 +#: bfd.c:398 msgid "No error" msgstr "" -#: bfd.c:396 +#: bfd.c:399 msgid "System call error" msgstr "" -#: bfd.c:397 +#: bfd.c:400 msgid "Invalid bfd target" msgstr "" -#: bfd.c:398 +#: bfd.c:401 msgid "File in wrong format" msgstr "" -#: bfd.c:399 +#: bfd.c:402 msgid "Archive object file in wrong format" msgstr "" -#: bfd.c:400 +#: bfd.c:403 msgid "Invalid operation" msgstr "" -#: bfd.c:401 +#: bfd.c:404 msgid "Memory exhausted" msgstr "" -#: bfd.c:402 +#: bfd.c:405 msgid "No symbols" msgstr "" -#: bfd.c:403 +#: bfd.c:406 msgid "Archive has no index; run ranlib to add one" msgstr "" -#: bfd.c:404 +#: bfd.c:407 msgid "No more archived files" msgstr "" -#: bfd.c:405 +#: bfd.c:408 msgid "Malformed archive" msgstr "" -#: bfd.c:406 +#: bfd.c:409 msgid "File format not recognized" msgstr "" -#: bfd.c:407 +#: bfd.c:410 msgid "File format is ambiguous" msgstr "" -#: bfd.c:408 +#: bfd.c:411 msgid "Section has no contents" msgstr "" -#: bfd.c:409 +#: bfd.c:412 msgid "Nonrepresentable section on output" msgstr "" -#: bfd.c:410 +#: bfd.c:413 msgid "Symbol needs debug section which does not exist" msgstr "" -#: bfd.c:411 +#: bfd.c:414 msgid "Bad value" msgstr "" -#: bfd.c:412 +#: bfd.c:415 msgid "File truncated" msgstr "" -#: bfd.c:413 +#: bfd.c:416 msgid "File too big" msgstr "" -#: bfd.c:414 +#: bfd.c:417 #, c-format msgid "Error reading %s: %s" msgstr "" -#: bfd.c:415 +#: bfd.c:418 msgid "#" msgstr "" -#: bfd.c:939 +#: bfd.c:945 #, c-format msgid "BFD %s assertion fail %s:%d" msgstr "" -#: bfd.c:951 +#: bfd.c:957 #, c-format msgid "BFD %s internal error, aborting at %s line %d in %s\n" msgstr "" -#: bfd.c:955 +#: bfd.c:961 #, c-format msgid "BFD %s internal error, aborting at %s line %d\n" msgstr "" -#: bfd.c:957 +#: bfd.c:963 msgid "Please report this bug.\n" msgstr "" @@ -188,9 +189,9 @@ msgstr "" msgid "Warning: Writing section `%s' to huge (ie negative) file offset 0x%lx." msgstr "" -#: bout.c:1146 elf-m10300.c:2063 elf32-avr.c:1640 elf32-frv.c:5740 -#: elfxx-sparc.c:2795 reloc.c:5646 reloc16.c:162 elf32-ia64.c:842 -#: elf64-ia64.c:842 +#: bout.c:1146 elf-m10300.c:2075 elf32-avr.c:1654 elf32-frv.c:5731 +#: elfxx-sparc.c:2796 reloc.c:5677 reloc16.c:162 elf32-ia64.c:360 +#: elf64-ia64.c:360 msgid "%P%F: --relax and -r may not be used together\n" msgstr "" @@ -224,8 +225,8 @@ msgstr "" msgid "%B: unsupported relocation: ALPHA_R_GPRELLOW" msgstr "" -#: coff-alpha.c:1575 elf32-m32r.c:2493 elf64-alpha.c:3991 elf64-alpha.c:4140 -#: elf32-ia64.c:4582 elf64-ia64.c:4582 +#: coff-alpha.c:1575 elf32-m32r.c:2493 elf64-alpha.c:4079 elf64-alpha.c:4228 +#: elf32-ia64.c:3845 elf64-ia64.c:3845 msgid "%B: unknown relocation type %d" msgstr "" @@ -239,7 +240,7 @@ msgstr "" msgid "%B: unable to find ARM glue '%s' for `%s'" msgstr "" -#: coff-arm.c:1369 elf32-arm.c:6501 +#: coff-arm.c:1369 elf32-arm.c:6980 #, c-format msgid "" "%B(%s): warning: interworking not enabled.\n" @@ -254,7 +255,7 @@ msgid "" " consider relinking with --support-old-code enabled" msgstr "" -#: coff-arm.c:1754 coff-tic80.c:695 cofflink.c:3043 +#: coff-arm.c:1754 coff-tic80.c:695 cofflink.c:3081 msgid "%B: bad reloc address 0x%lx in section `%A'" msgstr "" @@ -267,14 +268,14 @@ msgstr "" msgid "error: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d" msgstr "" -#: coff-arm.c:2226 elf32-arm.c:14105 +#: coff-arm.c:2226 elf32-arm.c:15580 #, c-format msgid "" "error: %B passes floats in float registers, whereas %B passes them in " "integer registers" msgstr "" -#: coff-arm.c:2229 elf32-arm.c:14109 +#: coff-arm.c:2229 elf32-arm.c:15584 #, c-format msgid "" "error: %B passes floats in integer registers, whereas %B passes them in " @@ -295,12 +296,12 @@ msgid "" "position independent" msgstr "" -#: coff-arm.c:2274 elf32-arm.c:14174 +#: coff-arm.c:2274 elf32-arm.c:15649 #, c-format msgid "Warning: %B supports interworking, whereas %B does not" msgstr "" -#: coff-arm.c:2277 elf32-arm.c:14180 +#: coff-arm.c:2277 elf32-arm.c:15655 #, c-format msgid "Warning: %B does not support interworking, whereas %B does" msgstr "" @@ -310,7 +311,7 @@ msgstr "" msgid "private flags = %x:" msgstr "" -#: coff-arm.c:2309 elf32-arm.c:10492 +#: coff-arm.c:2309 elf32-arm.c:11752 #, c-format msgid " [floats passed in float registers]" msgstr "" @@ -320,7 +321,7 @@ msgstr "" msgid " [floats passed in integer registers]" msgstr "" -#: coff-arm.c:2314 elf32-arm.c:10495 +#: coff-arm.c:2314 elf32-arm.c:11755 #, c-format msgid " [position independent]" msgstr "" @@ -345,14 +346,14 @@ msgstr "" msgid " [interworking not supported]" msgstr "" -#: coff-arm.c:2370 elf32-arm.c:9520 +#: coff-arm.c:2370 elf32-arm.c:10787 #, c-format msgid "" "Warning: Not setting interworking flag of %B since it has already been " "specified as non-interworking" msgstr "" -#: coff-arm.c:2374 elf32-arm.c:9524 +#: coff-arm.c:2374 elf32-arm.c:10791 #, c-format msgid "Warning: Clearing the interworking flag of %B due to outside request" msgstr "" @@ -364,10 +365,10 @@ msgstr "" #: coff-i860.c:147 #, c-format -msgid "Relocation `%s' not yet implemented\n" +msgid "relocation `%s' not yet implemented" msgstr "" -#: coff-i860.c:605 coff-tic54x.c:398 coffcode.h:5147 +#: coff-i860.c:605 coff-tic54x.c:398 coffcode.h:5192 msgid "%B: warning: illegal symbol index %ld in relocs" msgstr "" @@ -375,7 +376,7 @@ msgstr "" msgid "uncertain calling convention for non-COFF symbol" msgstr "" -#: coff-m68k.c:506 elf32-bfin.c:5678 elf32-cr16.c:2897 elf32-m68k.c:4672 +#: coff-m68k.c:506 elf32-bfin.c:5689 elf32-cr16.c:2897 elf32-m68k.c:4677 msgid "unsupported reloc type" msgstr "" @@ -388,20 +389,25 @@ msgstr "" msgid "Unrecognized reloc" msgstr "" -#: coff-rs6000.c:2794 +#: coff-rs6000.c:2676 #, c-format msgid "%s: unsupported relocation type 0x%02x" msgstr "" -#: coff-rs6000.c:2887 +#: coff-rs6000.c:2761 #, c-format msgid "%s: TOC reloc at 0x%x to symbol `%s' with no TOC entry" msgstr "" -#: coff-rs6000.c:3652 coff64-rs6000.c:2175 +#: coff-rs6000.c:3512 coff64-rs6000.c:2111 msgid "%B: symbol `%s' has unrecognized smclas %d" msgstr "" +#: coff-sh.c:521 +#, c-format +msgid "SH Error: unknown reloc type %d" +msgstr "" + #: coff-tic4x.c:195 coff-tic54x.c:299 coff-tic80.c:458 #, c-format msgid "Unrecognized reloc type 0x%x" @@ -417,81 +423,87 @@ msgstr "" msgid "ignoring reloc %s\n" msgstr "" -#: coffcode.h:973 +#: coffcode.h:991 msgid "%B: warning: COMDAT symbol '%s' does not match section name '%s'" msgstr "" #. Generate a warning message rather using the 'unhandled' #. variable as this will allow some .sys files generate by #. other toolchains to be processed. See bugzilla issue 196. -#: coffcode.h:1197 +#: coffcode.h:1215 msgid "" "%B: Warning: Ignoring section flag IMAGE_SCN_MEM_NOT_PAGED in section %s" msgstr "" -#: coffcode.h:1264 +#: coffcode.h:1282 msgid "%B (%s): Section flag %s (0x%x) ignored" msgstr "" -#: coffcode.h:2390 +#: coffcode.h:2424 #, c-format msgid "Unrecognized TI COFF target id '0x%x'" msgstr "" -#: coffcode.h:2704 +#: coffcode.h:2738 msgid "%B: reloc against a non-existant symbol index: %ld" msgstr "" -#: coffcode.h:3262 +#: coffcode.h:3296 msgid "%B: too many sections (%d)" msgstr "" -#: coffcode.h:3676 +#: coffcode.h:3712 msgid "%B: section %s: string table overflow at offset %ld" msgstr "" -#: coffcode.h:4481 +#: coffcode.h:4517 msgid "%B: warning: line number table read failed" msgstr "" -#: coffcode.h:4511 +#: coffcode.h:4547 msgid "%B: warning: illegal symbol index %ld in line numbers" msgstr "" -#: coffcode.h:4525 +#: coffcode.h:4561 msgid "%B: warning: duplicate line number information for `%s'" msgstr "" -#: coffcode.h:4916 +#: coffcode.h:4961 msgid "%B: Unrecognized storage class %d for %s symbol `%s'" msgstr "" -#: coffcode.h:5042 +#: coffcode.h:5087 msgid "warning: %B: local symbol `%s' has no section" msgstr "" -#: coffcode.h:5186 +#: coffcode.h:5231 msgid "%B: illegal relocation type %d at address 0x%lx" msgstr "" -#: coffgen.c:1573 +#: coffgen.c:1578 msgid "%B: bad string table size %lu" msgstr "" -#: cofflink.c:524 elflink.c:4339 +#: cofflink.c:533 elflink.c:4353 msgid "Warning: type of symbol `%s' changed from %d to %d in %B" msgstr "" -#: cofflink.c:2321 +#: cofflink.c:2330 msgid "%B: relocs in section `%A', but it has no contents" msgstr "" -#: cofflink.c:2652 coffswap.h:826 +#: cofflink.c:2392 elflink.c:9554 +msgid "" +"%X`%s' referenced in section `%A' of %B: defined in discarded section `%A' " +"of %B\n" +msgstr "" + +#: cofflink.c:2690 coffswap.h:826 #, c-format msgid "%s: %s: reloc overflow: 0x%lx > 0xffff" msgstr "" -#: cofflink.c:2661 coffswap.h:812 +#: cofflink.c:2699 coffswap.h:812 #, c-format msgid "%s: warning: %s: line number overflow: 0x%lx > 0xffff" msgstr "" @@ -537,26 +549,26 @@ msgstr "" msgid "Dwarf Error: mangled line number section." msgstr "" -#: dwarf2.c:1978 dwarf2.c:2098 dwarf2.c:2382 +#: dwarf2.c:1978 dwarf2.c:2098 dwarf2.c:2383 #, c-format msgid "Dwarf Error: Could not find abbrev number %u." msgstr "" -#: dwarf2.c:2343 +#: dwarf2.c:2344 #, c-format msgid "" "Dwarf Error: found dwarf version '%u', this reader only handles version 2, 3 " "and 4 information." msgstr "" -#: dwarf2.c:2350 +#: dwarf2.c:2351 #, c-format msgid "" "Dwarf Error: found address size '%u', this reader can not handle sizes " "greater than '%u'." msgstr "" -#: dwarf2.c:2373 +#: dwarf2.c:2374 #, c-format msgid "Dwarf Error: Bad abbrev number: %u." msgstr "" @@ -641,6 +653,10 @@ msgid "" "%P: fde encoding in %B(%A) prevents .eh_frame_hdr table being created.\n" msgstr "" +#: elf-eh-frame.c:1583 +msgid "%P: DW_EH_PE_datarel unspecified for this architecture.\n" +msgstr "" + #: elf-ifunc.c:179 msgid "" "%F%P: dynamic STT_GNU_IFUNC symbol `%s' with pointer equality in `%B' can " @@ -648,26 +664,26 @@ msgid "" "pie\n" msgstr "" -#: elf-m10200.c:450 elf-m10300.c:1560 elf32-avr.c:1263 elf32-bfin.c:3193 +#: elf-m10200.c:450 elf-m10300.c:1571 elf32-avr.c:1221 elf32-bfin.c:3209 #: elf32-cr16.c:1482 elf32-cr16c.c:780 elf32-cris.c:2077 elf32-crx.c:922 -#: elf32-d10v.c:509 elf32-fr30.c:609 elf32-frv.c:4111 elf32-h8300.c:509 +#: elf32-d10v.c:509 elf32-fr30.c:609 elf32-frv.c:4102 elf32-h8300.c:509 #: elf32-i860.c:1211 elf32-ip2k.c:1468 elf32-iq2000.c:684 elf32-lm32.c:1168 -#: elf32-m32c.c:553 elf32-m32r.c:3111 elf32-m68hc1x.c:1138 elf32-mep.c:534 +#: elf32-m32c.c:553 elf32-m32r.c:3111 elf32-m68hc1x.c:1138 elf32-mep.c:535 #: elf32-microblaze.c:1231 elf32-moxie.c:282 elf32-msp430.c:486 elf32-mt.c:395 #: elf32-openrisc.c:404 elf32-score.c:2731 elf32-score7.c:2540 #: elf32-spu.c:5042 elf32-v850.c:2143 elf32-xstormy16.c:941 elf64-mmix.c:1522 msgid "internal error: out of range error" msgstr "" -#: elf-m10200.c:454 elf-m10300.c:1564 elf32-avr.c:1267 elf32-bfin.c:3197 +#: elf-m10200.c:454 elf-m10300.c:1575 elf32-avr.c:1225 elf32-bfin.c:3213 #: elf32-cr16.c:1486 elf32-cr16c.c:784 elf32-cris.c:2081 elf32-crx.c:926 -#: elf32-d10v.c:513 elf32-fr30.c:613 elf32-frv.c:4115 elf32-h8300.c:513 +#: elf32-d10v.c:513 elf32-fr30.c:613 elf32-frv.c:4106 elf32-h8300.c:513 #: elf32-i860.c:1215 elf32-iq2000.c:688 elf32-lm32.c:1172 elf32-m32c.c:557 -#: elf32-m32r.c:3115 elf32-m68hc1x.c:1142 elf32-mep.c:538 +#: elf32-m32r.c:3115 elf32-m68hc1x.c:1142 elf32-mep.c:539 #: elf32-microblaze.c:1235 elf32-moxie.c:286 elf32-msp430.c:490 #: elf32-openrisc.c:408 elf32-score.c:2735 elf32-score7.c:2544 #: elf32-spu.c:5046 elf32-v850.c:2147 elf32-xstormy16.c:945 elf64-mmix.c:1526 -#: elfxx-mips.c:9186 +#: elfxx-mips.c:9193 msgid "internal error: unsupported relocation error" msgstr "" @@ -678,39 +694,44 @@ msgstr "" msgid "internal error: dangerous error" msgstr "" -#: elf-m10200.c:462 elf-m10300.c:1577 elf32-avr.c:1275 elf32-bfin.c:3205 +#: elf-m10200.c:462 elf-m10300.c:1591 elf32-avr.c:1233 elf32-bfin.c:3221 #: elf32-cr16.c:1494 elf32-cr16c.c:792 elf32-cris.c:2089 elf32-crx.c:934 -#: elf32-d10v.c:521 elf32-fr30.c:621 elf32-frv.c:4123 elf32-h8300.c:521 +#: elf32-d10v.c:521 elf32-fr30.c:621 elf32-frv.c:4114 elf32-h8300.c:521 #: elf32-i860.c:1223 elf32-ip2k.c:1483 elf32-iq2000.c:696 elf32-lm32.c:1180 -#: elf32-m32c.c:565 elf32-m32r.c:3123 elf32-m68hc1x.c:1150 elf32-mep.c:546 +#: elf32-m32c.c:565 elf32-m32r.c:3123 elf32-m68hc1x.c:1150 elf32-mep.c:547 #: elf32-microblaze.c:1243 elf32-moxie.c:294 elf32-msp430.c:498 elf32-mt.c:403 #: elf32-openrisc.c:416 elf32-score.c:2748 elf32-score7.c:2552 #: elf32-spu.c:5054 elf32-v850.c:2167 elf32-xstormy16.c:953 elf64-mmix.c:1534 msgid "internal error: unknown error" msgstr "" -#: elf-m10300.c:1504 elf32-arm.c:9098 elf32-i386.c:4081 elf32-m32r.c:2604 -#: elf32-m68k.c:4156 elf32-ppc.c:8089 elf32-s390.c:3010 elf32-sh.c:4223 -#: elf32-xtensa.c:3067 elf64-ppc.c:13115 elf64-s390.c:2985 elf64-sh64.c:1636 -#: elf64-x86-64.c:3719 elfxx-sparc.c:3806 +#: elf-m10300.c:1515 elf32-arm.c:10365 elf32-i386.c:4107 elf32-m32r.c:2604 +#: elf32-m68k.c:4156 elf32-s390.c:3010 elf32-sh.c:4223 elf32-xtensa.c:3067 +#: elf64-s390.c:2985 elf64-sh64.c:1636 elf64-x86-64.c:3882 elfxx-sparc.c:3807 msgid "%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'" msgstr "" -#: elf-m10300.c:1569 +#: elf-m10300.c:1580 msgid "" "error: inappropriate relocation type for shared library (did you forget -" "fpic?)" msgstr "" -#: elf-m10300.c:1572 +#: elf-m10300.c:1583 +msgid "" +"%B: error: taking the address of protected function '%s' cannot be done when " +"making a shared library" +msgstr "" + +#: elf-m10300.c:1586 msgid "internal error: suspicious relocation type used in shared library" msgstr "" -#: elf-m10300.c:4372 elf32-arm.c:11392 elf32-cr16.c:2451 elf32-cris.c:3044 -#: elf32-hppa.c:1894 elf32-i370.c:503 elf32-i386.c:2036 elf32-lm32.c:1868 -#: elf32-m32r.c:1927 elf32-m68k.c:3252 elf32-ppc.c:4994 elf32-s390.c:1652 -#: elf32-sh.c:2931 elf32-vax.c:1040 elf64-ppc.c:6483 elf64-s390.c:1635 -#: elf64-sh64.c:3377 elf64-x86-64.c:1871 elfxx-sparc.c:2104 +#: elf-m10300.c:4384 elf32-arm.c:12743 elf32-cr16.c:2451 elf32-cris.c:3044 +#: elf32-hppa.c:1894 elf32-i370.c:503 elf32-i386.c:2043 elf32-lm32.c:1868 +#: elf32-m32r.c:1927 elf32-m68k.c:3252 elf32-s390.c:1652 elf32-sh.c:2931 +#: elf32-tic6x.c:2160 elf32-vax.c:1040 elf64-s390.c:1635 elf64-sh64.c:3377 +#: elf64-x86-64.c:1985 elfxx-sparc.c:2104 #, c-format msgid "dynamic variable `%s' is zero size" msgstr "" @@ -735,7 +756,7 @@ msgstr "" msgid "%B: no group info for section %A" msgstr "" -#: elf.c:737 elf.c:3090 elflink.c:10062 +#: elf.c:737 elf.c:3121 elflink.c:10144 msgid "%B: warning: sh_link not set for section `%A'" msgstr "" @@ -751,551 +772,577 @@ msgstr "" msgid "%B: unable to initialize commpress status for section %s" msgstr "" -#: elf.c:1050 +#: elf.c:1061 msgid "%B: unable to initialize decommpress status for section %s" msgstr "" -#: elf.c:1158 +#: elf.c:1181 #, c-format msgid "" "\n" "Program Header:\n" msgstr "" -#: elf.c:1200 +#: elf.c:1223 #, c-format msgid "" "\n" "Dynamic Section:\n" msgstr "" -#: elf.c:1336 +#: elf.c:1359 #, c-format msgid "" "\n" "Version definitions:\n" msgstr "" -#: elf.c:1361 +#: elf.c:1384 #, c-format msgid "" "\n" "Version References:\n" msgstr "" -#: elf.c:1366 +#: elf.c:1389 #, c-format msgid " required from %s:\n" msgstr "" -#: elf.c:1773 +#: elf.c:1796 msgid "%B: invalid link %lu for reloc section %s (index %u)" msgstr "" -#: elf.c:1943 +#: elf.c:1966 msgid "" "%B: don't know how to handle allocated, application specific section `%s' [0x" "%8x]" msgstr "" -#: elf.c:1955 +#: elf.c:1978 msgid "%B: don't know how to handle processor specific section `%s' [0x%8x]" msgstr "" -#: elf.c:1966 +#: elf.c:1989 msgid "%B: don't know how to handle OS specific section `%s' [0x%8x]" msgstr "" -#: elf.c:1976 +#: elf.c:1999 msgid "%B: don't know how to handle section `%s' [0x%8x]" msgstr "" -#: elf.c:2603 +#: elf.c:2634 #, c-format msgid "warning: section `%A' type changed to PROGBITS" msgstr "" -#: elf.c:3047 +#: elf.c:3078 msgid "%B: sh_link of section `%A' points to discarded section `%A' of `%B'" msgstr "" -#: elf.c:3070 +#: elf.c:3101 msgid "%B: sh_link of section `%A' points to removed section `%A' of `%B'" msgstr "" -#: elf.c:4480 +#: elf.c:4527 msgid "" "%B: The first section in the PT_DYNAMIC segment is not the .dynamic section" msgstr "" -#: elf.c:4507 +#: elf.c:4554 msgid "%B: Not enough room for program headers, try linking with -N" msgstr "" -#: elf.c:4594 +#: elf.c:4641 msgid "%B: section %A lma %#lx adjusted to %#lx" msgstr "" -#: elf.c:4713 +#: elf.c:4774 msgid "%B: section `%A' can't be allocated in segment %d" msgstr "" -#: elf.c:4761 +#: elf.c:4822 msgid "%B: warning: allocated section `%s' not in segment" msgstr "" -#: elf.c:5257 +#: elf.c:5322 msgid "%B: symbol `%s' required but not present" msgstr "" -#: elf.c:5595 +#: elf.c:5660 msgid "%B: warning: Empty loadable segment detected, is this intentional ?\n" msgstr "" -#: elf.c:6622 +#: elf.c:6688 #, c-format msgid "" "Unable to find equivalent output section for symbol '%s' from section '%s'" msgstr "" -#: elf.c:7611 +#: elf.c:7684 msgid "%B: unsupported relocation type %s" msgstr "" -#: elf32-arm.c:3183 +#: elf32-arm.c:3590 msgid "" "%B(%s): warning: interworking not enabled.\n" " first occurrence: %B: Thumb call to ARM" msgstr "" -#: elf32-arm.c:3226 +#: elf32-arm.c:3637 msgid "" "%B(%s): warning: interworking not enabled.\n" " first occurrence: %B: ARM call to Thumb" msgstr "" -#: elf32-arm.c:3432 elf32-arm.c:4807 +#: elf32-arm.c:3849 elf32-arm.c:5286 #, c-format msgid "%s: cannot create stub entry %s" msgstr "" -#: elf32-arm.c:4923 +#: elf32-arm.c:5402 #, c-format msgid "unable to find THUMB glue '%s' for '%s'" msgstr "" -#: elf32-arm.c:4959 +#: elf32-arm.c:5438 #, c-format msgid "unable to find ARM glue '%s' for '%s'" msgstr "" -#: elf32-arm.c:5485 +#: elf32-arm.c:5964 msgid "%B: BE8 images only valid in big-endian mode." msgstr "" #. Give a warning, but do as the user requests anyway. -#: elf32-arm.c:5715 +#: elf32-arm.c:6194 msgid "" "%B: warning: selected VFP11 erratum workaround is not necessary for target " "architecture" msgstr "" -#: elf32-arm.c:6259 elf32-arm.c:6279 +#: elf32-arm.c:6738 elf32-arm.c:6758 msgid "%B: unable to find VFP11 veneer `%s'" msgstr "" -#: elf32-arm.c:6327 +#: elf32-arm.c:6806 #, c-format msgid "Invalid TARGET2 relocation type '%s'." msgstr "" -#: elf32-arm.c:6411 +#: elf32-arm.c:6890 msgid "" "%B(%s): warning: interworking not enabled.\n" " first occurrence: %B: thumb call to arm" msgstr "" -#: elf32-arm.c:7130 +#: elf32-arm.c:7674 +msgid "%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline" +msgstr "" + +#: elf32-arm.c:7713 +msgid "%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline" +msgstr "" + +#: elf32-arm.c:8166 msgid "\\%B: Warning: Arm BLX instruction targets Arm function '%s'." msgstr "" -#: elf32-arm.c:7541 +#: elf32-arm.c:8575 msgid "%B: Warning: Thumb BLX instruction targets thumb function '%s'." msgstr "" -#: elf32-arm.c:8223 +#: elf32-arm.c:9408 +msgid "" +"%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC" +msgstr "" + +#: elf32-arm.c:9431 +msgid "" +"%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC" +msgstr "" + +#: elf32-arm.c:9460 msgid "%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object" msgstr "" -#: elf32-arm.c:8438 +#: elf32-arm.c:9675 msgid "" "%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group " "relocations" msgstr "" -#: elf32-arm.c:8478 elf32-arm.c:8565 elf32-arm.c:8648 elf32-arm.c:8733 +#: elf32-arm.c:9715 elf32-arm.c:9802 elf32-arm.c:9885 elf32-arm.c:9970 msgid "%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s" msgstr "" -#: elf32-arm.c:8963 elf32-sh.c:4112 elf64-sh64.c:1544 +#: elf32-arm.c:10209 elf32-sh.c:4112 elf64-sh64.c:1544 msgid "%B(%A+0x%lx): %s relocation against SEC_MERGE section" msgstr "" -#: elf32-arm.c:9074 elf32-m68k.c:4191 elf32-xtensa.c:2805 elf64-ppc.c:11689 +#: elf32-arm.c:10320 elf32-m68k.c:4191 elf32-xtensa.c:2805 msgid "%B(%A+0x%lx): %s used with TLS symbol %s" msgstr "" -#: elf32-arm.c:9075 elf32-m68k.c:4192 elf32-xtensa.c:2806 elf64-ppc.c:11690 +#: elf32-arm.c:10321 elf32-m68k.c:4192 elf32-xtensa.c:2806 msgid "%B(%A+0x%lx): %s used with non-TLS symbol %s" msgstr "" -#: elf32-arm.c:9132 elf32-tic6x.c:1632 +#: elf32-arm.c:10399 elf32-tic6x.c:2751 msgid "out of range" msgstr "" -#: elf32-arm.c:9136 elf32-tic6x.c:1636 +#: elf32-arm.c:10403 elf32-tic6x.c:2755 msgid "unsupported relocation" msgstr "" -#: elf32-arm.c:9144 elf32-tic6x.c:1644 +#: elf32-arm.c:10411 elf32-tic6x.c:2763 msgid "unknown error" msgstr "" -#: elf32-arm.c:9569 +#: elf32-arm.c:10836 msgid "" "Warning: Clearing the interworking flag of %B because non-interworking code " "in %B has been linked with it" msgstr "" -#: elf32-arm.c:9663 +#: elf32-arm.c:10930 msgid "%B: Unknown mandatory EABI object attribute %d" msgstr "" -#: elf32-arm.c:9671 +#: elf32-arm.c:10938 msgid "Warning: %B: Unknown EABI object attribute %d" msgstr "" -#: elf32-arm.c:9852 +#: elf32-arm.c:11119 msgid "error: %B: Unknown CPU architecture" msgstr "" -#: elf32-arm.c:9890 +#: elf32-arm.c:11157 msgid "error: %B: Conflicting CPU architectures %d/%d" msgstr "" -#: elf32-arm.c:9942 +#: elf32-arm.c:11206 msgid "" "Error: %B has both the current and legacy Tag_MPextension_use attributes" msgstr "" -#: elf32-arm.c:9967 +#: elf32-arm.c:11231 msgid "error: %B uses VFP register arguments, %B does not" msgstr "" -#: elf32-arm.c:10112 +#: elf32-arm.c:11376 msgid "error: %B: unable to merge virtualization attributes with %B" msgstr "" -#: elf32-arm.c:10138 +#: elf32-arm.c:11402 msgid "error: %B: Conflicting architecture profiles %c/%c" msgstr "" -#: elf32-arm.c:10239 +#: elf32-arm.c:11503 msgid "Warning: %B: Conflicting platform configuration" msgstr "" -#: elf32-arm.c:10248 +#: elf32-arm.c:11512 msgid "error: %B: Conflicting use of R9" msgstr "" -#: elf32-arm.c:10260 +#: elf32-arm.c:11524 msgid "error: %B: SB relative addressing conflicts with use of R9" msgstr "" -#: elf32-arm.c:10273 +#: elf32-arm.c:11537 msgid "" "warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; " "use of wchar_t values across objects may fail" msgstr "" -#: elf32-arm.c:10304 +#: elf32-arm.c:11568 msgid "" "warning: %B uses %s enums yet the output is to use %s enums; use of enum " "values across objects may fail" msgstr "" -#: elf32-arm.c:10316 +#: elf32-arm.c:11580 msgid "error: %B uses iWMMXt register arguments, %B does not" msgstr "" -#: elf32-arm.c:10333 +#: elf32-arm.c:11597 msgid "error: fp16 format mismatch between %B and %B" msgstr "" -#: elf32-arm.c:10357 +#: elf32-arm.c:11621 msgid "DIV usage mismatch between %B and %B" msgstr "" -#: elf32-arm.c:10376 +#: elf32-arm.c:11640 msgid "%B has has both the current and legacy Tag_MPextension_use attributes" msgstr "" #. Ignore init flag - it may not be set, despite the flags field #. containing valid data. #. Ignore init flag - it may not be set, despite the flags field containing valid data. -#: elf32-arm.c:10468 elf32-bfin.c:5065 elf32-cris.c:4162 elf32-m68hc1x.c:1282 +#: elf32-arm.c:11728 elf32-bfin.c:5075 elf32-cris.c:4162 elf32-m68hc1x.c:1282 #: elf32-m68k.c:1235 elf32-score.c:3996 elf32-score7.c:3803 elf32-vax.c:528 -#: elfxx-mips.c:12842 +#: elfxx-mips.c:12857 #, c-format msgid "private flags = %lx:" msgstr "" -#: elf32-arm.c:10477 +#: elf32-arm.c:11737 #, c-format msgid " [interworking enabled]" msgstr "" -#: elf32-arm.c:10485 +#: elf32-arm.c:11745 #, c-format msgid " [VFP float format]" msgstr "" -#: elf32-arm.c:10487 +#: elf32-arm.c:11747 #, c-format msgid " [Maverick float format]" msgstr "" -#: elf32-arm.c:10489 +#: elf32-arm.c:11749 #, c-format msgid " [FPA float format]" msgstr "" -#: elf32-arm.c:10498 +#: elf32-arm.c:11758 #, c-format msgid " [new ABI]" msgstr "" -#: elf32-arm.c:10501 +#: elf32-arm.c:11761 #, c-format msgid " [old ABI]" msgstr "" -#: elf32-arm.c:10504 +#: elf32-arm.c:11764 #, c-format msgid " [software FP]" msgstr "" -#: elf32-arm.c:10513 +#: elf32-arm.c:11773 #, c-format msgid " [Version1 EABI]" msgstr "" -#: elf32-arm.c:10516 elf32-arm.c:10527 +#: elf32-arm.c:11776 elf32-arm.c:11787 #, c-format msgid " [sorted symbol table]" msgstr "" -#: elf32-arm.c:10518 elf32-arm.c:10529 +#: elf32-arm.c:11778 elf32-arm.c:11789 #, c-format msgid " [unsorted symbol table]" msgstr "" -#: elf32-arm.c:10524 +#: elf32-arm.c:11784 #, c-format msgid " [Version2 EABI]" msgstr "" -#: elf32-arm.c:10532 +#: elf32-arm.c:11792 #, c-format msgid " [dynamic symbols use segment index]" msgstr "" -#: elf32-arm.c:10535 +#: elf32-arm.c:11795 #, c-format msgid " [mapping symbols precede others]" msgstr "" -#: elf32-arm.c:10542 +#: elf32-arm.c:11802 #, c-format msgid " [Version3 EABI]" msgstr "" -#: elf32-arm.c:10546 +#: elf32-arm.c:11806 #, c-format msgid " [Version4 EABI]" msgstr "" -#: elf32-arm.c:10550 +#: elf32-arm.c:11810 #, c-format msgid " [Version5 EABI]" msgstr "" -#: elf32-arm.c:10553 +#: elf32-arm.c:11813 #, c-format msgid " [BE8]" msgstr "" -#: elf32-arm.c:10556 +#: elf32-arm.c:11816 #, c-format msgid " [LE8]" msgstr "" -#: elf32-arm.c:10562 +#: elf32-arm.c:11822 #, c-format msgid " " msgstr "" -#: elf32-arm.c:10569 +#: elf32-arm.c:11829 #, c-format msgid " [relocatable executable]" msgstr "" -#: elf32-arm.c:10572 +#: elf32-arm.c:11832 #, c-format msgid " [has entry point]" msgstr "" -#: elf32-arm.c:10577 +#: elf32-arm.c:11837 #, c-format msgid "" msgstr "" -#: elf32-arm.c:10824 elf32-i386.c:1322 elf32-s390.c:1000 elf32-xtensa.c:1009 -#: elf64-s390.c:960 elf64-x86-64.c:1105 elfxx-sparc.c:1370 +#: elf32-arm.c:12135 elf32-i386.c:1323 elf32-s390.c:1000 elf32-tic6x.c:2827 +#: elf32-xtensa.c:1009 elf64-s390.c:960 elf64-x86-64.c:1172 elfxx-sparc.c:1370 msgid "%B: bad symbol index: %d" msgstr "" -#: elf32-arm.c:10946 elf64-x86-64.c:1265 elf64-x86-64.c:1434 elfxx-mips.c:7942 +#: elf32-arm.c:12283 elf64-x86-64.c:1370 elf64-x86-64.c:1541 elfxx-mips.c:7949 msgid "" "%B: relocation %s against `%s' can not be used when making a shared object; " "recompile with -fPIC" msgstr "" -#: elf32-arm.c:11948 +#: elf32-arm.c:13412 #, c-format msgid "Errors encountered processing file %s" msgstr "" -#: elf32-arm.c:13334 +#: elf32-arm.c:14795 msgid "%B: error: Cortex-A8 erratum stub is allocated in unsafe location" msgstr "" #. There's not much we can do apart from complain if this #. happens. -#: elf32-arm.c:13361 +#: elf32-arm.c:14822 msgid "%B: error: Cortex-A8 erratum stub out of range (input file too large)" msgstr "" -#: elf32-arm.c:13455 elf32-arm.c:13477 +#: elf32-arm.c:14916 elf32-arm.c:14938 msgid "%B: error: VFP11 veneer out of range" msgstr "" -#: elf32-arm.c:14002 +#: elf32-arm.c:15477 msgid "error: %B is already in final BE8 format" msgstr "" -#: elf32-arm.c:14078 +#: elf32-arm.c:15553 msgid "" -"error: Source object %B has EABI version %d, but target %B has EABI version %" -"d" +"error: Source object %B has EABI version %d, but target %B has EABI version " +"%d" msgstr "" -#: elf32-arm.c:14094 +#: elf32-arm.c:15569 msgid "error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d" msgstr "" -#: elf32-arm.c:14119 +#: elf32-arm.c:15594 msgid "error: %B uses VFP instructions, whereas %B does not" msgstr "" -#: elf32-arm.c:14123 +#: elf32-arm.c:15598 msgid "error: %B uses FPA instructions, whereas %B does not" msgstr "" -#: elf32-arm.c:14133 +#: elf32-arm.c:15608 msgid "error: %B uses Maverick instructions, whereas %B does not" msgstr "" -#: elf32-arm.c:14137 +#: elf32-arm.c:15612 msgid "error: %B does not use Maverick instructions, whereas %B does" msgstr "" -#: elf32-arm.c:14156 +#: elf32-arm.c:15631 msgid "error: %B uses software FP, whereas %B uses hardware FP" msgstr "" -#: elf32-arm.c:14160 +#: elf32-arm.c:15635 msgid "error: %B uses hardware FP, whereas %B uses software FP" msgstr "" -#: elf32-avr.c:1271 elf32-bfin.c:3201 elf32-cris.c:2085 elf32-fr30.c:617 -#: elf32-frv.c:4119 elf32-i860.c:1219 elf32-ip2k.c:1479 elf32-iq2000.c:692 -#: elf32-m32c.c:561 elf32-mep.c:542 elf32-moxie.c:290 elf32-msp430.c:494 +#: elf32-avr.c:1229 elf32-bfin.c:3217 elf32-cris.c:2085 elf32-fr30.c:617 +#: elf32-frv.c:4110 elf32-i860.c:1219 elf32-ip2k.c:1479 elf32-iq2000.c:692 +#: elf32-m32c.c:561 elf32-mep.c:543 elf32-moxie.c:290 elf32-msp430.c:494 #: elf32-mt.c:399 elf32-openrisc.c:412 elf32-v850.c:2151 elf32-xstormy16.c:949 #: elf64-mmix.c:1530 msgid "internal error: dangerous relocation" msgstr "" -#: elf32-avr.c:2400 elf32-hppa.c:598 elf32-m68hc1x.c:166 elf64-ppc.c:4175 +#: elf32-avr.c:2415 elf32-hppa.c:598 elf32-m68hc1x.c:166 msgid "%B: cannot create stub entry %s" msgstr "" -#: elf32-bfin.c:1575 +#: elf32-bfin.c:107 elf32-bfin.c:363 +msgid "relocation should be even number" +msgstr "" + +#: elf32-bfin.c:1591 msgid "%B(%A+0x%lx): unresolvable relocation against symbol `%s'" msgstr "" -#: elf32-bfin.c:1608 elf32-i386.c:4123 elf32-m68k.c:4233 elf32-s390.c:3062 -#: elf64-s390.c:3037 elf64-x86-64.c:3759 +#: elf32-bfin.c:1624 elf32-i386.c:4150 elf32-m68k.c:4233 elf32-s390.c:3062 +#: elf64-s390.c:3037 elf64-x86-64.c:3923 msgid "%B(%A+0x%lx): reloc against `%s': error %d" msgstr "" -#: elf32-bfin.c:2707 +#: elf32-bfin.c:2723 msgid "%B: relocation at `%A+0x%x' references symbol `%s' with nonzero addend" msgstr "" -#: elf32-bfin.c:2721 elf32-frv.c:2901 +#: elf32-bfin.c:2737 msgid "relocation references symbol not defined in the module" msgstr "" -#: elf32-bfin.c:2818 +#: elf32-bfin.c:2834 msgid "R_BFIN_FUNCDESC references dynamic symbol with nonzero addend" msgstr "" -#: elf32-bfin.c:2859 elf32-bfin.c:2982 elf32-frv.c:3638 elf32-frv.c:3759 +#: elf32-bfin.c:2875 elf32-bfin.c:2998 msgid "cannot emit fixups in read-only section" msgstr "" -#: elf32-bfin.c:2890 elf32-bfin.c:3020 elf32-frv.c:3669 elf32-frv.c:3803 -#: elf32-lm32.c:1103 elf32-sh.c:5021 +#: elf32-bfin.c:2906 elf32-bfin.c:3036 elf32-lm32.c:1103 elf32-sh.c:5021 msgid "cannot emit dynamic relocations in read-only section" msgstr "" -#: elf32-bfin.c:2940 +#: elf32-bfin.c:2956 msgid "R_BFIN_FUNCDESC_VALUE references dynamic symbol with nonzero addend" msgstr "" -#: elf32-bfin.c:3105 +#: elf32-bfin.c:3121 msgid "relocations between different segments are not supported" msgstr "" -#: elf32-bfin.c:3106 +#: elf32-bfin.c:3122 msgid "warning: relocation references a different segment" msgstr "" -#: elf32-bfin.c:4957 elf32-frv.c:6406 +#: elf32-bfin.c:4967 msgid "%B: unsupported relocation type %i" msgstr "" -#: elf32-bfin.c:5111 elf32-frv.c:6814 +#: elf32-bfin.c:5121 elf32-frv.c:6805 #, c-format msgid "%s: cannot link non-fdpic object file into fdpic executable" msgstr "" -#: elf32-bfin.c:5115 elf32-frv.c:6818 +#: elf32-bfin.c:5125 elf32-frv.c:6809 #, c-format msgid "%s: cannot link fdpic object file into non-fdpic executable" msgstr "" +#: elf32-bfin.c:5279 +#, c-format +msgid "*** check this relocation %s" +msgstr "" + #: elf32-cris.c:1172 msgid "%B, section %A: unresolvable relocation %s against symbol `%s'" msgstr "" @@ -1309,16 +1356,16 @@ msgid "%B, section %A: No PLT for relocation %s against symbol `%s'" msgstr "" #: elf32-cris.c:1242 elf32-cris.c:1375 elf32-cris.c:1635 elf32-cris.c:1718 -#: elf32-cris.c:1871 +#: elf32-cris.c:1871 elf32-tic6x.c:2660 msgid "[whose name is lost]" msgstr "" -#: elf32-cris.c:1361 +#: elf32-cris.c:1361 elf32-tic6x.c:2645 msgid "" "%B, section %A: relocation %s with non-zero addend %d against local symbol" msgstr "" -#: elf32-cris.c:1369 elf32-cris.c:1712 elf32-cris.c:1865 +#: elf32-cris.c:1369 elf32-cris.c:1712 elf32-cris.c:1865 elf32-tic6x.c:2653 msgid "" "%B, section %A: relocation %s with non-zero addend %d against symbol `%s'" msgstr "" @@ -1414,98 +1461,125 @@ msgstr "" msgid "%B contains non-CRIS-v32 code, incompatible with previous objects" msgstr "" +#: elf32-dlx.c:142 +#, c-format +msgid "BFD Link Error: branch (PC rel16) to section (%s) not supported" +msgstr "" + +#: elf32-dlx.c:204 +#, c-format +msgid "BFD Link Error: jump (PC rel26) to section (%s) not supported" +msgstr "" + #: elf32-frv.c:1509 elf32-frv.c:1658 msgid "relocation requires zero addend" msgstr "" #: elf32-frv.c:2888 -msgid "%B(%A+0x%x): relocation to `%s+%x' may have caused the error above" +msgid "%H: relocation to `%s+%v' may have caused the error above\n" msgstr "" -#: elf32-frv.c:2977 -msgid "R_FRV_GETTLSOFF not applied to a call instruction" +#: elf32-frv.c:2902 +msgid "%H: relocation references symbol not defined in the module\n" +msgstr "" + +#: elf32-frv.c:2978 +msgid "%H: R_FRV_GETTLSOFF not applied to a call instruction\n" msgstr "" #: elf32-frv.c:3019 -msgid "R_FRV_GOTTLSDESC12 not applied to an lddi instruction" +msgid "%H: R_FRV_GOTTLSDESC12 not applied to an lddi instruction\n" msgstr "" #: elf32-frv.c:3090 -msgid "R_FRV_GOTTLSDESCHI not applied to a sethi instruction" +msgid "%H: R_FRV_GOTTLSDESCHI not applied to a sethi instruction\n" msgstr "" #: elf32-frv.c:3127 -msgid "R_FRV_GOTTLSDESCLO not applied to a setlo or setlos instruction" +msgid "%H: R_FRV_GOTTLSDESCLO not applied to a setlo or setlos instruction\n" +msgstr "" + +#: elf32-frv.c:3174 +msgid "%H: R_FRV_TLSDESC_RELAX not applied to an ldd instruction\n" +msgstr "" + +#: elf32-frv.c:3258 +msgid "%H: R_FRV_GETTLSOFF_RELAX not applied to a calll instruction\n" msgstr "" -#: elf32-frv.c:3175 -msgid "R_FRV_TLSDESC_RELAX not applied to an ldd instruction" +#: elf32-frv.c:3312 +msgid "%H: R_FRV_GOTTLSOFF12 not applied to an ldi instruction\n" msgstr "" -#: elf32-frv.c:3259 -msgid "R_FRV_GETTLSOFF_RELAX not applied to a calll instruction" +#: elf32-frv.c:3342 +msgid "%H: R_FRV_GOTTLSOFFHI not applied to a sethi instruction\n" msgstr "" -#: elf32-frv.c:3314 -msgid "R_FRV_GOTTLSOFF12 not applied to an ldi instruction" +#: elf32-frv.c:3371 +msgid "%H: R_FRV_GOTTLSOFFLO not applied to a setlo or setlos instruction\n" msgstr "" -#: elf32-frv.c:3344 -msgid "R_FRV_GOTTLSOFFHI not applied to a sethi instruction" +#: elf32-frv.c:3401 +msgid "%H: R_FRV_TLSOFF_RELAX not applied to an ld instruction\n" msgstr "" -#: elf32-frv.c:3373 -msgid "R_FRV_GOTTLSOFFLO not applied to a setlo or setlos instruction" +#: elf32-frv.c:3446 +msgid "%H: R_FRV_TLSMOFFHI not applied to a sethi instruction\n" msgstr "" -#: elf32-frv.c:3404 -msgid "R_FRV_TLSOFF_RELAX not applied to an ld instruction" +#: elf32-frv.c:3473 +msgid "R_FRV_TLSMOFFLO not applied to a setlo or setlos instruction\n" msgstr "" -#: elf32-frv.c:3449 -msgid "R_FRV_TLSMOFFHI not applied to a sethi instruction" +#: elf32-frv.c:3594 +msgid "%H: R_FRV_FUNCDESC references dynamic symbol with nonzero addend\n" msgstr "" -#: elf32-frv.c:3476 -msgid "R_FRV_TLSMOFFLO not applied to a setlo or setlos instruction" +#: elf32-frv.c:3635 elf32-frv.c:3757 +msgid "%H: cannot emit fixups in read-only section\n" msgstr "" -#: elf32-frv.c:3597 -msgid "R_FRV_FUNCDESC references dynamic symbol with nonzero addend" +#: elf32-frv.c:3666 elf32-frv.c:3800 +msgid "%H: cannot emit dynamic relocations in read-only section\n" msgstr "" -#: elf32-frv.c:3717 -msgid "R_FRV_FUNCDESC_VALUE references dynamic symbol with nonzero addend" +#: elf32-frv.c:3715 +msgid "" +"%H: R_FRV_FUNCDESC_VALUE references dynamic symbol with nonzero addend\n" msgstr "" -#: elf32-frv.c:3974 elf32-frv.c:4130 -msgid "%B(%A+0x%lx): reloc against `%s': %s" +#: elf32-frv.c:3971 +msgid "%H: reloc against `%s' references a different segment\n" msgstr "" -#: elf32-frv.c:3976 elf32-frv.c:3980 -msgid "relocation references a different segment" +#: elf32-frv.c:4121 +msgid "%H: reloc against `%s': %s\n" msgstr "" -#: elf32-frv.c:6728 +#: elf32-frv.c:6397 +msgid "%B: unsupported relocation type %i\n" +msgstr "" + +#: elf32-frv.c:6719 #, c-format msgid "" "%s: compiled with %s and linked with modules that use non-pic relocations" msgstr "" -#: elf32-frv.c:6781 elf32-iq2000.c:845 elf32-m32c.c:807 +#: elf32-frv.c:6772 elf32-iq2000.c:845 elf32-m32c.c:807 #, c-format msgid "%s: compiled with %s and linked with modules compiled with %s" msgstr "" -#: elf32-frv.c:6793 +#: elf32-frv.c:6784 #, c-format msgid "" -"%s: uses different unknown e_flags (0x%lx) fields than previous modules (0x%" -"lx)" +"%s: uses different unknown e_flags (0x%lx) fields than previous modules (0x" +"%lx)" msgstr "" -#: elf32-frv.c:6843 elf32-iq2000.c:882 elf32-m32c.c:843 elf32-mt.c:576 -#: elf32-rx.c:2925 +#: elf32-frv.c:6834 elf32-iq2000.c:882 elf32-m32c.c:843 elf32-mt.c:576 +#: elf32-rx.c:2937 #, c-format msgid "private flags = 0x%lx:" msgstr "" @@ -1542,59 +1616,67 @@ msgid ".got section not immediately after .plt section" msgstr "" #. Unknown relocation. -#: elf32-i386.c:371 elf32-m68k.c:383 elf32-ppc.c:1674 elf32-s390.c:379 -#: elf32-tic6x.c:1563 elf64-ppc.c:2284 elf64-s390.c:403 elf64-x86-64.c:234 +#: elf32-i386.c:372 elf32-m68k.c:383 elf32-ppc.c:1675 elf32-s390.c:379 +#: elf32-tic6x.c:2682 elf64-ppc.c:2285 elf64-s390.c:403 elf64-x86-64.c:243 msgid "%B: invalid relocation type %d" msgstr "" -#: elf32-i386.c:1265 elf64-x86-64.c:1049 +#: elf32-i386.c:1266 elf64-x86-64.c:1116 msgid "" "%B: TLS transition from %s to %s against `%s' at 0x%lx in section `%A' failed" msgstr "" -#: elf32-i386.c:1408 elf32-i386.c:3068 elf64-x86-64.c:1194 elf64-x86-64.c:2780 -#: elfxx-sparc.c:3076 +#: elf32-i386.c:1411 elf32-i386.c:3090 elf64-x86-64.c:1296 elf64-x86-64.c:2909 +#: elfxx-sparc.c:3077 msgid "%B: relocation %s against STT_GNU_IFUNC symbol `%s' isn't handled by %s" msgstr "" -#: elf32-i386.c:1570 elf32-s390.c:1182 elf32-sh.c:6367 elf32-xtensa.c:1182 +#: elf32-i386.c:1573 elf32-s390.c:1182 elf32-sh.c:6367 elf32-xtensa.c:1182 #: elf64-s390.c:1151 elfxx-sparc.c:1547 msgid "%B: `%s' accessed both as normal and thread local symbol" msgstr "" -#: elf32-i386.c:2910 +#: elf32-i386.c:2405 elf64-x86-64.c:2320 +msgid "%P: %B: warning: relocation against `%s' in readonly section `%A'.\n" +msgstr "" + +#: elf32-i386.c:2496 elf64-x86-64.c:2407 +msgid "%P: %B: warning: relocation in readonly section `%A'.\n" +msgstr "" + +#: elf32-i386.c:2932 msgid "%B: unrecognized relocation (0x%x) in section `%A'" msgstr "" -#: elf32-i386.c:3317 elf64-x86-64.c:3174 +#: elf32-i386.c:3339 elf64-x86-64.c:3295 msgid "hidden symbol" msgstr "" -#: elf32-i386.c:3320 elf64-x86-64.c:3177 +#: elf32-i386.c:3342 elf64-x86-64.c:3298 msgid "internal symbol" msgstr "" -#: elf32-i386.c:3323 elf64-x86-64.c:3180 +#: elf32-i386.c:3345 elf64-x86-64.c:3301 msgid "protected symbol" msgstr "" -#: elf32-i386.c:3326 elf64-x86-64.c:3183 +#: elf32-i386.c:3348 elf64-x86-64.c:3304 msgid "symbol" msgstr "" -#: elf32-i386.c:3331 +#: elf32-i386.c:3353 msgid "" "%B: relocation R_386_GOTOFF against undefined %s `%s' can not be used when " "making a shared object" msgstr "" -#: elf32-i386.c:3341 +#: elf32-i386.c:3363 msgid "" "%B: relocation R_386_GOTOFF against protected function `%s' can not be used " "when making a shared object" msgstr "" -#: elf32-i386.c:4633 elf64-x86-64.c:4206 +#: elf32-i386.c:4660 elf64-x86-64.c:4378 #, c-format msgid "discarded output section: `%A'" msgstr "" @@ -1689,8 +1771,8 @@ msgstr "" #: elf32-m68hc1x.c:1092 #, c-format msgid "" -"reference to a banked address [%lx:%04lx] in the normal address space at %" -"04lx" +"reference to a banked address [%lx:%04lx] in the normal address space at " +"%04lx" msgstr "" #: elf32-m68hc1x.c:1225 @@ -1709,7 +1791,7 @@ msgstr "" msgid "%B: linking files compiled for HCS12 with others compiled for HC12" msgstr "" -#: elf32-m68hc1x.c:1257 elf32-ppc.c:4232 elf64-sparc.c:703 elfxx-mips.c:12704 +#: elf32-m68hc1x.c:1257 elf32-ppc.c:4214 elf64-sparc.c:705 elfxx-mips.c:12719 msgid "%B: uses different e_flags (0x%lx) fields than previous modules (0x%lx)" msgstr "" @@ -1758,7 +1840,7 @@ msgstr "" msgid " [memory=flat]" msgstr "" -#: elf32-m68k.c:1250 elf32-m68k.c:1251 vms-alpha.c:7292 vms-alpha.c:7307 +#: elf32-m68k.c:1250 elf32-m68k.c:1251 vms-alpha.c:7311 vms-alpha.c:7326 msgid "unknown" msgstr "" @@ -1782,15 +1864,26 @@ msgstr "" msgid "%B: Unknown relocation type %d\n" msgstr "" -#: elf32-mep.c:647 +#. Pacify gcc -Wall. +#: elf32-mep.c:157 +#, c-format +msgid "mep: no reloc for code %d" +msgstr "" + +#: elf32-mep.c:163 +#, c-format +msgid "MeP: howto %d has type %d" +msgstr "" + +#: elf32-mep.c:648 msgid "%B and %B are for different cores" msgstr "" -#: elf32-mep.c:664 +#: elf32-mep.c:665 msgid "%B and %B are for different configurations" msgstr "" -#: elf32-mep.c:701 +#: elf32-mep.c:702 #, c-format msgid "private flags = 0x%lx" msgstr "" @@ -1805,11 +1898,11 @@ msgstr "" msgid "%s: The target (%s) of an %s relocation is in the wrong section (%s)" msgstr "" -#: elf32-microblaze.c:1155 elfxx-sparc.c:3450 +#: elf32-microblaze.c:1155 elfxx-sparc.c:3451 msgid "%B: probably compiled without -fPIC?" msgstr "" -#: elf32-microblaze.c:2074 elflink.c:12601 +#: elf32-microblaze.c:2074 msgid "%B: bad relocation section name `%s'" msgstr "" @@ -1822,162 +1915,179 @@ msgstr "" msgid "32bits gp relative relocation occurs for an external symbol" msgstr "" -#: elf32-ppc.c:1739 +#: elf32-ppc.c:1740 #, c-format msgid "generic linker can't handle %s" msgstr "" -#: elf32-ppc.c:2180 +#: elf32-ppc.c:2183 msgid "corrupt %s section in %B" msgstr "" -#: elf32-ppc.c:2199 +#: elf32-ppc.c:2202 msgid "unable to read in %s section from %B" msgstr "" -#: elf32-ppc.c:2240 +#: elf32-ppc.c:2243 msgid "warning: unable to set size of %s section in %B" msgstr "" -#: elf32-ppc.c:2290 +#: elf32-ppc.c:2293 msgid "failed to allocate space for new APUinfo section." msgstr "" -#: elf32-ppc.c:2309 +#: elf32-ppc.c:2312 msgid "failed to compute new APUinfo section." msgstr "" -#: elf32-ppc.c:2312 +#: elf32-ppc.c:2315 msgid "failed to install new APUinfo section." msgstr "" -#: elf32-ppc.c:3358 +#: elf32-ppc.c:3343 msgid "%B: relocation %s cannot be used when making a shared object" msgstr "" #. It does not make sense to have a procedure linkage #. table entry for a local symbol. -#: elf32-ppc.c:3702 -msgid "%B(%A+0x%lx): %s reloc against local symbol" +#: elf32-ppc.c:3687 +msgid "%H: %s reloc against local symbol\n" msgstr "" -#: elf32-ppc.c:4044 elf32-ppc.c:4059 elfxx-mips.c:12411 elfxx-mips.c:12437 -#: elfxx-mips.c:12459 elfxx-mips.c:12485 +#: elf32-ppc.c:4026 elf32-ppc.c:4041 elfxx-mips.c:12423 elfxx-mips.c:12449 +#: elfxx-mips.c:12471 elfxx-mips.c:12497 msgid "Warning: %B uses hard float, %B uses soft float" msgstr "" -#: elf32-ppc.c:4047 elf32-ppc.c:4051 +#: elf32-ppc.c:4029 elf32-ppc.c:4033 msgid "" "Warning: %B uses double-precision hard float, %B uses single-precision hard " "float" msgstr "" -#: elf32-ppc.c:4055 +#: elf32-ppc.c:4037 msgid "Warning: %B uses soft float, %B uses single-precision hard float" msgstr "" -#: elf32-ppc.c:4062 elf32-ppc.c:4066 elfxx-mips.c:12391 elfxx-mips.c:12395 +#: elf32-ppc.c:4044 elf32-ppc.c:4048 elfxx-mips.c:12403 elfxx-mips.c:12407 msgid "Warning: %B uses unknown floating point ABI %d" msgstr "" -#: elf32-ppc.c:4108 elf32-ppc.c:4112 +#: elf32-ppc.c:4090 elf32-ppc.c:4094 msgid "Warning: %B uses unknown vector ABI %d" msgstr "" -#: elf32-ppc.c:4116 +#: elf32-ppc.c:4098 msgid "Warning: %B uses vector ABI \"%s\", %B uses \"%s\"" msgstr "" -#: elf32-ppc.c:4133 elf32-ppc.c:4136 +#: elf32-ppc.c:4115 elf32-ppc.c:4118 msgid "Warning: %B uses r3/r4 for small structure returns, %B uses memory" msgstr "" -#: elf32-ppc.c:4139 elf32-ppc.c:4143 +#: elf32-ppc.c:4121 elf32-ppc.c:4125 msgid "Warning: %B uses unknown small structure return convention %d" msgstr "" -#: elf32-ppc.c:4197 +#: elf32-ppc.c:4179 msgid "" "%B: compiled with -mrelocatable and linked with modules compiled normally" msgstr "" -#: elf32-ppc.c:4205 +#: elf32-ppc.c:4187 msgid "" "%B: compiled normally and linked with modules compiled with -mrelocatable" msgstr "" -#: elf32-ppc.c:4293 +#: elf32-ppc.c:4275 msgid "Using bss-plt due to %B" msgstr "" -#: elf32-ppc.c:7192 elf64-ppc.c:12307 -msgid "%B: unknown relocation type %d for symbol %s" +#. Uh oh, we didn't find the expected call. We +#. could just mark this symbol to exclude it +#. from tls optimization but it's safer to skip +#. the entire optimization. +#: elf32-ppc.c:4771 elf64-ppc.c:7778 +msgid "%H arg lost __tls_get_addr, TLS optimization disabled\n" msgstr "" -#: elf32-ppc.c:7453 -msgid "%B(%A+0x%lx): non-zero addend on %s reloc against `%s'" +#: elf32-ppc.c:5006 elf64-ppc.c:6494 +#, c-format +msgid "dynamic variable `%s' is zero size\n" +msgstr "" + +#: elf32-ppc.c:7204 elf64-ppc.c:12431 +msgid "%B: unknown relocation type %d for symbol %s\n" +msgstr "" + +#: elf32-ppc.c:7465 +msgid "%H: non-zero addend on %s reloc against `%s'\n" msgstr "" -#: elf32-ppc.c:7651 elf64-ppc.c:12812 -msgid "%B(%A+0x%lx): relocation %s for indirect function %s unsupported" +#: elf32-ppc.c:7661 elf64-ppc.c:12936 +msgid "%H: relocation %s for indirect function %s unsupported\n" msgstr "" -#: elf32-ppc.c:7881 elf32-ppc.c:7911 elf32-ppc.c:7958 +#: elf32-ppc.c:7889 elf32-ppc.c:7919 elf32-ppc.c:7966 msgid "" -"%B: the target (%s) of a %s relocation is in the wrong output section (%s)" +"%B: the target (%s) of a %s relocation is in the wrong output section (%s)\n" msgstr "" -#: elf32-ppc.c:8030 -msgid "%B: relocation %s is not yet supported for symbol %s." +#: elf32-ppc.c:8038 +msgid "%B: relocation %s is not yet supported for symbol %s\n" msgstr "" -#: elf32-ppc.c:8138 elf64-ppc.c:13162 -msgid "%B(%A+0x%lx): %s reloc against `%s': error %d" +#: elf32-ppc.c:8097 elf64-ppc.c:13237 +msgid "%H: unresolvable %s relocation against symbol `%s'\n" msgstr "" -#: elf32-ppc.c:8629 +#: elf32-ppc.c:8144 elf64-ppc.c:13282 +msgid "%H: %s reloc against `%s': error %d\n" +msgstr "" + +#: elf32-ppc.c:8635 #, c-format -msgid "%s not defined in linker created %s" +msgid "%s not defined in linker created %s\n" msgstr "" -#: elf32-rx.c:544 +#: elf32-rx.c:553 msgid "%B:%A: Warning: deprecated Red Hat reloc " msgstr "" -#: elf32-rx.c:1086 +#: elf32-rx.c:1095 msgid "Warning: RX_SYM reloc with an unknown symbol" msgstr "" -#: elf32-rx.c:1251 +#: elf32-rx.c:1260 msgid "%B(%A): error: call to undefined function '%s'" msgstr "" -#: elf32-rx.c:1265 +#: elf32-rx.c:1274 msgid "%B(%A): warning: unaligned access to symbol '%s' in the small data area" msgstr "" -#: elf32-rx.c:1269 +#: elf32-rx.c:1278 msgid "%B(%A): internal error: out of range error" msgstr "" -#: elf32-rx.c:1273 +#: elf32-rx.c:1282 msgid "%B(%A): internal error: unsupported relocation error" msgstr "" -#: elf32-rx.c:1277 +#: elf32-rx.c:1286 msgid "%B(%A): internal error: dangerous relocation" msgstr "" -#: elf32-rx.c:1281 +#: elf32-rx.c:1290 msgid "%B(%A): internal error: unknown error" msgstr "" -#: elf32-rx.c:2928 +#: elf32-rx.c:2940 #, c-format msgid " [64-bit doubles]" msgstr "" -#: elf32-rx.c:2930 +#: elf32-rx.c:2942 #, c-format msgid " [dsp]" msgstr "" @@ -1986,7 +2096,7 @@ msgstr "" msgid "%B(%A+0x%lx): invalid instruction for TLS relocation %s" msgstr "" -#: elf32-score.c:1522 elf32-score7.c:1382 elfxx-mips.c:3323 +#: elf32-score.c:1522 elf32-score7.c:1382 elfxx-mips.c:3324 msgid "not enough GOT space for local GOT entries" msgstr "" @@ -2025,7 +2135,7 @@ msgstr "" msgid "%B: Unrecognised .directive command: %s" msgstr "" -#: elf32-sh-symbian.c:503 +#: elf32-sh-symbian.c:504 msgid "%B: Failed to add renamed symbol %s" msgstr "" @@ -2111,7 +2221,7 @@ msgstr "" msgid "%B: Function descriptor relocation with non-zero addend" msgstr "" -#: elf32-sh.c:6629 elf64-alpha.c:4560 +#: elf32-sh.c:6629 elf64-alpha.c:4648 msgid "%B: TLS local exec code cannot be linked into shared objects" msgstr "" @@ -2212,7 +2322,7 @@ msgstr "" msgid "overlay stub relocation overflow" msgstr "" -#: elf32-spu.c:1960 elf64-ppc.c:11327 +#: elf32-spu.c:1960 msgid "stubs don't match calculated size" msgstr "" @@ -2302,52 +2412,54 @@ msgstr "" msgid "%B(%s+0x%lx): unresolvable %s relocation against symbol `%s'" msgstr "" -#: elf32-tic6x.c:1539 -msgid "%B: SB-relative relocation but __c6xabi_DSBT_BASE not defined" +#: elf32-tic6x.c:1602 +msgid "warning: generating a shared library containing non-PIC code" +msgstr "" + +#: elf32-tic6x.c:1607 +msgid "warning: generating a shared library containing non-PID code" msgstr "" -#. Shared libraries and exception handling support not -#. implemented. -#: elf32-tic6x.c:1554 -msgid "%B: relocation type %d not implemented" +#: elf32-tic6x.c:2539 +msgid "%B: SB-relative relocation but __c6xabi_DSBT_BASE not defined" msgstr "" -#: elf32-tic6x.c:1640 +#: elf32-tic6x.c:2759 msgid "dangerous relocation" msgstr "" -#: elf32-tic6x.c:1788 elf32-tic6x.c:1796 +#: elf32-tic6x.c:3740 +msgid "%B: error: unknown mandatory EABI object attribute %d" +msgstr "" + +#: elf32-tic6x.c:3748 +msgid "%B: warning: unknown EABI object attribute %d" +msgstr "" + +#: elf32-tic6x.c:3860 elf32-tic6x.c:3868 msgid "error: %B requires more stack alignment than %B preserves" msgstr "" -#: elf32-tic6x.c:1806 elf32-tic6x.c:1815 +#: elf32-tic6x.c:3878 elf32-tic6x.c:3887 msgid "error: unknown Tag_ABI_array_object_alignment value in %B" msgstr "" -#: elf32-tic6x.c:1824 elf32-tic6x.c:1833 +#: elf32-tic6x.c:3896 elf32-tic6x.c:3905 msgid "error: unknown Tag_ABI_array_object_align_expected value in %B" msgstr "" -#: elf32-tic6x.c:1841 elf32-tic6x.c:1848 +#: elf32-tic6x.c:3913 elf32-tic6x.c:3920 msgid "error: %B requires more array alignment than %B preserves" msgstr "" -#: elf32-tic6x.c:1870 +#: elf32-tic6x.c:3942 msgid "warning: %B and %B differ in wchar_t size" msgstr "" -#: elf32-tic6x.c:1888 +#: elf32-tic6x.c:3960 msgid "warning: %B and %B differ in whether code is compiled for DSBT" msgstr "" -#: elf32-tic6x.c:1898 -msgid "warning: %B and %B differ in position-dependence of data addressing" -msgstr "" - -#: elf32-tic6x.c:1908 -msgid "warning: %B and %B differ in position-dependence of code addressing" -msgstr "" - #: elf32-v850.c:173 #, c-format msgid "Variable `%s' cannot occupy in multiple small data regions" @@ -2378,8 +2490,7 @@ msgid "" msgstr "" #: elf32-v850.c:483 -#, c-format -msgid "FAILED to find previous HI16 reloc\n" +msgid "FAILED to find previous HI16 reloc" msgstr "" #: elf32-v850.c:2155 @@ -2466,7 +2577,7 @@ msgstr "" msgid "%s: warning: %s relocation to 0x%x from %s section" msgstr "" -#: elf32-xstormy16.c:451 elf32-ia64.c:2861 elf64-ia64.c:2861 +#: elf32-xstormy16.c:451 elf32-ia64.c:2342 elf64-ia64.c:2342 msgid "non-zero addend in @fptr reloc" msgstr "" @@ -2525,52 +2636,52 @@ msgstr "" msgid "GPDISP relocation did not find ldah and lda instructions" msgstr "" -#: elf64-alpha.c:2408 +#: elf64-alpha.c:2495 msgid "%B: .got subsegment exceeds 64K (size %d)" msgstr "" -#: elf64-alpha.c:4304 elf64-alpha.c:4316 +#: elf64-alpha.c:4392 elf64-alpha.c:4404 msgid "%B: gp-relative relocation against dynamic symbol %s" msgstr "" -#: elf64-alpha.c:4342 elf64-alpha.c:4477 +#: elf64-alpha.c:4430 elf64-alpha.c:4565 msgid "%B: pc-relative relocation against dynamic symbol %s" msgstr "" -#: elf64-alpha.c:4370 +#: elf64-alpha.c:4458 msgid "%B: change in gp: BRSGP %s" msgstr "" -#: elf64-alpha.c:4395 +#: elf64-alpha.c:4483 msgid "" msgstr "" -#: elf64-alpha.c:4400 +#: elf64-alpha.c:4488 msgid "%B: !samegp reloc against symbol without .prologue: %s" msgstr "" -#: elf64-alpha.c:4452 +#: elf64-alpha.c:4540 msgid "%B: unhandled dynamic relocation against %s" msgstr "" -#: elf64-alpha.c:4484 +#: elf64-alpha.c:4572 msgid "%B: pc-relative relocation against undefined weak symbol %s" msgstr "" -#: elf64-alpha.c:4544 +#: elf64-alpha.c:4632 msgid "%B: dtp-relative relocation against dynamic symbol %s" msgstr "" -#: elf64-alpha.c:4567 +#: elf64-alpha.c:4655 msgid "%B: tp-relative relocation against dynamic symbol %s" msgstr "" -#: elf64-hppa.c:2101 +#: elf64-hppa.c:2094 #, c-format msgid "stub entry for %s cannot load .plt, dp offset = %ld" msgstr "" -#: elf64-hppa.c:3299 +#: elf64-hppa.c:3292 msgid "%B(%A+0x%lx): cannot reach %s" msgstr "" @@ -2578,8 +2689,8 @@ msgstr "" #, c-format msgid "" "%s: Internal inconsistency error for value for\n" -" linker-allocated global register: linked: 0x%lx%08lx != relaxed: 0x%lx%" -"08lx\n" +" linker-allocated global register: linked: 0x%lx%08lx != relaxed: 0x%lx" +"%08lx\n" msgstr "" #: elf64-mmix.c:1607 @@ -2633,67 +2744,84 @@ msgid "" " Please report this bug." msgstr "" -#: elf64-ppc.c:2741 libbfd.c:997 +#: elf64-ppc.c:2744 libbfd.c:1012 msgid "%B: compiled for a big endian system and target is little endian" msgstr "" -#: elf64-ppc.c:2744 libbfd.c:999 +#: elf64-ppc.c:2747 libbfd.c:1014 msgid "%B: compiled for a little endian system and target is big endian" msgstr "" -#: elf64-ppc.c:6473 +#: elf64-ppc.c:4160 +msgid "%B: cannot create stub entry %s\n" +msgstr "" + +#: elf64-ppc.c:6484 #, c-format msgid "" "copy reloc against `%s' requires lazy plt linking; avoid setting " -"LD_BIND_NOW=1 or upgrade gcc" +"LD_BIND_NOW=1 or upgrade gcc\n" msgstr "" -#: elf64-ppc.c:6901 -msgid "dynreloc miscount for %B, section %A" +#: elf64-ppc.c:6912 +msgid "dynreloc miscount for %B, section %A\n" msgstr "" -#: elf64-ppc.c:6985 +#: elf64-ppc.c:6996 msgid "%B: .opd is not a regular array of opd entries" msgstr "" -#: elf64-ppc.c:6994 +#: elf64-ppc.c:7005 msgid "%B: unexpected reloc type %u in .opd section" msgstr "" -#: elf64-ppc.c:7015 +#: elf64-ppc.c:7026 msgid "%B: undefined sym `%s' in .opd section" msgstr "" -#: elf64-ppc.c:7877 elf64-ppc.c:8392 +#: elf64-ppc.c:7584 +msgid "%H __tls_get_addr lost arg, TLS optimization disabled\n" +msgstr "" + +#: elf64-ppc.c:7929 elf64-ppc.c:8450 #, c-format msgid "%s defined on removed toc entry" msgstr "" -#: elf64-ppc.c:9459 +#: elf64-ppc.c:9474 +#, c-format +msgid "cannot find opd entry toc for %s\n" +msgstr "" + +#: elf64-ppc.c:9556 #, c-format -msgid "long branch stub `%s' offset overflow" +msgid "long branch stub `%s' offset overflow\n" msgstr "" -#: elf64-ppc.c:9518 +#: elf64-ppc.c:9615 #, c-format -msgid "can't find branch stub `%s'" +msgid "can't find branch stub `%s'\n" msgstr "" -#: elf64-ppc.c:9580 elf64-ppc.c:9716 +#: elf64-ppc.c:9677 elf64-ppc.c:9819 #, c-format -msgid "linkage table error against `%s'" +msgid "linkage table error against `%s'\n" msgstr "" -#: elf64-ppc.c:9886 +#: elf64-ppc.c:9993 #, c-format -msgid "can't build branch stub `%s'" +msgid "can't build branch stub `%s'\n" msgstr "" -#: elf64-ppc.c:10684 +#: elf64-ppc.c:10814 msgid "%B section %A exceeds stub group size" msgstr "" -#: elf64-ppc.c:11339 +#: elf64-ppc.c:11457 +msgid "stubs don't match calculated size\n" +msgstr "" + +#: elf64-ppc.c:11469 #, c-format msgid "" "linker stubs in %u group%s\n" @@ -2704,25 +2832,33 @@ msgid "" " plt call %lu" msgstr "" -#: elf64-ppc.c:12190 +#: elf64-ppc.c:11819 +msgid "%H: %s used with TLS symbol %s\n" +msgstr "" + +#: elf64-ppc.c:11820 +msgid "%H: %s used with non-TLS symbol %s\n" +msgstr "" + +#: elf64-ppc.c:12318 msgid "" -"%B(%A+0x%lx): automatic multiple TOCs not supported using your crt files; " -"recompile with -mminimal-toc or upgrade gcc" +"%H: automatic multiple TOCs not supported using your crt files; recompile " +"with -mminimal-toc or upgrade gcc\n" msgstr "" -#: elf64-ppc.c:12198 +#: elf64-ppc.c:12324 msgid "" -"%B(%A+0x%lx): sibling call optimization to `%s' does not allow automatic " -"multiple TOCs; recompile with -mminimal-toc or -fno-optimize-sibling-calls, " -"or make `%s' extern" +"%H: sibling call optimization to `%s' does not allow automatic multiple " +"TOCs; recompile with -mminimal-toc or -fno-optimize-sibling-calls, or make `" +"%s' extern\n" msgstr "" -#: elf64-ppc.c:12919 -msgid "%B: relocation %s is not supported for symbol %s." +#: elf64-ppc.c:13041 +msgid "%B: relocation %s is not supported for symbol %s\n" msgstr "" -#: elf64-ppc.c:13096 -msgid "%B: error: relocation %s not a multiple of %d" +#: elf64-ppc.c:13218 +msgid "%H: error: %s not a multiple of %u\n" msgstr "" #: elf64-sh64.c:1682 @@ -2730,68 +2866,72 @@ msgstr "" msgid "%s: error: unaligned relocation type %d at %08x reloc %08x\n" msgstr "" -#: elf64-sparc.c:444 +#: elf64-sparc.c:445 msgid "%B: Only registers %%g[2367] can be declared using STT_REGISTER" msgstr "" -#: elf64-sparc.c:464 +#: elf64-sparc.c:465 msgid "Register %%g%d used incompatibly: %s in %B, previously %s in %B" msgstr "" -#: elf64-sparc.c:487 +#: elf64-sparc.c:488 msgid "Symbol `%s' has differing types: REGISTER in %B, previously %s in %B" msgstr "" -#: elf64-sparc.c:532 +#: elf64-sparc.c:533 msgid "Symbol `%s' has differing types: %s in %B, previously REGISTER in %B" msgstr "" -#: elf64-sparc.c:684 +#: elf64-sparc.c:686 msgid "%B: linking UltraSPARC specific with HAL specific code" msgstr "" -#: elf64-x86-64.c:1360 +#: elf64-x86-64.c:1236 +msgid "%B: relocation %s against symbol `%s' isn't supported in x32 mode" +msgstr "" + +#: elf64-x86-64.c:1465 msgid "%B: '%s' accessed both as normal and thread local symbol" msgstr "" -#: elf64-x86-64.c:2801 +#: elf64-x86-64.c:2934 msgid "" "%B: relocation %s against STT_GNU_IFUNC symbol `%s' has non-zero addend: %d" msgstr "" -#: elf64-x86-64.c:3073 +#: elf64-x86-64.c:3193 msgid "" "%B: relocation R_X86_64_GOTOFF64 against protected function `%s' can not be " "used when making a shared object" msgstr "" -#: elf64-x86-64.c:3184 +#: elf64-x86-64.c:3305 msgid "; recompile with -fPIC" msgstr "" -#: elf64-x86-64.c:3189 +#: elf64-x86-64.c:3310 msgid "" "%B: relocation %s against %s `%s' can not be used when making a shared object" "%s" msgstr "" -#: elf64-x86-64.c:3191 +#: elf64-x86-64.c:3312 msgid "" "%B: relocation %s against undefined %s `%s' can not be used when making a " "shared object%s" msgstr "" -#: elfcode.h:826 +#: elfcode.h:827 #, c-format msgid "warning: %s has a corrupt string table index - ignoring" msgstr "" -#: elfcode.h:1236 +#: elfcode.h:1237 #, c-format msgid "%s: version count (%ld) does not match symbol count (%ld)" msgstr "" -#: elfcode.h:1476 +#: elfcode.h:1491 #, c-format msgid "%s(%s): relocation %d has invalid symbol index %ld" msgstr "" @@ -2818,315 +2958,333 @@ msgstr "" msgid "%s: TLS reference in %B mismatches non-TLS definition in %B section %A" msgstr "" -#: elflink.c:1763 +#: elflink.c:1764 msgid "%B: unexpected redefinition of indirect versioned symbol `%s'" msgstr "" -#: elflink.c:2076 +#: elflink.c:2077 msgid "%B: version node not found for symbol %s" msgstr "" -#: elflink.c:2166 +#: elflink.c:2167 msgid "" "%B: bad reloc symbol index (0x%lx >= 0x%lx) for offset 0x%lx in section `%A'" msgstr "" -#: elflink.c:2177 +#: elflink.c:2178 msgid "" "%B: non-zero symbol index (0x%lx) for offset 0x%lx in section `%A' when the " "object file has no symbol table" msgstr "" -#: elflink.c:2367 +#: elflink.c:2368 msgid "%B: relocation size mismatch in %B section %A" msgstr "" -#: elflink.c:2662 +#: elflink.c:2663 #, c-format msgid "warning: type and size of dynamic symbol `%s' are not defined" msgstr "" -#: elflink.c:3418 +#: elflink.c:3421 msgid "%P: alternate ELF machine code found (%d) in %B, expecting %d\n" msgstr "" -#: elflink.c:4050 +#: elflink.c:4067 msgid "%B: %s: invalid version %u (max %d)" msgstr "" -#: elflink.c:4086 +#: elflink.c:4103 msgid "%B: %s: invalid needed version %d" msgstr "" -#: elflink.c:4285 +#: elflink.c:4299 msgid "" "Warning: alignment %u of common symbol `%s' in %B is greater than the " "alignment (%u) of its section %A" msgstr "" -#: elflink.c:4291 +#: elflink.c:4305 msgid "Warning: alignment %u of symbol `%s' in %B is smaller than %u in %B" msgstr "" -#: elflink.c:4306 +#: elflink.c:4320 msgid "Warning: size of symbol `%s' changed from %lu in %B to %lu in %B" msgstr "" -#: elflink.c:4472 +#: elflink.c:4489 msgid "%B: undefined reference to symbol '%s'" msgstr "" -#: elflink.c:4475 +#: elflink.c:4492 msgid "" "note: '%s' is defined in DSO %B so try adding it to the linker command line" msgstr "" -#: elflink.c:5779 +#: elflink.c:5795 #, c-format msgid "%s: undefined version: %s" msgstr "" -#: elflink.c:5847 +#: elflink.c:5863 msgid "%B: .preinit_array section is not allowed in DSO" msgstr "" -#: elflink.c:7598 +#: elflink.c:7617 #, c-format msgid "undefined %s reference in complex symbol: %s" msgstr "" -#: elflink.c:7752 +#: elflink.c:7771 #, c-format msgid "unknown operator '%c' in complex symbol" msgstr "" -#: elflink.c:8091 elflink.c:8108 elflink.c:8145 elflink.c:8162 +#: elflink.c:8110 elflink.c:8127 elflink.c:8164 elflink.c:8181 msgid "%B: Unable to sort relocs - they are in more than one size" msgstr "" -#: elflink.c:8122 elflink.c:8176 +#: elflink.c:8141 elflink.c:8195 msgid "%B: Unable to sort relocs - they are of an unknown size" msgstr "" -#: elflink.c:8227 +#: elflink.c:8246 msgid "Not enough memory to sort relocations" msgstr "" -#: elflink.c:8420 +#: elflink.c:8439 msgid "%B: Too many sections: %d (>= %d)" msgstr "" -#: elflink.c:8663 -msgid "%B: %s symbol `%s' in %B is referenced by DSO" +#: elflink.c:8686 +msgid "%B: internal symbol `%s' in %B is referenced by DSO" +msgstr "" + +#: elflink.c:8688 +msgid "%B: hidden symbol `%s' in %B is referenced by DSO" msgstr "" -#: elflink.c:8754 +#: elflink.c:8690 +msgid "%B: local symbol `%s' in %B is referenced by DSO" +msgstr "" + +#: elflink.c:8785 msgid "%B: could not find output section %A for input section %A" msgstr "" -#: elflink.c:8874 -msgid "%B: %s symbol `%s' isn't defined" +#: elflink.c:8908 +msgid "%B: protected symbol `%s' isn't defined" msgstr "" -#: elflink.c:9428 -msgid "" -"error: %B contains a reloc (0x%s) for section %A that references a non-" -"existent global symbol" +#: elflink.c:8910 +msgid "%B: internal symbol `%s' isn't defined" msgstr "" -#: elflink.c:9494 +#: elflink.c:8912 +msgid "%B: hidden symbol `%s' isn't defined" +msgstr "" + +#: elflink.c:9441 +msgid "error: %B: size of section %A is not multiple of address size" +msgstr "" + +#: elflink.c:9488 msgid "" -"%X`%s' referenced in section `%A' of %B: defined in discarded section `%A' " -"of %B\n" +"error: %B contains a reloc (0x%s) for section %A that references a non-" +"existent global symbol" msgstr "" -#: elflink.c:10141 +#: elflink.c:10223 msgid "%A has both ordered [`%A' in %B] and unordered [`%A' in %B] sections" msgstr "" -#: elflink.c:10146 +#: elflink.c:10228 #, c-format msgid "%A has both ordered and unordered sections" msgstr "" -#: elflink.c:10992 elflink.c:11036 +#: elflink.c:10793 +msgid "%B: file class %s incompatible with %s" +msgstr "" + +#: elflink.c:11104 elflink.c:11148 msgid "%B: could not find output section %s" msgstr "" -#: elflink.c:10997 +#: elflink.c:11109 #, c-format msgid "warning: %s section has zero size" msgstr "" -#: elflink.c:11102 +#: elflink.c:11214 msgid "%P: warning: creating a DT_TEXTREL in a shared object.\n" msgstr "" -#: elflink.c:11289 +#: elflink.c:11401 msgid "%P%X: can not read symbols: %E\n" msgstr "" -#: elflink.c:11638 +#: elflink.c:11750 msgid "Removing unused section '%s' in file '%B'" msgstr "" -#: elflink.c:11850 +#: elflink.c:11962 msgid "Warning: gc-sections option ignored" msgstr "" -#: elflink.c:12399 +#: elflink.c:12511 msgid "%B: ignoring duplicate section `%A'" msgstr "" -#: elflink.c:12406 elflink.c:12413 +#: elflink.c:12518 elflink.c:12525 msgid "%B: duplicate section `%A' has different size" msgstr "" -#: elflink.c:12421 elflink.c:12426 +#: elflink.c:12533 elflink.c:12538 msgid "%B: warning: could not read contents of section `%A'" msgstr "" -#: elflink.c:12430 +#: elflink.c:12542 msgid "%B: warning: duplicate section `%A' has different contents" msgstr "" -#: elflink.c:12531 linker.c:3138 +#: elflink.c:12643 linker.c:3086 msgid "%F%P: already_linked_table: %E\n" msgstr "" -#: elfxx-mips.c:1220 +#: elfxx-mips.c:1221 msgid "static procedure (no name)" msgstr "" -#: elfxx-mips.c:5623 +#: elfxx-mips.c:5628 msgid "" "%B: %A+0x%lx: Direct jumps between ISA modes are not allowed; consider " "recompiling with interlinking enabled." msgstr "" -#: elfxx-mips.c:6280 elfxx-mips.c:6503 +#: elfxx-mips.c:6288 elfxx-mips.c:6511 msgid "%B: Warning: bad `%s' option size %u smaller than its header" msgstr "" -#: elfxx-mips.c:7254 elfxx-mips.c:7379 +#: elfxx-mips.c:7262 elfxx-mips.c:7387 msgid "%B: Warning: cannot determine the target function for stub section `%s'" msgstr "" -#: elfxx-mips.c:7508 +#: elfxx-mips.c:7516 msgid "%B: Malformed reloc detected for section %s" msgstr "" -#: elfxx-mips.c:7548 +#: elfxx-mips.c:7556 msgid "%B: GOT reloc at 0x%lx not expected in executables" msgstr "" -#: elfxx-mips.c:7670 +#: elfxx-mips.c:7678 msgid "%B: CALL16 reloc at 0x%lx not against global symbol" msgstr "" -#: elfxx-mips.c:8365 +#: elfxx-mips.c:8372 #, c-format msgid "non-dynamic relocations refer to dynamic symbol %s" msgstr "" -#: elfxx-mips.c:9068 +#: elfxx-mips.c:9075 msgid "" -"%B: Can't find matching LO16 reloc against `%s' for %s at 0x%lx in section `%" -"A'" +"%B: Can't find matching LO16 reloc against `%s' for %s at 0x%lx in section `" +"%A'" msgstr "" -#: elfxx-mips.c:9207 +#: elfxx-mips.c:9214 msgid "" "small-data section exceeds 64KB; lower small-data size limit (see option -G)" msgstr "" -#: elfxx-mips.c:12027 +#: elfxx-mips.c:12038 #, c-format msgid "%s: illegal section name `%s'" msgstr "" -#: elfxx-mips.c:12405 elfxx-mips.c:12431 +#: elfxx-mips.c:12417 elfxx-mips.c:12443 msgid "Warning: %B uses -msingle-float, %B uses -mdouble-float" msgstr "" -#: elfxx-mips.c:12417 elfxx-mips.c:12473 +#: elfxx-mips.c:12429 elfxx-mips.c:12485 msgid "Warning: %B uses -msingle-float, %B uses -mips32r2 -mfp64" msgstr "" -#: elfxx-mips.c:12443 elfxx-mips.c:12479 +#: elfxx-mips.c:12455 elfxx-mips.c:12491 msgid "Warning: %B uses -mdouble-float, %B uses -mips32r2 -mfp64" msgstr "" -#: elfxx-mips.c:12521 +#: elfxx-mips.c:12533 msgid "%B: endianness incompatible with that of the selected emulation" msgstr "" -#: elfxx-mips.c:12532 +#: elfxx-mips.c:12544 msgid "%B: ABI is incompatible with that of the selected emulation" msgstr "" -#: elfxx-mips.c:12613 +#: elfxx-mips.c:12628 msgid "%B: warning: linking abicalls files with non-abicalls files" msgstr "" -#: elfxx-mips.c:12630 +#: elfxx-mips.c:12645 msgid "%B: linking 32-bit code with 64-bit code" msgstr "" -#: elfxx-mips.c:12658 +#: elfxx-mips.c:12673 msgid "%B: linking %s module with previous %s modules" msgstr "" -#: elfxx-mips.c:12681 +#: elfxx-mips.c:12696 msgid "%B: ABI mismatch: linking %s module with previous %s modules" msgstr "" -#: elfxx-mips.c:12845 +#: elfxx-mips.c:12860 #, c-format msgid " [abi=O32]" msgstr "" -#: elfxx-mips.c:12847 +#: elfxx-mips.c:12862 #, c-format msgid " [abi=O64]" msgstr "" -#: elfxx-mips.c:12849 +#: elfxx-mips.c:12864 #, c-format msgid " [abi=EABI32]" msgstr "" -#: elfxx-mips.c:12851 +#: elfxx-mips.c:12866 #, c-format msgid " [abi=EABI64]" msgstr "" -#: elfxx-mips.c:12853 +#: elfxx-mips.c:12868 #, c-format msgid " [abi unknown]" msgstr "" -#: elfxx-mips.c:12855 +#: elfxx-mips.c:12870 #, c-format msgid " [abi=N32]" msgstr "" -#: elfxx-mips.c:12857 +#: elfxx-mips.c:12872 #, c-format msgid " [abi=64]" msgstr "" -#: elfxx-mips.c:12859 +#: elfxx-mips.c:12874 #, c-format msgid " [no abi set]" msgstr "" -#: elfxx-mips.c:12880 +#: elfxx-mips.c:12895 #, c-format msgid " [unknown ISA]" msgstr "" -#: elfxx-mips.c:12891 +#: elfxx-mips.c:12906 #, c-format msgid " [not 32bitmode]" msgstr "" @@ -3223,86 +3381,150 @@ msgstr "" msgid "%B: unable to get decompressed section %A" msgstr "" -#: libbfd.c:1027 +#: libbfd.c:1043 #, c-format msgid "Deprecated %s called at %s line %d in %s\n" msgstr "" -#: libbfd.c:1030 +#: libbfd.c:1046 #, c-format msgid "Deprecated %s called\n" msgstr "" -#: linker.c:1911 +#: linker.c:1859 msgid "%B: indirect symbol `%s' to `%s' is a loop" msgstr "" -#: linker.c:2778 +#: linker.c:2726 #, c-format msgid "Attempt to do relocatable link with %s input and %s output" msgstr "" -#: linker.c:3105 +#: linker.c:3053 msgid "%B: warning: ignoring duplicate section `%A'\n" msgstr "" -#: linker.c:3119 +#: linker.c:3067 msgid "%B: warning: duplicate section `%A' has different size\n" msgstr "" -#: mach-o.c:3403 +#: mach-o.c:381 +msgid "bfd_mach_o_canonicalize_symtab: unable to load symbols" +msgstr "" + +#: mach-o.c:1253 +#, c-format +msgid "unable to write unknown load command 0x%lx" +msgstr "" + +#: mach-o.c:1654 +#, c-format +msgid "bfd_mach_o_read_symtab_symbol: unable to read %d bytes at %lu" +msgstr "" + +#: mach-o.c:1671 +#, c-format +msgid "bfd_mach_o_read_symtab_symbol: symbol name out of range (%lu >= %lu)" +msgstr "" + +#: mach-o.c:1756 +#, c-format +msgid "" +"bfd_mach_o_read_symtab_symbol: symbol \"%s\" specified invalid section %d " +"(max %lu): setting to undefined" +msgstr "" + +#: mach-o.c:1764 +#, c-format +msgid "" +"bfd_mach_o_read_symtab_symbol: symbol \"%s\" is unsupported 'indirect' " +"reference: setting to undefined" +msgstr "" + +#: mach-o.c:1770 +#, c-format +msgid "" +"bfd_mach_o_read_symtab_symbol: symbol \"%s\" specified invalid type field 0x" +"%x: setting to undefined" +msgstr "" + +#: mach-o.c:1840 +msgid "bfd_mach_o_read_symtab_symbols: unable to allocate memory for symbols" +msgstr "" + +#: mach-o.c:1874 +#, c-format +msgid "bfd_mach_o_read_dysymtab_symbol: unable to read %lu bytes at %lu" +msgstr "" + +#: mach-o.c:2556 +#, c-format +msgid "unable to read unknown load command 0x%lx" +msgstr "" + +#: mach-o.c:2736 +#, c-format +msgid "bfd_mach_o_scan: unknown architecture 0x%lx/0x%lx" +msgstr "" + +#: mach-o.c:2832 +#, c-format +msgid "unknown header byte-order value 0x%lx" +msgstr "" + +#: mach-o.c:3402 msgid "Mach-O header:\n" msgstr "" -#: mach-o.c:3404 +#: mach-o.c:3403 #, c-format msgid " magic : %08lx\n" msgstr "" -#: mach-o.c:3405 +#: mach-o.c:3404 #, c-format msgid " cputype : %08lx (%s)\n" msgstr "" -#: mach-o.c:3407 +#: mach-o.c:3406 #, c-format msgid " cpusubtype: %08lx\n" msgstr "" -#: mach-o.c:3408 +#: mach-o.c:3407 #, c-format msgid " filetype : %08lx (%s)\n" msgstr "" -#: mach-o.c:3411 +#: mach-o.c:3410 #, c-format msgid " ncmds : %08lx (%lu)\n" msgstr "" -#: mach-o.c:3412 +#: mach-o.c:3411 #, c-format msgid " sizeofcmds: %08lx\n" msgstr "" -#: mach-o.c:3413 +#: mach-o.c:3412 #, c-format msgid " flags : %08lx (" msgstr "" -#: mach-o.c:3415 vms-alpha.c:7652 +#: mach-o.c:3414 vms-alpha.c:7671 msgid ")\n" msgstr "" -#: mach-o.c:3416 +#: mach-o.c:3415 #, c-format msgid " reserved : %08x\n" msgstr "" -#: mach-o.c:3426 +#: mach-o.c:3425 msgid "Segments and Sections:\n" msgstr "" -#: mach-o.c:3427 +#: mach-o.c:3426 msgid " #: Segment name Section name Address\n" msgstr "" @@ -3415,8 +3637,8 @@ msgstr "" #: mmo.c:2889 #, c-format msgid "" -"%s: Bad symbol definition: `Main' set to %s rather than the start address %" -"s\n" +"%s: Bad symbol definition: `Main' set to %s rather than the start address " +"%s\n" msgstr "" #: mmo.c:2981 @@ -3449,8 +3671,8 @@ msgstr "" #: mmo.c:3140 #, c-format msgid "" -"%s: invalid start address for initialized registers of length %ld: 0x%lx%" -"08lx\n" +"%s: invalid start address for initialized registers of length %ld: 0x%lx" +"%08lx\n" msgstr "" #: oasys.c:882 @@ -3483,6 +3705,11 @@ msgstr "" msgid "%B: bad pair/reflo after refhi\n" msgstr "" +#: pef.c:519 +#, c-format +msgid "bfd_pef_scan: unknown architecture 0x%lx" +msgstr "" + #: pei-x86_64.c:444 #, c-format msgid "warning: .pdata section size (%ld) is not a multiple of %d\n" @@ -3581,6 +3808,11 @@ msgstr "" msgid "Partition[%d] length = 0x%.8lx (%ld)\n" msgstr "" +#: rs6000-core.c:448 +#, c-format +msgid "%s: warning core file truncated" +msgstr "" + #: som.c:5471 #, c-format msgid "" @@ -3608,32 +3840,32 @@ msgstr "" msgid "Unsupported .stab relocation" msgstr "" -#: vms-alpha.c:1287 +#: vms-alpha.c:1299 #, c-format msgid "Unknown EGSD subtype %d" msgstr "" -#: vms-alpha.c:1318 +#: vms-alpha.c:1330 #, c-format msgid "Stack overflow (%d) in _bfd_vms_push" msgstr "" -#: vms-alpha.c:1331 +#: vms-alpha.c:1343 msgid "Stack underflow in _bfd_vms_pop" msgstr "" #. These names have not yet been added to this switch statement. -#: vms-alpha.c:1568 +#: vms-alpha.c:1580 #, c-format msgid "unknown ETIR command %d" msgstr "" -#: vms-alpha.c:1755 +#: vms-alpha.c:1767 #, c-format msgid "bad section index in %s" msgstr "" -#: vms-alpha.c:1768 +#: vms-alpha.c:1780 #, c-format msgid "unsupported STA cmd %s" msgstr "" @@ -3643,1851 +3875,1851 @@ msgstr "" #. Rotate. #. Redefine symbol to current location. #. Define a literal. -#: vms-alpha.c:1944 vms-alpha.c:1975 vms-alpha.c:2222 +#: vms-alpha.c:1956 vms-alpha.c:1987 vms-alpha.c:2234 #, c-format msgid "%s: not supported" msgstr "" -#: vms-alpha.c:1950 +#: vms-alpha.c:1962 #, c-format msgid "%s: not implemented" msgstr "" -#: vms-alpha.c:2206 +#: vms-alpha.c:2218 #, c-format msgid "invalid use of %s with contexts" msgstr "" -#: vms-alpha.c:2240 +#: vms-alpha.c:2252 #, c-format msgid "reserved cmd %d" msgstr "" -#: vms-alpha.c:2325 +#: vms-alpha.c:2337 msgid "Object module NOT error-free !\n" msgstr "" -#: vms-alpha.c:2754 +#: vms-alpha.c:2766 #, c-format msgid "Symbol %s replaced by %s\n" msgstr "" -#: vms-alpha.c:3757 +#: vms-alpha.c:3769 #, c-format msgid "SEC_RELOC with no relocs in section %s" msgstr "" -#: vms-alpha.c:3810 vms-alpha.c:4041 +#: vms-alpha.c:3822 vms-alpha.c:4053 #, c-format msgid "Size error in section %s" msgstr "" -#: vms-alpha.c:3980 +#: vms-alpha.c:3992 msgid "Spurious ALPHA_R_BSR reloc" msgstr "" -#: vms-alpha.c:4028 +#: vms-alpha.c:4040 #, c-format msgid "Unhandled relocation %s" msgstr "" -#: vms-alpha.c:4318 +#: vms-alpha.c:4330 #, c-format msgid "unknown source command %d" msgstr "" -#: vms-alpha.c:4379 +#: vms-alpha.c:4391 msgid "DST__K_SET_LINUM_INCR not implemented" msgstr "" -#: vms-alpha.c:4385 +#: vms-alpha.c:4397 msgid "DST__K_SET_LINUM_INCR_W not implemented" msgstr "" -#: vms-alpha.c:4391 +#: vms-alpha.c:4403 msgid "DST__K_RESET_LINUM_INCR not implemented" msgstr "" -#: vms-alpha.c:4397 +#: vms-alpha.c:4409 msgid "DST__K_BEG_STMT_MODE not implemented" msgstr "" -#: vms-alpha.c:4403 +#: vms-alpha.c:4415 msgid "DST__K_END_STMT_MODE not implemented" msgstr "" -#: vms-alpha.c:4430 +#: vms-alpha.c:4442 msgid "DST__K_SET_PC not implemented" msgstr "" -#: vms-alpha.c:4436 +#: vms-alpha.c:4448 msgid "DST__K_SET_PC_W not implemented" msgstr "" -#: vms-alpha.c:4442 +#: vms-alpha.c:4454 msgid "DST__K_SET_PC_L not implemented" msgstr "" -#: vms-alpha.c:4448 +#: vms-alpha.c:4460 msgid "DST__K_SET_STMTNUM not implemented" msgstr "" -#: vms-alpha.c:4491 +#: vms-alpha.c:4503 #, c-format msgid "unknown line command %d" msgstr "" -#: vms-alpha.c:4938 vms-alpha.c:4955 vms-alpha.c:4969 vms-alpha.c:4984 -#: vms-alpha.c:4996 vms-alpha.c:5007 vms-alpha.c:5019 +#: vms-alpha.c:4957 vms-alpha.c:4974 vms-alpha.c:4988 vms-alpha.c:5003 +#: vms-alpha.c:5015 vms-alpha.c:5026 vms-alpha.c:5038 #, c-format msgid "Unknown reloc %s + %s" msgstr "" -#: vms-alpha.c:5074 +#: vms-alpha.c:5093 #, c-format msgid "Unknown reloc %s" msgstr "" -#: vms-alpha.c:5087 +#: vms-alpha.c:5106 msgid "Invalid section index in ETIR" msgstr "" -#: vms-alpha.c:5134 +#: vms-alpha.c:5153 #, c-format msgid "Unknown symbol in command %s" msgstr "" -#: vms-alpha.c:5649 +#: vms-alpha.c:5668 #, c-format msgid " EMH %u (len=%u): " msgstr "" -#: vms-alpha.c:5658 +#: vms-alpha.c:5677 #, c-format msgid "Module header\n" msgstr "" -#: vms-alpha.c:5659 +#: vms-alpha.c:5678 #, c-format msgid " structure level: %u\n" msgstr "" -#: vms-alpha.c:5660 +#: vms-alpha.c:5679 #, c-format msgid " max record size: %u\n" msgstr "" -#: vms-alpha.c:5663 +#: vms-alpha.c:5682 #, c-format msgid " module name : %.*s\n" msgstr "" -#: vms-alpha.c:5665 +#: vms-alpha.c:5684 #, c-format msgid " module version : %.*s\n" msgstr "" -#: vms-alpha.c:5667 +#: vms-alpha.c:5686 #, c-format msgid " compile date : %.17s\n" msgstr "" -#: vms-alpha.c:5672 +#: vms-alpha.c:5691 #, c-format msgid "Language Processor Name\n" msgstr "" -#: vms-alpha.c:5673 +#: vms-alpha.c:5692 #, c-format msgid " language name: %.*s\n" msgstr "" -#: vms-alpha.c:5680 +#: vms-alpha.c:5699 #, c-format msgid "Source Files Header\n" msgstr "" -#: vms-alpha.c:5681 +#: vms-alpha.c:5700 #, c-format msgid " file: %.*s\n" msgstr "" -#: vms-alpha.c:5688 +#: vms-alpha.c:5707 #, c-format msgid "Title Text Header\n" msgstr "" -#: vms-alpha.c:5689 +#: vms-alpha.c:5708 #, c-format msgid " title: %.*s\n" msgstr "" -#: vms-alpha.c:5696 +#: vms-alpha.c:5715 #, c-format msgid "Copyright Header\n" msgstr "" -#: vms-alpha.c:5697 +#: vms-alpha.c:5716 #, c-format msgid " copyright: %.*s\n" msgstr "" -#: vms-alpha.c:5703 +#: vms-alpha.c:5722 #, c-format msgid "unhandled emh subtype %u\n" msgstr "" -#: vms-alpha.c:5713 +#: vms-alpha.c:5732 #, c-format msgid " EEOM (len=%u):\n" msgstr "" -#: vms-alpha.c:5714 +#: vms-alpha.c:5733 #, c-format msgid " number of cond linkage pairs: %u\n" msgstr "" -#: vms-alpha.c:5716 +#: vms-alpha.c:5735 #, c-format msgid " completion code: %u\n" msgstr "" -#: vms-alpha.c:5720 +#: vms-alpha.c:5739 #, c-format msgid " transfer addr flags: 0x%02x\n" msgstr "" -#: vms-alpha.c:5721 +#: vms-alpha.c:5740 #, c-format msgid " transfer addr psect: %u\n" msgstr "" -#: vms-alpha.c:5723 +#: vms-alpha.c:5742 #, c-format msgid " transfer address : 0x%08x\n" msgstr "" -#: vms-alpha.c:5732 +#: vms-alpha.c:5751 msgid " WEAK" msgstr "" -#: vms-alpha.c:5734 +#: vms-alpha.c:5753 msgid " DEF" msgstr "" -#: vms-alpha.c:5736 +#: vms-alpha.c:5755 msgid " UNI" msgstr "" -#: vms-alpha.c:5738 vms-alpha.c:5759 +#: vms-alpha.c:5757 vms-alpha.c:5778 msgid " REL" msgstr "" -#: vms-alpha.c:5740 +#: vms-alpha.c:5759 msgid " COMM" msgstr "" -#: vms-alpha.c:5742 +#: vms-alpha.c:5761 msgid " VECEP" msgstr "" -#: vms-alpha.c:5744 +#: vms-alpha.c:5763 msgid " NORM" msgstr "" -#: vms-alpha.c:5746 +#: vms-alpha.c:5765 msgid " QVAL" msgstr "" -#: vms-alpha.c:5753 +#: vms-alpha.c:5772 msgid " PIC" msgstr "" -#: vms-alpha.c:5755 +#: vms-alpha.c:5774 msgid " LIB" msgstr "" -#: vms-alpha.c:5757 +#: vms-alpha.c:5776 msgid " OVR" msgstr "" -#: vms-alpha.c:5761 +#: vms-alpha.c:5780 msgid " GBL" msgstr "" -#: vms-alpha.c:5763 +#: vms-alpha.c:5782 msgid " SHR" msgstr "" -#: vms-alpha.c:5765 +#: vms-alpha.c:5784 msgid " EXE" msgstr "" -#: vms-alpha.c:5767 +#: vms-alpha.c:5786 msgid " RD" msgstr "" -#: vms-alpha.c:5769 +#: vms-alpha.c:5788 msgid " WRT" msgstr "" -#: vms-alpha.c:5771 +#: vms-alpha.c:5790 msgid " VEC" msgstr "" -#: vms-alpha.c:5773 +#: vms-alpha.c:5792 msgid " NOMOD" msgstr "" -#: vms-alpha.c:5775 +#: vms-alpha.c:5794 msgid " COM" msgstr "" -#: vms-alpha.c:5777 +#: vms-alpha.c:5796 msgid " 64B" msgstr "" -#: vms-alpha.c:5786 +#: vms-alpha.c:5805 #, c-format msgid " EGSD (len=%u):\n" msgstr "" -#: vms-alpha.c:5798 +#: vms-alpha.c:5817 #, c-format msgid " EGSD entry %2u (type: %u, len: %u): " msgstr "" -#: vms-alpha.c:5810 +#: vms-alpha.c:5829 #, c-format msgid "PSC - Program section definition\n" msgstr "" -#: vms-alpha.c:5811 vms-alpha.c:5828 +#: vms-alpha.c:5830 vms-alpha.c:5847 #, c-format msgid " alignment : 2**%u\n" msgstr "" -#: vms-alpha.c:5812 vms-alpha.c:5829 +#: vms-alpha.c:5831 vms-alpha.c:5848 #, c-format msgid " flags : 0x%04x" msgstr "" -#: vms-alpha.c:5816 +#: vms-alpha.c:5835 #, c-format msgid " alloc (len): %u (0x%08x)\n" msgstr "" -#: vms-alpha.c:5817 vms-alpha.c:5874 vms-alpha.c:5923 +#: vms-alpha.c:5836 vms-alpha.c:5893 vms-alpha.c:5942 #, c-format msgid " name : %.*s\n" msgstr "" -#: vms-alpha.c:5827 +#: vms-alpha.c:5846 #, c-format msgid "SPSC - Shared Image Program section def\n" msgstr "" -#: vms-alpha.c:5833 +#: vms-alpha.c:5852 #, c-format msgid " alloc (len) : %u (0x%08x)\n" msgstr "" -#: vms-alpha.c:5834 +#: vms-alpha.c:5853 #, c-format msgid " image offset : 0x%08x\n" msgstr "" -#: vms-alpha.c:5836 +#: vms-alpha.c:5855 #, c-format msgid " symvec offset : 0x%08x\n" msgstr "" -#: vms-alpha.c:5838 +#: vms-alpha.c:5857 #, c-format msgid " name : %.*s\n" msgstr "" -#: vms-alpha.c:5851 +#: vms-alpha.c:5870 #, c-format msgid "SYM - Global symbol definition\n" msgstr "" -#: vms-alpha.c:5852 vms-alpha.c:5912 vms-alpha.c:5933 vms-alpha.c:5952 +#: vms-alpha.c:5871 vms-alpha.c:5931 vms-alpha.c:5952 vms-alpha.c:5971 #, c-format msgid " flags: 0x%04x" msgstr "" -#: vms-alpha.c:5855 +#: vms-alpha.c:5874 #, c-format msgid " psect offset: 0x%08x\n" msgstr "" -#: vms-alpha.c:5859 +#: vms-alpha.c:5878 #, c-format msgid " code address: 0x%08x\n" msgstr "" -#: vms-alpha.c:5861 +#: vms-alpha.c:5880 #, c-format msgid " psect index for entry point : %u\n" msgstr "" -#: vms-alpha.c:5864 vms-alpha.c:5940 vms-alpha.c:5959 +#: vms-alpha.c:5883 vms-alpha.c:5959 vms-alpha.c:5978 #, c-format msgid " psect index : %u\n" msgstr "" -#: vms-alpha.c:5866 vms-alpha.c:5942 vms-alpha.c:5961 +#: vms-alpha.c:5885 vms-alpha.c:5961 vms-alpha.c:5980 #, c-format msgid " name : %.*s\n" msgstr "" -#: vms-alpha.c:5873 +#: vms-alpha.c:5892 #, c-format msgid "SYM - Global symbol reference\n" msgstr "" -#: vms-alpha.c:5885 +#: vms-alpha.c:5904 #, c-format msgid "IDC - Ident Consistency check\n" msgstr "" -#: vms-alpha.c:5886 +#: vms-alpha.c:5905 #, c-format msgid " flags : 0x%08x" msgstr "" -#: vms-alpha.c:5890 +#: vms-alpha.c:5909 #, c-format msgid " id match : %x\n" msgstr "" -#: vms-alpha.c:5892 +#: vms-alpha.c:5911 #, c-format msgid " error severity: %x\n" msgstr "" -#: vms-alpha.c:5895 +#: vms-alpha.c:5914 #, c-format msgid " entity name : %.*s\n" msgstr "" -#: vms-alpha.c:5897 +#: vms-alpha.c:5916 #, c-format msgid " object name : %.*s\n" msgstr "" -#: vms-alpha.c:5900 +#: vms-alpha.c:5919 #, c-format msgid " binary ident : 0x%08x\n" msgstr "" -#: vms-alpha.c:5903 +#: vms-alpha.c:5922 #, c-format msgid " ascii ident : %.*s\n" msgstr "" -#: vms-alpha.c:5911 +#: vms-alpha.c:5930 #, c-format msgid "SYMG - Universal symbol definition\n" msgstr "" -#: vms-alpha.c:5915 +#: vms-alpha.c:5934 #, c-format msgid " symbol vector offset: 0x%08x\n" msgstr "" -#: vms-alpha.c:5917 +#: vms-alpha.c:5936 #, c-format msgid " entry point: 0x%08x\n" msgstr "" -#: vms-alpha.c:5919 +#: vms-alpha.c:5938 #, c-format msgid " proc descr : 0x%08x\n" msgstr "" -#: vms-alpha.c:5921 +#: vms-alpha.c:5940 #, c-format msgid " psect index: %u\n" msgstr "" -#: vms-alpha.c:5932 +#: vms-alpha.c:5951 #, c-format msgid "SYMV - Vectored symbol definition\n" msgstr "" -#: vms-alpha.c:5936 +#: vms-alpha.c:5955 #, c-format msgid " vector : 0x%08x\n" msgstr "" -#: vms-alpha.c:5938 vms-alpha.c:5957 +#: vms-alpha.c:5957 vms-alpha.c:5976 #, c-format msgid " psect offset: %u\n" msgstr "" -#: vms-alpha.c:5951 +#: vms-alpha.c:5970 #, c-format msgid "SYMM - Global symbol definition with version\n" msgstr "" -#: vms-alpha.c:5955 +#: vms-alpha.c:5974 #, c-format msgid " version mask: 0x%08x\n" msgstr "" -#: vms-alpha.c:5966 +#: vms-alpha.c:5985 #, c-format msgid "unhandled egsd entry type %u\n" msgstr "" -#: vms-alpha.c:6000 +#: vms-alpha.c:6019 #, c-format msgid " linkage index: %u, replacement insn: 0x%08x\n" msgstr "" -#: vms-alpha.c:6003 +#: vms-alpha.c:6022 #, c-format msgid " psect idx 1: %u, offset 1: 0x%08x %08x\n" msgstr "" -#: vms-alpha.c:6007 +#: vms-alpha.c:6026 #, c-format msgid " psect idx 2: %u, offset 2: 0x%08x %08x\n" msgstr "" -#: vms-alpha.c:6012 +#: vms-alpha.c:6031 #, c-format msgid " psect idx 3: %u, offset 3: 0x%08x %08x\n" msgstr "" -#: vms-alpha.c:6017 +#: vms-alpha.c:6036 #, c-format msgid " global name: %.*s\n" msgstr "" -#: vms-alpha.c:6027 +#: vms-alpha.c:6046 #, c-format msgid " %s (len=%u+%u):\n" msgstr "" -#: vms-alpha.c:6042 +#: vms-alpha.c:6061 #, c-format msgid " (type: %3u, size: 4+%3u): " msgstr "" -#: vms-alpha.c:6046 +#: vms-alpha.c:6065 #, c-format msgid "STA_GBL (stack global) %.*s\n" msgstr "" -#: vms-alpha.c:6050 +#: vms-alpha.c:6069 #, c-format msgid "STA_LW (stack longword) 0x%08x\n" msgstr "" -#: vms-alpha.c:6054 +#: vms-alpha.c:6073 #, c-format msgid "STA_QW (stack quadword) 0x%08x %08x\n" msgstr "" -#: vms-alpha.c:6059 +#: vms-alpha.c:6078 #, c-format msgid "STA_PQ (stack psect base + offset)\n" msgstr "" -#: vms-alpha.c:6060 +#: vms-alpha.c:6079 #, c-format msgid " psect: %u, offset: 0x%08x %08x\n" msgstr "" -#: vms-alpha.c:6066 +#: vms-alpha.c:6085 #, c-format msgid "STA_LI (stack literal)\n" msgstr "" -#: vms-alpha.c:6069 +#: vms-alpha.c:6088 #, c-format msgid "STA_MOD (stack module)\n" msgstr "" -#: vms-alpha.c:6072 +#: vms-alpha.c:6091 #, c-format msgid "STA_CKARG (compare procedure argument)\n" msgstr "" -#: vms-alpha.c:6076 +#: vms-alpha.c:6095 #, c-format msgid "STO_B (store byte)\n" msgstr "" -#: vms-alpha.c:6079 +#: vms-alpha.c:6098 #, c-format msgid "STO_W (store word)\n" msgstr "" -#: vms-alpha.c:6082 +#: vms-alpha.c:6101 #, c-format msgid "STO_LW (store longword)\n" msgstr "" -#: vms-alpha.c:6085 +#: vms-alpha.c:6104 #, c-format msgid "STO_QW (store quadword)\n" msgstr "" -#: vms-alpha.c:6091 +#: vms-alpha.c:6110 #, c-format msgid "STO_IMMR (store immediate repeat) %u bytes\n" msgstr "" -#: vms-alpha.c:6098 +#: vms-alpha.c:6117 #, c-format msgid "STO_GBL (store global) %.*s\n" msgstr "" -#: vms-alpha.c:6102 +#: vms-alpha.c:6121 #, c-format msgid "STO_CA (store code address) %.*s\n" msgstr "" -#: vms-alpha.c:6106 +#: vms-alpha.c:6125 #, c-format msgid "STO_RB (store relative branch)\n" msgstr "" -#: vms-alpha.c:6109 +#: vms-alpha.c:6128 #, c-format msgid "STO_AB (store absolute branch)\n" msgstr "" -#: vms-alpha.c:6112 +#: vms-alpha.c:6131 #, c-format msgid "STO_OFF (store offset to psect)\n" msgstr "" -#: vms-alpha.c:6118 +#: vms-alpha.c:6137 #, c-format msgid "STO_IMM (store immediate) %u bytes\n" msgstr "" -#: vms-alpha.c:6125 +#: vms-alpha.c:6144 #, c-format msgid "STO_GBL_LW (store global longword) %.*s\n" msgstr "" -#: vms-alpha.c:6129 +#: vms-alpha.c:6148 #, c-format msgid "STO_OFF (store LP with procedure signature)\n" msgstr "" -#: vms-alpha.c:6132 +#: vms-alpha.c:6151 #, c-format msgid "STO_BR_GBL (store branch global) *todo*\n" msgstr "" -#: vms-alpha.c:6135 +#: vms-alpha.c:6154 #, c-format msgid "STO_BR_PS (store branch psect + offset) *todo*\n" msgstr "" -#: vms-alpha.c:6139 +#: vms-alpha.c:6158 #, c-format msgid "OPR_NOP (no-operation)\n" msgstr "" -#: vms-alpha.c:6142 +#: vms-alpha.c:6161 #, c-format msgid "OPR_ADD (add)\n" msgstr "" -#: vms-alpha.c:6145 +#: vms-alpha.c:6164 #, c-format msgid "OPR_SUB (substract)\n" msgstr "" -#: vms-alpha.c:6148 +#: vms-alpha.c:6167 #, c-format msgid "OPR_MUL (multiply)\n" msgstr "" -#: vms-alpha.c:6151 +#: vms-alpha.c:6170 #, c-format msgid "OPR_DIV (divide)\n" msgstr "" -#: vms-alpha.c:6154 +#: vms-alpha.c:6173 #, c-format msgid "OPR_AND (logical and)\n" msgstr "" -#: vms-alpha.c:6157 +#: vms-alpha.c:6176 #, c-format msgid "OPR_IOR (logical inclusive or)\n" msgstr "" -#: vms-alpha.c:6160 +#: vms-alpha.c:6179 #, c-format msgid "OPR_EOR (logical exclusive or)\n" msgstr "" -#: vms-alpha.c:6163 +#: vms-alpha.c:6182 #, c-format msgid "OPR_NEG (negate)\n" msgstr "" -#: vms-alpha.c:6166 +#: vms-alpha.c:6185 #, c-format msgid "OPR_COM (complement)\n" msgstr "" -#: vms-alpha.c:6169 +#: vms-alpha.c:6188 #, c-format msgid "OPR_INSV (insert field)\n" msgstr "" -#: vms-alpha.c:6172 +#: vms-alpha.c:6191 #, c-format msgid "OPR_ASH (arithmetic shift)\n" msgstr "" -#: vms-alpha.c:6175 +#: vms-alpha.c:6194 #, c-format msgid "OPR_USH (unsigned shift)\n" msgstr "" -#: vms-alpha.c:6178 +#: vms-alpha.c:6197 #, c-format msgid "OPR_ROT (rotate)\n" msgstr "" -#: vms-alpha.c:6181 +#: vms-alpha.c:6200 #, c-format msgid "OPR_SEL (select)\n" msgstr "" -#: vms-alpha.c:6184 +#: vms-alpha.c:6203 #, c-format msgid "OPR_REDEF (redefine symbol to curr location)\n" msgstr "" -#: vms-alpha.c:6187 +#: vms-alpha.c:6206 #, c-format msgid "OPR_REDEF (define a literal)\n" msgstr "" -#: vms-alpha.c:6191 +#: vms-alpha.c:6210 #, c-format msgid "STC_LP (store cond linkage pair)\n" msgstr "" -#: vms-alpha.c:6195 +#: vms-alpha.c:6214 #, c-format msgid "STC_LP_PSB (store cond linkage pair + signature)\n" msgstr "" -#: vms-alpha.c:6196 +#: vms-alpha.c:6215 #, c-format msgid " linkage index: %u, procedure: %.*s\n" msgstr "" -#: vms-alpha.c:6199 +#: vms-alpha.c:6218 #, c-format msgid " signature: %.*s\n" msgstr "" -#: vms-alpha.c:6202 +#: vms-alpha.c:6221 #, c-format msgid "STC_GBL (store cond global)\n" msgstr "" -#: vms-alpha.c:6203 +#: vms-alpha.c:6222 #, c-format msgid " linkage index: %u, global: %.*s\n" msgstr "" -#: vms-alpha.c:6207 +#: vms-alpha.c:6226 #, c-format msgid "STC_GCA (store cond code address)\n" msgstr "" -#: vms-alpha.c:6208 +#: vms-alpha.c:6227 #, c-format msgid " linkage index: %u, procedure name: %.*s\n" msgstr "" -#: vms-alpha.c:6212 +#: vms-alpha.c:6231 #, c-format msgid "STC_PS (store cond psect + offset)\n" msgstr "" -#: vms-alpha.c:6214 +#: vms-alpha.c:6233 #, c-format msgid " linkage index: %u, psect: %u, offset: 0x%08x %08x\n" msgstr "" -#: vms-alpha.c:6221 +#: vms-alpha.c:6240 #, c-format msgid "STC_NOP_GBL (store cond NOP at global addr)\n" msgstr "" -#: vms-alpha.c:6225 +#: vms-alpha.c:6244 #, c-format msgid "STC_NOP_PS (store cond NOP at psect + offset)\n" msgstr "" -#: vms-alpha.c:6229 +#: vms-alpha.c:6248 #, c-format msgid "STC_BSR_GBL (store cond BSR at global addr)\n" msgstr "" -#: vms-alpha.c:6233 +#: vms-alpha.c:6252 #, c-format msgid "STC_BSR_PS (store cond BSR at psect + offset)\n" msgstr "" -#: vms-alpha.c:6237 +#: vms-alpha.c:6256 #, c-format msgid "STC_LDA_GBL (store cond LDA at global addr)\n" msgstr "" -#: vms-alpha.c:6241 +#: vms-alpha.c:6260 #, c-format msgid "STC_LDA_PS (store cond LDA at psect + offset)\n" msgstr "" -#: vms-alpha.c:6245 +#: vms-alpha.c:6264 #, c-format msgid "STC_BOH_GBL (store cond BOH at global addr)\n" msgstr "" -#: vms-alpha.c:6249 +#: vms-alpha.c:6268 #, c-format msgid "STC_BOH_PS (store cond BOH at psect + offset)\n" msgstr "" -#: vms-alpha.c:6254 +#: vms-alpha.c:6273 #, c-format msgid "STC_NBH_GBL (store cond or hint at global addr)\n" msgstr "" -#: vms-alpha.c:6258 +#: vms-alpha.c:6277 #, c-format msgid "STC_NBH_PS (store cond or hint at psect + offset)\n" msgstr "" -#: vms-alpha.c:6262 +#: vms-alpha.c:6281 #, c-format msgid "CTL_SETRB (set relocation base)\n" msgstr "" -#: vms-alpha.c:6268 +#: vms-alpha.c:6287 #, c-format msgid "CTL_AUGRB (augment relocation base) %u\n" msgstr "" -#: vms-alpha.c:6272 +#: vms-alpha.c:6291 #, c-format msgid "CTL_DFLOC (define location)\n" msgstr "" -#: vms-alpha.c:6275 +#: vms-alpha.c:6294 #, c-format msgid "CTL_STLOC (set location)\n" msgstr "" -#: vms-alpha.c:6278 +#: vms-alpha.c:6297 #, c-format msgid "CTL_STKDL (stack defined location)\n" msgstr "" -#: vms-alpha.c:6281 vms-alpha.c:6695 +#: vms-alpha.c:6300 vms-alpha.c:6714 #, c-format msgid "*unhandled*\n" msgstr "" -#: vms-alpha.c:6311 vms-alpha.c:6350 +#: vms-alpha.c:6330 vms-alpha.c:6369 #, c-format msgid "cannot read GST record length\n" msgstr "" #. Ill-formed. -#: vms-alpha.c:6332 +#: vms-alpha.c:6351 #, c-format msgid "cannot find EMH in first GST record\n" msgstr "" -#: vms-alpha.c:6358 +#: vms-alpha.c:6377 #, c-format msgid "cannot read GST record header\n" msgstr "" -#: vms-alpha.c:6371 +#: vms-alpha.c:6390 #, c-format msgid " corrupted GST\n" msgstr "" -#: vms-alpha.c:6379 +#: vms-alpha.c:6398 #, c-format msgid "cannot read GST record\n" msgstr "" -#: vms-alpha.c:6408 +#: vms-alpha.c:6427 #, c-format msgid " unhandled EOBJ record type %u\n" msgstr "" -#: vms-alpha.c:6431 +#: vms-alpha.c:6450 #, c-format msgid " bitcount: %u, base addr: 0x%08x\n" msgstr "" -#: vms-alpha.c:6444 +#: vms-alpha.c:6463 #, c-format msgid " bitmap: 0x%08x (count: %u):\n" msgstr "" -#: vms-alpha.c:6451 +#: vms-alpha.c:6470 #, c-format msgid " %08x" msgstr "" -#: vms-alpha.c:6476 +#: vms-alpha.c:6495 #, c-format msgid " image %u (%u entries)\n" msgstr "" -#: vms-alpha.c:6481 +#: vms-alpha.c:6500 #, c-format msgid " offset: 0x%08x, val: 0x%08x\n" msgstr "" -#: vms-alpha.c:6502 +#: vms-alpha.c:6521 #, c-format msgid " image %u (%u entries), offsets:\n" msgstr "" -#: vms-alpha.c:6509 +#: vms-alpha.c:6528 #, c-format msgid " 0x%08x" msgstr "" #. 64 bits. -#: vms-alpha.c:6631 +#: vms-alpha.c:6650 #, c-format msgid "64 bits *unhandled*\n" msgstr "" -#: vms-alpha.c:6635 +#: vms-alpha.c:6654 #, c-format msgid "class: %u, dtype: %u, length: %u, pointer: 0x%08x\n" msgstr "" -#: vms-alpha.c:6646 +#: vms-alpha.c:6665 #, c-format msgid "non-contiguous array of %s\n" msgstr "" -#: vms-alpha.c:6650 +#: vms-alpha.c:6669 #, c-format msgid "dimct: %u, aflags: 0x%02x, digits: %u, scale: %u\n" msgstr "" -#: vms-alpha.c:6654 +#: vms-alpha.c:6673 #, c-format msgid "arsize: %u, a0: 0x%08x\n" msgstr "" -#: vms-alpha.c:6658 +#: vms-alpha.c:6677 #, c-format msgid "Strides:\n" msgstr "" -#: vms-alpha.c:6663 +#: vms-alpha.c:6682 #, c-format msgid "[%u]: %u\n" msgstr "" -#: vms-alpha.c:6668 +#: vms-alpha.c:6687 #, c-format msgid "Bounds:\n" msgstr "" -#: vms-alpha.c:6673 +#: vms-alpha.c:6692 #, c-format msgid "[%u]: Lower: %u, upper: %u\n" msgstr "" -#: vms-alpha.c:6685 +#: vms-alpha.c:6704 #, c-format msgid "unaligned bit-string of %s\n" msgstr "" -#: vms-alpha.c:6689 +#: vms-alpha.c:6708 #, c-format msgid "base: %u, pos: %u\n" msgstr "" -#: vms-alpha.c:6709 +#: vms-alpha.c:6728 #, c-format msgid "vflags: 0x%02x, value: 0x%08x " msgstr "" -#: vms-alpha.c:6715 +#: vms-alpha.c:6734 #, c-format msgid "(no value)\n" msgstr "" -#: vms-alpha.c:6718 +#: vms-alpha.c:6737 #, c-format msgid "(not active)\n" msgstr "" -#: vms-alpha.c:6721 +#: vms-alpha.c:6740 #, c-format msgid "(not allocated)\n" msgstr "" -#: vms-alpha.c:6724 +#: vms-alpha.c:6743 #, c-format msgid "(descriptor)\n" msgstr "" -#: vms-alpha.c:6728 +#: vms-alpha.c:6747 #, c-format msgid "(trailing value)\n" msgstr "" -#: vms-alpha.c:6731 +#: vms-alpha.c:6750 #, c-format msgid "(value spec follows)\n" msgstr "" -#: vms-alpha.c:6734 +#: vms-alpha.c:6753 #, c-format msgid "(at bit offset %u)\n" msgstr "" -#: vms-alpha.c:6737 +#: vms-alpha.c:6756 #, c-format msgid "(reg: %u, disp: %u, indir: %u, kind: " msgstr "" -#: vms-alpha.c:6744 +#: vms-alpha.c:6763 msgid "literal" msgstr "" -#: vms-alpha.c:6747 +#: vms-alpha.c:6766 msgid "address" msgstr "" -#: vms-alpha.c:6750 +#: vms-alpha.c:6769 msgid "desc" msgstr "" -#: vms-alpha.c:6753 +#: vms-alpha.c:6772 msgid "reg" msgstr "" -#: vms-alpha.c:6828 +#: vms-alpha.c:6847 #, c-format msgid "Debug symbol table:\n" msgstr "" -#: vms-alpha.c:6839 +#: vms-alpha.c:6858 #, c-format msgid "cannot read DST header\n" msgstr "" -#: vms-alpha.c:6844 +#: vms-alpha.c:6863 #, c-format msgid " type: %3u, len: %3u (at 0x%08x): " msgstr "" -#: vms-alpha.c:6858 +#: vms-alpha.c:6877 #, c-format msgid "cannot read DST symbol\n" msgstr "" -#: vms-alpha.c:6901 +#: vms-alpha.c:6920 #, c-format msgid "standard data: %s\n" msgstr "" -#: vms-alpha.c:6904 vms-alpha.c:6988 +#: vms-alpha.c:6923 vms-alpha.c:7007 #, c-format msgid " name: %.*s\n" msgstr "" -#: vms-alpha.c:6911 +#: vms-alpha.c:6930 #, c-format msgid "modbeg\n" msgstr "" -#: vms-alpha.c:6912 +#: vms-alpha.c:6931 #, c-format msgid " flags: %d, language: %u, major: %u, minor: %u\n" msgstr "" -#: vms-alpha.c:6918 vms-alpha.c:7184 +#: vms-alpha.c:6937 vms-alpha.c:7203 #, c-format msgid " module name: %.*s\n" msgstr "" -#: vms-alpha.c:6921 +#: vms-alpha.c:6940 #, c-format msgid " compiler : %.*s\n" msgstr "" -#: vms-alpha.c:6926 +#: vms-alpha.c:6945 #, c-format msgid "modend\n" msgstr "" -#: vms-alpha.c:6933 +#: vms-alpha.c:6952 msgid "rtnbeg\n" msgstr "" -#: vms-alpha.c:6934 +#: vms-alpha.c:6953 #, c-format msgid " flags: %u, address: 0x%08x, pd-address: 0x%08x\n" msgstr "" -#: vms-alpha.c:6939 +#: vms-alpha.c:6958 #, c-format msgid " routine name: %.*s\n" msgstr "" -#: vms-alpha.c:6947 +#: vms-alpha.c:6966 #, c-format msgid "rtnend: size 0x%08x\n" msgstr "" -#: vms-alpha.c:6955 +#: vms-alpha.c:6974 #, c-format msgid "prolog: bkpt address 0x%08x\n" msgstr "" -#: vms-alpha.c:6963 +#: vms-alpha.c:6982 #, c-format msgid "epilog: flags: %u, count: %u\n" msgstr "" -#: vms-alpha.c:6972 +#: vms-alpha.c:6991 #, c-format msgid "blkbeg: address: 0x%08x, name: %.*s\n" msgstr "" -#: vms-alpha.c:6981 +#: vms-alpha.c:7000 #, c-format msgid "blkend: size: 0x%08x\n" msgstr "" -#: vms-alpha.c:6987 +#: vms-alpha.c:7006 #, c-format msgid "typspec (len: %u)\n" msgstr "" -#: vms-alpha.c:6994 +#: vms-alpha.c:7013 #, c-format msgid "septyp, name: %.*s\n" msgstr "" -#: vms-alpha.c:7003 +#: vms-alpha.c:7022 #, c-format msgid "recbeg: name: %.*s\n" msgstr "" -#: vms-alpha.c:7010 +#: vms-alpha.c:7029 #, c-format msgid "recend\n" msgstr "" -#: vms-alpha.c:7013 +#: vms-alpha.c:7032 #, c-format msgid "enumbeg, len: %u, name: %.*s\n" msgstr "" -#: vms-alpha.c:7017 +#: vms-alpha.c:7036 #, c-format msgid "enumelt, name: %.*s\n" msgstr "" -#: vms-alpha.c:7021 +#: vms-alpha.c:7040 #, c-format msgid "enumend\n" msgstr "" -#: vms-alpha.c:7038 +#: vms-alpha.c:7057 #, c-format msgid "discontiguous range (nbr: %u)\n" msgstr "" -#: vms-alpha.c:7040 +#: vms-alpha.c:7059 #, c-format msgid " address: 0x%08x, size: %u\n" msgstr "" -#: vms-alpha.c:7050 +#: vms-alpha.c:7069 #, c-format msgid "line num (len: %u)\n" msgstr "" -#: vms-alpha.c:7067 +#: vms-alpha.c:7086 #, c-format msgid "delta_pc_w %u\n" msgstr "" -#: vms-alpha.c:7074 +#: vms-alpha.c:7093 #, c-format msgid "incr_linum(b): +%u\n" msgstr "" -#: vms-alpha.c:7080 +#: vms-alpha.c:7099 #, c-format msgid "incr_linum_w: +%u\n" msgstr "" -#: vms-alpha.c:7086 +#: vms-alpha.c:7105 #, c-format msgid "incr_linum_l: +%u\n" msgstr "" -#: vms-alpha.c:7092 +#: vms-alpha.c:7111 #, c-format msgid "set_line_num(w) %u\n" msgstr "" -#: vms-alpha.c:7097 +#: vms-alpha.c:7116 #, c-format msgid "set_line_num_b %u\n" msgstr "" -#: vms-alpha.c:7102 +#: vms-alpha.c:7121 #, c-format msgid "set_line_num_l %u\n" msgstr "" -#: vms-alpha.c:7107 +#: vms-alpha.c:7126 #, c-format msgid "set_abs_pc: 0x%08x\n" msgstr "" -#: vms-alpha.c:7111 +#: vms-alpha.c:7130 #, c-format msgid "delta_pc_l: +0x%08x\n" msgstr "" -#: vms-alpha.c:7116 +#: vms-alpha.c:7135 #, c-format msgid "term(b): 0x%02x" msgstr "" -#: vms-alpha.c:7118 +#: vms-alpha.c:7137 #, c-format msgid " pc: 0x%08x\n" msgstr "" -#: vms-alpha.c:7123 +#: vms-alpha.c:7142 #, c-format msgid "term_w: 0x%04x" msgstr "" -#: vms-alpha.c:7125 +#: vms-alpha.c:7144 #, c-format msgid " pc: 0x%08x\n" msgstr "" -#: vms-alpha.c:7131 +#: vms-alpha.c:7150 #, c-format msgid "delta pc +%-4d" msgstr "" -#: vms-alpha.c:7134 +#: vms-alpha.c:7153 #, c-format msgid " pc: 0x%08x line: %5u\n" msgstr "" -#: vms-alpha.c:7139 +#: vms-alpha.c:7158 #, c-format msgid " *unhandled* cmd %u\n" msgstr "" -#: vms-alpha.c:7154 +#: vms-alpha.c:7173 #, c-format msgid "source (len: %u)\n" msgstr "" -#: vms-alpha.c:7168 +#: vms-alpha.c:7187 #, c-format msgid " declfile: len: %u, flags: %u, fileid: %u\n" msgstr "" -#: vms-alpha.c:7172 +#: vms-alpha.c:7191 #, c-format msgid " rms: cdt: 0x%08x %08x, ebk: 0x%08x, ffb: 0x%04x, rfo: %u\n" msgstr "" -#: vms-alpha.c:7181 +#: vms-alpha.c:7200 #, c-format msgid " filename : %.*s\n" msgstr "" -#: vms-alpha.c:7190 +#: vms-alpha.c:7209 #, c-format msgid " setfile %u\n" msgstr "" -#: vms-alpha.c:7195 vms-alpha.c:7200 +#: vms-alpha.c:7214 vms-alpha.c:7219 #, c-format msgid " setrec %u\n" msgstr "" -#: vms-alpha.c:7205 vms-alpha.c:7210 +#: vms-alpha.c:7224 vms-alpha.c:7229 #, c-format msgid " setlnum %u\n" msgstr "" -#: vms-alpha.c:7215 vms-alpha.c:7220 +#: vms-alpha.c:7234 vms-alpha.c:7239 #, c-format msgid " deflines %u\n" msgstr "" -#: vms-alpha.c:7224 +#: vms-alpha.c:7243 #, c-format msgid " formfeed\n" msgstr "" -#: vms-alpha.c:7228 +#: vms-alpha.c:7247 #, c-format msgid " *unhandled* cmd %u\n" msgstr "" -#: vms-alpha.c:7240 +#: vms-alpha.c:7259 #, c-format msgid "*unhandled* dst type %u\n" msgstr "" -#: vms-alpha.c:7272 +#: vms-alpha.c:7291 #, c-format msgid "cannot read EIHD\n" msgstr "" -#: vms-alpha.c:7275 +#: vms-alpha.c:7294 #, c-format msgid "EIHD: (size: %u, nbr blocks: %u)\n" msgstr "" -#: vms-alpha.c:7278 +#: vms-alpha.c:7297 #, c-format msgid " majorid: %u, minorid: %u\n" msgstr "" -#: vms-alpha.c:7286 +#: vms-alpha.c:7305 msgid "executable" msgstr "" -#: vms-alpha.c:7289 +#: vms-alpha.c:7308 msgid "linkable image" msgstr "" -#: vms-alpha.c:7295 +#: vms-alpha.c:7314 #, c-format msgid " image type: %u (%s)" msgstr "" -#: vms-alpha.c:7301 +#: vms-alpha.c:7320 msgid "native" msgstr "" -#: vms-alpha.c:7304 +#: vms-alpha.c:7323 msgid "CLI" msgstr "" -#: vms-alpha.c:7310 +#: vms-alpha.c:7329 #, c-format msgid ", subtype: %u (%s)\n" msgstr "" -#: vms-alpha.c:7316 +#: vms-alpha.c:7335 #, c-format msgid " offsets: isd: %u, activ: %u, symdbg: %u, imgid: %u, patch: %u\n" msgstr "" -#: vms-alpha.c:7320 +#: vms-alpha.c:7339 #, c-format msgid " fixup info rva: " msgstr "" -#: vms-alpha.c:7322 +#: vms-alpha.c:7341 #, c-format msgid ", symbol vector rva: " msgstr "" -#: vms-alpha.c:7325 +#: vms-alpha.c:7344 #, c-format msgid "" "\n" " version array off: %u\n" msgstr "" -#: vms-alpha.c:7329 +#: vms-alpha.c:7348 #, c-format msgid " img I/O count: %u, nbr channels: %u, req pri: %08x%08x\n" msgstr "" -#: vms-alpha.c:7335 +#: vms-alpha.c:7354 #, c-format msgid " linker flags: %08x:" msgstr "" -#: vms-alpha.c:7365 +#: vms-alpha.c:7384 #, c-format msgid " ident: 0x%08x, sysver: 0x%08x, match ctrl: %u, symvect_size: %u\n" msgstr "" -#: vms-alpha.c:7371 +#: vms-alpha.c:7390 #, c-format msgid " BPAGE: %u" msgstr "" -#: vms-alpha.c:7377 +#: vms-alpha.c:7396 #, c-format msgid ", ext fixup offset: %u, no_opt psect off: %u" msgstr "" -#: vms-alpha.c:7380 +#: vms-alpha.c:7399 #, c-format msgid ", alias: %u\n" msgstr "" -#: vms-alpha.c:7388 +#: vms-alpha.c:7407 #, c-format msgid "system version array information:\n" msgstr "" -#: vms-alpha.c:7392 +#: vms-alpha.c:7411 #, c-format msgid "cannot read EIHVN header\n" msgstr "" -#: vms-alpha.c:7402 +#: vms-alpha.c:7421 #, c-format msgid "cannot read EIHVN version\n" msgstr "" -#: vms-alpha.c:7405 +#: vms-alpha.c:7424 #, c-format msgid " %02u " msgstr "" -#: vms-alpha.c:7409 +#: vms-alpha.c:7428 msgid "BASE_IMAGE " msgstr "" -#: vms-alpha.c:7412 +#: vms-alpha.c:7431 msgid "MEMORY_MANAGEMENT" msgstr "" -#: vms-alpha.c:7415 +#: vms-alpha.c:7434 msgid "IO " msgstr "" -#: vms-alpha.c:7418 +#: vms-alpha.c:7437 msgid "FILES_VOLUMES " msgstr "" -#: vms-alpha.c:7421 +#: vms-alpha.c:7440 msgid "PROCESS_SCHED " msgstr "" -#: vms-alpha.c:7424 +#: vms-alpha.c:7443 msgid "SYSGEN " msgstr "" -#: vms-alpha.c:7427 +#: vms-alpha.c:7446 msgid "CLUSTERS_LOCKMGR " msgstr "" -#: vms-alpha.c:7430 +#: vms-alpha.c:7449 msgid "LOGICAL_NAMES " msgstr "" -#: vms-alpha.c:7433 +#: vms-alpha.c:7452 msgid "SECURITY " msgstr "" -#: vms-alpha.c:7436 +#: vms-alpha.c:7455 msgid "IMAGE_ACTIVATOR " msgstr "" -#: vms-alpha.c:7439 +#: vms-alpha.c:7458 msgid "NETWORKS " msgstr "" -#: vms-alpha.c:7442 +#: vms-alpha.c:7461 msgid "COUNTERS " msgstr "" -#: vms-alpha.c:7445 +#: vms-alpha.c:7464 msgid "STABLE " msgstr "" -#: vms-alpha.c:7448 +#: vms-alpha.c:7467 msgid "MISC " msgstr "" -#: vms-alpha.c:7451 +#: vms-alpha.c:7470 msgid "CPU " msgstr "" -#: vms-alpha.c:7454 +#: vms-alpha.c:7473 msgid "VOLATILE " msgstr "" -#: vms-alpha.c:7457 +#: vms-alpha.c:7476 msgid "SHELL " msgstr "" -#: vms-alpha.c:7460 +#: vms-alpha.c:7479 msgid "POSIX " msgstr "" -#: vms-alpha.c:7463 +#: vms-alpha.c:7482 msgid "MULTI_PROCESSING " msgstr "" -#: vms-alpha.c:7466 +#: vms-alpha.c:7485 msgid "GALAXY " msgstr "" -#: vms-alpha.c:7469 +#: vms-alpha.c:7488 msgid "*unknown* " msgstr "" -#: vms-alpha.c:7472 +#: vms-alpha.c:7491 #, c-format msgid ": %u.%u\n" msgstr "" -#: vms-alpha.c:7485 vms-alpha.c:7744 +#: vms-alpha.c:7504 vms-alpha.c:7763 #, c-format msgid "cannot read EIHA\n" msgstr "" -#: vms-alpha.c:7488 +#: vms-alpha.c:7507 #, c-format msgid "Image activation: (size=%u)\n" msgstr "" -#: vms-alpha.c:7490 +#: vms-alpha.c:7509 #, c-format msgid " First address : 0x%08x 0x%08x\n" msgstr "" -#: vms-alpha.c:7493 +#: vms-alpha.c:7512 #, c-format msgid " Second address: 0x%08x 0x%08x\n" msgstr "" -#: vms-alpha.c:7496 +#: vms-alpha.c:7515 #, c-format msgid " Third address : 0x%08x 0x%08x\n" msgstr "" -#: vms-alpha.c:7499 +#: vms-alpha.c:7518 #, c-format msgid " Fourth address: 0x%08x 0x%08x\n" msgstr "" -#: vms-alpha.c:7502 +#: vms-alpha.c:7521 #, c-format msgid " Shared image : 0x%08x 0x%08x\n" msgstr "" -#: vms-alpha.c:7513 +#: vms-alpha.c:7532 #, c-format msgid "cannot read EIHI\n" msgstr "" -#: vms-alpha.c:7516 +#: vms-alpha.c:7535 #, c-format msgid "Image identification: (major: %u, minor: %u)\n" msgstr "" -#: vms-alpha.c:7519 +#: vms-alpha.c:7538 #, c-format msgid " image name : %.*s\n" msgstr "" -#: vms-alpha.c:7521 +#: vms-alpha.c:7540 #, c-format msgid " link time : %s\n" msgstr "" -#: vms-alpha.c:7523 +#: vms-alpha.c:7542 #, c-format msgid " image ident : %.*s\n" msgstr "" -#: vms-alpha.c:7525 +#: vms-alpha.c:7544 #, c-format msgid " linker ident : %.*s\n" msgstr "" -#: vms-alpha.c:7527 +#: vms-alpha.c:7546 #, c-format msgid " image build ident: %.*s\n" msgstr "" -#: vms-alpha.c:7537 +#: vms-alpha.c:7556 #, c-format msgid "cannot read EIHS\n" msgstr "" -#: vms-alpha.c:7540 +#: vms-alpha.c:7559 #, c-format msgid "Image symbol & debug table: (major: %u, minor: %u)\n" msgstr "" -#: vms-alpha.c:7545 +#: vms-alpha.c:7564 #, c-format msgid " debug symbol table : vbn: %u, size: %u (0x%x)\n" msgstr "" -#: vms-alpha.c:7549 +#: vms-alpha.c:7568 #, c-format msgid " global symbol table: vbn: %u, records: %u\n" msgstr "" -#: vms-alpha.c:7553 +#: vms-alpha.c:7572 #, c-format msgid " debug module table : vbn: %u, size: %u\n" msgstr "" -#: vms-alpha.c:7566 +#: vms-alpha.c:7585 #, c-format msgid "cannot read EISD\n" msgstr "" -#: vms-alpha.c:7576 +#: vms-alpha.c:7595 #, c-format msgid "" "Image section descriptor: (major: %u, minor: %u, size: %u, offset: %u)\n" msgstr "" -#: vms-alpha.c:7583 +#: vms-alpha.c:7602 #, c-format msgid " section: base: 0x%08x%08x size: 0x%08x\n" msgstr "" -#: vms-alpha.c:7588 +#: vms-alpha.c:7607 #, c-format msgid " flags: 0x%04x" msgstr "" -#: vms-alpha.c:7625 +#: vms-alpha.c:7644 #, c-format msgid " vbn: %u, pfc: %u, matchctl: %u type: %u (" msgstr "" -#: vms-alpha.c:7631 +#: vms-alpha.c:7650 msgid "NORMAL" msgstr "" -#: vms-alpha.c:7634 +#: vms-alpha.c:7653 msgid "SHRFXD" msgstr "" -#: vms-alpha.c:7637 +#: vms-alpha.c:7656 msgid "PRVFXD" msgstr "" -#: vms-alpha.c:7640 +#: vms-alpha.c:7659 msgid "SHRPIC" msgstr "" -#: vms-alpha.c:7643 +#: vms-alpha.c:7662 msgid "PRVPIC" msgstr "" -#: vms-alpha.c:7646 +#: vms-alpha.c:7665 msgid "USRSTACK" msgstr "" -#: vms-alpha.c:7654 +#: vms-alpha.c:7673 #, c-format msgid " ident: 0x%08x, name: %.*s\n" msgstr "" -#: vms-alpha.c:7664 +#: vms-alpha.c:7683 #, c-format msgid "cannot read DMT\n" msgstr "" -#: vms-alpha.c:7668 +#: vms-alpha.c:7687 #, c-format msgid "Debug module table:\n" msgstr "" -#: vms-alpha.c:7677 +#: vms-alpha.c:7696 #, c-format msgid "cannot read DMT header\n" msgstr "" -#: vms-alpha.c:7682 +#: vms-alpha.c:7701 #, c-format msgid " module offset: 0x%08x, size: 0x%08x, (%u psects)\n" msgstr "" -#: vms-alpha.c:7692 +#: vms-alpha.c:7711 #, c-format msgid "cannot read DMT psect\n" msgstr "" -#: vms-alpha.c:7695 +#: vms-alpha.c:7714 #, c-format msgid " psect start: 0x%08x, length: %u\n" msgstr "" -#: vms-alpha.c:7708 +#: vms-alpha.c:7727 #, c-format msgid "cannot read DST\n" msgstr "" -#: vms-alpha.c:7718 +#: vms-alpha.c:7737 #, c-format msgid "cannot read GST\n" msgstr "" -#: vms-alpha.c:7722 +#: vms-alpha.c:7741 #, c-format msgid "Global symbol table:\n" msgstr "" -#: vms-alpha.c:7750 +#: vms-alpha.c:7769 #, c-format msgid "Image activator fixup: (major: %u, minor: %u)\n" msgstr "" -#: vms-alpha.c:7753 +#: vms-alpha.c:7772 #, c-format msgid " iaflink : 0x%08x %08x\n" msgstr "" -#: vms-alpha.c:7756 +#: vms-alpha.c:7775 #, c-format msgid " fixuplnk: 0x%08x %08x\n" msgstr "" -#: vms-alpha.c:7759 +#: vms-alpha.c:7778 #, c-format msgid " size : %u\n" msgstr "" -#: vms-alpha.c:7761 +#: vms-alpha.c:7780 #, c-format msgid " flags: 0x%08x\n" msgstr "" -#: vms-alpha.c:7765 +#: vms-alpha.c:7784 #, c-format msgid " qrelfixoff: %5u, lrelfixoff: %5u\n" msgstr "" -#: vms-alpha.c:7769 +#: vms-alpha.c:7788 #, c-format msgid " qdotadroff: %5u, ldotadroff: %5u\n" msgstr "" -#: vms-alpha.c:7773 +#: vms-alpha.c:7792 #, c-format msgid " codeadroff: %5u, lpfixoff : %5u\n" msgstr "" -#: vms-alpha.c:7776 +#: vms-alpha.c:7795 #, c-format msgid " chgprtoff : %5u\n" msgstr "" -#: vms-alpha.c:7779 +#: vms-alpha.c:7798 #, c-format msgid " shlstoff : %5u, shrimgcnt : %5u\n" msgstr "" -#: vms-alpha.c:7781 +#: vms-alpha.c:7800 #, c-format msgid " shlextra : %5u, permctx : %5u\n" msgstr "" -#: vms-alpha.c:7784 +#: vms-alpha.c:7803 #, c-format msgid " base_va : 0x%08x\n" msgstr "" -#: vms-alpha.c:7786 +#: vms-alpha.c:7805 #, c-format msgid " lppsbfixoff: %5u\n" msgstr "" -#: vms-alpha.c:7794 +#: vms-alpha.c:7813 #, c-format msgid " Shareable images:\n" msgstr "" -#: vms-alpha.c:7798 +#: vms-alpha.c:7817 #, c-format msgid " %u: size: %u, flags: 0x%02x, name: %.*s\n" msgstr "" -#: vms-alpha.c:7805 +#: vms-alpha.c:7824 #, c-format msgid " quad-word relocation fixups:\n" msgstr "" -#: vms-alpha.c:7810 +#: vms-alpha.c:7829 #, c-format msgid " long-word relocation fixups:\n" msgstr "" -#: vms-alpha.c:7815 +#: vms-alpha.c:7834 #, c-format msgid " quad-word .address reference fixups:\n" msgstr "" -#: vms-alpha.c:7820 +#: vms-alpha.c:7839 #, c-format msgid " long-word .address reference fixups:\n" msgstr "" -#: vms-alpha.c:7825 +#: vms-alpha.c:7844 #, c-format msgid " Code Address Reference Fixups:\n" msgstr "" -#: vms-alpha.c:7830 +#: vms-alpha.c:7849 #, c-format msgid " Linkage Pairs Referece Fixups:\n" msgstr "" -#: vms-alpha.c:7839 +#: vms-alpha.c:7858 #, c-format msgid " Change Protection (%u entries):\n" msgstr "" -#: vms-alpha.c:7844 +#: vms-alpha.c:7863 #, c-format msgid " base: 0x%08x %08x, size: 0x%08x, prot: 0x%08x " msgstr "" #. FIXME: we do not yet support relocatable link. It is not obvious #. how to do it for debug infos. -#: vms-alpha.c:8676 +#: vms-alpha.c:8694 msgid "%P: relocatable link is not supported\n" msgstr "" -#: vms-alpha.c:8746 +#: vms-alpha.c:8764 msgid "%P: multiple entry points: in modules %B and %B\n" msgstr "" @@ -5514,146 +5746,146 @@ msgstr "" msgid "%s: dynamic object with no .loader section" msgstr "" -#: xcofflink.c:1415 +#: xcofflink.c:1416 msgid "%B: `%s' has line numbers but no enclosing section" msgstr "" -#: xcofflink.c:1467 +#: xcofflink.c:1468 msgid "%B: class %d symbol `%s' has no aux entries" msgstr "" -#: xcofflink.c:1489 +#: xcofflink.c:1490 msgid "%B: symbol `%s' has unrecognized csect type %d" msgstr "" -#: xcofflink.c:1501 +#: xcofflink.c:1502 msgid "%B: bad XTY_ER symbol `%s': class %d scnum %d scnlen %d" msgstr "" -#: xcofflink.c:1530 +#: xcofflink.c:1531 msgid "%B: XMC_TC0 symbol `%s' is class %d scnlen %d" msgstr "" -#: xcofflink.c:1676 +#: xcofflink.c:1677 msgid "%B: csect `%s' not in enclosing section" msgstr "" -#: xcofflink.c:1783 +#: xcofflink.c:1784 msgid "%B: misplaced XTY_LD `%s'" msgstr "" -#: xcofflink.c:2102 +#: xcofflink.c:2103 msgid "%B: reloc %s:%d not in csect" msgstr "" -#: xcofflink.c:3186 +#: xcofflink.c:3194 #, c-format msgid "%s: no such symbol" msgstr "" -#: xcofflink.c:3291 +#: xcofflink.c:3299 #, c-format msgid "warning: attempt to export undefined symbol `%s'" msgstr "" -#: xcofflink.c:3673 +#: xcofflink.c:3681 msgid "error: undefined symbol __rtinit" msgstr "" -#: xcofflink.c:4052 +#: xcofflink.c:4060 msgid "%B: loader reloc in unrecognized section `%s'" msgstr "" -#: xcofflink.c:4063 +#: xcofflink.c:4071 msgid "%B: `%s' in loader reloc but not loader sym" msgstr "" -#: xcofflink.c:4079 +#: xcofflink.c:4087 msgid "%B: loader reloc in read-only section %A" msgstr "" -#: xcofflink.c:5097 +#: xcofflink.c:5109 #, c-format msgid "TOC overflow: 0x%lx > 0x10000; try -mminimal-toc when compiling" msgstr "" -#: elf32-ia64.c:1110 elf64-ia64.c:1110 +#: elf32-ia64.c:628 elf64-ia64.c:628 msgid "" "%B: Can't relax br at 0x%lx in section `%A'. Please use brl or indirect " "branch." msgstr "" -#: elf32-ia64.c:2809 elf64-ia64.c:2809 +#: elf32-ia64.c:2290 elf64-ia64.c:2290 msgid "@pltoff reloc against local symbol" msgstr "" -#: elf32-ia64.c:4430 elf64-ia64.c:4430 +#: elf32-ia64.c:3693 elf64-ia64.c:3693 #, c-format msgid "%s: short data segment overflowed (0x%lx >= 0x400000)" msgstr "" -#: elf32-ia64.c:4441 elf64-ia64.c:4441 +#: elf32-ia64.c:3704 elf64-ia64.c:3704 #, c-format msgid "%s: __gp does not cover short data segment" msgstr "" -#: elf32-ia64.c:4708 elf64-ia64.c:4708 +#: elf32-ia64.c:3971 elf64-ia64.c:3971 msgid "%B: non-pic code with imm relocation against dynamic symbol `%s'" msgstr "" -#: elf32-ia64.c:4775 elf64-ia64.c:4775 +#: elf32-ia64.c:4038 elf64-ia64.c:4038 msgid "%B: @gprel relocation against dynamic symbol %s" msgstr "" -#: elf32-ia64.c:4838 elf64-ia64.c:4838 +#: elf32-ia64.c:4101 elf64-ia64.c:4101 msgid "%B: linking non-pic code in a position independent executable" msgstr "" -#: elf32-ia64.c:4975 elf64-ia64.c:4975 +#: elf32-ia64.c:4238 elf64-ia64.c:4238 msgid "%B: @internal branch to dynamic symbol %s" msgstr "" -#: elf32-ia64.c:4977 elf64-ia64.c:4977 +#: elf32-ia64.c:4240 elf64-ia64.c:4240 msgid "%B: speculation fixup to dynamic symbol %s" msgstr "" -#: elf32-ia64.c:4979 elf64-ia64.c:4979 +#: elf32-ia64.c:4242 elf64-ia64.c:4242 msgid "%B: @pcrel relocation against dynamic symbol %s" msgstr "" -#: elf32-ia64.c:5176 elf64-ia64.c:5176 +#: elf32-ia64.c:4439 elf64-ia64.c:4439 msgid "unsupported reloc" msgstr "" -#: elf32-ia64.c:5214 elf64-ia64.c:5214 +#: elf32-ia64.c:4477 elf64-ia64.c:4477 msgid "" -"%B: missing TLS section for relocation %s against `%s' at 0x%lx in section `%" -"A'." +"%B: missing TLS section for relocation %s against `%s' at 0x%lx in section `" +"%A'." msgstr "" -#: elf32-ia64.c:5229 elf64-ia64.c:5229 +#: elf32-ia64.c:4492 elf64-ia64.c:4492 msgid "" "%B: Can't relax br (%s) to `%s' at 0x%lx in section `%A' with size 0x%lx (> " "0x1000000)." msgstr "" -#: elf32-ia64.c:5491 elf64-ia64.c:5491 +#: elf32-ia64.c:4754 elf64-ia64.c:4754 msgid "%B: linking trap-on-NULL-dereference with non-trapping files" msgstr "" -#: elf32-ia64.c:5500 elf64-ia64.c:5500 +#: elf32-ia64.c:4763 elf64-ia64.c:4763 msgid "%B: linking big-endian files with little-endian files" msgstr "" -#: elf32-ia64.c:5509 elf64-ia64.c:5509 +#: elf32-ia64.c:4772 elf64-ia64.c:4772 msgid "%B: linking 64-bit files with 32-bit files" msgstr "" -#: elf32-ia64.c:5518 elf64-ia64.c:5518 +#: elf32-ia64.c:4781 elf64-ia64.c:4781 msgid "%B: linking constant-gp files with non-constant-gp files" msgstr "" -#: elf32-ia64.c:5528 elf64-ia64.c:5528 +#: elf32-ia64.c:4791 elf64-ia64.c:4791 msgid "%B: linking auto-pic files with non-auto-pic files" msgstr "" @@ -5997,6 +6229,6 @@ msgid "" "idata$6 is missing" msgstr "" -#: peigen.c:2436 pepigen.c:2436 pex64igen.c:2436 +#: peigen.c:2438 pepigen.c:2438 pex64igen.c:2438 msgid "%B: unable to fill in DataDictionary[9] because __tls_used is missing" msgstr "" diff --git a/bfd/po/da.gmo b/bfd/po/da.gmo new file mode 100644 index 0000000000000000000000000000000000000000..deb4565597a9c78f5c682faf87d04de62ace183f GIT binary patch literal 134131 zcmcGX1$bRm_P1|Jk+x7MS}3Kb(9~1cRFgKw3I)PVa+6#dBR8qw?(XicgEKhA zwYa+uZi6%My}!Noxss;H{O3E*bMl^TYunm-_PKd;WL9k?(jCr*+rSFAIXnPv3{QuB;8k!Wd>ZzG9pjNmHtYj8gmYjX+zIxDXG6)o z-}80P@1Xp5-QD8b1_qcXLCM_}D%`$M={OB49oNDw;C*l)ds0k*-l5UTuQyb_7QkV!4sHm~@w^6ZiTN%#2)^XGR+E{B!tJnM z3?+X*xE?$Wc7f-^p73g@cpme72daF3gwliVdssP-hFf7Sf^v_0`y;≶4pv3o5?n zpz`-A91MSl8^XcOCT}8?zXee7*Tb&xU?@2!LFMlX?|wfVj`>x%5nMmP4SPa`9|)Dc zJSe$4L*>5(s(em|(zgeo>h)77f4y5Qp7BuemU?p>O1}<*l7F^$zY$8$ANB5EK$XY3 zttPJ@+!XT^D1T*e6S%_L9|I-#LO2oL0hR9`J=a|tiEMy*bEt5Apwc-G2CxJwpL;-+ z=h0B{pACD!JH7d3sCa(#?6%C>$3Uq1p9IxDX2Wi<#q&_8aylI<{(Ims_?$O)Tpo#R zi@7`O1Si0aVF6TmFM{3S-ca>)iZ@^Cc@I?hm!ahU;>{bbu<#>17ebZep5A<%=Z#SH z{t_Gl--m0%P4=V?;Fho>>JuiSN*GoMg^7bD> zrTbHF{v9fO$GswvbznA>{J~J^7~whA+fRgRVW02qXTTnq=fdu=#@p`?75^bn@m=E0 z|MYwXO8!rtzd^;n*4`F>XDIiLpz3!sDEEF)@`iYGK2*H3y?q5#y)E@T%=2{5D?D$9 z(%Z+O^x#z}y?x*F8>n)R>|^ZWxj9t5_V(s6Q0dBpec&u_Uk{~E%b~`Pv%URFD1Cbp zZUNth3il)I3488q?Rf%J{VsrtZy8j2kA_OuSy1V{6e|5ULFM~y@4gBuU9UpL^A6k+ z{sbjwll`n;*cNVuc|4ST8B}>zdh^~;a*l#(uO~v4|AkQgZh`&bDmWDW=tJy7Y(I>6Y&b2L==VmJ;~LFMNhZ+|mXxW`~$_&(eQb~(_} zIS?v;li>)sBb5K6;S_i&RJaeJ!fkMn)z4t4d`*GMZ!O#w?hSjv^Pu{ld*B%O2}Fe> zy$_B==;9;iz~ykGL#$su0#3(#9#pvZ;aIrgp;rGhAybw}9hCdYus6I1PJ-{iJlN|n z`YITOO7CSb8$JXj|1&rQ4nN$+t=*vH9Rua>HaH5t2^D^mBWyk}0?xs_C(MBlLePl%5#9)up0A+ve)D52 zf1_Xn=B02h`~a$)h97I?9EW`{pAQGZ2jNus6_kDqKQ0ov9PSQ>z)g;~`10X+%=^K7 z_)pJYVHxHrCm2um{Md8yiIE6J5IG4d-91lYtcN?n#qbeW0{fh7?yXSua0A>G{@~3E zPl-hK$9xtX4!1tl%DV{8#(V~x4Bvy2zwK$3-{Yao55pWd`gH5BE1~q`V7MK;6pn+B z!2xisGc5l(a2V#Dq2wRq`2hC9H#bIp7PY{dLA zlwR(5p5^~IsC3;3rH7wFD2yPGGgG$%v z3$1;|;Uvr_K>1$<=fU+aGJV|%s{Sv9z2T=&@osRjrEeDOiFto0{X7@;f=@z~=jX5= z>~)E?kC`yQTo0A6W8oo?HjjAN~st zf<0(7s;`+)<+uzgUDrXmuY!f}7uW~Ry29-1q4IME><({*3imYJ3VsC@zRQ(XUt{4^ z%=Mnv!r7R=^c;VcwbO&3;<*dd*`dIUS`4Rn9qdD*IQ8f(Cr$VH_e2~e-%`H zo(S{cvry%@>9r<*Cn$gW!SV1KsPg>?ZU?u%&dOyf%*NaVRnDivf$%w~^!)~Vz`p;m z@cD2X%*(v_RJb|j$Keq8F6TB&AtQ|~-J7GQ*=EJX{ z{EfQN%4c_|^j!`m{{yJ}b-l^Py@{{{^FkQF%ivV_2wVa?-E8S^g=)7~Le;~EaBJA* z7E51$Sd4iwoC~jlGvN<#H#p^1+9o_7mcpN*(p7Yu)z?vQH0HZt4g3~H;o^TX2Ff1J zfCF#0^zQ-tVm=R!fDb|C? z?K|9Ma&zDu>=(kV;016Lyc0_9*KisfbGLC%D80HH?g~5J6N&5sE8zfm9~=Zfg(}Z2 z?lt>~a2)1pmRB=I32F@pvj#JRbKl- z^(Qw%OBUX+>VK(L+ zq4Kq#=M7Nh_5qv#w|ms|p&aI6z7Q&1??Z*_^_cHZVK2-l!n5EFPZ-%Px$Dq>jHdOjMuCn;X!mgNih4WxNEQ5DI`P=Ae=CW`a><{mSi{Zy`5G;7c z(z6GY`vq`5d<@QjJ)bpJL6zTCQ2F=}N)LKIXZfvw12LZobKrw;82lEh{QEp_<5)FR zIbH`9{}*sJ-0B6Zw<@UmINzJ^_52kM!G7F}#u})4I29`V^WJ`&mn=W?;8g7QflAli zZ~*)mNL=V2wV)WhRWx9Z(F}#0>@)MA5Mm^ z!Vz%GcPySlSc3ULsPsGshr({}+WajKD*e~P4d8>Yi~M=>TW}-HpF_3l-{8)$&wEx+ z2SDZfF1Q(71v|hG;QH`iusi$?c7k2sH~-zC+y}zJa4b|hs-Wa7hf3$Ma6@=EoB*GK zo5Ic?n0+s}9_FD?;m1L_7kWnF=9rhlt>H0H>9`VZ3vYtb^OxXuaIFt5J^i5CQyEnL zj)Ohm1yFi^7nHty1|_feM<#C&RD4BH>59R%U;~uCG(*Wd#Pc-ID_}qD?|@3@doX~J ze_6VEL+M8WRQPh(2kzl{s^=Y0a^8m7aJ`SsJOuW{yb$(+EuJSsR}N6+{1R08edPHo zRDQaBV)fD=4!}Iwn`@!UZC}p|q57AH;5hhiI2`7DYW++(RQX*1cZ5&FayalatKTD` z^$7x$)%(hcS9m*Ac|8g@fFD7H{|-to*ZtD;W-L@bE1~rEY`6`)0m}a~p6@})`wk9) zn|x*Eln-ZOZh|A>ZBXGqgQ}M6-G7DaVD9>@>HlVMJtPpo5|q62p!{D8)xI8tO2<1;>HPsJ9i9Gd`5FLa&WD@83MhX|;TG_4 zsPZ@;=D@qX`)8iN!A-H>=sRmq*--MPK-rf=>0b*R3eSa-|CHz3Q2GAG^Cu`hjeKwQ zx-A@xaeJuz>VA5a3tmnpz7xZxETHjC9muk)5DXY^yo&Y za(Nl5o;&<%?WYSIh`BFRIc*R7!b)#G5~{q;_Phx8$9$!Ce-5g@`T%YXH~5d$<3Q-@ z*_$h%+VP%H={XmwobQKfPhWX+uiwmE2qkYXsQjG{<^K-v{x7I{+v0aC-|=u5<|R<& zbT*X#RZ#MOg^GVrB+I3%7)t*dq4IMOl)hXICHHlx_b5$u9fBbi@s3i@lf$@ z52f$BL;2qiZUs+(%Kz0+<@^>@eRk|<@ehKXFwcd`=K{DTTn4AZ6FgspDvus(oBX*@ z=3U?vcnnm(@+4Hg-h`XO-{8h@vvsnZp7n=wFb{`g;oea3-2|m~PeJADC(mx{X1V@j z0F?YG-dqAzAJtIp@F1vouJHDEdcFcB?|Z0n>AIf9A9ybDyamq2J*!ieYu|I>1k8te z^GaBN`9E+BoYpzZ&C~XT%EwLK{2AOHbKfpjKFgun{pD~f{1i(62Ctvx=5LFk>f;P3 z`+K3v^-Cx{=(RysBo606)yJ){3jPYEXVI=%Zhm|$tj7ETRKGKEL({AMq4erJI2GOx z$H9&pS-K}d)mJN&9-IPu!1JKW>kiK+q4eu5I1&CEO0R}@vvgO%bupg=Rqtm(mHQ2z zk3psTU8s7Rxv}ZvPH;2K`$5&`DNym>0M+k31=XLdwTby31XbQ8Q2KBh--Swlq`T?mu2B8p*>ETLpl7h9wS&E29`^S^ z&3D$?D$DI7%=Nqoj>rBN&(S@sJ{zIzFZSj)p~`QQt*u^XK#gzvdh<^{X20~OC%Q04Fl+z|c(rLSGKGxmj&mk0A<6i$a1L-ns8!$P=eAJc;?!?Dz9L46cLuIH-1eDpdMzfGXz?pvq}cDMx$Fb{_+zxhylTMgA;?B(rG@a9XP+W#F;{m8RW?eZcPp!Di4sQP&q4uiiz>C@1`Ru4PFEivy2mA{jr`n$8?2Jj|tUI``lRVe=*a;)69 zhRVlCZ!YlM8A{I+Q1g_lp!_`mmEISj%I{;(|3KAmw;`rC{h-?I45)Ff#q&0(dixcs z{q`N2<@UQ{a5?5Dp$j+6%C7|~9j8L2<0)_d5uAXz({L-70;v9HDI5W>hC|?6a1!h~ z!p7%9D1F%*svK{GOR^%7x1q|daFms66;%EXgwoGbq56|+pyGKRs=hjpwsIW?Rj-Sn z;;V)7e<@UXKMAEDA9-_!G3I}3D7_sFr7wjrfDKUfejJp(UImq&d!gh!4^@s|!d$rJ zSnGGn;1tZKLZ#PhS$`RW(x>y__V8(_@owAkS&;>>2$sN$q57Zip!$U% z*Xp?ms=N+`>Icq+>i<50YQGyyu=H*N)sKvT(&z1=>Srlb_$#2=%Y9Jk{mygkiI&gJ zpwczWb7#-Pq2@<7LFwJgP~+kkunYXbyRS9L>a!nIJr=+K?hMu6>;t7&XF`?tjZpQm z%G-YlRo?4Ows^LKs?YII^-&6k!WyXbp9UrGGAMudLgn*SsP^~`RC*&*%zbmHbPa>j z`DQ}J;j*ThJ`9E9Fz*Nz&xug!xExB4R(kVGQ0e>{ zD*n!S=D#-#Fpq_DUj$XJdqCymWGJ~;L-i*sq2zwz?SF@gZ?k+G$A?1ob9J73L6yUi zQ2og1P;#$=(*OIR^7#Q&d1g(sdhQ10J{ksa2dMNdhl=k6sC--nRsSoY>g6e@^#10# z>2xcnfl%?5LABR9sB*m$s$B1e(x(rg()k6HzGW3yyxCCco9xX+Q0cCL(({9$-^pKU$s{U=cA`P#ex;Q6b!&zfc9^SV&+ zb%Bz<5mfmM^Y(?_etW3$-NTy?_PiJ>`~#kkLdE|SRQxY^``4h#>uvA;4U}H|49^n(yD_&3Ah~0afm=dVb*f6;%2C0+p@}=UBRX zL-nKmp~98IVQ^Qd{_Qv@|95yk2~}Qi!9MU8sB#SET7NVZO1~FFwZEgF+S&O~@~?x+ z=j~AK;c=+;@e-83FQCfvKTz$UW1-328md0VLfOxOn(tLWmB;>2<$J6*Uj`-TW~lh? zgv$SuQ2yS5BjL|*3LG-e>>Hr+dl*#u&w!GDE!4PnCsh7Fgn6(-k=5UH&s{y2L)Xv2 zvG}_jD&DuD((w~i|Gh!6^^^T!U(5@k-1mWUKLL(|S3~K^2T=2q-(e1%Tw>wspvvbY zsCCw*P;yp5wUhUt>Z!~2R^Nl*EX)hxk?=g&3J1>5a_8gDhYG)Ssm=R`LFq{Xj)vz# zwcqEV%H?M$ed$wX=_!FTF)xD}=kI|kuk{yL{T0FCn5&`EaXOUVyaQDZ-4>eMaWKGK z0Y|}up!%2FU@?3NE`_XL51tQILp0vEQ0cP2UNYUy|b0yB&hP*AF3QLh06Cc za4y_xm#oN*uo`Oqx7Dsz&NJZ%%=^Fs_zyS-eh=d?uiSW*=VrT^c|Uj>?jJ+d*8$P2 z$N}(HxDy;-k>%bqpA09+ADjoXE3+a^Faedm_u-*1r^@8q1ZQCW1ghMI$1I;q;S$W( zLY4Pc)mf1iSPc8a2cX95&pkJ)vGHXjlz#63Ro=&YJ^+>PAED}bP_1zAQ`D(?-JSUbsuGFL#Q>o}K8AD>KC7Yz2Rq2{d?CvEgb`);@=Uf+)na*8E%ic=U&D}sQS7ON^aKP zrXK^K%6B0wgJ(nK|7$3@llHOnEQ9LruYhU?55Ro*qvwQuP0#m*((7lT^1ar6rZ3~5 z>{me5-<441^Awc6bll(1d!h8E4$9xzQ1RaD-Cu*M*X{>cIgf=~U~YhFFNZ?q?XpRT<;KD z_YH<>cl$u;$CYp|_%EpZR~>5co&r^mPeF|*pFov&x5G^D=R(!rnNa=pXD|xK9G>Og zJD(1vH{ZaiaPAS7&!eH@T?wmU$KFY?sqoMNg6m;zfs@%pOZSpFi z(tQS0Jv|1e!SA5TW&APLuJ?wLa~o9q_zc<8h zXX)SF^K#D*q0-&wciI)t=vklC$~A=5M-ZBb45p3Dtg9 zLG^EIonq~8K9u=%sPG>_wdc)FHSPoz?mVde{5hz8rt4{zzXHz#pvwO)sPXADC_V3W zy7^xOWq%x0eXoQ&z~7SyLny*RX@MM`EbEm zHV?QQO76E%dfD%6>(65FV$6p?mEXW~tbbkz1I#O+{GSO`KQF_1aI15z9%`ZL;S8v9 ze*mh!e}!sCBhEAXI;i|!45ha(!4lZxeCto^U{}n?Le=v*a8q~_l>A4b!v7m;eCT(9 z`QH(iVy=aY;hj+R+x^0<$i8qMRKA{o)yLsbdVe2O`F{iF!Z{ZkPlf8Q z--XKmwwGA@sDjGxMNswenz!$8sp&}`RJ|Sw)jscs3ct=}mi}2#4V9j*SJ=2)1XV7lLFMByI0ya$r8hIKG(BpCQ!$?d)o;HE)z1F| zXTXV9*}U{1sC0e>r@|3eTR9}4r7v#L)FVkQ0cq}s$Rc<-C^(#(}VGzC2%VCHBjY#Ih0<$?akXp# zKk_A1KhgPytVjU+L&ZBAR>9>^HpZ9d);LEwlkDI-v;IH zSJ(u{-)!rmE8zy1?}i(~C%pM}Z~g>o9`ZA+g~2UWFGs-5Fh2s-9^Ql<;CE2%E&pV*}KM&PUy#ZD49sX(k$wVk~Ih1~#0hQj@p!EK8sQT!3yVc`VDE9>H z1rLE+!%JXixDu`fpM)F3XQ2GQ@AjXmGERgV=PIDe?RC&yT>R*;Y)#tfT<@YQc4L7~V+T9$ebe{-o;Yzp!4!YOc&1q2M?aNU4?r@*6 zAJqJ(5UTywLgnut-u`ts9P^J*=^VJy_G2bPrDqOQx$O&;zvDfx^nAd(zX_#pUqQ9Q z$o;n8vJF)Dp-|&!9#nkGp~lNAp~~+)sQUX6%76C{_COY?bviK*`yD zA2GSTp~`I>RJeIi?KcipkNZKFeyH@_3rqd|L^J!SA5*)Aw;3 zXY!%i>48xCeGOFnFTuI+JE(fjd&0)K6QK0&QK)gT!&BDI zW<$B}2jzaNH-F{b`>!(n-4&``o&vT0c^p>3Z=uG;MNeC~oDNkEH$%1i_o3=}gJ-P% zxE=23qf8{{$6& zqn9k6K~QohLFvuTQ01{FRJ`XvrQ=bkbbSex|E!nI+!Lz(429D7Sy1gh2D`#mD7gni zmB)opa-W6j?|y@Q;pkUP-p)|^+yE8N8L$A}?D-4SIGXpW#j_Vw`#1{Dfpn|rjg|-Jy$`+ z^Ep)de}`%ZJ>IZ#o(AP!0o5*BJXgZmm^XUU`t6;d=2KTdwc`(=@;BlwGw%aseiTlI zo4#%SOQFoi!`udMn^0%;!P1zc--z{j86y{JKDu zS3l43Q1vhu&V=P~IJ^uFgs;GLVaI=&d40GA=CM$EUJT1&1Ju0fDX4Me9jN+R=VR03 zZ9S*JJnVOd(${mL^z{Xp4}XP9&y-KBU6n%30~(<05BK(Gd)^AAKhJu85&dO7FT~Sb1hc^>1_F0Jt2gelCQ);geAE zzJzLz9lx}EZvdBI9tfp}r$U8W1$Tx&!$ok1uS~!G0aZWW!>MrG*S62J!t*t#{$kQM z*3OqfmD6=l_V0W1Hs6}L6i&td7^wF5ls9+zx8;Ide%HwRPcJ~R~2(I(1wVy5Eo|uP2wdbp$ z^!Fy14L|hu>;K2xH-(xHYz?J{+d=719#ns{Cseq%p~lH|ezS5P3DxhF!5!f~Q0@06 z&#$5Shc3Tcc@2Xq$7xXdyMwo{^XC2FX4sz$H6C6Gm9K}P!o3WYpU$%|DKT($kBf>g_4G zEsS*R;OcujsCt+Jhrl|h_|Af=zuTee^JS?1`z_c7{@~4Pt=+-KRVepqQ1TZ;wYzhU;~) z_~v^a1yzm@z$`d{Kc}Hsile>jaNIBHh)V~;NCCM{!>)pRYwV_C*GukPm+~Cv`754Z z!|e_3b+P+_dwrhohL;lV4ybFDAwt*bt~s7Gy~v&TACJEo+~;`tFY>&FZrr6Sb?{es z3Vvhw*@OE*?3%HA6o0ztCL@D<`0w!dJ$C1Kx69zg&X@h^g;{l`t1sbn?Ew!U{NC_D z!s|*HB1^Hm2)h?CcP8w+JlFHA{#SLY>jH!O+Z8_>cp1`_o47B*T;%QK=}7KkpWfxj z-<{`fP}gFf>CPijo|hm?S0m=L{PX^vqp*9M=Y#Nn4YF@FukP>f{M{D&SMd{G6+Gl% zp2&SNZX+=7!@Yy|vpKTv;Q2Xt4D8R{7rD#u+v?*y3A^doJ&m2N=RL2(o*_4KDE|J9 z{X*_?@AeW@A5)Cm8$2^KM()Nu0681+{I2)+3wAxRyAXfdc{{8k_u=PO>|cg8-u_IU z55(;}dGObV@Fo1s$IqQSU&pOB{vv+E>$tS%1;n!-_v`rYnHFCoo@>3oPCS2wpB(Pp zkv$K8hhulU;=qpXBf^jnxsT@|JpUV(V!jvmZPH}sVPA;5u1cQw<{>FIuEAaa!X3dMH;Pw(6j`;?jcgAgN?&mSzg1!32 zn|PMkQttfpG-7@Q^G4pTfN;9j?HwQeX-YdsyDBMHU9Z5?`rES|5&-|=BssCnQtWPHr?Be;DA^L%;=2y-jX2V?gHoQ-<~ zyRn$J^M0_&xU#T6&$~T_%OIYg#QzL#UDF7!YdyFKyAqyRZbTR=BmabRVL$ITz|SMx zwZ!|Px2xv)HvH{IxGizhRqlDe86&;D`8oU^O}J+;+i`=>A$!tmZb$CV@zVhw0_S@7p@e^k=VhTlIE3*3grm5p;&wm&SNXI(%ku>6 zuE5Vu+*R0b12wLn3UzIZpKI~+E9N0^YwiN>1ouC^oW~S~=hLuT2nTU%jyMtXJ5CDo zR{R|8{deZM19G$EA8zFBz1PSz?4QMOZ)gGUA&jmo@cTB;FPJehUiSD8ufuqF4ZBN` zTjuQxusaHKKK6HDx0km+1X+Wz|H#Mx2>v=^-W&JZ;QQGB4o}CdxvQ?zv0H49ksGmZ zQv6)!;!oGE*s-Pf1by{ zH}N+CJ6-Q`zk}T;ggFsj4IjttI4@%ccJ~qPD7XpsuX7K@tSid1u7AQapyumq`*3&S zU)M*t-GKiCv40jGxL_Q38aANCaNcEP-sH$Q{ly|LR1-opJ0Zv8N~diSlojE{-uVBB@h$Is5*UgiL^ zu7$Yox%c`!My`ABN0{-tTnWF5`Iv?>`D3Y)&4{`iU@$h^Xc8B^ng@M@V+6VvPHG$`wG2F;~hqvs9zk!6+ zb(RlvJI|fDKg0h_;@%4PxR;Z|a~IrJ;de`(8+bm1=lM|k10Uk=ATJMN^4b_buVea- zdwXQ++7*A#z}<1%JS|Ko%#U(khph45eq;C(cCFsLCC|FLds%ue!>z^JPv-e(+%}N| z*A!$uV2_a=JlAsTnuDLK@jHq860>sqGJ4cLz$W-R3tokLc)h{HPd@x;!k>m)6?YMF zACGw#+y?M`Bz7w?55oV|m=DIjKhK+CKg)+-AM-D`g7!R}t3H|2SKp8Mdo)VxRf^4yc>EpWS-=Vo|=m-Qs( zZ~e2pU%_3B99@rl`^|YifiVBXZ#8b0VZMpyE4iOc3;U!Gr?5Y8Z;AWb*iGlY4Sz-0 z-I(U*9%Sx>-8$G!jM zUgt@k-}Q23eH{0;_*)BEBe@^Oyfe&)UE#&tx=w^Uz{d&OfxC~FF&ew|dHw+R=e^$x zeEf&QN3i?e+rL0Ob0v)H9iGo6+_yYG#JvK)!{DdbpUU0dH4^{7Rb0j=in`w|fZN1?pPPa|?cY zVm=!Vz^v3+@7!$yD8XRh~Ec! zeuZ0C6*7*(eHr$R*wu3n#5@zXU*QJM7xN+PAN0?M;r9@pzu_K7`0c#?q4+t8=W7W! z*4qh};%78=6S-Fs_GbL)S_kt0IMJDyXUGk^GVb@d!|PoCFbj8GPY}L@=NrrzSqJ&A z@cbVycN}52$Ng^XcgDVnJCElw_yPBAJQv{iUi@9-Wnvw<*gseE{EB}*4}YcjKOf!& zzkq#w+AhMZt0XP0|1hh_vG_ZJyBKo<_w~HIpRl`zaKFOSvAYib3r>T&dUIce|DWNh z_&Wf%$=t1SA!Ow%-Ct`mWcL{Oqi@&)%-zE=S8*-nC z{bSsnd>Ul`3D0j6_F?>|U!SBIPDqRIYwzz)!mP_Z2e(V{TY;R{FzY(Ob5EW(!2cA? zKjQu}JePY<#fjUG+`4YZPZ9QSz%!6{GVF)_A=sVCy)Ms7p{~zy(-lL8u6oRM_PE;L z!9L8J@JHl+MVO88wH4+axNqU!jPToIHx9Q-p09-oA4e$gL>`6`{wQy8iFe<}b5G>x zIv+ptlzyHYVEVNf^F#Q*48Qw%|2twA$J3SAZ|h}kgL$%d?~dJiJl}}F5u|HJo@c?U zVJGamaKDOK*9y-~vAdpI*H&Jpne6W%{0+waQ{1}o+=8rQz5jH7Z+dxec(+;j)AbbG z2D=x$>{ieBaqGrCAGZd=K90Z7F^}}&mh-$fcRp@$AEq~4%w2(>X2M;K`&&Lf9wSHa z{Gm^W%-KAj0-y7CBXFO?^Dfxc!CuIE7Q0ZyF~~h0yBPPC_}K}E9er4gkykLU)C1Sc z*bl(mfiSmnKZE%naDVt3?)Tuffamep6+>M=B3IXUxZUiZAI1C-?wer#1^aV&{tvtx z^C-er`mhJ`9A15RSd9Jl+#lob1^6}h``pLi)*ohL|1!@n5^fmsdSJI7x2}sZZ-)J& z+&f|SI(~J12W#yy(iyiNm=DMA>E14j=U1_x4VMw_0o+$%K90LL<~{ItJZ>%UOYUww z&&JO`a9aoS&oI2M<>3c!o)KEYjky0sICpg_Sl-mw+!EwfRW-*FiJ&Z6Q5Oq3b&9OX zA$!=ky5*fCorS{f^Z{&kJfDy3&=w6di&S~tMlhK6C9V|Dn-9#s`IR#zutEj%s{7H5yDTfR$> zorrW=S|7~~f>|U{u?F*E^%b$^9G9B>#@2?aoU+EwkXSA~7qiY6jb^4j-SR~0(Uh&Lx%QsGk$g(Rr1JqMGW5*=%3t)CFINk>XfqNTaD zvgHpvv^J2l_T87pniI-)w7EIDLd8!GTgm#g+GsPC6>E+sTH=+7VA%3(l%@0Z6%En) zcx6y(rIm|S!SYyTkk`6AUKfuxuLx$vqE)eGXWx!K=HvvSV!2w$uB*c9jMfG#{Hj=@ zvN_(=(%2lh+M;@*EkR3dEJ(COQSPWIH)$M(auBkpF`)XYqAk(DS77g;J!uV%EkRXG zx>+@ZU?m8PtGX9wSMB0u2a|%ml+7U{mJeP7gMAdXxv{1>TJJNe5-4qnRxSw=@jYWf zH7T$5xk(HOg1iP|Hm%DI`VH(C)JK;qzRD$ogMKajf|h8!E8KBu%(AumO#N<3FP^lp7US%CS51F8Mi;6%7Q_=lG^lo}-BR1yKz=G(eO0Bk zq-eY$-cS?7TZp%ncB6WzP%+VJE$v=ZLlCq6tHt$O@djF!>YfU56;0v%flrH^SgIOh z2^UE<23mO|%7YZI8-Ebv|2g?_E62Z({B)oHRkRCzo1Gu4rcfFxV+mJlrqEqS z=d9z+>T<(zK~0B#KbWREGo7Uk2K`+*4+x4{)wR+OP_@fjn-YOF(8a#d4ox2ce9uqR zO-+>*jnr(dYx~4%9cK_URpzP&hmE7H%5Gq5Lv6I7sxDSFFsQ7ra$Sw=lkM6(4|WN& zo=DEsbMB9 zANU=a;TKc;e$#!mi^6CvBWn4eEnNhvJLm5og+n&UOKiZx6y!%|%}(sP5l7`i7VPt$j~#H*45Xx!2= z>ca$*{dmg?S9O^wz=2X|(zGtju**uUxtSp<5o6pZAaYFsEdj|i$tcColyog-OO($2>pHNS!B5^q|oe6fdp7Y}zkntfM(=X<~V|l}fObVkYP9q#6%6 zh7Bf6scSFvChCcjiqz5^ZAdW7aNT0qFR1`VSih0!?n*tGjtn;~N!4W23eP9d>0BEJ zTa(mB6UlN^>KKOl(=ScRZXFc%+1ZpoB9}Vn*4$+KNcN$Y*1>JsYe7Nryik^P{sl8j zr?+EcdXvpa7>;~&&%U3wL9bxmEDAmqR0E-wzhRENN?60S+z$@W<&@6&0Od=g8Rf%h zl^md$CTb0zb5Poz(r8d;8J*rq!W#lZ=Lb30`vM^0DA~G%Hr#ZGqYrL5?W_5ET?atDasI7}F zM|FKEQCG3%`pTB&L0YllC*ca)N|LEiZF9W7rjofxG9RjNnban?%Voh_<7Pm~4z-l# zsfBmaBG1;gc-OQr;#*227&9tA5=<<}%b!h?wuaH#py8mVA)bg;O^yWlC3!Oo6jdac zRy@!B(O+iT42vvRTYOaMH6*Q>rumMKmi-aGm|)LDGklF!w4 z9A_t@t^2|mC9B(+Dh&^$SQ4_(EJn1o7}?fhR9lPDNsDMjJYZSb(73EYA~8-HGb(&i zL?cI}n^JB?DTm^;$IwHfv96VwcT;1+t!pKtD#zv0JtmqQ{MM8We~F-#4m06fom=h6 z6I}vx2DON*lS>V;9p)pYHGD(rYhQ@}bc%?nH1S3ai zWrYk`G_srE!+0-YwYfESQ;dmPgA?NRUD>(QK6Q*u#8&qx8HvW~mSwcKU`B}sVb8C}g zoLO2%FId^snrN-?3t!tbmz^wZP;eV6{j=S$R~4&htqJ`6+wzthEUoYhyR_-MdGvF& zHF|U_Vz(aFRMDcOr%#WOEVnjMw$*HfE@huQf+DkBLekubWnR6d^=w*M`R$SP_|wv9 ztBr8d?$**_r`TpH)y6HcB0(pV@@vbr%9ds~J!PPDQ_q(2w1TjCLPcvF#qrYo^wV7Y zO5SJ37AEGB96DV_(_MUJX;P9H5TTE*31$y1)*hrS_{l^?Gn1xhLqm)i6hkLd^Vl9} zP~4SnxMk(0JS}mz5Dp7e>wekO3;0=*#_QaqWh%XhvP9K2Hq_+M1@N*V91l=c+q?4{ zZ5nP<-h9*0{J>SO8*mtT*m?Km;Pucgq-}p-FvA^7>EvdC*TKyBf4FNCPDC{&a5FBa zybbKhwNaexx>n8RObR6xPq@tpHsYAREVYuOQmZOz?3tntlhdT7x@-x*M{Bg|FO)#a zTe~H|xE^a>O2gE|%J$B*dZw6iGv?fK^Gku`3`H8(Sgj1Yu-a4(yqah;%jWbW(HPrw zMuMB)CpRpEg5vx+;WFGcM3=E-({8F}uTy&DRKBvsDSQ|MVk3dxVs+}&DW3tRAvx`$ zI(e^?ZVZA24a*p?g4r}_5^2FKl=tnFpkS5*;ll@}dUcI8632Ul%2<;M#$HZ!>XheS z3#MY4oYmqij5RQQCtUJ@A%i|2 zZBC}bCBsLl#DtgL`sukW*$QVgHZwSoNxkp0%S})HdpK_;l)14b2zWtL-{kC>6jS(I zMYg*oPudCZ9NBK->;|?R*kZCRGEEyNN3!!6UJ^kC<7PnnrO8$Wi+9V;>!%4rcK$AI z^k}8owd3SfGtsUPjXJ4tXD*rlvi>f(%QLn@kG$4)aH5LCsh=`#|xT8Z**c141h zFmmcl6c$cX1ov{qO=!Z`YHoPJQ@-mDwHUFrhx#wKswU3m0|NFKm^D|)pOPmq25bAo zqGsII>!a#;O>48g)A|#yv{(7iD^-d;5lovuyHsPXTLcUyiP|Scl4bzQ;uJ9>_|kY| zYa*~+qRh}tI&vf-=kH2T4JK<*FB2BB-?(J@Dh$vV6q_AOUe~p>Rs=O{uQ$2QNJZht zTlRVMnuX4l9>os?65kM8t`!VPE1gwVUb^GFvb_BA(pg2*7cuj4b%v1s*?DwLPD|N* zB0WkA@6+_&hlGW%AA^3`iGE4%ZWgNd`955g7KbD)K?1@T<7@QH3j#)ffW06Vlup1J zy@oTdKl7EGt)|7lnrLf}Y?iPFXP4WlaWZE50KHqxCF|}516hw&@-8f);_&6HB2Y_E zr6=lDRPJ4<7IP+N5Sm}7o}RrWn@CCB^%h8L*X4T4nKA2@u&633C!r;wZE~(I%9Uvl zt&!HZ1iO(6Ut#Qp|Cw*qMxD>V8vMG(mlR)GFs*!E!Tgy8nL3i5wNxD^LrK+}r4YWT zw#`m#yLxmqgDPv9Wrd}oSEul3VR{THk1Cu$@?6|dw<5@!KArwFC|!`R!gl8uXmz~t zrNaqZm}(-gaDi_@sVu0urN>^(jFW}hvS3+loPC)f(Nq_2;f+>}s*qQml4GqfCBqtR zx|I3lW5&%bC*kFV1@us9UZnuq1VSissQxfC|crr?pk!)`SGCV814)vD8_hw^J};>-i<$C}E@HnCPRho*pH6pwE~G(Ty)N{V(?mD8vS&*;9A zisJ(_59gh*YlFnKntFL(2;HoDq#fm&&p+OJmLL_^L-IC)+vc6XLpq{f${@U~8hJ)2Rzluq0*;#=7J-32kLg&_sdI^)NuWG74+T zrFS*&Ou8EDmb#g5hR0;R`VPOH>eaq-GH_bmgacW-A(t|GhO-cI5%FhkxuaoI#El^+azYyvKCB+iO|3YZAxjre9GgtqclsZ94 zu|)B|Na<=qDSi6J1bZXeo!9n>8lR0dIlgh{uyttK<9A6dCCSbwLp%S9YO~ql7dkAD zNI{y45nRe)6HGU!%NW!rXyG20RNAIFxcP4@bne{;Ir zUbL%?UG2+e-*Tv}f|Bbe|6ZMp)wePUQtte^iwP@I(sJK6u>q$jOA5!SGkLefKPGRka)sKRv_1C#XMtwmVU=nU!qDHpEsur04buVik-2=OOL z_8~Gy{%n>_ex1^0<&jyT#BfsnBJ+C+X44*KnMl+%^XTEEGf5U%nhp96lDu{KD#gFC8e|S z(z;KQ;<{G?*^Wrg$Pq(^j2z+OYd?75e;3>}j(~YiYJD4%r08-Kq@CzeJ0WOCTFY{Y z`a}N}{uL-sX%exV-GMH3FqX~NRQBxhZ&m==^4l-h|yw*`|tq_8Kd!1}~?RN4(* zfl8!A=wlK8!r?FYwrT$wJ-Syu?YgE`eY66UCY)tYD_&4kW*Pol;aqvQ8^ZS-=u6sU zKD8ju4W@EgT=H_5)z9%XA+d9cZp=vT@Fwl8^UQ0mtc~lSiq5lzQrc_^ zn;i4caR@tl!CtZU7m_o%ig-;9E7~~o2lckrS>~fru6}Hmpjj3#5bPj+OfR%Fbmj)r z@(K%wk2aslj}Kg14+o}<*QTj3WBz8CsJdULc5Z_}-F;#4@T8QqeZz3U7k&ys)g))N z8VxNCP97PgE9SkXUV4TTrBpWB1hlf%`q*!i^`Fec@L}#6V8u2qQ|_A5FeE6ci$&Qm zXIe}Abz0RX*YT#INqHLg{C1CqI@X)oVa%&*s*MKj=r+g4v{nliAj|LL_!q5iwahek zCpQDAi8aKS^bx6hi{J$%MOeAmn|!zXPI2?0kc!Xm$or*%|7O7o!G)T^H#wwGzDvKdgNqlvKIE|xoKZpq{1ewV#ejD6o-#-$AJ9S#^g{> z|ArKuB5E(Vi!h}es+MFANExNhV_0)z*QDq2!=B4kVos6Egxj=E9t{ezvuhTQ7&&I_E-aiInBn;~ z2aB7;dz$+A!o5+}S2%hP$7IpICMt~6 zd`Qv^ch-wp4xZhv2Q!o8Ya3NUe`a9etjNFJ(xz*8Scq@l)W4;|sEZF=6Joo#pm0Xe zzhIuaL7T>v=I2nJ^p(`ID_H9`^?_G;dF7bpoCGSLUYcK4o}X7*;QGh(sigKEZ7Crw zLO)pa_$^#YN~KFVF@o`y#@?Z%UiRe%3hWLJyOUnw$xJmyavAo*yJ^O|rrwCDo7%6- za2eZ0w(Aor1KHLPR#H|zeaE7_d8~`WDW{(j%5_L`Fttu1Da+4~TnEcwNZpgFv=VYd zr;A`&GiN@MD#$*Um26pKBYRp6$^CF0M&RqK$&-?0zrgKRxiyYH=XJspL5_s77s232 z4mi1`btKXA#xQ)hn9I2Vx9g{ZZ9k|bIebN@zTf3+LHJRYZ(vRtC-7;AcXbE)lx$v} zac0aN_w#RPsRjRzH0+xe*!jQoQnAw#e8M3e4Bf*DagO9EI)qgf$734xc_0-?!Ei*w zLTJ49t!GH8|6z1cn(%0S)Pl5Av0+Z!5g|p9mYpT#+pqD<1M^j zcc1>b`bq}&jb5EHZ_m`p(YC@RMtC+sMd4nQhgnc`PR^ov)5^=H4a;2SGTwxRn5b;v z)J~{(E|se-J!eeU)|cM%uW9Akez>$HtBJ6xa_Rch5Pukz_O|E)`E19X0bqZCUX^Ve zjziaRzBN_nsko?Lt%)dZ*Bkf{EukezGrvr4a+>?O{y5q5+iZd_;pfdRDGiTRSi4f) zE-KrxykLHM5wn?}R>1lm1^vw^X@%1_Jww@QsAG~;ZAY%FYvU=omQdzTnwR+rW}2EN zXReZEev^wNeaB;;qXu+~Zs|I}H5fmQaW?5Xzq&9Ru0n-!eLzyH6l3Uu`siE|35(ap zmX~X5qTIW=5_Nv(seJdIO@Z z;cLYF`K2>Ul1|C8H^ENVq%vqov~_vL)`p)QTW=EOI{_xpY@)2-07<>6yshRLlz5?y zn@e?@P%M`a>Xu9GhSaNcozHb%+7poBq5arXabyaxM&`EI?H~nRrJHp5g7{{4s4U}sPt&K*0 z`y$47n4AmelL+5H{(Ff`oORSjefNJaWX&0AX=--@8qWWc(=%%%zFAeZTGn)$-2JA3 z8&+0xOvTD6J~ge>;kM+A$kd(hZ2!xx5ci6b{REvlU!IdUPVX%Fe6QX*0~%zqMx+b8 z-i}r?Gxonv;_C8`C1?XWc_52ldyrnbZwXtNU$P%s6SL{2m%;}i!-un<%f>Dr1g3>e zkIFYLz35_6D>aR#4w4X=-y`uNQ(KK`;rv8TQ*(C&*LwEsCL0%O{+mj5XA(6krfN66 z0$m39%7;UI8M|C*DajawGW=%@In;wot|sK>EB$n0`aEz*P;A`;^{55g5Kii<0=&@& z_Qx1}9Ima>oE=sF)OKT&_v#N~xssJWv_BYyyYo63ICFmSf)Y0vtne~y|4SX7J5{Le z%1S>hEiDq=FvTHdQ;tyJ>J^wF(;qqVqc3wmEmkw-F#m!&0n z^I7?YU6+$RE3YtRvsw%~{*l8gVb{$39*s^rWZGxMl(rL@mM|MH!!63y)2G+uEzyRS z99}@B1+$YCZJaWqGtU{ryWc+2ZZU^FQGlF!-iX zQmdWR95b&bJmXuoKNCG`TIui+R)s!&89ACYZMeN>32Q!c`jJ*(sY!s~>T`*-dl5USd=E!s)4|h>KfJXh$Usmh2X60zh*Nhg8=w zt!Yce7KKbfZR^w>Nl$P7KIIvu>dGQsUvJ%z#TQ1_X8cZOMgrWaw2YoP{B0V=_(y91 zUb(Xz)Ed*Dg;3$U5uTKLiK)3`Q{{g##rTszsRIkkVo`owCu4fTl&ON5>x#@-tw!UV zY8I(FwBS!c(M{&E>hd#1H+M{P3=7eYA-elHF< z(T7;UKL1}0HNSl1xH09t(kPxWBiS9%Si+tBaHHt&R%qM&v>VU=sS;O@VG%hQGs9ggFeWO4|~JQNa+M`b1pQra%9CcpmeJ)!jpF$LacVD=rXFL70RL#sYFa@)DuPf#h% z=Iv41fNQ-%+c6+x5@Wj|UYD$X+YA{Q-V^oOkqnn*>5`K_;9+~He5S#6BiiL;rfoJS z-`6m*rq4%Qow^x=y{=&}PT%2i9}jC()`BMEt&Mx%X0iM?i&_@X`s9rQXNpp%Lew{y z)8p>UH1GQs4~!h)dx@DT%25%|Iy^S=`R_oefyK_|*<^jjzH zIGn~zja{o%8a~TrEtr@87yV{z;Ljm8cxbq^P7^B+L4ZxyWf~d{ywW4=k?;2m0R+>P58RRFO*Yq z+=BcsrfBuFJ2~M=-v*uH&G7xE8At^yK8=eYIpWC$!mT8|EHW8k2wPBaNdH4QCzvC3; zvw6mD6wu9x`C+9*LWi_e(f)LUJE-MPv$m1z*BA<_({QdKC3|VpuIxOfso@EDt#Io2 z3NBfpe9M$ND8gPPeW{y@&!^X!#WKhhbD&tWIUAEtX;#+8Dwia9`@{%P%C46iJXD0P z%H?Z8>LWv5PTLQ^C&%ITgQOj0UOmWc7I}62LOS0o5{*j>KhCJv>FH_7^cD0^j_&R^ za9tt$cNN(_wEKMqEvUkmIzBV07x|eo(_>DCmCotygg>0{e-Oc(DfOfD`Ux3-n&2-a z;_n5`SP$v-Q2KyCj!&vKrzF zw;+yHmAln8J9h=4dpMa{^VXjm=iFjA#_zB4%RX$?^SjIq=vBU3kh|v7?#5L5`O|iH zx(eJ23^J$Xx{HYIe5rFu_Ke&h$L;L0l|U=a(FeBtKr+oOjH;!PsWLx<=DaV`$E&sr z>UtjQxO6N}S*0Lso|IJ0^aAD7nE8p;xmS1`M%Gcv@Li#MxnRSk9naL}3O^3(J~VJ| z!*nE$D3UM!>}%Nxq&655t1YkQ6R}u%ZI!we`-v15i{!$8?WIGVgsx^_<}^Vg|E@zn z3_u(@ZRlnP+GuH4QU%|{@a;1>W)bh@B!4u3Q1oWDjiFC|{3|%XeJi&P}ZJ~Ld%wqz@c&Uk zKUU=XDODQb5v&jz5WTq6vXC!6=kZ%D{oIhOjYqbLqUs}Trmd}{%nsYF z&5%~0pHt6Gos&q3)U-%G__IG+2LUAEuR+47i*cpNNe;GUdrwkXM_JmWTU(K?>9{^g*8vzpXoHoE6&CY_4XVhH ztFz@gknVr6wU7P@h3`LfHiG#Y@tGt4M#X-9woN+aU*XtsMD}0)6ac?Pjck1A2sMZ5 z{Lv_NLjJ{u-YxN)Po$!u#xmHR|FFHeMNFs;de@q!0#tLxc6##L2c&D>`X}C9zW&5d zdm@t~yla~INil8g+Y9;!iT^ud+Qei*i~Tp~{^UM$nB-2-ZtBnc!dO3Alk9f*ARu*S zIJu2WvHsycZdfaa880;LZL#_$Ud~jtR%&1}Z?+5U(p+B7DU9UmwNjlM zQgpc9{f<;}8A%lWx2Gy%EA&gk93W5!P#@zcR%-9QKibOK8~IM1jO7Eiv=dowLC|(a zM*#i)cTQ7XYa++L=13bH!(F7X!FWwp4{4pVi}Jsc(BJO?xsOs@SDijz^4slnY4&R$ zyQv!0x9Kc@`bz=jiskVCtL;s<<2aIh&-f}nMYL{XM5>hFDz%y_Ru?vs7-DN=f}&bi zCp*DRfLT~O6A6)Z&;2@YFpp4m&V7UW&NJ^dzrUGpkqZc_s@bgq5aDj_;cjlbncFGsGphDF9d}V%ue~iu{+9)0L#w{wKc@kH{DTkGITqxcs%|bL z60jFX!?m}YZ3mq1giz^m+0G&`jLozU>}dRt?#|&` z^Qt7fH@bcqWoh+LMO%^$CY;J5{#|dQq+qgviZBMrAybbiHLGeO8hh~A`dLWLL-#Ow zS5Q2#9eQUjNh_-Feq18BNw_s3F&7ayJ2U?mV!%)TA!2!YaoH8!G%9IQqiKy|6B58e z%|ser4T!HY538Qb05UM;M*tAh4jn?AuWx7`ED2PM`mBCftMY*T%Apr65S0I#5PtAU z03Yc8;2Q&=UyJ_OfJe$+vh`j#fj`^$45?opIUxPo1VjzkzaI_~)$PE1r?gX>&yz(H zTKr|fI<1;HeSm~LwJp)5jQ|+J{PUx4%{i-yxf-zu1X3I%p-TH!eaniH}pGb z?c5omcm+Zh=Jmk0h4$kKwJv-ncDA%^h373jOO_0K5(vBzwJR9$_9|4ZdzzWesu$KSf(n?fmWw`bsz?^+Jj3LYt~mW{pGOBr6v zz)SY1C1Ms5qdV46aS1VkPM4>lSaI_((ufO>W}5w~a!%R!9WOPJ+Wg?roA|@s!2$1$ z7u%7NzG1S$e3KA|M$`CZLPY1>3H}%0t9bTz=rbqL` zRadP5nBm2P7>Sg5=M+lE2BzsGQO@zU;e@mG^dpekhXr+MEad_jmxAt7EOTf`X2 zG8pud;2%&luQ+S#jB=c*-93QE;I3d^y6%mJqL&^EW5DM_Q{NG_26U3s_qtdh`GmQt zx|A+f;Qx!OF&lr>eYmxUF>p@;tt^V->-?LF)$3nH?jAQR^JThsKyC!3d?{|v4FbMm z=NDZvwZqk;ywFn`=le_iN(=!AxDsw*^Q%L=3|G_}j4M)HV~CePS(=vUyL@>nXOSuV zRU;APo0`8tjWKDhI_=0w&H52mdDE8_mrIJ-@rhKPzdA1Oh`qx@Q)@l5gaPzD%US?z zu8$u{7D-v{l7`; z_&RomkFjz_e0_*|wS&u`6Dt{ZIy@9vfh?$gLlxULm41Ro#7RML8BSI>eS}4*8~PXo z`KsP}{AmBaDi*!bQ~eU%=0#(?34!ir5g@4PtcZdggYF-UUMlE8oE>Ea9P8?8_4#@Y z_0}y(+?lO-23=VVmBOYQ-c9R-lxC$Vlb41XvfU-?e^zs*M`t>rg4&_tH>?Evx$Mch z*^yO{;^$@i$X_bE4L-)cruY6>cc`pwZSvoKy$>VPeG)Gb$Oj`H9jHaIszicz%+o+pz~^diw1VjxWn)odfJc(q+=rph%hm}i5JeMd)e1FUn3x> z8bylwjui@%f3I3^ce>qI-PMg3-F9cY)8+QH4HFhiDLFLS*jfK{BLX%zI^C_!orCS} z=FZywB4EFzRrkl6pzW>Q{Ikb@3Rj>*Ca**Rd_2A~_sICzeiH@9+@8CfHhx*jDRh zo3&iIi~$21Se|N=40e`F-vBA{-E1A5N9YN|Gh$RsCl>ZnPzq6{AlnN%!qam(rRUrb z=;UI~B(s#*zWzD9>%$0JM?fx!>M+}NWnN!W(`4649 zDi{X!tECA!5f;9tcmuvL+QUPpzgodT%h{>VT*!Ufnkb&nf;KCr!yTttVrY77RG&!h z9Huq}pJ?}ES(ZyJJW8r}6~|Lp%qbSvz>ypJE>|0yFV~-XNl)#NU&M6?#X2#`24c2h z;Ri0%M2c&5K$hi)G~*zR>>6vWp!kerX0$W=`Xyr5(Md}!J`Hyx!wiW$g{&{r8~ImU*(jwaI&j=sn>J6 zRf)TzxW0mKbx`}SSE}bLn_Cq8f#2KFN=nGf%~(9}PW7B7?e6Q{t%Ggqaq_QvE?a8`AyYusl>HSfxFLlYpdfmC3vTW>H>y-=&dh3n%9Q^3w&|+i=YD4s zAFR)Kv9h)D=BLz*DN+Fi);A+DqRC<%Q(7ktG{eCB7PYsg^4T@pu5Y#te&CBJ8=hTh zi+I}aad9aMAHS63W?a1}i$Z%04g`90eT{Nlo0cHFR`}X2vW?ePq-kZXv-x_Zv%Al? zZSEFds$Z*3yBgQjB4gA~Yd;a(Y|H^@yaiiK%ID0?yEHvD#}t7`LwS$@@aER>C}+KG z0esX1=#igPKa%=AjT(5@|HZ!O+C$Sj7eKN;b|zK=J?xlBnobDcJ$+;p&2N@PPwV)l z+KkSMMwo-tvopdsj1){1s$eyVC#oYEDpQUI2HWT^GhGG}LM3R>S>fWG&ZAQBGHpy@ z$+^|x5sJIn_EN{hr_z(SsIH}Rb~ZYj`_{F2&};aomEoP9%Wsr6MXj1o+&k zw&FEu1-{HszAaV91@H1LT$%h-)CJq!|EasZvV#P_y|L4&wl~{r1vrpz`(UfH+1=aU zT_cHRbLRz5h=XeFh7w+2_;&A47o+>zx=pYa5$fNU^qvDOVj05iz_MK~P03i07|b(- z+icqvqbPdsxV!=DLAC9LU_A@%PPMbq`EhsuRUu^Sf?uxm)pBU$FRC31V~N!37pr;~ z#&!lY)?>#({fhDiMN|TqVOHD^gz=!=>_9<62}r-`RFpK=%Cn;bAompv&smDyJudWF z=Vox2I2dey?(ip-zZFv~x)C3@U(yN><-4J z@S39=o@_ub5@-T|araAwz8Hn~n>%f~AQDOcGg=#8lpQ%6(;eA!=!f45^da=w*?3Xk zJ*RNWRUCe2caJ9*TvnpWs;*k-i}yFU2s$Y*gy-O081+sAobWbe*$^n@wkm0=T(edx zBL)it+g*}-^Qdit0MUI^QaC`=tx$JW3>@=HdU&Aq#YpS!(6qXT=I;(gMJS2q=+ZhG z4F>f;v0)YrnVK-h5LY zwSxf3do*92YHk*sIgKCE7y|2gQD&I7nLo2IVaAQ`ER#qUQT{!v|CbK; z@}u|PEcjXf@9D0={W3$zngi&xLT_eUd1>Kk0)D63@2)=I-07<1!1@NOm|~8wp*L$` z2bcVLnFc-8yUR`D2OFOa}N~=wcmg&(bQrPbgZ|wDQbEX$44^zIe*VgXbUX&gLU+7NR z#D)D?mIYH?JSKfUf1-5yZSxEZx?n48QRjRey|zDdo}tTco+ZQGFv;c|gI*SxHLMB+ z1R7n-=!Ud#c3JJmECgYyv@{ir3amr4HxyFt1qGzAiz%ERvIjF`O#VOQl2SEid3fmae zNiozCNGInuegtLtaLn75lbe2dppSToD7@e5%;XO*Bcj5xSGR5E5O{f z;}JC@Zi777-|S@Vs?z&@6-4^B>c5jOKD?-4lDVkSM*!ei<9Ms1OF*`}g?RF2OdVZT-98Q3-AS zJ;B!P)Fte22X(u%)?M9w8E39=6p*D~^Gvq5;8qf|Hi+JsVyt}0bX%WAV*)g9lbPzP zlH0fU7r>_RG;D7>7xpyVu;ki`weE|xmBu73LL>+s;ZwH2!D$#gn?E--o|;=|J9lnd zNTbCPVTwAD)}+$2ar8alNmk4YS+-&)B`%Vt|^Y%&|rsiC< zpF3~F=$SQQO zP_Y~jC_3goOSxZS9Ixh18}zHGM(~nL(x9f>=0VeFz5uYn2m=H)ikfLz6Ww;ZMdM)5 zgxlG2g>`r0qHjyY#fLG6kfC+5i#0Yet%)rJeSX?Tk9g6rSQ$$&@qYgMBr)6T7xX_k zN8cQcQJ4ZNo&s^x7`_(47;O+=1M#(q^)TSM0NXD%b~2x+tG4@!pw!D}u+MR{7eN&y7ZiyuNj2&0ubB^V6ZlB9zrc$GUN)%#*lRWvrpyio>0dxSE?c zBby-RaVD%#R%B!N`?RUfUfGoe7OztAE%MlY z`E8d=>Zlct#jK2Gh>2ODkO@;rG1M{F)kAc76WY|f?dSI&A_qa)Ow^47d#DRWnB3G3 zm+uf_=s~zYV&g@7J;tpNmz194SI4>*z@(=J1N@zNfDBMP4eJ5^vT3?J!e3^;M@@AV z%M}WV{8)&;Qmolm04`cNJ(zvu^HK-er|8joncY1sFtIu?N7CVVOiB-UNM@es#cGAu zhWaj4HH!bL*C86ogV5wFG^ZXRS$u?U{~%0F>XSt@5mjv=*7`64Fg|#ek^)KbQ_O-A zad1H9D>D%037P4O93|^v?|cAdJpJ$)pv>lCj;}C{&jsa1n|U8}D@ckty0ox|?JYuWSWOF&jGca8f`%dg@e#bu2{b1j zCN;0o>|EvoxH!VjE}*mRN00B1o)}Mcd~#cv6xz`Mh2xyi=eU6GYnTNwPT+If&zf_L z?6oP1MO)IoUBm~)Eb+oNI5wX@VJWSYh?fOL^mbwI5HP6Q{^m6+UaQrHT`TV&N^@SrXl(cAh%}Z*f!)MStK3OVf`Qk{Lsz@&M-Wd)&tn1yQLuR$8TFwqc;3fCc7#DC=-^^>0E67xjo+LI6y z3?A#rukS9D+bM@GdyJ|6>X+(&sy0QM`wEAC(FIj{cN7Z%yGuT)Je(%tSGyjfL%NBD z#Q6bDA>Ee9U)`pQi5cEJ*eI&-({w0l*^ZDESuH6fqW8em1hX?LDk>sp3IRa&JnR|e zh|qrKggjk(@Z|LUFA8STb$_m=ffy#pX{pplS-mlI=~FNmWE`S2E-yle_~Gfvp`z=< zz;U8PTrmQhX+~8V;n}08u6Fi)`YSk|)+Y~?R4bY|W=36;tgNZM5v z@6F<@m@SIuV{Z?OC4i}uox+>j*~lB)FLjdqZoe1p4rC2U3AG{s3&C{zc2nBs&idy5 z#+n+T)_6RT-_wY$>1Y)DX?FGcb|(Rf4?=Xr>~pi`Og(N-_h*7J=pjtd;qu&xMH2u) zaw{`W)@Pn<&OB+)JbAq{cVtH3O)}P$liJv9PYuQTHsQ`$aQmM8eD0vdYxfBQRrg&v zW$BCh`LF)ge-9O;BKp#Wkmj(HF^|X?N%G{M_Wn%yBJ?WpY^0(e>fZGQid^KdTkG9b zP=X8eeth;&KE%l-))tJD$8X;PeKeX7Xb)!O!;G}RikW_8%$Gkec zynXAzXS6*o+Y+P!BXwuY(BjFmmT%hq+snx_uFH7%OBH^56o2D}jbEz1?jWO*U746w z^#>?<_2t|8cT24&egCt2`L@eV=&Cesbk5r7;jhLa6hc<@hi7lEe7|~vzu&jR|2ojSl`yTSN_ngH6&B z+r^w7*Py9M$&{#D;Jeuv^KNT;yzaoM0EFK9r@JCd;i_OXM>PnB=Tr zB6q4%Ku?+}nn1nXM$4w_>-T2zoq$Z`asOGQKr?VrB!W zZ`aed;Q8Ll&1b+YC3!gObi30tuP3!cKYuuNikp#~?>>yUs*jN)kV@t6bV6Z_G*q?JzBOX0pQh!E18BJ1$fzaWE_#j zBwRo?_q(E%WO`Xk@VTVBRj8`3hodVM==`&r;nStgVI0Jta0c4$L<`0j4yBfFL-v>; zOR{%f^Ewl|IZYzCqf7D@oQb5MMeH(HzsjxwbhFT>!HML&WD_pQ&qe+!c)#h*BFa-i zoJ805>kk)JCSB$6Et&V+A{ zX*HY{HZFD<4v5EdD!Jp`P}%xHi>k~dql04I5aRDtoVk(Gv?gbF52-QvI|*I+nMt-& zk0>(|T46$$q!YFiMOsm?RLGDffaAo3NTJ<+cWe9cBWf|~<{zLp`(;Vn0NwCDf9y;n zq-2pWTP&Z@Oq20sOd`Dbt}`I_NI@vPNT}-zA;@_KLd5s^^IT9NW2&)eTrNP#d5Bgq z<(5+vE8Sn4M-Rekbk7!(54H=My63id6+M9QRiK6FZD!jv68@fhhK84qPTYE{I-TK8 zyi0jw3*lF>Ii}wz!wik)%Hxn#`I79m1_Y@c z8=BJE&E^wMxQsw1Phvi`t0XvJb+iz<%Mz<5k5oC|kC%JGu%iX&txpwY=+5e}f2YjXc`afY_~4IMM37Ix z{i05iIAwo4y1WWkzA{`&b5V7Y%rzW{o*~_gR54FYvHj|*t1)URZWdM#O6GEI`?5c`}F;6OZILK zPIJ^z{YNT{eW7I`9ix2AmcG6uYglJ+8Ldjo1`)Hs_N}n~y5q zkCUJ`GdMFsc`+RES-gZs@*e0Q26YhA{~2){fWA7nv&>IMa+`Kq`0;>CMJ}5r z8c?{4SpZvBwl3+QL5DlABczdyC<(!f57>H7sUfL zLNj^vPlqy=lK_Q^;(n#pi+k1h;;bvid2!Tr?l8txR|J^TU^M!`=ct(3rR6qC5Xtq_ zf`snM5$Iv}6ek*Fr2zOam*xw`fIJ9u!`Gqj@MY$a^4U!Lv4CyW_Yt}>%UlXoqr-cH zAsNF1jSB%#AR6QK#SIG`Dee{r$HO8Ws$DqRa+Fvv>=P8Vw%KdG=`Dv+KuGPp7QvHgcp| zb#;B#drEfWDu$c$6`%DN^~QNW{azoO|B6|4oo~BSVf_&y1xKQW9q7OCDB4xI*xGHd zXq;ec8T(J)-vq;GV_4Kr!uVB%^}5IzGSc5TWAs885OK4}aI&%pzfe~R2LkEV+pC>M zck~3TMJnzvIU8Hvj<{EFLeLutMXE$>@q_)v0;ql1a0;4@F2=YH&4MHWj>~_jiZo}O zNy}<|#*a~&(EQ<=4b!Nxqhs1_2BzwrRnHHc`ahLRB@2u=g?kZ-X|fCyu~2+%q*_|; z5<^r2SOP-yiv{}Snu5EzTXj^s8<3sZTxzkK0OL>soc%Cqi+@81Uh0eCDwfH@Frzx{ znP3(RlILl<23syVn*t3&OHiPYaWLzoVQw!)r7rQK?KWDYv@tS-(Mb}1vAWr5=Mk)h ztY6v>oxdri!nQRENnw_`cjjM+E(rwR6K5e#ReVow?-3#Fb})b%pK5d)S2C!@p%HnI zYAh1@#s`m5yRF{%s@1`yGRD%XYdluQC-qBeA7Gf> zBFqE3((ilY6N)DC>mQFPF>$&KarwiYSizyy8T8Jca(V0daQv?RJywD7$sg^1TgP~j zp`XkBliXYy)}8Im?Tx$?50@X@S@XqibLMb!6wqTz<;KX?h%!PT?L)luvF+)gt_ z*KBQIYLQ~~wEiB^;!gF&#>rSn-?Oyv0cUh@N=W&l=XS9Ny>@!n=g@kbKDh^Z^I{P) z5AvVG0npF6?fs(3FD+~HMTB?)C00a=668=PrQ%bypnv-DujKg;kFV~Noqwv78@;|C zd+AhhGYrGlOHa^qj!YQk_xIe$Z1FP4G+&6-)g9tPZ36Z7pifbS@j2g6uj;TvV27u7 zsykn-Z*8^o*rnJzclI_~NW+>|9tf^M{YPS8luO!wcY$4RSbH%!!o5y}X#*8l!=#~q zZO@GupH8lR_YkZ=Qer+X$&P3u*b)*2M|eNX>iW@H2REB8nSN z%_T!}m+nn1P$e!vuel(CyghE2z|AIn{HuBPS%g>I40nQzO*Q=Ci8Lz;``lT#Tzd{q zSTDr#JK!Ou8-iJj?Wj-m-2-jQJQQuU>WEB^H7fdh=Q)Cn5QMQgEs0bJdF*`A_vih`l3WEOx(ocyclz)#grHfNh9Nelgdz zl|ev>xlI9tJCHpUba)37>}y4U$C|JTOp0@%HQ_TH!A8_vT~P>>Q8rlzzxw(sgo+dB zHQm0czqYxtokS*{M9?YmSWH{)yH#%bx0oP{y^uBUTkxHGCAjSvP!S<=exHi>p>VH%@kIB9fx6bEnd?uP5(5 z{^h(6EgD>XU7xsWN=PkgtzM_u$}aFdK}dO?d_ia=jY@w}SJ(Mv9D;1LerxKP!*!1q z8F|iDEP_(w!Proh#V>`P&27D zwWTp)Y#y-Kkw!E?QqCK(~f_1jysNQ`th$&kMyS4Swt}`>S;Od;wtJ9KSu~V z2MRD^H37Q-S#$)ArMK!M#(l%h<%j>`>l0r!XK{odQUq3qY%H)E#m2a}eAm0?h>LT_ zIdfzCsmy^Wh`t(XO(sz~2E6236AVa!Ogik5!xR(d<`oyU%EbWZj|nCmUy7kMzUXN1 zr_=pt^L1g_1>=WX7yRyb{XUhJL?I)&@=>4H;{Vgcqi zO9t0l0Zpwx4OdE_)*;f3_!*gMnCyWe$jp^#$;`qZcdD^h`AsppJq*&MFJi>R3?r=W zycY$eqJ8ny&XqLPek(5^(ps9Y%rhrfv2)oo2(`X@-_+Nf<^C`(gCT&HvvtU+8Z~!0 zkW-`b!d5>Tji<6YHIBsmc2k`LQZ0H~Alm4RXxg{^bkc0w;5LUR@e4TAM~D8$6PVxV z2#q?-6nlVZK=J3P>{|IPzNhpTW*ybepmW?HsTL>7Zo^61o8%93P2!s6CehiM(e&~7 za7JcWIy-Tyw%DR8B|$LfpKA=`Kq;L{X%$pW6ttPsre)iZK6Oru=3e@Ag@RLajVjO? z%0J{XuRRPavJy&l5+vdzUFBzKM8!k68aGv!94wPqpS(O!rjv#x-PllVz(A2z|I?U+ zB|p!7+S0MCm*An1XL621cYV4uOQlDM)0J?=M5SKE4+?lwPS(Ga_$?6sg9~q|b?Du_ z?lo4?Pa!-{gVU4j?6_yKtCj`bR(ep4N#po(WYzQO-~x^8wrn%5d3(g?ToPZzpGIT6 zjRhQ?o+lJfv??QpOFTp3&k1fwb4(4nyQiuLi0lgAlObU80a`bb5I? zKJ#HlUE}kb53CJ5yZ{Z1<^#1k8GZaK!LQtU(nD;r#T>so z#ahJQI*H%1{N!d4i2uGWR*p7QJV}cQcYHS*o*lm>fF*rKi33Io{>Rfg)YpjQ6XS>L zZGrzY#EOf}%uV8E70yY;m4mBQ{d)xkwj%jQ9ao+avzNm4hpJxPqd+O+Pb$*wx9xxU z-;e*#dEdmJ0s%>qDz{7D{an{xe1%?NriCm{HB_3Knw3?(@n(beK?x1CB;sX0*w6no z7+G-|T*}1(Ne7<_M^*jm)NTQkoP`RDlWttqTbq39ek^5%eW{pOlPNLnon6XM>Bl~w zy8C*+s#R92{&z|b0)#gd=@K*#zGcbA#ORp%K-|*l=};q=@6Tr5QK_p!`I06ZzBQkN z^fBw;KJpmuDZ_d#D31tL@I#PkVP2mOK~H~D@ty_ibFi~n)vq`B82)Etud09CSb4?& z?suyCXTR5@$dVV9qqRSWK+&$>B z4=pZL@WO*f(+?g`KX@|z;M??IBK&2M4u^uM%*XGZ#NUMKk4dTV=lUzZ+sQ9>i(g{{ zyG=6r+ytVZz6zVqsXZBA+K*spi`GN%|8PV)E+GY83deO%H3bhbXIQVezyg+-Ce}`* z=(O@E3c|V3!1{*gGacS3H|Vs{_IPHl`0Qk~8j+fbG9Y;4-Wk!wcKXqXYYd1gF*KNd zXYx4jgFyxp#7rae<)Bl4{2Q#vDM@31=6k(D53@7k;t9|}67G)t_*aOK2r1zOlGgCE z__uqa{xfA;wh&(jw*28C6SO&>f4EYDy}&Eb(@>%w`#ViucbM8sS(ZE(7Ba<}ocHzk zxJPv=PFnyG8b_z=c+xw1C+!R)xmv>oE>1rFpV1-9DjTYPBERXCbQ~;<#BVc)=X-i& z*PQB4|6Vhy*mE-#^ZD8xUUyrUtijRn#7<+tY%0H~?PL*<>xW!S$VEqv#QsBMx<`T+ zFfB*0CetimH6%+B#D!P&( z8^+9=%-^T`1e1(k7*$c-^0>8me-}?rn1@S#Cn|^KpNXb1_%Gsw(4-^~1RIpGK`LVR z-9F%GAghMIpp=!FI_U5;J6L6U#E-`LwU@pR~1}BcKX%t;d z-i*A-Av5wx1$;G=!MUlCq`S*#;C}$skks{?ygwz5Mgdwfi^+yaDMI!0le4}A7L&`u z8Q>BU-b84_u~}Y_I7J|}ueQ_u!(hl@`Q0{ykf)GewV3`+m5{srs-)I4s}ch1pd`MN zj1!$Z4Gls&Y~JO#7;0!iYeeLs6WOWZSz+7@3JLEXgIK}N4H#2f3ZrhlvAgO|8o&y z#@ro{!D*?z`r9w{#!LUn!|>~#MSjXVIOf#>@&a&Wn`^oM@QW|<$oaQq$p$?vLI!=r z1udT+ABh^;oQmG~X#5hLJN5HmGRq?~vpDohgt_I`KRV{$xVKG_Aoa^&Rc9e;JnX~@ z*#c;|_)o4^eRzix?F;Z+w=eYhT^?6&79{TAHjQ2R=@h<(uoI_&Ujen|<6jZI^)Hhm z^A_Ey{>SeRjz65jUyM~q{QW~k2CTT)q1+GTZuhwxdr<%U<(B6=*}{7~3Z0g? zBy%-;HEU2vwjrF@+CIgwhG>mU$uhP9pr?rscb*7<1dravnt=wPt^E6vro9t1|cY1{cso^!a2D zoQv!%wwq$nW;(fE$n-h0l)!9-wo3sSi|LmwZEy+#At@YE z)lo)T(Xwzn*e}#;)H+DQ$#{8c@FN6htSghN3*?z0q`jsPsl>(Eb7y->%$JfeuN2QT z82wPox@NvZG(~IBEK&-m0M>;SIZ+FhIcefCLcG(gNuNkJ7-~FSd~rONxI$oohru$; z2RYYT1Sv^1I!6LCgMDexb13$w-hMOZBaa}Qb`343$9_)ZcM(kD5k4jQ+N9oeHg?)8 z-Iexsx4pT&x3&5FrviU|P_Q>-x4~njsj`{FXx$a1n&t!MDWmcU+ z{Q@N$L{@GGl*21|NtQ-RWSm=Q%PkLI>&UKEVjR??Rv5me;fa#6<9W=C{ip>JKQ-rx zvO-{Cvf9`*8~Zuk7@BI4mh9d1t}kXBlhmu&H6hB}F4yp3d39_u#yf&#+zUvW)PpvQ zb>IU5Zxh8Tuq}T*N1T`J8}>uoycjLeo8K+H{}SNmkWi#<*8AgMC`v9f6M`E#>mUDO zR4Pd?lA^Pukt~i1It3*{`PF-gjwc(WE{KZ}YK$^~ijJl8l3)e{Xr<5VyyHr+YH959 z`agIi1D?lXU|XL5hHs+GUmgb?OW(vs{5Onb!1GuPJZGdYH;di*GVRXzliH56BRhvDFL%2Tb3hB}GGrac+j=t$B=3ej~3?Ws=x}861kF z=wwDIZ*~qy4yFnbZaE9nKR=a-5Mx(%xwZR9}g5g9|nav_0p9d|s_MI~;IZ98~(2{M@po>8)*V`Ze zB1w(?6PwUXD841xUs5;I1O3EO2Iv1a^XbzAMpSX8_N_-Ee@M--|@Up@2WpR#dMZ%c2 zz{_kR`Q{ViI+i4;@gqn&B&GyO>)pjAXo;M0R^#Srfhwr!lJlo9?}sT8>eG^PBBVBE zs^AJqN(GhnL5Vkadx^uIe@C2)+x;8%5P z5$cZ)I;q^He3=GYMte=m$*1*B&qNJTANXBmgR};;G1YJ&OBLgAQdDlp>k3610EcF3 zTVM%s^-M3u9D!~26iHl4=py<90Vgk$4t>b9U6@woN)(em=+M>d58@V5Rz@QTxP zEVr*MWm5Pha-E+@5+7i2^B^jU&=b78Y=EG!q*ko!ACER$IP& z`%rZ(@=83=8iPC3O5p@3;!P`hd>qKZ3b#aDAyaaPKr=rDCZNQbW@iH!dJ<4WWTnNo zF&bN2`=KYbrRJ{p7Lw$!cb@6~xhzmm>*onC^N!&L!*u0oCXjAvLynkhD_dI+zb*GA z<=v#!lCszoTx=Zc`rU8p`YKwc97)aJXL9k@E|tggv<*p&o#=!w6-hxXK@`;GC9(-+ zs7`?-A)7NM$#-_hjn3r$Y=QZiv=7rO!2@bWX?^DolUFTGEC61v zSBd9=)1AXL*o4CorN_)T0I>+1T!=meJX_j?ti<-QZLs#0Q*r>5M2j41c0y@WK0;*c z=5X>6FpB<%eY`HI8{i@0|LREtUP=4o-O4#aSOya58O&Bfj6T%tl|y7}p9M`I2~JI~NOWUp5-zr`KNsKB~Q_BAyX( zuj z9Y5xX035MLa3kuA&30#F-x0*)Q>DD2_@xu2+E`=6UHfDu zx2alxy?JJp1-8OX;m<8@k#yOU;k5xPFqTiYE8j{vBW(J*y7H?jcw6l7j4_CqJ1!?>jHxbhhX*;AphocWv z9pILLg1nh~+lL+$m>M!eiM0En4ua@`J9#faGA?Vma8yD_Y55i=&v_(nq5bq(R~a~A zXLucHy3>KWw@mF6qOdLwx&F!Wx(NC!nlFn^;hwo35M5v;gp`fq;#+{|Q&;$h5tr%t zFaEOMayrA92;@dtsqR3?H!EP60-CshX$Z=FMf#AHSt7P`5;@?xXg zUfZ$TCU$l^T}8LAHzbGf#Tk~FeRc7Pazibx1|1em4KclL;Ee2!=XR8&ze=rf5g-GL zWLk|R=1E3vBNAOX}uT{igF%cVj;;r>2h6CSg1qqTDZ}*~ZQk{Yj_0 zj}_A6&67;g4?-!pBD+*cUy6VmZaHrux5SuTO z+gc^SDqtQLm$U6Mj|G=$0h(>&9%0V13}Mdf@ZI2jSM}Vw<^Cn;!IN)6T$vmzJg5md z%CY`YNsT&*3QaJR+G+B5fj}bUBQs|t0sv{mtNZO2dy!zKy(_oWIE`apZ}Pr0FhxNh zY9?`tAKyJeCAb=UZ9T_4(G%XVyB@7>pE27LJyOI&dgT1xRBF|&rQT)%kVcyYaPmOY zK;r3!EVy9e#`d5I$FQ|x>XIf~98jxyX+^a~&u?lVtKjWmhspRHvo_;;>ZGqo&P*h+ z(~EL~3)9bU+28r)TLn5eCt$lwLK`lmI1;<8$vYCTDN4kZtg*se97(%n1`Vc15kokQ#9l6byA_D!Et)YTtEQ9i z8L`jMTQ{q_2<_7%MT^>8*fR#qWFeSh5}9sGPRKq~<{fTtghi zl_eI^jLS_5>T-QxyP<6d?)zn2tc?dgPBJA087ay`iL9{nSm;5L&>p^zBf&k>C2zEl zD{B)2mJ}5GVt@Bw&v;PdmD5xUq7@-5mL(onsmjhPapX7_MYu(4Q#!)-hu1=7tYXJO zLcj~;m*hH1I{W9F67QEYOmjFz#ly(P(Q$#srzqp$ZH%?CHMeEU%wuY^*iFcG)ZexM zv0Zp>h8&aKLdR^`i7gLK$>?qGt?VNPM`|d@FITqmgBkc%-G;h zEj!QTm#}2s>h{1xH%~wX_>ln*38~X#G_qCm81mDI^7toD&Hm*YH>%l^+gulYB$u(d z(=G1woV7M6SpxDU&eLG!Y^k-;hH`{-PNzs0ExxMYu32T4&BC^QM|pK8;dv=SPL&gTA5D#O)ICYqYOwO9E72}EySchZ{h6X3@q2Wn(&Fn> z4$sa?-lAcreNgH9oZ_11AVoM<%gO=*p&ulZC}L9tYQD(8E8J&zE+D{;dE zE{dTP?E91oTAJo(u)4(^vbVk-U$b9RKDl!WE?H0!R$62FErl~E3T8TZW&9Kl9Z(uv zGU;}zne8KJU|0`MTME8yf5|6djg&u}Gk|pm8;r>%)yqsQRKz8!P&!c&l@)_mC`~m5 zPU46*SEl0^I|tp(=Lb8%*&jCEO<36)FmV2GeAUrKuEdLB%PuXk0*K;m@hITkr z@pNq6G3q3!vCjM5$KTsMLc7nO8^#@`ko#zd`+Rhs{j`~3{?3h^H^Lh}~v_JVsl%5I>MA}HdbSO-P9TNJuYHgZtR3#VsP zh4~-&p;OF^At%~dUK7KGC{eyT)9uPpSuWv)QbLYie6Nuv@I^KOS6hNn z@DnaHVP@DKRFHt83`khHAc z+HPBE5f*sM_6;l3EKn{D#G#C1AqB@|dJ?4iGyw%;s_u-gkRX%>izJ3L>}j646sb@+ zzi`H|9hR8c97f?5FsS=6^+wpsboq7-Zb(aZyBQZRysS8JkSi0 z+3YvSxQ$lC+6-83tMn_q7OoN^j9?CmrX@R?JPHl`FbU#)aDgEPf0{fx6;a_3ASj3sw+e2no*FfMB1 zNRbFl^L(O7@#eRMfX6hg?Gy-;2c!TGV(Qndh&g|ZR2U%gLz5ChNZafvgjX_1vtH7I z2`$LKE2Wb;!0?Q3?Y&&-?ss48QM&Bq=8Kn8@IT#YYxhU%6DwJ{Xbi`I{N*x5&Zykh zfE2+w(R;^C*cXQcBSnP z^8*ZAJXt5_OgN|m+9FT*2%|_Vu+};Lm;!n0E1ibNuZS`=kt2{MtIZc^>=cmB#hJ;D zX2Y>it0=mKm@L(+hD<6a2?5otBLC*cEYBoLewl(AH8=4g$%0b@7lFn$b`)TlW)|B@ zOwPkacT4oN6WK_CZP>fgqzU+!Xpsnh?l#vn@8LKp5T_|ee_mg65K>KgdUZbG9GGc7 z*W#}->O+q$h_Tywb}EZ7>m=|lnE*)Qo!SJgd^BMetLcJ2m!dX;u=03xqi*BKQn}pn zDYQ1St0;|Z9GvY!1e&F{P8*4v&!?stLaQ&%2ntbptuVydd+=)|Me6+H-}*2-s|_Oo z6Cbt$@M8G%6x^sM7@{f>Aso4ef}%c4D;PD*c;&@GOjYWAKnj4rv%+M@+cuK&SA+$D zhpJBk)P0ucW$&uA2pU*oU)QlVaqj9XLN&&?v4(ZqIF%O2VbbUzFmdGHknqH%zj12kWXQLr}{2mWHW(Ismv1QV5&L zW^h6g&Vo7GEOcCla?-yhS%w21Y7PyFHoD#HZUhJB4v1#{JHf`uMQBKA=?)Qg<+sc< zg8VE{LBfzrE!McYVfeK&!#SUIqy9#Ov)MxnZ)_z{c(CjF(jNUOD%z}wzi+=YtN^YP~Qq*I{q^ub#9 z8U2FnW8;KkMHbCHZ<4;kRG*@l*PQ7Z@Jh;gBtTp zX4aDRju+ZV57z=61?w0WbOo0^Ehd-5q{}X49ax(Dgb_^llI3q|0|Y#-eK{jXn-N7e zfGAtu65?$rq)_bqQr`qLx%8DW=|>eLhh(^KN96?hujtZDC=AIZwX$%I_{Sjj=vuK5 zRA$$o&!c}az|Sf$$)elbxMoENsO4&i$Op+libX6)3k9E$>n6kGoZ89C@K_1fT-)~p z7VqN^e28QR4@a?u(kSM<%_@j56@!^TzB3MG9N3HRJM+p@h<%%;KsjLa%6+4OLlD1pBWQL_Y7NtLU>FfHRCDKN0V)>b% zGV9~KmQ$X9Cz}n@8+B4=OsI|hF3?8nkS#gQj1(i#;68*<#u&CJE{=#7IBJ)9dfEMbj&*BM)Mthg(^q-2V{4wNj3+&6c!FTS~nuz3O8Y=zQX60GLq8~QK) zn9qmR9Mt>ombD~e))Y4jCX*TaW7N`Y0qz5*h*qR(PgSnrH|2zk2}J^x-qVj}w!g)WH9J;j>KHNkz$ZwlLa!YRPctLRY6Y_Vp1hh@-A`bJmDuAkV& zQGsN*SObwU3K|jRE{N{43v#xlA{uqERS>4jXA}wn8Uqwg}DBmpWXSci@(aJ3LuiSHX6v51GyBnh{uAJu>D24QNl^~mhhFB z18fy<3*n+i1oJI=*opPfWIY2?sS#o)bhW3*5A4@O5@0WD_6 zcVDR-)lFSI3v?2}v1C;=-sQL4!%E#?-zPjo%)Kynr7j^uj2?43G+7`-Y*6NJdwe@j zBX3|>GaoTJ;=Nqq}zTTsH~(+d?d%l-nUdWHo>ju9vk)w#(*WEnlT-m+Bm z+`t9_B)OIIB1MaM3bHMjz6ISna_2BjXK;Rjhz_&CHwxterV5;sI zv5a84>aaQVMtA>!6kuhU6v~Cp<{JyJ;_QiW@B>d_W0LjR*@es|PwSulgVS_+aoLqZ zV3alqB(mZNxx4^6avoyssK>?$XmE)RWWhq}GY}{yhYn-GV9xA zC@1ZlO%eA**ipO(*RFv=9L&-vEymOO7K17P=wNUqnS#l%_F5``ge01$*9+hT@1=;n zlLedFKR^2R+l0EV6DJlTSUgK% zsVNjsJ;0bv%wBNn7R-yDW^(y*sXs3huGy<$g45PSpDthJR1}#)r&mk`!zKKco2h2h zn0UYnih`y+VRx?rmCPGa7}V=qD5Y)&nlmjfWDXQE%&mUl-zFLduccNIBq!*uPCFG+ z)^LD2-m`_%em{&2m0r7w1?>M?X(f@NYj&v4+?*Lj>C`Q zQr~_1?c;B~wOV*&%dIvOJPW95%91o;6d7~2Yq@;qJTf{jROGSc+X4aok`l$eS%ay5 zrVnso-W;QyH9v&9*r!P_fB{iM0t%z;oa(^<4<5bIA<++aJA7wjDFyUnK~ z2w8uRD;C^sKylT9RKwro*acej#5xCe?mnX%`v(?HY|XN#t65S&v5k$5A&@&9XVDnn z-bI}yIA{}1I=QhICYg|SEc?JMs7)SHrAs{aQAxj{aI5yIsn+X&2o*#IvTbU*^VC{U zg0X<@;+28cNi9Dp-D+SJAJ~dKKf^m#!t$nkDYF3(29c3l;^EW;ynT}V!ueG~njK`s zItu=|6VFV%c8r7SA}LUuez|@{<)mN;%qDqN#Fk0-u2Lb%^@%Z(y6NF=E<>ZgoU}Xh zwZClGM-}vBRxOqkqGhBRpH>aVyupViXzRk^4ts|6| zz>~?G!T)#KB8H6gwwb!%3hhoUDM_3f->c;F3*;hGIXC~T5e%Y7OmB=Pew}`?yF&Co73GCbhdn-2x5E&>@Lm~v!CWSi+l4FzK4;rq6@|u9opE=OsTLQ5> z8&a^6TV$~8IB{IQJf(u5x2{~btv&zfn>zkIKlzYdP^g+tw>AXYiV`n{C^3G|P- zeW!B0IuD}nTh_Xu={d8W}Hi03SbA6R7l|7S3z7gWgNB>|qp4AATr^7=-K{w2s{#}3kKUdz< zr5ag47~VY~N^fQHWEOfJDhA2hL3eE8kTr_>! z+4MP*h^QotfO9K_*{vVJ6j-gUv=x*|DUg7&)#~$gwPtQ);aZM=F(Plshp9GA{k^JV zTWt5>`O)Es>-wcuWcQu(h~PG?5@4q zez9LyR$`DR`7E#P9i%_(mujuE)m=GwvClO*ZvV8hRd;(6Gn?Kk_`z7#$9qNv)M@=W zI7d0qRsk9kGQoXtwSCc=LSK zdM}r9S~&XNT6gO5sGEry>#KkQO3gQE!FfyQ} zqkD0+I8Ww62tv!`aPSUILY|!GT%+4^`ZfDWD}Dz#l06r7m2#h3wW0-2pPC}OWTBf- zxv^ZyvcT4Ie{eWCR`kpu-D`}{*l6#8Qo$XQLCbeB!K#B=4dq0;hg|09loSUYXUe`d z0}|AG-avhAdemmZ7%D|HGmc7v=3yE!lnCfS9g?B%u~^uX=2+J~yV(gom{pHhSBFqB zPEAPKg$X;3O|9Zh0G6wb&6n#>%bLpCPHqxMN&r*z2Xwn_&Ug1qMLuEmftI;sG}=~$ z_jY8o!ZF-YhQOtB~(%;RZYo}*`Wa-OHWv~U-!HCH)64qd3rs`F-=P&jP? zu+I)hf`wauvU%VdMQPRrU6Lveq0@+xZzbF{NB8xzH5H9XOxXGF!ntprDb6I2U~3!B zSmkfhi9=(v0AtUK`Xvb7a3XDm+rv!Vg^ar^2L+MX7ppKoQ8C^9-lc}JE49pHt2--P@75`AC3BOWtRtxv@p?!7mW-{bpRqZ%w3OE40td6mu-@ow?pIs8FE-I$ zx|GHYXLtvroDrz8Dm10qN_VO)w|O`5Xoie#7NyBqi=*N3grY*q35qMZy|KN!|5JB+ zWe4SEdt;{~;2h3JbUC&)a8%8)6&B1O)c-KqSDn^J_kQEOvE+ti8Roe<| zj57GnM(4-f{a1z3v4ae;vQ^o7G5i92gVm1O(>{>!|F8j4Glu7o0|BJ*|HbRzf|nBO8eX* zb9Z#1gB>8XiC?{ota%z2S@#{vGWXXLnQTL=1FgI*w`U~5^W-R2$KL zNe1O*?=1ziIoc|)dRGRb2lX?k%{{uT&gp{CGVIOi@Q@Ce)@(Qr9zn(X-zX!}eWKM8V zq8n8d!(_7_hCC&u$n>H_qf+K#P4pG12erPD8fW`~sOmbm@2*DE=1|#bWUet53VJY5PA_D3Oj>jNW*eVXS~%^+gVXCbO`3i;&3WE5 z!`j}kF|6;L&!gY==T9^A`VEt0tQ+Upm?F}Z6nB#rjB<~;w%TjCVj=944sLgzSNo~l zmXOzC@Wa`ZP$(+__nRZW@B>7H*dSe$mdbC;bO2ekA`-GB#x@j1P#!u`5QBtRYU~D6m%2?^rWe5T$VvCT=7GV1242z|4)qc5wPoVh6lYMbUeuy)+oi(;u z8r1F0Gs=HPJ{c`&=tAh=fl;=-B0~mP@ua)<3JpOL+wnw&VT_=;l!ukd1OpS```ikH zB%vNJR)cN2<&HWm-^*WP*VntPO*dP&vM6Mae~gbW&X2hdvwu$vk-C`P3+uAKHxVTa zv-j_z&!ttJm3h4WUC`7*lYft3|7+6gmtaHqU%Ru`UEO`@Gd{+?{q}-rI-VH6_SwgT z7X#_d_uBQ{nbtmw#sp~HCiz^;k(;;oZvam7Ch*XDF7PH`pRI&kebtM#l{~1G;tPUK zc)tZoHv98r@x;`;F|pWs?!>l`iQ@;iPz%ma98Y?ZS2eq>J)j|>&TqsnjzKMIQ^fW= ztJ8ZF%uqxgEuOS`H6}gPY3|$+=%*G&BEDp=x#*zgjWJ^DxxmYotvM}ryDMQ;Lins* z9A%5P+YN6N`WBxQ$YnQ7MI5NVzPjjNe67W%U&bjlnjW{&He!w9*&@QE)4Q7&#s|s= z+g^3IIBwd~Fb!f$<6({jU>AQQDxMm75;cZ1ImRrY&!A`kx;9djHg9e81F{~HP)|(L9 zFE(~E3#cpU6!L@2tMS#A{d!?Wg_-wR< zv{hHOcN)z(2Ur#`X~$|FtL^o|V=vSDNh{vttgx6^=fM0{d}SjVPc!K;Ypx*Ex>~%Q z1>S{B*)Eo@?)BNYdpQ}uv$ojRVs5=@RwU3^g$y$%Vew{%l@UPPE}CL%vdkOdx;*Iqj!!ocMxqg& z(-kiYCs7d3tZ)_Y974_@$?8^68eQfIY6*%P#+XWJEREt@3hcv}<25u#j4z2)&PPL; z3Ng9Zcdby2f;B-YYJfQj6tti%cdrPxo9iJ3CnR&Zi7u{{5Mk_vXu=LRqu8|RRjkw?4$yx2 zZI^phsWU7-)`)J&UN^9T!Bam^C3kmORk|6&EMnlN9f{rc^ZO55*>I?29&AL(qgQGN za&~!OPQCGhlWeEM$}cVT;|r?YqC118gpkB%Sq?5BG#(;12zD$3?@I(K%kruy@uFX6 zvsS{KnY3F&?txNtBa3GKBGL8WLYaNy->v4=GRN+)#K?ri_Dwq3N?NH_T~|7!S{Ly~ zE=%YG<%{E(;oYJt6s6GOzv{KcwL$Ui_$v8I{!#gorA!f7q@Eai$5`Y!axyH7++x9E zIG$P3Oi1<~&4FfE7Qwl%(Yh^!A+s(jn7nMWbGreWPfd=)IGfLf^ofuAG`K@4I9e-` zV$kI*4|;ZuRzh`v((~gkie>YMMtupk;nBDdANy_|xTTog(sp7Rjj*7wtBpA2(1o?U z9@_Qb7>=Dq6r(hE)AFY_@2|(14hc0|!1A^URzi z6qqOd0koGIeM;Cv16GNk5R*^N$i8*{w1Op|b>{JdEiU8farXujPH%>nV?z8ML1K?C zzkAZ0NoqvpBnoHG>s|u>?9R6sJCt!!Qs>*D)t2*FfG@C4#W45{O13v)zH%*}UftAX z?o5wPiINjKD#oM)pOvN;8-XZuI#6=!t9OI`(dCn~b1I=uWzu561-85=OiV zbI)}8d@j^DWZa9X?!WQVJ?2t((Q-;`&gGZRok-|nUt^JxMD6JwZBIGVDUM$}7~KRQ z1j_o*a~l>dM001B%vfr9f=JlDAg)e#ZfiSn(OhvP&l>K?#z^UUx{U=F+-2y|9F>kG zG9Xb1h;vPX0Ro9E=;Eu$d0Isu_#QL!Hl&J34F`lo#3pH(9&Y|v5;_>o6yeCcdgs_< zERF>M3>l>O;I_$4Qxxwe$e0y-OpL_Qm{lfv7gE&beO@ux{+lkER>_I=m3(YKAeRJ+ z4s9jN+QgyRQA-JyLg|15U7m#N?wSY<^Y>lfgZ4@m99!lY?EmzANm4!gl;b8{7MMr) z;!X$TtGJMEd_3+%pwkS}55-UPCK9h)1Rd?J(0Z!yGwG%&=UV$IlZR5x&6r&Eh#>!S44!#l zN|#x4rTm3xyr@V>Jfn&Z+c~Zdd*>%{l%F|cPnRA%IpyXrgf6bOWz|d&!FHf911dsL z%3EttILmK@0Q?xy!%Tfw4^L0X3{#?yIfCOy#wdvX9VoM8b$$4N)a&B=`^Z`StBi0X97g zF*kExnVEF2Z1Gq;dul;hih<9JB#MRfV@n0xv80M zY_?}dW=m$qn6pj3p7F(^@zZ;W1Xd>0Z*6p%W@@+p8s7UKp{ibi_7_yWvm6mNJfo{6 z&=_$__8w)EnCzjXBLOvczz@=ms6wDPP`9$wTkG9bP^-JM`{T2R!IOM(iB(O3KlSn3 zx7DEn%F#oi)Hw{?IRPqiG@zJ;!%UpD-B5+39^{`$ulltdiYBfetQ&u}(bL!tMwVw3- z&+g^hE>X$4Y{Dq6wb8?0jfrUmM^%4#_SV7~71{_vh8C*50#Uf$F!DFn`qUE9?o=?3 zP`IsOi=r+WmENj}(c|-XLMS6-rr2VjAvMy3DS=^$7@pr&;s5=C3V=X`VbpoMEUlX>zr`)H(7Ck26yaex#s=gT zn`b!v_Dr~p9@x5|> zl$w^lho*|jQ)D4i(_Brnkc=JORFUro#Yr-Wj;I+e;=AJZuLRsG@k{}q)7}Q0fh}B^ zp1`76Yt2{o*4nKl>SjcRw)tU2liNedUmA8I43Z%fU#Af^_Wt$pLlPMl&*4p*pr1ho zATzXuO(@#EVLpg|VoabGmf|T&OGVMIkF!dZW1$wgXN5D1AN|G@(7U^kTyz8 zGk1V~XeDLF)f7}q>@Oj_qQKKePYkXnx9k_TT)Ny6ySh?Yj5 zGMWD) zaGj-8IEy55$}BcW^$1Vw^1=i4S4-osEW7IjjljZ(W}u&8ug9B1RT!+HREA-qwv!?V zA;QVjEN>@IjvC^+iG=rQ-CmW1Z9e9po|wSpb|)`nVQY-l#6IwOU_r^))LhyEa*{fo zb9>G*X6dU5DeIg<7$~XI*tZUKS-cO06~U)w?pn`lb}BDQY<8_6)$+ZD1*txZr!`GA z3D72@CFo3UhrmHBUE~s7+W8P`)J#3~IZW(|0ddC6VBI$(Dr+)U4n@9;W%&%%ra!5z zOu)b0i(_Z^YLW~I(j_9QqN2M}P=X1`6ZuT0==6>W)7b198S82p-d=TCwd3>d;5`^5 zwcBhHVWRF+x)lJ9t*WlF(D44o^_YdE%J=bkW^?S1O_(_U0B<``)?D;cESI9~AqW&2X5Z`onVoH<(V%q3x3=2Ua@cpi0ut0g|FQ@QM zH9UViQZnV_?C#+`Q;&X4t(d20X~?V~3vqoo8G)+qbCX>~-?rb~+J5|q zy12T54%kJnAnI$i=f23F+I*eXEv^+}ShEEQ{Yc32Uf>YRVEpKam z6?p-n50YN7)|)dP@4@i$5m+lVl`}6Z8Gd&*j3QuzB8b^A-xMn)bz;`M@?5|NBzclk z+5i$_mYDhH!{Fnk}OTka^c`ZQ3DR+&21YF(1g$l?Y6F=m`5**MBC-6 z$etxluTcKc-RwMD{Sa4N{lUQIBa=iBZXV^`V#AS?2i=Am6{fhLetPn&UD4c8#G$+1soyhgETLqT?pnchF(Ql8Q7fyh)wI{~jcAW|Dt>|;cPcBqKbX~ijWdWWijGX8CR=hU=9cw6 zV^~u;6-(nv!a~cY)VSb7a6!Rqd`{f^C67tWT_*@YAJ8LgCR!;|W4$5BTQS=q{zD!m z;#h1HyzH31jZ)doAAdZ$ypk6&g+Z9$qU10g8`WCE;RW-tbyDqXtcH51c$ZOy1>I8S znLjn@U>nb{-ZD#`UOkhCywTunc={&{=~2sPf;Je^#~sW)CLGDiKp7}rB`OZ(Sa0vb zDG|}IA$bT7mL%5FWf?7u7B-+GA+R0<;#khE@Lto8(ISyxRtX8rv8FaSJn40u-^kRN zH-<{M#Y$b`S;CiKCIS_t^mH3_)SOykYOam7WJ#q)wz)eezJ_Evmgbtj|Z3Vq^5O=T$wIr3`}&{ zxTG<1Fd+Betyd;$Fp;bmic=IO@8^-3&RlNsZhJ@DAg03__@TldFqN(%z1S zm%_+$&BN(WS31ChUC}U24rQL>Ov7dLfoAHBD~yU3OL^9g@`xRj1M{rze7?qs^*I?Jh+-u}i5EmIF) z7L=1ze#L#dtJNg=0r7rPu!O}3ULd$1g`~uZ_q<=e=gXzHU&5E9-W$OIi1o%(1;eeNC zEz0HEhVpqsU<%YyN9#V4@OjLCh0s@KdyrLm zgb%P#5y%an?R%e{~%w>D5l6(oz>8S%VdJJ zO%D=2*zi^geynK*%aL0L(XqX?~F6fmoGB1ySw8w@@rq81a=RW=og_E5{B8O^+i*=-w zM*3c?W6@Py!emZk4Kdnf92&!?GXS%ap70>JIXn~ghgZST@LAXgc8EtJS+GCc6z&Lf;jVB1 zTm=>H1D>{u*0%QWE`9V zC&Fgf6mPALCNP#D1Cbns$SPX`Rm(c=}dr1x7eHGQ2KQURQ#*F`wdWf{+M_F z0!khmHd}lHVRy_^q5PG=Zg8cyKMpG13*jVq2UNL#@Z4~DB(e$So>1ZXL*;Wk3}6vd zIroB+=dn=fuY$eco!mI(_K8F`fLT!S4~5FdD9;_d{Uo>^_IciZChUcIF5D7UdHVyQ(mxC; zy-U3LHqY0f;{Va}SE%&Y+tjVavum4-!N~^gGzUfw=aXLx8DyCq3-~TnxF29|*n59#&l92QcOg`IE1>dwEL6VEfy(ctQ2DC$k5KV+JHYydesF8d6QJx%pyXNZ&HF;da|~2_JsC>=7ee{F84iNaz~S%*Z$Icj ztG8UJ{1-#TUk%ltt$@AYMKBlM1C_sa2N`>Lj)e+e2*<+;sPdfa?Qen#_c$B?KZM)D z&IemQhd`BY3LFJ@f%1PWoC+_63imNoxJ?eR`WXsUuBlMvt%m*JzOWBGAFBVk2abdP zgs5<&@1c;9D4P$Af;(c~8)n0Y zpz7%xI2QIf+T_0w4#Ipq913rNMeswYe2qQE<|F%f-VaA(-|<-HEO0WM1aE-K&sR`- z-}5*t-xyejc{!X5KZ26e$m31Uao8X8YB&Tw1gF8Tp!8$p36aRjP9Js-}&d={JnKY)tA-x*fk6QRtHz-&17OzW@9q4eWWxE;I{ zj)#xK!En8^to+$<1m@kK;y=#wNvQVP`E27vI1}?SD1X;OrS~;defK%X>S;DqeN;k~ z<2&&+4R zdd#0f>E$lxTlr6b%GV80dbkFv93xj-yKjIwm@o3?x1q|_^#arL9H{(N!m02gxD)&U zDqmwSwDuW?lQEwJ<^LHt4{m&s>Fcgg^?xbs3)euUyUE3tzuB-i<^!Sh^E}uGJ_RMu z&*4DW=MrllvtWR^7OGsw!!hthI2(4n)bhIkDnBQ~S@0RC`rG0%OE(`X{{5izq{*o#J^`kDnL#}!cdx)#d)8CU>+g8kv_E6lzYsyt`GE#WOt;hu$C!>^#icfQi< zYX>+DbFJs!;2g|fdQP~?+UX%s>D&be!uO%%-sx(qm)URz=Ch&7^$wIibiKyrO|ziN zUjbF0C&OI$Jd_-}|IOmx70TZMa00vrO1_`K?cg@onp~#AEX)m1ay}gnfiFPi?^oCh z4*0u;&x6}yUg6EB!=9L*fWzSXa1iWzoyC&_$6<~^)ypcV@;n1oU+Z6Q?O+Pr74zvZ z4}J~hZ_EuQpFN@ScR5u2A3>F`%Z)bfO@c+37r_8t2B*PC;WF6qCd+>_RJ*+rsvbUu z+rZ8@TmA;YLd;9xTzD0n1;2-Tz^S*;HsNYm4F3a_ulcuHeH{bGV!jJj!Eay`F1d{{ zQ1);p9CEwme=j%y^Z9TTd>E>HKf=+l-yIh3BB=5n38f!5L&@nUI1Wy^)8yR@70+s@ z`gpk;qb54hO^g;P!A0 zlsvb%*X$?3@t7-N4m=;KoUePfyU)T6f|Ic?fkWZRus6KNyT1i{VD5OomA?;Edh_76 za3xf@GokeMA*k|y1^dD69x%>?l3yIk{~1vA`k?2=51P3IO8%?hH24sl0XKNa;++d6 zul=F=lN+GQx5k?XJZ$Og4y6aj!r}0KsQmp4j)c7*F+D7VJ7YcuDt{k9mA~twCdc70 z3-c~e;>h10bBqdhcjXC=ZzIm^1BME93MmJLGKr=yk&3*=Cffod(+17z}c8@fpcNx z4f9t372m0FF?__jt?Pr@+lI*THV^AlMb22Ic=UI2pbQ zRS!MiHv1)TEaqdO%6mWD0e%Lzg8kpIeqst7h*z^kFkxzW4U?-#)dm{-Fo z@O3x}ZuOp}Qvi!F9}JbB7vON%^?jSaggb;a^D4ez-M54_z~O~{sV3azl9xPmk-VVmQe0P;83^&R6Z)8;%R}(=kah;csHB~ zpN8FGr;p6O58MdzaH#O(q1+2Rqp&CD-&ktw>?yP^P%z;gX_UMD1B*!itjMbGd!<=1F^pYDxV*~ z07m{{`RWU$ANf$>OJRSwm*?r8cRrh zxF3}NGvUVY8rTKi4kfS0;3n`BsPNxH>E(uBn%?XHRnBrKyHM|zpTnTa+XAIW=fSSe-vipxW`?Q299zO3n{JwWqJVxzDd=E`W+}AE@%33FZF|@BR;{dfVbRlkWsL0`oE` zIjw^7{|r?8KSQOzeWabsS0R-C)kBr%5GZ}Q8Y&V`==x5vI3ZV69? zO6M9Fz}LO~Pp}W>?(Hp|F;M2&a9danm7gP^^!zHQa=r#t4?n{#V3+mUx&C4Rlz9SF zx;sJX`<_t#4}e?4lc36fHI$s+fvV3A9W4FrVMok!p~|@sZUtAs8So^}m!ag*YkiA< zE|hsGoC=SF>Q|nED%abvC;Sy|4ts3S>18xFhC~a0j?ARC+f;>D|*%<@(XH>xS)I z|1lUU{;A$v1XUlEQ0?##sC2II_IG-|1{L3TP;%+Ak)|hwl`EcZuI8Q;7*tabT;|4K(+hJ;WW4gO8Eo`j2j&By>hmETXL?Pi&`KO8EZGojMC0;;{<=lL#_9DajK;iw+g z9#4d-zbl~nhgUq;>uGvE97^81dR9Pi1vs_U}XGKeDCi@W7_x1r?MZ5ylCnNZ`~{@#2eRJ-^L%3rVE z*00WoOEA~NY48b{12^8*^nDhTo-Tv);pI^E@jWbrS$!;?W;g}&=}`H4392484NSgU zL$%KW&jeIIc{Y^X?}TcHZ$RngMt$44`Q0pTYvzy}#)}6iUyQ z!vG!zSHer7+H;WA&W)pkp!(TepzIIuJOXZj`2?tTdpcD9u7{HIM^JJaJHXN}fdS?N zpvtux&V_fwjbW#O)(*FT0p^iV@>>94=tsZuRTVdWCs(hzH^>?e_Ch$gYz8@;y*P;Bk&o;Sl z167XE-kk5b8oC)sfl%#sCe*mrj57qxHhoj)ta2R|CPKI4Z z+4x)lr7!zJ$?*nQ)h-fw7pmW!J;uWA1=XHcLzVXdsQ%<-I1~N?75|K}7A^su+@bon z8=>UA**Med@lf@+5K2$>g3^Oyq0(6eRp0kOjr$)$wTF#%uz0heo{zNm6 zfy)1}Q02J{mcR#~>;EQMJxzqtj}j<-tA;Ay!BFkvGN}4|0}hA(hSIP8lT9w;pyHni z)&G@w9_M*0RC*sk$$f((q+KSRm0XRhh{M5y^n9aK9w8!8{qLWTPjDxD5_Cf8n2?mIx) z7eVE#3QBMH^X`{G$>DA&`Mm|@|68c`v+;BbHvy_&Erjw{0i}og!Y=SO&qqC9fs)t9 zQ2xJz>My&@u>6jI(ucWF_DiAa?Eo0S^P%#8FI0WJ2Gvf#hpPWh`BpDIq2kH)EQTsy z3`)+&LCO6BZ+;G{oqq&1&)ayW#oH6A-3^9HcOKL@Rq4$upyYfaR6Se;75^(x`CkJS zev?_okx=Dc=*_jBC&7)ezX_@zyC1F(zl9sZpI`^L-fSB$HiDfn4}-Fw0OfxQlzz;B z<6zvoulBqIN}gAGKJM-R>CIny^QLobKGhv+9GeLh|2(Mliai&5`=xL_?907<6;wWI zpxV_*-u_0Y^lyXG=hwXX8_#Y#TKuCu$3vw*87lo5-hM|YITw2Oa;SLs^yZ_X(m%=D z-wai6FMEFC`GaT2x#qq#ls;__r3X`>+T(1`MNo3D@T~XT8>$@~2Ic>3sC-`zC%|i= z!hH&J;lJT{IIh6_*F(u;KPbIE1CE9_dGn`GdbZ&_8+ZCa^^JgDeQtnC=VYjO&WDQkQmAxp zf{O1kDE)gMY8>9G(Cl}Himw4mUWY*S2WP^G@N%f~e+Z|+_C;3i=}_|7-LnO%-#Qse zj+aBVtM{P7{|M!Oi=C{UkAxcMqfq%g8cLq$!IAJbDF18VRJi^E3zrWSt{E!d=XvvW zQ1QGDrQct`0kCVa^*`fbKIU?GFuVdTheJ!+MfQdlLFIGXg*FaPf@3fr19yP;Le2Yr zfa=!=FS7on6iTm;ftpAC9nOYd!g+A~&el&J4o6|W3@(PRL&Yq(O^*RRTU|a@Ozn4Pwrys%zu=^5QpU#InV!j&g1i$y3 zvzy819C$eP@4=m6^->#O?uA*HKZmnmx82)CPKHZh9DV_(!NsNKeij^p`8_DPZM=uA zQzk>De-yj{z6hmfM@B9E2VoxOPG#*Pi{Lz{^e%==;Aft*%gubTXQZNCSqiI~AUT`9rAsIjo%!Y#g`xt$_Pr zz6MI(gZFF~Nx&*7{eJ@vhTWIhI5!1K9+j{Vo&;5Y??LH%j~X-2f^#wN2((VK&XDvTL+SIWQ2PC(H@9oB_0$B<{h`Y7 z095=xd-H_7EZs)Wn_&&^|A7^-s}TPcpwn|W4foHW`jPDYtvxJ<%J*$B8*Xrb$!iQ$J`zy!IuGs#--W8* z-4C?`ylIg=RoO21yuW61(lz7JO>_Z?WNxHeki&2IKHk}>8V)|();%XfjbHac#s348 zzDzs9%6|Y*K7xtKbaG zm&0E0b1344ybwCcTn+deV)yW=0eG-97+!7!h!HPsPupI_G8aCxy7N)7 zC^>XlZTdbFsyzEa>Dw#boOOZK%K=dKcY1cZ(Cim`o(82a&qK+r`$Zc>vN#;{|Qt-yxmon z&lafu;RbJh9ZtjC<7%6)EP@(uE`aKP{sqR>dMs2w{3+Z7cK@5rNBcq5|2QZ) z?h2LfR2dw+zi!k zuYvvG*xRi>7DJV9HLQbQK=rdr@33-Q1ErroL*=vhPHQh$K&8LlT{e$h1l9lC3wMOQ z?`{{_6IMg%&kIoc*XJJVFRP*2`D0M+vBSN_NpK6yO|Tn07H$StL$#ypp!)ys;LdRR zebzsm0~OzsQ1!dv{Z=2d;5L{KgX$+Pgz9%5hniRY44dK52TTqZLg~p@Q0WvuXz8wo z>Tf=Rd2p+TOfI`Y>E#X3^*`_k%wr$6b>dx6di^ro7=GyawYUEjs-128h>d$=q4IwY z>3tWtHRj$>@sEe{KNBjQ#ZdYbgOcM(P;$KlD!+F@`Csob(}Nzc zC+4M4_DygjcsT41Pk=q(#h$l&J_{wskD>C>^KqMJ^@o!%FMz|~2~hp`-BA7Imr&`9 ze8SrKbSU{&LFw~3unT+%N`L&>AVYgUe}pwgQP zRlc2|TQ@-I-FZ-Y{}7bF7d$_Litl@?CD$FG%D*d=zdfPC9|Sjmr@+qe zY^e5pDO5RcfRf`2Q0adNRj-}jFn=?k+WSsW@y4L~zkR*=EU5DR9V)(up!$)IygBlw znFA<)6XBMy2+DsPN>7jS?)N~I??tHo<)2XTwSUX>qc>DMg;4!L1(g0?09D=(J->r0 z_eO6UH-(aOPdEJ?nqsQ2D$FD*cb4+bP!9qCZ zL({iIq1xGXP~qQ)9pP3VS^l?!DsLW?oK`^T|54t23zWPb^L!SL!u*PN@AR?Be;cUw zGavSZdqT`5Y)ccoM2#|IEAh`iHsi1l9fz zh9lwSQ2qJqQ03|Vsl_)3D!v1t{Qn&)A1_1Y^9QK<-}Im6F9%BBmqDd}GSv8Xy|;fG zD!%pCSb4`mrN02GA3xOFUjdcQLs02_0+s%+Q2zRVX7i>wQ2j*$DxJ%q>fr?_`F#W> zzYd=pw}H~jF;MP1L$$-@Fn~ux^=nr_jh7!l=}WgSOfJQ+6XqkK>hTn){5%Zj!!@2c zU)p;6D5!Lvh05oba5miTD{HScQ2p9rQ0?)0D7ifaH-ewTDEtm;-n#f}i|=%(`nm~9 zZ@%>Qo&RO#A)Yf~fO{E~-W&o|uFIhE^$L{SzJroWzi%ub`EYa0d%#^`0xp72duILH z#-V+o#)IeKEZFl~>)&^WJ7Yczj)PxA>Fc2HOb)w4nNNll@KLCCn*F`af8($S^9@k? z*x?6j=M$jX*S=7CbR|?gZ$Rl$*B@%BclgEnfgNC9%(<{TEca}Is+Z%S`llXq4fTCsC>T!rRP057>l9gb`n&-`>5yhQ0?$dsB}Mpn(zDy zC7(^!H*-JO0rNr;0nw~c>V@UFt6CCz3U&IgbU@rV|%xr*~{}2I0O5oo!UpFFBd}fLmxqn zd%ZiGc~>|M^T|;C$O};IZ<~$Hya!Y{uYd~wCR9Ci-^9`z2Nz(z8mhng4XXd1-=)24 zzbm2I$9+)s)@Rf9Zr)l1)z4i4^WoEQ8tlHA)x$!leC`3&znts&6jVF-1uC7bx|&|j zfGY1wxGB6Fs^5DWsz3e$O7GimZtMY7PlKTJwiIeS*dI#&E{2lpqcDKmcC&P*LglLo zZU(P|D#!g$a`^-Xuw(c3ZXPlO7GiFJYCn&{#qbv>Jy_Jk;;Dh^C-#HK!^@!bV_Z*@ z`xL11Er+td!}9^C`M?uU>y783>hUwE_C9tCllyg0_4hvP2e;nR%#&dy=4L2;e-kPn zYv4rKW2^RVyxR$CJ{X5e=U{KY%A0S5YIjdV$^BC(d3W5}%DD|xzDL1Qm;={?XG8U~ z=Rx&{&qCGfHoe-rdHpP?@%Lb;_)dk2=Q5~zy%tK24|wxyo}WYcZ?}!HJB(u<2vz=* zp!D)asQ5SUZSA~2RDDi>lH=~sjc-un=PTa)E|i{awynu6fXdHsI2KNalJ`oe@$fnr zz_+0KgI}TiP3dFlH9_h1S+Fy_2};iQLFMlaC_VigN?scW=6?!Q|FNs*3aI>_>dm)7 zwXc_90JrID@lA%3Pa#yk%RHAu$@6Hacvr(5co$p%e}F}BZa=H1RWJ|pBd`i~+OB=% zK-dUJ!*8I9#)gWyeY7JM5@UIVh)M{?orQ1kB9P;z<=sy;Ry(BAbE zi=omz3o4#BVLLdHKWCs=l4V=hk+@&d0hjiS*-}8RGq5Y;MinB{u7W!Hb zcrf90B@B_}*jJ(ESK{|=%o-o2;`Rz0iTQe-cf)NP?iVrN zjQtkeH}b4#i@EdC^N9I1%$s?;e8TD4h`Tpoo^U4nvyUR+8i2j7)4lnASmmG3A)Y;m zW1f#^Q}5S8ATJ)Ou)EH?KMfDyeu4WgZ}$LkFqLz2%L@EI!}DX@$9wnne4O)eV+e?x z!2J<+dvQPL%c1$Eu8x?e+aup;AtxWlb%Ys-+l?^1p2mG+AD*e9yQX0GckYL|mwAsp z@pB*Uld)^zevjt{s6P2Z?o)kOdH;-inom>aTkxmrX7~X14|=~EFU}&~#n>-}Ol{q@ zDSl4FoFg}EF2Y@NqEmf5XX3A(=lR_2c)kvQCx&66=KIr$<5Qj=#qBeg>+_ROm|J*0 z6uT$k9NZ(=?SOeZ?+2TVs~z^|d$-4N*`DX8@IRAV*L1?`+6XSjPU9on1d$DRz75WW z1HIn>KaX-(lkUsju9D|l@wW%zw!%$UspkV`jP&*97w~&5;hx98uCY9C$a7!ppT=AO z!%OqI{cvZh99iuBvt1Gi()^4j-VWTKKWMR0p= z&CMrae$U0i`E2|g>-~4)xjpf=lYh9GxA$Hn)3JXZ!@Z#eyoWHluE6iRJilbd$OPHr zKfI3M;SKCACEgNmuldw5nDel|1G{~^{b9s46#Gwn`j6tT1Ll2kzZHIn{crG0%$ft~ zIupAk_87SV`v#@Ybsqk7?T#H=gpm_@Zs2)e>_6f8WS(^$2v@=x@L#x{M|^v5zsh|G z;d*(0^81dD^Dds(mj&0chDZx;f5-oJgwr+A5IGxjDbHu&R*Ih&;kn$pb|dc3z5hLU z{?glD=+pcHw=UjpxKEquVB~%54)IKA-*Mm0UB<0zAbvi;e+RfF{#Gj;?qRs^hg~Ih zzjE)&^P$|jKHz>F_nR=^joVfDk8U#6w`G$(k|1?OSJRb$?eH`O?J{`LP;yudy zTa4Qf?q$UH8}6fczQE^iFYJ!-VNb(uDdzRO`8oXVi`_o(X6~PG8;H5tyKn8|_>^=G z#a-6|{OsoKWezawT7>&P-hLc*dt$fBhpEN>2;!XN{m#JcGM+c_{-f|A?whg8#@{tO z|H?g?=R*`Z*ONRS0LNgjYfH~72(!?vB9G%|4dzR5JBsHUc)pi=GWlr4yd3+>czzbU ze{&y)`F`&1*p=hH6t03-V)ra}CHEcpyAk_)NaG($hv&PnJKU!!48cye?ND&%r%$>zNj&Bj(4ruO+St-hOlVBX-T+ycN&7w)Ao7 zxdgW+Z$E|SV{z*y2d=5a^`JdQdhuM%t!qd8T#et!+?SY@ThHrJ`#9b3cMiM?_wag) zhaY|Tv4lSZw+in0q4{fS3c0)OFk1$KL2-og9n03Y%G#SB>sEi??0qdhx;jM>79k! z8<^+fp5?*9y|hnQ+d7!x2?D@ z=N^RpA>1QyE5L0b_t)58i1}aG>v|n_##}?(7vSE&^K;nU%X4?0H|DuNZp+PkWB|{- zdENrIi+OH@*Za7h!u*YYmiH^T3yDY96W+cj&nFS)HvCrNb{XaydA^eSskE?9`EUyR zJ@;0)uaDgf?pyIUAG;gU{Mar85zd!PCg&+q$qWqks7Km4snT%)-k!Mq#HgKRZNF6P#CGTa$HLD=@( z{e2u`vD=vEk8pp{`@O)Ye z@&6lcFX8ufJY?~_DbGLhd=hSNb6v_Jw=jU=b4L>um z*A?J)4`Dk)T`fE};ios|Rd6t7T}Sdf3%iAwKlNeFCG~f6+;+iFDfdD6xyn18LfD}^ z&+_5+hQ-)T#qL7pcH3 z8+Tn#626G%>&+P1fcRhI`4=DWc*5?4``y^@hJ6EfF3%+ z|6IxQYySCs{1xMWHM|Rc0sH&BU4&UzQCeRAZdQ@w@plw=A?5_`8~ONt#O@lx{S42< z?ppW{I34Qh%Y7C8{{v6Q-$A%d;ck{A*B9J%n6LF|%kD+lV|RI4K4kwKejegJ8T-4q zi%4UC{LSV0R(assl>2P#ALs7q^C0_w^87AgAHje6_0KfJNonbQ?fuyap2xkn(!}itZe6$IXFm3C!Lx|(R5%d(!>~J>dqbX= zLtUTarYlAqx@s}k*yCD%hx#yY!ykzEE5dA!udOlf%zZO=55n(+-FV!}dHx$r_%y-@ zPv&7b;g9hamw5O6JohFZU90gkPxssmA9lPteb#3kAG?V?^9)Ck|UxQm$o|}m4 zc<(>m-`hUEx4heI{ONicZj0SZKJI4E4{__ty#Tj5!ajk&&oPho;aYg!mpc!)xDV48 zF5xc2Pb1;3#{C_i9*>cuc>dVuL*^`=PlGRbyHU9B$n#R{YG5DYdLFwlisOj)MC@YR zSK?<^9Cqo{TkgXi%yW44=V1x8c09k1{T#T0a1Y}C z4CWKK`(oY;e<$MB1i$3&%JUrj{2jLqF#iXJ*WY;f-kWEJmT)ufe-O@H9rIfn>KmJa z+=`0ESRxUWM9XSoLC21fbva~>7+=%UDbjI%v^EwL)yM0aVvT8`3L7ipb)t;US~GfneZ!OiSovHLsNZY;A)HNi8cjI)v+Ma6h*nCrrhLl1j<3k`Sk(S zR}pQB2EGFO25rSwSKky=#H5=Q!w6PHWN}sZlB|lQKJH+0u#bv4Y*fq8buidZVH@kK z8l$zopprmwQ?z_pkcjUc3o6NZr7ullSP7%YrL)WG%FDnF-=E(uw;>~)o1E=L%Mj&}x_Dhx5N{&gX4;MFp-f_;)mq+tRCPhj`mZL}Z^i3q zS*m*~#8ouH`5m8@IH^?B#}Y1)N({8}dX$G)yl(tXivQ>A$4!oZBKzq+|Epvd`8K;C zR*6vR%3}#>VQ5FoqjT2rMs>O2xS*y(zaLCjote(k27^IP&Vz&b&FWg|2dLVX z=7vOI4Rncbw8PU!0N?YIbVEaVSv@sd?b<%6TE`g#4dpqi!4czWtFjx?Tvr{ftEh=p z3<=6>D_mD2`((Q|&qH0ttS6FlWlgjyA>+`seKu5Nw+d}ZRn^p&QEa*^jR(VqFd`_b znt0u^Xcg*PR}pKmC>vu9HPP}|ExkV0iMq@zw~nB7ky2*Gt+d9{e=4a4X_395&&hU$=ZNKTh+VIm@-`qsbTZ<}d#Hi*#1<6X#6g8sq zJgCVHds(BY3Uzon!I$$l>tZpzSWzwl3 zGGXk^bZ^5kQ67&YTveJ29M*6dvlfOS?-CZ*MOYSZs*N^;R>2^;q`D?WJ=j!M!$WHY za{)JE=L0`X3bnVFDnP0Y_HDx?%v}=lGt;C zni#q#B~R0Lxx_1y5zx4$Wz>g7Nb%!MD_zxP<^Ttz(4c8uSYTI_SYsnYR3gT>Pe9@| z1+)w#^CY7bKQm63Ev)Pcqm5upb1~~NElF$As2Cd5MC+=WX?Rw^+UTD3js7uSXOAv> zzU0zlA4Pp*ZDlORU_mnR3dYZ-@@gKrl9`X!szv+Og|)Q;7a~lywQ{%74OoXkq+!Lh z;isXozC2dZ%t+L#TlhV{e-Nd52@{2tAk2TNchH=nk;w~FUu$!|@@wlWn$b#MQIbcP z^)#2YZNn*FnoAf(Qm|n}=?-oCPq$4D9!#Pul3i^>lvx7aOk?ZI_Efj%BTfsQS^A;D z@+h-_U)70+nH#`GqOkuV(j=$?H)ZG&F^yx9mo6;uPEmcL<%yh>QZ zwbBm_(B+iQ_yDELqZ#sHv`P+8OcS++)kG(ZS0&cML32Nzs;e3ro2YAPw@pAannf!b zv2#{ryMZ~KyrlfNNnTA|Qp(9bC#@g0DM~!5foEAVhe@B-`AP!Z5?4H?wKJWy>y=wM z4E0)PxvptwNR(NolG(PF>y~?AQJuuAnyN$1+N**!RYu7&EtL9REDO_OCW=f8`Du*p z)f{hRjak`PPrI``C8}#;EvT-S5_J`8tSxV93DU%dpM(>(Ns_5hbz{7?s+_q# znban?%VEJ>0Oo;?}MY*%`l~g2{UO3PF(O+iT42vvRn|xB~H6*Q>uKA8nmi-aGm|)LDGk!?t_0KE64B)u4#l&Hjmpr7<;%Br_KVpKiP^$bTJ416>?*vPw;_^} z>No@Tx<$5d{+vj#D4$~RC%-5X?3|xFm%j^2BEgbzW3p-gEN7e9HA^hTCNF=yFtaF^ zZn&N`EyEgzMn7-uJazx-Lh<^i?JFd=Pk*NQ>?n!iomN!U45Y1 zWs)L)b@g=(@p5}=3Pz98%8EE-QO|CI597Ur)#ldR4KXHabuJRO@5;`d_NilRA~w56 z#gVA5Y+6B!3uYFXQ3dv8VatpF&f4wBCW30U=x9*NsLIwyi=4a?26KvY&6sd9TPup? zBS!@6M+D1F=?qM?8=D)H;;iBldcpFB=0tOuU-;Ulx$IwekO3;0=*#_ODEvdC z*TKyBf4FNCPDC{&a5FBaymjo!wNjj{nr6-BEEXgcPq@tpHsYAREH}wfsTE~a_Kc{* z>@;YpE?dIy)f}z(6B0;yYf}P@>#@e=G)zsbZ0}5~XT+3~G3S<>UkW5=DAKt4N)^zB z)uwXb)kK?FHm4tr#@MDaF}V4Ca>FvnFU;F9T!y=b=n9r>+6|TLbxMz%%9l4eg%498 z+DM?cSRFfd%wvG5OHR9}PTuRJ8-rkB-3kV*U=B^1Oj-Ow-0Gk*r*Xmqbv;xEauX zX|ff;l0C9=2WrBQmABN59?dknHk`a_CfbZdqfRPZn%5jOb~&q+nmD7{u(C$ivC~Wk z2Nm&3`iz9FR-(L{U76q|jGQ`=goV=-!M$8@6Poa~nj2p5l;`?GEk?K|J4{&gUMRd%f#~LM&6sSo}rXAv8rhK zN>rt)bY2lFzgV5#hn8yg7;R!T%Udlg1+tcOwQIcsE#TFXd(*=HjmxI5!T^myvDvZY zbzM_)Sy09HdV}kXBnm&?vd^Q}EOf5)D1IPN^mVZotzgJn@$8b);$7yIU5n6r4cNAqjc)3di^6Dg^?-U4au+M>6d8MAIh z7F9)MC$uEAP0qEWaxx8~Rnq#VU=MQPD~!GHKk}{GsPP3@hhNwDlF=9EPcNO9zhG8= zrjDc+EmgUiTzhZD9i)kJQ=Lf?W?MNo4~PrZ;CCkwR|!HViQ`!YeIp(ftM z8?7o;A+I_WkF~;79M)*lV_8r-Zv5O*GG1DcPY;#mRSKX@AR!Vs_W{!rYX(~sGy{9dTRx4PAGzv z?AHY4oT$*UA~BKThVQssKb&35T#`w4O}38jAiw4Y&OESwtST>Wm1;S2Xap2PJiZ0d z{G{=c6z!}cyIvKZ(S0Qq#|LH}&O2e(21#oz_42-mj8{K@ZzqO}60 zjwaX<5pteXNvA!FOY-Lz=a%Lc&nqpSGq0#%&dgoX6l9_{CK7HC%NQM*kJINc2W~B~ zyle# zw3#_U0|KGzVSsWn3Tw*ccP;Nsy6S6|yP0o>$7H?w4!@1+)xL5va9Z7j16i9Pmos{X zvkO_!o& z^~+-}iUgsPlYxxgHrFxPj@vL+2X!Ur!Jyov?TGr$mv>8lR0d*}idSvvp|N<9A6d zC&|tyLp%SBYO~ql7dkAD$U&Nl5nRe)6HGU!%NW!rYT+K2R2s;MfPx>f-*qi?m6bMr$xEoL2Dj!WXNN0J^|lTl_XBo(g97?`C0ZY{!+MrTO> zPo;2;hi!QYy_~rbBg7wM*@ws+`LkFy`E^RGl}BbZXNvHTqRJd8GGoeU$C=TFIayb5 z?Ys<4Ti;0))^6GVx3-oO^i8liRMlWDCMg}CCzV`tjA7IvyKT)HMKl8fenFHI%&;lU zp3Su=Xj!ajMJ!gQcM*Co5VJ*&+NWRWOib?@ZR(or9Nlmhc9*_e)VyDbhRZPtL6dE^ z7f`okQ>h5bRt7VQ3)}Ras2ivQ(Qe1Udth(ZFEZ-byuXyI9_C)DF0Z140;q-^@XJp`_fJ zF(;^GQ-1?;|*78TFVP3u0%itAnpWIH0+qel%JHhPpxukGLk|6Op`I0EK5sr7A4 zF-2QYkT#M_?S!BmX)ViT>UaH@Q4+c<4%t`n`GtB!mrOV`r$v??O>)-d#I&$Dzt~P3 zx-FRGA%(qB1=c6Fqta&ZGE^cJg+3PXFC6}aZ=3e7)1!Ok)23@`)kiBpX~J3d^umSn zORT_uDV&pcn<0G9fxe_o=2HveoM0MuE7(IJ{ZYM2PV+)cP8x7$igo!j^!zC|=S^XSO6B0Y8=*EoX4sX)l zI?vq3^6Iz_s^~mh7)z^7VT;H7a~#5sUa(iJ{e|RAt}I@a&5Ab8{6W2~b(VQ(l&c?` zC1{q#3j{leAJYph4V^i`^xT4ikz>tg^5X;7*294*?yhbIP!+3-G3g^w_ZGoNl#IgUVsG-@?mObv$P96;k zva+g{j2b;|hovl>>zLvBH3<2z?bYIvlF|kFv*r|+k-s565KDz9uS&(|pL%On26cSq`4vt_L%d0Z)q$FMB#0bV)8heM5dfAr~D6l&?>`r=xCo|O; zDP`CT@1Ys*x_Tp~Zfd`-z$I)K*{)Bh3=~^KSW!voj9upE&SPC1PC5OQP_Dz0gQ;~A z$+-Od$aSy`hSWW|N|TTqI$Z)Q8aeZkR6+K+OtK~Q_3UZYCHKR17=f>^rc6%Cexcj1 za%&uY&g&vi1lfv|y$A+JO2El2ts_aEH-_Q6#T?EJxLrR9w(X#npvN^FS&P!Ei*wLTJ49t!G%O|6z1cp73aW)WWn=v0+Kv5g{d!R-Clh!cXzm z>EXX_p2^H;_N&vV`b33&3SLiA;lAt4T;}EkJBP0{=jctmW(A>?+?)D2^El^QT0DI| zulwee&Mzz})xqBx(umNX7ez86+lS06Sd6FCI}KA~X6f2QOzpI5^=1QgGQ4KyuC@6s zFgIV|%#eGT8f!Eqj5qOq-F^D!>MI%8H+pr-yggGVN81XQ7~$CjiNd`o4~wAWTs({C zO)o8(J|c6O%XkwCF;QN}shv>oTrSsIdd{4otuMXjU)RdB?Qm&JR*S-_%H``1L;P-1 z+S{TJUb(%%P8|F&CC1*GfhpCGgrlBev^wNeaB;;qXu+~Zs|JMH5fmQaW?5XzjkCcT!jkd z`hcWXDaFtQ_0hQ`G8V6nwUlaWqSU)Ni8{ab#?_rYu!$t6Hd3zc3@S0$*Q7S;c)hnx zIa6+JNvsTf>(seJdIOTJ;%mgb1;w+9l1@q4Tf|P+q%vqow7Df?Ys1futv8ACod6SP zHc?h`fTY$`-d6JrO1#j<&E>jPD3(h^>Xu7whSaNcozHb%+KM2rVR%HxD9Pmx* z31@oLO~vanE&ohN8=A_cRo0PercKSa-P|kcwJ_9p8&q>MlKZt%A%`z`3mC6tx)y4$ z(~TuGhw+?w)CU?JS;D(j898;-sicd`|b+|1#BQka8JKO(qE5yB`WIsWt&Reo` z$LpOXpYPRLXF!8Y)`)b0*W1xbX2$;aNnBn2ehk`xP9DhO*B+#o?pwkp=9lb;R>f?( z>0{vokdY(V&t+qm4+7J|rYGeamtJ%+sg;^WQwK>%%Ol3X*tOlgfjeR3^~+;%dRHm<}3YlV){IA zSWsx)1NEo{+b~Y*ssg;x2lmGpd>XE;(wrSt|I~JUgZJtWVmZl5AKD&_!rghD44k!~ zaAA=f3|9I$Z2wCgo;y{j?#iSeN=u7GH%xIz*_0!UaP11rh|?cA@}n9gKn#yMHrj%E21l{>Xk25BANIzn}MPC(WBh4q>mNZqFPP1rn(d4&fv_HNNqyN_-+|({uMrahMfm3bS^A{ErWb5E} z_$i0eBgHKr?)$5>`c0p~yUwQ7(Ky~8S}LtPX1qrUTeJER=bPO$_v9n-qDRBTbm6x6m(-I4V4=I?W!Ayp@fcx|n9LzZ5cSgY|n zSr|p&PNik^%;9g-D8=7f1Mte7<)GG>{w#!q??!lX?qf{N9UIF3iz&t*1WFxPSP_fz z>pB_J6Q)dM%v@Jy&T2IpXIHXF)u9D{3W{zrhgFxKDZ061nqw$LJBI8IjMH6&iG?eX z8XLsY`u4QS=F!!+HZPS*cp}9Kkn?Ejs`){!^xZi>jcPkSZFkO^zp!-9%!TvmR@Yj( zWSlri4zPbUuDE+?Z4+Yma{G7l^j8bG_CY??N=oi)wU|_8|F6XP7pmh==hm-9|3nS9 zQB)=>QjgSTf@}1lR$H%-S&KfzO7{8xY^VjLqsNac<&{R^%$dpVh{h7`DxNbZbL8m zN``SsAF23Ro$uDuYB-!$yRJz;airfg@O$mfn|rSihS$bS@|W5CCWg+W5yqCqp-0x& zHMP+oYdcQsM=SQ^{2Ds}+VaQ3WjN`P{c=AawGEl@U7D60;SAMxePI~oLhm0~SknqJ z7GB}jzn}3Zs!KJk;Fl-)Q9wkI5d)g7x8i&_RBjt7p>LK(86MqlF1ZsB74bwlAF5H7 z3=ag@BP-8_?>~;Dk?*wi$>X}C&?{X3ax)RQswVGkzd%acrPbuuzr824J|RZntp;Y_ z!Fq|S((9V_xslt>)qaAcG>5lGX#=kH3a!V0j7f~`hIn1F`fW92WOz^1YDY3$mZis> z`~eT!L*+9Kwj0qd7iZdLbMk!+BWwD6#MP;rG1%)G2IKS{9{2IEMrAE%GTz#__idKS zf3v7%@vKkY5I9qm8VOO~V9toUGt<29TQYLgQk2!5c@Bof_03ZMv07jHIh{-Sk0V(t zj#2-EIL7?tI3}d>QCiwmlhC(yXwF|OO;LWSy;m;f+o1*d#l@w38&{AY3>rCVa4G>W zta1OV=>K}`ylT*i@+$q-i8~IbF;ipLT9t;+lGzLA<^4&&8Jjq5M5u#X`k*9vs3Pn! zd^eubm+&_x=r{0g{^?fPpyDGqZRv&mzxC2>26QR?iJ;->*W?H#t@mwM;_*@mz2V}7 zr8ePC`uV(gZ^pR?bPvyPy;n~`<$kxlW8F=*7zTL3G>)iESy{`D4LyHx}bDc5x*led(N!c zzY}3A-vxy`o99F<5tL>#05O;*HHs4@8k$z{TZ>v#xdmxBDO<~LDxTDibgb0<#zgY> zS=~6V7q_h3lILy0*Cl?ToQlUS$p2)H*3P?&Cp_s}r&Ao70od2&>3V0fT@k*!<|n9T z&q z>03t@PHu{ieF_8vWL>ouErAYOBf* zx8mCh<=Sm4|7kJV=iT%Nyr4}x!jqJkrsirydZF*O)ohngI-a!36jT_3<4W#xyVk)n z?K8tB!ZWTm?6NoS-rwkVoT7X-&)AIux*0J)tdvOTkd`XipKfpmwft$;R`L2ZhJxxe zoNGwQUfQ%PE0<|%cmiH4oEpA@OI9e~GNlfRuvbZ6>Zalg=yhhZ402))lxh}dWAcz@ zd3CIOS%SAui~z;#dbzY`CgG^ zTweHbM!il?&r7DSU{G>&cfWz_gzVo{WckqU_ZhUH3Sa8@!lYj0XU3VHax$!RPH!jt z;e`J~6wH}YKT5BkknyJp{zNAJTF{L3kX{d^Pe@v)Ha+cg$n>$YKF~M*=tuGgC-`>C z{iX=LXxJs95;L=ka#$y;A+B@_;#ftgTWzy*mmj)^lbLmI{kd_@Erw(K{wlxh!&W`N z%Up+E<+%m9Yd&pmOr@VcZF8q9-@U+~a9XargxJoPIu~Wl%n7pH&MsRCw9;&SV9O6A z)7-+On(CP<^D}79`(k~(YP+DW=dq4U$MRHE1Yz@}q-v%Mlv88oCtBlP;c*yQM=8U1 zh3@5o4VQL2Q=2RNIIR27z`YIAkvNh_zWB4RWhau`U|6iWw31K6Vx`p;>Q?M0Qdlff z3jej24s{Z`l7X4i1oiy84*f6yY3Q_}n;mGQrOlYi_$G#LpD8hmcpp#lM*|2&Z)V#V z`sByIvSS4v{w|Cq>_y?S<|@MXh{-vYc}sTSE;*$e4Q7;-mgFxkVYa3CTWvKfKZ~=_ z;&fU6S>;_UktF-fa3PbM`o{p)@EDh)R6Mq-XE<~nT!74=S8egEM9qk?{{$oE$+4lVyu4cRS$GUftIS){k&stOsedoL<04|%73 zrl|Mew&kSXesId*+{4oqQd+zxjZWvZRB?NMtwb+di6Jc~QWbgxuY7@)J_+r#WYl+7 zg_{b6uc%v3CkR5z;~rGgL?2RBf`r(hWz=^{&mdG2 zCkZDIeckT{WFno#F?-i1XoZ&Sd5TKhZ>7{(e`g=2m6VPg=Srn9!2Ozw_9*$zT0bJh zuNqm;qB#cV1K5z@sgtGGn4Ov-`;S_}KpOV&}AHtE(T(sdoz zC+j)@LkMlKQm}$TzOX?R8FF>DTnEzqFShpAKcVpbht5VYUn4zpYI2uQ_)!}acWq>{@>lJLJhRTf*RUlQg3fjWTN7)P;Ed-sFT zR?gnYcj{y;AF!pJ$Z`vU)-yT+==Z;~8*2VvZSS%j$C0G###DHU=-$mOQX;^s)GDf2 zUAU4s!mW@X#cFM?R02qVDFH}SCXynx*B+b)I1iy=4QjBLWI zDYaI2G2!8Eels_>yHCdR!OW3ej!}yg4@|&hQAj7w*5yY*xE*vr7L;P7I_H;yx*d|{ z**?D4Hj1{%mp?ZOXjX{BHjawjn$>*R!xilCI z+oJ1b8c0L(@byTseS2L&oUb;2j90MAeKE7@!6zs5Q&o2`_3Cymfu>sFuCk)2c1jL9 zq2h=)IF*_IyS_$F!FU5DVGNu@ zMLiS$lNABSkOSde0od&(=R(>c>L|q@Q&_ z1t=o9D(6-Xigr`nKRJqda zEX5#Uo8&Zio1|;DJCDnH?3n_*RS1$&^nv1D(RV4k`Uv}%(!+fD#TSphaK<;eQrv9M zz$M?c%26v=q_kSr_iQU=_$&o4(W4fKnQ@G6SVP3c#Rxi`pN4G3&B90}9z2?=_LI^% zRm$)9sENep`ww5mf7~1#@ZRoXJ5rK2j92(R(Hyv-JR0TWY=4?c9Zp=JkA@dk98Lh{ zC0x&q0}!T{)v(n{x<7C&Thxfgp_Nu3MSAD_(v0TduD0#ECZ@-@84XDtDYJr@ONcTA z4eZlFvGFw~4A8}`!rUHl@y^=K_{p7j-GWQJsiM@}jq`2(?wezkPGRa$W zlZU_VqxmBfx%hEvVafCO7)di21wm|#|V^el1J*>e0Wlv+){wNQ*t=)}*cM_;&UKF2Izm%+A{}sgU z@xn4Q)4KyQBPircetWJE@D)27c8SyuPml6JrBtroFYzZa1R&r_c!kZM4)HWxQEsqX zk>nZ!tOSbEv_Rj5^Aj11OyDnSfgpEF{suM1gth9l!zb1AM_A@fUsg;m$!Et0Qh5C8 zIDaE{jzSY_J+g!jG@k`606N!455}0SnvI1F9{)Qsftqc7) zjp!x?!KFA^13x>`3OLr4#nReJ3H8=1NxYdYe+E5S4V6Nt8@@GVLQ=C*mBC9w4bkr6^*^XO z!=o{c5JBxw@e3`%Zk6_A#q`KZNb%i*P4abNufa#(*Yw?s^@hsw#ybDMTkdj^={cg7ut=g`xJL?CjrFY;o89%T<=t7pKBiXp+pD1MEMNV#yK&9;E1_$3nA0=}dj_h) zz?G?Ip}MkyGpKM5 zN70C-lh)hchp`E|79+OBN?vEV%3MZ=;Tl+I)JY0Ei>0rD6#1^#j>aS8guy93Dkc*P zdr2q-tCErJ84bD9t8_|hyb$Q*qGj;gM@Kpy=$Cj+<=BkhffoWs(lu#b(qCD%MxRxt zoCSNoOYRZTUV)WEyjl#no`+ina^I>iYAQ zC!W$%JLC^>?L)DCG|mQMwrcJN&eTMTYk5ExWQR26AeHPHYptN}8S%_WgI36|CA)Sl z`=}IzAO6~l0g_s|QrBW6lAo7)v#G1Q_{LJm_v$y%x%ku9e6$n<>8No>^^J4A4XzPq zht5iGaF;*HC~NLy7k5&tHG5Twx1xByg1I`V-It5S+T!{K34gfn?Pw(-=Lt{0)ILZRP)W-Ei7U9qg&3f~dV39C?l?25 zRA|hMs*lK&{_}0qQ^9NgW)lTq>fWp-`#W5nuq8(FMClxfpaQV%u zZ&hWptJhsw?-=}WFCuJsbfqog$zhL&OA+|^k&~No@hndY?LIgV==GIl(s8X@fbeo= zYd6m}K3kHe#pS*Amy3JbyUcBUJDaI~7VGvju8Bo5H zda8~p0+xpKAOYajwc}B)UZij++F{ZebKXrCU?$&WNqwBECzbG zXDn$tAW>v9Y(_-Pzqlr2ZLCtT66kcHXX77jL=-#GY6D&o94)2M3 zuN*958p6$RWjkM*g0UbmsAq7u*|aA{5%k{hcmvvlV$&1BdKB7Rv9-GQ?e^|B8I!FC zetFVY%b}h>DYi(AB~q^+mh~?5?HABk#g2peiSPzRQ~;P^R@@Jm@gUu7K|w+aNPp>6 zl(fo~XGaG>ZYvm^u@u`oJm|B+%ivt%V6gqU#h+yUmQS(hMl9|;rxq5Z8Q!83j{ zIJyYmaEUK(OC8|>lc7|c`0c~NTaIohS%qFC&^Q2N?w1HX9EI=eTOFFf5=s6uS{py) z4LKXlhU_`?!(Rn@AKGlKJ}YmZkvQcdcE7c~L&=cGN|agEMGMV%ca?{rlkkFj4%UTH z?CDuu!nwCb+liwSyBNvX4><2Z(wV>b8=Bqh3jcFSNcW zY26%}R(Id*-65$6De)X#=8s1Ge)&&q*a!xJeKOh6E>tji+r#|q9uHUx&*#zZ$mW)D z^Lx|E-mvDvc(`EoceXq0ukzzogmXsLzUN%r{71>lwO1?pNAcx59M5@C0=)+i8S2c3 zXs+1VBX4|oNeIUgUWOAUu`p5~7-M-``ndb$Q)tBEP0tCRyPtE^)3IYNhC&xIXK@@IJ%bfa~bm&9MJelU!+-IpIffV}Z<=%4EgA2Ini ziRrQYUNB7@KY6NJbZJtNv1aNtwcupKh_$y6ZFQy9CPz!NHdLNR5j{Y(FCfRD*62xI4&UT)! zruTI1BA{efHx>Wrrt0`r)$x1Mg_M?iYp&>cV79>sfc6%<%iq9hI~UYL_%(U@P|5yb zt0zh$!R1fO?z5$&>2!k(N>qDATOT*pVGK+QTJa!O{%tBpX)a^d9bHf65~c6xFJlE~ z6+&k_e~HER2(~G0%g=*FCDi##g00u7bJ*bx>dxMBcWL{19J$<4K$gRjGU?)iSxJ|* zLG;QbV`V1Ix;~290I1#}GSye5s^8h20h`KA*j~34b`x$`a&5(O_u2AdZII?65}1xK zl?`yP34^lsv8i%nY@u%J*f!usvn4_m^`oRFrJjww?*LD{VzrQYEp}4uB7u7&vACMj z*3$Goaf^_GovX8LuhgJ1=B$3}xM8EG)TGux(~2Z-MSq0B z)?mAvKFbX$meo+qs|U=zQ+{?aJRE+e1*CC~UZGxN6t(&}3gImgu_vAB?R=@42i`t* zH|zik^}|t;i;17ZNEx=VSs`LM9*}g*ZI&{>L_c1QojS-@jY`}l=Y&Bu>sFnn-h2VL z1|tj*)F^62%j)R1-OVZog(kP1Emv4~CoY;>A}-#I8H5b2lU}U0iD^x2A!zg0P2`AY zHI0>B3C7;He@`51J@x=}GTm$D{y|UvLBsbfczN@4&vasJyfCO;Hc>c`*K)vgmPd^uYyA|(GE^n)YKZd2o6Id z-Xw4a(g3?IQR7NAK>w2-4zzkL%tq{AjI*h-(@XfHY|)$uaP0rnSwEHr$4TjTyiW49-Ug|Yg;~78o~1V)|obgvANDqhZc=cB_=x7 zjSEGd#J$RW4eeDN-h{-|Tz?ta7%}%VVTB6UXfC=~-e;Nj{JFCZ2U%BF!ZH{;oK#*H zd+@{eR?vkgNQ}&>LF2zSP|oc=xp=sRdaiiU*@cl={-$`5OR`5?j$(2xE z+Z_&_F`b5)aRDvsLKgKc^4NL)MVCkF$Q6#pEca%JfmtDu2}4Le)G^l8U3B>p>Xh4^ zwR;cXgP?52>c)=U)deL?Rn-oc?+|S0i|~HL>a)&D^jpC%DV1YaN4pllq*8+c{!SIZ z17xLPJ-}Z!O^-+T$I9+el3m4Og+d@d8sbmoYxXICvsz9Mri*-BYC!$uJz6fXyZad? z7B9?@v_Bpb(gPk6nJ0R&RA99szYAH7;(x`<;Em)?XtEWWQ4g0aCZX3qa8r}`WFAd; zRhx^oCWZsXdyi6*BPn)@X;2~#4#;d}2Er^MQ*Gg+q&@7N^`VR>?>_*P>0He46^8Ml zpj>IwHlZ6qlF!k(g`KDPW}jz1rs7*qUUHXL9j!cKtI=dLImR>4%!xf0+nU`mQKYc< zY!a$cu4rYh!0TLgKV(TPl&V>4iqm0|@;} zw!5NZT?@5l<}o^d>TXu^Tvfdbf}ob%lXU)ca6ZP_>LJAM=={saZ7qe*C;jP`Im8cX zcU_MGE;rD@z#geYD#a#HA9xs4Tczo-v;r6&p=TG+>H4Eb_ePKHPIY{8U6};hQ6GWh z4AAc^Rd# zy`Lk}m>&gp6En43dzT=6o?uU|__aDF=NgaWjs$wWRdOXvlJWb*(|uS^fxyFa*bBh2 zIiLosfNVjCQDoXe)JBqx7Q{d`grZ+eSqxp-*U+k97``+oQ+2ZYsw*MEZ%Ug7mq|hi zs>4s_WJT zy}~tYKz*H|el?dD?OWCOHYR5^mv3nt5n1ihCR8=On^yRS_5I-RLp|%bg5kcj?!X?+ zEg5k?K9~C3*e{BqZ>XYR_ z?m7gE_)or(Kj~?eVjk~YD+xZq;IT@6dNWjPrwqF6F{=8D*Tw%*Zi+PaMGpO}2deb# zC?)`QlYA0+I8FGkcHKpXa1(Qh^8=b(x-F2uxJeUZGrW4xQ54}{lc6MKJ3&r^5oY2$0zSz%b7{f{kfP1Vi+T*rBWM3^+wmF z>tN8yICyEC4}**N{>hK~@~#gZ$ARK;MGtJIDOIV2Wsjt~Hl?UCh0Rp9+{plEo}lBg zsAnD6!athpOxrgxm5LTf(pAOYo5oo_TO`j%-yRlA08=A7g;&?Jo>w=Y>m>Qxe$P64 zkTp0Z#EJkcIMeOgOKIy{E9<+f%c_J}m=(ib6D z>CT2L`nv4B9U{oZ8+K!*y97$`fZn%HAIOF{IY--qa`O1#0O+I91V?)?qdLrR3w(%i zil?_^ zx1b1eJdST~(VJBGR&R-#4WzzVOWT6AoyDuqfN4sq?yS+xPET7)a*2L;cWM+jBN@wG zyATg`wjee_=`wzjm3?iewjuUWT8Hql*>3Rd=H@H8fd~JIXqvyew+!HPZ`n|)-s+;i zBCAYr2?K~8OS=IBZawCxZNt1(nw+?1CVcrrScmI%A*ml=JiPNY(4u_-pAV}+3 zC=P*gCmOMhi5bkyXV2ARD$&uj3l~}A1R-y5)&lziUBjoAPe^%@bP`2EkefZ5BTtX! zHF5x0wYil{!j25Q^gB|HNMjNnAZwjh)RHupH3wg%bhivu<=esNLJ2y5b~Su@)H(D6 z`xDMU$Bk$~`NE;p@~uiA6L?AX&U0Q@#IB`E1b1{!+=5>s$!QV2%*9XAYXIFe^r>?^ zInUXIbK-O1zp}gEVp`}SzdVCA!{kJ=@_bR7Akl4Fj#Vw-V3A2sb zk-gqAR`vC6k1W9NyFU4@k(q8%)LM)pJ1k!D#?4JNQfp~WOmbf?JO{El^2Ho=W86M1 zk^}Y2Pux;3>?N+irz~VGgk}@g=$dM}{^cS#qZ;2zn+lhYlsqYc=Yol8MSMR#aKH!= zNR2`ALhuc&NK66S#Ai$7#Hq9#PBSZKyUY!U#j_FI@n)cC{UAjZrjpS?v1Tywa|LH^ zq%f_?>Fs@TOnxq=t12_jwoycykx&a2x;UM%oe0wMf+a(SBmoR3#zYG3cDoy!j~b<^Rf0wdS&in|Z16#MK~=ZhW}l)3Fn$WO5V_5C zn?}Ol@y^iT{NazTy;Yvh@Fw25tg#vME8iTGZxmsMM04SO$jW?4bXyGse(ul>y}0%f zKo~zMG#SX4L6U>U0~K5~0C6|bGxXP9RdW+6=zyQ_t~!w}z)2YI2k((^hYEq=kvHp+~ zrCwxtVS>UaFA7ydk;Ha0;0qcJ85)PFcM|{2ss7dJ1oHlp@`@v5A)wL7U*HXhl59@@ za<=CRoW)RT7ZRz2K|%gBy07CWf}(FxuB`A;Vl;WRMXuw=aH&8E)kIy!JnjMoy1hk9 zf&85!U)yTLH1NS5FOMJ}g4;!%Byr0Ad~|*ho_wXd6y~DrB-O3qKvV{IGg8JpRYmu! zw<^iTMC9UARFYQGKYXgFpIU|f*;|5ZN2LnUrr1|hHpU0R-b6y1p=0wQTZ6&wF^WKy`^bsbA1A3hKxzd zHzvT8!V;@P)JLvJX2rFv{-k-T;TsQWGj($TThITS_DVLs1YJ6WsXXvAY6hGZ0%W_b zzTL03-VEOqWH!Gi88(y3zK;{5H`O^KLU=JOOUbE5eQCUeMzS90AO>*|)&D7e9Du$! zv$M><^yE72wD99TkBXevRWzV*7qtMotV+A6GNEHv48u?I3Y;tQvhMzL(TNwG!b;88 z+y~;}{qpfQOJ8IBz>4CI8ljpj`X>V^%L#x&L~*;){Ifg7czD{?#W_6c`t2~rRF^rJ zQ(-iE&vcZ`?A&4-#fVh-)B=a@!V&0U?-VB*WT^m{m~->l#Q;CZ<%X?8^YCS+NbzhY z{g}hH^7{x~8D*6URlRff21PQ82hwvw%+deF1T}UP53LQP!XCQ!Y4hRWo8MY+R!b2O9j9}4o||g=Fztahr?ZhX^T)kgh#vd^nqI^8sW91x;Z>| zu^VVBk%gYp35Jyk9KpN532W=Fs8QO`s$0*IYL&&?)7}%J8<$YroGtpOKPgww4%6@Q#o14&RacnXT!HpS zgcKZ!5_X{f!lS5Hjt-0?%Z9fWz(Z;Z-*TVQoiS@eh8B)?;Ib!5OE+G77 z;o+oZ5q=@A;tmATt#p?5YR!=o&=x7V!{l^qaXY%bf)Rq&a3~TbVvVouFBU-c!-kX4 zY&0BWIy4QE7&spPAuCc#Ka+XO^%*ClFroJD>J?M3v7uwyO*$s)on_AtH}&_5rIH3l zH-%dfvSG3eB(acxZKPUS?i@pu16T|~w2KA$<&uJ%x#!C$cGn>LWpl2@t^FF?rw42qSRRq+dw^Ti_QjjaU(c|UjV><#an}EtFosdD{NusV-SEdl%4b5*5x4|S$bSPCV#{5AJWNfo>4xQzTzHX@93#v%T@PY1T*SS z^u(J_`PO5&*Z!Dg{JD2Jfa$^2>hU`sbvBn9*rHE#Tap=sz3yp9rH^ucbI@n1L#|3X zoyP%Vu0HvdjSc6B=fK*~p{*)wvo;|83vDgWzz(m{G9S|eVzfdNZVvUjnRKjdO1_?) zM<28&utPJ0@;K#%`QhT^9SJ&7S+L%#5F+0B05)|J zCSP@2=I4DwBWhbVVmkFJcJTA%uVw#4$Y!(-Zi8NQi`daaE3E^mfF&>BBgO?zB9oH; z7o+&EUr1nry7BTC)lJyI{UToJpTJBCfvU4kZlA0ABS2`*GAdYS;R$o~hTL_NoDKP^ z;o=cfQrLp-^-g=2{};`c5doMhd_>q0pR10*Lb-^v&H>aPD1<)yR9Y?7SLM6qrx%}= zCnrE5#nQp>1Rhkx*U5=)**eks(8Gh5#GFB_=+l~Z!4Bt#0(165C$T<4&rTF*%!dNi z2#dMr@QGvqy?BGj-g zMRb-Y3{eI&ak)AwhHKvYmDQ`k=m4p4e_WyEbzN4i!P#r4B1AyJI%6uRI^f=JJe9oq zZy3gINJ=mOH(5_pJwPr*Q&#K=>3~zsZ`B!p>4sFDa9w8A!8t(@I{aB)zcGvYopS5) zKcLTctR%DG8#~dv7EWcHKz$dkP8g~{gzoum^_nq(D3Q)FqVw~E{o(L}!P*VN|Kxft zm3@W)%eg%3|IizKhT|JrGl;9cR8%U;l;kM%L+=z=m4@fhQ!mZ8s_hWw&(XU{8S@p? zO>NGcdvH@Apv>u1A7HBv2Z)yaGesY&6Fo(O&`shVOdGwQp_0>patO`YRezT!V%ns> z`XbB^K_%ow)=f%R#vqjZ;eBYk!icM?5A&-0aYfZfc~$#`S|l&k0zKm^>OAlqlaQy{4#=f{_L}` z{k@an56U}rc8AvLn}y+4t#>mUs?duYB za<`rIeh8-!ZH8naof6y={HHBa1e3!6rA|?^oN}WB@nDGcx5Ved{!26P!)B(&vub44 zBCJ$4g1A&|1Y(Mev{ecqU0;oIT@paHcx_ESsIFvaUmlxRTnLt3z`+@m8&}lmJSr=fH+Oo z{am4VXf2f&7@Ps9Ey7)C$l{9F2J`t~WX1y;Wh5YOgXfL_o-a|o*qF@bnNjC0l~bu> zTLW%ZSR2OZlrwN}SWzNf1SHqr|1nl0*79iI|9H%o(NRS;P_9_;Qy30^o=8bp{R!)@ z$R}F}LKP%-CQ_hG3%HiJajIGFFWPo&h--5O>DYxX0d+vZT-sg`_1n><3Egrs)5$5O-8Z{@Ziny z`N&=wV4}{(NWa}X#Nkn|I((s#pW}zcpN2iL&M8{^lXTV+RT3VgQgt=x9jRg}OEm+X z)++G-VdW&hkl+fp8N`alm%vRWb&E1kFqQN3@xG5Q&A?GD3c+#xSZmoL4E_Ihh!|O$ zW4%C-|Au&+0cIWQ1*(GtVo{c+xf(;$z%46(bApZyloS=w8X|oWy6~>d)^Pmhgd8zx zSqTJqgCgbl0GFRM6VZ76r9uA>Jt%8RvhW@#q&*b`*}sfxIMY7ZS{Lbt{_^osQU1|I zKuE^$j8xN-{o=6^O_q=4pNev6hs3Vxw;)Zyru~opS1Fy57g4riZgK{%wt1TSawcK` zup#TLB%WTqExTS$%}D)Ol&h~+3!qD#6jd4t<9!>|!31?_{9NHx`c9sxqC{f@t4Gci zwb>JhXQ%J>vde7VZ}_@C9CqWpGs@f-ekcdsbFI~=MT zt**bF@|v=x)vxrAF>20#(l_dx6Al|1N!-L2^?l=-YSHoiN?5q7>$~{`zjTd1AxQNC z!jI|&kD3LKn+0E}fPhmbrpTb-0b0~h^z=)st!PyB`pBTizp8Ir)ralurz(6Wqo*I6 z5GFzfch)Pc&-|hOIvk(tA7z`2*Rrlw*E>=uV+9V>XHm4ZJ%|*+zzw7k1ITx0&U9Ig z`c4os0YaPJ#=Y<{G}=kY_v^zUaJCR3NH~*C>R5l70tRJGT`bWT(_WkHexG?sD)D^f zhb+x^POFTNBLPSc3b~Se;EG#Uedmq6P45t2m!KGLe4YKN{0=?|iLq~jQ?>L;>mYR* z9iv*YxmluxLGP)&`Czd5NZ{;2{TsT4GuvG`t)ET$Zw-x@&>OUKVAc<|7NCz7fnr>0 z!!J%1fQLMph3Kj>LE!wzNl<@UP1el~=aM_jY?5$Gb^6jl%fzAk$!rMx)CYn*(0Ji6 z=fN2&GE0aiQOy~hP5(>?qVIJ~^qoY#$hsU2ei)Wr)ghk`5Nao;1+4T!4tk_UZy($* z-pY2N$Cgm#hWNc+aj_Zc_5( z;Dx(-_|xu|I_$`}X_)DY4?^e_*t+yZ8(F~-vp2p|5Q+{$_saEq+k7*AjiD(Q8uJf< znPPEl_jyTGBh3t!gnW~@J3TqWvIsDwhA_b%#9A@ee{>T&}E~o{Zt~S>YII^~4!i?#) zgMc!H<12izY0B3e7iVFs!D7z`W0Saf>P=7PQH%X%pE)i5dqALVSbJCp^g=3bn>y1n%OFijRBX|I8lD8~5_?weXD(>@(sn9VSD1azvpcT~pWuA3b$ zZCMtm+szjJ8A)|jv3)p-y58e!NugT zOh35QQJbE_Ut-f zx!}HGfGJrf_+DD?C^e~)Y-DrA|M+8&M2tw-n?J;RT>b(>GW=7aXlNObz&r6ThL~pa z^SkU2TgrFlZzG{~>9r_WshvN+Uq5Iwa3Lng;S~R)uPH z7tL!<*Vc(hUNns#lQ_bdPONf1RlWySU-%mt2Ml}@xJ_jI?C!F?OkH41cn9$_7P9kv zPl=mIs!fK*t(8}d<@T*b5W(DUu}%cLx1d#KJ0I|-7CkUP zCkoZTd-#7bz1{(@c0n4T?g%PazefC9?Sw_H$jp6GUjBk>nYIbf3lPV$MR}*nd_f!- zEA191x6|s7*@>dm43|1^!Xi{paW2ZQm3SC3{6;*tLxMu!Ff3l`p|%@zptAx|_#P+D zu-^)Fu&unV4Lv7>GasLuHDfjj3zay2bCvgzZq}4VOg-vojaZC-R?@fncv+vx`0`h+ zpD0A$O8Hvtuz}!depl27M75|iZuHdA9jyKEBh5aOZAP0#qD8c1c2($cpJAyNXTs;S z1@;+y@MF#MAPwj%{W0&HQUQdrS9}H|x-wizh>?H=x!7S%O_4>f)!glV`PDaFCe+KS?pJWLIs-QW;&1*>7fv8l08WY}%H=Nl*nfd4v{s_`}+;B>zg|p>uZ1g+9CyX&mZ-aG)PDx^RJ}Ypxy;ELyPPNz^_=XD~9wt^i-Q+ zLeBQNwi2Np&ML-^SM&xIEli6!`PJ6S=~^V)jVae^vN*9C5=?W$W>@tKa_S<;&z82e z1|VV~<%vf?RVA%In>W=tmul`n%jVXg)j0sHY0d>bjZ9}wzv)qdZKvo)eF*^;c@`WS z@JH&Q!~0%`jTuBLcNJN<`s82!N}dOM#mqYG&yV3o@sysIuRkP($LSI2u+LeSeo-~g zaYYL_94rO=4s@^eXiP0#ZJ}6p@g9iL!xQ&C)sfJy=l7mQauuR{Fo?HsD_lml%q%Wj zkS=xS1G9Tm2iNT|s2!4&;+#BgGN}6!?F>v%ZHBgvpOYaQR`>*y)z91ocE2-0M^p)h zq|_f797!;NHw*YGO$U3%7^hUudcYBtk~uL?#K>_>2>y)Nqv$<+(%Em}FcLtk{0gsi<7Wo#JJ=5Rm4&@%658-+9!;?e2 z_`$DWIdE=woH)B09(~YBK`R#RoCwkk2JC4<1HJmB_AzCFco*^F!F{FTzrR);V_>+b z2=EJhS~O+gPk~k+2j=EwE9+v&5$8nhs$p;vdA>kwFZb=tf!weQj#ZciD`pd^q-_-U z_mIOyN3BDV8uTM%IE2R5)~9X!s9($ova_)_i_~2~yy{z$!#W$3N;xotdfpsl%O1PL z?z2lOPf^P#`Z|@rTmIL7M(WhqY`?(e>!%O{?f<_`ZES-9ZyATpEvM+wQ!P;T#^N~T zi&xzZ;3+Gjm{AM?gujTi+XNMD;G*~mbkd%X1Xq9CTw6w?1=S8J|Bs2Rjp@`d%dk?h zvw>l{b(q~X#xu2CfKfpG-2u0+e{;Y$zhAQfO0$T?L;g+q&a21S6zR8+f`+o@pT_u1 z5QH3-Gne-@p9K&C4fI4N0&n?F)}I77$}$$FO5f!`PriAT%G zy~qx69Zv6=yj6A!PNMaa{Loo|tTAv1%y2B0HWs?8sFz9uhJ+^r=t^gMWPZyicwYOIqKM~8sqDm5h$QzkGt z)2U$0A>jjh#i=hIf6KK;(kxwhz6xZ{@fVARr7|H!6{197(nBN`nsNIW7KZ0~q&(hF zAvy}n;zSD%^dOBZ9l2COPo}9uAsQgrmi42X%F&f3a;AG*hS;W z>txRtwVG-5Y0kEq?ysDG^l)L}(L?M1X0SFs0v6JUR4p-_kIC1DNmdFoJ{ajb>HXkz zyk$(aR-mKKiK_+u61N$&w6hC$@Ya;OJkx8>tb26flVdKI8 z8jWw%CK!hUR7q227bMepo!M`R3aahN^7e}@k`o1i>!ZP30U%K$uvn}>IwO^wXWiC@ z^=EuBLHU-8EBXIKB3nm~Kc`%9y0s%AoNg4uNkzi`e9k?4v(7*c`JnWr)NHVVJrD&s zNeIXP_Idm!NZBm3EOgFRX*o~5a2xUj4 z{_)HgrUNofUjS8aXd2n%DTkw4(67m06{xp)Lz(Bz{@{3?)ILOL`|Z+^^MVf6<*%a6 z(e1)dS!Fwr9BSCkCE%ozA=Wl{d2wUo!51Qob`}EN4f~x_edp_J-CALM`C%}&{333I z{Y`P}8{4GGjO#16qA)VMPL1TS9cl3VU~CDo#i!VS^UjUV0Ox9j z8gZX4o}7o^Aan;9S$I4Tlky8d3)?ck6P+^SWUzKiF$A6e_rTIwZc8rO1XPq>wFPqI zqrmOf4SsP|qKB0Bg0q7nG>gy6_k>evrhq^tZROTbPl3k}iXKm)97|NpXa?>a@*0vS zMquZ5bD{x2=yqEevQBMc#_QTk>vsBXh1F*ttGJMKQp_SEc#SK9&c9;y!c!oBiihlX zf=nWai!uR)TCtB#;P*|lm4+wc>ACH~Db_9|e>>-a*#u{C$q`qg$==@GD;GP?#dC&+ zB%(qc%8Adund#crYSqZHdk8Y=q*b%5?Svs&FXf-8i0LKXJcA7LfZOI6{jDt#DNa@?4xeA5EmZsHu3i zY&kkaa?5R-a|MJ*eYqQM9e?-m(U<@FT3cmTzEH*_Y)*J^lLe7GdwV=g{cOFnx4P>9 zE3QV!A6JL#f$N0J+MOCCxWtHQk7f<$&GIcdm$qh!>5XBl1#YuzOHv2RPrm0Uv1oQ8 zpNC^tFyA%_JousaI|;NGp-aclHXl@5-B>H38kc`3vpxQX`c851q^twYsmemxz2*0rYBljujg35C*M$Dr@hJ`g;N+q zQ+o>})x!O7xGxn1o`V&85Jea5m91{M5UFyduJAobRWo{!yRM4+bIvxcLA{|}qmh#2 z>o=qRRfNZp_~Xb-eN>vc-o7!3uy?{Us(8S~Y&FEHOREG@Cy_zinQyTBwb+etwG-I- zCZR&z&hnPMfwZ-~*H!G$igqbKBH@ZybhsN0Yp|O^^gLHjK>{LLG)@*ow+Ki<;v7+c zqP?p8qM|ZgbC4fr}E(rhLk0)tLkXF)5vj->VHL5sD~= zXJ~3J3&!Od(6q9zHkZ45%iDqfg+kh{fcxWvGs2QN1zulPjGz*-iAcreqYui( zg=tj~JAMtEq*%%U8Sonpq!qyQNNg6aK+oe*Jadwiuc&2y8fyFH`5U~TrL9(M~*%lLopUfuv3Cg^W>s=MIyA=rmav zEXPcu=ji*($BO9X%(Ewn_JHSn!V1SHo9Ap0=rb6s^cmAINPMnG!2R!} z;4n@T9pJ%&GCKxh)FqfS16KmgpTfiH5j4dyH9+dX*1l^vA-ZEG(8f3nWWMiQ2<9|l zd!J)5RtwYhFZ%A}_Zl!Gmhga=c#jW)7F(jq4n=FKwn&WUIZ8b3qy-vk?&Sd(zT zu&{uSgE!TxMu9S+=!X&(K=%ytVI~r>zw-yT`SBmsWOgUiAb!zq?i~` zQPGzgy4XZ#4V84m$0+Wc0mv8zyP2(J>t$DKmd_&HezC)(0?9FPq1-@fb`r=|(%CyJ zigYiO`4(kIDJoNkPT7pBu;WPsw(4MT5bc)ciSITHBX{k$e(X)Hv`}Lmm*llorW?753X>s`qDdLw`m44ej8jYa~+U?u(r#t{Py0`;hV{zv; z+^k;P7G!JI=%C8h5HR8P{E@+*KO9cruIk-XwXeaDtQW)Y=gYkLde?>;2OaDlLB+>I zu@7f1N}avbaweQ>u$I#}URfN33C1yHN_ptPtZ4cAXgG$^ziW&m@40;ML5lgU7X%#E zMie@f{m>4+RW)EW>XM6}fo@lXUvgUJmKUJw4?jDW-wC>m*EpVW6h)4#PSAid zbrpxvxB1YY`?+=-kpRTL+^f%7r z`VO*HnQfzsgd?7Dw$3SF3p(^J|Klv^1p>gCt*_mT-R`5W>;cH_wY5k$=rZZbInunW zEOo_AcPE?f700iwU(i7}E6L;kJNkRYJimObw=RF*sWvwVLIz=1xB$^5(NpyDA80o+ zVa6A8HZ`zCgqS2bzaeI@ugPprhxI`3)Hs;E>U58kNCAIb=*GI_6x+R|Gk@J^BW8xR zI}2x%V9WLkN(9;-2(XUx+P4-+m!IeKOmuACZGF^R9 z9m`xz9 z^Q8O$#{*r4A(ou+o7|PW^l}Vu(R^93ZD7iRB}~IPoA8*g539ift#7P35oCyoFxt^^ z#N&!KRf91OGMCKYUS~8PpUU8JMLST|o@!UP&=ib#2K*G^YDwCa3s)>tH!0RX*!nLv zGiXQLwt)wUav2Hb+WY{_y~DoN&Uwbt-B2}|pOzDhh#VGjsq|KOxm%8xqxauEc=%du zg;v>_{sjp2Mekp}udu&%uF}Wo~8iSi+<>1Tla}ENAfZ%N9DKx(bPMkanQv*{B z)d0F^l4Ddmh`ifbP~sI%s;-<_&1sz$$(FTFr1I*}w|s<(ldu*>zZUnlM1_(ww^3=T zv+lU5Rl&Zxo1H&$NjNo-0VN}m5_MB>Nz|J<2Um5Qu3celt(s5Vh+T^l~zQnmJb{|5D1#^oq^ecRqW(AL;`XseCO(Kxvj zfft#szPXE05z*K`@h};%AU3cD?E@NoK;0`Qmd)fzxwx_Oe6hRReYQhZ+vn@gp3h$N z+3hyAzqMwN2Bi8bu*prlT*972GH|HWg07HN$*%9nT+pu#g~WZB1jJXEMB z+rkG}Qdw#2%_GR^zxkmL&~j?&yt}cwo^QcG$o{U?MK1aG-0n zIGv5qb5q&a;%5}CwML>d!rC(Ss;Y@34T-68z08N7&%M!}HDmZmER5#g+R}mcqFL9N z25U`PG;8vG;ZCY-gy8!0Qsl$F0gyynC0pigE0^AoqsFHhUI)CoUmbIE*2q-+@@f<6 zCY^s24JeD6s<2ya&4nVKp^V%<lVQ>3+upgkJWPU{%sfxf`{g%(r}T z*C0Y1sicGJ%u^QdR9PKs0ZLKAnC?^j5n5RB2xNhG!PffA@hW2dtwnBMy{F1l=sjT; z2YpDsSEHY@TNt{KFQ8m>pUbq9a=P8^AC}K~vVFKu#t`0R zfi#*I{SzBH34+HTGW0e;_L`#eQ-pk2PE>g}Urg}z50+s)7m@p{#b5*tCcEP;9$fzO}#5=0Y>qU6!|Ev?-&y-Qb;*sQ-uygBG&C3lz zNjG+!9C|^UG)pp*Nv|k_-~~qq#&ZFkNsa``8ATy46)9HM(?h&fr9{1}LHdzJ9&=dc z?&F^oj`4MviaB*+wql=MNx9H}(>)^muit%hI8w9?12a&*Bi7$~5-2frZ!Ht7 z>ap9&ym=*1OMCCksVu2bh3KWEm=K`Xm{K&uN~P-K@m;8x|KQ>h5S1&#t5x@+MkO>@ z+3W7DzS@IvR|gbKS;jQuSGT}_#{SWW|0*n6Vli2+`YlwVD_|Bb&HGrmT46jGCzWv? zd~^ACAB(U5)u7;}%$MK2$c&|zZ{)`VWNbNan$mMl4Gh5}2J&d&)3apPvZ-E)~<4%qtuVhnK2Fh7okCTFe!khtxuRf(-($-tg{X zh;KwxLl=CGysENqWq+xeo&Zb$vR)fAFC0Z1eM0MKD`b>RgI$vX=lF2d2dpQfYGNLu zdr}j(u%^!5RxVf~G_6L69GyexE0LY|-yQKEomS_?B~FJq60&r8lNM)_ z$Fe_lVpFkdFiCI*zR0}TZRs+YQ|oQ&%lV{Sb>B)~FYhu@1L4*8Xr{;(rCbcC&`iap z9xRKAH)2KE9*%Up+2X<)L62F`U_L|-nVr)^KtEgTkosMZU+(NJ@gt~?MDkz=EeFS5 z_W>GE8rd*49ytOMu%{%!O1Bsi4J0|0ci0qrK^)PXhLrdr4`2tf9JpI>Ky=SDxr7bE z?GlsIKRpG6@>b~4MDxM0a-T>CQfyARmllTKst8H0ci;y4I%ZB zGKwM`mizBXp{;$1T%s?{Ob8%SOJGJsMj>m4`|<+P$*(7&W_fD5g+`+wrZKA4=C(kM zCao2<4b6Tc?*-zubQ3{mwJOLh(DJFafU795ypq@!MtxJzS-lp>1}!H_+CVZ-YO!T? zo;EZ~=M;%H6%7E$7$r!vFA2!UM5xL##q6dSg7Vd}+1cGcg7xDn!I|KYjEK>`Wi_mI zw;Nm?Cy1OPR~28(Ver(}@?W&dAv?BR+zJH#g`rD|J|?qOx9*9M(O=wU`FgyjRP1b{}xHebAeG^BUJY*J&Q>WW1;|{4tP+kwz+@i^on1 z8j;@(TcoTF_(MPrd*k;v zABby7GD+t*j4VStOVeycFG*s}pPT52<){#9OyvH~dG3~AB0RgD3mS{M{F3GTh{qB=nv2RRnaP0M+HwvE+d3{64wO5LMesZ)gyMg2OApD9Ep>}oB4cG$FlK_=S^m59 z5%Yg)HF7@4lDRpP6rOw=+9=|VrD!8j{B)cbPKKzt#3(mJ;~GPN{_%tWFmcuyK3gN> z`DPo))EU-Ud#8ZLEg>(wk`s^4lo{cB5gS)CSDgjU5Mx13&Lg`B9!A=UmO5s17m+nL zB=5=@Rd3>OTu`TR?iD$LF_pB#5Ic88@NV=}pgloKAtP@cl0XI$Z5|J|;f z;dvL;ncp%x@@%20Tyzy@B;}%y;G|=80>gFQm6}#c0O?*Cx;OX1&*+XjG-(v+`f2$< z*J@BIS^=XrS|<2^o8Y^5V|ecYci%K10iFtSaJ*hR3fp*t;r(o*V`=pRFaBzrDrmqp zfpO*{=d->!Sh(&R&)uMYS;o;mzGk@BEQ1s<=5!^>_MQa*yV8E^Lf}-(7wc~MUUJ3V z@@M^X|TG3vCNX-jBut1L=!qXA^+^u3rX)Pwud zUvjpLp_A6Z?haMC4!BbXBUF0&fS{>#HJz6giM1?1~MNqPxj#QDL{%6UQF^g6hd zVD}xPO1!U)eUR^I1O2YuPe0y%u<6I%eSi@3-Eq<+Xo|yPT{&#u$VvqlV-;8s8@;W^ z{0Xal7?v{QR^zHwBq$gl>zRyvW#ukI7BNS@5El;@JS_;fki|&hc=|iiO5gvQhNsPA zGs7L%qJ{qI8WUDQVI36__aQUfuahXMfu}3%zAtKMr>w|vTy|&Z2Flz*tSnz?D`1Bz z8Xu$|%g9ud6WeMjiDqCv5-TCI7bA>Q5HF&*mi$Vsn6OyuDo+0+fL+bwS4bxA3b8AU z9X+o`ehXG6&T59ZMK$-xiRX8Cd|&@1c`C#y8ktF9hcfzeqa8vCNl}dvug@z6 z$VTr59Gow|_~OwQ-abVt=DD~MI@IlB2_3*=M~LL|APjJcT(2=YZ`P{PVMLi^REQ^X zOvw#D5xE@cQ|>)U*IA2dfm?f`HZQ+V*LRL4drvwo5XAc64M)~mzKZ`ymJAs_a?vG? zQE281W(@K7i3tCWt}Lul1}%BTz$%Alvi$8fg+OJlGMK#o#>h`Zp1`=8VZw|blm~|; zTP9W}6z{DhPz)V~>h4BY}eMGGlMAnlnR$5wmXwj!yvt!~c}3wk44-^#F~BM|*V zQX{3%SMAgTf6Sg=i%PxeGLqKby**fvYGN(7PK|&BlZQ#WljMn;@V*T7xG z6fd<ywW{pa!J-+9Xb{c~~K6jm0$b;g zqz@R9lf+(ho5xXEswS6wgQ-;kS5}2rV^Xa<^b$ZKXuKt}s60W&rR$mbVe4t&TLIGE z88pbX1tn{`ULxKT)YJJHoK4(V$yfgGGp$tc?EGx5aAL@-zIc>2K7A&<3l!tCqV^ZL zPRoL~Tuuf(=BoE$+46T6^mlshd*$nSHtg~+kCpf%wJN4=c-&ckK?LmOT1W`78kH$I zyquh)v?VoXZ`~p?I6EbMI)bnVFbYFrYNcAE^OK9hqM8{-z`DC-L6wB?;tnzoe6*WZ z6I8?ShYFOxY$tMdLCy=jK38~to^f;SQirZvp+n7eK`Ui;nCyAD(?<_St%VO;OWzf3 z#{K2uk6Wg-%`ZkaFC`MS$uNlkai$EBG1gYarC6x#-oS3_mo?i^l_#BEjqejRrB)K%r#<)sRBgQ7nQdp`^7{* zcm)2I)mdgW!Q%!{-4Dzog$&f%wZ>dV(GL8mo36US( z#$n7AFU|OtR%ykQQuTQ6^{7po~@o~E`pu!m6jwW{5Axo~-7w^&@+T-w06rC2yxFk6rGi`UZcu#)Xz1ZxoZ!Pc60`@Vry5C*}ZD;xFuicGnzF!GltHYe8LDcYnrGJhS zq+w;T$A-z&2|x1d;UqA(WQ2$n=BgTz$29&otHKeeADdmgCP#=_K+R8(NRJ#*Av_Y+ z%x>8iaWg+l)Mi(IZ<2?2)a!k(n8rIi!CkCc`W)fZPrcDmEvI%5>)hKxINOm>*ex{O zs&e?EQz#?CaXk^50-UG%YHbCYXKZsAgnUwU|4qTz3^FD&2pSdB`pa!3rM?ysi#m?s zGzh1J09e~5d@AE^;I~q<_Ia-c#%FXv<4J8EvD^VO(Fj&O8{Kpx2wqtH%U{LwR{9UOJvf#9^w#84@z+X;?Hm(C#vKAQId6M475uV&F_fLlGJRbD> z(og6ubxvJwA_ge8l=)Rz3e5#Mu$VME7e)fYm}jH}OGHf@9>10Xx5Vcwo)mAq9j>rP z2{d3KgQ}hx7d=VGRqTw20W|;~a_QB~mkgs$N>*_s4}=5;;at(7O$K2#&wTgY0&ih! zE1-NsV*fc3JU;LK8IHUb-qOGGy4a3zsa1pV$tRzXdu6WJeYqGv$SrIQ&TZRy#WW*{ zv-$O3K40gJ3Ky1PfVMZfYwOF;S9iCavk+GrxkvXgaBl!D2zI06$*`Daky{!RYr%Td z#*M0v_*rOL7YI{R*n9XTQtm9r_ZyO0DzZL~HxI*7EHYx0|1=pD&lWcpU#&03if~LU zuDy3T z1qbDCUgN*~22ACjw(HdeT&~simF03Cc2!Xd=0dleJDh<#>oT_a9X3}iF7K_s6fa3+ zFL|c7$|5n9aj}X;z4eK;v;e{JEuukc6L{^-v@w{cFwa|Hh@m%juIyLo|=Kb$r+aEIRr9RW0QSaBgvcvlL<19G2 zC}pMJZ?N@mxbXMdGGpv5@@V|tLl1#V*Ze}UElE;>>HbmmI@=I>l!UfexmR5Ne?(Bg z%ja7YznU<*y0^YtY;A8Y!A^HKwx6vpi`GC!qFsEaN?8h!js6*&!Vj42Hezn$h?nW# zsq3P?yhPEUi3b)3A--yD`ZxrubxX6py}Q0xY_4~f6G;6iHeYP)t#@~Jx0hEti<>He zj%H88Y~pM^zs-@`6k~I5Q+Qp97$4q~AR2}8^wP($*uY$c02KB~q?kK#WPvTF^u~d9 zvww=nDe-;?>FPCv#K3Sv>sMFm2bDG5-6ZQ@SV)HPiDIGKTL&~lmxDFkeMug zPYgRZVc;U5e3he=j3-b5CgH+;YFE8davG*!Y6|!Ha9@%{FKzj^f|a#@#u9Gt>?)}M z!fJSd5(dG_wp4~|0gvn)^Fl`~?mU+)Dg`DgzKhe#zw71s@R3N)^0w4w!8#d=B_iHF z96%RwcsL7%tJ}NWy$sL6qj5Vp;X&EA5!U)vhgJ|`R3q^3X4MW&*Bec7?X5KheV`e< zOf#sm`i7=ktIuG*NIq(;T`b(*p^)c{(zyyBwAX7%^fv!|v;`9YXJ_Me4jj@*k7B1_3Z1@r!B~#Dy!tjMnYHevzkd zK-H*++S(QYLJf@q3l~R@V`Q!VX|6DR%JzuB9r!F`XE;9@Um$9NViZ5dl#Ya%?WZSU zOi2peRE_V={PXdR7skT{1F^H+S$~yNgaTcdGzCr(jBM@fzFd2?Qt*#rDtDkD^Hc8c z@fa})SV+{|r^FI+G?Nx%XOE~tZR??~66f|i&xOF;rR8m@=kJ$Kp>lT`&4}5bYGw-D ztkDBCinNtQ)AbVGi(zh0EhuZQ*h!_9F93awCjPYi-?H;8JbZU|#=qtNnQ9w7scEgY z85iH^gsWSZ_;fW2XWm>;zV6Z*WLr7qAc4zZL_MG^B7YSHCbeWFD<*Ps$lze*fzpK5 zeYv>tV)Zw}T-$y5`wcJ$_PdOa=}Y(#Rf5sn?WzMVew@AKuq+dP<2jK7^u^M<&2Ghm zP%zlD+RkXatuD2P4<5F)JUKiZwD+1CK3{KZIPPD(xvnLWQOiVWiT|M{%D>|)I%lC~ z4f?8{Y4&kLrr~cKvDSI^F0t0Fvt@%eKVs0K*+&oAQSqwbn%=K3l?ZC3ktgKGXre@4 zyg6wS1$RMBW;LUyGdx3GE|G8yxYxOM(ye*K-?~K1bry}Jjzi*HTydrs1EF3})8Ixv z=9;G&jFD<*Pkbrf$Lo5R$Atcngp9Y=q`C?+C^v%%%?Nx(_3deR_XD@cw zR~A>|wOn*o4Xd$SXk-bfDaZnw8i$Uqrt^GtV91N^os2rPluxed6Kj_1HiPzwsW%ikbNITLEOy3w)OV3@yi0eX_ieIjJ2Rf}g!a9$=H zxFnBZX5lk@Z}n|sJ$xdibKv`|_}f^FXe5unJGybr)mWb~c!ckP6$?G>{3R5h>jrkK z(C3T`W;)dPO9cG4N$)TRY_823({gud`?-%fK7&lq>wAPy5)n}0jkV^am}Y|mY<`7<1Lvm{H>+t-r9T?*&^pf!NV67@K$R#Wx&@Q5|fctdUge@$=N^#pWcaqyS`Ujv1n_uHZQM$?(RY6 zCOuc6{OznqhXT7Ba|VOExWQ92F8Ge#yHS)hoP+1Rl3Asr%U72%Dju`fXc3|jZu)*+ zt?Ac-(O_Jz$p(T7Fk>lJEfS!20>hChIAV%5ZVe5QB}22Bry9w4sc08;%$LzcAKHC;I_{oN#&6KcpZ4?`A~0e_!$g_K zm5U7b-rnUu6bqrmd%YvC8FDP)mA6t){ws4W7SG-fHHa)()$8!QScRJ$>s-CsKSxEN4CZxvL&_!TNqOCL)jXU;ul8{cG0B9%`OHC7Ur8h?99` zm7s6!6sS6Ktgj3SAeR{#YR3WSi-C$&uC~ty!oBYnaGrc!Bq`}R&p_T=>yxV#O`F*b z>!)rHH$20+y~}@G;M_4+yy)!0PcDBW?Gqx4%RDucV!qNrQHN$5qY+tju{_v00PPbV zne^ZXB{fx9=pmTDagx(**?Im&cfGU7(|nlzv-F(PK6Fu|3}n>Y{`hp&CK)|am(+`v zM=aq7C;ef$-C4W$Kpw!_*I@id=adr}a4-8zS-3aW}g2x_Dl>O9YGrXcEBGIQR=qHNAM($xHH*!y(g+#$lf zI{b!$P$$Snbx6waS6rw9S=0apmyx#R)bcQSCSQ z<8dhQOOefwEB(MNXKCE+)vJn-N!j2ULz`|j1K@agbkS%#dUS8}*sqhr{#%5y>RQCO zG@9Vg1MhFa010TYMm8YTN1?7#gZihq3fD~wG+$g=*Lv04SJWB8cGwsNjUf1MK{lBr zZL!0&!k^7qwSox!250~4I;_|JXL9nTnd^^ggyf&B4CY}xu!B2?#%*stKsJZm;}*n|_yAJXPyA;n^FEW#NT zstI#>0xF@Fg$LAT7e`RLgLhwbC4aI(qOghas*odX85>~kufz&7=0vKE)wgg?+BE$1 zBGL4a9khwK8Dh+qkBF%tPu?Yh2}lgLT%5jWC=Vq6r13Bzy~Sdk`40DME|#`B4H&m^ z+|kzX3Urt%_TO7N3 z?1s(kNgB&SR#ZCGf`L?jIisXm`AK3ydlvIo2+@L1TkpP!mZtpA0~4e117{0JI0BCF zVBF{+D#w8Q9TMS_TlXKIyn8J+jc`^@fUhYnL0fmR-6v3Y7!PMQ)C`h4*G>a06gwg$ zK%z%+Vc4*L@*~18;iAa_BF^S+*jMVAIfR-xCya4DJ+J-Z=vvFafO}Ly{BO93RfomEt#^l~JU0sh!g_AA4 z0GT#)$kiYmcTr140>^XPL_Chj!BDKABeSywxmGW6e9{*nsQfS_Hj*6jVqpT~Mfl=M zcM0U}Zf$@2^a0KsPKe}`dVFvISq>gns8eK`pPaiz3;wW%$>iBg@9iYqaqbM|oF*R! zGb+2?gNyz1-_pMSn_3^&TN5DUPo_$T==3-o~u7>Dvy@Cr^1q_`&NU{CXIF z@$zuPNPmt$z%kD%_X=juqVdk^=eOn`ANrr&^Mfu<)q3{NE+MO)7i!b7aJ3Y8? zT<8tYq5Y~X=d#1ge;f}k{5DV^4r>nwB0d4Cle1K5_e4#N1d&WuPrE2L8Tx~P6le<1 zCSOMtX;PzZNkuC%2?o|c)(EstWC$P!a!~9BUe!zq(U4)DWPvpd7p*ZpQ}~^LFnrIp z9g%Ud=$}ov1MR%{5;;S|Z@c*T%*EHd4!xA1S5(DAj+w2hPMwd&*U%g-`MG50$`Wo* z`Lrkt#W+0Qn=i_(MZ4wkl_4wzHm)X31oNRJ7|u>mrB}UC7H^DtB*SJ8N;f$8v0a5z z0YEy+S&tZ4vb6dYdRtsYJ=WJ|=JkZ>=*&%YLQ;yBc~%=%Bgk#hn%n4{1D&*@tQ2C% z6^~q3L%g!z*$}SnymiP|%-2-xi#yAmdF9h;YQ~zQ%xm8eXdPx_wWQn%onHrzma98| zc=UkiwHuA{RR?0w&!C?7=qv=T*(qexGp!YeI$mPaU#I(&g~TA%+R17GrTfTUL+hJ% z##Yy+koB7GKJ(gl_CKkLPJ1X?evVAI4k37pn#vroZVJQCYI+ z;M>j3SLhv^=b&{J>YYqCst-n5%lcrDf_b+RR>^dvb~KbU0JP`EbR{0jMFLl<@joed z`lBNv?jQ0Rt116j!>s_yiw5lSALy854>*A- zCM;6nWI|742hc~PSWE^l)D0Q9{3r>h{gfDwlhE-=xxs~UF#r(k3w1+^j884Yt^659 z^o?6G4@|9$fTt$0Vq+pfYUPPg+et;speB`htykiBl_uz`Y#Ep&pM}f?^>xWNNkh~g zi2;gc!E7=ayNV6P5p3p5})&Q>-x4@Ai0< z>U~#Oa&XaQ4Uf;dWX$IebUxLl7^+uuxB(Oy5!(P*mKW)dYobJ;=$JOg1cdO0L0p8h zNuRLH#J?`?yimaSLai~E=K;?XEB=aihOe(LMh)is%KC;oglH%Wp&S)R=QJu8$c{QW zFWBZvF2XV7^6xNurn7eSOw>7`IH;68@xVw|j2g!--;l8hg`C2n*%agOiyA8*J+)ez zg}B}J_}hdHm^Mkv(-bmleaHm{qA*h8fywFZ{X57w5=^Qx6MGs(KZRPpRHm*!L-6e# z5_>D$35hvP`)Av^+uhiF^pNKw^gg>IB(w-FM9myZl)u6STYavLH`eO418FR0V|>!_ zprjI$-+B~r;0FE4&<9a8(%5 zcsfCP9VCvfrVa{m(Bq#57YA>kuX)zn|(F^5Ntg5@-0WZ zl!~~QeE0c*m4(vY4@5iSsfa6<{pY1tSNg2bV5+Wt^U~-=CQX(8qqGR_`vv39F&hJ@ zx%FS07!7o&yChEKT4Ac=i^;yNbxrqeBa?NhP)WfCST}QPsN^=jb@95fhieVmPzZUAJyR)yZUIb%;o4QW)vnw0ZyQDZ_)DMq2^Wm56-#Sjd24I z{i@VXs9Z1xiZxTaV3#w##Wi>$7b~4@F;YEfTx60N7|u|bj9A)`D2~83qdT6JSRXEb z9dRAm`e(Ox(YPX}kgk>!&}o6Omc>*}O{KQ9bgCmcz2Qa5<$=|L@F5nJga#+?W|cpg z`Jrt8@~*uFxHF>@`|_lK^EAa;#;olBNcu%So0>D-D^$GT86?XJa$v@+y8aIL89Q!O z)R`&MIAzJ^#mPA(P4Sr+-P{hx7K^P4+#g8>!gHNT?qCb4V^%v(>+uwQiG5y@vs~T) z@nPbWsrK3y@%9X--}Ol`EK8j;zz}8B0t>lQ%0np~(>XMqsUyE%{Ng9%S{B^7jo7%5 z5XTFlh|m3w3!^wng$3$!QNX1Iug61RcnlhTyBB9h>-d+&H>+W_bNzF!_ohOX$j>es zLKN4PnL=gqVd#nh{K+%s_DR{QetH%nhLuQA@g z6X`q2al~TFq`_f{^pc-h^V@Ixc9Nri!Ths3#dvty9S?r)50AQUAT-1bn1o{vSQ0mS zqe3=ucn!^1^e3)*aOOw}BU6TRLn_8|Jc-Up4I11-#zZlNLk#hPL4M5cZTGh{RDl(- ztkiQlPgU$2IE`6bnHxwi0N>yz=8iBZ&{i#iQ4Axvx6G|Q*m;%J1F?hq75f2)L(iWD zntyn1)Z?(w3Of(LoD;Jl79qb~f{et`jiZQ8BC+NfHuZ8j}~91lg9exK5LQHfkEe-%QB=0oZRgwkqvV= zhDLeFK9)ZE%_Q+aN#ZuJQQ{qcKmAI{ z-)jk)9}~6YT-QH>M{&JoS880(bqI}*b|PhGH64WUZ2A3Thy5Pn$eAcJ_JEK&nyV>u z9A*u%Rpy$+^6gh&+@CJ#w-h~SDSOyf_V!Wnwq{;5l}x1PW%2g3_k<)PD|Yd&+q;mT zl>XNm$o@&mL)fOPGPY(#4}^KbJlM$O&nvZ+?jzl7P!l64X+aVpf_jl6b0E_s@o=O@ z0(p(HCwtUKfONw8F#zLz@)OY?qwd93eUAqsk#Y2X;p;fMdCgAvN@r;=10f?2_Q+Fv zk*GI0)1e26LOe+R)gI&w>QCDnutY5bj=5SEyNm_bD^D=DSGDqj6eghS0Se%+IJS1# zQn9V~SWUDg>V;q8?|O@n57Z4bAKBDujCGvby?lkXq!Z~!xCn_iu|(ntYX9rW6MHC(U4kDTO2I6uJJLJ zosnBxFc@w;=*Hhm&}sh=l#IB#O`^A+H~<(t zg^!34UWyQ!G%Q{`vl-!R>LEp1zFhV)aCFb?l_UaswzR(2iQQ?z)JhrTVlZHaDwQy- zS^Byusw5459056<54=I;*)n@Ww2%43a{$5r, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 +# Cristian Othón Martínez Vera , 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 # msgid "" msgstr "" "Project-Id-Version: bfd 2.20.90\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" "POT-Creation-Date: 2010-11-05 11:31+0100\n" -"PO-Revision-Date: 2010-11-18 18:25-0600\n" -"Last-Translator: Cristian Othón Martínez Vera \n" +"PO-Revision-Date: 2011-08-24 11:47-0500\n" +"Last-Translator: Cristian Othón Martínez Vera \n" "Language-Team: Spanish \n" +"Language: es\n" "MIME-Version: 1.0\n" -"Content-Type: text/plain; charset=ISO-8859-1\n" +"Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" #: aout-adobe.c:127 msgid "%B: Unknown section type in a.out.adobe file: %x\n" -msgstr "%B: Tipo de sección desconocido en el fichero a.out.adobe: %x\n" +msgstr "%B: Tipo de sección desconocido en el fichero a.out.adobe: %x\n" #: aout-cris.c:199 #, c-format msgid "%s: Invalid relocation type exported: %d" -msgstr "%s: Se exportó un tipo de reubicación inválido: %d" +msgstr "%s: Se exportó un tipo de reubicación inválido: %d" #: aout-cris.c:242 msgid "%B: Invalid relocation type imported: %d" -msgstr "%B: Se importó un tipo de reubicación inválido: %d" +msgstr "%B: Se importó un tipo de reubicación inválido: %d" #: aout-cris.c:253 msgid "%B: Bad relocation record imported: %d" -msgstr "%B: Se importó un registro de reubicación erróneo: %d" +msgstr "%B: Se importó un registro de reubicación erróneo: %d" #: aoutx.h:1273 aoutx.h:1611 #, c-format msgid "%s: can not represent section `%s' in a.out object file format" -msgstr "%s: no se puede representar la sección `%s' en el formato de fichero objeto a.out" +msgstr "%s: no se puede representar la sección `%s' en el formato de fichero objeto a.out" #: aoutx.h:1577 #, c-format msgid "%s: can not represent section for symbol `%s' in a.out object file format" -msgstr "%s: no se puede representar la sección para el símbolo `%s' en el formato de fichero objeto a.out" +msgstr "%s: no se puede representar la sección para el símbolo `%s' en el formato de fichero objeto a.out" #: aoutx.h:1579 vms-alpha.c:7649 msgid "*unknown*" @@ -48,7 +49,7 @@ msgstr "*desconocido*" #: aoutx.h:4007 aoutx.h:4333 msgid "%P: %B: unexpected relocation type\n" -msgstr "%P: %B: tipo de reubicación inesperado\n" +msgstr "%P: %B: tipo de reubicación inesperado\n" #: aoutx.h:5364 #, c-format @@ -59,7 +60,7 @@ msgstr "%s: no se admite el enlace reubicable de %s a %s" msgid "Warning: writing archive was slow: rewriting timestamp\n" msgstr "Aviso: la escritura del fichero fue lenta: se reescribe la marca de tiempo\n" -# ¡Uff! Si utilizáramos file=archivo, esta traducción sería imposible. cfuga +# ¡Uff! Si utilizáramos file=archivo, esta traducción sería imposible. cfuga #: archive.c:2416 msgid "Reading archive file mod timestamp" msgstr "Se lee la marca de tiempo modificada del fichero en el archivo" @@ -78,19 +79,19 @@ msgstr "Error en la llamada al sistema" #: bfd.c:397 msgid "Invalid bfd target" -msgstr "Objetivo bfd inválido" +msgstr "Objetivo bfd inválido" #: bfd.c:398 msgid "File in wrong format" -msgstr "Fichero en formato erróneo" +msgstr "Fichero en formato erróneo" #: bfd.c:399 msgid "Archive object file in wrong format" -msgstr "Archivo de ficheros objeto en formato erróneo" +msgstr "Archivo de ficheros objeto en formato erróneo" #: bfd.c:400 msgid "Invalid operation" -msgstr "Operación inválida" +msgstr "Operación inválida" #: bfd.c:401 msgid "Memory exhausted" @@ -98,15 +99,15 @@ msgstr "Memoria agotada" #: bfd.c:402 msgid "No symbols" -msgstr "No hay símbolos" +msgstr "No hay símbolos" #: bfd.c:403 msgid "Archive has no index; run ranlib to add one" -msgstr "El archivo no tiene índice; ejecute ranlib para agregar uno" +msgstr "El archivo no tiene índice; ejecute ranlib para agregar uno" #: bfd.c:404 msgid "No more archived files" -msgstr "No hay más ficheros archivados" +msgstr "No hay más ficheros archivados" #: bfd.c:405 msgid "Malformed archive" @@ -122,19 +123,19 @@ msgstr "El formato del fichero es ambiguo" #: bfd.c:408 msgid "Section has no contents" -msgstr "La sección no tiene contenido" +msgstr "La sección no tiene contenido" #: bfd.c:409 msgid "Nonrepresentable section on output" -msgstr "Sección no representable en la salida" +msgstr "Sección no representable en la salida" #: bfd.c:410 msgid "Symbol needs debug section which does not exist" -msgstr "Un símbolo requiere de una sección de depuración, la cual no existe" +msgstr "Un símbolo requiere de una sección de depuración, la cual no existe" #: bfd.c:411 msgid "Bad value" -msgstr "Valor erróneo" +msgstr "Valor erróneo" #: bfd.c:412 msgid "File truncated" @@ -151,22 +152,22 @@ msgstr "Error al leer %s: %s" #: bfd.c:415 msgid "#" -msgstr "#" +msgstr "#" #: bfd.c:939 #, c-format msgid "BFD %s assertion fail %s:%d" -msgstr "falló la aseveración BFD %s %s:%d" +msgstr "falló la aseveración BFD %s %s:%d" #: bfd.c:951 #, c-format msgid "BFD %s internal error, aborting at %s line %d in %s\n" -msgstr "error interno de BFD %s, se aborta en %s línea %d en %s\n" +msgstr "error interno de BFD %s, se aborta en %s línea %d en %s\n" #: bfd.c:955 #, c-format msgid "BFD %s internal error, aborting at %s line %d\n" -msgstr "error interno de BFD %s, se aborta en %s línea %d\n" +msgstr "error interno de BFD %s, se aborta en %s línea %d\n" #: bfd.c:957 msgid "Please report this bug.\n" @@ -180,12 +181,12 @@ msgstr "no se mapea: datos=%lx mapeados%d\n" #: bfdwin.c:209 #, c-format msgid "not mapping: env var not set\n" -msgstr "no se mapea: no se estableció la variable de ambiente\n" +msgstr "no se mapea: no se estableció la variable de ambiente\n" #: binary.c:271 #, c-format msgid "Warning: Writing section `%s' to huge (ie negative) file offset 0x%lx." -msgstr "Aviso: Se escribe la sección `%s' a un desplazamiento de fichero grande (pe negativo) 0x%lx." +msgstr "Aviso: Se escribe la sección `%s' a un desplazamiento de fichero grande (pe negativo) 0x%lx." #: bout.c:1146 elf-m10300.c:2063 elf32-avr.c:1640 elf32-frv.c:5740 #: elfxx-sparc.c:2795 reloc.c:5646 reloc16.c:162 elf32-ia64.c:842 @@ -207,28 +208,28 @@ msgstr "" #: coff-alpha.c:648 msgid "%B: unknown/unsupported relocation type %d" -msgstr "%B: tipo de reubicación %d desconocida/no admitida" +msgstr "%B: tipo de reubicación %d desconocida/no admitida" #: coff-alpha.c:900 coff-alpha.c:937 coff-alpha.c:2025 coff-mips.c:1003 msgid "GP relative relocation used when GP not defined" -msgstr "se usó una reubicación relativa a GP cuando GP no estaba definido" +msgstr "se usó una reubicación relativa a GP cuando GP no estaba definido" #: coff-alpha.c:1502 msgid "using multiple gp values" -msgstr "se usan valores múltiples de gp" +msgstr "se usan valores múltiples de gp" #: coff-alpha.c:1561 msgid "%B: unsupported relocation: ALPHA_R_GPRELHIGH" -msgstr "%B: tipo de reubicación no admitida: ALPHA_R_GPRELHIGH" +msgstr "%B: tipo de reubicación no admitida: ALPHA_R_GPRELHIGH" #: coff-alpha.c:1568 msgid "%B: unsupported relocation: ALPHA_R_GPRELLOW" -msgstr "%B: tipo de reubicación no admitida: ALPHA_R_GPRELLOW" +msgstr "%B: tipo de reubicación no admitida: ALPHA_R_GPRELLOW" #: coff-alpha.c:1575 elf32-m32r.c:2493 elf64-alpha.c:3991 elf64-alpha.c:4140 #: elf32-ia64.c:4582 elf64-ia64.c:4582 msgid "%B: unknown relocation type %d" -msgstr "%B: tipo de reubicación %d desconocido" +msgstr "%B: tipo de reubicación %d desconocido" #: coff-arm.c:1038 #, c-format @@ -246,7 +247,7 @@ msgid "" "%B(%s): warning: interworking not enabled.\n" " first occurrence: %B: arm call to thumb" msgstr "" -"%B(%s): aviso: no se activó la interoperabilidad.\n" +"%B(%s): aviso: no se activó la interoperabilidad.\n" " primer suceso: %B: llamada arm a thumb" #: coff-arm.c:1459 @@ -256,42 +257,42 @@ msgid "" " first occurrence: %B: thumb call to arm\n" " consider relinking with --support-old-code enabled" msgstr "" -"%B(%s): aviso: no se activó la interoperabilidad.\n" +"%B(%s): aviso: no se activó la interoperabilidad.\n" " primer suceso: %B: llamada thumb a arm\n" " considere reenlazar con --support-old-code activado" #: coff-arm.c:1754 coff-tic80.c:695 cofflink.c:3043 msgid "%B: bad reloc address 0x%lx in section `%A'" -msgstr "%B: dirección de reubicación 0x%lx errónea en la sección `%A'" +msgstr "%B: dirección de reubicación 0x%lx errónea en la sección `%A'" #: coff-arm.c:2079 msgid "%B: illegal symbol index in reloc: %d" -msgstr "%B: índice de símbolos ilegal en la reubicación: %d" +msgstr "%B: índice de símbolos ilegal en la reubicación: %d" #: coff-arm.c:2210 #, c-format msgid "error: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d" -msgstr "error: %B está compilado para APCS-%d, mientras que %B está compilado para APCS-%d" +msgstr "error: %B está compilado para APCS-%d, mientras que %B está compilado para APCS-%d" #: coff-arm.c:2226 elf32-arm.c:14105 #, c-format msgid "error: %B passes floats in float registers, whereas %B passes them in integer registers" -msgstr "error: %B pasa números de coma flotante en registros de coma flotante, mientras que %B los pasa en registros enteros" +msgstr "error: %B pasa números de coma flotante en registros de coma flotante, mientras que %B los pasa en registros enteros" #: coff-arm.c:2229 elf32-arm.c:14109 #, c-format msgid "error: %B passes floats in integer registers, whereas %B passes them in float registers" -msgstr "error: %B pasa números de coma flotante en registros enteros, mientras que %B los pasa en registros de coma flotante" +msgstr "error: %B pasa números de coma flotante en registros enteros, mientras que %B los pasa en registros de coma flotante" #: coff-arm.c:2243 #, c-format msgid "error: %B is compiled as position independent code, whereas target %B is absolute position" -msgstr "error: %B está compilado como código independiente de posición, mientras que el objetivo %B es de posición absoluta" +msgstr "error: %B está compilado como código independiente de posición, mientras que el objetivo %B es de posición absoluta" #: coff-arm.c:2246 #, c-format msgid "error: %B is compiled as absolute position code, whereas target %B is position independent" -msgstr "error: %B está compilado como código de posición absoluta, mientras que el objetivo %B es independiente de posición" +msgstr "error: %B está compilado como código de posición absoluta, mientras que el objetivo %B es independiente de posición" #: coff-arm.c:2274 elf32-arm.c:14174 #, c-format @@ -301,7 +302,7 @@ msgstr "Aviso: %B admite interoperabilidad, mientras que %B no" #: coff-arm.c:2277 elf32-arm.c:14180 #, c-format msgid "Warning: %B does not support interworking, whereas %B does" -msgstr "Aviso: %B no admite interoperabilidad, mientras que %B sí" +msgstr "Aviso: %B no admite interoperabilidad, mientras que %B sí" #: coff-arm.c:2301 #, c-format @@ -311,27 +312,27 @@ msgstr "opciones privadas = %x:" #: coff-arm.c:2309 elf32-arm.c:10492 #, c-format msgid " [floats passed in float registers]" -msgstr "[números de coma flotante pasados en registros de coma flotante]" +msgstr "[números de coma flotante pasados en registros de coma flotante]" #: coff-arm.c:2311 #, c-format msgid " [floats passed in integer registers]" -msgstr "[números de coma flotante pasados en registros enteros]" +msgstr "[números de coma flotante pasados en registros enteros]" #: coff-arm.c:2314 elf32-arm.c:10495 #, c-format msgid " [position independent]" -msgstr "[independiente de posición]" +msgstr "[independiente de posición]" #: coff-arm.c:2316 #, c-format msgid " [absolute position]" -msgstr "[posición absoluta]" +msgstr "[posición absoluta]" #: coff-arm.c:2320 #, c-format msgid " [interworking flag not initialised]" -msgstr "[no se inicializó la opción de interoperabilidad]" +msgstr "[no se inicializó la opción de interoperabilidad]" #: coff-arm.c:2322 #, c-format @@ -346,87 +347,87 @@ msgstr "[no admite interoperabilidad]" #: coff-arm.c:2370 elf32-arm.c:9520 #, c-format msgid "Warning: Not setting interworking flag of %B since it has already been specified as non-interworking" -msgstr "Aviso: No se establece la opción de interoperabilidad de %B ya que se había especificado con anterioridad como no interoperable" +msgstr "Aviso: No se establece la opción de interoperabilidad de %B ya que se había especificado con anterioridad como no interoperable" #: coff-arm.c:2374 elf32-arm.c:9524 #, c-format msgid "Warning: Clearing the interworking flag of %B due to outside request" -msgstr "Aviso: Se limpia la opción de interoperabilidad de %B debido a una petición externa" +msgstr "Aviso: Se limpia la opción de interoperabilidad de %B debido a una petición externa" #: coff-h8300.c:1122 #, c-format msgid "cannot handle R_MEM_INDIRECT reloc when using %s output" -msgstr "no se puede manejar la reubicación R_MEM_INDIRECT cuando se utiliza la salida %s" +msgstr "no se puede manejar la reubicación R_MEM_INDIRECT cuando se utiliza la salida %s" #: coff-i860.c:147 #, c-format msgid "Relocation `%s' not yet implemented\n" -msgstr "La reubicación `%s' aún no está implementada\n" +msgstr "La reubicación `%s' aún no está implementada\n" #: coff-i860.c:605 coff-tic54x.c:398 coffcode.h:5147 msgid "%B: warning: illegal symbol index %ld in relocs" -msgstr "%B: aviso: índice de símbolos %ld ilegal en reubicaciones" +msgstr "%B: aviso: índice de símbolos %ld ilegal en reubicaciones" #: coff-i960.c:143 coff-i960.c:506 msgid "uncertain calling convention for non-COFF symbol" -msgstr "convención de llamada incierta para un símbolo que no es COFF" +msgstr "convención de llamada incierta para un símbolo que no es COFF" #: coff-m68k.c:506 elf32-bfin.c:5678 elf32-cr16.c:2897 elf32-m68k.c:4672 msgid "unsupported reloc type" -msgstr "no se admite el tipo de reubicación" +msgstr "no se admite el tipo de reubicación" #: coff-mips.c:688 elf32-mips.c:1014 elf32-score.c:430 elf32-score7.c:330 #: elf64-mips.c:2019 elfn32-mips.c:1832 msgid "GP relative relocation when _gp not defined" -msgstr "reubicación relativa a GP cuando _gp no está definido" +msgstr "reubicación relativa a GP cuando _gp no está definido" #: coff-or32.c:229 msgid "Unrecognized reloc" -msgstr "No se reconoce la reubicación" +msgstr "No se reconoce la reubicación" #: coff-rs6000.c:2794 #, c-format msgid "%s: unsupported relocation type 0x%02x" -msgstr "%s: no se admite el tipo de reubicación 0x%02x" +msgstr "%s: no se admite el tipo de reubicación 0x%02x" #: coff-rs6000.c:2887 #, c-format msgid "%s: TOC reloc at 0x%x to symbol `%s' with no TOC entry" -msgstr "%s: reubicación de TOC en 0x%x al símbolo `%s' sin entrada TOC" +msgstr "%s: reubicación de TOC en 0x%x al símbolo `%s' sin entrada TOC" #: coff-rs6000.c:3652 coff64-rs6000.c:2175 msgid "%B: symbol `%s' has unrecognized smclas %d" -msgstr "%B: el símbolo `%s' tiene smclas %d que no se reconoce" +msgstr "%B: el símbolo `%s' tiene smclas %d que no se reconoce" #: coff-tic4x.c:195 coff-tic54x.c:299 coff-tic80.c:458 #, c-format msgid "Unrecognized reloc type 0x%x" -msgstr "No se reconoce el tipo de reubicación 0x%x" +msgstr "No se reconoce el tipo de reubicación 0x%x" #: coff-tic4x.c:240 #, c-format msgid "%s: warning: illegal symbol index %ld in relocs" -msgstr "%s: aviso: índice de símbolos %ld ilegal en reubicaciones" +msgstr "%s: aviso: índice de símbolos %ld ilegal en reubicaciones" #: coff-w65.c:367 #, c-format msgid "ignoring reloc %s\n" -msgstr "se descarta la reubicación %s\n" +msgstr "se descarta la reubicación %s\n" #: coffcode.h:973 msgid "%B: warning: COMDAT symbol '%s' does not match section name '%s'" -msgstr "%B: aviso: el símbolo COMDAT '%s' no coincide con el nombre de sección '%s'" +msgstr "%B: aviso: el símbolo COMDAT '%s' no coincide con el nombre de sección '%s'" #. Generate a warning message rather using the 'unhandled' #. variable as this will allow some .sys files generate by #. other toolchains to be processed. See bugzilla issue 196. #: coffcode.h:1197 msgid "%B: Warning: Ignoring section flag IMAGE_SCN_MEM_NOT_PAGED in section %s" -msgstr "%B: Aviso: Se descarta la opción de sección IMAGE_SCN_MEM_NOT_PAGED en la sección %s" +msgstr "%B: Aviso: Se descarta la opción de sección IMAGE_SCN_MEM_NOT_PAGED en la sección %s" #: coffcode.h:1264 msgid "%B (%s): Section flag %s (0x%x) ignored" -msgstr "%B (%s): Se descarta la opción de sección %s (0x%x)" +msgstr "%B (%s): Se descarta la opción de sección %s (0x%x)" #: coffcode.h:2390 #, c-format @@ -435,7 +436,7 @@ msgstr "No se reconoce el id de objetivo COFF TI '0x%x'" #: coffcode.h:2704 msgid "%B: reloc against a non-existant symbol index: %ld" -msgstr "%B: reubicación contra un índice de símbolo que no existe: %ld" +msgstr "%B: reubicación contra un índice de símbolo que no existe: %ld" #: coffcode.h:3262 msgid "%B: too many sections (%d)" @@ -443,119 +444,119 @@ msgstr "%B: Demasiadas secciones (%d)" #: coffcode.h:3676 msgid "%B: section %s: string table overflow at offset %ld" -msgstr "%B: sección %s: desbordamiento de tabla de cadenas en el desplazamiento %ld" +msgstr "%B: sección %s: desbordamiento de tabla de cadenas en el desplazamiento %ld" #: coffcode.h:4481 msgid "%B: warning: line number table read failed" -msgstr "%B: aviso: falló la lectura de tabla de números de línea" +msgstr "%B: aviso: falló la lectura de tabla de números de línea" #: coffcode.h:4511 msgid "%B: warning: illegal symbol index %ld in line numbers" -msgstr "%B: aviso: índice de símbolos %ld ilegal en los números de línea" +msgstr "%B: aviso: índice de símbolos %ld ilegal en los números de línea" #: coffcode.h:4525 msgid "%B: warning: duplicate line number information for `%s'" -msgstr "%B: aviso: información de números de línea duplicada para `%s'" +msgstr "%B: aviso: información de números de línea duplicada para `%s'" #: coffcode.h:4916 msgid "%B: Unrecognized storage class %d for %s symbol `%s'" -msgstr "%B: No se reconoce la clase de almacenamiento %d para %s símbolo `%s'" +msgstr "%B: No se reconoce la clase de almacenamiento %d para %s símbolo `%s'" #: coffcode.h:5042 msgid "warning: %B: local symbol `%s' has no section" -msgstr "aviso: %B: el símbolo local `%s' no tiene sección" +msgstr "aviso: %B: el símbolo local `%s' no tiene sección" #: coffcode.h:5186 msgid "%B: illegal relocation type %d at address 0x%lx" -msgstr "%B: tipo de reubicación %d ilegal en la dirección 0x%lx" +msgstr "%B: tipo de reubicación %d ilegal en la dirección 0x%lx" #: coffgen.c:1573 msgid "%B: bad string table size %lu" -msgstr "%B: tamaño de tabla de cadenas %lu erróneo" +msgstr "%B: tamaño de tabla de cadenas %lu erróneo" #: cofflink.c:524 elflink.c:4339 msgid "Warning: type of symbol `%s' changed from %d to %d in %B" -msgstr "Aviso: el tipo del símbolo `%s' cambió de %d a %d en %B" +msgstr "Aviso: el tipo del símbolo `%s' cambió de %d a %d en %B" #: cofflink.c:2321 msgid "%B: relocs in section `%A', but it has no contents" -msgstr "%B: reubicaciones en la sección `%A', pero no tiene contenido" +msgstr "%B: reubicaciones en la sección `%A', pero no tiene contenido" #: cofflink.c:2652 coffswap.h:826 #, c-format msgid "%s: %s: reloc overflow: 0x%lx > 0xffff" -msgstr "%s: %s: desbordamiento de reubicación: 0x%lx > 0xffff" +msgstr "%s: %s: desbordamiento de reubicación: 0x%lx > 0xffff" #: cofflink.c:2661 coffswap.h:812 #, c-format msgid "%s: warning: %s: line number overflow: 0x%lx > 0xffff" -msgstr "%s: aviso: %s: desbordamiento de número de línea: 0x%lx > 0xffff" +msgstr "%s: aviso: %s: desbordamiento de número de línea: 0x%lx > 0xffff" #: cpu-arm.c:189 cpu-arm.c:200 msgid "error: %B is compiled for the EP9312, whereas %B is compiled for XScale" -msgstr "error: %B está compilado para el EP9312, mientras que %B está compilado para XScale" +msgstr "error: %B está compilado para el EP9312, mientras que %B está compilado para XScale" #: cpu-arm.c:333 #, c-format msgid "warning: unable to update contents of %s section in %s" -msgstr "aviso: no se puede actualizar el contenido de la sección %s en %s" +msgstr "aviso: no se puede actualizar el contenido de la sección %s en %s" #: dwarf2.c:490 #, c-format msgid "Dwarf Error: Can't find %s section." -msgstr "Error de Dwarf: No se puede encontrar la sección %s." +msgstr "Error de Dwarf: No se puede encontrar la sección %s." #: dwarf2.c:518 #, c-format msgid "Dwarf Error: Offset (%lu) greater than or equal to %s size (%lu)." -msgstr "Error de Dwarf: El desplazamiento (%lu) es mayor que o igual que el tamaño de %s (%lu)." +msgstr "Error de Dwarf: El desplazamiento (%lu) es mayor que o igual que el tamaño de %s (%lu)." #: dwarf2.c:940 #, c-format msgid "Dwarf Error: Invalid or unhandled FORM value: %u." -msgstr "Error de Dwarf: Valor de FORM sin manejar o inválido: %u." +msgstr "Error de Dwarf: Valor de FORM sin manejar o inválido: %u." #: dwarf2.c:1191 msgid "Dwarf Error: mangled line number section (bad file number)." -msgstr "Error de Dwarf: sección de números de línea revuelta (número de fichero erróneo)." +msgstr "Error de Dwarf: sección de números de línea revuelta (número de fichero erróneo)." #: dwarf2.c:1443 #, c-format msgid "Dwarf Error: Unhandled .debug_line version %d." -msgstr "Error de Dwarf: .debug_line versión %d sin manejar." +msgstr "Error de Dwarf: .debug_line versión %d sin manejar." #: dwarf2.c:1465 msgid "Dwarf Error: Invalid maximum operations per instruction." -msgstr "Error de Dwarf: Máximo de operaciones por instrucción inválido." +msgstr "Error de Dwarf: Máximo de operaciones por instrucción inválido." #: dwarf2.c:1652 msgid "Dwarf Error: mangled line number section." -msgstr "Error de Dwarf: sección de números de línea revuelta." +msgstr "Error de Dwarf: sección de números de línea revuelta." #: dwarf2.c:1978 dwarf2.c:2098 dwarf2.c:2382 #, c-format msgid "Dwarf Error: Could not find abbrev number %u." -msgstr "Error de Dwarf: No se puede encontrar el número de abreviatura %u." +msgstr "Error de Dwarf: No se puede encontrar el número de abreviatura %u." #: dwarf2.c:2343 #, c-format msgid "Dwarf Error: found dwarf version '%u', this reader only handles version 2, 3 and 4 information." -msgstr "Error de Dwarf: se encontró la versión de dwarf '%u', este lector solamente maneja información de las versiones 2, 3 y 4." +msgstr "Error de Dwarf: se encontró la versión de dwarf '%u', este lector solamente maneja información de las versiones 2, 3 y 4." #: dwarf2.c:2350 #, c-format msgid "Dwarf Error: found address size '%u', this reader can not handle sizes greater than '%u'." -msgstr "Error de Dwarf: se encontró el tamaño de dirección '%u', este lector no puede manejar tamaños más grandes que '%u'." +msgstr "Error de Dwarf: se encontró el tamaño de dirección '%u', este lector no puede manejar tamaños más grandes que '%u'." #: dwarf2.c:2373 #, c-format msgid "Dwarf Error: Bad abbrev number: %u." -msgstr "Error de Dwarf: Número de abreviación erróneo: %u." +msgstr "Error de Dwarf: Número de abreviación erróneo: %u." #: ecoff.c:1237 #, c-format msgid "Unknown basic type %d" -msgstr "Tipo básico %d desconocido" +msgstr "Tipo básico %d desconocido" #: ecoff.c:1494 #, c-format @@ -564,7 +565,7 @@ msgid "" " End+1 symbol: %ld" msgstr "" "\n" -" Símbolo final+1: %ld" +" Símbolo final+1: %ld" #: ecoff.c:1501 ecoff.c:1504 #, c-format @@ -573,7 +574,7 @@ msgid "" " First symbol: %ld" msgstr "" "\n" -" Primer símbolo: %ld" +" Primer símbolo: %ld" #: ecoff.c:1516 #, c-format @@ -582,7 +583,7 @@ msgid "" " End+1 symbol: %-7ld Type: %s" msgstr "" "\n" -" Símbolo final+1: %-7ld Tipo: %s" +" Símbolo final+1: %-7ld Tipo: %s" #: ecoff.c:1523 #, c-format @@ -591,7 +592,7 @@ msgid "" " Local symbol: %ld" msgstr "" "\n" -" Símbolo local: %ld" +" Símbolo local: %ld" #: ecoff.c:1531 #, c-format @@ -600,7 +601,7 @@ msgid "" " struct; End+1 symbol: %ld" msgstr "" "\n" -" struct; símbolo final+1: %ld" +" struct; símbolo final+1: %ld" #: ecoff.c:1536 #, c-format @@ -609,7 +610,7 @@ msgid "" " union; End+1 symbol: %ld" msgstr "" "\n" -" union; símbolo final+1: %ld" +" union; símbolo final+1: %ld" #: ecoff.c:1541 #, c-format @@ -618,7 +619,7 @@ msgid "" " enum; End+1 symbol: %ld" msgstr "" "\n" -" enum; símbolo final+1: %ld" +" enum; símbolo final+1: %ld" #: ecoff.c:1547 #, c-format @@ -631,7 +632,7 @@ msgstr "" #: elf-attrs.c:569 msgid "error: %B: Object has vendor-specific contents that must be processed by the '%s' toolchain" -msgstr "error: %B: El objeto tiene contenido específico del vendedor que se debe procesar con la cadena de compilación '%s'" +msgstr "error: %B: El objeto tiene contenido específico del vendedor que se debe procesar con la cadena de compilación '%s'" #: elf-attrs.c:578 msgid "error: %B: Object tag '%d, %s' is incompatible with tag '%d, %s'" @@ -639,15 +640,15 @@ msgstr "error: %B: La etiqueta de objeto '%d, %s' es incompatible con la etiquet #: elf-eh-frame.c:913 msgid "%P: error in %B(%A); no .eh_frame_hdr table will be created.\n" -msgstr "%P: error en %B(%A); no se creará la tabla .eh_frame_hdr.\n" +msgstr "%P: error en %B(%A); no se creará la tabla .eh_frame_hdr.\n" #: elf-eh-frame.c:1165 msgid "%P: fde encoding in %B(%A) prevents .eh_frame_hdr table being created.\n" -msgstr "%P: la codificación fde en %B(%A) previene la creación de la tabla .eh_frame_hdr.\n" +msgstr "%P: la codificación fde en %B(%A) previene la creación de la tabla .eh_frame_hdr.\n" #: elf-ifunc.c:179 msgid "%F%P: dynamic STT_GNU_IFUNC symbol `%s' with pointer equality in `%B' can not be used when making an executable; recompile with -fPIE and relink with -pie\n" -msgstr "%F%P: el símbolo STT_GNU_IFUNC dinámico `%s' con igualdad de puntero en `%B' no se puede usar al hacer un ejecutable; recompile con -fPIE y reenlace con -pie\n" +msgstr "%F%P: el símbolo STT_GNU_IFUNC dinámico `%s' con igualdad de puntero en `%B' no se puede usar al hacer un ejecutable; recompile con -fPIE y reenlace con -pie\n" #: elf-m10200.c:450 elf-m10300.c:1560 elf32-avr.c:1263 elf32-bfin.c:3193 #: elf32-cr16.c:1482 elf32-cr16c.c:780 elf32-cris.c:2077 elf32-crx.c:922 @@ -670,7 +671,7 @@ msgstr "error interno: error fuera de rango" #: elf32-spu.c:5046 elf32-v850.c:2147 elf32-xstormy16.c:945 elf64-mmix.c:1526 #: elfxx-mips.c:9186 msgid "internal error: unsupported relocation error" -msgstr "error interno: no se admite el error de reubicación" +msgstr "error interno: no se admite el error de reubicación" #: elf-m10200.c:458 elf32-cr16.c:1490 elf32-cr16c.c:788 elf32-crx.c:930 #: elf32-d10v.c:517 elf32-h8300.c:517 elf32-lm32.c:1176 elf32-m32r.c:3119 @@ -695,15 +696,15 @@ msgstr "error interno: error desconocido" #: elf32-xtensa.c:3067 elf64-ppc.c:13115 elf64-s390.c:2985 elf64-sh64.c:1636 #: elf64-x86-64.c:3719 elfxx-sparc.c:3806 msgid "%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'" -msgstr "%B(%A+0x%lx): reubicación %s sin resolución contra el símbolo `%s'" +msgstr "%B(%A+0x%lx): reubicación %s sin resolución contra el símbolo `%s'" #: elf-m10300.c:1569 msgid "error: inappropriate relocation type for shared library (did you forget -fpic?)" -msgstr "error: tipo de reubicación inapropiada para la biblioteca compartida (¿olvidó -fpic?)" +msgstr "error: tipo de reubicación inapropiada para la biblioteca compartida (¿olvidó -fpic?)" #: elf-m10300.c:1572 msgid "internal error: suspicious relocation type used in shared library" -msgstr "error interno: se usó un tipo de reubicación sospechosa en la biblioteca compartida" +msgstr "error interno: se usó un tipo de reubicación sospechosa en la biblioteca compartida" #: elf-m10300.c:4372 elf32-arm.c:11392 elf32-cr16.c:2451 elf32-cris.c:3044 #: elf32-hppa.c:1894 elf32-i370.c:503 elf32-i386.c:2036 elf32-lm32.c:1868 @@ -712,47 +713,47 @@ msgstr "error interno: se us #: elf64-sh64.c:3377 elf64-x86-64.c:1871 elfxx-sparc.c:2104 #, c-format msgid "dynamic variable `%s' is zero size" -msgstr "la variable dinámica `%s' es de tamaño cero" +msgstr "la variable dinámica `%s' es de tamaño cero" #: elf.c:334 msgid "%B: invalid string offset %u >= %lu for section `%s'" -msgstr "%B: desplazamiento de cadena inválido %u >= %lu para la sección `%s'" +msgstr "%B: desplazamiento de cadena inválido %u >= %lu para la sección `%s'" #: elf.c:446 msgid "%B symbol number %lu references nonexistent SHT_SYMTAB_SHNDX section" -msgstr "%B el número de símbolo %lu hace referencia a la sección inexistente SHT_SYMTAB_SHNDX" +msgstr "%B el número de símbolo %lu hace referencia a la sección inexistente SHT_SYMTAB_SHNDX" #: elf.c:602 msgid "%B: Corrupt size field in group section header: 0x%lx" -msgstr "%B: Campo de tamaño corrupto en el encabezado de la sección de grupo: 0x%lx" +msgstr "%B: Campo de tamaño corrupto en el encabezado de la sección de grupo: 0x%lx" #: elf.c:638 msgid "%B: invalid SHT_GROUP entry" -msgstr "%B: entrada SHT_GROUP inválida" +msgstr "%B: entrada SHT_GROUP inválida" #: elf.c:708 msgid "%B: no group info for section %A" -msgstr "%B: no hay información de grupo para la sección %A" +msgstr "%B: no hay información de grupo para la sección %A" #: elf.c:737 elf.c:3090 elflink.c:10062 msgid "%B: warning: sh_link not set for section `%A'" -msgstr "%B: aviso: no se estableció sh_link para la sección `%A'" +msgstr "%B: aviso: no se estableció sh_link para la sección `%A'" #: elf.c:756 msgid "%B: sh_link [%d] in section `%A' is incorrect" -msgstr "%B: sh_link [%d] en la sección `%A', es incorrecto" +msgstr "%B: sh_link [%d] en la sección `%A', es incorrecto" #: elf.c:791 msgid "%B: unknown [%d] section `%s' in group [%s]" -msgstr "%B: sección [%d] desconocida `%s' en el grupo [%s]" +msgstr "%B: sección [%d] desconocida `%s' en el grupo [%s]" #: elf.c:1041 msgid "%B: unable to initialize commpress status for section %s" -msgstr "%B: no se puede inicializar el estado comprimido de la sección %s" +msgstr "%B: no se puede inicializar el estado comprimido de la sección %s" #: elf.c:1050 msgid "%B: unable to initialize decommpress status for section %s" -msgstr "%B: no se puede inicializar el estado descomprimido de la sección %s" +msgstr "%B: no se puede inicializar el estado descomprimido de la sección %s" #: elf.c:1158 #, c-format @@ -770,7 +771,7 @@ msgid "" "Dynamic Section:\n" msgstr "" "\n" -"Sección Dinámica:\n" +"Sección Dinámica:\n" #: elf.c:1336 #, c-format @@ -779,7 +780,7 @@ msgid "" "Version definitions:\n" msgstr "" "\n" -"Definiciones de versión:\n" +"Definiciones de versión:\n" #: elf.c:1361 #, c-format @@ -788,7 +789,7 @@ msgid "" "Version References:\n" msgstr "" "\n" -"Referencias de versión:\n" +"Referencias de versión:\n" #: elf.c:1366 #, c-format @@ -797,40 +798,40 @@ msgstr " se requere desde %s:\n" #: elf.c:1773 msgid "%B: invalid link %lu for reloc section %s (index %u)" -msgstr "%B: enlace %lu inválido para la sección de reubicación %s (índice %u)" +msgstr "%B: enlace %lu inválido para la sección de reubicación %s (índice %u)" #: elf.c:1943 msgid "%B: don't know how to handle allocated, application specific section `%s' [0x%8x]" -msgstr "%B: no se sabe cómo manejar la sección específica alojada de la aplicación `%s' [0x%8x]" +msgstr "%B: no se sabe cómo manejar la sección específica alojada de la aplicación `%s' [0x%8x]" #: elf.c:1955 msgid "%B: don't know how to handle processor specific section `%s' [0x%8x]" -msgstr "%B: no se sabe cómo manejar la sección específica de procesador `%s' [0x%8x]" +msgstr "%B: no se sabe cómo manejar la sección específica de procesador `%s' [0x%8x]" #: elf.c:1966 msgid "%B: don't know how to handle OS specific section `%s' [0x%8x]" -msgstr "%B: no se sabe cómo manejar la sección específica de SO `%s' [0x%8x]" +msgstr "%B: no se sabe cómo manejar la sección específica de SO `%s' [0x%8x]" #: elf.c:1976 msgid "%B: don't know how to handle section `%s' [0x%8x]" -msgstr "%B: no se sabe cómo manejar la sección `%s' [0x%8x]" +msgstr "%B: no se sabe cómo manejar la sección `%s' [0x%8x]" #: elf.c:2603 #, c-format msgid "warning: section `%A' type changed to PROGBITS" -msgstr "aviso: el tipo de la sección `%A' cambió a PROGBITS" +msgstr "aviso: el tipo de la sección `%A' cambió a PROGBITS" #: elf.c:3047 msgid "%B: sh_link of section `%A' points to discarded section `%A' of `%B'" -msgstr "%B: sh_link de la sección `%A' apunta a la sección descartada `%A' de `%B'" +msgstr "%B: sh_link de la sección `%A' apunta a la sección descartada `%A' de `%B'" #: elf.c:3070 msgid "%B: sh_link of section `%A' points to removed section `%A' of `%B'" -msgstr "%B: sh_link de la sección `%A' apunta a la sección eliminada `%A' de `%B'" +msgstr "%B: sh_link de la sección `%A' apunta a la sección eliminada `%A' de `%B'" #: elf.c:4480 msgid "%B: The first section in the PT_DYNAMIC segment is not the .dynamic section" -msgstr "%B: La primera sección en el segmento PT_DYNAMIC no es la sección .dynamic" +msgstr "%B: La primera sección en el segmento PT_DYNAMIC no es la sección .dynamic" #: elf.c:4507 msgid "%B: Not enough room for program headers, try linking with -N" @@ -838,39 +839,39 @@ msgstr "%B: No hay suficiente espacio para los encabezados del programa, pruebe #: elf.c:4594 msgid "%B: section %A lma %#lx adjusted to %#lx" -msgstr "%B: la sección %A lma %#lx se ajusta a %#lx" +msgstr "%B: la sección %A lma %#lx se ajusta a %#lx" #: elf.c:4713 msgid "%B: section `%A' can't be allocated in segment %d" -msgstr "%B: la sección `%A' no se puede asignar en el segmento %d" +msgstr "%B: la sección `%A' no se puede asignar en el segmento %d" #: elf.c:4761 msgid "%B: warning: allocated section `%s' not in segment" -msgstr "%B: aviso: la sección asignada `%s' no está en el segmento" +msgstr "%B: aviso: la sección asignada `%s' no está en el segmento" #: elf.c:5257 msgid "%B: symbol `%s' required but not present" -msgstr "%B: se requiere el símbolo `%s' pero no está presente" +msgstr "%B: se requiere el símbolo `%s' pero no está presente" #: elf.c:5595 msgid "%B: warning: Empty loadable segment detected, is this intentional ?\n" -msgstr "%B: aviso: Se detectó un segmento cargable vacío, ¿ esto es intencional ?\n" +msgstr "%B: aviso: Se detectó un segmento cargable vacío, ¿ esto es intencional ?\n" #: elf.c:6622 #, c-format msgid "Unable to find equivalent output section for symbol '%s' from section '%s'" -msgstr "No se puede encontrar la sección de salida equivalente para el símbolo '%s' de la sección '%s'" +msgstr "No se puede encontrar la sección de salida equivalente para el símbolo '%s' de la sección '%s'" #: elf.c:7611 msgid "%B: unsupported relocation type %s" -msgstr "%B: no se admite el tipo de reubicación %s" +msgstr "%B: no se admite el tipo de reubicación %s" #: elf32-arm.c:3183 msgid "" "%B(%s): warning: interworking not enabled.\n" " first occurrence: %B: Thumb call to ARM" msgstr "" -"%B(%s): aviso: no se activó la interoperabilidad.\n" +"%B(%s): aviso: no se activó la interoperabilidad.\n" " primer suceso: %B: llamada Thumb a ARM" #: elf32-arm.c:3226 @@ -878,7 +879,7 @@ msgid "" "%B(%s): warning: interworking not enabled.\n" " first occurrence: %B: ARM call to Thumb" msgstr "" -"%B(%s): aviso: no se activó la interoperabilidad.\n" +"%B(%s): aviso: no se activó la interoperabilidad.\n" " primer suceso: %B: llamada ARM a Thumb" #: elf32-arm.c:3432 elf32-arm.c:4807 @@ -898,7 +899,7 @@ msgstr "no se puede encontrar el pegamento ARM '%s' para `%s'" #: elf32-arm.c:5485 msgid "%B: BE8 images only valid in big-endian mode." -msgstr "%B: las imágenes BE8 sólo son válidas en modo big-endian." +msgstr "%B: las imágenes BE8 sólo son válidas en modo big-endian." #. Give a warning, but do as the user requests anyway. #: elf32-arm.c:5715 @@ -912,47 +913,47 @@ msgstr "%B: no se puede encontrar la chapa de VFP11 `%s'" #: elf32-arm.c:6327 #, c-format msgid "Invalid TARGET2 relocation type '%s'." -msgstr "Tipo de reubicación TARGET2 '%s' inválido." +msgstr "Tipo de reubicación TARGET2 '%s' inválido." #: elf32-arm.c:6411 msgid "" "%B(%s): warning: interworking not enabled.\n" " first occurrence: %B: thumb call to arm" msgstr "" -"%s(%s): aviso: no se activó la interoperabilidad.\n" +"%s(%s): aviso: no se activó la interoperabilidad.\n" " primer suceso: %B: llamada thumb a arm" #: elf32-arm.c:7130 msgid "\\%B: Warning: Arm BLX instruction targets Arm function '%s'." -msgstr "\\%B: Aviso: La instrucción Arm BLX apunta a la función Arm '%s'." +msgstr "\\%B: Aviso: La instrucción Arm BLX apunta a la función Arm '%s'." #: elf32-arm.c:7541 msgid "%B: Warning: Thumb BLX instruction targets thumb function '%s'." -msgstr "%B: Aviso: La instrucción Thumb BLX apunta a la función thumb '%s'." +msgstr "%B: Aviso: La instrucción Thumb BLX apunta a la función thumb '%s'." #: elf32-arm.c:8223 msgid "%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object" -msgstr "%B(%A+0x%lx): la reubicación R_ARM_TLS_LE32 no se permite en objetos compartidos" +msgstr "%B(%A+0x%lx): la reubicación R_ARM_TLS_LE32 no se permite en objetos compartidos" #: elf32-arm.c:8438 msgid "%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations" -msgstr "%B(%A+0x%lx): Sólo se permiten las instrucciones ADD o SUB en las reubicaciones de grupo ALU" +msgstr "%B(%A+0x%lx): Sólo se permiten las instrucciones ADD o SUB en las reubicaciones de grupo ALU" #: elf32-arm.c:8478 elf32-arm.c:8565 elf32-arm.c:8648 elf32-arm.c:8733 msgid "%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s" -msgstr "%B(%A+0x%lx): Desborde al dividirse 0x%lx para la reubicación de grupo %s" +msgstr "%B(%A+0x%lx): Desborde al dividirse 0x%lx para la reubicación de grupo %s" #: elf32-arm.c:8963 elf32-sh.c:4112 elf64-sh64.c:1544 msgid "%B(%A+0x%lx): %s relocation against SEC_MERGE section" -msgstr "%B(%A+0x%lx): reubicación %s contra la sección SEC_MERGE" +msgstr "%B(%A+0x%lx): reubicación %s contra la sección SEC_MERGE" #: elf32-arm.c:9074 elf32-m68k.c:4191 elf32-xtensa.c:2805 elf64-ppc.c:11689 msgid "%B(%A+0x%lx): %s used with TLS symbol %s" -msgstr "%B(%A+0x%lx): se usó %s con el símbolo TLS %s" +msgstr "%B(%A+0x%lx): se usó %s con el símbolo TLS %s" #: elf32-arm.c:9075 elf32-m68k.c:4192 elf32-xtensa.c:2806 elf64-ppc.c:11690 msgid "%B(%A+0x%lx): %s used with non-TLS symbol %s" -msgstr "%B(%A+0x%lx): se usó %s con el símbolo %s que no es TLS" +msgstr "%B(%A+0x%lx): se usó %s con el símbolo %s que no es TLS" #: elf32-arm.c:9132 elf32-tic6x.c:1632 msgid "out of range" @@ -960,7 +961,7 @@ msgstr "fuera de rango" #: elf32-arm.c:9136 elf32-tic6x.c:1636 msgid "unsupported relocation" -msgstr "no se admite la reubicación" +msgstr "no se admite la reubicación" #: elf32-arm.c:9144 elf32-tic6x.c:1644 msgid "unknown error" @@ -968,7 +969,7 @@ msgstr "error desconocido" #: elf32-arm.c:9569 msgid "Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it" -msgstr "Aviso: Se limpia la opción de interoperación en %B porque se ha enlazado con él código no interoperable en %B" +msgstr "Aviso: Se limpia la opción de interoperación en %B porque se ha enlazado con él código no interoperable en %B" #: elf32-arm.c:9663 msgid "%B: Unknown mandatory EABI object attribute %d" @@ -996,7 +997,7 @@ msgstr "error: %B utiliza argumentos de registro VFP, mientras que %B no" #: elf32-arm.c:10112 msgid "error: %B: unable to merge virtualization attributes with %B" -msgstr "error: %B: no se pueden mezclar los atributos de virtualización con %B" +msgstr "error: %B: no se pueden mezclar los atributos de virtualización con %B" #: elf32-arm.c:10138 msgid "error: %B: Conflicting architecture profiles %c/%c" @@ -1004,7 +1005,7 @@ msgstr "error: %B: Perfiles de arquitecturas en conflicto %c/%c" #: elf32-arm.c:10239 msgid "Warning: %B: Conflicting platform configuration" -msgstr "Aviso: %B: Configuración de plataformas en conflicto" +msgstr "Aviso: %B: Configuración de plataformas en conflicto" #: elf32-arm.c:10248 msgid "error: %B: Conflicting use of R9" @@ -1091,12 +1092,12 @@ msgstr " [EABI Version1]" #: elf32-arm.c:10516 elf32-arm.c:10527 #, c-format msgid " [sorted symbol table]" -msgstr " [tabla de símbolos ordenados]" +msgstr " [tabla de símbolos ordenados]" #: elf32-arm.c:10518 elf32-arm.c:10529 #, c-format msgid " [unsorted symbol table]" -msgstr " [tabla de símbolos sin ordenar]" +msgstr " [tabla de símbolos sin ordenar]" #: elf32-arm.c:10524 #, c-format @@ -1106,12 +1107,12 @@ msgstr " [EABI Version2]" #: elf32-arm.c:10532 #, c-format msgid " [dynamic symbols use segment index]" -msgstr " [los símbolos dinámicos utilizan índices de segmento]" +msgstr " [los símbolos dinámicos utilizan índices de segmento]" #: elf32-arm.c:10535 #, c-format msgid " [mapping symbols precede others]" -msgstr " [el mapeo de símbolos precede a otros]" +msgstr " [el mapeo de símbolos precede a otros]" #: elf32-arm.c:10542 #, c-format @@ -1141,7 +1142,7 @@ msgstr " [LE8]" #: elf32-arm.c:10562 #, c-format msgid " " -msgstr " " +msgstr " " #: elf32-arm.c:10569 #, c-format @@ -1156,16 +1157,16 @@ msgstr " [tiene punto de entrada]" #: elf32-arm.c:10577 #, c-format msgid "" -msgstr "" +msgstr "" #: elf32-arm.c:10824 elf32-i386.c:1322 elf32-s390.c:1000 elf32-xtensa.c:1009 #: elf64-s390.c:960 elf64-x86-64.c:1105 elfxx-sparc.c:1370 msgid "%B: bad symbol index: %d" -msgstr "%B: índice de símbolos erróneo: %d" +msgstr "%B: índice de símbolos erróneo: %d" #: elf32-arm.c:10946 elf64-x86-64.c:1265 elf64-x86-64.c:1434 elfxx-mips.c:7942 msgid "%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC" -msgstr "%B: no se puede usar la reubicación %s contra `%s' cuando se hace un objeto compartido; recompile con -fPIC" +msgstr "%B: no se puede usar la reubicación %s contra `%s' cuando se hace un objeto compartido; recompile con -fPIC" #: elf32-arm.c:11948 #, c-format @@ -1174,29 +1175,29 @@ msgstr "Se encontraron errores al procesar el fichero %s" #: elf32-arm.c:13334 msgid "%B: error: Cortex-A8 erratum stub is allocated in unsafe location" -msgstr "%B: error: el cabo de errores Cortex-A8 se aloja en una ubicación insegura" +msgstr "%B: error: el cabo de errores Cortex-A8 se aloja en una ubicación insegura" #. There's not much we can do apart from complain if this #. happens. #: elf32-arm.c:13361 msgid "%B: error: Cortex-A8 erratum stub out of range (input file too large)" -msgstr "%B: error: el cabo de errores Cortex-A8 está fuera de rango (el fichero de entrada es demasiado grande)" +msgstr "%B: error: el cabo de errores Cortex-A8 está fuera de rango (el fichero de entrada es demasiado grande)" #: elf32-arm.c:13455 elf32-arm.c:13477 msgid "%B: error: VFP11 veneer out of range" -msgstr "%B: error: la chapa VFP11 está fuera de rango" +msgstr "%B: error: la chapa VFP11 está fuera de rango" #: elf32-arm.c:14002 msgid "error: %B is already in final BE8 format" -msgstr "error: %B ya está en el formato BE8 final" +msgstr "error: %B ya está en el formato BE8 final" #: elf32-arm.c:14078 msgid "error: Source object %B has EABI version %d, but target %B has EABI version %d" -msgstr "error: El objeto fuente %B tiene EABI versión %d, pero el objetivo %B tiene EABI versión %d" +msgstr "error: El objeto fuente %B tiene EABI versión %d, pero el objetivo %B tiene EABI versión %d" #: elf32-arm.c:14094 msgid "error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d" -msgstr "error: %B está compilado para APCS-%d mientras que el objetivo %B usa APCS-%d" +msgstr "error: %B está compilado para APCS-%d mientras que el objetivo %B usa APCS-%d" #: elf32-arm.c:14119 msgid "error: %B uses VFP instructions, whereas %B does not" @@ -1212,7 +1213,7 @@ msgstr "error: %B utiliza instrucciones Maverick, mientras que %B no" #: elf32-arm.c:14137 msgid "error: %B does not use Maverick instructions, whereas %B does" -msgstr "error: %B no utiliza instrucciones Maverick, mientras que %B sí" +msgstr "error: %B no utiliza instrucciones Maverick, mientras que %B sí" #: elf32-arm.c:14156 msgid "error: %B uses software FP, whereas %B uses hardware FP" @@ -1228,7 +1229,7 @@ msgstr "error: %B utiliza FP de hardware, mientras que %B utiliza FP de software #: elf32-mt.c:399 elf32-openrisc.c:412 elf32-v850.c:2151 elf32-xstormy16.c:949 #: elf64-mmix.c:1530 msgid "internal error: dangerous relocation" -msgstr "error interno: reubicación peligrosa" +msgstr "error interno: reubicación peligrosa" #: elf32-avr.c:2400 elf32-hppa.c:598 elf32-m68hc1x.c:166 elf64-ppc.c:4175 msgid "%B: cannot create stub entry %s" @@ -1236,37 +1237,37 @@ msgstr "%B: no se puede crear la entrada de cabo %s" #: elf32-bfin.c:1575 msgid "%B(%A+0x%lx): unresolvable relocation against symbol `%s'" -msgstr "%B(%A+0x%lx): reubicación sin resolución contra el símbolo `%s'" +msgstr "%B(%A+0x%lx): reubicación sin resolución contra el símbolo `%s'" #: elf32-bfin.c:1608 elf32-i386.c:4123 elf32-m68k.c:4233 elf32-s390.c:3062 #: elf64-s390.c:3037 elf64-x86-64.c:3759 msgid "%B(%A+0x%lx): reloc against `%s': error %d" -msgstr "%B(%A+0x%lx): reubicación contra `%s': error %d" +msgstr "%B(%A+0x%lx): reubicación contra `%s': error %d" #: elf32-bfin.c:2707 msgid "%B: relocation at `%A+0x%x' references symbol `%s' with nonzero addend" -msgstr "%B: la reubicación en `%A+0x%x' referencía al símbolo `%s' con adición que no es cero" +msgstr "%B: la reubicación en `%A+0x%x' referencía al símbolo `%s' con adición que no es cero" #: elf32-bfin.c:2721 elf32-frv.c:2901 msgid "relocation references symbol not defined in the module" -msgstr "la reubicación referencía un símbolo que no está definido en el módulo" +msgstr "la reubicación referencía un símbolo que no está definido en el módulo" #: elf32-bfin.c:2818 msgid "R_BFIN_FUNCDESC references dynamic symbol with nonzero addend" -msgstr "R_BFIN_FUNCDESC referencía un símbolo dinámico con adición que no es cero" +msgstr "R_BFIN_FUNCDESC referencía un símbolo dinámico con adición que no es cero" #: elf32-bfin.c:2859 elf32-bfin.c:2982 elf32-frv.c:3638 elf32-frv.c:3759 msgid "cannot emit fixups in read-only section" -msgstr "no se pueden emitir composturas en la sección de sólo lectura" +msgstr "no se pueden emitir composturas en la sección de sólo lectura" #: elf32-bfin.c:2890 elf32-bfin.c:3020 elf32-frv.c:3669 elf32-frv.c:3803 #: elf32-lm32.c:1103 elf32-sh.c:5021 msgid "cannot emit dynamic relocations in read-only section" -msgstr "no se pueden emitir reubicaciones dinámicas en la sección de sólo lectura" +msgstr "no se pueden emitir reubicaciones dinámicas en la sección de sólo lectura" #: elf32-bfin.c:2940 msgid "R_BFIN_FUNCDESC_VALUE references dynamic symbol with nonzero addend" -msgstr "R_BFIN_FUNCDESC_VALUE referencía un símbolo dinámico con adición que no es cero" +msgstr "R_BFIN_FUNCDESC_VALUE referencía un símbolo dinámico con adición que no es cero" #: elf32-bfin.c:3105 msgid "relocations between different segments are not supported" @@ -1274,11 +1275,11 @@ msgstr "no se admiten las reubicaciones entre segmentos diferentes" #: elf32-bfin.c:3106 msgid "warning: relocation references a different segment" -msgstr "aviso: la reubicación referencía un segmento diferente" +msgstr "aviso: la reubicación referencía un segmento diferente" #: elf32-bfin.c:4957 elf32-frv.c:6406 msgid "%B: unsupported relocation type %i" -msgstr "%B: no se admite el tipo de reubicación %i" +msgstr "%B: no se admite el tipo de reubicación %i" #: elf32-bfin.c:5111 elf32-frv.c:6814 #, c-format @@ -1292,45 +1293,45 @@ msgstr "%s: no se puede enlazar el fichero objeto fdpic en un ejecutable que no #: elf32-cris.c:1172 msgid "%B, section %A: unresolvable relocation %s against symbol `%s'" -msgstr "%B, sección %A: reubicación %s sin resolución contra el símbolo `%s'" +msgstr "%B, sección %A: reubicación %s sin resolución contra el símbolo `%s'" #: elf32-cris.c:1234 msgid "%B, section %A: No PLT nor GOT for relocation %s against symbol `%s'" -msgstr "%B, sección %A: No hay PLT ni GOT para la reubicación %s contra el símbolo `%s'" +msgstr "%B, sección %A: No hay PLT ni GOT para la reubicación %s contra el símbolo `%s'" #: elf32-cris.c:1236 msgid "%B, section %A: No PLT for relocation %s against symbol `%s'" -msgstr "%B, sección %A: No hay PLT para la reubicación %s contra el símbolo `%s'" +msgstr "%B, sección %A: No hay PLT para la reubicación %s contra el símbolo `%s'" #: elf32-cris.c:1242 elf32-cris.c:1375 elf32-cris.c:1635 elf32-cris.c:1718 #: elf32-cris.c:1871 msgid "[whose name is lost]" -msgstr "[cuyo nombre está perdido]" +msgstr "[cuyo nombre está perdido]" #: elf32-cris.c:1361 msgid "%B, section %A: relocation %s with non-zero addend %d against local symbol" -msgstr "%B, sección %A: reubicación %s con adición %d que no es cero contra el símbolo local" +msgstr "%B, sección %A: reubicación %s con adición %d que no es cero contra el símbolo local" #: elf32-cris.c:1369 elf32-cris.c:1712 elf32-cris.c:1865 msgid "%B, section %A: relocation %s with non-zero addend %d against symbol `%s'" -msgstr "%B, sección %A: reubicación %s con adición %d que no es cero contra el símbolo `%s'" +msgstr "%B, sección %A: reubicación %s con adición %d que no es cero contra el símbolo `%s'" #: elf32-cris.c:1395 msgid "%B, section %A: relocation %s is not allowed for global symbol: `%s'" -msgstr "%B, sección %A: no se permite la reubicación %s para el símbolo global: `%s'" +msgstr "%B, sección %A: no se permite la reubicación %s para el símbolo global: `%s'" #: elf32-cris.c:1411 msgid "%B, section %A: relocation %s with no GOT created" -msgstr "%B, sección %A: la reubicación %s sin GOT creado" +msgstr "%B, sección %A: la reubicación %s sin GOT creado" #. We shouldn't get here for GCC-emitted code. #: elf32-cris.c:1626 msgid "%B, section %A: relocation %s has an undefined reference to `%s', perhaps a declaration mixup?" -msgstr "%B, sección %A: la reubicación %s tiene una referencia sin definir a `%s', ¿tal vez una confusión en la declaración?" +msgstr "%B, sección %A: la reubicación %s tiene una referencia sin definir a `%s', ¿tal vez una confusión en la declaración?" #: elf32-cris.c:1998 msgid "%B, section %A: relocation %s is not allowed for symbol: `%s' which is defined outside the program, perhaps a declaration mixup?" -msgstr "%B, sección %A: no se permite la reubicación %s para el símbolo: `%s' el cual se define fuera del programa, ¿tal vez una confusión en la declaración?" +msgstr "%B, sección %A: no se permite la reubicación %s para el símbolo: `%s' el cual se define fuera del programa, ¿tal vez una confusión en la declaración?" #: elf32-cris.c:2051 msgid "(too many global variables for -fpic: recompile with -fPIC)" @@ -1345,41 +1346,41 @@ msgid "" "%B, section %A:\n" " v10/v32 compatible object %s must not contain a PIC relocation" msgstr "" -"%B, sección %A:\n" -" el objeto %s compatible con v10/v32 no debe contener una reubicación PIC" +"%B, sección %A:\n" +" el objeto %s compatible con v10/v32 no debe contener una reubicación PIC" #: elf32-cris.c:3353 msgid "" "%B, section %A:\n" " relocation %s not valid in a shared object; typically an option mixup, recompile with -fPIC" msgstr "" -"%B, sección %A:\n" -" la reubicación %s no es válida en un objeto compartido; es una confusión de opción típica, recompile con -fPIC" +"%B, sección %A:\n" +" la reubicación %s no es válida en un objeto compartido; es una confusión de opción típica, recompile con -fPIC" #: elf32-cris.c:3567 msgid "" "%B, section %A:\n" " relocation %s should not be used in a shared object; recompile with -fPIC" msgstr "" -"%B, sección %A:\n" -" la reubicación %s no se debe usar en un objeto compartido; recompile con -fPIC" +"%B, sección %A:\n" +" la reubicación %s no se debe usar en un objeto compartido; recompile con -fPIC" #: elf32-cris.c:3992 msgid "" "%B, section `%A', to symbol `%s':\n" " relocation %s should not be used in a shared object; recompile with -fPIC" msgstr "" -"%B, sección `%A', para el símbolo `%s':\n" -" la reubicación %s no se debe usar en un objeto compartido; recompile con -fPIC" +"%B, sección `%A', para el símbolo `%s':\n" +" la reubicación %s no se debe usar en un objeto compartido; recompile con -fPIC" #: elf32-cris.c:4111 msgid "Unexpected machine number" -msgstr "Número de máquina inesperado" +msgstr "Número de máquina inesperado" #: elf32-cris.c:4165 #, c-format msgid " [symbols have a _ prefix]" -msgstr " [los símbolos tiene un prefijo _]" +msgstr " [los símbolos tiene un prefijo _]" #: elf32-cris.c:4168 #, c-format @@ -1393,106 +1394,106 @@ msgstr " [v32]" #: elf32-cris.c:4216 msgid "%B: uses _-prefixed symbols, but writing file with non-prefixed symbols" -msgstr "%B: se usan símbolos con prefijo _, pero se escribe el fichero con símbolos sin prefijo" +msgstr "%B: se usan símbolos con prefijo _, pero se escribe el fichero con símbolos sin prefijo" #: elf32-cris.c:4217 msgid "%B: uses non-prefixed symbols, but writing file with _-prefixed symbols" -msgstr "%B: se usan símbolos sin prefijo, pero se escribe el fichero con símbolos con prefijo _" +msgstr "%B: se usan símbolos sin prefijo, pero se escribe el fichero con símbolos con prefijo _" #: elf32-cris.c:4236 msgid "%B contains CRIS v32 code, incompatible with previous objects" -msgstr "%B contiene código CRIS v32, incompatible con objetos previos" +msgstr "%B contiene código CRIS v32, incompatible con objetos previos" #: elf32-cris.c:4238 msgid "%B contains non-CRIS-v32 code, incompatible with previous objects" -msgstr "%B contiene código que no es CRIS v32, incompatible con objetos previos" +msgstr "%B contiene código que no es CRIS v32, incompatible con objetos previos" #: elf32-frv.c:1509 elf32-frv.c:1658 msgid "relocation requires zero addend" -msgstr "la reubicación requiere una adición cero" +msgstr "la reubicación requiere una adición cero" #: elf32-frv.c:2888 msgid "%B(%A+0x%x): relocation to `%s+%x' may have caused the error above" -msgstr "%B(%A+0x%x): la reubicación a `%s+%x' tal vez causó el error anterior" +msgstr "%B(%A+0x%x): la reubicación a `%s+%x' tal vez causó el error anterior" #: elf32-frv.c:2977 msgid "R_FRV_GETTLSOFF not applied to a call instruction" -msgstr "no se aplicó R_FRV_GETTLSOFF a una instrucción call" +msgstr "no se aplicó R_FRV_GETTLSOFF a una instrucción call" #: elf32-frv.c:3019 msgid "R_FRV_GOTTLSDESC12 not applied to an lddi instruction" -msgstr "no se aplicó R_FRV_GOTTLSDESC12 a una instrucción lddi" +msgstr "no se aplicó R_FRV_GOTTLSDESC12 a una instrucción lddi" #: elf32-frv.c:3090 msgid "R_FRV_GOTTLSDESCHI not applied to a sethi instruction" -msgstr "no se aplicó R_FRV_GOTTLSDESCHI a una instrucción sethi" +msgstr "no se aplicó R_FRV_GOTTLSDESCHI a una instrucción sethi" #: elf32-frv.c:3127 msgid "R_FRV_GOTTLSDESCLO not applied to a setlo or setlos instruction" -msgstr "no se aplicó R_FRV_GOTTLSDESCLO a una instrucción setlo o setlos" +msgstr "no se aplicó R_FRV_GOTTLSDESCLO a una instrucción setlo o setlos" #: elf32-frv.c:3175 msgid "R_FRV_TLSDESC_RELAX not applied to an ldd instruction" -msgstr "no se aplicó R_FRV_GOTTLSDESC_RELAX a una instrucción ldd" +msgstr "no se aplicó R_FRV_GOTTLSDESC_RELAX a una instrucción ldd" #: elf32-frv.c:3259 msgid "R_FRV_GETTLSOFF_RELAX not applied to a calll instruction" -msgstr "no se aplicó R_FRV_GETTLSOFF_RELAX a una instrucción calll" +msgstr "no se aplicó R_FRV_GETTLSOFF_RELAX a una instrucción calll" #: elf32-frv.c:3314 msgid "R_FRV_GOTTLSOFF12 not applied to an ldi instruction" -msgstr "no se aplicó R_FRV_GOTTLSOFF12 a una instrucción ldi" +msgstr "no se aplicó R_FRV_GOTTLSOFF12 a una instrucción ldi" #: elf32-frv.c:3344 msgid "R_FRV_GOTTLSOFFHI not applied to a sethi instruction" -msgstr "no se aplicó R_FRV_GOTTLSOFFHI a una instrucción sethi" +msgstr "no se aplicó R_FRV_GOTTLSOFFHI a una instrucción sethi" #: elf32-frv.c:3373 msgid "R_FRV_GOTTLSOFFLO not applied to a setlo or setlos instruction" -msgstr "no se aplicó R_FRV_GOTTLSOFFLO a una instrucción setlo o setlos" +msgstr "no se aplicó R_FRV_GOTTLSOFFLO a una instrucción setlo o setlos" #: elf32-frv.c:3404 msgid "R_FRV_TLSOFF_RELAX not applied to an ld instruction" -msgstr "no se aplicó R_FRV_TLSOFF_RELAX a una instrucción ld" +msgstr "no se aplicó R_FRV_TLSOFF_RELAX a una instrucción ld" #: elf32-frv.c:3449 msgid "R_FRV_TLSMOFFHI not applied to a sethi instruction" -msgstr "no se aplicó R_FRV_TLSMOFFHI a una instrucción sethi" +msgstr "no se aplicó R_FRV_TLSMOFFHI a una instrucción sethi" #: elf32-frv.c:3476 msgid "R_FRV_TLSMOFFLO not applied to a setlo or setlos instruction" -msgstr "no se aplicó R_FRV_TLSMOFFLO a una instrucción setlo o setlos" +msgstr "no se aplicó R_FRV_TLSMOFFLO a una instrucción setlo o setlos" #: elf32-frv.c:3597 msgid "R_FRV_FUNCDESC references dynamic symbol with nonzero addend" -msgstr "R_FRV_FUNCDESC referencía un símbolo dinámico con adición que no es cero" +msgstr "R_FRV_FUNCDESC referencía un símbolo dinámico con adición que no es cero" #: elf32-frv.c:3717 msgid "R_FRV_FUNCDESC_VALUE references dynamic symbol with nonzero addend" -msgstr "R_FRV_FUNCDESC_VALUE referencía un símbolo dinámico con adición que no es cero" +msgstr "R_FRV_FUNCDESC_VALUE referencía un símbolo dinámico con adición que no es cero" #: elf32-frv.c:3974 elf32-frv.c:4130 msgid "%B(%A+0x%lx): reloc against `%s': %s" -msgstr "%B(%A+0x%lx): reubicación contra `%s': %s" +msgstr "%B(%A+0x%lx): reubicación contra `%s': %s" #: elf32-frv.c:3976 elf32-frv.c:3980 msgid "relocation references a different segment" -msgstr "la reubicación referencía un segmento diferente" +msgstr "la reubicación referencía un segmento diferente" #: elf32-frv.c:6728 #, c-format msgid "%s: compiled with %s and linked with modules that use non-pic relocations" -msgstr "%s: compilado con %s y enlazado con módulos que usan reubicaciones que no son pic" +msgstr "%s: compilado con %s y enlazado con módulos que usan reubicaciones que no son pic" #: elf32-frv.c:6781 elf32-iq2000.c:845 elf32-m32c.c:807 #, c-format msgid "%s: compiled with %s and linked with modules compiled with %s" -msgstr "%s: compilado con %s y enlazado con módulos compilados con %s" +msgstr "%s: compilado con %s y enlazado con módulos compilados con %s" #: elf32-frv.c:6793 #, c-format msgid "%s: uses different unknown e_flags (0x%lx) fields than previous modules (0x%lx)" -msgstr "%s: usa campos e_flags desconocidos (0x%lx) diferentes a aquéllos de los módulos previos (0x%lx)" +msgstr "%s: usa campos e_flags desconocidos (0x%lx) diferentes a aquéllos de los módulos previos (0x%lx)" #: elf32-frv.c:6843 elf32-iq2000.c:882 elf32-m32c.c:843 elf32-mt.c:576 #: elf32-rx.c:2925 @@ -1502,7 +1503,7 @@ msgstr "opciones privadas = 0x%lx:" #: elf32-gen.c:69 elf64-gen.c:69 msgid "%B: Relocations in generic ELF (EM: %d)" -msgstr "%B: Reubicaciones en ELF genérico (EM: %d)" +msgstr "%B: Reubicaciones en ELF genérico (EM: %d)" #: elf32-hppa.c:850 elf32-hppa.c:3610 msgid "%B(%A+0x%lx): cannot reach %s, recompile with -ffunction-sections" @@ -1510,11 +1511,11 @@ msgstr "%B(%A+0x%lx): no se puede alcanzar %s, recompile con -ffuntion-sections" #: elf32-hppa.c:1284 msgid "%B: relocation %s can not be used when making a shared object; recompile with -fPIC" -msgstr "%B: no se puede usar la reubicación %s cuando se hace un objeto compartido; recompile con -fPIC" +msgstr "%B: no se puede usar la reubicación %s cuando se hace un objeto compartido; recompile con -fPIC" #: elf32-hppa.c:2803 msgid "%B: duplicate export stub %s" -msgstr "%B: cabo de exportación %s duplicado" +msgstr "%B: cabo de exportación %s duplicado" #: elf32-hppa.c:3449 msgid "%B(%A+0x%lx): %s fixup for insn 0x%x is not supported in a non-shared link" @@ -1526,64 +1527,64 @@ msgstr "%B(%A+0x%lx): no se puede manejar %s para %s" #: elf32-hppa.c:4608 msgid ".got section not immediately after .plt section" -msgstr "la sección .got no está inmediatamente después de la sección .plt" +msgstr "la sección .got no está inmediatamente después de la sección .plt" #. Unknown relocation. #: elf32-i386.c:371 elf32-m68k.c:383 elf32-ppc.c:1674 elf32-s390.c:379 #: elf32-tic6x.c:1563 elf64-ppc.c:2284 elf64-s390.c:403 elf64-x86-64.c:234 msgid "%B: invalid relocation type %d" -msgstr "%B: tipo de reubicación %d inválido" +msgstr "%B: tipo de reubicación %d inválido" #: elf32-i386.c:1265 elf64-x86-64.c:1049 msgid "%B: TLS transition from %s to %s against `%s' at 0x%lx in section `%A' failed" -msgstr "%B: falló la transición TLS de %s para %s contra `%s' en 0x%lx en la sección `%A'" +msgstr "%B: falló la transición TLS de %s para %s contra `%s' en 0x%lx en la sección `%A'" #: elf32-i386.c:1408 elf32-i386.c:3068 elf64-x86-64.c:1194 elf64-x86-64.c:2780 #: elfxx-sparc.c:3076 msgid "%B: relocation %s against STT_GNU_IFUNC symbol `%s' isn't handled by %s" -msgstr "%B: la reubicación %s contra el símbolo STT_GNU_IFUNC `%s' no es manejada por %s" +msgstr "%B: la reubicación %s contra el símbolo STT_GNU_IFUNC `%s' no es manejada por %s" #: elf32-i386.c:1570 elf32-s390.c:1182 elf32-sh.c:6367 elf32-xtensa.c:1182 #: elf64-s390.c:1151 elfxx-sparc.c:1547 msgid "%B: `%s' accessed both as normal and thread local symbol" -msgstr "%B: se accedió `%s' como un símbolo normal y un símbolo local de hilo" +msgstr "%B: se accedió `%s' como un símbolo normal y un símbolo local de hilo" #: elf32-i386.c:2910 msgid "%B: unrecognized relocation (0x%x) in section `%A'" -msgstr "%B: no se reconoce la dirección de reubicación (0x%lx) en la sección `%A'" +msgstr "%B: no se reconoce la dirección de reubicación (0x%lx) en la sección `%A'" #: elf32-i386.c:3317 elf64-x86-64.c:3174 msgid "hidden symbol" -msgstr "símbolo oculto" +msgstr "símbolo oculto" #: elf32-i386.c:3320 elf64-x86-64.c:3177 msgid "internal symbol" -msgstr "símbolo interno" +msgstr "símbolo interno" #: elf32-i386.c:3323 elf64-x86-64.c:3180 msgid "protected symbol" -msgstr "símbolo protegido" +msgstr "símbolo protegido" #: elf32-i386.c:3326 elf64-x86-64.c:3183 msgid "symbol" -msgstr "símbolo" +msgstr "símbolo" #: elf32-i386.c:3331 msgid "%B: relocation R_386_GOTOFF against undefined %s `%s' can not be used when making a shared object" -msgstr "%B: no se puede usar la reubicación R_386_GOTOFF contra %s indefinida `%s' cuando se hace un objeto compartido" +msgstr "%B: no se puede usar la reubicación R_386_GOTOFF contra %s indefinida `%s' cuando se hace un objeto compartido" #: elf32-i386.c:3341 msgid "%B: relocation R_386_GOTOFF against protected function `%s' can not be used when making a shared object" -msgstr "%B: no se puede usar la reubicación R_386_GOTOFF contra la función protegida `%s' cuando se hace un objeto compartido" +msgstr "%B: no se puede usar la reubicación R_386_GOTOFF contra la función protegida `%s' cuando se hace un objeto compartido" #: elf32-i386.c:4633 elf64-x86-64.c:4206 #, c-format msgid "discarded output section: `%A'" -msgstr "se descarta la sección de salida: `%A'" +msgstr "se descarta la sección de salida: `%A'" #: elf32-ip2k.c:857 elf32-ip2k.c:863 elf32-ip2k.c:930 elf32-ip2k.c:936 msgid "ip2k relaxer: switch table without complete matching relocation information." -msgstr "relajador ip2k: tabla switch sin información completa de reubicación de coincidencias." +msgstr "relajador ip2k: tabla switch sin información completa de reubicación de coincidencias." #: elf32-ip2k.c:880 elf32-ip2k.c:963 msgid "ip2k relaxer: switch table header corrupt." @@ -1592,30 +1593,30 @@ msgstr "relajador ip2k: encabezado de tabla switch corrupto." #: elf32-ip2k.c:1292 #, c-format msgid "ip2k linker: missing page instruction at 0x%08lx (dest = 0x%08lx)." -msgstr "enlazador ip2k: falta la instrucción de página en 0x%08lx (dest = 0x%08lx)." +msgstr "enlazador ip2k: falta la instrucción de página en 0x%08lx (dest = 0x%08lx)." #: elf32-ip2k.c:1308 #, c-format msgid "ip2k linker: redundant page instruction at 0x%08lx (dest = 0x%08lx)." -msgstr "enlazador ip2k: instrucción de página redundante en 0x%08lx (dest = 0x%08lx)." +msgstr "enlazador ip2k: instrucción de página redundante en 0x%08lx (dest = 0x%08lx)." #. Only if it's not an unresolved symbol. #: elf32-ip2k.c:1475 msgid "unsupported relocation between data/insn address spaces" -msgstr "no se admite la reubicación entre espacios de direcciones datos/insn" +msgstr "no se admite la reubicación entre espacios de direcciones datos/insn" #: elf32-iq2000.c:858 elf32-m32c.c:819 #, c-format msgid "%s: uses different e_flags (0x%lx) fields than previous modules (0x%lx)" -msgstr "%s: usa campos de e_flags diferentes (0x%lx) que los módulos previos (0x%lx)" +msgstr "%s: usa campos de e_flags diferentes (0x%lx) que los módulos previos (0x%lx)" #: elf32-lm32.c:706 msgid "global pointer relative relocation when _gp not defined" -msgstr "reubicación relativa al puntero global cuando _gp no está definido" +msgstr "reubicación relativa al puntero global cuando _gp no está definido" #: elf32-lm32.c:761 msgid "global pointer relative address out of range" -msgstr "dirección relativa al puntero global fuera de rango" +msgstr "dirección relativa al puntero global fuera de rango" #: elf32-lm32.c:1057 msgid "internal error: addend should be zero for R_LM32_16_GOT" @@ -1623,15 +1624,15 @@ msgstr "error interno: addend debe ser cero para R_LM32_16_GOT" #: elf32-m32r.c:1453 msgid "SDA relocation when _SDA_BASE_ not defined" -msgstr "reubicación SDA cuando _SDA_BASE_ no está definido" +msgstr "reubicación SDA cuando _SDA_BASE_ no está definido" #: elf32-m32r.c:3048 msgid "%B: The target (%s) of an %s relocation is in the wrong section (%A)" -msgstr "%B: El objetivo (%s) de una reubicación %s está en la sección errónea (%A)" +msgstr "%B: El objetivo (%s) de una reubicación %s está en la sección errónea (%A)" #: elf32-m32r.c:3576 msgid "%B: Instruction set mismatch with previous modules" -msgstr "%B: El conjunto de instrucciones no coincide con módulos previos" +msgstr "%B: El conjunto de instrucciones no coincide con módulos previos" #: elf32-m32r.c:3597 #, c-format @@ -1656,17 +1657,17 @@ msgstr ": instrucciones m32r2" #: elf32-m68hc1x.c:1050 #, c-format msgid "Reference to the far symbol `%s' using a wrong relocation may result in incorrect execution" -msgstr "El referenciar al símbolo far `%s' usando una reubicación incorrecta puede resultar en una ejecución incorrecta" +msgstr "El referenciar al símbolo far `%s' usando una reubicación incorrecta puede resultar en una ejecución incorrecta" #: elf32-m68hc1x.c:1073 #, c-format msgid "banked address [%lx:%04lx] (%lx) is not in the same bank as current banked address [%lx:%04lx] (%lx)" -msgstr "la dirección almacenada [%lx:%04lx] (%lx) no está en el mismo banco que la dirección almacenada actual [%lx:%04lx] (%lx)" +msgstr "la dirección almacenada [%lx:%04lx] (%lx) no está en el mismo banco que la dirección almacenada actual [%lx:%04lx] (%lx)" #: elf32-m68hc1x.c:1092 #, c-format msgid "reference to a banked address [%lx:%04lx] in the normal address space at %04lx" -msgstr "referencia a una dirección almacenada [%lx:%04lx] en el espacio normal de direcciones en %04lx" +msgstr "referencia a una dirección almacenada [%lx:%04lx] en el espacio normal de direcciones en %04lx" #: elf32-m68hc1x.c:1225 msgid "%B: linking files compiled for 16-bit integers (-mshort) and others for 32-bit integers" @@ -1682,7 +1683,7 @@ msgstr "%B: se enlazan ficheros compilados para HCS12, con otros compilados para #: elf32-m68hc1x.c:1257 elf32-ppc.c:4232 elf64-sparc.c:703 elfxx-mips.c:12704 msgid "%B: uses different e_flags (0x%lx) fields than previous modules (0x%lx)" -msgstr "%B: usa campos de e_flags diferentes (0x%lx) que los módulos previos (0x%lx)" +msgstr "%B: usa campos de e_flags diferentes (0x%lx) que los módulos previos (0x%lx)" #: elf32-m68hc1x.c:1285 #, c-format @@ -1735,27 +1736,27 @@ msgstr "desconocido" #: elf32-m68k.c:1714 msgid "%B: GOT overflow: Number of relocations with 8-bit offset > %d" -msgstr "%B: desbordamiento de GOT: Número de reubicaciones con desplazamiento de 8-bit > %d" +msgstr "%B: desbordamiento de GOT: Número de reubicaciones con desplazamiento de 8-bit > %d" #: elf32-m68k.c:1720 msgid "%B: GOT overflow: Number of relocations with 8- or 16-bit offset > %d" -msgstr "%B: desbordamiento de GOT: Número de reubicaciones con desplazamiento de 8 o 16-bit > %d" +msgstr "%B: desbordamiento de GOT: Número de reubicaciones con desplazamiento de 8 o 16-bit > %d" #: elf32-m68k.c:3959 msgid "%B(%A+0x%lx): R_68K_TLS_LE32 relocation not permitted in shared object" -msgstr "%B(%A+0x%lx): la reubicación R_68K_TLS_LE32 no se permite en objetos compartidos" +msgstr "%B(%A+0x%lx): la reubicación R_68K_TLS_LE32 no se permite en objetos compartidos" #: elf32-mcore.c:99 elf32-mcore.c:442 msgid "%B: Relocation %s (%d) is not currently supported.\n" -msgstr "%B: Actualmente no se admite la reubicación %s (%d).\n" +msgstr "%B: Actualmente no se admite la reubicación %s (%d).\n" #: elf32-mcore.c:428 msgid "%B: Unknown relocation type %d\n" -msgstr "%B: Tipo de reubicación %d desconocido\n" +msgstr "%B: Tipo de reubicación %d desconocido\n" #: elf32-mep.c:647 msgid "%B and %B are for different cores" -msgstr "%B y %B son para núcleos diferentes" +msgstr "%B y %B son para núcleos diferentes" #: elf32-mep.c:664 msgid "%B and %B are for different configurations" @@ -1769,68 +1770,68 @@ msgstr "opciones privadas = 0x%lx" #: elf32-microblaze.c:742 #, c-format msgid "%s: unknown relocation type %d" -msgstr "%s: tipo de reubicación %d desconocido" +msgstr "%s: tipo de reubicación %d desconocido" #: elf32-microblaze.c:867 elf32-microblaze.c:912 #, c-format msgid "%s: The target (%s) of an %s relocation is in the wrong section (%s)" -msgstr "%s: El objetivo (%s) de una reubicación %s está en la sección errónea (%s)" +msgstr "%s: El objetivo (%s) de una reubicación %s está en la sección errónea (%s)" #: elf32-microblaze.c:1155 elfxx-sparc.c:3450 msgid "%B: probably compiled without -fPIC?" -msgstr "%B: ¿Compilado probablemente sin -fPIC?" +msgstr "%B: ¿Compilado probablemente sin -fPIC?" #: elf32-microblaze.c:2074 elflink.c:12601 msgid "%B: bad relocation section name `%s'" -msgstr "%B: nombre de sección de reubicación `%s' erróneo" +msgstr "%B: nombre de sección de reubicación `%s' erróneo" #: elf32-mips.c:1045 elf64-mips.c:2084 elfn32-mips.c:1888 msgid "literal relocation occurs for an external symbol" -msgstr "la reubicación literal sucede para un símbolo externo" +msgstr "la reubicación literal sucede para un símbolo externo" #: elf32-mips.c:1085 elf32-score.c:569 elf32-score7.c:469 elf64-mips.c:2127 #: elfn32-mips.c:1929 msgid "32bits gp relative relocation occurs for an external symbol" -msgstr "la reubicación relativa a gp de 32bits sucede para un símbolo externo" +msgstr "la reubicación relativa a gp de 32bits sucede para un símbolo externo" #: elf32-ppc.c:1739 #, c-format msgid "generic linker can't handle %s" -msgstr "el enlazador genérico no puede manejar %s" +msgstr "el enlazador genérico no puede manejar %s" #: elf32-ppc.c:2180 msgid "corrupt %s section in %B" -msgstr "sección %s corrupta en %B" +msgstr "sección %s corrupta en %B" #: elf32-ppc.c:2199 msgid "unable to read in %s section from %B" -msgstr "no se puede leer en la sección %s desde %B" +msgstr "no se puede leer en la sección %s desde %B" #: elf32-ppc.c:2240 msgid "warning: unable to set size of %s section in %B" -msgstr "aviso: no se puede establecer el tamaño de la sección %s en %B" +msgstr "aviso: no se puede establecer el tamaño de la sección %s en %B" #: elf32-ppc.c:2290 msgid "failed to allocate space for new APUinfo section." -msgstr "no se puede reservar espacio para la nueva sección APUinfo." +msgstr "no se puede reservar espacio para la nueva sección APUinfo." #: elf32-ppc.c:2309 msgid "failed to compute new APUinfo section." -msgstr "no se puede calcular la nueva sección APUinfo." +msgstr "no se puede calcular la nueva sección APUinfo." #: elf32-ppc.c:2312 msgid "failed to install new APUinfo section." -msgstr "no se puede instalar la nueva sección APUinfo." +msgstr "no se puede instalar la nueva sección APUinfo." #: elf32-ppc.c:3358 msgid "%B: relocation %s cannot be used when making a shared object" -msgstr "%B: no se puede usar la reubicación %s cuando se hace un objeto compartido" +msgstr "%B: no se puede usar la reubicación %s cuando se hace un objeto compartido" #. It does not make sense to have a procedure linkage #. table entry for a local symbol. #: elf32-ppc.c:3702 msgid "%B(%A+0x%lx): %s reloc against local symbol" -msgstr "%B(%A+0x%lx): reubicación %s contra un símbolo local" +msgstr "%B(%A+0x%lx): reubicación %s contra un símbolo local" #: elf32-ppc.c:4044 elf32-ppc.c:4059 elfxx-mips.c:12411 elfxx-mips.c:12437 #: elfxx-mips.c:12459 elfxx-mips.c:12485 @@ -1839,11 +1840,11 @@ msgstr "Aviso: %B usa coma flotante hard, %B usa coma flotante soft" #: elf32-ppc.c:4047 elf32-ppc.c:4051 msgid "Warning: %B uses double-precision hard float, %B uses single-precision hard float" -msgstr "Aviso: %B usa coma flotante hard de doble precisión, %B usa coma flotante hard de precisión simple" +msgstr "Aviso: %B usa coma flotante hard de doble precisión, %B usa coma flotante hard de precisión simple" #: elf32-ppc.c:4055 msgid "Warning: %B uses soft float, %B uses single-precision hard float" -msgstr "Aviso: %B usa coma flotante soft, %B usa coma flotante hard de precisión simple" +msgstr "Aviso: %B usa coma flotante soft, %B usa coma flotante hard de precisión simple" #: elf32-ppc.c:4062 elf32-ppc.c:4066 elfxx-mips.c:12391 elfxx-mips.c:12395 msgid "Warning: %B uses unknown floating point ABI %d" @@ -1863,15 +1864,15 @@ msgstr "Aviso: %B usa r3/r4 para devoluciones de estructura small, %B usa memori #: elf32-ppc.c:4139 elf32-ppc.c:4143 msgid "Warning: %B uses unknown small structure return convention %d" -msgstr "Aviso: %B usa la convención de devolución de estructura small %d" +msgstr "Aviso: %B usa la convención de devolución de estructura small %d" #: elf32-ppc.c:4197 msgid "%B: compiled with -mrelocatable and linked with modules compiled normally" -msgstr "%B: compilado con -mrelocatable y enlazado con módulos compilados de forma normal" +msgstr "%B: compilado con -mrelocatable y enlazado con módulos compilados de forma normal" #: elf32-ppc.c:4205 msgid "%B: compiled normally and linked with modules compiled with -mrelocatable" -msgstr "%B: compilado de forma normal y enlazado con módulos compilados con -mrelocatable" +msgstr "%B: compilado de forma normal y enlazado con módulos compilados con -mrelocatable" #: elf32-ppc.c:4293 msgid "Using bss-plt due to %B" @@ -1879,48 +1880,48 @@ msgstr "Se usa bss-plt debido a %B" #: elf32-ppc.c:7192 elf64-ppc.c:12307 msgid "%B: unknown relocation type %d for symbol %s" -msgstr "%B: tipo de reubicación %d desconocido para el símbolo %s" +msgstr "%B: tipo de reubicación %d desconocido para el símbolo %s" #: elf32-ppc.c:7453 msgid "%B(%A+0x%lx): non-zero addend on %s reloc against `%s'" -msgstr "%B(%A+0x%lx): adición que no es cero en la reubicación %s contra `%s'" +msgstr "%B(%A+0x%lx): adición que no es cero en la reubicación %s contra `%s'" #: elf32-ppc.c:7651 elf64-ppc.c:12812 msgid "%B(%A+0x%lx): relocation %s for indirect function %s unsupported" -msgstr "%B(%A+0x%lx): no se admite la reubicación %s para la función indirecta %s" +msgstr "%B(%A+0x%lx): no se admite la reubicación %s para la función indirecta %s" #: elf32-ppc.c:7881 elf32-ppc.c:7911 elf32-ppc.c:7958 msgid "%B: the target (%s) of a %s relocation is in the wrong output section (%s)" -msgstr "%B: el objetivo (%s) de una reubicación %s está en la sección de salida errónea (%s)" +msgstr "%B: el objetivo (%s) de una reubicación %s está en la sección de salida errónea (%s)" #: elf32-ppc.c:8030 msgid "%B: relocation %s is not yet supported for symbol %s." -msgstr "%B: la reubicación %s aún no se admite para el símbolo %s." +msgstr "%B: la reubicación %s aún no se admite para el símbolo %s." #: elf32-ppc.c:8138 elf64-ppc.c:13162 msgid "%B(%A+0x%lx): %s reloc against `%s': error %d" -msgstr "%B(%A+0x%lx): reubicación %s contra `%s': error %d" +msgstr "%B(%A+0x%lx): reubicación %s contra `%s': error %d" #: elf32-ppc.c:8629 #, c-format msgid "%s not defined in linker created %s" -msgstr "no se definió %s en el %s creado por el enlazador" +msgstr "no se definió %s en el %s creado por el enlazador" #: elf32-rx.c:544 msgid "%B:%A: Warning: deprecated Red Hat reloc " -msgstr "%B:%A: Aviso: reubicación Red Hat obsoleta" +msgstr "%B:%A: Aviso: reubicación Red Hat obsoleta" #: elf32-rx.c:1086 msgid "Warning: RX_SYM reloc with an unknown symbol" -msgstr "Aviso: reubicación RX_SYM con un símbolo desconocido" +msgstr "Aviso: reubicación RX_SYM con un símbolo desconocido" #: elf32-rx.c:1251 msgid "%B(%A): error: call to undefined function '%s'" -msgstr "%B(%A): error: llamada a la función sin definir '%s'" +msgstr "%B(%A): error: llamada a la función sin definir '%s'" #: elf32-rx.c:1265 msgid "%B(%A): warning: unaligned access to symbol '%s' in the small data area" -msgstr "%B(%A): aviso: acceso sin alinear al símbolo '%s' en el área de datos small" +msgstr "%B(%A): aviso: acceso sin alinear al símbolo '%s' en el área de datos small" #: elf32-rx.c:1269 msgid "%B(%A): internal error: out of range error" @@ -1928,11 +1929,11 @@ msgstr "%B(%A): error interno: error fuera de rango" #: elf32-rx.c:1273 msgid "%B(%A): internal error: unsupported relocation error" -msgstr "%B(%A): error interno: no se admite el error de reubicación" +msgstr "%B(%A): error interno: no se admite el error de reubicación" #: elf32-rx.c:1277 msgid "%B(%A): internal error: dangerous relocation" -msgstr "%B(%A): error interno: reubicación peligrosa" +msgstr "%B(%A): error interno: reubicación peligrosa" #: elf32-rx.c:1281 msgid "%B(%A): internal error: unknown error" @@ -1950,7 +1951,7 @@ msgstr " [dsp]" #: elf32-s390.c:2209 elf64-s390.c:2196 msgid "%B(%A+0x%lx): invalid instruction for TLS relocation %s" -msgstr "%B(%A+0x%lx): instrucción inválida para la reubicación TLS %s" +msgstr "%B(%A+0x%lx): instrucción inválida para la reubicación TLS %s" #: elf32-score.c:1522 elf32-score7.c:1382 elfxx-mips.c:3323 msgid "not enough GOT space for local GOT entries" @@ -1958,16 +1959,16 @@ msgstr "no hay suficiente espacio GOT para entradas GOT locales" #: elf32-score.c:2744 msgid "address not word align" -msgstr "la dirección no está alineada a word" +msgstr "la dirección no está alineada a word" #: elf32-score.c:2829 elf32-score7.c:2634 #, c-format msgid "%s: Malformed reloc detected for section %s" -msgstr "%s: Se detectó una reubicación malformada para la sección %s" +msgstr "%s: Se detectó una reubicación malformada para la sección %s" #: elf32-score.c:2880 elf32-score7.c:2685 msgid "%B: CALL15 reloc at 0x%lx not against global symbol" -msgstr "%B: la reubicación CALL15 en 0x%lx no es contra un símbolo global" +msgstr "%B: la reubicación CALL15 en 0x%lx no es contra un símbolo global" #: elf32-score.c:3999 elf32-score7.c:3806 #, c-format @@ -1993,93 +1994,93 @@ msgstr "%B: No se reconoce la orden .directive: %s" #: elf32-sh-symbian.c:503 msgid "%B: Failed to add renamed symbol %s" -msgstr "%B: Falló al agregar el símbolo renombrado %s" +msgstr "%B: Falló al agregar el símbolo renombrado %s" #: elf32-sh.c:568 msgid "%B: 0x%lx: warning: bad R_SH_USES offset" -msgstr "%B: 0x%lx: aviso: desplazamiento R_SH_USES erróneo" +msgstr "%B: 0x%lx: aviso: desplazamiento R_SH_USES erróneo" #: elf32-sh.c:580 msgid "%B: 0x%lx: warning: R_SH_USES points to unrecognized insn 0x%x" -msgstr "%B: 0x%lx: aviso: R_SH_USES señala al insn 0x%x que no se reconoce" +msgstr "%B: 0x%lx: aviso: R_SH_USES señala al insn 0x%x que no se reconoce" #: elf32-sh.c:597 msgid "%B: 0x%lx: warning: bad R_SH_USES load offset" -msgstr "%B: 0x%lx: aviso: desplazamiento de carga R_SH_USES erróneo" +msgstr "%B: 0x%lx: aviso: desplazamiento de carga R_SH_USES erróneo" #: elf32-sh.c:612 msgid "%B: 0x%lx: warning: could not find expected reloc" -msgstr "%B: 0x%lx: aviso: no se puede encontrar la reubicación esperada" +msgstr "%B: 0x%lx: aviso: no se puede encontrar la reubicación esperada" #: elf32-sh.c:640 msgid "%B: 0x%lx: warning: symbol in unexpected section" -msgstr "%B: 0x%lx: aviso: símbolo en una sección inesperada" +msgstr "%B: 0x%lx: aviso: símbolo en una sección inesperada" #: elf32-sh.c:766 msgid "%B: 0x%lx: warning: could not find expected COUNT reloc" -msgstr "%B: 0x%lx: aviso: no se puede encontrar la reubicación COUNT esperada" +msgstr "%B: 0x%lx: aviso: no se puede encontrar la reubicación COUNT esperada" #: elf32-sh.c:775 msgid "%B: 0x%lx: warning: bad count" -msgstr "%B: 0x%lx: aviso: cuenta errónea" +msgstr "%B: 0x%lx: aviso: cuenta errónea" #: elf32-sh.c:1179 elf32-sh.c:1549 msgid "%B: 0x%lx: fatal: reloc overflow while relaxing" -msgstr "%B: 0x%lx: fatal: desbordamiento de reubicación durante la relajación" +msgstr "%B: 0x%lx: fatal: desbordamiento de reubicación durante la relajación" #: elf32-sh.c:4057 elf64-sh64.c:1514 msgid "Unexpected STO_SH5_ISA32 on local symbol is not handled" -msgstr "No se maneja un STO_SH5_ISA32 inesperado en un símbolo local" +msgstr "No se maneja un STO_SH5_ISA32 inesperado en un símbolo local" #: elf32-sh.c:4304 msgid "%B: 0x%lx: fatal: unaligned branch target for relax-support relocation" -msgstr "%B: 0x%lx: fatal: objetivo de ramificación sin alineación para la reubicación de soporte de relajamiento" +msgstr "%B: 0x%lx: fatal: objetivo de ramificación sin alineación para la reubicación de soporte de relajamiento" #: elf32-sh.c:4337 elf32-sh.c:4352 msgid "%B: 0x%lx: fatal: unaligned %s relocation 0x%lx" -msgstr "%B: 0x%lx: fatal: reubicación %s sin alineación 0x%lx" +msgstr "%B: 0x%lx: fatal: reubicación %s sin alineación 0x%lx" #: elf32-sh.c:4366 msgid "%B: 0x%lx: fatal: R_SH_PSHA relocation %d not in range -32..32" -msgstr "%B: 0x%lx: fatal: la reubicación R_SH_PSHA %d no está en el rango -32..32" +msgstr "%B: 0x%lx: fatal: la reubicación R_SH_PSHA %d no está en el rango -32..32" #: elf32-sh.c:4380 msgid "%B: 0x%lx: fatal: R_SH_PSHL relocation %d not in range -32..32" -msgstr "%B: 0x%lx: fatal: la reubicación R_SH_PSHL %d no está en el rango -32..32" +msgstr "%B: 0x%lx: fatal: la reubicación R_SH_PSHL %d no está en el rango -32..32" #: elf32-sh.c:4524 elf32-sh.c:4994 msgid "%B(%A+0x%lx): cannot emit fixup to `%s' in read-only section" -msgstr "%B(%A+0x%lx): no se pueden emitir composturas para `%s' en la sección de sólo lectura" +msgstr "%B(%A+0x%lx): no se pueden emitir composturas para `%s' en la sección de sólo lectura" #: elf32-sh.c:5101 msgid "%B(%A+0x%lx): %s relocation against external symbol \"%s\"" -msgstr "%B(%A+0x%lx): reubicación %s contra el símbolo externo \"%s\"" +msgstr "%B(%A+0x%lx): reubicación %s contra el símbolo externo \"%s\"" #: elf32-sh.c:5574 #, c-format msgid "%X%C: relocation to \"%s\" references a different segment\n" -msgstr "%X%C: la reubicación de \"%s\" referencía un segmento diferente\n" +msgstr "%X%C: la reubicación de \"%s\" referencía un segmento diferente\n" #: elf32-sh.c:5580 #, c-format msgid "%C: warning: relocation to \"%s\" references a different segment\n" -msgstr "%C: aviso: la reubicación de \"%s\" referencía un segmento diferente\n" +msgstr "%C: aviso: la reubicación de \"%s\" referencía un segmento diferente\n" #: elf32-sh.c:6358 elf32-sh.c:6441 msgid "%B: `%s' accessed both as normal and FDPIC symbol" -msgstr "%B: se accedió `%s' como un símbolo normal y un símbolo FDPIC" +msgstr "%B: se accedió `%s' como un símbolo normal y un símbolo FDPIC" #: elf32-sh.c:6363 elf32-sh.c:6445 msgid "%B: `%s' accessed both as FDPIC and thread local symbol" -msgstr "%B: se accedió `%s' como un símbolo FDPIC y un símbolo local de hilo" +msgstr "%B: se accedió `%s' como un símbolo FDPIC y un símbolo local de hilo" #: elf32-sh.c:6393 msgid "%B: Function descriptor relocation with non-zero addend" -msgstr "%B: Reubicación de descriptor de función con adición que no es cero" +msgstr "%B: Reubicación de descriptor de función con adición que no es cero" #: elf32-sh.c:6629 elf64-alpha.c:4560 msgid "%B: TLS local exec code cannot be linked into shared objects" -msgstr "%B: el código de ejecución local TLS no se puede enlazar en objetos compartidos" +msgstr "%B: el código de ejecución local TLS no se puede enlazar en objetos compartidos" #: elf32-sh64.c:223 elf64-sh64.c:2314 #, c-format @@ -2094,20 +2095,20 @@ msgstr "%s: compilado como un objeto de 64-bit y %s es de 32-bit" #: elf32-sh64.c:228 elf64-sh64.c:2319 #, c-format msgid "%s: object size does not match that of target %s" -msgstr "%s: el tamaño del objeto no coincide con el tamaño del objetivo %s" +msgstr "%s: el tamaño del objeto no coincide con el tamaño del objetivo %s" #: elf32-sh64.c:451 elf64-sh64.c:2833 #, c-format msgid "%s: encountered datalabel symbol in input" -msgstr "%s: se encontró un símbolo datalabel en la entrada" +msgstr "%s: se encontró un símbolo datalabel en la entrada" #: elf32-sh64.c:528 msgid "PTB mismatch: a SHmedia address (bit 0 == 1)" -msgstr "No coincide PTB: una dirección SHmedia (bit 0 == 1)" +msgstr "No coincide PTB: una dirección SHmedia (bit 0 == 1)" #: elf32-sh64.c:531 msgid "PTA mismatch: a SHcompact address (bit 0 == 0)" -msgstr "No coincide PTA: una dirección SHcompact (bit 0 == 0)" +msgstr "No coincide PTA: una dirección SHcompact (bit 0 == 0)" #: elf32-sh64.c:549 #, c-format @@ -2116,7 +2117,7 @@ msgstr "%s: error de GAS: insn PTB inesperada con R_SH_PT_16" #: elf32-sh64.c:598 msgid "%B: error: unaligned relocation type %d at %08x reloc %p\n" -msgstr "%B: error: tipo de reubicación %d sin alinear en %08x reubicación %p\n" +msgstr "%B: error: tipo de reubicación %d sin alinear en %08x reubicación %p\n" #: elf32-sh64.c:674 #, c-format @@ -2138,27 +2139,27 @@ msgstr "%B: se enlazan ficheros little endian con ficheros big endian" #: elf32-spu.c:719 msgid "%X%P: overlay section %A does not start on a cache line.\n" -msgstr "%X%P: la sección de sobreescritura %A no inicia en una línea de caché.\n" +msgstr "%X%P: la sección de sobreescritura %A no inicia en una línea de caché.\n" #: elf32-spu.c:727 msgid "%X%P: overlay section %A is larger than a cache line.\n" -msgstr "%X%P: la sección de sobreescritura %A es más grande que una línea de caché.\n" +msgstr "%X%P: la sección de sobreescritura %A es más grande que una línea de caché.\n" #: elf32-spu.c:747 msgid "%X%P: overlay section %A is not in cache area.\n" -msgstr "%X%P: la sección de sobreescritura %A no está en el área de caché.\n" +msgstr "%X%P: la sección de sobreescritura %A no está en el área de caché.\n" #: elf32-spu.c:787 msgid "%X%P: overlay sections %A and %A do not start at the same address.\n" -msgstr "%X%P: las secciones de sobreescritura %A y %A no inician en la misma dirección.\n" +msgstr "%X%P: las secciones de sobreescritura %A y %A no inician en la misma dirección.\n" #: elf32-spu.c:1011 msgid "warning: call to non-function symbol %s defined in %B" -msgstr "aviso: se llama al símbolo %s que no es función, definido en %B" +msgstr "aviso: se llama al símbolo %s que no es función, definido en %B" #: elf32-spu.c:1361 msgid "%A:0x%v lrlive .brinfo (%u) differs from analysis (%u)\n" -msgstr "%A:0x%v lrlive .brinfo (%u) difiere del análisis (%u)\n" +msgstr "%A:0x%v lrlive .brinfo (%u) difiere del análisis (%u)\n" #: elf32-spu.c:1880 msgid "%B is not allowed to define %s" @@ -2167,20 +2168,20 @@ msgstr "%B no tiene permitido definir %s" #: elf32-spu.c:1888 #, c-format msgid "you are not allowed to define %s in a script" -msgstr "no se le permite definir %s en un guión" +msgstr "no se le permite definir %s en un guión" #: elf32-spu.c:1922 #, c-format msgid "%s in overlay section" -msgstr "%s en la sección de sobreescritura" +msgstr "%s en la sección de sobreescritura" #: elf32-spu.c:1951 msgid "overlay stub relocation overflow" -msgstr "desbordamiento de la reubicación de cabo de sobreescritura" +msgstr "desbordamiento de la reubicación de cabo de sobreescritura" #: elf32-spu.c:1960 elf64-ppc.c:11327 msgid "stubs don't match calculated size" -msgstr "los cabos no coinciden con el tamaño calculado" +msgstr "los cabos no coinciden con el tamaño calculado" #: elf32-spu.c:2542 #, c-format @@ -2190,20 +2191,20 @@ msgstr "aviso: %s sobreescribe %s\n" #: elf32-spu.c:2558 #, c-format msgid "warning: %s exceeds section size\n" -msgstr "aviso: %s excede el tamaño de la sección\n" +msgstr "aviso: %s excede el tamaño de la sección\n" #: elf32-spu.c:2589 msgid "%A:0x%v not found in function table\n" -msgstr "%A:0x%v no se encuentra en la tabla de función\n" +msgstr "%A:0x%v no se encuentra en la tabla de función\n" #: elf32-spu.c:2729 msgid "%B(%A+0x%v): call to non-code section %B(%A), analysis incomplete\n" -msgstr "%B(%A+0x%v): se llama a la sección %B(%A) que no es de código, análisis incompleto\n" +msgstr "%B(%A+0x%v): se llama a la sección %B(%A) que no es de código, análisis incompleto\n" #: elf32-spu.c:3297 #, c-format msgid "Stack analysis will ignore the call from %s to %s\n" -msgstr "El análisis de pila descartará la llamada de %s a %s\n" +msgstr "El análisis de pila descartará la llamada de %s a %s\n" #: elf32-spu.c:3988 msgid " %s: 0x%v\n" @@ -2234,19 +2235,19 @@ msgstr "%s duplicado\n" #: elf32-spu.c:4318 msgid "sorry, no support for duplicate object files in auto-overlay script\n" -msgstr "perdón, no se admiten ficheros objeto duplicados en el guión de sobreescritura automática\n" +msgstr "perdón, no se admiten ficheros objeto duplicados en el guión de sobreescritura automática\n" #: elf32-spu.c:4359 msgid "non-overlay size of 0x%v plus maximum overlay size of 0x%v exceeds local store\n" -msgstr "eltamaño 0x%v que no es de sobreescritura mas el tamaño de sobreescritura máximo de 0x%v excede el almacenamiento local\n" +msgstr "eltamaño 0x%v que no es de sobreescritura mas el tamaño de sobreescritura máximo de 0x%v excede el almacenamiento local\n" #: elf32-spu.c:4514 msgid "%B:%A%s exceeds overlay size\n" -msgstr "%B:%A%s excede el tamaño de sobreescritura\n" +msgstr "%B:%A%s excede el tamaño de sobreescritura\n" #: elf32-spu.c:4676 msgid "Stack size for call graph root nodes.\n" -msgstr "Tamaño de la pila para los nodos raíz del grafo de llamadas.\n" +msgstr "Tamaño de la pila para los nodos raíz del grafo de llamadas.\n" #: elf32-spu.c:4677 msgid "" @@ -2254,11 +2255,11 @@ msgid "" "Stack size for functions. Annotations: '*' max stack, 't' tail call\n" msgstr "" "\n" -"Tamaño de la pila para funciones. Anotaciones: '*' max de pila, 't' llamada cola\n" +"Tamaño de la pila para funciones. Anotaciones: '*' max de pila, 't' llamada cola\n" #: elf32-spu.c:4687 msgid "Maximum stack required is 0x%v\n" -msgstr "La pila máxima requerida es 0x%v\n" +msgstr "La pila máxima requerida es 0x%v\n" #: elf32-spu.c:4778 msgid "fatal error while creating .fixup" @@ -2266,25 +2267,25 @@ msgstr "error fatal al crear .fixup" #: elf32-spu.c:5006 msgid "%B(%s+0x%lx): unresolvable %s relocation against symbol `%s'" -msgstr "%B(%s+0x%lx): reubicación %s sin resolución contra el símbolo `%s'" +msgstr "%B(%s+0x%lx): reubicación %s sin resolución contra el símbolo `%s'" #: elf32-tic6x.c:1539 msgid "%B: SB-relative relocation but __c6xabi_DSBT_BASE not defined" -msgstr "%B: reubicación relativa a SB pero _c6xabi_DSBT_BASE no está definido" +msgstr "%B: reubicación relativa a SB pero _c6xabi_DSBT_BASE no está definido" #. Shared libraries and exception handling support not #. implemented. #: elf32-tic6x.c:1554 msgid "%B: relocation type %d not implemented" -msgstr "%B: el tipo de reubicación %d aún no está implementado" +msgstr "%B: el tipo de reubicación %d aún no está implementado" #: elf32-tic6x.c:1640 msgid "dangerous relocation" -msgstr "reubicación peligrosa" +msgstr "reubicación peligrosa" #: elf32-tic6x.c:1788 elf32-tic6x.c:1796 msgid "error: %B requires more stack alignment than %B preserves" -msgstr "error: %B requiere más alineación de pila que la que %B preserva" +msgstr "error: %B requiere más alineación de pila que la que %B preserva" #: elf32-tic6x.c:1806 elf32-tic6x.c:1815 msgid "error: unknown Tag_ABI_array_object_alignment value in %B" @@ -2296,28 +2297,28 @@ msgstr "error: valor de Tag_ABI_array_object_align_expected desconocido en %B" #: elf32-tic6x.c:1841 elf32-tic6x.c:1848 msgid "error: %B requires more array alignment than %B preserves" -msgstr "error: %B requiere más alineación de matriz que la que %B preserva" +msgstr "error: %B requiere más alineación de matriz que la que %B preserva" #: elf32-tic6x.c:1870 msgid "warning: %B and %B differ in wchar_t size" -msgstr "aviso: %B y %B difieren en tamaño wchar_t" +msgstr "aviso: %B y %B difieren en tamaño wchar_t" #: elf32-tic6x.c:1888 msgid "warning: %B and %B differ in whether code is compiled for DSBT" -msgstr "aviso: %B y %B difieren en si el código está compilado para DSBT" +msgstr "aviso: %B y %B difieren en si el código está compilado para DSBT" #: elf32-tic6x.c:1898 msgid "warning: %B and %B differ in position-dependence of data addressing" -msgstr "aviso: %B y %B difieren en el direccionamiento de datos dependiente de posición" +msgstr "aviso: %B y %B difieren en el direccionamiento de datos dependiente de posición" #: elf32-tic6x.c:1908 msgid "warning: %B and %B differ in position-dependence of code addressing" -msgstr "aviso: %B y %B difieren en el direccionamiento de código dependiente de posición" +msgstr "aviso: %B y %B difieren en el direccionamiento de código dependiente de posición" #: elf32-v850.c:173 #, c-format msgid "Variable `%s' cannot occupy in multiple small data regions" -msgstr "La variable `%s' no puede ocupar múltiples regiones de datos small" +msgstr "La variable `%s' no puede ocupar múltiples regiones de datos small" #: elf32-v850.c:176 #, c-format @@ -2327,38 +2328,38 @@ msgstr "La variable `%s' solamente puede estar en una de las regiones de datos s #: elf32-v850.c:179 #, c-format msgid "Variable `%s' cannot be in both small and zero data regions simultaneously" -msgstr "La variable `%s' no puede estar simultáneamente en las regiones de datos small y zero" +msgstr "La variable `%s' no puede estar simultáneamente en las regiones de datos small y zero" #: elf32-v850.c:182 #, c-format msgid "Variable `%s' cannot be in both small and tiny data regions simultaneously" -msgstr "La variable `%s' no puede estar simultáneamente en las regiones de datos small y tiny" +msgstr "La variable `%s' no puede estar simultáneamente en las regiones de datos small y tiny" #: elf32-v850.c:185 #, c-format msgid "Variable `%s' cannot be in both zero and tiny data regions simultaneously" -msgstr "La variable `%s' no puede estar simultáneamente en las regiones de datos zero y tiny" +msgstr "La variable `%s' no puede estar simultáneamente en las regiones de datos zero y tiny" #: elf32-v850.c:483 #, c-format msgid "FAILED to find previous HI16 reloc\n" -msgstr "FALLO para encontrar la reubicación HI16 previa\n" +msgstr "FALLO para encontrar la reubicación HI16 previa\n" #: elf32-v850.c:2155 msgid "could not locate special linker symbol __gp" -msgstr "no se puede localizar el símbolo especial del enlazador __gp" +msgstr "no se puede localizar el símbolo especial del enlazador __gp" #: elf32-v850.c:2159 msgid "could not locate special linker symbol __ep" -msgstr "no se puede localizar el símbolo especial del enlazador __ep" +msgstr "no se puede localizar el símbolo especial del enlazador __ep" #: elf32-v850.c:2163 msgid "could not locate special linker symbol __ctbp" -msgstr "no se puede localizar el símbolo especial del enlazador __ctbp" +msgstr "no se puede localizar el símbolo especial del enlazador __ctbp" #: elf32-v850.c:2341 msgid "%B: Architecture mismatch with previous modules" -msgstr "%B: No coincide la arquitectura con los módulos previos" +msgstr "%B: No coincide la arquitectura con los módulos previos" #. xgettext:c-format. #: elf32-v850.c:2360 @@ -2409,90 +2410,90 @@ msgstr " [flotante-g]" #: elf32-vax.c:654 #, c-format msgid "%s: warning: GOT addend of %ld to `%s' does not match previous GOT addend of %ld" -msgstr "%s: aviso: la adición GOT de %ld a `%s' no coincide con la adición previa GOT de %ld" +msgstr "%s: aviso: la adición GOT de %ld a `%s' no coincide con la adición previa GOT de %ld" #: elf32-vax.c:1587 #, c-format msgid "%s: warning: PLT addend of %d to `%s' from %s section ignored" -msgstr "%s: aviso: se descarta la adición PLT de %d a `%s' de la sección %s" +msgstr "%s: aviso: se descarta la adición PLT de %d a `%s' de la sección %s" #: elf32-vax.c:1714 #, c-format msgid "%s: warning: %s relocation against symbol `%s' from %s section" -msgstr "%s: aviso: reubicación %s contra el símbolo `%s' de la sección %s" +msgstr "%s: aviso: reubicación %s contra el símbolo `%s' de la sección %s" #: elf32-vax.c:1720 #, c-format msgid "%s: warning: %s relocation to 0x%x from %s section" -msgstr "%s: aviso: reubicación %s a 0x%x de la sección %s" +msgstr "%s: aviso: reubicación %s a 0x%x de la sección %s" #: elf32-xstormy16.c:451 elf32-ia64.c:2861 elf64-ia64.c:2861 msgid "non-zero addend in @fptr reloc" -msgstr "adición que no es cero en la reubicación @fptr" +msgstr "adición que no es cero en la reubicación @fptr" #: elf32-xtensa.c:918 msgid "%B(%A): invalid property table" -msgstr "%B(%A): tabla de propiedades inválida" +msgstr "%B(%A): tabla de propiedades inválida" #: elf32-xtensa.c:2780 msgid "%B(%A+0x%lx): relocation offset out of range (size=0x%x)" -msgstr "%B(%A+0x%lx): desplazamiento de reubicación fuera de rango (tamaño=0x%x)" +msgstr "%B(%A+0x%lx): desplazamiento de reubicación fuera de rango (tamaño=0x%x)" #: elf32-xtensa.c:2859 elf32-xtensa.c:2980 msgid "dynamic relocation in read-only section" -msgstr "reubicación dinámica en la sección de sólo lectura" +msgstr "reubicación dinámica en la sección de sólo lectura" #: elf32-xtensa.c:2956 msgid "TLS relocation invalid without dynamic sections" -msgstr "reubicación TLS inválida sin secciones dinámicas" +msgstr "reubicación TLS inválida sin secciones dinámicas" #: elf32-xtensa.c:3173 msgid "internal inconsistency in size of .got.loc section" -msgstr "inconsistencia interna en el tamaño de la sección .got.loc" +msgstr "inconsistencia interna en el tamaño de la sección .got.loc" #: elf32-xtensa.c:3486 msgid "%B: incompatible machine type. Output is 0x%x. Input is 0x%x" -msgstr "%B: tipo de máquina incompatible. La salida es 0x%x. La entrada es 0x%x" +msgstr "%B: tipo de máquina incompatible. La salida es 0x%x. La entrada es 0x%x" #: elf32-xtensa.c:4715 elf32-xtensa.c:4723 msgid "Attempt to convert L32R/CALLX to CALL failed" -msgstr "Falló el intento de convertir L32R/CALLX a CALL" +msgstr "Falló el intento de convertir L32R/CALLX a CALL" #: elf32-xtensa.c:6333 elf32-xtensa.c:6409 elf32-xtensa.c:7525 msgid "%B(%A+0x%lx): could not decode instruction; possible configuration mismatch" -msgstr "%B(%A+0x%lx): no se puede decodificar la instrucción; posible falta de coincidencia de la configuración" +msgstr "%B(%A+0x%lx): no se puede decodificar la instrucción; posible falta de coincidencia de la configuración" #: elf32-xtensa.c:7265 msgid "%B(%A+0x%lx): could not decode instruction for XTENSA_ASM_SIMPLIFY relocation; possible configuration mismatch" -msgstr "%B(%A+0x%lx): no se puede decodificar la instrucción para la reubicación XTENSA_ASM_SIMPLIFY; posible falta de coincidencia de la configuración" +msgstr "%B(%A+0x%lx): no se puede decodificar la instrucción para la reubicación XTENSA_ASM_SIMPLIFY; posible falta de coincidencia de la configuración" #: elf32-xtensa.c:9024 msgid "invalid relocation address" -msgstr "dirección de reubicación inválida" +msgstr "dirección de reubicación inválida" #: elf32-xtensa.c:9073 msgid "overflow after relaxation" -msgstr "desbordamiento después de la relajación" +msgstr "desbordamiento después de la relajación" #: elf32-xtensa.c:10205 msgid "%B(%A+0x%lx): unexpected fix for %s relocation" -msgstr "%B(%A+0x%lx): compostura inesperada para la reubicación %s" +msgstr "%B(%A+0x%lx): compostura inesperada para la reubicación %s" #: elf64-alpha.c:460 msgid "GPDISP relocation did not find ldah and lda instructions" -msgstr "la reubicación GPDISP no encontró las instrucciones ldah y lda" +msgstr "la reubicación GPDISP no encontró las instrucciones ldah y lda" #: elf64-alpha.c:2408 msgid "%B: .got subsegment exceeds 64K (size %d)" -msgstr "%B: el subsegmento .got excede los 64K (tamaño %d)" +msgstr "%B: el subsegmento .got excede los 64K (tamaño %d)" #: elf64-alpha.c:4304 elf64-alpha.c:4316 msgid "%B: gp-relative relocation against dynamic symbol %s" -msgstr "%B: reubicación relativa a gp contra el símbolo dinámico %s" +msgstr "%B: reubicación relativa a gp contra el símbolo dinámico %s" #: elf64-alpha.c:4342 elf64-alpha.c:4477 msgid "%B: pc-relative relocation against dynamic symbol %s" -msgstr "%B: reubicación relativa a pc contra el símbolo dinámico %s" +msgstr "%B: reubicación relativa a pc contra el símbolo dinámico %s" #: elf64-alpha.c:4370 msgid "%B: change in gp: BRSGP %s" @@ -2504,23 +2505,23 @@ msgstr "" #: elf64-alpha.c:4400 msgid "%B: !samegp reloc against symbol without .prologue: %s" -msgstr "%B: reubicación !samegp contra un símbolo sin .prologue: %s" +msgstr "%B: reubicación !samegp contra un símbolo sin .prologue: %s" #: elf64-alpha.c:4452 msgid "%B: unhandled dynamic relocation against %s" -msgstr "%B: reubicación dinámica sin manejar contra %s" +msgstr "%B: reubicación dinámica sin manejar contra %s" #: elf64-alpha.c:4484 msgid "%B: pc-relative relocation against undefined weak symbol %s" -msgstr "%B: reubicación relativa a pc contra el símbolo débil sin definir %s" +msgstr "%B: reubicación relativa a pc contra el símbolo débil sin definir %s" #: elf64-alpha.c:4544 msgid "%B: dtp-relative relocation against dynamic symbol %s" -msgstr "%B: reubicación relativa a dtp contra el símbolo dinámico %s" +msgstr "%B: reubicación relativa a dtp contra el símbolo dinámico %s" #: elf64-alpha.c:4567 msgid "%B: tp-relative relocation against dynamic symbol %s" -msgstr "%B: reubicación relativa a tp contra el símbolo dinámico %s" +msgstr "%B: reubicación relativa a tp contra el símbolo dinámico %s" #: elf64-hppa.c:2101 #, c-format @@ -2543,27 +2544,27 @@ msgstr "" #: elf64-mmix.c:1607 #, c-format msgid "%s: base-plus-offset relocation against register symbol: (unknown) in %s" -msgstr "%s: reubicación base-más-desplazamiento contra un símbolo de registro: (desconocido) en %s" +msgstr "%s: reubicación base-más-desplazamiento contra un símbolo de registro: (desconocido) en %s" #: elf64-mmix.c:1612 #, c-format msgid "%s: base-plus-offset relocation against register symbol: %s in %s" -msgstr "%s: reubicación base-más-desplazamiento contra un símbolo de registro: %s en %s" +msgstr "%s: reubicación base-más-desplazamiento contra un símbolo de registro: %s en %s" #: elf64-mmix.c:1656 #, c-format msgid "%s: register relocation against non-register symbol: (unknown) in %s" -msgstr "%s: reubicación de registro contra un símbolo que no es registro: (desconocido) en %s" +msgstr "%s: reubicación de registro contra un símbolo que no es registro: (desconocido) en %s" #: elf64-mmix.c:1661 #, c-format msgid "%s: register relocation against non-register symbol: %s in %s" -msgstr "%s: reubicación de registro contra un símbolo que no es registro: %s en %s" +msgstr "%s: reubicación de registro contra un símbolo que no es registro: %s en %s" #: elf64-mmix.c:1698 #, c-format msgid "%s: directive LOCAL valid only with a register or absolute value" -msgstr "%s: la directiva LOCAL sólo es válida con un registro o un valor absoluto" +msgstr "%s: la directiva LOCAL sólo es válida con un registro o un valor absoluto" #: elf64-mmix.c:1726 #, c-format @@ -2573,11 +2574,11 @@ msgstr "%s: directiva LOCAL: El registro $%ld no es un registro local. El prime #: elf64-mmix.c:2190 #, c-format msgid "%s: Error: multiple definition of `%s'; start of %s is set in a earlier linked file\n" -msgstr "%s: Error: definición múltiple de `%s'; el inicio de %s está definido en un fichero enlazado con anterioridad\n" +msgstr "%s: Error: definición múltiple de `%s'; el inicio de %s está definido en un fichero enlazado con anterioridad\n" #: elf64-mmix.c:2248 msgid "Register section has contents\n" -msgstr "La sección de registros no tiene contenido\n" +msgstr "La sección de registros no tiene contenido\n" #: elf64-mmix.c:2440 #, c-format @@ -2585,7 +2586,7 @@ msgid "" "Internal inconsistency: remaining %u != max %u.\n" " Please report this bug." msgstr "" -"Inconsistencia interna: %u restante != %u máximo.\n" +"Inconsistencia interna: %u restante != %u máximo.\n" " Por favor reporte este bicho." #: elf64-ppc.c:2741 libbfd.c:997 @@ -2599,11 +2600,11 @@ msgstr "%B: compilado para un sistema little endian y el objetivo es big endian" #: elf64-ppc.c:6473 #, c-format msgid "copy reloc against `%s' requires lazy plt linking; avoid setting LD_BIND_NOW=1 or upgrade gcc" -msgstr "la reubicación de copia contra `%s' requiere de enlazado plt flojo; evite establecer LD_BIND_NOW=1 o actualice gcc" +msgstr "la reubicación de copia contra `%s' requiere de enlazado plt flojo; evite establecer LD_BIND_NOW=1 o actualice gcc" #: elf64-ppc.c:6901 msgid "dynreloc miscount for %B, section %A" -msgstr "cuenta errónea de la reubicación dinámica de %B, sección %A" +msgstr "cuenta errónea de la reubicación dinámica de %B, sección %A" #: elf64-ppc.c:6985 msgid "%B: .opd is not a regular array of opd entries" @@ -2611,26 +2612,26 @@ msgstr "%B: .opd no es una matriz regular de entradas opd" #: elf64-ppc.c:6994 msgid "%B: unexpected reloc type %u in .opd section" -msgstr "%B: tipo de reubicación %u inesperado en la sección .opd" +msgstr "%B: tipo de reubicación %u inesperado en la sección .opd" #: elf64-ppc.c:7015 msgid "%B: undefined sym `%s' in .opd section" -msgstr "%B: símbolo `%s' sin definir en la sección .opd" +msgstr "%B: símbolo `%s' sin definir en la sección .opd" #: elf64-ppc.c:7877 elf64-ppc.c:8392 #, c-format msgid "%s defined on removed toc entry" -msgstr "se definió %s en la entrada toc eliminada" +msgstr "se definió %s en la entrada toc eliminada" #: elf64-ppc.c:9459 #, c-format msgid "long branch stub `%s' offset overflow" -msgstr "desbordamiento del desplazamiento de stub de ramificación long `%s'" +msgstr "desbordamiento del desplazamiento de stub de ramificación long `%s'" #: elf64-ppc.c:9518 #, c-format msgid "can't find branch stub `%s'" -msgstr "no se puede encontrar la ramificación de cabo `%s'" +msgstr "no se puede encontrar la ramificación de cabo `%s'" #: elf64-ppc.c:9580 elf64-ppc.c:9716 #, c-format @@ -2640,11 +2641,11 @@ msgstr "error de la tabla de enlazado contra `%s'" #: elf64-ppc.c:9886 #, c-format msgid "can't build branch stub `%s'" -msgstr "no se puede construir la ramificación de cabos `%s'" +msgstr "no se puede construir la ramificación de cabos `%s'" #: elf64-ppc.c:10684 msgid "%B section %A exceeds stub group size" -msgstr "%B sección %A excede el tamaño de grupo de cabos" +msgstr "%B sección %A excede el tamaño de grupo de cabos" #: elf64-ppc.c:11339 #, c-format @@ -2665,24 +2666,24 @@ msgstr "" #: elf64-ppc.c:12190 msgid "%B(%A+0x%lx): automatic multiple TOCs not supported using your crt files; recompile with -mminimal-toc or upgrade gcc" -msgstr "%B(%A+0x%lx): no se admiten los TOCs múltiples automáticos, utilizando sus ficheros crt; recompile con -mminimal-toc o actualice gcc" +msgstr "%B(%A+0x%lx): no se admiten los TOCs múltiples automáticos, utilizando sus ficheros crt; recompile con -mminimal-toc o actualice gcc" #: elf64-ppc.c:12198 msgid "%B(%A+0x%lx): sibling call optimization to `%s' does not allow automatic multiple TOCs; recompile with -mminimal-toc or -fno-optimize-sibling-calls, or make `%s' extern" -msgstr "%B(%A+0x%lx): la optimización de llamada hermana a `%s' no permite TOCs múltiples automáticos; recompile con -mminimal-toc ó -fno-optimize-sibling-calls, o vuelva `%s' externa" +msgstr "%B(%A+0x%lx): la optimización de llamada hermana a `%s' no permite TOCs múltiples automáticos; recompile con -mminimal-toc ó -fno-optimize-sibling-calls, o vuelva `%s' externa" #: elf64-ppc.c:12919 msgid "%B: relocation %s is not supported for symbol %s." -msgstr "%B: no se admite la reubicación %s para el símbolo %s." +msgstr "%B: no se admite la reubicación %s para el símbolo %s." #: elf64-ppc.c:13096 msgid "%B: error: relocation %s not a multiple of %d" -msgstr "%B: error: la reubicación %s no es un múltiplo de %d" +msgstr "%B: error: la reubicación %s no es un múltiplo de %d" #: elf64-sh64.c:1682 #, c-format msgid "%s: error: unaligned relocation type %d at %08x reloc %08x\n" -msgstr "%s: error: tipo de reubicación %d sin alinear en %08x reubicación %08x\n" +msgstr "%s: error: tipo de reubicación %d sin alinear en %08x reubicación %08x\n" #: elf64-sparc.c:444 msgid "%B: Only registers %%g[2367] can be declared using STT_REGISTER" @@ -2690,31 +2691,31 @@ msgstr "%B: Solamente los registros %%g[2367] se pueden declarar utilizando STT_ #: elf64-sparc.c:464 msgid "Register %%g%d used incompatibly: %s in %B, previously %s in %B" -msgstr "El registro %%g%d se usó de forma incompatible: %s en %B, previamente %s en %B" +msgstr "El registro %%g%d se usó de forma incompatible: %s en %B, previamente %s en %B" #: elf64-sparc.c:487 msgid "Symbol `%s' has differing types: REGISTER in %B, previously %s in %B" -msgstr "El símbolo `%s' tiene tipos divergentes: REGISTER en %B, previamente %s en %B" +msgstr "El símbolo `%s' tiene tipos divergentes: REGISTER en %B, previamente %s en %B" #: elf64-sparc.c:532 msgid "Symbol `%s' has differing types: %s in %B, previously REGISTER in %B" -msgstr "El símbolo `%s' tiene tipos divergentes: %s en %B, previamente REGISTER en %B" +msgstr "El símbolo `%s' tiene tipos divergentes: %s en %B, previamente REGISTER en %B" #: elf64-sparc.c:684 msgid "%B: linking UltraSPARC specific with HAL specific code" -msgstr "%B: se enlaza código específico de UltraSPARC con código específico de HAL" +msgstr "%B: se enlaza código específico de UltraSPARC con código específico de HAL" #: elf64-x86-64.c:1360 msgid "%B: '%s' accessed both as normal and thread local symbol" -msgstr "%B: se accedió a '%s' como un símbolo normal y como un símbolo local de hilo" +msgstr "%B: se accedió a '%s' como un símbolo normal y como un símbolo local de hilo" #: elf64-x86-64.c:2801 msgid "%B: relocation %s against STT_GNU_IFUNC symbol `%s' has non-zero addend: %d" -msgstr "%B: la reubicación %s contra el símbolo STT_GNU_IFUNC `%s' con adición que no es cero: %d" +msgstr "%B: la reubicación %s contra el símbolo STT_GNU_IFUNC `%s' con adición que no es cero: %d" #: elf64-x86-64.c:3073 msgid "%B: relocation R_X86_64_GOTOFF64 against protected function `%s' can not be used when making a shared object" -msgstr "%B: no se puede usar la reubicación R_X86_64_GOTOFF contra la función protegida `%s' cuando se hace un objeto compartido" +msgstr "%B: no se puede usar la reubicación R_X86_64_GOTOFF contra la función protegida `%s' cuando se hace un objeto compartido" #: elf64-x86-64.c:3184 msgid "; recompile with -fPIC" @@ -2722,34 +2723,34 @@ msgstr "; recompile con -fPIC" #: elf64-x86-64.c:3189 msgid "%B: relocation %s against %s `%s' can not be used when making a shared object%s" -msgstr "%B: no se puede usar la reubicación %s contra %s `%s' cuando se hace un objeto compartido%s" +msgstr "%B: no se puede usar la reubicación %s contra %s `%s' cuando se hace un objeto compartido%s" #: elf64-x86-64.c:3191 msgid "%B: relocation %s against undefined %s `%s' can not be used when making a shared object%s" -msgstr "%B: no se puede usar la reubicación %s contra %s sin definir `%s' cuando se hace un objeto compartido%s" +msgstr "%B: no se puede usar la reubicación %s contra %s sin definir `%s' cuando se hace un objeto compartido%s" #: elfcode.h:826 #, c-format msgid "warning: %s has a corrupt string table index - ignoring" -msgstr "aviso: %s tiene un índice de tablas de cadenas corrupto - se descarta" +msgstr "aviso: %s tiene un índice de tablas de cadenas corrupto - se descarta" #: elfcode.h:1236 #, c-format msgid "%s: version count (%ld) does not match symbol count (%ld)" -msgstr "%s: la cuenta de versión (%ld) no coincide con la cuenta de símbolos (%ld)" +msgstr "%s: la cuenta de versión (%ld) no coincide con la cuenta de símbolos (%ld)" #: elfcode.h:1476 #, c-format msgid "%s(%s): relocation %d has invalid symbol index %ld" -msgstr "%s(%s): la reubicación %d tiene un índice de símbolo %ld inválido" +msgstr "%s(%s): la reubicación %d tiene un índice de símbolo %ld inválido" #: elfcore.h:312 msgid "Warning: %B is truncated: expected core file size >= %lu, found: %lu." -msgstr "Aviso: se truncó %B: se esperaba el tamaño de fichero core >= %lu, se encontró: %lu." +msgstr "Aviso: se truncó %B: se esperaba el tamaño de fichero core >= %lu, se encontró: %lu." #: elflink.c:1119 msgid "%s: TLS definition in %B section %A mismatches non-TLS definition in %B section %A" -msgstr "%s: la definición TLS en %B sección %A no coincide con la definición que no es TLS en %B sección %A" +msgstr "%s: la definición TLS en %B sección %A no coincide con la definición que no es TLS en %B sección %A" #: elflink.c:1123 msgid "%s: TLS reference in %B mismatches non-TLS reference in %B" @@ -2757,95 +2758,95 @@ msgstr "%s: la referencia TLS en %B no coincide con la referencia que no es TLS #: elflink.c:1127 msgid "%s: TLS definition in %B section %A mismatches non-TLS reference in %B" -msgstr "%s: la definición TLS en %B sección %A no coincide con la referencia que no es TLS en %B" +msgstr "%s: la definición TLS en %B sección %A no coincide con la referencia que no es TLS en %B" #: elflink.c:1131 msgid "%s: TLS reference in %B mismatches non-TLS definition in %B section %A" -msgstr "%s: la referencia TLS en %B no coincide con la definición que no es TLS en %B sección %A" +msgstr "%s: la referencia TLS en %B no coincide con la definición que no es TLS en %B sección %A" #: elflink.c:1763 msgid "%B: unexpected redefinition of indirect versioned symbol `%s'" -msgstr "%B: redefinición inesperada del símbolo con versión indirecta `%s'" +msgstr "%B: redefinición inesperada del símbolo con versión indirecta `%s'" #: elflink.c:2076 msgid "%B: version node not found for symbol %s" -msgstr "%B: no se encuentra la versión del nodo para el símbolo %s" +msgstr "%B: no se encuentra la versión del nodo para el símbolo %s" #: elflink.c:2166 msgid "%B: bad reloc symbol index (0x%lx >= 0x%lx) for offset 0x%lx in section `%A'" -msgstr "%B: índice de símbolos de reubicación inválido (0x%lx >= 0x%lx) erróneo para el desplazamiento 0x%lx en la sección `%A'" +msgstr "%B: índice de símbolos de reubicación inválido (0x%lx >= 0x%lx) erróneo para el desplazamiento 0x%lx en la sección `%A'" #: elflink.c:2177 msgid "%B: non-zero symbol index (0x%lx) for offset 0x%lx in section `%A' when the object file has no symbol table" -msgstr "%B: índice de símbolos que no es cero (0x%lx) para el desplazamiento 0x%lx) en la sección `%A' cuando el fichero objeto no tiene tabla de símbolos" +msgstr "%B: índice de símbolos que no es cero (0x%lx) para el desplazamiento 0x%lx) en la sección `%A' cuando el fichero objeto no tiene tabla de símbolos" #: elflink.c:2367 msgid "%B: relocation size mismatch in %B section %A" -msgstr "%B: el tamaño de reubicación no coincide en %B sección %A" +msgstr "%B: el tamaño de reubicación no coincide en %B sección %A" #: elflink.c:2662 #, c-format msgid "warning: type and size of dynamic symbol `%s' are not defined" -msgstr "aviso: el tipo y tamaño del símbolo dinámico `%s' no están definidos" +msgstr "aviso: el tipo y tamaño del símbolo dinámico `%s' no están definidos" #: elflink.c:3418 msgid "%P: alternate ELF machine code found (%d) in %B, expecting %d\n" -msgstr "%P: se encontró código máquina ELF alternativo (%d) en %B, se espera %d\n" +msgstr "%P: se encontró código máquina ELF alternativo (%d) en %B, se espera %d\n" #: elflink.c:4050 msgid "%B: %s: invalid version %u (max %d)" -msgstr "%B: %s: versión %u inválida (máximo %d)" +msgstr "%B: %s: versión %u inválida (máximo %d)" #: elflink.c:4086 msgid "%B: %s: invalid needed version %d" -msgstr "%B: %s: versión requerida %d inválida" +msgstr "%B: %s: versión requerida %d inválida" #: elflink.c:4285 msgid "Warning: alignment %u of common symbol `%s' in %B is greater than the alignment (%u) of its section %A" -msgstr "Aviso: la alineación %u del símbolo común `%s' en %B es más grande que la alineación (%u) de su sección %A" +msgstr "Aviso: la alineación %u del símbolo común `%s' en %B es más grande que la alineación (%u) de su sección %A" #: elflink.c:4291 msgid "Warning: alignment %u of symbol `%s' in %B is smaller than %u in %B" -msgstr "Aviso: la alineación %u del símbolo `%s' en %B es más pequeña que %u en %B" +msgstr "Aviso: la alineación %u del símbolo `%s' en %B es más pequeña que %u en %B" #: elflink.c:4306 msgid "Warning: size of symbol `%s' changed from %lu in %B to %lu in %B" -msgstr "Aviso: el tamaño del símbolo `%s' cambió de %lu en %B a %lu en %B" +msgstr "Aviso: el tamaño del símbolo `%s' cambió de %lu en %B a %lu en %B" #: elflink.c:4472 msgid "%B: undefined reference to symbol '%s'" -msgstr "%B: referencia sin definir al símbolo '%s'" +msgstr "%B: referencia sin definir al símbolo '%s'" #: elflink.c:4475 msgid "note: '%s' is defined in DSO %B so try adding it to the linker command line" -msgstr "nota: se define '%s' en DSO %B así que se tratará de agregarlo a la línea de órdenes del enlazador" +msgstr "nota: se define '%s' en DSO %B así que se tratará de agregarlo a la línea de órdenes del enlazador" #: elflink.c:5779 #, c-format msgid "%s: undefined version: %s" -msgstr "%s: versión sin definir: %s" +msgstr "%s: versión sin definir: %s" #: elflink.c:5847 msgid "%B: .preinit_array section is not allowed in DSO" -msgstr "%B: no se permite la sección .preinit_array en DSO" +msgstr "%B: no se permite la sección .preinit_array en DSO" #: elflink.c:7598 #, c-format msgid "undefined %s reference in complex symbol: %s" -msgstr "referencia %s sin definir en el símbolo complejo: %s" +msgstr "referencia %s sin definir en el símbolo complejo: %s" #: elflink.c:7752 #, c-format msgid "unknown operator '%c' in complex symbol" -msgstr "operador desconocido '%c' en el símbolo complejo" +msgstr "operador desconocido '%c' en el símbolo complejo" #: elflink.c:8091 elflink.c:8108 elflink.c:8145 elflink.c:8162 msgid "%B: Unable to sort relocs - they are in more than one size" -msgstr "%B: No se pueden ordenar las reubicaciones - son de tamaños diferentes" +msgstr "%B: No se pueden ordenar las reubicaciones - son de tamaños diferentes" #: elflink.c:8122 elflink.c:8176 msgid "%B: Unable to sort relocs - they are of an unknown size" -msgstr "%B: No se pueden ordenar las reubicaciones - son de tamaño desconocido" +msgstr "%B: No se pueden ordenar las reubicaciones - son de tamaño desconocido" #: elflink.c:8227 msgid "Not enough memory to sort relocations" @@ -2857,23 +2858,23 @@ msgstr "%B: Demasiadas secciones: %d (>= %d)" #: elflink.c:8663 msgid "%B: %s symbol `%s' in %B is referenced by DSO" -msgstr "%B: el símbolo %s `%s' en %B está referenciado por DSO" +msgstr "%B: el símbolo %s `%s' en %B está referenciado por DSO" #: elflink.c:8754 msgid "%B: could not find output section %A for input section %A" -msgstr "%B: no se puede encontrar la sección de salida %A para la sección de entrada %A" +msgstr "%B: no se puede encontrar la sección de salida %A para la sección de entrada %A" #: elflink.c:8874 msgid "%B: %s symbol `%s' isn't defined" -msgstr "%B: el símbolo %s `%s' no está definido" +msgstr "%B: el símbolo %s `%s' no está definido" #: elflink.c:9428 msgid "error: %B contains a reloc (0x%s) for section %A that references a non-existent global symbol" -msgstr "error: %B contiene una reubicación (0x%s) para la sección %A que refiere a un símbolo global que no existe" +msgstr "error: %B contiene una reubicación (0x%s) para la sección %A que refiere a un símbolo global que no existe" #: elflink.c:9494 msgid "%X`%s' referenced in section `%A' of %B: defined in discarded section `%A' of %B\n" -msgstr "%X`%s' referido en la sección `%A' de %B: se definió en la sección descartada `%A' de %B\n" +msgstr "%X`%s' referido en la sección `%A' de %B: se definió en la sección descartada `%A' de %B\n" #: elflink.c:10141 msgid "%A has both ordered [`%A' in %B] and unordered [`%A' in %B] sections" @@ -2886,12 +2887,12 @@ msgstr "%A tiene secciones tanto ordenadas como desordenadas" #: elflink.c:10992 elflink.c:11036 msgid "%B: could not find output section %s" -msgstr "%B: no se puede encontrar la sección de salida %s" +msgstr "%B: no se puede encontrar la sección de salida %s" #: elflink.c:10997 #, c-format msgid "warning: %s section has zero size" -msgstr "aviso: la sección %s es de tamaño cero" +msgstr "aviso: la sección %s es de tamaño cero" #: elflink.c:11102 msgid "%P: warning: creating a DT_TEXTREL in a shared object.\n" @@ -2899,31 +2900,31 @@ msgstr "%P: aviso: se crea un DT_TEXTREL en un objeto compartido.\n" #: elflink.c:11289 msgid "%P%X: can not read symbols: %E\n" -msgstr "%P%X: no se pueden leer símbolos: %E\n" +msgstr "%P%X: no se pueden leer símbolos: %E\n" #: elflink.c:11638 msgid "Removing unused section '%s' in file '%B'" -msgstr "Se elimina la sección sin uso '%s' en el fichero '%B'" +msgstr "Se elimina la sección sin uso '%s' en el fichero '%B'" #: elflink.c:11850 msgid "Warning: gc-sections option ignored" -msgstr "Aviso: se descarta la opción gc-sections" +msgstr "Aviso: se descarta la opción gc-sections" #: elflink.c:12399 msgid "%B: ignoring duplicate section `%A'" -msgstr "%B: se descarta la sección duplicada `%A'" +msgstr "%B: se descarta la sección duplicada `%A'" #: elflink.c:12406 elflink.c:12413 msgid "%B: duplicate section `%A' has different size" -msgstr "%B: la sección duplicada `%A' tiene tamaño diferente" +msgstr "%B: la sección duplicada `%A' tiene tamaño diferente" #: elflink.c:12421 elflink.c:12426 msgid "%B: warning: could not read contents of section `%A'" -msgstr "%B: aviso: no se puede leer el contenido de la sección `%A'" +msgstr "%B: aviso: no se puede leer el contenido de la sección `%A'" #: elflink.c:12430 msgid "%B: warning: duplicate section `%A' has different contents" -msgstr "%B: aviso: la sección duplicada `%A' tiene contenido diferente" +msgstr "%B: aviso: la sección duplicada `%A' tiene contenido diferente" #: elflink.c:12531 linker.c:3138 msgid "%F%P: already_linked_table: %E\n" @@ -2931,7 +2932,7 @@ msgstr "%F%P: already_linked_table: %E\n" #: elfxx-mips.c:1220 msgid "static procedure (no name)" -msgstr "procedimiento estático (sin nombre)" +msgstr "procedimiento estático (sin nombre)" #: elfxx-mips.c:5623 msgid "%B: %A+0x%lx: Direct jumps between ISA modes are not allowed; consider recompiling with interlinking enabled." @@ -2939,41 +2940,41 @@ msgstr "%B: %A+0x%lx: No se permiten los saltos directos entre modos ISA; consid #: elfxx-mips.c:6280 elfxx-mips.c:6503 msgid "%B: Warning: bad `%s' option size %u smaller than its header" -msgstr "%B: Aviso: el tamaño de opción `%s' %u erróneo es más pequeño que su encabezado" +msgstr "%B: Aviso: el tamaño de opción `%s' %u erróneo es más pequeño que su encabezado" #: elfxx-mips.c:7254 elfxx-mips.c:7379 msgid "%B: Warning: cannot determine the target function for stub section `%s'" -msgstr "%B: Aviso: no se puede determinar la función objetivo para la sección de cabo `%s'" +msgstr "%B: Aviso: no se puede determinar la función objetivo para la sección de cabo `%s'" #: elfxx-mips.c:7508 msgid "%B: Malformed reloc detected for section %s" -msgstr "%B: Se detectó una reubicación malformada para la sección %s" +msgstr "%B: Se detectó una reubicación malformada para la sección %s" #: elfxx-mips.c:7548 msgid "%B: GOT reloc at 0x%lx not expected in executables" -msgstr "%B: no se esperaba la reubicación GOT en 0x%lx en ejecutables" +msgstr "%B: no se esperaba la reubicación GOT en 0x%lx en ejecutables" #: elfxx-mips.c:7670 msgid "%B: CALL16 reloc at 0x%lx not against global symbol" -msgstr "%B: la reubicación CALL16 en 0x%lx no es contra un símbolo global" +msgstr "%B: la reubicación CALL16 en 0x%lx no es contra un símbolo global" #: elfxx-mips.c:8365 #, c-format msgid "non-dynamic relocations refer to dynamic symbol %s" -msgstr "reubicaciones que no son dinámicas se refieren al símbolo dinámico %s" +msgstr "reubicaciones que no son dinámicas se refieren al símbolo dinámico %s" #: elfxx-mips.c:9068 msgid "%B: Can't find matching LO16 reloc against `%s' for %s at 0x%lx in section `%A'" -msgstr "%B: No se puede encontrar una reubicación LO16 coincidente contra `%s' para %s en 0x%lx en la sección `%A'" +msgstr "%B: No se puede encontrar una reubicación LO16 coincidente contra `%s' para %s en 0x%lx en la sección `%A'" #: elfxx-mips.c:9207 msgid "small-data section exceeds 64KB; lower small-data size limit (see option -G)" -msgstr "la sección small-data excede los 64KB; disminuya el límite de tamaño de small-data (vea la opción -G)" +msgstr "la sección small-data excede los 64KB; disminuya el límite de tamaño de small-data (vea la opción -G)" #: elfxx-mips.c:12027 #, c-format msgid "%s: illegal section name `%s'" -msgstr "%s: nombre de sección `%s' ilegal" +msgstr "%s: nombre de sección `%s' ilegal" #: elfxx-mips.c:12405 elfxx-mips.c:12431 msgid "Warning: %B uses -msingle-float, %B uses -mdouble-float" @@ -2989,11 +2990,11 @@ msgstr "Aviso: %B usa -mdouble-float, %B usa -mips32r2 -mfp64" #: elfxx-mips.c:12521 msgid "%B: endianness incompatible with that of the selected emulation" -msgstr "%B: la endianez es incompatible con aquella de la emulación seleccionada" +msgstr "%B: la endianez es incompatible con aquella de la emulación seleccionada" #: elfxx-mips.c:12532 msgid "%B: ABI is incompatible with that of the selected emulation" -msgstr "%B: la ABI es incompatible con aquella de la emulación seleccionada" +msgstr "%B: la ABI es incompatible con aquella de la emulación seleccionada" #: elfxx-mips.c:12613 msgid "%B: warning: linking abicalls files with non-abicalls files" @@ -3001,15 +3002,15 @@ msgstr "%B: aviso: se enlazan ficheros de llamadas abi con ficheros que no son d #: elfxx-mips.c:12630 msgid "%B: linking 32-bit code with 64-bit code" -msgstr "%B: se enlaza código de 32-bit con código de 64-bit" +msgstr "%B: se enlaza código de 32-bit con código de 64-bit" #: elfxx-mips.c:12658 msgid "%B: linking %s module with previous %s modules" -msgstr "%B: se enlaza el módulo %s con módulos %s previos" +msgstr "%B: se enlaza el módulo %s con módulos %s previos" #: elfxx-mips.c:12681 msgid "%B: ABI mismatch: linking %s module with previous %s modules" -msgstr "%B: no coincide ABI: se enlaza el módulo %s con módulos %s previos" +msgstr "%B: no coincide ABI: se enlaza el módulo %s con módulos %s previos" #: elfxx-mips.c:12845 #, c-format @@ -3064,7 +3065,7 @@ msgstr " [no es modo 32bit]" #: elfxx-sparc.c:595 #, c-format msgid "invalid relocation type %d" -msgstr "tipo de reubicación %d inválido" +msgstr "tipo de reubicación %d inválido" #: i386linux.c:454 m68klinux.c:458 sparclinux.c:452 #, c-format @@ -3080,7 +3081,7 @@ msgstr "El fichero de salida requiere la biblioteca compartida `%s.so.%s'\n" #: sparclinux.c:650 sparclinux.c:700 #, c-format msgid "Symbol %s not defined for fixups\n" -msgstr "El símbolo %s no está definido para composturas\n" +msgstr "El símbolo %s no está definido para composturas\n" #: i386linux.c:725 m68klinux.c:730 sparclinux.c:724 msgid "Warning: fixup count mismatch\n" @@ -3089,16 +3090,16 @@ msgstr "Aviso: no coincide la cuenta de composturas\n" #: ieee.c:159 #, c-format msgid "%s: string too long (%d chars, max 65535)" -msgstr "%s: la cadena es demasiado larga (%d caracteres, máximo 65535)" +msgstr "%s: la cadena es demasiado larga (%d caracteres, máximo 65535)" #: ieee.c:286 #, c-format msgid "%s: unrecognized symbol `%s' flags 0x%x" -msgstr "%s: no se reconoce el símbolo `%s' opciones 0x%x" +msgstr "%s: no se reconoce el símbolo `%s' opciones 0x%x" #: ieee.c:792 msgid "%B: unimplemented ATI record %u for symbol %u" -msgstr "%B: grabación ATI %u sin implementar para el símbolo %u" +msgstr "%B: grabación ATI %u sin implementar para el símbolo %u" #: ieee.c:816 msgid "%B: unexpected ATN type %d in external part" @@ -3106,31 +3107,31 @@ msgstr "%B: tipo ATN %d inesperado en la parte externa" #: ieee.c:838 msgid "%B: unexpected type after ATN" -msgstr "%B: tipo inesperado después de ATN" +msgstr "%B: tipo inesperado después de ATN" #: ihex.c:230 msgid "%B:%d: unexpected character `%s' in Intel Hex file" -msgstr "%B:%d: carácter `%s' inesperado en el fichero Hexadecimal de Intel" +msgstr "%B:%d: carácter `%s' inesperado en el fichero Hexadecimal de Intel" #: ihex.c:337 msgid "%B:%u: bad checksum in Intel Hex file (expected %u, found %u)" -msgstr "%B:%u: suma de comprobación errónea en el fichero Hexadecimal de Intel (se esperaba %u, se obtuvo %u)" +msgstr "%B:%u: suma de comprobación errónea en el fichero Hexadecimal de Intel (se esperaba %u, se obtuvo %u)" #: ihex.c:392 msgid "%B:%u: bad extended address record length in Intel Hex file" -msgstr "%B:%u: longitud de registro de dirección extendida errónea en el fichero Hexadecimal de Intel" +msgstr "%B:%u: longitud de registro de dirección extendida errónea en el fichero Hexadecimal de Intel" #: ihex.c:409 msgid "%B:%u: bad extended start address length in Intel Hex file" -msgstr "%B:%u: longitud de dirección de inicio extendida errónea en el fichero Hexadecimal de Intel" +msgstr "%B:%u: longitud de dirección de inicio extendida errónea en el fichero Hexadecimal de Intel" #: ihex.c:426 msgid "%B:%u: bad extended linear address record length in Intel Hex file" -msgstr "%B:%u: longitud de registro de dirección lineal extendida errónea en el fichero Hexadecimal de Intel" +msgstr "%B:%u: longitud de registro de dirección lineal extendida errónea en el fichero Hexadecimal de Intel" #: ihex.c:443 msgid "%B:%u: bad extended linear start address length in Intel Hex file" -msgstr "%B:%u: longitud de dirección de inicio lineal extendida errónea en el fichero Hexadecimal de Intel" +msgstr "%B:%u: longitud de dirección de inicio lineal extendida errónea en el fichero Hexadecimal de Intel" #: ihex.c:460 msgid "%B:%u: unrecognized ihex type %u in Intel Hex file" @@ -3142,43 +3143,43 @@ msgstr "%B: error interno en ihex_read_section" #: ihex.c:613 msgid "%B: bad section length in ihex_read_section" -msgstr "%B: longitud de sección errónea en ihex_read_section" +msgstr "%B: longitud de sección errónea en ihex_read_section" #: ihex.c:826 #, c-format msgid "%s: address 0x%s out of range for Intel Hex file" -msgstr "%s: la dirección 0x%s está fuera de rango en el fichero Hexadecimal de Intel" +msgstr "%s: la dirección 0x%s está fuera de rango en el fichero Hexadecimal de Intel" #: libbfd.c:863 msgid "%B: unable to get decompressed section %A" -msgstr "%B: no se puede obtener la sección %A descomprimida" +msgstr "%B: no se puede obtener la sección %A descomprimida" #: libbfd.c:1027 #, c-format msgid "Deprecated %s called at %s line %d in %s\n" -msgstr "Se llamó a %s que es obsoleto en %s línea %d en %s\n" +msgstr "Se llamó a %s que es obsoleto en %s línea %d en %s\n" #: libbfd.c:1030 #, c-format msgid "Deprecated %s called\n" -msgstr "Se llamó a %s que es obsoleto\n" +msgstr "Se llamó a %s que es obsoleto\n" #: linker.c:1911 msgid "%B: indirect symbol `%s' to `%s' is a loop" -msgstr "%B: el símbolo indirecto `%s' para `%s' es un ciclo" +msgstr "%B: el símbolo indirecto `%s' para `%s' es un ciclo" #: linker.c:2778 #, c-format msgid "Attempt to do relocatable link with %s input and %s output" -msgstr "Se intentó hacer un enlace reubicable con entrada %s y salida %s" +msgstr "Se intentó hacer un enlace reubicable con entrada %s y salida %s" #: linker.c:3105 msgid "%B: warning: ignoring duplicate section `%A'\n" -msgstr "%B: aviso: se descarta la sección duplicada `%A'\n" +msgstr "%B: aviso: se descarta la sección duplicada `%A'\n" #: linker.c:3119 msgid "%B: warning: duplicate section `%A' has different size\n" -msgstr "%B: aviso: la sección duplicada `%A' es de tamaño diferente\n" +msgstr "%B: aviso: la sección duplicada `%A' es de tamaño diferente\n" #: mach-o.c:3403 msgid "Mach-O header:\n" @@ -3234,147 +3235,147 @@ msgstr "Segmentos y Secciones:\n" #: mach-o.c:3427 msgid " #: Segment name Section name Address\n" -msgstr " #: Nombre segmento Nombre sección Dirección\n" +msgstr " #: Nombre segmento Nombre sección Dirección\n" #: merge.c:832 #, c-format msgid "%s: access beyond end of merged section (%ld)" -msgstr "%s: acceso más allá del final de la sección mezclada (%ld)" +msgstr "%s: acceso más allá del final de la sección mezclada (%ld)" #: mmo.c:456 #, c-format msgid "%s: No core to allocate section name %s\n" -msgstr "%s: No hay core para asignar el nombre de sección %s\n" +msgstr "%s: No hay core para asignar el nombre de sección %s\n" #: mmo.c:531 #, c-format msgid "%s: No core to allocate a symbol %d bytes long\n" -msgstr "%s: No hay core para asignar un símbolo de %d bytes de longitud\n" +msgstr "%s: No hay core para asignar un símbolo de %d bytes de longitud\n" #: mmo.c:1187 #, c-format msgid "%s: invalid mmo file: initialization value for $255 is not `Main'\n" -msgstr "%s: fichero mmo inválido: el valor de iniciación para $255 no es `Main'\n" +msgstr "%s: fichero mmo inválido: el valor de iniciación para $255 no es `Main'\n" #: mmo.c:1332 #, c-format msgid "%s: unsupported wide character sequence 0x%02X 0x%02X after symbol name starting with `%s'\n" -msgstr "%s: no se admite la secuencia de caracteres anchos 0x%02X 0x%02X después del nombre de símbolo que inicia con `%s'\n" +msgstr "%s: no se admite la secuencia de caracteres anchos 0x%02X 0x%02X después del nombre de símbolo que inicia con `%s'\n" #: mmo.c:1565 #, c-format msgid "%s: invalid mmo file: unsupported lopcode `%d'\n" -msgstr "%s: fichero mmo inválido: no se admite el código de operación-l `%d'\n" +msgstr "%s: fichero mmo inválido: no se admite el código de operación-l `%d'\n" #: mmo.c:1575 #, c-format msgid "%s: invalid mmo file: expected YZ = 1 got YZ = %d for lop_quote\n" -msgstr "%s: fichero mmo inválido: se esperaba YZ = 1 se obtuvo YZ = %d para lop_quote\n" +msgstr "%s: fichero mmo inválido: se esperaba YZ = 1 se obtuvo YZ = %d para lop_quote\n" #: mmo.c:1611 #, c-format msgid "%s: invalid mmo file: expected z = 1 or z = 2, got z = %d for lop_loc\n" -msgstr "%s: fichero mmo inválido: se esperaba z = 1 ó z = 2, se obtuvo z = %d para lop_loc\n" +msgstr "%s: fichero mmo inválido: se esperaba z = 1 ó z = 2, se obtuvo z = %d para lop_loc\n" #: mmo.c:1657 #, c-format msgid "%s: invalid mmo file: expected z = 1 or z = 2, got z = %d for lop_fixo\n" -msgstr "%s: fichero mmo inválido: se esperaba z = 1 ó z = 2, se obtuvo z = %d para lop_fixo\n" +msgstr "%s: fichero mmo inválido: se esperaba z = 1 ó z = 2, se obtuvo z = %d para lop_fixo\n" #: mmo.c:1696 #, c-format msgid "%s: invalid mmo file: expected y = 0, got y = %d for lop_fixrx\n" -msgstr "%s: fichero mmo inválido: se esperaba y = 0, se obtuvo y = %d para lop_fixrx\n" +msgstr "%s: fichero mmo inválido: se esperaba y = 0, se obtuvo y = %d para lop_fixrx\n" #: mmo.c:1705 #, c-format msgid "%s: invalid mmo file: expected z = 16 or z = 24, got z = %d for lop_fixrx\n" -msgstr "%s: fichero mmo inválido: se esperaba z = 16 ó z = 24, se obtuvo z = %d para lop_fixrx\n" +msgstr "%s: fichero mmo inválido: se esperaba z = 16 ó z = 24, se obtuvo z = %d para lop_fixrx\n" #: mmo.c:1728 #, c-format msgid "%s: invalid mmo file: leading byte of operand word must be 0 or 1, got %d for lop_fixrx\n" -msgstr "%s: fichero mmo inválido: el byte inicial del operando word debe ser 0 ó 1, se obtuvo %d para lop_fixrx\n" +msgstr "%s: fichero mmo inválido: el byte inicial del operando word debe ser 0 ó 1, se obtuvo %d para lop_fixrx\n" #: mmo.c:1751 #, c-format msgid "%s: cannot allocate file name for file number %d, %d bytes\n" -msgstr "%s: no se puede asignar el nombre de fichero para el número de fichero %d, %d bytes\n" +msgstr "%s: no se puede asignar el nombre de fichero para el número de fichero %d, %d bytes\n" #: mmo.c:1771 #, c-format msgid "%s: invalid mmo file: file number %d `%s', was already entered as `%s'\n" -msgstr "%s: fichero mmo inválido: el número de fichero %d `%s' ya se había introducido como `%s'\n" +msgstr "%s: fichero mmo inválido: el número de fichero %d `%s' ya se había introducido como `%s'\n" #: mmo.c:1784 #, c-format msgid "%s: invalid mmo file: file name for number %d was not specified before use\n" -msgstr "%s: fichero mmo inválido: no se especificó un nombre de fichero para el número %d antes de utilizarse\n" +msgstr "%s: fichero mmo inválido: no se especificó un nombre de fichero para el número %d antes de utilizarse\n" #: mmo.c:1890 #, c-format msgid "%s: invalid mmo file: fields y and z of lop_stab non-zero, y: %d, z: %d\n" -msgstr "%s: fichero mmo inválido: los campos y y z de lop_stab no son cero, y: %d, z: %d\n" +msgstr "%s: fichero mmo inválido: los campos y y z de lop_stab no son cero, y: %d, z: %d\n" #: mmo.c:1926 #, c-format msgid "%s: invalid mmo file: lop_end not last item in file\n" -msgstr "%s: fichero mmo inválido: lop_end no es el último elemento en el fichero\n" +msgstr "%s: fichero mmo inválido: lop_end no es el último elemento en el fichero\n" #: mmo.c:1939 #, c-format msgid "%s: invalid mmo file: YZ of lop_end (%ld) not equal to the number of tetras to the preceding lop_stab (%ld)\n" -msgstr "%s: fichero mmo inválido: YZ de lop_end (%ld) no es igual al número de tetras del lop_stab precedente (%ld)\n" +msgstr "%s: fichero mmo inválido: YZ de lop_end (%ld) no es igual al número de tetras del lop_stab precedente (%ld)\n" #: mmo.c:2649 #, c-format msgid "%s: invalid symbol table: duplicate symbol `%s'\n" -msgstr "%s: tabla de símbolos inválida: símbolo `%s' duplicado\n" +msgstr "%s: tabla de símbolos inválida: símbolo `%s' duplicado\n" #: mmo.c:2889 #, c-format msgid "%s: Bad symbol definition: `Main' set to %s rather than the start address %s\n" -msgstr "%s: Definición de símbolo errónea: `Main' se estableció como %s en lugar de la dirección de inicio %s\n" +msgstr "%s: Definición de símbolo errónea: `Main' se estableció como %s en lugar de la dirección de inicio %s\n" #: mmo.c:2981 #, c-format msgid "%s: warning: symbol table too large for mmo, larger than 65535 32-bit words: %d. Only `Main' will be emitted.\n" -msgstr "%s: aviso: la tabla de símbolos es demasiado grande para mmo, es más grande que 65535 words de 32-bit: %d. Sólo se emitirá `Main'.\n" +msgstr "%s: aviso: la tabla de símbolos es demasiado grande para mmo, es más grande que 65535 words de 32-bit: %d. Sólo se emitirá `Main'.\n" #: mmo.c:3026 #, c-format msgid "%s: internal error, symbol table changed size from %d to %d words\n" -msgstr "%s: error interno, la tabla de símbolos cambió de tamaño de %d a %d words\n" +msgstr "%s: error interno, la tabla de símbolos cambió de tamaño de %d a %d words\n" #: mmo.c:3078 #, c-format msgid "%s: internal error, internal register section %s had contents\n" -msgstr "%s: error interno, la sección interna de registros %s tiene contenido\n" +msgstr "%s: error interno, la sección interna de registros %s tiene contenido\n" #: mmo.c:3129 #, c-format msgid "%s: no initialized registers; section length 0\n" -msgstr "%s: no hay registros iniciados; longitud de sección 0\n" +msgstr "%s: no hay registros iniciados; longitud de sección 0\n" #: mmo.c:3135 #, c-format msgid "%s: too many initialized registers; section length %ld\n" -msgstr "%s: demasiados registros iniciados: longitud de sección %ld\n" +msgstr "%s: demasiados registros iniciados: longitud de sección %ld\n" #: mmo.c:3140 #, c-format msgid "%s: invalid start address for initialized registers of length %ld: 0x%lx%08lx\n" -msgstr "%s: dirección de inicio inválida para los registros inicializados de longitud %ld: 0x%lx%08lx\n" +msgstr "%s: dirección de inicio inválida para los registros inicializados de longitud %ld: 0x%lx%08lx\n" #: oasys.c:882 #, c-format msgid "%s: can not represent section `%s' in oasys" -msgstr "%s: no se puede representar la sección `%s' en oasys" +msgstr "%s: no se puede representar la sección `%s' en oasys" #: osf-core.c:140 #, c-format msgid "Unhandled OSF/1 core file section type %d\n" -msgstr "Tipo de sección de fichero núcleo OSF/1 %d sin manejar\n" +msgstr "Tipo de sección de fichero núcleo OSF/1 %d sin manejar\n" #: pe-mips.c:607 msgid "%B: `ld -r' not supported with PE MIPS objects\n" @@ -3394,12 +3395,12 @@ msgstr "%B: salto demasiado lejos\n" #: pe-mips.c:771 msgid "%B: bad pair/reflo after refhi\n" -msgstr "%B: pair/reflo erróneo después de refhi\n" +msgstr "%B: pair/reflo erróneo después de refhi\n" #: pei-x86_64.c:444 #, c-format msgid "warning: .pdata section size (%ld) is not a multiple of %d\n" -msgstr "aviso: el tamaño de la sección .pdata (%ld) no es un múltiplo de %d\n" +msgstr "aviso: el tamaño de la sección .pdata (%ld) no es un múltiplo de %d\n" #: pei-x86_64.c:448 peigen.c:1618 peigen.c:1801 pepigen.c:1618 pepigen.c:1801 #: pex64igen.c:1618 pex64igen.c:1801 @@ -3409,37 +3410,37 @@ msgid "" "The Function Table (interpreted .pdata section contents)\n" msgstr "" "\n" -"La Tabla de Funciones (se interpretaron los contenidos de la sección .pdata)\n" +"La Tabla de Funciones (se interpretaron los contenidos de la sección .pdata)\n" #: pei-x86_64.c:450 #, c-format msgid "vma:\t\t\tBeginAddress\t EndAddress\t UnwindData\n" -msgstr "vma:\t\t\tDireccInicio\t DireccFin \t InformaciónDesenvuelta\n" +msgstr "vma:\t\t\tDireccInicio\t DireccFin \t InformaciónDesenvuelta\n" #. XXX code yet to be written. #: peicode.h:751 msgid "%B: Unhandled import type; %x" -msgstr "%B: Tipo de importación sin manejar; %x" +msgstr "%B: Tipo de importación sin manejar; %x" #: peicode.h:756 msgid "%B: Unrecognised import type; %x" -msgstr "%B: No se reconocer el tipo de importación; %x" +msgstr "%B: No se reconocer el tipo de importación; %x" #: peicode.h:770 msgid "%B: Unrecognised import name type; %x" -msgstr "%B: No se reconoce el tipo de nombre de importación; %x" +msgstr "%B: No se reconoce el tipo de nombre de importación; %x" #: peicode.h:1162 msgid "%B: Unrecognised machine type (0x%x) in Import Library Format archive" -msgstr "%B: No se reconoce el tipo de máquina (0x%x) en el archivo de Formato de Importación de Bibliotecas" +msgstr "%B: No se reconoce el tipo de máquina (0x%x) en el archivo de Formato de Importación de Bibliotecas" #: peicode.h:1174 msgid "%B: Recognised but unhandled machine type (0x%x) in Import Library Format archive" -msgstr "%B: Se reconoce el tipo de máquina (0x%x) pero no se maneja en el archivo de Formato de Importación de Bibliotecas" +msgstr "%B: Se reconoce el tipo de máquina (0x%x) pero no se maneja en el archivo de Formato de Importación de Bibliotecas" #: peicode.h:1192 msgid "%B: size field is zero in Import Library Format header" -msgstr "%B: el tamaño del campo es cero en el encabezado del Formato de Importación de Bibliotecas" +msgstr "%B: el tamaño del campo es cero en el encabezado del Formato de Importación de Bibliotecas" #: peicode.h:1223 msgid "%B: string not null terminated in ILF object file." @@ -3472,7 +3473,7 @@ msgstr "Campo de opciones = 0x%.2x\n" #: ppcboot.c:427 #, c-format msgid "Partition name = \"%s\"\n" -msgstr "Nombre de la partición = \"%s\"\n" +msgstr "Nombre de la partición = \"%s\"\n" #: ppcboot.c:446 #, c-format @@ -3481,22 +3482,22 @@ msgid "" "Partition[%d] start = { 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x }\n" msgstr "" "\n" -"Partición[%d] inicio = { 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x }\n" +"Partición[%d] inicio = { 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x }\n" #: ppcboot.c:452 #, c-format msgid "Partition[%d] end = { 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x }\n" -msgstr "Partición[%d] fin = { 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x }\n" +msgstr "Partición[%d] fin = { 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x }\n" #: ppcboot.c:458 #, c-format msgid "Partition[%d] sector = 0x%.8lx (%ld)\n" -msgstr "Partición[%d] sector = 0x%.8lx (%ld)\n" +msgstr "Partición[%d] sector = 0x%.8lx (%ld)\n" #: ppcboot.c:460 #, c-format msgid "Partition[%d] length = 0x%.8lx (%ld)\n" -msgstr "Partición[%d] longitud = 0x%.8lx (%ld)\n" +msgstr "Partición[%d] longitud = 0x%.8lx (%ld)\n" #: som.c:5471 #, c-format @@ -3505,7 +3506,7 @@ msgid "" "Exec Auxiliary Header\n" msgstr "" "\n" -"Encabezado Auxiliar de Ejecución\n" +"Encabezado Auxiliar de Ejecución\n" #: som.c:5776 msgid "som_sizeof_headers unimplemented" @@ -3513,19 +3514,19 @@ msgstr "som_sizeof_headers sin implementar" #: srec.c:261 msgid "%B:%d: Unexpected character `%s' in S-record file\n" -msgstr "%B:%d: Carácter `%s' inesperado en el fichero S-record\n" +msgstr "%B:%d: Carácter `%s' inesperado en el fichero S-record\n" #: srec.c:567 srec.c:600 msgid "%B:%d: Bad checksum in S-record file\n" -msgstr "%B:%d: Suma de comprobación errónea en el fichero S-record\n" +msgstr "%B:%d: Suma de comprobación errónea en el fichero S-record\n" #: stabs.c:279 msgid "%B(%A+0x%lx): Stabs entry has invalid string index." -msgstr "%B(%A+0x%lx): La entrada de cabos tiene una cadena índice inválida." +msgstr "%B(%A+0x%lx): La entrada de cabos tiene una cadena índice inválida." #: syms.c:1079 msgid "Unsupported .stab relocation" -msgstr "No se admite la reubicación .stab" +msgstr "No se admite la reubicación .stab" #: vms-alpha.c:1287 #, c-format @@ -3550,7 +3551,7 @@ msgstr "orden ETIR %d desconocida" #: vms-alpha.c:1755 #, c-format msgid "bad section index in %s" -msgstr "índice de sección erróneo en %s" +msgstr "índice de sección erróneo en %s" #: vms-alpha.c:1768 #, c-format @@ -3575,7 +3576,7 @@ msgstr "%s: sin implementar" #: vms-alpha.c:2206 #, c-format msgid "invalid use of %s with contexts" -msgstr "uso inválido de %s en contextos" +msgstr "uso inválido de %s en contextos" #: vms-alpha.c:2240 #, c-format @@ -3584,31 +3585,31 @@ msgstr "orden %d reservada" #: vms-alpha.c:2325 msgid "Object module NOT error-free !\n" -msgstr "¡ El módulo objeto NO está libre de errores !\n" +msgstr "¡ El módulo objeto NO está libre de errores !\n" #: vms-alpha.c:2754 #, c-format msgid "Symbol %s replaced by %s\n" -msgstr "Se reemplazó el símbolo %s por %s\n" +msgstr "Se reemplazó el símbolo %s por %s\n" #: vms-alpha.c:3757 #, c-format msgid "SEC_RELOC with no relocs in section %s" -msgstr "SEC_RELOC sin reubicaciones en la sección %s" +msgstr "SEC_RELOC sin reubicaciones en la sección %s" #: vms-alpha.c:3810 vms-alpha.c:4041 #, c-format msgid "Size error in section %s" -msgstr "Error de tamaño en la sección %s" +msgstr "Error de tamaño en la sección %s" #: vms-alpha.c:3980 msgid "Spurious ALPHA_R_BSR reloc" -msgstr "Reubicación ALPHA_R_BSR espuria" +msgstr "Reubicación ALPHA_R_BSR espuria" #: vms-alpha.c:4028 #, c-format msgid "Unhandled relocation %s" -msgstr "Reubicación %s sin manejar" +msgstr "Reubicación %s sin manejar" #: vms-alpha.c:4318 #, c-format @@ -3654,27 +3655,27 @@ msgstr "DST__K_SET_STMTNUM sin implementar" #: vms-alpha.c:4491 #, c-format msgid "unknown line command %d" -msgstr "orden de línea %d desconocida" +msgstr "orden de línea %d desconocida" #: vms-alpha.c:4938 vms-alpha.c:4955 vms-alpha.c:4969 vms-alpha.c:4984 #: vms-alpha.c:4996 vms-alpha.c:5007 vms-alpha.c:5019 #, c-format msgid "Unknown reloc %s + %s" -msgstr "Reubicación %s + %s desconocida" +msgstr "Reubicación %s + %s desconocida" #: vms-alpha.c:5074 #, c-format msgid "Unknown reloc %s" -msgstr "Reubicación %s desconocida" +msgstr "Reubicación %s desconocida" #: vms-alpha.c:5087 msgid "Invalid section index in ETIR" -msgstr "Índice de sección inválido en ETIR" +msgstr "Índice de sección inválido en ETIR" #: vms-alpha.c:5134 #, c-format msgid "Unknown symbol in command %s" -msgstr "Símbolo desconocido en la orden %s" +msgstr "Símbolo desconocido en la orden %s" #: vms-alpha.c:5649 #, c-format @@ -3684,7 +3685,7 @@ msgstr " EMH %u (lon=%u): " #: vms-alpha.c:5658 #, c-format msgid "Module header\n" -msgstr "Encabezado de módulo\n" +msgstr "Encabezado de módulo\n" #: vms-alpha.c:5659 #, c-format @@ -3694,17 +3695,17 @@ msgstr " nivel estruct : %u\n" #: vms-alpha.c:5660 #, c-format msgid " max record size: %u\n" -msgstr " tam reg máximo : %u\n" +msgstr " tam reg máximo : %u\n" #: vms-alpha.c:5663 #, c-format msgid " module name : %.*s\n" -msgstr " nombre módulo : %.*s\n" +msgstr " nombre módulo : %.*s\n" #: vms-alpha.c:5665 #, c-format msgid " module version : %.*s\n" -msgstr " versión módulo : %.*s\n" +msgstr " versión módulo : %.*s\n" #: vms-alpha.c:5667 #, c-format @@ -3734,12 +3735,12 @@ msgstr " fichero: %.*s\n" #: vms-alpha.c:5688 #, c-format msgid "Title Text Header\n" -msgstr "Encabezado de Texto de Título\n" +msgstr "Encabezado de Texto de Título\n" #: vms-alpha.c:5689 #, c-format msgid " title: %.*s\n" -msgstr " título: %.*s\n" +msgstr " título: %.*s\n" #: vms-alpha.c:5696 #, c-format @@ -3764,27 +3765,27 @@ msgstr " EEOM (lon=%u):\n" #: vms-alpha.c:5714 #, c-format msgid " number of cond linkage pairs: %u\n" -msgstr " número de pares de enlace cond: %u\n" +msgstr " número de pares de enlace cond: %u\n" #: vms-alpha.c:5716 #, c-format msgid " completion code: %u\n" -msgstr " código de completado: %u\n" +msgstr " código de completado: %u\n" #: vms-alpha.c:5720 #, c-format msgid " transfer addr flags: 0x%02x\n" -msgstr " ops dirección transf: 0x%02x\n" +msgstr " ops dirección transf: 0x%02x\n" #: vms-alpha.c:5721 #, c-format msgid " transfer addr psect: %u\n" -msgstr " psect dirección transf: %u\n" +msgstr " psect dirección transf: %u\n" #: vms-alpha.c:5723 #, c-format msgid " transfer address : 0x%08x\n" -msgstr " dirección transf : 0x%08x\n" +msgstr " dirección transf : 0x%08x\n" #: vms-alpha.c:5732 msgid " WEAK" @@ -3879,12 +3880,12 @@ msgstr " entrada EGSD %2u (tipo: %u, lon: %u): " #: vms-alpha.c:5810 #, c-format msgid "PSC - Program section definition\n" -msgstr "PSC - Definición de sección de programa\n" +msgstr "PSC - Definición de sección de programa\n" #: vms-alpha.c:5811 vms-alpha.c:5828 #, c-format msgid " alignment : 2**%u\n" -msgstr " alineación : 2**%u\n" +msgstr " alineación : 2**%u\n" #: vms-alpha.c:5812 vms-alpha.c:5829 #, c-format @@ -3904,7 +3905,7 @@ msgstr " nombre : %.*s\n" #: vms-alpha.c:5827 #, c-format msgid "SPSC - Shared Image Program section def\n" -msgstr "SPSC - def sección Programa de Imagen Compartida\n" +msgstr "SPSC - def sección Programa de Imagen Compartida\n" #: vms-alpha.c:5833 #, c-format @@ -3929,7 +3930,7 @@ msgstr " name : %.*s\n" #: vms-alpha.c:5851 #, c-format msgid "SYM - Global symbol definition\n" -msgstr "SYM - Definición de símbolo global\n" +msgstr "SYM - Definición de símbolo global\n" #: vms-alpha.c:5852 vms-alpha.c:5912 vms-alpha.c:5933 vms-alpha.c:5952 #, c-format @@ -3944,17 +3945,17 @@ msgstr " despl psect: 0x%08x\n" #: vms-alpha.c:5859 #, c-format msgid " code address: 0x%08x\n" -msgstr " dirección código: 0x%08x\n" +msgstr " dirección código: 0x%08x\n" #: vms-alpha.c:5861 #, c-format msgid " psect index for entry point : %u\n" -msgstr " índice psect para punto de entrada : %u\n" +msgstr " índice psect para punto de entrada : %u\n" #: vms-alpha.c:5864 vms-alpha.c:5940 vms-alpha.c:5959 #, c-format msgid " psect index : %u\n" -msgstr " índice psect : %u\n" +msgstr " índice psect : %u\n" #: vms-alpha.c:5866 vms-alpha.c:5942 vms-alpha.c:5961 #, c-format @@ -3964,12 +3965,12 @@ msgstr " nombre : %.*s\n" #: vms-alpha.c:5873 #, c-format msgid "SYM - Global symbol reference\n" -msgstr "SYM - Referencia de símbolo global\n" +msgstr "SYM - Referencia de símbolo global\n" #: vms-alpha.c:5885 #, c-format msgid "IDC - Ident Consistency check\n" -msgstr "IDC - Revisor de Consistencia de Identación\n" +msgstr "IDC - Revisor de Consistencia de Identación\n" #: vms-alpha.c:5886 #, c-format @@ -4009,12 +4010,12 @@ msgstr " ident ascii : %.*s\n" #: vms-alpha.c:5911 #, c-format msgid "SYMG - Universal symbol definition\n" -msgstr "SYMG - Definición de símbolo universal\n" +msgstr "SYMG - Definición de símbolo universal\n" #: vms-alpha.c:5915 #, c-format msgid " symbol vector offset: 0x%08x\n" -msgstr " despl vector símbolo: 0x%08x\n" +msgstr " despl vector símbolo: 0x%08x\n" #: vms-alpha.c:5917 #, c-format @@ -4029,12 +4030,12 @@ msgstr " descr proc : 0x%08x\n" #: vms-alpha.c:5921 #, c-format msgid " psect index: %u\n" -msgstr " índice psect: %u\n" +msgstr " índice psect: %u\n" #: vms-alpha.c:5932 #, c-format msgid "SYMV - Vectored symbol definition\n" -msgstr "SYMV - Definición de símbolo vectorizado\n" +msgstr "SYMV - Definición de símbolo vectorizado\n" #: vms-alpha.c:5936 #, c-format @@ -4049,12 +4050,12 @@ msgstr " despl psect : %u\n" #: vms-alpha.c:5951 #, c-format msgid "SYMM - Global symbol definition with version\n" -msgstr "SYMM - Definición de símbolo global con versión\n" +msgstr "SYMM - Definición de símbolo global con versión\n" #: vms-alpha.c:5955 #, c-format msgid " version mask: 0x%08x\n" -msgstr " máscara versión: 0x%08x\n" +msgstr " máscara versión: 0x%08x\n" #: vms-alpha.c:5966 #, c-format @@ -4064,7 +4065,7 @@ msgstr "tipo de entrada egsd %u sin manejar\n" #: vms-alpha.c:6000 #, c-format msgid " linkage index: %u, replacement insn: 0x%08x\n" -msgstr " índice enlace: %u, insn reemplazo: 0x%08x\n" +msgstr " índice enlace: %u, insn reemplazo: 0x%08x\n" #: vms-alpha.c:6003 #, c-format @@ -4129,7 +4130,7 @@ msgstr "STA_LI (pila literal)\n" #: vms-alpha.c:6069 #, c-format msgid "STA_MOD (stack module)\n" -msgstr "STA_MOD (pila módulo)\n" +msgstr "STA_MOD (pila módulo)\n" #: vms-alpha.c:6072 #, c-format @@ -4169,7 +4170,7 @@ msgstr "STO_GBL (almacena global) %.*s\n" #: vms-alpha.c:6102 #, c-format msgid "STO_CA (store code address) %.*s\n" -msgstr "STO_CA (almacena direcc código) %.*s\n" +msgstr "STO_CA (almacena direcc código) %.*s\n" #: vms-alpha.c:6106 #, c-format @@ -4214,47 +4215,47 @@ msgstr "STO_BR_PS (almacena ramif psect + despl) *pend*\n" #: vms-alpha.c:6139 #, c-format msgid "OPR_NOP (no-operation)\n" -msgstr "OPR_NOP (no operación)\n" +msgstr "OPR_NOP (no operación)\n" #: vms-alpha.c:6142 #, c-format msgid "OPR_ADD (add)\n" -msgstr "OPR_ADD (adición)\n" +msgstr "OPR_ADD (adición)\n" #: vms-alpha.c:6145 #, c-format msgid "OPR_SUB (substract)\n" -msgstr "OPR_SUB (sustracción)\n" +msgstr "OPR_SUB (sustracción)\n" #: vms-alpha.c:6148 #, c-format msgid "OPR_MUL (multiply)\n" -msgstr "OPR_MUL (multiplicación)\n" +msgstr "OPR_MUL (multiplicación)\n" #: vms-alpha.c:6151 #, c-format msgid "OPR_DIV (divide)\n" -msgstr "OPR_DIV (división)\n" +msgstr "OPR_DIV (división)\n" #: vms-alpha.c:6154 #, c-format msgid "OPR_AND (logical and)\n" -msgstr "OPR_AND (and lógico)\n" +msgstr "OPR_AND (and lógico)\n" #: vms-alpha.c:6157 #, c-format msgid "OPR_IOR (logical inclusive or)\n" -msgstr "OPR_IOR (or lógico inclusivo)\n" +msgstr "OPR_IOR (or lógico inclusivo)\n" #: vms-alpha.c:6160 #, c-format msgid "OPR_EOR (logical exclusive or)\n" -msgstr "OPR_EOR (or lógico exclusivo)\n" +msgstr "OPR_EOR (or lógico exclusivo)\n" #: vms-alpha.c:6163 #, c-format msgid "OPR_NEG (negate)\n" -msgstr "OPR_NEG (negación)\n" +msgstr "OPR_NEG (negación)\n" #: vms-alpha.c:6166 #, c-format @@ -4269,7 +4270,7 @@ msgstr "OPR_INSV (insertar campo)\n" #: vms-alpha.c:6172 #, c-format msgid "OPR_ASH (arithmetic shift)\n" -msgstr "OPR_ASH (despl aritmético)\n" +msgstr "OPR_ASH (despl aritmético)\n" #: vms-alpha.c:6175 #, c-format @@ -4279,17 +4280,17 @@ msgstr "OPR_USH (despl sin signo)\n" #: vms-alpha.c:6178 #, c-format msgid "OPR_ROT (rotate)\n" -msgstr "OPR_ROT (rotación)\n" +msgstr "OPR_ROT (rotación)\n" #: vms-alpha.c:6181 #, c-format msgid "OPR_SEL (select)\n" -msgstr "OPR_SEL (selección)\n" +msgstr "OPR_SEL (selección)\n" #: vms-alpha.c:6184 #, c-format msgid "OPR_REDEF (redefine symbol to curr location)\n" -msgstr "OPR_REDEF (redefine símbolo a la ubicación actual)\n" +msgstr "OPR_REDEF (redefine símbolo a la ubicación actual)\n" #: vms-alpha.c:6187 #, c-format @@ -4309,7 +4310,7 @@ msgstr "STC_LP_PSB (almacena par de enlace cond + firma)\n" #: vms-alpha.c:6196 #, c-format msgid " linkage index: %u, procedure: %.*s\n" -msgstr " índice enlace: %u, procedimiento: %.*s\n" +msgstr " índice enlace: %u, procedimiento: %.*s\n" #: vms-alpha.c:6199 #, c-format @@ -4324,17 +4325,17 @@ msgstr "STC_GBL (almacena cond global)\n" #: vms-alpha.c:6203 #, c-format msgid " linkage index: %u, global: %.*s\n" -msgstr " índice enlace: %u, global: %.*s\n" +msgstr " índice enlace: %u, global: %.*s\n" #: vms-alpha.c:6207 #, c-format msgid "STC_GCA (store cond code address)\n" -msgstr "STC_GCA (almacena dirección de código cond)\n" +msgstr "STC_GCA (almacena dirección de código cond)\n" #: vms-alpha.c:6208 #, c-format msgid " linkage index: %u, procedure name: %.*s\n" -msgstr " índice enlace: %u, nombre procedimiento: %.*s\n" +msgstr " índice enlace: %u, nombre procedimiento: %.*s\n" #: vms-alpha.c:6212 #, c-format @@ -4344,12 +4345,12 @@ msgstr "STC_PS (almacena psect cond + despl)\n" #: vms-alpha.c:6214 #, c-format msgid " linkage index: %u, psect: %u, offset: 0x%08x %08x\n" -msgstr " índice enlace: %u, psect: %u, despl: 0x%08x %08x\n" +msgstr " índice enlace: %u, psect: %u, despl: 0x%08x %08x\n" #: vms-alpha.c:6221 #, c-format msgid "STC_NOP_GBL (store cond NOP at global addr)\n" -msgstr "STC_NOP_GBL (almacena NOP cond en dirección global)\n" +msgstr "STC_NOP_GBL (almacena NOP cond en dirección global)\n" #: vms-alpha.c:6225 #, c-format @@ -4359,7 +4360,7 @@ msgstr "STC_NOP_PS (almacena NOP cond en psect + despl)\n" #: vms-alpha.c:6229 #, c-format msgid "STC_BSR_GBL (store cond BSR at global addr)\n" -msgstr "STC_BSR_GBL (almacena BSR cond en dirección global)\n" +msgstr "STC_BSR_GBL (almacena BSR cond en dirección global)\n" #: vms-alpha.c:6233 #, c-format @@ -4369,7 +4370,7 @@ msgstr "STC_BSR_PS (almacena BSR cond en psect + despl)\n" #: vms-alpha.c:6237 #, c-format msgid "STC_LDA_GBL (store cond LDA at global addr)\n" -msgstr "STC_LDA_GBL (almacena LDA cond en dirección global)\n" +msgstr "STC_LDA_GBL (almacena LDA cond en dirección global)\n" #: vms-alpha.c:6241 #, c-format @@ -4379,7 +4380,7 @@ msgstr "STC_LDA_PS (almacena LDA cond en psect + despl)\n" #: vms-alpha.c:6245 #, c-format msgid "STC_BOH_GBL (store cond BOH at global addr)\n" -msgstr "STC_BOH_GBL (almacena BOH cond en dirección global)\n" +msgstr "STC_BOH_GBL (almacena BOH cond en dirección global)\n" #: vms-alpha.c:6249 #, c-format @@ -4389,7 +4390,7 @@ msgstr "STC_BOH_PS (almacena BOH cond en psect + despl)\n" #: vms-alpha.c:6254 #, c-format msgid "STC_NBH_GBL (store cond or hint at global addr)\n" -msgstr "STC_NBH_GBL (almacena cond o pista en dirección global)\n" +msgstr "STC_NBH_GBL (almacena cond o pista en dirección global)\n" #: vms-alpha.c:6258 #, c-format @@ -4399,27 +4400,27 @@ msgstr "STC_NBH_PS (almacena cond o pista en psect + despl)\n" #: vms-alpha.c:6262 #, c-format msgid "CTL_SETRB (set relocation base)\n" -msgstr "CTL_SETRB (define base de reubicación)\n" +msgstr "CTL_SETRB (define base de reubicación)\n" #: vms-alpha.c:6268 #, c-format msgid "CTL_AUGRB (augment relocation base) %u\n" -msgstr "CTL_AUGRB (aumenta base de reubicación) %u\n" +msgstr "CTL_AUGRB (aumenta base de reubicación) %u\n" #: vms-alpha.c:6272 #, c-format msgid "CTL_DFLOC (define location)\n" -msgstr "CTL_DFLOC (define ubicación)\n" +msgstr "CTL_DFLOC (define ubicación)\n" #: vms-alpha.c:6275 #, c-format msgid "CTL_STLOC (set location)\n" -msgstr "CTL_STLOC (establece ubicación)\n" +msgstr "CTL_STLOC (establece ubicación)\n" #: vms-alpha.c:6278 #, c-format msgid "CTL_STKDL (stack defined location)\n" -msgstr "CTL_STKDL (ubicación definida de pila)\n" +msgstr "CTL_STKDL (ubicación definida de pila)\n" #: vms-alpha.c:6281 vms-alpha.c:6695 #, c-format @@ -4511,7 +4512,7 @@ msgstr "matriz no contigua de %s\n" #: vms-alpha.c:6650 #, c-format msgid "dimct: %u, aflags: 0x%02x, digits: %u, scale: %u\n" -msgstr "dimct: %u, aops: 0x%02x, dígitos: %u, escala: %u\n" +msgstr "dimct: %u, aops: 0x%02x, dígitos: %u, escala: %u\n" #: vms-alpha.c:6654 #, c-format @@ -4531,7 +4532,7 @@ msgstr "[%u]: %u\n" #: vms-alpha.c:6668 #, c-format msgid "Bounds:\n" -msgstr "Límites:\n" +msgstr "Límites:\n" #: vms-alpha.c:6673 #, c-format @@ -4581,7 +4582,7 @@ msgstr "(valor restante)\n" #: vms-alpha.c:6731 #, c-format msgid "(value spec follows)\n" -msgstr "(valor spec a continuación)\n" +msgstr "(valor spec a continuación)\n" #: vms-alpha.c:6734 #, c-format @@ -4591,7 +4592,7 @@ msgstr "(en el despl de bit %u)\n" #: vms-alpha.c:6737 #, c-format msgid "(reg: %u, disp: %u, indir: %u, kind: " -msgstr "(reg: %u, disp: %u, indir: %u, género: " +msgstr "(reg: %u, disp: %u, indir: %u, género: " #: vms-alpha.c:6744 msgid "literal" @@ -4599,7 +4600,7 @@ msgstr "literal" #: vms-alpha.c:6747 msgid "address" -msgstr "dirección" +msgstr "dirección" #: vms-alpha.c:6750 msgid "desc" @@ -4612,7 +4613,7 @@ msgstr "reg" #: vms-alpha.c:6828 #, c-format msgid "Debug symbol table:\n" -msgstr "Tabla de símbolos de depuración:\n" +msgstr "Tabla de símbolos de depuración:\n" #: vms-alpha.c:6839 #, c-format @@ -4627,12 +4628,12 @@ msgstr " tipo: %3u, lon: %3u (en 0x%08x): " #: vms-alpha.c:6858 #, c-format msgid "cannot read DST symbol\n" -msgstr "no se puede leer el símbolo DST\n" +msgstr "no se puede leer el símbolo DST\n" #: vms-alpha.c:6901 #, c-format msgid "standard data: %s\n" -msgstr "datos estándar: %s\n" +msgstr "datos estándar: %s\n" #: vms-alpha.c:6904 vms-alpha.c:6988 #, c-format @@ -4652,7 +4653,7 @@ msgstr " ops: %d, lenguaje: %u, mayor: %u, menor: %u\n" #: vms-alpha.c:6918 vms-alpha.c:7184 #, c-format msgid " module name: %.*s\n" -msgstr " nom módulo : %.*s\n" +msgstr " nom módulo : %.*s\n" #: vms-alpha.c:6921 #, c-format @@ -4671,7 +4672,7 @@ msgstr "rtnini\n" #: vms-alpha.c:6934 #, c-format msgid " flags: %u, address: 0x%08x, pd-address: 0x%08x\n" -msgstr " ops: %u, dirección: 0x%08x, direcc-pd: 0x%08x\n" +msgstr " ops: %u, dirección: 0x%08x, direcc-pd: 0x%08x\n" #: vms-alpha.c:6939 #, c-format @@ -4686,7 +4687,7 @@ msgstr "rtnfin: tam 0x%08x\n" #: vms-alpha.c:6955 #, c-format msgid "prolog: bkpt address 0x%08x\n" -msgstr "prolog: dirección bkpt 0x%08x\n" +msgstr "prolog: dirección bkpt 0x%08x\n" #: vms-alpha.c:6963 #, c-format @@ -4696,7 +4697,7 @@ msgstr "epilog: ops: %u, cuenta: %u\n" #: vms-alpha.c:6972 #, c-format msgid "blkbeg: address: 0x%08x, name: %.*s\n" -msgstr "blkini: dirección: 0x%08x, nombre: %.*s\n" +msgstr "blkini: dirección: 0x%08x, nombre: %.*s\n" #: vms-alpha.c:6981 #, c-format @@ -4746,12 +4747,12 @@ msgstr "rango discontinuo (nbr: %u)\n" #: vms-alpha.c:7040 #, c-format msgid " address: 0x%08x, size: %u\n" -msgstr " dirección: 0x%08x, tamaño: %u\n" +msgstr " dirección: 0x%08x, tamaño: %u\n" #: vms-alpha.c:7050 #, c-format msgid "line num (len: %u)\n" -msgstr "num línea (lon: %u)\n" +msgstr "num línea (lon: %u)\n" #: vms-alpha.c:7067 #, c-format @@ -4826,7 +4827,7 @@ msgstr "delta pc +%-4d" #: vms-alpha.c:7134 #, c-format msgid " pc: 0x%08x line: %5u\n" -msgstr " pc: 0x%08x línea: %5u\n" +msgstr " pc: 0x%08x línea: %5u\n" #: vms-alpha.c:7139 #, c-format @@ -4896,7 +4897,7 @@ msgstr "no se puede leer EIHD\n" #: vms-alpha.c:7275 #, c-format msgid "EIHD: (size: %u, nbr blocks: %u)\n" -msgstr "EIHD: (tamaño: %u, bloques nbr: %u)\n" +msgstr "EIHD: (tamaño: %u, bloques nbr: %u)\n" #: vms-alpha.c:7278 #, c-format @@ -4942,7 +4943,7 @@ msgstr " info compos rva: " #: vms-alpha.c:7322 #, c-format msgid ", symbol vector rva: " -msgstr " vector símbolo rva: " +msgstr " vector símbolo rva: " #: vms-alpha.c:7325 #, c-format @@ -4951,7 +4952,7 @@ msgid "" " version array off: %u\n" msgstr "" "\n" -" matriz versión despl: %u\n" +" matriz versión despl: %u\n" #: vms-alpha.c:7329 #, c-format @@ -4986,7 +4987,7 @@ msgstr ", alias: %u\n" #: vms-alpha.c:7388 #, c-format msgid "system version array information:\n" -msgstr "información de matriz de versión de sistema:\n" +msgstr "información de matriz de versión de sistema:\n" #: vms-alpha.c:7392 #, c-format @@ -4996,7 +4997,7 @@ msgstr "no se puede leer el encabezado EIHVN\n" #: vms-alpha.c:7402 #, c-format msgid "cannot read EIHVN version\n" -msgstr "no se puede leer la versión EIHVN\n" +msgstr "no se puede leer la versión EIHVN\n" #: vms-alpha.c:7405 #, c-format @@ -5065,7 +5066,7 @@ msgstr "CPU " #: vms-alpha.c:7454 msgid "VOLATILE " -msgstr "VOLÁTIL " +msgstr "VOLÁTIL " #: vms-alpha.c:7457 msgid "SHELL " @@ -5100,7 +5101,7 @@ msgstr "no se puede leer EIHA\n" #: vms-alpha.c:7488 #, c-format msgid "Image activation: (size=%u)\n" -msgstr "Activa imagen : (tamaño=%u)\n" +msgstr "Activa imagen : (tamaño=%u)\n" #: vms-alpha.c:7490 #, c-format @@ -5135,7 +5136,7 @@ msgstr "no se puede leer EIHI\n" #: vms-alpha.c:7516 #, c-format msgid "Image identification: (major: %u, minor: %u)\n" -msgstr "Identificación de imagen: (mayor: %u, menor: %u)\n" +msgstr "Identificación de imagen: (mayor: %u, menor: %u)\n" #: vms-alpha.c:7519 #, c-format @@ -5170,22 +5171,22 @@ msgstr "no se puede leer EIHS\n" #: vms-alpha.c:7540 #, c-format msgid "Image symbol & debug table: (major: %u, minor: %u)\n" -msgstr "Símbolo de imagen y tabla de depuración: (mayor: %u, menor %u)\n" +msgstr "Símbolo de imagen y tabla de depuración: (mayor: %u, menor %u)\n" #: vms-alpha.c:7545 #, c-format msgid " debug symbol table : vbn: %u, size: %u (0x%x)\n" -msgstr " tabla de símbolos de depuración : vbn: %u, tam: %u (0x%x)\n" +msgstr " tabla de símbolos de depuración : vbn: %u, tam: %u (0x%x)\n" #: vms-alpha.c:7549 #, c-format msgid " global symbol table: vbn: %u, records: %u\n" -msgstr " tabla de símbolos globales : vbn: %u, registros: %u\n" +msgstr " tabla de símbolos globales : vbn: %u, registros: %u\n" #: vms-alpha.c:7553 #, c-format msgid " debug module table : vbn: %u, size: %u\n" -msgstr " tabla de módulo de depuración : vbn: %u, tam: %u\n" +msgstr " tabla de módulo de depuración : vbn: %u, tam: %u\n" #: vms-alpha.c:7566 #, c-format @@ -5195,12 +5196,12 @@ msgstr "no se puede leer EISD\n" #: vms-alpha.c:7576 #, c-format msgid "Image section descriptor: (major: %u, minor: %u, size: %u, offset: %u)\n" -msgstr "Descriptor de sección de imagen: (mayor: %u, menor: %u, tam: %u, despl: %u)\n" +msgstr "Descriptor de sección de imagen: (mayor: %u, menor: %u, tam: %u, despl: %u)\n" #: vms-alpha.c:7583 #, c-format msgid " section: base: 0x%08x%08x size: 0x%08x\n" -msgstr " sección: base: 0x%08x%08x tam: 0x%08x\n" +msgstr " sección: base: 0x%08x%08x tam: 0x%08x\n" #: vms-alpha.c:7588 #, c-format @@ -5249,7 +5250,7 @@ msgstr "no se puede leer DMT\n" #: vms-alpha.c:7668 #, c-format msgid "Debug module table:\n" -msgstr "Tabla de módulos de depuración\n" +msgstr "Tabla de módulos de depuración\n" #: vms-alpha.c:7677 #, c-format @@ -5259,7 +5260,7 @@ msgstr "no se puede leer el encabezado DMT\n" #: vms-alpha.c:7682 #, c-format msgid " module offset: 0x%08x, size: 0x%08x, (%u psects)\n" -msgstr " despl módulo: 0x%08x, tam: 0x%08x, (%u psects)\n" +msgstr " despl módulo: 0x%08x, tam: 0x%08x, (%u psects)\n" #: vms-alpha.c:7692 #, c-format @@ -5284,7 +5285,7 @@ msgstr "no se puede leer GST\n" #: vms-alpha.c:7722 #, c-format msgid "Global symbol table:\n" -msgstr "Tabla de símbolos global:\n" +msgstr "Tabla de símbolos global:\n" #: vms-alpha.c:7750 #, c-format @@ -5354,7 +5355,7 @@ msgstr " lppsbfixoff: %5u\n" #: vms-alpha.c:7794 #, c-format msgid " Shareable images:\n" -msgstr " Imágenes compartibles:\n" +msgstr " Imágenes compartibles:\n" #: vms-alpha.c:7798 #, c-format @@ -5364,12 +5365,12 @@ msgstr " %u: tam: %u, opts: 0x%02x, nombre: %.*s\n" #: vms-alpha.c:7805 #, c-format msgid " quad-word relocation fixups:\n" -msgstr " composturas de reubicación quad-word:\n" +msgstr " composturas de reubicación quad-word:\n" #: vms-alpha.c:7810 #, c-format msgid " long-word relocation fixups:\n" -msgstr " composturas de reubicación long-word:\n" +msgstr " composturas de reubicación long-word:\n" #: vms-alpha.c:7815 #, c-format @@ -5384,7 +5385,7 @@ msgstr " composturas de referencia .address long-word:\n" #: vms-alpha.c:7825 #, c-format msgid " Code Address Reference Fixups:\n" -msgstr " Composturas de Referencias de Dirección de Código:\n" +msgstr " Composturas de Referencias de Dirección de Código:\n" #: vms-alpha.c:7830 #, c-format @@ -5394,7 +5395,7 @@ msgstr " Composturas de Referencias de Pares de Enlazado\n" #: vms-alpha.c:7839 #, c-format msgid " Change Protection (%u entries):\n" -msgstr " Cambiar Protección (%u entradas):\n" +msgstr " Cambiar Protección (%u entradas):\n" #: vms-alpha.c:7844 #, c-format @@ -5409,7 +5410,7 @@ msgstr "%P: no se admite el enlace reubicable\n" #: vms-alpha.c:8746 msgid "%P: multiple entry points: in modules %B and %B\n" -msgstr "%P: puntos de entrada múltiples: en los módulos %B y %B\n" +msgstr "%P: puntos de entrada múltiples: en los módulos %B y %B\n" #: vms-lib.c:1421 #, c-format @@ -5418,11 +5419,11 @@ msgstr "no se puede abrir la imagen compartida '%s' desde '%s'" #: vms-misc.c:360 msgid "_bfd_vms_output_counted called with zero bytes" -msgstr "se llamó _bfd_vms_output_counted con cero bytes" +msgstr "se llamó _bfd_vms_output_counted con cero bytes" #: vms-misc.c:365 msgid "_bfd_vms_output_counted called with too many bytes" -msgstr "se llamó _bfd_vms_output_counted con demasiados bytes" +msgstr "se llamó _bfd_vms_output_counted con demasiados bytes" #: xcofflink.c:836 #, c-format @@ -5432,31 +5433,31 @@ msgstr "%s: objeto compartido XCOFF cuando no se produce salida XCOFF" #: xcofflink.c:857 #, c-format msgid "%s: dynamic object with no .loader section" -msgstr "%s: objeto dinámico sin sección .loader" +msgstr "%s: objeto dinámico sin sección .loader" #: xcofflink.c:1415 msgid "%B: `%s' has line numbers but no enclosing section" -msgstr "%B: `%s' tiene números de línea pero no una sección contenedora" +msgstr "%B: `%s' tiene números de línea pero no una sección contenedora" #: xcofflink.c:1467 msgid "%B: class %d symbol `%s' has no aux entries" -msgstr "%B: clase %d símbolo `%s' no tiene entradas auxiliares" +msgstr "%B: clase %d símbolo `%s' no tiene entradas auxiliares" #: xcofflink.c:1489 msgid "%B: symbol `%s' has unrecognized csect type %d" -msgstr "%B: el símbolo `%s' tiene un tipo csect %d que no se reconoce" +msgstr "%B: el símbolo `%s' tiene un tipo csect %d que no se reconoce" #: xcofflink.c:1501 msgid "%B: bad XTY_ER symbol `%s': class %d scnum %d scnlen %d" -msgstr "%B: símbolo XTY_ER `%s' erróneo: clase %d scnum %d scnlen %d" +msgstr "%B: símbolo XTY_ER `%s' erróneo: clase %d scnum %d scnlen %d" #: xcofflink.c:1530 msgid "%B: XMC_TC0 symbol `%s' is class %d scnlen %d" -msgstr "%B: símbolo XMC_TCO `%s' es clase %d scnlen %d" +msgstr "%B: símbolo XMC_TCO `%s' es clase %d scnlen %d" #: xcofflink.c:1676 msgid "%B: csect `%s' not in enclosing section" -msgstr "%B: csect `%s' no está contenido en una sección" +msgstr "%B: csect `%s' no está contenido en una sección" #: xcofflink.c:1783 msgid "%B: misplaced XTY_LD `%s'" @@ -5464,33 +5465,33 @@ msgstr "%B: XTY_LD `%s' mal ubicado" #: xcofflink.c:2102 msgid "%B: reloc %s:%d not in csect" -msgstr "%B: la reubicación %s:%d no está en csect" +msgstr "%B: la reubicación %s:%d no está en csect" #: xcofflink.c:3186 #, c-format msgid "%s: no such symbol" -msgstr "%s: no hay tal símbolo" +msgstr "%s: no hay tal símbolo" #: xcofflink.c:3291 #, c-format msgid "warning: attempt to export undefined symbol `%s'" -msgstr "aviso: se intenta exportar el símbolo sin definir `%s'" +msgstr "aviso: se intenta exportar el símbolo sin definir `%s'" #: xcofflink.c:3673 msgid "error: undefined symbol __rtinit" -msgstr "error: símbolo __rtinit sin definir" +msgstr "error: símbolo __rtinit sin definir" #: xcofflink.c:4052 msgid "%B: loader reloc in unrecognized section `%s'" -msgstr "%B: reubicación del cargador en la sección `%s' que no se reconoce" +msgstr "%B: reubicación del cargador en la sección `%s' que no se reconoce" #: xcofflink.c:4063 msgid "%B: `%s' in loader reloc but not loader sym" -msgstr "%B: `%s' en la reubicación del cargador pero no es un símbolo del cargador" +msgstr "%B: `%s' en la reubicación del cargador pero no es un símbolo del cargador" #: xcofflink.c:4079 msgid "%B: loader reloc in read-only section %A" -msgstr "%B: reubicación del cargador en la sección de sólo lectura %A" +msgstr "%B: reubicación del cargador en la sección de sólo lectura %A" #: xcofflink.c:5097 #, c-format @@ -5499,11 +5500,11 @@ msgstr "Desbordamiento de TOC: 0x%lx > 0x10000; pruebe -mminimal-toc al compilar #: elf32-ia64.c:1110 elf64-ia64.c:1110 msgid "%B: Can't relax br at 0x%lx in section `%A'. Please use brl or indirect branch." -msgstr "%B: No se puede relajar br en 0x%lx en la sección `%A'. Por favor use brl o ramificación indirecta." +msgstr "%B: No se puede relajar br en 0x%lx en la sección `%A'. Por favor use brl o ramificación indirecta." #: elf32-ia64.c:2809 elf64-ia64.c:2809 msgid "@pltoff reloc against local symbol" -msgstr "reubicación @pltoff contra un símbolo local" +msgstr "reubicación @pltoff contra un símbolo local" #: elf32-ia64.c:4430 elf64-ia64.c:4430 #, c-format @@ -5517,39 +5518,39 @@ msgstr "%s: __gp no cubre el segmento de datos short" #: elf32-ia64.c:4708 elf64-ia64.c:4708 msgid "%B: non-pic code with imm relocation against dynamic symbol `%s'" -msgstr "%B: código que no es pic con reubicación imm contra el símbolo dinámico %s" +msgstr "%B: código que no es pic con reubicación imm contra el símbolo dinámico %s" #: elf32-ia64.c:4775 elf64-ia64.c:4775 msgid "%B: @gprel relocation against dynamic symbol %s" -msgstr "%B: reubicación @gprel contra el símbolo dinámico %s" +msgstr "%B: reubicación @gprel contra el símbolo dinámico %s" #: elf32-ia64.c:4838 elf64-ia64.c:4838 msgid "%B: linking non-pic code in a position independent executable" -msgstr "%B: se enlaza código que no es pic en un ejecutable independiente de posición" +msgstr "%B: se enlaza código que no es pic en un ejecutable independiente de posición" #: elf32-ia64.c:4975 elf64-ia64.c:4975 msgid "%B: @internal branch to dynamic symbol %s" -msgstr "%B: ramificación @internal al símbolo dinámico %s" +msgstr "%B: ramificación @internal al símbolo dinámico %s" #: elf32-ia64.c:4977 elf64-ia64.c:4977 msgid "%B: speculation fixup to dynamic symbol %s" -msgstr "%B: compostura de especulación al símbolo dinámico %s" +msgstr "%B: compostura de especulación al símbolo dinámico %s" #: elf32-ia64.c:4979 elf64-ia64.c:4979 msgid "%B: @pcrel relocation against dynamic symbol %s" -msgstr "%B: reubicación @pcrel contra el símbolo dinámico %s" +msgstr "%B: reubicación @pcrel contra el símbolo dinámico %s" #: elf32-ia64.c:5176 elf64-ia64.c:5176 msgid "unsupported reloc" -msgstr "no se admite la reubicación" +msgstr "no se admite la reubicación" #: elf32-ia64.c:5214 elf64-ia64.c:5214 msgid "%B: missing TLS section for relocation %s against `%s' at 0x%lx in section `%A'." -msgstr "%B: falta la sección TLS para la reubicación %s contra `%s' en 0x%lx en la sección `%A'." +msgstr "%B: falta la sección TLS para la reubicación %s contra `%s' en 0x%lx en la sección `%A'." #: elf32-ia64.c:5229 elf64-ia64.c:5229 msgid "%B: Can't relax br (%s) to `%s' at 0x%lx in section `%A' with size 0x%lx (> 0x1000000)." -msgstr "%B: No se puede relajar br (%s) a `%s' en 0x%lx en la sección `%A' con tamaño 0x%lx (> 0x1000000)." +msgstr "%B: No se puede relajar br (%s) a `%s' en 0x%lx en la sección `%A' con tamaño 0x%lx (> 0x1000000)." #: elf32-ia64.c:5491 elf64-ia64.c:5491 msgid "%B: linking trap-on-NULL-dereference with non-trapping files" @@ -5569,20 +5570,20 @@ msgstr "%B: se enlazan ficheros de gp constante con ficheros con gp no constante #: elf32-ia64.c:5528 elf64-ia64.c:5528 msgid "%B: linking auto-pic files with non-auto-pic files" -msgstr "%B: se enlazan ficheros de pic automático con ficheros sin pic automático" +msgstr "%B: se enlazan ficheros de pic automático con ficheros sin pic automático" #: peigen.c:1002 pepigen.c:1002 pex64igen.c:1002 #, c-format msgid "%s: line number overflow: 0x%lx > 0xffff" -msgstr "%s: desbordamiento de número de línea: 0x%lx > 0xffff" +msgstr "%s: desbordamiento de número de línea: 0x%lx > 0xffff" #: peigen.c:1029 pepigen.c:1029 pex64igen.c:1029 msgid "Export Directory [.edata (or where ever we found it)]" -msgstr "Directorio de Exportación [.edata (o donde quiera que se encuentre)]" +msgstr "Directorio de Exportación [.edata (o donde quiera que se encuentre)]" #: peigen.c:1030 pepigen.c:1030 pex64igen.c:1030 msgid "Import Directory [parts of .idata]" -msgstr "Directorio de Importación [partes de .idata]" +msgstr "Directorio de Importación [partes de .idata]" #: peigen.c:1031 pepigen.c:1031 pex64igen.c:1031 msgid "Resource Directory [.rsrc]" @@ -5598,11 +5599,11 @@ msgstr "Directorio de Seguridad" #: peigen.c:1034 pepigen.c:1034 pex64igen.c:1034 msgid "Base Relocation Directory [.reloc]" -msgstr "Directorio de Reubicación Base [.reloc]" +msgstr "Directorio de Reubicación Base [.reloc]" #: peigen.c:1035 pepigen.c:1035 pex64igen.c:1035 msgid "Debug Directory" -msgstr "Directorio de Depuración" +msgstr "Directorio de Depuración" #: peigen.c:1036 pepigen.c:1036 pex64igen.c:1036 msgid "Description Directory" @@ -5622,19 +5623,19 @@ msgstr "Directorio de Carga de Configuraciones" #: peigen.c:1040 pepigen.c:1040 pex64igen.c:1040 msgid "Bound Import Directory" -msgstr "Directorio de Importación de Relaciones" +msgstr "Directorio de Importación de Relaciones" #: peigen.c:1041 pepigen.c:1041 pex64igen.c:1041 msgid "Import Address Table Directory" -msgstr "Directorio de Tablas de Direcciones de Importación" +msgstr "Directorio de Tablas de Direcciones de Importación" #: peigen.c:1042 pepigen.c:1042 pex64igen.c:1042 msgid "Delay Import Directory" -msgstr "Directorio de Retardo de Importación" +msgstr "Directorio de Retardo de Importación" #: peigen.c:1043 pepigen.c:1043 pex64igen.c:1043 msgid "CLR Runtime Header" -msgstr "Encabezado de Tiempo de Ejecución CLR" +msgstr "Encabezado de Tiempo de Ejecución CLR" #: peigen.c:1044 pepigen.c:1044 pex64igen.c:1044 msgid "Reserved" @@ -5647,7 +5648,7 @@ msgid "" "There is an import table, but the section containing it could not be found\n" msgstr "" "\n" -"Hay una tabla de importación, pero no se puede encontrar la sección que la contiene\n" +"Hay una tabla de importación, pero no se puede encontrar la sección que la contiene\n" #: peigen.c:1109 pepigen.c:1109 pex64igen.c:1109 #, c-format @@ -5656,7 +5657,7 @@ msgid "" "There is an import table in %s at 0x%lx\n" msgstr "" "\n" -"Hay una tabla de importación en %s en 0x%lx\n" +"Hay una tabla de importación en %s en 0x%lx\n" #: peigen.c:1151 pepigen.c:1151 pex64igen.c:1151 #, c-format @@ -5665,12 +5666,12 @@ msgid "" "Function descriptor located at the start address: %04lx\n" msgstr "" "\n" -"Se localizó el descriptor de función en la dirección de inicio: %04lx\n" +"Se localizó el descriptor de función en la dirección de inicio: %04lx\n" #: peigen.c:1154 pepigen.c:1154 pex64igen.c:1154 #, c-format msgid "\tcode-base %08lx toc (loadable/actual) %08lx/%08lx\n" -msgstr "\tcódigo-base %08lx tabla-de-contenidos (cargable/actual) %08lx/%08lx\n" +msgstr "\tcódigo-base %08lx tabla-de-contenidos (cargable/actual) %08lx/%08lx\n" #: peigen.c:1162 pepigen.c:1162 pex64igen.c:1162 #, c-format @@ -5679,7 +5680,7 @@ msgid "" "No reldata section! Function descriptor not decoded.\n" msgstr "" "\n" -"¡No está la sección reldata! No se decodificó el descriptor de función.\n" +"¡No está la sección reldata! No se decodificó el descriptor de función.\n" #: peigen.c:1167 pepigen.c:1167 pex64igen.c:1167 #, c-format @@ -5688,7 +5689,7 @@ msgid "" "The Import Tables (interpreted %s section contents)\n" msgstr "" "\n" -"Las Tablas de Importación (se interpretaron los contenidos de la sección %s)\n" +"Las Tablas de Importación (se interpretaron los contenidos de la sección %s)\n" #: peigen.c:1170 pepigen.c:1170 pex64igen.c:1170 #, c-format @@ -5720,7 +5721,7 @@ msgid "" "There is a first thunk, but the section containing it could not be found\n" msgstr "" "\n" -"Hay un thunk inicial, pero no se puede encontrar la sección que lo contiene\n" +"Hay un thunk inicial, pero no se puede encontrar la sección que lo contiene\n" #: peigen.c:1415 pepigen.c:1415 pex64igen.c:1415 #, c-format @@ -5729,7 +5730,7 @@ msgid "" "There is an export table, but the section containing it could not be found\n" msgstr "" "\n" -"Hay una tabla de exportación, pero no se puede encontrar la sección que la contiene\n" +"Hay una tabla de exportación, pero no se puede encontrar la sección que la contiene\n" #: peigen.c:1424 pepigen.c:1424 pex64igen.c:1424 #, c-format @@ -5738,7 +5739,7 @@ msgid "" "There is an export table in %s, but it does not fit into that section\n" msgstr "" "\n" -"Hay una tabla de exportación en %s, pero no cabe en esa sección\n" +"Hay una tabla de exportación en %s, pero no cabe en esa sección\n" #: peigen.c:1430 pepigen.c:1430 pex64igen.c:1430 #, c-format @@ -5747,7 +5748,7 @@ msgid "" "There is an export table in %s at 0x%lx\n" msgstr "" "\n" -"Hay una tabla de exportación en %s en 0x%lx\n" +"Hay una tabla de exportación en %s en 0x%lx\n" #: peigen.c:1458 pepigen.c:1458 pex64igen.c:1458 #, c-format @@ -5757,13 +5758,13 @@ msgid "" "\n" msgstr "" "\n" -"Las Tablas de Exportación (se interpretaron los contenidos de la sección %s)\n" +"Las Tablas de Exportación (se interpretaron los contenidos de la sección %s)\n" "\n" #: peigen.c:1462 pepigen.c:1462 pex64igen.c:1462 #, c-format msgid "Export Flags \t\t\t%lx\n" -msgstr "Opciones de Exportación \t\t\t%lx\n" +msgstr "Opciones de Exportación \t\t\t%lx\n" #: peigen.c:1465 pepigen.c:1465 pex64igen.c:1465 #, c-format @@ -5788,12 +5789,12 @@ msgstr "Base Ordinal \t\t\t%ld\n" #: peigen.c:1480 pepigen.c:1480 pex64igen.c:1480 #, c-format msgid "Number in:\n" -msgstr "Número en:\n" +msgstr "Número en:\n" #: peigen.c:1483 pepigen.c:1483 pex64igen.c:1483 #, c-format msgid "\tExport Address Table \t\t%08lx\n" -msgstr "\tTabla de Exportación de Direcciones \t\t%08lx\n" +msgstr "\tTabla de Exportación de Direcciones \t\t%08lx\n" #: peigen.c:1487 pepigen.c:1487 pex64igen.c:1487 #, c-format @@ -5808,7 +5809,7 @@ msgstr "Direcciones de la Tabla\n" #: peigen.c:1493 pepigen.c:1493 pex64igen.c:1493 #, c-format msgid "\tExport Address Table \t\t" -msgstr "\tTabla de Exportación de Direcciones \t\t" +msgstr "\tTabla de Exportación de Direcciones \t\t" #: peigen.c:1498 pepigen.c:1498 pex64igen.c:1498 #, c-format @@ -5828,7 +5829,7 @@ msgid "" "Export Address Table -- Ordinal Base %ld\n" msgstr "" "\n" -"Tabla de Exportación de Direcciones -- Base Ordinal %ld\n" +"Tabla de Exportación de Direcciones -- Base Ordinal %ld\n" #: peigen.c:1536 pepigen.c:1536 pex64igen.c:1536 msgid "Forwarder RVA" @@ -5851,12 +5852,12 @@ msgstr "" #: pex64igen.c:1797 #, c-format msgid "Warning, .pdata section size (%ld) is not a multiple of %d\n" -msgstr "Aviso, el tamaño de la sección .pdata (%ld) no es un múltiplo de %d\n" +msgstr "Aviso, el tamaño de la sección .pdata (%ld) no es un múltiplo de %d\n" #: peigen.c:1621 pepigen.c:1621 pex64igen.c:1621 #, c-format msgid " vma:\t\t\tBegin Address End Address Unwind Info\n" -msgstr " vma:\t\t\tDirección Inicio Dirección Fin Información Desenvuelta\n" +msgstr " vma:\t\t\tDirección Inicio Dirección Fin Información Desenvuelta\n" #: peigen.c:1623 pepigen.c:1623 pex64igen.c:1623 #, c-format @@ -5864,23 +5865,23 @@ msgid "" " vma:\t\tBegin End EH EH PrologEnd Exception\n" " \t\tAddress Address Handler Data Address Mask\n" msgstr "" -" vma:\t\tInicio Fin EH EH FinPrólogo Excepción\n" -" \t\tDirecc Direcc Asa Datos Dirección Máscara\n" +" vma:\t\tInicio Fin EH EH FinPrólogo Excepción\n" +" \t\tDirecc Direcc Asa Datos Dirección Máscara\n" #: peigen.c:1697 pepigen.c:1697 pex64igen.c:1697 #, c-format msgid " Register save millicode" -msgstr " Registro para guardar milicódigo" +msgstr " Registro para guardar milicódigo" #: peigen.c:1700 pepigen.c:1700 pex64igen.c:1700 #, c-format msgid " Register restore millicode" -msgstr " Registro para restaurar milicódigo" +msgstr " Registro para restaurar milicódigo" #: peigen.c:1703 pepigen.c:1703 pex64igen.c:1703 #, c-format msgid " Glue code sequence" -msgstr " Secuencia de código pegamento" +msgstr " Secuencia de código pegamento" #: peigen.c:1803 pepigen.c:1803 pex64igen.c:1803 #, c-format @@ -5888,7 +5889,7 @@ msgid "" " vma:\t\tBegin Prolog Function Flags Exception EH\n" " \t\tAddress Length Length 32b exc Handler Data\n" msgstr "" -" vma:\t\tInicio Prólogo Función Opciones Excepción EH\n" +" vma:\t\tInicio Prólogo Función Opciones Excepción EH\n" " \t\tDirecc Longitud Longitud 32b exc Manejador Datos\n" #: peigen.c:1929 pepigen.c:1929 pex64igen.c:1929 @@ -5900,7 +5901,7 @@ msgid "" msgstr "" "\n" "\n" -"Reubicaciones de Fichero Base PE (se interpretaron los contenidos de la sección .reloc)\n" +"Reubicaciones de Fichero Base PE (se interpretaron los contenidos de la sección .reloc)\n" #: peigen.c:1958 pepigen.c:1958 pex64igen.c:1958 #, c-format @@ -5909,12 +5910,12 @@ msgid "" "Virtual Address: %08lx Chunk size %ld (0x%lx) Number of fixups %ld\n" msgstr "" "\n" -"Dirección Virtual: %08lx Tamaño del trozo %ld (0x%lx) Número de composturas %ld\n" +"Dirección Virtual: %08lx Tamaño del trozo %ld (0x%lx) Número de composturas %ld\n" #: peigen.c:1971 pepigen.c:1971 pex64igen.c:1971 #, c-format msgid "\treloc %4d offset %4x [%4lx] %s" -msgstr "\treubicación %4d desplazamiento %4x [%4lx] %s" +msgstr "\treubicación %4d desplazamiento %4x [%4lx] %s" #. The MS dumpbin program reportedly ands with 0xff0f before #. printing the characteristics field. Not sure why. No reason to @@ -5926,7 +5927,7 @@ msgid "" "Characteristics 0x%x\n" msgstr "" "\n" -"Características 0x%x\n" +"Características 0x%x\n" #: peigen.c:2310 pepigen.c:2310 pex64igen.c:2310 msgid "%B: unable to fill in DataDictionary[1] because .idata$2 is missing" @@ -5959,37 +5960,37 @@ msgstr "%B: no se puede llenar DataDictionary[9] porque falta __tls_used" #~ msgstr "Excede el Rango de Salto Largo" #~ msgid "Absolute address Exceeds 16 bit Range" -#~ msgstr "La dirección Absoluta Excede el Rango de 16 bit" +#~ msgstr "La dirección Absoluta Excede el Rango de 16 bit" #~ msgid "Absolute address Exceeds 8 bit Range" -#~ msgstr "La dirección Absoluta Excede el Rango de 8 bit" +#~ msgstr "La dirección Absoluta Excede el Rango de 8 bit" #~ msgid "Unrecognized Reloc Type" -#~ msgstr "No se reconoce el Tipo de Reubicación" +#~ msgstr "No se reconoce el Tipo de Reubicación" #~ msgid "corrupt or empty %s section in %B" -#~ msgstr "sección %s corrupta o vacía en %B" +#~ msgstr "sección %s corrupta o vacía en %B" #~ msgid "%s: invalid DSO for symbol `%s' definition" -#~ msgstr "%s: DSO inválido para la definición del símbolo `%s'" +#~ msgstr "%s: DSO inválido para la definición del símbolo `%s'" #~ msgid "%B: %A+0x%lx: jump to stub routine which is not jal" #~ msgstr "%B: %A+0x%lx: salto a una rutina cabo la cual no es jal" #~ msgid "bfd_make_section (%s) failed" -#~ msgstr "bfd_make_section (%s) falló" +#~ msgstr "bfd_make_section (%s) falló" #~ msgid "bfd_set_section_flags (%s, %x) failed" -#~ msgstr "bfd_set_section_flags (%s, %x) falló" +#~ msgstr "bfd_set_section_flags (%s, %x) falló" #~ msgid "Size mismatch section %s=%lx, %s=%lx" -#~ msgstr "No coincide el tamaño de la sección %s=%lx, %s=%lx" +#~ msgstr "No coincide el tamaño de la sección %s=%lx, %s=%lx" #~ msgid "failed to enter %s" -#~ msgstr "falló la introducción de %s" +#~ msgstr "falló la introducción de %s" #~ msgid "No Mem !" -#~ msgstr "¡ No hay Memoria !" +#~ msgstr "¡ No hay Memoria !" #~ msgid "reserved STO cmd %d" #~ msgstr "orden STO %d reservada" @@ -6007,79 +6008,79 @@ msgstr "%B: no se puede llenar DataDictionary[9] porque falta __tls_used" #~ msgstr "pila-desde-imagen sin implementar" #~ msgid "stack-entry-mask not fully implemented" -#~ msgstr "pila-máscara-entrada no está completamente implementado" +#~ msgstr "pila-máscara-entrada no está completamente implementado" #~ msgid "PASSMECH not fully implemented" -#~ msgstr "PASSMECH no está completamente implementado" +#~ msgstr "PASSMECH no está completamente implementado" #~ msgid "stack-local-symbol not fully implemented" -#~ msgstr "pila-símbolo-local no está completamente implementado" +#~ msgstr "pila-símbolo-local no está completamente implementado" #~ msgid "stack-literal not fully implemented" -#~ msgstr "pila-literal no está completamente implementado" +#~ msgstr "pila-literal no está completamente implementado" #~ msgid "stack-local-symbol-entry-point-mask not fully implemented" -#~ msgstr "pila-símbolo-local-máscara-punto-entrada no está completamente implementado" +#~ msgstr "pila-símbolo-local-máscara-punto-entrada no está completamente implementado" #~ msgid "%s: not fully implemented" -#~ msgstr "%s: no está completamente implementado" +#~ msgstr "%s: no está completamente implementado" #~ msgid "obj code %d not found" -#~ msgstr "no se encontró el código objeto %d" +#~ msgstr "no se encontró el código objeto %d" #~ msgid "Reloc size error in section %s" -#~ msgstr "Error del tamaño de reubicación en la sección %s" +#~ msgstr "Error del tamaño de reubicación en la sección %s" #~ msgid "ERROR: %B: Incompatible object tag '%s':%d" #~ msgstr "ERROR: %B: Etiqueta de objeto '%s' incompatible:%d" #~ msgid "%B(%A): warning: unresolvable relocation against symbol `%s'" -#~ msgstr "%B(%A): aviso: reubicación sin resolución contra el símbolo `%s'" +#~ msgstr "%B(%A): aviso: reubicación sin resolución contra el símbolo `%s'" #~ msgid "%B: Internal inconsistency; no relocation section %s" -#~ msgstr "%B: Inconsistencia interna; no se encuentra la sección de reubicación %s" +#~ msgstr "%B: Inconsistencia interna; no se encuentra la sección de reubicación %s" #~ msgid "Could not find relocation section for %s" -#~ msgstr "No se puede encontrar la sección de reubicación para %s" +#~ msgstr "No se puede encontrar la sección de reubicación para %s" #~ msgid "%B: GOT overflow: Number of R_68K_GOT8O and R_68K_GOT16O relocations > %d" -#~ msgstr "%B desbordamiento de GOT: Número de reubicaciones R_68K_GOT80 Y R_68K_GOT160 > %d" +#~ msgstr "%B desbordamiento de GOT: Número de reubicaciones R_68K_GOT80 Y R_68K_GOT160 > %d" #~ msgid "%A link_order not found\n" -#~ msgstr "no se encontró link_order %A\n" +#~ msgstr "no se encontró link_order %A\n" #~ msgid "%s: no symbol \"%s\"" -#~ msgstr "%s: no existe el símbolo \"%s\"" +#~ msgstr "%s: no existe el símbolo \"%s\"" #~ msgid "%s: loader reloc in unrecognized section `%s'" -#~ msgstr "%s: reubicación del cargador en la sección `%s' no reconocida" +#~ msgstr "%s: reubicación del cargador en la sección `%s' no reconocida" #~ msgid "%s: `%s' in loader reloc but not loader sym" -#~ msgstr "%s: `%s' en la reubicación del cargador pero no es un símbolo del cargador" +#~ msgstr "%s: `%s' en la reubicación del cargador pero no es un símbolo del cargador" #~ msgid "Dwarf Error: DW_FORM_strp offset (%lu) greater than or equal to .debug_str size (%lu)." -#~ msgstr "Error de Dwarf: El desplazamiento DW_FROM_strp (%lu) es más grande o igual que el tamaño de .debug_str (%lu)." +#~ msgstr "Error de Dwarf: El desplazamiento DW_FROM_strp (%lu) es más grande o igual que el tamaño de .debug_str (%lu)." #~ msgid "Dwarf Error: Can't find .debug_abbrev section." -#~ msgstr "Error de Dwarf: No se puede encontrar la sección .debug_abbrev." +#~ msgstr "Error de Dwarf: No se puede encontrar la sección .debug_abbrev." #~ msgid "Dwarf Error: Abbrev offset (%lu) greater than or equal to .debug_abbrev size (%lu)." -#~ msgstr "Error de Dwarf: El desplazamiento de abreviatura (%lu) es más grande o igual que el tamaño de .debug_abbrev (%lu)." +#~ msgstr "Error de Dwarf: El desplazamiento de abreviatura (%lu) es más grande o igual que el tamaño de .debug_abbrev (%lu)." #~ msgid "Dwarf Error: Can't find .debug_ranges section." -#~ msgstr "Error de Dwarf: No se puede encontrar lan sección .debug_ranges." +#~ msgstr "Error de Dwarf: No se puede encontrar lan sección .debug_ranges." #~ msgid "ERROR: %B: Conflicting definitions of wchar_t" #~ msgstr "ERROR: %B: Definiciones en conflicto de wchar_t" #~ msgid "%B: relocation R_X86_64_PC32 against protected function `%s' can not be used when making a shared object" -#~ msgstr "%B: no se puede usar la reubicación R_X86_64_PC32 contra la función protegida `%' cuando se hace un objeto compartido" +#~ msgstr "%B: no se puede usar la reubicación R_X86_64_PC32 contra la función protegida `%' cuando se hace un objeto compartido" #~ msgid "ERROR: %B: Conflicting enum sizes" -#~ msgstr "ERROR: %B: Tamaños de enum en conflicto" +#~ msgstr "ERROR: %B: Tamaños de enum en conflicto" #~ msgid "Division by zero. " -#~ msgstr "División por cero. " +#~ msgstr "División por cero. " #~ msgid " [cpu32]" #~ msgstr " [cpu32]" @@ -6091,7 +6092,7 @@ msgstr "%B: no se puede llenar DataDictionary[9] porque falta __tls_used" #~ msgstr "No se admite enlazar objetos mips16 en el formato %s" #~ msgid ".glink and .plt too far apart" -#~ msgstr ".glink y .plt están demasiado alejados" +#~ msgstr ".glink y .plt están demasiado alejados" #~ msgid "%B: Not enough room for program headers (allocated %u, need %u)" #~ msgstr "%B: No hay suficiente espacio para los encabezados del programa (%u asignados, %u necesarios)" @@ -6139,28 +6140,28 @@ msgstr "%B: no se puede llenar DataDictionary[9] porque falta __tls_used" #~ msgstr "IHIHALF faltante" #~ msgid "missing IHCONST reloc" -#~ msgstr "reubicación IHCONST faltante" +#~ msgstr "reubicación IHCONST faltante" #~ msgid "missing IHIHALF reloc" -#~ msgstr "reubicación IHIHALF faltante" +#~ msgstr "reubicación IHIHALF faltante" #~ msgid "%B(%A): warning: unresolvable relocation %d against symbol `%s'" -#~ msgstr "%B(%A): aviso: reubicación %d sin resolución contra el símbolo `%s'" +#~ msgstr "%B(%A): aviso: reubicación %d sin resolución contra el símbolo `%s'" #~ msgid "%s: warning: unresolvable relocation against symbol `%s' from %s section" -#~ msgstr "%s: aviso: reubicación sin resolución contra el símbolo `%s' de la sección %s" +#~ msgstr "%s: aviso: reubicación sin resolución contra el símbolo `%s' de la sección %s" #~ msgid "%B(%A): unresolvable relocation against symbol `%s'" -#~ msgstr "%B(%A+0x%lx): reubicación sin resolución contra el símbolo `%s'" +#~ msgstr "%B(%A+0x%lx): reubicación sin resolución contra el símbolo `%s'" #~ msgid "Symbol %s has no GOT subsection for offset 0x%x" -#~ msgstr "El símbolo %s no tiene subsección GOT para el desplazamiento 0x%x" +#~ msgstr "El símbolo %s no tiene subsección GOT para el desplazamiento 0x%x" #~ msgid "%B: check_relocs: unhandled reloc type %d" -#~ msgstr "%B: check_relocs: tipo de reubicación %d sin manejar" +#~ msgstr "%B: check_relocs: tipo de reubicación %d sin manejar" #~ msgid "%B: warning: sh_link not set for section `%S'" -#~ msgstr "%B: aviso: no se estableció sh_link para la sección `%S'" +#~ msgstr "%B: aviso: no se estableció sh_link para la sección `%S'" #~ msgid " first occurrence: %s: arm call to thumb" #~ msgstr " primera ocurrencia: %s: llamada arm a thumb" @@ -6172,31 +6173,31 @@ msgstr "%B: no se puede llenar DataDictionary[9] porque falta __tls_used" #~ msgstr " considere el reenlace con --support-old-code activado" #~ msgid "reloc against unsupported section" -#~ msgstr "reubicación contra una sección no admitida" +#~ msgstr "reubicación contra una sección no admitida" #~ msgid "Error: First section in segment (%s) starts at 0x%x whereas the segment starts at 0x%x" -#~ msgstr "Error: La primera sección en el segmento (%s) inicia en 0x%x mientras que el segmento inicia en 0x%x" +#~ msgstr "Error: La primera sección en el segmento (%s) inicia en 0x%x mientras que el segmento inicia en 0x%x" #~ msgid "ERROR: %s is compiled for EABI version %d, whereas %s is compiled for version %d" -#~ msgstr "ERROR: %s está compilado para EABI versión %d, mientras que %s está compilado para la versión %d" +#~ msgstr "ERROR: %s está compilado para EABI versión %d, mientras que %s está compilado para la versión %d" #~ msgid "%s: unresolvable relocation %s against symbol `%s' from %s section" -#~ msgstr "%s: reubicación %s sin resolución contra el símbolo `%s' de la sección %s" +#~ msgstr "%s: reubicación %s sin resolución contra el símbolo `%s' de la sección %s" #~ msgid "%s: relocation %s should not be used when making a shared object; recompile with -fPIC" -#~ msgstr "%s: no se debe usar la reubicación %s cuando se hace un objeto compartido; recompile con -fPIC" +#~ msgstr "%s: no se debe usar la reubicación %s cuando se hace un objeto compartido; recompile con -fPIC" #~ msgid "%s(%s+0x%lx): fixing %s" #~ msgstr "%s(%s+0x%lx): fijando %s" #~ msgid "%s: unresolvable relocation against symbol `%s' from %s section" -#~ msgstr "%s: reubicación sin resolución contra el símbolo `%s' de la sección %s" +#~ msgstr "%s: reubicación sin resolución contra el símbolo `%s' de la sección %s" #~ msgid "%s: linking non-pic code in a shared library" -#~ msgstr "%s: se enlaza código que no es pic en una biblioteca compartida" +#~ msgstr "%s: se enlaza código que no es pic en una biblioteca compartida" #~ msgid "%s: reloc overflow 1: 0x%lx > 0xffff" -#~ msgstr "%s: desbordamiento de reubicación 1: 0x%lx > 0xffff" +#~ msgstr "%s: desbordamiento de reubicación 1: 0x%lx > 0xffff" #~ msgid "%s: Unknown special linker type %d" #~ msgstr "%s: Tipo de enlazador especial %d desconocido" @@ -6205,66 +6206,66 @@ msgstr "%B: no se puede llenar DataDictionary[9] porque falta __tls_used" #~ msgstr "arquitectura v850ea" #~ msgid "%s: Section %s is too large to add hole of %ld bytes" -#~ msgstr "%s: La sección %s es muy grande para agregar un agujero de %ld bytes" +#~ msgstr "%s: La sección %s es muy grande para agregar un agujero de %ld bytes" #~ msgid "Error: out of memory" #~ msgstr "Error: memoria agotada" #~ msgid "warning: relocation against removed section; zeroing" -#~ msgstr "aviso: reubicación contra una sección eliminada; se cambia a ceros" +#~ msgstr "aviso: reubicación contra una sección eliminada; se cambia a ceros" #~ msgid "local symbols in discarded section %s" -#~ msgstr "símbolos locales en la sección descartada %s" +#~ msgstr "símbolos locales en la sección descartada %s" #~ msgid "%s: ISA mismatch (-mips%d) with previous modules (-mips%d)" -#~ msgstr "%s: no coincide el ISA (-mips%d) con módulos previos (-mips%d)" +#~ msgstr "%s: no coincide el ISA (-mips%d) con módulos previos (-mips%d)" #~ msgid "%s: ISA mismatch (%d) with previous modules (%d)" -#~ msgstr "%s: no coincide el ISA (%d) con módulos previos (%d)" +#~ msgstr "%s: no coincide el ISA (%d) con módulos previos (%d)" #~ msgid "%s: dynamic relocation against speculation fixup" -#~ msgstr "%s: reubicación dinámica contra una compostura de especulación" +#~ msgstr "%s: reubicación dinámica contra una compostura de especulación" #~ msgid "%s: speculation fixup against undefined weak symbol" -#~ msgstr "%s: compostura de especulación contra un símbolo débil indefinido" +#~ msgstr "%s: compostura de especulación contra un símbolo débil indefinido" #~ msgid "\tThe Import Address Table (difference found)\n" -#~ msgstr "\tLa Tabla de Importación de Direcciones (se encontró una diferencia)\n" +#~ msgstr "\tLa Tabla de Importación de Direcciones (se encontró una diferencia)\n" #~ msgid "\t>>> Ran out of IAT members!\n" -#~ msgstr "\t>>> ¡Se terminaron los miembros IAT!\n" +#~ msgstr "\t>>> ¡Se terminaron los miembros IAT!\n" #~ msgid "\tThe Import Address Table is identical\n" -#~ msgstr "\tLa Tabla de Importación de Direcciones es idéntica\n" +#~ msgstr "\tLa Tabla de Importación de Direcciones es idéntica\n" #~ msgid "GP relative relocation when GP not defined" -#~ msgstr "reubicación GP relativa cuando GP no estaba definido" +#~ msgstr "reubicación GP relativa cuando GP no estaba definido" #~ msgid "%s: ERROR: passes floats in float registers whereas target %s uses integer registers" -#~ msgstr "%s: ERROR: pasan números de coma flotante en registros de coma flotante mientras que el objetivo %s usa registros enteros" +#~ msgstr "%s: ERROR: pasan números de coma flotante en registros de coma flotante mientras que el objetivo %s usa registros enteros" #~ msgid "%s: ERROR: passes floats in integer registers whereas target %s uses float registers" -#~ msgstr "%s: ERROR: pasan números de coma flotante en registros enteros mientras que el objetivo %s usa registros de coma flotante" +#~ msgstr "%s: ERROR: pasan números de coma flotante en registros enteros mientras que el objetivo %s usa registros de coma flotante" #~ msgid "Warning: input file %s supports interworking, whereas %s does not." #~ msgstr "Aviso: el fichero de entrada %s admite interoperabilidad, mientras que %s no." #~ msgid "Warning: input file %s does not support interworking, whereas %s does." -#~ msgstr "Aviso: el fichero de entrada %s no admite interoperabilidad, mientras que %s sí." +#~ msgstr "Aviso: el fichero de entrada %s no admite interoperabilidad, mientras que %s sí." -# FIXME: Revisar en el código si son abreviaturas comunes, o corresponden a +# FIXME: Revisar en el código si son abreviaturas comunes, o corresponden a # partes fijas dentro del programa. cfuga #~ msgid "AUX tagndx %ld ttlsiz 0x%lx lnnos %ld next %ld" #~ msgstr "AUX tagndx %ld ttlsiz 0x%lx lnnos %ld next %ld" #~ msgid "elf_symbol_from_bfd_symbol 0x%.8lx, name = %s, sym num = %d, flags = 0x%.8lx%s\n" -#~ msgstr "elf_symbol_from_bfd_symbol 0x%.8lx, nombre = %s, núm sim = %d, opciones = 0x%.8lx%s\n" +#~ msgstr "elf_symbol_from_bfd_symbol 0x%.8lx, nombre = %s, núm sim = %d, opciones = 0x%.8lx%s\n" #~ msgid "Warning: Not setting interwork flag of %s since it has already been specified as non-interworking" -#~ msgstr "Aviso: No se activa la opción de interoperación de %s ya que se había especificado como no interoperable" +#~ msgstr "Aviso: No se activa la opción de interoperación de %s ya que se había especificado como no interoperable" #~ msgid "Warning: Clearing the interwork flag of %s due to outside request" -#~ msgstr "Aviso: Se limpia la opción de interoperación de %s debido a una petición externa" +#~ msgstr "Aviso: Se limpia la opción de interoperación de %s debido a una petición externa" #~ msgid " [APCS-26]" #~ msgstr " [APCS-26]" @@ -6279,13 +6280,13 @@ msgstr "%B: no se puede llenar DataDictionary[9] porque falta __tls_used" #~ msgstr " previamente %s en %s" #~ msgid "Symbol `%s' has differing types: %s in %s" -#~ msgstr "El símbolo `%s' tiene tipos diferentes: %s en %s" +#~ msgstr "El símbolo `%s' tiene tipos diferentes: %s en %s" #~ msgid "ETIR_S_C_STO_GBL: no symbol \"%s\"" -#~ msgstr "ETIR_S_C_STO_GBL: no está el símbolo \"%s\"" +#~ msgstr "ETIR_S_C_STO_GBL: no está el símbolo \"%s\"" #~ msgid "ETIR_S_C_STO_CA: no symbol \"%s\"" -#~ msgstr "ETIR_S_C_STO_CA: no está el símbolo \"%s\"" +#~ msgstr "ETIR_S_C_STO_CA: no está el símbolo \"%s\"" #~ msgid "ETIR_S_C_STO_RB/AB: Not supported" #~ msgstr "ETIR_S_C_STO_RB/AB: No se admite" @@ -6339,24 +6340,24 @@ msgstr "%B: no se puede llenar DataDictionary[9] porque falta __tls_used" #~ msgstr "TIR_S_C_OPR_DFLIT no se admite" #~ msgid "TIR_S_C_CTL_DFLOC not fully implemented" -#~ msgstr "TIR_S_C_CTL_DFLOC no está completamente implementado" +#~ msgstr "TIR_S_C_CTL_DFLOC no está completamente implementado" #~ msgid "TIR_S_C_CTL_STLOC not fully implemented" -#~ msgstr "TIR_S_C_CTL_STLOC no está completamente implementado" +#~ msgstr "TIR_S_C_CTL_STLOC no está completamente implementado" #~ msgid "TIR_S_C_CTL_STKDL not fully implemented" -#~ msgstr "TIR_S_C_CTL_STKDL no está completamente implementado" +#~ msgstr "TIR_S_C_CTL_STKDL no está completamente implementado" #~ msgid " vma: Hint Time Forward DLL First\n" #~ msgstr " vma: Pista Tiempo Adelante DLL Primero\n" #~ msgid " \t\tAddress Address Handler Data Address Mask\n" -#~ msgstr " \t\tDirección Dirección Manejador Datos Dirección Máscara\n" +#~ msgstr " \t\tDirección Dirección Manejador Datos Dirección Máscara\n" #~ msgid "integer" #~ msgstr "entero" -# FIXME: Revisar el contexto en el código para confirmar esta traducción. cfuga +# FIXME: Revisar el contexto en el código para confirmar esta traducción. cfuga #~ msgid "soft" #~ msgstr "suave" @@ -6379,7 +6380,7 @@ msgstr "%B: no se puede llenar DataDictionary[9] porque falta __tls_used" #~ msgstr "%s(%s+0x%lx): no se puede reubicar %s, recompile con -ffuncion-sections" #~ msgid "creating section symbol, name = %s, value = 0x%.8lx, index = %d, section = 0x%.8lx\n" -#~ msgstr "se crea el símbolo de sección, nombre = %s, valor = 0x%.8lx, índice = %d, sección 0x%.8lx\n" +#~ msgstr "se crea el símbolo de sección, nombre = %s, valor = 0x%.8lx, índice = %d, sección 0x%.8lx\n" #~ msgid " whereas segment starts at 0x%x" #~ msgstr " mientras que el segmento inicia en 0x%x" diff --git a/bfd/po/fi.gmo b/bfd/po/fi.gmo new file mode 100644 index 0000000000000000000000000000000000000000..44bca56ab281f9c0ef881f0e3dc863ebe111e4a5 GIT binary patch literal 142032 zcmcGX2Y6Lg_O~y^LJ>sliX4#8LvMzfKqwMOBmpU6xJhopl{9k`AXu=MvG;<#_kxbS zcOBd4*n1rvb<}YjyMFI)uYGO_!7~5(&hwnSXZN=D+U4wX^X69VPm6H9+ddN684m6j zi5$9VBr;*HY$K7G%OjEP;VifdEQ8y^gW*>2OxOor4M)OfVNcjT9*JbZKCmm?9p=Kt zurE9ZD&7Y@U-$eP%72%AEWKS|fO#TRyn921I}j=#XF%oSI=CIY9}a}Cz};Z`6_Lmo zI0=r2O|Toh5l)8>diRdikw^~aTsRu;4|j*_;Q;s(oB{jQL?Q*S4$A&6Z~hQ&gL!1F z#Y8IL6vJh90sdlS9q@HwQvW_cf&#OCC_&C zW*!Q6#eNA?{A=On@C?`qUI2T*YoOA3!t))d`u!G44z}Od>UlKW5%XLq_qew|+S^|Q zRqnf?(t94Ne4oI<@E6z>4sNjcCP4X{50!om>;eyiisuxl@?GiOAB4j(zY4d6ofF)! z2UPfhQ2EP+igz!l@;5@&&zVs2_7GINegfsMSEHq~8&tZ*-W-RLuS22YKgYY@1SRK> zd-s1r)yHN{7GFQOHRj1s{z_nX*zE0(gNpYeI04=XRqk&+H(MErY=L=OsBnFt@;MF$ zun4N0`$E;{u~6xs19yUVdGpIq>3r+iZI$(pfl%!~5vqU8g56-F=Mhl#bS6~#_rhWD zd2epNIuhxPd3)Faj)z;pe5m?f2)Bp(L$%Xs-h7$oy-?v_hKm0OZ|>S`;YWBbfU3te z-h6`RO;GLr5*z~Ghnv9eYiI+w18fg_LCJ4l*bz?k_H&{97sFm~5e(pd-u)cU3!&=u zGS5f6{fAKb{=}PqfePP#zer?Lm<1L8V5oeI@Eq&yC%|^t=Xv|-a3{>O;r6h~+aCm# z{^3yRUFyxZd%gk{|9750L#5wte@nk3l>3%Y?Yj+>dq1f7hIn%xRJyageHm1{t@J$7 z^GwexJ@0^$+rL1`!K+Ym`@ZMDpz1wxfU%S3wovWb%bUkQh~o(xt07eV>E1@?!}z@hM4 zZ{PnQYqwme{1-#TzZ^=Rt%5tji(xLj7b<^k4mR%OIT|W_Ash!QpvrTuxBoL#xF=v= z_&(ePb~?oJIS{IRli&!r2+IGla5B6MD%^)q;kG!`+Gj9Sxh6xEcRB10_lG^<`B3`j zUN{E+10uqaUWY{@sQAdaa5dcWaMR02!)ch$hYI&T91FW1VeLNyGG&QWL%E*{d%=6* zMEDNOg*}f%SHUP$elLev@DZr^KZQf!@S|+pS_T#0aZvtlgQMV^P~p2DZS#Qyb{iaA3)X9@Z+tX~pHQH$k<- zdbl_I#+w(M7Kt2$c^w=McRt*>3s>+-aXe@JI#b@ zk4mU=oCg*EvrzH1Imgl;4rN{f$HQab1o)`8Z-1`EKMMB6z6?rEj`qA87GnMq?g?|x zGxJ%n4)e!Qa=GYyEB^^l`ML>84nKh^$M6fR-`B$&%ols}n^5KIcA?364pjas;beF* z+ylM`m9NnkS^tc~iI`7<^8XB+13O=A^12wR{V#*P;3rV&ZgGj_Zzk-4`5-9yJP-DS zPeIk^XRsgad8ze}88E#1m1bW9Ri3lp_V8AyaL>XW;TKTh zJ6&b%H5N|6T;q8ioQ3&w&)u%JetIZWI(Nf<@Li~S?|6;1%S<>8^Vv}4dJ9S(x?OAY zrWsJ>uYhXLlVL7=4yqovzRu!b4CQYv+znm}Rlk3SyTYBXw|bcZvoO~~)${3aAbcJw ze?P;WVBZ@od>-5d^D1vX9d3*HFK`Ha7xstUZnSuE;26v?sCGFAsyxp?wbv%=tshK+ zi!q-L^Wc|I{zlzo^|KFD{;q(E{{yJve2Fe~zhXe1h{O=3^fR8|x?>jgW_P*2NT>w?yqoCyD7N~mq0gi!_?y~xB zf{Nz?sP=f?+qb>j;?0J;W4{3I2rq=A;9XGhehH_-G4~kPK*`lTaBtZD-biFAEQbT& z{csTc1gbu_yU*+=z;T!>VGcYWs+_NSwz=QJ^@kI&FM)&M$*>2!*So&~x53=u0V{t` zsPyK*U0^d*xHF;T_F<^alJ+VvsN&JUTn1gieefm7haa2nk7 zVT*S*RDB%?rB7~xD&HsG-1iYnXKyGuI2I0t4?yMbUvN0=@u0%5F;Mw?532m# z91kf z#q1A&yJ9{UPJ;JCr4xD5>Sq!hhVcm47v2h04{t)X_qI=&zA1!~%cG≠=F*zkqwd zQBPZXN5C$aFN0gdKSQ<{mQ zOW?{s0`u~Kp;Epd?yH!B7#|7SepXZNo2=?P%G*&^i!|71r|K{y?dCAH% z2TsBM0H}Q30|&s5q2#0c%O+QaQ2D8WdGH!o4L^rd;9jqooSX}1V15ItUb0>_y-^Kk zV!jp5hLP9IUjbBnr^1EsB{&KWd)@LEgL5&T231e*L)HH_Zl-m!EFU=ij+pz`xP916R=YxB2UsQljuw}21BPV(o?Z^11we+JdB ze};R(KJQsO9Sl|OyWuwQ8Q2zn06W8v;P&uq*a3EV-~4Y6GN!ge28 ze)>W6rxK|0od9=&7edMT-B9xKDO7yD{%-LNf=X{LRK8-c9jt|tmjM0M-z+4YU!rP$2e+tzuoxU{vIRvV_tD)rRJlGB12o>*x-uw)`%(DS@#r`m;{GaOWuY!`3yWp1ab=U=d=G}jUn_}+rmC64$ zaC6K(q2#4M>JMzQBd`90nCQ?c=t~|e}-FQzvb7~pR%Chn+#=N3MGGya40+vD*mTE--asp zzdXN#lGDh4tX+Gdes=NoV`=I-B_{1n4cn2&@S5AK5U{{tKWhktMJSHO{&FNA8J7vK{3EmV9Z zKbRbz3MEH3LDkF4Q0?6IN9#YG;6TiMq3UT5*cX<2^PiyV>m1LEVSmh5dH3g`^wkG& zXSl^r){Xz57Q{?Y7-7 zR=>N!VVGAy)zdjp{-1%0|3|3w2SwVrd=)~;Uma9=4uz7JYoOwN9V-2wz57mW+PLu3 z;2`Xm!|mazQ0ZI?1Nf@9{{i;IymebkXB3oqCfo%shsw{9P;!1XR5@RPYKI@;cCbsk zHcnskg);93mF^x;^1ct0|Fv*OcoJ0kuYs!Px1idyeS1rP5bS_?HdHz1!yVu%I1QfU z`65((?6ir+KO4%t6i$Z6LFtvJpvv_o+!p=}w}RVj+Q!LQf4Dp5;czV6A1b|@q2%sq zsB(Sh*=@5nPJax5ihr^<7eTd0B~(8=6e^u7z5QLDuRz83AEFF(2X055RoPKfy6@YR5Kip0)<695;LOr*IF&!Oa?=N4@uaX1I6J#K{+@JA>)i*{+_=EujwO3W`n>75B( zO|A}tlB@IK6!;(<2itFH`JM>XUQJMPa2nhRo)1-DcX~brC0}pB3Gm-gay7i0<+}oI zhWQkzc3%fo@9RCEfXer~Q0+8hE0f2?a2w2Pq1y8_sPxxE>Ak0+^hvw!=6?`WeHTH= z!%&;=S-+{u7v8Z_j|q# zRS&J9|~39i#;o##@AY?dTxeY;PKvkt~alT?XkZf z4u_9G<>y<^?Y6V}8Uv+2_J)1n!LSFs3@ZMIp!EJL-u_*v{71Gox!fB{51s=T!-qYC z9jqVh2XnE%A8NkSZpSumA7QrV#c((5fAAc=leK3Zl>H^%{3cZWb>G?Abvo4ecAz)k z4An0_h4Qyk57Vo2;S$Vsa0>hj%z>SEF?pW>C8sOkTzCakdwc^6VOCFzrwLBNd^%LV zUVv(cu7TC>j!^xxz%v1*C(nke_q(9_;cHNGxp}WPZhkohO3vp(jVn=aZt^?|%Ktj3 z{`WjoJADP!Zrk^^`W+9|ZU;c6vks~r9)n%s4^Z;jX;))ksQ7YW9*n|i@DeEf`Y|kk zTlX_H?NHt%s`T51{I4 zbYDxq1O}MbLY3Te#D+*U&Ai~YR)N#1-ZRR6ydN{>7T z)o(wC3Loij`Q92z9(IQ9;0ibZ)}2JXHB-L*=I!D*ol3 z`+J@U)&7@w-U?OkPrv|fH_+N;98~-VK>0rbsy#1)BjMe!7yJ^cp1Th+`PdPv{U<`T z-yEp$dqK5R9qb2BgOaPeq1xwNI1K&_B~L>KTRZFpcfh;`s(hzH>AQ2_7Vu_oegG=o zSE2m3&9-{q8LAv3y*b}=FDN-rK+RLGhVu6iRDNHCs=tpte}Zb?ZbM9N`a$*E=}_ZZ zqvvfS z1`dI5!HKZT2pgXZpyXwLsCv8!-q9u!c^fMK>qc39-v}iqPeHZoyHNgrf-~U2(U#8! zC_QrlRJ%S3HQ#s%YW(Oi#^Rd=1I#ffIXwcZJ}-lkliQ%i`&Xg#$j?yyq1RYzuSrn# zy%5S@HB|Xdgp!MU;VAe8RJ~-4vwjqXMVK3)^8X-IJ$(U{zrMS*aqIYbQ08?|{pV3A zy&B0e`y42}TnUx$i=q1MpWz(%Bvd`@INscIq4HY{mES5Ty>Sd24zGl&-`C(!_ytt` z1rvxca{L0-kNQrselrQmUnP`090V2LI;eWO9xDGId-w04%D44oi)R2-zsZHlZwXX9 zE4=v#sP;S;O8-3xJHt1i()|aN|MpWX-JVeS90}E57DM%`qoCSvJ(T|b1ghV3%(eXN z3RSLgQ1(So`H4fx|3OggaXM7Gk3h-i+fen>HqZR;0@bdgq2gNv6@Fi+a7RMP%Y{&S z?oH3n;1-yFg!12Us?|#XmCi`0bml|J*}hQaIMmx;1l2F@flB8!sB(M_6%93I&xfJ( z_?uAiwV!U~+8!!=j_2Oc#pBKEJnw~S_xGUW;S0D4>^Z~qdlqbuIUA}TMnKJb3cdYe zDF3D2JqFe94)N|6cwP#X&#OG2_4faPs>dI^x!X+3|F&>b?8iaHKN%_?`JTIb`$E_b z`}y8}5mZ0j+w)Lwe}y++3zgn;-u#j07PBn=5uRhA(w_j8{#0*23kI0ydiOf0^j3QF zI;ehg5mbHO4b^Thdj8$>Th9)=oBNJX@;3--zCRI4ZfAJThpP8-&sxuBsQz#mlzg58 zmHsVoEc`1}`WomvYcnFkyBx9|NG; zWh_*=Cqc>E0;q6}P;z_*RCylp_CGwMkp$+Q;Z%4c z90mUd)h-*Z-d$%RFuQCfx!@Lfb zz_&d|?`7rv6TAfbr{P{OvDEVMER-H^vv-@wGB_BngvUX})4tT?Y7vzAL@0Ut0IHl@ zFSC8Fc~JAVli|VV+dkCbBPl7FNQ%Dr=`JVKwHTpyJ70=$6?;C+T^YXNa_|=4lakP_jlkNxMjV?zc*CBzW_=eUV@`x*L}^L4<%0rK*{lK zP;%6{!Q^5ll>8p+&Fi7^@gH~uoSJA8X@pO}HE?oco5=C-4ybr$HQ74jaHxLu5IhKO zzOs!wM|dkdo^46PlUT;z89)} zJFc<(?E_{17F2l$?q~fo2Gy^QhPm(sD1Ect{??Bs!CsgXQ296ws-B;R^4InN)3XDh z;xB-+;2BWz@eZ60haYJ5wi?R(Fq{NCuQh+Oq4Kp3DxMdi+Nsw;R^C0~D9l&DrSJ_X zJw5(ltLHdej`>n3dFyhB>{{u??x*cly+8yqJ`6SQxp!&<` z!>k`&1XbT14!3%l2qjmga3MScN)LPiC5QP(Sp26z$-|RS>2H3d_5Z<8;Y#5YcpF>* zzw_=zN16N|3RN#RLCMk2Q0e9!ZS}GSs=ls=li>$Y^_%r4bFY9Z|5;G__8!<9{s7hQ zb~(nz-Eye@v<9lZZ-(k`|ALA)=h!y9xNoIgY5zxX)QH`hRoGrJsb^?5E-eZCLX zZevcceZf<_F1QMg zKBG;f99|1mU)|2M{yH0~-kYGtv74dl`va)>dY@%-z5q(Eo&<~G`)~>zceb^6GgN=P z5~`j)@f@(u;;Div=Q_AEd>g9&`~=ni#+_s1$RVD8fs&uC&$WD)Le=wwa2)J=o`o-k z(%WZ4mFoeheE$d~zr)VAa#cf>>s%=P{3=xacD%s+FN98SLh0Z2a2xnBRKNWNYW&N- z(As$!lwLU)4um&ArTZG}3A^$fqTQEi%kz)50$Uipz3+R zC05=8Ja2)j=g*FKF2`y|3{$erQ_9YA|Jqk zQ0>3vHKvzl!(B1gK*f6!R5@RRb77BbP0p*K^x#=g{qR1hc8*+U{wF}m*?~~{_dzIs z-@*zw?s_Z7xlnTW5>&qa4Y!6{-(d1F0IFUVLG`cGVHfxytbxx#$>Wq8tsED_!!W-I z)!yanO}`%pRd4@+YS&>mS${ha#xdUwm%x5ETfH6%HNL$8YvF)DTl{B2$^G+Ca@hG6 z%hzP6{#y+d|J86$_#M=^wa2YC-#imauRQ^$z@2Zi`d$i^?}Op~aMRnZ+=qJJ2c_SC zg8RUdJFK1W_3V15>9N%cblBAh0@Q@L+RcA z_gFtU0xrY+p69fCt-oCA+5SEor^}(n(;J}VZ-@J>-YTH#<9s*;egh>x;~p@*Pztxj zd?M@yFNa&e+o9z1QJ4qYK4|IW!zq|ghSGD-L&;yahm3PzZ_G!-0A2%CA5THa_YZIx z?D??u|AV09@~=?sKIRc?&qJW%y&p=Be}X5#5s#XjJOHO)-uW?`2QP)&VSXESgx|tW zu-)TUuC7q!>IEe~L*b#Y461%U^zM_Mu=P~|Y>RyrRKM58>Su#sSD53uJJdXBF$~}lQ2DqV zN?+d$r@>F4>U-EzCU1LtUIvxle?ql?4X0qf2udHk2Q?q~9?F04ip4hqYTTF(mG5$>_Bjpa!n>jJ`3qG2Pk7bx zzbCvD^L|kB+3Ph+rw}T?l~DDwKU8{`diPts{nJqCe&gM@e%<`_^&AJ)j=Mv(_hKkH zSqW7?r+fFCq2&A_sC1r#o5S~E2lyFOzxoDB4%)wA=DtwzjD(se?g6)ghj^X_Rc}{7 zmE&HhcK!&eKS$oQ`s@moztK?n+XHS1_l2s5L!iQ)36=g0Q1$s7l>Bym%hK%wWgZJv z{{>L(+z1u_8BpzW6C4XafGTf~w~a&LrkHa*XF}zt5Nf=xg9>*gl>EH|H6Cp8j+JAI zXC+j-91Hi5f4C?70cxBpe%Hp!bKyYDpF!2%_V1a#oCQZ=J^)UK>!I@fop&Gfz8_zq z^y{Ti?yo@g%T6DdxezM;gW+;`4cr@U^P!ci5lZe(h3dx-K&RLKZu+PL9F6_1Q1!G3 zs=uu8<};z{>nhJ1z58w6{R1d{^$k>g^!mu!aS~L&TmaR+O;CF37^r%^0ji$=1}DSL zADg)V%6u4<9(f3=e4lvtZU15JbD`{yhmw=qq4dXppvIk1pICfrpyFE(RS*AyLtyZ! z?}t$JTM5<9XG7)h1sK5Zpz34C&n!PPpu*Qe$=kVbD7+oY-^bp5+kaYmBcS@nGAKD+ z1r_dWsB~_D%Gaw<<=y;qFQ-uca-r&Psb|9TXt*8r=R@_QTcP^RV^HP&2h_MZ@C!?4 z0hC@_13SVCpymTtLxp=2N-svfG|q=|zX~dyH=yM2Yq%Kp`x?NO3t_Z!TR}3sQz|>H$M#3FFXHeayT0vfq5;Q12_H2 z_7h5=>i-3(^f&w2&I8oK`IujXs+YmP*m@xf7h*me&V^sWnJ|ypo#gizD7}9NRQ*2$ zRnPBwwr$ha%_n+8wcB{8a;$|4e=FP+eh4+*eFh~bo40N28*v*7Z<^1_@cKj+N`Z>#{`r{OFiqM^zFe={pA$c1zzFJw|euFQ1$#8RQtXQmGA93v~~S?EY!HN6iSaA z@6C64_s^i>@7~ek?+>Mi$3pdoz2Ibc7nC0V(cAa!)Yi%W5wHOJkD%mnbmz9NKOYJc zn4f~GhukeJo;%@q%s)WM+t@BDN zdJHUq_d)67ZML)iG8QVmWl-{R4pjfS4oYsHfU2L5p~~59duyLXQ2q2`sC1u$S|9Y< z!Q>$aD!+yBS=a=n52o*E^;85k9v%Wa!@J=Y@CnbCq4Mz|lwN4NQ(LEJbKn@vXTd`F zEL3@doh{xxxB_z{l)iWys-JxeRnOb@Fnuuw%6$%0zGL40KyN+`?tuMuQ2BTaY8-su zyMGOp-!8kfb^C5RLzS-?2Jld*d|m=of3HE+SG%4T?+B=NEr2S2DU_b8hHBp6;walrkAyQ8Qcu>G0@2s)I9%o*abcg zCATj_>7#!_jVrx-TY3wji2M{ z_|J!`=jWl?<8vszzIh*GPpI;bfy&1$*cYz#_Lo7|FQ6;G=etnxd;^u=E?I5ed@38N zKQDzv@Or5BiS)I48VXOwxIerGcI{{V_b#aV{2tDRJNLJ6%c1(+8BqQF4mbsV>$%$i ztCuxU`ukEi3%(0gp1}jne;FK%`C`}xj_1!A?d;nbj2m1>;eKg*tlKii;!oEZ*p+c3 z@{uXn^^`l;Wjx1u{(|S%aC?J$Gwi)kGgmpEVc zrzd93>2&oaoUVQ0!Gzx*9zu9s2}5Khb{Av!BIb^SeV6ANo+UT?c|R9=3SIESu;MQ1 zikrDF#XQ&B$>C4jg+9NliGLrSyFpz`cxF21#k@OKn;cPI_)Ho=Z5ZRCEQhw%JwSd95T+;>TfGZ*^; z+;x@nd?5FqxZlR^NO%Q)Kf$eLMjUf|JYBtC3t``XRbh9dcYhkL<$j*~Zg2M>acoX}%2EaQGdw@e zeY|&X=i{7%8$(#+1nv*8+n4(x1>(}UqN@YusrJY`o_g|e+(?+=xZMoH>uKCO`|usT z{Uq#e;C_T#a|2!5;^%(cCt|mn`yHO^q2`nqai8kL%I~M#Q+%2---%6Wsf5?HIb4XH z#z(d(BAfDjJDd#}{@fMd=P~Z(r2C?`tK|7M{4K-B4!G$m^?cBbkzU^XJbsTQ+;jNX zHJazmck{_i}W%(Je8U^AQs z|ApIm#J7z5W$r@>x0ClLzi;_C@8)?ES#TX|h^)r#2K?_zI9=lnk+U(E@_ZI>j`5Qc$! zyD(ts_r*L=UUW3~^a2WT&`2C7o*Pi(M5BDA1W!$>@;paX4w};!~ z?*gU6Jp}gyu&c!GXYR#3AI7cgJ?TKpXTl4z7Br}a*x1n7x=R*x!&RqxNCg+Px2gITVwYgek%y`d0LuJV|Nms_U8T` zx1ZpbxS#L+T#Q{O!mh+0+tQK#Jdc5I;%_{5y58k}2fKd|=45yc{0nX;_&BCxcR%5d zfh^G@uX7K@tSid1uG`^RQ1kUoe7L*tuj}u)t;hc%*gpr4^I`sl`<^@(VYh($0{lMf z!@Ta}*amK+NVu*wM9%QM5stxqJHm$79OCPO`Ez&&_Z2=qxgUZ3^YB3LxgBoL@_aO` z^Kp#h`E=|Gi1%pkZy|02xmOV1FSw83`9hz+eX%>nhdm9urI_1!^I!41KX&`UTeyF~ ztsmwl@4lmt<73h}40m1g@Uxe2dHXTg?StJpK1>bvM-t}*?{^w*m-D=Z z_aB81bKinpHvX>V`DgBlJRhpaxt`>CEgXftuI)XqB+PuXiaddzPcUDK+tEDV#PfaJ z6Uj#d=9SoA&hxX_{hRwZ%nxvHja@nJOW`^2D(s%+uH?QGe>Y=)FKK+Fba=iSyCZy> z!a(eF9f1Gv8qf2eG2Fy`r?>2fKbC~i+H93X;y#{io;%_841U>q zac4db=XoA>S|5Lize9a|7?aml_<0@E*W7y$r>?#6_gA45oh?(2zbH*dcc z{0_S&Z{C4tUEBM(^jv~lqqm>L^Rc*fmjl;i;(Ev)BRlcDoLkrK__+qZ6S*%nE4N>( zN9`AM$KN`5HSXc{1`pr)@S_QT25uGHb4mL|%u8__!1JH5djRtw{9l9lFzoyDybbm< zefZ9pf50slyTP#0+hZO16XxOEx(*~BT?zb!*Ok~U!#vjeX%8Ru{^aNUwC4gJXgL12 z#oza&Q;Yj4Y3ZGX+iRF-s_f`P^S(e-Y+?VXx~|*a>qrabJjgJ8-}W3ov)**0m4ejv$WSW_0`bPw~tv+vIfuPrdQij<`m0KZtwhm{0m{*a`*9ZjK;1r&mZ9aH}CgCpZ-zsG3@^1?O!0B*@}$o9iGo4+*dq5 z!rhGDVek{|Pv>s!8j1g3aC-s2ui_z#=dL_|$MZ?Jy~%ww<`vvA+|I`SQFtBpaq{pI z&+B=<(C6n0I0Zk`u-6sfb}wN&L0zkPZp2Ry%;&%Xm~|b+^9=0fWB%BOHJ8-it#Dg} zpHl9F@pH9zI)$)!G&dOP7V{EWtK0`~)i{WJb_ZHjpSoZw8% zGvtO{3HN*4;dP#Wn2EctCkbD~^LjHzHYNU7c>c-9JC3k>;C>JGdtqPCoy&6x{DAv5 zp7Zg0AO5cOabg|0#6MT^{EB}*AAiO8zX0A1{|Wo}yj_f0S5aDCZ!oLK@%THMyAX2% z_sxBL-(hzx;eLc?Vs}0K2u_8%dU0Qk|L@`H_&XT4N!(3xW?-`8Ijr>dJjK_D^tk@OhB^KX`tdu#e(D{rX3m;iRiq$b8p7;N~r5I+;qi=Lst#vYJ1$^?_eM1P53SGenFV6@U*TVE`3Fb%ee>r~FdjE^C zi{t4k?0fsTcELQ!yKj%(<~-kozY*kX5zjN>HLwGAow#4ctgG2`YwT|1*0rOL(@gev z5dH?^{t0f~cy1)FG2pjn&%IFK4i|~`84>vw;O@`?mREWt{V0v zuII1|qd1OuPsA?9eHDHducQp?4KXU{0Q#dG5>)5xjg>_@4-BZu;o7NAv}jyA0C!qzX$in_9DdUniB*w$)ZvX=EQ2sVh!0Y zH+gkUwH4VVbsZxeJ4`Dm2xOTJF)@G`0(a%tRty>*B${i=>Z*x4du(+D_9e~rB&6)M?yb5abeJA* zNHnIxryL5%P<3k#7I!M@SZ!0y_@G5TQt>1j8=A@+f5k&nEhTH+ePyg6p<+iH8lugr zeoELx(WfqtHqcnHhIpbeUY-bst4=gJP?#9IWzJ$I64;rq%K4c(kE8 zm>G*!#2TD^EAp6~9fX4AS|zKx00jOMTqI#9%)a zbI6F*gEzw90EKO+t7?eW_=2hiiW{TlD}qFPO)RJ+=as%Ri6KFdTT99&bvZ%5f&GG- z=xU``zG86Dud!dy7>!p4NI^Bxlu%6HiCyPyA*Wf1u!w0g>VqYVY`s2HzU$MgCoQa{ zIIG4r)9+5vg=&Ze@k9^}DxGLIE^n%(JY`M3snU8_BB~pojUS5ar5Q~?MUrF)*oc*}f zv)4yZa6Ne>!A08scJKmS^8km z-_`SgU~ZFCD|&#YUENfl2&{uH@tt;P`Uv1PKS|fumzUMivddlHCsk9NK~P_wqZS-C zj=n0pflal`qqP;)v5J8~c};~=HL_3kYx6wVWy~~@oGYuNRS6jfZ|JkWBD+OsORB26 zu8d-%t~4GD8OVsBsH)?&E2341Z*4_vwME$wtFMlh$7;~}SSM;Tv)nR*mPJaL6}QqF zjs8?p^^&?EUa>kDZVCCp4U-j9P2nph<#$AeUrfK^cVvcNOs)G(_tlD@hPtLka^AA4 zvWAUl3RIA+1YJ=hD$o5J-LRK6lBSTt%Lzse!Z0Am`P@kJMyumhwXS-DoM6Pjff`_l z3$5qo2C>=!n3PE;hSUjTZ>D=Ij*0SkoXSYE$l zRm+uXm|=#c>PlkI394hro`gJ2-sKXnNJc>CmXy&R79qutH#WPb%gg}|)Iz<`c#V3r?_F41FK{8k zWLpY%D{8c=-%zTLFzab98`_3bzBHFGie$xx5v4n{?myi&Ie0LMu1Kod`Y5vmyqUz- zmF*+7=p#-Gomu+9!OAGJ?X;#;-7|+{f|%LFUUf>Js|qZYbW6?2(z-*do>~M9^O6x; zXqlF$h8hZ1UXko#uFVDqv9c9m*6GZZWo8(~yt1LPE}0Yy9rd#?%NVPf=cgHI^P~w4 z8f`@I(kjfR{SwA%y0exhR(4yd1S_d#O5RGY@qlC4VZxlc{(?4NvT2p)Gw5Wlg@dh0YNCl`Jt}t$L;cZ96SJBIg*rQn z`X|bj&bcWk**}sx)bcvGMSsoDFPsy`Wy(K)M)9;(Y)o#l7zx9X5B2Qzv<-Usb7oTU zsh}DNwfqfB9z@oMzd%|19r}eY}YfVlb4hqH_5B6P1bT!=cMUjo1(;{8hBPDbC~pL%2zeO zt?G)$w01^WJFVQpVX&7v%XM{qeWJ`VmCUyFT({f{i|T5;s&RQJS^HM7rphQ;riD`9 zmt|pE%tVoCAwLbVeVgJ9tT8Ja>gactr^NE=*lI-A*Ai_NYp5x2TpgrU8-5b5vaKeW z3N3Gl*Ho1=7fF^w4K9=V7H76CoOVqZHsqJ3nRX#M1nD+@*=^6 z{M@`*bZP4tO|=>hs%qnjSjD7BkXMvDBVS2Hf~kdb+#mgArp>U(a<$PXmEJ;VChiUoKBSHSc{0Mg1!|)UBln^9)^Ypr=hQ{Tghp^#Ny?sVrK_r+_ z-4tUTNTLa9UJI8a-3a-7xPxCq-1%V0ejHjQe zo7go=EX5`-f1EJAC>J$c$C{R5jmePg3e0H^C2NSY6VcLr!StdH?M#%02NEnrvcN1x zw6qx6(qdFgi_uAoXjwd9Sy@}Rs#Z~AoH%Aw_@snJjz~A9+~%en3ez4#4~e?!CT8CC zbqTkwRU8%Bu9WUEQSaclrfm321WhQ+gzt53wI@%g1m+OVzYCuT>Z1vI5eq+GMGanv zT%~W|M;nJ#PQpyooUf`>UY17_>2nPw>Gm2|)itcpMhLTN8nj{qd+A%ZZ{e2iESSjC z2A;Hel4z>eeoZT`87{1I>Xlwt8SHg3ab=RsURs08bWNDk-yry+WL68Jv9a+M`&e59I~imH^GPTUczQ`Ywr3O6SZ0w ziQ9K&=T7_7F*XsK+@s=1)KxaFqQ?c(i_EA3`?9cQMgV8+c4QO5a`otFP|B#v*2ii& zc_9pD73Z2U;p%LIC{_+17O)=?tTdrBFwt&ks#l6Lic8Rf<@HU8rZT_qwM}!`$-)K& zx1rKM%ME)Kv9hMBz|X&}Y&pToGQY4(o4%VzKUdqRN4Fw&>tRh5ElD(edWsaesh+y6 zWGi$f`{WS>ne7s?=0+^@>Mc#PX=UZNN7BMJj7snPR=8_ybT|v`bd}C=+k{A#{ zM^^>2h8AiM(iZ#_qO5^QQ?#}=#te#~lc{-ZUnD5*YB$`na#NnhxLXK^6{>Z=?9l># zmZb4ICuy0=FHu>hs_Sa2vQYuNYzW5#MAi20{6?FG+mtuoH8ekP&FcmnMjm$FeLZ+N zbPH+Q9~jJV$5J}ES>RQyxqfPxa)|nV9Bms zU&&slxADHS@*HtMx-XoO9>QyoJa;igzT>n}ymC{VN5zEHaG`&61mGlz?b69$9 zn6@Q=&*b}t>7lAgCP;QRNV6bT%k-Ua$p?lEbUxCY%!SK_Pg0o)FTM5Cb4junPOocV zaG;QS-)EPbp8EH2-byHOV@nY5f~Kb4*)u7o^10^P?v^}hC%j{1*9o&~*>Yfu$+pNe zZJZRz%4K*-1Z9ky0sWUQTM;Z-mX+I26Naq3rEc_SqT99NlY9tzUQsL6P<{+^v zS*=vZ8P$fAH8{miHysdE#4FJm30tj1c{kgf;3bTlI+BEi(-gtITyYbc@U@y7UhtIX z^r03bw)T+za;s|6TsQ z+7rRld9#W&*1AQ&V6v!vQex5!U{#zdW&~duuWL#Kwo8;5nn_2tV#xlZF{lNTt*DoY zc|v32O92jjGDM3)N!I;u(bGS4-2gw`3D3 ziM!qcY3;gNZ#gq&-HI%#hRRN8Nobp#8%E{oG>BG7>KlV)J1VIUsb)c61_J}j&4w4U9+U1IP~fS9w|&u zA>~n(^J|_9Ypa`s+-cL$r$O=jJXN+kzd*0!jV}r(>|tt&+=BVO2c?Rj?v|czM>Qp?|3sZ4er%jJ#Ug?-|vrEZ%X+b_3D$T0|K$}2B zN@XAbzUfUzwaCo8(%gA-{_oK+VwHs}NvW>5ADgHu70j(?hqOpK+SFLb}*Idf<#C`R@89z^$(#H*(0XBF9XYVZv8l@uHwn0Ywwgk2vbtqsJ>`yw)4{rr}z zCi0nOsSGt@w$DUM0ZJWBup=VmJSmb+dKQ-C&n?a^%`Ki&T0Cn`QNgU~i_!#Syf!8h zZV<~D9hr}#bC?6Stg+-thz*nbqj80D(K5&CfN3JUL8Ymau0j86e~J}(z(NBJ=t3kl z#Iof0k!-IGJxFu5C|_%y+;Fg=^2^Agt7;^hEm>X=g^i|sHPt4Ei`LRIb!bbJAY-iR zuUY>@H@j&OQ0=9T;Kt87rph((H5N}OzR9B`P9Fsu>0Q6wb+RjK>#}_cv234iw%fXA zH@t!M!it!67*okDGTOwPpq>gr^)NuWItp9L<#z+`OuFi-SGt*RhR0;PdWGLg^J-r? z891$N!hx*SkSiHI!&!*L%5U)64AW*StQN!Rs?GV>%7|$`>J_jC;I!nd1qNlU)^Vw3 z+utdVx)DYLxye$rtZrq@MUfzMax##y+vXIL?YIqLbzrBJ>dI~USFZP5c{u_4I+=gg z0ySm-i%4BW$!JO9e-UZ4p(Yt6XRiJ?Idu^wqa}&|MNT(}l-fr(CfFO%?!2~7)cI_z z$@ZN)o2^5W9=}U!IY}y?4C(wmqRnQ9U+AzrA_r+AMsNv-O)%Y@E@Mz1uZ4SDQr(Q` z2I{?N$QtdmwKBfwT|`#iucww+p49rBe{-_jTCy9AU9HE>zU5F`1tr%{{=GT{t7&2q zq|*6y7ZX-uNh^KJ%m$pIEGj5*x+SxYTJQK7B@F|!bPQ$`{k|*K*6F98inuTxT_hRZ~qgd4mFGM&Dv3=jMlYTFew&j!WW?N0J^|lTl_XBo(g9 z7?>pgZY{!+MrTO>Po;33hi!RPdO33=Mu^|YvJa6t@@KJZ^6QiqE04@(&aA@UiYjxY z$c!nYA7@4z=44~RwevDKZG9(E*sy2+-}+ik&?~{_P*uJ4m}KqvJgMZGV+^4U*==jm zD54n<@C%}xV46)~_Gzj?K+9r{t75TQy^GL$ftW3F)Ia?~XMDP9w5e-SIlAF2RF_^Y zYTmCz!{wMNL6dE^7ZA5(SE&ffnuBS@g{}Hd)b`VXXt!hFJ+Qay7a6teUNGHYS>=v~ zyCtg zyk!Yr*o9jtV@Aym+$1iU#E`mr7Gb8oqm;I)iO!!qzK*J91J6z&xE#?;F}+hOwFB-dF;NF78TFTO;ev_#i>^U*^Wr|$Pq(^j2z+8Ydv_u ze;3?!j(~YiYJD41OwrW{NGr*uc0!Pjw4UWM^{f8NC<*F{L-tjCej$zMk_m_Aw8+w< zNzS@lHO(*1FSZkhZVM)PNMQ}4!1}~?R9X#QhDfBM(8nVFg~RXgZPWgZdUUURT6ImW z`sf7+O*qS*S~!1hi52({g>&`YY6!16ke9T{d}=|Q6HMXoPOLhul9NiOBIBiYsA;Ao zck{w_V>7aKpY;q4e;{Vw+^TbJxHIdH(X$8WcG6gT=H_5)z9%X zA+d9cZp=vT@Fwj|dFD2hFOTb>iq5lzv9#C}ws_1x$06+K1$)KXUr5g6%HmbotZ3uR zAEa$fS>_>8u6=Blpjj3#5bPj+OfR%Fbmjz8a|;TFk2aslj}Kg54+o}<*QTj3WBy>6 zsMN0$JGVg~bze|8JQ+*czG1lF3qOURX_B*AjfR#77as*g74u$GFFnJFQmPm&0$SZ_ zeeAc%`cL9v_%L@3uxgu{8SlpOFeE6djz!rpXIe}8)mqgi*YPHy$@nzx`RyJJb*wkF z!QGt7WFSi`@*MDpng~(nq51ErO3I8HLr0y~%gG z?^HJ*3aR@1j=WzQ_-_`h5?rY1e3L_-m}#;(Lc{7cbMo|oAM2AZz|y{0N)xcwrbjMr zP1Ztvo|E>qMJjB<8fIL!YH|1&cMQmHZA=Q~^bf?MQ$(!=cL}D1L(P)ZfYedyJce~Q zcD)Mcl?1uPyb99xj9yM@l%N;0$|#RTt2s#%zPw3#c150*wwb1H`+i5~4&TJ3YQ?=s z-LS*XiB^*fHIJ32f_(+sDj{#-Snr!`u8LS&*HpDUXsF}7pR(`g;r_#w1cJq(`A~DY zM$De;3gI@blShMstgNafBSwxHyOf11-vdN4CdzP3>#^k)VZ z&WiloEp57nhlTj&P5LbrMk+pVU5M@C{DSF0|NJ>pgEoyT&da7g(Ur8at5{Q;`oOES zw0z8JP6CxqE6yt^&C4y$clt4XDyh9kTS`cZkPj9;ehZhHQteVtj9|Q_v3Dq`mwh>b z0=t95?xa_EGE<$AQifW1nP$8j(?(3))PG%pOV}>5U7t`GD7J>MqLR{Si{|FeVO<}k~|_rrA< zfv>M7O-$DPe79fa);Ri{*F~NPvK1+N5e$x$fRkHVN0K~m48wPeIh-4CyMC(J)`MD> z!&h|D{jOy5!;i9j2Xn$Wo=-!(t2@xAZ1eJrGh^CRQ=l{}c#ZF7` z35R4bbPpTEIZ~$R5LQ(jkEzq=fixf$!x0S&q4C=Ho*^my!|0$q;n8%|{IpZCVM*K( zAtjMkoV3`&Pw_VD;lJ*l$;@c>tJA3ZM1_3{UQg2CUUgD`}EJXS2D2g^is;aJ(H57Z-q;Y@N9yr z!o4UDi=gCOJPYScEiIWkEOVL5coSA)qP&(Gew}lSmvmJK^fc*iqD%&_5hpy&)YpTstY0EGDt|YX?4cd zhMygqHi`0`02637QJOhGQez@-t9b?`UTEXya@`^n%OxUp%cWLB>Q%bV=Q=N~MUdg4 z_0&^oWJX|}%x$sTK?+o*n{@ewUO4~vw%IjKQrMW`yijILHdRY^cNO608m-3}rtV`3 zzfO0nGKL}!_$K9qGd)sM@!Cww-xJb?rgBM@DN@a}Y5CT>dqtfVh8k~!<=l+qeyvo< z;S1gZ#w(ewh0^O}V+q}19A}<2P;NA|HX8Zuix}TwaxR=tB76t=?_*@*tfMy4-T!?g z8!t#>eXA4DaQ>H^o>?dH-KwI=il)=#?l%qGu(E+;DpgMLscWSUwg?QcdS}V!do`vE=#a@4ku30fJ6g%i*#AC>Ys+7cK^xG?16lmqgXGeE zOW4T#lKs%Cm`yi*EPMbmd^r2LZ0zzuU|QJpq+l(oZL*&jW`9g{B^8M=jWfa8g$d;Eg`8KgQtGaDA2T?5Osqwd?A=SAP)8)vV;9 z^}#6Io!8008S@I~7rDWp*~ek~Us8DPRH4+B)qYr8S|qw*ibKjK9AShTHeg1a{>YIZ zeVO}dvBJScH*vG|kt>!9q*orOtvVKAY|5{SHe1sxUur}$@q0D{L+>L;xa|+Of^CEgn9?n$YJj zqeL^O4!8F#VasPuKhi2JHR-Tw%t%ii5ukcb zwPnwpUr>;(gWut&98QiDw|uzouhQB#eFpE8O^c&(yg#&5T6oNOj}rD~=@I9f-8A>> zB{r2Wn3n2_xVYtnc2vS(Nwr`T0J>v1q&mg4u`Lx_6fy<1ty6a-J-z$;oM+UktBZI| zjj16^FHEe(_?;|_B5i!iZpB~opJSekB6Yiu4}du#Jjse~s|Tm^C-O{$t7)Jor-^V6u-L2`ioqjAOEOKY1DyO-O)nx{Wnzzq-bsZ~<-zCn*kHTM6iI{!d( z{O;WPwdn6?;Z};uL`C9}+DverK9p+H3Yo3wLo~C`|9eBtD;+s*OewE43a3v`sv|l} zxRW1l6#dZ#ZCRdH)A>I&;)W?Kq$FcT`NFUu5Buu>hvJ~C+4#`mIF3mshoHnwG zcG9*|_lkhLqP^`jO0aDI)Q0B!kW;WC``$bPw>kJ^Sz_%2OLj&O$RRbLoJ zxzPIu7S{BFjD=UY_3vl=iRGo5R`AP{{3sw*kr4xut+(QQI8<&MDWPwcMj0O6Z!WnL z5Eb!6IUlM~mJAOBSeBJ%!}o7T(!h7x`s8urQRo$}f4P|mTvL)+lJ zTAvV8;VlMcuV8(RtI=zl^tqAS&eeW`YH1d4kJ1KQ(+VxefQ(6u?S^<+vi5B;WMp_x z)M!UCT$ZKBocsX~+e76u4YnJRE*EFoW^?j=4I^v%e8jb>n=#ny8V2L^9Uk}butsGq zXfoc~xc6F0DV<=>8EgE&U~58@d0hvV2Sm5m_Tpf-Tb3g*`VShIBn^L`rov4s{vg~zawaP`ZYO1N$Pzc zR`vK=3BBRsDocIBo%Hj0@!pb06mm=E+AH%cr-PCov(@v%t}XrYnVt?h+6!frFH>YY zpXpCAO1Y-=&xWDdm-A^g{Z_V|PO}#x^8>GF`JLX>po*@t&67;q z+>%+SFn4~5y_oa~nZ1<=-|pHk+otW$DDSp@Tav{ufJm=}e$#T4u9Y|LoRMxQCGIux z(6n!L(p7C{y#5ue-i@ZEojU#yN}$GWpVQQIGA)F~8vkuCVIEtHg_COqMKg0t=atSV z;&+5*&YCgvS0ZfTyP$AS^PGq!g3@dTAO_Qy2LM(Q}MV3`R~lphIx1KgeQG#b&5kX0QtENJIcIakXbD9 zs`-Um}mluAVQLod}^OET+=${o?DQ+?$heVRQmbTR(HDc-3tr~r{%g!i0yodb5YjxoFLon?6Q?W zFU{5mw){Xc-7QS2v5u)SKZEAHFVx4YwhQVsk0~x4%TrOQ2%9G*MKirZIW=Z}qSfvd z9*2>2lrnr*=w2?^aB0UgwYkEN!@3U*+}ki6i6e>Ri$D8Xc09QahQyYaR`Q8htaN#W z)QbH?3X4Tb;lK9Mp-w_qGB9(RppJjnp&tey4V^Z0vjc6kv>HJ67P~@4{HZzA9YSTtj$`n4Dvox1<7h$tm4vFs-DtB!6KEvn|En zVyjvCS(t?sr`PrG72bualBCWI7c#l2e+*z9k8wFl!=sJdVJu6s^^laxy;1jv-Tpu@ zKiRNkIJz0#STa;?u9H?!QRjr!>j(cI74&08USGL5wERnTWVZy$mD(ZOS zdr?_=)OXrvih2)jTTc4z2PX{9Jv?0@p~ZXB=wwby6}R`-qUvRqFZwNmft`Hf(O(17TpODzle z;&Tqa)zZ%m$=Y~inBfTeEpnyPU@UQDoRZom(fh)eMmJ4HN*xj zqrMY*2BGRWNw^Bp*ZpolCej%kvv)c{E3~BMDJpTll~QZ^&OS^lDIGq>l}clP`!yHs zQSzO&eng00H8RbjIR@tg*pT3~jWqVCjT}N5k zq+45+ZtS=|S=Rv=LTH1Pf)y035C}mIvc@!jr7csf1_eQ zKieXo@~?30I1=~o{uBVebL-gn&=G15)%l}QQbPX4hTbjln@{ATw#o|Fn*XrBxkXGU z4tm#`CIU2b#&&x0+XrITy!AJ{yK?=8pVp#Gj_|H)<|U(PVc%NNU&;I*iKazL7PQcR zgYHl6Glxm;1TB+3^9y7BXiZY>@IgT8%y4oWmumghecZ5ZYy+1DUpQ4Smoi>x+S_93 zCSJ}|G?i;$GHa|?TjaYQJ-u;eLav4by{TM)FI(Gftu|D9c5-IU1ouQ}2N$8Z-Z>@fe2xOdxb zvY_OZ9Vt4 zAo-IyWP_`|{P+hOs#7e`Ia%GDM=B>ou#E?Ldn~__%pO9|*ylR!{wenvM~WTV?F!<2wfGafg7w}fGbXgGJUwKzTud*#UDuRTu|af6}Z=*e3a z57~cf%O`3SsFOR=Sxl*o$70MqtvDNntX!Up+UTh@7$u=FmsUv(d~n$hXTyq$O(z4b zWswvD8FUX3lM{2pR>Az_C7rK8^{%^f7;8BzN$-uUpL=-u%8@y;Q~SV`waJkYXMwR|NfT-KtHqk=zz}^y=3#fv;#j|`!uN^ z4;_$xRsoR%_V>eqqq-TGZxnWF{rPHHhn9~lXs4Ak=NKSiO>IeZx@DXGve2bNpxB@F zXIY=B*g0m)WEZjQLbbtjlXG#{W6dn`_-a@Yw;NCXr2z^m4&ib;k-+{N1Z)|cWHocO zt|0*1F#q!KYctNOV=hK413{FuZB+4>njPh})Kpn&XiM9JbbsFhe|_?+J7M|6$D?Cp zs7v}E5T&X6N}(c(QsqI&Ej0izb;aLqAJ0udRqoLNNfW{JN2CE0!vS^$7);Khj1Zg8 z@dW~Elp-S%EEfPuQ=WPFE@gNOV2g@;2d=H{5rS7hWT9X8eOV|!nUU+ldtzrx)0SD@ z(z~R|ur~q08*)oLp<6Ukb_9>O34B4EoE&*aUQOpAefO@+@oVX8hWf9pUB|11x}}aL zTy-L(3Q4!K6oZ6qkc-@HlCD|qJTB`i&lKRbLXecA4;1%`zDwEF&#`|gJfBood zXMB?@#m&}?z2vJ_I%)-rlxEA?UT&ofpQYd>dej0jGmg;>YlyhG7=fqr(~!-$Sr{qA zg+~j;eo{K8Qu!S(HIdkS|KaQS$IZcE-y1EqBPDsmc!j?uoC6n>N27e2?N39g!if{~ z$?(FA!wJB=1oAw00K)LH5;j{&_s3q#CN*y3P)jqABE55dX-ReVu9oe(DyGM{84gJe zDYJr@OOP@Mjoqh%V*Q&NFkFXcs$Qs39k}wUWdKWf@gPPdW!5>l(y@T4JBgL^eOocY z*?jsDNae$XIyaVLfs9Il_sMcE{1lX0b||CVVCk4^4H?$u*#poW|>Hf%p^prtDI>Sb_h~uEwl96vt3&cVpn51WK6~#pmTO zC9BuJ2C;kGu*}GG?|{q*3i*=Xo+|`=#)hK~k=o(vQ9kG`h0FU({7MV~2zw>m!sb_p zcp9!KHyBkUxkeu=fub}m(064#kg>=F{zfGbM%e?8+ipeGU z?082S9=|%t?})v{OA~87vV;aSo)t|1I@d=J#fzk<_DOh$liT7;GI{4OYmG`z8-F^; zQwUhhy^RNz?VlTe3TyM{#$T8M=GHM<^6~ZE83tqNj2M0JdbNW~qcckxHs~J;t$-Gk zzo8M!R)v0?Mnp;3;8L8da{6$KP&MQ+5c0Ixdh~Gro-!7_)?59EX7j8t)`Wm}OBNuA z>CA|n9fRy2lwL~cfu9{|1$@^PjkRa%1=w4+Bynf9{26p*HCPIrZumAY6Ox*hqI6yo zYKV3hum4fS=^mA-ga~SfieG36_RF*<>!wFmLW&<(Y>;mnb{l;3eNEr}weC=Py0yvw z_KST8neLN#0Ylz9=hcBSwUGLI_vy>+=ley&l7R6h%mT;n>E1zlupf=5?XAx0!Sj7? zRp`##M-VBE!HufKZ_Qa(#;ecF(xO z@Em$tkO-u0EeMEqV*C;>oK5$#uW!DBK~Oe|GuY|7I zVN8o4>>8+Y2d*z%3&n2qmpRS0m-6-q?%O#4={d~NgCiw(7Tt-vUb=szx7AY@kI}j= zPVIXh+YBn4!`o=Y(n;$c9>UlJU5g>x#(G}nX_>i<1_K#bnJbeNb{0!t0V(udEgg+V z$O-*3d{j&(*6t;t6s$^ywwF|drkClIo^eBm0=nJH(*?(dR&L@!H}Ial0`|KNGcf?-hqaC=5fgt@QD-+&QDeRzoUS1BlH z-aFN)g?wyF6WQ}c(5A(7xRcaN6itr|>*L8?x~a{<$J_m#G|RaZ9y!%J^5e-g<|K=& z?2#+#t~53_U#vg&l%854zliG)jCE?94ajW6+z*_oi5S=NfUL+4Y05zg*)`UhLD3oU z%t(Xwl3!~^b}jp;6oemt+lv8`TDer$VkDBEms+!-tGRf`Qpoq}lxQse^bH>^1wlG$ z(5Rkqu6NjL#Mz;<(jDBzPcq7yJK6MZs`bonRpPEFuCHLM4r>3^YUA1J<`xNmp!asP zk`VG@GbRtb)p$mcR_E33*1Ly5;6&N&)}SAT>Vn{AXPvqDf=f#aD@vo zK!Nr465QM|G_2H6pXpT(ktzN2Wz$u`&-~6N2CQK`U)@@L{X;577s-GE>096!kz~=1 zDXfzM>R}*$%gS3(+3c!i*Ed@RKhQ;l4Uew0NgNz^xwsU8j~_X@nKYi~Nuk{b2L!#j z{*-iFn-(DaG_$pvXB(d_Nz>}n_U5bA_U=Ao+uY4Ys-KNbyBgQTA|up~3qKLuY|H_u zd}X&7m(Q80yEHu&M->4}Lwb+^@aod>D3@~E68MM-;3Ge&ekAofwHj#G|Hr!M+C!5& zmq4;Qb|zK>K5QFHnobDgor4#TUP_{}gM-hl##X#0E!!^(m~TtjaoKm}EnFq~X^G_C&BAg?6j4 zv(f&3cmHL^Wb1-ouJqM(sO8TZJ0!*us@D(8dKcPu0yNQU--G&z@CHUy0GREpxE?U$ zLAu!igM<{2e$%NiX_+g}jt+p_R?r_Z6}x*}=(Env;1F?kus!bZNak<(6bo;}*R2L-`o!vd&jJT{snN?l1(1`ap zxClB4FSzGmT{!O!0-W$QMA_gd<+>_Ks$8>{3nK;#1=}5hd&^c^H~}L2D5Y?Ks9T}# zC>c2FmGtsJ^NW(!&7o;_56#{kl8TTL&$mnS?Rl?P{1Xdy4uiltne1o;m7TonVSYx( z!>)zr^JsTubIZ8-H`B`Au;j{Qv|{D=c3YdT^W)YC=Zvg>5KtFhN6Z+y5(2*(j_hSN@BVx&MY#`2EzarcWS;EKBxUz;m#8l0NK z4=4E&j)R)nI;Ez+}}1bXvhT zi={lZ@H_&))!6T>J=@&rDCNNV2D6xaj?kf3b72RQ{4fuLo~zyACh>!fkB0GV|JA2= zAg}y8+J}7MBPRbQF+G;w3#N(VCr?$2E=?*j=1h&I8k}qxvHE%nOI@hAtEM#DOCUs-Ewx3(6k2iY%FCvD==`b^7`t}btrIv?LrDt%f%!-Otb z3Y*lL(NSyrBl{Vud~z>o?ut%U`xxZ1K&&BE2q56-LP|Hdg|l&EKSm*Fr%Fmw!l*zx zgnL6G49#k&el_LiPcZ|au zKZ;Q3x8uvQe&ise#Vy@n_DdC{^;8Ez2`@6;7}!ZZ)M7|yLu)^RvUoW9ZBz0Gr2*Iv zmm2E_xAGnJN`6j?&B;0Uthd%H7f`sE!%IuR+_B>kB_nQwJlNlCm(o>3_d{~f(LYAt zB%4i}g4iv@+187Vbf2yf0^aP4Qt?NWs^z4r<#f`8lp4BqtI_hnY=aR1wO2b&U&3iS z7t}@gHF^42$^K!hXG$Xh@uz0z`C8I+x)x7trTYr8LE&*hH7 zW;rf+CtX}HD~VVeL@!J-Rz@;k)_YOu0L5EGruwXuDfMh@eGhoz70Zdt zOR)}&)4t^+G3wy3; zO_|-!YMPPct>~99*c|M3(r39L#dno0=EcL#y<2=f9UYH8*91~I-(I2ITrVo+^DTt8 zMBF{;Oz-AXHGkmkV`s|_ptgQEN^&vra~LthE;cJfEZ+wt9dnzd%rDW8SAC}p^3_}+ zXvvr`sQI#Gqp3BY0LWm3!3H&qTH>0G=G~Et#+HzaH)94N+tx`h zR$0U}CpHn(`C%J5;(0}5WhBAa`}*&RW46!Fsedp;-aMZmFa=UP2jZ$Wd@h1A+919H z;wxk8A;7f&ThBLkN;*+AT5ea4X46P>^?rtE&3#tU=Eo~Dxw%_%s3#L&OS*g08Hhc| z>6;T*=`bhB8rD(@NQRri9n+HT#g0ht}G}MijQJ!>_rTIp<+lFy4#%)Kp4%S)L zORu810lT3%#sPLvD0ME*CY|wYauN!ec|iUQ1_yC)Y!_81IXG%M!oD1q9HAT-!zBivz803$q^k7vpTo?6~4&q!%+qyCznV zj2Z6~FT3zh5&Uu>)$$cki46;V)NN#lbf#d8%juWvC6^paf=8p4`P!z>l}50n06Fp2W4veGTna9PWg~)Lgw8*%&eRGhv1ruF+g|vAoALxBa@a z76)0REA28EJDgPBG}`dP_tw#cC`gRVsX^o4?kneZTP_}Mp}y5PXzjzuJbl?X$Z`k4 zWMH=HGb;F}pyWzhUdtU0oiUxZGvfqW)`cwUTj;U%;_D8V)R8M3jalx^5CgM9A``lh ze5hlrtGnp(C6p<4ThH!2fDZz*8LJx`c2^gaFlA9YT)slEp$Fmqh>hp1_2{>PUs8IH zT^;RO0F&Mt4EFEB3wVI+ZI}=CFN>zjBm84&_bAA&VzELYkRJ{4ALMKH2LNZK93L#c z@_wlT<&*blvBK&eW;?NQV1}f_$%K#|_92mZ!WU}|tTyC#A*)gR*LW4Yk=zMQwn8)N z;gZE5bo&QxY7(E!qY1BSbFtRIaKO0qC?z?PVy9RHCFJ0M%vNR~%o4It7d}eb!|t#L zW*l681Sr$FnBgmQ<6}X&(xz@eH-aReqp^jZr}$r{hy6gmruzBv~ zFWqKHlLO4@q4U;((5_^=D;gGAs8lnL(dL=ESv4V5-6=s(Ywk(fJnN4qI9ojg`Mn)~ z^Hp6F4;oGIPgTtV1`>QLKeO9`Oa%6hSp(;K8@GX}Sn5!5}$P|jj1=qQ0t6Dyh z2DKeS*Yf*^QlFoqG`9P5gc|dsz-nTqmTT`CsLvDZ$rZm+#^hY%aomwWx3@~Jgh?`f zpLn{DYbhXjcn-S(ST+aLU?q?p5HX5On}|wJvfi>WPz|Bz7gH8PR}R&+G8l$0^MffH z*?--Ukl>Wk#sM)&Tf(@$vhepIV^u_i#>qjWPG+z%clvl$%W#CSz||~L?gi-v$~X9s zVI+%QlX6Fr7_%;_%k~On*ns*xgZ(NlFIu;<@*PahsxIHs*dwyqr9~)9dNZ}~ZP)jL z!w==G;Sz@X(z*kCG`D2P{oPSBw2VR8-Ke6+cIt*v3%Z#%A4B3?E+B2bk5}YAK9qeh zuI5Srrr5u22_Ik=Qp+*HSX8(wPHJKSGv~edE$LnvRao7bs2#hSTi?6n|4ho+A8*gz zKu+*o^j}+}pL%3Dkh>1SBL0(aY^MymtTC$k>6^xX zQ*MgX_f-!4vJ0y8?QKi|>?Zjn@^G5)U+uVy4&f%|66XgrxpZ3~f8!=qjLq=kK}XRD ze@%vxl$W!y7p>>AF7` z)7Tis$Z4unM^U}eb?G`7G%^WZ8skxL5kDN99?H8uG#opM#}zHGn5I;v5SBfX>e`T^ z$`m$J*>Y!noOyzd$D*EfU>p9?TxaUOiK$eyK$5OX_TDtk^4TJJKKk}BSpt|U*(tob zoVC2M{X!?n@AiA%YJ=9`ln^Tdu;5I$Z#SiF?yPU_Z#-2Y#2WV}@_QPQHGLb!dg@)V zzTHlM;)~!NvH0G!IdiXD^Y!Uqbb1IKbhx~CWKjixlicdUoAre^n+tDR3vXWS)V53u zd`Zfhyi*&St+}R{-zwai3Agc-?`s>)KD$jAsJidUG0U;Apa1l){ySulirbeexHN~A zjB!LpNRlOg(EXY8MaWg6*>FYQ72S&wf?TAqTkD-QwgeaGegEWvY>2Zl+7^_P?~aau zettf~(Vm@A9%i@&KE$|kiN=!HgX+jQgCuHmKj!pseDl)1k0|>tFN>1~gw%~Oee)+P zrF@g_kH)hnT$l0SO(Xnz7=LlY#+$~m?jR$RT^^X#IPM|j72~7gi`&hwj{UJSKI(82 zx-yL$p0hG~`IAuyxsWxE`)5Z}U$3rs7M4`SWj-Q5fN{3T z#G{;_`b^xp`zeNN*6$1tjR>JSjRyV_w+I_(4^~l2EEi*XT#5$a8oC$K6DUUu5Phfq zQk+P=71tk5qi6aJBsg}a4<$#U`pU#rF{`~Cf{}XUXc&Qq!@P)yT04TnR}b`u9o2Yo zVuQI0yIaAQT;yzeoS+vaKa_=dE|PMNf1 z;zwSY7f;K+F=LVCG^}ebHQc~0jve8sQqa|5;wq>V(&-f)Uz3(gK1=0nU8@|j@HDn(8?7M#1Cxj{qfNQ ze73LX%IlWSRR(9QXdMErB)J+fwO?#2w~JSoIuxcYix`*up%}qb_$s&yg)9A>gFM%X z3~oZ*!Nu(JjjfkC z1%kxh=_qay^-dUV)Q+^f@35+GcDiH%zU=tmJBDUDNl|Mtimb4B#T!>Q)kvkLIWft7 zx#2mG&5k^P# zq(Bs&B-G`F;N-jjA@2A3elE$7F;`ePu1rA5d5Bsu#g>y4E8SmPwjP+(Xr9eFA9NQK zb<1t`DOv#Ir+^EQ+f270s=pG@P=+&`vf5LpA?#OWI`v&LF0i6t{MQjo9G$Zt1qgtX)EY}54cyINEhIw z9q;J764uAo2M-WfNo0WwFUU_iu@)m?lA}K|BimZ#Y&QeGpiz;oahSS;_&3M;SEm!m+e^wT zj*x|bMk9X%Z$Ok}xAd2@eXD`97)tGiL@Mo|Ab%R(*YOiV(YGj9mitj+G4$9|xePLp#g-r6t#Cr-`5RxKw0ZRnf48JE#TFWtG}Rz0-E=h++6i zUV*n7`Mb{H;;VtbI)jyJR@?{T;r-^Tmuuf){J@IhjvAquEc%1Kl;s3KA)>flsrmeF zV=_AHh;WYHcAPp)Fx6!a<`g(TzhpQ{W;V9iMlm8~KDEH1yKuzzuzQLV4zg4L49vOt zj4;3tLfo)*XdFJxyiz=yNk8VWt^7XPuJp1@g{sz}y+M(T;(_#>AanG8F+q(T#bc`j zs<4ahJ$V}V-fp5}Z<|IgoD6cnDv4c`D;x)BqzykeNP}~AqTM9u(sReN#NGdj$IG!q zx}5Npf{&RI7H{e@)#+TRx?8&D%9;9`X=Vzd+R!b2YYl*f9G-+}HPN?e4+mO;X^T)k zghwNK`T*65MtDuBD2L}Rb^~oGvd~gG!LTxcBlr+FVJ#gkM{lg&yNPlV3l}@z#IDZ1 zo{ z43E?A;$Zj_YSnedcB_H*M~IX?5+&?_|Fw^zUX_cjT?dQA$!^Vk|Ec>)Fbp?_Nxc@v zPfD!UfzObV{>mOB7eavWn}vsymPPvuaTRwUHr;w_tzD^(oPf4S$sJ~A6N}ps^$JD^ zYQv#Ol!zt1vnM7%<->xL(CmCP!E|UEBr$MY{zF!zns#PQ%k>!tqcEZR=Bfo#tFfZ* zw3{?c);r6dA1L+T6iX!yj3|X$5wdPF4J5IUe{IBCn(lmuCGgb1o`XiG#M=Xbsaw&k$NCNcj2MX1i6kU?rse(t7Cp%?TB@tdU6yy)0{& z^b6J{fnYqb7ot?zc*^qb5yEN*1*p-fO0`Kt3boiYEDv0bd8K$SbZ~&qZ3@O?H1^I% ziqLLu9yebRSpefnE_<>mJY0Erf8~$&Z|z%RhUWIKec7)S@*$jc z|MHF`6N44d%b%(0IUJhpUia*A@vJ`__9rLBpNLpDXli=Or{>%KUj}3kpAaIh*gjCw zyWYx>d~&z8H@7#+IeD;h|JGBV^=8`);Zxkd@8K5LAAaY#RD07W2kmFgZ_9FO4572R zfzCw|*5l$^c#K>*n*`P|^Mx z{>wGXNB&^t!Go2Dw;G?l>ccYhN0SjmY}%dSuS7NAnnqIlImdEc`h7Ic#o6HWEJX!Var(<#i6=ZhdDy~(+3C#I6TJfJkz3DT ze>o$kvx{z*jmau^ad+rrggl+uhN5>|4@h_A@K72c=hNfL#@9sYpb1-`SVl?O# z+V1RSve-0k?SjiJ4THeip5Q+>%f)bOmz~S)>OMft!XAlTPWeB1)~WAGGE3UmR{vsl zG8>&CDcUZ5tj+m3|AW6dW#jZw5|Kid7gN1Ns5!--Rg2(LW($<>Z79L~j;3%JtRsQy zK``HYVAmXkw${0SlO~wqe49^C7^FzMMp_Jh`}J~q*(WRYj7?B5(;Q_M&5ztK7r*`T z+b`Z}*yMa%VI&h!4}706qOYrVn=NZL2dvyl_<9@5Y1tG3;l*?|Ib@QEl;ZbpGB_193(DIo;oKS_cChnrf7>e(3kP}=x{We zHq!===Ob6^=-ub1U~cPekCq@C!_QeNnc#571(M3dj!U8NE#6D&vZES(9rUrP>G8{j zf@3_7j8I0Q%;8-Qdi_Zt3+8a?VDL+W9EyGBWI4do5h-|Q6ZP?w3^60oNpy#*~1Xi42F3qPzD=JATckE(@vtS?+CR#WI4ZcjP9 zoQB59La#F`)VaXooCJ0&#*z7w6YQ9g7`u(P5VxzPG#8JS@b_qy`-{R;EDjXXc`1lGI zCOZjg<1PmdXvY22Y%w;>Z@&zOzx_HHL)pP#=@fYn9{j7%nU|aX_RD(?Sfz8kyF@q3 zAIxLcjGDDZej90@c$qmC{txLsc6BedHV7)#J|Jhq4Z2KB#gsGmeOqZHFAHsz=#dtUw zSvG2Gc3~Vf7(}=Rb|;$!W_uCQpvc7Ng+;T;?aB zX!4B{Wxr(z)@%sYEoMGHKjnw47yi<@!@RJDrTYFatB`-Ff1SPUog9cp zIm6;7=T4}tt&~CV7_p5E(%fv2#~rD%vc$+VV$sAz`o_+d->@?ANk%F(Og}r-*WtVz zgQ0rM%FMq{-Ks!LZ?i6#7i3c4`E4Qdo5(})ZeW_hE z){ZZ3Lv%|b%ZV;gJ#>#wDE>m^F@vqwCK<(X+Od!1*{5HD{-bgqQA2?%or`W|4xorA ze&!AtReR^NAf(48G#@5~i2W>3le`OhfI5h#{p6u#OMLYcoa*ZIjAQ-XV^kH%`KnZo;4Rd8n zfTRD1BAYzQpyEjL$78Qsg9B(3Tbqn=t4eWd`n9u5QmaOxjH!)c_tk!*P?E0V-$`WH zDE9e6$}j%YJJo?c@8hjBK(e2931COy@9SLXY7P8WvqJI)gcGbQL>90{(H@yXB@BMa z*#6pe4a*elcRY&oXm4ls3f^r=)t4j4;B|9%u(QeBZ7^8=v$5AGzTa4V$$$6Tjp9eY zFl5@7nk@v05Bi{z!R%s2=wb2W+Qzr~v*j;Q=JeSbm&`*mltT_h8#J;)UN$;>*OUnO zeX*)b$XqX|%_>;o#l!g*kLF)|HUHx4^n!p(6bLB1Y_|)lLNLGiD*jSikBIH@_j)S7 z?UWyOv!AhmuC-))*z%HL>-3Zy=EaZ49?@S89E>=g>5G>+@9Wum;{u9Ra?P7oz%42G zHz0k0Vt$i`MXp1Zx@U?!YMLa6s5_TvbvR5Tu#^cP=n%25`?&doE*|v|m29lYW1&;E z#S9AK7TjbNtWB_KrlbSp(r!*KO2EbTrN62LjZzC9TRG_GyS%iD%6l8mf~IA=WYXiR z@%Q|+hoq>1q1E!^bT(s3`cM3iX?f%Z(^uo+lR)%*eGuFF%1)rKbd$~7B}xc4#?X4c zsV-PCX2-Cj!tcYrqnZa8D{t+<25GYp!R8?5_T|DSb;H&2bO4pG=tI&EC-tyOIfJgn zPrFaA2i^B<$^m-(IAhXD8CYXbwKHu?pw#S0v5E9E5Q$Nd@*o#v-AUkp=f`^i<^|R( z$k&CRUjK70MizxFrZSOl4B!^5DK-l`H%>w%w?fqgEGQA{tpvCxr#6|5woDHo^& z8qW0wDiZ&s0ff&^nk9t?!MHM^S+{~vYO*UsG5t-X>vJ6S+&5g5U_;8XL9XX`98J%O znKW701d*wEbLovH%gLhdf+G5w{Gb7Bka+YNPJrD%yo{vMro{y!`<$^#K7K%FpOb#f zulr(9XYY#5d%FvwE9^P>%r5GrTEw{C-`OgXCt$*Yo-m5SvJ}Ocx6Vn+q>raC8-Z_D zmB;1VsQsGjupD)p7GJ*-9d4R6{7x!{OlOufR0lbqcGm6U`~t?v{#nm$$D6{Yk5izQ z1gj7S!yf3gZ|)%Cm22snJBlsh8I2*=;TYm@ST0OxFSNz^;dU9oIzZ!oa7qa++m#RA z2@c8ep?q-Y5UUgWMs(28iQWQ2DFJUVGgfTEG8)rUKRbBs%9cc5t)D^yhO7}KWt@z| z){22gBpdt4DHl}a?|Vai@X;C&o7l9|q=`*Z;v@E*F^Q#>1jr^jLLIA0_+n#s?XSTc z8}NXil89!;Z}HExb<^A&P3>Ue;pMhZNueAmcYs=rR=2=-yGb!;SKSZFO|v*Khl;A# z)X>ZXsb3o}n%>ieeNz<*apM92^NI$^ieOI;0)@K0HH+1b1 z{1=<|Ci=~25^N#}=#n=6r6&1Jj}{vCx#wg0!DW1M??FP2Q*IqvHy?m`_ta^eK1%?l-15Ha<>}) z{HIq^>jqoBBGFEez>vuP+_=5^IM7eTBakZ7X;xUM^`)lvM@Z`JRsJK=7cFjUZwkI= zrA;Hwn_tiRSJbi7@V{%h5(Hs}{q7Js(#ZB(SH{`(U(<{aq^>4GOe~*Fru3f$c)GvY5@RAB#}*G` zqWS_0EA|%27R3?_R=1CPmWWNzmWshMzFB>sf`etxMWD?&pd~bC?v?}eEioAQ;4$*r z78+ijUZO9g0bfXTO1SRynu_q--qV$o2>GL72N%F52=lyuD5;@53DmKTf?ySFdv$z4cb9Hs5mxS&r2WJ+syF{z5jSkh zu-poCurAC5hkO;4Y-#m2!OzEjb7*Yh-mg zNjVM9!(v&GoV6Lxfz4$^1Z=o`aFt5T<&Em0@EaCf+|y*manm|jGirVcN;N!4hGU7P zGf?B|)4o5!xyAJay)66|Cw8bM$H~DDc$iPvK5Yg=2|1Ac z&Ntt_>@b4P)&^p1SsK(V+b!LrTGl(;I4(sV%D!Y0<=n(_L(%^BKN@HY58nw#&+M?r zK_8Tg15ZHlnbV#fRTd)9i*RU;&Zo(L zPUD~Sztbr*Q}-{$Y$oSEAs!){GZ=apjzN=HLOsW{1*~G%*554SebHK__^BQrnk73B zH1`+W$ZczeQ_U{u3cHK32rc<}Jnf&m0AlLoaIVdDZ!(V}0&qGG&+8b)u!exvZjg+c zXhPI8G!t?+>ej&aPu9z0IxiZ;_FOVcZ(%0v*5;JRPIINWTFhZ0>@^LjWt8Qx4m83b zPA{3m*X@m+)@o<9wcTlLZtrbvKKmit$qef|JjUF5DpFG6H<(~qzDu4ARbTCbEHwN3 zfL1oHkHisB^2)4T4$#dID{!~zdZki+4gh8=K=-xO;kua({OuIJvMVy5ZFaxf-;c( z7MJ42`>X@3h(of0IRki1&a;a0w zv!O&+Irob6(`N#C_3Y3m17n#+_i|F8CdMItk(w!hB=zO?^OW+Jp}GeL*`AFRca9ke6TUiXs@JO+KS9!Q*z=}kOx0o!Bs71sm%<$K@Rn=icOUZ}AiCO^8g;BYFuM)yo}-;X7)MzyjWctH?&uV)n)DzI9xqYV%@^5n!RL)$QbBSES^pas*=4O5@%E0*Qn*yk-8(i08|Bcg@j2Rs3 zs``nK9)m{E$1wq0t##hr&1?bW45-Kio#lKjG(yC6JbLtUCXobSe%khV{d3`rMzN>asm%j9+Bx~XeG!F z92!&ok+|(bx)IEjiq~|7lYq{Zi=VN-ga9Fm-Zhv^Y7mu0vjr@=lQKkE;L3gD1jUhC;B;9Y65v=x zQx1t?#cQ1{wvQ^8``%uxM%Eu^crr6Mf10E!A%^Cohbt?O9$p1x>-PYuh?UHxDYqo* zlaIn3Q=~@>YcMy8Op7Y=7VNRE2&?OGR{lgvW*inQ)Ik0UY7x0mvgb_nGC*?;S`}DS z;@Tu0v^H8H5(~9C3T4F_NWwCmlX>BwuDCSy+=qHN6{SE4lwe@ouqy)Z$JA$0vT)KH z)YP*3u?*)o&2}6x`@=OcW*M?QFM*OX1iQgbe7bwE6SA9YUpn$bVybWaN@)4ESPCJc zr6kpA&ZPk{Ov(>yn6CT(nY{`b5jRvY(1JpX6b$CR z88zJq`tD><^h{L7rAyroFZrEpV8E2~`?PmLWDT}DmMS!WF9g!tPiAb zUESJx@O4E4mXRjgziCo4elODDxIGNaH;Yu;4v=-L8?@^IL*~q51=xmLO^?ZM6Bh&; z%`n&&Te~C~wSBFPm=1?I_c`e=>8o$UxVz9QN4C1e>^{1<)2*s_AR80i;GhO9+9fky zFgwr@sSUy$3C&R>kjP}ZUIJK>hzNpzzVl~(*nM>O@89($yQ0x+d%aS;G^L15)Zw`u z9yk+M^h(W@G=|ueOVmB>R+?6gsNW`tkJJmoO=hEC9gI)9%H=?1%&5}4q$a5b5oW>I zie}1wkJ(s_BCY+$J6jqTJd`PD1wRZe!yykG|;_>YQdjhzzq z$!SjU=Xk6?q67aGtu=GvLw7|+>##tieYwA;*~mECmT*B2Hlv&}EEK!@?P9g1!+%UZ zI`l8>(CjF}!mtykY>9|qnV{u0hX(nj9g_DWaflh3W@lW3q+jLUE@?^JL$iuxw`UBL z`xufcG%)CuSvp})8MmGgQrM7S1vvR}Pp5-(G=ND8(y#?eLl;0pUlxRSasUIt;upU) zQ9Jriu57VEn^iTsP~+9j{pvqHeDuw~z7f_tR!5~5@EyvOM){`IZgTK0>3z2Pq!cBqnR1M_DCBSgfZE+eW)fQR!sSsZ*tI1na$K@zOsJO?@ecY zvcd*8o1T7KSIu_r>}jOeJ~5e!UdKV6#L~?((N3iTT{I6ikPAZ(^eAmR6*XThQH+2| z`_^dgGZu7%d+pBp4?C;dn@=%DS}*`dR%gcrAz-b9gh%{z`P@LgG-8Q(Ct?~8j}{hD z*yuf+ivddA!XDu==~f@c2WQVAR$cr0UJ^gK2y~@lkXr*K4Q}0FYCCF}!7Xf6+N&lJ zc6MNB5Q8>%w#rC6W2!;w3_wK3cf}215qNEtG=kDA#s|A_62K42f?>$wJ3@zjO;bP! z5;P8bF2!4nRM2{sj!gZC={a~IiX=^AIATirszZ>Ku;~h)S&!}t9_RS#jt)(G5|J)@ zf(ga5G}Mmr7z4BQw40mphtrA%pHj*@^$d6*7|48>@)ukjY6f-LY-B}#7wVYnlx(I_ zg~N0Z9bI3kj_ zG|%~DERXE(mcnXpquAcuGY-p9j+hJcR-MxszHa}}DS3djxCqR4sOFY7x<_8I-j$83 z@ceruMI{j!|2^rW8I@!KV@DPnVWmpxoQ(>e*-Ip_tLp|yAjYzVmoeMF@mMAqveL;&;}WJxbGF#2{5Y^gSj|6ll$W*>vi@mBW0Q-uOK&b$e9G5f z3D_6rZEn0mgjOgVdsb4Bw(@yR(Q`>kf>%8u+m4Cx&P(XdNfC~<{nqonh~KmuOrOM2 z56#7CGLJ}_l0BcaU9kx>z~H-J5+&>+ae`$esO0Ua?I6zrTS70yL`eb3nTio*?zd3| z!>pk=!C63x6HVcjkSHLvH1Jaeo1DC3HD#^^TIs?9M0q4Z_uY2Oz@qwzSuj139Y@*7 z@F>xE=X%pTv$KHOlY2)r#0AFxV=8E7vkp}Hmf&2v^`z`w+(M=AyOtI`g6&u~&?-CO zw_n4v7LaS%v^UucOY1mukr9iM0!CJIBE-oyx>(d-0$IGxZ@_ZEww3ZSjB~39YV+VM*92 zPG9n|9Z$#g(ooXg!bOKOZ6X=tbXVf))Qe@8{JmRQMNj!&-@hKM+=z=pXx3z5? zWr+N!6fwbs4eoIc!FE$oc9P)NJRMBbMJGaBf_r7v=zFUbtzJb}YnWPhSuuhS&DC$6 zzF7ZFAPF&7+y;&VWiU&45Ng-Ov8w_oXF1|;3ClcR62bJW*L+{-olBw99X7#y;S++L1gLEJ6pDphhlV50u{5S_9G z@>m)dq8DJ)YOEk@8LHD#f+jw!6fIlh`0Pj{x^BkPlQ;pi$y%Y!MT{%!SJfe<{YCp~TK8XrY-^l45zWmQ?nYYFCbdRV(dOJV;V8oi1DjkIq~LGgjsE zRTG2ty+6wFOay8pu&)Zi&iGRKCWm(G0OQ@4)+zBca9c?wFXbwuM*jdipxh(&;!g97 z+r!SMcf}(qgF?B;wH2~Gx~#>>x_ZFLe8v;?;!g9eHQMx#W!vSpQ?Z(=H)#IFQ!W#J zOnr%w%0ZAZ;9NdzpE5AUn5ShddE~iOu5i2Mx4M;xHr9OK$=a#1b`bLq?BHmrmKQv# zY6yXIesMjctXn-9r#&41$s9Xzdk&hEWD>Gab!|;~OnWi)>59Fn@z;vuc(E*xEQ$Q? z^4im?4}>HpLxxFovW0LpDd@jw%eU667&B3C(@YGgHFdfw#}suCk~M!n}VJ;%JKeKswB8gxid2d<>X3=T5jN(c#_kSw)a}y|08;1ZD4J*=D zpWs-E#yU>GJV#DWAPi8P5JhTaN87z2&Eq!-i#S2b3G{J=@WV(xh7}AGkV#_koaJ1C znusv4#CEzb*B$fOU5=ByjBZW3nV=Gin`eZ z`Pc&OQ0oWXbaiVP`=EieUA7fM92T-!ea(b9t>P2Ky|ADI#hWN2-TR#rA ziVa177gQkC75dl)?O;R@S`+|Cg%zS517;8%zCCf|SW_7Jc)+$@UT44a=v%vkbobe_ z`<>Se`Pk<>83EXJ>tOVg7K#6$Wq^k;Q1lFgm-G(BQqjlcwAr+G8shHsn*A` zT)D*4pp{@MY}KuOZ0ws`&zf^g5Df;b=IRoyt!B)$`E)&FU3tpbgrtk{{@$cEa3^O+ zuvGj2jbDtSfg&8pvSI9H2(zW@Nx;b{y3#2zCb!~l5FC;~Wc0M+bC4^nH9$EjShrp6 zP;ourWAHin9r{vb@>%CLcoLT21M}m9hi@Lkwgl1y-Y{Ou)Yl_)s2cYQUOLn6zkJQl zkZHt`!91j!0#d@4e+Zzjt^xGNYkSn`Oa~L?Z80~0mse^Bx3|%8pRmsA`uhGxtJNXH z%GO44=fT6f*R~QS@SAJ8yQGcZ)dcG*Lx*En1%zHGeXO}R(i=ZY@=p{K5ntH$t5meR zEI+#HWih8rE{|_);*`7Xpf@L^v?IoYBkiu6=3T50V{&gA3u4#})V?}b({f$n0g}~4 z?2zA@)o|YE`Z}D?A#D+{T3fe3C*Iw@E2Q4jP3iNWS^fyF?xYR`xNp+1Wg+<}65zgV$vqk{7FQSKBz%hr78_ zUQJtkKh2Pe=(%J!BH89h8$PCCku%wkx5*-F4U|=4->P&agSk*3&VIK4%HsEs>>@iJ z9Sy@2JL6I%Y!P@&*JXW=v`{RDb$2<;{x#p--nm$xu!60<7ptB9&htIeLciF2{$dHF zxsqGE-&?^CgX2(F!SXN!4&&b%(Pdu3mjj4;Wyelkgze1 z5hco4R+Fa&WVc~X+-pt2`meG>Iy^y^wS>?6z2o8qMmeMHMWmYQ5k`A%7s%3T>i8?R zWipv@jdy{Uxslj7ckFN5kgB(vrK)j(FCD%s>*d_We7#L*_Mk~(&k3@o+tmWgquWd> zyLYaq^)<;Z>+z2yM6uMcku&yZ6T225!%Bi?OtuTxxA`Ol57PRUY&Pfnm_uS$_K0l? z7f4(O@y6hE?}vLO{=V*Y30`E`KLS*hWs#FWVq0g$vPpW%DyBV}*qlrgAMv*_+u{vG z>QgXxUt9gz?Y+ljyqC-3rKxUu#~pJ?LrcC9zeoK9jAcbT9&u(VnD`p^hvt}%zNSC9 zv`j^u$6A35SSGz+~$Dh=s!y|B*>Vk;&v^J&DjMdT2E z#JT=BU6IK%=U0Zm-tM$FUbo@35f6-b%HcHR01dh^5TN?>`Zi}LE{SpS_UzAk~Yo2iuut4O%QtP!4;F%1^C1?LSSO(|{AYrDm zsxgu3l1fu~d9u%K2vnQeFi7oT5tPXp%j2{Z?hp*Ri0`s)IOD0I>XWga`G#SkwO3^I zAE2Xl9qwf{S}0Y#$4+2+Ce=DYNo$#0ovY2$&}F$YRg*bX95>qVuH3U=YG5$XZW!3A zXJcG;x^6=8WNuN7RwkQKWf)?Llycw4f$z0-PNvI=Cn^hDE2=H=rLQWyBjU`NO)7&Z z_+QW(7_U%%kVl&M~Y_Xtu^>^9TS{ie+HHY_=R(hVSS7R+qG z6c84n%$_ds<#epHBWA6oqpdYG-EZC?!V&>f6EcW!e=;)=Zym9W)M_L$m%bq~CdHe0 zzS{Df##Q9G*N%y0LuQY52NxirQlv#$N|=k5LWzx&uDAf=h{AO!jvwP9vNG5+*zYiw zx7-^kMO#Xf&FeC^z|?Pv9q48T%r9K%4wgDMC7WgM4Um4Re@Piuw*u& zyIZ?NdNd1chk#MZV$IIzlQdR2YN;O0L+z>SJ0)Z(&d&Ewoh^yVV6aXQn zL`F6WvVN{51lqQKtVCHsAyM_dzQoH8ycTzKoK24qm(ooRy+|PaDb)!R_o=xKnv0kw zlXI$lfdFYSB@9C$mHAGKyI5yAO9#%Z(KWZ^F@=`JIIk9Ep8D!GVZWm#BO!)^{Fb5| zFDBTo2F*Wdt^X0dz9Hmmd&$wZ(;{rCXVZ+Z zB3GbXyDaU?;OOx&(WWx_Q1$gw4ADmNp-X|_o4<)>6z)bj`mKyP)0*Ya+hib}&bu*x zH2J48Zt~k4_%ueDZxYuW5R5SZBr+e63<1E=fT$?h!SP*Qk9h_5wvM?Vpo!sj_Iii# zIws#FUB*QpbYo+4Ok6^fTmQJcN!?2POTq+U(xduU9d~amE$*0X;xD?I_%a}=1e3yKx@7p)~66CMI8T< zFs`iXLZ7m48bk(mUKtnlb%|-zi(p8$OQKxeo@waP?g7tbnt#im!emNG%`sa!B7Eds z&)BkvWUVcCkd{Qup;J`MGI;T(HTwUt@Uo;I#@vVvv1}}ob2H|}SZF0yA@hB>4N**& zQlQbRpm-3w6IM0LCg}dW!Y9Tpcnv5i=o&jH)-ew6pnHf8EZ_o&62WX@WMK{szHx$; z3o0T~O}45W(dnY5oI4LU(W<8gDe`)edojC;@x|7fNiW87S!rEJD=sypxk$&}YD=Qh z#vh=2P$~BUa_q7Q$BC`U@7{`z0uBV%-%x#YdA%40*G}r61vysTTIsPl= zYuq86lC$x{e*~fivM{3ryt2y&5We&7q!~hnWgh~C7^>n#mGLnGMdODK#>Y^ZuWHLd z%Q#cRPq@reDXX=f_IUd^Ko;T^;J=Ho-xQ|6Tmtkyb047UaRDfo_ns@M!u-P4c2q!r zww`Jq>(|2)ydLYokN)eR!_9v*@NX;yl=c0q>pOpgxru8o+=}X4dWB2j!Jj=xS|vr3 zay0cZWtu$nW%0AbqH9MGcd9Z!6utwU7KSox4w#M2WZ2PjC9EI;dT%->VHir8Sx8$v3M-2S{C-)(BO6_`3`yR-m zkiC`#=t11|UBxUwL=JU}O<%^XWaI-->=S{iu9^Tq$$W;{xLTI@NDx;G5Z({E#HS*&^qAW6|SLA*YQt0I;OCJ{j~HS!U|m> z2UDWWBge?${)V;o_dB342UUQ$9_T8eICCiecw$0+kCzLLxEqROcwaVp?*f12?1kyb zi$%piG_ng;vfZ(_<4VNCUrv|Gh1{ji87jr>(&`!8rS(n}DTvH9bwLCvyUmp-t?X}2 z%0jmD;(a|OWlLMJGEdQ?Ct#f+PgSV_3@~zP1p*~nmd}1ktgpMOeOi|WhYOTA44srObk|cwq2YN z>fTopp_tOB%tz}@QoRtBiJj+;XRWNH0?>7rcS5F2{bV6@FuUQmogTlYCA?vJW#G|M zLi4mw&cL`=!xP@~y3AHz9FK5W^c@K{$^m4qCsAcBi7a4N@+Ppc-QbGY)GL~A(R~=7 zLcFe&@l9NdQ&t!zVBUfYu92sa1rLRK+$NN&-fi4TSeaHW5LwZ(BF7?X^G)BhDc~A{ z>udHjIr^L7aPBtj&9Eo%iU0qcd97wv{Ji$1_9;%r(NmN%5p#`(pI092hSvsn0uB0I z=0~^oa<{?$Eq)A0B(UTheiKcwg6n_vp0 za?5(O9=WnGy>r2-*{S~2u25}DM`xY(1gC#){Hfdne{L|be_>)#|2od$IV#_yRmcQ= zXJRAU)*!WY$jlj6%$&vb4o8ZRahEO2Q8G^6m3s0P*5N{|81xS#ka@jrH4-CfaeqK1 zNo0{7HjWw{-FozJ|DN(rd%8TkQ;64kqhZ)ZN6MHgmag=A6C9>d;L*9+O9$EY&I!+5){J3ITsyB^R zUw&mXSwG0FkP0;Rp+M8ew;E5kHu>Lv(S1LXWiezHe7SX?tg)LLJDshAm%Htvv9;QI zd9c6P_W9$#jlKO{?gD7-?r(;7ji>Fc&g#MQeJ)G3ZG}-c@T%}U)9zhERVuXp42>Z7 zSC}c%@_M>P6#S#lt&O%|$XJZtssbVuXun+FD(;NAP(H#i8NUjpZH+jT^2=yU?%j7M zQ%^{Z-e`UEl@70>c79F56JQOcap#&d5SFMSx~aI2haKVdR=d-A*;(6o-f6YB+nw#* z^^JJWGO;Zb+t^vZNio7>Hrk!7&7Fho&gRb3{pA2Ztz75(t0C?^z3zKw>)I06w4vEz zd^KQRnFl3Cfr;6b%RT#wRB)oa?}c502fCb>*v6GlImcz+NPjxN|6gjw;daDWr652Z zUPDEkm|KnOiWpi7+R~t`%})OOv3*Idv)QB^%=%B=^S9BtA)V>LC2porB-1$=32Iad zZiHy0OS&4A-Yc~wrkA?8paKrGIGZc%Qytt1a67{#gNzUm#2!jD&OqN)3A&g74U+^c zQq*4w1O2B;!4Q-g4~l2I#7&7ysu@u$OVdc!6mkiXx{+HLj1`tT)f@@+2FS|z%fL<7 zVMXWq!jjE34Ru*L?j6qF$+gk4?8OUo@Q0{Ot*5ht{*e0&7euL3WHy}fAJ|%V=SQCF zLtda#GIaVtp)gF3$}1QnB>U5??{O4CRUUyYY4+IngJ1p=%g#4kPHhhcmdWtJ45e>= zB<1Q?qD4yTG1tmDj0Px@^iWCCb0+RiMZSrI%=h2j8v@#k+)@*ejJZ`UUwKsR$jdnn3<{lK$Gx3C2 zsl?}-y0==$4g{R46i~2cv-EWddl*|NwQR_OWu+-@Tn6Z}vDF`siHPtZ^2B=Z!?(>t zX6Ub6w>on1S3!?gPu26)t<{&U$gqfuF-3+=WR?cc*yyNc*aVq<- zb;8=rOoLFv&Go0GQ{N=-*0lMa%|G(1xIk8nIz%h5@3bpAt1sJ|uXZ>8y2?bgHaGY8 zfBRoM?ce@aT!_XinF_ZzmIqV@rWeunENaRI(Pq8nCSSwz1NF_^fC;@L;(LmtFkG zl6dU0)`q#7iX)e1L@QI{nE2RIC%=cLSngc2rGil9W*C*u5OHpE*)oL>$NIdh8yUD2 z!qX8+th?wds{xVlz2Un7VfB3u?_H;B(TDS7Ivqd0cW*M9ogej}JiV3C`MZ0N$)Ay2 zy7yKb-O>%~XnS@4`9}L;+KfRKntG+vU5g?vrQA;y)_OrdOlw;Fpg`b^@sEdMSLmo3n=6mP?~ z{dcHn6vAIF-u3}FbhAU|J~;2T?fH$DAPjXOz-(;q?re6Vmic?r*Gba1Tn9cv&~-F?L_{fT8AMiGbrW z)#=b!rKp$HJ;SjwyXVdrMG8}z`qJ8<%dRTzg>tO}WOI5eK_!(t&|)BD$w)+XBGZ-o zc5W>W%?Rm&TLIT1n&-&CYWx$#oIrv1M3?B6`BQF)L~EdpYnC!`kYWo0djkK<`Na&c z_zq^99Dew>a9AQ%a-Q?XHC8606~ktrlik+l>+&F#x{l4x>gLPUHu`t8AFrOhUe_O8 zzr5EHQQajm1oze2;fSjww|gMAxx^I8Y;XBb)Ggqq{^E$8**!uZVRA>|ntKfPPrzPx zskyea=2?&A=ymlT+->Y~hp0J5ynt>~DY$e~Cac&&sm;NeIBm0BGf81fNHWKevENyHwz<<$uDA6KX4#yT!Qn9= zO&d9Ea(B{`B+f42{FsNyfW0 zm0kYPJPlO?b(IDqwPeO1egFlWv9xXGqPDxs8>Yrbca}Q8tFK{V>z0C%F}XG4 zqt5on^)=M^y*;JTr5&yGb4wS0;i3~*kBHSRDuv|PI7TVXrAL-{xJbwxPEG7l7iEx# zf#r@35F)!c6TA_HD{X4m=l&w(An5~yL2M;?*z_y$pDrzmnVd;-Z0u)l*W9so8%M(= z`OWj{%FQXgL`5NiO^#l}-&g?E+{Y5U5r}}Nl4~cNV<~Z_;c--*N_q-H934HE93;gv zmuU{;Xhm2=dYwB*MZL7-Xs_J1OQ$BYbNHpi2Fr9XIX^;9S4lnI0 zHRU4F`CAZM+Xwp~)UD0d!GYUa8m*0|+7c-I-HqG~6UkoAVx{Rox$^R$v?mx%X|!JK zi_r2%gtq0B_OE`;(1k=ymwW1{Zi@_4o10suxZmJS=jltN88{dV3oPu01_DvfvF5&m zeGz{shD#-%uLUE6$^7tiSTI&TCw-1S0@e%=IS*#-Qyf`a6)dipLW)EUwF51eAc~L z=qC{IgBZuhOnYHo&^}bJx7R9ARMl5YYe44P;`qOz7#4SmyJaAmW@Q!t{ce~On=?vdDy_^M7J!( zF7DA1O!#%hi!aRkY2=<;q4Lh!6+1+FO3QDyY?P|KY?Ni?>&A+NvwV&v{**el$}UyC zWv#2)b?q*zYp0Ic%Fo+wXEmSVGB`o9U3n*O++(|)y!0XZLYr@1&mW9RT^p%kmd~en zz2h2!E>?9aU9DD`?`@G+t!(sscPG@fJ2&<5q*M!Zw!k)NgM~5~PK$_em#lt>*Qq4* z7>o!NlC>8;jL1(P6UC6P7t7(?DxKAQ@k;Xvl{zSxj11D&Ub95v@|UpvZU*?U1l96k zk>h4DNmy7n6c(0Ey-b+a8pK!jhUXvYK+YhXtXQy>-?$UMrl< z#O<}%(`$g%))nVm&ozhPOS^cXtSwR*Wx9IXNFJRR_hQl_*`;%~6t=?}$T-mht`q`< z&YdxhDh1qx4JtZM)79r;&*e@Cfd$;+9WI9dE?(*kYuuCofb4<`s{*x2~Z)quJ|0eQRSySL@qMh6g$vyvFU2Q#8J5 z?3P)ocr9AhdhvBL>Q~WoQe57nf_#SXwh>pY`|C;YVQqu0v|6p(WP#=8bUD!*GxF zaMXKHtJKp4=EA_)h)Ipe z4WM#4DQ*lVL?m3_c(owM#)#1TUeiVv`iE3G_?jRN*#8oI=z6N?y-n~N?QnAoMt zS(*uKU~}aS+k$Rs3v^rUdL3}Ev02e@uE19)23w4096TAxN$SL997A`b&7i?=%I#X_ zB^#A>lL(wj=gB?6_c}6A84qFBQ9$-M?wUbKdLv&%iOBa~caUs7N0I5kNRDrJ(1{00 zoNiv@rQZSPMhPQyLcxK1QT{&6%|!4`Co9FU_fD4Q3-e>RoBSn$ULmsdb}uN**5E@< zVRUmVlZk4?CnMvMQ*)(A2uVOFi+-f;{u&_M!NKO}R`y`6wS!^1v6i_}u$Nz=5?-^Bw`~J!cGrb(`E}#x?86#IzGO*J~NLV8U`A z1nE#bX~zkde$YX3t42!}R|-SF!2Lba9)~Lj5mxe@M^Y&^mOC5LvF`aV=(7Au3-Eo!>(o3Er~eiARnl#r`=@oO9@YYtZ0 zgr{9R1@St1)A(;3>7v|e^ltV1tXK4OJ9#^!H4GC*^tO{6LjKCuQZa{WHg%+ znA|xU32idN(#MFSOM!cGM>92|eq3MAu$8oqR@@c)4gV9_RjJ}gdWtU|o~qsRN&jcE z`)T&N_f4iZQ%$lFYUb>SE&8Y-w>gov@9K4E=tmCyyvby4>TWoB*y`Y8R za{x;+WDqO~{Zp6Lx7)GJ^pSTVf{B_7U-PPNvAd#3s|Gp)b}dpJbb^^;LZvI3CMIBY zd8>*Txbo}fm0w#6Ujg`P=Za4IcaN92YQ{D;TUT_9ov_eyxjX76tNglrLd!DdPGw+F z4&n#l=ldABHy|nZxANC^x+Mt5W2=lJBj>R(NP2MZh{ziB@7lrleB}~eg_*E zb~jj3*viZULM&*UrO_80b;5G$Muj(h?{to)hoXR=TD|vsDqBLxvgIyOJ<3NXodcY! z<;m(6f6%p{VWfQ4W5Wzm1dyEfpKu-XgEw<89?resGUqo97|e4`i)Jus;*?MeF8iqX z;&$_^gnZA#umsYel}?w_s@=|zE8TWFI3j|iTwIp;~KuQ2}qKr zlD8W1hP{ZD3|(5nNWVBCNEC6QP4Y%9SKM)k0)p`?%h?tO5>qAVCIlgJOP8GRcvd0C zwj|0T=EJDED3m5g;9c42zCV5R*;q^DD(b5s;aW-24ZPT5X_zBT{L(W7S=@Y;9-1C{ zFs*qRsU#<#1jD0uN(OB6DXt-BhJ6x^ci`t5%ZRJLoO{{bxqg-vRt}oUUGJlHcr_$! zj1G?R>Ss=#6etaTRZ zw6^hWGsSV2Em7U=7xp(x)#ta{I|E|UC2U&OvJoOp1x+X$!rLmWDpPGf*FYVgK z-X9;u+ud`0=v^%ZV$ z)4JK3CbigUzkhOkiIIVi9)wjLWqDk)PGo?tJHyx24|=b%KcChO?i?(WfF-MsT{Xt} zxULg5YE#9<<{LR1a*Y-fvuk-YvZDR(x3^zUe@D-1+gjSQ+HsUUt0)SUXR0Lm(l;Z* zOI>!(tf4s|_~(k6dHFtI-uC+gt9Nwo_R*4hViNZMsMLyXVfZyKx9foxlAOUAragp_ zd*2m#3^_gmVfr-?9Y-xD%z!*V0+3(N+Dumc-+qN%Ln4{JhfHLP!<|Lm5X#vmVl{&b9BZ zEFl4(I_osXl*2BKutCzrcp1a2wX2qjoqRh+uVdl4EY^bV&AYNJUqv`trhXRR?3^CpEZS`1^2qV z^hNhn9kr!1L>lkASs_d9Y}|MU1%&w%PKYv;PTyjRf}r9+ab+x}pDBx@Ts&)v!N;x! zcMn)yn<}k8>_#`Mn}tm0Qj7IbtDh3;FSv=1!Es8*&qRmqViQE#*6ti{@Va6iOL0Zj%(wfMX_GDccEfsFG*N8t9$`CUu0pr&F-s z+1h^ekefzy;eBHPTrR&^3s)D3lF?!*W^T#U^TjiUELKwTqQK*rSX4y#ey+jjMk%7= z$&R@WR6OSVUIdz*)g>cBAPin4vAy|%>eyVIxiEvWiLH>QSVQ8-o2({{ex)06YZy%S zo~>SN$aR~J4(7iFWERP8{H)X=fnG8{lFiUrqA5lw>W?3uni@nJ2yS;W7Zwhk!WgLo zJC|W0lf0F(!dZNaXwz*lB+QtDb56+Y@L0|bY^zUz#JT78qW6gBrRdv@wZ(&b8(Z5hVl&GfUKx>eTm6g+5!30S{9Yo1@8Ktagxq0|^ewU@eM;giZg>^T(hRl~m+ zyd!bVMK21`)JTopDPKNsWK2f$*bT(5{FBrJ4aas%zN(QACmwvze(~;`&2m zAm-@h!Z)*GCe?#{*{H{f*3t2F8CE zk%KbhwsVof%j>OOI7Q1Rq@{<&Vnf4vYO^be48PHq+HB$&3DYZoLdDoB^<1y9gn&T1 zgCDbF3U?|1fTing#KjASo46@rrH1*FpsnQsXw!fZ%geMZdHs0V`=a*4huZRNtojD* z!(-`HO(A!9I!+PPhMftwiYBAPVVw7l;<+xGBF;3O>;uI#Q3x;(VprC~$wMEyJB`+ica2+Nzj>l`k=8rUnaM#ag| zmBIlJags6h3M$;uezX&ZPQec7t{{9ni_?d4J4XkR`y6!6fj(g?&^j|9+;`MD`Y5K9CEyV zSsag}Q@!tfLkhatn``K$t#a zfm{Lysv|MadcqM8lMH^)W@w0`tqSeEcN4rK;@U_4nPXN{^z0<}nWs!CCuBbh9*Y;S`q5r82G@njeS^9`hE&6apg3J{dO?KIHZp z7C)8`ugwc6dmV9e%`0OU?rGXiFB3Jeq>2fvYEqR^%#A7GZroBN?+=wLQF_pCzrK(9 zqEsiMr{Yzw?%jjBmk(=SUObwAJ#QfNT#Zghi^j!S_c2*mR@2?spA}p38u8J6Rul)r zpKyN%y>?uKsLSAd9BnxP2RuG^$Z+2TM z8N9$1j2<6=BDjbMX7nZ(My{0o&YoFUHVzm*6#X^O8MB8J|Qc}4H8sP>%$ns$(^f-J61vs9)`&U>oOQ0?mkS+&wxB=salh~X;noFNN~ zYXg&u5jVg!5eWWqunow&(KDu1;$S^78flKXVqSF2YRR^_to#2zI~(08KnWxSCTH OP)#F(riP8p2V5Qqk?msu literal 0 HcmV?d00001 diff --git a/bfd/po/fr.gmo b/bfd/po/fr.gmo new file mode 100644 index 0000000000000000000000000000000000000000..2a73a5311444b2ea73a732e1351b7e6ada9207aa GIT binary patch literal 142671 zcmcGX1$aadSv;s1Q+opU8kk^Sxed_E`78J~IQ9X)ey-rSz?01`R}}krMDvtFi(PtcXz08`$6U7RH%Gh4Y!8(!9nm9xD#x*A`%%3C&LM_ z8Fq!&!5Q!Y@7|#%63ND#1INI9;2d~890>mdXTtuqkw`wQhqAxZn?HozF^{UVe9eZ_ zF)xRb+eJ|6J_x(P7oqa|Pw(EQ-sIN{s$2`VUQeF}%b-(VLwq|xG=2<2}fRQk2BGdvh7o)e+UcbRv80FJ=?D%>1)igUvrP~itb zovD3qK|gG&D%I2=Cb&Fxl4 zBE2zh1KYz1a0{3RCGW*>8@LZtJ)P{$7kl0V75-(Y_<#21E^93ONY6!3a@@HuyF+reH?`r8k7fYZGFd?^1#uov7F25@ihewOF?P;$N4^I>oQ zAymFU_2%E8!nfNy64@ALLd8D>Djy>~$9emSur2nv-hKw$9`jtd4XpI`2SBBN2vm9( zdGl?auRz8Bqvx+s>9^g-((eG}zByF=c87BB4;9}~Z_b5Eceb}Lg{rreo`-p!=6RXt z?NECAIFuf|3Z=L2dwv5Y_sG7+j-FdV)oU+r9t)MP9M~7m^7ge*`m`Eq{5Z?o-w&m4 zPr|L?+fdc9?g9vM+{`XPGze0~OCvQ0?^uDEVIiuk#JWi|7+nCcrjGC523<#yUJ>j`f{m(scEc_=# zg(JNVjzs903Ak_B_($zYq?$AoviR3crHVj}ga4BA3EF;857@I7=@V?u2=N zmDE{ z_!t}r+n#Ra&w|4-FNKQ#XwN60+H1!%j1%At%qyV$T@RJs*HHD{^GvI!Sy1&+0acE3 zpyGc9D!z=fEd3Es<|S|fJPJ;PfA{w7&bIhR!+zM8Lg~p7o_E0l%wNM@V9q&aJ{{I$ z{sc-dcRkn2e=JnKZh+FmPoc^&;yi2j4KN$?h2H!oRJppIZ+e~$mA?u&1zreuhVMb; zYs>}KKC9s*%*R9de;Uq%oh~$e-3_Y#FNVF~r%>r`w$Ac53--W#0F-{71AD?Jq2&2F z><@chWbI=n3^3P1mFpNd8a@wa!S)wheiuOH=L9$tJ`GiWTVG=7=0U~3FO;5K1JxgX z3}#RQb2{7x-U1cw8Mqz%3MzcZ%dNh~ z!Ks*QJ+FqdF@Nc~(-qcE4}wbPF4!Nw3nljsS6aQyg3~dd0adQIp!A{ZRW@&$303}b zsQNqs=D=s6O>JlSw8<``7HoCQ^$r=jX=qwB35OoqE*J_Y8& zuc7>nzQN?P2UPwpg^K?JsPc8b(Z;=run_Yi7{E*5RQL#70o&hX`EQ15x0gfJ!-sGO z*zsn|-vC&Ec?p~guYfb*zu|H?!I{y{^Mr9FYJT) zY&aR-2bE6b36sxcI2_}luphhyN)B&A)%R9UT7OdjrI$xQmH%Ei4Sof8hNGXd^bUoc zF<%U~gf~Ie_hV4`cpEDJ?Vh&u#=*{*cZc&}Ei8t2K>6GJ8RoKZ8XN%cg-hTka4^jK zhvjEaDEIT>0{9r50ed`aEQgZc6;S2)5K0evJZI%Cg@Z7k0khyka5(%HO8$MHw{ffj zN{-h+rT+z-4Yzy2>a85AKF;&zdp&=FL$M$KqOlUH9!`M@|Gc-~@g*zIJUA8meWCJo zHyj8*fzpp|FPmN!K;@?v=E5ss4g3;Lg-c&CJvkfB#QX-7Tryv^exnA?!h8#y3nQzC{<`Ha2Ipfw8A?v?L&?AU8|FS4Zh^TDc7q4PuJB|i|Chi?@MWla z*y>HQUjoNqUJF&;`{6kF8Qd23earfZ$*@1>Wl(y12wVcMgevEzZ(F}#2zSDK9-Itc zg(Km%?^rtdun_a#pz`w^90t3-YxB1psQh0CH-itsj`HWtZ^6wme-72Ie}zk7-}kJZ z4umTAU9dZR8n%HSz)tXExDEUcwuhbHH~-r}xetOv;5ev!ltaa{8Y-X1z%KA^H~~Hd zw}c%&F#DcxQ_RDl!jFe?&-aYNtuU{IJHVr%@^Lxr4R3_f^Os;B*!DxqPk*TPR18(V zW8wDjd?-D?3rb%;gNm=$M;6~;sPyJTKJxqp zsyto)Y4tJy4#Yg!o2#JYwx8z(Q2oopa6J4M909XFwSJ}qN`B|VUEwpZ1P=Pl>i0;f z_#cM7;8#%P+~RY~*El!}b3Ro0PKJ`#9Z>D+WvKjj{=)WW`atDxD3sh5KB*gNbND*!3_thozrc+#cmCG&zdPI%b5AIJ82~%L zDNyB@1C{?;*b$xx72ml~{;!5=Uk^d$;~l8{{u?SE?f+%v8VF_1h23B&l)sg5Yj`-6 zJkEnz@NVz^ndh%?OYArQ&e~HZRD4sQ>`S2ZuL%x==Rn2(l;_(}<^IO=M<_jwd~fyI z8xFy^GgNu@gX%}lfGYnBogNTx1pWXOU-8eThbKYl(G5^? zc^Rsn+x%kfrz0GMxgV6Ac82|6nKvH^C9ktQFN6ayU+&$XgX*t7fIGm={$uqx2)cUq z=2ED3ycbk{&ViEi15oYhD{t=ktC{nm;@cale5XPAzr(wK3{`Ji|7P;t2@c1+0!mJ2 zLHU0gD*j)f(jOejaQP~L(!YAB@*D)EFIPgv`#Mzmzk2uWGcsKG>2NUiRd5@45>z@@ z!2rJM?SFl$%(ish9o&|S=RZ#gk3`)9$Mzdp{Bxnq z%it7vG*rLxBviTHgj>O1;TEv_#u-k}2EaL(N5FA#AE@+hgwngGpvv{5XV*mi; zD*h?nTnJSk6;SQ)AgFXM^Y(Xoz5*5B_fT@_ys4!hc&_lg8P3K%qkV>J-*e#v%!hjO z{V)&nf8ba+twV;Jr|kt*jvKxCGq^M6ejQCdtD)NcrEn_z6iWYwbjon^wZaXOU! zy-;%f5=swxZk7?LhV!86;}%#Be}U4oXy*(!KRyOlV15Cr-T*RZlawFn!z&cE`LwRDGTdmHzcm{oYeh{Yl$y=6^7hybGc9;c%#QPKQeOI&c4o zw|~X+YpC+H-_p3fXO`y_C_UU6s@<&c_J=~Ha~f1SmqE4H`#j%-Om|L~G$+pSE`he64EH_vjY@wE<0&TC+2c#Jon?akN2cG%wsN5F@n^7Dh|)?1sr z#zOTUyTiWlK-dFb3>E)_Q2qWZ-u_*v{71Giz1$tDA3O{01|RYawzYP!H_XBQKB)Ol z+wC&kKEhnj3*k=K|Li$td#lfSDEoEZ{3ewAy6s@~Is00U}jH?rx{Mhd`PQ@_!~&`+E+mp1y^uw{3cx zd?!HF+rCigoCzg|M_?EDGnBq|>|^W)6<-d_g;6*iu7m1dKY{sh%f6-uQ7AoI2?KZt zTmvtLYR^Gth8sr*K=re`LfP-{c^KRn^RZCv_7tf6T@NMa51`~Urk|x>3$vP|wfK$T;Z zH|KdSh0^ml)I8-1D1Q$^<@ZG>`F-N~AE^56I@I*0KUBM&0X42QdEN?DZ@)mb-+sd~ z+B~M)a=Zbaoe_z=4OL(Jjkf;tJScs76iS|-K#d0(W2`(`Q06_M!krCOpZCCp@G0-! zcdXS@AyhrqLCOC}C_PvQ)orU!P#*7PF9X%U=ikL;Rx6-+vY)wp~`VNlzn7EMr08f38m*p zK(*I(P~q=`%76EXmd|le`jHP+-sLcWdqLIHnNa2V2UPuh2qnM1lT0q7pwgKJRZqKn z9_4u}l-xdms-I0K+qf9Oj+h5R$!QFf92P?LGj-nn5UBiLhoo&@_r2Eugz3TXGf^^GXZvo^Pv2dLFH>-D7l;j)xI8s zo!}c#`TD2lMmZKPfYOs}C_OBJYTrje#d8DH{P7d0etffB%l{B4^K>Y=ltHDx4^+NR zgleCcdH3g_`8!Rsdg}`{&)5k{4yE3HC3JcRHIA=?s@Hcszk=$QeuE0P*>sar zFR1#Q1XbSUQ1aXxY8*ex+g}frpC_Tx`5da9Y@BED^@Xbc@lgH9bSQZ?dL9B*zSE%e z?|!KM;w7m3beLiC+!1O%F$XIALMVAwLCJ5ex4#0a9`E*i8Oq-`Q1NXw)B5#6Q1*qM zP0-Cxz4{fvoazZfniYn`xw{`PJ+_kT&R4Oc>6t|{MSR3vl)(p=X&?& zJYR;&&l{c@vn}3CsCWl?^GrAzb3W8Kb|6&zhkN&9JWurYr@^+kpX2Q>fU4I^pwfHH z+kfHB-$Lo%)^p5#sOJKxa<25;8!G(+pyY6vw?7t2Z%^{>mqW#Ooi{%M)efKb_Mbw@ zz0F)>H_yJFV?1X-)x$2ZJ*!ISi7fSyhhtjhT;W)U_Jl{T`?3Y9JQ~N{d@s&{dy$>p%&p?&)O{n~T2_>f= zy?dAWmaiUA`r8+(-X}w~rzPIJ2C82<1uFi#VE~_mO6Lox^8Mo7+ZI@Uwt$MaKh*e< z1G8b=+g}ZppGTnb|0Yy^zlHMGuF&K#10J(&VSW&*9K9FW_`EwDj`;$p`hE_ozl!W) z?RylQfpHm}1J^-~^It-hd-P(fb#bWRDE?>V)KqUQ29Lqj)u3xo#B_T0Ol;UdHnI7Z^LQW4_lTISqtN^ z1V(nZ@-Bz!KaPgdgKOc@@CO)$hn8eSroxY*K7_s)j-@E=g=>=@06+y_gc z<{f=YO6a2L#-_OS5f@L0^3LFIp^6&aD0 za21q(e*smGnKf3g^I%`hdqTCC?zBwH#o`a#%y#p$p_n_oCyusGzjZprs^nA~AyFIO5c7`hF$#5$C9IAXn8!dbd zT!{H%SO|ZC)o@fsi+0(1YSjK~@AM5y*VwAu7w6;yuKLB;bSls-;eY4&U36wFUS zwV%$bOio2`GUkKf0{8$dg#{J&>6V!aF_dYi7DuL3I!(l&oGh71SfKD&=wQ{b4u0Emk zuIGN1pE{`a`FB_Ze}U>h3ir2gXF|#EYp8N(A7K8EhLY3$Q0cch(CTkEtis#`)$ZPa zs_(9UGda$JJut6<3U?|D;6rdH_#ssL3=Yb0=Y`8XUxHEW=NxRj63)il`4Fqu#Zdj( zA+QYI4P&tPq1Jv5hmzY{Q2E~BFq7|6sDAcfxD?(Cr58O8H**}S-8=)8zwe;Z9d?A( z_Zm0|^Q}wJ>imLtlpl4Y8Sz=mjAVI9_AOJ((QYk>3b#A z_q{l#pkc6~XNeA}Fq z!8;nxdO-E3ufqnIf3nrrT~P6Fd5Yz$2p)#{G{1PJzQPzXH{6 z+MjOu$$@Im^-yxX5vsm^fXdg%Gc4UBJ>P-Si}7b#`I_Je%y&Z7=NC}r%{GZ(7f z&WFnP9Z==}396oR&NdzfXJUR5E{EOEF*&b<%Fl~%D%|{BE62`I`g9;ve78X9->*<| zo^_t(Yb8{FekqiGyaJ`~1JAeiRsog&gJE}gGn8IE0acz&F0k@UhRR1dl>Is0`~n<| zxyyyd2~hH>go@`vsQ&OxsD318oy}uThU#Cwh3Y>BTx9*p-f$}B2cg>IMi*Q8@}TNx zEtH&|f$B%Lxy0P_q4f1csDA22sPU@TrB)BMQ2pEkQ1N!Z%<{VsIypkgLDkQQ z%PqgFpvv(AtbyaNu>RyCsQ$bCl{QY4Ld^@-!JhC(_#oW&D$C!SZ~*3BS6e;Jfl6mJ zlpfv<)epD5#^kpEN}rB~Iq(K3_wS&_h3VH?d5?$EgV&+PzdqMlKi34+54{REgBx9M z_1q2i!8{PE{PUp7e-Kpt-U~a!f5S4k@eS5b>;WbB7vV9m!;Pk2r$fo-F(^IHy2;90 z1Lgl37=!P@MR4}bHt#tPN-uwgYOix|v3k24s=mL63ZH$e<*yE^{;q(k-%p|RXWVVp zZygC$o|oY=*!gygzXnPUcS6bgBhRcmOkd-k*FeSpDO9}tgs9;!SG z?z8e-3s+!{+;8<=1J$qH1((9_pxWz#2dtf~g{s&4;8ySlxFziJpzS;Lg_8GJsQm2( zm9P7u#?P(~nf}dzs*kl$^N4%l4)9kfJ>C9c8y9k*`rA5K2hV{;aI?P~qfqsJ6VyCn zqeo1>^P%jIgevc=Q0;pBqsG1Aewgou+rUYWnVv3!n`4ea>G?|71s)7FPM-v;;cZa* z+2?VSLn-Wsc@1m>&x7g*FNEs1Z-edObFeFX19pO6Ldp9VDF36MF#mI)an}3VXrVpz7m4Q2EY!+T;_13f~MRhjmctJPzB!7ohU}3RHaGc(!}S%v-^c*bjip z=Mp#=?&Wzg+#d6@PNjqJYUiIq^@shRw{}_%)t;_^ z(&rDL+H>&>)=nRSBQS6NqP72AsB*-h^0^kOzrGf#J^jbqkA2DXdN-(cbT*XU-VT+I z$DriC@yk{Z+d!3X1e9C~pxo=A^#1_wemqn=xW>ER1=Wt8hN}N9Ua@k`flBvysCv8_ zD!z9-zlCZ)8@+1d@*t>ku7Eqkv!UelC6s;*dCmHprLX|=@lg8p4%`B6{<`UVAE$@`i=m0;-+#g=$9=q2y8sm0mrRT>b`?&WUhicoEzb zUJ2EnZ-Pqyeki%U4W*A?K+RLOe$)Dye5m-AKa>GyD`bQVF?OEXkIehE~0 zKlS_%RJpsnW84Z#zCGY5I14KLK2UPF8cu>wz%1C|U27-fq4YTh7r-OnV)#1T8IF0+ z=FNve>G@kw`mxRXW?l$YzGI;B`3O|I?DT=TPlM9aeZ2V|DEA-WR5DxHU6fA}txK6Lor_XkjNTm+ZGD!40r z2rh&@|84EH8P3N1l;<`-*mzJ1i?P29Y99P6%z=}CH1h#a=6m5`u+2|4?>`dmhWT^Y z1ZVwh^T)fO((Uw%wVzU`@Ml8l&l^zn)%`#Aem@T`!+bZ~5AN`*g*y{U{?EgDIO#W= z_g)1R{#PhH9?C3E^YG;9je}+fK%c7Q2LVD zrj2W7i{U1iPl2kRbD;d+4b=`_gw5~=xCN|hYv~*ar6-p`>HYms`S~77J_Fjdar5r| z;8e^H!v%1YjVyn=LFsD^lztrH?bku|FE@MlSD@1U-n0G2X5PVb7?j@SdPcqd0Z?){ z5h}impxVzPQ1$eiH;>z-P2@n#bx`^F3QE5>+q8}A=kq;}fYR58q59pQJvVCK#=Xbt z0;Tuc!On0r+!9Xn=Eblb=1Qn|YM}CUK2*97LiOM8K-K>a9oo2lJ|AjaI}WP9xdTcb zZ$q`CZ=vdE>yD-;M?>{m^P$X(q4e@pD0x2) zH7|~A)yDPDSy1s7LzU+csCs)6sy})ic7s1a$-C3m#-4C0=8;hCBMv3+lcB=h1B>Bn zQ0-~>Hl}ZdQ1yE_>;fNvD#vqBdhi2Oy>Gv*)yrHcxtt7lf^Wkp+-|!zZv5B>YMyr@ zRQb+>x4;*m^z-QLt$m*gb7T)yzO8pKIrW1YKSn~ezws~+7QtG0I+WgR(xZ)=w~vHV zG1o!q&o!_Veh)jsU3awd#-RGCLtuCKkmqYq{mR$g+`gxodqVXi<;x9aKN6~5=Rno-GS5A| z{UM&GLG=$;K()85-ln%ZLxsNxD!yBx>iZd}^uL0d$BgS^{cAIn{_hJ_|Cd44$8AvQ zKLXWGUWXIm7JaQ=3!wDlV5t7<5~z9Tn^5g#>rB(5NpKU)rBMCQ9#H8V412(n;7E8q zl%9S7CGU)W<{m)l<796xgKA#~LY4a=sCxMXs@y+A<-2o#V{fSX9t$Ohe5mwl;39Y~ zTmrv`Y6lAjv~lbDqv27QUxR1E%7IqSjRskJmW`A{lT3e@<;n`{TK_>u}sJYKKc3`fB{?Iu*N8 zZkkGDDt0~P&UG=*)jWU2^J}=h!MzD~|K{$*^WE@b!rcLNJ#C0EwQ|=SPo@l!JMq60 z{$_BW?c;xu=dE?)K7tT6@E3S8eq;FAllvj;8nJs6f4Z11MF#uu-{J3j?9TRXm%w$- zm;LF9S$&VLeuUGtCp?hw`@p{uURT@@S&7|+*u99k17Y9gS$#-9?!CRA^F4*m_+hwl zmvrSu?u#(b_jYnPlDoj?cQx_v!E;xrYYERx^IU(pg1B_mV?NVAAK*C}ySI5h2>(|R z_bukt{r!!vT>~uZvc@6eV;UkCQ?_b!fO_X@ImtYKY0d8;b%oI9uH)fhbWOJV1_5Oawj_x*c z0si`UJFFu2;pZ0YUxt<5{tTY~hTFOF;I9wiOZZ!WpF4TJhFfFHi}($%V^f|NlFt6z zuj9W*N_zEpuJZmg)_jGZEbcvsdmjD{$L@Bef!#*fF~yDC$MaC0{{@RM-;4W>DRJgt zpO3q)GM@M2K9c)w><)vM;`dYBYIxQ)hByv}qr))HmUF<6t}(I${>J+F*WmX}%o@+8 z;Pw(6f%$r#m*Tbq_w$%<#$J8-jXW#bBJSMOJYs$Y^XA?zk8rv)KJ_5XP}Mi^dC;oixI z@8InxV|Ok0!`v&p$F1;lAMTT|Th09r&kb-E?iX;Mn+8bmCo%{W7?Tx9@_VlQCz@4L=v+ehfUx$8#F~>Uo~eox$^U_&Y8P3pHL(BaTma zegwDAV2;mE9${|b`C#mxfU|LrU^fnPAMXd7v?~MqbG_SRxD4j`N&L^?)-{drx;BN2 zu`A@6ZH>srJl_WALWWCs1^9V{yNYyQ^mY|I--^HG_}CUVT_v6mm@(4Jo1eq)TEabx ze_dmE-h}5~*gu6iABLCaCHvyeR6erU`)3;`5~TPUMZE2}KgUlScnF;9-G>qWVV+lo z5yGK_zYS`xIu*AE@c*>W+p|1R!0s~q?8aS={fl=wuG6s7d`j01*f%JBu5<9GYj^C}ii{k`a|6%&VE+-%C-AK60JsKD zhu`3K4)HDLewq6q!fo&U$?sb}&bxTtNETdc4UyHjU5o!dgwr*_5IF;L3D2kFR)U}B z;o01}mJ;{p-v4r*zx4JO_%y%3t+Tfq=F?_c9C;V}0|>t>x8{m(;r}h~kL}V(V;BbR zj^Do%W;XW%Z@&@#S7E;yJdwLA_g=WY1BY`Th~ICyb?t(`@40X1F6GwMA3yKmza88L zf9EM3?xDEvi(LhFzjE)!^TFJ@-s64@_nR=^joTIYk8VNQTo!pCtt*2ggeyZZ=t z6l6&sd7XP0W?fO9b=?L}hnm-K*kyAadgJW^uny}$DkN7%c{u18KeW{O6?uTOk9Nf=)Zj0M9JRbq; zeH`O?J_Wmc;yuFqTa4Qv?iIxM8}1`{KHukWPwbBJVNb?x8RoX${15!@gWcZnX6~PH z>yNqFyKm>?_=I#0#$DF}{4DkMG6$G-Ey8_oZ$B2hJ+M2=hpEN>Fyfr({Z7a25}r5n z{-f|A?whg8!rxUq|H?gy=YteE*AqPN4@YCKYa7qY2(!?vB9GzcQ_L6Pb_CBi@O&@# zB=XUSc_sFj@cayR|KdIx^ZndgVpoRyGI$oe9J^<@E4c5#-;LPcLmD3|9iH#P?ogkm zFbF$c`{F;mCh&X{h8wu=@Rt4Y$CA=rXZkR=W9q>D8UAOIHd`!_Y9CJ)&mD1l8ozAO zxV^ALcwT_rmfRoW?;sx^#>BM+eqP7)9rw<}scU!q{R8fS+g2%I+GBo{`x@ff$=h!M zf5fiYo44gz*ET*bJs0EFpBBk;c! z{(d5zI^0i8N$+&rUc)>W_e>x53Ctg3KODO)yx+566!#;!t8fdi89vN?SXAPF9R5Cn zx$rRjP2u@M+_vSulzRa72XPO_Eg!dq++SmV0p@S8*Yzswh`ENi&&R!i=YL>#FV9=@ z+==JDxUDqrk$yb);CXA@*74j3ulI31iTPXqEbo_b7Z8uG$G!blJReV(+wfa~+a;K9 zc>BA}Pzqz-?eIx9qbKi=;`Pki%;^!XX+zq>pv75@Xt`*+B2>)X-ALwk8 ze=f)0IN}}Ut+c;$9_DV`y7nO4p~TVKjBX$JNuJ;J@yhyG?%w!oOI)M4|BiVn%!O=q zN7ixcIsxtiA17=Z?!G>bG1ztD`2*aa_kPd!=^qXs!R~u+{{rdERb*W6@O%#8zUBF0 z?lt%w4nM{I6z#yN9qHp{~_DH{quT=Cj~H%(@Qec_wxXF@NI2noIKU7P#$- zpAzl^@pFZDI+3tLc%JFQ?FEaln}Xd1_5pBc%9=PX5p^u3Bnihe7zYX8x#L4JpaeXJD#vR<9;{xOR;a@&f&Qje!zVz z&w2R07k^jzII)hb^UoDLzv7?I#a|Kr&x3ctFJNDvw+k`rDon}iwPqDL27gCz7hsO# zzNwGzN9?X5+%NDn?5=?y!)Z`gFYYVw{}Vg~e+S|=nY&qzTwie4VZO$vExYGskKLsy z`H=lT@beJ&3E1DoT}T@H;cqU_x5@)o7w$8#e~i1m&x7p$$@ANU{X70suYaZ(j!#MN zYwzz)!fe7l2e*syTS`2yVb*oL=UzN-hW{y;f581^cn3-`_3-3h-l zcH?m?^;2+zW84Bkbe&`yBHq zA8s|z`*7#tR_(*|f=jqd@zY4SD{+6zr^jRD2%bOm`H(r2=ab=c-fkrBb9i2cT@CC> zT+d<`MsYOp9*13w`*Qs3hQqEtEXK$ynD5sE*UQ)s#N383w{ZUh^R@5*_!{o_;I@$G zov3YcsJ(Jge~)7|HgB8_2pp+_B(Tbg1;Bw z*WB-OAC21pn2G(%Jikb|;l#H+cKdVdT8Fti_K$M!hTZG<)%6{$vd2gV+_uMjIDSv_ zb{Rasiv4W3if|9&{xs%exqD&W6Mx6y)&#%g?#lCQ{9KFM#+ZMC;dM0+|Mun?p(Wg$ z`(whnt9{<;hWf^)Ag8>%F&2*p#nIB5SkS(GWJ3;_!^hXG?ht7|KUy0L3hS%unqrM9 zp$ZzytLvgQ2^%6>lInGs_pr=-v=5^zt1pjbl}6*Sz}W;%^<}|;n)+zD@-r-2*3=xW z8E9_9!Z3}o8hmArE)VJ}D&nyw9#;oTGDp{}UKV7=Bkfn#Mze!p7FkrP!Ms>)X{<5J z7hzHO0z< zp_Y0)Rwl=wtR6wsHN^)KL*TBwy7Ivzg7})+()t>r&Kg%!j(zc(1`<;CTK85{9y-jZ zZj3i2!zUf`$xuye4iR4TK?S!C3K9cdon;M(TntsPaa~&mX-F;=OF|J}q8yll* zBz{WROwp%RMH{KCSYvg(sk$s43}2mzvUHffrY>4rT^1CXw6d|vTOBJ4a++6H*HlLv z*95a-(ehZMvu{Nov$BFvv0SZW)|BIQMsuABzdRN%YpiZ)s&5QjZBaeZrl6@R7Q~yP zD0kG9n>-FjIS4twKA`%_qfODkS75K8wb<(Fn}YI~bhCUY!3v42TGhQIvwWG4JD3#g ztzr%xxq8S380@RCjrEm{(OO?nNua1HTDBsHSML=ID#&?-FHL-C5aiU6vT0p*(0@?> zpf6NV*67+BCA2da)YXY>OhG>c@rfnKlYv#+X@mK3e7tFEgIs+&l+nRcUkD3zFK zwU&1uRb3FX{;SFLTh(>6EY&>~;wl>9{EkmcoK(u|V{w;A1qNDqJ<3BYUN?Rx#s72m zt4)r7BKxU6|Epvd`8K;CR)J9J%3^V8VQ5<(t3c?kqjT2Pjp}m4aY0Roem|I|Iy0T6 z4F&_8oCgN;o7J__4^XwMn;YVRHP9u#(GE);0esI-(hUt|rS;Tom23N?Y8__~G?Znl z28WNQt;%jtb6r)muDm8zJ}4-wEq7gw>=W(UJP&ahvz|!K6*bYyxQs*A_t{XM)grVd zRasMCO0ns#G#(5c#E77%YO3p2L@QC>y7Jg+i?T7+P!lbS)za%@9j{Bza?1!>7Aa{~ z+)8T<{il*@kk$p&<*S1cmXIIZFj+BG6<#n&za!K9V)`Awqtg6hYTa+DuU7mt);Bki z^OmB@96qu+P(d=|G)0Z5JP&Ac!(QenszM!Jb})J{hJo46=LV`bT2ozF=foRi2O|d! z(f~tT^m=Y?5UU%ANttwNh)fuJ)7@KfjF(kcBV1LQ3mn#PDYF)aA@33v*F{)b-BcTG z2(5wvbV+qhih7`_tcHh{3g!Zq)z>y?B0)zQ^Qny(X9Dp~jp>%s!NqQn{-8KUAb#(e@3uPLBqAdx2-rTFP_x@=)(R~T&sV~UGek6xXyCXMnTK~1!- zvYCcw1+0zkQQznvtLyC1WzUyfdhDa9Z>+6|#TYC|rn;Q*v#G3#N3KNXt83Mwee1&7 zT7e4@CficETj>U@!ywYIVp{Rj&{$s*}*O7_g*m>{NCvF|$7pGyRmN~)#iWGT&|RZlGf zhIvVgEwoI@Q)4X!D=SYlF;{0pf>`N_FzYntic&L-W?tD?QJ+YPg^t=;m}QJL%=1%> z)Oo^04;pPk@lph4(|##q4b53g6Dzx|RDzX=nUc4XYdqi>HkdG{uD#Hks3%G&Qd48J zF3v2&b&FxYBms=Hek0x8Nj;H|G&e0t)nrqI=QHSZu7!iGNou3MiNQ?HGmsc<^jLSOzyqQJQTd^^{$z&u9M?Sh|-%s11 zmp5+~f=>q3K&a(!SR$_y)^M%#LjrU;sWU!6$;xP&d>E|~0~FIltzk9M3FB3XwQ$hf zkEg22hQ=o9TH0+B5RGQh@s&Qyb~5VwzkE)riBsTQX;|F z(YcXeVqQ+}Y?`z+jOIEG2bFcz@mTrfNRV5YGc!*~MS^Js^V}c(Wv0!r$a1yGCzV=5 z(wb?S@AzcdAMuL`_DnSMmxt+jGa^CW;=BlU+QaY@?W7VUTJwzh=EkO~&_h^p$<{tI zH$M{0tZ9z14kXbylGnl|66DXOboqW#UZ|16=cFu_l9BlZ^9rU%g82mtC|JRw1(Bd| z_OwW_^P(K0U4YAiJUzrJ*{z_nVgrn>FBa5R*VI%i!4$W6bY+@D(JW%4GBjfO@~xl! zB6dS!wlI}eJK;FHaSvVQJ6zFT+f=8VU5X)V+sjR>Sz zie!;ljBIH!s-?x~mKI|Y7SYn`fMsP}{i-@eiE+}{(czO48Z|Q2lysY)bSOx93_Zl_ zYnqvPH`K@7x>j+NXSq_k$9RK--7;rzSs@t`3ZrxmgA z^CD{WO5}vTo*!)-RyqwcRdc>7lXL?7Tap{6Saq>gfme^Z`areIBt`z}>gyV+%j~Hs7&THWE8>tvJ-Z1$jQ0{&n_F`? z#F(hnxk%i;D?4}Er;f3S*z6t^N4&nGX%#Ilm{Dj(71)=BEi(c*YqujC531Cnqd^Iy zDqA0`<>Zwxm|c`(#<-K&dQq$#F+5;DB3NlkXJDe;*xaBLXBHLH3zjuB$D2$2!q+y< zWhV<86x@c&fJ`^+mB&h(D+53Owz6dhD@*;tE@k>|9{pTxgC5A6kANCTDZm6 z#OZ{Rer>r{*3{^xrwo*C>e*D1A_$u&lr~qRI6gK%{WKT9lJ~{2g^9T&hE7+|R2N@a znv}!`M(Cp}gW1ChvngM80(jXFjt8i!?cMo}HVwB)Z@y`0e&DLt4LFQE z?7Vw9cs+CrY1Fa9ZykGbEfgoSrdhK&iv>wl z$K7TG8*xluR+{9f)bi3wdq&h@b{e!)mo4Gt-y2?->@K73%RS5sf9=y;D%7Hg1T?B!JZ_BsBwU^1myZX=eBtLb`sqATGi z27CXpc7Suf4}SRK=M!X+LUGU)Ts=0q-BHhhxGOnB+7pPq{o zt#C$tBZC8l)cZcW-1OAHhx1lKu^U^0fEP5i4bGlPF~aAXZ@XLaq@C~%kv(M+>z#mTE?ywylF>LkOZ zc+Ey*SF&2Esb*9gTH5G3cADwHpuD<*J|k|cl_>9K*Ti`VBc~1|Vc|4Ia4%QfgeH8g z=7twM<+}b*ixFFUsQ+@SYSLUiFkp{?S#!DkDSHBAu(nSuX~u26KB}m$Y;Lr7T7Te` z_9`EGrHa_&!L$Xli!|1{MZgfUsC`mm(hOi#H6msNUs+w>91m=lC_OZjjx5EH^;ct1 z4JK+)FB8j}8+mWSdWKTg#44j@YfzQSl6i%!{9<)_A6lZ>W3-9YEN``}6v$fA)vom_ zw18Jj?oA8(H!hpL3Ij9-#b(En*L6+Jr9maz>kY0mk|_Lm%RY}@v(UNHqxgY9(bvUR zYXw8rie?p;6zw{%I48HHXx9AciuSB_Oq+EpvZyL5E3PG>ZE~(3m6K@@t(4X`1J%O=Oidx_QNsB>&jocgYl58V)9FuxqJ_BwGywR#u74oW6@mMQN#$k;%HI@Y>W5>@eA>$?adGt^z zUZnuq1R_#|fdcrdw?3*xW)_s>ESUFykA@MeG+arl>#Fu+6QWYV+N4p#fm&& zp+OJmLL_>K<%#hlQD5tOP|w+-e64wM!@>HUUs@KOsL^b;WO+dpR+{qFT$dOwT1(5i zLtCN*X=Bv@&H5*~*-eXpsxLJJH-6SLRj#ex%i;;uH*u82^+&-5TGt;povezw`YfM9 zEX${x<+kqG4R2(&dbO{d2%J(k;Xu}E$d!zq;VeXIsxPzYUzy%> zQ%|BFbYjkSp=Idk>D$*GGd5iLplFLJtGq)4B>G0xtI zcIUNyqQ+-qO_p!mS!^Ae_V`^=%Sod1Nz=|hquOkC_=OJ3BXW?UVg#3R*aXwf>Cy)E z30k;UORLwQx`A3RJ!GwR+FBW3^e!SZ_xDqaS0#FV&c8WbZY|mM#;(@mX5Vs{t%4Hk zC;wiZg4H%N2~z3&x{C=bv80r~Wo83TQ5NPGyS^n|My)sew33E_Svm$Y3;x?k(v#JU z2eBvDG>Ju$=Jx8i+-te2CCv}X$+`KVoffkWF54yX*CR;{ zt;r~}6_N_qWeiNxf43H4Nux8Q|EE&8#>2L}gkHwnh!Nrsvg|{okNlY|oBTSZ#mXbS zn$t!2M^UAZ6zMUgwd3??!<=j=xOQHKq^$3x3hTG*|65zj4tmAe9I9-v7L$;U&yz~7 zImS@xklnUsjUt)>0ly&14yM}_W{>7t6tpzfv?>;>)4K@07l_#+NA1%ubS9*BjW%^n zbdGK~3%g6-Eo$DcM8oBngrLbb+Y6{$qN$VzrE7xeMFp+;j@R|qfoQj5;61Rn>lYby z>|QY4U|HpkhPx%J5={C?II*#*(@B}-16?d`y=|*-B5=EAG-bL5mJ)8arKw6w0(ZE( zCb`DV4u)1D58kqbFYLlCl(D1d25u6UNMdMx1B)>0zN3`3vYE!8IKEC-%?6&GLU1{v znqqpVR$>R-!vP_Tz;EUty--qa&6pijuqnzG?gDmSN(zf+<)n0<;1kGD6hy)9J(!-#36;fPzBZ}wxiN&@KRJF8HGL;@h=?ygm0Vn zZ_uNA<ZLPD+MWbB(*epS_EM6ekLHw9rXldxo4yNVg=Z_d;J`*1wxV9b+ zOlhx8lVQgG#V}EIzfSGk27$W!{DKjQSW@;4!v$aXDFjuMnAK`Dv^==@C?H)i?=|(( zGn^2RhwAHn}#Oh z)41oidorT|dd-|Tec;FX#0#*L zFP2githMQpi(8Ymus_dE`Pw2GHf|L&K1)&@G1eUe@>?5|Lp}WqvFH?0Yr$QDN##(r zBziz(lsu1N&5d2Jf(6AvP7$wyv^}GjQyL{`#jG;QV$m8-(u6N>5}sX=XQynY>D#_P z(YV7maY?DT7pdzv*m=*|{;tAfUQ&ig6*eje^W zT#2Jt9GVY%E?0?J^Iaj_rgh?IP>`8fxn$(1vE!DpaIRy9=hqf;OdMp<9s=sg^hMf;j4znbPlmS(uKUd(dv>~=kv znIvA@s1gP+0}E$G{_U1FUBkmdeDkLMEg42#eBhc8+r@eLGlBtm^VAL6G_EK&3whF4 zQp--T)@|wouac6ov8y==R5HCNx40xXrzp?$kEv5h?LFF3LRy4=u;}qyxJXLUMNW)h zyrr>sD9M+7*?|JPgTwBmS9mg0jgeA@z3_6)csJA=F?Cb>bp-X8o~;T zOQ!ESKW856;&968r-X7Hnix#2lSstn=SQxCWiX`f$yJJk+|cO~Sk=gxkAw=c&t;M= zuCHfLt1hu0uEPj?eKmPfLiP*YewAC}=yP5dc|6Ecr0hj7I8p*mZfPA!^1Lw&-z{cy zZouvONwBR4wJe9P=+yVSk}V8B%JL1&DdPk_4e_q-K%cVB%QMc5x#NER4K20c-;suW z(?UD{mns!IEx{)o(!tO@tPtl&nW95kRdGC~UY`e2fe3~p8Wuw1wQoH`ll>2)gYtw& z>!TK?oQe%g;*JO@iIn1`#1?*vw?Pm8b@NPQMzdd?M%5=O>{IZ1k_z`-XZkWXJJ=rR3h!&z{FQ-;$zf^LgDjuVj8fafuH8PM1c6{=6s>5!pUuZvJ9CCEsb7 z8Z%4RCSr1@U8^@6s1xBeGk2}cZ-Ke_0%wNY%hXt-DPeUJ@7LX@f3Cg~fqkP_r_9?k zb#k<=aETF~O^_(ui}J7tO3uZzc;2*<;%URvm${5Lp%CL`b)4D>_0HvTy`|@j>Dv0z zd;SfrJX;T!vShU=tg2kT{xHPvCZ)YC`anM0ac2P7AD~xd8;9f2HJoov)_F25>Q`$b z#O-nu?lNfs@uiIyO!iFNEI=g`6&X{ z_bBLZnxqv@-}DS)tD%NTQiUD4uBfU`#%md6{-k-CpJ1k_X=3K8xXf>2k)-c<>~qwB zZqY4W2f7C1r!meZRp-}_%!aE_p3O8+E+i+oqf;x3(nK1ip3Z+#$UI$yV|;V(x;XnS}|bgzPP1 zr)yFfG$h)*I&Evi&yKA(iSnHQ6KFP3)^LEN)>PhB^9)M7(8kT>xj#e-;_Phkwv z&<1qkKo-CDAiZ?o5;ifvWIwbrX46d{3m<@t7{Pun8@qfEm=ZQMDc`vCqKiqb)HIqr zNJ3(MkHklr+-gh-=O=oan!6*o*0X0e*tk&n-&CqQlc-TKS-Ytf=nBABJ{;mp+vQ5h zN!lQk=09!7p&ndzH6b@&sizZD=Yd0m0_z^AM=jWfa#B|n;Eg`8KgQtGaBY?5?5O&u zw(A?bSAP)8NmlyM`d}39&g*30%moDt3*BI_#>Zj%U+VDOsX}#ECjC%aS|qw*ibKk# z9ASj(S72J4{>YIZeVO}dvBJScH*vG|kt>!9q*oqvTlFl$*py!tU1L?Re5n%2#Gly= z484yU>9#-I3et7r{!qOMA6dK-cFoN1(de{8x_w$oDLauV8ME;++@f4Re|k;c6s>E@;ssPnFgsb%!YM5| z^PD!k`|Ts`7IWAW1<0!9-B@GOKsP$tw?M8Qy|hA)e-y9xZeOPnYlVw7%gpOVp7t%< zA4NTDTG5D+R)s!)X(gI9ZG^pN32Q!m`jH~AI~j>HZ6|E@&3?KY2h*L zJxbV`)sHye?54S2FR`h7{`6#1#KkQqw4)LROLPl10iZdCL#peTHngQ;i$bQLwsq=` zq^CB2pYt@SI$2cL)>=1Y>4k~47{3#RQ3UQ(T3XK>{x*$L{Jk{*uiRM- zgeT`d#^l_wq3pkyV*Ej%(gBhC;Ms$nL;6-9?yKxDu(cK`fhlIG=8Hy`@XqiG#!d`&Z+tb}y}MLhN2{|8AcCY5~_j$fsIK z%6+{SldSCjl{o)Gb^Phv`nBkvsNq(M%0xx#k=#shjXulM;#(T7;WKL4K$wV-6w z_^~Ct(kPfQBhekvSi+tBaHHt2R%pxew3^QUsS?*uVKF5cJK7h91$o$3|34ImzM72> z9ggFeWMT+PKNJ#k0e8GpR0MAHg>d6FLmL=(f#Ig9}jC()`BMOt&Mx%W~ux)i&_@X`s59PGexP95cLh_^lEozn)iK6MvPpB zvbr)Sds=P#C~Ft5bk zE0^%?(1N_8q7uH1%g+l2j2JmEnSdA8*#A}Ze?4|yHRwcnrGD$g9f#AHsj+LlO2cRI ztcCM(|D@lvO`KLD)WI!%P?9)Q5%w6q8&B#>_!|@S8+bSWbgOJo@e!Q1^uqq%dg)dJ zx|IGz(D3wYVuX^``!+1`c&UWmaB;#?n{X%nd|te_#1Vy@;`#QZiFy$~UXKB{oW8g{NJ<7qfQ z@Et9`)0-Sr>8ot>B;7Wrcs5;_JHNzUOzMQp-b#dTckP#LQ}$<+cU!+L$>bM6)USnp zQ*xBrD{t62E!|K{+-u@tDc|a(cD3p8`d6@eH=2@m^7uojff~DgPLtEgln@qc^&fi) z^VnJ}oLtKggF_JM{noLapi3!gi^>nT;#&*l+HDK}DKXjS-Sh{%piMc#laQFE=4wQG zq3^cUY?n|vp0G+6R2YKeO73&Jmci2P)5FHYGp;u5vN!ME-{^OoqI@>b*o^|Z88JVs z6p!nWmMYqxZg2;+{Atz}@%lA}g6cG!Ye)a$*jYY9?o6a*<|PRjh19oVQPm07dM2xxqssbX6{23zHui@^adK z_&qTWw;m+rDD(P3X0ynv;TO{RUXf&6UifiFy-rWfOS-RMKw@-vzk%z7?B7*n`q1w8 z8ML4ZU+Vb6BwysG$C;XPBCK>yZzufWg#SYn%$bruO0S=g@uvy?L?-@P(6sfCUJs>C zNLr>gE#-5_)UmQY&^P|*N8$%3_;$+urU<=g*d?M8GcpUaStqL@u5ke+`^=q>X|C@Gic8HVtu@7yP&S;v5rf}@>Em= zVe_PfYNiU5Q)A{QTH{{faTr-gDZ_V#?&X3Fmv%f;n=AY{tozWwy$#cmIFd-b__MEN zCy?7R_rHISS(Ts|FxG6brQOQftk|;_58aI{V)J&=(M4m9cZJa z)tE~8CWddHDKU$9A5Y>(0|-TLX4@G0eOLX8a zIi(v7rWcnK=PfQ~wx#%6Y&9!Ci!;&UR9XL7K#7A(NB*#{kyw7?-0|JiU=S zjAco-9+FbIH|qYd+g}LgCmWUwM>nGzN(Ry9IBf;x^-fuR|KR_lf_|*X_g5|sE&q}Y z*)4(6<^oJvq_^R!3K?&BFDf$^d8d4)sQ2Ku<)q(!aLVA^!_yT~TD&KWPUo~#aeIF) zL@!&3AtfhL6?z1(e1VoeaqYCE)pusOn+k=ms9R1a2tv!`b}Eu`qTUXN=}U$RF6Rxa zm3mLlZv-oZ21FlSa#_e1pY!;wmi}%?*2W{-L{aq-Hq+KtQhJB&)@H<(r=L^LPM(uU zMyYAza;j;952-3aLTu17>N}-p5UQyr2`3PJ-R}luBAv-Gd)Fsug_h`f3X9!urPNt} zXCI~&my8(eN~JNt{hEvRDEZD>KO)4h8d=YxIR@tg*pT3pB2K2yL)Zu>1nPut60Wa&@*`2h#m7w)WLO zq452O&PFg_BRzBE->BHn&$h^?{3{$gj>P?^KLx<={CYM%bcC8ib^d6SIwAjJL+_UO z%_nkES7`-o&41Y5+#)7a2fb@eQ30wsZ96^j?E|rE-uegLUAg|iPis*oMtIjWa}&|D zux~Bs?_~b3MAITA3tHg6LH8&3nZqP@f|jd4^9y7BXicKq;e&wWnc>7XE@J)NecZ5a zYy+1HUp!4Om(pHn+S_9FO}v~bZ!XioWZrBS*yXvTgi{!a)oYnLH)7G@diOh0iDe{7 z_}`u?jjj2A#l1^&Tt|}cnOosgWLr0epd^4#snt}my6{Ml7~xe&kfK_bmX!b!WR~!1 zB$6U^?e6bg&leb*Rjb=cOc12%_N7$`K%97ohriuJnS^m5 z5CS+I;EGl0?iYYod~Z~{@{A>bt??AEO2=Y3pJKTy}? zrb=sflTmfn`ML|+dhTuY&)LaVrb|cYRHqg7F4Q!Wf)Gg*_72tgMMh>|wF>yO66#^O(E~DDKz}zB7}gCDnI3 zE*{(j+!~WuB@sA1HTxHAzz_c-WO;Ia(G%V@ENNV$NsS^CV!$G2A{DO&_*a>QRpnBE z3{3b@2e4@e-b0$NA80jLW~dnTar<6dnFs7wF1>JpdimEe?gt<2;2rJnerX-(*P=Z- z;7dg>*?!NQz%MpFL+Y3N-jRN-cSH`@-`)=#)y=y3T4AR)pNF$1G<#*ComS4ABRYvQ zwIk8(mTmgWwjLb<#r~onv*uLC&M8|aP{gqd)rRLL_u^o{nOWrV^?fDWZan#y)={W9 zgv;$l()XVrV6*zkRx?-Y8UiqY`G@;onQ>MVb1`C87eq-Lpo+iL?kKONw#rgNTiPC^ z`@0tS>ziMPgxMRPu8xtRKIwlzl&0>hgo-3eRTrVO)X;&cEB-Wp)YyQ!+@lMUH-ha? zNCPH@3+xIon4C!&Aq`*R3k1|8MJ6Oz9RQT3y7TZ|%J3N7wrlboxOVD{5WE7B#k}tN zu~2_BCf9|}#O{{1t+2f1vaHFll0fi=+%iw-7LA-8!6R;hFG!nHBJaej=|1G|K9vT) zmcJIL|Jv5mc(rI->1g7q6CqVdy4|G|By5YE<=vof)v?r&c*?g+)rcWn<5_QpRT~c!?ghK+J+;bi*1V zE-psk>GC!dJ8l+6D)HdaM75ul&Z$yf4aKOFMV!Kk3H;h;KQ^q-P zL1i?`r`i6rlzKmDgFd;x*l{=kn3o{WjSCRVD{9zoW!)dJR%~hl<7lNF$dTS9zciyc zu&ZPHP!rQ*+zf~0fs|Q6%q2(}ga-8KqS*Wz3x@0POw|)D>I+w1wW7nSzjP53k}~U@ zT*6Wt zICH(*be^2MLcR2+e>oJsbYB?je0pzcdr7VV-Q>JpXA8uiFgInF(!&b;uXq}>_DA~& zYVB?eypupJ^P>2?`c28|^{++j9xp7jGQB$>GlD|C2`DGJ(HU3k3PH&EJ5=h_F`O zcKD=v{s_yw>D!9QCHw67L|PudIx63YoukmiT8}JY0Ig?98-ULB!F}-}IjVgWWjMJ_ z7Lv)kESzdoT5bLAS(!q>V(x7{sBC}V`dysO?^}Oh3)ox7XxYctp)(d^>5N!?c)i-i zWzeyu3_BSf2(5q?l)s^s>ehvRoJK@R0dOf!mbrbnMW`9_7zp{Qz4_q&-W_EudZAMN zlFa5sWvmH-cPkbk#B_E<&W<7bhtf+4J@B(5t$;&ayS1{u)&_g)l_cKGmOq1@tOiS= z(~WOUnUK`1RAus#P$Sx1y#7a3XL>ZI5hAEvDt<#tuveu$Su;Jd5>ouQWQ%;+ve)2~ z?`!_<#dqI)I#d-oz?HQp6s<-mIREF*afcN>h81r zhyBu8-QVmjKYOyrs|x+G`>4cTYn!BQADS`#1XBE^aL;HW4E)fPGlHp zb`TZzzgyd+g1s~DeRvK%9Z2eA-$qa;g2ePCJvf`+WnbHP4uha<6xr)LWhl({z1CWH zzt{V&x6*mi>+Wyu_jrA+W6Wa7B}b*s_S%Ol;jr1+?`>{uKileUY_IOk>g-c$^}fHZ zx82q2zxFmi@cr7}wL7e7vI~0#s)E3^iD#jJMlURBwiU|TBiy&k4y5NWM-Q%)+*$M{ z?po#kkxT2hE?uKFJ)Ao9Jhnxza1O`Gh^3p>KRAG~30;dJ+tylHXSK>)#(+TvmKt@k z!p>spYh4O`*J~%^5pu%t6dx6ni3PnRl!8?$(Dsam(DW*u(mF2$I=YxL`JLlqT@Un2 zyr%NXjNicv(MQ%bXOJd%sKW5rZO8W}~_r|H1Q?1;cv1H9saM!ra&7 zZ@>zZK0G4*RSODQ&Q5Kn_IzYVli2ggu1$;S{f_c1Q8Ya;tdA#m<)+r?A8+?p(kz!! zc;ZwS81TKg4wa#`?)P8<1JY+z*_oNf_7ifGo)l zY05z=*)!JKLD3oU%t(V)$Zsn~b}jp;6oeoD+KY80wQ{Ad#YiMSFO6nP*Kp~LrO5Z{ zl;}eI=}SIZ3W9vqpiu+kTo-^f;_T2_=?(7o&oauIJK5Fk+-lukRpPBEp08l7-qqgo z<<|Q0#wH1Wp!asQvJmogBP9=fzq7~MHg<}Y>etqWJ&kK( zkrC=gZNCw`Y|I6yeFa*K%jeEado(>)M->4}Lwb6DpzvbjQ$Z5z(;;l{YvWh zJZjLc|BZ9evxg>k&gjY7*qvAoe7J8cX}%$>yLn~g&2O4T59@f@+DOKVnwx{fvs2tR z3>A#!s$e;Z$I2ranJF&^*0-XqyuT*pmt>sSofZcd`Ijf2lzYcoBQR=~>y=G#IpNTh)DmrjLAt6X_@b?C@#1;aD8VrQ2Jeb#sx93l<`+n?L~ zN#<|)6bo;p;_g#wVWE6|I?x+Dqu0aZtN4aXe0xFa2oIQyQgPx7N5eN<-6-jRFLKv7 z0Auc#2z`DT-#50qG=U|O{Aai}eJC4pH<}GObMS}13iK}8Y#8KF^2}N(j96bN*cJ%xtw!zQ z1c>aTl)}-YUWHmvGH}!@x$v3x7bUHmL-Xz)n7uoaijWe|!DaFIaxiHB9S3#^gTOhN z>}UiPNZ#=8U0>K!|1?l7NwjYBl zZc}}wQQb5+Q!3x1G6>e=qD(PuGka28^3=jj1U}c=>#eMBZ1$CA=tfV_+xwP>UfQpV|1SD~pF? z-nJ#Tlm=ig9yQi4yvlbtsQ5W4HbijYHt=Fl`zT*w*?*3|T zW#?&{x!h3zmZLUh(#3^YNyOTE^vWb-WhKqJK8xA}sNN+q)pw<;-`$(hHn<_Wv7Iml2Z4+*^*dkO>KS^p*>e)2< zF8zsDtTwW&#Yu`?ByjIiEUuQcy)t=DP!UqFLprCOl^QhWT-2XBZ`kOGJrQd?y?-h< z`j5I(`)*X7QfH^PoOdL9EBYf0wg)@C{8?^DsjLQKUOgc9cKh?I^P}_6wShD)!7J)D zW>KqOf)L&k33~FK-YK`LdExD2Z__TIKtHaMTul5PCd{yd%?c6A;ee!LZnKp6CHe7c z?$klPYE*)jTo4A;tXmD5NAnGU45mH+P{XJdE~|svPOqpO3Qee;ZCC8OBNweLBNrdW z3_=FhSua*Q#JnfA5w!VX3pwIRO=D#w!Pxuh-!sQ-pP$hF*%|WY&EcC z2xYYO_?#Y}8(R+np4wseNoTvF6YW;l?aIk)nrN=d$B5RvXO(Pz6q(7*-IAl7OnhDG z?oDSP_MoJ1PF$tK9A#@*S1BM_Zqe@rBk5i2loSB;3yh$lZgq|F{x*ROSz*|3KKM>bcgl?jDTH z>UXVYMeZP&49r$TRt5hQO0Ep@I_|i1#&jBFrVX^L3q{no&|~-MS3Mr7BUd;Yv(lR( z1!hGe6Q+=Ts8g(~yXf*I>a=&d>v!(K2Z7m))lCDts|!k)s;XTsKOxxAXYqbS=Sg=h z`K{oWl*_TJqg{(`a;fzJ{7w|W0~DpPAHXk%rpF`vV`cYflU>DPg(8q24e>4cn%$z~ zqL$->$s(VZ8c;ubkG7XM-Gc%WThGjpbTAqb(gPe4nJ0X)(!y#(eiyPDrGKsG;f>@@ zXtEWWQ4g0a7NOTaa8r}`WFAd;Rhx^o7KQ`HJC9P5BPn)@$*zPPyd$%fSr=vrnP>|i zCGBDVYyf6FdG`@rna;%wUonl3?aGxl(-w52p5$|MVPWSvzS-AV&Z+giColPuR~@Z9 zL95|pGdZR^(9DTFm)e@$F=M1SdkzUzDI{8%EATp(-49t33#Dq-nxZw&#xz30(`$6a z4H9AV+{<6O&5$8aFsH}lZ2~c_WV>qy7Fnn@Gmp{5Q+KmkgjDsf2!dL1PtwKH;l&7N ztNS3ohlD9a>cLJF*(#dS2VUmpBC!X%(MhXNE&tWeB%jSR@tmnPxg4Z#S@+7S;&jKNc0e_+zW2%h znU%9Y&W~S0PVimy-!{*G9+2fg?m7gE_^*5;f70VB#XR1*RuVqJz_ChxetoXkP8oDL zV^sB5FI)dbxheA8m$~$_9;ni{9#=r)=ioi zo8i?%N70I(CPPWec7SXV)skHz`gcuCFg>HZq7ras7XWzAgT7&o)Z35TkVo@(AD+B@ zDQ6}<_vd07fMJZBwn}Xj)tg+GKGX+;jKWLf;yhf$4^DnMkav9yoFqlQc|ylyQO~-tE&ph)Gt<6_sZ_K;maZ!H-Zakg*&=y9`u5l? zb(kC3Exf*-jojIKs+;6*`#tIIgVx}b5G$gyaHiX{m(n)2*EaS#tEz-psl&OJWbzk#PoD)aHH6tAmT1*B*RC-B)E@oHQV$ zZj2e4KUpQ^n{wI0p~MzKDq0IO>P5 z9_SA{s`cW;26GqCtzb(YayC6q=tap7Wuc~7bF127`Ah>QJ}Xq@j#Y}@vt)`S(BA5E z^M{8&v1!@FkG#?pPpi4HV~OQ7tZObcyudAv9pR`}(bZw%Drl6_B|w$j&qTa+HBx9< zSUn@;I-;KO1k3EMr`2W;XZAiZl^I=YyO(!YyNe1^FLs0p=9Lw7KBkvywI+_mDA)8L zexS4aPY>?lvwh7}UUYS@iheE>twW%dBv&J*_8Va3cJcaAM`gych;hjuiV@6}uj_ZB za&4ZCo*R=W`pu|2T>LIE@mD;(CA$SgkmGTDdxPGjg1350)NBCt&05+KtnV&ge+Nuc zQVnN~ZgzX7wIrA5#}B7Q=`gaf+_ekoQWqOyGn6jlXIa_TcWVb?AEkAOkIi<&@3*#I z$PGOFCz5IY`q7FGCr2x$QjJy@{S{edf=eV!RjPkHPG?mwtICZ)@+VCW@5~?0YQnlD zKJNWfSz*Ur2PICU_BcAfTns^4&q8qtlsnOoZA#2wW+<6oTCB*&KO#w5(BffK?l+WD<5_;HBS@azq-Fcz|r`x{{WpxvgdQ zRZ4fuP}P1jyu4C^&R<*&pC5IOabSPq4s_j!7RnbcrM9mleN6C@oSo;qu8`f7Dyh5U z3*r`>h-9Zl^fFgJORquirlHS+o!AzToj3;$Knev_Mplp9W*c-J1a-nUy#^-iodX-D?^udu3b^!j80e%JHG_YBSSvZB^v6ggq>iZ^a< zs*zetb7GSFa?5idn^w0=lYEmO(pqF6JS__-E$?owe|dQaoX0=HQ%enPE>+R77DY?@(E2;8I4B- z!kg{7>c}lpAPP?s>heN3IZyPE;C=c$XJp7|R2Gh_5>RpY zv&G~?cR^LR+!mjb1u%UIT!`Fex=lmjZ+T~Ecya$H*WM~mXS|7bA!}^G{K_}Sn31s{v z>Qj44f(zD88X`AYqSd5GnPdGSCrZ7@^1_6|s4R-AQ6#b54EXAehD?pi)IUi-ORRr= zI)QS$ti0k1SqNw{^0)8?L`gQMpWN-a7S3WQwObOY1VJHx8s69S6GG9qBv)4OC^4G6 z+CtaqV-OWEp_*vOl*e6N0d8;5QXqfl$k%B#QX2TM$IBzgr{H!`M@ihWKOA3N#gnfL zm&06?our}~-igZKZZ4HEPgT+V>a9w$F%h}=7?q@z42~Wv>Zev=aQ24a+RL^I(Wcl} zR5r#3!QLcC6Q;A)-4XpB;oFPT1lL#~ic*m65$6=}1QeSQUNG7!FDP@nQ7Pco#-%i%#?51>TrK)^x^8Ue3sF4DJ zWoJ}A#=CZb^w3+HmbTO%oOerj}I-)*GMKU|CZS^P3a}7UuP@AcnTd?)~ z-?Ue<@#Ws7Lzu_|Kci;Av;d$uZH?`Iwe@EBrXaI9on+c9s`x(2jNZiH%n0Gdpe!e+ zx*SO3B`}ipKo>E@K~(>z_;Jwn)tTL8eln8lwDZP~20SWqQCHCb!adXi=&~y9qRIr0 zJuwVF%PVlMRhIP*CW}tI=oD6JvF1LIF7MY5zgzhh;|Eq0chrb#vgn@-r7R}^3K7Na zN{df!w?^luJrU0Hj5A)eT%Tz%3KN<>T)ko* zH8pfdyUD<0y|e83L8*Qf>&PC-WY0>r?tzp{a8N%oU2|roc*zZ;&SPf~vbRN2Y4WYu0H8Dvs z%c^xnzhGT*7py1ELX@glPgUPNLOAVEfEt~uH5;|0P)kF@^1#)YSBlR<7l+TJApe)(!{cV~Zb6+$ZywM8%)lE?kK_wFvKTvq%lE$?z5f-{7$!21H@ctS9iRGd zf57jBFzhZJv^~GI73cCFx6e;= zgFE~|9;#IF(ndoY}{S=MfogJ8B5?W|l_HT1IIGbzD zeWrP@ZEiZRJU6#KgyutxSia3ulWUB)%cHe^!4UpUS$F~5UA_NRjZU~ZVeIv!c4%u* zsOaAs+DN+o;$HB0a+X;9M^usRwnGzl@4C7tN9pS>`BF4VM|A3^`qni@({t2e_AkEp zAk`S6h~G}ks@BA<%ip$Br|ZMBFYeW9Ak~}${L|KEb4p=TI?(<&Ndt5N2RpZFPu1zd zj;@CCsg$@!wxPLhY@uUKz91~jbNylm5K?T*_@~eI{4#GB$rKF8^mP0qKHXY<`SO{-> z za-T^_TgSraqm8Kr!b}Tw;}$WYfsU8ap=27_;7VOq6a8S1Q{-vMHouVwJ_E(hiJIOQPGdk91%*9L(M4B)0d2zkQr_>7l#Mu z=T}TcL_+^ceU|<<{n)tuIZST*m4g(~y!sNzC<&4zCPa)$E?TN^+!uZh_pOQA7e|YY zGV7Lwg&z`IVQ!}Mcjt0mJv52jG} zD=0)B*F%&=dKffl3V%s&^bMzCj%|&~_iL5;>$=JhYL)q`S=lB~R+_9LveL#Q4-@pD zP1Uq>sJ6y!EoFW*@6r^%FGxb5(gW6$4(;I={E3ZIb!VQrE2GTt4FCN3=OU!k7b7oC z8KKp;+Zvrj(Y^-IV*T^P$F?P(!{6(0IHap$>iz*v-iU2lvJH3$g%U|Y4Q&2_v0)2l z)v;Tsac(VqMYT#Ojlqx4}gRD0?0L7 zw7Gb9Iehh6ggKo7&)uI$mn!MnG$(9(?QY;`K=M7Yez_k6BI(39GVfQ%3);r2Bwnwa zja_X2CVXF8A&kQtaX7{w-a_TZQWyeuf#p?0rip5h$D;46tcd34Jx zl4*w4%Jyws&LS<=aY_xLxYL1d#x<4Hqx9KGdjxDF@qz#G5O(+S7&S%=j}pd$q^dtp zq)e>-g!t#bpk9`+q}VhiWkB{}-(8+^nDr|cGgj1{a9oz?in&J>K2fW_t)QYB{3mR{ zP^d9X@qjoXnZ;M8RIVJTpM%vtC?BH`xe~4#g|TS!dXZRR zka62S%|n6{$)*291f19^7)A6l_b3YN5jlPg0WE2UUZ|u8ux*J`h$g)^{o1}D*@=eL zNTpWDKG%lOE|_p7o)o(G`qjmyJyO83of8ttqZQC#MJ(b1H!l9P3+i=vk5-nX;70S@ z5`R?N)^7|Jti`Z@oF|>pod+doU-*A)rXIt96|``L=9k2m`2tQZE=C7Fzq|tWLgH;) z*|dw=b%e=GcmMSWA+)y6dVyx}uZY$~=j=tjfI8+`40nyY1CXXhqt_>>>n{7TUz{K2 z#>1<(?P3F|Lw=dOrvwqaz8s#uIz+h3%Lp>S-@3woujgo$`O#kxptE)qxca~fmR-i6 zx{jh1Fw^37$CXz5ccEByKTI+C;FI&Sv+>~ft@g?;nP4?ki@XL~_8tLiTkXvacH%>mogiCU;r0&M z!SrK~joEp=$E?YA*8U?IAzSS|zK}bO|Cmp-7Q*gg5+Ab@C_vzVPH@QOYSpSpp(kJU zi8|y`V}AxHpvnbL*_9355d%M5giW1kKxoCL-RUFANfkM{S^Jmg=)TMTC+j@h-e|R- zcUUL?>Fl=J>&qJ}o1ED9d;6{Sj~-rchZ@hayrguc^NoIBR>N?w=z=S}1+H*1Usmzv z^smWVep*Xh+f^L!d(Qy4D7fD&c+f0(*ev)e7Z99^bZPfMT`E@f>xbz#c`QF52+GU# zSM_bX`mj^{>J^f8G$LCD>f*@L9@wv=3;hTx%>G#-QlJ+14Qv@hN;rm_0}F##|)oh=N)z)5R^?wZIics&;v#ptybit1aI2478c7cP7mdicVLN zr)T4$-IVHJvG5P@t|zP1K8N?4a7jKkUEjm^|E9%A$H`2&^O~k-a(Jw8+(o$zo)m>x z=!tD^|9EyjeuIt^n9^VU@ge7p#010){qq@Ky45Fj!z)}S1zYLap@?uakE$8$034LY zxHoa}4EP3bnJOEKdb}_+fPK{0B=A_?YLfKpt2MF{%L^AG_NKWARgIp=mIjQWoFM-7 zKia+aU;m;`NElRJvnhRwAXWXoxp%jXQ1HfYmj6&(sF)5pt%Hzp1Q|)YLD(XMOR6*q zqd?R!3ZYfTPE

6DmeqsFg3M}sY2e0chNK|@!HgU zF^$YMu^q>}y7UIiQ7bW`<*aj|V`YiSQzn$<*t~=Raf*t|ae>iPa!klHED68Y`P{}Q z*lHl$nP!*>SjY>Q8<~L)uP$ZjfvXJGL`*tcqp~!F#3mRA$7h$ZUCZNKoes#3 z$Um99DjQ4wnpDOPEkPe9nbfro-3z&|E#ZsN6Iq zHw0m_b058Dxv93y=!daYfd+&c!is~}fF(ij4G>IZkudX-zDe4P*an&l4*5%p)DY_) z0F7=*p%WAF3|2+Z$}8CJ?5zCntR3O9AUX7yuk6J!o~43cb96ksvRjr0WDu&l;}!-6 zNjAae>zuHZmVdUxfvdd%a?udhE}BJkJKoMy`_XRaU+8JqT#_kEFV?t4`LoaRfcclF zIGvn;6WVJ?5XNSd)7Ua0eaiToTnH?HZTt)3mvy%swA)W$m%$l)?L3_r*JsAJ^<*yP z2|+m}6_d?ViE(3r_Cuz5{j!hYz~OuOjd)W2VU*Vo{)M?a%;;Wb|J^t52Zn;7m(SRe z1f%!=H|lqn!My6eY3&KQ=&FLLJ7OKPRyUV02v0w$5uq*5nl4@)LSO*j3s?4r5 zAi*ri9LJbo>MD!&JbE1ZQqq%GIIF+^Rh5}G|8+h?W@T+2)TVmi1S~u}cCqtnz>BBT zo1C4$lZCCSYBlNT3Vw=hmhqS6t?q4f#eNvql7le`h(9!5&vce>Im}J!VOmb_MtA=0|`1OQRuu zDxeM|-6W}&!eYQK&1~`d95KpV>}S`>_t}KS+4UNu*RX!oD&GjSd$1`_{{vo1VofQ7lJX-#9+xE6kfEjb)1?fS9;y4>1yxtOqL^V1(OF zBp88ug%4cnadKJpu?ckj`kU{1tfjZv0fh>Lqy$B;kpak!J~x9N-d5V%`VHN6LPf6& zk&v03m6L`=S4Do6M$!|#ZtR$H{-)HRXk4&npqGGObAPh>B~Mx$aTssT@1#`r_40Sd5ML6`&B6P|(RKF(jW8slOgn7_2=o0rMcrho4u9Qa#Q~MGv zl=zq<*F#DYghl{Yprs6@!ra2>Iyf}himlA}VFIM7Y&1r=3Mit>8&$#fm7d;C`*56G zt8)&$#=4OY3+XZqtXaA%6a)g|Erq9{GOf4)nJ@M`+uh~fa(AoO-PqdQ+*tpCh%56z zsu+p3;XOR87QI_A|GBW|r_Sb+M<`dD;BwaGoQgTlAn4hq#+LDDjC?)cS+k5GD1cgUP_`i<6&ZR0>jQX`MfPoQ^n zX&_Kg$&w?>Xr$4}$Mx_A_N3$l6DujeD72Yv=N?f$zMOUb?Fxs;j5fvWOaeV< zP!s=R{;hmaaMB@-Q5=ieg*!W-FN{uyLqeTKBu}tTCASpJnGh35vZlDM*e7X9 zkcRZmq`7*UELC%0B2?Aasz^iITX}V25c{7xm|YJW#>Zsv|Ec4VKU6&H|B9tC^nc>g zIA~yh$Q3oFaB(ph=*9DsBN7I%?*S4vr;0mlT$r2Rx-tvhBOhJST?u_LAbp8WB43y? z!?;HHpE?`H+Xe3~#L<}FAD@x%Z{}1W%twPa;w)@d zPG%D)9ivT|-6Y2_eN3?TfqaUD2|(cDlQ1aUkvPvjlzfBae!|5KYd3a(O4sdOwvf%- z-Q0IfnwvO-WTX`e8?g}?DHg|ry1(e;%v34Lv|xz&c`#oR*t3W;2J6UyiU zbV0%8pO877sYfn)dO`?=5dWzC&&@Ng@TyS;hqVg%CC1+=PqjI2xljN=$nwP|&05um zd-dK38yFfB7Ymk!^k`tT9~lOmu2(cqNig_Zm!1#I*#uv^(K%)KX^J>+eCE@o5TlF#B-s}i;bATaWN?btjk=5L$bV3nYOuY9b`cE(m|5?ak;)eX) zh^zz(%Wh1|&TR?k!1_rjkTaJ22>eV?9Qbd9+y@RY-qYjBET;uuWa8w`xoi%eaKQf- z*dxXeOZG3q92tXMhQ7cV2i#L+>JB~uz#%O~AQ84bfI76n2H4fjhEEaKNhXyU&8kZi zx54VkElwLCX3l+>lxU$!8tTO=#W?kezcXLuQD5?2nWXFr?yTr5S(U;CIc%wZls<=m{SQD4= z{#QIAWVft547g-RK4~Net(?Ln+&ejuO_gJx_aU$`LZO5^RNurg8W8&}{NV z+tX#;Taj8<%=r1TuPklx!TqJB2ls6TH|lFseO0TwQI8>F*(3pCj-t}^7y#DHjVDrk zN~~cu@Bc59ykc+7T1fiw87l=Mg$OJ{K(e+iWlFO{S5Oe)hzLs8##Gc=PL^yHww05qbjMcipd4`~Oqh_qI^=!5P6vB5-pa-26u<8IL@TF$Jb6hwBJ`doGWSAYM8-qLfyov=f`R z%CsQOA+GPkCZ++*1V3uyke4Y_2mm8kB<$3h0twAYQ_((9L=mZUmaO$w+=_-NdlKM0 zr0)H%Pzy(`F2}AeZ*JcE$|+tA;h>Z>d{Lk^TAUzsu*Kq^xw;9+oJF+x6uo|ZU9V#N zDufyMWm<>Za$T1TmgDLPMbYLCDMw9*5`idanhXwu&RN$SW?qkux(dp6)<;ukAk!>} zBmk9$Wbw(qG~=hOIC`vls)tmH{L2{ZV3RF$zKaXLXFKiPxx05sK`7jv2CNPCfzFrO z&j&o?Z~~L!QW%Kl;POPeCeEY0l}YdBV~Hb*uq{uhf&(142IfbK>*bS+*W?{9c%p1b z;-NyU=Fi;O@fVOFMWTXez{5a#~HdxSYVQnD~3S$Sa56yd}e+^2?#o|p1C zm9S{)EU80$gl#XtA7S3fs-aGk!7?bI?dSXd0qr`}M@-%*pjYaxWo^Sx=(g;hm#Nexn@&b`>s1W{0?yzrELb zfAyKPCBbG86Qn0HQkkdx-EDI~v~_Y>oQsyb0jl_&z5VubS1aIFMU=$Hxc+u*7mVfOWNOy>?-A4H8_!k<>(0E>{1Y=)Y;Ef%wI3TY?)0)iOC9 z5lJ}z>c{&JzW&FTLOse8R@g_7?(g#u_>+z9erL~yaJMEU5mgRR z7h)7QKmm-CZl4*6wC-@*h&yH^jN?7(3pZLi*&(ikI%M|_XOX!4lVjV~ z$&(#lzr{PZr(99?qIyATIC^PTYzC&_D^=7k>BvCC<{2??h1UsYe;tG=tE8WEQ@Uf4 z0_}kF6=mftg}U)eV&sVJ5!JjI4YBEM;wPQsEs|E<4@~&a1+U%x-r5h_%Uc_(#Ucy( zwiJnmtVhb7*Oxz!CPzVILz$+GYCa5)BRYGL@hwNZ><2+qf?@5Lm>lp3h1YwAaZ($F z?Nc;d5}w0v$!CmsQ&?G3<+iEJ5u$CnA@cNhZ*!aZ%{!B)eIg}VNk|q_&=XT8AJrNp z*KWnPM6deR-vTe16A!grMQKUVu`vvJCk@jB*pCc+^iL8!TpG`=tlhr#Kf$9=HBG}| zKh;a8n#7-Uy2%XPUxJL`lzM(3H3!a-TEwbn?!))1!ppkbQd#J>Q_~?cp#yW;Ew8UF zI;yMR>-Hw9<*iAbCLB|YJPWCaw}v(OFh*I`>p_Nf2)a77*Wo2s7i)9wLU*aDx_#7M zu6%Gd_k_^j3NYwrwC(PO?|ffkZeS0Wwq`Bh5c3-b5%E4oWqON8BM9IhN> ziqbXD)5^krfg~!|u}aJPsQqGVwYR@|H?}%qF2TI;h#wWlGdesY5jEGrW)lmUtzAk7 zx4wqnzEU!!Vn@MsWz&uOY-+Ajr#9BdO>b6LHa`Wsl-jVEpiq|kCW6Ak>yCpE_>;my z%#zd>6)u&&>rgRr;xNkTRT$XZUC4h0PBVBaQK$E3XDucsIeg~3;Yi@G|3Qk9#Y^N8 z-J?u}E5S5~8dy?V$#OF*#Du|*~>@o?iF~Wm4~m$=Oz>=Fi#gFIb=XGhnIKA zZ+dc${q$1)as2Um=%eLZpuGqL&>%}LL?x<}t|5z*>5JC7#fLFZ?1 zVM#7%KiPfMUfJtD+07LyAgJMD_z(~9%IaKhOG?mX(-b2>Ihm({!vTrI>q0rRtoce7HKhdvXNeqSP%)_uSiG%-anX_=K z6QgfCXaZnzuLF2e+d%t2f-%0~_0JK8!NcLP$t=(Z<-0bZW{9^JC+9=YJZ3BT<-i zx9Fk4%4{Sy$_nGM6s%fT5K^erD)#{jw)~Ar7x}z7V4${0rzQEcJ$nBaKa-E^wdP!x zWDVT}rw8a;FVHpPj_9IZ>Kr-tj9WpJH+ff!KI~vqrN#lz!wHpEzvP-L#l zvj>*|!ipt9-(taXE$GPng)#_YKw zz+%uu-Q-s?I2vOrY@g~hI@eCDO??TOcBk=@)Kx;@QoHLoROF0--Y$_U+)pxusXb`IQ7e3L<&3xARPoQ#y0~?DiO~ziSZ}c zHo%9pk7DVFU9w)%PSiI_ENJT5ss(Q(FhddwgJG(nAU|m;rcA+cy3ZHlgcAX-Sh7G| z5KTBFL#zll$09N_oFc(`QR@S`)(|Sr&Tk3=77EgJ3?DFci&HNS{f$ZZqqR}GY;f6yMsXh`QEi4|}P>cR;#)w7364>HF zi{b>PuJY+BuMh{Mq{URsr)>m}7vG<8&UvHqR!%$SV5t?p^TDHLXKk#=XC^#g_Xr`_ z05S1_rTUjKrzd8ZF>5Z!1@99tZa>@H#OJtrz9XA^@^Un+s_S7U>ka%gORP_%Ah9s8 z#;`ZdFc75h4|Gvl{VN@s%mD?GlZ3yymPmojBudz6VPeRWsGU$6NRyq^oZ^U3M!*F( z5pXSXtTHk+SK~y~HDQ)aL+lg*tQ=4TGNu8l_4|$qH)s1-mfr^No!H9C?AU)?MQOMbTqpgbd|0QISBKQp(o zyZX_-6d!0FoU0ZYCXhsk;O-AJKa+COmGvls#bb1I@*|yaqQc`$n%T_R*(saIHLbS% z-UR%@(_AtbS=)Wr^oH`F3N(f3IdP3eV}~HE$&}&;nI%FAYE9o{?u;}YGMh1=EAf-% zCarxo7#H9pGuxBxXT6Q}XWOgkreGyQN!tk8$?V$Hej855Q@gEp6y1yTG%_}&**3O= z>%fk%Og7~T@hRQwyerKe2_G`ke`sgyav$BA*qtKqC2X?>2-8kB9SPgTuO)Q-jZSFl znv){nZ?M4R`7cPHvB2Lt+N^H#<;hCfgj_SCU{f7aHnu@~otw*62KSeH3CuOS6Q0Qs zTHotE_{Ls1-C17`bW_*~Knobifx-!}ns(W43R=_lqBf7lC1IfnkP6I|PULStlNapB z*AMmVE1LovWcY^LoXscydD{Y_Wa;M9tf(i`#Bpm=x;~j866uO9GNP#4+{8<^>&doc z`p*VDv7s=vfDuSUn`-F1mV02@!BN?yF(`o=;U9qLD>4GmOsOB;vYUyrYke#&1p&Mv z`-Zhk-{E|0O(&=Q_Wa+Yv+w_zR8j&-Hb({Z+Ss6>Z8a}i2Ft`ZL_%`~19|()p^4N? z&T10KvNFbb8ZKBE;X{!zdab7hf8xQBqnE|~ltYtrk<&RLTY{)fG-gvL=Tf@N7GL`$ zE{lW#1}p5PQ-PJRihN?fLM5cRjJvNRs&|_}3E9+~x1=@r1$qS+XYMp;l9JDst>%X2 zUlT3EXA}LN9k#J0LH7%qT(NW^PRHRE+m5;d>!;Qr63VqGXV_%cHa6EC(KfG?8XAzh zK3Pl;h$xKW4t{m(hX?e8g=}=HU!Pn?-t3GZFHJC6~wnBbh+lV*^?}O+}*p zPtcW(Y3UMibfIHcAJ(g>GgR(MaCh9XFAcoFpP47UiFQ^lLMh%|69pp>vc=m@{WV^> zhv@V#-~D*+{!0QkFWXB)y@v7+UroAE+^m~gFZcf@y*&KHUjE7F((7HFjFjbNifhP? z*0kH{xg%YVBocd_ZnsA!mQCIlx_AF}ZMk26;zVZ*aHIaQRbM1QrZVPm!IiSLt$^5| zLngra?*>#TE2p>I>+HV&?|U6#7w_aI9RR$z%E^~V)VWefmjf1Hi2IHQ4izpF*JEv6>DHsbd4nsM)$@_RzU^Qgr=D= z1y?j15f>|^r55KjOP4!FK5R~B`s}NE;a0$MY^n`JR?!RXp4sw58H~M)bJGXTjxbs{ z3>a@$^)~$Km-mSxs8>vCY|v?-^m(_&8yisf?5cnzAf4R`t;dh^r1+GiJ!@04582IX zO_L>V)>3}ST4NR{rfq1ftKmpmTVHa`n6)4R047G6Ro7+9`iy4Ot#yi5*yirj<=$TJ z$u4=HpKd&Pdfg^m*LHK~dutkg_gwzU(*_f%E?Z8h+H>C=&Tf6`VJ71~qAwD}#T{)DV>?`kX!&pR;++gV%r`U(*Wy4=9?+5h){j9nlwOl=I9sSJw?;tH?=ousQnPV=?p{X|IWVoCNB2X5^Bq=XU* zj8b+P%sCqv4+!F;2gU|(x$`&AJ@8&6>BnW-vgBQ71S9>k-}_oe9)p6ZWOKXB9wHLW4 z;N$~+;Sz6|X=ZeoJ~#JEm;lfp0)NM0`>!A$`AV)KdOjvZ^?Ep*`ENCQOrma~A;(NC zAIGNZzq$|e%cz0?bQBHlXPabDi5Z7*gziOYKtqPh(iymZn8Y0%wV#sj9_)rPN7*k2 zZOw3=bh%sE-Q6OgIZa)P%lH2en~*Mf((-o~HSi@bAw^?k8X_JnXH3PG1g`j-Hr@br zoV0Nn?6V<<#15X=6v(bUnw&PUYB{kc=0Dj>d%=JS9IhO<#y9I%lNt3Qi@Py$OjV!U zF@*gT&|)Tp>hW12T1#fsT>a$GX#t-+1d10l+5*GhG+2JlGtb>Rmh(D28>+PzIZe$` zDG@$uL6c*AO2@|i$PYu#4B}ftC-LF+x8_%CXrpmIj3*ATolrWu^(N`PDnh{}Sf9s3 zw9msU{iAoL2OAvq3=v`#>F|A5-!l$R4=J>#nn6O7iJnicH2zka7}_C_FIQ-7KT|}_ zm5m*fx?tedP438OW(jfvDtkv^^_`v|rz5L88&jnQx)>@=)$aWIqxK>s7p!b?bizr4$ z_8kV5D!7ZO$R=?l5Ab8bwvNlwf60UG{l62Z*)T%c-%d7b-A8wJ^5FmMqL$pqr1JH< zSh2w9tvQ+b6`zTD9aSJML##GEixOU|prQ>>S=;aJcV6rxJordJPu-TNDZbE^0?ev$ z4AwsND!tGamSnBLCZZR2wvV^W!Arg#={SSsQT0P&0PQqx(3xPs;!Mox&%#Vtj72Sc zY*!U)VCSMKMULC+XT*slWu*KaI6qq>+7^h)A?&%W67<8w{60mnfNg)Et4d*#9oH)c zlRBZv)~$kaDh@E9r>ZqwrEb7v{72PDOJiP)$;IHU%}QzB604H@27!*^ueb}s1C$DK z)lKHA>&%Sm=xl3qrA!bi?|F2n;R9|+QHM{WXS4`yI7uyOw8T3oq10A?cm@j3x;7Ri!ww#F zJP%1kpn-iRm%=1s0C6HP?F?f$u6mRczNW3xpzK>RU4E-_quXvW2i(gs;~Y%jjU?gO zmqX4@zMhUb?zW#ScX?akY;@M%-CyCCz@5SVdUBcl-o3AF4-zg#VmUllzHh-Yjog(o zal66%!gnP`DxTY&1B08tx3*={-5-?0?BXnNip44&2%|V^ zj=_Z?8gu%nKy8}a{Scde$$J5|p|)iV%ajt#0SHjK%55-lnZ7I6cF|BZB*2R+X~1oP zzE0xuO-|Sgn6b1J1@)8&5de6qH_f=R^?40B&B5QIsWGs2hC9-aFQ0oX_+uE4pFGst&Pp6 z*Tdb^j#L7z0S)|0X176r=~)RxUU@h&ZseQqk8wdf0Z-5`%YshDZ;7}Z6J+hJVFFL& z+ONiyfBL9&>CYRPq}^!}4(%J8r59VAlK^JI>Drhets?X;2_1;eBywnT`AvP{C61_m zrbjRg(nSU$i2+R}msSYXo_XXi_TinLBW2AvV3BSQhH^6QGn&|YPZyND5f3gFBtOkWS_^^8gjM@m+n(vY2q(<$sp=*BEgHip-0!nsvB?WsJZ0QvrKq#KD>j2` z+D0|wM|0ckj}3t3wkENvf5H|a%ApJ!R8mQ*8Q}r3hpE)-U)NqvGGTgv8TL!wxG~x+ zb7LzYpKEw2-34xffo+670|$=UONWH{yrRU^{v3JzXm8ru-h+#_4W2=nY^8R$^!277 z3gN!u3$Qnd3l262?+2x=w4;eb%*q18{f~81 zyO!K#{K_ZjwmuRwIm52RMbQRd6NmICf4IyL4;G57pSIPz?%gkUFm1RFztHd4_ z%>WE3A}zR_2-Xutu^zrYA4w&_VF#NT4fX6>-QO6-A1lb22ojxEnp2h}ew#PRc*@JW zN|*Tb^gQ#2kJ>-{i$UD^MGu9ZlaGS=^LQtCcCbz)KqCJ3Qj!aNJdLoPAJn*OBS6;; zm=uu={J4ED=_2hfrt9d8j{kLhZrQ`xgXt4b{k)@_yIH5Hzshc~++8ZU#s|Ck#b+~a z>zDhvKmFC{k4L@!X5GQ++_<-|Wxci8J-lvu*Dp70j_-ucen}^9ho~EXll+(McaU$W z$1nPE-Q)^FBr?G+C9OaA5_nAEM20fuN22@|k?=^|_4R!>s9D$z$uTd1@6W)t58~)f zIM5!r)$Q?%cwO&FDyv*U+yZC7_Ye2K`l`4ANtC^=KNCOf{^7Q4c#2zRn_D=N9}y-T zp6qumKUhA*27FzAfVyVMU#JxBBp4QL^ApQmlCZ{s)^9l-swuEQciqRsdzCxPvH<+ zq9{+wF;$Zh5@CUn!x`xPuis|gF(xh5%Uz#kG?Q^Am|epG+AKMiB;QyoRNcITR#Ks5 zoKp{!72O1Z!YkJZC){gMGs!RWPPZEj0aMItXtLqV3N^ML$A?()oA)!F4VPZ35EX(r zLDXzg{H)-#z9&FZ?eu0!LJ_s&Nj)Ck)jt<-KxOt?khwfMkVywF2gESe@luDSNxxx4qhJ{j;pfcEUVw8VKEkc;q>@R~2u zk6JJ2xDcbr-2yU6dXW(7bWprnY--w+{pI^2K zVMbqjvWVBSR6#Dx=EqbNQY9W{@svlBa>d)Ng@j+<@LaVd7546g7)1SIdusj9=#b{Y znBi#-14&vz9!Jw66DN5nbFuRj{UlS4#^|umuBgWUJ{M9WzCmKJ&<0rV^SPE|W-J4k z)2)UF;PK`2K+T_5zxhM5?RJYT#WRN0>&awzH4iF@h!6Z_!i~UpI=-Hr_jsJeA9L0R z+F34rKM01GN>RPxQI#-~19QAWo)E;6lI{x>2zr(84|#Z9zz!^3p@XH1ldF~ocoz`) zWxG|s0HV<_xv2Y5L-KI1d>4~sEi;#$PN7#%zQIXNV*8ef4qI0Z8C4ikOJ34;nHlBk za%}Vy4E^B#<+QT<^+K!nwpGO_CS{AqDE@9mljiOuI$6-r(eGQoi?jTFbLD?vhd3YS zNQx!eZD>W3Z#E`LFX4p7s}VST9*(6~M3X|Gi*FK;<&KonjJ4Klfx$S)T#}!a&XRU4 zB`G~6u9*>VNoanpiNh3^fn*d-@AiJhRlPErC(b6WzELHT9l`;VM$SCsKx~& zv_qyFQxPy@O6k_ha#z6!q(%&2Z>_AawdH-q_*@{USRe343!#MIP#1!rRHLqo-~(60 z!<5{%$E(~Rcj5B6kF1|GyK}AVrsb%hwTHmLv@9*B(5AG|{A}#Ok4skYvQb^vCnvU* zH^!+D$Y9jk)Ng|k@071@ZnQcnq^VS8u5Rw}@tG3v@`UEj>UUdD_S&u0ooCxBNmzoC z-Dmj^`=zzIzu8-U_GFK@mHT5$^Ejy54y>v!LVRll_{^QIUNbn)(T`0Dl5TuYZMTRQ^3IM9*~g zdz%~E&$fCS+pBvsyZfYSz3;E>kNADZ%agO$aJ#F$%@0+$egN$fE1T@3aTSa&f7RMg z3c;hn!T6Qba?TF}+v!u~ex$2o_4r!v4#cW=#-NwPQiI?s$MaIXoqumpnAeq_Ih9vD9cA91Z)vzO%R0$;yq1 zNDK**&4JnD>OB<4twL`pG$xa+6xUcw~P3$BP+)bBiu`P;(*&$`Nq=f|ZB zg^4z(b}jkek4pnpX)hpb$O3-;{{O}JV(f`j%mE^|U$)jG8Fa1nXPJlm^=W67oq&(9yNz;0ATZ(OS4gvi_S21fU(dDHH#R%n-t(Q!XIngY#J|?MMR2Ht zwCw)r!SL01%7=nu&79*5PBAf-A(ozxasx`pOHLl2)%3hZWWv^L98&JH=w-M6b2GK% zC(E15FMd#s_}AL2`B{jga$b})uuj$4-zu>xrIjWRyd>RMtHFhpU6?sfH$B`QM$&$# zc9R?ZWOr?&t06qUtRD*#5Wp5_79Q@X|Jp3ENBwE^&7{roTgcnS+A8_ypG%D7STcvg z&~Vx#UfJP2EKdCv228AP0256tefaX~{>Jm={hd9Ic4H@PSK75@`Ak*4k$N3h*hlSj zsUMq6zv^iL#7hgTZkhP*PpR17(Fn}K3mPPh6e3VMZ~q-Euwj#`=ADL_-D0iMB52Hn z#6-+(f-_pmpolTkh)QlZ@Hs&wYMUynvh*R2 zqD|hcUR!T%b+&f)e&}s2ZzC0Mb+-3gTN~ZgqH`|8*0at1jo$9w&MMLC8{1FXmEg36 zNAlthw{FWI`p%XCb6fcL=#Ip}u1wWR!ph}pEz8#(57Z)~A|FF! zkFUwR(+%Z6C>vvn2!VWzjM=tCHd&h12$G%6n##g_(xy+D`7%ap+e6umHD=p(cK4JP z0D)1D8*%xpV4DK298X~?@o*~bJ~bgR7(?`ISFd^Yyr@B-WqUyiyD&>dL&;_fM?)Sn z053&Z2P`Mj3Q^WW9mkEaHnzL80sn?#00=t0h^8CS6lk8-6kq{8j8CqHIdO3`-0nPS zFA&kgV;j{(ws&@sSM99Mk@w3_d!4n;dLb8cf)+M%**}RMqehNf7eA6z#LgmTNf=Cw zkA(@p+TuMl)(d1qD#z;*4zMs9h@YzF*L{ZUEmaxm-GHr|*(4A*ND$Ts8oawtP+zh!cb^J!+2i(tROENtk3nm< zr?kP*ziM+jKt)=#xTh8tNNiL?2dOzf&b|Tb*@rS$u$cbG?f)wDvvmLMmot90|6755 z*zP97@tbx>UsHX=vxwjkU7dm#73H|N7@Tk%now@YyIru_ zroQ3(?B)vC&5d_7st%J(t3rd1b`Zb;J4*OM(bcW%^@_dTE#ba8?# z5^J{6*{qw*x;`|`K5fo4{PZcuHsAD+*y>m-4YxjF%F*mMO_*VCK40)ZG!9B4y{!Vp z5W5gP7GHycV7JZ*?35ELUz4<2aX>JPIeNeVK9kX7)Lmf$4wbLO{^Aj_hA3z%IdJ}) zb2t|dUkl~BP;usf2S}me8p(Tks0y>>39=+Ft%U_xb!fts_-$!6LZP@)8Jqnfzv@fX zE&U|E8=7NomLSl&=o<^uy+e{v!o||32a45I(llb>HFwA2sn6kAnsFk)J~=p$w7vAM zoNeqaY!o5s6B-eE#@tM-JqnS_(dFUGrd-`!BUzrQdQ70^PkZ{VHz|=1THVg-v%QV| zO43(}paGVKEgnHGe`ru($BxhZm){!y|gQqK>O`fkwr!Lc?YHPpViun9Iv zJV~AKcRk}(>J}b?lHTff$XCv=_St$#{KzR|$thA+8G%Iz!V2ovV6}O&BJ+mi2RASC zSndKvh&nuZO@aA&LZNJ@ZU<=~RrpZ}7C5oV6HwQiPc+ zf{t=~rGAvQ4I+)>SGe07uPLcx#-XZpu@Y~5*=RgKeUr>&&957cHpOUVlc{4A zb^W^yP=oiK-g32N@hmZRVDs#^6W-}n-_0{NmDZs%HBA82{`~6v=p4_2?mj)#pfXi$ zOu5z~16~#j1a}o)*s1MZ9yFm1``p{)CI>JiBoP><>}X>P0XwSUpCQ?UT>mJXJPgrS zKqX{rt7Z8}6suscQF(Msw3#w|>>VsX9unA2?xGnqrz6UpUfC{uR6wb=kI}P`SF9zY zFJFPo&G982K+^C=+o~zMrLrHknnGX-*+^lpQK#fIAQIsNW2Z6}KK^0rNwcR)rXQc- zVR4CwZWSkntSZJS`*wwK$=W<`be^;Ya?3f#eMs8i?hoB3o$ZQPL9O^I7QpBz7eiT| z8q{3Wiq?l?)H0Czt|zL3uefSQYdIZ+d6APy1~vt@)v0i0e}^CjFM%r7Ifc3@)!m~= z71Q8rQhqe(f@pFde}aMhUC=MQb2kcxG%5;)gY6;J16WHkjlc8N)x9=%2{FO_lvN!64V*^-B0KY)D54d=pq$phEx~Nyo ztjx3H*&t)nYm9MzA+;X+*bNDnsZJOt+*wE5L}*(%IWY)T6U$+$2NAS6w$Su37(&mT zCEqO>Em0oJCzUwWv#XK|#YYh3paqvZ8|v>i?{yNJn#a6Bx6QT_owHQijro<-EiaG5 ziyy#5W}QaClVNg^TR_Ug%+|j(g*lLrpfHX+J&o1mK9OJwhTVZb50F#~(_kc-3dB`g zE(Oezs7CZYBR}uSksBW?ds3U%=hM5Wi>FvZFk0YxNah8RHd$=^EqabH8GRCUo$xBq zWznev!G^p9NUXj>RH;tQ@MwY!j#6x{%>0~!X?=nBgiqqcnM-lGz0k;9_vu%?jqWmTq&eFFoPZ@j zOXa%)o4RVziCijso8Tp(lam3`Co$mUbdls?7engKGViBMweP(<{w9x%D zU&_vt?wVRljw3KP4`+OGQQp8ubQmop_u0ZQ?HEes(-*=x`FpyGQ4msqd$4>YB z@NkR;LZ_265wS&Jg8{_LH`}mF+U?eI3I|BWRJAScyL&mf=SFdnv16nG3>0J~OFcnf zR^(8VeO#oQK)hCv`y!JV4KQMX*>J!C`CAGzv+IdquQa-mMJ>4u5T)X@+5GX3FwXc^nIA5UMLONl>@{#7 z6^6qul$X)W88N+PdQGhc5GI!(;)^a`B` zJCh~_n}5m(iD~wR=SN_+3}>TsMQTpJ! zy41>=5d3&9##cR(Ik7$D=aX6`;Un|uJi6uT!kabWUPuZSXF=LU=j(ARxN3!#J^gf3 zu5OroLL^Iy&pf9dq07I7pI`s3N#b{9`tTS^-Jj5I;hIup6~-P!h>z?}mb zQ}+Ex>%fuv{FGW|1X6-5tK`=x)tPH0VFw~Ds;lHVg6;#-hmp3FJqSIg;U+)P+@^{z z_)rVQ9Hp0XsCy(Ul$o{aVkJ}}X;1i7SVrPpK85D9ptW9sCj5F#N~!6$KC&OVZRZzP zI$KY@x$&Kz->;GX`AK)b+CE+t}-@?qh1Zgsz!FQ8z6aOocEb zAT6DXrORF0DhBZcy12o|qf=8p!kcK*+LNCMDgwTX)8M%M%&Y#&6-Bn*OpmO6ZEiU5 zFIPKY_2tt)S+p@()NK?g|5mJuKAvwkKO?_7sG3N3JVL${pt@u19R-u`y4cX)MhF$JsKwE5t-G=4?n zaIqg@t|Aj5w$VwmeQYd88c6W)V*Hplp6|VE#c%i1Z#)e>;jh3Rz2eDabX+a+781R2 zaoGN1e(~Xv|Jl1Z?43Mnf00hw>ZtH%BlE~chpnUG>7lgj7TAtCz*WcOx%d(-{43&s z{TnC$TH>nyn#%{qytCUQ$yOkQ%1CR^Zy?6Vv@je=Z-P<`BL)#TYL5A;0b?0G-vFxu zttsTaLhFf>^>^cfrz6D@;&u3cGE?!z#pexfSFPhTNQqP0;Xr<(pGb z#9AG$LwE)wqZgG#Hft4O*M7zRa{g+}2D?qOq;tg#j)7e+Va!OfZV0_Gt$&_+FrC{zf6v}7;Ro>O@bIU?g@&oBTBwl9 zzC@tdSIJ%^J@cS#3<~ndUFm#N)^wXh;^>k{O1sL}*lgm(utI4TGa!kQfy&CTVQjX? zQzh_-J(ca_x^ZevZ#Z1a#8*4K7|4!jd3UwDh}>TJ9WiM|g>#*Z6SX;&Ri|!FS)u5w z+=-;fixFpc)7kx}2YQG;dqT~e(TgtH``Ru78KW>NdPJs-Qq$CSLhpi&ME^$Zb;(OZ5ZQE*J3|hK}AoV*K^pa_Bl`EQIJnBnAbUp$>2tlZHRG@oMf|Cy%w- zKHjiLv)bOEyL9&2#M-4@-z{C(za)XD$=x$j~M`Mx9iL)?l{UANVfU@y=*h?&>uQKt@P6 zq&@t8YwHDRWv5so3iNXGDb#nPX!oHt7js95SHzKC1CuVgtt<^p@Hi_j^>QnbNwp@# zT46hu_Rd0rqH)=dR)=@y4{NQS6=uHL5aL|-{;5`XGqj@O2yDajPFPa!nYEj8^vA^L zUK(92k_LtyR=^~g3q6o!KSPb6ElQ7R*M@ulKdStwF*1CRG6NIk!G#kIbGO>ilftj& z7FEq!pUb8M5H5wl)A+cJ2OWqCrW%au8^E(8sGMOe{qRBsI$X!XIrqs;+LbgNa zr#U2!;o=_8xZ0*L5GKfCB4$CSYJ)$5$H2+>oa99iSR7Q@sStU`V*CS|>e2iwvXR5F=!(1tH6YTe2;nKI!

syPonB9$xi~LiBhwfIm=Q zrIX3>PukWG_F;18WOGlgqi{NyOqh7`Nu$)2+1+d>gzSxo0)nNJG^U+6lcECFIdj0v zyU!HyUo}U{>z|A>uyKGNZX=?@us3StO9nC10%|n%1tNk|$)qyAXpuU~yiH%hQA<53 zV#q4Y)}Ayc^P{Y_^Sh+HL3(r4W#Mp{D|5GxS`Dbl?I7RHc4jNkxYI(g6M!g00B@2; zxATx=xr8A)S<077C5;%LE*$Xo$QKf|IM66FQLa(+bJU6*GZW1jGDH=3bToK_F$Wg- z--S3_pJ_+E*W28BaGysudSsIeNCo=Pb*Y2sun;htLo^n0P0iOjKuZafIGk#n8Fv(; zE=r2Gl?p3}x%5h?4u@!=g`PbiZ`S0~U6}QK5;e&GB)gRiwD(mCp4ghu+%*!2CLwEy zY+|I;Mx_xNifEO=Z*oixVnND-NS`)=u)vl%6uQLoRZAg6AjvSXES};JWH1}$+cCVj zk1n_1{M6(^#04iG+)=47DakYiN`B$ulLb2KO_bY9H|UA5P<+pC&=sJg*HwuAuvum8 z98*fJY%Bp2m4}P+JDPGSg>-w$mQ!mdr%_plEbLLl_XMVpJI~%Ul9x27LyOA?j48QR zdqJ8riQZ@|EV!Q!hDX!o5HyCNlwWh?eN}9xywL2pei|IhDy2FTCB^YGbmF0y#ti09 z8RHGwE|uh?O z%`cs`_#n<$DEcP(?VyQu-_~2nO?q6;*3^}@N3cj?FNhsf54@_7Leiy0Nx$3sY^@9q z+yz}_T?5jCy#J30jg!7sTBiw}2sl1n;Hnlx#LhUm+$LwW^lYXk&HZ`fIe4n7De#`p z@{yaU&a#64Po&s<;^tbO9aO`h%F1}Bfp`CKd~tQzq5}}u@i9D^yT)d+ZmB{=+9e)| zQG(KdjdhUx6zW&o^5(%Ci7~;ZO|sK?D&?`9NmH1K062jCu~H6P*FmMLL)DG!M1O9O zRwMCCLot#@{mw{3Z|Xy_%%L6<7ZocXwAZ>j;wG7s?75@r;vPy#%m9@M zNM%Y^))VXbv!Z3B(Xa8kHsgqTRhj>lfnJ`xc8c8Q{_CPGewvU-MhmxQB&`K#mV21 zT`+l!SA=}TLn$fueUN0qnWYU@I+OFob7=ZW{~h}SQblYknS{J-&r8hzlc4EQB1&?@*N^J>UMH3{!2e1WhKkgkg=f;Up5>+c>i ziT-@ZpYJY4h_$snf@!Us`%9Z1tQ2=*d2cHjb8P)V`e(M<>+HV&?|U8FI_tn2xHLPh zv6*Wf9aVtIE`w1dPqG!NtkqnngZ2HLLbt72pYw|z@m02_o^CWSIwG4SW zGZF$yIm_3Or;b;wh$A52-?ieok+H6Wx6nnn50{moqyApz;MM4eJ7^tbp~c{Gv}jca zr?1oZdZuQRDlMKMqZZ{xD!c~^L5)>ny{nLrsGjl1CYHok$A^}DgH1mSofi#fuBhrT z>4_@cNA-<>5D7NgqrAikMzrzOw`oF(s?~zd7z>niShbJW4-ncWW2cOq0Tz{ejdJMS zLCiX9m695JmW&}Jg-*`sC?yKjY5UDLU)`N78B8gK?Uw6Zr3T5pc)MqQsrLjCPl z`^{4mFT5m9Pwt=x}VO}@w zbkugI=2U&Dz1dLy;;jsCFK=A$smbn8~AnF{;;rnY|ZtmmT#o z=?fD;<(@)RYpCrS111U2=zak@NkOFZH7#q*#+?*$#orv*l6!&`WN!gOsXA-9IxUTP z;`xR6g8Ia!mJ4#CR!GB4Kh-u;#r;>nV-*uB1#)uNEPHC;+nY1=<$}V$wmLpdS?^JE zKK3vhb`jENJz3e<@0No*HB?GPXON~z_rW*RZnjh98VV>Fk?Kt=L{H|FdN*WOoOf(g zIiaE#6mae+1p{IZQK(ZOs)~3vM43TVsKL7$wag^JRN*mXp)jV_C#&#Uua^1N*8dN$ C-tWHv literal 0 HcmV?d00001 diff --git a/bfd/po/id.gmo b/bfd/po/id.gmo new file mode 100644 index 0000000000000000000000000000000000000000..46b2f30394589af91283a11857e74ec67915fc15 GIT binary patch literal 105891 zcmcGX2Yg*+{r_)R(z5r4Qy_HSwCSQvX=&0VZ6IkvlG2t^(wpQaxirZQx%ajyf+ETk z9DsrfE))?J!GVYaMO=u;PZ1SmI8Yo2?hXI<=lMS8+;cNJ(Eokqv(YmRW&Sl#{=EqX@MBQ!J_6hDH9>nRyq^3k-I&6n4;cFm| z5?}NBhpaaBQg|5pS3`yCy|5O31}gmjhVu8A=0sv2nDkr>C!wx`hr(u90lT5{;d*!o zybF>gi3g$b;TgCW{D*&@XfgGnP|uHnvNsQo_dMV8)t=YD{V{h7RCqoL_k;I% zJ_skH{;ubfp3gyr`%hlI_gPjB4uLYi2%ZF2K$U}DuYWC6zTE_sZy$jwKVN~z!RO#n zaIe-xVhRkP{HcKo=UOQDd!WL30aUnO3lD@>`RDJ1N~aG(`SVdIcOQgu=P9WCdLAAP z_h>Wy6QI(u!mC$8xpOu=1a5?Seu3xJP~p239s=+6d>9^#`WdhO6I6M7ReK`wYPbvz z!~5U}Os=tVbQ@Ip`8=Ef%g#w^nXzZWW=KY)tgzu|H?bt7d8_QBiX`(On; z<2>RDx535m9#{ik^qkj09Y(#y^IM+5Cets#t9bqplsoOIL}CEG6%xe6%TV#&&}q*< z3YCt(hIo;v=rZ-S@DkMDg_W?a+tT+k*ns*`xC|bhHuu*<#rNxQ9()NZALjO0d$$Qr zLH#;-61){E{$GdFVWQXKKLgG|xgN^>t3AI7XQSS`&$tNIqwa$;_i-ryeh;U?V>6ad zb?{WwT~P6O7nJ+ohH~#EI2~4;Z|Ze$3F<4M((gg9U$)uYuY{+d-vJfR%RTRdG+~L~ zLyBZ#S-+{@4zs9#2~`fyCNmWOYhWF`3o877g>&Ho3R4yAgHqoL6`#l9O!zWXxMt$$ z>97yd#3XKq3eP{`R9G=&=FWyqsIP}-!k@xgn7qL9V;IW68=%tZJMcL8Dk^gYEQcq+ zc327XQ10Ib%i$w1fPaRH&tW;*YPbQef^UHe=Z~PmeN^81pR-{S^}C_U!NYJa+>^?t zcrJpoVK-E`Zh#8M!~Xg2U?b`yw^;p3L)p6;D*X4rBjICE_MV4F!~M3JxoL0#>UOvs zUhVlU*noQ95#!lV_3*v$WcUPB{9lGk;nZ!G{%NRm{R~t({Ts^tiVLm(>xPQ&>!8x( z3=Oe4So{NfG4xLgmY6q2lv9xCoy3S}W%p;5n#232Wf~ zmzcS;;8N6AK!xwCQ10*cI*Z>-cogdOum$E|03U?Q;j?fvJmpdg|8;N)>aRoP!|t!Q zbe#qjzB*1&&5rR(WeSvqfla_4oDLhVvGSgSC!>B3JOw`J^?wVM zPe)v9{o)#U9O_HqO!!`S7gSpN5t28L0Af@by-XS3}vm4J!VR!E*RVI2RsygYitL^m+}H{m()&BDT=F&x z&&5#o?u947-@Q{2?g)$KgrvuW%VW`bKkqJyiPK2o=w#q1uBZZnE-o7F4{h zgenL3!n5GNq1;{l4wL@|;i0H6hKIrHp!~ZXDtr$^m4}z%{_vD{T7R(swxfPMl(`>5 znwG>qL}D7e5^jKZLzR>LZnp3&hI*cXt?)Xidh@L3tXnL7a&RH~cS7awvrzGz@ovkf zPN@927S4g6gG%4u!Bw#0J(gZuq5QuGHo%|3C2-bzEgkxx)K_{w2rE!0-e;T*m!dom z%Kpt>|Cdndd)WJ}9M(aVpUa`@)!k6;{umwykGR#svjEnh&O@314D5$LgUey_2dw>n z3sn9-3Y9)be$eW92UPs-fM>!#L76-KHgoq1xDNG0a6UZgLl(|;a5d^Hq0;LIQ2DU; z?e@G99*jB#kAiu42z(Pf2)-Z6-lw3_<5{SDIqAcu-v<|?77rZ-k3ce+({zzk(`fr+n1>Sr1!KzZoh#&p_qJ@gFmJ zYBf9;^%tS?;g~z=Ti{wa37!LGz8f9@Z-6rQ0k3`rD*i7*)sHx3u5epn9Q3{QrihBM(4@Fcj`UDm$MfK{m1!eiidumau*m2Xc%xqI;4=I*gj{+-H+bFwr=flnDt-Uq)xjq${TpC_exK)6P~o}*9snPK^5-e2_TVpYI^5@z zrd|ML{!Gs-OrpLXR>CjCYWOF(9xnKl<-?ny()V{z?oIo&*=vPLr%T|W@PknCxep!z zpMgr}zrzLauzSqhnQ$`dO;F+443C6whDw*)q1^il+!y{3?hl`Zs*it$`@w@hW91-# z%BL2%2wnt_ho6SZ*T-N3{2NsGs_(UY=!FNNz7Q%N*Fc5$Zs^hz9)|iUD06>?C&0Zv zYvcD*pz`@txHqi!JOdt%x(zCx=R<{~0OkKpa3Aw~{&=Fft2QC|U1gZDw1{~J`iXWnn^#AO0`^@Hd{5 zzGUe?4J!UkQ0ci99t|&nGvK?R>c!XK5%76OYralrX-gBVxvjHmK2BC8YDxB}~ z&mVzu?@#aqc=Q7{ZmNPup*|PZ!Y!VkgUXl0SIpfxQ0f|}cn!k?;U}Qn`wCP!_&GcS z{u7=G>mD@sFNTWOjZpD<03HLMfGT%?_1yQX=H7`==4znw`y8nFUjmPX*L&UtW$xQh z{yytD=WC{ZHB^208dUi?@atB;&xBH60qfuca3S3L8`hqm4i)}wUVS$_3-xcI(qZX0 zty~Sj<*4t1Dz|@tOJVSkrT2MI`jb6p zfR90yqa(j)%l|8()DOV9@NZD@n(?@`1D#Ono1oI~Q7CgS!vN0xf$6uw z<)|-(DsNwbC&8ECYIx!gEj=!P&8Xi41NZ{0ga`h}%25qG7A-jRq)tYoYYdhbkZMhbO}apwjhMQ0X)I$JXyOLb-Q7RJ?A42f&Bm(eMe+ zzrY&Q2mZv$aT}b0`X<;2zXAh2f0DWcE8!gY5vcO?6Daq0d&=U!04hG0LAmn*7{Kqq z7NZ%F1A9I z<9ETu@Ik2behJQlNB!LLy$SAxIt!JKTcGO6%~1LJAXGa48Y&-;{snVka3wqfHpBg3 zuU8kK>|YC&o}Y$FpYK4$_m^J%ch3W!weoZdJd)?ew>ib==7d{0? zVEr#m|9&_H_482W^MGHOdn=*zH^C+FQmFWR5iWo)K$V;F=d7NsgG*6g0cXRn!iDfJ zQ1PGjYtpC;Sq~~+kN(EmwO>K0_xP=a`xtmK>I$gzZi5QP6>u8-FjPJGF06(>gQvig ze`n!76Dq&Dz52CK=5K<>!`op1zYbNdo`WiWg7L{4zWd?){>vXF|C<43(dk!3KCE zRQP}D^%H+Ex$a=kPPE>eIDQ`S?L7d-p-LSI_$AyZ_nj9Rp=<8QdSX!F^ySJP;1Tec@}N z!gGy({vN1w`Uq4yd;+STJ^hrkP<>hEPx z`SEUeDEzE{{)p$#pu+Q4D07qkYUS``crofta2P%XFNA0P&BFIET!Z?Ta27o6?^Z7} za3<>a!s+l~sC4@)RQ;Rs5367Ga3$(1p~};v@D%tGJRO$*)8dtzmB!k@v}@X&u* zJ+6gPkH7`+cBpVY1#95^f7^V~R?n}(W#}LBAMygWLfQW=EQh0>AHo{-P z#jx^a>-RT9)#H!C3iy4f`nX4;%$aL~A4h!!)bmrz%3M9~fmNtK09V7Oq1u~@-O3Uj za0sr2k9zgA-A#QZd>8u9z@_k_J<44E+y}c+FWR%rt)tumPe=V*sPN3(t1OX&c_{UB z@GY?NRb{T7eE_zg{tHxi>h~^l>GL)?g8DJI2sTYBbLo3IRQNv+m0y2@sz1k1E_3Nu z59NP9RQ`Vy&WDe~Q{g`QlsUO=h38dp9{S&bDhIpoTjtuYO1KR52%HN)169s`15biS z>{sU6%Oz0dXe(5H-w&1EyX|lOS3;>bK>2?)tcMRkxjX5AGFPrngNnx>R6f7m^HF#% z>d6OMI`_i!P(KW>fin*>ckhMr=S8S=KH*?Xhd$`aC2T_fDX*S&NSUh_olxcaTB!E> zes~7l{m?R3?pH&(dplJ4egI|eWhnPn9A@!(D?AhR524EO$%mJ@am^WUHR_w8((SiU z<^6yoOno|3dFq17ulGUO{}v43AE46r;3F-)&w(m0Z-=t?E2!t?N16WvQ1SUJtb@OW zDle5sm$`nsAI?F2D^xl^1{JUUk1=}-VH@f`sPKLs%KS5M3Owl8GS}|SgR*xP4B$4X za{5lF`t&`hdVAP$#!jew{5aeQ_dUMM$!q6Bm8*|K#s4Qzp1e@WExt0zWLZ#=OQ0>!Sq3X}lc~<^j4;8AOG;2 zUuE?<3soNOhH5vS^Xe0qSbD67%h7)$RQY%qcETf0vwCnL3{c+%RUZEj%D!9pC22X(donDr>A10yd)ALa6=Zxi+PAyRRnum(-=RNnV zwscqxl}~SjiuYqs@jIZ#>O}+WLVYb%`}7C6A3SD7nUja7!y`~HhfCl(DEl`+nSTWC z5C0C8F0ZOBbMsHFQ0e(uco}>VsvK>pvvhkuR5{zT-pci<(6u8_^3`on?d!ii8&+C) z-wqYuC!q5G#8uXA48j?x?}Q51kD$uk?hR&d32a6ETG#}?3l)#xj50Uxa}JbypN3Om z*_mc;y609X_rB`+AE@+R&}j10YoOxuI8;3LZnEc#q4Y0>3g4%o^6_bS3_NzV#eWf0 zJGBL>yx#{4@Yhh`>S#881S)<02HRm%OPN~_dp}gY_!rzH{j;q8-wBmoFTq||-)i;# zPN;JBXSfa~+pK-z`w-{~p)_zYZ1uinS)cUI>*=PeAn-$FH+?|KMxOrFGBgh+lDeXUYY@yqptGmSHlBQ zzY)s(&7OC{BT;_|2JlDl0QgUM3Y>hd#jn!y9H{>A^-%tO1FHRc5h`B6M(gJ`LA8$; zLzSDm;Xd&9a0>h)n4X3-w&1kkNW3j9j2ZG6}}Wy`d{gJH&nhp z0TqwEHkm(%L&b9zlzVmXP`CxEU3w#wzjs6ROHV_UqeD}c-fi%F)bE6nllJVi^4|sJ z|NEfQ;UTDg;-66NpU`FXdOkb}^?C4Ecqvr7^d5K!{4tyaUx0GwA5iwEcUyg1233B~ zfzr=I<>ysU{nb06+P{0D-2EC1M6VG`~OTcE&oS>GwQTzRt~AySW@H{F|WqwO7OC@DZr+ACR~FoDNl9&xNWt+o1fv1qSeQQ03q! zQ2D-h!OG#uQ04ec7{E>_d$0F=A6$?6es~T%YK!$hd8mB)8dUxtwAI4j4wXLdfM>z) zLdgdwkC^!la24v?y!r*$iMnc=#p@P$HtMIK>@T>`^6d(!a&#}0dwadw+RvqM7V3+k z%J&^G2cLoRr~M-92X28XH(-+_tRfv`PK~O&o-#?`*o;tJL$F74zGeL z59fPc1Xb_e1gqc&;8OTBR5?5D5-TTXL8bdPI0WD3)qB0p%I%4sE1}wlez+W74;A0X zpvuucmzKGG&g-Dc&)1;p$J0>tdXLvzdY$Uo2i3m3!}C@+8TH4Y%J02U<@Fip`mZ-w zdR0P|$9F^N{~Rh`CSPXlc?#YD~ zL$9=YyBIJ+0y%TI0f|;@N)QJ zsC1e07V~!#RQ#`iYvE_1((|CVnmeaK**_nuy|@O-|GVIU@L_l~d=e^Ne}`%xkGRhI z)0t4^emRu>*i2A3g|`u3zwc9IBmr z0m{EgH`wzNU>oX1Q2BZdR6c(is^0DOHcN*pI0tnKE`ZlT<;ORmD3>Er=tD>R6G0^cmO=)9hNUALA5{gp~6=WFM@e^4g3R?{nxzH;(rg69Q`Cz zc&5C|%J~YYdNTl3&OQNU?k`Z~eeul}zd@+H)yx+e;W1e+;w=p4sTz|Z*tv>`ZI90*Z(8;u04YKeU9sHu9e<>>FtNv z``{-b&8Pca4%gUiVlnqelScb`J3oW!W3Giqa82UAo#)qZA8>yK{3vz`+@FPh`1>_C zbv#r5`wghy+qqU_<~GcCIvx90&GUC~eHdj8&wu32>*<@h{)GDd@K)^2;W`^LOS#n6 z=tp<$>dV#K9~-m#ThzTg`w7<+?p2m^+|T6F?|iOLaeW%~{;<;Pf6sF{e!SYdcNd(3 z`p=kq7uWYt(|x-3jc#(xPwitF=Jor8e|{9|S=jqM*PSstfA{x|a1zgM;QA%k1}^>z7WqBJ z^^mta4DaQ-1-)T!z5?!nJNn(p^(CI4j{3vsp9$B)Gq|qe*|R+RK9?Gf?*RP{#mxJp z$L}xb$A4c(|8f890L;;qB@X0TjouKK+T(Y@_jpU2xc>$Bf5prQ*8^Oeu=i>79+Vw# zZUOpg^TXd7%$&yazoYSIsNXvD4#3Ap<`&O<`asOSe6!!I71s{d~z})Y+&f(c?)Q9-zGNa!{)N6UB z-(N9zFjtmKzgb>i_cwE$$Muwd_7$GJNe}qF9la{9f1~$n_%&}2vD<#=o#_2Nn)`0_ z&*aHE|Ga_wxja9NXEV?{lB*3px}n4c=*53;MSU(Bf8g1A|KKe!#ntNlP~VQ|mAHuO zZ{Exh_s?PXH}DShI%4kL7rXy5_mTku%stF?JZ`Rm`n?G*_xDnN2eW(e{FmGx$fZ7e z5AaklwL`VQy7B^_ZqG%xnGI-Mj!qS=pmve`nZng+JkEjo!&zkDz{; zYbDoK)cP&N&P>eccRg%F|7AFW`WWsdmp8ye;ZM2t=l(jb@R#R)nGaW&*FP8gzu-C? zL+jxtxQ**ST&H<6z36Y|N}^tm{XKZ5-*oP8La!Ij;<^UCw_q;d((i3NJIlLq0(!S| zy&H9b>j=#M%8Vs`>dk)@{+eempr7IXKJM%Nvn`&ovJw4nq5e8tggbBY&l5vo z@a*5*Gki&Oqdv_&Aq`RM_XdOeKcDA6M86XIFQT&q^_^V$ZA1Sg?k9VDrd#~KjN3H! z?vFh`5c3Rw68&6lUuX zs2}yu%egP}_NT+MQ4e!{(CdAkd;Jb1tmnl1*@)hA?g`}vw~pifU2r#_mUG~#-uz2& zcd!2^%uU7IkGSsQ{tsNIaOqctnT*{g&gS_;T>ppq-`M{Y*9Py#-_Y0ZOYoaqZ{yiL zUhkva>-Qb6*8K|Z7ooooS0`@lj`|7zd>-oGa$g7k2v5PxWbVJn{mI-P4zK5G!krJG zK9y(FxWeD1=v|NEYRr5aHlv=;{i`t3!?lF#A`mGBVs-^l%o@cUdhq8I)KP~&{`TZDQZ*S+Zc6LZtKe-)hLO-w@lUhbDd z{r(9r;rV_sH&3-kiAgxz!j<$MoPgQcF>}XYF3Ht~UJutL+;4?*y_suKKfpDQYlHW% z!n@Uu`YiPItKVv(#<=oe!_Zj#Rp3g^rH}3h{?(b#nobFA0 zfcyQug{80>^**@sS*YJWhQuXa{TtMCFn1694|;!`z_Ty#{2yGMvF8g=>(`C@cVM@Z zYZ})hm^lv~!8P5Cxc`@;KE=mX8sCjQJC$dj;rb|guZ!u|a{n6K`yJ07bDsGcIUp$`+GX~d!zqW_ms94yH9bQ#PwaC9m;hX_n+YT zgYX5^?cDcqHFIr5y?{%<=XtK*m*JndKJE37MenOzYf+z$em#Ca%Kb8~FQQ+7H^CFR z^t-~4_^NmB$M6ZS_hHQLjs0e>^SDpRE|-3r4T*Djb~SpRMg13e8tTKjTDWiLx)l9& z-t7BPU(WqDsNc`HMz~+;{r-d3cMtjZanv8;*{iw#KG(-kf064M^nMO&;N4u!T>8z# z-*fCX@gzJ9brVnCg#oaA-r^=xlFbqnVf#I@gu$PA5B4xpd%kf_%0snAV?7 zbt^oxQ(gH&s(-pYn;qI2PWNM~e13P3?di#-^W2UE8_MVRk8BLebBRe?22xc)u!EBaEy z1ODa>~Ty+HHfWflOD>W{FaTR^3RtE2u7vWco9y;cdaHbgDZ&?DWSe zcFANAmLHe+<^A0ltuG8(8h592UBj87e0Df+nL;k4@4fu#E1={kduFXL%b74B@A>=(iHo1x*s2;>;D_m8<)EQHQfz*in>)Jdkn3|s& z#D1xql#mBE{tNVD0*vAl&x}?7UQ9K^2F?#j|~GZn|9hqXKOee zWO6|&=y4@D-&YtUKAi=hRj~?_$_!=(dxK0Ke+yI(_YFK=4-Iv7X35z;SNHLiX0SX*2CBK$ZI$wIi|$p{72JS& zdqE*HObzcD&JM^7nkQA!vh)tn%m%bGX`BhdrlzRjJ2H%)R##oq5Nz?uQ5YPihW8F; za_R16iC|@aAx)|4rtQEdB@<_)rF&`5h#);7jZ8Wi$n^JTWGMD5m)cVDU_(vaqK%1Q zLw!qi&_jonS1lh%<)znXkD9PDoS_jI{rv3uma%#k-pW9smm@ys=8o2wH(F!~l+C#!B{#a0E|%`r zcL&x7=7IwKY0hV0X0SUwB14oU+TI~|tK`cCL#Z5jME&$>Gwib^H?A4=$-OSmEc2YH z-eMs7Qn`QQ}iLV@M5Ft}vuF za-63nPX>B7UF^C>bLV9=$aW->E7p{5C_Q-6}szlC7lP1+rWCz1WRgNQs#g##@ zW^gNsA2ba1AcF>G&1`wovK7>=a){j^U-V~tYZ}mME{Lz~+KZYGRNbMm!~#H*6}eo~kCOyk?^-kA=Z;A9>Ls zH?AWp$3=TFqgCqfg8t$D4E3a(2~s9_y5iM^nAZ zg?zB7JU6w<7xQvuH{ptVTxwdwsc=X+fmv4=g3$T4x)mKwb*(GwN@E`Pf!@B`a=g8< zElgUM8>50!G^jXk&v5f#|F)pIww7udw5_QjVQdUb8^~~gavWyA%5!z&8lSzsTa&3# zk!waULtNP!Z0*bRYqUMopULOdO}jjD8DmAH=!TW3cpO?g7A`uogMfE5)=}_dMwO4` z{{W7X804eRK`Z*B0@K=2-P-iuJ3~X*8Hzk=*TSMmQn|sF1h0xwUZ)EAEHW!S;Xt83 zpBbXAwl}XBT@DL5Ij}8Tpygz^t&TRggy^b;Q^n?TMWU&D*sSL%Tr%eIGOO-1C z>)Pv9w^eskw>5RNH8iy}Hq@_=&w6hV_@J%!zqk=xxfZDK~Fl4>$m}aOXh`tf* zX3*C~*$TTg+Q`CSBuJ0vmo-d&1~AJk1H;qd)L?Hqn5IdWrLNx_Wl{O1vaIoDkVS|Z z$Xsad&~Yf{#i;_3v8iy}wB}&Yh*&F_7AvHXqX?3_S-&1++k) zGem;WdT5}ec8wG%Cfpd~bjR8LElwsXF&O2m@8ibFUX73=%SA7?Z*vQsol8X$PQ}U( zsZI8<-f$L@h8JW^8bCfzOH%P|=m<{4yt5pbSw5oaux&P$=t{XxLQ{QKmQtPBEotY3 zWF16BO(dz?B@M%oo!S;Zx~o8LwArX^S65-!O^Z-=YpMd8+$j7=i36Sg3rC$pk+XR5 zzi>1)JP0eqJ zRuI(f`U0EK_+tFQV&-iXLMxJf*aU@xrK%ur_pnx2s*m;Q@(Ggc-u^%1S zfLZdE#&*}Xl%`QA?3FedB{2;xGpGnwHosCwO1+iPLb5Xlthq{BzDNj{Sg(d_mV~Ol z6cdms&D;007~vLSTo#=^CW58Tj~XecN$u^=c1H4VmGffP9kEn0+ma`dR`4o}109pf zzgw+fP@pw}|0)))@-PLYMDId2qKDW)kiCu4p1+(W6hC4ZH3lfn=F%kGkyG0%FeUZ4 z)Y&j36ItKHn0%JXK+M3{n*HC^wW?rBj=AODA*(S_>Ub{|bIBML|eu0Syg;E1d#+QsIkd4Cvp{jX)s^9D|3UyOvCIQeSFbJj4LrUm})150*CH|zkSU1oB&drKY zA*tZV^lr`|-$!|46k0lFtO_c6i5l~C;S_H;&|WzIOcTW-FDkM_jE1ZcP7&MQ0#%p+ z+%Ww;(wm-Y$~KdhaEZfA8E6)^!%T!@`OpDBj2m05R1JV0704m8tpDK$bLIF5G(WF;nPNcz%F z&IM|_<~xZAjSfqpy{v_+U31=q9c(Q4ac3gg$tBa8wz@W(D9@<~M~fyG5}s&=VqEK; z6p5k}TDkYD@;hPLg!c&zGC~{7kNdPZcB2+hXhK|v8(H0_fpc^7ws(EMLQ`qzpmK1VZPF-vAHsGB{mNi4%@;7 zYqdIIBc?vh!r9p1N6L?@;7~rAu~rxG+S=;x0s@s^d*JOzn5&XmeGJjV()z2DgILRIv zcFEFEoG_&X=A){LJ)Qt>d2LpyzHXOxYq(bS&CL8iJZqXbTJB-v$744|04qR1W{MuLx_s*&NRW zNjb{co^Fa5uX{>6pUR1%jqaxLv z)pjZ}kc45$+H9!jw0$sSP1J(WPAg0pv{q(KY`=`J?6%29Uc{mkb8YoOzzl963)(}Xbnmh02X3jvZ+ zzn1A;AW|ajcHB;2BP}mQr%as&v+!;ny-Z^*HHLd7qUooe2z?my1 zVyqGoVtnbLkGm9=$-%uH6W&8nZRLdBeLA#+x!hZ-}G2-bU; zjeMv{-kMpu|K#vgC(lJKs`XxM+ihxSX$zN?t+Xq}*R`+jsB4W!oGI(D>=5k&`^zX* zCGnTNp;TsgHbe1#goqy77S_|3DY|O`MZS>S;uj1@wVp1_a?8v{g9w)3{HD5q#>&ZV z(_Jz4%NQojZPzgy#)jGK_QOSaEg!=tWUBUM;8vzDJ<_3}dxw7(h0ZSxx-A60Q1%y! zPi=}qdxb{Sz`6&%G}_dY6*&#rw*|h=bkUwtNAb3I2-&^0ZDmXJC`$X-+=q&cb~F`6 zN{0SkdbB#83Kq^sz(f|@#xneXO-9&gm#%`9SDsnmY(X-##c%>g-Ed-Dn_BZ_Y-2{o zbD+e)_`VnYD0RT*P25DXE!@+9x#=@M5DMjEubUk3{h#`tQkR^qlIJb~yaX`5o1yRC zrErg}8@13uu!SlrC+v(+cd81!+`zxuI6 zGrI&>>&o;X28E^9wGA7n4vW}DrtWJ(+ghh%qkg)Z<)$H)@om%of8!zosV2eHqQ3HA zO&pQ@P?Ef+8Y8~@Ojn-}N@bDIWR=8MtL}nDP5blQ&TQA%k9k=16$wsNtGKx*l2fd> z5322YMNvm#>o zrCckQ5@jec*?{@N-n0pU-WB%JR#r0K$;2l+lw)?|Ud7TGQB%bUOr^~LhmcdRJSKfy<#zU;~D58z)s|JFOx;%hoqzvDluQu<&Y1~ ze$p+WnrR<<^;X>pywHt&Yb52?X(d$ZJBx#&c#g$7@)n+n)4S7K>wvXwmc9botx zQ9-@3wtqQs%ElHhTF#Q6-_J5MV$ynRYMW)f!lg_k5IZwj78;*7*G((9b#vE!Yip@)Wjq!(UC!-Q)s00Rx3OJqYUqPDIV4&5bRz~o z_n|fYQvDL2Vl#EIfLVVTPT`FWpB97jslj}bWtNyV+dnYsQHghExI`%M(=wV(Wg9pJ zAUVJa&~Sdb>m6-(waZ7JTA{%mx$BL0XA9c7I4#-ZTuqvKjN?9Y?CFl2UbUjFa;{~e z4_`@)R;{SCb%-!uO2v;@f)#}hOU4q9m72;-SF)&asc4%%^)K4?9h+S$u}uLQO5(!m zHI0o)?TPjKAT8K(TPEC&_E`SLC3x4^q`GlLvmd?^l~O^wgRw~u1H%@9VgO=v~ULTstDn?yiQgpIo>|vOQw(Zqz zyQR4ZJqt%7{WcVdwe7LY=GNu6CI$UuncH{a5|CY2YN~lHFg|DI#i;S!(=_7B)oVH$ z>esBMSsgQUDOp#KI@n!xE8`Y*!wE?if43W^U5((_?P`99Ny!GRSRxiP`+t?3yO13_ z9a=vY4R_XTCx?qgENUDOR8%~QlL@ZUho#yka7uI0+t|kZ`OeyE?U=V{VFybE&Gq$B zb3|ncXUN0pn_bP&(eWAApZ_Wo$NI32m@J&{Bg23^tgHVYqC;EF9JIE8u^BMxf=V|{ zxHgzZHMXC1beP>VTezwz;Zs}vOFJZ&!)_uze4xqi=*3Y#JE1LA%yQUxH#Eq=nb&vx z{Eya?`n54BT7dD!M%iJex@6KNT!+%IB9uaX^A`H!X5%U944x_JC4;MQ(%lbVa(x{V z9e5R<*O!TIi3^loN&W1B?6S#{&@{uJ5`*q_IkyX-JCp0;WgPn75(8M+R9<6U^o|`F z=Iu7UKQ*xvu?4sPQ5g7h{8Ly%FOuWv+simSR07TEY}6RDar zP%1UB@)GM*t>%wz=Su_?oAK}iLRaXvYdklgS;ugU88;fe>>AE`YE6}b=G=@;^F}Kr zbPI8r!{w=y3T&Z-4mUoFBWvc=D;b?K3YG*+sv>LjE2Z=@S#8EGy|N&-p>pm9G*I-yne%zaj*M|*?*G7z`Md1K;$k>DI`aLw4%@7`i?L~`>#&8_4&GL2 zt!r!R;8mfkaG+Q!X z5_2%zut@oI{wTxUel1^dy}!`{b#?n{TQEhM!>H|IXQV&GAqu0-^74|ltGRcDHMfHx zXWRY#UNkiiMZs#UZDx~~0p5bqyXFK+ zFRDv&E!C}VZ=e#oT_~*K#Ki`iI}cX|?G%aFEP}#rql^vZy!mS`+p=IRMDcbdbZYG5 z5`V3e@rGx|-kXRw7Nzd`)j6%J#T+j#e#e_@AJU@G6SHBiW_D~O4C8pNupPg#WmR=Y zYsbo#*1E=34J%h|$H7si8=Kdf;aoZwbR=m)=?C8-CwZ`OS!gxGeuHKF^A9KlGR;4{)88No~BT6v|m#Rd1ufR?I6eoout#>+YcB>3}%O}O|YPvlNpp)r1P$8Go79C}@Um17Xbo`#gQSN#v*^U1E zhS_*F%5-@(f>yYX*<^d>vce24XSYNRY1Gx1?%JGV<%4#;jTsl$B`9HBM#|Kh;%i(i zjM~vjQSUmwmDo1Zu~r)Bmijqkh&RIU#)Y&{6=>Nv9+py5!L+E)E-%a?jg)kLp1j=K zR`1Q+ATI^@Rc#-c;v#aXn{l5byDCYV8UOE{V3N3atW&T{f!H;xC1SmnCgNho=qT5h zw^T9yQuWy823qOv4manCS`uJ>_+tn_fe88mGBrm>|6ZDLU6_OhvD zjytIl-xE0QEJ>Z4{HB^~80b7=DpNV-|U5oac;R}ir8H9+KQoVnbW|0mKHW8 zD`_P~o1E|>S~Rlv36~Jspd#JZ(ZfqL>5jf`RdzdGfbj{j@bANDqaC(;=q_1_&T=jt zM@`8O?H_Y}w#M?~y41=02D}|gj1m95J5lrJwDmj{)V6oD*R5+uR*}o2rW0jvok9>b z9MPOZ@%2(Gr&{+VovFNT-^})G(%8AhPrqAe7p(an*SulxTWTV27^7CZ!U4MVS|<}- zRulaZUOIfqS8wNrh7WWXeu==11L7^I`fU}HaA-kNO+2MgUPH1K-*i@pwH_-@_)`w(1;b~@@^*&gv*no`&6t@ z5xAU{*rsCJ$D>WzJ^Y+8w6l6;Sz+7-})~cUCB;k zR|PcyiYj_byE}hj(3%%}$ELlba-oZrnoPIetEnb-pX$_%u5G>|t9NE8mjNwzlg+>3 zWKm4?`}4yczP3K8jm9oD?SQf=OO@6s|((3H+`&Gs-8k+U#G7^&9W$@}m{BO={2l=uih?M9mI6s*9U0quDr;b-UAX zVcyt092vfDh1LN|)}Cx(Pi+(P=-q`b^)F`3Ci7gFJ33e}kA`qvYTR%|8=E!jMpbr) z<2j?Ycaz?5TNW`7p-v6JK$=}M#VOcnlvXAN2~a4jQNwr_C$@RUiPED5AS`t9sz`FE zzmQA%+3Hwh8BV2y6~>ojwUE|0J1<|63)B4E2K(!k=+2>{c;aVGV`D_JQEi(xL&xWK z6)VPsJ837 zXwG@d)OCwNF+t?Ell^+SwFMwHtxd=%=c?`YsQ7Y87{kbJ(a;$C8)Nsjuy%4vmjFVS8KZ*bRayLaT6^L0t2v?~^D zUk0K#`8AisIy^;->O-}v=yH42?Cc%)?kW|fIF(T}?vK73*L-n9zV%MF=gIA%aPe`k z%i1ZG6ckSSu@e|wf9hfy4m^BXI!lt5{qAbt7CEDmig~lr9eAb&q(9Zks4^06C@QQX zm`Rf>c4b2xd*iIQMiUWU`i*T>CVeQ5v7KQ$FU+fptw$&|>s&zwxPA@JJ02Q$0t)Y} zTc>H`0o#L2d*@b`+&QA|l`yIkvj^QyNG!e&&CA2CwToBdV*lfkA(a0H2Hau@Z&j>6 zN9}5VcBn&5tZPu6fa%6_>QN-C`SZjum`}57#;vJIpZ1DPEo$lI01{oNxe!Lp^1kR< zBzxiO(x5WX`_}H32&vhSD;E@4RNkQj+ps@pmUBS2G5gG!4u=`%&oCP&02ey{@lrQ) z%^}^EI>gC_>RiUAS`?9;a0lUQ=bTxnm-JkC=1&x$iDTwxb9LTFH;(u`by=cjP^*!% zf^CupL|fW?J%^=aZKa{?}oa9s%}WBqf_maRH{dIs8T{@${l~7iY@%60U`e1WQ{Ra6O^gEPKPk3m0Ls z#rnl)2Z(A)^xOhDO6ZH87JJq0+a6Eg^LE{oj|n+;M6@3%yIK~W$?GCHRz!}5=oAE7 ztFiZR=G&XoX3NgYbGyy;_91gr%&w+}SxM4y84DLIn76>BXBly?A?{pmQpzkpiyL$N z+Ky7o`91M^pMM-%wu|>ywnT*#&&!6iyzzPxOL4bWhoL!h#~RzJLu!f>&f($M8hg)~ zyDo$+ta_hahwdtyx-utlY>HYVL@8!x+^MFtR>3Pk@gSH`FDe(p*!W zDSfIa%Aw*=(rSFPj5)?eX~cC}RLsGmd;YBUsQGg1TxpwZiGmZ!gC?q#EN8j&v?>sp z_X%nuUG(mU6L^qJW|ho_x=I-iKAeoFzM2^u_s+PVRNJa;EOb|CJC>6f%xQL{P0}WM z+*n#3X?wN0jbx7-L~%3V-qcL8FGO>Fex%_i*tL~X9bj^R6aOM}({Vg(9{hyS77j>I zuKB>-94ChGNA~KO%-1NtEnhpB13y z{kR~C9ufXJ|e-@3k{NRa06){R1u6LXK8@!TqcgZ+`!7`Q@ ztJ$cuM#qY@7LQ1%b$fpF>iY)!h|b1@`y5ZW*DrdWSkc%Tv@$}~vEZwaK-0sC6>bA$ zlTOVfA5%e_oBle3BexQ@Z5+znv7)1SXdsBNyQ*&*d6T0JaP-v=db?r`=V((U6 zdq-o#>NQOr4XanQPUze#GS;znyY98D*umqD#vK{hz6VMrVm8*1bZ4PADCR>g?ZvjS z*;AX=2-fYNq_}8dKTT;FPq(y0g+-*+f6qsyGv*mBe^0oQp;DCU?Bp~PKZ>S3FH|II z<7TW#xOZ9!hHw2wn~7#^oVgMw$GX_yN4_-A#nVCRo7sowO7u8kXtobfF#*6K?!9i^ z&@a~DMl>0q;At+x85cF<}x{vs3haI zV|SFv;`UJ;nruf7sfmg*yUx9P?&qT2k^ceH5lB=O`kalMmzkV!t7EjHHk6fsjJWMI zHD_0x3u6XeJ4w_My3os%?>`zf5>RX7yAbKySq@PFrd4y_RN9Co_lj=(N!ke)(Q!51vw_LG}ysD)qbN&yX#n^+)DVzkw&mVds^Lmf$iMgm}m&6A4}FbCCv@6 zeyak+&QR7W-T8_Ior&d7*&0r}qT%W`ZEXcE(X#7_t;va|)cM)r*-aUa z6X4T;lghhiODrfZafW9hHF2onfO`X6pFE3pwNnDAi7a^Y1wM8A>5)Fpb7p5nVzqV> z;NqkNYnnU_rs&3rBf4=X^LWRtCCN$Kggo7HMh)d(TjgEeg$)n=iI;*_Q>OeuQ}!ht z)tll`KyF_k4%r-AW{|H;HFxT(6yYnp91CN?N%jn<)4>#;`wtvCsm4`LlA_r*+`HDo zN1MjU-Yr8$bmvBGa%1A1G+B|$Rygx5)opD}bt_i65YY~!`iBns+BUGwBYNjno)nUU&@cHV|}IeGSckv5fl96&%fwK zm!q$lsdsD*_xNybV7bl+q&~=;KT2I|Jhn}Nt%#v)#r#UBS+pN^HhMR(xG3qyxhCbi zZcM=lO(I9S$F>{YMMU*PFOtSas5D-BRZhY~VbBFHwC{HCYD*42HW3QVj+*MWx(-)+La9q%^`X|Y;U!!)c1i2fBMbzQX!CPW zqu+`|zrdO}Csv0ee2ls+DYjbg?de;NZ5jrRmq6}8*hR%sZYg3g8zFLHqD_Zduq7+z z&k#QAqf+4uBsFcV6a-|bM4S8mYV-*TH~VK3ldfpFW-y$%q_}DB!mMa}jr%xIxI482 zv8!XtK(2$&(e-&lZlH#wZOtjix(~S{Ep^-(pQ~kV(cIEhzd1(!72V-@ls3Q3t8`7Tj$}qRzESzpuG&~p4iCe$N1^i*J5p-C#HpxO z_%Q0!ai;s-^g&o)?Bw%kZr#1ikEiYgFPHcx?$H8ShFR?hSKU+)k>!eSbXwWVCA2Lo z%%S+|nmhfLFE}7)mVS!J6?~hrC4~|u?R(ijO)|IJvF2_5bit@>QIVMM-I&nF>1Nk5 z+o2tl3;_MeY)$O-NW>t<`WYm7t#z0P8kJ#Xsc*wvMRsK_OeFX2P3$d!w)SRDEnm>V z=Mp*B40$#_y&3LI^sloeV)nwl)wb}=6K^JHZmXYNNjt@u(={KV$M)V9B5cv9t2UMk zRQ5Ig1j?0dwX^H^#}cIb5+n2K(KGgPu~Wu773n&6s87L6{zbYz39RIh9XfQ1l5fl8*cL$z8;Z{;Tc*(cyO4Jdj{s&2C_ zdRhS0T=^KM)Df6N?!VQkExs}f3fE^`d-?63RtFaZ(RIh4aU=snXk@9&0o1;;z`+k&oV8 zdYG<^`|>p7UM=77G2ddqeW1oOG&U^bI=~lb&C#*uhv&^6p6^!EtUTG!M5oXXr#Xy% zkR|&t0c{pwtP}dc?SB>Ka7Eh1TV1ewwMQS`RZAH!7cPTC6`0$M_BQaA=}i{z1sd(_8VmsrdX*srj&5aNpSW>s=+M7e_H(!5H10 zzN@A&UKMPGPc^rOrq9j~&=!&sGvVn~n306jnP#pqzUz|{KX=V1-<;DqyYKO6wuVth z(UH|O#EctVLX?EWtw&mDDa?r4%&RC!;btrswBq(Io{Wx6(UZ0QHRP~ubHW#$OkY8t zt;?{$&tZRBq2*LqP38KDZMv?0zTFr_*nKI)eGi>!MuMj96j{M{vCdH^{z+gcStU?b z6fL_i&thGx!(oUx?rK7B#&zEn-aEqr2@SNCZ@l}5vDvDun-T!tSa8o0U3P%M#d}}-$vT8G5&h6?NPKVE; z(JQg?xm!>N#_*EQs--xVBpTkj@2?lntz$Xe>G<_}3Y~Pe_GPsTSreq>9@7|n=KEZ| zMHQt-H8pgiv#9kf`i7#-9Y>=MlS?~ny@NeXZr#pCe9=|~x7|FkGgh2TV8+8KN69j7 zW1uTy39SN!#maVjD0y?}yR+*&T2mV}r zr&bF4$<8ruBs65xHx|P)k8zsQ=KWjEdPrRlpM`Jum#e?Pe{TvwPiO8FGAwlXZ?(8h z_o`nBd*~J##(Sou&_0uB{8AJ%-KbiNQ6(qj$-&5yjQ~{|Cp70*0$bf7<_)WB8(QmD z_%Gks!is$a0dd>1J<*j#1T%3s+_K~vifG!pKXu`@K!UHDSvs;ML264DNjq#58*4ji z@Q4%B*DkHpEL;2oubOYs*E;a8nB_F^cxw+Zuk87+Z)9GC>+l$$u!cq=ktlSvh%?(*pPt&?W&7f zGC5`0KyzsAqDF`stB2`A8|=o$PMp;g6KhKJH$L~YZ&5{A!%9CP!~2?U*Jf zbrwtEHXS~pYlp(9yD$0_ZasA$MT^X+4H;s|f%r`9^mwM}A18EuOi(6pTFG7AvZ5`i zo#3$)Aqk?G#mwxAE5+D43DNtq9T(Ip*0n62SIG|i?F40A8%=yV=FX5d1+mpj61r=J z+#SWrUT`eUYHt|7+_r3qM4Yo)G`u}`#~3aN=O~v)1tR9IOOE=M>g|_DH;^h8HD_t( zO7eI%Ic#Fry_2Od73uYR3zE%j@DWz9(b3XSXKRX)N_|U7;<(^zP~snswwGDk)U;0P z_x_F5o%1c`;8@>cK`HuHIx<+%vc^7q<4@GkX=bbiPh{N5OWvs7Ym_XDm9E+4T@zU$ z-jZZn7sm}W>6@m^j`)okG#*TVx=AzymVRWw%wXKOU&76^Jz=V%*L6tY&M}n)Nj8 zq~L?^@gFmHuNM9|A$yEN$^Eqyd8mmQl z+u$HITjffeAbqH8Is^F?I6}}lDS?3GSWR(X2-RsRc7`U6niI^uf8!es7hzO0_3?K0 zGvSV!#8|47>=9HIQfzHsj#aw&a3c{4^}N08L=a{S+>v+`@gN*!+5RO4@@VPsk5u>h z>Iedj?a|VK2$9j4mN)86X(Z#8ndBO#@R@eQo#)`j8BE6q+u!>h_a_?og;O%&5>!Hy zJ)zWJOclK%!p;*lgyBQqRMMcxitKB1ZCD-=>bEfZqFS5ayR2F9 z(x=?BDSCU`gJQnCXDIK#lEC9=FO**JD7MGui1cVv-B)*IlsO9>@6M}kyc(=!SErNi zUaE=q5(DYMEo_V(4y4H_adLv*&B@wG2Ts%NZcM}*i$s`i(WjLtqHfK}J#i`GKA#+| z%0!EO3A(Q>>c2E0m!rxMwDI(+#?=hQ>W+*x=_cC7m~^@_9G=_kn}}$*<@&qr%}J0W z658#vJkhL$<%BlfYxW~iEIn3u*qVye#Fx&ax2VE{9>zE63z%}lFYMFkIDhRG`BD#9 zuVll7^%^v6^d+(9ns7B)VvOg62&vU&dGxZ~aGG6+w(XILD)m-4ogUV)zbo1sgRTKq z`sBRVYi?;Bqu0iUw$bL=+E?sj(AMc}>@WpAd@$hkwFDM)Va#8D1K zusa4eWKh@MKotoW$-5(clWs!6h`tnIcC0De5=@w;mUp=$NlJZ;T=QFpN?a%|k4H69 z!7FOJwr8x4lkCQ7Thl(qzU?xI+88>T*~mv!8b6=wT1NbJ3-ZxoFCw#h4S{x*sh~Z8a!(Nss_)d8DqgD8T^Y8VLegx zj3<~5?NH|x&i}GBt4d>Xp{)iagK(Hr;n9anP?f#YCnFmp*wjtpLar9=kO`s zewbS^ch2Ni_ZCI6Dc76nPSzB9bIJBBj|;tgL2Hohp8dJyy@Q1c<}N0;G`A;L(5|bU zPExBmyJha2Ig69}J2j}BUo~gJ%sJ>_Fxi^k;x;nG%~e(=`MlhmMOAa=%$##7<{DGE ze6pR9Z;pu~9lBRNoZ+>#3O*#xK&CGnoW`nmkB)^I&Mx1U>dR&;XkeFNZ?Lz(&?woS zP7PEA4TJP^>6|`we;Q}QIM)=!JWrFE?&bZQ^^@am0B!DclQ0#7ybU|KsiCQ^m>`uE zb0)8_Bu}=p^RJ47W=8U}S;x-|F0n%k()pzgZOzF=ixwyI3;G-&7 z#QOr16O-5;$5}wt{V6)&z`cFMhPMf{-I08e9p33k1ua=OPZ6^dzBi$lJtl348=CDO zZ48{JlS1b-Tc6Z1VfxS>!w-$?rb%qjyB@Q7$AKeLr`xmHp&iw%&Fn@C%IE8CcNO3A z`6GM@!!0Y)!%pH`9aTZl&ZZXm8z>;j>cL*70a8Ib%O0Ck`Q({2VUs7hFxECUnj|}U za!r~OhjV=WfHQ`J*3ct9JIgGYi!Ga5^7y@(yrldvZepC-7uY+lyvfawRll~(KxejJ zoz2WjoKBwV-k%~sWE-V_0%M3prS>_1g>8t$MG{l#BPBt9$pdq}=(swgB^Cs#x586m z-1g6K3`uEFiyk2ot0KBMlsa%GryFl(fK9Q@Y<5Q)5b>H+uL^iA^N-Ahu>E&(JFldr zm|Aliv;9v5O)Ass_A0S;Zp=_Buf*p?gVa`r#T;lw z=_O_wR>^ffPQmIiuYvijp|oh&FeMn{T;3Ta9^L896hrp$POg@dLwYABmvOJIC^L8N zm6yq9riTbjP|e3XRXUXdYc?0Cd<@<7sub@y7dHE-R0P!s@-h`noiSC@0A^@bFf~7w zj+3{z)$1reu8z8nY6oSIg~G^uy(QQV3a#6FSG45bh1)4ls!3kHgv~O&FQL4_O0^h@ z>cch~K!%l+5Z@=)oGLpgR5Q-zQgXpAhP-O5$<66CTQkb9%! znTfn+PTKp!Xp59KM|>$D5M$klta?Mc5^6?h2;CMSLP=PMROrTr)){=IKDF9Q5~QN* z7*(cf-PbkZI=%sKN^Mh1;hNE!wA!zsY@X>e3Ly0<`lbOdw)T_U-Sk|_z0Q~IxB~ zRRf=(`S$B(Oh#z(j5*qVmUb`{dq(p|SmTd2u&TW=5p2+6q^(!dC)37AuhAYwOOB(T zYjJS2o(s3jzJMJE!G@Tc%?2gvd85?xN2wP`%{lt91jwiQ3K_4xbfL3=fu-_fo^w7_ z6`!pxKA01`4Gs9y2DP}Jb1rw=Hq-xC+nIL9bsTBBzFNPc++!Y--7IjEG&0q+4G`dR z1Q0j?Xw$9HDHedjA`}4(ijYYE`gz`1^5(r&*eH!Yh~%xz$jHpd$kXQqt#4>4{vY_fvxsC0gE*3b0 z6S{ST!fATtrK6O0W$ zpbrDS^!v%|6z!EiaOX&V>;7cBFMd*f=s_?)LpIe%V4PrnH~Yw`+C>Xg}CwxfGp_(bsrq?MQ8W2>ueX z1b;DGJYUL?AT%@T#^~f{-TwXZ7id%_gnqx^VTgRyb1_|m#eayfw)+3%+_J&^_rfa- zfI0j z=}#!u4%sd2KxF%;L^V=(1Onfoz=Yr5Bd$OAmi^wGwG@VmGZ3J|kYkTCY#d1>aJsB1W}&g142HNG@mC3kc3nT; ze7&VZkA!3_;W&~skp=NnNO+M2jW=k=h=&&+*o-a&XOmwBCzncs(CK7s5{k>|@b(b2 z#DvkRgtrSSMj?~&&Jk(L@PA482LwbS!C&mC*~uw24N|Yd8<`eirtITMP~776^R0ia z@njr1U~iV+1#tT79%5SLBE_25n z#U@Io4t707HRD2qu#*pKZnKb!s?7nQFfW(edrV{bS_gg}L$}6dwny-NQ&?}(K2}+I zs%tA0%9!o5N1+oJI)X%E2&EU=PO*eFPM5X!`*dzESQW>fhyC#1k1qOKZ|xxj5{8c1 zMZ4Aa#QZx%V`M-b0e0L?6dl~xaRejn{MtVrBeIOdXf#{b8scDOSEs3&>1+$QmrIbGK`xe9Qg(uz_>7cyow9<#&U&CcTT(fWC{vzi?5v0H;yd2+jzZM-)Wt zWv9?q5VIv#lKOT;5Q3HE&xyIHCE==wobVA{_PcsN2$4$_=fpk~_7jBB&JMM$tRtD* z6+ompMd>i!&L_uVnp5E-C4*Ek zj45+8SQ<;orMF5?Nm@Yc1C;*ewqwFHO$$Ymz6@(k7@cI-q3OyFiVPN>GYo&u zz0s(b3+`8pJ{{xrzL*MdC8pJ~Y6p$kJ6=V3X9vNc@BqCc)Q3u~V9GXRKh%(zPg#;# zX#FJhF?iFbji5QhUzI-{f$K`3h&DR6(pHNk*~@Gto&8E&_OI!7@c{sN2;2~ z{Xesb$Pzp`hY9R&ou!;ZEAvF(n7zkO^R}5YtmQa{#5lozwB#->%3} zcw2t+%;Eq#UfLkptg#}uiMO>F(Ph4LatD8RhcZ$Fx^z)41E~4Vfp_H^&$5UvI^FIv zZQK{7RD|5+6<>T>A*{mV;=DfX{}DBGOrTF8j4p~?d1oU6$jsVxf$!Ah1O5o5L2)c{ z2nuV$+(}CSdj+HI5lVN0XTi?x&!Y+3Xqs|0wNQu~yN2w1ae}nq5|;YB7c;MGQg20& z(G11CQE-fg!ta6R#}b$XDNLSv`BjyUtUKJbB9eNr3w$m4rI?^}Un--E@C?o=Mh1Km z2*hCOh0Sx@lFFX;y_Pt!*H)hiei1ec0w!Ic1RWpA-hL1Bj<4B>7kHIIdVo3boKbMv zn1Njjb0)PP@VLU22Qu`walho!)Cb#dm0U}^#CWn3R)|O19~Ins<@KxNI5kqYMf84+ z6g+tHcwynmV;g-wl+}iobYN}?rO;ssTn;^*9|+W@ppfR>9vMT#gwUq3>f1DfTbnCe zMS<_75qBL;`P^7;DPH=f=sa<~kc`F+b4Ha42$Bcc^XCzrtq zmf*A&L~NaNJz2CG#NQ8~d%YCt7M>X{pT4nRRe!gr5s1XI7>+9j+iiJ9uF}l`%h}^7 zR!H#IZ$lR!pB9+0jm5PiJ>vTDiVrp-Z5r+ zoZxoM3|hNarwcM7Ql14lPc3!0mO16a(qjw*oM*(5NI@no5gx%E&@8r5la}1P>M&Ag zMJlKN=$oclh7AO2-D|~#6dyr7zx|S)+reDgwCk&|x?aO9!@rkS>_=S-oOVC{66&R{ zU_+}04pG4QAs@5Yrzlr-H(|Mgked*;Y2!uxyLy$#>ZUz>NaB%Jcm5y^T3xsc_=+q~ zCateK=fvO0Jc@Fl8g5V|vz#CP^X_w%bm&a4p5HFz?gvH{`mOGxBpwtKo4&!s+955ik|gOd=^?X zP|F^{0zdvChdiH;IF4Y40|c zU|1Bae1Ildf+GSv|7Yrrm#NF);*5$%_78L{4O)EVl9shAh&m+RjqTy`zuqja@n%mV zDIZvLS%`3HN6H^Sv%)ckQz*zFRcH%)fjoCUuK;3v%nTtc^I|NLvi)%TAy0iK>djkf z4PnB1J~3Lg?~enyjYTkJxB)xQ`9q7T$2A$=mu))2N$yPE=Wt_)Hp93cTCxuEuHuOT z9K>h$Y;%nUVSZ2P9BVTo(qDP(zRSN7QL)pv_@-EI=-U7$TWcTgMnv~>;IwFMVtKn@ zV(s1UV^97rjP_1QL}Ljwr# zlE0v4`Z%_TkSqbTO;@M*!W0x5KSt#CzOJjsH!@PZ8^NA~^Yr^9qfeobQ1-Rg8(V&2 z{m2A0z1#lRaAh<0NN7KWD+f)oGGsPEob4r|x{KXZ53rn2joqblg4O6oh2-)6AyG{_ zYPz(ze#$Jop$n!hc3K2r)e|et13?Qd^avF)1z@EH;9l&y>$5e?N+dQc3cNTFlHDr0 zv^I_zhtFb|qM@UBbU6MrRMudY60;8B*7knEQayG;4;Mg3TJ?$@TZt;dnG-&q9BlnE(9D2dPou|Nv5ex&kOE}H__{7bJ zOAAj@|J$$aoiwvE`5hUj2Gcqc=M5m}g*{j5KpmFWf;0%~XCX-J}&tAo}4|9K}v{fQL*!_)s-5=HU1fgxfyjOmm*ifSyzIRyu)5iGxs2S{DkaIq z)NMTgQoJydU9h6(37Jz2D z?R`AsW!$JJRCrAhX@iM%j6RlAZkkTyBHFDLM>_VYX=Ac)InBXs5D#~V2((r8b40Eg z*NaJmI@-k4D7E4Swjpyrs~QweuTEg$=BdA*ByHD*l}O zrLfF>W0!to;JwRSSd3&((g$3UR=ll?&4D6;_N3~OlRf4(?1oF!JlM z!G;5@iG!s}W!v48HbQR2r{-3=V^033ytR4zZHJqO9XF1Zzcp=yQ0~AsGF-ke3Rxq- zBra6D?QFL7-BQ|_u9&l_Zk(c2c4=gx|3fmC;PQ;{X`#Os7gF^xM|HbT5VxI)@HJ+* zXj~_gQ{F)kODgtITk@cz`FCqFGsQ~2++2UV5kzg~00Slsz5Yn13o4OGfpJW8`hE8Q zuCEedwAOiMeSJ9^=yA8ZWKsPnuZBX`Qzn2pI)S( zGIw>lV&ALh6hF;%vRT_4W}7{72i#ns9r3J1Y8}z6-9Prnh}w6@sKz*0aF8Zlr7vGq zX0^;&P$>6|g1dt^Z&z0bs7vLgp?OrG#;Sp2a6*+TOv7)vxQBN}yQ9H$L|RcuS68-n zevztsVGV98@;uhQRIb%!lR#{ED%Qy+8RN-N=JZzZfnyYb!kFz9)_Q~JSira8yOC(( zfyFH*8S`ltzGg0EaGs)WM(>C-WquArv6}O=wnkaAfX7-}D`FMqy>Pn*9|#ko$umXx zaUILYu$i9ie!(?-lRgvPc_cm6hG+59=id(@EhB20g96VXYGI%-2L;nq(SP{;8=IHW zw#nS>MrDKR1$3@bc9Y9|;`(FRotiZGyHQ8bVA!S8Z4;}@Qku3I$E#(ijk(PQE-UuS zH*bfp_3&QqvJF=@$7@WvyfuIpitKSqfPp_jzphwVOvY8X&7Za8)f-HDUIc83Rhf(V zJfirGE1zW58m}_!HbHW~>x{m1gf{7l1|3pnoj98bO1?97`{10p-K_oQ@X2>p>5`}D z8dlWU0MY5(_cNakEKl_Y%hsOM{6X7CtmX?hICO^@MAz~QnPt>0`qMep_`VS_C*QrpK-oApQ=4`zjUknpk&WC z{;R@ja3WdnXpTLEtU|X8nkRNLBBd~XgwvtkL=G7>WFjJ#V63=JylzoCaHVL4n>M*^ zg;Y{{FxMH?IDAl{UrrB)rmOIH!Ja&Yl^@EKdS9O%OeiiPW_#07>roM#E>3 zx`2@*Hy9-A@m>!H>gu^AoWl{%-pzxvV+95LA?VNoZQE@k^PL-R%Xci!#>WO6Nt;$kb zI!!<9%IMu{oyOXFl&Ypd%aYIP81S%j&Uh5dk${6B;7BxUNtwkemtMtbXscgfW{63o z(}Z#e^0_Pu{bPoCT{n_h3ebaYg)aO!N50cw2htmb~__u;l z?Up}%{Y6mzQji%AdEIYlrHH>|RvRlrk8~K45V*OrwKXJdbCsGvj~?GEW5l|Bdj+Zy z--bYG2^kjO=@+EvcHT-?J-nph&HJ=0WF7eRb=9KjnlC9RG;qRTw7C67{+~P+RRl?J zC)xArDR__xHH{;U7Q*8wV}VgniATRu6ida+tW;8kA)_^iB;#XSK`Sw2g`t&~@geQh zW7@sYoA97*NELv|aB?CkT9(T-#7qC3uef5_F#L@cno6OQ#;)G|b&;nF^^hSYr?3#U zMIZMC<){cD^0QO3irb*DccR1mbXrW(k9T;G(g$m;NV5q6<+?@+K5Qc+dq2--hNu=` z9^}6x)3R$Gvti0QW@C>w&8+d7esmknLoJh;(=$1zO#%;0x)Oi;XJQdoH(o6cH-|4b zc-Z#U>zA+Qqw3H)%~#j|X|2W9QbEdM7D1au{LtM?zP;GCtkfX{1p&L(=UrzY`o%fU z$A?Vs?d0;iC9n}uvS7~)tU2S|48xq3LG+kmk4n$=%z^>4#L`X@d%nK5yhw3rKe@(| z97HR+%iOC$+iGLOHimD-?sNI6N_mJ%am^cZGBKWrzcXa^LyKFQ%9w=h+|(x}7O4es_e{?s9oGL>2i}uZ?Ebcyr@?Vt>gq8eiNvaYhDfPC0jLC`_bqpc z^WHm)NSP(^Bj`i=4aL`OqwnnD?mHas9#8S|c@TqdPOR7#Mm1e%rE%8&gY-&narDEzZ~1$w2i%GR-r5vb4gdmrsB`B^x8 z1k9(X%w(vU_oB1+Z4#b%GJ$rXv+}TiIj{;&on{GSa8(M4x#=aHE#eUC!An6RX(9E2pd7)Msw6+oZx3}>c19E;sdnkHvQ zlm@-Cap%R;{=jU?6f&d3ATu2-j~?<$aUo(iI5Cd7b$(YCHMB3kU!0f560v}@@?CC) z&WRuqg{9O8k1!lfI5a0X^fM+~k-80`TcoeAoAMUpT$}oP%S`h7Tz*PFK-XG zSKe(S(8UPz%+$i?oiGZv7o4q+6-Yq^BBCRmCiYfE)Uc8q(p15ByCc}j72Q2DamTD4 zQe3RK#rMBR5lm&IK;LcqA^3<7_hXdDrvDboMaaeK`ox-c@4KOYigqy&8m5r5qzM z1eTHtdVU1*M2bNt)%ZF35*T-V0ThX0Mz?!yknw9sY3F0*Bf7Ou_hiwhifzuaP9otY z4!`S4Hp#1@#ge`^Lb9vybTs|!Q@grn;Ni;~%T$4BA=0l-orLEKR43&b_FxH z>V={H*~^;2kenB_(Yz#H9V%(Jo1>jORqyX9&WGd*Ta6Oj>rBahoI8U?cn?G!TGee9 zW&^DW)qwR{K1YOEITRDa%027hREEWDzlgP(*DoXMv=*#ygxClBFuFG5i_aw4iW>pv zwfAMXB_NZW#3WKxDM!v%inX7&yk_J~zE*Mu7Iq0ZKN!!WRyT{59#Pn|)gdqBxSu^2 z+@-Ntleh-+@OxgYix%;4v*8+R9Tli&*l`>&o_kcHOl+GB0q6j*yor_7j05CE7ie2k zQ;|fx9gBMt3CzvV2?Hi5*pG&trTU0_ysiO0N;%3#Ks9p_xO^_NhB6xYRaJq-a!a%5 zT?ao&+Ot&Tu@GJzy1f@Q7I;; zXL|R-4E$TIe`{v$3O^hQ$z z>;nRmb1nh=zZXP+RIpgh?hFFhXFbHpMigNB(1JyMy7SoD%T^;`{oC+jsW1BaE5&RZ zu=>yidwL@bZv_=;`{qEu^}}VjetjLX*RFw+@@MGcgy|RRu)TFYL#V+0{%48k_xu0W zA6KJ#*`>rXdTJTEPsAi6{OB4>&8HY;t{I?x$MxTHA$WTp zuk8*Gbl{NY&ar3<#A0UIRVAc_f63S?qRgnh3 z#RYIbuBCxbU{(w-4Q3%Iw7>kE{jU+hEi$TrvhC*@jFJFp8EWQgA@I;CN5hpF^3S8N z@;Ki)@$}HIAL>6>TQamLQi_tkFq!(}SyYhY6`pUu`R2(t-hoA_)A-AzZbS=^ty4qo zVFhApL&8U+w}&2C89& zHq-@~z!!jCUF3Vi57Dw@AfKgdZ90*3; z;|5lRCqKZ7PY0iR7!}ZLRd6=jbTdkx{8*G?mYxCBGVDfHoY3{VD_73CZB$#*zBclB zn~mSEBxJ?=QIue(ZTdI9&<{27R~({D?atnUp0r@bVfQt<3wMcIV^~aV^>@8O-@qT; zG{#k!OEvmnU%If}?j#gpTbv9CTa&rbwa1Pd>v=Y%B6DedkHKp-HyZp@Y?X_~600=vH^7tIR2(GT$=kek3%$HBqmrLXO|9ji( zWPoEcWixu?(&Ht@-ha0~|F!pbCW#TNHH(%7%Ph;iMfWa;_6i4!hmD$qSIUGbiN4)X z&c2zJ-+4p5d0Q%)G>W3kc;DmmLVDEsMO>Uvi6w|S4ywt?Wb^hG14t+}X}plw7j`5I zJ?*XWD7nfY6)*>;XRbbZy!k*C*WQUe=r0kJ(QRM$*zWhZ98$Q3t4UudMoZY)(u?Ij zpGQ+(+p(vXt;!FdNSetXO#v?YFn2ceXU&Xl!L$_YEeD@;i~x9xKEXj`M}K27y*YMz zo#!BztuEFnJn~0>`0=M+^J(dn=Vbd965V^gy4l}k`Hnt}iD)o`#I|2c#VJhO2h%Cu zNv~(h!h~sdd5dR4hR=sfD=&vz+iTmywe{r{RDQzPVWqVI$pZAU^~#&&TeK#kb!B_F z`ufe=wc+bG&nW?N4fx;GeE82B!QXg(!)C+Pn>M`Jz*=Qi;&Pz4kq>z0Ql-%#f!;D& z<7eOR)>rJv?*9^{<3EN@k9g2=SqA3WA81n3ZbgS>B-~RcKQkDy4ZUTa@!e0?;hT7G zMg<%{dV~v?)5Su&Rh#fS^(2&;(}Fp_wF?(|s9PglGKA}Rc8$69?!`LQ=beMX&LiM< z4ulks}+1?13(l z{ov{LQ3oJRu)1Z~11rA4oZ}9n<=X6>*Dyn`$J1*b9&1j;kNy^T&4T?A(H|F3EYK0} z8vS@h=(7v19MTDOZ#a=4zTNw&=K{cro&)DO<3CVkpZVCoHvh5Mdr39K)#e%u>MGaU ztJhrPjr_~KCy#+{gAX5sebV)L3=Dcwc{fIe|ov#?uH|*@q6xueWSK z@6@5SSji&B^?9mSPm`YLFV&rDw`qTSBr(=yrJjGP$RJLM9aYc8_^Brc*5pY-Cn;WYx82J1Yh%JZ+M=MUD7C=6~S zy!SvNP|A8fG^^p%MQfyHR1B4Q%%B`@VqJdVb%q_5iqc499yL4ay@8bq z{2y483~5-ipZb4{PbO}~-+3|60-6;rpLUZ$)~Q^wm{*tedrO{-=Xho@$*wn+OELw< z7+@D}trs_iTysKaiYfN|jGSBG?|nRuomBg* z{~vdz{{fxZ^Ol{Lvv2lrcAkV*=h>s+UWQhq*#mRg3I3|LIb3@2`pr-|>&q)!3iZg> zGD6wR#Gueq+%(=zZS6oA{$p|V?aCL!da?PBns)lhxbgqB|OCu7rPWTN};G!+oJ{Y(&7UC!O{I|0)&L_&}@M%1%XiFvay87w8iXH*QzZU@Prvw<0& z^_xXS%$TTlhsY0BYDCtW^^NEsPSYpf}9_kru>_v@zg2_4R6HN`aAa? z2VSK+BW99|)!*1A)>YDg4a%Vp9jOr@rDFl!dLztlX8CDdgP}@yE-`Llo0k&Kqod>8 z%)t``40J5>pOx3X>CZ7kOw{kYINu#NdbbQR({tX(-de666iE@4kHe+Kt(9SOo{OZa z=SE>z1Od*3lw3N?mdsKwRVBLqFh*iRwM+p=!mY0|a>&erx(3j!<6GB7tBX3<>dy2T zTFQNPPk&YeZpkx_$#m=N;{528#m(%_D=qv-l8~&a~d2`2o z6&=&xhVHkQ@pMDP-r+AFrbBl0uosxScW)OoSFWrE<;^NZL!gHL`negK|Y?Yl6_ChO0~D zx%Yk8XB+@G)nJjKUQrI@fmJ=iS&LUS9PkzqZ%;^k@AdK9udBu>6SspaH%&5#G|scwt15iHx|#FIOP0V`Ar&&%=OM37|dglfXS zqG?(=EcSbS>%{|Nn4DD_)k#k)3==M0faORzGAnFZ<1d%D9<03FTJBFTc0PVqn${j; z^5>qZE!+d09xd?y1<#mi(43e~*PwKB<1spYeW*fBO?x?NLIXb9>;G9E%Rl!?iMJr; zcC#|w_UE>q-TF-m>8EBM3ow?QGK&a=(1ntbjyuyS!N$A{HnOS~M4kU59btA>-6ZFV zCdZzW6En4{`bI5Qm;62+Rf3nqwyoB+-Wv0A<#yM}!qkBrXq$z<1vxuj4k;Box_K(u z?Lm80mV(9R1l5~a&fvqX(qm4k zU-N~UH8ESdZ7=uPBmqu4)^v^rZRDlq@H9Z++^N=rLc~3A0gTQE$8t0(Xv+8}%_uV8 z?U)8NWlKTv$rnP}VG^=q*eUk%p8^+2ri?tn6DFVTq zl9xH6e8&8_#-Q`sUWM&d5Ks3%`e0W9IDhis$=7kGRLR+yH)@nTvoT!aGMIG;qTbnQ z8GNSm?Pq$dlv!IgcBX%JO2}|uPknJUT!8}lT+~pOHX%Q{9`kBVir#tlGJE1GXunWD z9P6VGTXodMa0L=oHyM*=7DFF9{h#(_5S<`CGJ}20>tld)=1k-EGbNWjP*S6~ z#tHOdSa2HdhKh#--&xA5#jP=xq}y&Kl}PL;!b+Q*h0rh*5BP;+M&8ZY`1}JK&DOU7 zZJV?NsVPJ7TKqvHaFjIJ#MMeiwB!hz;GmjYYcN*Ii=wyz*Kd^!L2-_LH13~JxtgqH zt9c?OTD{iLW}3v$9-M%>r=G*$Lk839!>%^_HO0bmXUkIEb<|m^Zi4xUhJrh>mj2{z zr{HP5@=a??cyC6v*~}j>@5jguE}8O38a3#MgE!42j)WOp+qc%i?m)%&;eV91_2-ni zT0$9X!Hc`dCKO9!NOCz@bcSDwRKYG-OL43I-GXNFX9X*sjBf+WT!Mtyf*>2TLY^sV z5n&~e{m$s41?(AN5E=+aD#j7h`|Sr_#3tvf{2SECwc~1yoTC5+0$-R6h3g; zrFf=ZBM{a1I?WCUTp5|`uBa!)tZ%|&D1fDs^W^~Cln|%rx^Ar02(GeeFDt!%v;2B< z<$3dhDR-(lRpDwysw+Ax`V>YriiH=9IR@1uXtgb1GWz%DzLXjTRB_FJ583ODHdRP$ zZo$>%;Sx9u->m=h*&{baUz}lap=iUw?rzWDK8zVvHo^D-$@&6tR&bGDqg^@rodpjE zZtBUPH9q&+@M!SE;qJ$sv+fdK(`9_y4hLtw-Ls2lubw}8^i%%rasG{x=0Eky%3ebY zMKkht$9~-u3sIa%^rN22nh5G{|HIML_(VvDt=GbPW_K}_1cqwW0^BoK5K`GR4v$+a z((1REiBiQyC0}$n_53a#f8ueTycy#)(`GQ=qng^*M#PyATUuNtwH{P8tS}C##ZFB` zBzS(v(#m&Lv)PnL7ld}Er;`h^Sk6wdK^>LhG7+I%-mOaR%@i&HTeqGA)6HXPvi70- z5q&wHi?px&;>Po>fpU`?<*-4Z)#MgHnyFR`+>fEIfU~mkmnV-bgDe%*E-vr3s7h7O zr-X}|{2x54*ziM_YUY;Bb#IndT&ngwL9++h%(aRx)M#I?S#}Uy$0VUw)2$cd#m3@% zk~9jwq*KuH@$Gw3kn8rHn8JmkkP&YVE>qHABR>RCTDq#w=02stQyrI zww4rNidV1;2yR;9$f8CqWe=0}%hlt3l+BZ+ zTc{Nc$?hRscqGeREOsisX!`Hu!k#oBLE&%r5@6i=4v8aDoH4^8@!KcFwR-@!j(k;e zpni9^2v+A8u*SEFi(H6a&Ue)}5^`?P)*=)YNZWzIcL}p|AsiQ{=02n_X@oVGOczWL z>`CHc7Y_&VFbTNhQ%$M1w;l@+!@@boZ+h8aVp% zm1BA-+SxGdw;j~{SLE)fhvXR4+Ih%xN|vD-!ES?&?^tSoWrG}|M+~;-S*&pWSw8jA%pbuwsH?9cDsmX5IoA6{N)036_}GC{c2+{hY#smWkW+ ztc@ISfy^tFs$CWzbEpe8?crn3OESEHBBv_-7_tZI>Qhyx^Is5eo^P+hY4AFlH+!%7 zVSQt>^+VODzeSAg9w|QtgZsL4ufCQM2qS0#s=S_fA>~yq$LZUzf1nUM(btqpP~iK= zQMAB?%m1JA$Gzv3=dx3>rGET40T3N_lM4E)1?pb*P+5aN~!K6T-r{UlN*?_ zR;AIQ)JtGH%`k7mwbO<@(U7|HKquRr+h!hIORF95{56GH=R>}(S4_veW;dRcsVjT9%$VIrG7h820qZEE z^gUL7>H+SuRywC^0xv8&047A0qW%JR2b$VhI7P%Q_E-yg`4WU+FDbf2-kGU`*M%)t zJy<}`n-{4xENzQqU+KvSQ>Yvd3xJv5+Mk)YzP(33I-P`EZN@~otDieVy-Z;jr`LWt}eh4(|!JD(3S510l+=JtpK=g6R?&is0#dq;Y4l(%vuMeM3E( zQm@?p&5hIffEBv=qW77el0dR(y7!_goBkn^dMt_H5B;|%zhc&22A{8diEtf`PRx!f z%_gydL{PRq!1zXIOs)FbPNiTo&?Vkc_)^Plb`hC4*lKtV++XSSQYh z^0HovL%ZcXR1!!U(85@76*9_TGJfYmlgWur3B_LRr?S0*v&G>3a_TH}Rf8<-&RIRh z0{YyApdt*P`U6pr>zdu6@a!q%6SC*g7e$WEj1o6vLAeO3lNPL}Yp=dfXKxx`+WGsUX9Q!rSo&TOZj zM&|8ByxZ7Zf4TH}d#g2yHIn%!R@8_+@Jz*^qM2&e9WYiV#x5(?PvHasux9zQz*I=yzf-_H8xtW=gnK5~*vM$d@Cyzg0`^PJ~-&U4Ot>L1U3|7MTh?)Q1#r@-qz>UrZ&^SnDhDNj9b#AiJ3 zJa8mkBMg13N@-Zq#+u%s> z*WgU>!r>--Hz?uF;3vSJfzsZ81t)`Nj4<`91ttFs_;K()Q0VtK_%ZM`@B;8VptQFi z{2(ZW%KHz2621VG_m|k`*Mesfo?~&b#V=Uww)hBmI`MXcL%^3ny3RXn@jKv9!aufn z)Z#m!)c4;&y2v{NB0?%}JScR%9XuCo0U^D&3j8$qEOh(pCrg^(TDfhpC zGLAmVe>Z_OAXV@-fHDr=0?ESrd+-YIbpD$TP6BTL*MnDs-vuS#4^Wu&-&j!SJO`9~ zmVnZ~t3jdP0q|z<=b+GU0>qbcx|D`&+h~&(pwJ7_&s35 z-vxcb@1s&u-X$PS^rnG}!Fz1@Cm>DoPKW4H?nF?^?F6MhPlFS|eo*@9G6u8s>jF^t z>0S_)_O^l2?r(x*>AeH;&l`bIkmn7c)Ndmw`SgNPpC5ylfFGd~1V@8X{yb3lW+gZc zJYexR;EjYQKs>46y`bdtO;G6YTac!Em%|iNegg<;y&a&??}wn2|9(16${7txzbpc! zzrSq5Ujv2i-v!Ci`z0v#sJhYQzZ6vd0)-ww0_h^}T~O+EC4)lhaSuq5-ix5n;aA`c z@Y4|WBCr{R1l|J{zX?kH{s4X&ylj%me>!+J;V*!&ytfJzy1xQm2>uk5ar!PO^}3Ww zNPTC4be*>u6gqq#6gqrhijiMef)c&~JOfOFQlGEb@SEVr2!99sIQUbGzXm@=cnE`8 z+I1=T8E_tW0k{+tdTs)xU%n0w0e=f#0!ro10X_o`1FJzPzYdgg()Rr-@Dqfe044ty zEdB_T{`);B{5G7yDEzw^gv8z^P|E)ycsuwf5WNmu1WNl3gCoJ;gHrxyK4;3E4pvA! zP}hoLhJn)k@nei|ll={yGKLR#@r-SXF^ygQ=kAhEvLihdP z<={_1X~&0Vn)coZO26I$3ca$R)ax-&_~32uEbs@Q)ISGGegAZpNnZiV`)k27!CBxC z@bloGf=fW5{}(`M&uUQ0c?A40_$ny;`3+Fo^D|KB^*d1NeerD5&o_fI&RRjK-#&}q z1BEWX2Blv)r{22kj^++r`t(DIIgB8P^}HT-fLDC1@WDDl4w$~ZsmW+Sh!1SNh4 zDD~b03LX9ulzRRPDD6CNp6Qp1!OI9=2VM#`gXe+|f@gz!z_Y;DLCNPkptS#&;KksX z^Nn5|2aYB@6O{O00;T>Bf@gx?10~&0L80#-!1KX#YEAiLKq+@2D14m(g>GxWv%!O) z^y4=y{uG48y#KH`ZGj1I0%2Y6A3&l1@LLRD*Mkz?0bT|E7?k>+d8-*OH-eK1w}Fk| zOCUqiJMT8bZ*`#X^}XQL;M3q|!JmNAu8%R8q}}5!P64kYd@DE(d=#t#zXe_a{uUe# zUVewkXFga-cpWHw|GLFIDExWWLW388!j~1G^zRr@0Oq>0{*iwr&nO1*vwUISKq-h}HwY3HNhmEd=6__R9Ho@!9qmjZooJ4n&q zVem%q{KbZDcYv_GcP}XI{3{UF_Wm9GD0oxC^z-fDMTA>G;kWgmwDSe92K*uTY4DtS zqX(}5&mf!tg^#}g`rvj@;vEJ*0{#U27e%}(q55qtS&jQZ{ z+d;{1HFzEPIyeISEqFS3QOfj76*!jgz2Jr5^Weqc_igxBpu|7(F4IpJftM1V3|4@5 zgVOGYL22hsQ0RFGoC5v|q^jO$?>2n01H6FnPeEzdzk@e`*R+^=t^kGqUInw@FKoEJ z6`PFkW1y7t(KdsZg7XO90A2=e0;S&%gVGOw4a)dGZo}uN?Rc^{AN(NimxAYmU$)_` zpwMH7eSX;D-&*{Y#SgcebQKnF08b~~?cfk_2`KdGu(%Q&O87yG+br$|&*1q%Q0Q?4 zl=1loa140O7fk=%1p}dSZi@3xRmg>!4+T)oe2wj zZ-P_7i+TAua0z$|_!3ChdPA3)c+0_2g#Qt|3jFYLBX1^xvk311*MPqOSA$C_ybD$udfp1oCj2FEA^05-mh*;pnde);MTGODnK$-;lX(7pP|E+< zI>R5=gYtYO_&M;;EuOL7=%qWr&+z<3@EY)Mz*_Lk4W>Owi#tH!zrO_~zfaNW6y+_p z_;YXp;iVhV5#V=0Y5(;PnRadmCH+sq>EN)3O?_HH;fq7yb>NUqru?bkMTDOKh0bq+ zqru;UW5AJ*7`yroQ2O-^Q0V*dM@>5#L80>w@MiEIK&j8@&Cn3s04BhH0ww=RTd;}1 zF7Qh5H((09d@ExG+zbl+-vuuRr$1)s+X;>({3_zXR*R zPdskwvm6wD{u@x}aP||%ery1z5pDsce_jS>gMVkk!?zpxb`y9y&u_Q51eE$O1MdV6 zfY*UTpEP=78h8WYR#4h=06ZJ~9VmP=bcfNySAy3Nz6HDxd zc-Brs@5$g)!aZOO_-*h8@FTlS`(}dDjweA#<^2NO4c_;Zkpq`KZTRFNu#)FL0;|D4 zdB)K3dhlYxUjn7ScYx=C{{jvLKSX8|z_US#Hy4z4b%4XbC++iZ*zi%Xg6BiNYUnu{ zypiw(a58u=I0gJBcrG|(kKw#=S;sX0)@`o!E3?41ts5)?Kg5@F(~i1fj5Cav|;~i=KVr& z2G1Y0;eP~$@6J77?A%&#A>lRP5HJr4eck~j-*b9RyKV+ABfJw7`g|J{`n>~A1kXBX z`nML8{5OF@pYMZrfFFF`v_Anh6J80P4;}+A2Tyy!@OKp``Og7w2Rp&B;P=2!f!>Rz zUY`b~{M$gO*FE5P@T;KY|6}kru;wL$kAt@o{$Jn%@TQjyJ_Ys={+-1yzGB+*2T<5O*>~=Yyzd9R$BZnD13b0 z8>W7r2WJz06`Tit;7vpS+dxUT$KwA4rN6F!%iwfyDB*da&|?vp09S)m;Qs(&LGS#- z&>ZZ+W&0i>~ipIp7(;);MeW*{{W?&aery(mIcox{1s5j+X|i!K5w6Y z8@zz<&%j0CyP)*Lo!>U~*aub+{%cUi&A);l0WbQF;h#~U$h{Oe1>6gM5d3FQ>i27K z4EUk%8u@)SID+tE@RQ&gP|Dv83SaygI1W7Hugtif2u>!v9-I#T0Gtbc@_R-O-wnQx z@KmlQx#9O)uEpG6%JnbYpCb?X-Dls+eCodt9$~}sZYcNPkQ;v6?epmt={oOgT*6Q8 zm*L&d2;9f@W&3cAjsHIhf0*k^!Z&e=T)v;Hjq6?;XAk#h*!xWud8EI`Z1`S6kR$jp zB)mQ@>CbbCa~0P=1#h7d;eRHax6j^3_+jq%b3Mc*eEk&9U=f`&Bf3;ZFXfs1Hd>T> zx>?7Y@X9}Ojg@zi_h%CHx!mu+bMtYo9rnShNL+bzVI=&FjU#J;wcLxml3ywkXF2yB zJUhlUiR)^@7jq$wyw7t9FEHf22YDvr_i1n>cqS;nPlMOm`|H5}%Ci=(`?;^S&uhU- zo_z@14K{%DxfXEAuL69>-0GM}6aE9?X7Kx9Hz>Sc2VTG>zaMhd=$-km7kDrdcDFy} z=5t)naXruVEY~l&$Y@43|< zqTV~q^&u1V{tldN?-9e^HsYVhbq)9Hx#rsRW4QlwuC-k9Lo|4|@@}4nuvxjEW8+@S zGgO#YL-;zd)5Z~)$Fsiyhk=iQ8Lm5Rx)-_6a(#~Q`?;2L|2o%ITssIq%C(*QiQo*b z>$#%8a|rL{!6(800EckR<+`2l2Cmb&-X?qt*Z|7!S6o}TrtoY9_%JBHLtJ0wY9qXk zYYbN-*SkD>g6ndwI|z&ZSi&`f>l(uC;CWmh*SYTI+RF6+m;8=%E#g`w0e+*nI&FUI zxF5-VtGuwkpM#URE_DyUguPD?_a*NC7gsmeB*JHN-N5~yfbzS`;${<6{oQV#jpkXB z`_s4{u+RRTXE$Y zWql%(^!16~nQrh$w4@V_QlHU@hR$rFWu$pG+NJ48wh*i0ibg-()Rakfa=YALSaC(m z@=0JLz*VGb!JAAgRj3SZH(eb{UHRFTMxNKMXr~}8xMZ}JMwfnSsw2}G zrVn4tq(UvFUYNY4O(yGPTekIDzn~srKAFyrY(wV&5wdNxtmOMiOA;MWJK2%Sbfy|I z{+Q(z^!CunE7}sRsRn<(AxbrmN-|DmrSCXEiCodrNYts>HbcwCWTv4b)!v!z@Rj&b zJJIQPE=l^C&IDYTFkA>x$Iy$UoSpXRjmAW0!ngf#v0o~;wsfc8m=q>ztRmT5GD}JC zEv#r zU!S%85#jzssx8&l?58@ZV-{W)V%I1ArgXMVdN-O`%2av~#YSVEQn9xrJ2Emp=OvqH zOj|=TBYowbHYS^>wT^Cmoazt>;>4UV7-Gzyv?SYhx1UMfgV>>ABa}WP{n^>pdZb#q z$!|(6&$egeC3!EjtUWp^(5xWib$fe5eHzj%ag5``yI;trI^goAj&v)1Kvn$frqoQF z;V-qd&$e~Iw#{v+OtSHM&!5(kO+w{H1_Vi^RUQp&W-wA81T-Tj>9?j@T2c}z@-CBD z8hf#D;*_fwdH%wwb8Gx2;6b83<1Az_CBX?-UE%Jepz-6Pq43@8@Wq_St&5OJw`4n$ zetSBj93Xip4KjXvA_Jj)281C>hox<%WE{~7%}RLF0~%{dBIBbEI#!TB5hS5%k7enO zyJeUp+hoi&7CmojNi^%wQNB#HNRJmqlA)E!w#&#b@iz9RExF9MebJWog_Nj3$x!kb zKdwI2*$RuugEXvdV>*&RfyQKelK)H#ROKOMMfoR}CmXVQD~U7drp{#vxNhoP6O@`+ z9p#6yR2gRcCBlXYzs^UOGIk_|?O=b#{2CL?Xyb~qSUPqLf~(PAYC6=w($+-vkRd}R z(oJn{@QMmV^+kiezo2ayP4Z{7HKm7opSf;E+fpdp=qEcm&^0nvuJROb>Q+R{`yoAJ~2cOie{soTv}T6(5s9 zgjz*Q7D3`fCJfn@TrT3Jt<#@By|!-t?XzlYCf3cLK6~k5$UclHjUFiSoVJz~e$C{`KD{)5 z!9-|kY#$T@3Xkqfw6vs`QLJ=h&CCUUb4NPc9;ts}>GSGp=FO_3$hw(R=&49UWmvT* zJ6cnnG5}!545kuyrmqSbq3HtJEUw557rG51l3~~i;le0UL`@*omg)d4-2t|nrL2Jx zM_S~%t}vyH5r(`d{c0MD>T$A7Xkg`A6{cvD8nWqzhHQswVA?pb+J}HXc5DkaykENn zuG8xLk(p{nLADg}USyi+XbrOLe6MP%83ox=#CuWGqD-MaawU_(L=`4YwW;pW!Btsl z^+Y9tzfz3}+h^2dlpCIYMNKuzH^NpC&Jb(Sj_WvcRQpxUs-o&M$>vrO8p-7i$z)^3 zzv_yc{1L{IY8**H)jk%8pK47sCy{3|OpQcl;MAv@D^Wcu%v4cPRVH?#F*@4BD(YaE zsXdu>KHwRQr<>ZNh|0kkCj?5umg{Kr1|%nsj!gn0jD_n{IZ|3kg_(9WGUK z?_I?Vb=&+zRXW>Qm1s=M{DgjoZuCgOQTg>Tu~z$quQ6a)Jd9YEI~Ul%7$;%%p-AQa(OT$8_bYwpaOJYrZZb_?PJ^a zaMH+>41JmHY-f_`2x%iVrrU;h`Z5*pmvAvU?GT@XrO=*iNHyVoaA}kp3$aJ8#=?}E zmrX6|A16<;ag?8EZ)et|hT9*LBO^|FL5An4SF3zOvZj(U|1&NV=^bd1i5Q{ME!u3g zSf#rfOC~dMT3V9LFiG)95{H0wxI{!3b4!hHhk|ysaEqo7`aEUrYcUz8&6~4euIX}9 zqJ1Y~NX<J0h1aWY|2|Gp_K}%gy z?I59D;FM8a z(JETPDW-^qpnI%$N1SFlJ-`;hCepTbrqiPA(5hx28>OqSvg#p_=BYpwd%0QsJ|gaw zO{F5GV%APyFl*w8<2nZe77P4iEF}6o(aFrRgk2FkHP7mLP- z0ue%mal?E{y)BnhahaM=F#nr0XV&DJS|{j~MH|!9Rrno$V#AW4-&r9rJRHwpN^5&3 zHmP08A+`}1&eFvXB6g3;2Ju2Lb4Od+$_W)IVl3%=CZa#Yc`EK^89>4KERimncY)q^RfyNKq{0<%G!2VX!f;?v;6SN# zNEF16w{|QIvIJbsKBb^lDZ~VbCPvS8ar&mmq9zxW5!^W^&&~#gwGv+dz$4-mO5M} z>XL&iGbMAXPfFx?J^>l^vAj?ClWXg0r`%SHaFCn})V!3BPL@lXpsgx-$b>S`U)VCM5KisD>Q$Z^O@O*I!k4=&@oss5t8dz z)rsJ;jx-H)EHB8#DegF?5WQOgCm5gfJ$WnGa~XkOyQ|Po;va7mI2X z+R6OR%^Fo4nvprkFJLtN#3hj)YRC{G{$%gjWox- zmWC{CmF89Gdv~=A(uR?W(w9u@X5lur>+UL%#L2+9pv45j#A`6t#>i|`hn3cmrX7}rKC!sMzeuN;4+ zVX}ej32Gg;;UfJhGk3GDtp%3W>Au<<%rM7{TW+F>eh$|Gl658QCA<<(D7I@cq z@o{ctTS#UjX+Cb<5A6hdk3i0kWcErVA%)earm~S3nlcb9!oGvl$0m0>`!Z@q zdnw~xW=VRPXPkVF8>m^T6(3cKi8Pa?M3XE=R<*YT!_yl-u9Ed88j@u#W0X&rV8(A& zPdj>(MWKlNP=~QGMIl#mIoXNMw`_CO74f{P{nqj0IvD(cyCmb8XX8peTpoXT-Gayh zt6A~Us-f7f_i8#CmPp;~d`W4-tSifGH__ITsuwP0hK&0%8N`hbKHo?{D}*Lao$SNa zvc|~%12Gm*uRN*7#B%|zbnTP`iFKaf* zU2KPoKbckN26ekFtkRxXXWYWfRGee2sf=OB`ef&_B+@%r81p74 z>$A;arZ#M~i?IZT@~{P+UtECQ10wW^6bqv^`BP-M4$m>|NYvLej;sZSddyaNlcRAa z>2y>lP|(e)pu#x8b_I-79F;Qa@FEBX7W2shvS=<~s__S5t6kWr&9uKpviY-Ej z{3_WQqLO*2rwpm|kufTgw<2R6$|e96(QH0x6hFLp1tpT!M`E!s(yme<;BtRqmG1dj z#7o`W6Md7^-9RH?08AxTE|XBxUnUFCGEP&SBZE{^RfDlCuA6ymR`YJD@ut?yn2Gxt z)=_>B6w&kcx^)tD@6&aoGwjKVp#d4-IL2|LY5yc}d;VzBG1 zO`WZt)Q~#JYDw@jv>k^#ermb{b`g$~N>7_BRVz{wp?8c3QXk#X!(63Ie6=s@&^Yn9 zlV{A={M~YOBbx#wh7yR4W%$vdE;rHfo$;o%;2Cr($;=zryJKZpe6M8ChwgRoz+c$T zJ~URpn*6Gi^zI_hiHh19R?2H*>&t3!7>~b;Ro{eTUzY}ggn>}77@Sm|@lU%+ek!7bqqo@0y zNHN5loi>V0Zis|)(4;ZLG9!mFg4xODZy#4E2I{>IP$FQ{E14w_!YKi|Nv$UW~^Qy3u3Bv09R%^&zrs=vBdv zVqkhXuWstRTk7C9wl&DaO!!|{Ll9hI;h4qhh<+PO_dh$tl;8;s&T>ypGr%YWrF{T*oaV-tSDcvez-u+V0H@ z*R5sXY7ei#DaFQsmZWSzNHXl_iGyD<%C@Q6aFRv6mFO+acepGV%)_nF!CHXaq_Z6j z$xs}koI5fd4U4?_lWUB!G!8$bSa?`Bv1b01I<0}zMY8FMv4IE0O|R9sj;+jK3e2}N zsls&`o@a6Gt_UmP&6h<*G*6&Jy!o98_Gr3^w@ipxx^MIAP!4rVTQha-*~}6f2}8lI z<-{VS+r9Z_)`z7WQIG1`Gdo;|Mq(g9S`rP&hWZs)JHeYa-R7ajrZcy(R8q|MgZZm2 zi;)vb!fve5S&ke@0I>%h7NV+D%QR1?+XR9>mrJQ@_B&>xJg@ocU8nk7eCN zw*HB!8Md`Hcm}$+nbSB!87?&+8P9iI*P^=m!o0Voz zvO$B&N!%0dD}-3mfE04ZkSbOu?^d%lWE74NC7I(BH)9Jo*d)SypuCt^HZ7BhiQ(X} zJxaOZhPzQ_E+ET~CT1+DO(D`|fFv^FqsiDqg+0ht2z5I!)H`K1AdAJ}&enK*$Jx4Z z-TFUbJ9dKhOu_^)`$yofXswLrMVe1LSn9;=z~+ti#IS6)Drik^wrpbSvXC$92<}~=NU4-j&>6r zStkN2$sS$bxxYgpty)=J9hE8%ZO3@gMD}wJhJM+2);Tgyw|vc*J$c5wDU)iA_%&)P zt6l&!t)0}+Os2t7FS8ZNa40HX{Nc=jZNJymHFVaudxMUhJc+o?#BI+`m_BLj*hTJ+ zFDuNm`D3|t)LI(T9k_;+x+2p&RpoJ!g|X!aUy(#iYn=7!!-&YOFg2OF0Sld(heHb4 zDr$TZkz$Bwx4-CEPSh8C*1_9GoXxHzt5gv%BrNrvL;0*r#U3d4qN!Rt1M;IP#gHd8(cn0_R7&|^ z>ZFUqDo#%E*{{Oz4`pQ{#GtcALa8c7GAu4FQkAf@ zxScR*?gHc6k^RY8R%bC}a2J(}t~$v^73Zj!(j;jZUC~f33GEikblx@52-XWE6Q`v( zR?;1n!LCcUn?n5NC|^8NVwqY;Ec%4mi}1Y80Z}V0tRkk`O61*%t8%yuP?=sLI*LEb ziN=U#;OwG8+PFCL%?#68OmvPkBlh*56suocs*_LpuS67=T~j+=Tq7j|TZ1MSuFY7k zMy|F)jCSS%?8*(bpqWL8)G6?bjS$!9igZ?rU~2|jAX%%vVWhVt)yP+3Zgno$a;iB( zv!R|0TwTDkB{z!g!e=&k$YnWafcIgoiXx#rg&SCh!yYT0PbQn8hWfo!n2~87yrkw* zyop7H*!9jb`IlK4E~t!A-=5kXZMr#s8otU*J2PmVUyIUj@#Ps~R6b46sF+^u%xu}Y zj9YjDHYIDn?d{3N2{Jv9yn+bHwxuj1b;y_&t9YmvrHn`SE|vZ@tI@I-c6q61)g>SL z#ZQ+@%(VRm!8R>I+{lMx)@+e#S#OAs#Fr6gT((}AEE8~PxPWfAfnf_E0kv)Jt49*z z)!7dn@bpAHK%Q)FWYVpJzY*!=k6&{ z@3|B?;T6OxwcpalYhZ;Jd7{Rvc%G0(2&iC(m~7TCn_$%OLdLpL(xK(JA`VmTB~m!M z52@%G!!nqYveco=iy3d})mQTAr1;RR#MLL(7w;aSYRm^+LR7<)whMK}VO>+sC=O!> zYpW`nLUS;P!Avm87C)KNnN3K(xS^mjLoiZ;7bFOqgjfnbL`+0>S6Jo0Hfb^`Iu{nH#3pxtgJ-k!)`}JJU{kfjEay?seJ^LdkoRp8^4jRcnv?0G{L$2q^T=(u=&r7-PBhjq% zw3PfC8~ZjtU+`ECKPgT-+QePtM`H&Eq2#(>(n?b2ZF1B7`YD}=lIwmh*Rwg-{bsJG zC)cyOj!v}rq3r#O3BiqKGqxwXWRDFrE7f`e1~wy(^uev%@~ z#>l_0vTx1G@~?NSlNOgcMx|^TvtZ;7ODP*IcBD#)SotU3=-a+V_7}*xCi!)n`yXFb zKubBO;sk8Vu3F!*TEHH9IK}ZTPs4!6_C0p&$n*IF59PWJ9^bMqzjs}XySw%uJuJPM z>)M*@+LP;AmFs#t*R>6r*z;D9&Fal8s9COSeXgrJ*S%KbKauNxh`KIz_+e`vq!6L=67i4SQ;@}70MuHCt=hjZO)N_Hcq zQddTPth&l0>+DyqG4ZDTFLkvN6j3UYc=fTT_7$`ztg6)Zy{T%h=OGoPhm6e1Z|v^B zZ?CXQ;fvnK``><6UL1Y1w@(Cps61qh$i|>tPgkzz8IgP<1z(Z&biW~Aez|R)xU}@l z7$}opxsEX@FUfMD8MmX06+&DS5Y?R|6J={TSqkQ$v(}LFu{~XVFLYB=dz?%`Lqr%q zx8c}<$CU0Hf?>!BGdgAv@MspRX!5JK@>n$FAyJauNAhn!o4*gOu`}26To5ZB<>-+o z^Wz)Bnn=`Gap8=`3`Lww@so3r4yM8PRv>saz;*k?T84rQiIrnkQi= zmra@L-Y4AMvs!vTFnI`eZ|Yl*40$H1Iix7&Qlrgh&H0B9AANIo{}YFfzOgC4`q} zWvt2Dz#7YMJb0|P_BJ5&*Dh(?kaM-Of2d+fnn*K_V%pT6zL3QCqtqmgZn za=K5hYi+K3b*}5Bl4txBn=4`w^uN-5^o{$Yg4oyz_Pn3Ip8N8Uu^J z6BjX<8OvK#!ov{w*7^KFI*LbmKxE-SH}51I!5vDwNINFrf-)B@<)8flMV zU8(|=4(gdo%KAGcBu6V5;jTP=*{5-qQm`4#b9j>^*iEEHZAGo_jTZSj%z_MT${>amAIx3JPWd z-1ov8&gN1Et+-;?iMXa9*AwO$G%vz~a=Ma#?7*JFGl&pZz08rfT+{so(ykjzer8~Z&yUTw}sV+S|F!d z5#$}67Bz5$-DJx8-q7X$H^Q8#pCD_A!>Yv4RGX18ZNxSlug0j(xr}yYa@e&`V(#94 zY~O=Ux^K*N?GmZfwaTkt{K6z}Mx9l@jOU_Z%m|IkkK$n*3^~7IJmWbSc=k9fH5AdV z6ozPhO06jr?0P*Ei%K4Qm3cA`LjB{9kTiDg7&$LXr^jS~<#I@bzA+NXwc8lwI9Q&^ z$*dH6&6$+bo54uK73ThJ0J15d#uynd!coI$@7772LgD zC2yhiK!2BUim9>D+yCqv$G6Zm>#>yc8@lqV=_z3q2v#|pZrOD7P22?!3zy2o&x|!g z-6P7nA&s@^L7k-Hx+@umMPsOa2CKjVkL0?UI1Dg}a^h7pjGQV~G?aP+wNyYg+7li) zR`gB`iAdK;aavR`d&wWU@A$6OW>LO`G4jF=tYgMNbi{{goo}2z4&(4OKSM8i4w-V3 zbFAZmbu*`e+8R!Y)K*5H9A1VX<4)yH)Tmr6rbU6^iuruR{=gsHcmJ#STGi-ha?NVO zxM8vOIAvW>9qCo;-z#^_SwRYEr}G(%@4<9W z>0Z!Ae=!}w8l;gNPGCkPYQ$qGVqzSIBg_+%AD(4Wj};M-G2+nEsbA>Tk*<~TZY5|;N^2h>U-D}iEYKue>Csdu z3F{ih5lN{KO9qun5@;urNH3%~{0eCUUq!%fM*b^-Pn^L(V_HPo0St%d0-X?uL>yxDl3joe7dE0|&h&5~ zOm$766swEk(qdrP&@yqV^*Qwgn6v1dwWKagRdQB}2K6f>k~Ql>?Hgn({H4lJ1g8#9 zDc&Dp1|aLI!|VxmL5iS|fC!Sp)}Vyc4iW}3K{XNjJy^UQH_V)L$2>F})kQ_ksNpRl zEi`?MgDfr{WW*}b`?@fxFmE=R^X^nASR+7uS#eX%*y6YY(CswnpgA3{z#&tr-$J4W zlrfx#lwxhy=r@t81==i#EtD6dyR6f|NV2|dc)h6QLFZqgmND~F&(DiCat}q6Y9w+u zG4VBe$TdDMEI%aG+0*~hS`0IWq^gyY_P_u+82fHed6eL0^{_?+icU-W*S^|!A4UUf zPQj{CZ0wh6yI+vi(YFre-+E;bSy{6%6tVIrhlXVqS(`90?|F=+&Dw5}KDLrBDh$ko zJxCkKlmZn3MNFL0qQna)_QFc#QVwLy>OhUI7RNHuMUipC_yY-X`Q>~J#q}^|Yb+CO zhb)j8Rj55X_=F<-Pd1@bF{RIDEJeN&)h?NdJF+pdMy6Be*cut!=+uyzL%Vs4>Vq6p zCAVg0bXIi54TC^tB9Y0S&ZZ@wz9*RDY&iBd{#Q(3hPLU2NL5NC{v)bVqG2+zAD}93 zerL~(jJCo~=a`bmhXgw!+^hYvhW8K#J|#p2m&+9=h8Q4h{ZXftSqCjpZLn!c9|?*) zSQYDAwK4z1OIi$ygy+VnK@hI9M^CyEqv|m-^@z#QKpYp;#LN;Swr-&FUG4>xAR{#@ zdac1A+c*x;)zabJti6{aiB$!mP-IQmESd$jU&OjMOdc?ft4Ab83B?+#Q#g}Y8{t5g zQDDqQJKovKYQ(G$>PI7$`GX}0!^|!#XYMn<3$)i%fZHO2xxA)f9lDco*AwBXl@0EX+|lABnn#^VIr(=J*yKGwerSlHe6`yV}e_}2jZxO9wLFI07)>SqGqI3 zc)_X}<6Ww@k4S_6M6Sp}3UOk!9&gjHp{-0HwRpP+#fx#Qw4d{)ocYhHPzFgsv(2jBO6Qr3heUe zkq5y+p3)-muHc?3*kTfTlhB$%)K!JfV+xid6@r3w+rp?=ud7HBmAzl1#%IJ)%fs-b zPC4)sA!c4wXW44mGAZ9gg{7zgfD8G!EU+-!FA@}T{-OJHAl?yUr{Y$A%_(n!`X#q=;x&v-3=uw@~d^sm<_sY9D@U zjT6onwbpuGs4+fHA@#}EFO+kpa>jFCAbMm#m#wkc!FN&)KPV}ClFT8Z#e0g3P_?g1 z5Syu`bCJkM3ulmc-ebZ^DLQZ|VLkrng4_=4B6ea#xHC`-30q=*4sjxSD5mwrY*}pP zVa7NmZlGe|bZr9C>LHa`o2}6jVdBzqq04M=#|FAzmZKxO52;sVOHigxWSIV}F?Zqw z4u3y`Vb{BRR_9l4=zsC;{2P0sdl&U!*&vFXF3U2}@s-a63;|uyBFB5stYN#v zb0iy4_ZJ%{9%s!4`IRfuodra!` z;vL*?x*Y0ux7S+paV81)2maMJZ7U=?Chu%xittIVrny}Pfz=*j1jy8jBjs2%O+(+p)UO={_YsOHI1_a%DGO-9}+k=fd5K&EI$6 zX~)%KA=hYVh!cInpm<20rVTSWQ1ANIMOJOBOu4E>PpeHB3`NArA zvDXpaMbERx|9IDZ`8QuxGaMn}ti|G7!jFH7-)eMxbiD)%<(yo~^8mggGvi7*$ zND@&r@tHfUTGIaq!xksE$M3ogowAToCbjgOutv#joH_iQTQh!Cy(79qVE5j>M>fbL zK=$QI_Yar@N`<+~L0y7G-O9Yj9NQakPiZ=+VrS;!mS@Z{zO=?DUC6@@uLw&aP-Dn#ko zdeBXGKZW+7(W!;nG$JyIP|TU`aOdJTuyx9OGs~B(J^R?fvd9Z`l1P?&VQe`#K={FeZZ8l%Tg#Q^5&tzWWeXmaRtsiU9+x#k$U zH)b8`R##LFlT=ykV7&J2*seMimBM%x#p0RI9p!xKAx3~1(Ni>&HLiK1Ds3sTK~bC_ zVkf~<1tzm+_b}=A8~Gzt%Y2j*o57b#_Ry;SeJlp_%2$gkcVm5(@I=ICg_27kQ$++J znOUDfDiqe4W2*~4-gYNf+v>)fZ2ev`esRGfQlZ^*f!m6`i!A@D@dKs9F;5|8|JEQg zvu9kxc$>;+X&vmiJYqk01h#qYKIrb-zCZu`+a}`RKIo35w>(|M#E~e@3O!P+^;B1w zy~1po-h}?=lL%$S*tCdYS9~ru9cGTgc9x~AM#aC>(TQrodD`~0W0$(c38t=rlSj|U zmb7{*_TWkml5+mEBsFJapJZANc(!RdAzR0*7{ij69F%<$nQ`DVXJ?xxq)sy7sW!kI zqaD=u6zd;9Q`@wFZ87>4E4Ic!y&oQ|Z7ac9DkqchJ)k~S2+!I!l|NAxN(okE`pbP= zp6}cGRnhX|cw<%0tT@VKR;@6E`8F?5Vb1G`c;m$`aXmc42M*X5QQJd?3eqzogwT8A zWG|0;l_iw!dZmK4jp*376)N4luX~RKVcHjdi_c-LAYbs z3oLCvIFFqUDYO0%pU??A1$DE6Vt^Q8`kUnq5v$ugb8>qmgF&oe;DW$14J0r-2ZKZ0 z{rpBOotMlp?$X)fuRUVSCY^}ghhtK|=0{Xv;vUhlvr#RkeJXjVm018q*hkCh-ek&Q z)bA^k{h?rELOfS=M3AfW>Hrz**>XkoKDCT7WK4GNafR8vx%&b2F0xBiNbeU`7-h9# zmwehBTMI=h#mQinV%Qp7=4_$vS3(z}Surxhg)?O~IPYfR^kS&z7I@6*1hQMR{D;6I z>s|@n$s$-HLQ+=Z*%q};jODONz4EUZH{9kf*^ zPCYpmV?-?J1hi+D+oQ9-fB&m)%b6iSK{MQ*OFYDScx&;5Fkkqcm@D6G&()m`3^-Y} zF%qnI;I5&TGUt;Cj4o4P+yqM|+k#F$QSVBR8nX(=@%<3AZ!5X%=UXa0sv@Fjh1|NN zb9DEXWokeu3O~GHY-CwSDT%dd?q#tB_U97k9zYtcptKxbNf&+?$9^{g6r) zw=rTPdmvSkI(nPq_@nEo$Tg&1!9r>{P@)I)YrmRpm$Jl#MUB%%4*@ZxvSvjTc<*otve&x$9XBiW)iax7DY+ zqKX^NF=Voqk#r85w~VRpO5MpBn4B}~2d00Nvg+zp;<`T!5UiB;>0v^VKM+v-M*mQN z>lGN4<`;hGCr=0UnO|Uc7X00S$SDL{)nqc$emo_sRYI2XnU>2-)L%Dt6lSaW%9tUu zH&Q@BHw9Cqt|R&9yTyQw8c;8>^wnkNttE5M|r8=dC+;C;EyHPevMj4*i$G|T`7Z={4vyA$4)RK zU|mHPiVuc=FTr{XN^i~>tVZyJseRiC^>O26r?;E$X1SJM80KD z;&V9;vVJGb=Y)hStl1!2T&8~f9ShuM#&=qV83JY+K%%K4EM}VEk8`|7CD^}JV1=@r zH~AiATvYX3&qj68;G5c$>&8?pJdY1%D=FFwsihuHW(N4VPA;PoW6=H)ktkzxoPd~3 zVzjcKirpCOx^T0+B61W}LgppUQ%0lt(<)M< zqDKRsL0C|P*>8%eP`(d~t*&rcpy?aD&e36*}M<-Krai_VDBdpvo z{(y2xy+{M}kGIgZ&KP5_nAn3S-Z&Vl&yuUb&diY2Z3q+`ff*R_ItLZg&mWFLUyBL7`^4?qso<@&zQ4 z^{;}a1q>NfrZ|osiyC#aMK;8^CIqRXf1a{=u zXo}lQj1)Uw5m?S6tbcAMh{W=l{?VD>K|EFersvrfYrMe>1?TQ5Adc|QP%r45;P1+a zBvelp3-!@IO;hkZ{PQ%0FTy`j6MMs-so@0bV+US40k6v7jc?Xa4%l02vB|i~!Y+_; zQu64~$U!P^ij&SA_@Mtv_esl7IDFBJ+@~f%e{0dF0q`uycHuH+llj{`xl*=*{Ubf4-#OQre41H&Y?X7R;;>^U289RY zrVGoBp|XR{Ri~i(RK$FoY+bGHZvmlNPvBy8--m?*!BN$?ZE@+n5;$~9$qQ!)xths| g7`{<3y4=6c7e8dYu^qvASByUvWbj_XYPf1h*ieV3~0Ea<;KdGpkL-@D&) z&pr3t<$U+}`@gKj-(!w0l}-oWbbP6F#{EjAxm|i&D!qO|sdO^<2Jn&K?cl?~Z-96$ z{Q^82yx+o7X%W~BJ_@`BR1{AF9}3_krNRA9@L|0FM8GeB$Kt*RoCW?8d2-V4hA1E|z9!1KXV zzzv}CGYrlF$H51JF9enDD?sJ@ouK@E1XMo$IpAI4{nx<<^Zxtc{m%maHsGH@g?|u@ zt#Td@s{ChwdVfBs`dS>muLYIw$AHRb6;wWM0@bcB0Z#?r7T$jfJQ?>_K$^Pr-{2F$ zvo0=`_JOYhMHeS8ce?Ha&&9nRgv3iXf}+p&fW6?i!1KXbmpJ_`1|i|n^AG=LP&Y_$1uF1TO$<>pfp@4EQ-v_4GfW+T}4DN+o`lZUmLyr@?OUw;)ws zder5fpBVwuSOrsg6j%mTA5R0j!1sX( z_zjSvm;MMU-fs~c`QW{v%5&-#&*$Z! z>i@~0;(0fy{QMY{{|9dMe!U2k`zlcReg>%ia0>`2l|BNhzWxtX`>&-k|J<^MHcANbjTzXM^#rE>--J9tgN*Mf@oyC7Yu)J>zyy({2* zz_W4x5mY~T)OL^evEV%1e+!-q-UeO&bh+*@|ECuxTiqn?{%Q+`(HrS^QYOOn`K$(!0RZz+Zxj=OK?RmBzr8;AP;u zL8bc(5YjEpf1LNTeITS(x&u_b&xUv(4Gw_v_c~DV{}?3d(s|c-{5OHh=WXC4!JmMT zMCpOo`u8iq`M944J{_nowe%iP`Fik9_qQ2bj{6zlT=1X3i@~3RN_TGA>w7zR3htZ01bi*1a(o;-9=tc; zQA6(UMDPUO_kqWOD?ycO5L7)s6BK>i4l4cs0M#$g820ub0`>hVpu)Wggw#r31(m;^ z5$`{{K-K@Nzy;tmsPdmwDU~3V(xXAu?=2u*wDe0*^mFMhudi`X{$CHO9=`^PULG>) z-TSu*#ycx3hMg{ zK-K^4;2GeL!~4Iv&d0R{pz^&Ad?eTe<^N{zT<}hCCHPZN^g8$YQt3=^3{*NV1R=%J z2f=mV@nepU1GnJ5CAfbDUWB`U-22HCD7tzdsCxPlxEegYRw}`2N@Y;(_g+x`egR$x zo;BhAuLeaYF9y{C91AhRjoJrmJ z-Z0pY`_14Y@O$7a@Wh7K<0HX&xGx4D3XXw_=SjhR8+Zcl&w?j{-v&Ui4aZL}u7F0WI1=XJ$U^n<&Q2BXZc>hW8B;4Nw zd%#}=_o;iF?&pI__Zgtlc`G;<{5q(7-G8ss$9(V#+>ZwrfFA(2fIkLdVWkWA`S%xt zs)wI|O7HCb&L1`hd>goi_xHcS>-lm}?frM4=;u4&m0;Hs9d86x?yrIufwQ0F?$zLh zxc3LV6+9dFPeJAL*c-jRE8t?>PX|u~Zv$t8p9fX$yTOye{{>G4PkOTZn-3m?dkuIj zxD7l5EQ1dLp8~4=pAV{@J_arYe+oVlJo72uJ}bZtxJSU_!FPejfp>z+?^nPj;P1iH z!Ff;h_Sy)_-w^mPa0*nrJ~QCUK+(~g!3Tlw4tN{*aNKu-D(Bsx=wuq~0w3@+m$&DF zkHWnaRJ~jUs=dZRmFpFt%JCUcbnzolbaB$toi0~`{kR_wD&AKHyaQBy{t!G9JOEw| z&bi6?$Bm%k{TQfxe;ZW2{}4P6EIq^d%K6|UaBc%tZ`XlmgExYzms^7S{h-S64R8+l z2k;c|v}Za$Ssd^NQ02MQ`I9F0cYBpU(r;j(;EUBcS5BJK$M=>+TvTy7(}tdc5Cryx&{`%6$VUy7&NC1^*jd z4PNnFXbF5ZxE3ru4_Omf2dZA52VMrg9TYwO7pVN7{dZozYe1F%NdaE~s{LONE(AXS zs=a>#s{SAGd{1v4sB+y5s=T)b_t(MGaQ_BWIuCn+xBq%j?NJ7M!JEMI!CM1<2b_g_ z)(ag^0B7Sq15ChfZ~?dhJO_LtsQSGnxIX}@yx$J*{{*W2j(w5SNgpWs8vxaB_keT3 zo57XfouKOT{x9}+-2iUHJq0HE4(jYMla!g1r(j_2RDN+0##rC0jfV7b+d;*J>dL+s{>vICioizRX@)U?)QUd z;r=Sv4gLWX-#qhW9`7~aBHVjHrS}f-Z1D5oeDGJG+ViZJd;Ts3kHdXMaPJ1y&QAf= z&p#Bte-S($_dTHE{U1>6{)kt2ylcSaxc7kb!1seoz#o8Hk0QWlpC*l4acp`WYxB&besB-kY#{1tW*pK^Npz7(T;Kksdz-8dl*Sh~Ha6Rt# zf~uE4ftQ0lfA8)oa4YUxK&AU@Q2CtoI`?-bDEb};mCp0Q%fQ!xOTq62JmvMy&$fZ5 z^L{wsQ^8YlzZQHXcpG>O_;pbA`vXwv{XV#ldxN)USHPv9(tR|jetRwW5O6eL6IB1b zDc}nNz7kaYZvr0#-WJ~9393Fn2a0|VfNHOi-F#+UG@}>h&MN1iS+jJ$(Y2f1=SCBg6c;v2QL9X4~own^ABF17lG>6!=U258N3Pn0x149@K%?{ zo(!Ib`%|Fk_Im+Of1Ag175F~hKOI~OE_u7BKLM6;zZqNvKJXnrek=pe#(f=l75G9> z`TPl}e*CC+I<5ir{(4aT;ucVJ@kLPiIQk#G-7f*R;C?E&THnEo!IR$Q<=X}-{hPp5 z;D^BF;GaOnf6=?Wypv!b?pK57gZ~O%2>upS{q?=a-Q(aw+;0XS1Ktg)+~?iu#N26)MPJ>5@&-MEjU(uC)M*Mb9}+U-_w5d1N?7QFcVE|1&Qi@dHF{`)&Fb2`QY6FXMNb|s~^0I_oJZd`4gc09SAt@cIS6H!415B8>skx4W0?k z`-taf8+b16=YR{qTS1j;8k_?@=%ZdQ=YfjnI`DGv{h<8+8N3Eu@G(#C1)$pX>);vS z{XXvPI0x*-JqTV1K0V;=;H9{K1+D=X-r=|p6rFt>l>hsE!s}-lDEhhyoC|&iTo3*R zRDPD<>Gd!X@b#eb`z7!K@brIjdU#C08$hM=MsOMU6L21Q_9s1GgP_WDGpPK30!+Yr zLDkzsKjn0IAt?9tpvv)5Z~*)U_(-t#pFO^fU={b@ft$eJf{zAQf7z8?!N!2J?%1^B6e5BRFr>w2({_fH1T2mcZ51-}vSfnW3Q zi@}Y&9|4u_t)R;HGf?e0=j;CdYEbm|3h)&04zL^i26!HL^xav(_cx1BDo058P-N^mXsC2#|H@^_rC41sEoJ3zJX-+b5Imx1CN&jJ? zJ>XYB)!YApCxDBlz5UmLaz8cT&ESc+-wG<+$3VsNV=w`K16~H6^aHQYE5J)|KM8yk z_z_U_^es^3eaH`8-d+QqiF-SEHnD zP~qMNE(N~{E&)&YvDee(;6=Ef0zMx6Ft`#t`6sSlxEieC{t!3;p7T@hH!la3-yeWG z!PEZ}Ss%O+RKNNTsCqvCzx@4PQ0}jT*MevLx4(ZHxB~b0!L@q-Gk0GHDj)9*_;c_a z+zan@zV}%0RNU_Y)!zRGCSd93E2hRsT0xJCjc-U%xITMl?UZvq$N{vU7~c>bTAPd*tO!2NMh^?rQmD5I+-0oQ}4@&0k( zB5)7b3%(sxIqn9P?(f0V!5v2(Wpw)_Q0;vSsPf+hZU=t}s$SL|?eELr65P)KF91Ih z@E4%yx9fh6^FYz%Mc^E8HMkVq1*%-H10Ml?6;ylw3{*Z(z5h{0AL~Ko;~G%(_!Lm# z-xS_|2NeC5{^lqfujhg4mp6c_|4)Oe&!ZpU;jaX5#{DEv^mp6?9lJo)<3-?w;I*LA zeHo~H-3F?jeh7+=j((710;*qJ0_yva$e7q7=JU;|QHxHV1l#Lr_1zZ|%Q@|lm z^|Tih-M$i3d)*1D{ND$Azz57e%Er(6pz?D)sQ&#N@DlJYP~ji)U~iwrp!{72J{%+pz`&8Q2pQwpvrUfF-KW{oCAtqEd-VBYEbQ611|;N2(AUELAA?y5Ak*w29Lsh zC(rNrv4rQRJfFe+N*={A_h{&vcMswByLrm|j(^L-@BadS%=1k?JT`oMJE;9vDrfwA z7e8Pb_NV%)@Enhy3wa(*_}B6*;P>g^6?}USD7x04>h)zjG;N9MwZCrgIQ)MM{0a|b zRQMB3KRCSk+uXNz^6mxU{qFD{mXrR~_$4~ipZf1ZNke}d@cSa3uHgPAzrW7=PlPy5 z;=S~GYMWbmPU0El(ci=Q_B{V-|KG^}kaua4=fym4!MzyN-@V`|_&-0SBVMY%mAwBw z&y~TS-o1j~13XXV_Zz?$gL8QF_e9)ldGz;n@O}Q%{=bF)|Cx7J@vPyu_|OOV{Q&z) z`T6}O9{tTCA5RBw4en2aJv@KMyVrwVJP*RpKg%9@tgsw(ws4~b2I|ICl=VSbSHP6-I{W@?p&r^6{VWp?=?a$yi_%}R1=F#7C zc=s%x`1jcG`?I|G4$uDhA&272&%@sY&lHcwSN%=#{1Eq}$omiZeSZ)!rt~A;>F+;y zHt^hz`*QFfc^<^G2KP1KAHa|D923gUtI`VG`r8h^FZ}+fzbZWpe@%Wb0sF(d{{n9a zzyBTld!7>s_pI>lOn$#1{C)<%SMj`==f8PZ1D_DS{Ug6W$nUFy`;!4*$oqHmOa!;! zT+)9B@8*LmasMoQ`!M)m-rtY+_k?$+^7~1=I}uz6>hFa-Kj&GcNyP)9=qKlX*P20!z_EAaC!9@t^&K=8j0{D1g;HqUOJc|1=K-}qVDNVs3*+>(oid0xSD zX^8t({MO&I@wbKNj-3BR`1uX)Kl1${!T)>1_lNTCxBPxP&$J@o@1;CHuwVY)b$lBM z{xzn&hvx;sEgy<<4gWn&4*vd)XF2Xam@E75a>BfX=T$r};`OyWXW(xYcq8wg#uNXp z;rCrRx86Sz_j&mL0>7Wj?~{3+%kPVMR`UKi;D>nk0Z@M*;rSl!NAT^};G;qP9mnrO z{T+*kMZw>W;Q67!y#V(fo|Ad{i1YE_xqM5&U-EpC-f3iGLgUy_9b!^Bl$V@3=o6z7Gfde|krNLAmksE8uick5p7{4bzJChGYr?yK z;rIWA-){<@s<^+x?=J=S_X3Xb{#u@UalaMp=Q)8V{{5OCOLOiAkk%`4-;ek6z>C1g zgzt;_-Qf9laIeO%{vOD4f1aJZKab}aeqY9O9M8Yu{vw$F`z7y==fxMnb;Qxj@3--+ z;`jY{*UR%Qo~^u_4{ioem zpTf^<9{oL<=X{<=@O1HKdaC{{AeLcT#=9!E8U&6ahxZla|GfB4&ewe4h zbAb1)f6wQ={%#4lBcQ*9ci_Go$LTz4iSI0)@9^#v+!uiV8$E){_@=*?^Zqg5=Xv`0 z9sl-*AD7^77r(y|-2Wt;wPxSsM13k*F)~uGG#bfZd1$PX%$hahhpzcc$M(%G&DvZZ zuOwS1s9_#UM^J18KWei_k7mOqmyLL4yQ~cbQT-|lS*uHC%u10Crp7C;jlB_3- zN;TP386T?Ddo4FBCz`d9-oc64rP;GqZ`_#ZWj}#%&)&KwSzDzNRw_5!lty`~I#FvR z-B#GidS$9IlJt4%jmoe-Cc_g{L~W|kLkx-it*MQizaVMsA0L_+BkJA@$3}QRxPOv_ zl)cX0#zx|YwbgoKDhr=|*hq%PI(_iCv#2Yz=J>LtB_CNljj4KbclC-m`X+} zBDIk|f^8+Ts#@>ru90g)+{yCfi7HOt!hLgRz~n}Stxt^B%j3!VN_nJGS4juSUns40 zq857TYQ((dXe9(o^Xk2?NN1Dza^=E$iW|nQ`yO_R7OGxJs*R+a>@pIY+TE;OKQ|d_ zhC0qsbh%oq)<%=+6zMjhUsd2xCE2Ck<9QEJ)sl+yktyRJ)fyD8Mx!RJg{Yj4KL6rm zt6u)YNH*{DJ|%larQT3i-&Wa0VQRybhMGOT9jWZ1vW!vK>uOyrEAmy*Dtt3prMgZU z)f?b*)MvNVPfxPBDb@rVqe=EPCmZ@m+*gNQGB3|T1Lx%PeTL}x3|%p6s7b|jE(fF2PBo6nrft!1TvTy9&XmHTw;X%Nx43rz-Y!` z#q>QgIHOPdn))RiKI@eyG^=%b?yma8xZ;~#N-kcrV&#TpPpHObtxi`QtyLS9kxNR+ zy0K=3?31wuK~=paYI+m~W2I@p4Jyfab!@CEPq}Z6@}9zns~0UCs!omL>Dp3q_1di~ zl3k1=QxI)^yga3Mn+Q>_4qxB);fl3e+uwP17bMEOLWc%ln7$|vRTEmZHnF#+?>Lt) zxgh>hs6`9&uI$_9?8BDa&*-5sG1i=_B$E>jBP+!*JlS-QBfVBAy&DNk*GHO0(qzX!ZSk#Vb#@yhr_egE>Ia_#zF(aM+w_m||)3Nv1vY%Ew}AM`8!u-4Q! zZwmia&)!CVMg#h~IKJ_gtyT6WftG3$iKqwJMP6zXwaMzR|C&k)WK6G(VIn{fp&Cp!`<4{oFo zfx43o11sFwfRnUGA$e=otXV4|s#;`xh&+-&^3EjLUfT<0CL3zI5Wo@-=AnXbg-X_} zH^}{9&>fo?RdkHB!<9*KTNk5d&58nSmeTriZDb7cO;$@V&|m5&Nj8-m*N3!2Dh3i3 z^<%J#bZdWWC+gH4DN0NXuQY51@h!X(3|iGE$-q>3eA3<{CQ%do8UMCdgBk#4bG~y! zZ4Z<`l2qz--j!_ zX~fWwgE(FurOXJfJIQi?C|y^GcxK;{^P)^UL(C?Gr_m3rS+!%+nr-XWM5(GJ6pb(x zxl^IUQ+1PQ#28!4P;O35Fhn50jyK1qs*`l2!7ZyA#;Q_=1AkQn`zM;T8p7xUFnKYeGFTPywBN)hp%U z-F%(fmf)^kL458FMAI4reOVcAi#gJQT1^uIk%_V}xN*Rn)GNL%9Nen+hDsd{HUbM` z4rVf6I}x-Lq}{`eRMMypA;gTjWHCW+AFtlvnL#AksV*@xQSs(MPMO%7%+P>`Zk^s; zwTa%4LZvsP+bijZnx-zs%hy*t#mYYVL#?Gu5@i^z_ZS0+J)uaip{FU=2Me6*s<9&# zL(Yx#o=B#WoMlra>)XsQcIU-(Bmo=inH4c#xnYiHD4a8x{^YtQ92g>LOf`p+I+-T! zWbf`OeTQtRyIofv3z-p*b8c9xAS;Zd0;+K>mxZH`D7$twlkV~IKGRWBUy66qmyo*6od%-CMIdRK-<*gXmhMwMmw(S^LzhnErngN#}8)~z3UT}kD zxlvP1?&}zQ2r9^;khUmjf)2yCtBhv!$b7dp)$waK6NX}GhJBOtDYCk1%l6HKUf?4N zXO-VEMCem=r)DipCbX>uxNMYmAInv8+GUHAg2b42e{z|P=2FkacAH3M@HshrL@{e( z2enme8U<-@386L+PVHvu1;v{7rZVPLRbhP1h(ckic)F=p#Mn?|@}pxD zLwNzHKUpKWus@STvTUe2cfuo=1(g*}XSd20#8OTw<@#8aY^g4xOo=F-k##EuTqNty zlhoG1m4u_CS&LbR+B&#n!4k{+hMZWS1Y%1aq>eX8W)zi)9MDHFg|7|o53-CIb`S<8^Q>X zql_sOwLz(sql=k5wh_?AEi^j9JOnmX-NR6s>N3uj;wN(EFo?y{_9dvErS@&91^HJv zNv!?MUB;-paVpF5%h;(7poXSyTS|s%bnC`Jjh@N6ErXFm2bH$yCQ@L201rBw7?&kV zM0Ayk=sq?UlompDX@H-qG$>AO)Z3wx|Cl$l#1+zx9yO_$XpZh?q()byLLgz7cGWdo zOl)G3BS}|tZlZyjA3pYOW=uUq__>Lc6p^#IfWFyEwWT(;pIQw1jijq<^y-C+mRxu( zGG{G8(}}j2ftS==>K_;!+_7!Vx(x$^YqnYVZK(>&^ry|5i}52!jPNCd4kM#DFRLXR zTwS@b3IirfYfUG`xQ^#Nl@McIpzB7$h{WRRxhXQ7PDapTiy*e8LZDc1GFqugzm=@n zxHjotvq?Dk6M)5$iQ86#7R;)A4w2vIdKlj!lph$N%%e6?hr}Y}Oxb)6tNe~ORyYej` zqg8tsI#g9p{2s~AK8jKHAsP0SM<%4whDTCStR{E}4GgZE41+^rM5~~=blZK+?BPCB z#P+Btl|UptXn7P(=@_a!P3P5JsLfpWwGvzzC-5s!oG`k?32THYVpX zq&R;`!=kJhADS_=t9?6!ziQQ%wQGwcgiKkf*@#Ei9%&A1TIb$qg2|>!T32mawPSGA z{CrtN8fj4*!?iJD2}AUb9ZXcx3E;2jjmS+3USG3y&+kl5vl`(3-M-lz24 zYa^E>mPDwln0Hlonui>Jh~KRX7Cgl-(8Vb8MB=LMuI$^P`QeW6EsYTRS7VvNGcLh2 zv#-v{Ocj=jfkP|-_fC#A8@*wLIhUz8aK_Oi)D~fl2?xpIKE==-6t1v-u}aIM1|*SC zy@FiZfWH=MO&*P%1%k2WR0|_jA7=20a%2CYk`l?}IL+atsyxTh+jC{DsF=iaL#KkA z=8B|Dig0=f0~7NQstjKb5ir)l{Fj;TO zi4B4L3o#Y)dFU*~S_mbIi{_>(@S!g4w`s-??#cLcwZ4CDv{NUhqjetf(n(I@lO9*5O-Qn~mMl}lVI5bbJrve8Z4zkJ zG%_{W3o$SwXXPnSg@&@oVLPiRMw*kX1&cR?tp}#;3zZs!xW?1-L6`1}1F#R4mO6!! zt_MZsh)E7(kK}sr#hpu%(`$ZFBVlWNQ2|o91gW?<$DkJJYr0 zY9_ES=@OU`@AFEtpUyi+?@NWUwq6-!*4{at!k}%{5&g$8xHvkeUvuNCXvktu2Uvz% znQe6^cpwCq8isAmLGsZC4xc5Xj-JrS#Twa25YwWzcwqhDj&<9%Y~O0b$o^0Y?;c{1 z2x(30-Bu^L-mRTxtWTv=+!*2b_=F9b{mEk=Cpm6xVseM1K*@YPMoDa)pasd1^ldJ$ z%HvdJs?Mkt-XlP;DlS<_5wNFf$YY2V;5p0^OLdQ=x;$BsNQ-ShDYix{#qxya#8gl+ zwdXdCU_asK&$S5jGZ&uKsd|`v9VGk>mOe@9$3l-tKZ_BusH{ocUltFt!{J4Zg zp9^Nn(99*4Y5tFN#gq2++@GH%iQD!!AyB_SxR~pwMb}rk)_Ep3>|2x ztE7gARl!F^+e8i?mv2cT3iZXg7EyUjf;F1Fz%GefA7_duZtn<-cE<26duK0Pyf|t# zT%|fw6l0_(LX}*o+L@TFFtT}XgK45EW9~j*EwI2Vzeou)SA6U`V!z0M3~!RNU@Doi zw4HvMwQQC~1h!jgXV*we1+??e0y)yS*&ar#jXxB`l=DcC`Gox4hq9=cdESL07!Q=G1<$ z+QZT2NAE$rwhA^GA_&m7^-Fy_dJON?Xbm6bLr{BTWsY9AkHG^6wyxN=Dt3lp53wFa zZRj4Z6DtJMnzD(Bxir)@i|-3TkdS+W6rKy@qIKazA(T|*Q{~!JFKUfkFs0S@sSwaT zr_#0h|AHkpJ<(Xk1}^lcz2l}D=`jJ;cS9NJh1!Z94;63lJ~GkN0#A4EE{nC--EEPF z#__L*ihBL3fdvb_K|=ltC0f5~!NNim#hFU3!m{~^S7RYml=+Ra=;_>^=iw+rIwY*vGa0soVkeH z((hgeE&8GKYi`syXy{J5A(tQFi;R9@sy3|F3Hd{mNx5{gpySSjkh*PP5yOm|%}luU zNlLK+a@mEqN97cQv28jrZ7-W<#QG0^_eoovD$8L+nH4jgRna3Nd6GRFLLf}7fVn=& zX|0$b(+wpkWtDbIs4o z=B#ygv1z-~lEsS`Ee_dta#ZD5r4+^wV;;VA8I%$EMp7LXyf?HV&mLg9$B~BOhv(qROK$47O;{6wITdz~ki_qlu1SusKOfWs$YAJ2TQk zCQ$oeb)OVZXk;Y)&~B#HTd{2ue1iQ9T0pZ-yOST5trnky>$h)OIkVre1x_QUa~g_n z`@r&?hJ!c0Q!Z{((|8gRYxzPIgl03%OzJJ2jjtHo92;5H>{}aAA51bq2~nngtxB ztS{+=6_h+N<@NqEe=fuoYc{O&+5&8jytVJz55I*n=C*<6iU&={66X6+C)TNcmF^_X zMREAyv+*Mr+>0JdGqV>K3Fj~Ly>|Jz?p}@*86UATfAl6lprbX#`3tX#;0>N9Ih*QA z2Cy+;C*2}6WuwwacJ#swV1X%_!lc9|q?}e5akV&dqo{B3>lLneMyk7PmnpkIc6fut zQ&mB^VwqU9xfTp5FD0Ale1RrXSyO=ZB5ap=b8HPU^`;dgw~8tPO(KN9QY+>Kfn~XHlfBv zeYxAl1D&&Fc>qRrsgqM0iR3#ifS@2kdxF|TOnRr-a!akH)X)~9SQc%a%0-yP*HQzy zBNzQ>%EH-+xa^rN&RbrBgdU1mOfXZ$Acdz@sJWR|ap6kxAf6}CrxUy>MbSXU9 z5@(yV!q&^Zo(wuW)5rLX_fElKZgJPK0ArvH65$!=XFx$>{eR!B=f1({4 z!@F5JZ?M0En2X+$?sR105lRl*jlJ49u|~ybCZ%CAZ)NZLPAj6;;J3@^}|N&7D#13C+ku{bw^xmL|(M8 z4pA_}@H0Y<@J<_eaxX959(Swh@P-{sW3PgyX;YV!E)FHXq;wg@MP=>cSt=dnXO<<~ z+0BA*n6lZ57)Mu{EFqR_DBQ%`p%KmF_K!28aolt7E)D-x9x7wIrf3DJ&b7huDc`>JOG^!~QX? z-h`+Q&%4SX@pmO1)0fLv7Vo4;R@>?+Cs~uL`;22>Te7Py;zTt4URsr&46<2EPB@H{ zBaJLb;HxV`&Cx7k++!R%2@~5azSY`?jZC|;+xwo08=K`hhiaLI$JGZ!mt zb64E^zG7$ysSVz3mwT|t+3Z1CsqH{v#2~}zf@j}|^1Y+%VQhA8A^J+I^Kq&wgCAcc zV~lCG_*qrfi6pD0mRP+r9@4vwxS?7P>6y+G1*ulQ#U?9cyFJ&duiUYA%eGCd=hi2W ztj;V4TG8%QVH?8Mc@klReMDKiJ!(_Gd%TS}>rNIz$Ei@(5-pmDQF=pO@QN** zbZd~csg09g&*6vdE3MhKZOb-I_$3Xe%Oj{>(oHq#;czW*uxP7mH~1dZEFLiRlUwna zIqFWnNqffF+p;o4)Z#WPwyqlJ)zWs%XG_U)evTxTth6Yj+2!o193+Oqy%dMYPoxuA zf9K{`TcvGufl09FhmA;nP2__l0aHTI-iLP&{Rt4Z@uy z;cUeU56Vx_qt4`?N~Bs=K_~%!sgoO%mG$;lp zpHYQsDAh-nHtGoPs)^bzD21byMcHsu`MQbvyiHY|WfMt`%#%Q!9fpgisJQ1%0&!*E z?lK#MDkG&$)rK9@*sy-pmdyi$Irj$keylBR*0w2PoK@O9kq|nWqaP;7>j$xMA&MW- z^0B+2*FICyPi8!H0PV@Q=|q&L5p2W!VKapcN7Ve@8Fd_Oy%jwMdLbg;aaFBxSJIXt zoz#zeW;UbOvh4Kks#hw>9KMHZ_G~_2{gbNLVn=CQx(F*TOuXPyCX4uqvz?}dJxrf{ zjfp<IJhV7-JB)D-C?zFV8w=O@b{l%A5#o5oc< z_ippr4xSg_IbPD{2e6FnmM7XsFgyEZ7r067XS8@Y7r3R-TF{^xXd~mIFEuQ**Y2xx zcbZ+=7Iv=%;_;S20iAG_MFl24K8crbMS@5|JYE~E^13BIcvuc|*^FN3&N{i+;HDC~ z75~ry!AK!AyZc8ybz9ta&9TNV9btqHavPVmt{(3|9)nPrXs+Dx-nbD{?fh@dnn(%N;9M46NBv;GnwEW!oCIkVmDW2ecf< z40JV017X-~UCHHrla&LmnTS*3(tu_ZkxtFv&JtamSwV#*WEmV|Qu5JZUw~u6rnYV8`-6SdH?n0C8nbvZ1Z|GO5pez&?C) z4wqzTx*xvml!8yi^c4;MpE=&h$_Y(Bhh(VvSEsW z*c5)7MilR$I*xhc-;S$D8xZ)X4ui(3%s4zRBT`MiZI+B;9_m9QCxyF7tmBXZTbH>fXs*dW=*0H> z0ZmP6*z(vOmFmnRvb$fn(gA9c?9>*PX})f1D%UEAm1FylAS&ChVPbH|#*s$lHy_>S zOiBAXsqG5c$qz4QK2N19eI;ow_q*8pNGDOdm7NVQXYpv|3t=FHHD;0a($J!$iw-T^ z>Q$K6$Y&vF2w|ez%t1uwS+G@%hkn$O@hqQ|>w}d+4$-1KWJDrlt+(JOZq3Ax_|{N` zAp-@GF0wEkEhpd7vK>}RBkav!a77l=)tFE*tJmsU*-mIyG3-sYyOe;D5^P~3)S<4UR7t{Q@M;>r-!3`6Rw@Kt?dL-ZHE!Hh*;W`GNe$OSnEPOH zlqARKLbG^4ny9&#K}#CQa{5STh~MIl3W`mP*--%c7?2>WUbdijMCpy8+?sLwmN;7tl z?>W(kQ4{X0^tHi`*~Hk?++-wOB^JSrSQsYx6B^n5Bn{oo_NpUI zs9sCic4ih8gY=dT$6-eto`%^Zf#TVEt5^#fqdnwB%3K?)=!?Tt-j+dVpm8>&q0)wDwWcOHD4b6`Q@GWsR~(-)_= z0Hf=-?H7&Go~4WDyDm7~IcRT!dN{t?8#e&vq!mqNj00Is=6tYOlHokPa6mjYZh47) zDD_>=wy>}lOZwwBfx&ok8o=sNQ|Bnu$IaLIc|#e}5pBd}k2G}F-n#fNMv*HNjm$vb z!M}^-YI!q?qVc&c*w*@lblklgMtZOCJNDUu#=^tGz6BT1sPh-izi`3A*;}^^_O625 zL_WQ%VUqpH!uj(T_0GSrcfo>W!J_`fi_V{a(W3cy?A^u|Us-6#`&+P}cj4k>{?h(M z7o9(!kh3>(*td5OX`#WMDBZBQh8b8bSwF!=rsd?~id?%dYt|8~d%1&d*S@~`#3h8P zjW*#0y@QqVI2W#QPjpSUtX#|)K8s1oPVud`K5-cr+D|pmol7SQ#gA6{YV3ZRy=lXy zHCa&?^v$2mN{8yFcM!E+Kj%C4P0d3SSjFaw9onc&E#EM(rFZGl#TWH1%seYaxOndx zRK7YK-JdK)yN*d7bY+#X>0pFJt;#sFLS}v3pik2FJ^dIh>aYY+FzTb|WD6)RH-s3p zR1#CWIv-|U@ObUP?fTqX8=kHYbMyV!!7Tewg7P7)`wY-t*r2H>Wv$%|)tkMRqk;0+ zRPV+zW-?}(o9o-93&A~mn?|kadX-x~Z+KF=Iam^~7*VIhW0p-Bo#`KULcbPIV5%>RHX< zB&`2T%lt_jsb!>y@gJ-AKq}KJ7a`()u!%Z#fp6U_cL2SJ6<+s#vsV~44K0D%WC?aDnK08*Rm2|CDMD>sXT}LSDw8{?&`|@&2!kPd$af|M} z{i;<6N}<=opN~W`j zSk`jBL^b%RWr6MR9!+Y3>A`%rrHyj=h!aM9W4Jurgj3&bX)A_Y>b;yFZ%)A@cIC=# zOM2DXfl6ZI8a+zXu-Z1GAE2742irsxJ{S|8POfl+LDQmXZ5i1FgMt|kYNx|)7!*?m zlr8aS3oLD#Ez(?)J~<^$=6xu$7nI}UW-kavP9DNcG1v_vS4lF~EFY*Q_nHASvmB%n z(sh{j$$k$_-RxvMh_zi!S%^SHQnp5~>jF(yr^=H|Q;CHs-GOeDay`lL^c3z9wkJ(> z+pUp32Mw6_7{aD;5fJ%O+6=0Z)MQpD)+TC-;bv{3f$0-QL9Ug)M5~3!o(HDon_kXL zeiGvB)_J|2lCO`7-!LtbE~U-9kiIp_V|ywZDAKQqEX_=eXn*yAstlqq$Rja_&01`S zYI_%VJGFgaGn3xg2DC^mWwSI>d}Y>UWGW^rqQd=^Yz<9L+(1c?V*PHeX+_=1)Q}HR zEVGKKIk%Sr3au%dc~OYy&LS#0Y*Vtr`c5{Qf4J#%ruCNFnM=!~Z7e&uH}j`)8AXwN z=FAU?#wO_X}KElIlh(ktHM1A@@=b!`;Ua zaICxqlSb9ba!3JxV{@em_PMmmg*N2&rf~O_KY;Yt=~(nWJQs z?IRg7ieAj{(J*6yW!y4l|3xtx2Mg$Ky(qb>#$3b(&D8jj%c?D%6Lov_!GTCFNX2@_KxW7&= z+3JPvL~rfTF$De!hLP+-R4sYLoA_*+q2(iS5m=bZpWfVQHW^?^%!A2%+!O{2n7Rc6 zNyazETG&lw9C56);L!wY;eX|X1H!PhNrs`tcPHgu`-g|t2*{$`vUt~f(~w3MW@PEo+)sHn-sO5 z&pKa)cC*pJ1c_ZX&!XdU|37!lN+Q61Qf7=satOjkQrr&GP#-nhN&4PyJ;@|bDXg62 zy@DuGlV2^_RrbVC)FULM;$tqH#P^zn)O!zUMu{kNXjzQ7ErqZo;IqY0Y2w#4tWyM@ zr54vU>}_GoBh$@MReP$druJe}G7nb6Te)^h>t3Xa=uIuI&v`-$J`*h@L-Ns#5(z~) zEt*-%#cu+=uA88$f>EWG#%^o3_GUY%Q6;sjWUd2M4C!3Ys<-mZ{D28~ZKl$3t9|7L zGqY4hFOlyGbXkQzynty3%0kV}@fQh|(XLYHpWODvYI>dhPt`!s3@i+(^ z6TX6w9rKj8z?7HZnc!0wtdGPFM63G5BJ~x&Xk&Am9VTw^nucjry5qJp6Ys2xFjLC! zLCfqip>hsFD>R|&Efq zl;GJhj;UI|=zqpI4jx+KM&K8;btEb^Vj%`MxXflLTA24% z3+w>|^YD|jZ7g@xXgP7c6RMd~9Ofz5MemR+ydX34AEJ&wHrgZH}Tzn@if0=rfCMPu2 z7~@zRMr?w{Hy_MgNOSEEyZ610>YlqGoUU6jz^X}-8jZ@xPYu&zJ!+t$^eA#pG(w3H zB(cM3n2@Sds7>cYP{FDcik&cy(s4xt<=LSbn<`_tzKu^D7E&&JvqGdPx|8w7qEV@G z;k6fiLm|nK7wizVX`M}D8=H|jw$?#guf)^WK?|yV`^IllifZ*3^pNcyN9YeyW=#8) z>(ROt>Z-cgiAw2(;VD*#5A9s15!M^h_o0?D`%>FtH%A0;)t2gAtDCujBC;QerYhy; zv@UAZ;i?;*(vNjpw#7Dz6%eG^D0KwUMpL@hNSQoFy?(7ZJXUGKsp|-fq0w0oP}6D> zANb-}lLcq$8u4KQlUN7b_Q>JI!hjHz<}n)-&D-CO6rmu4ikrJA6_R*Ld9GAdNLJ#d z`!~|VVwH#vLB{M=Va(E`nqaf)h~t}Uy_YF2lc1t*cC(S#YKY%jTB*s(&BD=tO_GmZpP*W^m`Dk4u;A|e~p zVCkoz{C)`Um600FUX?T2eXZl)PRYt9n;TK__&h zw9`3wI<`RU4o6(#XQQpYMT4m75YJc|-q$|hzCX5y+xoj8j% z?Qhgxht8r(oha}a8cLS6U+8N!KBRS5Dpy`Ca*e%w3Q1ROFe8S zGgq{**|)lf4(3}|-OQCGrfiQvxY5p)vf*7p_b1Xp*r!o2sbnUupy=|jwoYkn({9D` z5tSuN#0_@+2EoZ`EmoLl}*M8LcqP8|k}cg|XvKis3MPh}n$oh2PD@)zd93@S zwQB;6YBjb<*^;$fsr}OTS%bt>)Kcb;d6AYLV+>JDv1w^%n;Rj7Da)lXlv*%E%LvG3 zO&T^^9!ixB!Aq2XVj+UDEfz6unC_MJtvKGN{XWVrgfzL@MUeXvzB}VE#<7CPMyE@4 zg?76428Mj}Bq=LbWvQCO(jQb87_F12b6Ts-LquiGqnI-LTZah2nzL&H)9NT@#@WN+ zWXGi^Ba7fY#GH~f-=?()8q9O$WGaocX%*>GMU*BXJuK`h)?L^MOl<|ZiorFVh(}-cu3$2&7zrV$>nx6$q6l;o zqm{QA!>Ps7MQG;%+GZg=IxCKC=@)W$sH}LQEe_FpQTLN^1G;}0?KA#S9uIp%Oi$F= zZ`zYnzCuiX16hZN8pAB*M&f3^ky`EYwS%ZYp%28QXAI#Bn65JM+n#rdp;5*ln&(&@ zSt<_carRjb2EQzbYt9%cAxl~-Kk<~Ve?mKGHA7D~8Ca!8maWl#!1PQE9N_L#Dx~?=+;RkjYFO2N1uo z(IoSpR`<>*UAP>O^I@&5fx)7V!ayeE6Ts9RK2nBEDmtfCu7yE0FrBLwbrF`44kE7< zl}h>5A1h(lp%SBk^MrvVZkzK;Y>malAK#tml*ueIN(l*O8kgSPV`S$9L#6l zva5zfN<(N&bNU$B|w1xJpi0yc8XRZaJK*^?+gAt^H zbVr*9$PGHSMJ44&E}MthDWPqXc4RcE0!NcKS5sycj7W@sX>T?2WJaD>&3mfZ@?dUD zidKMw!Lv}=alpyVdyOyKG&#(ea_=@S5kl8ydv88 zT?ypg=4UHuC`A{0VUjbK7E($-acNdM7}?5Pj5xK4mP<@LBfjq(iU|it-eg)e7tE(9 z;eF?DS_O&*({dq|VD3{ftR`GK?qS=I;_M>r+*$>LIBg%7?56dwy}9DX)F9Bzh#KsX zjnRt3Hep8I&>r08b(mrc^SZRA51x%+UM&mUZfR|X9AqJLWO10Ox&bz|HGIO$)mA|T zD{O_P&rd1EUSy9i*C;KM$}~$NxiC?KE%_Q`PNOg3g?`PA{iMCwMl{@*9p*Bl6m9B!`5^kFD98G_E?}Y%lcAici zBVT-~vv5~Y1Wqvp#9MKM^2}U{h9ceJjN;ZMCyP2dwOy%0R zllee(S;}-{$RrwaWA@>xF?rGWY%;A?fd&@;l&YZ4Of9=rST68^M!HFn5GTz&SpHLZ z6SceMjN-A++l)1mlxdmrOU1)Bm6Gm*6_?g3rmk%wnM@9+buz;|5>-9s-Lxwq>NsqM znAvtq+b!xF+hP=T#E+eokyh6VGuV4$IycRx zM49HcWi$?0Q4x%hwy!oUgNfwQq2DK1F~uM0VwS>MPqO_L-$_ZzC7ASJu`(x{StO6{&ky##&R{2$wO5RplVkP zLYtjxW*W0%p{amt1-I31ru_q1-Wbn5Y^#Wlk-JQ z$<`+F+D;0y9~Vx2a-Ddq4Y}AaRCA_y*UTVWP)S^~7*zHtaiqT0gWYsoE=)(?eAfmF zZ=JN4vKtt|!0N^o;aXFNFLYjqN4UtXQ%0?d>N2Qq(-nCuKT0=bzQY|enX&kkAhIzr zR##{qTAxXQY-VRC2~ArZ*|Q&1OJrisYArA%{kCEsGNhZF>ll{xR@y4;4EE@A-NEd; zDUEc~t&Il3yAKAM-Wx3%9i)dEle|yMrpRK&;AWDGI~9ZW%Vt%`5~i+8z2 z)`bou+(Gp~v@es*8B{@qW zlu2o3+)m0gjrUd!8ZXdxWILkGGm?<@X=3V5>n66B8vO?0+ABJX+)U#IHr}y{-6kG0 zg7#P<4-fk{kt1X7veiecf%c&3%$JVQoE)oaW3P64+cpJBRiVZs87SgTvFNCB+Zt4; zsz`S+t|JX^)JUbahf6gNL>-l8vYZFoh)&HYdDR}a)9R8-Dq8sqRBuN0xb|OcMXY1^ z9yElq`b!eF%7jO4H6VRyrL@?_j$qq8>dI`EX~~Mr>ovlT%mQ&mqk2T14Y|{_K(3Fb z>vfbWN)O%kgNuQYkau=$lC%pKhnd5k476lZGZ4#U{>WH<%pw=dTDo`4nC$1R3d2gS zn3i#RlDAZ9chANQ1&Je3Yml6@y@3v9yTm*YR`YW9_IyzkKNkBkKdI3^G_YoU&$?h(A7Ji* z3_#!F{9ALZl(9K8dVMhP zr>4;IBGj!Jl?&t4g-%jtkp+dY+43tK#*kq@Z27gl+gG|+XG4fwoI<5?p(0$FkX6Yv zhW#?vC23}pXyh;LcFJaX3~PP1XPo*_?6!lHjN3wW9|tIHS{sf01->Ra*7;bgVQj$I zl}&N0ouYGk_Io&(Ff%xo?n1O<^dt$ji0OP(LE^!hoskvO{ptQC?KiWz_m9MJ|0vwK(N2lK;1i1MLBh!}MO z;fk+Kbig(^8+pH8`K)X{ZH3FD=am7NYgmr9Qtsa=}HWPt87#wkF0QuApL}!#p zjYXP^LkmJv8mrj|%$!*wcd?14euEZRN)-KGF8*WZALF~7HP)>_o!+)oR4jHbHIuT5 zGt}T#wCls&X4kK$KiT3Z|J*zt0wPud(-BY$r*RKM)WGx=ECpHsOsjco7GvIQx9r5_ zO;M3q7i83I&J;kxReNP-mI-G}Y36|9mG>bSI_DWPnQjm>Z9|lIveM0v+{`8h+bVoo zGEGa3lOqZ6P42|)SlyA%&Z5U2@@lXlhr3{f~OI1{GcSUf*`f>1rX_s-eNM%}RK zDHd<1StImS5-t45NDR!)b>mUn;FTf4%!D&B)Zu%kkSUtyc1}(+0w3ga1`1JbX<=K| z4~yxAWNdV?J$R|0%vvSW-gLUf{feE_i=E$vY4J=|U^Ty+x7#Qs3P8?|dJYj=ZZoil zjuDsEY}>M8+Zt&Bd}5QX!mvjJPONpk){BYeGL+adfb09ZxOWKNm0Kk=i6Sl&9!3JW zpek_)**Tfk%*C!7?rVeMQ+K^^u@X!cKySwvw zRHde^5rRZXUPIX-^BQd*<|A#3F|~e}=9NW0J3H{NerKreN90$DgTp3bGXUffb^JGteJX&xa91yglqMjE1|$jywh~ zS7QCnY$p~1r}@XCVtV~j=d$EH%p65bq!dPT8pDoa+r>d049xie(r^3wvU3?~)2KYL z#Q^QHf(YaBzDSSRL8_vMOr!~SELAc?im5n~-Q}2?Qq&m5JzKhsS0WW`Tj$NWXls*Q zOH}Dz>uT97sM&1e7+&^977EwAeLE~sr4Z-WN}EYxrl83wXJlp3j2m+6oR4*3CTHx> z4J|fh{IK=AL~h>|mmTkn(lm*N!z|9&()+8vf1N*zO$r|#h(g|5CJ z+>~2pYzb$zh!9*()@?OAjaCspx)wSsSBCD^-~(o~kcqd0g+nC<+=u;`}XyTf~$p)K9 zQ*wa77`I|eq>I^E(V1sSOUX23RkYklULgHW<{EA8$6bo)$?{S>3ym_bHeHIh`EyZY zLoOL;L=ce!X*`-~M6^VV3VTq9AemFz><1B{U2>wSP0ok+4#anxc%qFr&*@}Yw?z7# zO*Cwn07?r5<=e3@?Tk>2A-!?GQ;(y|tw+IOM7sDY?X+Xc2vQ=I$wif$?9_6Yw65B& z<9jSYW6ZI59d5Md=#yOU-f5;F1NDz|gA*d+7@Jte(hW|gq>}Ab&5-X?U>SYfX=@={ zQ>%}~^{%+5C%^uV2}mxNVwP@K(Pai83x*$y0ag|QxCzM2JEkA4!Q*ATPQ%giW4sG5 ze)X$*#d;3svffQFRA{LXxUF+Q6cXeMo{*9CuFda3d+hAeD%%YfH~rbZCL=}q0Ya{; zRm4=p!{BjR_^BNzYt)KrRldSixPQUgH!w<_F?L#0=Zk$m%sWP!+_gjuwwum*gYHfk zMjyY;Z#q%OHp7q_612-&_e`j5;m43XbY=?TaKKXL+iZ29E_MKSKpznMjVRtOPtidE zQ|iRc6S5M?1_oUfn~tB`*i%$zYct9Uvk{px^?}tZob%@`M7D79%u1wf(lEwOYbrxD zPPWY>%UVm0vV7o${qA=0OdyDqKIvjHHp*GB7nv4gz|9DiR(HH_iaW{oOxtw_l`;<)13`WAUBMJ zYZ=&0Va7mmpLep5kG)EZHy13%W?kOXOJh`sEF*5MGPeOB7>2CUwnnTpfR{ZSuz;Yk zbz!SPVq{!{&kT({R8_ZJX~!>cHV;&0jEOZfYS@fXN`5595R)pvwu~u0eagB2x)It& zF*nTFUeZJ7&-U>he*R!8lg{_4uIvubTw2Dl-SJYXZp2l2zYP?{4z z@V=3X1Xaf9d&iM8o4O{E8W@Z7GlXF-VAnpfZw{V_ z@L@ecH(yK_i@Vtt3|JL1HDjU3DBWrLESD{J;d+@{W@=$78qbv=+@Sf>`u9xH6mv5$ z%yDSV>B4XUMOp8*-5c3yp}@Kj_-Y)7bZxSk+O%C#oLVi^q}_*Tu`(+o*OBM4wZJ0R zMiN@jNmZ&`3|>%jO+0<|5Vlu{FqJ99AvGD$Y*-UI6ccvcjg8t2+J#VQX9;6tOg>hb z-={#US$;SN8uF!~Idv7I)G%+0lVK$Ax(X4g@!*ayd;i~u_(GP#8VoCOnnfX~guK`g z#W5jd+)6zO zmOzg@7$!lFJka6T2GvNB9#o7bK@p9jT8vbU{%r%XU+RJ(GbTfE?Kaku*lTl|WdgGm z+NbPh0a=>YmU6DxGjpLmDQ&lgT6244Sk(`kw#%-ZU0OwFu}Q7QeF?cpqJ>grp|9kX z4M&PMypfmUidjlFMgYE@OsAM=L)w3K$yGf*=17|s+~~p()i|7m%Ba;#Dmxy`QwXFP zH-u=r2jUgKkYs9Ww5Kih5HJ&E+cS{Ho%RKq(M1vMlq;ADmDbCyEzM~t8SNlcOo!@< zK5AEcUS%!j5LQR?F_3aFLF$WThZ`4l=f+3VLksLkt=AW8-Xq|POG_jj=ETOWf}R?3u*;{}6&-xi z$Dv-Gn)CDST{28+{0t)s_Qx2?D-47{!^A2}q|sVw@TcPu_|AFkvy*hw<~h6$hHzxM zRDZlp^_xz{QOlXLRT`9?zTJhiB@fxiLzZI&xbaf;-k_3{%~`rq==9pk87e|u6uFz} zj9wb|t5~m>#5yT4u4u&+8O*Ji+Nh9v!G>v7yJb)(VbN6SN>tbOAnoZuMkVnwrcIF_ z_!tBOQ?Hj?7+_&N>`doE2D5eQR!+m$jvxDD*p{!$d#TBN{mBfU(av>Y0CmQg=`v=y z)U|BZi;BZ-ewd}wy;5c8Q&*ykhRnNf?~(bjQrav`vvWsG@*O+%A`P3gaLAUduB*?> zqNyyPQg_lfOIPMEWdgPBrL16fc)6wcvV$qq;+X}keYV;{?X2T1;)8fr&s()luEt9&#O|c(Dg5P|$x3A>oS*QbVfQ zKx9N_q(fPA<4sDI`Im}@ggbo8C_U$&QplDEI*#difdPdM!l+X#MY&EW3s2zLH&nabAS?D4I@|pdB_d`0fAGoi!vFvP literal 0 HcmV?d00001 diff --git a/bfd/po/ru.gmo b/bfd/po/ru.gmo new file mode 100644 index 0000000000000000000000000000000000000000..20863677237b41b38a36935d0b6d35b2b8a888e3 GIT binary patch literal 175235 zcmcGX2Yggj`oAXu3!o?hilTBUp@$Aas0oA`iX6p@4aJJ?Cy%a zcWi50d+%M>-q!YizUMu6G81Ck-~R9Cb9wH2dU;Pj6JFb)<*5;#w^~LbyTbmxB9Vi) zj6}xFl4&F|bx9=B2~LB%!y>pNJP7Up&wxGPm2fD05_W+t%OjBt*aL0{r^9TxH|z=5 zLxp>v=PRDyK)G+bzs0vZ43Nh{g}Wb=zXPGtaXM5wu7NwjdthJqA{+%K22O_?VITN2oC14QMk0Bz8p`~3FTV#nA`h*ybWMYk zkQYOh+a*x(-VfWu=b+O2k+)B;w({!=m9Kel5UhaP!E-#XhC3tQ0sFz{JzLb6JP>xr zd=XUmYvI=Lbl3)-4|juCLB;ck=bKRF`#qE%bXsQRJRI(VJPXRc+?yZi%`b$?_Z?92 zJq?w=k70lKE8GtDueI>TK)IU-6@Mjc3lD(`=VYk-UGDAggM*P@g4@Gw;=FJ-DF1z- z(w7Yt?mkfYuY)R|GobYCeyDo=7|LDOI*Vr%RJ{3KE{D>ugQ3D-@9nRH(({MC{lB5g zW2<@#uNUlqJRZtj0c;Ofdh=tU!o3iVfww{B`+Lu=mPaDnBJT+0uLo2*N5TNkfy(DH zsPa4pD*pAbGrZl)FF?ify=S`>);{_|)&E$i_Aw2%gLR&VL6y@PQ1Rad2f?Sk+_E7O z>4w}1wt}PK4loz0ycfVua1B&Fo$BQco_9g{e*r4|AHBTYO7lO&b3Rl#uJZEnp4UOu z`}1%Bdo!i6w^tG)et&kLZ+b%W<7Z~h)s zxc~J4KfJ*N%Q0Y1wD!m(^(tkZvzVGz*Pe7&XC8&7bgge6@ zpu%at*7}8Ra2MoJQ04_trs`a|VwJXC&{z;192>;lh&>VNKnBj8666^?X0 zBod*EkDLP=;P!`FzkDQ|gnS;9zjxpsaJ$2-{-;2uERhN*`%_?7co!TC--Ow)%i;7@ zFbb94OJN4w1Qq@#Z~z>9gpFH^p~5>B%H7Ry7<>)NfBPeCJ}?AMM_vUp;R8_h^c5Tq zyBuZZKM(dsJ`VPWH^DjZ9jJ5-KicLat3B_9Losi4409GZ7LI|}L8a$&D81kDSj*oq zScSYC&VcVimDAwkteneX59ISOUK!ty-=Rcv^Yn!u-qv2%arBLoRLdEw5RDE|j+v;g5RDF~}<>Oqa@SlVV zFKxZWKNw101V_W8;TZU!H*a~4g+C1T#JmVfPmc7w1I|YN0`3K~&o%i>SdIK4lwK}8 z&+>mfRJyK%(!-CT@-g^)YxgxU3;7~1zXp}Bb{CkQXF;W}6pn`%!9C&IQ0W?ep|#I) zI2QRtDECjmnQ)tnOkekgs{akJEBqKL-fb_o^i74kA+Lkd&vRiH_!v}qehPcRE|*yQ zm;wXjN~nAt2ZzCD;8fUZgQa&aRC-Q=Q{WR&^|#Zd7H=+8_y<7g$={*+!w+CT*qKJ7 z`kDe&jw_(j^>--yCtx1@5%z#nFE{f_sQjD>JHeZv{5=VGfuBS9Z*zs!*B)>Ja;4`r za2oPwo};d`c6u;WJa@oe@GYovZ+(^3%TzcC`7Ee>y$+=h?XI?Y(-f%umq69$NiZA! z3#uGDTw~$y4drev90jk2D&O~Ecev}{tz0I+4CET9ay||Ag-=7J?-$q^_WXzW&w;xm zuki9|a7W}v;Q;s+>+UP z*&ix>mqCU9E>!;7UT@>x7&r%cJ`CWcZ~}Y?E`_abu=LkMwc9J8>ft@OD{OP4rLQ-f zjl2lXfLFpP@H@B|j=zbv3D1Z5@IO%Lnsu|)*U@k|@*S`Yeg&g&(JhRDGKZ64-&-yH z%V1CB^WYG;2`Ya-z@f0)Z5Hl)sQexQr5`s!mD7)K1RQs}m3KWP}$N)L{K1L3_;>H886hPypzdN>>Ig?uzr`rd}hf4hgQ90$S-3RpsUzbOGe+s)Gp9If_8=>@M)}v;A0PK!@4jc#Xfr=;c zPb;5sa1i2QuqV6;svKT}s_z{iv;Jl_lwKYQmH)fpMEE(}6ApXa;yVnsMcx2Az#E|I z`w^&gyaAQ|mQPrGd%(8H`@xy85*EPQpxkZ$By(9f5%z|6!$t5z*bnADW$9T4Wq$#j z3m<`#;covjmOz!?l~DP34@wVqd)o3_1p6YN1vB9Ta1i_os{DIAW8+vUR5|_~D*k`N zX>gZkt=>wY>f?Mb-|hJm9Dw=A=Zs}g^>7-L|7X1U?$29(X2J=W9{`oEJ7FLAA(Vc! zf5G%>HdJ~lVGg_sR>05T1h~(OrYGmXDafxvl}pA;)^Ak6smM3M88Gs)xyyqJ?-aNI zJ`ab%L9bZ)VsIAnsZizg4pjMfeAVp7!5xsRV0(BFYzI$;a(^it3txb$haF!t^F?qt z@-a~Py%+8QKY=^L9d%SJ+bP!a&?|>cQ z6EGdV3%7wEz)tWR*b26N$J}>;PN8Yvx_x z*2n{){EvjP&-0AJ9g&yAUE#4%>9_)RgV#gp`SY+lZ1J9@rx#RvDuBx0@vt+z07}pA zfYO&wpu+3=zJ=EhD!y4z>59P?unJ0FYN5hA)bn)D%V96fZ-Ywb+c1EU4=i0>q4Xmc z%6}p30hf86=6M@bIB&oVxb=r74}iNN&xc)Lo#!dgl><~cKMz%Y?|c3Pm7jJWS-tdz zeUQg_c?ndx9q4%>RR6LGj)Y&s!7%e<>t_m~%I^ZW5IzYDVc$=zevg6*e-rEqKZnZa z4xd`O_JC87^Puu~DpYyh2Gy=!fJ%Scf7|{{cc}CYfGW4SQ2JN`cYy~$xjzGL1Fwc{ z;jK{R^)TEPz7OU98z{Zp>NC@uJ)rVg45hd0;qGuFl>4VV--ZhB8#n;A|J=$c2Tnn* zfkWZVQ2sxGs+TrjSpPWyD!&a-dUP&q2d{++_dYMb36;OEpvrBVFRgqA!*?gFJRyj9{Aya|=w@1WAr>TAnaA1FBowuePf?v}%y;1N*eaX!q1cY6Cz zJb!^5FyH+f?@iCD;Be$iJzs_6k=y@Z`jZcb zAs-Gk9^4M){zo_j4*rjYUjm0BUjS7<&%#CUd#LaVel$Hi1xk;ugDRI7pz1mOCu=`# zU|-~(Q025I>pY_1G7>diHV=R6AY;m7a5< z%K1L1_Vl@zyZmBu9#nX%q4IYIl>6Jf{RdF>w$raxzN6qEwX+6Hwv*1Qmb3 zNSaI6Y$*M!hRV;uQ2KHeRJgA|#s7=9@0^zA{7-`YFkb>Y!Be2(xf%xWC2#&C?1J1O z-QpPrB~OLB!zEDZIUGvQuY}6yi%|9O6Wj^5ZIR~si=I&OD5!Y%gwpr@q1>;9yTB8n z@_!XnIlm57pDkNj{QY1n=29)rr) zYj8*S3)}&A+%nDSS#LNUc`)1qu7Qg0dMLen94cQwc(&Ur&GjFBpu!*Ty_8Jqw=hSIS@XjrjL8W zj>v1F>hn~n_%}lJdyhl)CoS5W`+iX6JqJo3j)02iOsIIT_2v(G^A|n8fXYv+4#v)& znV#dJ^l(q8cC*x*9|jfA8BpPm5B7iu!QJ2n zsPONH>i1vt=5IlzKhnwcazChka6Q}`KHwSbZ0%q*%*Om4sQFHdUDDh>!VJ%g;3&+0 z^c>#V>a!Zk{9-S^233CTceQ$*3^l$T=;iC7+QlbO?mF*g{pu{Z2)PgG$%4Q1!4~VCB0DRQt^Hj6?O4XF-+w?NIIT zWhlMex@(%7UrvD1^I1^iO4Q5so<~5rKO3t3Jq=Y)UqRJdr*2lhqoL~U0H}D*hAM}L z;CApwD1B|y-PjW^zQ04qCR5=arY4I1p0C_D`zRrg;;GJ+A*t(as!<}G& zJQ%9{=0fRhDO7*4+MA!~E zRQWv#)lYs7)o=9aW92;>D*rQ}(vuGr{u0kMo+m)n|HYm+L6!R>Fn~MtwR#x|75)KG z?vID6&kNyDcn9nXzkn*|_Wevhc7dw@u~79l6UzTSQ1w&|d%;to^y&_%`gscug1qZe|kBT-nSfK{ni|){_1F`@_7g@hA%73 zda_%NrDF!vxL5<*z?D$?ekdFUuZAlBx1joottVPOdPDWExlnpm169tKLAiShN>9Fk zO3&_-ESw2Y;g>?y$8k{Y`a!64JrCu6i(ISkUQq2OAF5w1^*j`+eP0Zx!n>i`QLD+; zuXced=l)RX+|zRn%tgKwPKTdDwX=~^(%kvd8Yn$`5~`ekg6g-sPqli;hU%}DLba>I zp!$vT-~@ORRQ|t*YA>Cpnf+`ie`QeR^*1ly3YD*Cp~k_lq1wex)2*K?@GOSgVqOc? z->-v8=Q&X0-osG(zRe6PmqBnKavqfatbrjtQLdfdzJK}t1`F+d<$*`KY%Ua=WsCm2DXO1=9u{qDEE87 zEI1ZQuNu7lJ)WDO()%b>KlQaY@4lz$QE#YtD&QQr3~C&^7b^URz5NrO&v^3}VGHbE z_vUZI@yH)Q=}Ygq7VcuG_+wD|bR3kPUhd7Ggo^(M&tIV8Z;@~Dw}!Ic9;!Y%LfH?1 zDwpA2E`zG?DsO%XRJ}d#`Kf1%0yE#)b0Ac^%!RFB6iRQGdai^j_rpC;@;nDhUoZ3W z3sC8L8%E(r-aK!f^}BmP_2bV$g*S7)>A?c1esc{}zr7JohW~-tFnceX4;>6ufB%Bg zr?ds8?*ZHqc?eX0I1Q>@&V$mg2B>r$1Lgl@sB!aNsCM}cR6IK@v~j2as{c3w%6tP< zd3*pB&bLtU{|r@byY6l7N5a|2^Wg%x0S53_sCF4FviZmmsC4DQe7G2@y<86!-wROX zy30PMH`Af=6NgIIX>cUG9`=NvLiH;h_O<*?fb)>6;avCtR60BDXZkk`PDh>%m5;Na z+RZI+Axtk!i_C}nKoK`SK%y}Rh|}E29Jc};E(VGneU$#IT}6+C&9gzS~;$VO4nyl zW-X_Y5{bjrUvBnZGQ!4!Hpq!yh1BePrKyo6lXb+``>rMOtKk z?BlQqz6R@Ic0*d^Jb07mUMo%h4z9!e^i}i^gx6`ct;4&mNsD}f`8s$VtUMqsawzP2 zpslkng)!t`;iWLP*6L;3b!m|okq?Kehv-4(?;lX<81XmD-&OEo+B=aBIm

q9j8I{TWwCW_P+>ThOWK4-nfdo&z_{4P{_x}9V7SqoKe*Fw4f z5lXK{oNM*59_!2Hc9(#f5-I-A7{{SwAb1yVKxDMta z?{bl)qYP@Cy$QusCYN&qTA*l5A zz0|k~UX5IISz6>8xc%j6?mp~YP8een20jYM-emgM>gF_e|Mvn|gZcDZEZp0m#)EBdwQvuI*~lNmBVgujHvZiRr4PTt zf5GzGE&pTgu=2PZYTWH}r;W2kQ0`BJ>NkIcYOiPCW%HbFciZ@PCcG2#MfapdZh*Vo zYyIhya3S)Z_gOh!3GYX4dw*KwUidV87@qckwU@=4tbM-%rC-AywEV1qs^^#CV%YH^ ztDog?0`k*P`qJTH)9$71l z@)w?aJZI%`0Gx^WKcV`$U7k;K_rfSdaNmZ(09wEIbQ2c-!K?4XWQ7^^T3phrlk#t>0xn#rWSBD%=C# zvv#xzYTmN-`%>#uuh1m%yWue}wAa4*$~l9n^fY>?@1^HmH8L>(^E< zE1>k~NvQFD_irq})lloATi{V}(6<)eZBX^l?>no9qUVQ;I-|q8^nO_Q}e|>(n ze&HUd_Bw=HSkmtcp!9Xuv~=h1G${KH>FI8MeK1tLc4(3A@^ctezu2l}x@!k_L8Y_z z7U^!@^EX(8+-b{nw=P@_r9bz=o-lK(bf=#MPHyTI03l~j)#{)rQ-vra{U#mT}<04 z-Sr!%!&2nWpysvnJEgnz^Sy8u@-tBVe)pX%eaoTJ`vg?@KfsZ2)Gq06U#k|jKt32| z!NXxYc(3O(p6@};v%ZHT;MmR?d--;#@Vhc-miu#m$Tt0_z_e) z?h&NB_I(hnLT=GD-SvyLQ2o>kQ2N}zTRLr)d$({6JfXYUZ`;G-i^AcUp9ll^AUqs? z09AiA8J7NAq5Ajtp~l}~JgAe@y&zkH_M>v`8+6neAwHk4={HfJbS{< z*pGzDZvoVJy9P?{)i6AwugCe2wV(zf+s_@|104F_z~O= zP8?+M=EH8t)lmLUf{OnEsQ%$yI060&m5vF6t$a$L%He#d^xp{;&P!0`@iWx8K4ggL z$8k{gdK;9#r@Z-RQ1R|M)Y|84sCIu8Tn4{|s>db6jH{sXeT?VHP~~(M%zn}^7?2m%dyC)@AgC5-Q3{oSWbT_}a5zau~a+K-& zT(~##c~I@)KT!6QvP>^efRaCgvL7+p`nh#b@(WPmcN>%L_BWP7<$vH<>le?4*~lNl z0@!by_228D^yNIL{5=R&PTP)8ck|pXQ1U)d*cvQ)<0edRWENr=|jdubAJ$2{-1(Hu=AvJ zH=jBX79;-~%KhA2bAJs~IKM#YbM|CQ*E*AX2;!xq;36;K%GpyVfK&4}U zsCqgVDx6JFdiXI^`RbD`3I7HkdQgv#$HP~nf7mG1VF zqMmobWti_a+s3Ekq00GADD$p!Opi{6O6Nw{2fhcDuI=}tSz+p-t$m$?qaLAE8yM8t)l5}KK}@O z6?tBf&1;4hr$=r=J_}w2=ayLbze3f|vY3s(&%jFL-lf(KPJ;&`e+i|B%gWN-dCd(_ z<$f331%B+gpvH@fq3ZW`sB-@dYMeV|f76c} zq5AJP;B@#4RDUpSsm(_Zfzp?qDy;pS4v$2B1uC7TmDavag3`06pv+rTnfX8{J*k5I z;iaC>c&1gG`2aWp`$bUkulMH9LxtC}#=;o{XCRkDmD>$a?dS)19h|Vt+Q-*W<wNg@PX%)gRGz00AI)cD_97h{+p#^=)pEGxgM%rZhMHuzY0!3{sEo>vko=+2`K;D zA7_7!6|Uu;nuGo1}7mu3HO2>kFfb)B~-aR3p>L-kF@@%61GRa0PX;9 z@O%iWJ-!T`z8_`d_90O1=`na5>~^&2*R`-5`Fp7TyyzHfNB2Pae;cZQ-~CwYw-!M4 zSC_+sV6Wq>KffHFfV|c5*8a|bYLEBA@$enEV;b}Q6HNa`pJ?$;hZ;w(hg-o;Cm92{ z4RUYT9S(=}a3Q=DJ^@vJD^51OxeKcNdY)qWS_&^f-UxSw1*iJ<3g;nT3VXqyVQ-jm znx%UdlzD@f&xd`HAAxE=-$3Q7^XWEE91FKX&W9(%MQ}^_8JrHkg-c-e8CL#RK-JH$ zQ0=DjOpEsvsBrFtT9#&~!)eqeckAWY;ZgBb8mcKLM zSmb-5^f$8J^tlqMoHs$$)6-D%?)K+cJ#~jFzacOO=0TP7@lfsf8K{1^{kb+COon?R zp9K})Cs6%o-}9`$*#~AKFN3Pr^WboJADjt)fYP@q=Ue}H5Y&9*YN+_$^>U93tX=K{ zmF`!e+Q)7eTKSEF>i_3^*1;~wCqd00HbV86ufStr?~Bsi{{4+m`Z4)po8PX7pCfO5 z3E`u^KS1@r9WS-^uo@nS{7m$bwtoi!rv^qh`a5$~>;O~9;+?0Giu zUCy`i^)hy^@@|FMcf8y1eJ9+2zuTZ5_0xLTDs<0uPqy45x8r^k?k4k|>O`*DZJRZvVXcDt8Dc2#GjsJ z@F4uJfq%olp12{h95bpl@*Hw&{JzDv+MwE>%3jX}2KR4U+-&Q^kj`AsOSMO4c{4dW zig&h8Zv)})&v!ehXA$3Qf4cp%#WcCYfy*04J(>O(l&^Zk~0_akn0!|X!bb@yf%Mef1PO_+1^ z5GnKKXYu_v?9P(||GWpE$K71q+|KvkdDRy@huiQuKIwZN@vP;21^2rp#aE5vCEi^t zzCXuJChz`)Jrj3FV0NqGz-$Z5*eZ_P!}kEbzlQn9cVoYMQkdD8=V7m>nC}C5kK%m; zv%}$KxcwNr3cmFWCyYbju+Wb)rQ3x)FxwS(BYgNPar+u_U+l(X_dFboypivHu-ldQ z8RQ!=---8nz7=dfZ%%R=kzYjK-kas(PtVr8yW!_iC)q!%6#!39%=Iv=x#wP3=D*J- zoW+DO(}%O2cWW*wFFwjJyVl!tgce!L`!w$z-t0cY*qZQ^q!QjI_k3y_in!hl(;AM&-*a0#m`{uu7~0CIQH9k|E<0GIL!XRyNOqQ zt)3lma}V}oF>By`lkXZh6}t<0nLZ?*PxzYP z^5)y&=2YY?+2Q6Q>@^oV#fQU`AX3fuEZ#J}uf-kHCHHIxHJ(l+j1T#K2)j>Uwogwk zes1FX5X}Awr(qw#Y!Bq_-i?LS_-`8K=XtwFFz(0qW4NEpt7jtq^=u6nV5W5|$5oLn z`Mw3tfW5ri05=cuE+O9MyjdyVH{)(G{&vPrPod|1CPun?`Dxr9gFlW--7}o;t@!SW z`Qw=6!SHFz#{t-H&%408=lCrWB)J(%xGi}<#Z5Xq6wdJW1M$C!?-gNyZ~*>qfx~zw zV0RzxpYUn>7vG~XyBs%r^Oj(~JJkI6G^nQ=Zmz-2Psjt{uDrRtao$^eIFHB=-=||X zANJ$boN^5En=TaQskk}DyKl{RI^m|tJ>1@#d#90!nEwmm?$7|k**@v({_3jt* z{h2qv(8u|2?Am&>fj;i;@GZ>O;eR3TIlQmq{&nx}Jy;w1f&1b1LHtbPo$JlF!2Jr$ zw}mJ3w&Pue-J5U_??JfzidWBGxcip(R^B3BJ-u-AHtt)(PPjW?@$e47{s7EMG5dvg zZ@v%V)$=y*BiP@7d?$8S;y%i&XC>wj@qHf*pDDP}v(CFY24?XdhyPQ(ne16+L=NN~ zg4yoy7a8)r&KvMn`uP9JcldO`>}}kZ;ODcXI3LICL>%qM`ycFnhF@TRo_BK*W^M4h z9Cz>X-J9qrKl#G20ipg_obg?HbHh!y9>j#I6@|y|>@Rhw&kC9D==` zxwzTKn@bLm^~}e9wKpGu+5VWV_kJodKb$bfc(;?VyOi&3z56J9fcHksGI4h`-@ovV z<@;a-&ht;c*TP|#>*?fqIexU})AI;!K1RL-yCeC&j_U$`D#f!UM1rM$P{?t0AcBK!{&3Ey{Mc9_2X(-$*62jD(@M)Q3G!gaj2 zdBa|~>x*AKXL~=l^4*&E6WmWB?p?4i_u*vn-3GfSaJw_#ReT@H_gvV4_dVPl?88G$ zJUig#6{K%?_asa``{C{>xIcC~Ci!WF{4np|32T%$-vR!BS-qEc=37rEAC|rgu&eXt z55`A{!ZI8RN;g#5j&#Qd=;QbHB z|LNG3@XjLc6Oi}Ct`FZwVRkQaKipr1df`R<7MRPSGVB|l=9jah$K=gl#W9ECiX zSI>cjqbH8L@VOkb#mIYjH!b0V-ksc>m-L5-2=Pj<~-7q@7?&`3A>B= zu7w+YSdSrp<-g_pa^Bg5qvug?z9Zjk9Y$`!Z7Ft_B45w<6}*on`F+g$li%-ncgB7T z%qH>PjJsKwU6?OC ze7}qRGv4h5KK>)%LzsQ*&7UQn848T&O}@{?-&cHZ;$4Z`LGWYDPvdRw8H)Q~v3nM` zFX14A@9p^hf$tNsdyV%>os8f9d{6QIR>6GC z#$$FNZXe+LMP5B6gmE*WhmtZzgQO&2Y@d@ZO8x8*ry*OXNOqjFXsW$PTjt-nV(f=Uo3W6?;AZ#Qz+= zH<}pPlJH;T`)42SNc`@J{hgTagLw^aHs1yCUEZ7d&c*HBxVzeiiE-p&|6R)Wi~jpO z+~wo`e0T@^H|*ilb`i3kIZ0{#hZ#kV!`+d*vytQ2Z|%eT0kf;|_Y*t=v%kX+;6$jW zEAN%K{|`J3cL!lNj<;TxJpbmcLjJptTV~J59J9-k(joJwaPt7~NtoZkJBK(9#N7DX<+Z4u$TjI8HG z&sBVHi~I4&-(&v*JePNs;>7NIUOl(sW)|kJ!ZQi)6xa*%LoqvxcPqY^Lp`5jrzb`j zdMc4C>~ph!`+GmH!S4z8bNuXpt6h-y;=Pf#BmVcqY$SHYd|w0OK8`TJllT~j|D(OZ zCEor3&sBt@=X~7ERQma@g2~S!_S-o!YmBpSi(I4vl#CcxY-+vh2Ae> z)^}S--X>gzDHp;8|wL$oa*wbx>#+Jui3RFI(lanxTvs2h=wo&RLqD~#3S4CjD+#JgOXIORJ{y8X z8N(_X_6;)Pkygtqqgg>Pl_VP~AGxy49q-yg-IoctUPH zCpVZ}P9fwdHFFh5w646mDjxK9nXRdf)x}DJ0Tz2aRxHb)xSE2fs*Cp_gup$yRVDof z2l17aMb#Aqow-Lv3FZYWYluk6Yu;H!NoX;-yf$9f=)ch-j|5dTXJKJC1|6%auN)mT zNk?Ni@w(dj;=12)P+vvPnzvsbtBot$(c0SRN)*8 zKv`N(T3HpXEH4i7t+cW*%58`h2if%v&%lM^R%PRu3pn_lu z$fj?^uJJa}(~NkS#Uvf|-V#~1R-dZhHOa-3Y+%*M60#5`=F|VnDt+EuHP!JqGhS>sSsDu z6wdFsw8)92q&gONk(46P%BxWxLh-usJ2C#BlV5J-_$QK|?DD^gcD`@3b7Q3xN>yt2*HM_*MePXqaGYD#mvs8nFM$%Sg*0;WDNwlh@B39BjD6TAV zU5(5W?b;mocL}qeNY?fTme$loht(8czSIsA{BjL3v3-FxVpUgBy}% zQ&r&$rqS(?6t_sf<929@TcqaQCcA3JO>K339Vu^GR2hSY)CbB)Mx3Uo5tZ-Wb#B

o5Ei|jn;XQc`XDKhP7Ns&#@ zW-Q~y<>eHvD$RKgYq*G63&W7N3A5`0EGn<7jMjukL2tUGsyYST$5d9sLsJEF9*e6h zYc!FdBaQjk2Jc}7;;m{^6Cu-zn4eFSNGUAK#nm+{Ys<@)DAq8+3`-TIgq{^t#Lzt{ zd6K@%ro1E(0F7H(MtxX-WWT&_rK`Hs6ktIq)M#24X4qvVR$I#u6^}9Qp#n@?9(OB=UjU1 zgQ%{pERDq&EQqGOgz>YkcnP08iNu#zszv+Og|W2)=Oc`^sd6{d4OoXkpkc){Pcl5D~t5(OIulx)$w`()F^;K3xiB+=E@M42Vv%rv&TXn%E!KHwzZsk!eTERQnV zPO3_kJ##oFh^bZVyH54zDguio*-&$`q~_49qb451w4{U<8YZQwwvvn$mn52)tF!(= ztY~SNbQ*JMkqN_?SJswRC!%7ZqjnZ18L@(Sev(L?CnS2%XdQ}|RA4skmoiq+oV7Hu zyxU48SWYpM^JY?w11!S^6Qj4IVyDwL%r#j#%9#_3;XO0%AX*YJL~$aMEgkep_bPE zP1WueLxICItK8#k00g7p&*07rBgyAa3S~zI#$Jdgwn%X+*TH0+B5RGQhl3L81 z5y`G$PA4agZrmiVqAF3!i9RQ(AGRq(nJaqF0J!b3Gk}8%41qP(^Dm3Ud*l2Egjm9VBt$yus_VqeCxFezk$NHvg~+Ss!C z@>r{v^Cf+-dCG1h@Z8mHv7aESzY z)5u+(pOnwhNa0gb97{^btl2YXPl^PyX3r&Kv**u^1aqcMj0Ahm&nDQp*v!qkTN^PfllISYww_(H_`aCr^@=J5i8yw|u<%O}4IPp!HQLQ;w3war89InpSJX4}uBnc@b*;iE$#l7N zpYa+8zcppUUp%O%!;Je@=T>`iM3=xE!nt?;<3UX{PAg*J=ZmP;E0HVo&D?0?u*_+g zshV?D)|i$h(RlJ)Ls7cD#ue4IOSKWgteOff+00!1t=qS7OLrDbq-irp+B}KZ*J!_{ z8QT;a);TqbFDwl9I+?gKNoFst)+M?!R#{!Ua%@qwYH23Z#aM-+^M<6xDOOc%Mc~z= zsya~ZGD(rUs_Lqm@?!g{3x*ES%8D>#P|a?F_v4*})#ldRH8Cb?RW1;>@5;`d_NilR zBG$W4g%PhVty@8h3ntGoQ5p7mVap5;&e-k9#)Bnl(b1rgQI)Na23dI}45sC0n;3Ux zwpkF%2M-F^j|i5V(ixa&*Vfl4#wqy)^n%4T_3`>5zwot9bD7D&1_igF(mTTqdnK`= z`m(^!zb$WB!SW)%uuGc0n?pZW`%Q;#MeNqYnkrh9^z_LwlI8ju%C?lP(B=c_!rJC5qSH|gt8r|A*t+=k%O-~sp z-PE(LFsUGHo={X@j^g;x{Pfdo{7T+u#}+1LlNdT(Mw4xPWoc3p?-QYqE(@j&oUJ`b zTkw;KqFN?R(W`r9o?H{f$*8E;Y|cWVq{`!NGlGpcrZ3B_@IP+RU;!{ZKTQ%mO<|9oax~*+%-g(u|(6ZDP^xydgN5T zxXvkj7z4pZ0-a*DYSk)-0j4T3?V>t4*GU$GU|!V<2CQHjO`1fSH}mCPJ0-}S>VW_7 zgQ;Fcb(w{iLB}du`Zyo7AW?B_n4s0>m7MZ4v<02W^3@`DZ zh;cKZ{nBJhf<=onvU_R5kdd>m8$If2cFkCM)r>bAh(?`8e@RZW(AedyRw~LF)dm#R zx{jS@+9xO}FQw0j+iE4s+3drRaFpZvLoG&Z?VxN_&+H9jQ|6@nGWIY55v! z-6EhrNz^_mA!!D%qMRaT1YcfWT^|o@mnhXYla5S1x+{1zNz-k~?W(|HdWLS7Ct0 zpxEqKa$HweUlf$FyWn~oXJpegIW1-LiS#HfoTusBhlGX4k3p}Dc&~(WHw)EyzV}z6#UV+H zlYsDG{5KtQK)?tPuouLF(gpCFPQ#hkAGu1*R+Hl2ENE+wY?iPFXP4WlaUy2=0G%yn zk#%>#K-QzhoQ1_z9KM`Y1ZoMY^mwI;%AJL3F=yfQL-Q-t)3di^6Dg^?PJy&`ZO|!a z%B)*~MO9ImaV-gLlXLT+T$u*ZGHHEXu$WZ%3S%$)k6f!ZDtrch!>wz4iQw~dCl=1k zojWBrRY#Ju)>y|0UsCm2DTFVoZW-}zn@2}8D6ytlke44ibqbFbCdbg|P=)h*j%Qa@ ztPHXzO`<;y^5^BKu-*LyS{*08bU0xPQ%z*&&GRj&F$-#L$+6F7#>ql$MX+K?Ir}m} zyr!bOjuWjiRUt>63ddSuV;I(GlS7$XIAY|CLK0q>mrDVY<@({wO6HPGvMVxmeTVX^ui?%E>&LR<;wG^cGl!;t zVib>WK{P*Uyh@68R+3q*3Qy_25{lzJGY{uX*tJ38+DyH?D+1%_=Z|bPkx$J_Y1kuX z`b0EUpvJ2Sc147gCsfjD&w_&7S^3$8+4(aI^QX<6lQ(Vh!XyP5t&NGe8^lsZN9N=7 zIn05ZmRRB@#OBfc)v!XnXqsX*z$6vktkBd*SJD4#e~J}(z(Ru_(D_L85Q`JzN20zq zcc7lLN&cF1Pa^bBVqQY*i~Ycount*}}Qr>i#SV=E)3`Ka%JH2^0?XEo3-qe0iDR@(kfany}4 z8putTqD9rqV=jm|z7vyyl-)MhG1-pW09FTfTdBI(rhmmc=gP?n=&uv$XDv`!^uGwy z1(XPuDE=3LMr$h*L2~Enf0I%dP$F2O_+O-Svp^|*`o=hWBifzU_K6ywjWwCRac8o1 zXxig4X|BPz0+2I#DERRS*l8WJ7%3%{sH>XP()JJRKUM{U(iRuPwz4VZk z+G%TMe9>7%M$YfY7GIL+^|}A%bh)``HygW}51W0UE6l-UYVh3hf~Ch5Oh zi?F289n$|(E?nbbTV91;%-o0(;t!JSeWZ^387!OpI;F|VBej}Si|~(vN*yUuLrQ7K zslkRR`7Q6-dFh|DzLP3!-m?F1Z7nP48fSB;tj1bQqI7(klyl8722h9Ww$*DC(F_Rq z1yNQo$)+&-*H@yTMX|aSu~?PPB6Kbgvqg^Dr(fudPVO3Q>YC^r-EbCmm%dxnykC)q z%P|##CfjT;pl*q#QW6xc3?}8zZq{|Ys+TTAyB!1XfW2M6$f#oXg6Rg!Dt9&9Em;*| zql<(U8=JbFlu^>hh2qxRwhAWzw`)dIrfXm+;dWc;f`3?1U)YuUZ52krTQrF4>py^9%KeE}C#?P6{kJn8d8h z71O-@+y6FG=3Uk>H2j5-Ik{Ei+I(l$U883Y(CwtfDr`X#W1}HlgfNlDZ@A>;GOM5CX+mQ6 z6y2DS*x^l>Tj!ZwTfC%P7gcnhEexf}rm%%$?zs+OS1;Hr*8W0bCRbEmmdT2?ocV)# zTk9-y&?r|wHcQYfivt9^h#%8|mWIx(U}AP&-r(WpGV$XB*Ve;c?`RWT-gMCwivd_ajHtX%9Q-|fCr z-26~T#pieA{nEhyX2A-<`I^jca!3<1O*TiUSRFGbZXfuuK5+n+^oyk=1#514(U;lJDo?{)a1Z6pKsqVbA3% zF>{v7gxj=ETn!2`GRhVW89HK*eOWkHF~jp~5Yl1WtN8^5g>!SKOv^9Go$LJ1rN^=R zdhTaZji<_$>}l%97w$w^zrxWu9Fs-+HBnwU&4(mSc6Ys)<>1)udN4Cd9NVZ8dNTtH zXGQ*WOPj9YWg&j^rv9zbkGlB4H6gZ(bMqz#y>n-(8?G~4C6H#5~3$z|9JFV>9rw|XO{Zfd_S!v$;?*{)Bh3}jnF*qnmGNegFX&tzR3 zPC5OQP__dSgQ;~AiLm_q$aSy`hSWW&N-7~Ybh-#u)NVC(d<{ZQS}oQ_9-}?q{4mInYzr)3ib+*G^gn#UbBL* zl-x=Ew3*!VEzF-di{rkTg|lWC6zbydBxywG&KE@@Alrw`$yV$vI%w22qTVQU!z?~s?m>R1!B`mMweBJ%@&(&ALvv2h3lsP?9Cr8@~ml)yQ z1QmrlC=aus=v+7pW=A& zmaG%1{8>Q`$bire)D-bY<% zNYczL)0@oNUamh*^!zrP;Fs_-r_IR^uT@yPQr#{nSXh`lH@S$}%ugy{{T>DVO(|*l z({FkPvei(*B&pP{T$e5>Zw%KG%KS<5GC#pgQq#oDRbiRi#3D(*DtFN z7(b11CdoR#d0;kNg$m{RfP_{l#?S`!(Y+)RR=yQW-QP zTHlbewc%&S)|*86od6SPHc?h`fuzz@-d6JrN*rio=ThCo7t19Ab<3q@ed;J(_j8?- z<^o7@(0uHTaij)djm&Ma+eHexN;m293%zju?@co+ou;rc!+oLDkZh`!Z0`!d&o!D4 zGmPDb6#hEht;!gRxZs=66Ylh=n<}qLHT*L^ZD=Z%R#``?nKm`wd~+|U*1}NZZLoxw zk=(D9W^?(1Q^4|4rfZ@0I^9@Aa~R2;XAP9U>029({OyYvzr*BSI6sN-4dlNMk%_ae z+NkgT?*sYmjMUXMI{^*ne~IatH4@*fO6o0Zx=rr>rhyw)HnVJum0NsjT8)?65;G!G zcYbI4Uv7oCBTDuYbnCn!Gkc`YEcy9frF8~0$V81u7dYOImNGN;f1kwFD6qzsBI>aBY?5?5O&uwySHr zQ-2Z5m8|rk`N1gMo!8C4DRXDfo8tz9l|BsH|5AtNZWXG#veFMrON&G|OmRuslp_pq z^9oD}(_cCAqc3wmEmpX==q7HqK62S|o^<3vw^hv|j7|9!(Un&9N|!2;MEse}z|i^7 zA#VG_tsq?|?tc~~0~cNB(3`uAVV-m-%zD=d$t(yDk^@)a<-Qlg(n# z^^Z)Bgk3Z9do;T3kZPV1Q_@akQo?M!47VsZPoIv->!MY4nH)eRd9#}pO{`L)Gsh{z zyWc+2ZZVfVQGm=!&ci2TG>aA&P5icu_Q&tT=>K&I zw{aIN#WxC6!>zW=S@ZJpGIjAg{3(aiBZVy&?)O(o^_x6{cb!d>t8ttkS}aW*rktaM zty%qubIop=`|Bk(mCu{h*c7pG%L(nMgx(U}f=vKuj^U8%I;P*+Qn5uLQ&8JFbyw1p zo4-$aN~yZCD6g!vZph*bBWp5#Co-b|+^w{fo;m#6G>Y-})&Ly2vmDeK)8Blv(o%r%j$Wi*9wZrAx|mAH8f3&_ccVLme~$iue!{~X7igEx|4<)pvcNAEiR)4=k){1t|-!aO>aC_~T0oHLc(;Px40rDTF!Cy8%&B9xvvHYUCxw0Uj1-1TNC5N2&10J@A%Fi^|ZbZ9Wm`R(>iSrsp*5vt!t5Y{) zu;UsA(m*hVRB3^(Fip6Z9K6H}`a_Y*6tdIBn^L{lE3n z&3be({Ryw(?bpNzC9U^uSjFQ@C3J?3D=f7Mchk?O#XCz}QOGWsWk=>2t`AE5n5~9C z?Ap{VKhx7iM>|la^JR)`_cQ%1Ms==@{m2G4a5p-|8fHwW;CyBUqh{CdJ)&{UOvqjom(_jnl~_9~Nr) zA3F)t*jy;wT+5p?HM?+b;gmW29igeyrcC{v0GqhZo4uDgj>qCbVI~6*gK0vexKW~^ zX$604QEMudw2&8eI*QiTe8gUa>&Foy5E{6#( zjTb`Q9p!MQs*U!>FuXn{JT-1hGj$9Pb!lo8kbaA)Kj4wv|2N|=IqW9q5n&Qi)7cp1 z?|9X`zDbe%!B%=x*M3voca47Q*ly4zWwlA=hgHiTk9G?C0I|2OQ8QUExWT zn5O1xL^{xS+iJE;C>>82r504^gX>D}=XOoKrJASujfZz!ZP;aR-ksm*?>I&I**s%6 z3g~9U{9&bdT$i*|(f)RWyQt-Fvo;CWuQB9Rx8YnvO7zmET^ZR-Q^OnZTH#diE4W03 z@>{0Hiz4h*(wDla_*{COsVswBF$an@gS#;~lxFdgSn<+0r%#Lk`RsbR!9zvps$8z- zHU7wu!)g1&?}>4^c`r#4d+W@P7z`IaA{wrPrU3@wW;7L?Zs0 z*Oc{;j)#&bBu!(RnDleVDWRIl1X>ztk4}U*l=mrGqt(GABS~6G;pV3 zx)MheiGx4;wd`n88w`joDJkusfgdi@Y`o{%p%^0llY?n_@XznZ4CY7#~<0T0uTQ#j798=!X?dB zgzpg(b1ZX~=)hfciZ>ceDkv<-T~NSmOW`-!YF2s{WT3^#W&LNBcY%r|(PxGWne4{@ z7{D4H<8qXWr#Et!u`J5weUdA8qV6xd{RMA+vSHD1bu;=~(NMJ6PFq1qwNqB#KluMq zL4T~s_g5|qE&m!DvReYB%mtXTNN>Yc6=nR}dr=uVly}n46m<@6TTc4h4^A1JeR#V< zN{jP^=yXm?6}R`-r08X;Vn|AfRD~YFD_@|cPh2}KDfOLE;-*635%vG0?%kj3I<7n4 z^Q-t*Y){OHl64?HB*mdj#UKEZxWX#{C{fXgguU=g@ zC-?-;kETi6&!*r72I)AJgk8W$9o*KdWLJBc-SGt9q_?)Fy%af*(6?h~}v?3Yd zmbOAkRe^238NE%Zoch@^PonHnX5*VI(~IFtEeRMRK#SHlqDKjBtTTimM5p^rA=Bwa z((Fwp$U{q#XJOfDrEI#q^Mh&2y;CpPtfT|1nu}tToU>LDA*vd=WRZFs`YN5^6en`Ckjmi^i};d%wvCV%WG9h9yQ=t_X$3k6u2*vvd9Y#>Ec zu5!zjkRB?weqEPP1o@%d2<$b+^Oszs;^k*+aH_q&BjQNkBOe8z?c5fD52a9(R2NdC zB!t4ohW3`I`2-Z3H++I^?IXXL6BEfnd#xD>u*{WkdOG_+@3LDDXm0a5piNtsNy8g! zo=@G>p0|BE1o*>rQya-YoeyWwL*_mAQVuu3(WzKL48V6uS{rjsj{KzyTy`CY|gCiU6W$+W*!ALn0r04Fp~FrO~Q>{lw5Chq>>xS5TW+e z)wOq3Ntgrz34ohxq+*q^`x8(rxi@NEX2x=WEz8I=Gt-qbQmwkelC-xScSaEA?!(%c&K z`PK@ls0Xw)zp0GcjWVj%I&AppybK^^TQ>&n>>`@Fmr39VO@Ni$-!BQO@)a-@3lCT2}q{0~r zqmkSJX~8~Bd+eH>zxFy=oEr=S$4uU`d8q!|+CFKcpq)IC&d!wDeC&+5mlcOlsLJKF zs7;^RfYB2QxU`RCz=xFmz#G<7W;zvUt%{@s$i~W5+~j23Kq_oMc}uq|2)*m>9OhbL zCB?n*_46!CtA{Gtl43A{E3^D}y^WTF*#;`Y7%YcUdPJ*PRTJ^p!;Y=^;~hPP~`#p5vG?cP%nSENBY5m z9lXo;C!etn^keotG2k7YUNU?S1mL?iK11q<)83JOtad~V*hlXNi)yrPUeK{qgXg(H z01cj5h)%0!&MKXRHMJ!XcWZC@nL?KiA!5I)e+I!+mCmtRCRD_-OVozUP59#K8f#`J zkB9daWxLtr&sawx#35O397*4AqQD0AlXlHKtZM?m2i3925+Xo<6dD*YFt7)}FmjqcLL5Gq7dWWVi;P0BTmUpp$@AD9IqhA0$eA3S!lnzN39Eo#CS_+%XZ$gWvH|6S>VNPhW}u_;zrh zd(*|nQt~&gIxMZdwcBE>b<*(J~^O*`m2w!NXv zB6IjVm4hJ96#Ncp>~gGC+>V`8tsh~PHyy2Pxul#O2c+ZYS9kL}Vvq6A+*&_b!T_4j zm=HkB^~`D6BI#87Zg@tLTk|26yz_^xn@SU%Z(Yty2-ul>n-3w|mpb1HYx7d)+n@m4 zxsKXK5DTi`(1~rUPCrQ_(xec$0w?2eA88T# z41WxPe5;r_b9(VvRV=!qr}`mon`e#LO$c(gGy#H}4n~yh7<~T_^in|&^6V%p;8a(1 z&R>`;klwl_i955E&!8)-ky6BT!@IgqNNHA@0=zubaN1qA{-K%!9v|}&E~qgTKM^HZ zEX$ruS{zvgDPAA5Nxsps+u&pFYkKdGb%)Bt%ryTk7Ki z6EDwRTr4_P1dJyE3$WkB!sYaf{m_|Mp6QKWzPQM(3M+e_qY`i}G%4K1J@=5R+D%@d z>jF7RB3gOU6S<(5OH<40L>mM34nl+FmnUavVE2rBA6`RG3lck7wh`2cC^5c?7tW@8 z*(ax8!9Y+oij?&oD-@>vz0Ty)an;XYHsr2MkH)b zE%#=o=Pu9orspOW2X%IoR=rn;^|mlE{B3XMfcHat7j~FavkSWhs-(cl#a17o!|DPU)3=__4Id{6_M`S8ZvcdEV^WqL|+A zZi13P(;1WcWOA2jYPJ5!cE6#>a_)skOZ9~Ec(RB&#o{V7GUVH_&eZg!$+KS4Q!C^b zaa~1Xea9>tgxQp(AGlEyC9c&08Ph(b1qW$l*H{aK(lfG|@doW7Kb<$VYt=^;AUynS zFV>O5%4N8gO(NxaX*8Rj`L$b9Th6bO(3w zwl-xgo$S_A>8lHNs}grbaeW1I^{y6Q8Sh*epPr%M5BlC%D>)&TrepEIW1R~$S?awq zKXZAOdYt^}T+m*J8xq5bG$I-rjH4IKfY|bD)@rm*~El3jf>+m<5ylw%>a=KD5$=M#fT?MbWF!OX&?xL@*C9NnrhFk z+IDh!$@&j^5og0sR~iyGR#&*V6o-!=a&fcUxtJG)_8c4p^z`He<+!Hpfbc}N*KV0@ zytX1u;}gr%uZ%CxFEY33`D~{8u`_K~PW<@2?u{jY7+0Mj%27zxwB?{o7@G`F?zzN zgbbF)xj1L}bZ&T=H>R}Yvenh=IPMnPOCKgZm7YYTx|a^`Of63@c4p=;PGg++C^i?^ zaR%ACCj)FD6;YWZ!RJ_KCSH@4(Mv<}&8RvqbXVTORf?Yub;0HrU+c||&tbvOPR%WM zW~Y}XvhEG_)4heo`3VluOwV2933*W6`B1_O3ZGs1-?w(2oz-oEg@n-Rv$EdH z1dCXPa5kuHw@cGuEJO_98PaWL?TS$xy|=i$f#^YJ)(gS=NDhjjBH)- z%ay)Dhem#)Ge==8iF*BDRqw*su7Gy+*lAEd;=CadbpXsLE3OB|c<^rKkRYK1q~CNZ zNm|y*GuELa-z!+(1QqiOT<9~&&EP0;DA<0T<5wzwE2mg;BR*cbL@RbE-@3V`J9u{A zTEBiPydx#PIH7QaAD9eJWr?3yUB3@q*4n68ts1qs%PIx6f zye#|@r1kC4gx#yQ-yMpIP!i9{rF(s6ZLRnk3$}xSz&e@lXbKfdp7&#ZrpE)-V)OZF zcYJfJxcR0?DyQqWn2m{3kK@*y(qk8SroMU+SNR?U#lms}3M;Mcy=9d1>Lg z06*4Q?47?bJ=asofypVbm~xJYp;v2Rhb{Td{1|lY>mE0WU!FR29~Ty1IXVFO$B!^R z>WdsP`4Vu1yvoXZlztgeQ#)tD7O4z1GOMNto6t1qW z5B=)WbmJ>X9;H0=tC{)MuP8kTz3@3@69;||S_XhRcuc-IJfM7ZG&lo72P}mlwPkjE zHG4=n!zV|ElHrB`S%oq9WkFe^s&GJ%(S?F;SPM6|JB#rYf+$s9nhHh*)gjp%3MsDy z2PBJ&DV-m&hcaVK{vXcdV`k_IakLhFhpbY{G#^(ZL$FA%=9B>;-o>Uot#c-*ye&ANV zYip%Fr@-d!4)?4tO;#?Ta5smCR)D!@>=8X9ZiBqMIK5nYR~_9C38NE#jJZjMO+!Hh z3wL(u(p0)n*AxLy7Nx29N1AHMRn?N~Nq16O^wzP?k{`^rK0-&! ze|lBL{xPffR7L{j&zHT6=ToH9H)IH++AZ38IWvu6U{TQ02C?U_rso9BwVCyl)RUz| z={@nw*uYJNFxbMM$H#UFwgqjAZ-gC{(B{um-@2VT?>pQ~=di2H=V`V1wwhl!F0GcmxGS#tCwqIHt&^L|ieS6#1zU%!4lxry_dKV|g zD?nO?NH99WRA!*TdLKM%hfR%Zu!Xj*u+3nNW+);Q^&NRlDm@!VU!XtPiX|fRR;;AV zMGo%m$i&r@=FT_Q2`xeic2sBETIqut%vt+ZxG|#}IFV`H-an0N{fD-#eb<_{w3+XX zCyba4_FXua$-rpH)cAn+M8$s(AX=*6P;NLLeXKR=8MB2NWIiJxguB#5`WXP8zPNT!?hyUj?t7dsXOK>R`@M5sGUrg_p;mX;ggX&Yw2n6(|#I#_4zUiv3G zH()mu$8&%^0!qExH+Os6d%JIiMz%emda10vRCc!dL1lVJVf-ALv{5Muepw(?*2C=^}%ciW3D@#UkF$=T{u{z0^ z*-r7Y3x5^6AKXc`eWj~ph6NaP8yPO01sLOU`sI2lCC7^3F{o9(HuQPW2$R>B&Y~H> z<}p7pEfJy8O?0Z;?dar5T&q0S&~C-yPDr+zt2ZN?A?A4|V5s8}&2e|j*Ff{KUw5_y zBTIE9D#NfNN#%{sGWPJZlf*)FNQ}yzNhuA1A+O7ZX=>SLYDON$sX6EAlzXSIVc zGT63SXI9uxA;^_TUdtVr&Wui@%!oj%x{#gvmUvvc^n8y?>Zlb?#4OKdhzGMmArnAI zIn?p2tEcGlCbTK$mo7Ye3OfkNW~Oc&*i&5y!jw&oxqO8%LobK>Bc?7cO~$+x@{-bX z_SK25g>KSQ>jV02JirFXo(6nCzbu+AkMNh}zDGfI6+0^w4)PNrep0z+PttML%H=`x zk;A1AXrHo2i!oOBYDS5j%eIkpb$6E|JVF$vxNL7JM}C(CFetJ+emH8Bz}-t|*TN+e~UqS=*%gLh3p-#Gl!}3suwSLhFcx&d8Ag8 z$+qPfd7xes`&j(e_8pT%3Tw|I5h_JRt8xWd=i2wfmt==hEi0cAHBXyq90`xN(PbPY z#pbn_pYc6IhTLE~JpgY2gmLBD4H;N!q4Jq!jCOB&npGE7wQ`F?Q0G09w0m=XdzWOZ z(+I!o+b=xV_NC}~W3BmR-s54uJ7~nvFB<6Dx?NIXzX}&Ex&&#!8}3G*zV7fXv|rG)nuDmslDeBeO_QssrZ#P=I5G?xhl}g z!!W$5Po^AX@k&olf@?~f2g)Rogjs!M<5xq)swfD}l0!$mwTBsVVx6pNZ5-h&a5am9 zd%?Rw^KHD7NhCYHrr?e|F|aPJ3wZ@KY@Iruk$#nw7p+_Q@d>t^^|^9OBSciSON&sp z^kG{2H>zI?2|u*6fy+KTm(~;5<916X+;3d#hLPEj_B5)Pv7Nv$Z2_41@bO5T`vsKE z_xVcQ$6rbq%&HmMfd%%DTfqm+g*0+3Fct%@Iw!Sj2WEEG;=2@kWmaKz_oVHhYHodB zq5fwI&c1$p?+w%mxr_eO%+}j$R5?((4u?hjN8V9C>0DW2p6pzE5^{o}V?BBMtu3AH z)P^o=OsM|W8=e2C+7t=)ahQJ41yy=?Jr)4=E&1f~z)j?@_B=(0<0h68=M0)sy6qr; zXOvIO%<$$RM$rlXnhzx}+X=G6sg{%yv2xPf1dB5&D=HFaN&&$3yt-nNBlh+>9CG&f z$>%oSc|*xey6(^2Gzh~CIiX75=u~e^T{@@_2H6c+8rxeTMf~c zK9S$kh_C5n6u%R6#pLXA>L@-4*%8g>7R{+WUaEf&fHCPI0Ob15J|U$!tYkb#WQrv1EX#B=3xjpeb2(2-dN$<^k5%v)EtM{m7$ zh_*NKwj^nwNPRPA-SWvwFWG%^jY`oD~)g5G1vda%#oz?Z5*KYZGt;l9!N!46g0;}sc zP}}~Fa@cmUBZ{T0N8}6`u}vi&)%?_J&YgRnVz_4g#O75~LWEA^27f7ABn?D^RnZdL z#WOwbMI&%c+)L=GD;EnWeb@d9oG82%*B?t`&Egw)a8RaCB^RQ43*xGh)gEplk=Cfu zu!S5Bc##sdanuiQ{h&YQsOC!&8^&FrZXLGdB4>-^gt#d6q3oz>irlKTOg@W%$<7KP za+fMu@5wX86DVd^;QaM#-vMc9iywcb?w*#gfw5?En$)$F8gAg0#g21SY3SiFSrvQ~ z%O#+dJkLb7bvaUqvM_r_NNuD&!xb!pyKZX@4hQz$0A)beLihN>#8Ov>)H93#V47Lh z<}kgKvo&`tj54GL*#lDxe|qK=Iom@(xw0g_%KF*XX&nw)$#XSjYCl0%zAs)~>d=_6 z?8LbI51kQAjfeHyXk3A_)^iPrtluQMLyF%HTl}R>Z^dpQ5&U=(-)<8(De0~HC1Ey* zdbBTX2`(&*59a}kl$68SN2761+n3Z5J^XO`C@x0YEcfU_WaKxq38jk$1qZHd@I%>}bF%zN6rX zA|~MivetRUC`lcydG}>WcdJlU++N?gr2?Jb^)P(8)H#fU`4f0x$v4qL@CBw6`lb|* z3AQ9_=QXcOVb{_mc6WW7a|^CSQqm%EnOkowu0ih>p-+R8$+^uUY;!&r`zzD^<~K_y z*OEBNu3atO-Lf+2Dvxi6dH?LGIC@!AAb9M(p3W^2-U+jf(UIkq8|%piv>HwW8)vJG24u&xcDUoMb)D7^UR1|IGGY|_3?u$n2cFx}F|ECuC$3Us@*6U` z%4cTT)*ex2B(x%gE=wmYCyunTV5yKHPk@aRGa^NHi@llIGpDJ=sGEQ2z4~2gXEE!i8 zpoAY{R7_{fDT&kaKWdu10zAx$`2`>Bg_3c~X%2$R<$6QpMq|_STiJoEI?5JX%niBifU6oX0;^g8v zLX!4mZS|Z^{ZtyPZQkZ^?M|VGL{sc7Ase%UFmGa_3E)gF%}amplG{tt1Z*r4B`64b zWH|+Tf{JYuUNqXtC0r*iP`X_nzA@sqH-<-*VJz{V@-{k{2e)M(n7^%RYTO~#^6YHu z!=m~0on}kcuBB6Zs>WO9?_d26VWc3yQZgzp!@YJv=n=QHC~Y23;F%F)^773Hu%NKq z>Tv2K4#(m&i!F2V%tF4ifsmNgfAX-`X@@=3hqg zn07+^?i!bhY*#}xkZ_N%0I{qxx~OL&$DRy^x0Mxmtdl?MU2Q(v@JBZ>rMi{$fylfs zJoobX7uoz^7sV4bLNo2?Z>%d=&H*S~6yI0sUVN&vyLGcC#kqC8=h|VHt-371oCZ5P z?=l?~GuyVajWR^adTPN!cjpN5uzQM=46;%HOw6tMOfg^&qTJZ)&^#Q?JkohK^L{L0 zTlIZJu0UCqLe=Q#-VjJ8@IZM^ggNoQSfIvOan-&-RM;!ZxtukUWlrOOpx>G;?-Li46B3!TQ>IXn{N{YFX_b#no;9D?ESryA zgEYRk$E7ra@}I>vglB@JH95+-%FQTCz2k_O=eFCq{mti3Rw5YoL?;_C&EhREYP5E$ z<=N@BXSdJPp4Ou3Hgc3&Md$X-m9v~~JWt?ebKIeRqL|uTO+OcxH{T|#I?3FQb%_2* zkU}HT!w&LabQI&NTx{(zSUgUsHP8L$+avX1vN0g_z&_qqVZ9!9hJy4%A;vF60g*S0 z4W}rJ=nHq1bRdXsa_RhX<#YT5qD3n1uy=FU&h1Ehg-r;)#zK)R5nH@yzkvX?4+~B~ zvz@J7whk?VBm<7if2fMoGR|JtYJJAZ=$KIZaMgxs)cB!O+9(54_0Fp22TlE^&Qd7? zBTeDE2pO25fg%>luZ>bm=*}rbHGpLx#C@?KzuZ&sZSHOn-R?@yu57l2>}rQ`D0N)! z!=xoXLJD5`mcUgklSN=gb=pgTnIWWv(|iqk=q&7P>4bK7dbRrsCkrqVHopD#|GI(z2SH~9S|4ZDj}XVhS|cBf9N-RbAQaq$7@b(aaL>=J3!H6E{#`d_@f_1%rF+r_uu-6Pod?eA>ed{-BuZ;kEjy~Gz@x}m$g zwsMo}EB2@eLl)Jy0P)*5-?1jM)3a0MR8NhaJT~FT>@M5>_ARoypC#LEee*>xk-B#4 z+~ws9-EWrd1QEVucZyJo9H+CzH!&TKUFlw2+tkT?fjYDG9mQ+c3XQO^0jwL{3+%?R z(^_oeR`UDqxic@y!{oaO^@mS}H{;&IY`@iXb)_<`7*ZsT2{@?XK-Tz+y zcl|H-@9ck{hj;eh>)-ExzW@II4+>g-ynm;Ep9Wv{?~&>Lh@acFBrPz!*Z-8EKIz{D zg8P7WzyGl4KLCgy_rGWxHGunJ|6@J`G6(hxe*7F@?*w3*(7w*x29NaY2;IK%M4W>( zS63-KI#G!Kt(eFO&7uEW!{NX3li{)d@LA!IUq9Rbp#R1G`~8QwDEj8v*cSr}Y?|}$ z-}3Jl%>I6H{JGTv)Yl)r!)4c&iiElNgsh07xJ3N&S?VSf{hxug54)_Yu*jDT_>{w^NmxC-~AIpw7mN@ z?|#RmnBK7F8>{K{M}|Jg0J;HTscSmTTKx}3)9R;X7}7StP=X*+;>F4b3GQ+T-@@`fKL@ z02C^>&pW!m|NRO+KsTm?%;2vT{a@62`k>a6K)Y|BgZ;l@(7yt;!Vw(7X|N1XxGTqc z|E^W+z~3IFR>!gaf2YUa(sQ{2{omP82p?Nu1h}o_FKuN_EJARi4e>w$Uw*b3jYXx24?*nhvSZSEc{ zImo6tR_h1wE9>|0;9lH5mHf#m6o6R%&qe8`{6++aPJXrjp5(O6`<@ggL_;^?yC8-B z2K@f0|H(5(tWFl7Qvy>Gu__*Ebgy7pBszfv)O{|ZrIGY5?RoaEEXDU3??cU@ZFs&N zqSqxeWaeqE1r38*-+xcC!AbwfoyIu=u_#L%pkY9)lo?vk0T%@Oe`iyya@Y}P6o<9( z4vSjR&;aEA#PB4#xSv3;A-6^~kA~E0XTP^uiHevq;!Z65J$O{I<5Lq7zd(EcS4@L@ z(&oN^E=k+SRSCTg+BAivHwL zX8r!OsGDzU#tu*K?tl2S@i6m|;QSa0lVa9aIgS+d{3a=uu(VXJCV$6OxLRUUea7?O znoc6=u$FGuPm1AYX!eSwgfLJStkeWdey(D(bTdF zyGU_GXZZO9t74||@iQz}m7<>e1`o-dP`e{ht$9@<(tBEe{x)-f`OA}h`sqO1iY0ik z{wW61dKr(iCMa8;Wba#E?p|A8@6x%cL`??zm&GbS5Dw4gPZRN|%vSTDL@Wcp%BT|` zoUPJCEGMA9AMXDc8vLOK5=c)uyEDC@6P+XA-}seHgwX^Q`YrOy16fdRKr&IyeeBeq z_`=lM*knSJr$Ybk(V21rOrPVSUxCi92Jm}UP-gsI)jW1JF9EgHneMW*6ccF zhCEUy5JgR(sMR|AY+(T6KiUF-qQZdEqn~7p9Twxhj7^J$vs6?X(ev_e$J7rLshlMo!+(h%oU z^7X0avkbA+#QN_PQ{UOnWmDO!x2F<8}7hgE!@s@%=#Uvp{$Ku zX5y-8(i_{`yH|Y*X_Ch7F*YA4JuXCbb=AXPu2QkNf|BY3YeQ%=8w9jfAE=EvZ19 z{l(wxxfmO%JO0x~kJt^JsR-Zu958PsC?UK5E6{I&8$_f0AU+jC%ARb5PXts&vYKxJ zU(*q_!8^s&l_|Q+_fE?8k^f2&+5Z;?!ff6DF?KODDeVy95K z)Z))6Dcva+c|-A4hW$sD=Q9(V29H)*K8(2stevJ*M$DiM5u0tih)!C*2N_@P|G-E+ ztUjyM{Eq6aeEgH3ZNEGK)$B_AM${u}NTSI_WqO5dO|M$k_Sb@e;j|evj0i5zO?Qe{ zroa?`O)YeaSEt5b=I_Pj&g)$J=Au1NrkDG9qf@+oe(Ib0M+f&1wK5>2O)X-sXqU*s zSDu}yWV`8$8UHXH-aFjaI)rz)FZw?bhqFkyW~c0kl%U9;o^E}5ruFG_txum%PbtM= z(Q>dZm)qGGk)SbErsIX@;!lz%XE^`u&-GjRZmxVWpZ(|!6yHNI7=@Xf+qYN)&sb-L z{61l-+5=<9UEQyGH7NUWcU%9!xE4-e$?`oz3xi>&h#}x-ZKMRTDCTxvCdwbgFWqY! zIz?`h0j?3yKbZbDm<&F?ku(kjXTaL)Yz5W#K&dZ?sx ze6CoQX)2=~nZ#@t^EYhJY%W5TqEqD3r)O9*B?+_YgUIY2Qh;Ke&xPwQC%~*vA&yEs znH05^xo-&kTuof_FkPwN&~yAcXJ^Io0imnzWn3_IF_s()z6=v^<`Es)E}g&27#X7d zkk7MEKpNhlq3&}q;iPwA!TKY*CDM{{pan6iDa|7zr7Y_xTO+mfxmDLqbQLYftmI0dd?BI# zyQ2Sp^*@q{tBo_Nna`v2=R^T{gj9kdJz8Mj!unwvEJX~<)@EX!7F$Kvxykf4`AN(z#i3=2mov}b zxLu<7ELM~PQ{_IE34khkhCprELl3|1O5J!K}RWvJkP2z}hZ_F;_D&KONfs+j7 z@8RgftsP3M$a(iT$1OYbp(m_i9A*Fej3ZH`gs3|R24Ydk0Ly|k)%JN4!;=u@VNV)b zG%@SMTa-=0vgDlzDkHBBHyzw4rk|ZBO_Y079e!%FD4lV0b4`~oYeqY3e~C-K&M){s zVP_5PBU-o7GqajuY_Cw`YfmFvVWyj`Z#6UH6xrzAo~>hPNb@lF7`c#CH39EoOJbO5 zCp+hm0S*x&b1Y=Cn=>`AS2(;yHfoPKD&2;&1uts#jb+D7HAyOcA>;(!x0~R6>*X2F zv~uh#?ZZGOE`_D7&5W$|oa z#6{J*@EdTQu2-+>r~yAiHW6rwAY6M(Pqo@gAM@>uI}G+1mt}a*M_(Gb*rMZ4Y;Era z8Dvsfwo}Z0YlOeV1#WyK>FTH#7W~W4OPrVM?cB)k+M7l6l(Dxnu%whokU|!T1Bb17 z1*TXcV@r{T&4^-Z{`~*uOOaH-_H|;eS~HVV*KV1V3OYwGiW8k896A}EFjw^dffWTJ zXDay$DUbkF^?wN}F?P%hiO!qFKz@dnDjhr-W~3{HF`rqkeDFOv;HrjKuM_Yg8=O@V%FRj1%pI?5b};gH+f7cWblSJ_D}zx^pz=T ziMxmN_Y-4HhF~5KG=N8?B*+!+lKNDVa_s+qY8m>U9P9kiw;-$gC?d)0;9iDEO}54S zQimE`tX^qP5^2N3u_<^Sk*1=-)yMtfbvyB)jJfk~$o}KS{ZX3-nc&{T`-dI*;K3UG zpG6$qCUCoDyxf?j39H zLO@DgRHzguJGaKr$$3KUL%!z160BN6vOl9w6a-+0ae|{B?S&{r4Po@HZ4_qo&Qt0G zbm(uSXY>G3s=hC&WtOyI8_YMr=##{=uY7hiu289$8i_=T8_>tN?V4m`6 zEZiwf*jJ_Zja9}YjDF^)yq)*?PpP3i*HX$_OWUM+G;CmDy8G`iy4XT0JlJ{82io!@ zQ_%8-!;Fv|JYm;ZYj5+t=gAO|6N}0MGu!vzES27wU0_#WjiMr3n?26v*|He^B<4QR z*L-VKDJaL~CZ)4WV%>3n8-D`G{zif% ztbi8CV^`r!hG^V#R_~B@xW}pn;ghirT;Q_cdxjFXGs*w8@MS%bo=YE>RlS*;wYa8X zZt@BvpEy1)o+xD#HZgb)`O?;R4I5>=uEJsuihujRkMI85XJwzHX$kqZE|Oy(D*j&` zNLH(qrrT@$l3TgK_B>pNw*E@vkxUR@0zI(}2!#zIetN(XGbXZL_Qc&obq=+t8x!s# zIliw==}_HesBk=sUK$Z9s3Polw_s=g!*WDHr#+3|fpkG9dTRGljV7(lz4G%YFVI1@ zVnh;*@38)%2z4%W-eCZx-$l&?2PzoAc%pdZlf+R;$?pZCkbD+6$ajmAB86mdIGpMt zSUmebaDY@Ml%hG`vZG_(^#k*txJFDnI@BQ+B3C|z3UIZYEtb&KEZ6qi-k zz-nhbL%+|>R~_!s+BZR}Fnk^vr=i|EM%@V>?m0!b*+#_PM9{dvhs`{BApFbta5II%uQS6XdLj-V(*1-zT5+U zy_qTQ>=9he$pc@-;4$r&n8tQTD|SVF>g@#2o!E=Bzwe>{7q|wmLL_#;5+}})C=yV< zr(x?*lbUW?<#}Gd(kwsPdaORVkP$2KCaEj49a5yF1cTxpUlNrKirLoFEqdJ&W!Pq6 z8e%_f9$9aq43w7~Tar{2*Rm)lt9)(e){ByMPR6npwZ&{CXq5R7h-4wEjSM8qo;Q^& zR;%7Z6)2ZJeq%r@K(DV=&$=qZ3~5p#ia%&}%u($3TbrI>N#Sv;nAW zCp0CtN_g3N@s*ePcriP<8j^KguqY|>NVBkk^ffJ!YfqEzi9$RTjHRwTSL6rH82~(N*0O2{X5OOav%u zjdqfZ4rn%;QLdl8bFyozI|J#FA2??sXfogGvw6spXiA5$Fvwap~&uQb3n!Cm_wW zRUJU=P);C3E(OKK@>_d1ul~WnXVBCj1m-^&__+D02HmYg;Lj=@huaM)p`@y#sw%sB zhy}FaY9IjA9}I#9z$Xe7*-696C3J&3vLAFW0>8t))_Z2dCj#G(=kqv~-)h)*Lv6e6 z*2XF&Xjc{OB>J6vYR0MvNAK_;@fZy7EWm?&2~wS;@l5Uz89iIFpZQyRhoLt@N@&_{6 zsLFufVt1Trix z!589PDddA!U(I}S%N>f*{K7Kmz9lp6nw)X;k=urVPoZ_JfV2hHKx;5N8JFn*tWAyN z!2S2XLY)4FMgGLO!!2UVezd@;iu<>TkRgat00-97ehQ0Wk$A#4&~d|CQ~;I3y%3TX z?Z7bdp_c0iP*j(27?Ci&3Jo4?t&c7XL^N89M6i6SvqH%}{7My66c{7O?185E*LFE< zMCsTd%JR7(KQJ3aePbMjqlWk%hw#li;-3&zSHHvuKQu94dda?7Mp#iI5qZwWu@qg% z_C-Kw2boM(C&pTA#Mn!QjI*5%X9X{Cz=UZUR6J`VrVXhq$rfST^gYZY)rS+V9xC!` zJ3{$%jizL=YyZ5GSS_uBWJSyJ|MLq0dX){rFO1F$9LtIZc}N7s5GA?(|XA~1WL zAHA|IAi+JXpUMZy#?oe)l8TS7D(xUt#}^FpftV;rMg1Cwf9iVreSGDRaKb*nSf3Xa zDd0LiXg{|$i6&=!VI$Esu?%NM2Gl;cF5Pf>>brn(pPY*1)rd&~cWi5$(tkp$YbX9r z%OQM4V3A@%87h!fk}@HAp;{>rDxsvgw$ajQ)c_PXdFh%RzfUI&maDOBoBUo{f7?i5 zB@BY}7&+P0fePCM9Y;xs-pX&BJMcDPZ?<)tY$9UCG? zgop?RF?^@o1`VH1W*Q5o-RcTThK{KI3=%sy5d%|NU8P|9rY0#35&;aSEg$$QMe=!& zKz_=*tMDc(XNQSx*9CLo$js@{?)5T z+%O+(Kht+dQSbRQf{7Bls*&%vx4Aa#=m2ssDJY1BqwB^8r02VYo^Xj;BI59O*hf}O z#S-~kEDF`YE!kJy>tYDd8;v?87paZqA&J^zSr)mMl1V018rgYSOAw$v5MQ;w$6EVA z2ug>V89~Shi6t7 zp@y}aXsY20cI2XI&(k%9g`b^L<-y%C1gN|PBqDW`QpvSptnjf3(5hvwiZ^Zvw7$My zOpMRWoO<3wegWs#YDzi@K#u1AkK)%3;~5+4g#*S4>#Rw-5(pa_hjXtTjGveaCuWc;b_e(-bi#_#15lVXLo4|$lAfuN+58$NC2$4xoL0PnPdRM9 zneIfG*g(2d>!TqgmVBK+SgBN_;BAva%s|GZoj2hV?FKsvY8%)R!{B_RsEyAej%Fn0 z-!i~`MJ>@S|6q6tDwIKy1?{XY&02i3%PcW_d|6JtkRRezhPa_URmFmxUTVnJ#{`B| z*D)lIIBwN)wU8~Kvz#%<-2f^UAa9IvX z422o~b>D*7EQ9g3{GO`X=5a%TL4e=!jw5% z!nH`B7gIAAiW5__GW|Rh2KHLhGzOF35<7N=#a{2)3-3_)pr;F+dgsTNrV?VKrKYS8 z=-J_I37;iBS&9{*LrU>u<$r|^g&w7SW(g8)1ZZ1mQ4yMsi?Ryjn$wy#;EX!m3CYvU z+^mprQ2{LBQh&SLdeh81$xe&F7@|c!;bp zcYf((JW$WCFfJa@+{_r!vB<2EID>Ez#T6%B;_lB#coJ3(3mj@>Woyok36^%LT5zp| z1Q4NDMAZ(Y@H3TLzlxHYpnLr$33TKsgc)PnwaCD%xrINez~Wjd7SKM zvtjVOSn^hj@rU9&KXb*pttP%&vXEVe92}`=^|j7VXoaPWb7fvs?U=hUx!#Z8 zy27>+Lts<6l|;JyJdfB?q9C|lY#xt-Tya!WB1Suvmy)%L0OYNi z2HS;6(pOl+A^U0-V3?S4xm;Tx&^G{;`(aoTX%HVY@7GqumHGfc2X_icCcZJr4Yfo&70)Xw4eFC){dyt2x@wKVr(xaXt06Ed!)u9#1n5#(EL6v{#u^hxi)S7Z-O6|>U| zOPLa>xKJ6|I56>AZ)(wq5Dl7$4l?5^L#v%^KV*~#`o%)RuPcu2mGzxxxs-Qf%e)2f zuUH8W-dfKfkW9$-f_yJ~4Ksj^FN)oF~yE+nNjLEV?v=SaeU~&-|1&SDG;A9azHa50!po`2HU0#V_?Qy6jSQ(#n zyvN<*Zanh2n@;H{B?N}mh?fgy=JWd^0`MsK|EhX;x@5^SiB9_0x%0C-xnA)h`9Y(eB6JV+D1k){=C zQ-MyUrYIhwu*48lDkPl0PeB*wD-bG~5%$IS`GMJY1D4)#XB`UnRU=0ly?c}WL9Q&e zD}@ijr1aJZ-Iy+BmV@V9pVM%R*!oMa)g~U1+hR(|Oi~DokCb%bX-2^%$fO#XU6F8U zSGH=nwVVeTe;mU(-(Qmi%o+SJ${#YQxpLyZkhc^~h}vF=WW0*11Om(jtVw9yhxjW8 z=yf#8H{W@qoNUEwJZPv=X#cIEK`w5MKo15%>Qhm73jp!0HeXB#J{m}h3LZ3j4Q&@T zAr37j5#{fr4V_b3VgA+Hg7Mjw8_;S=L{%g6EnGnq zlpy=`7$rd>6K|{g3oTy;vy@Y5AgX%go~2SqOd2d45oZ?}*HW%gih0R)x#Of&Dgun) zqy{_+s5L-!skPJ-eVX7=_-w>%gBaI>EwCr6GbDJZ$k71b<)86cvzdi@vhTAgM)!78e1eNbi2wK*~* zW+PNP5Oy0WaxSYp)YQfkkfDMdkW&GOW#)oa`)m6E-a5YR9>I;Tlmq>m7iq<6{Vc&A zS@R$UE5)*QX|s|wM@5tQ4+r#`*`=)(w6R9p>SuW;tSuB)<7xvM-f0V#ku~s>n&t-9 zckFSgs2|Ed3c*uMAcnvtgx*55HG@2;+i-~3U~#jaJLF74n1U1w*k&euV6{79V1l6q znKb_)-c9RDRqS{xFm-Wp{_?`Wl>kTb{`jAl(Ze92v{f{^GeraMwo?5=oDTA%GslNQ zl0gs{<4H6}ydA)9gQ1k>0=E)}X^&iB``)0c|53eCTLS}um!7o#5&YVfkT8l93Sv=a zXjSTYK8V#l2)=%_hohxw-DLKouwlk5lg>}uN`EyiO-q8qceyMrj4w{8SWvKmXs1L7kC+%J z`M$1@ME94*XIefP8TysITU)AxUIG=smLBLf-BL(NB-eRz6q{aoyoWNv|*&)c6V#DJ9l|zrn|aE0GR(audUf+#Gh)g zO&N}odo$*2Gh=YZT0-Q~`Z8&G=TT1V%5lO(`3{4i!goQFS>%WHimXerzT$4?<@#I> zH!@#JUpMzqZNMs6Nu}x|qoynZ4oF!)rT6U?l;ZL;lV&?Pl(uVc){s0iDrN!(bwX8< zE*mt?GAeEsDH#MZ*jq9!D#p86r7Z}Sj~O=iG=B^?>=`INgqqBRLwkeele221UF7j!-vT&VwU#&}h`MpvzIq=hc{d1|7U+ z2p@%rt!olA{3jl-^L$$WM`4{Qw;* zM@+S|HW`QVT!Bn$VllyC%_Zi1ZQ5$qYKc|tqFf}8G~45x%=X`7!((IUX@HVF`AOs( zfRy7QLcTg@MeKL!6F&&$!}aYT@jXS2#CFcxm?*gJi*g@!7&+xI1pwc z#WpX*vPuZNICr@>ec|%lL#=bQIM=P2YFU%RyL#p^sD zpvYVslt{pfu+3c+z(MH`W<+&rKK}1#h{fKSZ@$nYrGEaxg+#m4uMz+kq2L}$H!WGuxh3CRjyzt!rZx;hoR%N9q z3YVgKWj+lQWI?XP1g?frbmC@(BP~>~4G|(r3NY4mSBNeJSs?41a}+JyBePH(W6HXE zk^-AVwIN!KW(=Sqd809L%Q_Za>9CgESGj29BMe+%LDO)mWb+raso|=UJ03e1ie#Iz0Vnj^X;Db!A-6U6 z>?Z8jkFRp@q7~IP{n##t(p(v~_@F&G65$#~87%^wAg%T?wLPazoh$~Q5fD`DdxW3x z(|Hf`9%U#%u!ygVDw|mjY1=U2ec}W;U85;`PgAAPmi01^<5{9{p8 z6mOn=JV{>Aqnd0!c@->SN6DRVR33{smDz=GgHNhQ>ULA6_T)^ zFFeY$2f*=2U`QSL?w=CSKQL7kGQU)v7MYQ<8ihcTc%CX3XbN z&PGoPKKiBM(LhT@C%k8+LYXQfT;pPsDcC@KS55!H0El6WHlU9(lp7AC3@2TSD6Tp% zjSX|AP&2CCP)$V8){Pq%O&!^=om9Ci?qEG? zLIl`@kP;9gtpjw**9T2G7Cqf79oq#bmK)b@MrFv!Y;NJqIle-mEq;mlyX9E{qo~Lk z!F2%u(bf1e2kl&4DubH4DVTkG=psu`uVhjhO3e<>apr!WtdD#H%xIX^-z_<{V=XRzZKNF~t@J8^cUJ41b5^rCr=R0x|(?pWEyw-5oY%b*?! zXV}#}^bhDvTs!>kRb`hp?> zK2q!z-jn>0Pi`6aY-5CdxkF*7eLi;|2}cSB)$s$?9j+wsrKaD5bJ*Sr{-fC=@TEK< zo(*O0h>X?~loRu_ljF;ZaFhcJtXpBpE4l4&k;D!~$#{O5IUaNYEYvgI%d;VLr=wf$BNi?Jvf zBrJX@5{C~d0Tpt`LxL(w&?Es%S=)by;AC+~QCqOZNCAj|58H&zc_+Bi`abN?hfO{Y zq*z16C{)&*_F>0P#<-zk6hZ=_?YHcj2COc^Kxjr9NFq|9tH?MoapaQ3&+X~HY#+QYZ*YsX7_q#j$myGrZmz_+j=JLU4qVUOaUKpTjls3CaQ5I3*w<+q8OeOKO7Qtm^7b|o4mk~;er?> zlw&LFF1tD4>12wpM;nv}&;QV)LV7xRYjYR4I@}{c^ZNja87q3xGWVfSh=_HmeK;8V z6@&ITM)!#u9VG|V6seAcq>vBsfqO;!vQHc&E(S;jWJ~Kt9IFsdiNwprvAWC}X5nMx zN7YLZVGsrVi~GP38(YDwb3`Bxs%kPeeM z>R(G_`QCM$gN#;y(fKpmyn2)EK~q0Q7@vsyD^8y}&^L*uA z6kbZGjcU@$J{qp90-h<~)^pQb4@40(?Aa)`V-J$Xu?(pBXuv52BYojgnp4-?>ucb2 z;rNBKMHhj*vGR`k>h6p>=Pdor`neM1=4g&VY2UpcR+qImyJ>(79~P|9_>8U;1hG@* zk{MTPU75dLsTZB4vMZA6r@lZC7P0s94#H z?$3o{5yjZrTfOT$-1^abYjvkeBnWS&D|MhP1bSDsJxzshR=7w~YYNcE%%(O^lws*lNe7^@%KH{uV|)egCF`@a=QfX@HUm!~ zSgJVrPeXH{+J;vdTtCL4LgUx@1GM(&ww~V>$^iW5B1L0=P0CP~5rknz5m=_5l$MV4 zzd5_IzNuU!aT2mlAIH>fgq+p{-4Vr|#VRs8(=|}C$!Q#*$+lsEZSW=ZjFt-3I*f?G zH;L?FQMmZ9@F5+ygJ_Fw!U$^c>D5-==H%;~?3Mcg%F>U%TU;Dp0#fx-D$2O!xUhV_ zusc&QL;Rwi<=!cF@P+qmrl3nEi%BF=jyf|I=LaLZS`-(3h&kqAJV?^#Ya|D!uyKV< zl4Ppd^rlWy0bpO5GAqZGRgf$-Ojr!wo*}YLk4B# zy`!*N`XVWK`f^+biZnVgvt@XxXCc(h1W&fJ6Xe_>z*Psl`K94g`-EtZ;_DVY1GOzT zJPC0!>CG8pa1(i2jPNn9Kj#4aN5(HQpoxjp(Cr{gcc-t;+L&Z}*}AhbTCrrNN$|+D z*0`for1o{s6)B5pqKK*fToTjq?;I)4%*jPSo2b{i*c*mUobBO8SvCl+P#CI|6Nl|N zh(3m?=zRm%d$oGNO;K!HK8TQ(>{mAtfLY=Ozktbvpb!oYi`unH#;sktW7F2Dt<3KU z7N{;7e_jxTX{GV9mo79hD2+0IPxCwCc-d#wIkf2=7>j${OzW=h zku6HIODC%)!CiIZJo9+#DJw}3PRu#TO=Rci%tS7(OxSUQ0AFqa7*C0ro3ZmJ#$IPhj=TfJTrqvLrg*jP~IxJ5Um1Vp)7NMbcfaX&1~Yds?t7gyBHyU(3F6 zd)_R>eXKYB7a|ODdE?30yQEugD9=$HrZv%uDAUqmRTq^KGf~B~1WhQkte)D99upiy z<+{8lpLhRz%H49G$YhQXlZ03%CIMW?l;+E2lB^8_lfS>>VNVD%prulF+DghtQ1o8P z!U810ZqjOj$$LoGm>w1vBG9|L4#^R#TN#SU#sjtVKd;##2{C3gmJf4cHa$H zJS^yO%`$ZXY;W3b>SLZzsiYi*Mm?Gxsxp{8ZdIFVi2-aR=%*>1ZD%pXg>e^D{>$;z zXIeB{8%|BZn6>X~SP@Mgb4KrDv#IVAK3s;=`ts0K&7e{whPc`FRXdd*S-3nT5baHK zNK(`dnGkLRk<|gvUF%>lT?`z!{J0b#hZ?;cI2$7b?u?7gj*~(2X{}UB*pCV!2=fr& z?Mh9EKBWaDo=db1=(+Y)WiGMjN==KpdBJ)>$KiDFDHl}SUk>_&1ea$6NfCDNfQ#eJlOLi$C%!x93% z@?rDyPKqeS>_Dl`)MLjw%d_{4e%$=%& z9^2Sjp;(6ZgA9TBL+H_L0ri~>10!{oD)S;LD$~p1nT1jL&O6V%S6^^#1q5767Dn$? zOEBws$Q@eq?c_Ig{XifxrXwTW!v_-P7JJ|aTw7qtO_w(~ z_`%t9;QCqw-r_lIu#2~=0)MGF==u`PU&q8WnZMlIx}`mv0R+^7h?W80rQ4G&>5iMbpBU&0;4HhUdmbzpt(~tyn z+V)iRT_}ZBV~tVpz>WoYG$dk|R!yHkoUB4|vg8rQGBZQ2L^E2FG^FEPcD!tkC}h4Y z-?vkVEb!nB1Zdncp@(F{ikq0U*5FGhxh==sbGt>@Rud8N96X>VCD4blgsiXn9(1HJ zp}0XpeAt|SEn3w2)ngs*;3!d~G7o|cN(^9?z>z3je+#__E)WeIEe-mWPl)@((qvR3 z7Y7*7gbFKx+R~%Q?>l+U?<6)tF)5YZIu}V*f&tSt@df>HlDff^=pb?+R9$VXc;Wfy z&paPuud;8mUdsd8M-(O_G7)m7WFx32+v${6AxBy>7`;(o<_qD zL!Bf;q85|YXdI(Ldc#BInV5=53$ZmnPL;Z8CyAIjJ`@C zNpR7u0^lOHTyj@TC@dV4z%j|rHjqGiW5Fuut{p)-!U-gy@(%?NaP-4{WdqrTQ?mA; zIYTc;rWF0pM0S1aOdet7bJkBK|81cZ(A4RrYzrYqx?7Wzl2CGS7gef+ni~wYe&4hZ zvZSAQ1XbnxljWx7QAhjKx12--N9x)*WuSyDEdaIISeRKBBcro2@LEx= zX02yxMj0AAF)l$yPnLcsWY`3=IFcE}If0cvLY`y;Ka4QA)MO0izyNu-S^+(%sIfA` z%+!ceJHZ)wVqzk@7J~Kjla8hjtMPG{q89p*b4segk1ZH$!mZpD5lhu#nC?fB2zEkp zR^#a;n#crBw#^WUTr6T^N2=_QX0OJIc@b%cI#FZ#V*idkm&PKIpyJBye;8jCrqiWu zESyw6uEO}GUhJ&hU@m0(udeTI`%mkeTq^26eutmW76772%O{Pg7dUmvK9MOT7lQ#C zIG0N+3pYF3*1c{~ZjV1uhWqBq#zvPq9_Asqy(FVZNi5a|F?nFVFxkesM^Qs@Wz*(X zH}(2dr*Q{JX3jLSLlmLU2%34N_^zBOgZ)tf1tc^3w1{>qxe!=c%Km*@GhtX6I?dO@ zv%pkIRXbFSS)dDy9`GIie_Fg}VQ7=tWqp7zpAIiUaHDpBnDc4*E@m=8!&RV|{_(x| zIg-Rwn3-DrFQ4`y`Lg=B2!A^8*zbT@+oO_Ja;iTUi5=t3+B>%j;(2@9#n$!fyKA?c z^ftG8TidsaZMzGK7kX;l@cG9Mq#mL7cA2qd0H#=ODOE&&+B}1Cik;gl(6V79Xt84K z#@4N1%qzxC@Il_2CS_%8*#_hnQ+qI}Sl46GWrc4l_1K zT+A5DSu`CZTP|8;y9P*#GpGOGJ3kHLBE)axHSi;lh~<*irv=X_H_8$Y&A#wl6gYQ_ zp_Gwr*;QvCM2~5)WKh8o=2yU#pE}VMH_x2j8TRh?>rVMiwCIj zmjrKV*x!AL?^&5T@xIh)$7k_vRvUth_EJ?gg1F||cKUyh6#D@qpfAJO{Y>BKifb5$ z^bYN~U`((vx3PXT4#1-_w-u)+>n*rByf2;q;Q55`lpI!@olJ=Q$e5Xsc_zdC4w-Xu zy55JZkoDqN`SejzltBt**UX$bz4$B%e16rie()){U8{o!o_hU(jc#gEu__3+J`B?f zCMDJ}&8tLg?l@@qkvK7=YMH`hVqphPGm-hqzOc5+ya1U$?3^E8QgtV8T8@&4!|^_X z4qO;bNZXVr1i3!>!ld;lqp##gCIpMdBNc#v{mDH|{h#n{mK@sHcM9Dh0OcpiWDy_R zqR57p;EK^JaITQ|WA9Qlpd4PyCbrOnEvzLK083N7bo&2*91^V3`@a>+ zl3Ohw7O#)lZHaF*z84MEZfIA>>PbRdg7uEZ>-7H*BU6i5?!SNbSZ88py3_yf3{PW& zMkdpzTImpt0-e6_>V+2KWPSc&F)_2q=a-k3rxurbWShP`dvUSoOw3=N)03#0c(QOg z{bE0KCYEP<gvmnPO8XlNT75PAahs2hioU&&h(`f*DPw z&z7c^HMXQdNioio2aFuPUw(OVhG89U(`&+shO9v1DJwja*TP8XN`Cn~Lb2??OES5! zXFb$9HK5y82w_8)T3F8&ak{bPC13$H{)`vanKB_5H*K>Nlhd!5iUla=W+fUa$RI){ z36p5$`Of6ha{kNkwz`D8k<>024do$B>muGv^ za}$dP5AbO1d#{c*!UE>5Y`kGp6(kE2Jp}WJEk_(%*aja%x~+>3nJh{;R|(Juo&K-+ zF>Jz1&6IC-t}EEvDUS!De25&VeFW(wYfq$;_re(ZpeDk6l*kK`!ENH_Cm6vpVUf}{ zKf|xPBN8i$5D)`5H`XNTq1v-raGdO4MQ=>UzQ|W&R>rHiAT$o>+9lj2~vc)Rzj3e5&N60XbTQGOI zznT`f5xVV1%V&Y`WUwemxcAiHNeu$J9(EU<(&5@qhxzaQ5u;d)5Cd#n9a-%o9K3+$7jZ`yq3N!2x0v!OwLYIs9!!d@;_`es<^m-E38j1E*M%wMjmMJD1g=t zKkyfD6|ER{v?y2EZ+X6_wd0?Qa?K7A5j*F!#k4k7SKbmY^KT5qv{4vJ;NrsM^wL7z zLIwSjUh>yM(7a_67CUu%a-!%$ywIZ1DzgMp&d32g!m+HUBIqGtAsOaL8y-+FEP<^D z^rb*YZ+v2T`jzqJ`9&6PdOll5{Ydc00-|;X)8fY;Y6UzPjHh?DsEXrrE_d^fLfAyo zT27;kshS&G>yZdN?G)HlTIW+LO5$VU}Gs*X#wahx)8&(1G5MBOMa586!-mr%f z4H2g}kbRWCF;*ICi-Cleq>Q54s(L&kYTEhEt$6g0fdC987wKpK34c|wFRYsuB_&WA zq7rLCAw~XY{`czN)*8Q#;;{0|gy_83IikK6`+}V$hDFJYEDDo^)g}jl1473k0Ja~C zVi3L8apYjT%iup&6#ZWTjn+d~2ccOF7y339Gr5l)1QSCj73E>ub5h%UhK@w zUz{dh+M63sstBtFwNb`D0uBKN&cPI6NVwb_R)x_R3TeP<{}htZh<9sD-n4+KbirV# z2h+Nr&=nSk+$2@1WGfh*5@v`UF*`LozxY~jc6<)WGCMW5+?kzTny3udnY}!-Jl$JZ zoS&d}{`A~MWQ_Gsmy&=Uu$x`E_EvXZe)+FNl~EQv+yBR0448$m`m9AkrE-{N#i+Fp zEsk!JXT>7*0J-SML~TTsq>e&b+Kd$;LR6NC0#ZMejYyFN3tai+MWrcbt=)SLJIIe{ z4L_#vgsNZ6O)bAVzxZ+%Qk=t~8=sLl(}@Ypo+pe}v}aoqGFDpJ7BFwUH1ou)!eI^> zCY*qQC~c3*CY(e_r~gZu2Xo&PtlJx~37<&}aNsehcsR%Rqo5;oKy1$`8IJPCd|;s% z*|!N3A`}18Ns>k}fzn8*&HQ?(j)Uic9mMj_FD&Ys1(b{|oEVNlJ|Mm9-5l@ijSlFW z*KSxq4rp`Jnk-$S2_$5iQSw%h#HO-r>HA}w@NdH>)Z*n6lNgMdg2ZW51srX+op-@- z3|~&6MhC$2g@lvJ9=TbqYRwY-f|PC|w9|7->f3dsK1k~U*1{mug9kaVf4EPPVyIst zB1DqY#O9_hGPq=f2{I7lQD)(BZhnDx%)-br7i|f!#i_}u3p8q4QWgr9i3*EJUNGak zVK(ujND%EG3lxBM3PuIvm6m>#>irwa;w8utQ;YM<%vM|7y0_whRbQgo(g_ew(M`$F z0N&DNh4r;lq*FFx4GWEjx0j8$Y>y6hlAS0XR3A06Qjz6&Xw0}5h)b#PK>^|aw_eP?a0_!`0nInSWUAPkd47Ah)Oj>E8#XUt>Lo)Ds5(oSHPH|!{aiO@DTqg~3; zuPF#XE0Ja49Ckw8GypYGOulL74ZgCm#&);HY{Z56rRgiVQt1S3(p#FiG&QL=JbC59 zl}Y_Wu19A9C4|-7PFlg3M!|s^75PlcQxAfWGzBW+m#ZJswW8Cwu&g4b$v!HUE?wKY zxxI4j7L;RK$eczvhn9V+L*IkCQ2nO7i<@h!>vE#A4o=a5>j;B2ftGM_uJ{kfcmD(H z{|`W^q5isNR@fB@1u>8RWKoaP?>sZ$-{QYG6*)Z&>ZKkz`IQtX^a1;{e$uowOayE+LPW<> zrDny(L=;tOhI}-U)KQP3d*fG(29DBQ>Th0vi5^d#K2m2JtE=k~w$#_9=_B<;megC# z&SvJ1+S$fdFj@+F-q_l$z{z49dCFBF>FKden7$tSe8U1i0>!Y%0eAE@`*`LXdis6L z762bttpIpWx=R;?5YcXGcKmN&)L zmsx~v)2k66@Bhf0s9;WL9P3ArnM=S6Yu`wAVBEa80Xaa&Z>aFNwp*3%5aLW4h7IEI zkl2g#asHuu+Kn=hOiI!dBOictOapibN$_#J4)#8V!AJI_e!R<2Y+%cY7CL-TS^G-$ z)Q}bjriXtDYef~5FqENB8xLvTXy6!UX8dG|g?s1l03uD?=Mfj6$~(7Neq!LMX3w2+ z(0as5Et#XL-kVLQbfn##Ys9HqR-dUXO^%09bdMigZ6N#tW|mFYma(&RX^Nb=><>>CW#RIVEZn8XVdBa{RwT`i>G&@W2+^Y@ zzvZxmKu>xTFB3n*NEO}*1-a&p{PCs5$F$`_F%wA1W@Txu#sNxSQXd!3%kOH$zs-Yk zUxN&(v8TyMQ|p;&1q1wfVNPAurL;D$=52^VNc+p{%2M*5lHqGrEc6B0K=~)hGXoV5 z1DFecp0)5iW7bhrdAIn67$p-H=1{BOKhGhtpo1T;yfXkAE4rbHPV~;tUvkv!|G*F@ zIp@;BwsAaGCcm17$Rn9LH5{^*AlBwmJa44lkcvd<)NUS6ol9b_m3thCzG9H#H)V}J?NHOJ% zXl7>(0VoiB>ZCvI*CY|Y%)6YPC1PIb&j2xt7!zBnKkhAHGfNrw_5GeqAzK?qDBTc0 z&--zF4(TT%Tv1mGJhgP&KG}iua#(P7T0lV@Dp5?)Xq|$L0>~<<`c|g)1cS{J2(Hmn zL}bNckS%%FX(fDT#zTFLkaya<2xi2-A9Od>5ml8A>WMlnCp`PyF{SV=$kz!2j@vW#CZQt&{w59xOi!$s^IAKJ8 z&WHjyM3CCNNeibf5PVDEluyYPw>!~*OZqTSWbvkpg2_T)s6;4V18=rw=d06?qfnq!dISYfNYMrJ>h_ZJYk=l;Wb1d z_{@$Z2=SoS@)`}r_hf?af4`EZN(+|PDZJd^D(RO!ed2~H@@yuRkYA=HiCna%T3rl( z!z!L=3S+eHt4PLXK=Uy0ue5MVHEZmcrxTQ-66K+8Gla79-s;+!l38+| z`{w%QI;X_Dx`d?vYltE{Jd#{teFWkCLoQ5;%<#}|F-hgdDNI;9%&(7e?40n>KMK1N zL*jp}o>6N5!Ltf!v7qmh!QpwU#G|xE&W8MJF+ve($lXzZ&3CbdRDvv*mllZ{OuTGj zO)P8yO*5d_B9^q$Jz8i-A@E}to}`_GJOVA6@t6yykgO3|uts@)x3HvEWtqaQ!O9z9 zh*;v$>^102X2sH_=X=vjQ{AklWPv4d0^#E`^N zYTeEZ1D<+j7|jeA`ij)D5(QG^SCuLyZr}7ZZG#MnT}$}{@QwQW|JOd}>~qe(PXoBJ zWbWL%AJ<+F|F!nod!Ig~=u39YpU>W4?lQPor;Q{5_Cz4hKgIn#)vPO#(>h$Kw%X>a z`$oGfI!K>&mEw`~CMu{GAr$v`T>WJ2gSS`u(-eveyFrvB4pPRP2d&0%YS!&ahO)s` zt#gt+fL1J#yQnUHxW*yTlp|Is%gQpn+|0$;%5|0=(Ci90)YGStbB*+55VWOFx$9*ta=TacW^AxXk zR6QbPh=BqL?hv@h%+1H+VCUS$~9^@uCSsRr3#Eg+Aq?iYWi2NZv`%p9QM;h zsyJj4M{(SJFbl&GM~9yNiU#asC$!mlj#>wP&5%WLj$B9qhT2#{c-??rp#iyFI_wj+x34FJx8{vY;7Rf(P)o8;YhFuNN7u%y+2nd${S{XW?thbI6Kp4+E4-rsrmGi7rRvBA#Tt%OPKx0A@#r?_5r&eF zF1|9riiaz-cdHZps6;FcKQ_xR$y{XlU)cbSlTDI59*I>rJ{5|sDLZvK&+6B?Q^Ig+ zRfb1~6pO>vlq+R9fuPTXf73D}I_dhN7Y`QcZ(zC)Eehy0>po=m60YemLHmD*7!?d{-K0sR9gQcz`3@VOb)q$G% zT}V*qXWj&UZ(rQ6B0~=638jfFFb%AL0+|U(iSvaYey#sUx`IHcwJfPz$OvA^A|+@R?!(eGyS6?!)#;Cs<);Cs5x(TWv}z< zM-%P31QQIETkoz{9K(6t5FM5lf(U+=Dy=E{NQxZOAg?npy91C|r|?eO6s)Ah!dlQH zROSEZu{U`L{P`2^zC>UpIK=Y<%X{A`3caP(%f0e{kypNRcOIy+`pg<|>aVR&Cr zLRn`r(R?0stp_g_%&x>>&2`!xH(FkDsogg@-C9w^ajq^wPH+l+rnQ*bD4U=&#s^vC z$jec0#;0x5h*;0=(QFjp+{C?NB&vvm@9U&>-mn~BpjD!rgnSUFj9(}mxX>%{dqJBcbb0qvi2dNUz4)YPPW zvlJLCc8<`=W}`F~Q1lw4cA4d;$u8kW<}yX!e3>#`?GXMK#iYAYkXkBHE7qqJZ)S1+ zHIq;(w$+)1n<9uKLaI83uoJGX)(>{q_eZ}tarL!s_wt6d6a<@5 z4)Gmj*EhD$ubdszrM8hZ>L4RKKf!npUwkQY+owk7P+5&XQWGDK{@$;c z&*bXWgI(3{CG$h43vst#eg_P5R`GOtS6VJM>zYliTepw)Zy!xIZ{6NI+VX|>x;tCO z0D+V3L>aUif>DP>)$cw)$mj*!T*|R|@3hVB1^z)CQao;vMw@Mmk>nT&!L*18!8@U= z#5DW~?*^RAw)AA9>ePV8qxFNs?SI;eg>2Z}vXjsd_*Ux1 zx8f{2C9>YG*pBcQDDiVA-Z`^#_hUtL?xH-W>Ld|5niD<67V=OV72f>XbOznM|J8Jd zNDexTK_YaCm1X79A;FrJH+DYV(5=QTWoxRy`esz>I{lQAJi^sHHfs%4mqi#w|A6rk z3x%Uac^M+ehcrJ7@y7>XV(^z>ezNdsA3O}Jn-ZyDDfEZ52mYWmM^jZ_Os!fP#s9b& zL`|#3m=qB3h>DwcVypu8kTx15C$m&pbTGgja_)E?ouTfh5N7I-L|E@*iI))*hrnq? zS128`{~3E}7cY}OizbfwIvkRzX;jFEYuBc%E+gyg76nBMgoB<}CmfFFQo#2wUA_3; zHCRjN5Jl1k0FWN_j+ut<_|cPZLuEDw5<81fZ)-5{ayp^vVZ47ije0QkVcEo6L2HfS zkJU2ODI0l9L8b*dTtkW~yZhUs|T{+QNkkv|?mG z`@6*(2wM-$2#POP_2Q+q#Yxb})B?=nN!5PH(iMCA?+yOS1$&V}2*(L_ptFZ<=ybWl z4!;aDbN%SvezLK~e~x;_Pqn)!^@~cz3(72r5Qiq36tq;{3{4!W*3JwPuPu?3Mxu>* z84bBaiXyNDISw>qoe~fevrUGDbcyF9=Rp3i@(Z4jcRsm*s^ZN5&(E*O3R+RM0Mn_1 zfc?#pTMS&uHp~m-PQw5O)TXGl=a5Raz`o%F1Qkcxy35LMnEKTb<c$Nz^y1uo;-ERAv)eldM&s>i`C;OX|opaR>>k~CD zqc1XR zCX6cZ+um=G;$@|C5U@!Vg?bd+5Q{39^CmY4YG9 z`n^40yzPi$S58+)TYI;6!NUNQr12W;+`+;s1}F3(vcKNr1`00oLzA(BpmY#(9p`+S zv|uL$q3^uL&CvO#bgN=U9Xkf0AN8o#A+AM&o|)bONuAK4J@hL4!=(hFnd&@aheN{0 zHo``0@K-01&X=_4EU6>+Qh=Q#oeW!aNbm7W3l))^%nHfvIdz6~LWL#zG>JJgAPxh4Wd8^dM zak{^Fo$Epm#3M1wS#53Ve@>W+jY`Bz0Zw=X@4CYBuf&kuEe^hErz~nd5Ti$9E9<#Y3 zqdLBj^~w%)QNSA%SvhoX_*)_>q*3mUehvzP4OvVqdO-Rps>3OI4c-d5hDO}H25l66& zN)2@R%2J+Pn$N(W_@x8ZVX}U3uzqiHYvUiuCz!17Y~S3QY~9`G4>oGC-NRKE)n2Oo z-L1W&y6HyiF+=v^V{da*6RX3*GVPHUli0VGe6V3!63L--SRrv_^~z7T_io%eIkoM^ z=SZ!)tq5e?XT9oEz%$!HjwA$9+#1LdElGSV`hv)cL0RN8&IlW3?WwI*QAXC`X?4<% zbdF%Hh(w2&<>3?aWtOsLd-=yIh^&Ae1PcwJiApy!1#1XxgAERd%ZqCG*xHEbI`#R; zv@PN(O)A#)ydypK7DGka(2RN)}uvw%lejn6`P{M7ORQ^ zog3#~b_|ZRhKASvErItEGc7oyLuOnPk~V__0|{kAx$a8%%^@bqn`CWxues< zz2;fQzSL>xy_3*hnO2)jG0)cT#j5D18CG2mf$8NrNC(%MleiC!l~S5OGjAuB9|{^- z!wTUFj)w&R6^yp`PkmaU2R_|m(?bf9--NVOBAp(mHeZNr2r^j6JlzjkN1Qj)r0kA* z4@i$GQBgD(Nc>eivh)s*Eb%f_w|B97{qo}@huh&VI@jHUuXO}$fvn#(0TLC_w95Y^ zwi&55c{&6WgElfk_-XMvM$Mu1h3=v9o~8LUt>@K5#VOT<&WLF1cl8VF!ppJ)wxp6oRkWr;+8dnK!OVu+M$*dd+}gXDI`ICx zP@+Y2CmVo2((cG?g_xSke;Orv!Fx-^Tu8n=iFV`>cjni=^KkiO=1qTHzmjg(aP;~6+PXC z+LbNQs)&U+Cg<^ak&-o$zPlshYWE9;t7AKQ#mrDSRQ0e9({EaZvZ)E0jRV@hrVab1 z+C9}AT8-bto?}}MAxCIs9`Ze57Q2YWfCoh;sQ%{0{?S3SLq(ebrKkA%5$hGLSgVd* z0Gd`{HA|1UqchgnbNH>P1{awPnX@Xm8#q_(C#@2%P;iiyVawi#%1_RdFIp^i-p{=- z=i;w4lFd<#vG$LutvwdWb;QNdjh@8OUt)7zzF@@atO4gv418T_r1#f;g69c%m$*1m zqaa1fn#ri1JS^>HAdwJ0w46GD@iDf3pj-x)6;@8s6fHP{Q9SH|V^YtvFS!~U90+tC;Qlg8^95Ma!LAxL~zd$-9fS zh%7ERNS8bZHNA)_(Lv0`-{8?|4AT1Tu4?vj?n*wXe()<7uHvcVdS*+uXgbvn&Tkd$!X2JIHcx`1o*ZpWH_D zUx!P11z@ti!3AcUZ8D?2(^J0_MH@cTrHpTk^6w@a!>@MyRictZYSke(Iqi)7o~R|Q zYa!2`;RdHKb-kXHx5EF<)e$GBAZ6Zw9+CRyq*h%d3B`{JuErm}H9EYtJJHFATQ?@3 zY^`74I^g`06t7!Syjqb(=|@z!XrC{PWl~>t{TO!TgLfo&X-7oNsqOgeraPGj$|>9| zTXmnFo>uF(k8X``kr1@Aeoq574oD-?YgHu7Xe54>2Bg~zapSx%kq|Tz66t!G?xJ*0-GNn#6W4zH)5{l**GRBKe%iqDREMIq zzzTpVL@yOB!VBma%J7ZYym9XnXU8i?)>u?g1b|}A)?h?-+GFzuRq$|#r17rxIaSBL zODbPPMFlmCf~BYjQr|nu9yDW@JVICFV(~LM#O~%V8E3r_}ST)54{xTOHQH7@6%E)sNfljCwixKzSr=YBmJ|mJy%P zVPhIzeDU`7-r?RzRwo>CUrdQlrnfdFf*}vX7J-XA&LhlV6QJ12A_ii=1v%7wd*Y)B}zN#f95uCpu zg!FH$0fEDY!hBaf|96J&9h{D1i!+e$31BonbuO?%{dkL7|Cj7ArT~mBxNG~N2PMwO zDp1n9bV*$`K^aE|Bbphmwkt?_Smp0&G=@FmpFlIAU6V(ek>|x1FF&3{G~4s)v&~P| z4<<)Tw5malQyUFL2>vc6!kUhnf-KPcYZtD~>C1~dlqFdnWzU0oP;#hSEM!XJ?noZ1 zCJ-9u-cub8@|4OrpfMCi^ zxC;V!DU$M~J-X)5Ak-!4K`5hucLShg4o=#XncZ<1q(O7Y3GEqz+wp-nn~e$jANOuz z5NMv=Pa&`<54;Y2W%f^uCNRT7O$j8KHx%xPE;|-BA+($YXzw3RtO8DjVkKkQ&Eq^S z`{9L4*Vg6?zs7xdff>ihFbuaXn$5jN$~^#HsME?RRF^2lNPLg_oW5O)$qKchO(5Ar ztcSI=8~~Y&@TxmQ>k%MaA31Hamq{b+^+gZbh|2nrup{<#p}T-Xug$x>S)D4?< Xl+?DDGzx&BOAWuWZjl|vO-BC*7}&d5 literal 0 HcmV?d00001 diff --git a/bfd/po/rw.gmo b/bfd/po/rw.gmo new file mode 100644 index 0000000000000000000000000000000000000000..49d9e2fd45e3653895273f350eef4aab94821463 GIT binary patch literal 429 zcmYL^-%i3X6vn5~#O%^*FM6+?9k4(q5)#CO=n!>!;a%CzMs>8LJp*|V-@xbcSv)gD zzVw%zw%_^pb9(gUkq(J7;(|CP`b47{aY8&2lLOCt+ugq@rt_yJ_g_=Pz*=LynKkc_ zA)n;@6|7T6$828YtQCZjKYK{|$bv+A<~I@{W-TGwTy%NZWnm|dTIV7Zf{gqL)~ZS0 z`ywtnT(nsz;)vod`R=7do?5A0CDGWJJtM3^vqWVJ2^C9fyIO2ne_7jN2po;6T#%XN zfHHMi%My4Bav8HbrMJ>pNP znGzsC00T*YKaA<~r>G1#l&bjx^do!~thW+U2H}AgN@44rm zdu}=3I`#oCDDd})`xOeOfUi2XP&oDeg~Eb9xfTj9UtB1h2>uIr8u%XYc<^f=UJLht zXM^`&QYb71=Ygk#H-d`dvEWhQE5H@t+re|dUxJGFWC95<2)F^1|1nVM?F19>1)$=+ z6IA+N29E`Q0-gsJE+`Z(0nP_61S{aB;7h<`z^?}P{{;tlKVw;;z`w$c{C73@Ja9hv zO>jMUIFaam7}WdYz~jJAg2#j30at^+0hQ0?7kN52f+SI>feQc1fS(2*#`~{9)$>Cx zE)*UL&IeBhmxHQ@M}iLl8=$^FKDa+WyuS%N8ut$c{2X{B@81RIfIkP10Dm8F4wW*O z_Y(r18L$W{KNo`!0yhNrYeBVV2|NpYDyVjRL-_t#Q1$+G@C5Lup!`3ON<9@kAAC4C z2r56L;2Gc)csTeRQ0cx1RKDK?%HMlI<>NmBekQno1$;2>-wEzN33zY7KZ6SYAR1fc zJQh^>PX*-6PG((_k-v1z7>ST3%7xy&$og_@ay3D;GD~y{+5A|aA5+R0bd5HzK^@Y z`^%-E@_QQy=@ec7Dj%N)74HMCEEHY`E(FO+;j17`QaFyzb_2Kxl>aw^O8>iH0v^56 z<68_W{VI3{_)<{q{y|Xv^n2iZaPF!?p&z^eTm+7S3&A_UwctlVvR-&FokHnc4bB61 zgQtT30xJI>1YsG4UxSKg{u+saD6PyR$3sU8U z)35gYYyt6(apgC$V)@kFo>dlT%oX>j$l>e82{ouy~{u+c87tR@??BI<7UkWPTZ-I2B!aN#X?_&Yq z3ZBjT??Cl~)30Je?e(E4ys_?Ji$>7gH#dE|X3x!E=C3q$H z7EtNl146omMUV1+wi|@h3LgYj?{gvEYrr8;{$2(u{vUuuT{!PXkNcrkeTwnBj_ zC|nPc)xujri-3xzJC-{{rn6R9h|ts`|l{I^1T>TxX*&>SHA<#0ne#={cHgBJ`U>p zvq9DWd%#n{9|ZTmx!K3H#h~(i6?hsr1Iqs$;JM(3!Ij|Mpy+kMM4@mdI0-79=YWu6 z;ZE=>@YqSmM}eDoe?@rz1$YVX15@5lTA=9a9iZyz``~Kulv<$xt0|N~wcp!8`MU?a z2t2Fq{%-(9C(i}dJ|718SNK2vTMLd(d%t-DxQ_RGLB(^$E#AHjQ1QP8ycFCEs+>u~ z`Q9iv!27GgrQo;0IpD*ZUXQ1N3wgf`JPMoy70+YC`@6x1^8Rt~Vc<8wQ^22tis#6d z*W-!c`Mh5Wo&}DBO81%I$>4v2{or@O3&3M$Jp5Wv?XVeCe{O>Fz-NHU&pU$qzk|o| z{@>ty@SgB~(oU!QMWE7sGN^Q32QC1=0xDk**yZ%G2)vf}M}v#OcY&M0AAqp1!bQ9N z`*T6n!w*5FclI9V4;ur%9$bU_18((tz8X|}{~aj$`6hTB*!LL6+d!53OW-Bo+{gO+ zYVac7_XK*p3eKlpz7s%Q0+AZs$4GuRgRB=qKof?qKo66g{ImZ16Tv_411F{!UQk z_!@Wy_*?Md;K@&MezGj!t)R;FK~Uj;23`Rk_EfLm6`KR;ML&MLDAV4LFMlu zPxE|T1gc+c0{g%UsC+&XR6G82!1scR=c@tF`dfdmfuf6l167arf4cXZ%R#;03W_e? z1y;cygR8-7p8+j_F9z3wg=Zpb0#|{m*JpxPf^Pstk3RyH|Fi$j%XcHF@;^4Rr@_s6qfb+n`;2?Mo_!v<2`-<@XE>PwDMsWWTmaqyt^_{}sy-j^TyNJwa6RuWFwu8#H~3vp?R>-Y9B%=Y?$f~Yz}J8Y_&HGN z`~sB!qo42m{~S>DI{+HJ1osLkI@<$o1pgjXef`z}!Fy%9Vc{4}@-`~|4?JnMy?zbn9Fc)vEh z?*P@#j|bJy?+V{P3m(h+cR|JbD^Trz!izlKHQ;jIcY+JScY+s!d-Z-8Y5s$!cg;UK zosEDG<@@8o6Ts(#=Ynqp748e*d~ohRc{witkK+9%a0NI8ica4GJ{nW5EaU{Txv7ECj_5E(2AsJ3zJ9bHev`fhxyGK;`?3 zp#0qfs$Ncbg_mm~sQj!1Mepmu!@(I)<+=@2yF4G1zgL3F$D0G*8QebzJ{b2;1otlm z{8qppfC_&PD1W~L75@WY>F=k2dY=a#30@xFH-HK6qoB(3WKi_?LhuyuEuiY-Q=sVd zYv6M5|G>wAi(dtg0N)BK{CTf-dbtej=Y0%Re|Q0?e)TDE5%`CI#n(8UJQ`e#`yJqu z!T$tRU)Q|W`C$t@p7*=JOTo{8mxFU(=lysPd_C{Gz)Qe0cu~4HfFt1Zz>C3Ofyzh! z8@#_h8eGZyQ$g{aPk;&dNAN80v^Tmuw-Qvp*##>9Zvf^0>)>kes5g247zVH4{Z*jy zu@_W&r@h(Z+X$}Wy#cBo?*tcszXTQE8UO0#*$V3Yc5nc^3siso1*mc@d`qZb@Os`~ z04lzpg4cly-s<6>3@Y5a!N-8V0#y&Uyv@^jL%^?s+i`#3+dbSk_(7=y&czs=kfkTP;~Sr zQ2u@hs-DjOHy>|yfNH;Ifkp6RU_baP@NDqx_xN}^2&#PJpy=SW;FaKy!9`&4y*|%- zG^qIA0GH5u<^>!EMb}RN70>HImHW$}`p4W)`1@s`;+qB^1-=fv9lZbl z^Ll$4sBoVKm9N7-8Tcl6Deq&T>iHF*;{6(UCivh_d4Bpq(c`1QgPX_M{ z?w<#b$J&o6j?7yuQ|<3N?~o!}zy$KVq1)GxaK&7kV%G2ndgMc`TBhe7$@2RmM(`ZoUkoar9|3Owe*&%t2fyO^ zej#`@@Ba4|p-}=YP%lUl|l#y%AJr6YH%s|Y48!?Vc+!cL*Pc65_2d4DIU_Ie+veD4EQ&!_#5)7eT;@3(^w178as2fhzf{eK=*JU<4NpI?Fl;3?mB z{&F3-miL{Y;(0%KKKLC_~R+s(m(sr+~MBqOWIz$Aa$%PX|8>D*byv<@%Z^#9B?!5p9il5&-#J)t8&1*K+*l&A3A?s3F`gv;9BsmfPVtd z=6%iGu7|oARDFLKTnv64R6QK=zr+Qe1*-k}!4tu8@MQ1_p!~fAJO+F_cog_i@Ko@N z;6uS*fR};~{85mjz{`2x1uES;L92gI^nVX{G`Rf7&bKy#%I{5}=@^h5HGp^3M60)A2fRKJU|@=<%Pz`(0p*_wRsLfY;vR z_4q3RS#bR7l3nq?(tj*9?km@xDYIZM}l{N=Yg*T`@qkDO8=Lj%75A~ zJb#x2+zl?q{Vwn*@NV!b@VDW8#s7J@M}VS-NpJ)B6mTi{1+WMn{!1_aGVmDQ9|0=8 zQSf2l<3Q2L^Fh_$+rahUm%u^r%wIX(PJ-9){ti(6<`}4pPz`Fwe7kDD?KL9TQ3%~Pn z4uERM9pDb|Dd3slPeIYiF~9e6E)RGEcs1^Oz~jM>f(iI_a0&Paa1prh502YG(eHBu zz8Dleyc$fvw}Q(5=Rk!!>W|((t_0N{+d<{$4)7H4E>Pw8VsQTnnDBn|pFBT{!Fjx| z16P2zfUCiGfTFkGfNJl)KYRT&!P|L%CU`1%RN*kgA}Bh$1{5Ef0Tb}epyK}wcpCU? z@Hp`J!w$3hSOBWtSAlZB0aSi(0UrTA15~`<0M7s)c)!DpuI2??74Xpk_kc?84p8m! ze()Ud?%;m({SPyGy#%}*_i<3=cnx?l_)$>(;g6u`bm0RIvw9c;PvZRv0bdNB%=?|- z>EP!<)!#2b<^O`eIn4Ug22lO((wC7;178In-7l+AKw6K|CP!g|NfO9 zbS3*!c`7`|;^!isYY6{Rp2hq=1-zDTZw0rSZ|^@Z;P>IU&Ee7CJn$I&zaRVp55>&= ziKZVMT>dum?M=8nJGk!%?!O7|f*Oz7MSnv)N0Em92J!p%JbmH)zxn+Y+&>iJI1cyC z{1y$qjYqU5KB2$k`SwizY5(8G|5Sfrn&-JZui3(f7<`A;Q#-??RuUy{1%Jp8{5jDNTC`+Od{RpH&iUH#|@{GN;7`1c`x9FN->xTzn!GYlRBkpMT{!g6B`c|8DRf@cT5L9Xtzpo)o_Ev#_3U_hjD1e@A&<#B)W6`=9u& zzo+4E6VC@T{+HtCm%RUu??(jxZx7#(!tGvuzk%m_ih#f8^X#=>{@=}fD+m7?OW(@# z?C>rhigFGAJy9?GeUfK6@4vOT_J3Cs=6O8-#Pjz!-^6n&{#Jpv;r2wH_;(|}Ka+Wv z`)RzNhyVZL_cQo?BF{7UeHqV6+@B8Kh1u(c&_4hH}zXh)2{mcCRXP$TR zJ_gfG_14;de2lbqT*Gar-og9d@tn=?!@y7RT*bGe!AJANzr*?dQC?mW+&;nYKZf70 z3ZAOGe}Uhh3-8|!IEnjBJU`|Ab>INcLwVxg|MBDE%=-gL>mPZ)Kkf^`OTb5j@5}hz z{w@#i`aKhV-^}mZc|Onc zeV(N}9}nMt7;qDA_Q(4;&%1ef9nW$6Uf^Hs|8MdBFn-MoZs&scBke1Bo)z3ail4bW z`n!hbe4Z0{`gqRaDe=6LXAaLg{4M9Xl;0bP<0<_9AD-iR|1!^O`F%Ri2|O3`uD^}^ z*57-0UdHoep5OC)kSG3KhM%wV^4{S0<@~;bX94e@2yPpAe-ppYB;5x1Z#+$&KjGf_ z_blA?_lkhq0=g@_gZHoUathB{;ya7yo47rk_Y1&3M33O5eAC|xaeoB(X`X(5$G=_S z$L07NCk0$db>!q^tv#>PU znkh}r_iqbhm_}t1Uws#plls_Lv(n<{?&OBP3nq8pl=L+Vb9PRZ29jhQSyZaYhRW1P zrBSrptgO$}%EjUO+``;BtJkkj$2`iPGElQ)*s@7}GWS$jvx>0FW z%1OVc-mHx3V=`K&B5JMXd}2uKZ%wUy{^F#$XKJKANz}!QCd;@F@0lhcWv{ol$#VR# zw%Ta6+Tq(D){~*hULQQ}cGQ*H%+#exM?Tu|G+T|C(bj%E%+x4Z&+n^tlp3^2rBQ9R zs-w+h(e6HIV(#iawbE2|G#TLEq!X*;zR5CP*Ur?uF3XkXXrnsasy7m= zd}_PYN?JQANwZagR!dH+RO%wynvfgo39V5swMt27k28{9vDNCWq+AiHmHP>{naHYY zy&L+-ZHcj zf~9%&-j}Dd>1??&VLipcDeJxmouY+mRFY~lDJ5e@VyzuBwTT7E$V{l?3`Li!wQ6lV zskTUW2KrS6j#QE{^&ZcAh^m%UoR74Oe^hHwxEhU`v=*Xrdiwl}ldXFB4Wt5nxXvwAChj{2Nu^)o-& zI3v~s8>2~f&rCPO; z6pPK7X;DhCK3OiR2PBo6nyOq#0vXgtM`s#VE-}J^q|}&7U^J7kV)`B#oYkj&P5lxM zpN+~bGt~w?cdSvLQhaj@$z^L+tQ<^shH9LtHRy`twQ93czPylJH91ou`(&(1P*rb% znjVM2SZSJYgGw@0ot&)7Q|4Q+%aPh`$tS>5}YQ``gC$ zhfSHE(L=L7In$~n)Agp2mEstko^g-mq7_PR<-l}(q-iEIj9Sgg_!Og2QmvIMyXDDz zHhP!dAeQyTyHQr8nN2v)FwHkZKBYqW!jgY(Q4Wqn3VO{QH zlcjNECDvg|lcInwPhvHJW_x_ieVMxO;zf%VDTb-i^t5O`)&*nrXa$n0Gk7#C`%~p9 ztB|S6RK2lh`ADfYQ53CAT5xwHe^!{O>U4AQh4w+e;ty+0ee&ybJ8FbStI`dKHBk z>H0#%v-_5u7iHR6Vm2W>jecm&s%;zAY`JPpl&U&H(Fh}vJLO8;YM4YL#@Jbg(oCz) z5P<+YH8a_&PScTwH?3+Kt4bLT{8bU`sn5`A2%}?66`Ge)_|f{*w5AO{-cC)y+@?yC zMNMRA;F)Q}ML5y;=x9eyM@u!;>kgyVgnDG40($#uR7#^e_`0Ag!LhL*J{JSgbjCnm zR>r$xjsw<_LRX~4nCups7OCi8U@K}SKlJE>+A8MMqm?}+F zJjKdx`a`XwOcG@nt#=v&h&>@suc48i0KA>zNfXU*mUu=Hz|!GUn~D3jNJ(=3zkNA zO6Vm>qjZC^%?&d=L*bmk3?w(tz=0u>W@~07X^?5+PIm36(s#&~y4%gA$&eZGIOm47 z3bH~u6;O?9xhx!gMA@}(CYd)?+6_CMpT^>ZUB?T;)~*4c`XrZwWBi%7{&5p(MxuCD zVGyg7o5_V2T$9Z6NkNFPzdlXV1=^+_$7d!>4Mg%rX^&*;JdQ^MYF~%gvfo1 zyUJ)*kIZ*#t)5@oGhrx}X4pMVpCYTPHf`NF>;*oga8~&}Lxes>cbciC$%MAG09TIF z?vt5HPP=S=Qji$)9!RdV(Ol}e*lzV?7N66jhZM6Wc2HZjrcsdgmJn(KVQU9dFDTZu zH-9V*GZJFomy;?g_G>cm(X0$v(g4dKMc+jo+wQ$!w^JI5TyE zP|Fw#axKak%T<@9-Fas(V(-K+rM9!}9yw&_7=vL1$WTTLMQu=OW$0oyk6i?`eiMz3 zFb{#Xsyi7fQ(eZ{Qv5{D90svi+WrL9v(&yFwIKfrCy8}{xyvMVH$`Pxei=K}0o2gc zZAZyajc#5)tkE;MYSVD!&_Sgwx``B+9l(RmCdOrn5)oacBD#-_1*L^heH!3fl_tfh zje9%v@*netmbgON(W536^_lS4g{Fgv?n>&~&0LX5b|?m->f>hqrB6 zbJgI`@R}_aeoLytGX3dH&BgdK5+i&Gp~J{1&dX}apsOp_S7E?pX|3s`7}xQ0Y!SqkR0tFcPR1)W>9>+K>(?gp)@%?{^Qw|a?=vka2wdA1 zrXQ3wa0|u=1gEUP=$w+UuI%ajH#8e6^6&E(P4LY6l)zfnBUY*fsPsuk-@ zGwmaX@y}fi2q@B>&2lZ0t!ceREiS$D(jr|G=9 z3$>Z)zE*8h+U1#1P3znnO)x#9w5}#3gBz z965*9+KOf!!I8#tzl;RM#<}(>?bAN6vIx0haPv@@vISP@lOp)ip1LGYO}fXDsS2_; zgrR|kIruycFXu~{<9$9XmTCBGCYrtx1fd-g66I*LoMaJew{-x^l!WT*hab6Z&6aFK z4CI<&29-WZ=GsHyrc2evLS}uF3=(6mxF6e5^**KVUK^P#u_QuW#k{M!(>!GOL;P-C zFy|?LfiA|GClXh6M`iam%@4PQZ)t?kzZ%OFo^c6grv249nW@53F>r(>;NtY;OtTnP zm@}D*17{pPLTwS&m~fCR?o$l&g2ENnFIH)J)PN)sYE+PGoAB3Mt;wUYvp_J`oN8gD z>VphkFE#fZC@GOlhSMBOs>*X5y**dfii$}*H*_k%FfcI>K`!)}yp1Yp zg)r1Y#T0ye8i9Sw&{dn;pDLph5CLNy?7uxIJNbpN!K)>*(QK*I;pyL{ncX&y#YuKh z@Ua-(L^)q%kttTTloD!n&E)0oQM*3Syt{L^caJ9TT{Tl8qC^SMB(2JnYdw69O(IK| z=v%K)Bh_)Sg(|etGvs8o)uPVbORorW9(u>oP9q;$ib714{QpU15Wz<-_E5O_I8xv}K4+}ZH{fmLRXs1q0 zN9#S}rIVb*Cq1rAt4p%BmMl@jVI5bbJrdS6Z4zkJRBlZdAqHmTtULv(&`=gRY;P4s zd1jimVDW~q^}v*Up;BWI*LZq9=+gah0QSMsQm0VT^`NLMo8&NA8evEb{D4AR)d!#I zSv75wx=)G@Tj~kgHdjADrp6!J(|k?lT?G+*w{>lqnh7jSx&&s#yS>uvr}NJ7`%^myK2j(t($Ea*%M0P-9ro#A#KKbx7A6ecWb8^>r?3zH%2%$ zRkuNNAbI4YB*#tGr?*K8l*~8ZD2c5Tv>-W>zRl%Td2Cf$4MwftjsU@`xMU$kz@DlR zk0Dlo=dhhvs(U2W<;mhiT5S7Cu{ByLmRn}(t)OJ;&TSgO9>OnLU=iqNCOoTCjWGGz zPxxCceUj9VB_5G}<|ATJS(CWGEFNTsgNx=uEf86LE|@JtvzKhFTA5@4zz5A+W1Cu& z#PziW$sTo=1<9>~+4AJFl=LcUkWd33 zqSB-UYczR*T@trG&K6JH-VqktjsESk8hUqD{h6<;Fsq3>U}uuc=?;OfL`J7Z%ICqEvN1Kb z9Hb*@Mhf;+!a^EsN6SyUN_*TnGaXL$yW%A_r}l%@9*j0WdJp2YRj|nrL4dZcU+UY@ zV{liaHGPy1LCwX=9KCLxga;07Ua@6W>Z zkc&YI&jfPOI`<(LN~-c!sn#l@*2n}?T3w%V0o`*dU90~uzR;#88q3(gh5ocSWvY?+ zCcye`C?ma4ThZfz;tk%*^%*Vj%qxyrtVMtCiaa!qe?3st>sAddUg8ZB@|P>ox>bvp z!3qFlzz>O8v701OE={5BYct3 zFHF@&)jA=6h%zacP8RpvnGjO94J=}qakH5Tw?0Y9H$W!4@b;*jVlcK%C#LOX(~MaE z!S6olic@7dh$!2|OlMW}h)AAf&xQ~PQ!8MuPjXtzC&+X|2})U|-4f~xxn)_Ff9X$Y z&4l=SCEihC-mQGd?Q6P@y=T&USYJ)6`M{xi?DqL?YpF0_ zwgW{MB08A5weFrSK-0#wZM&JOKXO_%2D-Ho}pi-s^k5jOmFXhlkA%3{UL!R}YKYicl4SWd+GjG+BdH zGKp)jsn8b5l@g14feUK*aH@(b?s}a`8GVoC!-P3&gI#Reu5{tDWlNWZ>^nKCa;#Ev zM=;o&q@}XRTG^c$X`wAp`(SmS6i;YmB>m8Crqx@qWdnSI z{R~<_vrfC6AC|2SpTq06Zdf_H->?NvBd2p3if;SBvYdv4H@;IYZd22E5)$k9LKTE& zGtEruEuD?87~U8gS=H=Y8&MxjGeHSarhctag6|pm?vb<9v#FfI5__hZ zBWFpom=Ovnp0^dJ(b{4`vSN6U2DZ&RY{oOWB`{cD(g`alSz^lS{b&E2i!0V_Sm(6` z*bI4V-?blp3uVk~1I-iZpj@%dS%mlfV{tVic3Nd3Xw01woYXtY{%D81DPWi18B;^*@?L9*rmeW?ISBqKH_XqREHrsclyUz^OAaIR{8HxW7=wJv#hHRSI(-pIf*4XX=#C zS0GQf zHrX8^A*gF{)sFl6VIy`6q_Urrbs?v^BQ7=~FJ01rD41dR8KGuy(*~Z5<7HdpZZ#d= zu!CvrRnRo8b$Q{kQ1Z(QS5jP5)-Il<(ouG1S+JemEC`1wo2`g(bY+Gm#8M4~n|M1k z!nvbL>NhhX5&`?9!Fgw41^j|RM#0MIUf{OE!$cHDOJ8XZJ34&6QCPWlb;2hdp5?{> zG2v2m5*PF>@mp0(A{vvzvSDe2ooJ^1V2L*DAJghhi0a_Hs|*r{m1Syj@BB&(*5SiLhI(7TPe zp;`~5Zp4&HrPRHaytw=%-Q3L6-Ok1Fb^<{}gVLB?^yv;c4PL@E&sZiDtEt-gNdP7$5iY=VX(;#b88z;Z{2OqY-ux87aO|;F+{cTGNn{yRBh=@pgIMU(6ku$i!>)t1C9L zGC(e>IPvNXl-|K{$RTw}#~}woYF0Pb6$rWPSphQlBXnjn^Qk*rCep$hy9Xn1Jv-^2 zurGz#a=)&9u?;$N3v2vLSGd_JNOrVxob8$#)Fe;3v|XOFJ0%~HRP>kkQb_MYXb+@_ z19orFO?WYyI*Dil z=$Siir+tP~oK}$rpsqsUJE#N=DQM#j)|*z#%W zWE*cJ`xe&wrj)d{^`nc@kpXP+&#zDk3l-vMPz+4IO%a{T_g`<^u z*>FSY=6Yk{hN{l8i6qMlB~Z5y!^Kln-18=ZxUzdki48)Pa$!TYX~#4M*R9&LacDU6 zKFHpWwS|q^Hbsnc3LEPQp_4Q8!vuN#AT};U@grJ3b~okhGbR0G#zP0to_w25M0py) zHq0M3Qpj*b&F`I2$I;eX(PN+&BJv$q)f#stZ5q)@{kUglBYG{%PI0VJsU&CcJzTSA z^8xFhRK+GcO5@T+Sb1UM1(z~e#7~@UHzn*r`s{Dk`_2F66+=TC)~s6R1l_f6zj=5? zdM=cUqmrR@5>8N4q?7o0+RVNvSq`DhFX+5!T*Y(mHm~jBc`=^jC2f8H%gAndqKyP| z+u!U0H>v%M77ykEw=`M{8dL*aWSsYI-?zKQX-ZChl6RxtTz{IDf z@e-~`5J`x~Yok?Gx8w&8OJOeCrWd-iPA)dNsf2FDKXgDaQV7lN{!vfe61QD*tg%l= z7@>pA#$|0QG$BLRi9`;LY9Ttd!$*qNR6H)7s&q_;chbN3!EGp`mE7>tXg0XYXlV6{ z42^5Nfpy}zZRLugHQRC=R5!Y8S;H3cs8sZTmcy8VzGh)444a)Rxwy};a=o}-8 zV+-Y)EuKqNR#Z=!b*i3`Gu<%K^xCFXsXzjwq^d!a=n+nG0!wTixjMq$ur%|_tldha9yw%)TD+jkKIwJ&O9Q!`-LkVpeD&q zU16E#>!zkst%6uNx#tj~vi%w+28V1MYE*vn(S6R8w6D|JuFyXD;pNQcsc@aIBrV{6 z7jutv617|Hv*D$7JX-le7zkmFS){!*v?%GKLkqWh<>oc=nF|_1nCLcp5Yc%%*eb?D zKWfQ%mQBj_!O9?qXi*+AA`!Ay%=w91Gw~z7HBw>7KtZI7EKEns$+xs@2bEHpy%`Ly z$YQ!06Dnr)8eWw~BIykEv}tQ|IWg_E=N9>q@hxm1ire5VYweBoWVW*~?L@8%tJ<*% zt>2KV9WyM4&8t!moW0QjsQJzk!c3B$ILSR_X4k7;$w(9nZb^vM0OCJuULDt>zu^8(Z3M1axIW+TtWkEzMY5 z`H$j~&Mq|VE~Q2#eoG}MavZ93Mx6ud;NsB|+o@8~%5LIp?}TO*!(7^1p5?M@M_ojy z82~lMd2ViEOhc( z{1$gqNJP}tg25LI9}W4)OqFSOxJt-Q--!+j{?Vqry}q@FMDA|dux7)y!Hug2x2#ze z?oM(U(WPEkfHy%w!tD%;H@LLxjkojzqqbIeOnU9~5sy9ER13KvNPNar(!qY)w$awe zH1Qpz@5&+g9mntV%yRaybBSp9#eJdvi*4^W6>N5=Rof^jhK{{$n^uuvd0z4AH;jgM zRSxA~N4KWZ@D6Si-MrPdaEHS8XF^Dt(oM1l@P;r1)1XeR2K>9_4cX(RP`l_nB>+VSQzo7jpQ1a+`@($R~dEH zhE;F6T)SPpJ@z7Q+Vjcej2|dyqGt---{$NZDR9ztn5FW~I=RIy_~v9gRioF8Q}7ym zX?@)06^adCh1eKDs}n@pwyWuOf~&@5m)LxF5d8DXv1u0Gti20jNkKoO4MFXW<>I{D z=p1(2p1g)zhDE=vk|vYpQYkN&+?DfCsqJK$j1KA|#@qr6)KorFNMBG6O66LZZZH|4 zH6(B}p&g>^Q-R;u^iGc$9(fme6<0ShVE5Z=t=h@Q{$*abW9dq?Q(NRMw zJ!CslU_-%&%Fkg64)1B}g5Mp;C)Xb&tA^Jnqf=a=P;R?z+PtO9Z3s0}r$1(3(XCmZ z+9u(pKDI618hTe*Wb;n)lHI_PY${F(h6$h1EVI~S?Ozo z9kYqa)`Fy*t`dvj$`*!6eqAHGpQNF?*o*C~o|<|O?sBn- zY_~_}a3hu0E=?=ce;2~XIR_RbE~9S}Fnw`)3oyEV+kVk3?7Vo{BG(0nI|t1rsE4D| zuDAg(BdusEV;sn8GUJ2Ik__kRg#+TLam!2WL#gjldkYJDv7|rl5*Umprva=UHFb_c zecXJVoi~&q9nnTy_DDmw+glg^#V9g`qLCTsd-!*eTrF=#Q8Yex1>4-HOUGRtEEli! zJNDUu#=^sr{>2y2sEd{^x@hr|xtli)7gs@UBA?=FnB+jRWYMCf#YGnt7cWj0FCAF6 z^!!DaEM0`h;uf~}%0ffV-^Inn7bHuT3|z42{6&PEyPm_o#bKm{CVQfE!{VwPX2k>* z#uiNlF4OFaNx_u?`xz@QCsb{G23}Acu9T*@c$))4)#i@mvgXb!C#(JS#`xuPHwEgi6ZJCsr(n>+?DSM?lY5&M=SZoskk!NqSbV3op8C{eeFEMO(-&8e z*`CtQW@{hR*~@OvFc;@rHdvA28uzItbF^BrQUuSE6}vz&fFaX8MY&7M!8@jViYU~` zT|O~J;CZe3Dz&!ho*~!&HL<^NKIi3v?H-yjXSt`- z7d#XJM}KSYN(l4z+y{%E?iAv1<2|9Dra5WH!=@dx-ZQ(8V7{l9 zhilkGI>GQI^F0%`r<>YaZH6Qm7DJ85j7blgGvhs>v7v%!y2mO}3Klp$>#!6(mJ_oH(#I{#I+3B^fhBfMKGA|@vMeWT)<|OmJKu3*vEMp zQ{ly+PHn#Sdr0Z6hWeRWV~vW68*@72B0d@Lfnmj_(=XK4G1rv_%)OROsPo{6q-iaq zE|ZJT2Nll`9R!xW6aBG?j{Eca*GL-qit#L)G_Be*<*d*9m~t3znn4?e(AI}(c3iD*at1@LdMC;ggQcM&SwQH!IN6(f$?|;ktLs$=@w;UbcMb%%~1oF)v`v$B6={Ow^~EE%M8f z5z4V*sfGw{yc6vai_Noowy#<5gvRqkWA9GZ?nTW+84darN!aWnP3#p}8hKUe*4Xs9 z25t|Rq1VDvkO7-*vpxH8Z?^VQt7g*&FYRv#VGR`8@c62^W6?*~8E}koa_@Mw>Vp}Y zJJ zG#6|jaQ;0lUZ>Ak382v@5G*UnUh)*Fuj8Ahv*RWCaH7yz42aZh{iIP4^}Q@E%117^ zyUQtW-p7YCDnQv1k+&Lq$%cMuk*L9j7=p}Z&pbzazMB7-Fp_cjCw zL-N2BQP(M>iI^#7Yyi;|K@f2!B(J&ZWlk&sV17u^fvrI%H z{)P~zvhT^J=5&2h+o8M*BZQ^afGlt^1QKEm$e{g;`2)s)BpEe}$yU>;p*<7+8cCv#5VG?UWnw?Y{mnIC% zvK2%$NNF~v=k`D#Y{1|!*k?9_@YQWK2yVb z>54fJigC2Yj1it?fm_Bqo4PBkaXzdq*$y%I7zfUf_YkdTp^=V4&EjhoO5!Ti3C@d3 z`e~YxAD@A066qaDZAXP00rza(gKV+=ni29w9jA>%^x?!+XSpWtZ8CM9r6K}vu2}@L zgzQl>oxv8wSpvz(git;R^8`p~glu|$HhF{Tel^i(fT29yt}}8ojHXwmbXpSX)t;W8 zguy_wqHbG4L0?KntfFil;*z@EVW?K4OGQgInvNNxivFXx;bOex4XSFu<1!jx)Ehx^ zw;7VNlc3}d8LP9h;_fXZe0Q`c+V+KZ)TgIQE=fz(I?|AZp)loQc10Gl_Jv|ck^J1# zyioKIC27{|yUYvaTZudV8#X^^!bh;+V>6|0V?)^CNsSF@Hqo4Dm~~KY7oJ#&$)PxR z$yyzX^+$c~)Iqy(&b&iH;^OcB%9@i{0 zPiQbf*Eo^ z+;mR-RRv5VkSg42QAaQBnXmoCk+0*Pp+ncIvKP?P4Wf*Bb~8pDnPBfT>?WwB(g~0$ zoYkGL6nD~r%c5G_+h;$%&79Gpr699JM#dVf(LawcO|m{9Rf_0H$g%(%`eo0^#*{#v z3aZmNjGD?ODt_kgHiQ=K`U#7sRfYT|jl#kFQVQ==D=?ngqQ|kKQ_IG}b+^pkB`l;N zv%%H|itC{GCQAU(yb-JrWq=cW>fKwWt@D6W%E-}~UUr+SC`Fhq!vfQJ<}Ok}QGTS- zwoZ?)c8)yQI_j+IRF9N$1~qT)dMzUbvc({7l2JQLusRsN27^mAFx||!VZuT#i;Pbq zgHWed;kH@db9L2_C2i*v43Qgp*t&n1OWo5(&9#P@`!|Li_RUI=Y;1yBoY%W^*=4 z?(DRO6vqq67&i8{YoI@>)16x4ZQ@M))&6HQGtpFIAc1s@<#v?ONi{8}r0Uk*(Fwoc z=-N_af?BEV8)tD+mwmX9rUiddc)lLg0gNkomm!?VC#DZ;&&)zq4qA0j?3ET-QK4$E zojYn}QEH#tI!Gq>q1E#UW8NLmQNf@!Gl646EGS7hs8p`M+rv ziQKFyDI*9$y2@dsvO~fFzx_6?LyeHjAkaD9%Pusvo(S6dMRB9G%NnNU%&sCqXKXBK zYErID$iR{$J9WV>154Lv$dzWh9ws_6t%Q!NCZddXmE!62yji6pja%JmdDzr3)75;L z&9gpdQ}fjJHW-0Tp+(e{U{|RlSXC`JwYS!7SjojjO?)_gfu>U{T+BJjNjm$oYLS`? zNk~F8Rqs-?<&O#EEF6=YB*c63Bxj=SSH?R*qUWY#sKQctr9ckKJ} z?v<3*a8R-DnNCd|Z8Fg(-ydvf(UuqWKKBsm(*~WaeI-qNVI1LxZ};q}ND-o#I+B_# z3-_h*E$`?ey;ZoXj%6#x25P8t@?b@QDY$-Pg_};wjT5Q}{J z`B56paI~V7jffy=RIYB{Z)9#ODMvV>SraeZkWz7`Woj+@I`);+p{y{$rc(DDiEiih zkhkJvR+Ypc;Roso=nGh3Q_R`>imbGM*<{M1kje!%#8G&x7+E*>VM+^E((GA>3`Awc zu~1T?B1)Iop<^8{E-8ymSf0aYI*kWnX{OjXGpnKzuL&lWirx>MjQ6!{%>=8n4YU*N zK4!BVvId$iHv2N-iZ{1A4)LC^1s?A|u1>@QBXv__lkzVrQ=VWiso=!@F!cXXnTJjW z`8KKEVL3%Y@G;B{FvXoiD)m5;ZLwYkm||dUEo=lUOqEV6Owm)v*wzfXP!lp>5TT3| zMrr5smap|FL-?4~?K`pr7~nXQr<~CS>pc0$k;w4qiqmv@%5FdLn3(sRYBCi^SoJTO zsirVn>evHdBX=BxoShO>dW|q*-=;SP@6#ip8t?P9iElI26bO&Dcm21O z@gO5;8*AEc0Aq6bvE!f;kMgJ%5KL1oGUm4o3#g}NtTlPRNppcZ6wQb!MQnZm1%>)$ zAh(Sl)dSgUYLE0Cl%`Q7OkZMO=-_MOCvcEb!qN*ftBj^1)wn`DbnJAY#XEl@osV}~ zzxjx@MsJR&sP$m!$F5*$gq^`ubCPP)pusScQe>=fDR!37K1j7MG^ez7zAhIwcM*C% zbq{Ycb=L4x&uH4IbjIP@F|>Zti%GhZK*nR%d6@=Mo$cCnF)n8`sWUzWrmhbmx$3h}Bk%0NrP142 zA{~EU4RZI zp`z~6{7>&=6dD_okgoc#ut|!XH=U7c46|l2uN1Ov6G{Z?nj-5V2UZj@qIGINjbWx* z65f0lDg{Fa61blS3;IrOK+B0iK`b{FiEKmVzxFf|)#+#ds<(Qo)XhhoNjNJ_STzL= zH(bhS z#4dgk`$gd7!ed62eC0$rEFp&-=A&Y0Zrt>F7{;5bs9CbcqhcRt%Z<<8O`A+dHq%i) z2@UjI8Q%xhV=uUe@u;q($f#@FDsD1rF=7O#>r?Ylltb}k%t!4nieNv=qKF2hLJaJ- ziq?Mi7lT`nay3sdB4x2fD^l&)f)%O1LS$_4b}~6&To(qW7|lt|lC{Qc(e0hoTFV|A zx^4|^j2Jdz{6w2gnAA*_dRdg}&YDYpP=IJHmHU{rjw4{(oJPX|DxCIG_iWk93XaxU z7ucy7&O%x6arUnH>Y2LlERonvuC7?IvBI)thNL3ty54%$;GAx>>7<#Gg0;9MDS97b z7*dsTRN{&fCk?DgS>5-!2qhBTAA!Zb6tg0QFKhd@OiB%+aH+CiS#y}KdM2n8MQ8Sv zvlG<3=Z>D9k%MD&8C`r39Kv2Jop%n#7c~IeER4!#(%P*z4w1oxZ4wsdQMx@S+LVG4 z+N?00>!q2nby#P7vMR;lG)7I|OWkf+t({sPrTXL$DKl*^ZCep=;KfaoLz#z!r4t)& zQ{{hjt@wgU@SDoms&3UqDv{%0Z4*4E?lfA(mp#+4=9Kl^wklN&C&4EyaxNBXJ9H!v zO-K1|5c6(AYTiAYN?SP3gvkm1?w$>!bq5p>vL}@ZWC?YB%7*h&w`FZtA^SOMrbQe# z)ONv)Nht~Pw)4(fHLa@P@xW2HL%0N|dqwRWM>Fne>@qZ!Pcm&V(HtURR|E&ngIk{x zRd`7{i{CasW$QJZ2+bJM%~Wq^LuFG=Cn6$1TdqRfwtdF!?R=Syd;1CMyD&zoBa>CE zE>2{9j?t+~MV8w->`wW-Oj$4=8o%4L+*_T77D$te=ER<|cHL)seh{l?3ua1@POXP! zvaP|f8*j8&FHIK)sZwU*3czuWvSJ!5-56-3)n+|u2AJxHfk8QptWE|$Y|6xjVQHO$ zX)2Gpxlf~xvn9(^aBlOd;L4aFTF)H)(*|oXafy35XXhX7Enw!$*?$oGG{CV7P|6bv ztpyi0L|f;VT*Zl_pbiLSYa6WU5cCc(3u>{UM%%C3b8>Ee(pH-uCadz}ibZTh8tc(3 zDX%7r-wrlxmx?SOP-BtVt%^fuHEEl!%6rZ4d6~tKRX&LAg%w+mdnH|vMMUmwtK1aI zGSyzYaRG-Fs`9?BO;Gd^6keE^NjV11Wvy!U?S$|bM&2V5Dh(Er?GWC`c6?bma*E8? zh8HVVbUKTZe3x5^51XZWFKqUTvR#?pPvd^9Xzc0$VOUX99-P`NlfHt|D_Hl&w7*KD zs6NI0jr{Zb68og;3aip_!g(-NbKoe`0*m=Mg=Sl{N3+M%CR9>SZX!K&c6(osD5N3H z5RQ`eQ#8hfTz@K&HJp>P7&_O0I3drXBn;P({pR>`qqhpDLs$i0*6&UY4>r zzsqg_YNMB_Ec{zD*)CyQQ8YeP%n0N8_H29XWgja>=VxlPa^(vIa6fBen`Y7Py9VrEso@Zh>Qe6)S0*TwqPG7 zEnI3e%bVWwD*B_BXhFrcx%u2vwC$ZTUD60e^Y77iR5%MMksTou;ob(c)T_yW%#2{D z)|_c%KH&+ru8LyT={ZIQ=5$gWmwU2yvpV7ka{pfzRj&*mplIr{u@#MGZi*5 zQywJ$LQuh&R^0lwKqDVJ5K&Pv@YwVxSkg+PL5?hPCkA?6?KEJYL&~-D6`7sJq@>ar zIA5`Bv&%%Cjk&9f2eVpIpF2-U^A{JWX~wX%&xZh;n8gC;(+$f*X{~a_M}BQg}S zFH5L8s_oV}_#k;U2bK8hL|Ukzf5MbjMx$U7Y3h_u%t^St(%|xpW}L>6&B7K;hkJop zg>dVi?UipWJZMFwKUw1obz$Ex6B*4?wU^J&k~YI`xHO+}4{d#_y+>E8Q|YoyyZ;5% zZpYlZ9aC@i-RB~AUG0=ysD(1DcC<;3@9xQ)e{7!#8 zH}!ZJjAKQ`2h&8ZA3{jQ#MTrd85)Kjdx4U94A3qgRBVT)U!e z<BA!2ENO_64lW+n(Qbxe{FS52YOD`Ai=l*v5Qj@QTKaPlPBK}~y2n13 z`Aw~JN!Mt0w&Gj?{%V{G(zCG>GhX#p6gwrz-#d9T9mqtmIwMVm3rXO@KGG|u=obrJ z;avM{ic4;&Z2Liv%e^?PFJlrZC%354b=Kb+p9}=i)VohGbv*vQ3if*wn1U-F7OU-Ej;hSogAeOKp2~?6>HeL}Rpz?YYQ1Vbc!3U?7#dAd zsFgUDs@D6k(@~jZSGUO#A)P`ldc2hz_uedv7E`*tgA}OweUn=6COoQiPF$8KcrVv{ z<%9ySteDC*7Ao4OK_)%cYWw|3E=twAk^^l=naZm{sTfceZawIW!0F zC`Q(5Sn)p8DdSEkFq!eD$Yp6$I8x$`61VoX5?K%{8dZ1I?3PmbK4c{1LUq_98*u>j zLCh6XHpb7O{X)#8m)MSC_B*HT%GAI%Z@Oa z?T*R`p}JWm>K>Nl;%~8^o0FJr;Wc*Ec~K5v=x4>=wr570Vos>D1??}aU9(==5V6lx zdyPPC`}ur{G;GdFuPV_*OsglZnDU_Ai&*=KxZ5*HV*sopS`7)EX{WJf@(O)N^IkEI zuJUC3q*3HcobeH3Neh@xaibNn-j${(x~zzKp?YR0wlW*KVuT&Visr-i6G<>179((J z9ns&fZqbk!uE>dNHnDVMDS9r;c$lqoWv+lp^AvrxqwKgWX4V)xlTM>dD-^R~dC@{~ z=|B)$2B}Tstr~;^k*49&TYfUf_bQEp46J*A?n}5G`x<5By_ry~OtI5^g+o>uU)_1{ z_R}k-j>HN>cF;21l^3oT=`upYV9gmgzx$~@7)jM{_XOEE$u-|Wu@uf@a&xWq=eDPe z;>px>TVYci6y`KjDrw{li?yAJ2!+BtXY^%y*iPumE`VbfWuYYj678!Zc78BQh4kUipmv0(G`J6LFwuM8i zCOUG-i5-@7y%eKbe<8>Y>=7C(7vad!fe7(iF08l3{dObhS69EllV6=iF8!jXupZ>I z38Z}|5RLBP9x4R&cv7EYv~7{aK2Z4b&PHV+Jp;XpsMrmWai=IlG^af6)Zqp#pcygh z3{fFoQr#>~)JjcW{dVf`x)H^%8z39Bd!nWk_zbe4OQWa?{nCt!DTT$ZwXL{+!#)K~ zNuw}`>LPRWM0Y?%NukOLvAU>DL#*(*^P-k!I^POg!#gILrAA?xtv^-ne%mynD?nT+ zjHU36!)uh$u}0O6lbMLli5jaPEh=rbv=LG0Tw3#@C?Xz;k#1w5tgh=mXuocsOoqUs zeKPuv3+3G#H)NzNb98$^$0JiiWyPS~=(1DR9Rj{oEp_|Pnkw_%%|@8fRM}8CN!D>u zr3m(5uBvoWmy!ong6$cyi!QsUeTYU0+P?$%+)u}wOV8p?M5i@tGA+npg^D$|sxFS@ zE-WoSbEQ>bi(e>?iCG;})f#eXC%5!b104%6V&^+<-a9!hc7ZpjrRQ;N$=`0)Ov1NK z>)l`bWG#t?Esbv2%$cb6q)LVgS2dVq>+9j^*n!+*C$(bu*fm@O;TOZEcFpKxB-EVY z(v)=QOO2X!vR3ipwpp_-HjZVi)Vi51#N;R5^wM-qUK4M%qFqUw(~Wrk3PXG8;yWs> zm@UKuyMdBA%@C`$|HtC>ws;mqMAH!`wVjPL+~B}gln^B-zZ+#lrCw9w8Fx&5rbJnE86(O zb`SLIZQuEBqJ}l?BRBj&eqrZ@Tw2lWnZyKY@Jz|BX9mytNP0S2c1+&wN2ff}*}K!W zHW?w98RIO85tkSi<7~+{koz@RusBAx=F~oDOFQmO&YI>>Vg)xlQ&hLxV_5;Z)-0)I zBQvT(pcD7=i>e4CEp)F4bTrxeKCd)X!c*G1ILAQtfK>5DL+mb{koTq zicx7KM6jEw&EC*8b=;yXRS%3R4*M{j{BbGd@%C!0iFmLstKiJ#g_$`R^A@bf`V16F zv{&f;2eh~~f6av+Y9XqUGIWs%9&c&XnB>a?Mrd&3V#b#gB-9dK#06RHfpPn0wF4%> z25Q~F>f7sxfKF;XNBJ13AVc$so6EGC(Jm=@wd)71B)Zis-tyQPn=NQ4#~SthEQjfB zxHfTTl`OVLC%0$`zV0ick0#lPqmoPi9mI(L2N&v`Hs@0HaqyvZ(B?9`jUmT_IhZyQMJfDkim4%gIiRKgpKg2 z%fH=K^OZ0b*OIP?X0fc6T{Sw8eYKq5R24n4N2_1D=**9`+Blqkbp^?+UxOMuZ)>e{ zgp=6eVsz}1?Pai_K*k{o3Py#&+4Vh)2vB+6LuM~vdQAsBU)I+M(owh<(VUUBkCml)Yd0uyZ0QJ@s0EVJE4_|8M7v~jfJW{L^6A(R?+ z<&l(V*#VUiuWNL5 zi>*8|a_q-kTRVofy|#|Hf(CVek!ZCZb8V#tHvqcDHs7k#w5`tAJ~oAs8*DQrUoX$T zuip-$m{lgW9B_41Zv8*Ilc~R;!iRKd2wQeHe&Lm348-P}jC^*=hFL{oyd|SZb1Q7v zb}6PKYQi=!8E~`R(st*f`Oi2;@BP82b~+fh_K5Kr)nJ|6C$ANo4l>mo#}G|o z&CDCakOViz>CT}?(xEx!dxL;}>T zqoQsoYhe-!v4C;U$GcE->_lLsFq5Q(JP{h9#Q~x%`bnwU>C+@jWS*P%qV^o;zMp0x z*n-m*W~{*#nE`X(Qn{`R4>F%H3OCy)tb@(|X;bbKnd`I@7h5m4nYsWM&D)EM-g+Dh zbH5p*anWzDD5L4P=x5gWa`xj6$#)SuJeax57?In5@KzPWKPV*3l$({e>qS_Qp9o?@7;wDtda%FYik z`EOw__^e?O5s)2&rMY5eED9HHg>ID_!qOE*pBS_4%l1js%+#D+YUtO)y6L%`L!9e| zeyCZHPa7pE$4Z80Nyw8DO~&UiN7bpTb$w{&uCqcK1`>!jJ*HQJW(6j+9@&{pJD|^W zq{hfip5hUQ&MZV~ZHr=+c3df$Kv@#aHA_vk1g6DG=aZD*q}8+lY1niEL~vKFLhr(j=6*Yb_7uEf2%j%C_H zD7*B|kEMhFo6t!Jgce}I4lFF41;SF6rT5U54*UN;=ghqCdy8Z{>|YPWL#$yYGQy*9;%%3gaLg96b3WbxvTfo!64}d3vUjqqR z_$4?CeBk0jVF@@FJRQ6aR1!}Fj{#o~_JZ#M&jx=BD&5BrNqAnsjiAEs0`QWo2z(g0G5B8zsy&O~S>Q84wc}gD`_F@__pgJG0)GK2{6nbJQ^9k= zM}zA@uN8P^ z7u*Y;3f=-L{~rNi8HL}2N@w0`Pv;s?-+6X$zZ;~g3*Q4(u7r>1d)I@?*Ym)Q;JZQP z{{d_1tKbEo>iszZKMXz*_piY7!0I~B*Bb(U8dN>~52$u|?D|51pM@uZ`rgOEx!~_W zs=RRe<({7%pxmzp9}9j1R6e?|@b(`7mG5VRs{c=b6uIy>Q1!7ArgA!11XUkT1!seI zf(iIFkfIm<1S;RlDXi+F0qVPVfU3`5fnDIdO->J2fpq=C(?He32f=f}Uw|sl$(uc& zmxHSRCxc4oouKmbLr~!#y2bnT5>W1|LFN1Dp!&n>K}f0aK~VMeS5WQ0hRRU*XMj{$ z;SNyw{xhibFWl<=>nd;_?i#4@uLirpe+&3~5LR3`yN|Mi*9CkHsC2&t(v=ExX>_@F z1-u=ch5JvS`oZbjJl*Z!0^I)y&H>*CE(gC2o)4aJrSs*hz;kd!sCN7vsB})b+P}9JRQ-&Bbg9BSz{h~U0+r6gw-*W(a0R#= zd?%>y{t|?A3k$FDezq5c)CwN~Rqrz)-YdX9P~mO{mHrPwk}jNcou_{jsC>Q;JPrI2 z2uTzkdcD8D5?qM;IpB%l-Jt0HOQ722FTs88gV z^M<_t>;hH){|qhyzYD7TCzJ{WNTqNEsQP_9NEa>q3KacZw#(~l6jb=vfvU%^fTEX& z5BvLzK+)d_sQP~ysP_jz)z5vP=-{N?-hT%{mG4!c;(Z=ezxoq+Hh6Z~>t`b<_b{mU z&j(fi9{^7Ue;E89e1nf`i$LXjEqEH(02ThF;2iLy;0o}^py+k}NTF~hSON8&7l4pr z;Vy73cx=V-8gMi2*9Z5n!HaSCjCwzr07X}Kf~uz!Q0)88u0UlrXdOQtWfcp~g7_b5=ohJtO`@rLH{~LHb_zmzB@K>PHIeNnD z@g(qE+)Kf;z+q6|eGd2-@Z(@N_#N;(@R1FVzXnu0Yys7u>)>4Q*`V@sXYk(-o`Cy5 z!Fk{>gZtz?PWKBzefR00zVjw1nPUUCY?WQ3ixJlHU1CU=kLQBdW)7Zja*7n}_~1+j6e>L!O@Si}@*?)k_-%-!< zd|e2tUu_0wgC$V;d=98~d~LuFf=cJ!fM@-qyQ`q+;{BlN@qz#3{pM0o?tP%>;yqv) z{290kyz<%568I``4On;%vL>(=RJ}e2Tn@ek6g~bFRQ_i@*UNVusPaEC;PXMX|LefT z;Cn!|_m4o;|D&Gg-&+8xTrUMx-aCT(tKegB{}$AD9`Sr{|8=0+qX>3^H-YDZcLe+< zI0N^L7dRdV&cuBxn1FM^Mc{hyZ14%7>i6}*{T@)|{YLQrGpP1E`h`v>-Js~N4^+S1 z1I`Cu3a$V@3aUOI^dfK9_235F6JVnE;9l@MpxXJ`7dt*4)OVi+o&(+rCg2x9edpJp z!aw3A&i~H_Rlhx;(M#|zfugfXa1;1KQ1$g+p!&lRFZKAR1Y8(!Rluvkgm4v5_4B;o zem8g)?k|IL!9RlHn`gev)4dK{g8N2L-+L=K3;YbY5d1Z$_B`w5p1;e$N8-LRxOanU z=cj<`=kE>gKMx*@`#Yf0{U1>6{-{@Yx~suuxc7hyz;}ZefZqeJIf8HgKkv7DUg_=l zLQwg*9ef1%X;5_cP0;$wKRcaX3ab30;4$D!!FAvpL6!gK;K|^LuX1``1S;R_L4_Xx z6R-v<-!B36o%et$&({O~0u=oo@oJY7yTIkRZvcD2w}MLd=U@-`kk>f&f*0X_BDfTM z4=6hP6)665+H1W&9tU2E`}v^K`3!g>_ybV=`>&w#*L$=34}yxn4?GY2K*0OJ<8jY= zo%h#^!AIl1GPuVZh9I{4Y({spLdpK*)h$)M=qTu}XX8TfE;ZNP1y z`tM-CYQRZQ_4st~Vc;u*|LefTxZetj9=;XaN59_F=><=~e*>s?8~`r_p96|s_k*JI zAA!oxQE%{iI1zj(?khmW?*oqp%b>#T1(lDd1$<8Me<^q*{;v)GZwYv3z`H@kzXw#f z&w)lC!T%TFarplsyg%xV{{54{1pjVO^tKsPJ?{Wd1)l<{US9*A0lpJl27Up2B6!Td zxIXH+py=UYw|ae?4lcsI4!jiH2c8eUAG`#-4-}ovzs>7qJE;15KFGhq$N5k7UVW3( z*K5JkaDNB97(C+5K29wK)sLSE-VVMSyaFt}#lL$8SjYWKP~RPTtB-59fM?Suoi)h{l7XDBDwjr+CWJn%EY{d;ge?z1V}3a}6C0$&cQ-yQ&Wfqw;i!J#{R9)Byi z9QSeW@^t&bXXCyJR687fr`O{uQ0Y7w901=7itnBLZghy?W5Jc+ZJ_e;Q*Z-#(tCVf zSpt=>JHf|+zXMfY+wSuE`$urK-h;~DAHj9t()W7(KOLNd`%R$u(&s_(w=r`zk%yx=$=Gk6K^CxV0E`$2_2^-InlhQL1D9{@!^ zNB@V@|7x&^`zCNF_pkb{TjP{#Swe{tH3n|Gl8<>yO~o;OwtEy*?S7hx=2Y%JW-r6rA%7?{6;yufqKU z@OtplZ@T}hL8be1Q1!gvTV9`gz#iQ11~-8Bf!BbS{Fm4ND?pX=r{JaF+;2M$2fQ`l z_rW~{Xz0KFd#?hO@1KEc$JO8QdUz$c9QPMMwcD}Zb-rB#Ro@>3w}D4~&)r2(`Mm=? z3j70jCivj*dppbpkHI|vs-M+@`vc%3aeoRt7W@V{8@vxxIw$5~;LIO7Ut9$~0{8Pl<>O}X1n^_v0`T78e%Oz^eNO}D;(r0S2HXKEU$=te z;QPQu;JhC@9bF5`{Q^+^>Z73A`PbkCIQu7F|Njh@aeoa|JFony&sT2&x8Q!r&piHB zpz8G>1Kta+!aeur-d{$+$Kt*dTme4#7rtJ%F5rhj(eHWpc|BD?x!(+`{r)>(?=QW6 zZvofg{|WFU@DaZX23!2mTLuG&tkeE~lLY z%Kt)eC3pq62z&vke0>zucm4>@0Z;gix7#xCc-+qd9|67^oCUreRR8;8cz@(?{rd^1 zd|m_|1Fi;-1h)k&f-`ZCf)5Axf)4|q37!VNAiRGEC^~sRcpmr-Q0YDLf875J@Oa#- zz-8ceQ000BsQUXlxB&bu*agn|ou|JQ6kR?ZR6V{m;1|JDasLriy*%poKAx=)cq@1Y z{tx_vmuEJ30`5iN5^!z6Cj|d@f~v23z<3Y9i^Fig~F7Qh5Yv4w3;a|OfJQ>`8`*UC~c*@^=ym%bgkNaf-e*)HVU-rMw zU+x4SkNeNyRp4mh2%ngDv*3L2uK~|_ z@DVnzyDDH26g`iCYR^5O;=LxgKMkIQ`!}HY;!zLr@-77Ry(_^-gL{Mf#bAQ_-NFCM zpwhb!+ytKX&?AiRjDi>8{s_1Y`~!G8xana>6rKTA!36wmz!PS8Iu`^ify&QIL6z@) zpz`^BP;~t_@I>(VnU3dz@?QZe+|}TE@bRGN=!2lj|9w#9IqFEqvjZ*Cy50>g2X6xP{s4Fy_%l%TaOA_iK39RK;NAs32D}MW z`Zt4@fgcaZ}FZ^Qlk5OR0$|3h#Ksyw1A{fQ49!#DJ|p0F?EnH}8!$?vb?|F0p96Y$@{Z?)+i zJfb!66aAgYyXW{%`~OM&Pj@Jc^Sp@XR@~=<`uhd=Xu_Wxz9Sx@zZLlZf#<3aPJXZ8 zcOTC`@cS0=wEthv|M%c`HP32(i_YG|?}yl1@iO=gkN#$m zkEelm1oy|mc|6a>?{(m8o`(_U9tGy_W4Q0)IU2v6=0p91-Qo8r?>@>ijQhPjH}d;3 zp1Fj-8H|7X_Eynx@&A>0_x1kX9)-30i3+^3WG@ALaX;4i@+;HSU;;t|jK0Pf4dxAQ!V zXEpBYz(0a_^Bfh*j#r@_s_$- z_k%~`|3Lh|6Z}r*_Y?6u9$XCS?*%;f@hrygavuFH=iPnb{rUL46~F(nH`KMNa(_sg7Ha?BvlD|jvoY5z07_4h2oZRYt% zF8mV0{1*40c>nMa{$1hyG5GzC-*4ght`gwyB|P7=U;f_>yc-JPSK)O#&+~&@A(Z55 z{(Gt%{QW!6GTeVOSN7lK#Cb8#Kl8j0@9TL^CEQBzN%%dLC;nZ>@6YDk@;?ptIfVZl zzn{(TlX#xZ?@M@A;QvqHd+~b@sJ{>Ld>i+pc=sFd3Q&KKGd2J`SA2y9E3d&whSy#Q$ub|HZu(_sKjX{5}uA@ACVv{MO$W`27Z+0e9N} zpTn)cAMw1K-xm|-&%y5};Lmu*d3T!vg}*Nc>;-?#`{RhCzccv#MV|P#f!`PL?j)Wg zc>V+Thr|29fd5Z^MCg~BFidd@r+{m~XYlB63-130e{U}2gn*w3Y5X?06Wqt~`|RNV zJ#aDZCxd%;r;piuJe2&xK|NYe-Gt( z5YJBh&*3?W-^+O($@A~HKM&^reudw$czhmQOB!ALelyQXem@YuE}pORY{73KxCwj= z?;gYN&+=P;f8qC5@K|sNtnu8-Z~a|DSp8iZ-1^-Jzi;68O*~)Z`2o)oo_`DPeiU#s ze)flZnCE>s-o$ePzvufK`~O?GkLTCi;5P?+0N-BD^St19fG{(8^mhf%xjc{Jnay)H zPm$*hJTrLK5pEgJQhskDjc4%tzj#i>{S}_u_O(@;=7TN>0j~EDGh%XsV?(8`fnvRsm`^e>Hkiz@lZ~a(fl{r@a<@caXzH%bq-b;iZ9lbYxRjNe)eJm z8LD)8;b~_{m#U4?rAbRZvUKVbwZ`DYGyxh_O4jlH%H72pZBnY0>l5X{da`iuY-nQU zs>y0`v^<#fd8PE=)seiqx{^pIR>`v~Lj+yZsCr!vmFk1F^7zD9EwRd{wu=+V#O_j3 zpD04BMWCpWA+fSr@7mcz*N3!| zWyup%obJVY=TCvjlN7f$He4%?ChJPYp;ApH?I(YswAP7Q=w)_2<}F7nAzGSO?|sd5 zHl8n6F0OxZ{it={L;j-0s+E#*Jt-!;jKn5(H>xA^lYvI4;~Yg7%hhsqI4Mu?-3Iil z3LGdUyVQF;?;)vbQgS{rVf>?9g~HWn)TFf#mD4fg-~HLLm;Vqxn-6)vK6_=UR##Ww zTG~Zns)MDvnmzgsm3C2C#wg6YTocQRd{wjx-%M7ju9JFsAAFAboNM(nFWJ-(Yl4l@ zBzqgy5exPTrUk>T1eJb8YQw%#_B{>^%kh;6ig_7S;V7fli)RP9IR=qSl%4n37t3#!|3S^<{$#}6& zZQ~t^Sql|h?-)kI-LTcZH-m*5&c3|6Sci%xYLn!Vuu8*5$Q#FMMtOn4+WdD_io?cA ztiu#5qJXwQVl{zgJG^arGkU>A3l}a_3ZupGanXFN3&!ff5+pUo;8C;ej}DDmg^ZR) z$7++y28z{@F40QGqPr*gv%-v)$LotOuowCje^_hkoi~O5s%5@0oY8>Zo*#X@Wvitd zlR!(=u|(8^?4lsmvFdnv(0@%NO=L{3jd3D9SmTbDXko8oR* zc1_$^r2DMd;?9}`7_Xxw3uTf@J=v}PR7`dxR36+&F#>fb>-&1$S%;IfCn0%j#*7&& zAgXF)e26@fK=RHc*;c&~%1qW*cOif!9?fHg(2A9;UT2W|!Ju0i8&-0Rw1cH_aa$Lo zX3U5JZ1$yf#p+N6@=aDrFwkEbCP_9H>m%XY;VT9b7WJdQjC5;%YsPBS9bc4~7`!xW z2JtO;3Hq(-lcaB=I67|rh)L80f5yMft6u}aO!jxKukL~JhmumQhMXgwc4=XDe@`-0 zt`G7(@1;??+&Q~GCvwu61%}qSv+MJEqMSu%rbEeBa@f42JY0oY4iV0S19#1DHk(4LOM8#bL^f;JTA6_k_~T z4hc^kT5?{LX{Sipgzz-^zSS#tY+Su{?dm91wZx(k1|oNAD)B_kBpNZs)-n_u6Jrb! z2(Y7#%0zjbj?}+-W!+d+%5dPXN?>xVL8~E*?qaG?UrONz$419BZSe7SbQI<`TC8+w zB0~c=#t|3cM8kuFEjb-5R#mUNjan1xk%0>69I93-4({gd{I(D7+7-m-u0S-cDbSad z@wSvBEvVHrArP4;3;i4Vyh**{+v35ky7rZ7aIhg*5OXk-`Pzw~r6BDArlgX3c>p11 z*d>cGdi!X3pJxVO8@K`CzP&njZCSsPT=gVp)R_klk9(?VUkf=9VUICM=pHvV+^`9= zMWe{MTuQvahZzO~h)c>t$-rc?s&8}0(DmvZP0J9Ujc19M%t?xa$k)pM0AqIo%YvoR zof3Kp(kR_v$mWJQo}qZoV0w}p8gO8Uq(0FYNNQx7w38cmm+3oXOWo~;VkKloJkGgc zwS=rNlnSWEwOkgCA)@R$yOGQtE$)S#&P!8q!X6_C!q$yFKJ`g11$Xgh!McY{s2Paj zS&2ccG*nM6IPZ#Nu1^X=g56`|G+m%=>T$SHDb^6lYsE>;67*J*SGlBK-lHZdNtoK< zA>yzR6Hw=HQiyF}Y`Z7f#mImt#5UoOOSQ7SvoJ+XIZXSRg-%=MjwC*vLvJ}3Ywrp z2<t) zrrj&KN>00M^Q0g#=G~Jlx6xecx!7)F$rK^S2M;S{P3)kya#f=s?JXhH2EvKmOue93 z)83RSUR5Q=*Ni9>ceGq*WI=;a5N-R^!f|HEbi?xo)5|L~oa<(u3|V6_B%ueNVD;Bf`xb$?Kw2vQjH* zWf8yB zTpCnXIGx=pTM$bzDHUs#GTBmHLYWd#JR@s+`&=aJ$&=KU{uRWdqgjhthuYG=W6=ec z_w_lkKp%)LHBB9_m&_g_dz-zzh@C&al-ka>d*qOzW2_G&K#npdP}BycR*o*F3fM+K8#dGE z2=frwM0pQGWva`VCB;wV%wZ6VrR`2oJxlG|QVR;Nc#>Fqn7dS{yHP63^2^w%4xomn zZd*!*YIMtnevO{V+RgouLkE?%=q6HNegF?To0yh;l!WLiCDDCsEGR9+nymqTqEx3i z)nRXkPT^zT&=QyUb_}RV#aLr_HzPH=A{7D&!?dfe*&~GHOXAfVyc*zA9UXRRKP0)0rEoR{5YcBQo_4n`C zx_a&UzW&u)E&kS2g=PBFM%BgmAtXll5<-WOQJj}mll88y+)#!AlchDLlVV&a@Sajg zF)z@~MZ$>0;_A5xGMr9E&|-@qwx&X$Sa332s!G3=tlqFDnY((Un3`9WM0%fTNkQP+ zwlMvmtbtoFMj$xl1xDwbOoalyxn6g#30S5yaM9T6m2RehrWUfiq4|yCfo7v(UR14E zXPRjrIgEeaSc8Bf-PtVH64{p4Yt-V>JC`OwEZFACw|t6L?X%ILs(Rx4NPhNGjItZa zu)8=kCY3fkl8RzA!DDD(aNT4W91aD^{*?>!Wf5tlMXe83E2I*J=p8$l zsH79XK?&ZP|1c#F3nr!lwaVCee`gdHQR)NwMk!%A4K01$dOCE@pjJUQo6&3bEr?6f zC^>Qtt+f@+I)W#SXwm5i2< zy&((@G|a*0YIr$U${g?WVX;iZXFbvMjVK81kdP=xqh*Cfti9F&EK?GyukPQzWA)a2 zL-aH?Lj#pQpKNLm#Tze{YYUk5RTw08x#E7;?y~nOz4zM4Wr-yb>MG`4)t%-c#~w-;z;v48;m3No+?$G>jM|hVe2>q+EOyL=qU>ez5=VYb|OU1wemVmp)D~)ccAp?p<&j-$8d%34t=iRXq+1v$+ZNtqPk^b!Up<{`+1K9jdm zC9M#KTBw+U504|TZ|z&VC3{sG9DxWJ>tO%cpzP!q#s;sJ$VT&}QirF17aMzR9E+3e zpx|RMx{h+bi$$hb*-}cV)islszbEbbKnw2P?ZG{n=HRNCA_*n>08KJc8g;FQ&$0Q) zlEr%0Db_%FSZtvTt#pi8DNjsL=N_a}0!;xrr;&Z5IRRJDAf2c-f-GSoL709aZkU2} z$QfMMXy{8)nl-0nv8c~OODOh_rqrj2Z8K6Wl1YKddP`1h2;|?CQd2$;o~2j|p+s@f z+*AcV)TRA4&G__zj8B)V43bmFys^d{*toltu^6We8jE)Yct*eRLs{^!kkdK57^sVO z>cn)k&Ldtr$w_?D`}JO!%IP!>6C zXBEXzW1O{M@rGb}V9LHwsWFOcJUt(D>FziH`(SBbr%=-Mpr{-&$)QplU`P!7fI?f< zhmh)7RhdcMFGYtf^#pC3s~;d!IjWSDO8F-Z^}K zDwMVL(lE33&fjSow5>W~_&5ePkIw1a+_)+lveeT7mf_Z>$g#e6N>XF~VF;@$A~KDQ z`{$xo!B@=GG98C{<}a>&uyFJFW^kue7&A=m??xzzrdwWhY48v|5Q0k$gErZLktojtzo^}>Lk~@WogFxR650t z3674A*`V2zY`;cwTxD#0honHseDjQwFrA7VV7TTlQuxKL7lv)o_*SR7q6$o(NTPp=xJryu`@n zy$z;`ri{7!Lbbpmul#08n7ZO)*Ae?g24r}XoCQ%G!igtrJb{fS}LHO ze>RaLjhoppT6LuLMC(K*#axa4?XwzscV7M3TvuUM6D?pH$)$9Mz*i!pQzJF!!I`o# zHB1iDku)a-`&Yt38f-_)Pd64P-8(lOPNrS)5}Q-|!D6pol}{9_6J4k^a?$jywpUFNJ#Z>rtN$;$z@{e}%P`CjcDcJP@z6N__Fze`TiLg0u{TJ_UsH+J ztz5LYDT(HpO0L4P`H5F!Q>-ZS8)ebki>Y}XeSfGF%&BtrQwND1^rRKn=Qag~+Qz$R zyiMCSZ0JH26xYI|Fk058k?DL>ywn`2FPU>-X4`x48~@3V%lDe zX2kjr-TI_0O_k*klFW*k&Z_7Ukvz$s4IvPwR=`}JqSNK6tDS);|9i6(4G=*}4nLie%|4NTEk} zS}JTV+rg3x2^~t^T6a$uplM^;Hf!drB}@SuUnpU>_eY-=RC{sCXHnW04bt8M8MukQ zq^gB`&%?}k;X>D|`xH>(yChjNgd;-4~yE0P!)k?1<6h{ zS%p70h5n;lr5)3EWzE#;z_n#Pmxv6eSf zL1;G9%%s86*?4dNrr5};W;bm_eK5`hB_x@KwMGe{8w%YaXK7$lPx%56-v~*?mGMaI zxn_=>CCy?^D4=-WR_sR0#Db)^e?1Ls#yc3}ncNZ>tS{+=6_h+N<@Nqkzivt^)@)ek zwFTH5dCTtFH@}54=FC8I#e=3}3G@A^6YEsJN-arqNgR6oZ2ZVY_oBzrOdW(p!i9_7 z)-FHSy^$?N#z$<=AHB&p=x9xG;o_?!c!TFj&ZfGO0c;G|Nw)}1SufR-9bGU3SYS$~ zFe$MKDW?@jTrG~=DC%3ndW9>Uq4F-XGQ|pHhc`&vRTY#gW}HQQw;zkE5g|~gbRu#5 zed*a$qb1i z`bC?bXX?l4EMn6StsWhpz(gl(_$6iEz!XiJP~)P$+->85_Sv#L0HeCh$tg`l@|_ky zP!OR#L2V)?y;E$trPfkvXp7NY7MV`v63o(Tse#;!@v41;D9uDLDs7GdNu=;~p*Hqbh~DkI${M{+W6; z=PQt>YtJVnmS|RHg+RYN-<`pJ(xj8PvTEvdDLgTWGb62FdU+#xPM8yvMp??VZM;$k zr6tN4%CerLk<#|gi5$|UhR~~0zSE&Pr((miGb#9BoIIDMzl){MM)$WZGyjz|=UiAs zpyuskhH2xV7^ZayMafk}dzAIewlk{_kJIQ$WT7#*o2BzQ_8p|$94wiej_ie9B{{QHw=R<#~hCJrxZlQ^tpsl24rT;!RB zbHey?PN92PJ<4=)-QyM66bD7CNnpNPAShXkX^dj?S!M!&M#2YMixtJgCgt4xq+lBe z>sUuf2x?ngwe7yX*$8WaRQ7YSE;Om`NDD*cC5vki1v3oaBUBH5GT_O1Ua~D(t7-Fw zZA`;fLDRH}OAD8Tl3!X_PH|CLyLgsLNBNm$!7RI35Drr|TM=XHN`ocDVikp(csn%0 zzN1naHa8&>0sExEd1s*)e!(E4XhW$jaHjAu5rxsxSK5O`htD?(E7q(^c%{v=oERV` zTr5}cLEjSJm9-?IF)1t?76-6IGxY~cw84H%t2ZI3Lkq4lNc>$v$Mog$70qW-B&%%o zl%1@}wcWi03Sya7g+m@xow-zDo4cazd+)#iQX9P64)La~<{f(6?!xM=TQ_gjgkREd zx;%pFB{ix^H-~G1gGE~%yTSXQX7Pw=nB0oT)Jb;=&9|pay)7$KBrR^!yJclxmzK6; zK3htb3v)QBWTizJjg_;1WttS4&ZRg=ej=T~`a3s=GA)hO>Ma*9S%i(kG-bQG558H- zrDNwaFeoz*V$6j5+b>4RutA|IwGfzZnY5-MrRlVW>C$ZrJYC8ynaHJU^{XQ`@-jeE zQgPzd8Yw-4^k8f_*eXgax3vof@c7(&cTW34d-7iT)yDLx^otylII*7UC5 zuzHnbDH|r!`SiN=ai81F!Wt=XoJWdZ6-QZ_ZLo!}>4oIlOuOcvP&<&Zo`4WIsby)VX`XpJAl~zr(`Jg%Ms`Y)A ze%xC%#NiGKVHL#TRP17=cKOjny@eoH^){WqmbO-Woq8nKYHncGA>C!Q|5C2Mk#4+>qi@$Xi}{koN#H}&=B-0QLZ zSX0;}vnf)XQP?z=5IZ?TKTMF<4^rbm6yKudV|QKNK2y?9W;}EN+2q@FBFfVUwqgFT zi9&`gYJTpFI*v?lMUR1ANXRX&%2m!v+B~40`q5@)6M8MnPS>tlsg#_-`*6&j%?GT1 zQWcwRD~(GRVdaI17hK9@5#MpP)0D7>7_z%Q)@|Xp^!D{_T)lFg6Lj0U{g(dTbYCb3 zMxIT*dR?Hm~gvcoBi)A#J_^%gAn7B13|i**iPH zO=>@*#X~v3Elt*<2Gu|t88?Sg!$N!Qp*nY`nT4&vdMyx-w+ssCgrh76i}hp?~p%(@+LWO~X&EUgIdEzE!%?=%ir&7}JDNDCPITG28WZxURP>0J!M6HQ)iIIg@J&g@^kX90Z%Z~zF%X-=Pt%Cv9aP6QZ^GMl6=?$k|I}vCSe1Fp zlSNudUuyeuyPD3*F%t2)4J9u08%qtNV~NV?_rpK>!am5f*^p}{Dje~plbaT-(zXEW zVDNR5UA8qZ+M+fnGuFYf1CLJ0Lrqloy7L8Ht#!mg%cqdj#`g7Z<^+rLcW^Kkn{r_I zc@36?9u03{;gfiA33PMcngxsKNsKEt6^zM;70Q{ppt%lDqizd3UD;K}#+A6BnX25h zKFPYMZNChYAcT-PTC-8MGdat}0mb;&_0>0nj3vREry%NUVr@@=zZ z6!TCY8aXN4O=2B|6fj-poS^w8|DY3_^bMMt)L`=1o|Nj$6SA{kIMM-XlI+wLmubFE zYARMsh?SMe!$`{PHB1Z+**M&!{N$tiohfNw$7QaN?fmd^=JQmz%2$%+bH0oDM>>hx zt!!_2F-u1)UkC#st}%1a%- znAK}|Rho#TGt|?jt!>JQX|FxE$d8O~!GI{5!CTfc!+J8?TA1u3SA|vW*o4+^$kpx! z%VBfN)B}5Ov;k_KvxG2{q$gH5r!38@ox5X4J0jDQwZN$?HRJnYIz~yQpd%%m4+v=* zZg%7=#&LAa(TfpROVV-Qi!Xa(UGCo^|1vdiN#EGgvj+(`h?N~jeD8@28xRijA5^P~3)S-@}R7t{Q@LC$b#|}BZ zUMd6~?dL-ZHE!Hh*;X8FNe#zCn0vZ33X)@Vpjq4?P12mppd}4tIlZJa#COr6LL#D$ z77U?a_-M!n8fB*4;V2>7eJ46B_)DAic6yf$iJaZEarMR>>o=`hzjgJ>aCVZ*h%WWQ z0=x+d5^ftT-r$qf8?N*PqqbIeOnPk%5w|_sR13KvNPNar(!qYmj=_n6and`)(51r& zJ51Q|#xiW!IYc!4;=EA*h1vV{1)JSz)iz3sp=0mZp;aVUo>#p34WpqQl|wnO=+;yk z-oc5YTeg`AcPM;!E{3Ejog{mZUCJW^9`GInkpv5hz5Q(9bmJoK9-c)A1{LOQ-BRF-zl% zM|}9vVN5}hFs>6gayrPMtg{oI=W=@agwGM>M!#RqC&65tMrNA_R(6M-2)X0XBQjEF zB(!7KWQge2r4lFAMZ)(w2h{+o`VvJ{I5h|sMmlLDxyGewVMC3pjJj&WsyAJ(-KpLl zdl4t?`DC);8w%>^nL_usIlD#*ymTC9ap(r^+~O2`^D;}-7&PYPJuH*aL0!a{Szv*h%0~*B9h8GoxfaH2Oh#x82^@83ha@}s z^>p-1+I{!7hcrQ=r+_`0pU7yOWV*2;3^Bf+Jspv}YHZsvNAHsyHI&jrz9R)T6hf%{ zY^GrIo=g|~>_A?*{vcV|zabeMea zN-TmKvN%lg$27A0P8zzK*{UN=s9p=1IWvojL3&Gv<6sd-ph1izP&`|26>C9bw1>P% znQMa;ebEmHvRO6}?CA7lxIVO?#DA!R2ja{&Pf=;>*NKu%O}z)V`Pf9ZJ)m>Afzrf{ znpUX)E`X1-4=hMrM&EqE^u_5Z!07tT{GwjibJ6(=T^AhA95kPx9*$l&Mgzc{w4$ku zaUiS7TnLOM8P3xK2gFmO$xG}*Y3O2R!h$W9^v7)igYo1vg4Ls@&QYk3#@G3ILlM#u zZNz1dG|=q(!o%Y3 zMd#6|3zsasaM9wKTQ>K1t%Te}K3%I|l0C`dg$tK-ExfR6(V}G0lAiOIoV)PiB?}4I zwG|Uz-O$h)Zb`CuanHgF&n3x)GdHl=x2qp%p^i6{Dw_8`p1Kot1D=_rjShaHv|k`qAd~u&rb7!~zt6Wv*JWy&9#7W!w7K zbX}B%Q*PngU8_;@YCCjKauNFUnOAqM)k$w&j4M{yxfM#kFyp}OyKBY$w{hS(Og51Y zZLHp~TYaW_6YtbHa63AcWbOXDP~^!{GanZ_%*KfOXt{)&eOf{Mh#aMc^&xjP> zZ1JmV?t5!|}*XVqAJ zvY7NMo5}VP=dXv4mXo<|Sd|RyzpJwUZkF1~XsyiaWdCjZ@7jkK#TY7Q7ytB)Rdw+X zw+)REfp5gCfA-%Exv9q>2kEaZAY3@SI&gc1YeFmu63G0?8X4^HqTdqF()PQ5ruo8T zas0p?OQ*}jK)F^asp6*ywg2V&N?gZ5E7r^`oSIz4{-n|JNV3A~N*AGYCOF*yWYpBB z(?MxSyYFO0@t&J2^t1zaK)XfJt|rF`tzW?o46a?Kt|!Zb^l~Pj6__7(r|}Y?t*imV z&tp67zne4KN6ttN+}txci@i7fjc;H zPw@}jao}c%ELREEn=pYUO(xwjt5cJdMfLp0jyN~y0uO;458Tey2fvDI>@Yq`O_VY9 zgaBD;-hW$B5-j$<#S!hRt)lKx2VnG!Ik1)}juz=qde&pVL>IJa9)H3h_R1t@V=yEu1#+*m{GH$7_I$ zW>cC=I^FqGFVS{Y@iyAGluRCjxI8Q0z!?l8q#Vg#Ow2h2I%8QXVhs zeiIoq5ru+P$410aMDe5cDm7c0;=PQMrg#--B)do`cr;%mloeAs`9Hc#h+$NELUE%} zxRO%tc#}}z-afpDt;a5|-ZerWqpn%}7m?ErO2*4t7v(_pq3DyU=KZ(ffw9XlBu6t< zhOGWt!m|W!ag%AH2ZVuS#Z*e;Yk8>b(Zk(E0}Q*R5xcu6nXnGx88F`=7>RxB|DVf?#4_SdM7p}D zrK(W0ge#0}_kntp3vhP7QmHwzk1PRljEQQ)I0Q*m|d1ErJNL<M!gl-RRsf1&OwcL9Vs#!n@j{0E%wLg2=v3I(V4a(lv;@v>L(1xpPud5w zsZ47mWFu_k#Zz5;%4&wul(}E17>cEfq|%&?`7KE!Fx;^bmj7hpLAy%hgGORV6DgB` z7$xYdVZ>lEJwi1_u36f*G-UW9Mo4_U$RTKJK%7qld@g)`drUo;UXXkU!OFZB@y;sRZr$kkt0qjlfn9xQhF55WiWNA4Zow6{Z(R>=z$xacMRnCDscEP}sF$5sVFB+mob-HT4 z{j8j%5E-pg;#73F(}IuaO0s)yP9?phJc$5l5*U_jWiHsWo3rvXft{;p0^8!z_SUu* zo#xi1Ch;`Z^?WCU_RE+$^tzqa?E?FTo0Q0UI$Nhs#PXZ#z{sPes#N&HNrUJzEX%l< zu4wXZn5%8(Rg+F;lEzqEtIJ@f(x5sUH8e|PEs9y9!+lFh#10(lSSx(fE&$SKfu)0* zeni75>W+|gEJnkP?YFt5F0wUFkI6enZ7vxKK;IUz1n3 z2Llt@2n0z>CNd;0dt#0i34UY@DUg=sFis8NNOe@j{@b{zw-{pe#Q%GeD1Aj8bZ$;)e4Z5106yH2ei`^8Z3 zx7a7kNX5>dLMD3qPT{&TO1|~RzDnc3&C&we0h7=!{K6(q%rsIzR2{D3@QJIHd;iOs zT@eU#Y+})?2!s}X0?qwsQ`#0flU~WW=Ohe%rd$vmnp#QRP}5B^1TQh(x-L**kT#ts ziZ|@^%cL?@W2*FYiI^{GvSOmQ@#Me40WBRX1j{}Dn)|qLTeNBTK-8cK&j7RV+obYJjV33(vq^p#U{~%CChTC zak#P6e6 zOqH@urvq!5u(~3KaNzdVlvJHfEHV=xq{2QJ{kaAp>Q|cyknc@HxiMx3$|d6V)mY;v zbL~v`dAZi;v74w|W25SX(4eb)t(7a`M(s#>A%sWQoWeS7I$sI(oQ=D=j>c>< zsQdHsN*dL)B|%Qf@i6N%O{v7j)Uhrmfy%NYRxuMrCY3Cy?rX3z0aHQFG1B!UP3TUf z=t5{23Ax=V8}2zu!n+|28FIz)g{?PvjN%|sS_5xSRT)8ZJ7UwOkThoj!jqWVz;8&O z>2HIyM6D!@kcpX%OD`^nP`kX+(nF`jqM#EJV_LJxWJ&KA&5B<&%=ThMv$x!RSfTYi zhxu!;JRON;DEVArV{IE2AFe1*6vwTeo0$W0L? zqEpojPC?5R=J}CyY-2`C`?9};=~pfl$p(SxY%+0Ew_<6kM8tGv4EJxpD2o8lbyO;% ziJ;w0ZP7`5Cxvv3VKCljd8F&_ML%v6B&Hu}E~vQg zZad%x!a!c9gK{W_6qb52N7&X-3*ZwdC}WY0Ji~@V!o?ltg|a z4OC7wMr8fy!$W?S!iLDZ{p)ChCp1ZArg7in0^8jZ1sVem4@wmC4i3R!EW-dgUr<}~Wlhrz1))jB&vT3_! zV}S$0tVgin%NUqgkM|g~C+eCiL@I4$)y7WHss^vYWLFV;rsIGfnKYo0vP% z#c{0Bs2Fi@%hCNzD@%!ewvh=tWMFetzEp#zg{4mU_ z>m+o8j1hVSD-f1^vC<<+p#U10_WrP}N5`=-MvWtvP4-}=d7f#V%j%62tLU&g9crSy zD^ud6?1`O&SaXpJwCH9G6UwbADeH?2>70T^f&5A^D~A6(coa|i(4*M!lH_6y?7v%V zQ5~Kc_%!+Rn9SKxv&QiD-Da_WYCVK zL?vcnJ*6futL!v-rZt!*epBWS7JsU2dsYrBsW{~4`Zh($nc@USY;tElP|9}@ZJEZ3 zMP#MpLQ^ z0`6_DmD8ld{b^HCL6kvBC6qcRea1D}QKo8^t`Q^!W08!NGEVkER-2wKV)|%moapB# zI~n;nAc36?Rr`(HYO9@eJYPzfK1IJu&6+;b#=}-ret1P(WH^*AK<*JZ$%b(Uq*j># zOC?HX7kXPRGW`{~Uz$-!z8NKwyIuD5xmFYExE`zBA#{8aFkLi0q~6*hl9QZlKzF8B zv1RR>%1&$(jkRoV{KnUqnGF|hamVMe9R{5fm-#Fz?>E3cP zFPmSbgNn~LZOmiDv%L%r3RQ=kGiTSXk&#-lrUg_}`lTaJJYpXT_GRy| zjMLax3_9v2Wr_%W`sHc{BbSKbtdRq!ewm1zseH1ziM6h3Fq`2-FBX=<`q2MD#O!7_ zbWIp}ptcn`aJH8Q;nXeBzwM*xHEuCyR7mQVN^HTVsZ*|-<||InDss!TC#K#h1$Id> zlKI7NF&w$bdml9s;P&i8K z*QM6mgG~{ezrrimy|))5&MoNLb+i>-V+tN83KrjN6gldN1 zX#^Ue!whMBaGDts@-z#K1I1t@CK^mFz!)AFQKN2z8|z$-cMJWLT)h@(r{Lezya!WO zMw&lZBGYIo^WRIDA0S7#Uch>Ivl5^wY&v!&i#i%xQQK0i1N1s#25WS)-C#U`jvyNK zDJm)2rskW1C@zrLWVF-DA9WZPTsoQV9n5f#=FS(WeE6RTP1;G}Zt9#|5yH$p87=J@ zY_J8~*FCfdo)seOdkCpYii!Qm`X6e zyOE#P+MDT5A0WYdZnmcCxUvWb@SZ;9b$rt=2?v`9jm5T7P3|>igg1uzid52p^>SPg zvH=&|O)^CZ#@(`cwkW!VFSnXPYD(Y5dlkuwZmLHq=h6|xY1)IinU%&U6d6Mrx{ItM zvf~oYpg*E2BRKQVtbV3ak@BD1w%pOrm@ZL$}}@cM0?5SXHUCAIFYRto8J$NeXVWYfCWKWpd1^ zSvwHZZyTF(ks%KbHn2J~88@dJ?JN>|RuMPYa~N#BWFizw6Rnmzj3Z%ek41&ew{K>M zY&|mDOm}VrcAn^@Xfo2CHo>O4@d9Ns($p)VPMEDB?XZV-;|rNi+J%FmUzyIt=jq7B zW+oIW&CKZ}%E3o5J!nqfMox|+(^_fdpJKwABA7`*xTTOajm1~HW@<;5%uCJq-#U&N zazqUuh8s~hvY8UHqlMP)HP4R)M_LZ^Fw1__j-(5SQnqVrnr#Gwxz$EAo6FxSC}RhV z;TRau8SpMC2T_>Cs4F!5`@}b# zauPUiRFUd3NZa#HPb-bEU!Ca}XL5Mk>uSTM%5WaQ-Y<#kWE(RB}E)UH4(a>n^_ z^zNj6ie(R}#|1nsj(JVEBp8%Y^Zh1gw0EXJGkrbG#@L_*L_px;#AwC4(>EG0QfWs| ziER(viF3jD*=z;VhO^O}K#^;W{8%3MXh!)(`>UGh_5KfIt~twQkgW-~PE+phaHeY# z`?`=04%`v8tp@QuUrsB298-LqRPkhqSLtYpXY&i|C~ivIDFODYOrJnpY^a;I50lf0 zG4`gQ%L#KtxN0MaZ(6IA!rcQB~384TiF}wS}POoWQ z%M<^5a@n3-Ia>ufv{L7WUEM>=0vSx3WqIp7v<7!PWaZ;pM&rf@{&o;JyJbB!kL`+VK{$QR6-Y-+0t8!vn^ z5ZRf{f^y@}ls7<{b+W{t?Ec5h>yj0z`C$-qEi=-)VSwUmRa^s^RnDaa4SrEaQcB{z zkoXRj#M-d{=?!}YqV1)|9WH`IX5tdaynVi{n>t^&p-RWtc;uEjIs`*~;FgTb!ta(10$ANeA8>|3&JLjJno-@^8yb-2u^wrS$Lj^LI%3as4qt_`(^(a4+27^W~p5&E@S>c+_ zcuZ<4euYaqZ8TyZJbOJOt5@1w(HUc`$f=XW8z*kELAwwYLv}Z3UXU#( zE4FRewyAex@2d4&-ECYpoOQ_L601h^oh{xr-Ip9Mg7X;dvb6g*X)Izg4OF;N7I~)Q zBAm-c;bJ}A+o}9-C*SC=w69nPzUns4sBDOa7~0;5cWk{@Sro-sBtPHcU(l_co(SW} zz63-2gCxLL?OxC3YU7~U-I~sUL15Q}h;a{LE36dtHl4iOEZ#P`khJX{&pAlh)j&PQ zi`2r1{OK_lY*Nx0Z!Exv+dSh@G!3*lNwQ)8-4nYs5;e@ET}l=b?P$*umm}q zJ3TSm)}@|+4wVkKdake$-FJx>R@ixmnqJdh9RCwX!mf z%H83d4_0T>2Xu?f)7DL<>y9&{R>CMxZI>!LF$C99j2vDyY}6m9xELhD`pmUN{OF4@=lt^xY#K5rtvupOFEJQ zqfnk2i~yupq&m~fM&}xh?Z0i_;e1LKOOfi@Q);Hc{8vS;To|iOSyIlq?W zsEjN%b>W;<^|o*-ebf@!h)O>#=#-AMvGN9o;X2diBQ3pxsWVmrWO(QYYxnB}^u*)? z)h2=$M_)I!Z_+!l+}@gXg-nz|$=Eh{qZv2USQ zRPEO2&z&0*FF5r{?1=QS(h`PSPV*si48fN2^69s}i@B7{-kMFn{WPE1GSo{q3B3oY z1W7Y&edZ9eVCaW{*kHPeposdL(<%@RT*)gl<#fNQbq~}9#){jMg&op^5t{uJjrbKU z2TYN=PZJnM_8neoS+-lUdl(7EH11#SSQe2k#U~DFNz>{han*$#F@ge%@@=zISJLZI zBf*(+% zRVD#Z=RVi(S=}|y8$F#nhCNtx|BCEFqPC&A74p(gs|l4xO6r=~mmO^B!?_NjO-C+P z#B*xdNZ)C$(;*yQA*#!Z#2L+Y8la8dTSc>qf2%bIc%w^AhyC>Hwp{N*k1ro}`cUNL z7=M_FAKz@+Mr=YvnxxONT&N7wWSO|^LD=bOm2;yxL9X6e-Jwp|5+3JiTp+>yt}Oy` zE`ne0daw&$ZQg)}3YkDE=&5ge4f+cm38#TP$^u$=$|SUw8)75>qnC7uC7CP8LlQzz z3B`dpE^QXgRc6xe)jmS2<=hZ#w8B}@E z(U%Ft5M#aXzq?=-V6j;|gz4M{WWLoB*7p)Ro283trj$zHet&E_R*Fid4_;y$Q_i$_ z`oQR|@_`R>o2;mdEuyB6&5X|D^fA3tR-KNe0>3vlgGd;>zVPB>_)W2mBO2qq`ZdkPXlptMPC(YR?g zESBd_HTI(xvNsc@-OTB1FOs%y7p8_0oiN zGi<)75WUSR?5ZH^|0W(%Fb-k$>3bQ|hB`Gg*X3VRJmfE$J%r>;4P>^gP3caRqBK-o zG>HzD8&73)0t3>aNf4OdE2mb5nVBGAJt*8kn~!KpBD!!eL*!T1dojJHB5gyTMtNEJ zTGCvRlnzui=_$lK&|Y{EWfc`N5bINiV(JduC<=u>>Ws*wZ=0f4GPRLkH)}V|A{3eh zfO|;;#H7oE=DcE1_mVwN92mr~61)rEKBMGdofdn-2HjwyJ2idvA?LF6c5`sJAuLTGMS-k@^s|yXZ_& zTh+W9HYCRJH%wwVxTrOm?K!nVs`KjbxinMMXR3z?Gc>!1OFe9gtg?ZgW0P1Xm3+$de0^Yui#TsNM<-Uv7AX6|ULOoL{^3SYNfm6`*QjY1YE9A=&;Cgu~Gre(3U z(i3B}iAx%7Qu&UE@rZ3H@@xZOjA;Sm{-r1o+LywF2~CjA(ZVMnV{3v+`t2qmv{~r% d98)^8pbWGWzkING5I*%R_1JJamvTA${{xUUzaszu literal 0 HcmV?d00001 diff --git a/bfd/po/vi.gmo b/bfd/po/vi.gmo new file mode 100644 index 0000000000000000000000000000000000000000..0c9ed17d8b0e09ef9621e4d739a2cb0dab63c5c8 GIT binary patch literal 118337 zcmcGX2Yg*+{r_(Ok(RwT97Z~5lQ!v~q_i|i(>9PaAxQ_6lHMdY$)(9n$j$9QKyWbx z*#d&fRAh(du~Pt`oFK7ywCHTXV335&U0Se zW4o&o{JOSHBo2Zt2PP69-!753Xr^=%i3b-Y68pi2;34q)a3A<*xCh*!Hjy|I9tfww zdGJs;2#evBa98*+tc1_Nad4;O&E099b)G3G^Jhc(_X!xlyP(|t4wV0ILizu`6B3Di z;ePNaI29fPS3pJKDmWWH3wMV*)Fl!N-~mw2ldu9_182Y=K%7pDsZS&(!WOs?o(*}F zc+%_dx!BZm;NIw82oNugTR9&OOVA&Hli&?-27DGyfZLpe-*6Hns}sv%4g3OBJ^G{P%#*GDp9OR1 z-vj0E_!X9~^-$qj4KwgANR><+bc)5V8_q<115`YJ3>CkB!Fh1}O3D=MhPS~RVJSTR zRN@NP!(-t6unPXkb6P8P81)*@Z+ix-Og{%N;Q2F9?zAKmiC%aaB#4Q3q2j%w&7R*0 zm5#rMc#$Y=H}%Ev9Ms>3Ww5!!()XjV7WH@GTzEjr+&>8_zE8nv@IO%bP~K_n-70t( z>T}@{@Mfs^KLsbkM3=??C^!}6Nl@-z==n69f_jH;<1DxUbvKl`yP^Dh6Hb5!r7fRo z;L)htq2h5Jl>5&?x%VG95tg22>g8}Y>hqz}?{TkRwA$P+gX7R|g^K6LJRgQMVTm^( zMKUqB$JC#MeW+iBDu+wS48{K1NQlW_Dn z*bQl761PEx=l|e%SlVyqmcn|}SHKhCMmQgqoNoCs0OjA6Q0eqMJQ%*8%3KPI;i0ev zmccVEf6)4$rLY9`XQ0Z#v#=b#kIJTa z&Vo~52UNJOgbK&A{`u>$4)uO(tbV1S>|F>I{`=v6@C7J)Z@>fK&TGxw1ULhA3!Dcp z^!zrgMZMEH<5H-4cmq5V{tPPq@4`87{CZ3O6jZuC0F_Svf^xs~4D0_opyGQjRC?SE zE8!oZ(yiz_YBMt%kDS z3J-x-diA|mXG( z@iVvpEP(J2yh*!wX)2 z+Y5buz~j+h29=LDLAm#1SPc*QxN#M%L46B66}|>1!rF_hyl3H&s6PwG!N)?)`w0!U$45%6ztE5B9yr%Fl^V@j4%> z96Sh5g#Utack#6*|7GA_sLz6X!^@%kyA3LQ&q9@lci}E@+^4L+m;qZ*e;CT#PasW8 zVn-q|0iF+6zez@(q>_-B9ZDJs*dqs1r9Dr@%QVPld97 zz1M#gDt-69$;x33RQdTBRK2^Q^WbvS&%o*Mh|gO%m&3)V&xcB{A4BEC4!7C! zGPnooB-|ek!ad<9;O_7yD0}xorN=8!`EtY;Ourk>Kz%J#{GW%)uYW+fS9ZI#2PeSs zs856A;N@@ydbu}v_*aRoP!+~FS2UzKOJlqF$GgLfJg9=9u%KvNNj_~VH?mYt)-`Akh_gy#zPJGznaS~MdS_db? z&qI~F7hnba6O_A?9x_d~rFs(xJxtKoOxv2c&CT6@y~mG76sS@3bFeEPTNw69rv zmWI>N{{oy2e+gBu_xQS*KM|IrJ`WxXABHmj4ph7+J!-;z_tKd;{(Q-}jiQ_k)V}RH*!{h03=KbnZZf^E&_hJ5cVu z1rLP>eAC8F6>xvlr@;Aejprj!`I6XR?oNeLS3$*V0PY6A4CUSisB-XYcs%?+cr>he z+}uA4DqdGZ#pj#wK=?DLa`!jSot`lF4u>*V1(n|?L&g6bco4k8^Gi_Xo`drD70;

0m zzXVlo{|x8A;2BHrQ=#-f3T5v;sCMW#Fb((kwx#=-umkmDZ~+|mEOTkF7goa;pvuvH z&sjTiG@OTe1yp&y9xA*)gvyVdzhn7U;&~iYy*m-A+;&2hkDFmB{1H_Cz3+KT&x4@C zGaV|uuZ6|%ey{!oRQ~+~s-EoqUF$E8hYH64TnTT7DyKVq&&u0jump8AoCHtz{4^Yc z`f1M}z_F-*3CF|V!NcKh-?#EU4a)uHQ0aX?oB-d3C&Pn(U|a{4zdwMLaQ_#q|6T!? zp}yJkpKvAe}rXlx1U-$s)Bor zKeK+L7Ruf-DE-r*%EwLcNcc^tbp0(<`i%X#^*eP??wtk|udCs%@ELdj{F&!pVHN7# zeqrUf86JiD8dwK6z(CJ`NnL_va4Nh5syzJy%KdF#wD`|}iqA)(+_?n?@OgMJ{1e<8 z?(!?^FOP)#qb`F1JOSk8vTfW!B?NRqZrQ;f?dU8EfzCI3>&cBDs#{+)DTo_yk_k|5`XV~S{IVk%V zL#5|epwj1gsQA9>)qnTg^%W~myflt7h@UKwupZt4d zts-PScnIok{$S~J7*zT$fQoMtPJ-*8+`9#;JiH9&!JS^WdQcCSpk4_TzkA_9a3eed z{s$fo4}ZhbqXr&{dO4JPXL)`eDxJOum42^4*?$Kr{||iA%F7a1hx$`+F8nPF;J80p zI2J;g|1?y*f9%z}{K>{&i(o1GSHgO@0WN^M|JkP>l=?iVczg#I!#}_#nfr^WJD~FW zLbxNm+4F9=8|p`(%FnZ~9KH%m;Qnt}JzNL_)GMLfIU8;duZ9Q0&v^C2FhKp7*MAu* zfBxgS_uHnP>{;!3GTa?=r^7Mu!*FMKvFCMgEb1?K-skx!l>g6o^{cP~^`Bt?C;!#b zwH~Tmd<4p!Z^Av{b8tM|2&cg@f3tL*1Et>sC%`LV0KW$JhA+aM;M-8{6uo2Wy`jqG z;ZXj}fjhuOa2z}ls$Q&vd%*jk^6M$jH=xpC&%c}bVz>+HI;iws0p)%hRDPWW)y`cF z6^;ksUhvyq{Sw><_1jS9cl?LRRmJdgsQciVaG(FfEqDb~J=^`CCg)6rm8d@jkAc5{ zDi{0w%gV`ocogcjQ04z7cp`ifE`$61+w}Y4RMc0(RqzQIz;XYv^}B_z8ubRa0KWfS z^LH^k8ug`c4*V889d4f}a_#;)xC-@CunkTqDsuA{ABT^i{xMW|uh^!@h3_$V3hGzj z*|2KcA~zrV7_3FT_jW~Yexnsupned}gKxoRIQ@M^uKhS4lB9_j;e7bx?JXP!y}!uG zH)p})(f>JYfa7*3N}L1Nz%$@GUOh0z)NjFWqn{aT;j7rODDfETtKl{9q@9Wq-S97P zIb5-GQKB8*2R{b)+odSc3O@_)hVR0;@a|oUoV@xb>_WYKx1vN6egi%P58vI=>lbh~ z>Ir)kxpeM;YIkme(*GWu1$W-FC~+EG0HwYME`qN?rPs8*EdCkKXQ7@SwRe%r*DPF( z`eC>fj@zfmm8-L$>fZzK2>1th65MrPOUE=+xwsEj!GA)Phq?O|Il1^usCM=tsPeb{ z{zb05Er&IzFM!kG^HAk-y8|pAPk}kqUxsJG2?rLr`LbK#mr?I=P?2j#pMbKz-@!$0 zUa}slyxas+@O5}HY&yikc^5nm_1jSOXZoQAH zODxrr!SLeYp z_%xLJ|Ah7Mm>E{?&x2~Wo`WaA!)6vGE{47E1Mr_v`LXtBGxt0ALDa|2vU2xTsCH!6 zW2{|T4An2*0bPDWwG(qH%zh92BR=@6rs<#u5Epl>B4^%z48LIyM-7_<% z$nE3!4ZL3V=N2W-hi}7=z_X6C^xtNlh3gckcHugB1$-G^0@qX)B|ZhWuPSou-#0>) zpWUmiT%QP)ZZ|-s@AskHdEb1iA9Yaae=bx!ehN>8GiuD8E1~+47ogggvIS;ut>>Mv z1O1Iq_7^O)cI+mo^81G8(Tgl!&V@4n98`TMueEl!2hK!&8&tXb6`Ti;Io{%R26XK& zRR22d1gmEq@JQ6RLA8s|LDl;M>WZA4+yGTxJ^)o89)c=2W9rS{Wu8|+#qW7IAMU-_ z^8I9}_Th2Z3-@d=bLT?E_bK>cctoSQ`+2DJ{VSAz$DU~ZUj$XYo`LF5#xz+us)8!7 zpM=N4m%aMXW^1=sL;3p{RC-QnDRT1FdZ_%o0jj?I04jYBTw?8W2kb`uC{($hu+-YI zYhem?VwtrEo$yeZgNTNSUqRK=A1=4{VBAUO&r+!PTmTi`pF*W~@yXV|4M2tCX;=Yw zUt#gCgQ}MoLZ#D-Q0dTiN|BS_ZiEM;z8^~7d;!Xx*Pzn9e5K|0xo{WMUxtd$WAGz- zeyWwz2jIP^-|^}@TCM*70V-eDud?)f6e@gsCyNqmU?UuWPkC0fS-RZ?mB0J6TlpV= zDmTwVm9K+4EFGHQ64al8P4I1~`m!)(?dUB~<^27f7Vb)@^6_P;cK;tx?ZUV&E9cik zmA{?3jVD6+`$@P8{syW%*QBlde;7(mc?v3A<)@jwE~xO|2@iogthVruhic!mP~rFy zR5~8qWA5ApmH#{Un%s3NRR8=<*a@d+EZwey%7;Dr%-)Bg`k6Q3#c)Nx`SW{tBI>%+ z&7IFc#c#I(D_={X+RKl^BjLB8(&Y^pzyq=t{@GCN=*dv--3=ALqCwMN36;)YhDwLm zp~}%=IV(SDI0^NqpxT)yq1wrR!!zKVHCEmpgz6{Xzt-x}DyZ`N2%HCZU1$AKBUJgh z94cI6)?2!r3RTYUhIhbeXIOpv72F1O%?FCycxVwULA?U1TwefHj;`_QH{l+r{|)zq zyPat~5{^SX3#uNq!kyq}pyGdr=POX{%%Nvld0!4?{t7r1ejm2NZO^uTt{tjgd>mH8 zC!xYM_Jd}Ae|QAyqIDj`=H#v3I^~SQ0?zVsBldBSdkm|9tTxkkB5iBwNUO| z3uS);+zY-54}{yEXXXxt`=PFcYEMswO83vf!6+3@2~ z?Z#73@A=g*-0nQ*B+?}l}#Z};kVpq?Ld znT2~jl=^X~aBp{cQQ{MDF6@HO!2r&9f<7*1zr#RUeOmN5cWA z^tv4?f1ZLWCoe+P@3&w854g(8$!s_UbqiFuKLTa$dtUu_sC=#Yr1cMdQ1$FC*a?5` zS#`C==L=Bf@7GZI`7fw)SbdF!;}WR)ehZYjZ@~_@5vm?7xYpY1>tQA8$DrcB?WfG% zbf|u3IaEDZ3l*N5;57JM&+V?W@;wVGekrKuSHT0|(=ZEv1N-3e>y6)nIn=X0ZRPEY zQ2oMNa51d;jJ0o9LY2d}p`IW2S(9TfgHmsV?Qq%+mXB9M$-_T_jj;4aE8ic4Do6K2 z<==KUnZL(E^(W^-mA41sC*eQgDe&@}ixQW?KSJfhxwjN0u7$sYO3x47YVQ3OD&B{F z&g9N!sB-@`sCH+M&)f4;pwi`1&pV*%=aW$R_Y0`{FyS^U2VL+;)VIPz;WO|a_!MegYUHV=@idv;TZIP zYp{sgLDJMJE<&u2iXABIZTze1(kabLE2^>HZmPoU(iBk#3*ZG)3g-wKa~--F8E zUGB4VSq;ab-T+meUW4=C;;)#Ta0yiT-~N7!*K{};^*XpSycH@P?)7{XmZ9GN0qf6B zfb#FNQ0>IOpxVpbA2d1VXsCStAe6mZpz`xaP~mysLsl=-Q1$&{sPugSs{HKtu-Pkx zvbPE(@>ueRZiZ5swb1a zZuyXb>Q}x1)qcGK6`oxmwQ^nz6|Z?v?NAEt3(xk?KMB=--s7Kt3+|74qksNSsPeSW zH_X3J!&cNkfohLuJ!a`}I+XigfvP9p@qE*Bmv5SWspn$&LCj^K+O0QX8$4u#wXf$w zrNbjo?ZfY(;u$<{+YF{ zPxuH_xSxl2!u_7M`Pe6*+S}YS)*pNWsvZ3^RQRgCZRI=(Pegqsl=)Yo;#2mlx%&~Q z`uQAO4)=Y|`qh4@`guQ8d$Y}ViV{Uoc@h5h--h;p>-}Ei1n%{lu`Tnh{(e_@D|!c_ zH=gT2)DLl;fgVkU`>CA{e?Rv2&V`qAsSj2=@>%Y0!@Sb)F|L=qIc`Zr#&V}#N*9&9y!EALRNK_Y=52#l3!Y-0#SJJNG~3dLL^2XntLLYbxp;>f2DXdW}|Z zU&^PsXl4=*z$sq;FWf7?!`~y^+{3ldyD$BnG5av2DNS79?R^X`(L;X6aDM=4w3D~< zGAu{`Vz@8Y817qmei8Qp_vb;n6DJp(h<^C{JvTKxTMWMi^-~|c7&D*4e4Ep;f0aDH zmg@^Bt9brXZ(dI?;d%@8P4H&yP32mOnK@jl8~UA%-mdUMu7hHB|A4xSXTRV&jC-{` zS?(us>315}eOz=CPEIfL`akfThaVsC?tKX!hWc&HU&r+W)E~y2+R2Z2^V~*1)z>1- z>qocde*2@IjJ-Fx=u)HK-~D|Z9K*9KxnAX3!KGgk{XTD|8aFEZ{r5a&=1TqJcScN4 z>H|<;;N7`_`{TJk9yjK5&GlxRJl}-B;Q6m)k>874&v?57@IkImqc`Bqm%{CEN53y} zeS_!6p+=lZoB&UP$8%l4vsZZbLoPKO&jbDT!px1*W?H_WW#qH9R3!roWVdt7$Bxf$q71_*ykFmo)=|BlAnP`~Bq z?TWd3QCD*RKJ;GW{wG}j=2Bm;-xQvG9(61H2I`lw^Bn3WT)&n9ejnsszu&?=c>V_W z^Pzqv=&j=ZEN>>m{bgJ~vd3;N{0Q9s32K_^#4o&lCp>_wk85}I^=rqC)49Kwd$s9^ zLW%ElC9$vHBKTeS56r#Jbu!PUpx)Czml^$5qF%-`{r-lzJ-GU~^qcJUb$>nAsa!Am zXLPl0tfpt5M6ZJDU+DcFKI!e971~GdaPRK{+;^a_{$;s;Udw$s&-dopQRwZ*C3)z2 zcshFV-({#Jqy3p@C;11L!X#Id_hWnRFXs7~T<>@@{oMZ!yRX69(QA#l`*7_3G43S; z1el{+OdNunOQ3$Afb;yl)X!sfd!E0_{cc?9!?#24Kky8A7QBV)VD9xh*oW_z-i_1I z>*e}Ct}kQe+c5kcj(QQ-XSm*ny>7Sz*N?q{58#Fy1Eanq7N(D3<~-D2<*MiU6Y6&F zudMEl`g*SOy`6Ee3H36}{FwWLz5Y&^?csU>_2cj;o<9Xo!|V^Bera!ZDSG>&z66$X z>GwIVdhUP5B^h78D(*k(pTCLvd)$B1tN)7nW`8fUzr$_Bp2V-cAJRLBFzkSOgB1J@ zMZEz#`*0O=zdP3(+@HyHlo?6<6TZatH?E&^1(?zA2Fz5$Q&Im0H`j2j_I}-n{-a#; zF;kA-xm=HMzaM75h5j_|7eM_QdG;f&&v5^Y(;<%VNX*`WxniC@i~4H+>;%;D-*U{% zL*q%f3wFZaE8$IyhhujT^&;=aMeuH}L%o@Q;>M@AKMXyF0Pgo$&lJz}8|(Q3)EMN$ za01*9-sH`Gjr*Mm%OUW7uFv!Qa;}|tem-2r^>Os|JDcl#?iXUd&WC>mde>sMo9hs+ z?YPEc<`kaa!F><+M{ym2xx?Ud=pD)R9n|k~E#z8@TECgtnS>eru7J(xzYEu)K9KvJ zVJ+MXZsgj9`^&k)-yrvMeYo1a{wdi14c9&xIti|V>$(2Tb*wkjh5l-;64WPQe>OtL0w5&!N7OXaC~z(=t>PNZ4Ul%uLa@`uUt7nT*Z^QLzu47Pt*FP`jzR2632$!NB;JVf8eU*Ftb|b7O z$NX7|-tXKK$_;KE%>8w68=sa_;nCjwf8e%W|1Hdo$J|f3zQp~XxyEtnSAm(d-6odu z{28wAq5c>4@8eqG-FOFm{k{R8=DLb!_j|oNx!3P`uhxAv_p{L7k*f_iwnhCj|9l$i zKX6|I{{qKhW-Rw#=l)3U_kmY%)#J`BsE_8^1g`M+A@r_5aUo`&gAJ&sbN_zKbaKt+ zx*Po)(c7O(zYlY*;kt_JmzX~Y{nNPiM*S(&)m)3XFN1rc|8egB1b@hNHG1K%7d6gD zzgeiKaXpC6|6y(-_wR>Oy@@fXZ{U6o)bIb`IXvGv=H}7%C@}_y8@Won2Zv&IO3d7W zm@DCGMz53W9PZb`a&P8h)ZgTq#}Z}n zz;!2j=f?EsbALAOz0R{2xWAd}F8@4({`OoS=UEoLMy_K}kA){f{f@!EZMkpu{vOBu z4(MOzp3>H0_eHKFxW3P`y|_Ng{g-+EIQ%2(7Vf*b8n{-Xp24Nx8$8$VG58kOSG@i~ z=sm%;4E1s7FTn5bazB^r>*(j;HSlmQ{mwHap78Gd9RAGfeF3vOV84OuRPK|q%cb9H zL*itfU5MU8sQ(I&MZFJKBlj&_A3}e*H+vK6k8!^q>i06&I_?*GzyIv@-9!G}jr#LE z`vCVp*STIo@7J&j-ow?vrQam{J=ty(zl3|EuICDW`*V|$Voc4t{=R|1pt7T5 zAeGGqEy=c?R4``Ds1J&#&gxk=HZf*#vNshp_N6m}sezcShJlWBCfO6|;LwV=(J9`* zN;5GgbgsRxBURFt%%%dT6AbpX2NQbwk{t@qlw|v0F4;5Do=pku45WH6RXn{T=kHZgY0{JOe8 zniW_=J+`qXSdbt<_hqud1Q*%z!op(Bw z$@R_-hJ+*UPIho0*FLxj1Gx+_8}WH{cXEI{Ne!g4gX#8cFm+uqWn%37^_gUEx;<#N zM5#clW?ia1sLZWP_oR~p>w`t9WJhYi>5owCN=kyT{J6v~?&-kjf?USZxFeNqA4vBP z_6-CsQ^XQ)8RdosjjG>Nkbljb?Tbo8aN&XZ0Q zROUVk53cyKu?Zjl>)@v?9k(F(ag*=K+oh?2tXia|R40j&X-{QU3PatFR40k<+B2t} z9#G2~Hvg(RH19#R^32LCbugIV(s^RAIHwkr)|RYYm+Q|4RzX+zN;@Uq(EA1+ulxJk z+xp1aZddp5m1eLwO9raB)oq3HagFX())m};AtyoK||~|G?4A<$qlB0{=Td$QgWlC#KqFx`tHE`z-*ACKh63KOlLY$>tu+MMBCf% zZk2r5pg)-k~eHQ3wnM#B6ejY;|x|14pgNJDQa5imu^opZNxBiq+GxHd_ZSkP!nMcBuMZVC%d z+X*|_pj&k$8MFpOlKj;pU;2XD=1Nm$U78JZVoll9Aere1)>vsXwD;$-xwb(kI(gwQ zKu;Pp0b!#xp;*!vO;b5j{xI<8~pi=;t+YA=BR5QD6`~nuOHA8sco` zkS<*F*w-nud8-mR$BY?MMUl;fjj9|+2#YI&U`b{zi67KvI*~yGvu3uuY1s;D7CFRj zkS}`ry5t#1Y5VX4X)ZJA%}}0J4~x_PL4TN(yW? zXrm?ueFKQ6(K7c*L+{x0Yl=t)ygO4|m~ zl!9PFac*MJk?y3|&RVaRWFWOZizuZ>WAVc5snKyFl4~ME;n-C|3{_z|J5fEQ3C*q@ zqq9{XzHVZW?jjkg|=zNO5{Sx*1A9{DP52s`qq+vh;~lW zVL0hL@QELg*A&TAiu#=$%(Vqw1AV!ESCbV9YnuaxO%ij8dva9!P>90$OlqCv15&7Y zQA=y{N%bw2Rjtj77SCTEijX)mp}3ONPy2G#KhW2o8W>z}ZKOS(WYQFk2Kg*G$|XN( zmysN_PO@`BzoKkT%KMTm!!9D%lg_Lj?v#y3lU>S%!C+N!c6@~|=Ecfx!WH+p(6okA z;gE6^v#u}%q4Ui()vfh4O$%!ZV;=W`-oC?fyrr%=Oj?&4LxPews5oxQa6_hNeNZ`n zKGig6UQ$KE*cg^Jkl_I3ILv;P=gPVzK6`z)CR0Nq*MMM#xUx1_+nw&wXuH2BJvgXt z+U1eU7%L)qH>^a(dvTP+ARm1WTG1a8n5NdsruzTh z85+X2P~=g&78XU4$_=(8c$E(EI++{nLuREX?9KHIru(U@Ee+K}%V91n2iEuHXgL{f ztE0`%Cc3KOnlN$IyQH@liK#c)Q=%yx@*&sHfEYoitG#`QukA^Ve`$QxNx9m9@nI#z zn;J+Z+q*aWbn>v^bcO@&l6(VPP#N+=Pn!aWmnv5PmbcU_Zmw*tY_4x@uB~sZt6gwX zERSbP`pvrLt)Sgx@Q@`*+q;KGIvVK?_ik(53bQs=4_t^%Cg3rK_5a?Z~6>#hmJ!r&rcP&CM6i9f^5F@ zmvm*YXgxGgQoBZqCa+52;P|u-g^|iO>2Hdm=Ww)v#pvjHGkCfQk_P=n{ITSgI7yk=KlLNhxlgz38Z$j!Eik!uZ z|3yfLIZEo&HfGbv*2-zb7gav%E=qjmE@7BzrN`%)g(Q+F3QFge6z$2OXoApJK?q_+ z4C^W!HWYBuRYAWzJ7D~nR;gZ3(RJ+uEo84mwGsN4#@cFvx@q6C-BGL0{H80*BY8Wt zEA1TFZN|t`Og@ezYZEBcHuUC@V-!0tks~_dN-Xw60~;_)-dNY-+LppJ3WdGGCZiyx zp=AaY!NP|3>PVrt5?V-h=72Rr1I}pD;N}Ljo`nEg{wSF0V&bj zk&WmfHWOrTqp;^MW(mcQ7>0}i3bVN|2{-4|rV30!JuY-M49RHLS1~4^tTGTYFuZ2} zcXh2II4sNDa#z3Am?(9;mx{S$j8gKDd6=AAG$i5aO#JYwA~-F_M1(@A0Vd;1#uLcK zVS!N9JT2K{b{K`aDKnD*Xc8ENQfQ(A-x0K}59T*FjA%NW8Lwq4S4X^o{J=BA7?-LO z&VD=DOVV22MD!>ZOwhVhamPgG%6N%C$#&KaG=OunB2-8!I5NGPGZ^fqyfF$b95Yq~ zrCmggdAe|lHymisoPL6dVv!f6ef^AvtPxHU+pZi{m;u}X{XNo~o@&ZAosw{g!%P`y z7Pi$)gk$;80YBs?^}>{LgSU#HlSwa@UYi)Bw>CB}sg!qDY=wfM;|zXcR6GwCTU3e!cNWwYLn*MhzX4jOQBt?g{xh2 z-h>@&EckI}BH76$(~{unT?yc1fv_p9<-VA_QDQ4KOe z%M6bAG(UEu7EowHS-HAl$>J7^@K)J#nKhyfUr#A7F_GMtL}y`M7p1f(mdH`l(NVAr zLbjTDC#!0!M3`?(S&eM6p9X#_TxPCcm23FSn_KLpeo2hZrh05xkz&N}s)P%b?1lr^ z3OCUtNlju!Uq>z+;zu)hk-kN#a-h9CJ&3b8w{~X3-yxHJ=8lM5jTE3o49!+lupL8^fLr+2@}^`ZCWvjhG}S@drVg+osIIK5E1O{^qa|Wj z*Te3mptsN4nYopAl4^ckv2(+GrBhu)S>#G=9xfcVg$vedb;3qWeVT>Axkm(PirWU< zByK3~Oyx%3qxtp*po`KK!j~Z@`xPm3PCN3Z(tzTPsidmP^8(;q2%-Pwv;uM1;4UvlXlM50(MRiCYms&ILKJ7 z7f0(=z6MHk3ftw1*xGi!kYz1_XO$>5%4U|ZsOB5BU~X96w!)RstUC|$nXKfES~B9A zUx~A7!yHsYQ%g|U%#^(*OSFjKCkBxD+f&IN)=0M z(v3|v4AQtob6D&!QahEmqoz7=Re|}}nz{wSgqnIaXC{tmF3&_Ql>@h`qKK-H5LcxS zF{Lj--n7+${IW_#Aj^Y@1-3jN?xj$*Ae>=)xXKB9elv~25@wd#CWI)}Bo}0M+4xzM z&;*9nnKZVv&Od2!Wj*7}Q26u0nVyzL-I`U`$Sp6aXuV2eAGt@UV&%+rV$OrL1AR2F zp|8vv`LyZlBhxY@uDPs*Saz$-ofD-4rok)m`H6DeR45d5|yWLD-YFWc2K;|KXtn>6l^wLvEJ|YX!x}-+5n_p zc1kfDZb`nxHf_XH#g)!t_D87{h0nvJv8u^>Q7Pk&(qu=Uwo{RTBn(T|WpTksgYofLFl?!WHo2wVIkX7HhxS^%B5smrr3gD9>a>(ZOs_K?w zC|Y^)0ypxqCgt)o*BVDzml@fYjO=QgCWPs?T%T5)3y_q0v`p^`VVW&4)}a-~!dH4V zt1Kv~nWAom!hSeiuB33|&M>O-&bhO^zPh!gdTQZ-Gn-GuY6Uq-1ah`;RhC({E{7>f5GM0DD= zu+Hvu-dzhQ@`dCUzhF3|^>ksDTV^&IM6d+sH`N6+R!(-C=!&sl#xQAalaARiHq2(X zA1=yk`4~PSQ?)Mxx6<9Ib*&n@xB6#M=={>4+d|+AWlt{u)TSu3S7@CYSogq}Mw@!F zBBvqy`oPzjcG^?wDBgDUBfB>>FKmn+MQITaXNGF`U3rH=G#Jrq+BJ+nAA&94Ig_vhR663LUU{6E~4; z3->f&Zu-m*ghKh)>z4HT{!e{Rp-awI!E=`YUIG}|&Cqx6Qn<&~jauj+*g_SR6LvQ9sqea#KIc__k^Pzi|?sS6SnGRhH^1r~9Woye=oBckc@a?>toniUbtFXdXflqf@q=?j=I>`Ivs z=v`qiZCM%folJbPLpf$Q?o}+E5j9mzlldJFc;*{7?__=|E@sb*UmC8l6>*(!*^B$F zU+8)-ndSD5J-1+`74I#Ai;AG@N&#L9g$2-B=gmtva0o zqf2@i^ffnDHZdLxn=a?}qRP6wj@#I-HZ}A?n;c45_;e!%Klh5|&wF)@=X4kVggHnc)JVz)#C)HkEDQ6o8UmR)7WuC%WFzc2~Q6 z^r;mZ+?>1Kct>AOI~OOEbUIf{Og+qTpE>q)b51X+ZZ0dgEcD?kh|!|zGFyiT^QBPy zh$UEF=&)og@K~v-%ycD-8kdZ==~MrrZQrrkr2^X&p#BnESiGdJu0(rc{XR$ww%nEp zx1&9lzi|oPH8#l(9MSBDuSCU_=F1R+1?voKdj|CqSK7h@dvL=(gm>tG^FU4^POwi%yJpvFUGr46%xCuhDmk|zJGMBqek>a9tl2~k=Zjd> zI3TE~c;qJ&T%`|7wN2m@=AyT;p84}Fwbj%*ZPv_ImI@jcEQp#TDoZ#+9!}qEZH5kw z&xro~SD856hvmd%=5!w!2IOH~{r?ah+G^&YwFQjLfKeAzxM{+*!8EF|{j5X7?55em zRZR(>+Uj4}A-NoO6Y=2#O@2o&j{4aNZK-0G!^XRzK?csezT@YAw4T(XjY-i0j5jvK z4l~sSlP=*pl!g_d6zZF|&>uG&Pf=&^Oi3>oT!oYFe)y8@Zk6c3tMI(OOmquep!7=W zXAfk%O_qeF8U7R)bg#>~T>u^FY&$RG(Ek<~z{0BHD(j**@5lgex9R<<(Vd7b@MQy+ zorHbl#h2Lps03WUf{hTQw<#Ec4C#D*BkEIJ)jgAA zu!a*C8*J`8Tp6@eBx17&3cHOmRuuE*ueof?g0T?A+m+C%;g1XawNAzxo)UX+BHmaO zy6acxw5}F&JiquIZ?1hv^FmL|hPj&Fypb@BBe}wM{JO?Pm90&!3mcni>K4^5T(k)X zhnTKwSZ0Q^scg_%LK8}N5S1wQ6R2@rJ3!$>@^{0gP;?k(Ht$Y;-Za(fHn2ozA#`dh ziWdDCUqqdKIH~W4b9r~%uyG4RG(7Ciop8Tqh8m+pK$4sszw6o)i$Qq3!2Um z?8V(4GHV_Np)j0zFE?RT(&vyQ+02CRP}6?u*EfxRg46av#iBYS^TP?_k!-noJH&j< zC3{(w_JC!?*!GVo#Uxy+66w7HH~EvF6pFM86DqX9fd%f>r=ivg^$YDrI~A?RVg}i* zGUzRzB)hBW_9%c(rsF_`Y*t%zl+k`=+-=kGdlHAZ>!oBj`tuuR=#8dv~gRb(WP6+Vy5;TwIr+gmD=uQ%mx%aj`IJM<+$S>&RAO+f0XB zsij-$;fx{P2*Vo}(p*KLW#4#M3QYwQqCUGgH<>h2()oGvVsBf$H*+zjuO3;{35r!Bz!g>#P=t^;(*Uiy1?syr8(Tg7KHC$9gx=N_Dil zIX7l~YRGc;JQOiTpEh#6j~isA1_I8YVcR#2Ek$S*gDSU|O(k>0NsaiPz!7IjYTV>E z)m+0s=MhuEDvpiC3o3#VH!HZ#nJLjLi0fVb3B4NZWB)jZk~rhb^?IMppt<(IniFlb zQdCI@lU|~tHAEyZGszye{KK{;ZEp+LncT#*6+_!Hr-AuoEo@3w(n^XpIpIaLXk_mb z&L*@$X{x)mlb2{xt=%1}>~_2W;}c@x--ppgJ8XB-U9uA0$GLPIH6=f^f6VpS8q1I9 zQXB6Z@OCIMM*Q>cM9rVm*7IaAzooUMW_b&;id-HtohWyMuLkp5>^eKhnDv~Y#-V|oTnFGB~PL2(*9LV!OZ`5`LPi%k=1jI!+4|}QoIkRSq4{?G;vci0)_3H8=&A?jgB>` z$S-NKvxbqh> z*1Xs|HZ84XGhM9IWV-cUO*OImRHtUNulE&My)#R>3~0F_}gBpq$XGC_A|4v|$X91yX(23{7(Z=%+oTz>%AkvjFvixpbN zMrgr5d&s$cb~NLVaLT;wF>!?3Tf7?@vy1y!FVP-U_CNVuENV;q9JJm68%$B_*#c`3 z9LaoG-<%{L76&bh#fkvgTrl$)ZU4q~4Nx{?+{J4%W=3){Y8b5bjhq>xKa$l=1b%Cr z8RC;!ZSXI}`i=K=`Oym6Dz#^Rbf|+cqGpF3)%i`A(QF*ay2anGqaj?o8aG_g#%9gBQI*}{c+RNp-J~~M--noo zP^SiT2GMq{Y zD~vD6Y9Xz0c3!?G7bf_*4ffY7(Vati@x;%X#>R+bquMrYhK|qeDprgMx6pcDl3jzF zF{?JsSJ+i5JX_$a@;a*SYHe+MwOlflKZS@5ZFE1b4Y2C(m%FUTqB-X+Q`ap9`2>;M zPWJ2U&=!E$v^F85oU69mqx{PyVGJX?c|*hOk8C&Gb;%^R-#y_ix|60{Z)5u;%&VAj zzkOnuadW27xT}{GB{}N*DyJ3By+nH{yuq!r?cR}N&etW8(k@@HeHn<}+lpU zst?twwB7Ahv$J>HyQ@@`{8UEXxIg-CMDzI#`PMtxo+r15!o|nEE^DV$QcyVQ$4+2$ z{i%y-IPmak=`2ZJ_PeWnTjY#ND(1~fci@>Cke*~4qsmCQp{THmU?xqj*qRM-?2WVH z8cjra={L4jne?GJ#&(A3yfClMw;rL?taAk!;QBQC;}ZsYNZl96+LLGZ(_BS>ES8i)1f+ofDJ=df(dJ z5+OAka^>_Ki^`jIU_JJyPIeCHHfEnW(}6JK{268=1mFzkKVIsl+#J$vp+lT(sLo}0 zsznjm0(TI;w#=ECdP&cPXZmOX8a-xyHdp6;bl`~3Qyih_9}Xv(cB47F!e_q zMY4BrWcduYQm25~h+{M-csJA)RCPm29i3{Yq*6VyBS#o_Pj#Xm!J5`1`fE1gjK~ILlU5Hh@=VWixSyEs$6mvAj)Bv{(ofa?j>X4xASUbqO8E!HnaJ3v%ZqURRK zAwpmDG~cUk+V)5SpSSC#d`!r(BclCC+10Y}OkNks;UaQ0M5iFwT8+JjGu_^tHd}UH zp4)A%w-1@4Vs*LIXz&hOFJ`~2hB zvR%BtvLz~{cwRQ7<&D>qSce0d04SoJ=;4&7BY zb!ATASQWKKh*HeXxKmAOt%CQqil(R(x)UbQdv-5eO>+{E@3@Cl03W@W374qRJRmY? zEK$QzPeFG0f*BXOMzM~lplpj?(H+H#n+(~q)+O>tZ>UQ`rMad$Q~Fd@&b}T0|m=o+sn-ZJoabszDr0vz}HcC3( zAc~t__oikE`$9C==SLcTf?ZoF)d80Da^hcPZX%9{&4ZsXTEhVeYP>l8HFSJr*Cr-7 z_4g=W)Q?Ko`8uH#O~cR5W5h?MsP%f8dqc6bzXuV+j3f$nuul$9^L|{G_wiJ0SrILK z@5mjDXF+1VKibA&sh=p=-;P_%F-|L2hsvHRJ|e>EYS!zqZD+V9huX$9M_jY0P8=J( z=Bx80+)KJH#7t4nO&sgfVQyj`k!04vDqqxnSl;>IR)*uEaAKpzANtGr9D0GUNiQcR zMm04nZphyA5BFHR;!5~)?%<%Fbek#@zUbZYggXF*Wc9tOlLeUxuuWNHw&olvISQ6# zby;I5Lo+lO)J-dInxb<{mP=PR;j(MYFca~Qx`-slUg!>#%xYsXwo~W*C3Yr+9>R9kaNT8{KM77%hS+7$w$;V{S?54kt z=g6(Z{ALbiZmn*us#)0D+*04tTHi3g#tGeVIVdz$vv~d%m}2i%O-pNC?cyc%t+k7* zn?`l+JsE3Vwn_IIt2gtwwQh3;Htm5@iI@#{B-NJd3iA0dpY~$?@a&nN(g@b=pQN~G zVLwG_8A-RWM1@6UzW<(&N@vV7TK>*(B}1hs+1AEsCVmu6d!8#z%#WL~BH`X?B^bW- z8)_z+wQ=SOoE+|AtsnW)Jm*gbSxO=@1~;O~00mET z5zg3<5ZXd$*j_nfqSltaU8j~ODFBb2R%Luf(hD?5Sz>7M52O>+l1XACiB}zb!f63 zIiw~k%Iq5V?zx|fc1QjPOh+J5mFjagZeC_=!mW1mgQ&-8Na=k)$BU z1eRJm*r(EORB3S?Ym{3F|2WbJR%lPFn=i1PyDJm5;q+s{I;W($Ue<3_fY=$zTBSQ* zF{d-J{3%-lDOWUH-KMQA#U+{+g56Tdq53W5O06(9Zn$QriG-%wIuW|vxID7xW@OaS zC+fm4aYVT?LS3k1Qy=ec$3FBBYl7?9iBQrI9;-DrQJ*}mZ(vG&n&SlcG~k%xjwuog z@=KiISxEI9YS`=E0M{qaqFwEjKx!fj-h6>i-F|9aH|IICvm&urI|*=cOoBB{o(6~M z#)%`kaVPV5$E_vFO521y-Eu|^-wieY6vqk?-3%N;Kbqyoh;>;e(3)VSrXjJ zc}ycRl4}ZUt4gX?%5>6#udixG{mFhwKeCSXmDb9iVYQ49oZ#gz=7&KA>xd&kv6-&7}h{0@x$cl+(9csarte8Lj_^gjgg)fj) zH8)WZkf9RI?)$6JCn((PpG{1>LF5VtDk#m8ASBKPowr8Qu6s$#`kJR!zninzDLdV9~62w`H^JaHHh0 zQC00iRbr{1xVOa<&BeG$6P6OFWI8)ktEKc-Zt|af0&dfQqQ|7_dfTF>1yIeE4|7T# zfjQ((+;>j6QR^_fbT0ZxS2B~Lz3W-O6;8Q#s@(*H560FyLR;jLmKgfoD-O|D z#w?!kFeR4Rv7M7S_TTA;CDpaGw!+GL7eI%PIy*;VnHsdaCjlIqJ=-s7evjD@L z&8u+xx)CaPfq;YI-h)VPUq~t$D`RAMjd%a7Sj+jZgdGz z5E8c@X`!VsBWg3Rq9BEvv0Tvd+q-x&G%|TlmigC^!?w){Uvx6vIeoS+%>qA%{b_}k zQ(-lg>nFD9x_bC_V-#Wcr4aW$bfy^znz~bD1>eOwN1ga5fuUfPKv|Ku?7lpUb*&DE zA>z2JQN0<_eOHiEe$j*AIFIvg*wGxemm(DJW9@ZUd-Qq6@OxX~=7A^}t^**Laqq(| zo+iL^VxPrV{dK6whrxCKn{>cUjW8-468P|~@o>nh&3sw6t7{+?K8r@L#LDMxP8}G- zOFpZXC(plTxr(MXJASL&h#^5vGr|2!JC_O5vp`)Ee zt!L3U6m9M}8g-al+G^_^>}hiAb~fURwko*o=7}w_;$#9d9!@z*mT?;cT@g!Y6(}rL zw%bF=n?>K9T_4(7LD{Y-o;tl}-AXOk=v&1$Cc?Cns+1J6!ac1uIWS44jaX~`K?uW#EI$4=9Foc zE&hR5&9~@l9r%~eavFHNwFj8j_6IkiGSozPJh5B(K#caIeAnDZW2e^E_QAG(+}lFa zsjV>Eh1vex91dVCTN&P!hj*OWxH1t=9_O=hDHjn|Ou2AZ3-xz}$>J?js?BEiVNIZ3M15i=}Xz4xiAq zLt)h2=Y0ydp1O~sMP}57^t0qZd`5SAB-8Ydqq;sUD5E&78jqP)#t!^V1Z8It5SNDpBId43js=aCn=X%TAeAp_&eE2ZU* zCre=}((8BSB%9gbBdlOUqotwF+9V^D1&sxX z!+nbdCGT6|$e_A$iGBFSpQxeJ%vcK^&A5}7yivW^C|MRO?Nf@|N3%k_CCN4&6E{$= zZ<;bY;x}f{crXF#CeaXBdXNFrnYeMkggeOggz>7TS}~x0#%B5bx60!t;tn)dk+6P? zq!%qTqSJ6lVAS&FNqY&$;qI`3pQN|D>p>v)6 zZ2GWfHd@#vr3Tk(oP_Ica;+*fO~c$z8uqjQlxfUZALb-uHCsd0tS4wE1s{Bu7y786 z+X;Kz#L&I`26iu#x3+2nA!9NVo!mlW_(pSbdTS)Ie|b!ZDL=jX8XNiX+p;(0#E!wex)s^F%fSp5@EVUpH`xXx-}>F#HEP)d~&oZ6D{^7=)Tsd z|I&n9mMTNgM$)SoQ8O5>yKcBiH_9NAY)>Nb>zH}bFMHL?OFtSNsz?2()VV_3F`D?Gp7ka>YB^xHJ*Pvme zFNre)6-S6X(-lG1>?rFeAAQGyv&4b3W3wM@Rlr` zn8^0^wyG}nb+%dqnPnG7YgNxf8Z%%8cP#1kDjw$4g>GV@nMB z5ITuxGvOR$0oaM>9a?soK=NqnlJv|UPa&D4SnmnA2`-&Sz!F~%lbs#?VQZ?&+~Mr7 zi@<#+%HB+)k#mPUQ;^);iLZG1ZQ*VLZumjDZdrYZsgVxJ9b!(iZK^YbHk?|q3FfK< zo1b}~h5?7`RQ#xbuMXKOHpEbkupRH>wryY`tc19hZz<$}>rK~rSx@x^!|oW^kU>pL zEmb63B=3myO}YsMBl=Q=+2N*aOE6&?U)=7FBq{VUa?NiYDsUmcJRa3Z1uw7d+MeM$ zPO=-WZB6?y`?kvv^EyzcUy@<^2J&bH(&8!(y3kIZ4hqaB^ zm#9svY=~ZOvVzUKRScgqmFC%)peEB1-3LoDYnf=8PmsnY7=x=-bMtU+U`|%1*kX}& zd$-i0+vKW7ne_A;7=|WhI~6jr%==&m$@YOhKD%X2g?f69tmN&i5&X%OxHsW$o1 z+bTA)cZCKcUqg$QUR&ZZZ6^%ifEA`n)6wIx+~TO;?|BlYl6$inn>UjcBVjBx1--y546 z7FN}^H0OPACN%gD<;o$_r_0u`0}r?VMV{qbOvJg!3E~rmVn}@Q=55J~+-7jD!xbs` zL#$;JnokJ5X0%S{?3Udu6f%zM9A@RZ%0%NppZ4RI)OM6Cl{AC+YjZXP@sWG<-biB1 z3Yl$nzO@cwc8W95I*5Ulfdy$y=z9B;HwJAAWzf6fW_`VnF^vX`6EYhgzOg@e{IVy% zwDFOf+oue6Z+!SJJ|N~yObKm2ei;$VbO&od(1VS1P&}O(mkkfWb$o2Ytz6QHkKuD5 z6+y5Nx6-W}z7`8npxCqyc5k>L)7`ozt*AYI>4tkVU9GD(KK$rlD^6d>2WH2Paj~9X zS7$=>*s(5A3;oVVW{}Woc{vmC3ET<&-Ok+(Ldj4+v+{rRxNAKb#AQ3XvM!Gy>c3ha}d+pU)8};)shQ znrYwo$gS;U$RpR{N8Cv0Z{Axu_h|3zVD<38=ACY*tl{OrhKJiXW74H|KuNl}e^iqs z`NI#esd2+yq&p)&UTGWKXi2D&a4q$xKu6Ifi66O@krsuo-4Zo}nN3uTm(RH}sE$gd zm2DMWC5N*~+VpO?FCdF=4k$LgQ6VK@clJu3V(3a{Smk`mlcE|-;>Zcz8}1|f+c(@B z76D3t8!a6cEZuOYg8T5J)Ym7!lnlDkc$9Y4!{tkX-)v?k1vcE23D#_QDAVO$-|@a} z;j2Hf1XOa#&nIt`G%&E?&P=z`^Mnm|QEDj}H@a9|rhs>|FNUa34i@q*NPG8&hlBsu z+qwVNbzJxU{A&FbCv5~swQySuId_YY8OQ$1OY1>9P&fw4YR+--dqIr2`wP>*R)xV+wst<2chH#_PeKRT0B~9A|&KIksTqpExdPtL$ zKpqH#l&`*7dafjaE)^tgKT|`}_Vdf_Kfluc^Q-!qHxm*UZtwql{Bq_s>%zA)n$pWQ zT>8K2+tupBwc?-NzziHj@~7S1y?Yo2yDo}XH3UC{xF!8_Q9`v)$dbosMI+oU=Eq0; z+ldr;#-@GgG^4Ig+gy3Sp{;z!w^ag9beLiLSeZ7TB4=@jB7@3Pd#7dAVa(#YMI z#e*(}_&qUBUfZ&d|2gxO9fHrk|C>$y1`k7S2;iqre$CP#%}=-&pOehAgftNkpHiX+ zUQCk${MT#`f1TetMpe{jJKq^uOM6v)DvnSLFqvP!P-Usrb>#9IG!Cl9Cou86@A0G$pn3?;XNX z#)^=0`jv(o1m$HlvF_}$*Mzl>Y{b*R{tP~u(r93d(-V+U6$sOW_j|C zyDi0hG<1C;SdEzAe~aCO*SN;6ch5b2@)@}Uy4$oH&AZ(zM*s3CTc+s~VS1Ai31-mq zKjoa5bo;cX$&MgKHOxR!Mkao2OoKqI?fq$Hrmfr$0*G~C= zj@EGM;y3+uR#;%CyH{8CL5Kc3xBuIF`rE7m{e%6&Y(3KX%kN2FgXLdlEd^_SxMhg{ zeuqlM!Xd%lz`a=zIk*ds63GnFee+M49~0d_Jqf{o^z04ejy~3DYk8=VBq{o!0^u|! z@}2G)?;~)z*Z55$n723KFs}M>0cUakdbhNMKhUNwnlpbnFUnVPH+V%JRZLGxs8 za3HjKle3rRy2zdv1x7C9ZgSUFY>mEZ)45U?OqB-gaiLo@Y5~!)^>x6F8EL(s{n3_C za96rUGm)StcEC>wVLZ`lQ`?1=_aBxLYGY;p^K}IH<41-fvk9a`9!ZY>uC#Bc9Y6vV zet}foA9?)EH)ZZ3w~zhg3hz8}aP#W9>lta-s!|FF9cHAbXNXTaBZa{eF@~LmXrT9Q zsQ^K25^(Kv1#F9%;LotJWPvC&k;cmG!}nxJIH9?QS~Ew+qaPWAtHfHLK7QhpE5}Z# zG<(nkUa`-<^J2>#*piHau{o(-Ti{_}6nYjC|H#8ZhXLdBN_)Wh^(#|cpwk8+B+HUw z7cwEGwe`(0mJ(_Nw@Z%v|Xx5RE&^zEi^W-gLaRxaO~#e-4!$w5vRE~ zkOMLTKaqGb6=@V*Y=aXmmy$HrIlqlY4k@XwyKn>wIz3LT-MgPTqz_)-@@IRmy?(jJ z+IrJdoI=hNlX$L$K%ClwOtLt@lWrxl*&Zp|uVVn;)J0U!aswq-jH)7NFh|;n1T+?# z?*&`|$UUN#uA z9hvZu*gcx{9=A`*$&L`NQ+Q^%`l0qeJ$W(F%?8>BkBex~R`WMl3zIk%7R;!2q{ z1OJLX`*yz8nq|W)qqSi+2QJ`tN|aSczW&q{KeY)IQOS~rH1ie`ygom5b#9_JF?Xdm z$0NMcm(Kr$ln8t7Ye&pN$t-EB)Re=p)js^8VU|;mn#&#?IzXKz}Vz?_kG<&y8F7{Jz1plM|jW1@_n zL1)q~+Uj50mL?sUcBs+@!-dH+2!bRB7;@}3R}ibHX`O8R*v{%rDnypYl&jXJXNj?< zsJ3R5XUQ+%3fTiz@HZL@XG5xxB=U;P-Y!l*o`kKrl^gr^q-7ft^@6qgDFyMjgq{?9 zY*KEaveT>^vpnPgYR+~#UkrtQ2b0Vb3t?_J?^!O<47(RW=2v7*YgwKas@&O!=*K^A7`z=o$$!G;y(#yY|FcQ3KREENbo{ez zRXud28wt@b_!N;EuuLFX$s+3jvs29H3s;4ePZBq8{pL440UsJOdHrTgzz1g<-}KNq zb(z=BDc)GSP3W7Rz@W7=jc+Hg8s9vU8Ns)i9<@kFjYhxjkrJXuSW#@8lUcY#hcnXhN;InCx!i5u48x=eee<&V zFp{p-So_uvC3}=2w<(}Nmgr@is(6wQd(`NeEzDmLQJ~lk!ob~kEEv~YAkxS_KuCL$ zE&HDfYwVFgl+2j0l>_4yv*H@@^G0Vb{wJ4w_ zD#2&A0eYTnK}*X$;#_8YfBAqC2R%i~VU09{YAIaBbx$TPMKo@4Xxu7tC*#+W2N6?i zDq#i4L8~HRHOA7WdKCjWCdD|e=k#h};@4j3UM{`CnB(d0_~zD9T2O3|JSP|5j3t+o zLM2s>!6JxfTy&2$MIeg)hT%jf$XFMIVXS}z=!QqgS9g00+uPKK=j;a?Yh5i!oI%eO4kYR8z7%?xoUuAQMw<>+!4`P6206nE3#-J(JT{hdd zH|D117(+o~mk3TzEpa2GB2~;-^uJs}9c(TB;YF_1NS<$qt23KEWUc3jeZV_Kn%x87 zdM3$=7ZGh#uC;8}=TzDld-rE6M~TbV}O z$pvKb^X|56zV{cK5E1dRd=VAY&3WGpjTJof4xamz7+$e!Xq4%87)b0HqO%*;LvEo>4Pde72S} zDl`+}z7Xjg=C%xYP4;N0XZLO%@^D6>~+2z^Tf3z`v0p)0I;~0MCjq?=Ht)k$PK|fcep7_0n8N`kX zaF|b3onXny5Yh&6+OlgD@BH(6X}4Kjl>ksKwyPMDM~^}#xix^Zg+!4HW$PZ~SGpvy z*yUdLb&me%X2yHnxMGh-SA#pB7ia~kMcyh>P!SN)NF@`6z6s1#`ym5^Ocd7Z#+Ubn zSumWd)(mqlxb*wayQH$Nku02;|`E>gNDLAp<8%>46c^=vNb}R@db1 zypA9yT<7yP@mvE_3dyj)TTm0QnNOsx@XtP-=r{Ycy6+5(akD^^^7Kxd#k%Lfz zq1EkUL3pHuuEmqo*2pG0(4-<(F+dSBIPG~$p^VIE5z=%FAd1GWCiyi)-@vx0H zJ8yCS-?9spKNn?bUJn!`hVj<5LTIb0LkR`~=UFoeF2nUzqahnQwPLCHVABqQc!`n( zZ!ENYptPycbRM5y!_4Jqh^tIMFkS)4#l_V0d3Hsokd94V(dNt7<6;zrU4W9QzVOhx zN_{4xq>Ty}0xh-uQ9-CSzbrp0>kUp7_PP@`Q_Fq5yDDO^imNw`?c1}Fm~liqw0Sx@bim6xte zT$t+3Ot|M95z$LP z!O5-KMrzgvh4qju)Njc{HZt%ipAD12N(`9+DKYj)GX8g{;D3XRitwcx1qN>}@a{9X zc26>cNz%Jd*xKM8TB#q-6FdU9rLKYw-qs1ur}AN|j%mUi0~_0xifOVFGf&|pS4P^d zQr}&_@)zzIaM_r&-)5wmXcXsY5W<3C!OdJkuOGDYe-0-ahsty{^ zBx1!XO~t7>Cp_7vEaRL|CMGM08b3;`R}-12sV{7G<<{MvE{sXHNL$Z>e=Yp2c(7L) zs;90Ylb{}e0Gdb}J0KT=u7usAbA*{#+)`xw(Owe#n4=y~`^Pl9<*n1*v$JzNrx{YK z+WrFLY0-)D#1FMmz}b_JY(80!)@l?bD`@hLS#vs+>+gjt6NlXz0!3oM?>IjI5<_$T zwFVEmug7TWpv%u7=E=LyH-do}Jc0#@VgxMM8YbGZ4<_?ULEv0$W)$Hoi-pyI_;+?? zY~4=la|w-Z>d}9r^(vV3(heg0B*vSh(qKXI>FSG}Btog)DP%Sx` zO$0#=@RC3Xs(7K4W;)B>wN(T0^G<%jA# z@%r61d*kRMVAilOtmcyabQN5HqO2$Bg%{y z>pj3M5bdO_Z9nA7V(_s`$1Guh7%UO;@$O|T(A`w>seNMXyW{2YL5o@tV>CgXTlm_l z>{uD`uEeA#FSFQSP%ar^^LWqM6#E@Bzlrw#$Cd$fE6a!?F5xiAHO#!K87DecDH#2#pKF$2 zGe!8u+V1wk+|0!6r1avWU3QjId&)B`AE~e*`_xdQ7bm6zfG4I9ujx#IhP`I$Lc0n93=W+_Svn>!r$ z9*`r!e&rg}v2|_`-{#UQmCH0hL7)_{^mV0}ldjJ*8;8JN>Qadjr$AATCTx8Mj6Dhx zE>7~EOJKTnxqWEkRT!_0>1U5>z`l*|+sv|s5zl}{h{zrB+`=4|t;^49G_!hS`nF|| z$^ZwdYTzXb1IC8|w|JRo?CKlS(_=hdo1bKEQfG)SV@O_Uc>4I0djWD-u%u?HyL6T4 z{RP+IxLe>_VNgoQG=zs;YLN0|`Z6dr`I(z}s2c42vU{Ci$@ICb#%v9K1zjz$a0o*lLhEcvBoMFziCXc;~X&Ik!1-)bkOpw^nqDG&oGjotRTdn@LalJDDV zDlV~-qgUAA&Ku@455i?84;LQ$wwR{8JcWZQBzk**9%wQ=v_Mh##Ihi;5%AIPa6^3h07;5loi!UJ{#9x z->CJC%4lOsRfcNNp3x|8TV6&0^axFc=esg8c1JmP7?k+jd+%OejX{dV5Y0IZIUI%v zN5#e;4tG%JaGWseB%YLbHbvzZM78smjI@H{kM6j38Pxczve>8qJ^;+fNS^Jz{JK3m zbM5^3I?r2%$&`tQF)?0DKfP1&<1=CAVCge>PO#J0LW_ggb+&gMY`pf0-r)fuSg@IU zQ^L*e59`B(xz1k;Uk{p^q7Y&_JCa~0PRm0B+B)T`3W~}c>SmzrWaJc>C{oj>YvU=^ z5l8Kdd`Jr|x|%BQYZ)}(nz3gSCn}zAcPuWZlu)m3=rnNIg3|3#k(`1E|A~Ah#X0e{ zR^60(aF)SK#~QgDVJ{4zqzt1=np#qh4XIp)0ewlSFeE}`J1afCki)IQOE(e>=2{i7 zHpX#$M<)+lHd;X93SoF~Cca@sTV3DBoG%a&DEa7}^}lCR!XZuOaBzt#>bhluWy4@Q zz8m$13OE^MCECv?6{xBaO;U51s+NY=HkrQWkLuj|4hJ$owyq7xTv*VzsI!PfH)1rx z8+is#cEFvgLf-!((E#ool}x^$gALwG)91&#wqM1tLQytGA~5QyjzB?H=oZhlny{21 zBpzpJ?HY`o^~E*r$B*8voq}?!Zr~M9lb;nGtf$9qz7U|_ZS|}*NVOzUUYJp}?xTxA z`YhX4lU#{~!{!wdIl&2X;gr_ZWya*9^v=UMJ%7Hrv9NvbO`dw?_kZb*uj-=YZ@=n! z%@M-^^6cOH+GXW;8oBH`n6| ztZ6PHKY8kSZRxKKo^X-+dy6U%w&%UBt{SLF6SF4$PYwNTJ^g`~)ZF4$>3;_GRUoD% z4^rzE0f~ED1YJgyahu*=|ACz0nlaUG*4EUQPLbJ!9CC2|#QaqSQB*MqM88`@*^g2L z7KdL804#zc&7@xAT4FD%ZUS^kUdW$XBwrGiTu|-!UJEJ)=Wm+B9o4n$#TC)*D{uDF zG*aaWSSj}|XEn1}Ov}bBNky#sNuoT9`Eb9pxtBXjJLekIBQ}s{71vK`z z*2R#X13v{?k9wU)$Q_mcnL;mAvk84ijup<+V5gR0E@}o_)|hmFOQVC@8ZVU7^PKwN zjVvY}=i#%|j*tbIOSMVaNp6{EvsDVo;4j+GHs zQ4DyxJ25?TaiTZdyD&35HGT2Yg^MuR6Jf~|fNUh0N~si~GRJ_|FHyV4ye{-TA!C|P_WI5%XA9NO%_}A?tDd( zx~wy+3C=p~+TjNeza=+->egQ(x~dqV$GQ`_${$I}0U{*Zxv~En9W?%2_q!&V%Uj}z z`GHHe`W%Ae%o#7ek~HnK%Ce$7CfSCqx>aQH{K^Xp-=dAl>ys)r%-jG8+edEXdhKSE ze`uju?4}vFOe;ogD;g-WJl z4=WFY#YN*$gn&P8ebqhj1rjj5cZ z!t)#n6y9p{a|_s=7Z`cV0zl?tHf^-TbU}*);phUfp@5v0tNyUO&bWc?j~2U^cuj0g zNYfe|P<<6uIqonBcA}g^-jScBSKc}Mh_-DFZRMNRQ+{gzN8+#ddY(%$@LgU7@ec%kIwLv z`kLyv?^)#S)>6-kZZT?AS8v}7TcDmw5-LRmnHxgb)M^hAz4Gcfz2b>aDmtJT#mAg( z)L9`nnJfR2R@4Y0&T)5_|IiJK`6pc0SLg>7Ejw#6fMe|o~IXO5oFNevBk zKTa?D^6c#kU2nEaW&7tyCzFFLW6YAU7ERVr`bFm&4B+(!K%oxpVWPFbZ=jt`u?*ut zGrl2@G=v{3wDLC{J6zk-t?XgiRtXNQ~q^3+I?k{kc_vy{=h?mNDg_xNs;p z7WbLG1|uex@N;->lc~<>eVg<8Ksex#YAHLhbl9#j1V)nj)MV8G)h!%&e z#jkFyFq9rKw8do3t|+Ly3f}iI22|T3ldiF0!l5o z{wiqhO_-U8%NLxYxM@ak^A5M+QI5WspEt>wo=k~|W{*V_Dy8uV+!I%$~=L;b2I zV)E3TJQa!AQOLKwl7Ulw`z}yY&1E4Pf)LpBba%4lUdYkt&MD8+Bs3$aA{rDI5^#e5 z#NFHc$N2Ws9VLQz1xx=s2hr3PQ;cet-CfbU&j?V;L3KX#c(o%8X!jV9&trGNkDC9+ zwWYMju6=*q=2uLjdtqWOok#LRj5G6RCCqAZNSFJ5$<%!Bun^6!0)dy%T*ypwnsbS;m7Lmd~w^!5o8({nEQDN8N5wWI(?+MqS#u0UF}`uE#0U$OE*SDo`U)g5^bMvze>r|YRuKV|vq4oT8 zEh%rJ5vBhtdCod6a||ItUNs4cq=(RXepgf9DW9}t7xk4IY4gVu)cSFon+rR)#&|k< zXKeHKZF@hwr2sWcK56Z2b5s+3K9I)((d0ugt6f^i;^_B1grg;7*E@0%WEo}J^KOZV zqRODcN0Tz_;)a8VsHt>hI@!+6g`ImNPR_zfRTkiR=Gs5iQplS)t`@6t?I(-w9bI}6 zJy^*2MAoRo`^MOI(x);d^m*%Hn%p->nq}Khoj7@q}AnAk+y#q)(Tm!yqK%A>-)C>Xm zharcN!$^1*Xb?@#DJ6a?Ocmck_O^ecl*&R%T5zDI0LB-2%zpWnY~cM5*>tWJd*>Oun8}$=Ek_)x5dA8G<{fBc01;x*_P0;H`f7u>HK&ZW5*)B*OX$#I4iaAnRHG19jL z#E0TQDPj{=#t9#?08z}&jMzJ{52rgpXCnq&v$&xu^k}-r;(*2mErx8_MgMH-1yA>( z(Rk^RN6)svNTJ}}Nd^t7Uk+2Yl*ZvLSDT(|1`7-@6mCdvGm__;TUS+x!yq2$xEADH zdNJB=l`5ozz-?=*-)?DmO~G=12BBszS`Z>?x#G^PS5D|Zk0zwL_$VA@vi6Q{U?5*As~&C&^f zsi@$fuGbxc?iqB$P?xlsz%Pibmb7!zEiJ^+iEzpOSyfi{Y&CzZWH`83lD49~n$T{; z%KAOp7>Y~?YNb3fP$PkwrQ9Y7%AN&gs^A!IN>TII!aevOZ6YBdQdIv*a@Kaf({2DB5{7T)kxqTs0`{;uzq0#=(1`Tif|R&R+ZN$jXDsI1%$j!8I*0*;9>2> zF1uDKjQjxzR37E$`onJ8X#wi4w_6j%jxut8ZCw9$wgBu`)+Vj+@km$;KX^P> zYm;lf?;dS&>vuzE$$WO6Z$W~v$fj9GQu$aZZ$V(>f5N#VW@aze*rndZRJ0f*Yv$wI z3W|}EjPh)T;wF!EUiuv4YzH6WV(VJmrdjWij+X28Km)+*p(Tvtontl8ZI_;feis!n z^X9b1VqS+B{&)wU=)eBYZxaDZMDV|z83>L%s6EeMiK!v zbjla2FLpcqd!Ju2h$%-0qVsnV0`|nFZMVg93eqaiTtvVv4I*nuXX`w1y8iO1?N0ws zr&@ly+u_YXyKEd<_&KJ@fSu`lZ&Id*?mYqBA0!NAbE#5Rrc3khERn4A_dDOKr0)0I zQ1ZjAwOxYsts<_X%#IzoOD1$ZoK>$s)Q0$*LVmr>v-Esj%k5l-^J4O{aSFB%%Ho&D z54CF>YpV);JXHwV;(_zo)r*}*qIu<&?jaU5{VpRQg8MNJC?pTmnO1HdP*RRqJAPZZ zdT_Vq^vkDaU()*<*P%Zoxc=Fhx2Cvp>$S><5lk~@W?;)}Q;4pMx>1BSenNzxQ_h}0 zr{Aq2)tx+>yh%#r5|c$mV8lc_|EUOynPg&)9QHK9DsNPMFg-d( zG(XvAu)>}5E~nFpO_rOE=uCd4BciHxdUM=vy1Y?#xXRvA1L`#W_xqnSOFKcBL_(lv zTE{Sh4ko8(p_$@_W7`j%3uX=kXd4%2MXv4K+273NJy&sQ0(#+&x+V-Xo)%pvSW&aB`{V-(8xxZW3zD>0e~=?M#SEDyEMGJl*c#Vk$r; z$}dhun$cGqrEh?OW6xjX)TN3>!klQZKst8UGD`%t(CJUDyF|gf-aB5JOaT;zR}i~! z&q1~|ZY-x){UQPL|v&Ji^+oBLmtEopFX*-osTUqU_&~| zz>{ez$U`Qzq@Aq$BB@tC&(ty>*J6HXcn^W@(?M&cYoE}$_MT4hd?I(1p%7kfOeP4S z)gy4ZNxc=+eXQ96f{TE72(`CcomY_luHwCTguwiD|m7|93`S z&^V#9l&-jd&L9EnTO)jk35m$8YIV_gIiMA>QtWPJdb9RJ?-0cT-OJw2i8!m1k1)H}Q%qhDZwqJD*bvX1~U!ce}prr@+8j)H71P{wj;` zF=<-34C{2c%^YU=ms+Hu1y{*~)hBr1!c1opJ7AQCMsY6tY6DZllTlt+F&AdeU7E|c zkCsx)LdnkV?i{QwE$}=JoXkH;qC4xtvu0tt`BSzEgXm2I8(iwL!Y?Yg(Lt&Fj;kBm zt1xj&bn3;O3}hR%lEf`c`C(!1jq^Uby)+h*$X+dn3*bPBQMh+tjB9>k_QKTsDez`8 z49ZJ6a>+yaq2SGeuQzY!a>%L`YvkF5UHLeD5IW~{?SAdQK4DQ90F&^hUfGZixC+N_ zHH^h83yUjb*Se>VKv=5beQAbieAE>qF1;ihSRO|>1hQYXBf8MOLKK8uobXcG2GKi!2YONW=j_z#giu{T`=oETc|n_ z{LN{EPVI7E!3sjD$!EBrD1AzrFhLZLd|WKWm}c}hfJB84+!O-OSU-M3IQTHTVV5uN z|HIV_Ha&9A>k!xf6>*B*z6Cn7Yfyx`OkT1{l>n+;DN^4W-Jg)2yCR;vpwk*pauE0V zfsF5LjvH+s>C8;b&0U$Ayg1ZOt))fgFtU_X;@XLs`3c<~F89QQQ}VFqE-r4aZ!K`$ z{V{p|C%R`K{NtTkPp;osq|I=GiHtQOci(+R1}tCj>cl6erPKZED7)>aZXB~u&Akqoh0$o$bXNotF8`ozsC!%47OHpB~?OXD8;SdY!qcNf9YW zDMBU+c`eYINWtEf{aSRYFka499*OF>AAhvqo0&B9+ywlkkET9EPYmJaVYLZw2BjCeb)i-qp* zcgV!ysYeU=$-XyFMY$gxK$^F@o79owhU2l}Jv^A+o%NmG*51xa=W<1rsjVQGgVwxz zhJhYYS_v!{j zT%1~Oi%*!#4kO;v%pU&{+uvez!bH(J)4piU)))oEP!qn}%EDgB`ZpV_pWeHrUNmuh zLh8}8haF}pu*Sfk$Z=R7#=V6gN@IF=K8l+Up^EqX9QJC2$edabnfa|Va}gVo2z`_| zjHbyKE&vOGF|u|D<1{FaqfKR9mpxt{XZt0{KJ^6c`s&8&`T{v#%1TN8N?Me8M4wXf zBiKsNiyBSLnS zNA-!a;%pZK5f+JrdU&HC?~z7Tc!Y!@NGXrDrr1WzsFLb-6!O~K`Ikz@b7Nr?ZikZ2)I3k)d?R4M93 z#f+eTJt<4;!J(e!nsQ_@%{Bi3qCb@6d4T*iG08=Gc4m(Kwwf1<3iWC6LktjT69+XI zQ1IIrbG$5M&iew|qiB>qG67uG-(20<8KbD6yM#_S+d1p{B~dG4S4n?yvN-d8?Py`x zNEXL;Z@aAahnm1es~mY$4;*A3Vbh6MmRH=Yu9h@n7C?m(^Remh{ z2w}<5{OppL%qyj9dX1{OGii-1Wgq-!m}ihdAE<0=kF76l?(z8L81K<8@bDvvJ_};A z(4x)i)(%xSr>K3py~XwF2$o?GcUCu+4}#bj^||4VJVP`Yk0G%ms^s^3Ceo!8R?<{o z{gBqE-$Ao3do}Ut-;iH#uMg_J{qjrOub5Fyt&Pqyiw;SAL0ZJ#0YE)Q$hN#q!4&%W z{XuYxq1$KGij^Vjv=pmdawePxH%Z@4oV_INI)F%c6}u}Ah!uSOw}qt|*7^r&_1)`t$Do=UAUI9|sC7eJ05bf#{;`c+W@)@WDNj5ifhN~{ZRi0E|Qq6^v zwum7H;-W zpm6P{@~l7G(&P4E;HWUBy)BGQm(_l8LY__h>IT`$s-yCRa_TBy8b5|>pkZU8C7svFX zG55|#!BGlNG{!0vbsuu`5{!t@IAtFGPhPTuSMON!Q)Z zn_TR9#x^Ad+)lnWMiz~d;Qmiu0<2GjyW|yWVvgm7)f=7vp&PvF96!nCrF!3q?e*?i zDnY+|@a27;O)$T6m*AhW(A0wJb3)*FCr5EM_jb4Tc6*DPd)#eVgjhYk;9{&^bj=CB z!*#dihv3lpz>YR87f!{8l5rIS>$q3r%LqQRFmk#@qXs0T7EwFi=5)zoO2X7USDCNf zJ$>}VD{FUe$PB)FJc%)1212cP4_|j=g=*kxa z2e(^Yn4Ih+y%M6B(caCtK6*1kDD8~`pjqd{)pU7xlDTbUP)OHu9X8h#0PpsCi@P_s zo}>G%=jlwX)8f|N8J;~oc_aPnRQeZ>r?%!Uw8s^Fy6apc&p11h+U4C=7^Tp0h3x7` z{0K3qR&{GcdJ-fH+>>oe+cVKI<|ZJ0*6C(JvN_dQ)VWHh%n%6zk-KA({szM9Ps}-# zVgt)t+7j;+apP(l@sYLV)SctTlX6!U?%dj5U3{yu@v|#m!3Y)4y+H{VQLJ=!>UGN} zAWKcK7R%3;av38=SScKgAzj%@^)nsSJYwSDX7DSr$ z6El-@W4e|g`OWRfD4IS4ST@BD7N0e$$q(;x`RuESVNF}9XU^9WFPfZrqYO-l=_xO=E2gb5v#&R@ z=)LZa!YU=0BDPTjvG~%_MF;U+6vFB5x&7axp=ZAnIziZ3DaS8|oAID+W=T7$y=e7N ztn8y~?s0$+!M?Wthq5zv7)6JH_#8Wt+S4s+_WDl<#FRP%{SqdQ0PkKlFM$L0F{YxR zXS+Uui6Q6Ees+emA2Ysa_snO%Q^JiIMP^FHbg-#!Qfg*(u|+fpfnhpN+7?w_JD(kq zq9Bt>SPp8K#|Uj78t(QMweJmNd6<;^KlQL4OX3c+vkAc9{7?epxQ3R<(Mkuj*Nh$` zTS#W!bT3Ysxvl2&_%T-p_JiYT*p|YL!d&R}wmEmf*+yg3us+>Thkb~-n3b#KZMH@r ziF7n%V&;w2joWs?-utWL0mB1yVY(dD*jy&e@fco3DWW5L@GGqCL8C3xEFH?=vSJKy zJs_btMzVJ00}xQ+nwxPhjM>}jKsc(#D2-f?0_7c$*`7E@smEc|>`YPIoNpJ6hzs=` zk#ZsAMW~?g6C6T_9r@^p(hP3h?rZSMFzAB{aAZ_RO zuXw?w1t-${LwY#ab}TnnGwgmjcx$ND2M{XL&7X? z>+bqYy=n!Z^`qCWGYrWf&f@YYKb>{LRnK#5f!72S@EbKbh45_Im$=u+La0gh2AopB z<(op1cZ>YNCiKux+0coIsL|&<=(LAG=tc-hr$z|T^8e|Spluk^i;AE0DWXlPv>(=- zJgFKuxU%A`OKF35bb_qQ#<+}L<9>FCs}XAPEjt8|kbtHj^o$Ivau03e!jNG){m9FxTA=!TDg=j8hR6gpC+g6W#~IF3R$W8rOQZN*EABI zM>-~vrD1^SV}&g7U2P$sAKu>D-R?vyeg9Zuz0&x0DT_vNYLQa2a5ljyzpjNJGap&lp6+R zIFkXi5>SUS_3IUoKkfR#2|zb?NSl^CD%k>UwBXF?$+pP3h%NXaifg$Z16pf9Bi7+7FJRJ85}X z&5)HqB)MgkA$m>Q#kmFFJ1uA(HZvJdRv`Rvan!B_GiLG*m7WH#y?6p;*_p65_=IDN zkZ;Ll_HT!u=os!!r7>wB_&Z%M5q^R3Q@U!M{>T?OmJBZbVMBi1_2{}hLz!h|G2G<* zv?M6P(JQ*8Ud!*-W@d+epPQdJ;QQnO->>z3pF!+^Bfq1^41I!a+U7wpQtBwJhb#uB8ExaeB&zy1vD? z#%^uwZr>YQU)XsI!{Mv)UbxzXYA5l$=k4vy^)YH{mv0U28RM+2?%vv7SR2~3We_Yv zigtJIt>4^yuD-F(tQ$7VLg|pDH$mW!`KdRuiw62dhVT zCOnN;Xsg_7*c0KYpRG|e$7vpyyO5~Z4m>DRsyIVYDddUU=#15*XCv(|T?baHfu;=- zNR_Z1cc^Q^80Zbstrdg#ObU4`zQKf$yx%elDA(^KyeW)RO022*OS6(S|ajOnzvW?E;9xF6i%VE?IQltT{T zdwHm7$p%v3szsrP!&i!R0ymfU7`sZqQgJ?AG`UHB z<@A(hx6pGfUu=Pow#MJJdNI3*mTsx`I<}sHrKvqQ>%9w%us0e|NsllIY6@l0WdCk) zWnsIwi-$I*GKvFc+i3k9(@l^@o^S0o;mTF10@Q(}nh$N(UUTU~-;+fK_H8Uei@k8$ z)@jt0Nae+2sOkRt?5m&l*cQL|9ghu4*}*W_|0km91Y6A{s}WKqi8XBD%atZ#9b(Za zdLO<(yADxW@Y8gYOCgbmiSOhLHxOQP%L`C!7^=eRh|mjJMzv@Jlu>UdoAAls*a$2FC%dP`ZD*+EYZRUX7_=sXvP&)AI54>KxVEcE6${LeQJHMh&;IX^QgTlS|EK? RWNo$Vp^xp1QrN2x}CI&-F{Q%qYCsS-#+NC*f-0s%ryLcp|ITPankZ3h)`l=l4oYprizazXk$ z=j?~Y|66Ol>-Mhqeb>7#dFg_W{Hw=r%4wc=1$ae)=RKqEi3BD?eHrgL-xMw z@COc`0L6lJ;8|chI1=mvuL0i%3&BenoW^kncnP==6y3uhB;I$xOTnLkYQG&k6MWvq zUjSAAD-M6>(%*LRKRY}Nrit!+Q1x5}s^23)jrRr@p8~2Mp8?fw1*q}=H7Gv*Bghnb zwJv=#sQKFqirU%v#4!4VLR1#bdx2cuvS zxC$Hv_JQKdpTQf!PhRbLI`;0N)1HP9cq!fpfv};7U;Ry* zOaawS+Tjnu`-!)McYxP0X{x^hRQyMv+J70;crTza^=~!^3%n(u^1lYs6|V_|)cZN; zgQvkPs`jo1Rc;n2envoz|8KxKU@Is-ok{1!r*RG+0@dz!z$xH!4$px2HsZ5D)&KY4 z&ERTKS?$aj+Ite>Z}nI|#y3?{o%vCs+h(eyTy$`#o?L*zE8_bV~fY z3)DEi3Qku(D0%ubD0v)Dr;G=xzcvt~)_Q*NcOikADUklJ_(yIerlo{RKqCuPeZF!5N_DYY`~E#6Z>a zWl-gR3aY>RLACQC21A#ojA%`vC4B{70_PnX!1KQ09F4Pw_7_k8dQBzQ2qG^cp3OzQ2M$CyaYS|YW#ly&j&w* zk&~QX1gc;6f=d4fP~-j&@KfL#P~+PJs-9QCkAv@l>fiZOY`r&vR}jC;VI_DM@vl1E z=kPLwM)MH?HO^-oz7A?03h%W2dH@U)UkT0x&zNTE?*=u`-vA|VTft9(?}F;zr3?zw z;f(_&=ZhVF3-pO^0L6!cpvoNqM}i-nVfi{1{3P*GQ1kLdun_zqsByPB><7i)KY|y6 zm(xkf=?$Rhrh`hq4;266;8oz?gPNZwT>dtPeGXp-KTZChKp!l`SX~3o1f}l}gNVNO zJy7-R1u;?HtDxGsbhe$xv7q92f|8qiU3wDK_`eFOf8PhyuctuqZ7-<$-UG$IF-+D( z@be&|=Y1Qzt3mPS>!9d<07_ogINas%Fep9x z@LX#r&H)vl4qgh*2hRqh4j%=@udjfb|JC3}!EK=0>2&xK_%Y(YclbUix`Ml{K3@zf z-*;FHs@+>1&T_aARJjMiv%n~*`A&k;-)}hlG59g!&pPY`MfVF({W|K>KQzy_e;#-y z>6f|q)u8Gh<8YEozum=WJN&G}`&@p7!z%C`$}e;AuYv0KKY`-o4?vBt5tQC<1tk|f z;K#tjF8wV~{XJv8)r*V4>xfSTRnKCFD?sVf_dwaF^`PXc5A?y~pyuh)1$JGX0*)b` z0!M*A0#)BGm;MS^Nc_Cd+Il8~lZk&Gyb}BlDEWCB#Dsdg!5hG{7TR(*fkni>0IFaA z2pV~FxC=zZyu;vFu&C79<1c^{h<_WD9oP!0AHM{pN2ixryb`>Y_>G|EeKDx|zvS}& z&Bg0L>1ih@eRvJL9`qL3^>+-YdcFXP4_|ZmjKhPV?9*xYSo}07K7I!LIG6-g{u`j$ zSqqB)yFvB)_n`W9(dR55$AQJfOTml4FN5Oe_d)T$5xfNK0wo8pf+~Lu^uY^1Z*d|h zek=mjZrtHNfaekaF(~oBN#9s@_SwU z51`sP?>^h#tH9C3Zw57Q72qx4-+`*H)uq1xN>1K!c+f8A6(~M-gW}KI zE`HGiw!b%mN`C;n75oyYd2Ir30S|#^fc}HFKi7iNzZu}!;Ag>$!7qTKOM{x{zXCNc zD_wpgC^_B>P6FQpWf#VM!Im!p75^-#dhc`bO7IHe)u8P0x52BxI?xAuK#lJ$Q1xE2 z*y7#bjl{nKP6S)P+rU49cYwtYS-&q1YP@S5{sPo|o)xk<7F7M82X6wu1fB!dgOb1P zpyux=sQ!Pr+|JY4pwdTy7l1c|8rNJLFgOl8 zt-{)|382bP1Fr_>fwE^`1l7(DT>g`w+N*cztqwcD5u_ggHE+KH)z4R5{5??p|4`WS z|3Xmx91DI5ybF}xJ`AeAe+!NTp8zie_kfeZm%%H+OClC0gXa=o1WIlq;7stZT>5tK zBgA_^wSN#S1YZL+-gB4O@m%Kc8gL5fV?fnc1#0|X1E2#DppxXN$sQx_(eiCc}F9%<6__o9IAGYHu0;OkDK#hNq!gH&Ala z0E!=74iAAo@#CQ6?b1h_+&a7&)O_6qihuWkYOl)0zwGc|9jO=;3eSiK(+so zn3bPTfn$l^0cyO}pbvf-RQ+ zYW#8V)8Mxpt^-dauC}Dd?h18=qDcP z_X)}bzklMRg1{1H_R!nFDFl{S^IOdSlKr0())7u8e1f1~J)wZQR)L6~_gg|QVI)C6 z$xiU=b|0rf|Bm~f=kNgd*Mxs2BwX5Oz~>3Saq%C37v=O@$!8M&hVT=@VM06MBhbtN z-yl3qI7ra1(SkW&xC5FWy0~C9;X1;v72)>+;a0*H!lkawDd1?rC>Q@Cd1vxnLRiW7 zZQvikOTa!*cHkUBC!vV6>%lTY10hMck)Yo-u9lV6l zL6}WQ5$+`HBwP#KIB?((b83E{CV!XvZUdho^b33z@^ zT_gCGtsmpkYWUXgdltMiT>4wY|Ap{N&4iy4mJl8# z{EV=k@KM^DnA4vyX=#Ffe@j?HxSVhG| zg%JF1B<+6^3Au!k#C!PurHlU<{4C)t!sX-zzlZoZLb!&omT(8*9P+OuyvetIMHbAS z@~HdX;cyf<7TUPtBW5hGP9$smso`)kl1lkyq4HS7A2GrkF)vgV@fReb@tR07n_Mtr z`rNs`@=E-|RDoCEo8OFh`1)~vYDHCfB1T5hjj=H4Wh<&7gKikISUAX-8BL~YvgNZG za}yPz*iad^?rhbOc)IEqe?UL7^`vT&>57_@5TxVLM108n=_}%)s%V8@8mXv(ri4K+ z2qkNxirilqe$Y?V5cU1r{4e=qmlqa~Up{6S^#59AlZnb?sLG!m356p`)mFANl8pG# zlpl)w5j!0U9DL!O2ooN6^U@fkHpnr*z<3lG4;+l{-ds)bUYcU zNL0q7sYv*C&%b}d`0{8?6$Kt7GIPOHe@QGs_m(7*RiPTC-7|B+;51v=IA2v8BAYNi zlMpJ8`sw&1@x-#Y@`>Iyd1COTQWM7K#OpKd=LFr3kp-MlVP@fn>D5jYhM5KH-r9D=^&$7#W1$ky}lrkwuu^f*_micau)ulXXLDYi0U_K0= zt0OSmG6XS2+pXwFmPabm=2K0i5=&~9g;0{23v4u5!+hAO^RraO{G|M)p+_Tr$Y1PN zC(#HqNGDzXoYJYPARSL3{)4Kx=GHm!N8xeUk0g_cBnlLc-0q=*qY6`_O9BIc5HKf7 zMJ<<)_M?^YL=xR8OhI`55_n{L6puv0bU4t=LbaDqk;zK?qpCv7{lf6*42|iEpMV6BURGiaihnz}gr6ZR zt~63q9wFTuk zi{_PC$r!Tv;mVl_9I}Md0*q5So@pj4T_w^wzbcx-LRTy;@q?8B`NWW?S?tZ4z#Kgq zO{7zPCf!cn)MUldXbpW&qkTaw1B%#sEd8BuH%IO@NlApIO3O_ojKEsCogw`y@vG9Y znrJnB$Sz%ypoa=m*WTimRibnWX=B1Il#E5OuNny)T@sB&3JhmvO)a>awF) z1!Z?q4goRaG_tgyZ1K3srU>>RJE~D=%+N!_061mJFHj^Sc#={Br*M#2UJL|Q``a!uOVJ5sVY=u0?59GvTN-v5N>6+qDIKfDz5~vy; zqt=K_2}}?kgw>m*X*E#CMS(RnZjMn_AE!4muxnXwaLB&P(&h+i&_z?zL+G^Wj)?Ha zH3fF5w`)r*oy|4tIBJ3yma!O`L`_ICf~iW$OAD%3&Bii_1Ae0XVFcT-!1<-7-r5Mr73)j(TTSD`hj)xblW7RUWNGVZ%|FJ7mdNw5A60Y)OWy zAdg_^I$LgHvOGcps$F_8K+2UCX=Pz1doW>Ql ze&_V&^xpNyWIvp)s>TUS_)Fw>E(@)&h7KW$_#6Y2;~bpS)eTk;r)4siDLVm9O-+hv zDj;1jXPU7ojxL^v7iE(22$A+8r%^feS~bbb$SakvMmYtu%43^1rSKRklZkXSOkDyK zWWcnTn}y2}U;)!H#ERuV7SX2GY*0#!1PqmyS+PucXGD!<4kuua1jjg#e$7%O0>N?C z#c7FPo6Ys!X)caRyxkEZQz?IO5!227Ix}Giiv&TI zTh54-&KdzJ_dr@Zc-1ph?r=2?Zqw8g?9`1dM|flGI|itkV@?i*DVf<5%dtCUdzUFS zqpG?F=b0_AnU`RzAC72;7YUD%vrw~?|8zDLmqlSwxWh_Orjo4x9$1}+R41he_o$uy>xIW!zCl8YVyksxssS&N<6nFD-4+qo~)FSk^%I2$~t%_n%|}2 z1p5@Fx{y6^PJ1$1Ay{t*FaFJe^Dz#Gmm7gJtS?NL`0|=7P$s;UT%AFZwMt;H#>j%8dakIngn@kyGpC+Eyj%B5*7&q=&B zZ}VWz#&9;xe*JduR@eURo;gV1Tuuj}tY5~tzr|0caSKB6ShQRV1&)TFh(|KCxxPHC zS(cQow=(11Idi%%W5UTSXYrDtP&7tL2`3CL&m6Eyg3W2(82l*?A*AZ8U=%g#qixk+ zL@wsburi%#JcML~{EQnS)0Lr- zbh(3NZ`i7bqBcjq!_+>gE5lT+*`B&!T4_-s1~usCfRW|U{3W$yM{AZe*UCw1$h*z? zfc^xl5(<>%nYsE%*?SKy3j=RJ@3dIu4otY&-d6r4?^a_TjF z(alt@jmoRaQ0Sg2mttTI1M>&hFtCk*HDK7osH3hd1{cn`&lp%PCu?xIoJzeJ<~GS5 zP}@sbT|wgY6yFqEZk>t(&)Exiz3Qw#QxmNGy4bJ>t*Dy0XI!2US*9^VXRbIiBtf<2 zyk&`B6{(Urn_;gmGbYQwzc`{jsy_;aFnZuekTHK52UKQ(iq?#NFeo+CxQ`=7j4&6S zuBwIiO!a0?oilgFbgd5NARWKVo>R}BGj6i=`3k(5a^38@ATtoEV%L=BFgq_pYhKoO zwOMc?Z&5K7X=6zRmV#^JxH+u!)I<6ZF*nxpdC^4U*Hj?tWV5>CCHL_>CKCwvXAl6^AlDzc*KxInxsHCCs;N zE@yeYI}}qnCLp9sj7KBh-9}J3J6{?~b4(WY?vAF+S@4|M)8@}BEz60|nLTyxOmCjf zKoQCj-n@kMBJ_c@bH8ZowD%7wC0mzWpX`0y*3!Azc5}`o+oLE*GUw!0c_iODILeWo zlsDfVZkdgV+q>dcVFMTv9#b;JLHI-X%mt@PS)57~8~O!POH1#bF>SULxIqU63(B&$ zA|)IcmCn|ZjGvl03L2%e#;sn6i zT*%RP@=+w0k3>3I5y{Fs<~Es1Ry^pHPM?}1MzXwde=&)R@0?mXV{x7pDs?M@bIOBu zJkrx_i&tc8_e$OELDtli+GBc2pz-R%(Ivb}5r4G*W`7#ouGpasJziIdZh=x5M>)vB z$d@gRRxHi#izCZ981+i+`8HQm&aL;#jE*^b7=cG+OYscDekpSss?29lO^hcSWlYu$ z)3q5jQ-*$ee3 z5@rb-zKE1DTWlJ3$LbHWnA?44Vj9zvtwc);SLJ4(J6s*C zc~}lCxb!|0le(;6`mqx!X*o`gxwFzqS8f&AMn31x%mP(45=pO?rct<2QBL8xPLMA& z+S*9xr6S|8<;B@*%=t3Ia)(`3uDKkoqs1_4@0Dc?7 zy4)Kgtz^hVe{kyZ!IVaCN<2G9!9im#N8BhKg*wlx3p{Wg?Zud590rc#jpyJ`E1TwN9PP2$<2aFR5I0gW z4!|nqdp*j?%?Ts(FPmuAdfPV&WLNA`+-AesR9>=~w!tZ8+4t;Ql+1!uS#3|nQr@FC zO&V)A8SeF!Npbs*yrfV**|MAkERcTLd9!-T;(9q0Tq2lfK91AI0y}3gkf{uHsD_sX z)ipA!oHlE-GRUr|e75?mJ;>bou*c+PHlvn*3GFRr1WZY`kXZ!e5CjWJa6^_moDdT% z2?}=Jyua29k)k=_qI>K^WKP%Fz>Y5-H@^7haRm$JmlaK8Nz{}V$xSTr$B!L5zG&=? zMdK&<<0h3%np8A);@Ghe7A?eq*MsaV-GrjC6N<)-^T*y?GI8?tV|i>_FgKK{DJsMC zr8pnZtGCZ#QT@45|5ly;bM-t0K}#<$jz?;WE8@39AFoWKK1F4bP*sUPZ7H{s?7n$} z$z85loJae&M#tS0FM4e0l*&Y+lDm7|2B(VIX53zI_nf(Z-_$~I%G*WY0W%>9C#sI$95!?7>gIhzWHvstXH9E=Z8HPg z(AR$4Y&3WLvEh|d-J%w(-_vz;?*>x=&ShU$Lz~!H_eN(+PrnZC%oG2$hwCe)Wj1OC2)UE8*MecM%K z=7qlat%>W{*t5N{bN4&lCzRdWuYPW7t3SNsoxZO6ry5>Vyu;<~f3M@j(0R>kdb)NV z+0x(eifR!XTYj?cg#+&>X20rQ@7vs2zy9rxO)bwTbzMu}6YKl3RQa+0uMg?FwgqqH zH?;G5D?4wScLf<@SLaI`52~kIc4_(>S9P{DwDDcv)g@6=&dxVB{mDI=f9|=iqZ>~& zw27s4Zzxk=JzY)5cq!k$_CT|eG_S~wdnVsmuR_@(*WB9qQr8m=ZS`+-zPas4=4E_s zbMvuny{-LXATFeP7w_f1hp%nkcn~4aK7ViRZ)oc~s4i1t0O|e{z5QJ;HPzc3nTgtF z+i=~%x+V#ueYcpKV^ewge&F}@Z<4LoA2#2%(*4`@$7-96lI1>ouWdH>q6d0f``548 zcw*~r``o?$&90T1O3WLObuAt3=4Jbyx7)TfwC&ixcU8xU1FxA@c(;x=uWRY;=z3%Q zv3-61fEVwr{f5jmUfaC+nWn?F&Dl5YeNFq0cD}S>l~vikrmepZUQxLI21Uem<|bS6 zz}lThc0AR+W9yc|^$#LG8R4cK9VZ4?p-%1ZZfNcO@eU@-y_t&lc zeO=;`q|el&_v!0ecKqbIL$%GC`qrn~YPY=RBS?GKw6E0y5X4)LcXb&fr@7tpn|%#3 z0JoBIwn)yulBTw9o0Sy$Uai_9z*y|=%9 zcl%nk)X>)1w&_oOUER;`dbM$tZsTj4XYtJ3R-oaa4aa-B?5vn~<<#NpL{u|r==EgW zJS|sGw;yh3Gs7_{IsG+M!FzEt@_=+ykeWl?*1vAcx|Z&izHPNF+gp0N>=;}7eWOgZ z&01Kj%GeyYINH&RHN$4whl%QZZL_tc_FcFXKrSx<#A&vfF>Qe%HI(-!V;CR=^^}O~zajNX+$k7aFWo87h~ig3{zXoyKM}Vv7A|MV?M07fY$s+}fX0`$=d!SF2`AYs;BN&EppLtXj;lY|i7Sp{skj`$*?% zy{BeX+*0?tI??cy&!i%NJm}OKm`iAq1`(R#j*!}TJl)x{uVL?c)!y)w$al2vSw)RJ zozB$Qxw`(%#@$1ab**gNovBTcp@>x25q0;f!)k2Z<9pX+W7algOk7}rI}WWs=5%}9 zNGy=jJ6Crc+Id8&6GoKz4k5MjSh&IpUK!^w zK{>hY*jDx&Kd^e^iQY!5zFl3-&kgH5v_54;PC~eMjTK6LXJ!xrJrlP18`{mA;Q<5^ z3!5*&(U)PKst6LA_Xb2JOSV;3%7_H)Jn&lAbNe1QS-ZMA>-WCC^Qn%8eSIbY%MpB9 z^JY>5eUR!m?^Vn-N17)YnnBuBGi4 za@Z{?1xSF2uA;STjHi})s$1J!cd+YK>ucKCUDr~7xYxQ)#s!n(&}kOz zhPIsf50ZMifE`urfzE4JiqVh<~QY#SQ=SS)91hh8OK#@Xw!zo zR^bT5T4YOmU88V=mjEZ_*)>JVicyNuVf}Nk* zH4RU7_jbOdU4t0jRgXgv2(IX}S(bD_`8;~fnjBE~4pu{u7^>cEvgxPwoW<#rDy1dc z@c6#IE&H_}lAGMvS-WQU`yK7_n;P)H?1Wj$?&sx_$gTu(*W2IN+1HiRX6I^~)l}cN zLv3gD&DNkKZRcfz0t3WqYR!oyv9mqUN(~?iq*Qykz%6w%Z)>shFBuvz|4g&yUt9m& z`8Pu-4A(Z#;RGn=cRaoI-PYrMJ2Y47uiBF?YH*e#xMRc6cGW)r8g@v2!l<5~vSt>h zS3cg+U_M5B*GZz?Bh%J?8G+WfT6^#o%$rg)7aj9zo6VC_;~3lT<3#QbFFpQtNj0Y!7P8mZGlJ!2?U0UV72@G?d`ec2j<(uu55W5x89jO z4$H4W)|dmJsYcO)VkS{Xenu5D(~*~)M;la-?U`tM)|tblTuOJ|luzdpbLm`BPtKS< znJ^E5%yS>sp4=ylwtJ18tPi|ZG^eKKRJgT&%j%9z_T+SV?V6n}jmH~1bCO&iWI5XU z>koU{5=*zT&k|dX?*HYEL%ZMK+1cFL_6up!?)TZ*9o*2$yF_y|tK~O%lc)q=FA|?$ zyT5zaK3N^#JVLZOEdx{FHU6plH(kB<)Ies)%O1wc=$fS9Lj&^^*?6Mfe$=(J9&Fs_ z$p-cu4Hy!<>eMSk3@Yyk1COWuwJpc?ZPQF}ZbkaOm+{SwixxaDw6TnxFs}-m_xhln zdKn&joNug7V25Clc`Jxv>uy=MWkcVCUe19-b4P8@%kGV!J#E7jaMs^`q;6Hy;im2U zRZS(f!JaUfs}-r3i|feMTmR$6o!Q~(YtS1k9B20yFtF-!I;|@zE_SpBUW=#o{kcPZ z+szPK-s|ebGh)f0%k_tw+cvNCx}WQK!VjMKxrlw=r#-QK-`Dw)nGQ)y)BBAt+bT3U zGT_?KXm_Q_)RtAgf+tdY!l8zAIAOW19hIS0X`OM%LEiFf>p&C?lVe}zt*k5Xay@uI zc&En`yQ!Hovg~U-vvC^55o+#Byx=IUbhdqkmrukCJY8PkBAZ|E@-B0s(YIe08mD@t zktt?obkHPbvUlxlKR$SlGXitxqFG3gr^CO-t=5&~{I{*6ZquRqt*FqZ!#iJWI4D8S z9{J!9%; zvUd$DCfzd~wLQu0shkKq1P0@&0tt@Y0AZ2v6%aU`DKxx;GcLQqGR&^Iz}xrB^?T|M z*FWwCVIH{c+`ps$2FtwQaa*u@+y1judh)Fr+FIVN+iVvL}(AF(h75Z=z#aGVySL*1X{rJkqw{nqV zzd9ecUwuz^w|Ln?@+|kRu@jOl*t|C&KLygDjbTXxf?;djziIP}jW0JH3;OL@=N$jT zj@e!r1wp{+snDpgCp(PC1*9| zcR#=RXLT)oO`NhIF29D_Tr+!hC+Rv&=-DMLf)E;!=tgY-=r=-sh&wKFM;%0*1&%kdCzWYsX+jRwq!>&#kLl{(Hwe(l4Gs znU`0R-%PGKcXheEv>G;#msM&&$CTQrSw>_ZRcR7+BbHIN0<(O&BDMS2l^Pw+Y(JVi zO`=ngZ1Vaw>yK?{?0jM%wNc#xiGjM=N=#<=^R4goY}aBXIT2fei}SoCF)(VmD`SwB zUF3YddD2-veji>45p$5Xn^P)t?`I!A~ONTgq|Ij`m_JU z&JB&dJB}C&j(yRCrtR-@ZH5h#Q71|7nFb{3Ia837x5f^9+=OM+xsDzO^XMu2nkj!} z&U?xge6O$y`(A=#V9I1QG-8-8Qf1(mF>FZ0VshYg?py?Z3(NA$UVz PE4Hh#PE+ZqY1aF{uK&%$ literal 0 HcmV?d00001 diff --git a/bfd/ppcboot.c b/bfd/ppcboot.c index 853ee88..c2b4c3b 100644 --- a/bfd/ppcboot.c +++ b/bfd/ppcboot.c @@ -1,6 +1,6 @@ /* BFD back-end for PPCbug boot records. Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, - 2007, 2008, 2009 Free Software Foundation, Inc. + 2007, 2008, 2009, 2011 Free Software Foundation, Inc. Written by Michael Meissner, Cygnus Support, This file is part of BFD, the Binary File Descriptor library. @@ -470,6 +470,7 @@ ppcboot_bfd_print_private_bfd_data (abfd, farg) bfd_generic_get_relocated_section_contents #define ppcboot_bfd_relax_section bfd_generic_relax_section #define ppcboot_bfd_gc_sections bfd_generic_gc_sections +#define ppcboot_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define ppcboot_bfd_merge_sections bfd_generic_merge_sections #define ppcboot_bfd_is_group_section bfd_generic_is_group_section #define ppcboot_bfd_discard_group bfd_generic_discard_group @@ -507,6 +508,7 @@ const bfd_target ppcboot_vec = 0, /* symbol_leading_char */ ' ', /* ar_pad_char */ 16, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ diff --git a/bfd/reloc.c b/bfd/reloc.c index 202a340..6ac7148 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -2177,9 +2177,10 @@ ENUMDOC ENUM BFD_RELOC_MIPS_JMP +ENUMX + BFD_RELOC_MICROMIPS_JMP ENUMDOC - Bits 27..2 of the relocation address shifted right 2 bits; - simple reloc otherwise. + The MIPS jump instruction. ENUM BFD_RELOC_MIPS16_JMP @@ -2195,6 +2196,7 @@ ENUM BFD_RELOC_HI16 ENUMDOC High 16 bits of 32-bit value; simple reloc. + ENUM BFD_RELOC_HI16_S ENUMDOC @@ -2202,6 +2204,7 @@ ENUMDOC extended and added to form the final result. If the low 16 bits form a negative number, we need to add one to the high value to compensate for the borrow when the low bits are added. + ENUM BFD_RELOC_LO16 ENUMDOC @@ -2245,30 +2248,72 @@ ENUMDOC ENUM BFD_RELOC_MIPS_LITERAL +ENUMX + BFD_RELOC_MICROMIPS_LITERAL ENUMDOC Relocation against a MIPS literal section. ENUM + BFD_RELOC_MICROMIPS_7_PCREL_S1 +ENUMX + BFD_RELOC_MICROMIPS_10_PCREL_S1 +ENUMX + BFD_RELOC_MICROMIPS_16_PCREL_S1 +ENUMDOC + microMIPS PC-relative relocations. + +ENUM + BFD_RELOC_MICROMIPS_GPREL16 +ENUMX + BFD_RELOC_MICROMIPS_HI16 +ENUMX + BFD_RELOC_MICROMIPS_HI16_S +ENUMX + BFD_RELOC_MICROMIPS_LO16 +ENUMDOC + microMIPS versions of generic BFD relocs. + +ENUM BFD_RELOC_MIPS_GOT16 ENUMX + BFD_RELOC_MICROMIPS_GOT16 +ENUMX BFD_RELOC_MIPS_CALL16 ENUMX + BFD_RELOC_MICROMIPS_CALL16 +ENUMX BFD_RELOC_MIPS_GOT_HI16 ENUMX + BFD_RELOC_MICROMIPS_GOT_HI16 +ENUMX BFD_RELOC_MIPS_GOT_LO16 ENUMX + BFD_RELOC_MICROMIPS_GOT_LO16 +ENUMX BFD_RELOC_MIPS_CALL_HI16 ENUMX + BFD_RELOC_MICROMIPS_CALL_HI16 +ENUMX BFD_RELOC_MIPS_CALL_LO16 ENUMX + BFD_RELOC_MICROMIPS_CALL_LO16 +ENUMX BFD_RELOC_MIPS_SUB ENUMX + BFD_RELOC_MICROMIPS_SUB +ENUMX BFD_RELOC_MIPS_GOT_PAGE ENUMX + BFD_RELOC_MICROMIPS_GOT_PAGE +ENUMX BFD_RELOC_MIPS_GOT_OFST ENUMX + BFD_RELOC_MICROMIPS_GOT_OFST +ENUMX BFD_RELOC_MIPS_GOT_DISP ENUMX + BFD_RELOC_MICROMIPS_GOT_DISP +ENUMX BFD_RELOC_MIPS_SHIFT5 ENUMX BFD_RELOC_MIPS_SHIFT6 @@ -2281,16 +2326,24 @@ ENUMX ENUMX BFD_RELOC_MIPS_HIGHEST ENUMX + BFD_RELOC_MICROMIPS_HIGHEST +ENUMX BFD_RELOC_MIPS_HIGHER ENUMX + BFD_RELOC_MICROMIPS_HIGHER +ENUMX BFD_RELOC_MIPS_SCN_DISP ENUMX + BFD_RELOC_MICROMIPS_SCN_DISP +ENUMX BFD_RELOC_MIPS_REL16 ENUMX BFD_RELOC_MIPS_RELGOT ENUMX BFD_RELOC_MIPS_JALR ENUMX + BFD_RELOC_MICROMIPS_JALR +ENUMX BFD_RELOC_MIPS_TLS_DTPMOD32 ENUMX BFD_RELOC_MIPS_TLS_DTPREL32 @@ -2301,21 +2354,35 @@ ENUMX ENUMX BFD_RELOC_MIPS_TLS_GD ENUMX + BFD_RELOC_MICROMIPS_TLS_GD +ENUMX BFD_RELOC_MIPS_TLS_LDM ENUMX + BFD_RELOC_MICROMIPS_TLS_LDM +ENUMX BFD_RELOC_MIPS_TLS_DTPREL_HI16 ENUMX + BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16 +ENUMX BFD_RELOC_MIPS_TLS_DTPREL_LO16 ENUMX + BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16 +ENUMX BFD_RELOC_MIPS_TLS_GOTTPREL ENUMX + BFD_RELOC_MICROMIPS_TLS_GOTTPREL +ENUMX BFD_RELOC_MIPS_TLS_TPREL32 ENUMX BFD_RELOC_MIPS_TLS_TPREL64 ENUMX BFD_RELOC_MIPS_TLS_TPREL_HI16 ENUMX + BFD_RELOC_MICROMIPS_TLS_TPREL_HI16 +ENUMX BFD_RELOC_MIPS_TLS_TPREL_LO16 +ENUMX + BFD_RELOC_MICROMIPS_TLS_TPREL_LO16 ENUMDOC MIPS ELF relocations. COMMENT @@ -5551,6 +5618,348 @@ ENUMDOC This is used to tell the dynamic linker to copy the value out of the dynamic object into the runtime process image. +ENUM + BFD_RELOC_TILEPRO_COPY +ENUMX + BFD_RELOC_TILEPRO_GLOB_DAT +ENUMX + BFD_RELOC_TILEPRO_JMP_SLOT +ENUMX + BFD_RELOC_TILEPRO_RELATIVE +ENUMX + BFD_RELOC_TILEPRO_BROFF_X1 +ENUMX + BFD_RELOC_TILEPRO_JOFFLONG_X1 +ENUMX + BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT +ENUMX + BFD_RELOC_TILEPRO_IMM8_X0 +ENUMX + BFD_RELOC_TILEPRO_IMM8_Y0 +ENUMX + BFD_RELOC_TILEPRO_IMM8_X1 +ENUMX + BFD_RELOC_TILEPRO_IMM8_Y1 +ENUMX + BFD_RELOC_TILEPRO_DEST_IMM8_X1 +ENUMX + BFD_RELOC_TILEPRO_MT_IMM15_X1 +ENUMX + BFD_RELOC_TILEPRO_MF_IMM15_X1 +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0 +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1 +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_LO +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_LO +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_HI +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_HI +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_HA +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_HA +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_PCREL +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_PCREL +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_GOT +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_GOT +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA +ENUMX + BFD_RELOC_TILEPRO_MMSTART_X0 +ENUMX + BFD_RELOC_TILEPRO_MMEND_X0 +ENUMX + BFD_RELOC_TILEPRO_MMSTART_X1 +ENUMX + BFD_RELOC_TILEPRO_MMEND_X1 +ENUMX + BFD_RELOC_TILEPRO_SHAMT_X0 +ENUMX + BFD_RELOC_TILEPRO_SHAMT_X1 +ENUMX + BFD_RELOC_TILEPRO_SHAMT_Y0 +ENUMX + BFD_RELOC_TILEPRO_SHAMT_Y1 +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI +ENUMX + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA +ENUMX + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA +ENUMX + BFD_RELOC_TILEPRO_TLS_DTPMOD32 +ENUMX + BFD_RELOC_TILEPRO_TLS_DTPOFF32 +ENUMX + BFD_RELOC_TILEPRO_TLS_TPOFF32 +ENUMDOC + Tilera TILEPro Relocations. + +ENUM + BFD_RELOC_TILEGX_HW0 +ENUMX + BFD_RELOC_TILEGX_HW1 +ENUMX + BFD_RELOC_TILEGX_HW2 +ENUMX + BFD_RELOC_TILEGX_HW3 +ENUMX + BFD_RELOC_TILEGX_HW0_LAST +ENUMX + BFD_RELOC_TILEGX_HW1_LAST +ENUMX + BFD_RELOC_TILEGX_HW2_LAST +ENUMX + BFD_RELOC_TILEGX_COPY +ENUMX + BFD_RELOC_TILEGX_GLOB_DAT +ENUMX + BFD_RELOC_TILEGX_JMP_SLOT +ENUMX + BFD_RELOC_TILEGX_RELATIVE +ENUMX + BFD_RELOC_TILEGX_BROFF_X1 +ENUMX + BFD_RELOC_TILEGX_JUMPOFF_X1 +ENUMX + BFD_RELOC_TILEGX_JUMPOFF_X1_PLT +ENUMX + BFD_RELOC_TILEGX_IMM8_X0 +ENUMX + BFD_RELOC_TILEGX_IMM8_Y0 +ENUMX + BFD_RELOC_TILEGX_IMM8_X1 +ENUMX + BFD_RELOC_TILEGX_IMM8_Y1 +ENUMX + BFD_RELOC_TILEGX_DEST_IMM8_X1 +ENUMX + BFD_RELOC_TILEGX_MT_IMM14_X1 +ENUMX + BFD_RELOC_TILEGX_MF_IMM14_X1 +ENUMX + BFD_RELOC_TILEGX_MMSTART_X0 +ENUMX + BFD_RELOC_TILEGX_MMEND_X0 +ENUMX + BFD_RELOC_TILEGX_SHAMT_X0 +ENUMX + BFD_RELOC_TILEGX_SHAMT_X1 +ENUMX + BFD_RELOC_TILEGX_SHAMT_Y0 +ENUMX + BFD_RELOC_TILEGX_SHAMT_Y1 +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW0 +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW0 +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW1 +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW1 +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW2 +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW2 +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW3 +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW3 +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE +ENUMX + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE +ENUMX + BFD_RELOC_TILEGX_TLS_DTPMOD64 +ENUMX + BFD_RELOC_TILEGX_TLS_DTPOFF64 +ENUMX + BFD_RELOC_TILEGX_TLS_TPOFF64 +ENUMX + BFD_RELOC_TILEGX_TLS_DTPMOD32 +ENUMX + BFD_RELOC_TILEGX_TLS_DTPOFF32 +ENUMX + BFD_RELOC_TILEGX_TLS_TPOFF32 +ENUMDOC + Tilera TILE-Gx Relocations. + ENDSENUM BFD_RELOC_UNUSED @@ -5702,6 +6111,30 @@ bfd_generic_gc_sections (bfd *abfd ATTRIBUTE_UNUSED, /* INTERNAL_FUNCTION + bfd_generic_lookup_section_flags + +SYNOPSIS + void bfd_generic_lookup_section_flags + (struct bfd_link_info *, struct flag_info *); + +DESCRIPTION + Provides default handling for section flags lookup + -- i.e., does nothing. +*/ + +void +bfd_generic_lookup_section_flags (struct bfd_link_info *info ATTRIBUTE_UNUSED, + struct flag_info *finfo) +{ + if (finfo != NULL) + { + (*_bfd_error_handler) (_("INPUT_SECTION_FLAGS are not supported.\n")); + return; + } +} + +/* +INTERNAL_FUNCTION bfd_generic_merge_sections SYNOPSIS diff --git a/bfd/sco5-core.c b/bfd/sco5-core.c index 7f51a6f..2eea7ff 100644 --- a/bfd/sco5-core.c +++ b/bfd/sco5-core.c @@ -1,5 +1,6 @@ /* BFD back end for SCO5 core files (U-area and raw sections) - Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 + Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, + 2010, 2011 Free Software Foundation, Inc. Written by Jouke Numan @@ -369,9 +370,10 @@ const bfd_target sco5_core_vec = HAS_LINENO | HAS_DEBUG | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED), (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */ - 0, /* symbol prefix */ - ' ', /* ar_pad_char */ - 16, /* ar_max_namelen */ + 0, /* symbol prefix */ + ' ', /* ar_pad_char */ + 16, /* ar_max_namelen */ + 0, /* match priority. */ NO_GET64, NO_GETS64, NO_PUT64, /* 64 bit data */ NO_GET, NO_GETS, NO_PUT, /* 32 bit data */ NO_GET, NO_GETS, NO_PUT, /* 16 bit data */ diff --git a/bfd/section.c b/bfd/section.c index 65ac5e6..7c1f750 100644 --- a/bfd/section.c +++ b/bfd/section.c @@ -327,6 +327,11 @@ CODE_FRAGMENT . sections. *} .#define SEC_COFF_SHARED_LIBRARY 0x4000000 . +. {* This input section should be copied to output in reverse order +. as an array of pointers. This is for ELF linker internal use +. only. *} +.#define SEC_ELF_REVERSE_COPY 0x4000000 +. . {* This section contains data which may be shared with other . executables or shared objects. This is for COFF only. *} .#define SEC_COFF_SHARED 0x8000000 @@ -511,6 +516,9 @@ CODE_FRAGMENT . {* The BFD which owns the section. *} . bfd *owner; . +. {* INPUT_SECTION_FLAGS if specified in the linker script. *} +. struct flag_info *section_flag_info; +. . {* A symbol which points at this section only. *} . struct bfd_symbol *symbol; . struct bfd_symbol **symbol_ptr_ptr; @@ -689,6 +697,9 @@ CODE_FRAGMENT . {* target_index, used_by_bfd, constructor_chain, owner, *} \ . 0, NULL, NULL, NULL, \ . \ +. {* flag_info, *} \ +. NULL, \ +. \ . {* symbol, symbol_ptr_ptr, *} \ . (struct bfd_symbol *) SYM, &SEC.symbol, \ . \ diff --git a/bfd/som.c b/bfd/som.c index a18c869..0726f84 100644 --- a/bfd/som.c +++ b/bfd/som.c @@ -6741,6 +6741,7 @@ som_bfd_link_split_section (bfd *abfd ATTRIBUTE_UNUSED, asection *sec) _bfd_generic_copy_link_hash_symbol_type #define som_bfd_final_link _bfd_generic_final_link #define som_bfd_gc_sections bfd_generic_gc_sections +#define som_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define som_bfd_merge_sections bfd_generic_merge_sections #define som_bfd_is_group_section bfd_generic_is_group_section #define som_bfd_discard_group bfd_generic_discard_group @@ -6768,6 +6769,7 @@ const bfd_target som_vec = 0, '/', /* AR_pad_char. */ 14, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/bfd/sparclinux.c b/bfd/sparclinux.c index 7bb10d8..b7fef22 100644 --- a/bfd/sparclinux.c +++ b/bfd/sparclinux.c @@ -1,6 +1,7 @@ /* BFD back-end for linux flavored sparc a.out binaries. Copyright 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2000, 2001, 2002, - 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. + 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2011 + Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -433,9 +434,6 @@ linux_tally_symbols (struct linux_link_hash_entry *h, void * data) struct linux_link_hash_entry *h1, *h2; bfd_boolean exists; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct linux_link_hash_entry *) h->root.root.u.i.link; - if (h->root.root.type == bfd_link_hash_undefined && CONST_STRNEQ (h->root.root.root.string, NEEDS_SHRLIB)) { diff --git a/bfd/srec.c b/bfd/srec.c index 1251a7e..6226773 100644 --- a/bfd/srec.c +++ b/bfd/srec.c @@ -1,6 +1,6 @@ /* BFD back-end for s-record objects. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2011 Free Software Foundation, Inc. Written by Steve Chamberlain of Cygnus Support . @@ -1252,6 +1252,7 @@ srec_print_symbol (bfd *abfd, #define srec_bfd_get_relocated_section_contents bfd_generic_get_relocated_section_contents #define srec_bfd_relax_section bfd_generic_relax_section #define srec_bfd_gc_sections bfd_generic_gc_sections +#define srec_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define srec_bfd_merge_sections bfd_generic_merge_sections #define srec_bfd_is_group_section bfd_generic_is_group_section #define srec_bfd_discard_group bfd_generic_discard_group @@ -1280,6 +1281,7 @@ const bfd_target srec_vec = 0, /* Leading underscore. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ @@ -1335,6 +1337,7 @@ const bfd_target symbolsrec_vec = 0, /* Leading underscore. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/bfd/sunos.c b/bfd/sunos.c index 67880b2..8ef25ed 100644 --- a/bfd/sunos.c +++ b/bfd/sunos.c @@ -1,6 +1,6 @@ /* BFD backend for SunOS binaries. Copyright 1990, 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, - 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 + 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -1749,9 +1749,6 @@ sunos_scan_dynamic_symbol (struct sunos_link_hash_entry *h, void * data) { struct bfd_link_info *info = (struct bfd_link_info *) data; - if (h->root.root.type == bfd_link_hash_warning) - h = (struct sunos_link_hash_entry *) h->root.root.u.i.link; - /* Set the written flag for symbols we do not want to write out as part of the regular symbol table. This is all symbols which are not defined in a regular object file. For some reason symbols diff --git a/bfd/targets.c b/bfd/targets.c index e491c93..46c2c94 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -1,6 +1,6 @@ /* Generic target-file-type support for the BFD library. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Cygnus Support. @@ -177,6 +177,9 @@ DESCRIPTION .{* Forward declaration. *} .typedef struct bfd_link_info _bfd_link_info; . +.{* Forward declaration. *} +.typedef struct flag_info flag_info; +. .typedef struct bfd_target .{ . {* Identifies the kind of target, e.g., SunOS4, Ultrix, etc. *} @@ -208,7 +211,11 @@ DESCRIPTION . char ar_pad_char; . . {* The maximum number of characters in an archive header. *} -. unsigned short ar_max_namelen; +. unsigned char ar_max_namelen; +. +. {* How well this target matches, used to select between various +. possible targets when more than one target matches. *} +. unsigned char match_priority; . . {* Entries for byte swapping for data. These are different from the . other entry points, since they don't take a BFD as the first argument. @@ -444,6 +451,7 @@ BFD_JUMP_TABLE macros. . NAME##_bfd_final_link, \ . NAME##_bfd_link_split_section, \ . NAME##_bfd_gc_sections, \ +. NAME##_bfd_lookup_section_flags, \ . NAME##_bfd_merge_sections, \ . NAME##_bfd_is_group_section, \ . NAME##_bfd_discard_group, \ @@ -488,6 +496,10 @@ BFD_JUMP_TABLE macros. . {* Remove sections that are not referenced from the output. *} . bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *); . +. {* Sets the bitmask of allowed and disallowed section flags. *} +. void (*_bfd_lookup_section_flags) (struct bfd_link_info *, +. struct flag_info *); +. . {* Attempt to merge SEC_MERGE sections. *} . bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *); . @@ -499,8 +511,8 @@ BFD_JUMP_TABLE macros. . . {* Check if SEC has been already linked during a reloceatable or . final link. *} -. void (*_section_already_linked) (bfd *, struct bfd_section *, -. struct bfd_link_info *); +. bfd_boolean (*_section_already_linked) (bfd *, asection *, +. struct bfd_link_info *); . . {* Define a common symbol. *} . bfd_boolean (*_bfd_define_common_symbol) (bfd *, struct bfd_link_info *, @@ -605,6 +617,7 @@ extern const bfd_target bfd_elf32_hppa_nbsd_vec; extern const bfd_target bfd_elf32_hppa_vec; extern const bfd_target bfd_elf32_i370_vec; extern const bfd_target bfd_elf32_i386_freebsd_vec; +extern const bfd_target bfd_elf32_i386_nacl_vec; extern const bfd_target bfd_elf32_i386_sol2_vec; extern const bfd_target bfd_elf32_i386_vxworks_vec; extern const bfd_target bfd_elf32_i386_vec; @@ -657,6 +670,7 @@ extern const bfd_target bfd_elf32_powerpcle_vec; extern const bfd_target bfd_elf32_powerpc_vxworks_vec; extern const bfd_target bfd_elf32_rx_le_vec; extern const bfd_target bfd_elf32_rx_be_vec; +extern const bfd_target bfd_elf32_rx_be_ns_vec; extern const bfd_target bfd_elf32_s390_vec; extern const bfd_target bfd_elf32_bigscore_vec; extern const bfd_target bfd_elf32_littlescore_vec; @@ -683,6 +697,12 @@ extern const bfd_target bfd_elf32_sparc_vxworks_vec; extern const bfd_target bfd_elf32_spu_vec; extern const bfd_target bfd_elf32_tic6x_be_vec; extern const bfd_target bfd_elf32_tic6x_le_vec; +extern const bfd_target bfd_elf32_tic6x_elf_be_vec; +extern const bfd_target bfd_elf32_tic6x_elf_le_vec; +extern const bfd_target bfd_elf32_tic6x_linux_be_vec; +extern const bfd_target bfd_elf32_tic6x_linux_le_vec; +extern const bfd_target bfd_elf32_tilegx_vec; +extern const bfd_target bfd_elf32_tilepro_vec; extern const bfd_target bfd_elf32_tradbigmips_vec; extern const bfd_target bfd_elf32_tradlittlemips_vec; extern const bfd_target bfd_elf32_tradbigmips_freebsd_vec; @@ -719,6 +739,7 @@ extern const bfd_target bfd_elf64_sh64nbsd_vec; extern const bfd_target bfd_elf64_sparc_vec; extern const bfd_target bfd_elf64_sparc_freebsd_vec; extern const bfd_target bfd_elf64_sparc_sol2_vec; +extern const bfd_target bfd_elf64_tilegx_vec; extern const bfd_target bfd_elf64_tradbigmips_vec; extern const bfd_target bfd_elf64_tradlittlemips_vec; extern const bfd_target bfd_elf64_tradbigmips_freebsd_vec; @@ -729,6 +750,8 @@ extern const bfd_target bfd_elf64_x86_64_vec; extern const bfd_target bfd_elf32_x86_64_vec; extern const bfd_target bfd_elf64_l1om_freebsd_vec; extern const bfd_target bfd_elf64_l1om_vec; +extern const bfd_target bfd_elf64_k1om_freebsd_vec; +extern const bfd_target bfd_elf64_k1om_vec; extern const bfd_target bfd_mmo_vec; extern const bfd_target bfd_powerpc_pe_vec; extern const bfd_target bfd_powerpc_pei_vec; @@ -955,6 +978,7 @@ static const bfd_target * const _bfd_target_vector[] = &bfd_elf32_hppa_vec, &bfd_elf32_i370_vec, &bfd_elf32_i386_freebsd_vec, + &bfd_elf32_i386_nacl_vec, &bfd_elf32_i386_sol2_vec, &bfd_elf32_i386_vxworks_vec, &bfd_elf32_i386_vec, @@ -1010,6 +1034,7 @@ static const bfd_target * const _bfd_target_vector[] = &bfd_elf32_powerpc_vxworks_vec, &bfd_elf32_powerpcle_vec, &bfd_elf32_rx_be_vec, + &bfd_elf32_rx_be_ns_vec, &bfd_elf32_rx_le_vec, &bfd_elf32_s390_vec, #ifdef BFD64 @@ -1041,6 +1066,8 @@ static const bfd_target * const _bfd_target_vector[] = &bfd_elf32_spu_vec, &bfd_elf32_tic6x_be_vec, &bfd_elf32_tic6x_le_vec, + &bfd_elf32_tilegx_vec, + &bfd_elf32_tilepro_vec, &bfd_elf32_tradbigmips_vec, &bfd_elf32_tradlittlemips_vec, &bfd_elf32_tradbigmips_freebsd_vec, @@ -1078,6 +1105,7 @@ static const bfd_target * const _bfd_target_vector[] = &bfd_elf64_sparc_vec, &bfd_elf64_sparc_freebsd_vec, &bfd_elf64_sparc_sol2_vec, + &bfd_elf64_tilegx_vec, &bfd_elf64_tradbigmips_vec, &bfd_elf64_tradlittlemips_vec, &bfd_elf64_tradbigmips_freebsd_vec, @@ -1088,6 +1116,8 @@ static const bfd_target * const _bfd_target_vector[] = &bfd_elf32_x86_64_vec, &bfd_elf64_l1om_freebsd_vec, &bfd_elf64_l1om_vec, + &bfd_elf64_k1om_freebsd_vec, + &bfd_elf64_k1om_vec, &bfd_mmo_vec, #endif &bfd_powerpc_pe_vec, diff --git a/bfd/tekhex.c b/bfd/tekhex.c index 2204ebb..0ed7b50 100644 --- a/bfd/tekhex.c +++ b/bfd/tekhex.c @@ -1,6 +1,6 @@ /* BFD backend for Extended Tektronix Hex Format objects. Copyright 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2002, - 2003, 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc. + 2003, 2004, 2005, 2006, 2007, 2009, 2011 Free Software Foundation, Inc. Written by Steve Chamberlain of Cygnus Support . This file is part of BFD, the Binary File Descriptor library. @@ -943,6 +943,7 @@ tekhex_print_symbol (bfd *abfd, #define tekhex_bfd_get_relocated_section_contents bfd_generic_get_relocated_section_contents #define tekhex_bfd_relax_section bfd_generic_relax_section #define tekhex_bfd_gc_sections bfd_generic_gc_sections +#define tekhex_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define tekhex_bfd_merge_sections bfd_generic_merge_sections #define tekhex_bfd_is_group_section bfd_generic_is_group_section #define tekhex_bfd_discard_group bfd_generic_discard_group @@ -972,6 +973,7 @@ const bfd_target tekhex_vec = 0, /* Leading underscore. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/bfd/trad-core.c b/bfd/trad-core.c index e06b561..4b9d14d 100644 --- a/bfd/trad-core.c +++ b/bfd/trad-core.c @@ -1,6 +1,6 @@ /* BFD back end for traditional Unix core files (U-area and raw sections) Copyright 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2011 Free Software Foundation, Inc. Written by John Gilmore of Cygnus Support. @@ -284,9 +284,10 @@ const bfd_target trad_core_vec = HAS_LINENO | HAS_DEBUG | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED), (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */ - 0, /* symbol prefix */ - ' ', /* ar_pad_char */ - 16, /* ar_max_namelen */ + 0, /* symbol prefix */ + ' ', /* ar_pad_char */ + 16, /* ar_max_namelen */ + 0, /* match priority. */ NO_GET64, NO_GETS64, NO_PUT64, /* 64 bit data */ NO_GET, NO_GETS, NO_PUT, /* 32 bit data */ NO_GET, NO_GETS, NO_PUT, /* 16 bit data */ diff --git a/bfd/verilog.c b/bfd/verilog.c index 551e5c4..a2d3ca7 100644 --- a/bfd/verilog.c +++ b/bfd/verilog.c @@ -1,5 +1,5 @@ /* BFD back-end for verilog hex memory dump files. - Copyright 2009, 2010 + Copyright 2009, 2010, 2011 Free Software Foundation, Inc. Written by Anthony Green @@ -332,6 +332,7 @@ const bfd_target verilog_vec = 0, /* Leading underscore. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/bfd/versados.c b/bfd/versados.c index 226f8a0..7f7766a 100644 --- a/bfd/versados.c +++ b/bfd/versados.c @@ -1,6 +1,6 @@ /* BFD back-end for VERSAdos-E objects. Copyright 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, - 2006, 2007, 2009, 2010 Free Software Foundation, Inc. + 2006, 2007, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Steve Chamberlain of Cygnus Support . Versados is a Motorola trademark. @@ -806,6 +806,7 @@ versados_canonicalize_reloc (bfd *abfd, #define versados_bfd_get_relocated_section_contents bfd_generic_get_relocated_section_contents #define versados_bfd_relax_section bfd_generic_relax_section #define versados_bfd_gc_sections bfd_generic_gc_sections +#define versados_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define versados_bfd_merge_sections bfd_generic_merge_sections #define versados_bfd_is_group_section bfd_generic_is_group_section #define versados_bfd_discard_group bfd_generic_discard_group @@ -834,6 +835,7 @@ const bfd_target versados_vec = 0, /* Leading underscore. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/bfd/version.h b/bfd/version.h index 7f76915..c6800ec 100644 --- a/bfd/version.h +++ b/bfd/version.h @@ -1,4 +1,4 @@ -#define BFD_VERSION_DATE 20110421 +#define BFD_VERSION_DATE 20111121 #define BFD_VERSION @bfd_version@ #define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@ #define REPORT_BUGS_TO @report_bugs_to@ diff --git a/bfd/vms-alpha.c b/bfd/vms-alpha.c index 53d0f15..8b98560 100644 --- a/bfd/vms-alpha.c +++ b/bfd/vms-alpha.c @@ -1,6 +1,6 @@ /* vms.c -- BFD back-end for EVAX (openVMS/Alpha) files. Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, - 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Initial version written by Klaus Kaempf (kkaempf@rmi.de) Major rewrite by Adacore. @@ -304,6 +304,7 @@ struct vms_private_data_struct struct module *modules; /* list of all compilation units */ + /* The DST section. */ asection *dst_section; unsigned int dst_ptr_offsets_count; /* # of offsets in following array */ @@ -329,7 +330,7 @@ struct vms_private_data_struct struct vms_internal_eisd_map *gbl_eisd_tail; /* linkage index counter used by conditional store commands */ - int vms_linkage_index; + unsigned int vms_linkage_index; /* see tc-alpha.c of gas for a description. */ int flag_hash_long_names; /* -+, hash instead of truncate */ @@ -439,7 +440,7 @@ struct alpha_vms_link_hash_table { struct bfd_link_hash_table root; - /* Vector of shared libaries. */ + /* Vector of shared libraries. */ struct vector_type shrlibs; /* Fixup section. */ @@ -992,7 +993,7 @@ static const struct sec_flags_struct evax_section_flags[] = EGPS__V_REL | EGPS__V_RD | EGPS__V_WRT, SEC_DATA, EGPS__V_REL | EGPS__V_RD | EGPS__V_WRT, - SEC_IN_MEMORY | SEC_DATA | SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD } + SEC_DATA | SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD } }; /* Retrieve BFD section flags by name and size. */ @@ -1129,14 +1130,15 @@ _bfd_vms_slurp_egsd (bfd *abfd) /* Program section definition. */ { struct vms_egps *egps = (struct vms_egps *)vms_rec; - flagword new_flags, old_flags; + flagword new_flags, vms_flags; asection *section; - old_flags = bfd_getl16 (egps->flags); + vms_flags = bfd_getl16 (egps->flags); - if ((old_flags & EGPS__V_REL) == 0) + if ((vms_flags & EGPS__V_REL) == 0) { - /* Use the global absolute section for all absolute sections. */ + /* Use the global absolute section for all + absolute sections. */ section = bfd_abs_section_ptr; } else @@ -1154,17 +1156,27 @@ _bfd_vms_slurp_egsd (bfd *abfd) section->size = bfd_getl32 (egps->alloc); section->alignment_power = egps->align; - vms_section_data (section)->flags = old_flags; + vms_section_data (section)->flags = vms_flags; vms_section_data (section)->no_flags = 0; new_flags = vms_secflag_by_name (evax_section_flags, name, section->size > 0); - if (!(old_flags & EGPS__V_NOMOD) && section->size > 0) + if (section->size > 0) + new_flags |= SEC_LOAD; + if (!(vms_flags & EGPS__V_NOMOD) && section->size > 0) { + /* Set RELOC and HAS_CONTENTS if the section is not + demand-zero and not empty. */ new_flags |= SEC_HAS_CONTENTS; - if (old_flags & EGPS__V_REL) + if (vms_flags & EGPS__V_REL) new_flags |= SEC_RELOC; } + if (vms_flags & EGPS__V_EXE) + { + /* Set CODE if section is executable. */ + new_flags |= SEC_CODE; + new_flags &= ~SEC_DATA; + } if (!bfd_set_section_flags (abfd, section, new_flags)) return FALSE; @@ -2425,7 +2437,7 @@ vms_initialize (bfd * abfd) static const struct bfd_target * alpha_vms_object_p (bfd *abfd) { - PTR tdata_save = abfd->tdata.any; + void *tdata_save = abfd->tdata.any; unsigned int test_len; unsigned char *buf; @@ -2648,7 +2660,7 @@ _bfd_vms_write_eeom (bfd *abfd) _bfd_vms_output_alignment (recwr, 2); _bfd_vms_output_begin (recwr, EOBJ__C_EEOM); - _bfd_vms_output_long (recwr, (unsigned long) (PRIV (vms_linkage_index) >> 1)); + _bfd_vms_output_long (recwr, PRIV (vms_linkage_index + 1) >> 1); _bfd_vms_output_byte (recwr, 0); /* Completion code. */ _bfd_vms_output_byte (recwr, 0); /* Fill byte. */ @@ -2908,7 +2920,7 @@ alpha_vms_create_eisd_for_section (bfd *abfd, asection *sec) if (sec->flags & SEC_RELOC) eisd->u.eisd.flags |= EISD__M_WRT | EISD__M_CRF; - if (!(sec->flags & SEC_LOAD)) + if (!(sec->flags & SEC_HAS_CONTENTS)) { eisd->u.eisd.flags |= EISD__M_DZRO; eisd->u.eisd.flags &= ~EISD__M_CRF; @@ -3724,7 +3736,7 @@ _bfd_vms_write_etir (bfd * abfd, int objtype ATTRIBUTE_UNUSED) _bfd_vms_output_alignment (recwr, 4); - PRIV (vms_linkage_index) = 1; + PRIV (vms_linkage_index) = 0; for (section = abfd->sections; section; section = section->next) { @@ -3935,8 +3947,9 @@ _bfd_vms_write_etir (bfd * abfd, int objtype ATTRIBUTE_UNUSED) etir_output_check (abfd, section, curr_addr, 64); _bfd_vms_output_begin_subrec (recwr, ETIR__C_STC_LP_PSB); _bfd_vms_output_long - (recwr, (unsigned long) PRIV (vms_linkage_index)); - PRIV (vms_linkage_index) += 2; + (recwr, (unsigned long) rptr->addend); + if (rptr->addend > PRIV (vms_linkage_index)) + PRIV (vms_linkage_index) = rptr->addend; hash = _bfd_vms_length_hash_symbol (abfd, sym->name, EOBJ__C_SYMSIZ); _bfd_vms_output_counted (recwr, hash); @@ -3962,13 +3975,11 @@ _bfd_vms_write_etir (bfd * abfd, int objtype ATTRIBUTE_UNUSED) _bfd_vms_output_begin_subrec (recwr, ETIR__C_STC_NOP_GBL); _bfd_vms_output_long (recwr, (unsigned long) udata->lkindex); _bfd_vms_output_long - (recwr, - (unsigned long) udata->enbsym->section->target_index); + (recwr, (unsigned long) section->target_index); _bfd_vms_output_quad (recwr, rptr->address); _bfd_vms_output_long (recwr, (unsigned long) 0x47ff041f); _bfd_vms_output_long - (recwr, - (unsigned long) udata->enbsym->section->target_index); + (recwr, (unsigned long) section->target_index); _bfd_vms_output_quad (recwr, rptr->addend); _bfd_vms_output_counted (recwr, _bfd_vms_length_hash_symbol @@ -3989,8 +4000,7 @@ _bfd_vms_write_etir (bfd * abfd, int objtype ATTRIBUTE_UNUSED) _bfd_vms_output_long (recwr, (unsigned long) udata->lkindex + 1); _bfd_vms_output_long - (recwr, - (unsigned long) udata->enbsym->section->target_index); + (recwr, (unsigned long) section->target_index); _bfd_vms_output_quad (recwr, rptr->address); _bfd_vms_output_long (recwr, (unsigned long) 0x237B0000); _bfd_vms_output_long @@ -4010,13 +4020,11 @@ _bfd_vms_write_etir (bfd * abfd, int objtype ATTRIBUTE_UNUSED) _bfd_vms_output_begin_subrec (recwr, ETIR__C_STC_BOH_GBL); _bfd_vms_output_long (recwr, (unsigned long) udata->lkindex); _bfd_vms_output_long - (recwr, - (unsigned long) udata->enbsym->section->target_index); + (recwr, (unsigned long) section->target_index); _bfd_vms_output_quad (recwr, rptr->address); _bfd_vms_output_long (recwr, (unsigned long) 0xD3400000); _bfd_vms_output_long - (recwr, - (unsigned long) udata->enbsym->section->target_index); + (recwr, (unsigned long) section->target_index); _bfd_vms_output_quad (recwr, rptr->addend); _bfd_vms_output_counted (recwr, _bfd_vms_length_hash_symbol @@ -4617,6 +4625,11 @@ build_module_list (bfd *abfd) /* We don't have a DMT section so this must be an object. Parse the module right now in order to compute its start address and end address. */ + void *dst = PRIV (dst_section)->contents; + + if (dst == NULL) + return NULL; + module = new_module (abfd); parse_module (abfd, module, PRIV (dst_section)->contents, -1); list = module; @@ -4710,9 +4723,11 @@ _bfd_vms_find_nearest_dst_line (bfd *abfd, asection *section, *func = NULL; *line = 0; + /* We can't do anything if there is no DST (debug symbol table). */ if (PRIV (dst_section) == NULL) return FALSE; + /* Create the module list - if not already done. */ if (PRIV (modules) == NULL) { PRIV (modules) = build_module_list (abfd); @@ -5087,7 +5102,14 @@ alpha_vms_slurp_relocs (bfd *abfd) (*_bfd_error_handler) (_("Invalid section index in ETIR")); return FALSE; } + sec = PRIV (sections)[cur_psect]; + if (sec == bfd_abs_section_ptr) + { + (*_bfd_error_handler) (_("Relocation for non-REL psect")); + return FALSE; + } + vms_sec = vms_section_data (sec); /* Allocate a reloc entry. */ @@ -5098,7 +5120,7 @@ alpha_vms_slurp_relocs (bfd *abfd) vms_sec->reloc_max = 64; sec->relocation = bfd_zmalloc (vms_sec->reloc_max * sizeof (arelent)); - } + } else { vms_sec->reloc_max *= 2; @@ -8581,20 +8603,31 @@ alpha_vms_build_fixups (struct bfd_link_info *info) return TRUE; } -/* Called by bfd_link_hash_traverse to fill the symbol table. +/* Called by bfd_hash_traverse to fill the symbol table. Return FALSE in case of failure. */ static bfd_boolean -alpha_vms_link_output_symbol (struct bfd_link_hash_entry *hc, void *infov) +alpha_vms_link_output_symbol (struct bfd_hash_entry *bh, void *infov) { + struct bfd_link_hash_entry *hc = (struct bfd_link_hash_entry *) bh; struct bfd_link_info *info = (struct bfd_link_info *)infov; - struct alpha_vms_link_hash_entry *h = (struct alpha_vms_link_hash_entry *)hc; + struct alpha_vms_link_hash_entry *h; struct vms_symbol_entry *sym; + if (hc->type == bfd_link_hash_warning) + { + hc = hc->u.i.link; + if (hc->type == bfd_link_hash_new) + return TRUE; + } + h = (struct alpha_vms_link_hash_entry *) hc; + switch (h->root.type) { - case bfd_link_hash_new: case bfd_link_hash_undefined: + return TRUE; + case bfd_link_hash_new: + case bfd_link_hash_warning: abort (); case bfd_link_hash_undefweak: return TRUE; @@ -8614,7 +8647,6 @@ alpha_vms_link_output_symbol (struct bfd_link_hash_entry *hc, void *infov) case bfd_link_hash_common: break; case bfd_link_hash_indirect: - case bfd_link_hash_warning: return TRUE; } @@ -8720,7 +8752,7 @@ alpha_vms_bfd_final_link (bfd *abfd, struct bfd_link_info *info) /* Generate the symbol table. */ BFD_ASSERT (PRIV (syms) == NULL); if (info->strip != strip_all) - bfd_link_hash_traverse (info->hash, alpha_vms_link_output_symbol, info); + bfd_hash_traverse (&info->hash->table, alpha_vms_link_output_symbol, info); /* Find the entry point. */ if (bfd_get_start_address (abfd) == 0) @@ -8972,9 +9004,17 @@ alpha_vms_get_section_contents (bfd *abfd, asection *section, return FALSE; } - /* Alloc in memory and read ETIRs. */ - BFD_ASSERT (section->contents == NULL); + /* If the section is already in memory, just copy it. */ + if (section->flags & SEC_IN_MEMORY) + { + BFD_ASSERT (section->contents != NULL); + memcpy (buf, section->contents + offset, count); + return TRUE; + } + if (section->size == 0) + return TRUE; + /* Alloc in memory and read ETIRs. */ for (sec = abfd->sections; sec; sec = sec->next) { BFD_ASSERT (sec->contents == NULL); @@ -8989,8 +9029,8 @@ alpha_vms_get_section_contents (bfd *abfd, asection *section, if (!alpha_vms_read_sections_content (abfd, NULL)) return FALSE; for (sec = abfd->sections; sec; sec = sec->next) - if (section->contents) - section->flags |= SEC_IN_MEMORY; + if (sec->contents) + sec->flags |= SEC_IN_MEMORY; memcpy (buf, section->contents + offset, count); return TRUE; } @@ -9083,7 +9123,7 @@ vms_new_section_hook (bfd * abfd, asection *section) vms_debug2 ((7, "%d: %s\n", section->index, section->name)); amt = sizeof (struct vms_section_data_struct); - section->used_by_bfd = (PTR) bfd_zalloc (abfd, amt); + section->used_by_bfd = bfd_zalloc (abfd, amt); if (section->used_by_bfd == NULL) return FALSE; @@ -9296,6 +9336,7 @@ bfd_vms_get_data (bfd *abfd) #define alpha_vms_bfd_relax_section bfd_generic_relax_section #define alpha_vms_bfd_gc_sections bfd_generic_gc_sections +#define alpha_vms_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define alpha_vms_bfd_merge_sections bfd_generic_merge_sections #define alpha_vms_bfd_is_group_section bfd_generic_is_group_section #define alpha_vms_bfd_discard_group bfd_generic_discard_group @@ -9334,6 +9375,7 @@ const bfd_target vms_alpha_vec = 0, /* symbol_leading_char. */ ' ', /* ar_pad_char. */ 15, /* ar_max_namelen. */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, @@ -9360,5 +9402,5 @@ const bfd_target vms_alpha_vec = NULL, - (PTR) 0 + NULL }; diff --git a/bfd/vms-lib.c b/bfd/vms-lib.c index 813ea39..0584186 100644 --- a/bfd/vms-lib.c +++ b/bfd/vms-lib.c @@ -1,6 +1,6 @@ /* BFD back-end for VMS archive files. - Copyright 2010 Free Software Foundation, Inc. + Copyright 2010, 2011 Free Software Foundation, Inc. Written by Tristan Gingold , AdaCore. This file is part of BFD, the Binary File Descriptor library. @@ -1196,11 +1196,13 @@ vms_lib_bstat (struct bfd *abfd ATTRIBUTE_UNUSED, static void * vms_lib_bmmap (struct bfd *abfd ATTRIBUTE_UNUSED, - void *addr ATTRIBUTE_UNUSED, - bfd_size_type len ATTRIBUTE_UNUSED, - int prot ATTRIBUTE_UNUSED, - int flags ATTRIBUTE_UNUSED, - file_ptr offset ATTRIBUTE_UNUSED) + void *addr ATTRIBUTE_UNUSED, + bfd_size_type len ATTRIBUTE_UNUSED, + int prot ATTRIBUTE_UNUSED, + int flags ATTRIBUTE_UNUSED, + file_ptr offset ATTRIBUTE_UNUSED, + void **map_addr ATTRIBUTE_UNUSED, + bfd_size_type *map_len ATTRIBUTE_UNUSED) { return (void *) -1; } @@ -2268,6 +2270,7 @@ const bfd_target vms_lib_txt_vec = 0, /* symbol_leading_char. */ ' ', /* ar_pad_char. */ 15, /* ar_max_namelen. */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, diff --git a/bfd/vms-misc.c b/bfd/vms-misc.c index a2665b7..2ea2267 100644 --- a/bfd/vms-misc.c +++ b/bfd/vms-misc.c @@ -530,7 +530,10 @@ vms_get_module_name (const char *filename, bfd_boolean upcase) - 100ns granularity - epoch is Nov 17, 1858. Here has the constants and the routines used to convert VMS from/to UNIX time. - The conversion routines don't assume 64 bits arithmetic. */ + The conversion routines don't assume 64 bits arithmetic. + + Here we assume that the definition of time_t is the UNIX one, ie integer + type, expressing seconds since the epoch. */ /* UNIX time granularity for VMS, ie 1s / 100ns. */ #define VMS_TIME_FACTOR 10000000 @@ -546,6 +549,7 @@ vms_time_to_time_t (unsigned int hi, unsigned int lo) unsigned int tmp; unsigned int rlo; int i; + time_t res; /* First convert to seconds. */ tmp = hi % VMS_TIME_FACTOR; @@ -562,14 +566,18 @@ vms_time_to_time_t (unsigned int hi, unsigned int lo) lo = rlo; /* Return 0 in case of overflow. */ - if (lo > VMS_TIME_OFFSET && hi > 1) + if (hi > 1 + || (hi == 1 && lo >= VMS_TIME_OFFSET)) return 0; /* Return 0 in case of underflow. */ - if (lo < VMS_TIME_OFFSET) + if (hi == 0 && lo < VMS_TIME_OFFSET) return 0; - return lo - VMS_TIME_OFFSET; + res = lo - VMS_TIME_OFFSET; + if (res <= 0) + return 0; + return res; } /* Convert a time_t to a VMS time. */ diff --git a/bfd/xcofflink.c b/bfd/xcofflink.c index 47e094e..4adfb17 100644 --- a/bfd/xcofflink.c +++ b/bfd/xcofflink.c @@ -1365,11 +1365,12 @@ xcoff_link_add_symbols (bfd *abfd, struct bfd_link_info *info) If C_FILE or first time, handle special Advance esym, sym_hash, csect_hash ptrs. */ - if (sym.n_sclass == C_FILE) + if (sym.n_sclass == C_FILE || sym.n_sclass == C_DWARF) csect = NULL; if (csect != NULL) *csect_cache = csect; - else if (first_csect == NULL || sym.n_sclass == C_FILE) + else if (first_csect == NULL + || sym.n_sclass == C_FILE || sym.n_sclass == C_DWARF) *csect_cache = coff_section_from_bfd_index (abfd, sym.n_scnum); else *csect_cache = NULL; @@ -2073,6 +2074,10 @@ xcoff_link_add_symbols (bfd *abfd, struct bfd_link_info *info) /* Make sure that we have seen all the relocs. */ for (o = abfd->sections; o != first_csect; o = o->next) { + /* Debugging sections have no csects. */ + if (bfd_get_section_flags (abfd, o) & SEC_DEBUGGING) + continue; + /* Reset the section size and the line number count, since the data is now attached to the csects. Don't reset the size of the .debug section, since we need to read it below in @@ -3009,6 +3014,7 @@ xcoff_sweep (struct bfd_link_info *info) || o == xcoff_hash_table (info)->loader_section || o == xcoff_hash_table (info)->linkage_section || o == xcoff_hash_table (info)->descriptor_section + || (bfd_get_section_flags (sub, o) & SEC_DEBUGGING) || strcmp (o->name, ".debug") == 0) o->flags |= SEC_MARK; else @@ -3348,9 +3354,6 @@ xcoff_post_gc_symbol (struct xcoff_link_hash_entry *h, void * p) { struct xcoff_loader_info *ldinfo = (struct xcoff_loader_info *) p; - if (h->root.type == bfd_link_hash_warning) - h = (struct xcoff_link_hash_entry *) h->root.u.i.link; - /* __rtinit, this symbol has special handling. */ if (h->flags & XCOFF_RTINIT) return TRUE; @@ -4930,21 +4933,25 @@ xcoff_link_input_bfd (struct xcoff_final_link_info *flinfo, this case, but I don't think it's worth it. */ is = flinfo->internal_syms + r_symndx; - name = (_bfd_coff_internal_syment_name - (input_bfd, is, buf)); + if (is->n_sclass != C_DWARF) + { + name = (_bfd_coff_internal_syment_name + (input_bfd, is, buf)); - if (name == NULL) - return FALSE; + if (name == NULL) + return FALSE; - if (! ((*flinfo->info->callbacks->unattached_reloc) - (flinfo->info, name, input_bfd, o, - irel->r_vaddr))) - return FALSE; + if (!(*flinfo->info->callbacks->unattached_reloc) + (flinfo->info, name, input_bfd, o, + irel->r_vaddr)) + return FALSE; + } } } } - if (xcoff_need_ldrel_p (flinfo->info, irel, h)) + if ((o->flags & SEC_DEBUGGING) == 0 + && xcoff_need_ldrel_p (flinfo->info, irel, h)) { asection *sec; @@ -5142,8 +5149,9 @@ xcoff_find_tc0 (bfd *output_bfd, struct xcoff_final_link_info *flinfo) /* Write out a non-XCOFF global symbol. */ static bfd_boolean -xcoff_write_global_symbol (struct xcoff_link_hash_entry *h, void * inf) +xcoff_write_global_symbol (struct bfd_hash_entry *bh, void * inf) { + struct xcoff_link_hash_entry *h = (struct xcoff_link_hash_entry *) bh; struct xcoff_final_link_info *flinfo = (struct xcoff_final_link_info *) inf; bfd *output_bfd; bfd_byte *outsym; @@ -6227,9 +6235,7 @@ _bfd_xcoff_bfd_final_link (bfd *abfd, struct bfd_link_info *info) /* Write out all the global symbols which do not come from XCOFF input files. */ - xcoff_link_hash_traverse (xcoff_hash_table (info), - xcoff_write_global_symbol, - (void *) &flinfo); + bfd_hash_traverse (&info->hash->table, xcoff_write_global_symbol, &flinfo); if (flinfo.outsyms != NULL) { diff --git a/bfd/xsym.c b/bfd/xsym.c index 95446e3..01434e1 100644 --- a/bfd/xsym.c +++ b/bfd/xsym.c @@ -1,6 +1,6 @@ /* xSYM symbol-file support for BFD. Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, - 2009, 2010 Free Software Foundation, Inc. + 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -42,6 +42,7 @@ #define bfd_sym_bfd_get_relocated_section_contents bfd_generic_get_relocated_section_contents #define bfd_sym_bfd_relax_section bfd_generic_relax_section #define bfd_sym_bfd_gc_sections bfd_generic_gc_sections +#define bfd_sym_bfd_lookup_section_flags bfd_generic_lookup_section_flags #define bfd_sym_bfd_merge_sections bfd_generic_merge_sections #define bfd_sym_bfd_is_group_section bfd_generic_is_group_section #define bfd_sym_bfd_discard_group bfd_generic_discard_group @@ -2316,6 +2317,7 @@ const bfd_target sym_vec = 0, /* Symbol_leading_char. */ ' ', /* AR_pad_char. */ 16, /* AR_max_namelen. */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */ diff --git a/binutils/.gitignore b/binutils/.gitignore new file mode 100644 index 0000000..1934ea0 --- /dev/null +++ b/binutils/.gitignore @@ -0,0 +1,58 @@ +/addr2line +/ar +/bin2c +/coffdump +/cxxfilt +/dlltool +/dllwrap +/elfedit +/nlmconv +/nm-new +/objcopy +/objdump +/ranlib +/readelf +/size +/srconv +/strings +/strip-new +/sysdump +/sysinfo +/windmc +/windres + +/arlex.c +/arparse.c +/arparse.h +/deflex.c +/defparse.c +/defparse.h +/mcparse.c +/mcparse.h +/nlmheader.c +/nlmheader.h +/rcparse.c +/rcparse.h +/sysinfo.c +/sysinfo.h +/syslex.c +/sysroff.c +/sysroff.h + +/doc/addr2line.1 +/doc/ar.1 +/doc/c++filt.1 +/doc/cxxfilt.man +/doc/dlltool.1 +/doc/elfedit.1 +/doc/nlmconv.1 +/doc/nm.1 +/doc/objcopy.1 +/doc/objdump.1 +/doc/ranlib.1 +/doc/readelf.1 +/doc/size.1 +/doc/strings.1 +/doc/strip.1 +/doc/windmc.1 +/doc/windres.1 diff --git a/binutils/BRANCHES b/binutils/BRANCHES index 70c6a04..8e223e1 100644 --- a/binutils/BRANCHES +++ b/binutils/BRANCHES @@ -36,3 +36,5 @@ binutils-2_17-branch binutils-2_18-branch binutils-2_19-branch binutils-2_20-branch +binutils-2_21-branch +binutils-2_22-branch diff --git a/binutils/ChangeLog b/binutils/ChangeLog index 79ae575..2f5af61 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,354 @@ +2011-10-25 Alan Modra + + Apply mainline patches + 2011-10-16 H.J. Lu + PR binutils/13278 + * ar.c (open_inarch): Set the target from the the first object + on the list only if it isn't set. + +2011-09-22 Tristan Gingold + + * NEWS: Add marker for 2.22. + +2011-09-21 David S. Miller + + * MAINTAINER: Take over from Jakub Jalinek as SPARC maintainer. + + * readelf.c (display_sparc_hwcaps): New. + (display_sparc_gnu_attribute): New. + (process_sparc_specific): New. + (process_arch_specific): When EM_SPARC, EM_SPARC32PLUS, + or EM_SPARCV9 invoke process_sparc_specific. + +2011-09-18 H.J. Lu + + PR binutils/13196 + * dwarf.c (display_debug_aranges): Check zero address size. + +2011-09-15 H.J. Lu + + PR binutils/13180 + * objcopy.c (is_strip_section_1): New. + (is_strip_section): Use it. Remove the group section if all + members are removed. + +2011-09-08 Nick Clifton + + * po/ja.po: Updated Japanese translation. + +2011-08-26 Nick Clifton + + * po/es.po: Updated Spanish translation. + +2011-08-08 Marcus Comstedt + + PR binutils/12964 + * Makefile.am (embedspu): Use awk rather than sed. + * Makefile.in: Regenerate. + +2011-07-27 Jan Kratochvil + + * dwarf.c (read_and_display_attr_value): Recognize DW_FORM_data4 and + DW_FORM_data8 as location list pointers only for DWARF < 4. + +2011-07-26 Jakub Jelinek + + * NEWS: Mention .debug_macro support. + * dwarf.c (read_and_display_attr_value): Don't print a tab + if attribute is 0. + (get_AT_name): Handle DW_AT_GNU_macros. + (get_line_filename_and_dirname, display_debug_macro): New + functions. + (debug_displays): Add an entry for .debug_macro and .zdebug_macro. + * readelf.c (process_section_headers): With do_debug_macinfo + handle also .debug_macro sections. + * dwarf.h (dwarf_section_display_enum): Add macro. + +2011-07-24 Chao-ying Fu + Maciej W. Rozycki + + * readelf.c (get_machine_flags): Handle microMIPS ASE. + (get_mips_symbol_other): Likewise. + +2011-07-22 H.J. Lu + + * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. + + * elfedit.c (elf_machine): Support EM_K1OM. + (elf_class): Likewise. + + * readelf.c (guess_is_rela): Handle EM_K1OM. + (dump_relocations): Likewise. + (get_machine_name): Likewise. + (get_section_type_name): Likewise. + (get_elf_section_flags): Likewise. + (process_section_headers): Likewise. + (get_symbol_index_type): Likewise. + (is_32bit_abs_reloc): Likewise. + (is_32bit_pcrel_reloc): Likewise. + (is_64bit_abs_reloc): Likewise. + (is_64bit_pcrel_reloc): Likewise. + (is_none_reloc): Likewise. + + * doc/binutils.texi: Mention K1OM for elfedit. + +2011-07-11 Cary Coutant + + PR 12983 + * binutils/nm.c (display_file): Decompress debug sections when + printing line numbers. + +2011-07-03 Samuel Thibault + Thomas Schwinge + + PR binutils/12913 + * elfedit.c (osabis): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX + alias and ELFOSABI_HURD. Add GNU alias. + * readelf.c (get_osabi_name, get_symbol_binding, get_symbol_type): + Likewise. + * doc/binutils.texi : Update accordingly. + +2011-07-01 Nick Clifton + + PR binutils/12325 + * doc/binutils.texi (ar cmdline): Document --target, --version and + --help command line options. + +2011-06-30 Nick Clifton + + PR binutils/12558 + * ar.c (main): When asked to move members in an archive that is + being created, ignore the move request. + +2011-06-29 Nick Clifton + + * readelf.c (get_section_type_name): When displaying an unknown + section type display the hex value first on the assumption that + the full message will probably be truncated into a 15 character + field. + +2011-06-22 Jakub Jelinek + + * dwarf.c (decode_location_expression): For DW_OP_GNU_convert and + DW_OP_GNU_reinterpret, if uvalue is 0, don't add cu_offset. + Handle DW_OP_GNU_parameter_ref. + +2011-06-16 Tom Tromey + + * dwarf-mode.el (dwarf-do-insert-substructure): Call + expand-file-name. + (dwarf-do-refresh): Likewise. + +2011-06-15 Ulrich Weigand + + * readelf.c (get_note_type): Handle NT_ARM_VFP. + +2011-06-13 Walter Lee + + * readelf.c: Include tilepro.h and tilegx.h. + (guess_is_rela): Handle EM_TILEGX and EM_TILEPRO. + (dump_relocations): Likewise. + (get_machine_name): Likewise. + (is_32bit_abs_reloc): Likewise. + (is_32bit_pcerel_reloc): Likewise. + (is_64bit_abs_reloc): Likewise. + (is_64bit_pcrel_reloc): Likewise. + +2011-06-09 Tristan Gingold + + * od-xcoff.c (xcoff32_read_symbols): Allow missing string table + length. + +2011-06-08 Nick Clifton + + PR binutils/12855 + * readelf.c (process_version_sections): Handle binaries containing + corrupt version information. + (process_symbol_table): Stop processing a symbol's version + information if it could not be read in. + + (get_data): Add comment describing the function. + (process_section_headers): Set dynamic_strings_length to 0 if the + dynamic strings could not be read in. + (process_dynamic_section): Likewise. + (process_section_groups): Stop processing the group information if + the data could not be read in. + (hppa_processs_unwind): Assert that there is only one string table + in the file. + (arm_process_unwind): Likewise. + (ia64_process_unwind): Likewise. + Set the size of the unwind auxillary information to 0 if the data + could not be read. + (load_specific_debug_section): Handle a failure to read in the + section. + (process_mips_specific): Stop display of the PLT GOT section if it + could not be read in. + +2011-06-08 Tristan Gingold + + * makefile.vms (DEFS): Define OBJDUMP_PRIVATE_VECTORS. + +2011-06-07 Cary Coutant + + * dwarf.c: Fix conversion to TU number. + +2011-06-02 Nick Clifton + + * resres.c: Fix spelling typo. + * windint.h: Likewise. + * windmc.c: Likewise. + * windres.c: Likewise. + * po/POTFILES.in: Regenerate. + * po/binutils.pot: Regenerate. + +2011-06-01 Daniel Jacobowitz + + * MAINTAINERS: Update my email address. + +2011-05-31 Matthias Klose + + * configure.in (BUILD_INSTALL_MISC): Only add embedspu once. + * configure: Regenerate. + +2011-05-30 Alan Modra + + PR binutils/12820 + * Makefile.am (bin_PROGRAMS): Move BUILD_INSTALL_MISC to.. + (bin_SCRIPTS): ..here. + (EXTRA_SCRIPTS): Define. + (EXTRA_DIST): Add embedspu.sh. + (DISTCLEANFILES): Add embedspu. + (embedspu): Depend on Makefile. Replace sed "s" command with "c". + * Makefile.in: Regenerate. + +2011-05-25 Jakub Jelinek + + * dwarf.c (loc_offsets): New variable. + (loc_offsets_compar): New routine. + (display_debug_loc): Handle loc_offsets not being in ascending order + and also a single .debug_loc entry being used multiple times. + +2011-05-18 Nick Clifton + + PR binutils/12753 + * nm.c (filter_symbols): Treat unique symbols as global symbols. + * doc/binutils.texi (nm): Mention that some lowercase letters + actually indicate global symbols. + +2011-05-15 Tristan Gingold + + * od-xcoff.c: New file. + * objdump.h: New file. + * objdump.c: Include objdump.h + (dump_private_options, objdump_private_vectors): New variables. + (usage): Mention -P/--private. Display handled options. + (long_options): Add -P/--private. + (dump_target_specific): New function. + (dump_bfd): Handle dump_private_options. + (main): Handle -P. + * doc/binutils.texi (objdump): Document -P/--private. + * configure.in (OBJDUMP_PRIVATE_VECTORS, OBJDUMP_PRIVATE_OFILES): + New variables, compute them. + (od_vectors): Add vectors for private dumpers. Make them uniq. + (OBJDUMP_DEFS): Add OBJDUMP_PRIVATE_VECTORS. + * Makefile.am (HFILES): Add objdump.h + (CFILES): Add od-xcoff.c + (OBJDUMP_PRIVATE_OFILES): New variable. + (objdump_DEPENDENCIES): Append OBJDUMP_PRIVATE_OFILES. + (objdump_LDADD): Ditto. + (EXTRA_objdump_SOURCES): Define. + * Makefile.in: Regenerate. + * configure: Regenerate. + +2011-05-10 Tristan Gingold + + * dwarf.c (process_extended_line_op): Dump unknown records. + +2011-05-07 Alan Modra + + PR binutils/12632 + * objcopy.c (copy_archive): Check bfd_openw result in unknown object + case. Rewrite without goto. + +2011-05-03 Jakub Jelinek + + * dwarf.c (decode_location_expression): Handle DW_OP_GNU_const_type, + DW_OP_GNU_regval_type, DW_OP_GNU_deref_type, DW_OP_GNU_convert + and DW_OP_GNU_reinterpret. + + * MAINTAINERS: Add myself as DWARF2 maintainer. + +2011-05-02 Alan Modra + + PR binutils/12720 + Revert the following change + Michael Snyder + * ar.c (move_members): Plug memory leak. + (delete_members): Plug memory leak. + +2011-04-28 Tom Tromey + + * NEWS: Add note about --dwarf-depth, --dwarf-start, and + dwarf-mode.el. + * objdump.c (suppress_bfd_header): New global. + (usage): Update. + (OPTION_DWARF_DEPTH, OPTION_DWARF_START): New constants. + (options): Add dwarf-depth and dwarf-start entries. + (dump_bfd): Use suppress_bfd_header. + (main): Handle OPTION_DWARF_START, OPTION_DWARF_DEPTH. + * doc/binutils.texi (objcopy): Document --dwarf-depth and + --dwarf-start. + (readelf): Likewise. + * dwarf-mode.el: New file. + * dwarf.c (dwarf_cutoff_level, dwarf_start_die): New globals. + (read_and_display_attr_value): Also check debug_info_p. + (process_debug_info): Handle dwarf_start_die and + dwarf_cutoff_level. + * dwarf.h (dwarf_cutoff_level, dwarf_start_die): Declare. + * readelf.c (usage): Update. + (OPTION_DWARF_DEPTH): New macro. + (OPTION_DWARF_START): Likewise. + (options): Add dwarf-depth and dwarf-start entries. + (parse_args): Handle OPTION_DWARF_START and OPTION_DWARF_DEPTH. + +2011-04-28 Jan Kratochvil + + * dwarf.c (display_gdb_index): Support version 5, warn on version 4. + +2011-04-27 Tristan Gingold + + * dwarf.c (process_extended_line_op): Handle + DW_LNE_HP_source_file_correlation. + +2011-04-27 Nick Clifton + + * po/da.po: Updated Danish translation. + +2011-04-21 Tom Tromey + + * readelf.c (print_stapsdt_note): New function. + (process_note): Use it. + +2011-04-21 Tom Tromey + + * readelf.c (get_stapsdt_note_type): New function. + (process_note): Recognize "stapsdt" notes. + +2011-04-21 Tom Tromey + + * readelf.c (process_corefile_note_segment): Change header field + widths. + (process_note): Change field widths. + +2011-04-21 Tom Tromey + + * readelf.c (print_gnu_note): New function. + (process_note): Use it. + +2011-04-21 Jie Zhang + + * MAINTAINERS: Update my email address. + 2011-04-11 Kai Tietz * windres.c (usage): Add new --preprocessor-arg option. diff --git a/binutils/MAINTAINERS b/binutils/MAINTAINERS index 9d3f87e..2b60a00 100644 --- a/binutils/MAINTAINERS +++ b/binutils/MAINTAINERS @@ -40,7 +40,7 @@ repository without obtaining approval first: DJ Delorie Alan Modra Michael Meissner - Daniel Jacobowitz + Daniel Jacobowitz Richard Sandiford --------- Maintainers --------- @@ -63,15 +63,16 @@ responsibility among the other maintainers. ARM (Symbian) Mark Mitchell AVR Denis Chertykov AVR Marek Michalkiewicz - BFIN Jie Zhang + BFIN Jie Zhang BFIN Bernd Schmidt BFIN Mike Frysinger - BUILD SYSTEM Daniel Jacobowitz + BUILD SYSTEM Daniel Jacobowitz CR16 M R Swami Reddy CRIS Hans-Peter Nilsson CRX M R Swami Reddy DLX Nikolaos Kavvadias DWARF2 Jason Merrill + DWARF2 Jakub Jelinek FR30 Dave Brolley FRV Dave Brolley FRV Alexandre Oliva @@ -111,7 +112,7 @@ responsibility among the other maintainers. SCORE Mei Ligang SH Alexandre Oliva SH Kaz Kojima - SPARC Jakub Jelinek + SPARC David S. Miller SPU Alan Modra TIC4X Svein Seldal TIC54X Timothy Wall diff --git a/binutils/Makefile.am b/binutils/Makefile.am index 6546087..bbe58e2 100644 --- a/binutils/Makefile.am +++ b/binutils/Makefile.am @@ -60,7 +60,10 @@ DLLWRAP_PROG=dllwrap SRCONV_PROG=srconv$(EXEEXT) sysdump$(EXEEXT) coffdump$(EXEEXT) -bin_PROGRAMS = $(SIZE_PROG) $(OBJDUMP_PROG) $(AR_PROG) $(STRINGS_PROG) $(RANLIB_PROG) $(OBJCOPY_PROG) @BUILD_NLMCONV@ @BUILD_SRCONV@ @BUILD_DLLTOOL@ @BUILD_WINDRES@ @BUILD_WINDMC@ $(ADDR2LINE_PROG) $(READELF_PROG) $(ELFEDIT_PROG) @BUILD_DLLWRAP@ @BUILD_INSTALL_MISC@ +bin_PROGRAMS = $(SIZE_PROG) $(OBJDUMP_PROG) $(AR_PROG) $(STRINGS_PROG) $(RANLIB_PROG) $(OBJCOPY_PROG) @BUILD_NLMCONV@ @BUILD_SRCONV@ @BUILD_DLLTOOL@ @BUILD_WINDRES@ @BUILD_WINDMC@ $(ADDR2LINE_PROG) $(READELF_PROG) $(ELFEDIT_PROG) @BUILD_DLLWRAP@ + +bin_SCRIPTS = @BUILD_INSTALL_MISC@ +EXTRA_SCRIPTS = embedspu ## We need a special rule to install the programs which are built with ## -new, and to rename cxxfilt to c++filt. @@ -85,7 +88,7 @@ AM_CPPFLAGS = -I. -I$(srcdir) -I../bfd -I$(BFDDIR) -I$(INCDIR) \ HFILES = \ arsup.h binemul.h bucomm.h budbg.h \ coffgrok.h debug.h dlltool.h dwarf.h elfcomm.h nlmconv.h \ - sysdep.h unwind-ia64.h windres.h winduni.h windint.h \ + objdump.h sysdep.h unwind-ia64.h windres.h winduni.h windint.h \ windmc.h GENERATED_HFILES = arparse.h sysroff.h sysinfo.h defparse.h rcparse.h mcparse.h @@ -99,6 +102,7 @@ CFILES = \ ieee.c is-ranlib.c is-strip.c maybe-ranlib.c maybe-strip.c \ nlmconv.c nm.c not-ranlib.c not-strip.c \ objcopy.c objdump.c prdbg.c \ + od-xcoff.c \ rclex.c rdcoff.c rddbg.c readelf.c rename.c \ resbin.c rescoff.c resrc.c resres.c \ size.c srconv.c stabs.c strings.c sysdump.c \ @@ -113,6 +117,9 @@ GENERATED_CFILES = \ DEBUG_SRCS = rddbg.c debug.c stabs.c ieee.c rdcoff.c WRITE_DEBUG_SRCS = $(DEBUG_SRCS) wrstabs.c +# Extra object files for objdump +OBJDUMP_PRIVATE_OFILES = @OBJDUMP_PRIVATE_OFILES@ + # Code shared by all the binutils. BULIBS = bucomm.c version.c filemode.c @@ -167,7 +174,7 @@ installcheck-local: # which depends on libintl, since we don't know whether LIBINTL_DEP will be # non-empty until configure time. Ugh! size_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) -objdump_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) $(OPCODES) +objdump_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) $(OPCODES) $(OBJDUMP_PRIVATE_OFILES) nm_new_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) ar_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) strings_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) @@ -206,7 +213,8 @@ strip_new_SOURCES = objcopy.c is-strip.c rename.c $(WRITE_DEBUG_SRCS) $(BULIBS) nm_new_SOURCES = nm.c $(BULIBS) objdump_SOURCES = objdump.c dwarf.c prdbg.c $(DEBUG_SRCS) $(BULIBS) $(ELFLIBS) -objdump_LDADD = $(OPCODES) $(BFDLIB) $(LIBIBERTY) $(LIBINTL) +EXTRA_objdump_SOURCES = od-xcoff.c +objdump_LDADD = $(OBJDUMP_PRIVATE_OFILES) $(OPCODES) $(BFDLIB) $(LIBIBERTY) $(LIBINTL) objdump.@OBJEXT@:objdump.c if am__fastdepCC @@ -279,8 +287,8 @@ sysinfo.@OBJEXT@: sysinfo.c bin2c$(EXEEXT_FOR_BUILD): bin2c.c $(CC_FOR_BUILD) -o $@ $(AM_CPPFLAGS) $(AM_CFLAGS) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) $(srcdir)/bin2c.c -embedspu: embedspu.sh - sed "s@^program_transform_name=@program_transform_name=$(program_transform_name)@" < $< > $@ +embedspu: embedspu.sh Makefile + awk '/^program_transform_name=/ {print "program_transform_name=\"$(program_transform_name)\""; next} {print}' < $< > $@ chmod a+x $@ # We need these for parallel make. @@ -476,7 +484,7 @@ dllwrap_LDADD = $(LIBIBERTY) $(LIBINTL) EXTRA_DIST = arparse.c arparse.h arlex.c nlmheader.c sysinfo.c sysinfo.h \ syslex.c deflex.c defparse.h defparse.c rcparse.h rcparse.c \ - mcparse.h mcparse.c + mcparse.h mcparse.c embedspu.sh diststuff: $(EXTRA_DIST) info all: info @@ -485,7 +493,7 @@ all: info # when BFD's version changes. CONFIG_STATUS_DEPENDENCIES = $(BFDDIR)/configure.in -DISTCLEANFILES = sysroff.c sysroff.h site.exp site.bak +DISTCLEANFILES = sysroff.c sysroff.h site.exp site.bak embedspu MOSTLYCLEANFILES = sysinfo$(EXEEXT_FOR_BUILD) bin2c$(EXEEXT_FOR_BUILD) \ binutils.log binutils.sum abcdefgh* diff --git a/binutils/Makefile.in b/binutils/Makefile.in index 8e3d7f2..9f10781 100644 --- a/binutils/Makefile.in +++ b/binutils/Makefile.in @@ -15,6 +15,7 @@ @SET_MAKE@ + VPATH = @srcdir@ pkgdatadir = $(datadir)/@PACKAGE@ pkgincludedir = $(includedir)/@PACKAGE@ @@ -39,7 +40,7 @@ bin_PROGRAMS = $(am__EXEEXT_6) $(am__EXEEXT_7) $(am__EXEEXT_8) \ $(am__EXEEXT_9) $(am__EXEEXT_10) $(am__EXEEXT_11) \ @BUILD_NLMCONV@ @BUILD_SRCONV@ @BUILD_DLLTOOL@ @BUILD_WINDRES@ \ @BUILD_WINDMC@ $(am__EXEEXT_12) $(am__EXEEXT_13) \ - $(am__EXEEXT_14) @BUILD_DLLWRAP@ @BUILD_INSTALL_MISC@ + $(am__EXEEXT_14) @BUILD_DLLWRAP@ noinst_PROGRAMS = $(am__EXEEXT_18) @BUILD_MISC@ EXTRA_PROGRAMS = $(am__EXEEXT_1) srconv$(EXEEXT) sysdump$(EXEEXT) \ coffdump$(EXEEXT) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @@ -94,7 +95,7 @@ am__EXEEXT_11 = objcopy$(EXEEXT) am__EXEEXT_12 = addr2line$(EXEEXT) am__EXEEXT_13 = readelf$(EXEEXT) am__EXEEXT_14 = elfedit$(EXEEXT) -am__installdirs = "$(DESTDIR)$(bindir)" +am__installdirs = "$(DESTDIR)$(bindir)" "$(DESTDIR)$(bindir)" am__EXEEXT_15 = nm-new$(EXEEXT) am__EXEEXT_16 = strip-new$(EXEEXT) am__EXEEXT_17 = cxxfilt$(EXEEXT) @@ -174,6 +175,28 @@ am_windres_OBJECTS = windres.$(OBJEXT) resrc.$(OBJEXT) \ rclex.$(OBJEXT) winduni.$(OBJEXT) resres.$(OBJEXT) \ $(am__objects_1) windres_OBJECTS = $(am_windres_OBJECTS) +am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`; +am__vpath_adj = case $$p in \ + $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \ + *) f=$$p;; \ + esac; +am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`; +am__install_max = 40 +am__nobase_strip_setup = \ + srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'` +am__nobase_strip = \ + for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||" +am__nobase_list = $(am__nobase_strip_setup); \ + for p in $$list; do echo "$$p $$p"; done | \ + sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \ + $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \ + if (++n[$$2] == $(am__install_max)) \ + { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \ + END { for (dir in files) print dir, files[dir] }' +am__base_list = \ + sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \ + sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g' +SCRIPTS = $(bin_SCRIPTS) DEFAULT_INCLUDES = -I.@am__isrc@ depcomp = $(SHELL) $(top_srcdir)/../depcomp am__depfiles_maybe = depfiles @@ -200,9 +223,10 @@ SOURCES = $(addr2line_SOURCES) $(ar_SOURCES) $(EXTRA_ar_SOURCES) \ $(coffdump_SOURCES) $(cxxfilt_SOURCES) $(dlltool_SOURCES) \ $(dllwrap_SOURCES) $(elfedit_SOURCES) $(nlmconv_SOURCES) \ $(nm_new_SOURCES) $(objcopy_SOURCES) $(objdump_SOURCES) \ - $(ranlib_SOURCES) $(readelf_SOURCES) $(size_SOURCES) \ - $(srconv_SOURCES) $(strings_SOURCES) $(strip_new_SOURCES) \ - $(sysdump_SOURCES) $(windmc_SOURCES) $(windres_SOURCES) + $(EXTRA_objdump_SOURCES) $(ranlib_SOURCES) $(readelf_SOURCES) \ + $(size_SOURCES) $(srconv_SOURCES) $(strings_SOURCES) \ + $(strip_new_SOURCES) $(sysdump_SOURCES) $(windmc_SOURCES) \ + $(windres_SOURCES) RECURSIVE_TARGETS = all-recursive check-recursive dvi-recursive \ html-recursive info-recursive install-data-recursive \ install-dvi-recursive install-exec-recursive \ @@ -298,6 +322,9 @@ NMEDIT = @NMEDIT@ NO_WERROR = @NO_WERROR@ OBJDUMP = @OBJDUMP@ OBJDUMP_DEFS = @OBJDUMP_DEFS@ + +# Extra object files for objdump +OBJDUMP_PRIVATE_OFILES = @OBJDUMP_PRIVATE_OFILES@ OBJEXT = @OBJEXT@ OTOOL = @OTOOL@ OTOOL64 = @OTOOL64@ @@ -413,6 +440,8 @@ WINDRES_PROG = windres WINDMC_PROG = windmc DLLWRAP_PROG = dllwrap SRCONV_PROG = srconv$(EXEEXT) sysdump$(EXEEXT) coffdump$(EXEEXT) +bin_SCRIPTS = @BUILD_INSTALL_MISC@ +EXTRA_SCRIPTS = embedspu RENAMED_PROGS = $(NM_PROG) $(STRIP_PROG) $(DEMANGLER_PROG) # Stuff that goes in tooldir/ if appropriate. @@ -429,7 +458,7 @@ AM_CPPFLAGS = -I. -I$(srcdir) -I../bfd -I$(BFDDIR) -I$(INCDIR) \ HFILES = \ arsup.h binemul.h bucomm.h budbg.h \ coffgrok.h debug.h dlltool.h dwarf.h elfcomm.h nlmconv.h \ - sysdep.h unwind-ia64.h windres.h winduni.h windint.h \ + objdump.h sysdep.h unwind-ia64.h windres.h winduni.h windint.h \ windmc.h GENERATED_HFILES = arparse.h sysroff.h sysinfo.h defparse.h rcparse.h mcparse.h @@ -442,6 +471,7 @@ CFILES = \ ieee.c is-ranlib.c is-strip.c maybe-ranlib.c maybe-strip.c \ nlmconv.c nm.c not-ranlib.c not-strip.c \ objcopy.c objdump.c prdbg.c \ + od-xcoff.c \ rclex.c rdcoff.c rddbg.c readelf.c rename.c \ resbin.c rescoff.c resrc.c resres.c \ size.c srconv.c stabs.c strings.c sysdump.c \ @@ -487,7 +517,7 @@ CC_FOR_TARGET = ` \ # which depends on libintl, since we don't know whether LIBINTL_DEP will be # non-empty until configure time. Ugh! size_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) -objdump_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) $(OPCODES) +objdump_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) $(OPCODES) $(OBJDUMP_PRIVATE_OFILES) nm_new_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) ar_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) strings_DEPENDENCIES = $(LIBINTL_DEP) $(LIBIBERTY) $(BFDLIB) @@ -517,7 +547,8 @@ elfedit_LDADD = $(LIBINTL) $(LIBIBERTY) strip_new_SOURCES = objcopy.c is-strip.c rename.c $(WRITE_DEBUG_SRCS) $(BULIBS) nm_new_SOURCES = nm.c $(BULIBS) objdump_SOURCES = objdump.c dwarf.c prdbg.c $(DEBUG_SRCS) $(BULIBS) $(ELFLIBS) -objdump_LDADD = $(OPCODES) $(BFDLIB) $(LIBIBERTY) $(LIBINTL) +EXTRA_objdump_SOURCES = od-xcoff.c +objdump_LDADD = $(OBJDUMP_PRIVATE_OFILES) $(OPCODES) $(BFDLIB) $(LIBIBERTY) $(LIBINTL) cxxfilt_SOURCES = cxxfilt.c $(BULIBS) ar_SOURCES = arparse.y arlex.l ar.c not-ranlib.c arsup.c rename.c binemul.c \ emul_$(EMULATION).c $(BULIBS) @@ -547,13 +578,13 @@ dllwrap_SOURCES = dllwrap.c version.c dllwrap_LDADD = $(LIBIBERTY) $(LIBINTL) EXTRA_DIST = arparse.c arparse.h arlex.c nlmheader.c sysinfo.c sysinfo.h \ syslex.c deflex.c defparse.h defparse.c rcparse.h rcparse.c \ - mcparse.h mcparse.c + mcparse.h mcparse.c embedspu.sh # We extract version from bfd/configure.in, make sure to rerun configure # when BFD's version changes. CONFIG_STATUS_DEPENDENCIES = $(BFDDIR)/configure.in -DISTCLEANFILES = sysroff.c sysroff.h site.exp site.bak +DISTCLEANFILES = sysroff.c sysroff.h site.exp site.bak embedspu MOSTLYCLEANFILES = sysinfo$(EXEEXT_FOR_BUILD) bin2c$(EXEEXT_FOR_BUILD) \ binutils.log binutils.sum abcdefgh* @@ -752,6 +783,40 @@ rcparse.h: rcparse.c windres$(EXEEXT): $(windres_OBJECTS) $(windres_DEPENDENCIES) @rm -f windres$(EXEEXT) $(LINK) $(windres_OBJECTS) $(windres_LDADD) $(LIBS) +install-binSCRIPTS: $(bin_SCRIPTS) + @$(NORMAL_INSTALL) + test -z "$(bindir)" || $(MKDIR_P) "$(DESTDIR)$(bindir)" + @list='$(bin_SCRIPTS)'; test -n "$(bindir)" || list=; \ + for p in $$list; do \ + if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ + if test -f "$$d$$p"; then echo "$$d$$p"; echo "$$p"; else :; fi; \ + done | \ + sed -e 'p;s,.*/,,;n' \ + -e 'h;s|.*|.|' \ + -e 'p;x;s,.*/,,;$(transform)' | sed 'N;N;N;s,\n, ,g' | \ + $(AWK) 'BEGIN { files["."] = ""; dirs["."] = 1; } \ + { d=$$3; if (dirs[d] != 1) { print "d", d; dirs[d] = 1 } \ + if ($$2 == $$4) { files[d] = files[d] " " $$1; \ + if (++n[d] == $(am__install_max)) { \ + print "f", d, files[d]; n[d] = 0; files[d] = "" } } \ + else { print "f", d "/" $$4, $$1 } } \ + END { for (d in files) print "f", d, files[d] }' | \ + while read type dir files; do \ + if test "$$dir" = .; then dir=; else dir=/$$dir; fi; \ + test -z "$$files" || { \ + echo " $(INSTALL_SCRIPT) $$files '$(DESTDIR)$(bindir)$$dir'"; \ + $(INSTALL_SCRIPT) $$files "$(DESTDIR)$(bindir)$$dir" || exit $$?; \ + } \ + ; done + +uninstall-binSCRIPTS: + @$(NORMAL_UNINSTALL) + @list='$(bin_SCRIPTS)'; test -n "$(bindir)" || exit 0; \ + files=`for p in $$list; do echo "$$p"; done | \ + sed -e 's,.*/,,;$(transform)'`; \ + test -n "$$list" || exit 0; \ + echo " ( cd '$(DESTDIR)$(bindir)' && rm -f" $$files ")"; \ + cd "$(DESTDIR)$(bindir)" && rm -f $$files mostlyclean-compile: -rm -f *.$(OBJEXT) @@ -796,6 +861,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/not-strip.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/objcopy.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/objdump.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/od-xcoff.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/prdbg.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/rclex.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/rcparse.Po@am__quote@ @@ -1018,10 +1084,10 @@ check-am: all-am $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check: $(BUILT_SOURCES) $(MAKE) $(AM_MAKEFLAGS) check-recursive -all-am: Makefile $(PROGRAMS) config.h +all-am: Makefile $(PROGRAMS) $(SCRIPTS) config.h installdirs: installdirs-recursive installdirs-am: - for dir in "$(DESTDIR)$(bindir)"; do \ + for dir in "$(DESTDIR)$(bindir)" "$(DESTDIR)$(bindir)"; do \ test -z "$$dir" || $(MKDIR_P) "$$dir"; \ done install: $(BUILT_SOURCES) @@ -1096,7 +1162,8 @@ install-dvi: install-dvi-recursive install-dvi-am: -install-exec-am: install-binPROGRAMS install-exec-local +install-exec-am: install-binPROGRAMS install-binSCRIPTS \ + install-exec-local install-html: install-html-recursive @@ -1138,7 +1205,7 @@ ps: ps-recursive ps-am: -uninstall-am: uninstall-binPROGRAMS +uninstall-am: uninstall-binPROGRAMS uninstall-binSCRIPTS .MAKE: $(RECURSIVE_CLEAN_TARGETS) $(RECURSIVE_TARGETS) all check \ check-am ctags-recursive install install-am install-strip \ @@ -1151,16 +1218,16 @@ uninstall-am: uninstall-binPROGRAMS distclean-DEJAGNU distclean-compile distclean-generic \ distclean-hdr distclean-libtool distclean-tags dvi dvi-am html \ html-am info info-am install install-am install-binPROGRAMS \ - install-data install-data-am install-dvi install-dvi-am \ - install-exec install-exec-am install-exec-local install-html \ - install-html-am install-info install-info-am install-man \ - install-pdf install-pdf-am install-ps install-ps-am \ - install-strip installcheck installcheck-am installcheck-local \ - installdirs installdirs-am maintainer-clean \ + install-binSCRIPTS install-data install-data-am install-dvi \ + install-dvi-am install-exec install-exec-am install-exec-local \ + install-html install-html-am install-info install-info-am \ + install-man install-pdf install-pdf-am install-ps \ + install-ps-am install-strip installcheck installcheck-am \ + installcheck-local installdirs installdirs-am maintainer-clean \ maintainer-clean-generic mostlyclean mostlyclean-compile \ mostlyclean-generic mostlyclean-libtool mostlyclean-local pdf \ pdf-am ps ps-am tags tags-recursive uninstall uninstall-am \ - uninstall-binPROGRAMS + uninstall-binPROGRAMS uninstall-binSCRIPTS po/POTFILES.in: @MAINT@ Makefile for f in $(POTFILES); do echo $$f; done | LC_ALL=C sort > tmp \ @@ -1234,8 +1301,8 @@ sysinfo.@OBJEXT@: sysinfo.c bin2c$(EXEEXT_FOR_BUILD): bin2c.c $(CC_FOR_BUILD) -o $@ $(AM_CPPFLAGS) $(AM_CFLAGS) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) $(srcdir)/bin2c.c -embedspu: embedspu.sh - sed "s@^program_transform_name=@program_transform_name=$(program_transform_name)@" < $< > $@ +embedspu: embedspu.sh Makefile + awk '/^program_transform_name=/ {print "program_transform_name=\"$(program_transform_name)\""; next} {print}' < $< > $@ chmod a+x $@ # We need these for parallel make. diff --git a/binutils/NEWS b/binutils/NEWS index d1b2a51..054a36b 100644 --- a/binutils/NEWS +++ b/binutils/NEWS @@ -1,8 +1,15 @@ -*- text -*- +Changes in 2.22: + +* Add support for displaying the contents of .debug.macro sections. + * Add --preprocessor-arg option to windres to specify additional options passed to preprocessor. +* Add --dwarf-start and --dwarf-end to readelf and objdump. These are used by + the new Emacs mode, see dwarf-mode.el. + Changes in 2.21: * Add --interleave-width option to objcopy to allowing copying a range of diff --git a/binutils/ar.c b/binutils/ar.c index 206c7a9..22be2cd 100644 --- a/binutils/ar.c +++ b/binutils/ar.c @@ -745,11 +745,17 @@ main (int argc, char **argv) break; case move: - if (files != NULL) - move_members (arch, files); - else - output_filename = NULL; - break; + /* PR 12558: Creating and moving at the same time does + not make sense. Just create the archive instead. */ + if (! silent_create) + { + if (files != NULL) + move_members (arch, files); + else + output_filename = NULL; + break; + } + /* Fall through. */ case replace: case quick_append: @@ -809,9 +815,9 @@ open_inarch (const char *archive_filename, const char *file) return NULL; } - /* Try to figure out the target to use for the archive from the - first object on the list. */ - if (file != NULL) + /* If the target isn't set, try to figure out the target to use + for the archive from the first object on the list. */ + if (target == NULL && file != NULL) { bfd *obj; @@ -1119,7 +1125,6 @@ delete_members (bfd *arch, char **files_to_delete) bfd_boolean found; bfd_boolean something_changed = FALSE; int match_count; - const char * tmp = NULL; for (; *files_to_delete != NULL; ++files_to_delete) { @@ -1141,10 +1146,8 @@ delete_members (bfd *arch, char **files_to_delete) current_ptr_ptr = &(arch->archive_next); while (*current_ptr_ptr) { - if (tmp != NULL) - free ((char *) tmp); - tmp = normalize (*files_to_delete, arch); - if (FILENAME_CMP (tmp, (*current_ptr_ptr)->filename) == 0) + if (FILENAME_CMP (normalize (*files_to_delete, arch), + (*current_ptr_ptr)->filename) == 0) { ++match_count; if (counted_name_mode @@ -1181,9 +1184,6 @@ delete_members (bfd *arch, char **files_to_delete) write_archive (arch); else output_filename = NULL; - - if (tmp != NULL) - free ((char *) tmp); } @@ -1192,9 +1192,8 @@ delete_members (bfd *arch, char **files_to_delete) static void move_members (bfd *arch, char **files_to_move) { - bfd **after_bfd; /* New entries go after this one. */ - bfd **current_ptr_ptr; /* cdr pointer into contents. */ - const char *tmp = NULL; + bfd **after_bfd; /* New entries go after this one */ + bfd **current_ptr_ptr; /* cdr pointer into contents */ for (; *files_to_move; ++files_to_move) { @@ -1202,11 +1201,8 @@ move_members (bfd *arch, char **files_to_move) while (*current_ptr_ptr) { bfd *current_ptr = *current_ptr_ptr; - - if (tmp != NULL) - free ((char *) tmp); - tmp = normalize (*files_to_move, arch); - if (FILENAME_CMP (tmp, current_ptr->filename) == 0) + if (FILENAME_CMP (normalize (*files_to_move, arch), + current_ptr->filename) == 0) { /* Move this file to the end of the list - first cut from where it is. */ @@ -1230,13 +1226,10 @@ move_members (bfd *arch, char **files_to_move) /* xgettext:c-format */ fatal (_("no entry %s in archive %s!"), *files_to_move, arch->filename); - next_file: - ; + next_file:; } write_archive (arch); - if (tmp != NULL) - free ((char *) tmp); } /* Ought to default to replacing in place, but this is existing practice! */ diff --git a/binutils/ar.c.orig b/binutils/ar.c.orig deleted file mode 100644 index 206c7a9..0000000 --- a/binutils/ar.c.orig +++ /dev/null @@ -1,1389 +0,0 @@ -/* ar.c - Archive modify and extract. - Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, - 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 - Free Software Foundation, Inc. - - This file is part of GNU Binutils. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, - MA 02110-1301, USA. */ - -/* - Bugs: GNU ar used to check file against filesystem in quick_update and - replace operations (would check mtime). Doesn't warn when name truncated. - No way to specify pos_end. Error messages should be more consistent. */ - -#include "sysdep.h" -#include "bfd.h" -#include "libiberty.h" -#include "progress.h" -#include "getopt.h" -#include "aout/ar.h" -#include "libbfd.h" -#include "bucomm.h" -#include "arsup.h" -#include "filenames.h" -#include "binemul.h" -#include "plugin.h" -#include - -#ifdef __GO32___ -#define EXT_NAME_LEN 3 /* Bufflen of addition to name if it's MS-DOS. */ -#else -#define EXT_NAME_LEN 6 /* Ditto for *NIX. */ -#endif - -/* Static declarations. */ - -static void mri_emul (void); -static const char *normalize (const char *, bfd *); -static void remove_output (void); -static void map_over_members (bfd *, void (*)(bfd *), char **, int); -static void print_contents (bfd * member); -static void delete_members (bfd *, char **files_to_delete); - -static void move_members (bfd *, char **files_to_move); -static void replace_members - (bfd *, char **files_to_replace, bfd_boolean quick); -static void print_descr (bfd * abfd); -static void write_archive (bfd *); -static int ranlib_only (const char *archname); -static int ranlib_touch (const char *archname); -static void usage (int); - -/** Globals and flags. */ - -static int mri_mode; - -/* This flag distinguishes between ar and ranlib: - 1 means this is 'ranlib'; 0 means this is 'ar'. - -1 means if we should use argv[0] to decide. */ -extern int is_ranlib; - -/* Nonzero means don't warn about creating the archive file if necessary. */ -int silent_create = 0; - -/* Nonzero means describe each action performed. */ -int verbose = 0; - -/* Nonzero means preserve dates of members when extracting them. */ -int preserve_dates = 0; - -/* Nonzero means don't replace existing members whose dates are more recent - than the corresponding files. */ -int newer_only = 0; - -/* Controls the writing of an archive symbol table (in BSD: a __.SYMDEF - member). -1 means we've been explicitly asked to not write a symbol table; - +1 means we've been explicitly asked to write it; - 0 is the default. - Traditionally, the default in BSD has been to not write the table. - However, for POSIX.2 compliance the default is now to write a symbol table - if any of the members are object files. */ -int write_armap = 0; - -/* Operate in deterministic mode: write zero for timestamps, uids, - and gids for archive members and the archive symbol table, and write - consistent file modes. */ -int deterministic = 0; - -/* Nonzero means it's the name of an existing member; position new or moved - files with respect to this one. */ -char *posname = NULL; - -/* Sez how to use `posname': pos_before means position before that member. - pos_after means position after that member. pos_end means always at end. - pos_default means default appropriately. For the latter two, `posname' - should also be zero. */ -enum pos - { - pos_default, pos_before, pos_after, pos_end - } postype = pos_default; - -enum operations - { - none = 0, del, replace, print_table, - print_files, extract, move, quick_append - } operation = none; - -static bfd ** -get_pos_bfd (bfd **, enum pos, const char *); - -/* For extract/delete only. If COUNTED_NAME_MODE is TRUE, we only - extract the COUNTED_NAME_COUNTER instance of that name. */ -static bfd_boolean counted_name_mode = 0; -static int counted_name_counter = 0; - -/* Whether to truncate names of files stored in the archive. */ -static bfd_boolean ar_truncate = FALSE; - -/* Whether to use a full file name match when searching an archive. - This is convenient for archives created by the Microsoft lib - program. */ -static bfd_boolean full_pathname = FALSE; - -/* Whether to create a "thin" archive (symbol index only -- no files). */ -static bfd_boolean make_thin_archive = FALSE; - -static int show_version = 0; - -static int show_help = 0; - -static const char *plugin_target = NULL; - -static const char *target = NULL; - -#define OPTION_PLUGIN 201 -#define OPTION_TARGET 202 - -static struct option long_options[] = -{ - {"help", no_argument, &show_help, 1}, - {"plugin", required_argument, NULL, OPTION_PLUGIN}, - {"target", required_argument, NULL, OPTION_TARGET}, - {"version", no_argument, &show_version, 1}, - {NULL, no_argument, NULL, 0} -}; - -int interactive = 0; - -static void -mri_emul (void) -{ - interactive = isatty (fileno (stdin)); - yyparse (); -} - -/* If COUNT is 0, then FUNCTION is called once on each entry. If nonzero, - COUNT is the length of the FILES chain; FUNCTION is called on each entry - whose name matches one in FILES. */ - -static void -map_over_members (bfd *arch, void (*function)(bfd *), char **files, int count) -{ - bfd *head; - int match_count; - - if (count == 0) - { - for (head = arch->archive_next; head; head = head->archive_next) - { - PROGRESS (1); - function (head); - } - return; - } - - /* This may appear to be a baroque way of accomplishing what we want. - However we have to iterate over the filenames in order to notice where - a filename is requested but does not exist in the archive. Ditto - mapping over each file each time -- we want to hack multiple - references. */ - - for (; count > 0; files++, count--) - { - bfd_boolean found = FALSE; - - match_count = 0; - for (head = arch->archive_next; head; head = head->archive_next) - { - const char * filename; - - PROGRESS (1); - filename = head->filename; - if (filename == NULL) - { - /* Some archive formats don't get the filenames filled in - until the elements are opened. */ - struct stat buf; - bfd_stat_arch_elt (head, &buf); - } - else if (bfd_is_thin_archive (arch)) - { - /* Thin archives store full pathnames. Need to normalize. */ - filename = normalize (filename, arch); - } - - if (filename != NULL - && !FILENAME_CMP (normalize (*files, arch), filename)) - { - ++match_count; - if (counted_name_mode - && match_count != counted_name_counter) - { - /* Counting, and didn't match on count; go on to the - next one. */ - continue; - } - - found = TRUE; - function (head); - } - } - - if (!found) - /* xgettext:c-format */ - fprintf (stderr, _("no entry %s in archive\n"), *files); - } -} - -bfd_boolean operation_alters_arch = FALSE; - -static void -usage (int help) -{ - FILE *s; - - s = help ? stdout : stderr; - -#if BFD_SUPPORTS_PLUGINS - /* xgettext:c-format */ - const char *command_line - = _("Usage: %s [emulation options] [-]{dmpqrstx}[abcDfilMNoPsSTuvV]" - " [--plugin ] [member-name] [count] archive-file file...\n"); - -#else - /* xgettext:c-format */ - const char *command_line - = _("Usage: %s [emulation options] [-]{dmpqrstx}[abcDfilMNoPsSTuvV]" - " [member-name] [count] archive-file file...\n"); -#endif - fprintf (s, command_line, program_name); - - /* xgettext:c-format */ - fprintf (s, _(" %s -M [ - read options from \n")); - fprintf (s, _(" --target=BFDNAME - specify the target object format as BFDNAME\n")); -#if BFD_SUPPORTS_PLUGINS - fprintf (s, _(" optional:\n")); - fprintf (s, _(" --plugin

- load the specified plugin\n")); -#endif - - ar_emul_usage (s); - - list_supported_targets (program_name, s); - - if (REPORT_BUGS_TO[0] && help) - fprintf (s, _("Report bugs to %s\n"), REPORT_BUGS_TO); - - xexit (help ? 0 : 1); -} - -static void -ranlib_usage (int help) -{ - FILE *s; - - s = help ? stdout : stderr; - - /* xgettext:c-format */ - fprintf (s, _("Usage: %s [options] archive\n"), program_name); - fprintf (s, _(" Generate an index to speed access to archives\n")); - fprintf (s, _(" The options are:\n\ - @ Read options from \n")); -#if BFD_SUPPORTS_PLUGINS - fprintf (s, _("\ - --plugin Load the specified plugin\n")); -#endif - fprintf (s, _("\ - -t Update the archive's symbol map timestamp\n\ - -h --help Print this help message\n\ - -v --version Print version information\n")); - - list_supported_targets (program_name, s); - - if (REPORT_BUGS_TO[0] && help) - fprintf (s, _("Report bugs to %s\n"), REPORT_BUGS_TO); - - xexit (help ? 0 : 1); -} - -/* Normalize a file name specified on the command line into a file - name which we will use in an archive. */ - -static const char * -normalize (const char *file, bfd *abfd) -{ - const char *filename; - - if (full_pathname) - return file; - - filename = lbasename (file); - - if (ar_truncate - && abfd != NULL - && strlen (filename) > abfd->xvec->ar_max_namelen) - { - char *s; - - /* Space leak. */ - s = (char *) xmalloc (abfd->xvec->ar_max_namelen + 1); - memcpy (s, filename, abfd->xvec->ar_max_namelen); - s[abfd->xvec->ar_max_namelen] = '\0'; - filename = s; - } - - return filename; -} - -/* Remove any output file. This is only called via xatexit. */ - -static const char *output_filename = NULL; -static FILE *output_file = NULL; -static bfd *output_bfd = NULL; - -static void -remove_output (void) -{ - if (output_filename != NULL) - { - if (output_bfd != NULL) - bfd_cache_close (output_bfd); - if (output_file != NULL) - fclose (output_file); - unlink_if_ordinary (output_filename); - } -} - -static char ** -decode_options (int argc, char **argv) -{ - int c; - - /* Convert old-style tar call by exploding option element and rearranging - options accordingly. */ - - if (argc > 1 && argv[1][0] != '-') - { - int new_argc; /* argc value for rearranged arguments */ - char **new_argv; /* argv value for rearranged arguments */ - char *const *in; /* cursor into original argv */ - char **out; /* cursor into rearranged argv */ - const char *letter; /* cursor into old option letters */ - char buffer[3]; /* constructed option buffer */ - - /* Initialize a constructed option. */ - - buffer[0] = '-'; - buffer[2] = '\0'; - - /* Allocate a new argument array, and copy program name in it. */ - - new_argc = argc - 1 + strlen (argv[1]); - new_argv = xmalloc ((new_argc + 1) * sizeof (*argv)); - in = argv; - out = new_argv; - *out++ = *in++; - - /* Copy each old letter option as a separate option. */ - - for (letter = *in++; *letter; letter++) - { - buffer[1] = *letter; - *out++ = xstrdup (buffer); - } - - /* Copy all remaining options. */ - - while (in < argv + argc) - *out++ = *in++; - *out = NULL; - - /* Replace the old option list by the new one. */ - - argc = new_argc; - argv = new_argv; - } - - while ((c = getopt_long (argc, argv, "hdmpqrtxlcoVsSuvabiMNfPTD", - long_options, NULL)) != EOF) - { - switch (c) - { - case 'd': - case 'm': - case 'p': - case 'q': - case 'r': - case 't': - case 'x': - if (operation != none) - fatal (_("two different operation options specified")); - break; - } - - switch (c) - { - case 'h': - show_help = 1; - break; - case 'd': - operation = del; - operation_alters_arch = TRUE; - break; - case 'm': - operation = move; - operation_alters_arch = TRUE; - break; - case 'p': - operation = print_files; - break; - case 'q': - operation = quick_append; - operation_alters_arch = TRUE; - break; - case 'r': - operation = replace; - operation_alters_arch = TRUE; - break; - case 't': - operation = print_table; - break; - case 'x': - operation = extract; - break; - case 'l': - break; - case 'c': - silent_create = 1; - break; - case 'o': - preserve_dates = 1; - break; - case 'V': - show_version = TRUE; - break; - case 's': - write_armap = 1; - break; - case 'S': - write_armap = -1; - break; - case 'u': - newer_only = 1; - break; - case 'v': - verbose = 1; - break; - case 'a': - postype = pos_after; - break; - case 'b': - postype = pos_before; - break; - case 'i': - postype = pos_before; - break; - case 'M': - mri_mode = 1; - break; - case 'N': - counted_name_mode = TRUE; - break; - case 'f': - ar_truncate = TRUE; - break; - case 'P': - full_pathname = TRUE; - break; - case 'T': - make_thin_archive = TRUE; - break; - case 'D': - deterministic = TRUE; - break; - case OPTION_PLUGIN: -#if BFD_SUPPORTS_PLUGINS - plugin_target = "plugin"; - bfd_plugin_set_plugin (optarg); -#else - fprintf (stderr, _("sorry - this program has been built without plugin support\n")); - xexit (1); -#endif - break; - case OPTION_TARGET: - target = optarg; - break; - case 0: /* A long option that just sets a flag. */ - break; - default: - usage (0); - } - } - - return &argv[optind]; -} - -static void -ranlib_main (int argc, char **argv) -{ - int arg_index, status = 0; - bfd_boolean touch = FALSE; - int c; - - while ((c = getopt_long (argc, argv, "hHvVt", long_options, NULL)) != EOF) - { - switch (c) - { - case 'h': - case 'H': - show_help = 1; - break; - case 't': - touch = TRUE; - break; - case 'v': - case 'V': - show_version = 1; - break; - } - } - - if (argc < 2) - ranlib_usage (0); - - if (show_help) - usage (1); - - if (show_version) - print_version ("ranlib"); - - arg_index = optind; - - while (arg_index < argc) - { - if (! touch) - status |= ranlib_only (argv[arg_index]); - else - status |= ranlib_touch (argv[arg_index]); - ++arg_index; - } - - xexit (status); -} - -int main (int, char **); - -int -main (int argc, char **argv) -{ - int arg_index; - char **files; - int file_count; - char *inarch_filename; - int i; - -#if defined (HAVE_SETLOCALE) && defined (HAVE_LC_MESSAGES) - setlocale (LC_MESSAGES, ""); -#endif -#if defined (HAVE_SETLOCALE) - setlocale (LC_CTYPE, ""); -#endif - bindtextdomain (PACKAGE, LOCALEDIR); - textdomain (PACKAGE); - - program_name = argv[0]; - xmalloc_set_program_name (program_name); -#if BFD_SUPPORTS_PLUGINS - bfd_plugin_set_program_name (program_name); -#endif - - expandargv (&argc, &argv); - - if (is_ranlib < 0) - { - const char *temp = lbasename (program_name); - - if (strlen (temp) >= 6 - && FILENAME_CMP (temp + strlen (temp) - 6, "ranlib") == 0) - is_ranlib = 1; - else - is_ranlib = 0; - } - - START_PROGRESS (program_name, 0); - - bfd_init (); - set_default_bfd_target (); - - xatexit (remove_output); - - for (i = 1; i < argc; i++) - if (! ar_emul_parse_arg (argv[i])) - break; - argv += (i - 1); - argc -= (i - 1); - - if (is_ranlib) - ranlib_main (argc, argv); - - if (argc < 2) - usage (0); - - argv = decode_options (argc, argv); - - if (show_help) - usage (1); - - if (show_version) - print_version ("ar"); - - arg_index = 0; - - if (mri_mode) - { - mri_emul (); - } - else - { - bfd *arch; - - /* We don't use do_quick_append any more. Too many systems - expect ar to always rebuild the symbol table even when q is - used. */ - - /* We can't write an armap when using ar q, so just do ar r - instead. */ - if (operation == quick_append && write_armap) - operation = replace; - - if ((operation == none || operation == print_table) - && write_armap == 1) - xexit (ranlib_only (argv[arg_index])); - - if (operation == none) - fatal (_("no operation specified")); - - if (newer_only && operation != replace) - fatal (_("`u' is only meaningful with the `r' option.")); - - if (newer_only && deterministic) - fatal (_("`u' is not meaningful with the `D' option.")); - - if (postype != pos_default) - posname = argv[arg_index++]; - - if (counted_name_mode) - { - if (operation != extract && operation != del) - fatal (_("`N' is only meaningful with the `x' and `d' options.")); - counted_name_counter = atoi (argv[arg_index++]); - if (counted_name_counter <= 0) - fatal (_("Value for `N' must be positive.")); - } - - inarch_filename = argv[arg_index++]; - - for (file_count = 0; argv[arg_index + file_count] != NULL; file_count++) - continue; - - files = (file_count > 0) ? argv + arg_index : NULL; - - arch = open_inarch (inarch_filename, - files == NULL ? (char *) NULL : files[0]); - - if (operation == extract && bfd_is_thin_archive (arch)) - fatal (_("`x' cannot be used on thin archives.")); - - switch (operation) - { - case print_table: - map_over_members (arch, print_descr, files, file_count); - break; - - case print_files: - map_over_members (arch, print_contents, files, file_count); - break; - - case extract: - map_over_members (arch, extract_file, files, file_count); - break; - - case del: - if (files != NULL) - delete_members (arch, files); - else - output_filename = NULL; - break; - - case move: - if (files != NULL) - move_members (arch, files); - else - output_filename = NULL; - break; - - case replace: - case quick_append: - if (files != NULL || write_armap > 0) - replace_members (arch, files, operation == quick_append); - else - output_filename = NULL; - break; - - /* Shouldn't happen! */ - default: - /* xgettext:c-format */ - fatal (_("internal error -- this option not implemented")); - } - } - - END_PROGRESS (program_name); - - xexit (0); - return 0; -} - -bfd * -open_inarch (const char *archive_filename, const char *file) -{ - bfd **last_one; - bfd *next_one; - struct stat sbuf; - bfd *arch; - char **matching; - - bfd_set_error (bfd_error_no_error); - - if (target == NULL) - target = plugin_target; - - if (stat (archive_filename, &sbuf) != 0) - { -#if !defined(__GO32__) || defined(__DJGPP__) - - /* FIXME: I don't understand why this fragment was ifndef'ed - away for __GO32__; perhaps it was in the days of DJGPP v1.x. - stat() works just fine in v2.x, so I think this should be - removed. For now, I enable it for DJGPP v2. -- EZ. */ - - /* KLUDGE ALERT! Temporary fix until I figger why - stat() is wrong ... think it's buried in GO32's IDT - Jax */ - if (errno != ENOENT) - bfd_fatal (archive_filename); -#endif - - if (!operation_alters_arch) - { - fprintf (stderr, "%s: ", program_name); - perror (archive_filename); - maybequit (); - return NULL; - } - - /* Try to figure out the target to use for the archive from the - first object on the list. */ - if (file != NULL) - { - bfd *obj; - - obj = bfd_openr (file, target); - if (obj != NULL) - { - if (bfd_check_format (obj, bfd_object)) - target = bfd_get_target (obj); - (void) bfd_close (obj); - } - } - - /* Create an empty archive. */ - arch = bfd_openw (archive_filename, target); - if (arch == NULL - || ! bfd_set_format (arch, bfd_archive) - || ! bfd_close (arch)) - bfd_fatal (archive_filename); - else if (!silent_create) - non_fatal (_("creating %s"), archive_filename); - - /* If we die creating a new archive, don't leave it around. */ - output_filename = archive_filename; - } - - arch = bfd_openr (archive_filename, target); - if (arch == NULL) - { - bloser: - bfd_fatal (archive_filename); - } - - if (! bfd_check_format_matches (arch, bfd_archive, &matching)) - { - bfd_nonfatal (archive_filename); - if (bfd_get_error () == bfd_error_file_ambiguously_recognized) - { - list_matching_formats (matching); - free (matching); - } - xexit (1); - } - - last_one = &(arch->archive_next); - /* Read all the contents right away, regardless. */ - for (next_one = bfd_openr_next_archived_file (arch, NULL); - next_one; - next_one = bfd_openr_next_archived_file (arch, next_one)) - { - PROGRESS (1); - *last_one = next_one; - last_one = &next_one->archive_next; - } - *last_one = (bfd *) NULL; - if (bfd_get_error () != bfd_error_no_more_archived_files) - goto bloser; - return arch; -} - -static void -print_contents (bfd *abfd) -{ - size_t ncopied = 0; - char *cbuf = (char *) xmalloc (BUFSIZE); - struct stat buf; - size_t size; - if (bfd_stat_arch_elt (abfd, &buf) != 0) - /* xgettext:c-format */ - fatal (_("internal stat error on %s"), bfd_get_filename (abfd)); - - if (verbose) - printf ("\n<%s>\n\n", bfd_get_filename (abfd)); - - bfd_seek (abfd, (file_ptr) 0, SEEK_SET); - - size = buf.st_size; - while (ncopied < size) - { - - size_t nread; - size_t tocopy = size - ncopied; - if (tocopy > BUFSIZE) - tocopy = BUFSIZE; - - nread = bfd_bread (cbuf, (bfd_size_type) tocopy, abfd); - if (nread != tocopy) - /* xgettext:c-format */ - fatal (_("%s is not a valid archive"), - bfd_get_filename (bfd_my_archive (abfd))); - - /* fwrite in mingw32 may return int instead of size_t. Cast the - return value to size_t to avoid comparison between signed and - unsigned values. */ - if ((size_t) fwrite (cbuf, 1, nread, stdout) != nread) - fatal ("stdout: %s", strerror (errno)); - ncopied += tocopy; - } - free (cbuf); -} - -/* Extract a member of the archive into its own file. - - We defer opening the new file until after we have read a BUFSIZ chunk of the - old one, since we know we have just read the archive header for the old - one. Since most members are shorter than BUFSIZ, this means we will read - the old header, read the old data, write a new inode for the new file, and - write the new data, and be done. This 'optimization' is what comes from - sitting next to a bare disk and hearing it every time it seeks. -- Gnu - Gilmore */ - -void -extract_file (bfd *abfd) -{ - FILE *ostream; - char *cbuf = (char *) xmalloc (BUFSIZE); - size_t nread, tocopy; - size_t ncopied = 0; - size_t size; - struct stat buf; - - if (bfd_stat_arch_elt (abfd, &buf) != 0) - /* xgettext:c-format */ - fatal (_("internal stat error on %s"), bfd_get_filename (abfd)); - size = buf.st_size; - - if (verbose) - printf ("x - %s\n", bfd_get_filename (abfd)); - - bfd_seek (abfd, (file_ptr) 0, SEEK_SET); - - ostream = NULL; - if (size == 0) - { - /* Seems like an abstraction violation, eh? Well it's OK! */ - output_filename = bfd_get_filename (abfd); - - ostream = fopen (bfd_get_filename (abfd), FOPEN_WB); - if (ostream == NULL) - { - perror (bfd_get_filename (abfd)); - xexit (1); - } - - output_file = ostream; - } - else - while (ncopied < size) - { - tocopy = size - ncopied; - if (tocopy > BUFSIZE) - tocopy = BUFSIZE; - - nread = bfd_bread (cbuf, (bfd_size_type) tocopy, abfd); - if (nread != tocopy) - /* xgettext:c-format */ - fatal (_("%s is not a valid archive"), - bfd_get_filename (bfd_my_archive (abfd))); - - /* See comment above; this saves disk arm motion */ - if (ostream == NULL) - { - /* Seems like an abstraction violation, eh? Well it's OK! */ - output_filename = bfd_get_filename (abfd); - - ostream = fopen (bfd_get_filename (abfd), FOPEN_WB); - if (ostream == NULL) - { - perror (bfd_get_filename (abfd)); - xexit (1); - } - - output_file = ostream; - } - - /* fwrite in mingw32 may return int instead of size_t. Cast - the return value to size_t to avoid comparison between - signed and unsigned values. */ - if ((size_t) fwrite (cbuf, 1, nread, ostream) != nread) - fatal ("%s: %s", output_filename, strerror (errno)); - ncopied += tocopy; - } - - if (ostream != NULL) - fclose (ostream); - - output_file = NULL; - output_filename = NULL; - - chmod (bfd_get_filename (abfd), buf.st_mode); - - if (preserve_dates) - { - /* Set access time to modification time. Only st_mtime is - initialized by bfd_stat_arch_elt. */ - buf.st_atime = buf.st_mtime; - set_times (bfd_get_filename (abfd), &buf); - } - - free (cbuf); -} - -static void -write_archive (bfd *iarch) -{ - bfd *obfd; - char *old_name, *new_name; - bfd *contents_head = iarch->archive_next; - - old_name = (char *) xmalloc (strlen (bfd_get_filename (iarch)) + 1); - strcpy (old_name, bfd_get_filename (iarch)); - new_name = make_tempname (old_name); - - if (new_name == NULL) - bfd_fatal ("could not create temporary file whilst writing archive"); - - output_filename = new_name; - - obfd = bfd_openw (new_name, bfd_get_target (iarch)); - - if (obfd == NULL) - bfd_fatal (old_name); - - output_bfd = obfd; - - bfd_set_format (obfd, bfd_archive); - - /* Request writing the archive symbol table unless we've - been explicitly requested not to. */ - obfd->has_armap = write_armap >= 0; - - if (ar_truncate) - { - /* This should really use bfd_set_file_flags, but that rejects - archives. */ - obfd->flags |= BFD_TRADITIONAL_FORMAT; - } - - if (deterministic) - obfd->flags |= BFD_DETERMINISTIC_OUTPUT; - - if (make_thin_archive || bfd_is_thin_archive (iarch)) - bfd_is_thin_archive (obfd) = 1; - - if (!bfd_set_archive_head (obfd, contents_head)) - bfd_fatal (old_name); - - if (!bfd_close (obfd)) - bfd_fatal (old_name); - - output_bfd = NULL; - output_filename = NULL; - - /* We don't care if this fails; we might be creating the archive. */ - bfd_close (iarch); - - if (smart_rename (new_name, old_name, 0) != 0) - xexit (1); - free (old_name); -} - -/* Return a pointer to the pointer to the entry which should be rplacd'd - into when altering. DEFAULT_POS should be how to interpret pos_default, - and should be a pos value. */ - -static bfd ** -get_pos_bfd (bfd **contents, enum pos default_pos, const char *default_posname) -{ - bfd **after_bfd = contents; - enum pos realpos; - const char *realposname; - - if (postype == pos_default) - { - realpos = default_pos; - realposname = default_posname; - } - else - { - realpos = postype; - realposname = posname; - } - - if (realpos == pos_end) - { - while (*after_bfd) - after_bfd = &((*after_bfd)->archive_next); - } - else - { - for (; *after_bfd; after_bfd = &(*after_bfd)->archive_next) - if (FILENAME_CMP ((*after_bfd)->filename, realposname) == 0) - { - if (realpos == pos_after) - after_bfd = &(*after_bfd)->archive_next; - break; - } - } - return after_bfd; -} - -static void -delete_members (bfd *arch, char **files_to_delete) -{ - bfd **current_ptr_ptr; - bfd_boolean found; - bfd_boolean something_changed = FALSE; - int match_count; - const char * tmp = NULL; - - for (; *files_to_delete != NULL; ++files_to_delete) - { - /* In a.out systems, the armap is optional. It's also called - __.SYMDEF. So if the user asked to delete it, we should remember - that fact. This isn't quite right for COFF systems (where - __.SYMDEF might be regular member), but it's very unlikely - to be a problem. FIXME */ - - if (!strcmp (*files_to_delete, "__.SYMDEF")) - { - arch->has_armap = FALSE; - write_armap = -1; - continue; - } - - found = FALSE; - match_count = 0; - current_ptr_ptr = &(arch->archive_next); - while (*current_ptr_ptr) - { - if (tmp != NULL) - free ((char *) tmp); - tmp = normalize (*files_to_delete, arch); - if (FILENAME_CMP (tmp, (*current_ptr_ptr)->filename) == 0) - { - ++match_count; - if (counted_name_mode - && match_count != counted_name_counter) - { - /* Counting, and didn't match on count; go on to the - next one. */ - } - else - { - found = TRUE; - something_changed = TRUE; - if (verbose) - printf ("d - %s\n", - *files_to_delete); - *current_ptr_ptr = ((*current_ptr_ptr)->archive_next); - goto next_file; - } - } - - current_ptr_ptr = &((*current_ptr_ptr)->archive_next); - } - - if (verbose && !found) - { - /* xgettext:c-format */ - printf (_("No member named `%s'\n"), *files_to_delete); - } - next_file: - ; - } - - if (something_changed) - write_archive (arch); - else - output_filename = NULL; - - if (tmp != NULL) - free ((char *) tmp); -} - - -/* Reposition existing members within an archive */ - -static void -move_members (bfd *arch, char **files_to_move) -{ - bfd **after_bfd; /* New entries go after this one. */ - bfd **current_ptr_ptr; /* cdr pointer into contents. */ - const char *tmp = NULL; - - for (; *files_to_move; ++files_to_move) - { - current_ptr_ptr = &(arch->archive_next); - while (*current_ptr_ptr) - { - bfd *current_ptr = *current_ptr_ptr; - - if (tmp != NULL) - free ((char *) tmp); - tmp = normalize (*files_to_move, arch); - if (FILENAME_CMP (tmp, current_ptr->filename) == 0) - { - /* Move this file to the end of the list - first cut from - where it is. */ - bfd *link_bfd; - *current_ptr_ptr = current_ptr->archive_next; - - /* Now glue to end */ - after_bfd = get_pos_bfd (&arch->archive_next, pos_end, NULL); - link_bfd = *after_bfd; - *after_bfd = current_ptr; - current_ptr->archive_next = link_bfd; - - if (verbose) - printf ("m - %s\n", *files_to_move); - - goto next_file; - } - - current_ptr_ptr = &((*current_ptr_ptr)->archive_next); - } - /* xgettext:c-format */ - fatal (_("no entry %s in archive %s!"), *files_to_move, arch->filename); - - next_file: - ; - } - - write_archive (arch); - if (tmp != NULL) - free ((char *) tmp); -} - -/* Ought to default to replacing in place, but this is existing practice! */ - -static void -replace_members (bfd *arch, char **files_to_move, bfd_boolean quick) -{ - bfd_boolean changed = FALSE; - bfd **after_bfd; /* New entries go after this one. */ - bfd *current; - bfd **current_ptr; - - while (files_to_move && *files_to_move) - { - if (! quick) - { - current_ptr = &arch->archive_next; - while (*current_ptr) - { - current = *current_ptr; - - /* For compatibility with existing ar programs, we - permit the same file to be added multiple times. */ - if (FILENAME_CMP (normalize (*files_to_move, arch), - normalize (current->filename, arch)) == 0 - && current->arelt_data != NULL) - { - if (newer_only) - { - struct stat fsbuf, asbuf; - - if (stat (*files_to_move, &fsbuf) != 0) - { - if (errno != ENOENT) - bfd_fatal (*files_to_move); - goto next_file; - } - if (bfd_stat_arch_elt (current, &asbuf) != 0) - /* xgettext:c-format */ - fatal (_("internal stat error on %s"), - current->filename); - - if (fsbuf.st_mtime <= asbuf.st_mtime) - goto next_file; - } - - after_bfd = get_pos_bfd (&arch->archive_next, pos_after, - current->filename); - if (ar_emul_replace (after_bfd, *files_to_move, - target, verbose)) - { - /* Snip out this entry from the chain. */ - *current_ptr = (*current_ptr)->archive_next; - changed = TRUE; - } - - goto next_file; - } - current_ptr = &(current->archive_next); - } - } - - /* Add to the end of the archive. */ - after_bfd = get_pos_bfd (&arch->archive_next, pos_end, NULL); - - if (ar_emul_append (after_bfd, *files_to_move, target, - verbose, make_thin_archive)) - changed = TRUE; - - next_file:; - - files_to_move++; - } - - if (changed) - write_archive (arch); - else - output_filename = NULL; -} - -static int -ranlib_only (const char *archname) -{ - bfd *arch; - - if (get_file_size (archname) < 1) - return 1; - write_armap = 1; - arch = open_inarch (archname, (char *) NULL); - if (arch == NULL) - xexit (1); - write_archive (arch); - return 0; -} - -/* Update the timestamp of the symbol map of an archive. */ - -static int -ranlib_touch (const char *archname) -{ -#ifdef __GO32__ - /* I don't think updating works on go32. */ - ranlib_only (archname); -#else - int f; - bfd *arch; - char **matching; - - if (get_file_size (archname) < 1) - return 1; - f = open (archname, O_RDWR | O_BINARY, 0); - if (f < 0) - { - bfd_set_error (bfd_error_system_call); - bfd_fatal (archname); - } - - arch = bfd_fdopenr (archname, (const char *) NULL, f); - if (arch == NULL) - bfd_fatal (archname); - if (! bfd_check_format_matches (arch, bfd_archive, &matching)) - { - bfd_nonfatal (archname); - if (bfd_get_error () == bfd_error_file_ambiguously_recognized) - { - list_matching_formats (matching); - free (matching); - } - xexit (1); - } - - if (! bfd_has_map (arch)) - /* xgettext:c-format */ - fatal (_("%s: no archive map to update"), archname); - - bfd_update_armap_timestamp (arch); - - if (! bfd_close (arch)) - bfd_fatal (archname); -#endif - return 0; -} - -/* Things which are interesting to map over all or some of the files: */ - -static void -print_descr (bfd *abfd) -{ - print_arelt_descr (stdout, abfd, verbose); -} diff --git a/binutils/arlex.c b/binutils/arlex.c new file mode 100644 index 0000000..297b6ed --- /dev/null +++ b/binutils/arlex.c @@ -0,0 +1,2035 @@ + +#line 3 "arlex.c" + +#define YY_INT_ALIGNED short int + +/* A lexical scanner generated by flex */ + +#define FLEX_SCANNER +#define YY_FLEX_MAJOR_VERSION 2 +#define YY_FLEX_MINOR_VERSION 5 +#define YY_FLEX_SUBMINOR_VERSION 35 +#if YY_FLEX_SUBMINOR_VERSION > 0 +#define FLEX_BETA +#endif + +/* First, we deal with platform-specific or compiler-specific issues. */ + +/* begin standard C headers. */ +#include +#include +#include +#include + +/* end standard C headers. */ + +/* flex integer type definitions */ + +#ifndef FLEXINT_H +#define FLEXINT_H + +/* C99 systems have . Non-C99 systems may or may not. */ + +#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L + +/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, + * if you want the limit (max/min) macros for int types. + */ +#ifndef __STDC_LIMIT_MACROS +#define __STDC_LIMIT_MACROS 1 +#endif + +#include +typedef int8_t flex_int8_t; +typedef uint8_t flex_uint8_t; +typedef int16_t flex_int16_t; +typedef uint16_t flex_uint16_t; +typedef int32_t flex_int32_t; +typedef uint32_t flex_uint32_t; +#else +typedef signed char flex_int8_t; +typedef short int flex_int16_t; +typedef int flex_int32_t; +typedef unsigned char flex_uint8_t; +typedef unsigned short int flex_uint16_t; +typedef unsigned int flex_uint32_t; +#endif /* ! C99 */ + +/* Limits of integral types. */ +#ifndef INT8_MIN +#define INT8_MIN (-128) +#endif +#ifndef INT16_MIN +#define INT16_MIN (-32767-1) +#endif +#ifndef INT32_MIN +#define INT32_MIN (-2147483647-1) +#endif +#ifndef INT8_MAX +#define INT8_MAX (127) +#endif +#ifndef INT16_MAX +#define INT16_MAX (32767) +#endif +#ifndef INT32_MAX +#define INT32_MAX (2147483647) +#endif +#ifndef UINT8_MAX +#define UINT8_MAX (255U) +#endif +#ifndef UINT16_MAX +#define UINT16_MAX (65535U) +#endif +#ifndef UINT32_MAX +#define UINT32_MAX (4294967295U) +#endif + +#endif /* ! FLEXINT_H */ + +#ifdef __cplusplus + +/* The "const" storage-class-modifier is valid. */ +#define YY_USE_CONST + +#else /* ! __cplusplus */ + +/* C99 requires __STDC__ to be defined as 1. */ +#if defined (__STDC__) + +#define YY_USE_CONST + +#endif /* defined (__STDC__) */ +#endif /* ! __cplusplus */ + +#ifdef YY_USE_CONST +#define yyconst const +#else +#define yyconst +#endif + +/* Returned upon end-of-file. */ +#define YY_NULL 0 + +/* Promotes a possibly negative, possibly signed char to an unsigned + * integer for use as an array index. If the signed char is negative, + * we want to instead treat it as an 8-bit unsigned char, hence the + * double cast. + */ +#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) + +/* Enter a start condition. This macro really ought to take a parameter, + * but we do it the disgusting crufty way forced on us by the ()-less + * definition of BEGIN. + */ +#define BEGIN (yy_start) = 1 + 2 * + +/* Translate the current start state into a value that can be later handed + * to BEGIN to return to the state. The YYSTATE alias is for lex + * compatibility. + */ +#define YY_START (((yy_start) - 1) / 2) +#define YYSTATE YY_START + +/* Action number for EOF rule of a given start state. */ +#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) + +/* Special action meaning "start processing a new file". */ +#define YY_NEW_FILE yyrestart(yyin ) + +#define YY_END_OF_BUFFER_CHAR 0 + +/* Size of default input buffer. */ +#ifndef YY_BUF_SIZE +#define YY_BUF_SIZE 16384 +#endif + +/* The state buf must be large enough to hold one state per character in the main buffer. + */ +#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) + +#ifndef YY_TYPEDEF_YY_BUFFER_STATE +#define YY_TYPEDEF_YY_BUFFER_STATE +typedef struct yy_buffer_state *YY_BUFFER_STATE; +#endif + +#ifndef YY_TYPEDEF_YY_SIZE_T +#define YY_TYPEDEF_YY_SIZE_T +typedef size_t yy_size_t; +#endif + +extern yy_size_t yyleng; + +extern FILE *yyin, *yyout; + +#define EOB_ACT_CONTINUE_SCAN 0 +#define EOB_ACT_END_OF_FILE 1 +#define EOB_ACT_LAST_MATCH 2 + + #define YY_LESS_LINENO(n) + +/* Return all but the first "n" matched characters back to the input stream. */ +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + *yy_cp = (yy_hold_char); \ + YY_RESTORE_YY_MORE_OFFSET \ + (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ + YY_DO_BEFORE_ACTION; /* set up yytext again */ \ + } \ + while ( 0 ) + +#define unput(c) yyunput( c, (yytext_ptr) ) + +#ifndef YY_STRUCT_YY_BUFFER_STATE +#define YY_STRUCT_YY_BUFFER_STATE +struct yy_buffer_state + { + FILE *yy_input_file; + + char *yy_ch_buf; /* input buffer */ + char *yy_buf_pos; /* current position in input buffer */ + + /* Size of input buffer in bytes, not including room for EOB + * characters. + */ + yy_size_t yy_buf_size; + + /* Number of characters read into yy_ch_buf, not including EOB + * characters. + */ + yy_size_t yy_n_chars; + + /* Whether we "own" the buffer - i.e., we know we created it, + * and can realloc() it to grow it, and should free() it to + * delete it. + */ + int yy_is_our_buffer; + + /* Whether this is an "interactive" input source; if so, and + * if we're using stdio for input, then we want to use getc() + * instead of fread(), to make sure we stop fetching input after + * each newline. + */ + int yy_is_interactive; + + /* Whether we're considered to be at the beginning of a line. + * If so, '^' rules will be active on the next match, otherwise + * not. + */ + int yy_at_bol; + + int yy_bs_lineno; /**< The line count. */ + int yy_bs_column; /**< The column count. */ + + /* Whether to try to fill the input buffer when we reach the + * end of it. + */ + int yy_fill_buffer; + + int yy_buffer_status; + +#define YY_BUFFER_NEW 0 +#define YY_BUFFER_NORMAL 1 + /* When an EOF's been seen but there's still some text to process + * then we mark the buffer as YY_EOF_PENDING, to indicate that we + * shouldn't try reading from the input source any more. We might + * still have a bunch of tokens to match, though, because of + * possible backing-up. + * + * When we actually see the EOF, we change the status to "new" + * (via yyrestart()), so that the user can continue scanning by + * just pointing yyin at a new input file. + */ +#define YY_BUFFER_EOF_PENDING 2 + + }; +#endif /* !YY_STRUCT_YY_BUFFER_STATE */ + +/* Stack of input buffers. */ +static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ +static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ +static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ + +/* We provide macros for accessing buffer states in case in the + * future we want to put the buffer states in a more general + * "scanner state". + * + * Returns the top of the stack, or NULL. + */ +#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ + ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ + : NULL) + +/* Same as previous macro, but useful when we know that the buffer stack is not + * NULL or when we need an lvalue. For internal use only. + */ +#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] + +/* yy_hold_char holds the character lost when yytext is formed. */ +static char yy_hold_char; +static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */ +yy_size_t yyleng; + +/* Points to current character in buffer. */ +static char *yy_c_buf_p = (char *) 0; +static int yy_init = 0; /* whether we need to initialize */ +static int yy_start = 0; /* start state number */ + +/* Flag which is used to allow yywrap()'s to do buffer switches + * instead of setting up a fresh yyin. A bit of a hack ... + */ +static int yy_did_buffer_switch_on_eof; + +void yyrestart (FILE *input_file ); +void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ); +YY_BUFFER_STATE yy_create_buffer (FILE *file,int size ); +void yy_delete_buffer (YY_BUFFER_STATE b ); +void yy_flush_buffer (YY_BUFFER_STATE b ); +void yypush_buffer_state (YY_BUFFER_STATE new_buffer ); +void yypop_buffer_state (void ); + +static void yyensure_buffer_stack (void ); +static void yy_load_buffer_state (void ); +static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file ); + +#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER ) + +YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size ); +YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str ); +YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,yy_size_t len ); + +void *yyalloc (yy_size_t ); +void *yyrealloc (void *,yy_size_t ); +void yyfree (void * ); + +#define yy_new_buffer yy_create_buffer + +#define yy_set_interactive(is_interactive) \ + { \ + if ( ! YY_CURRENT_BUFFER ){ \ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer(yyin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ + } + +#define yy_set_bol(at_bol) \ + { \ + if ( ! YY_CURRENT_BUFFER ){\ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer(yyin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ + } + +#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) + +/* Begin user sect3 */ + +typedef unsigned char YY_CHAR; + +FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0; + +typedef int yy_state_type; + +extern int yylineno; + +int yylineno = 1; + +extern char *yytext; +#define yytext_ptr yytext + +static yy_state_type yy_get_previous_state (void ); +static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); +static int yy_get_next_buffer (void ); +static void yy_fatal_error (yyconst char msg[] ); + +/* Done after the current pattern has been matched and before the + * corresponding action - sets up yytext. + */ +#define YY_DO_BEFORE_ACTION \ + (yytext_ptr) = yy_bp; \ + yyleng = (size_t) (yy_cp - yy_bp); \ + (yy_hold_char) = *yy_cp; \ + *yy_cp = '\0'; \ + (yy_c_buf_p) = yy_cp; + +#define YY_NUM_RULES 40 +#define YY_END_OF_BUFFER 41 +/* This struct is not used in this scanner, + but its presence is necessary. */ +struct yy_trans_info + { + flex_int32_t yy_verify; + flex_int32_t yy_nxt; + }; +static yyconst flex_int16_t yy_accept[177] = + { 0, + 0, 0, 41, 40, 39, 38, 35, 32, 33, 36, + 40, 34, 37, 35, 35, 35, 35, 35, 35, 35, + 35, 35, 35, 35, 35, 35, 35, 35, 35, 35, + 35, 35, 35, 35, 35, 35, 36, 31, 37, 35, + 35, 35, 35, 35, 35, 35, 35, 35, 35, 35, + 35, 35, 35, 35, 35, 35, 35, 35, 35, 35, + 35, 35, 35, 35, 35, 35, 35, 35, 35, 35, + 35, 35, 7, 35, 35, 35, 35, 35, 35, 35, + 35, 35, 35, 35, 35, 35, 22, 35, 35, 35, + 35, 35, 35, 35, 35, 35, 35, 35, 35, 35, + + 35, 35, 35, 10, 11, 12, 35, 15, 35, 35, + 35, 35, 35, 35, 35, 35, 35, 25, 26, 27, + 35, 30, 35, 35, 35, 3, 35, 35, 35, 35, + 35, 35, 35, 35, 35, 18, 35, 35, 35, 35, + 35, 35, 35, 1, 2, 4, 5, 35, 35, 35, + 35, 35, 16, 17, 19, 20, 35, 35, 35, 35, + 35, 35, 8, 9, 13, 14, 35, 23, 24, 28, + 29, 35, 35, 6, 21, 0 + } ; + +static yyconst flex_int32_t yy_ec[256] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 3, 1, 1, 1, 4, 1, 1, 1, 5, + 6, 7, 8, 9, 4, 4, 4, 4, 4, 4, + 4, 4, 4, 4, 4, 4, 4, 4, 10, 1, + 1, 1, 1, 1, 11, 12, 13, 14, 15, 16, + 4, 17, 18, 4, 4, 19, 20, 21, 22, 23, + 4, 24, 25, 26, 27, 28, 4, 29, 30, 4, + 1, 4, 1, 1, 4, 1, 31, 32, 33, 34, + + 35, 36, 4, 37, 38, 4, 4, 39, 40, 41, + 42, 43, 4, 44, 45, 46, 47, 48, 4, 49, + 50, 4, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1 + } ; + +static yyconst flex_int32_t yy_meta[51] = + { 0, + 1, 2, 1, 3, 1, 1, 1, 1, 1, 1, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 + } ; + +static yyconst flex_int16_t yy_base[180] = + { 0, + 0, 0, 193, 194, 194, 194, 0, 194, 194, 0, + 190, 194, 0, 177, 32, 37, 32, 163, 174, 170, + 164, 171, 174, 169, 149, 15, 22, 17, 135, 146, + 142, 136, 143, 146, 141, 0, 0, 194, 0, 161, + 159, 158, 153, 147, 156, 143, 149, 148, 141, 150, + 141, 135, 138, 127, 125, 124, 119, 113, 122, 109, + 115, 114, 107, 116, 107, 101, 104, 43, 136, 135, + 130, 129, 0, 119, 123, 118, 114, 118, 119, 122, + 124, 25, 104, 103, 98, 97, 0, 87, 91, 86, + 82, 86, 87, 90, 92, 105, 100, 97, 94, 93, + + 105, 106, 102, 0, 0, 0, 104, 0, 92, 75, + 70, 67, 64, 63, 75, 76, 72, 0, 0, 0, + 74, 0, 62, 91, 88, 0, 86, 85, 73, 85, + 79, 83, 70, 62, 59, 0, 57, 56, 44, 56, + 50, 54, 41, 0, 0, 0, 0, 63, 58, 59, + 67, 66, 0, 0, 0, 0, 38, 33, 34, 42, + 41, 51, 0, 0, 0, 0, 30, 0, 0, 0, + 0, 43, 21, 0, 0, 194, 65, 66, 69 + } ; + +static yyconst flex_int16_t yy_def[180] = + { 0, + 176, 1, 176, 176, 176, 176, 177, 176, 176, 178, + 176, 176, 179, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 178, 176, 179, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 177, 0, 176, 176, 176 + } ; + +static yyconst flex_int16_t yy_nxt[245] = + { 0, + 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, + 14, 7, 15, 16, 17, 18, 19, 7, 20, 7, + 7, 21, 7, 22, 23, 7, 7, 24, 7, 7, + 25, 7, 26, 27, 28, 29, 30, 7, 31, 7, + 7, 32, 7, 33, 34, 7, 7, 35, 7, 7, + 41, 43, 45, 55, 44, 42, 57, 59, 56, 58, + 46, 96, 97, 110, 111, 60, 37, 36, 37, 39, + 175, 39, 174, 173, 172, 171, 170, 169, 168, 167, + 166, 165, 164, 163, 162, 161, 160, 159, 158, 157, + 156, 155, 154, 153, 152, 151, 150, 149, 148, 147, + + 146, 145, 144, 143, 142, 141, 140, 139, 138, 137, + 136, 135, 134, 133, 132, 131, 130, 129, 128, 127, + 126, 125, 124, 123, 122, 121, 120, 119, 118, 117, + 116, 115, 114, 113, 112, 109, 108, 107, 106, 105, + 104, 103, 102, 101, 100, 99, 98, 95, 94, 93, + 92, 91, 90, 89, 88, 87, 86, 85, 84, 83, + 82, 81, 80, 79, 78, 77, 76, 75, 74, 73, + 72, 71, 70, 69, 68, 67, 66, 65, 64, 63, + 62, 61, 54, 53, 52, 51, 50, 49, 48, 47, + 40, 38, 176, 3, 176, 176, 176, 176, 176, 176, + + 176, 176, 176, 176, 176, 176, 176, 176, 176, 176, + 176, 176, 176, 176, 176, 176, 176, 176, 176, 176, + 176, 176, 176, 176, 176, 176, 176, 176, 176, 176, + 176, 176, 176, 176, 176, 176, 176, 176, 176, 176, + 176, 176, 176, 176 + } ; + +static yyconst flex_int16_t yy_chk[245] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 15, 16, 17, 26, 16, 15, 27, 28, 26, 27, + 17, 68, 68, 82, 82, 28, 178, 177, 178, 179, + 173, 179, 172, 167, 162, 161, 160, 159, 158, 157, + 152, 151, 150, 149, 148, 143, 142, 141, 140, 139, + 138, 137, 135, 134, 133, 132, 131, 130, 129, 128, + + 127, 125, 124, 123, 121, 117, 116, 115, 114, 113, + 112, 111, 110, 109, 107, 103, 102, 101, 100, 99, + 98, 97, 96, 95, 94, 93, 92, 91, 90, 89, + 88, 86, 85, 84, 83, 81, 80, 79, 78, 77, + 76, 75, 74, 72, 71, 70, 69, 67, 66, 65, + 64, 63, 62, 61, 60, 59, 58, 57, 56, 55, + 54, 53, 52, 51, 50, 49, 48, 47, 46, 45, + 44, 43, 42, 41, 40, 35, 34, 33, 32, 31, + 30, 29, 25, 24, 23, 22, 21, 20, 19, 18, + 14, 11, 3, 176, 176, 176, 176, 176, 176, 176, + + 176, 176, 176, 176, 176, 176, 176, 176, 176, 176, + 176, 176, 176, 176, 176, 176, 176, 176, 176, 176, + 176, 176, 176, 176, 176, 176, 176, 176, 176, 176, + 176, 176, 176, 176, 176, 176, 176, 176, 176, 176, + 176, 176, 176, 176 + } ; + +static yy_state_type yy_last_accepting_state; +static char *yy_last_accepting_cpos; + +extern int yy_flex_debug; +int yy_flex_debug = 0; + +/* The intent behind this definition is that it'll catch + * any uses of REJECT which flex missed. + */ +#define REJECT reject_used_but_not_detected +#define yymore() yymore_used_but_not_detected +#define YY_MORE_ADJ 0 +#define YY_RESTORE_YY_MORE_OFFSET +char *yytext; +#line 1 "arlex.l" +#define YY_NO_INPUT 1 +#line 4 "arlex.l" +/* arlex.l - Strange script language lexer */ + +/* Copyright 1992, 1997, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2011 + Free Software Foundation, Inc. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + + +/* Contributed by Steve Chamberlain . */ + +#define DONTDECLARE_MALLOC +#include "ansidecl.h" +#include "libiberty.h" +#include "arparse.h" + +#ifndef YY_NO_UNPUT +#define YY_NO_UNPUT +#endif + +extern int yylex (void); + +int linenumber; +#line 598 "arlex.c" + +#define INITIAL 0 + +#ifndef YY_NO_UNISTD_H +/* Special case for "unistd.h", since it is non-ANSI. We include it way + * down here because we want the user's section 1 to have been scanned first. + * The user has a chance to override it with an option. + */ +#include +#endif + +#ifndef YY_EXTRA_TYPE +#define YY_EXTRA_TYPE void * +#endif + +static int yy_init_globals (void ); + +/* Accessor methods to globals. + These are made visible to non-reentrant scanners for convenience. */ + +int yylex_destroy (void ); + +int yyget_debug (void ); + +void yyset_debug (int debug_flag ); + +YY_EXTRA_TYPE yyget_extra (void ); + +void yyset_extra (YY_EXTRA_TYPE user_defined ); + +FILE *yyget_in (void ); + +void yyset_in (FILE * in_str ); + +FILE *yyget_out (void ); + +void yyset_out (FILE * out_str ); + +yy_size_t yyget_leng (void ); + +char *yyget_text (void ); + +int yyget_lineno (void ); + +void yyset_lineno (int line_number ); + +/* Macros after this point can all be overridden by user definitions in + * section 1. + */ + +#ifndef YY_SKIP_YYWRAP +#ifdef __cplusplus +extern "C" int yywrap (void ); +#else +extern int yywrap (void ); +#endif +#endif + +#ifndef yytext_ptr +static void yy_flex_strncpy (char *,yyconst char *,int ); +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * ); +#endif + +#ifndef YY_NO_INPUT + +#ifdef __cplusplus +static int yyinput (void ); +#else +static int input (void ); +#endif + +#endif + +/* Amount of stuff to slurp up with each read. */ +#ifndef YY_READ_BUF_SIZE +#define YY_READ_BUF_SIZE 8192 +#endif + +/* Copy whatever the last rule matched to the standard output. */ +#ifndef ECHO +/* This used to be an fputs(), but since the string might contain NUL's, + * we now use fwrite(). + */ +#define ECHO fwrite( yytext, yyleng, 1, yyout ) +#endif + +/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, + * is returned in "result". + */ +#ifndef YY_INPUT +#define YY_INPUT(buf,result,max_size) \ + if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ + { \ + int c = '*'; \ + yy_size_t n; \ + for ( n = 0; n < max_size && \ + (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ + buf[n] = (char) c; \ + if ( c == '\n' ) \ + buf[n++] = (char) c; \ + if ( c == EOF && ferror( yyin ) ) \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + result = n; \ + } \ + else \ + { \ + errno=0; \ + while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ + { \ + if( errno != EINTR) \ + { \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + break; \ + } \ + errno=0; \ + clearerr(yyin); \ + } \ + }\ +\ + +#endif + +/* No semi-colon after return; correct usage is to write "yyterminate();" - + * we don't want an extra ';' after the "return" because that will cause + * some compilers to complain about unreachable statements. + */ +#ifndef yyterminate +#define yyterminate() return YY_NULL +#endif + +/* Number of entries by which start-condition stack grows. */ +#ifndef YY_START_STACK_INCR +#define YY_START_STACK_INCR 25 +#endif + +/* Report a fatal error. */ +#ifndef YY_FATAL_ERROR +#define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) +#endif + +/* end tables serialization structures and prototypes */ + +/* Default declaration of generated scanner - a define so the user can + * easily add parameters. + */ +#ifndef YY_DECL +#define YY_DECL_IS_OURS 1 + +extern int yylex (void); + +#define YY_DECL int yylex (void) +#endif /* !YY_DECL */ + +/* Code executed at the beginning of each rule, after yytext and yyleng + * have been set up. + */ +#ifndef YY_USER_ACTION +#define YY_USER_ACTION +#endif + +/* Code executed at the end of each rule. */ +#ifndef YY_BREAK +#define YY_BREAK break; +#endif + +#define YY_RULE_SETUP \ + YY_USER_ACTION + +/** The main scanner function which does all the work. + */ +YY_DECL +{ + register yy_state_type yy_current_state; + register char *yy_cp, *yy_bp; + register int yy_act; + +#line 46 "arlex.l" + + +#line 781 "arlex.c" + + if ( !(yy_init) ) + { + (yy_init) = 1; + +#ifdef YY_USER_INIT + YY_USER_INIT; +#endif + + if ( ! (yy_start) ) + (yy_start) = 1; /* first start state */ + + if ( ! yyin ) + yyin = stdin; + + if ( ! yyout ) + yyout = stdout; + + if ( ! YY_CURRENT_BUFFER ) { + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer(yyin,YY_BUF_SIZE ); + } + + yy_load_buffer_state( ); + } + + while ( 1 ) /* loops until end-of-file is reached */ + { + yy_cp = (yy_c_buf_p); + + /* Support of yytext. */ + *yy_cp = (yy_hold_char); + + /* yy_bp points to the position in yy_ch_buf of the start of + * the current run. + */ + yy_bp = yy_cp; + + yy_current_state = (yy_start); +yy_match: + do + { + register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)]; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 177 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + ++yy_cp; + } + while ( yy_base[yy_current_state] != 194 ); + +yy_find_action: + yy_act = yy_accept[yy_current_state]; + if ( yy_act == 0 ) + { /* have to back up */ + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + yy_act = yy_accept[yy_current_state]; + } + + YY_DO_BEFORE_ACTION; + +do_action: /* This label is used only to access EOF actions. */ + + switch ( yy_act ) + { /* beginning of action switch */ + case 0: /* must back up */ + /* undo the effects of YY_DO_BEFORE_ACTION */ + *yy_cp = (yy_hold_char); + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + goto yy_find_action; + +case 1: +YY_RULE_SETUP +#line 48 "arlex.l" +{ return ADDLIB; } + YY_BREAK +case 2: +YY_RULE_SETUP +#line 49 "arlex.l" +{ return ADDMOD; } + YY_BREAK +case 3: +YY_RULE_SETUP +#line 50 "arlex.l" +{ return CLEAR; } + YY_BREAK +case 4: +YY_RULE_SETUP +#line 51 "arlex.l" +{ return CREATE; } + YY_BREAK +case 5: +YY_RULE_SETUP +#line 52 "arlex.l" +{ return DELETE; } + YY_BREAK +case 6: +YY_RULE_SETUP +#line 53 "arlex.l" +{ return DIRECTORY; } + YY_BREAK +case 7: +YY_RULE_SETUP +#line 54 "arlex.l" +{ return END; } + YY_BREAK +case 8: +YY_RULE_SETUP +#line 55 "arlex.l" +{ return EXTRACT; } + YY_BREAK +case 9: +YY_RULE_SETUP +#line 56 "arlex.l" +{ return FULLDIR; } + YY_BREAK +case 10: +YY_RULE_SETUP +#line 57 "arlex.l" +{ return HELP; } + YY_BREAK +case 11: +YY_RULE_SETUP +#line 58 "arlex.l" +{ return LIST; } + YY_BREAK +case 12: +YY_RULE_SETUP +#line 59 "arlex.l" +{ return OPEN; } + YY_BREAK +case 13: +YY_RULE_SETUP +#line 60 "arlex.l" +{ return REPLACE; } + YY_BREAK +case 14: +YY_RULE_SETUP +#line 61 "arlex.l" +{ return VERBOSE; } + YY_BREAK +case 15: +YY_RULE_SETUP +#line 62 "arlex.l" +{ return SAVE; } + YY_BREAK +case 16: +YY_RULE_SETUP +#line 63 "arlex.l" +{ return ADDLIB; } + YY_BREAK +case 17: +YY_RULE_SETUP +#line 64 "arlex.l" +{ return ADDMOD; } + YY_BREAK +case 18: +YY_RULE_SETUP +#line 65 "arlex.l" +{ return CLEAR; } + YY_BREAK +case 19: +YY_RULE_SETUP +#line 66 "arlex.l" +{ return CREATE; } + YY_BREAK +case 20: +YY_RULE_SETUP +#line 67 "arlex.l" +{ return DELETE; } + YY_BREAK +case 21: +YY_RULE_SETUP +#line 68 "arlex.l" +{ return DIRECTORY; } + YY_BREAK +case 22: +YY_RULE_SETUP +#line 69 "arlex.l" +{ return END; } + YY_BREAK +case 23: +YY_RULE_SETUP +#line 70 "arlex.l" +{ return EXTRACT; } + YY_BREAK +case 24: +YY_RULE_SETUP +#line 71 "arlex.l" +{ return FULLDIR; } + YY_BREAK +case 25: +YY_RULE_SETUP +#line 72 "arlex.l" +{ return HELP; } + YY_BREAK +case 26: +YY_RULE_SETUP +#line 73 "arlex.l" +{ return LIST; } + YY_BREAK +case 27: +YY_RULE_SETUP +#line 74 "arlex.l" +{ return OPEN; } + YY_BREAK +case 28: +YY_RULE_SETUP +#line 75 "arlex.l" +{ return REPLACE; } + YY_BREAK +case 29: +YY_RULE_SETUP +#line 76 "arlex.l" +{ return VERBOSE; } + YY_BREAK +case 30: +YY_RULE_SETUP +#line 77 "arlex.l" +{ return SAVE; } + YY_BREAK +case 31: +/* rule 31 can match eol */ +YY_RULE_SETUP +#line 78 "arlex.l" +{ linenumber ++; } + YY_BREAK +case 32: +YY_RULE_SETUP +#line 79 "arlex.l" +{ return '('; } + YY_BREAK +case 33: +YY_RULE_SETUP +#line 80 "arlex.l" +{ return ')'; } + YY_BREAK +case 34: +YY_RULE_SETUP +#line 81 "arlex.l" +{ return ','; } + YY_BREAK +case 35: +YY_RULE_SETUP +#line 82 "arlex.l" +{ + yylval.name = xstrdup (yytext); + return FILENAME; + } + YY_BREAK +case 36: +YY_RULE_SETUP +#line 86 "arlex.l" +{ } + YY_BREAK +case 37: +YY_RULE_SETUP +#line 87 "arlex.l" +{ } + YY_BREAK +case 38: +YY_RULE_SETUP +#line 88 "arlex.l" +{ } + YY_BREAK +case 39: +/* rule 39 can match eol */ +YY_RULE_SETUP +#line 89 "arlex.l" +{ linenumber ++; return NEWLINE; } + YY_BREAK +case 40: +YY_RULE_SETUP +#line 91 "arlex.l" +ECHO; + YY_BREAK +#line 1069 "arlex.c" +case YY_STATE_EOF(INITIAL): + yyterminate(); + + case YY_END_OF_BUFFER: + { + /* Amount of text matched not including the EOB char. */ + int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; + + /* Undo the effects of YY_DO_BEFORE_ACTION. */ + *yy_cp = (yy_hold_char); + YY_RESTORE_YY_MORE_OFFSET + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) + { + /* We're scanning a new file or input source. It's + * possible that this happened because the user + * just pointed yyin at a new source and called + * yylex(). If so, then we have to assure + * consistency between YY_CURRENT_BUFFER and our + * globals. Here is the right place to do so, because + * this is the first action (other than possibly a + * back-up) that will match for the new input source. + */ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; + } + + /* Note that here we test for yy_c_buf_p "<=" to the position + * of the first EOB in the buffer, since yy_c_buf_p will + * already have been incremented past the NUL character + * (since all states make transitions on EOB to the + * end-of-buffer state). Contrast this with the test + * in input(). + */ + if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + { /* This was really a NUL. */ + yy_state_type yy_next_state; + + (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + /* Okay, we're now positioned to make the NUL + * transition. We couldn't have + * yy_get_previous_state() go ahead and do it + * for us because it doesn't know how to deal + * with the possibility of jamming (and we don't + * want to build jamming into it because then it + * will run more slowly). + */ + + yy_next_state = yy_try_NUL_trans( yy_current_state ); + + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + + if ( yy_next_state ) + { + /* Consume the NUL. */ + yy_cp = ++(yy_c_buf_p); + yy_current_state = yy_next_state; + goto yy_match; + } + + else + { + yy_cp = (yy_c_buf_p); + goto yy_find_action; + } + } + + else switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_END_OF_FILE: + { + (yy_did_buffer_switch_on_eof) = 0; + + if ( yywrap( ) ) + { + /* Note: because we've taken care in + * yy_get_next_buffer() to have set up + * yytext, we can now set up + * yy_c_buf_p so that if some total + * hoser (like flex itself) wants to + * call the scanner after we return the + * YY_NULL, it'll still work - another + * YY_NULL will get returned. + */ + (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; + + yy_act = YY_STATE_EOF(YY_START); + goto do_action; + } + + else + { + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; + } + break; + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = + (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_match; + + case EOB_ACT_LAST_MATCH: + (yy_c_buf_p) = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_find_action; + } + break; + } + + default: + YY_FATAL_ERROR( + "fatal flex scanner internal error--no action found" ); + } /* end of action switch */ + } /* end of scanning one token */ +} /* end of yylex */ + +/* yy_get_next_buffer - try to read in a new buffer + * + * Returns a code representing an action: + * EOB_ACT_LAST_MATCH - + * EOB_ACT_CONTINUE_SCAN - continue scanning from current position + * EOB_ACT_END_OF_FILE - end of file + */ +static int yy_get_next_buffer (void) +{ + register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; + register char *source = (yytext_ptr); + register int number_to_move, i; + int ret_val; + + if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) + YY_FATAL_ERROR( + "fatal flex scanner internal error--end of buffer missed" ); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) + { /* Don't try to fill the buffer, so this is an EOF. */ + if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) + { + /* We matched a single character, the EOB, so + * treat this as a final EOF. + */ + return EOB_ACT_END_OF_FILE; + } + + else + { + /* We matched some text prior to the EOB, first + * process it. + */ + return EOB_ACT_LAST_MATCH; + } + } + + /* Try to read more data. */ + + /* First move last chars to start of buffer. */ + number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; + + for ( i = 0; i < number_to_move; ++i ) + *(dest++) = *(source++); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) + /* don't do the read, it's not guaranteed to return an EOF, + * just force an EOF + */ + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; + + else + { + yy_size_t num_to_read = + YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; + + while ( num_to_read <= 0 ) + { /* Not enough room in the buffer - grow it. */ + + /* just a shorter name for the current buffer */ + YY_BUFFER_STATE b = YY_CURRENT_BUFFER; + + int yy_c_buf_p_offset = + (int) ((yy_c_buf_p) - b->yy_ch_buf); + + if ( b->yy_is_our_buffer ) + { + yy_size_t new_size = b->yy_buf_size * 2; + + if ( new_size <= 0 ) + b->yy_buf_size += b->yy_buf_size / 8; + else + b->yy_buf_size *= 2; + + b->yy_ch_buf = (char *) + /* Include room in for 2 EOB chars. */ + yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); + } + else + /* Can't grow it, we don't own it. */ + b->yy_ch_buf = 0; + + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( + "fatal error - scanner input buffer overflow" ); + + (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; + + num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - + number_to_move - 1; + + } + + if ( num_to_read > YY_READ_BUF_SIZE ) + num_to_read = YY_READ_BUF_SIZE; + + /* Read in more data. */ + YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), + (yy_n_chars), num_to_read ); + + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + if ( (yy_n_chars) == 0 ) + { + if ( number_to_move == YY_MORE_ADJ ) + { + ret_val = EOB_ACT_END_OF_FILE; + yyrestart(yyin ); + } + + else + { + ret_val = EOB_ACT_LAST_MATCH; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = + YY_BUFFER_EOF_PENDING; + } + } + + else + ret_val = EOB_ACT_CONTINUE_SCAN; + + if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { + /* Extend the array by 50%, plus the number we really need. */ + yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); + if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); + } + + (yy_n_chars) += number_to_move; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; + + (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; + + return ret_val; +} + +/* yy_get_previous_state - get the state just before the EOB char was reached */ + + static yy_state_type yy_get_previous_state (void) +{ + register yy_state_type yy_current_state; + register char *yy_cp; + + yy_current_state = (yy_start); + + for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) + { + register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1); + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 177 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + } + + return yy_current_state; +} + +/* yy_try_NUL_trans - try to make a transition on the NUL character + * + * synopsis + * next_state = yy_try_NUL_trans( current_state ); + */ + static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) +{ + register int yy_is_jam; + register char *yy_cp = (yy_c_buf_p); + + register YY_CHAR yy_c = 1; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 177 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + yy_is_jam = (yy_current_state == 176); + + return yy_is_jam ? 0 : yy_current_state; +} + +#ifndef YY_NO_INPUT +#ifdef __cplusplus + static int yyinput (void) +#else + static int input (void) +#endif + +{ + int c; + + *(yy_c_buf_p) = (yy_hold_char); + + if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) + { + /* yy_c_buf_p now points to the character we want to return. + * If this occurs *before* the EOB characters, then it's a + * valid NUL; if not, then we've hit the end of the buffer. + */ + if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + /* This was really a NUL. */ + *(yy_c_buf_p) = '\0'; + + else + { /* need more input */ + yy_size_t offset = (yy_c_buf_p) - (yytext_ptr); + ++(yy_c_buf_p); + + switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_LAST_MATCH: + /* This happens because yy_g_n_b() + * sees that we've accumulated a + * token and flags that we need to + * try matching the token before + * proceeding. But for input(), + * there's no matching to consider. + * So convert the EOB_ACT_LAST_MATCH + * to EOB_ACT_END_OF_FILE. + */ + + /* Reset buffer status. */ + yyrestart(yyin ); + + /*FALLTHROUGH*/ + + case EOB_ACT_END_OF_FILE: + { + if ( yywrap( ) ) + return 0; + + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; +#ifdef __cplusplus + return yyinput(); +#else + return input(); +#endif + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = (yytext_ptr) + offset; + break; + } + } + } + + c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ + *(yy_c_buf_p) = '\0'; /* preserve yytext */ + (yy_hold_char) = *++(yy_c_buf_p); + + return c; +} +#endif /* ifndef YY_NO_INPUT */ + +/** Immediately switch to a different input stream. + * @param input_file A readable stream. + * + * @note This function does not reset the start condition to @c INITIAL . + */ + void yyrestart (FILE * input_file ) +{ + + if ( ! YY_CURRENT_BUFFER ){ + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer(yyin,YY_BUF_SIZE ); + } + + yy_init_buffer(YY_CURRENT_BUFFER,input_file ); + yy_load_buffer_state( ); +} + +/** Switch to a different input buffer. + * @param new_buffer The new input buffer. + * + */ + void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ) +{ + + /* TODO. We should be able to replace this entire function body + * with + * yypop_buffer_state(); + * yypush_buffer_state(new_buffer); + */ + yyensure_buffer_stack (); + if ( YY_CURRENT_BUFFER == new_buffer ) + return; + + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + YY_CURRENT_BUFFER_LVALUE = new_buffer; + yy_load_buffer_state( ); + + /* We don't actually know whether we did this switch during + * EOF (yywrap()) processing, but the only time this flag + * is looked at is after yywrap() is called, so it's safe + * to go ahead and always set it. + */ + (yy_did_buffer_switch_on_eof) = 1; +} + +static void yy_load_buffer_state (void) +{ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; + yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; + (yy_hold_char) = *(yy_c_buf_p); +} + +/** Allocate and initialize an input buffer state. + * @param file A readable stream. + * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. + * + * @return the allocated buffer state. + */ + YY_BUFFER_STATE yy_create_buffer (FILE * file, int size ) +{ + YY_BUFFER_STATE b; + + b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_buf_size = size; + + /* yy_ch_buf has to be 2 characters longer than the size given because + * we need to put in 2 end-of-buffer characters. + */ + b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 ); + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_is_our_buffer = 1; + + yy_init_buffer(b,file ); + + return b; +} + +/** Destroy the buffer. + * @param b a buffer created with yy_create_buffer() + * + */ + void yy_delete_buffer (YY_BUFFER_STATE b ) +{ + + if ( ! b ) + return; + + if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ + YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; + + if ( b->yy_is_our_buffer ) + yyfree((void *) b->yy_ch_buf ); + + yyfree((void *) b ); +} + +#ifndef __cplusplus +extern int isatty (int ); +#endif /* __cplusplus */ + +/* Initializes or reinitializes a buffer. + * This function is sometimes called more than once on the same buffer, + * such as during a yyrestart() or at EOF. + */ + static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file ) + +{ + int oerrno = errno; + + yy_flush_buffer(b ); + + b->yy_input_file = file; + b->yy_fill_buffer = 1; + + /* If b is the current buffer, then yy_init_buffer was _probably_ + * called from yyrestart() or through yy_get_next_buffer. + * In that case, we don't want to reset the lineno or column. + */ + if (b != YY_CURRENT_BUFFER){ + b->yy_bs_lineno = 1; + b->yy_bs_column = 0; + } + + b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0; + + errno = oerrno; +} + +/** Discard all buffered characters. On the next scan, YY_INPUT will be called. + * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. + * + */ + void yy_flush_buffer (YY_BUFFER_STATE b ) +{ + if ( ! b ) + return; + + b->yy_n_chars = 0; + + /* We always need two end-of-buffer characters. The first causes + * a transition to the end-of-buffer state. The second causes + * a jam in that state. + */ + b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; + b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; + + b->yy_buf_pos = &b->yy_ch_buf[0]; + + b->yy_at_bol = 1; + b->yy_buffer_status = YY_BUFFER_NEW; + + if ( b == YY_CURRENT_BUFFER ) + yy_load_buffer_state( ); +} + +/** Pushes the new state onto the stack. The new state becomes + * the current state. This function will allocate the stack + * if necessary. + * @param new_buffer The new state. + * + */ +void yypush_buffer_state (YY_BUFFER_STATE new_buffer ) +{ + if (new_buffer == NULL) + return; + + yyensure_buffer_stack(); + + /* This block is copied from yy_switch_to_buffer. */ + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + /* Only push if top exists. Otherwise, replace top. */ + if (YY_CURRENT_BUFFER) + (yy_buffer_stack_top)++; + YY_CURRENT_BUFFER_LVALUE = new_buffer; + + /* copied from yy_switch_to_buffer. */ + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; +} + +/** Removes and deletes the top of the stack, if present. + * The next element becomes the new top. + * + */ +void yypop_buffer_state (void) +{ + if (!YY_CURRENT_BUFFER) + return; + + yy_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + if ((yy_buffer_stack_top) > 0) + --(yy_buffer_stack_top); + + if (YY_CURRENT_BUFFER) { + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; + } +} + +/* Allocates the stack if it does not exist. + * Guarantees space for at least one push. + */ +static void yyensure_buffer_stack (void) +{ + yy_size_t num_to_alloc; + + if (!(yy_buffer_stack)) { + + /* First allocation is just for 2 elements, since we don't know if this + * scanner will even need a stack. We use 2 instead of 1 to avoid an + * immediate realloc on the next call. + */ + num_to_alloc = 1; + (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc + (num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); + + memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); + + (yy_buffer_stack_max) = num_to_alloc; + (yy_buffer_stack_top) = 0; + return; + } + + if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ + + /* Increase the buffer to prepare for a possible push. */ + int grow_size = 8 /* arbitrary grow size */; + + num_to_alloc = (yy_buffer_stack_max) + grow_size; + (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc + ((yy_buffer_stack), + num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); + + /* zero only the new slots.*/ + memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); + (yy_buffer_stack_max) = num_to_alloc; + } +} + +/** Setup the input buffer state to scan directly from a user-specified character buffer. + * @param base the character buffer + * @param size the size in bytes of the character buffer + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size ) +{ + YY_BUFFER_STATE b; + + if ( size < 2 || + base[size-2] != YY_END_OF_BUFFER_CHAR || + base[size-1] != YY_END_OF_BUFFER_CHAR ) + /* They forgot to leave room for the EOB's. */ + return 0; + + b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); + + b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ + b->yy_buf_pos = b->yy_ch_buf = base; + b->yy_is_our_buffer = 0; + b->yy_input_file = 0; + b->yy_n_chars = b->yy_buf_size; + b->yy_is_interactive = 0; + b->yy_at_bol = 1; + b->yy_fill_buffer = 0; + b->yy_buffer_status = YY_BUFFER_NEW; + + yy_switch_to_buffer(b ); + + return b; +} + +/** Setup the input buffer state to scan a string. The next call to yylex() will + * scan from a @e copy of @a str. + * @param yystr a NUL-terminated string to scan + * + * @return the newly allocated buffer state object. + * @note If you want to scan bytes that may contain NUL values, then use + * yy_scan_bytes() instead. + */ +YY_BUFFER_STATE yy_scan_string (yyconst char * yystr ) +{ + + return yy_scan_bytes(yystr,strlen(yystr) ); +} + +/** Setup the input buffer state to scan the given bytes. The next call to yylex() will + * scan from a @e copy of @a bytes. + * @param bytes the byte buffer to scan + * @param len the number of bytes in the buffer pointed to by @a bytes. + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len ) +{ + YY_BUFFER_STATE b; + char *buf; + yy_size_t n, i; + + /* Get memory for full buffer, including space for trailing EOB's. */ + n = _yybytes_len + 2; + buf = (char *) yyalloc(n ); + if ( ! buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); + + for ( i = 0; i < _yybytes_len; ++i ) + buf[i] = yybytes[i]; + + buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; + + b = yy_scan_buffer(buf,n ); + if ( ! b ) + YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); + + /* It's okay to grow etc. this buffer, and we should throw it + * away when we're done. + */ + b->yy_is_our_buffer = 1; + + return b; +} + +#ifndef YY_EXIT_FAILURE +#define YY_EXIT_FAILURE 2 +#endif + +static void yy_fatal_error (yyconst char* msg ) +{ + (void) fprintf( stderr, "%s\n", msg ); + exit( YY_EXIT_FAILURE ); +} + +/* Redefine yyless() so it works in section 3 code. */ + +#undef yyless +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + yytext[yyleng] = (yy_hold_char); \ + (yy_c_buf_p) = yytext + yyless_macro_arg; \ + (yy_hold_char) = *(yy_c_buf_p); \ + *(yy_c_buf_p) = '\0'; \ + yyleng = yyless_macro_arg; \ + } \ + while ( 0 ) + +/* Accessor methods (get/set functions) to struct members. */ + +/** Get the current line number. + * + */ +int yyget_lineno (void) +{ + + return yylineno; +} + +/** Get the input stream. + * + */ +FILE *yyget_in (void) +{ + return yyin; +} + +/** Get the output stream. + * + */ +FILE *yyget_out (void) +{ + return yyout; +} + +/** Get the length of the current token. + * + */ +yy_size_t yyget_leng (void) +{ + return yyleng; +} + +/** Get the current token. + * + */ + +char *yyget_text (void) +{ + return yytext; +} + +/** Set the current line number. + * @param line_number + * + */ +void yyset_lineno (int line_number ) +{ + + yylineno = line_number; +} + +/** Set the input stream. This does not discard the current + * input buffer. + * @param in_str A readable stream. + * + * @see yy_switch_to_buffer + */ +void yyset_in (FILE * in_str ) +{ + yyin = in_str ; +} + +void yyset_out (FILE * out_str ) +{ + yyout = out_str ; +} + +int yyget_debug (void) +{ + return yy_flex_debug; +} + +void yyset_debug (int bdebug ) +{ + yy_flex_debug = bdebug ; +} + +static int yy_init_globals (void) +{ + /* Initialization is the same as for the non-reentrant scanner. + * This function is called from yylex_destroy(), so don't allocate here. + */ + + (yy_buffer_stack) = 0; + (yy_buffer_stack_top) = 0; + (yy_buffer_stack_max) = 0; + (yy_c_buf_p) = (char *) 0; + (yy_init) = 0; + (yy_start) = 0; + +/* Defined in main.c */ +#ifdef YY_STDINIT + yyin = stdin; + yyout = stdout; +#else + yyin = (FILE *) 0; + yyout = (FILE *) 0; +#endif + + /* For future reference: Set errno on error, since we are called by + * yylex_init() + */ + return 0; +} + +/* yylex_destroy is for both reentrant and non-reentrant scanners. */ +int yylex_destroy (void) +{ + + /* Pop the buffer stack, destroying each element. */ + while(YY_CURRENT_BUFFER){ + yy_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + yypop_buffer_state(); + } + + /* Destroy the stack itself. */ + yyfree((yy_buffer_stack) ); + (yy_buffer_stack) = NULL; + + /* Reset the globals. This is important in a non-reentrant scanner so the next time + * yylex() is called, initialization will occur. */ + yy_init_globals( ); + + return 0; +} + +/* + * Internal utility routines. + */ + +#ifndef yytext_ptr +static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) +{ + register int i; + for ( i = 0; i < n; ++i ) + s1[i] = s2[i]; +} +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * s ) +{ + register int n; + for ( n = 0; s[n]; ++n ) + ; + + return n; +} +#endif + +void *yyalloc (yy_size_t size ) +{ + return (void *) malloc( size ); +} + +void *yyrealloc (void * ptr, yy_size_t size ) +{ + /* The cast to (char *) in the following accommodates both + * implementations that use char* generic pointers, and those + * that use void* generic pointers. It works with the latter + * because both ANSI C and C++ allow castless assignment from + * any pointer type to void*, and deal with argument conversions + * as though doing an assignment. + */ + return (void *) realloc( (char *) ptr, size ); +} + +void yyfree (void * ptr ) +{ + free( (char *) ptr ); /* see yyrealloc() for (char *) cast */ +} + +#define YYTABLES_NAME "yytables" + +#line 91 "arlex.l" + + +#ifndef yywrap +/* Needed for lex, though not flex. */ +int yywrap(void) { return 1; } +#endif + diff --git a/binutils/arparse.c b/binutils/arparse.c new file mode 100644 index 0000000..6251c32 --- /dev/null +++ b/binutils/arparse.c @@ -0,0 +1,1770 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton implementation for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* C LALR(1) parser skeleton written by Richard Stallman, by + simplifying the original so-called "semantic" parser. */ + +/* All symbols defined below should begin with yy or YY, to avoid + infringing on user name space. This should be done even for local + variables, as they might otherwise be expanded by user macros. + There are some unavoidable exceptions within include files to + define necessary library symbols; they are noted "INFRINGES ON + USER NAME SPACE" below. */ + +/* Identify Bison output. */ +#define YYBISON 1 + +/* Bison version. */ +#define YYBISON_VERSION "2.3" + +/* Skeleton name. */ +#define YYSKELETON_NAME "yacc.c" + +/* Pure parsers. */ +#define YYPURE 0 + +/* Using locations. */ +#define YYLSP_NEEDED 0 + + + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + NEWLINE = 258, + VERBOSE = 259, + FILENAME = 260, + ADDLIB = 261, + LIST = 262, + ADDMOD = 263, + CLEAR = 264, + CREATE = 265, + DELETE = 266, + DIRECTORY = 267, + END = 268, + EXTRACT = 269, + FULLDIR = 270, + HELP = 271, + QUIT = 272, + REPLACE = 273, + SAVE = 274, + OPEN = 275 + }; +#endif +/* Tokens. */ +#define NEWLINE 258 +#define VERBOSE 259 +#define FILENAME 260 +#define ADDLIB 261 +#define LIST 262 +#define ADDMOD 263 +#define CLEAR 264 +#define CREATE 265 +#define DELETE 266 +#define DIRECTORY 267 +#define END 268 +#define EXTRACT 269 +#define FULLDIR 270 +#define HELP 271 +#define QUIT 272 +#define REPLACE 273 +#define SAVE 274 +#define OPEN 275 + + + + +/* Copy the first part of user declarations. */ +#line 1 "arparse.y" + +/* arparse.y - Stange script language parser */ + +/* Copyright 1992, 1993, 1995, 1997, 1999, 2002, 2003, 2005, 2007 + Free Software Foundation, Inc. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + + +/* Contributed by Steve Chamberlain + sac@cygnus.com + +*/ +#define DONTDECLARE_MALLOC +#include "sysdep.h" +#include "bfd.h" +#include "arsup.h" +extern int verbose; +extern int yylex (void); +static int yyerror (const char *); + + +/* Enabling traces. */ +#ifndef YYDEBUG +# define YYDEBUG 0 +#endif + +/* Enabling verbose error messages. */ +#ifdef YYERROR_VERBOSE +# undef YYERROR_VERBOSE +# define YYERROR_VERBOSE 1 +#else +# define YYERROR_VERBOSE 0 +#endif + +/* Enabling the token table. */ +#ifndef YYTOKEN_TABLE +# define YYTOKEN_TABLE 0 +#endif + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 38 "arparse.y" +{ + char *name; +struct list *list ; + +} +/* Line 193 of yacc.c. */ +#line 179 "arparse.c" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + + + +/* Copy the second part of user declarations. */ + + +/* Line 216 of yacc.c. */ +#line 192 "arparse.c" + +#ifdef short +# undef short +#endif + +#ifdef YYTYPE_UINT8 +typedef YYTYPE_UINT8 yytype_uint8; +#else +typedef unsigned char yytype_uint8; +#endif + +#ifdef YYTYPE_INT8 +typedef YYTYPE_INT8 yytype_int8; +#elif (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +typedef signed char yytype_int8; +#else +typedef short int yytype_int8; +#endif + +#ifdef YYTYPE_UINT16 +typedef YYTYPE_UINT16 yytype_uint16; +#else +typedef unsigned short int yytype_uint16; +#endif + +#ifdef YYTYPE_INT16 +typedef YYTYPE_INT16 yytype_int16; +#else +typedef short int yytype_int16; +#endif + +#ifndef YYSIZE_T +# ifdef __SIZE_TYPE__ +# define YYSIZE_T __SIZE_TYPE__ +# elif defined size_t +# define YYSIZE_T size_t +# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# else +# define YYSIZE_T unsigned int +# endif +#endif + +#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) + +#ifndef YY_ +# if defined YYENABLE_NLS && YYENABLE_NLS +# if ENABLE_NLS +# include /* INFRINGES ON USER NAME SPACE */ +# define YY_(msgid) dgettext ("bison-runtime", msgid) +# endif +# endif +# ifndef YY_ +# define YY_(msgid) msgid +# endif +#endif + +/* Suppress unused-variable warnings by "using" E. */ +#if ! defined lint || defined __GNUC__ +# define YYUSE(e) ((void) (e)) +#else +# define YYUSE(e) /* empty */ +#endif + +/* Identity function, used to suppress warnings about constant conditions. */ +#ifndef lint +# define YYID(n) (n) +#else +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static int +YYID (int i) +#else +static int +YYID (i) + int i; +#endif +{ + return i; +} +#endif + +#if ! defined yyoverflow || YYERROR_VERBOSE + +/* The parser invokes alloca or malloc; define the necessary symbols. */ + +# ifdef YYSTACK_USE_ALLOCA +# if YYSTACK_USE_ALLOCA +# ifdef __GNUC__ +# define YYSTACK_ALLOC __builtin_alloca +# elif defined __BUILTIN_VA_ARG_INCR +# include /* INFRINGES ON USER NAME SPACE */ +# elif defined _AIX +# define YYSTACK_ALLOC __alloca +# elif defined _MSC_VER +# include /* INFRINGES ON USER NAME SPACE */ +# define alloca _alloca +# else +# define YYSTACK_ALLOC alloca +# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# endif +# endif +# endif + +# ifdef YYSTACK_ALLOC + /* Pacify GCC's `empty if-body' warning. */ +# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) +# ifndef YYSTACK_ALLOC_MAXIMUM + /* The OS might guarantee only one guard page at the bottom of the stack, + and a page size can be as small as 4096 bytes. So we cannot safely + invoke alloca (N) if N exceeds 4096. Use a slightly smaller number + to allow for a few compiler-allocated temporary stack slots. */ +# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ +# endif +# else +# define YYSTACK_ALLOC YYMALLOC +# define YYSTACK_FREE YYFREE +# ifndef YYSTACK_ALLOC_MAXIMUM +# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM +# endif +# if (defined __cplusplus && ! defined _STDLIB_H \ + && ! ((defined YYMALLOC || defined malloc) \ + && (defined YYFREE || defined free))) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# ifndef YYMALLOC +# define YYMALLOC malloc +# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifndef YYFREE +# define YYFREE free +# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void free (void *); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# endif +#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ + + +#if (! defined yyoverflow \ + && (! defined __cplusplus \ + || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) + +/* A type that is properly aligned for any stack member. */ +union yyalloc +{ + yytype_int16 yyss; + YYSTYPE yyvs; + }; + +/* The size of the maximum gap between one aligned stack and the next. */ +# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) + +/* The size of an array large to enough to hold all stacks, each with + N elements. */ +# define YYSTACK_BYTES(N) \ + ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ + + YYSTACK_GAP_MAXIMUM) + +/* Copy COUNT objects from FROM to TO. The source and destination do + not overlap. */ +# ifndef YYCOPY +# if defined __GNUC__ && 1 < __GNUC__ +# define YYCOPY(To, From, Count) \ + __builtin_memcpy (To, From, (Count) * sizeof (*(From))) +# else +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ + while (YYID (0)) +# endif +# endif + +/* Relocate STACK from its old location to the new one. The + local variables YYSIZE and YYSTACKSIZE give the old and new number of + elements in the stack, and YYPTR gives the new location of the + stack. Advance YYPTR to a properly aligned location for the next + stack. */ +# define YYSTACK_RELOCATE(Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack, Stack, yysize); \ + Stack = &yyptr->Stack; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ + while (YYID (0)) + +#endif + +/* YYFINAL -- State number of the termination state. */ +#define YYFINAL 3 +/* YYLAST -- Last index in YYTABLE. */ +#define YYLAST 34 + +/* YYNTOKENS -- Number of terminals. */ +#define YYNTOKENS 24 +/* YYNNTS -- Number of nonterminals. */ +#define YYNNTS 22 +/* YYNRULES -- Number of rules. */ +#define YYNRULES 42 +/* YYNRULES -- Number of states. */ +#define YYNSTATES 53 + +/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ +#define YYUNDEFTOK 2 +#define YYMAXUTOK 275 + +#define YYTRANSLATE(YYX) \ + ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + +/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ +static const yytype_uint8 yytranslate[] = +{ + 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 21, 22, 2, 2, 23, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20 +}; + +#if YYDEBUG +/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in + YYRHS. */ +static const yytype_uint8 yyprhs[] = +{ + 0, 0, 3, 4, 7, 10, 11, 14, 16, 18, + 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, + 40, 42, 44, 45, 48, 51, 53, 56, 59, 61, + 63, 66, 69, 73, 78, 80, 81, 85, 86, 90, + 91, 93, 94 +}; + +/* YYRHS -- A `-1'-separated list of the rules' RHS. */ +static const yytype_int8 yyrhs[] = +{ + 25, 0, -1, -1, 26, 27, -1, 27, 28, -1, + -1, 29, 3, -1, 37, -1, 38, -1, 45, -1, + 40, -1, 39, -1, 32, -1, 34, -1, 36, -1, + 30, -1, 31, -1, 33, -1, 35, -1, 13, -1, + 1, -1, 5, -1, -1, 14, 43, -1, 18, 43, + -1, 9, -1, 11, 43, -1, 8, 43, -1, 7, + -1, 19, -1, 20, 5, -1, 10, 5, -1, 6, + 5, 42, -1, 12, 5, 42, 41, -1, 5, -1, + -1, 21, 43, 22, -1, -1, 43, 44, 5, -1, + -1, 23, -1, -1, 4, -1 +}; + +/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ +static const yytype_uint8 yyrline[] = +{ + 0, 69, 69, 69, 73, 74, 78, 82, 83, 84, + 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, + 95, 96, 97, 102, 107, 112, 117, 121, 126, 131, + 138, 143, 149, 153, 160, 162, 166, 169, 173, 179, + 184, 185, 190 +}; +#endif + +#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE +/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. + First, the terminals, then, starting at YYNTOKENS, nonterminals. */ +static const char *const yytname[] = +{ + "$end", "error", "$undefined", "NEWLINE", "VERBOSE", "FILENAME", + "ADDLIB", "LIST", "ADDMOD", "CLEAR", "CREATE", "DELETE", "DIRECTORY", + "END", "EXTRACT", "FULLDIR", "HELP", "QUIT", "REPLACE", "SAVE", "OPEN", + "'('", "')'", "','", "$accept", "start", "@1", "session", "command_line", + "command", "extract_command", "replace_command", "clear_command", + "delete_command", "addmod_command", "list_command", "save_command", + "open_command", "create_command", "addlib_command", "directory_command", + "optional_filename", "modulelist", "modulename", "optcomma", + "verbose_command", 0 +}; +#endif + +# ifdef YYPRINT +/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to + token YYLEX-NUM. */ +static const yytype_uint16 yytoknum[] = +{ + 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, + 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, + 275, 40, 41, 44 +}; +# endif + +/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ +static const yytype_uint8 yyr1[] = +{ + 0, 24, 26, 25, 27, 27, 28, 29, 29, 29, + 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, + 29, 29, 29, 30, 31, 32, 33, 34, 35, 36, + 37, 38, 39, 40, 41, 41, 42, 42, 43, 43, + 44, 44, 45 +}; + +/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ +static const yytype_uint8 yyr2[] = +{ + 0, 2, 0, 2, 2, 0, 2, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 0, 2, 2, 1, 2, 2, 1, 1, + 2, 2, 3, 4, 1, 0, 3, 0, 3, 0, + 1, 0, 1 +}; + +/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state + STATE-NUM when YYTABLE doesn't specify something else to do. Zero + means the default is an error. */ +static const yytype_uint8 yydefact[] = +{ + 2, 0, 5, 1, 0, 20, 42, 21, 0, 28, + 39, 25, 0, 39, 0, 19, 39, 39, 29, 0, + 4, 0, 15, 16, 12, 17, 13, 18, 14, 7, + 8, 11, 10, 9, 37, 27, 31, 26, 37, 23, + 24, 30, 6, 39, 32, 40, 0, 35, 41, 38, + 34, 33, 36 +}; + +/* YYDEFGOTO[NTERM-NUM]. */ +static const yytype_int8 yydefgoto[] = +{ + -1, 1, 2, 4, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 51, 44, 35, + 46, 33 +}; + +/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing + STATE-NUM. */ +#define YYPACT_NINF -14 +static const yytype_int8 yypact[] = +{ + -14, 1, -14, -14, 5, -14, -14, -14, 2, -14, + -14, -14, 21, -14, 22, -14, -14, -14, -14, 23, + -14, 26, -14, -14, -14, -14, -14, -14, -14, -14, + -14, -14, -14, -14, 10, -3, -14, -3, 10, -3, + -3, -14, -14, -14, -14, -14, 27, 28, -1, -14, + -14, -14, -14 +}; + +/* YYPGOTO[NTERM-NUM]. */ +static const yytype_int8 yypgoto[] = +{ + -14, -14, -14, -14, -14, -14, -14, -14, -14, -14, + -14, -14, -14, -14, -14, -14, -14, -14, -4, -13, + -14, -14 +}; + +/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If + positive, shift that token. If negative, reduce the rule which + number is the opposite. If zero, do what YYDEFACT says. + If YYTABLE_NINF, syntax error. */ +#define YYTABLE_NINF -42 +static const yytype_int8 yytable[] = +{ + 37, 3, -41, 39, 40, -3, 5, 34, -22, 6, + 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, + 45, 52, 45, 17, 18, 19, 36, 38, 41, 42, + 48, 43, 49, 50, 47 +}; + +static const yytype_uint8 yycheck[] = +{ + 13, 0, 5, 16, 17, 0, 1, 5, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 23, 22, 23, 18, 19, 20, 5, 5, 5, 3, + 43, 21, 5, 5, 38 +}; + +/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing + symbol of state STATE-NUM. */ +static const yytype_uint8 yystos[] = +{ + 0, 25, 26, 0, 27, 1, 4, 5, 6, 7, + 8, 9, 10, 11, 12, 13, 14, 18, 19, 20, + 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, + 38, 39, 40, 45, 5, 43, 5, 43, 5, 43, + 43, 5, 3, 21, 42, 23, 44, 42, 43, 5, + 5, 41, 22 +}; + +#define yyerrok (yyerrstatus = 0) +#define yyclearin (yychar = YYEMPTY) +#define YYEMPTY (-2) +#define YYEOF 0 + +#define YYACCEPT goto yyacceptlab +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab + + +/* Like YYERROR except do call yyerror. This remains here temporarily + to ease the transition to the new meaning of YYERROR, for GCC. + Once GCC version 2 has supplanted version 1, this can go. */ + +#define YYFAIL goto yyerrlab + +#define YYRECOVERING() (!!yyerrstatus) + +#define YYBACKUP(Token, Value) \ +do \ + if (yychar == YYEMPTY && yylen == 1) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ + YYPOPSTACK (1); \ + goto yybackup; \ + } \ + else \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ +while (YYID (0)) + + +#define YYTERROR 1 +#define YYERRCODE 256 + + +/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. + If N is 0, then set CURRENT to the empty location which ends + the previous symbol: RHS[0] (always defined). */ + +#define YYRHSLOC(Rhs, K) ((Rhs)[K]) +#ifndef YYLLOC_DEFAULT +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ + if (YYID (N)) \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ + while (YYID (0)) +#endif + + +/* YY_LOCATION_PRINT -- Print the location on the stream. + This macro was not mandated originally: define only if we know + we won't break user code: when these are the locations we know. */ + +#ifndef YY_LOCATION_PRINT +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) +# else +# define YY_LOCATION_PRINT(File, Loc) ((void) 0) +# endif +#endif + + +/* YYLEX -- calling `yylex' with the right arguments. */ + +#ifdef YYLEX_PARAM +# define YYLEX yylex (YYLEX_PARAM) +#else +# define YYLEX yylex () +#endif + +/* Enable debugging if requested. */ +#if YYDEBUG + +# ifndef YYFPRINTF +# include /* INFRINGES ON USER NAME SPACE */ +# define YYFPRINTF fprintf +# endif + +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ +} while (YYID (0)) + +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yy_symbol_print (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ +} while (YYID (0)) + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_value_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (!yyvaluep) + return; +# ifdef YYPRINT + if (yytype < YYNTOKENS) + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# else + YYUSE (yyoutput); +# endif + switch (yytype) + { + default: + break; + } +} + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (yytype < YYNTOKENS) + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + else + YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + + yy_symbol_value_print (yyoutput, yytype, yyvaluep); + YYFPRINTF (yyoutput, ")"); +} + +/*------------------------------------------------------------------. +| yy_stack_print -- Print the state stack from its BOTTOM up to its | +| TOP (included). | +`------------------------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_stack_print (yytype_int16 *bottom, yytype_int16 *top) +#else +static void +yy_stack_print (bottom, top) + yytype_int16 *bottom; + yytype_int16 *top; +#endif +{ + YYFPRINTF (stderr, "Stack now"); + for (; bottom <= top; ++bottom) + YYFPRINTF (stderr, " %d", *bottom); + YYFPRINTF (stderr, "\n"); +} + +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ +} while (YYID (0)) + + +/*------------------------------------------------. +| Report that the YYRULE is going to be reduced. | +`------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_reduce_print (YYSTYPE *yyvsp, int yyrule) +#else +static void +yy_reduce_print (yyvsp, yyrule) + YYSTYPE *yyvsp; + int yyrule; +#endif +{ + int yynrhs = yyr2[yyrule]; + int yyi; + unsigned long int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", + yyrule - 1, yylno); + /* The symbols being reduced. */ + for (yyi = 0; yyi < yynrhs; yyi++) + { + fprintf (stderr, " $%d = ", yyi + 1); + yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], + &(yyvsp[(yyi + 1) - (yynrhs)]) + ); + fprintf (stderr, "\n"); + } +} + +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ + yy_reduce_print (yyvsp, Rule); \ +} while (YYID (0)) + +/* Nonzero means print parse trace. It is left uninitialized so that + multiple parsers can coexist. */ +int yydebug; +#else /* !YYDEBUG */ +# define YYDPRINTF(Args) +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YY_STACK_PRINT(Bottom, Top) +# define YY_REDUCE_PRINT(Rule) +#endif /* !YYDEBUG */ + + +/* YYINITDEPTH -- initial size of the parser's stacks. */ +#ifndef YYINITDEPTH +# define YYINITDEPTH 200 +#endif + +/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only + if the built-in stack extension method is used). + + Do not make this value too large; the results are undefined if + YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + evaluated with infinite-precision integer arithmetic. */ + +#ifndef YYMAXDEPTH +# define YYMAXDEPTH 10000 +#endif + + + +#if YYERROR_VERBOSE + +# ifndef yystrlen +# if defined __GLIBC__ && defined _STRING_H +# define yystrlen strlen +# else +/* Return the length of YYSTR. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static YYSIZE_T +yystrlen (const char *yystr) +#else +static YYSIZE_T +yystrlen (yystr) + const char *yystr; +#endif +{ + YYSIZE_T yylen; + for (yylen = 0; yystr[yylen]; yylen++) + continue; + return yylen; +} +# endif +# endif + +# ifndef yystpcpy +# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE +# define yystpcpy stpcpy +# else +/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in + YYDEST. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static char * +yystpcpy (char *yydest, const char *yysrc) +#else +static char * +yystpcpy (yydest, yysrc) + char *yydest; + const char *yysrc; +#endif +{ + char *yyd = yydest; + const char *yys = yysrc; + + while ((*yyd++ = *yys++) != '\0') + continue; + + return yyd - 1; +} +# endif +# endif + +# ifndef yytnamerr +/* Copy to YYRES the contents of YYSTR after stripping away unnecessary + quotes and backslashes, so that it's suitable for yyerror. The + heuristic is that double-quoting is unnecessary unless the string + contains an apostrophe, a comma, or backslash (other than + backslash-backslash). YYSTR is taken from yytname. If YYRES is + null, do not copy; instead, return the length of what the result + would have been. */ +static YYSIZE_T +yytnamerr (char *yyres, const char *yystr) +{ + if (*yystr == '"') + { + YYSIZE_T yyn = 0; + char const *yyp = yystr; + + for (;;) + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; + + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; + + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } + do_not_strip_quotes: ; + } + + if (! yyres) + return yystrlen (yystr); + + return yystpcpy (yyres, yystr) - yyres; +} +# endif + +/* Copy into YYRESULT an error message about the unexpected token + YYCHAR while in state YYSTATE. Return the number of bytes copied, + including the terminating null byte. If YYRESULT is null, do not + copy anything; just return the number of bytes that would be + copied. As a special case, return 0 if an ordinary "syntax error" + message will do. Return YYSIZE_MAXIMUM if overflow occurs during + size calculation. */ +static YYSIZE_T +yysyntax_error (char *yyresult, int yystate, int yychar) +{ + int yyn = yypact[yystate]; + + if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) + return 0; + else + { + int yytype = YYTRANSLATE (yychar); + YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); + YYSIZE_T yysize = yysize0; + YYSIZE_T yysize1; + int yysize_overflow = 0; + enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; + char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + int yyx; + +# if 0 + /* This is so xgettext sees the translatable formats that are + constructed on the fly. */ + YY_("syntax error, unexpected %s"); + YY_("syntax error, unexpected %s, expecting %s"); + YY_("syntax error, unexpected %s, expecting %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); +# endif + char *yyfmt; + char const *yyf; + static char const yyunexpected[] = "syntax error, unexpected %s"; + static char const yyexpecting[] = ", expecting %s"; + static char const yyor[] = " or %s"; + char yyformat[sizeof yyunexpected + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; + char const *yyprefix = yyexpecting; + + /* Start YYX at -YYN if negative to avoid negative indexes in + YYCHECK. */ + int yyxbegin = yyn < 0 ? -yyn : 0; + + /* Stay within bounds of both yycheck and yytname. */ + int yychecklim = YYLAST - yyn + 1; + int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; + int yycount = 1; + + yyarg[0] = yytname[yytype]; + yyfmt = yystpcpy (yyformat, yyunexpected); + + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } + + yyf = YY_(yyformat); + yysize1 = yysize + yystrlen (yyf); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + + if (yysize_overflow) + return YYSIZE_MAXIMUM; + + if (yyresult) + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yyresult; + int yyi = 0; + while ((*yyp = *yyf) != '\0') + { + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } + } + } + return yysize; + } +} +#endif /* YYERROR_VERBOSE */ + + +/*-----------------------------------------------. +| Release the memory associated to this symbol. | +`-----------------------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +#else +static void +yydestruct (yymsg, yytype, yyvaluep) + const char *yymsg; + int yytype; + YYSTYPE *yyvaluep; +#endif +{ + YYUSE (yyvaluep); + + if (!yymsg) + yymsg = "Deleting"; + YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); + + switch (yytype) + { + + default: + break; + } +} + + +/* Prevent warnings from -Wmissing-prototypes. */ + +#ifdef YYPARSE_PARAM +#if defined __STDC__ || defined __cplusplus +int yyparse (void *YYPARSE_PARAM); +#else +int yyparse (); +#endif +#else /* ! YYPARSE_PARAM */ +#if defined __STDC__ || defined __cplusplus +int yyparse (void); +#else +int yyparse (); +#endif +#endif /* ! YYPARSE_PARAM */ + + + +/* The look-ahead symbol. */ +int yychar; + +/* The semantic value of the look-ahead symbol. */ +YYSTYPE yylval; + +/* Number of syntax errors so far. */ +int yynerrs; + + + +/*----------. +| yyparse. | +`----------*/ + +#ifdef YYPARSE_PARAM +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void *YYPARSE_PARAM) +#else +int +yyparse (YYPARSE_PARAM) + void *YYPARSE_PARAM; +#endif +#else /* ! YYPARSE_PARAM */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void) +#else +int +yyparse () + +#endif +#endif +{ + + int yystate; + int yyn; + int yyresult; + /* Number of tokens to shift before error messages enabled. */ + int yyerrstatus; + /* Look-ahead token as an internal (translated) token number. */ + int yytoken = 0; +#if YYERROR_VERBOSE + /* Buffer for error messages, and its allocated size. */ + char yymsgbuf[128]; + char *yymsg = yymsgbuf; + YYSIZE_T yymsg_alloc = sizeof yymsgbuf; +#endif + + /* Three stacks and their tools: + `yyss': related to states, + `yyvs': related to semantic values, + `yyls': related to locations. + + Refer to the stacks thru separate pointers, to allow yyoverflow + to reallocate them elsewhere. */ + + /* The state stack. */ + yytype_int16 yyssa[YYINITDEPTH]; + yytype_int16 *yyss = yyssa; + yytype_int16 *yyssp; + + /* The semantic value stack. */ + YYSTYPE yyvsa[YYINITDEPTH]; + YYSTYPE *yyvs = yyvsa; + YYSTYPE *yyvsp; + + + +#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) + + YYSIZE_T yystacksize = YYINITDEPTH; + + /* The variables used to return semantic value and location from the + action routines. */ + YYSTYPE yyval; + + + /* The number of symbols on the RHS of the reduced rule. + Keep to zero when no symbol should be popped. */ + int yylen = 0; + + YYDPRINTF ((stderr, "Starting parse\n")); + + yystate = 0; + yyerrstatus = 0; + yynerrs = 0; + yychar = YYEMPTY; /* Cause a token to be read. */ + + /* Initialize stack pointers. + Waste one element of value and location stack + so that they stay on the same level as the state stack. + The wasted elements are never initialized. */ + + yyssp = yyss; + yyvsp = yyvs; + + goto yysetstate; + +/*------------------------------------------------------------. +| yynewstate -- Push a new state, which is found in yystate. | +`------------------------------------------------------------*/ + yynewstate: + /* In all cases, when you get here, the value and location stacks + have just been pushed. So pushing a state here evens the stacks. */ + yyssp++; + + yysetstate: + *yyssp = yystate; + + if (yyss + yystacksize - 1 <= yyssp) + { + /* Get the current used size of the three stacks, in elements. */ + YYSIZE_T yysize = yyssp - yyss + 1; + +#ifdef yyoverflow + { + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + yytype_int16 *yyss1 = yyss; + + + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), + + &yystacksize); + + yyss = yyss1; + yyvs = yyvs1; + } +#else /* no yyoverflow */ +# ifndef YYSTACK_RELOCATE + goto yyexhaustedlab; +# else + /* Extend the stack our own way. */ + if (YYMAXDEPTH <= yystacksize) + goto yyexhaustedlab; + yystacksize *= 2; + if (YYMAXDEPTH < yystacksize) + yystacksize = YYMAXDEPTH; + + { + yytype_int16 *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss); + YYSTACK_RELOCATE (yyvs); + +# undef YYSTACK_RELOCATE + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); + } +# endif +#endif /* no yyoverflow */ + + yyssp = yyss + yysize - 1; + yyvsp = yyvs + yysize - 1; + + + YYDPRINTF ((stderr, "Stack size increased to %lu\n", + (unsigned long int) yystacksize)); + + if (yyss + yystacksize - 1 <= yyssp) + YYABORT; + } + + YYDPRINTF ((stderr, "Entering state %d\n", yystate)); + + goto yybackup; + +/*-----------. +| yybackup. | +`-----------*/ +yybackup: + + /* Do appropriate processing given the current state. Read a + look-ahead token if we need one and don't already have one. */ + + /* First try to decide what to do without reference to look-ahead token. */ + yyn = yypact[yystate]; + if (yyn == YYPACT_NINF) + goto yydefault; + + /* Not known => get a look-ahead token if don't already have one. */ + + /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ + if (yychar == YYEMPTY) + { + YYDPRINTF ((stderr, "Reading a token: ")); + yychar = YYLEX; + } + + if (yychar <= YYEOF) + { + yychar = yytoken = YYEOF; + YYDPRINTF ((stderr, "Now at end of input.\n")); + } + else + { + yytoken = YYTRANSLATE (yychar); + YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + } + + /* If the proper action on seeing token YYTOKEN is to reduce or to + detect an error, take that action. */ + yyn += yytoken; + if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) + goto yydefault; + yyn = yytable[yyn]; + if (yyn <= 0) + { + if (yyn == 0 || yyn == YYTABLE_NINF) + goto yyerrlab; + yyn = -yyn; + goto yyreduce; + } + + if (yyn == YYFINAL) + YYACCEPT; + + /* Count tokens shifted since error; after three, turn off error + status. */ + if (yyerrstatus) + yyerrstatus--; + + /* Shift the look-ahead token. */ + YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + + /* Discard the shifted token unless it is eof. */ + if (yychar != YYEOF) + yychar = YYEMPTY; + + yystate = yyn; + *++yyvsp = yylval; + + goto yynewstate; + + +/*-----------------------------------------------------------. +| yydefault -- do the default action for the current state. | +`-----------------------------------------------------------*/ +yydefault: + yyn = yydefact[yystate]; + if (yyn == 0) + goto yyerrlab; + goto yyreduce; + + +/*-----------------------------. +| yyreduce -- Do a reduction. | +`-----------------------------*/ +yyreduce: + /* yyn is the number of a rule to reduce with. */ + yylen = yyr2[yyn]; + + /* If YYLEN is nonzero, implement the default value of the action: + `$$ = $1'. + + Otherwise, the following line sets YYVAL to garbage. + This behavior is undocumented and Bison + users should not rely upon it. Assigning to YYVAL + unconditionally makes the parser a bit smaller, and it avoids a + GCC warning that YYVAL may be used uninitialized. */ + yyval = yyvsp[1-yylen]; + + + YY_REDUCE_PRINT (yyn); + switch (yyn) + { + case 2: +#line 69 "arparse.y" + { prompt(); } + break; + + case 6: +#line 78 "arparse.y" + { prompt(); } + break; + + case 19: +#line 94 "arparse.y" + { ar_end(); return 0; } + break; + + case 21: +#line 96 "arparse.y" + { yyerror("foo"); } + break; + + case 23: +#line 103 "arparse.y" + { ar_extract((yyvsp[(2) - (2)].list)); } + break; + + case 24: +#line 108 "arparse.y" + { ar_replace((yyvsp[(2) - (2)].list)); } + break; + + case 25: +#line 113 "arparse.y" + { ar_clear(); } + break; + + case 26: +#line 118 "arparse.y" + { ar_delete((yyvsp[(2) - (2)].list)); } + break; + + case 27: +#line 122 "arparse.y" + { ar_addmod((yyvsp[(2) - (2)].list)); } + break; + + case 28: +#line 127 "arparse.y" + { ar_list(); } + break; + + case 29: +#line 132 "arparse.y" + { ar_save(); } + break; + + case 30: +#line 139 "arparse.y" + { ar_open((yyvsp[(2) - (2)].name),0); } + break; + + case 31: +#line 144 "arparse.y" + { ar_open((yyvsp[(2) - (2)].name),1); } + break; + + case 32: +#line 150 "arparse.y" + { ar_addlib((yyvsp[(2) - (3)].name),(yyvsp[(3) - (3)].list)); } + break; + + case 33: +#line 154 "arparse.y" + { ar_directory((yyvsp[(2) - (4)].name), (yyvsp[(3) - (4)].list), (yyvsp[(4) - (4)].name)); } + break; + + case 34: +#line 161 "arparse.y" + { (yyval.name) = (yyvsp[(1) - (1)].name); } + break; + + case 35: +#line 162 "arparse.y" + { (yyval.name) = 0; } + break; + + case 36: +#line 167 "arparse.y" + { (yyval.list) = (yyvsp[(2) - (3)].list); } + break; + + case 37: +#line 169 "arparse.y" + { (yyval.list) = 0; } + break; + + case 38: +#line 174 "arparse.y" + { struct list *n = (struct list *) malloc(sizeof(struct list)); + n->next = (yyvsp[(1) - (3)].list); + n->name = (yyvsp[(3) - (3)].name); + (yyval.list) = n; + } + break; + + case 39: +#line 179 "arparse.y" + { (yyval.list) = 0; } + break; + + case 42: +#line 191 "arparse.y" + { verbose = !verbose; } + break; + + +/* Line 1267 of yacc.c. */ +#line 1546 "arparse.c" + default: break; + } + YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); + + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + + *++yyvsp = yyval; + + + /* Now `shift' the result of the reduction. Determine what state + that goes to, based on the state we popped back to and the rule + number reduced by. */ + + yyn = yyr1[yyn]; + + yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; + if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yytable[yystate]; + else + yystate = yydefgoto[yyn - YYNTOKENS]; + + goto yynewstate; + + +/*------------------------------------. +| yyerrlab -- here on detecting error | +`------------------------------------*/ +yyerrlab: + /* If not already recovering from an error, report this error. */ + if (!yyerrstatus) + { + ++yynerrs; +#if ! YYERROR_VERBOSE + yyerror (YY_("syntax error")); +#else + { + YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); + if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) + { + YYSIZE_T yyalloc = 2 * yysize; + if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) + yyalloc = YYSTACK_ALLOC_MAXIMUM; + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); + yymsg = (char *) YYSTACK_ALLOC (yyalloc); + if (yymsg) + yymsg_alloc = yyalloc; + else + { + yymsg = yymsgbuf; + yymsg_alloc = sizeof yymsgbuf; + } + } + + if (0 < yysize && yysize <= yymsg_alloc) + { + (void) yysyntax_error (yymsg, yystate, yychar); + yyerror (yymsg); + } + else + { + yyerror (YY_("syntax error")); + if (yysize != 0) + goto yyexhaustedlab; + } + } +#endif + } + + + + if (yyerrstatus == 3) + { + /* If just tried and failed to reuse look-ahead token after an + error, discard it. */ + + if (yychar <= YYEOF) + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } + else + { + yydestruct ("Error: discarding", + yytoken, &yylval); + yychar = YYEMPTY; + } + } + + /* Else will try to reuse look-ahead token after shifting the error + token. */ + goto yyerrlab1; + + +/*---------------------------------------------------. +| yyerrorlab -- error raised explicitly by YYERROR. | +`---------------------------------------------------*/ +yyerrorlab: + + /* Pacify compilers like GCC when the user code never invokes + YYERROR and the label yyerrorlab therefore never appears in user + code. */ + if (/*CONSTCOND*/ 0) + goto yyerrorlab; + + /* Do not reclaim the symbols of the rule which action triggered + this YYERROR. */ + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + yystate = *yyssp; + goto yyerrlab1; + + +/*-------------------------------------------------------------. +| yyerrlab1 -- common code for both syntax error and YYERROR. | +`-------------------------------------------------------------*/ +yyerrlab1: + yyerrstatus = 3; /* Each real token shifted decrements this. */ + + for (;;) + { + yyn = yypact[yystate]; + if (yyn != YYPACT_NINF) + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } + + /* Pop the current state because it cannot handle the error token. */ + if (yyssp == yyss) + YYABORT; + + + yydestruct ("Error: popping", + yystos[yystate], yyvsp); + YYPOPSTACK (1); + yystate = *yyssp; + YY_STACK_PRINT (yyss, yyssp); + } + + if (yyn == YYFINAL) + YYACCEPT; + + *++yyvsp = yylval; + + + /* Shift the error token. */ + YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); + + yystate = yyn; + goto yynewstate; + + +/*-------------------------------------. +| yyacceptlab -- YYACCEPT comes here. | +`-------------------------------------*/ +yyacceptlab: + yyresult = 0; + goto yyreturn; + +/*-----------------------------------. +| yyabortlab -- YYABORT comes here. | +`-----------------------------------*/ +yyabortlab: + yyresult = 1; + goto yyreturn; + +#ifndef yyoverflow +/*-------------------------------------------------. +| yyexhaustedlab -- memory exhaustion comes here. | +`-------------------------------------------------*/ +yyexhaustedlab: + yyerror (YY_("memory exhausted")); + yyresult = 2; + /* Fall through. */ +#endif + +yyreturn: + if (yychar != YYEOF && yychar != YYEMPTY) + yydestruct ("Cleanup: discarding lookahead", + yytoken, &yylval); + /* Do not reclaim the symbols of the rule which action triggered + this YYABORT or YYACCEPT. */ + YYPOPSTACK (yylen); + YY_STACK_PRINT (yyss, yyssp); + while (yyssp != yyss) + { + yydestruct ("Cleanup: popping", + yystos[*yyssp], yyvsp); + YYPOPSTACK (1); + } +#ifndef yyoverflow + if (yyss != yyssa) + YYSTACK_FREE (yyss); +#endif +#if YYERROR_VERBOSE + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); +#endif + /* Make sure YYID is used. */ + return YYID (yyresult); +} + + +#line 195 "arparse.y" + + +static int +yyerror (const char *x ATTRIBUTE_UNUSED) +{ + extern int linenumber; + + printf (_("Syntax error in archive script, line %d\n"), linenumber + 1); + return 0; +} + diff --git a/binutils/arparse.h b/binutils/arparse.h new file mode 100644 index 0000000..0926a61 --- /dev/null +++ b/binutils/arparse.h @@ -0,0 +1,102 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton interface for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + NEWLINE = 258, + VERBOSE = 259, + FILENAME = 260, + ADDLIB = 261, + LIST = 262, + ADDMOD = 263, + CLEAR = 264, + CREATE = 265, + DELETE = 266, + DIRECTORY = 267, + END = 268, + EXTRACT = 269, + FULLDIR = 270, + HELP = 271, + QUIT = 272, + REPLACE = 273, + SAVE = 274, + OPEN = 275 + }; +#endif +/* Tokens. */ +#define NEWLINE 258 +#define VERBOSE 259 +#define FILENAME 260 +#define ADDLIB 261 +#define LIST 262 +#define ADDMOD 263 +#define CLEAR 264 +#define CREATE 265 +#define DELETE 266 +#define DIRECTORY 267 +#define END 268 +#define EXTRACT 269 +#define FULLDIR 270 +#define HELP 271 +#define QUIT 272 +#define REPLACE 273 +#define SAVE 274 +#define OPEN 275 + + + + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 38 "arparse.y" +{ + char *name; +struct list *list ; + +} +/* Line 1529 of yacc.c. */ +#line 95 "arparse.h" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + +extern YYSTYPE yylval; + diff --git a/binutils/configure b/binutils/configure index b191a61..1a4a1ef 100755 --- a/binutils/configure +++ b/binutils/configure @@ -604,6 +604,7 @@ LTLIBOBJS LIBOBJS EMULATION_VECTOR EMULATION +OBJDUMP_PRIVATE_OFILES OBJDUMP_DEFS BUILD_INSTALL_MISC BUILD_MISC @@ -11198,7 +11199,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 11201 "configure" +#line 11202 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -11304,7 +11305,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 11307 "configure" +#line 11308 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -13779,6 +13780,9 @@ BUILD_DLLWRAP= BUILD_MISC= BUILD_INSTALL_MISC= OBJDUMP_DEFS= +OBJDUMP_PRIVATE_VECTORS= +OBJDUMP_PRIVATE_OFILES= +od_vectors= for targ in $target $canon_targets do @@ -13796,6 +13800,7 @@ do fi DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_I386" BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)' + od_vectors="$od_vectors objdump_private_desc_xcoff" else case $targ in i[3-7]86*-*-netware*) @@ -13815,9 +13820,11 @@ do NLMCONV_DEFS="$NLMCONV_DEFS -DNLMCONV_SPARC" ;; esac + case $targ in *-*-hms*) BUILD_SRCONV='$(SRCONV_PROG)' ;; esac + case $targ in arm-epoc-pe*) BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)' @@ -13888,7 +13895,10 @@ do BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)' ;; powerpc*-*-linux* | powerpc*-*-elf* | powerpc*-*-eabi*) - BUILD_INSTALL_MISC="${BUILD_INSTALL_MISC} embedspu" + case "$BUILD_INSTALL_MISC" in + *embedspu*) ;; + *) BUILD_INSTALL_MISC="${BUILD_INSTALL_MISC} embedspu" + esac ;; sh*-*-pe) BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)' @@ -13931,9 +13941,46 @@ do OBJDUMP_DEFS="-DSKIP_ZEROES=256 -DSKIP_ZEROES_AT_END=0" ;; esac + + # Add objdump private vectors. + case $targ in + powerpc-*-aix*) + od_vectors="$od_vectors objdump_private_desc_xcoff" + ;; + esac fi done +# Uniq objdump private vector, build objdump target ofiles. +od_files= +f="" +for i in $od_vectors ; do + case " $f " in + *" $i "*) ;; + *) + f="$f $i" + OBJDUMP_PRIVATE_VECTORS="$OBJDUMP_PRIVATE_VECTORS &$i," + case $i in + objdump_private_desc_xcoff) + od_files="$od_files od-xcoff" ;; + *) as_fn_error "*** unknown private vector $i" "$LINENO" 5 ;; + esac + ;; + esac +done + +# Uniq objdump target ofiles +f="" +for i in $od_files ; do + case " $f " in + *" $i "*) ;; + *) + f="$f $i" + OBJDUMP_PRIVATE_OFILES="$OBJDUMP_PRIVATE_OFILES $i.$objext" + ;; + esac +done + DLLTOOL_DEFS="$DLLTOOL_DEFS $DLLTOOL_DEFAULT" if test "${with_windres+set}" = set; then @@ -13944,6 +13991,9 @@ if test "${with_windmc+set}" = set; then BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)' fi +OBJDUMP_DEFS="${OBJDUMP_DEFS} -DOBJDUMP_PRIVATE_VECTORS=\"${OBJDUMP_PRIVATE_VECTORS}\"" + + diff --git a/binutils/configure.in b/binutils/configure.in index b1564bb..965d66c 100644 --- a/binutils/configure.in +++ b/binutils/configure.in @@ -179,6 +179,9 @@ BUILD_DLLWRAP= BUILD_MISC= BUILD_INSTALL_MISC= OBJDUMP_DEFS= +OBJDUMP_PRIVATE_VECTORS= +OBJDUMP_PRIVATE_OFILES= +od_vectors= for targ in $target $canon_targets do @@ -196,6 +199,7 @@ do fi DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_I386" BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)' + od_vectors="$od_vectors objdump_private_desc_xcoff" else case $targ in changequote(,)dnl @@ -217,9 +221,11 @@ changequote([,])dnl NLMCONV_DEFS="$NLMCONV_DEFS -DNLMCONV_SPARC" ;; esac + case $targ in *-*-hms*) BUILD_SRCONV='$(SRCONV_PROG)' ;; esac + case $targ in arm-epoc-pe*) BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)' @@ -298,7 +304,10 @@ changequote([,])dnl BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)' ;; powerpc*-*-linux* | powerpc*-*-elf* | powerpc*-*-eabi*) - BUILD_INSTALL_MISC="${BUILD_INSTALL_MISC} embedspu" + case "$BUILD_INSTALL_MISC" in + *embedspu*) ;; + *) BUILD_INSTALL_MISC="${BUILD_INSTALL_MISC} embedspu" + esac ;; sh*-*-pe) BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)' @@ -341,9 +350,46 @@ changequote([,])dnl OBJDUMP_DEFS="-DSKIP_ZEROES=256 -DSKIP_ZEROES_AT_END=0" ;; esac + + # Add objdump private vectors. + case $targ in + powerpc-*-aix*) + od_vectors="$od_vectors objdump_private_desc_xcoff" + ;; + esac fi done +# Uniq objdump private vector, build objdump target ofiles. +od_files= +f="" +for i in $od_vectors ; do + case " $f " in + *" $i "*) ;; + *) + f="$f $i" + OBJDUMP_PRIVATE_VECTORS="$OBJDUMP_PRIVATE_VECTORS &$i," + case $i in + objdump_private_desc_xcoff) + od_files="$od_files od-xcoff" ;; + *) AC_MSG_ERROR(*** unknown private vector $i) ;; + esac + ;; + esac +done + +# Uniq objdump target ofiles +f="" +for i in $od_files ; do + case " $f " in + *" $i "*) ;; + *) + f="$f $i" + OBJDUMP_PRIVATE_OFILES="$OBJDUMP_PRIVATE_OFILES $i.$objext" + ;; + esac +done + DLLTOOL_DEFS="$DLLTOOL_DEFS $DLLTOOL_DEFAULT" if test "${with_windres+set}" = set; then @@ -354,6 +400,8 @@ if test "${with_windmc+set}" = set; then BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)' fi +OBJDUMP_DEFS="${OBJDUMP_DEFS} -DOBJDUMP_PRIVATE_VECTORS=\"${OBJDUMP_PRIVATE_VECTORS}\"" + AC_SUBST(NLMCONV_DEFS) AC_SUBST(BUILD_NLMCONV) AC_SUBST(BUILD_SRCONV) @@ -365,6 +413,7 @@ AC_SUBST(BUILD_DLLWRAP) AC_SUBST(BUILD_MISC) AC_SUBST(BUILD_INSTALL_MISC) AC_SUBST(OBJDUMP_DEFS) +AC_SUBST(OBJDUMP_PRIVATE_OFILES) AC_DEFINE_UNQUOTED(TARGET, "${target}", [Configured target name.]) diff --git a/binutils/deflex.c b/binutils/deflex.c new file mode 100644 index 0000000..5c2f720 --- /dev/null +++ b/binutils/deflex.c @@ -0,0 +1,2104 @@ + +#line 3 "deflex.c" + +#define YY_INT_ALIGNED short int + +/* A lexical scanner generated by flex */ + +#define FLEX_SCANNER +#define YY_FLEX_MAJOR_VERSION 2 +#define YY_FLEX_MINOR_VERSION 5 +#define YY_FLEX_SUBMINOR_VERSION 35 +#if YY_FLEX_SUBMINOR_VERSION > 0 +#define FLEX_BETA +#endif + +/* First, we deal with platform-specific or compiler-specific issues. */ + +/* begin standard C headers. */ +#include +#include +#include +#include + +/* end standard C headers. */ + +/* flex integer type definitions */ + +#ifndef FLEXINT_H +#define FLEXINT_H + +/* C99 systems have . Non-C99 systems may or may not. */ + +#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L + +/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, + * if you want the limit (max/min) macros for int types. + */ +#ifndef __STDC_LIMIT_MACROS +#define __STDC_LIMIT_MACROS 1 +#endif + +#include +typedef int8_t flex_int8_t; +typedef uint8_t flex_uint8_t; +typedef int16_t flex_int16_t; +typedef uint16_t flex_uint16_t; +typedef int32_t flex_int32_t; +typedef uint32_t flex_uint32_t; +#else +typedef signed char flex_int8_t; +typedef short int flex_int16_t; +typedef int flex_int32_t; +typedef unsigned char flex_uint8_t; +typedef unsigned short int flex_uint16_t; +typedef unsigned int flex_uint32_t; +#endif /* ! C99 */ + +/* Limits of integral types. */ +#ifndef INT8_MIN +#define INT8_MIN (-128) +#endif +#ifndef INT16_MIN +#define INT16_MIN (-32767-1) +#endif +#ifndef INT32_MIN +#define INT32_MIN (-2147483647-1) +#endif +#ifndef INT8_MAX +#define INT8_MAX (127) +#endif +#ifndef INT16_MAX +#define INT16_MAX (32767) +#endif +#ifndef INT32_MAX +#define INT32_MAX (2147483647) +#endif +#ifndef UINT8_MAX +#define UINT8_MAX (255U) +#endif +#ifndef UINT16_MAX +#define UINT16_MAX (65535U) +#endif +#ifndef UINT32_MAX +#define UINT32_MAX (4294967295U) +#endif + +#endif /* ! FLEXINT_H */ + +#ifdef __cplusplus + +/* The "const" storage-class-modifier is valid. */ +#define YY_USE_CONST + +#else /* ! __cplusplus */ + +/* C99 requires __STDC__ to be defined as 1. */ +#if defined (__STDC__) + +#define YY_USE_CONST + +#endif /* defined (__STDC__) */ +#endif /* ! __cplusplus */ + +#ifdef YY_USE_CONST +#define yyconst const +#else +#define yyconst +#endif + +/* Returned upon end-of-file. */ +#define YY_NULL 0 + +/* Promotes a possibly negative, possibly signed char to an unsigned + * integer for use as an array index. If the signed char is negative, + * we want to instead treat it as an 8-bit unsigned char, hence the + * double cast. + */ +#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) + +/* Enter a start condition. This macro really ought to take a parameter, + * but we do it the disgusting crufty way forced on us by the ()-less + * definition of BEGIN. + */ +#define BEGIN (yy_start) = 1 + 2 * + +/* Translate the current start state into a value that can be later handed + * to BEGIN to return to the state. The YYSTATE alias is for lex + * compatibility. + */ +#define YY_START (((yy_start) - 1) / 2) +#define YYSTATE YY_START + +/* Action number for EOF rule of a given start state. */ +#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) + +/* Special action meaning "start processing a new file". */ +#define YY_NEW_FILE yyrestart(yyin ) + +#define YY_END_OF_BUFFER_CHAR 0 + +/* Size of default input buffer. */ +#ifndef YY_BUF_SIZE +#define YY_BUF_SIZE 16384 +#endif + +/* The state buf must be large enough to hold one state per character in the main buffer. + */ +#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) + +#ifndef YY_TYPEDEF_YY_BUFFER_STATE +#define YY_TYPEDEF_YY_BUFFER_STATE +typedef struct yy_buffer_state *YY_BUFFER_STATE; +#endif + +#ifndef YY_TYPEDEF_YY_SIZE_T +#define YY_TYPEDEF_YY_SIZE_T +typedef size_t yy_size_t; +#endif + +extern yy_size_t yyleng; + +extern FILE *yyin, *yyout; + +#define EOB_ACT_CONTINUE_SCAN 0 +#define EOB_ACT_END_OF_FILE 1 +#define EOB_ACT_LAST_MATCH 2 + + #define YY_LESS_LINENO(n) + +/* Return all but the first "n" matched characters back to the input stream. */ +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + *yy_cp = (yy_hold_char); \ + YY_RESTORE_YY_MORE_OFFSET \ + (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ + YY_DO_BEFORE_ACTION; /* set up yytext again */ \ + } \ + while ( 0 ) + +#define unput(c) yyunput( c, (yytext_ptr) ) + +#ifndef YY_STRUCT_YY_BUFFER_STATE +#define YY_STRUCT_YY_BUFFER_STATE +struct yy_buffer_state + { + FILE *yy_input_file; + + char *yy_ch_buf; /* input buffer */ + char *yy_buf_pos; /* current position in input buffer */ + + /* Size of input buffer in bytes, not including room for EOB + * characters. + */ + yy_size_t yy_buf_size; + + /* Number of characters read into yy_ch_buf, not including EOB + * characters. + */ + yy_size_t yy_n_chars; + + /* Whether we "own" the buffer - i.e., we know we created it, + * and can realloc() it to grow it, and should free() it to + * delete it. + */ + int yy_is_our_buffer; + + /* Whether this is an "interactive" input source; if so, and + * if we're using stdio for input, then we want to use getc() + * instead of fread(), to make sure we stop fetching input after + * each newline. + */ + int yy_is_interactive; + + /* Whether we're considered to be at the beginning of a line. + * If so, '^' rules will be active on the next match, otherwise + * not. + */ + int yy_at_bol; + + int yy_bs_lineno; /**< The line count. */ + int yy_bs_column; /**< The column count. */ + + /* Whether to try to fill the input buffer when we reach the + * end of it. + */ + int yy_fill_buffer; + + int yy_buffer_status; + +#define YY_BUFFER_NEW 0 +#define YY_BUFFER_NORMAL 1 + /* When an EOF's been seen but there's still some text to process + * then we mark the buffer as YY_EOF_PENDING, to indicate that we + * shouldn't try reading from the input source any more. We might + * still have a bunch of tokens to match, though, because of + * possible backing-up. + * + * When we actually see the EOF, we change the status to "new" + * (via yyrestart()), so that the user can continue scanning by + * just pointing yyin at a new input file. + */ +#define YY_BUFFER_EOF_PENDING 2 + + }; +#endif /* !YY_STRUCT_YY_BUFFER_STATE */ + +/* Stack of input buffers. */ +static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ +static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ +static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ + +/* We provide macros for accessing buffer states in case in the + * future we want to put the buffer states in a more general + * "scanner state". + * + * Returns the top of the stack, or NULL. + */ +#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ + ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ + : NULL) + +/* Same as previous macro, but useful when we know that the buffer stack is not + * NULL or when we need an lvalue. For internal use only. + */ +#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] + +/* yy_hold_char holds the character lost when yytext is formed. */ +static char yy_hold_char; +static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */ +yy_size_t yyleng; + +/* Points to current character in buffer. */ +static char *yy_c_buf_p = (char *) 0; +static int yy_init = 0; /* whether we need to initialize */ +static int yy_start = 0; /* start state number */ + +/* Flag which is used to allow yywrap()'s to do buffer switches + * instead of setting up a fresh yyin. A bit of a hack ... + */ +static int yy_did_buffer_switch_on_eof; + +void yyrestart (FILE *input_file ); +void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ); +YY_BUFFER_STATE yy_create_buffer (FILE *file,int size ); +void yy_delete_buffer (YY_BUFFER_STATE b ); +void yy_flush_buffer (YY_BUFFER_STATE b ); +void yypush_buffer_state (YY_BUFFER_STATE new_buffer ); +void yypop_buffer_state (void ); + +static void yyensure_buffer_stack (void ); +static void yy_load_buffer_state (void ); +static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file ); + +#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER ) + +YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size ); +YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str ); +YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,yy_size_t len ); + +void *yyalloc (yy_size_t ); +void *yyrealloc (void *,yy_size_t ); +void yyfree (void * ); + +#define yy_new_buffer yy_create_buffer + +#define yy_set_interactive(is_interactive) \ + { \ + if ( ! YY_CURRENT_BUFFER ){ \ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer(yyin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ + } + +#define yy_set_bol(at_bol) \ + { \ + if ( ! YY_CURRENT_BUFFER ){\ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer(yyin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ + } + +#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) + +/* Begin user sect3 */ + +typedef unsigned char YY_CHAR; + +FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0; + +typedef int yy_state_type; + +extern int yylineno; + +int yylineno = 1; + +extern char *yytext; +#define yytext_ptr yytext + +static yy_state_type yy_get_previous_state (void ); +static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); +static int yy_get_next_buffer (void ); +static void yy_fatal_error (yyconst char msg[] ); + +/* Done after the current pattern has been matched and before the + * corresponding action - sets up yytext. + */ +#define YY_DO_BEFORE_ACTION \ + (yytext_ptr) = yy_bp; \ + yyleng = (size_t) (yy_cp - yy_bp); \ + (yy_hold_char) = *yy_cp; \ + *yy_cp = '\0'; \ + (yy_c_buf_p) = yy_cp; + +#define YY_NUM_RULES 42 +#define YY_END_OF_BUFFER 43 +/* This struct is not used in this scanner, + but its presence is necessary. */ +struct yy_trans_info + { + flex_int32_t yy_verify; + flex_int32_t yy_nxt; + }; +static yyconst flex_int16_t yy_accept[199] = + { 0, + 0, 0, 43, 42, 34, 36, 35, 33, 42, 28, + 42, 31, 41, 39, 27, 32, 38, 40, 28, 28, + 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, + 28, 28, 28, 0, 29, 28, 0, 30, 31, 27, + 32, 37, 28, 28, 28, 28, 28, 28, 28, 28, + 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, + 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, + 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, + 28, 28, 28, 28, 28, 28, 28, 12, 6, 28, + 7, 28, 28, 28, 28, 28, 28, 28, 28, 1, + + 28, 28, 28, 16, 28, 28, 28, 28, 28, 28, + 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, + 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, + 28, 17, 28, 28, 28, 28, 28, 28, 28, 28, + 28, 28, 14, 28, 28, 28, 19, 21, 28, 28, + 28, 28, 28, 28, 18, 9, 28, 10, 28, 28, + 2, 28, 28, 15, 28, 28, 28, 28, 11, 13, + 28, 5, 28, 28, 22, 28, 8, 28, 28, 28, + 28, 28, 28, 20, 4, 28, 28, 28, 24, 28, + 26, 28, 3, 28, 28, 23, 25, 0 + + } ; + +static yyconst flex_int32_t yy_ec[256] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, + 1, 1, 4, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 5, 1, 6, 1, 7, 1, 1, 8, 1, + 1, 9, 1, 10, 7, 11, 12, 13, 13, 13, + 13, 13, 13, 13, 13, 13, 13, 7, 14, 12, + 15, 12, 7, 16, 17, 18, 19, 20, 21, 22, + 23, 24, 25, 7, 26, 27, 28, 29, 30, 31, + 7, 32, 33, 34, 35, 36, 37, 38, 39, 40, + 1, 1, 1, 1, 7, 1, 22, 22, 22, 22, + + 22, 22, 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 22, + 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1 + } ; + +static yyconst flex_int32_t yy_meta[41] = + { 0, + 1, 1, 2, 1, 1, 1, 3, 1, 1, 1, + 1, 4, 5, 1, 1, 4, 6, 6, 6, 6, + 6, 6, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 + } ; + +static yyconst flex_int16_t yy_base[206] = + { 0, + 0, 0, 230, 231, 231, 231, 231, 231, 223, 0, + 220, 0, 231, 231, 0, 0, 212, 0, 209, 195, + 24, 186, 202, 14, 197, 186, 27, 188, 198, 25, + 197, 196, 184, 209, 231, 0, 206, 231, 0, 0, + 0, 231, 0, 180, 27, 178, 178, 27, 193, 178, + 183, 189, 179, 177, 175, 178, 185, 182, 183, 170, + 181, 165, 164, 170, 173, 172, 159, 174, 171, 170, + 158, 156, 156, 151, 152, 149, 161, 34, 145, 160, + 145, 146, 154, 157, 147, 141, 139, 0, 0, 138, + 0, 139, 135, 137, 135, 135, 29, 149, 140, 0, + + 136, 139, 145, 0, 136, 139, 132, 132, 30, 132, + 135, 138, 129, 119, 118, 126, 116, 122, 119, 115, + 115, 124, 127, 109, 112, 121, 119, 106, 111, 108, + 106, 0, 106, 103, 112, 99, 91, 97, 99, 95, + 88, 99, 0, 93, 103, 94, 0, 0, 97, 91, + 87, 90, 84, 83, 0, 0, 95, 0, 97, 80, + 0, 92, 91, 0, 78, 70, 91, 74, 0, 0, + 82, 0, 89, 88, 0, 84, 0, 82, 85, 83, + 69, 66, 56, 0, 0, 39, 36, 35, 0, 44, + 0, 43, 0, 40, 39, 0, 0, 231, 67, 71, + + 77, 83, 85, 91, 95 + } ; + +static yyconst flex_int16_t yy_def[206] = + { 0, + 198, 1, 198, 198, 198, 198, 198, 198, 199, 200, + 201, 202, 198, 198, 203, 204, 198, 205, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 199, 198, 200, 201, 198, 202, 203, + 204, 198, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 0, 198, 198, + + 198, 198, 198, 198, 198 + } ; + +static yyconst flex_int16_t yy_nxt[272] = + { 0, + 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, + 14, 4, 15, 16, 17, 18, 10, 19, 20, 21, + 22, 10, 10, 23, 24, 10, 25, 26, 27, 10, + 28, 29, 30, 31, 10, 32, 33, 10, 10, 10, + 46, 50, 51, 54, 47, 58, 66, 70, 59, 60, + 101, 118, 129, 119, 130, 67, 55, 71, 61, 197, + 196, 195, 194, 193, 192, 191, 102, 34, 34, 34, + 34, 34, 34, 36, 36, 36, 36, 37, 37, 37, + 37, 37, 37, 39, 190, 39, 39, 39, 39, 40, + 40, 41, 189, 41, 41, 41, 41, 43, 188, 187, + + 43, 186, 185, 184, 183, 182, 181, 180, 179, 178, + 177, 176, 175, 174, 173, 172, 171, 170, 169, 168, + 167, 166, 165, 164, 163, 162, 161, 160, 159, 158, + 157, 156, 155, 154, 153, 152, 151, 150, 149, 148, + 147, 146, 145, 144, 143, 142, 141, 140, 139, 138, + 137, 136, 135, 134, 133, 132, 131, 128, 127, 126, + 125, 124, 123, 122, 121, 120, 117, 116, 115, 114, + 113, 112, 111, 110, 109, 108, 107, 106, 105, 104, + 103, 100, 99, 98, 97, 96, 95, 94, 93, 92, + 91, 90, 89, 88, 87, 86, 85, 84, 83, 82, + + 81, 80, 79, 78, 77, 76, 75, 74, 73, 72, + 69, 68, 65, 38, 35, 64, 63, 62, 57, 56, + 53, 52, 49, 48, 45, 44, 42, 38, 35, 198, + 3, 198, 198, 198, 198, 198, 198, 198, 198, 198, + 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, + 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, + 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, + 198 + } ; + +static yyconst flex_int16_t yy_chk[272] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 21, 24, 24, 27, 21, 30, 45, 48, 30, 30, + 78, 97, 109, 97, 109, 45, 27, 48, 30, 195, + 194, 192, 190, 188, 187, 186, 78, 199, 199, 199, + 199, 199, 199, 200, 200, 200, 200, 201, 201, 201, + 201, 201, 201, 202, 183, 202, 202, 202, 202, 203, + 203, 204, 182, 204, 204, 204, 204, 205, 181, 180, + + 205, 179, 178, 176, 174, 173, 171, 168, 167, 166, + 165, 163, 162, 160, 159, 157, 154, 153, 152, 151, + 150, 149, 146, 145, 144, 142, 141, 140, 139, 138, + 137, 136, 135, 134, 133, 131, 130, 129, 128, 127, + 126, 125, 124, 123, 122, 121, 120, 119, 118, 117, + 116, 115, 114, 113, 112, 111, 110, 108, 107, 106, + 105, 103, 102, 101, 99, 98, 96, 95, 94, 93, + 92, 90, 87, 86, 85, 84, 83, 82, 81, 80, + 79, 77, 76, 75, 74, 73, 72, 71, 70, 69, + 68, 67, 66, 65, 64, 63, 62, 61, 60, 59, + + 58, 57, 56, 55, 54, 53, 52, 51, 50, 49, + 47, 46, 44, 37, 34, 33, 32, 31, 29, 28, + 26, 25, 23, 22, 20, 19, 17, 11, 9, 3, + 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, + 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, + 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, + 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, + 198 + } ; + +static yy_state_type yy_last_accepting_state; +static char *yy_last_accepting_cpos; + +extern int yy_flex_debug; +int yy_flex_debug = 0; + +/* The intent behind this definition is that it'll catch + * any uses of REJECT which flex missed. + */ +#define REJECT reject_used_but_not_detected +#define yymore() yymore_used_but_not_detected +#define YY_MORE_ADJ 0 +#define YY_RESTORE_YY_MORE_OFFSET +char *yytext; +#line 1 "deflex.l" +#line 2 "deflex.l" + +/* Copyright 1995, 1997, 1998, 1999, 2002, 2003, 2004, 2005, 2007 + Free Software Foundation, Inc. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + + +/* Contributed by Steve Chamberlain: sac@cygnus.com */ + +#define DONTDECLARE_MALLOC +#include "libiberty.h" +#include "defparse.h" +#include "dlltool.h" + +#define YY_NO_UNPUT + +int linenumber; + +#line 609 "deflex.c" + +#define INITIAL 0 + +#ifndef YY_NO_UNISTD_H +/* Special case for "unistd.h", since it is non-ANSI. We include it way + * down here because we want the user's section 1 to have been scanned first. + * The user has a chance to override it with an option. + */ +#include +#endif + +#ifndef YY_EXTRA_TYPE +#define YY_EXTRA_TYPE void * +#endif + +static int yy_init_globals (void ); + +/* Accessor methods to globals. + These are made visible to non-reentrant scanners for convenience. */ + +int yylex_destroy (void ); + +int yyget_debug (void ); + +void yyset_debug (int debug_flag ); + +YY_EXTRA_TYPE yyget_extra (void ); + +void yyset_extra (YY_EXTRA_TYPE user_defined ); + +FILE *yyget_in (void ); + +void yyset_in (FILE * in_str ); + +FILE *yyget_out (void ); + +void yyset_out (FILE * out_str ); + +yy_size_t yyget_leng (void ); + +char *yyget_text (void ); + +int yyget_lineno (void ); + +void yyset_lineno (int line_number ); + +/* Macros after this point can all be overridden by user definitions in + * section 1. + */ + +#ifndef YY_SKIP_YYWRAP +#ifdef __cplusplus +extern "C" int yywrap (void ); +#else +extern int yywrap (void ); +#endif +#endif + + static void yyunput (int c,char *buf_ptr ); + +#ifndef yytext_ptr +static void yy_flex_strncpy (char *,yyconst char *,int ); +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * ); +#endif + +#ifndef YY_NO_INPUT + +#ifdef __cplusplus +static int yyinput (void ); +#else +static int input (void ); +#endif + +#endif + +/* Amount of stuff to slurp up with each read. */ +#ifndef YY_READ_BUF_SIZE +#define YY_READ_BUF_SIZE 8192 +#endif + +/* Copy whatever the last rule matched to the standard output. */ +#ifndef ECHO +/* This used to be an fputs(), but since the string might contain NUL's, + * we now use fwrite(). + */ +#define ECHO fwrite( yytext, yyleng, 1, yyout ) +#endif + +/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, + * is returned in "result". + */ +#ifndef YY_INPUT +#define YY_INPUT(buf,result,max_size) \ + if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ + { \ + int c = '*'; \ + yy_size_t n; \ + for ( n = 0; n < max_size && \ + (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ + buf[n] = (char) c; \ + if ( c == '\n' ) \ + buf[n++] = (char) c; \ + if ( c == EOF && ferror( yyin ) ) \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + result = n; \ + } \ + else \ + { \ + errno=0; \ + while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ + { \ + if( errno != EINTR) \ + { \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + break; \ + } \ + errno=0; \ + clearerr(yyin); \ + } \ + }\ +\ + +#endif + +/* No semi-colon after return; correct usage is to write "yyterminate();" - + * we don't want an extra ';' after the "return" because that will cause + * some compilers to complain about unreachable statements. + */ +#ifndef yyterminate +#define yyterminate() return YY_NULL +#endif + +/* Number of entries by which start-condition stack grows. */ +#ifndef YY_START_STACK_INCR +#define YY_START_STACK_INCR 25 +#endif + +/* Report a fatal error. */ +#ifndef YY_FATAL_ERROR +#define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) +#endif + +/* end tables serialization structures and prototypes */ + +/* Default declaration of generated scanner - a define so the user can + * easily add parameters. + */ +#ifndef YY_DECL +#define YY_DECL_IS_OURS 1 + +extern int yylex (void); + +#define YY_DECL int yylex (void) +#endif /* !YY_DECL */ + +/* Code executed at the beginning of each rule, after yytext and yyleng + * have been set up. + */ +#ifndef YY_USER_ACTION +#define YY_USER_ACTION +#endif + +/* Code executed at the end of each rule. */ +#ifndef YY_BREAK +#define YY_BREAK break; +#endif + +#define YY_RULE_SETUP \ + YY_USER_ACTION + +/** The main scanner function which does all the work. + */ +YY_DECL +{ + register yy_state_type yy_current_state; + register char *yy_cp, *yy_bp; + register int yy_act; + +#line 36 "deflex.l" + +#line 793 "deflex.c" + + if ( !(yy_init) ) + { + (yy_init) = 1; + +#ifdef YY_USER_INIT + YY_USER_INIT; +#endif + + if ( ! (yy_start) ) + (yy_start) = 1; /* first start state */ + + if ( ! yyin ) + yyin = stdin; + + if ( ! yyout ) + yyout = stdout; + + if ( ! YY_CURRENT_BUFFER ) { + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer(yyin,YY_BUF_SIZE ); + } + + yy_load_buffer_state( ); + } + + while ( 1 ) /* loops until end-of-file is reached */ + { + yy_cp = (yy_c_buf_p); + + /* Support of yytext. */ + *yy_cp = (yy_hold_char); + + /* yy_bp points to the position in yy_ch_buf of the start of + * the current run. + */ + yy_bp = yy_cp; + + yy_current_state = (yy_start); +yy_match: + do + { + register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)]; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 199 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + ++yy_cp; + } + while ( yy_base[yy_current_state] != 231 ); + +yy_find_action: + yy_act = yy_accept[yy_current_state]; + if ( yy_act == 0 ) + { /* have to back up */ + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + yy_act = yy_accept[yy_current_state]; + } + + YY_DO_BEFORE_ACTION; + +do_action: /* This label is used only to access EOF actions. */ + + switch ( yy_act ) + { /* beginning of action switch */ + case 0: /* must back up */ + /* undo the effects of YY_DO_BEFORE_ACTION */ + *yy_cp = (yy_hold_char); + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + goto yy_find_action; + +case 1: +YY_RULE_SETUP +#line 37 "deflex.l" +{ return NAME;} + YY_BREAK +case 2: +YY_RULE_SETUP +#line 38 "deflex.l" +{ return LIBRARY;} + YY_BREAK +case 3: +YY_RULE_SETUP +#line 39 "deflex.l" +{ return DESCRIPTION;} + YY_BREAK +case 4: +YY_RULE_SETUP +#line 40 "deflex.l" +{ return STACKSIZE;} + YY_BREAK +case 5: +YY_RULE_SETUP +#line 41 "deflex.l" +{ return HEAPSIZE;} + YY_BREAK +case 6: +YY_RULE_SETUP +#line 42 "deflex.l" +{ return CODE;} + YY_BREAK +case 7: +YY_RULE_SETUP +#line 43 "deflex.l" +{ return DATA;} + YY_BREAK +case 8: +YY_RULE_SETUP +#line 44 "deflex.l" +{ return SECTIONS;} + YY_BREAK +case 9: +YY_RULE_SETUP +#line 45 "deflex.l" +{ return EXPORTS;} + YY_BREAK +case 10: +YY_RULE_SETUP +#line 46 "deflex.l" +{ return IMPORTS;} + YY_BREAK +case 11: +YY_RULE_SETUP +#line 47 "deflex.l" +{ return VERSIONK;} + YY_BREAK +case 12: +YY_RULE_SETUP +#line 48 "deflex.l" +{ return BASE;} + YY_BREAK +case 13: +YY_RULE_SETUP +#line 49 "deflex.l" +{ return CONSTANT; } + YY_BREAK +case 14: +YY_RULE_SETUP +#line 50 "deflex.l" +{ return NONAME; } + YY_BREAK +case 15: +YY_RULE_SETUP +#line 51 "deflex.l" +{ return PRIVATE; } + YY_BREAK +case 16: +YY_RULE_SETUP +#line 52 "deflex.l" +{ return READ;} + YY_BREAK +case 17: +YY_RULE_SETUP +#line 53 "deflex.l" +{ return WRITE;} + YY_BREAK +case 18: +YY_RULE_SETUP +#line 54 "deflex.l" +{ return EXECUTE;} + YY_BREAK +case 19: +YY_RULE_SETUP +#line 55 "deflex.l" +{ return SHARED;} + YY_BREAK +case 20: +YY_RULE_SETUP +#line 56 "deflex.l" +{ return NONSHARED;} + YY_BREAK +case 21: +YY_RULE_SETUP +#line 57 "deflex.l" +{ return SINGLE;} + YY_BREAK +case 22: +YY_RULE_SETUP +#line 58 "deflex.l" +{ return MULTIPLE;} + YY_BREAK +case 23: +YY_RULE_SETUP +#line 59 "deflex.l" +{ return INITINSTANCE;} + YY_BREAK +case 24: +YY_RULE_SETUP +#line 60 "deflex.l" +{ return INITGLOBAL;} + YY_BREAK +case 25: +YY_RULE_SETUP +#line 61 "deflex.l" +{ return TERMINSTANCE;} + YY_BREAK +case 26: +YY_RULE_SETUP +#line 62 "deflex.l" +{ return TERMGLOBAL;} + YY_BREAK +case 27: +YY_RULE_SETUP +#line 64 "deflex.l" +{ yylval.number = strtol (yytext,0,0); + return NUMBER; } + YY_BREAK +case 28: +YY_RULE_SETUP +#line 67 "deflex.l" +{ + yylval.id = xstrdup (yytext); + return ID; + } + YY_BREAK +case 29: +/* rule 29 can match eol */ +YY_RULE_SETUP +#line 72 "deflex.l" +{ + yylval.id = xstrdup (yytext+1); + yylval.id[yyleng-2] = 0; + return ID; + } + YY_BREAK +case 30: +/* rule 30 can match eol */ +YY_RULE_SETUP +#line 78 "deflex.l" +{ + yylval.id = xstrdup (yytext+1); + yylval.id[yyleng-2] = 0; + return ID; + } + YY_BREAK +case 31: +YY_RULE_SETUP +#line 83 "deflex.l" +{ } + YY_BREAK +case 32: +YY_RULE_SETUP +#line 84 "deflex.l" +{ } + YY_BREAK +case 33: +YY_RULE_SETUP +#line 85 "deflex.l" +{ } + YY_BREAK +case 34: +YY_RULE_SETUP +#line 86 "deflex.l" +{ } + YY_BREAK +case 35: +YY_RULE_SETUP +#line 87 "deflex.l" +{ } + YY_BREAK +case 36: +/* rule 36 can match eol */ +YY_RULE_SETUP +#line 88 "deflex.l" +{ linenumber ++ ;} + YY_BREAK +case 37: +YY_RULE_SETUP +#line 89 "deflex.l" +{ return EQUAL;} + YY_BREAK +case 38: +YY_RULE_SETUP +#line 90 "deflex.l" +{ return '=';} + YY_BREAK +case 39: +YY_RULE_SETUP +#line 91 "deflex.l" +{ return '.';} + YY_BREAK +case 40: +YY_RULE_SETUP +#line 92 "deflex.l" +{ return '@';} + YY_BREAK +case 41: +YY_RULE_SETUP +#line 93 "deflex.l" +{ return ',';} + YY_BREAK +case 42: +YY_RULE_SETUP +#line 94 "deflex.l" +ECHO; + YY_BREAK +#line 1101 "deflex.c" +case YY_STATE_EOF(INITIAL): + yyterminate(); + + case YY_END_OF_BUFFER: + { + /* Amount of text matched not including the EOB char. */ + int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; + + /* Undo the effects of YY_DO_BEFORE_ACTION. */ + *yy_cp = (yy_hold_char); + YY_RESTORE_YY_MORE_OFFSET + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) + { + /* We're scanning a new file or input source. It's + * possible that this happened because the user + * just pointed yyin at a new source and called + * yylex(). If so, then we have to assure + * consistency between YY_CURRENT_BUFFER and our + * globals. Here is the right place to do so, because + * this is the first action (other than possibly a + * back-up) that will match for the new input source. + */ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; + } + + /* Note that here we test for yy_c_buf_p "<=" to the position + * of the first EOB in the buffer, since yy_c_buf_p will + * already have been incremented past the NUL character + * (since all states make transitions on EOB to the + * end-of-buffer state). Contrast this with the test + * in input(). + */ + if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + { /* This was really a NUL. */ + yy_state_type yy_next_state; + + (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + /* Okay, we're now positioned to make the NUL + * transition. We couldn't have + * yy_get_previous_state() go ahead and do it + * for us because it doesn't know how to deal + * with the possibility of jamming (and we don't + * want to build jamming into it because then it + * will run more slowly). + */ + + yy_next_state = yy_try_NUL_trans( yy_current_state ); + + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + + if ( yy_next_state ) + { + /* Consume the NUL. */ + yy_cp = ++(yy_c_buf_p); + yy_current_state = yy_next_state; + goto yy_match; + } + + else + { + yy_cp = (yy_c_buf_p); + goto yy_find_action; + } + } + + else switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_END_OF_FILE: + { + (yy_did_buffer_switch_on_eof) = 0; + + if ( yywrap( ) ) + { + /* Note: because we've taken care in + * yy_get_next_buffer() to have set up + * yytext, we can now set up + * yy_c_buf_p so that if some total + * hoser (like flex itself) wants to + * call the scanner after we return the + * YY_NULL, it'll still work - another + * YY_NULL will get returned. + */ + (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; + + yy_act = YY_STATE_EOF(YY_START); + goto do_action; + } + + else + { + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; + } + break; + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = + (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_match; + + case EOB_ACT_LAST_MATCH: + (yy_c_buf_p) = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_find_action; + } + break; + } + + default: + YY_FATAL_ERROR( + "fatal flex scanner internal error--no action found" ); + } /* end of action switch */ + } /* end of scanning one token */ +} /* end of yylex */ + +/* yy_get_next_buffer - try to read in a new buffer + * + * Returns a code representing an action: + * EOB_ACT_LAST_MATCH - + * EOB_ACT_CONTINUE_SCAN - continue scanning from current position + * EOB_ACT_END_OF_FILE - end of file + */ +static int yy_get_next_buffer (void) +{ + register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; + register char *source = (yytext_ptr); + register int number_to_move, i; + int ret_val; + + if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) + YY_FATAL_ERROR( + "fatal flex scanner internal error--end of buffer missed" ); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) + { /* Don't try to fill the buffer, so this is an EOF. */ + if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) + { + /* We matched a single character, the EOB, so + * treat this as a final EOF. + */ + return EOB_ACT_END_OF_FILE; + } + + else + { + /* We matched some text prior to the EOB, first + * process it. + */ + return EOB_ACT_LAST_MATCH; + } + } + + /* Try to read more data. */ + + /* First move last chars to start of buffer. */ + number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; + + for ( i = 0; i < number_to_move; ++i ) + *(dest++) = *(source++); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) + /* don't do the read, it's not guaranteed to return an EOF, + * just force an EOF + */ + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; + + else + { + yy_size_t num_to_read = + YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; + + while ( num_to_read <= 0 ) + { /* Not enough room in the buffer - grow it. */ + + /* just a shorter name for the current buffer */ + YY_BUFFER_STATE b = YY_CURRENT_BUFFER; + + int yy_c_buf_p_offset = + (int) ((yy_c_buf_p) - b->yy_ch_buf); + + if ( b->yy_is_our_buffer ) + { + yy_size_t new_size = b->yy_buf_size * 2; + + if ( new_size <= 0 ) + b->yy_buf_size += b->yy_buf_size / 8; + else + b->yy_buf_size *= 2; + + b->yy_ch_buf = (char *) + /* Include room in for 2 EOB chars. */ + yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); + } + else + /* Can't grow it, we don't own it. */ + b->yy_ch_buf = 0; + + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( + "fatal error - scanner input buffer overflow" ); + + (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; + + num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - + number_to_move - 1; + + } + + if ( num_to_read > YY_READ_BUF_SIZE ) + num_to_read = YY_READ_BUF_SIZE; + + /* Read in more data. */ + YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), + (yy_n_chars), num_to_read ); + + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + if ( (yy_n_chars) == 0 ) + { + if ( number_to_move == YY_MORE_ADJ ) + { + ret_val = EOB_ACT_END_OF_FILE; + yyrestart(yyin ); + } + + else + { + ret_val = EOB_ACT_LAST_MATCH; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = + YY_BUFFER_EOF_PENDING; + } + } + + else + ret_val = EOB_ACT_CONTINUE_SCAN; + + if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { + /* Extend the array by 50%, plus the number we really need. */ + yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); + if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); + } + + (yy_n_chars) += number_to_move; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; + + (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; + + return ret_val; +} + +/* yy_get_previous_state - get the state just before the EOB char was reached */ + + static yy_state_type yy_get_previous_state (void) +{ + register yy_state_type yy_current_state; + register char *yy_cp; + + yy_current_state = (yy_start); + + for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) + { + register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1); + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 199 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + } + + return yy_current_state; +} + +/* yy_try_NUL_trans - try to make a transition on the NUL character + * + * synopsis + * next_state = yy_try_NUL_trans( current_state ); + */ + static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) +{ + register int yy_is_jam; + register char *yy_cp = (yy_c_buf_p); + + register YY_CHAR yy_c = 1; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 199 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + yy_is_jam = (yy_current_state == 198); + + return yy_is_jam ? 0 : yy_current_state; +} + + static void yyunput (int c, register char * yy_bp ) +{ + register char *yy_cp; + + yy_cp = (yy_c_buf_p); + + /* undo effects of setting up yytext */ + *yy_cp = (yy_hold_char); + + if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) + { /* need to shift things up to make room */ + /* +2 for EOB chars. */ + register yy_size_t number_to_move = (yy_n_chars) + 2; + register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[ + YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2]; + register char *source = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]; + + while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) + *--dest = *--source; + + yy_cp += (int) (dest - source); + yy_bp += (int) (dest - source); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size; + + if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) + YY_FATAL_ERROR( "flex scanner push-back overflow" ); + } + + *--yy_cp = (char) c; + + (yytext_ptr) = yy_bp; + (yy_hold_char) = *yy_cp; + (yy_c_buf_p) = yy_cp; +} + +#ifndef YY_NO_INPUT +#ifdef __cplusplus + static int yyinput (void) +#else + static int input (void) +#endif + +{ + int c; + + *(yy_c_buf_p) = (yy_hold_char); + + if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) + { + /* yy_c_buf_p now points to the character we want to return. + * If this occurs *before* the EOB characters, then it's a + * valid NUL; if not, then we've hit the end of the buffer. + */ + if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + /* This was really a NUL. */ + *(yy_c_buf_p) = '\0'; + + else + { /* need more input */ + yy_size_t offset = (yy_c_buf_p) - (yytext_ptr); + ++(yy_c_buf_p); + + switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_LAST_MATCH: + /* This happens because yy_g_n_b() + * sees that we've accumulated a + * token and flags that we need to + * try matching the token before + * proceeding. But for input(), + * there's no matching to consider. + * So convert the EOB_ACT_LAST_MATCH + * to EOB_ACT_END_OF_FILE. + */ + + /* Reset buffer status. */ + yyrestart(yyin ); + + /*FALLTHROUGH*/ + + case EOB_ACT_END_OF_FILE: + { + if ( yywrap( ) ) + return 0; + + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; +#ifdef __cplusplus + return yyinput(); +#else + return input(); +#endif + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = (yytext_ptr) + offset; + break; + } + } + } + + c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ + *(yy_c_buf_p) = '\0'; /* preserve yytext */ + (yy_hold_char) = *++(yy_c_buf_p); + + return c; +} +#endif /* ifndef YY_NO_INPUT */ + +/** Immediately switch to a different input stream. + * @param input_file A readable stream. + * + * @note This function does not reset the start condition to @c INITIAL . + */ + void yyrestart (FILE * input_file ) +{ + + if ( ! YY_CURRENT_BUFFER ){ + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer(yyin,YY_BUF_SIZE ); + } + + yy_init_buffer(YY_CURRENT_BUFFER,input_file ); + yy_load_buffer_state( ); +} + +/** Switch to a different input buffer. + * @param new_buffer The new input buffer. + * + */ + void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ) +{ + + /* TODO. We should be able to replace this entire function body + * with + * yypop_buffer_state(); + * yypush_buffer_state(new_buffer); + */ + yyensure_buffer_stack (); + if ( YY_CURRENT_BUFFER == new_buffer ) + return; + + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + YY_CURRENT_BUFFER_LVALUE = new_buffer; + yy_load_buffer_state( ); + + /* We don't actually know whether we did this switch during + * EOF (yywrap()) processing, but the only time this flag + * is looked at is after yywrap() is called, so it's safe + * to go ahead and always set it. + */ + (yy_did_buffer_switch_on_eof) = 1; +} + +static void yy_load_buffer_state (void) +{ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; + yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; + (yy_hold_char) = *(yy_c_buf_p); +} + +/** Allocate and initialize an input buffer state. + * @param file A readable stream. + * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. + * + * @return the allocated buffer state. + */ + YY_BUFFER_STATE yy_create_buffer (FILE * file, int size ) +{ + YY_BUFFER_STATE b; + + b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_buf_size = size; + + /* yy_ch_buf has to be 2 characters longer than the size given because + * we need to put in 2 end-of-buffer characters. + */ + b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 ); + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_is_our_buffer = 1; + + yy_init_buffer(b,file ); + + return b; +} + +/** Destroy the buffer. + * @param b a buffer created with yy_create_buffer() + * + */ + void yy_delete_buffer (YY_BUFFER_STATE b ) +{ + + if ( ! b ) + return; + + if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ + YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; + + if ( b->yy_is_our_buffer ) + yyfree((void *) b->yy_ch_buf ); + + yyfree((void *) b ); +} + +#ifndef __cplusplus +extern int isatty (int ); +#endif /* __cplusplus */ + +/* Initializes or reinitializes a buffer. + * This function is sometimes called more than once on the same buffer, + * such as during a yyrestart() or at EOF. + */ + static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file ) + +{ + int oerrno = errno; + + yy_flush_buffer(b ); + + b->yy_input_file = file; + b->yy_fill_buffer = 1; + + /* If b is the current buffer, then yy_init_buffer was _probably_ + * called from yyrestart() or through yy_get_next_buffer. + * In that case, we don't want to reset the lineno or column. + */ + if (b != YY_CURRENT_BUFFER){ + b->yy_bs_lineno = 1; + b->yy_bs_column = 0; + } + + b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0; + + errno = oerrno; +} + +/** Discard all buffered characters. On the next scan, YY_INPUT will be called. + * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. + * + */ + void yy_flush_buffer (YY_BUFFER_STATE b ) +{ + if ( ! b ) + return; + + b->yy_n_chars = 0; + + /* We always need two end-of-buffer characters. The first causes + * a transition to the end-of-buffer state. The second causes + * a jam in that state. + */ + b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; + b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; + + b->yy_buf_pos = &b->yy_ch_buf[0]; + + b->yy_at_bol = 1; + b->yy_buffer_status = YY_BUFFER_NEW; + + if ( b == YY_CURRENT_BUFFER ) + yy_load_buffer_state( ); +} + +/** Pushes the new state onto the stack. The new state becomes + * the current state. This function will allocate the stack + * if necessary. + * @param new_buffer The new state. + * + */ +void yypush_buffer_state (YY_BUFFER_STATE new_buffer ) +{ + if (new_buffer == NULL) + return; + + yyensure_buffer_stack(); + + /* This block is copied from yy_switch_to_buffer. */ + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + /* Only push if top exists. Otherwise, replace top. */ + if (YY_CURRENT_BUFFER) + (yy_buffer_stack_top)++; + YY_CURRENT_BUFFER_LVALUE = new_buffer; + + /* copied from yy_switch_to_buffer. */ + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; +} + +/** Removes and deletes the top of the stack, if present. + * The next element becomes the new top. + * + */ +void yypop_buffer_state (void) +{ + if (!YY_CURRENT_BUFFER) + return; + + yy_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + if ((yy_buffer_stack_top) > 0) + --(yy_buffer_stack_top); + + if (YY_CURRENT_BUFFER) { + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; + } +} + +/* Allocates the stack if it does not exist. + * Guarantees space for at least one push. + */ +static void yyensure_buffer_stack (void) +{ + yy_size_t num_to_alloc; + + if (!(yy_buffer_stack)) { + + /* First allocation is just for 2 elements, since we don't know if this + * scanner will even need a stack. We use 2 instead of 1 to avoid an + * immediate realloc on the next call. + */ + num_to_alloc = 1; + (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc + (num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); + + memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); + + (yy_buffer_stack_max) = num_to_alloc; + (yy_buffer_stack_top) = 0; + return; + } + + if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ + + /* Increase the buffer to prepare for a possible push. */ + int grow_size = 8 /* arbitrary grow size */; + + num_to_alloc = (yy_buffer_stack_max) + grow_size; + (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc + ((yy_buffer_stack), + num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); + + /* zero only the new slots.*/ + memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); + (yy_buffer_stack_max) = num_to_alloc; + } +} + +/** Setup the input buffer state to scan directly from a user-specified character buffer. + * @param base the character buffer + * @param size the size in bytes of the character buffer + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size ) +{ + YY_BUFFER_STATE b; + + if ( size < 2 || + base[size-2] != YY_END_OF_BUFFER_CHAR || + base[size-1] != YY_END_OF_BUFFER_CHAR ) + /* They forgot to leave room for the EOB's. */ + return 0; + + b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); + + b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ + b->yy_buf_pos = b->yy_ch_buf = base; + b->yy_is_our_buffer = 0; + b->yy_input_file = 0; + b->yy_n_chars = b->yy_buf_size; + b->yy_is_interactive = 0; + b->yy_at_bol = 1; + b->yy_fill_buffer = 0; + b->yy_buffer_status = YY_BUFFER_NEW; + + yy_switch_to_buffer(b ); + + return b; +} + +/** Setup the input buffer state to scan a string. The next call to yylex() will + * scan from a @e copy of @a str. + * @param yystr a NUL-terminated string to scan + * + * @return the newly allocated buffer state object. + * @note If you want to scan bytes that may contain NUL values, then use + * yy_scan_bytes() instead. + */ +YY_BUFFER_STATE yy_scan_string (yyconst char * yystr ) +{ + + return yy_scan_bytes(yystr,strlen(yystr) ); +} + +/** Setup the input buffer state to scan the given bytes. The next call to yylex() will + * scan from a @e copy of @a bytes. + * @param bytes the byte buffer to scan + * @param len the number of bytes in the buffer pointed to by @a bytes. + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len ) +{ + YY_BUFFER_STATE b; + char *buf; + yy_size_t n, i; + + /* Get memory for full buffer, including space for trailing EOB's. */ + n = _yybytes_len + 2; + buf = (char *) yyalloc(n ); + if ( ! buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); + + for ( i = 0; i < _yybytes_len; ++i ) + buf[i] = yybytes[i]; + + buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; + + b = yy_scan_buffer(buf,n ); + if ( ! b ) + YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); + + /* It's okay to grow etc. this buffer, and we should throw it + * away when we're done. + */ + b->yy_is_our_buffer = 1; + + return b; +} + +#ifndef YY_EXIT_FAILURE +#define YY_EXIT_FAILURE 2 +#endif + +static void yy_fatal_error (yyconst char* msg ) +{ + (void) fprintf( stderr, "%s\n", msg ); + exit( YY_EXIT_FAILURE ); +} + +/* Redefine yyless() so it works in section 3 code. */ + +#undef yyless +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + yytext[yyleng] = (yy_hold_char); \ + (yy_c_buf_p) = yytext + yyless_macro_arg; \ + (yy_hold_char) = *(yy_c_buf_p); \ + *(yy_c_buf_p) = '\0'; \ + yyleng = yyless_macro_arg; \ + } \ + while ( 0 ) + +/* Accessor methods (get/set functions) to struct members. */ + +/** Get the current line number. + * + */ +int yyget_lineno (void) +{ + + return yylineno; +} + +/** Get the input stream. + * + */ +FILE *yyget_in (void) +{ + return yyin; +} + +/** Get the output stream. + * + */ +FILE *yyget_out (void) +{ + return yyout; +} + +/** Get the length of the current token. + * + */ +yy_size_t yyget_leng (void) +{ + return yyleng; +} + +/** Get the current token. + * + */ + +char *yyget_text (void) +{ + return yytext; +} + +/** Set the current line number. + * @param line_number + * + */ +void yyset_lineno (int line_number ) +{ + + yylineno = line_number; +} + +/** Set the input stream. This does not discard the current + * input buffer. + * @param in_str A readable stream. + * + * @see yy_switch_to_buffer + */ +void yyset_in (FILE * in_str ) +{ + yyin = in_str ; +} + +void yyset_out (FILE * out_str ) +{ + yyout = out_str ; +} + +int yyget_debug (void) +{ + return yy_flex_debug; +} + +void yyset_debug (int bdebug ) +{ + yy_flex_debug = bdebug ; +} + +static int yy_init_globals (void) +{ + /* Initialization is the same as for the non-reentrant scanner. + * This function is called from yylex_destroy(), so don't allocate here. + */ + + (yy_buffer_stack) = 0; + (yy_buffer_stack_top) = 0; + (yy_buffer_stack_max) = 0; + (yy_c_buf_p) = (char *) 0; + (yy_init) = 0; + (yy_start) = 0; + +/* Defined in main.c */ +#ifdef YY_STDINIT + yyin = stdin; + yyout = stdout; +#else + yyin = (FILE *) 0; + yyout = (FILE *) 0; +#endif + + /* For future reference: Set errno on error, since we are called by + * yylex_init() + */ + return 0; +} + +/* yylex_destroy is for both reentrant and non-reentrant scanners. */ +int yylex_destroy (void) +{ + + /* Pop the buffer stack, destroying each element. */ + while(YY_CURRENT_BUFFER){ + yy_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + yypop_buffer_state(); + } + + /* Destroy the stack itself. */ + yyfree((yy_buffer_stack) ); + (yy_buffer_stack) = NULL; + + /* Reset the globals. This is important in a non-reentrant scanner so the next time + * yylex() is called, initialization will occur. */ + yy_init_globals( ); + + return 0; +} + +/* + * Internal utility routines. + */ + +#ifndef yytext_ptr +static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) +{ + register int i; + for ( i = 0; i < n; ++i ) + s1[i] = s2[i]; +} +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * s ) +{ + register int n; + for ( n = 0; s[n]; ++n ) + ; + + return n; +} +#endif + +void *yyalloc (yy_size_t size ) +{ + return (void *) malloc( size ); +} + +void *yyrealloc (void * ptr, yy_size_t size ) +{ + /* The cast to (char *) in the following accommodates both + * implementations that use char* generic pointers, and those + * that use void* generic pointers. It works with the latter + * because both ANSI C and C++ allow castless assignment from + * any pointer type to void*, and deal with argument conversions + * as though doing an assignment. + */ + return (void *) realloc( (char *) ptr, size ); +} + +void yyfree (void * ptr ) +{ + free( (char *) ptr ); /* see yyrealloc() for (char *) cast */ +} + +#define YYTABLES_NAME "yytables" + +#line 94 "deflex.l" + + +#ifndef yywrap +/* Needed for lex, though not flex. */ +int yywrap(void) { return 1; } +#endif + diff --git a/binutils/defparse.c b/binutils/defparse.c new file mode 100644 index 0000000..dc3aba9 --- /dev/null +++ b/binutils/defparse.c @@ -0,0 +1,1966 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton implementation for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* C LALR(1) parser skeleton written by Richard Stallman, by + simplifying the original so-called "semantic" parser. */ + +/* All symbols defined below should begin with yy or YY, to avoid + infringing on user name space. This should be done even for local + variables, as they might otherwise be expanded by user macros. + There are some unavoidable exceptions within include files to + define necessary library symbols; they are noted "INFRINGES ON + USER NAME SPACE" below. */ + +/* Identify Bison output. */ +#define YYBISON 1 + +/* Bison version. */ +#define YYBISON_VERSION "2.3" + +/* Skeleton name. */ +#define YYSKELETON_NAME "yacc.c" + +/* Pure parsers. */ +#define YYPURE 0 + +/* Using locations. */ +#define YYLSP_NEEDED 0 + + + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + NAME = 258, + LIBRARY = 259, + DESCRIPTION = 260, + STACKSIZE = 261, + HEAPSIZE = 262, + CODE = 263, + DATA = 264, + SECTIONS = 265, + EXPORTS = 266, + IMPORTS = 267, + VERSIONK = 268, + BASE = 269, + CONSTANT = 270, + READ = 271, + WRITE = 272, + EXECUTE = 273, + SHARED = 274, + NONSHARED = 275, + NONAME = 276, + PRIVATE = 277, + SINGLE = 278, + MULTIPLE = 279, + INITINSTANCE = 280, + INITGLOBAL = 281, + TERMINSTANCE = 282, + TERMGLOBAL = 283, + EQUAL = 284, + ID = 285, + NUMBER = 286 + }; +#endif +/* Tokens. */ +#define NAME 258 +#define LIBRARY 259 +#define DESCRIPTION 260 +#define STACKSIZE 261 +#define HEAPSIZE 262 +#define CODE 263 +#define DATA 264 +#define SECTIONS 265 +#define EXPORTS 266 +#define IMPORTS 267 +#define VERSIONK 268 +#define BASE 269 +#define CONSTANT 270 +#define READ 271 +#define WRITE 272 +#define EXECUTE 273 +#define SHARED 274 +#define NONSHARED 275 +#define NONAME 276 +#define PRIVATE 277 +#define SINGLE 278 +#define MULTIPLE 279 +#define INITINSTANCE 280 +#define INITGLOBAL 281 +#define TERMINSTANCE 282 +#define TERMGLOBAL 283 +#define EQUAL 284 +#define ID 285 +#define NUMBER 286 + + + + +/* Copy the first part of user declarations. */ +#line 1 "defparse.y" + /* defparse.y - parser for .def files */ + +/* Copyright 1995, 1997, 1998, 1999, 2001, 2004, 2005, 2007 + Free Software Foundation, Inc. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "libiberty.h" +#include "dlltool.h" + + +/* Enabling traces. */ +#ifndef YYDEBUG +# define YYDEBUG 0 +#endif + +/* Enabling verbose error messages. */ +#ifdef YYERROR_VERBOSE +# undef YYERROR_VERBOSE +# define YYERROR_VERBOSE 1 +#else +# define YYERROR_VERBOSE 0 +#endif + +/* Enabling the token table. */ +#ifndef YYTOKEN_TABLE +# define YYTOKEN_TABLE 0 +#endif + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 29 "defparse.y" +{ + char *id; + int number; +} +/* Line 193 of yacc.c. */ +#line 191 "defparse.c" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + + + +/* Copy the second part of user declarations. */ + + +/* Line 216 of yacc.c. */ +#line 204 "defparse.c" + +#ifdef short +# undef short +#endif + +#ifdef YYTYPE_UINT8 +typedef YYTYPE_UINT8 yytype_uint8; +#else +typedef unsigned char yytype_uint8; +#endif + +#ifdef YYTYPE_INT8 +typedef YYTYPE_INT8 yytype_int8; +#elif (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +typedef signed char yytype_int8; +#else +typedef short int yytype_int8; +#endif + +#ifdef YYTYPE_UINT16 +typedef YYTYPE_UINT16 yytype_uint16; +#else +typedef unsigned short int yytype_uint16; +#endif + +#ifdef YYTYPE_INT16 +typedef YYTYPE_INT16 yytype_int16; +#else +typedef short int yytype_int16; +#endif + +#ifndef YYSIZE_T +# ifdef __SIZE_TYPE__ +# define YYSIZE_T __SIZE_TYPE__ +# elif defined size_t +# define YYSIZE_T size_t +# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# else +# define YYSIZE_T unsigned int +# endif +#endif + +#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) + +#ifndef YY_ +# if defined YYENABLE_NLS && YYENABLE_NLS +# if ENABLE_NLS +# include /* INFRINGES ON USER NAME SPACE */ +# define YY_(msgid) dgettext ("bison-runtime", msgid) +# endif +# endif +# ifndef YY_ +# define YY_(msgid) msgid +# endif +#endif + +/* Suppress unused-variable warnings by "using" E. */ +#if ! defined lint || defined __GNUC__ +# define YYUSE(e) ((void) (e)) +#else +# define YYUSE(e) /* empty */ +#endif + +/* Identity function, used to suppress warnings about constant conditions. */ +#ifndef lint +# define YYID(n) (n) +#else +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static int +YYID (int i) +#else +static int +YYID (i) + int i; +#endif +{ + return i; +} +#endif + +#if ! defined yyoverflow || YYERROR_VERBOSE + +/* The parser invokes alloca or malloc; define the necessary symbols. */ + +# ifdef YYSTACK_USE_ALLOCA +# if YYSTACK_USE_ALLOCA +# ifdef __GNUC__ +# define YYSTACK_ALLOC __builtin_alloca +# elif defined __BUILTIN_VA_ARG_INCR +# include /* INFRINGES ON USER NAME SPACE */ +# elif defined _AIX +# define YYSTACK_ALLOC __alloca +# elif defined _MSC_VER +# include /* INFRINGES ON USER NAME SPACE */ +# define alloca _alloca +# else +# define YYSTACK_ALLOC alloca +# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# endif +# endif +# endif + +# ifdef YYSTACK_ALLOC + /* Pacify GCC's `empty if-body' warning. */ +# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) +# ifndef YYSTACK_ALLOC_MAXIMUM + /* The OS might guarantee only one guard page at the bottom of the stack, + and a page size can be as small as 4096 bytes. So we cannot safely + invoke alloca (N) if N exceeds 4096. Use a slightly smaller number + to allow for a few compiler-allocated temporary stack slots. */ +# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ +# endif +# else +# define YYSTACK_ALLOC YYMALLOC +# define YYSTACK_FREE YYFREE +# ifndef YYSTACK_ALLOC_MAXIMUM +# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM +# endif +# if (defined __cplusplus && ! defined _STDLIB_H \ + && ! ((defined YYMALLOC || defined malloc) \ + && (defined YYFREE || defined free))) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# ifndef YYMALLOC +# define YYMALLOC malloc +# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifndef YYFREE +# define YYFREE free +# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void free (void *); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# endif +#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ + + +#if (! defined yyoverflow \ + && (! defined __cplusplus \ + || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) + +/* A type that is properly aligned for any stack member. */ +union yyalloc +{ + yytype_int16 yyss; + YYSTYPE yyvs; + }; + +/* The size of the maximum gap between one aligned stack and the next. */ +# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) + +/* The size of an array large to enough to hold all stacks, each with + N elements. */ +# define YYSTACK_BYTES(N) \ + ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ + + YYSTACK_GAP_MAXIMUM) + +/* Copy COUNT objects from FROM to TO. The source and destination do + not overlap. */ +# ifndef YYCOPY +# if defined __GNUC__ && 1 < __GNUC__ +# define YYCOPY(To, From, Count) \ + __builtin_memcpy (To, From, (Count) * sizeof (*(From))) +# else +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ + while (YYID (0)) +# endif +# endif + +/* Relocate STACK from its old location to the new one. The + local variables YYSIZE and YYSTACKSIZE give the old and new number of + elements in the stack, and YYPTR gives the new location of the + stack. Advance YYPTR to a properly aligned location for the next + stack. */ +# define YYSTACK_RELOCATE(Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack, Stack, yysize); \ + Stack = &yyptr->Stack; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ + while (YYID (0)) + +#endif + +/* YYFINAL -- State number of the termination state. */ +#define YYFINAL 38 +/* YYLAST -- Last index in YYTABLE. */ +#define YYLAST 120 + +/* YYNTOKENS -- Number of terminals. */ +#define YYNTOKENS 36 +/* YYNNTS -- Number of nonterminals. */ +#define YYNNTS 24 +/* YYNRULES -- Number of rules. */ +#define YYNRULES 70 +/* YYNRULES -- Number of states. */ +#define YYNSTATES 109 + +/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ +#define YYUNDEFTOK 2 +#define YYMAXUTOK 286 + +#define YYTRANSLATE(YYX) \ + ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + +/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ +static const yytype_uint8 yytranslate[] = +{ + 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 34, 2, 32, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 33, 2, 2, 35, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31 +}; + +#if YYDEBUG +/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in + YYRHS. */ +static const yytype_uint8 yyprhs[] = +{ + 0, 0, 3, 6, 8, 12, 17, 20, 23, 27, + 31, 34, 37, 40, 43, 46, 51, 52, 55, 64, + 67, 69, 78, 87, 94, 101, 108, 115, 120, 125, + 128, 130, 133, 137, 139, 141, 142, 145, 146, 148, + 150, 152, 154, 156, 158, 160, 162, 163, 165, 166, + 168, 169, 171, 172, 174, 178, 179, 182, 183, 186, + 187, 190, 195, 196, 200, 201, 202, 206, 208, 210, + 212 +}; + +/* YYRHS -- A `-1'-separated list of the rules' RHS. */ +static const yytype_int8 yyrhs[] = +{ + 37, 0, -1, 37, 38, -1, 38, -1, 3, 53, + 57, -1, 4, 53, 57, 58, -1, 11, 39, -1, + 5, 30, -1, 6, 31, 47, -1, 7, 31, 47, + -1, 8, 45, -1, 9, 45, -1, 10, 43, -1, + 12, 41, -1, 13, 31, -1, 13, 31, 32, 31, + -1, -1, 39, 40, -1, 30, 56, 54, 50, 49, + 51, 52, 55, -1, 41, 42, -1, 42, -1, 30, + 33, 30, 32, 30, 32, 30, 55, -1, 30, 33, + 30, 32, 30, 32, 31, 55, -1, 30, 33, 30, + 32, 30, 55, -1, 30, 33, 30, 32, 31, 55, + -1, 30, 32, 30, 32, 30, 55, -1, 30, 32, + 30, 32, 31, 55, -1, 30, 32, 30, 55, -1, + 30, 32, 31, 55, -1, 43, 44, -1, 44, -1, + 30, 45, -1, 45, 46, 48, -1, 48, -1, 34, + -1, -1, 34, 31, -1, -1, 16, -1, 17, -1, + 18, -1, 19, -1, 20, -1, 23, -1, 24, -1, + 15, -1, -1, 21, -1, -1, 9, -1, -1, 22, + -1, -1, 30, -1, 30, 32, 30, -1, -1, 35, + 31, -1, -1, 29, 30, -1, -1, 33, 30, -1, + 33, 30, 32, 30, -1, -1, 14, 33, 31, -1, + -1, -1, 58, 46, 59, -1, 25, -1, 26, -1, + 27, -1, 28, -1 +}; + +/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ +static const yytype_uint8 yyrline[] = +{ + 0, 47, 47, 48, 52, 53, 54, 55, 56, 57, + 58, 59, 60, 61, 62, 63, 67, 69, 73, 78, + 79, 83, 85, 87, 89, 91, 93, 95, 97, 102, + 103, 107, 111, 112, 116, 117, 119, 120, 124, 125, + 126, 127, 128, 129, 130, 134, 135, 139, 140, 144, + 145, 149, 150, 153, 154, 160, 164, 165, 169, 170, + 174, 175, 181, 184, 185, 188, 190, 194, 195, 196, + 197 +}; +#endif + +#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE +/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. + First, the terminals, then, starting at YYNTOKENS, nonterminals. */ +static const char *const yytname[] = +{ + "$end", "error", "$undefined", "NAME", "LIBRARY", "DESCRIPTION", + "STACKSIZE", "HEAPSIZE", "CODE", "DATA", "SECTIONS", "EXPORTS", + "IMPORTS", "VERSIONK", "BASE", "CONSTANT", "READ", "WRITE", "EXECUTE", + "SHARED", "NONSHARED", "NONAME", "PRIVATE", "SINGLE", "MULTIPLE", + "INITINSTANCE", "INITGLOBAL", "TERMINSTANCE", "TERMGLOBAL", "EQUAL", + "ID", "NUMBER", "'.'", "'='", "','", "'@'", "$accept", "start", + "command", "explist", "expline", "implist", "impline", "seclist", + "secline", "attr_list", "opt_comma", "opt_number", "attr", + "opt_CONSTANT", "opt_NONAME", "opt_DATA", "opt_PRIVATE", "opt_name", + "opt_ordinal", "opt_import_name", "opt_equal_name", "opt_base", + "option_list", "option", 0 +}; +#endif + +# ifdef YYPRINT +/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to + token YYLEX-NUM. */ +static const yytype_uint16 yytoknum[] = +{ + 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, + 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, + 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, + 285, 286, 46, 61, 44, 64 +}; +# endif + +/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ +static const yytype_uint8 yyr1[] = +{ + 0, 36, 37, 37, 38, 38, 38, 38, 38, 38, + 38, 38, 38, 38, 38, 38, 39, 39, 40, 41, + 41, 42, 42, 42, 42, 42, 42, 42, 42, 43, + 43, 44, 45, 45, 46, 46, 47, 47, 48, 48, + 48, 48, 48, 48, 48, 49, 49, 50, 50, 51, + 51, 52, 52, 53, 53, 53, 54, 54, 55, 55, + 56, 56, 56, 57, 57, 58, 58, 59, 59, 59, + 59 +}; + +/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ +static const yytype_uint8 yyr2[] = +{ + 0, 2, 2, 1, 3, 4, 2, 2, 3, 3, + 2, 2, 2, 2, 2, 4, 0, 2, 8, 2, + 1, 8, 8, 6, 6, 6, 6, 4, 4, 2, + 1, 2, 3, 1, 1, 0, 2, 0, 1, 1, + 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, + 0, 1, 0, 1, 3, 0, 2, 0, 2, 0, + 2, 4, 0, 3, 0, 0, 3, 1, 1, 1, + 1 +}; + +/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state + STATE-NUM when YYTABLE doesn't specify something else to do. Zero + means the default is an error. */ +static const yytype_uint8 yydefact[] = +{ + 0, 55, 55, 0, 0, 0, 0, 0, 0, 16, + 0, 0, 0, 3, 53, 64, 64, 7, 37, 37, + 38, 39, 40, 41, 42, 43, 44, 10, 33, 11, + 0, 12, 30, 6, 0, 13, 20, 14, 1, 2, + 0, 0, 4, 65, 0, 8, 9, 34, 0, 31, + 29, 62, 17, 0, 0, 19, 0, 54, 0, 5, + 36, 32, 0, 57, 59, 59, 0, 15, 63, 0, + 60, 0, 48, 0, 0, 27, 28, 0, 67, 68, + 69, 70, 66, 0, 56, 47, 46, 58, 59, 59, + 59, 59, 61, 45, 50, 25, 26, 0, 23, 24, + 49, 52, 59, 59, 51, 59, 21, 22, 18 +}; + +/* YYDEFGOTO[NTERM-NUM]. */ +static const yytype_int8 yydefgoto[] = +{ + -1, 12, 13, 33, 52, 35, 36, 31, 32, 27, + 48, 45, 28, 94, 86, 101, 105, 15, 72, 75, + 63, 42, 59, 82 +}; + +/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing + STATE-NUM. */ +#define YYPACT_NINF -66 +static const yytype_int8 yypact[] = +{ + 50, -29, -29, -8, -28, 10, 48, 48, 40, -66, + 47, 38, 39, -66, 46, 65, 65, -66, 49, 49, + -66, -66, -66, -66, -66, -66, -66, -6, -66, -6, + 48, 40, -66, 51, -12, 47, -66, 52, -66, -66, + 55, 53, -66, -66, 56, -66, -66, -66, 48, -6, + -66, 57, -66, 3, 58, -66, 60, -66, 61, -19, + -66, -66, 59, 62, -27, 64, 63, -66, -66, 4, + 66, 68, 73, 70, 5, -66, -66, 43, -66, -66, + -66, -66, -66, 71, -66, -66, 67, -66, 64, 64, + -13, 64, -66, -66, 87, -66, -66, 45, -66, -66, + -66, 80, 64, 64, -66, 64, -66, -66, -66 +}; + +/* YYPGOTO[NTERM-NUM]. */ +static const yytype_int8 yypgoto[] = +{ + -66, -66, 91, -66, -66, -66, 69, -66, 74, -3, + 21, 88, 72, -66, -66, -66, -66, 104, -66, -65, + -66, 92, -66, -66 +}; + +/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If + positive, shift that token. If negative, reduce the rule which + number is the opposite. If zero, do what YYDEFACT says. + If YYTABLE_NINF, syntax error. */ +#define YYTABLE_NINF -36 +static const yytype_int8 yytable[] = +{ + 76, 14, 73, 18, 29, 74, -35, -35, -35, -35, + -35, -35, -35, -35, -35, 47, 73, -35, -35, 97, + 53, 54, 17, 95, 96, 98, 99, 49, 47, 78, + 79, 80, 81, 64, 65, 88, 89, 106, 107, 38, + 108, 19, 1, 2, 3, 4, 5, 6, 7, 8, + 9, 10, 11, 1, 2, 3, 4, 5, 6, 7, + 8, 9, 10, 11, 20, 21, 22, 23, 24, 37, + 30, 25, 26, 90, 91, 102, 103, 34, 40, 41, + 69, 51, 93, 44, 56, 57, 58, 60, 66, 70, + 62, 67, 68, 73, 85, 77, 100, 71, 83, 84, + 87, 92, 104, 39, 55, 50, 16, 46, 43, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 61 +}; + +static const yytype_int8 yycheck[] = +{ + 65, 30, 29, 31, 7, 32, 25, 26, 27, 28, + 16, 17, 18, 19, 20, 34, 29, 23, 24, 32, + 32, 33, 30, 88, 89, 90, 91, 30, 34, 25, + 26, 27, 28, 30, 31, 30, 31, 102, 103, 0, + 105, 31, 3, 4, 5, 6, 7, 8, 9, 10, + 11, 12, 13, 3, 4, 5, 6, 7, 8, 9, + 10, 11, 12, 13, 16, 17, 18, 19, 20, 31, + 30, 23, 24, 30, 31, 30, 31, 30, 32, 14, + 59, 30, 15, 34, 32, 30, 33, 31, 30, 30, + 33, 31, 31, 29, 21, 32, 9, 35, 32, 31, + 30, 30, 22, 12, 35, 31, 2, 19, 16, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 48 +}; + +/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing + symbol of state STATE-NUM. */ +static const yytype_uint8 yystos[] = +{ + 0, 3, 4, 5, 6, 7, 8, 9, 10, 11, + 12, 13, 37, 38, 30, 53, 53, 30, 31, 31, + 16, 17, 18, 19, 20, 23, 24, 45, 48, 45, + 30, 43, 44, 39, 30, 41, 42, 31, 0, 38, + 32, 14, 57, 57, 34, 47, 47, 34, 46, 45, + 44, 30, 40, 32, 33, 42, 32, 30, 33, 58, + 31, 48, 33, 56, 30, 31, 30, 31, 31, 46, + 30, 35, 54, 29, 32, 55, 55, 32, 25, 26, + 27, 28, 59, 32, 31, 21, 50, 30, 30, 31, + 30, 31, 30, 15, 49, 55, 55, 32, 55, 55, + 9, 51, 30, 31, 22, 52, 55, 55, 55 +}; + +#define yyerrok (yyerrstatus = 0) +#define yyclearin (yychar = YYEMPTY) +#define YYEMPTY (-2) +#define YYEOF 0 + +#define YYACCEPT goto yyacceptlab +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab + + +/* Like YYERROR except do call yyerror. This remains here temporarily + to ease the transition to the new meaning of YYERROR, for GCC. + Once GCC version 2 has supplanted version 1, this can go. */ + +#define YYFAIL goto yyerrlab + +#define YYRECOVERING() (!!yyerrstatus) + +#define YYBACKUP(Token, Value) \ +do \ + if (yychar == YYEMPTY && yylen == 1) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ + YYPOPSTACK (1); \ + goto yybackup; \ + } \ + else \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ +while (YYID (0)) + + +#define YYTERROR 1 +#define YYERRCODE 256 + + +/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. + If N is 0, then set CURRENT to the empty location which ends + the previous symbol: RHS[0] (always defined). */ + +#define YYRHSLOC(Rhs, K) ((Rhs)[K]) +#ifndef YYLLOC_DEFAULT +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ + if (YYID (N)) \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ + while (YYID (0)) +#endif + + +/* YY_LOCATION_PRINT -- Print the location on the stream. + This macro was not mandated originally: define only if we know + we won't break user code: when these are the locations we know. */ + +#ifndef YY_LOCATION_PRINT +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) +# else +# define YY_LOCATION_PRINT(File, Loc) ((void) 0) +# endif +#endif + + +/* YYLEX -- calling `yylex' with the right arguments. */ + +#ifdef YYLEX_PARAM +# define YYLEX yylex (YYLEX_PARAM) +#else +# define YYLEX yylex () +#endif + +/* Enable debugging if requested. */ +#if YYDEBUG + +# ifndef YYFPRINTF +# include /* INFRINGES ON USER NAME SPACE */ +# define YYFPRINTF fprintf +# endif + +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ +} while (YYID (0)) + +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yy_symbol_print (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ +} while (YYID (0)) + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_value_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (!yyvaluep) + return; +# ifdef YYPRINT + if (yytype < YYNTOKENS) + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# else + YYUSE (yyoutput); +# endif + switch (yytype) + { + default: + break; + } +} + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (yytype < YYNTOKENS) + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + else + YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + + yy_symbol_value_print (yyoutput, yytype, yyvaluep); + YYFPRINTF (yyoutput, ")"); +} + +/*------------------------------------------------------------------. +| yy_stack_print -- Print the state stack from its BOTTOM up to its | +| TOP (included). | +`------------------------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_stack_print (yytype_int16 *bottom, yytype_int16 *top) +#else +static void +yy_stack_print (bottom, top) + yytype_int16 *bottom; + yytype_int16 *top; +#endif +{ + YYFPRINTF (stderr, "Stack now"); + for (; bottom <= top; ++bottom) + YYFPRINTF (stderr, " %d", *bottom); + YYFPRINTF (stderr, "\n"); +} + +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ +} while (YYID (0)) + + +/*------------------------------------------------. +| Report that the YYRULE is going to be reduced. | +`------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_reduce_print (YYSTYPE *yyvsp, int yyrule) +#else +static void +yy_reduce_print (yyvsp, yyrule) + YYSTYPE *yyvsp; + int yyrule; +#endif +{ + int yynrhs = yyr2[yyrule]; + int yyi; + unsigned long int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", + yyrule - 1, yylno); + /* The symbols being reduced. */ + for (yyi = 0; yyi < yynrhs; yyi++) + { + fprintf (stderr, " $%d = ", yyi + 1); + yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], + &(yyvsp[(yyi + 1) - (yynrhs)]) + ); + fprintf (stderr, "\n"); + } +} + +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ + yy_reduce_print (yyvsp, Rule); \ +} while (YYID (0)) + +/* Nonzero means print parse trace. It is left uninitialized so that + multiple parsers can coexist. */ +int yydebug; +#else /* !YYDEBUG */ +# define YYDPRINTF(Args) +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YY_STACK_PRINT(Bottom, Top) +# define YY_REDUCE_PRINT(Rule) +#endif /* !YYDEBUG */ + + +/* YYINITDEPTH -- initial size of the parser's stacks. */ +#ifndef YYINITDEPTH +# define YYINITDEPTH 200 +#endif + +/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only + if the built-in stack extension method is used). + + Do not make this value too large; the results are undefined if + YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + evaluated with infinite-precision integer arithmetic. */ + +#ifndef YYMAXDEPTH +# define YYMAXDEPTH 10000 +#endif + + + +#if YYERROR_VERBOSE + +# ifndef yystrlen +# if defined __GLIBC__ && defined _STRING_H +# define yystrlen strlen +# else +/* Return the length of YYSTR. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static YYSIZE_T +yystrlen (const char *yystr) +#else +static YYSIZE_T +yystrlen (yystr) + const char *yystr; +#endif +{ + YYSIZE_T yylen; + for (yylen = 0; yystr[yylen]; yylen++) + continue; + return yylen; +} +# endif +# endif + +# ifndef yystpcpy +# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE +# define yystpcpy stpcpy +# else +/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in + YYDEST. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static char * +yystpcpy (char *yydest, const char *yysrc) +#else +static char * +yystpcpy (yydest, yysrc) + char *yydest; + const char *yysrc; +#endif +{ + char *yyd = yydest; + const char *yys = yysrc; + + while ((*yyd++ = *yys++) != '\0') + continue; + + return yyd - 1; +} +# endif +# endif + +# ifndef yytnamerr +/* Copy to YYRES the contents of YYSTR after stripping away unnecessary + quotes and backslashes, so that it's suitable for yyerror. The + heuristic is that double-quoting is unnecessary unless the string + contains an apostrophe, a comma, or backslash (other than + backslash-backslash). YYSTR is taken from yytname. If YYRES is + null, do not copy; instead, return the length of what the result + would have been. */ +static YYSIZE_T +yytnamerr (char *yyres, const char *yystr) +{ + if (*yystr == '"') + { + YYSIZE_T yyn = 0; + char const *yyp = yystr; + + for (;;) + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; + + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; + + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } + do_not_strip_quotes: ; + } + + if (! yyres) + return yystrlen (yystr); + + return yystpcpy (yyres, yystr) - yyres; +} +# endif + +/* Copy into YYRESULT an error message about the unexpected token + YYCHAR while in state YYSTATE. Return the number of bytes copied, + including the terminating null byte. If YYRESULT is null, do not + copy anything; just return the number of bytes that would be + copied. As a special case, return 0 if an ordinary "syntax error" + message will do. Return YYSIZE_MAXIMUM if overflow occurs during + size calculation. */ +static YYSIZE_T +yysyntax_error (char *yyresult, int yystate, int yychar) +{ + int yyn = yypact[yystate]; + + if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) + return 0; + else + { + int yytype = YYTRANSLATE (yychar); + YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); + YYSIZE_T yysize = yysize0; + YYSIZE_T yysize1; + int yysize_overflow = 0; + enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; + char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + int yyx; + +# if 0 + /* This is so xgettext sees the translatable formats that are + constructed on the fly. */ + YY_("syntax error, unexpected %s"); + YY_("syntax error, unexpected %s, expecting %s"); + YY_("syntax error, unexpected %s, expecting %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); +# endif + char *yyfmt; + char const *yyf; + static char const yyunexpected[] = "syntax error, unexpected %s"; + static char const yyexpecting[] = ", expecting %s"; + static char const yyor[] = " or %s"; + char yyformat[sizeof yyunexpected + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; + char const *yyprefix = yyexpecting; + + /* Start YYX at -YYN if negative to avoid negative indexes in + YYCHECK. */ + int yyxbegin = yyn < 0 ? -yyn : 0; + + /* Stay within bounds of both yycheck and yytname. */ + int yychecklim = YYLAST - yyn + 1; + int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; + int yycount = 1; + + yyarg[0] = yytname[yytype]; + yyfmt = yystpcpy (yyformat, yyunexpected); + + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } + + yyf = YY_(yyformat); + yysize1 = yysize + yystrlen (yyf); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + + if (yysize_overflow) + return YYSIZE_MAXIMUM; + + if (yyresult) + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yyresult; + int yyi = 0; + while ((*yyp = *yyf) != '\0') + { + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } + } + } + return yysize; + } +} +#endif /* YYERROR_VERBOSE */ + + +/*-----------------------------------------------. +| Release the memory associated to this symbol. | +`-----------------------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +#else +static void +yydestruct (yymsg, yytype, yyvaluep) + const char *yymsg; + int yytype; + YYSTYPE *yyvaluep; +#endif +{ + YYUSE (yyvaluep); + + if (!yymsg) + yymsg = "Deleting"; + YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); + + switch (yytype) + { + + default: + break; + } +} + + +/* Prevent warnings from -Wmissing-prototypes. */ + +#ifdef YYPARSE_PARAM +#if defined __STDC__ || defined __cplusplus +int yyparse (void *YYPARSE_PARAM); +#else +int yyparse (); +#endif +#else /* ! YYPARSE_PARAM */ +#if defined __STDC__ || defined __cplusplus +int yyparse (void); +#else +int yyparse (); +#endif +#endif /* ! YYPARSE_PARAM */ + + + +/* The look-ahead symbol. */ +int yychar; + +/* The semantic value of the look-ahead symbol. */ +YYSTYPE yylval; + +/* Number of syntax errors so far. */ +int yynerrs; + + + +/*----------. +| yyparse. | +`----------*/ + +#ifdef YYPARSE_PARAM +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void *YYPARSE_PARAM) +#else +int +yyparse (YYPARSE_PARAM) + void *YYPARSE_PARAM; +#endif +#else /* ! YYPARSE_PARAM */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void) +#else +int +yyparse () + +#endif +#endif +{ + + int yystate; + int yyn; + int yyresult; + /* Number of tokens to shift before error messages enabled. */ + int yyerrstatus; + /* Look-ahead token as an internal (translated) token number. */ + int yytoken = 0; +#if YYERROR_VERBOSE + /* Buffer for error messages, and its allocated size. */ + char yymsgbuf[128]; + char *yymsg = yymsgbuf; + YYSIZE_T yymsg_alloc = sizeof yymsgbuf; +#endif + + /* Three stacks and their tools: + `yyss': related to states, + `yyvs': related to semantic values, + `yyls': related to locations. + + Refer to the stacks thru separate pointers, to allow yyoverflow + to reallocate them elsewhere. */ + + /* The state stack. */ + yytype_int16 yyssa[YYINITDEPTH]; + yytype_int16 *yyss = yyssa; + yytype_int16 *yyssp; + + /* The semantic value stack. */ + YYSTYPE yyvsa[YYINITDEPTH]; + YYSTYPE *yyvs = yyvsa; + YYSTYPE *yyvsp; + + + +#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) + + YYSIZE_T yystacksize = YYINITDEPTH; + + /* The variables used to return semantic value and location from the + action routines. */ + YYSTYPE yyval; + + + /* The number of symbols on the RHS of the reduced rule. + Keep to zero when no symbol should be popped. */ + int yylen = 0; + + YYDPRINTF ((stderr, "Starting parse\n")); + + yystate = 0; + yyerrstatus = 0; + yynerrs = 0; + yychar = YYEMPTY; /* Cause a token to be read. */ + + /* Initialize stack pointers. + Waste one element of value and location stack + so that they stay on the same level as the state stack. + The wasted elements are never initialized. */ + + yyssp = yyss; + yyvsp = yyvs; + + goto yysetstate; + +/*------------------------------------------------------------. +| yynewstate -- Push a new state, which is found in yystate. | +`------------------------------------------------------------*/ + yynewstate: + /* In all cases, when you get here, the value and location stacks + have just been pushed. So pushing a state here evens the stacks. */ + yyssp++; + + yysetstate: + *yyssp = yystate; + + if (yyss + yystacksize - 1 <= yyssp) + { + /* Get the current used size of the three stacks, in elements. */ + YYSIZE_T yysize = yyssp - yyss + 1; + +#ifdef yyoverflow + { + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + yytype_int16 *yyss1 = yyss; + + + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), + + &yystacksize); + + yyss = yyss1; + yyvs = yyvs1; + } +#else /* no yyoverflow */ +# ifndef YYSTACK_RELOCATE + goto yyexhaustedlab; +# else + /* Extend the stack our own way. */ + if (YYMAXDEPTH <= yystacksize) + goto yyexhaustedlab; + yystacksize *= 2; + if (YYMAXDEPTH < yystacksize) + yystacksize = YYMAXDEPTH; + + { + yytype_int16 *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss); + YYSTACK_RELOCATE (yyvs); + +# undef YYSTACK_RELOCATE + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); + } +# endif +#endif /* no yyoverflow */ + + yyssp = yyss + yysize - 1; + yyvsp = yyvs + yysize - 1; + + + YYDPRINTF ((stderr, "Stack size increased to %lu\n", + (unsigned long int) yystacksize)); + + if (yyss + yystacksize - 1 <= yyssp) + YYABORT; + } + + YYDPRINTF ((stderr, "Entering state %d\n", yystate)); + + goto yybackup; + +/*-----------. +| yybackup. | +`-----------*/ +yybackup: + + /* Do appropriate processing given the current state. Read a + look-ahead token if we need one and don't already have one. */ + + /* First try to decide what to do without reference to look-ahead token. */ + yyn = yypact[yystate]; + if (yyn == YYPACT_NINF) + goto yydefault; + + /* Not known => get a look-ahead token if don't already have one. */ + + /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ + if (yychar == YYEMPTY) + { + YYDPRINTF ((stderr, "Reading a token: ")); + yychar = YYLEX; + } + + if (yychar <= YYEOF) + { + yychar = yytoken = YYEOF; + YYDPRINTF ((stderr, "Now at end of input.\n")); + } + else + { + yytoken = YYTRANSLATE (yychar); + YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + } + + /* If the proper action on seeing token YYTOKEN is to reduce or to + detect an error, take that action. */ + yyn += yytoken; + if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) + goto yydefault; + yyn = yytable[yyn]; + if (yyn <= 0) + { + if (yyn == 0 || yyn == YYTABLE_NINF) + goto yyerrlab; + yyn = -yyn; + goto yyreduce; + } + + if (yyn == YYFINAL) + YYACCEPT; + + /* Count tokens shifted since error; after three, turn off error + status. */ + if (yyerrstatus) + yyerrstatus--; + + /* Shift the look-ahead token. */ + YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + + /* Discard the shifted token unless it is eof. */ + if (yychar != YYEOF) + yychar = YYEMPTY; + + yystate = yyn; + *++yyvsp = yylval; + + goto yynewstate; + + +/*-----------------------------------------------------------. +| yydefault -- do the default action for the current state. | +`-----------------------------------------------------------*/ +yydefault: + yyn = yydefact[yystate]; + if (yyn == 0) + goto yyerrlab; + goto yyreduce; + + +/*-----------------------------. +| yyreduce -- Do a reduction. | +`-----------------------------*/ +yyreduce: + /* yyn is the number of a rule to reduce with. */ + yylen = yyr2[yyn]; + + /* If YYLEN is nonzero, implement the default value of the action: + `$$ = $1'. + + Otherwise, the following line sets YYVAL to garbage. + This behavior is undocumented and Bison + users should not rely upon it. Assigning to YYVAL + unconditionally makes the parser a bit smaller, and it avoids a + GCC warning that YYVAL may be used uninitialized. */ + yyval = yyvsp[1-yylen]; + + + YY_REDUCE_PRINT (yyn); + switch (yyn) + { + case 4: +#line 52 "defparse.y" + { def_name ((yyvsp[(2) - (3)].id), (yyvsp[(3) - (3)].number)); } + break; + + case 5: +#line 53 "defparse.y" + { def_library ((yyvsp[(2) - (4)].id), (yyvsp[(3) - (4)].number)); } + break; + + case 7: +#line 55 "defparse.y" + { def_description ((yyvsp[(2) - (2)].id));} + break; + + case 8: +#line 56 "defparse.y" + { def_stacksize ((yyvsp[(2) - (3)].number), (yyvsp[(3) - (3)].number));} + break; + + case 9: +#line 57 "defparse.y" + { def_heapsize ((yyvsp[(2) - (3)].number), (yyvsp[(3) - (3)].number));} + break; + + case 10: +#line 58 "defparse.y" + { def_code ((yyvsp[(2) - (2)].number));} + break; + + case 11: +#line 59 "defparse.y" + { def_data ((yyvsp[(2) - (2)].number));} + break; + + case 14: +#line 62 "defparse.y" + { def_version ((yyvsp[(2) - (2)].number),0);} + break; + + case 15: +#line 63 "defparse.y" + { def_version ((yyvsp[(2) - (4)].number),(yyvsp[(4) - (4)].number));} + break; + + case 18: +#line 75 "defparse.y" + { def_exports ((yyvsp[(1) - (8)].id), (yyvsp[(2) - (8)].id), (yyvsp[(3) - (8)].number), (yyvsp[(4) - (8)].number), (yyvsp[(5) - (8)].number), (yyvsp[(6) - (8)].number), (yyvsp[(7) - (8)].number), (yyvsp[(8) - (8)].id));} + break; + + case 21: +#line 84 "defparse.y" + { def_import ((yyvsp[(1) - (8)].id),(yyvsp[(3) - (8)].id),(yyvsp[(5) - (8)].id),(yyvsp[(7) - (8)].id), 0, (yyvsp[(8) - (8)].id)); } + break; + + case 22: +#line 86 "defparse.y" + { def_import ((yyvsp[(1) - (8)].id),(yyvsp[(3) - (8)].id),(yyvsp[(5) - (8)].id), 0,(yyvsp[(7) - (8)].number), (yyvsp[(8) - (8)].id)); } + break; + + case 23: +#line 88 "defparse.y" + { def_import ((yyvsp[(1) - (6)].id),(yyvsp[(3) - (6)].id), 0,(yyvsp[(5) - (6)].id), 0, (yyvsp[(6) - (6)].id)); } + break; + + case 24: +#line 90 "defparse.y" + { def_import ((yyvsp[(1) - (6)].id),(yyvsp[(3) - (6)].id), 0, 0,(yyvsp[(5) - (6)].number), (yyvsp[(6) - (6)].id)); } + break; + + case 25: +#line 92 "defparse.y" + { def_import ( 0,(yyvsp[(1) - (6)].id),(yyvsp[(3) - (6)].id),(yyvsp[(5) - (6)].id), 0, (yyvsp[(6) - (6)].id)); } + break; + + case 26: +#line 94 "defparse.y" + { def_import ( 0,(yyvsp[(1) - (6)].id),(yyvsp[(3) - (6)].id), 0,(yyvsp[(5) - (6)].number), (yyvsp[(6) - (6)].id)); } + break; + + case 27: +#line 96 "defparse.y" + { def_import ( 0,(yyvsp[(1) - (4)].id), 0,(yyvsp[(3) - (4)].id), 0, (yyvsp[(4) - (4)].id)); } + break; + + case 28: +#line 98 "defparse.y" + { def_import ( 0,(yyvsp[(1) - (4)].id), 0, 0,(yyvsp[(3) - (4)].number), (yyvsp[(4) - (4)].id)); } + break; + + case 31: +#line 107 "defparse.y" + { def_section ((yyvsp[(1) - (2)].id),(yyvsp[(2) - (2)].number));} + break; + + case 36: +#line 119 "defparse.y" + { (yyval.number)=(yyvsp[(2) - (2)].number);} + break; + + case 37: +#line 120 "defparse.y" + { (yyval.number)=-1;} + break; + + case 38: +#line 124 "defparse.y" + { (yyval.number) = 1; } + break; + + case 39: +#line 125 "defparse.y" + { (yyval.number) = 2; } + break; + + case 40: +#line 126 "defparse.y" + { (yyval.number) = 4; } + break; + + case 41: +#line 127 "defparse.y" + { (yyval.number) = 8; } + break; + + case 42: +#line 128 "defparse.y" + { (yyval.number) = 0; } + break; + + case 43: +#line 129 "defparse.y" + { (yyval.number) = 0; } + break; + + case 44: +#line 130 "defparse.y" + { (yyval.number) = 0; } + break; + + case 45: +#line 134 "defparse.y" + {(yyval.number)=1;} + break; + + case 46: +#line 135 "defparse.y" + {(yyval.number)=0;} + break; + + case 47: +#line 139 "defparse.y" + {(yyval.number)=1;} + break; + + case 48: +#line 140 "defparse.y" + {(yyval.number)=0;} + break; + + case 49: +#line 144 "defparse.y" + { (yyval.number) = 1; } + break; + + case 50: +#line 145 "defparse.y" + { (yyval.number) = 0; } + break; + + case 51: +#line 149 "defparse.y" + { (yyval.number) = 1; } + break; + + case 52: +#line 150 "defparse.y" + { (yyval.number) = 0; } + break; + + case 53: +#line 153 "defparse.y" + { (yyval.id) =(yyvsp[(1) - (1)].id); } + break; + + case 54: +#line 155 "defparse.y" + { + char *name = xmalloc (strlen ((yyvsp[(1) - (3)].id)) + 1 + strlen ((yyvsp[(3) - (3)].id)) + 1); + sprintf (name, "%s.%s", (yyvsp[(1) - (3)].id), (yyvsp[(3) - (3)].id)); + (yyval.id) = name; + } + break; + + case 55: +#line 160 "defparse.y" + { (yyval.id)=""; } + break; + + case 56: +#line 164 "defparse.y" + { (yyval.number)=(yyvsp[(2) - (2)].number);} + break; + + case 57: +#line 165 "defparse.y" + { (yyval.number)=-1;} + break; + + case 58: +#line 169 "defparse.y" + { (yyval.id) = (yyvsp[(2) - (2)].id); } + break; + + case 59: +#line 170 "defparse.y" + { (yyval.id) = 0; } + break; + + case 60: +#line 174 "defparse.y" + { (yyval.id) = (yyvsp[(2) - (2)].id); } + break; + + case 61: +#line 176 "defparse.y" + { + char *name = xmalloc (strlen ((yyvsp[(2) - (4)].id)) + 1 + strlen ((yyvsp[(4) - (4)].id)) + 1); + sprintf (name, "%s.%s", (yyvsp[(2) - (4)].id), (yyvsp[(4) - (4)].id)); + (yyval.id) = name; + } + break; + + case 62: +#line 181 "defparse.y" + { (yyval.id) = 0; } + break; + + case 63: +#line 184 "defparse.y" + { (yyval.number)= (yyvsp[(3) - (3)].number);} + break; + + case 64: +#line 185 "defparse.y" + { (yyval.number)=-1;} + break; + + +/* Line 1267 of yacc.c. */ +#line 1753 "defparse.c" + default: break; + } + YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); + + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + + *++yyvsp = yyval; + + + /* Now `shift' the result of the reduction. Determine what state + that goes to, based on the state we popped back to and the rule + number reduced by. */ + + yyn = yyr1[yyn]; + + yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; + if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yytable[yystate]; + else + yystate = yydefgoto[yyn - YYNTOKENS]; + + goto yynewstate; + + +/*------------------------------------. +| yyerrlab -- here on detecting error | +`------------------------------------*/ +yyerrlab: + /* If not already recovering from an error, report this error. */ + if (!yyerrstatus) + { + ++yynerrs; +#if ! YYERROR_VERBOSE + yyerror (YY_("syntax error")); +#else + { + YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); + if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) + { + YYSIZE_T yyalloc = 2 * yysize; + if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) + yyalloc = YYSTACK_ALLOC_MAXIMUM; + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); + yymsg = (char *) YYSTACK_ALLOC (yyalloc); + if (yymsg) + yymsg_alloc = yyalloc; + else + { + yymsg = yymsgbuf; + yymsg_alloc = sizeof yymsgbuf; + } + } + + if (0 < yysize && yysize <= yymsg_alloc) + { + (void) yysyntax_error (yymsg, yystate, yychar); + yyerror (yymsg); + } + else + { + yyerror (YY_("syntax error")); + if (yysize != 0) + goto yyexhaustedlab; + } + } +#endif + } + + + + if (yyerrstatus == 3) + { + /* If just tried and failed to reuse look-ahead token after an + error, discard it. */ + + if (yychar <= YYEOF) + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } + else + { + yydestruct ("Error: discarding", + yytoken, &yylval); + yychar = YYEMPTY; + } + } + + /* Else will try to reuse look-ahead token after shifting the error + token. */ + goto yyerrlab1; + + +/*---------------------------------------------------. +| yyerrorlab -- error raised explicitly by YYERROR. | +`---------------------------------------------------*/ +yyerrorlab: + + /* Pacify compilers like GCC when the user code never invokes + YYERROR and the label yyerrorlab therefore never appears in user + code. */ + if (/*CONSTCOND*/ 0) + goto yyerrorlab; + + /* Do not reclaim the symbols of the rule which action triggered + this YYERROR. */ + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + yystate = *yyssp; + goto yyerrlab1; + + +/*-------------------------------------------------------------. +| yyerrlab1 -- common code for both syntax error and YYERROR. | +`-------------------------------------------------------------*/ +yyerrlab1: + yyerrstatus = 3; /* Each real token shifted decrements this. */ + + for (;;) + { + yyn = yypact[yystate]; + if (yyn != YYPACT_NINF) + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } + + /* Pop the current state because it cannot handle the error token. */ + if (yyssp == yyss) + YYABORT; + + + yydestruct ("Error: popping", + yystos[yystate], yyvsp); + YYPOPSTACK (1); + yystate = *yyssp; + YY_STACK_PRINT (yyss, yyssp); + } + + if (yyn == YYFINAL) + YYACCEPT; + + *++yyvsp = yylval; + + + /* Shift the error token. */ + YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); + + yystate = yyn; + goto yynewstate; + + +/*-------------------------------------. +| yyacceptlab -- YYACCEPT comes here. | +`-------------------------------------*/ +yyacceptlab: + yyresult = 0; + goto yyreturn; + +/*-----------------------------------. +| yyabortlab -- YYABORT comes here. | +`-----------------------------------*/ +yyabortlab: + yyresult = 1; + goto yyreturn; + +#ifndef yyoverflow +/*-------------------------------------------------. +| yyexhaustedlab -- memory exhaustion comes here. | +`-------------------------------------------------*/ +yyexhaustedlab: + yyerror (YY_("memory exhausted")); + yyresult = 2; + /* Fall through. */ +#endif + +yyreturn: + if (yychar != YYEOF && yychar != YYEMPTY) + yydestruct ("Cleanup: discarding lookahead", + yytoken, &yylval); + /* Do not reclaim the symbols of the rule which action triggered + this YYABORT or YYACCEPT. */ + YYPOPSTACK (yylen); + YY_STACK_PRINT (yyss, yyssp); + while (yyssp != yyss) + { + yydestruct ("Cleanup: popping", + yystos[*yyssp], yyvsp); + YYPOPSTACK (1); + } +#ifndef yyoverflow + if (yyss != yyssa) + YYSTACK_FREE (yyss); +#endif +#if YYERROR_VERBOSE + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); +#endif + /* Make sure YYID is used. */ + return YYID (yyresult); +} + + + diff --git a/binutils/defparse.h b/binutils/defparse.h new file mode 100644 index 0000000..ef26229 --- /dev/null +++ b/binutils/defparse.h @@ -0,0 +1,123 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton interface for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + NAME = 258, + LIBRARY = 259, + DESCRIPTION = 260, + STACKSIZE = 261, + HEAPSIZE = 262, + CODE = 263, + DATA = 264, + SECTIONS = 265, + EXPORTS = 266, + IMPORTS = 267, + VERSIONK = 268, + BASE = 269, + CONSTANT = 270, + READ = 271, + WRITE = 272, + EXECUTE = 273, + SHARED = 274, + NONSHARED = 275, + NONAME = 276, + PRIVATE = 277, + SINGLE = 278, + MULTIPLE = 279, + INITINSTANCE = 280, + INITGLOBAL = 281, + TERMINSTANCE = 282, + TERMGLOBAL = 283, + EQUAL = 284, + ID = 285, + NUMBER = 286 + }; +#endif +/* Tokens. */ +#define NAME 258 +#define LIBRARY 259 +#define DESCRIPTION 260 +#define STACKSIZE 261 +#define HEAPSIZE 262 +#define CODE 263 +#define DATA 264 +#define SECTIONS 265 +#define EXPORTS 266 +#define IMPORTS 267 +#define VERSIONK 268 +#define BASE 269 +#define CONSTANT 270 +#define READ 271 +#define WRITE 272 +#define EXECUTE 273 +#define SHARED 274 +#define NONSHARED 275 +#define NONAME 276 +#define PRIVATE 277 +#define SINGLE 278 +#define MULTIPLE 279 +#define INITINSTANCE 280 +#define INITGLOBAL 281 +#define TERMINSTANCE 282 +#define TERMGLOBAL 283 +#define EQUAL 284 +#define ID 285 +#define NUMBER 286 + + + + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 29 "defparse.y" +{ + char *id; + int number; +} +/* Line 1529 of yacc.c. */ +#line 116 "defparse.h" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + +extern YYSTYPE yylval; + diff --git a/binutils/doc/Makefile.in b/binutils/doc/Makefile.in index 6d30caf..3acf28a 100644 --- a/binutils/doc/Makefile.in +++ b/binutils/doc/Makefile.in @@ -181,6 +181,7 @@ NMEDIT = @NMEDIT@ NO_WERROR = @NO_WERROR@ OBJDUMP = @OBJDUMP@ OBJDUMP_DEFS = @OBJDUMP_DEFS@ +OBJDUMP_PRIVATE_OFILES = @OBJDUMP_PRIVATE_OFILES@ OBJEXT = @OBJEXT@ OTOOL = @OTOOL@ OTOOL64 = @OTOOL64@ diff --git a/binutils/doc/addr2line.1 b/binutils/doc/addr2line.1 new file mode 100644 index 0000000..a89767b --- /dev/null +++ b/binutils/doc/addr2line.1 @@ -0,0 +1,287 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "ADDR2LINE 1" +.TH ADDR2LINE 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +addr2line \- convert addresses into file names and line numbers. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +addr2line [\fB\-a\fR|\fB\-\-addresses\fR] + [\fB\-b\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR] + [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR]] + [\fB\-e\fR \fIfilename\fR|\fB\-\-exe=\fR\fIfilename\fR] + [\fB\-f\fR|\fB\-\-functions\fR] [\fB\-s\fR|\fB\-\-basename\fR] + [\fB\-i\fR|\fB\-\-inlines\fR] + [\fB\-p\fR|\fB\-\-pretty\-print\fR] + [\fB\-j\fR|\fB\-\-section=\fR\fIname\fR] + [\fB\-H\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR] + [addr addr ...] +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\fBaddr2line\fR translates addresses into file names and line numbers. +Given an address in an executable or an offset in a section of a relocatable +object, it uses the debugging information to figure out which file name and +line number are associated with it. +.PP +The executable or relocatable object to use is specified with the \fB\-e\fR +option. The default is the file \fIa.out\fR. The section in the relocatable +object to use is specified with the \fB\-j\fR option. +.PP +\&\fBaddr2line\fR has two modes of operation. +.PP +In the first, hexadecimal addresses are specified on the command line, +and \fBaddr2line\fR displays the file name and line number for each +address. +.PP +In the second, \fBaddr2line\fR reads hexadecimal addresses from +standard input, and prints the file name and line number for each +address on standard output. In this mode, \fBaddr2line\fR may be used +in a pipe to convert dynamically chosen addresses. +.PP +The format of the output is \fB\s-1FILENAME:LINENO\s0\fR. The file name and +line number for each address is printed on a separate line. If the +\&\fB\-f\fR option is used, then each \fB\s-1FILENAME:LINENO\s0\fR line is +preceded by a \fB\s-1FUNCTIONNAME\s0\fR line which is the name of the function +containing the address. If the \fB\-a\fR option is used, then the +address read is first printed. +.PP +If the file name or function name can not be determined, +\&\fBaddr2line\fR will print two question marks in their place. If the +line number can not be determined, \fBaddr2line\fR will print 0. +.SH "OPTIONS" +.IX Header "OPTIONS" +The long and short forms of options, shown here as alternatives, are +equivalent. +.IP "\fB\-a\fR" 4 +.IX Item "-a" +.PD 0 +.IP "\fB\-\-addresses\fR" 4 +.IX Item "--addresses" +.PD +Display address before function names or file and line number +information. The address is printed with a \fB0x\fR prefix to easily +identify it. +.IP "\fB\-b\fR \fIbfdname\fR" 4 +.IX Item "-b bfdname" +.PD 0 +.IP "\fB\-\-target=\fR\fIbfdname\fR" 4 +.IX Item "--target=bfdname" +.PD +Specify that the object-code format for the object files is +\&\fIbfdname\fR. +.IP "\fB\-C\fR" 4 +.IX Item "-C" +.PD 0 +.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4 +.IX Item "--demangle[=style]" +.PD +Decode (\fIdemangle\fR) low-level symbol names into user-level names. +Besides removing any initial underscore prepended by the system, this +makes \*(C+ function names readable. Different compilers have different +mangling styles. The optional demangling style argument can be used to +choose an appropriate demangling style for your compiler. +.IP "\fB\-e\fR \fIfilename\fR" 4 +.IX Item "-e filename" +.PD 0 +.IP "\fB\-\-exe=\fR\fIfilename\fR" 4 +.IX Item "--exe=filename" +.PD +Specify the name of the executable for which addresses should be +translated. The default file is \fIa.out\fR. +.IP "\fB\-f\fR" 4 +.IX Item "-f" +.PD 0 +.IP "\fB\-\-functions\fR" 4 +.IX Item "--functions" +.PD +Display function names as well as file and line number information. +.IP "\fB\-s\fR" 4 +.IX Item "-s" +.PD 0 +.IP "\fB\-\-basenames\fR" 4 +.IX Item "--basenames" +.PD +Display only the base of each file name. +.IP "\fB\-i\fR" 4 +.IX Item "-i" +.PD 0 +.IP "\fB\-\-inlines\fR" 4 +.IX Item "--inlines" +.PD +If the address belongs to a function that was inlined, the source +information for all enclosing scopes back to the first non-inlined +function will also be printed. For example, if \f(CW\*(C`main\*(C'\fR inlines +\&\f(CW\*(C`callee1\*(C'\fR which inlines \f(CW\*(C`callee2\*(C'\fR, and address is from +\&\f(CW\*(C`callee2\*(C'\fR, the source information for \f(CW\*(C`callee1\*(C'\fR and \f(CW\*(C`main\*(C'\fR +will also be printed. +.IP "\fB\-j\fR" 4 +.IX Item "-j" +.PD 0 +.IP "\fB\-\-section\fR" 4 +.IX Item "--section" +.PD +Read offsets relative to the specified section instead of absolute addresses. +.IP "\fB\-p\fR" 4 +.IX Item "-p" +.PD 0 +.IP "\fB\-\-pretty\-print\fR" 4 +.IX Item "--pretty-print" +.PD +Make the output more human friendly: each location are printed on one line. +If option \fB\-i\fR is specified, lines for all enclosing scopes are +prefixed with \fB(inlined by)\fR. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/ar.1 b/binutils/doc/ar.1 new file mode 100644 index 0000000..70f1904 --- /dev/null +++ b/binutils/doc/ar.1 @@ -0,0 +1,439 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "AR 1" +.TH AR 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +ar \- create, modify, and extract from archives +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +ar [\fB\-\-plugin\fR \fIname\fR] [\fB\-X32_64\fR] [\fB\-\fR]\fIp\fR[\fImod\fR [\fIrelpos\fR] [\fIcount\fR]] [\fB\-\-target\fR \fIbfdname\fR] \fIarchive\fR [\fImember\fR...] +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +The \s-1GNU\s0 \fBar\fR program creates, modifies, and extracts from +archives. An \fIarchive\fR is a single file holding a collection of +other files in a structure that makes it possible to retrieve +the original individual files (called \fImembers\fR of the archive). +.PP +The original files' contents, mode (permissions), timestamp, owner, and +group are preserved in the archive, and can be restored on +extraction. +.PP +\&\s-1GNU\s0 \fBar\fR can maintain archives whose members have names of any +length; however, depending on how \fBar\fR is configured on your +system, a limit on member-name length may be imposed for compatibility +with archive formats maintained with other tools. If it exists, the +limit is often 15 characters (typical of formats related to a.out) or 16 +characters (typical of formats related to coff). +.PP +\&\fBar\fR is considered a binary utility because archives of this sort +are most often used as \fIlibraries\fR holding commonly needed +subroutines. +.PP +\&\fBar\fR creates an index to the symbols defined in relocatable +object modules in the archive when you specify the modifier \fBs\fR. +Once created, this index is updated in the archive whenever \fBar\fR +makes a change to its contents (save for the \fBq\fR update operation). +An archive with such an index speeds up linking to the library, and +allows routines in the library to call each other without regard to +their placement in the archive. +.PP +You may use \fBnm \-s\fR or \fBnm \-\-print\-armap\fR to list this index +table. If an archive lacks the table, another form of \fBar\fR called +\&\fBranlib\fR can be used to add just the table. +.PP +\&\s-1GNU\s0 \fBar\fR can optionally create a \fIthin\fR archive, +which contains a symbol index and references to the original copies +of the member files of the archives. Such an archive is useful +for building libraries for use within a local build, where the +relocatable objects are expected to remain available, and copying the +contents of each object would only waste time and space. Thin archives +are also \fIflattened\fR, so that adding one or more archives to a +thin archive will add the elements of the nested archive individually. +The paths to the elements of the archive are stored relative to the +archive itself. +.PP +\&\s-1GNU\s0 \fBar\fR is designed to be compatible with two different +facilities. You can control its activity using command-line options, +like the different varieties of \fBar\fR on Unix systems; or, if you +specify the single command-line option \fB\-M\fR, you can control it +with a script supplied via standard input, like the \s-1MRI\s0 \*(L"librarian\*(R" +program. +.SH "OPTIONS" +.IX Header "OPTIONS" +\&\s-1GNU\s0 \fBar\fR allows you to mix the operation code \fIp\fR and modifier +flags \fImod\fR in any order, within the first command-line argument. +.PP +If you wish, you may begin the first command-line argument with a +dash. +.PP +The \fIp\fR keyletter specifies what operation to execute; it may be +any of the following, but you must specify only one of them: +.IP "\fBd\fR" 4 +.IX Item "d" +\&\fIDelete\fR modules from the archive. Specify the names of modules to +be deleted as \fImember\fR...; the archive is untouched if you +specify no files to delete. +.Sp +If you specify the \fBv\fR modifier, \fBar\fR lists each module +as it is deleted. +.IP "\fBm\fR" 4 +.IX Item "m" +Use this operation to \fImove\fR members in an archive. +.Sp +The ordering of members in an archive can make a difference in how +programs are linked using the library, if a symbol is defined in more +than one member. +.Sp +If no modifiers are used with \f(CW\*(C`m\*(C'\fR, any members you name in the +\&\fImember\fR arguments are moved to the \fIend\fR of the archive; +you can use the \fBa\fR, \fBb\fR, or \fBi\fR modifiers to move them to a +specified place instead. +.IP "\fBp\fR" 4 +.IX Item "p" +\&\fIPrint\fR the specified members of the archive, to the standard +output file. If the \fBv\fR modifier is specified, show the member +name before copying its contents to standard output. +.Sp +If you specify no \fImember\fR arguments, all the files in the archive are +printed. +.IP "\fBq\fR" 4 +.IX Item "q" +\&\fIQuick append\fR; Historically, add the files \fImember\fR... to the end of +\&\fIarchive\fR, without checking for replacement. +.Sp +The modifiers \fBa\fR, \fBb\fR, and \fBi\fR do \fInot\fR affect this +operation; new members are always placed at the end of the archive. +.Sp +The modifier \fBv\fR makes \fBar\fR list each file as it is appended. +.Sp +Since the point of this operation is speed, the archive's symbol table +index is not updated, even if it already existed; you can use \fBar s\fR or +\&\fBranlib\fR explicitly to update the symbol table index. +.Sp +However, too many different systems assume quick append rebuilds the +index, so \s-1GNU\s0 \fBar\fR implements \fBq\fR as a synonym for \fBr\fR. +.IP "\fBr\fR" 4 +.IX Item "r" +Insert the files \fImember\fR... into \fIarchive\fR (with +\&\fIreplacement\fR). This operation differs from \fBq\fR in that any +previously existing members are deleted if their names match those being +added. +.Sp +If one of the files named in \fImember\fR... does not exist, \fBar\fR +displays an error message, and leaves undisturbed any existing members +of the archive matching that name. +.Sp +By default, new members are added at the end of the file; but you may +use one of the modifiers \fBa\fR, \fBb\fR, or \fBi\fR to request +placement relative to some existing member. +.Sp +The modifier \fBv\fR used with this operation elicits a line of +output for each file inserted, along with one of the letters \fBa\fR or +\&\fBr\fR to indicate whether the file was appended (no old member +deleted) or replaced. +.IP "\fBs\fR" 4 +.IX Item "s" +Add an index to the archive, or update it if it already exists. Note +this command is an exception to the rule that there can only be one +command letter, as it is possible to use it as either a command or a +modifier. In either case it does the same thing. +.IP "\fBt\fR" 4 +.IX Item "t" +Display a \fItable\fR listing the contents of \fIarchive\fR, or those +of the files listed in \fImember\fR... that are present in the +archive. Normally only the member name is shown; if you also want to +see the modes (permissions), timestamp, owner, group, and size, you can +request that by also specifying the \fBv\fR modifier. +.Sp +If you do not specify a \fImember\fR, all files in the archive +are listed. +.Sp +If there is more than one file with the same name (say, \fBfie\fR) in +an archive (say \fBb.a\fR), \fBar t b.a fie\fR lists only the +first instance; to see them all, you must ask for a complete +listing\-\-\-in our example, \fBar t b.a\fR. +.IP "\fBx\fR" 4 +.IX Item "x" +\&\fIExtract\fR members (named \fImember\fR) from the archive. You can +use the \fBv\fR modifier with this operation, to request that +\&\fBar\fR list each name as it extracts it. +.Sp +If you do not specify a \fImember\fR, all files in the archive +are extracted. +.Sp +Files cannot be extracted from a thin archive. +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +Displays the list of command line options supported by \fBar\fR +and then exits. +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +Displays the version information of \fBar\fR and then exits. +.PP +A number of modifiers (\fImod\fR) may immediately follow the \fIp\fR +keyletter, to specify variations on an operation's behavior: +.IP "\fBa\fR" 4 +.IX Item "a" +Add new files \fIafter\fR an existing member of the +archive. If you use the modifier \fBa\fR, the name of an existing archive +member must be present as the \fIrelpos\fR argument, before the +\&\fIarchive\fR specification. +.IP "\fBb\fR" 4 +.IX Item "b" +Add new files \fIbefore\fR an existing member of the +archive. If you use the modifier \fBb\fR, the name of an existing archive +member must be present as the \fIrelpos\fR argument, before the +\&\fIarchive\fR specification. (same as \fBi\fR). +.IP "\fBc\fR" 4 +.IX Item "c" +\&\fICreate\fR the archive. The specified \fIarchive\fR is always +created if it did not exist, when you request an update. But a warning is +issued unless you specify in advance that you expect to create it, by +using this modifier. +.IP "\fBD\fR" 4 +.IX Item "D" +Operate in \fIdeterministic\fR mode. When adding files and the archive +index use zero for UIDs, GIDs, timestamps, and use consistent file modes +for all files. When this option is used, if \fBar\fR is used with +identical options and identical input files, multiple runs will create +identical output files regardless of the input files' owners, groups, +file modes, or modification times. +.IP "\fBf\fR" 4 +.IX Item "f" +Truncate names in the archive. \s-1GNU\s0 \fBar\fR will normally permit file +names of any length. This will cause it to create archives which are +not compatible with the native \fBar\fR program on some systems. If +this is a concern, the \fBf\fR modifier may be used to truncate file +names when putting them in the archive. +.IP "\fBi\fR" 4 +.IX Item "i" +Insert new files \fIbefore\fR an existing member of the +archive. If you use the modifier \fBi\fR, the name of an existing archive +member must be present as the \fIrelpos\fR argument, before the +\&\fIarchive\fR specification. (same as \fBb\fR). +.IP "\fBl\fR" 4 +.IX Item "l" +This modifier is accepted but not used. +.IP "\fBN\fR" 4 +.IX Item "N" +Uses the \fIcount\fR parameter. This is used if there are multiple +entries in the archive with the same name. Extract or delete instance +\&\fIcount\fR of the given name from the archive. +.IP "\fBo\fR" 4 +.IX Item "o" +Preserve the \fIoriginal\fR dates of members when extracting them. If +you do not specify this modifier, files extracted from the archive +are stamped with the time of extraction. +.IP "\fBP\fR" 4 +.IX Item "P" +Use the full path name when matching names in the archive. \s-1GNU\s0 +\&\fBar\fR can not create an archive with a full path name (such archives +are not \s-1POSIX\s0 complaint), but other archive creators can. This option +will cause \s-1GNU\s0 \fBar\fR to match file names using a complete path +name, which can be convenient when extracting a single file from an +archive created by another tool. +.IP "\fBs\fR" 4 +.IX Item "s" +Write an object-file index into the archive, or update an existing one, +even if no other change is made to the archive. You may use this modifier +flag either with any operation, or alone. Running \fBar s\fR on an +archive is equivalent to running \fBranlib\fR on it. +.IP "\fBS\fR" 4 +.IX Item "S" +Do not generate an archive symbol table. This can speed up building a +large library in several steps. The resulting archive can not be used +with the linker. In order to build a symbol table, you must omit the +\&\fBS\fR modifier on the last execution of \fBar\fR, or you must run +\&\fBranlib\fR on the archive. +.IP "\fBT\fR" 4 +.IX Item "T" +Make the specified \fIarchive\fR a \fIthin\fR archive. If it already +exists and is a regular archive, the existing members must be present +in the same directory as \fIarchive\fR. +.IP "\fBu\fR" 4 +.IX Item "u" +Normally, \fBar r\fR... inserts all files +listed into the archive. If you would like to insert \fIonly\fR those +of the files you list that are newer than existing members of the same +names, use this modifier. The \fBu\fR modifier is allowed only for the +operation \fBr\fR (replace). In particular, the combination \fBqu\fR is +not allowed, since checking the timestamps would lose any speed +advantage from the operation \fBq\fR. +.IP "\fBv\fR" 4 +.IX Item "v" +This modifier requests the \fIverbose\fR version of an operation. Many +operations display additional information, such as filenames processed, +when the modifier \fBv\fR is appended. +.IP "\fBV\fR" 4 +.IX Item "V" +This modifier shows the version number of \fBar\fR. +.PP +\&\fBar\fR ignores an initial option spelt \fB\-X32_64\fR, for +compatibility with \s-1AIX\s0. The behaviour produced by this option is the +default for \s-1GNU\s0 \fBar\fR. \fBar\fR does not support any of the other +\&\fB\-X\fR options; in particular, it does not support \fB\-X32\fR +which is the default for \s-1AIX\s0 \fBar\fR. +.PP +The optional command line switch \fB\-\-plugin\fR \fIname\fR causes +\&\fBar\fR to load the plugin called \fIname\fR which adds support +for more file formats. This option is only available if the toolchain +has been built with plugin support enabled. +.PP +The optional command line switch \fB\-\-target\fR \fIbfdname\fR +specifies that the archive members are in an object code format +different from your system's default format. See +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fInm\fR\|(1), \fIranlib\fR\|(1), and the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/binutils.info b/binutils/doc/binutils.info new file mode 100644 index 0000000..5146edc --- /dev/null +++ b/binutils/doc/binutils.info @@ -0,0 +1,4726 @@ +This is binutils.info, produced by makeinfo version 4.8 from +binutils.texi. + + Copyright (C) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. + + Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License, Version 1.3 or +any later version published by the Free Software Foundation; with no +Invariant Sections, with no Front-Cover Texts, and with no Back-Cover +Texts. A copy of the license is included in the section entitled "GNU +Free Documentation License". + +INFO-DIR-SECTION Software development +START-INFO-DIR-ENTRY +* Binutils: (binutils). The GNU binary utilities. +END-INFO-DIR-ENTRY + +INFO-DIR-SECTION Individual utilities +START-INFO-DIR-ENTRY +* addr2line: (binutils)addr2line. Convert addresses to file and line. +* ar: (binutils)ar. Create, modify, and extract from archives. +* c++filt: (binutils)c++filt. Filter to demangle encoded C++ symbols. +* cxxfilt: (binutils)c++filt. MS-DOS name for c++filt. +* dlltool: (binutils)dlltool. Create files needed to build and use DLLs. +* nlmconv: (binutils)nlmconv. Converts object code into an NLM. +* nm: (binutils)nm. List symbols from object files. +* objcopy: (binutils)objcopy. Copy and translate object files. +* objdump: (binutils)objdump. Display information from object files. +* ranlib: (binutils)ranlib. Generate index to archive contents. +* readelf: (binutils)readelf. Display the contents of ELF format files. +* size: (binutils)size. List section sizes and total size. +* strings: (binutils)strings. List printable strings from files. +* strip: (binutils)strip. Discard symbols. +* elfedit: (binutils)elfedit. Update the ELF header of ELF files. +* windmc: (binutils)windmc. Generator for Windows message resources. +* windres: (binutils)windres. Manipulate Windows resources. +END-INFO-DIR-ENTRY + + +File: binutils.info, Node: Top, Next: ar, Up: (dir) + +Introduction +************ + +This brief manual contains documentation for the GNU binary utilities +(GNU Binutils) version 2.21.90: + + This document is distributed under the terms of the GNU Free +Documentation License version 1.3. A copy of the license is included +in the section entitled "GNU Free Documentation License". + +* Menu: + +* ar:: Create, modify, and extract from archives +* nm:: List symbols from object files +* objcopy:: Copy and translate object files +* objdump:: Display information from object files +* ranlib:: Generate index to archive contents +* readelf:: Display the contents of ELF format files +* size:: List section sizes and total size +* strings:: List printable strings from files +* strip:: Discard symbols +* elfedit:: Update the ELF header of ELF files +* c++filt:: Filter to demangle encoded C++ symbols +* cxxfilt: c++filt. MS-DOS name for c++filt +* addr2line:: Convert addresses to file and line +* nlmconv:: Converts object code into an NLM +* windres:: Manipulate Windows resources +* windmc:: Generator for Windows message resources +* dlltool:: Create files needed to build and use DLLs +* Common Options:: Command-line options for all utilities +* Selecting the Target System:: How these utilities determine the target +* Reporting Bugs:: Reporting Bugs +* GNU Free Documentation License:: GNU Free Documentation License +* Binutils Index:: Binutils Index + + +File: binutils.info, Node: ar, Next: nm, Prev: Top, Up: Top + +1 ar +**** + + ar [`--plugin' NAME] [-]P[MOD [RELPOS] [COUNT]] [`--target' BFDNAME] ARCHIVE [MEMBER...] + ar -M [ '), and continues executing even after errors. If you +redirect standard input to a script file, no prompts are issued, and +`ar' abandons execution (with a nonzero exit code) on any error. + + The `ar' command language is _not_ designed to be equivalent to the +command-line options; in fact, it provides somewhat less control over +archives. The only purpose of the command language is to ease the +transition to GNU `ar' for developers who already have scripts written +for the MRI "librarian" program. + + The syntax for the `ar' command language is straightforward: + * commands are recognized in upper or lower case; for example, `LIST' + is the same as `list'. In the following descriptions, commands are + shown in upper case for clarity. + + * a single command may appear on each line; it is the first word on + the line. + + * empty lines are allowed, and have no effect. + + * comments are allowed; text after either of the characters `*' or + `;' is ignored. + + * Whenever you use a list of names as part of the argument to an `ar' + command, you can separate the individual names with either commas + or blanks. Commas are shown in the explanations below, for + clarity. + + * `+' is used as a line continuation character; if `+' appears at + the end of a line, the text on the following line is considered + part of the current command. + + Here are the commands you can use in `ar' scripts, or when using +`ar' interactively. Three of them have special significance: + + `OPEN' or `CREATE' specify a "current archive", which is a temporary +file required for most of the other commands. + + `SAVE' commits the changes so far specified by the script. Prior to +`SAVE', commands affect only the temporary copy of the current archive. + +`ADDLIB ARCHIVE' +`ADDLIB ARCHIVE (MODULE, MODULE, ... MODULE)' + Add all the contents of ARCHIVE (or, if specified, each named + MODULE from ARCHIVE) to the current archive. + + Requires prior use of `OPEN' or `CREATE'. + +`ADDMOD MEMBER, MEMBER, ... MEMBER' + Add each named MEMBER as a module in the current archive. + + Requires prior use of `OPEN' or `CREATE'. + +`CLEAR' + Discard the contents of the current archive, canceling the effect + of any operations since the last `SAVE'. May be executed (with no + effect) even if no current archive is specified. + +`CREATE ARCHIVE' + Creates an archive, and makes it the current archive (required for + many other commands). The new archive is created with a temporary + name; it is not actually saved as ARCHIVE until you use `SAVE'. + You can overwrite existing archives; similarly, the contents of any + existing file named ARCHIVE will not be destroyed until `SAVE'. + +`DELETE MODULE, MODULE, ... MODULE' + Delete each listed MODULE from the current archive; equivalent to + `ar -d ARCHIVE MODULE ... MODULE'. + + Requires prior use of `OPEN' or `CREATE'. + +`DIRECTORY ARCHIVE (MODULE, ... MODULE)' +`DIRECTORY ARCHIVE (MODULE, ... MODULE) OUTPUTFILE' + List each named MODULE present in ARCHIVE. The separate command + `VERBOSE' specifies the form of the output: when verbose output is + off, output is like that of `ar -t ARCHIVE MODULE...'. When + verbose output is on, the listing is like `ar -tv ARCHIVE + MODULE...'. + + Output normally goes to the standard output stream; however, if you + specify OUTPUTFILE as a final argument, `ar' directs the output to + that file. + +`END' + Exit from `ar', with a `0' exit code to indicate successful + completion. This command does not save the output file; if you + have changed the current archive since the last `SAVE' command, + those changes are lost. + +`EXTRACT MODULE, MODULE, ... MODULE' + Extract each named MODULE from the current archive, writing them + into the current directory as separate files. Equivalent to `ar -x + ARCHIVE MODULE...'. + + Requires prior use of `OPEN' or `CREATE'. + +`LIST' + Display full contents of the current archive, in "verbose" style + regardless of the state of `VERBOSE'. The effect is like `ar tv + ARCHIVE'. (This single command is a GNU `ar' enhancement, rather + than present for MRI compatibility.) + + Requires prior use of `OPEN' or `CREATE'. + +`OPEN ARCHIVE' + Opens an existing archive for use as the current archive (required + for many other commands). Any changes as the result of subsequent + commands will not actually affect ARCHIVE until you next use + `SAVE'. + +`REPLACE MODULE, MODULE, ... MODULE' + In the current archive, replace each existing MODULE (named in the + `REPLACE' arguments) from files in the current working directory. + To execute this command without errors, both the file, and the + module in the current archive, must exist. + + Requires prior use of `OPEN' or `CREATE'. + +`VERBOSE' + Toggle an internal flag governing the output from `DIRECTORY'. + When the flag is on, `DIRECTORY' output matches output from `ar + -tv '.... + +`SAVE' + Commit your changes to the current archive, and actually save it + as a file with the name specified in the last `CREATE' or `OPEN' + command. + + Requires prior use of `OPEN' or `CREATE'. + + + +File: binutils.info, Node: nm, Next: objcopy, Prev: ar, Up: Top + +2 nm +**** + + nm [`-a'|`--debug-syms'] + [`-g'|`--extern-only'][`--plugin' NAME] + [`-B'] [`-C'|`--demangle'[=STYLE]] [`-D'|`--dynamic'] + [`-S'|`--print-size'] [`-s'|`--print-armap'] + [`-A'|`-o'|`--print-file-name'][`--special-syms'] + [`-n'|`-v'|`--numeric-sort'] [`-p'|`--no-sort'] + [`-r'|`--reverse-sort'] [`--size-sort'] [`-u'|`--undefined-only'] + [`-t' RADIX|`--radix='RADIX] [`-P'|`--portability'] + [`--target='BFDNAME] [`-f'FORMAT|`--format='FORMAT] + [`--defined-only'] [`-l'|`--line-numbers'] [`--no-demangle'] + [`-V'|`--version'] [`-X 32_64'] [`--help'] [OBJFILE...] + + GNU `nm' lists the symbols from object files OBJFILE.... If no +object files are listed as arguments, `nm' assumes the file `a.out'. + + For each symbol, `nm' shows: + + * The symbol value, in the radix selected by options (see below), or + hexadecimal by default. + + * The symbol type. At least the following types are used; others + are, as well, depending on the object file format. If lowercase, + the symbol is usually local; if uppercase, the symbol is global + (external). There are however a few lowercase symbols that are + shown for special global symbols (`u', `v' and `w'). + + `A' + The symbol's value is absolute, and will not be changed by + further linking. + + `B' + `b' + The symbol is in the uninitialized data section (known as + BSS). + + `C' + The symbol is common. Common symbols are uninitialized data. + When linking, multiple common symbols may appear with the + same name. If the symbol is defined anywhere, the common + symbols are treated as undefined references. For more + details on common symbols, see the discussion of -warn-common + in *Note Linker options: (ld.info)Options. + + `D' + `d' + The symbol is in the initialized data section. + + `G' + `g' + The symbol is in an initialized data section for small + objects. Some object file formats permit more efficient + access to small data objects, such as a global int variable + as opposed to a large global array. + + `i' + For PE format files this indicates that the symbol is in a + section specific to the implementation of DLLs. For ELF + format files this indicates that the symbol is an indirect + function. This is a GNU extension to the standard set of ELF + symbol types. It indicates a symbol which if referenced by a + relocation does not evaluate to its address, but instead must + be invoked at runtime. The runtime execution will then + return the value to be used in the relocation. + + `N' + The symbol is a debugging symbol. + + `p' + The symbols is in a stack unwind section. + + `R' + `r' + The symbol is in a read only data section. + + `S' + `s' + The symbol is in an uninitialized data section for small + objects. + + `T' + `t' + The symbol is in the text (code) section. + + `U' + The symbol is undefined. + + `u' + The symbol is a unique global symbol. This is a GNU + extension to the standard set of ELF symbol bindings. For + such a symbol the dynamic linker will make sure that in the + entire process there is just one symbol with this name and + type in use. + + `V' + `v' + The symbol is a weak object. When a weak defined symbol is + linked with a normal defined symbol, the normal defined + symbol is used with no error. When a weak undefined symbol + is linked and the symbol is not defined, the value of the + weak symbol becomes zero with no error. On some systems, + uppercase indicates that a default value has been specified. + + `W' + `w' + The symbol is a weak symbol that has not been specifically + tagged as a weak object symbol. When a weak defined symbol + is linked with a normal defined symbol, the normal defined + symbol is used with no error. When a weak undefined symbol + is linked and the symbol is not defined, the value of the + symbol is determined in a system-specific manner without + error. On some systems, uppercase indicates that a default + value has been specified. + + `-' + The symbol is a stabs symbol in an a.out object file. In + this case, the next values printed are the stabs other field, + the stabs desc field, and the stab type. Stabs symbols are + used to hold debugging information. For more information, + see *Note Stabs: (stabs.info)Top. + + `?' + The symbol type is unknown, or object file format specific. + + * The symbol name. + + The long and short forms of options, shown here as alternatives, are +equivalent. + +`-A' +`-o' +`--print-file-name' + Precede each symbol by the name of the input file (or archive + member) in which it was found, rather than identifying the input + file once only, before all of its symbols. + +`-a' +`--debug-syms' + Display all symbols, even debugger-only symbols; normally these + are not listed. + +`-B' + The same as `--format=bsd' (for compatibility with the MIPS `nm'). + +`-C' +`--demangle[=STYLE]' + Decode ("demangle") low-level symbol names into user-level names. + Besides removing any initial underscore prepended by the system, + this makes C++ function names readable. Different compilers have + different mangling styles. The optional demangling style argument + can be used to choose an appropriate demangling style for your + compiler. *Note c++filt::, for more information on demangling. + +`--no-demangle' + Do not demangle low-level symbol names. This is the default. + +`-D' +`--dynamic' + Display the dynamic symbols rather than the normal symbols. This + is only meaningful for dynamic objects, such as certain types of + shared libraries. + +`-f FORMAT' +`--format=FORMAT' + Use the output format FORMAT, which can be `bsd', `sysv', or + `posix'. The default is `bsd'. Only the first character of + FORMAT is significant; it can be either upper or lower case. + +`-g' +`--extern-only' + Display only external symbols. + +`--plugin NAME' + Load the plugin called NAME to add support for extra target types. + This option is only available if the toolchain has been built + with plugin support enabled. + +`-l' +`--line-numbers' + For each symbol, use debugging information to try to find a + filename and line number. For a defined symbol, look for the line + number of the address of the symbol. For an undefined symbol, + look for the line number of a relocation entry which refers to the + symbol. If line number information can be found, print it after + the other symbol information. + +`-n' +`-v' +`--numeric-sort' + Sort symbols numerically by their addresses, rather than + alphabetically by their names. + +`-p' +`--no-sort' + Do not bother to sort the symbols in any order; print them in the + order encountered. + +`-P' +`--portability' + Use the POSIX.2 standard output format instead of the default + format. Equivalent to `-f posix'. + +`-S' +`--print-size' + Print both value and size of defined symbols for the `bsd' output + style. This option has no effect for object formats that do not + record symbol sizes, unless `--size-sort' is also used in which + case a calculated size is displayed. + +`-s' +`--print-armap' + When listing symbols from archive members, include the index: a + mapping (stored in the archive by `ar' or `ranlib') of which + modules contain definitions for which names. + +`-r' +`--reverse-sort' + Reverse the order of the sort (whether numeric or alphabetic); let + the last come first. + +`--size-sort' + Sort symbols by size. The size is computed as the difference + between the value of the symbol and the value of the symbol with + the next higher value. If the `bsd' output format is used the + size of the symbol is printed, rather than the value, and `-S' + must be used in order both size and value to be printed. + +`--special-syms' + Display symbols which have a target-specific special meaning. + These symbols are usually used by the target for some special + processing and are not normally helpful when included included in + the normal symbol lists. For example for ARM targets this option + would skip the mapping symbols used to mark transitions between + ARM code, THUMB code and data. + +`-t RADIX' +`--radix=RADIX' + Use RADIX as the radix for printing the symbol values. It must be + `d' for decimal, `o' for octal, or `x' for hexadecimal. + +`--target=BFDNAME' + Specify an object code format other than your system's default + format. *Note Target Selection::, for more information. + +`-u' +`--undefined-only' + Display only undefined symbols (those external to each object + file). + +`--defined-only' + Display only defined symbols for each object file. + +`-V' +`--version' + Show the version number of `nm' and exit. + +`-X' + This option is ignored for compatibility with the AIX version of + `nm'. It takes one parameter which must be the string `32_64'. + The default mode of AIX `nm' corresponds to `-X 32', which is not + supported by GNU `nm'. + +`--help' + Show a summary of the options to `nm' and exit. + + +File: binutils.info, Node: objcopy, Next: objdump, Prev: nm, Up: Top + +3 objcopy +********* + + objcopy [`-F' BFDNAME|`--target='BFDNAME] + [`-I' BFDNAME|`--input-target='BFDNAME] + [`-O' BFDNAME|`--output-target='BFDNAME] + [`-B' BFDARCH|`--binary-architecture='BFDARCH] + [`-S'|`--strip-all'] + [`-g'|`--strip-debug'] + [`-K' SYMBOLNAME|`--keep-symbol='SYMBOLNAME] + [`-N' SYMBOLNAME|`--strip-symbol='SYMBOLNAME] + [`--strip-unneeded-symbol='SYMBOLNAME] + [`-G' SYMBOLNAME|`--keep-global-symbol='SYMBOLNAME] + [`--localize-hidden'] + [`-L' SYMBOLNAME|`--localize-symbol='SYMBOLNAME] + [`--globalize-symbol='SYMBOLNAME] + [`-W' SYMBOLNAME|`--weaken-symbol='SYMBOLNAME] + [`-w'|`--wildcard'] + [`-x'|`--discard-all'] + [`-X'|`--discard-locals'] + [`-b' BYTE|`--byte='BYTE] + [`-i' [BREADTH]|`--interleave'[=BREADTH]] + [`--interleave-width='WIDTH] + [`-j' SECTIONNAME|`--only-section='SECTIONNAME] + [`-R' SECTIONNAME|`--remove-section='SECTIONNAME] + [`-p'|`--preserve-dates'] + [`--debugging'] + [`--gap-fill='VAL] + [`--pad-to='ADDRESS] + [`--set-start='VAL] + [`--adjust-start='INCR] + [`--change-addresses='INCR] + [`--change-section-address' SECTION{=,+,-}VAL] + [`--change-section-lma' SECTION{=,+,-}VAL] + [`--change-section-vma' SECTION{=,+,-}VAL] + [`--change-warnings'] [`--no-change-warnings'] + [`--set-section-flags' SECTION=FLAGS] + [`--add-section' SECTIONNAME=FILENAME] + [`--rename-section' OLDNAME=NEWNAME[,FLAGS]] + [`--long-section-names' {enable,disable,keep}] + [`--change-leading-char'] [`--remove-leading-char'] + [`--reverse-bytes='NUM] + [`--srec-len='IVAL] [`--srec-forceS3'] + [`--redefine-sym' OLD=NEW] + [`--redefine-syms='FILENAME] + [`--weaken'] + [`--keep-symbols='FILENAME] + [`--strip-symbols='FILENAME] + [`--strip-unneeded-symbols='FILENAME] + [`--keep-global-symbols='FILENAME] + [`--localize-symbols='FILENAME] + [`--globalize-symbols='FILENAME] + [`--weaken-symbols='FILENAME] + [`--alt-machine-code='INDEX] + [`--prefix-symbols='STRING] + [`--prefix-sections='STRING] + [`--prefix-alloc-sections='STRING] + [`--add-gnu-debuglink='PATH-TO-FILE] + [`--keep-file-symbols'] + [`--only-keep-debug'] + [`--extract-symbol'] + [`--writable-text'] + [`--readonly-text'] + [`--pure'] + [`--impure'] + [`--file-alignment='NUM] + [`--heap='SIZE] + [`--image-base='ADDRESS] + [`--section-alignment='NUM] + [`--stack='SIZE] + [`--subsystem='WHICH:MAJOR.MINOR] + [`--compress-debug-sections'] + [`--decompress-debug-sections'] + [`--dwarf-depth=N'] + [`--dwarf-start=N'] + [`-v'|`--verbose'] + [`-V'|`--version'] + [`--help'] [`--info'] + INFILE [OUTFILE] + + The GNU `objcopy' utility copies the contents of an object file to +another. `objcopy' uses the GNU BFD Library to read and write the +object files. It can write the destination object file in a format +different from that of the source object file. The exact behavior of +`objcopy' is controlled by command-line options. Note that `objcopy' +should be able to copy a fully linked file between any two formats. +However, copying a relocatable object file between any two formats may +not work as expected. + + `objcopy' creates temporary files to do its translations and deletes +them afterward. `objcopy' uses BFD to do all its translation work; it +has access to all the formats described in BFD and thus is able to +recognize most formats without being told explicitly. *Note BFD: +(ld.info)BFD. + + `objcopy' can be used to generate S-records by using an output +target of `srec' (e.g., use `-O srec'). + + `objcopy' can be used to generate a raw binary file by using an +output target of `binary' (e.g., use `-O binary'). When `objcopy' +generates a raw binary file, it will essentially produce a memory dump +of the contents of the input object file. All symbols and relocation +information will be discarded. The memory dump will start at the load +address of the lowest section copied into the output file. + + When generating an S-record or a raw binary file, it may be helpful +to use `-S' to remove sections containing debugging information. In +some cases `-R' will be useful to remove sections which contain +information that is not needed by the binary file. + + Note--`objcopy' is not able to change the endianness of its input +files. If the input format has an endianness (some formats do not), +`objcopy' can only copy the inputs into file formats that have the same +endianness or which have no endianness (e.g., `srec'). (However, see +the `--reverse-bytes' option.) + +`INFILE' +`OUTFILE' + The input and output files, respectively. If you do not specify + OUTFILE, `objcopy' creates a temporary file and destructively + renames the result with the name of INFILE. + +`-I BFDNAME' +`--input-target=BFDNAME' + Consider the source file's object format to be BFDNAME, rather than + attempting to deduce it. *Note Target Selection::, for more + information. + +`-O BFDNAME' +`--output-target=BFDNAME' + Write the output file using the object format BFDNAME. *Note + Target Selection::, for more information. + +`-F BFDNAME' +`--target=BFDNAME' + Use BFDNAME as the object format for both the input and the output + file; i.e., simply transfer data from source to destination with no + translation. *Note Target Selection::, for more information. + +`-B BFDARCH' +`--binary-architecture=BFDARCH' + Useful when transforming a architecture-less input file into an + object file. In this case the output architecture can be set to + BFDARCH. This option will be ignored if the input file has a + known BFDARCH. You can access this binary data inside a program + by referencing the special symbols that are created by the + conversion process. These symbols are called + _binary_OBJFILE_start, _binary_OBJFILE_end and + _binary_OBJFILE_size. e.g. you can transform a picture file into + an object file and then access it in your code using these symbols. + +`-j SECTIONNAME' +`--only-section=SECTIONNAME' + Copy only the named section from the input file to the output file. + This option may be given more than once. Note that using this + option inappropriately may make the output file unusable. + +`-R SECTIONNAME' +`--remove-section=SECTIONNAME' + Remove any section named SECTIONNAME from the output file. This + option may be given more than once. Note that using this option + inappropriately may make the output file unusable. + +`-S' +`--strip-all' + Do not copy relocation and symbol information from the source file. + +`-g' +`--strip-debug' + Do not copy debugging symbols or sections from the source file. + +`--strip-unneeded' + Strip all symbols that are not needed for relocation processing. + +`-K SYMBOLNAME' +`--keep-symbol=SYMBOLNAME' + When stripping symbols, keep symbol SYMBOLNAME even if it would + normally be stripped. This option may be given more than once. + +`-N SYMBOLNAME' +`--strip-symbol=SYMBOLNAME' + Do not copy symbol SYMBOLNAME from the source file. This option + may be given more than once. + +`--strip-unneeded-symbol=SYMBOLNAME' + Do not copy symbol SYMBOLNAME from the source file unless it is + needed by a relocation. This option may be given more than once. + +`-G SYMBOLNAME' +`--keep-global-symbol=SYMBOLNAME' + Keep only symbol SYMBOLNAME global. Make all other symbols local + to the file, so that they are not visible externally. This option + may be given more than once. + +`--localize-hidden' + In an ELF object, mark all symbols that have hidden or internal + visibility as local. This option applies on top of + symbol-specific localization options such as `-L'. + +`-L SYMBOLNAME' +`--localize-symbol=SYMBOLNAME' + Make symbol SYMBOLNAME local to the file, so that it is not + visible externally. This option may be given more than once. + +`-W SYMBOLNAME' +`--weaken-symbol=SYMBOLNAME' + Make symbol SYMBOLNAME weak. This option may be given more than + once. + +`--globalize-symbol=SYMBOLNAME' + Give symbol SYMBOLNAME global scoping so that it is visible + outside of the file in which it is defined. This option may be + given more than once. + +`-w' +`--wildcard' + Permit regular expressions in SYMBOLNAMEs used in other command + line options. The question mark (?), asterisk (*), backslash (\) + and square brackets ([]) operators can be used anywhere in the + symbol name. If the first character of the symbol name is the + exclamation point (!) then the sense of the switch is reversed for + that symbol. For example: + + -w -W !foo -W fo* + + would cause objcopy to weaken all symbols that start with "fo" + except for the symbol "foo". + +`-x' +`--discard-all' + Do not copy non-global symbols from the source file. + +`-X' +`--discard-locals' + Do not copy compiler-generated local symbols. (These usually + start with `L' or `.'.) + +`-b BYTE' +`--byte=BYTE' + If interleaving has been enabled via the `--interleave' option + then start the range of bytes to keep at the BYTEth byte. BYTE + can be in the range from 0 to BREADTH-1, where BREADTH is the + value given by the `--interleave' option. + +`-i [BREADTH]' +`--interleave[=BREADTH]' + Only copy a range out of every BREADTH bytes. (Header data is not + affected). Select which byte in the range begins the copy with + the `--byte' option. Select the width of the range with the + `--interleave-width' option. + + This option is useful for creating files to program ROM. It is + typically used with an `srec' output target. Note that `objcopy' + will complain if you do not specify the `--byte' option as well. + + The default interleave breadth is 4, so with `--byte' set to 0, + `objcopy' would copy the first byte out of every four bytes from + the input to the output. + +`--interleave-width=WIDTH' + When used with the `--interleave' option, copy WIDTH bytes at a + time. The start of the range of bytes to be copied is set by the + `--byte' option, and the extent of the range is set with the + `--interleave' option. + + The default value for this option is 1. The value of WIDTH plus + the BYTE value set by the `--byte' option must not exceed the + interleave breadth set by the `--interleave' option. + + This option can be used to create images for two 16-bit flashes + interleaved in a 32-bit bus by passing `-b 0 -i 4 + --interleave-width=2' and `-b 2 -i 4 --interleave-width=2' to two + `objcopy' commands. If the input was '12345678' then the outputs + would be '1256' and '3478' respectively. + +`-p' +`--preserve-dates' + Set the access and modification dates of the output file to be the + same as those of the input file. + +`--debugging' + Convert debugging information, if possible. This is not the + default because only certain debugging formats are supported, and + the conversion process can be time consuming. + +`--gap-fill VAL' + Fill gaps between sections with VAL. This operation applies to + the _load address_ (LMA) of the sections. It is done by increasing + the size of the section with the lower address, and filling in the + extra space created with VAL. + +`--pad-to ADDRESS' + Pad the output file up to the load address ADDRESS. This is done + by increasing the size of the last section. The extra space is + filled in with the value specified by `--gap-fill' (default zero). + +`--set-start VAL' + Set the start address of the new file to VAL. Not all object file + formats support setting the start address. + +`--change-start INCR' +`--adjust-start INCR' + Change the start address by adding INCR. Not all object file + formats support setting the start address. + +`--change-addresses INCR' +`--adjust-vma INCR' + Change the VMA and LMA addresses of all sections, as well as the + start address, by adding INCR. Some object file formats do not + permit section addresses to be changed arbitrarily. Note that + this does not relocate the sections; if the program expects + sections to be loaded at a certain address, and this option is + used to change the sections such that they are loaded at a + different address, the program may fail. + +`--change-section-address SECTION{=,+,-}VAL' +`--adjust-section-vma SECTION{=,+,-}VAL' + Set or change both the VMA address and the LMA address of the named + SECTION. If `=' is used, the section address is set to VAL. + Otherwise, VAL is added to or subtracted from the section address. + See the comments under `--change-addresses', above. If SECTION + does not exist in the input file, a warning will be issued, unless + `--no-change-warnings' is used. + +`--change-section-lma SECTION{=,+,-}VAL' + Set or change the LMA address of the named SECTION. The LMA + address is the address where the section will be loaded into + memory at program load time. Normally this is the same as the VMA + address, which is the address of the section at program run time, + but on some systems, especially those where a program is held in + ROM, the two can be different. If `=' is used, the section + address is set to VAL. Otherwise, VAL is added to or subtracted + from the section address. See the comments under + `--change-addresses', above. If SECTION does not exist in the + input file, a warning will be issued, unless + `--no-change-warnings' is used. + +`--change-section-vma SECTION{=,+,-}VAL' + Set or change the VMA address of the named SECTION. The VMA + address is the address where the section will be located once the + program has started executing. Normally this is the same as the + LMA address, which is the address where the section will be loaded + into memory, but on some systems, especially those where a program + is held in ROM, the two can be different. If `=' is used, the + section address is set to VAL. Otherwise, VAL is added to or + subtracted from the section address. See the comments under + `--change-addresses', above. If SECTION does not exist in the + input file, a warning will be issued, unless + `--no-change-warnings' is used. + +`--change-warnings' +`--adjust-warnings' + If `--change-section-address' or `--change-section-lma' or + `--change-section-vma' is used, and the named section does not + exist, issue a warning. This is the default. + +`--no-change-warnings' +`--no-adjust-warnings' + Do not issue a warning if `--change-section-address' or + `--adjust-section-lma' or `--adjust-section-vma' is used, even if + the named section does not exist. + +`--set-section-flags SECTION=FLAGS' + Set the flags for the named section. The FLAGS argument is a + comma separated string of flag names. The recognized names are + `alloc', `contents', `load', `noload', `readonly', `code', `data', + `rom', `share', and `debug'. You can set the `contents' flag for + a section which does not have contents, but it is not meaningful + to clear the `contents' flag of a section which does have + contents-just remove the section instead. Not all flags are + meaningful for all object file formats. + +`--add-section SECTIONNAME=FILENAME' + Add a new section named SECTIONNAME while copying the file. The + contents of the new section are taken from the file FILENAME. The + size of the section will be the size of the file. This option only + works on file formats which can support sections with arbitrary + names. + +`--rename-section OLDNAME=NEWNAME[,FLAGS]' + Rename a section from OLDNAME to NEWNAME, optionally changing the + section's flags to FLAGS in the process. This has the advantage + over usng a linker script to perform the rename in that the output + stays as an object file and does not become a linked executable. + + This option is particularly helpful when the input format is + binary, since this will always create a section called .data. If + for example, you wanted instead to create a section called .rodata + containing binary data you could use the following command line to + achieve it: + + objcopy -I binary -O -B \ + --rename-section .data=.rodata,alloc,load,readonly,data,contents \ + + +`--long-section-names {enable,disable,keep}' + Controls the handling of long section names when processing `COFF' + and `PE-COFF' object formats. The default behaviour, `keep', is + to preserve long section names if any are present in the input + file. The `enable' and `disable' options forcibly enable or + disable the use of long section names in the output object; when + `disable' is in effect, any long section names in the input object + will be truncated. The `enable' option will only emit long + section names if any are present in the inputs; this is mostly the + same as `keep', but it is left undefined whether the `enable' + option might force the creation of an empty string table in the + output file. + +`--change-leading-char' + Some object file formats use special characters at the start of + symbols. The most common such character is underscore, which + compilers often add before every symbol. This option tells + `objcopy' to change the leading character of every symbol when it + converts between object file formats. If the object file formats + use the same leading character, this option has no effect. + Otherwise, it will add a character, or remove a character, or + change a character, as appropriate. + +`--remove-leading-char' + If the first character of a global symbol is a special symbol + leading character used by the object file format, remove the + character. The most common symbol leading character is + underscore. This option will remove a leading underscore from all + global symbols. This can be useful if you want to link together + objects of different file formats with different conventions for + symbol names. This is different from `--change-leading-char' + because it always changes the symbol name when appropriate, + regardless of the object file format of the output file. + +`--reverse-bytes=NUM' + Reverse the bytes in a section with output contents. A section + length must be evenly divisible by the value given in order for + the swap to be able to take place. Reversing takes place before + the interleaving is performed. + + This option is used typically in generating ROM images for + problematic target systems. For example, on some target boards, + the 32-bit words fetched from 8-bit ROMs are re-assembled in + little-endian byte order regardless of the CPU byte order. + Depending on the programming model, the endianness of the ROM may + need to be modified. + + Consider a simple file with a section containing the following + eight bytes: `12345678'. + + Using `--reverse-bytes=2' for the above example, the bytes in the + output file would be ordered `21436587'. + + Using `--reverse-bytes=4' for the above example, the bytes in the + output file would be ordered `43218765'. + + By using `--reverse-bytes=2' for the above example, followed by + `--reverse-bytes=4' on the output file, the bytes in the second + output file would be ordered `34127856'. + +`--srec-len=IVAL' + Meaningful only for srec output. Set the maximum length of the + Srecords being produced to IVAL. This length covers both address, + data and crc fields. + +`--srec-forceS3' + Meaningful only for srec output. Avoid generation of S1/S2 + records, creating S3-only record format. + +`--redefine-sym OLD=NEW' + Change the name of a symbol OLD, to NEW. This can be useful when + one is trying link two things together for which you have no + source, and there are name collisions. + +`--redefine-syms=FILENAME' + Apply `--redefine-sym' to each symbol pair "OLD NEW" listed in the + file FILENAME. FILENAME is simply a flat file, with one symbol + pair per line. Line comments may be introduced by the hash + character. This option may be given more than once. + +`--weaken' + Change all global symbols in the file to be weak. This can be + useful when building an object which will be linked against other + objects using the `-R' option to the linker. This option is only + effective when using an object file format which supports weak + symbols. + +`--keep-symbols=FILENAME' + Apply `--keep-symbol' option to each symbol listed in the file + FILENAME. FILENAME is simply a flat file, with one symbol name + per line. Line comments may be introduced by the hash character. + This option may be given more than once. + +`--strip-symbols=FILENAME' + Apply `--strip-symbol' option to each symbol listed in the file + FILENAME. FILENAME is simply a flat file, with one symbol name + per line. Line comments may be introduced by the hash character. + This option may be given more than once. + +`--strip-unneeded-symbols=FILENAME' + Apply `--strip-unneeded-symbol' option to each symbol listed in + the file FILENAME. FILENAME is simply a flat file, with one + symbol name per line. Line comments may be introduced by the hash + character. This option may be given more than once. + +`--keep-global-symbols=FILENAME' + Apply `--keep-global-symbol' option to each symbol listed in the + file FILENAME. FILENAME is simply a flat file, with one symbol + name per line. Line comments may be introduced by the hash + character. This option may be given more than once. + +`--localize-symbols=FILENAME' + Apply `--localize-symbol' option to each symbol listed in the file + FILENAME. FILENAME is simply a flat file, with one symbol name + per line. Line comments may be introduced by the hash character. + This option may be given more than once. + +`--globalize-symbols=FILENAME' + Apply `--globalize-symbol' option to each symbol listed in the file + FILENAME. FILENAME is simply a flat file, with one symbol name + per line. Line comments may be introduced by the hash character. + This option may be given more than once. + +`--weaken-symbols=FILENAME' + Apply `--weaken-symbol' option to each symbol listed in the file + FILENAME. FILENAME is simply a flat file, with one symbol name + per line. Line comments may be introduced by the hash character. + This option may be given more than once. + +`--alt-machine-code=INDEX' + If the output architecture has alternate machine codes, use the + INDEXth code instead of the default one. This is useful in case a + machine is assigned an official code and the tool-chain adopts the + new code, but other applications still depend on the original code + being used. For ELF based architectures if the INDEX alternative + does not exist then the value is treated as an absolute number to + be stored in the e_machine field of the ELF header. + +`--writable-text' + Mark the output text as writable. This option isn't meaningful + for all object file formats. + +`--readonly-text' + Make the output text write protected. This option isn't + meaningful for all object file formats. + +`--pure' + Mark the output file as demand paged. This option isn't + meaningful for all object file formats. + +`--impure' + Mark the output file as impure. This option isn't meaningful for + all object file formats. + +`--prefix-symbols=STRING' + Prefix all symbols in the output file with STRING. + +`--prefix-sections=STRING' + Prefix all section names in the output file with STRING. + +`--prefix-alloc-sections=STRING' + Prefix all the names of all allocated sections in the output file + with STRING. + +`--add-gnu-debuglink=PATH-TO-FILE' + Creates a .gnu_debuglink section which contains a reference to + PATH-TO-FILE and adds it to the output file. + +`--keep-file-symbols' + When stripping a file, perhaps with `--strip-debug' or + `--strip-unneeded', retain any symbols specifying source file + names, which would otherwise get stripped. + +`--only-keep-debug' + Strip a file, removing contents of any sections that would not be + stripped by `--strip-debug' and leaving the debugging sections + intact. In ELF files, this preserves all note sections in the + output. + + The intention is that this option will be used in conjunction with + `--add-gnu-debuglink' to create a two part executable. One a + stripped binary which will occupy less space in RAM and in a + distribution and the second a debugging information file which is + only needed if debugging abilities are required. The suggested + procedure to create these files is as follows: + + 1. Link the executable as normal. Assuming that is is called + `foo' then... + + 2. Run `objcopy --only-keep-debug foo foo.dbg' to create a file + containing the debugging info. + + 3. Run `objcopy --strip-debug foo' to create a stripped + executable. + + 4. Run `objcopy --add-gnu-debuglink=foo.dbg foo' to add a link + to the debugging info into the stripped executable. + + Note--the choice of `.dbg' as an extension for the debug info file + is arbitrary. Also the `--only-keep-debug' step is optional. You + could instead do this: + + 1. Link the executable as normal. + + 2. Copy `foo' to `foo.full' + + 3. Run `objcopy --strip-debug foo' + + 4. Run `objcopy --add-gnu-debuglink=foo.full foo' + + i.e., the file pointed to by the `--add-gnu-debuglink' can be the + full executable. It does not have to be a file created by the + `--only-keep-debug' switch. + + Note--this switch is only intended for use on fully linked files. + It does not make sense to use it on object files where the + debugging information may be incomplete. Besides the + gnu_debuglink feature currently only supports the presence of one + filename containing debugging information, not multiple filenames + on a one-per-object-file basis. + +`--file-alignment NUM' + Specify the file alignment. Sections in the file will always + begin at file offsets which are multiples of this number. This + defaults to 512. [This option is specific to PE targets.] + +`--heap RESERVE' +`--heap RESERVE,COMMIT' + Specify the number of bytes of memory to reserve (and optionally + commit) to be used as heap for this program. [This option is + specific to PE targets.] + +`--image-base VALUE' + Use VALUE as the base address of your program or dll. This is the + lowest memory location that will be used when your program or dll + is loaded. To reduce the need to relocate and improve performance + of your dlls, each should have a unique base address and not + overlap any other dlls. The default is 0x400000 for executables, + and 0x10000000 for dlls. [This option is specific to PE targets.] + +`--section-alignment NUM' + Sets the section alignment. Sections in memory will always begin + at addresses which are a multiple of this number. Defaults to + 0x1000. [This option is specific to PE targets.] + +`--stack RESERVE' +`--stack RESERVE,COMMIT' + Specify the number of bytes of memory to reserve (and optionally + commit) to be used as stack for this program. [This option is + specific to PE targets.] + +`--subsystem WHICH' +`--subsystem WHICH:MAJOR' +`--subsystem WHICH:MAJOR.MINOR' + Specifies the subsystem under which your program will execute. The + legal values for WHICH are `native', `windows', `console', + `posix', `efi-app', `efi-bsd', `efi-rtd', `sal-rtd', and `xbox'. + You may optionally set the subsystem version also. Numeric values + are also accepted for WHICH. [This option is specific to PE + targets.] + +`--extract-symbol' + Keep the file's section flags and symbols but remove all section + data. Specifically, the option: + + * removes the contents of all sections; + + * sets the size of every section to zero; and + + * sets the file's start address to zero. + + This option is used to build a `.sym' file for a VxWorks kernel. + It can also be a useful way of reducing the size of a + `--just-symbols' linker input file. + +`--compress-debug-sections' + Compress DWARF debug sections using zlib. + +`--decompress-debug-sections' + Decompress DWARF debug sections using zlib. + +`-V' +`--version' + Show the version number of `objcopy'. + +`-v' +`--verbose' + Verbose output: list all object files modified. In the case of + archives, `objcopy -V' lists all members of the archive. + +`--help' + Show a summary of the options to `objcopy'. + +`--info' + Display a list showing all architectures and object formats + available. + + +File: binutils.info, Node: objdump, Next: ranlib, Prev: objcopy, Up: Top + +4 objdump +********* + + objdump [`-a'|`--archive-headers'] + [`-b' BFDNAME|`--target=BFDNAME'] + [`-C'|`--demangle'[=STYLE] ] + [`-d'|`--disassemble'] + [`-D'|`--disassemble-all'] + [`-z'|`--disassemble-zeroes'] + [`-EB'|`-EL'|`--endian='{big | little }] + [`-f'|`--file-headers'] + [`-F'|`--file-offsets'] + [`--file-start-context'] + [`-g'|`--debugging'] + [`-e'|`--debugging-tags'] + [`-h'|`--section-headers'|`--headers'] + [`-i'|`--info'] + [`-j' SECTION|`--section='SECTION] + [`-l'|`--line-numbers'] + [`-S'|`--source'] + [`-m' MACHINE|`--architecture='MACHINE] + [`-M' OPTIONS|`--disassembler-options='OPTIONS] + [`-p'|`--private-headers'] + [`-P' OPTIONS|`--private='OPTIONS] + [`-r'|`--reloc'] + [`-R'|`--dynamic-reloc'] + [`-s'|`--full-contents'] + [`-W[lLiaprmfFsoRt]'| + `--dwarf'[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]] + [`-G'|`--stabs'] + [`-t'|`--syms'] + [`-T'|`--dynamic-syms'] + [`-x'|`--all-headers'] + [`-w'|`--wide'] + [`--start-address='ADDRESS] + [`--stop-address='ADDRESS] + [`--prefix-addresses'] + [`--[no-]show-raw-insn'] + [`--adjust-vma='OFFSET] + [`--special-syms'] + [`--prefix='PREFIX] + [`--prefix-strip='LEVEL] + [`--insn-width='WIDTH] + [`-V'|`--version'] + [`-H'|`--help'] + OBJFILE... + + `objdump' displays information about one or more object files. The +options control what particular information to display. This +information is mostly useful to programmers who are working on the +compilation tools, as opposed to programmers who just want their +program to compile and work. + + OBJFILE... are the object files to be examined. When you specify +archives, `objdump' shows information on each of the member object +files. + + The long and short forms of options, shown here as alternatives, are +equivalent. At least one option from the list +`-a,-d,-D,-e,-f,-g,-G,-h,-H,-p,-P,-r,-R,-s,-S,-t,-T,-V,-x' must be +given. + +`-a' +`--archive-header' + If any of the OBJFILE files are archives, display the archive + header information (in a format similar to `ls -l'). Besides the + information you could list with `ar tv', `objdump -a' shows the + object file format of each archive member. + +`--adjust-vma=OFFSET' + When dumping information, first add OFFSET to all the section + addresses. This is useful if the section addresses do not + correspond to the symbol table, which can happen when putting + sections at particular addresses when using a format which can not + represent section addresses, such as a.out. + +`-b BFDNAME' +`--target=BFDNAME' + Specify that the object-code format for the object files is + BFDNAME. This option may not be necessary; OBJDUMP can + automatically recognize many formats. + + For example, + objdump -b oasys -m vax -h fu.o + displays summary information from the section headers (`-h') of + `fu.o', which is explicitly identified (`-m') as a VAX object file + in the format produced by Oasys compilers. You can list the + formats available with the `-i' option. *Note Target Selection::, + for more information. + +`-C' +`--demangle[=STYLE]' + Decode ("demangle") low-level symbol names into user-level names. + Besides removing any initial underscore prepended by the system, + this makes C++ function names readable. Different compilers have + different mangling styles. The optional demangling style argument + can be used to choose an appropriate demangling style for your + compiler. *Note c++filt::, for more information on demangling. + +`-g' +`--debugging' + Display debugging information. This attempts to parse STABS and + IEEE debugging format information stored in the file and print it + out using a C like syntax. If neither of these formats are found + this option falls back on the `-W' option to print any DWARF + information in the file. + +`-e' +`--debugging-tags' + Like `-g', but the information is generated in a format compatible + with ctags tool. + +`-d' +`--disassemble' + Display the assembler mnemonics for the machine instructions from + OBJFILE. This option only disassembles those sections which are + expected to contain instructions. + +`-D' +`--disassemble-all' + Like `-d', but disassemble the contents of all sections, not just + those expected to contain instructions. + + If the target is an ARM architecture this switch also has the + effect of forcing the disassembler to decode pieces of data found + in code sections as if they were instructions. + +`--prefix-addresses' + When disassembling, print the complete address on each line. This + is the older disassembly format. + +`-EB' +`-EL' +`--endian={big|little}' + Specify the endianness of the object files. This only affects + disassembly. This can be useful when disassembling a file format + which does not describe endianness information, such as S-records. + +`-f' +`--file-headers' + Display summary information from the overall header of each of the + OBJFILE files. + +`-F' +`--file-offsets' + When disassembling sections, whenever a symbol is displayed, also + display the file offset of the region of data that is about to be + dumped. If zeroes are being skipped, then when disassembly + resumes, tell the user how many zeroes were skipped and the file + offset of the location from where the disassembly resumes. When + dumping sections, display the file offset of the location from + where the dump starts. + +`--file-start-context' + Specify that when displaying interlisted source code/disassembly + (assumes `-S') from a file that has not yet been displayed, extend + the context to the start of the file. + +`-h' +`--section-headers' +`--headers' + Display summary information from the section headers of the object + file. + + File segments may be relocated to nonstandard addresses, for + example by using the `-Ttext', `-Tdata', or `-Tbss' options to + `ld'. However, some object file formats, such as a.out, do not + store the starting address of the file segments. In those + situations, although `ld' relocates the sections correctly, using + `objdump -h' to list the file section headers cannot show the + correct addresses. Instead, it shows the usual addresses, which + are implicit for the target. + +`-H' +`--help' + Print a summary of the options to `objdump' and exit. + +`-i' +`--info' + Display a list showing all architectures and object formats + available for specification with `-b' or `-m'. + +`-j NAME' +`--section=NAME' + Display information only for section NAME. + +`-l' +`--line-numbers' + Label the display (using debugging information) with the filename + and source line numbers corresponding to the object code or relocs + shown. Only useful with `-d', `-D', or `-r'. + +`-m MACHINE' +`--architecture=MACHINE' + Specify the architecture to use when disassembling object files. + This can be useful when disassembling object files which do not + describe architecture information, such as S-records. You can + list the available architectures with the `-i' option. + + If the target is an ARM architecture then this switch has an + additional effect. It restricts the disassembly to only those + instructions supported by the architecture specified by MACHINE. + If it is necessary to use this switch because the input file does + not contain any architecture information, but it is also desired to + disassemble all the instructions use `-marm'. + +`-M OPTIONS' +`--disassembler-options=OPTIONS' + Pass target specific information to the disassembler. Only + supported on some targets. If it is necessary to specify more + than one disassembler option then multiple `-M' options can be + used or can be placed together into a comma separated list. + + If the target is an ARM architecture then this switch can be used + to select which register name set is used during disassembler. + Specifying `-M reg-names-std' (the default) will select the + register names as used in ARM's instruction set documentation, but + with register 13 called 'sp', register 14 called 'lr' and register + 15 called 'pc'. Specifying `-M reg-names-apcs' will select the + name set used by the ARM Procedure Call Standard, whilst + specifying `-M reg-names-raw' will just use `r' followed by the + register number. + + There are also two variants on the APCS register naming scheme + enabled by `-M reg-names-atpcs' and `-M reg-names-special-atpcs' + which use the ARM/Thumb Procedure Call Standard naming + conventions. (Either with the normal register names or the + special register names). + + This option can also be used for ARM architectures to force the + disassembler to interpret all instructions as Thumb instructions by + using the switch `--disassembler-options=force-thumb'. This can be + useful when attempting to disassemble thumb code produced by other + compilers. + + For the x86, some of the options duplicate functions of the `-m' + switch, but allow finer grained control. Multiple selections from + the following may be specified as a comma separated string. + `x86-64', `i386' and `i8086' select disassembly for the given + architecture. `intel' and `att' select between intel syntax mode + and AT&T syntax mode. `intel-mnemonic' and `att-mnemonic' select + between intel mnemonic mode and AT&T mnemonic mode. + `intel-mnemonic' implies `intel' and `att-mnemonic' implies `att'. + `addr64', `addr32', `addr16', `data32' and `data16' specify the + default address size and operand size. These four options will be + overridden if `x86-64', `i386' or `i8086' appear later in the + option string. Lastly, `suffix', when in AT&T mode, instructs the + disassembler to print a mnemonic suffix even when the suffix could + be inferred by the operands. + + For PowerPC, `booke' controls the disassembly of BookE + instructions. `32' and `64' select PowerPC and PowerPC64 + disassembly, respectively. `e300' selects disassembly for the + e300 family. `440' selects disassembly for the PowerPC 440. + `ppcps' selects disassembly for the paired single instructions of + the PPC750CL. + + For MIPS, this option controls the printing of instruction mnemonic + names and register names in disassembled instructions. Multiple + selections from the following may be specified as a comma separated + string, and invalid options are ignored: + + `no-aliases' + Print the 'raw' instruction mnemonic instead of some pseudo + instruction mnemonic. I.e., print 'daddu' or 'or' instead of + 'move', 'sll' instead of 'nop', etc. + + `gpr-names=ABI' + Print GPR (general-purpose register) names as appropriate for + the specified ABI. By default, GPR names are selected + according to the ABI of the binary being disassembled. + + `fpr-names=ABI' + Print FPR (floating-point register) names as appropriate for + the specified ABI. By default, FPR numbers are printed + rather than names. + + `cp0-names=ARCH' + Print CP0 (system control coprocessor; coprocessor 0) + register names as appropriate for the CPU or architecture + specified by ARCH. By default, CP0 register names are + selected according to the architecture and CPU of the binary + being disassembled. + + `hwr-names=ARCH' + Print HWR (hardware register, used by the `rdhwr' + instruction) names as appropriate for the CPU or architecture + specified by ARCH. By default, HWR names are selected + according to the architecture and CPU of the binary being + disassembled. + + `reg-names=ABI' + Print GPR and FPR names as appropriate for the selected ABI. + + `reg-names=ARCH' + Print CPU-specific register names (CP0 register and HWR names) + as appropriate for the selected CPU or architecture. + + For any of the options listed above, ABI or ARCH may be specified + as `numeric' to have numbers printed rather than names, for the + selected types of registers. You can list the available values of + ABI and ARCH using the `--help' option. + + For VAX, you can specify function entry addresses with `-M + entry:0xf00ba'. You can use this multiple times to properly + disassemble VAX binary files that don't contain symbol tables (like + ROM dumps). In these cases, the function entry mask would + otherwise be decoded as VAX instructions, which would probably + lead the rest of the function being wrongly disassembled. + +`-p' +`--private-headers' + Print information that is specific to the object file format. The + exact information printed depends upon the object file format. + For some object file formats, no additional information is printed. + +`-P OPTIONS' +`--private=OPTIONS' + Print information that is specific to the object file format. The + argument OPTIONS is a comma separated list that depends on the + format (the lists of options is displayed with the help). + + For XCOFF, the available options are: `header', `aout', + `sections', `syms', `relocs', `lineno', `loader', `except', + `typchk', `traceback' and `toc'. + +`-r' +`--reloc' + Print the relocation entries of the file. If used with `-d' or + `-D', the relocations are printed interspersed with the + disassembly. + +`-R' +`--dynamic-reloc' + Print the dynamic relocation entries of the file. This is only + meaningful for dynamic objects, such as certain types of shared + libraries. As for `-r', if used with `-d' or `-D', the + relocations are printed interspersed with the disassembly. + +`-s' +`--full-contents' + Display the full contents of any sections requested. By default + all non-empty sections are displayed. + +`-S' +`--source' + Display source code intermixed with disassembly, if possible. + Implies `-d'. + +`--prefix=PREFIX' + Specify PREFIX to add to the absolute paths when used with `-S'. + +`--prefix-strip=LEVEL' + Indicate how many initial directory names to strip off the + hardwired absolute paths. It has no effect without + `--prefix='PREFIX. + +`--show-raw-insn' + When disassembling instructions, print the instruction in hex as + well as in symbolic form. This is the default except when + `--prefix-addresses' is used. + +`--no-show-raw-insn' + When disassembling instructions, do not print the instruction + bytes. This is the default when `--prefix-addresses' is used. + +`--insn-width=WIDTH' + Display WIDTH bytes on a single line when disassembling + instructions. + +`-W[lLiaprmfFsoRt]' +`--dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]' + Displays the contents of the debug sections in the file, if any are + present. If one of the optional letters or words follows the + switch then only data found in those specific sections will be + dumped. + + Note that there is no single letter option to display the content + of trace sections or .gdb_index. + + Note: the output from the `=info' option can also be affected by + the options `--dwarf-depth' and `--dwarf-start'. + +`--dwarf-depth=N' + Limit the dump of the `.debug_info' section to N children. This + is only useful with `--dwarf=info'. The default is to print all + DIEs; the special value 0 for N will also have this effect. + + With a non-zero value for N, DIEs at or deeper than N levels will + not be printed. The range for N is zero-based. + +`--dwarf-start=N' + Print only DIEs beginning with the DIE numbered N. This is only + useful with `--dwarf=info'. + + If specified, this option will suppress printing of any header + information and all DIEs before the DIE numbered N. Only siblings + and children of the specified DIE will be printed. + + This can be used in conjunction with `--dwarf-depth'. + +`-G' +`--stabs' + Display the full contents of any sections requested. Display the + contents of the .stab and .stab.index and .stab.excl sections from + an ELF file. This is only useful on systems (such as Solaris 2.0) + in which `.stab' debugging symbol-table entries are carried in an + ELF section. In most other file formats, debugging symbol-table + entries are interleaved with linkage symbols, and are visible in + the `--syms' output. For more information on stabs symbols, see + *Note Stabs: (stabs.info)Top. + +`--start-address=ADDRESS' + Start displaying data at the specified address. This affects the + output of the `-d', `-r' and `-s' options. + +`--stop-address=ADDRESS' + Stop displaying data at the specified address. This affects the + output of the `-d', `-r' and `-s' options. + +`-t' +`--syms' + Print the symbol table entries of the file. This is similar to + the information provided by the `nm' program, although the display + format is different. The format of the output depends upon the + format of the file being dumped, but there are two main types. + One looks like this: + + [ 4](sec 3)(fl 0x00)(ty 0)(scl 3) (nx 1) 0x00000000 .bss + [ 6](sec 1)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x00000000 fred + + where the number inside the square brackets is the number of the + entry in the symbol table, the SEC number is the section number, + the FL value are the symbol's flag bits, the TY number is the + symbol's type, the SCL number is the symbol's storage class and + the NX value is the number of auxilary entries associated with the + symbol. The last two fields are the symbol's value and its name. + + The other common output format, usually seen with ELF based files, + looks like this: + + 00000000 l d .bss 00000000 .bss + 00000000 g .text 00000000 fred + + Here the first number is the symbol's value (sometimes refered to + as its address). The next field is actually a set of characters + and spaces indicating the flag bits that are set on the symbol. + These characters are described below. Next is the section with + which the symbol is associated or _*ABS*_ if the section is + absolute (ie not connected with any section), or _*UND*_ if the + section is referenced in the file being dumped, but not defined + there. + + After the section name comes another field, a number, which for + common symbols is the alignment and for other symbol is the size. + Finally the symbol's name is displayed. + + The flag characters are divided into 7 groups as follows: + `l' + `g' + `u' + `!' + The symbol is a local (l), global (g), unique global (u), + neither global nor local (a space) or both global and local + (!). A symbol can be neither local or global for a variety + of reasons, e.g., because it is used for debugging, but it is + probably an indication of a bug if it is ever both local and + global. Unique global symbols are a GNU extension to the + standard set of ELF symbol bindings. For such a symbol the + dynamic linker will make sure that in the entire process + there is just one symbol with this name and type in use. + + `w' + The symbol is weak (w) or strong (a space). + + `C' + The symbol denotes a constructor (C) or an ordinary symbol (a + space). + + `W' + The symbol is a warning (W) or a normal symbol (a space). A + warning symbol's name is a message to be displayed if the + symbol following the warning symbol is ever referenced. + + `I' + + `i' + The symbol is an indirect reference to another symbol (I), a + function to be evaluated during reloc processing (i) or a + normal symbol (a space). + + `d' + `D' + The symbol is a debugging symbol (d) or a dynamic symbol (D) + or a normal symbol (a space). + + `F' + + `f' + + `O' + The symbol is the name of a function (F) or a file (f) or an + object (O) or just a normal symbol (a space). + +`-T' +`--dynamic-syms' + Print the dynamic symbol table entries of the file. This is only + meaningful for dynamic objects, such as certain types of shared + libraries. This is similar to the information provided by the `nm' + program when given the `-D' (`--dynamic') option. + +`--special-syms' + When displaying symbols include those which the target considers + to be special in some way and which would not normally be of + interest to the user. + +`-V' +`--version' + Print the version number of `objdump' and exit. + +`-x' +`--all-headers' + Display all available header information, including the symbol + table and relocation entries. Using `-x' is equivalent to + specifying all of `-a -f -h -p -r -t'. + +`-w' +`--wide' + Format some lines for output devices that have more than 80 + columns. Also do not truncate symbol names when they are + displayed. + +`-z' +`--disassemble-zeroes' + Normally the disassembly output will skip blocks of zeroes. This + option directs the disassembler to disassemble those blocks, just + like any other data. + + +File: binutils.info, Node: ranlib, Next: readelf, Prev: objdump, Up: Top + +5 ranlib +******** + + ranlib [`-vVt'] ARCHIVE + + `ranlib' generates an index to the contents of an archive and stores +it in the archive. The index lists each symbol defined by a member of +an archive that is a relocatable object file. + + You may use `nm -s' or `nm --print-armap' to list this index. + + An archive with such an index speeds up linking to the library and +allows routines in the library to call each other without regard to +their placement in the archive. + + The GNU `ranlib' program is another form of GNU `ar'; running +`ranlib' is completely equivalent to executing `ar -s'. *Note ar::. + +`-v' +`-V' +`--version' + Show the version number of `ranlib'. + +`-t' + Update the timestamp of the symbol map of an archive. + + +File: binutils.info, Node: size, Next: strings, Prev: readelf, Up: Top + +6 size +****** + + size [`-A'|`-B'|`--format='COMPATIBILITY] + [`--help'] + [`-d'|`-o'|`-x'|`--radix='NUMBER] + [`--common'] + [`-t'|`--totals'] + [`--target='BFDNAME] [`-V'|`--version'] + [OBJFILE...] + + The GNU `size' utility lists the section sizes--and the total +size--for each of the object or archive files OBJFILE in its argument +list. By default, one line of output is generated for each object file +or each module in an archive. + + OBJFILE... are the object files to be examined. If none are +specified, the file `a.out' will be used. + + The command line options have the following meanings: + +`-A' +`-B' +`--format=COMPATIBILITY' + Using one of these options, you can choose whether the output from + GNU `size' resembles output from System V `size' (using `-A', or + `--format=sysv'), or Berkeley `size' (using `-B', or + `--format=berkeley'). The default is the one-line format similar + to Berkeley's. + + Here is an example of the Berkeley (default) format of output from + `size': + $ size --format=Berkeley ranlib size + text data bss dec hex filename + 294880 81920 11592 388392 5ed28 ranlib + 294880 81920 11888 388688 5ee50 size + + This is the same data, but displayed closer to System V + conventions: + + $ size --format=SysV ranlib size + ranlib : + section size addr + .text 294880 8192 + .data 81920 303104 + .bss 11592 385024 + Total 388392 + + + size : + section size addr + .text 294880 8192 + .data 81920 303104 + .bss 11888 385024 + Total 388688 + +`--help' + Show a summary of acceptable arguments and options. + +`-d' +`-o' +`-x' +`--radix=NUMBER' + Using one of these options, you can control whether the size of + each section is given in decimal (`-d', or `--radix=10'); octal + (`-o', or `--radix=8'); or hexadecimal (`-x', or `--radix=16'). + In `--radix=NUMBER', only the three values (8, 10, 16) are + supported. The total size is always given in two radices; decimal + and hexadecimal for `-d' or `-x' output, or octal and hexadecimal + if you're using `-o'. + +`--common' + Print total size of common symbols in each file. When using + Berkeley format these are included in the bss size. + +`-t' +`--totals' + Show totals of all objects listed (Berkeley format listing mode + only). + +`--target=BFDNAME' + Specify that the object-code format for OBJFILE is BFDNAME. This + option may not be necessary; `size' can automatically recognize + many formats. *Note Target Selection::, for more information. + +`-V' +`--version' + Display the version number of `size'. + + +File: binutils.info, Node: strings, Next: strip, Prev: size, Up: Top + +7 strings +********* + + strings [`-afovV'] [`-'MIN-LEN] + [`-n' MIN-LEN] [`--bytes='MIN-LEN] + [`-t' RADIX] [`--radix='RADIX] + [`-e' ENCODING] [`--encoding='ENCODING] + [`-'] [`--all'] [`--print-file-name'] + [`-T' BFDNAME] [`--target='BFDNAME] + [`--help'] [`--version'] FILE... + + For each FILE given, GNU `strings' prints the printable character +sequences that are at least 4 characters long (or the number given with +the options below) and are followed by an unprintable character. By +default, it only prints the strings from the initialized and loaded +sections of object files; for other types of files, it prints the +strings from the whole file. + + `strings' is mainly useful for determining the contents of non-text +files. + +`-a' +`--all' +`-' + Do not scan only the initialized and loaded sections of object + files; scan the whole files. + +`-f' +`--print-file-name' + Print the name of the file before each string. + +`--help' + Print a summary of the program usage on the standard output and + exit. + +`-MIN-LEN' +`-n MIN-LEN' +`--bytes=MIN-LEN' + Print sequences of characters that are at least MIN-LEN characters + long, instead of the default 4. + +`-o' + Like `-t o'. Some other versions of `strings' have `-o' act like + `-t d' instead. Since we can not be compatible with both ways, we + simply chose one. + +`-t RADIX' +`--radix=RADIX' + Print the offset within the file before each string. The single + character argument specifies the radix of the offset--`o' for + octal, `x' for hexadecimal, or `d' for decimal. + +`-e ENCODING' +`--encoding=ENCODING' + Select the character encoding of the strings that are to be found. + Possible values for ENCODING are: `s' = single-7-bit-byte + characters (ASCII, ISO 8859, etc., default), `S' = + single-8-bit-byte characters, `b' = 16-bit bigendian, `l' = 16-bit + littleendian, `B' = 32-bit bigendian, `L' = 32-bit littleendian. + Useful for finding wide character strings. (`l' and `b' apply to, + for example, Unicode UTF-16/UCS-2 encodings). + +`-T BFDNAME' +`--target=BFDNAME' + Specify an object code format other than your system's default + format. *Note Target Selection::, for more information. + +`-v' +`-V' +`--version' + Print the program version number on the standard output and exit. + + +File: binutils.info, Node: strip, Next: elfedit, Prev: strings, Up: Top + +8 strip +******* + + strip [`-F' BFDNAME |`--target='BFDNAME] + [`-I' BFDNAME |`--input-target='BFDNAME] + [`-O' BFDNAME |`--output-target='BFDNAME] + [`-s'|`--strip-all'] + [`-S'|`-g'|`-d'|`--strip-debug'] + [`-K' SYMBOLNAME |`--keep-symbol='SYMBOLNAME] + [`-N' SYMBOLNAME |`--strip-symbol='SYMBOLNAME] + [`-w'|`--wildcard'] + [`-x'|`--discard-all'] [`-X' |`--discard-locals'] + [`-R' SECTIONNAME |`--remove-section='SECTIONNAME] + [`-o' FILE] [`-p'|`--preserve-dates'] + [`--keep-file-symbols'] + [`--only-keep-debug'] + [`-v' |`--verbose'] [`-V'|`--version'] + [`--help'] [`--info'] + OBJFILE... + + GNU `strip' discards all symbols from object files OBJFILE. The +list of object files may include archives. At least one object file +must be given. + + `strip' modifies the files named in its argument, rather than +writing modified copies under different names. + +`-F BFDNAME' +`--target=BFDNAME' + Treat the original OBJFILE as a file with the object code format + BFDNAME, and rewrite it in the same format. *Note Target + Selection::, for more information. + +`--help' + Show a summary of the options to `strip' and exit. + +`--info' + Display a list showing all architectures and object formats + available. + +`-I BFDNAME' +`--input-target=BFDNAME' + Treat the original OBJFILE as a file with the object code format + BFDNAME. *Note Target Selection::, for more information. + +`-O BFDNAME' +`--output-target=BFDNAME' + Replace OBJFILE with a file in the output format BFDNAME. *Note + Target Selection::, for more information. + +`-R SECTIONNAME' +`--remove-section=SECTIONNAME' + Remove any section named SECTIONNAME from the output file. This + option may be given more than once. Note that using this option + inappropriately may make the output file unusable. + +`-s' +`--strip-all' + Remove all symbols. + +`-g' +`-S' +`-d' +`--strip-debug' + Remove debugging symbols only. + +`--strip-unneeded' + Remove all symbols that are not needed for relocation processing. + +`-K SYMBOLNAME' +`--keep-symbol=SYMBOLNAME' + When stripping symbols, keep symbol SYMBOLNAME even if it would + normally be stripped. This option may be given more than once. + +`-N SYMBOLNAME' +`--strip-symbol=SYMBOLNAME' + Remove symbol SYMBOLNAME from the source file. This option may be + given more than once, and may be combined with strip options other + than `-K'. + +`-o FILE' + Put the stripped output in FILE, rather than replacing the + existing file. When this argument is used, only one OBJFILE + argument may be specified. + +`-p' +`--preserve-dates' + Preserve the access and modification dates of the file. + +`-w' +`--wildcard' + Permit regular expressions in SYMBOLNAMEs used in other command + line options. The question mark (?), asterisk (*), backslash (\) + and square brackets ([]) operators can be used anywhere in the + symbol name. If the first character of the symbol name is the + exclamation point (!) then the sense of the switch is reversed for + that symbol. For example: + + -w -K !foo -K fo* + + would cause strip to only keep symbols that start with the letters + "fo", but to discard the symbol "foo". + +`-x' +`--discard-all' + Remove non-global symbols. + +`-X' +`--discard-locals' + Remove compiler-generated local symbols. (These usually start + with `L' or `.'.) + +`--keep-file-symbols' + When stripping a file, perhaps with `--strip-debug' or + `--strip-unneeded', retain any symbols specifying source file + names, which would otherwise get stripped. + +`--only-keep-debug' + Strip a file, removing contents of any sections that would not be + stripped by `--strip-debug' and leaving the debugging sections + intact. In ELF files, this preserves all note sections in the + output. + + The intention is that this option will be used in conjunction with + `--add-gnu-debuglink' to create a two part executable. One a + stripped binary which will occupy less space in RAM and in a + distribution and the second a debugging information file which is + only needed if debugging abilities are required. The suggested + procedure to create these files is as follows: + + 1. Link the executable as normal. Assuming that is is called + `foo' then... + + 2. Run `objcopy --only-keep-debug foo foo.dbg' to create a file + containing the debugging info. + + 3. Run `objcopy --strip-debug foo' to create a stripped + executable. + + 4. Run `objcopy --add-gnu-debuglink=foo.dbg foo' to add a link + to the debugging info into the stripped executable. + + Note--the choice of `.dbg' as an extension for the debug info file + is arbitrary. Also the `--only-keep-debug' step is optional. You + could instead do this: + + 1. Link the executable as normal. + + 2. Copy `foo' to `foo.full' + + 3. Run `strip --strip-debug foo' + + 4. Run `objcopy --add-gnu-debuglink=foo.full foo' + + i.e., the file pointed to by the `--add-gnu-debuglink' can be the + full executable. It does not have to be a file created by the + `--only-keep-debug' switch. + + Note--this switch is only intended for use on fully linked files. + It does not make sense to use it on object files where the + debugging information may be incomplete. Besides the + gnu_debuglink feature currently only supports the presence of one + filename containing debugging information, not multiple filenames + on a one-per-object-file basis. + +`-V' +`--version' + Show the version number for `strip'. + +`-v' +`--verbose' + Verbose output: list all object files modified. In the case of + archives, `strip -v' lists all members of the archive. + + +File: binutils.info, Node: c++filt, Next: addr2line, Prev: elfedit, Up: Top + +9 c++filt +********* + + c++filt [`-_'|`--strip-underscores'] + [`-n'|`--no-strip-underscores'] + [`-p'|`--no-params'] + [`-t'|`--types'] + [`-i'|`--no-verbose'] + [`-s' FORMAT|`--format='FORMAT] + [`--help'] [`--version'] [SYMBOL...] + + The C++ and Java languages provide function overloading, which means +that you can write many functions with the same name, providing that +each function takes parameters of different types. In order to be able +to distinguish these similarly named functions C++ and Java encode them +into a low-level assembler name which uniquely identifies each +different version. This process is known as "mangling". The `c++filt' +(1) program does the inverse mapping: it decodes ("demangles") low-level +names into user-level names so that they can be read. + + Every alphanumeric word (consisting of letters, digits, underscores, +dollars, or periods) seen in the input is a potential mangled name. If +the name decodes into a C++ name, the C++ name replaces the low-level +name in the output, otherwise the original word is output. In this way +you can pass an entire assembler source file, containing mangled names, +through `c++filt' and see the same source file containing demangled +names. + + You can also use `c++filt' to decipher individual symbols by passing +them on the command line: + + c++filt SYMBOL + + If no SYMBOL arguments are given, `c++filt' reads symbol names from +the standard input instead. All the results are printed on the +standard output. The difference between reading names from the command +line versus reading names from the standard input is that command line +arguments are expected to be just mangled names and no checking is +performed to separate them from surrounding text. Thus for example: + + c++filt -n _Z1fv + + will work and demangle the name to "f()" whereas: + + c++filt -n _Z1fv, + + will not work. (Note the extra comma at the end of the mangled name +which makes it invalid). This command however will work: + + echo _Z1fv, | c++filt -n + + and will display "f(),", i.e., the demangled name followed by a +trailing comma. This behaviour is because when the names are read from +the standard input it is expected that they might be part of an +assembler source file where there might be extra, extraneous characters +trailing after a mangled name. For example: + + .type _Z1fv, @function + +`-_' +`--strip-underscores' + On some systems, both the C and C++ compilers put an underscore in + front of every name. For example, the C name `foo' gets the + low-level name `_foo'. This option removes the initial + underscore. Whether `c++filt' removes the underscore by default + is target dependent. + +`-n' +`--no-strip-underscores' + Do not remove the initial underscore. + +`-p' +`--no-params' + When demangling the name of a function, do not display the types of + the function's parameters. + +`-t' +`--types' + Attempt to demangle types as well as function names. This is + disabled by default since mangled types are normally only used + internally in the compiler, and they can be confused with + non-mangled names. For example, a function called "a" treated as + a mangled type name would be demangled to "signed char". + +`-i' +`--no-verbose' + Do not include implementation details (if any) in the demangled + output. + +`-s FORMAT' +`--format=FORMAT' + `c++filt' can decode various methods of mangling, used by + different compilers. The argument to this option selects which + method it uses: + + `auto' + Automatic selection based on executable (the default method) + + `gnu' + the one used by the GNU C++ compiler (g++) + + `lucid' + the one used by the Lucid compiler (lcc) + + `arm' + the one specified by the C++ Annotated Reference Manual + + `hp' + the one used by the HP compiler (aCC) + + `edg' + the one used by the EDG compiler + + `gnu-v3' + the one used by the GNU C++ compiler (g++) with the V3 ABI. + + `java' + the one used by the GNU Java compiler (gcj) + + `gnat' + the one used by the GNU Ada compiler (GNAT). + +`--help' + Print a summary of the options to `c++filt' and exit. + +`--version' + Print the version number of `c++filt' and exit. + + _Warning:_ `c++filt' is a new utility, and the details of its user + interface are subject to change in future releases. In particular, + a command-line option may be required in the future to decode a + name passed as an argument on the command line; in other words, + + c++filt SYMBOL + + may in a future release become + + c++filt OPTION SYMBOL + + ---------- Footnotes ---------- + + (1) MS-DOS does not allow `+' characters in file names, so on MS-DOS +this program is named `CXXFILT'. + + +File: binutils.info, Node: addr2line, Next: nlmconv, Prev: c++filt, Up: Top + +10 addr2line +************ + + addr2line [`-a'|`--addresses'] + [`-b' BFDNAME|`--target='BFDNAME] + [`-C'|`--demangle'[=STYLE]] + [`-e' FILENAME|`--exe='FILENAME] + [`-f'|`--functions'] [`-s'|`--basename'] + [`-i'|`--inlines'] + [`-p'|`--pretty-print'] + [`-j'|`--section='NAME] + [`-H'|`--help'] [`-V'|`--version'] + [addr addr ...] + + `addr2line' translates addresses into file names and line numbers. +Given an address in an executable or an offset in a section of a +relocatable object, it uses the debugging information to figure out +which file name and line number are associated with it. + + The executable or relocatable object to use is specified with the +`-e' option. The default is the file `a.out'. The section in the +relocatable object to use is specified with the `-j' option. + + `addr2line' has two modes of operation. + + In the first, hexadecimal addresses are specified on the command +line, and `addr2line' displays the file name and line number for each +address. + + In the second, `addr2line' reads hexadecimal addresses from standard +input, and prints the file name and line number for each address on +standard output. In this mode, `addr2line' may be used in a pipe to +convert dynamically chosen addresses. + + The format of the output is `FILENAME:LINENO'. The file name and +line number for each address is printed on a separate line. If the +`-f' option is used, then each `FILENAME:LINENO' line is preceded by a +`FUNCTIONNAME' line which is the name of the function containing the +address. If the `-a' option is used, then the address read is first +printed. + + If the file name or function name can not be determined, `addr2line' +will print two question marks in their place. If the line number can +not be determined, `addr2line' will print 0. + + The long and short forms of options, shown here as alternatives, are +equivalent. + +`-a' +`--addresses' + Display address before function names or file and line number + information. The address is printed with a `0x' prefix to easily + identify it. + +`-b BFDNAME' +`--target=BFDNAME' + Specify that the object-code format for the object files is + BFDNAME. + +`-C' +`--demangle[=STYLE]' + Decode ("demangle") low-level symbol names into user-level names. + Besides removing any initial underscore prepended by the system, + this makes C++ function names readable. Different compilers have + different mangling styles. The optional demangling style argument + can be used to choose an appropriate demangling style for your + compiler. *Note c++filt::, for more information on demangling. + +`-e FILENAME' +`--exe=FILENAME' + Specify the name of the executable for which addresses should be + translated. The default file is `a.out'. + +`-f' +`--functions' + Display function names as well as file and line number information. + +`-s' +`--basenames' + Display only the base of each file name. + +`-i' +`--inlines' + If the address belongs to a function that was inlined, the source + information for all enclosing scopes back to the first non-inlined + function will also be printed. For example, if `main' inlines + `callee1' which inlines `callee2', and address is from `callee2', + the source information for `callee1' and `main' will also be + printed. + +`-j' +`--section' + Read offsets relative to the specified section instead of absolute + addresses. + +`-p' +`--pretty-print' + Make the output more human friendly: each location are printed on + one line. If option `-i' is specified, lines for all enclosing + scopes are prefixed with `(inlined by)'. + + +File: binutils.info, Node: nlmconv, Next: windres, Prev: addr2line, Up: Top + +11 nlmconv +********** + +`nlmconv' converts a relocatable object file into a NetWare Loadable +Module. + + _Warning:_ `nlmconv' is not always built as part of the binary + utilities, since it is only useful for NLM targets. + + nlmconv [`-I' BFDNAME|`--input-target='BFDNAME] + [`-O' BFDNAME|`--output-target='BFDNAME] + [`-T' HEADERFILE|`--header-file='HEADERFILE] + [`-d'|`--debug'] [`-l' LINKER|`--linker='LINKER] + [`-h'|`--help'] [`-V'|`--version'] + INFILE OUTFILE + + `nlmconv' converts the relocatable `i386' object file INFILE into +the NetWare Loadable Module OUTFILE, optionally reading HEADERFILE for +NLM header information. For instructions on writing the NLM command +file language used in header files, see the `linkers' section, +`NLMLINK' in particular, of the `NLM Development and Tools Overview', +which is part of the NLM Software Developer's Kit ("NLM SDK"), +available from Novell, Inc. `nlmconv' uses the GNU Binary File +Descriptor library to read INFILE; see *Note BFD: (ld.info)BFD, for +more information. + + `nlmconv' can perform a link step. In other words, you can list +more than one object file for input if you list them in the definitions +file (rather than simply specifying one input file on the command line). +In this case, `nlmconv' calls the linker for you. + +`-I BFDNAME' +`--input-target=BFDNAME' + Object format of the input file. `nlmconv' can usually determine + the format of a given file (so no default is necessary). *Note + Target Selection::, for more information. + +`-O BFDNAME' +`--output-target=BFDNAME' + Object format of the output file. `nlmconv' infers the output + format based on the input format, e.g. for a `i386' input file the + output format is `nlm32-i386'. *Note Target Selection::, for more + information. + +`-T HEADERFILE' +`--header-file=HEADERFILE' + Reads HEADERFILE for NLM header information. For instructions on + writing the NLM command file language used in header files, see + see the `linkers' section, of the `NLM Development and Tools + Overview', which is part of the NLM Software Developer's Kit, + available from Novell, Inc. + +`-d' +`--debug' + Displays (on standard error) the linker command line used by + `nlmconv'. + +`-l LINKER' +`--linker=LINKER' + Use LINKER for any linking. LINKER can be an absolute or a + relative pathname. + +`-h' +`--help' + Prints a usage summary. + +`-V' +`--version' + Prints the version number for `nlmconv'. + + +File: binutils.info, Node: windmc, Next: dlltool, Prev: windres, Up: Top + +12 windmc +********* + +`windmc' may be used to generator Windows message resources. + + _Warning:_ `windmc' is not always built as part of the binary + utilities, since it is only useful for Windows targets. + + windmc [options] input-file + + `windmc' reads message definitions from an input file (.mc) and +translate them into a set of output files. The output files may be of +four kinds: + +`h' + A C header file containing the message definitions. + +`rc' + A resource file compilable by the `windres' tool. + +`bin' + One or more binary files containing the resource data for a + specific message language. + +`dbg' + A C include file that maps message id's to their symbolic name. + + The exact description of these different formats is available in +documentation from Microsoft. + + When `windmc' converts from the `mc' format to the `bin' format, +`rc', `h', and optional `dbg' it is acting like the Windows Message +Compiler. + +`-a' +`--ascii_in' + Specifies that the input file specified is ASCII. This is the + default behaviour. + +`-A' +`--ascii_out' + Specifies that messages in the output `bin' files should be in + ASCII format. + +`-b' +`--binprefix' + Specifies that `bin' filenames should have to be prefixed by the + basename of the source file. + +`-c' +`--customflag' + Sets the customer bit in all message id's. + +`-C CODEPAGE' +`--codepage_in CODEPAGE' + Sets the default codepage to be used to convert input file to + UTF16. The default is ocdepage 1252. + +`-d' +`--decimal_values' + Outputs the constants in the header file in decimal. Default is + using hexadecimal output. + +`-e EXT' +`--extension EXT' + The extension for the header file. The default is .h extension. + +`-F TARGET' +`--target TARGET' + Specify the BFD format to use for a bin file as output. This is a + BFD target name; you can use the `--help' option to see a list of + supported targets. Normally `windmc' will use the default format, + which is the first one listed by the `--help' option. *Note + Target Selection::. + +`-h PATH' +`--headerdir PATH' + The target directory of the generated header file. The default is + the current directory. + +`-H' +`--help' + Displays a list of command line options and then exits. + +`-m CHARACTERS' +`--maxlength CHARACTERS' + Instructs `windmc' to generate a warning if the length of any + message exceeds the number specified. + +`-n' +`--nullterminate' + Terminate message text in `bin' files by zero. By default they are + terminated by CR/LF. + +`-o' +`--hresult_use' + Not yet implemented. Instructs `windmc' to generate an OLE2 header + file, using HRESULT definitions. Status codes are used if the flag + is not specified. + +`-O CODEPAGE' +`--codepage_out CODEPAGE' + Sets the default codepage to be used to output text files. The + default is ocdepage 1252. + +`-r PATH' +`--rcdir PATH' + The target directory for the generated `rc' script and the + generated `bin' files that the resource compiler script includes. + The default is the current directory. + +`-u' +`--unicode_in' + Specifies that the input file is UTF16. + +`-U' +`--unicode_out' + Specifies that messages in the output `bin' file should be in UTF16 + format. This is the default behaviour. + +`-v' + +`--verbose' + Enable verbose mode. + +`-V' + +`--version' + Prints the version number for `windmc'. + +`-x PATH' +`--xdgb PATH' + The path of the `dbg' C include file that maps message id's to the + symbolic name. No such file is generated without specifying the + switch. + + +File: binutils.info, Node: windres, Next: windmc, Prev: nlmconv, Up: Top + +13 windres +********** + +`windres' may be used to manipulate Windows resources. + + _Warning:_ `windres' is not always built as part of the binary + utilities, since it is only useful for Windows targets. + + windres [options] [input-file] [output-file] + + `windres' reads resources from an input file and copies them into an +output file. Either file may be in one of three formats: + +`rc' + A text format read by the Resource Compiler. + +`res' + A binary format generated by the Resource Compiler. + +`coff' + A COFF object or executable. + + The exact description of these different formats is available in +documentation from Microsoft. + + When `windres' converts from the `rc' format to the `res' format, it +is acting like the Windows Resource Compiler. When `windres' converts +from the `res' format to the `coff' format, it is acting like the +Windows `CVTRES' program. + + When `windres' generates an `rc' file, the output is similar but not +identical to the format expected for the input. When an input `rc' +file refers to an external filename, an output `rc' file will instead +include the file contents. + + If the input or output format is not specified, `windres' will guess +based on the file name, or, for the input file, the file contents. A +file with an extension of `.rc' will be treated as an `rc' file, a file +with an extension of `.res' will be treated as a `res' file, and a file +with an extension of `.o' or `.exe' will be treated as a `coff' file. + + If no output file is specified, `windres' will print the resources +in `rc' format to standard output. + + The normal use is for you to write an `rc' file, use `windres' to +convert it to a COFF object file, and then link the COFF file into your +application. This will make the resources described in the `rc' file +available to Windows. + +`-i FILENAME' +`--input FILENAME' + The name of the input file. If this option is not used, then + `windres' will use the first non-option argument as the input file + name. If there are no non-option arguments, then `windres' will + read from standard input. `windres' can not read a COFF file from + standard input. + +`-o FILENAME' +`--output FILENAME' + The name of the output file. If this option is not used, then + `windres' will use the first non-option argument, after any used + for the input file name, as the output file name. If there is no + non-option argument, then `windres' will write to standard output. + `windres' can not write a COFF file to standard output. Note, for + compatibility with `rc' the option `-fo' is also accepted, but its + use is not recommended. + +`-J FORMAT' +`--input-format FORMAT' + The input format to read. FORMAT may be `res', `rc', or `coff'. + If no input format is specified, `windres' will guess, as + described above. + +`-O FORMAT' +`--output-format FORMAT' + The output format to generate. FORMAT may be `res', `rc', or + `coff'. If no output format is specified, `windres' will guess, + as described above. + +`-F TARGET' +`--target TARGET' + Specify the BFD format to use for a COFF file as input or output. + This is a BFD target name; you can use the `--help' option to see + a list of supported targets. Normally `windres' will use the + default format, which is the first one listed by the `--help' + option. *Note Target Selection::. + +`--preprocessor PROGRAM' + When `windres' reads an `rc' file, it runs it through the C + preprocessor first. This option may be used to specify the + preprocessor to use, including any leading arguments. The default + preprocessor argument is `gcc -E -xc-header -DRC_INVOKED'. + +`--preprocessor-arg OPTION' + When `windres' reads an `rc' file, it runs it through the C + preprocessor first. This option may be used to specify additional + text to be passed to preprocessor on its command line. This + option can be used multiple times to add multiple options to the + preprocessor command line. + +`-I DIRECTORY' +`--include-dir DIRECTORY' + Specify an include directory to use when reading an `rc' file. + `windres' will pass this to the preprocessor as an `-I' option. + `windres' will also search this directory when looking for files + named in the `rc' file. If the argument passed to this command + matches any of the supported FORMATS (as described in the `-J' + option), it will issue a deprecation warning, and behave just like + the `-J' option. New programs should not use this behaviour. If a + directory happens to match a FORMAT, simple prefix it with `./' to + disable the backward compatibility. + +`-D TARGET' +`--define SYM[=VAL]' + Specify a `-D' option to pass to the preprocessor when reading an + `rc' file. + +`-U TARGET' +`--undefine SYM' + Specify a `-U' option to pass to the preprocessor when reading an + `rc' file. + +`-r' + Ignored for compatibility with rc. + +`-v' + Enable verbose mode. This tells you what the preprocessor is if + you didn't specify one. + +`-c VAL' + +`--codepage VAL' + Specify the default codepage to use when reading an `rc' file. + VAL should be a hexadecimal prefixed by `0x' or decimal codepage + code. The valid range is from zero up to 0xffff, but the validity + of the codepage is host and configuration dependent. + +`-l VAL' + +`--language VAL' + Specify the default language to use when reading an `rc' file. + VAL should be a hexadecimal language code. The low eight bits are + the language, and the high eight bits are the sublanguage. + +`--use-temp-file' + Use a temporary file to instead of using popen to read the output + of the preprocessor. Use this option if the popen implementation + is buggy on the host (eg., certain non-English language versions + of Windows 95 and Windows 98 are known to have buggy popen where + the output will instead go the console). + +`--no-use-temp-file' + Use popen, not a temporary file, to read the output of the + preprocessor. This is the default behaviour. + +`-h' + +`--help' + Prints a usage summary. + +`-V' + +`--version' + Prints the version number for `windres'. + +`--yydebug' + If `windres' is compiled with `YYDEBUG' defined as `1', this will + turn on parser debugging. + + +File: binutils.info, Node: dlltool, Next: Common Options, Prev: windmc, Up: Top + +14 dlltool +********** + +`dlltool' is used to create the files needed to create dynamic link +libraries (DLLs) on systems which understand PE format image files such +as Windows. A DLL contains an export table which contains information +that the runtime loader needs to resolve references from a referencing +program. + + The export table is generated by this program by reading in a `.def' +file or scanning the `.a' and `.o' files which will be in the DLL. A +`.o' file can contain information in special `.drectve' sections with +export information. + + _Note:_ `dlltool' is not always built as part of the binary + utilities, since it is only useful for those targets which support + DLLs. + + dlltool [`-d'|`--input-def' DEF-FILE-NAME] + [`-b'|`--base-file' BASE-FILE-NAME] + [`-e'|`--output-exp' EXPORTS-FILE-NAME] + [`-z'|`--output-def' DEF-FILE-NAME] + [`-l'|`--output-lib' LIBRARY-FILE-NAME] + [`-y'|`--output-delaylib' LIBRARY-FILE-NAME] + [`--export-all-symbols'] [`--no-export-all-symbols'] + [`--exclude-symbols' LIST] + [`--no-default-excludes'] + [`-S'|`--as' PATH-TO-ASSEMBLER] [`-f'|`--as-flags' OPTIONS] + [`-D'|`--dllname' NAME] [`-m'|`--machine' MACHINE] + [`-a'|`--add-indirect'] + [`-U'|`--add-underscore'] [`--add-stdcall-underscore'] + [`-k'|`--kill-at'] [`-A'|`--add-stdcall-alias'] + [`-p'|`--ext-prefix-alias' PREFIX] + [`-x'|`--no-idata4'] [`-c'|`--no-idata5'] + [`--use-nul-prefixed-import-tables'] + [`-I'|`--identify' LIBRARY-FILE-NAME] [`--identify-strict'] + [`-i'|`--interwork'] + [`-n'|`--nodelete'] [`-t'|`--temp-prefix' PREFIX] + [`-v'|`--verbose'] + [`-h'|`--help'] [`-V'|`--version'] + [`--no-leading-underscore'] [`--leading-underscore'] + [object-file ...] + + `dlltool' reads its inputs, which can come from the `-d' and `-b' +options as well as object files specified on the command line. It then +processes these inputs and if the `-e' option has been specified it +creates a exports file. If the `-l' option has been specified it +creates a library file and if the `-z' option has been specified it +creates a def file. Any or all of the `-e', `-l' and `-z' options can +be present in one invocation of dlltool. + + When creating a DLL, along with the source for the DLL, it is +necessary to have three other files. `dlltool' can help with the +creation of these files. + + The first file is a `.def' file which specifies which functions are +exported from the DLL, which functions the DLL imports, and so on. This +is a text file and can be created by hand, or `dlltool' can be used to +create it using the `-z' option. In this case `dlltool' will scan the +object files specified on its command line looking for those functions +which have been specially marked as being exported and put entries for +them in the `.def' file it creates. + + In order to mark a function as being exported from a DLL, it needs to +have an `-export:' entry in the `.drectve' section of +the object file. This can be done in C by using the asm() operator: + + asm (".section .drectve"); + asm (".ascii \"-export:my_func\""); + + int my_func (void) { ... } + + The second file needed for DLL creation is an exports file. This +file is linked with the object files that make up the body of the DLL +and it handles the interface between the DLL and the outside world. +This is a binary file and it can be created by giving the `-e' option to +`dlltool' when it is creating or reading in a `.def' file. + + The third file needed for DLL creation is the library file that +programs will link with in order to access the functions in the DLL (an +`import library'). This file can be created by giving the `-l' option +to dlltool when it is creating or reading in a `.def' file. + + If the `-y' option is specified, dlltool generates a delay-import +library that can be used instead of the normal import library to allow +a program to link to the dll only as soon as an imported function is +called for the first time. The resulting executable will need to be +linked to the static delayimp library containing __delayLoadHelper2(), +which in turn will import LoadLibraryA and GetProcAddress from kernel32. + + `dlltool' builds the library file by hand, but it builds the exports +file by creating temporary files containing assembler statements and +then assembling these. The `-S' command line option can be used to +specify the path to the assembler that dlltool will use, and the `-f' +option can be used to pass specific flags to that assembler. The `-n' +can be used to prevent dlltool from deleting these temporary assembler +files when it is done, and if `-n' is specified twice then this will +prevent dlltool from deleting the temporary object files it used to +build the library. + + Here is an example of creating a DLL from a source file `dll.c' and +also creating a program (from an object file called `program.o') that +uses that DLL: + + gcc -c dll.c + dlltool -e exports.o -l dll.lib dll.o + gcc dll.o exports.o -o dll.dll + gcc program.o dll.lib -o program + + `dlltool' may also be used to query an existing import library to +determine the name of the DLL to which it is associated. See the +description of the `-I' or `--identify' option. + + The command line options have the following meanings: + +`-d FILENAME' +`--input-def FILENAME' + Specifies the name of a `.def' file to be read in and processed. + +`-b FILENAME' +`--base-file FILENAME' + Specifies the name of a base file to be read in and processed. The + contents of this file will be added to the relocation section in + the exports file generated by dlltool. + +`-e FILENAME' +`--output-exp FILENAME' + Specifies the name of the export file to be created by dlltool. + +`-z FILENAME' +`--output-def FILENAME' + Specifies the name of the `.def' file to be created by dlltool. + +`-l FILENAME' +`--output-lib FILENAME' + Specifies the name of the library file to be created by dlltool. + +`-y FILENAME' +`--output-delaylib FILENAME' + Specifies the name of the delay-import library file to be created + by dlltool. + +`--export-all-symbols' + Treat all global and weak defined symbols found in the input object + files as symbols to be exported. There is a small list of symbols + which are not exported by default; see the `--no-default-excludes' + option. You may add to the list of symbols to not export by using + the `--exclude-symbols' option. + +`--no-export-all-symbols' + Only export symbols explicitly listed in an input `.def' file or in + `.drectve' sections in the input object files. This is the default + behaviour. The `.drectve' sections are created by `dllexport' + attributes in the source code. + +`--exclude-symbols LIST' + Do not export the symbols in LIST. This is a list of symbol names + separated by comma or colon characters. The symbol names should + not contain a leading underscore. This is only meaningful when + `--export-all-symbols' is used. + +`--no-default-excludes' + When `--export-all-symbols' is used, it will by default avoid + exporting certain special symbols. The current list of symbols to + avoid exporting is `DllMain@12', `DllEntryPoint@0', `impure_ptr'. + You may use the `--no-default-excludes' option to go ahead and + export these special symbols. This is only meaningful when + `--export-all-symbols' is used. + +`-S PATH' +`--as PATH' + Specifies the path, including the filename, of the assembler to be + used to create the exports file. + +`-f OPTIONS' +`--as-flags OPTIONS' + Specifies any specific command line options to be passed to the + assembler when building the exports file. This option will work + even if the `-S' option is not used. This option only takes one + argument, and if it occurs more than once on the command line, + then later occurrences will override earlier occurrences. So if + it is necessary to pass multiple options to the assembler they + should be enclosed in double quotes. + +`-D NAME' +`--dll-name NAME' + Specifies the name to be stored in the `.def' file as the name of + the DLL when the `-e' option is used. If this option is not + present, then the filename given to the `-e' option will be used + as the name of the DLL. + +`-m MACHINE' +`-machine MACHINE' + Specifies the type of machine for which the library file should be + built. `dlltool' has a built in default type, depending upon how + it was created, but this option can be used to override that. + This is normally only useful when creating DLLs for an ARM + processor, when the contents of the DLL are actually encode using + Thumb instructions. + +`-a' +`--add-indirect' + Specifies that when `dlltool' is creating the exports file it + should add a section which allows the exported functions to be + referenced without using the import library. Whatever the hell + that means! + +`-U' +`--add-underscore' + Specifies that when `dlltool' is creating the exports file it + should prepend an underscore to the names of _all_ exported + symbols. + +`--no-leading-underscore' + +`--leading-underscore' + Specifies whether standard symbol should be forced to be prefixed, + or not. + +`--add-stdcall-underscore' + Specifies that when `dlltool' is creating the exports file it + should prepend an underscore to the names of exported _stdcall_ + functions. Variable names and non-stdcall function names are not + modified. This option is useful when creating GNU-compatible + import libs for third party DLLs that were built with MS-Windows + tools. + +`-k' +`--kill-at' + Specifies that when `dlltool' is creating the exports file it + should not append the string `@ '. These numbers are + called ordinal numbers and they represent another way of accessing + the function in a DLL, other than by name. + +`-A' +`--add-stdcall-alias' + Specifies that when `dlltool' is creating the exports file it + should add aliases for stdcall symbols without `@ ' in + addition to the symbols with `@ '. + +`-p' +`--ext-prefix-alias PREFIX' + Causes `dlltool' to create external aliases for all DLL imports + with the specified prefix. The aliases are created for both + external and import symbols with no leading underscore. + +`-x' +`--no-idata4' + Specifies that when `dlltool' is creating the exports and library + files it should omit the `.idata4' section. This is for + compatibility with certain operating systems. + +`--use-nul-prefixed-import-tables' + Specifies that when `dlltool' is creating the exports and library + files it should prefix the `.idata4' and `.idata5' by zero an + element. This emulates old gnu import library generation of + `dlltool'. By default this option is turned off. + +`-c' +`--no-idata5' + Specifies that when `dlltool' is creating the exports and library + files it should omit the `.idata5' section. This is for + compatibility with certain operating systems. + +`-I FILENAME' +`--identify FILENAME' + Specifies that `dlltool' should inspect the import library + indicated by FILENAME and report, on `stdout', the name(s) of the + associated DLL(s). This can be performed in addition to any other + operations indicated by the other options and arguments. + `dlltool' fails if the import library does not exist or is not + actually an import library. See also `--identify-strict'. + +`--identify-strict' + Modifies the behavior of the `--identify' option, such that an + error is reported if FILENAME is associated with more than one DLL. + +`-i' +`--interwork' + Specifies that `dlltool' should mark the objects in the library + file and exports file that it produces as supporting interworking + between ARM and Thumb code. + +`-n' +`--nodelete' + Makes `dlltool' preserve the temporary assembler files it used to + create the exports file. If this option is repeated then dlltool + will also preserve the temporary object files it uses to create + the library file. + +`-t PREFIX' +`--temp-prefix PREFIX' + Makes `dlltool' use PREFIX when constructing the names of + temporary assembler and object files. By default, the temp file + prefix is generated from the pid. + +`-v' +`--verbose' + Make dlltool describe what it is doing. + +`-h' +`--help' + Displays a list of command line options and then exits. + +`-V' +`--version' + Displays dlltool's version number and then exits. + + +* Menu: + +* def file format:: The format of the dlltool `.def' file + + +File: binutils.info, Node: def file format, Up: dlltool + +14.1 The format of the `dlltool' `.def' file +============================================ + +A `.def' file contains any number of the following commands: + +`NAME' NAME `[ ,' BASE `]' + The result is going to be named NAME`.exe'. + +`LIBRARY' NAME `[ ,' BASE `]' + The result is going to be named NAME`.dll'. + +`EXPORTS ( ( (' NAME1 `[ = ' NAME2 `] ) | ( ' NAME1 `=' MODULE-NAME `.' EXTERNAL-NAME `) ) [ == ' ITS_NAME `]' + +`[' INTEGER `] [ NONAME ] [ CONSTANT ] [ DATA ] [ PRIVATE ] ) *' + Declares NAME1 as an exported symbol from the DLL, with optional + ordinal number INTEGER, or declares NAME1 as an alias (forward) of + the function EXTERNAL-NAME in the DLL. If ITS_NAME is specified, + this name is used as string in export table. MODULE-NAME. + +`IMPORTS ( (' INTERNAL-NAME `=' MODULE-NAME `.' INTEGER `) | [' INTERNAL-NAME `= ]' MODULE-NAME `.' EXTERNAL-NAME `) [ == ) ITS_NAME `]' *' + Declares that EXTERNAL-NAME or the exported function whose ordinal + number is INTEGER is to be imported from the file MODULE-NAME. If + INTERNAL-NAME is specified then this is the name that the imported + function will be referred to in the body of the DLL. If ITS_NAME + is specified, this name is used as string in import table. + +`DESCRIPTION' STRING + Puts STRING into the output `.exp' file in the `.rdata' section. + +`STACKSIZE' NUMBER-RESERVE `[, ' NUMBER-COMMIT `]' + +`HEAPSIZE' NUMBER-RESERVE `[, ' NUMBER-COMMIT `]' + Generates `--stack' or `--heap' NUMBER-RESERVE,NUMBER-COMMIT in + the output `.drectve' section. The linker will see this and act + upon it. + +`CODE' ATTR `+' + +`DATA' ATTR `+' + +`SECTIONS (' SECTION-NAME ATTR` + ) *' + Generates `--attr' SECTION-NAME ATTR in the output `.drectve' + section, where ATTR is one of `READ', `WRITE', `EXECUTE' or + `SHARED'. The linker will see this and act upon it. + + + +File: binutils.info, Node: readelf, Next: size, Prev: ranlib, Up: Top + +15 readelf +********** + + readelf [`-a'|`--all'] + [`-h'|`--file-header'] + [`-l'|`--program-headers'|`--segments'] + [`-S'|`--section-headers'|`--sections'] + [`-g'|`--section-groups'] + [`-t'|`--section-details'] + [`-e'|`--headers'] + [`-s'|`--syms'|`--symbols'] + [`--dyn-syms'] + [`-n'|`--notes'] + [`-r'|`--relocs'] + [`-u'|`--unwind'] + [`-d'|`--dynamic'] + [`-V'|`--version-info'] + [`-A'|`--arch-specific'] + [`-D'|`--use-dynamic'] + [`-x' |`--hex-dump='] + [`-p' |`--string-dump='] + [`-R' |`--relocated-dump='] + [`-c'|`--archive-index'] + [`-w[lLiaprmfFsoRt]'| + `--debug-dump'[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]] + [`--dwarf-depth=N'] + [`--dwarf-start=N'] + [`-I'|`--histogram'] + [`-v'|`--version'] + [`-W'|`--wide'] + [`-H'|`--help'] + ELFFILE... + + `readelf' displays information about one or more ELF format object +files. The options control what particular information to display. + + ELFFILE... are the object files to be examined. 32-bit and 64-bit +ELF files are supported, as are archives containing ELF files. + + This program performs a similar function to `objdump' but it goes +into more detail and it exists independently of the BFD library, so if +there is a bug in BFD then readelf will not be affected. + + The long and short forms of options, shown here as alternatives, are +equivalent. At least one option besides `-v' or `-H' must be given. + +`-a' +`--all' + Equivalent to specifying `--file-header', `--program-headers', + `--sections', `--symbols', `--relocs', `--dynamic', `--notes' and + `--version-info'. + +`-h' +`--file-header' + Displays the information contained in the ELF header at the start + of the file. + +`-l' +`--program-headers' +`--segments' + Displays the information contained in the file's segment headers, + if it has any. + +`-S' +`--sections' +`--section-headers' + Displays the information contained in the file's section headers, + if it has any. + +`-g' +`--section-groups' + Displays the information contained in the file's section groups, + if it has any. + +`-t' +`--section-details' + Displays the detailed section information. Implies `-S'. + +`-s' +`--symbols' +`--syms' + Displays the entries in symbol table section of the file, if it + has one. + +`--dyn-syms' + Displays the entries in dynamic symbol table section of the file, + if it has one. + +`-e' +`--headers' + Display all the headers in the file. Equivalent to `-h -l -S'. + +`-n' +`--notes' + Displays the contents of the NOTE segments and/or sections, if any. + +`-r' +`--relocs' + Displays the contents of the file's relocation section, if it has + one. + +`-u' +`--unwind' + Displays the contents of the file's unwind section, if it has one. + Only the unwind sections for IA64 ELF files, as well as ARM + unwind tables (`.ARM.exidx' / `.ARM.extab') are currently + supported. + +`-d' +`--dynamic' + Displays the contents of the file's dynamic section, if it has one. + +`-V' +`--version-info' + Displays the contents of the version sections in the file, it they + exist. + +`-A' +`--arch-specific' + Displays architecture-specific information in the file, if there + is any. + +`-D' +`--use-dynamic' + When displaying symbols, this option makes `readelf' use the + symbol hash tables in the file's dynamic section, rather than the + symbol table sections. + +`-x ' +`--hex-dump=' + Displays the contents of the indicated section as a hexadecimal + bytes. A number identifies a particular section by index in the + section table; any other string identifies all sections with that + name in the object file. + +`-R ' +`--relocated-dump=' + Displays the contents of the indicated section as a hexadecimal + bytes. A number identifies a particular section by index in the + section table; any other string identifies all sections with that + name in the object file. The contents of the section will be + relocated before they are displayed. + +`-p ' +`--string-dump=' + Displays the contents of the indicated section as printable + strings. A number identifies a particular section by index in the + section table; any other string identifies all sections with that + name in the object file. + +`-c' +`--archive-index' + Displays the file symbol index infomation contained in the header + part of binary archives. Performs the same function as the `t' + command to `ar', but without using the BFD library. *Note ar::. + +`-w[lLiaprmfFsoRt]' +`--debug-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]' + Displays the contents of the debug sections in the file, if any are + present. If one of the optional letters or words follows the + switch then only data found in those specific sections will be + dumped. + + Note that there is no single letter option to display the content + of trace sections or .gdb_index. + + Note: the `=decodedline' option will display the interpreted + contents of a .debug_line section whereas the `=rawline' option + dumps the contents in a raw format. + + Note: the `=frames-interp' option will display the interpreted + contents of a .debug_frame section whereas the `=frames' option + dumps the contents in a raw format. + + Note: the output from the `=info' option can also be affected by + the options `--dwarf-depth' and `--dwarf-start'. + +`--dwarf-depth=N' + Limit the dump of the `.debug_info' section to N children. This + is only useful with `--debug-dump=info'. The default is to print + all DIEs; the special value 0 for N will also have this effect. + + With a non-zero value for N, DIEs at or deeper than N levels will + not be printed. The range for N is zero-based. + +`--dwarf-start=N' + Print only DIEs beginning with the DIE numbered N. This is only + useful with `--debug-dump=info'. + + If specified, this option will suppress printing of any header + information and all DIEs before the DIE numbered N. Only siblings + and children of the specified DIE will be printed. + + This can be used in conjunction with `--dwarf-depth'. + +`-I' +`--histogram' + Display a histogram of bucket list lengths when displaying the + contents of the symbol tables. + +`-v' +`--version' + Display the version number of readelf. + +`-W' +`--wide' + Don't break output lines to fit into 80 columns. By default + `readelf' breaks section header and segment listing lines for + 64-bit ELF files, so that they fit into 80 columns. This option + causes `readelf' to print each section header resp. each segment + one a single line, which is far more readable on terminals wider + than 80 columns. + +`-H' +`--help' + Display the command line options understood by `readelf'. + + + +File: binutils.info, Node: elfedit, Next: c++filt, Prev: strip, Up: Top + +16 elfedit +********** + + elfedit [`--input-mach='MACHINE] + [`--input-type='TYPE] + [`--input-osabi='OSABI] + `--output-mach='MACHINE + `--output-type='TYPE + `--output-osabi='OSABI + [`-v'|`--version'] + [`-h'|`--help'] + ELFFILE... + + `elfedit' updates the ELF header of ELF files which have the +matching ELF machine and file types. The options control how and which +fields in the ELF header should be updated. + + ELFFILE... are the ELF files to be updated. 32-bit and 64-bit ELF +files are supported, as are archives containing ELF files. + + The long and short forms of options, shown here as alternatives, are +equivalent. At least one of the `--output-mach', `--output-type' and +`--output-osabi' options must be given. + +`--input-mach=MACHINE' + Set the matching input ELF machine type to MACHINE. If + `--input-mach' isn't specified, it will match any ELF machine + types. + + The supported ELF machine types are, L1OM, K1OM and X86-64. + +`--output-mach=MACHINE' + Change the ELF machine type in the ELF header to MACHINE. The + supported ELF machine types are the same as `--input-mach'. + +`--input-type=TYPE' + Set the matching input ELF file type to TYPE. If `--input-type' + isn't specified, it will match any ELF file types. + + The supported ELF file types are, REL, EXEC and DYN. + +`--output-type=TYPE' + Change the ELF file type in the ELF header to TYPE. The supported + ELF types are the same as `--input-type'. + +`--input-osabi=OSABI' + Set the matching input ELF file OSABI to OSABI. If + `--input-osabi' isn't specified, it will match any ELF OSABIs. + + The supported ELF OSABIs are, NONE, HPUX, NETBSD, GNU, LINUX + (alias for GNU), SOLARIS, AIX, IRIX, FREEBSD, TRU64, MODESTO, + OPENBSD, OPENVMS, NSK, AROS and FENIXOS. + +`--output-osabi=OSABI' + Change the ELF OSABI in the ELF header to OSABI. The supported + ELF OSABI are the same as `--input-osabi'. + +`-v' +`--version' + Display the version number of `elfedit'. + +`-h' +`--help' + Display the command line options understood by `elfedit'. + + + +File: binutils.info, Node: Common Options, Next: Selecting the Target System, Prev: dlltool, Up: Top + +17 Common Options +***************** + +The following command-line options are supported by all of the programs +described in this manual. + +`@FILE' + Read command-line options from FILE. The options read are + inserted in place of the original @FILE option. If FILE does not + exist, or cannot be read, then the option will be treated + literally, and not removed. + + Options in FILE are separated by whitespace. A whitespace + character may be included in an option by surrounding the entire + option in either single or double quotes. Any character + (including a backslash) may be included by prefixing the character + to be included with a backslash. The FILE may itself contain + additional @FILE options; any such options will be processed + recursively. + +`--help' + Display the command-line options supported by the program. + +`--version' + Display the version number of the program. + + + +File: binutils.info, Node: Selecting the Target System, Next: Reporting Bugs, Prev: Common Options, Up: Top + +18 Selecting the Target System +****************************** + +You can specify two aspects of the target system to the GNU binary file +utilities, each in several ways: + + * the target + + * the architecture + + In the following summaries, the lists of ways to specify values are +in order of decreasing precedence. The ways listed first override those +listed later. + + The commands to list valid values only list the values for which the +programs you are running were configured. If they were configured with +`--enable-targets=all', the commands list most of the available values, +but a few are left out; not all targets can be configured in at once +because some of them can only be configured "native" (on hosts with the +same type as the target system). + +* Menu: + +* Target Selection:: +* Architecture Selection:: + + +File: binutils.info, Node: Target Selection, Next: Architecture Selection, Up: Selecting the Target System + +18.1 Target Selection +===================== + +A "target" is an object file format. A given target may be supported +for multiple architectures (*note Architecture Selection::). A target +selection may also have variations for different operating systems or +architectures. + + The command to list valid target values is `objdump -i' (the first +column of output contains the relevant information). + + Some sample values are: `a.out-hp300bsd', `ecoff-littlemips', +`a.out-sunos-big'. + + You can also specify a target using a configuration triplet. This is +the same sort of name that is passed to `configure' to specify a +target. When you use a configuration triplet as an argument, it must be +fully canonicalized. You can see the canonical version of a triplet by +running the shell script `config.sub' which is included with the +sources. + + Some sample configuration triplets are: `m68k-hp-bsd', +`mips-dec-ultrix', `sparc-sun-sunos'. + +`objdump' Target +---------------- + +Ways to specify: + + 1. command line option: `-b' or `--target' + + 2. environment variable `GNUTARGET' + + 3. deduced from the input file + +`objcopy' and `strip' Input Target +---------------------------------- + +Ways to specify: + + 1. command line options: `-I' or `--input-target', or `-F' or + `--target' + + 2. environment variable `GNUTARGET' + + 3. deduced from the input file + +`objcopy' and `strip' Output Target +----------------------------------- + +Ways to specify: + + 1. command line options: `-O' or `--output-target', or `-F' or + `--target' + + 2. the input target (see "`objcopy' and `strip' Input Target" above) + + 3. environment variable `GNUTARGET' + + 4. deduced from the input file + +`nm', `size', and `strings' Target +---------------------------------- + +Ways to specify: + + 1. command line option: `--target' + + 2. environment variable `GNUTARGET' + + 3. deduced from the input file + + +File: binutils.info, Node: Architecture Selection, Prev: Target Selection, Up: Selecting the Target System + +18.2 Architecture Selection +=========================== + +An "architecture" is a type of CPU on which an object file is to run. +Its name may contain a colon, separating the name of the processor +family from the name of the particular CPU. + + The command to list valid architecture values is `objdump -i' (the +second column contains the relevant information). + + Sample values: `m68k:68020', `mips:3000', `sparc'. + +`objdump' Architecture +---------------------- + +Ways to specify: + + 1. command line option: `-m' or `--architecture' + + 2. deduced from the input file + +`objcopy', `nm', `size', `strings' Architecture +----------------------------------------------- + +Ways to specify: + + 1. deduced from the input file + + +File: binutils.info, Node: Reporting Bugs, Next: GNU Free Documentation License, Prev: Selecting the Target System, Up: Top + +19 Reporting Bugs +***************** + +Your bug reports play an essential role in making the binary utilities +reliable. + + Reporting a bug may help you by bringing a solution to your problem, +or it may not. But in any case the principal function of a bug report +is to help the entire community by making the next version of the binary +utilities work better. Bug reports are your contribution to their +maintenance. + + In order for a bug report to serve its purpose, you must include the +information that enables us to fix the bug. + +* Menu: + +* Bug Criteria:: Have you found a bug? +* Bug Reporting:: How to report bugs + + +File: binutils.info, Node: Bug Criteria, Next: Bug Reporting, Up: Reporting Bugs + +19.1 Have You Found a Bug? +========================== + +If you are not sure whether you have found a bug, here are some +guidelines: + + * If a binary utility gets a fatal signal, for any input whatever, + that is a bug. Reliable utilities never crash. + + * If a binary utility produces an error message for valid input, + that is a bug. + + * If you are an experienced user of binary utilities, your + suggestions for improvement are welcome in any case. + + +File: binutils.info, Node: Bug Reporting, Prev: Bug Criteria, Up: Reporting Bugs + +19.2 How to Report Bugs +======================= + +A number of companies and individuals offer support for GNU products. +If you obtained the binary utilities from a support organization, we +recommend you contact that organization first. + + You can find contact information for many support companies and +individuals in the file `etc/SERVICE' in the GNU Emacs distribution. + + In any event, we also recommend that you send bug reports for the +binary utilities to `http://www.sourceware.org/bugzilla/'. + + The fundamental principle of reporting bugs usefully is this: +*report all the facts*. If you are not sure whether to state a fact or +leave it out, state it! + + Often people omit facts because they think they know what causes the +problem and assume that some details do not matter. Thus, you might +assume that the name of a file you use in an example does not matter. +Well, probably it does not, but one cannot be sure. Perhaps the bug is +a stray memory reference which happens to fetch from the location where +that pathname is stored in memory; perhaps, if the pathname were +different, the contents of that location would fool the utility into +doing the right thing despite the bug. Play it safe and give a +specific, complete example. That is the easiest thing for you to do, +and the most helpful. + + Keep in mind that the purpose of a bug report is to enable us to fix +the bug if it is new to us. Therefore, always write your bug reports +on the assumption that the bug has not been reported previously. + + Sometimes people give a few sketchy facts and ask, "Does this ring a +bell?" This cannot help us fix a bug, so it is basically useless. We +respond by asking for enough details to enable us to investigate. You +might as well expedite matters by sending them to begin with. + + To enable us to fix the bug, you should include all these things: + + * The version of the utility. Each utility announces it if you + start it with the `--version' argument. + + Without this, we will not know whether there is any point in + looking for the bug in the current version of the binary utilities. + + * Any patches you may have applied to the source, including any + patches made to the `BFD' library. + + * The type of machine you are using, and the operating system name + and version number. + + * What compiler (and its version) was used to compile the + utilities--e.g. "`gcc-2.7'". + + * The command arguments you gave the utility to observe the bug. To + guarantee you will not omit something important, list them all. A + copy of the Makefile (or the output from make) is sufficient. + + If we were to try to guess the arguments, we would probably guess + wrong and then we might not encounter the bug. + + * A complete input file, or set of input files, that will reproduce + the bug. If the utility is reading an object file or files, then + it is generally most helpful to send the actual object files. + + If the source files were produced exclusively using GNU programs + (e.g., `gcc', `gas', and/or the GNU `ld'), then it may be OK to + send the source files rather than the object files. In this case, + be sure to say exactly what version of `gcc', or whatever, was + used to produce the object files. Also say how `gcc', or + whatever, was configured. + + * A description of what behavior you observe that you believe is + incorrect. For example, "It gets a fatal signal." + + Of course, if the bug is that the utility gets a fatal signal, + then we will certainly notice it. But if the bug is incorrect + output, we might not notice unless it is glaringly wrong. You + might as well not give us a chance to make a mistake. + + Even if the problem you experience is a fatal signal, you should + still say so explicitly. Suppose something strange is going on, + such as your copy of the utility is out of sync, or you have + encountered a bug in the C library on your system. (This has + happened!) Your copy might crash and ours would not. If you told + us to expect a crash, then when ours fails to crash, we would know + that the bug was not happening for us. If you had not told us to + expect a crash, then we would not be able to draw any conclusion + from our observations. + + * If you wish to suggest changes to the source, send us context + diffs, as generated by `diff' with the `-u', `-c', or `-p' option. + Always send diffs from the old file to the new file. If you wish + to discuss something in the `ld' source, refer to it by context, + not by line number. + + The line numbers in our development sources will not match those + in your sources. Your line numbers would convey no useful + information to us. + + Here are some things that are not necessary: + + * A description of the envelope of the bug. + + Often people who encounter a bug spend a lot of time investigating + which changes to the input file will make the bug go away and which + changes will not affect it. + + This is often time consuming and not very useful, because the way + we will find the bug is by running a single example under the + debugger with breakpoints, not by pure deduction from a series of + examples. We recommend that you save your time for something else. + + Of course, if you can find a simpler example to report _instead_ + of the original one, that is a convenience for us. Errors in the + output will be easier to spot, running under the debugger will take + less time, and so on. + + However, simplification is not vital; if you do not want to do + this, report the bug anyway and send us the entire test case you + used. + + * A patch for the bug. + + A patch for the bug does help us if it is a good one. But do not + omit the necessary information, such as the test case, on the + assumption that a patch is all we need. We might see problems + with your patch and decide to fix the problem another way, or we + might not understand it at all. + + Sometimes with programs as complicated as the binary utilities it + is very hard to construct an example that will make the program + follow a certain path through the code. If you do not send us the + example, we will not be able to construct one, so we will not be + able to verify that the bug is fixed. + + And if we cannot understand what bug you are trying to fix, or why + your patch should be an improvement, we will not install it. A + test case will help us to understand. + + * A guess about what the bug is or what it depends on. + + Such guesses are usually wrong. Even we cannot guess right about + such things without first using the debugger to find the facts. + + +File: binutils.info, Node: GNU Free Documentation License, Next: Binutils Index, Prev: Reporting Bugs, Up: Top + +Appendix A GNU Free Documentation License +***************************************** + + Version 1.3, 3 November 2008 + + Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc. + `http://fsf.org/' + + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + 0. PREAMBLE + + The purpose of this License is to make a manual, textbook, or other + functional and useful document "free" in the sense of freedom: to + assure everyone the effective freedom to copy and redistribute it, + with or without modifying it, either commercially or + noncommercially. Secondarily, this License preserves for the + author and publisher a way to get credit for their work, while not + being considered responsible for modifications made by others. + + This License is a kind of "copyleft", which means that derivative + works of the document must themselves be free in the same sense. + It complements the GNU General Public License, which is a copyleft + license designed for free software. + + We have designed this License in order to use it for manuals for + free software, because free software needs free documentation: a + free program should come with manuals providing the same freedoms + that the software does. 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TRANSLATION + + Translation is considered a kind of modification, so you may + distribute translations of the Document under the terms of section + 4. Replacing Invariant Sections with translations requires special + permission from their copyright holders, but you may include + translations of some or all Invariant Sections in addition to the + original versions of these Invariant Sections. You may include a + translation of this License, and all the license notices in the + Document, and any Warranty Disclaimers, provided that you also + include the original English version of this License and the + original versions of those notices and disclaimers. In case of a + disagreement between the translation and the original version of + this License or a notice or disclaimer, the original version will + prevail. + + If a section in the Document is Entitled "Acknowledgements", + "Dedications", or "History", the requirement (section 4) to + Preserve its Title (section 1) will typically require changing the + actual title. + + 9. TERMINATION + + You may not copy, modify, sublicense, or distribute the Document + except as expressly provided under this License. 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If your rights have been terminated and + not permanently reinstated, receipt of a copy of some or all of + the same material does not give you any rights to use it. + + 10. FUTURE REVISIONS OF THIS LICENSE + + The Free Software Foundation may publish new, revised versions of + the GNU Free Documentation License from time to time. Such new + versions will be similar in spirit to the present version, but may + differ in detail to address new problems or concerns. See + `http://www.gnu.org/copyleft/'. + + Each version of the License is given a distinguishing version + number. If the Document specifies that a particular numbered + version of this License "or any later version" applies to it, you + have the option of following the terms and conditions either of + that specified version or of any later version that has been + published (not as a draft) by the Free Software Foundation. If + the Document does not specify a version number of this License, + you may choose any version ever published (not as a draft) by the + Free Software Foundation. If the Document specifies that a proxy + can decide which future versions of this License can be used, that + proxy's public statement of acceptance of a version permanently + authorizes you to choose that version for the Document. + + 11. RELICENSING + + "Massive Multiauthor Collaboration Site" (or "MMC Site") means any + World Wide Web server that publishes copyrightable works and also + provides prominent facilities for anybody to edit those works. A + public wiki that anybody can edit is an example of such a server. + A "Massive Multiauthor Collaboration" (or "MMC") contained in the + site means any set of copyrightable works thus published on the MMC + site. + + "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0 + license published by Creative Commons Corporation, a not-for-profit + corporation with a principal place of business in San Francisco, + California, as well as future copyleft versions of that license + published by that same organization. + + "Incorporate" means to publish or republish a Document, in whole or + in part, as part of another Document. + + An MMC is "eligible for relicensing" if it is licensed under this + License, and if all works that were first published under this + License somewhere other than this MMC, and subsequently + incorporated in whole or in part into the MMC, (1) had no cover + texts or invariant sections, and (2) were thus incorporated prior + to November 1, 2008. + + The operator of an MMC Site may republish an MMC contained in the + site under CC-BY-SA on the same site at any time before August 1, + 2009, provided the MMC is eligible for relicensing. + + +ADDENDUM: How to use this License for your documents +==================================================== + +To use this License in a document you have written, include a copy of +the License in the document and put the following copyright and license +notices just after the title page: + + Copyright (C) YEAR YOUR NAME. + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover + Texts. A copy of the license is included in the section entitled ``GNU + Free Documentation License''. + + If you have Invariant Sections, Front-Cover Texts and Back-Cover +Texts, replace the "with...Texts." line with this: + + with the Invariant Sections being LIST THEIR TITLES, with + the Front-Cover Texts being LIST, and with the Back-Cover Texts + being LIST. + + If you have Invariant Sections without Cover Texts, or some other +combination of the three, merge those two alternatives to suit the +situation. + + If your document contains nontrivial examples of program code, we +recommend releasing these examples in parallel under your choice of +free software license, such as the GNU General Public License, to +permit their use in free software. + + +File: binutils.info, Node: Binutils Index, Prev: GNU Free Documentation License, Up: Top + +Binutils Index +************** + +[index] +* Menu: + +* .stab: objdump. (line 406) +* Add prefix to absolute paths: objdump. (line 353) +* addr2line: addr2line. (line 6) +* address to file name and line number: addr2line. (line 6) +* all header information, object file: objdump. (line 525) +* ar: ar. (line 6) +* ar compatibility: ar. (line 50) +* architecture: objdump. (line 197) +* architectures available: objdump. (line 182) +* archive contents: ranlib. (line 6) +* Archive file symbol index information: readelf. (line 155) +* archive headers: objdump. (line 67) +* archives: ar. (line 6) +* base files: dlltool. (line 124) +* bug criteria: Bug Criteria. (line 6) +* bug reports: Bug Reporting. (line 6) +* bugs: Reporting Bugs. (line 6) +* bugs, reporting: Bug Reporting. (line 6) +* c++filt: c++filt. (line 6) +* changing object addresses: objcopy. (line 310) +* changing section address: objcopy. (line 320) +* changing section LMA: objcopy. (line 328) +* changing section VMA: objcopy. (line 341) +* changing start address: objcopy. (line 305) +* collections of files: ar. (line 6) +* compatibility, ar: ar. (line 50) +* contents of archive: ar cmdline. (line 94) +* crash: Bug Criteria. (line 9) +* creating archives: ar cmdline. (line 142) +* creating thin archive: ar cmdline. (line 203) +* cxxfilt: c++filt. (line 14) +* dates in archive: ar cmdline. (line 177) +* debug symbols: objdump. (line 406) +* debugging symbols: nm. (line 143) +* deleting from archive: ar cmdline. (line 26) +* demangling C++ symbols: c++filt. (line 6) +* demangling in nm: nm. (line 151) +* demangling in objdump <1>: objdump. (line 95) +* demangling in objdump: addr2line. (line 64) +* deterministic archives: ar cmdline. (line 148) +* disassembling object code: objdump. (line 117) +* disassembly architecture: objdump. (line 197) +* disassembly endianness: objdump. (line 137) +* disassembly, with source: objdump. (line 349) +* discarding symbols: strip. (line 6) +* DLL: dlltool. (line 6) +* dlltool: dlltool. (line 6) +* DWARF: objdump. (line 375) +* dynamic relocation entries, in object file: objdump. (line 337) +* dynamic symbol table entries, printing: objdump. (line 509) +* dynamic symbols: nm. (line 163) +* ELF dynamic section information: readelf. (line 113) +* ELF dynamic symbol table information: readelf. (line 88) +* ELF file header information: readelf. (line 57) +* ELF file information: readelf. (line 6) +* ELF notes: readelf. (line 97) +* ELF object file format: objdump. (line 406) +* ELF program header information: readelf. (line 63) +* ELF reloc information: readelf. (line 101) +* ELF section group information: readelf. (line 74) +* ELF section information: readelf. (line 69) +* ELF segment information: readelf. (line 63) +* ELF symbol table information: readelf. (line 84) +* ELF version sections informations: readelf. (line 117) +* elfedit: elfedit. (line 6) +* endianness: objdump. (line 137) +* error on valid input: Bug Criteria. (line 12) +* external symbols: nm. (line 175) +* extract from archive: ar cmdline. (line 109) +* fatal signal: Bug Criteria. (line 9) +* file name: nm. (line 137) +* header information, all: objdump. (line 525) +* input .def file: dlltool. (line 120) +* input file name: nm. (line 137) +* Instruction width: objdump. (line 370) +* libraries: ar. (line 25) +* listings strings: strings. (line 6) +* load plugin: nm. (line 178) +* machine instructions: objdump. (line 117) +* moving in archive: ar cmdline. (line 34) +* MRI compatibility, ar: ar scripts. (line 8) +* name duplication in archive: ar cmdline. (line 103) +* name length: ar. (line 18) +* nm: nm. (line 6) +* nm compatibility: nm. (line 169) +* nm format: nm. (line 169) +* not writing archive index: ar cmdline. (line 196) +* objdump: objdump. (line 6) +* object code format <1>: strings. (line 67) +* object code format <2>: nm. (line 246) +* object code format <3>: objdump. (line 81) +* object code format <4>: addr2line. (line 59) +* object code format: size. (line 84) +* object file header: objdump. (line 143) +* object file information: objdump. (line 6) +* object file offsets: objdump. (line 148) +* object file sections: objdump. (line 344) +* object formats available: objdump. (line 182) +* operations on archive: ar cmdline. (line 22) +* printing from archive: ar cmdline. (line 46) +* printing strings: strings. (line 6) +* quick append to archive: ar cmdline. (line 54) +* radix for section sizes: size. (line 66) +* ranlib <1>: ranlib. (line 6) +* ranlib: ar cmdline. (line 88) +* readelf: readelf. (line 6) +* relative placement in archive: ar cmdline. (line 130) +* relocation entries, in object file: objdump. (line 331) +* removing symbols: strip. (line 6) +* repeated names in archive: ar cmdline. (line 103) +* replacement in archive: ar cmdline. (line 70) +* reporting bugs: Reporting Bugs. (line 6) +* scripts, ar: ar scripts. (line 8) +* section addresses in objdump: objdump. (line 73) +* section headers: objdump. (line 164) +* section information: objdump. (line 187) +* section sizes: size. (line 6) +* sections, full contents: objdump. (line 344) +* size: size. (line 6) +* size display format: size. (line 27) +* size number format: size. (line 66) +* sorting symbols: nm. (line 199) +* source code context: objdump. (line 157) +* source disassembly: objdump. (line 349) +* source file name: nm. (line 137) +* source filenames for object files: objdump. (line 191) +* stab: objdump. (line 406) +* start-address: objdump. (line 416) +* stop-address: objdump. (line 420) +* strings: strings. (line 6) +* strings, printing: strings. (line 6) +* strip: strip. (line 6) +* Strip absolute paths: objdump. (line 356) +* symbol index <1>: ar. (line 28) +* symbol index: ranlib. (line 6) +* symbol index, listing: nm. (line 216) +* symbol line numbers: nm. (line 184) +* symbol table entries, printing: objdump. (line 425) +* symbols: nm. (line 6) +* symbols, discarding: strip. (line 6) +* thin archives: ar. (line 40) +* undefined symbols: nm. (line 251) +* Unix compatibility, ar: ar cmdline. (line 8) +* unwind information: readelf. (line 106) +* Update ELF header: elfedit. (line 6) +* updating an archive: ar cmdline. (line 208) +* version: Top. (line 6) +* VMA in objdump: objdump. (line 73) +* wide output, printing: objdump. (line 531) +* writing archive index: ar cmdline. (line 190) + + + +Tag Table: +Node: Top2011 +Node: ar3724 +Node: ar cmdline6550 +Node: ar scripts16284 +Node: nm21972 +Node: objcopy31569 +Node: objdump61243 +Node: ranlib83257 +Node: size84078 +Node: strings87083 +Node: strip89541 +Node: c++filt95492 +Ref: c++filt-Footnote-1100339 +Node: addr2line100445 +Node: nlmconv104245 +Node: windmc106851 +Node: windres110500 +Node: dlltool116861 +Node: def file format129747 +Node: readelf131678 +Node: elfedit139228 +Node: Common Options141473 +Node: Selecting the Target System142513 +Node: Target Selection143445 +Node: Architecture Selection145427 +Node: Reporting Bugs146255 +Node: Bug Criteria147034 +Node: Bug Reporting147587 +Node: GNU Free Documentation License154457 +Node: Binutils Index179636 + +End Tag Table diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi index 45a7ff7..35ccb87 100644 --- a/binutils/doc/binutils.texi +++ b/binutils/doc/binutils.texi @@ -176,7 +176,7 @@ in the section entitled ``GNU Free Documentation License''. @c man title ar create, modify, and extract from archives @smallexample -ar [@option{--plugin} @var{name}] [-]@var{p}[@var{mod} [@var{relpos}] [@var{count}]] @var{archive} [@var{member}@dots{}] +ar [@option{--plugin} @var{name}] [-]@var{p}[@var{mod} [@var{relpos}] [@var{count}]] [@option{--target} @var{bfdname}] @var{archive} [@var{member}@dots{}] ar -M [ . +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "C++FILT 1" +.TH C++FILT 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +cxxfilt \- Demangle C++ and Java symbols. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +c++filt [\fB\-_\fR|\fB\-\-strip\-underscores\fR] + [\fB\-n\fR|\fB\-\-no\-strip\-underscores\fR] + [\fB\-p\fR|\fB\-\-no\-params\fR] + [\fB\-t\fR|\fB\-\-types\fR] + [\fB\-i\fR|\fB\-\-no\-verbose\fR] + [\fB\-s\fR \fIformat\fR|\fB\-\-format=\fR\fIformat\fR] + [\fB\-\-help\fR] [\fB\-\-version\fR] [\fIsymbol\fR...] +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +The \*(C+ and Java languages provide function overloading, which means +that you can write many functions with the same name, providing that +each function takes parameters of different types. In order to be +able to distinguish these similarly named functions \*(C+ and Java +encode them into a low-level assembler name which uniquely identifies +each different version. This process is known as \fImangling\fR. The +\&\fBc++filt\fR +[1] +program does the inverse mapping: it decodes (\fIdemangles\fR) low-level +names into user-level names so that they can be read. +.PP +Every alphanumeric word (consisting of letters, digits, underscores, +dollars, or periods) seen in the input is a potential mangled name. +If the name decodes into a \*(C+ name, the \*(C+ name replaces the +low-level name in the output, otherwise the original word is output. +In this way you can pass an entire assembler source file, containing +mangled names, through \fBc++filt\fR and see the same source file +containing demangled names. +.PP +You can also use \fBc++filt\fR to decipher individual symbols by +passing them on the command line: +.PP +.Vb 1 +\& c++filt +.Ve +.PP +If no \fIsymbol\fR arguments are given, \fBc++filt\fR reads symbol +names from the standard input instead. All the results are printed on +the standard output. The difference between reading names from the +command line versus reading names from the standard input is that +command line arguments are expected to be just mangled names and no +checking is performed to separate them from surrounding text. Thus +for example: +.PP +.Vb 1 +\& c++filt \-n _Z1fv +.Ve +.PP +will work and demangle the name to \*(L"f()\*(R" whereas: +.PP +.Vb 1 +\& c++filt \-n _Z1fv, +.Ve +.PP +will not work. (Note the extra comma at the end of the mangled +name which makes it invalid). This command however will work: +.PP +.Vb 1 +\& echo _Z1fv, | c++filt \-n +.Ve +.PP +and will display \*(L"f(),\*(R", i.e., the demangled name followed by a +trailing comma. This behaviour is because when the names are read +from the standard input it is expected that they might be part of an +assembler source file where there might be extra, extraneous +characters trailing after a mangled name. For example: +.PP +.Vb 1 +\& .type _Z1fv, @function +.Ve +.SH "OPTIONS" +.IX Header "OPTIONS" +.IP "\fB\-_\fR" 4 +.IX Item "-_" +.PD 0 +.IP "\fB\-\-strip\-underscores\fR" 4 +.IX Item "--strip-underscores" +.PD +On some systems, both the C and \*(C+ compilers put an underscore in front +of every name. For example, the C name \f(CW\*(C`foo\*(C'\fR gets the low-level +name \f(CW\*(C`_foo\*(C'\fR. This option removes the initial underscore. Whether +\&\fBc++filt\fR removes the underscore by default is target dependent. +.IP "\fB\-n\fR" 4 +.IX Item "-n" +.PD 0 +.IP "\fB\-\-no\-strip\-underscores\fR" 4 +.IX Item "--no-strip-underscores" +.PD +Do not remove the initial underscore. +.IP "\fB\-p\fR" 4 +.IX Item "-p" +.PD 0 +.IP "\fB\-\-no\-params\fR" 4 +.IX Item "--no-params" +.PD +When demangling the name of a function, do not display the types of +the function's parameters. +.IP "\fB\-t\fR" 4 +.IX Item "-t" +.PD 0 +.IP "\fB\-\-types\fR" 4 +.IX Item "--types" +.PD +Attempt to demangle types as well as function names. This is disabled +by default since mangled types are normally only used internally in +the compiler, and they can be confused with non-mangled names. For example, +a function called \*(L"a\*(R" treated as a mangled type name would be +demangled to \*(L"signed char\*(R". +.IP "\fB\-i\fR" 4 +.IX Item "-i" +.PD 0 +.IP "\fB\-\-no\-verbose\fR" 4 +.IX Item "--no-verbose" +.PD +Do not include implementation details (if any) in the demangled +output. +.IP "\fB\-s\fR \fIformat\fR" 4 +.IX Item "-s format" +.PD 0 +.IP "\fB\-\-format=\fR\fIformat\fR" 4 +.IX Item "--format=format" +.PD +\&\fBc++filt\fR can decode various methods of mangling, used by +different compilers. The argument to this option selects which +method it uses: +.RS 4 +.ie n .IP """auto""" 4 +.el .IP "\f(CWauto\fR" 4 +.IX Item "auto" +Automatic selection based on executable (the default method) +.ie n .IP """gnu""" 4 +.el .IP "\f(CWgnu\fR" 4 +.IX Item "gnu" +the one used by the \s-1GNU\s0 \*(C+ compiler (g++) +.ie n .IP """lucid""" 4 +.el .IP "\f(CWlucid\fR" 4 +.IX Item "lucid" +the one used by the Lucid compiler (lcc) +.ie n .IP """arm""" 4 +.el .IP "\f(CWarm\fR" 4 +.IX Item "arm" +the one specified by the \*(C+ Annotated Reference Manual +.ie n .IP """hp""" 4 +.el .IP "\f(CWhp\fR" 4 +.IX Item "hp" +the one used by the \s-1HP\s0 compiler (aCC) +.ie n .IP """edg""" 4 +.el .IP "\f(CWedg\fR" 4 +.IX Item "edg" +the one used by the \s-1EDG\s0 compiler +.ie n .IP """gnu\-v3""" 4 +.el .IP "\f(CWgnu\-v3\fR" 4 +.IX Item "gnu-v3" +the one used by the \s-1GNU\s0 \*(C+ compiler (g++) with the V3 \s-1ABI\s0. +.ie n .IP """java""" 4 +.el .IP "\f(CWjava\fR" 4 +.IX Item "java" +the one used by the \s-1GNU\s0 Java compiler (gcj) +.ie n .IP """gnat""" 4 +.el .IP "\f(CWgnat\fR" 4 +.IX Item "gnat" +the one used by the \s-1GNU\s0 Ada compiler (\s-1GNAT\s0). +.RE +.RS 4 +.RE +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +Print a summary of the options to \fBc++filt\fR and exit. +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +Print the version number of \fBc++filt\fR and exit. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "FOOTNOTES" +.IX Header "FOOTNOTES" +.IP "1." 4 +MS-DOS does not allow \f(CW\*(C`+\*(C'\fR characters in file names, so on +MS-DOS this program is named \fB\s-1CXXFILT\s0\fR. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/dlltool.1 b/binutils/doc/dlltool.1 new file mode 100644 index 0000000..f312a9f --- /dev/null +++ b/binutils/doc/dlltool.1 @@ -0,0 +1,531 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "DLLTOOL 1" +.TH DLLTOOL 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +dlltool \- Create files needed to build and use DLLs. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +dlltool [\fB\-d\fR|\fB\-\-input\-def\fR \fIdef-file-name\fR] + [\fB\-b\fR|\fB\-\-base\-file\fR \fIbase-file-name\fR] + [\fB\-e\fR|\fB\-\-output\-exp\fR \fIexports-file-name\fR] + [\fB\-z\fR|\fB\-\-output\-def\fR \fIdef-file-name\fR] + [\fB\-l\fR|\fB\-\-output\-lib\fR \fIlibrary-file-name\fR] + [\fB\-y\fR|\fB\-\-output\-delaylib\fR \fIlibrary-file-name\fR] + [\fB\-\-export\-all\-symbols\fR] [\fB\-\-no\-export\-all\-symbols\fR] + [\fB\-\-exclude\-symbols\fR \fIlist\fR] + [\fB\-\-no\-default\-excludes\fR] + [\fB\-S\fR|\fB\-\-as\fR \fIpath-to-assembler\fR] [\fB\-f\fR|\fB\-\-as\-flags\fR \fIoptions\fR] + [\fB\-D\fR|\fB\-\-dllname\fR \fIname\fR] [\fB\-m\fR|\fB\-\-machine\fR \fImachine\fR] + [\fB\-a\fR|\fB\-\-add\-indirect\fR] + [\fB\-U\fR|\fB\-\-add\-underscore\fR] [\fB\-\-add\-stdcall\-underscore\fR] + [\fB\-k\fR|\fB\-\-kill\-at\fR] [\fB\-A\fR|\fB\-\-add\-stdcall\-alias\fR] + [\fB\-p\fR|\fB\-\-ext\-prefix\-alias\fR \fIprefix\fR] + [\fB\-x\fR|\fB\-\-no\-idata4\fR] [\fB\-c\fR|\fB\-\-no\-idata5\fR] + [\fB\-\-use\-nul\-prefixed\-import\-tables\fR] + [\fB\-I\fR|\fB\-\-identify\fR \fIlibrary-file-name\fR] [\fB\-\-identify\-strict\fR] + [\fB\-i\fR|\fB\-\-interwork\fR] + [\fB\-n\fR|\fB\-\-nodelete\fR] [\fB\-t\fR|\fB\-\-temp\-prefix\fR \fIprefix\fR] + [\fB\-v\fR|\fB\-\-verbose\fR] + [\fB\-h\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR] + [\fB\-\-no\-leading\-underscore\fR] [\fB\-\-leading\-underscore\fR] + [object\-file ...] +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\fBdlltool\fR reads its inputs, which can come from the \fB\-d\fR and +\&\fB\-b\fR options as well as object files specified on the command +line. It then processes these inputs and if the \fB\-e\fR option has +been specified it creates a exports file. If the \fB\-l\fR option +has been specified it creates a library file and if the \fB\-z\fR option +has been specified it creates a def file. Any or all of the \fB\-e\fR, +\&\fB\-l\fR and \fB\-z\fR options can be present in one invocation of +dlltool. +.PP +When creating a \s-1DLL\s0, along with the source for the \s-1DLL\s0, it is necessary +to have three other files. \fBdlltool\fR can help with the creation of +these files. +.PP +The first file is a \fI.def\fR file which specifies which functions are +exported from the \s-1DLL\s0, which functions the \s-1DLL\s0 imports, and so on. This +is a text file and can be created by hand, or \fBdlltool\fR can be used +to create it using the \fB\-z\fR option. In this case \fBdlltool\fR +will scan the object files specified on its command line looking for +those functions which have been specially marked as being exported and +put entries for them in the \fI.def\fR file it creates. +.PP +In order to mark a function as being exported from a \s-1DLL\s0, it needs to +have an \fB\-export:\fR entry in the \fB.drectve\fR +section of the object file. This can be done in C by using the +\&\fIasm()\fR operator: +.PP +.Vb 2 +\& asm (".section .drectve"); +\& asm (".ascii \e"\-export:my_func\e""); +\& +\& int my_func (void) { ... } +.Ve +.PP +The second file needed for \s-1DLL\s0 creation is an exports file. This file +is linked with the object files that make up the body of the \s-1DLL\s0 and it +handles the interface between the \s-1DLL\s0 and the outside world. This is a +binary file and it can be created by giving the \fB\-e\fR option to +\&\fBdlltool\fR when it is creating or reading in a \fI.def\fR file. +.PP +The third file needed for \s-1DLL\s0 creation is the library file that programs +will link with in order to access the functions in the \s-1DLL\s0 (an `import +library'). This file can be created by giving the \fB\-l\fR option to +dlltool when it is creating or reading in a \fI.def\fR file. +.PP +If the \fB\-y\fR option is specified, dlltool generates a delay-import +library that can be used instead of the normal import library to allow +a program to link to the dll only as soon as an imported function is +called for the first time. The resulting executable will need to be +linked to the static delayimp library containing _\|\fI_delayLoadHelper2()\fR, +which in turn will import LoadLibraryA and GetProcAddress from kernel32. +.PP +\&\fBdlltool\fR builds the library file by hand, but it builds the +exports file by creating temporary files containing assembler statements +and then assembling these. The \fB\-S\fR command line option can be +used to specify the path to the assembler that dlltool will use, +and the \fB\-f\fR option can be used to pass specific flags to that +assembler. The \fB\-n\fR can be used to prevent dlltool from deleting +these temporary assembler files when it is done, and if \fB\-n\fR is +specified twice then this will prevent dlltool from deleting the +temporary object files it used to build the library. +.PP +Here is an example of creating a \s-1DLL\s0 from a source file \fBdll.c\fR and +also creating a program (from an object file called \fBprogram.o\fR) +that uses that \s-1DLL:\s0 +.PP +.Vb 4 +\& gcc \-c dll.c +\& dlltool \-e exports.o \-l dll.lib dll.o +\& gcc dll.o exports.o \-o dll.dll +\& gcc program.o dll.lib \-o program +.Ve +.PP +\&\fBdlltool\fR may also be used to query an existing import library +to determine the name of the \s-1DLL\s0 to which it is associated. See the +description of the \fB\-I\fR or \fB\-\-identify\fR option. +.SH "OPTIONS" +.IX Header "OPTIONS" +The command line options have the following meanings: +.IP "\fB\-d\fR \fIfilename\fR" 4 +.IX Item "-d filename" +.PD 0 +.IP "\fB\-\-input\-def\fR \fIfilename\fR" 4 +.IX Item "--input-def filename" +.PD +Specifies the name of a \fI.def\fR file to be read in and processed. +.IP "\fB\-b\fR \fIfilename\fR" 4 +.IX Item "-b filename" +.PD 0 +.IP "\fB\-\-base\-file\fR \fIfilename\fR" 4 +.IX Item "--base-file filename" +.PD +Specifies the name of a base file to be read in and processed. The +contents of this file will be added to the relocation section in the +exports file generated by dlltool. +.IP "\fB\-e\fR \fIfilename\fR" 4 +.IX Item "-e filename" +.PD 0 +.IP "\fB\-\-output\-exp\fR \fIfilename\fR" 4 +.IX Item "--output-exp filename" +.PD +Specifies the name of the export file to be created by dlltool. +.IP "\fB\-z\fR \fIfilename\fR" 4 +.IX Item "-z filename" +.PD 0 +.IP "\fB\-\-output\-def\fR \fIfilename\fR" 4 +.IX Item "--output-def filename" +.PD +Specifies the name of the \fI.def\fR file to be created by dlltool. +.IP "\fB\-l\fR \fIfilename\fR" 4 +.IX Item "-l filename" +.PD 0 +.IP "\fB\-\-output\-lib\fR \fIfilename\fR" 4 +.IX Item "--output-lib filename" +.PD +Specifies the name of the library file to be created by dlltool. +.IP "\fB\-y\fR \fIfilename\fR" 4 +.IX Item "-y filename" +.PD 0 +.IP "\fB\-\-output\-delaylib\fR \fIfilename\fR" 4 +.IX Item "--output-delaylib filename" +.PD +Specifies the name of the delay-import library file to be created by dlltool. +.IP "\fB\-\-export\-all\-symbols\fR" 4 +.IX Item "--export-all-symbols" +Treat all global and weak defined symbols found in the input object +files as symbols to be exported. There is a small list of symbols which +are not exported by default; see the \fB\-\-no\-default\-excludes\fR +option. You may add to the list of symbols to not export by using the +\&\fB\-\-exclude\-symbols\fR option. +.IP "\fB\-\-no\-export\-all\-symbols\fR" 4 +.IX Item "--no-export-all-symbols" +Only export symbols explicitly listed in an input \fI.def\fR file or in +\&\fB.drectve\fR sections in the input object files. This is the default +behaviour. The \fB.drectve\fR sections are created by \fBdllexport\fR +attributes in the source code. +.IP "\fB\-\-exclude\-symbols\fR \fIlist\fR" 4 +.IX Item "--exclude-symbols list" +Do not export the symbols in \fIlist\fR. This is a list of symbol names +separated by comma or colon characters. The symbol names should not +contain a leading underscore. This is only meaningful when +\&\fB\-\-export\-all\-symbols\fR is used. +.IP "\fB\-\-no\-default\-excludes\fR" 4 +.IX Item "--no-default-excludes" +When \fB\-\-export\-all\-symbols\fR is used, it will by default avoid +exporting certain special symbols. The current list of symbols to avoid +exporting is \fBDllMain@12\fR, \fBDllEntryPoint@0\fR, +\&\fBimpure_ptr\fR. You may use the \fB\-\-no\-default\-excludes\fR option +to go ahead and export these special symbols. This is only meaningful +when \fB\-\-export\-all\-symbols\fR is used. +.IP "\fB\-S\fR \fIpath\fR" 4 +.IX Item "-S path" +.PD 0 +.IP "\fB\-\-as\fR \fIpath\fR" 4 +.IX Item "--as path" +.PD +Specifies the path, including the filename, of the assembler to be used +to create the exports file. +.IP "\fB\-f\fR \fIoptions\fR" 4 +.IX Item "-f options" +.PD 0 +.IP "\fB\-\-as\-flags\fR \fIoptions\fR" 4 +.IX Item "--as-flags options" +.PD +Specifies any specific command line options to be passed to the +assembler when building the exports file. This option will work even if +the \fB\-S\fR option is not used. This option only takes one argument, +and if it occurs more than once on the command line, then later +occurrences will override earlier occurrences. So if it is necessary to +pass multiple options to the assembler they should be enclosed in +double quotes. +.IP "\fB\-D\fR \fIname\fR" 4 +.IX Item "-D name" +.PD 0 +.IP "\fB\-\-dll\-name\fR \fIname\fR" 4 +.IX Item "--dll-name name" +.PD +Specifies the name to be stored in the \fI.def\fR file as the name of +the \s-1DLL\s0 when the \fB\-e\fR option is used. If this option is not +present, then the filename given to the \fB\-e\fR option will be +used as the name of the \s-1DLL\s0. +.IP "\fB\-m\fR \fImachine\fR" 4 +.IX Item "-m machine" +.PD 0 +.IP "\fB\-machine\fR \fImachine\fR" 4 +.IX Item "-machine machine" +.PD +Specifies the type of machine for which the library file should be +built. \fBdlltool\fR has a built in default type, depending upon how +it was created, but this option can be used to override that. This is +normally only useful when creating DLLs for an \s-1ARM\s0 processor, when the +contents of the \s-1DLL\s0 are actually encode using Thumb instructions. +.IP "\fB\-a\fR" 4 +.IX Item "-a" +.PD 0 +.IP "\fB\-\-add\-indirect\fR" 4 +.IX Item "--add-indirect" +.PD +Specifies that when \fBdlltool\fR is creating the exports file it +should add a section which allows the exported functions to be +referenced without using the import library. Whatever the hell that +means! +.IP "\fB\-U\fR" 4 +.IX Item "-U" +.PD 0 +.IP "\fB\-\-add\-underscore\fR" 4 +.IX Item "--add-underscore" +.PD +Specifies that when \fBdlltool\fR is creating the exports file it +should prepend an underscore to the names of \fIall\fR exported symbols. +.IP "\fB\-\-no\-leading\-underscore\fR" 4 +.IX Item "--no-leading-underscore" +.PD 0 +.IP "\fB\-\-leading\-underscore\fR" 4 +.IX Item "--leading-underscore" +.PD +Specifies whether standard symbol should be forced to be prefixed, or +not. +.IP "\fB\-\-add\-stdcall\-underscore\fR" 4 +.IX Item "--add-stdcall-underscore" +Specifies that when \fBdlltool\fR is creating the exports file it +should prepend an underscore to the names of exported \fIstdcall\fR +functions. Variable names and non-stdcall function names are not modified. +This option is useful when creating GNU-compatible import libs for third +party DLLs that were built with MS-Windows tools. +.IP "\fB\-k\fR" 4 +.IX Item "-k" +.PD 0 +.IP "\fB\-\-kill\-at\fR" 4 +.IX Item "--kill-at" +.PD +Specifies that when \fBdlltool\fR is creating the exports file it +should not append the string \fB@ \fR. These numbers are +called ordinal numbers and they represent another way of accessing the +function in a \s-1DLL\s0, other than by name. +.IP "\fB\-A\fR" 4 +.IX Item "-A" +.PD 0 +.IP "\fB\-\-add\-stdcall\-alias\fR" 4 +.IX Item "--add-stdcall-alias" +.PD +Specifies that when \fBdlltool\fR is creating the exports file it +should add aliases for stdcall symbols without \fB@ \fR +in addition to the symbols with \fB@ \fR. +.IP "\fB\-p\fR" 4 +.IX Item "-p" +.PD 0 +.IP "\fB\-\-ext\-prefix\-alias\fR \fIprefix\fR" 4 +.IX Item "--ext-prefix-alias prefix" +.PD +Causes \fBdlltool\fR to create external aliases for all \s-1DLL\s0 +imports with the specified prefix. The aliases are created for both +external and import symbols with no leading underscore. +.IP "\fB\-x\fR" 4 +.IX Item "-x" +.PD 0 +.IP "\fB\-\-no\-idata4\fR" 4 +.IX Item "--no-idata4" +.PD +Specifies that when \fBdlltool\fR is creating the exports and library +files it should omit the \f(CW\*(C`.idata4\*(C'\fR section. This is for compatibility +with certain operating systems. +.IP "\fB\-\-use\-nul\-prefixed\-import\-tables\fR" 4 +.IX Item "--use-nul-prefixed-import-tables" +Specifies that when \fBdlltool\fR is creating the exports and library +files it should prefix the \f(CW\*(C`.idata4\*(C'\fR and \f(CW\*(C`.idata5\*(C'\fR by zero an +element. This emulates old gnu import library generation of +\&\f(CW\*(C`dlltool\*(C'\fR. By default this option is turned off. +.IP "\fB\-c\fR" 4 +.IX Item "-c" +.PD 0 +.IP "\fB\-\-no\-idata5\fR" 4 +.IX Item "--no-idata5" +.PD +Specifies that when \fBdlltool\fR is creating the exports and library +files it should omit the \f(CW\*(C`.idata5\*(C'\fR section. This is for compatibility +with certain operating systems. +.IP "\fB\-I\fR \fIfilename\fR" 4 +.IX Item "-I filename" +.PD 0 +.IP "\fB\-\-identify\fR \fIfilename\fR" 4 +.IX Item "--identify filename" +.PD +Specifies that \fBdlltool\fR should inspect the import library +indicated by \fIfilename\fR and report, on \f(CW\*(C`stdout\*(C'\fR, the name(s) +of the associated \s-1DLL\s0(s). This can be performed in addition to any +other operations indicated by the other options and arguments. +\&\fBdlltool\fR fails if the import library does not exist or is not +actually an import library. See also \fB\-\-identify\-strict\fR. +.IP "\fB\-\-identify\-strict\fR" 4 +.IX Item "--identify-strict" +Modifies the behavior of the \fB\-\-identify\fR option, such +that an error is reported if \fIfilename\fR is associated with +more than one \s-1DLL\s0. +.IP "\fB\-i\fR" 4 +.IX Item "-i" +.PD 0 +.IP "\fB\-\-interwork\fR" 4 +.IX Item "--interwork" +.PD +Specifies that \fBdlltool\fR should mark the objects in the library +file and exports file that it produces as supporting interworking +between \s-1ARM\s0 and Thumb code. +.IP "\fB\-n\fR" 4 +.IX Item "-n" +.PD 0 +.IP "\fB\-\-nodelete\fR" 4 +.IX Item "--nodelete" +.PD +Makes \fBdlltool\fR preserve the temporary assembler files it used to +create the exports file. If this option is repeated then dlltool will +also preserve the temporary object files it uses to create the library +file. +.IP "\fB\-t\fR \fIprefix\fR" 4 +.IX Item "-t prefix" +.PD 0 +.IP "\fB\-\-temp\-prefix\fR \fIprefix\fR" 4 +.IX Item "--temp-prefix prefix" +.PD +Makes \fBdlltool\fR use \fIprefix\fR when constructing the names of +temporary assembler and object files. By default, the temp file prefix +is generated from the pid. +.IP "\fB\-v\fR" 4 +.IX Item "-v" +.PD 0 +.IP "\fB\-\-verbose\fR" 4 +.IX Item "--verbose" +.PD +Make dlltool describe what it is doing. +.IP "\fB\-h\fR" 4 +.IX Item "-h" +.PD 0 +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +.PD +Displays a list of command line options and then exits. +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Displays dlltool's version number and then exits. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +The Info pages for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/elfedit.1 b/binutils/doc/elfedit.1 new file mode 100644 index 0000000..1544944 --- /dev/null +++ b/binutils/doc/elfedit.1 @@ -0,0 +1,235 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "ELFEDIT 1" +.TH ELFEDIT 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +elfedit \- Update the ELF header of ELF files. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +elfedit [\fB\-\-input\-mach=\fR\fImachine\fR] + [\fB\-\-input\-type=\fR\fItype\fR] + [\fB\-\-input\-osabi=\fR\fIosabi\fR] + \fB\-\-output\-mach=\fR\fImachine\fR + \fB\-\-output\-type=\fR\fItype\fR + \fB\-\-output\-osabi=\fR\fIosabi\fR + [\fB\-v\fR|\fB\-\-version\fR] + [\fB\-h\fR|\fB\-\-help\fR] + \fIelffile\fR... +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\fBelfedit\fR updates the \s-1ELF\s0 header of \s-1ELF\s0 files which have +the matching \s-1ELF\s0 machine and file types. The options control how and +which fields in the \s-1ELF\s0 header should be updated. +.PP +\&\fIelffile\fR... are the \s-1ELF\s0 files to be updated. 32\-bit and +64\-bit \s-1ELF\s0 files are supported, as are archives containing \s-1ELF\s0 files. +.SH "OPTIONS" +.IX Header "OPTIONS" +The long and short forms of options, shown here as alternatives, are +equivalent. At least one of the \fB\-\-output\-mach\fR, +\&\fB\-\-output\-type\fR and \fB\-\-output\-osabi\fR options must be given. +.IP "\fB\-\-input\-mach=\fR\fImachine\fR" 4 +.IX Item "--input-mach=machine" +Set the matching input \s-1ELF\s0 machine type to \fImachine\fR. If +\&\fB\-\-input\-mach\fR isn't specified, it will match any \s-1ELF\s0 +machine types. +.Sp +The supported \s-1ELF\s0 machine types are, \fIL1OM\fR, \fIK1OM\fR and +\&\fIx86\-64\fR. +.IP "\fB\-\-output\-mach=\fR\fImachine\fR" 4 +.IX Item "--output-mach=machine" +Change the \s-1ELF\s0 machine type in the \s-1ELF\s0 header to \fImachine\fR. The +supported \s-1ELF\s0 machine types are the same as \fB\-\-input\-mach\fR. +.IP "\fB\-\-input\-type=\fR\fItype\fR" 4 +.IX Item "--input-type=type" +Set the matching input \s-1ELF\s0 file type to \fItype\fR. If +\&\fB\-\-input\-type\fR isn't specified, it will match any \s-1ELF\s0 file types. +.Sp +The supported \s-1ELF\s0 file types are, \fIrel\fR, \fIexec\fR and \fIdyn\fR. +.IP "\fB\-\-output\-type=\fR\fItype\fR" 4 +.IX Item "--output-type=type" +Change the \s-1ELF\s0 file type in the \s-1ELF\s0 header to \fItype\fR. The +supported \s-1ELF\s0 types are the same as \fB\-\-input\-type\fR. +.IP "\fB\-\-input\-osabi=\fR\fIosabi\fR" 4 +.IX Item "--input-osabi=osabi" +Set the matching input \s-1ELF\s0 file \s-1OSABI\s0 to \fIosabi\fR. If +\&\fB\-\-input\-osabi\fR isn't specified, it will match any \s-1ELF\s0 OSABIs. +.Sp +The supported \s-1ELF\s0 OSABIs are, \fInone\fR, \fI\s-1HPUX\s0\fR, \fINetBSD\fR, +\&\fI\s-1GNU\s0\fR, \fILinux\fR (alias for \fI\s-1GNU\s0\fR), +\&\fISolaris\fR, \fI\s-1AIX\s0\fR, \fIIrix\fR, +\&\fIFreeBSD\fR, \fI\s-1TRU64\s0\fR, \fIModesto\fR, \fIOpenBSD\fR, \fIOpenVMS\fR, +\&\fI\s-1NSK\s0\fR, \fI\s-1AROS\s0\fR and \fIFenixOS\fR. +.IP "\fB\-\-output\-osabi=\fR\fIosabi\fR" 4 +.IX Item "--output-osabi=osabi" +Change the \s-1ELF\s0 \s-1OSABI\s0 in the \s-1ELF\s0 header to \fIosabi\fR. The +supported \s-1ELF\s0 \s-1OSABI\s0 are the same as \fB\-\-input\-osabi\fR. +.IP "\fB\-v\fR" 4 +.IX Item "-v" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Display the version number of \fBelfedit\fR. +.IP "\fB\-h\fR" 4 +.IX Item "-h" +.PD 0 +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +.PD +Display the command line options understood by \fBelfedit\fR. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/nlmconv.1 b/binutils/doc/nlmconv.1 new file mode 100644 index 0000000..16e3062 --- /dev/null +++ b/binutils/doc/nlmconv.1 @@ -0,0 +1,244 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "NLMCONV 1" +.TH NLMCONV 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +nlmconv \- converts object code into an NLM. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +nlmconv [\fB\-I\fR \fIbfdname\fR|\fB\-\-input\-target=\fR\fIbfdname\fR] + [\fB\-O\fR \fIbfdname\fR|\fB\-\-output\-target=\fR\fIbfdname\fR] + [\fB\-T\fR \fIheaderfile\fR|\fB\-\-header\-file=\fR\fIheaderfile\fR] + [\fB\-d\fR|\fB\-\-debug\fR] [\fB\-l\fR \fIlinker\fR|\fB\-\-linker=\fR\fIlinker\fR] + [\fB\-h\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR] + \fIinfile\fR \fIoutfile\fR +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\fBnlmconv\fR converts the relocatable \fBi386\fR object file +\&\fIinfile\fR into the NetWare Loadable Module \fIoutfile\fR, optionally +reading \fIheaderfile\fR for \s-1NLM\s0 header information. For instructions +on writing the \s-1NLM\s0 command file language used in header files, see the +\&\fBlinkers\fR section, \fB\s-1NLMLINK\s0\fR in particular, of the \fI\s-1NLM\s0 +Development and Tools Overview\fR, which is part of the \s-1NLM\s0 Software +Developer's Kit (\*(L"\s-1NLM\s0 \s-1SDK\s0\*(R"), available from Novell, Inc. +\&\fBnlmconv\fR uses the \s-1GNU\s0 Binary File Descriptor library to read +\&\fIinfile\fR; +.PP +\&\fBnlmconv\fR can perform a link step. In other words, you can list +more than one object file for input if you list them in the definitions +file (rather than simply specifying one input file on the command line). +In this case, \fBnlmconv\fR calls the linker for you. +.SH "OPTIONS" +.IX Header "OPTIONS" +.IP "\fB\-I\fR \fIbfdname\fR" 4 +.IX Item "-I bfdname" +.PD 0 +.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4 +.IX Item "--input-target=bfdname" +.PD +Object format of the input file. \fBnlmconv\fR can usually determine +the format of a given file (so no default is necessary). +.IP "\fB\-O\fR \fIbfdname\fR" 4 +.IX Item "-O bfdname" +.PD 0 +.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4 +.IX Item "--output-target=bfdname" +.PD +Object format of the output file. \fBnlmconv\fR infers the output +format based on the input format, e.g. for a \fBi386\fR input file the +output format is \fBnlm32\-i386\fR. +.IP "\fB\-T\fR \fIheaderfile\fR" 4 +.IX Item "-T headerfile" +.PD 0 +.IP "\fB\-\-header\-file=\fR\fIheaderfile\fR" 4 +.IX Item "--header-file=headerfile" +.PD +Reads \fIheaderfile\fR for \s-1NLM\s0 header information. For instructions on +writing the \s-1NLM\s0 command file language used in header files, see see the +\&\fBlinkers\fR section, of the \fI\s-1NLM\s0 Development and Tools +Overview\fR, which is part of the \s-1NLM\s0 Software Developer's Kit, available +from Novell, Inc. +.IP "\fB\-d\fR" 4 +.IX Item "-d" +.PD 0 +.IP "\fB\-\-debug\fR" 4 +.IX Item "--debug" +.PD +Displays (on standard error) the linker command line used by \fBnlmconv\fR. +.IP "\fB\-l\fR \fIlinker\fR" 4 +.IX Item "-l linker" +.PD 0 +.IP "\fB\-\-linker=\fR\fIlinker\fR" 4 +.IX Item "--linker=linker" +.PD +Use \fIlinker\fR for any linking. \fIlinker\fR can be an absolute or a +relative pathname. +.IP "\fB\-h\fR" 4 +.IX Item "-h" +.PD 0 +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +.PD +Prints a usage summary. +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Prints the version number for \fBnlmconv\fR. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/nm.1 b/binutils/doc/nm.1 new file mode 100644 index 0000000..e5941c7 --- /dev/null +++ b/binutils/doc/nm.1 @@ -0,0 +1,518 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "NM 1" +.TH NM 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +nm \- list symbols from object files +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +nm [\fB\-a\fR|\fB\-\-debug\-syms\fR] + [\fB\-g\fR|\fB\-\-extern\-only\fR][\fB\-\-plugin\fR \fIname\fR] + [\fB\-B\fR] [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR]] [\fB\-D\fR|\fB\-\-dynamic\fR] + [\fB\-S\fR|\fB\-\-print\-size\fR] [\fB\-s\fR|\fB\-\-print\-armap\fR] + [\fB\-A\fR|\fB\-o\fR|\fB\-\-print\-file\-name\fR][\fB\-\-special\-syms\fR] + [\fB\-n\fR|\fB\-v\fR|\fB\-\-numeric\-sort\fR] [\fB\-p\fR|\fB\-\-no\-sort\fR] + [\fB\-r\fR|\fB\-\-reverse\-sort\fR] [\fB\-\-size\-sort\fR] [\fB\-u\fR|\fB\-\-undefined\-only\fR] + [\fB\-t\fR \fIradix\fR|\fB\-\-radix=\fR\fIradix\fR] [\fB\-P\fR|\fB\-\-portability\fR] + [\fB\-\-target=\fR\fIbfdname\fR] [\fB\-f\fR\fIformat\fR|\fB\-\-format=\fR\fIformat\fR] + [\fB\-\-defined\-only\fR] [\fB\-l\fR|\fB\-\-line\-numbers\fR] [\fB\-\-no\-demangle\fR] + [\fB\-V\fR|\fB\-\-version\fR] [\fB\-X 32_64\fR] [\fB\-\-help\fR] [\fIobjfile\fR...] +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\s-1GNU\s0 \fBnm\fR lists the symbols from object files \fIobjfile\fR.... +If no object files are listed as arguments, \fBnm\fR assumes the file +\&\fIa.out\fR. +.PP +For each symbol, \fBnm\fR shows: +.IP "\(bu" 4 +The symbol value, in the radix selected by options (see below), or +hexadecimal by default. +.IP "\(bu" 4 +The symbol type. At least the following types are used; others are, as +well, depending on the object file format. If lowercase, the symbol is +usually local; if uppercase, the symbol is global (external). There +are however a few lowercase symbols that are shown for special global +symbols (\f(CW\*(C`u\*(C'\fR, \f(CW\*(C`v\*(C'\fR and \f(CW\*(C`w\*(C'\fR). +.RS 4 +.ie n .IP """A""" 4 +.el .IP "\f(CWA\fR" 4 +.IX Item "A" +The symbol's value is absolute, and will not be changed by further +linking. +.ie n .IP """B""" 4 +.el .IP "\f(CWB\fR" 4 +.IX Item "B" +.PD 0 +.ie n .IP """b""" 4 +.el .IP "\f(CWb\fR" 4 +.IX Item "b" +.PD +The symbol is in the uninitialized data section (known as \s-1BSS\s0). +.ie n .IP """C""" 4 +.el .IP "\f(CWC\fR" 4 +.IX Item "C" +The symbol is common. Common symbols are uninitialized data. When +linking, multiple common symbols may appear with the same name. If the +symbol is defined anywhere, the common symbols are treated as undefined +references. +.ie n .IP """D""" 4 +.el .IP "\f(CWD\fR" 4 +.IX Item "D" +.PD 0 +.ie n .IP """d""" 4 +.el .IP "\f(CWd\fR" 4 +.IX Item "d" +.PD +The symbol is in the initialized data section. +.ie n .IP """G""" 4 +.el .IP "\f(CWG\fR" 4 +.IX Item "G" +.PD 0 +.ie n .IP """g""" 4 +.el .IP "\f(CWg\fR" 4 +.IX Item "g" +.PD +The symbol is in an initialized data section for small objects. Some +object file formats permit more efficient access to small data objects, +such as a global int variable as opposed to a large global array. +.ie n .IP """i""" 4 +.el .IP "\f(CWi\fR" 4 +.IX Item "i" +For \s-1PE\s0 format files this indicates that the symbol is in a section +specific to the implementation of DLLs. For \s-1ELF\s0 format files this +indicates that the symbol is an indirect function. This is a \s-1GNU\s0 +extension to the standard set of \s-1ELF\s0 symbol types. It indicates a +symbol which if referenced by a relocation does not evaluate to its +address, but instead must be invoked at runtime. The runtime +execution will then return the value to be used in the relocation. +.ie n .IP """N""" 4 +.el .IP "\f(CWN\fR" 4 +.IX Item "N" +The symbol is a debugging symbol. +.ie n .IP """p""" 4 +.el .IP "\f(CWp\fR" 4 +.IX Item "p" +The symbols is in a stack unwind section. +.ie n .IP """R""" 4 +.el .IP "\f(CWR\fR" 4 +.IX Item "R" +.PD 0 +.ie n .IP """r""" 4 +.el .IP "\f(CWr\fR" 4 +.IX Item "r" +.PD +The symbol is in a read only data section. +.ie n .IP """S""" 4 +.el .IP "\f(CWS\fR" 4 +.IX Item "S" +.PD 0 +.ie n .IP """s""" 4 +.el .IP "\f(CWs\fR" 4 +.IX Item "s" +.PD +The symbol is in an uninitialized data section for small objects. +.ie n .IP """T""" 4 +.el .IP "\f(CWT\fR" 4 +.IX Item "T" +.PD 0 +.ie n .IP """t""" 4 +.el .IP "\f(CWt\fR" 4 +.IX Item "t" +.PD +The symbol is in the text (code) section. +.ie n .IP """U""" 4 +.el .IP "\f(CWU\fR" 4 +.IX Item "U" +The symbol is undefined. +.ie n .IP """u""" 4 +.el .IP "\f(CWu\fR" 4 +.IX Item "u" +The symbol is a unique global symbol. This is a \s-1GNU\s0 extension to the +standard set of \s-1ELF\s0 symbol bindings. For such a symbol the dynamic linker +will make sure that in the entire process there is just one symbol with +this name and type in use. +.ie n .IP """V""" 4 +.el .IP "\f(CWV\fR" 4 +.IX Item "V" +.PD 0 +.ie n .IP """v""" 4 +.el .IP "\f(CWv\fR" 4 +.IX Item "v" +.PD +The symbol is a weak object. When a weak defined symbol is linked with +a normal defined symbol, the normal defined symbol is used with no error. +When a weak undefined symbol is linked and the symbol is not defined, +the value of the weak symbol becomes zero with no error. On some +systems, uppercase indicates that a default value has been specified. +.ie n .IP """W""" 4 +.el .IP "\f(CWW\fR" 4 +.IX Item "W" +.PD 0 +.ie n .IP """w""" 4 +.el .IP "\f(CWw\fR" 4 +.IX Item "w" +.PD +The symbol is a weak symbol that has not been specifically tagged as a +weak object symbol. When a weak defined symbol is linked with a normal +defined symbol, the normal defined symbol is used with no error. +When a weak undefined symbol is linked and the symbol is not defined, +the value of the symbol is determined in a system-specific manner without +error. On some systems, uppercase indicates that a default value has been +specified. +.ie n .IP """\-""" 4 +.el .IP "\f(CW\-\fR" 4 +.IX Item "-" +The symbol is a stabs symbol in an a.out object file. In this case, the +next values printed are the stabs other field, the stabs desc field, and +the stab type. Stabs symbols are used to hold debugging information. +.ie n .IP """?""" 4 +.el .IP "\f(CW?\fR" 4 +.IX Item "?" +The symbol type is unknown, or object file format specific. +.RE +.RS 4 +.RE +.IP "\(bu" 4 +The symbol name. +.SH "OPTIONS" +.IX Header "OPTIONS" +The long and short forms of options, shown here as alternatives, are +equivalent. +.IP "\fB\-A\fR" 4 +.IX Item "-A" +.PD 0 +.IP "\fB\-o\fR" 4 +.IX Item "-o" +.IP "\fB\-\-print\-file\-name\fR" 4 +.IX Item "--print-file-name" +.PD +Precede each symbol by the name of the input file (or archive member) +in which it was found, rather than identifying the input file once only, +before all of its symbols. +.IP "\fB\-a\fR" 4 +.IX Item "-a" +.PD 0 +.IP "\fB\-\-debug\-syms\fR" 4 +.IX Item "--debug-syms" +.PD +Display all symbols, even debugger-only symbols; normally these are not +listed. +.IP "\fB\-B\fR" 4 +.IX Item "-B" +The same as \fB\-\-format=bsd\fR (for compatibility with the \s-1MIPS\s0 \fBnm\fR). +.IP "\fB\-C\fR" 4 +.IX Item "-C" +.PD 0 +.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4 +.IX Item "--demangle[=style]" +.PD +Decode (\fIdemangle\fR) low-level symbol names into user-level names. +Besides removing any initial underscore prepended by the system, this +makes \*(C+ function names readable. Different compilers have different +mangling styles. The optional demangling style argument can be used to +choose an appropriate demangling style for your compiler. +.IP "\fB\-\-no\-demangle\fR" 4 +.IX Item "--no-demangle" +Do not demangle low-level symbol names. This is the default. +.IP "\fB\-D\fR" 4 +.IX Item "-D" +.PD 0 +.IP "\fB\-\-dynamic\fR" 4 +.IX Item "--dynamic" +.PD +Display the dynamic symbols rather than the normal symbols. This is +only meaningful for dynamic objects, such as certain types of shared +libraries. +.IP "\fB\-f\fR \fIformat\fR" 4 +.IX Item "-f format" +.PD 0 +.IP "\fB\-\-format=\fR\fIformat\fR" 4 +.IX Item "--format=format" +.PD +Use the output format \fIformat\fR, which can be \f(CW\*(C`bsd\*(C'\fR, +\&\f(CW\*(C`sysv\*(C'\fR, or \f(CW\*(C`posix\*(C'\fR. The default is \f(CW\*(C`bsd\*(C'\fR. +Only the first character of \fIformat\fR is significant; it can be +either upper or lower case. +.IP "\fB\-g\fR" 4 +.IX Item "-g" +.PD 0 +.IP "\fB\-\-extern\-only\fR" 4 +.IX Item "--extern-only" +.PD +Display only external symbols. +.IP "\fB\-\-plugin\fR \fIname\fR" 4 +.IX Item "--plugin name" +Load the plugin called \fIname\fR to add support for extra target +types. This option is only available if the toolchain has been built +with plugin support enabled. +.IP "\fB\-l\fR" 4 +.IX Item "-l" +.PD 0 +.IP "\fB\-\-line\-numbers\fR" 4 +.IX Item "--line-numbers" +.PD +For each symbol, use debugging information to try to find a filename and +line number. For a defined symbol, look for the line number of the +address of the symbol. For an undefined symbol, look for the line +number of a relocation entry which refers to the symbol. If line number +information can be found, print it after the other symbol information. +.IP "\fB\-n\fR" 4 +.IX Item "-n" +.PD 0 +.IP "\fB\-v\fR" 4 +.IX Item "-v" +.IP "\fB\-\-numeric\-sort\fR" 4 +.IX Item "--numeric-sort" +.PD +Sort symbols numerically by their addresses, rather than alphabetically +by their names. +.IP "\fB\-p\fR" 4 +.IX Item "-p" +.PD 0 +.IP "\fB\-\-no\-sort\fR" 4 +.IX Item "--no-sort" +.PD +Do not bother to sort the symbols in any order; print them in the order +encountered. +.IP "\fB\-P\fR" 4 +.IX Item "-P" +.PD 0 +.IP "\fB\-\-portability\fR" 4 +.IX Item "--portability" +.PD +Use the \s-1POSIX\s0.2 standard output format instead of the default format. +Equivalent to \fB\-f posix\fR. +.IP "\fB\-S\fR" 4 +.IX Item "-S" +.PD 0 +.IP "\fB\-\-print\-size\fR" 4 +.IX Item "--print-size" +.PD +Print both value and size of defined symbols for the \f(CW\*(C`bsd\*(C'\fR output style. +This option has no effect for object formats that do not record symbol +sizes, unless \fB\-\-size\-sort\fR is also used in which case a +calculated size is displayed. +.IP "\fB\-s\fR" 4 +.IX Item "-s" +.PD 0 +.IP "\fB\-\-print\-armap\fR" 4 +.IX Item "--print-armap" +.PD +When listing symbols from archive members, include the index: a mapping +(stored in the archive by \fBar\fR or \fBranlib\fR) of which modules +contain definitions for which names. +.IP "\fB\-r\fR" 4 +.IX Item "-r" +.PD 0 +.IP "\fB\-\-reverse\-sort\fR" 4 +.IX Item "--reverse-sort" +.PD +Reverse the order of the sort (whether numeric or alphabetic); let the +last come first. +.IP "\fB\-\-size\-sort\fR" 4 +.IX Item "--size-sort" +Sort symbols by size. The size is computed as the difference between +the value of the symbol and the value of the symbol with the next higher +value. If the \f(CW\*(C`bsd\*(C'\fR output format is used the size of the symbol +is printed, rather than the value, and \fB\-S\fR must be used in order +both size and value to be printed. +.IP "\fB\-\-special\-syms\fR" 4 +.IX Item "--special-syms" +Display symbols which have a target-specific special meaning. These +symbols are usually used by the target for some special processing and +are not normally helpful when included included in the normal symbol +lists. For example for \s-1ARM\s0 targets this option would skip the mapping +symbols used to mark transitions between \s-1ARM\s0 code, \s-1THUMB\s0 code and +data. +.IP "\fB\-t\fR \fIradix\fR" 4 +.IX Item "-t radix" +.PD 0 +.IP "\fB\-\-radix=\fR\fIradix\fR" 4 +.IX Item "--radix=radix" +.PD +Use \fIradix\fR as the radix for printing the symbol values. It must be +\&\fBd\fR for decimal, \fBo\fR for octal, or \fBx\fR for hexadecimal. +.IP "\fB\-\-target=\fR\fIbfdname\fR" 4 +.IX Item "--target=bfdname" +Specify an object code format other than your system's default format. +.IP "\fB\-u\fR" 4 +.IX Item "-u" +.PD 0 +.IP "\fB\-\-undefined\-only\fR" 4 +.IX Item "--undefined-only" +.PD +Display only undefined symbols (those external to each object file). +.IP "\fB\-\-defined\-only\fR" 4 +.IX Item "--defined-only" +Display only defined symbols for each object file. +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Show the version number of \fBnm\fR and exit. +.IP "\fB\-X\fR" 4 +.IX Item "-X" +This option is ignored for compatibility with the \s-1AIX\s0 version of +\&\fBnm\fR. It takes one parameter which must be the string +\&\fB32_64\fR. The default mode of \s-1AIX\s0 \fBnm\fR corresponds +to \fB\-X 32\fR, which is not supported by \s-1GNU\s0 \fBnm\fR. +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +Show a summary of the options to \fBnm\fR and exit. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fIar\fR\|(1), \fIobjdump\fR\|(1), \fIranlib\fR\|(1), and the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/objcopy.1 b/binutils/doc/objcopy.1 new file mode 100644 index 0000000..979f85d --- /dev/null +++ b/binutils/doc/objcopy.1 @@ -0,0 +1,962 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "OBJCOPY 1" +.TH OBJCOPY 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +objcopy \- copy and translate object files +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +objcopy [\fB\-F\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR] + [\fB\-I\fR \fIbfdname\fR|\fB\-\-input\-target=\fR\fIbfdname\fR] + [\fB\-O\fR \fIbfdname\fR|\fB\-\-output\-target=\fR\fIbfdname\fR] + [\fB\-B\fR \fIbfdarch\fR|\fB\-\-binary\-architecture=\fR\fIbfdarch\fR] + [\fB\-S\fR|\fB\-\-strip\-all\fR] + [\fB\-g\fR|\fB\-\-strip\-debug\fR] + [\fB\-K\fR \fIsymbolname\fR|\fB\-\-keep\-symbol=\fR\fIsymbolname\fR] + [\fB\-N\fR \fIsymbolname\fR|\fB\-\-strip\-symbol=\fR\fIsymbolname\fR] + [\fB\-\-strip\-unneeded\-symbol=\fR\fIsymbolname\fR] + [\fB\-G\fR \fIsymbolname\fR|\fB\-\-keep\-global\-symbol=\fR\fIsymbolname\fR] + [\fB\-\-localize\-hidden\fR] + [\fB\-L\fR \fIsymbolname\fR|\fB\-\-localize\-symbol=\fR\fIsymbolname\fR] + [\fB\-\-globalize\-symbol=\fR\fIsymbolname\fR] + [\fB\-W\fR \fIsymbolname\fR|\fB\-\-weaken\-symbol=\fR\fIsymbolname\fR] + [\fB\-w\fR|\fB\-\-wildcard\fR] + [\fB\-x\fR|\fB\-\-discard\-all\fR] + [\fB\-X\fR|\fB\-\-discard\-locals\fR] + [\fB\-b\fR \fIbyte\fR|\fB\-\-byte=\fR\fIbyte\fR] + [\fB\-i\fR [\fIbreadth\fR]|\fB\-\-interleave\fR[=\fIbreadth\fR]] + [\fB\-\-interleave\-width=\fR\fIwidth\fR] + [\fB\-j\fR \fIsectionname\fR|\fB\-\-only\-section=\fR\fIsectionname\fR] + [\fB\-R\fR \fIsectionname\fR|\fB\-\-remove\-section=\fR\fIsectionname\fR] + [\fB\-p\fR|\fB\-\-preserve\-dates\fR] + [\fB\-\-debugging\fR] + [\fB\-\-gap\-fill=\fR\fIval\fR] + [\fB\-\-pad\-to=\fR\fIaddress\fR] + [\fB\-\-set\-start=\fR\fIval\fR] + [\fB\-\-adjust\-start=\fR\fIincr\fR] + [\fB\-\-change\-addresses=\fR\fIincr\fR] + [\fB\-\-change\-section\-address\fR \fIsection\fR{=,+,\-}\fIval\fR] + [\fB\-\-change\-section\-lma\fR \fIsection\fR{=,+,\-}\fIval\fR] + [\fB\-\-change\-section\-vma\fR \fIsection\fR{=,+,\-}\fIval\fR] + [\fB\-\-change\-warnings\fR] [\fB\-\-no\-change\-warnings\fR] + [\fB\-\-set\-section\-flags\fR \fIsection\fR=\fIflags\fR] + [\fB\-\-add\-section\fR \fIsectionname\fR=\fIfilename\fR] + [\fB\-\-rename\-section\fR \fIoldname\fR=\fInewname\fR[,\fIflags\fR]] + [\fB\-\-long\-section\-names\fR {enable,disable,keep}] + [\fB\-\-change\-leading\-char\fR] [\fB\-\-remove\-leading\-char\fR] + [\fB\-\-reverse\-bytes=\fR\fInum\fR] + [\fB\-\-srec\-len=\fR\fIival\fR] [\fB\-\-srec\-forceS3\fR] + [\fB\-\-redefine\-sym\fR \fIold\fR=\fInew\fR] + [\fB\-\-redefine\-syms=\fR\fIfilename\fR] + [\fB\-\-weaken\fR] + [\fB\-\-keep\-symbols=\fR\fIfilename\fR] + [\fB\-\-strip\-symbols=\fR\fIfilename\fR] + [\fB\-\-strip\-unneeded\-symbols=\fR\fIfilename\fR] + [\fB\-\-keep\-global\-symbols=\fR\fIfilename\fR] + [\fB\-\-localize\-symbols=\fR\fIfilename\fR] + [\fB\-\-globalize\-symbols=\fR\fIfilename\fR] + [\fB\-\-weaken\-symbols=\fR\fIfilename\fR] + [\fB\-\-alt\-machine\-code=\fR\fIindex\fR] + [\fB\-\-prefix\-symbols=\fR\fIstring\fR] + [\fB\-\-prefix\-sections=\fR\fIstring\fR] + [\fB\-\-prefix\-alloc\-sections=\fR\fIstring\fR] + [\fB\-\-add\-gnu\-debuglink=\fR\fIpath-to-file\fR] + [\fB\-\-keep\-file\-symbols\fR] + [\fB\-\-only\-keep\-debug\fR] + [\fB\-\-extract\-symbol\fR] + [\fB\-\-writable\-text\fR] + [\fB\-\-readonly\-text\fR] + [\fB\-\-pure\fR] + [\fB\-\-impure\fR] + [\fB\-\-file\-alignment=\fR\fInum\fR] + [\fB\-\-heap=\fR\fIsize\fR] + [\fB\-\-image\-base=\fR\fIaddress\fR] + [\fB\-\-section\-alignment=\fR\fInum\fR] + [\fB\-\-stack=\fR\fIsize\fR] + [\fB\-\-subsystem=\fR\fIwhich\fR:\fImajor\fR.\fIminor\fR] + [\fB\-\-compress\-debug\-sections\fR] + [\fB\-\-decompress\-debug\-sections\fR] + [\fB\-\-dwarf\-depth=\fR\fIn\fR] + [\fB\-\-dwarf\-start=\fR\fIn\fR] + [\fB\-v\fR|\fB\-\-verbose\fR] + [\fB\-V\fR|\fB\-\-version\fR] + [\fB\-\-help\fR] [\fB\-\-info\fR] + \fIinfile\fR [\fIoutfile\fR] +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +The \s-1GNU\s0 \fBobjcopy\fR utility copies the contents of an object +file to another. \fBobjcopy\fR uses the \s-1GNU\s0 \s-1BFD\s0 Library to +read and write the object files. It can write the destination object +file in a format different from that of the source object file. The +exact behavior of \fBobjcopy\fR is controlled by command-line options. +Note that \fBobjcopy\fR should be able to copy a fully linked file +between any two formats. However, copying a relocatable object file +between any two formats may not work as expected. +.PP +\&\fBobjcopy\fR creates temporary files to do its translations and +deletes them afterward. \fBobjcopy\fR uses \s-1BFD\s0 to do all its +translation work; it has access to all the formats described in \s-1BFD\s0 +and thus is able to recognize most formats without being told +explicitly. +.PP +\&\fBobjcopy\fR can be used to generate S\-records by using an output +target of \fBsrec\fR (e.g., use \fB\-O srec\fR). +.PP +\&\fBobjcopy\fR can be used to generate a raw binary file by using an +output target of \fBbinary\fR (e.g., use \fB\-O binary\fR). When +\&\fBobjcopy\fR generates a raw binary file, it will essentially produce +a memory dump of the contents of the input object file. All symbols and +relocation information will be discarded. The memory dump will start at +the load address of the lowest section copied into the output file. +.PP +When generating an S\-record or a raw binary file, it may be helpful to +use \fB\-S\fR to remove sections containing debugging information. In +some cases \fB\-R\fR will be useful to remove sections which contain +information that is not needed by the binary file. +.PP +Note\-\-\-\fBobjcopy\fR is not able to change the endianness of its input +files. If the input format has an endianness (some formats do not), +\&\fBobjcopy\fR can only copy the inputs into file formats that have the +same endianness or which have no endianness (e.g., \fBsrec\fR). +(However, see the \fB\-\-reverse\-bytes\fR option.) +.SH "OPTIONS" +.IX Header "OPTIONS" +.IP "\fIinfile\fR" 4 +.IX Item "infile" +.PD 0 +.IP "\fIoutfile\fR" 4 +.IX Item "outfile" +.PD +The input and output files, respectively. +If you do not specify \fIoutfile\fR, \fBobjcopy\fR creates a +temporary file and destructively renames the result with +the name of \fIinfile\fR. +.IP "\fB\-I\fR \fIbfdname\fR" 4 +.IX Item "-I bfdname" +.PD 0 +.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4 +.IX Item "--input-target=bfdname" +.PD +Consider the source file's object format to be \fIbfdname\fR, rather than +attempting to deduce it. +.IP "\fB\-O\fR \fIbfdname\fR" 4 +.IX Item "-O bfdname" +.PD 0 +.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4 +.IX Item "--output-target=bfdname" +.PD +Write the output file using the object format \fIbfdname\fR. +.IP "\fB\-F\fR \fIbfdname\fR" 4 +.IX Item "-F bfdname" +.PD 0 +.IP "\fB\-\-target=\fR\fIbfdname\fR" 4 +.IX Item "--target=bfdname" +.PD +Use \fIbfdname\fR as the object format for both the input and the output +file; i.e., simply transfer data from source to destination with no +translation. +.IP "\fB\-B\fR \fIbfdarch\fR" 4 +.IX Item "-B bfdarch" +.PD 0 +.IP "\fB\-\-binary\-architecture=\fR\fIbfdarch\fR" 4 +.IX Item "--binary-architecture=bfdarch" +.PD +Useful when transforming a architecture-less input file into an object file. +In this case the output architecture can be set to \fIbfdarch\fR. This +option will be ignored if the input file has a known \fIbfdarch\fR. You +can access this binary data inside a program by referencing the special +symbols that are created by the conversion process. These symbols are +called _binary_\fIobjfile\fR_start, _binary_\fIobjfile\fR_end and +_binary_\fIobjfile\fR_size. e.g. you can transform a picture file into +an object file and then access it in your code using these symbols. +.IP "\fB\-j\fR \fIsectionname\fR" 4 +.IX Item "-j sectionname" +.PD 0 +.IP "\fB\-\-only\-section=\fR\fIsectionname\fR" 4 +.IX Item "--only-section=sectionname" +.PD +Copy only the named section from the input file to the output file. +This option may be given more than once. Note that using this option +inappropriately may make the output file unusable. +.IP "\fB\-R\fR \fIsectionname\fR" 4 +.IX Item "-R sectionname" +.PD 0 +.IP "\fB\-\-remove\-section=\fR\fIsectionname\fR" 4 +.IX Item "--remove-section=sectionname" +.PD +Remove any section named \fIsectionname\fR from the output file. This +option may be given more than once. Note that using this option +inappropriately may make the output file unusable. +.IP "\fB\-S\fR" 4 +.IX Item "-S" +.PD 0 +.IP "\fB\-\-strip\-all\fR" 4 +.IX Item "--strip-all" +.PD +Do not copy relocation and symbol information from the source file. +.IP "\fB\-g\fR" 4 +.IX Item "-g" +.PD 0 +.IP "\fB\-\-strip\-debug\fR" 4 +.IX Item "--strip-debug" +.PD +Do not copy debugging symbols or sections from the source file. +.IP "\fB\-\-strip\-unneeded\fR" 4 +.IX Item "--strip-unneeded" +Strip all symbols that are not needed for relocation processing. +.IP "\fB\-K\fR \fIsymbolname\fR" 4 +.IX Item "-K symbolname" +.PD 0 +.IP "\fB\-\-keep\-symbol=\fR\fIsymbolname\fR" 4 +.IX Item "--keep-symbol=symbolname" +.PD +When stripping symbols, keep symbol \fIsymbolname\fR even if it would +normally be stripped. This option may be given more than once. +.IP "\fB\-N\fR \fIsymbolname\fR" 4 +.IX Item "-N symbolname" +.PD 0 +.IP "\fB\-\-strip\-symbol=\fR\fIsymbolname\fR" 4 +.IX Item "--strip-symbol=symbolname" +.PD +Do not copy symbol \fIsymbolname\fR from the source file. This option +may be given more than once. +.IP "\fB\-\-strip\-unneeded\-symbol=\fR\fIsymbolname\fR" 4 +.IX Item "--strip-unneeded-symbol=symbolname" +Do not copy symbol \fIsymbolname\fR from the source file unless it is needed +by a relocation. This option may be given more than once. +.IP "\fB\-G\fR \fIsymbolname\fR" 4 +.IX Item "-G symbolname" +.PD 0 +.IP "\fB\-\-keep\-global\-symbol=\fR\fIsymbolname\fR" 4 +.IX Item "--keep-global-symbol=symbolname" +.PD +Keep only symbol \fIsymbolname\fR global. Make all other symbols local +to the file, so that they are not visible externally. This option may +be given more than once. +.IP "\fB\-\-localize\-hidden\fR" 4 +.IX Item "--localize-hidden" +In an \s-1ELF\s0 object, mark all symbols that have hidden or internal visibility +as local. This option applies on top of symbol-specific localization options +such as \fB\-L\fR. +.IP "\fB\-L\fR \fIsymbolname\fR" 4 +.IX Item "-L symbolname" +.PD 0 +.IP "\fB\-\-localize\-symbol=\fR\fIsymbolname\fR" 4 +.IX Item "--localize-symbol=symbolname" +.PD +Make symbol \fIsymbolname\fR local to the file, so that it is not +visible externally. This option may be given more than once. +.IP "\fB\-W\fR \fIsymbolname\fR" 4 +.IX Item "-W symbolname" +.PD 0 +.IP "\fB\-\-weaken\-symbol=\fR\fIsymbolname\fR" 4 +.IX Item "--weaken-symbol=symbolname" +.PD +Make symbol \fIsymbolname\fR weak. This option may be given more than once. +.IP "\fB\-\-globalize\-symbol=\fR\fIsymbolname\fR" 4 +.IX Item "--globalize-symbol=symbolname" +Give symbol \fIsymbolname\fR global scoping so that it is visible +outside of the file in which it is defined. This option may be given +more than once. +.IP "\fB\-w\fR" 4 +.IX Item "-w" +.PD 0 +.IP "\fB\-\-wildcard\fR" 4 +.IX Item "--wildcard" +.PD +Permit regular expressions in \fIsymbolname\fRs used in other command +line options. The question mark (?), asterisk (*), backslash (\e) and +square brackets ([]) operators can be used anywhere in the symbol +name. If the first character of the symbol name is the exclamation +point (!) then the sense of the switch is reversed for that symbol. +For example: +.Sp +.Vb 1 +\& \-w \-W !foo \-W fo* +.Ve +.Sp +would cause objcopy to weaken all symbols that start with \*(L"fo\*(R" +except for the symbol \*(L"foo\*(R". +.IP "\fB\-x\fR" 4 +.IX Item "-x" +.PD 0 +.IP "\fB\-\-discard\-all\fR" 4 +.IX Item "--discard-all" +.PD +Do not copy non-global symbols from the source file. +.IP "\fB\-X\fR" 4 +.IX Item "-X" +.PD 0 +.IP "\fB\-\-discard\-locals\fR" 4 +.IX Item "--discard-locals" +.PD +Do not copy compiler-generated local symbols. +(These usually start with \fBL\fR or \fB.\fR.) +.IP "\fB\-b\fR \fIbyte\fR" 4 +.IX Item "-b byte" +.PD 0 +.IP "\fB\-\-byte=\fR\fIbyte\fR" 4 +.IX Item "--byte=byte" +.PD +If interleaving has been enabled via the \fB\-\-interleave\fR option +then start the range of bytes to keep at the \fIbyte\fRth byte. +\&\fIbyte\fR can be in the range from 0 to \fIbreadth\fR\-1, where +\&\fIbreadth\fR is the value given by the \fB\-\-interleave\fR option. +.IP "\fB\-i [\fR\fIbreadth\fR\fB]\fR" 4 +.IX Item "-i [breadth]" +.PD 0 +.IP "\fB\-\-interleave[=\fR\fIbreadth\fR\fB]\fR" 4 +.IX Item "--interleave[=breadth]" +.PD +Only copy a range out of every \fIbreadth\fR bytes. (Header data is +not affected). Select which byte in the range begins the copy with +the \fB\-\-byte\fR option. Select the width of the range with the +\&\fB\-\-interleave\-width\fR option. +.Sp +This option is useful for creating files to program \s-1ROM\s0. It is +typically used with an \f(CW\*(C`srec\*(C'\fR output target. Note that +\&\fBobjcopy\fR will complain if you do not specify the +\&\fB\-\-byte\fR option as well. +.Sp +The default interleave breadth is 4, so with \fB\-\-byte\fR set to 0, +\&\fBobjcopy\fR would copy the first byte out of every four bytes +from the input to the output. +.IP "\fB\-\-interleave\-width=\fR\fIwidth\fR" 4 +.IX Item "--interleave-width=width" +When used with the \fB\-\-interleave\fR option, copy \fIwidth\fR +bytes at a time. The start of the range of bytes to be copied is set +by the \fB\-\-byte\fR option, and the extent of the range is set with +the \fB\-\-interleave\fR option. +.Sp +The default value for this option is 1. The value of \fIwidth\fR plus +the \fIbyte\fR value set by the \fB\-\-byte\fR option must not exceed +the interleave breadth set by the \fB\-\-interleave\fR option. +.Sp +This option can be used to create images for two 16\-bit flashes interleaved +in a 32\-bit bus by passing \fB\-b 0 \-i 4 \-\-interleave\-width=2\fR +and \fB\-b 2 \-i 4 \-\-interleave\-width=2\fR to two \fBobjcopy\fR +commands. If the input was '12345678' then the outputs would be +\&'1256' and '3478' respectively. +.IP "\fB\-p\fR" 4 +.IX Item "-p" +.PD 0 +.IP "\fB\-\-preserve\-dates\fR" 4 +.IX Item "--preserve-dates" +.PD +Set the access and modification dates of the output file to be the same +as those of the input file. +.IP "\fB\-\-debugging\fR" 4 +.IX Item "--debugging" +Convert debugging information, if possible. This is not the default +because only certain debugging formats are supported, and the +conversion process can be time consuming. +.IP "\fB\-\-gap\-fill\fR \fIval\fR" 4 +.IX Item "--gap-fill val" +Fill gaps between sections with \fIval\fR. This operation applies to +the \fIload address\fR (\s-1LMA\s0) of the sections. It is done by increasing +the size of the section with the lower address, and filling in the extra +space created with \fIval\fR. +.IP "\fB\-\-pad\-to\fR \fIaddress\fR" 4 +.IX Item "--pad-to address" +Pad the output file up to the load address \fIaddress\fR. This is +done by increasing the size of the last section. The extra space is +filled in with the value specified by \fB\-\-gap\-fill\fR (default zero). +.IP "\fB\-\-set\-start\fR \fIval\fR" 4 +.IX Item "--set-start val" +Set the start address of the new file to \fIval\fR. Not all object file +formats support setting the start address. +.IP "\fB\-\-change\-start\fR \fIincr\fR" 4 +.IX Item "--change-start incr" +.PD 0 +.IP "\fB\-\-adjust\-start\fR \fIincr\fR" 4 +.IX Item "--adjust-start incr" +.PD +Change the start address by adding \fIincr\fR. Not all object file +formats support setting the start address. +.IP "\fB\-\-change\-addresses\fR \fIincr\fR" 4 +.IX Item "--change-addresses incr" +.PD 0 +.IP "\fB\-\-adjust\-vma\fR \fIincr\fR" 4 +.IX Item "--adjust-vma incr" +.PD +Change the \s-1VMA\s0 and \s-1LMA\s0 addresses of all sections, as well as the start +address, by adding \fIincr\fR. Some object file formats do not permit +section addresses to be changed arbitrarily. Note that this does not +relocate the sections; if the program expects sections to be loaded at a +certain address, and this option is used to change the sections such +that they are loaded at a different address, the program may fail. +.IP "\fB\-\-change\-section\-address\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4 +.IX Item "--change-section-address section{=,+,-}val" +.PD 0 +.IP "\fB\-\-adjust\-section\-vma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4 +.IX Item "--adjust-section-vma section{=,+,-}val" +.PD +Set or change both the \s-1VMA\s0 address and the \s-1LMA\s0 address of the named +\&\fIsection\fR. If \fB=\fR is used, the section address is set to +\&\fIval\fR. Otherwise, \fIval\fR is added to or subtracted from the +section address. See the comments under \fB\-\-change\-addresses\fR, +above. If \fIsection\fR does not exist in the input file, a warning will +be issued, unless \fB\-\-no\-change\-warnings\fR is used. +.IP "\fB\-\-change\-section\-lma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4 +.IX Item "--change-section-lma section{=,+,-}val" +Set or change the \s-1LMA\s0 address of the named \fIsection\fR. The \s-1LMA\s0 +address is the address where the section will be loaded into memory at +program load time. Normally this is the same as the \s-1VMA\s0 address, which +is the address of the section at program run time, but on some systems, +especially those where a program is held in \s-1ROM\s0, the two can be +different. If \fB=\fR is used, the section address is set to +\&\fIval\fR. Otherwise, \fIval\fR is added to or subtracted from the +section address. See the comments under \fB\-\-change\-addresses\fR, +above. If \fIsection\fR does not exist in the input file, a warning +will be issued, unless \fB\-\-no\-change\-warnings\fR is used. +.IP "\fB\-\-change\-section\-vma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4 +.IX Item "--change-section-vma section{=,+,-}val" +Set or change the \s-1VMA\s0 address of the named \fIsection\fR. The \s-1VMA\s0 +address is the address where the section will be located once the +program has started executing. Normally this is the same as the \s-1LMA\s0 +address, which is the address where the section will be loaded into +memory, but on some systems, especially those where a program is held in +\&\s-1ROM\s0, the two can be different. If \fB=\fR is used, the section address +is set to \fIval\fR. Otherwise, \fIval\fR is added to or subtracted +from the section address. See the comments under +\&\fB\-\-change\-addresses\fR, above. If \fIsection\fR does not exist in +the input file, a warning will be issued, unless +\&\fB\-\-no\-change\-warnings\fR is used. +.IP "\fB\-\-change\-warnings\fR" 4 +.IX Item "--change-warnings" +.PD 0 +.IP "\fB\-\-adjust\-warnings\fR" 4 +.IX Item "--adjust-warnings" +.PD +If \fB\-\-change\-section\-address\fR or \fB\-\-change\-section\-lma\fR or +\&\fB\-\-change\-section\-vma\fR is used, and the named section does not +exist, issue a warning. This is the default. +.IP "\fB\-\-no\-change\-warnings\fR" 4 +.IX Item "--no-change-warnings" +.PD 0 +.IP "\fB\-\-no\-adjust\-warnings\fR" 4 +.IX Item "--no-adjust-warnings" +.PD +Do not issue a warning if \fB\-\-change\-section\-address\fR or +\&\fB\-\-adjust\-section\-lma\fR or \fB\-\-adjust\-section\-vma\fR is used, even +if the named section does not exist. +.IP "\fB\-\-set\-section\-flags\fR \fIsection\fR\fB=\fR\fIflags\fR" 4 +.IX Item "--set-section-flags section=flags" +Set the flags for the named section. The \fIflags\fR argument is a +comma separated string of flag names. The recognized names are +\&\fBalloc\fR, \fBcontents\fR, \fBload\fR, \fBnoload\fR, +\&\fBreadonly\fR, \fBcode\fR, \fBdata\fR, \fBrom\fR, \fBshare\fR, and +\&\fBdebug\fR. You can set the \fBcontents\fR flag for a section which +does not have contents, but it is not meaningful to clear the +\&\fBcontents\fR flag of a section which does have contents\*(--just remove +the section instead. Not all flags are meaningful for all object file +formats. +.IP "\fB\-\-add\-section\fR \fIsectionname\fR\fB=\fR\fIfilename\fR" 4 +.IX Item "--add-section sectionname=filename" +Add a new section named \fIsectionname\fR while copying the file. The +contents of the new section are taken from the file \fIfilename\fR. The +size of the section will be the size of the file. This option only +works on file formats which can support sections with arbitrary names. +.IP "\fB\-\-rename\-section\fR \fIoldname\fR\fB=\fR\fInewname\fR\fB[,\fR\fIflags\fR\fB]\fR" 4 +.IX Item "--rename-section oldname=newname[,flags]" +Rename a section from \fIoldname\fR to \fInewname\fR, optionally +changing the section's flags to \fIflags\fR in the process. This has +the advantage over usng a linker script to perform the rename in that +the output stays as an object file and does not become a linked +executable. +.Sp +This option is particularly helpful when the input format is binary, +since this will always create a section called .data. If for example, +you wanted instead to create a section called .rodata containing binary +data you could use the following command line to achieve it: +.Sp +.Vb 3 +\& objcopy \-I binary \-O \-B \e +\& \-\-rename\-section .data=.rodata,alloc,load,readonly,data,contents \e +\& +.Ve +.IP "\fB\-\-long\-section\-names {enable,disable,keep}\fR" 4 +.IX Item "--long-section-names {enable,disable,keep}" +Controls the handling of long section names when processing \f(CW\*(C`COFF\*(C'\fR +and \f(CW\*(C`PE\-COFF\*(C'\fR object formats. The default behaviour, \fBkeep\fR, +is to preserve long section names if any are present in the input file. +The \fBenable\fR and \fBdisable\fR options forcibly enable or disable +the use of long section names in the output object; when \fBdisable\fR +is in effect, any long section names in the input object will be truncated. +The \fBenable\fR option will only emit long section names if any are +present in the inputs; this is mostly the same as \fBkeep\fR, but it +is left undefined whether the \fBenable\fR option might force the +creation of an empty string table in the output file. +.IP "\fB\-\-change\-leading\-char\fR" 4 +.IX Item "--change-leading-char" +Some object file formats use special characters at the start of +symbols. The most common such character is underscore, which compilers +often add before every symbol. This option tells \fBobjcopy\fR to +change the leading character of every symbol when it converts between +object file formats. If the object file formats use the same leading +character, this option has no effect. Otherwise, it will add a +character, or remove a character, or change a character, as +appropriate. +.IP "\fB\-\-remove\-leading\-char\fR" 4 +.IX Item "--remove-leading-char" +If the first character of a global symbol is a special symbol leading +character used by the object file format, remove the character. The +most common symbol leading character is underscore. This option will +remove a leading underscore from all global symbols. This can be useful +if you want to link together objects of different file formats with +different conventions for symbol names. This is different from +\&\fB\-\-change\-leading\-char\fR because it always changes the symbol name +when appropriate, regardless of the object file format of the output +file. +.IP "\fB\-\-reverse\-bytes=\fR\fInum\fR" 4 +.IX Item "--reverse-bytes=num" +Reverse the bytes in a section with output contents. A section length must +be evenly divisible by the value given in order for the swap to be able to +take place. Reversing takes place before the interleaving is performed. +.Sp +This option is used typically in generating \s-1ROM\s0 images for problematic +target systems. For example, on some target boards, the 32\-bit words +fetched from 8\-bit ROMs are re-assembled in little-endian byte order +regardless of the \s-1CPU\s0 byte order. Depending on the programming model, the +endianness of the \s-1ROM\s0 may need to be modified. +.Sp +Consider a simple file with a section containing the following eight +bytes: \f(CW12345678\fR. +.Sp +Using \fB\-\-reverse\-bytes=2\fR for the above example, the bytes in the +output file would be ordered \f(CW21436587\fR. +.Sp +Using \fB\-\-reverse\-bytes=4\fR for the above example, the bytes in the +output file would be ordered \f(CW43218765\fR. +.Sp +By using \fB\-\-reverse\-bytes=2\fR for the above example, followed by +\&\fB\-\-reverse\-bytes=4\fR on the output file, the bytes in the second +output file would be ordered \f(CW34127856\fR. +.IP "\fB\-\-srec\-len=\fR\fIival\fR" 4 +.IX Item "--srec-len=ival" +Meaningful only for srec output. Set the maximum length of the Srecords +being produced to \fIival\fR. This length covers both address, data and +crc fields. +.IP "\fB\-\-srec\-forceS3\fR" 4 +.IX Item "--srec-forceS3" +Meaningful only for srec output. Avoid generation of S1/S2 records, +creating S3\-only record format. +.IP "\fB\-\-redefine\-sym\fR \fIold\fR\fB=\fR\fInew\fR" 4 +.IX Item "--redefine-sym old=new" +Change the name of a symbol \fIold\fR, to \fInew\fR. This can be useful +when one is trying link two things together for which you have no +source, and there are name collisions. +.IP "\fB\-\-redefine\-syms=\fR\fIfilename\fR" 4 +.IX Item "--redefine-syms=filename" +Apply \fB\-\-redefine\-sym\fR to each symbol pair "\fIold\fR \fInew\fR" +listed in the file \fIfilename\fR. \fIfilename\fR is simply a flat file, +with one symbol pair per line. Line comments may be introduced by the hash +character. This option may be given more than once. +.IP "\fB\-\-weaken\fR" 4 +.IX Item "--weaken" +Change all global symbols in the file to be weak. This can be useful +when building an object which will be linked against other objects using +the \fB\-R\fR option to the linker. This option is only effective when +using an object file format which supports weak symbols. +.IP "\fB\-\-keep\-symbols=\fR\fIfilename\fR" 4 +.IX Item "--keep-symbols=filename" +Apply \fB\-\-keep\-symbol\fR option to each symbol listed in the file +\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol +name per line. Line comments may be introduced by the hash character. +This option may be given more than once. +.IP "\fB\-\-strip\-symbols=\fR\fIfilename\fR" 4 +.IX Item "--strip-symbols=filename" +Apply \fB\-\-strip\-symbol\fR option to each symbol listed in the file +\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol +name per line. Line comments may be introduced by the hash character. +This option may be given more than once. +.IP "\fB\-\-strip\-unneeded\-symbols=\fR\fIfilename\fR" 4 +.IX Item "--strip-unneeded-symbols=filename" +Apply \fB\-\-strip\-unneeded\-symbol\fR option to each symbol listed in +the file \fIfilename\fR. \fIfilename\fR is simply a flat file, with one +symbol name per line. Line comments may be introduced by the hash +character. This option may be given more than once. +.IP "\fB\-\-keep\-global\-symbols=\fR\fIfilename\fR" 4 +.IX Item "--keep-global-symbols=filename" +Apply \fB\-\-keep\-global\-symbol\fR option to each symbol listed in the +file \fIfilename\fR. \fIfilename\fR is simply a flat file, with one +symbol name per line. Line comments may be introduced by the hash +character. This option may be given more than once. +.IP "\fB\-\-localize\-symbols=\fR\fIfilename\fR" 4 +.IX Item "--localize-symbols=filename" +Apply \fB\-\-localize\-symbol\fR option to each symbol listed in the file +\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol +name per line. Line comments may be introduced by the hash character. +This option may be given more than once. +.IP "\fB\-\-globalize\-symbols=\fR\fIfilename\fR" 4 +.IX Item "--globalize-symbols=filename" +Apply \fB\-\-globalize\-symbol\fR option to each symbol listed in the file +\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol +name per line. Line comments may be introduced by the hash character. +This option may be given more than once. +.IP "\fB\-\-weaken\-symbols=\fR\fIfilename\fR" 4 +.IX Item "--weaken-symbols=filename" +Apply \fB\-\-weaken\-symbol\fR option to each symbol listed in the file +\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol +name per line. Line comments may be introduced by the hash character. +This option may be given more than once. +.IP "\fB\-\-alt\-machine\-code=\fR\fIindex\fR" 4 +.IX Item "--alt-machine-code=index" +If the output architecture has alternate machine codes, use the +\&\fIindex\fRth code instead of the default one. This is useful in case +a machine is assigned an official code and the tool-chain adopts the +new code, but other applications still depend on the original code +being used. For \s-1ELF\s0 based architectures if the \fIindex\fR +alternative does not exist then the value is treated as an absolute +number to be stored in the e_machine field of the \s-1ELF\s0 header. +.IP "\fB\-\-writable\-text\fR" 4 +.IX Item "--writable-text" +Mark the output text as writable. This option isn't meaningful for all +object file formats. +.IP "\fB\-\-readonly\-text\fR" 4 +.IX Item "--readonly-text" +Make the output text write protected. This option isn't meaningful for all +object file formats. +.IP "\fB\-\-pure\fR" 4 +.IX Item "--pure" +Mark the output file as demand paged. This option isn't meaningful for all +object file formats. +.IP "\fB\-\-impure\fR" 4 +.IX Item "--impure" +Mark the output file as impure. This option isn't meaningful for all +object file formats. +.IP "\fB\-\-prefix\-symbols=\fR\fIstring\fR" 4 +.IX Item "--prefix-symbols=string" +Prefix all symbols in the output file with \fIstring\fR. +.IP "\fB\-\-prefix\-sections=\fR\fIstring\fR" 4 +.IX Item "--prefix-sections=string" +Prefix all section names in the output file with \fIstring\fR. +.IP "\fB\-\-prefix\-alloc\-sections=\fR\fIstring\fR" 4 +.IX Item "--prefix-alloc-sections=string" +Prefix all the names of all allocated sections in the output file with +\&\fIstring\fR. +.IP "\fB\-\-add\-gnu\-debuglink=\fR\fIpath-to-file\fR" 4 +.IX Item "--add-gnu-debuglink=path-to-file" +Creates a .gnu_debuglink section which contains a reference to \fIpath-to-file\fR +and adds it to the output file. +.IP "\fB\-\-keep\-file\-symbols\fR" 4 +.IX Item "--keep-file-symbols" +When stripping a file, perhaps with \fB\-\-strip\-debug\fR or +\&\fB\-\-strip\-unneeded\fR, retain any symbols specifying source file names, +which would otherwise get stripped. +.IP "\fB\-\-only\-keep\-debug\fR" 4 +.IX Item "--only-keep-debug" +Strip a file, removing contents of any sections that would not be +stripped by \fB\-\-strip\-debug\fR and leaving the debugging sections +intact. In \s-1ELF\s0 files, this preserves all note sections in the output. +.Sp +The intention is that this option will be used in conjunction with +\&\fB\-\-add\-gnu\-debuglink\fR to create a two part executable. One a +stripped binary which will occupy less space in \s-1RAM\s0 and in a +distribution and the second a debugging information file which is only +needed if debugging abilities are required. The suggested procedure +to create these files is as follows: +.RS 4 +.IP "1." 4 +.IX Item "1." +\&\f(CW\*(C`foo\*(C'\fR then... +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +create a file containing the debugging info. +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +stripped executable. +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +to add a link to the debugging info into the stripped executable. +.RE +.RS 4 +.Sp +Note\-\-\-the choice of \f(CW\*(C`.dbg\*(C'\fR as an extension for the debug info +file is arbitrary. Also the \f(CW\*(C`\-\-only\-keep\-debug\*(C'\fR step is +optional. You could instead do this: +.IP "1." 4 +.IX Item "1." +.PD 0 +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +.RE +.RS 4 +.PD +.Sp +i.e., the file pointed to by the \fB\-\-add\-gnu\-debuglink\fR can be the +full executable. It does not have to be a file created by the +\&\fB\-\-only\-keep\-debug\fR switch. +.Sp +Note\-\-\-this switch is only intended for use on fully linked files. It +does not make sense to use it on object files where the debugging +information may be incomplete. Besides the gnu_debuglink feature +currently only supports the presence of one filename containing +debugging information, not multiple filenames on a one-per-object-file +basis. +.RE +.IP "\fB\-\-file\-alignment\fR \fInum\fR" 4 +.IX Item "--file-alignment num" +Specify the file alignment. Sections in the file will always begin at +file offsets which are multiples of this number. This defaults to +512. +[This option is specific to \s-1PE\s0 targets.] +.IP "\fB\-\-heap\fR \fIreserve\fR" 4 +.IX Item "--heap reserve" +.PD 0 +.IP "\fB\-\-heap\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4 +.IX Item "--heap reserve,commit" +.PD +Specify the number of bytes of memory to reserve (and optionally commit) +to be used as heap for this program. +[This option is specific to \s-1PE\s0 targets.] +.IP "\fB\-\-image\-base\fR \fIvalue\fR" 4 +.IX Item "--image-base value" +Use \fIvalue\fR as the base address of your program or dll. This is +the lowest memory location that will be used when your program or dll +is loaded. To reduce the need to relocate and improve performance of +your dlls, each should have a unique base address and not overlap any +other dlls. The default is 0x400000 for executables, and 0x10000000 +for dlls. +[This option is specific to \s-1PE\s0 targets.] +.IP "\fB\-\-section\-alignment\fR \fInum\fR" 4 +.IX Item "--section-alignment num" +Sets the section alignment. Sections in memory will always begin at +addresses which are a multiple of this number. Defaults to 0x1000. +[This option is specific to \s-1PE\s0 targets.] +.IP "\fB\-\-stack\fR \fIreserve\fR" 4 +.IX Item "--stack reserve" +.PD 0 +.IP "\fB\-\-stack\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4 +.IX Item "--stack reserve,commit" +.PD +Specify the number of bytes of memory to reserve (and optionally commit) +to be used as stack for this program. +[This option is specific to \s-1PE\s0 targets.] +.IP "\fB\-\-subsystem\fR \fIwhich\fR" 4 +.IX Item "--subsystem which" +.PD 0 +.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR" 4 +.IX Item "--subsystem which:major" +.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR\fB.\fR\fIminor\fR" 4 +.IX Item "--subsystem which:major.minor" +.PD +Specifies the subsystem under which your program will execute. The +legal values for \fIwhich\fR are \f(CW\*(C`native\*(C'\fR, \f(CW\*(C`windows\*(C'\fR, +\&\f(CW\*(C`console\*(C'\fR, \f(CW\*(C`posix\*(C'\fR, \f(CW\*(C`efi\-app\*(C'\fR, \f(CW\*(C`efi\-bsd\*(C'\fR, +\&\f(CW\*(C`efi\-rtd\*(C'\fR, \f(CW\*(C`sal\-rtd\*(C'\fR, and \f(CW\*(C`xbox\*(C'\fR. You may optionally set +the subsystem version also. Numeric values are also accepted for +\&\fIwhich\fR. +[This option is specific to \s-1PE\s0 targets.] +.IP "\fB\-\-extract\-symbol\fR" 4 +.IX Item "--extract-symbol" +Keep the file's section flags and symbols but remove all section data. +Specifically, the option: +.RS 4 +.IP "*" 4 +.IX Item "*" +.PD 0 +.IP "*" 4 +.IX Item "*" +.IP "*" 4 +.IX Item "*" +.RE +.RS 4 +.PD +.Sp +This option is used to build a \fI.sym\fR file for a VxWorks kernel. +It can also be a useful way of reducing the size of a \fB\-\-just\-symbols\fR +linker input file. +.RE +.IP "\fB\-\-compress\-debug\-sections\fR" 4 +.IX Item "--compress-debug-sections" +Compress \s-1DWARF\s0 debug sections using zlib. +.IP "\fB\-\-decompress\-debug\-sections\fR" 4 +.IX Item "--decompress-debug-sections" +Decompress \s-1DWARF\s0 debug sections using zlib. +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Show the version number of \fBobjcopy\fR. +.IP "\fB\-v\fR" 4 +.IX Item "-v" +.PD 0 +.IP "\fB\-\-verbose\fR" 4 +.IX Item "--verbose" +.PD +Verbose output: list all object files modified. In the case of +archives, \fBobjcopy \-V\fR lists all members of the archive. +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +Show a summary of the options to \fBobjcopy\fR. +.IP "\fB\-\-info\fR" 4 +.IX Item "--info" +Display a list showing all architectures and object formats available. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fIld\fR\|(1), \fIobjdump\fR\|(1), and the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/objdump.1 b/binutils/doc/objdump.1 new file mode 100644 index 0000000..2eccdef --- /dev/null +++ b/binutils/doc/objdump.1 @@ -0,0 +1,836 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "OBJDUMP 1" +.TH OBJDUMP 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +objdump \- display information from object files. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +objdump [\fB\-a\fR|\fB\-\-archive\-headers\fR] + [\fB\-b\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR] + [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR] ] + [\fB\-d\fR|\fB\-\-disassemble\fR] + [\fB\-D\fR|\fB\-\-disassemble\-all\fR] + [\fB\-z\fR|\fB\-\-disassemble\-zeroes\fR] + [\fB\-EB\fR|\fB\-EL\fR|\fB\-\-endian=\fR{big | little }] + [\fB\-f\fR|\fB\-\-file\-headers\fR] + [\fB\-F\fR|\fB\-\-file\-offsets\fR] + [\fB\-\-file\-start\-context\fR] + [\fB\-g\fR|\fB\-\-debugging\fR] + [\fB\-e\fR|\fB\-\-debugging\-tags\fR] + [\fB\-h\fR|\fB\-\-section\-headers\fR|\fB\-\-headers\fR] + [\fB\-i\fR|\fB\-\-info\fR] + [\fB\-j\fR \fIsection\fR|\fB\-\-section=\fR\fIsection\fR] + [\fB\-l\fR|\fB\-\-line\-numbers\fR] + [\fB\-S\fR|\fB\-\-source\fR] + [\fB\-m\fR \fImachine\fR|\fB\-\-architecture=\fR\fImachine\fR] + [\fB\-M\fR \fIoptions\fR|\fB\-\-disassembler\-options=\fR\fIoptions\fR] + [\fB\-p\fR|\fB\-\-private\-headers\fR] + [\fB\-P\fR \fIoptions\fR|\fB\-\-private=\fR\fIoptions\fR] + [\fB\-r\fR|\fB\-\-reloc\fR] + [\fB\-R\fR|\fB\-\-dynamic\-reloc\fR] + [\fB\-s\fR|\fB\-\-full\-contents\fR] + [\fB\-W[lLiaprmfFsoRt]\fR| + \fB\-\-dwarf\fR[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]] + [\fB\-G\fR|\fB\-\-stabs\fR] + [\fB\-t\fR|\fB\-\-syms\fR] + [\fB\-T\fR|\fB\-\-dynamic\-syms\fR] + [\fB\-x\fR|\fB\-\-all\-headers\fR] + [\fB\-w\fR|\fB\-\-wide\fR] + [\fB\-\-start\-address=\fR\fIaddress\fR] + [\fB\-\-stop\-address=\fR\fIaddress\fR] + [\fB\-\-prefix\-addresses\fR] + [\fB\-\-[no\-]show\-raw\-insn\fR] + [\fB\-\-adjust\-vma=\fR\fIoffset\fR] + [\fB\-\-special\-syms\fR] + [\fB\-\-prefix=\fR\fIprefix\fR] + [\fB\-\-prefix\-strip=\fR\fIlevel\fR] + [\fB\-\-insn\-width=\fR\fIwidth\fR] + [\fB\-V\fR|\fB\-\-version\fR] + [\fB\-H\fR|\fB\-\-help\fR] + \fIobjfile\fR... +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\fBobjdump\fR displays information about one or more object files. +The options control what particular information to display. This +information is mostly useful to programmers who are working on the +compilation tools, as opposed to programmers who just want their +program to compile and work. +.PP +\&\fIobjfile\fR... are the object files to be examined. When you +specify archives, \fBobjdump\fR shows information on each of the member +object files. +.SH "OPTIONS" +.IX Header "OPTIONS" +The long and short forms of options, shown here as alternatives, are +equivalent. At least one option from the list +\&\fB\-a,\-d,\-D,\-e,\-f,\-g,\-G,\-h,\-H,\-p,\-P,\-r,\-R,\-s,\-S,\-t,\-T,\-V,\-x\fR must be given. +.IP "\fB\-a\fR" 4 +.IX Item "-a" +.PD 0 +.IP "\fB\-\-archive\-header\fR" 4 +.IX Item "--archive-header" +.PD +If any of the \fIobjfile\fR files are archives, display the archive +header information (in a format similar to \fBls \-l\fR). Besides the +information you could list with \fBar tv\fR, \fBobjdump \-a\fR shows +the object file format of each archive member. +.IP "\fB\-\-adjust\-vma=\fR\fIoffset\fR" 4 +.IX Item "--adjust-vma=offset" +When dumping information, first add \fIoffset\fR to all the section +addresses. This is useful if the section addresses do not correspond to +the symbol table, which can happen when putting sections at particular +addresses when using a format which can not represent section addresses, +such as a.out. +.IP "\fB\-b\fR \fIbfdname\fR" 4 +.IX Item "-b bfdname" +.PD 0 +.IP "\fB\-\-target=\fR\fIbfdname\fR" 4 +.IX Item "--target=bfdname" +.PD +Specify that the object-code format for the object files is +\&\fIbfdname\fR. This option may not be necessary; \fIobjdump\fR can +automatically recognize many formats. +.Sp +For example, +.Sp +.Vb 1 +\& objdump \-b oasys \-m vax \-h fu.o +.Ve +.Sp +displays summary information from the section headers (\fB\-h\fR) of +\&\fIfu.o\fR, which is explicitly identified (\fB\-m\fR) as a \s-1VAX\s0 object +file in the format produced by Oasys compilers. You can list the +formats available with the \fB\-i\fR option. +.IP "\fB\-C\fR" 4 +.IX Item "-C" +.PD 0 +.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4 +.IX Item "--demangle[=style]" +.PD +Decode (\fIdemangle\fR) low-level symbol names into user-level names. +Besides removing any initial underscore prepended by the system, this +makes \*(C+ function names readable. Different compilers have different +mangling styles. The optional demangling style argument can be used to +choose an appropriate demangling style for your compiler. +.IP "\fB\-g\fR" 4 +.IX Item "-g" +.PD 0 +.IP "\fB\-\-debugging\fR" 4 +.IX Item "--debugging" +.PD +Display debugging information. This attempts to parse \s-1STABS\s0 and \s-1IEEE\s0 +debugging format information stored in the file and print it out using +a C like syntax. If neither of these formats are found this option +falls back on the \fB\-W\fR option to print any \s-1DWARF\s0 information in +the file. +.IP "\fB\-e\fR" 4 +.IX Item "-e" +.PD 0 +.IP "\fB\-\-debugging\-tags\fR" 4 +.IX Item "--debugging-tags" +.PD +Like \fB\-g\fR, but the information is generated in a format compatible +with ctags tool. +.IP "\fB\-d\fR" 4 +.IX Item "-d" +.PD 0 +.IP "\fB\-\-disassemble\fR" 4 +.IX Item "--disassemble" +.PD +Display the assembler mnemonics for the machine instructions from +\&\fIobjfile\fR. This option only disassembles those sections which are +expected to contain instructions. +.IP "\fB\-D\fR" 4 +.IX Item "-D" +.PD 0 +.IP "\fB\-\-disassemble\-all\fR" 4 +.IX Item "--disassemble-all" +.PD +Like \fB\-d\fR, but disassemble the contents of all sections, not just +those expected to contain instructions. +.Sp +If the target is an \s-1ARM\s0 architecture this switch also has the effect +of forcing the disassembler to decode pieces of data found in code +sections as if they were instructions. +.IP "\fB\-\-prefix\-addresses\fR" 4 +.IX Item "--prefix-addresses" +When disassembling, print the complete address on each line. This is +the older disassembly format. +.IP "\fB\-EB\fR" 4 +.IX Item "-EB" +.PD 0 +.IP "\fB\-EL\fR" 4 +.IX Item "-EL" +.IP "\fB\-\-endian={big|little}\fR" 4 +.IX Item "--endian={big|little}" +.PD +Specify the endianness of the object files. This only affects +disassembly. This can be useful when disassembling a file format which +does not describe endianness information, such as S\-records. +.IP "\fB\-f\fR" 4 +.IX Item "-f" +.PD 0 +.IP "\fB\-\-file\-headers\fR" 4 +.IX Item "--file-headers" +.PD +Display summary information from the overall header of +each of the \fIobjfile\fR files. +.IP "\fB\-F\fR" 4 +.IX Item "-F" +.PD 0 +.IP "\fB\-\-file\-offsets\fR" 4 +.IX Item "--file-offsets" +.PD +When disassembling sections, whenever a symbol is displayed, also +display the file offset of the region of data that is about to be +dumped. If zeroes are being skipped, then when disassembly resumes, +tell the user how many zeroes were skipped and the file offset of the +location from where the disassembly resumes. When dumping sections, +display the file offset of the location from where the dump starts. +.IP "\fB\-\-file\-start\-context\fR" 4 +.IX Item "--file-start-context" +Specify that when displaying interlisted source code/disassembly +(assumes \fB\-S\fR) from a file that has not yet been displayed, extend the +context to the start of the file. +.IP "\fB\-h\fR" 4 +.IX Item "-h" +.PD 0 +.IP "\fB\-\-section\-headers\fR" 4 +.IX Item "--section-headers" +.IP "\fB\-\-headers\fR" 4 +.IX Item "--headers" +.PD +Display summary information from the section headers of the +object file. +.Sp +File segments may be relocated to nonstandard addresses, for example by +using the \fB\-Ttext\fR, \fB\-Tdata\fR, or \fB\-Tbss\fR options to +\&\fBld\fR. However, some object file formats, such as a.out, do not +store the starting address of the file segments. In those situations, +although \fBld\fR relocates the sections correctly, using \fBobjdump +\&\-h\fR to list the file section headers cannot show the correct addresses. +Instead, it shows the usual addresses, which are implicit for the +target. +.IP "\fB\-H\fR" 4 +.IX Item "-H" +.PD 0 +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +.PD +Print a summary of the options to \fBobjdump\fR and exit. +.IP "\fB\-i\fR" 4 +.IX Item "-i" +.PD 0 +.IP "\fB\-\-info\fR" 4 +.IX Item "--info" +.PD +Display a list showing all architectures and object formats available +for specification with \fB\-b\fR or \fB\-m\fR. +.IP "\fB\-j\fR \fIname\fR" 4 +.IX Item "-j name" +.PD 0 +.IP "\fB\-\-section=\fR\fIname\fR" 4 +.IX Item "--section=name" +.PD +Display information only for section \fIname\fR. +.IP "\fB\-l\fR" 4 +.IX Item "-l" +.PD 0 +.IP "\fB\-\-line\-numbers\fR" 4 +.IX Item "--line-numbers" +.PD +Label the display (using debugging information) with the filename and +source line numbers corresponding to the object code or relocs shown. +Only useful with \fB\-d\fR, \fB\-D\fR, or \fB\-r\fR. +.IP "\fB\-m\fR \fImachine\fR" 4 +.IX Item "-m machine" +.PD 0 +.IP "\fB\-\-architecture=\fR\fImachine\fR" 4 +.IX Item "--architecture=machine" +.PD +Specify the architecture to use when disassembling object files. This +can be useful when disassembling object files which do not describe +architecture information, such as S\-records. You can list the available +architectures with the \fB\-i\fR option. +.Sp +If the target is an \s-1ARM\s0 architecture then this switch has an +additional effect. It restricts the disassembly to only those +instructions supported by the architecture specified by \fImachine\fR. +If it is necessary to use this switch because the input file does not +contain any architecture information, but it is also desired to +disassemble all the instructions use \fB\-marm\fR. +.IP "\fB\-M\fR \fIoptions\fR" 4 +.IX Item "-M options" +.PD 0 +.IP "\fB\-\-disassembler\-options=\fR\fIoptions\fR" 4 +.IX Item "--disassembler-options=options" +.PD +Pass target specific information to the disassembler. Only supported on +some targets. If it is necessary to specify more than one +disassembler option then multiple \fB\-M\fR options can be used or +can be placed together into a comma separated list. +.Sp +If the target is an \s-1ARM\s0 architecture then this switch can be used to +select which register name set is used during disassembler. Specifying +\&\fB\-M reg-names-std\fR (the default) will select the register names as +used in \s-1ARM\s0's instruction set documentation, but with register 13 called +\&'sp', register 14 called 'lr' and register 15 called 'pc'. Specifying +\&\fB\-M reg-names-apcs\fR will select the name set used by the \s-1ARM\s0 +Procedure Call Standard, whilst specifying \fB\-M reg-names-raw\fR will +just use \fBr\fR followed by the register number. +.Sp +There are also two variants on the \s-1APCS\s0 register naming scheme enabled +by \fB\-M reg-names-atpcs\fR and \fB\-M reg-names-special-atpcs\fR which +use the ARM/Thumb Procedure Call Standard naming conventions. (Either +with the normal register names or the special register names). +.Sp +This option can also be used for \s-1ARM\s0 architectures to force the +disassembler to interpret all instructions as Thumb instructions by +using the switch \fB\-\-disassembler\-options=force\-thumb\fR. This can be +useful when attempting to disassemble thumb code produced by other +compilers. +.Sp +For the x86, some of the options duplicate functions of the \fB\-m\fR +switch, but allow finer grained control. Multiple selections from the +following may be specified as a comma separated string. +\&\fBx86\-64\fR, \fBi386\fR and \fBi8086\fR select disassembly for +the given architecture. \fBintel\fR and \fBatt\fR select between +intel syntax mode and \s-1AT&T\s0 syntax mode. +\&\fBintel-mnemonic\fR and \fBatt-mnemonic\fR select between +intel mnemonic mode and \s-1AT&T\s0 mnemonic mode. \fBintel-mnemonic\fR +implies \fBintel\fR and \fBatt-mnemonic\fR implies \fBatt\fR. +\&\fBaddr64\fR, \fBaddr32\fR, +\&\fBaddr16\fR, \fBdata32\fR and \fBdata16\fR specify the default +address size and operand size. These four options will be overridden if +\&\fBx86\-64\fR, \fBi386\fR or \fBi8086\fR appear later in the +option string. Lastly, \fBsuffix\fR, when in \s-1AT&T\s0 mode, +instructs the disassembler to print a mnemonic suffix even when the +suffix could be inferred by the operands. +.Sp +For PowerPC, \fBbooke\fR controls the disassembly of BookE +instructions. \fB32\fR and \fB64\fR select PowerPC and +PowerPC64 disassembly, respectively. \fBe300\fR selects +disassembly for the e300 family. \fB440\fR selects disassembly for +the PowerPC 440. \fBppcps\fR selects disassembly for the paired +single instructions of the \s-1PPC750CL\s0. +.Sp +For \s-1MIPS\s0, this option controls the printing of instruction mnemonic +names and register names in disassembled instructions. Multiple +selections from the following may be specified as a comma separated +string, and invalid options are ignored: +.RS 4 +.ie n .IP """no\-aliases""" 4 +.el .IP "\f(CWno\-aliases\fR" 4 +.IX Item "no-aliases" +Print the 'raw' instruction mnemonic instead of some pseudo +instruction mnemonic. I.e., print 'daddu' or 'or' instead of 'move', +\&'sll' instead of 'nop', etc. +.ie n .IP """gpr\-names=\f(CIABI\f(CW""" 4 +.el .IP "\f(CWgpr\-names=\f(CIABI\f(CW\fR" 4 +.IX Item "gpr-names=ABI" +Print \s-1GPR\s0 (general-purpose register) names as appropriate +for the specified \s-1ABI\s0. By default, \s-1GPR\s0 names are selected according to +the \s-1ABI\s0 of the binary being disassembled. +.ie n .IP """fpr\-names=\f(CIABI\f(CW""" 4 +.el .IP "\f(CWfpr\-names=\f(CIABI\f(CW\fR" 4 +.IX Item "fpr-names=ABI" +Print \s-1FPR\s0 (floating-point register) names as +appropriate for the specified \s-1ABI\s0. By default, \s-1FPR\s0 numbers are printed +rather than names. +.ie n .IP """cp0\-names=\f(CIARCH\f(CW""" 4 +.el .IP "\f(CWcp0\-names=\f(CIARCH\f(CW\fR" 4 +.IX Item "cp0-names=ARCH" +Print \s-1CP0\s0 (system control coprocessor; coprocessor 0) register names +as appropriate for the \s-1CPU\s0 or architecture specified by +\&\fI\s-1ARCH\s0\fR. By default, \s-1CP0\s0 register names are selected according to +the architecture and \s-1CPU\s0 of the binary being disassembled. +.ie n .IP """hwr\-names=\f(CIARCH\f(CW""" 4 +.el .IP "\f(CWhwr\-names=\f(CIARCH\f(CW\fR" 4 +.IX Item "hwr-names=ARCH" +Print \s-1HWR\s0 (hardware register, used by the \f(CW\*(C`rdhwr\*(C'\fR instruction) names +as appropriate for the \s-1CPU\s0 or architecture specified by +\&\fI\s-1ARCH\s0\fR. By default, \s-1HWR\s0 names are selected according to +the architecture and \s-1CPU\s0 of the binary being disassembled. +.ie n .IP """reg\-names=\f(CIABI\f(CW""" 4 +.el .IP "\f(CWreg\-names=\f(CIABI\f(CW\fR" 4 +.IX Item "reg-names=ABI" +Print \s-1GPR\s0 and \s-1FPR\s0 names as appropriate for the selected \s-1ABI\s0. +.ie n .IP """reg\-names=\f(CIARCH\f(CW""" 4 +.el .IP "\f(CWreg\-names=\f(CIARCH\f(CW\fR" 4 +.IX Item "reg-names=ARCH" +Print CPU-specific register names (\s-1CP0\s0 register and \s-1HWR\s0 names) +as appropriate for the selected \s-1CPU\s0 or architecture. +.RE +.RS 4 +.Sp +For any of the options listed above, \fI\s-1ABI\s0\fR or +\&\fI\s-1ARCH\s0\fR may be specified as \fBnumeric\fR to have numbers printed +rather than names, for the selected types of registers. +You can list the available values of \fI\s-1ABI\s0\fR and \fI\s-1ARCH\s0\fR using +the \fB\-\-help\fR option. +.Sp +For \s-1VAX\s0, you can specify function entry addresses with \fB\-M +entry:0xf00ba\fR. You can use this multiple times to properly +disassemble \s-1VAX\s0 binary files that don't contain symbol tables (like +\&\s-1ROM\s0 dumps). In these cases, the function entry mask would otherwise +be decoded as \s-1VAX\s0 instructions, which would probably lead the rest +of the function being wrongly disassembled. +.RE +.IP "\fB\-p\fR" 4 +.IX Item "-p" +.PD 0 +.IP "\fB\-\-private\-headers\fR" 4 +.IX Item "--private-headers" +.PD +Print information that is specific to the object file format. The exact +information printed depends upon the object file format. For some +object file formats, no additional information is printed. +.IP "\fB\-P\fR \fIoptions\fR" 4 +.IX Item "-P options" +.PD 0 +.IP "\fB\-\-private=\fR\fIoptions\fR" 4 +.IX Item "--private=options" +.PD +Print information that is specific to the object file format. The +argument \fIoptions\fR is a comma separated list that depends on the +format (the lists of options is displayed with the help). +.Sp +For \s-1XCOFF\s0, the available options are: \fBheader\fR, \fBaout\fR, +\&\fBsections\fR, \fBsyms\fR, \fBrelocs\fR, \fBlineno\fR, +\&\fBloader\fR, \fBexcept\fR, \fBtypchk\fR, \fBtraceback\fR +and \fBtoc\fR. +.IP "\fB\-r\fR" 4 +.IX Item "-r" +.PD 0 +.IP "\fB\-\-reloc\fR" 4 +.IX Item "--reloc" +.PD +Print the relocation entries of the file. If used with \fB\-d\fR or +\&\fB\-D\fR, the relocations are printed interspersed with the +disassembly. +.IP "\fB\-R\fR" 4 +.IX Item "-R" +.PD 0 +.IP "\fB\-\-dynamic\-reloc\fR" 4 +.IX Item "--dynamic-reloc" +.PD +Print the dynamic relocation entries of the file. This is only +meaningful for dynamic objects, such as certain types of shared +libraries. As for \fB\-r\fR, if used with \fB\-d\fR or +\&\fB\-D\fR, the relocations are printed interspersed with the +disassembly. +.IP "\fB\-s\fR" 4 +.IX Item "-s" +.PD 0 +.IP "\fB\-\-full\-contents\fR" 4 +.IX Item "--full-contents" +.PD +Display the full contents of any sections requested. By default all +non-empty sections are displayed. +.IP "\fB\-S\fR" 4 +.IX Item "-S" +.PD 0 +.IP "\fB\-\-source\fR" 4 +.IX Item "--source" +.PD +Display source code intermixed with disassembly, if possible. Implies +\&\fB\-d\fR. +.IP "\fB\-\-prefix=\fR\fIprefix\fR" 4 +.IX Item "--prefix=prefix" +Specify \fIprefix\fR to add to the absolute paths when used with +\&\fB\-S\fR. +.IP "\fB\-\-prefix\-strip=\fR\fIlevel\fR" 4 +.IX Item "--prefix-strip=level" +Indicate how many initial directory names to strip off the hardwired +absolute paths. It has no effect without \fB\-\-prefix=\fR\fIprefix\fR. +.IP "\fB\-\-show\-raw\-insn\fR" 4 +.IX Item "--show-raw-insn" +When disassembling instructions, print the instruction in hex as well as +in symbolic form. This is the default except when +\&\fB\-\-prefix\-addresses\fR is used. +.IP "\fB\-\-no\-show\-raw\-insn\fR" 4 +.IX Item "--no-show-raw-insn" +When disassembling instructions, do not print the instruction bytes. +This is the default when \fB\-\-prefix\-addresses\fR is used. +.IP "\fB\-\-insn\-width=\fR\fIwidth\fR" 4 +.IX Item "--insn-width=width" +Display \fIwidth\fR bytes on a single line when disassembling +instructions. +.IP "\fB\-W[lLiaprmfFsoRt]\fR" 4 +.IX Item "-W[lLiaprmfFsoRt]" +.PD 0 +.IP "\fB\-\-dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]\fR" 4 +.IX Item "--dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]" +.PD +Displays the contents of the debug sections in the file, if any are +present. If one of the optional letters or words follows the switch +then only data found in those specific sections will be dumped. +.Sp +Note that there is no single letter option to display the content of +trace sections or .gdb_index. +.Sp +Note: the output from the \fB=info\fR option can also be affected +by the options \fB\-\-dwarf\-depth\fR and \fB\-\-dwarf\-start\fR. +.IP "\fB\-\-dwarf\-depth=\fR\fIn\fR" 4 +.IX Item "--dwarf-depth=n" +Limit the dump of the \f(CW\*(C`.debug_info\*(C'\fR section to \fIn\fR children. +This is only useful with \fB\-\-dwarf=info\fR. The default is +to print all DIEs; the special value 0 for \fIn\fR will also have this +effect. +.Sp +With a non-zero value for \fIn\fR, DIEs at or deeper than \fIn\fR +levels will not be printed. The range for \fIn\fR is zero-based. +.IP "\fB\-\-dwarf\-start=\fR\fIn\fR" 4 +.IX Item "--dwarf-start=n" +Print only DIEs beginning with the \s-1DIE\s0 numbered \fIn\fR. This is only +useful with \fB\-\-dwarf=info\fR. +.Sp +If specified, this option will suppress printing of any header +information and all DIEs before the \s-1DIE\s0 numbered \fIn\fR. Only +siblings and children of the specified \s-1DIE\s0 will be printed. +.Sp +This can be used in conjunction with \fB\-\-dwarf\-depth\fR. +.IP "\fB\-G\fR" 4 +.IX Item "-G" +.PD 0 +.IP "\fB\-\-stabs\fR" 4 +.IX Item "--stabs" +.PD +Display the full contents of any sections requested. Display the +contents of the .stab and .stab.index and .stab.excl sections from an +\&\s-1ELF\s0 file. This is only useful on systems (such as Solaris 2.0) in which +\&\f(CW\*(C`.stab\*(C'\fR debugging symbol-table entries are carried in an \s-1ELF\s0 +section. In most other file formats, debugging symbol-table entries are +interleaved with linkage symbols, and are visible in the \fB\-\-syms\fR +output. +.IP "\fB\-\-start\-address=\fR\fIaddress\fR" 4 +.IX Item "--start-address=address" +Start displaying data at the specified address. This affects the output +of the \fB\-d\fR, \fB\-r\fR and \fB\-s\fR options. +.IP "\fB\-\-stop\-address=\fR\fIaddress\fR" 4 +.IX Item "--stop-address=address" +Stop displaying data at the specified address. This affects the output +of the \fB\-d\fR, \fB\-r\fR and \fB\-s\fR options. +.IP "\fB\-t\fR" 4 +.IX Item "-t" +.PD 0 +.IP "\fB\-\-syms\fR" 4 +.IX Item "--syms" +.PD +Print the symbol table entries of the file. +This is similar to the information provided by the \fBnm\fR program, +although the display format is different. The format of the output +depends upon the format of the file being dumped, but there are two main +types. One looks like this: +.Sp +.Vb 2 +\& [ 4](sec 3)(fl 0x00)(ty 0)(scl 3) (nx 1) 0x00000000 .bss +\& [ 6](sec 1)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x00000000 fred +.Ve +.Sp +where the number inside the square brackets is the number of the entry +in the symbol table, the \fIsec\fR number is the section number, the +\&\fIfl\fR value are the symbol's flag bits, the \fIty\fR number is the +symbol's type, the \fIscl\fR number is the symbol's storage class and +the \fInx\fR value is the number of auxilary entries associated with +the symbol. The last two fields are the symbol's value and its name. +.Sp +The other common output format, usually seen with \s-1ELF\s0 based files, +looks like this: +.Sp +.Vb 2 +\& 00000000 l d .bss 00000000 .bss +\& 00000000 g .text 00000000 fred +.Ve +.Sp +Here the first number is the symbol's value (sometimes refered to as +its address). The next field is actually a set of characters and +spaces indicating the flag bits that are set on the symbol. These +characters are described below. Next is the section with which the +symbol is associated or \fI*ABS*\fR if the section is absolute (ie +not connected with any section), or \fI*UND*\fR if the section is +referenced in the file being dumped, but not defined there. +.Sp +After the section name comes another field, a number, which for common +symbols is the alignment and for other symbol is the size. Finally +the symbol's name is displayed. +.Sp +The flag characters are divided into 7 groups as follows: +.RS 4 +.ie n .IP """l""" 4 +.el .IP "\f(CWl\fR" 4 +.IX Item "l" +.PD 0 +.ie n .IP """g""" 4 +.el .IP "\f(CWg\fR" 4 +.IX Item "g" +.ie n .IP """u""" 4 +.el .IP "\f(CWu\fR" 4 +.IX Item "u" +.ie n .IP """!""" 4 +.el .IP "\f(CW!\fR" 4 +.IX Item "!" +.PD +The symbol is a local (l), global (g), unique global (u), neither +global nor local (a space) or both global and local (!). A +symbol can be neither local or global for a variety of reasons, e.g., +because it is used for debugging, but it is probably an indication of +a bug if it is ever both local and global. Unique global symbols are +a \s-1GNU\s0 extension to the standard set of \s-1ELF\s0 symbol bindings. For such +a symbol the dynamic linker will make sure that in the entire process +there is just one symbol with this name and type in use. +.ie n .IP """w""" 4 +.el .IP "\f(CWw\fR" 4 +.IX Item "w" +The symbol is weak (w) or strong (a space). +.ie n .IP """C""" 4 +.el .IP "\f(CWC\fR" 4 +.IX Item "C" +The symbol denotes a constructor (C) or an ordinary symbol (a space). +.ie n .IP """W""" 4 +.el .IP "\f(CWW\fR" 4 +.IX Item "W" +The symbol is a warning (W) or a normal symbol (a space). A warning +symbol's name is a message to be displayed if the symbol following the +warning symbol is ever referenced. +.ie n .IP """I""" 4 +.el .IP "\f(CWI\fR" 4 +.IX Item "I" +.PD 0 +.ie n .IP """i""" 4 +.el .IP "\f(CWi\fR" 4 +.IX Item "i" +.PD +The symbol is an indirect reference to another symbol (I), a function +to be evaluated during reloc processing (i) or a normal symbol (a +space). +.ie n .IP """d""" 4 +.el .IP "\f(CWd\fR" 4 +.IX Item "d" +.PD 0 +.ie n .IP """D""" 4 +.el .IP "\f(CWD\fR" 4 +.IX Item "D" +.PD +The symbol is a debugging symbol (d) or a dynamic symbol (D) or a +normal symbol (a space). +.ie n .IP """F""" 4 +.el .IP "\f(CWF\fR" 4 +.IX Item "F" +.PD 0 +.ie n .IP """f""" 4 +.el .IP "\f(CWf\fR" 4 +.IX Item "f" +.ie n .IP """O""" 4 +.el .IP "\f(CWO\fR" 4 +.IX Item "O" +.PD +The symbol is the name of a function (F) or a file (f) or an object +(O) or just a normal symbol (a space). +.RE +.RS 4 +.RE +.IP "\fB\-T\fR" 4 +.IX Item "-T" +.PD 0 +.IP "\fB\-\-dynamic\-syms\fR" 4 +.IX Item "--dynamic-syms" +.PD +Print the dynamic symbol table entries of the file. This is only +meaningful for dynamic objects, such as certain types of shared +libraries. This is similar to the information provided by the \fBnm\fR +program when given the \fB\-D\fR (\fB\-\-dynamic\fR) option. +.IP "\fB\-\-special\-syms\fR" 4 +.IX Item "--special-syms" +When displaying symbols include those which the target considers to be +special in some way and which would not normally be of interest to the +user. +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Print the version number of \fBobjdump\fR and exit. +.IP "\fB\-x\fR" 4 +.IX Item "-x" +.PD 0 +.IP "\fB\-\-all\-headers\fR" 4 +.IX Item "--all-headers" +.PD +Display all available header information, including the symbol table and +relocation entries. Using \fB\-x\fR is equivalent to specifying all of +\&\fB\-a \-f \-h \-p \-r \-t\fR. +.IP "\fB\-w\fR" 4 +.IX Item "-w" +.PD 0 +.IP "\fB\-\-wide\fR" 4 +.IX Item "--wide" +.PD +Format some lines for output devices that have more than 80 columns. +Also do not truncate symbol names when they are displayed. +.IP "\fB\-z\fR" 4 +.IX Item "-z" +.PD 0 +.IP "\fB\-\-disassemble\-zeroes\fR" 4 +.IX Item "--disassemble-zeroes" +.PD +Normally the disassembly output will skip blocks of zeroes. This +option directs the disassembler to disassemble those blocks, just like +any other data. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fInm\fR\|(1), \fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/ranlib.1 b/binutils/doc/ranlib.1 new file mode 100644 index 0000000..b99513f --- /dev/null +++ b/binutils/doc/ranlib.1 @@ -0,0 +1,192 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "RANLIB 1" +.TH RANLIB 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +ranlib \- generate index to archive. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +ranlib [\fB\-vVt\fR] \fIarchive\fR +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\fBranlib\fR generates an index to the contents of an archive and +stores it in the archive. The index lists each symbol defined by a +member of an archive that is a relocatable object file. +.PP +You may use \fBnm \-s\fR or \fBnm \-\-print\-armap\fR to list this index. +.PP +An archive with such an index speeds up linking to the library and +allows routines in the library to call each other without regard to +their placement in the archive. +.PP +The \s-1GNU\s0 \fBranlib\fR program is another form of \s-1GNU\s0 \fBar\fR; running +\&\fBranlib\fR is completely equivalent to executing \fBar \-s\fR. +.SH "OPTIONS" +.IX Header "OPTIONS" +.IP "\fB\-v\fR" 4 +.IX Item "-v" +.PD 0 +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Show the version number of \fBranlib\fR. +.IP "\fB\-t\fR" 4 +.IX Item "-t" +Update the timestamp of the symbol map of an archive. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fIar\fR\|(1), \fInm\fR\|(1), and the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/readelf.1 b/binutils/doc/readelf.1 new file mode 100644 index 0000000..cd051ed --- /dev/null +++ b/binutils/doc/readelf.1 @@ -0,0 +1,450 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "READELF 1" +.TH READELF 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +readelf \- Displays information about ELF files. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +readelf [\fB\-a\fR|\fB\-\-all\fR] + [\fB\-h\fR|\fB\-\-file\-header\fR] + [\fB\-l\fR|\fB\-\-program\-headers\fR|\fB\-\-segments\fR] + [\fB\-S\fR|\fB\-\-section\-headers\fR|\fB\-\-sections\fR] + [\fB\-g\fR|\fB\-\-section\-groups\fR] + [\fB\-t\fR|\fB\-\-section\-details\fR] + [\fB\-e\fR|\fB\-\-headers\fR] + [\fB\-s\fR|\fB\-\-syms\fR|\fB\-\-symbols\fR] + [\fB\-\-dyn\-syms\fR] + [\fB\-n\fR|\fB\-\-notes\fR] + [\fB\-r\fR|\fB\-\-relocs\fR] + [\fB\-u\fR|\fB\-\-unwind\fR] + [\fB\-d\fR|\fB\-\-dynamic\fR] + [\fB\-V\fR|\fB\-\-version\-info\fR] + [\fB\-A\fR|\fB\-\-arch\-specific\fR] + [\fB\-D\fR|\fB\-\-use\-dynamic\fR] + [\fB\-x\fR |\fB\-\-hex\-dump=\fR] + [\fB\-p\fR |\fB\-\-string\-dump=\fR] + [\fB\-R\fR |\fB\-\-relocated\-dump=\fR] + [\fB\-c\fR|\fB\-\-archive\-index\fR] + [\fB\-w[lLiaprmfFsoRt]\fR| + \fB\-\-debug\-dump\fR[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]] + [\fB\-\-dwarf\-depth=\fR\fIn\fR] + [\fB\-\-dwarf\-start=\fR\fIn\fR] + [\fB\-I\fR|\fB\-\-histogram\fR] + [\fB\-v\fR|\fB\-\-version\fR] + [\fB\-W\fR|\fB\-\-wide\fR] + [\fB\-H\fR|\fB\-\-help\fR] + \fIelffile\fR... +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\fBreadelf\fR displays information about one or more \s-1ELF\s0 format object +files. The options control what particular information to display. +.PP +\&\fIelffile\fR... are the object files to be examined. 32\-bit and +64\-bit \s-1ELF\s0 files are supported, as are archives containing \s-1ELF\s0 files. +.PP +This program performs a similar function to \fBobjdump\fR but it +goes into more detail and it exists independently of the \s-1BFD\s0 +library, so if there is a bug in \s-1BFD\s0 then readelf will not be +affected. +.SH "OPTIONS" +.IX Header "OPTIONS" +The long and short forms of options, shown here as alternatives, are +equivalent. At least one option besides \fB\-v\fR or \fB\-H\fR must be +given. +.IP "\fB\-a\fR" 4 +.IX Item "-a" +.PD 0 +.IP "\fB\-\-all\fR" 4 +.IX Item "--all" +.PD +Equivalent to specifying \fB\-\-file\-header\fR, +\&\fB\-\-program\-headers\fR, \fB\-\-sections\fR, \fB\-\-symbols\fR, +\&\fB\-\-relocs\fR, \fB\-\-dynamic\fR, \fB\-\-notes\fR and +\&\fB\-\-version\-info\fR. +.IP "\fB\-h\fR" 4 +.IX Item "-h" +.PD 0 +.IP "\fB\-\-file\-header\fR" 4 +.IX Item "--file-header" +.PD +Displays the information contained in the \s-1ELF\s0 header at the start of the +file. +.IP "\fB\-l\fR" 4 +.IX Item "-l" +.PD 0 +.IP "\fB\-\-program\-headers\fR" 4 +.IX Item "--program-headers" +.IP "\fB\-\-segments\fR" 4 +.IX Item "--segments" +.PD +Displays the information contained in the file's segment headers, if it +has any. +.IP "\fB\-S\fR" 4 +.IX Item "-S" +.PD 0 +.IP "\fB\-\-sections\fR" 4 +.IX Item "--sections" +.IP "\fB\-\-section\-headers\fR" 4 +.IX Item "--section-headers" +.PD +Displays the information contained in the file's section headers, if it +has any. +.IP "\fB\-g\fR" 4 +.IX Item "-g" +.PD 0 +.IP "\fB\-\-section\-groups\fR" 4 +.IX Item "--section-groups" +.PD +Displays the information contained in the file's section groups, if it +has any. +.IP "\fB\-t\fR" 4 +.IX Item "-t" +.PD 0 +.IP "\fB\-\-section\-details\fR" 4 +.IX Item "--section-details" +.PD +Displays the detailed section information. Implies \fB\-S\fR. +.IP "\fB\-s\fR" 4 +.IX Item "-s" +.PD 0 +.IP "\fB\-\-symbols\fR" 4 +.IX Item "--symbols" +.IP "\fB\-\-syms\fR" 4 +.IX Item "--syms" +.PD +Displays the entries in symbol table section of the file, if it has one. +.IP "\fB\-\-dyn\-syms\fR" 4 +.IX Item "--dyn-syms" +Displays the entries in dynamic symbol table section of the file, if it +has one. +.IP "\fB\-e\fR" 4 +.IX Item "-e" +.PD 0 +.IP "\fB\-\-headers\fR" 4 +.IX Item "--headers" +.PD +Display all the headers in the file. Equivalent to \fB\-h \-l \-S\fR. +.IP "\fB\-n\fR" 4 +.IX Item "-n" +.PD 0 +.IP "\fB\-\-notes\fR" 4 +.IX Item "--notes" +.PD +Displays the contents of the \s-1NOTE\s0 segments and/or sections, if any. +.IP "\fB\-r\fR" 4 +.IX Item "-r" +.PD 0 +.IP "\fB\-\-relocs\fR" 4 +.IX Item "--relocs" +.PD +Displays the contents of the file's relocation section, if it has one. +.IP "\fB\-u\fR" 4 +.IX Item "-u" +.PD 0 +.IP "\fB\-\-unwind\fR" 4 +.IX Item "--unwind" +.PD +Displays the contents of the file's unwind section, if it has one. Only +the unwind sections for \s-1IA64\s0 \s-1ELF\s0 files, as well as \s-1ARM\s0 unwind tables +(\f(CW\*(C`.ARM.exidx\*(C'\fR / \f(CW\*(C`.ARM.extab\*(C'\fR) are currently supported. +.IP "\fB\-d\fR" 4 +.IX Item "-d" +.PD 0 +.IP "\fB\-\-dynamic\fR" 4 +.IX Item "--dynamic" +.PD +Displays the contents of the file's dynamic section, if it has one. +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.PD 0 +.IP "\fB\-\-version\-info\fR" 4 +.IX Item "--version-info" +.PD +Displays the contents of the version sections in the file, it they +exist. +.IP "\fB\-A\fR" 4 +.IX Item "-A" +.PD 0 +.IP "\fB\-\-arch\-specific\fR" 4 +.IX Item "--arch-specific" +.PD +Displays architecture-specific information in the file, if there +is any. +.IP "\fB\-D\fR" 4 +.IX Item "-D" +.PD 0 +.IP "\fB\-\-use\-dynamic\fR" 4 +.IX Item "--use-dynamic" +.PD +When displaying symbols, this option makes \fBreadelf\fR use the +symbol hash tables in the file's dynamic section, rather than the +symbol table sections. +.IP "\fB\-x \fR" 4 +.IX Item "-x " +.PD 0 +.IP "\fB\-\-hex\-dump=\fR" 4 +.IX Item "--hex-dump=" +.PD +Displays the contents of the indicated section as a hexadecimal bytes. +A number identifies a particular section by index in the section table; +any other string identifies all sections with that name in the object file. +.IP "\fB\-R \fR" 4 +.IX Item "-R " +.PD 0 +.IP "\fB\-\-relocated\-dump=\fR" 4 +.IX Item "--relocated-dump=" +.PD +Displays the contents of the indicated section as a hexadecimal +bytes. A number identifies a particular section by index in the +section table; any other string identifies all sections with that name +in the object file. The contents of the section will be relocated +before they are displayed. +.IP "\fB\-p \fR" 4 +.IX Item "-p " +.PD 0 +.IP "\fB\-\-string\-dump=\fR" 4 +.IX Item "--string-dump=" +.PD +Displays the contents of the indicated section as printable strings. +A number identifies a particular section by index in the section table; +any other string identifies all sections with that name in the object file. +.IP "\fB\-c\fR" 4 +.IX Item "-c" +.PD 0 +.IP "\fB\-\-archive\-index\fR" 4 +.IX Item "--archive-index" +.PD +Displays the file symbol index infomation contained in the header part +of binary archives. Performs the same function as the \fBt\fR +command to \fBar\fR, but without using the \s-1BFD\s0 library. +.IP "\fB\-w[lLiaprmfFsoRt]\fR" 4 +.IX Item "-w[lLiaprmfFsoRt]" +.PD 0 +.IP "\fB\-\-debug\-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]\fR" 4 +.IX Item "--debug-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]" +.PD +Displays the contents of the debug sections in the file, if any are +present. If one of the optional letters or words follows the switch +then only data found in those specific sections will be dumped. +.Sp +Note that there is no single letter option to display the content of +trace sections or .gdb_index. +.Sp +Note: the \fB=decodedline\fR option will display the interpreted +contents of a .debug_line section whereas the \fB=rawline\fR option +dumps the contents in a raw format. +.Sp +Note: the \fB=frames\-interp\fR option will display the interpreted +contents of a .debug_frame section whereas the \fB=frames\fR option +dumps the contents in a raw format. +.Sp +Note: the output from the \fB=info\fR option can also be affected +by the options \fB\-\-dwarf\-depth\fR and \fB\-\-dwarf\-start\fR. +.IP "\fB\-\-dwarf\-depth=\fR\fIn\fR" 4 +.IX Item "--dwarf-depth=n" +Limit the dump of the \f(CW\*(C`.debug_info\*(C'\fR section to \fIn\fR children. +This is only useful with \fB\-\-debug\-dump=info\fR. The default is +to print all DIEs; the special value 0 for \fIn\fR will also have this +effect. +.Sp +With a non-zero value for \fIn\fR, DIEs at or deeper than \fIn\fR +levels will not be printed. The range for \fIn\fR is zero-based. +.IP "\fB\-\-dwarf\-start=\fR\fIn\fR" 4 +.IX Item "--dwarf-start=n" +Print only DIEs beginning with the \s-1DIE\s0 numbered \fIn\fR. This is only +useful with \fB\-\-debug\-dump=info\fR. +.Sp +If specified, this option will suppress printing of any header +information and all DIEs before the \s-1DIE\s0 numbered \fIn\fR. Only +siblings and children of the specified \s-1DIE\s0 will be printed. +.Sp +This can be used in conjunction with \fB\-\-dwarf\-depth\fR. +.IP "\fB\-I\fR" 4 +.IX Item "-I" +.PD 0 +.IP "\fB\-\-histogram\fR" 4 +.IX Item "--histogram" +.PD +Display a histogram of bucket list lengths when displaying the contents +of the symbol tables. +.IP "\fB\-v\fR" 4 +.IX Item "-v" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Display the version number of readelf. +.IP "\fB\-W\fR" 4 +.IX Item "-W" +.PD 0 +.IP "\fB\-\-wide\fR" 4 +.IX Item "--wide" +.PD +Don't break output lines to fit into 80 columns. By default +\&\fBreadelf\fR breaks section header and segment listing lines for +64\-bit \s-1ELF\s0 files, so that they fit into 80 columns. This option causes +\&\fBreadelf\fR to print each section header resp. each segment one a +single line, which is far more readable on terminals wider than 80 columns. +.IP "\fB\-H\fR" 4 +.IX Item "-H" +.PD 0 +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +.PD +Display the command line options understood by \fBreadelf\fR. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fIobjdump\fR\|(1), and the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/size.1 b/binutils/doc/size.1 new file mode 100644 index 0000000..79e112f --- /dev/null +++ b/binutils/doc/size.1 @@ -0,0 +1,268 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "SIZE 1" +.TH SIZE 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +size \- list section sizes and total size. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +size [\fB\-A\fR|\fB\-B\fR|\fB\-\-format=\fR\fIcompatibility\fR] + [\fB\-\-help\fR] + [\fB\-d\fR|\fB\-o\fR|\fB\-x\fR|\fB\-\-radix=\fR\fInumber\fR] + [\fB\-\-common\fR] + [\fB\-t\fR|\fB\-\-totals\fR] + [\fB\-\-target=\fR\fIbfdname\fR] [\fB\-V\fR|\fB\-\-version\fR] + [\fIobjfile\fR...] +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +The \s-1GNU\s0 \fBsize\fR utility lists the section sizes\-\-\-and the total +size\-\-\-for each of the object or archive files \fIobjfile\fR in its +argument list. By default, one line of output is generated for each +object file or each module in an archive. +.PP +\&\fIobjfile\fR... are the object files to be examined. +If none are specified, the file \f(CW\*(C`a.out\*(C'\fR will be used. +.SH "OPTIONS" +.IX Header "OPTIONS" +The command line options have the following meanings: +.IP "\fB\-A\fR" 4 +.IX Item "-A" +.PD 0 +.IP "\fB\-B\fR" 4 +.IX Item "-B" +.IP "\fB\-\-format=\fR\fIcompatibility\fR" 4 +.IX Item "--format=compatibility" +.PD +Using one of these options, you can choose whether the output from \s-1GNU\s0 +\&\fBsize\fR resembles output from System V \fBsize\fR (using \fB\-A\fR, +or \fB\-\-format=sysv\fR), or Berkeley \fBsize\fR (using \fB\-B\fR, or +\&\fB\-\-format=berkeley\fR). The default is the one-line format similar to +Berkeley's. +.Sp +Here is an example of the Berkeley (default) format of output from +\&\fBsize\fR: +.Sp +.Vb 4 +\& $ size \-\-format=Berkeley ranlib size +\& text data bss dec hex filename +\& 294880 81920 11592 388392 5ed28 ranlib +\& 294880 81920 11888 388688 5ee50 size +.Ve +.Sp +This is the same data, but displayed closer to System V conventions: +.Sp +.Vb 7 +\& $ size \-\-format=SysV ranlib size +\& ranlib : +\& section size addr +\& .text 294880 8192 +\& .data 81920 303104 +\& .bss 11592 385024 +\& Total 388392 +\& +\& +\& size : +\& section size addr +\& .text 294880 8192 +\& .data 81920 303104 +\& .bss 11888 385024 +\& Total 388688 +.Ve +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +Show a summary of acceptable arguments and options. +.IP "\fB\-d\fR" 4 +.IX Item "-d" +.PD 0 +.IP "\fB\-o\fR" 4 +.IX Item "-o" +.IP "\fB\-x\fR" 4 +.IX Item "-x" +.IP "\fB\-\-radix=\fR\fInumber\fR" 4 +.IX Item "--radix=number" +.PD +Using one of these options, you can control whether the size of each +section is given in decimal (\fB\-d\fR, or \fB\-\-radix=10\fR); octal +(\fB\-o\fR, or \fB\-\-radix=8\fR); or hexadecimal (\fB\-x\fR, or +\&\fB\-\-radix=16\fR). In \fB\-\-radix=\fR\fInumber\fR, only the three +values (8, 10, 16) are supported. The total size is always given in two +radices; decimal and hexadecimal for \fB\-d\fR or \fB\-x\fR output, or +octal and hexadecimal if you're using \fB\-o\fR. +.IP "\fB\-\-common\fR" 4 +.IX Item "--common" +Print total size of common symbols in each file. When using Berkeley +format these are included in the bss size. +.IP "\fB\-t\fR" 4 +.IX Item "-t" +.PD 0 +.IP "\fB\-\-totals\fR" 4 +.IX Item "--totals" +.PD +Show totals of all objects listed (Berkeley format listing mode only). +.IP "\fB\-\-target=\fR\fIbfdname\fR" 4 +.IX Item "--target=bfdname" +Specify that the object-code format for \fIobjfile\fR is +\&\fIbfdname\fR. This option may not be necessary; \fBsize\fR can +automatically recognize many formats. +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Display the version number of \fBsize\fR. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fIar\fR\|(1), \fIobjdump\fR\|(1), \fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/strings.1 b/binutils/doc/strings.1 new file mode 100644 index 0000000..02b0121 --- /dev/null +++ b/binutils/doc/strings.1 @@ -0,0 +1,257 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "STRINGS 1" +.TH STRINGS 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +strings \- print the strings of printable characters in files. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +strings [\fB\-afovV\fR] [\fB\-\fR\fImin-len\fR] + [\fB\-n\fR \fImin-len\fR] [\fB\-\-bytes=\fR\fImin-len\fR] + [\fB\-t\fR \fIradix\fR] [\fB\-\-radix=\fR\fIradix\fR] + [\fB\-e\fR \fIencoding\fR] [\fB\-\-encoding=\fR\fIencoding\fR] + [\fB\-\fR] [\fB\-\-all\fR] [\fB\-\-print\-file\-name\fR] + [\fB\-T\fR \fIbfdname\fR] [\fB\-\-target=\fR\fIbfdname\fR] + [\fB\-\-help\fR] [\fB\-\-version\fR] \fIfile\fR... +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +For each \fIfile\fR given, \s-1GNU\s0 \fBstrings\fR prints the printable +character sequences that are at least 4 characters long (or the number +given with the options below) and are followed by an unprintable +character. By default, it only prints the strings from the initialized +and loaded sections of object files; for other types of files, it prints +the strings from the whole file. +.PP +\&\fBstrings\fR is mainly useful for determining the contents of non-text +files. +.SH "OPTIONS" +.IX Header "OPTIONS" +.IP "\fB\-a\fR" 4 +.IX Item "-a" +.PD 0 +.IP "\fB\-\-all\fR" 4 +.IX Item "--all" +.IP "\fB\-\fR" 4 +.IX Item "-" +.PD +Do not scan only the initialized and loaded sections of object files; +scan the whole files. +.IP "\fB\-f\fR" 4 +.IX Item "-f" +.PD 0 +.IP "\fB\-\-print\-file\-name\fR" 4 +.IX Item "--print-file-name" +.PD +Print the name of the file before each string. +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +Print a summary of the program usage on the standard output and exit. +.IP "\fB\-\fR\fImin-len\fR" 4 +.IX Item "-min-len" +.PD 0 +.IP "\fB\-n\fR \fImin-len\fR" 4 +.IX Item "-n min-len" +.IP "\fB\-\-bytes=\fR\fImin-len\fR" 4 +.IX Item "--bytes=min-len" +.PD +Print sequences of characters that are at least \fImin-len\fR characters +long, instead of the default 4. +.IP "\fB\-o\fR" 4 +.IX Item "-o" +Like \fB\-t o\fR. Some other versions of \fBstrings\fR have \fB\-o\fR +act like \fB\-t d\fR instead. Since we can not be compatible with both +ways, we simply chose one. +.IP "\fB\-t\fR \fIradix\fR" 4 +.IX Item "-t radix" +.PD 0 +.IP "\fB\-\-radix=\fR\fIradix\fR" 4 +.IX Item "--radix=radix" +.PD +Print the offset within the file before each string. The single +character argument specifies the radix of the offset\-\-\-\fBo\fR for +octal, \fBx\fR for hexadecimal, or \fBd\fR for decimal. +.IP "\fB\-e\fR \fIencoding\fR" 4 +.IX Item "-e encoding" +.PD 0 +.IP "\fB\-\-encoding=\fR\fIencoding\fR" 4 +.IX Item "--encoding=encoding" +.PD +Select the character encoding of the strings that are to be found. +Possible values for \fIencoding\fR are: \fBs\fR = single\-7\-bit\-byte +characters (\s-1ASCII\s0, \s-1ISO\s0 8859, etc., default), \fBS\fR = +single\-8\-bit\-byte characters, \fBb\fR = 16\-bit bigendian, \fBl\fR = +16\-bit littleendian, \fBB\fR = 32\-bit bigendian, \fBL\fR = 32\-bit +littleendian. Useful for finding wide character strings. (\fBl\fR +and \fBb\fR apply to, for example, Unicode \s-1UTF\-16/UCS\-2\s0 encodings). +.IP "\fB\-T\fR \fIbfdname\fR" 4 +.IX Item "-T bfdname" +.PD 0 +.IP "\fB\-\-target=\fR\fIbfdname\fR" 4 +.IX Item "--target=bfdname" +.PD +Specify an object code format other than your system's default format. +.IP "\fB\-v\fR" 4 +.IX Item "-v" +.PD 0 +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Print the program version number on the standard output and exit. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fIar\fR\|(1), \fInm\fR\|(1), \fIobjdump\fR\|(1), \fIranlib\fR\|(1), \fIreadelf\fR\|(1) +and the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/strip.1 b/binutils/doc/strip.1 new file mode 100644 index 0000000..9720925 --- /dev/null +++ b/binutils/doc/strip.1 @@ -0,0 +1,392 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "STRIP 1" +.TH STRIP 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +strip \- Discard symbols from object files. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +strip [\fB\-F\fR \fIbfdname\fR |\fB\-\-target=\fR\fIbfdname\fR] + [\fB\-I\fR \fIbfdname\fR |\fB\-\-input\-target=\fR\fIbfdname\fR] + [\fB\-O\fR \fIbfdname\fR |\fB\-\-output\-target=\fR\fIbfdname\fR] + [\fB\-s\fR|\fB\-\-strip\-all\fR] + [\fB\-S\fR|\fB\-g\fR|\fB\-d\fR|\fB\-\-strip\-debug\fR] + [\fB\-K\fR \fIsymbolname\fR |\fB\-\-keep\-symbol=\fR\fIsymbolname\fR] + [\fB\-N\fR \fIsymbolname\fR |\fB\-\-strip\-symbol=\fR\fIsymbolname\fR] + [\fB\-w\fR|\fB\-\-wildcard\fR] + [\fB\-x\fR|\fB\-\-discard\-all\fR] [\fB\-X\fR |\fB\-\-discard\-locals\fR] + [\fB\-R\fR \fIsectionname\fR |\fB\-\-remove\-section=\fR\fIsectionname\fR] + [\fB\-o\fR \fIfile\fR] [\fB\-p\fR|\fB\-\-preserve\-dates\fR] + [\fB\-\-keep\-file\-symbols\fR] + [\fB\-\-only\-keep\-debug\fR] + [\fB\-v\fR |\fB\-\-verbose\fR] [\fB\-V\fR|\fB\-\-version\fR] + [\fB\-\-help\fR] [\fB\-\-info\fR] + \fIobjfile\fR... +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\s-1GNU\s0 \fBstrip\fR discards all symbols from object files +\&\fIobjfile\fR. The list of object files may include archives. +At least one object file must be given. +.PP +\&\fBstrip\fR modifies the files named in its argument, +rather than writing modified copies under different names. +.SH "OPTIONS" +.IX Header "OPTIONS" +.IP "\fB\-F\fR \fIbfdname\fR" 4 +.IX Item "-F bfdname" +.PD 0 +.IP "\fB\-\-target=\fR\fIbfdname\fR" 4 +.IX Item "--target=bfdname" +.PD +Treat the original \fIobjfile\fR as a file with the object +code format \fIbfdname\fR, and rewrite it in the same format. +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +Show a summary of the options to \fBstrip\fR and exit. +.IP "\fB\-\-info\fR" 4 +.IX Item "--info" +Display a list showing all architectures and object formats available. +.IP "\fB\-I\fR \fIbfdname\fR" 4 +.IX Item "-I bfdname" +.PD 0 +.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4 +.IX Item "--input-target=bfdname" +.PD +Treat the original \fIobjfile\fR as a file with the object +code format \fIbfdname\fR. +.IP "\fB\-O\fR \fIbfdname\fR" 4 +.IX Item "-O bfdname" +.PD 0 +.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4 +.IX Item "--output-target=bfdname" +.PD +Replace \fIobjfile\fR with a file in the output format \fIbfdname\fR. +.IP "\fB\-R\fR \fIsectionname\fR" 4 +.IX Item "-R sectionname" +.PD 0 +.IP "\fB\-\-remove\-section=\fR\fIsectionname\fR" 4 +.IX Item "--remove-section=sectionname" +.PD +Remove any section named \fIsectionname\fR from the output file. This +option may be given more than once. Note that using this option +inappropriately may make the output file unusable. +.IP "\fB\-s\fR" 4 +.IX Item "-s" +.PD 0 +.IP "\fB\-\-strip\-all\fR" 4 +.IX Item "--strip-all" +.PD +Remove all symbols. +.IP "\fB\-g\fR" 4 +.IX Item "-g" +.PD 0 +.IP "\fB\-S\fR" 4 +.IX Item "-S" +.IP "\fB\-d\fR" 4 +.IX Item "-d" +.IP "\fB\-\-strip\-debug\fR" 4 +.IX Item "--strip-debug" +.PD +Remove debugging symbols only. +.IP "\fB\-\-strip\-unneeded\fR" 4 +.IX Item "--strip-unneeded" +Remove all symbols that are not needed for relocation processing. +.IP "\fB\-K\fR \fIsymbolname\fR" 4 +.IX Item "-K symbolname" +.PD 0 +.IP "\fB\-\-keep\-symbol=\fR\fIsymbolname\fR" 4 +.IX Item "--keep-symbol=symbolname" +.PD +When stripping symbols, keep symbol \fIsymbolname\fR even if it would +normally be stripped. This option may be given more than once. +.IP "\fB\-N\fR \fIsymbolname\fR" 4 +.IX Item "-N symbolname" +.PD 0 +.IP "\fB\-\-strip\-symbol=\fR\fIsymbolname\fR" 4 +.IX Item "--strip-symbol=symbolname" +.PD +Remove symbol \fIsymbolname\fR from the source file. This option may be +given more than once, and may be combined with strip options other than +\&\fB\-K\fR. +.IP "\fB\-o\fR \fIfile\fR" 4 +.IX Item "-o file" +Put the stripped output in \fIfile\fR, rather than replacing the +existing file. When this argument is used, only one \fIobjfile\fR +argument may be specified. +.IP "\fB\-p\fR" 4 +.IX Item "-p" +.PD 0 +.IP "\fB\-\-preserve\-dates\fR" 4 +.IX Item "--preserve-dates" +.PD +Preserve the access and modification dates of the file. +.IP "\fB\-w\fR" 4 +.IX Item "-w" +.PD 0 +.IP "\fB\-\-wildcard\fR" 4 +.IX Item "--wildcard" +.PD +Permit regular expressions in \fIsymbolname\fRs used in other command +line options. The question mark (?), asterisk (*), backslash (\e) and +square brackets ([]) operators can be used anywhere in the symbol +name. If the first character of the symbol name is the exclamation +point (!) then the sense of the switch is reversed for that symbol. +For example: +.Sp +.Vb 1 +\& \-w \-K !foo \-K fo* +.Ve +.Sp +would cause strip to only keep symbols that start with the letters +\&\*(L"fo\*(R", but to discard the symbol \*(L"foo\*(R". +.IP "\fB\-x\fR" 4 +.IX Item "-x" +.PD 0 +.IP "\fB\-\-discard\-all\fR" 4 +.IX Item "--discard-all" +.PD +Remove non-global symbols. +.IP "\fB\-X\fR" 4 +.IX Item "-X" +.PD 0 +.IP "\fB\-\-discard\-locals\fR" 4 +.IX Item "--discard-locals" +.PD +Remove compiler-generated local symbols. +(These usually start with \fBL\fR or \fB.\fR.) +.IP "\fB\-\-keep\-file\-symbols\fR" 4 +.IX Item "--keep-file-symbols" +When stripping a file, perhaps with \fB\-\-strip\-debug\fR or +\&\fB\-\-strip\-unneeded\fR, retain any symbols specifying source file names, +which would otherwise get stripped. +.IP "\fB\-\-only\-keep\-debug\fR" 4 +.IX Item "--only-keep-debug" +Strip a file, removing contents of any sections that would not be +stripped by \fB\-\-strip\-debug\fR and leaving the debugging sections +intact. In \s-1ELF\s0 files, this preserves all note sections in the output. +.Sp +The intention is that this option will be used in conjunction with +\&\fB\-\-add\-gnu\-debuglink\fR to create a two part executable. One a +stripped binary which will occupy less space in \s-1RAM\s0 and in a +distribution and the second a debugging information file which is only +needed if debugging abilities are required. The suggested procedure +to create these files is as follows: +.RS 4 +.IP "1." 4 +.IX Item "1." +\&\f(CW\*(C`foo\*(C'\fR then... +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +create a file containing the debugging info. +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +stripped executable. +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +to add a link to the debugging info into the stripped executable. +.RE +.RS 4 +.Sp +Note\-\-\-the choice of \f(CW\*(C`.dbg\*(C'\fR as an extension for the debug info +file is arbitrary. Also the \f(CW\*(C`\-\-only\-keep\-debug\*(C'\fR step is +optional. You could instead do this: +.IP "1." 4 +.IX Item "1." +.PD 0 +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +.ie n .IP "1." 4 +.el .IP "1." 4 +.IX Item "1." +.RE +.RS 4 +.PD +.Sp +i.e., the file pointed to by the \fB\-\-add\-gnu\-debuglink\fR can be the +full executable. It does not have to be a file created by the +\&\fB\-\-only\-keep\-debug\fR switch. +.Sp +Note\-\-\-this switch is only intended for use on fully linked files. It +does not make sense to use it on object files where the debugging +information may be incomplete. Besides the gnu_debuglink feature +currently only supports the presence of one filename containing +debugging information, not multiple filenames on a one-per-object-file +basis. +.RE +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Show the version number for \fBstrip\fR. +.IP "\fB\-v\fR" 4 +.IX Item "-v" +.PD 0 +.IP "\fB\-\-verbose\fR" 4 +.IX Item "--verbose" +.PD +Verbose output: list all object files modified. In the case of +archives, \fBstrip \-v\fR lists all members of the archive. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/windmc.1 b/binutils/doc/windmc.1 new file mode 100644 index 0000000..2594315 --- /dev/null +++ b/binutils/doc/windmc.1 @@ -0,0 +1,353 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "WINDMC 1" +.TH WINDMC 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +windmc \- generates Windows message resources. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +windmc [options] input-file +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\fBwindmc\fR reads message definitions from an input file (.mc) and +translate them into a set of output files. The output files may be of +four kinds: +.ie n .IP """h""" 4 +.el .IP "\f(CWh\fR" 4 +.IX Item "h" +A C header file containing the message definitions. +.ie n .IP """rc""" 4 +.el .IP "\f(CWrc\fR" 4 +.IX Item "rc" +A resource file compilable by the \fBwindres\fR tool. +.ie n .IP """bin""" 4 +.el .IP "\f(CWbin\fR" 4 +.IX Item "bin" +One or more binary files containing the resource data for a specific +message language. +.ie n .IP """dbg""" 4 +.el .IP "\f(CWdbg\fR" 4 +.IX Item "dbg" +A C include file that maps message id's to their symbolic name. +.PP +The exact description of these different formats is available in +documentation from Microsoft. +.PP +When \fBwindmc\fR converts from the \f(CW\*(C`mc\*(C'\fR format to the \f(CW\*(C`bin\*(C'\fR +format, \f(CW\*(C`rc\*(C'\fR, \f(CW\*(C`h\*(C'\fR, and optional \f(CW\*(C`dbg\*(C'\fR it is acting like the +Windows Message Compiler. +.SH "OPTIONS" +.IX Header "OPTIONS" +.IP "\fB\-a\fR" 4 +.IX Item "-a" +.PD 0 +.IP "\fB\-\-ascii_in\fR" 4 +.IX Item "--ascii_in" +.PD +Specifies that the input file specified is \s-1ASCII\s0. This is the default +behaviour. +.IP "\fB\-A\fR" 4 +.IX Item "-A" +.PD 0 +.IP "\fB\-\-ascii_out\fR" 4 +.IX Item "--ascii_out" +.PD +Specifies that messages in the output \f(CW\*(C`bin\*(C'\fR files should be in \s-1ASCII\s0 +format. +.IP "\fB\-b\fR" 4 +.IX Item "-b" +.PD 0 +.IP "\fB\-\-binprefix\fR" 4 +.IX Item "--binprefix" +.PD +Specifies that \f(CW\*(C`bin\*(C'\fR filenames should have to be prefixed by the +basename of the source file. +.IP "\fB\-c\fR" 4 +.IX Item "-c" +.PD 0 +.IP "\fB\-\-customflag\fR" 4 +.IX Item "--customflag" +.PD +Sets the customer bit in all message id's. +.IP "\fB\-C\fR \fIcodepage\fR" 4 +.IX Item "-C codepage" +.PD 0 +.IP "\fB\-\-codepage_in\fR \fIcodepage\fR" 4 +.IX Item "--codepage_in codepage" +.PD +Sets the default codepage to be used to convert input file to \s-1UTF16\s0. The +default is ocdepage 1252. +.IP "\fB\-d\fR" 4 +.IX Item "-d" +.PD 0 +.IP "\fB\-\-decimal_values\fR" 4 +.IX Item "--decimal_values" +.PD +Outputs the constants in the header file in decimal. Default is using +hexadecimal output. +.IP "\fB\-e\fR \fIext\fR" 4 +.IX Item "-e ext" +.PD 0 +.IP "\fB\-\-extension\fR \fIext\fR" 4 +.IX Item "--extension ext" +.PD +The extension for the header file. The default is .h extension. +.IP "\fB\-F\fR \fItarget\fR" 4 +.IX Item "-F target" +.PD 0 +.IP "\fB\-\-target\fR \fItarget\fR" 4 +.IX Item "--target target" +.PD +Specify the \s-1BFD\s0 format to use for a bin file as output. This +is a \s-1BFD\s0 target name; you can use the \fB\-\-help\fR option to see a list +of supported targets. Normally \fBwindmc\fR will use the default +format, which is the first one listed by the \fB\-\-help\fR option. +.IP "\fB\-h\fR \fIpath\fR" 4 +.IX Item "-h path" +.PD 0 +.IP "\fB\-\-headerdir\fR \fIpath\fR" 4 +.IX Item "--headerdir path" +.PD +The target directory of the generated header file. The default is the +current directory. +.IP "\fB\-H\fR" 4 +.IX Item "-H" +.PD 0 +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +.PD +Displays a list of command line options and then exits. +.IP "\fB\-m\fR \fIcharacters\fR" 4 +.IX Item "-m characters" +.PD 0 +.IP "\fB\-\-maxlength\fR \fIcharacters\fR" 4 +.IX Item "--maxlength characters" +.PD +Instructs \fBwindmc\fR to generate a warning if the length +of any message exceeds the number specified. +.IP "\fB\-n\fR" 4 +.IX Item "-n" +.PD 0 +.IP "\fB\-\-nullterminate\fR" 4 +.IX Item "--nullterminate" +.PD +Terminate message text in \f(CW\*(C`bin\*(C'\fR files by zero. By default they are +terminated by \s-1CR/LF\s0. +.IP "\fB\-o\fR" 4 +.IX Item "-o" +.PD 0 +.IP "\fB\-\-hresult_use\fR" 4 +.IX Item "--hresult_use" +.PD +Not yet implemented. Instructs \f(CW\*(C`windmc\*(C'\fR to generate an \s-1OLE2\s0 header +file, using \s-1HRESULT\s0 definitions. Status codes are used if the flag is not +specified. +.IP "\fB\-O\fR \fIcodepage\fR" 4 +.IX Item "-O codepage" +.PD 0 +.IP "\fB\-\-codepage_out\fR \fIcodepage\fR" 4 +.IX Item "--codepage_out codepage" +.PD +Sets the default codepage to be used to output text files. The default +is ocdepage 1252. +.IP "\fB\-r\fR \fIpath\fR" 4 +.IX Item "-r path" +.PD 0 +.IP "\fB\-\-rcdir\fR \fIpath\fR" 4 +.IX Item "--rcdir path" +.PD +The target directory for the generated \f(CW\*(C`rc\*(C'\fR script and the generated +\&\f(CW\*(C`bin\*(C'\fR files that the resource compiler script includes. The default +is the current directory. +.IP "\fB\-u\fR" 4 +.IX Item "-u" +.PD 0 +.IP "\fB\-\-unicode_in\fR" 4 +.IX Item "--unicode_in" +.PD +Specifies that the input file is \s-1UTF16\s0. +.IP "\fB\-U\fR" 4 +.IX Item "-U" +.PD 0 +.IP "\fB\-\-unicode_out\fR" 4 +.IX Item "--unicode_out" +.PD +Specifies that messages in the output \f(CW\*(C`bin\*(C'\fR file should be in \s-1UTF16\s0 +format. This is the default behaviour. +.IP "\fB\-v\fR" 4 +.IX Item "-v" +.PD 0 +.IP "\fB\-\-verbose\fR" 4 +.IX Item "--verbose" +.PD +Enable verbose mode. +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Prints the version number for \fBwindmc\fR. +.IP "\fB\-x\fR \fIpath\fR" 4 +.IX Item "-x path" +.PD 0 +.IP "\fB\-\-xdgb\fR \fIpath\fR" 4 +.IX Item "--xdgb path" +.PD +The path of the \f(CW\*(C`dbg\*(C'\fR C include file that maps message id's to the +symbolic name. No such file is generated without specifying the switch. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/doc/windres.1 b/binutils/doc/windres.1 new file mode 100644 index 0000000..b79d239 --- /dev/null +++ b/binutils/doc/windres.1 @@ -0,0 +1,361 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "WINDRES 1" +.TH WINDRES 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +windres \- manipulate Windows resources. +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +windres [options] [input\-file] [output\-file] +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\fBwindres\fR reads resources from an input file and copies them into +an output file. Either file may be in one of three formats: +.ie n .IP """rc""" 4 +.el .IP "\f(CWrc\fR" 4 +.IX Item "rc" +A text format read by the Resource Compiler. +.ie n .IP """res""" 4 +.el .IP "\f(CWres\fR" 4 +.IX Item "res" +A binary format generated by the Resource Compiler. +.ie n .IP """coff""" 4 +.el .IP "\f(CWcoff\fR" 4 +.IX Item "coff" +A \s-1COFF\s0 object or executable. +.PP +The exact description of these different formats is available in +documentation from Microsoft. +.PP +When \fBwindres\fR converts from the \f(CW\*(C`rc\*(C'\fR format to the \f(CW\*(C`res\*(C'\fR +format, it is acting like the Windows Resource Compiler. When +\&\fBwindres\fR converts from the \f(CW\*(C`res\*(C'\fR format to the \f(CW\*(C`coff\*(C'\fR +format, it is acting like the Windows \f(CW\*(C`CVTRES\*(C'\fR program. +.PP +When \fBwindres\fR generates an \f(CW\*(C`rc\*(C'\fR file, the output is similar +but not identical to the format expected for the input. When an input +\&\f(CW\*(C`rc\*(C'\fR file refers to an external filename, an output \f(CW\*(C`rc\*(C'\fR file +will instead include the file contents. +.PP +If the input or output format is not specified, \fBwindres\fR will +guess based on the file name, or, for the input file, the file contents. +A file with an extension of \fI.rc\fR will be treated as an \f(CW\*(C`rc\*(C'\fR +file, a file with an extension of \fI.res\fR will be treated as a +\&\f(CW\*(C`res\*(C'\fR file, and a file with an extension of \fI.o\fR or +\&\fI.exe\fR will be treated as a \f(CW\*(C`coff\*(C'\fR file. +.PP +If no output file is specified, \fBwindres\fR will print the resources +in \f(CW\*(C`rc\*(C'\fR format to standard output. +.PP +The normal use is for you to write an \f(CW\*(C`rc\*(C'\fR file, use \fBwindres\fR +to convert it to a \s-1COFF\s0 object file, and then link the \s-1COFF\s0 file into +your application. This will make the resources described in the +\&\f(CW\*(C`rc\*(C'\fR file available to Windows. +.SH "OPTIONS" +.IX Header "OPTIONS" +.IP "\fB\-i\fR \fIfilename\fR" 4 +.IX Item "-i filename" +.PD 0 +.IP "\fB\-\-input\fR \fIfilename\fR" 4 +.IX Item "--input filename" +.PD +The name of the input file. If this option is not used, then +\&\fBwindres\fR will use the first non-option argument as the input file +name. If there are no non-option arguments, then \fBwindres\fR will +read from standard input. \fBwindres\fR can not read a \s-1COFF\s0 file from +standard input. +.IP "\fB\-o\fR \fIfilename\fR" 4 +.IX Item "-o filename" +.PD 0 +.IP "\fB\-\-output\fR \fIfilename\fR" 4 +.IX Item "--output filename" +.PD +The name of the output file. If this option is not used, then +\&\fBwindres\fR will use the first non-option argument, after any used +for the input file name, as the output file name. If there is no +non-option argument, then \fBwindres\fR will write to standard output. +\&\fBwindres\fR can not write a \s-1COFF\s0 file to standard output. Note, +for compatibility with \fBrc\fR the option \fB\-fo\fR is also +accepted, but its use is not recommended. +.IP "\fB\-J\fR \fIformat\fR" 4 +.IX Item "-J format" +.PD 0 +.IP "\fB\-\-input\-format\fR \fIformat\fR" 4 +.IX Item "--input-format format" +.PD +The input format to read. \fIformat\fR may be \fBres\fR, \fBrc\fR, or +\&\fBcoff\fR. If no input format is specified, \fBwindres\fR will +guess, as described above. +.IP "\fB\-O\fR \fIformat\fR" 4 +.IX Item "-O format" +.PD 0 +.IP "\fB\-\-output\-format\fR \fIformat\fR" 4 +.IX Item "--output-format format" +.PD +The output format to generate. \fIformat\fR may be \fBres\fR, +\&\fBrc\fR, or \fBcoff\fR. If no output format is specified, +\&\fBwindres\fR will guess, as described above. +.IP "\fB\-F\fR \fItarget\fR" 4 +.IX Item "-F target" +.PD 0 +.IP "\fB\-\-target\fR \fItarget\fR" 4 +.IX Item "--target target" +.PD +Specify the \s-1BFD\s0 format to use for a \s-1COFF\s0 file as input or output. This +is a \s-1BFD\s0 target name; you can use the \fB\-\-help\fR option to see a list +of supported targets. Normally \fBwindres\fR will use the default +format, which is the first one listed by the \fB\-\-help\fR option. +.IP "\fB\-\-preprocessor\fR \fIprogram\fR" 4 +.IX Item "--preprocessor program" +When \fBwindres\fR reads an \f(CW\*(C`rc\*(C'\fR file, it runs it through the C +preprocessor first. This option may be used to specify the preprocessor +to use, including any leading arguments. The default preprocessor +argument is \f(CW\*(C`gcc \-E \-xc\-header \-DRC_INVOKED\*(C'\fR. +.IP "\fB\-\-preprocessor\-arg\fR \fIoption\fR" 4 +.IX Item "--preprocessor-arg option" +When \fBwindres\fR reads an \f(CW\*(C`rc\*(C'\fR file, it runs it through +the C preprocessor first. This option may be used to specify additional +text to be passed to preprocessor on its command line. +This option can be used multiple times to add multiple options to the +preprocessor command line. +.IP "\fB\-I\fR \fIdirectory\fR" 4 +.IX Item "-I directory" +.PD 0 +.IP "\fB\-\-include\-dir\fR \fIdirectory\fR" 4 +.IX Item "--include-dir directory" +.PD +Specify an include directory to use when reading an \f(CW\*(C`rc\*(C'\fR file. +\&\fBwindres\fR will pass this to the preprocessor as an \fB\-I\fR +option. \fBwindres\fR will also search this directory when looking for +files named in the \f(CW\*(C`rc\*(C'\fR file. If the argument passed to this command +matches any of the supported \fIformats\fR (as described in the \fB\-J\fR +option), it will issue a deprecation warning, and behave just like the +\&\fB\-J\fR option. New programs should not use this behaviour. If a +directory happens to match a \fIformat\fR, simple prefix it with \fB./\fR +to disable the backward compatibility. +.IP "\fB\-D\fR \fItarget\fR" 4 +.IX Item "-D target" +.PD 0 +.IP "\fB\-\-define\fR \fIsym\fR\fB[=\fR\fIval\fR\fB]\fR" 4 +.IX Item "--define sym[=val]" +.PD +Specify a \fB\-D\fR option to pass to the preprocessor when reading an +\&\f(CW\*(C`rc\*(C'\fR file. +.IP "\fB\-U\fR \fItarget\fR" 4 +.IX Item "-U target" +.PD 0 +.IP "\fB\-\-undefine\fR \fIsym\fR" 4 +.IX Item "--undefine sym" +.PD +Specify a \fB\-U\fR option to pass to the preprocessor when reading an +\&\f(CW\*(C`rc\*(C'\fR file. +.IP "\fB\-r\fR" 4 +.IX Item "-r" +Ignored for compatibility with rc. +.IP "\fB\-v\fR" 4 +.IX Item "-v" +Enable verbose mode. This tells you what the preprocessor is if you +didn't specify one. +.IP "\fB\-c\fR \fIval\fR" 4 +.IX Item "-c val" +.PD 0 +.IP "\fB\-\-codepage\fR \fIval\fR" 4 +.IX Item "--codepage val" +.PD +Specify the default codepage to use when reading an \f(CW\*(C`rc\*(C'\fR file. +\&\fIval\fR should be a hexadecimal prefixed by \fB0x\fR or decimal +codepage code. The valid range is from zero up to 0xffff, but the +validity of the codepage is host and configuration dependent. +.IP "\fB\-l\fR \fIval\fR" 4 +.IX Item "-l val" +.PD 0 +.IP "\fB\-\-language\fR \fIval\fR" 4 +.IX Item "--language val" +.PD +Specify the default language to use when reading an \f(CW\*(C`rc\*(C'\fR file. +\&\fIval\fR should be a hexadecimal language code. The low eight bits are +the language, and the high eight bits are the sublanguage. +.IP "\fB\-\-use\-temp\-file\fR" 4 +.IX Item "--use-temp-file" +Use a temporary file to instead of using popen to read the output of +the preprocessor. Use this option if the popen implementation is buggy +on the host (eg., certain non-English language versions of Windows 95 and +Windows 98 are known to have buggy popen where the output will instead +go the console). +.IP "\fB\-\-no\-use\-temp\-file\fR" 4 +.IX Item "--no-use-temp-file" +Use popen, not a temporary file, to read the output of the preprocessor. +This is the default behaviour. +.IP "\fB\-h\fR" 4 +.IX Item "-h" +.PD 0 +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +.PD +Prints a usage summary. +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.PD +Prints the version number for \fBwindres\fR. +.IP "\fB\-\-yydebug\fR" 4 +.IX Item "--yydebug" +If \fBwindres\fR is compiled with \f(CW\*(C`YYDEBUG\*(C'\fR defined as \f(CW1\fR, +this will turn on parser debugging. +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +the Info entries for \fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/binutils/dwarf-mode.el b/binutils/dwarf-mode.el new file mode 100644 index 0000000..f95319d --- /dev/null +++ b/binutils/dwarf-mode.el @@ -0,0 +1,167 @@ +;;; dwarf-mode.el --- Browser for DWARF information. + +;; Version: 1.0 + +;; This file is not part of GNU Emacs, but is distributed under the +;; same terms: + +;; GNU Emacs is free software: you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation, either version 3 of the License, or +;; (at your option) any later version. + +;; GNU Emacs is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. + +;; You should have received a copy of the GNU General Public License +;; along with GNU Emacs. If not, see . + +;;; Code: + +(defvar dwarf-objdump-program "objdump") + +(defconst dwarf-font-lock-keywords + '( + ;; Name and linkage name. + ("DW_AT_[a-z_]*name\\s *: .*:\\(.*\\)\\s *$" + (1 font-lock-function-name-face)) + + ("Compilation Unit @ offset 0x[0-9a-f]+" + (0 font-lock-string-face)) + )) + +(defvar dwarf-file nil + "Buffer-local variable holding the file name passed to objdump.") + +;; Expand a "..." to show all the child DIES. NEW-DEPTH controls how +;; deep to display the new dies; `nil' means display all of them. +(defun dwarf-do-insert-substructure (new-depth die) + (let ((inhibit-read-only t)) + (beginning-of-line) + (delete-region (point) (progn + (end-of-line) + (forward-char) + (point))) + (save-excursion + (apply #'call-process dwarf-objdump-program nil (current-buffer) nil + "-Wi" (concat "--dwarf-start=0x" die) + (expand-file-name dwarf-file) + (if new-depth (list (concat "--dwarf-depth=" + (int-to-string new-depth)))))) + (set-buffer-modified-p nil))) + +(defun dwarf-insert-substructure-button (die) + (beginning-of-line) + (unless (looking-at "^ <\\([0-9]+\\)>") + (error "Unrecognized line.")) + (let ((new-depth (1+ (string-to-int (match-string 1))))) + (dwarf-do-insert-substructure new-depth die))) + +(defun dwarf-insert-substructure (arg) + "Expand a `...' to show children of the current DIE. +By default, expands just one level of children. +A prefix argument means expand all children." + (interactive "P") + (beginning-of-line) + (unless (looking-at "^ <\\([0-9]+\\)><\\([0-9a-f]+\\)>") + (error "Unrecognized line.")) + (let ((die (match-string 2))) + (if arg + (dwarf-do-insert-substructure nil die) + (dwarf-insert-substructure-button die)))) + +;; Called when a button is pressed. +;; Either follows a DIE reference, or expands a "...". +(defun dwarf-die-button-action (button) + (let* ((die (button-get button 'die)) + ;; Note that the first number can only be decimal. + (die-rx (concat "^\\s *\\(<[0-9]+>\\)?<" + die ">[^<]")) + (old (point)) + (is-ref (button-get button 'die-ref))) + (if is-ref + (progn + (goto-char (point-min)) + (if (re-search-forward die-rx nil 'move) + (push-mark old) + (goto-char old) + (error "Could not find DIE <0x%s>" die))) + (dwarf-insert-substructure-button die)))) + +;; Button definition. +(define-button-type 'dwarf-die-button + 'follow-link t + 'action #'dwarf-die-button-action) + +;; Helper regexp to match a DIE reference. +(defconst dwarf-die-reference ": \\(<0x\\([0-9a-f]+\\)>\\)\\s *$") + +;; Helper regexp to match a `...' indicating that there are hidden +;; children. +(defconst dwarf-die-more "^ <[0-9]+><\\([0-9a-z]+\\)>: \\([.][.][.]\\)") + +;; jit-lock callback function to fontify a region. This applies the +;; buttons, since AFAICT there is no good way to apply buttons via +;; font-lock. +(defun dwarf-fontify-region (start end) + (save-excursion + (let ((beg-line (progn (goto-char start) (line-beginning-position))) + (end-line (progn (goto-char end) (line-end-position)))) + (goto-char beg-line) + (while (re-search-forward dwarf-die-reference end-line 'move) + (let ((b-start (match-beginning 1)) + (b-end (match-end 1)) + (hex (match-string-no-properties 2))) + (make-text-button b-start b-end :type 'dwarf-die-button + 'die hex 'die-ref t))) + ;; This is a bogus approach. Why can't we make buttons from the + ;; font-lock defaults? + (goto-char beg-line) + (while (re-search-forward dwarf-die-more end-line 'move) + (let ((hex (match-string-no-properties 1)) + (b-start (match-beginning 2)) + (b-end (match-end 2))) + (make-text-button b-start b-end :type 'dwarf-die-button + 'die hex 'die-ref nil)))))) + +;; Run objdump and insert the contents into the buffer. The arguments +;; are the way they are because this is also called as a +;; revert-buffer-function. +(defun dwarf-do-refresh (&rest ignore) + (let ((inhibit-read-only t)) + (erase-buffer) + (save-excursion + (call-process dwarf-objdump-program + nil (current-buffer) nil + "-Wi" "--dwarf-depth=1" + (expand-file-name dwarf-file))) + (set-buffer-modified-p nil))) + +;;;###autoload +(define-derived-mode dwarf-mode special-mode "DWARF" + "Major mode for browsing DWARF output. + +\\{dwarf-mode-map}" + + (set (make-local-variable 'font-lock-defaults) '(dwarf-font-lock-keywords)) + ;; FIXME: we could be smarter and check the file time. + (set (make-local-variable 'revert-buffer-function) #'dwarf-do-refresh) + (jit-lock-register #'dwarf-fontify-region)) + +(define-key dwarf-mode-map [(control ?m)] #'dwarf-insert-substructure) + +;;:###autoload +(defun dwarf-browse (file) + "Invoke `objdump' and put output into a `dwarf-mode' buffer. +This is the main interface to `dwarf-mode'." + (interactive "fFile name: ") + (let* ((base-name (file-name-nondirectory file)) + (buffer (generate-new-buffer (concat "*DWARF for " base-name "*")))) + (pop-to-buffer buffer) + (dwarf-mode) + (set (make-local-variable 'dwarf-file) file) + (dwarf-do-refresh))) + +(provide 'dwarf-mode) diff --git a/binutils/dwarf.c b/binutils/dwarf.c index 8846e87..1ee0e33 100644 --- a/binutils/dwarf.c +++ b/binutils/dwarf.c @@ -63,6 +63,9 @@ int do_trace_abbrevs; int do_trace_aranges; int do_wide; +int dwarf_cutoff_level = -1; +unsigned long dwarf_start_die; + /* Values for do_debug_lines. */ #define FLAG_DEBUG_LINES_RAW 1 #define FLAG_DEBUG_LINES_DECODED 2 @@ -324,16 +327,71 @@ process_extended_line_op (unsigned char *data, int is_stmt) case DW_LNE_HP_define_proc: printf ("DW_LNE_HP_define_proc\n"); break; + case DW_LNE_HP_source_file_correlation: + { + unsigned char *edata = data + len - bytes_read - 1; + + printf ("DW_LNE_HP_source_file_correlation\n"); + + while (data < edata) + { + unsigned int opc; + + opc = read_leb128 (data, & bytes_read, 0); + data += bytes_read; + + switch (opc) + { + case DW_LNE_HP_SFC_formfeed: + printf (" DW_LNE_HP_SFC_formfeed\n"); + break; + case DW_LNE_HP_SFC_set_listing_line: + printf (" DW_LNE_HP_SFC_set_listing_line (%s)\n", + dwarf_vmatoa ("u", + read_leb128 (data, & bytes_read, 0))); + data += bytes_read; + break; + case DW_LNE_HP_SFC_associate: + printf (" DW_LNE_HP_SFC_associate "); + printf (_("(%s"), + dwarf_vmatoa ("u", + read_leb128 (data, & bytes_read, 0))); + data += bytes_read; + printf (_(",%s"), + dwarf_vmatoa ("u", + read_leb128 (data, & bytes_read, 0))); + data += bytes_read; + printf (_(",%s)\n"), + dwarf_vmatoa ("u", + read_leb128 (data, & bytes_read, 0))); + data += bytes_read; + break; + default: + printf (" UNKNOW DW_LNE_HP_SFC opcode (%u)\n", opc); + data = edata; + break; + } + } + } + break; default: - if (op_code >= DW_LNE_lo_user - /* The test against DW_LNW_hi_user is redundant due to - the limited range of the unsigned char data type used - for op_code. */ - /*&& op_code <= DW_LNE_hi_user*/) - printf (_("user defined: length %d\n"), len - bytes_read); - else - printf (_("UNKNOWN: length %d\n"), len - bytes_read); + { + unsigned int rlen = len - bytes_read - 1; + + if (op_code >= DW_LNE_lo_user + /* The test against DW_LNW_hi_user is redundant due to + the limited range of the unsigned char data type used + for op_code. */ + /*&& op_code <= DW_LNE_hi_user*/) + printf (_("user defined: ")); + else + printf (_("UNKNOWN: ")); + printf (_("length %d ["), rlen); + for (; rlen; rlen--) + printf (" %02x", *data++); + printf ("]\n"); + } break; } @@ -1034,17 +1092,6 @@ decode_location_expression (unsigned char * data, display_block (data, uvalue); data += uvalue; break; - case DW_OP_GNU_entry_value: - uvalue = read_leb128 (data, &bytes_read, 0); - data += bytes_read; - printf ("DW_OP_GNU_entry_value: ("); - if (decode_location_expression (data, pointer_size, offset_size, - dwarf_version, uvalue, - cu_offset, section)) - need_frame_base = 1; - putchar (')'); - data += uvalue; - break; /* GNU extensions. */ case DW_OP_GNU_push_tls_address: @@ -1093,6 +1140,58 @@ decode_location_expression (unsigned char * data, data += offset_size + bytes_read; } break; + case DW_OP_GNU_entry_value: + uvalue = read_leb128 (data, &bytes_read, 0); + data += bytes_read; + printf ("DW_OP_GNU_entry_value: ("); + if (decode_location_expression (data, pointer_size, offset_size, + dwarf_version, uvalue, + cu_offset, section)) + need_frame_base = 1; + putchar (')'); + data += uvalue; + break; + case DW_OP_GNU_const_type: + uvalue = read_leb128 (data, &bytes_read, 0); + data += bytes_read; + printf ("DW_OP_GNU_const_type: <0x%s> ", + dwarf_vmatoa ("x", cu_offset + uvalue)); + uvalue = byte_get (data++, 1); + display_block (data, uvalue); + data += uvalue; + break; + case DW_OP_GNU_regval_type: + uvalue = read_leb128 (data, &bytes_read, 0); + data += bytes_read; + printf ("DW_OP_GNU_regval_type: %s (%s)", + dwarf_vmatoa ("u", uvalue), regname (uvalue, 1)); + uvalue = read_leb128 (data, &bytes_read, 0); + data += bytes_read; + printf (" <0x%s>", dwarf_vmatoa ("x", cu_offset + uvalue)); + break; + case DW_OP_GNU_deref_type: + printf ("DW_OP_GNU_deref_type: %ld", (long) byte_get (data++, 1)); + uvalue = read_leb128 (data, &bytes_read, 0); + data += bytes_read; + printf (" <0x%s>", dwarf_vmatoa ("x", cu_offset + uvalue)); + break; + case DW_OP_GNU_convert: + uvalue = read_leb128 (data, &bytes_read, 0); + data += bytes_read; + printf ("DW_OP_GNU_convert <0x%s>", + dwarf_vmatoa ("x", uvalue ? cu_offset + uvalue : 0)); + break; + case DW_OP_GNU_reinterpret: + uvalue = read_leb128 (data, &bytes_read, 0); + data += bytes_read; + printf ("DW_OP_GNU_reinterpret <0x%s>", + dwarf_vmatoa ("x", uvalue ? cu_offset + uvalue : 0)); + break; + case DW_OP_GNU_parameter_ref: + printf ("DW_OP_GNU_parameter_ref: <0x%s>", + dwarf_vmatoa ("x", cu_offset + byte_get (data, 4))); + data += 4; + break; /* HP extensions. */ case DW_OP_HP_is_value: @@ -1367,7 +1466,8 @@ read_and_display_attr_value (unsigned long attribute, } if ((do_loc || do_debug_loc || do_debug_ranges) - && num_debug_info_entries == 0) + && num_debug_info_entries == 0 + && debug_info_p != NULL) { switch (attribute) { @@ -1385,8 +1485,8 @@ read_and_display_attr_value (unsigned long attribute, case DW_AT_GNU_call_site_data_value: case DW_AT_GNU_call_site_target: case DW_AT_GNU_call_site_target_clobbered: - if (form == DW_FORM_data4 - || form == DW_FORM_data8 + if ((dwarf_version < 4 + && (form == DW_FORM_data4 || form == DW_FORM_data8)) || form == DW_FORM_sec_offset) { /* Process location list. */ @@ -1416,8 +1516,8 @@ read_and_display_attr_value (unsigned long attribute, break; case DW_AT_ranges: - if (form == DW_FORM_data4 - || form == DW_FORM_data8 + if ((dwarf_version < 4 + && (form == DW_FORM_data4 || form == DW_FORM_data8)) || form == DW_FORM_sec_offset) { /* Process range list. */ @@ -1442,7 +1542,7 @@ read_and_display_attr_value (unsigned long attribute, } } - if (do_loc) + if (do_loc || attribute == 0) return data; /* For some attributes we can display further information. */ @@ -1634,8 +1734,8 @@ read_and_display_attr_value (unsigned long attribute, case DW_AT_GNU_call_site_data_value: case DW_AT_GNU_call_site_target: case DW_AT_GNU_call_site_target_clobbered: - if (form == DW_FORM_data4 - || form == DW_FORM_data8 + if ((dwarf_version < 4 + && (form == DW_FORM_data4 || form == DW_FORM_data8)) || form == DW_FORM_sec_offset) printf (_("(location list)")); /* Fall through. */ @@ -1860,6 +1960,7 @@ get_AT_name (unsigned long attribute) case DW_AT_GNU_all_tail_call_sites: return "DW_AT_GNU_all_tail_call_sites"; case DW_AT_GNU_all_call_sites: return "DW_AT_GNU_all_call_sites"; case DW_AT_GNU_all_source_call_sites: return "DW_AT_GNU_all_source_call_sites"; + case DW_AT_GNU_macros: return "DW_AT_GNU_macros"; /* UPC extension. */ case DW_AT_upc_threads_scaled: return "DW_AT_upc_threads_scaled"; @@ -1981,7 +2082,8 @@ process_debug_info (struct dwarf_section *section, if (!do_loc) { - printf (_("Contents of the %s section:\n\n"), section->name); + if (dwarf_start_die == 0) + printf (_("Contents of the %s section:\n\n"), section->name); load_debug_section (str, file); } @@ -1999,7 +2101,7 @@ process_debug_info (struct dwarf_section *section, DWARF2_Internal_CompUnit compunit; unsigned char *hdrptr; unsigned char *tags; - int level; + int level, last_level, saved_level; dwarf_vma cu_offset; int offset_size; int initial_length_size; @@ -2068,7 +2170,7 @@ process_debug_info (struct dwarf_section *section, debug_information [unit].num_range_lists = 0; } - if (!do_loc) + if (!do_loc && dwarf_start_die == 0) { printf (_(" Compilation Unit @ offset 0x%s:\n"), dwarf_vmatoa ("x", cu_offset)); @@ -2129,6 +2231,8 @@ process_debug_info (struct dwarf_section *section, + debug_displays [abbrev_sec].section.size); level = 0; + last_level = level; + saved_level = -1; while (tags < start) { unsigned int bytes_read; @@ -2136,6 +2240,7 @@ process_debug_info (struct dwarf_section *section, unsigned long die_offset; abbrev_entry *entry; abbrev_attr *attr; + int do_printing = 1; die_offset = tags - section_begin; @@ -2172,12 +2277,30 @@ process_debug_info (struct dwarf_section *section, warn (_("Further warnings about bogus end-of-sibling markers suppressed\n")); } } + if (dwarf_start_die != 0 && level < saved_level) + return 1; continue; } if (!do_loc) - printf (_(" <%d><%lx>: Abbrev Number: %lu"), - level, die_offset, abbrev_number); + { + if (dwarf_start_die != 0 && die_offset < dwarf_start_die) + do_printing = 0; + else + { + if (dwarf_start_die != 0 && die_offset == dwarf_start_die) + saved_level = level; + do_printing = (dwarf_cutoff_level == -1 + || level < dwarf_cutoff_level); + if (do_printing) + printf (_(" <%d><%lx>: Abbrev Number: %lu"), + level, die_offset, abbrev_number); + else if (dwarf_cutoff_level == -1 + || last_level < dwarf_cutoff_level) + printf (_(" <%d><%lx>: ...\n"), level, die_offset); + last_level = level; + } + } /* Scan through the abbreviation list until we reach the correct entry. */ @@ -2188,7 +2311,7 @@ process_debug_info (struct dwarf_section *section, if (entry == NULL) { - if (!do_loc) + if (!do_loc && do_printing) { printf ("\n"); fflush (stdout); @@ -2198,7 +2321,7 @@ process_debug_info (struct dwarf_section *section, return 0; } - if (!do_loc) + if (!do_loc && do_printing) printf (" (%s)\n", get_TAG_name (entry->tag)); switch (entry->tag) @@ -2219,9 +2342,15 @@ process_debug_info (struct dwarf_section *section, for (attr = entry->first_attr; attr; attr = attr->next) { - if (! do_loc) + debug_info *arg; + + if (! do_loc && do_printing) /* Show the offset from where the tag was extracted. */ - printf (" <%2lx>", (unsigned long)(tags - section_begin)); + printf (" <%lx>", (unsigned long)(tags - section_begin)); + + arg = debug_information; + if (debug_information) + arg += unit; tags = read_and_display_attr (attr->attribute, attr->form, @@ -2229,8 +2358,8 @@ process_debug_info (struct dwarf_section *section, compunit.cu_pointer_size, offset_size, compunit.cu_version, - debug_information + unit, - do_loc, section); + arg, + do_loc || ! do_printing, section); } if (entry->children) @@ -3322,6 +3451,321 @@ display_debug_macinfo (struct dwarf_section *section, return 1; } +/* Given LINE_OFFSET into the .debug_line section, attempt to return + filename and dirname corresponding to file name table entry with index + FILEIDX. Return NULL on failure. */ + +static unsigned char * +get_line_filename_and_dirname (dwarf_vma line_offset, dwarf_vma fileidx, + unsigned char **dir_name) +{ + struct dwarf_section *section = &debug_displays [line].section; + unsigned char *hdrptr, *dirtable, *file_name; + unsigned int offset_size, initial_length_size; + unsigned int version, opcode_base, bytes_read; + dwarf_vma length, diridx; + + *dir_name = NULL; + if (section->start == NULL + || line_offset >= section->size + || fileidx == 0) + return NULL; + + hdrptr = section->start + line_offset; + length = byte_get (hdrptr, 4); + hdrptr += 4; + if (length == 0xffffffff) + { + /* This section is 64-bit DWARF 3. */ + length = byte_get (hdrptr, 8); + hdrptr += 8; + offset_size = 8; + initial_length_size = 12; + } + else + { + offset_size = 4; + initial_length_size = 4; + } + if (length + initial_length_size > section->size) + return NULL; + version = byte_get (hdrptr, 2); + hdrptr += 2; + if (version != 2 && version != 3 && version != 4) + return NULL; + hdrptr += offset_size + 1;/* Skip prologue_length and min_insn_length. */ + if (version >= 4) + hdrptr++; /* Skip max_ops_per_insn. */ + hdrptr += 3; /* Skip default_is_stmt, line_base, line_range. */ + opcode_base = byte_get (hdrptr, 1); + if (opcode_base == 0) + return NULL; + hdrptr++; + hdrptr += opcode_base - 1; + dirtable = hdrptr; + /* Skip over dirname table. */ + while (*hdrptr != '\0') + hdrptr += strlen ((char *) hdrptr) + 1; + hdrptr++; /* Skip the NUL at the end of the table. */ + /* Now skip over preceding filename table entries. */ + for (; *hdrptr != '\0' && fileidx > 1; fileidx--) + { + hdrptr += strlen ((char *) hdrptr) + 1; + read_leb128 (hdrptr, &bytes_read, 0); + hdrptr += bytes_read; + read_leb128 (hdrptr, &bytes_read, 0); + hdrptr += bytes_read; + read_leb128 (hdrptr, &bytes_read, 0); + hdrptr += bytes_read; + } + if (*hdrptr == '\0') + return NULL; + file_name = hdrptr; + hdrptr += strlen ((char *) hdrptr) + 1; + diridx = read_leb128 (hdrptr, &bytes_read, 0); + if (diridx == 0) + return file_name; + for (; *dirtable != '\0' && diridx > 1; diridx--) + dirtable += strlen ((char *) dirtable) + 1; + if (*dirtable == '\0') + return NULL; + *dir_name = dirtable; + return file_name; +} + +static int +display_debug_macro (struct dwarf_section *section, + void *file) +{ + unsigned char *start = section->start; + unsigned char *end = start + section->size; + unsigned char *curr = start; + unsigned char *extended_op_buf[256]; + unsigned int bytes_read; + + load_debug_section (str, file); + load_debug_section (line, file); + + printf (_("Contents of the %s section:\n\n"), section->name); + + while (curr < end) + { + unsigned int lineno, version, flags; + unsigned int offset_size = 4; + const char *string; + dwarf_vma line_offset = 0, sec_offset = curr - start, offset; + unsigned char **extended_ops = NULL; + + version = byte_get (curr, 2); + curr += 2; + + if (version != 4) + { + error (_("Only GNU extension to DWARF 4 of %s is currently supported.\n"), + section->name); + return 0; + } + + flags = byte_get (curr++, 1); + if (flags & 1) + offset_size = 8; + printf (_(" Offset: 0x%lx\n"), + (unsigned long) sec_offset); + printf (_(" Version: %d\n"), version); + printf (_(" Offset size: %d\n"), offset_size); + if (flags & 2) + { + line_offset = byte_get (curr, offset_size); + curr += offset_size; + printf (_(" Offset into .debug_line: 0x%lx\n"), + (unsigned long) line_offset); + } + if (flags & 4) + { + unsigned int i, count = byte_get (curr++, 1), op; + dwarf_vma nargs, n; + memset (extended_op_buf, 0, sizeof (extended_op_buf)); + extended_ops = extended_op_buf; + if (count) + { + printf (_(" Extension opcode arguments:\n")); + for (i = 0; i < count; i++) + { + op = byte_get (curr++, 1); + extended_ops[op] = curr; + nargs = read_leb128 (curr, &bytes_read, 0); + curr += bytes_read; + if (nargs == 0) + printf (_(" DW_MACRO_GNU_%02x has no arguments\n"), op); + else + { + printf (_(" DW_MACRO_GNU_%02x arguments: "), op); + for (n = 0; n < nargs; n++) + { + unsigned int form = byte_get (curr++, 1); + printf ("%s%s", get_FORM_name (form), + n == nargs - 1 ? "\n" : ", "); + switch (form) + { + case DW_FORM_data1: + case DW_FORM_data2: + case DW_FORM_data4: + case DW_FORM_data8: + case DW_FORM_sdata: + case DW_FORM_udata: + case DW_FORM_block: + case DW_FORM_block1: + case DW_FORM_block2: + case DW_FORM_block4: + case DW_FORM_flag: + case DW_FORM_string: + case DW_FORM_strp: + case DW_FORM_sec_offset: + break; + default: + error (_("Invalid extension opcode form %s\n"), + get_FORM_name (form)); + return 0; + } + } + } + } + } + } + printf ("\n"); + + while (1) + { + unsigned int op; + + if (curr >= end) + { + error (_(".debug_macro section not zero terminated\n")); + return 0; + } + + op = byte_get (curr++, 1); + if (op == 0) + break; + + switch (op) + { + case DW_MACRO_GNU_start_file: + { + unsigned int filenum; + unsigned char *file_name = NULL, *dir_name = NULL; + + lineno = read_leb128 (curr, &bytes_read, 0); + curr += bytes_read; + filenum = read_leb128 (curr, &bytes_read, 0); + curr += bytes_read; + + if ((flags & 2) == 0) + error (_("DW_MACRO_GNU_start_file used, but no .debug_line offset provided.\n")); + else + file_name + = get_line_filename_and_dirname (line_offset, filenum, + &dir_name); + if (file_name == NULL) + printf (_(" DW_MACRO_GNU_start_file - lineno: %d filenum: %d\n"), + lineno, filenum); + else + printf (_(" DW_MACRO_GNU_start_file - lineno: %d filenum: %d filename: %s%s%s\n"), + lineno, filenum, + dir_name != NULL ? (const char *) dir_name : "", + dir_name != NULL ? "/" : "", file_name); + } + break; + + case DW_MACRO_GNU_end_file: + printf (_(" DW_MACRO_GNU_end_file\n")); + break; + + case DW_MACRO_GNU_define: + lineno = read_leb128 (curr, &bytes_read, 0); + curr += bytes_read; + string = (char *) curr; + curr += strlen (string) + 1; + printf (_(" DW_MACRO_GNU_define - lineno : %d macro : %s\n"), + lineno, string); + break; + + case DW_MACRO_GNU_undef: + lineno = read_leb128 (curr, &bytes_read, 0); + curr += bytes_read; + string = (char *) curr; + curr += strlen (string) + 1; + printf (_(" DW_MACRO_GNU_undef - lineno : %d macro : %s\n"), + lineno, string); + break; + + case DW_MACRO_GNU_define_indirect: + lineno = read_leb128 (curr, &bytes_read, 0); + curr += bytes_read; + offset = byte_get (curr, offset_size); + curr += offset_size; + string = fetch_indirect_string (offset); + printf (_(" DW_MACRO_GNU_define_indirect - lineno : %d macro : %s\n"), + lineno, string); + break; + + case DW_MACRO_GNU_undef_indirect: + lineno = read_leb128 (curr, &bytes_read, 0); + curr += bytes_read; + offset = byte_get (curr, offset_size); + curr += offset_size; + string = fetch_indirect_string (offset); + printf (_(" DW_MACRO_GNU_undef_indirect - lineno : %d macro : %s\n"), + lineno, string); + break; + + case DW_MACRO_GNU_transparent_include: + offset = byte_get (curr, offset_size); + curr += offset_size; + printf (_(" DW_MACRO_GNU_transparent_include - offset : 0x%lx\n"), + (unsigned long) offset); + break; + + default: + if (extended_ops == NULL || extended_ops[op] == NULL) + { + error (_(" Unknown macro opcode %02x seen\n"), op); + return 0; + } + else + { + /* Skip over unhandled opcodes. */ + dwarf_vma nargs, n; + unsigned char *desc = extended_ops[op]; + nargs = read_leb128 (desc, &bytes_read, 0); + desc += bytes_read; + if (nargs == 0) + { + printf (_(" DW_MACRO_GNU_%02x\n"), op); + break; + } + printf (_(" DW_MACRO_GNU_%02x -"), op); + for (n = 0; n < nargs; n++) + { + curr + = read_and_display_attr_value (0, byte_get (desc++, 1), + curr, 0, 0, offset_size, + version, NULL, 0, NULL); + if (n != nargs - 1) + printf (","); + } + printf ("\n"); + } + break; + } + } + + printf ("\n"); + } + + return 1; +} + static int display_debug_abbrev (struct dwarf_section *section, void *file ATTRIBUTE_UNUSED) @@ -3365,6 +3809,19 @@ display_debug_abbrev (struct dwarf_section *section, return 1; } +/* Sort array of indexes in ascending order of loc_offsets[idx]. */ + +static dwarf_vma *loc_offsets; + +static int +loc_offsets_compar (const void *ap, const void *bp) +{ + dwarf_vma a = loc_offsets[*(const unsigned int *) ap]; + dwarf_vma b = loc_offsets[*(const unsigned int *) bp]; + + return (a > b) - (b > a); +} + static int display_debug_loc (struct dwarf_section *section, void *file) { @@ -3377,9 +3834,11 @@ display_debug_loc (struct dwarf_section *section, void *file) unsigned int first = 0; unsigned int i; unsigned int j; + unsigned int k; int seen_first_offset = 0; - int use_debug_info = 1; + int locs_sorted = 1; unsigned char *next; + unsigned int *array = NULL; bytes = section->size; section_end = start + bytes; @@ -3405,10 +3864,11 @@ display_debug_loc (struct dwarf_section *section, void *file) unsigned int num; num = debug_information [i].num_loc_offsets; - num_loc_list += num; + if (num > num_loc_list) + num_loc_list = num; /* Check if we can use `debug_information' directly. */ - if (use_debug_info && num != 0) + if (locs_sorted && num != 0) { if (!seen_first_offset) { @@ -3426,7 +3886,7 @@ display_debug_loc (struct dwarf_section *section, void *file) if (last_offset > debug_information [i].loc_offsets [j]) { - use_debug_info = 0; + locs_sorted = 0; break; } last_offset = debug_information [i].loc_offsets [j]; @@ -3434,10 +3894,6 @@ display_debug_loc (struct dwarf_section *section, void *file) } } - if (!use_debug_info) - /* FIXME: Should we handle this case? */ - error (_("Location lists in .debug_info section aren't in ascending order!\n")); - if (!seen_first_offset) error (_("No location lists in .debug_info section!\n")); @@ -3448,6 +3904,8 @@ display_debug_loc (struct dwarf_section *section, void *file) section->name, dwarf_vmatoa ("x", debug_information [first].loc_offsets [0])); + if (!locs_sorted) + array = (unsigned int *) xcmalloc (num_loc_list, sizeof (unsigned int)); printf (_("Contents of the %s section:\n\n"), section->name); printf (_(" Offset Begin End Expression\n")); @@ -3470,9 +3928,23 @@ display_debug_loc (struct dwarf_section *section, void *file) cu_offset = debug_information [i].cu_offset; offset_size = debug_information [i].offset_size; dwarf_version = debug_information [i].dwarf_version; + if (!locs_sorted) + { + for (k = 0; k < debug_information [i].num_loc_offsets; k++) + array[k] = k; + loc_offsets = debug_information [i].loc_offsets; + qsort (array, debug_information [i].num_loc_offsets, + sizeof (*array), loc_offsets_compar); + } - for (j = 0; j < debug_information [i].num_loc_offsets; j++) + for (k = 0; k < debug_information [i].num_loc_offsets; k++) { + j = locs_sorted ? k : array[k]; + if (k + && debug_information [i].loc_offsets [locs_sorted + ? k - 1 : array [k - 1]] + == debug_information [i].loc_offsets [j]) + continue; has_frame_base = debug_information [i].have_frame_base [j]; /* DWARF sections under Mach-O have non-zero addresses. */ offset = debug_information [i].loc_offsets [j] - section->address; @@ -3586,6 +4058,7 @@ display_debug_loc (struct dwarf_section *section, void *file) warn (_("There are %ld unused bytes at the end of section %s\n"), (long) (section_end - start), section->name); putchar ('\n'); + free (array); return 1; } @@ -3742,6 +4215,13 @@ display_debug_aranges (struct dwarf_section *section, address_size = arange.ar_pointer_size + arange.ar_segment_size; + if (address_size == 0) + { + error (_("Invalid address size in %s section!\n"), + section->name); + break; + } + /* The DWARF spec does not require that the address size be a power of two, but we do. This will have to change if we ever encounter an uneven architecture. */ @@ -4076,6 +4556,7 @@ init_dwarf_regnames (unsigned int e_machine) case EM_X86_64: case EM_L1OM: + case EM_K1OM: init_dwarf_regnames_x86_64 (); break; @@ -5023,6 +5504,9 @@ display_gdb_index (struct dwarf_section *section, warn (_("The address table data in version 3 may be wrong.\n")); break; case 4: + warn (_("Version 4 does not support case insensitive lookups.\n")); + break; + case 5: break; default: warn (_("Unsupported version %lu.\n"), (unsigned long) version); @@ -5111,8 +5595,8 @@ display_gdb_index (struct dwarf_section *section, { cu = byte_get_little_endian (constant_pool + cu_vector_offset + 4 + j * 4, 4); /* Convert to TU number if it's for a type unit. */ - if (cu >= cu_list_elements) - printf (" T%lu", (unsigned long) (cu - cu_list_elements)); + if (cu >= cu_list_elements / 2) + printf (" T%lu", (unsigned long) (cu - cu_list_elements / 2)); else printf (" %lu", (unsigned long) cu); } @@ -5376,6 +5860,8 @@ struct dwarf_section_display debug_displays[] = display_debug_frames, &do_debug_frames, 1 }, { { ".debug_macinfo", ".zdebug_macinfo", NULL, NULL, 0, 0 }, display_debug_macinfo, &do_debug_macinfo, 0 }, + { { ".debug_macro", ".zdebug_macro", NULL, NULL, 0, 0 }, + display_debug_macro, &do_debug_macinfo, 1 }, { { ".debug_str", ".zdebug_str", NULL, NULL, 0, 0 }, display_debug_str, &do_debug_str, 0 }, { { ".debug_loc", ".zdebug_loc", NULL, NULL, 0, 0 }, diff --git a/binutils/dwarf.h b/binutils/dwarf.h index 62b57a6..7a755c9 100644 --- a/binutils/dwarf.h +++ b/binutils/dwarf.h @@ -143,6 +143,7 @@ enum dwarf_section_display_enum pubnames, eh_frame, macinfo, + macro, str, loc, pubtypes, @@ -200,6 +201,9 @@ extern int do_trace_abbrevs; extern int do_trace_aranges; extern int do_wide; +extern int dwarf_cutoff_level; +extern unsigned long dwarf_start_die; + extern void init_dwarf_regnames (unsigned int); extern void init_dwarf_regnames_i386 (void); extern void init_dwarf_regnames_x86_64 (void); diff --git a/binutils/elfedit.c b/binutils/elfedit.c index 1805ec1..f7bf9e9 100644 --- a/binutils/elfedit.c +++ b/binutils/elfedit.c @@ -518,8 +518,8 @@ osabis[] = { ELFOSABI_NONE, "none" }, { ELFOSABI_HPUX, "HPUX" }, { ELFOSABI_NETBSD, "NetBSD" }, - { ELFOSABI_LINUX, "Linux" }, - { ELFOSABI_HURD, "Hurd" }, + { ELFOSABI_GNU, "GNU" }, + { ELFOSABI_GNU, "Linux" }, { ELFOSABI_SOLARIS, "Solaris" }, { ELFOSABI_AIX, "AIX" }, { ELFOSABI_IRIX, "Irix" }, @@ -556,6 +556,8 @@ elf_machine (const char *mach) { if (strcasecmp (mach, "l1om") == 0) return EM_L1OM; + if (strcasecmp (mach, "k1om") == 0) + return EM_K1OM; if (strcasecmp (mach, "x86_64") == 0) return EM_X86_64; if (strcasecmp (mach, "x86-64") == 0) @@ -576,6 +578,7 @@ elf_class (int mach) switch (mach) { case EM_L1OM: + case EM_K1OM: case EM_X86_64: return ELFCLASS64; case EM_NONE: diff --git a/binutils/makefile.vms b/binutils/makefile.vms index 27bcd0e..4dfac68 100644 --- a/binutils/makefile.vms +++ b/binutils/makefile.vms @@ -1,24 +1,18 @@ # -# Makefile for binutils under openVMS (Alpha and Vax) +# Makefile for binutils under openVMS (Alpha and Itanium) # # For use with gnu-make for vms # -# Created by Klaus K"ampf, kkaempf@rmi.de +# Created by Klaus Kaempf, kkaempf@rmi.de # # -ifeq ($(CC),gcc) -DEFS= -CFLAGS=/include=([],[-.include],[-.bfd])$(DEFS) -LIBS=,gnu_cc_library:libgcc/lib,sys$$library:vaxcrtl.olb/lib,gnu_cc_library:crt0.obj -else -DEFS= +DEFS=/define=("OBJDUMP_PRIVATE_VECTORS=") OPT=/noopt/debug CFLAGS=$(OPT)/include=([],"../include",[-.bfd])$(DEFS)\ /name=(as_is,shortened)\ /prefix=(all,except=("getopt","optarg","optopt","optind","opterr"))\ /warns=(info=(ptrmismatch,shiftcount)) -endif LIBBFD = [-.bfd]libbfd.olb/lib LIBBFD_DEP = [-.bfd]libbfd.olb diff --git a/binutils/mcparse.c b/binutils/mcparse.c new file mode 100644 index 0000000..2c936d8 --- /dev/null +++ b/binutils/mcparse.c @@ -0,0 +1,2156 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton implementation for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* C LALR(1) parser skeleton written by Richard Stallman, by + simplifying the original so-called "semantic" parser. */ + +/* All symbols defined below should begin with yy or YY, to avoid + infringing on user name space. This should be done even for local + variables, as they might otherwise be expanded by user macros. + There are some unavoidable exceptions within include files to + define necessary library symbols; they are noted "INFRINGES ON + USER NAME SPACE" below. */ + +/* Identify Bison output. */ +#define YYBISON 1 + +/* Bison version. */ +#define YYBISON_VERSION "2.3" + +/* Skeleton name. */ +#define YYSKELETON_NAME "yacc.c" + +/* Pure parsers. */ +#define YYPURE 0 + +/* Using locations. */ +#define YYLSP_NEEDED 0 + + + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + NL = 258, + MCIDENT = 259, + MCFILENAME = 260, + MCLINE = 261, + MCCOMMENT = 262, + MCTOKEN = 263, + MCENDLINE = 264, + MCLANGUAGENAMES = 265, + MCFACILITYNAMES = 266, + MCSEVERITYNAMES = 267, + MCOUTPUTBASE = 268, + MCMESSAGEIDTYPEDEF = 269, + MCLANGUAGE = 270, + MCMESSAGEID = 271, + MCSEVERITY = 272, + MCFACILITY = 273, + MCSYMBOLICNAME = 274, + MCNUMBER = 275 + }; +#endif +/* Tokens. */ +#define NL 258 +#define MCIDENT 259 +#define MCFILENAME 260 +#define MCLINE 261 +#define MCCOMMENT 262 +#define MCTOKEN 263 +#define MCENDLINE 264 +#define MCLANGUAGENAMES 265 +#define MCFACILITYNAMES 266 +#define MCSEVERITYNAMES 267 +#define MCOUTPUTBASE 268 +#define MCMESSAGEIDTYPEDEF 269 +#define MCLANGUAGE 270 +#define MCMESSAGEID 271 +#define MCSEVERITY 272 +#define MCFACILITY 273 +#define MCSYMBOLICNAME 274 +#define MCNUMBER 275 + + + + +/* Copy the first part of user declarations. */ +#line 1 "mcparse.y" + /* mcparse.y -- parser for Windows mc files + Copyright 2007 + Free Software Foundation, Inc. + + Parser for Windows mc files + Written by Kai Tietz, Onevision. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA + 02110-1301, USA. */ + +/* This is a parser for Windows rc files. It is based on the parser + by Gunther Ebert . */ + +#include "sysdep.h" +#include "bfd.h" +#include "bucomm.h" +#include "libiberty.h" +#include "windmc.h" +#include "safe-ctype.h" + +static rc_uint_type mc_last_id = 0; +static rc_uint_type mc_sefa_val = 0; +static unichar *mc_last_symbol = NULL; +static const mc_keyword *mc_cur_severity = NULL; +static const mc_keyword *mc_cur_facility = NULL; +static mc_node *cur_node = NULL; + + + +/* Enabling traces. */ +#ifndef YYDEBUG +# define YYDEBUG 0 +#endif + +/* Enabling verbose error messages. */ +#ifdef YYERROR_VERBOSE +# undef YYERROR_VERBOSE +# define YYERROR_VERBOSE 1 +#else +# define YYERROR_VERBOSE 0 +#endif + +/* Enabling the token table. */ +#ifndef YYTOKEN_TABLE +# define YYTOKEN_TABLE 0 +#endif + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 45 "mcparse.y" +{ + rc_uint_type ival; + unichar *ustr; + const mc_keyword *tok; + mc_node *nod; +} +/* Line 193 of yacc.c. */ +#line 186 "mcparse.c" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + + + +/* Copy the second part of user declarations. */ + + +/* Line 216 of yacc.c. */ +#line 199 "mcparse.c" + +#ifdef short +# undef short +#endif + +#ifdef YYTYPE_UINT8 +typedef YYTYPE_UINT8 yytype_uint8; +#else +typedef unsigned char yytype_uint8; +#endif + +#ifdef YYTYPE_INT8 +typedef YYTYPE_INT8 yytype_int8; +#elif (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +typedef signed char yytype_int8; +#else +typedef short int yytype_int8; +#endif + +#ifdef YYTYPE_UINT16 +typedef YYTYPE_UINT16 yytype_uint16; +#else +typedef unsigned short int yytype_uint16; +#endif + +#ifdef YYTYPE_INT16 +typedef YYTYPE_INT16 yytype_int16; +#else +typedef short int yytype_int16; +#endif + +#ifndef YYSIZE_T +# ifdef __SIZE_TYPE__ +# define YYSIZE_T __SIZE_TYPE__ +# elif defined size_t +# define YYSIZE_T size_t +# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# else +# define YYSIZE_T unsigned int +# endif +#endif + +#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) + +#ifndef YY_ +# if defined YYENABLE_NLS && YYENABLE_NLS +# if ENABLE_NLS +# include /* INFRINGES ON USER NAME SPACE */ +# define YY_(msgid) dgettext ("bison-runtime", msgid) +# endif +# endif +# ifndef YY_ +# define YY_(msgid) msgid +# endif +#endif + +/* Suppress unused-variable warnings by "using" E. */ +#if ! defined lint || defined __GNUC__ +# define YYUSE(e) ((void) (e)) +#else +# define YYUSE(e) /* empty */ +#endif + +/* Identity function, used to suppress warnings about constant conditions. */ +#ifndef lint +# define YYID(n) (n) +#else +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static int +YYID (int i) +#else +static int +YYID (i) + int i; +#endif +{ + return i; +} +#endif + +#if ! defined yyoverflow || YYERROR_VERBOSE + +/* The parser invokes alloca or malloc; define the necessary symbols. */ + +# ifdef YYSTACK_USE_ALLOCA +# if YYSTACK_USE_ALLOCA +# ifdef __GNUC__ +# define YYSTACK_ALLOC __builtin_alloca +# elif defined __BUILTIN_VA_ARG_INCR +# include /* INFRINGES ON USER NAME SPACE */ +# elif defined _AIX +# define YYSTACK_ALLOC __alloca +# elif defined _MSC_VER +# include /* INFRINGES ON USER NAME SPACE */ +# define alloca _alloca +# else +# define YYSTACK_ALLOC alloca +# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# endif +# endif +# endif + +# ifdef YYSTACK_ALLOC + /* Pacify GCC's `empty if-body' warning. */ +# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) +# ifndef YYSTACK_ALLOC_MAXIMUM + /* The OS might guarantee only one guard page at the bottom of the stack, + and a page size can be as small as 4096 bytes. So we cannot safely + invoke alloca (N) if N exceeds 4096. Use a slightly smaller number + to allow for a few compiler-allocated temporary stack slots. */ +# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ +# endif +# else +# define YYSTACK_ALLOC YYMALLOC +# define YYSTACK_FREE YYFREE +# ifndef YYSTACK_ALLOC_MAXIMUM +# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM +# endif +# if (defined __cplusplus && ! defined _STDLIB_H \ + && ! ((defined YYMALLOC || defined malloc) \ + && (defined YYFREE || defined free))) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# ifndef YYMALLOC +# define YYMALLOC malloc +# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifndef YYFREE +# define YYFREE free +# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void free (void *); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# endif +#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ + + +#if (! defined yyoverflow \ + && (! defined __cplusplus \ + || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) + +/* A type that is properly aligned for any stack member. */ +union yyalloc +{ + yytype_int16 yyss; + YYSTYPE yyvs; + }; + +/* The size of the maximum gap between one aligned stack and the next. */ +# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) + +/* The size of an array large to enough to hold all stacks, each with + N elements. */ +# define YYSTACK_BYTES(N) \ + ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ + + YYSTACK_GAP_MAXIMUM) + +/* Copy COUNT objects from FROM to TO. The source and destination do + not overlap. */ +# ifndef YYCOPY +# if defined __GNUC__ && 1 < __GNUC__ +# define YYCOPY(To, From, Count) \ + __builtin_memcpy (To, From, (Count) * sizeof (*(From))) +# else +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ + while (YYID (0)) +# endif +# endif + +/* Relocate STACK from its old location to the new one. The + local variables YYSIZE and YYSTACKSIZE give the old and new number of + elements in the stack, and YYPTR gives the new location of the + stack. Advance YYPTR to a properly aligned location for the next + stack. */ +# define YYSTACK_RELOCATE(Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack, Stack, yysize); \ + Stack = &yyptr->Stack; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ + while (YYID (0)) + +#endif + +/* YYFINAL -- State number of the termination state. */ +#define YYFINAL 3 +/* YYLAST -- Last index in YYTABLE. */ +#define YYLAST 114 + +/* YYNTOKENS -- Number of terminals. */ +#define YYNTOKENS 26 +/* YYNNTS -- Number of nonterminals. */ +#define YYNNTS 29 +/* YYNRULES -- Number of rules. */ +#define YYNRULES 82 +/* YYNRULES -- Number of states. */ +#define YYNSTATES 125 + +/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ +#define YYUNDEFTOK 2 +#define YYMAXUTOK 275 + +#define YYTRANSLATE(YYX) \ + ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + +/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ +static const yytype_uint8 yytranslate[] = +{ + 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 22, 23, 2, 25, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 24, 2, + 2, 21, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20 +}; + +#if YYDEBUG +/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in + YYRHS. */ +static const yytype_uint16 yyprhs[] = +{ + 0, 0, 3, 5, 6, 9, 11, 13, 15, 17, + 23, 29, 33, 36, 42, 48, 52, 55, 61, 67, + 71, 74, 78, 82, 86, 89, 91, 94, 96, 101, + 105, 108, 110, 113, 115, 120, 124, 127, 129, 132, + 134, 141, 148, 153, 157, 160, 161, 164, 167, 168, + 173, 177, 181, 184, 185, 187, 190, 193, 194, 197, + 200, 203, 207, 211, 215, 217, 220, 225, 227, 230, + 232, 235, 237, 240, 246, 252, 258, 263, 266, 268, + 270, 271, 272 +}; + +/* YYRHS -- A `-1'-separated list of the rules' RHS. */ +static const yytype_int8 yyrhs[] = +{ + 27, 0, -1, 28, -1, -1, 28, 29, -1, 30, + -1, 38, -1, 49, -1, 1, -1, 12, 21, 22, + 31, 23, -1, 12, 21, 22, 31, 1, -1, 12, + 21, 1, -1, 12, 1, -1, 10, 21, 22, 35, + 23, -1, 10, 21, 22, 35, 1, -1, 10, 21, + 1, -1, 10, 1, -1, 11, 21, 22, 33, 23, + -1, 11, 21, 22, 33, 1, -1, 11, 21, 1, + -1, 11, 1, -1, 13, 21, 20, -1, 14, 21, + 4, -1, 14, 21, 1, -1, 14, 1, -1, 32, + -1, 31, 32, -1, 1, -1, 51, 21, 20, 37, + -1, 51, 21, 1, -1, 51, 1, -1, 34, -1, + 33, 34, -1, 1, -1, 51, 21, 20, 37, -1, + 51, 21, 1, -1, 51, 1, -1, 36, -1, 35, + 36, -1, 1, -1, 51, 21, 20, 54, 24, 5, + -1, 51, 21, 20, 54, 24, 1, -1, 51, 21, + 20, 1, -1, 51, 21, 1, -1, 51, 1, -1, + -1, 24, 4, -1, 24, 1, -1, -1, 40, 42, + 39, 46, -1, 16, 21, 41, -1, 16, 21, 1, + -1, 16, 1, -1, -1, 20, -1, 25, 20, -1, + 25, 1, -1, -1, 42, 43, -1, 42, 44, -1, + 42, 45, -1, 17, 21, 8, -1, 18, 21, 8, + -1, 19, 21, 4, -1, 47, -1, 46, 47, -1, + 50, 53, 48, 9, -1, 6, -1, 48, 6, -1, + 1, -1, 48, 1, -1, 7, -1, 49, 7, -1, + 15, 52, 21, 8, 3, -1, 15, 52, 21, 4, + 3, -1, 15, 52, 21, 51, 1, -1, 15, 52, + 21, 1, -1, 15, 1, -1, 4, -1, 8, -1, + -1, -1, -1 +}; + +/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ +static const yytype_uint16 yyrline[] = +{ + 0, 67, 67, 70, 72, 74, 75, 76, 81, 85, + 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, + 96, 97, 103, 107, 111, 118, 119, 120, 124, 128, + 129, 133, 134, 135, 139, 143, 144, 148, 149, 150, + 154, 158, 159, 160, 161, 166, 169, 173, 178, 177, + 190, 191, 192, 196, 199, 203, 207, 212, 219, 225, + 231, 239, 247, 255, 262, 263, 267, 277, 281, 293, + 294, 297, 298, 312, 316, 321, 326, 331, 338, 339, + 343, 347, 351 +}; +#endif + +#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE +/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. + First, the terminals, then, starting at YYNTOKENS, nonterminals. */ +static const char *const yytname[] = +{ + "$end", "error", "$undefined", "NL", "MCIDENT", "MCFILENAME", "MCLINE", + "MCCOMMENT", "MCTOKEN", "MCENDLINE", "MCLANGUAGENAMES", + "MCFACILITYNAMES", "MCSEVERITYNAMES", "MCOUTPUTBASE", + "MCMESSAGEIDTYPEDEF", "MCLANGUAGE", "MCMESSAGEID", "MCSEVERITY", + "MCFACILITY", "MCSYMBOLICNAME", "MCNUMBER", "'='", "'('", "')'", "':'", + "'+'", "$accept", "input", "entities", "entity", "global_section", + "severitymaps", "severitymap", "facilitymaps", "facilitymap", "langmaps", + "langmap", "alias_name", "message", "@1", "id", "vid", "sefasy_def", + "severity", "facility", "symbol", "lang_entities", "lang_entity", + "lines", "comments", "lang", "token", "lex_want_nl", "lex_want_line", + "lex_want_filename", 0 +}; +#endif + +# ifdef YYPRINT +/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to + token YYLEX-NUM. */ +static const yytype_uint16 yytoknum[] = +{ + 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, + 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, + 275, 61, 40, 41, 58, 43 +}; +# endif + +/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ +static const yytype_uint8 yyr1[] = +{ + 0, 26, 27, 28, 28, 29, 29, 29, 29, 30, + 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, + 30, 30, 30, 30, 30, 31, 31, 31, 32, 32, + 32, 33, 33, 33, 34, 34, 34, 35, 35, 35, + 36, 36, 36, 36, 36, 37, 37, 37, 39, 38, + 40, 40, 40, 41, 41, 41, 41, 42, 42, 42, + 42, 43, 44, 45, 46, 46, 47, 48, 48, 48, + 48, 49, 49, 50, 50, 50, 50, 50, 51, 51, + 52, 53, 54 +}; + +/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ +static const yytype_uint8 yyr2[] = +{ + 0, 2, 1, 0, 2, 1, 1, 1, 1, 5, + 5, 3, 2, 5, 5, 3, 2, 5, 5, 3, + 2, 3, 3, 3, 2, 1, 2, 1, 4, 3, + 2, 1, 2, 1, 4, 3, 2, 1, 2, 1, + 6, 6, 4, 3, 2, 0, 2, 2, 0, 4, + 3, 3, 2, 0, 1, 2, 2, 0, 2, 2, + 2, 3, 3, 3, 1, 2, 4, 1, 2, 1, + 2, 1, 2, 5, 5, 5, 4, 2, 1, 1, + 0, 0, 0 +}; + +/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state + STATE-NUM when YYTABLE doesn't specify something else to do. Zero + means the default is an error. */ +static const yytype_uint8 yydefact[] = +{ + 3, 0, 0, 1, 8, 71, 0, 0, 0, 0, + 0, 0, 4, 5, 6, 57, 7, 16, 0, 20, + 0, 12, 0, 0, 24, 0, 52, 0, 48, 72, + 15, 0, 19, 0, 11, 0, 21, 23, 22, 51, + 54, 0, 50, 0, 0, 0, 0, 58, 59, 60, + 39, 78, 79, 0, 37, 0, 33, 0, 31, 0, + 27, 0, 25, 0, 56, 55, 0, 0, 0, 0, + 49, 64, 81, 14, 13, 38, 44, 0, 18, 17, + 32, 36, 0, 10, 9, 26, 30, 0, 61, 62, + 63, 77, 0, 65, 0, 43, 0, 35, 45, 29, + 45, 0, 69, 67, 0, 42, 0, 0, 34, 28, + 76, 78, 79, 0, 70, 68, 66, 0, 47, 46, + 74, 73, 75, 41, 40 +}; + +/* YYDEFGOTO[NTERM-NUM]. */ +static const yytype_int8 yydefgoto[] = +{ + -1, 1, 2, 12, 13, 61, 62, 57, 58, 53, + 54, 108, 14, 46, 15, 42, 28, 47, 48, 49, + 70, 71, 104, 16, 72, 55, 92, 94, 106 +}; + +/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing + STATE-NUM. */ +#define YYPACT_NINF -34 +static const yytype_int8 yypact[] = +{ + -34, 62, 70, -34, -34, -34, 15, 22, 30, -15, + 34, 37, -34, -34, -34, -34, 56, -34, 10, -34, + 12, -34, 20, 25, -34, 52, -34, 0, 80, -34, + -34, 71, -34, 84, -34, 86, -34, -34, -34, -34, + -34, 45, -34, 1, 68, 74, 76, -34, -34, -34, + -34, -34, -34, 4, -34, 38, -34, 6, -34, 39, + -34, 29, -34, 40, -34, -34, 93, 94, 99, 43, + 76, -34, -34, -34, -34, -34, -34, 46, -34, -34, + -34, -34, 47, -34, -34, -34, -34, 49, -34, -34, + -34, -34, 83, -34, 3, -34, 2, -34, 81, -34, + 81, 92, -34, -34, 48, -34, 82, 72, -34, -34, + -34, 104, 105, 108, -34, -34, -34, 73, -34, -34, + -34, -34, -34, -34, -34 +}; + +/* YYPGOTO[NTERM-NUM]. */ +static const yytype_int8 yypgoto[] = +{ + -34, -34, -34, -34, -34, -34, 50, -34, 53, -34, + 59, 13, -34, -34, -34, -34, -34, -34, -34, -34, + -34, 44, -34, -34, -34, -33, -34, -34, -34 +}; + +/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If + positive, shift that token. If negative, reduce the rule which + number is the opposite. If zero, do what YYDEFACT says. + If YYTABLE_NINF, syntax error. */ +#define YYTABLE_NINF -83 +static const yytype_int8 yytable[] = +{ + 59, 39, 63, 105, 102, 73, 23, 78, 51, 103, + 51, 30, 52, 32, 52, -53, 17, -53, -53, -53, + 40, 34, 66, 19, 59, 41, -82, 74, 63, 79, + 83, 21, 31, 51, 33, 24, 18, 52, 26, 76, + 81, 86, 35, 20, 91, 36, 64, 95, 97, 114, + 99, 22, 84, 37, 115, 25, 38, 116, 27, 77, + 82, 87, 3, 29, -80, 65, 96, 98, 113, 100, + -2, 4, 50, 118, 123, 51, 119, 5, 124, 52, + 6, 7, 8, 9, 10, 56, 11, 60, 51, 67, + 51, 69, 52, 110, 52, 68, 111, 43, 44, 45, + 112, 88, 89, 90, 101, 107, 117, 120, 121, 122, + 80, 85, 75, 109, 93 +}; + +static const yytype_uint8 yycheck[] = +{ + 33, 1, 35, 1, 1, 1, 21, 1, 4, 6, + 4, 1, 8, 1, 8, 15, 1, 17, 18, 19, + 20, 1, 21, 1, 57, 25, 24, 23, 61, 23, + 1, 1, 22, 4, 22, 1, 21, 8, 1, 1, + 1, 1, 22, 21, 1, 20, 1, 1, 1, 1, + 1, 21, 23, 1, 6, 21, 4, 9, 21, 21, + 21, 21, 0, 7, 21, 20, 20, 20, 101, 20, + 0, 1, 1, 1, 1, 4, 4, 7, 5, 8, + 10, 11, 12, 13, 14, 1, 16, 1, 4, 21, + 4, 15, 8, 1, 8, 21, 4, 17, 18, 19, + 8, 8, 8, 4, 21, 24, 24, 3, 3, 1, + 57, 61, 53, 100, 70 +}; + +/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing + symbol of state STATE-NUM. */ +static const yytype_uint8 yystos[] = +{ + 0, 27, 28, 0, 1, 7, 10, 11, 12, 13, + 14, 16, 29, 30, 38, 40, 49, 1, 21, 1, + 21, 1, 21, 21, 1, 21, 1, 21, 42, 7, + 1, 22, 1, 22, 1, 22, 20, 1, 4, 1, + 20, 25, 41, 17, 18, 19, 39, 43, 44, 45, + 1, 4, 8, 35, 36, 51, 1, 33, 34, 51, + 1, 31, 32, 51, 1, 20, 21, 21, 21, 15, + 46, 47, 50, 1, 23, 36, 1, 21, 1, 23, + 34, 1, 21, 1, 23, 32, 1, 21, 8, 8, + 4, 1, 52, 47, 53, 1, 20, 1, 20, 1, + 20, 21, 1, 6, 48, 1, 54, 24, 37, 37, + 1, 4, 8, 51, 1, 6, 9, 24, 1, 4, + 3, 3, 1, 1, 5 +}; + +#define yyerrok (yyerrstatus = 0) +#define yyclearin (yychar = YYEMPTY) +#define YYEMPTY (-2) +#define YYEOF 0 + +#define YYACCEPT goto yyacceptlab +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab + + +/* Like YYERROR except do call yyerror. This remains here temporarily + to ease the transition to the new meaning of YYERROR, for GCC. + Once GCC version 2 has supplanted version 1, this can go. */ + +#define YYFAIL goto yyerrlab + +#define YYRECOVERING() (!!yyerrstatus) + +#define YYBACKUP(Token, Value) \ +do \ + if (yychar == YYEMPTY && yylen == 1) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ + YYPOPSTACK (1); \ + goto yybackup; \ + } \ + else \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ +while (YYID (0)) + + +#define YYTERROR 1 +#define YYERRCODE 256 + + +/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. + If N is 0, then set CURRENT to the empty location which ends + the previous symbol: RHS[0] (always defined). */ + +#define YYRHSLOC(Rhs, K) ((Rhs)[K]) +#ifndef YYLLOC_DEFAULT +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ + if (YYID (N)) \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ + while (YYID (0)) +#endif + + +/* YY_LOCATION_PRINT -- Print the location on the stream. + This macro was not mandated originally: define only if we know + we won't break user code: when these are the locations we know. */ + +#ifndef YY_LOCATION_PRINT +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) +# else +# define YY_LOCATION_PRINT(File, Loc) ((void) 0) +# endif +#endif + + +/* YYLEX -- calling `yylex' with the right arguments. */ + +#ifdef YYLEX_PARAM +# define YYLEX yylex (YYLEX_PARAM) +#else +# define YYLEX yylex () +#endif + +/* Enable debugging if requested. */ +#if YYDEBUG + +# ifndef YYFPRINTF +# include /* INFRINGES ON USER NAME SPACE */ +# define YYFPRINTF fprintf +# endif + +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ +} while (YYID (0)) + +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yy_symbol_print (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ +} while (YYID (0)) + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_value_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (!yyvaluep) + return; +# ifdef YYPRINT + if (yytype < YYNTOKENS) + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# else + YYUSE (yyoutput); +# endif + switch (yytype) + { + default: + break; + } +} + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (yytype < YYNTOKENS) + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + else + YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + + yy_symbol_value_print (yyoutput, yytype, yyvaluep); + YYFPRINTF (yyoutput, ")"); +} + +/*------------------------------------------------------------------. +| yy_stack_print -- Print the state stack from its BOTTOM up to its | +| TOP (included). | +`------------------------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_stack_print (yytype_int16 *bottom, yytype_int16 *top) +#else +static void +yy_stack_print (bottom, top) + yytype_int16 *bottom; + yytype_int16 *top; +#endif +{ + YYFPRINTF (stderr, "Stack now"); + for (; bottom <= top; ++bottom) + YYFPRINTF (stderr, " %d", *bottom); + YYFPRINTF (stderr, "\n"); +} + +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ +} while (YYID (0)) + + +/*------------------------------------------------. +| Report that the YYRULE is going to be reduced. | +`------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_reduce_print (YYSTYPE *yyvsp, int yyrule) +#else +static void +yy_reduce_print (yyvsp, yyrule) + YYSTYPE *yyvsp; + int yyrule; +#endif +{ + int yynrhs = yyr2[yyrule]; + int yyi; + unsigned long int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", + yyrule - 1, yylno); + /* The symbols being reduced. */ + for (yyi = 0; yyi < yynrhs; yyi++) + { + fprintf (stderr, " $%d = ", yyi + 1); + yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], + &(yyvsp[(yyi + 1) - (yynrhs)]) + ); + fprintf (stderr, "\n"); + } +} + +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ + yy_reduce_print (yyvsp, Rule); \ +} while (YYID (0)) + +/* Nonzero means print parse trace. It is left uninitialized so that + multiple parsers can coexist. */ +int yydebug; +#else /* !YYDEBUG */ +# define YYDPRINTF(Args) +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YY_STACK_PRINT(Bottom, Top) +# define YY_REDUCE_PRINT(Rule) +#endif /* !YYDEBUG */ + + +/* YYINITDEPTH -- initial size of the parser's stacks. */ +#ifndef YYINITDEPTH +# define YYINITDEPTH 200 +#endif + +/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only + if the built-in stack extension method is used). + + Do not make this value too large; the results are undefined if + YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + evaluated with infinite-precision integer arithmetic. */ + +#ifndef YYMAXDEPTH +# define YYMAXDEPTH 10000 +#endif + + + +#if YYERROR_VERBOSE + +# ifndef yystrlen +# if defined __GLIBC__ && defined _STRING_H +# define yystrlen strlen +# else +/* Return the length of YYSTR. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static YYSIZE_T +yystrlen (const char *yystr) +#else +static YYSIZE_T +yystrlen (yystr) + const char *yystr; +#endif +{ + YYSIZE_T yylen; + for (yylen = 0; yystr[yylen]; yylen++) + continue; + return yylen; +} +# endif +# endif + +# ifndef yystpcpy +# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE +# define yystpcpy stpcpy +# else +/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in + YYDEST. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static char * +yystpcpy (char *yydest, const char *yysrc) +#else +static char * +yystpcpy (yydest, yysrc) + char *yydest; + const char *yysrc; +#endif +{ + char *yyd = yydest; + const char *yys = yysrc; + + while ((*yyd++ = *yys++) != '\0') + continue; + + return yyd - 1; +} +# endif +# endif + +# ifndef yytnamerr +/* Copy to YYRES the contents of YYSTR after stripping away unnecessary + quotes and backslashes, so that it's suitable for yyerror. The + heuristic is that double-quoting is unnecessary unless the string + contains an apostrophe, a comma, or backslash (other than + backslash-backslash). YYSTR is taken from yytname. If YYRES is + null, do not copy; instead, return the length of what the result + would have been. */ +static YYSIZE_T +yytnamerr (char *yyres, const char *yystr) +{ + if (*yystr == '"') + { + YYSIZE_T yyn = 0; + char const *yyp = yystr; + + for (;;) + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; + + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; + + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } + do_not_strip_quotes: ; + } + + if (! yyres) + return yystrlen (yystr); + + return yystpcpy (yyres, yystr) - yyres; +} +# endif + +/* Copy into YYRESULT an error message about the unexpected token + YYCHAR while in state YYSTATE. Return the number of bytes copied, + including the terminating null byte. If YYRESULT is null, do not + copy anything; just return the number of bytes that would be + copied. As a special case, return 0 if an ordinary "syntax error" + message will do. Return YYSIZE_MAXIMUM if overflow occurs during + size calculation. */ +static YYSIZE_T +yysyntax_error (char *yyresult, int yystate, int yychar) +{ + int yyn = yypact[yystate]; + + if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) + return 0; + else + { + int yytype = YYTRANSLATE (yychar); + YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); + YYSIZE_T yysize = yysize0; + YYSIZE_T yysize1; + int yysize_overflow = 0; + enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; + char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + int yyx; + +# if 0 + /* This is so xgettext sees the translatable formats that are + constructed on the fly. */ + YY_("syntax error, unexpected %s"); + YY_("syntax error, unexpected %s, expecting %s"); + YY_("syntax error, unexpected %s, expecting %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); +# endif + char *yyfmt; + char const *yyf; + static char const yyunexpected[] = "syntax error, unexpected %s"; + static char const yyexpecting[] = ", expecting %s"; + static char const yyor[] = " or %s"; + char yyformat[sizeof yyunexpected + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; + char const *yyprefix = yyexpecting; + + /* Start YYX at -YYN if negative to avoid negative indexes in + YYCHECK. */ + int yyxbegin = yyn < 0 ? -yyn : 0; + + /* Stay within bounds of both yycheck and yytname. */ + int yychecklim = YYLAST - yyn + 1; + int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; + int yycount = 1; + + yyarg[0] = yytname[yytype]; + yyfmt = yystpcpy (yyformat, yyunexpected); + + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } + + yyf = YY_(yyformat); + yysize1 = yysize + yystrlen (yyf); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + + if (yysize_overflow) + return YYSIZE_MAXIMUM; + + if (yyresult) + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yyresult; + int yyi = 0; + while ((*yyp = *yyf) != '\0') + { + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } + } + } + return yysize; + } +} +#endif /* YYERROR_VERBOSE */ + + +/*-----------------------------------------------. +| Release the memory associated to this symbol. | +`-----------------------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +#else +static void +yydestruct (yymsg, yytype, yyvaluep) + const char *yymsg; + int yytype; + YYSTYPE *yyvaluep; +#endif +{ + YYUSE (yyvaluep); + + if (!yymsg) + yymsg = "Deleting"; + YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); + + switch (yytype) + { + + default: + break; + } +} + + +/* Prevent warnings from -Wmissing-prototypes. */ + +#ifdef YYPARSE_PARAM +#if defined __STDC__ || defined __cplusplus +int yyparse (void *YYPARSE_PARAM); +#else +int yyparse (); +#endif +#else /* ! YYPARSE_PARAM */ +#if defined __STDC__ || defined __cplusplus +int yyparse (void); +#else +int yyparse (); +#endif +#endif /* ! YYPARSE_PARAM */ + + + +/* The look-ahead symbol. */ +int yychar; + +/* The semantic value of the look-ahead symbol. */ +YYSTYPE yylval; + +/* Number of syntax errors so far. */ +int yynerrs; + + + +/*----------. +| yyparse. | +`----------*/ + +#ifdef YYPARSE_PARAM +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void *YYPARSE_PARAM) +#else +int +yyparse (YYPARSE_PARAM) + void *YYPARSE_PARAM; +#endif +#else /* ! YYPARSE_PARAM */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void) +#else +int +yyparse () + +#endif +#endif +{ + + int yystate; + int yyn; + int yyresult; + /* Number of tokens to shift before error messages enabled. */ + int yyerrstatus; + /* Look-ahead token as an internal (translated) token number. */ + int yytoken = 0; +#if YYERROR_VERBOSE + /* Buffer for error messages, and its allocated size. */ + char yymsgbuf[128]; + char *yymsg = yymsgbuf; + YYSIZE_T yymsg_alloc = sizeof yymsgbuf; +#endif + + /* Three stacks and their tools: + `yyss': related to states, + `yyvs': related to semantic values, + `yyls': related to locations. + + Refer to the stacks thru separate pointers, to allow yyoverflow + to reallocate them elsewhere. */ + + /* The state stack. */ + yytype_int16 yyssa[YYINITDEPTH]; + yytype_int16 *yyss = yyssa; + yytype_int16 *yyssp; + + /* The semantic value stack. */ + YYSTYPE yyvsa[YYINITDEPTH]; + YYSTYPE *yyvs = yyvsa; + YYSTYPE *yyvsp; + + + +#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) + + YYSIZE_T yystacksize = YYINITDEPTH; + + /* The variables used to return semantic value and location from the + action routines. */ + YYSTYPE yyval; + + + /* The number of symbols on the RHS of the reduced rule. + Keep to zero when no symbol should be popped. */ + int yylen = 0; + + YYDPRINTF ((stderr, "Starting parse\n")); + + yystate = 0; + yyerrstatus = 0; + yynerrs = 0; + yychar = YYEMPTY; /* Cause a token to be read. */ + + /* Initialize stack pointers. + Waste one element of value and location stack + so that they stay on the same level as the state stack. + The wasted elements are never initialized. */ + + yyssp = yyss; + yyvsp = yyvs; + + goto yysetstate; + +/*------------------------------------------------------------. +| yynewstate -- Push a new state, which is found in yystate. | +`------------------------------------------------------------*/ + yynewstate: + /* In all cases, when you get here, the value and location stacks + have just been pushed. So pushing a state here evens the stacks. */ + yyssp++; + + yysetstate: + *yyssp = yystate; + + if (yyss + yystacksize - 1 <= yyssp) + { + /* Get the current used size of the three stacks, in elements. */ + YYSIZE_T yysize = yyssp - yyss + 1; + +#ifdef yyoverflow + { + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + yytype_int16 *yyss1 = yyss; + + + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), + + &yystacksize); + + yyss = yyss1; + yyvs = yyvs1; + } +#else /* no yyoverflow */ +# ifndef YYSTACK_RELOCATE + goto yyexhaustedlab; +# else + /* Extend the stack our own way. */ + if (YYMAXDEPTH <= yystacksize) + goto yyexhaustedlab; + yystacksize *= 2; + if (YYMAXDEPTH < yystacksize) + yystacksize = YYMAXDEPTH; + + { + yytype_int16 *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss); + YYSTACK_RELOCATE (yyvs); + +# undef YYSTACK_RELOCATE + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); + } +# endif +#endif /* no yyoverflow */ + + yyssp = yyss + yysize - 1; + yyvsp = yyvs + yysize - 1; + + + YYDPRINTF ((stderr, "Stack size increased to %lu\n", + (unsigned long int) yystacksize)); + + if (yyss + yystacksize - 1 <= yyssp) + YYABORT; + } + + YYDPRINTF ((stderr, "Entering state %d\n", yystate)); + + goto yybackup; + +/*-----------. +| yybackup. | +`-----------*/ +yybackup: + + /* Do appropriate processing given the current state. Read a + look-ahead token if we need one and don't already have one. */ + + /* First try to decide what to do without reference to look-ahead token. */ + yyn = yypact[yystate]; + if (yyn == YYPACT_NINF) + goto yydefault; + + /* Not known => get a look-ahead token if don't already have one. */ + + /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ + if (yychar == YYEMPTY) + { + YYDPRINTF ((stderr, "Reading a token: ")); + yychar = YYLEX; + } + + if (yychar <= YYEOF) + { + yychar = yytoken = YYEOF; + YYDPRINTF ((stderr, "Now at end of input.\n")); + } + else + { + yytoken = YYTRANSLATE (yychar); + YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + } + + /* If the proper action on seeing token YYTOKEN is to reduce or to + detect an error, take that action. */ + yyn += yytoken; + if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) + goto yydefault; + yyn = yytable[yyn]; + if (yyn <= 0) + { + if (yyn == 0 || yyn == YYTABLE_NINF) + goto yyerrlab; + yyn = -yyn; + goto yyreduce; + } + + if (yyn == YYFINAL) + YYACCEPT; + + /* Count tokens shifted since error; after three, turn off error + status. */ + if (yyerrstatus) + yyerrstatus--; + + /* Shift the look-ahead token. */ + YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + + /* Discard the shifted token unless it is eof. */ + if (yychar != YYEOF) + yychar = YYEMPTY; + + yystate = yyn; + *++yyvsp = yylval; + + goto yynewstate; + + +/*-----------------------------------------------------------. +| yydefault -- do the default action for the current state. | +`-----------------------------------------------------------*/ +yydefault: + yyn = yydefact[yystate]; + if (yyn == 0) + goto yyerrlab; + goto yyreduce; + + +/*-----------------------------. +| yyreduce -- Do a reduction. | +`-----------------------------*/ +yyreduce: + /* yyn is the number of a rule to reduce with. */ + yylen = yyr2[yyn]; + + /* If YYLEN is nonzero, implement the default value of the action: + `$$ = $1'. + + Otherwise, the following line sets YYVAL to garbage. + This behavior is undocumented and Bison + users should not rely upon it. Assigning to YYVAL + unconditionally makes the parser a bit smaller, and it avoids a + GCC warning that YYVAL may be used uninitialized. */ + yyval = yyvsp[1-yylen]; + + + YY_REDUCE_PRINT (yyn); + switch (yyn) + { + case 7: +#line 77 "mcparse.y" + { + cur_node = mc_add_node (); + cur_node->user_text = (yyvsp[(1) - (1)].ustr); + } + break; + + case 8: +#line 81 "mcparse.y" + { mc_fatal ("syntax error"); } + break; + + case 10: +#line 86 "mcparse.y" + { mc_fatal ("missing ')' in SeverityNames"); } + break; + + case 11: +#line 87 "mcparse.y" + { mc_fatal ("missing '(' in SeverityNames"); } + break; + + case 12: +#line 88 "mcparse.y" + { mc_fatal ("missing '=' for SeverityNames"); } + break; + + case 14: +#line 90 "mcparse.y" + { mc_fatal ("missing ')' in LanguageNames"); } + break; + + case 15: +#line 91 "mcparse.y" + { mc_fatal ("missing '(' in LanguageNames"); } + break; + + case 16: +#line 92 "mcparse.y" + { mc_fatal ("missing '=' for LanguageNames"); } + break; + + case 18: +#line 94 "mcparse.y" + { mc_fatal ("missing ')' in FacilityNames"); } + break; + + case 19: +#line 95 "mcparse.y" + { mc_fatal ("missing '(' in FacilityNames"); } + break; + + case 20: +#line 96 "mcparse.y" + { mc_fatal ("missing '=' for FacilityNames"); } + break; + + case 21: +#line 98 "mcparse.y" + { + if ((yyvsp[(3) - (3)].ival) != 10 && (yyvsp[(3) - (3)].ival) != 16) + mc_fatal ("OutputBase allows 10 or 16 as value"); + mcset_out_values_are_decimal = ((yyvsp[(3) - (3)].ival) == 10 ? 1 : 0); + } + break; + + case 22: +#line 104 "mcparse.y" + { + mcset_msg_id_typedef = (yyvsp[(3) - (3)].ustr); + } + break; + + case 23: +#line 108 "mcparse.y" + { + mc_fatal ("MessageIdTypedef expects an identifier"); + } + break; + + case 24: +#line 112 "mcparse.y" + { + mc_fatal ("missing '=' for MessageIdTypedef"); + } + break; + + case 27: +#line 120 "mcparse.y" + { mc_fatal ("severity ident missing"); } + break; + + case 28: +#line 125 "mcparse.y" + { + mc_add_keyword ((yyvsp[(1) - (4)].ustr), MCTOKEN, "severity", (yyvsp[(3) - (4)].ival), (yyvsp[(4) - (4)].ustr)); + } + break; + + case 29: +#line 128 "mcparse.y" + { mc_fatal ("severity number missing"); } + break; + + case 30: +#line 129 "mcparse.y" + { mc_fatal ("severity missing '='"); } + break; + + case 33: +#line 135 "mcparse.y" + { mc_fatal ("missing ident in FacilityNames"); } + break; + + case 34: +#line 140 "mcparse.y" + { + mc_add_keyword ((yyvsp[(1) - (4)].ustr), MCTOKEN, "facility", (yyvsp[(3) - (4)].ival), (yyvsp[(4) - (4)].ustr)); + } + break; + + case 35: +#line 143 "mcparse.y" + { mc_fatal ("facility number missing"); } + break; + + case 36: +#line 144 "mcparse.y" + { mc_fatal ("facility missing '='"); } + break; + + case 39: +#line 150 "mcparse.y" + { mc_fatal ("missing ident in LanguageNames"); } + break; + + case 40: +#line 155 "mcparse.y" + { + mc_add_keyword ((yyvsp[(1) - (6)].ustr), MCTOKEN, "language", (yyvsp[(3) - (6)].ival), (yyvsp[(6) - (6)].ustr)); + } + break; + + case 41: +#line 158 "mcparse.y" + { mc_fatal ("missing filename in LanguageNames"); } + break; + + case 42: +#line 159 "mcparse.y" + { mc_fatal ("missing ':' in LanguageNames"); } + break; + + case 43: +#line 160 "mcparse.y" + { mc_fatal ("missing language code in LanguageNames"); } + break; + + case 44: +#line 161 "mcparse.y" + { mc_fatal ("missing '=' for LanguageNames"); } + break; + + case 45: +#line 166 "mcparse.y" + { + (yyval.ustr) = NULL; + } + break; + + case 46: +#line 170 "mcparse.y" + { + (yyval.ustr) = (yyvsp[(2) - (2)].ustr); + } + break; + + case 47: +#line 173 "mcparse.y" + { mc_fatal ("illegal token in identifier"); (yyval.ustr) = NULL; } + break; + + case 48: +#line 178 "mcparse.y" + { + cur_node = mc_add_node (); + cur_node->symbol = mc_last_symbol; + cur_node->facility = mc_cur_facility; + cur_node->severity = mc_cur_severity; + cur_node->id = ((yyvsp[(1) - (2)].ival) & 0xffffUL); + cur_node->vid = ((yyvsp[(1) - (2)].ival) & 0xffffUL) | mc_sefa_val; + mc_last_id = (yyvsp[(1) - (2)].ival); + } + break; + + case 50: +#line 190 "mcparse.y" + { (yyval.ival) = (yyvsp[(3) - (3)].ival); } + break; + + case 51: +#line 191 "mcparse.y" + { mc_fatal ("missing number in MessageId"); (yyval.ival) = 0; } + break; + + case 52: +#line 192 "mcparse.y" + { mc_fatal ("missing '=' for MessageId"); (yyval.ival) = 0; } + break; + + case 53: +#line 196 "mcparse.y" + { + (yyval.ival) = ++mc_last_id; + } + break; + + case 54: +#line 200 "mcparse.y" + { + (yyval.ival) = (yyvsp[(1) - (1)].ival); + } + break; + + case 55: +#line 204 "mcparse.y" + { + (yyval.ival) = mc_last_id + (yyvsp[(2) - (2)].ival); + } + break; + + case 56: +#line 207 "mcparse.y" + { mc_fatal ("missing number after MessageId '+'"); } + break; + + case 57: +#line 212 "mcparse.y" + { + (yyval.ival) = 0; + mc_sefa_val = (mcset_custom_bit ? 1 : 0) << 29; + mc_last_symbol = NULL; + mc_cur_severity = NULL; + mc_cur_facility = NULL; + } + break; + + case 58: +#line 220 "mcparse.y" + { + if ((yyvsp[(1) - (2)].ival) & 1) + mc_warn (_("duplicate definition of Severity")); + (yyval.ival) = (yyvsp[(1) - (2)].ival) | 1; + } + break; + + case 59: +#line 226 "mcparse.y" + { + if ((yyvsp[(1) - (2)].ival) & 2) + mc_warn (_("duplicate definition of Facility")); + (yyval.ival) = (yyvsp[(1) - (2)].ival) | 2; + } + break; + + case 60: +#line 232 "mcparse.y" + { + if ((yyvsp[(1) - (2)].ival) & 4) + mc_warn (_("duplicate definition of SymbolicName")); + (yyval.ival) = (yyvsp[(1) - (2)].ival) | 4; + } + break; + + case 61: +#line 240 "mcparse.y" + { + mc_sefa_val &= ~ (0x3UL << 30); + mc_sefa_val |= (((yyvsp[(3) - (3)].tok)->nval & 0x3UL) << 30); + mc_cur_severity = (yyvsp[(3) - (3)].tok); + } + break; + + case 62: +#line 248 "mcparse.y" + { + mc_sefa_val &= ~ (0xfffUL << 16); + mc_sefa_val |= (((yyvsp[(3) - (3)].tok)->nval & 0xfffUL) << 16); + mc_cur_facility = (yyvsp[(3) - (3)].tok); + } + break; + + case 63: +#line 256 "mcparse.y" + { + mc_last_symbol = (yyvsp[(3) - (3)].ustr); + } + break; + + case 66: +#line 268 "mcparse.y" + { + mc_node_lang *h; + h = mc_add_node_lang (cur_node, (yyvsp[(1) - (4)].tok), cur_node->vid); + h->message = (yyvsp[(3) - (4)].ustr); + if (mcset_max_message_length != 0 && unichar_len (h->message) > mcset_max_message_length) + mc_warn ("message length to long"); + } + break; + + case 67: +#line 278 "mcparse.y" + { + (yyval.ustr) = (yyvsp[(1) - (1)].ustr); + } + break; + + case 68: +#line 282 "mcparse.y" + { + unichar *h; + rc_uint_type l1,l2; + l1 = unichar_len ((yyvsp[(1) - (2)].ustr)); + l2 = unichar_len ((yyvsp[(2) - (2)].ustr)); + h = (unichar *) res_alloc ((l1 + l2 + 1) * sizeof (unichar)); + if (l1) memcpy (h, (yyvsp[(1) - (2)].ustr), l1 * sizeof (unichar)); + if (l2) memcpy (&h[l1], (yyvsp[(2) - (2)].ustr), l2 * sizeof (unichar)); + h[l1 + l2] = 0; + (yyval.ustr) = h; + } + break; + + case 69: +#line 293 "mcparse.y" + { mc_fatal ("missing end of message text"); (yyval.ustr) = NULL; } + break; + + case 70: +#line 294 "mcparse.y" + { mc_fatal ("missing end of message text"); (yyval.ustr) = (yyvsp[(1) - (2)].ustr); } + break; + + case 71: +#line 297 "mcparse.y" + { (yyval.ustr) = (yyvsp[(1) - (1)].ustr); } + break; + + case 72: +#line 299 "mcparse.y" + { + unichar *h; + rc_uint_type l1,l2; + l1 = unichar_len ((yyvsp[(1) - (2)].ustr)); + l2 = unichar_len ((yyvsp[(2) - (2)].ustr)); + h = (unichar *) res_alloc ((l1 + l2 + 1) * sizeof (unichar)); + if (l1) memcpy (h, (yyvsp[(1) - (2)].ustr), l1 * sizeof (unichar)); + if (l2) memcpy (&h[l1], (yyvsp[(2) - (2)].ustr), l2 * sizeof (unichar)); + h[l1 + l2] = 0; + (yyval.ustr) = h; + } + break; + + case 73: +#line 313 "mcparse.y" + { + (yyval.tok) = (yyvsp[(4) - (5)].tok); + } + break; + + case 74: +#line 317 "mcparse.y" + { + (yyval.tok) = NULL; + mc_fatal (_("undeclared language identifier")); + } + break; + + case 75: +#line 322 "mcparse.y" + { + (yyval.tok) = NULL; + mc_fatal ("missing newline after Language"); + } + break; + + case 76: +#line 327 "mcparse.y" + { + (yyval.tok) = NULL; + mc_fatal ("missing ident for Language"); + } + break; + + case 77: +#line 332 "mcparse.y" + { + (yyval.tok) = NULL; + mc_fatal ("missing '=' for Language"); + } + break; + + case 78: +#line 338 "mcparse.y" + { (yyval.ustr) = (yyvsp[(1) - (1)].ustr); } + break; + + case 79: +#line 339 "mcparse.y" + { (yyval.ustr) = (yyvsp[(1) - (1)].tok)->usz; } + break; + + case 80: +#line 343 "mcparse.y" + { mclex_want_nl = 1; } + break; + + case 81: +#line 347 "mcparse.y" + { mclex_want_line = 1; } + break; + + case 82: +#line 351 "mcparse.y" + { mclex_want_filename = 1; } + break; + + +/* Line 1267 of yacc.c. */ +#line 1939 "mcparse.c" + default: break; + } + YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); + + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + + *++yyvsp = yyval; + + + /* Now `shift' the result of the reduction. Determine what state + that goes to, based on the state we popped back to and the rule + number reduced by. */ + + yyn = yyr1[yyn]; + + yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; + if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yytable[yystate]; + else + yystate = yydefgoto[yyn - YYNTOKENS]; + + goto yynewstate; + + +/*------------------------------------. +| yyerrlab -- here on detecting error | +`------------------------------------*/ +yyerrlab: + /* If not already recovering from an error, report this error. */ + if (!yyerrstatus) + { + ++yynerrs; +#if ! YYERROR_VERBOSE + yyerror (YY_("syntax error")); +#else + { + YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); + if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) + { + YYSIZE_T yyalloc = 2 * yysize; + if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) + yyalloc = YYSTACK_ALLOC_MAXIMUM; + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); + yymsg = (char *) YYSTACK_ALLOC (yyalloc); + if (yymsg) + yymsg_alloc = yyalloc; + else + { + yymsg = yymsgbuf; + yymsg_alloc = sizeof yymsgbuf; + } + } + + if (0 < yysize && yysize <= yymsg_alloc) + { + (void) yysyntax_error (yymsg, yystate, yychar); + yyerror (yymsg); + } + else + { + yyerror (YY_("syntax error")); + if (yysize != 0) + goto yyexhaustedlab; + } + } +#endif + } + + + + if (yyerrstatus == 3) + { + /* If just tried and failed to reuse look-ahead token after an + error, discard it. */ + + if (yychar <= YYEOF) + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } + else + { + yydestruct ("Error: discarding", + yytoken, &yylval); + yychar = YYEMPTY; + } + } + + /* Else will try to reuse look-ahead token after shifting the error + token. */ + goto yyerrlab1; + + +/*---------------------------------------------------. +| yyerrorlab -- error raised explicitly by YYERROR. | +`---------------------------------------------------*/ +yyerrorlab: + + /* Pacify compilers like GCC when the user code never invokes + YYERROR and the label yyerrorlab therefore never appears in user + code. */ + if (/*CONSTCOND*/ 0) + goto yyerrorlab; + + /* Do not reclaim the symbols of the rule which action triggered + this YYERROR. */ + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + yystate = *yyssp; + goto yyerrlab1; + + +/*-------------------------------------------------------------. +| yyerrlab1 -- common code for both syntax error and YYERROR. | +`-------------------------------------------------------------*/ +yyerrlab1: + yyerrstatus = 3; /* Each real token shifted decrements this. */ + + for (;;) + { + yyn = yypact[yystate]; + if (yyn != YYPACT_NINF) + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } + + /* Pop the current state because it cannot handle the error token. */ + if (yyssp == yyss) + YYABORT; + + + yydestruct ("Error: popping", + yystos[yystate], yyvsp); + YYPOPSTACK (1); + yystate = *yyssp; + YY_STACK_PRINT (yyss, yyssp); + } + + if (yyn == YYFINAL) + YYACCEPT; + + *++yyvsp = yylval; + + + /* Shift the error token. */ + YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); + + yystate = yyn; + goto yynewstate; + + +/*-------------------------------------. +| yyacceptlab -- YYACCEPT comes here. | +`-------------------------------------*/ +yyacceptlab: + yyresult = 0; + goto yyreturn; + +/*-----------------------------------. +| yyabortlab -- YYABORT comes here. | +`-----------------------------------*/ +yyabortlab: + yyresult = 1; + goto yyreturn; + +#ifndef yyoverflow +/*-------------------------------------------------. +| yyexhaustedlab -- memory exhaustion comes here. | +`-------------------------------------------------*/ +yyexhaustedlab: + yyerror (YY_("memory exhausted")); + yyresult = 2; + /* Fall through. */ +#endif + +yyreturn: + if (yychar != YYEOF && yychar != YYEMPTY) + yydestruct ("Cleanup: discarding lookahead", + yytoken, &yylval); + /* Do not reclaim the symbols of the rule which action triggered + this YYABORT or YYACCEPT. */ + YYPOPSTACK (yylen); + YY_STACK_PRINT (yyss, yyssp); + while (yyssp != yyss) + { + yydestruct ("Cleanup: popping", + yystos[*yyssp], yyvsp); + YYPOPSTACK (1); + } +#ifndef yyoverflow + if (yyss != yyssa) + YYSTACK_FREE (yyss); +#endif +#if YYERROR_VERBOSE + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); +#endif + /* Make sure YYID is used. */ + return YYID (yyresult); +} + + +#line 354 "mcparse.y" + + +/* Something else. */ + diff --git a/binutils/mcparse.h b/binutils/mcparse.h new file mode 100644 index 0000000..ea4bfe6 --- /dev/null +++ b/binutils/mcparse.h @@ -0,0 +1,103 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton interface for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + NL = 258, + MCIDENT = 259, + MCFILENAME = 260, + MCLINE = 261, + MCCOMMENT = 262, + MCTOKEN = 263, + MCENDLINE = 264, + MCLANGUAGENAMES = 265, + MCFACILITYNAMES = 266, + MCSEVERITYNAMES = 267, + MCOUTPUTBASE = 268, + MCMESSAGEIDTYPEDEF = 269, + MCLANGUAGE = 270, + MCMESSAGEID = 271, + MCSEVERITY = 272, + MCFACILITY = 273, + MCSYMBOLICNAME = 274, + MCNUMBER = 275 + }; +#endif +/* Tokens. */ +#define NL 258 +#define MCIDENT 259 +#define MCFILENAME 260 +#define MCLINE 261 +#define MCCOMMENT 262 +#define MCTOKEN 263 +#define MCENDLINE 264 +#define MCLANGUAGENAMES 265 +#define MCFACILITYNAMES 266 +#define MCSEVERITYNAMES 267 +#define MCOUTPUTBASE 268 +#define MCMESSAGEIDTYPEDEF 269 +#define MCLANGUAGE 270 +#define MCMESSAGEID 271 +#define MCSEVERITY 272 +#define MCFACILITY 273 +#define MCSYMBOLICNAME 274 +#define MCNUMBER 275 + + + + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 45 "mcparse.y" +{ + rc_uint_type ival; + unichar *ustr; + const mc_keyword *tok; + mc_node *nod; +} +/* Line 1529 of yacc.c. */ +#line 96 "mcparse.h" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + +extern YYSTYPE yylval; + diff --git a/binutils/nlmheader.c b/binutils/nlmheader.c new file mode 100644 index 0000000..cd7e17d --- /dev/null +++ b/binutils/nlmheader.c @@ -0,0 +1,2698 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton implementation for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* C LALR(1) parser skeleton written by Richard Stallman, by + simplifying the original so-called "semantic" parser. */ + +/* All symbols defined below should begin with yy or YY, to avoid + infringing on user name space. This should be done even for local + variables, as they might otherwise be expanded by user macros. + There are some unavoidable exceptions within include files to + define necessary library symbols; they are noted "INFRINGES ON + USER NAME SPACE" below. */ + +/* Identify Bison output. */ +#define YYBISON 1 + +/* Bison version. */ +#define YYBISON_VERSION "2.3" + +/* Skeleton name. */ +#define YYSKELETON_NAME "yacc.c" + +/* Pure parsers. */ +#define YYPURE 0 + +/* Using locations. */ +#define YYLSP_NEEDED 0 + + + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + CHECK = 258, + CODESTART = 259, + COPYRIGHT = 260, + CUSTOM = 261, + DATE = 262, + DEBUG_K = 263, + DESCRIPTION = 264, + EXIT = 265, + EXPORT = 266, + FLAG_ON = 267, + FLAG_OFF = 268, + FULLMAP = 269, + HELP = 270, + IMPORT = 271, + INPUT = 272, + MAP = 273, + MESSAGES = 274, + MODULE = 275, + MULTIPLE = 276, + OS_DOMAIN = 277, + OUTPUT = 278, + PSEUDOPREEMPTION = 279, + REENTRANT = 280, + SCREENNAME = 281, + SHARELIB = 282, + STACK = 283, + START = 284, + SYNCHRONIZE = 285, + THREADNAME = 286, + TYPE = 287, + VERBOSE = 288, + VERSIONK = 289, + XDCDATA = 290, + STRING = 291, + QUOTED_STRING = 292 + }; +#endif +/* Tokens. */ +#define CHECK 258 +#define CODESTART 259 +#define COPYRIGHT 260 +#define CUSTOM 261 +#define DATE 262 +#define DEBUG_K 263 +#define DESCRIPTION 264 +#define EXIT 265 +#define EXPORT 266 +#define FLAG_ON 267 +#define FLAG_OFF 268 +#define FULLMAP 269 +#define HELP 270 +#define IMPORT 271 +#define INPUT 272 +#define MAP 273 +#define MESSAGES 274 +#define MODULE 275 +#define MULTIPLE 276 +#define OS_DOMAIN 277 +#define OUTPUT 278 +#define PSEUDOPREEMPTION 279 +#define REENTRANT 280 +#define SCREENNAME 281 +#define SHARELIB 282 +#define STACK 283 +#define START 284 +#define SYNCHRONIZE 285 +#define THREADNAME 286 +#define TYPE 287 +#define VERBOSE 288 +#define VERSIONK 289 +#define XDCDATA 290 +#define STRING 291 +#define QUOTED_STRING 292 + + + + +/* Copy the first part of user declarations. */ +#line 1 "nlmheader.y" +/* nlmheader.y - parse NLM header specification keywords. + Copyright 1993, 1994, 1995, 1997, 1998, 2001, 2002, 2003, 2005, 2007, + 2010 Free Software Foundation, Inc. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +/* Written by Ian Lance Taylor . + + This bison file parses the commands recognized by the NetWare NLM + linker, except for lists of object files. It stores the + information in global variables. + + This implementation is based on the description in the NetWare Tool + Maker Specification manual, edition 1.0. */ + +#include "sysdep.h" +#include "safe-ctype.h" +#include "bfd.h" +#include "nlm/common.h" +#include "nlm/internal.h" +#include "bucomm.h" +#include "nlmconv.h" + +/* Information is stored in the structures pointed to by these + variables. */ + +Nlm_Internal_Fixed_Header *fixed_hdr; +Nlm_Internal_Variable_Header *var_hdr; +Nlm_Internal_Version_Header *version_hdr; +Nlm_Internal_Copyright_Header *copyright_hdr; +Nlm_Internal_Extended_Header *extended_hdr; + +/* Procedure named by CHECK. */ +char *check_procedure; +/* File named by CUSTOM. */ +char *custom_file; +/* Whether to generate debugging information (DEBUG). */ +bfd_boolean debug_info; +/* Procedure named by EXIT. */ +char *exit_procedure; +/* Exported symbols (EXPORT). */ +struct string_list *export_symbols; +/* List of files from INPUT. */ +struct string_list *input_files; +/* Map file name (MAP, FULLMAP). */ +char *map_file; +/* Whether a full map has been requested (FULLMAP). */ +bfd_boolean full_map; +/* File named by HELP. */ +char *help_file; +/* Imported symbols (IMPORT). */ +struct string_list *import_symbols; +/* File named by MESSAGES. */ +char *message_file; +/* Autoload module list (MODULE). */ +struct string_list *modules; +/* File named by OUTPUT. */ +char *output_file; +/* File named by SHARELIB. */ +char *sharelib_file; +/* Start procedure name (START). */ +char *start_procedure; +/* VERBOSE. */ +bfd_boolean verbose; +/* RPC description file (XDCDATA). */ +char *rpc_file; + +/* The number of serious errors that have occurred. */ +int parse_errors; + +/* The current symbol prefix when reading a list of import or export + symbols. */ +static char *symbol_prefix; + +/* Parser error message handler. */ +#define yyerror(msg) nlmheader_error (msg); + +/* Local functions. */ +static int yylex (void); +static void nlmlex_file_push (const char *); +static bfd_boolean nlmlex_file_open (const char *); +static int nlmlex_buf_init (void); +static char nlmlex_buf_add (int); +static long nlmlex_get_number (const char *); +static void nlmheader_identify (void); +static void nlmheader_warn (const char *, int); +static void nlmheader_error (const char *); +static struct string_list * string_list_cons (char *, struct string_list *); +static struct string_list * string_list_append (struct string_list *, + struct string_list *); +static struct string_list * string_list_append1 (struct string_list *, + char *); +static char *xstrdup (const char *); + + + +/* Enabling traces. */ +#ifndef YYDEBUG +# define YYDEBUG 0 +#endif + +/* Enabling verbose error messages. */ +#ifdef YYERROR_VERBOSE +# undef YYERROR_VERBOSE +# define YYERROR_VERBOSE 1 +#else +# define YYERROR_VERBOSE 0 +#endif + +/* Enabling the token table. */ +#ifndef YYTOKEN_TABLE +# define YYTOKEN_TABLE 0 +#endif + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 113 "nlmheader.y" +{ + char *string; + struct string_list *list; +} +/* Line 193 of yacc.c. */ +#line 286 "nlmheader.c" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + + + +/* Copy the second part of user declarations. */ + + +/* Line 216 of yacc.c. */ +#line 299 "nlmheader.c" + +#ifdef short +# undef short +#endif + +#ifdef YYTYPE_UINT8 +typedef YYTYPE_UINT8 yytype_uint8; +#else +typedef unsigned char yytype_uint8; +#endif + +#ifdef YYTYPE_INT8 +typedef YYTYPE_INT8 yytype_int8; +#elif (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +typedef signed char yytype_int8; +#else +typedef short int yytype_int8; +#endif + +#ifdef YYTYPE_UINT16 +typedef YYTYPE_UINT16 yytype_uint16; +#else +typedef unsigned short int yytype_uint16; +#endif + +#ifdef YYTYPE_INT16 +typedef YYTYPE_INT16 yytype_int16; +#else +typedef short int yytype_int16; +#endif + +#ifndef YYSIZE_T +# ifdef __SIZE_TYPE__ +# define YYSIZE_T __SIZE_TYPE__ +# elif defined size_t +# define YYSIZE_T size_t +# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# else +# define YYSIZE_T unsigned int +# endif +#endif + +#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) + +#ifndef YY_ +# if defined YYENABLE_NLS && YYENABLE_NLS +# if ENABLE_NLS +# include /* INFRINGES ON USER NAME SPACE */ +# define YY_(msgid) dgettext ("bison-runtime", msgid) +# endif +# endif +# ifndef YY_ +# define YY_(msgid) msgid +# endif +#endif + +/* Suppress unused-variable warnings by "using" E. */ +#if ! defined lint || defined __GNUC__ +# define YYUSE(e) ((void) (e)) +#else +# define YYUSE(e) /* empty */ +#endif + +/* Identity function, used to suppress warnings about constant conditions. */ +#ifndef lint +# define YYID(n) (n) +#else +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static int +YYID (int i) +#else +static int +YYID (i) + int i; +#endif +{ + return i; +} +#endif + +#if ! defined yyoverflow || YYERROR_VERBOSE + +/* The parser invokes alloca or malloc; define the necessary symbols. */ + +# ifdef YYSTACK_USE_ALLOCA +# if YYSTACK_USE_ALLOCA +# ifdef __GNUC__ +# define YYSTACK_ALLOC __builtin_alloca +# elif defined __BUILTIN_VA_ARG_INCR +# include /* INFRINGES ON USER NAME SPACE */ +# elif defined _AIX +# define YYSTACK_ALLOC __alloca +# elif defined _MSC_VER +# include /* INFRINGES ON USER NAME SPACE */ +# define alloca _alloca +# else +# define YYSTACK_ALLOC alloca +# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# endif +# endif +# endif + +# ifdef YYSTACK_ALLOC + /* Pacify GCC's `empty if-body' warning. */ +# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) +# ifndef YYSTACK_ALLOC_MAXIMUM + /* The OS might guarantee only one guard page at the bottom of the stack, + and a page size can be as small as 4096 bytes. So we cannot safely + invoke alloca (N) if N exceeds 4096. Use a slightly smaller number + to allow for a few compiler-allocated temporary stack slots. */ +# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ +# endif +# else +# define YYSTACK_ALLOC YYMALLOC +# define YYSTACK_FREE YYFREE +# ifndef YYSTACK_ALLOC_MAXIMUM +# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM +# endif +# if (defined __cplusplus && ! defined _STDLIB_H \ + && ! ((defined YYMALLOC || defined malloc) \ + && (defined YYFREE || defined free))) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# ifndef YYMALLOC +# define YYMALLOC malloc +# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifndef YYFREE +# define YYFREE free +# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void free (void *); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# endif +#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ + + +#if (! defined yyoverflow \ + && (! defined __cplusplus \ + || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) + +/* A type that is properly aligned for any stack member. */ +union yyalloc +{ + yytype_int16 yyss; + YYSTYPE yyvs; + }; + +/* The size of the maximum gap between one aligned stack and the next. */ +# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) + +/* The size of an array large to enough to hold all stacks, each with + N elements. */ +# define YYSTACK_BYTES(N) \ + ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ + + YYSTACK_GAP_MAXIMUM) + +/* Copy COUNT objects from FROM to TO. The source and destination do + not overlap. */ +# ifndef YYCOPY +# if defined __GNUC__ && 1 < __GNUC__ +# define YYCOPY(To, From, Count) \ + __builtin_memcpy (To, From, (Count) * sizeof (*(From))) +# else +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ + while (YYID (0)) +# endif +# endif + +/* Relocate STACK from its old location to the new one. The + local variables YYSIZE and YYSTACKSIZE give the old and new number of + elements in the stack, and YYPTR gives the new location of the + stack. Advance YYPTR to a properly aligned location for the next + stack. */ +# define YYSTACK_RELOCATE(Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack, Stack, yysize); \ + Stack = &yyptr->Stack; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ + while (YYID (0)) + +#endif + +/* YYFINAL -- State number of the termination state. */ +#define YYFINAL 64 +/* YYLAST -- Last index in YYTABLE. */ +#define YYLAST 73 + +/* YYNTOKENS -- Number of terminals. */ +#define YYNTOKENS 40 +/* YYNNTS -- Number of nonterminals. */ +#define YYNNTS 11 +/* YYNRULES -- Number of rules. */ +#define YYNRULES 52 +/* YYNRULES -- Number of states. */ +#define YYNSTATES 82 + +/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ +#define YYUNDEFTOK 2 +#define YYMAXUTOK 292 + +#define YYTRANSLATE(YYX) \ + ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + +/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ +static const yytype_uint8 yytranslate[] = +{ + 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 38, 39, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 35, 36, 37 +}; + +#if YYDEBUG +/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in + YYRHS. */ +static const yytype_uint8 yyprhs[] = +{ + 0, 0, 3, 5, 6, 9, 12, 15, 18, 21, + 26, 28, 31, 34, 35, 39, 42, 45, 47, 50, + 53, 54, 58, 61, 63, 66, 69, 72, 74, 76, + 79, 81, 83, 86, 89, 92, 95, 97, 100, 103, + 105, 110, 114, 117, 118, 120, 122, 124, 127, 130, + 134, 136, 137 +}; + +/* YYRHS -- A `-1'-separated list of the rules' RHS. */ +static const yytype_int8 yyrhs[] = +{ + 41, 0, -1, 42, -1, -1, 43, 42, -1, 3, + 36, -1, 4, 36, -1, 5, 37, -1, 6, 36, + -1, 7, 36, 36, 36, -1, 8, -1, 9, 37, + -1, 10, 36, -1, -1, 11, 44, 46, -1, 12, + 36, -1, 13, 36, -1, 14, -1, 14, 36, -1, + 15, 36, -1, -1, 16, 45, 46, -1, 17, 50, + -1, 18, -1, 18, 36, -1, 19, 36, -1, 20, + 50, -1, 21, -1, 22, -1, 23, 36, -1, 24, + -1, 25, -1, 26, 37, -1, 27, 36, -1, 28, + 36, -1, 29, 36, -1, 30, -1, 31, 37, -1, + 32, 36, -1, 33, -1, 34, 36, 36, 36, -1, + 34, 36, 36, -1, 35, 36, -1, -1, 47, -1, + 49, -1, 48, -1, 47, 49, -1, 47, 48, -1, + 38, 36, 39, -1, 36, -1, -1, 36, 50, -1 +}; + +/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ +static const yytype_uint16 yyrline[] = +{ + 0, 144, 144, 149, 151, 157, 161, 166, 183, 187, + 205, 209, 225, 230, 229, 237, 242, 247, 252, 257, + 262, 261, 269, 273, 277, 281, 285, 289, 293, 297, + 304, 308, 312, 328, 332, 337, 341, 345, 361, 366, + 370, 394, 410, 420, 423, 434, 438, 442, 446, 455, + 466, 483, 486 +}; +#endif + +#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE +/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. + First, the terminals, then, starting at YYNTOKENS, nonterminals. */ +static const char *const yytname[] = +{ + "$end", "error", "$undefined", "CHECK", "CODESTART", "COPYRIGHT", + "CUSTOM", "DATE", "DEBUG_K", "DESCRIPTION", "EXIT", "EXPORT", "FLAG_ON", + "FLAG_OFF", "FULLMAP", "HELP", "IMPORT", "INPUT", "MAP", "MESSAGES", + "MODULE", "MULTIPLE", "OS_DOMAIN", "OUTPUT", "PSEUDOPREEMPTION", + "REENTRANT", "SCREENNAME", "SHARELIB", "STACK", "START", "SYNCHRONIZE", + "THREADNAME", "TYPE", "VERBOSE", "VERSIONK", "XDCDATA", "STRING", + "QUOTED_STRING", "'('", "')'", "$accept", "file", "commands", "command", + "@1", "@2", "symbol_list_opt", "symbol_list", "symbol_prefix", "symbol", + "string_list", 0 +}; +#endif + +# ifdef YYPRINT +/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to + token YYLEX-NUM. */ +static const yytype_uint16 yytoknum[] = +{ + 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, + 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, + 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, + 285, 286, 287, 288, 289, 290, 291, 292, 40, 41 +}; +# endif + +/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ +static const yytype_uint8 yyr1[] = +{ + 0, 40, 41, 42, 42, 43, 43, 43, 43, 43, + 43, 43, 43, 44, 43, 43, 43, 43, 43, 43, + 45, 43, 43, 43, 43, 43, 43, 43, 43, 43, + 43, 43, 43, 43, 43, 43, 43, 43, 43, 43, + 43, 43, 43, 46, 46, 47, 47, 47, 47, 48, + 49, 50, 50 +}; + +/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ +static const yytype_uint8 yyr2[] = +{ + 0, 2, 1, 0, 2, 2, 2, 2, 2, 4, + 1, 2, 2, 0, 3, 2, 2, 1, 2, 2, + 0, 3, 2, 1, 2, 2, 2, 1, 1, 2, + 1, 1, 2, 2, 2, 2, 1, 2, 2, 1, + 4, 3, 2, 0, 1, 1, 1, 2, 2, 3, + 1, 0, 2 +}; + +/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state + STATE-NUM when YYTABLE doesn't specify something else to do. Zero + means the default is an error. */ +static const yytype_uint8 yydefact[] = +{ + 3, 0, 0, 0, 0, 0, 10, 0, 0, 13, + 0, 0, 17, 0, 20, 51, 23, 0, 51, 27, + 28, 0, 30, 31, 0, 0, 0, 0, 36, 0, + 0, 39, 0, 0, 0, 2, 3, 5, 6, 7, + 8, 0, 11, 12, 43, 15, 16, 18, 19, 43, + 51, 22, 24, 25, 26, 29, 32, 33, 34, 35, + 37, 38, 0, 42, 1, 4, 0, 50, 0, 14, + 44, 46, 45, 21, 52, 41, 9, 0, 48, 47, + 40, 49 +}; + +/* YYDEFGOTO[NTERM-NUM]. */ +static const yytype_int8 yydefgoto[] = +{ + -1, 34, 35, 36, 44, 49, 69, 70, 71, 72, + 51 +}; + +/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing + STATE-NUM. */ +#define YYPACT_NINF -20 +static const yytype_int8 yypact[] = +{ + -3, -1, 1, 2, 4, 5, -20, 6, 8, -20, + 9, 10, 11, 12, -20, 13, 14, 16, 13, -20, + -20, 17, -20, -20, 18, 20, 21, 22, -20, 23, + 25, -20, 26, 27, 38, -20, -3, -20, -20, -20, + -20, 28, -20, -20, -2, -20, -20, -20, -20, -2, + 13, -20, -20, -20, -20, -20, -20, -20, -20, -20, + -20, -20, 30, -20, -20, -20, 31, -20, 32, -20, + -2, -20, -20, -20, -20, 33, -20, 3, -20, -20, + -20, -20 +}; + +/* YYPGOTO[NTERM-NUM]. */ +static const yytype_int8 yypgoto[] = +{ + -20, -20, 34, -20, -20, -20, 24, -20, -19, -16, + 15 +}; + +/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If + positive, shift that token. If negative, reduce the rule which + number is the opposite. If zero, do what YYDEFACT says. + If YYTABLE_NINF, syntax error. */ +#define YYTABLE_NINF -1 +static const yytype_uint8 yytable[] = +{ + 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, + 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 54, 67, 37, 68, 38, 64, 39, + 40, 41, 81, 42, 43, 45, 46, 47, 48, 50, + 52, 78, 53, 55, 79, 56, 57, 58, 59, 0, + 60, 61, 62, 63, 66, 74, 75, 76, 77, 80, + 65, 0, 0, 73 +}; + +static const yytype_int8 yycheck[] = +{ + 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, + 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, + 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, + 33, 34, 35, 18, 36, 36, 38, 36, 0, 37, + 36, 36, 39, 37, 36, 36, 36, 36, 36, 36, + 36, 70, 36, 36, 70, 37, 36, 36, 36, -1, + 37, 36, 36, 36, 36, 50, 36, 36, 36, 36, + 36, -1, -1, 49 +}; + +/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing + symbol of state STATE-NUM. */ +static const yytype_uint8 yystos[] = +{ + 0, 3, 4, 5, 6, 7, 8, 9, 10, 11, + 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, + 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, + 32, 33, 34, 35, 41, 42, 43, 36, 36, 37, + 36, 36, 37, 36, 44, 36, 36, 36, 36, 45, + 36, 50, 36, 36, 50, 36, 37, 36, 36, 36, + 37, 36, 36, 36, 0, 42, 36, 36, 38, 46, + 47, 48, 49, 46, 50, 36, 36, 36, 48, 49, + 36, 39 +}; + +#define yyerrok (yyerrstatus = 0) +#define yyclearin (yychar = YYEMPTY) +#define YYEMPTY (-2) +#define YYEOF 0 + +#define YYACCEPT goto yyacceptlab +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab + + +/* Like YYERROR except do call yyerror. This remains here temporarily + to ease the transition to the new meaning of YYERROR, for GCC. + Once GCC version 2 has supplanted version 1, this can go. */ + +#define YYFAIL goto yyerrlab + +#define YYRECOVERING() (!!yyerrstatus) + +#define YYBACKUP(Token, Value) \ +do \ + if (yychar == YYEMPTY && yylen == 1) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ + YYPOPSTACK (1); \ + goto yybackup; \ + } \ + else \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ +while (YYID (0)) + + +#define YYTERROR 1 +#define YYERRCODE 256 + + +/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. + If N is 0, then set CURRENT to the empty location which ends + the previous symbol: RHS[0] (always defined). */ + +#define YYRHSLOC(Rhs, K) ((Rhs)[K]) +#ifndef YYLLOC_DEFAULT +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ + if (YYID (N)) \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ + while (YYID (0)) +#endif + + +/* YY_LOCATION_PRINT -- Print the location on the stream. + This macro was not mandated originally: define only if we know + we won't break user code: when these are the locations we know. */ + +#ifndef YY_LOCATION_PRINT +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) +# else +# define YY_LOCATION_PRINT(File, Loc) ((void) 0) +# endif +#endif + + +/* YYLEX -- calling `yylex' with the right arguments. */ + +#ifdef YYLEX_PARAM +# define YYLEX yylex (YYLEX_PARAM) +#else +# define YYLEX yylex () +#endif + +/* Enable debugging if requested. */ +#if YYDEBUG + +# ifndef YYFPRINTF +# include /* INFRINGES ON USER NAME SPACE */ +# define YYFPRINTF fprintf +# endif + +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ +} while (YYID (0)) + +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yy_symbol_print (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ +} while (YYID (0)) + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_value_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (!yyvaluep) + return; +# ifdef YYPRINT + if (yytype < YYNTOKENS) + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# else + YYUSE (yyoutput); +# endif + switch (yytype) + { + default: + break; + } +} + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (yytype < YYNTOKENS) + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + else + YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + + yy_symbol_value_print (yyoutput, yytype, yyvaluep); + YYFPRINTF (yyoutput, ")"); +} + +/*------------------------------------------------------------------. +| yy_stack_print -- Print the state stack from its BOTTOM up to its | +| TOP (included). | +`------------------------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_stack_print (yytype_int16 *bottom, yytype_int16 *top) +#else +static void +yy_stack_print (bottom, top) + yytype_int16 *bottom; + yytype_int16 *top; +#endif +{ + YYFPRINTF (stderr, "Stack now"); + for (; bottom <= top; ++bottom) + YYFPRINTF (stderr, " %d", *bottom); + YYFPRINTF (stderr, "\n"); +} + +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ +} while (YYID (0)) + + +/*------------------------------------------------. +| Report that the YYRULE is going to be reduced. | +`------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_reduce_print (YYSTYPE *yyvsp, int yyrule) +#else +static void +yy_reduce_print (yyvsp, yyrule) + YYSTYPE *yyvsp; + int yyrule; +#endif +{ + int yynrhs = yyr2[yyrule]; + int yyi; + unsigned long int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", + yyrule - 1, yylno); + /* The symbols being reduced. */ + for (yyi = 0; yyi < yynrhs; yyi++) + { + fprintf (stderr, " $%d = ", yyi + 1); + yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], + &(yyvsp[(yyi + 1) - (yynrhs)]) + ); + fprintf (stderr, "\n"); + } +} + +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ + yy_reduce_print (yyvsp, Rule); \ +} while (YYID (0)) + +/* Nonzero means print parse trace. It is left uninitialized so that + multiple parsers can coexist. */ +int yydebug; +#else /* !YYDEBUG */ +# define YYDPRINTF(Args) +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YY_STACK_PRINT(Bottom, Top) +# define YY_REDUCE_PRINT(Rule) +#endif /* !YYDEBUG */ + + +/* YYINITDEPTH -- initial size of the parser's stacks. */ +#ifndef YYINITDEPTH +# define YYINITDEPTH 200 +#endif + +/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only + if the built-in stack extension method is used). + + Do not make this value too large; the results are undefined if + YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + evaluated with infinite-precision integer arithmetic. */ + +#ifndef YYMAXDEPTH +# define YYMAXDEPTH 10000 +#endif + + + +#if YYERROR_VERBOSE + +# ifndef yystrlen +# if defined __GLIBC__ && defined _STRING_H +# define yystrlen strlen +# else +/* Return the length of YYSTR. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static YYSIZE_T +yystrlen (const char *yystr) +#else +static YYSIZE_T +yystrlen (yystr) + const char *yystr; +#endif +{ + YYSIZE_T yylen; + for (yylen = 0; yystr[yylen]; yylen++) + continue; + return yylen; +} +# endif +# endif + +# ifndef yystpcpy +# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE +# define yystpcpy stpcpy +# else +/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in + YYDEST. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static char * +yystpcpy (char *yydest, const char *yysrc) +#else +static char * +yystpcpy (yydest, yysrc) + char *yydest; + const char *yysrc; +#endif +{ + char *yyd = yydest; + const char *yys = yysrc; + + while ((*yyd++ = *yys++) != '\0') + continue; + + return yyd - 1; +} +# endif +# endif + +# ifndef yytnamerr +/* Copy to YYRES the contents of YYSTR after stripping away unnecessary + quotes and backslashes, so that it's suitable for yyerror. The + heuristic is that double-quoting is unnecessary unless the string + contains an apostrophe, a comma, or backslash (other than + backslash-backslash). YYSTR is taken from yytname. If YYRES is + null, do not copy; instead, return the length of what the result + would have been. */ +static YYSIZE_T +yytnamerr (char *yyres, const char *yystr) +{ + if (*yystr == '"') + { + YYSIZE_T yyn = 0; + char const *yyp = yystr; + + for (;;) + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; + + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; + + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } + do_not_strip_quotes: ; + } + + if (! yyres) + return yystrlen (yystr); + + return yystpcpy (yyres, yystr) - yyres; +} +# endif + +/* Copy into YYRESULT an error message about the unexpected token + YYCHAR while in state YYSTATE. Return the number of bytes copied, + including the terminating null byte. If YYRESULT is null, do not + copy anything; just return the number of bytes that would be + copied. As a special case, return 0 if an ordinary "syntax error" + message will do. Return YYSIZE_MAXIMUM if overflow occurs during + size calculation. */ +static YYSIZE_T +yysyntax_error (char *yyresult, int yystate, int yychar) +{ + int yyn = yypact[yystate]; + + if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) + return 0; + else + { + int yytype = YYTRANSLATE (yychar); + YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); + YYSIZE_T yysize = yysize0; + YYSIZE_T yysize1; + int yysize_overflow = 0; + enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; + char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + int yyx; + +# if 0 + /* This is so xgettext sees the translatable formats that are + constructed on the fly. */ + YY_("syntax error, unexpected %s"); + YY_("syntax error, unexpected %s, expecting %s"); + YY_("syntax error, unexpected %s, expecting %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); +# endif + char *yyfmt; + char const *yyf; + static char const yyunexpected[] = "syntax error, unexpected %s"; + static char const yyexpecting[] = ", expecting %s"; + static char const yyor[] = " or %s"; + char yyformat[sizeof yyunexpected + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; + char const *yyprefix = yyexpecting; + + /* Start YYX at -YYN if negative to avoid negative indexes in + YYCHECK. */ + int yyxbegin = yyn < 0 ? -yyn : 0; + + /* Stay within bounds of both yycheck and yytname. */ + int yychecklim = YYLAST - yyn + 1; + int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; + int yycount = 1; + + yyarg[0] = yytname[yytype]; + yyfmt = yystpcpy (yyformat, yyunexpected); + + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } + + yyf = YY_(yyformat); + yysize1 = yysize + yystrlen (yyf); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + + if (yysize_overflow) + return YYSIZE_MAXIMUM; + + if (yyresult) + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yyresult; + int yyi = 0; + while ((*yyp = *yyf) != '\0') + { + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } + } + } + return yysize; + } +} +#endif /* YYERROR_VERBOSE */ + + +/*-----------------------------------------------. +| Release the memory associated to this symbol. | +`-----------------------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +#else +static void +yydestruct (yymsg, yytype, yyvaluep) + const char *yymsg; + int yytype; + YYSTYPE *yyvaluep; +#endif +{ + YYUSE (yyvaluep); + + if (!yymsg) + yymsg = "Deleting"; + YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); + + switch (yytype) + { + + default: + break; + } +} + + +/* Prevent warnings from -Wmissing-prototypes. */ + +#ifdef YYPARSE_PARAM +#if defined __STDC__ || defined __cplusplus +int yyparse (void *YYPARSE_PARAM); +#else +int yyparse (); +#endif +#else /* ! YYPARSE_PARAM */ +#if defined __STDC__ || defined __cplusplus +int yyparse (void); +#else +int yyparse (); +#endif +#endif /* ! YYPARSE_PARAM */ + + + +/* The look-ahead symbol. */ +int yychar; + +/* The semantic value of the look-ahead symbol. */ +YYSTYPE yylval; + +/* Number of syntax errors so far. */ +int yynerrs; + + + +/*----------. +| yyparse. | +`----------*/ + +#ifdef YYPARSE_PARAM +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void *YYPARSE_PARAM) +#else +int +yyparse (YYPARSE_PARAM) + void *YYPARSE_PARAM; +#endif +#else /* ! YYPARSE_PARAM */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void) +#else +int +yyparse () + +#endif +#endif +{ + + int yystate; + int yyn; + int yyresult; + /* Number of tokens to shift before error messages enabled. */ + int yyerrstatus; + /* Look-ahead token as an internal (translated) token number. */ + int yytoken = 0; +#if YYERROR_VERBOSE + /* Buffer for error messages, and its allocated size. */ + char yymsgbuf[128]; + char *yymsg = yymsgbuf; + YYSIZE_T yymsg_alloc = sizeof yymsgbuf; +#endif + + /* Three stacks and their tools: + `yyss': related to states, + `yyvs': related to semantic values, + `yyls': related to locations. + + Refer to the stacks thru separate pointers, to allow yyoverflow + to reallocate them elsewhere. */ + + /* The state stack. */ + yytype_int16 yyssa[YYINITDEPTH]; + yytype_int16 *yyss = yyssa; + yytype_int16 *yyssp; + + /* The semantic value stack. */ + YYSTYPE yyvsa[YYINITDEPTH]; + YYSTYPE *yyvs = yyvsa; + YYSTYPE *yyvsp; + + + +#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) + + YYSIZE_T yystacksize = YYINITDEPTH; + + /* The variables used to return semantic value and location from the + action routines. */ + YYSTYPE yyval; + + + /* The number of symbols on the RHS of the reduced rule. + Keep to zero when no symbol should be popped. */ + int yylen = 0; + + YYDPRINTF ((stderr, "Starting parse\n")); + + yystate = 0; + yyerrstatus = 0; + yynerrs = 0; + yychar = YYEMPTY; /* Cause a token to be read. */ + + /* Initialize stack pointers. + Waste one element of value and location stack + so that they stay on the same level as the state stack. + The wasted elements are never initialized. */ + + yyssp = yyss; + yyvsp = yyvs; + + goto yysetstate; + +/*------------------------------------------------------------. +| yynewstate -- Push a new state, which is found in yystate. | +`------------------------------------------------------------*/ + yynewstate: + /* In all cases, when you get here, the value and location stacks + have just been pushed. So pushing a state here evens the stacks. */ + yyssp++; + + yysetstate: + *yyssp = yystate; + + if (yyss + yystacksize - 1 <= yyssp) + { + /* Get the current used size of the three stacks, in elements. */ + YYSIZE_T yysize = yyssp - yyss + 1; + +#ifdef yyoverflow + { + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + yytype_int16 *yyss1 = yyss; + + + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), + + &yystacksize); + + yyss = yyss1; + yyvs = yyvs1; + } +#else /* no yyoverflow */ +# ifndef YYSTACK_RELOCATE + goto yyexhaustedlab; +# else + /* Extend the stack our own way. */ + if (YYMAXDEPTH <= yystacksize) + goto yyexhaustedlab; + yystacksize *= 2; + if (YYMAXDEPTH < yystacksize) + yystacksize = YYMAXDEPTH; + + { + yytype_int16 *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss); + YYSTACK_RELOCATE (yyvs); + +# undef YYSTACK_RELOCATE + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); + } +# endif +#endif /* no yyoverflow */ + + yyssp = yyss + yysize - 1; + yyvsp = yyvs + yysize - 1; + + + YYDPRINTF ((stderr, "Stack size increased to %lu\n", + (unsigned long int) yystacksize)); + + if (yyss + yystacksize - 1 <= yyssp) + YYABORT; + } + + YYDPRINTF ((stderr, "Entering state %d\n", yystate)); + + goto yybackup; + +/*-----------. +| yybackup. | +`-----------*/ +yybackup: + + /* Do appropriate processing given the current state. Read a + look-ahead token if we need one and don't already have one. */ + + /* First try to decide what to do without reference to look-ahead token. */ + yyn = yypact[yystate]; + if (yyn == YYPACT_NINF) + goto yydefault; + + /* Not known => get a look-ahead token if don't already have one. */ + + /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ + if (yychar == YYEMPTY) + { + YYDPRINTF ((stderr, "Reading a token: ")); + yychar = YYLEX; + } + + if (yychar <= YYEOF) + { + yychar = yytoken = YYEOF; + YYDPRINTF ((stderr, "Now at end of input.\n")); + } + else + { + yytoken = YYTRANSLATE (yychar); + YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + } + + /* If the proper action on seeing token YYTOKEN is to reduce or to + detect an error, take that action. */ + yyn += yytoken; + if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) + goto yydefault; + yyn = yytable[yyn]; + if (yyn <= 0) + { + if (yyn == 0 || yyn == YYTABLE_NINF) + goto yyerrlab; + yyn = -yyn; + goto yyreduce; + } + + if (yyn == YYFINAL) + YYACCEPT; + + /* Count tokens shifted since error; after three, turn off error + status. */ + if (yyerrstatus) + yyerrstatus--; + + /* Shift the look-ahead token. */ + YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + + /* Discard the shifted token unless it is eof. */ + if (yychar != YYEOF) + yychar = YYEMPTY; + + yystate = yyn; + *++yyvsp = yylval; + + goto yynewstate; + + +/*-----------------------------------------------------------. +| yydefault -- do the default action for the current state. | +`-----------------------------------------------------------*/ +yydefault: + yyn = yydefact[yystate]; + if (yyn == 0) + goto yyerrlab; + goto yyreduce; + + +/*-----------------------------. +| yyreduce -- Do a reduction. | +`-----------------------------*/ +yyreduce: + /* yyn is the number of a rule to reduce with. */ + yylen = yyr2[yyn]; + + /* If YYLEN is nonzero, implement the default value of the action: + `$$ = $1'. + + Otherwise, the following line sets YYVAL to garbage. + This behavior is undocumented and Bison + users should not rely upon it. Assigning to YYVAL + unconditionally makes the parser a bit smaller, and it avoids a + GCC warning that YYVAL may be used uninitialized. */ + yyval = yyvsp[1-yylen]; + + + YY_REDUCE_PRINT (yyn); + switch (yyn) + { + case 5: +#line 158 "nlmheader.y" + { + check_procedure = (yyvsp[(2) - (2)].string); + } + break; + + case 6: +#line 162 "nlmheader.y" + { + nlmheader_warn (_("CODESTART is not implemented; sorry"), -1); + free ((yyvsp[(2) - (2)].string)); + } + break; + + case 7: +#line 167 "nlmheader.y" + { + int len; + + strncpy (copyright_hdr->stamp, "CoPyRiGhT=", 10); + len = strlen ((yyvsp[(2) - (2)].string)); + if (len >= NLM_MAX_COPYRIGHT_MESSAGE_LENGTH) + { + nlmheader_warn (_("copyright string is too long"), + NLM_MAX_COPYRIGHT_MESSAGE_LENGTH - 1); + len = NLM_MAX_COPYRIGHT_MESSAGE_LENGTH - 1; + } + copyright_hdr->copyrightMessageLength = len; + strncpy (copyright_hdr->copyrightMessage, (yyvsp[(2) - (2)].string), len); + copyright_hdr->copyrightMessage[len] = '\0'; + free ((yyvsp[(2) - (2)].string)); + } + break; + + case 8: +#line 184 "nlmheader.y" + { + custom_file = (yyvsp[(2) - (2)].string); + } + break; + + case 9: +#line 188 "nlmheader.y" + { + /* We don't set the version stamp here, because we use the + version stamp to detect whether the required VERSION + keyword was given. */ + version_hdr->month = nlmlex_get_number ((yyvsp[(2) - (4)].string)); + version_hdr->day = nlmlex_get_number ((yyvsp[(3) - (4)].string)); + version_hdr->year = nlmlex_get_number ((yyvsp[(4) - (4)].string)); + free ((yyvsp[(2) - (4)].string)); + free ((yyvsp[(3) - (4)].string)); + free ((yyvsp[(4) - (4)].string)); + if (version_hdr->month < 1 || version_hdr->month > 12) + nlmheader_warn (_("illegal month"), -1); + if (version_hdr->day < 1 || version_hdr->day > 31) + nlmheader_warn (_("illegal day"), -1); + if (version_hdr->year < 1900 || version_hdr->year > 3000) + nlmheader_warn (_("illegal year"), -1); + } + break; + + case 10: +#line 206 "nlmheader.y" + { + debug_info = TRUE; + } + break; + + case 11: +#line 210 "nlmheader.y" + { + int len; + + len = strlen ((yyvsp[(2) - (2)].string)); + if (len > NLM_MAX_DESCRIPTION_LENGTH) + { + nlmheader_warn (_("description string is too long"), + NLM_MAX_DESCRIPTION_LENGTH); + len = NLM_MAX_DESCRIPTION_LENGTH; + } + var_hdr->descriptionLength = len; + strncpy (var_hdr->descriptionText, (yyvsp[(2) - (2)].string), len); + var_hdr->descriptionText[len] = '\0'; + free ((yyvsp[(2) - (2)].string)); + } + break; + + case 12: +#line 226 "nlmheader.y" + { + exit_procedure = (yyvsp[(2) - (2)].string); + } + break; + + case 13: +#line 230 "nlmheader.y" + { + symbol_prefix = NULL; + } + break; + + case 14: +#line 234 "nlmheader.y" + { + export_symbols = string_list_append (export_symbols, (yyvsp[(3) - (3)].list)); + } + break; + + case 15: +#line 238 "nlmheader.y" + { + fixed_hdr->flags |= nlmlex_get_number ((yyvsp[(2) - (2)].string)); + free ((yyvsp[(2) - (2)].string)); + } + break; + + case 16: +#line 243 "nlmheader.y" + { + fixed_hdr->flags &=~ nlmlex_get_number ((yyvsp[(2) - (2)].string)); + free ((yyvsp[(2) - (2)].string)); + } + break; + + case 17: +#line 248 "nlmheader.y" + { + map_file = ""; + full_map = TRUE; + } + break; + + case 18: +#line 253 "nlmheader.y" + { + map_file = (yyvsp[(2) - (2)].string); + full_map = TRUE; + } + break; + + case 19: +#line 258 "nlmheader.y" + { + help_file = (yyvsp[(2) - (2)].string); + } + break; + + case 20: +#line 262 "nlmheader.y" + { + symbol_prefix = NULL; + } + break; + + case 21: +#line 266 "nlmheader.y" + { + import_symbols = string_list_append (import_symbols, (yyvsp[(3) - (3)].list)); + } + break; + + case 22: +#line 270 "nlmheader.y" + { + input_files = string_list_append (input_files, (yyvsp[(2) - (2)].list)); + } + break; + + case 23: +#line 274 "nlmheader.y" + { + map_file = ""; + } + break; + + case 24: +#line 278 "nlmheader.y" + { + map_file = (yyvsp[(2) - (2)].string); + } + break; + + case 25: +#line 282 "nlmheader.y" + { + message_file = (yyvsp[(2) - (2)].string); + } + break; + + case 26: +#line 286 "nlmheader.y" + { + modules = string_list_append (modules, (yyvsp[(2) - (2)].list)); + } + break; + + case 27: +#line 290 "nlmheader.y" + { + fixed_hdr->flags |= 0x2; + } + break; + + case 28: +#line 294 "nlmheader.y" + { + fixed_hdr->flags |= 0x10; + } + break; + + case 29: +#line 298 "nlmheader.y" + { + if (output_file == NULL) + output_file = (yyvsp[(2) - (2)].string); + else + nlmheader_warn (_("ignoring duplicate OUTPUT statement"), -1); + } + break; + + case 30: +#line 305 "nlmheader.y" + { + fixed_hdr->flags |= 0x8; + } + break; + + case 31: +#line 309 "nlmheader.y" + { + fixed_hdr->flags |= 0x1; + } + break; + + case 32: +#line 313 "nlmheader.y" + { + int len; + + len = strlen ((yyvsp[(2) - (2)].string)); + if (len >= NLM_MAX_SCREEN_NAME_LENGTH) + { + nlmheader_warn (_("screen name is too long"), + NLM_MAX_SCREEN_NAME_LENGTH); + len = NLM_MAX_SCREEN_NAME_LENGTH; + } + var_hdr->screenNameLength = len; + strncpy (var_hdr->screenName, (yyvsp[(2) - (2)].string), len); + var_hdr->screenName[NLM_MAX_SCREEN_NAME_LENGTH] = '\0'; + free ((yyvsp[(2) - (2)].string)); + } + break; + + case 33: +#line 329 "nlmheader.y" + { + sharelib_file = (yyvsp[(2) - (2)].string); + } + break; + + case 34: +#line 333 "nlmheader.y" + { + var_hdr->stackSize = nlmlex_get_number ((yyvsp[(2) - (2)].string)); + free ((yyvsp[(2) - (2)].string)); + } + break; + + case 35: +#line 338 "nlmheader.y" + { + start_procedure = (yyvsp[(2) - (2)].string); + } + break; + + case 36: +#line 342 "nlmheader.y" + { + fixed_hdr->flags |= 0x4; + } + break; + + case 37: +#line 346 "nlmheader.y" + { + int len; + + len = strlen ((yyvsp[(2) - (2)].string)); + if (len >= NLM_MAX_THREAD_NAME_LENGTH) + { + nlmheader_warn (_("thread name is too long"), + NLM_MAX_THREAD_NAME_LENGTH); + len = NLM_MAX_THREAD_NAME_LENGTH; + } + var_hdr->threadNameLength = len; + strncpy (var_hdr->threadName, (yyvsp[(2) - (2)].string), len); + var_hdr->threadName[len] = '\0'; + free ((yyvsp[(2) - (2)].string)); + } + break; + + case 38: +#line 362 "nlmheader.y" + { + fixed_hdr->moduleType = nlmlex_get_number ((yyvsp[(2) - (2)].string)); + free ((yyvsp[(2) - (2)].string)); + } + break; + + case 39: +#line 367 "nlmheader.y" + { + verbose = TRUE; + } + break; + + case 40: +#line 371 "nlmheader.y" + { + long val; + + strncpy (version_hdr->stamp, "VeRsIoN#", 8); + version_hdr->majorVersion = nlmlex_get_number ((yyvsp[(2) - (4)].string)); + val = nlmlex_get_number ((yyvsp[(3) - (4)].string)); + if (val < 0 || val > 99) + nlmheader_warn (_("illegal minor version number (must be between 0 and 99)"), + -1); + else + version_hdr->minorVersion = val; + val = nlmlex_get_number ((yyvsp[(4) - (4)].string)); + if (val < 0) + nlmheader_warn (_("illegal revision number (must be between 0 and 26)"), + -1); + else if (val > 26) + version_hdr->revision = 0; + else + version_hdr->revision = val; + free ((yyvsp[(2) - (4)].string)); + free ((yyvsp[(3) - (4)].string)); + free ((yyvsp[(4) - (4)].string)); + } + break; + + case 41: +#line 395 "nlmheader.y" + { + long val; + + strncpy (version_hdr->stamp, "VeRsIoN#", 8); + version_hdr->majorVersion = nlmlex_get_number ((yyvsp[(2) - (3)].string)); + val = nlmlex_get_number ((yyvsp[(3) - (3)].string)); + if (val < 0 || val > 99) + nlmheader_warn (_("illegal minor version number (must be between 0 and 99)"), + -1); + else + version_hdr->minorVersion = val; + version_hdr->revision = 0; + free ((yyvsp[(2) - (3)].string)); + free ((yyvsp[(3) - (3)].string)); + } + break; + + case 42: +#line 411 "nlmheader.y" + { + rpc_file = (yyvsp[(2) - (2)].string); + } + break; + + case 43: +#line 420 "nlmheader.y" + { + (yyval.list) = NULL; + } + break; + + case 44: +#line 424 "nlmheader.y" + { + (yyval.list) = (yyvsp[(1) - (1)].list); + } + break; + + case 45: +#line 435 "nlmheader.y" + { + (yyval.list) = string_list_cons ((yyvsp[(1) - (1)].string), NULL); + } + break; + + case 46: +#line 439 "nlmheader.y" + { + (yyval.list) = NULL; + } + break; + + case 47: +#line 443 "nlmheader.y" + { + (yyval.list) = string_list_append1 ((yyvsp[(1) - (2)].list), (yyvsp[(2) - (2)].string)); + } + break; + + case 48: +#line 447 "nlmheader.y" + { + (yyval.list) = (yyvsp[(1) - (2)].list); + } + break; + + case 49: +#line 456 "nlmheader.y" + { + if (symbol_prefix != NULL) + free (symbol_prefix); + symbol_prefix = (yyvsp[(2) - (3)].string); + } + break; + + case 50: +#line 467 "nlmheader.y" + { + if (symbol_prefix == NULL) + (yyval.string) = (yyvsp[(1) - (1)].string); + else + { + (yyval.string) = xmalloc (strlen (symbol_prefix) + strlen ((yyvsp[(1) - (1)].string)) + 2); + sprintf ((yyval.string), "%s@%s", symbol_prefix, (yyvsp[(1) - (1)].string)); + free ((yyvsp[(1) - (1)].string)); + } + } + break; + + case 51: +#line 483 "nlmheader.y" + { + (yyval.list) = NULL; + } + break; + + case 52: +#line 487 "nlmheader.y" + { + (yyval.list) = string_list_cons ((yyvsp[(1) - (2)].string), (yyvsp[(2) - (2)].list)); + } + break; + + +/* Line 1267 of yacc.c. */ +#line 2015 "nlmheader.c" + default: break; + } + YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); + + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + + *++yyvsp = yyval; + + + /* Now `shift' the result of the reduction. Determine what state + that goes to, based on the state we popped back to and the rule + number reduced by. */ + + yyn = yyr1[yyn]; + + yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; + if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yytable[yystate]; + else + yystate = yydefgoto[yyn - YYNTOKENS]; + + goto yynewstate; + + +/*------------------------------------. +| yyerrlab -- here on detecting error | +`------------------------------------*/ +yyerrlab: + /* If not already recovering from an error, report this error. */ + if (!yyerrstatus) + { + ++yynerrs; +#if ! YYERROR_VERBOSE + yyerror (YY_("syntax error")); +#else + { + YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); + if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) + { + YYSIZE_T yyalloc = 2 * yysize; + if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) + yyalloc = YYSTACK_ALLOC_MAXIMUM; + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); + yymsg = (char *) YYSTACK_ALLOC (yyalloc); + if (yymsg) + yymsg_alloc = yyalloc; + else + { + yymsg = yymsgbuf; + yymsg_alloc = sizeof yymsgbuf; + } + } + + if (0 < yysize && yysize <= yymsg_alloc) + { + (void) yysyntax_error (yymsg, yystate, yychar); + yyerror (yymsg); + } + else + { + yyerror (YY_("syntax error")); + if (yysize != 0) + goto yyexhaustedlab; + } + } +#endif + } + + + + if (yyerrstatus == 3) + { + /* If just tried and failed to reuse look-ahead token after an + error, discard it. */ + + if (yychar <= YYEOF) + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } + else + { + yydestruct ("Error: discarding", + yytoken, &yylval); + yychar = YYEMPTY; + } + } + + /* Else will try to reuse look-ahead token after shifting the error + token. */ + goto yyerrlab1; + + +/*---------------------------------------------------. +| yyerrorlab -- error raised explicitly by YYERROR. | +`---------------------------------------------------*/ +yyerrorlab: + + /* Pacify compilers like GCC when the user code never invokes + YYERROR and the label yyerrorlab therefore never appears in user + code. */ + if (/*CONSTCOND*/ 0) + goto yyerrorlab; + + /* Do not reclaim the symbols of the rule which action triggered + this YYERROR. */ + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + yystate = *yyssp; + goto yyerrlab1; + + +/*-------------------------------------------------------------. +| yyerrlab1 -- common code for both syntax error and YYERROR. | +`-------------------------------------------------------------*/ +yyerrlab1: + yyerrstatus = 3; /* Each real token shifted decrements this. */ + + for (;;) + { + yyn = yypact[yystate]; + if (yyn != YYPACT_NINF) + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } + + /* Pop the current state because it cannot handle the error token. */ + if (yyssp == yyss) + YYABORT; + + + yydestruct ("Error: popping", + yystos[yystate], yyvsp); + YYPOPSTACK (1); + yystate = *yyssp; + YY_STACK_PRINT (yyss, yyssp); + } + + if (yyn == YYFINAL) + YYACCEPT; + + *++yyvsp = yylval; + + + /* Shift the error token. */ + YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); + + yystate = yyn; + goto yynewstate; + + +/*-------------------------------------. +| yyacceptlab -- YYACCEPT comes here. | +`-------------------------------------*/ +yyacceptlab: + yyresult = 0; + goto yyreturn; + +/*-----------------------------------. +| yyabortlab -- YYABORT comes here. | +`-----------------------------------*/ +yyabortlab: + yyresult = 1; + goto yyreturn; + +#ifndef yyoverflow +/*-------------------------------------------------. +| yyexhaustedlab -- memory exhaustion comes here. | +`-------------------------------------------------*/ +yyexhaustedlab: + yyerror (YY_("memory exhausted")); + yyresult = 2; + /* Fall through. */ +#endif + +yyreturn: + if (yychar != YYEOF && yychar != YYEMPTY) + yydestruct ("Cleanup: discarding lookahead", + yytoken, &yylval); + /* Do not reclaim the symbols of the rule which action triggered + this YYABORT or YYACCEPT. */ + YYPOPSTACK (yylen); + YY_STACK_PRINT (yyss, yyssp); + while (yyssp != yyss) + { + yydestruct ("Cleanup: popping", + yystos[*yyssp], yyvsp); + YYPOPSTACK (1); + } +#ifndef yyoverflow + if (yyss != yyssa) + YYSTACK_FREE (yyss); +#endif +#if YYERROR_VERBOSE + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); +#endif + /* Make sure YYID is used. */ + return YYID (yyresult); +} + + +#line 492 "nlmheader.y" + + +/* If strerror is just a macro, we want to use the one from libiberty + since it will handle undefined values. */ +#undef strerror +extern char *strerror PARAMS ((int)); + +/* The lexer is simple, too simple for flex. Keywords are only + recognized at the start of lines. Everything else must be an + argument. A comma is treated as whitespace. */ + +/* The states the lexer can be in. */ + +enum lex_state +{ + /* At the beginning of a line. */ + BEGINNING_OF_LINE, + /* In the middle of a line. */ + IN_LINE +}; + +/* We need to keep a stack of files to handle file inclusion. */ + +struct input +{ + /* The file to read from. */ + FILE *file; + /* The name of the file. */ + char *name; + /* The current line number. */ + int lineno; + /* The current state. */ + enum lex_state state; + /* The next file on the stack. */ + struct input *next; +}; + +/* The current input file. */ + +static struct input current; + +/* The character which introduces comments. */ +#define COMMENT_CHAR '#' + +/* Start the lexer going on the main input file. */ + +bfd_boolean +nlmlex_file (const char *name) +{ + current.next = NULL; + return nlmlex_file_open (name); +} + +/* Start the lexer going on a subsidiary input file. */ + +static void +nlmlex_file_push (const char *name) +{ + struct input *push; + + push = (struct input *) xmalloc (sizeof (struct input)); + *push = current; + if (nlmlex_file_open (name)) + current.next = push; + else + { + current = *push; + free (push); + } +} + +/* Start lexing from a file. */ + +static bfd_boolean +nlmlex_file_open (const char *name) +{ + current.file = fopen (name, "r"); + if (current.file == NULL) + { + fprintf (stderr, "%s:%s: %s\n", program_name, name, strerror (errno)); + ++parse_errors; + return FALSE; + } + current.name = xstrdup (name); + current.lineno = 1; + current.state = BEGINNING_OF_LINE; + return TRUE; +} + +/* Table used to turn keywords into tokens. */ + +struct keyword_tokens_struct +{ + const char *keyword; + int token; +}; + +static struct keyword_tokens_struct keyword_tokens[] = +{ + { "CHECK", CHECK }, + { "CODESTART", CODESTART }, + { "COPYRIGHT", COPYRIGHT }, + { "CUSTOM", CUSTOM }, + { "DATE", DATE }, + { "DEBUG", DEBUG_K }, + { "DESCRIPTION", DESCRIPTION }, + { "EXIT", EXIT }, + { "EXPORT", EXPORT }, + { "FLAG_ON", FLAG_ON }, + { "FLAG_OFF", FLAG_OFF }, + { "FULLMAP", FULLMAP }, + { "HELP", HELP }, + { "IMPORT", IMPORT }, + { "INPUT", INPUT }, + { "MAP", MAP }, + { "MESSAGES", MESSAGES }, + { "MODULE", MODULE }, + { "MULTIPLE", MULTIPLE }, + { "OS_DOMAIN", OS_DOMAIN }, + { "OUTPUT", OUTPUT }, + { "PSEUDOPREEMPTION", PSEUDOPREEMPTION }, + { "REENTRANT", REENTRANT }, + { "SCREENNAME", SCREENNAME }, + { "SHARELIB", SHARELIB }, + { "STACK", STACK }, + { "STACKSIZE", STACK }, + { "START", START }, + { "SYNCHRONIZE", SYNCHRONIZE }, + { "THREADNAME", THREADNAME }, + { "TYPE", TYPE }, + { "VERBOSE", VERBOSE }, + { "VERSION", VERSIONK }, + { "XDCDATA", XDCDATA } +}; + +#define KEYWORD_COUNT (sizeof (keyword_tokens) / sizeof (keyword_tokens[0])) + +/* The lexer accumulates strings in these variables. */ +static char *lex_buf; +static int lex_size; +static int lex_pos; + +/* Start accumulating strings into the buffer. */ +#define BUF_INIT() \ + ((void) (lex_buf != NULL ? lex_pos = 0 : nlmlex_buf_init ())) + +static int +nlmlex_buf_init (void) +{ + lex_size = 10; + lex_buf = xmalloc (lex_size + 1); + lex_pos = 0; + return 0; +} + +/* Finish a string in the buffer. */ +#define BUF_FINISH() ((void) (lex_buf[lex_pos] = '\0')) + +/* Accumulate a character into the buffer. */ +#define BUF_ADD(c) \ + ((void) (lex_pos < lex_size \ + ? lex_buf[lex_pos++] = (c) \ + : nlmlex_buf_add (c))) + +static char +nlmlex_buf_add (int c) +{ + if (lex_pos >= lex_size) + { + lex_size *= 2; + lex_buf = xrealloc (lex_buf, lex_size + 1); + } + + return lex_buf[lex_pos++] = c; +} + +/* The lexer proper. This is called by the bison generated parsing + code. */ + +static int +yylex (void) +{ + int c; + +tail_recurse: + + c = getc (current.file); + + /* Commas are treated as whitespace characters. */ + while (ISSPACE (c) || c == ',') + { + current.state = IN_LINE; + if (c == '\n') + { + ++current.lineno; + current.state = BEGINNING_OF_LINE; + } + c = getc (current.file); + } + + /* At the end of the file we either pop to the previous file or + finish up. */ + if (c == EOF) + { + fclose (current.file); + free (current.name); + if (current.next == NULL) + return 0; + else + { + struct input *next; + + next = current.next; + current = *next; + free (next); + goto tail_recurse; + } + } + + /* A comment character always means to drop everything until the + next newline. */ + if (c == COMMENT_CHAR) + { + do + { + c = getc (current.file); + } + while (c != '\n'); + ++current.lineno; + current.state = BEGINNING_OF_LINE; + goto tail_recurse; + } + + /* An '@' introduces an include file. */ + if (c == '@') + { + do + { + c = getc (current.file); + if (c == '\n') + ++current.lineno; + } + while (ISSPACE (c)); + BUF_INIT (); + while (! ISSPACE (c) && c != EOF) + { + BUF_ADD (c); + c = getc (current.file); + } + BUF_FINISH (); + + ungetc (c, current.file); + + nlmlex_file_push (lex_buf); + goto tail_recurse; + } + + /* A non-space character at the start of a line must be the start of + a keyword. */ + if (current.state == BEGINNING_OF_LINE) + { + BUF_INIT (); + while (ISALNUM (c) || c == '_') + { + BUF_ADD (TOUPPER (c)); + c = getc (current.file); + } + BUF_FINISH (); + + if (c != EOF && ! ISSPACE (c) && c != ',') + { + nlmheader_identify (); + fprintf (stderr, _("%s:%d: illegal character in keyword: %c\n"), + current.name, current.lineno, c); + } + else + { + unsigned int i; + + for (i = 0; i < KEYWORD_COUNT; i++) + { + if (lex_buf[0] == keyword_tokens[i].keyword[0] + && strcmp (lex_buf, keyword_tokens[i].keyword) == 0) + { + /* Pushing back the final whitespace avoids worrying + about \n here. */ + ungetc (c, current.file); + current.state = IN_LINE; + return keyword_tokens[i].token; + } + } + + nlmheader_identify (); + fprintf (stderr, _("%s:%d: unrecognized keyword: %s\n"), + current.name, current.lineno, lex_buf); + } + + ++parse_errors; + /* Treat the rest of this line as a comment. */ + ungetc (COMMENT_CHAR, current.file); + goto tail_recurse; + } + + /* Parentheses just represent themselves. */ + if (c == '(' || c == ')') + return c; + + /* Handle quoted strings. */ + if (c == '"' || c == '\'') + { + int quote; + int start_lineno; + + quote = c; + start_lineno = current.lineno; + + c = getc (current.file); + BUF_INIT (); + while (c != quote && c != EOF) + { + BUF_ADD (c); + if (c == '\n') + ++current.lineno; + c = getc (current.file); + } + BUF_FINISH (); + + if (c == EOF) + { + nlmheader_identify (); + fprintf (stderr, _("%s:%d: end of file in quoted string\n"), + current.name, start_lineno); + ++parse_errors; + } + + /* FIXME: Possible memory leak. */ + yylval.string = xstrdup (lex_buf); + return QUOTED_STRING; + } + + /* Gather a generic argument. */ + BUF_INIT (); + while (! ISSPACE (c) + && c != ',' + && c != COMMENT_CHAR + && c != '(' + && c != ')') + { + BUF_ADD (c); + c = getc (current.file); + } + BUF_FINISH (); + + ungetc (c, current.file); + + /* FIXME: Possible memory leak. */ + yylval.string = xstrdup (lex_buf); + return STRING; +} + +/* Get a number from a string. */ + +static long +nlmlex_get_number (const char *s) +{ + long ret; + char *send; + + ret = strtol (s, &send, 10); + if (*send != '\0') + nlmheader_warn (_("bad number"), -1); + return ret; +} + +/* Prefix the nlmconv warnings with a note as to where they come from. + We don't use program_name on every warning, because then some + versions of the emacs next-error function can't recognize the line + number. */ + +static void +nlmheader_identify (void) +{ + static int done; + + if (! done) + { + fprintf (stderr, _("%s: problems in NLM command language input:\n"), + program_name); + done = 1; + } +} + +/* Issue a warning. */ + +static void +nlmheader_warn (const char *s, int imax) +{ + nlmheader_identify (); + fprintf (stderr, "%s:%d: %s", current.name, current.lineno, s); + if (imax != -1) + fprintf (stderr, " (max %d)", imax); + fprintf (stderr, "\n"); +} + +/* Report an error. */ + +static void +nlmheader_error (const char *s) +{ + nlmheader_warn (s, -1); + ++parse_errors; +} + +/* Add a string to a string list. */ + +static struct string_list * +string_list_cons (char *s, struct string_list *l) +{ + struct string_list *ret; + + ret = (struct string_list *) xmalloc (sizeof (struct string_list)); + ret->next = l; + ret->string = s; + return ret; +} + +/* Append a string list to another string list. */ + +static struct string_list * +string_list_append (struct string_list *l1, struct string_list *l2) +{ + register struct string_list **pp; + + for (pp = &l1; *pp != NULL; pp = &(*pp)->next) + ; + *pp = l2; + return l1; +} + +/* Append a string to a string list. */ + +static struct string_list * +string_list_append1 (struct string_list *l, char *s) +{ + struct string_list *n; + register struct string_list **pp; + + n = (struct string_list *) xmalloc (sizeof (struct string_list)); + n->next = NULL; + n->string = s; + for (pp = &l; *pp != NULL; pp = &(*pp)->next) + ; + *pp = n; + return l; +} + +/* Duplicate a string in memory. */ + +static char * +xstrdup (const char *s) +{ + unsigned long len; + char *ret; + + len = strlen (s); + ret = xmalloc (len + 1); + strcpy (ret, s); + return ret; +} + diff --git a/binutils/nlmheader.h b/binutils/nlmheader.h new file mode 100644 index 0000000..b2dcd33 --- /dev/null +++ b/binutils/nlmheader.h @@ -0,0 +1,135 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton interface for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + CHECK = 258, + CODESTART = 259, + COPYRIGHT = 260, + CUSTOM = 261, + DATE = 262, + DEBUG_K = 263, + DESCRIPTION = 264, + EXIT = 265, + EXPORT = 266, + FLAG_ON = 267, + FLAG_OFF = 268, + FULLMAP = 269, + HELP = 270, + IMPORT = 271, + INPUT = 272, + MAP = 273, + MESSAGES = 274, + MODULE = 275, + MULTIPLE = 276, + OS_DOMAIN = 277, + OUTPUT = 278, + PSEUDOPREEMPTION = 279, + REENTRANT = 280, + SCREENNAME = 281, + SHARELIB = 282, + STACK = 283, + START = 284, + SYNCHRONIZE = 285, + THREADNAME = 286, + TYPE = 287, + VERBOSE = 288, + VERSIONK = 289, + XDCDATA = 290, + STRING = 291, + QUOTED_STRING = 292 + }; +#endif +/* Tokens. */ +#define CHECK 258 +#define CODESTART 259 +#define COPYRIGHT 260 +#define CUSTOM 261 +#define DATE 262 +#define DEBUG_K 263 +#define DESCRIPTION 264 +#define EXIT 265 +#define EXPORT 266 +#define FLAG_ON 267 +#define FLAG_OFF 268 +#define FULLMAP 269 +#define HELP 270 +#define IMPORT 271 +#define INPUT 272 +#define MAP 273 +#define MESSAGES 274 +#define MODULE 275 +#define MULTIPLE 276 +#define OS_DOMAIN 277 +#define OUTPUT 278 +#define PSEUDOPREEMPTION 279 +#define REENTRANT 280 +#define SCREENNAME 281 +#define SHARELIB 282 +#define STACK 283 +#define START 284 +#define SYNCHRONIZE 285 +#define THREADNAME 286 +#define TYPE 287 +#define VERBOSE 288 +#define VERSIONK 289 +#define XDCDATA 290 +#define STRING 291 +#define QUOTED_STRING 292 + + + + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 113 "nlmheader.y" +{ + char *string; + struct string_list *list; +} +/* Line 1529 of yacc.c. */ +#line 128 "nlmheader.h" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + +extern YYSTYPE yylval; + diff --git a/binutils/nm.c b/binutils/nm.c index 2c099aa..04067b1 100644 --- a/binutils/nm.c +++ b/binutils/nm.c @@ -436,6 +436,8 @@ filter_symbols (bfd *abfd, bfd_boolean is_dynamic, void *minisyms, else if (external_only) keep = ((sym->flags & BSF_GLOBAL) != 0 || (sym->flags & BSF_WEAK) != 0 + /* PR binutls/12753: Unique symbols are global too. */ + || (sym->flags & BSF_GNU_UNIQUE) != 0 || bfd_is_und_section (sym->section) || bfd_is_com_section (sym->section)); else @@ -1200,6 +1202,10 @@ display_file (char *filename) return FALSE; } + /* If printing line numbers, decompress the debug sections. */ + if (line_numbers) + file->flags |= BFD_DECOMPRESS; + if (bfd_check_format (file, bfd_archive)) { display_archive (file); diff --git a/binutils/objcopy.c b/binutils/objcopy.c index 15c4f95..31ac0a2 100644 --- a/binutils/objcopy.c +++ b/binutils/objcopy.c @@ -1,6 +1,6 @@ /* objcopy.c -- copy object file from input to output, optionally massaging it. Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, - 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of GNU Binutils. @@ -925,10 +925,10 @@ group_signature (asection *group) return NULL; } -/* See if a section is being removed. */ +/* See if a non-group section is being removed. */ static bfd_boolean -is_strip_section (bfd *abfd ATTRIBUTE_UNUSED, asection *sec) +is_strip_section_1 (bfd *abfd ATTRIBUTE_UNUSED, asection *sec) { if (sections_removed || sections_copied) { @@ -955,10 +955,22 @@ is_strip_section (bfd *abfd ATTRIBUTE_UNUSED, asection *sec) return FALSE; } + return FALSE; +} + +/* See if a section is being removed. */ + +static bfd_boolean +is_strip_section (bfd *abfd ATTRIBUTE_UNUSED, asection *sec) +{ + if (is_strip_section_1 (abfd, sec)) + return TRUE; + if ((bfd_get_section_flags (abfd, sec) & SEC_GROUP) != 0) { asymbol *gsym; const char *gname; + asection *elt, *first; /* PR binutils/3181 If we are going to strip the group signature symbol, then @@ -972,6 +984,19 @@ is_strip_section (bfd *abfd ATTRIBUTE_UNUSED, asection *sec) && !is_specified_symbol (gname, keep_specific_htab)) || is_specified_symbol (gname, strip_specific_htab)) return TRUE; + + /* Remove the group section if all members are removed. */ + first = elt = elf_next_in_group (sec); + while (elt != NULL) + { + if (!is_strip_section_1 (abfd, elt)) + return FALSE; + elt = elf_next_in_group (elt); + if (elt == first) + break; + } + + return TRUE; } return FALSE; @@ -2024,6 +2049,7 @@ copy_archive (bfd *ibfd, bfd *obfd, const char *output_target, struct stat buf; int stat_status = 0; bfd_boolean del = TRUE; + bfd_boolean ok_object; /* Create an output file for this member. */ output_name = concat (dir, "/", @@ -2061,44 +2087,42 @@ copy_archive (bfd *ibfd, bfd *obfd, const char *output_target, l->obfd = NULL; list = l; - if (bfd_check_format (this_element, bfd_object)) + ok_object = bfd_check_format (this_element, bfd_object); + if (!ok_object) + bfd_nonfatal_message (NULL, this_element, NULL, + _("Unable to recognise the format of file")); + + /* PR binutils/3110: Cope with archives + containing multiple target types. */ + if (force_output_target || !ok_object) + output_bfd = bfd_openw (output_name, output_target); + else + output_bfd = bfd_openw (output_name, bfd_get_target (this_element)); + + if (output_bfd == NULL) { - /* PR binutils/3110: Cope with archives - containing multiple target types. */ - if (force_output_target) - output_bfd = bfd_openw (output_name, output_target); - else - output_bfd = bfd_openw (output_name, bfd_get_target (this_element)); + bfd_nonfatal_message (output_name, NULL, NULL, NULL); + status = 1; + return; + } - if (output_bfd == NULL) + if (ok_object) + { + del = !copy_object (this_element, output_bfd, input_arch); + + if (del && bfd_get_arch (this_element) == bfd_arch_unknown) + /* Try again as an unknown object file. */ + ok_object = FALSE; + else if (!bfd_close (output_bfd)) { bfd_nonfatal_message (output_name, NULL, NULL, NULL); + /* Error in new object file. Don't change archive. */ status = 1; - return; - } - - del = ! copy_object (this_element, output_bfd, input_arch); - - if (! del - || bfd_get_arch (this_element) != bfd_arch_unknown) - { - if (!bfd_close (output_bfd)) - { - bfd_nonfatal_message (output_name, NULL, NULL, NULL); - /* Error in new object file. Don't change archive. */ - status = 1; - } } - else - goto copy_unknown_element; } - else - { - bfd_nonfatal_message (NULL, this_element, NULL, - _("Unable to recognise the format of file")); - output_bfd = bfd_openw (output_name, output_target); -copy_unknown_element: + if (!ok_object) + { del = !copy_unknown_object (this_element, output_bfd); if (!bfd_close_all_done (output_bfd)) { diff --git a/binutils/objdump.c b/binutils/objdump.c index 8b6bc28..784ead2 100644 --- a/binutils/objdump.c +++ b/binutils/objdump.c @@ -65,6 +65,7 @@ #include "filenames.h" #include "debug.h" #include "budbg.h" +#include "objdump.h" #ifdef HAVE_MMAP #include @@ -93,6 +94,7 @@ static int dump_reloc_info; /* -r */ static int dump_dynamic_reloc_info; /* -R */ static int dump_ar_hdrs; /* -a */ static int dump_private_headers; /* -p */ +static char *dump_private_options; /* -P */ static int prefix_addresses; /* --prefix-addresses */ static int with_line_numbers; /* -l */ static bfd_boolean with_source_code; /* -S */ @@ -110,6 +112,7 @@ static bfd_vma start_address = (bfd_vma) -1; /* --start-address */ static bfd_vma stop_address = (bfd_vma) -1; /* --stop-address */ static int dump_debugging; /* --debugging */ static int dump_debugging_tags; /* --debugging-tags */ +static int suppress_bfd_header; static int dump_special_syms = 0; /* --special-syms */ static bfd_vma adjust_section_vma = 0; /* --adjust-vma */ static int file_start_context = 0; /* --file-start-context */ @@ -184,6 +187,13 @@ static char *strtab; static bfd_size_type stabstr_size; static bfd_boolean is_relocatable = FALSE; + +/* Handlers for -P/--private. */ +static const struct objdump_private_desc * const objdump_private_vectors[] = + { + OBJDUMP_PRIVATE_VECTORS + NULL + }; static void usage (FILE *stream, int status) @@ -195,6 +205,7 @@ usage (FILE *stream, int status) -a, --archive-headers Display archive header information\n\ -f, --file-headers Display the contents of the overall file header\n\ -p, --private-headers Display object format specific file header contents\n\ + -P, --private=OPT,OPT... Display object format specific contents\n\ -h, --[section-]headers Display the contents of the section headers\n\ -x, --all-headers Display the contents of all headers\n\ -d, --disassemble Display assembler contents of executable sections\n\ @@ -220,6 +231,8 @@ usage (FILE *stream, int status) ")); if (status != 2) { + const struct objdump_private_desc * const *desc; + fprintf (stream, _("\n The following switches are optional:\n")); fprintf (stream, _("\ -b, --target=BFDNAME Specify the target object format as BFDNAME\n\ @@ -246,12 +259,23 @@ usage (FILE *stream, int status) --adjust-vma=OFFSET Add OFFSET to all displayed section addresses\n\ --special-syms Include special symbols in symbol dumps\n\ --prefix=PREFIX Add PREFIX to absolute paths for -S\n\ - --prefix-strip=LEVEL Strip initial directory names for -S\n\ -\n")); + --prefix-strip=LEVEL Strip initial directory names for -S\n")); + fprintf (stream, _("\ + --dwarf-depth=N Do not display DIEs at depth N or greater\n\ + --dwarf-start=N Display DIEs starting with N, at the same depth\n\ + or deeper\n\n")); list_supported_targets (program_name, stream); list_supported_architectures (program_name, stream); disassembler_usage (stream); + + if (objdump_private_vectors[0] != NULL) + { + fprintf (stream, + _("\nOptions supported for -P/--private switch:\n")); + for (desc = objdump_private_vectors; *desc != NULL; desc++) + (*desc)->help (stream); + } } if (REPORT_BUGS_TO[0] && status == 0) fprintf (stream, _("Report bugs to %s.\n"), REPORT_BUGS_TO); @@ -268,7 +292,9 @@ enum option_values OPTION_PREFIX, OPTION_PREFIX_STRIP, OPTION_INSN_WIDTH, - OPTION_ADJUST_VMA + OPTION_ADJUST_VMA, + OPTION_DWARF_DEPTH, + OPTION_DWARF_START }; static struct option long_options[]= @@ -276,6 +302,7 @@ static struct option long_options[]= {"adjust-vma", required_argument, NULL, OPTION_ADJUST_VMA}, {"all-headers", no_argument, NULL, 'x'}, {"private-headers", no_argument, NULL, 'p'}, + {"private", required_argument, NULL, 'P'}, {"architecture", required_argument, NULL, 'm'}, {"archive-headers", no_argument, NULL, 'a'}, {"debugging", no_argument, NULL, 'g'}, @@ -316,6 +343,8 @@ static struct option long_options[]= {"prefix", required_argument, NULL, OPTION_PREFIX}, {"prefix-strip", required_argument, NULL, OPTION_PREFIX_STRIP}, {"insn-width", required_argument, NULL, OPTION_INSN_WIDTH}, + {"dwarf-depth", required_argument, 0, OPTION_DWARF_DEPTH}, + {"dwarf-start", required_argument, 0, OPTION_DWARF_START}, {0, no_argument, 0, 0} }; @@ -2587,6 +2616,57 @@ dump_bfd_private_header (bfd *abfd) bfd_print_private_bfd_data (abfd, stdout); } +static void +dump_target_specific (bfd *abfd) +{ + const struct objdump_private_desc * const *desc; + struct objdump_private_option *opt; + char *e, *b; + + /* Find the desc. */ + for (desc = objdump_private_vectors; *desc != NULL; desc++) + if ((*desc)->filter (abfd)) + break; + + if (desc == NULL) + { + non_fatal (_("option -P/--private not supported by this file")); + return; + } + + /* Clear all options. */ + for (opt = (*desc)->options; opt->name; opt++) + opt->selected = FALSE; + + /* Decode options. */ + b = dump_private_options; + do + { + e = strchr (b, ','); + + if (e) + *e = 0; + + for (opt = (*desc)->options; opt->name; opt++) + if (strcmp (opt->name, b) == 0) + { + opt->selected = TRUE; + break; + } + if (opt->name == NULL) + non_fatal (_("target specific dump '%s' not supported"), b); + + if (e) + { + *e = ','; + b = e + 1; + } + } + while (e != NULL); + + /* Dump. */ + (*desc)->dump (abfd); +} /* Display a section in hexadecimal format with associated characters. Each line prefixed by the zero padded address. */ @@ -3079,7 +3159,7 @@ dump_bfd (bfd *abfd) bfd_map_over_sections (abfd, adjust_addresses, &has_reloc); } - if (! dump_debugging_tags) + if (! dump_debugging_tags && ! suppress_bfd_header) printf (_("\n%s: file format %s\n"), bfd_get_filename (abfd), abfd->xvec->name); if (dump_ar_hdrs) @@ -3088,7 +3168,9 @@ dump_bfd (bfd *abfd) dump_bfd_header (abfd); if (dump_private_headers) dump_bfd_private_header (abfd); - if (! dump_debugging_tags) + if (dump_private_options != NULL) + dump_target_specific (abfd); + if (! dump_debugging_tags && ! suppress_bfd_header) putchar ('\n'); if (dump_section_headers) dump_headers (abfd); @@ -3299,7 +3381,7 @@ main (int argc, char **argv) set_default_bfd_target (); while ((c = getopt_long (argc, argv, - "pib:m:M:VvCdDlfFaHhrRtTxsSI:j:wE:zgeGW::", + "pP:ib:m:M:VvCdDlfFaHhrRtTxsSI:j:wE:zgeGW::", long_options, (int *) 0)) != EOF) { @@ -3416,6 +3498,10 @@ main (int argc, char **argv) dump_private_headers = TRUE; seenflag = TRUE; break; + case 'P': + dump_private_options = optarg; + seenflag = TRUE; + break; case 'x': dump_private_headers = TRUE; dump_symtab = TRUE; @@ -3476,6 +3562,19 @@ main (int argc, char **argv) else dwarf_select_sections_all (); break; + case OPTION_DWARF_DEPTH: + { + char *cp; + dwarf_cutoff_level = strtoul (optarg, & cp, 0); + } + break; + case OPTION_DWARF_START: + { + char *cp; + dwarf_start_die = strtoul (optarg, & cp, 0); + suppress_bfd_header = 1; + } + break; case 'G': dump_stab_section_info = TRUE; seenflag = TRUE; diff --git a/binutils/objdump.h b/binutils/objdump.h new file mode 100644 index 0000000..511898c --- /dev/null +++ b/binutils/objdump.h @@ -0,0 +1,50 @@ +/* objdump.h + Copyright 2011 Free Software Foundation, Inc. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include + +struct objdump_private_option +{ + /* Option name. */ + const char *name; + + /* TRUE if the option is selected. Automatically set and cleared by + objdump. */ + unsigned int selected; +}; + +struct objdump_private_desc +{ + /* Help displayed for --help. */ + void (*help)(FILE *stream); + + /* Return TRUE if these options can be applied to ABFD. */ + int (*filter)(bfd *abfd); + + /* Do the actual work: display whatever is requested according to the + options whose SELECTED field is set. */ + void (*dump)(bfd *abfd); + + /* List of options. Terminated by a NULL name. */ + struct objdump_private_option *options; +}; + +/* XCOFF specific target. */ +extern const struct objdump_private_desc objdump_private_desc_xcoff; diff --git a/binutils/od-xcoff.c b/binutils/od-xcoff.c new file mode 100644 index 0000000..5b8b589 --- /dev/null +++ b/binutils/od-xcoff.c @@ -0,0 +1,1667 @@ +/* od-xcoff.c -- dump information about an xcoff object file. + Copyright 2011 Free Software Foundation, Inc. + Written by Tristan Gingold, Adacore. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include +#include +#include "sysdep.h" +#include "safe-ctype.h" +#include "bfd.h" +#include "objdump.h" +#include "bucomm.h" +#include "bfdlink.h" +/* Force the support of weak symbols. */ +#ifndef AIX_WEAK_SUPPORT +#define AIX_WEAK_SUPPORT 1 +#endif +#include "coff/internal.h" +#include "coff/rs6000.h" +#include "coff/xcoff.h" +#include "libcoff.h" +#include "libxcoff.h" + +/* Index of the options in the options[] array. */ +#define OPT_FILE_HEADER 0 +#define OPT_AOUT 1 +#define OPT_SECTIONS 2 +#define OPT_SYMS 3 +#define OPT_RELOCS 4 +#define OPT_LINENO 5 +#define OPT_LOADER 6 +#define OPT_EXCEPT 7 +#define OPT_TYPCHK 8 +#define OPT_TRACEBACK 9 +#define OPT_TOC 10 + +/* List of actions. */ +static struct objdump_private_option options[] = + { + { "header", 0 }, + { "aout", 0 }, + { "sections", 0 }, + { "syms", 0 }, + { "relocs", 0 }, + { "lineno", 0 }, + { "loader", 0 }, + { "except", 0 }, + { "typchk", 0 }, + { "traceback", 0 }, + { "toc", 0 }, + { NULL, 0 } + }; + +/* Display help. */ + +static void +xcoff_help (FILE *stream) +{ + fprintf (stream, _("\ +For XCOFF files:\n\ + header Display the file header\n\ + aout Display the auxiliary header\n\ + sections Display the section headers\n\ + syms Display the symbols table\n\ + relocs Display the relocation entries\n\ + lineno Display the line number entries\n\ + loader Display loader section\n\ + except Display exception table\n\ + typchk Display type-check section\n\ + traceback Display traceback tags\n\ + toc Display toc symbols\n\ +")); +} + +/* Return TRUE if ABFD is handled. */ + +static int +xcoff_filter (bfd *abfd) +{ + return bfd_get_flavour (abfd) == bfd_target_xcoff_flavour; +} + +/* Translation entry type. The last entry must be {0, NULL}. */ + +struct xlat_table { + unsigned int val; + const char *name; +}; + +/* Display the list of name (from TABLE) for FLAGS, using comma to separate + them. A name is displayed if FLAGS & VAL is not 0. */ + +static void +dump_flags (const struct xlat_table *table, unsigned int flags) +{ + unsigned int r = flags; + int first = 1; + const struct xlat_table *t; + + for (t = table; t->name; t++) + if ((flags & t->val) != 0) + { + r &= ~t->val; + + if (first) + first = 0; + else + putchar (','); + fputs (t->name, stdout); + } + + /* Not decoded flags. */ + if (r != 0) + { + if (!first) + putchar (','); + printf ("0x%x", r); + } +} + +/* Display the name corresponding to VAL from TABLE, using at most + MAXLEN char (possibly passed with spaces). */ + +static void +dump_value (const struct xlat_table *table, unsigned int val, int maxlen) +{ + const struct xlat_table *t; + + for (t = table; t->name; t++) + if (t->val == val) + { + printf ("%-*s", maxlen, t->name); + return; + } + printf ("(%*x)", maxlen - 2, val); +} + +/* Names of f_flags. */ +static const struct xlat_table f_flag_xlat[] = + { + { F_RELFLG, "no-rel" }, + { F_EXEC, "exec" }, + { F_LNNO, "lineno" }, + { F_LSYMS, "lsyms" }, + + { F_FDPR_PROF, "fdpr-prof" }, + { F_FDPR_OPTI, "fdpr-opti" }, + { F_DSA, "dsa" }, + + { F_VARPG, "varprg" }, + + { F_DYNLOAD, "dynload" }, + { F_SHROBJ, "shrobj" }, + { F_NONEXEC, "nonexec" }, + + { 0, NULL } + }; + +/* Names of s_flags. */ +static const struct xlat_table s_flag_xlat[] = + { + { STYP_PAD, "pad" }, + { STYP_DWARF, "dwarf" }, + { STYP_TEXT, "text" }, + { STYP_DATA, "data" }, + { STYP_BSS, "bss" }, + + { STYP_EXCEPT, "except" }, + { STYP_INFO, "info" }, + { STYP_TDATA, "tdata" }, + { STYP_TBSS, "tbss" }, + + { STYP_LOADER, "loader" }, + { STYP_DEBUG, "debug" }, + { STYP_TYPCHK, "typchk" }, + { STYP_OVRFLO, "ovrflo" }, + { 0, NULL } + }; + +/* Names of storage class. */ +static const struct xlat_table sc_xlat[] = + { +#define SC_ENTRY(X) { C_##X, #X } + SC_ENTRY(NULL), + SC_ENTRY(AUTO), + SC_ENTRY(EXT), + SC_ENTRY(STAT), + SC_ENTRY(REG), + SC_ENTRY(EXTDEF), + SC_ENTRY(LABEL), + SC_ENTRY(ULABEL), + SC_ENTRY(MOS), + SC_ENTRY(ARG), + /* SC_ENTRY(STRARG), */ + SC_ENTRY(MOU), + SC_ENTRY(UNTAG), + SC_ENTRY(TPDEF), + SC_ENTRY(USTATIC), + SC_ENTRY(ENTAG), + SC_ENTRY(MOE), + SC_ENTRY(REGPARM), + SC_ENTRY(FIELD), + SC_ENTRY(BLOCK), + SC_ENTRY(FCN), + SC_ENTRY(EOS), + SC_ENTRY(FILE), + SC_ENTRY(LINE), + SC_ENTRY(ALIAS), + SC_ENTRY(HIDDEN), + SC_ENTRY(HIDEXT), + SC_ENTRY(BINCL), + SC_ENTRY(EINCL), + SC_ENTRY(INFO), + SC_ENTRY(WEAKEXT), + SC_ENTRY(DWARF), + + /* Stabs. */ + SC_ENTRY (GSYM), + SC_ENTRY (LSYM), + SC_ENTRY (PSYM), + SC_ENTRY (RSYM), + SC_ENTRY (RPSYM), + SC_ENTRY (STSYM), + SC_ENTRY (TCSYM), + SC_ENTRY (BCOMM), + SC_ENTRY (ECOML), + SC_ENTRY (ECOMM), + SC_ENTRY (DECL), + SC_ENTRY (ENTRY), + SC_ENTRY (FUN), + SC_ENTRY (BSTAT), + SC_ENTRY (ESTAT), + + { 0, NULL } +#undef SC_ENTRY + }; + +/* Names for symbol type. */ +static const struct xlat_table smtyp_xlat[] = + { + { XTY_ER, "ER" }, + { XTY_SD, "SD" }, + { XTY_LD, "LD" }, + { XTY_CM, "CM" }, + { XTY_EM, "EM" }, + { XTY_US, "US" }, + { 0, NULL } + }; + +/* Names for storage-mapping class. */ +static const struct xlat_table smclas_xlat[] = + { +#define SMCLAS_ENTRY(X) { XMC_##X, #X } + SMCLAS_ENTRY (PR), + SMCLAS_ENTRY (RO), + SMCLAS_ENTRY (DB), + SMCLAS_ENTRY (TC), + SMCLAS_ENTRY (UA), + SMCLAS_ENTRY (RW), + SMCLAS_ENTRY (GL), + SMCLAS_ENTRY (XO), + SMCLAS_ENTRY (SV), + SMCLAS_ENTRY (BS), + SMCLAS_ENTRY (DS), + SMCLAS_ENTRY (UC), + SMCLAS_ENTRY (TI), + SMCLAS_ENTRY (TB), + SMCLAS_ENTRY (TC0), + SMCLAS_ENTRY (TD), + SMCLAS_ENTRY (SV64), + SMCLAS_ENTRY (SV3264), + { 0, NULL } +#undef SMCLAS_ENTRY + }; + +/* Names for relocation type. */ +static const struct xlat_table rtype_xlat[] = + { +#define RTYPE_ENTRY(X) { R_##X, #X } + RTYPE_ENTRY (POS), + RTYPE_ENTRY (NEG), + RTYPE_ENTRY (REL), + RTYPE_ENTRY (TOC), + RTYPE_ENTRY (RTB), + RTYPE_ENTRY (GL), + RTYPE_ENTRY (TCL), + RTYPE_ENTRY (BA), + RTYPE_ENTRY (BR), + RTYPE_ENTRY (RL), + RTYPE_ENTRY (RLA), + RTYPE_ENTRY (REF), + RTYPE_ENTRY (TRL), + RTYPE_ENTRY (TRLA), + RTYPE_ENTRY (RRTBI), + RTYPE_ENTRY (RRTBA), + RTYPE_ENTRY (CAI), + RTYPE_ENTRY (CREL), + RTYPE_ENTRY (RBA), + RTYPE_ENTRY (RBAC), + RTYPE_ENTRY (RBR), + RTYPE_ENTRY (RBRC), + RTYPE_ENTRY (TLS), + RTYPE_ENTRY (TLS_IE), + RTYPE_ENTRY (TLS_LD), + RTYPE_ENTRY (TLS_LE), + RTYPE_ENTRY (TLSM), + RTYPE_ENTRY (TLSML), + RTYPE_ENTRY (TOCU), + RTYPE_ENTRY (TOCL), + { 0, NULL } + }; + +/* Simplified section header. */ +struct xcoff32_section +{ + /* NUL terminated name. */ + char name[9]; + + /* Section flags. */ + unsigned int flags; + + /* Offsets in file. */ + ufile_ptr scnptr; + ufile_ptr relptr; + ufile_ptr lnnoptr; + + /* Number of relocs and line numbers. */ + unsigned int nreloc; + unsigned int nlnno; +}; + +/* Simplified symbol. */ + +union xcoff32_symbol +{ + union external_auxent aux; + + struct sym + { + /* Pointer the the NUL-terminated name. */ + char *name; + + /* XCOFF symbol fields. */ + unsigned int val; + unsigned short scnum; + unsigned short ntype; + unsigned char sclass; + unsigned char numaux; + + /* Buffer in case the name is local. */ + union + { + char name[9]; + unsigned int off; + } raw; + } sym; +}; + +/* Important fields to dump the file. */ + +struct xcoff_dump +{ + /* From file header. */ + unsigned short nscns; + unsigned int symptr; + unsigned int nsyms; + unsigned short opthdr; + + /* Sections. */ + struct xcoff32_section *sects; + + /* Symbols. */ + union xcoff32_symbol *syms; + char *strings; + unsigned int strings_size; +}; + +/* Print a symbol (if possible). */ + +static void +xcoff32_print_symbol (struct xcoff_dump *data, unsigned int symndx) +{ + if (data->syms != NULL + && symndx < data->nsyms + && data->syms[symndx].sym.name != NULL) + printf ("%s", data->syms[symndx].sym.name); + else + printf ("%u", symndx); +} + +/* Dump the file header. */ + +static void +dump_xcoff32_file_header (bfd *abfd, struct external_filehdr *fhdr, + struct xcoff_dump *data) +{ + unsigned int timdat = bfd_h_get_32 (abfd, fhdr->f_timdat); + unsigned short flags = bfd_h_get_16 (abfd, fhdr->f_flags); + + printf (_(" nbr sections: %d\n"), data->nscns); + printf (_(" time and date: 0x%08x - "), timdat); + if (timdat == 0) + printf (_("not set\n")); + else + { + /* Not correct on all platforms, but works on unix. */ + time_t t = timdat; + fputs (ctime (&t), stdout); + } + printf (_(" symbols off: 0x%08x\n"), data->symptr); + printf (_(" nbr symbols: %d\n"), data->nsyms); + printf (_(" opt hdr sz: %d\n"), data->opthdr); + printf (_(" flags: 0x%04x "), flags); + dump_flags (f_flag_xlat, flags); + putchar ('\n'); +} + +/* Dump the a.out header. */ + +static void +dump_xcoff32_aout_header (bfd *abfd, struct xcoff_dump *data) +{ + AOUTHDR auxhdr; + unsigned short magic; + unsigned int sz = data->opthdr; + + printf (_("Auxiliary header:\n")); + if (data->opthdr == 0) + { + printf (_(" No aux header\n")); + return; + } + if (data->opthdr > sizeof (auxhdr)) + { + printf (_("warning: optionnal header size too large (> %d)\n"), + (int)sizeof (auxhdr)); + sz = sizeof (auxhdr); + } + if (bfd_bread (&auxhdr, sz, abfd) != sz) + { + non_fatal (_("cannot read auxhdr")); + return; + } + + magic = bfd_h_get_16 (abfd, auxhdr.magic); + printf (_(" o_mflag (magic): 0x%04x 0%04o\n"), magic, magic); + printf (_(" o_vstamp: 0x%04x\n"), + (unsigned short)bfd_h_get_16 (abfd, auxhdr.vstamp)); + printf (_(" o_tsize: 0x%08x\n"), + (unsigned int)bfd_h_get_32 (abfd, auxhdr.tsize)); + printf (_(" o_dsize: 0x%08x\n"), + (unsigned int)bfd_h_get_32 (abfd, auxhdr.dsize)); + printf (_(" o_entry: 0x%08x\n"), + (unsigned int)bfd_h_get_32 (abfd, auxhdr.entry)); + printf (_(" o_text_start: 0x%08x\n"), + (unsigned int)bfd_h_get_32 (abfd, auxhdr.text_start)); + printf (_(" o_data_start: 0x%08x\n"), + (unsigned int)bfd_h_get_32 (abfd, auxhdr.data_start)); + if (sz == offsetof (AOUTHDR, o_toc)) + return; + printf (_(" o_toc: 0x%08x\n"), + (unsigned int)bfd_h_get_32 (abfd, auxhdr.o_toc)); + printf (_(" o_snentry: 0x%04x\n"), + (unsigned int)bfd_h_get_16 (abfd, auxhdr.o_snentry)); + printf (_(" o_sntext: 0x%04x\n"), + (unsigned int)bfd_h_get_16 (abfd, auxhdr.o_sntext)); + printf (_(" o_sndata: 0x%04x\n"), + (unsigned int)bfd_h_get_16 (abfd, auxhdr.o_sndata)); + printf (_(" o_sntoc: 0x%04x\n"), + (unsigned int)bfd_h_get_16 (abfd, auxhdr.o_sntoc)); + printf (_(" o_snloader: 0x%04x\n"), + (unsigned int)bfd_h_get_16 (abfd, auxhdr.o_snloader)); + printf (_(" o_snbss: 0x%04x\n"), + (unsigned int)bfd_h_get_16 (abfd, auxhdr.o_snbss)); + printf (_(" o_algntext: %u\n"), + (unsigned int)bfd_h_get_16 (abfd, auxhdr.o_algntext)); + printf (_(" o_algndata: %u\n"), + (unsigned int)bfd_h_get_16 (abfd, auxhdr.o_algndata)); + printf (_(" o_modtype: 0x%04x"), + (unsigned int)bfd_h_get_16 (abfd, auxhdr.o_modtype)); + if (ISPRINT (auxhdr.o_modtype[0]) && ISPRINT (auxhdr.o_modtype[1])) + printf (" (%c%c)", auxhdr.o_modtype[0], auxhdr.o_modtype[1]); + putchar ('\n'); + printf (_(" o_cputype: 0x%04x\n"), + (unsigned int)bfd_h_get_16 (abfd, auxhdr.o_cputype)); + printf (_(" o_maxstack: 0x%08x\n"), + (unsigned int)bfd_h_get_32 (abfd, auxhdr.o_maxstack)); + printf (_(" o_maxdata: 0x%08x\n"), + (unsigned int)bfd_h_get_32 (abfd, auxhdr.o_maxdata)); +#if 0 + printf (_(" o_debugger: 0x%08x\n"), + (unsigned int)bfd_h_get_32 (abfd, auxhdr.o_debugger)); +#endif +} + +/* Dump the sections header. */ + +static void +dump_xcoff32_sections_header (bfd *abfd, struct xcoff_dump *data) +{ + unsigned int i; + unsigned int off; + + off = sizeof (struct external_filehdr) + data->opthdr; + printf (_("Section headers (at %u+%u=0x%08x to 0x%08x):\n"), + (unsigned int)sizeof (struct external_filehdr), data->opthdr, off, + off + (unsigned int)sizeof (struct external_scnhdr) * data->nscns); + if (data->nscns == 0) + { + printf (_(" No section header\n")); + return; + } + if (bfd_seek (abfd, off, SEEK_SET) != 0) + { + non_fatal (_("cannot read section header")); + return; + } + printf (_(" # Name paddr vaddr size scnptr relptr lnnoptr nrel nlnno\n")); + for (i = 0; i < data->nscns; i++) + { + struct external_scnhdr scn; + unsigned int flags; + + if (bfd_bread (&scn, sizeof (scn), abfd) != sizeof (scn)) + { + non_fatal (_("cannot read section header")); + return; + } + flags = bfd_h_get_32 (abfd, scn.s_flags); + printf (_("%2d %-8.8s %08x %08x %08x %08x %08x %08x " + "%-5d %-5d\n"), + i + 1, scn.s_name, + (unsigned int)bfd_h_get_32 (abfd, scn.s_paddr), + (unsigned int)bfd_h_get_32 (abfd, scn.s_vaddr), + (unsigned int)bfd_h_get_32 (abfd, scn.s_size), + (unsigned int)bfd_h_get_32 (abfd, scn.s_scnptr), + (unsigned int)bfd_h_get_32 (abfd, scn.s_relptr), + (unsigned int)bfd_h_get_32 (abfd, scn.s_lnnoptr), + (unsigned int)bfd_h_get_16 (abfd, scn.s_nreloc), + (unsigned int)bfd_h_get_16 (abfd, scn.s_nlnno)); + printf (_(" Flags: %08x "), flags); + + if (~flags == 0) + { + /* Stripped executable ? */ + putchar ('\n'); + } + else if (flags & STYP_OVRFLO) + printf (_("overflow - nreloc: %u, nlnno: %u\n"), + (unsigned int)bfd_h_get_32 (abfd, scn.s_paddr), + (unsigned int)bfd_h_get_32 (abfd, scn.s_vaddr)); + else + { + dump_flags (s_flag_xlat, flags); + putchar ('\n'); + } + } +} + +/* Read section table. */ + +static void +xcoff32_read_sections (bfd *abfd, struct xcoff_dump *data) +{ + int i; + + if (bfd_seek (abfd, sizeof (struct external_filehdr) + data->opthdr, + SEEK_SET) != 0) + { + non_fatal (_("cannot read section headers")); + return; + } + + data->sects = xmalloc (data->nscns * sizeof (struct xcoff32_section)); + for (i = 0; i < data->nscns; i++) + { + struct external_scnhdr scn; + struct xcoff32_section *s = &data->sects[i]; + + if (bfd_bread (&scn, sizeof (scn), abfd) != sizeof (scn)) + { + non_fatal (_("cannot read section header")); + free (data->sects); + data->sects = NULL; + return; + } + memcpy (s->name, scn.s_name, 8); + s->name[8] = 0; + s->flags = bfd_h_get_32 (abfd, scn.s_flags); + + s->scnptr = bfd_h_get_32 (abfd, scn.s_scnptr); + s->relptr = bfd_h_get_32 (abfd, scn.s_relptr); + s->lnnoptr = bfd_h_get_32 (abfd, scn.s_lnnoptr); + + s->nreloc = bfd_h_get_16 (abfd, scn.s_nreloc); + s->nlnno = bfd_h_get_16 (abfd, scn.s_nlnno); + + if (s->flags == STYP_OVRFLO) + { + if (s->nreloc > 0 && s->nreloc <= data->nscns) + data->sects[s->nreloc - 1].nreloc = + bfd_h_get_32 (abfd, scn.s_paddr); + if (s->nlnno > 0 && s->nlnno <= data->nscns) + data->sects[s->nlnno - 1].nlnno = + bfd_h_get_32 (abfd, scn.s_vaddr); + } + } +} + +/* Read symbols. */ + +static void +xcoff32_read_symbols (bfd *abfd, struct xcoff_dump *data) +{ + unsigned int i; + char stsz_arr[4]; + unsigned int stptr; + + if (data->nsyms == 0) + return; + + stptr = data->symptr + + data->nsyms * (unsigned)sizeof (struct external_syment); + + /* Read string table. */ + if (bfd_seek (abfd, stptr, SEEK_SET) != 0 + || bfd_bread (&stsz_arr, sizeof (stsz_arr), abfd) != sizeof (stsz_arr)) + { + non_fatal (_("cannot read strings table length")); + data->strings_size = 0; + } + else + { + data->strings_size = bfd_h_get_32 (abfd, stsz_arr); + if (data->strings_size > sizeof (stsz_arr)) + { + unsigned int remsz = data->strings_size - sizeof (stsz_arr); + + data->strings = xmalloc (data->strings_size); + + memcpy (data->strings, stsz_arr, sizeof (stsz_arr)); + if (bfd_bread (data->strings + sizeof (stsz_arr), remsz, abfd) + != remsz) + { + non_fatal (_("cannot read strings table")); + goto clean; + } + } + } + + if (bfd_seek (abfd, data->symptr, SEEK_SET) != 0) + { + non_fatal (_("cannot read symbol table")); + goto clean; + } + + data->syms = (union xcoff32_symbol *) + xmalloc (data->nsyms * sizeof (union xcoff32_symbol)); + + for (i = 0; i < data->nsyms; i++) + { + struct external_syment sym; + int j; + union xcoff32_symbol *s = &data->syms[i]; + + if (bfd_bread (&sym, sizeof (sym), abfd) != sizeof (sym)) + { + non_fatal (_("cannot read symbol entry")); + goto clean; + } + + s->sym.val = bfd_h_get_32 (abfd, sym.e_value); + s->sym.scnum = bfd_h_get_16 (abfd, sym.e_scnum); + s->sym.ntype = bfd_h_get_16 (abfd, sym.e_type); + s->sym.sclass = bfd_h_get_8 (abfd, sym.e_sclass); + s->sym.numaux = bfd_h_get_8 (abfd, sym.e_numaux); + + if (sym.e.e_name[0]) + { + memcpy (s->sym.raw.name, sym.e.e_name, sizeof (sym.e.e_name)); + s->sym.raw.name[8] = 0; + s->sym.name = s->sym.raw.name; + } + else + { + unsigned int soff = bfd_h_get_32 (abfd, sym.e.e.e_offset); + + if ((s->sym.sclass & DBXMASK) == 0 && soff < data->strings_size) + s->sym.name = data->strings + soff; + else + { + s->sym.name = NULL; + s->sym.raw.off = soff; + } + } + + for (j = 0; j < s->sym.numaux; j++, i++) + { + if (bfd_bread (&s[j + 1].aux, + sizeof (union external_auxent), abfd) + != sizeof (union external_auxent)) + { + non_fatal (_("cannot read symbol aux entry")); + goto clean; + } + } + } + return; + clean: + free (data->syms); + data->syms = NULL; + free (data->strings); + data->strings = NULL; +} + +/* Dump xcoff symbols. */ + +static void +dump_xcoff32_symbols (bfd *abfd, struct xcoff_dump *data) +{ + unsigned int i; + asection *debugsec; + char *debug = NULL; + + printf (_("Symbols table (strtable at 0x%08x)"), + data->symptr + + data->nsyms * (unsigned)sizeof (struct external_syment)); + if (data->nsyms == 0 || data->syms == NULL) + { + printf (_(":\n No symbols\n")); + return; + } + + /* Read string table. */ + if (data->strings_size == 0) + printf (_(" (no strings):\n")); + else + printf (_(" (strings size: %08x):\n"), data->strings_size); + + /* Read debug section. */ + debugsec = bfd_get_section_by_name (abfd, ".debug"); + if (debugsec != NULL) + { + bfd_size_type size; + + size = bfd_get_section_size (debugsec); + debug = (char *) xmalloc (size); + bfd_get_section_contents (abfd, debugsec, debug, 0, size); + } + + printf (_(" # sc value section type aux name/off\n")); + for (i = 0; i < data->nsyms; i++) + { + union xcoff32_symbol *s = &data->syms[i]; + int j; + + printf ("%3u ", i); + dump_value (sc_xlat, s->sym.sclass, 10); + printf (" %08x ", s->sym.val); + if (s->sym.scnum > 0 && s->sym.scnum <= data->nscns) + { + if (data->sects != NULL) + printf ("%-8s", data->sects[s->sym.scnum - 1].name); + else + printf ("%-8u", s->sym.scnum); + } + else + switch ((signed short)s->sym.scnum) + { + case N_DEBUG: + printf ("N_DEBUG "); + break; + case N_ABS: + printf ("N_ABS "); + break; + case N_UNDEF: + printf ("N_UNDEF "); + break; + default: + printf ("(%04x) ", s->sym.scnum); + } + printf (" %04x %3u ", s->sym.ntype, s->sym.numaux); + if (s->sym.name != NULL) + printf ("%s", s->sym.name); + else + { + if ((s->sym.sclass & DBXMASK) != 0 && debug != NULL) + printf ("%s", debug + s->sym.raw.off); + else + printf ("%08x", s->sym.raw.off); + } + putchar ('\n'); + + for (j = 0; j < s->sym.numaux; j++, i++) + { + union external_auxent *aux = &s[j + 1].aux; + + printf (" %3u ", i + 1); + switch (s->sym.sclass) + { + case C_STAT: + printf (_(" scnlen: %08x nreloc: %-6u nlinno: %-6u\n"), + (unsigned)bfd_h_get_32 (abfd, aux->x_scn.x_scnlen), + (unsigned)bfd_h_get_16 (abfd, aux->x_scn.x_nreloc), + (unsigned)bfd_h_get_16 (abfd, aux->x_scn.x_nlinno)); + break; + case C_DWARF: + printf (_(" scnlen: %08x nreloc: %-6u\n"), + (unsigned)bfd_h_get_32 (abfd, aux->x_scn.x_scnlen), + (unsigned)bfd_h_get_16 (abfd, aux->x_scn.x_nreloc)); + break; + case C_EXT: + case C_WEAKEXT: + case C_HIDEXT: + if (j == 0 && s->sym.numaux > 1) + { + /* Function aux entry. */ + printf (_(" exptr: %08x fsize: %08x lnnoptr: %08x endndx: %u\n"), + (unsigned)bfd_h_get_32 (abfd, aux->x_sym.x_tagndx), + (unsigned)bfd_h_get_32 + (abfd, aux->x_sym.x_misc.x_fsize), + (unsigned)bfd_h_get_32 + (abfd, aux->x_sym.x_fcnary.x_fcn.x_lnnoptr), + (unsigned)bfd_h_get_32 + (abfd, aux->x_sym.x_fcnary.x_fcn.x_endndx)); + } + else if (j == 1 || (j == 0 && s->sym.numaux == 1)) + { + /* csect aux entry. */ + unsigned char smtyp; + unsigned int scnlen; + + smtyp = bfd_h_get_8 (abfd, aux->x_csect.x_smtyp); + scnlen = bfd_h_get_32 (abfd, aux->x_csect.x_scnlen); + + if (smtyp == XTY_LD) + printf (_(" scnsym: %-8u"), scnlen); + else + printf (_(" scnlen: %08x"), scnlen); + printf (_(" h: parm=%08x sn=%04x al: 2**%u"), + (unsigned)bfd_h_get_32 (abfd, aux->x_csect.x_parmhash), + (unsigned)bfd_h_get_16 (abfd, aux->x_csect.x_snhash), + SMTYP_ALIGN (smtyp)); + printf (_(" typ: ")); + dump_value (smtyp_xlat, SMTYP_SMTYP (smtyp), 2); + printf (_(" cl: ")); + dump_value + (smclas_xlat, + (unsigned)bfd_h_get_8 (abfd, aux->x_csect.x_smclas), 6); + putchar ('\n'); + } + else + printf ("aux\n"); + break; + case C_FILE: + { + unsigned int off; + + printf (_(" ftype: %02x "), + (unsigned)bfd_h_get_8 (abfd, aux->x_file.x_ftype)); + if (aux->x_file.x_n.x_fname[0] != 0) + printf (_("fname: %.14s"), aux->x_file.x_n.x_fname); + else + { + off = (unsigned)bfd_h_get_32 + (abfd, aux->x_file.x_n.x_n.x_offset); + if (data->strings != NULL && off < data->strings_size) + printf (_(" %s"), data->strings + off); + else + printf (_("offset: %08x"), off); + } + putchar ('\n'); + } + break; + case C_BLOCK: + case C_FCN: + printf (_(" lnno: %u\n"), + (unsigned)bfd_h_get_16 + (abfd, aux->x_sym.x_misc.x_lnsz.x_lnno)); + break; + default: + printf ("aux\n"); + break; + } + } + + } + free (debug); +} + +/* Dump xcoff relocation entries. */ + +static void +dump_xcoff32_relocs (bfd *abfd, struct xcoff_dump *data) +{ + unsigned int i; + + if (data->sects == NULL) + { + non_fatal (_("cannot read section headers")); + return; + } + + for (i = 0; i < data->nscns; i++) + { + struct xcoff32_section *sect = &data->sects[i]; + unsigned int nrel = sect->nreloc; + unsigned int j; + + if (nrel == 0) + continue; + printf (_("Relocations for %s (%u)\n"), sect->name, nrel); + if (bfd_seek (abfd, sect->relptr, SEEK_SET) != 0) + { + non_fatal (_("cannot read relocations")); + continue; + } + printf (_("vaddr sgn mod sz type symndx symbol\n")); + for (j = 0; j < nrel; j++) + { + struct external_reloc rel; + unsigned char rsize; + unsigned int symndx; + + if (bfd_bread (&rel, sizeof (rel), abfd) != sizeof (rel)) + { + non_fatal (_("cannot read relocation entry")); + return; + } + rsize = bfd_h_get_8 (abfd, rel.r_size); + printf (_("%08x %c %c %-2u "), + (unsigned int)bfd_h_get_32 (abfd, rel.r_vaddr), + rsize & 0x80 ? 'S' : 'U', + rsize & 0x40 ? 'm' : ' ', + (rsize & 0x3f) + 1); + dump_value (rtype_xlat, bfd_h_get_8 (abfd, rel.r_type), 6); + symndx = bfd_h_get_32 (abfd, rel.r_symndx); + printf ("%-6u ", symndx); + xcoff32_print_symbol (data, symndx); + putchar ('\n'); + } + putchar ('\n'); + } +} + +/* Dump xcoff line number entries. */ + +static void +dump_xcoff32_lineno (bfd *abfd, struct xcoff_dump *data) +{ + unsigned int i; + + if (data->sects == NULL) + { + non_fatal (_("cannot read section headers")); + return; + } + + for (i = 0; i < data->nscns; i++) + { + struct xcoff32_section *sect = &data->sects[i]; + unsigned int nlnno = sect->nlnno; + unsigned int j; + + if (nlnno == 0) + continue; + printf (_("Line numbers for %s (%u)\n"), sect->name, nlnno); + if (bfd_seek (abfd, sect->lnnoptr, SEEK_SET) != 0) + { + non_fatal (_("cannot read line numbers")); + continue; + } + printf (_("lineno symndx/paddr\n")); + for (j = 0; j < nlnno; j++) + { + struct external_lineno ln; + unsigned int no; + + if (bfd_bread (&ln, sizeof (ln), abfd) != sizeof (ln)) + { + non_fatal (_("cannot read line number entry")); + return; + } + no = bfd_h_get_16 (abfd, ln.l_lnno); + printf (_(" %-6u "), no); + if (no == 0) + { + unsigned int symndx = bfd_h_get_32 (abfd, ln.l_addr.l_symndx); + xcoff32_print_symbol (data, symndx); + } + else + printf ("0x%08x", + (unsigned int)bfd_h_get_32 (abfd, ln.l_addr.l_paddr)); + putchar ('\n'); + } + } +} + +/* Dump xcoff loader section. */ + +static void +dump_xcoff32_loader (bfd *abfd) +{ + asection *loader; + bfd_size_type size = 0; + struct external_ldhdr *lhdr; + struct external_ldsym *ldsym; + struct external_ldrel *ldrel; + bfd_byte *ldr_data; + unsigned int version; + unsigned int ndsyms; + unsigned int ndrel; + unsigned int stlen; + unsigned int stoff; + unsigned int impoff; + unsigned int nimpid; + unsigned int i; + const char *p; + + loader = bfd_get_section_by_name (abfd, ".loader"); + + if (loader == NULL) + { + printf (_("no .loader section in file\n")); + return; + } + size = bfd_get_section_size (loader); + if (size < sizeof (*lhdr)) + { + printf (_("section .loader is too short\n")); + return; + } + + ldr_data = (bfd_byte *) xmalloc (size); + bfd_get_section_contents (abfd, loader, ldr_data, 0, size); + lhdr = (struct external_ldhdr *)ldr_data; + printf (_("Loader header:\n")); + version = bfd_h_get_32 (abfd, lhdr->l_version); + printf (_(" version: %u\n"), version); + if (version != 1) + { + printf (_(" Unhandled version\n")); + free (ldr_data); + return; + } + ndsyms = bfd_h_get_32 (abfd, lhdr->l_nsyms); + printf (_(" nbr symbols: %u\n"), ndsyms); + ndrel = bfd_h_get_32 (abfd, lhdr->l_nreloc); + printf (_(" nbr relocs: %u\n"), ndrel); + printf (_(" import strtab len: %u\n"), + (unsigned) bfd_h_get_32 (abfd, lhdr->l_istlen)); + nimpid = bfd_h_get_32 (abfd, lhdr->l_nimpid); + printf (_(" nbr import files: %u\n"), nimpid); + impoff = bfd_h_get_32 (abfd, lhdr->l_impoff); + printf (_(" import file off: %u\n"), impoff); + stlen = bfd_h_get_32 (abfd, lhdr->l_stlen); + printf (_(" string table len: %u\n"), stlen); + stoff = bfd_h_get_32 (abfd, lhdr->l_stoff); + printf (_(" string table off: %u\n"), stoff); + + ldsym = (struct external_ldsym *)(ldr_data + sizeof (*lhdr)); + printf (_("Dynamic symbols:\n")); + printf (_(" # value sc IFEW ty class file pa name\n")); + for (i = 0; i < ndsyms; i++, ldsym++) + { + unsigned char smtype; + + printf (_(" %4u %08x %3u "), i, + (unsigned)bfd_h_get_32 (abfd, ldsym->l_value), + (unsigned)bfd_h_get_16 (abfd, ldsym->l_scnum)); + smtype = bfd_h_get_8 (abfd, ldsym->l_smtype); + putchar (smtype & 0x40 ? 'I' : ' '); + putchar (smtype & 0x20 ? 'F' : ' '); + putchar (smtype & 0x10 ? 'E' : ' '); + putchar (smtype & 0x08 ? 'W' : ' '); + putchar (' '); + dump_value (smtyp_xlat, SMTYP_SMTYP (smtype), 2); + putchar (' '); + dump_value + (smclas_xlat, (unsigned)bfd_h_get_8 (abfd, ldsym->l_smclas), 6); + printf (_(" %3u %3u "), + (unsigned)bfd_h_get_32 (abfd, ldsym->l_ifile), + (unsigned)bfd_h_get_32 (abfd, ldsym->l_parm)); + if (ldsym->_l._l_name[0] != 0) + printf ("%-.8s", ldsym->_l._l_name); + else + { + unsigned int off = bfd_h_get_32 (abfd, ldsym->_l._l_l._l_offset); + if (off > stlen) + printf (_("(bad offset: %u)"), off); + else + printf ("%s", ldr_data + stoff + off); + } + putchar ('\n'); + } + + printf (_("Dynamic relocs:\n")); + printf (_(" vaddr sec sz typ sym\n")); + ldrel = (struct external_ldrel *)(ldr_data + sizeof (*lhdr) + + ndsyms * sizeof (*ldsym)); + for (i = 0; i < ndrel; i++, ldrel++) + { + unsigned int rsize; + unsigned int rtype; + unsigned int symndx; + + rsize = bfd_h_get_8 (abfd, ldrel->l_rtype + 0); + rtype = bfd_h_get_8 (abfd, ldrel->l_rtype + 1); + + printf (_(" %08x %3u %c%c %2u "), + (unsigned)bfd_h_get_32 (abfd, ldrel->l_vaddr), + (unsigned)bfd_h_get_16 (abfd, ldrel->l_rsecnm), + rsize & 0x80 ? 'S' : 'U', + rsize & 0x40 ? 'm' : ' ', + (rsize & 0x3f) + 1); + dump_value (rtype_xlat, rtype, 6); + symndx = bfd_h_get_32 (abfd, ldrel->l_symndx); + switch (symndx) + { + case 0: + printf (_(".text")); + break; + case 1: + printf (_(".data")); + break; + case 2: + printf (_(".bss")); + break; + default: + printf (_("%u"), symndx - 3); + break; + } + putchar ('\n'); + } + + printf (_("Import files:\n")); + p = (char *)ldr_data + impoff; + for (i = 0; i < nimpid; i++) + { + int n1, n2, n3; + + n1 = strlen (p); + n2 = strlen (p + n1 + 1); + n3 = strlen (p + n1 + 1 + n2+ 1); + printf (" %2u: %s,%s,%s\n", i, + p, p + n1 + 1, p + n1 + n2 + 2); + p += n1 + n2 + n3 + 3; + } + + free (ldr_data); +} + +/* Dump xcoff exception section. */ + +static void +dump_xcoff32_except (bfd *abfd, struct xcoff_dump *data) +{ + asection *sec; + bfd_size_type size = 0; + bfd_byte *excp_data; + struct external_exceptab *exceptab; + unsigned int i; + + sec = bfd_get_section_by_name (abfd, ".except"); + + if (sec == NULL) + { + printf (_("no .except section in file\n")); + return; + } + size = bfd_get_section_size (sec); + excp_data = (bfd_byte *) xmalloc (size); + bfd_get_section_contents (abfd, sec, excp_data, 0, size); + exceptab = (struct external_exceptab *)excp_data; + + printf (_("Exception table:\n")); + printf (_("lang reason sym/addr\n")); + for (i = 0; i * sizeof (*exceptab) < size; i++, exceptab++) + { + unsigned int reason; + unsigned int addr; + + addr = bfd_get_32 (abfd, exceptab->e_addr.e_paddr); + reason = bfd_get_8 (abfd, exceptab->e_reason); + printf (_(" %02x %02x "), + (unsigned) bfd_get_8 (abfd, exceptab->e_lang), reason); + if (reason == 0) + xcoff32_print_symbol (data, addr); + else + printf (_("@%08x"), addr); + putchar ('\n'); + } + free (excp_data); +} + +/* Dump xcoff type-check section. */ + +static void +dump_xcoff32_typchk (bfd *abfd) +{ + asection *sec; + bfd_size_type size = 0; + bfd_byte *data; + unsigned int i; + + sec = bfd_get_section_by_name (abfd, ".typchk"); + + if (sec == NULL) + { + printf (_("no .typchk section in file\n")); + return; + } + size = bfd_get_section_size (sec); + data = (bfd_byte *) xmalloc (size); + bfd_get_section_contents (abfd, sec, data, 0, size); + + printf (_("Type-check section:\n")); + printf (_("offset len lang-id general-hash language-hash\n")); + for (i = 0; i < size;) + { + unsigned int len; + + len = bfd_get_16 (abfd, data + i); + printf ("%08x: %-4u ", i, len); + i += 2; + + if (len == 10) + { + /* Expected format. */ + printf ("%04x %08x %08x\n", + (unsigned) bfd_get_16 (abfd, data + i), + (unsigned) bfd_get_32 (abfd, data + i + 2), + (unsigned) bfd_get_32 (abfd, data + i + 2 + 4)); + } + else + { + unsigned int j; + + for (j = 0; j < len; j++) + { + if (j % 16 == 0) + printf ("\n "); + printf (" %02x", (unsigned char)data[i + j]); + } + putchar ('\n'); + } + i += len; + } + free (data); +} + +/* Dump xcoff traceback tags section. */ + +static void +dump_xcoff32_tbtags (bfd *abfd, + const char *text, bfd_size_type text_size, + unsigned int text_start, unsigned int func_start) +{ + unsigned int i; + + if (func_start - text_start > text_size) + { + printf (_(" address beyond section size\n")); + return; + } + for (i = func_start - text_start; i < text_size; i+= 4) + if (bfd_get_32 (abfd, text + i) == 0) + { + unsigned int tb1; + unsigned int tb2; + unsigned int off; + + printf (_(" tags at %08x\n"), i + 4); + if (i + 8 >= text_size) + goto truncated; + + tb1 = bfd_get_32 (abfd, text + i + 4); + tb2 = bfd_get_32 (abfd, text + i + 8); + off = i + 12; + printf (_(" version: %u, lang: %u, global_link: %u, is_eprol: %u, has_tboff: %u, int_proc: %u\n"), + (tb1 >> 24) & 0xff, + (tb1 >> 16) & 0xff, + (tb1 >> 15) & 1, + (tb1 >> 14) & 1, + (tb1 >> 13) & 1, + (tb1 >> 12) & 1); + printf (_(" has_ctl: %u, tocless: %u, fp_pres: %u, log_abort: %u, int_hndl: %u\n"), + (tb1 >> 11) & 1, + (tb1 >> 10) & 1, + (tb1 >> 9) & 1, + (tb1 >> 8) & 1, + (tb1 >> 7) & 1); + printf (_(" name_pres: %u, uses_alloca: %u, cl_dis_inv: %u, saves_cr: %u, saves_lr: %u\n"), + (tb1 >> 6) & 1, + (tb1 >> 5) & 1, + (tb1 >> 2) & 7, + (tb1 >> 1) & 1, + (tb1 >> 0) & 1); + printf (_(" stores_bc: %u, fixup: %u, fpr_saved: %-2u, spare3: %u, gpr_saved: %-2u\n"), + (tb2 >> 31) & 1, + (tb2 >> 30) & 1, + (tb2 >> 24) & 63, + (tb2 >> 22) & 3, + (tb2 >> 16) & 63); + printf (_(" fixparms: %-3u floatparms: %-3u parm_on_stk: %u\n"), + (tb2 >> 8) & 0xff, + (tb2 >> 1) & 0x7f, + (tb2 >> 0) & 1); + + if (((tb2 >> 1) & 0x7fff) != 0) + { + unsigned int parminfo; + + if (off >= text_size) + goto truncated; + parminfo = bfd_get_32 (abfd, text + off); + off += 4; + printf (_(" parminfo: 0x%08x\n"), parminfo); + } + + if ((tb1 >> 13) & 1) + { + unsigned int tboff; + + if (off >= text_size) + goto truncated; + tboff = bfd_get_32 (abfd, text + off); + off += 4; + printf (_(" tb_offset: 0x%08x (start=0x%08x)\n"), + tboff, text_start + i - tboff); + } + if ((tb1 >> 7) & 1) + { + unsigned int hand_mask; + + if (off >= text_size) + goto truncated; + hand_mask = bfd_get_32 (abfd, text + off); + off += 4; + printf (_(" hand_mask_offset: 0x%08x\n"), hand_mask); + } + if ((tb1 >> 11) & 1) + { + unsigned int ctl_info; + unsigned int j; + + if (off >= text_size) + goto truncated; + ctl_info = bfd_get_32 (abfd, text + off); + off += 4; + printf (_(" number of CTL anchors: %u\n"), ctl_info); + for (j = 0; j < ctl_info; j++) + { + if (off >= text_size) + goto truncated; + printf (_(" CTL[%u]: %08x\n"), + j, (unsigned)bfd_get_32 (abfd, text + off)); + off += 4; + } + } + if ((tb1 >> 6) & 1) + { + unsigned int name_len; + unsigned int j; + + if (off >= text_size) + goto truncated; + name_len = bfd_get_16 (abfd, text + off); + off += 2; + printf (_(" Name (len: %u): "), name_len); + if (off + name_len >= text_size) + { + printf (_("[truncated]\n")); + goto truncated; + } + for (j = 0; j < name_len; j++) + if (ISPRINT (text[off + j])) + putchar (text[off + j]); + else + printf ("[%02x]", (unsigned char)text[off + j]); + putchar ('\n'); + off += name_len; + } + if ((tb1 >> 5) & 1) + { + if (off >= text_size) + goto truncated; + printf (_(" alloca reg: %u\n"), + (unsigned) bfd_get_8 (abfd, text + off)); + off++; + } + printf (_(" (end of tags at %08x)\n"), text_start + off); + return; + } + printf (_(" no tags found\n")); + return; + + truncated: + printf (_(" Truncated .text section\n")); + return; +} + +static void +dump_xcoff32_traceback (bfd *abfd, struct xcoff_dump *data) +{ + unsigned int i; + unsigned int scnum_text = -1; + unsigned int text_vma; + asection *text_sec; + bfd_size_type text_size; + char *text; + + if (data->syms == NULL || data->sects == NULL) + return; + + /* Read text section. */ + text_sec = bfd_get_section_by_name (abfd, ".text"); + if (text_sec == NULL) + return; + text_vma = bfd_get_section_vma (abfd, text_sec); + + text_size = bfd_get_section_size (text_sec); + text = (char *) xmalloc (text_size); + bfd_get_section_contents (abfd, text_sec, text, 0, text_size); + + for (i = 0; i < data->nscns; i++) + if (data->sects[i].flags == STYP_TEXT) + { + scnum_text = i + 1; + break; + } + if (scnum_text == (unsigned int)-1) + return; + + for (i = 0; i < data->nsyms; i++) + { + union xcoff32_symbol *s = &data->syms[i]; + + switch (s->sym.sclass) + { + case C_EXT: + case C_HIDEXT: + case C_WEAKEXT: + if (s->sym.scnum == scnum_text + && s->sym.numaux > 0) + { + union external_auxent *aux = &s[s->sym.numaux].aux; + + unsigned int smtyp; + unsigned int smclas; + + smtyp = bfd_h_get_8 (abfd, aux->x_csect.x_smtyp); + smclas = bfd_h_get_8 (abfd, aux->x_csect.x_smclas); + if (SMTYP_SMTYP (smtyp) == XTY_LD + && (smclas == XMC_PR + || smclas == XMC_GL + || smclas == XMC_XO)) + { + printf ("%08x: ", s->sym.val); + xcoff32_print_symbol (data, i); + putchar ('\n'); + dump_xcoff32_tbtags (abfd, text, text_size, + text_vma, s->sym.val); + } + } + break; + default: + break; + } + i += s->sym.numaux; + } + free (text); +} + +/* Dump the TOC symbols. */ + +static void +dump_xcoff32_toc (bfd *abfd, struct xcoff_dump *data) +{ + unsigned int i; + unsigned int nbr_ent; + unsigned int size; + + printf (_("TOC:\n")); + + if (data->syms == NULL) + return; + + nbr_ent = 0; + size = 0; + + for (i = 0; i < data->nsyms; i++) + { + union xcoff32_symbol *s = &data->syms[i]; + + switch (s->sym.sclass) + { + case C_EXT: + case C_HIDEXT: + case C_WEAKEXT: + if (s->sym.numaux > 0) + { + union external_auxent *aux = &s[s->sym.numaux].aux; + unsigned int smclas; + unsigned int ent_sz; + + smclas = bfd_h_get_8 (abfd, aux->x_csect.x_smclas); + if (smclas == XMC_TC + || smclas == XMC_TD + || smclas == XMC_TC0) + { + ent_sz = bfd_h_get_32 (abfd, aux->x_scn.x_scnlen); + printf ("%08x %08x ", + s->sym.val, ent_sz); + xcoff32_print_symbol (data, i); + putchar ('\n'); + nbr_ent++; + size += ent_sz; + } + } + break; + default: + break; + } + i += s->sym.numaux; + } + printf (_("Nbr entries: %-8u Size: %08x (%u)\n"), + nbr_ent, size, size); +} + +/* Handle an rs6000 xcoff file. */ + +static void +dump_xcoff32 (bfd *abfd, struct external_filehdr *fhdr) +{ + struct xcoff_dump data; + + data.nscns = bfd_h_get_16 (abfd, fhdr->f_nscns); + data.symptr = bfd_h_get_32 (abfd, fhdr->f_symptr); + data.nsyms = bfd_h_get_32 (abfd, fhdr->f_nsyms); + data.opthdr = bfd_h_get_16 (abfd, fhdr->f_opthdr); + data.sects = NULL; + data.syms = NULL; + data.strings = NULL; + data.strings_size = 0; + + if (options[OPT_FILE_HEADER].selected) + dump_xcoff32_file_header (abfd, fhdr, &data); + + if (options[OPT_AOUT].selected) + dump_xcoff32_aout_header (abfd, &data); + + if (options[OPT_SYMS].selected + || options[OPT_RELOCS].selected + || options[OPT_LINENO].selected + || options[OPT_TRACEBACK].selected) + xcoff32_read_sections (abfd, &data); + + if (options[OPT_SECTIONS].selected) + dump_xcoff32_sections_header (abfd, &data); + + if (options[OPT_SYMS].selected + || options[OPT_RELOCS].selected + || options[OPT_LINENO].selected + || options[OPT_EXCEPT].selected + || options[OPT_TRACEBACK].selected + || options[OPT_TOC].selected) + xcoff32_read_symbols (abfd, &data); + + if (options[OPT_SYMS].selected) + dump_xcoff32_symbols (abfd, &data); + + if (options[OPT_RELOCS].selected) + dump_xcoff32_relocs (abfd, &data); + + if (options[OPT_LINENO].selected) + dump_xcoff32_lineno (abfd, &data); + + if (options[OPT_LOADER].selected) + dump_xcoff32_loader (abfd); + + if (options[OPT_EXCEPT].selected) + dump_xcoff32_except (abfd, &data); + + if (options[OPT_TYPCHK].selected) + dump_xcoff32_typchk (abfd); + + if (options[OPT_TRACEBACK].selected) + dump_xcoff32_traceback (abfd, &data); + + if (options[OPT_TOC].selected) + dump_xcoff32_toc (abfd, &data); + + free (data.sects); + free (data.strings); + free (data.syms); +} + +/* Dump ABFD (according to the options[] array). */ + +static void +xcoff_dump (bfd *abfd) +{ + struct external_filehdr fhdr; + unsigned short magic; + + /* Read file header. */ + if (bfd_seek (abfd, 0, SEEK_SET) != 0 + || bfd_bread (&fhdr, sizeof (fhdr), abfd) != sizeof (fhdr)) + { + non_fatal (_("cannot read header")); + return; + } + + /* Decoding. We don't use the bfd/coff function to get all the fields. */ + magic = bfd_h_get_16 (abfd, fhdr.f_magic); + if (options[OPT_FILE_HEADER].selected) + { + printf (_("File header:\n")); + printf (_(" magic: 0x%04x (0%04o) "), magic, magic); + switch (magic) + { + case U802WRMAGIC: + printf (_("(WRMAGIC: writable text segments)")); + break; + case U802ROMAGIC: + printf (_("(ROMAGIC: readonly sharablee text segments)")); + break; + case U802TOCMAGIC: + printf (_("(TOCMAGIC: readonly text segments and TOC)")); + break; + default: + printf (_("unknown magic")); + } + putchar ('\n'); + } + if (magic == U802ROMAGIC || magic == U802WRMAGIC || magic == U802TOCMAGIC) + dump_xcoff32 (abfd, &fhdr); + else + printf (_(" Unhandled magic\n")); +} + +/* Vector for xcoff. */ + +const struct objdump_private_desc objdump_private_desc_xcoff = + { + xcoff_help, + xcoff_filter, + xcoff_dump, + options + }; diff --git a/binutils/po/.cvsignore b/binutils/po/.cvsignore deleted file mode 100644 index becd153..0000000 --- a/binutils/po/.cvsignore +++ /dev/null @@ -1 +0,0 @@ -*.gmo diff --git a/binutils/po/POTFILES.in b/binutils/po/POTFILES.in index 7d09242..c82e24a 100644 --- a/binutils/po/POTFILES.in +++ b/binutils/po/POTFILES.in @@ -20,6 +20,8 @@ dlltool.h dllwrap.c dwarf.c dwarf.h +elfcomm.c +elfcomm.h elfedit.c emul_aix.c emul_vanilla.c @@ -38,6 +40,8 @@ not-ranlib.c not-strip.c objcopy.c objdump.c +objdump.h +od-xcoff.c prdbg.c rclex.c rdcoff.c diff --git a/binutils/po/bg.gmo b/binutils/po/bg.gmo new file mode 100644 index 0000000000000000000000000000000000000000..91c86a53ed3cb1dfac54e1bbd0fa8adf2f2c1343 GIT binary patch literal 45189 zcmchg37p(jmG4VYF##1(M3CiAAS8jVCJSrm!~jVkl7yIr#U3V9cU5-^s;io+>MSy9 z*abxdR2cTfnbBD!goFgb@^pO8bFa+eJZBtd9Gy4go6$Gp%$wEaeShcP`(JA5Eb8kI z|NQFz|KH`@bI(2J+;i{$^6evE^YI*ir@tzfI}U74$>r|h_g9Y8(_HR|V{*9@!8e0P zgLA+)gUi6zgM;8WiydP9KzwhzK{`pzQ=W?@oUI6v} zUQqeJ4899I|!w-O{v?!90HKI-umkSw{s0wof!o8ihi z2BgWk#i00C1V!h=U>s-2$)`@utI<#PO&o6A4q=dXb8 z2JZvuy4>G@%KvH_q4LiJ&jg3Sv%veoW#Csq(RDP9Qo3_M^l(j`)@$x z!>`WePNK5UaQ`yQQa_F%e20M_0#)z*;9J4p^UpsAPUZe<{`oh-w{!nP@HOC}bUM}K z4hMCA1o&p~C{X3i0F{0L_!jVT@EGt~FamD@5w+ZJfTH6MK;`=*Q2qFQ@D1Sc3{Lg? z=^#TOw-7uUyc#?foB-9&ANBYgsC3@~j{*M+G`e7-`f&!Rb}k0r0bT_nqPYoB{qi8F zbe{&_27bZgUx1?LUqJQes~KFP>nu?DE&=ua3UCTo0>$SVsP^9l9tS?*pT7*ggZpoR zqW9nZ{m~4@+~0tz=M5LS^bsh2o(+oLm7w02K=F68fB#`n^7Khi^?eCcy6=Lb_g}%^2ameQ z>5p%M)3|^8VmDsT2i2ZYQ2e?T6rE3d{33WV_umCi0S{e*?gaZl)w>2f3ETp10UrWK z!K0Qse!dS>{zpO4^EpuR@*Ple_*3vi@C_F`dh(#ky$VD%23!_=d+;r@@L>I@TZ{UaOQIN z{0dNfxdA*4dlJopn(?LU2`qjw3Y zaW~@cZvrJhPk|bT&w-M|uYi*8@A>A4KKk)`Lp_5GeV24pjgD zF{t+bGpK$$ewBNFp~q`L$?^Na*Ms+iA9__T_c++cecx)A?SJUvAM_Y$*6K@Oto{z(H_$o$I$(z}IpA_u#w1 zAAy&Hi}?qU&piZEMeaMG`Ka z8sHH49`G9=tjf*d<`M8lumYY4ajNgb;0XAa;ML$#8nFTVB>1b~8+bSbRzN-fI=BTq zmzT=79lRGjX1y!#cfn!qe+I&W-0(H<3fv8fz9V6#`fUUF4)8AUwcw{gwd-k+uF4%s zrEh!{J}g)QM=5kR_|+o5An$)#a^v(;h>$!q!MWh0pyYWkDEa*{DE^)@>c-!-;M=%= z5S$G@15OA38vGdedK!5h_y{PzO({G6Ughy2Q0@2&um;Y%7F`NH1*)CLky-gRf^wH|NGzsctO?afnA`|eIHc2&!bZD?KbdO@JUep z@)9@?JaycSyZ3HiQs3j7|}5B?{p@i^;Nrze(yOSvBdF9COeM}j{ARsRvUIk`Ot zR5=fVCxhF-#o!-z)>KJ40YDY%;Z4}$Z-KL^#$x83FBV>$RP?ze)Az%PRg>D=KTar9pc zp3nW0;4JXl;2GfS?{@umE+{(R?e8o8{#NiJo<9zXAK&wM{6`(1E(b;b`@wU-r$O=Q zZ$asa*WTmiA@2bfaDNZD0{l978hHG@PH$WSs@-Ft`1w4jdcOs#-snDuSApkoe=pbv zeg!-e{0~t4=>M4O&mySzw}BLqdltMBT>5dR=N!TZ4h@N1yx zK8!(iCb$d~o$m)#{+GZLz<&cp*V`VT?-@s{z>VDh`meiwJ>o%E{}teJo^J!M0Dl7J z!F3Ngyctya&wv-}J$M1QbLdg$&pi%`p1%a=fX6)M z_|!9$?R z`3iVC*!Ps9>q_ug?mq!80-pibfIk97-_lPyzHbHxxPKbd`+oq%r$xWv^zZ|q-v0wbz>jxuNfu`K zhd=Qs_`d)BSt0pF^H;d;;i7AEALiQ1CEN36uK&jG*Ms^KJ^K3=7i`OYgX?B4{oTj) zV=lGrHKhMn@YlG0$hDS>=H*`H%i(A4)%<`YM-XcARSkm;Nr~y2O6va<6!N5xmC#hTS$EE8wAA zJN>AQ#U35doy?%*G#Slxqg>R zf6E-?t_4q~%**_JfXDeUo9lmb{gf;G$(PgLH1Ku)H$x`(fIW5p9LDoE^Ydq1r}F!I z;KN*smHr5P3%CiCJZ|9n3oeG2`4x3=jO%Tr`3{J<=l-25;?m!T9N52K=HJt~s;Oru z@cS07|Kd7>>sYR%DC=(Uueh$_(%)1r=?{(l1zg8-=@0d7{-E9P&l|}5-@!L>y@TJQ z;4@sm!ll3ebYQWQ|HbdexUS@S%0K^A@C5Sd?|oczxIW7Ddak$f{9N!ixrVv)m*@Ix zuD5f&g)991IX@PK8;?Vvbl(TK9_2d4*E5gb6I}X}PWc~PujcwZ*Rx#z#C1Q{zj6H^ zuD|8d-xjXhxZcb4cU*tKwVG=^*S~P-ZzgpNx}UilJsu6-?td=@@8Y_itHt#?t_!#@ z$GPoX`ujT9VO-L0vaxq^>2C&QuLO74o%`q8z;j%G?4RxNcq;f^u7B|NPlDg%`k($@ za3a@6fBzovB(9^WW0imQXW(o6@0UDY4IV=p{T;>iC-w{d=~3`9*YQ4$?)$hN;(9ID zF0Mnk^!Glm){xTbUcU#>so`VX!tl=~*|e6H~KHGY)2uHd@Z zKO6vOk+uN-KG)m0uH(9uEBxKWkKg9{XReRFHCbMngZt-||v*w7FqwuKj)H`DG&`jZ$;U%EDNQ zl+zn$OmEERN563J^wY2A_rUbV!l~fe4W(#$BWjd}o8?+HDmS9i*m!eG|I}QlalF=O zl!q#%Xke@`yrEnzEu0?}>SKfJ%hhJ7zNuEf?&`j%Jn!7I`=YVoTD>%wFI7gaz9C;J z{aSvg^uE4me0;bsYHpYq8;T31#{7zCaA2%n&NqhZgN9N+my0 zEtcvH6)R>$$!#NQ)*_!OYHS%Bs#O|MnFffck-~5(s+5Q7g?iGGe7>}KxH3^J zmQa_fFBL-(N!E!*DPNta=op%JZXl%n^R>a{4mkIKbDvvA6p zQK4G&zt0LCn9pz7QY;NkjE3%vaqUFC8qwwBg?gh@k1Ww>xjO3Ta3VzF3rjpyrX|&) zy_#N}lH)epPlZakU~;NnvKt89RBmplO*ErL1J#9=l{}4Tpo&;7REgnF4f0P%YW1kl zXq3iiY2D|6teK)pK)jm2cpZDUO$hj|XjIJEsGP=pJ z!4rK^y;NwHq7^V~Q?z*ba-Wu@)){Apwt-H*MoZOFU0FhB`61Vq@vMDiJS&XVIAgI? zDN%0v@6u9fJZdtMjV}!+4Ea2r0mJfHh8ic`n+{es3-!?wgCdN4t3zYmGi2V}hz_#{ zW8%cTxsIv}4pclmg^S5otW+c+K_XnU9FZfw$4R2$ug+(@*Rq4&7qvzt9Eh~}eCyJD zjDL4gKK&>d*V=WywTX7}`MTsv>x|y&DqrwLmaD~b9o?KEM9mK`Obs6kmYz;E^F!sy~K1`5@n z12t}awh^_tksqlPM(H;LrzTdR5#k3_*u-YVO2TKpF6L1B$E9UhCG``H)N5nDPE@YQ zX}He2j#{rHS-y}k*@~DnudlU|v=nLR(b66!DL+Q$4xOW_y>3BzQ7n;EVmtu*qiB%f zTbQUc=VP~>)y$7mQfYJ38w?DNl<|Nw4-3t3rd4wM#y6r#Zs`i2J$`M5CN2fO57(-V zW_1vl#eQtroDvZ z8%mY&KwuhI)e&f_!Bw;*jHE_kw1h*N-$=HNrTS0}gWmo}qwIMe;i=%OZK+K}n>H}$ z%FP*#s92NdK@pd`BGmr&5+YYK71-Nym60)4P_J0~>K*Bm2g^pQxR6B~OT)FXadHin zE9K@E^HHMuFje>Nf6D3En~=QW;FxvrEp1a&Ni+GiZX92*(eZj56LOxS}~s4~rTGl#)KCb67FDfpR)vV1gFqxB&@lGBztW6ko+o@K{E z@{tLQGsgW{kRonu;QGc$h1hfSKS zQ^mNr9GlCu5uFMCUF?NEaT@ z#8?m(S+F3Y#j|qAyxlMKw-?o_^dL03NEISsji?YNiri2 zE?Ty7>1FG2W|bC)1gO>`yxJmqWSH=V99)P_C5D9cDlYrfD6;2qF;Yy`!a;-5xS;=kbqNg(i9#uVHUlN3uU$#FpehpCr!oKZuG&P^&rMBEsTxVS}Y z0v%JTqa>QnMoBQDHCL@!ec95bQElj2O)@=i*HU9J%aAi)t^yNM+#Jnb+y2%JQ;BF~ zj5AfWGWtx{Upvu|pIDL}LgTv#qsr1m&sdvRg{FU9p^kE8kxrKE>bDZnQd7VsLXf^Q zR8p0ahPI&P77RLR3+iQg%{1q!ev}ugTcVZgmNU(%6Q@8e5_KzGKT)cp$;61J3L9`m zWI|KEv6WJRw#0P|ZzyQo;D|;ueb+~4&gxeonoQLT#q#C_H`MxyeVgAG*p;-cBHHBN z`t~{5l4uPTu*m23MRR6LL(Dl_1=d0V?RWv|+a`Ll-l5W(vaIFSMQ#=hT)1@c$_rL3 zagADI^8#luhu}kfi(@V&V7ir6Q+K#hL#{^`+|cM-(>K&t>ASFR`TL?Z=woCgZhO?g z;WA%=VOcIztH`!QrT1SWS`eL+A1XKdqBZ1 zyYI*p^0@b!qG744 zl*|F+_ARsaxwQhqZwm(aCse$wYR@sW3d_|PLFV};1_J&8WPm zLOYP6dKLl?eOy_qiuh{bZ_S3HB7Li}Oz$e^zKRs%CrrgfCFmWXH*q#gxp| zYN!YnHuEy$;#kszHMo!CDV!Ik@ZJ->?eFAzKF!d5>DM{r8Kyp(cDrg zp+^?`Cox-+4DH6pRd66Cs6B_qMw|U(75M<*ymYPTcyaz%gxtPAY{9aV-{UV zl=IZwfU^_otY(cMU3qk2j-^}@yMt-O@G(&H^tFjh(mY-Dj_5L|qTrW(mtDB}g4I{qgiA9zpVd0HS4Mk@I~Et3&J+&=Dv_L{*oza) zhiwy&_V7enXSN|3L_=8|UA6HoL>V_Uqq(!0tS+sW@IPxKO**g?EmbJZX1IM3?lP-n z7u6;zMGa4lrC`B|77QjF7B#nw6Vkb;t{oMMaX2Qp2jXi8nkLmNsopf26A8z17x~Cz zdIYEw#b{Pi*Istna_4(s)zpmSX_&S7r>mD;zGQWrG^BM;L(=e6QA&}LxSuwQ_uS1b z?tC9Q1PZ#n){=Rg8x3h*t7;(m60{ppgEc;OfsHV2+ZPol#w%qDc`Uhd)n%*KI!jQi zBbSAWlcgoL`^mUw+oh}{m&V#_+`^$r=cqlnO>|6%XeHt=^1@>k=mbBJvSqekDekvx zG;D)fVeo81AJx&)$O7XR(WQ$x)B>}M(+thWrn;yGF2 z=e0&yRF_EmaTWxF)umu?1YSrP?fPcH*mILnA0>K4QC8YwX_NRtJtq%{IK6 zJ>OQ)$5{SiVVh-zdULOZR9xkyA z5l6D-XioV*Qcgj^_c#THXSXFuMnSwqC{ax7 zstiT`Xlqi`v6b;Z4mOtGR$wEJk z^$RJfRH@Ri{!+&jlrCqmV>WbkG{}rOy(2|WuD+o-Hhz7*(cJt#*1?7;X=QCyW6i`y zmTxnQuF>EyzC!cr;LsZN)?5Ak48(-C?lu1s>WO&(rE>b=0MoJ*A?XChRin9QnsU|N zcPWA;+1N>6*N|Qj$4#OyFH|O&zG!f)oDq#_83h-Web}hIjivtF70zj9*R{5_C~JrL zr`M+!`_Lgi?R;l=7`1++IoH4k%aT+?_p90jY(ANHzcneFZZjM$q{Ri&broh|c#gK9 zQF4>DNbX8Qo0rgqBA+U4;drc6kWyvefb&hHlCIf2!~EH6iZepsygzr%MC<`{&9gY9 zjg$5+zn)4p$!W5l~LX`ckoeA6uUj_4&^~iC>XBaNmhuPcXH_4mz_dCyQl**BC?AE@O^&wIp zs+*|BzFvd_5y(pC3*Nr<#u8Tzl4I&yMIh9bim%@1s1$}u6(#S+<&XwL zoMCdR^*#w722egmJCiPuldTdPT9%>DCQanZtK{hxOS47kQ zM8EG}GSf6YlQx;S?MI23WNjsCer0Z=i==5{saZ$4MBPUiIdoOh zOvhiQRW3Nsu$qYH5H_qdDx*G48{{Gx-w?ATk;!#>0~Ea*0*Z+fPY1JpVx~5J>qNzk z>uabWx2aIJefFAZYKKgISur1nAXo*PXqMT^Jhy-D?Edp+Pj!>Y{E7zqCi53E%gnE> z&DV63jSMd7qS5L^f2}?`b=75S^A_-;WAlrdT+O#gT7J%){Oq%$IdkUEn|C^qwb>-h zuP$vYYfnI1I^u3~=gmKB_UW_dl5RO0RPt+?bv3YNiodU}X$(ZGO3iw0V>G}E0!efpVL2k zD*L~*xi7!g3~LkpdInLWa`k-MCxV??ux{)<;`A_HJ$M+!Ob3q zA0ipkv>lpuQQ*ta1y#`izqjrEpri2@{5j>`8(S|x%I?-HdvCH`t)haRTirjZY<&!( zo}mrf_udU@J0qj7^$JgS?7bakY=tSjZM^{56ntmvMFx(2n;B6DJaQSf>+U7eD#tD4 zcpf@vs&YqEu$yZS|GumwDlBGCm(Mb({FT=3y*Dn5TKAB8m&)En>337+wuH)oI9*`1 z%Cavdafwo&YtoryhnO2PjoeOgyJ_SLt=(;H(dSJ`nJoEtE7p~oBFdm&C>lFc56>uIOQ@3e3x(Edn?4jt-W`+PboukUrIMI3bY-Re5O7igN#I_ z`1-njx!QWdw9yU|jnr^jfhphDr>uTFB3V*s9YuJta4OIXs3#?S7nc4Q@xV(vD=y7X ziQ!)S*Seo3y~5QtQqXN04^CGhIW`tU&(L4nTRYwGh7|B>$FRZ?r_K%O%#=W<$58~HL`^EK5&KK?1O1@Dh(;oEAvrdV~CYVQv320ZY z1MNwDhqRlU;27nvi@P`d!-|(G+lB(lxC8c)v)n81EXj{W=>>J?nlC5FiF(hko__%~ z_>O4*HhMohf@I0yh_%clK4kVg>WmpQ*7fRfeOqn9mG#E;g|!?7JRq~>&cVlnHRFbh zthudotb2TSZLX8|zi?sW(TPl?JnSys45BxX$?Q4V@qu?KYV_tb^cC8|4iS&tMf>oiPFHoC`*9<~~Q?s?*D!cnvD2}&nM8p4=kU-7E zWEXBzmxV!`bfUOy{GIGGd9VD@QnXb*^RuqEqM0WA+o{09Bi7|i4v|@OR()7ow{_{-yR=Ce#kY5Z^NQ701?b1_js_S}#_IWuL3r{cS_AG0cm6{Do57CVu=}V%Z@*8ZWf__)FMZeY%CbmVU7U#SS#l48@| zo47~ikw($UJ!Feo&oZQLRyaXzZ94#A5~5zgx7y=+Ar&5V9kTaMqvHE~!(65*B z@Scjy0dG66VZTc?&4PnYH+PilOdW=v34j-tUdKE5o(ZK%T1<}QOL#Y-FYahWjBvy= zYHy^zR@2nJ*cB&F*GZ1CFLefiJPDjdE3PBZ)p}9=C*vVWllZ%+7j?>@1V`0z*GkTw zA))bY(%4=yVolp{R;+9n){Wtcz6&Y9G-yY<{8 zXHg_9G?KkvLf};%32jgqKHFLtvXkzR+pS@4UKeaZ67$d^rvZM+3s*wux>+*d6T;LT z#sFzjn(ZW>+$o~1_1WVs)HXSN(!$;kG^saEwVifBp}R~EnGvTFA5#vEnCXYaEJtK} z&21-PcuDkZkV*4n5E1$lupN#t#((6ycE;k!y!pK;mQRY_wc z>}~x%Q#Hs1g(olT&<}XMmAmJ4@<-+!)8*uqpEty=s$(vNo9M%FCDzg*BuR%n@7ZE% zDPuUO4aIy0jX-v@N=tL%#a#{#aar^^Mlm9nTp@-Vbt+Jk&9fiphq%&QVUmIu`-A-H zS++Ra=!HJs7X>yM)O63Zs&sz!)ulW7mDu^N zreYF3qe@c2Dt(09>apNM87UM_idt%{Wfqf#}~fe>y3B`r2azH0fXa=I?l zFY5}GFEep>;1PFb)hS1&MiT0cWlCCFyZcNFM;fjeMX6s{hHBP|wA3?YdS&gr2-PDs zbCa(v#DqoH1IG4F)g`%3c%`5!)SCgg-E~9j1@5U`%g&k-d&MtCg>zH%o;T)vYYTwy zGgbRwiUqEVWtb*EOGPt7gh>vaOi$bcX1i~rBDs0+(pMwzLJW5twFX#jt;{K{W3qZo zLIe4l8}>YWCCe!3MM{PW->0EcmFoN)i(6@xLks%!hxoHgRisX3p~qOrmo^C}v)ID0 zi9HQ9Pg`;y+ZKiMwM@@&aU#Or2|D(JVg};CLotK1TukJxXnArr={M1k^X)TK97KD=kSXXEpa&EGF6Ekp2sHS z5CV3pq911?eg^sP(htfW5=;@0p;Vlws9r>b0B8HH+ z`;L?S5`tuH)(4JB@4?g zQjKvuLA@tG$*INmsMSFbo;g0}mqf36)zo*I4yrPxrO)soM1ft( zGUpG3B-I0AU`@Z~N@e@b)s9aAYO^aIkY zSIW$qsgbn1jta5f%;X>#Het2#R69hfDOLZJg}-5B;u$KNfPp6uMBtTfAY_5K6` zWm9sSg1PY8WcFY6WY0N@yDH{nwk`sDu-armoVDnGaB#geW&6nnLf7+$cw_o5E%`Pc z_TFxNhVV#4Q%)-0W3r(0vOBzpXR-5<3BA*{N&ifIt)kS(MWW@~bd^GlZC9wB8Q!%` z-5cajS(?-pvuRIn54>Zwp}lPfX@;?F2UY1oR)@TGKhLSna!SLhZ)BS#q-}>g#d~9- z)>F=xp*Qia{9sG#e)XtX_I>()ItR+BVrFj^5O2NcG^QK)8{^o&hNc|fb-8}QKj^a0$=;jmpsn%>A5a!h6q#o=Jok_ z9>uZ1pu{^g{YjYItB`bGg_+B~b7iWw=$$MaQ%a5OebH_HC4)-aRN!CAv+x{^#jLe0 z;Q$$Kgmp|$LPw;{osTlQB?3yegrtaQr))cASnzV@^oDioaP5GNhKe_qvH2Y&l+4TWYYNy zZqOOEZH-}7zH2%o#03P}$CcxPYBKScg3%<~TpQPbN%N(e8;=qS^F1mV*nx~{-OjIw z#<~F^GWUWWN3{J2?UteIQ0|)02fjmD>7htnsnzy)TuzomJfXWR{KeX-_HmcolNeni5Aq#xs&KxkNAGlNFoK=D~{FYvdd?grM2vM(Hp{{L*00vUEmov2R*=1FJccgQ? zSRtUZQclsVp7a?1gQe|3%_HixKmb&QzD_HCzLto?R;~@k?|tM7EjKH--%QJ%4d_g0 ztgK|XF&``hZr7->STLTP)A{PRm-p|qz;p+q8&j?J)94qAE-DN-M!dOy{6j>Iz6zB8xwQqH`QF5kShiv#7Q<E}qgn8FWG<7AR-p_W@54!}OW4D)hO`OgWpf&plX{VO&hep#?jXZdmT;D#f054O zUnvyRZF>q`jsK&%HCRNVCcV!6PP4%TV}HxYeE%bf+TVNfkV3^6|X)Ij}-BLb|r=!Xl?Gw(e82owrKNOlHf=yfML_!6-*wtT40Uy7vLw zQk@Y=tJJ-Hj8b8~Nwi3#i&9IY;;;smqms(q#y{NNN##9}J&gy_s^lPa*p9ARxu>}A zE2GIv&L05TJ~rgso5FGWTpo$+7i>m}tF<<&jhi%;-g4(dN+I~ZL(J38+#N|nWP<6K z2W+#aEW$0cmaot=2EvUEw*4|M@I7dJ4(^{#K2%-ceBvQ^#iA*M|8SqeituR?-_chm zDO9JbFVm5a0~tH}TSmv&+24%qW2eL1Nfk+-ZkwfMY4)iW*_0)o1@LCGGkDG?Y4hi7 ze@Yzkm<*emSWAF()ZuA9>d z;%hh&Kx^SU`JZyIKgt5;@{j!IEKc9aG0a|(Db!zmJ= zM2rvfG`FS3-nSPj2_fIMOv#~-dv3^~WH*`Zs5$3Wv1pveyXzn5)7L+?6+o_w2}PoI zcp?JKe|?OUUNs(IX7TF@4N>EQcX?dN;)8~7+#x}hO_U!Y%d=c54Ygg8*70GHG1f>` zr%{~y+(`NW{a|G|^7n6c=oytwOqu52%~xYYgPTn`0TGvCjcXmZJ=1NFprcb;Pg-kW zYnwl=K?>;%a`+)Wo5bA+^|xq7hahfccIBOCYG$OG18O_i#2_nALe9X2&kQ3v*(Ee> z=Qh!?;fd#75~mu&usULyi=S@g2T`;o8=}BF@4)hrZslm`0YtOJr?F(9X@P4G^{bA zi++hu1c?hqX0%flcDr;=(wr--017XB>m+4u6Om||KX!JSwZ2^MLYi7OS?})198hXM%QjJQn=RZi0!E|@-fJw-?QZl= zLb3MLs;9kM2M$_Lf)Y=%Q}vl0_Kk35F893j(Qg8G`{ zbCHnvV3+l=bS$*t*X2#Ga(;eN29qK@Pfh0-^HK{TnPYhoBxI7^BKtU)7h$&WQuxA# z&){YI*sXna+S{T_<8VXFKs&CtEAtM3;z^J5{bf<-q}BT?d}OhE7K~y<`vr6Nq(_Iw zZQFY{yXtoBf+nlR$!cVFOWND|adnUpxs~0&e%g&mQ6*?G z6H>DTX2VrpmpL=z%^h4kS;77^V<{N3E3yOHN7EU1n3O&Yz1P`hcTljR%;@y7U@2XD zW=d0c=H>9Afu5S~nxy@dZxniOB5lUVu2Ctzn2}Tv!I)$V=01|9&alyIzO23!PzZC6 zEWL8;6DGG($OM9#v>$s0ryL84{BLt+aFDV&D4Ji8CtZMSr+w5(kZH!^kXV|cBWaJi zkd?afslr~Zl~Kk>4h$3_MoCmj_kR^lx(WS zMAI#!vsI5f^Yu~{g>5s8_3m|PK&3Vk?Y+BuX4R*0ZLN<*TGIhd4dH-n1p!LwpFq7y zhi1+@eVH96T_?j|D%-`CsY0WTiIt5vS7Xp4^nlvo8yd=OI}Tf;6nd0Sn>;9?%S_RA zqlhzMc3v_(mHVb??j#3hi}`L4r571(6i^{``OK*kw0khWUEDg3)XwCiXz3}nEhbmZ z>pWfB6A;eQcIR!2Y?-4;WhP{?z%3XfV(C+&pYT94PEmV6bF%~`>fd`^Ft6)rs1Cc zRMzf8x}8bsv%wj|Xd~jw`j9S2k?gc&8ripTtlwddmou@+8Z|Q%8Ow&NBqQl2m&$A> zil;tss)tOkWgK+ALD0G9CW=~$4q?``)1N8QI^9HWdwd#t>r*7zN*R56?kE?8-a3L-Nxf9qlN#B)hcGldWAPBp!60(}GEf(V`KG2+4>}UL^cY z`@$5L)-^$-tPuF8NRxt{79ZaCVh6pMEnH{Ji$D`bjR+h;>oXYN)%oj@+Be%KF8-*g zT$*tDO#+0)XZw$aoGT~RB+{}H2hpNtMXrHjn%@vj6WuTk4y^nI^FtNiumA;AoK_Jy2r@0fut+Y`C#zXTigF98 zp0?npS->=Nl8>223%$vu!!\n" "Language-Team: LANGUAGE \n" +"Language: \n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=CHARSET\n" "Content-Transfer-Encoding: 8bit\n" -#: addr2line.c:80 +#: addr2line.c:81 #, c-format msgid "Usage: %s [option(s)] [addr(s)]\n" msgstr "" -#: addr2line.c:81 +#: addr2line.c:82 #, c-format msgid " Convert addresses into line number/file name pairs.\n" msgstr "" -#: addr2line.c:82 +#: addr2line.c:83 #, c-format msgid "" " If no addresses are specified on the command line, they will be read from " "stdin\n" msgstr "" -#: addr2line.c:83 +#: addr2line.c:84 #, c-format msgid "" " The options are:\n" @@ -52,229 +53,234 @@ msgid "" "\n" msgstr "" -#: addr2line.c:100 ar.c:293 coffdump.c:469 dlltool.c:3926 dllwrap.c:524 -#: elfedit.c:1155 nlmconv.c:1113 objcopy.c:576 objcopy.c:611 readelf.c:3219 -#: size.c:99 srconv.c:1742 strings.c:663 sysdump.c:653 windmc.c:228 -#: windres.c:694 +#: addr2line.c:101 ar.c:304 ar.c:333 coffdump.c:470 dlltool.c:3938 +#: dllwrap.c:524 elfedit.c:650 nlmconv.c:1114 objcopy.c:576 objcopy.c:611 +#: readelf.c:3174 size.c:99 srconv.c:1743 strings.c:667 sysdump.c:653 +#: windmc.c:228 windres.c:695 #, c-format msgid "Report bugs to %s\n" msgstr "" -#: addr2line.c:262 +#: addr2line.c:271 #, c-format msgid " at " msgstr "" -#: addr2line.c:287 +#: addr2line.c:296 #, c-format msgid " (inlined by) " msgstr "" -#: addr2line.c:320 +#: addr2line.c:329 #, c-format msgid "%s: cannot get addresses from archive" msgstr "" -#: addr2line.c:337 +#: addr2line.c:346 #, c-format msgid "%s: cannot find section %s" msgstr "" -#: addr2line.c:406 nm.c:1563 objdump.c:3301 +#: addr2line.c:415 nm.c:1566 objdump.c:3423 #, c-format msgid "unknown demangling style `%s'" msgstr "" -#: ar.c:215 +#: ar.c:238 #, c-format msgid "no entry %s in archive\n" msgstr "" -#: ar.c:233 +#: ar.c:254 #, c-format msgid "" -"Usage: %s [emulation options] [--plugin ] [-]{dmpqrstx}" -"[abcfilNoPsSuvV] [member-name] [count] archive-file file...\n" +"Usage: %s [emulation options] [-]{dmpqrstx}[abcDfilMNoPsSTuvV] [--plugin " +"] [member-name] [count] archive-file file...\n" msgstr "" -#: ar.c:235 +#: ar.c:260 #, c-format msgid "" -"Usage: %s [emulation options] [-]{dmpqrstx}[abcfilNoPsSuvV] [member-name] " +"Usage: %s [emulation options] [-]{dmpqrstx}[abcDfilMNoPsSTuvV] [member-name] " "[count] archive-file file...\n" msgstr "" -#: ar.c:240 +#: ar.c:266 #, c-format msgid " %s -M [ - read options from \n" msgstr "" -#: ar.c:268 +#: ar.c:293 +#, c-format +msgid " --target=BFDNAME - specify the target object format as BFDNAME\n" +msgstr "" + +#: ar.c:295 #, c-format msgid " optional:\n" msgstr "" -#: ar.c:269 +#: ar.c:296 #, c-format msgid " --plugin

- load the specified plugin\n" msgstr "" -#: ar.c:276 +#: ar.c:317 #, c-format msgid "Usage: %s [options] archive\n" msgstr "" -#: ar.c:277 +#: ar.c:318 #, c-format msgid " Generate an index to speed access to archives\n" msgstr "" -#: ar.c:278 +#: ar.c:319 #, c-format msgid "" " The options are:\n" " @ Read options from \n" msgstr "" -#: ar.c:281 +#: ar.c:322 #, c-format msgid " --plugin Load the specified plugin\n" msgstr "" -#: ar.c:284 +#: ar.c:325 #, c-format msgid "" " -t Update the archive's symbol map timestamp\n" @@ -282,83 +288,70 @@ msgid "" " -v --version Print version information\n" msgstr "" -#: ar.c:481 nm.c:1636 -#, c-format -msgid "sorry - this program has been built without plugin support\n" -msgstr "" - -#: ar.c:508 +#: ar.c:449 msgid "two different operation options specified" msgstr "" -#: ar.c:589 +#: ar.c:538 nm.c:1639 #, c-format -msgid "illegal option -- %c" +msgid "sorry - this program has been built without plugin support\n" msgstr "" -#: ar.c:632 +#: ar.c:693 msgid "no operation specified" msgstr "" -#: ar.c:635 +#: ar.c:696 msgid "`u' is only meaningful with the `r' option." msgstr "" -#: ar.c:638 +#: ar.c:699 msgid "`u' is not meaningful with the `D' option." msgstr "" -#: ar.c:646 +#: ar.c:707 msgid "`N' is only meaningful with the `x' and `d' options." msgstr "" -#: ar.c:649 +#: ar.c:710 msgid "Value for `N' must be positive." msgstr "" -#: ar.c:661 +#: ar.c:724 msgid "`x' cannot be used on thin archives." msgstr "" -#: ar.c:702 +#: ar.c:765 #, c-format msgid "internal error -- this option not implemented" msgstr "" -#: ar.c:771 +#: ar.c:834 #, c-format msgid "creating %s" msgstr "" -#: ar.c:820 ar.c:875 ar.c:1203 objcopy.c:2052 +#: ar.c:883 ar.c:937 ar.c:1266 objcopy.c:2055 #, c-format msgid "internal stat error on %s" msgstr "" -#: ar.c:824 -#, c-format -msgid "" -"\n" -"<%s>\n" -"\n" -msgstr "" - -#: ar.c:840 ar.c:908 +#: ar.c:902 ar.c:970 #, c-format msgid "%s is not a valid archive" msgstr "" -#: ar.c:1108 +#: ar.c:1171 #, c-format msgid "No member named `%s'\n" msgstr "" -#: ar.c:1158 +#: ar.c:1221 #, c-format msgid "no entry %s in archive %s!" msgstr "" -#: ar.c:1297 +#: ar.c:1360 #, c-format msgid "%s: no archive map to update" msgstr "" @@ -418,23 +411,13 @@ msgstr "" msgid "%s: no open archive\n" msgstr "" -#: bin2c.c:59 -#, c-format -msgid "Usage: %s < input_file > output_file\n" -msgstr "" - -#: bin2c.c:60 -#, c-format -msgid "Prints bytes from stdin in hex format.\n" -msgstr "" - -#: binemul.c:38 +#: binemul.c:39 #, c-format msgid " No emulation specific options\n" msgstr "" #. Macros for common output. -#: binemul.h:46 +#: binemul.h:49 #, c-format msgid " emulation options: \n" msgstr "" @@ -474,42 +457,47 @@ msgstr "" msgid "BFD header file version %s\n" msgstr "" -#: bucomm.c:556 +#: bucomm.c:559 #, c-format msgid "%s: bad number: %s" msgstr "" -#: bucomm.c:573 strings.c:409 +#: bucomm.c:576 strings.c:409 #, c-format msgid "'%s': No such file" msgstr "" -#: bucomm.c:575 strings.c:411 +#: bucomm.c:578 strings.c:411 #, c-format msgid "Warning: could not locate '%s'. reason: %s" msgstr "" -#: bucomm.c:579 +#: bucomm.c:582 #, c-format msgid "Warning: '%s' is not an ordinary file" msgstr "" -#: coffdump.c:106 +#: bucomm.c:584 +#, c-format +msgid "Warning: '%s' has negative size, probably it is too large" +msgstr "" + +#: coffdump.c:107 #, c-format msgid "#lines %d " msgstr "" -#: coffdump.c:460 sysdump.c:646 +#: coffdump.c:461 sysdump.c:646 #, c-format msgid "Usage: %s [option(s)] in-file\n" msgstr "" -#: coffdump.c:461 +#: coffdump.c:462 #, c-format -msgid " Print a human readable interpretation of a SYSROFF object file\n" +msgid " Print a human readable interpretation of a COFF object file\n" msgstr "" -#: coffdump.c:462 +#: coffdump.c:463 #, c-format msgid "" " The options are:\n" @@ -519,571 +507,571 @@ msgid "" "\n" msgstr "" -#: coffdump.c:531 srconv.c:1832 sysdump.c:710 +#: coffdump.c:532 srconv.c:1833 sysdump.c:710 msgid "no input file specified" msgstr "" -#: cxxfilt.c:119 nm.c:269 objdump.c:256 +#: cxxfilt.c:119 nm.c:269 objdump.c:281 #, c-format msgid "Report bugs to %s.\n" msgstr "" -#: debug.c:647 +#: debug.c:648 msgid "debug_add_to_current_namespace: no current file" msgstr "" -#: debug.c:726 +#: debug.c:727 msgid "debug_start_source: no debug_set_filename call" msgstr "" -#: debug.c:782 +#: debug.c:781 msgid "debug_record_function: no debug_set_filename call" msgstr "" -#: debug.c:834 +#: debug.c:833 msgid "debug_record_parameter: no current function" msgstr "" -#: debug.c:866 +#: debug.c:865 msgid "debug_end_function: no current function" msgstr "" -#: debug.c:872 +#: debug.c:871 msgid "debug_end_function: some blocks were not closed" msgstr "" -#: debug.c:900 +#: debug.c:899 msgid "debug_start_block: no current block" msgstr "" -#: debug.c:936 +#: debug.c:935 msgid "debug_end_block: no current block" msgstr "" -#: debug.c:943 +#: debug.c:942 msgid "debug_end_block: attempt to close top level block" msgstr "" -#: debug.c:966 +#: debug.c:965 msgid "debug_record_line: no current unit" msgstr "" #. FIXME -#: debug.c:1019 +#: debug.c:1018 msgid "debug_start_common_block: not implemented" msgstr "" #. FIXME -#: debug.c:1030 +#: debug.c:1029 msgid "debug_end_common_block: not implemented" msgstr "" #. FIXME. -#: debug.c:1114 +#: debug.c:1113 msgid "debug_record_label: not implemented" msgstr "" -#: debug.c:1136 +#: debug.c:1135 msgid "debug_record_variable: no current file" msgstr "" -#: debug.c:1664 +#: debug.c:1663 msgid "debug_make_undefined_type: unsupported kind" msgstr "" -#: debug.c:1841 +#: debug.c:1840 msgid "debug_name_type: no current file" msgstr "" -#: debug.c:1886 +#: debug.c:1885 msgid "debug_tag_type: no current file" msgstr "" -#: debug.c:1894 +#: debug.c:1893 msgid "debug_tag_type: extra tag attempted" msgstr "" -#: debug.c:1931 +#: debug.c:1930 #, c-format msgid "Warning: changing type size from %d to %d\n" msgstr "" -#: debug.c:1953 +#: debug.c:1952 msgid "debug_find_named_type: no current compilation unit" msgstr "" -#: debug.c:2056 +#: debug.c:2055 #, c-format msgid "debug_get_real_type: circular debug information for %s\n" msgstr "" -#: debug.c:2483 +#: debug.c:2482 msgid "debug_write_type: illegal type encountered" msgstr "" -#: dlltool.c:901 dlltool.c:927 dlltool.c:958 +#: dlltool.c:902 dlltool.c:928 dlltool.c:959 #, c-format msgid "Internal error: Unknown machine type: %d" msgstr "" -#: dlltool.c:999 +#: dlltool.c:1000 #, c-format msgid "Can't open def file: %s" msgstr "" -#: dlltool.c:1004 +#: dlltool.c:1005 #, c-format msgid "Processing def file: %s" msgstr "" -#: dlltool.c:1008 +#: dlltool.c:1009 msgid "Processed def file" msgstr "" -#: dlltool.c:1032 +#: dlltool.c:1033 #, c-format msgid "Syntax error in def file %s:%d" msgstr "" -#: dlltool.c:1069 +#: dlltool.c:1070 #, c-format msgid "%s: Path components stripped from image name, '%s'." msgstr "" -#: dlltool.c:1087 +#: dlltool.c:1088 #, c-format msgid "NAME: %s base: %x" msgstr "" -#: dlltool.c:1090 dlltool.c:1106 +#: dlltool.c:1091 dlltool.c:1112 msgid "Can't have LIBRARY and NAME" msgstr "" -#: dlltool.c:1103 +#: dlltool.c:1109 #, c-format msgid "LIBRARY: %s base: %x" msgstr "" -#: dlltool.c:1342 resrc.c:293 +#: dlltool.c:1354 resrc.c:293 #, c-format msgid "wait: %s" msgstr "" -#: dlltool.c:1347 dllwrap.c:422 resrc.c:298 +#: dlltool.c:1359 dllwrap.c:422 resrc.c:298 #, c-format msgid "subprocess got fatal signal %d" msgstr "" -#: dlltool.c:1353 dllwrap.c:429 resrc.c:305 +#: dlltool.c:1365 dllwrap.c:429 resrc.c:305 #, c-format msgid "%s exited with status %d" msgstr "" -#: dlltool.c:1384 +#: dlltool.c:1396 #, c-format msgid "Sucking in info from %s section in %s" msgstr "" -#: dlltool.c:1524 +#: dlltool.c:1536 #, c-format msgid "Excluding symbol: %s" msgstr "" -#: dlltool.c:1613 dlltool.c:1624 nm.c:1010 nm.c:1021 +#: dlltool.c:1625 dlltool.c:1636 nm.c:1012 nm.c:1023 #, c-format msgid "%s: no symbols" msgstr "" #. FIXME: we ought to read in and block out the base relocations. -#: dlltool.c:1650 +#: dlltool.c:1662 #, c-format msgid "Done reading %s" msgstr "" -#: dlltool.c:1660 +#: dlltool.c:1672 #, c-format msgid "Unable to open object file: %s: %s" msgstr "" -#: dlltool.c:1663 +#: dlltool.c:1675 #, c-format msgid "Scanning object file %s" msgstr "" -#: dlltool.c:1678 +#: dlltool.c:1690 #, c-format msgid "Cannot produce mcore-elf dll from archive file: %s" msgstr "" -#: dlltool.c:1780 +#: dlltool.c:1792 msgid "Adding exports to output file" msgstr "" -#: dlltool.c:1832 +#: dlltool.c:1844 msgid "Added exports to output file" msgstr "" -#: dlltool.c:1974 +#: dlltool.c:1986 #, c-format msgid "Generating export file: %s" msgstr "" -#: dlltool.c:1979 +#: dlltool.c:1991 #, c-format msgid "Unable to open temporary assembler file: %s" msgstr "" -#: dlltool.c:1982 +#: dlltool.c:1994 #, c-format msgid "Opened temporary file: %s" msgstr "" -#: dlltool.c:2159 +#: dlltool.c:2171 msgid "failed to read the number of entries from base file" msgstr "" -#: dlltool.c:2207 +#: dlltool.c:2219 msgid "Generated exports file" msgstr "" -#: dlltool.c:2416 +#: dlltool.c:2428 #, c-format msgid "bfd_open failed open stub file: %s: %s" msgstr "" -#: dlltool.c:2420 +#: dlltool.c:2432 #, c-format msgid "Creating stub file: %s" msgstr "" -#: dlltool.c:2882 +#: dlltool.c:2894 #, c-format msgid "bfd_open failed reopen stub file: %s: %s" msgstr "" -#: dlltool.c:2896 dlltool.c:2972 +#: dlltool.c:2908 dlltool.c:2984 #, c-format msgid "failed to open temporary head file: %s" msgstr "" -#: dlltool.c:2958 dlltool.c:3038 +#: dlltool.c:2970 dlltool.c:3050 #, c-format msgid "failed to open temporary head file: %s: %s" msgstr "" -#: dlltool.c:3052 +#: dlltool.c:3064 #, c-format msgid "failed to open temporary tail file: %s" msgstr "" -#: dlltool.c:3109 +#: dlltool.c:3121 #, c-format msgid "failed to open temporary tail file: %s: %s" msgstr "" -#: dlltool.c:3131 +#: dlltool.c:3143 #, c-format msgid "Can't create .lib file: %s: %s" msgstr "" -#: dlltool.c:3135 +#: dlltool.c:3147 #, c-format msgid "Creating library file: %s" msgstr "" -#: dlltool.c:3227 dlltool.c:3233 +#: dlltool.c:3239 dlltool.c:3245 #, c-format msgid "cannot delete %s: %s" msgstr "" -#: dlltool.c:3238 +#: dlltool.c:3250 msgid "Created lib file" msgstr "" -#: dlltool.c:3450 +#: dlltool.c:3462 #, c-format msgid "Can't open .lib file: %s: %s" msgstr "" -#: dlltool.c:3458 dlltool.c:3480 +#: dlltool.c:3470 dlltool.c:3492 #, c-format msgid "%s is not a library" msgstr "" -#: dlltool.c:3498 +#: dlltool.c:3510 #, c-format msgid "Import library `%s' specifies two or more dlls" msgstr "" -#: dlltool.c:3509 +#: dlltool.c:3521 #, c-format msgid "Unable to determine dll name for `%s' (not an import library?)" msgstr "" -#: dlltool.c:3733 +#: dlltool.c:3745 #, c-format msgid "Warning, ignoring duplicate EXPORT %s %d,%d" msgstr "" -#: dlltool.c:3739 +#: dlltool.c:3751 #, c-format msgid "Error, duplicate EXPORT with ordinals: %s" msgstr "" -#: dlltool.c:3844 +#: dlltool.c:3856 msgid "Processing definitions" msgstr "" -#: dlltool.c:3876 +#: dlltool.c:3888 msgid "Processed definitions" msgstr "" #. xgetext:c-format -#: dlltool.c:3883 dllwrap.c:483 +#: dlltool.c:3895 dllwrap.c:483 #, c-format msgid "Usage %s \n" msgstr "" #. xgetext:c-format -#: dlltool.c:3885 +#: dlltool.c:3897 #, c-format msgid "" " -m --machine Create as DLL for . [default: %s]\n" msgstr "" -#: dlltool.c:3886 +#: dlltool.c:3898 #, c-format msgid "" " possible : arm[_interwork], i386, mcore[-elf]{-le|-be}, " "ppc, thumb\n" msgstr "" -#: dlltool.c:3887 +#: dlltool.c:3899 #, c-format msgid " -e --output-exp Generate an export file.\n" msgstr "" -#: dlltool.c:3888 +#: dlltool.c:3900 #, c-format msgid " -l --output-lib Generate an interface library.\n" msgstr "" -#: dlltool.c:3889 +#: dlltool.c:3901 #, c-format msgid " -y --output-delaylib Create a delay-import library.\n" msgstr "" -#: dlltool.c:3890 +#: dlltool.c:3902 #, c-format msgid " -a --add-indirect Add dll indirects to export file.\n" msgstr "" -#: dlltool.c:3891 +#: dlltool.c:3903 #, c-format msgid "" " -D --dllname Name of input dll to put into interface lib.\n" msgstr "" -#: dlltool.c:3892 +#: dlltool.c:3904 #, c-format msgid " -d --input-def Name of .def file to be read in.\n" msgstr "" -#: dlltool.c:3893 +#: dlltool.c:3905 #, c-format msgid " -z --output-def Name of .def file to be created.\n" msgstr "" -#: dlltool.c:3894 +#: dlltool.c:3906 #, c-format msgid " --export-all-symbols Export all symbols to .def\n" msgstr "" -#: dlltool.c:3895 +#: dlltool.c:3907 #, c-format msgid " --no-export-all-symbols Only export listed symbols\n" msgstr "" -#: dlltool.c:3896 +#: dlltool.c:3908 #, c-format msgid " --exclude-symbols Don't export \n" msgstr "" -#: dlltool.c:3897 +#: dlltool.c:3909 #, c-format msgid " --no-default-excludes Clear default exclude symbols\n" msgstr "" -#: dlltool.c:3898 +#: dlltool.c:3910 #, c-format msgid " -b --base-file Read linker generated base file.\n" msgstr "" -#: dlltool.c:3899 +#: dlltool.c:3911 #, c-format msgid " -x --no-idata4 Don't generate idata$4 section.\n" msgstr "" -#: dlltool.c:3900 +#: dlltool.c:3912 #, c-format msgid " -c --no-idata5 Don't generate idata$5 section.\n" msgstr "" -#: dlltool.c:3901 +#: dlltool.c:3913 #, c-format msgid "" " --use-nul-prefixed-import-tables Use zero prefixed idata$4 and idata" "$5.\n" msgstr "" -#: dlltool.c:3902 +#: dlltool.c:3914 #, c-format msgid "" " -U --add-underscore Add underscores to all symbols in interface " "library.\n" msgstr "" -#: dlltool.c:3903 +#: dlltool.c:3915 #, c-format msgid "" " --add-stdcall-underscore Add underscores to stdcall symbols in " "interface library.\n" msgstr "" -#: dlltool.c:3904 +#: dlltool.c:3916 #, c-format msgid "" " --no-leading-underscore All symbols shouldn't be prefixed by an " "underscore.\n" msgstr "" -#: dlltool.c:3905 +#: dlltool.c:3917 #, c-format msgid "" " --leading-underscore All symbols should be prefixed by an " "underscore.\n" msgstr "" -#: dlltool.c:3906 +#: dlltool.c:3918 #, c-format msgid " -k --kill-at Kill @ from exported names.\n" msgstr "" -#: dlltool.c:3907 +#: dlltool.c:3919 #, c-format msgid " -A --add-stdcall-alias Add aliases without @.\n" msgstr "" -#: dlltool.c:3908 +#: dlltool.c:3920 #, c-format msgid " -p --ext-prefix-alias Add aliases with .\n" msgstr "" -#: dlltool.c:3909 +#: dlltool.c:3921 #, c-format msgid " -S --as Use for assembler.\n" msgstr "" -#: dlltool.c:3910 +#: dlltool.c:3922 #, c-format msgid " -f --as-flags Pass to the assembler.\n" msgstr "" -#: dlltool.c:3911 +#: dlltool.c:3923 #, c-format msgid "" " -C --compat-implib Create backward compatible import library.\n" msgstr "" -#: dlltool.c:3912 +#: dlltool.c:3924 #, c-format msgid "" " -n --no-delete Keep temp files (repeat for extra " "preservation).\n" msgstr "" -#: dlltool.c:3913 +#: dlltool.c:3925 #, c-format msgid "" " -t --temp-prefix Use to construct temp file names.\n" msgstr "" -#: dlltool.c:3914 +#: dlltool.c:3926 #, c-format msgid "" " -I --identify Report the name of the DLL associated with " ".\n" msgstr "" -#: dlltool.c:3915 +#: dlltool.c:3927 #, c-format msgid "" " --identify-strict Causes --identify to report error when multiple " "DLLs.\n" msgstr "" -#: dlltool.c:3916 +#: dlltool.c:3928 #, c-format msgid " -v --verbose Be verbose.\n" msgstr "" -#: dlltool.c:3917 +#: dlltool.c:3929 #, c-format msgid " -V --version Display the program version.\n" msgstr "" -#: dlltool.c:3918 +#: dlltool.c:3930 #, c-format msgid " -h --help Display this information.\n" msgstr "" -#: dlltool.c:3919 +#: dlltool.c:3931 #, c-format msgid " @ Read options from .\n" msgstr "" -#: dlltool.c:3921 +#: dlltool.c:3933 #, c-format msgid "" " -M --mcore-elf Process mcore-elf object files into .\n" msgstr "" -#: dlltool.c:3922 +#: dlltool.c:3934 #, c-format msgid " -L --linker Use as the linker.\n" msgstr "" -#: dlltool.c:3923 +#: dlltool.c:3935 #, c-format msgid " -F --linker-flags Pass to the linker.\n" msgstr "" -#: dlltool.c:4070 +#: dlltool.c:4082 #, c-format msgid "Path components stripped from dllname, '%s'." msgstr "" -#: dlltool.c:4118 +#: dlltool.c:4130 #, c-format msgid "Unable to open base-file: %s" msgstr "" -#: dlltool.c:4153 +#: dlltool.c:4165 #, c-format msgid "Machine '%s' not supported" msgstr "" -#: dlltool.c:4232 +#: dlltool.c:4245 #, c-format msgid "Warning, machine type (%d) not supported for delayimport." msgstr "" -#: dlltool.c:4300 dllwrap.c:213 +#: dlltool.c:4313 dllwrap.c:213 #, c-format msgid "Tried file: %s" msgstr "" -#: dlltool.c:4307 dllwrap.c:220 +#: dlltool.c:4320 dllwrap.c:220 #, c-format msgid "Using file: %s" msgstr "" @@ -1338,1057 +1326,1112 @@ msgstr "" msgid "DRIVER options : %s\n" msgstr "" -#: dwarf.c:112 dwarf.c:161 elfedit.c:123 elfedit.c:167 elfedit.c:195 -#: elfedit.c:227 readelf.c:368 readelf.c:536 -#, c-format -msgid "Unhandled data length: %d\n" -msgstr "" - -#: dwarf.c:312 dwarf.c:2890 +#: dwarf.c:256 dwarf.c:3019 msgid "badly formed extended line op encountered!\n" msgstr "" -#: dwarf.c:319 +#: dwarf.c:263 #, c-format msgid " Extended opcode %d: " msgstr "" -#: dwarf.c:324 +#: dwarf.c:268 #, c-format msgid "" "End of Sequence\n" "\n" msgstr "" -#: dwarf.c:330 +#: dwarf.c:274 #, c-format -msgid "set Address to 0x%lx\n" +msgid "set Address to 0x%s\n" msgstr "" -#: dwarf.c:336 +#: dwarf.c:280 #, c-format msgid " define new File Table entry\n" msgstr "" -#: dwarf.c:337 dwarf.c:2431 +#: dwarf.c:281 dwarf.c:2548 #, c-format msgid " Entry\tDir\tTime\tSize\tName\n" msgstr "" -#: dwarf.c:339 +#: dwarf.c:295 #, c-format -msgid " %d\t" +msgid "set Discriminator to %s\n" msgstr "" -#: dwarf.c:342 dwarf.c:344 dwarf.c:346 dwarf.c:2443 dwarf.c:2445 dwarf.c:2447 +#: dwarf.c:356 #, c-format -msgid "%lu\t" +msgid "(%s" msgstr "" -#: dwarf.c:347 +#: dwarf.c:360 #, c-format -msgid "" -"%s\n" -"\n" +msgid ",%s" msgstr "" -#: dwarf.c:351 +#: dwarf.c:364 #, c-format -msgid "set Discriminator to %lu\n" +msgid ",%s)\n" msgstr "" #. The test against DW_LNW_hi_user is redundant due to #. the limited range of the unsigned char data type used #. for op_code. #. && op_code <= DW_LNE_hi_user -#: dwarf.c:393 +#: dwarf.c:387 #, c-format -msgid "user defined: length %d\n" +msgid "user defined: " msgstr "" -#: dwarf.c:395 dwarf.c:2922 +#: dwarf.c:389 #, c-format -msgid "UNKNOWN: length %d\n" +msgid "UNKNOWN: " msgstr "" -#: dwarf.c:408 +#: dwarf.c:390 +#, c-format +msgid "length %d [" +msgstr "" + +#: dwarf.c:407 msgid "" msgstr "" -#: dwarf.c:414 +#: dwarf.c:413 #, c-format -msgid "DW_FORM_strp offset too big: %lx\n" +msgid "DW_FORM_strp offset too big: %s\n" msgstr "" #: dwarf.c:415 msgid "" msgstr "" -#: dwarf.c:654 +#: dwarf.c:655 #, c-format msgid "Unknown TAG value: %lx" msgstr "" -#: dwarf.c:695 +#: dwarf.c:696 #, c-format msgid "Unknown FORM value: %lx" msgstr "" -#: dwarf.c:704 +#: dwarf.c:705 #, c-format -msgid " %lu byte block: " +msgid " %s byte block: " msgstr "" -#: dwarf.c:1037 +#: dwarf.c:1050 #, c-format msgid "(DW_OP_call_ref in frame info)" msgstr "" -#: dwarf.c:1109 +#: dwarf.c:1122 #, c-format msgid "(DW_OP_GNU_implicit_pointer in frame info)" msgstr "" -#: dwarf.c:1167 +#: dwarf.c:1229 #, c-format msgid "(User defined location op)" msgstr "" -#: dwarf.c:1169 +#: dwarf.c:1231 #, c-format msgid "(Unknown location op)" msgstr "" -#: dwarf.c:1217 +#: dwarf.c:1278 msgid "Internal error: DWARF version is not 2, 3 or 4.\n" msgstr "" -#: dwarf.c:1323 -msgid "DW_FORM_data8 is unsupported when sizeof (unsigned long) != 8\n" +#: dwarf.c:1384 +msgid "DW_FORM_data8 is unsupported when sizeof (dwarf_vma) != 8\n" msgstr "" -#: dwarf.c:1373 +#: dwarf.c:1434 #, c-format -msgid " (indirect string, offset: 0x%lx): %s" +msgid " (indirect string, offset: 0x%s): %s" msgstr "" -#: dwarf.c:1397 +#: dwarf.c:1459 #, c-format msgid "Unrecognized form: %lu\n" msgstr "" -#: dwarf.c:1485 +#: dwarf.c:1552 #, c-format msgid "(not inlined)" msgstr "" -#: dwarf.c:1488 +#: dwarf.c:1555 #, c-format msgid "(inlined)" msgstr "" -#: dwarf.c:1491 +#: dwarf.c:1558 #, c-format msgid "(declared as inline but ignored)" msgstr "" -#: dwarf.c:1494 +#: dwarf.c:1561 #, c-format msgid "(declared as inline and inlined)" msgstr "" -#: dwarf.c:1497 +#: dwarf.c:1564 #, c-format -msgid " (Unknown inline attribute value: %lx)" +msgid " (Unknown inline attribute value: %s)" msgstr "" -#: dwarf.c:1662 +#: dwarf.c:1735 #, c-format msgid "(location list)" msgstr "" -#: dwarf.c:1683 dwarf.c:3563 +#: dwarf.c:1756 dwarf.c:3722 #, c-format msgid " [without DW_AT_frame_base]" msgstr "" -#: dwarf.c:1698 +#: dwarf.c:1771 #, c-format msgid "" -"Offset %lx used as value for DW_AT_import attribute of DIE at offset %lx is " +"Offset %s used as value for DW_AT_import attribute of DIE at offset %lx is " "too big.\n" msgstr "" -#: dwarf.c:1889 +#: dwarf.c:1971 #, c-format msgid "Unknown AT value: %lx" msgstr "" -#: dwarf.c:1960 +#: dwarf.c:2042 #, c-format -msgid "Reserved length value (%lx) found in section %s\n" +msgid "Reserved length value (0x%s) found in section %s\n" msgstr "" -#: dwarf.c:1971 +#: dwarf.c:2054 #, c-format -msgid "Corrupt unit length (%lx) found in section %s\n" +msgid "Corrupt unit length (0x%s) found in section %s\n" msgstr "" -#: dwarf.c:1978 +#: dwarf.c:2062 #, c-format msgid "No comp units in %s section ?" msgstr "" -#: dwarf.c:1987 +#: dwarf.c:2071 #, c-format msgid "Not enough memory for a debug info array of %u entries" msgstr "" -#: dwarf.c:1995 dwarf.c:3158 dwarf.c:3252 dwarf.c:3326 dwarf.c:3443 -#: dwarf.c:3598 dwarf.c:3667 dwarf.c:3862 +#: dwarf.c:2080 dwarf.c:3288 dwarf.c:3382 dwarf.c:3456 dwarf.c:3588 +#: dwarf.c:3758 dwarf.c:3827 dwarf.c:4024 #, c-format msgid "" "Contents of the %s section:\n" "\n" msgstr "" -#: dwarf.c:2003 +#: dwarf.c:2088 #, c-format msgid "Unable to locate %s section!\n" msgstr "" -#: dwarf.c:2084 +#: dwarf.c:2169 #, c-format -msgid " Compilation Unit @ offset 0x%lx:\n" +msgid " Compilation Unit @ offset 0x%s:\n" msgstr "" -#: dwarf.c:2085 +#: dwarf.c:2171 #, c-format -msgid " Length: 0x%lx (%s)\n" +msgid " Length: 0x%s (%s)\n" msgstr "" -#: dwarf.c:2087 +#: dwarf.c:2174 #, c-format msgid " Version: %d\n" msgstr "" -#: dwarf.c:2088 +#: dwarf.c:2175 #, c-format -msgid " Abbrev Offset: %ld\n" +msgid " Abbrev Offset: %s\n" msgstr "" -#: dwarf.c:2089 +#: dwarf.c:2177 #, c-format msgid " Pointer Size: %d\n" msgstr "" -#: dwarf.c:2093 +#: dwarf.c:2181 #, c-format msgid " Signature: " msgstr "" -#: dwarf.c:2097 +#: dwarf.c:2185 #, c-format -msgid " Type Offset: 0x%lx\n" +msgid " Type Offset: 0x%s\n" msgstr "" -#: dwarf.c:2104 +#: dwarf.c:2193 #, c-format msgid "" -"Debug info is corrupted, length of CU at %lx extends beyond end of section " -"(length = %lx)\n" +"Debug info is corrupted, length of CU at %s extends beyond end of section " +"(length = %s)\n" msgstr "" -#: dwarf.c:2115 +#: dwarf.c:2206 #, c-format -msgid "CU at offset %lx contains corrupt or unsupported version number: %d.\n" +msgid "CU at offset %s contains corrupt or unsupported version number: %d.\n" msgstr "" -#: dwarf.c:2125 +#: dwarf.c:2217 #, c-format msgid "" "Debug info is corrupted, abbrev offset (%lx) is larger than abbrev section " "size (%lx)\n" msgstr "" -#: dwarf.c:2172 +#: dwarf.c:2267 #, c-format msgid "" "Bogus end-of-siblings marker detected at offset %lx in .debug_info section\n" msgstr "" -#: dwarf.c:2176 +#: dwarf.c:2271 msgid "Further warnings about bogus end-of-sibling markers suppressed\n" msgstr "" -#: dwarf.c:2183 +#: dwarf.c:2290 #, c-format msgid " <%d><%lx>: Abbrev Number: %lu" msgstr "" -#: dwarf.c:2200 +#: dwarf.c:2294 #, c-format -msgid "" -"DIE at offset %lx refers to abbreviation number %lu which does not exist\n" +msgid " <%d><%lx>: ...\n" msgstr "" -#: dwarf.c:2206 +#: dwarf.c:2313 #, c-format -msgid " (%s)\n" +msgid "" +"DIE at offset %lx refers to abbreviation number %lu which does not exist\n" msgstr "" -#: dwarf.c:2298 +#: dwarf.c:2415 #, c-format msgid "" "Raw dump of debug contents of section %s:\n" "\n" msgstr "" -#: dwarf.c:2336 +#: dwarf.c:2453 #, c-format msgid "" "The information in section %s appears to be corrupt - the section is too " "small\n" msgstr "" -#: dwarf.c:2348 dwarf.c:2701 +#: dwarf.c:2465 dwarf.c:2833 msgid "Only DWARF version 2, 3 and 4 line info is currently supported.\n" msgstr "" -#: dwarf.c:2362 dwarf.c:2716 +#: dwarf.c:2479 dwarf.c:2848 msgid "Invalid maximum operations per insn.\n" msgstr "" -#: dwarf.c:2381 +#: dwarf.c:2498 #, c-format msgid " Offset: 0x%lx\n" msgstr "" -#: dwarf.c:2382 +#: dwarf.c:2499 #, c-format msgid " Length: %ld\n" msgstr "" -#: dwarf.c:2383 +#: dwarf.c:2500 #, c-format msgid " DWARF Version: %d\n" msgstr "" -#: dwarf.c:2384 +#: dwarf.c:2501 #, c-format msgid " Prologue Length: %d\n" msgstr "" -#: dwarf.c:2385 +#: dwarf.c:2502 #, c-format msgid " Minimum Instruction Length: %d\n" msgstr "" -#: dwarf.c:2387 +#: dwarf.c:2504 #, c-format msgid " Maximum Ops per Instruction: %d\n" msgstr "" -#: dwarf.c:2388 +#: dwarf.c:2505 #, c-format msgid " Initial value of 'is_stmt': %d\n" msgstr "" -#: dwarf.c:2389 +#: dwarf.c:2506 #, c-format msgid " Line Base: %d\n" msgstr "" -#: dwarf.c:2390 +#: dwarf.c:2507 #, c-format msgid " Line Range: %d\n" msgstr "" -#: dwarf.c:2391 +#: dwarf.c:2508 #, c-format msgid " Opcode Base: %d\n" msgstr "" -#: dwarf.c:2400 +#: dwarf.c:2517 #, c-format msgid "" "\n" " Opcodes:\n" msgstr "" -#: dwarf.c:2403 +#: dwarf.c:2520 #, c-format msgid " Opcode %d has %d args\n" msgstr "" -#: dwarf.c:2409 +#: dwarf.c:2526 #, c-format msgid "" "\n" " The Directory Table is empty.\n" msgstr "" -#: dwarf.c:2412 +#: dwarf.c:2529 #, c-format msgid "" "\n" " The Directory Table:\n" msgstr "" -#: dwarf.c:2416 -#, c-format -msgid " %s\n" -msgstr "" - -#: dwarf.c:2427 +#: dwarf.c:2544 #, c-format msgid "" "\n" " The File Name Table is empty.\n" msgstr "" -#: dwarf.c:2430 +#: dwarf.c:2547 #, c-format msgid "" "\n" " The File Name Table:\n" msgstr "" -#: dwarf.c:2438 -#, c-format -msgid " %d\t" -msgstr "" - -#: dwarf.c:2449 -#, c-format -msgid "%s\n" -msgstr "" - #. Now display the statements. -#: dwarf.c:2457 +#: dwarf.c:2577 #, c-format msgid "" "\n" " Line Number Statements:\n" msgstr "" -#: dwarf.c:2476 +#: dwarf.c:2596 #, c-format -msgid " Special opcode %d: advance Address by %lu to 0x%lx" +msgid " Special opcode %d: advance Address by %s to 0x%s" msgstr "" -#: dwarf.c:2488 +#: dwarf.c:2610 #, c-format -msgid " Special opcode %d: advance Address by %lu to 0x%lx[%d]" +msgid " Special opcode %d: advance Address by %s to 0x%s[%d]" msgstr "" -#: dwarf.c:2494 +#: dwarf.c:2618 #, c-format -msgid " and Line by %d to %d\n" +msgid " and Line by %s to %d\n" msgstr "" -#: dwarf.c:2504 +#: dwarf.c:2628 #, c-format msgid " Copy\n" msgstr "" -#: dwarf.c:2514 +#: dwarf.c:2638 #, c-format -msgid " Advance PC by %lu to 0x%lx\n" +msgid " Advance PC by %s to 0x%s\n" msgstr "" -#: dwarf.c:2526 +#: dwarf.c:2651 #, c-format -msgid " Advance PC by %lu to 0x%lx[%d]\n" +msgid " Advance PC by %s to 0x%s[%d]\n" msgstr "" -#: dwarf.c:2536 +#: dwarf.c:2662 #, c-format -msgid " Advance Line by %d to %d\n" +msgid " Advance Line by %s to %d\n" msgstr "" -#: dwarf.c:2543 +#: dwarf.c:2670 #, c-format -msgid " Set File Name to entry %d in the File Name Table\n" +msgid " Set File Name to entry %s in the File Name Table\n" msgstr "" -#: dwarf.c:2551 +#: dwarf.c:2678 #, c-format -msgid " Set column to %lu\n" +msgid " Set column to %s\n" msgstr "" -#: dwarf.c:2558 +#: dwarf.c:2686 #, c-format -msgid " Set is_stmt to %d\n" +msgid " Set is_stmt to %s\n" msgstr "" -#: dwarf.c:2563 +#: dwarf.c:2691 #, c-format msgid " Set basic block\n" msgstr "" -#: dwarf.c:2573 +#: dwarf.c:2701 #, c-format -msgid " Advance PC by constant %lu to 0x%lx\n" +msgid " Advance PC by constant %s to 0x%s\n" msgstr "" -#: dwarf.c:2585 +#: dwarf.c:2714 #, c-format -msgid " Advance PC by constant %lu to 0x%lx[%d]\n" +msgid " Advance PC by constant %s to 0x%s[%d]\n" msgstr "" -#: dwarf.c:2596 +#: dwarf.c:2726 #, c-format -msgid " Advance PC by fixed size amount %lu to 0x%lx\n" +msgid " Advance PC by fixed size amount %s to 0x%s\n" msgstr "" -#: dwarf.c:2601 +#: dwarf.c:2732 #, c-format msgid " Set prologue_end to true\n" msgstr "" -#: dwarf.c:2605 +#: dwarf.c:2736 #, c-format msgid " Set epilogue_begin to true\n" msgstr "" -#: dwarf.c:2611 dwarf.c:3027 +#: dwarf.c:2742 #, c-format -msgid " Set ISA to %lu\n" +msgid " Set ISA to %s\n" msgstr "" -#: dwarf.c:2615 dwarf.c:3031 +#: dwarf.c:2746 dwarf.c:3160 #, c-format msgid " Unknown opcode %d with operands: " msgstr "" -#: dwarf.c:2648 +#: dwarf.c:2780 #, c-format msgid "" "Decoded dump of debug contents of section %s:\n" "\n" msgstr "" -#: dwarf.c:2689 +#: dwarf.c:2821 msgid "The line info appears to be corrupt - the section is too small\n" msgstr "" -#: dwarf.c:2821 +#: dwarf.c:2953 #, c-format msgid "CU: %s:\n" msgstr "" -#: dwarf.c:2822 dwarf.c:2835 +#: dwarf.c:2954 dwarf.c:2964 #, c-format msgid "File name Line number Starting address\n" msgstr "" -#: dwarf.c:2828 +#: dwarf.c:2959 #, c-format msgid "CU: %s/%s:\n" msgstr "" -#: dwarf.c:2833 dwarf.c:2918 -#, c-format -msgid "%s:\n" -msgstr "" - -#. If directory index is 0, that means current directory. -#: dwarf.c:2964 -#, c-format -msgid "" -"\n" -"./%s:[++]\n" -msgstr "" - -#. The directory index starts counting at 1. -#: dwarf.c:2970 -#, c-format -msgid "" -"\n" -"%s/%s:\n" -msgstr "" - -#: dwarf.c:3070 -#, c-format -msgid "%-35s %11d %#18lx\n" -msgstr "" - -#: dwarf.c:3074 -#, c-format -msgid "%-35s %11d %#18lx[%d]\n" -msgstr "" - -#: dwarf.c:3082 +#: dwarf.c:3051 #, c-format -msgid "%s %11d %#18lx\n" +msgid "UNKNOWN: length %d\n" msgstr "" -#: dwarf.c:3086 +#: dwarf.c:3156 #, c-format -msgid "%s %11d %#18lx[%d]\n" +msgid " Set ISA to %lu\n" msgstr "" -#: dwarf.c:3192 dwarf.c:3712 +#: dwarf.c:3322 dwarf.c:3872 #, c-format msgid "" ".debug_info offset of 0x%lx in %s section does not point to a CU header.\n" msgstr "" -#: dwarf.c:3206 +#: dwarf.c:3336 msgid "Only DWARF 2 and 3 pubnames are currently supported\n" msgstr "" -#: dwarf.c:3213 +#: dwarf.c:3343 #, c-format msgid " Length: %ld\n" msgstr "" -#: dwarf.c:3215 +#: dwarf.c:3345 #, c-format msgid " Version: %d\n" msgstr "" -#: dwarf.c:3217 +#: dwarf.c:3347 #, c-format msgid " Offset into .debug_info section: 0x%lx\n" msgstr "" -#: dwarf.c:3219 +#: dwarf.c:3349 #, c-format msgid " Size of area in .debug_info section: %ld\n" msgstr "" -#: dwarf.c:3222 +#: dwarf.c:3352 #, c-format msgid "" "\n" " Offset\tName\n" msgstr "" -#: dwarf.c:3273 +#: dwarf.c:3403 #, c-format msgid " DW_MACINFO_start_file - lineno: %d filenum: %d\n" msgstr "" -#: dwarf.c:3279 +#: dwarf.c:3409 #, c-format msgid " DW_MACINFO_end_file\n" msgstr "" -#: dwarf.c:3287 +#: dwarf.c:3417 #, c-format msgid " DW_MACINFO_define - lineno : %d macro : %s\n" msgstr "" -#: dwarf.c:3296 +#: dwarf.c:3426 #, c-format msgid " DW_MACINFO_undef - lineno : %d macro : %s\n" msgstr "" -#: dwarf.c:3308 +#: dwarf.c:3438 #, c-format msgid " DW_MACINFO_vendor_ext - constant : %d string : %s\n" msgstr "" -#: dwarf.c:3337 +#: dwarf.c:3467 #, c-format msgid " Number TAG\n" msgstr "" -#: dwarf.c:3343 -#, c-format -msgid " %ld %s [%s]\n" -msgstr "" - -#: dwarf.c:3346 +#: dwarf.c:3476 msgid "has children" msgstr "" -#: dwarf.c:3346 +#: dwarf.c:3476 msgid "no children" msgstr "" -#: dwarf.c:3349 -#, c-format -msgid " %-18s %s\n" -msgstr "" - -#: dwarf.c:3382 dwarf.c:3594 dwarf.c:3819 +#: dwarf.c:3527 dwarf.c:3754 dwarf.c:3981 #, c-format msgid "" "\n" "The %s section is empty.\n" msgstr "" -#: dwarf.c:3388 dwarf.c:3825 +#: dwarf.c:3533 dwarf.c:3987 #, c-format msgid "" "Unable to load/parse the .debug_info section, so cannot interpret the %s " "section.\n" msgstr "" -#. FIXME: Should we handle this case? -#: dwarf.c:3432 -msgid "Location lists in .debug_info section aren't in ascending order!\n" -msgstr "" - -#: dwarf.c:3435 +#: dwarf.c:3577 msgid "No location lists in .debug_info section!\n" msgstr "" -#: dwarf.c:3440 +#: dwarf.c:3582 #, c-format -msgid "Location lists in %s section start at 0x%lx\n" +msgid "Location lists in %s section start at 0x%s\n" msgstr "" -#: dwarf.c:3444 +#: dwarf.c:3589 #, c-format msgid " Offset Begin End Expression\n" msgstr "" -#: dwarf.c:3479 +#: dwarf.c:3638 #, c-format msgid "There is a hole [0x%lx - 0x%lx] in .debug_loc section.\n" msgstr "" -#: dwarf.c:3483 +#: dwarf.c:3642 #, c-format msgid "There is an overlap [0x%lx - 0x%lx] in .debug_loc section.\n" msgstr "" -#: dwarf.c:3491 +#: dwarf.c:3650 #, c-format msgid "Offset 0x%lx is bigger than .debug_loc section size.\n" msgstr "" -#: dwarf.c:3500 dwarf.c:3535 dwarf.c:3545 +#: dwarf.c:3659 dwarf.c:3694 dwarf.c:3704 #, c-format msgid "Location list starting at offset 0x%lx is not terminated.\n" msgstr "" -#: dwarf.c:3519 dwarf.c:3913 +#: dwarf.c:3678 dwarf.c:4075 #, c-format msgid "\n" msgstr "" -#: dwarf.c:3529 +#: dwarf.c:3688 #, c-format msgid "(base address)\n" msgstr "" -#: dwarf.c:3566 +#: dwarf.c:3725 msgid " (start == end)" msgstr "" -#: dwarf.c:3568 +#: dwarf.c:3727 msgid " (start > end)" msgstr "" -#: dwarf.c:3578 +#: dwarf.c:3737 #, c-format msgid "There are %ld unused bytes at the end of section %s\n" msgstr "" -#: dwarf.c:3723 +#: dwarf.c:3883 msgid "Only DWARF 2 and 3 aranges are currently supported.\n" msgstr "" -#: dwarf.c:3727 +#: dwarf.c:3887 #, c-format msgid " Length: %ld\n" msgstr "" -#: dwarf.c:3728 +#: dwarf.c:3889 #, c-format msgid " Version: %d\n" msgstr "" -#: dwarf.c:3729 +#: dwarf.c:3890 #, c-format msgid " Offset into .debug_info: 0x%lx\n" msgstr "" -#: dwarf.c:3730 +#: dwarf.c:3892 #, c-format msgid " Pointer Size: %d\n" msgstr "" -#: dwarf.c:3731 +#: dwarf.c:3893 #, c-format msgid " Segment Size: %d\n" msgstr "" -#: dwarf.c:3740 +#: dwarf.c:3902 msgid "Pointer size + Segment size is not a power of two.\n" msgstr "" -#: dwarf.c:3745 +#: dwarf.c:3907 #, c-format msgid "" "\n" " Address Length\n" msgstr "" -#: dwarf.c:3747 +#: dwarf.c:3909 #, c-format msgid "" "\n" " Address Length\n" msgstr "" -#: dwarf.c:3835 +#: dwarf.c:3997 msgid "No range lists in .debug_info section!\n" msgstr "" -#: dwarf.c:3859 +#: dwarf.c:4021 #, c-format msgid "Range lists in %s section start at 0x%lx\n" msgstr "" -#: dwarf.c:3863 +#: dwarf.c:4025 #, c-format msgid " Offset Begin End\n" msgstr "" -#: dwarf.c:3884 +#: dwarf.c:4046 #, c-format msgid "There is a hole [0x%lx - 0x%lx] in %s section.\n" msgstr "" -#: dwarf.c:3888 +#: dwarf.c:4050 #, c-format msgid "There is an overlap [0x%lx - 0x%lx] in %s section.\n" msgstr "" -#: dwarf.c:3931 +#: dwarf.c:4093 msgid "(start == end)" msgstr "" -#: dwarf.c:3933 +#: dwarf.c:4095 msgid "(start > end)" msgstr "" -#: dwarf.c:4185 +#: dwarf.c:4347 msgid "bad register: " msgstr "" -#: dwarf.c:4188 +#. The documentation for the format of this file is in gdb/dwarf2read.c. +#: dwarf.c:4350 dwarf.c:5159 #, c-format msgid "Contents of the %s section:\n" msgstr "" -#: dwarf.c:4962 +#: dwarf.c:5120 #, c-format msgid " DW_CFA_??? (User defined call frame op: %#x)\n" msgstr "" -#: dwarf.c:4964 +#: dwarf.c:5122 #, c-format msgid "unsupported or unknown Dwarf Call Frame Instruction number: %#x\n" msgstr "" -#: dwarf.c:4989 +#: dwarf.c:5163 #, c-format -msgid "Displaying the debug contents of section %s is not yet supported.\n" +msgid "Truncated header in the %s section.\n" msgstr "" -#: dwarf.c:5031 elfedit.c:74 +#: dwarf.c:5168 #, c-format -msgid "%s: Error: " +msgid "Version %ld\n" +msgstr "" + +#: dwarf.c:5175 +msgid "The address table data in version 3 may be wrong.\n" +msgstr "" + +#: dwarf.c:5178 +msgid "Version 4 does not support case insensitive lookups.\n" msgstr "" -#: dwarf.c:5042 +#: dwarf.c:5183 #, c-format -msgid "%s: Warning: " +msgid "Unsupported version %lu.\n" msgstr "" -#: dwarf.c:5145 dwarf.c:5215 +#: dwarf.c:5199 #, c-format -msgid "Unrecognized debug option '%s'\n" +msgid "Corrupt header in the %s section.\n" msgstr "" -#: elfedit.c:243 +#: dwarf.c:5214 #, c-format -msgid "%s: Not an ELF file - wrong magic bytes at the start\n" +msgid "" +"\n" +"CU table:\n" msgstr "" -#: elfedit.c:251 +#: dwarf.c:5220 #, c-format -msgid "%s: Unsupported EI_VERSION: %d is not %d\n" +msgid "[%3u] 0x%lx - 0x%lx\n" msgstr "" -#: elfedit.c:267 +#: dwarf.c:5225 #, c-format -msgid "%s: Unmatched EI_CLASS: %d is not %d\n" +msgid "" +"\n" +"TU table:\n" msgstr "" -#: elfedit.c:278 +#: dwarf.c:5232 #, c-format -msgid "%s: Unmatched e_machine: %d is not %d\n" +msgid "[%3u] 0x%lx 0x%lx " msgstr "" -#: elfedit.c:289 +#: dwarf.c:5239 #, c-format -msgid "%s: Unmatched e_type: %d is not %d\n" +msgid "" +"\n" +"Address table:\n" msgstr "" -#: elfedit.c:300 +#: dwarf.c:5248 #, c-format -msgid "%s: Unmatched EI_OSABI: %d is not %d\n" +msgid "%lu\n" msgstr "" -#: elfedit.c:333 +#: dwarf.c:5251 #, c-format -msgid "%s: Failed to update ELF header: %s\n" +msgid "" +"\n" +"Symbol table:\n" msgstr "" -#: elfedit.c:366 +#: dwarf.c:5285 #, c-format -msgid "Unsupported EI_CLASS: %d\n" +msgid "Displaying the debug contents of section %s is not yet supported.\n" msgstr "" -#: elfedit.c:399 -msgid "" -"This executable has been built without support for a\n" -"64 bit data type and so it cannot process 64 bit ELF files.\n" +#: dwarf.c:5421 dwarf.c:5491 +#, c-format +msgid "Unrecognized debug option '%s'\n" msgstr "" -#: elfedit.c:440 +#: elfcomm.c:39 #, c-format -msgid "%s: Failed to read ELF header\n" +msgid "%s: Error: " msgstr "" -#: elfedit.c:447 +#: elfcomm.c:50 #, c-format -msgid "%s: Failed to seek to ELF header\n" +msgid "%s: Warning: " +msgstr "" + +#: elfcomm.c:82 elfcomm.c:117 elfcomm.c:167 elfcomm.c:216 +#, c-format +msgid "Unhandled data length: %d\n" msgstr "" -#: elfedit.c:477 elfedit.c:491 elfedit.c:776 readelf.c:3674 readelf.c:3978 -#: readelf.c:4021 readelf.c:4093 readelf.c:4171 readelf.c:4936 readelf.c:4960 -#: readelf.c:7057 readelf.c:7103 readelf.c:7304 readelf.c:8494 readelf.c:8508 -#: readelf.c:9033 readelf.c:9049 readelf.c:9092 readelf.c:9117 readelf.c:11385 -#: readelf.c:11577 readelf.c:12138 readelf.c:12515 readelf.c:12529 -#: readelf.c:12891 +#: elfcomm.c:263 elfcomm.c:277 elfcomm.c:645 readelf.c:3643 readelf.c:3951 +#: readelf.c:3994 readelf.c:4066 readelf.c:4144 readelf.c:4915 readelf.c:4939 +#: readelf.c:7340 readelf.c:7386 readelf.c:7587 readelf.c:8783 readelf.c:8797 +#: readelf.c:9322 readelf.c:9338 readelf.c:9381 readelf.c:9406 readelf.c:11674 +#: readelf.c:11866 readelf.c:12685 msgid "Out of memory\n" msgstr "" -#: elfedit.c:543 readelf.c:12581 +#: elfcomm.c:312 #, c-format msgid "%s: failed to seek to first archive header\n" msgstr "" -#: elfedit.c:553 elfedit.c:741 elfedit.c:845 readelf.c:12590 readelf.c:12858 -#: readelf.c:13026 +#: elfcomm.c:321 elfcomm.c:611 elfedit.c:340 readelf.c:13169 #, c-format msgid "%s: failed to read archive header\n" msgstr "" -#: elfedit.c:568 readelf.c:12691 +#: elfcomm.c:347 #, c-format -msgid "%s: failed to skip archive symbol table\n" +msgid "%s: the archive index is empty\n" msgstr "" -#: elfedit.c:579 readelf.c:12702 +#: elfcomm.c:355 elfcomm.c:381 #, c-format -msgid "%s: failed to read archive header following archive index\n" +msgid "%s: failed to read archive index\n" msgstr "" -#: elfedit.c:594 readelf.c:12718 -msgid "Out of memory reading long symbol names in archive\n" +#: elfcomm.c:365 +#, c-format +msgid "" +"%s: the archive index is supposed to have %ld entries, but the size in the " +"header is too small\n" msgstr "" -#: elfedit.c:602 readelf.c:12726 -#, c-format -msgid "%s: failed to read long symbol name string table\n" +#: elfcomm.c:373 +msgid "Out of memory whilst trying to read archive symbol index\n" msgstr "" -#: elfedit.c:734 readelf.c:12852 -#, c-format -msgid "%s: failed to seek to next file name\n" +#: elfcomm.c:392 +msgid "Out of memory whilst trying to convert the archive symbol index\n" msgstr "" -#: elfedit.c:747 elfedit.c:852 readelf.c:12863 readelf.c:13032 +#: elfcomm.c:405 #, c-format -msgid "%s: did not find a valid archive header\n" +msgid "%s: the archive has an index but no symbols\n" msgstr "" -#: elfedit.c:836 readelf.c:13018 -#, c-format -msgid "%s: failed to seek to next archive header\n" +#: elfcomm.c:413 +msgid "Out of memory whilst trying to read archive index symbol table\n" msgstr "" -#: elfedit.c:867 elfedit.c:876 readelf.c:13046 readelf.c:13055 +#: elfcomm.c:419 #, c-format -msgid "%s: bad archive file name\n" +msgid "%s: failed to read archive index symbol table\n" msgstr "" -#: elfedit.c:896 elfedit.c:988 +#: elfcomm.c:428 #, c-format -msgid "Input file '%s' is not readable\n" +msgid "%s: failed to skip archive symbol table\n" msgstr "" -#: elfedit.c:920 +#: elfcomm.c:440 #, c-format -msgid "%s: failed to seek to archive member\n" +msgid "%s: failed to read archive header following archive index\n" msgstr "" -#: elfedit.c:959 readelf.c:13134 +#: elfcomm.c:446 #, c-format -msgid "'%s': No such file\n" +msgid "%s has no archive index\n" msgstr "" -#: elfedit.c:961 readelf.c:13136 -#, c-format -msgid "Could not locate '%s'. System error message: %s\n" +#: elfcomm.c:457 +msgid "Out of memory reading long symbol names in archive\n" msgstr "" -#: elfedit.c:968 readelf.c:13143 +#: elfcomm.c:465 #, c-format -msgid "'%s' is not an ordinary file\n" +msgid "%s: failed to read long symbol name string table\n" msgstr "" -#: elfedit.c:994 readelf.c:13156 +#: elfcomm.c:605 #, c-format -msgid "%s: Failed to read file's magic number\n" +msgid "%s: failed to seek to next file name\n" msgstr "" -#: elfedit.c:1052 +#: elfcomm.c:616 elfedit.c:347 readelf.c:13175 #, c-format -msgid "Unknown OSABI: %s\n" +msgid "%s: did not find a valid archive header\n" msgstr "" -#: elfedit.c:1071 +#: elfedit.c:73 #, c-format -msgid "Unknown machine type: %s\n" +msgid "%s: Not an ELF file - wrong magic bytes at the start\n" msgstr "" -#: elfedit.c:1089 +#: elfedit.c:81 #, c-format -msgid "Unknown machine type: %d\n" +msgid "%s: Unsupported EI_VERSION: %d is not %d\n" +msgstr "" + +#: elfedit.c:97 +#, c-format +msgid "%s: Unmatched EI_CLASS: %d is not %d\n" +msgstr "" + +#: elfedit.c:108 +#, c-format +msgid "%s: Unmatched e_machine: %d is not %d\n" +msgstr "" + +#: elfedit.c:119 +#, c-format +msgid "%s: Unmatched e_type: %d is not %d\n" +msgstr "" + +#: elfedit.c:130 +#, c-format +msgid "%s: Unmatched EI_OSABI: %d is not %d\n" +msgstr "" + +#: elfedit.c:163 +#, c-format +msgid "%s: Failed to update ELF header: %s\n" +msgstr "" + +#: elfedit.c:196 +#, c-format +msgid "Unsupported EI_CLASS: %d\n" +msgstr "" + +#: elfedit.c:229 +msgid "" +"This executable has been built without support for a\n" +"64 bit data type and so it cannot process 64 bit ELF files.\n" +msgstr "" + +#: elfedit.c:270 +#, c-format +msgid "%s: Failed to read ELF header\n" +msgstr "" + +#: elfedit.c:277 +#, c-format +msgid "%s: Failed to seek to ELF header\n" +msgstr "" + +#: elfedit.c:331 readelf.c:13161 +#, c-format +msgid "%s: failed to seek to next archive header\n" +msgstr "" + +#: elfedit.c:362 elfedit.c:371 readelf.c:13189 readelf.c:13198 +#, c-format +msgid "%s: bad archive file name\n" +msgstr "" + +#: elfedit.c:391 elfedit.c:483 +#, c-format +msgid "Input file '%s' is not readable\n" +msgstr "" + +#: elfedit.c:415 +#, c-format +msgid "%s: failed to seek to archive member\n" +msgstr "" + +#: elfedit.c:454 readelf.c:13284 +#, c-format +msgid "'%s': No such file\n" +msgstr "" + +#: elfedit.c:456 readelf.c:13286 +#, c-format +msgid "Could not locate '%s'. System error message: %s\n" +msgstr "" + +#: elfedit.c:463 readelf.c:13293 +#, c-format +msgid "'%s' is not an ordinary file\n" +msgstr "" + +#: elfedit.c:489 readelf.c:13306 +#, c-format +msgid "%s: Failed to read file's magic number\n" +msgstr "" + +#: elfedit.c:547 +#, c-format +msgid "Unknown OSABI: %s\n" +msgstr "" + +#: elfedit.c:566 +#, c-format +msgid "Unknown machine type: %s\n" +msgstr "" + +#: elfedit.c:584 +#, c-format +msgid "Unknown machine type: %d\n" msgstr "" -#: elfedit.c:1108 +#: elfedit.c:603 #, c-format msgid "Unknown type: %s\n" msgstr "" -#: elfedit.c:1139 +#: elfedit.c:634 #, c-format msgid "Usage: %s elffile(s)\n" msgstr "" -#: elfedit.c:1141 +#: elfedit.c:636 #, c-format msgid " Update the ELF header of ELF files\n" msgstr "" -#: elfedit.c:1142 objcopy.c:475 objcopy.c:585 +#: elfedit.c:637 objcopy.c:475 objcopy.c:585 #, c-format msgid " The options are:\n" msgstr "" -#: elfedit.c:1143 +#: elfedit.c:638 #, c-format msgid "" " --input-mach Set input machine type to \n" @@ -2401,31 +2444,26 @@ msgid "" " -v --version Display the version number of %s\n" msgstr "" -#: emul_aix.c:43 +#: emul_aix.c:45 #, c-format msgid " [-g] - 32 bit small archive\n" msgstr "" -#: emul_aix.c:44 +#: emul_aix.c:46 #, c-format msgid " [-X32] - ignores 64 bit objects\n" msgstr "" -#: emul_aix.c:45 +#: emul_aix.c:47 #, c-format msgid " [-X64] - ignores 32 bit objects\n" msgstr "" -#: emul_aix.c:46 +#: emul_aix.c:48 #, c-format msgid " [-X32_64] - accepts 32 and 64 bit objects\n" msgstr "" -#: emul_aix.c:99 emul_aix.c:109 emul_aix.c:119 emul_aix.c:129 -#, c-format -msgid "target `%s' ignored." -msgstr "" - #: ieee.c:311 msgid "unexpected end of debugging information" msgstr "" @@ -2647,17 +2685,17 @@ msgstr "" msgid "IEEE string length overflow: %u\n" msgstr "" -#: ieee.c:5210 +#: ieee.c:5213 #, c-format msgid "IEEE unsupported integer type size %u\n" msgstr "" -#: ieee.c:5244 +#: ieee.c:5247 #, c-format msgid "IEEE unsupported float type size %u\n" msgstr "" -#: ieee.c:5278 +#: ieee.c:5281 #, c-format msgid "IEEE unsupported complex type size %u\n" msgstr "" @@ -2666,120 +2704,120 @@ msgstr "" msgid "Duplicate symbol entered into keyword list." msgstr "" -#: nlmconv.c:273 srconv.c:1823 +#: nlmconv.c:274 srconv.c:1824 msgid "input and output files must be different" msgstr "" -#: nlmconv.c:320 +#: nlmconv.c:321 msgid "input file named both on command line and with INPUT" msgstr "" -#: nlmconv.c:329 +#: nlmconv.c:330 msgid "no input file" msgstr "" -#: nlmconv.c:359 +#: nlmconv.c:360 msgid "no name for output file" msgstr "" -#: nlmconv.c:373 +#: nlmconv.c:374 msgid "warning: input and output formats are not compatible" msgstr "" -#: nlmconv.c:403 +#: nlmconv.c:404 msgid "make .bss section" msgstr "" -#: nlmconv.c:413 +#: nlmconv.c:414 msgid "make .nlmsections section" msgstr "" -#: nlmconv.c:441 +#: nlmconv.c:442 msgid "set .bss vma" msgstr "" -#: nlmconv.c:448 +#: nlmconv.c:449 msgid "set .data size" msgstr "" -#: nlmconv.c:628 +#: nlmconv.c:629 #, c-format msgid "warning: symbol %s imported but not in import list" msgstr "" -#: nlmconv.c:648 +#: nlmconv.c:649 msgid "set start address" msgstr "" -#: nlmconv.c:697 +#: nlmconv.c:698 #, c-format msgid "warning: START procedure %s not defined" msgstr "" -#: nlmconv.c:699 +#: nlmconv.c:700 #, c-format msgid "warning: EXIT procedure %s not defined" msgstr "" -#: nlmconv.c:701 +#: nlmconv.c:702 #, c-format msgid "warning: CHECK procedure %s not defined" msgstr "" -#: nlmconv.c:721 nlmconv.c:907 +#: nlmconv.c:722 nlmconv.c:908 msgid "custom section" msgstr "" -#: nlmconv.c:741 nlmconv.c:936 +#: nlmconv.c:742 nlmconv.c:937 msgid "help section" msgstr "" -#: nlmconv.c:763 nlmconv.c:954 +#: nlmconv.c:764 nlmconv.c:955 msgid "message section" msgstr "" -#: nlmconv.c:778 nlmconv.c:987 +#: nlmconv.c:779 nlmconv.c:988 msgid "module section" msgstr "" -#: nlmconv.c:797 nlmconv.c:1003 +#: nlmconv.c:798 nlmconv.c:1004 msgid "rpc section" msgstr "" #. There is no place to record this information. -#: nlmconv.c:833 +#: nlmconv.c:834 #, c-format msgid "%s: warning: shared libraries can not have uninitialized data" msgstr "" -#: nlmconv.c:854 nlmconv.c:1022 +#: nlmconv.c:855 nlmconv.c:1023 msgid "shared section" msgstr "" -#: nlmconv.c:862 +#: nlmconv.c:863 msgid "warning: No version number given" msgstr "" -#: nlmconv.c:902 nlmconv.c:931 nlmconv.c:949 nlmconv.c:998 nlmconv.c:1017 +#: nlmconv.c:903 nlmconv.c:932 nlmconv.c:950 nlmconv.c:999 nlmconv.c:1018 #, c-format msgid "%s: read: %s" msgstr "" -#: nlmconv.c:924 +#: nlmconv.c:925 msgid "warning: FULLMAP is not supported; try ld -M" msgstr "" -#: nlmconv.c:1100 +#: nlmconv.c:1101 #, c-format msgid "Usage: %s [option(s)] [in-file [out-file]]\n" msgstr "" -#: nlmconv.c:1101 +#: nlmconv.c:1102 #, c-format msgid " Convert an object file into a NetWare Loadable Module\n" msgstr "" -#: nlmconv.c:1102 +#: nlmconv.c:1103 #, c-format msgid "" " The options are:\n" @@ -2793,64 +2831,64 @@ msgid "" " -v --version Display the program's version\n" msgstr "" -#: nlmconv.c:1143 +#: nlmconv.c:1144 #, c-format msgid "support not compiled in for %s" msgstr "" -#: nlmconv.c:1180 +#: nlmconv.c:1181 msgid "make section" msgstr "" -#: nlmconv.c:1194 +#: nlmconv.c:1195 msgid "set section size" msgstr "" -#: nlmconv.c:1200 +#: nlmconv.c:1201 msgid "set section alignment" msgstr "" -#: nlmconv.c:1204 +#: nlmconv.c:1205 msgid "set section flags" msgstr "" -#: nlmconv.c:1215 +#: nlmconv.c:1216 msgid "set .nlmsections size" msgstr "" -#: nlmconv.c:1296 nlmconv.c:1304 nlmconv.c:1313 nlmconv.c:1318 +#: nlmconv.c:1297 nlmconv.c:1305 nlmconv.c:1314 nlmconv.c:1319 msgid "set .nlmsection contents" msgstr "" -#: nlmconv.c:1795 +#: nlmconv.c:1796 msgid "stub section sizes" msgstr "" -#: nlmconv.c:1842 +#: nlmconv.c:1843 msgid "writing stub" msgstr "" -#: nlmconv.c:1926 +#: nlmconv.c:1927 #, c-format msgid "unresolved PC relative reloc against %s" msgstr "" -#: nlmconv.c:1990 +#: nlmconv.c:1991 #, c-format msgid "overflow when adjusting relocation against %s" msgstr "" -#: nlmconv.c:2117 +#: nlmconv.c:2118 #, c-format msgid "%s: execution of %s failed: " msgstr "" -#: nlmconv.c:2132 +#: nlmconv.c:2133 #, c-format msgid "Execution of %s failed" msgstr "" -#: nm.c:225 size.c:78 strings.c:646 +#: nm.c:225 size.c:78 strings.c:650 #, c-format msgid "Usage: %s [option(s)] [file(s)]\n" msgstr "" @@ -2924,17 +2962,17 @@ msgstr "" msgid "%s: invalid output format" msgstr "" -#: nm.c:346 readelf.c:8259 readelf.c:8304 +#: nm.c:346 readelf.c:8546 readelf.c:8591 #, c-format msgid ": %d" msgstr "" -#: nm.c:348 readelf.c:8268 readelf.c:8322 +#: nm.c:348 readelf.c:8555 readelf.c:8609 #, c-format msgid ": %d" msgstr "" -#: nm.c:350 readelf.c:8271 readelf.c:8325 +#: nm.c:350 readelf.c:8558 readelf.c:8612 #, c-format msgid ": %d" msgstr "" @@ -2946,7 +2984,7 @@ msgid "" "Archive index:\n" msgstr "" -#: nm.c:1251 +#: nm.c:1254 #, c-format msgid "" "\n" @@ -2955,7 +2993,7 @@ msgid "" "\n" msgstr "" -#: nm.c:1253 +#: nm.c:1256 #, c-format msgid "" "\n" @@ -2964,7 +3002,7 @@ msgid "" "\n" msgstr "" -#: nm.c:1255 nm.c:1306 +#: nm.c:1258 nm.c:1309 #, c-format msgid "" "Name Value Class Type Size Line " @@ -2972,7 +3010,7 @@ msgid "" "\n" msgstr "" -#: nm.c:1258 nm.c:1309 +#: nm.c:1261 nm.c:1312 #, c-format msgid "" "Name Value Class Type " @@ -2980,7 +3018,7 @@ msgid "" "\n" msgstr "" -#: nm.c:1302 +#: nm.c:1305 #, c-format msgid "" "\n" @@ -2989,7 +3027,7 @@ msgid "" "\n" msgstr "" -#: nm.c:1304 +#: nm.c:1307 #, c-format msgid "" "\n" @@ -2998,29 +3036,29 @@ msgid "" "\n" msgstr "" -#: nm.c:1396 +#: nm.c:1399 #, c-format msgid "Print width has not been initialized (%d)" msgstr "" -#: nm.c:1624 +#: nm.c:1627 msgid "Only -X 32_64 is supported" msgstr "" -#: nm.c:1653 +#: nm.c:1656 msgid "Using the --size-sort and --undefined-only options together" msgstr "" -#: nm.c:1654 +#: nm.c:1657 msgid "will produce no output, since undefined symbols have no size." msgstr "" -#: nm.c:1682 +#: nm.c:1685 #, c-format msgid "data size %ld" msgstr "" -#: objcopy.c:473 srconv.c:1731 +#: objcopy.c:473 srconv.c:1732 #, c-format msgid "Usage: %s [option(s)] in-file [out-file]\n" msgstr "" @@ -3223,7 +3261,7 @@ msgstr "" msgid "cannot open '%s': %s" msgstr "" -#: objcopy.c:764 objcopy.c:3389 +#: objcopy.c:764 objcopy.c:3392 #, c-format msgid "%s: fread failed" msgstr "" @@ -3278,297 +3316,298 @@ msgstr "" msgid "copy from `%s' [unknown] to `%s' [unknown]\n" msgstr "" -#: objcopy.c:1427 +#: objcopy.c:1429 msgid "Unable to change endianness of input file(s)" msgstr "" -#: objcopy.c:1436 +#: objcopy.c:1438 #, c-format msgid "copy from `%s' [%s] to `%s' [%s]\n" msgstr "" -#: objcopy.c:1485 +#: objcopy.c:1487 #, c-format msgid "Input file `%s' ignores binary architecture parameter." msgstr "" -#: objcopy.c:1493 +#: objcopy.c:1495 #, c-format msgid "Unable to recognise the format of the input file `%s'" msgstr "" -#: objcopy.c:1496 +#: objcopy.c:1498 #, c-format msgid "Output file cannot represent architecture `%s'" msgstr "" -#: objcopy.c:1559 +#: objcopy.c:1561 #, c-format msgid "warning: file alignment (0x%s) > section alignment (0x%s)" msgstr "" -#: objcopy.c:1618 +#: objcopy.c:1620 #, c-format msgid "can't add section '%s'" msgstr "" -#: objcopy.c:1632 +#: objcopy.c:1634 #, c-format msgid "can't create section `%s'" msgstr "" -#: objcopy.c:1678 +#: objcopy.c:1680 #, c-format msgid "cannot create debug link section `%s'" msgstr "" -#: objcopy.c:1771 +#: objcopy.c:1773 msgid "Can't fill gap after section" msgstr "" -#: objcopy.c:1795 +#: objcopy.c:1797 msgid "can't add padding" msgstr "" -#: objcopy.c:1886 +#: objcopy.c:1888 #, c-format msgid "cannot fill debug link section `%s'" msgstr "" -#: objcopy.c:1949 +#: objcopy.c:1951 msgid "error copying private BFD data" msgstr "" -#: objcopy.c:1960 +#: objcopy.c:1962 #, c-format msgid "this target does not support %lu alternative machine codes" msgstr "" -#: objcopy.c:1964 +#: objcopy.c:1966 msgid "treating that number as an absolute e_machine value instead" msgstr "" -#: objcopy.c:1968 +#: objcopy.c:1970 msgid "ignoring the alternative value" msgstr "" -#: objcopy.c:2000 objcopy.c:2035 +#: objcopy.c:2002 objcopy.c:2038 #, c-format msgid "cannot create tempdir for archive copying (error: %s)" msgstr "" -#: objcopy.c:2096 +#: objcopy.c:2068 msgid "Unable to recognise the format of file" msgstr "" -#: objcopy.c:2194 +#: objcopy.c:2195 #, c-format msgid "error: the input file '%s' is empty" msgstr "" -#: objcopy.c:2338 +#: objcopy.c:2339 #, c-format msgid "Multiple renames of section %s" msgstr "" -#: objcopy.c:2389 +#: objcopy.c:2390 msgid "error in private header data" msgstr "" -#: objcopy.c:2467 +#: objcopy.c:2468 msgid "failed to create output section" msgstr "" -#: objcopy.c:2481 +#: objcopy.c:2482 msgid "failed to set size" msgstr "" -#: objcopy.c:2495 +#: objcopy.c:2496 msgid "failed to set vma" msgstr "" -#: objcopy.c:2520 +#: objcopy.c:2521 msgid "failed to set alignment" msgstr "" -#: objcopy.c:2554 +#: objcopy.c:2555 msgid "failed to copy private data" msgstr "" -#: objcopy.c:2636 +#: objcopy.c:2637 msgid "relocation count is negative" msgstr "" #. User must pad the section up in order to do this. -#: objcopy.c:2697 +#: objcopy.c:2698 #, c-format msgid "" "cannot reverse bytes: length of section %s must be evenly divisible by %d" msgstr "" -#: objcopy.c:2883 +#: objcopy.c:2884 msgid "can't create debugging section" msgstr "" -#: objcopy.c:2896 +#: objcopy.c:2897 msgid "can't set debugging section contents" msgstr "" -#: objcopy.c:2904 +#: objcopy.c:2905 #, c-format msgid "don't know how to write debugging information for %s" msgstr "" -#: objcopy.c:3046 +#: objcopy.c:3048 msgid "could not create temporary file to hold stripped copy" msgstr "" -#: objcopy.c:3118 +#: objcopy.c:3120 #, c-format msgid "%s: bad version in PE subsystem" msgstr "" -#: objcopy.c:3148 +#: objcopy.c:3150 #, c-format msgid "unknown PE subsystem: %s" msgstr "" -#: objcopy.c:3209 +#: objcopy.c:3212 msgid "byte number must be non-negative" msgstr "" -#: objcopy.c:3215 +#: objcopy.c:3218 #, c-format msgid "architecture %s unknown" msgstr "" -#: objcopy.c:3223 +#: objcopy.c:3226 msgid "interleave must be positive" msgstr "" -#: objcopy.c:3232 +#: objcopy.c:3235 msgid "interleave width must be positive" msgstr "" -#: objcopy.c:3252 objcopy.c:3260 +#: objcopy.c:3255 objcopy.c:3263 #, c-format msgid "%s both copied and removed" msgstr "" -#: objcopy.c:3359 objcopy.c:3439 objcopy.c:3547 objcopy.c:3578 objcopy.c:3602 -#: objcopy.c:3606 objcopy.c:3626 +#: objcopy.c:3362 objcopy.c:3442 objcopy.c:3550 objcopy.c:3581 objcopy.c:3605 +#: objcopy.c:3609 objcopy.c:3629 #, c-format msgid "bad format for %s" msgstr "" -#: objcopy.c:3371 +#: objcopy.c:3374 #, c-format msgid "cannot open: %s: %s" msgstr "" -#: objcopy.c:3516 +#: objcopy.c:3519 #, c-format msgid "Warning: truncating gap-fill from 0x%s to 0x%x" msgstr "" -#: objcopy.c:3677 +#: objcopy.c:3680 #, c-format msgid "unknown long section names option '%s'" msgstr "" -#: objcopy.c:3695 +#: objcopy.c:3698 msgid "unable to parse alternative machine code" msgstr "" -#: objcopy.c:3740 +#: objcopy.c:3743 msgid "number of bytes to reverse must be positive and even" msgstr "" -#: objcopy.c:3743 +#: objcopy.c:3746 #, c-format msgid "Warning: ignoring previous --reverse-bytes value of %d" msgstr "" -#: objcopy.c:3758 +#: objcopy.c:3761 #, c-format msgid "%s: invalid reserve value for --heap" msgstr "" -#: objcopy.c:3764 +#: objcopy.c:3767 #, c-format msgid "%s: invalid commit value for --heap" msgstr "" -#: objcopy.c:3789 +#: objcopy.c:3792 #, c-format msgid "%s: invalid reserve value for --stack" msgstr "" -#: objcopy.c:3795 +#: objcopy.c:3798 #, c-format msgid "%s: invalid commit value for --stack" msgstr "" -#: objcopy.c:3824 +#: objcopy.c:3827 msgid "interleave start byte must be set with --byte" msgstr "" -#: objcopy.c:3827 +#: objcopy.c:3830 msgid "byte number must be less than interleave" msgstr "" -#: objcopy.c:3830 +#: objcopy.c:3833 msgid "interleave width must be less than or equal to interleave - byte`" msgstr "" -#: objcopy.c:3857 +#: objcopy.c:3860 #, c-format msgid "unknown input EFI target: %s" msgstr "" -#: objcopy.c:3888 +#: objcopy.c:3891 #, c-format msgid "unknown output EFI target: %s" msgstr "" -#: objcopy.c:3901 +#: objcopy.c:3904 #, c-format msgid "warning: could not locate '%s'. System error message: %s" msgstr "" -#: objcopy.c:3912 +#: objcopy.c:3916 #, c-format msgid "" "warning: could not create temporary file whilst copying '%s', (error: %s)" msgstr "" -#: objcopy.c:3956 objcopy.c:3970 +#: objcopy.c:3944 objcopy.c:3958 #, c-format msgid "%s %s%c0x%s never used" msgstr "" -#: objdump.c:190 +#: objdump.c:201 #, c-format msgid "Usage: %s \n" msgstr "" -#: objdump.c:191 +#: objdump.c:202 #, c-format msgid " Display information from object .\n" msgstr "" -#: objdump.c:192 +#: objdump.c:203 #, c-format msgid " At least one of the following switches must be given:\n" msgstr "" -#: objdump.c:193 +#: objdump.c:204 #, c-format msgid "" " -a, --archive-headers Display archive header information\n" " -f, --file-headers Display the contents of the overall file header\n" " -p, --private-headers Display object format specific file header " "contents\n" +" -P, --private=OPT,OPT... Display object format specific contents\n" " -h, --[section-]headers Display the contents of the section headers\n" " -x, --all-headers Display the contents of all headers\n" " -d, --disassemble Display assembler contents of executable " @@ -3584,7 +3623,7 @@ msgid "" " --dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro," "=frames,\n" " =frames-interp,=str,=loc,=Ranges,=pubtypes,\n" -" =trace_info,=trace_abbrev,=trace_aranges]\n" +" =gdb_index,=trace_info,=trace_abbrev,=trace_aranges]\n" " Display DWARF info in the file\n" " -t, --syms Display the contents of the symbol table(s)\n" " -T, --dynamic-syms Display the contents of the dynamic symbol table\n" @@ -3597,14 +3636,14 @@ msgid "" " -H, --help Display this information\n" msgstr "" -#: objdump.c:222 +#: objdump.c:236 #, c-format msgid "" "\n" " The following switches are optional:\n" msgstr "" -#: objdump.c:223 +#: objdump.c:237 #, c-format msgid "" " -b, --target=BFDNAME Specify the target object format as " @@ -3644,185 +3683,888 @@ msgid "" " --special-syms Include special symbols in symbol dumps\n" " --prefix=PREFIX Add PREFIX to absolute paths for -S\n" " --prefix-strip=LEVEL Strip initial directory names for -S\n" +msgstr "" + +#: objdump.c:263 +#, c-format +msgid "" +" --dwarf-depth=N Do not display DIEs at depth N or greater\n" +" --dwarf-start=N Display DIEs starting with N, at the same " +"depth\n" +" or deeper\n" +"\n" +msgstr "" + +#: objdump.c:275 +#, c-format +msgid "" "\n" +"Options supported for -P/--private switch:\n" msgstr "" -#: objdump.c:396 +#: objdump.c:426 #, c-format msgid "section '%s' mentioned in a -j option, but not found in any input file" msgstr "" -#: objdump.c:500 +#: objdump.c:530 #, c-format msgid "Sections:\n" msgstr "" -#: objdump.c:503 objdump.c:507 +#: objdump.c:533 objdump.c:537 #, c-format msgid "Idx Name Size VMA LMA File off Algn" msgstr "" -#: objdump.c:509 +#: objdump.c:539 #, c-format msgid "" "Idx Name Size VMA LMA File off " "Algn" msgstr "" -#: objdump.c:513 +#: objdump.c:543 +#, c-format +msgid " Flags" +msgstr "" + +#: objdump.c:586 +#, c-format +msgid "%s: not a dynamic object" +msgstr "" + +#: objdump.c:1012 objdump.c:1036 +#, c-format +msgid " (File Offset: 0x%lx)" +msgstr "" + +#: objdump.c:1662 +#, c-format +msgid "disassemble_fn returned length %d" +msgstr "" + +#: objdump.c:1967 +#, c-format +msgid "" +"\n" +"Disassembly of section %s:\n" +msgstr "" + +#: objdump.c:2143 +#, c-format +msgid "can't use supplied machine %s" +msgstr "" + +#: objdump.c:2162 +#, c-format +msgid "can't disassemble for architecture %s\n" +msgstr "" + +#: objdump.c:2242 objdump.c:2265 +#, c-format +msgid "" +"\n" +"Can't get contents for section '%s'.\n" +msgstr "" + +#: objdump.c:2406 +#, c-format +msgid "" +"No %s section present\n" +"\n" +msgstr "" + +#: objdump.c:2415 +#, c-format +msgid "reading %s section of %s failed: %s" +msgstr "" + +#: objdump.c:2459 +#, c-format +msgid "" +"Contents of %s section:\n" +"\n" +msgstr "" + +#: objdump.c:2590 +#, c-format +msgid "architecture: %s, " +msgstr "" + +#: objdump.c:2593 +#, c-format +msgid "flags 0x%08x:\n" +msgstr "" + +#: objdump.c:2607 +#, c-format +msgid "" +"\n" +"start address 0x" +msgstr "" + +#: objdump.c:2633 +msgid "option -P/--private not supported by this file" +msgstr "" + +#: objdump.c:2657 +#, c-format +msgid "target specific dump '%s' not supported" +msgstr "" + +#: objdump.c:2721 +#, c-format +msgid "Contents of section %s:" +msgstr "" + +#: objdump.c:2723 +#, c-format +msgid " (Starting at file offset: 0x%lx)" +msgstr "" + +#: objdump.c:2729 +msgid "Reading section failed" +msgstr "" + +#: objdump.c:2832 +#, c-format +msgid "no symbols\n" +msgstr "" + +#: objdump.c:2839 +#, c-format +msgid "no information for symbol number %ld\n" +msgstr "" + +#: objdump.c:2842 +#, c-format +msgid "could not determine the type of symbol number %ld\n" +msgstr "" + +#: objdump.c:3163 +#, c-format +msgid "" +"\n" +"%s: file format %s\n" +msgstr "" + +#: objdump.c:3223 +#, c-format +msgid "%s: printing debugging information failed" +msgstr "" + +#: objdump.c:3327 +#, c-format +msgid "In archive %s:\n" +msgstr "" + +#: objdump.c:3438 +msgid "error: the start address should be before the end address" +msgstr "" + +#: objdump.c:3443 +msgid "error: the stop address should be after the start address" +msgstr "" + +#: objdump.c:3455 +msgid "error: prefix strip must be non-negative" +msgstr "" + +#: objdump.c:3460 +msgid "error: instruction width must be positive" +msgstr "" + +#: objdump.c:3469 +msgid "unrecognized -E option" +msgstr "" + +#: objdump.c:3480 +#, c-format +msgid "unrecognized --endian type `%s'" +msgstr "" + +#: od-xcoff.c:75 +#, c-format +msgid "" +"For XCOFF files:\n" +" header Display the file header\n" +" aout Display the auxiliary header\n" +" sections Display the section headers\n" +" syms Display the symbols table\n" +" relocs Display the relocation entries\n" +" lineno Display the line number entries\n" +" loader Display loader section\n" +" except Display exception table\n" +" typchk Display type-check section\n" +" traceback Display traceback tags\n" +" toc Display toc symbols\n" +msgstr "" + +#: od-xcoff.c:416 +#, c-format +msgid " nbr sections: %d\n" +msgstr "" + +#: od-xcoff.c:417 +#, c-format +msgid " time and date: 0x%08x - " +msgstr "" + +#: od-xcoff.c:419 +#, c-format +msgid "not set\n" +msgstr "" + +#: od-xcoff.c:426 +#, c-format +msgid " symbols off: 0x%08x\n" +msgstr "" + +#: od-xcoff.c:427 +#, c-format +msgid " nbr symbols: %d\n" +msgstr "" + +#: od-xcoff.c:428 +#, c-format +msgid " opt hdr sz: %d\n" +msgstr "" + +#: od-xcoff.c:429 +#, c-format +msgid " flags: 0x%04x " +msgstr "" + +#: od-xcoff.c:443 +#, c-format +msgid "Auxiliary header:\n" +msgstr "" + +#: od-xcoff.c:446 +#, c-format +msgid " No aux header\n" +msgstr "" + +#: od-xcoff.c:451 +#, c-format +msgid "warning: optionnal header size too large (> %d)\n" +msgstr "" + +#: od-xcoff.c:457 +msgid "cannot read auxhdr" +msgstr "" + +#: od-xcoff.c:462 +#, c-format +msgid " o_mflag (magic): 0x%04x 0%04o\n" +msgstr "" + +#: od-xcoff.c:463 +#, c-format +msgid " o_vstamp: 0x%04x\n" +msgstr "" + +#: od-xcoff.c:465 +#, c-format +msgid " o_tsize: 0x%08x\n" +msgstr "" + +#: od-xcoff.c:467 +#, c-format +msgid " o_dsize: 0x%08x\n" +msgstr "" + +#: od-xcoff.c:469 +#, c-format +msgid " o_entry: 0x%08x\n" +msgstr "" + +#: od-xcoff.c:471 +#, c-format +msgid " o_text_start: 0x%08x\n" +msgstr "" + +#: od-xcoff.c:473 +#, c-format +msgid " o_data_start: 0x%08x\n" +msgstr "" + +#: od-xcoff.c:477 +#, c-format +msgid " o_toc: 0x%08x\n" +msgstr "" + +#: od-xcoff.c:479 +#, c-format +msgid " o_snentry: 0x%04x\n" +msgstr "" + +#: od-xcoff.c:481 +#, c-format +msgid " o_sntext: 0x%04x\n" +msgstr "" + +#: od-xcoff.c:483 +#, c-format +msgid " o_sndata: 0x%04x\n" +msgstr "" + +#: od-xcoff.c:485 +#, c-format +msgid " o_sntoc: 0x%04x\n" +msgstr "" + +#: od-xcoff.c:487 +#, c-format +msgid " o_snloader: 0x%04x\n" +msgstr "" + +#: od-xcoff.c:489 +#, c-format +msgid " o_snbss: 0x%04x\n" +msgstr "" + +#: od-xcoff.c:491 +#, c-format +msgid " o_algntext: %u\n" +msgstr "" + +#: od-xcoff.c:493 +#, c-format +msgid " o_algndata: %u\n" +msgstr "" + +#: od-xcoff.c:495 +#, c-format +msgid " o_modtype: 0x%04x" +msgstr "" + +#: od-xcoff.c:500 +#, c-format +msgid " o_cputype: 0x%04x\n" +msgstr "" + +#: od-xcoff.c:502 +#, c-format +msgid " o_maxstack: 0x%08x\n" +msgstr "" + +#: od-xcoff.c:504 +#, c-format +msgid " o_maxdata: 0x%08x\n" +msgstr "" + +#: od-xcoff.c:507 +#, c-format +msgid " o_debugger: 0x%08x\n" +msgstr "" + +#: od-xcoff.c:521 +#, c-format +msgid "Section headers (at %u+%u=0x%08x to 0x%08x):\n" +msgstr "" + +#: od-xcoff.c:526 +#, c-format +msgid " No section header\n" +msgstr "" + +#: od-xcoff.c:531 od-xcoff.c:542 od-xcoff.c:598 +msgid "cannot read section header" +msgstr "" + +#: od-xcoff.c:534 +#, c-format +msgid "" +" # Name paddr vaddr size scnptr relptr lnnoptr nrel " +"nlnno\n" +msgstr "" + +#: od-xcoff.c:546 +#, c-format +msgid "%2d %-8.8s %08x %08x %08x %08x %08x %08x %-5d %-5d\n" +msgstr "" + +#: od-xcoff.c:557 +#, c-format +msgid " Flags: %08x " +msgstr "" + +#: od-xcoff.c:565 +#, c-format +msgid "overflow - nreloc: %u, nlnno: %u\n" +msgstr "" + +#: od-xcoff.c:586 od-xcoff.c:919 od-xcoff.c:974 +msgid "cannot read section headers" +msgstr "" + +#: od-xcoff.c:650 +msgid "cannot read strings table len" +msgstr "" + +#: od-xcoff.c:664 +msgid "cannot read strings table" +msgstr "" + +#: od-xcoff.c:672 +msgid "cannot read symbol table" +msgstr "" + +#: od-xcoff.c:687 +msgid "cannot read symbol entry" +msgstr "" + +#: od-xcoff.c:722 +msgid "cannot read symbol aux entry" +msgstr "" + +#: od-xcoff.c:744 +#, c-format +msgid "Symbols table (strtable at 0x%08x)" +msgstr "" + +#: od-xcoff.c:749 +#, c-format +msgid "" +":\n" +" No symbols\n" +msgstr "" + +#: od-xcoff.c:755 +#, c-format +msgid " (no strings):\n" +msgstr "" + +#: od-xcoff.c:757 +#, c-format +msgid " (strings size: %08x):\n" +msgstr "" + +#: od-xcoff.c:770 +#, c-format +msgid " # sc value section type aux name/off\n" +msgstr "" + +#: od-xcoff.c:821 +#, c-format +msgid " scnlen: %08x nreloc: %-6u nlinno: %-6u\n" +msgstr "" + +#: od-xcoff.c:827 +#, c-format +msgid " scnlen: %08x nreloc: %-6u\n" +msgstr "" + +#. Function aux entry. +#: od-xcoff.c:837 +#, c-format +msgid " exptr: %08x fsize: %08x lnnoptr: %08x endndx: %u\n" +msgstr "" + +#: od-xcoff.c:856 +#, c-format +msgid " scnsym: %-8u" +msgstr "" + +#: od-xcoff.c:858 +#, c-format +msgid " scnlen: %08x" +msgstr "" + +#: od-xcoff.c:859 +#, c-format +msgid " h: parm=%08x sn=%04x al: 2**%u" +msgstr "" + +#: od-xcoff.c:863 +#, c-format +msgid " typ: " +msgstr "" + +#: od-xcoff.c:865 +#, c-format +msgid " cl: " +msgstr "" + +#: od-xcoff.c:878 +#, c-format +msgid " ftype: %02x " +msgstr "" + +#: od-xcoff.c:881 +#, c-format +msgid "fname: %.14s" +msgstr "" + +#: od-xcoff.c:887 +#, c-format +msgid " %s" +msgstr "" + +#: od-xcoff.c:889 +#, c-format +msgid "offset: %08x" +msgstr "" + +#: od-xcoff.c:896 +#, c-format +msgid " lnno: %u\n" +msgstr "" + +#: od-xcoff.c:931 +#, c-format +msgid "Relocations for %s (%u)\n" +msgstr "" + +#: od-xcoff.c:934 +msgid "cannot read relocations" +msgstr "" + +#: od-xcoff.c:937 +#, c-format +msgid "vaddr sgn mod sz type symndx symbol\n" +msgstr "" + +#: od-xcoff.c:946 +msgid "cannot read relocation entry" +msgstr "" + +#: od-xcoff.c:950 +#, c-format +msgid "%08x %c %c %-2u " +msgstr "" + +#: od-xcoff.c:986 +#, c-format +msgid "Line numbers for %s (%u)\n" +msgstr "" + +#: od-xcoff.c:989 +msgid "cannot read line numbers" +msgstr "" + +#: od-xcoff.c:992 +#, c-format +msgid "lineno symndx/paddr\n" +msgstr "" + +#: od-xcoff.c:1000 +msgid "cannot read line number entry" +msgstr "" + +#: od-xcoff.c:1004 +#, c-format +msgid " %-6u " +msgstr "" + +#: od-xcoff.c:1043 +#, c-format +msgid "no .loader section in file\n" +msgstr "" + +#: od-xcoff.c:1049 +#, c-format +msgid "section .loader is too short\n" +msgstr "" + +#: od-xcoff.c:1056 +#, c-format +msgid "Loader header:\n" +msgstr "" + +#: od-xcoff.c:1058 +#, c-format +msgid " version: %u\n" +msgstr "" + +#: od-xcoff.c:1061 +#, c-format +msgid " Unhandled version\n" +msgstr "" + +#: od-xcoff.c:1066 +#, c-format +msgid " nbr symbols: %u\n" +msgstr "" + +#: od-xcoff.c:1068 +#, c-format +msgid " nbr relocs: %u\n" +msgstr "" + +#: od-xcoff.c:1069 +#, c-format +msgid " import strtab len: %u\n" +msgstr "" + +#: od-xcoff.c:1072 +#, c-format +msgid " nbr import files: %u\n" +msgstr "" + +#: od-xcoff.c:1074 +#, c-format +msgid " import file off: %u\n" +msgstr "" + +#: od-xcoff.c:1076 +#, c-format +msgid " string table len: %u\n" +msgstr "" + +#: od-xcoff.c:1078 +#, c-format +msgid " string table off: %u\n" +msgstr "" + +#: od-xcoff.c:1081 +#, c-format +msgid "Dynamic symbols:\n" +msgstr "" + +#: od-xcoff.c:1082 +#, c-format +msgid " # value sc IFEW ty class file pa name\n" +msgstr "" + +#: od-xcoff.c:1087 +#, c-format +msgid " %4u %08x %3u " +msgstr "" + +#: od-xcoff.c:1100 +#, c-format +msgid " %3u %3u " +msgstr "" + +#: od-xcoff.c:1109 +#, c-format +msgid "(bad offset: %u)" +msgstr "" + +#: od-xcoff.c:1116 +#, c-format +msgid "Dynamic relocs:\n" +msgstr "" + +#: od-xcoff.c:1117 +#, c-format +msgid " vaddr sec sz typ sym\n" +msgstr "" + +#: od-xcoff.c:1129 +#, c-format +msgid " %08x %3u %c%c %2u " +msgstr "" + +#: od-xcoff.c:1140 +#, c-format +msgid ".text" +msgstr "" + +#: od-xcoff.c:1143 +#, c-format +msgid ".data" +msgstr "" + +#: od-xcoff.c:1146 +#, c-format +msgid ".bss" +msgstr "" + +#: od-xcoff.c:1149 +#, c-format +msgid "%u" +msgstr "" + +#: od-xcoff.c:1155 +#, c-format +msgid "Import files:\n" +msgstr "" + +#: od-xcoff.c:1187 +#, c-format +msgid "no .except section in file\n" +msgstr "" + +#: od-xcoff.c:1195 +#, c-format +msgid "Exception table:\n" +msgstr "" + +#: od-xcoff.c:1196 +#, c-format +msgid "lang reason sym/addr\n" +msgstr "" + +#: od-xcoff.c:1204 +#, c-format +msgid " %02x %02x " +msgstr "" + +#: od-xcoff.c:1209 +#, c-format +msgid "@%08x" +msgstr "" + +#: od-xcoff.c:1229 #, c-format -msgid " Flags" +msgid "no .typchk section in file\n" msgstr "" -#: objdump.c:515 +#: od-xcoff.c:1236 #, c-format -msgid " Pg" +msgid "Type-check section:\n" msgstr "" -#: objdump.c:558 +#: od-xcoff.c:1237 #, c-format -msgid "%s: not a dynamic object" +msgid "offset len lang-id general-hash language-hash\n" msgstr "" -#: objdump.c:984 objdump.c:1008 +#: od-xcoff.c:1282 #, c-format -msgid " (File Offset: 0x%lx)" +msgid " address beyond section size\n" msgstr "" -#: objdump.c:1634 +#: od-xcoff.c:1292 #, c-format -msgid "disassemble_fn returned length %d" +msgid " tags at %08x\n" msgstr "" -#: objdump.c:1939 +#: od-xcoff.c:1299 #, c-format msgid "" -"\n" -"Disassembly of section %s:\n" +" version: %u, lang: %u, global_link: %u, is_eprol: %u, has_tboff: %u, " +"int_proc: %u\n" msgstr "" -#: objdump.c:2115 +#: od-xcoff.c:1306 #, c-format -msgid "can't use supplied machine %s" +msgid " has_ctl: %u, tocless: %u, fp_pres: %u, log_abort: %u, int_hndl: %u\n" msgstr "" -#: objdump.c:2134 +#: od-xcoff.c:1312 #, c-format -msgid "can't disassemble for architecture %s\n" +msgid "" +" name_pres: %u, uses_alloca: %u, cl_dis_inv: %u, saves_cr: %u, saves_lr: %u\n" msgstr "" -#: objdump.c:2214 objdump.c:2237 +#: od-xcoff.c:1318 #, c-format msgid "" -"\n" -"Can't get contents for section '%s'.\n" +" stores_bc: %u, fixup: %u, fpr_saved: %-2u, spare3: %u, gpr_saved: %-2u\n" msgstr "" -#: objdump.c:2378 +#: od-xcoff.c:1324 #, c-format -msgid "" -"No %s section present\n" -"\n" +msgid " fixparms: %-3u floatparms: %-3u parm_on_stk: %u\n" msgstr "" -#: objdump.c:2387 +#: od-xcoff.c:1337 #, c-format -msgid "reading %s section of %s failed: %s" +msgid " parminfo: 0x%08x\n" msgstr "" -#: objdump.c:2431 +#: od-xcoff.c:1348 #, c-format -msgid "" -"Contents of %s section:\n" -"\n" +msgid " tb_offset: 0x%08x (start=0x%08x)\n" msgstr "" -#: objdump.c:2562 +#: od-xcoff.c:1359 #, c-format -msgid "architecture: %s, " +msgid " hand_mask_offset: 0x%08x\n" msgstr "" -#: objdump.c:2565 +#: od-xcoff.c:1370 #, c-format -msgid "flags 0x%08x:\n" +msgid " number of CTL anchors: %u\n" msgstr "" -#: objdump.c:2579 +#: od-xcoff.c:1375 #, c-format -msgid "" -"\n" -"start address 0x" +msgid " CTL[%u]: %08x\n" msgstr "" -#: objdump.c:2642 +#: od-xcoff.c:1389 #, c-format -msgid "Contents of section %s:" +msgid " Name (len: %u): " msgstr "" -#: objdump.c:2644 +#: od-xcoff.c:1392 #, c-format -msgid " (Starting at file offset: 0x%lx)" +msgid "[truncated]\n" msgstr "" -#: objdump.c:2650 -msgid "Reading section failed" +#: od-xcoff.c:1407 +#, c-format +msgid " alloca reg: %u\n" msgstr "" -#: objdump.c:2753 +#: od-xcoff.c:1411 #, c-format -msgid "no symbols\n" +msgid " (end of tags at %08x)\n" msgstr "" -#: objdump.c:2760 +#: od-xcoff.c:1414 #, c-format -msgid "no information for symbol number %ld\n" +msgid " no tags found\n" msgstr "" -#: objdump.c:2763 +#: od-xcoff.c:1418 #, c-format -msgid "could not determine the type of symbol number %ld\n" +msgid " Truncated .text section\n" msgstr "" -#: objdump.c:3043 +#: od-xcoff.c:1503 #, c-format -msgid "" -"\n" -"%s: file format %s\n" +msgid "TOC:\n" msgstr "" -#: objdump.c:3101 +#: od-xcoff.c:1546 #, c-format -msgid "%s: printing debugging information failed" +msgid "Nbr entries: %-8u Size: %08x (%u)\n" +msgstr "" + +#: od-xcoff.c:1630 +msgid "cannot read header" msgstr "" -#: objdump.c:3205 +#: od-xcoff.c:1638 #, c-format -msgid "In archive %s:\n" +msgid "File header:\n" msgstr "" -#: objdump.c:3316 -msgid "error: the start address should be before the end address" +#: od-xcoff.c:1639 +#, c-format +msgid " magic: 0x%04x (0%04o) " msgstr "" -#: objdump.c:3321 -msgid "error: the stop address should be after the start address" +#: od-xcoff.c:1643 +#, c-format +msgid "(WRMAGIC: writable text segments)" msgstr "" -#: objdump.c:3333 -msgid "error: prefix strip must be non-negative" +#: od-xcoff.c:1646 +#, c-format +msgid "(ROMAGIC: readonly sharablee text segments)" msgstr "" -#: objdump.c:3338 -msgid "error: instruction width must be positive" +#: od-xcoff.c:1649 +#, c-format +msgid "(TOCMAGIC: readonly text segments and TOC)" msgstr "" -#: objdump.c:3347 -msgid "unrecognized -E option" +#: od-xcoff.c:1652 +#, c-format +msgid "unknown magic" msgstr "" -#: objdump.c:3358 +#: od-xcoff.c:1659 #, c-format -msgid "unrecognized --endian type `%s'" +msgid " Unhandled magic\n" msgstr "" #: rclex.c:197 @@ -3864,239 +4606,239 @@ msgstr "" msgid "Last stabs entries before error:\n" msgstr "" -#: readelf.c:268 +#: readelf.c:265 msgid "" msgstr "" -#: readelf.c:269 +#: readelf.c:266 msgid "" msgstr "" -#: readelf.c:270 readelf.c:5047 readelf.c:5557 readelf.c:7794 readelf.c:7912 -#: readelf.c:8865 readelf.c:8945 readelf.c:8998 readelf.c:11860 -#: readelf.c:11863 +#: readelf.c:267 readelf.c:5026 readelf.c:5536 readelf.c:8077 readelf.c:8195 +#: readelf.c:9154 readelf.c:9234 readelf.c:9287 readelf.c:12150 +#: readelf.c:12153 msgid "" msgstr "" -#: readelf.c:308 +#: readelf.c:300 #, c-format msgid "Unable to seek to 0x%lx for %s\n" msgstr "" -#: readelf.c:323 +#: readelf.c:315 #, c-format msgid "Out of memory allocating 0x%lx bytes for %s\n" msgstr "" -#: readelf.c:333 +#: readelf.c:325 #, c-format msgid "Unable to read in 0x%lx bytes of %s\n" msgstr "" -#: readelf.c:697 +#: readelf.c:625 msgid "Don't know about relocations on this machine architecture\n" msgstr "" -#: readelf.c:718 readelf.c:748 readelf.c:816 readelf.c:845 +#: readelf.c:646 readelf.c:676 readelf.c:744 readelf.c:773 msgid "relocs" msgstr "" -#: readelf.c:730 readelf.c:760 readelf.c:827 readelf.c:856 +#: readelf.c:658 readelf.c:688 readelf.c:755 readelf.c:784 msgid "out of memory parsing relocs\n" msgstr "" -#: readelf.c:961 +#: readelf.c:889 #, c-format msgid "" " Offset Info Type Sym. Value Symbol's Name + Addend\n" msgstr "" -#: readelf.c:963 +#: readelf.c:891 #, c-format msgid " Offset Info Type Sym.Value Sym. Name + Addend\n" msgstr "" -#: readelf.c:968 +#: readelf.c:896 #, c-format msgid " Offset Info Type Sym. Value Symbol's Name\n" msgstr "" -#: readelf.c:970 +#: readelf.c:898 #, c-format msgid " Offset Info Type Sym.Value Sym. Name\n" msgstr "" -#: readelf.c:978 +#: readelf.c:906 #, c-format msgid "" " Offset Info Type Symbol's Value " "Symbol's Name + Addend\n" msgstr "" -#: readelf.c:980 +#: readelf.c:908 #, c-format msgid "" " Offset Info Type Sym. Value Sym. Name + " "Addend\n" msgstr "" -#: readelf.c:985 +#: readelf.c:913 #, c-format msgid "" " Offset Info Type Symbol's Value " "Symbol's Name\n" msgstr "" -#: readelf.c:987 +#: readelf.c:915 #, c-format msgid "" " Offset Info Type Sym. Value Sym. Name\n" msgstr "" -#: readelf.c:1291 readelf.c:1448 readelf.c:1456 +#: readelf.c:1219 readelf.c:1378 readelf.c:1386 #, c-format msgid "unrecognized: %-7lx" msgstr "" -#: readelf.c:1316 +#: readelf.c:1244 #, c-format msgid "" msgstr "" -#: readelf.c:1323 +#: readelf.c:1251 #, c-format msgid " bad symbol index: %08lx" msgstr "" -#: readelf.c:1406 +#: readelf.c:1336 #, c-format msgid "" msgstr "" -#: readelf.c:1408 +#: readelf.c:1338 #, c-format msgid "" msgstr "" -#: readelf.c:1801 +#: readelf.c:1731 #, c-format msgid "Processor Specific: %lx" msgstr "" -#: readelf.c:1825 +#: readelf.c:1755 #, c-format msgid "Operating System specific: %lx" msgstr "" -#: readelf.c:1829 readelf.c:2875 +#: readelf.c:1759 readelf.c:2821 #, c-format msgid ": %lx" msgstr "" -#: readelf.c:1842 +#: readelf.c:1772 msgid "NONE (None)" msgstr "" -#: readelf.c:1843 +#: readelf.c:1773 msgid "REL (Relocatable file)" msgstr "" -#: readelf.c:1844 +#: readelf.c:1774 msgid "EXEC (Executable file)" msgstr "" -#: readelf.c:1845 +#: readelf.c:1775 msgid "DYN (Shared object file)" msgstr "" -#: readelf.c:1846 +#: readelf.c:1776 msgid "CORE (Core file)" msgstr "" -#: readelf.c:1850 +#: readelf.c:1780 #, c-format msgid "Processor Specific: (%x)" msgstr "" -#: readelf.c:1852 +#: readelf.c:1782 #, c-format msgid "OS Specific: (%x)" msgstr "" -#: readelf.c:1854 readelf.c:3122 +#: readelf.c:1784 readelf.c:3068 #, c-format msgid ": %x" msgstr "" -#: readelf.c:1866 +#: readelf.c:1796 msgid "None" msgstr "" -#: readelf.c:2034 +#: readelf.c:1964 #, c-format msgid ": 0x%x" msgstr "" -#: readelf.c:2220 +#: readelf.c:2150 msgid ", " msgstr "" -#: readelf.c:2291 readelf.c:7145 +#: readelf.c:2236 readelf.c:7428 msgid "unknown" msgstr "" -#: readelf.c:2292 +#: readelf.c:2237 msgid "unknown mac" msgstr "" -#: readelf.c:2356 +#: readelf.c:2301 msgid ", relocatable" msgstr "" -#: readelf.c:2359 +#: readelf.c:2304 msgid ", relocatable-lib" msgstr "" -#: readelf.c:2382 +#: readelf.c:2327 msgid ", unknown v850 architecture variant" msgstr "" -#: readelf.c:2438 +#: readelf.c:2384 msgid ", unknown CPU" msgstr "" -#: readelf.c:2453 +#: readelf.c:2399 msgid ", unknown ABI" msgstr "" -#: readelf.c:2473 readelf.c:2507 +#: readelf.c:2419 readelf.c:2453 msgid ", unknown ISA" msgstr "" -#: readelf.c:2680 +#: readelf.c:2626 msgid "Standalone App" msgstr "" -#: readelf.c:2689 +#: readelf.c:2635 msgid "Bare-metal C6000" msgstr "" -#: readelf.c:2699 readelf.c:3462 readelf.c:3478 +#: readelf.c:2645 readelf.c:3431 readelf.c:3447 #, c-format msgid "" msgstr "" -#: readelf.c:3172 +#: readelf.c:3123 #, c-format msgid "Usage: readelf elf-file(s)\n" msgstr "" -#: readelf.c:3173 +#: readelf.c:3124 #, c-format msgid " Display information about the contents of ELF format files\n" msgstr "" -#: readelf.c:3174 +#: readelf.c:3125 #, c-format msgid "" " Options are:\n" @@ -4135,18 +4877,26 @@ msgid "" " --debug-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro," "=frames,\n" " =frames-interp,=str,=loc,=Ranges,=pubtypes,\n" -" =trace_info,=trace_abbrev,=trace_aranges]\n" +" =gdb_index,=trace_info,=trace_abbrev,=trace_aranges]\n" " Display the contents of DWARF2 debug sections\n" msgstr "" -#: readelf.c:3207 +#: readelf.c:3157 +#, c-format +msgid "" +" --dwarf-depth=N Do not display DIEs at depth N or greater\n" +" --dwarf-start=N Display DIEs starting with N, at the same depth\n" +" or deeper\n" +msgstr "" + +#: readelf.c:3162 #, c-format msgid "" " -i --instruction-dump=\n" " Disassemble the contents of section \n" msgstr "" -#: readelf.c:3211 +#: readelf.c:3166 #, c-format msgid "" " -I --histogram Display histogram of bucket list lengths\n" @@ -4156,414 +4906,421 @@ msgid "" " -v --version Display the version number of readelf\n" msgstr "" -#: readelf.c:3240 readelf.c:3269 readelf.c:3273 readelf.c:13224 +#: readelf.c:3195 readelf.c:3224 readelf.c:3228 readelf.c:13374 msgid "Out of memory allocating dump request table.\n" msgstr "" -#: readelf.c:3431 +#: readelf.c:3400 #, c-format msgid "Invalid option '-%c'\n" msgstr "" -#: readelf.c:3446 +#: readelf.c:3415 msgid "Nothing to do.\n" msgstr "" -#: readelf.c:3458 readelf.c:3474 readelf.c:7730 +#: readelf.c:3427 readelf.c:3443 readelf.c:8013 msgid "none" msgstr "" -#: readelf.c:3475 +#: readelf.c:3444 msgid "2's complement, little endian" msgstr "" -#: readelf.c:3476 +#: readelf.c:3445 msgid "2's complement, big endian" msgstr "" -#: readelf.c:3494 +#: readelf.c:3463 msgid "Not an ELF file - it has the wrong magic bytes at the start\n" msgstr "" -#: readelf.c:3504 +#: readelf.c:3473 #, c-format msgid "ELF Header:\n" msgstr "" -#: readelf.c:3505 +#: readelf.c:3474 #, c-format msgid " Magic: " msgstr "" -#: readelf.c:3509 +#: readelf.c:3478 #, c-format msgid " Class: %s\n" msgstr "" -#: readelf.c:3511 +#: readelf.c:3480 #, c-format msgid " Data: %s\n" msgstr "" -#: readelf.c:3513 +#: readelf.c:3482 #, c-format msgid " Version: %d %s\n" msgstr "" -#: readelf.c:3518 +#: readelf.c:3487 #, c-format msgid "" msgstr "" -#: readelf.c:3520 +#: readelf.c:3489 #, c-format msgid " OS/ABI: %s\n" msgstr "" -#: readelf.c:3522 +#: readelf.c:3491 #, c-format msgid " ABI Version: %d\n" msgstr "" -#: readelf.c:3524 +#: readelf.c:3493 #, c-format msgid " Type: %s\n" msgstr "" -#: readelf.c:3526 +#: readelf.c:3495 #, c-format msgid " Machine: %s\n" msgstr "" -#: readelf.c:3528 +#: readelf.c:3497 #, c-format msgid " Version: 0x%lx\n" msgstr "" -#: readelf.c:3531 +#: readelf.c:3500 #, c-format msgid " Entry point address: " msgstr "" -#: readelf.c:3533 +#: readelf.c:3502 #, c-format msgid "" "\n" " Start of program headers: " msgstr "" -#: readelf.c:3535 +#: readelf.c:3504 #, c-format msgid "" " (bytes into file)\n" " Start of section headers: " msgstr "" -#: readelf.c:3537 +#: readelf.c:3506 #, c-format msgid " (bytes into file)\n" msgstr "" -#: readelf.c:3539 +#: readelf.c:3508 #, c-format msgid " Flags: 0x%lx%s\n" msgstr "" -#: readelf.c:3542 +#: readelf.c:3511 #, c-format msgid " Size of this header: %ld (bytes)\n" msgstr "" -#: readelf.c:3544 +#: readelf.c:3513 #, c-format msgid " Size of program headers: %ld (bytes)\n" msgstr "" -#: readelf.c:3546 +#: readelf.c:3515 #, c-format msgid " Number of program headers: %ld" msgstr "" -#: readelf.c:3551 -#, c-format -msgid " (%ld)" -msgstr "" - -#: readelf.c:3553 +#: readelf.c:3522 #, c-format msgid " Size of section headers: %ld (bytes)\n" msgstr "" -#: readelf.c:3555 +#: readelf.c:3524 #, c-format msgid " Number of section headers: %ld" msgstr "" -#: readelf.c:3560 +#: readelf.c:3529 #, c-format msgid " Section header string table index: %ld" msgstr "" -#: readelf.c:3567 +#: readelf.c:3536 #, c-format msgid " " msgstr "" -#: readelf.c:3601 readelf.c:3635 +#: readelf.c:3570 readelf.c:3604 msgid "program headers" msgstr "" -#: readelf.c:3701 +#: readelf.c:3671 +msgid "" +"possibly corrupt ELF header - it has a non-zero program header offset, but " +"no program headers" +msgstr "" + +#: readelf.c:3674 #, c-format msgid "" "\n" "There are no program headers in this file.\n" msgstr "" -#: readelf.c:3707 +#: readelf.c:3680 #, c-format msgid "" "\n" "Elf file type is %s\n" msgstr "" -#: readelf.c:3708 +#: readelf.c:3681 #, c-format msgid "Entry point " msgstr "" -#: readelf.c:3710 +#: readelf.c:3683 #, c-format msgid "" "\n" "There are %d program headers, starting at offset " msgstr "" -#: readelf.c:3722 readelf.c:3724 +#: readelf.c:3695 readelf.c:3697 #, c-format msgid "" "\n" "Program Headers:\n" msgstr "" -#: readelf.c:3728 +#: readelf.c:3701 #, c-format msgid "" " Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align\n" msgstr "" -#: readelf.c:3731 +#: readelf.c:3704 #, c-format msgid "" " Type Offset VirtAddr PhysAddr FileSiz " "MemSiz Flg Align\n" msgstr "" -#: readelf.c:3735 +#: readelf.c:3708 #, c-format msgid " Type Offset VirtAddr PhysAddr\n" msgstr "" -#: readelf.c:3737 +#: readelf.c:3710 #, c-format msgid " FileSiz MemSiz Flags Align\n" msgstr "" -#: readelf.c:3830 +#: readelf.c:3803 msgid "more than one dynamic segment\n" msgstr "" -#: readelf.c:3849 +#: readelf.c:3822 msgid "no .dynamic section in the dynamic segment\n" msgstr "" -#: readelf.c:3864 +#: readelf.c:3837 msgid "the .dynamic section is not contained within the dynamic segment\n" msgstr "" -#: readelf.c:3867 +#: readelf.c:3840 msgid "the .dynamic section is not the first section in the dynamic segment.\n" msgstr "" -#: readelf.c:3875 +#: readelf.c:3848 msgid "Unable to find program interpreter name\n" msgstr "" -#: readelf.c:3882 +#: readelf.c:3855 msgid "" "Internal error: failed to create format string to display program " "interpreter\n" msgstr "" -#: readelf.c:3886 +#: readelf.c:3859 msgid "Unable to read program interpreter name\n" msgstr "" -#: readelf.c:3889 +#: readelf.c:3862 #, c-format msgid "" "\n" " [Requesting program interpreter: %s]" msgstr "" -#: readelf.c:3901 +#: readelf.c:3874 #, c-format msgid "" "\n" " Section to Segment mapping:\n" msgstr "" -#: readelf.c:3902 +#: readelf.c:3875 #, c-format msgid " Segment Sections...\n" msgstr "" -#: readelf.c:3938 +#: readelf.c:3911 msgid "Cannot interpret virtual addresses without program headers.\n" msgstr "" -#: readelf.c:3954 +#: readelf.c:3927 #, c-format msgid "Virtual address 0x%lx not located in any PT_LOAD segment.\n" msgstr "" -#: readelf.c:3969 readelf.c:4012 +#: readelf.c:3942 readelf.c:3985 msgid "section headers" msgstr "" -#: readelf.c:4059 readelf.c:4134 +#: readelf.c:4032 readelf.c:4107 msgid "sh_entsize is zero\n" msgstr "" -#: readelf.c:4067 readelf.c:4142 +#: readelf.c:4040 readelf.c:4115 msgid "Invalid sh_entsize\n" msgstr "" -#: readelf.c:4072 readelf.c:4147 +#: readelf.c:4045 readelf.c:4120 msgid "symbols" msgstr "" -#: readelf.c:4084 readelf.c:4159 +#: readelf.c:4057 readelf.c:4132 msgid "symtab shndx" msgstr "" -#: readelf.c:4419 +#: readelf.c:4392 #, c-format msgid "UNKNOWN (%*.*lx)" msgstr "" -#: readelf.c:4440 readelf.c:4920 +#: readelf.c:4414 +msgid "" +"possibly corrupt ELF file header - it has a non-zero section header offset, " +"but no section headers\n" +msgstr "" + +#: readelf.c:4417 #, c-format msgid "" "\n" "There are no sections in this file.\n" msgstr "" -#: readelf.c:4446 +#: readelf.c:4423 #, c-format msgid "There are %d section headers, starting at offset 0x%lx:\n" msgstr "" -#: readelf.c:4467 readelf.c:5043 readelf.c:5454 readelf.c:5760 readelf.c:6173 -#: readelf.c:6754 readelf.c:8843 +#: readelf.c:4444 readelf.c:5022 readelf.c:5433 readelf.c:5739 readelf.c:6152 +#: readelf.c:7036 readelf.c:9132 msgid "string table" msgstr "" -#: readelf.c:4534 +#: readelf.c:4511 #, c-format msgid "Section %d has invalid sh_entsize %lx (expected %lx)\n" msgstr "" -#: readelf.c:4554 +#: readelf.c:4531 msgid "File contains multiple dynamic symbol tables\n" msgstr "" -#: readelf.c:4567 +#: readelf.c:4544 msgid "File contains multiple dynamic string tables\n" msgstr "" -#: readelf.c:4573 +#: readelf.c:4550 msgid "dynamic strings" msgstr "" -#: readelf.c:4580 +#: readelf.c:4557 msgid "File contains multiple symtab shndx tables\n" msgstr "" -#: readelf.c:4648 +#: readelf.c:4627 #, c-format msgid "" "\n" "Section Headers:\n" msgstr "" -#: readelf.c:4650 +#: readelf.c:4629 #, c-format msgid "" "\n" "Section Header:\n" msgstr "" -#: readelf.c:4656 readelf.c:4667 readelf.c:4678 +#: readelf.c:4635 readelf.c:4646 readelf.c:4657 #, c-format msgid " [Nr] Name\n" msgstr "" -#: readelf.c:4657 +#: readelf.c:4636 #, c-format msgid " Type Addr Off Size ES Lk Inf Al\n" msgstr "" -#: readelf.c:4661 +#: readelf.c:4640 #, c-format msgid "" " [Nr] Name Type Addr Off Size ES Flg Lk " "Inf Al\n" msgstr "" -#: readelf.c:4668 +#: readelf.c:4647 #, c-format msgid " Type Address Off Size ES Lk Inf Al\n" msgstr "" -#: readelf.c:4672 +#: readelf.c:4651 #, c-format msgid "" " [Nr] Name Type Address Off Size ES " "Flg Lk Inf Al\n" msgstr "" -#: readelf.c:4679 +#: readelf.c:4658 #, c-format msgid " Type Address Offset Link\n" msgstr "" -#: readelf.c:4680 +#: readelf.c:4659 #, c-format msgid " Size EntSize Info Align\n" msgstr "" -#: readelf.c:4684 +#: readelf.c:4663 #, c-format msgid " [Nr] Name Type Address Offset\n" msgstr "" -#: readelf.c:4685 +#: readelf.c:4664 #, c-format msgid " Size EntSize Flags Link Info Align\n" msgstr "" -#: readelf.c:4690 +#: readelf.c:4669 #, c-format msgid " Flags\n" msgstr "" -#: readelf.c:4769 +#: readelf.c:4748 #, c-format msgid "section %u: sh_link value of %u is larger than the number of sections\n" msgstr "" -#: readelf.c:4868 +#: readelf.c:4847 #, c-format msgid "" "Key to Flags:\n" @@ -4572,7 +5329,7 @@ msgid "" " O (extra OS processing required) o (OS specific), p (processor specific)\n" msgstr "" -#: readelf.c:4873 +#: readelf.c:4852 #, c-format msgid "" "Key to Flags:\n" @@ -4581,826 +5338,837 @@ msgid "" " O (extra OS processing required) o (OS specific), p (processor specific)\n" msgstr "" -#: readelf.c:4895 +#: readelf.c:4874 #, c-format msgid "[: 0x%x] " msgstr "" -#: readelf.c:4927 +#: readelf.c:4899 +#, c-format +msgid "" +"\n" +"There are no sections to group in this file.\n" +msgstr "" + +#: readelf.c:4906 msgid "Section headers are not available!\n" msgstr "" -#: readelf.c:4951 +#: readelf.c:4930 #, c-format msgid "" "\n" "There are no section groups in this file.\n" msgstr "" -#: readelf.c:4988 +#: readelf.c:4967 #, c-format msgid "Bad sh_link in group section `%s'\n" msgstr "" -#: readelf.c:5002 +#: readelf.c:4981 #, c-format msgid "Corrupt header in group section `%s'\n" msgstr "" -#: readelf.c:5013 +#: readelf.c:4992 #, c-format msgid "Bad sh_info in group section `%s'\n" msgstr "" -#: readelf.c:5052 +#: readelf.c:5031 msgid "section data" msgstr "" -#: readelf.c:5061 +#: readelf.c:5040 #, c-format msgid "" "\n" "%sgroup section [%5u] `%s' [%s] contains %u sections:\n" msgstr "" -#: readelf.c:5064 +#: readelf.c:5043 #, c-format msgid " [Index] Name\n" msgstr "" -#: readelf.c:5078 +#: readelf.c:5057 #, c-format msgid "section [%5u] in group section [%5u] > maximum section [%5u]\n" msgstr "" -#: readelf.c:5087 +#: readelf.c:5066 #, c-format msgid "section [%5u] in group section [%5u] already in group section [%5u]\n" msgstr "" -#: readelf.c:5100 +#: readelf.c:5079 #, c-format msgid "section 0 in group section [%5u]\n" msgstr "" -#: readelf.c:5167 +#: readelf.c:5146 msgid "dynamic section image fixups" msgstr "" -#: readelf.c:5179 +#: readelf.c:5158 #, c-format msgid "" "\n" "Image fixups for needed library #%d: %s - ident: %lx\n" msgstr "" -#: readelf.c:5182 +#: readelf.c:5161 #, c-format msgid "Seg Offset Type SymVec DataType\n" msgstr "" -#: readelf.c:5214 +#: readelf.c:5193 msgid "dynamic section image relas" msgstr "" -#: readelf.c:5218 +#: readelf.c:5197 #, c-format msgid "" "\n" "Image relocs\n" msgstr "" -#: readelf.c:5220 +#: readelf.c:5199 #, c-format msgid "" "Seg Offset Type Addend Seg Sym Off\n" msgstr "" -#: readelf.c:5275 +#: readelf.c:5254 msgid "dynamic string section" msgstr "" -#: readelf.c:5376 +#: readelf.c:5355 #, c-format msgid "" "\n" "'%s' relocation section at offset 0x%lx contains %ld bytes:\n" msgstr "" -#: readelf.c:5391 +#: readelf.c:5370 #, c-format msgid "" "\n" "There are no dynamic relocations in this file.\n" msgstr "" -#: readelf.c:5415 +#: readelf.c:5394 #, c-format msgid "" "\n" "Relocation section " msgstr "" -#: readelf.c:5420 readelf.c:5836 readelf.c:5851 readelf.c:6188 +#: readelf.c:5399 readelf.c:5815 readelf.c:5830 readelf.c:6167 #, c-format msgid "'%s'" msgstr "" -#: readelf.c:5422 readelf.c:5853 readelf.c:6190 +#: readelf.c:5401 readelf.c:5832 readelf.c:6169 #, c-format msgid " at offset 0x%lx contains %lu entries:\n" msgstr "" -#: readelf.c:5473 +#: readelf.c:5452 #, c-format msgid "" "\n" "There are no relocations in this file.\n" msgstr "" -#: readelf.c:5611 +#: readelf.c:5590 #, c-format msgid "\tUnknown version.\n" msgstr "" -#: readelf.c:5664 readelf.c:6037 +#: readelf.c:5643 readelf.c:6016 msgid "unwind table" msgstr "" -#: readelf.c:5706 readelf.c:6119 readelf.c:6365 +#: readelf.c:5685 readelf.c:6098 readelf.c:6358 #, c-format msgid "Skipping unexpected relocation type %s\n" msgstr "" -#: readelf.c:5768 readelf.c:6181 readelf.c:6762 readelf.c:6808 +#: readelf.c:5747 readelf.c:6160 readelf.c:7044 readelf.c:7091 #, c-format msgid "" "\n" "There are no unwind sections in this file.\n" msgstr "" -#: readelf.c:5831 +#: readelf.c:5810 #, c-format msgid "" "\n" "Could not find unwind info section for " msgstr "" -#: readelf.c:5844 +#: readelf.c:5823 msgid "unwind info" msgstr "" -#: readelf.c:5846 readelf.c:6187 +#: readelf.c:5825 readelf.c:6166 #, c-format msgid "" "\n" "Unwind section " msgstr "" -#: readelf.c:6296 +#: readelf.c:6275 msgid "unwind data" msgstr "" -#: readelf.c:6350 +#: readelf.c:6329 #, c-format msgid "Skipping unexpected relocation at offset 0x%lx\n" msgstr "" -#: readelf.c:6426 +#: readelf.c:6433 #, c-format msgid "[Truncated opcode]\n" msgstr "" -#: readelf.c:6429 +#: readelf.c:6477 readelf.c:6677 #, c-format -msgid "0x%02x " +msgid "Refuse to unwind" msgstr "" -#: readelf.c:6451 +#: readelf.c:6500 #, c-format -msgid " Personality routine: " +msgid " [Reserved]" msgstr "" -#: readelf.c:6469 +#: readelf.c:6528 #, c-format -msgid " [Truncated data]\n" +msgid " finish" msgstr "" -#: readelf.c:6484 +#: readelf.c:6533 readelf.c:6619 #, c-format -msgid " [reserved compact index %d]\n" +msgid "[Spare]" msgstr "" -#: readelf.c:6488 +#: readelf.c:6640 readelf.c:6774 #, c-format -msgid " Compact model %d\n" +msgid " [unsupported opcode]" msgstr "" -#: readelf.c:6515 +#: readelf.c:6666 #, c-format msgid " 0x%02x " msgstr "" -#: readelf.c:6520 +#: readelf.c:6671 #, c-format -msgid " vsp = vsp + %d" +msgid " sp = sp + %d" msgstr "" -#: readelf.c:6525 +#: readelf.c:6724 #, c-format -msgid " vsp = vsp - %d" +msgid "pop frame {" +msgstr "" + +#: readelf.c:6735 +msgid "[pad]" msgstr "" -#: readelf.c:6531 +#: readelf.c:6763 #, c-format -msgid "Refuse to unwind" +msgid "sp = sp + %ld" msgstr "" -#: readelf.c:6554 +#: readelf.c:6821 #, c-format -msgid " [Reserved]" +msgid " Personality routine: " msgstr "" -#: readelf.c:6556 +#: readelf.c:6839 #, c-format -msgid " vsp = r%d" +msgid " [Truncated data]\n" msgstr "" -#: readelf.c:6581 +#: readelf.c:6854 #, c-format -msgid " finish" +msgid " Compact model %d\n" msgstr "" -#: readelf.c:6586 +#: readelf.c:6890 #, c-format -msgid "[Spare]" +msgid " Restore stack from frame pointer\n" msgstr "" -#: readelf.c:6620 +#: readelf.c:6892 #, c-format -msgid "vsp = vsp + %ld" +msgid " Stack increment %d\n" msgstr "" -#: readelf.c:6627 +#: readelf.c:6893 #, c-format -msgid "[unsupported two-byte opcode]" +msgid " Registers restored: " msgstr "" -#: readelf.c:6631 +#: readelf.c:6898 #, c-format -msgid " [unsupported opcode]" +msgid " Return register: %s\n" msgstr "" -#: readelf.c:6715 +#: readelf.c:6981 #, c-format msgid "Could not locate .ARM.extab section containing 0x%lx.\n" msgstr "" -#: readelf.c:6768 +#: readelf.c:7050 #, c-format msgid "" "\n" "Unwind table index '%s' at offset 0x%lx contains %lu entries:\n" msgstr "" -#: readelf.c:6819 +#: readelf.c:7102 #, c-format msgid "NONE\n" msgstr "" -#: readelf.c:6845 +#: readelf.c:7128 #, c-format msgid "Interface Version: %s\n" msgstr "" -#: readelf.c:6847 +#: readelf.c:7130 #, c-format msgid "\n" msgstr "" -#: readelf.c:6860 +#: readelf.c:7143 #, c-format msgid "Time Stamp: %s\n" msgstr "" -#: readelf.c:7037 readelf.c:7083 +#: readelf.c:7320 readelf.c:7366 msgid "dynamic section" msgstr "" -#: readelf.c:7161 +#: readelf.c:7444 #, c-format msgid "" "\n" "There is no dynamic section in this file.\n" msgstr "" -#: readelf.c:7199 +#: readelf.c:7482 msgid "Unable to seek to end of file!\n" msgstr "" -#: readelf.c:7212 +#: readelf.c:7495 msgid "Unable to determine the number of symbols to load\n" msgstr "" -#: readelf.c:7247 +#: readelf.c:7530 msgid "Unable to seek to end of file\n" msgstr "" -#: readelf.c:7254 +#: readelf.c:7537 msgid "Unable to determine the length of the dynamic string table\n" msgstr "" -#: readelf.c:7260 +#: readelf.c:7543 msgid "dynamic string table" msgstr "" -#: readelf.c:7297 +#: readelf.c:7580 msgid "symbol information" msgstr "" -#: readelf.c:7322 +#: readelf.c:7605 #, c-format msgid "" "\n" "Dynamic section at offset 0x%lx contains %u entries:\n" msgstr "" -#: readelf.c:7325 +#: readelf.c:7608 #, c-format msgid " Tag Type Name/Value\n" msgstr "" -#: readelf.c:7361 +#: readelf.c:7644 #, c-format msgid "Auxiliary library" msgstr "" -#: readelf.c:7365 +#: readelf.c:7648 #, c-format msgid "Filter library" msgstr "" -#: readelf.c:7369 +#: readelf.c:7652 #, c-format msgid "Configuration file" msgstr "" -#: readelf.c:7373 +#: readelf.c:7656 #, c-format msgid "Dependency audit library" msgstr "" -#: readelf.c:7377 +#: readelf.c:7660 #, c-format msgid "Audit library" msgstr "" -#: readelf.c:7395 readelf.c:7423 readelf.c:7451 +#: readelf.c:7678 readelf.c:7706 readelf.c:7734 #, c-format msgid "Flags:" msgstr "" -#: readelf.c:7398 readelf.c:7426 readelf.c:7453 +#: readelf.c:7681 readelf.c:7709 readelf.c:7736 #, c-format msgid " None\n" msgstr "" -#: readelf.c:7574 +#: readelf.c:7857 #, c-format msgid "Shared library: [%s]" msgstr "" -#: readelf.c:7577 +#: readelf.c:7860 #, c-format msgid " program interpreter" msgstr "" -#: readelf.c:7581 +#: readelf.c:7864 #, c-format msgid "Library soname: [%s]" msgstr "" -#: readelf.c:7585 +#: readelf.c:7868 #, c-format msgid "Library rpath: [%s]" msgstr "" -#: readelf.c:7589 +#: readelf.c:7872 #, c-format msgid "Library runpath: [%s]" msgstr "" -#: readelf.c:7622 +#: readelf.c:7905 #, c-format msgid " (bytes)\n" msgstr "" -#: readelf.c:7652 +#: readelf.c:7935 #, c-format msgid "Not needed object: [%s]\n" msgstr "" -#: readelf.c:7752 +#: readelf.c:8035 msgid "| " msgstr "" -#: readelf.c:7785 +#: readelf.c:8068 #, c-format msgid "" "\n" "Version definition section '%s' contains %u entries:\n" msgstr "" -#: readelf.c:7788 +#: readelf.c:8071 #, c-format msgid " Addr: 0x" msgstr "" -#: readelf.c:7790 readelf.c:7908 readelf.c:8046 +#: readelf.c:8073 readelf.c:8191 readelf.c:8332 #, c-format msgid " Offset: %#08lx Link: %u (%s)\n" msgstr "" -#: readelf.c:7798 +#: readelf.c:8081 msgid "version definition section" msgstr "" -#: readelf.c:7831 +#: readelf.c:8114 #, c-format msgid " %#06x: Rev: %d Flags: %s" msgstr "" -#: readelf.c:7834 +#: readelf.c:8117 #, c-format msgid " Index: %d Cnt: %d " msgstr "" -#: readelf.c:7850 +#: readelf.c:8133 #, c-format msgid "Name: %s\n" msgstr "" -#: readelf.c:7852 +#: readelf.c:8135 #, c-format msgid "Name index: %ld\n" msgstr "" -#: readelf.c:7874 +#: readelf.c:8157 #, c-format msgid " %#06x: Parent %d: %s\n" msgstr "" -#: readelf.c:7877 +#: readelf.c:8160 #, c-format msgid " %#06x: Parent %d, name index: %ld\n" msgstr "" -#: readelf.c:7882 +#: readelf.c:8165 #, c-format msgid " Version def aux past end of section\n" msgstr "" -#: readelf.c:7888 +#: readelf.c:8171 #, c-format msgid " Version definition past end of section\n" msgstr "" -#: readelf.c:7903 +#: readelf.c:8186 #, c-format msgid "" "\n" "Version needs section '%s' contains %u entries:\n" msgstr "" -#: readelf.c:7906 +#: readelf.c:8189 #, c-format msgid " Addr: 0x" msgstr "" -#: readelf.c:7917 +#: readelf.c:8200 msgid "version need section" msgstr "" -#: readelf.c:7945 +#: readelf.c:8228 #, c-format msgid " %#06x: Version: %d" msgstr "" -#: readelf.c:7948 +#: readelf.c:8231 #, c-format msgid " File: %s" msgstr "" -#: readelf.c:7950 +#: readelf.c:8233 #, c-format msgid " File: %lx" msgstr "" -#: readelf.c:7952 +#: readelf.c:8235 #, c-format msgid " Cnt: %d\n" msgstr "" -#: readelf.c:7977 +#: readelf.c:8260 #, c-format msgid " %#06x: Name: %s" msgstr "" -#: readelf.c:7980 +#: readelf.c:8263 #, c-format msgid " %#06x: Name index: %lx" msgstr "" -#: readelf.c:7983 +#: readelf.c:8266 #, c-format msgid " Flags: %s Version: %d\n" msgstr "" -#: readelf.c:7995 +#: readelf.c:8278 #, c-format msgid " Version need aux past end of section\n" msgstr "" -#: readelf.c:8000 +#: readelf.c:8283 #, c-format msgid " Version need past end of section\n" msgstr "" -#: readelf.c:8037 +#: readelf.c:8320 msgid "version string table" msgstr "" -#: readelf.c:8041 +#: readelf.c:8327 #, c-format msgid "" "\n" "Version symbols section '%s' contains %d entries:\n" msgstr "" -#: readelf.c:8044 +#: readelf.c:8330 #, c-format msgid " Addr: " msgstr "" -#: readelf.c:8055 +#: readelf.c:8341 msgid "version symbol data" msgstr "" -#: readelf.c:8082 +#: readelf.c:8369 msgid " 0 (*local*) " msgstr "" -#: readelf.c:8086 +#: readelf.c:8373 msgid " 1 (*global*) " msgstr "" -#: readelf.c:8099 +#: readelf.c:8386 msgid "invalid index into symbol array\n" msgstr "" -#: readelf.c:8133 readelf.c:8910 +#: readelf.c:8420 readelf.c:9199 msgid "version need" msgstr "" -#: readelf.c:8143 +#: readelf.c:8430 msgid "version need aux (2)" msgstr "" -#: readelf.c:8158 readelf.c:8213 +#: readelf.c:8445 readelf.c:8500 msgid "*invalid*" msgstr "" -#: readelf.c:8188 readelf.c:8975 +#: readelf.c:8475 readelf.c:9264 msgid "version def" msgstr "" -#: readelf.c:8208 readelf.c:8990 +#: readelf.c:8495 readelf.c:9279 msgid "version def aux" msgstr "" -#: readelf.c:8242 +#: readelf.c:8529 #, c-format msgid "" "\n" "No version information found in this file.\n" msgstr "" -#: readelf.c:8441 +#: readelf.c:8728 #, c-format msgid ": %x" msgstr "" -#: readelf.c:8500 +#: readelf.c:8789 msgid "Unable to read in dynamic data\n" msgstr "" -#: readelf.c:8550 +#: readelf.c:8839 #, c-format msgid " " msgstr "" -#: readelf.c:8593 readelf.c:8645 readelf.c:8669 readelf.c:8699 readelf.c:8723 +#: readelf.c:8882 readelf.c:8934 readelf.c:8958 readelf.c:8988 readelf.c:9012 msgid "Unable to seek to start of dynamic information\n" msgstr "" -#: readelf.c:8599 readelf.c:8651 +#: readelf.c:8888 readelf.c:8940 msgid "Failed to read in number of buckets\n" msgstr "" -#: readelf.c:8605 +#: readelf.c:8894 msgid "Failed to read in number of chains\n" msgstr "" -#: readelf.c:8707 +#: readelf.c:8996 msgid "Failed to determine last chain length\n" msgstr "" -#: readelf.c:8751 +#: readelf.c:9040 #, c-format msgid "" "\n" "Symbol table for image:\n" msgstr "" -#: readelf.c:8753 readelf.c:8771 +#: readelf.c:9042 readelf.c:9060 #, c-format msgid " Num Buc: Value Size Type Bind Vis Ndx Name\n" msgstr "" -#: readelf.c:8755 readelf.c:8773 +#: readelf.c:9044 readelf.c:9062 #, c-format msgid " Num Buc: Value Size Type Bind Vis Ndx Name\n" msgstr "" -#: readelf.c:8769 +#: readelf.c:9058 #, c-format msgid "" "\n" "Symbol table of `.gnu.hash' for image:\n" msgstr "" -#: readelf.c:8812 +#: readelf.c:9101 #, c-format msgid "" "\n" "Symbol table '%s' has a sh_entsize of zero!\n" msgstr "" -#: readelf.c:8817 +#: readelf.c:9106 #, c-format msgid "" "\n" "Symbol table '%s' contains %lu entries:\n" msgstr "" -#: readelf.c:8822 +#: readelf.c:9111 #, c-format msgid " Num: Value Size Type Bind Vis Ndx Name\n" msgstr "" -#: readelf.c:8824 +#: readelf.c:9113 #, c-format msgid " Num: Value Size Type Bind Vis Ndx Name\n" msgstr "" -#: readelf.c:8881 +#: readelf.c:9170 msgid "version data" msgstr "" -#: readelf.c:8923 +#: readelf.c:9212 msgid "version need aux (3)" msgstr "" -#: readelf.c:8950 +#: readelf.c:9239 msgid "bad dynamic symbol\n" msgstr "" -#: readelf.c:9014 +#: readelf.c:9303 #, c-format msgid "" "\n" "Dynamic symbol information is not available for displaying symbols.\n" msgstr "" -#: readelf.c:9026 +#: readelf.c:9315 #, c-format msgid "" "\n" "Histogram for bucket list length (total of %lu buckets):\n" msgstr "" -#: readelf.c:9028 readelf.c:9098 +#: readelf.c:9317 readelf.c:9387 #, c-format msgid " Length Number %% of total Coverage\n" msgstr "" -#: readelf.c:9096 +#: readelf.c:9385 #, c-format msgid "" "\n" "Histogram for `.gnu.hash' bucket list length (total of %lu buckets):\n" msgstr "" -#: readelf.c:9162 +#: readelf.c:9451 #, c-format msgid "" "\n" "Dynamic info segment at offset 0x%lx contains %d entries:\n" msgstr "" -#: readelf.c:9165 +#: readelf.c:9454 #, c-format msgid " Num: Name BoundTo Flags\n" msgstr "" -#: readelf.c:9174 +#: readelf.c:9463 #, c-format msgid "" msgstr "" -#: readelf.c:9256 +#: readelf.c:9545 msgid "Unhandled MN10300 reloc type found after SYM_DIFF reloc" msgstr "" -#: readelf.c:9416 +#: readelf.c:9705 #, c-format msgid "" "Missing knowledge of 32-bit reloc types used in DWARF sections of machine " "number %d\n" msgstr "" -#: readelf.c:9720 +#: readelf.c:10009 #, c-format msgid "unable to apply unsupported reloc type %d to section %s\n" msgstr "" -#: readelf.c:9728 +#: readelf.c:10017 #, c-format msgid "skipping invalid relocation offset 0x%lx in section %s\n" msgstr "" -#: readelf.c:9752 +#: readelf.c:10041 #, c-format msgid "skipping unexpected symbol type %s in %ld'th relocation in section %s\n" msgstr "" -#: readelf.c:9798 +#: readelf.c:10087 #, c-format msgid "" "\n" "Assembly dump of section %s\n" msgstr "" -#: readelf.c:9819 +#: readelf.c:10108 #, c-format msgid "" "\n" "Section '%s' has no data to dump.\n" msgstr "" -#: readelf.c:9825 +#: readelf.c:10114 msgid "section contents" msgstr "" -#: readelf.c:9844 +#: readelf.c:10133 #, c-format msgid "" "\n" "String dump of section '%s':\n" msgstr "" -#: readelf.c:9862 +#: readelf.c:10151 #, c-format msgid "" " Note: This section has relocations against it, but these have NOT been " "applied to this dump.\n" msgstr "" -#: readelf.c:9893 +#: readelf.c:10182 #, c-format msgid " No strings found in this section." msgstr "" -#: readelf.c:9915 +#: readelf.c:10204 #, c-format msgid "" "\n" "Hex dump of section '%s':\n" msgstr "" -#: readelf.c:9939 +#: readelf.c:10228 #, c-format msgid "" " NOTE: This section has relocations against it, but these have NOT been " "applied to this dump.\n" msgstr "" -#: readelf.c:10073 +#: readelf.c:10362 #, c-format msgid "%s section data" msgstr "" -#: readelf.c:10138 +#: readelf.c:10427 #, c-format msgid "" "\n" @@ -5411,392 +6179,382 @@ msgstr "" #. which has the NOBITS type - the bits in the file will be random. #. This can happen when a file containing a .eh_frame section is #. stripped with the --only-keep-debug command line option. -#: readelf.c:10147 +#: readelf.c:10436 #, c-format msgid "section '%s' has the NOBITS type - its contents are unreliable.\n" msgstr "" -#: readelf.c:10183 +#: readelf.c:10472 #, c-format msgid "Unrecognized debug section: %s\n" msgstr "" -#: readelf.c:10211 +#: readelf.c:10500 #, c-format msgid "Section '%s' was not dumped because it does not exist!\n" msgstr "" -#: readelf.c:10252 +#: readelf.c:10541 #, c-format msgid "Section %d was not dumped because it does not exist!\n" msgstr "" -#: readelf.c:10430 readelf.c:10444 readelf.c:10463 readelf.c:10781 +#: readelf.c:10719 readelf.c:10733 readelf.c:10752 readelf.c:11070 #, c-format msgid "None\n" msgstr "" -#: readelf.c:10431 +#: readelf.c:10720 #, c-format msgid "Application\n" msgstr "" -#: readelf.c:10432 +#: readelf.c:10721 #, c-format msgid "Realtime\n" msgstr "" -#: readelf.c:10433 +#: readelf.c:10722 #, c-format msgid "Microcontroller\n" msgstr "" -#: readelf.c:10434 +#: readelf.c:10723 #, c-format msgid "Application or Realtime\n" msgstr "" -#: readelf.c:10445 readelf.c:10465 readelf.c:10835 readelf.c:10853 -#: readelf.c:10928 readelf.c:10949 +#: readelf.c:10734 readelf.c:10754 readelf.c:11124 readelf.c:11142 +#: readelf.c:11217 readelf.c:11238 #, c-format msgid "8-byte\n" msgstr "" -#: readelf.c:10446 readelf.c:10931 readelf.c:10952 +#: readelf.c:10735 readelf.c:11220 readelf.c:11241 #, c-format msgid "4-byte\n" msgstr "" -#: readelf.c:10450 readelf.c:10469 +#: readelf.c:10739 readelf.c:10758 #, c-format msgid "8-byte and up to %d-byte extended\n" msgstr "" -#: readelf.c:10464 +#: readelf.c:10753 #, c-format msgid "8-byte, except leaf SP\n" msgstr "" -#: readelf.c:10480 readelf.c:10570 readelf.c:10967 +#: readelf.c:10769 readelf.c:10859 readelf.c:11256 #, c-format msgid "flag = %d, vendor = %s\n" msgstr "" -#: readelf.c:10486 +#: readelf.c:10775 #, c-format msgid "True\n" msgstr "" -#: readelf.c:10615 readelf.c:10719 +#: readelf.c:10904 readelf.c:11008 #, c-format msgid "Hard or soft float\n" msgstr "" -#: readelf.c:10618 +#: readelf.c:10907 #, c-format msgid "Hard float\n" msgstr "" -#: readelf.c:10621 readelf.c:10728 +#: readelf.c:10910 readelf.c:11017 #, c-format msgid "Soft float\n" msgstr "" -#: readelf.c:10624 +#: readelf.c:10913 #, c-format msgid "Single-precision hard float\n" msgstr "" -#: readelf.c:10641 readelf.c:10667 +#: readelf.c:10930 readelf.c:10956 #, c-format msgid "Any\n" msgstr "" -#: readelf.c:10644 +#: readelf.c:10933 #, c-format msgid "Generic\n" msgstr "" -#: readelf.c:10673 +#: readelf.c:10962 #, c-format msgid "Memory\n" msgstr "" -#: readelf.c:10722 +#: readelf.c:11011 #, c-format msgid "Hard float (double precision)\n" msgstr "" -#: readelf.c:10725 +#: readelf.c:11014 #, c-format msgid "Hard float (single precision)\n" msgstr "" -#: readelf.c:10731 +#: readelf.c:11020 #, c-format msgid "Hard float (MIPS32r2 64-bit FPU)\n" msgstr "" -#: readelf.c:10814 +#: readelf.c:11103 #, c-format msgid "Not used\n" msgstr "" -#: readelf.c:10817 +#: readelf.c:11106 #, c-format msgid "2 bytes\n" msgstr "" -#: readelf.c:10820 +#: readelf.c:11109 #, c-format msgid "4 bytes\n" msgstr "" -#: readelf.c:10838 readelf.c:10856 readelf.c:10934 readelf.c:10955 +#: readelf.c:11127 readelf.c:11145 readelf.c:11223 readelf.c:11244 #, c-format msgid "16-byte\n" msgstr "" -#: readelf.c:10871 +#: readelf.c:11160 #, c-format msgid "DSBT addressing not used\n" msgstr "" -#: readelf.c:10874 +#: readelf.c:11163 #, c-format msgid "DSBT addressing used\n" msgstr "" -#: readelf.c:10889 +#: readelf.c:11178 #, c-format msgid "Data addressing position-dependent\n" msgstr "" -#: readelf.c:10892 +#: readelf.c:11181 #, c-format msgid "Data addressing position-independent, GOT near DP\n" msgstr "" -#: readelf.c:10895 +#: readelf.c:11184 #, c-format msgid "Data addressing position-independent, GOT far from DP\n" msgstr "" -#: readelf.c:10910 +#: readelf.c:11199 #, c-format msgid "Code addressing position-dependent\n" msgstr "" -#: readelf.c:10913 +#: readelf.c:11202 #, c-format msgid "Code addressing position-independent\n" msgstr "" -#: readelf.c:11019 +#: readelf.c:11308 msgid "attributes" msgstr "" -#: readelf.c:11040 +#: readelf.c:11329 #, c-format msgid "ERROR: Bad section length (%d > %d)\n" msgstr "" -#: readelf.c:11046 +#: readelf.c:11335 #, c-format msgid "Attribute Section: %s\n" msgstr "" -#: readelf.c:11071 +#: readelf.c:11360 #, c-format msgid "ERROR: Bad subsection length (%d > %d)\n" msgstr "" -#: readelf.c:11083 +#: readelf.c:11372 #, c-format msgid "File Attributes\n" msgstr "" -#: readelf.c:11086 +#: readelf.c:11375 #, c-format msgid "Section Attributes:" msgstr "" -#: readelf.c:11089 +#: readelf.c:11378 #, c-format msgid "Symbol Attributes:" msgstr "" -#: readelf.c:11104 +#: readelf.c:11393 #, c-format msgid "Unknown tag: %d\n" msgstr "" #. ??? Do something sensible, like dump hex. -#: readelf.c:11123 +#: readelf.c:11412 #, c-format msgid " Unknown section contexts\n" msgstr "" -#: readelf.c:11130 +#: readelf.c:11419 #, c-format msgid "Unknown format '%c'\n" msgstr "" -#: readelf.c:11174 readelf.c:11196 +#: readelf.c:11463 readelf.c:11485 msgid "" msgstr "" -#: readelf.c:11291 readelf.c:11813 +#: readelf.c:11580 readelf.c:12102 msgid "liblist" msgstr "" -#: readelf.c:11294 +#: readelf.c:11583 #, c-format msgid "" "\n" "Section '.liblist' contains %lu entries:\n" msgstr "" -#: readelf.c:11296 +#: readelf.c:11585 msgid "" " Library Time Stamp Checksum Version Flags\n" msgstr "" -#: readelf.c:11322 +#: readelf.c:11611 #, c-format msgid "" msgstr "" -#: readelf.c:11327 +#: readelf.c:11616 msgid " NONE" msgstr "" -#: readelf.c:11378 +#: readelf.c:11667 msgid "options" msgstr "" -#: readelf.c:11409 +#: readelf.c:11698 #, c-format msgid "" "\n" "Section '%s' contains %d entries:\n" msgstr "" -#: readelf.c:11570 +#: readelf.c:11859 msgid "conflict list found without a dynamic symbol table\n" msgstr "" -#: readelf.c:11587 readelf.c:11602 +#: readelf.c:11876 readelf.c:11891 msgid "conflict" msgstr "" -#: readelf.c:11612 +#: readelf.c:11901 #, c-format msgid "" "\n" "Section '.conflict' contains %lu entries:\n" msgstr "" -#: readelf.c:11614 +#: readelf.c:11903 msgid " Num: Index Value Name" msgstr "" -#: readelf.c:11626 readelf.c:11706 readelf.c:11774 +#: readelf.c:11915 readelf.c:11995 readelf.c:12063 #, c-format msgid "" msgstr "" -#: readelf.c:11647 +#: readelf.c:11936 msgid "GOT" msgstr "" -#: readelf.c:11648 +#: readelf.c:11937 #, c-format msgid "" "\n" "Primary GOT:\n" msgstr "" -#: readelf.c:11649 +#: readelf.c:11938 #, c-format msgid " Canonical gp value: " msgstr "" -#: readelf.c:11653 readelf.c:11745 +#: readelf.c:11942 readelf.c:12034 #, c-format msgid " Reserved entries:\n" msgstr "" -#: readelf.c:11654 +#: readelf.c:11943 #, c-format msgid " %*s %10s %*s Purpose\n" msgstr "" -#: readelf.c:11655 readelf.c:11672 readelf.c:11688 readelf.c:11747 -#: readelf.c:11756 +#: readelf.c:11944 readelf.c:11961 readelf.c:11977 readelf.c:12036 +#: readelf.c:12045 msgid "Address" msgstr "" -#: readelf.c:11655 readelf.c:11672 readelf.c:11688 +#: readelf.c:11944 readelf.c:11961 readelf.c:11977 msgid "Access" msgstr "" -#: readelf.c:11656 readelf.c:11673 readelf.c:11689 readelf.c:11747 -#: readelf.c:11757 +#: readelf.c:11945 readelf.c:11962 readelf.c:11978 readelf.c:12036 +#: readelf.c:12046 msgid "Initial" msgstr "" -#: readelf.c:11658 +#: readelf.c:11947 #, c-format msgid " Lazy resolver\n" msgstr "" -#: readelf.c:11664 +#: readelf.c:11953 #, c-format msgid " Module pointer (GNU extension)\n" msgstr "" -#: readelf.c:11670 +#: readelf.c:11959 #, c-format msgid " Local entries:\n" msgstr "" -#: readelf.c:11671 -#, c-format -msgid " %*s %10s %*s\n" -msgstr "" - -#: readelf.c:11686 +#: readelf.c:11975 #, c-format msgid " Global entries:\n" msgstr "" -#: readelf.c:11687 -#, c-format -msgid " %*s %10s %*s %*s %-7s %3s %s\n" -msgstr "" - -#: readelf.c:11690 readelf.c:11758 +#: readelf.c:11979 readelf.c:12047 msgid "Sym.Val." msgstr "" -#: readelf.c:11690 readelf.c:11758 +#: readelf.c:11979 readelf.c:12047 msgid "Type" msgstr "" -#: readelf.c:11690 readelf.c:11758 +#: readelf.c:11979 readelf.c:12047 msgid "Ndx" msgstr "" -#: readelf.c:11690 readelf.c:11758 +#: readelf.c:11979 readelf.c:12047 msgid "Name" msgstr "" -#: readelf.c:11743 +#: readelf.c:12032 msgid "PLT GOT" msgstr "" -#: readelf.c:11744 +#: readelf.c:12033 #, c-format msgid "" "\n" @@ -5804,313 +6562,468 @@ msgid "" "\n" msgstr "" -#: readelf.c:11746 +#: readelf.c:12035 #, c-format msgid " %*s %*s Purpose\n" msgstr "" -#: readelf.c:11749 +#: readelf.c:12038 #, c-format msgid " PLT lazy resolver\n" msgstr "" -#: readelf.c:11751 +#: readelf.c:12040 #, c-format msgid " Module pointer\n" msgstr "" -#: readelf.c:11754 +#: readelf.c:12043 #, c-format msgid " Entries:\n" msgstr "" -#: readelf.c:11755 -#, c-format -msgid " %*s %*s %*s %-7s %3s %s\n" -msgstr "" - -#: readelf.c:11821 +#: readelf.c:12110 msgid "liblist string table" msgstr "" -#: readelf.c:11831 +#: readelf.c:12121 #, c-format msgid "" "\n" "Library list section '%s' contains %lu entries:\n" msgstr "" -#: readelf.c:11835 +#: readelf.c:12125 msgid " Library Time Stamp Checksum Version Flags" msgstr "" -#: readelf.c:11884 +#: readelf.c:12175 msgid "NT_AUXV (auxiliary vector)" msgstr "" -#: readelf.c:11886 +#: readelf.c:12177 msgid "NT_PRSTATUS (prstatus structure)" msgstr "" -#: readelf.c:11888 +#: readelf.c:12179 msgid "NT_FPREGSET (floating point registers)" msgstr "" -#: readelf.c:11890 +#: readelf.c:12181 msgid "NT_PRPSINFO (prpsinfo structure)" msgstr "" -#: readelf.c:11892 +#: readelf.c:12183 msgid "NT_TASKSTRUCT (task structure)" msgstr "" -#: readelf.c:11894 +#: readelf.c:12185 msgid "NT_PRXFPREG (user_xfpregs structure)" msgstr "" -#: readelf.c:11896 +#: readelf.c:12187 msgid "NT_PPC_VMX (ppc Altivec registers)" msgstr "" -#: readelf.c:11898 +#: readelf.c:12189 msgid "NT_PPC_VSX (ppc VSX registers)" msgstr "" -#: readelf.c:11900 +#: readelf.c:12191 msgid "NT_X86_XSTATE (x86 XSAVE extended state)" msgstr "" -#: readelf.c:11902 +#: readelf.c:12193 msgid "NT_S390_HIGH_GPRS (s390 upper register halves)" msgstr "" -#: readelf.c:11904 +#: readelf.c:12195 msgid "NT_S390_TIMER (s390 timer register)" msgstr "" -#: readelf.c:11906 +#: readelf.c:12197 msgid "NT_S390_TODCMP (s390 TOD comparator register)" msgstr "" -#: readelf.c:11908 +#: readelf.c:12199 msgid "NT_S390_TODPREG (s390 TOD programmable register)" msgstr "" -#: readelf.c:11910 +#: readelf.c:12201 msgid "NT_S390_CTRS (s390 control registers)" msgstr "" -#: readelf.c:11912 +#: readelf.c:12203 msgid "NT_S390_PREFIX (s390 prefix register)" msgstr "" -#: readelf.c:11914 +#: readelf.c:12205 msgid "NT_PSTATUS (pstatus structure)" msgstr "" -#: readelf.c:11916 +#: readelf.c:12207 msgid "NT_FPREGS (floating point registers)" msgstr "" -#: readelf.c:11918 +#: readelf.c:12209 msgid "NT_PSINFO (psinfo structure)" msgstr "" -#: readelf.c:11920 +#: readelf.c:12211 msgid "NT_LWPSTATUS (lwpstatus_t structure)" msgstr "" -#: readelf.c:11922 +#: readelf.c:12213 msgid "NT_LWPSINFO (lwpsinfo_t structure)" msgstr "" -#: readelf.c:11924 +#: readelf.c:12215 msgid "NT_WIN32PSTATUS (win32_pstatus structure)" msgstr "" -#: readelf.c:11932 +#: readelf.c:12223 msgid "NT_VERSION (version)" msgstr "" -#: readelf.c:11934 +#: readelf.c:12225 msgid "NT_ARCH (architecture)" msgstr "" -#: readelf.c:11939 readelf.c:11962 readelf.c:11984 +#: readelf.c:12230 readelf.c:12253 readelf.c:12332 readelf.c:12390 +#: readelf.c:12467 #, c-format msgid "Unknown note type: (0x%08x)" msgstr "" -#: readelf.c:11951 +#: readelf.c:12242 msgid "NT_GNU_ABI_TAG (ABI version tag)" msgstr "" -#: readelf.c:11953 +#: readelf.c:12244 msgid "NT_GNU_HWCAP (DSO-supplied software HWCAP info)" msgstr "" -#: readelf.c:11955 +#: readelf.c:12246 msgid "NT_GNU_BUILD_ID (unique build ID bitstring)" msgstr "" -#: readelf.c:11957 +#: readelf.c:12248 msgid "NT_GNU_GOLD_VERSION (gold version)" msgstr "" +#: readelf.c:12266 +#, c-format +msgid " Build ID: " +msgstr "" + +#: readelf.c:12269 readelf.c:12425 +#, c-format +msgid "\n" +msgstr "" + +#: readelf.c:12305 +#, c-format +msgid " OS: %s, ABI: %ld.%ld.%ld\n" +msgstr "" + #. NetBSD core "procinfo" structure. -#: readelf.c:11974 +#: readelf.c:12322 msgid "NetBSD procinfo structure" msgstr "" -#: readelf.c:12001 readelf.c:12015 +#: readelf.c:12349 readelf.c:12363 msgid "PT_GETREGS (reg structure)" msgstr "" -#: readelf.c:12003 readelf.c:12017 +#: readelf.c:12351 readelf.c:12365 msgid "PT_GETFPREGS (fpreg structure)" msgstr "" -#: readelf.c:12023 +#: readelf.c:12371 #, c-format msgid "PT_FIRSTMACH+%d" msgstr "" -#: readelf.c:12080 -msgid "notes" +#: readelf.c:12384 +msgid "NT_STAPSDT (SystemTap probe descriptors)" msgstr "" -#: readelf.c:12086 +#: readelf.c:12417 #, c-format -msgid "" -"\n" -"Notes at offset 0x%08lx with length 0x%08lx:\n" +msgid " Provider: %s\n" msgstr "" -#: readelf.c:12088 +#: readelf.c:12418 #, c-format -msgid " Owner\t\tData size\tDescription\n" +msgid " Name: %s\n" msgstr "" -#: readelf.c:12108 readelf.c:12121 +#: readelf.c:12419 #, c-format -msgid "corrupt note found at offset %lx into core notes\n" +msgid " Location: " msgstr "" -#: readelf.c:12110 readelf.c:12123 +#: readelf.c:12421 #, c-format -msgid " type: %lx, namesize: %08lx, descsize: %08lx\n" +msgid ", Base: " msgstr "" -#: readelf.c:12219 +#: readelf.c:12423 #, c-format -msgid "No note segments present in the core file.\n" +msgid ", Semaphore: " msgstr "" -#: readelf.c:12306 -msgid "" -"This instance of readelf has been built without support for a\n" -"64 bit data type and so it cannot read 64 bit ELF files.\n" +#: readelf.c:12426 +#, c-format +msgid " Arguments: %s\n" +msgstr "" + +#: readelf.c:12439 +msgid "NT_VMS_MHD (module header)" +msgstr "" + +#: readelf.c:12441 +msgid "NT_VMS_LNM (language name)" +msgstr "" + +#: readelf.c:12443 +msgid "NT_VMS_SRC (source files)" +msgstr "" + +#: readelf.c:12445 +msgid "NT_VMS_TITLE" +msgstr "" + +#: readelf.c:12447 +msgid "NT_VMS_EIDC (consistency check)" +msgstr "" + +#: readelf.c:12449 +msgid "NT_VMS_FPMODE (FP mode)" +msgstr "" + +#: readelf.c:12451 +msgid "NT_VMS_LINKTIME" +msgstr "" + +#: readelf.c:12453 +msgid "NT_VMS_IMGNAM (image name)" +msgstr "" + +#: readelf.c:12455 +msgid "NT_VMS_IMGID (image id)" msgstr "" -#: readelf.c:12353 +#: readelf.c:12457 +msgid "NT_VMS_LINKID (link id)" +msgstr "" + +#: readelf.c:12459 +msgid "NT_VMS_IMGBID (build id)" +msgstr "" + +#: readelf.c:12461 +msgid "NT_VMS_GSTNAM (sym table name)" +msgstr "" + +#: readelf.c:12463 +msgid "NT_VMS_ORIG_DYN" +msgstr "" + +#: readelf.c:12465 +msgid "NT_VMS_PATCHTIME" +msgstr "" + +#: readelf.c:12481 #, c-format -msgid "%s: Failed to read file header\n" +msgid " Creation date : %.17s\n" +msgstr "" + +#: readelf.c:12482 +#, c-format +msgid " Last patch date: %.17s\n" +msgstr "" + +#: readelf.c:12483 +#, c-format +msgid " Module name : %s\n" +msgstr "" + +#: readelf.c:12484 +#, c-format +msgid " Module version : %s\n" +msgstr "" + +#: readelf.c:12487 +#, c-format +msgid " Invalid size\n" +msgstr "" + +#: readelf.c:12490 +#, c-format +msgid " Language: %s\n" +msgstr "" + +#: readelf.c:12494 +msgid " FP mode: 0x%016" +msgstr "" + +#: readelf.c:12498 +#, c-format +msgid " Link time: " +msgstr "" + +#: readelf.c:12504 +#, c-format +msgid " Patch time: " +msgstr "" + +#: readelf.c:12510 +#, c-format +msgid " Major id: %u, minor id: %u\n" msgstr "" -#: readelf.c:12366 +#: readelf.c:12513 #, c-format +msgid " Manip date : " +msgstr "" + +#: readelf.c:12516 msgid "" "\n" -"File: %s\n" +" Link flags : 0x%016" msgstr "" -#: readelf.c:12615 +#: readelf.c:12519 #, c-format -msgid "%s: the archive index is empty\n" +msgid " Header flags: 0x%08x\n" msgstr "" -#: readelf.c:12623 readelf.c:12647 +#: readelf.c:12521 #, c-format -msgid "%s: failed to read archive index\n" +msgid " Image id : %s\n" +msgstr "" + +#: readelf.c:12525 +#, c-format +msgid " Image name: %s\n" +msgstr "" + +#: readelf.c:12528 +#, c-format +msgid " Global symbol table name: %s\n" +msgstr "" + +#: readelf.c:12531 +#, c-format +msgid " Image id: %s\n" +msgstr "" + +#: readelf.c:12534 +#, c-format +msgid " Linker id: %s\n" +msgstr "" + +#: readelf.c:12609 +msgid "notes" msgstr "" -#: readelf.c:12632 +#: readelf.c:12615 #, c-format msgid "" -"%s: the archive index is supposed to have %ld entries, but the size in the " -"header is too small\n" +"\n" +"Notes at offset 0x%08lx with length 0x%08lx:\n" msgstr "" -#: readelf.c:12640 -msgid "Out of memory whilst trying to read archive symbol index\n" +#: readelf.c:12617 +#, c-format +msgid " %-20s %10s\tDescription\n" msgstr "" -#: readelf.c:12658 -msgid "Out of memory whilst trying to convert the archive symbol index\n" +#: readelf.c:12617 +msgid "Owner" +msgstr "" + +#: readelf.c:12617 +msgid "Data size" msgstr "" -#: readelf.c:12670 +#: readelf.c:12655 readelf.c:12668 #, c-format -msgid "%s: the archive has an index but no symbols\n" +msgid "corrupt note found at offset %lx into core notes\n" msgstr "" -#: readelf.c:12677 -msgid "Out of memory whilst trying to read archive index symbol table\n" +#: readelf.c:12657 readelf.c:12670 +#, c-format +msgid " type: %lx, namesize: %08lx, descsize: %08lx\n" msgstr "" -#: readelf.c:12683 +#: readelf.c:12766 #, c-format -msgid "%s: failed to read archive index symbol table\n" +msgid "No note segments present in the core file.\n" +msgstr "" + +#: readelf.c:12853 +msgid "" +"This instance of readelf has been built without support for a\n" +"64 bit data type and so it cannot read 64 bit ELF files.\n" msgstr "" -#: readelf.c:12707 +#: readelf.c:12900 #, c-format -msgid "%s has no archive index\n" +msgid "%s: Failed to read file header\n" +msgstr "" + +#: readelf.c:12914 +#, c-format +msgid "" +"\n" +"File: %s\n" msgstr "" -#: readelf.c:12943 +#: readelf.c:13086 #, c-format msgid "%s: unable to dump the index as none was found\n" msgstr "" -#: readelf.c:12949 +#: readelf.c:13092 #, c-format msgid "Index of archive %s: (%ld entries, 0x%lx bytes in the symbol table)\n" msgstr "" -#: readelf.c:12967 +#: readelf.c:13110 #, c-format msgid "Binary %s contains:\n" msgstr "" -#: readelf.c:12975 +#: readelf.c:13118 #, c-format msgid "%s: end of the symbol table reached before the end of the index\n" msgstr "" -#: readelf.c:12986 +#: readelf.c:13129 #, c-format msgid "" "%s: symbols remain in the index symbol table, but without corresponding " "entries in the index table\n" msgstr "" -#: readelf.c:12991 +#: readelf.c:13134 #, c-format msgid "%s: failed to seek back to start of object files in the archive\n" msgstr "" -#: readelf.c:13074 readelf.c:13150 +#: readelf.c:13217 readelf.c:13300 #, c-format msgid "Input file '%s' is not readable.\n" msgstr "" -#: readelf.c:13096 +#: readelf.c:13239 #, c-format msgid "%s: failed to seek to archive member.\n" msgstr "" -#: readelf.c:13168 +#: readelf.c:13318 #, c-format msgid "File %s is not an archive so its index cannot be displayed.\n" msgstr "" @@ -6411,11 +7324,6 @@ msgstr "" msgid "can't redirect stdout: `%s': %s" msgstr "" -#: resrc.c:284 -#, c-format -msgid "%s %s: %s" -msgstr "" - #: resrc.c:329 #, c-format msgid "can't execute `%s': %s" @@ -6450,11 +7358,6 @@ msgstr "" msgid "preprocessing failed." msgstr "" -#: resrc.c:631 -#, c-format -msgid "%s:%d: %s\n" -msgstr "" - #: resrc.c:639 #, c-format msgid "%s: unexpected EOF" @@ -6545,12 +7448,12 @@ msgstr "" msgid "Invalid radix: %s\n" msgstr "" -#: srconv.c:1732 +#: srconv.c:1733 #, c-format msgid "Convert a COFF object file into a SYSROFF object file\n" msgstr "" -#: srconv.c:1733 +#: srconv.c:1734 #, c-format msgid "" " The options are:\n" @@ -6562,7 +7465,7 @@ msgid "" " -v --version Print the program's version number\n" msgstr "" -#: srconv.c:1879 +#: srconv.c:1880 #, c-format msgid "unable to open output file %s" msgstr "" @@ -6607,95 +7510,95 @@ msgstr "" msgid "missing index type" msgstr "" -#: stabs.c:2122 +#: stabs.c:2129 msgid "unknown virtual character for baseclass" msgstr "" -#: stabs.c:2140 +#: stabs.c:2147 msgid "unknown visibility character for baseclass" msgstr "" -#: stabs.c:2326 +#: stabs.c:2337 msgid "unnamed $vb type" msgstr "" -#: stabs.c:2332 +#: stabs.c:2343 msgid "unrecognized C++ abbreviation" msgstr "" -#: stabs.c:2408 +#: stabs.c:2419 msgid "unknown visibility character for field" msgstr "" -#: stabs.c:2660 +#: stabs.c:2679 msgid "const/volatile indicator missing" msgstr "" -#: stabs.c:2896 +#: stabs.c:2924 #, c-format msgid "No mangling for \"%s\"\n" msgstr "" -#: stabs.c:3196 +#: stabs.c:3224 msgid "Undefined N_EXCL" msgstr "" -#: stabs.c:3276 +#: stabs.c:3304 #, c-format msgid "Type file number %d out of range\n" msgstr "" -#: stabs.c:3281 +#: stabs.c:3309 #, c-format msgid "Type index number %d out of range\n" msgstr "" -#: stabs.c:3360 +#: stabs.c:3388 #, c-format msgid "Unrecognized XCOFF type %d\n" msgstr "" -#: stabs.c:3652 +#: stabs.c:3680 #, c-format msgid "bad mangled name `%s'\n" msgstr "" -#: stabs.c:3747 +#: stabs.c:3775 #, c-format msgid "no argument types in mangled string\n" msgstr "" -#: stabs.c:5094 +#: stabs.c:5125 #, c-format msgid "Demangled name is not a function\n" msgstr "" -#: stabs.c:5136 +#: stabs.c:5167 #, c-format msgid "Unexpected type in v3 arglist demangling\n" msgstr "" -#: stabs.c:5203 +#: stabs.c:5234 #, c-format msgid "Unrecognized demangle component %d\n" msgstr "" -#: stabs.c:5255 +#: stabs.c:5286 #, c-format msgid "Failed to print demangled template\n" msgstr "" -#: stabs.c:5335 +#: stabs.c:5366 #, c-format msgid "Couldn't get demangled builtin type\n" msgstr "" -#: stabs.c:5384 +#: stabs.c:5415 #, c-format msgid "Unexpected demangled varargs\n" msgstr "" -#: stabs.c:5391 +#: stabs.c:5422 #, c-format msgid "Unrecognized demangled builtin type\n" msgstr "" @@ -6710,12 +7613,12 @@ msgstr "" msgid "invalid minimum string length %d" msgstr "" -#: strings.c:647 +#: strings.c:651 #, c-format msgid " Display printable strings in [file(s)] (stdin by default)\n" msgstr "" -#: strings.c:648 +#: strings.c:652 #, c-format msgid "" " The options are:\n" @@ -6756,7 +7659,7 @@ msgstr "" #: version.c:36 #, c-format -msgid "Copyright 2010 Free Software Foundation, Inc.\n" +msgid "Copyright 2011 Free Software Foundation, Inc.\n" msgstr "" #: version.c:37 @@ -6770,7 +7673,7 @@ msgstr "" #: windmc.c:190 #, c-format -msgid "can't create %s file ,%s' for output.\n" +msgid "can't create %s file `%s' for output.\n" msgstr "" #: windmc.c:198 @@ -6791,7 +7694,7 @@ msgid "" " -d --decimal_values Print values to text files decimal\n" " -e --extension= Set header extension used on export header " "file\n" -" -F --target Specify output target for endianess.\n" +" -F --target Specify output target for endianness.\n" " -h --headerdir= Set the export directory for headers\n" " -u --unicode_in Read input file as UTF16 file\n" " -U --unicode_out Write binary messages as UFT16\n" @@ -6821,7 +7724,7 @@ msgstr "" #: windmc.c:262 #, c-format -msgid "A codepage was specified switch ,%s' and UTF16.\n" +msgid "A codepage was specified switch `%s' and UTF16.\n" msgstr "" #: windmc.c:263 @@ -6835,7 +7738,7 @@ msgstr "" #: windmc.c:1116 #, c-format -msgid "unable to open file ,%s' for input.\n" +msgid "unable to open file `%s' for input.\n" msgstr "" #: windmc.c:1124 @@ -6898,6 +7801,7 @@ msgid "" " -O --output-format= Specify output format\n" " -F --target= Specify COFF target\n" " --preprocessor= Program to use to preprocess rc file\n" +" --preprocessor-arg= Additional preprocessor argument\n" " -I --include-dir=

Include directory when preprocessing rc file\n" " -D --define [=] Define SYM when preprocessing rc file\n" " -U --undefine Undefine SYM when preprocessing rc file\n" @@ -6910,12 +7814,12 @@ msgid "" " --no-use-temp-file Use popen (default)\n" msgstr "" -#: windres.c:678 +#: windres.c:679 #, c-format msgid " --yydebug Turn on parser debugging\n" msgstr "" -#: windres.c:681 +#: windres.c:682 #, c-format msgid "" " -r Ignored for compatibility with rc\n" @@ -6924,7 +7828,7 @@ msgid "" " -V --version Print version information\n" msgstr "" -#: windres.c:686 +#: windres.c:687 #, c-format msgid "" "FORMAT is one of rc, res, or coff, and is deduced from the file name\n" @@ -6932,40 +7836,40 @@ msgid "" "No input-file is stdin, default rc. No output-file is stdout, default rc.\n" msgstr "" -#: windres.c:847 +#: windres.c:850 msgid "invalid codepage specified.\n" msgstr "" -#: windres.c:862 +#: windres.c:865 msgid "invalid option -f\n" msgstr "" -#: windres.c:867 +#: windres.c:870 msgid "No filename following the -fo option.\n" msgstr "" -#: windres.c:938 +#: windres.c:959 #, c-format msgid "" "Option -I is deprecated for setting the input format, please use -J " "instead.\n" msgstr "" -#: windres.c:1051 +#: windres.c:1072 msgid "no resources" msgstr "" -#: wrstabs.c:353 wrstabs.c:1916 +#: wrstabs.c:354 wrstabs.c:1915 #, c-format msgid "string_hash_lookup failed: %s" msgstr "" -#: wrstabs.c:636 +#: wrstabs.c:637 #, c-format msgid "stab_int_type: bad size %u" msgstr "" -#: wrstabs.c:1394 +#: wrstabs.c:1393 #, c-format msgid "%s: warning: unknown size for field `%s' in struct" msgstr "" diff --git a/binutils/po/da.gmo b/binutils/po/da.gmo new file mode 100644 index 0000000000000000000000000000000000000000..d870bd7d598a80270f45f25159aa80605090f434 GIT binary patch literal 69960 zcmcG%34mNhwg2DjWY~9Py#zuMNDo<9LkLVZ2wBNY0vIv$O!rKhndu(7d$NcNxZ(y1 zZnz+df{KDWF8JJ@h~fq)f=@xzL{a47hVb0}pYJ(!m+t8a@%P@plRMvAd)29`Q>RW< z-FjsIo!^?{x7SX&+!5d_56$JCw{tG{#B|x_ax1%XxdXuqK%8>@;8Ebqz=`0E;ECW@ z!TrGBgU5sa0uKX^pO?$+0d|23w+xKHA@C6JjlulEV7?oijQt~^(%W@@F1H(aG`KG~ z89Wj^9h?HL0hRBUfoFp61{Z=4fd_#{Ey(3Mz>~ql!Lz|>;99T~yc*meyc1M8zYQJ> zJ{oW*BAbMHGN|$`1Lc1mI2Ejc&ja5L&ICUTigb^IO6Raep3if^Ntj1K*}n}`dA<(L z0)Gf9{@u^@{2vDPV7?SozCQy}q}+X={2z24GyoTav%!}K^OwNAFh33M3hunv>AVLx z2lKI@!e1KjEug~R1D*u#bbc;J(Q~svm1h%pGI$%PeE&R{_gdod%>z%t{$=24;AevQ z_n^`_cB!X-A$TI@DyV$F3p@k-VKDE#%ZUkFXWlfe_fC&4M;^Dgp!H4jw0%Rt$egZ*{jZkXQ#s(wBg-0uP9 z{|})0!(JDAd1iroU_Kx00M~#DUjXx98GIi2cJKi36X3z%H$cVzQ&9Q+7pVSw;`5!) ztN`Uc67YIZ`TQ)X^d1fNzXRuC-g~Xr`vu@JnBM^I1>O!S++6{;fal5o3!p7{A$TbG zVNmIP4OIPY0mZML0gna`zQplVQ2y3{Cxe?o#eX}fa{U;T|0hA!``$0~_~wB}VqOiZ z9_!%Y;MJhY{{e6Y_=A8uu5`OiUSAnA6?V#%Weo*oL zBjD76=W8{18up`LC-^Z?{OPBl=n?hia#TgG1}gvG0acH=KCkyqa2m!QQ2D(IJO}&~ zI2ZggsCZ`;y?^wAr(%8ssQAAQ9swRy^6)dkqc9girSl3HQL%2OfS|F1G}HA$SJ(5m5HO0?z>_ z4?4ZpgKB@*f#-uC1l6vd0(S;?8}k0XC#d#xGPno03RJs#VKCQ&`DI`S_HO}?1>YO& zzYZ$Chrpe{p9S+{pwin4P5}P_9tQ3nWKS0s%u*)51fGXE{pvt)xJPRy?YQMLFs-K^Ls-G>O$}^$n;iiD1+nJ!! zzW|KDp@44$RZq8rivM$<{M`+zULFJY2mck!``5iZ)4~0)Uks|eYrzA+I;ir#22^}E z1-u;;J?;wTdqI`|VNmHj9qbQmc)Sxqxt|P*&KH1I&!F;m1*rOb8+bf;7pQvpC8+dw zANBCZfXd%oQ1!V6+!q`HMW?GkrE?RgbiNeK4}%K#G^}h>jQL(r@%{ol2>fTj12?+)gn;LO%J&*j?Y#;rf7b@QJ-B}tRKMQ}&IYG$ z%H{R}i=f(315~n2ZE1*^7k}&Ke*Rsr{B*(wWD2L zv40h)di(?^KJ^t)@q80J415F>eVzr?fA_q?^LHpHdQAZ%a2}|7>jPD9uM6foz~z`9 z1m}X2UL48?o{G5vs{h{xik?3NmELbb(d!?e>f?x)IL-!D-itu-m0?izc`c~$HwX96 zgUbK+K*jSocrv*AOP!8qfhx}mQ2AX8D*so46Tw@9{kOpg^M422_hs&X26zPaYrvzx zdcf;~{U^XnvHu>p5Yr~0MZb4}hk%~}4+XyqsvKJb{vA|3?SGZ?=egh< z%=1C{zYfy7X z^7AcF`Fs>q`}k`x@BIqT$MK--&juB44XAo4g9`T&P<-vJpz7}?a5DHAQ2F{9sQ&*1 zsB-Q9N{{D6Q2Cn+o(*0Co({eTq|4+U1eMJyy+UJ39aC#gMs{Ne>M&L5=M6d#?Jnsznc~EqD2volR z1&WSS-st89V1#)XRQ%U~qW4Xp+W(!wd><%!{3e+9y~fj-462?Nfohj!Q1o~ysPt|G zRUh9B?!O0*#k}LS?*DjD>6{6weXRy}2g_gt)eAHP`_b!M(sLcoO&$a0d7>Q0?MTQ03a;&5lz+`MUs|30?)B27Ve;`cHrnc<6N= z&l#Y~GYE0>3UhW2!|382SfVsDLdpHnO zy-WsGp1I(@;8IZZy9As7ZUhemuL}4!a39RKfuiFVL8bc>P~rX=@X)t<|CyQ0eXZF3chcCU`n{7}yB**MdstMo{^`9aQ@FgGYjof<|ZXd6@UT(ak4-qQ_YQ zUjV8-UjfShwV>$peo*m!1XTOH6I8s9fvWF+1w8P*9{*HO<(m&q244Uw+$%x#!`s25 z!5@K&=P#hjeZWm#kCQ;z&jFR+=Yv*WP;|K#RC#X#mCnaO)&I9Z+5a3=zMcXV&o1wC zf5(Dyp93miOF`oYpz`%zQ1RalDt|u)74Kg`#k2SO9jAduU_KwzI4}^*Zv++YBj7RM zx51;pCqU74kDEQ+qd}GT+<+H@hhrWD)!tqc%pV1at0dEa>7pVN*2deyAg86As{k`LZp6>%d(dkSu0(*n~D?p`p z8#ojEIjD3GxP>uz2mFFc|C(F99&QFB%y)sufj6{L#e%FDDZxc8X zd=;p2eh5^)zYdCiKL(Y~pFq{a?jQF0n*#2J`D{@A=v;6LxCT_ee;F8o9|O+5t6O{j7f%3Qa$DBUrg38CGpyIzCTmXImTm?Q3iav90 z_j%<-0pA7A#r_fSZ1BiCoWEQG?uGdVa98kFQ2h3GunW8!oCWUwai_x^@Knr~2lI!( zHJE=E>`(rL%Nv7W9{ZcYCE$Ia;ydz_p09PF=>LB36!7Pu(mD83p8omZ37C7q`QRJD zIpBTZY2e_fF3@Y9Sz}euwcX>No67Yqf;=dd` z82m7J4)_)Dba00+Ih|*N2Vq_XP6pS5&ja5C9tM5{JOKO#xC{7jz(+yRaSN#UCj5uj z*F2CS=Y~O*>-aA_{nvu(SFZ$*2CoVBw+H(l2Yd`vzyDou-}@`xUrqxjVZR1cd0q^5 zfY*bH_eN0d_d}rC-5ube;LpJQ!KcAPzzJXV{(lU3BIbFZ%25gS*MUm^Qvn|Y#Xp_} z_W&n;&HZ3n@A zDEoQfv0!g7zZ#UkTfjNsw?OreUBBVd7#?IdQjzl2Y3{C8>o8zHh2X1b5P;` z0Zs>}-0gUAz}JCl-(Ljhf`0@r1!sKI`Q>%sRLqZoD)%1uczk(KbiF9xD?#P!%iT?8$gA7Kd5|v7gT<7-*-CA1r`1>Fb`e{%Kz=4_{77Y%D>kS zoE|g56_|^l=<#V#`FRA~4czTMueW``voS9M&jVi#s-1oxRJr!J-`!V%ivK!rFYr!q z75EKM?dH%2yx*S&DxI@H`R@ni|MlR3;0@q@;Ozmw0`7tNeo+1&3HCev(B<@lz@4x^ zESQf1#dnScCxB;xs-JTM_JQiZFAL_kgKAfw0u}!Qp!&-*UP8l<@f-o`0oTo&xb+9`wVy(*zsRpuaiK9KMULwTobSl zR6839=9hx%zpn??FFy&24iAA!@A2UNcTn*i`%^E^9PoLVSAwGVWuW@cb>NBMU7*VU zn}ECi%>5q+DxY&f)$_%m%25T?-mU>fmrn-!AAw5e&!GJ8{fP6G<3N@BVo>gbpz`;s zV7?JlI-dj8ULOFD0)GP@0`B&xhd&yWc?M|hI^YYz!?CXiycSgW+rT5iZ-e3kzX8tz zXZ+mrR|VBiUj?dtz8O^ge+X2)-UW(2_kyzjE2#MPc#N?NoC>NPKkpY#kGbG<%)Q`g z;Ps&R+P&aD;IrT^;Dld#`ul*Q!z57Y%>~simx1zs5h!}C2i1;V4$c5S0L}s*1Utcw zU%8(B4DcMxuLISN?gdW<9|9+Wdu?&LO%J#bJOcaY2iyoAjrlF0%KK?>5_k`&d_D=P zo_5>nI1v=x&jLm7i$Rrl6R3813#feD2}a<5g38AhQ03YE*G{(+K&87pU?tdJ11kPc zf};EP0zMJ2<2ODoPXSlr{#sD&>?ff5=M$jv`!uNV`#tXTJPA~NF9sF=rJ(5gVsIDm zc5p8EX;Ae46R7&w>$l#|js#^t9aMWf9~2#XLDB7HpyIn8RJd<|O8-Zo#Ro>1_xhdZ zqZ3s4g`oOPZ?NAK@LEvm+ybiI{|9&h_yD*Vob-g-SHV3nzcQHL1Wv~MK~VMaT~PFY z1XO+P@Ow`$0!9B*!Fk{s@NDn~a3lCIsB|xQ()m$8sB$&H6Tnx3dGHQUeCTK3H1H`< z{ou&|cD}nBRDP}nMfW>FrTajz{}XsD=EI+IIqq!mc+6E$_4+nY>3j%OejWr>kG}&& zw;liBaK+$=hryXa3(=lHN zs@|>!MW4@rr+_~NMW6lu>hVqoWnLQavS5ETsPG>E)z0q&70>TLrMLex9`007bnO9^ zpO=DaM;`?b27esfpA6M9jB>XMzuaqT4?I<8tZY zpwgWPiY`k*#d9gB`Y3~u{QfxbD9q=BimwbF3ceD2 z9{3(mbi5O^_5@DByiaZi%m3-1=u-j}{_Wt=;3q-Fdq1f3{s5{RJMFN8m195fNX*B9 z5jYQ2x_zMf*NZ`gdo9=jz6(@2ZUI$~p9Ph_FN2ErVNi7cHK_FW-f;)(AD!Ugm=}R3 zfxV#BBdC7zEl};~N$?Qxu$^`=`ppCtZZ)XtUF9ns4>p|7W&7jKtSy1`751ar# z3d-N(p!)B#pvuv)vzreBRlegv#d|ua_Pz{MKKekVdj%*uT^-zS0Tu2pQ2pn7pz3=I zsQ7o^#p!qeDEdqTF9a8X%Eyht{f^*%52$kf0^A$?Cn$RCwd)QxKAr)peVq-eewKiW zrwHy0j)H2(F9OvrZUq(34?xKikAf=4F1vaD_6HT;k)Yz63W|>Ng8gbx{tKY!R{@pY zOF{MHYe9v(85G^`0*#M=^7kYtI{qt|58B=1J04ty{VY)Vx(XB>Zv~b9=Rvif?|{nR zpFq*|U%`Fi1W)%AQ1n_39s^zmD%=}D<>OPJ;{7(LcKTCL<=Fy?K7Rz2@54JhpQnNf zw-i);^?@qiOF;Fzw}EQ6Ujdb$r$D8Dz#i`ZBvAQX466LAgMB}!c&`N2p56|Mo_Bz% zpD%-=)AvBNzh4FWXM_FjdwM>P0u|30pu(*L#oyO~D$grGK234Mpy+eH95twI#;@cO3>Mt(` z75`13+Rc|irTYM=`uI)2zksT*9ry8c4+Ljn?gW)?FR1*F1bhuBy4?sW-cN%n_dUV> zzk>ZAK-K>)`|eA6F3|5m%($u{{fZ1Gxys8jtT$Vk-Fv4?_wf7IPtK5Cq%@2N`AM6D0z-|<`PiE{I*qtW-!R`voRm}Qb!&43M$b2); z!MMFg27bTi{hi>>_&GL&IgD{gUTL_|xxkQ0?#2Jg4z| z9k=**67NUj{s%1143=t}M`8bC@S8lZ3-SB~yET}f#r#%q9?w!9^$q<-vG2jpk9hVE zVPwC6_a9?78@vj<6+6vuet`K^Jb&bU4))&%YdpvBuHOUTI^6X;4SXipuK@pp=P`H6 zodaHv`v7&@bqK12l0L@r1uHT z-^KnVn9t#v&HJ6;p*&l8-^jCp_n(6w0rh(u@9zfB1@*fs*k2pWvYW^I3$Xtk_ns@zv3!cb>7?yhz_z=%rp08nk5Y+D; z!n}g#WS%9MKa2e^@A^ILV1G{!?A{$Yq?hv5HzFdxoyJmyI}@8tcL;H=>9 zR^E@~{nv!;0AB+x#7@6`0-oi@+?xWv3V$bs_m75nf-!e9=Bt9?E4*L9^WT_P64wbl zyYW1X-B&`~mj)EC{$2>DakCHm{{%nE)5Wtp<~M`?1HP5;FX6eI_iur}$Nn+i#phdp zmuD<~#rxmz|G4b%|8AZF&m%myVD*04^XtTqelN#9{#~7UpN#v9FrN>;3Eaw~F()7V zFa+nW#=INt;N`q;!u~hlF(I;3!S%uK{n$T%`5Mfx*cK8}08w_Aa7CH)Fn=_m#XCc=9~@)v@p8eHj@4?!o*4%x})v zN#2ueuiw9d{eIxETiM?o3AaDbf?)Su+?QwKh`nyX&m%mq#o}J@!QkgY@MD| zJ^sCz_f;6a!t)@{r!ZGSxV4y1;r;78tFV6!&z`)07<>b6zvulj9{sKp(%w!5&*CZK zC;ojZegWTt{U<}1H}HO5c)v5_{{sBI5A$Z88Nq%R{QW!=k6y3D?#sAez(dlxB_Xbl zV2*fy8oL+pzK0z7Jc;AY-VYbX+ z@UttAez)O%YIuKRz#BstxlhIJvwF$=-iP}yG5=@q|3q+`i~Sm&D&`-9H}UAV+#$C+ zdHz5Ma}#(T&*yQQ4xYmEIsE@e@cSolr%V}TJs&?G1HS`)1pFuXGoByt{4}JsW5Dl$ zug3mJ{LKt@Meu9bJ&#Af!+2iD`^jcPe&+pb-v0%@hi4-1A12JDye|%ZevNr&-pk<(eEWZpT+IJzz<<}0q@W7UJLF6;M=hK40dOLJMrw!doNhWZ25Z?cr_qXFdf#(389v=O+@Z8Ar zZ5hJvV(>|xI|%b9!VdD>7UJ3^)XB@R`yqZ#0*?S+6x=_~`@KB+O~CJqaX*9ie}ery zujBpG;HW%=-*MpHJiR>M#_fZ_{{6(cH_syMJ{RI&!TZ;E;@>xT*$uZ_dH%-x+j09i z&la8wv3ogqbEch4v-6uzWufT5K5XTEKzdF3j?YF#7<#`f6@$WKTKFsqE z?C<7@f?EeP-hln_Jip=js_cW?wY=(g1pdG3ueo=CKf|ow`8;3e>A<{^=XAnN!@Oq* ze>}J|&r;m}9KtNb{dV5_uz#FqLa^V7_eHoZ|YTo|~ zya_xAJc?&J&qsOmJDWIm4CR*jOw3)l?Zf+_y!U}0!u)b@9nXQhzXd!Fd;5&H^A-U=L-nY?RvnHe)n|8fjI~@lseXw&tgaMG{pCuj7}eW_8`n9BA+q1vRi(>E zOZ7&%G7yc_sspvca8#}|O0|(%iNCYS$R)WBd0o-pUoSN#EH4a~$XFD0Hwv{zRP9fK ztuGadrCNQqN36eiTS^wA<)g#BrJ6!CO2ef}gRMjk) zPc&Q@86j8ZwP$@PT2QXxsao3{^%Q!CN>RBUm4-(en>!U(8xKjqMP+;|+v5dn@sI@U zuMQ1WH;OX#jpat)`cgeA)JjoxL|H8i$sg5Z#qC!b{ngrVp#jBkm@}z9R~6V*>sw#m zKyIn7O$yOfua|~o5oOJ z@}&A?Wq)}!+CW3HBq@2Ee1CP+Xc0BmlM}_Rl$KW;s+Vlxrk_snsIm3YP^mHiP+-|9 z?v6BP@Mf?Ba^SJ`Xpr_?(-Fd&M_ zch;BZO8Jb#W%B9#A!-=uTke9+r zO3rK$6)&``T0*lrO{BR-(liLrlE$_@Z+EP9?=#PlcIZ9hdS30lE4b6C)`V6UbJWc8ZQ{7~t|`QFk? zrbQzoebcBPIB*i_qMzdweD4cyTiWZAC zHD@}XFKy}@8ZDOcF&*a&mFtbU(SmAaaw95j8mTgHxLusC!pJ&b7#d1~k+%EAG8yIQ zTb+!2X~0UgZP*nRcx*^Z$)^Kl2%67t-dt2qY%VUQp3zz*g5Ql4YITM!^Q7+T0Vm~W zoDS23iQ#opae@I%+kTLipT<~o&gW?ud04oOUG9ayUBzNlq)f3xT^u9iHSjfjdEk1Z z*e9YChRSf55ZDZ`Ju$iJXd^mjPGxSKU_F`x_b<(r-}tw>P6KjVv4b#jlxiVNZ=qhw zE8%F4UiCINS_OxUhNxsnFi@(LY7E}RNbbgaLr|(Bn!_It6VkK6wpG1yLw zgVY#>Yx#cbWOEGWMk}zYm5U{+*g{5Bqd7GP3dvXuEvXFj^`$9n&eujOfdm1%*H<@2 z8`r~6E2UD=a@Jdl@D@_gz`Hq`W02HX_eiO)+`l<03?YG4AbYf6=~CnGo1>8`G>HSZ z?`8|#I`l9XCzCESPDgvru9nZ+7?QX8w^m}=jk9Ww-Z%m)40$XMk5F;Z94b*{^fGpD zu2d_Vhb1skn_jl)pS%f(secB6Atq9Q+}d43ro%;xW*?Yt#$vVb;t@ zQjRQ!)evUQ3<2rjz14b&BsQc;FwDy`^dxEB8r@7hdSi_iLoD**0lNNO#vBSe zpKyKE;gLdvu4J7eq!?OoZ=r8+W1&_=+LR|7^zo>%vYBcNh=`myS4ulo}0cyNOWn0pMRS(=1wX5~?4sA0Ss6K)ydOi+=Wl4&PU zyxJ!TDs`;(UPd?bR_r4|!bL(Rx`~WLwtu_};Z`@*b!^b6%nXCNmLO%kx-(%)tCbXE zdFmkqYZEFfuE49B2%l;FYlt$mtT+pf%*o*j>W4Lg*r)jT?wVXP8maeiKe4F+jtmB$09@ z1TPVM+q|hzX~UlS30A1LG;`6dT~kj4q>$!%03ygR#FR zTvDcn&Ov1JvDvE!*-Cxc#mf932@c{dkL1ww+h*91>QG7{+Ha!)PU~K=-JiVTPtk{YBx)Qy3b}5XPo#JyO2#n+H1p*3d@nx4gK?I$OI4wm;xXiK0^LF=ZqRlRQ6b ze5`b}SZq7#*y*QknoU=$A?f0CnzeOtDU@PyQCdB@rids!@T$@VY$%7#KjoN9+>%5m z6=i9YGM}MMSzQ^dR5z-Bp6+(Rr97&HnrHiv*dAFYS+BQQBon<0;ccY zRv4^MFq_JxtGJ<1K{Q#aI_ll5dWQGAxA{Y`rJxumdgw!@qKn*>ihnkq6W*@ZSrX*n=XOpv77t|UjxmviXQKHEg zQ6Wq9O*|f+#$@v0u`M;#>bA2L_v~%@4UBAjKd}cjjd`da z+NBxtBrmH96?C0V{@_HttCXr{l81K)Fxea*-yN<>Ap`s8w&&Mt!9s$*;!? z8;<6UT7ak>D@Lp2%-DEwTTa|23S-9G7t~5*)foyBa-k_6MF>kUJzeLj+Jh;xa1eCB zDP5pC9#?dqM0ZYYL)=+#a{1~|YVUf%#2k-A!2$(!XG$hBDWA&P|4BsAiPEvr*DS`k zvqjR;!&#V2nwaGaP~)^Iuhtc|*27?oxT7UGWiVKcNJum`g*?==V#QK--H4`a!UQpu zs4fn%pyVpnFn??rG!p{F-HK_@P<4QjJZWEJysTmrFcp5t!DwZ;S}gZ#RElS6bb(Pg zepED_m2%x3R++q>(eyLH9SCa)=`d^_eYq$EsCRanU=y#(g~5JIrn;G)i;uYwPd;3; z1+{H?ppkU z1&}tIR*u|JP)3+ppzuX^p01~f@me#nzJ}j;#x&_KFKFkbF5k;i!<(m1j>t}#)yQZSPdy*hu2#lU3b^##J}2zu>G z5%D6I882I6XfirqNQTxXw@Bzczl0?&JIQbk{DpBuykAjWQQ{QK?on{*=gv zEQit!M$5(eNdx>*yla<_3CGfJ!(^_teJrdtE>S#i}ii_l}lf67YUo3wH)%173RDFtEQe64Bn71q{m zO0XfwlGH>wK;;>zE+o% z|5OdKw%X)9Cz>oQKyI(i+W2!&TNK;^@M#n`vB4+N(U{9Mkv2 zduDS*GW}E%m#@v#Szc=SzQKr{IT~o=q=M9uNvfud5pt~vtl6T|w6uwZSjiny)?1xh z(c*Z>k87GUF=e{3Vk)2zragKcDt}EAYG@i%r`p`2I`P5Zw&2M3rfieSqa{Sy6jaRW zHf^e45<4q2;=72VVZsFf@=s=!bG4+gb}+Jdf7JNmK~7RC5RC!@yo77-|8x;UE2TnWU@s#Gx-ngi+~m{_6D7BVo0b}Sk!W^lzKsT`3t)h21@ z8}-b}&#;DWkwBX^N}G{V7>1~4(}7$2WJ5r?LX18^Nak`8ze$s<#Z(*cMj8a|L24ho z((U5KO6oRRE5cHeOQI=-PIR5pxCH&JXpss z)uPC=YRmlDh5}mca;XNRX6+oqV=l8@taWQ))4sH%eTRnM$B1PUS2m53+0gp!-IkD; z7&dwE!r8{lWR?b#i}$MLj#a<08Gepg)aui{Rkb}&ggzdD=fb- zH>TfqYF82benL)Mi${OpV3YbN6`T7?^e0K&MYk5$&|7a68L_WAqWQOoRI>^*PmFhp z*tR0Vb{eC~oWjIADe3999^PcPf!#e)QrM`4ixOhfm$MG-hEXT)RligEv!nS1ZL4A? zBPF+_zz~#RDnXM6U)UJqV_~gU)i@;Ii`d;sreR;sb1+3dv-Q}P1sPa#4&>qbYzwuF zjW^{Hyw*xKAfP{lsgcpT3&Im8)hC)qIt)EMl38R3EBkmHmi%b~mPWp8G!~A5s6zFH zO!gvP`luGFVRqDKWUy_sv>Jvf8=a$=2<~iDQisXfC);h~k=iQOVw9719;A%hcyP9I zh*-YZ8*Li;BtNB1rM}Ua3ee4fpWwr@LI|^LZaJx&Zyt#wO^3A2 zCAKN4JrMzYuR2gcTf*XWviCJJ%%=Y8)zKQlcc_Ti-rJD3cG0?!>_hdTIrw95VWm1c zus-T#c7Qsb=|RDqOw?81Z<~6cr};Fx(-qcqfaDoN;+Rx#eRM>7GjO)DH{cJ& zl#WZEgdPn`VRh-P$QT`@#ANkSZE;2_aNV|&*SbXLH+mf?)Ow{&^f>|?U&22`61$DP z50}}e3WYUQ30+>(&YbP(j+P@EjrOg#9+^v)XRDJutxMr0U$^+P;t(3G$WyXVQh$K`tF>bT*}+bgRypoZ2$jBCcdC^v7>f-uZD z-)6A2bx5_td2oBi&t7kp^G`g{cN)?tQ1d7npMw;0ZJd&ct)_$pT5QdHi8n;9AF&w5 z^AqC}yi3)_BI! z#q(Bmt-9DGm*ri{7KVVv^2dwS95n$`PBN*PeHhs~6p;!>11*k1fplM&_9taW(M&Ye zN`HA^l%2*B9u!lK32HKtXAlh~&=IJtizZJku5fZO=a?|L`La;s4XrVgYV1;PjHXn~ z%@1lGD^)zcQIBenVa3NM)5y=>Fk{jD)Acob=%l$Y2CEZvE%>Tcs6SI{`l^kE}`J4>HKLuJo#Qy&i7n=D~SY{MrEGp&+T zVv3tM<37ATjE&5ceFv=eU_=Fk)&|3B%-qq=grg(zhNJ9IYC(PCtMn=4!ljF%^X%LX z(}jf>Eu0@sS!hC*A4alnvCxO6Zk=kQCLhv?$77LilgPztoOHw!?P6=y zzK?Y&w^+O&9oCTs*b4*gM?jjz;M9Nn9qsjS6eUp`{+u9_`S-Lhbs%?zJjK?}>dGT1+ zEGrJ0j}X zZk<)ig8|te8lCWncdLidE+;{w zxrEDCEJwVN-f?PfdC$5z3*O<9z7_FZE`04KR>^^B*5J4hu1rKpak z3~d~Ni}qL7iJ02Q!-UOZl9!&Yp4Fr%Kc=Y}<7wrpIG&N3$I}wa%2jbBBQ=j>jE9S? zV9^w`NVRpF`cX=8Px_efwo)1kLh5BHV^SY%-dh=~$ zkwOZN9&5rna?3TKjQOo;-clObM!eWpk8fvkW6C9hvuO(BO(zV(+fHCRB5oUDx^cx* z@ZQO)#k}qXYLtDd?UV>P#y+}L+^>5MFRVZ9Bk37rh}(Sz0T% zwUt#9>U;uiw)7n7E^Gr$oeZ#vnWY9|)JU&G1vZRWyv&@JGsZK5OR6!RmXDY{X%Zpd z8*5e4RIHK|)5~rbB-orbWfGfR z?I=_JqG;C4b*G*zF(MgZax0Jni81AC%9yAs7m4LW+`XADI2=nSM5;OD3fD?9q2ho( ziMm$EiiL_o9ECN&K#wLqeJRR^+)8@wgMCCqH4&z31-%#m|VR;E8;i72*Jd1IeOhTuEcw|b|Aq_h@Ug7+qStAkYw zmqt^lDd79m&VF4i3s9OVDsIBW&5TA znj*#=*HxtAxXS`cvzsNdVqr+aY}d$0t{ZtzsnL+FLz(cJ=}6cs@tDf33bE87(Ry(J zuu<6L1G1uxX-qsQpK?94b19cRIjuHx5?3u6tqR?!HaeoUJnIc!VzpxFMC!wwz3EVR z`WhM|M)jn-huv9iPr2K&1yt+Nmj#ehePawNF6jexP)Xggw}ggW`#T!RszT^F#v2M9 z^rl|Au&EYIuF`Tq9ihA-J)L&~G#SBL-0!sx+e6-AG@GO4>sE$ScWWO7Q01TWE?g>kL;nGfIdFrJsy%a<%)apCgWjMyf7YKe7q#o8i-MtUcrpzUH& z#fJTKuEE-2#&c0}7U%AK?|LlD`qFhfIX|0FbJ%o_5mdgabnU3m1~C=?$k=a{7&p#( zw3#~_4E=1g_20CF=9uX}a&G4(<%P+ipmZ{jMyG~iEjfH3L5(1rm!JY?zm}SbKQYUfF@_EAY{S-Qn?gi$oRq$kU~ZV_hW!Q>nfuDdCX$YcCgY)8 ziBrlZv^Mc^NwijLLqx$2t2B)!4Kw&`S`(H z43+qG>GH{F5SVZ<4)9?N);cznI&)!Vkk4RfKB%mvy7{2qp>1&Jh><1uRlfCfq!z~U z6xf=tO`Lt4v!zfq=Ok>{w!kG*+|?vmo}HcpX3fTIyF@QideJRcpB>@e9I)rGX}U(Pmnd z(<*CM&+=1Gp>`N|i)JB>w=W!Nu%j9@#}mEGHE=f77EMDDm;eoL((ExbAhRyl`?Ap* z*%eIjyV5(EpeUZ9&Bir}$P{G~d`(2Cjxb8u4pzqe;xQe$-u~h`>D<<_Zo959x=A8< zX2rD0nNg;Vv$bRo;%lExieYQ>iY4o+COJYXgS+g7KXgI zS);4c1i&zqq%*s4yy*S z%cZG{FIsy&SwTH!ErGK@vktL!#r$=v)^t&Gu@=`lOo-TsK$}vGnc!wEI}?P zVG9{A&RtrfrM~^UD(E?hbard9T9VhY62qmw3li@&po3;3QeO)M@iB^K#mqSfmh!2> z$yeC08RUduX}$kB0$TZfC6rDP0-9xJ=x=sW*}eR%iLlVv$f0(xH%{769iqzNn@D$B zex$>MrB``qa1O$SfEo&Lh{Ivs#a&BRoV)NMoJZ(F(mSh6(b~}OFA?)?w&}nxpCLQAHW8u_zh9#tKiQSS3$Ja$k zy+Qs0?QMp3O>VvP^%B^TdG##s8u$7-@#UtOL1P6cC2n` z&R@J6$;;I2uU>^^T5^2qM^hRjoH888D_Ph|4k=79%j8oF+kB|a*3#G-&={C5)zi!o<7}xe#%4%uCPe1rNi#`2 z89J>=Y&Klz%SX*2`0!k5NEB>Gft7TaSb&mxq+<~nin;DP0L~$ znY8-bwiEZWJuSt3`f7ruxNWjD3Il=AwwW0or?0nJ>rNU;>L=4WGL^Bh#x}JO3$hG@ z3LjvSdM`7u=GYX$5vwRLnHHmW-)1kGJjUMo>Fhy=Ym!3n=~MFHi7m9vkz--uGEEY% zRG>ZrnZA*ZzM-V{l502HY_Y88jAN13h<&t>y+M3ufRm*fD8z&ULu;9snPwbu&OSMr zLwf>mwZ%Fg(c!^%He{?zyrwhOMSaPZgK|OEfE(GMkPd|+P%3C|pEnyd#`Ve;2v?8& z8{S&HnxroBq_cHZfmS7Kc+rg8`EHsE4aHXTYIfGO!vIC`B=c$BXk%e+8y;M6z{e(p zzj%L$T1T$mKI`RkQq(wVHnfx&qhe`8nJoy`M1mV4VXIAOjRUpn=tvlra#=&zo)YZJ zG}g>(>?lPM8#jm8gkQ3drpY#ofvB_8J#l@V;5A=2EfZN|ORr=P5>M3ee*v88oc zQ~D%UG3%1FP}-DpX+x6^C#5B-MOmLxu@~3&t2BZ~RfQ3a&%SAsE4dU0Q+N}-^czrYRmhLzlMW-F8VQ>grye8*8blTP|#dO|sXt z%{F0}zG%^rQy(ct37d818f;;CzR2yKn%21)SrSsKA=*MpJoR%56S)+Np>Oc+j2j^m z4RE56Xm3y5AEV%5HNI64Mc1GONWQ_6Z1X{R&3-<#qIQI9n9nJxm7zGWukmfJjz$|f z2ckGr8NAsPFL5xA;>(zpcvYtB$R3Uz_A4d(HDn#rsxCw5nchroYm<0hn|Usix)K3c z?#Wej{?PTRwvh=L#=aThw8Xi2OF_=NQau-sH-2ETP`r%JEtxzsVJi$2q~lh9vQJ$4 zbXl34&0%=-9UA*BF;is3s#b5s^<27fEs>(6=n#4Na*ux$22aS*@*8&aE?$tn8!Jm( zOv<;hA+fRy#CnO^NMF(wLL>HpIyS`l(imeMcEfNXXNELtGp1eFBn_Hh-TkEw^l51_ zqKHg@py8Vpm;EHsu$hkM;)bU^GCh=|}8>*Q34zCKYkE z?PJ!Wd=djof=8(L(Po1)c2)_VBi|U56&1q@LJlOSz8fgl*vPVIJj`YKZsGjG(G7qwD>?-LN%MDJ+)MsWemR2p}J?qkQF%HS<95S>N|27BECukuzyAfTZ2)nHZaW8qu{6f^~r=Z%u-a^+zfu6OFr@WYWepjIbI1KJW6;D`V}=MwM&q z5S?H)kyyqHZ7dTmc1hEY*EyEQX}HC_dCg`eqiK!whb9jOHe=~;DD$mlHZ32h>HTYJn?S*g3de(g*JxJ;W;>lQx#0C3U zS=p2iV_g%4oD;DnEOJbu86FdHSg{kQ6W_NEJ2rvfOC$1F$8`J(m6%DNQ>#dP+wu`} zGVz|cI@1VXM)}iNVN<^A)u9cvvX%3RPih!WXxOM2WyasE{-mpC`HUHaO!=E^W;WS~ zwxMt#^Qmv!P?(vSx@3Y9E*qt!&XhH%OQ#WB&VF-!M@Au%dk5lo=Vo!gvmrb&l=^d- zclHo(%9_J2iFgc1oRWoSHmV>mN`A08G*k*gL+k_A6vwYUFHHue7EPHswT7Z(_FHk>})C^{Mi_9k_HwUJZ*w76$Gye&_!LkKf&JM^8#!?v?k+Y`~)>7SqAL-=N%2l+MF(ooTLrI81ENJ_Vl z(bA$NRm(eUF!?|&GbX8#oCS{dYUhi--kM)r%&&<*L&iQ$4#aW8$;{4~(>u?Y&dm$j z?vh_t=QAbwd2D*g_f%&S{XjnUdd@&)w6j_p=vcX;C-1U7>mCb`h-XJLr_Y$4pD`mp z{gi0NjM=khorrll9`k%D5JsN$ho_VCGiOB8&zOD6Deg~uD)T+;m#EV>wJmgs&O&vU zQRT90E1ENi@f`grZ|a0Db32xXk1FMRN(IhEFJMKlzMjvQ62ss*_BTJk&J=b~bruIx z@0=7WbSzuEY+*`=8J*KR=A)uO0L}N9)ZIXNcM{)7C|AxjmX7>+R=HlypMLr&XXIz3 zo|Rpu==p^j!Jzf*=yYT`?sW*4$7sml^O-CibhNQdu72rQ?QKyS{jj~gCFC|dB(eBb zzqMWZ{1m~1Fx#jO@x^$mXY9o>8!BXqbKly*Wo~y%b zy6K2ooXq>8GGA8Spe;aS{kOV#fMdZXt6$6E3yJR5#5P62m zrebWmNhWT*M6!xGFKs_deqH3^72yY-$01;oCq%lCahtzFA+-UW@64hRgowp=N4Xt-8O-;Mjy^*XR^v+*tD{N;G_w1~%h9M6IW!rj4cny(noTlGx;g#ZODkjS1GwRG!oOzZG}rRojt^ z_T6!8z@GNqHo1$&`%luHx7mu|S+z#NKmS5Y%^Bax{-G0fH)?zvB>kN?I;f^kWuz{P zB-%#N`Dl*#EJOHlatDs4Z$8&q==(pvhK3g2bPY}889uV4CKCTv!fonV+mOqpThnW3 zvN_g87j15#;RcF@gLR1=j|Ya7aHz81m{IbZR7iK6yE4-7tWKt!%h*{b18Yn(`}(yj zEL*R&NpdjAg&}@BO&U=MKmPqRU2v2QWZ#Bb4pn9PyodcixT1!3+5gOC;`pq%4YEF_ zQ=4Mg3{;{Xy&gfwk{joqnh*n13MR08I0Jq=_MVyzd;~r7n^)sH9zN$UYZkws(>+-OmiFP;w# zps|L`&wYQ51>g|)7Ku_8Fo+;x%HiYS9KEqGfQFlLN|p7cA{1y&>ACK(IrkZjM-8aT zsLEgIq~c+F{RYj!sVU0IFdGd%qr(YQigX8BmYoAp29TU%x}OWh<9ls*4X*VObRbM9 z^lACYrAi#bI30L3gF755?zobJ;;w7rZ_)|J>A-wl&>Jxs-bNQ5=gON%MF=Av9~e_h z3p_VuTf0B>+5OR?H)Lzy+kfSav)2&UaJwsSR*Itp8C9_Ji-;+vn<%l7 z&$SM%RBX8yXWL901{SkxxW_a{if zmP6e1DFYcoF(L=onUK^6(w829d+lt&OY z+!U6uybyTo)j8UI9(b6@s-aI-8lZ=^!uKgv2-|vZPTaICT{s4bj^SowFU?U=TN{4T zfReU9?(Gz+FrRp57P3MH2h}*o{1#ot;qCagoI;#Mgghv#@l_uxgfotNVa{`g52?3a zn$toaG!c9WtPPt8!CS7)@j=`Q<2+0<5@WTgy^=YU?#+n@WmA}WS;oCMCo{Np+R==f z-<_kmjF|B=_Ng+|7(?4}X^trskW-!i2dQn`t8?15&XeN-InbcZ%{ksYW2rgYI;#?5 z8sW+wzcmLL`nhk-Q3GuLspm=lwHYb`E^S%Tjy~7vQ@KT4DA$>HO%}>Hb`Tq#m!tI6 zZ_QS|`;kUz^I)lEWi^lf10cQmtl7V4AVsEJLkuB;?GLz8pI%5Nv&xd^XicmsSLCs6 zxc-JhYz>+>-JV0kCu?+A+KrcItUp(n5l@>7bmW$cU6OQJ<5jY{(^R^)h?DArjB*+) zwc{(kJclVuv8;s0T%FT0)Yt_h@FDuVW)DoakU4Ebk|NJ1ckbBDIh03UwX<-n*QW3M zM$Nw!`h=b4!+h*qXOlOcvpId&Jw<9`MBK%;J4_6fwnackADHP-By>Dw7f-0k24`C-nmGpI6>W}lZ$k` zQ!V!CV!i5Wtaef6qG)wd+r9MBOIr(|jQWVOzL9OMGI@=!(UAp8t#+|R>Cd+LcrM*H zi(cs$`MsPzT1xNJuLxDeWZC;6oFb6VZjA{a3K3Q)#2KfVjEBHWtnRL+r<&n(ut@mbj%k-;tHKkv@8gZqc-=e zBPXFy50QAp%ejrBdxWaw*N!PC7Z4a%Zp)L~L}6?>3F;iZeb{i5n%AcnC1gXblR_-F z<)|oJqC;J4+mg>^6J5H83xAl1Vd5Fk-<~>jmOg z;Tvk^z7WyRuhPjUgXM&IaAfJU&6j8-3-&z*b*P18$Psw`vijSEaYT# zYX$z}t7`E~!WVWlt-zDS3?p>&Qi=u}rbis8*Xkh)PRR&OR>KuK$r?iQ%{oa5(|+Y8 z(8LQ-#)f>?4Qee$6;O`tlf_C=ME+F^oEu_w&@+iu>#aJ_y3T|$4v}1|lZ+UOhtg*5 z)yW1C(-u>MRdi|^=%-Y|>fvCclTrkxLk$e@EvB#pqz^QYDJnkw6Z(FwPIHfH7os`9 z0tu3lCD0~vtM29i%TT$7m4#T)OB+S@P5u5P;{l>mi{I8hMnJ#8CVQz)v`ClgY{#8C zZ31O;qOr|6S$4%neP|$As2MMRnOu2pEMkk0x2E`7qe~lOQ)Uu_Gy2soB&MUW$se}= zsNy4YB4H*W+q`&t-wv;|eNT8h{D!@|nSp#v%ARh^)jGXeieMAAX}7bIC5NE4b+wL# zgUOXpSkX<_`W6OG-0OB7XU=Pv+wD56BsBe6st;izEaj!XyveC8Zf6`s;h_nsmoONv zY`R_Nd_Fe!@5IQ-r_g&8<#xo}e7lZQhy$ke25gpn0IXMYrCAvTg!apE=L}2ns3cv- zWLayzYR9IIOi8pP;Vjm6KF0#Tg=oHRXQ;42^Y;ep&dftJFECHdx9x0buS_zZ%~$P^ zXx+K8^d|9LJA8p-xUM>Gch`;wfla~6H9=(*m0+R^+M9hKG-oFXbXgsE&swPQ<6<)->huq7ZW~3*O*+0CWkaSQ!_WBklWY-MZqivl zT5FUC5P7uB>Lif-Qy&`j%}yMN(Y|&`l7nNW003zqS>0= znPbtqAXBO&H|ez4ifzSP#>N%5b7Gf@*Fd`;m~y~k)bF8Wf7324>oBHdD48g_#4pc5 zhfr{y>l*cVM$H~HU7n-9UC(pqr4t&ZLEu}7D&AyR?-J-TY!^6Q(!+6VB=79qCk z6*Y~9%I6PsWM12)r~sNGjnF=WD@oTU(aAiH!An=>sGn&tc6ViNEIk)QE`s(`Q3Iz^uNkPHgIOHn$1GD=5<<8`TzG!d*G( z8W^;6O@H0y!BiS@TA^P{dcO9pVOO4@J4-VRHJW1bX`zhTI9P`}a>go}yW|NA?)+riv2&{rO>&Imi zre$i=rC_F-P*mGQ-BbkqxUx9Pc z<$)Y}HEoNXRM%TCswN7={W+o+1SdBff$%#-7SUi!8`F;w;nB{VmhNnyE_fyCW%cwACw#FVKam=j2dK z>9}N;t!$gHigL31EjyV&7H7C>M*-=I8P_z`xLt+KB35ahA9oQIrGhcLuysn3oMdV~ z21S{xcI!?p>tjo=M5j#lJfK@=8ky(a9W&O+s7OPqFriaRSDUFsJ~_{963lLd&iJEO z@GTy`SsS`{5<$#T-EZh~@$TFp`=oA_>R^QWn0{k+*{#~+T*Kc7eNEZoi>NV{{#SD%H zE?#7*+e|F&KB}GxG|w8n07Hv{oV$W1>3MX7e#_dILE0;-&TaVUg%oyOPd*-u!)-d= z%R0k%dK$HORXn+|N8=++L0p;dTh+3+_O!<3O@LNym-bj4#CP^2296ibaes2!ltYGN z4yiE`=Aym1rl~ejIxr~h)s4L&e{ahd(;9t5ENQ~Ig@Zcf0cT3Bm=>ET0L3`&%0js= z_R01)8$xxXPu>POjSXS(knYNr5b@GY*(I_apJ33g_DqYICNUiurls$2gHmUGe2V^i;e1C-GuK`uM4sGZhx+ zp(T5&Z`E@W9m@#1_QV8|%my}Xo=%4QP@EhMFuemvh35i>qAHn+nN*MamhQaO7?+w& zLm_{1SmB#XAVtz@6&0-{xNxjG-kL23BVyvDFBZg>tSv+Zc&-W5R&E=i)t^;FmaEp> zy=qC%L+6`zml=YhN-qfN*CMgmEL?ux!UeG>n@MEtDXy zYrL_H=*PN++G*<+7yw0-b65X*mSW2TENRu5&+ZHT8`&7*fX38tXk!OifdxYI351U1m1CccfPE z%?3PNFF`7z&c{)Btvq)?chJ2&0#nf9*4HW_oFqBWVt3-UqWkmi|7gBTo4_|~h9 zq`^6Re-Pt^K6^0q3_~XRO*`%%EYt~&8oto22~vE4kc(a3a$JU@x!M;Ud^VXJscIXd zb*SH-FnrrAmJHf?w>yEdin8t`3oO!&xl$;-9mv%$sLskmRg@1snGW6ULrV+J9 z;FB)c7i?s4(rx@QoLD&3fKk~>d6IcX^6{hih9NtL#q~liIXe%Nctm9sbF1SyqjCC) zTrI>!BEd4AE~;s8*$qNrMA;$?-*)!Xu4>q$%(V-P+qke0baNH++jA}!n7 zZA~TP!7mva$4k2lhLA6PsDojz*OdqY_#CS`T-H{h$iCACvq??;jUxJ%fuGkgeO}IZQDz|(`l2GB zYeuH0l9Z>F1n$&}Ctcp8q*@yCV}cpxFo_it&vm>zbsHaGuzgYpKnrXJX2K2~CcOcP zM0+<6=zxi>n`GKJ&A@b9WaZS8`EpOAL%J7J3^B18WSWOOuN>M4VY31Er>oD@Y3zLF zBCT04D=Wo!AWf!XR@Rm1 zd9ePRzE>|kBA^hj%4}t+lv2;V>}x8)n?p>d z&=t?kOheL1OeT>eoF>bGEU^~e8k=ok5Gk!pnUKEZA~r-#kux}ec3=9Z0y6$gl_4#g z^6U#LNfFI0>1i7I^rWRS_k>?3r@!KAN#cPjR@+oyT42#BlMjYP$;;M)So-ozXUJJ` zPMyT5y<*05q}bNf9BR@^trQvp5-no58!4S!Kn$hr8fuM%gS5<;7psKSa**A-dh(_h z^sy#b>awIZ)@%lEW1Eb~Y9S1P_T3m=m*kTJyC}(9PbOKhg!tPn@#gB#^h3C;kI=PM zHB1^%&g(5ck7~Chg~Op7f=Zm%YWi^r7bUIrn}RNh=5iB6QN55|Yl*jTs#S;glXjhr zCb(yv$A(T_xg>(UJxS~#6J#NcJ)8PicjYl;L{}rV#*{|1Ew^kWToV&hY;E(}xb8-> z{ehl{K6b7P;6jPxJCV>&$Q`EW;#x4oT_704ok)mUvC_(mVFLoS^q zB|VGSEP8A2aSYjD9$QCl;_``;Syqg{iEYfm1`GsFU6R!3%*89d;g%$%A>@iNDlZz4 z-;)%3SDW${mfHBX0_#j_-LTbqGK1Gh2^ZET7d7lOkZ(aGQI>4cQJYfD`WXFJf#@K9 z0DzZGDv%^4?G8k+rI**aI*F~DzBkk~ITJVG#Wv$iEKcmqO&qllHpGk@WWmIIQ)O3@ zaNA6&M*Ph;D8*}y>TxQQ_3B(IUW#PgpQP?;>*{`sl1;92()HW&fj%BlZphNFRPoZt zDy1ipCy}Jlq3g3XXEFFm^{l3D{hj`|ejg%@QIUD)? z*p;m;vMLz)KF4F)U%Hf8(-l3MFJ@vi({gt^KlZ)djDuA-&EJNdjBY-ObWDJ8J?m~4 zDLSM}hIYI$5QJ^V$#`PdE#)gnb=p>I{Yd%-TfIR2Y>LbcpJmSn*Bgo#(d|GV-sS(N?B)e zAbCdDJiASnd{YP|ga5@|wU#di)FxhE7W)4hJ9FJQjvx$A%%`9;J6Hnp8%Tl;D05&3 z&P-aQKrattmn5VImH@v2Lx2BYRecPX!bZE(*Ys3Z*WF#-QpIQ+8=b+a=wV=;qECZl zP_IysRwJxd%fMB_|6sP%%%!UC(mN_asXKGYcPfMcDl)LZZq3v?OlI zDYo1~2cLKO(|8#3F2iOJX}8j(7v_T7FMbVZTgA4mi>jlOE4>=->0ls{9K z0Yxe(K5>`{boOuAG%H9ae2m@i93QDU_m+3}l6K=~+ij|gGh}=-y#~ZBPTIfReK|TF$YAEhi)k!&v*#<>3^yWKt^>k$&3ORng zWV%;*H$p)4mO}#&4Foz&XN+*TjBsrU(e3#{_NZU1wbQ*_n{Lhtu4`=iE zF4_$J2lR$AMgPl%;zRWpiJB_%ah zUBNo$KS#GbqV+lHFVpk+{b75?r<4In8crlommW+{y1+sQ@UK+E)pgJ|%)_v5tu-F!Aa7{B+1##grSOjBiW*nXysK!yl?I zk`YBzFin~>kI%O3P;xoLH!U+E7A2`uh;QYtLZ+IMSG6YTLT@d{?qEWVm6RsTluNUI z?|q|a$YjolQ&Cb?G~~NkRn@wqoIM80=wA@Y^|PGt$TVsY#=_xmVk(X+tS1U$X#=xm zSs>OWmRZPvsHj4YT<0pX9&$vy&E>_TODZ%xVIF>-MW$bs<~n9?p-Cr_WqQf4R$X`;K@~plERoPK6{Y z6Gk@5u;;RieNf_D1k!SIr{SjjaQfs zVw=JJ@gC=)8EEFX>R~UYxQ**6#97I$9PP?%?5il9R+kJ(7eP+jUyk{$er+ZhO;>9v z68>2ZwBeS5rNwGCL60{8as!*c5#ZT%XkebufTq@8lg36@M2NDDE5c}0McxObx?(?C zFIW=6L-45wZ$aJ#Z#yN+l}U?IUb)~*!*<(IlzFS$S8h*%0wiBnv^l!!ZJv*jiU@3+ z`HJ_|97O!wt_tSf7CiGj2cjWfxopS79-9c;ReonFS_yN(RoDd{f>j_v$T>jyfRo7w zC>0*Yd&Xo~qO@UZYtvC)tS%x+Vp_>YRmAUPiPB2N1+OrZZble|J^q8pQ+}*Lva#?o zG)G*MM97?*xR^yrx?g}2l?x4D#;ze*77)3*#&alP0I;@vSw>2$cKQys#R0gn7aVyc zPi0fYVxCs#N3pj&O-qEpRq8DKpy2%nG&7P`pA#8mhzIAwf0kkO{LHB zxs)1ml*r682>+VvBsZ;V%+_;KVihI`)h!T*uQx$;maKXHg<;j91l9Hyn|%a4d!3df zKJVU5j~cyOkgJhO_gsMI5aBBP{ZF^7M_5gIhhyIHIvM@L)UQiyy_2d#unA93qGc5q zt;qRhd_2d}xN_86VmKI(ZQ9fj5_gzUpeEWoM>mu$ejx!?xZ^-Aq(>=vIlL~i?!Mk} zuA5&rriIy1VB*EPX+Z){^*8h~%65c}${`tPk{`y1P2ufKq>bZV#<8Nh!aU4r$Lhwo z#&>OZUq0>+))e9KE*?G($`E<1Zk`cmetR!-G4FbUU9DLxIQ8buNOE8_vPY@>=L6-B z19ghS9`Q+@u!34Qsk8e27#TW!rbwE?&=Xn`fwGW$c!}uV9msF>4A;|gk)C(QsEqw$ za-idwEk)E%X2`M3A-_v)B(v=HaCvpMe33_BD#?dIj4O1mW-XxL^k2EnQ=SmXPRXDe z+&s279HIoeEkR<;w4C!oG$B!9=$njSq8xXRM y6vU8(o5%;ZtISw^^1&zJYn2*H7IXZ5pdySK9Vd1IWIHabwpw;)#h-5o?*2cax9o-h literal 0 HcmV?d00001 diff --git a/binutils/po/da.po b/binutils/po/da.po index 48f35b2..a4414b1 100644 --- a/binutils/po/da.po +++ b/binutils/po/da.po @@ -9,9 +9,10 @@ msgstr "" "Project-Id-Version: binutils 2.20.90\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" "POT-Creation-Date: 2010-11-05 11:33+0100\n" -"PO-Revision-Date: 2011-01-08 05:55+0100\n" +"PO-Revision-Date: 2011-04-21 09:55+0100\n" "Last-Translator: Keld Simonsen \n" "Language-Team: Danish \n" +"Language: da\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=iso-8859-1\n" "Content-Transfer-Encoding: 8bit\n" @@ -63,7 +64,7 @@ msgstr "" #: addr2line.c:262 #, c-format msgid " at " -msgstr "" +msgstr " ved " #: addr2line.c:287 #, fuzzy, c-format @@ -136,9 +137,9 @@ msgid " r[ab][f][u] - replace existing or insert new file(s) into the archive\ msgstr " r[ab][f][u] - erstat eksisterende eller indsæt nye filer i arkivet\n" #: ar.c:247 -#, fuzzy, c-format +#, c-format msgid " s - act as ranlib\n" -msgstr " [s] - opret et indeks over arkivet (jfr. ranlib)\n" +msgstr " s - opførsel som ranlib\n" #: ar.c:248 #, c-format @@ -166,9 +167,9 @@ msgid " [b] - put file(s) before [member-name] (same as [i])\n" msgstr " [b] - indsætte filer for [medlemsnavn] (samme som [i])\n" #: ar.c:253 -#, fuzzy, c-format +#, c-format msgid " [D] - use zero for timestamps and uids/gids\n" -msgstr " [P] - brug fuldstændig søgestien ved sammenligninger\n" +msgstr " [D] - brug nul som tidsstempel og uids/gids\n" #: ar.c:254 #, c-format @@ -236,46 +237,46 @@ msgid " @ - read options from \n" msgstr " --def Navngiv .def-inddatafilen\n" #: ar.c:268 -#, fuzzy, c-format +#, c-format msgid " optional:\n" -msgstr " Flagene er:\n" +msgstr " valgmuligheder:\n" #: ar.c:269 #, c-format msgid " --plugin

- load the specified plugin\n" -msgstr "" +msgstr " --plugin

- indlæs the angivne modul\n" #: ar.c:276 #, c-format msgid "Usage: %s [options] archive\n" -msgstr "" +msgstr "brug: %s [valgmuligheder] arkiv\n" #: ar.c:277 #, c-format msgid " Generate an index to speed access to archives\n" -msgstr "" +msgstr " Generér et indeks for hurtig adgang til arkiver\n" #: ar.c:278 -#, fuzzy, c-format +#, c-format msgid "" " The options are:\n" " @ Read options from \n" -msgstr " @ Læs valgmuligheder fra \n" +msgstr "" +" Valgmulighederne er:\n" +" @ Læs valgmuligheder fra \n" #: ar.c:281 -#, fuzzy, c-format +#, c-format msgid " --plugin Load the specified plugin\n" -msgstr " -L --linker Brug som lænker.\n" +msgstr " --plugin Indlæs det angivne modul\n" #: ar.c:284 -#, fuzzy, c-format +#, c-format msgid "" " -t Update the archive's symbol map timestamp\n" " -h --help Print this help message\n" " -v --version Print version information\n" msgstr "" -" Valgmulighederne er:\n" -" @ Læs valgmuligheder fra \n" " -t Opdatér tidsstempel på arkivets symboltabel\n" " -h --help Vis denne hjælpebesked\n" " -V --version Vis versionsinformation\n" @@ -283,7 +284,7 @@ msgstr "" #: ar.c:481 nm.c:1636 #, c-format msgid "sorry - this program has been built without plugin support\n" -msgstr "" +msgstr "desværre - dette program er blevet genereret uden understøttelse for moduler\n" #: ar.c:508 msgid "two different operation options specified" @@ -292,20 +293,19 @@ msgstr "to forskellige kommandoflag blev angivet" #: ar.c:589 #, c-format msgid "illegal option -- %c" -msgstr "ikke tilladt flag -- %c" +msgstr "ikke tilladt valgmulighed -- %c" #: ar.c:632 msgid "no operation specified" -msgstr "ingen kommandoflag blev angivet" +msgstr "ingen handling blev angivet" #: ar.c:635 msgid "`u' is only meaningful with the `r' option." msgstr "\"u\" er kun meningsfuldt sammen med \"r\"." #: ar.c:638 -#, fuzzy msgid "`u' is not meaningful with the `D' option." -msgstr "\"u\" er kun meningsfuldt sammen med \"r\"." +msgstr "\"u\" er ikke meningsfuldt sammen med \"D\"-valgmuligheden." #: ar.c:646 msgid "`N' is only meaningful with the `x' and `d' options." @@ -747,9 +747,8 @@ msgid "Opened temporary file: %s" msgstr "Åbnede temporær fil: %s" #: dlltool.c:2159 -#, fuzzy msgid "failed to read the number of entries from base file" -msgstr "Mislykkedes at indlæse antal spande\n" +msgstr "mislykkedes at indlæse antal indgange fra basefil" #: dlltool.c:2207 msgid "Generated exports file" @@ -810,14 +809,14 @@ msgid "Created lib file" msgstr "Oprettede biblioteksfilen" #: dlltool.c:3450 -#, fuzzy, c-format +#, c-format msgid "Can't open .lib file: %s: %s" -msgstr "Kan ikke åbne .lib-fil: %s" +msgstr "Kan ikke åbne .lib-fil: %s: %s" #: dlltool.c:3458 dlltool.c:3480 -#, fuzzy, c-format +#, c-format msgid "%s is not a library" -msgstr "%s er ikke et gyldigt arkiv" +msgstr "%s er ikke et bibliotek" #: dlltool.c:3498 #, c-format @@ -3286,9 +3285,9 @@ msgid "supported flags: %s" msgstr "flag som håndteres: %s" #: objcopy.c:761 -#, fuzzy, c-format +#, c-format msgid "cannot open '%s': %s" -msgstr "kan ikke åbne: %s: %s" +msgstr "kan ikke åbne '%s': %s" #: objcopy.c:764 objcopy.c:3389 #, c-format @@ -3298,7 +3297,7 @@ msgstr "%s: fread mislykkedes" #: objcopy.c:837 #, fuzzy, c-format msgid "%s:%d: Ignoring rubbish found on this line" -msgstr "Ignorerer snavs fundet på linje %d i %s" +msgstr "%s:%d: Ignorerer snavs fundet på denne linje" #: objcopy.c:1128 #, c-format @@ -3318,17 +3317,17 @@ msgstr "%s: Symbol \"%s\" er m #: objcopy.c:1243 #, c-format msgid "couldn't open symbol redefinition file %s (error: %s)" -msgstr "" +msgstr "kunne ikke åbne redefinitionsfil %s for symboler (fejl: %s)" #: objcopy.c:1321 #, c-format msgid "%s:%d: garbage found at end of line" -msgstr "" +msgstr "%s:%d: snavs fundet ved linjeslut" #: objcopy.c:1324 #, c-format msgid "%s:%d: missing new symbol name" -msgstr "" +msgstr "%s:%d: mangler nyt symbolnavn" #: objcopy.c:1334 #, c-format @@ -3343,7 +3342,7 @@ msgstr "stat returnerer negativ st #: objcopy.c:1372 #, c-format msgid "copy from `%s' [unknown] to `%s' [unknown]\n" -msgstr "" +msgstr "kopiér fra `%s' [ukendt] til `%s' [ukendt]\n" #: objcopy.c:1427 msgid "Unable to change endianness of input file(s)" @@ -3355,19 +3354,19 @@ msgid "copy from `%s' [%s] to `%s' [%s]\n" msgstr "kopierer fra %s(%s) til %s(%s)\n" #: objcopy.c:1485 -#, fuzzy, c-format +#, c-format msgid "Input file `%s' ignores binary architecture parameter." -msgstr "Advarsel: inddata skal have formatet 'binary' for binærarkitektursparametre." +msgstr "Inddatafil '%s' ignorerer binær arkitekturparameter." #: objcopy.c:1493 -#, fuzzy, c-format +#, c-format msgid "Unable to recognise the format of the input file `%s'" -msgstr "Kan ikke ændre endian-type på inddatafilerne" +msgstr "Kan ikke genkende formatet på inddatafilen '%s'" #: objcopy.c:1496 -#, fuzzy, c-format +#, c-format msgid "Output file cannot represent architecture `%s'" -msgstr "Advarsel: Uddatafilen kan ikke repræsentere arkitektur %s" +msgstr "Uddatafilen kan ikke repræsentere arkitektur '%s'" #: objcopy.c:1559 #, c-format @@ -3375,39 +3374,36 @@ msgid "warning: file alignment (0x%s) > section alignment (0x%s)" msgstr "" #: objcopy.c:1618 -#, fuzzy, c-format +#, c-format msgid "can't add section '%s'" -msgstr "kan ikke oprette sektion \"%s\": %s" +msgstr "kan ikke tilføje sektion '%s'" #: objcopy.c:1632 -#, fuzzy, c-format +#, c-format msgid "can't create section `%s'" -msgstr "kan ikke oprette sektion \"%s\": %s" +msgstr "kan ikke oprette sektion '%s'" #: objcopy.c:1678 -#, fuzzy, c-format +#, c-format msgid "cannot create debug link section `%s'" -msgstr "%s: kan ikke oprette fejlsøgningssektion: %s" +msgstr "kan ikke oprette fejlsøgningssektion: '%s'" #: objcopy.c:1771 -#, fuzzy msgid "Can't fill gap after section" -msgstr "Kan ikke fylde hullet efter %s: %s" +msgstr "Kan ikke fylde hullet efter sektion" #: objcopy.c:1795 -#, fuzzy msgid "can't add padding" -msgstr "Kan ikke fylde ud efter %s: %s" +msgstr "Kan ikke tilføje udfyldning" #: objcopy.c:1886 -#, fuzzy, c-format +#, c-format msgid "cannot fill debug link section `%s'" -msgstr "%s: kan ikke oprette fejlsøgningssektion: %s" +msgstr "kan ikke udfylde fejlsøgningssektion '%s'" #: objcopy.c:1949 -#, fuzzy msgid "error copying private BFD data" -msgstr "%s: fejl ved kopiering af privat BFD-data: %s" +msgstr "fejl ved kopiering af privat BFD-data" #: objcopy.c:1960 #, c-format @@ -3435,7 +3431,7 @@ msgstr "Kan ikke s #: objcopy.c:2194 #, c-format msgid "error: the input file '%s' is empty" -msgstr "" +msgstr "fejl: inddatafilen '%s' er tom" #: objcopy.c:2338 #, c-format @@ -3445,16 +3441,15 @@ msgstr "Flere navneskift p #: objcopy.c:2389 #, fuzzy msgid "error in private header data" -msgstr "%s: fejl ved kopiering af privat BFD-data: %s" +msgstr "fejl ved kopiering af privat BFD-data: %s" #: objcopy.c:2467 msgid "failed to create output section" msgstr "" #: objcopy.c:2481 -#, fuzzy msgid "failed to set size" -msgstr "sæt sektionsstørrelse" +msgstr "kunne ikke sætte størrelse" #: objcopy.c:2495 msgid "failed to set vma" @@ -3721,7 +3716,7 @@ msgid "" " --stop-address=ADDR Only process data whose address is <= ADDR\n" " --prefix-addresses Print complete address alongside disassembly\n" " --[no-]show-raw-insn Display hex alongside symbolic disassembly\n" -" --insn-width=WIDTH Display WIDTH bytes on a single line for -d\n" +" --insn-width=WIDTH Display WIDTH bytes on a signle line for -d\n" " --adjust-vma=OFFSET Add OFFSET to all displayed section addresses\n" " --special-syms Include special symbols in symbol dumps\n" " --prefix=PREFIX Add PREFIX to absolute paths for -S\n" diff --git a/binutils/po/es.gmo b/binutils/po/es.gmo new file mode 100644 index 0000000000000000000000000000000000000000..282a8a8165a339fc6f139f70857cf5d10e9b7d02 GIT binary patch literal 181430 zcmdqKcYIXE`?tRY0Ra(25i1-(I!gyB2_z7jgc_Ox!Y0{-$R-7 z@2DSpFJLc-y<+c*<+<2Tu2LkUl4g}^+mv12OMp+=x8omiV_$Ax}wkQt-_JSQ@J2)J6gonVM@JQGm-T>Re zr{Qk!eb@#50QZ6WL<525a1fN79O%J?Q0b0w?hBp!KG+rim*CFucc^kStOx`Sg!{oP zI0H)VS+EJb47P&T!TsUgP~~_Pc7uOF)xY!M)CG=$gW*wd47?Mzfm>lSxLYg`*ca{x z$HF0S7+e9B?moCH{0{bmfp{R$3-pJ*;R2}goemZ6BG?+<0HxpiVJEoJ@h8|B_uiFO zzawD}+>7CE@I0vWYoPSF9@3P7w_p(NR7G0YAF952Q2MWe{o$FgFMJfLoIgUv>#)S; zcMw$mOQ6CpasE%kR=9tHBVpsEw*F(G>U|^}0B?pW=Z8@G{0Yv0!>g?x&x9>-uZ5%G zeQ*@~3+BL_8r!bNL8X5f&VfyqS@{d$5Zvd$eE2+^3_BcQ+p_`=!@U+xho3@~YuIud zuN*4<15oYxGaLuAjtm4^!V{qMcP>=B-3--k>*4P38OO~~_4pnh3jzjbXzT*3O&3Oxzuz%C*4pY^ZWS3H!i|qXU6l*dMChmcoJXMyPgq*SU8&#>&fq zgYZ8J9tiJn?k}P8>3FQI_bk{J_ZhG!yx#f042R<0MUIC-wPOWT`<@LyZ9x5@+U@Gq)-K+Gx8rVl7WyIl0r|`2IlPaMFGFXdv)8ocUNFa4#JBII`exum^1TgdL}P!)CZ= zL)EVUN{>gu4)7A#1wIIs?qk>owtCX0&xT503Z=(N*a@Bpo4~bD^}Pcs-RrO$Z1R-N zuP^M3I}fTIW3V|q2}1^0S;ZSlPb^Ow?&2!e? zN5E->uY#)2n^5{`^1RhU59r~Z3T3Bg{?2eaXx8(AyC+3+BE2UPj~hSGPpmuxD7kB3AGp!E8@yuW_JA5srorCuB)AK_2abl1!)dVTt9D+R3kTr7 z69(buQ1;vQH8+mHUbv^he()%m4R3)OPrrl8r|;{wJ_}$w+$X`oa1B&`@523Hzc;L$ z$x!i*hRXMHI1oM$2f>Ut?KnFGs@}&!#k&gjha2E-u;E*F{%qs8A8dnvC%8Kt3WvZ+ zuqj*#RlhUguJA6{5Xw=Vb_f6@;MGzi>8yq7W>nECCPh7C-Az7Fn*|07W2$eU38 zY%|;oHr}a$83)?K=D4$98#n>(0T(#`O6NWr%KpxUYKKRi{|iv^K7{JOe>i`yk76-w^)jt@cU@lCil{0gd_n>4ohw1xZQ-Vb_k z80-M&Le=j`*bbfq+ru?b`gjT|-nZ}o*t&@=*MYDb?n!VETmogMYoYAoJ*a-P*UpwB zpvJW#C_S74)&4ib7Vu4|dVLCI2N_LmIod##YY=P;XF$b^K*?X_{MSL1=W&<~zlQt4 zKFu1Kc_9xD!ySdH&y7&y(sQsM+zPW{u(_364prWBU{AOns=s{d!dvfR^BV$Hz7SOZ zIU4Q@S3}iv9hBZSLbc1!Q0?2Qh4t?URgZB{ACS(<_c!U?J{|mJQ4}R1DSrXTt^XcBt`T_g1!D zMnkpNESLq0pvK#)pzQutC_TLgRsZI@S^e~ZD$iu7{l!kyuzj@Lnz^Jb{}J>&d8gNpy1<8QDd?go3<_B;Se51CNu zra-l88C3aKLY41asC3su+1oRYZ$tI>FCG7Ys^>0kto%Kp+`Xa3?;%k79tov~e5m{u zK$X85O7CYw<$nW|KJS5&^MrG6aN(Ps`zxq&Y=wPc^F3{TnNaON8mfK^q4aSSls&A3 zveQ$b%5eddo!$zS?^96qe+^2`XHfm4QCq8z4vx7{@k^leQw7zZR>Fz!VyOCk3f1p2 z_OkuF8&p4=0+oLyH2nvvzugGce;Y_x9!v!3b%HLe{3mHs5> zz8Utzy%`RMt@g9^9S2pP2$cLIq4a(}RJm`0viE18>|u}nEqgd-JI;biA93!La0Kp4 zpvK#`q4fGER6p9Yoh`>OsCpj`XTfXWA#f|yxHGH09gkK*>Ge9t$D!nY1SPkz*TAed z+QVVE3!v=qQrHu&gR-wTq1yQqsPVLU2V36(Q1*2YRJ?hxJ1m8=pR=L#vIf2c{|hxg zoYm3R=Uyne?>KixC)=)Fp!8b^gRs)^DyVX8fU=`Mp!(UU18jep21nwa0~^8%pz^;2 z%6@N$8h2iRvcK1%^zk8-o*H$wJOIkhMnl=rY^eB$LFs1+RJ*N&9=rmoUJpan=QHPS z(WQa8pD_@sU5|sZvqzxhdyH$mCMi%{eHRw(;#*W0=$L!~?1xzB^j|6b_9HynS1inmW6J3fqriZ>5R zuSY<&+m+6}0jfX#3}v7D^tJ6W9x7c8l%6ht>JRIn+Us?w@h8yFj^F#kg*ZFHsqi=` zeZ2yk!jGZs_!}sD`vGbkYti4fUuUR(JQ_+b^PtuN$3bHUj*mg<=`E=K+jxM@zc*}z zdjQmUIuy#@mO#l}2UU(IpzL)6RC~P#XTtB{AUJ-YZKtE4+Vw)m7hpE-hJ$SRbD{Ke zD4Yb3gzCS~LfO$yE#TlesedJ{+@x-_j^$G_^Wfb9BTE`70N#ws-0&;>G>Gv zzYa=&k3qHT3sCakh3Z$|!@jWbFq_YTQ2LzWcmg~S_j;)KKS0@Cli_yV*b|P$Js3`e zM?%@%(@=J{8LB^Qg{oiAOxwTmq4d50%D&5?+WQ=+@~wj!Cm(X|r=j$^2~L4qq4YN~ ztAV)>a0*nrKL(ZGZ&2m#KEmod1c&237ak5b!liKZ$OeH&;d-d{Taj(^KLa+$eHBzW zZ-TPZ2jEWdQK<3pDX4z`1(beUoa0FZcmH%b1KYR5?Y72+Z-&y>U(UUMuGLExR5{C_@;eI3 zZZ3h+*Aq~7`xlh`?LEfYMIWek83$!=hd{OS;n2)Oj#ogfKkkFd=QXJQ`l<8(4YtSK zW~}8PD0`X-Rlge87G4G=_b#aVZGf_qU!Vu~A7}MH!f_$2!T(rT0{?)DS2W)81SmaT z2bJGTupj&xN>AM;SUrq`(*NO5_If&$9oz+F2aiDMeIwL3^*dC%_B+Vdrwk6meHv7L zPeF|rKSJrF_e5Kdkx=7g7%JYGQ1b4F8drXR(s#!^JH8Bp>VH{K?KTa{-lI@*u7Q&C zB9tDtLY3Q_WcAq#N?tB(24_Q+rvOS`97_IbsP?)Rs-5qK>K89S)qgYe;8#%j?K;`& zZrKiiG?BOZr{s?-wTTHR_?G2S*7%IP|Q0Y&HYL`2q?BEsW|20&+HdAf; z^n!BFfQr8us^6RpWuNPy?ClY#@_YcLpXSqSz57Dh)nustQwf#sMkqV^uXBG0RgPbw z^wfH~U0-*BJL9f^17HpG;5w-CyZ}4Eub}kRGT++WaH#yspvHr%o%=PYcH3o!T~F=> zH6OKy(*Go=_L~P=z!IqOt_sSYuZ7C*btwD&&9TEw8*c(sel<}2eJxbEK7t->HOtEB z2UY(DE<8kWskeevF+C$ zsy>6E>@pWh-!q}+uP9Wz)IinmbSV431$YR!Ci1~apAv0 z+08EVZM?Qn;oYI?HQ2eQLg`~Zl%7^W>F+wIa;%5yZ!bXU>tiT8+x1Y}9)qFuu^7s3 zSHT>3CsciYasGQRu=$RI9{wSy_BhtLFNc!zkaKT>s`sDJ=xd>!pW4IT_z!~8M-fzc zBT)J{2C9B%L)CX3RR6jU%HE!Ede*k4CTO7AS<<~r9<+g*W{{X1+90aAOgQ4cj zYUh7CRJu!{`pqp+ zS3uS0F{pO?95#lH!?rvvpvu2DlpeZ5$rKX zm3ISFz2Ao_&)3fV7gT#RFR|;$eW3Ci;5Y%w4i-3f4U~PH0VVfJ=e`Z9KRpH|?+vJN z@>8htwqIoD`(mhey9z4a15o984oYvEp!5yc03aM)q7E%$t=eqIfSz^kCz z^KHjK#Fno!R6if>+!3huITT~eznoLKXc&?Dr`M>gDOWCsQ9^1?K>Z;9?PKm^_5WZ)5R{a<$OFJ1U=Q1xw8Y4zR)YMki{ zl`afrFEPhej+Z#z3RUhWp!D*Vb8mr?`#041+_K8nYcD9hXTx5w1bXls7k($4fcqUd z6n0%=8G`3URo38jy@(1S&A zBs>95gO5YiqwR8Q_nn~Zt0$CQjDi~14ufOhRZ#LjgL7c>BO93awTj@uxYt41X_KSu zxZV}Yo(DnYw-8FsZBTmu6{>%ZT4Bedc~IleWl-bMTTt^uo1<;}c7oEw04V#P45fz% z>gSKazVK%#y>vas>CZ6+HO`y{)ed(<<+}xXu_xwSq`(|#ZdOJ2`ZnK z$5}n)K-pI*)Hre;RQ~rl|1D7VvDfidPkrHN+$Y1a@CBFy+niwSU^bkHy8_OH_e1sX z)+?>u_kl{E4M)M_q0&DIWv5M7Sv`+~#kfy{gW!))>3W=K<(9*I+>b%E$6hDd@)W?S zxNm@i;qPz??02#aKL(D&{gh*?Q*62BK%)n!b~_Jh-n#~>-`?){qziu=&c*+8SO~|Q zYTM}sD7$$KHiq9o>F;Ma9qxLXZHEvXg8Lje9zG9M|23 zVehvb3T2mPi+3sxXKM%^TE`%C~o`YRr<8!P#2vv>}I163|L+~f4{AQnP+v^M{x$i-> zYrFGoe~&@g`E9TOe&YNmoNx7c63oMY6I407UtslB?07wt+|Qu&)a623-vvuA*mcWt$1|YxaTQcMZi0Kl)|cA; z-yO=H$3gYqQ=rC&Ct+*&0hHbR1eLDEWtIoPj<|=zHtkbuv0&E0}91nvUCn})U%U8jH8O$e8^>1{Q9k)io$8aAGOB%4xx|;T6 zqPXlD?yEC^fAbXcPDAeZY-kWTK?C|L%;(LRKQ=W89D#GqC)Ag82YlKf@F(sAKePMc zL7&_HI1*~Si@>JvJgE9#0X_IA)V%Z&RR3-Ig&n^JL+P~yYMi|ql5OBQD80Q7Rll#G z)3FAs{+GgC;FD10cm=B7TcO5l?`xayG$?yr0cGEtq3r*F zZ*2SmsB*7@l6xN1c=ZreeYe0#aF1{8I9mW!pL?Ln{R!+0n|^1@+Xt%uPlYPaaZvSK z12z9V09Bt&P<9sh-tOP_g&s~1Dm(|~z%Z13T@N*0eFQ!DC)D`S?g!fss-Wbb3ipTq zfhynAPw|oQD-hFE)+3}1q3$ELqqd)*6aK9~m&hBrZtXFG4T<(dm6XEjv&tcS{P1I&gE{;>5Q z1xMgM6RLhMLd9$Lr`7LpDE~uYA-oW(fBXqm?!EuAdL9pz?g%J(YoYq%7PtU*{oC5h zDmYN#Q1jdSP~+WhfebT$c600lJ^Tkl^{3fTa-*;*ya^gRg)MP^0yU2Q40nS~8)O7J zzlaArH^}|+UX0Zbx7t;8D<@OJd|F~gleB>q4e|~ls#oPvgJM!YMeV0s$35^ z|DU1KHEo<>`e!?+`sBhx;Up+Mt%b6myP)jzD>xYrY?5K@^f)O0N8xP>jhqtyc>6iwi$uZDEQ5N&@0@(Lq=c)@n?6< z2z1{GeZlGm*k7*<)BlzQGXkAR_Y}O7cwhF-Fyr)9{cO9x0%adxLXrm>_Rlc=d1t8c zClkufL$EnK1?~gShidQJoc{|@?e-Q_yL}5azIGX4>oWjq{231=H{|?RLgjlgq?my# zockImJG%i&?s};78=>_61(cj0p~k1ZnM^%60Lq?cK$R~7rOy+g^0^dtgI7W6{aGlx z+X_{`9)oOq4~DY4c~Ilr$x!3^15oKcgVMuZgROf2oQS*7@n)!bVk_(dhaPCT5NbcQ z3ab1!L+SSwsQmwe%BR^7Ti-!Y;gg}p*=neCYoY3~5e|gEL*>(FsCCbR>KCU#555Cc zpTFQt*lU>0=UAA7dmYS$-@r+5;Bc##W1;%Ttx)Z{8LFS`k!kap1P{c0EbIjDgRK+~ zY99Fps-L#VvUWEDw#Quo)vjkk)%QBs6K;em=bx}0>^Z{L^B|~t#$i9W21?FbQ0@CW zRDLZ-+V%@V#m|Q-*NJdfxEAgQ*F)LK8&G!jEnEtlX50E51Et^lU?uzzYJ8lNWAiy5 zs=e-n zzXYn?pN5k6HPpD)*+-m*XI)_89?H?*gcL zEr+t_GhhdJ7gRmofYQ@vQ2nsMI9tAcj-#RKH`B2gHp9IXs@;!;s^{fUZ;|Qqot%4d~&Vka)%~17z8cOa5Q1rq zRQ>WM+VL$8)sL@({orP({?sZjBhV4{hH8gtQ2ueKd1Ey^7_NaTf5s%+&bvaDuPxNL zkps2PUF!TVg|g=-p$ET&d9cM~+s_VxN_Qbtxn6|QLz5}io;pCaXEs!M<~#o*U>5F+ zpvLt#pz70PYKB?A4~6Q-D;yt$>Q8?{)vxz7Tdt{4{j>_I+~-2ob3IhQYBSxkr(=%e zY$$s!gC1NBmEUbp{rNj6xjpjjczzHZi~A_3{l(+(SlE0xGi|vRK*>Me zaSc?ze-3KA`UOgl-Yh$=mqFS2%`h9@3)Me|>6t*MNiVxDbIV-vv;5yB|)3A3(|NeTZFu%}^-2Sp+qXUj(JEjZo!jaHw71O@p$x)lmKIMK}q50Gq(R3#|TzK($i= zoB&UQ()a67`FsZ@ztcjyzRZV;e;ZW4eFv(){S2kY79rd3J3;m1iH;necF^`aJ2}jl#Bn&4n7*YoP4nShxh91C@XCVryUh zq4XJtioXhK-aQkl{Fg)3`!1+-8=$dU*bBE;V(nrQRQRcIEW91cu6~DV$99V>b72SE zhdG|=c#{j?05v}R4At-UD7AJv5Dvq=5X!zUhO(E(q3q=c*dHEnm`yhuO7Bad+T}E; z`1e4S{}b34wp^TH_Hlc{eB8^R+V2IZ@$pkAJN^NxT)#k#uWcgM&W1qMFA7J(bD_%l zDwN%}DzoM31vQ@J!9nl@D0^EE)!!e5>QB$Z*|1Hy)q5FK_$sJzU^P_vu7bUZ zj#@i85o#TEEmVJf3r>f7S6IDApxWtlcqqIRO70$qTYK&dWluBVXm~c%cmmBl>G;eup9tohs99xuY|+lt8fL} zZMmJVR>RkE?|Y=p_Xo$FkFw*&{!n`B1J%xBpw_`tq59KI$K#;NeJfP_C!pG46PyG0 zTVeHF1&83i4`#w2;3C-fXlo}ILiMLdU{ClNRQx@TvGeI9*cEpSs=Y6Q8i!tjlJ_^% zxRZIT?e`0z%6STuUEd2e?*9Tc4mCT@>Zuo;kGlk_e?Ja2?tKPj#~H`l_HPH(euJRG zr$RHHIi3oY{w5c`5lSChpa&bAVCSojj?HzGvJ^^xS3r&T&q3MiFVM8#>9*b5L5-*Vp!(Ht zsD7Fc_k$Mw+X$#};|Rx#pvreI91OpPlGFK2*A7tS zT?RGYT@6*fPoVUdvD&szS17wa1j?RPL6!4HsPS+U914GT?ty37e5ON{uLi0gtbuB; z=b-FAaJFsd5m54uh8h=cgBriShO)n5=h*tqfU?8YP%e-9_Xp6AtDy3E0LmU;a_$eI z(*FvxVZRHkeq&JiUks&>N1?`x@1e$}9v52u9|qMQ)=Sn+XOor0W zNzm8}R5>?7rT-ERgdMN4`kD=;uPV43JPS5~*SPStP3e~T^hZ=W# zU+e4=O8&)A{r*KLJ#2x}({9&UJ?B7`vm8p_r$UwQ4%h}h0hP}tmL*zoR9^&jQj2ScTgLD|_V$LpZ_ z=i^ZEUxTu*ub}FEzzuf%odabz1yKFxBv=Y>hyCFGH`?}`0#*M~$JNloeJ^YY--0Ul z7f^cm1IjLj{>SP)2R6ce0`%Z1P~*i~sCs`4cZPpK^_wPZZ8--)^@CEVcDev+zPJOb zJkLS(haaKZufsa4-*JvJp~_VV)lOAVa?XM(_f1ga-Gfm5Z0DOY0tIjils;~Qd2kb) z4ZGiL%X4;fvlgnIAA@S=*P+VuJ=A=%*Dbc*Sy27#P^j`B4Ha(<)I9Nm3;!O< zKK8iPvKyR)I}^@@Cqs>&pFqt^U2e1OGyy8VLa1@!M5yrfQ0=)Hs$Q*bxArj%%DyK; zmA@3Ke9NH+FN2EzUnu>34rNb`@38sp51ZmX5bgqVpzLrm%zgLm0}I1eiSQ=#UKyP)*+HI&`9zT1{(sN+|!{0pkz z?e&mtw;oXLsg4Cu{jU_2 z3Dh|CGnD@RhU!=SAF+BWg3{CJP~msO@$d_n3kN)E%To3D#6Z#fxdTuXmX5mtpCuh$rTDc)!LlXA2m>|IVC$p?-n{_acw zdZxO<$@QZiLB5yacYyO)gxrm|7vldqeiz~HgZon#J_C6=UdC@HWR54Ej^@PEF$wn~ z7iTQ)jA-z(wI(IF}I46qGoc5Wd>E zFDGmQ=_;IiA170t9$aOoee<3WcI2`?vp(DeQX)W+m*1tUBvTX2f}z& zFL7ky-h+7OlI~2-gK>8v{8nNd0Q=%s;o?u{`f~hPVwyQ7&NZ*=1@0yd%e%k+;&;IRHT=$XVG7^O^=<*#8i5I>Bd&^A6W*q4u`^F^9MZ;W!xj$Irxj75Ss!g~b03rXDMCAB6|6 zPX$;~Bn}m!H-2N_{cwLgEly7};Q7p^!R-SzSCcX@DhPYIV>V*Vs;9&%C-&C~Pn z+v>`ru#qlpW3ILSS<5+#@M`??xqg`Vi*dh>P_57O3`j?3_$gucaK6Z?<46nh_gNRu z_c~UE;+To77diXjz6AFq(w>ETAlw`3JJC8CaeXg-`#>Fw;L)UM%6U_Y?7fJ8C4N!P z-kdr-SDyB`Pjc69lIA*O+=|~cu8X-o2Yx|(UNH^a!r2yCli}fnUFc+e%(d1lXF55O z-ygp_;G=LK;uUheH{qvo&FhBde#m|Jb;NxVah}F+7~xz7uH#xqE5c5Z2S*-$mvg-r ze!szEakG33T*dVtoDUGEF@Cqh7m!ovWK zoKNG`1sU^TL)`bfIHz$vns~gL7f;F8^`F*BY*$%YUm0HIFpR z)vYf6sl;Ewxrunw@XO?!!F3lG9wuxY?(cBtl5#m*01rm~-<<1QeonkW7vldwyqjH^ z_Qw7(4*&B=myJgz@y5A;m+`-X^Fhv)gm=b&s0(|AcyVMM&UprY-8etN?+D`Rn8Al9#5>W&eHZ_O@OuXq zz|%QLaP1#w;SO`^H~?Np-n@Qlj*lGWc#7*e*4zAjgS?t@`p1iOD((?&;EfO}eWovyRX3I}0A`!u}vlcdoTh-P^@^kL#7B zY07z&i+3ksS@>6R{_Ok?!*4j}-sHc?m1PjTn((8Emr2++Tp#J;;}zJGxK9wLoUogm z|MBEAnXvP558@oc^+|-k%k?6z_aOWy&S|(G;yeUD|JW6O9nW%}P1t3)?|_Hn?xO&X z-SF$EbjZ}vnfzbD?_At9&hHp_Gybo`o;I3!w^x@0&LKOQIT zbSLj<;&7WN(39}>oWF9d;}Q5IEQf_oW-0uS3AKN|C9FH=Kqsrn<)b|C)OlJ0Tb1=J_v;_3G^I_`FLd;xj>akWb; z_Z7+qUI71a{wF&2$8RCmhjKp3bt~fKA-6Tx_dsr=1uo_c5`G8g`%R%>h)1>a{}T6W#62Is zS@353i>d1ooP7y94Zh0Rmh(ak| zd>d^3MhUx^G_S#pgiUf`&G8$|c>-q>{1(F;!ryl?FCmYK_t>t>5!Nup-jsZ${&0*S-(fEPZ?G3}JG!_}z25#L) zEJxOJZ~}fulddQ31Bug&YaN3eKex`n3xr?eu7zf#`@!WU_ZZ^0#81a%_`k#TO#B`p z-C^)jP91mR_KyZG{U*YGB7R%KE`)D8|ATNpP1r;~f#a9Nsloqw!asF!&n7Iy^`*|O zs2_0MkGK`YYXHZ(G8{(OrJQ@=zJT*c&TonHFn(td&p(Fazq50{!?lhwcoBY;#McqV z{W;eUzzFW|o&RgZxeWIylwpPOFV*jWt{%8gz#5z%t8JK z_&3Ep0e3g9pW~d)^$YkF5`HM|Zpi%@zi03})aCID?j~G+OPpcEISKb-7xq3}PTcPa z`-bZ&gnxruM?TjdaqfeADdCsHEx2_wfY&-1bGZJ3@YC`4(AgAtBIix`={VoX)AcT- z$-qAk207btwjq6Q&aagZ=V1KyChk|9C%d#~k>))oZ=eLZV*-9xlC}lzAC#VJ9mgQU zKlUfi`%cabuCM1jkTdmY=fYPyDy#{z-iKd0nR7|Ah47=0eK6-$PQYW1XA<^MEx8IR zN-4`NF0ODM@pp5w-^4wY>vrhxJY>Ai`6}*>#F@x-MESvIVS6XzFT!+OjQ{YIJmmKb z=Umb+fx95{BEqL~odItl{)_N&!oP-H@qd!*Vem)XIy#U>$7i^kxa;FccR%rTtibg4=E+{5tGaRK}V|K;#4=XV@&cjf$$@O=@| z68|Z<-{Sn1b1Qy>;B?Y`1#f^Q#4YFi4{jZ|6X!(IUEynmZ@By&02G7 zbjANcrQ_PlnaO-%_QPc4-e*ozl!Ev0ga{V4WnY5)YPC3`lSu(<-MB) znifWj!WE&Cuon+kR+g5R#Jx}~?3I?3M`Ph4A~b83UsF~Pjl{j;ShURR93R%K9?!X* zY$c$)U2aiJ4y+idA~i;zV|f!l5Gc zG%P6@fq7KTn_N{^5RQ4Is0^2d%PY|dK~pNEOM9IkF04esUS-tF50@y8R~D+Mpf)Dz zj74EDw=_niXspJY5h{qF^0*f+tEjAz&b@jfBodA-CANyat%S8ABoY=!Ba!G*X*9mH zw6btf*tT`FLPZTl6t8oZu96!f1JAsI)xpb*}Q`7=c|CBNmQC3qwXTetP6aO-p!vt2;-kQ_@F@yn>oatI*ym z*4&;w=Tm~r&hZhl!JJs(qS7TO4vVW+nRDXta9Kg5#w)5St58e&d6XnG2@=5ihqg7;F9#NuxVil)4-d#)qrx=vTT^t;d(fD{WU*1`B(alvnj$6pAnE z>J?NKE=KbaB6tzgJH2j|(aKOn&D1$k%s!Vl0Z3 z7Q{kywN9OjR1Yucl@_6Lt|QeH+$J;DsXFGl*rvFCGZ+I-S~q1*X|u^ue@snNd~vkO z7>`%Eh&GU3rQ^v_tlCR!*1kh9eLCeLUpsUL`AHp9^JaMCrpz$I>(p3jnd)KO1i6uM zyc?>BJ-u!h3pC4jowZgS(#$R`4y}gCctxSgkj5}|D3!e4IN^e-k`kGbVyDIGjk<~> zrG=GUQ@eGV;t~>j(?rtuKS#Bdm1g|JDb>%X8>uL@MgZSJ?Of(nnqE*#8|f`tH>PwF z^5TmYXzVCm7MAHQ3&)}zR1(|itXvsC%~TRLWlRkrMQX1|i>M(V%Z$6GN}Ub}Vouh) z+_|Xs^wi6XYvNL+lNJ?dmQ12%bfZyn_>E(x=|-8Bz@Ks56uAA!J1o_&nwdcUp#(1O zKg4pQ^FKs3!(T!Pekp1zV5S}E{op_|=V9B_OfsIan53HP%vforJZc4IVN$gQ3FRtJ)+9CxKLKfiQYs{f>LSuG#W8yg9+ zX7q9*EE$_6q*O%Xar$%E%Pb2qOP7a748wlQ<}NU6xTVq9;`zP2(g8yT_wvdLS!vD< zh9kxEj|fJ>%Yy~sBYSxj6@|SpP!?JVp&GU)d2=(%Vx_@&VXU;GlGT7;Sd}8-qLAU# za(mvG^2&5iS8SGZi#>0GX7^fENRKXQb!6CNsTrkfVTPvAw4=^i)hUtL|4c$`CR8MRz0Z2c2lRVly^i*Fo=-^utankHPV z#LAy8X4<9>GDdLOFYO)~AsLigZnw3aFjTb6UQCy0+@@SAE zhsexV4IOJVnXp*1{%FOh%&%s$dZe`)OIOX5a+bqRmC|lp{LUgTb1bBCSho?kRs~RK?0Ymc$jISez}KiKNAgD~G@GOG)8* zGfLTOvDsr&kvK*#3KuSpSC!%6kMm|o378oFYcZ}k?1Cxfl5o*{D|c>HdAzDZYC(Zf zv)^xbHYLEo=)u-_1NZEh5;J21IX(n}t-M<+t; zI;d;hn-z*wG596icAKrV|6fR^W(-H+@*=CZL>8mMGDD6r+YM3-Gm7X&0vjeHrE^i! z0KT2s4Vr`LheLZ@6KuytmIY=TZ=>*6qhb*wfFEGSMb`n{`kz?ogK8*J%F@y$HV(!l zZ3d!Mm0osc`3OJ5xR=ScGCV?Y{X_l2`D!`owxr>hOH&Y{TPb5NQ7rOkpK=qui<_nWdSU2BwtGu5bK)=ccZK{>HCX!a@I(a8TWZ z^(ncQhBdMzm7K`4C>-JLYD$)#H!&Qp@VL!cVY<3o{Ulm8eT=Z3-S+9)qk}UAOf+hOh(ZZk_^@rw{5rs%(%5QhOr?f zG0OyV{_SMoDm$8Vh0(H#P^A`1>WJ=e#$OOBT)Z?CE8@CuSMLT#Ut zfzg7)==8Q@*aF+htCsB6E^R%jQg=$* z-lPR*A<`LZS~+-jVeTCp<@xuDTtruakSmS94oaj~X)w2cS|AmWUK7&4UAwsK3rWtX zZN}czA=GUyYYo1MG1R3lBDEP{v>!`d1K9ztIJxxEYDTlZ7F4Bro<==`VUlluxMK%c zcTHGKvQWHM&yn8h>ph8ep38F)i5G<It zdD@45wyZ1>)dk)3znBac6D`OBDDBv8T9<1isUeMAiC*I+CImE;Ho~L~^JOHivm8(n z+{j0N)9|3xaAJh-&B~p&)ZW@WIJR59=* zre)hOPS6qr(HS)-r8SHrO8vbgu|#pHYe?rWuvXg%zohhkHn24mbDwXq}9$tbEYBTp`(gi2VZSIG3?!kQz{|p|8V}O4n z#P^qY6etk_6lbupJw-r;52tPbkj=8^Ji`h;5>j+jmY_ z|5}p?2Hj28x@$|G1#ItjYcgfU2p)t-wi|am=1}jt0)w)<8uMt|L}6_Z=SD(GNi_b*POlC$kDXSWF$e=b8Ja2ceA`smi z{z51jf-dX6To6~@vyre=caPEzZi#ct$C*FDJgvv>xn;nUI&Vl{uW(T)7Aj;!m5hHo ze~@eay7tR$^qg8%Qq*rl$rSaOkJhT}Y!aGsJ=JZA3yO=h$a8%rC(bQyyVTJ#qL+rP+Aw$tz~=@u-TYRij%?hJ!rD;NEZAF*;gNlpek8sO)%Z1Wu4{M7ofrlY5%5$Hf{~Wm12w|QH6-sKY2&@Kb$)X^3Q^}h= zw#wSIXC;?Z+Rgb=^t#UiQ)fjo`+K^w8D`bgBUHBO$cu%`qDy${=U#M3E8TPxmJsQ} z%ze)EN@`=RCwUcm-j${=>u`dS8(s65DEX=ajh)yEsbD1ud8P(+B&NtqHmm;xvWs6} z*&Bynw5oFV`cay=6j8nay`ANv@_aB^N@Ks16Y^~I+IJIjqvq`{+oJYu6RWrS3*(-f zIw>|zTKVcYwwVF95Y@?&Mc)x=Uak5WeHnXQ%&kUiWobpwD?Jrnm@ZYr7>Gr&>M@>3d`Cz-PEF?nM>7w+4W>B%Osu^@9R z%okNpUB*UZJfKexU?||m1}~c}W^!X68)BhAVf>QWU6zWLo=ipCF>zJ`@`B@hHCwMb z67yWqd1{h;w61Blf+@(%R+3`o>~LstxV(-4qpuw+)lww*b<}k&r5j1fI;udn(7xGd zxJ%QU6Bt}dC6|^)c#VR4vh^HO!?Ci`N*;f>DBPBFnl(3YW2JGPOHxhk*^5f!5>xNc zmomEWBqo?%ItiGQBEXtRdTD$C%G3VlcKcrVmeMlv(x=#bN3}ROBKT0C*&<*6Wd?u zr&K7PCmP%-(Tl_`3W~MGNM^{hPc)He_mWVBZaYT2Otx0FWR8_T5g0JSl}p2zhnvUj z6I+|auTn**D2P2|a$7c5OAa^n>3=*l>D$=;;v+5JTDiH> zgyYE^mz0J6=lSJL%IW3Jnv`QE^t6n*HL0?vRMajpbX!~sO%}lEJ7^1HhL9t&miJs9 zJkm7zjwoTY(WOUeOhHs24BT%>w{T%HPZ5}G09UR^SqP)la{GUnyV_hO_}4j8@&A3! zJ5XoZVlH=B=R3>efmAs&xLU$^I}7x^kK7T(&qjvU&>?eAD7pMBin4OnLMmL%-p@*6 zA*NpA)a~97FbZc4tM>(V$llev(i@h2Dvv!XSmg80zFpy_NV7}k^c2Z8vwBZ@7y}y* zZCH`=h)fG*2}~^KF=#EBRcOB=+}DT{jmXL@4=)`tx0kEPeBSC%q@-*`GG$XdUmuYu z@2mL=QT(`f1nGEHb2+n$p;kOQ)Dq*_DsihyA``hnlY{>qI(P+iM>R<0^LMbSAyA2)R`EaJl#~_T?qZ~1Pxb} zCC6=UC@RcNBPNDkx#k6VHe+n-5*u5mUN;Rbw}j!6CIIL(R0ATsiUPTWKur+2Yvv+y3ib8BAEFUx_#`JFvgT zVEw5)DPuYtQ}c$U1}FDh55}kD5+a|((O6M(uOwl`T7u>eNQ$vnX~N76!FokWJ^2F? zr8E0NyLzgl8@r51>H`zA??u+Fq!Huq;oPFqm$xJOtGx~M*QL}oZ7FLDup<(^jWd-ZM z<)vS#x!dJ_vn`F4nipGnFZZ5v1JvS^@DS&G7Cx>2TIjwa;r+Qv2|ZA*?#lPHOKOFG$J z{!>pC&a66p5Bj@Z`Y{~X)x6s*X~?WC%})QcjGuZ3q}eoPiBU@&-5^@%PoYVnHr6(@ z=)C`-3Pv*TG&33Rh%_&4()CNJ2GXPFl5+E_)3hl}3z?~7?2X)H6m1hU(fJbi(GTxv zv0&Dl$68>p0cC4y_H|Bz3+!Vn=t8(sC1FJ0Q(}q*3paBW0GyY;9)Gw3n~^`{R^n8xLMgLCv3S zKEh{e+1^7ZB~CtC;VFZA^NBIv>DIHWAqo-P&O<>{h%`azi+$bDG;!+rV`}f$+&rC# zdtJ=q4*wAeKN<6XAyDrlo~*>93@iSB^@yjIuz&T4C;3>WmK0ZQne)GSEc1W=K}y|+ z73>I1f3iiabt~D0)$_1IzcBj0{IG)OA9_p8O0E6K!oP*bt*ZZ@A6B3k_wdQA;A$6) zJ9+=+W`3~tqmOj`(;c_-=%e=C``T&!#72ewj?1>8KdPBJmj+rNAN|KROj z_pJGUJ~013Hn?KxEJ4yX-bw4QS5qVU;iECI3ZA04rMP)GV-uPYI-l3cc>;`gFwWk{ z39&C%7!TICb~~ST`#qja#xHAGvYBH-x&48l*`SyWj&HhVTrv;SwHx6>8LS7ap=%s5 zn=<|2(jED__LFiOQxTG}^(&T;`30tZSncO(e%;4M9sGps>$EpYo!^vMO*y`md>+Fc z{$!X8@C9hs!%HHXQT1YfFvbrqtFxx(0n{Av>k;ORue%`B8-l^>v_hbG!ll z7Yt7Q4TuWg&3$A?Py4dRPRJW$Yn1x8?ovhZB$8Ji>UlB8FG_vyip)|9f1#4dBrU}@ z7c|CBLlWQ&hVB}$cI2BvtlN)Lxqj|qBfw5+t+b7AI|i1`UdQSzHODux-NimT8`qRd8) zUkqth!D&@WEd{R%n6E&Ydkn!6Q>(;FHHjkm;_AE)VD8B#f1{xy>9;#}!=qpQ@?KDh z9l^FO!)|s8O-%pZb8wu*ub54)v~HSt0Ynaj&e3 zssb%cr{IH^qoi%!jjZBG5mamwj|w(JPDTsaF=aG9o>~m`A!VK~Z-nG=47-Q<~iz#1NvF}a*? zBww6gfcnJvA4zdjhkqL;7?UjXN{+8V%T!s(H+KAw0@ZHh>8T}3k(MgOFTp=b+vXOx z?tJ0a8Q9Yjm7vb}pB!M!oUzRr00E^EU>Yr55%uj!b#Ktj2kyna)Lki}#!FN^uazdX zVcs)LP9Omi6(~`iDcmp1znsd;BrLUrS(9=`kDoBvPQvvFOO2~#fs3x5dYELnfio-l z%>!35^BP2v`@xjdr-g-nA;^_K+?p>XNYo^WB64DY4!R#GWKEem!~PJ++{u*-5!~UC zDW@iolregJl3&A@hRU-FN^5@v!R`1JVB`3U9rLY=q%6iqBP=f|EK*uo$yA(jIAJbe z2jnTOTL_ptxOQqt+ynPll4iod*Q{DiL_Op-3xRHCstM+6-4vW4h4JQsJ|vQrJ7IcC z(YVwNS9zkRIG@qrjd(pNu$s5?nk1SjGa^A6TloluSsSNG@{6Si?k*3nL}BDgZ-!no z*O(VuRjjd+rm!H7LE~ZGFH1dqX{I`U1Yi69N7+(LMG{9#qPgo{5(&@E%Aav?-WdN) z8#=L>8+gc2PH0gdy0KmpWzXS8GgCyw{L?W5YcitEYpP~Bua9-~@(TGu7VkAJ3{_P| zyY})H@~&ss)LCU)f)_@r3QLQWf=!CBs6v0kMI}y3aLE8&9mdD$y6!*$=`-XVs#M(I zQt71bd)lrnW9<^&?Yh+4%JkiuN?zPBZ)-;*Rb}O-?UxzdCVO2_pY=+-hwJb37xNaP zc~2-VQ*=@MR&yQJ_8AqxED!Xh8vE`^R!(lNZ=7aCa7|=Cv9@%Peyru9>T`V~vOFbl z3X!ZRZ@ShMWnZ$|zO2kzvg}h3Us|G?{`>s8k!yYr=NBiW2mEpKEro=NY7!+g?{V;* zo2Bf{meLdB{#%NzOO7*1SxRkR{>qv?A$P|3gi-mjtgn6a&hW?A z*w{nq6$EulwQ$fqj6(hH-4fn($(k~DZ2p)TzO)<$1?R)KpyeiIQLj^XanF5R-Q62S zrZsEtd3|wyXEvQBeedf!pFT#H+=N>7XHA_xW~{%7wW3rm=c{rR#4%7kt_xKzvfnZc z<|nl7+R)ru$jTctYfPRiPQJOn#>ZeP*`QM~eU(7p7`0=RQBgi0&!k57^*to;OG2ij zph{`pc;Lpsaz)?HyD_wfKSP-bD6zb!WB4j`uLd|#$}#z_hbwFfCfEKE&! z%qlhZgAlPos=m!-kK}A`>9f6?@%BE8S^U)g5zF=-2H0f&aw>JK4p7s?ZIqN6`j;~+ z^pd|(n^{vV3G)EKS&DAsBwp>O#@l_2u$_|E|GN-dg6)=EpPlSqtsniRDLZI?;aty; zC1pzbG1V;lbjklEpkG;^_P2#tIA88HADhc5S`sQ}Uzw+#%l)O!ybT$3KSA`vrj9lt ze3y}+#E%ZQ9Xhvjk@+@HdJJrn^@Dy!xLrZ@Myp?<{g9WrH5V%5)vdasNAp%^>W71U zHKfq~ifgp_2C4ZuqaL~O>mmKrBOGy>kRP9HHOs}B^l2}fsYmMxs}8;|sYi7c=DQYl zQ?-qDu=>xPy#!`z;&sU}RDPgB-^V`&19!77gMO{^F zHO$vVn({^CrutS^(|m3gx(_S6Z@bu!+xRnFZJE?!Of|3J>r1Wnt5(#1n5=LtODOZx z#^iNemwMaIXKiU-+F|U*mNM}}(8M>p5N&jCes<2JetDJ@jAfXBNk)um;825ky&MDso*9|=p$D86zhF&imLN|2YR zw#}N)=Z5*no;7s0>P)nTjGPFX>-2f@#LJRq%yzR)Zxg2y1pKML;rdhF< zgji$nBUtV;xL=X5?pmbR*C$Vz!2*|8+W1U&MBk@l%rQB*Z{Jb|>M*LxRNVi(89FeB z44#V__Jfb+*V^^|R=XY%|01br8Do|%TlbUk$@JTRDWASdJ|kzG(OBa5qHa&`-)u~_ zFV>SxmNIj@yOOmdPRZ}XNT2j|g-C_%XH)DDl?a%?rZ?e8Xvz1l$in0x*)QQDU)AgZe&3cRJ9#x+I6#)C~ zc*YNmk)M<6=865DsSBvTbKA}{#eBcrE)n@kx>20-s?aLUm@;3)m@#Eao()~fC*PVj z)#z@X>om;`+wZCBRy}Ixrzrf`gg0bZeetb#zAa3@l7ET*q<=KPOCGi~Q)AIcw1jW} zCAxSrh8rKJ^M)uD)Y8@zud3XCeZzJ-*7NLRt9Z4{D>7eZQ=#(R%G?^K8x7otoXx{7 zO%t+b|9kr`LA-Zw^FfD%H(fQoxoo-hx`AdJ`-K8JKfelN-Aq%sTa?Mb8RiWwlU1cR zAwS2gTq0Grl)SVMiZhkiUzE5=g=Vi=D_)qXU7A`@V7^kQ@g`Pf>|SMYvx-S$<|uj6 zm2DE{N~0@3fyN(tFiH)ny!D#4n=H(LL)>i+3ru5tEU%l{WtnAwpCU1;+D9&_THHno zx2)EKo7C7IN9`1LdzCuBf9*NL>CBjJot;-;7zvsI+JhX$fP zW|URq){0ttbRzkz(paU6n<8oIqMEq8wkKda$xmr7VDgRDvS8!9358de|X1(!U zWXhiuO#C{6OZ@y5(M5=tX+z<*wc%Ksfm~@lt zq|*YGG0g#dxmKIb1iXbd}brlLEWqEKP;68+hJ@DWx&pf<* zvHSZ+M1JgDRbWY$`}C=`NL1~e8Tl0%8Q(cX=|yyEU8PwXL)c}-***Toj=0@}7J!%s z#ic3KOg0vrUF`;uSBl%T7~e=nWfSwVRh@I(CV-W^Vm9I61 z-(#%O(%UHwgaM9Mk;W1AfIIetrel{2ck-v-c#qi9X*r_w(!tAHn4?J?wC|(k#-9A? zV@Serg$!rrt)!kRE25lVm^Wg_m~hjXA52D;jw!ZvHriW1uUZhX6tJvv71PUBymKF7 zZ|Y?=q$SP%k`=jd4;wY^JehG^&XEb=>F%H`cpr@kbC^RFRYA9htOK?mY z5sp>uw+u!i*yfAmYpDLUG>pt?DBEjAYz6JjZiR7uA|z$A_lz!cmcZ`hQP8yUu{y|? z;Mhno6%xzRBVn`?%95qZnMSaVsnO_!ZPU-7j~2&V4*6->R1Ibh6mN=1v+YWNWoW*% zV5wnPf3!iAk{v)P_CHj0w;Hajh@nu&{rCO&dGF@o{d?rh;$n(O+lFwC{46nI(rXA# z7>y$=A07|B*MWusjZ;X!{l>9$Z(qab=1tp}b_E$YPdQ~Sqp17?obS<;)pPC* zRdcQdd#v0f^&I#{a(%Zo-hR+5eX;pm1bE1DoS$jkHlJ>;>;Ikgf1vhq6H=tMv}YvM zY7XXn9w-`p$2E4QGN+ysdaIDMd0ie@FKb;M-?=st+g51v{$3EZ9&Z6y>PqNGtyhcp zVph#oZo{ViH}^B>^{PZ#aM-7v~0CzAnrm{59xSv zahlUuA~YYAE=Fr+U!LDuR7_yinq}j1g!QfbcGsRFB4I}}n_pH|Omp~>D_4ZA|se%gPX86V@LDDZuJ0H@*C;FFUe zH2~=fP}THY#@+03bxpgqi3AxC<|Tw0lRC~gIj9Umx{G7AO6^hAR+Mh-3AN)Uwlcuh zoWxt1$*0;@7*iTlsa|(Hy-jQ0ZNIY9VzIe{Ic?pi1BDM+0Lrp4~DAM2!hUJ15 zfb=v?i48mXB8h_#d*-beUMXu7jyONg$wPN2s-)G-!?q>X+GRu)!ns)FhA9iJ8g?D zZkPwcC$OZtcq?r+mM*tGJY-_Px8e@1noHXOt&=y4o#Q>ba=G=01z!E3|G;JqXHMJeD}N+J z`|1be#P85zy!{g_k0%&|2bG@60tA|+;L637D$O^L&VT41{y_3JHiySB{qgf3?%e+2 z&S!v#PnuSj>5Th4C+q;nR6PHQeCMv*5ohZgfy?4Q9?{}qTXfsuC2(3LziQWIf~5!1 zdDHu-bLC?};ioX_Q=bgYIA%dI-R(zfPoI1wLZkgqKG{#Z6Kt&Ma-pdbLqcF`0cd$2 z6}Wu6-p?zF&U7xfcX=Fg6R0S-CNL;Asciq3)&<-{_T%m@J9)ef4xl13 z0%<;SP)`i?ow` zW!K42QtL|2MH~2kh5A%WyZQVv*=wW;GF|^zp;~h36VX=wwSMpj6^i7cx_T_Pp+sPw zIlIu#-#9ZRwmvB4`SRiNn@lgu*zD|AL`96xha>5Ie*jK?zTDioE!uhKGxe%=Maliq zmkvwrjh?HDc25MJ+>3BfAJn!C&@a)7v0Sq^o&*eLh4js5M;so@+spgQC(93(AO9(x z9C_^Ki@~PRJ-rIuI76W(0dxLm%r%eyOrC7KnYQ`*xqtm5E&Pd}cRq{X*4hfTIsFFU z{QYx1ah*d|)7G7{Z7S}(8cA8b5K;>nEta5J#MGqi@xk#ijyn}R`)b`U$|A9)tJ`ZE z8@7kEkjCa)W$BFCpRX)AQmi6|8l|$AQprK6w&fZHyd^1WS8i@m(VDT%$Jyegj9YAO zoqF`C-tF1BIXOGlZlRSdF&wbF&rg+=unk)D-QW2IhE_lIPu=pHzz&DX#l)nn)LBcd zG7hDB=Q+|xuv!uh=#oVeiDC$fQ)lBd_DuC$u@t^o@l;k1sZ5Q%O00<>7^)}5*2=xC zKaf6aUbW<=&a4Zt)5MA>FqUE$X%;XDdQJCJKGytWzT zQ$dkbses+_QlQQm&MOqFXq@+C!>>O&{=eK>-+m6aZ<>F<@?7S6sdb^vDDy8TV@`9w zmNQ&A1Xp(l=&_+N^Hh(ug~En1;w_ZQOlX`@QD97saWK8q>ZZWVUG9bqH2@%85}Ij1wt#zW|zcGj!mF;Ri0 z+hI{eFr;PPp`FCin7G1VEgauuty*D}h_Ssmg55LYZlwtzdF~8m!FRaPt~f+1GMZQg z*jy4pSl=|;E*W(Pw=L!as+lFG{jp+l=ESc>+#0A$I>{^i-W`0nE0~>&B_G90^{*{x zv|HCSy+3-bS<a2;;e0qq# zhd7s6$jcuuV&TEgybI4H$fk)-v#HR+R#J&fbliiuEY1%i0HVBPrpTX?2D%?H2`BE$kq2LDz- zG-*ddejPxgvy{Dq4y8%6k^0-#1odafhH4zX%|wVQc|jYQ$rL>mHLzU;TSo`xeh_rv z(cNWR-1nbMEJJkY=hnu#Vh2}r#xMvHC^6{C)^L_>)%*jgOKL!p6?3d zQ$ogw7Hl`Ejq1J~FHBSRl1d%^$e*iHVX9W&$`) zst?`cVEgw^oY|cV#QCxsjCV%=KSyP6jtlPx6LEGkb7H+%?3ybX3li(Ig4c;NK|VQY z8R?IV{Kh$nMbea>P%pX3*X)u;AYLcEYjgc&9x3Jq2D@`obV@bjBhrRrAGcASo70=U zuFjAPJbaBelr-T;lB!Ps)qXAu0daHWPq+ou0eAfB%eoutgSV5^sWO)D=-}uWVE==W zxPz8AzVuYFv%1JSd9EIs4%SU%bcNe9Bs&Iq!&zAygaO-gkQjppgi7;$iZWDsLLRaR zcJ6i6Sc(4B2Y@?=*yZpXKl?+WFsXXAa8ts!$q;EsmA*=g{J(?NO?9wd(Yc+SxiWJ= z%>}}UO}x*JPO0f_;>**K=B5|P;z=cw?&c~?{x!OoH$#c0DQl8wWe5g^g1aYG!a8#; zk&lVtkRJp(t}FQ%lEDS^iWJccTv%}bRLrK~i>~7e!$g&W(B>c>%k+v2CI`?+7Ex`r z?DZvlh`YirFW{w2l=iyMpmNPSpbw`}}{$LzQEAj+e*mxnq ziPJXKVjfN^-Pn4h$Ih&)d(uQC)^(S}LL};kEI(ALXwp*TX(<)D`0Wj(9ks}b-mNi9 z0Xv&)`~>9uFY9gzkS9ch~jad&p)*C0+yD0NsS|E!im*e7K zXd1JG?>#FsIYVuQiwfKQ){xs2nY>^0Zn7@?(|=PfcAi9YG7#Q8AmBr{sB!3+QcTr} zdSrS}scT-TRrhR00YPLCBzBs3OCyFLQ#Zr#dB{xCK4|M>lMe5ObOiP z<^Jp{oS&iLJEjegrxzwt$M>z5@#6-->cJRJ*UK<19%DcJm(X^Z@f;sD%+s%xJL$dFm z`?YGe@w$*Ep24AXMJwfnoNDPhj4TNvguq8Efg9F=@oyiRYI$$G^0K zn_8N)yvyNVUXOIUiuczHGupl;A#wU4BB}4s1_XGp?JnRjbd{YHc6h3XE2Za5*Opms zKDasl;Fi_dE-h>QLxW0}N{$>kFV`Kmde6@o*1;=)uW#(FJzm}3X7HSRj#eTv>QSqd z-I;rRso`E+kMO=?mqb|4E|arft79+Lx3)K)Zq6#H>w{p&0=q=x680JHXr6owdgT&1 zU>vpeND{0Rqp15yrJr-Q+pu9P!E6)#A&K}?oBU60hv=_uXINX+bL~m1mv&sVNEN+0 zf=9`WfO|KTU3yo^nN(^lPKNvoxxa_(<_vitkMgp;lb4=#9Id%_vEh{?hNZs~|6pq! z8bH0Tie{>E7eXYCDr|5Nj+eG;W0L(x-ok0V>uq{%5jK;Q+hU?q-Kyz1RTnIgwxEsI zm#G8LuQ&2p5q5+=JUs7g`brHW9{ajL01Dy(2h3~bfNyRcn#UMPx5-3((m*|IX|Ymh zinaMVy`dv7i3tFK;xL#!@2O#qwI5Zqvumoxl`ku`8HBE$Wl5aX;ge&QVi2Gn1kBLL zN0mA#F2$c`JU>2j)E4VOOoADz%#0(8<>12VUsHy4I{2dL?;H_(0 zMdq{!uewlawmPXT0}$F2J7TOIUK+`0AxwJMK0tly^v=DJ^6WdK2GM>yj5C8mx`yfK z46cbdy_{6Fl44Wq^xbpi1#L>teNCM*ipmVKSEA#4lv6w$QPEtI z{zv4OwdzcC{D+waiIvR}j zWkL67K{&8D1?w`W$78z|ML~-}?sQxv5Xcd5PP!i{>WXmo#E{v4iGyO`+>KU3uWr~| zVm4Tc39dT1R{PP7-V##a(`S1`m+Wz;(#i3`@#Wq{%b-bW zy-pGP#joaqO6cQ8Qi7R=qy0)kXW~y#(xEvyII$H4AzUY7f=j4JfHk9lFy7kMQI8kKVnmiUpvI_qagVo^_H7^fh70&9*(^7H*NpIwQZj#37<%IQ~g?d z_PqK<){pAf)#tyx?MGd562BUZ@Zh=Z)rmMl=!TA2e7~l>7O~Rxm9}WwWrJqzd2nf* z?9{Q$Z1UXm31ji7Z_=dR}CiCw2`p{#-Ac?PoW7cOeeKJ~@loVW&r#4lpXhyf`RQUc#Ag z1?)!e-nuiTTKD_>e7c<#4#aFC=B5zM7DL9YBI@$~Qw43NBK-C!&icXs?3C#K<~7Ym z94N4$$FZD{lq4G4a|=YbZ)XIA-iw8nSOo=TIrI$bJW{{k^khF#uq0}^q(O-Rxu=D5 zmYsnlq(lmUegKEa)n3Bt>7UihQY>0YTfu5&7}2-#5`=rxTLrU{_Yj*o`U|ZdbKpUa zmPKTxlrXm!&~%l|660}im2Ps*m}`wWHYAQpM30vuyYt_2f&$`d^(A>3e6bgWL^V5w9{YkKlv?IA8z=Mt!uxXVPS zbazq@KfmO$WGrry`vmv_tm*ibXO3bQTMSY{2s?Lj5e|s&w9)4lff?}5K7e5MPl;PP zY1TfwefxIrfgb{ph@_xH{qlf>K^*#LTt4xVOFQ;~ex6}=gbtdzN;x{zWJ<`oMImXQQ+3sBg{LsM?B zLQD$Xm7U^ad%+=v-;I1rL(dQgTj!-lVC~y;jt2QPU6GP!!lW{_ug(v9Yfrb=!wD;M%5)9;!xQeRVL)cbO5%sw^AXGQD`1NP$U8t=8>4{| zD{y)Nc3v3~_Nvs`%j2WT$S8v|MQfc6QH{C2M#?Y7Ifu{x72z(8-Cbg^aZtx>683nBP5!>pch`erZ~@88vRL zZauk$o?x(_A;+%Ksv37=y{925#H77SW+AdOkX#0_&uA{N5#L0z((dpF0uxla!eABE zoAKqOY^B~>q$R0^WYG!r{NcuWXLlPZu@lL!uQ+xL^37}l=Id9-9BiH2#CwrH&rO3E zoqT4}(`3Glr&}8+Aal`F)}N-L>FM@^oq9`XKVlAt!+O|x6HmX|lY`Wr=PhJflenQmsVwzN~3%z7HsYJc2hQ zLMsAR6iJ)H_LaW8@_#wJPk1!U*77;V)Lb$bU2;Yx3->c-6d@_4-<~w4VJ6Y@R>tt-A=b9icI->bhl>bQ!N_b}p=!c?j!Y zKYO~h6G`+;4RGST!ulIIPZ{wuO|%G2&ztKi-Fx9c$qdSZ1E!4*B=m9_6NLQ$;e<`1 zV?mcV>*x+UkxoFvEi-`_Zo8pFNj+G;q(j8Laur>RTl6{EGXk0NDkbZ>bpwq>xU{Jd ztyxYF*=pUHX>SCr_q^X4D z+C%tQAS)D5QXJ}V4BF2`?N1KAiAi*`Z_xESWG$GP}Gzer8 z2X!KHZuBfuw{Z+fd=$>6$LfSXFKk2P_P){kasVMPd9VK7EIrwHw*BcRqfbbKr~s+v z(X;35{8E~bwDXB_B*_)vII_0XuVXVzy=J?OVeV3!8xM=#gTsRCvOOL#IMc4{JJ!Uk z8R>1Tudi#8<@4JpK@DAhZQ1kfP3Q{Jxs>1EBoD0>s2KxS53$OUbM3sFS*#L<=NFPw zh8?ACSm4m6PLllDmO9oxFP^OCr~c*f)Dznf&?bn>$cP{gq3k`qwHOi;5KaMLJ*P!BZ*D<&urOHP%noH&-7=aAtIh}{@6|efi_%e z&EG^5jnhu_LexilP6e+m0JW$}d}~_m$nzO)Zndd{1Yk$>Z@H`am>3~i~d2g^P=w>?UGD8Sva1Q5Rsbwh$+hufyTHz~`yvaalUE-gzl!teX$|HxE82bJ#X~>eMlB&5!USL+TyXMU)LUEaAP}4mZe}BGvtJ^SD_uof1sVaK!H~nkCaM z@pY$J+IhUq7Ze<*WpyJKKi)_ZFawDIJ=H5RKs0DmLk+3n>zYMWvWFiwAJi(yr=@M#oLK>RZDTicAWQu`(VFB95y@Rab49M4vJ>O zAxS7UF@09yTgK75b~ACj=qJRnL+J+N1B4zSjiKN_-RM2>dn25>8LOC;s84WJ8==O1 za!k@caW~{IKhf5H62>wiChlFB)}Xc?pzN}M9aTuTGF{TDUv3h;F%?fDK1p(iKd9WS zG?7*;4FGoeiNfc>Z#^Z;3a2e181s|It=8(ukEEJbcYjW8y zo>DZNs30)soO}T?7y0t5wbf_M(!=eieeq~^WrnyNQ)T%}w>C06kH31ht&EWD^Vb(} zOE1s&gwnFhVh}ZuDzdY>^PCw`8H*I1D)j8x+TM#Nkj#sV1Na2FOdo(Q^^94O?I`ks zFP+z0sV5gB?@6a0&$d!GF7TPLc-3}CpKX0@OUE=~5Z!z8lG6$me5X(hcXkuGg_#X( zfBHXf@2%}@=>*`bX$aUhoq<@XFE_sUa_ORxuu?l4Pf%WYA(>YSz^csChigw*ee2-P(}#4D%ZoUi*+Z%MR%s!7Rh(U@)G4Q8 zfZ7#yR=59sduQwU8aRJB7=PE9*o>1kI)1gW`ROMaeee_Gw(UTnPW7)p|7`DTO+S10 z&F7yrUvICzSPwl8ghuNjbliK4#(mAiI_bZmKgmwP#)mrCe;t;VpD&cLwR&u~K&9V1 zVwcmW@W%1PB&uY+LQSAnQsMG9HLw8SnE*{9g_@l}EY*St8{ZD!^vDPMVEdu51g2BV z=-fj>uTBrJhR}ga^-y6lXtJbr?w&FKs<$TLsICqTcRk~5;)Mh@qp`)UPwX?HZ$Wjv zSj+HlP-YxV96vxbDPJ@c{<4uXtv|Ip?oB=6-XQjr0}56>Wk8JasE_J{Y#7!*?}BCc zwFCIt_Rl~F4g!Hkh1PQ4MVyp5OR(SP$*aoYDTO^vclK#C*vgAaaxfZ^8zwyqZy)}4u&v%6C{Irx2VlwH9F@x?7VrwqC(5hP(HVt;%%}^z+&k3=wIW*!tXEEcQP*s0GYQkW8|-$ zQS82g5l4m>TDb-m!dCFUcYRDiaJeZU;92;IX$O+&HeHouKfyvl9>AaKCIEIl>J!%6 zL#cmy0za?M<-J%d-QurY=oU1BO&GafeyK|+;k_lOhkTXXX5`tgq1j}^i!ES1N|zod zA)Tt#qsTWhPEUnpsif`9C>_tc#o2#_YHFuO@z!&rrd!;`y0kU41I#!aEz*a*Em5j+ znpCGMe20Jv zYin_Rg^?@Yw%?w|H7by%Yx&e$#?ixP_loAI64NRFG9_ zA`o&}^2$uD5ZFk=sUpJrpCkRWr8v(_8@|lE=;wHq|F07CuQHrx0`hnW0af91Q^9&OhhN#EKsQ)0o zi7PfE!4fD1Xt)DoUb&({nLlA$N2%Pc8#^-Tr=DpR(go+R>u2Y(3Bt)=zSZ2JbdXK) zR5uX|E7?v+cqE+M+mc+aM<`sAOy}P-d%a^mW_6nVb+@0(A*!YAhDN4GxWWa`C(yXjn1%;WPM8i93Kr@U08oQA>f#&(gH&#^6N`jAR;#!!x!u zG>cD6D_9w7tm8FoRs0xrkhl(j$Ch-xg7X59F4PBZ8PAZcaErc_X*FJ|_R!<(EpN^B zONJZsA~0UA^Rn_}((748im0YrNl!W7@lZ-aTLEV~4?{_lrzr z#AwA#`ne>GQpZ~DSt!?3F-?C#K0~akR*IB+eH+j$n%^+1y+IdhIa}GACI4H;AY38*!_*MwD5Jt4}!~kIYOG6<{X>n5}rI z*zqTucW!@r`!-Zh>ISRko{@f=9BF>`9&V8H$lh1=jP(1q0%2?~m?5npkC}19JVg#j z=1}?F%zB>UpAADCfE4vJAjJB9U>3{-HW@n9?{+sjZz}k(sq8(gu*B-#{#jih+^t&bI&)8-#c|bJe1;g zDg)-FYG~RVQ(&qBoc&Rx)lgO9_$>9MF0nh6LgO1Q^Xy-oOt>kqxu-MZzMg#Z$HUW$ z|G;GN=1<%~cR*X4=g-F5lPfM>Y~OvDuFVX+h&x`XZ+1~~8Q$!c{{ijfIiRQVAYvN1 z)UoPFT_7fLeu0?AW|x!R#`ev1Wzpeyp}7qj`Sdad^Sw2q1M>h*_isi?u62y%$uAQF zS>rHBWj$lYR8CUVx4s$eyXH!m8n0SOyI{piO1Hr91f!gUg5c~3>H|CZuB*mjL#iVb zH=f{6{Ias&27UL0i@uiPFYpRSM(H7_g`WA_%@3M%C7wqHTn%sabbYbnH^R3p&Rxmj z&J&nrWST7TtppYo>)crP~G8b!P`BlLXy~%hz_o`ptvFgOeVpka>d-wD9A0H z{j=c_rV|Q)F0P%-p2;?y!K54Y{1-FK2$wO=I0~y84mD6UJoYRevU-wqG8P@~1;c?3 z3^ST+ahF;#PB~5_h+V6g@njYm25^vB4B(cZ!AC)T$$d%xSubPd@7Q>rW zgbx9eduYC&uI+8TSan|79hfv7(TXh;V^G6Yb$hI5*0c|)`+CNqR2A{FtpiqC4v=21 zCV232m22m{^5rPZlLN}qYq|nan(`S1r=}EYjI$z+gfTX$q;*V~Crmm;*p|$Ys8lSV zbI$A@JR3qUuEsj0G+6pxR)XAsWB@b6*iyJ{a3&ahHu1u;G?nV9 zJ*=e0G6ua-$+~o$DQ=$0N)fO>4Ugqc8;s*e#@)l?D>Tn?{jltGJtp!cx~0qf#f&5j z9^N4<=Sp@Fr+{vF1TS@O>&I8;%Ag2DlsSqQW@kh`1{ILondLA8EzQw!jOlvy@zXEX zzvlG?)J=DeY8}k?E@6QEPz&u6LE^tD#nKa%^_WrSQO0u(pyr7jHY^kSmFgeYg}Ai5!lc(nVMaL^SgaDeg}t?o?+@9q;T)@ zd@pS3dpgF(7kDt=m5wl;y7I%zqng-@8>%^8l?+9za&W@U<9xY*_A9Bpm53Iq8WqTH z30zyq{F*>(S1755C0H1yz6w(E3u^Z-1vQsGmU82Bw42u4xWS-mc;FpQaHVInkuw!0 z!dLy2%MHdSa}ki|O$-9QWJ|nND_s z)~+y`I8TDcI9@|g(;J^$UzuP7WMq=Rh^&?FO_5I9BttuxyAlND@o5K1K9XCkY=G=& zjm?&hfF|ntHUU!^L+dPV5fyfY$?pUf~;L*-fw1TlbIoPEdx42^5Z;s9+o^_tvMlWMi(W_G? z4Z>-(J;jmOCNur9@sZaRaBiOxZ;&dJRZ;u3XIEhnJxx$IeB&W39X~j_^n5I}18Qw7 z-J(N~ko1>be}#?GX-B+kEC@F9g~tWSkiKRkYEIae;Dpz(&evzT_U60?EW?RHxg0%#>M zXr`eAxSdMw)(NS0Ol6=i@~Lh%HlID;p%TL~K|52VOtz|bPH9XOPt;AgXMp^|!WvSW z3>K*#41)dFL8#E=+;HDymv84oX!j_`w`s~PP(4 zNx0F*q+R1r&Q4C_LFY{_Hawf8&B?@0U^il;$1ikKAWl!e2-G>vUrI5%_ph`YaY{bd z+Eu-j=P%Q`)$Pq052fAfMHb-PJ;{BhV3PAw<`7(AeWT~wCbL7%1jSR%KMxc3Laj() zIKW#4n6m;f4I&%m@sSXXHk1@RVI9LUhuow!^cA&2nXFMkM+Rx++rGQApHu3e)CMQE zyv4i1B_?l0UxCGINv>ojQXWcniJVikkDx1ddxjiVUMrCvFuP3L3>nu-CBIy+lYSMH z)N{?Ep=L$=^qfOIath@gr^jjb$NJ&zauD%7=&ZD(E|ksFqQYklsbFDG;bIs4|5j>; z%BK-d%h#AC9MH0vIpFS8dq@Yk$8BYa-mHVi6xXsdR-qSWg`3S#>4X6&gc9lD>6y}8&|RgjEGiCBp`M8=H#wY z$eAM0Nv4J{Q4i`=HErH4Dl_#7jPd4TLsW3{>4S}(ZO2J&z9B3}!WX+2XDbNL1PeV0 z@Q`|;zbybF4PY2&w&7g=59|Xy@QtZCb5)k!VreTUeFk$|HJw*VkautXc7pAv^>a=s zvaO^T?^f{zYY$F@5$f0VT}ZQ$`((?QT1?m_#=_1XakloOtgrnnr%;|>FIQfGn6lfb z_^MxKqaz*^SB51$eTYG3bZjBJa3#Dm7Y4ma-6<@1{nU70gOJMQhFa2Cukx-2rF5+) z4ZAyV)a;FuuWvfgtL@_KpFn`}Whgjg!_qvkf%FOiF_EVDS!6%s#X^FC8N<@1jN8WDiVz#^ z=#;tsrL-V3O1PS$kQ48pP6stZw@N;j__4<}h9I1ue@D*MijsLzV~iUA9u?|G!NBo` z)M#n3G$rF6tOB!Zj;cr6$w;}dqzD)ML3xs#UbV|zyXa&LVXlLqcb@G&O#)aq0}2$- zSoi2+5p3MeT-&iFawU6?j;e9*GBGc9k!u{ea%qJ=>gq9NBF$G?L?m6rWKq}BLZJNM zAd+=GUDU?Zke4LOT@@=5r*Xx>OtQZzF6CHMYL%_+I6nk#nhQai3GLld(XARXndl7p z7dC44At;4R$6?r=4UR_qnZ8b;ijNZ7l(%;5&z;MvplEm|sD7Zg-Wtm`qp#s!Vzz7d z>7rWw@X9ty^{|qJWrd&fX6N_3$gYUVUX)c7Y@O;g`U!P;rpB=@H?8I<0Lf=xL7Xm` zSj;4=VKkXr-uAa;8&{hAs#r_M;pDmnrsz8o3e~kkD6HVQ?%m4P1%tk^`OKw&({B2$ z@Jci!HpuK@u~v(fi}W=?A*&uHol|AMQ7U&r> zpIV(!-JC`Nle|wi(|r4b2M^l6HRV$CD<)XGCfC#pGriiCt@&|%kBt%d)Y8uH*^q~& ze(i{vYZsqejwfz>^8+q{aLLGV$xgoX!kNhRM;jP&$^C+L-pGcJ$iqg%KCU6)3*&LI zA^^E*sB-=u1ZWPxpnaiBI&SN_L7DDL04N_f9)kT+){eq@mhR?iMDe=a3 z{7i$0QWBS^Ulu7$2;Y8BMi>-4*Of>Imnnh+dCK5HnEpTGeyx6U=3as9&(_3mx{}n7 z!AkzD&&buC%{zCfS-2ZL`K0wka~p$;&X>}bV6C!BxY_{QcnwlYrb69CVG014tF#dw zzJ|m#Ygk3e2Q0P3MrF})g3C~Uh2T&FkRJ0G%uhgx{q#>8< zM0Kos{xN)6UXVl@PpHuqYuzrxKh=sgiORw0@|yX6cg; zXFUA0^RU~2An`ur)If+PtpReXAT45JNQJ6nrgt^Iz|x@q{bYDOICkp9Liz0_YhSLf z{X2FexavdQ=z+u|_Boi2UM{!(^~TNu#U4F>OeVW$Nk5UX<>y7us1VKzfs{MOuBI<4J_$C*!0D?{dpEBoDJda+h4=C`s-)FQatntFe|@(rpy0 zF#Zs2K-&4;SEZ&OAGP_yRB*28NU{u+0BuL96sRBp)tq-B8Gg}@4ALdi3bpiWapo+r zr8Y;;=cfx{OUKGWU--+AdkE{pLrc0rM6O#snV+Sgk~G%)p}KtJ+34JY4mJ+^FMJX2 zB7&ZAbK1$c`Q+9ow{QK=+c!KIyZ>Z-bbQ!Ui!j&3}A zy3=<}DjtasF<0KT#Nz!sclx(~+uXTx_tQ^*O``GJ6zp$d7n2FKl%vq+{ZD?Qa=-bU z3Y1e?v;Gdzabw7+?qFOSp`|C3t$BL+>fK+@nkPh@zWdAB@O$MH95nY1UQUh%zq9{u zoxZsbfU~0sD*pb?a6n`RPQhooTIb$y{JWE5^|=(`UXbyPCuAEcb8+X^?Hg;Zv+D1d zlJF82h>uC#dVKaTO7@EP^5qJ5P4qu6<>eD`O(2UO+8jqP`TQ7kb| zxxByw?#7IV%G=g`0m4v2E>`l!nNf49K!)OB-Mic9cF%E-J0=blUnaC3@BY(MBw8Om z)^i~C>6;!I{+i}7`M!@YC){>QgC_%YO&ppB$4mr$P6hOL>cvBxtxg8t|6=p}bbmyw zmog8cUOu+jfTP4u=lj8-&jFi5L8dfJF>+g@wH%aL+!YUUK2 z0^)eNW$gEUNK&T&gM|><9BI@?fIY`25w)uE*zT(+oe6DA_vNL9$ZAOhTgzXA7!4=; zxJNoja&6EiJ3(tcIMo0`M`>cX1C>XI5^o6Nt&i#S?yrB1R`ez*a6^RILRSqZ4kQg~cyq{Ht@!7jS zpE92ebAhS!?6G8hHNcPSmHBaiJo!@vsNE~*MIlxJ86@R&a{R`jiu>uz|JLT=^c=oP zvnNbWH8shMoh;OC)Km;Rh;54(+eV~^(rL-b$wH|60sd1$uGX4p^)#tpa;7--@ReZQ zB=H&1QWaj?K0lc3)2DB5>9~`2l&I*-bEz*WBn_Rt|M15{oCjqM?@A_vYekGKmwqGn}hlA!)-u#3eAl@)UhY5BoS01E52_?sy7#1b-lOtURe$EvN@5P%?;h! zz`T>mDE-25ikpXyZNqc;)~5rEj-L+GBW}^4_Iw!0D&wBNVXPns?UWDJ9yGCK!VjEt zT_dgMc~)_TLUt{d+Q`FHjaziXoYIL0$`rP<5UnP36OR!0n)01FN++GB^O{#_U(sPm zDt=amo8V)MC<+Muk?3PvCvW8UAk+W%=WA;D^iDAUQp>PIgDYS@P-B(T zOw1bAcEyd9!_*E6n7rTv3J#VcwgG1@h}lFJ+hR5pankuf&y=o1INJ0Q1kck7jG*1l z@7SdOBrpZ%fjJLCn}V5VPwu=8L=0EY_`v$Voxy2hNz-E?%LJeUEln% ze=_``zd!sFDFrVMmNA{-Pm-asANx<5-FtAm;7b2=bbKFPFq(WCLR5Z0mk00u*LmuZ z{_@IpN(A9_?e(Scw9R8-aY z!>IIYeOv#XX&4OR{k2s`pGBbb`xp%S#IY%Q!eXjNh_tAlR*#6~1i>f!xc-Ub7AsZp zap)kdjVQiNwINHXWIP+p2JoEB4;W|CxkScxuLkH)lo$qg!ql?yPscCcGD>c|2qak>OvZyo*{b{fRDd0<)-bV} zOQrY~?%~39_1)k6))d`Nm!RTXDxE+*Wh~f?9$~s;id+IQPx(I>!=ER%f_Zk%g>|M@ zPt(OVe2hwo&DkEN&E~tmX#6@EsijDV(mNpew6>>i``uqpstIqcClPdFj{(^NGh>{a zjQic+IJ|?Wr+M7!78+srTWmgk@?dLSQ@MtX#?%k-2E>QOM_#2Pr5}Vq_VG_sZaFhw z_Fc`^7gvJNKuQO=Wc&~Q$8Q>t&%XWE_{}uo;w;ic_xo?(nmyH*vig4&7so5>4RQu5 zAMb_g{u7Sf&szA+wla_0D z%knBRZ{IlJUHDjJ;K3nR*MrjtzeNL8lq69Y(k-WQ09MQtkzjLnOpZs0D$L$|yhZ$^XZ|MlHXpOK>}Fgr=%# z9vz=u^UB8vZ9+ezCAOkB4}a0)g{;B$;h^IqO`N@U>WdGshZB1ljv1%D@w_O%l*|hu z6|^+166g`MGl?1iXcKhw+_3e00;K(B$4EK&yL)FOr|~MJra7~TzOTam(XPr*@!%2X zo0Tq6G3Ul=?x|P$dB1r)G;~Yd)I+XnL<6H^MC1xwgxa7RLVFW{pkNMyjmmfLMy!3U z!4hfL2@`T_svVar@K!jE#!N2o#`;44(D^Xu-T}BhLJlNQW45zwd?|-Si&S zW*nSal4srN6PwXt2KxQv7FM|JfO^Wwe(?4P%WSp2ved9NHto$5PUqKAdL~1`6r7lc z=;Ay@zyA{$id#f49b8_eX#|3u%)hBR4)^DTK`dmJrQ#?rW3UImU9jG7OTAf3Fg5=o zg?avSU67Hq8RTM_~cNAL$?#e%ruAFZQ)BrUx27a0>WMKf|XgBT@J=5!`n4m1M! z4c{EuJXNMPU!tjVNPj`XS+%=ddTij-Z=|{*8Q=T=QIC3OG}s^ffyGfI9w!k80M*i( zhL>Z(QmZQAFOc-pPnvfq67>M~;^_6KpTsz!il|_T(CA;4=9poq0D4&E1LSePZ}Kls zTc1qM21Pz*LLj}bM}rHmx%wjy!kC0Ls>xY(a48m3yFNa)#X3TcnR>(K;guu~qj))h zx(_Z#@BW-{;-McPPQ~kkHlu|$z>hke+9Fo}5iQ8)f9kM#HqbHdCl9@%|F})YOmd`My*+5?E8i4{tKG;5!=JO4or0(!x}^v7vw${VLkT&se{vU z$NglEF#2}@uykhBv|lQNxrfGYqp}jjnJ0$?YVV1W;aNX z1i)ZiI6vp&*$ZhyrU$kuGhZFezoNE9_qK43ABpzC(7~&q*TTqKbN}CUE7+k%DE?cvqo8bH6Vf!3RP z(^UjhVxr;30laZ+>f6oIM-ul=KKf8&S5NQo=;-8pKc4B)?@W?K42^S(NAZzdn*}zt zmP>jM=hU2E%_b}9GFDM@T*=JqqF-{hac7PQm|DV%%_?n9@PXpv+LF{kR~RRy%JVbR zG&L`X)3Q&@(?)1GIxtMxylCB|f(O^cP%~Tf+&lj07?Kpdrr93<3~G$i@;b_t&GQ$b z4NIj1!fyC}d_xiMvr6Cm)$PyTsATaBNhoi|@w$lD($+6epAC>l=;U%!nUu~9brgN% z(;khavVu^xjRuYv$EQg%mL9{=T)g`$Lb&NU?dhG{ zR?Avc<@oK8W@gmVij|g8 zNb^PJXL0C$%8F7qg$6hFc_{ZZQw3eRw+EVZw;kyW%Ibrv9)4k&aLfXEJwz9z;HXMR z44`+>A|vjpCuL(#!>a`>SAqzh)v7x;1K72&O4kY~?-ml({xJ-?{-lltC`5uZNtWtc zJ@ImNS7rdP`cg18(e8}ub2*G_cnmcg2Z-g&@nz2cXWoP>2a21X@u*UHv*wPJRhH?l z&hh;Qfl?VcrH|*r_4b4QmtfRPPKs{l4$I1pTst28LCzb^;O*paPz_d+Y93|!;s+*t zB041e)IzuBo=}oQlvzeF=JM%P2Uw|^ms20ow22sSXB&gSI^)-Gq#mU1qZi08%||2o zJfV;T62Oz=6aAU5TZ93XJO{O~*r6mFl3&*L=IWS)25Aar zkP2V@;o1CouBM+^Og@?+f~pw}kz=Dfoe!`J^`g`C1Df{R z-}|i$#P{@zIao*TK*=G5N5?TjXXH7Gg?F`OVxhLZ)62NqnPUwQ6TJg-try3(4W-ndZEB^SKy%C7dwq-nN`Ghx;HveEuLu)YgwL>57*BUs zS7t={{4drY*?7&-+OKp6TPXtg_1t2kuT?-t&8d{Hn8B}@58=oNLvhP#0{xT?94$uAhCeY zLh3*s3{$I)nZ-z;q;rzH!G-Mat@ZIA4r-R>NB0|b(Pp91WS=nE9_hkS?!s(i_jO&c z84eHAMH;Wr+KZ>r6P)N*$hPKSe$&U4m!8i&@Fl-3(mFGyc)!Z;PUGLqlD9Rfk`|-XNfFaFWNGpL zo$=eyXRp1K82h%HuUmWrph&W8yevb>0NQ>z(1BnJ5(b&Vf#5CpH{GdNAn>gm6|*S8 zIjMH#f6O&(iy#^&7W061!?>=#>EZQLZCA69=<_4|%)fUJsO}snOirhVkaFQu)0$3$ zc9qKPmVfSsy)7;J7irP`(bTA4Ool}Brb(KuclXV((0q$l7`tW+^N`eXXH!kua{t^T zK799|gpQ}Ver+wc@GAePTAqbrd6_Mj;$nNw8+ROg&4d%sh#w#qea`qKnL$W|vmC67 zANpo23kP|)l7(hFk!TZ9q?{z$MD5NzU<-Nc`UeW9&+v=FaOGIyBl)@lXqepLsvIDE z>WQqR+@6vAliU)K{aO|piiS_FZ8^VywZ}AVx^Jx2VCU{VqHno*DSv84YEwKMu5n^Y zDdiDV2@whqiEpGx@-hY}Gzy!3WYi6+3ud>`bre;N+&*8nF@_T^c8-Suw8FAwdP$bk zdPDYVCU&90Lht&K6VHM;xfH@-1EM}q1E71%Y=}^^y$Xs`fUIy zG77az-?X6Nu)UzzSi`oK|A@)jE{F8Se-In3jCua^Pt83-i$@FbDq)=T3eND)>S?D{ z?3~CW2b4KXbC;{yFH7xGSN{YI z_RHFSVrSLUb_W-4oXPt88rPaG);LIxKWqP+!1PEFparzYf${0_pB9iquhvOBVT(`+F%;TPPI##K@ip|ai^oMMRoOt8#(bKLxq2GC*spbG%> zSA70L81rOsHpCZ7r;)F`tytRFZ1T~OolpzSggdW{5dvPmyp?(z=$#zbl$an>ieToL zKKPz@f41a8Y@Q)$6i`0fA!5D+i?j}qq9Uaj(g--bMZLovys$l{@An78UkDmzb8IVVJM5VnU^aM+}xP5IGUCsZm==o zsYXKeXUlK5F-^E*g2-4Jx|i-EVhs(UU%IA{`=rRzT3UQ=dUW0V3*cTThWlSRR(HLJX>bV;Mbg%&ycen)92soDkq z4u;#GrsYk4OS52EvKtDqQj=Y9sp6c!WPA8DkJmJEE(}jCLGZ?9+S77Q&*VZ2kyp6g zdeVr6s91Gl5vX0gS`s+T)ggC%5lBA@Q7TnR)nT7;bS>@HuYtT!$EGGOt59aF9D0s_ zaO+N^iY}v`0Hhal9w~3<_GY1>cTPvI6Phe<=_jJi7jyeHMJ5*N=+qjy7Gk=0!VxTr z|KK&^5{u+4hWjq0_+I#Uh@d^^d^|?gmBOF06GFNAA_p!kH2C&$shmt=Bk@de5 zl8Bq1!7_#X&FYvkBOmAsjUt^Ac?K;+F>#y_i`>#bqVX_9bsER!bbc_S3yTcs=bxZt zEF-Y*585cHv!+=`KkXL+!Gl!XUh#mTfCZtW=BX{rq!tyUPn86YRFcF@z$qz4L!tsW zPR8cb0m`%hC%zR%X9Bw%e~qu2btr>myL5zEIbc|s8ULk; zk#rH#aGsL4E$5cSHemkJBuOlK206nvWf++eqB~B@VV_ zJr1wepY8DfKj`>Qr~c1$d|RFrzvxAcfc@zMX!dgt%lJQ+f zA}Pr*mH?XX=GA+Zv;>e)(_QIKz4$yGDHmX;Ckm*GZU&lCQ<-`OmYB)CB~oA7gYb+# za!ZmLx<0?uAYk5}agWaB@j>c9ni<;LKYsV0@@lHg3QAo#6U9}7;z%B3eZB`F;#ZU&Y^m&r)8l*i;=#w*HC^yr}gRoNn#;>2H3HCSi+b9^Ow zi$=%miNs9Qt(?x=JY|9Az8t4H9Y<$evEb$w@^$m+CwrgO$r99^C0uqCnxhocAJWe6 z9&L~_e(R~;Ri7yiJ&LJkuhg@th=?@l@ZN3rQ&oAPDkgOyh38MMGS{`f&Bz-=JP;_y zL0sbGdOtGcNx(V|(~1yJ2^kr9P6e!9y%Z=@B2;kbT>?evY}66vXZ3gmQ(GcDsq(m5 zUxEs#y$iJ$cRJ7NdZ)dqt`|_P7V00iSKj@FlD1h3!a26(<=YLbZvUG+^m(J!<|%X7 zGFS@S8(R;eeKR2M&pdE5CsBZit23Xh0iGZvX3ko~d4Q@odo4~&I0xR`&(IUr(1H=_ zhn;4VJJ^EFG90u5G=5!^S!tkg8a0nwC+bdaC<^j)_`UL#XI1k{S;pl=nZobNs0GVN z`b+NJL}@K&Sj)Ny(3zdrxliD-X_0fc3ln|a0CJvp2CH_DY|^G<7*e|s>CQf6i8Avo zG7hdUfX+cA)ub|gxOPTi6GU@x)3!c8qDi-NAE>Gzej$iZt9=J#&}xWFO6(E@`$L78 zgzH{+WL#_UVEfwH>yEeo)$YmThx^IP-IdYcwRD!tE0#oV zc<4XW?DC4=sk6LtG1-@s!brTX<9ev6d9kw?BVA`j@*;OAB>QfOTRCJs zu`ktuY%9EDIP;c?I!2paz@}bJgDWXw)5$JC^FKJHTB3DlB}Qt`ulH$HN$rV7g?7Q{ zXe|s+ZHoR@-TMmaLeNsjkl?i0t{p_#h;ub}Q~W^YZiTp4>gm++UiK#QJSU#BeZT|i zSfGS+tqCkTNS#L0sy0n*9ZPooqO}14-{DE8NdE#Yim6Xl9#8G5W}m28`B()UjU>=e&N;3N(uGUXQF%G|iv8LC!b{KZ4`x5e}KH#D(0^`1-)hbs>^w!B38 zKMZ)Z$}8Lzb(@L1*`+ApX8+ya#we?CBVWk*J_rmu*Vq|#;Y3}~!A4qE-3#8P_-W+Y z?Lj$=V4fhNlBtdmH@z@LxIHfvEDd7bU#MX%LG~Z1A0`9%#lo}u0a{g8kSHV(3Vm~Nf8GS7=j$h= zg;rY%BW3qt%1?=N$*^tLo?r-FU`*c*NbB&ya`OT4ll=MiWWsGm`ht={e_mba|KZ`$ z2Q^QUy3zgnt)e%tK2?=J46X(rH0KSE2A3abu3l@drX$M(#=}A0#pcx)t_3c-lS)le zf?~_L1^1M@3Iq_hzZQk*>pE)m4E{k03Jk16#Q7Y@C`-j)N z%jsk+lEL)rAr2;Q*+=;*Bo<d!n)Meu+~q$a8F)nS4OivNQ*~hA!4(gd4>CRia~wk&&zn zV5jn0tD0Myg4pAlu_`SvacXyIrC+?j(>j*F+eIa4;Ue0mx}XrRH=+t`E=LCdnJXO# z)b$d=bq4sfQ%n|^l|IjK)pO;hsnFtuUUPM2ZlZ)9!PouzpA0p-*@?x>z~ z9&o@9E*9Z*G9J@616gq}5u&eseN6A(6<>}=Ibi?6wGWRtzKap?l+OqF069pcCu#NBB8FS&ClB)20ZXqx8B(k&3 z0FuYxlS#=V*eD7zPyBeJMCjn((+j_kByO5Ed{5JyhD!OrkT`w7{Mzx_Dg@828?jP2 zo%1GU5aCp$0jR_f|4rXXS|l;~^7+vT%Uy#A$@uVMzcgc`8M6{=bgM_notSY3lw8~I%Xm+1Yd>X4v>rrfHcjN#tVMdZoz*XF65}Tm+%Xj; zFFb9=!>ZzR$uyxf?nR$&e|*isW8HFOf>)AsZcp^zMq7Qj)4n5wq1?*1foT0t%TJBv z=Yv*X2NF=zWu{018n3P^AQ6-)*%`M{o2n1Dq`aL|B<%)Ut334hk^%W>nEYSa4T`2m z<=3Q1i9pxo(VXuUF1NafZovWR_SQobiASU@BQcg8TShHdzls_^1;>3$rOldYq95!| z5UYo%DcE8I-Se>X^yy=xm(NIO`3s#4hUg|7|AKiV!hpC``HQhSTii&Ea{u7bb0jB~9RFfLlf$>cOQ# z(RCl3C=-TF*e-_en^jH3f#^(@D4<9khdWCPg7IKS78I5AIz}m@k|w=?-Pm4b(O`Jm zk7>>IBWMQyJeGXiss-%Oy3DK$XLEiu8Sd>9egb{uZh2Bcv;f2rsoHkpmJUH*yfQ36 zRkh4i^X|{O++y~Ii}SB4T~@;;p+&x$B@^R~?U`RCtt|@!_<42Yp}wH#JdEKgZDVYX2U?k(g6j9tFkZvo(?HwMFi0n}i1 zL6vna9jLzf@ilv84(0Z5H^Yms6|pfLg<%1SL1DRjV)qetA~1|imQW8wNR@5MvMhi< zSTmTs(ffJ!<%dW_)=?Q74Yt| zI(_W)7qFyNNv=(K+q8;DS+H+Dd}?L*N2xoiU=~Mw)W)aEMhL1@B_Ec8l;n8!SV=Lx zu6h@#u z&;pR3wP!7+-RDR8Pxtk)d6#lDrAURN*`MJ4r-WTt0CjTTkp~4cHO}sfR`t{HY}8U0nc^xGQ3eG} z$RE--yC3aK7y0E4!sfYn_cwIWpegnNUH-?_LFT{eE$+VufD}kGYd1^BFnA}Hw`BMD z8{-3Z4_eTev_Z-W!&Ey5t*{=uML>vMt^l&pylhqXx#=pSV{qCNq=nVgS=IAaRjrj@ zF2!c!GEb6GHCS#HQ7cck9yBBQ_hv0q#4wuX#OG$*hAGa8#Y`2o0~0A&I(T`j!2^gW zHlK(|tLoS;3LOo}8>@TzlCxJ%R0%&Vlib;4c!iljGX!kL5L)hmsbp=-M}szkt5zF+ z(^FtqD}P)+k~6l@BKKXO%rn}KJawV4#2tQEr@O3us&cwJD5%qKKvlA>RV`4p%#SLB zhjn8gtAM^DPla%m&1Y%{nM$Ur|Hp2H9ME7-UrXYa3$%g~$6Bp}m(@&-)K}{7YE}9i z!<}`o#w}$LVDv-zUktnI5!vc^KRZK9Cej!h%k}PWV)D`AI8JE%EuDKAzpSZwrM1yo zJ%6)X;dNiiz0sgG(02I{JJ{=PVnZ|$XS4+C&GiByKD z@P6wNz8N4VRpi!p&O1&eO{M)ox4-Qdl#{&BmHMcwK|}80%UOb5q;Iqb}b7Os486F@)b>=kM`JGRADQM)qD}kud-DF;C+1AGAx=^=8 zuVekAf3_2nN0qYA_7WW9?Cg!JQK*+Z386FhgN2o{qtt*}ghrMS8OaiI-PStnMsw8s zrdg`4Y~rOWI8fqf-3BAAc!mg~Ub>RWI*Pf*C8x+&O?XUYwghnkFG#d7A%V$hM72}4Etwpg1H>V&u_kRnmC2A{Gl$_k!0f&I ztDH8Yx$t0fWAlsWn@{=jbZ7M+sLj_c=g>yA zsLPf%jTO}d&HNBc4%V#NJDHlO7N?dTC6#tpa?rcBLOYt-jye9Bz*MU21$w0(r4DG^ zEd~2esh@$B3$`DNzm0r_%EoJ64t6EsRKEOmQtn>C1&hXEzEL)S6U(qq`18nukMS_z zzRwLgO2}4U#RO@B`6Su_UY7&k&^#zaB-s{VLVWC+l`0}8Ro59=>O1d~RE+KmB0t+B z9X%C?^&D}^?twGfG6i3~w(9~SwdAWD6qTCo_8JmWk-XBdd8%B~FwBkoZ_~ikuw4=m zkB>&@6YO`@bZNXtupImmVJSXFece)*z=@APK2gQgVbyc)-Wh?qrY=@2LsV<}%vob~ z(SqEI^S_rbP0bW+tq?tYd%AyaJ&Rh{-P&uRr~)<8KYVM+yQ|rwN*>RwMxg6;@PJ<~ z*u9RUK#;?$oSc|QMB{^#;W@#4$Fd=chp2^=GaWl9A@LJyEvSXgkyF49YOukSe#JDq^7Y ztwM24T2dkuaNSw6D}TAA#(m$|*w(=Uusv8iq2019@Eo|czdfrk@1x0F?#WyvrmHTP`F({0}THZF&n?4`NYg*OP^ ziW>WoPI&)-UIiOB%+*;c5?7I#+c4$f!)Hr{mm;;usE${Nr!tiI0cX*Q;lqhXk_#x*c?vl|PrvAuo z1($sDYH~V|$W6scat+yc`}f;hPah#{(GYtRsUAp>1|A9?Dypt{zzFheu3BRs>fcO6nN$BmLh+J=70l=xHoWqPGC!?9a zoy(iHkf#eV?MylUp?~-Tq=${}f&72`{D(WYf4K7*?Zzj~utpx5WfMQn2?r$>g-A<0 zicTyJGgZ0nZ{<|3ZIU%z1cgcLX&t)`r|v+OKCLkF%ymtbcT28ReGrqXp_h;4FgxYk zocg4e!RBZxycp_fJ!u3a9VWIpvNC}kOwW-H)dhRWTyHYnVFx^a559mZkpaTz}5wf z^~HcGVUFkVT6CJUVc_!QyrB+XpO)*#0L{CwzhehD3YU?IK_%O}&5ag-;U=BU{p?aw z&n3NViAiYO)LV&0sKve;j#loGS{l_SnuMG%IudTwZ%o`Nao4GiU>O&wLntj->u*{m z*diZTaLFiw+S(Ho)|Ls+I~-jC{(KC~vyf#^)y?x^%-nVE-bE&W1kOUinSr!1x-_o2 z*f$6H5Q~}n85hZMAF-}5U<7GDCd1(}(gu_P?@lC;_&z7rTh7EbLTc%zvj+o8i!m#XMVbJs<&%t2DHN?borhK z+Y-C1iCE7%N5cp^$nA_y%TtJTUs5+zzmHxmfNyGXTEp6617xD(rz7^)ej0>4}5Pk`#B~U?B=4C7jgs z=Dr2`2(hd#VH45Ez2?^GfuAF|Ssvk=JyO&|7K;zKiRk=P_ocL(GxsEIkxCE9i9uc` zfnWr7e2BqGW70gVfwxNVO|EI>wpgj}j0%Xt)#4I+Ay0MKa)*Y3y{48-yZc|ADn2Ss zCF3ObP&h)5N|(PNZUXY7{_x83M`cs6G4uvV->kmT7vE(HZ_sVooSOa>;^5mgIeS7T z$}7XHqGZG=l60^1+6)K7H_){tS!h=#L@@+PiIOyyI`O6n7~~E})Ur(|(pwR%IBrEe zzfF7GLU(<0iLJnzvEo-yS$rKZ%ep}Mm+|7BPvow{}kchf_yWtnSzd(Q@` z#HZ&wkDQo32R9}db_K4xOBUE88O|wiP6uz~4}AHmg<*NDtk?;r6H=#Jcu!!cd?JX1 z0NL!WY_@?`!W4t#_=z(NC3g8lSg1mFYwpb-ze4b%sr^7GQH=)G=^zlrIGhxnf7Sx3nEKxXG^X1=5YV0gSj?g51AS! z!aaQ2Tgq}QxbbNXNB;dII(h9!jxaY&`tHNJCA;Sj6!pQP&cXjLCHN8DbIc zrmm?H;ADkEmi>a)^I4XQpRzTcJui{M0vQxoy!`oJbE!{WI~da(nYvO0Xfhk;e&pF=+?Q)GjL^oT!Bw zv`raPdsE32Bcq^ez#cu_da}A>!RsO07X3#$C!@?QViu$HVwpF-1?N9t^`&I96dCea zdGi5qo^kThb(zi)dK)XK=|9pQ7LzbKt0v*Sv*0yc7d$6rOS&C}gP@}X2rA+SP&&WO z-z{a!$TL}g;b@*_9&sAxad8O^4+w)Q+Hu{UNsFp^IMY1fNrO{5DZz5q(wR9+Ddypv z9M7D(VruN@umK6!9OOEkHHJ1Zq| zz_}iu3riD49xi9w(;}oaAe@*LKZW3TEkxNRofbFuU|#O;t{@DBF6W`U&#}+9H=ba2 zhhKdUG-udrc!iGGF=hUE^l(vtS9FgZG&33YLo71H^Rj~opg6|MoerAcvJCJTbPsTR zbXHf!+{Egx+zXaApC=WxFieyCYH z>By5Cg`P78-W+oq5Xj|6pMF_;AsUf0mvq5sXru_EB9z@k+j9m!{6?jRir7 zl;9n0**``cF}ef?m8cos{A|HV6$ds%4)h?CxPja-P7c8Q)*5xS(TVuA&O?lny30%C z*Aa)FK}y@WGo`tb7&}|ltcL&VNc2pr##C=({_W2-J)eEx%!76fAf`YHsie(xw!us) zt*ucgby0Y9b(wG2T_rWJs9Xy~=12;J){#?>y#8L}uNX3Oa5ST(pKtOLuCzoFQ{92a zW%ZZD${3o#TdAlP{SS;7&9*$Tk`+na)ijBP1=}mXas=4n$v~%wqOG$YKW%H^&HEUi zAXc1cr-JHoreO12UcPnpe$@UF>=s)Q8y;N*A~aXb9!r#Ta$wsj4A>fm+_I$7wlub- z6YC_xm%dFy@kuvftDG^aE9-)$#e?hCq^qX%e@UR(U19%WhUWaKX1(2R zUAMd2qT$pkz}hUZ+KUrK`n%H4B7HDrKgy0cXOCRJMP~Q=Cv-bixvtkGnG!_5=9nuXt(a?gv#aQO{Nh)4_AGbtp0I)-=A2URm1kpbXrsE7z9Na*D#e-0`3C0l8DP|~Sq##!DG$@5y@D+*nu7rEQ; zDy0o@fGI-^@w>U&;6&dOuO|Nwqz>(|VUGZ^3-#@UEbC!Q@jVg!%}<$$gLrnM_bV5U zaE~}_dN=!@{uTmr^UfVy_-_8{4x_v=>!D{pB5dYvb8G*lWjxSvnDAfc_W@T7BM9}p z5TV4PUCR8R_&x$}e$l&$+cN+3-&B*GC()ilzz7G_F^!rUhmM;Egw2ix;3hH7{>`qU zf$@6lVO@NKGdVpT6K&)%r7G^~&Ub$m0_b2Br*`v@H+P{U5s6pfKysE-Ro)Lhj-^EB z)z6b>U32yB&*Vfq@0poX=$r|vb(D4VPTx&rQ(Ds;SR=B;(wrXSrfCJ?Js7u({Db|` zlwLEixAAF}3;FfsgZif8>!Z=RLU`1tNARx9O~o6w_ony!+ESHvZ(ivnphN$a-iH~= z$7Q#QMWLEmVv0_5i+V61`PoeG+wQkeB+9$JQU>mg;ZH4 zb~r~l>k5S+rWT;9u4FDlPyLEV606=Ee{jqCwchEhdYObofwE(lzs|=dE)^V1qe@fL ztZ(eCJzm}3X8H~T{S{IqOkwbKv8UUXgy-5~!#!f0UO^4s18%sdEc3Gqu@NjU_fUO% zvA(sv@pN-W$yK;>MUSbcWww&o%GhIH=QZ&`CB#fC1!UiX`Sgu9auCqb(z;|aS}U6m z9CSTa#~2u)C;*RUuiLP*3KhU0K!>38;hPTjy9-mFZ=~9r&Veww5ix!ou>jrhohA$&56tL|uXI5K8Jc8`io%a;i;cWr= zRap#JTI8vo(m@6Nf$1|5a(=BGi~7?mmRXHi>9)p!i|jcE->0yVp(H|evoIYqC+nr| z@vbN2<#;&!&Q*36;+)8rTnRLbps(Fk>^tW8EcU6_uz;Bh182Sm3sito9DL^;D1Jb} zUu5X^UYLoo5n zmtt4#{7AskYbG+r*ewXDdj(O-9#Y~#-~Fu)yU?V1Gd)4x)7BJzn=G zlYNR%eL|WuKdWLmX@}>BZ~;t6?AL5MYk{1AcoCTGylbdG97fr6>54PR%=>yv5i*S_ zv{NGoDfvS#!z*-W`en_Z4B!3bPy&p%QwPYPjyQx9#>XL;v{2II=ZHuKBQZErFKqsW z4S7ODtZD*TUeLp!(aWBXQ8FiX^u%E+GM>df$1P2aSr<^$^@U{{Cw%ez9!!2Z0FZ{T zBPVeqx1TGfausa=siXwF8X#x}VuCkgg62rR7pLW{YTmX|jKv^`0k-DpU-G+i;$0C= zP(|90@v)?%3nf>2_rJ<+pj{V6EGMOL+o@%=!RpJI#k3k9l9>e`90$7aAQ8AC8rmW% zDN177;=34^B5pZbEcY$t1!M-TBWFl;XOMo!S*@8JR)bLuG!0fVaLSnF)K9GTF+=4b}>T@}~tGrmx#YS1de24OFM2@0psYkO%#qD zW#+!P(OW_j^YqysvC?~l+movF_;T+8i3;&Lrm#yGENAeCsUkIKM%wqUoP$86+lDeftBHG*UJJg+OkR@|vbVVw<1ZK^@Q;{Xa zsbRX5Z76#gCWKzf%|WGn9ZDGhPklWig9pEZy(+mo(vzIJ;tXXcCau9m&%#aQlo(`LmN>)-!8-2L8&5Xzi~*_2r& zp?lr^9(O-}-skx0Bg8$rSyl4ie(n17jgInTAJK|$bW)Mej^uV%(Arm;cV5dg`>uD( zPDhC}AEW&ECZEI)ZG9;jO_?O%L%WS$(dG_KR8(y;+S`H6jgN11_dITMba)vBeDz32 z-%MaH#zw2%)&oOm?A2E^8;@R1UQ;39+XqfP4WoX~-zI3d;gJ=_fw@gt7pz&|COu}^ zTTYj%KvUu6t_r-&mVD_w`TJp;nFllgoE(+`L2u)^Sw$_%(?V8x356zN=nZLKYU#X! zU$aQW*{gi$gc>V{N3@$zc|-I3FuMTm)rM=4F#@Un+(Iyj&))-*p%wK2xIvZAefH6Z zext!(z9G#Z0v#K2J8sOT-w4FFayqujr;ubw6DTvs7YsksHp{#$ns!Hg?BmD+O*ud- zc0GKzo?)_9za%CM6RqT4htx&WZjS?Rg``mH`uz%XXj-qi^G6n>)x7@@bX~C%5WyqO zA5@XrN3nzB%B4!Vkwg-{zd{D?3!>XtBM$g|QW{Su++k+I|*4T%?n zTiF7W9IUw#m#*7<593E^>+@ax`pYlBL{KH4X6cOr3A%Mk<~o~ZL6{2G2Sgn#$m|fM z50I=KE5u!e_L?wk59by6)kL=`4OI6VpIoMn4wAKW8dMxkE6%DI_zkV9OP+2gRBSp{ z5Tr6i?(rYKxBA5wvG^>kuI@q_>Nlc=KEhgS2221*XS)EZOK_p~Pc`yvzl@95%O(n9 zl#t3M#X+e~iH`4v+M_hoz?B#_0g>do`;`x87R-S`Y5J1XH#;o1xMN?8Ll8`5?f9aGs?>f zMQu3qtB-_Gzd?4*-~8CBhQZk|b|Arvz$LB||vTd4iNVWra+zP`He)o-sZ%BBD{ z7XgzX$Du75>l9=ANUh3O??zvJNqXA@>J^UmCdco%50~oY6RMkW=qAK&5_QIAt=B8P z%VBZVzs#4VX(>2FmA#KcE)vpaUy$?R_Z(SuJnD@=I#rvoJp(LYA4y_3(9Qfaxb!`9 zN_d4Y!3Z{59W}2|*@Pqg?xr%B<*3fsxAC@x9`b&l?8p zX|~Lc0$@;PE$tnyH2)!#oHW z1Vw&4njDXAU6SN=0s}SFygm9A>5ex#eYwxpb3g>{bFJ-Aj0Sdj_}BipRryjJH)&O7 zVVT_S=8+!f(TmB>;y#Os)t%9I+xuuxuO$PpNjrd+5kzu~0dyK=^GXY4 zh&DkTsJ1z~kbaqU9(J+>#~(SgVQ{N9r5+Jz`}}MW;HWLtaS=gM8YscBNBm@!8Rj3f*;qLqPjJJTl9P!U_D4!(!4DdHv-YCl@SF{?2eA1ChR_~8 zFj=sKgL2&GHG*ejsf&=&1#M6_dTrLz{3XOFRLc&wM6@d9E!Gw^3rAO|@#%Qlt;i(b zJ7lb3+O+v8np)W7mCI4+EnP6*ix()AE-XDJTJX?}fjt9?Zy~{`D*Shocn`CHYthh# zF)>4p5&P0GT#X6AZi-3ie0&D&QNB85&J}L3cPXGyqRY{!=;&jTYaX$4ic1eJ(zLg)m)=xKh$W!Y z9&%?6OOIR|dI%6N=HcW@g-WsEo9N&fJQqkigZ|;4^6upi)qtDZyC>L6ue3S{CU_Jo z0#txvK`|)QZc4h5%MP#214JVfOcYhZ;F~iGqQ@4|_ADaL8y^1h5=r56ZN^H3p%put zi*?g1h`zGvaM9wh0Vx8oukNr&5OL{*g^UB7CI{m@4_rsU4DT)fFuX`@K%Zz_ytQCNEzJXS^{w?7YwC{;Ny zwsqT4LGzv{6h0?;+M#u_Ey!adl83?z(L{f;s=sEAxIoM2iQ)fTiv&}J?L#K4KAjpC zW0OE43eutm^-=$=L!UDov^E+*on24GlBUsGeQ5lO#Cj^ zkipzHAh1xnNZ|kmRdsZ;pPH1C~GbMsZz&RrlM_T?fY#o^OtBS=uTH?4`PR_TA`~ z*?IW6Kf1NQxyKJIvL;KOQuci``Y^iH>^ZNuEpJ;lQ~6y6mM@vK6Uh+$M?&G=wt7>? z)9ur&^DN$>wh0$A|9IKNFX&0}>Ppp#wn( zS;PboZ3>zVA?+LqE+~JclLkeo_N;rOr#Gk1I_`)xw^BcZbY4qmC8SF)8VdSeRI;M| z>5#gGP7GI9SsNV(%Ub`7lV~Haith=@`%pJnY%)a~)?}y}J)nUAvnXY(4NCRt(T`l$ z#48)|M)%jhT(^JY?{PvYH9;f!F&a-%Y%QhZS81FK(-c4yf@zT^+-}EZLP+`#Pr1xO zvMcv4$}MGby%Tz#PN-evGKjVYZYOEMCfQp&UV5!A8PDSG8|l|Janr4xxSMWPbN&lR z3RU0b?hz${W9TT-d+cJfev&Y`V$~?}d#NU&Kp^D;m#hqiLrn=OlKMaWq$IJkGi9cA z?%e3(Y1|;dqHS+MY`oAvMzyW|gO%OY?;&#pOOfSaaYp|5(UZrcTklPz(+zy)*t9nf zc6QglgW_FK<`tWsuU5~q*)&^+#(k!t0(S@sIpAhqNYuMi5YOsa^U_D+L;jc_DGG~qvPa^W+FEVb8kAVWZ2qvbr+ZdJc{7M>boS?S96QI8gLkFP z{>uI%7Ie@Ex83D5TJ7wt9z1>s2dZni0_9+cYk|r^&uFPTZU~%)@*CcyE(&eujyztJyI$|lN$}Y?62(oVQ+u; z(JCjb!5j+i|H+nR2E*;?4;x!|zuK9z`c%xn`_;jDvj;zQONh#0b|B2^yB}Oj`glpSX0v^pgKX9$O0* zESc4%kSmprgm+TW%KNx(#QBcjFp=xXRFSx(cgn%7S$F54WW)4+KQHeoX!m zDI>td&Z})8Yc7BlE)|KD+z*W=F={l(i)LUH?&Bb_>Ai-c9ZK0 z7;&!@&4Q$a%((Ofp^htQ^|EnuaxI13~h4NS&1pA{3EF6m_{540EXi{utpBc*`YbMnn zq>lcx2D}zr9Kxh?WpBai@L#BGlQA#iNi4>$)gX*u%b>1p;KGP*XaC^A29hNg4}Sjz zHZ1=BZhb#BiH2L61bI8&yPna!MU=YT0YW{)%)}3xzLenZpeJHOg~mTW`(I$I@j<+n;|~2Hb=B zo0CLUfH>|TJvUFkio_<7k2l&JzLdU)S8EIdtktr%l&W4%qi=0Yr4odg_jqX$RWZ5nG&w&kyn7iz|Y8@@(0*}d5 zIyzC}LCQws3rq%ZYEhLJtUh~3+&|=R-cxo+=-xz(W$?eu8d0}b2UeG*U?Nl$hBmta z$i`+6t0x6+)Z-t~I53dS3O}ak2wqiqK(*{jNJw)rADRMH<{RjvZVf7{pi%rli$H_R zOjwpG9Vd&HLS~ftsCGyn00S@X(sQJyQgBZrv5KtH_yr~^*>N}rxgmap&ERx+s?0jO zwv+E$e=%FkczZ`DqctXkIX6{`+1t_UoA~wk=;hw&8#C>%jg`#V8>Xk)%=8_NRt{08 zde@n$y9NZ3o}1J)Ol72nVR3bl>roSjMx?Va-G7EfuyG79U`EdbR`TOSHiR7m;m~b; z%>Xo!F->3U4P@ucaY8YFGa#m6r5CktBJ19#effrOCA7py`CDl*9J=t2t!pTN{9HWBoC5X0yh}E z4&?0tICJVGRUu88T&1dQ5!AWVJDf+t)fAK?4-(O7IJoG#%ZiHzmGo9|e!;NcqoZ*$ z7o3zklK*8#Ry5!|WQcpJIWIO4jzH%+ESISvp6M|sP)y`aT_7prlgrogq&{`gf5}C` zXZjvnUJmU|G1#BirKcD~SERS;8D*@0&gZV%r}w>e!fU-$gbC5AwIh}y`=El}v_eza z6KQ4g?&aGXd5SXHF+u^*L!`%X#jPlpI{<^}a^0=7>uFZ8^5_AUith^_`ESZ7O59hZ zIN9P;fl#2)-~U_CnDBZPBqk-G%n=^}BId!z(|~E^ckFSIH6h5RULsRlk!A@p@?TPT z&4~C7P-2r3mo}#z*SN+bVldEaM5#ttbgLs)p4VH1gX_JdrACx+vn^IT;9DnT8 z@Ve%ZI(z+_KrecwNKYn%9fIfb```NOzw<@#L}GMxp=qVt7>0ku9N7TY3=C`qe$mOI zRb}LqhAM$m3kDH%bwR5(rZ6<_ZkL6n`FaRsEKD;ieu`~G$uxa55v$+X2mDQ~T|S7u z$4zv3VrgNnat9?S$3{q$8754&PcqGhSDM;2)mE>n-w^4ioz5_;#mXTXieA+!GM?1# z^KH{!p=D8i!kZW7wHtPX3CKC-yrHNxVjm48(MZH1XlJR?-fLH506lU|h`oyMPi_+p^h0)QggI$nej}@JbtY?! z5itjr1l9=YTWK-{b!SGF)r3!;5n1RID2&W)-8y6gC1&zjf+Tbu_RZ<&Tg`Uz77yF) z-;c6x{H^KjC0Dx1W$*XVv_{{ie5ZISBN!^pV4sy3Bm{^Ak-#uYp*;GJ_63>yt;*XIVXI7P8cxdZ)N< zgEDZ9ImHzQA>||YM-E;z73N7B(9>G8-o+A8IPAO#1rkfJ*@TW~p-eL))r6(zl9^3T zNFT!DVOCU<25$ITwNI4h(S{c-DPYqt==eyO5vi>**~Zm0a@D=Be!%Bj;z~p>VQ6F~ zQ_5w%pDfEt5y&hjawev`@CIGQBtg8HMU^p46nv>wN{lMjb^HaJ+be4vSu3Y`N4lZ- zn?iPF4?xegjGYWz&5|d)fLz`@yn`JkdL~ha3Kv!>Be|4lMh&uU3&(m=Aae=7O)5;$de=ARGU z(?O*WJ$yFmo^DEEf7U%+<&q`b>MZTVqlmTL{*A*4!~rVZtTB+*jPtgK_%c$S!TYQe zPWipAu5-hK?OGV5={}}D|DakU&kw0R`~1@4#OHM=;>Gi|Xt;Rr+V+CB?Vi|i(FeiS z;4G3M&rT%PE_e9W&n#i&qU-s^SjsAvjeGC3pLa%Gy3wayi5ptk-}?IRN_md1q~l}7 zNK_)ql%+Vk{y-aaIu{wbYU$1inUx8(q44@`=+7=us-+Rp`lHV~OEMLCmm- zyoiVt3S7S|Z7TdZG6hi$-Sh9DPBm}RpwIFZRKLJp4`%lSd&4V*Th&k`CK@JB-G^?| zIh>%uaI3NY6n)HUxcj9STX-71z-)OjA z92%=5WHi~C7>uAjjV14)j4BdRb%)P17OU(vF+tyL4{_^|_Mvega8~;eWM+UZk>NrM z->~=r(DgJ;%KaSRy4+qp*nPaxgT#@C6%dRwUmU^EPfxJNYA;!Zj4B3bkiZ+JV%>81&H^jes zVOw;%V&ls_QnW9upQS~h;``=JIvn>_e=c4rm&5aN8w@j;=k#UKYuZ~~cSB{nB*08Z zshiw_G^zmpO=4(U{IMMO3m(txRg}aTtiUxvbo9{yoEdi>(Skynu4%kMeB8woYpMZ; zgD8_T0%43;SvJ(b0$UC&`%nbO!&77}d0!1LSS$M%5zhHJdw)zsl?*}r>;^0XBQMSZ zGr%_uWw4RmxC93!PvoX4zs7` za4X2h%I5ZW>rXn{T&84*VNrO2*b$L8cweOgE_d-0fC5-;NeE9f^E4|>aTmg)glv$1 zr5Z(2gPifakbvxwk^lq`d5Q6%Prn?~=aGm&RUJ2EdJxSaXIV;!6zs|`3_$kj;q3x; zl51bsnZ?ky2tN<~AUP2$BCf+kau}2G+oPk&NTvl*tr+ozm|@aBI{HK38NSL?9I=Xn zEqWE?G%xcTNFMYdPXXgt`z~d$e4vQn&TaGK!^4AjlLLmMq}RIxyEq8$%!LAc_LciN z6D|)rjE?wF4iE)i{>ch9%KoIHltkQNL)A9Bn7|?+64)KEgYvQ1L-<7P#?w>{PzJ0nU6O5>rWf!lfzy-bzJV9dB}7kKj5DH02VVd0ng)E7ZB^F@L_0;fr^PR%P@= z-rmsO^g4*>EvJ*qi{3fnh+44t6)X5|d=i_)R{ELxByWMDt>v<{Ov+g8+BV>xyPJ{+nOM4TCo!nm-)QX(P2w7ahPIh;MdAum9o)?YP~oYY*F-aAb+n8q_NR0y z`eW^qXM`S!2NEtt>#^^7z4-ismZsEd)i;V?k=nrn06Fv0}0m6l;7 z5;ZQq=BqwZ9PqqC$U;a=W^(mgllhS0v>k)Bg)4XoaHghT+0OMF3td^*#gX4+YS`lB z+`=i!E+-bm8HuP1SY1CTfYDtW>%tbXz;4lCOnTf+eE&tguF>-)@^evteo1@l^Pm(~ zsuwx*j3R+{!kQ}asggi%*&0<6s8C)hjc>M$MXeYtNbaH*@866ipr;}LR~c2JnCHT% z6kp84As^`Vdxe&5orbiq#4K@4$6Z=xD7JQZhp;Cs_R?hd6RSmWxM94-qf3n5G2Dq$ z!PJt9Tl}jV?=h$i-yWk~Q0BP2X>chUdnHSd(Ix4lDPnWWf@a^BCxlWWDlTdtZ(Ux0 zMV2Nl&!Pg&_~RufzidHK#acRTZ3gOqjd_JOVDGh0K@v?tbQ?SBBKOm~9W7Vgc|Lac z(ao1#Mq05Htw7K`PHAcsvVsVEAdC^eL>6j-r5or4$?!k~t)?60osk&U*_YAA*3P4SeJreuEJ>IX)7hh!()M{%NqTK> zs~Ds?a)>nU(vtdgI*lcfp>`@CaU&-|B3v$wJ+`*6lcgb^e|C%tXj^wh+aZ?1D+3tq&xw+^z%EOF-+G zzC|@bu&BW|8W7l61>TehfMMYL`24cPLy_7z#_h__Ds~~8rytG?D3rO z%3B?m!94xMWDCPgJ4xpk;}by8{o@Dc+!>B-w^(p$nBR;%rGgYB)=l4avR8uOk?p_y zVmci@dVBVU_jdPgC*weAJs>mS*QbA*eRhdhEGeQftgwVM)(adx{Bjw5UjNzm1ymno zI)2RoE|w=F6TAr$QD3a=Z5eSRUX{$7(tgFfL!x^AqBr`dpAIh}D4k_ZGAL}R_*7Fw z#u79j117aL;yn~ZcRD#ogGzM0VqW!eNK(?M3KYwSAJLAfKMvYL8s>dHx@qD@@#;Zx zR8RT2IHJHk>Az0?bx;X-6b85iK5)bAei}I8cK^uC^nln9+&;{P z6+?prw$}CMk=5y)3j3mAP%g}Kb9;EY5F2JQ($=y8{XjlIC8{BmF5be=1%?-vjDUm7 zvomq7Tx{N($=Yp0;Xt2db_&5a3t3MoDAnwWtkq?Hcci?Eb+uu=J-t(QsNQ&Db+0c? zC1S-&TUkL(gI88q2OQHQ_jkJCY?ZSg&UjmK`RYgTFS;EW`H*{)Dc6V+w;3;YRaCR% zn8C@7Mo}V4lIU{YSh8>dXwWF3#v$N&bEkn$tA$GBeFn_PBelF?TUrR4wfiW?U755L z^Fe*Vq6HUJY|JBbUMkAefO4WHq0Z_6iLT{*^#1&1{rl$SJ*}0qFp}Nuat+Ox?E66> z<_3jqI6(|YYe=H$#4f=yrftsF_Wh0hJ!%OkCjo)m6AXQ^`1|-&jx#aF;V>XROvijz ziTZ_EzYa1KN4Z>x!4b&-o95gnfhcS6r3P$2$b4N&e|q!pE^$b-@9fdl9jNOI8={_^ zEr0pUFC6S6N8QW{p8>M2Cg3*^SMys!GQ|7(oTF#5>If~5yT*|(iUyf_p)hJ0WJ5$O zt=Zh(*O#jp(r?w^YtyFv3V^RwYe__b!?)XStr2}eHB?FzOWA`cC>FK0V2DQ36};_g zwC$SUuZ69IxFw8f;Yf2$Ji5yUWV14W93C71NFce`tXPzMH+>pru>@vD#o(ZMQJ zLgv!v1se~UPsXOv$=x^j}5#zg10YTXUYr`UGM z0DF6K!2M^?-^t`pmy|^{dyqjJLZUaa^V-u-!1XyTVxf(BHK##`!vcFG5+Lh(#HH?t zdU^Un^);;Rr~d_GKIX`up+0rFu@KwvPN7Yklml}vHkX=qI^uCp@RIlHMOdbH)bAwZ;t#a!i^X z2u=k-Aqr3hX%yoD5aBzMc_X6!Y}rd7Mq^6Bq04ow44y?p?r7o!ABYz4D_JZHJ*hZU z?sO+mi=yY0qS2XGFLsO_&EO-D4#yf6gx5&ValDq*vOiyn8y7S}e1Yd4&tp`iin|9M7m3Y|;)Ls_2g?B)K8fsQYM4sdJjwm>_v);V%BD~!l9@Esj)%}Y6mg#B9$td_#zndDgq{Dpikfz zrrEVqrf_I86rP!6i1E1~xwVV0MH#ogz>zJT`Xy$Il0Z@4hNuB~q9Qe{%v@fz15mdc z^M9V_Feif@3{g3lIaT+%mA6mQe+EPTw3x3@itMHIHFE8q(5{e?J~uL2;w-B z+fdS3h<8wt-~M*?(O3OP4eT?EQDdx1tUr^eE_l0Ip+6kUTu35q%?c00Dvk`EZS=z) zMk>-^o3|NJLu*{faXex!A)-&nu4v8)i}Rnk+N3vEW|lb4{9zHdsa@k3NbOjc=k!D-;9(S8Zk@a?F&Yi0a?wKleCKq zzhMP3QbGtJiKuC?T1iSO^Ui%J07tjJx_!mVySID5hrh#3mPU&U{6oc& zi5B!In^aV-e&2jO+e`WJU)GAY-8+6V{E7CkcU}peD(YF z)j#MYv79h6w6om)Zc&%@CmZ`$_UPf}gGZZO0kZQuzI!PbEpo`x!yJ3dPAp+ymMfpK zT)Rw*fS?>O*J51-w?ol}r!e_cVKUT2_U}+|#4_(tV7Lap$G6*ouyCS9q@KVPRS!RN zb!E=9Z}F;tD4m_UB)`AHBxWh^#Nh`x=9c&5dqbHN6pCA3@Nyo^e)Y~uhhmCrnmm@oYc8t0ZikY#QOgy*P Ug|dsW5X6w3qx&DDUSePOAM;JDIRF3v literal 0 HcmV?d00001 diff --git a/binutils/po/es.po b/binutils/po/es.po index d12cf07..6872b9d 100644 --- a/binutils/po/es.po +++ b/binutils/po/es.po @@ -1,18 +1,19 @@ -# Mensajes en español para binutils 2.20.90. -# Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +# Mensajes en español para binutils 2.20.90. +# Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. # This file is distributed under the same license as the binutils package. -# Cristian Othón Martínez Vera , 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010. +# Cristian Othón Martínez Vera , 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011. # msgid "" msgstr "" "Project-Id-Version: binutils 2.20.90\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" "POT-Creation-Date: 2010-11-05 11:33+0100\n" -"PO-Revision-Date: 2010-11-18 17:37-0600\n" -"Last-Translator: Cristian Othón Martínez Vera \n" +"PO-Revision-Date: 2011-08-24 11:48-0500\n" +"Last-Translator: Cristian Othón Martínez Vera \n" "Language-Team: Spanish \n" +"Language: es\n" "MIME-Version: 1.0\n" -"Content-Type: text/plain; charset=ISO-8859-1\n" +"Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" #: addr2line.c:80 @@ -23,12 +24,12 @@ msgstr "Modo de empleo: %s [opcion(es)] [direccion(es)]\n" #: addr2line.c:81 #, c-format msgid " Convert addresses into line number/file name pairs.\n" -msgstr " Convierte direcciones en pares de nombre número/fila.\n" +msgstr " Convierte direcciones en pares de nombre número/fila.\n" #: addr2line.c:82 #, c-format msgid " If no addresses are specified on the command line, they will be read from stdin\n" -msgstr " Si no se especifican direcciones en la línea de órdenes, se leerán de la entrada estándar\n" +msgstr " Si no se especifican direcciones en la línea de órdenes, se leerán de la entrada estándar\n" #: addr2line.c:83 #, c-format @@ -54,14 +55,14 @@ msgstr "" " -e --exe= Establece el nombre del fichero de entrada\n" " (por defecto es a.out)\n" " -i --inlines Desenreda las funciones inline\n" -" -j --section= Lee los desplazamientos relativos a sección en lugar\n" +" -j --section= Lee los desplazamientos relativos a sección en lugar\n" " de las direcciones\n" -" -p --pretty-print Hace la salida más fácil de leer para humanos\n" +" -p --pretty-print Hace la salida más fácil de leer para humanos\n" " -s --basenames Elimina los nombres de directorio\n" -" -f --functions Muestra los nombres de función\n" -" -C --demangle[=estilo] Desenreda los nombres de función\n" -" -h --help Muestra esta información\n" -" -v --version Muestra la versión del programa\n" +" -f --functions Muestra los nombres de función\n" +" -C --demangle[=estilo] Desenreda los nombres de función\n" +" -h --help Muestra esta información\n" +" -v --version Muestra la versión del programa\n" "\n" #: addr2line.c:100 ar.c:293 coffdump.c:469 dlltool.c:3926 dllwrap.c:524 @@ -90,7 +91,7 @@ msgstr "%s: no se pueden obtener las direcciones del archivo" #: addr2line.c:337 #, c-format msgid "%s: cannot find section %s" -msgstr "%s: no se puede encontrar la sección %s" +msgstr "%s: no se puede encontrar la sección %s" #: addr2line.c:406 nm.c:1563 objdump.c:3301 #, c-format @@ -105,22 +106,22 @@ msgstr "no existe la entrada %s en el archivo\n" #: ar.c:233 #, c-format msgid "Usage: %s [emulation options] [--plugin ] [-]{dmpqrstx}[abcfilNoPsSuvV] [member-name] [count] archive-file file...\n" -msgstr "Modo de empleo: %s [opciones emulación] [--plugin ] [-]{dmpqrstx}[abcfilNoPsSuvV] [nombre-miembro] [cuenta] fichero-archivo fichero...\n" +msgstr "Modo de empleo: %s [opciones emulación] [--plugin ] [-]{dmpqrstx}[abcfilNoPsSuvV] [nombre-miembro] [cuenta] fichero-archivo fichero...\n" #: ar.c:235 #, c-format msgid "Usage: %s [emulation options] [-]{dmpqrstx}[abcfilNoPsSuvV] [member-name] [count] archive-file file...\n" -msgstr "Modo de empleo: %s [opciones emulación] [-]{dmpqrstx}[abcfilNoPsSuvV] [nombre-miembro] [cuenta] fichero-archivo fichero...\n" +msgstr "Modo de empleo: %s [opciones emulación] [-]{dmpqrstx}[abcfilNoPsSuvV] [nombre-miembro] [cuenta] fichero-archivo fichero...\n" #: ar.c:240 #, c-format msgid " %s -M []\n" +msgstr " %s -M []\n" #: ar.c:241 #, c-format msgid " commands:\n" -msgstr " órdenes:\n" +msgstr " órdenes:\n" #: ar.c:242 #, c-format @@ -140,7 +141,7 @@ msgstr " p - muestra fichero(s) encontrados en el archivo\n" #: ar.c:245 #, c-format msgid " q[f] - quick append file(s) to the archive\n" -msgstr " q[f] - agrega rápidamente fichero(s) al archivo\n" +msgstr " q[f] - agrega rápidamente fichero(s) al archivo\n" #: ar.c:246 #, c-format @@ -150,7 +151,7 @@ msgstr " r[ab][f][u] - reemplaza fichero(s) existente(s) o inserta fichero(s) #: ar.c:247 #, c-format msgid " s - act as ranlib\n" -msgstr " s - actúa como ranlib\n" +msgstr " s - actúa como ranlib\n" #: ar.c:248 #, c-format @@ -165,12 +166,12 @@ msgstr " x[o] - extrae fichero(s) del archivo\n" #: ar.c:250 #, c-format msgid " command specific modifiers:\n" -msgstr " modificadores específicos de la orden:\n" +msgstr " modificadores específicos de la orden:\n" #: ar.c:251 #, c-format msgid " [a] - put file(s) after [member-name]\n" -msgstr " [a] - coloca fichero(s) despúes de [nombre-miembro]\n" +msgstr " [a] - coloca fichero(s) despúes de [nombre-miembro]\n" #: ar.c:252 #, c-format @@ -205,12 +206,12 @@ msgstr " [o] - conserva las fechas originales\n" #: ar.c:258 #, c-format msgid " [u] - only replace files that are newer than current archive contents\n" -msgstr " [u] - sólo reemplaza ficheros que sean más nuevos que el contenido actual del archivo\n" +msgstr " [u] - sólo reemplaza ficheros que sean más nuevos que el contenido actual del archivo\n" #: ar.c:259 #, c-format msgid " generic modifiers:\n" -msgstr " modificadores genéricos:\n" +msgstr " modificadores genéricos:\n" #: ar.c:260 #, c-format @@ -220,12 +221,12 @@ msgstr " [c] - no avisa si se tiene que crear la biblioteca\n" #: ar.c:261 #, c-format msgid " [s] - create an archive index (cf. ranlib)\n" -msgstr " [s] - crea un índice del archivo (cf. ranlib)\n" +msgstr " [s] - crea un índice del archivo (cf. ranlib)\n" #: ar.c:262 #, c-format msgid " [S] - do not build a symbol table\n" -msgstr " [S] - no construye una tabla de símbolos\n" +msgstr " [S] - no construye una tabla de símbolos\n" #: ar.c:263 #, c-format @@ -240,7 +241,7 @@ msgstr " [v] - detallado\n" #: ar.c:265 #, c-format msgid " [V] - display the version number\n" -msgstr " [V] - muestra el número de versión\n" +msgstr " [V] - muestra el número de versión\n" #: ar.c:266 #, c-format @@ -265,7 +266,7 @@ msgstr "Modo de empleo: %s [opciones] archivo\n" #: ar.c:277 #, c-format msgid " Generate an index to speed access to archives\n" -msgstr " Genera un índice para acelerar el acceso a los archivos\n" +msgstr " Genera un índice para acelerar el acceso a los archivos\n" #: ar.c:278 #, c-format @@ -289,39 +290,39 @@ msgid "" " -v --version Print version information\n" msgstr "" " -t Actualiza la marca de tiempo del mapa de\n" -" símbolos del archivo\n" +" símbolos del archivo\n" " -h --help Muestra este mensaje de ayuda\n" -" -V --version Muestra la información de versión\n" +" -V --version Muestra la información de versión\n" #: ar.c:481 nm.c:1636 #, c-format msgid "sorry - this program has been built without plugin support\n" -msgstr "perdón - este programa se construyó sin soporte para plugins\n" +msgstr "perdón - este programa se construyó sin soporte para plugins\n" #: ar.c:508 msgid "two different operation options specified" -msgstr "se especificaron dos opciones de operación diferentes" +msgstr "se especificaron dos opciones de operación diferentes" #: ar.c:589 #, c-format msgid "illegal option -- %c" -msgstr "opción ilegal -- %c" +msgstr "opción ilegal -- %c" #: ar.c:632 msgid "no operation specified" -msgstr "no se especificó una operación" +msgstr "no se especificó una operación" #: ar.c:635 msgid "`u' is only meaningful with the `r' option." -msgstr "`u' sólo tiene sentido con la opción `r'." +msgstr "`u' sólo tiene sentido con la opción `r'." #: ar.c:638 msgid "`u' is not meaningful with the `D' option." -msgstr "`u' no tiene sentido con la opción `D'." +msgstr "`u' no tiene sentido con la opción `D'." #: ar.c:646 msgid "`N' is only meaningful with the `x' and `d' options." -msgstr "`N' sólo tiene sentido con las opciones `x' y `d'." +msgstr "`N' sólo tiene sentido con las opciones `x' y `d'." #: ar.c:649 msgid "Value for `N' must be positive." @@ -334,7 +335,7 @@ msgstr "no se puede usar `x' en archivos delgados." #: ar.c:702 #, c-format msgid "internal error -- this option not implemented" -msgstr "error interno -- esta opción no está implementada" +msgstr "error interno -- esta opción no está implementada" #: ar.c:771 #, c-format @@ -360,7 +361,7 @@ msgstr "" #: ar.c:840 ar.c:908 #, c-format msgid "%s is not a valid archive" -msgstr "%s no es un archivo válido" +msgstr "%s no es un archivo válido" #: ar.c:1108 #, c-format @@ -370,7 +371,7 @@ msgstr "No hay un miembro llamado `%s'\n" #: ar.c:1158 #, c-format msgid "no entry %s in archive %s!" -msgstr "¡No hay una entrada %s en el archivo %s!" +msgstr "¡No hay una entrada %s en el archivo %s!" #: ar.c:1297 #, c-format @@ -405,7 +406,7 @@ msgstr "%s: el fichero %s no es un archivo\n" #: arsup.c:230 #, c-format msgid "%s: no output archive specified yet\n" -msgstr "%s: no se ha especificado aún un archivo de salida\n" +msgstr "%s: no se ha especificado aún un archivo de salida\n" #: arsup.c:250 arsup.c:288 arsup.c:330 arsup.c:350 arsup.c:416 #, c-format @@ -420,7 +421,7 @@ msgstr "%s: no se puede abrir el fichero %s\n" #: arsup.c:315 arsup.c:393 arsup.c:474 #, c-format msgid "%s: can't find module file %s\n" -msgstr "%s: no se puede encontrar el fichero de módulo %s\n" +msgstr "%s: no se puede encontrar el fichero de módulo %s\n" #: arsup.c:425 #, c-format @@ -440,18 +441,18 @@ msgstr "Modo de empleo: %s < fichero_entrada > fichero_salida\n" #: bin2c.c:60 #, c-format msgid "Prints bytes from stdin in hex format.\n" -msgstr "Muestra los bytes de la entrada estándar en formato hexadecimal.\n" +msgstr "Muestra los bytes de la entrada estándar en formato hexadecimal.\n" #: binemul.c:38 #, c-format msgid " No emulation specific options\n" -msgstr " No hay opciones específicas de la emulación\n" +msgstr " No hay opciones específicas de la emulación\n" #. Macros for common output. #: binemul.h:46 #, c-format msgid " emulation options: \n" -msgstr " opciones de emulación: \n" +msgstr " opciones de emulación: \n" #: bucomm.c:163 #, c-format @@ -486,12 +487,12 @@ msgstr "%s: arquitecturas admitidas:" #: bucomm.c:407 #, c-format msgid "BFD header file version %s\n" -msgstr "encabezado del fichero BFD versión %s\n" +msgstr "encabezado del fichero BFD versión %s\n" #: bucomm.c:556 #, c-format msgid "%s: bad number: %s" -msgstr "%s: número erróneo: %s" +msgstr "%s: número erróneo: %s" #: bucomm.c:573 strings.c:409 #, c-format @@ -501,7 +502,7 @@ msgstr "'%s': No hay tal fichero" #: bucomm.c:575 strings.c:411 #, c-format msgid "Warning: could not locate '%s'. reason: %s" -msgstr "Aviso: no se puede localizar '%s'. razón: %s" +msgstr "Aviso: no se puede localizar '%s'. razón: %s" #: bucomm.c:579 #, c-format @@ -511,7 +512,7 @@ msgstr "Aviso: '%s' no es un fichero ordinario" #: coffdump.c:106 #, c-format msgid "#lines %d " -msgstr "#líneas %d " +msgstr "#líneas %d " #: coffdump.c:460 sysdump.c:646 #, c-format @@ -521,7 +522,7 @@ msgstr "Modo de empleo: %s [opcion(es)] fichero-entrada\n" #: coffdump.c:461 #, c-format msgid " Print a human readable interpretation of a SYSROFF object file\n" -msgstr " Muestra una interpretación legible por humanos de un fichero objeto SYSROFF\n" +msgstr " Muestra una interpretación legible por humanos de un fichero objeto SYSROFF\n" #: coffdump.c:462 #, c-format @@ -534,13 +535,13 @@ msgid "" msgstr "" " Las opciones son:\n" " @ Lee opciones del \n" -" -h --help Muestra esta información\n" -" -v --version Muestra la versión del programa\n" +" -h --help Muestra esta información\n" +" -v --version Muestra la versión del programa\n" "\n" #: coffdump.c:531 srconv.c:1832 sysdump.c:710 msgid "no input file specified" -msgstr "no se especificó un fichero de entrada" +msgstr "no se especificó un fichero de entrada" #: cxxfilt.c:119 nm.c:269 objdump.c:256 #, c-format @@ -561,11 +562,11 @@ msgstr "debug_record_function: no hay una llamada debug_set_filename" #: debug.c:834 msgid "debug_record_parameter: no current function" -msgstr "debug_record_parameter: no hay una función actual" +msgstr "debug_record_parameter: no hay una función actual" #: debug.c:866 msgid "debug_end_function: no current function" -msgstr "debug_end_function: no hay una función actual" +msgstr "debug_end_function: no hay una función actual" #: debug.c:872 msgid "debug_end_function: some blocks were not closed" @@ -608,7 +609,7 @@ msgstr "debug_record_variable: no hay un fichero actual" #: debug.c:1664 msgid "debug_make_undefined_type: unsupported kind" -msgstr "debug_make_undefined_type: no se admite el género" +msgstr "debug_make_undefined_type: no se admite el género" #: debug.c:1841 msgid "debug_name_type: no current file" @@ -620,30 +621,30 @@ msgstr "debug_tag_type: no hay fichero actual" #: debug.c:1894 msgid "debug_tag_type: extra tag attempted" -msgstr "debug_tag_type: se intentó una marca extra" +msgstr "debug_tag_type: se intentó una marca extra" #: debug.c:1931 #, c-format msgid "Warning: changing type size from %d to %d\n" -msgstr "Aviso: cambiando el tamaño del tipo de %d a %d\n" +msgstr "Aviso: cambiando el tamaño del tipo de %d a %d\n" #: debug.c:1953 msgid "debug_find_named_type: no current compilation unit" -msgstr "debug_find_named_type: no hay una unidad de compilación actual" +msgstr "debug_find_named_type: no hay una unidad de compilación actual" #: debug.c:2056 #, c-format msgid "debug_get_real_type: circular debug information for %s\n" -msgstr "debug_get_real_type: información de depuración circular para %s\n" +msgstr "debug_get_real_type: información de depuración circular para %s\n" #: debug.c:2483 msgid "debug_write_type: illegal type encountered" -msgstr "debug_write_type: se encontró un tipo ilegal" +msgstr "debug_write_type: se encontró un tipo ilegal" #: dlltool.c:901 dlltool.c:927 dlltool.c:958 #, c-format msgid "Internal error: Unknown machine type: %d" -msgstr "Error interno: Tipo de máquina desconocido: %d" +msgstr "Error interno: Tipo de máquina desconocido: %d" #: dlltool.c:999 #, c-format @@ -662,7 +663,7 @@ msgstr "Fichero def procesado" #: dlltool.c:1032 #, c-format msgid "Syntax error in def file %s:%d" -msgstr "Error sintáctico en el fichero def %s:%d" +msgstr "Error sintáctico en el fichero def %s:%d" #: dlltool.c:1069 #, c-format @@ -691,33 +692,33 @@ msgstr "wait: %s" #: dlltool.c:1347 dllwrap.c:422 resrc.c:298 #, c-format msgid "subprocess got fatal signal %d" -msgstr "el subproceso recibió la señal fatal %d" +msgstr "el subproceso recibió la señal fatal %d" #: dlltool.c:1353 dllwrap.c:429 resrc.c:305 #, c-format msgid "%s exited with status %d" -msgstr "%s terminó con estado %d" +msgstr "%s terminó con estado %d" #: dlltool.c:1384 #, c-format msgid "Sucking in info from %s section in %s" -msgstr "Se succiona la información de la sección %s en %s" +msgstr "Se succiona la información de la sección %s en %s" #: dlltool.c:1524 #, c-format msgid "Excluding symbol: %s" -msgstr "Se excluye el símbolo: %s" +msgstr "Se excluye el símbolo: %s" #: dlltool.c:1613 dlltool.c:1624 nm.c:1010 nm.c:1021 #, c-format msgid "%s: no symbols" -msgstr "%s: no hay símbolos" +msgstr "%s: no hay símbolos" #. FIXME: we ought to read in and block out the base relocations. #: dlltool.c:1650 #, c-format msgid "Done reading %s" -msgstr "%s leído" +msgstr "%s leído" #: dlltool.c:1660 #, c-format @@ -745,7 +746,7 @@ msgstr "Exportaciones agregadas al fichero de salida" #: dlltool.c:1974 #, c-format msgid "Generating export file: %s" -msgstr "Se genera el fichero de exportación: %s" +msgstr "Se genera el fichero de exportación: %s" #: dlltool.c:1979 #, c-format @@ -755,20 +756,20 @@ msgstr "No se puede abrir el fichero temporal de ensamblador: %s" #: dlltool.c:1982 #, c-format msgid "Opened temporary file: %s" -msgstr "Se abrió el fichero temporal: %s" +msgstr "Se abrió el fichero temporal: %s" #: dlltool.c:2159 msgid "failed to read the number of entries from base file" -msgstr "Falló la lectura del número de entradas del fichero base" +msgstr "Falló la lectura del número de entradas del fichero base" #: dlltool.c:2207 msgid "Generated exports file" -msgstr "Fichero de exportación generado" +msgstr "Fichero de exportación generado" #: dlltool.c:2416 #, c-format msgid "bfd_open failed open stub file: %s: %s" -msgstr "falló bfd_open al abrir el fichero de cabos: %s: %s" +msgstr "falló bfd_open al abrir el fichero de cabos: %s: %s" #: dlltool.c:2420 #, c-format @@ -778,27 +779,27 @@ msgstr "Se crea el fichero de cabos: %s" #: dlltool.c:2882 #, c-format msgid "bfd_open failed reopen stub file: %s: %s" -msgstr "falló bfd_open al reabrir el fichero de cabos: %s: %s" +msgstr "falló bfd_open al reabrir el fichero de cabos: %s: %s" #: dlltool.c:2896 dlltool.c:2972 #, c-format msgid "failed to open temporary head file: %s" -msgstr "falló al abrir el fichero de encabezado temporal: %s" +msgstr "falló al abrir el fichero de encabezado temporal: %s" #: dlltool.c:2958 dlltool.c:3038 #, c-format msgid "failed to open temporary head file: %s: %s" -msgstr "falló al abrir el fichero de encabezado temporal: %s: %s" +msgstr "falló al abrir el fichero de encabezado temporal: %s: %s" #: dlltool.c:3052 #, c-format msgid "failed to open temporary tail file: %s" -msgstr "falló al abrir el fichero de cola temporal: %s" +msgstr "falló al abrir el fichero de cola temporal: %s" #: dlltool.c:3109 #, c-format msgid "failed to open temporary tail file: %s: %s" -msgstr "falló al abrir el fichero de cola temporal: %s: %s" +msgstr "falló al abrir el fichero de cola temporal: %s: %s" #: dlltool.c:3131 #, c-format @@ -817,7 +818,7 @@ msgstr "no se puede borrar %s: %s" #: dlltool.c:3238 msgid "Created lib file" -msgstr "Se creó el fichero de biblioteca" +msgstr "Se creó el fichero de biblioteca" #: dlltool.c:3450 #, c-format @@ -832,12 +833,12 @@ msgstr "%s no es una biblioteca" #: dlltool.c:3498 #, c-format msgid "Import library `%s' specifies two or more dlls" -msgstr "La biblioteca de importación `%s' especifica dos o más dlls" +msgstr "La biblioteca de importación `%s' especifica dos o más dlls" #: dlltool.c:3509 #, c-format msgid "Unable to determine dll name for `%s' (not an import library?)" -msgstr "No se puede determinar el nombre dll para `%s' (¿No es una biblioteca de importación?)" +msgstr "No se puede determinar el nombre dll para `%s' (¿No es una biblioteca de importación?)" #: dlltool.c:3733 #, c-format @@ -867,17 +868,17 @@ msgstr "Modo de empleo %s \n" #: dlltool.c:3885 #, c-format msgid " -m --machine Create as DLL for . [default: %s]\n" -msgstr " -m --machine Crea una DLL para la . [por defecto: %s]\n" +msgstr " -m --machine Crea una DLL para la . [por defecto: %s]\n" #: dlltool.c:3886 #, c-format msgid " possible : arm[_interwork], i386, mcore[-elf]{-le|-be}, ppc, thumb\n" -msgstr " posibles: arm[_interwork], i386, mcore[-elf]{-le|-be}, ppc, thumb\n" +msgstr " posibles: arm[_interwork], i386, mcore[-elf]{-le|-be}, ppc, thumb\n" #: dlltool.c:3887 #, c-format msgid " -e --output-exp Generate an export file.\n" -msgstr " -e --output-exp Genera un fichero de exportación.\n" +msgstr " -e --output-exp Genera un fichero de exportación.\n" #: dlltool.c:3888 #, c-format @@ -887,12 +888,12 @@ msgstr " -l --output-lib Genera una biblioteca de interfaz.\n" #: dlltool.c:3889 #, c-format msgid " -y --output-delaylib Create a delay-import library.\n" -msgstr " -y --output-delaylib Genera una biblioteca de retraso de importación.\n" +msgstr " -y --output-delaylib Genera una biblioteca de retraso de importación.\n" #: dlltool.c:3890 #, c-format msgid " -a --add-indirect Add dll indirects to export file.\n" -msgstr " -a --add-indirect Agrega indirecciones dll al fichero de exportación.\n" +msgstr " -a --add-indirect Agrega indirecciones dll al fichero de exportación.\n" #: dlltool.c:3891 #, c-format @@ -912,12 +913,12 @@ msgstr " -z --output-def Nombre del fichero .def para crear.\n" #: dlltool.c:3894 #, c-format msgid " --export-all-symbols Export all symbols to .def\n" -msgstr " --export-all-symbols Exporta todos los símbolos a un .def\n" +msgstr " --export-all-symbols Exporta todos los símbolos a un .def\n" #: dlltool.c:3895 #, c-format msgid " --no-export-all-symbols Only export listed symbols\n" -msgstr " --no-export-all-symbols Sólo exporta los símbolos enlistados\n" +msgstr " --no-export-all-symbols Sólo exporta los símbolos enlistados\n" #: dlltool.c:3896 #, c-format @@ -927,7 +928,7 @@ msgstr " --exclude-symbols No exporta la a\n" #: dlltool.c:3897 #, c-format msgid " --no-default-excludes Clear default exclude symbols\n" -msgstr " --no-default-excludes Limpia los símbolos excluídos por defecto\n" +msgstr " --no-default-excludes Limpia los símbolos excluídos por defecto\n" #: dlltool.c:3898 #, c-format @@ -937,12 +938,12 @@ msgstr " -b --base-file Lee el fichero base generado por el enlazad #: dlltool.c:3899 #, c-format msgid " -x --no-idata4 Don't generate idata$4 section.\n" -msgstr " -x --no-idata4 No genera la sección idata$4.\n" +msgstr " -x --no-idata4 No genera la sección idata$4.\n" #: dlltool.c:3900 #, c-format msgid " -c --no-idata5 Don't generate idata$5 section.\n" -msgstr " -c --no-idata5 No genera la sección idata$5.\n" +msgstr " -c --no-idata5 No genera la sección idata$5.\n" #: dlltool.c:3901 #, c-format @@ -952,22 +953,22 @@ msgstr " --use-nul-prefixed-import-tables Usa idata$4 e idata$5 con prefijo #: dlltool.c:3902 #, c-format msgid " -U --add-underscore Add underscores to all symbols in interface library.\n" -msgstr " -U --add-underscore Agrega subrayado a todos los símbolos en la biblioteca de interfaz.\n" +msgstr " -U --add-underscore Agrega subrayado a todos los símbolos en la biblioteca de interfaz.\n" #: dlltool.c:3903 #, c-format msgid " --add-stdcall-underscore Add underscores to stdcall symbols in interface library.\n" -msgstr " --add-stdcall-underscore Agrega subrayado a los símbolos stdcall en la biblioteca de interfaz.\n" +msgstr " --add-stdcall-underscore Agrega subrayado a los símbolos stdcall en la biblioteca de interfaz.\n" #: dlltool.c:3904 #, c-format msgid " --no-leading-underscore All symbols shouldn't be prefixed by an underscore.\n" -msgstr " --no-leading-underscore Ningún símbolo debe tener prefijo de subrayado.\n" +msgstr " --no-leading-underscore Ningún símbolo debe tener prefijo de subrayado.\n" #: dlltool.c:3905 #, c-format msgid " --leading-underscore All symbols should be prefixed by an underscore.\n" -msgstr " --leading-underscore Todos los símbolos deben tener prefijo de subrayado.\n" +msgstr " --leading-underscore Todos los símbolos deben tener prefijo de subrayado.\n" #: dlltool.c:3906 #, c-format @@ -997,12 +998,12 @@ msgstr " -f --as-flags Pasa al ensamblador.\n" #: dlltool.c:3911 #, c-format msgid " -C --compat-implib Create backward compatible import library.\n" -msgstr " -C --compat-implib Crea biblioteca de importación compatible hacia atrás.\n" +msgstr " -C --compat-implib Crea biblioteca de importación compatible hacia atrás.\n" #: dlltool.c:3912 #, c-format msgid " -n --no-delete Keep temp files (repeat for extra preservation).\n" -msgstr " -n --no-delete Conserva los ficheros temporales (repetir para conservación extra).\n" +msgstr " -n --no-delete Conserva los ficheros temporales (repetir para conservación extra).\n" #: dlltool.c:3913 #, c-format @@ -1017,7 +1018,7 @@ msgstr " -I --identify Reporta el nombre de la DLL asociada con Synonym for --output-lib\n" -msgstr " --impllib Sinónimo para --output-lib\n" +msgstr " --impllib Sinónimo para --output-lib\n" #: dllwrap.c:490 #, c-format @@ -1172,12 +1173,12 @@ msgstr " --entry Especifica un punto de entrada alternativo par #: dllwrap.c:495 #, c-format msgid " --image-base Specify image base address\n" -msgstr " --image-base Especifica la dirección de la imagen base\n" +msgstr " --image-base Especifica la dirección de la imagen base\n" #: dllwrap.c:496 #, c-format msgid " --target i386-cygwin32 or i386-mingw32\n" -msgstr " --target i386-cygwin32 ó i386-mingw32\n" +msgstr " --target i386-cygwin32 ó i386-mingw32\n" #: dllwrap.c:497 #, c-format @@ -1197,14 +1198,14 @@ msgstr " Opciones pasadas a DLLTOOL:\n" #: dllwrap.c:500 #, c-format msgid " --machine \n" -msgstr " --machine \n" +msgstr " --machine \n" #: dllwrap.c:501 #, c-format msgid " --output-exp Generate export file.\n" -msgstr " --output-exp Genera un fichero de exportación.\n" +msgstr " --output-exp Genera un fichero de exportación.\n" -# ¿No será acaso una biblioteca de salida? cfuga +# ¿No será acaso una biblioteca de salida? cfuga #: dllwrap.c:502 #, c-format msgid " --output-lib Generate input library.\n" @@ -1213,7 +1214,7 @@ msgstr " --output-lib Genera una biblioteca de entrada.\n" #: dllwrap.c:503 #, c-format msgid " --add-indirect Add dll indirects to export file.\n" -msgstr " --add-indirect Agrega indirecciones de dll al fichero de exportación.\n" +msgstr " --add-indirect Agrega indirecciones de dll al fichero de exportación.\n" #: dllwrap.c:504 #, c-format @@ -1233,12 +1234,12 @@ msgstr " --output-def Nombre del fichero .def de salida\n" #: dllwrap.c:507 #, c-format msgid " --export-all-symbols Export all symbols to .def\n" -msgstr " --export-all-symbols Exporta todos los símbolos a un .def\n" +msgstr " --export-all-symbols Exporta todos los símbolos a un .def\n" #: dllwrap.c:508 #, c-format msgid " --no-export-all-symbols Only export .drectve symbols\n" -msgstr " --no-export-all-symbols Sólo exporta los símbolos .drectve\n" +msgstr " --no-export-all-symbols Sólo exporta los símbolos .drectve\n" #: dllwrap.c:509 #, c-format @@ -1248,7 +1249,7 @@ msgstr " --exclude-symbols Excluye la a del .def\n" #: dllwrap.c:510 #, c-format msgid " --no-default-excludes Zap default exclude symbols\n" -msgstr " --no-default-excludes Elimina los símbolos excluídos por defecto\n" +msgstr " --no-default-excludes Elimina los símbolos excluídos por defecto\n" #: dllwrap.c:511 #, c-format @@ -1258,12 +1259,12 @@ msgstr " --base-file Lee el fichero base generado por el enlazador\ #: dllwrap.c:512 #, c-format msgid " --no-idata4 Don't generate idata$4 section\n" -msgstr " --no-idata4 No genera la sección idata$4\n" +msgstr " --no-idata4 No genera la sección idata$4\n" #: dllwrap.c:513 #, c-format msgid " --no-idata5 Don't generate idata$5 section\n" -msgstr " --no-idata5 No genera la sección idata$5\n" +msgstr " --no-idata5 No genera la sección idata$5\n" #: dllwrap.c:514 #, c-format @@ -1303,18 +1304,18 @@ msgstr " --leading-underscore Punto de entrada con subrayado.\n" #: dllwrap.c:521 #, c-format msgid " Rest are passed unmodified to the language driver\n" -msgstr " El resto se pasa sin modificación al controlador del lenguaje\n" +msgstr " El resto se pasa sin modificación al controlador del lenguaje\n" #: dllwrap.c:805 msgid "Must provide at least one of -o or --dllname options" -msgstr "Se debe proveer por lo menos una de las opciones -o ó --dllname" +msgstr "Se debe proveer por lo menos una de las opciones -o ó --dllname" #: dllwrap.c:834 msgid "" "no export definition file provided.\n" "Creating one, but that may not be what you want" msgstr "" -"no se provee un fichero de definición de exportación.\n" +"no se provee un fichero de definición de exportación.\n" "Se crea uno, pero tal vez eso no es lo que quiere" #: dllwrap.c:1023 @@ -1345,12 +1346,12 @@ msgstr "Longitud de datos sin manejar: %d\n" #: dwarf.c:312 dwarf.c:2890 msgid "badly formed extended line op encountered!\n" -msgstr "¡se encontró un operador extendido de línea mal formado!\n" +msgstr "¡se encontró un operador extendido de línea mal formado!\n" #: dwarf.c:319 #, c-format msgid " Extended opcode %d: " -msgstr " Código de operación extendido %d: " +msgstr " Código de operación extendido %d: " #: dwarf.c:324 #, c-format @@ -1364,7 +1365,7 @@ msgstr "" #: dwarf.c:330 #, c-format msgid "set Address to 0x%lx\n" -msgstr "establece la Dirección a 0x%lx\n" +msgstr "establece la Dirección a 0x%lx\n" #: dwarf.c:336 #, c-format @@ -1416,7 +1417,7 @@ msgstr "UNKNOWN: longitud %d\n" #: dwarf.c:408 msgid "" -msgstr "" +msgstr "" #: dwarf.c:414 #, c-format @@ -1445,26 +1446,26 @@ msgstr " bloque de bytes %lu: " #: dwarf.c:1037 #, c-format msgid "(DW_OP_call_ref in frame info)" -msgstr "(DW_OP_call_ref en la información de marco)" +msgstr "(DW_OP_call_ref en la información de marco)" #: dwarf.c:1109 #, c-format msgid "(DW_OP_GNU_implicit_pointer in frame info)" -msgstr "(DW_OP_GNU_implicit_pointer en la información de marco)" +msgstr "(DW_OP_GNU_implicit_pointer en la información de marco)" #: dwarf.c:1167 #, c-format msgid "(User defined location op)" -msgstr "(Operador de ubicación definido por el usuario)" +msgstr "(Operador de ubicación definido por el usuario)" #: dwarf.c:1169 #, c-format msgid "(Unknown location op)" -msgstr "(Operador de ubicación desconocido)" +msgstr "(Operador de ubicación desconocido)" #: dwarf.c:1217 msgid "Internal error: DWARF version is not 2, 3 or 4.\n" -msgstr "Error interno: la versión DWARF no es 2, 3 o 4.\n" +msgstr "Error interno: la versión DWARF no es 2, 3 o 4.\n" #: dwarf.c:1323 msgid "DW_FORM_data8 is unsupported when sizeof (unsigned long) != 8\n" @@ -1493,12 +1494,12 @@ msgstr "(inlined)" #: dwarf.c:1491 #, c-format msgid "(declared as inline but ignored)" -msgstr "(se declaró como inline pero se descarta)" +msgstr "(se declaró como inline pero se descarta)" #: dwarf.c:1494 #, c-format msgid "(declared as inline and inlined)" -msgstr "(se declaró como inline y es inline)" +msgstr "(se declaró como inline y es inline)" #: dwarf.c:1497 #, c-format @@ -1508,7 +1509,7 @@ msgstr " (Valor desconocido de atributo inline: %lx)" #: dwarf.c:1662 #, c-format msgid "(location list)" -msgstr "(lista de ubicación)" +msgstr "(lista de ubicación)" #: dwarf.c:1683 dwarf.c:3563 #, c-format @@ -1528,22 +1529,22 @@ msgstr "Valor AT desconocido: %lx" #: dwarf.c:1960 #, c-format msgid "Reserved length value (%lx) found in section %s\n" -msgstr "Se encontró un valor de longitud reservado (%lx) en la sección %s\n" +msgstr "Se encontró un valor de longitud reservado (%lx) en la sección %s\n" #: dwarf.c:1971 #, c-format msgid "Corrupt unit length (%lx) found in section %s\n" -msgstr "Se encontró una longitud de unidad corrupta (%lx) en la sección %s\n" +msgstr "Se encontró una longitud de unidad corrupta (%lx) en la sección %s\n" #: dwarf.c:1978 #, c-format msgid "No comp units in %s section ?" -msgstr "¿ No hay unidades de compilación en la sección %s ?" +msgstr "¿ No hay unidades de compilación en la sección %s ?" #: dwarf.c:1987 #, c-format msgid "Not enough memory for a debug info array of %u entries" -msgstr "No hay suficiente memoria para una matriz de información de depuración de %u entradas" +msgstr "No hay suficiente memoria para una matriz de información de depuración de %u entradas" #: dwarf.c:1995 dwarf.c:3158 dwarf.c:3252 dwarf.c:3326 dwarf.c:3443 #: dwarf.c:3598 dwarf.c:3667 dwarf.c:3862 @@ -1552,18 +1553,18 @@ msgid "" "Contents of the %s section:\n" "\n" msgstr "" -"Contenido de la sección %s:\n" +"Contenido de la sección %s:\n" "\n" #: dwarf.c:2003 #, c-format msgid "Unable to locate %s section!\n" -msgstr "¡No se puede localizar la sección %s!\n" +msgstr "¡No se puede localizar la sección %s!\n" #: dwarf.c:2084 #, c-format msgid " Compilation Unit @ offset 0x%lx:\n" -msgstr " Unidad de Compilación @ desplazamiento 0x%lx:\n" +msgstr " Unidad de Compilación @ desplazamiento 0x%lx:\n" #: dwarf.c:2085 #, c-format @@ -1573,7 +1574,7 @@ msgstr " Longitud: 0x%lx (%s)\n" #: dwarf.c:2087 #, c-format msgid " Version: %d\n" -msgstr " Versión: %d\n" +msgstr " Versión: %d\n" #: dwarf.c:2088 #, c-format @@ -1583,7 +1584,7 @@ msgstr " Desplaz Abrev: %ld\n" #: dwarf.c:2089 #, c-format msgid " Pointer Size: %d\n" -msgstr " Tamaño de Puntero: %d\n" +msgstr " Tamaño de Puntero: %d\n" #: dwarf.c:2093 #, c-format @@ -1598,22 +1599,22 @@ msgstr " Tipo Desplaz: 0x%lx\n" #: dwarf.c:2104 #, c-format msgid "Debug info is corrupted, length of CU at %lx extends beyond end of section (length = %lx)\n" -msgstr "La información de depuración está corrupta, la longitud de CU en %lx se extiende más allá del final de la sección (longitud = %lx)\n" +msgstr "La información de depuración está corrupta, la longitud de CU en %lx se extiende más allá del final de la sección (longitud = %lx)\n" #: dwarf.c:2115 #, c-format msgid "CU at offset %lx contains corrupt or unsupported version number: %d.\n" -msgstr " CU en el desplazamiento %lx contiene un número de versión corrupto o no admitido: %d.\n" +msgstr " CU en el desplazamiento %lx contiene un número de versión corrupto o no admitido: %d.\n" #: dwarf.c:2125 #, c-format msgid "Debug info is corrupted, abbrev offset (%lx) is larger than abbrev section size (%lx)\n" -msgstr "La información de depuración está corrupta, el desplazamiento abbrev (%lx) es mayor que el tamaño de la sección abbrev (%lx)\n" +msgstr "La información de depuración está corrupta, el desplazamiento abbrev (%lx) es mayor que el tamaño de la sección abbrev (%lx)\n" #: dwarf.c:2172 #, c-format msgid "Bogus end-of-siblings marker detected at offset %lx in .debug_info section\n" -msgstr "Se detectó un marcador de fin-de-hermanos ambiguo en el desplazamiento %lx en la sección .debug_info\n" +msgstr "Se detectó un marcador de fin-de-hermanos ambiguo en el desplazamiento %lx en la sección .debug_info\n" #: dwarf.c:2176 msgid "Further warnings about bogus end-of-sibling markers suppressed\n" @@ -1622,12 +1623,12 @@ msgstr "Se suprimen los avisos restantes sobre marcardores de fin-de-hermanos am #: dwarf.c:2183 #, c-format msgid " <%d><%lx>: Abbrev Number: %lu" -msgstr " <%d><%lx>: Número de Abrev: %lu" +msgstr " <%d><%lx>: Número de Abrev: %lu" #: dwarf.c:2200 #, c-format msgid "DIE at offset %lx refers to abbreviation number %lu which does not exist\n" -msgstr "DIE en el desplazamiento %lx se refiere al número de abreviación %lu el cual no existe\n" +msgstr "DIE en el desplazamiento %lx se refiere al número de abreviación %lu el cual no existe\n" #: dwarf.c:2206 #, c-format @@ -1640,21 +1641,21 @@ msgid "" "Raw dump of debug contents of section %s:\n" "\n" msgstr "" -"Volcado crudo del contenido de depuración de la sección %s:\n" +"Volcado crudo del contenido de depuración de la sección %s:\n" "\n" #: dwarf.c:2336 #, c-format msgid "The information in section %s appears to be corrupt - the section is too small\n" -msgstr "La información en la sección %s parece estar corrupta - la sección es demasiado pequeña\n" +msgstr "La información en la sección %s parece estar corrupta - la sección es demasiado pequeña\n" #: dwarf.c:2348 dwarf.c:2701 msgid "Only DWARF version 2, 3 and 4 line info is currently supported.\n" -msgstr "Solo se admite actualmente la información de línea de DWARF versiones 2, 3 y 4.\n" +msgstr "Solo se admite actualmente la información de línea de DWARF versiones 2, 3 y 4.\n" #: dwarf.c:2362 dwarf.c:2716 msgid "Invalid maximum operations per insn.\n" -msgstr "Operaciones máximas inválidas por insn.\n" +msgstr "Operaciones máximas inválidas por insn.\n" #: dwarf.c:2381 #, c-format @@ -1669,22 +1670,22 @@ msgstr " Longitud: %ld\n" #: dwarf.c:2383 #, c-format msgid " DWARF Version: %d\n" -msgstr " Versión DWARF: %d\n" +msgstr " Versión DWARF: %d\n" #: dwarf.c:2384 #, c-format msgid " Prologue Length: %d\n" -msgstr " Longitud del Prólogo: %d\n" +msgstr " Longitud del Prólogo: %d\n" #: dwarf.c:2385 #, c-format msgid " Minimum Instruction Length: %d\n" -msgstr " Longitud Mínima Instrucción: %d\n" +msgstr " Longitud Mínima Instrucción: %d\n" #: dwarf.c:2387 #, c-format msgid " Maximum Ops per Instruction: %d\n" -msgstr " Máximo de Ops por Instrucción: %d\n" +msgstr " Máximo de Ops por Instrucción: %d\n" #: dwarf.c:2388 #, c-format @@ -1694,17 +1695,17 @@ msgstr " Valor inicial de 'is_stmt': %d\n" #: dwarf.c:2389 #, c-format msgid " Line Base: %d\n" -msgstr " Base Línea: %d\n" +msgstr " Base Línea: %d\n" #: dwarf.c:2390 #, c-format msgid " Line Range: %d\n" -msgstr " Rango Línea: %d\n" +msgstr " Rango Línea: %d\n" #: dwarf.c:2391 #, c-format msgid " Opcode Base: %d\n" -msgstr " Base de Código de Operación: %d\n" +msgstr " Base de Código de Operación: %d\n" #: dwarf.c:2400 #, c-format @@ -1713,12 +1714,12 @@ msgid "" " Opcodes:\n" msgstr "" "\n" -" Códigos de operación:\n" +" Códigos de operación:\n" #: dwarf.c:2403 #, c-format msgid " Opcode %d has %d args\n" -msgstr " El código de operación %d tiene %d argumentos\n" +msgstr " El código de operación %d tiene %d argumentos\n" #: dwarf.c:2409 #, c-format @@ -1727,7 +1728,7 @@ msgid "" " The Directory Table is empty.\n" msgstr "" "\n" -" La Tabla de Directorios está vacía.\n" +" La Tabla de Directorios está vacía.\n" #: dwarf.c:2412 #, c-format @@ -1750,7 +1751,7 @@ msgid "" " The File Name Table is empty.\n" msgstr "" "\n" -" La Tabla de Nombres de Fichero está vacía.\n" +" La Tabla de Nombres de Fichero está vacía.\n" #: dwarf.c:2430 #, c-format @@ -1779,22 +1780,22 @@ msgid "" " Line Number Statements:\n" msgstr "" "\n" -" Declaraciones de Número de Línea:\n" +" Declaraciones de Número de Línea:\n" #: dwarf.c:2476 #, c-format msgid " Special opcode %d: advance Address by %lu to 0x%lx" -msgstr " Código de operación especial %d: Dirección de avance por %lu a 0x%lx" +msgstr " Código de operación especial %d: Dirección de avance por %lu a 0x%lx" #: dwarf.c:2488 #, c-format msgid " Special opcode %d: advance Address by %lu to 0x%lx[%d]" -msgstr " Código de operación especial %d: Dirección de avance por %lu a 0x%lx[%d]" +msgstr " Código de operación especial %d: Dirección de avance por %lu a 0x%lx[%d]" #: dwarf.c:2494 #, c-format msgid " and Line by %d to %d\n" -msgstr " y Línea por %d a %d\n" +msgstr " y Línea por %d a %d\n" #: dwarf.c:2504 #, c-format @@ -1814,7 +1815,7 @@ msgstr " Avanza el PC por %lu para %lx[%d]\n" #: dwarf.c:2536 #, c-format msgid " Advance Line by %d to %d\n" -msgstr " Línea de Avance por %d para %d\n" +msgstr " Línea de Avance por %d para %d\n" #: dwarf.c:2543 #, c-format @@ -1834,7 +1835,7 @@ msgstr " Establece is_stmt a %d\n" #: dwarf.c:2563 #, c-format msgid " Set basic block\n" -msgstr " Establece el bloque básico\n" +msgstr " Establece el bloque básico\n" #: dwarf.c:2573 #, c-format @@ -1849,7 +1850,7 @@ msgstr " Avanza el PC por la constante %lu a 0x%lx[%d]\n" #: dwarf.c:2596 #, c-format msgid " Advance PC by fixed size amount %lu to 0x%lx\n" -msgstr " Avanza el PC por la cantidad de tamaño fijo %lu a 0x%lx\n" +msgstr " Avanza el PC por la cantidad de tamaño fijo %lu a 0x%lx\n" #: dwarf.c:2601 #, c-format @@ -1869,7 +1870,7 @@ msgstr " Establece ISA a %lu\n" #: dwarf.c:2615 dwarf.c:3031 #, c-format msgid " Unknown opcode %d with operands: " -msgstr " Código de operación desconocido %d con los operandos: " +msgstr " Código de operación desconocido %d con los operandos: " #: dwarf.c:2648 #, c-format @@ -1877,12 +1878,12 @@ msgid "" "Decoded dump of debug contents of section %s:\n" "\n" msgstr "" -"Volcado decodificado del contenido de depuración de la sección %s:\n" +"Volcado decodificado del contenido de depuración de la sección %s:\n" "\n" #: dwarf.c:2689 msgid "The line info appears to be corrupt - the section is too small\n" -msgstr "La información de línea parece estar corrupta - esta sección es demasiado pequeña\n" +msgstr "La información de línea parece estar corrupta - esta sección es demasiado pequeña\n" #: dwarf.c:2821 #, c-format @@ -1892,7 +1893,7 @@ msgstr "CU: %s:\n" #: dwarf.c:2822 dwarf.c:2835 #, c-format msgid "File name Line number Starting address\n" -msgstr "Nombre fichero Num línea Dirección inicio\n" +msgstr "Nombre fichero Num línea Dirección inicio\n" #: dwarf.c:2828 #, c-format @@ -1947,11 +1948,11 @@ msgstr "%s %11d %#18lx[%d]\n" #: dwarf.c:3192 dwarf.c:3712 #, c-format msgid ".debug_info offset of 0x%lx in %s section does not point to a CU header.\n" -msgstr "el desplazamiento de .debug_info de 0x%lx en la sección %s no apunta a un encabezado CU.\n" +msgstr "el desplazamiento de .debug_info de 0x%lx en la sección %s no apunta a un encabezado CU.\n" #: dwarf.c:3206 msgid "Only DWARF 2 and 3 pubnames are currently supported\n" -msgstr "Solo se admiten actualmente los nombres públicos DWARF 2 y 3\n" +msgstr "Solo se admiten actualmente los nombres públicos DWARF 2 y 3\n" #: dwarf.c:3213 #, c-format @@ -1961,7 +1962,7 @@ msgstr " Longitud: %ld\n" #: dwarf.c:3215 #, c-format msgid " Version: %d\n" -msgstr " Versión: %d\n" +msgstr " Versión: %d\n" #: dwarf.c:3217 #, c-format @@ -1971,7 +1972,7 @@ msgstr " Desplazamiento en secc .debug_info: 0x%lx\n" #: dwarf.c:3219 #, c-format msgid " Size of area in .debug_info section: %ld\n" -msgstr " Tamaño de área en secc .debug_info: %ld\n" +msgstr " Tamaño de área en secc .debug_info: %ld\n" #: dwarf.c:3222 #, c-format @@ -2010,7 +2011,7 @@ msgstr " DW_MACINFO_vendor_ext - constante : %d cadena : %s\n" #: dwarf.c:3337 #, c-format msgid " Number TAG\n" -msgstr " Número TAG\n" +msgstr " Número TAG\n" #: dwarf.c:3343 #, c-format @@ -2037,51 +2038,51 @@ msgid "" "The %s section is empty.\n" msgstr "" "\n" -"La sección %s está vacía.\n" +"La sección %s está vacía.\n" #: dwarf.c:3388 dwarf.c:3825 #, c-format msgid "Unable to load/parse the .debug_info section, so cannot interpret the %s section.\n" -msgstr "No se puede cargar/decodificar la sección .debug_info, por eso no se puede interpretar la sección %s.\n" +msgstr "No se puede cargar/decodificar la sección .debug_info, por eso no se puede interpretar la sección %s.\n" #. FIXME: Should we handle this case? #: dwarf.c:3432 msgid "Location lists in .debug_info section aren't in ascending order!\n" -msgstr "¡Las listas de ubicación en la sección .debug_info no están en orden ascendente!\n" +msgstr "¡Las listas de ubicación en la sección .debug_info no están en orden ascendente!\n" #: dwarf.c:3435 msgid "No location lists in .debug_info section!\n" -msgstr "¡No hay listas de ubicación en la sección .debug_info!\n" +msgstr "¡No hay listas de ubicación en la sección .debug_info!\n" #: dwarf.c:3440 #, c-format msgid "Location lists in %s section start at 0x%lx\n" -msgstr "Las listas de ubicación en la sección %s empiezan en 0x%lx\n" +msgstr "Las listas de ubicación en la sección %s empiezan en 0x%lx\n" #: dwarf.c:3444 #, c-format msgid " Offset Begin End Expression\n" -msgstr " Desplaz Inicio Fin Expresión\n" +msgstr " Desplaz Inicio Fin Expresión\n" #: dwarf.c:3479 #, c-format msgid "There is a hole [0x%lx - 0x%lx] in .debug_loc section.\n" -msgstr "Hay un agujero [0x%lx - 0x%lx] en la sección .debug_loc.\n" +msgstr "Hay un agujero [0x%lx - 0x%lx] en la sección .debug_loc.\n" #: dwarf.c:3483 #, c-format msgid "There is an overlap [0x%lx - 0x%lx] in .debug_loc section.\n" -msgstr "Hay un traslape [0x%lx - 0x%lx] en la sección .debug_loc.\n" +msgstr "Hay un traslape [0x%lx - 0x%lx] en la sección .debug_loc.\n" #: dwarf.c:3491 #, c-format msgid "Offset 0x%lx is bigger than .debug_loc section size.\n" -msgstr "El desplazamiento 0x%lx es más grande que el tamaño de la sección .debug_loc.\n" +msgstr "El desplazamiento 0x%lx es más grande que el tamaño de la sección .debug_loc.\n" #: dwarf.c:3500 dwarf.c:3535 dwarf.c:3545 #, c-format msgid "Location list starting at offset 0x%lx is not terminated.\n" -msgstr "La lista de reubicación que comienza en el desplazamiento 0x%lx no está terminada.\n" +msgstr "La lista de reubicación que comienza en el desplazamiento 0x%lx no está terminada.\n" #: dwarf.c:3519 dwarf.c:3913 #, c-format @@ -2091,7 +2092,7 @@ msgstr "\n" #: dwarf.c:3529 #, c-format msgid "(base address)\n" -msgstr "(dirección base)\n" +msgstr "(dirección base)\n" #: dwarf.c:3566 msgid " (start == end)" @@ -2104,7 +2105,7 @@ msgstr " (inicio > final)" #: dwarf.c:3578 #, c-format msgid "There are %ld unused bytes at the end of section %s\n" -msgstr "Hay %ld bytes sin usar al final de la sección %s\n" +msgstr "Hay %ld bytes sin usar al final de la sección %s\n" #: dwarf.c:3723 msgid "Only DWARF 2 and 3 aranges are currently supported.\n" @@ -2118,7 +2119,7 @@ msgstr " Longitud: %ld\n" #: dwarf.c:3728 #, c-format msgid " Version: %d\n" -msgstr " Versión: %d\n" +msgstr " Versión: %d\n" #: dwarf.c:3729 #, c-format @@ -2128,16 +2129,16 @@ msgstr " Desplaz. en .debug_info: 0x%lx\n" #: dwarf.c:3730 #, c-format msgid " Pointer Size: %d\n" -msgstr " Tamaño del Puntero: %d\n" +msgstr " Tamaño del Puntero: %d\n" #: dwarf.c:3731 #, c-format msgid " Segment Size: %d\n" -msgstr " Tamaño del Segmento: %d\n" +msgstr " Tamaño del Segmento: %d\n" #: dwarf.c:3740 msgid "Pointer size + Segment size is not a power of two.\n" -msgstr "Tamaño del puntero + Tamaño del segmento no es una potencia de dos.\n" +msgstr "Tamaño del puntero + Tamaño del segmento no es una potencia de dos.\n" #: dwarf.c:3745 #, c-format @@ -2146,7 +2147,7 @@ msgid "" " Address Length\n" msgstr "" "\n" -" Longitud de la Dirección\n" +" Longitud de la Dirección\n" #: dwarf.c:3747 #, c-format @@ -2155,16 +2156,16 @@ msgid "" " Address Length\n" msgstr "" "\n" -" Long Dirección\n" +" Long Dirección\n" #: dwarf.c:3835 msgid "No range lists in .debug_info section!\n" -msgstr "¡No hay listas de rango en la sección .debug_info!\n" +msgstr "¡No hay listas de rango en la sección .debug_info!\n" #: dwarf.c:3859 #, c-format msgid "Range lists in %s section start at 0x%lx\n" -msgstr "Las listas de rango en la sección %s inician en 0x%lx\n" +msgstr "Las listas de rango en la sección %s inician en 0x%lx\n" #: dwarf.c:3863 #, c-format @@ -2174,12 +2175,12 @@ msgstr " Desplaz Inicio Fin\n" #: dwarf.c:3884 #, c-format msgid "There is a hole [0x%lx - 0x%lx] in %s section.\n" -msgstr "Hay un agujero [0x%lx - 0x%lx] en la sección %s.\n" +msgstr "Hay un agujero [0x%lx - 0x%lx] en la sección %s.\n" #: dwarf.c:3888 #, c-format msgid "There is an overlap [0x%lx - 0x%lx] in %s section.\n" -msgstr "Hay un traslape [0x%lx - 0x%lx] en la sección %s.\n" +msgstr "Hay un traslape [0x%lx - 0x%lx] en la sección %s.\n" #: dwarf.c:3931 msgid "(start == end)" @@ -2191,12 +2192,12 @@ msgstr "(inicio > final)" #: dwarf.c:4185 msgid "bad register: " -msgstr "registro erróneo: " +msgstr "registro erróneo: " #: dwarf.c:4188 #, c-format msgid "Contents of the %s section:\n" -msgstr "Contenido de la sección %s:\n" +msgstr "Contenido de la sección %s:\n" #: dwarf.c:4962 #, c-format @@ -2206,12 +2207,12 @@ msgstr " DW_CFA_??? (Op de marco de llamada definido por el usuario: %#x)\n" #: dwarf.c:4964 #, c-format msgid "unsupported or unknown Dwarf Call Frame Instruction number: %#x\n" -msgstr "número de Instrucción de Marco de Llamada Dwarf no admitido o desconocido: %#x\n" +msgstr "número de Instrucción de Marco de Llamada Dwarf no admitido o desconocido: %#x\n" #: dwarf.c:4989 #, c-format msgid "Displaying the debug contents of section %s is not yet supported.\n" -msgstr "Aún no se admite el mostrar el contenido de depuración de la sección %s.\n" +msgstr "Aún no se admite el mostrar el contenido de depuración de la sección %s.\n" #: dwarf.c:5031 elfedit.c:74 #, c-format @@ -2226,12 +2227,12 @@ msgstr "%s: Aviso: " #: dwarf.c:5145 dwarf.c:5215 #, c-format msgid "Unrecognized debug option '%s'\n" -msgstr "No se reconoce la opción de depuración '%s'\n" +msgstr "No se reconoce la opción de depuración '%s'\n" #: elfedit.c:243 #, c-format msgid "%s: Not an ELF file - wrong magic bytes at the start\n" -msgstr "%s: No es un fichero ELF - tiene los bytes mágicos erróneos en el inicio\n" +msgstr "%s: No es un fichero ELF - tiene los bytes mágicos erróneos en el inicio\n" #: elfedit.c:251 #, c-format @@ -2261,7 +2262,7 @@ msgstr "%s: No coincide EI_OSABI: %d no es %d\n" #: elfedit.c:333 #, c-format msgid "%s: Failed to update ELF header: %s\n" -msgstr "%s: Falló al actualizar el encabezado ELF: %s\n" +msgstr "%s: Falló al actualizar el encabezado ELF: %s\n" #: elfedit.c:366 #, c-format @@ -2279,12 +2280,12 @@ msgstr "" #: elfedit.c:440 #, c-format msgid "%s: Failed to read ELF header\n" -msgstr "%s: Falló al leer el encabezado ELF\n" +msgstr "%s: Falló al leer el encabezado ELF\n" #: elfedit.c:447 #, c-format msgid "%s: Failed to seek to ELF header\n" -msgstr "%s: Falló al buscar en el encabezado ELF\n" +msgstr "%s: Falló al buscar en el encabezado ELF\n" #: elfedit.c:477 elfedit.c:491 elfedit.c:776 readelf.c:3674 readelf.c:3978 #: readelf.c:4021 readelf.c:4093 readelf.c:4171 readelf.c:4936 readelf.c:4960 @@ -2298,52 +2299,52 @@ msgstr "Memoria agotada\n" #: elfedit.c:543 readelf.c:12581 #, c-format msgid "%s: failed to seek to first archive header\n" -msgstr "%s: falló al buscar el primer encabezado de archivo\n" +msgstr "%s: falló al buscar el primer encabezado de archivo\n" #: elfedit.c:553 elfedit.c:741 elfedit.c:845 readelf.c:12590 readelf.c:12858 #: readelf.c:13026 #, c-format msgid "%s: failed to read archive header\n" -msgstr "%s: falló al leer el encabezado del archivo\n" +msgstr "%s: falló al leer el encabezado del archivo\n" #: elfedit.c:568 readelf.c:12691 #, c-format msgid "%s: failed to skip archive symbol table\n" -msgstr "%s: falló al saltar la tabla de símbolos del archivo\n" +msgstr "%s: falló al saltar la tabla de símbolos del archivo\n" #: elfedit.c:579 readelf.c:12702 #, c-format msgid "%s: failed to read archive header following archive index\n" -msgstr "%s: falló al leer el encabezado del archivo a continuación del índice del archivo\n" +msgstr "%s: falló al leer el encabezado del archivo a continuación del índice del archivo\n" #: elfedit.c:594 readelf.c:12718 msgid "Out of memory reading long symbol names in archive\n" -msgstr "Memoria agotada al leer los nombres de símbolo long en el archivo\n" +msgstr "Memoria agotada al leer los nombres de símbolo long en el archivo\n" #: elfedit.c:602 readelf.c:12726 #, c-format msgid "%s: failed to read long symbol name string table\n" -msgstr "%s: falló al leer la tabla de cadenas de nombre de símbolo largos\n" +msgstr "%s: falló al leer la tabla de cadenas de nombre de símbolo largos\n" #: elfedit.c:734 readelf.c:12852 #, c-format msgid "%s: failed to seek to next file name\n" -msgstr "%s: falló al buscar el siguiente nombre de fichero\n" +msgstr "%s: falló al buscar el siguiente nombre de fichero\n" #: elfedit.c:747 elfedit.c:852 readelf.c:12863 readelf.c:13032 #, c-format msgid "%s: did not find a valid archive header\n" -msgstr "%s no se encontró un encabezado de archivo válido\n" +msgstr "%s no se encontró un encabezado de archivo válido\n" #: elfedit.c:836 readelf.c:13018 #, c-format msgid "%s: failed to seek to next archive header\n" -msgstr "%s: falló al buscar el siguiente encabezado de archivo\n" +msgstr "%s: falló al buscar el siguiente encabezado de archivo\n" #: elfedit.c:867 elfedit.c:876 readelf.c:13046 readelf.c:13055 #, c-format msgid "%s: bad archive file name\n" -msgstr "%s: nombre de fichero de archivo erróneo\n" +msgstr "%s: nombre de fichero de archivo erróneo\n" #: elfedit.c:896 elfedit.c:988 #, c-format @@ -2353,7 +2354,7 @@ msgstr "El fichero de entrada '%s' no es legible\n" #: elfedit.c:920 #, c-format msgid "%s: failed to seek to archive member\n" -msgstr "%s: falló al buscar en el miembro de archivo\n" +msgstr "%s: falló al buscar en el miembro de archivo\n" #: elfedit.c:959 readelf.c:13134 #, c-format @@ -2373,7 +2374,7 @@ msgstr "'%s' no es un fichero ordinario\n" #: elfedit.c:994 readelf.c:13156 #, c-format msgid "%s: Failed to read file's magic number\n" -msgstr "%s: Falló al leer el número mágico del fichero\n" +msgstr "%s: Falló al leer el número mágico del fichero\n" #: elfedit.c:1052 #, c-format @@ -2383,12 +2384,12 @@ msgstr "OSABI desconocido: %s\n" #: elfedit.c:1071 #, c-format msgid "Unknown machine type: %s\n" -msgstr "Tipo de máquina desconocido: %s\n" +msgstr "Tipo de máquina desconocido: %s\n" #: elfedit.c:1089 #, c-format msgid "Unknown machine type: %d\n" -msgstr "Tipo de máquina desconocido: %d\n" +msgstr "Tipo de máquina desconocido: %d\n" #: elfedit.c:1108 #, c-format @@ -2422,14 +2423,14 @@ msgid "" " -h --help Display this information\n" " -v --version Display the version number of %s\n" msgstr "" -" --input-mach Define el tipo de máquina de entrada a \n" -" --output-mach Define el tipo de máquina de salida a \n" +" --input-mach Define el tipo de máquina de entrada a \n" +" --output-mach Define el tipo de máquina de salida a \n" " --input-type Define el tipo de fichero de entrada a \n" " --output-type Define el tipo de fichero de salida a \n" " --input-osabi Define la entrada OSABI a \n" " --output-osabi Defina la salida OSABI a \n" -" -h --help Muestra esta información\n" -" -v --version Muestra el número de versión de %s\n" +" -h --help Muestra esta información\n" +" -v --version Muestra el número de versión de %s\n" #: emul_aix.c:43 #, c-format @@ -2458,35 +2459,35 @@ msgstr " se descarta el objetivo `%s'." #: ieee.c:311 msgid "unexpected end of debugging information" -msgstr "fin inesperado de la información de depuración" +msgstr "fin inesperado de la información de depuración" #: ieee.c:398 msgid "invalid number" -msgstr "número inválido" +msgstr "número inválido" #: ieee.c:451 msgid "invalid string length" -msgstr "longitud de cadena inválida" +msgstr "longitud de cadena inválida" #: ieee.c:506 ieee.c:547 msgid "expression stack overflow" -msgstr "desbordamiento de la pila de expresión" +msgstr "desbordamiento de la pila de expresión" #: ieee.c:526 msgid "unsupported IEEE expression operator" -msgstr "no se admite el operador de expresión IEEE" +msgstr "no se admite el operador de expresión IEEE" #: ieee.c:541 msgid "unknown section" -msgstr "sección desconocida" +msgstr "sección desconocida" #: ieee.c:562 msgid "expression stack underflow" -msgstr "desbordamiento por debajo de la pila de expresión" +msgstr "desbordamiento por debajo de la pila de expresión" #: ieee.c:576 msgid "expression stack mismatch" -msgstr "no hay coincidencia en la pila de expresión" +msgstr "no hay coincidencia en la pila de expresión" #: ieee.c:613 msgid "unknown builtin type" @@ -2498,11 +2499,11 @@ msgstr "no se admite el tipo de coma flotante BCD" #: ieee.c:895 msgid "unexpected number" -msgstr "número inesperado" +msgstr "número inesperado" #: ieee.c:902 msgid "unexpected record type" -msgstr "tipo de grabación inesperado" +msgstr "tipo de grabación inesperado" #: ieee.c:935 msgid "blocks left on stack at end" @@ -2522,15 +2523,15 @@ msgstr "desbordamiento de la pila por debajo" #: ieee.c:1352 ieee.c:1422 ieee.c:2120 msgid "illegal variable index" -msgstr "índice de variable ilegal" +msgstr "índice de variable ilegal" #: ieee.c:1400 msgid "illegal type index" -msgstr "índice de tipo ilegal" +msgstr "índice de tipo ilegal" #: ieee.c:1410 ieee.c:1447 msgid "unknown TY code" -msgstr "código TY desconocido" +msgstr "código TY desconocido" #: ieee.c:1429 msgid "undefined variable in TY" @@ -2569,11 +2570,11 @@ msgstr "cadena inesperada en misc de C++" #: ieee.c:2423 msgid "bad misc record" -msgstr "grabación misc errónea" +msgstr "grabación misc errónea" #: ieee.c:2464 msgid "unrecognized C++ misc record" -msgstr "no se reconoce la grabación misc de C++" +msgstr "no se reconoce la grabación misc de C++" #: ieee.c:2579 msgid "undefined C++ object" @@ -2581,7 +2582,7 @@ msgstr "objeto C++ sin definir" #: ieee.c:2613 msgid "unrecognized C++ object spec" -msgstr "no se reconoce la especificación de objeto C++" +msgstr "no se reconoce la especificación de objeto C++" #: ieee.c:2649 msgid "unsupported C++ object type" @@ -2589,7 +2590,7 @@ msgstr "no se admite el tipo de objeto C++" #: ieee.c:2659 msgid "C++ base class not defined" -msgstr "no está definida la clase base de C++" +msgstr "no está definida la clase base de C++" #: ieee.c:2671 ieee.c:2776 msgid "C++ object has no fields" @@ -2609,23 +2610,23 @@ msgstr "visibilidad C++ desconocida" #: ieee.c:2872 msgid "bad C++ field bit pos or size" -msgstr "posición o tamaño erróneo del campo de bit C++" +msgstr "posición o tamaño erróneo del campo de bit C++" #: ieee.c:2964 msgid "bad type for C++ method function" -msgstr "tipo erróneo para la función del método C++" +msgstr "tipo erróneo para la función del método C++" #: ieee.c:2974 msgid "no type information for C++ method function" -msgstr "no hay información de tipo para la función del método C++" +msgstr "no hay información de tipo para la función del método C++" #: ieee.c:3013 msgid "C++ static virtual method" -msgstr "método virtual static de C++" +msgstr "método virtual static de C++" #: ieee.c:3108 msgid "unrecognized C++ object overhead spec" -msgstr "no se reconoce la especificación de adelanto de objeto C++" +msgstr "no se reconoce la especificación de adelanto de objeto C++" #: ieee.c:3147 msgid "undefined C++ vtable" @@ -2633,7 +2634,7 @@ msgstr "vtable C++ sin definir" #: ieee.c:3216 msgid "C++ default values not in a function" -msgstr "valores C++ por defecto no están en una función" +msgstr "valores C++ por defecto no están en una función" #: ieee.c:3256 msgid "unrecognized C++ default type" @@ -2641,7 +2642,7 @@ msgstr "no se reconoce el tipo por defecto de C++" #: ieee.c:3287 msgid "reference parameter is not a pointer" -msgstr "el parámetro de referencia no es un puntero" +msgstr "el parámetro de referencia no es un puntero" #: ieee.c:3370 msgid "unrecognized C++ reference type" @@ -2649,7 +2650,7 @@ msgstr "no se reconoce el tipo de referencia de C++" #: ieee.c:3452 msgid "C++ reference not found" -msgstr "no se encontró la referencia C++" +msgstr "no se encontró la referencia C++" #: ieee.c:3460 msgid "C++ reference is not pointer" @@ -2665,12 +2666,12 @@ msgstr "falta el ATN65 requerido" #: ieee.c:3543 msgid "bad ATN65 record" -msgstr "registro ATN65 erróneo" +msgstr "registro ATN65 erróneo" #: ieee.c:4171 #, c-format msgid "IEEE numeric overflow: 0x" -msgstr "desbordamiento numérico IEEE: 0x" +msgstr "desbordamiento numérico IEEE: 0x" #: ieee.c:4215 #, c-format @@ -2680,21 +2681,21 @@ msgstr "desbordamiento de longitud de cadena IEEE: %u\n" #: ieee.c:5210 #, c-format msgid "IEEE unsupported integer type size %u\n" -msgstr "no se admite el tamaño de tipo entero IEEE %u\n" +msgstr "no se admite el tamaño de tipo entero IEEE %u\n" #: ieee.c:5244 #, c-format msgid "IEEE unsupported float type size %u\n" -msgstr "no se admite el tamaño de tipo coma flotante IEEE %u\n" +msgstr "no se admite el tamaño de tipo coma flotante IEEE %u\n" #: ieee.c:5278 #, c-format msgid "IEEE unsupported complex type size %u\n" -msgstr "no se admite el tamaño de tipo complejo IEEE %u\n" +msgstr "no se admite el tamaño de tipo complejo IEEE %u\n" #: mclex.c:241 msgid "Duplicate symbol entered into keyword list." -msgstr "Se ingresó un símbolo duplicado en la lista de palabras clave." +msgstr "Se ingresó un símbolo duplicado en la lista de palabras clave." #: nlmconv.c:273 srconv.c:1823 msgid "input and output files must be different" @@ -2702,7 +2703,7 @@ msgstr "los ficheros de entrada y salida deben ser diferentes" #: nlmconv.c:320 msgid "input file named both on command line and with INPUT" -msgstr "fichero de entrada nombrado en la línea de órdenes y con INPUT" +msgstr "fichero de entrada nombrado en la línea de órdenes y con INPUT" #: nlmconv.c:329 msgid "no input file" @@ -2718,11 +2719,11 @@ msgstr "aviso: los formatos de entrada y salida no son compatibles" #: nlmconv.c:403 msgid "make .bss section" -msgstr "hace sección .bss" +msgstr "hace sección .bss" #: nlmconv.c:413 msgid "make .nlmsections section" -msgstr "hace sección .nlmsections" +msgstr "hace sección .nlmsections" #: nlmconv.c:441 msgid "set .bss vma" @@ -2730,51 +2731,51 @@ msgstr "establece vma .bss" #: nlmconv.c:448 msgid "set .data size" -msgstr "establece tamaño de .data" +msgstr "establece tamaño de .data" #: nlmconv.c:628 #, c-format msgid "warning: symbol %s imported but not in import list" -msgstr "aviso: se importó el símbolo %s pero no está en la lista de importación" +msgstr "aviso: se importó el símbolo %s pero no está en la lista de importación" #: nlmconv.c:648 msgid "set start address" -msgstr "establece la dirección de inicio" +msgstr "establece la dirección de inicio" #: nlmconv.c:697 #, c-format msgid "warning: START procedure %s not defined" -msgstr "aviso: el procedimiento START %s no está definido" +msgstr "aviso: el procedimiento START %s no está definido" #: nlmconv.c:699 #, c-format msgid "warning: EXIT procedure %s not defined" -msgstr "aviso: el procedimiento EXIT %s no está definido" +msgstr "aviso: el procedimiento EXIT %s no está definido" #: nlmconv.c:701 #, c-format msgid "warning: CHECK procedure %s not defined" -msgstr "aviso: el procedimiento CHECK %s no está definido" +msgstr "aviso: el procedimiento CHECK %s no está definido" #: nlmconv.c:721 nlmconv.c:907 msgid "custom section" -msgstr "sección a la medida" +msgstr "sección a la medida" #: nlmconv.c:741 nlmconv.c:936 msgid "help section" -msgstr "sección de ayuda" +msgstr "sección de ayuda" #: nlmconv.c:763 nlmconv.c:954 msgid "message section" -msgstr "sección de mensajes" +msgstr "sección de mensajes" #: nlmconv.c:778 nlmconv.c:987 msgid "module section" -msgstr "sección de módulos" +msgstr "sección de módulos" #: nlmconv.c:797 nlmconv.c:1003 msgid "rpc section" -msgstr "sección de rpc" +msgstr "sección de rpc" #. There is no place to record this information. #: nlmconv.c:833 @@ -2784,16 +2785,16 @@ msgstr "%s: aviso: las bibliotecas compartidas no pueden tener datos sin iniciar #: nlmconv.c:854 nlmconv.c:1022 msgid "shared section" -msgstr "sección compartida" +msgstr "sección compartida" #: nlmconv.c:862 msgid "warning: No version number given" -msgstr "aviso: No se dió un número de versión" +msgstr "aviso: No se dió un número de versión" #: nlmconv.c:902 nlmconv.c:931 nlmconv.c:949 nlmconv.c:998 nlmconv.c:1017 #, c-format msgid "%s: read: %s" -msgstr "%s: leído: %s" +msgstr "%s: leído: %s" #: nlmconv.c:924 msgid "warning: FULLMAP is not supported; try ld -M" @@ -2807,7 +2808,7 @@ msgstr "Modo de empleo: %s [opcion(es)] [fichero-entrada [fichero-salida]]\n" #: nlmconv.c:1101 #, c-format msgid " Convert an object file into a NetWare Loadable Module\n" -msgstr "Convierte un fichero objeto en un Módulo Cargable de NetWare (NLM)\n" +msgstr "Convierte un fichero objeto en un Módulo Cargable de NetWare (NLM)\n" #: nlmconv.c:1102 #, c-format @@ -2825,12 +2826,12 @@ msgstr "" " Las opciones son:\n" " -I --input-target= Establece el formato del fichero binario de entrada\n" " -O --output-target= Establece el formato del fichero binario de salida\n" -" -T --header-file= Lee el para la información del encabezado NLM\n" +" -T --header-file= Lee el para la información del encabezado NLM\n" " -l --linker= Usa el para cualquier enlazado\n" -" -d --debug Muestra en salida estándar la línea de comando del enlazador\n" +" -d --debug Muestra en salida estándar la línea de comando del enlazador\n" " @ Lee opciones del .\n" -" -h --help Muestra esta información\n" -" -v --version Muestra la versión del programa\n" +" -h --help Muestra esta información\n" +" -v --version Muestra la versión del programa\n" #: nlmconv.c:1143 #, c-format @@ -2839,23 +2840,23 @@ msgstr "soporte no compilado para %s" #: nlmconv.c:1180 msgid "make section" -msgstr "crea sección" +msgstr "crea sección" #: nlmconv.c:1194 msgid "set section size" -msgstr "establece el tamaño de la sección" +msgstr "establece el tamaño de la sección" #: nlmconv.c:1200 msgid "set section alignment" -msgstr "establece la alineación de la sección" +msgstr "establece la alineación de la sección" #: nlmconv.c:1204 msgid "set section flags" -msgstr "establece las opciones de la sección" +msgstr "establece las opciones de la sección" #: nlmconv.c:1215 msgid "set .nlmsections size" -msgstr "establece el tamaño de .nlmsections" +msgstr "establece el tamaño de .nlmsections" #: nlmconv.c:1296 nlmconv.c:1304 nlmconv.c:1313 nlmconv.c:1318 msgid "set .nlmsection contents" @@ -2863,7 +2864,7 @@ msgstr "establece el contenido de .nlmsection" #: nlmconv.c:1795 msgid "stub section sizes" -msgstr "tamaños de la sección de cabos" +msgstr "tamaños de la sección de cabos" #: nlmconv.c:1842 msgid "writing stub" @@ -2872,22 +2873,22 @@ msgstr "se escribe cabo" #: nlmconv.c:1926 #, c-format msgid "unresolved PC relative reloc against %s" -msgstr "reubicación relativa PC contra %s sin resolver" +msgstr "reubicación relativa PC contra %s sin resolver" #: nlmconv.c:1990 #, c-format msgid "overflow when adjusting relocation against %s" -msgstr "desbordamiento al ajustar la reubicación contra %s" +msgstr "desbordamiento al ajustar la reubicación contra %s" #: nlmconv.c:2117 #, c-format msgid "%s: execution of %s failed: " -msgstr "%s: falló la ejecución de %s: " +msgstr "%s: falló la ejecución de %s: " #: nlmconv.c:2132 #, c-format msgid "Execution of %s failed" -msgstr "Falló la ejecución de %s" +msgstr "Falló la ejecución de %s" #: nm.c:225 size.c:78 strings.c:646 #, c-format @@ -2897,7 +2898,7 @@ msgstr "Modo de empleo: %s [opcion(es)] [fichero(s)]\n" #: nm.c:226 #, c-format msgid " List symbols in [file(s)] (a.out by default).\n" -msgstr "Lista de símbolos en [fichero(s)] (a.out por defecto).\n" +msgstr "Lista de símbolos en [fichero(s)] (a.out por defecto).\n" #: nm.c:227 #, c-format @@ -2926,31 +2927,31 @@ msgid "" " -r, --reverse-sort Reverse the sense of the sort\n" msgstr "" "Las opciones son:\n" -" -a, --debug-syms Muestra símbolos sólo para el depurador\n" +" -a, --debug-syms Muestra símbolos sólo para el depurador\n" " -A, --print-file-name Muestra el nombre del fichero de entrada antes de\n" -" cada símbolo\n" +" cada símbolo\n" " -B Igual que --format=bsd\n" -" -C, --demangle[=ESTILO] Decodifica los nombres de símbolo de bajo nivel en\n" +" -C, --demangle[=ESTILO] Decodifica los nombres de símbolo de bajo nivel en\n" " nombres de nivel de usuario\n" " El ESTILO, si se especifica, puede ser `auto'\n" " (por defecto), `gnu', `lucid', `arm', `hp', `edg',\n" " `gnu-v3', `java' o `gnat'\n" -" --no-demangle No decodifica los nombres de símbolo de bajo nivel\n" -" -D, --dynamic Muestra los símbolos dinámicos en lugar de los\n" -" símbolos normales\n" -" --defined-only Muestra solamente los símbolos definidos\n" +" --no-demangle No decodifica los nombres de símbolo de bajo nivel\n" +" -D, --dynamic Muestra los símbolos dinámicos en lugar de los\n" +" símbolos normales\n" +" --defined-only Muestra solamente los símbolos definidos\n" " -e (se descarta)\n" " -f, --format=FORMATO Usa el formato de salida FORMATO. FORMATO puede ser\n" " `bsd', `sysv' o `posix'. Por defecto es `bsd'\n" -" -g, --extern-only Muestra solamente los símbolos externos\n" -" -l, --line-numbers Utiliza la información de depuración para encontrar\n" -" un nombre de fichero y un número de línea para cada\n" -" símbolo\n" -" -n, --numeric-sort Ordena los símbolos numéricamente por dirección\n" +" -g, --extern-only Muestra solamente los símbolos externos\n" +" -l, --line-numbers Utiliza la información de depuración para encontrar\n" +" un nombre de fichero y un número de línea para cada\n" +" símbolo\n" +" -n, --numeric-sort Ordena los símbolos numéricamente por dirección\n" " -o Igual que -A\n" -" -p, --no-sort No ordena los símbolos\n" +" -p, --no-sort No ordena los símbolos\n" " -P, --portability Igual que --format=posix\n" -" -r, --reverse-sort Cambia el sentido de la ordenación\n" +" -r, --reverse-sort Cambia el sentido de la ordenación\n" #: nm.c:250 #, c-format @@ -2974,39 +2975,39 @@ msgid "" " -V, --version Display this program's version number\n" "\n" msgstr "" -" -S, --print-size Muestra el tamaño de los símbolos definidos\n" -" -s, --print-armap Incluye el índice para símbolos de miembros de archivo\n" -" --size-sort Ordena los símbolos por tamaño\n" -" --special-syms Incluye los símbolos especiales en la salida\n" -" --synthetic Muestra también los símbolos sintéticos\n" -" -t, --radix=RADICAL Usa el RADICAL para mostrar valores de símbolo\n" +" -S, --print-size Muestra el tamaño de los símbolos definidos\n" +" -s, --print-armap Incluye el índice para símbolos de miembros de archivo\n" +" --size-sort Ordena los símbolos por tamaño\n" +" --special-syms Incluye los símbolos especiales en la salida\n" +" --synthetic Muestra también los símbolos sintéticos\n" +" -t, --radix=RADICAL Usa el RADICAL para mostrar valores de símbolo\n" " --target=NOMBFD Especifica el formato de objeto objetivo como NOMBFD\n" -" -u, --undefined-only Sólo muestra los símbolos sin definir\n" +" -u, --undefined-only Sólo muestra los símbolos sin definir\n" " -X 32_64 (se descarta)\n" " @FICHERO Lee opciones del FICHERO\n" -" -h, --help Muestra esta información\n" -" -V, --version Muestra el número de versión de este programa\n" +" -h, --help Muestra esta información\n" +" -V, --version Muestra el número de versión de este programa\n" "\n" #: nm.c:301 #, c-format msgid "%s: invalid radix" -msgstr "%s: radical inválido" +msgstr "%s: radical inválido" #: nm.c:325 #, c-format msgid "%s: invalid output format" -msgstr "%s: formato de salida inválido" +msgstr "%s: formato de salida inválido" #: nm.c:346 readelf.c:8259 readelf.c:8304 #, c-format msgid ": %d" -msgstr " %d:" +msgstr " %d:" #: nm.c:348 readelf.c:8268 readelf.c:8322 #, c-format msgid ": %d" -msgstr ": %d" +msgstr ": %d" #: nm.c:350 readelf.c:8271 readelf.c:8325 #, c-format @@ -3020,7 +3021,7 @@ msgid "" "Archive index:\n" msgstr "" "\n" -"Índice del archivo:\n" +"Índice del archivo:\n" #: nm.c:1251 #, c-format @@ -3032,7 +3033,7 @@ msgid "" msgstr "" "\n" "\n" -"Símbolos sin definir de %s:\n" +"Símbolos sin definir de %s:\n" "\n" #: nm.c:1253 @@ -3045,7 +3046,7 @@ msgid "" msgstr "" "\n" "\n" -"Símbolos de %s:\n" +"Símbolos de %s:\n" "\n" #: nm.c:1255 nm.c:1306 @@ -3054,7 +3055,7 @@ msgid "" "Name Value Class Type Size Line Section\n" "\n" msgstr "" -"Nombre Valor Clase Tipo Tamaño Línea Sección\n" +"Nombre Valor Clase Tipo Tamaño Línea Sección\n" "\n" #: nm.c:1258 nm.c:1309 @@ -3063,7 +3064,7 @@ msgid "" "Name Value Class Type Size Line Section\n" "\n" msgstr "" -"Nombre Valor Clase Tipo Tamaño Línea Sección\n" +"Nombre Valor Clase Tipo Tamaño Línea Sección\n" "\n" #: nm.c:1302 @@ -3076,7 +3077,7 @@ msgid "" msgstr "" "\n" "\n" -"Símbolos sin definir de %s[%s]:\n" +"Símbolos sin definir de %s[%s]:\n" "\n" #: nm.c:1304 @@ -3089,13 +3090,13 @@ msgid "" msgstr "" "\n" "\n" -"Símbolos de %s[%s]:\n" +"Símbolos de %s[%s]:\n" "\n" #: nm.c:1396 #, c-format msgid "Print width has not been initialized (%d)" -msgstr "No se inicializó la anchura de la impresión (%d)" +msgstr "No se inicializó la anchura de la impresión (%d)" #: nm.c:1624 msgid "Only -X 32_64 is supported" @@ -3107,12 +3108,12 @@ msgstr "Al usar juntas las opciones --size-sort y --undefined-only" #: nm.c:1654 msgid "will produce no output, since undefined symbols have no size." -msgstr "no se producirá salida, porque los símbolos sin definir no tienen tamaño." +msgstr "no se producirá salida, porque los símbolos sin definir no tienen tamaño." #: nm.c:1682 #, c-format msgid "data size %ld" -msgstr "tamaño de datos %ld" +msgstr "tamaño de datos %ld" #: objcopy.c:473 srconv.c:1731 #, c-format @@ -3122,7 +3123,7 @@ msgstr "Modo de empleo: %s [opcion(es)] fichero-entrada [fichero-salida]\n" #: objcopy.c:474 #, c-format msgid " Copies a binary file, possibly transforming it in the process\n" -msgstr " Copia un fichero binario, posiblemente transformándolo en el proceso\n" +msgstr " Copia un fichero binario, posiblemente transformándolo en el proceso\n" #: objcopy.c:476 #, c-format @@ -3224,7 +3225,7 @@ msgid "" " -h --help Display this output\n" " --info List object formats & architectures supported\n" msgstr "" -" -I --input-target Asume que el fichero de entrada está en\n" +" -I --input-target Asume que el fichero de entrada está en\n" " el formato \n" " -O --output-target Crea un fichero de salida en el formato\n" " \n" @@ -3232,110 +3233,110 @@ msgstr "" " salida, cuando la entrada es binaria\n" " -F --target Establece tanto el formato de salida como\n" " el de entrada a \n" -" --debugging Convierte la información de depuración, si\n" +" --debugging Convierte la información de depuración, si\n" " es posible\n" -" -p --preserve-dates Copia las marcas de tiempo de modificación y\n" +" -p --preserve-dates Copia las marcas de tiempo de modificación y\n" " acceso a la salida\n" -" -j --only-section Sólo copia la sección en la salida\n" -" --add-gnu-debuglink= Agrega la sección de enlazado .gnu_debuglink\n" +" -j --only-section Sólo copia la sección en la salida\n" +" --add-gnu-debuglink= Agrega la sección de enlazado .gnu_debuglink\n" " al ero\n" -" -R --remove-section Borra la sección de la salida\n" -" -S --strip-all Borra todos los símbolos y la información de\n" -" reubicación\n" -" -g --strip-debug Borra todos los símbolos y secciones de\n" -" depuración\n" -" --strip-unneeded Borra todos los símbolos innecesarios para\n" +" -R --remove-section Borra la sección de la salida\n" +" -S --strip-all Borra todos los símbolos y la información de\n" +" reubicación\n" +" -g --strip-debug Borra todos los símbolos y secciones de\n" +" depuración\n" +" --strip-unneeded Borra todos los símbolos innecesarios para\n" " las reubicaciones\n" -" -N --strip-symbol No copia el símbolo \n" +" -N --strip-symbol No copia el símbolo \n" " --strip-unneeded-symbol \n" -" No copia el símbolo a menos que sea\n" +" No copia el símbolo a menos que sea\n" " necesario para las reubicaciones\n" -" --only-keep-debug Borra todo excepto la información de\n" -" depuración\n" -" --extract-symbol Borra los contenidos de la sección pero\n" -" conserva los símbolos\n" -" -K --keep-symbol No borra el símbolo \n" -" --keep-file-symbols No borra los símbolos de fichero\n" -" --localize-hidden Convierte todos los símbolos ocultos ELF\n" +" --only-keep-debug Borra todo excepto la información de\n" +" depuración\n" +" --extract-symbol Borra los contenidos de la sección pero\n" +" conserva los símbolos\n" +" -K --keep-symbol No borra el símbolo \n" +" --keep-file-symbols No borra los símbolos de fichero\n" +" --localize-hidden Convierte todos los símbolos ocultos ELF\n" " en locales\n" -" -L --localize-symbol Fuerza que el símbolo se marque como\n" +" -L --localize-symbol Fuerza que el símbolo se marque como\n" " local\n" -" --globalize-symbol Fuerza que el símbolo se marque como\n" +" --globalize-symbol Fuerza que el símbolo se marque como\n" " global\n" -" -G --keep-global-symbol Vuelve locales todos los símbolos excepto\n" +" -G --keep-global-symbol Vuelve locales todos los símbolos excepto\n" " \n" -" -W --weaken-symbol Fuerza que el símbolo se marque como\n" -" débil\n" -" --weaken Fuerza que todos los símbolos se marquen como\n" -" débiles\n" -" -w --wildcard Permite comodines en la comparación de\n" -" símbolos\n" -" -x --discard-all Borra todos los símbolos que no son globales\n" -" -X --discard-locals Borra cualquier símbolo generado por el\n" +" -W --weaken-symbol Fuerza que el símbolo se marque como\n" +" débil\n" +" --weaken Fuerza que todos los símbolos se marquen como\n" +" débiles\n" +" -w --wildcard Permite comodines en la comparación de\n" +" símbolos\n" +" -x --discard-all Borra todos los símbolos que no son globales\n" +" -X --discard-locals Borra cualquier símbolo generado por el\n" " compilador\n" -" -i --interleave [] Sólo copia N de cada bytes\n" +" -i --interleave [] Sólo copia N de cada bytes\n" " --interleave-width Define N para --interleave\n" " -b --byte Selecciona el byte en cada bloque\n" " espaciado\n" " --gap-fill Rellena los huecos entre secciones con \n" -" --pad-to Rellena la última sección hasta\n" -" la \n" -" --set-start Establece la dirección de inicio en\n" -" \n" +" --pad-to Rellena la última sección hasta\n" +" la \n" +" --set-start Establece la dirección de inicio en\n" +" \n" " {--change-start|--adjust-start} \n" -" Agrega a la dirección de inicio\n" +" Agrega a la dirección de inicio\n" " {--change-addresses|--adjust-vma} \n" " Agrega a las direcciones LMA, VMA y\n" " la de inicio\n" " {--change-section-address|--adjust-section-vma} {=|+|-}\n" -" Cambia el LMA y el VMA de la sección\n" +" Cambia el LMA y el VMA de la sección\n" " por \n" " --change-section-lma {=|+|-}\n" -" Cambia LMA de la sección por \n" +" Cambia LMA de la sección por \n" " --change-section-vma {=|+|-}\n" -" Cambia VMA de la sección por \n" +" Cambia VMA de la sección por \n" " {--[no-]change-warnings|--[no-]adjust-warnings}\n" -" Avisa si no existe una sección nombrada\n" +" Avisa si no existe una sección nombrada\n" " --set-section-flags =\n" -" Establece las propiedades de la sección\n" +" Establece las propiedades de la sección\n" " a \n" " --add-section =\n" -" Agrega la sección que se encuentra\n" +" Agrega la sección que se encuentra\n" " en el a la salida\n" -" --rename-section =[,] Renombra la sección a \n" +" --rename-section =[,] Renombra la sección a \n" " --long-section-names {enable|disable|keep}\n" -" Maneja los nombres de sección largos en\n" +" Maneja los nombres de sección largos en\n" " objetos Coff.\n" -" --change-leading-char Fuerza el carácter de estilo inicial en\n" +" --change-leading-char Fuerza el carácter de estilo inicial en\n" " el formato de salida\n" -" --remove-leading-char Borra el carácter inicial de los símbolos\n" +" --remove-leading-char Borra el carácter inicial de los símbolos\n" " globales\n" " --reverse-bytes= Invierte bytes a la vez, en la\n" -" sección de salida con contenido\n" -" --redefine-sym = Redefine el nombre de símbolo a \n" +" sección de salida con contenido\n" +" --redefine-sym = Redefine el nombre de símbolo a \n" " --redefine-syms --redefine-sym para todos los pares de\n" -" símbolos enlistados en el \n" -" --srec-len Restringe la longitud de los Srecords\n" +" símbolos enlistados en el \n" +" --srec-len Restringe la longitud de los Srecords\n" " generados\n" " --srec-forceS3 Restringe el tipo de los Srecords generados\n" " a S3\n" -" --strip-symbols -N para todos los símbolos enlistados en el\n" +" --strip-symbols -N para todos los símbolos enlistados en el\n" " \n" " --strip-unneeded-symbols \n" " --strip-unneeded-symbol para todos los\n" -" símbolos enlistados en el \n" -" --keep-symbols -K para todos los símbolos enlistados en el\n" +" símbolos enlistados en el \n" +" --keep-symbols -K para todos los símbolos enlistados en el\n" " \n" -" --localize-symbols -L para todos los símbolos enlistados en el\n" +" --localize-symbols -L para todos los símbolos enlistados en el\n" " \n" -" --globalize-symbols --globalize-symbol para todos los símbolos\n" +" --globalize-symbols --globalize-symbol para todos los símbolos\n" " en el \n" " --keep-global-symbols \n" -" -G para todos los símbolos enlistados en el\n" +" -G para todos los símbolos enlistados en el\n" " \n" -" --weaken-symbols -W para todos los símbolos enlistados en el\n" +" --weaken-symbols -W para todos los símbolos enlistados en el\n" " \n" -" --alt-machine-code <índice> Utiliza código máquina alternativo para la\n" +" --alt-machine-code <índice> Utiliza código máquina alternativo para la\n" " salida\n" " --writable-text Marca el texto de salida como modificable\n" " --readonly-text Marca el texto de salida como protegido\n" @@ -3344,28 +3345,28 @@ msgstr "" " demanda\n" " --impure Marca el fichero de salida como impuro\n" " --prefix-symbols Agrega al inicio de cada nombre de\n" -" símbolo\n" +" símbolo\n" " --prefix-sections Agrega al inicio de cada nombre de\n" -" sección\n" +" sección\n" " --prefix-alloc-sections \n" " Agrega al inicio de cada nombre de\n" -" sección alojable\n" +" sección alojable\n" " --file-alignment Define la alineacion del fichero PE a \n" -" --heap [,] Define el cúmulo reserva/confirma de PE a\n" +" --heap [,] Define el cúmulo reserva/confirma de PE a\n" " /\n" -" --image-base Define la imagen base de PE a \n" +" --image-base Define la imagen base de PE a \n" " --stack [,] Define la pila reserva/confirma de PE a\n" " /\n" -" --subsystem [:]\n" +" --subsystem [:]\n" " Define el subsistema PE a \n" -" [y ]\n" -" --compress-debug-sections Comprime las secciones de depuración DWARF\n" +" [y ]\n" +" --compress-debug-sections Comprime las secciones de depuración DWARF\n" " usando zlib\n" -" --decompress-debug-sections Descomprime las secciones de depuración\n" +" --decompress-debug-sections Descomprime las secciones de depuración\n" " DWARF usando zlib\n" " -v --verbose Enlista todos los ficheros objeto modificados\n" " @ Lee opciones del \n" -" -V --version Muestra el número de versión de este programa\n" +" -V --version Muestra el número de versión de este programa\n" " -h --help Muestra esta salida\n" " --info Enlista los formatos objeto y arquitecturas\n" " que se admiten\n" @@ -3378,7 +3379,7 @@ msgstr "Modo de empleo: %s fichero(s)-entrada\n" #: objcopy.c:584 #, c-format msgid " Removes symbols and sections from files\n" -msgstr " Remueve símbolos y secciones de los ficheros\n" +msgstr " Remueve símbolos y secciones de los ficheros\n" #: objcopy.c:586 #, c-format @@ -3404,33 +3405,33 @@ msgid "" " --info List object formats & architectures supported\n" " -o Place stripped output into \n" msgstr "" -" -I --input-target= Asume que el fichero de entrada está en\n" +" -I --input-target= Asume que el fichero de entrada está en\n" " el formato \n" " -O --output-target= Crea un fichero de salida en el formato\n" " \n" " -F --target Establece tanto el formato de salida como\n" " el de entrada a \n" -" -p --preserve-dates Copia las marcas de tiempo de modificación\n" +" -p --preserve-dates Copia las marcas de tiempo de modificación\n" " y acceso a la salida\n" -" -R --remove-section= Borra la sección de la salida\n" -" -s --strip-all Borra todos los símbolos y la información\n" -" de reubicación\n" -" -g -S -d --strip-debug Borra todos los símbolos y secciones de\n" -" depuración\n" -" --strip-unneeded Borra todos los símbolos innecesarios para\n" +" -R --remove-section= Borra la sección de la salida\n" +" -s --strip-all Borra todos los símbolos y la información\n" +" de reubicación\n" +" -g -S -d --strip-debug Borra todos los símbolos y secciones de\n" +" depuración\n" +" --strip-unneeded Borra todos los símbolos innecesarios para\n" " las reubicaciones\n" -" --only-keep-debug Borra todo excepto la información de\n" -" depuración\n" -" -N --strip-symbol= No copia el símbolo \n" -" -K --keep-symbol= No borra el símbolo \n" -" --keep-file-symbols No borra los símbolos de fichero\n" -" -w --wildcard Permite comodines en la comparación de\n" -" símbolos\n" -" -x --discard-all Borra todos los símbolos que no son globales\n" -" -X --discard-locals Borra cualquier símbolo generado por\n" +" --only-keep-debug Borra todo excepto la información de\n" +" depuración\n" +" -N --strip-symbol= No copia el símbolo \n" +" -K --keep-symbol= No borra el símbolo \n" +" --keep-file-symbols No borra los símbolos de fichero\n" +" -w --wildcard Permite comodines en la comparación de\n" +" símbolos\n" +" -x --discard-all Borra todos los símbolos que no son globales\n" +" -X --discard-locals Borra cualquier símbolo generado por\n" " el compilador\n" " -v --verbose Enlista todos los ficheros objeto modificados\n" -" -V --version Muestra el número de versión de este programa\n" +" -V --version Muestra el número de versión de este programa\n" " -h --help Muestra esta salida\n" " --info Muestra los formatos objeto y arquitecturas\n" " admitidos\n" @@ -3439,7 +3440,7 @@ msgstr "" #: objcopy.c:659 #, c-format msgid "unrecognized section flag `%s'" -msgstr "opción de sección `%s' desconocida" +msgstr "opción de sección `%s' desconocida" #: objcopy.c:660 #, c-format @@ -3454,42 +3455,42 @@ msgstr "no se puede abrir '%s': %s" #: objcopy.c:764 objcopy.c:3389 #, c-format msgid "%s: fread failed" -msgstr "%s: falló fread" +msgstr "%s: falló fread" #: objcopy.c:837 #, c-format msgid "%s:%d: Ignoring rubbish found on this line" -msgstr "%s:%d: Se descarta la basura encontrada en esta línea" +msgstr "%s:%d: Se descarta la basura encontrada en esta línea" #: objcopy.c:1128 #, c-format msgid "not stripping symbol `%s' because it is named in a relocation" -msgstr "no se elimina el símbolo `%s' porque se nombra en una reubicación" +msgstr "no se elimina el símbolo `%s' porque se nombra en una reubicación" #: objcopy.c:1211 #, c-format msgid "%s: Multiple redefinition of symbol \"%s\"" -msgstr "%s: Redefiniciones múltiples del símbolo \"%s\"" +msgstr "%s: Redefiniciones múltiples del símbolo \"%s\"" #: objcopy.c:1215 #, c-format msgid "%s: Symbol \"%s\" is target of more than one redefinition" -msgstr "%s: El símbolo \"%s\" es objetivo de más de una redefinición" +msgstr "%s: El símbolo \"%s\" es objetivo de más de una redefinición" #: objcopy.c:1243 #, c-format msgid "couldn't open symbol redefinition file %s (error: %s)" -msgstr "no se puede abrir el fichero de redefinición de símbolos %s (error: %s)" +msgstr "no se puede abrir el fichero de redefinición de símbolos %s (error: %s)" #: objcopy.c:1321 #, c-format msgid "%s:%d: garbage found at end of line" -msgstr "%s:%d: se encontró basura al final de la línea" +msgstr "%s:%d: se encontró basura al final de la línea" #: objcopy.c:1324 #, c-format msgid "%s:%d: missing new symbol name" -msgstr "%s:%d: falta el nombre del símbolo nuevo" +msgstr "%s:%d: falta el nombre del símbolo nuevo" #: objcopy.c:1334 #, c-format @@ -3518,7 +3519,7 @@ msgstr "copia de `%s' [%s] a `%s' [%s]\n" #: objcopy.c:1485 #, c-format msgid "Input file `%s' ignores binary architecture parameter." -msgstr "El fichero de entrada `%s' descarta el parámeto binario de arquitectura." +msgstr "El fichero de entrada `%s' descarta el parámeto binario de arquitectura." #: objcopy.c:1493 #, c-format @@ -3533,26 +3534,26 @@ msgstr "El fichero de salida no puede representar a la arquitectura `%s'" #: objcopy.c:1559 #, c-format msgid "warning: file alignment (0x%s) > section alignment (0x%s)" -msgstr "aviso: alineación del fichero (0x%s) > alineación de la sección (0x%s)" +msgstr "aviso: alineación del fichero (0x%s) > alineación de la sección (0x%s)" #: objcopy.c:1618 #, c-format msgid "can't add section '%s'" -msgstr "no se puede agregar la sección '%s'" +msgstr "no se puede agregar la sección '%s'" #: objcopy.c:1632 #, c-format msgid "can't create section `%s'" -msgstr "no se puede crear la sección `%s'" +msgstr "no se puede crear la sección `%s'" #: objcopy.c:1678 #, c-format msgid "cannot create debug link section `%s'" -msgstr "no se puede crear la sección de enlace de depuración `%s'" +msgstr "no se puede crear la sección de enlace de depuración `%s'" #: objcopy.c:1771 msgid "Can't fill gap after section" -msgstr "No se puede llenar el espacio después de la sección" +msgstr "No se puede llenar el espacio después de la sección" #: objcopy.c:1795 msgid "can't add padding" @@ -3561,7 +3562,7 @@ msgstr "No se puede agregar relleno" #: objcopy.c:1886 #, c-format msgid "cannot fill debug link section `%s'" -msgstr "no se puede llenar la sección de enlace de depuración `%s'" +msgstr "no se puede llenar la sección de enlace de depuración `%s'" #: objcopy.c:1949 msgid "error copying private BFD data" @@ -3570,11 +3571,11 @@ msgstr "error al copiar los datos privados BFD" #: objcopy.c:1960 #, c-format msgid "this target does not support %lu alternative machine codes" -msgstr "este objetivo no admite los códigos de máquina alternativos %lu" +msgstr "este objetivo no admite los códigos de máquina alternativos %lu" #: objcopy.c:1964 msgid "treating that number as an absolute e_machine value instead" -msgstr "en su lugar, se trata ese número como un valor e_machine absoluto" +msgstr "en su lugar, se trata ese número como un valor e_machine absoluto" #: objcopy.c:1968 msgid "ignoring the alternative value" @@ -3592,12 +3593,12 @@ msgstr "No se puede reconocer el formato del fichero" #: objcopy.c:2194 #, c-format msgid "error: the input file '%s' is empty" -msgstr "error: el fichero de entrada '%s' está vacío" +msgstr "error: el fichero de entrada '%s' está vacío" #: objcopy.c:2338 #, c-format msgid "Multiple renames of section %s" -msgstr "Renombrado múltiple de la sección %s" +msgstr "Renombrado múltiple de la sección %s" #: objcopy.c:2389 msgid "error in private header data" @@ -3605,11 +3606,11 @@ msgstr "error en los datos de encabezado privado" #: objcopy.c:2467 msgid "failed to create output section" -msgstr "no se puede crear la sección de salida" +msgstr "no se puede crear la sección de salida" #: objcopy.c:2481 msgid "failed to set size" -msgstr "no se puede establecer el tamaño" +msgstr "no se puede establecer el tamaño" #: objcopy.c:2495 msgid "failed to set vma" @@ -3617,7 +3618,7 @@ msgstr "no se puede establecer vma" #: objcopy.c:2520 msgid "failed to set alignment" -msgstr "no se puede establecer la alineación" +msgstr "no se puede establecer la alineación" #: objcopy.c:2554 msgid "failed to copy private data" @@ -3625,35 +3626,35 @@ msgstr "no se pueden copiar los datos privados" #: objcopy.c:2636 msgid "relocation count is negative" -msgstr "la cuenta de reubicación es negativa" +msgstr "la cuenta de reubicación es negativa" #. User must pad the section up in order to do this. #: objcopy.c:2697 #, c-format msgid "cannot reverse bytes: length of section %s must be evenly divisible by %d" -msgstr "no se pueden invertir bytes: la longitud de la sección %s debe ser divisible por par por %d" +msgstr "no se pueden invertir bytes: la longitud de la sección %s debe ser divisible por par por %d" #: objcopy.c:2883 msgid "can't create debugging section" -msgstr "no se puede crear la sección de depuración" +msgstr "no se puede crear la sección de depuración" #: objcopy.c:2896 msgid "can't set debugging section contents" -msgstr "no se puede establecer el contenido de la sección de depuración" +msgstr "no se puede establecer el contenido de la sección de depuración" #: objcopy.c:2904 #, c-format msgid "don't know how to write debugging information for %s" -msgstr "no se sabe cómo escribir la información de depuración para %s" +msgstr "no se sabe cómo escribir la información de depuración para %s" #: objcopy.c:3046 msgid "could not create temporary file to hold stripped copy" -msgstr "no se puede crear el fichero temporal para contener la copia con símbolos eliminados" +msgstr "no se puede crear el fichero temporal para contener la copia con símbolos eliminados" #: objcopy.c:3118 #, c-format msgid "%s: bad version in PE subsystem" -msgstr "%s: versión errónea en el subsistema PE" +msgstr "%s: versión errónea en el subsistema PE" #: objcopy.c:3148 #, c-format @@ -3662,7 +3663,7 @@ msgstr "subsistema PE desconocido: %s" #: objcopy.c:3209 msgid "byte number must be non-negative" -msgstr "el número de bytes no debe ser negativo" +msgstr "el número de bytes no debe ser negativo" #: objcopy.c:3215 #, c-format @@ -3686,7 +3687,7 @@ msgstr "%s copiado y borrado al mismo tiempo" #: objcopy.c:3606 objcopy.c:3626 #, c-format msgid "bad format for %s" -msgstr "formato erróneo para %s" +msgstr "formato erróneo para %s" #: objcopy.c:3371 #, c-format @@ -3701,15 +3702,15 @@ msgstr "Aviso: truncando el relleno de espacio de 0x%s a 0x%x" #: objcopy.c:3677 #, c-format msgid "unknown long section names option '%s'" -msgstr "opción de nombres de sección largos '%s' desconocida" +msgstr "opción de nombres de sección largos '%s' desconocida" #: objcopy.c:3695 msgid "unable to parse alternative machine code" -msgstr "no se puede decodificar el código máquina alternativo" +msgstr "no se puede decodificar el código máquina alternativo" #: objcopy.c:3740 msgid "number of bytes to reverse must be positive and even" -msgstr "el número de bytes para reverse debe ser positivo y par" +msgstr "el número de bytes para reverse debe ser positivo y par" #: objcopy.c:3743 #, c-format @@ -3719,22 +3720,22 @@ msgstr "Aviso: se descarta el valor previo --reverse-bytes de %d" #: objcopy.c:3758 #, c-format msgid "%s: invalid reserve value for --heap" -msgstr "%s: valor de reserva inválido para --heap" +msgstr "%s: valor de reserva inválido para --heap" #: objcopy.c:3764 #, c-format msgid "%s: invalid commit value for --heap" -msgstr "%s: valor de confirmación inválido para --heap" +msgstr "%s: valor de confirmación inválido para --heap" #: objcopy.c:3789 #, c-format msgid "%s: invalid reserve value for --stack" -msgstr "%s: valor de reserva inválido para --stack" +msgstr "%s: valor de reserva inválido para --stack" #: objcopy.c:3795 #, c-format msgid "%s: invalid commit value for --stack" -msgstr "%s: valor de confirmación inválido para --stack" +msgstr "%s: valor de confirmación inválido para --stack" #: objcopy.c:3824 msgid "interleave start byte must be set with --byte" @@ -3742,7 +3743,7 @@ msgstr "el byte de inicio del espacio se debe establecer con --byte" #: objcopy.c:3827 msgid "byte number must be less than interleave" -msgstr "el número de bytes debe ser menor al espacio" +msgstr "el número de bytes debe ser menor al espacio" #: objcopy.c:3830 msgid "interleave width must be less than or equal to interleave - byte`" @@ -3781,7 +3782,7 @@ msgstr "Modo de empleo: %s \n" #: objdump.c:191 #, c-format msgid " Display information from object .\n" -msgstr "Muestra la información de objeto.\n" +msgstr "Muestra la información de objeto.\n" #: objdump.c:192 #, c-format @@ -3817,41 +3818,41 @@ msgid "" " -i, --info List object formats and architectures supported\n" " -H, --help Display this information\n" msgstr "" -" -a, --archive-headers Muestra información del encabezado del archivo\n" +" -a, --archive-headers Muestra información del encabezado del archivo\n" " -f, --file-headers Muestra el contenido de todos los encabezados del\n" " fichero\n" " -p, --private-headers Muestra el contenido del encabezado del fichero\n" -" específicos del formato objeto\n" -" -h, --[section-]headers Muestra el contenido de los encabezados de sección\n" +" específicos del formato objeto\n" +" -h, --[section-]headers Muestra el contenido de los encabezados de sección\n" " -x, --all-headers Muestra el contenido de todos los encabezados\n" " -d, --disassemble Muestra el contenido de ensamblador de las secciones\n" " ejecutables\n" " -D, --disassemble-all Muestra el contenido de ensamblador de todas las\n" " secciones\n" -" -S, --source Intermezclar código fuente con el desensamblado\n" +" -S, --source Intermezclar código fuente con el desensamblado\n" " -s, --full-contents Muestra el contenido completo de todas las secciones\n" " solicitadas\n" -" -g, --debugging Muestra la información de depuración en el fichero\n" +" -g, --debugging Muestra la información de depuración en el fichero\n" " objeto\n" -" -e, --debugging-tags Muestra la información de depuración en estilo ctags\n" -" -G, --stabs Muestra (sin formato) cualquier información de STABS\n" +" -e, --debugging-tags Muestra la información de depuración en estilo ctags\n" +" -G, --stabs Muestra (sin formato) cualquier información de STABS\n" " en el fichero\n" " -W[lLiaprmfFsoRt] o\n" " --dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,\n" " =frames-interp,=str,=loc,=Ranges,=pubtypes,\n" " =trace_info,=trace_abbrev,=trace_aranges]\n" -" Muestra la información DWARF en el fichero\n" -" -t, --syms Muestra el contenido de la(s) tabla(s) de símbolos\n" -" -T, --dynamic-syms Muestra el contenido de la tabla de símbolos\n" -" dinámicos\n" -" -r, --reloc Muestra las entradas de reubicación en el fichero\n" -" -R, --dynamic-reloc Muestra las entradas de reubicación dinámica en el\n" +" Muestra la información DWARF en el fichero\n" +" -t, --syms Muestra el contenido de la(s) tabla(s) de símbolos\n" +" -T, --dynamic-syms Muestra el contenido de la tabla de símbolos\n" +" dinámicos\n" +" -r, --reloc Muestra las entradas de reubicación en el fichero\n" +" -R, --dynamic-reloc Muestra las entradas de reubicación dinámica en el\n" " fichero\n" " @ Lee opciones del \n" -" -v, --version Muestra el número de versión de este programa\n" +" -v, --version Muestra el número de versión de este programa\n" " -i, --info Enlista los formatos objeto y las arquitecturas\n" " admitidos\n" -" -H, --help Muestra esta información\n" +" -H, --help Muestra esta información\n" #: objdump.c:222 #, c-format @@ -3885,7 +3886,7 @@ msgid "" " --stop-address=ADDR Only process data whose address is <= ADDR\n" " --prefix-addresses Print complete address alongside disassembly\n" " --[no-]show-raw-insn Display hex alongside symbolic disassembly\n" -" --insn-width=WIDTH Display WIDTH bytes on a single line for -d\n" +" --insn-width=WIDTH Display WIDTH bytes on a signle line for -d\n" " --adjust-vma=OFFSET Add OFFSET to all displayed section addresses\n" " --special-syms Include special symbols in symbol dumps\n" " --prefix=PREFIX Add PREFIX to absolute paths for -S\n" @@ -3894,40 +3895,40 @@ msgid "" msgstr "" " -b, --target=NOMBREBFD Especifica el formato objeto objetivo\n" " como NOMBREBFD\n" -" -m, --architecture=MÁQUINA Especifica la arquitectura objetivo\n" -" como MÁQUINA\n" -" -j, --section=NOMBRE Sólo muestra la información de\n" -" la sección NOMBRE\n" +" -m, --architecture=MÁQUINA Especifica la arquitectura objetivo\n" +" como MÁQUINA\n" +" -j, --section=NOMBRE Sólo muestra la información de\n" +" la sección NOMBRE\n" " -M, --disassembler-options=OPT Pasa el texto OPT al desensamblador\n" " -EB --endian=big Asume el formato big endian al desensamblar\n" " -EL --endian=little Asume el formato little endian al desensamblar\n" " --file-start-context Incluye el contexto del inicio del fichero\n" " (con -S)\n" -" -I, --include=DIR Agrega el DIRectorio a la lista de búsqueda de\n" +" -I, --include=DIR Agrega el DIRectorio a la lista de búsqueda de\n" " ficheros fuente\n" -" -l, --line-numbers Incluye los números de línea y los nombres de fichero\n" +" -l, --line-numbers Incluye los números de línea y los nombres de fichero\n" " en la salida\n" " -F, --file-offsets Incluye desplazamientos de fichero al mostrar\n" -" la información\n" -" -C, --demangle[=ESTILO] Decodifica los nombres de símbolo obtenidos/procesados\n" +" la información\n" +" -C, --demangle[=ESTILO] Decodifica los nombres de símbolo obtenidos/procesados\n" " El ESTILO, si se especifica, puede ser\n" " `auto', 'gnu', `lucid', `arm', `hp', `edg',\n" " `gnu-v3', `java' o `gnat'\n" -" -w, --wide Da formato a la salida para más de 80 columnas\n" +" -w, --wide Da formato a la salida para más de 80 columnas\n" " -z, --disassemble-zeroes No salta los bloques de ceros al desensamblar\n" -" --start-address=DIR Sólo procesa los datos cuya dirección es\n" +" --start-address=DIR Sólo procesa los datos cuya dirección es\n" " >= DIR\n" -" --stop-address=DIR Sólo procesa los datos cuya dirección es\n" +" --stop-address=DIR Sólo procesa los datos cuya dirección es\n" " <= DIR\n" " --prefix-addresses Muestra las direcciones completas a lo largo\n" " del desensamblado\n" " --[no-]show-raw-insn Muestra en hexadecimal a lo largo\n" -" del desensamblado simbólico\n" -" --insn-width=ANCHO Muestra ANCHO bytes en una sola línea con -d\n" +" del desensamblado simbólico\n" +" --insn-width=ANCHO Muestra ANCHO bytes en una sola línea con -d\n" " --adjust-vma=DESPL Agrega el DESPLazamiento a todas las direcciones\n" -" mostradas de sección\n" -" --special-syms Incluye símbolos especiales en los volcados de\n" -" símbolos\n" +" mostradas de sección\n" +" --special-syms Incluye símbolos especiales en los volcados de\n" +" símbolos\n" " --prefix=PREFIJO Agrega el PREFIJO a las rutas absolutas con -S\n" " --prefix-strip=NIVEL Descarta los nombres de directorio iniciales\n" " con -S\n" @@ -3935,7 +3936,7 @@ msgstr "" #: objdump.c:396 #, c-format msgid "section '%s' mentioned in a -j option, but not found in any input file" -msgstr "la sección '%s' se menciona en una opción -j, pero no se encuentra en ningún fichero de entrada" +msgstr "la sección '%s' se menciona en una opción -j, pero no se encuentra en ningún fichero de entrada" #: objdump.c:500 #, c-format @@ -3945,12 +3946,12 @@ msgstr "Secciones:\n" #: objdump.c:503 objdump.c:507 #, c-format msgid "Idx Name Size VMA LMA File off Algn" -msgstr "Ind Nombre Tamaño VMA LMA Desp fich Alin" +msgstr "Ind Nombre Tamaño VMA LMA Desp fich Alin" #: objdump.c:509 #, c-format msgid "Idx Name Size VMA LMA File off Algn" -msgstr "Ind Nombre Tamaño VMA LMA Desp fich Alin" +msgstr "Ind Nombre Tamaño VMA LMA Desp fich Alin" #: objdump.c:513 #, c-format @@ -3965,7 +3966,7 @@ msgstr " Pg" #: objdump.c:558 #, c-format msgid "%s: not a dynamic object" -msgstr "%s: no es un objeto dinámico" +msgstr "%s: no es un objeto dinámico" #: objdump.c:984 objdump.c:1008 #, c-format @@ -3975,7 +3976,7 @@ msgstr " (Desplazamiento Fichero: 0x%lx)" #: objdump.c:1634 #, c-format msgid "disassemble_fn returned length %d" -msgstr "disassemble_fn devolvió la longitud %d" +msgstr "disassemble_fn devolvió la longitud %d" #: objdump.c:1939 #, c-format @@ -3984,12 +3985,12 @@ msgid "" "Disassembly of section %s:\n" msgstr "" "\n" -"Desensamblado de la sección %s:\n" +"Desensamblado de la sección %s:\n" #: objdump.c:2115 #, c-format msgid "can't use supplied machine %s" -msgstr "no se puede utilizar la máquina %s proporcionada" +msgstr "no se puede utilizar la máquina %s proporcionada" #: objdump.c:2134 #, c-format @@ -4003,7 +4004,7 @@ msgid "" "Can't get contents for section '%s'.\n" msgstr "" "\n" -"No se puede obtener el contenido de la sección '%s'.\n" +"No se puede obtener el contenido de la sección '%s'.\n" #: objdump.c:2378 #, c-format @@ -4011,13 +4012,13 @@ msgid "" "No %s section present\n" "\n" msgstr "" -"No está presente la sección %s\n" +"No está presente la sección %s\n" "\n" #: objdump.c:2387 #, c-format msgid "reading %s section of %s failed: %s" -msgstr "falló al leer la sección %s de %s: %s" +msgstr "falló al leer la sección %s de %s: %s" #: objdump.c:2431 #, c-format @@ -4025,7 +4026,7 @@ msgid "" "Contents of %s section:\n" "\n" msgstr "" -"Contenido de la sección %s:\n" +"Contenido de la sección %s:\n" "\n" #: objdump.c:2562 @@ -4045,12 +4046,12 @@ msgid "" "start address 0x" msgstr "" "\n" -"dirección de inicio 0x" +"dirección de inicio 0x" #: objdump.c:2642 #, c-format msgid "Contents of section %s:" -msgstr "Contenido de la sección %s:" +msgstr "Contenido de la sección %s:" #: objdump.c:2644 #, c-format @@ -4059,22 +4060,22 @@ msgstr " (Inicia en el desplazamiento de fichero: 0x%lx)" #: objdump.c:2650 msgid "Reading section failed" -msgstr "Falló al leer la sección" +msgstr "Falló al leer la sección" #: objdump.c:2753 #, c-format msgid "no symbols\n" -msgstr "no hay símbolos\n" +msgstr "no hay símbolos\n" #: objdump.c:2760 #, c-format msgid "no information for symbol number %ld\n" -msgstr "no hay información para el símbolo número %ld\n" +msgstr "no hay información para el símbolo número %ld\n" #: objdump.c:2763 #, c-format msgid "could not determine the type of symbol number %ld\n" -msgstr "no se puede determinar el tipo del símbolo número %ld\n" +msgstr "no se puede determinar el tipo del símbolo número %ld\n" #: objdump.c:3043 #, c-format @@ -4088,7 +4089,7 @@ msgstr "" #: objdump.c:3101 #, c-format msgid "%s: printing debugging information failed" -msgstr "%s: falló al mostrar la información de depuración" +msgstr "%s: falló al mostrar la información de depuración" #: objdump.c:3205 #, c-format @@ -4097,11 +4098,11 @@ msgstr "En el fichero %s:\n" #: objdump.c:3316 msgid "error: the start address should be before the end address" -msgstr "error: la dirección de inicio debe estar antes de la dirección final" +msgstr "error: la dirección de inicio debe estar antes de la dirección final" #: objdump.c:3321 msgid "error: the stop address should be after the start address" -msgstr "error: la dirección de parada debe estar después de la dirección final" +msgstr "error: la dirección de parada debe estar después de la dirección final" #: objdump.c:3333 msgid "error: prefix strip must be non-negative" @@ -4109,11 +4110,11 @@ msgstr "error: el descarte de prefijo no debe ser negativo" #: objdump.c:3338 msgid "error: instruction width must be positive" -msgstr "error: la anchura de la instrucción debe ser positiva" +msgstr "error: la anchura de la instrucción debe ser positiva" #: objdump.c:3347 msgid "unrecognized -E option" -msgstr "no se reconoce la opción -E" +msgstr "no se reconoce la opción -E" #: objdump.c:3358 #, c-format @@ -4122,27 +4123,27 @@ msgstr "no se reconoce el tipo --endian `%s'" #: rclex.c:197 msgid "invalid value specified for pragma code_page.\n" -msgstr "se especificó un valor inválido para el pragma code_page.\n" +msgstr "se especificó un valor inválido para el pragma code_page.\n" #: rdcoff.c:198 #, c-format msgid "parse_coff_type: Bad type code 0x%x" -msgstr "parse_coff_type: Código de tipo 0x%x erróneo" +msgstr "parse_coff_type: Código de tipo 0x%x erróneo" #: rdcoff.c:406 rdcoff.c:511 rdcoff.c:699 #, c-format msgid "bfd_coff_get_syment failed: %s" -msgstr "bfd_coff_get_syment falló: %s" +msgstr "bfd_coff_get_syment falló: %s" #: rdcoff.c:422 rdcoff.c:719 #, c-format msgid "bfd_coff_get_auxent failed: %s" -msgstr "bfd_coff_get_auxent falló: %s" +msgstr "bfd_coff_get_auxent falló: %s" #: rdcoff.c:786 #, c-format msgid "%ld: .bf without preceding function" -msgstr "%ld: .bf sin una función precedente" +msgstr "%ld: .bf sin una función precedente" #: rdcoff.c:836 #, c-format @@ -4152,12 +4153,12 @@ msgstr "%ld: .ef inesperado\n" #: rddbg.c:88 #, c-format msgid "%s: no recognized debugging information" -msgstr "%s: no se reconoce la información de depuración" +msgstr "%s: no se reconoce la información de depuración" #: rddbg.c:402 #, c-format msgid "Last stabs entries before error:\n" -msgstr "Últimas entradas stabs antes del error:\n" +msgstr "Últimas entradas stabs antes del error:\n" #: readelf.c:268 msgid "" @@ -4190,7 +4191,7 @@ msgstr "No se pueden leer 0x%lx bytes de %s\n" #: readelf.c:697 msgid "Don't know about relocations on this machine architecture\n" -msgstr "No se conocen las reubicaciones en esta arquitectura de máquina\n" +msgstr "No se conocen las reubicaciones en esta arquitectura de máquina\n" #: readelf.c:718 readelf.c:748 readelf.c:816 readelf.c:845 msgid "relocs" @@ -4203,42 +4204,42 @@ msgstr "memoria agotada al decodificar reubicaciones\n" #: readelf.c:961 #, c-format msgid " Offset Info Type Sym. Value Symbol's Name + Addend\n" -msgstr " Desplaz Info Tipo Val. Símbolo Nombre Símbolo + Adend\n" +msgstr " Desplaz Info Tipo Val. Símbolo Nombre Símbolo + Adend\n" #: readelf.c:963 #, c-format msgid " Offset Info Type Sym.Value Sym. Name + Addend\n" -msgstr " Desplaz Info Tipo Val.Símbolo Nom.Símbolo + Adend\n" +msgstr " Desplaz Info Tipo Val.Símbolo Nom.Símbolo + Adend\n" #: readelf.c:968 #, c-format msgid " Offset Info Type Sym. Value Symbol's Name\n" -msgstr " Desplaz Info Tipo Val. Símbolo Nombre Símbolo\n" +msgstr " Desplaz Info Tipo Val. Símbolo Nombre Símbolo\n" #: readelf.c:970 #, c-format msgid " Offset Info Type Sym.Value Sym. Name\n" -msgstr " Desplaz Info Tipo Val.Símbolo Nom. Símbolo\n" +msgstr " Desplaz Info Tipo Val.Símbolo Nom. Símbolo\n" #: readelf.c:978 #, c-format msgid " Offset Info Type Symbol's Value Symbol's Name + Addend\n" -msgstr " Desplaz Info Tipo Valor Símbolo Nombre Símbolo + Adend\n" +msgstr " Desplaz Info Tipo Valor Símbolo Nombre Símbolo + Adend\n" #: readelf.c:980 #, c-format msgid " Offset Info Type Sym. Value Sym. Name + Addend\n" -msgstr " Desplaz Info Tipo Val. Símbolo Nom. Símbolo + Adend\n" +msgstr " Desplaz Info Tipo Val. Símbolo Nom. Símbolo + Adend\n" #: readelf.c:985 #, c-format msgid " Offset Info Type Symbol's Value Symbol's Name\n" -msgstr " Desplaz Info Tipo Valor Símbolo Nombre Símbolo\n" +msgstr " Desplaz Info Tipo Valor Símbolo Nombre Símbolo\n" #: readelf.c:987 #, c-format msgid " Offset Info Type Sym. Value Sym. Name\n" -msgstr " Desplaz Info Tipo Val. Símbolo Nom. Símbolo\n" +msgstr " Desplaz Info Tipo Val. Símbolo Nom. Símbolo\n" #: readelf.c:1291 readelf.c:1448 readelf.c:1456 #, c-format @@ -4253,27 +4254,27 @@ msgstr "" #: readelf.c:1323 #, c-format msgid " bad symbol index: %08lx" -msgstr "índice de símbolos erróneo: %08lx" +msgstr "índice de símbolos erróneo: %08lx" #: readelf.c:1406 #, c-format msgid "" -msgstr "<índice de la tabla de cadenas: %3ld>" +msgstr "<índice de la tabla de cadenas: %3ld>" #: readelf.c:1408 #, c-format msgid "" -msgstr "<índice de la tabla de cadenas corrupto: %3ld>" +msgstr "<índice de la tabla de cadenas corrupto: %3ld>" #: readelf.c:1801 #, c-format msgid "Processor Specific: %lx" -msgstr "Específico del Procesador: %lx" +msgstr "Específico del Procesador: %lx" #: readelf.c:1825 #, c-format msgid "Operating System specific: %lx" -msgstr "específico del Sistema Operativo: %lx" +msgstr "específico del Sistema Operativo: %lx" #: readelf.c:1829 readelf.c:2875 #, c-format @@ -4298,17 +4299,17 @@ msgstr "DYN (Fichero objeto compartido)" #: readelf.c:1846 msgid "CORE (Core file)" -msgstr "CORE (Fichero núcleo)" +msgstr "CORE (Fichero núcleo)" #: readelf.c:1850 #, c-format msgid "Processor Specific: (%x)" -msgstr "Específico del Procesador: (%x)" +msgstr "Específico del Procesador: (%x)" #: readelf.c:1852 #, c-format msgid "OS Specific: (%x)" -msgstr "Específico del SO: (%x)" +msgstr "Específico del SO: (%x)" #: readelf.c:1854 readelf.c:3122 #, c-format @@ -4362,11 +4363,11 @@ msgstr ", ISA desconocida" #: readelf.c:2680 msgid "Standalone App" -msgstr "Aplicación por Sí Sola" +msgstr "Aplicación por Sí Sola" #: readelf.c:2689 msgid "Bare-metal C6000" -msgstr "C6000 sólo-metal" +msgstr "C6000 sólo-metal" #: readelf.c:2699 readelf.c:3462 readelf.c:3478 #, c-format @@ -4381,7 +4382,7 @@ msgstr "Modo de empleo: readelf fichero(s)-elf\n" #: readelf.c:3173 #, c-format msgid " Display information about the contents of ELF format files\n" -msgstr " Muestra información sobre el contenido de los ficheros de formato ELF\n" +msgstr " Muestra información sobre el contenido de los ficheros de formato ELF\n" #: readelf.c:3174 #, c-format @@ -4426,36 +4427,36 @@ msgstr "" " --segments Un alias para --program-headers\n" " -S --section-headers Muestra el encabezado de las secciones\n" " --sections Un alias para --section-headers\n" -" -g --section-groups Muestra los grupos de sección\n" -" -t --section-details Muestra los detalles de sección\n" +" -g --section-groups Muestra los grupos de sección\n" +" -t --section-details Muestra los detalles de sección\n" " -e --headers Equivalente a: -h -l -S\n" -" -s --syms Muestra la tabla de símbolos\n" +" -s --syms Muestra la tabla de símbolos\n" " --symbols Un alias para --syms\n" -" --dyn-syms Muestra la tabla de símbolos dinámicos\n" -" -n --notes Muestra las notas de núcleo (si están presentes)\n" -" -r --relocs Muestra las reubicaciones (si están presentes)\n" -" -u --unwind Muestra la información de desenredo (si está presente)\n" -" -d --dynamic Muestra la seccion dinámica (si está presente)\n" -" -V --version-info Muestra las secciones de versión (si están presentes)\n" -" -A --arch-specific Muestra la información específica de la arquitectura\n" +" --dyn-syms Muestra la tabla de símbolos dinámicos\n" +" -n --notes Muestra las notas de núcleo (si están presentes)\n" +" -r --relocs Muestra las reubicaciones (si están presentes)\n" +" -u --unwind Muestra la información de desenredo (si está presente)\n" +" -d --dynamic Muestra la seccion dinámica (si está presente)\n" +" -V --version-info Muestra las secciones de versión (si están presentes)\n" +" -A --arch-specific Muestra la información específica de la arquitectura\n" " (si hay alguna).\n" -" -c --archive-index Muestra el índice de símbolos/ficheros en un archivo\n" -" -D --use-dynamic Usa la información de la sección dinámica cuando\n" -" muestra símbolos\n" -" -x --hex-dump=\n" -" Vuelca el contenido de la sección \n" +" -c --archive-index Muestra el índice de símbolos/ficheros en un archivo\n" +" -D --use-dynamic Usa la información de la sección dinámica cuando\n" +" muestra símbolos\n" +" -x --hex-dump=\n" +" Vuelca el contenido de la sección \n" " como bytes\n" -" -p --string-dump=\n" -" Vuelca el contenido de la sección \n" +" -p --string-dump=\n" +" Vuelca el contenido de la sección \n" " como cadenas\n" -" -R --relocated-dump=\n" -" Vuelca el contenido de la sección \n" +" -R --relocated-dump=\n" +" Vuelca el contenido de la sección \n" " como bytes reubicados\n" " -w[lLiaprmfFsoRt] o\n" " --debug-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,\n" " =frames-interp,=str,=loc,=Ranges,=pubtypes,\n" " =trace_info,=trace_abbrev,=trace_aranges]\n" -" Muestra el contenido de las secciones de depuración\n" +" Muestra el contenido de las secciones de depuración\n" " DWARF2\n" #: readelf.c:3207 @@ -4464,8 +4465,8 @@ msgid "" " -i --instruction-dump=\n" " Disassemble the contents of section \n" msgstr "" -" -i --instruction-dump=\n" -" Desensambla el contenido de la sección \n" +" -i --instruction-dump=\n" +" Desensambla el contenido de la sección \n" #: readelf.c:3211 #, c-format @@ -4480,17 +4481,17 @@ msgstr "" " cubetas\n" " -W --wide Permite que el ancho de la salida exceda 80 caracteres\n" " @ Lee opciones del \n" -" -H --help Muestra esta información\n" -" -v --version Muestra el número de versión de readelf\n" +" -H --help Muestra esta información\n" +" -v --version Muestra el número de versión de readelf\n" #: readelf.c:3240 readelf.c:3269 readelf.c:3273 readelf.c:13224 msgid "Out of memory allocating dump request table.\n" -msgstr "Memoria agotada al asignar la tabla de petición de volcado.\n" +msgstr "Memoria agotada al asignar la tabla de petición de volcado.\n" #: readelf.c:3431 #, c-format msgid "Invalid option '-%c'\n" -msgstr "Opción '-%c' inválida\n" +msgstr "Opción '-%c' inválida\n" #: readelf.c:3446 msgid "Nothing to do.\n" @@ -4510,7 +4511,7 @@ msgstr "complemento a 2, big endian" #: readelf.c:3494 msgid "Not an ELF file - it has the wrong magic bytes at the start\n" -msgstr "No es un fichero ELF - tiene los bytes mágicos erróneos en el inicio\n" +msgstr "No es un fichero ELF - tiene los bytes mágicos erróneos en el inicio\n" #: readelf.c:3504 #, c-format @@ -4520,7 +4521,7 @@ msgstr "Encabezado ELF:\n" #: readelf.c:3505 #, c-format msgid " Magic: " -msgstr " Mágico: " +msgstr " Mágico: " #: readelf.c:3509 #, c-format @@ -4535,7 +4536,7 @@ msgstr " Datos: %s\n" #: readelf.c:3513 #, c-format msgid " Version: %d %s\n" -msgstr " Versión: %d %s\n" +msgstr " Versión: %d %s\n" #: readelf.c:3518 #, c-format @@ -4550,7 +4551,7 @@ msgstr " OS/ABI: %s\n" #: readelf.c:3522 #, c-format msgid " ABI Version: %d\n" -msgstr " Versión ABI: %d\n" +msgstr " Versión ABI: %d\n" #: readelf.c:3524 #, c-format @@ -4560,17 +4561,17 @@ msgstr " Tipo: %s\n" #: readelf.c:3526 #, c-format msgid " Machine: %s\n" -msgstr " Máquina: %s\n" +msgstr " Máquina: %s\n" #: readelf.c:3528 #, c-format msgid " Version: 0x%lx\n" -msgstr " Versión: 0x%lx\n" +msgstr " Versión: 0x%lx\n" #: readelf.c:3531 #, c-format msgid " Entry point address: " -msgstr " Dirección del punto de entrada: " +msgstr " Dirección del punto de entrada: " #: readelf.c:3533 #, c-format @@ -4588,7 +4589,7 @@ msgid "" " Start of section headers: " msgstr "" " (bytes en el fichero)\n" -" Inicio de encabezados de sección: " +" Inicio de encabezados de sección: " #: readelf.c:3537 #, c-format @@ -4603,17 +4604,17 @@ msgstr " Opciones: 0x%lx%s\n" #: readelf.c:3542 #, c-format msgid " Size of this header: %ld (bytes)\n" -msgstr " Tamaño de este encabezado: %ld (bytes)\n" +msgstr " Tamaño de este encabezado: %ld (bytes)\n" #: readelf.c:3544 #, c-format msgid " Size of program headers: %ld (bytes)\n" -msgstr " Tamaño de encabezados de programa: %ld (bytes)\n" +msgstr " Tamaño de encabezados de programa: %ld (bytes)\n" #: readelf.c:3546 #, c-format msgid " Number of program headers: %ld" -msgstr " Número de encabezados de programa: %ld" +msgstr " Número de encabezados de programa: %ld" #: readelf.c:3551 #, c-format @@ -4623,17 +4624,17 @@ msgstr " (%ld)" #: readelf.c:3553 #, c-format msgid " Size of section headers: %ld (bytes)\n" -msgstr " Tamaño de encabezados de sección: %ld (bytes)\n" +msgstr " Tamaño de encabezados de sección: %ld (bytes)\n" #: readelf.c:3555 #, c-format msgid " Number of section headers: %ld" -msgstr " Número de encabezados de sección: %ld" +msgstr " Número de encabezados de sección: %ld" #: readelf.c:3560 #, c-format msgid " Section header string table index: %ld" -msgstr " Índice de tabla de cadenas de sección de encabezado: %ld" +msgstr " Índice de tabla de cadenas de sección de encabezado: %ld" #: readelf.c:3567 #, c-format @@ -4688,50 +4689,50 @@ msgstr "" #: readelf.c:3728 #, c-format msgid " Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align\n" -msgstr " Tipo Desplaz DirVirt DirFísica TamFich TamMem Opt Alin\n" +msgstr " Tipo Desplaz DirVirt DirFísica TamFich TamMem Opt Alin\n" #: readelf.c:3731 #, c-format msgid " Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align\n" -msgstr " Tipo Desplaz DirVirt DirFísica TamFich TamMem Opt Alin\n" +msgstr " Tipo Desplaz DirVirt DirFísica TamFich TamMem Opt Alin\n" #: readelf.c:3735 #, c-format msgid " Type Offset VirtAddr PhysAddr\n" -msgstr " Tipo Desplazamiento DirVirtual DirFísica\n" +msgstr " Tipo Desplazamiento DirVirtual DirFísica\n" #: readelf.c:3737 #, c-format msgid " FileSiz MemSiz Flags Align\n" -msgstr " TamFichero TamMemoria Opts Alineación\n" +msgstr " TamFichero TamMemoria Opts Alineación\n" #: readelf.c:3830 msgid "more than one dynamic segment\n" -msgstr "más de un segmento dinámico\n" +msgstr "más de un segmento dinámico\n" #: readelf.c:3849 msgid "no .dynamic section in the dynamic segment\n" -msgstr "no hay una sección .dynamic en el segmento dinámico\n" +msgstr "no hay una sección .dynamic en el segmento dinámico\n" #: readelf.c:3864 msgid "the .dynamic section is not contained within the dynamic segment\n" -msgstr "la sección .dynamic no está contenida en el segmento dinámico\n" +msgstr "la sección .dynamic no está contenida en el segmento dinámico\n" #: readelf.c:3867 msgid "the .dynamic section is not the first section in the dynamic segment.\n" -msgstr "la sección .dynamic no es la primera sección en el segmento dinámico.\n" +msgstr "la sección .dynamic no es la primera sección en el segmento dinámico.\n" #: readelf.c:3875 msgid "Unable to find program interpreter name\n" -msgstr "No se puede encontrar el nombre del intérprete de programa\n" +msgstr "No se puede encontrar el nombre del intérprete de programa\n" #: readelf.c:3882 msgid "Internal error: failed to create format string to display program interpreter\n" -msgstr "Error interno: no se puede crear la cadena de formato para mostrar el intérprete de programa\n" +msgstr "Error interno: no se puede crear la cadena de formato para mostrar el intérprete de programa\n" #: readelf.c:3886 msgid "Unable to read program interpreter name\n" -msgstr "No se puede leer el nombre del intérprete de programa\n" +msgstr "No se puede leer el nombre del intérprete de programa\n" #: readelf.c:3889 #, c-format @@ -4740,7 +4741,7 @@ msgid "" " [Requesting program interpreter: %s]" msgstr "" "\n" -" [Se solicita el intérprete de programa: %s]" +" [Se solicita el intérprete de programa: %s]" #: readelf.c:3901 #, c-format @@ -4749,7 +4750,7 @@ msgid "" " Section to Segment mapping:\n" msgstr "" "\n" -" mapeo de Sección a Segmento:\n" +" mapeo de Sección a Segmento:\n" #: readelf.c:3902 #, c-format @@ -4763,11 +4764,11 @@ msgstr "No se pueden interpretar direcciones virtuales sin encabezados de progra #: readelf.c:3954 #, c-format msgid "Virtual address 0x%lx not located in any PT_LOAD segment.\n" -msgstr "La dirección virtual 0x%lx no está ubicada en ningún segmento PT_LOAD.\n" +msgstr "La dirección virtual 0x%lx no está ubicada en ningún segmento PT_LOAD.\n" #: readelf.c:3969 readelf.c:4012 msgid "section headers" -msgstr "encabezados de sección" +msgstr "encabezados de sección" #: readelf.c:4059 readelf.c:4134 msgid "sh_entsize is zero\n" @@ -4775,13 +4776,13 @@ msgstr "sh_entsize es cero\n" #: readelf.c:4067 readelf.c:4142 msgid "Invalid sh_entsize\n" -msgstr "sh_entsize inválido\n" +msgstr "sh_entsize inválido\n" #: readelf.c:4072 readelf.c:4147 msgid "symbols" -msgstr "símbolos" +msgstr "símbolos" -# ¿Cómo se traduce esto? cfuga +# ¿Cómo se traduce esto? cfuga #: readelf.c:4084 readelf.c:4159 msgid "symtab shndx" msgstr "symtab shndx" @@ -4803,7 +4804,7 @@ msgstr "" #: readelf.c:4446 #, c-format msgid "There are %d section headers, starting at offset 0x%lx:\n" -msgstr "Hay %d encabezados de sección, comenzando en el desplazamiento: 0x%lx:\n" +msgstr "Hay %d encabezados de sección, comenzando en el desplazamiento: 0x%lx:\n" #: readelf.c:4467 readelf.c:5043 readelf.c:5454 readelf.c:5760 readelf.c:6173 #: readelf.c:6754 readelf.c:8843 @@ -4813,23 +4814,23 @@ msgstr "tabla de cadenas" #: readelf.c:4534 #, c-format msgid "Section %d has invalid sh_entsize %lx (expected %lx)\n" -msgstr "La sección %d tiene un sh_entsize %lx inválido (se esperaba %lx)\n" +msgstr "La sección %d tiene un sh_entsize %lx inválido (se esperaba %lx)\n" #: readelf.c:4554 msgid "File contains multiple dynamic symbol tables\n" -msgstr "El fichero contiene múltiples tablas dinámicas de símbolos\n" +msgstr "El fichero contiene múltiples tablas dinámicas de símbolos\n" #: readelf.c:4567 msgid "File contains multiple dynamic string tables\n" -msgstr "El fichero contiene múltiples tablas dinámicas de cadenas\n" +msgstr "El fichero contiene múltiples tablas dinámicas de cadenas\n" #: readelf.c:4573 msgid "dynamic strings" -msgstr "cadenas dinámicas" +msgstr "cadenas dinámicas" #: readelf.c:4580 msgid "File contains multiple symtab shndx tables\n" -msgstr "El fichero contiene múltiples tablas symtab shndx\n" +msgstr "El fichero contiene múltiples tablas symtab shndx\n" #: readelf.c:4648 #, c-format @@ -4838,7 +4839,7 @@ msgid "" "Section Headers:\n" msgstr "" "\n" -"Encabezados de Sección:\n" +"Encabezados de Sección:\n" #: readelf.c:4650 #, c-format @@ -4847,7 +4848,7 @@ msgid "" "Section Header:\n" msgstr "" "\n" -"Encabezados de Sección:\n" +"Encabezados de Sección:\n" #: readelf.c:4656 readelf.c:4667 readelf.c:4678 #, c-format @@ -4877,22 +4878,22 @@ msgstr " [Nr] Nombre Tipo Direc Desp Tam #: readelf.c:4679 #, c-format msgid " Type Address Offset Link\n" -msgstr " Tipo Dirección Despl Enl\n" +msgstr " Tipo Dirección Despl Enl\n" #: readelf.c:4680 #, c-format msgid " Size EntSize Info Align\n" -msgstr " Tamaño TamEnt Info Alin\n" +msgstr " Tamaño TamEnt Info Alin\n" #: readelf.c:4684 #, c-format msgid " [Nr] Name Type Address Offset\n" -msgstr " [Nr] Nombre Tipo Dirección Despl\n" +msgstr " [Nr] Nombre Tipo Dirección Despl\n" #: readelf.c:4685 #, c-format msgid " Size EntSize Flags Link Info Align\n" -msgstr " Tamaño TamEnt Opts Enl Info Alin\n" +msgstr " Tamaño TamEnt Opts Enl Info Alin\n" #: readelf.c:4690 #, c-format @@ -4902,7 +4903,7 @@ msgstr " Opciones\n" #: readelf.c:4769 #, c-format msgid "section %u: sh_link value of %u is larger than the number of sections\n" -msgstr "sección %u: el valor sh_link de %u es mayor que el número de secciones\n" +msgstr "sección %u: el valor sh_link de %u es mayor que el número de secciones\n" #: readelf.c:4868 #, c-format @@ -4916,7 +4917,7 @@ msgstr "" " W (escribir), A (asignar), X (ejecutar), M (mezclar), S (cadenas)\n" " l (grande), I (info), L (orden enlazado), G (grupo), T (TLS), E (excluir)\n" " x (desconocido), O (se requiere procesamiento extra del SO)\n" -" o (específico del SO), p (específico del procesador)\n" +" o (específico del SO), p (específico del procesador)\n" #: readelf.c:4873 #, c-format @@ -4930,7 +4931,7 @@ msgstr "" " W (escribir), A (asignar), X (ejecutar), M (mezclar), S (cadenas)\n" " I (info), L (orden enlazado), G (grupo), T (TLS), E (excluir)\n" " x (desconocido), O (se requiere procesamiento extra del SO)\n" -" o (específico del SO), p (específico del procesador)\n" +" o (específico del SO), p (específico del procesador)\n" #: readelf.c:4895 #, c-format @@ -4939,7 +4940,7 @@ msgstr "[: 0x%x] " #: readelf.c:4927 msgid "Section headers are not available!\n" -msgstr "¡Los encabezados de sección no están disponibles!\n" +msgstr "¡Los encabezados de sección no están disponibles!\n" #: readelf.c:4951 #, c-format @@ -4948,26 +4949,26 @@ msgid "" "There are no section groups in this file.\n" msgstr "" "\n" -"No hay grupos de sección en este fichero.\n" +"No hay grupos de sección en este fichero.\n" #: readelf.c:4988 #, c-format msgid "Bad sh_link in group section `%s'\n" -msgstr "sh_link erróneo en la sección de grupo `%s'\n" +msgstr "sh_link erróneo en la sección de grupo `%s'\n" #: readelf.c:5002 #, c-format msgid "Corrupt header in group section `%s'\n" -msgstr "Encabezado corrupto en la sección de grupo `%s'\n" +msgstr "Encabezado corrupto en la sección de grupo `%s'\n" #: readelf.c:5013 #, c-format msgid "Bad sh_info in group section `%s'\n" -msgstr "sh_info erróneo en la sección de grupo `%s'\n" +msgstr "sh_info erróneo en la sección de grupo `%s'\n" #: readelf.c:5052 msgid "section data" -msgstr "datos de sección" +msgstr "datos de sección" #: readelf.c:5061 #, c-format @@ -4976,31 +4977,31 @@ msgid "" "%sgroup section [%5u] `%s' [%s] contains %u sections:\n" msgstr "" "\n" -"%sla sección de grupo [%5u] `%s' [%s] contiene %u secciones:\n" +"%sla sección de grupo [%5u] `%s' [%s] contiene %u secciones:\n" #: readelf.c:5064 #, c-format msgid " [Index] Name\n" -msgstr " [Índice] Nombre\n" +msgstr " [Índice] Nombre\n" #: readelf.c:5078 #, c-format msgid "section [%5u] in group section [%5u] > maximum section [%5u]\n" -msgstr "la sección [%5u] en la sección de grupo [%5u] > máximo de sección [%5u]\n" +msgstr "la sección [%5u] en la sección de grupo [%5u] > máximo de sección [%5u]\n" #: readelf.c:5087 #, c-format msgid "section [%5u] in group section [%5u] already in group section [%5u]\n" -msgstr "la sección [%5u] en la sección de grupo [%5u] ya está en la sección de grupo [%5u]\n" +msgstr "la sección [%5u] en la sección de grupo [%5u] ya está en la sección de grupo [%5u]\n" #: readelf.c:5100 #, c-format msgid "section 0 in group section [%5u]\n" -msgstr "sección 0 en la sección de grupo [%5u]\n" +msgstr "sección 0 en la sección de grupo [%5u]\n" #: readelf.c:5167 msgid "dynamic section image fixups" -msgstr "composturas de imagen de sección dinámica" +msgstr "composturas de imagen de sección dinámica" #: readelf.c:5179 #, c-format @@ -5018,7 +5019,7 @@ msgstr "Seg Desplaz Tipo VecSim TipoDato\n" #: readelf.c:5214 msgid "dynamic section image relas" -msgstr "reubicaciones de imagen de sección dinámica" +msgstr "reubicaciones de imagen de sección dinámica" #: readelf.c:5218 #, c-format @@ -5036,7 +5037,7 @@ msgstr "Seg Desplaz Tipo Addend Seg Sim D #: readelf.c:5275 msgid "dynamic string section" -msgstr "sección de cadenas dinámicas" +msgstr "sección de cadenas dinámicas" #: readelf.c:5376 #, c-format @@ -5045,7 +5046,7 @@ msgid "" "'%s' relocation section at offset 0x%lx contains %ld bytes:\n" msgstr "" "\n" -"'%s' la sección de reubicación en el desplazamiento 0x%lx contiene %ld bytes:\n" +"'%s' la sección de reubicación en el desplazamiento 0x%lx contiene %ld bytes:\n" #: readelf.c:5391 #, c-format @@ -5054,7 +5055,7 @@ msgid "" "There are no dynamic relocations in this file.\n" msgstr "" "\n" -"No hay reubicaciones dinámicas en este fichero.\n" +"No hay reubicaciones dinámicas en este fichero.\n" #: readelf.c:5415 #, c-format @@ -5063,7 +5064,7 @@ msgid "" "Relocation section " msgstr "" "\n" -"La sección de reubicación " +"La sección de reubicación " #: readelf.c:5420 readelf.c:5836 readelf.c:5851 readelf.c:6188 #, c-format @@ -5087,7 +5088,7 @@ msgstr "" #: readelf.c:5611 #, c-format msgid "\tUnknown version.\n" -msgstr "\tVersión desconocida.\n" +msgstr "\tVersión desconocida.\n" #: readelf.c:5664 readelf.c:6037 msgid "unwind table" @@ -5096,7 +5097,7 @@ msgstr "tabla desenredada" #: readelf.c:5706 readelf.c:6119 readelf.c:6365 #, c-format msgid "Skipping unexpected relocation type %s\n" -msgstr "Se salta el tipo de reubicación %s inesperado\n" +msgstr "Se salta el tipo de reubicación %s inesperado\n" #: readelf.c:5768 readelf.c:6181 readelf.c:6762 readelf.c:6808 #, c-format @@ -5114,11 +5115,11 @@ msgid "" "Could not find unwind info section for " msgstr "" "\n" -"No se puede encontrar la sección de información de desenredo para " +"No se puede encontrar la sección de información de desenredo para " #: readelf.c:5844 msgid "unwind info" -msgstr "información de desenredo" +msgstr "información de desenredo" #: readelf.c:5846 readelf.c:6187 #, c-format @@ -5127,7 +5128,7 @@ msgid "" "Unwind section " msgstr "" "\n" -"Sección de desenredo " +"Sección de desenredo " #: readelf.c:6296 msgid "unwind data" @@ -5137,13 +5138,13 @@ msgstr "datos desenredados" #, c-format msgid "Skipping unexpected relocation at offset 0x%lx\n" msgstr "" -"Se salta la reubicación inesperada en el desplazamiento 0x%lx\n" +"Se salta la reubicación inesperada en el desplazamiento 0x%lx\n" "\n" #: readelf.c:6426 #, c-format msgid "[Truncated opcode]\n" -msgstr "[Codigo de operación truncado]\n" +msgstr "[Codigo de operación truncado]\n" #: readelf.c:6429 #, c-format @@ -5163,7 +5164,7 @@ msgstr " [Datos truncados]\n" #: readelf.c:6484 #, c-format msgid " [reserved compact index %d]\n" -msgstr " [índice compacto reservado %d]\n" +msgstr " [índice compacto reservado %d]\n" #: readelf.c:6488 #, c-format @@ -5218,17 +5219,17 @@ msgstr "vsp = vsp + %ld" #: readelf.c:6627 #, c-format msgid "[unsupported two-byte opcode]" -msgstr "[no se admite el código de operación de dos bytes]" +msgstr "[no se admite el código de operación de dos bytes]" #: readelf.c:6631 #, c-format msgid " [unsupported opcode]" -msgstr " [no se admite el código de operación]" +msgstr " [no se admite el código de operación]" #: readelf.c:6715 #, c-format msgid "Could not locate .ARM.extab section containing 0x%lx.\n" -msgstr "No se puede ubicar la sección .ARM.extab que contiene 0x%lx.\n" +msgstr "No se puede ubicar la sección .ARM.extab que contiene 0x%lx.\n" #: readelf.c:6768 #, c-format @@ -5237,7 +5238,7 @@ msgid "" "Unwind table index '%s' at offset 0x%lx contains %lu entries:\n" msgstr "" "\n" -"El índice de tabla de desenredo '%s' en el desplazamiento 0x%lx contiene %lu entradas:\n" +"El índice de tabla de desenredo '%s' en el desplazamiento 0x%lx contiene %lu entradas:\n" #: readelf.c:6819 #, c-format @@ -5247,7 +5248,7 @@ msgstr "NINGUNO\n" #: readelf.c:6845 #, c-format msgid "Interface Version: %s\n" -msgstr "Versión de Interfaz: %s\n" +msgstr "Versión de Interfaz: %s\n" #: readelf.c:6847 #, c-format @@ -5261,7 +5262,7 @@ msgstr "Marca de Tiempo: %s\n" #: readelf.c:7037 readelf.c:7083 msgid "dynamic section" -msgstr "sección dinámica" +msgstr "sección dinámica" #: readelf.c:7161 #, c-format @@ -5270,15 +5271,15 @@ msgid "" "There is no dynamic section in this file.\n" msgstr "" "\n" -"No hay sección dinámica en este fichero.\n" +"No hay sección dinámica en este fichero.\n" #: readelf.c:7199 msgid "Unable to seek to end of file!\n" -msgstr "¡No se puede alcanzar el final del fichero!\n" +msgstr "¡No se puede alcanzar el final del fichero!\n" #: readelf.c:7212 msgid "Unable to determine the number of symbols to load\n" -msgstr "No se puede determinar el número de símbolos a cargar\n" +msgstr "No se puede determinar el número de símbolos a cargar\n" #: readelf.c:7247 msgid "Unable to seek to end of file\n" @@ -5286,15 +5287,15 @@ msgstr "No se puede alcanzar el final del fichero\n" #: readelf.c:7254 msgid "Unable to determine the length of the dynamic string table\n" -msgstr "No se puede determinar la longitud de la tabla dinámica de cadenas\n" +msgstr "No se puede determinar la longitud de la tabla dinámica de cadenas\n" #: readelf.c:7260 msgid "dynamic string table" -msgstr "tabla de cadena dinámicas" +msgstr "tabla de cadena dinámicas" #: readelf.c:7297 msgid "symbol information" -msgstr "información del símbolo" +msgstr "información del símbolo" #: readelf.c:7322 #, c-format @@ -5303,7 +5304,7 @@ msgid "" "Dynamic section at offset 0x%lx contains %u entries:\n" msgstr "" "\n" -"La sección dinámica en el desplazamiento 0x%lx contiene %u entradas:\n" +"La sección dinámica en el desplazamiento 0x%lx contiene %u entradas:\n" #: readelf.c:7325 #, c-format @@ -5323,17 +5324,17 @@ msgstr "Biblioteca de filtro" #: readelf.c:7369 #, c-format msgid "Configuration file" -msgstr "Fichero de configuración" +msgstr "Fichero de configuración" #: readelf.c:7373 #, c-format msgid "Dependency audit library" -msgstr "Biblioteca de auditoría de dependencias" +msgstr "Biblioteca de auditoría de dependencias" #: readelf.c:7377 #, c-format msgid "Audit library" -msgstr "Biblioteca de auditoría" +msgstr "Biblioteca de auditoría" #: readelf.c:7395 readelf.c:7423 readelf.c:7451 #, c-format @@ -5353,7 +5354,7 @@ msgstr "Biblioteca compartida: [%s]" #: readelf.c:7577 #, c-format msgid " program interpreter" -msgstr " programa intérprete" +msgstr " programa intérprete" #: readelf.c:7581 #, c-format @@ -5368,7 +5369,7 @@ msgstr "Rpath de la biblioteca: [%s]" #: readelf.c:7589 #, c-format msgid "Library runpath: [%s]" -msgstr "Ruta de ejecución de la biblioteca: [%s]" +msgstr "Ruta de ejecución de la biblioteca: [%s]" #: readelf.c:7622 #, c-format @@ -5391,7 +5392,7 @@ msgid "" "Version definition section '%s' contains %u entries:\n" msgstr "" "\n" -"La sección de definición de versión '%s' contiene %u entradas:\n" +"La sección de definición de versión '%s' contiene %u entradas:\n" #: readelf.c:7788 #, c-format @@ -5405,7 +5406,7 @@ msgstr " Despl: %#08lx Enl: %u (%s)\n" #: readelf.c:7798 msgid "version definition section" -msgstr "sección de definición de versión" +msgstr "sección de definición de versión" #: readelf.c:7831 #, c-format @@ -5425,7 +5426,7 @@ msgstr "Nombre: %s\n" #: readelf.c:7852 #, c-format msgid "Name index: %ld\n" -msgstr "Índice de nombres: %ld\n" +msgstr "Índice de nombres: %ld\n" #: readelf.c:7874 #, c-format @@ -5435,17 +5436,17 @@ msgstr " %#06x: Padre %d: %s\n" #: readelf.c:7877 #, c-format msgid " %#06x: Parent %d, name index: %ld\n" -msgstr " %#06x: Padre %d, índice de nombres: %ld\n" +msgstr " %#06x: Padre %d, índice de nombres: %ld\n" #: readelf.c:7882 #, c-format msgid " Version def aux past end of section\n" -msgstr " Versión def aux después del final de la sección\n" +msgstr " Versión def aux después del final de la sección\n" #: readelf.c:7888 #, c-format msgid " Version definition past end of section\n" -msgstr " Definición de versión después del final de la sección\n" +msgstr " Definición de versión después del final de la sección\n" #: readelf.c:7903 #, c-format @@ -5454,7 +5455,7 @@ msgid "" "Version needs section '%s' contains %u entries:\n" msgstr "" "\n" -"La sección de requerimientos de versión '%s' contiene %u entradas:\n" +"La sección de requerimientos de versión '%s' contiene %u entradas:\n" #: readelf.c:7906 #, c-format @@ -5463,12 +5464,12 @@ msgstr " Dir: 0x" #: readelf.c:7917 msgid "version need section" -msgstr "sección de requerimientos de versión" +msgstr "sección de requerimientos de versión" #: readelf.c:7945 #, c-format msgid " %#06x: Version: %d" -msgstr " %#06x: Versión: %d" +msgstr " %#06x: Versión: %d" #: readelf.c:7948 #, c-format @@ -5493,26 +5494,26 @@ msgstr " %#06x: Nombre: %s" #: readelf.c:7980 #, c-format msgid " %#06x: Name index: %lx" -msgstr " %#06x: Índice de nombres: %lx" +msgstr " %#06x: Índice de nombres: %lx" #: readelf.c:7983 #, c-format msgid " Flags: %s Version: %d\n" -msgstr " Opts: %s Versión: %d\n" +msgstr " Opts: %s Versión: %d\n" #: readelf.c:7995 #, c-format msgid " Version need aux past end of section\n" -msgstr " Aux de requerimientos de versión después del final de la sección\n" +msgstr " Aux de requerimientos de versión después del final de la sección\n" #: readelf.c:8000 #, c-format msgid " Version need past end of section\n" -msgstr " Requerimientos de versión después del final de la sección\n" +msgstr " Requerimientos de versión después del final de la sección\n" #: readelf.c:8037 msgid "version string table" -msgstr "tabla de cadenas de versión" +msgstr "tabla de cadenas de versión" #: readelf.c:8041 #, c-format @@ -5521,7 +5522,7 @@ msgid "" "Version symbols section '%s' contains %d entries:\n" msgstr "" "\n" -"La sección de símbolos de versión '%s' contiene %d entradas:\n" +"La sección de símbolos de versión '%s' contiene %d entradas:\n" #: readelf.c:8044 #, c-format @@ -5530,7 +5531,7 @@ msgstr " Dir: " #: readelf.c:8055 msgid "version symbol data" -msgstr "datos de símbolos de versión" +msgstr "datos de símbolos de versión" #: readelf.c:8082 msgid " 0 (*local*) " @@ -5542,27 +5543,27 @@ msgstr " 1 (*global*) " #: readelf.c:8099 msgid "invalid index into symbol array\n" -msgstr "índice inválido en la matriz de símbolos\n" +msgstr "índice inválido en la matriz de símbolos\n" #: readelf.c:8133 readelf.c:8910 msgid "version need" -msgstr "la versión necesita" +msgstr "la versión necesita" #: readelf.c:8143 msgid "version need aux (2)" -msgstr "la versión necesita aux (2)" +msgstr "la versión necesita aux (2)" #: readelf.c:8158 readelf.c:8213 msgid "*invalid*" -msgstr "*inválido*" +msgstr "*inválido*" #: readelf.c:8188 readelf.c:8975 msgid "version def" -msgstr "versión definida" +msgstr "versión definida" #: readelf.c:8208 readelf.c:8990 msgid "version def aux" -msgstr "versión definida auxiliar" +msgstr "versión definida auxiliar" #: readelf.c:8242 #, c-format @@ -5571,7 +5572,7 @@ msgid "" "No version information found in this file.\n" msgstr "" "\n" -"No se encontró información de versión en este fichero.\n" +"No se encontró información de versión en este fichero.\n" #: readelf.c:8441 #, c-format @@ -5580,7 +5581,7 @@ msgstr ": %x" #: readelf.c:8500 msgid "Unable to read in dynamic data\n" -msgstr "No se pueden leer los datos dinámicos\n" +msgstr "No se pueden leer los datos dinámicos\n" #: readelf.c:8550 #, c-format @@ -5589,19 +5590,19 @@ msgstr " " #: readelf.c:8593 readelf.c:8645 readelf.c:8669 readelf.c:8699 readelf.c:8723 msgid "Unable to seek to start of dynamic information\n" -msgstr "No se puede encontrar el inicio de la información dinámica\n" +msgstr "No se puede encontrar el inicio de la información dinámica\n" #: readelf.c:8599 readelf.c:8651 msgid "Failed to read in number of buckets\n" -msgstr "Falló al leer el número de cubos\n" +msgstr "Falló al leer el número de cubos\n" #: readelf.c:8605 msgid "Failed to read in number of chains\n" -msgstr "Falló al leer el número de cadenas\n" +msgstr "Falló al leer el número de cadenas\n" #: readelf.c:8707 msgid "Failed to determine last chain length\n" -msgstr "No se puede determinar la longitud de la última cadena\n" +msgstr "No se puede determinar la longitud de la última cadena\n" #: readelf.c:8751 #, c-format @@ -5610,17 +5611,17 @@ msgid "" "Symbol table for image:\n" msgstr "" "\n" -"Tabla de símbolos por imagen:\n" +"Tabla de símbolos por imagen:\n" #: readelf.c:8753 readelf.c:8771 #, c-format msgid " Num Buc: Value Size Type Bind Vis Ndx Name\n" -msgstr " Num Cub: Valor Tamaño Tipo Uni Vis Nombre Ind\n" +msgstr " Num Cub: Valor Tamaño Tipo Uni Vis Nombre Ind\n" #: readelf.c:8755 readelf.c:8773 #, c-format msgid " Num Buc: Value Size Type Bind Vis Ndx Name\n" -msgstr " Num Cub: Valor Tamaño Typo Uni Vis Nombre Ind\n" +msgstr " Num Cub: Valor Tamaño Typo Uni Vis Nombre Ind\n" #: readelf.c:8769 #, c-format @@ -5629,7 +5630,7 @@ msgid "" "Symbol table of `.gnu.hash' for image:\n" msgstr "" "\n" -"Tabla de símbolos de `.gnu.hash' para la imagen:\n" +"Tabla de símbolos de `.gnu.hash' para la imagen:\n" #: readelf.c:8812 #, c-format @@ -5638,7 +5639,7 @@ msgid "" "Symbol table '%s' has a sh_entsize of zero!\n" msgstr "" "\n" -"¡La tabla de símbolos '%s' tiene un sh_entsize de cero!\n" +"¡La tabla de símbolos '%s' tiene un sh_entsize de cero!\n" #: readelf.c:8817 #, c-format @@ -5647,29 +5648,29 @@ msgid "" "Symbol table '%s' contains %lu entries:\n" msgstr "" "\n" -"La tabla de símbolos '%s' contiene %lu entradas:\n" +"La tabla de símbolos '%s' contiene %lu entradas:\n" #: readelf.c:8822 #, c-format msgid " Num: Value Size Type Bind Vis Ndx Name\n" -msgstr " Num: Valor Tam Tipo Unión Vis Nombre Ind\n" +msgstr " Num: Valor Tam Tipo Unión Vis Nombre Ind\n" #: readelf.c:8824 #, c-format msgid " Num: Value Size Type Bind Vis Ndx Name\n" -msgstr " Num: Valor Tam Tipo Unión Vis Nombre Ind\n" +msgstr " Num: Valor Tam Tipo Unión Vis Nombre Ind\n" #: readelf.c:8881 msgid "version data" -msgstr "datos de versión" +msgstr "datos de versión" #: readelf.c:8923 msgid "version need aux (3)" -msgstr "la versión necesita aux (3)" +msgstr "la versión necesita aux (3)" #: readelf.c:8950 msgid "bad dynamic symbol\n" -msgstr "símbolo dinámico erróneo\n" +msgstr "símbolo dinámico erróneo\n" #: readelf.c:9014 #, c-format @@ -5678,7 +5679,7 @@ msgid "" "Dynamic symbol information is not available for displaying symbols.\n" msgstr "" "\n" -"La información de símbolos dinámicos no está disponible para mostrar los símbolos.\n" +"La información de símbolos dinámicos no está disponible para mostrar los símbolos.\n" #: readelf.c:9026 #, c-format @@ -5692,7 +5693,7 @@ msgstr "" #: readelf.c:9028 readelf.c:9098 #, c-format msgid " Length Number %% of total Coverage\n" -msgstr " Long Número %% del total Cobertura\n" +msgstr " Long Número %% del total Cobertura\n" #: readelf.c:9096 #, c-format @@ -5710,7 +5711,7 @@ msgid "" "Dynamic info segment at offset 0x%lx contains %d entries:\n" msgstr "" "\n" -"El segmento de información dinámica en el desplazamiento 0x%lx contiene %d entradas:\n" +"El segmento de información dinámica en el desplazamiento 0x%lx contiene %d entradas:\n" #: readelf.c:9165 #, c-format @@ -5724,27 +5725,27 @@ msgstr "" #: readelf.c:9256 msgid "Unhandled MN10300 reloc type found after SYM_DIFF reloc" -msgstr "Se encontró un tipo de reubicación MN10300 sin manejar después de la reubicación SYM_DIFF" +msgstr "Se encontró un tipo de reubicación MN10300 sin manejar después de la reubicación SYM_DIFF" #: readelf.c:9416 #, c-format msgid "Missing knowledge of 32-bit reloc types used in DWARF sections of machine number %d\n" -msgstr "Falta el conocimiento de los tipos de reubicación de 32-bit usados en las secciones DWARF del número de máquina %d\n" +msgstr "Falta el conocimiento de los tipos de reubicación de 32-bit usados en las secciones DWARF del número de máquina %d\n" #: readelf.c:9720 #, c-format msgid "unable to apply unsupported reloc type %d to section %s\n" -msgstr "no se puede aplicar el tipo de reubicación no admitido %d a la sección %s\n" +msgstr "no se puede aplicar el tipo de reubicación no admitido %d a la sección %s\n" #: readelf.c:9728 #, c-format msgid "skipping invalid relocation offset 0x%lx in section %s\n" -msgstr "se salta el desplazamiento de reubicación inválido 0x%lx en la sección %s\n" +msgstr "se salta el desplazamiento de reubicación inválido 0x%lx en la sección %s\n" #: readelf.c:9752 #, c-format msgid "skipping unexpected symbol type %s in %ld'th relocation in section %s\n" -msgstr "se salta el tipo de símbolo %s inesperado en la %ld-ésima reubicación en la sección %s\n" +msgstr "se salta el tipo de símbolo %s inesperado en la %ld-ésima reubicación en la sección %s\n" #: readelf.c:9798 #, c-format @@ -5753,7 +5754,7 @@ msgid "" "Assembly dump of section %s\n" msgstr "" "\n" -"Volcado ensamblador de la sección %s\n" +"Volcado ensamblador de la sección %s\n" #: readelf.c:9819 #, c-format @@ -5762,11 +5763,11 @@ msgid "" "Section '%s' has no data to dump.\n" msgstr "" "\n" -"La sección '%s' no tiene datos para volcar.\n" +"La sección '%s' no tiene datos para volcar.\n" #: readelf.c:9825 msgid "section contents" -msgstr "contenido de la sección" +msgstr "contenido de la sección" #: readelf.c:9844 #, c-format @@ -5775,17 +5776,17 @@ msgid "" "String dump of section '%s':\n" msgstr "" "\n" -"Volcado de cadenas de la sección '%s':\n" +"Volcado de cadenas de la sección '%s':\n" #: readelf.c:9862 #, c-format msgid " Note: This section has relocations against it, but these have NOT been applied to this dump.\n" -msgstr " Nota: Esta sección tiene reubicaciones contra ella, pero NO se han aplicado a este volcado.\n" +msgstr " Nota: Esta sección tiene reubicaciones contra ella, pero NO se han aplicado a este volcado.\n" #: readelf.c:9893 #, c-format msgid " No strings found in this section." -msgstr " No se encontraron cadenas en esta sección." +msgstr " No se encontraron cadenas en esta sección." #: readelf.c:9915 #, c-format @@ -5794,17 +5795,17 @@ msgid "" "Hex dump of section '%s':\n" msgstr "" "\n" -"Volcado hexadecimal de la sección '%s':\n" +"Volcado hexadecimal de la sección '%s':\n" #: readelf.c:9939 #, c-format msgid " NOTE: This section has relocations against it, but these have NOT been applied to this dump.\n" -msgstr " NOTA: Esta sección tiene reubicaciones contra ella, pero NO se han aplicado a este volcado.\n" +msgstr " NOTA: Esta sección tiene reubicaciones contra ella, pero NO se han aplicado a este volcado.\n" #: readelf.c:10073 #, c-format msgid "%s section data" -msgstr "datos de sección %s" +msgstr "datos de sección %s" #: readelf.c:10138 #, c-format @@ -5813,7 +5814,7 @@ msgid "" "Section '%s' has no debugging data.\n" msgstr "" "\n" -"La sección '%s' no tiene datos de depuración.\n" +"La sección '%s' no tiene datos de depuración.\n" #. There is no point in dumping the contents of a debugging section #. which has the NOBITS type - the bits in the file will be random. @@ -5822,22 +5823,22 @@ msgstr "" #: readelf.c:10147 #, c-format msgid "section '%s' has the NOBITS type - its contents are unreliable.\n" -msgstr "la sección '%s' tiene el tipo NOBITS - su contenido no es confiable.\n" +msgstr "la sección '%s' tiene el tipo NOBITS - su contenido no es confiable.\n" #: readelf.c:10183 #, c-format msgid "Unrecognized debug section: %s\n" -msgstr "No se reconoce la sección de depuración: %s\n" +msgstr "No se reconoce la sección de depuración: %s\n" #: readelf.c:10211 #, c-format msgid "Section '%s' was not dumped because it does not exist!\n" -msgstr "¡La sección '%s' no se volcó porque no existe!\n" +msgstr "¡La sección '%s' no se volcó porque no existe!\n" #: readelf.c:10252 #, c-format msgid "Section %d was not dumped because it does not exist!\n" -msgstr "¡La sección %d no se volcó porque no existe!\n" +msgstr "¡La sección %d no se volcó porque no existe!\n" #: readelf.c:10430 readelf.c:10444 readelf.c:10463 readelf.c:10781 #, c-format @@ -5847,7 +5848,7 @@ msgstr " Ninguna\n" #: readelf.c:10431 #, c-format msgid "Application\n" -msgstr "Aplicación\n" +msgstr "Aplicación\n" #: readelf.c:10432 #, c-format @@ -5862,7 +5863,7 @@ msgstr "Microcontrolador\n" #: readelf.c:10434 #, c-format msgid "Application or Realtime\n" -msgstr "Aplicación o Tiempo real\n" +msgstr "Aplicación o Tiempo real\n" #: readelf.c:10445 readelf.c:10465 readelf.c:10835 readelf.c:10853 #: readelf.c:10928 readelf.c:10949 @@ -5888,7 +5889,7 @@ msgstr "8 bytes, excepto SP leaf\n" #: readelf.c:10480 readelf.c:10570 readelf.c:10967 #, c-format msgid "flag = %d, vendor = %s\n" -msgstr "opción = %d, vendedor = %s\n" +msgstr "opción = %d, vendedor = %s\n" #: readelf.c:10486 #, c-format @@ -5913,7 +5914,7 @@ msgstr "Coma flotante de software\n" #: readelf.c:10624 #, c-format msgid "Single-precision hard float\n" -msgstr "Coma flotante de hardware de precisión sencilla\n" +msgstr "Coma flotante de hardware de precisión sencilla\n" #: readelf.c:10641 readelf.c:10667 #, c-format @@ -5923,7 +5924,7 @@ msgstr "Cualquiera\n" #: readelf.c:10644 #, c-format msgid "Generic\n" -msgstr "Genérica\n" +msgstr "Genérica\n" #: readelf.c:10673 #, c-format @@ -5933,12 +5934,12 @@ msgstr "Memoria\n" #: readelf.c:10722 #, c-format msgid "Hard float (double precision)\n" -msgstr "Coma flotante de hardware (precisión doble)\n" +msgstr "Coma flotante de hardware (precisión doble)\n" #: readelf.c:10725 #, c-format msgid "Hard float (single precision)\n" -msgstr "Coma flotante de hardware (precisión sencilla)\n" +msgstr "Coma flotante de hardware (precisión sencilla)\n" #: readelf.c:10731 #, c-format @@ -5978,27 +5979,27 @@ msgstr "Se usa el direccionamiento DSBT\n" #: readelf.c:10889 #, c-format msgid "Data addressing position-dependent\n" -msgstr "Direccionamiento de datos dependiente de posición\n" +msgstr "Direccionamiento de datos dependiente de posición\n" #: readelf.c:10892 #, c-format msgid "Data addressing position-independent, GOT near DP\n" -msgstr "Direccionamiento de datos independiente de posición GOT cerca de DP\n" +msgstr "Direccionamiento de datos independiente de posición GOT cerca de DP\n" #: readelf.c:10895 #, c-format msgid "Data addressing position-independent, GOT far from DP\n" -msgstr "Direccionamiento de datos independiente de posición, GOT lejos de DP\n" +msgstr "Direccionamiento de datos independiente de posición, GOT lejos de DP\n" #: readelf.c:10910 #, c-format msgid "Code addressing position-dependent\n" -msgstr "Direccionamiento de código dependiente de posición\n" +msgstr "Direccionamiento de código dependiente de posición\n" #: readelf.c:10913 #, c-format msgid "Code addressing position-independent\n" -msgstr "Direccionamiento de código independiente de posición\n" +msgstr "Direccionamiento de código independiente de posición\n" #: readelf.c:11019 msgid "attributes" @@ -6007,17 +6008,17 @@ msgstr "atributos" #: readelf.c:11040 #, c-format msgid "ERROR: Bad section length (%d > %d)\n" -msgstr "ERROR: Longitud de sección errónea (%d > %d)\n" +msgstr "ERROR: Longitud de sección errónea (%d > %d)\n" #: readelf.c:11046 #, c-format msgid "Attribute Section: %s\n" -msgstr "Sección de Atributo: %s\n" +msgstr "Sección de Atributo: %s\n" #: readelf.c:11071 #, c-format msgid "ERROR: Bad subsection length (%d > %d)\n" -msgstr "ERROR: Longitud de subsección errónea (%d > %d)\n" +msgstr "ERROR: Longitud de subsección errónea (%d > %d)\n" #: readelf.c:11083 #, c-format @@ -6027,12 +6028,12 @@ msgstr "Atributos de Fichero\n" #: readelf.c:11086 #, c-format msgid "Section Attributes:" -msgstr "Atributos de Sección:" +msgstr "Atributos de Sección:" #: readelf.c:11089 #, c-format msgid "Symbol Attributes:" -msgstr "Atributos de Símbolos:" +msgstr "Atributos de Símbolos:" #: readelf.c:11104 #, c-format @@ -6043,7 +6044,7 @@ msgstr "Etiqueta desconocida: %d\n" #: readelf.c:11123 #, c-format msgid " Unknown section contexts\n" -msgstr " Contexto de la sección desconocida\n" +msgstr " Contexto de la sección desconocida\n" #: readelf.c:11130 #, c-format @@ -6065,11 +6066,11 @@ msgid "" "Section '.liblist' contains %lu entries:\n" msgstr "" "\n" -"La sección '.liblist' contiene %lu entradas:\n" +"La sección '.liblist' contiene %lu entradas:\n" #: readelf.c:11296 msgid " Library Time Stamp Checksum Version Flags\n" -msgstr " Biblioteca Marca de Tiempo Revisión Versión Ops\n" +msgstr " Biblioteca Marca de Tiempo Revisión Versión Ops\n" #: readelf.c:11322 #, c-format @@ -6091,11 +6092,11 @@ msgid "" "Section '%s' contains %d entries:\n" msgstr "" "\n" -"La sección '%s' contiene %d entradas:\n" +"La sección '%s' contiene %d entradas:\n" #: readelf.c:11570 msgid "conflict list found without a dynamic symbol table\n" -msgstr "se encontró una lista de conflictos sin una tabla de símbolos dinámicos\n" +msgstr "se encontró una lista de conflictos sin una tabla de símbolos dinámicos\n" #: readelf.c:11587 readelf.c:11602 msgid "conflict" @@ -6108,11 +6109,11 @@ msgid "" "Section '.conflict' contains %lu entries:\n" msgstr "" "\n" -"La sección '.conflict' contiene %lu entradas:\n" +"La sección '.conflict' contiene %lu entradas:\n" #: readelf.c:11614 msgid " Num: Index Value Name" -msgstr " Num: Índice Valor Nombre" +msgstr " Num: Índice Valor Nombre" #: readelf.c:11626 readelf.c:11706 readelf.c:11774 #, c-format @@ -6135,7 +6136,7 @@ msgstr "" #: readelf.c:11649 #, c-format msgid " Canonical gp value: " -msgstr " Valor gp canónico: " +msgstr " Valor gp canónico: " #: readelf.c:11653 readelf.c:11745 #, c-format @@ -6145,12 +6146,12 @@ msgstr " Entradas reservadas:\n" #: readelf.c:11654 #, c-format msgid " %*s %10s %*s Purpose\n" -msgstr " %*s %10s %*s Propósito\n" +msgstr " %*s %10s %*s Propósito\n" #: readelf.c:11655 readelf.c:11672 readelf.c:11688 readelf.c:11747 #: readelf.c:11756 msgid "Address" -msgstr "Dirección" +msgstr "Dirección" #: readelf.c:11655 readelf.c:11672 readelf.c:11688 msgid "Access" @@ -6169,7 +6170,7 @@ msgstr " Resolvedor flojo\n" #: readelf.c:11664 #, c-format msgid " Module pointer (GNU extension)\n" -msgstr " Puntero de módulo (extensión GNU)\n" +msgstr " Puntero de módulo (extensión GNU)\n" #: readelf.c:11670 #, c-format @@ -6224,7 +6225,7 @@ msgstr "" #: readelf.c:11746 #, c-format msgid " %*s %*s Purpose\n" -msgstr " %*s %*s Propósito\n" +msgstr " %*s %*s Propósito\n" #: readelf.c:11749 #, c-format @@ -6234,7 +6235,7 @@ msgstr " Resolvedor flojo de PLT\n" #: readelf.c:11751 #, c-format msgid " Module pointer\n" -msgstr " Puntero de módulo\n" +msgstr " Puntero de módulo\n" #: readelf.c:11754 #, c-format @@ -6257,11 +6258,11 @@ msgid "" "Library list section '%s' contains %lu entries:\n" msgstr "" "\n" -"La sección de lista de bibliotecas '%s' contiene %lu entradas:\n" +"La sección de lista de bibliotecas '%s' contiene %lu entradas:\n" #: readelf.c:11835 msgid " Library Time Stamp Checksum Version Flags" -msgstr " Biblioteca Marca Tiempo Revisión Versión Opts" +msgstr " Biblioteca Marca Tiempo Revisión Versión Opts" #: readelf.c:11884 msgid "NT_AUXV (auxiliary vector)" @@ -6349,7 +6350,7 @@ msgstr "NT_WIN32PSTATUS (estructura win32_pstatus)" #: readelf.c:11932 msgid "NT_VERSION (version)" -msgstr "NT_VERSION (versión)" +msgstr "NT_VERSION (versión)" #: readelf.c:11934 msgid "NT_ARCH (architecture)" @@ -6362,19 +6363,19 @@ msgstr "Tipo de nota desconocido: (0x%08x)" #: readelf.c:11951 msgid "NT_GNU_ABI_TAG (ABI version tag)" -msgstr "NT_GNU_ABI_TAG (etiqueta de versión de ABI)" +msgstr "NT_GNU_ABI_TAG (etiqueta de versión de ABI)" #: readelf.c:11953 msgid "NT_GNU_HWCAP (DSO-supplied software HWCAP info)" -msgstr "NT_GNU_HWCAP (información de HWCAP de software proporcionado por DSO)" +msgstr "NT_GNU_HWCAP (información de HWCAP de software proporcionado por DSO)" #: readelf.c:11955 msgid "NT_GNU_BUILD_ID (unique build ID bitstring)" -msgstr "NT_GNU_BUILD_ID (cadena de bits de ID de construcción única)" +msgstr "NT_GNU_BUILD_ID (cadena de bits de ID de construcción única)" #: readelf.c:11957 msgid "NT_GNU_GOLD_VERSION (gold version)" -msgstr "NT_GNU_GOLD_VERSION (versión de gold)" +msgstr "NT_GNU_GOLD_VERSION (versión de gold)" #. NetBSD core "procinfo" structure. #: readelf.c:11974 @@ -6410,17 +6411,17 @@ msgstr "" #: readelf.c:12088 #, c-format msgid " Owner\t\tData size\tDescription\n" -msgstr " Prop\t\tTamaño datos\tDescripción\n" +msgstr " Prop\t\tTamaño datos\tDescripción\n" #: readelf.c:12108 readelf.c:12121 #, c-format msgid "corrupt note found at offset %lx into core notes\n" -msgstr "se encontró una nota corrupta en el desplazamiento %lx en las notas de núcleo\n" +msgstr "se encontró una nota corrupta en el desplazamiento %lx en las notas de núcleo\n" #: readelf.c:12110 readelf.c:12123 #, c-format msgid " type: %lx, namesize: %08lx, descsize: %08lx\n" -msgstr " tipo: %lx, tamañonombre: %08lx, tamañodesc: %08lx\n" +msgstr " tipo: %lx, tamañonombre: %08lx, tamañodesc: %08lx\n" #: readelf.c:12219 #, c-format @@ -6438,7 +6439,7 @@ msgstr "" #: readelf.c:12353 #, c-format msgid "%s: Failed to read file header\n" -msgstr "%s: Falló al leer el encabezado del fichero\n" +msgstr "%s: Falló al leer el encabezado del fichero\n" #: readelf.c:12366 #, c-format @@ -6452,54 +6453,54 @@ msgstr "" #: readelf.c:12615 #, c-format msgid "%s: the archive index is empty\n" -msgstr "%s: el índice del archivo está vacío\n" +msgstr "%s: el índice del archivo está vacío\n" #: readelf.c:12623 readelf.c:12647 #, c-format msgid "%s: failed to read archive index\n" -msgstr "%s: falló al leer el índice del archivo\n" +msgstr "%s: falló al leer el índice del archivo\n" #: readelf.c:12632 #, c-format msgid "%s: the archive index is supposed to have %ld entries, but the size in the header is too small\n" -msgstr "%s: se supone que el índice del archivo tiene %ld entradas, pero el tamaño en el encabezado es demasiado pequeño\n" +msgstr "%s: se supone que el índice del archivo tiene %ld entradas, pero el tamaño en el encabezado es demasiado pequeño\n" #: readelf.c:12640 msgid "Out of memory whilst trying to read archive symbol index\n" -msgstr "Memoria agotada al tratar de leer el índice de símbolos del archivo\n" +msgstr "Memoria agotada al tratar de leer el índice de símbolos del archivo\n" #: readelf.c:12658 msgid "Out of memory whilst trying to convert the archive symbol index\n" -msgstr "Memoria agotada al tratar de convertir el índice de símbolos del archivo\n" +msgstr "Memoria agotada al tratar de convertir el índice de símbolos del archivo\n" #: readelf.c:12670 #, c-format msgid "%s: the archive has an index but no symbols\n" -msgstr "%s: el archivo tiene un índice pero no tiene símbolos\n" +msgstr "%s: el archivo tiene un índice pero no tiene símbolos\n" #: readelf.c:12677 msgid "Out of memory whilst trying to read archive index symbol table\n" -msgstr "Memoria agotada al tratar de leer la tabla de símbolos del índice del archivo\n" +msgstr "Memoria agotada al tratar de leer la tabla de símbolos del índice del archivo\n" #: readelf.c:12683 #, c-format msgid "%s: failed to read archive index symbol table\n" -msgstr "%s: falló al leer la tabla de símbolos del índice del archivo\n" +msgstr "%s: falló al leer la tabla de símbolos del índice del archivo\n" #: readelf.c:12707 #, c-format msgid "%s has no archive index\n" -msgstr "%s: no tiene índice de archivo\n" +msgstr "%s: no tiene índice de archivo\n" #: readelf.c:12943 #, c-format msgid "%s: unable to dump the index as none was found\n" -msgstr "%s: no se puede volcar el índice porque ninguno se encontró\n" +msgstr "%s: no se puede volcar el índice porque ninguno se encontró\n" #: readelf.c:12949 #, c-format msgid "Index of archive %s: (%ld entries, 0x%lx bytes in the symbol table)\n" -msgstr "Índice del archivo %s: (%ld entradas, 0x%lx bytes en la tabla de símbolos)\n" +msgstr "Índice del archivo %s: (%ld entradas, 0x%lx bytes en la tabla de símbolos)\n" #: readelf.c:12967 #, c-format @@ -6509,17 +6510,17 @@ msgstr "El binario %s contiene:\n" #: readelf.c:12975 #, c-format msgid "%s: end of the symbol table reached before the end of the index\n" -msgstr "%s: se alcanzó el final de la tabla de símbolos antes que el final del índice\n" +msgstr "%s: se alcanzó el final de la tabla de símbolos antes que el final del índice\n" #: readelf.c:12986 #, c-format msgid "%s: symbols remain in the index symbol table, but without corresponding entries in the index table\n" -msgstr "%s: aún hay símbolos en la tabla de símbolos de índice, pero sin su entrada correspondiente en la tabla de índice\n" +msgstr "%s: aún hay símbolos en la tabla de símbolos de índice, pero sin su entrada correspondiente en la tabla de índice\n" #: readelf.c:12991 #, c-format msgid "%s: failed to seek back to start of object files in the archive\n" -msgstr "%s: falló al buscar de nuevo el inicio de los ficheros objeto en el archivo\n" +msgstr "%s: falló al buscar de nuevo el inicio de los ficheros objeto en el archivo\n" #: readelf.c:13074 readelf.c:13150 #, c-format @@ -6529,12 +6530,12 @@ msgstr "El fichero de entrada '%s' no es legible.\n" #: readelf.c:13096 #, c-format msgid "%s: failed to seek to archive member.\n" -msgstr "%s: falló al buscar el miembro de archivo.\n" +msgstr "%s: falló al buscar el miembro de archivo.\n" #: readelf.c:13168 #, c-format msgid "File %s is not an archive so its index cannot be displayed.\n" -msgstr "El fichero %s no es un archivo por lo cual no se puede mostrar su índice.\n" +msgstr "El fichero %s no es un archivo por lo cual no se puede mostrar su índice.\n" #: rename.c:124 #, c-format @@ -6545,12 +6546,12 @@ msgstr "%s: no se puede establecer la hora: %s" #: rename.c:159 rename.c:197 #, c-format msgid "unable to rename '%s'; reason: %s" -msgstr "no se puede renombrar '%s'; razón: %s" +msgstr "no se puede renombrar '%s'; razón: %s" #: rename.c:205 #, c-format msgid "unable to copy file '%s'; reason: %s" -msgstr "no se puede copiar el fichero '%s'; razón: %s" +msgstr "no se puede copiar el fichero '%s'; razón: %s" #: resbin.c:120 #, c-format @@ -6571,7 +6572,7 @@ msgstr "cursor" #: resbin.c:239 resbin.c:246 msgid "menu header" -msgstr "encabezado de menú" +msgstr "encabezado de menú" #: resbin.c:255 msgid "menuex header" @@ -6584,36 +6585,36 @@ msgstr "desplazamiento de menuex" #: resbin.c:264 #, c-format msgid "unsupported menu version %d" -msgstr "no se admite la versión de menú %d" +msgstr "no se admite la versión de menú %d" #: resbin.c:289 resbin.c:304 resbin.c:366 msgid "menuitem header" -msgstr "encabezado de elemento de menú" +msgstr "encabezado de elemento de menú" #: resbin.c:396 msgid "menuitem" -msgstr "elemento de menú" +msgstr "elemento de menú" #: resbin.c:433 resbin.c:461 msgid "dialog header" -msgstr "encabezado de diálogo" +msgstr "encabezado de diálogo" #: resbin.c:451 #, c-format msgid "unexpected DIALOGEX version %d" -msgstr "versión DIALOGEX %d inesperada" +msgstr "versión DIALOGEX %d inesperada" #: resbin.c:496 msgid "dialog font point size" -msgstr "tamaño de punto de la tipografía del diálogo" +msgstr "tamaño de punto de la tipografía del diálogo" #: resbin.c:504 msgid "dialogex font information" -msgstr "información de tipografía del dialogex" +msgstr "información de tipografía del dialogex" #: resbin.c:530 resbin.c:548 msgid "dialog control" -msgstr "control del diálogo" +msgstr "control del diálogo" #: resbin.c:540 msgid "dialogex control" @@ -6621,11 +6622,11 @@ msgstr "control del dialogex" #: resbin.c:569 msgid "dialog control end" -msgstr "fin del control del diálogo" +msgstr "fin del control del diálogo" #: resbin.c:581 msgid "dialog control data" -msgstr "datos de control del diálogo" +msgstr "datos de control del diálogo" #: resbin.c:621 msgid "stringtable string length" @@ -6683,40 +6684,40 @@ msgstr "grupo de iconos" #: resbin.c:935 resbin.c:1151 msgid "unexpected version string" -msgstr "cadena de versión inesperada" +msgstr "cadena de versión inesperada" #: resbin.c:966 #, c-format msgid "version length %d does not match resource length %lu" -msgstr "la longitud de la versión %d no coincide con la longitud del recurso %lu" +msgstr "la longitud de la versión %d no coincide con la longitud del recurso %lu" #: resbin.c:970 #, c-format msgid "unexpected version type %d" -msgstr "tipo de versión %d inesperada" +msgstr "tipo de versión %d inesperada" #: resbin.c:982 #, c-format msgid "unexpected fixed version information length %ld" -msgstr "longitud de la información de versión fija %ld inesperada" +msgstr "longitud de la información de versión fija %ld inesperada" #: resbin.c:985 msgid "fixed version info" -msgstr "información de versión fija" +msgstr "información de versión fija" #: resbin.c:989 #, c-format msgid "unexpected fixed version signature %lu" -msgstr "firma de versión fija %lu inesperada" +msgstr "firma de versión fija %lu inesperada" #: resbin.c:993 #, c-format msgid "unexpected fixed version info version %lu" -msgstr "información de versión de versión fija %lu inesperada" +msgstr "información de versión de versión fija %lu inesperada" #: resbin.c:1022 msgid "version var info" -msgstr "información de versión variable" +msgstr "información de versión variable" #: resbin.c:1039 #, c-format @@ -6726,17 +6727,17 @@ msgstr "longitud del valor stringfileinfo %ld inesperada" #: resbin.c:1049 #, c-format msgid "unexpected version stringtable value length %ld" -msgstr "versión de longitud de valor stringtable %ld inesperada" +msgstr "versión de longitud de valor stringtable %ld inesperada" #: resbin.c:1083 #, c-format msgid "unexpected version string length %ld != %ld + %ld" -msgstr "longitud de cadena de versión %ld != %ld + %ld inesperada" +msgstr "longitud de cadena de versión %ld != %ld + %ld inesperada" #: resbin.c:1094 #, c-format msgid "unexpected version string length %ld < %ld" -msgstr "longitud de cadena de versión %ld < %ld inesperada" +msgstr "longitud de cadena de versión %ld < %ld inesperada" #: resbin.c:1111 #, c-format @@ -6745,12 +6746,12 @@ msgstr "longitud de valor varfileinfo %ld inesperada" #: resbin.c:1130 msgid "version varfileinfo" -msgstr "versión varfileinfo" +msgstr "versión varfileinfo" #: resbin.c:1145 #, c-format msgid "unexpected version value length %ld" -msgstr "longitud de valor de versión %ld inesperada" +msgstr "longitud de valor de versión %ld inesperada" #: rescoff.c:124 msgid "filename required for COFF input" @@ -6759,12 +6760,12 @@ msgstr "se requiere un nombre de fichero para la entrada COFF" #: rescoff.c:141 #, c-format msgid "%s: no resource section" -msgstr "%s: no hay sección de recursos" +msgstr "%s: no hay sección de recursos" #: rescoff.c:173 #, c-format msgid "%s: %s: address out of bounds" -msgstr "%s: %s: dirección fuera de los límites" +msgstr "%s: %s: dirección fuera de los límites" #: rescoff.c:190 msgid "directory" @@ -6812,7 +6813,7 @@ msgstr "datos de recursos" #: rescoff.c:336 msgid "resource data size" -msgstr "tamaño de datos de recursos" +msgstr "tamaño de datos de recursos" #: rescoff.c:431 msgid "filename required for COFF output" @@ -6820,7 +6821,7 @@ msgstr "se requiere un nombre de fichero para la salida COFF" #: rescoff.c:715 msgid "can't get BFD_RELOC_RVA relocation type" -msgstr "no se puede obtener el tipo de reubicación BFD_RELOC_RVA" +msgstr "no se puede obtener el tipo de reubicación BFD_RELOC_RVA" #: resrc.c:262 resrc.c:333 #, c-format @@ -6830,7 +6831,7 @@ msgstr "no se puede abrir el fichero temporal `%s': %s" #: resrc.c:268 #, c-format msgid "can't redirect stdout: `%s': %s" -msgstr "no se puede redirigir la salida estándar: `%s': %s" +msgstr "no se puede redirigir la salida estándar: `%s': %s" #: resrc.c:284 #, c-format @@ -6860,7 +6861,7 @@ msgstr "Se usa popen para leer la salida del preprocesador\n" #: resrc.c:413 #, c-format msgid "Tried `%s'\n" -msgstr "Se intentó `%s'\n" +msgstr "Se intentó `%s'\n" #: resrc.c:424 #, c-format @@ -6869,7 +6870,7 @@ msgstr "Se utiliza `%s'\n" #: resrc.c:608 msgid "preprocessing failed." -msgstr "falló el preprocesamiento." +msgstr "falló el preprocesamiento." #: resrc.c:631 #, c-format @@ -6884,12 +6885,12 @@ msgstr "%s: fin de fichero inesperado" #: resrc.c:688 #, c-format msgid "%s: read of %lu returned %lu" -msgstr "%s: la lectura de %lu devolvió %lu" +msgstr "%s: la lectura de %lu devolvió %lu" #: resrc.c:727 resrc.c:1502 #, c-format msgid "stat failed on bitmap file `%s': %s" -msgstr "stat falló en el fichero de mapa de bits `%s': %s" +msgstr "stat falló en el fichero de mapa de bits `%s': %s" #: resrc.c:778 #, c-format @@ -6899,7 +6900,7 @@ msgstr "el fichero de cursor `%s' no contiene datos de cursor" #: resrc.c:810 resrc.c:1210 #, c-format msgid "%s: fseek to %lu failed: %s" -msgstr "%s: falló fseek para %lu: %s" +msgstr "%s: falló fseek para %lu: %s" #: resrc.c:936 msgid "help ID requires DIALOGEX" @@ -6912,7 +6913,7 @@ msgstr "los datos de control requieren DIALOGEX" #: resrc.c:966 #, c-format msgid "stat failed on font file `%s': %s" -msgstr "stat falló en el fichero de tipografía `%s': %s" +msgstr "stat falló en el fichero de tipografía `%s': %s" #: resrc.c:1179 #, c-format @@ -6922,7 +6923,7 @@ msgstr "el fichero de icono `%s' no contiene datos de icono" #: resrc.c:1724 resrc.c:1759 #, c-format msgid "stat failed on file `%s': %s" -msgstr "stat falló en el fichero `%s': %s" +msgstr "stat falló en el fichero `%s': %s" #: resrc.c:1940 #, c-format @@ -6932,7 +6933,7 @@ msgstr "no se puede abrir `%s' para salida: %s" #: size.c:79 #, c-format msgid " Displays the sizes of sections inside binary files\n" -msgstr " Muestra los tamaños de las secciones dentro de los ficheros binarios\n" +msgstr " Muestra los tamaños de las secciones dentro de los ficheros binarios\n" #: size.c:80 #, c-format @@ -6956,27 +6957,27 @@ msgstr "" " Las opciones son:\n" " -A|-B --format={sysv|berkeley} Selecciona el estilo de salida\n" " (por defecto es %s)\n" -" -o|-d|-x --radix={8|10|16} Muestra los números en octal, decimal o\n" +" -o|-d|-x --radix={8|10|16} Muestra los números en octal, decimal o\n" " hexadecimal\n" -" -t --totals Muestra los tamaños totales\n" -" (sólo Berkeley)\n" -" --common Muestra el tamaño total de los símbolos\n" +" -t --totals Muestra los tamaños totales\n" +" (sólo Berkeley)\n" +" --common Muestra el tamaño total de los símbolos\n" " *COM*\n" " --target= Establece el formato del fichero binario\n" " @ Lee opciones del \n" -" -h --help Muestra esta información\n" -" -v --version Muestra la versión del programa\n" +" -h --help Muestra esta información\n" +" -v --version Muestra la versión del programa\n" "\n" #: size.c:160 #, c-format msgid "invalid argument to --format: %s" -msgstr "argumento inválido para --format: %s" +msgstr "argumento inválido para --format: %s" #: size.c:187 #, c-format msgid "Invalid radix: %s\n" -msgstr "Radical inválido: %s\n" +msgstr "Radical inválido: %s\n" #: srconv.c:1732 #, c-format @@ -6996,11 +6997,11 @@ msgid "" msgstr "" " Las opciones son:\n" " -q --quick (Obsoleto - se descarta)\n" -" -n --noprescan No realizar una revisión para convertir comunes en definiciones\n" -" -d --debug Muestra información acerca de lo que se está haciendo\n" +" -n --noprescan No realizar una revisión para convertir comunes en definiciones\n" +" -d --debug Muestra información acerca de lo que se está haciendo\n" " @ Lee opciones del \n" -" -h --help Muestra esta información\n" -" -v --version Muestra el número de versión del programa\n" +" -h --help Muestra esta información\n" +" -v --version Muestra el número de versión del programa\n" #: srconv.c:1879 #, c-format @@ -7009,12 +7010,12 @@ msgstr "no se puede abrir el fichero de salida %s" #: stabs.c:328 stabs.c:1717 msgid "numeric overflow" -msgstr "desbordamiento numérico" +msgstr "desbordamiento numérico" #: stabs.c:338 #, c-format msgid "Bad stab: %s\n" -msgstr "Stab erróneo: %s\n" +msgstr "Stab erróneo: %s\n" #: stabs.c:346 #, c-format @@ -7024,7 +7025,7 @@ msgstr "Aviso: %s: %s\n" #: stabs.c:456 #, c-format msgid "N_LBRAC not within function\n" -msgstr "N_LBRAC no está dentro de una función\n" +msgstr "N_LBRAC no está dentro de una función\n" #: stabs.c:495 #, c-format @@ -7045,15 +7046,15 @@ msgstr "no se reconoce el tipo de referencia cruzada" #. about dealing with it rather than just calling error_type? #: stabs.c:1809 msgid "missing index type" -msgstr "falta el tipo de índice" +msgstr "falta el tipo de índice" #: stabs.c:2122 msgid "unknown virtual character for baseclass" -msgstr "carácter virtual desconocido para la clase base" +msgstr "carácter virtual desconocido para la clase base" #: stabs.c:2140 msgid "unknown visibility character for baseclass" -msgstr "carácter de visibilidad desconocido para la clase base" +msgstr "carácter de visibilidad desconocido para la clase base" #: stabs.c:2326 msgid "unnamed $vb type" @@ -7061,11 +7062,11 @@ msgstr "tipo $vb sin nombre" #: stabs.c:2332 msgid "unrecognized C++ abbreviation" -msgstr "no se reconoce la abreviación C++" +msgstr "no se reconoce la abreviación C++" #: stabs.c:2408 msgid "unknown visibility character for field" -msgstr "carácter de visibilidad desconocido para el campo" +msgstr "carácter de visibilidad desconocido para el campo" #: stabs.c:2660 msgid "const/volatile indicator missing" @@ -7083,12 +7084,12 @@ msgstr "N_EXCL sin definir" #: stabs.c:3276 #, c-format msgid "Type file number %d out of range\n" -msgstr "Número de tipo de fichero %d fuera de rango\n" +msgstr "Número de tipo de fichero %d fuera de rango\n" #: stabs.c:3281 #, c-format msgid "Type index number %d out of range\n" -msgstr "Número de tipo de índice %d fuera de rango\n" +msgstr "Número de tipo de índice %d fuera de rango\n" #: stabs.c:3360 #, c-format @@ -7098,7 +7099,7 @@ msgstr "No se reconoce el tipo XCOFF %d\n" #: stabs.c:3652 #, c-format msgid "bad mangled name `%s'\n" -msgstr "nombre desenredado erróneamente `%s'\n" +msgstr "nombre desenredado erróneamente `%s'\n" #: stabs.c:3747 #, c-format @@ -7108,7 +7109,7 @@ msgstr "no hay tipos de argumento en la cadena desenredada\n" #: stabs.c:5094 #, c-format msgid "Demangled name is not a function\n" -msgstr "El nombres desenredado no es una función\n" +msgstr "El nombres desenredado no es una función\n" #: stabs.c:5136 #, c-format @@ -7123,7 +7124,7 @@ msgstr "No se reconoce el componente de desenredo %d\n" #: stabs.c:5255 #, c-format msgid "Failed to print demangled template\n" -msgstr "Falló al mostrar la plantilla desenredada\n" +msgstr "Falló al mostrar la plantilla desenredada\n" #: stabs.c:5335 #, c-format @@ -7143,17 +7144,17 @@ msgstr "No se reconoce el tipo interno desenredado\n" #: strings.c:186 strings.c:245 #, c-format msgid "invalid integer argument %s" -msgstr "argumento entero %s inválido" +msgstr "argumento entero %s inválido" #: strings.c:248 #, c-format msgid "invalid minimum string length %d" -msgstr "longitud de cadena mínima %d inválida" +msgstr "longitud de cadena mínima %d inválida" #: strings.c:647 #, c-format msgid " Display printable strings in [file(s)] (stdin by default)\n" -msgstr " Muestra las cadenas imprimibles en [fichero(s)] (por defecto entrada estándar)\n" +msgstr " Muestra las cadenas imprimibles en [fichero(s)] (por defecto entrada estándar)\n" #: strings.c:648 #, c-format @@ -7173,25 +7174,25 @@ msgid "" " -v -V --version Print the program's version number\n" msgstr "" " Las opciones son:\n" -" -a - --all Revisa el fichero completo, no sólo la sección de\n" +" -a - --all Revisa el fichero completo, no sólo la sección de\n" " datos\n" " -f --print-file-name Muestra el nombre de fichero antes de cada cadena\n" -" -n --bytes=[número] Localiza y muestra cualquier secuencia terminada en\n" -" - NUL de por lo menos [número] caracteres\n" +" -n --bytes=[número] Localiza y muestra cualquier secuencia terminada en\n" +" - NUL de por lo menos [número] caracteres\n" " (4 por defecto).\n" -" -t --radix={o,d,x} Muestra la ubicación de la cadena en base 8, 10 ó 16\n" +" -t --radix={o,d,x} Muestra la ubicación de la cadena en base 8, 10 ó 16\n" " -o Un alias para --radix=o\n" " -T --target= Especifica el formato de fichero binario\n" -" -e --encoding={s,S,b,l,B,L} Selecciona tamaño del carácter y \"endianez\":\n" +" -e --encoding={s,S,b,l,B,L} Selecciona tamaño del carácter y \"endianez\":\n" " s = 7-bit, S = 8-bit, {b,l} = 16-bit, {B,L} = 32-bit\n" " @ Lee opciones del fichero\n" -" -h --help Muestra esta información\n" -" -v -V --version Muestra el número de versión del programa\n" +" -h --help Muestra esta información\n" +" -v -V --version Muestra el número de versión del programa\n" #: sysdump.c:647 #, c-format msgid "Print a human readable interpretation of a SYSROFF object file\n" -msgstr "Muestra una interpretación legible por humanos de un fichero objeto SYSROFF\n" +msgstr "Muestra una interpretación legible por humanos de un fichero objeto SYSROFF\n" #: sysdump.c:648 #, c-format @@ -7201,8 +7202,8 @@ msgid "" " -v --version Print the program's version number\n" msgstr "" " Las opciones son:\n" -" -h --help Muestra esta información\n" -" -v --version Muestra el número de versión del programa\n" +" -h --help Muestra esta información\n" +" -v --version Muestra el número de versión del programa\n" #: sysdump.c:715 #, c-format @@ -7221,11 +7222,11 @@ msgid "" "the GNU General Public License version 3 or (at your option) any later version.\n" "This program has absolutely no warranty.\n" msgstr "" -"Este programa es software libre; se puede redistribuir bajo los términos de\n" -"la Licencia Pública General de GNU versión 3 o (a su criterio) cualquier\n" -"versión posterior.\n" +"Este programa es software libre; se puede redistribuir bajo los términos de\n" +"la Licencia Pública General de GNU versión 3 o (a su criterio) cualquier\n" +"versión posterior.\n" "\n" -"Este programa no tiene ninguna garantía.\n" +"Este programa no tiene ninguna garantía.\n" #: windmc.c:190 #, c-format @@ -7265,20 +7266,20 @@ msgstr "" " -A --ascii_out Escribe los mensajes binarios como ASCII\n" " -b --binprefix Se agrega al nombre de fichero .bin el prefijo fichero_ .mc para singularidad.\n" " -c --customflag Define las opciones particulares para los mensajes\n" -" -C --codepage_in= Define el código de página para leer el fichero de texto mc\n" +" -C --codepage_in= Define el código de página para leer el fichero de texto mc\n" " -d --decimal_values Guarda los valores a ficheros de textos decimales\n" -" -e --extension= Establece la extensión del encabezado a usar en la exportación del fichero de encabezado\n" +" -e --extension= Establece la extensión del encabezado a usar en la exportación del fichero de encabezado\n" " -F --target Especifica el objetivo de salida por `endianez'\n" -" -h --headerdir= Define el directorio de exportación para encabezados\n" +" -h --headerdir= Define el directorio de exportación para encabezados\n" " -u --unicode_in Lee el fichero de entrada como un fichero UTF16\n" " -U --unicode_out Escribe los mensajes binarios como UTF16\n" -" -m --maxlength= Define la longitud de mensaje máxima permitida\n" -" -n --nullterminate Agrega automáticamente una terminación cero a las cadenas\n" -" -o --hresult_use Usa la definición HRESULT en lugar de la definición del código de estado\n" -" -O --codepage_out= Define el código de página a usar para escribir el fichero de texto\n" -" -r --rcdir= Define el directorio de exportación para los ficheros rc\n" -" -x --xdbg= Dónde crear el fichero de inclusión C .dbg\n" -" que mapea los ID's de los mensajes a su nombre simbólico.\n" +" -m --maxlength= Define la longitud de mensaje máxima permitida\n" +" -n --nullterminate Agrega automáticamente una terminación cero a las cadenas\n" +" -o --hresult_use Usa la definición HRESULT en lugar de la definición del código de estado\n" +" -O --codepage_out= Define el código de página a usar para escribir el fichero de texto\n" +" -r --rcdir= Define el directorio de exportación para los ficheros rc\n" +" -x --xdbg= Dónde crear el fichero de inclusión C .dbg\n" +" que mapea los ID's de los mensajes a su nombre simbólico.\n" #: windmc.c:220 #, c-format @@ -7288,8 +7289,8 @@ msgid "" " -V --version Print version information\n" msgstr "" " -H --help Muestra este mensaje de ayuda\n" -" -v --verbose Detalle - dice lo que está haciendo\n" -" -V --version Muestra la información de versión\n" +" -v --verbose Detalle - dice lo que está haciendo\n" +" -V --version Muestra la información de versión\n" #: windmc.c:261 windres.c:411 #, c-format @@ -7299,16 +7300,16 @@ msgstr "%s: aviso: " #: windmc.c:262 #, c-format msgid "A codepage was specified switch ,%s' and UTF16.\n" -msgstr "Se especificó un código de página con la opción ,%s' y UTF16.\n" +msgstr "Se especificó un código de página con la opción ,%s' y UTF16.\n" #: windmc.c:263 #, c-format msgid "\tcodepage settings are ignored.\n" -msgstr "\tse descartan las opciones de código de página.\n" +msgstr "\tse descartan las opciones de código de página.\n" #: windmc.c:307 msgid "try to add a ill language." -msgstr "se trató de agregar un lenguaje erróneo." +msgstr "se trató de agregar un lenguaje erróneo." #: windmc.c:1116 #, c-format @@ -7358,7 +7359,7 @@ msgstr "%s: formatos admitidos:" #: windres.c:647 #, c-format msgid "can not determine type of file `%s'; use the -J option" -msgstr "no se puede determinar el tipo del fichero `%s'; use la opción -J" +msgstr "no se puede determinar el tipo del fichero `%s'; use la opción -J" #: windres.c:659 #, c-format @@ -7395,8 +7396,8 @@ msgstr "" " -I --include-dir=

 Incluye el directorio al preprocesar el fichero rc\n" " -D --define [=val] Define un SIMbolo al preprocesar el fichero rc\n" " -U --undefine No define el SIMbolo al preprocesar el fichero rc\n" -" -v --verbose Detallado - dice lo que está haciendo\n" -" -c --codepage= Establece el código de página por defecto\n" +" -v --verbose Detallado - dice lo que está haciendo\n" +" -c --codepage= Establece el código de página por defecto\n" " -l --language= Establece el lenguaje al leer el fichero rc\n" " --use-temp-file Usa un fichero temporal en lugar de popen para\n" " leer la salida del preprocesador\n" @@ -7405,7 +7406,7 @@ msgstr "" #: windres.c:678 #, c-format msgid " --yydebug Turn on parser debugging\n" -msgstr " --yydebug Activa el decodificador de depuración\n" +msgstr " --yydebug Activa el decodificador de depuración\n" #: windres.c:681 #, c-format @@ -7419,7 +7420,7 @@ msgstr "" " -r Se descarta por compatibilidad con rc\n" " @ Lee opciones del \n" " -h --help Muestra este mensaje de ayuda\n" -" -V --version Muestra la información de versión\n" +" -V --version Muestra la información de versión\n" #: windres.c:686 #, c-format @@ -7428,27 +7429,27 @@ msgid "" "extension if not specified. A single file name is an input file.\n" "No input-file is stdin, default rc. No output-file is stdout, default rc.\n" msgstr "" -"El FORMATO es uno de rc, res, o coff, y se deduce de la extensión del nombre\n" +"El FORMATO es uno de rc, res, o coff, y se deduce de la extensión del nombre\n" "de fichero si no se especifica. Un solo nombre de fichero es un fichero de\n" -"entrada. Sin fichero de entrada es la entrada estándar, por defecto rc.\n" -"Sin fichero de salida es la salida estándar, por defecto rc.\n" +"entrada. Sin fichero de entrada es la entrada estándar, por defecto rc.\n" +"Sin fichero de salida es la salida estándar, por defecto rc.\n" #: windres.c:847 msgid "invalid codepage specified.\n" -msgstr "se especificó un código de página inválido\n" +msgstr "se especificó un código de página inválido\n" #: windres.c:862 msgid "invalid option -f\n" -msgstr "opción -f inválida\n" +msgstr "opción -f inválida\n" #: windres.c:867 msgid "No filename following the -fo option.\n" -msgstr "No hay un nombre de fichero a continuación de la opción -fo.\n" +msgstr "No hay un nombre de fichero a continuación de la opción -fo.\n" #: windres.c:938 #, c-format msgid "Option -I is deprecated for setting the input format, please use -J instead.\n" -msgstr "La opción -I es obsoleta para establecer el formato de salida, por favor use -J en su lugar.\n" +msgstr "La opción -I es obsoleta para establecer el formato de salida, por favor use -J en su lugar.\n" #: windres.c:1051 msgid "no resources" @@ -7457,61 +7458,61 @@ msgstr "no hay recursos" #: wrstabs.c:353 wrstabs.c:1916 #, c-format msgid "string_hash_lookup failed: %s" -msgstr "string_hash_lookup falló: %s" +msgstr "string_hash_lookup falló: %s" #: wrstabs.c:636 #, c-format msgid "stab_int_type: bad size %u" -msgstr "stab_int_type: tamaño %u erróneo" +msgstr "stab_int_type: tamaño %u erróneo" #: wrstabs.c:1394 #, c-format msgid "%s: warning: unknown size for field `%s' in struct" -msgstr "%s: aviso: tamaño desconocido para el campo `%s' en la estructura" +msgstr "%s: aviso: tamaño desconocido para el campo `%s' en la estructura" #~ msgid "" #~ "\n" #~ "Can't uncompress section '%s'.\n" #~ msgstr "" #~ "\n" -#~ "No se puede descomprimir la sección '%s'.\n" +#~ "No se puede descomprimir la sección '%s'.\n" #~ msgid "" #~ "The section %s contains:\n" #~ "\n" #~ msgstr "" -#~ "La sección %s contiene:\n" +#~ "La sección %s contiene:\n" #~ "\n" #~ msgid "Range lists in .debug_info section aren't in ascending order!\n" -#~ msgstr "¡Las listas de rango en la sección .debug_info no están en orden ascendente!\n" +#~ msgstr "¡Las listas de rango en la sección .debug_info no están en orden ascendente!\n" #~ msgid "The section %s contains:\n" -#~ msgstr "La sección %s contiene:\n" +#~ msgstr "La sección %s contiene:\n" #~ msgid "%s: failed to read archive header following long symbol names\n" -#~ msgstr "%s: falló al leer el encabezado del archivo a continuación de los nombres de símbolo long\n" +#~ msgstr "%s: falló al leer el encabezado del archivo a continuación de los nombres de símbolo long\n" #~ msgid "%s: failed to read file name\n" -#~ msgstr "%s: Falló al leer el nombre del fichero\n" +#~ msgstr "%s: Falló al leer el nombre del fichero\n" #~ msgid "%s: invalid archive string table offset %lu\n" -#~ msgstr "%s: desplazamiento de tabla de cadenas de archivo %lu inválido\n" +#~ msgstr "%s: desplazamiento de tabla de cadenas de archivo %lu inválido\n" #~ msgid "Only version 2 and 3 DWARF debug information is currently supported.\n" -#~ msgstr "Sólo se admite actualmente la información de depuración DWARF versión 2 y 3.\n" +#~ msgstr "Sólo se admite actualmente la información de depuración DWARF versión 2 y 3.\n" #~ msgid "Unable to locate entry %lu in the abbreviation table\n" #~ msgstr "No se puede localizar la entrada %lu en la tabla de abreviaciones\n" #~ msgid " %8.8lx %8.8lx %8.8lx (base address)\n" -#~ msgstr " %8.8lx %8.8lx %8.8lx (dirección base)\n" +#~ msgstr " %8.8lx %8.8lx %8.8lx (dirección base)\n" #~ msgid "set .nlmsections flags" #~ msgstr "establecer opciones .nlmsections" #~ msgid "can't add section '%s' - it already exists!" -#~ msgstr "no se puede agregar la sección '%s' - ¡!" +#~ msgstr "no se puede agregar la sección '%s' - ¡!" #~ msgid "%s: error in %s: %s" #~ msgstr "%s: error en %s: %s" @@ -7520,104 +7521,104 @@ msgstr "%s: aviso: tama #~ msgstr "haciendo" #~ msgid "size" -#~ msgstr "tamaño" +#~ msgstr "tamaño" #~ msgid "vma" #~ msgstr "vma" #~ msgid "alignment" -#~ msgstr "alineación" +#~ msgstr "alineación" #~ msgid "private data" #~ msgstr "datos privados" #~ msgid "%s: section `%s': error in %s: %s" -#~ msgstr "%s: sección `%s': error en %s: %s" +#~ msgstr "%s: sección `%s': error en %s: %s" #~ msgid "invalid section [%5u] in group section [%5u]\n" -#~ msgstr "sección inválida [%5u] en la sección de grupo [%5u]\n" +#~ msgstr "sección inválida [%5u] en la sección de grupo [%5u]\n" #~ msgid " Offset: %#08lx Link to section: %ld (%s)\n" -#~ msgstr " Despl: %#08lx Enlace a sección: %ld (%s)\n" +#~ msgstr " Despl: %#08lx Enlace a sección: %ld (%s)\n" #~ msgid "skipping relocation of unknown size against offset 0x%lx in section %s\n" -#~ msgstr "saltando la reubicación de tamaño desconocido contra el desplazamiento 0x%lx en la sección %s\n" +#~ msgstr "saltando la reubicación de tamaño desconocido contra el desplazamiento 0x%lx en la sección %s\n" #~ msgid "skipping unexpected symbol type %s in relocation in section .rela.%s\n" -#~ msgstr "saltando el tipo de símbolo %s inesperado en la reubicación en la sección .rela.%s\n" +#~ msgstr "saltando el tipo de símbolo %s inesperado en la reubicación en la sección .rela.%s\n" #~ msgid "invalid number %s" -#~ msgstr "número %s inválido" +#~ msgstr "número %s inválido" #~ msgid "stat returns negative size for %s" #~ msgstr "stat devuelve un valor negativo para %s" #~ msgid "%s section has more comp units than .debug_info section\n" -#~ msgstr "la sección %s tiene más unidades de compilación que la sección .debug_info\n" +#~ msgstr "la sección %s tiene más unidades de compilación que la sección .debug_info\n" #~ msgid "" #~ "assuming that the pointer size is %d, from the last comp unit in .debug_info\n" #~ "\n" -#~ msgstr "asumiendo que el tamaño del puntero es %d, de la última unidad de compilación en .debug_info\n" +#~ msgstr "asumiendo que el tamaño del puntero es %d, de la última unidad de compilación en .debug_info\n" #~ msgid " (Pointer size: %u)%s\n" -#~ msgstr " (Tamaño del puntero: %u)%s\n" +#~ msgstr " (Tamaño del puntero: %u)%s\n" #~ msgid "Extend line ops need a valid pointer size, guessing at 4\n" -#~ msgstr "Los operadores de linea extendida necesitan un tamaño de puntero válido, adivinando en 4\n" +#~ msgstr "Los operadores de linea extendida necesitan un tamaño de puntero válido, adivinando en 4\n" #~ msgid "unsupported or unknown DW_CFA_%d\n" #~ msgstr "DW_CFA_%d desconocido o no admitido\n" #~ msgid "there are no sections to be copied!" -#~ msgstr "¡no hay secciones para copiar!" +#~ msgstr "¡no hay secciones para copiar!" #~ msgid "Out of memory" #~ msgstr "Memoria agotada" #~ msgid "can't read resource section" -#~ msgstr "no se puede leer la sección de recursos" +#~ msgstr "no se puede leer la sección de recursos" #~ msgid "flags" #~ msgstr "opciones" #~ msgid "debug_str section data" -#~ msgstr "sección de datos debug_str" +#~ msgstr "sección de datos debug_str" #~ msgid "debug_loc section data" -#~ msgstr "sección de datos debug_loc" +#~ msgstr "sección de datos debug_loc" #~ msgid "debug_range section data" -#~ msgstr "sección de datos debug_range" +#~ msgstr "sección de datos debug_range" #~ msgid "%s: skipping unexpected symbol type %s in relocation in section .rela%s\n" -#~ msgstr "%s: saltando el tipo de símbolo %s inesperado en la reubicación en la sección .rela%s\n" +#~ msgstr "%s: saltando el tipo de símbolo %s inesperado en la reubicación en la sección .rela%s\n" #~ msgid "debug_abbrev section data" -#~ msgstr "sección de datos debug_abbrev" +#~ msgstr "sección de datos debug_abbrev" #~ msgid "extracting information from .debug_info section" -#~ msgstr "extrayendo la información de la sección .debug_info" +#~ msgstr "extrayendo la información de la sección .debug_info" #~ msgid "" #~ "\n" #~ "The .debug_loc section is empty.\n" #~ msgstr "" #~ "\n" -#~ "La sección .debug_loc está vacía.\n" +#~ "La sección .debug_loc está vacía.\n" #~ msgid "" #~ "Contents of the .debug_loc section:\n" #~ "\n" #~ msgstr "" -#~ "Contenido de la sección .debug_loc:\n" +#~ "Contenido de la sección .debug_loc:\n" #~ "\n" #~ msgid "" #~ "Contents of the .debug_str section:\n" #~ "\n" #~ msgstr "" -#~ "Contenido de la sección .debug_str:\n" +#~ "Contenido de la sección .debug_str:\n" #~ "\n" #~ msgid "" @@ -7625,23 +7626,23 @@ msgstr "%s: aviso: tama #~ "The .debug_ranges section is empty.\n" #~ msgstr "" #~ "\n" -#~ "La sección .debug_ranges está vacía.\n" +#~ "La sección .debug_ranges está vacía.\n" #~ msgid "" #~ "Contents of the .debug_ranges section:\n" #~ "\n" #~ msgstr "" -#~ "Contenido de la sección .debug_ranges:\n" +#~ "Contenido de la sección .debug_ranges:\n" #~ "\n" #~ msgid "There is a hole [0x%lx - 0x%lx] in .debug_ranges section.\n" -#~ msgstr "Hay un agujero [0x%lx - 0x%lx] en la sección .debug_ranges.\n" +#~ msgstr "Hay un agujero [0x%lx - 0x%lx] en la sección .debug_ranges.\n" #~ msgid "There is an overlap [0x%lx - 0x%lx] in .debug_ranges section.\n" -#~ msgstr "Hay un traslape [0x%lx - 0x%lx] en la sección .debug_ranges.\n" +#~ msgstr "Hay un traslape [0x%lx - 0x%lx] en la sección .debug_ranges.\n" #~ msgid "debug section data" -#~ msgstr "sección de datos de depuración" +#~ msgstr "sección de datos de depuración" #~ msgid "" #~ "\n" @@ -7653,31 +7654,31 @@ msgstr "%s: aviso: tama #~ "\n" #~ msgid "cannot stat: %s: %s" -#~ msgstr "no se puede obtener la información de stat: %s: %s" +#~ msgstr "no se puede obtener la información de stat: %s: %s" #~ msgid "%s: cannot stat: %s" -#~ msgstr "%s: no se puede obtener la información de stat: %s" +#~ msgstr "%s: no se puede obtener la información de stat: %s" #~ msgid "Cannot stat: %s: %s" -#~ msgstr "No se puede obtener la información de stat: %s: %s" +#~ msgstr "No se puede obtener la información de stat: %s: %s" #~ msgid "Out of virtual memory" #~ msgstr "Memoria agotada" #~ msgid "%s has no %s section" -#~ msgstr "%s no tiene una sección %s" +#~ msgstr "%s no tiene una sección %s" #~ msgid "Reading %s section of %s failed: %s\n" -#~ msgstr "Falló al leer la sección %s de %s: %s\n" +#~ msgstr "Falló al leer la sección %s de %s: %s\n" #~ msgid "Skipping unexpected symbol type %u\n" -#~ msgstr "Saltando el tipo de símbolo %u inesperado\n" +#~ msgstr "Saltando el tipo de símbolo %u inesperado\n" #~ msgid "dynamic segment" -#~ msgstr "segmento dinámico" +#~ msgstr "segmento dinámico" #~ msgid "Cannot stat input file %s.\n" -#~ msgstr "No se puede obtener la información stat del fichero de entrada %s.\n" +#~ msgstr "No se puede obtener la información stat del fichero de entrada %s.\n" #~ msgid "%s: rename: %s" #~ msgstr "%s: rename: %s" @@ -7689,22 +7690,22 @@ msgstr "%s: aviso: tama #~ msgstr "debug_record_variable: no hay un bloque actual" #~ msgid "%s: No dynamic symbols" -#~ msgstr "%s: No hay símbolos dinámicos" +#~ msgstr "%s: No hay símbolos dinámicos" #~ msgid "64-bit DWARF line info is not supported yet.\n" -#~ msgstr "La información de línea de DWARF 64-bit aún no tiene soporte.\n" +#~ msgstr "La información de línea de DWARF 64-bit aún no tiene soporte.\n" #~ msgid "64-bit DWARF pubnames are not supported yet.\n" -#~ msgstr "Los nombres públicos DWARF de 64-bit no tienen soporte aún.\n" +#~ msgstr "Los nombres públicos DWARF de 64-bit no tienen soporte aún.\n" #~ msgid "64-bit DWARF debug info is not supported yet.\n" -#~ msgstr "La información de depuración DWARF 64-bit aún no tiene soporte.\n" +#~ msgstr "La información de depuración DWARF 64-bit aún no tiene soporte.\n" #~ msgid "64-bit DWARF aranges are not supported yet.\n" -#~ msgstr "Los rangos-a de DWARF 64-bit aún no tienen soporte.\n" +#~ msgstr "Los rangos-a de DWARF 64-bit aún no tienen soporte.\n" #~ msgid "64-bit DWARF format frames are not supported yet.\n" -#~ msgstr "Los marcos de formato de DWARF 64-bit aú no tienen soporte.\n" +#~ msgstr "Los marcos de formato de DWARF 64-bit aú no tienen soporte.\n" #~ msgid "" #~ "Usage: %s [-CfsHV] [-b bfdname] [--target=bfdname]\n" @@ -7713,7 +7714,7 @@ msgstr "%s: aviso: tama #~ msgstr "" #~ "Modo de empleo: %s [-CfsHV] [-b nombrebfd] [--target=nombrebfd]\n" #~ " [-e ejecutable] [--exe=ejecutable] [--demangle[=estilo]]\n" -#~ " [--basenames] [--functions] [dirección dirección ...]\n" +#~ " [--basenames] [--functions] [dirección dirección ...]\n" #~ msgid "" #~ "Usage: %s [-dhV] [-I bfdname] [-O bfdname] [-T header-file] [-l linker]\n" @@ -7729,85 +7730,85 @@ msgstr "%s: aviso: tama #~ " [fichero-entrada [fichero-salida]]\n" #~ msgid "Usage: %s [OPTION]... [FILE]...\n" -#~ msgstr "Modo de empleo: %s [OPCIÓN]... [FICHERO]...\n" +#~ msgstr "Modo de empleo: %s [OPCIÓN]... [FICHERO]...\n" #~ msgid "Usage: %s OPTION... FILE...\n" -#~ msgstr "Modo de empleo: %s OPCIÓN... FICHERO...\n" +#~ msgstr "Modo de empleo: %s OPCIÓN... FICHERO...\n" #~ msgid " -a or --all Equivalent to: -h -l -S -s -r -d -V -A -I\n" -#~ msgstr " -a ó --all Equivalente a: -h -l -S -s -r -d -V -A -I\n" +#~ msgstr " -a ó --all Equivalente a: -h -l -S -s -r -d -V -A -I\n" #~ msgid " -h or --file-header Display the ELF file header\n" -#~ msgstr " -h ó --file-header Muestra el encabezado del fichero ELF\n" +#~ msgstr " -h ó --file-header Muestra el encabezado del fichero ELF\n" #~ msgid " -l or --program-headers or --segments\n" -#~ msgstr " -l ó --program-headers ó --segments\n" +#~ msgstr " -l ó --program-headers ó --segments\n" #~ msgid " Display the program headers\n" #~ msgstr " Muestra los encabezados del programa\n" #~ msgid " -S or --section-headers or --sections\n" -#~ msgstr " -S ó --section-headers ó --sections\n" +#~ msgstr " -S ó --section-headers ó --sections\n" #~ msgid " Display the sections' header\n" #~ msgstr " Muestra el encabezado de las secciones\n" #~ msgid " -e or --headers Equivalent to: -h -l -S\n" -#~ msgstr " -e ó --headers Equivalente a: -h -l -S\n" +#~ msgstr " -e ó --headers Equivalente a: -h -l -S\n" #~ msgid " -s or --syms or --symbols Display the symbol table\n" -#~ msgstr " -s ó --syms ó --symbols Muestra la tabla de símbolos\n" +#~ msgstr " -s ó --syms ó --symbols Muestra la tabla de símbolos\n" #~ msgid " -n or --notes Display the core notes (if present)\n" -#~ msgstr " -n ó --notes Muestra las notas de núcleo (si están presentes)\n" +#~ msgstr " -n ó --notes Muestra las notas de núcleo (si están presentes)\n" #~ msgid " -r or --relocs Display the relocations (if present)\n" -#~ msgstr " -r ó --relocs Muestra las reubicaciones (si están presentes)\n" +#~ msgstr " -r ó --relocs Muestra las reubicaciones (si están presentes)\n" #~ msgid " -u or --unwind Display the unwind info (if present)\n" -#~ msgstr " -u ó --unwind Muestra la información de desenredo (si está presente)\n" +#~ msgstr " -u ó --unwind Muestra la información de desenredo (si está presente)\n" #~ msgid " -d or --dynamic Display the dynamic segment (if present)\n" -#~ msgstr " -d ó --dynamic Muestra el segmento dinámico (si está presente)\n" +#~ msgstr " -d ó --dynamic Muestra el segmento dinámico (si está presente)\n" #~ msgid " -V or --version-info Display the version sections (if present)\n" -#~ msgstr " -V ó --version-info Muestra las secciones de versión (si están presentes)\n" +#~ msgstr " -V ó --version-info Muestra las secciones de versión (si están presentes)\n" #~ msgid " -A or --arch-specific Display architecture specific information (if any).\n" -#~ msgstr " -A ó --arch-specific Muestra la información específica de la arquitectura (si hay alguna).\n" +#~ msgstr " -A ó --arch-specific Muestra la información específica de la arquitectura (si hay alguna).\n" #~ msgid " -D or --use-dynamic Use the dynamic section info when displaying symbols\n" -#~ msgstr " -D ó --use-dynamic Usa la información de la sección dinámica al mostrar los símbolos\n" +#~ msgstr " -D ó --use-dynamic Usa la información de la sección dinámica al mostrar los símbolos\n" #~ msgid " -x or --hex-dump=\n" -#~ msgstr " -x ó --hex-dump=\n" +#~ msgstr " -x ó --hex-dump=\n" #~ msgid " Dump the contents of section \n" -#~ msgstr " Vuelca el contenido de la sección \n" +#~ msgstr " Vuelca el contenido de la sección \n" #~ msgid " -w[liaprmfs] or --debug-dump[=line,=info,=abbrev,=pubnames,=ranges,=macro,=frames,=str]\n" -#~ msgstr " -w[liaprmfs] ó --debug-dump[=line,=info,=abbrev,=pubnames,=ranges,=macro,=frames,=str]\n" +#~ msgstr " -w[liaprmfs] ó --debug-dump[=line,=info,=abbrev,=pubnames,=ranges,=macro,=frames,=str]\n" #~ msgid " Display the contents of DWARF2 debug sections\n" -#~ msgstr " Muestra el contenido de las secciones de depuración DWARF2\n" +#~ msgstr " Muestra el contenido de las secciones de depuración DWARF2\n" #~ msgid " -i or --instruction-dump=\n" -#~ msgstr " -i ó --instruction-dump=\n" +#~ msgstr " -i ó --instruction-dump=\n" #~ msgid " -I or --histogram Display histogram of bucket list lengths\n" -#~ msgstr " -I ó --histogram Muestra el histograma de las longitudes de la lista de cubos\n" +#~ msgstr " -I ó --histogram Muestra el histograma de las longitudes de la lista de cubos\n" #~ msgid " -v or --version Display the version number of readelf\n" -#~ msgstr " -v ó --version Muestra el número de versión de readelf\n" +#~ msgstr " -v ó --version Muestra el número de versión de readelf\n" #~ msgid " -W or --wide Don't split lines or truncate symbols to fit into 80 columns\n" -#~ msgstr " -W ó --wide No divide las líneas o trunca los símbolos para ajustarlos a 80 columnas\n" +#~ msgstr " -W ó --wide No divide las líneas o trunca los símbolos para ajustarlos a 80 columnas\n" #~ msgid " -H or --help Display this information\n" -#~ msgstr " -H ó --help Muestra esta información\n" +#~ msgstr " -H ó --help Muestra esta información\n" #~ msgid "unexpected dialog signature %d" -#~ msgstr "firma de diálogo %d inesperada" +#~ msgstr "firma de diálogo %d inesperada" #~ msgid "" #~ "Usage: %s [-A | --format=sysv | -B | --format=berkeley]\n" @@ -7840,10 +7841,10 @@ msgstr "%s: aviso: tama #~ msgstr "Modo de empleo: %s [-hV] fichero-entrada\n" #~ msgid "GNU %s version %s\n" -#~ msgstr "GNU %s versión %s\n" +#~ msgstr "GNU %s versión %s\n" #~ msgid "no export definition file provided" -#~ msgstr "no se provee un fichero de definición de exportación" +#~ msgstr "no se provee un fichero de definición de exportación" #~ msgid " The switches are:\n" #~ msgstr " Los interruptores son:\n" @@ -7906,13 +7907,13 @@ msgstr "%s: aviso: tama #~ msgstr " W (escribir), A (asignar), X (ejecutar), M (mezclar), S (cadenas)\n" #~ msgid " I (info), L (link order), G (group), x (unknown)\n" -#~ msgstr " I (información), L (orden de enlazado), G (grupo), x (desconocido)\n" +#~ msgstr " I (información), L (orden de enlazado), G (grupo), x (desconocido)\n" #~ msgid " O (extra OS processing required) o (OS specific), p (processor specific)\n" -#~ msgstr " O (se requiere procesamiento extra de SO) o (específico SO), p (específico procesador)\n" +#~ msgstr " O (se requiere procesamiento extra de SO) o (específico SO), p (específico procesador)\n" #~ msgid "Unable to handle FORM: %d" #~ msgstr "No se puede manejar FORM: %d" #~ msgid "64 bit data type and so it cannot read 64 bit ELF files.\n" -#~ msgstr "tipo de datos de 64 bit así que no puede leer fichero ELF de 64 bit.\n" +#~ msgstr "tipo de datos de 64 bit así que no puede leer fichero ELF de 64 bit.\n" diff --git a/binutils/po/fi.gmo b/binutils/po/fi.gmo new file mode 100644 index 0000000000000000000000000000000000000000..a3aba653a1eecdf88f6c549945d092badb8af308 GIT binary patch literal 173759 zcmdqKcYGB^`}cnmnlw=mD`n~RPz3>#5C{a2P(xEhI7v>zA(fm25)}mtf?ctTy?YDx z-s`Q{uwm~7`z^NHg8IBaGqa~80rC5Ne!oASeZ4mCop#O4HP^J=J)8I1Ha<7N(Y;9^ z&;h3P2?XA68VDRdQ@(+~8>N9jTlgmQ;MZ_3*t#qb*cWz%o#4T+D?AMLgDYTXcmv!A zJ_GlJAHtsS2e?1nzdR6V35P++83R4I2rAtw=f2Rn?}NSYe;Muue}gJVql!S_AlLz> z!&y*r&xXz5rEm{;E$j&IhAPKvus7TeRsSAKsS6wnhr?swcz7pl4}XU(;GUI%zyYuW z%!VW2D0nPXy8Gbna2p&91JOXBKNtcBz=crdI~^+CMX)Wr0ZP9Qz;5s*$Dd#i-1}8o z{f>rxaTmiq;dxN$uZPm({g9>%yaj`>aW!e-5UBd*K?a{dSvugfx< z-yu->FM|qS@BE*Ed*J>Fj)qN_+xlli)q4dT3U7ug=f_a`{0Yv22iI6Vo(Wsyz6oZ* z``}pkCmaLE)Y^7E9xDB#a2{-Sq?Nx2j=+5m%!SXxsj$mYwmmE0DBL%}nQ$vqxkepr zY*c3K8*4lXsn1;J6RJj&9u7fJ~zu`cbx-t+L2Zunl+j4jyyb-Eh-goX+tE{{+ za2Wo_z=Pl&&iyr1K3$Kq^_~Ow!F>ko2d{JfufUPGTODuXWjh`VRjzxW;{O0;Kb=po zoDNmKRZ#u)4k-P;1G~cZC)#);pvo126X6x`5cnljzQb1A_9};p_ZZB9zd84WlWac6 zLbdB{P~~c}#@b^h%)q@8ro)Gw`wuuAciLL3rzn*CTcFDMx%2OGvJF21PQw3UD7*R; zO5TB|*m76GKDh6P^8XZ$f!$8E`G;X!+*do^4VB*}sCGy_EfCln4u>7#6qpH%p~`a; zY!5$$lJh&<7w&$#_3s7S;ZBFLvl-4^0=wg03HO25zysiea4+~KRQzwDQBXH9O zY%MhqC?V3ZO)1k|=(idD_<=xRDd|3bJP`N-&VC{gxEGFo5?Sz9*cUc>%8pY5U<=%H zq3V|hrN?7n7q}kwgbzWb`xFj@d;Hs`&xA@Jfzo3Y>;~7sX7DDc`rZMR?seE3HhbFU zHwgB?odea5m9QmT3nlklC^?tIAiN%;hQJo6{Jw)q*Z3Km&jGL>?hL4MEP)<8-G$%m z_%iH`|4&f)b=qXp_jQ~Cm97Fx&RK9Fyc3Rv?Vq*%Wge8C*1^^ahm!la$QOgwjv5=dB+4LJ#+JC_7yW6@D_5oo#?>pGTnV>^&$u`x7>Xd%s})4}eN{ zFw{7A1XQ`!LFwxOsPwPEq3{Q|C+zj2&1WQ(o##O17jo`nq3q-w*bm+U2g7$9ci(K? znNaywLiNMzpvKb=U?$xACDuxCE<6O@0ad=gp!D7QWt&e9l>IG+ec&0e7rYlL-iNR+ zZ1RdN&mhOcq3X8=O78V=AbiQWQ(m=l`$CN;GvENY7Pf--z%2MAoB^A^X6L2(a47CO zVGw=+WxxAuapMT=k9!6j43B}C@D`}?bQ@GYgI>4wSqMAfUJHlA>!I>{A9jF)->`C~ zLd9DNmG5QnK=?cy22GS1_@8iU3iIxtZe8#f{-hrkNC|8t-pi>eW`0}MD8=;WYvJDbKL$09yb0CM z-h=zXrj1j~IM5lk#GMY?!%1*2xX}4mIrmB^`#Tq^9Ugc7FF?ur7^?qncm7@zo9{44 z@dKlrI|HiSvY_&t4OPx!D7!ii?hj9el6#%wBT#yL6YdAUfokVwO>I8=z>c^(Ko5?B zUEqAE`mKPS;9A%jUJs>@r=j9~2fM?z&1|_2g1vE1fy3Z3C_B9g$}T>D>PP$TW|;vs zt`$J(;S{L$zZtfMZ$i~;E0i6iHn-(y4^^&Va344eDqabc{F9vj2B`8p2{Ylhumc>} zBE`%LIdBy2a;W;;2sJJ}2M5F7VI~Z=v~tU!%6ks%2k(dKFI!!B+g3Ke5m4m|LG_=N z@BnxgR6RF9>Fp(`cKI2qefMZ>{kuZdV**rpOQG!RWGFe8L8ZSRsy#k{(!*}Mr9R4-B9-Qs^eEMA9re-6f+JLLbd-oxDehBH9oZ4!?sHn zRC~>V>97E5yuA|2?q7q_(+5!XZ@H({&p@d1Ooi%i#ZdNG0oC58L)q^YQ0ec4((4CM z{opUC`n7Ls?RpUOaA!J(py?kj{8XrNu7?`OZ*=Z^q2m1;%I;rs{_jGy%U90*hhxij zR?dD<_2~sC!O4(eEpRT}4PN4SEmS#ghN|Bt=l?lW{B4fE!mhYe_Ok8S9ZC;rQ0b;Y zwQDI<`By`g?_8*K*Fo9aCdap-`uo?8+o9^&s=bxJHwg0hFbI$HL1%ygUsmA=HeSHle4>!HTm zx1sd<2UI`WyOS-)D5!cbg>&H5@G$s0)VMRJvmK9CL+SNe$0woWegY-8sh48b8=c`O z+<8!TcnRzWH$d6fn^5ii8Ps^%vWuI41S;O)un&wt+0QyCy<87ph7Uu{4`+9^ z^|=>H?z_&N+Re6WPbmH7!yv43yb`Kho1yGzJ5)a#+uin;8E`c2d9V?@04o3WQ1*K} z)VT8kl>NO9rH_xH^wgw>Wp^k$%Yw3_xlr+!K9tdBDvY%GL6tiCL1f}QhQ1u-IC2srqhc zc7=0qhU$+$L)qv4gKWD@gi2QnrKby^`ojjO_Ie#^{0R)U<9A262xnI~9Uc#*uUBDn z_$ibf{|Cz6et;UsS`V@9*8{2_XF=)ZaHw^_@zB_T;}cMNdJC%mHXUm79{`)+9tt&{ zj)bzeWl(ZAK$YVuD0|%u)m|UK+3)1 zpzQ2DsQ&OfRQ>v;+5VLarT2wU_FV?m-seD-Zv)gg`G|8r1Etq@;57IR2CrHS3;F@Bb1#! z2phx4p~lCjq5A!oQ2K2>#_FjPRC^DB8E_#~{+Gfb@GYqR*m`V=xvxDOYFu0krMK&# z2-PkVpzQ51sCHfo%{=6IIn?^&KB#=QK=s$H&i_}~8F%|^%VALV zG#jdZwQwJJDU{s1pz607%1-_ZJ=k%A)qjTLB3O(6aj*z(hl*D)(egwnJzfiy-^*|? z{25A5y(d{cOn}n=QYd>p9m)>wg0h3hp!EI{)HwAURJ#s7#MY-2j>3H!RDMrGjTb*c z>0`iTTaVFD<75~r-kDJH9)KEGet^<<*Bm>(41?-_=}_%91IpgZq2yc*CFeybJ^l_= zZf}a!XMZSp<6sLo7pgpYQ1YTs^3Q^5uWO*%`EICw@d8x+--90f1}eYZr&|4uay%5O zy=tKJbQzRAJnh_{Ko588X|}!tpz;et<+mIv{pnEcawn7>yz2bFg^JgHx^18SQ0`e! z@r$AQ&B;*qxdF=F9)l{+M^O4{Im6a_5R_d_h3Y?5Q0Z=jvXh6M`(vnb`~sz?wlnSe zx+mNXcLf{@YoP}>K$YhO*adzArLQ)**6t35%C8h^Jh;law?MU9t66qExi8dw)EP?u zQ=r=KaM&6aL5+9SQ1*NcRDQ2R+3&B8U1r;Olc4geh3fA&L6z$h=)pbaSUH2C>Yop# z&y%3y-3Zk_TU_`bP~%6Jxz=tcL!~By zj)T(oY^eFG9I9Pvq3U-!l>OfVWuKoy_1mAI?5*vgR_*|(bmO7o9R}4dOQ7Pfg)0BG zQ1-DIs{Fq~_1lhzSQ0@4};Q20aSTQp!Bf{ zs($OB>bn7|f87UVZ%;YC3e}H4g0hpZ9Dj$(uVu)}?F3c-p-|;H1WHebLd};o&i{0% zbeBN&n_Hm9op+$}Psy|G*&51@dca(m2{j&_1698JpxXUu#}A(3Iuc4RXFC7Oq3ZJl zRJ(lvo5H4HTb|ZX<=+oV551t|jB?@AVK(l=VJ5uFxj%ujlYWJ^{8QjK+^0a5cQaJI zKZGjJx6b`1RC}~6vg^qGq4FE*I0?!Q7CLt=lzp55CHD&Fz748BJpm=}4XAN)D^z(q zFShf2Aym6v2^H@_sPa4qrMGvW^b&~J`gDZy9}QLhe5iT10!lxpLzV9e=e{4Ry{4vYy#T78*T50*N~rdH+c8jL z%hv;{pJzFD2~_)>43*zaj*mi>e+$$){yV7hH!rp0LvN`3ro(~oNZ1qJ2sLiL1f`E{ zQ0>yD%-VSuDE|>q^T-^i@n#iNemB6u@NpOZ6O??f+}3kCl-`S>^mPVQd!G;0Ue`mF z_a3Nz^^$Xc?!r?lY(4jcDo0PK_~W43cL7vAj)dyhS3t$v044ufsPeuIRsKdxZTtaH z<(Lgs|3awzS3{-0#PNQpeBOi_7k+l`4wW|DNT~KW6iVMmLD|VgQ2B0z(&rY(&!NWE z-=Nxi@2GVj3^Q@hh3YpKK-FiX<9$$e_7qh8UvciQUHGq1^=(pR_1+$8oEZd_E(~Qa zm5wJlu6Mi@s@zXO>E$iw{t8O&Ur^(7n`&FHeWCQ83H!q$=)rSb_?>VP?swrx*lU?( z2&!Bc!y#}pOoxq@+j5S9s`pgbHkI`PRJluQZNA4r>F-7;eLn?biT#eW@n%4U z*Fv@H1yKF`W~hGf7}U7_HB@~YA7$;dJyd&-go-~0%041c?Xngs{bf-4cm`@5dKs#p ze*-7O-bdSdR6*JON+>&60~P-wsD6DXRQcb7%D3$bJ8lew(#tY98r}hw?nkKcuFWyl zo;$%AxFozNG`TD?txM#uv z@HjXK-s=26g0hdctE|4dLakSaLB*Q~N5Hkt|1qd`{}f7}`yOZA1E9(kg39kQ=l>#9 zzfC>f_P-$1{FnO`yee5mUTbrU0(th!mZAK!bvIS{kpZV1pk-e0yuh2ih0lR5}1kmQwV)>IWylDR4cM9eoLoZxvfGa9?EISpH6N{k>JK+T>G?gVe$?|EtG61c{9lIhZ+~uzc`vdE7T~@E z%0Bix&+2CZls#MqWygQPnK1o)YnNxjOx$lnwR49HY`qGh^n3->`rtDtxm_=`=?bCb z-3pcNKX5)Ad66yOxo{rtH=yb{_+p#SBB*w}0;(P#Lyc!W*ISN+YNs5S2`_-MgEwJE zxD6_On@jBYF#~EmIR#42l~D80ozDLSC_DTV%Fcdu?!7Oy^F&`L`7@x#?+8?Tp9sx( z=-hWgjVGI6XZRM>c=Q|8I(o0mEcb_+Up*-MnFxPK2?UOY(qqLHcAU5gZovH(976b- zE0IqD@4qS~@D~D~eK;lXRw{flC2$5E;@YRt7X$n77gGYoq^o^BCGb7`6y6Tsc*E|8 zPkqzoa~|x6|I1MG?4PhFZ26Wg*ARFR?n0<}?^3Ao@D(V#YxTBGKMS_Ny%I{lr$EWM z6gG!X!mjW|D0}!GD&Ilx*!9QZQ1i(#Q1jk(P1S=`Q3R? z^?3(&f%|`8>z@W?&(j=_fg0~OK#lY7!nv^bhgR-NsB&*~d=;vkzd`A-<43kUJ3%jBB=VVgNk+|JE7vGd}hbd;cx-&6;R=CL&@v4)s`n0 zdbm%5ec<(uFGJ9Us!htD!=ux5I*hv2YzYS zRZF18x1-=}_y|;a_x>s+kO`}x#``;=^7#mAoN4m4ZMP0k<6#z@22X*ZB-|fD! zdKwR9_eaA_crjFd??8<&L%y~4GX-kgSmE5)K*@UzYChZZKX%-n4%J>)L6z@mDEs{h z%1*j{XXnomj-#Q*scfk5MNsonHB|q-4N6ZBK#h~1!#&`3sD9ddn=OAwD0doEf5?GK zUj|#k8mM+S0jfP8hO)aa;7HiKuS?-rxCLtd-S5A)e#KDvT?4;siakQv%lm)Ye)2PvUJm@rmgfkl{3~EM zmFJ>x4E!P`HL$!9_c)Cv?XCP?aE;UeiN zpvINkpw?|4LdDzHOEq?v4yCtZI1HW$GvWPE{c<~$9UR;x)!6lEj`u;??N-&XE{`TE`ieLy|63%0;)Y)b+hfz4|=$>pw=-3Q1MqmjT5&*%_rYL)pxJ% zsb(G@0cH0qq3ri2sP*zEa189;!=@{Q8h=iMs^^_>2>c34Kb?Bo`b>dZ{~QHXj*FrC z^F2`g_)|C-?%m6_%S5Pgt`N$96_niDq4e_^l)dcL+sX|>>1&E(4U}D61=UaQg=+6j zP!5At zAe5e_LfOkIsB!L0sB%0BRj(EUEIUH!X%N&noeh<4j$_!d3hsmd@z8@8L+SMa=l{HO ze+sp3`x)lK&I41;IxPy-&yIqs*BYpDodsoIPdWcTq54^~L6+^H?5i_WdryEW?;@yr zFN5j_=Rwu$HYoi)38kMeq3W~uV9Op*q9e;wVZ@&X=dB;N4GZ)T)B~W^N z2uhD1!vV0(Fk8M1D7hi1bSt6cUFiI8fvVq&Fdu#drMK+icDz3V%I>33Em_B@1Wu}KiIMxRDS7D zb{&DL_gPTm@QYC6+NIg@jE0%GkAY$MFsz0>(rvq53?=U+sCxYh)en1TSUt{w z>L(R28=eX^{=Wh>U$z--^|~LF-Ohy4>q4mU_GGAX-2Ny7mTsv?0P79&q0;*H<$(cjJ54m3Z?Jk;Bfc=RQey_SlBPi+G`n9zc?0Z zTwM(t!Kb0h@f=inKYNEui$>8A{&^pzQAisPSYY)Oh~_YzaSt8W+EXlJ_T6 zzdT^P)z26xIVDhX*1_rUL6`}5&rUV_yJ=8zE`svE5vp8YLABG5Q0Y5Pu=DH$DEmDL zO26x&+G8`E27iar%jAhx-^W9>@6}ND_Xw0dya}b}lu0(9L9i$7awr@OR~};L!`mj? z@K>Sw%O6m7+b+lIGYB(rkB91itD(yAFjTxYQ|vg}2WlJ|3?ncLN+DzivF$ z+F3U!dm04QZdp+Eo)5di3aD{t9n^Sn50u@$1G~U|r`h$vDCprXfl7B8RQy|@+Vxea ze1CLoH{He?0yU1#hHBpmsQgZY8b5D?(&JXBc5gGo<~Pi-2rAu$Pv1X9;!T_L$$+hb5qUz>Hctc+{Z)N_1RGU{3$pJ{sA-LhMD_-B!RHcm*5>zlCb&p&_@vfQolH)Hw45lssP39_7B^7WJ0y)TsQ%q z1&ux(_bRmZI1L^~csW#iZ*u-yq2}9WMb>VHLiM*WlpUN3)eirHUEpS@{`Wo9_}y)> z9lvv+^t%ko{|YF5ZGuXd8nN?TcQ_6AVyN-q9=H#D8_I5efNIy)OKds2K@WE(+#iM< zkA|8z&WF<5qfqwx7F4;nLD}0L#diG4fT~9Ul>M%S%I`6#{NI6U#~&TLmDqaBgsRt3 zP~*+D@D%t8tc43p-FyR8@02n-&-R7V>tg3V2dca;LyhCxq3S=P+}h22sPdlzRnIHo zaQGmc0)KQITVd;SCLD|ZT~PD-uTbSbXsPW#g;4dcfu`J0R}p`zSls_ zUzbAZpJ@|_P=?qi+*dYFy-O?U|O zj<$AE4AuS{p~63clGkU2oqrF6(q{%#zSU6SC&Sk8To-;7RKI=;sy*5sW9xSi?2CH= zl$U;2vZF$%`kevQ{X%!fZb%s{#8)xqD|0)+o9~K z<0&?LykiNJ{j7r;x2}WI+oMqJ_db+9+MH_jun&};212z{25b&zJO71HdMR@}!SN!f z`rQJhkLR8Ln^5-mA1HZ^PqX?w0IIybq5P*q*<%q@{2Hk7{xqoey&p>N+n~zd=yaQ3 z7g&lr1A6c#sCIfDYCQS?%AWs%vcvt)u>C*H@enAz&x0!W3OE6-g-zf~F8p;E#=RX% zpLu86@njiPJFbG7Pi}+i@83eTf5)?Iy+%T{*C9~lKN`wjFM>_s<52l;f*PN;KiXVoOv&^|yL$%xaQ2pg5DEqw^9tInqn`-8Xh0v@sq003H zl$=*!8vGbaPu_X9-_LYB6)N6SQ0cco+0AcI<=gXoD{lbQxR?&rPx7J4doq+>FNV9p z8=&fY8`QY^0+gL?g&Jo%USQX!3!v5|XF}=s6{zub8&tdw7uxnd9Lk^-bSG8b1js->!ISk;{5-BTIY1Q*oIGXtb+2t49aewgR<*wPUUqj5isQ{J06UJs&BUA zLa2UN1JxcUJNM;K@@{i{5~}=fIQQpp2=3pZ`qzM~ZF?_*YKPOI!XJY3;Wju0PPxX; zR~JLob2HR@-0Ip?^E@^isyvrM)%O;d0(G=V<^BkcBOB4ro#(aq7vb+8bKJ!hjqSzt z#LIKnAK`U0aStYa4cDUx8;AQpgg=d&C4u?vwo(qoZxiu!JV?B^oQzVgWv5RQR*m1) zxMd$YKDUVdZB5wwoPThhK>T)00NvoRPOcyEDDu4&zwXXsF>+tRy$Ju;@w*83K-^nh z_$=hvIS@2zLtZYh2ntku?Rs z6`Vg2$3K=4en*148R0Ai%yAiElSo(L-1|FOGact7r2C%h1*EDaekDADvm1WT5jTwA zuSO!{E`IltM;rJWeh)c+;W)`9?y0~dT;FZd+`&>d(248+5*Ae)jv>gwgXzvq$ltIL<*z&$SA z{@6|?*H1dP!rtKA&Bc8a|3a>>!Y_~OyO8x6*YD%EC)d0Z7C4K1nj=SZrGGTRJr+k> z;%y`RWB3kkwg!RS3H!@MJP&puj8~sxM>_7kh<7gO&g484cQ?XsB}R8R2)_y!e%tWN9@n?Qr{UL}2N35%cq9A+ z|C6}Zm_L~G-*Ej4X9i(9uE%dr>f|3qn&LO-8|6HygC4MpP*Ac3H zLkAbX2i!{7J)AFc>R4f6{yyvC`CiAVP#m+7^&;m$-0N{qA??|?4}|+ceJ5H+6Rz*Y zZ-1y`FCf*%fPi<>)3;^Q{=&sgWqLb?~C8B@HpHLa(yM&+c_U3PE-7Dhc6%}-^r*ZOh-O( zbu`62p7Ua^e=X)N4xMQ zxOKej@}EHbiMR*5{C_v0?A4t6Ru}(N;vdWT4*oOnOXHlybx#)_CTs%kZMerF<7l`L z9*X?GI5)WboOpwt#Q%YKH@mQ4Lf{1a&m&zXerd$hK3m5t_+QTX5a(*bd*G)vrjA#M z7e&@m&NFap4gDE@M-f-YWUl*?W)`Q86FGD7yUV%d*Oj>KaL>d4F|M1-ljA02R=aW@ zihCSklZkgE?1KNF_zmFtY0{m`bvk^T@Bv)khX3JQrxWi9coktf?sM|EZ4*0&arGST zli;Jo{gdm)#9QOyzK{PQ_`M4^b8@S~+&kma9Bk>$JA!g_=lWXm{@tbh#8F{Sb3IQN z?s$W|nsfTc6)x^|$oSUxgtKvXgonX}$eu`=_P$(r6z-b{t0Zg=?%lc8u{-{4VS$VL z2<(FU2Dkw}L3|yba8?rcJ$NwZ8C)+!#?OS0;QCXpcXKic4m9Dq+PR-X)*i&WA6^ef za*iR*51bx;C7e3`g};uy@c)+cK$m_~g51yW_m5Vj+nbZuG|kb1F-Au_&Qo2yhY9Tc|(x%DqO^Q8)qu%v*1+x zyK#nGK0WY10RKxkmymXm%V&%P66Z|O9a)5Zg5M*!n-X^q>NFC+EnJV}e2cR!?jJcH zcJfEVUwi@ZTH@%qkvKX!5dMer+Z}hdyVkcm-{+d!T;{o`;y%f_w@dde>8_&8IzGqm zY#yNuPwS>RV^{8r!z@@kcDu828{JJU~GIjJI|5x!l7k91mTLo{%|8=N)89Mqn+0Eb{ zq}TB#e24Q-{0eZlb8!^*Bxz?lc`J!?H}d)sen00gTag|Fe_vOk5UI4c{|22+7@LR<75uA^6y$A7fklU8)d*Hp0TXBIP z;dgL;$hi#vV&e7W)bTRm*Wq^n*L$Ip`*D9nyl3!hje8>3owy##c`{+`aq9@;_Kyx+ z|3z3=JZhZ(*SNP3_k8^3z?<bTYAa~S;5r8`maZLs-UPT0ky*#ci8Y>EqOiQjO}6FHmVR}9Ax{-Kk(o;)Vw z_cdXkaNUdZW8D6+$iINu_`goN!{IBqGr8{Q%6K)`EjSM$tWko!Dfw#s;m9E0Q7-sF*m#XkoIIXiK-C;b4JM<^w11KnZfk zB>b)*ZEM^=C_UFYRw2VbIuhqYCubJd*Kr=inRs+^;j0}L)(lx6!mpjo`K0-Z@MDmD zDCd<g{s$-IA-_$W^GUx9wnFAbgiq%>72ZPp7vYnHe+zrz|8K5G!5?w!=t3GD zpW|-ku8$|(1H{vDEdJ|U+*;g^QkGY6e@dMDiSrTeec=?&U${OU|Emel!@Ys)Q}7!^ zx|UAHo?Ksp-%W(|B+gi_=W@P@TgMSxmvDV9@kbNxyaOk3y^^p~ot*8&U4oyE3*dk8 zKN`N}{EjE??wlVJegHz+;6DxbTb$o<{*K=;IFoeWz#Cu@amzUWg_G}=6Zp1H-Z=7-->e_*W+DTrgMFcle4c9a-8SF-gf@Ios3Pmk0fkw;&h|k z7drpraQDZ5gDc~1j)&t{?qmds8{vEazvBs?&viDum$N%(NEvfXC43NJGvNNXPkWra02IRTz>#hCT+yUDdYNi{MzHb-O0IMVa;ck z6_=GSFY}g#E2EL}vH>ju&GX9(!WE&Suon$iRYl5*qF$&n>_v*o$}7VKL}<|>x3)B| zyd>%sR+g7~J))ypG~hYEM|6P=m|a#7E{v3g3%qDU>2??#li-<>w>Tpyg@+vCJ ziz-8r36~XBEvA@t!jt@`6&6zE=2JtZ zVG}dADpXnJl^4dcTO1A*pr=uB$q3A$YTnf9(!6k`M~bR&X}GKkoe(swLb|lqx#9dO z6zo-%d%58v#qml*6&2LRM4h!b?2U_55~;kh)|(Z|D?#N^FI-wtRV$r)4Md0~%#ILS z#okfEIuT+C3(HGN%9l%{(dCh<{KaA0*5wr{YN$l_-;U8u|o%PUJmRjAwq z6jhd2S70u-hVy$2t6tzO>JjbbsR_OO^0KN>q%7+7sP^L+fxQ%?GF(!gA2OQp(<8Us zw1hXPrbkIlLi&;dFR!-BDs+H~HNRiK1(YDIM>In=IHodxaby{a!{TaG<}uM|xHPY% z)+?wktx!w)d6WXSJHF z5YtkHLd!yt5@TzsK|v&1Q4*>(=3slOsz1J@kc!jhRkanyCXMc7QR;F;m>909r(fw# zwVoJ>R@ttq3>FP2Dytr_I22vn%gd|IFGlkvMDR*X@AP_Cl~;vI)J#1}s$GO=pZa3{ zQPN4J8p;YIHPscidCS7#0>+|}NM2=#uGXzbf$HG}y+{En=eneZg4<-qI#tIU7uyuq zZw6z)aqFhc32ipD+#geu6kk|gZH&jOT1*>AuhQ|!+yuFiaiSZlh&{7@7Ynq=b)B_N9g@s0DGsfM$#?~!s*uJo zbtsj*!8qZ(>Y^f)_uoggm6c}v#0k~Ur5mXz zbw&W+LhW4URheE;M;pm4T0f?A67r&p7i#Q?92u7B9vQAI@1l~}PG{xH_-Ur1uqk6= z2q_YKMN&i!`B-MuHC5ttKoE1X=H(s*b*HEPUQ`p8Djm0|K#O=1HKQAi;=^wgGfg(i zqy+wq>!!e+N8V+re$~tb@;4=LasMWk8=e0qvKjtjO7KfjR{^u_Nbd&+S~w5ere>1y zjK##&TyMroGVM8bk>#27P$X&6t7CZ$Cez3jH-}wG;V-!SD%44n)Z2~Gcp#G26?Q^Jz5MNCRXc{ECY4tr^(A!g~aaKNyzq+tUPVQIe+-m`R!pdd?J3^; zw9?8*Fq&T(siVY+0zx9vMBG%vWYGSX*15b&1VA;qR>K z$}*27aYd*y$`;N<(&ELH!(aI&r0~315%yYa_SjU!j;zJu{NiYJDIWefZ-$hBiSfS{ zK27jiU7jCO1lY@uTkOM2KAn^@@6PLM7Dq(W+i{U)f!W5}DE!r^SilJ2 z2bgiubwIcNCsy*H8Y+pfv~-D$gE2{)f%57qFEgzy!_P44rLnCHXDF_Js9!i=EhpWU zG+gP@Q&kY8NQB_`E610+>i#frL ze@2^Koo`paoR!=Ks0P{mDR?O ze6?fRi_4cYJ+KbUa=twk|gLa3tUYbFy#d6K?#}rV)O{_B1t|`TABx}8ja&+P+ zZg^@O?}mRjQ<^(+v1v{dY6Fww-%gLre%h=AP5T=wF~#+ZY67isuo6%Yab;wDrs2Fa z8c}MrbHhVD={{t#Acb`n14DMxXNacF2B6AB2=Y?k~*S0obl&{ z@{5;;Dhs&tqDW>lW>-|nEAiks1W__O62?2SXKyj@aOh52*t;@iBg#%Ibw=aqOiP|W zG&4|YC1@kMl#@sqTZ5ocYO|$edVVl4m5d zl5{gB({8<@Od*}wlWI$vV0tuSdA_z!@xb!DC3Je*G3mN#2ju~mzAYnQfxREayK9dFWta}eo_HK`mtyD;~Tjq?0^MJ}SNK**KG zUkAm~t2CI~-z|{xNUsU$pRQe8_W2}d)HY*p;t=XKmvsi;*cj?k7m(TvFxrnLu7T_T zR~TRVXf>l*Ukj>;o~KdIV3_1PAMV%z)?X7Ak}MRh({rS^hI&tIo#*mgOyb4il7t8@6h>yarm8ZeU8r_u=J`q=SE~xd5$blZY{a#!PqX{k46`#xT-?V( zTwTQc}ZsW5b$ytYLi>iZw!`Jgt^UpovG)@LkVBOTCpue5`W9dvuUBXx-rB$h%|IF|* zd{CRYFOw`dR&H}Yq(@)wd-!MYARI&e8zH{;^y*4(X`3~k@ftkHBr(}3rE^;`4T$i= z6Xlru3%1C;xw{m5h9i4*&%{SrUH73@z5RDLB4wh0aYFVxN^CPOkB0Ih%qxPQbv)x~xnssoGS#*b5_4@JWkRkE zrQG4vyW`1M8MIf!I*KI0!`{wm?UqT2FmdmklI#f`%P2Bjj2 z*x}+cmNS!?QBA_CMjbM!%>>We-Kz*hH;2Cviie=f`Y#tmmG@jEEZ5zmq=Q@H-12ee zPcTpGv3qVA@TATgG04kb9I6cEGonhyKb=3wwP9WR)nr#7X;jX zw|5Avys`#`jYU{qq>R0NFr?Rfs@P{SC3$IbQMiOIDWCrKIgKqRMU)@U61i1H!L%!F zutctLB`dF-#PyzbXjiV8%mD$KvsDfrpbOk7AK+Ec7)H)GZ4b+iELF}fIH+gK8wQEn0FR8Sf^QGu@pM|E*ie&cpbY(Nl zs;M(nwwcJQ440NK}}2FLbfSj2fXT zKG77I($GA~lzorS$@W~hZ%?Kto5aR~%&jnAR0DO%F0bSPeR2Rp0XH^y*{qn!jeTs0 zg#v}~OJ;XjDq3ZnVSqaDsPVm)iz3NHKaYg5;N&L~erriprATwJ@ikY*+q2h2^ zJpo2vyH={@Nbu{Z>pDs|lHzq#fo!3Dv(a#uq&FupxSUEZkCgBl1@~kdIHrdyOCwc0 z{%}#aE$1|AZs1l%qCA(Rn%c7$M4}SY;Lw*ay6_|>m|Qvun3o{Hnn-eKd;w*(=GHN` zTN(84m&IP{mY@iN%m$L@4LtampJtb+8D`^$%=kPrRkM>`mouH1HZyD44EuVoukE-f zExnkIW6|t%Kh@lQNz77(F!u?0OW4HrSNaJR%H@d$cS`gkv5SIYZ872*^6V2$#M-?m zRH56BC0-g^t2#2X{Sm z#QJj~?^P3D(KW2vbiS}?m;p`O#0KPP38VSZhWqJbSsM{Y@w{MhsEh}FCf3oK*q2mC zozN9tTBIz$Qj_%G9-8!RY=7~Qly9BfTxr75c#g|TL;v&qa;A*w@6DMq#!To*8FOn= zWlyN6U1I3AxD*;MfYW!-7Q_r8N2MR#@95wP)8xCNge;>=kJ6Zes6ZIF-;i$M!epKx zFx~*JTqUI;j8e<(|6%TGbCuv9=S;=__c`xEooS2t++khdERP3LWz67e3FGZ7(Dz=k zD~g|s46UI<=AKY|`B_lT%2^Aka1DDuD~W}edW}=Jdqcn|oHeZ87uY3xSMN%0SoWzr z_NZWy&pZ2eg_|JFE}4^4#MjK~J;`AVY&^7KMam;GEtDlNww%YHwPaSI{fcm3qog1s zJ*_OfJY#-;SCIw0)uBjn*@|S!rg*+SO3Ha(%~y!xN4=v+$E%u0GpiVC#j{H-F_Enj zx2hyEma7#>RkF%?MbSPW0;p)=(xXlekg}G_O#Lz3(ydckJjBQ_##;q?UN7nKt7q zC*FLER7O2p92Y{n1=JJFUG6{(y!Fq?Q*}_mRCm1i>*BJtEuw<)tkbm zE8(6Fw@Hb@7R*oM%g~)XvvF=vMzJlI8&FLY3DB#^{QijBlm)(=3f)=T!BMv?8fa9O zf^eyBl0*sGV4mS z(?2car``o=HjPCtmh znfcXe(iEnJ%=Gd0Ms7Tcwh5Z(dXb;NWGlj0L-*PrrsSF{WmcF$IQ&Ocd~tRi+a^j-G)0-uO1o8*6ncJrD#~%xLDXONb?_Q zH2CC5ndLBBo7pqzYPxH9Le?-Dh#{6FhH28=oJ@zQWivM3d z;;AF-A3frUKbEN@#Z_D8{7)Xs{NI0&QvYEEI|9?6Y!U0+N_JrlJgm?!jQ%e_tl;^F z-cqwt>prsZZ{cyP>i_456)46%d@?Jzx&`A--aomSAFTW6BU%4+$DKU-sC)OmZdyOF zQK7%%vTf*(YNifmLiHD#&Nji$@817Ec)QmR!Ku2?!tkfe=w+&b*l^b-B> z(HK|-Pf^@b+&rAI3C#$d%j@Jk0meHRWpCt!*q1Ae2Wworolm;`9*rmCm$fX}%rU9V z{y@-dP|OC$H(fI>nTP4xjqsri)&thiHIA4~nSOBTj$B>)Nx6-w2=UnZ6-&tc0@FUM z_H#AA?&G5lenR$j+8ZU#Z_2E;4Bsj~kKqn~GK>fK0<`PlB@xZ2da*xP$qz1T(r1nt zH))L{YBOiFsI`erZ(ogy*V69M(#K|xbH7aVf8!G0z`0vi(wyFKAb%HIMW|L0 z^nSH&(iE77?3BVUy|!ZJM-?X2*MZW_^M(#tI6Uz;AS!%s_mLev?aR!blr!GeDDiLo zrHbN7B(FR)@M4Z%l!o3FnWGf`LM4_-Qi>feXpEhPB)}OE?*y5T<4BG#!nZ9O#4QG^ zL;aqP0v9T^8A}tACZtvq#2&_C@y2c_uI@T0nKl{x*jS<}B#Nfy?OUFV)-OoX`pEyq zX?~)VSWYoj&iD5Y3t|HOdNouse;eTusHJdCIKSF{p}-YM)*c*JN0|Sl&@YRhNwP4NC{czAvxN%R0W8 z-i&;eq2*>6>B9q}S}%9jn6bI0Q>av?=2*3gGq2AR$J!D=u?w?*!ou`Fq6rV~x;^Tt*O_jtbcIYjWG@O#e^@c*moy_vrH@7ub${`k}u9LKtp2ukEFP%!@ms^tduPCN{+8V z%S2i6H+KAw0@ZEgnTaJzkd`RLFTvkR+u;_s{(Rxq8Q9Y@m7w1EA0J@MoUy|h009vR zFpZY1h=%s0x;JR%1NY)y;;s}?6D6vF*Gl8sFz*@0Cy)S%@|39F6z-ShA5P_^5|&uP z^eJPqCQh1aC*cN!CC1gVz(rS2T_Ra-;7pHy^T3tNyarL=elR8VXC>jqvOfeecXH)I1b293%83aiWxQUWT!X zHjcm8G2gm~%VK;q!gAumN+MNNOvMR@6XpVTL7vjOg@Cz(Yo~_TJ#c>|X(kMO&8pQz z)I)Bw5a?~DnqaQhO~FZ07;i4o1xdtHRi=u6)RiP6c*$$Xf(|GWr>F`%~Z#a z;A`LiC|iQ5NMe>Gn!D~rCE@w$xw8(<8SlSoLnk(K0}mO>2rU>$H`Z&S>^a8W~ zwsv_*b!nMt`y-8R#=d)! zK4#oF-#E>P;F`#OVr}_i{aDLI)#v&$(mf?`3X!aG-gK=m%D!Z^b6IJ1WZ9=6zO-01 z{rCBGBiH;M&M!_#5BQ_zTM981)y7I@-s9jqH_O?ZEvF|&{kIgyxgl>c9}J9(u=dE- zFFwx1Whu3N`73?yq;az*#*E6BWqs|VcZNT{#)iW63WB<&S~%z)MxlQ9ZV7L?q)*Gv z&K*C?mo|n$!TB&QXt_yQ)a%q;+;bmSclSn-Y0bKOUSFKwnN4R&-ut@Fr;pLaH=$Pj z>Cb)l-o_FIO*+?du~8=6}S={e))jL&h!$u;-a_!vwT z8+0nBuM+4RqjrokD$3>KnbgR>zJ~;UNyu~*R4L6H58N0yTG4m%ZVc_=&roIpiY@Qy z7`_VKs{u}wa*V(0;R>68N%n)YrV(X<`o(&LS*6x~5TY`ls_$^wBRM-;`t0mxyuHt2 z7C&`=#Im!80XCVxoJt(41JpEj8zrHJ{^jfnz2tAyX4VwT!aP85mZIA@u~+-4@lGEj z?4;xk|1QLqV5cS5XD5f$=tqA^$`0CJI5+TPNtu#_>+?4xQhlz`L`awS< z+^L`jqctqie#pz*nhTZk>Q;TxS-jPm_~Bq*4GFZr;>t4LAT>W{)FU^3J*1y{giD+z zd|__s)O%K>QP;V`L2cCRPCT0tp3N%U6_?UX5r}3qxm_Z{rr`^ zSEX;evDBi|^HnK+O4zN&{5EwQ52JU~qOK~o8s_UF&H18nbA2nTc`i2#-G`Okw_WVV zZTuOou1sn%zJ}NE^`%z(RV(U0N>-T763YCvF@7D@rQWvlSy!5ubQrs_rHuU$H1^Fd zL>t|kpPe%)IRiI(o#cL`%G=tmmCTP}C%K{3{OVE*fnJg5!e~`#RWHh6rPcYpZ&Gn$ z4)^2WoyPs!IDQ0mqOp7}p&?bcGAWAL;5QJ*Mww!N(AhwEywK(cwo^hyk$go9c)Y7p z6Dj30Xw!Hjn)f03NLXw}@s&G;*+@|mg1lI@ZPt7~H_S)&tf9MAXRI}3(4>@WNUmk&5FG!#2SMi!E&F${fdNj*J8cCK6TnG7P!39 z#%H=q^nE(U9Fv3l_AOEphx5Q(t; zY?>XSVgZxb^u`=9E%`pVwWR~%`ZO+8NOkzXA}HzGa89Cm1T(v z5|OW@8^t-V3a!$NDf2~)S<|NF*wE#C@~wGujqc{TPV;eL`#n|Nsz>eo6ons~@P-Vl zFTVB8w}t6f@-Nb#g6Mz&=7SC~Z@Ox7bJ=q1 zbpy>d_6r4cets3kx|ybMwCaWrMQtlYDaw(~{rR1fBP?V{}{-VT1$~Sw> zI`P6x?b6i3JoA-8jW?Cm#_m-XH>;R5W{#34UD+mKt~9#x6KMRQ2cy)G%G;o6yUD@~ zIK zNLnQ(Ea9Zuf1F4QIugzb#cqnZFk}N@z43MT^&hKY9Q{C)%5j?YHYTS7Fmvt{f5H!<~N z+Fg-o;_Y14&J|$?j~%SKr6~VkAh9~zg}AYKW5;oAzVn0gh7R%X0`fl%%qBYO@u)eE z&4T;&g*0d)@(9|*4SM<&c?CBm`OuwiVm27xMW+05!Njj8xX9065nY66sWudDdu#F^ z7mr1>YF1skfo8V*u??@iqgov)hz=~`k4ZPRUOFw{%+_&!zV==`E-SRJ>8hGjD;LDR zITLgEO<-B4pO~A(W_*c9vpw79?*zsJbyZhJtk08D;cijKce&NClD^Eni>2}hJxMdi zE=ZnUPgmyQs%{{;`#<(;)*=4)i*8f~P*`qKngaViRbDl}Le<^1gePkz_N=7XrTjcr zKYu}3Qd`gBBdGkB7kVIfIznbkK7US9N_WG}+yq%>?;QB=PO4C$q{#laCwR8!g$nh- zqWSjq74wl;D?V?BDe}VH^y1g4iAlWPQ3iHB#hD*jV5YeF`AGtt9`w63{nSj)Sa{jh z{0EW6`rW4ajj#I{l~GJ#QgY_;|HIw8F1K}D`@Z-ZJq7m8)(Vvniex)pUW%j@T9=qh z6r~a=*(sKbhDb<)c?|*3;)+wXKkS!SAI>*FLtemda-QV;{^QcK=LA5}PO{FagDQ!@ zoZX{uqeqW>+XQeFBV}tM-iWi1Qq8gYq*Yvgv+}jZ@H@sTExn!6Kp5b76=@t%54dAb zXgYSdaHo6*eeV%lI+r6#uk5|Ki8-3YL9czZ+}Kk-0}M$xu8`r(yp_~bWkrzhp%&+`~qVJ5OdD zmvdwSc(gNY7JPulgt<#_!L3!mS~>9s?jux+SJEU1frW@z4K?xSooY!3${&hTIHI8r zr)MQksW7QMGYlvXbH!p5#dAaf^EJ?zJ}^wOT);V zhO)g@#8%MW?^GB!AVN|$d(Y^yWC`p}9tBMsAFG3W1&)mbQz5aeJQhYfp=`2LInxN% zF*O>UuxyI{wQnCXm#r_RdcdOyO zdtxZmasPcke%`&lfB!Byv$&Wd(zYR-BR@-wnDzPuC!C$lPL(b2_9p~V)=vg0HgGOquYEU})} zi>HxJX6Sq{yVK^^Y#wf_{H^BN$P0WC(R~tlN-e??8y6U_I_z(bro_=Aq>=nd(oFy9 z$^Hy?6xBObOzV(?Ug>vi8M%(b6V_ZHq708GP}C!#GdxCYH-rfp9I20v5!3kk=HqAN zg0WymQcSTdTtmZL?kf(8b6+dgF3ckBY8dUOwr2L6?c`t#ib^teeQ#GV@4Qm>@+O(} z{gbm@MOQ&PQ%!8}9nVTP7g+CyuZ0F$*?P|@7l&pC>ZvZ;7#CDFnitDr9vbYz`&u;& zE3!m6k+OwJwHFh;BaoE*TDZ)`6OxFSVg86y_4qF z?;Y#p-Xy+F=N!s7c2s5^!Yt(^QdR$Gi58722ZVJvv68+(NCbw3HV+{3SFq_ivd}TD zrmlDy$;1P<$VNbVg}UmRK^q@!IK(FZl&Dn;>S}*@QwxF84`l+$s)P?4!~fKQh5?OJ zNWcBYvAnmh&*%De+n9C*88}ZlWiF$r`~#ft(UjG5?hRFQt_9mrZjyQqd?UHO+Zt~_ z=&$^7^Q8#zh~+pr*1Byz+kB+|w;%lzwU?WaBDJMGBdJz%u;lZ(qS3cqV`nOJ>N%me z3aQQO^1ymo>+<-{wUOAiLYw#Zf~fU)SAeCignra|b@g5>s@ZBhlxyJO9ogtC)iDU% z{yc(ZfP|w(VjJBtOWt9BK-dPsAhJ_itP#n-*VD|W%^kj@0V#=rc8w7hN>pyJfWr&c z?%S(;PU}h?6%Q@(k*kv3M_92KYjBK~t=0_0U8w3I9ZwghC5A8%%+2iV(c54#} zG9b(=2sI{k9CLC|8H98f$7+?@qpGba-P$v1$4zX_09$hsZ)GN*Yg=JVIjE+3-SK>z zYu;_YveV;$lD38#Lduu{VSWNE3%`;E7UPq;k|6BR%M^sAgqliUK6ME%Uot^6n@T<& z=Oq2nL0SXTZuZ4~q5(crV7!xLqV0zv9_V!N^X-{??ziUf{1)i!lK87{~OSan)hA={#gI;4k71 zt(r^Q2CdVZ#m@1bUAf$P!~(B-YXbi1zvS$cYDNF)scJ%i{^g;6bIQ zvH*epN^s@kN|ojtNGIP9_P-~28=J#pnEvwF_qT6-fBREF#3!fKWjf$*T{n0%{XR3 zGTrU3A3S^dYY`glhvrlKv^&AZnl2ZbDlsGkrWSyf_fZ3vZ1Zi~Q>55DU0=xrtKfruTY1D>)%9<1Cz(`P8~~#B>4( z3|tIh+vvaSaORcVWTVokY)T`NQ4HYb#?#>8x-%q}6S<9h!|rhfmHw6t4H$Y*>X)a2 zqp%m1lCGI)u!G)cgH2`ozg!n^5802qyX@rgHaLJ9kr7DCk)wPcWVv${Ft z)B;FNh>)Jyfu@UKD2GxNB{?GW;v=Pr_tR96#6{Xkes9OgP^xt$=b{b#mr$Q-X*XYP zkiABlAk+0v6sjecJ`ru@UmFCEP@zZ}s;kFJ8%hM`nX?<(`H3@AV(Wuqo~-V#zAyB$ z8JnH`il~V3`EVq?zaD~}CINH# zXTmj)|4N>0yqUK6`k8RvTZ8vyc$Wf zdLg7XWVEpaEh45SZBO>bV;pxXc=px0-zba3mac6*SYNk2q=hs#-zrOI)c$;F$&q3e zG1MrPy_8B0LbWZ|DBvwgQM+>gCKat2+kBiYUdp(|{>>wgKGnNjJ2z*?W9=4NDH6jT zyZhuwSqa;qMc@6MUtnnUvw!NA-vqWlQZ6PYGAe8#S+o-3BZ7b~91>LHb>u~*5O2!f${Dz@(3Ejli374;)Lcgk~FflVtIS0Tmw z>`;>*q<_~pUqeW8-^H2duWe#{>*TyTx!19W{ovl+;tro(GBWFz2bXsSCUgQCmP@x| z#a_;#+yaDqx&8R|rv>43DHm&PmAfdn6yaVz-gZ*uHyyo4iS%~*uC=ZWBXuMPOn5_1 zl9TV4&%lhxyr%(}W`HQ$LaQtMS|glC;b?nu&4t%CqkI+=NtFuN9WMpygyFnHv5Lld zS2q0mqvQXJ7mv1H!tI;p->*EExn62rXfw+E>1@Jj?$>gLD~I6f?f^YD6lR|4v9?gy zP)59kQke;j3n~hXsWJBEms;Hvn5D~o=KHgV%J27IzwMxl4fV@+BTi)IBrL50c$2dI z2b?yZcp=cYo|(DtW?jYCpS$Fo&h*zGLjSb0-i^jY1)6S$MG?V}mU)|YlBF?mg~3`l zzR6m(!YGNcy?6_|XU5%16F~CZ1ByI;lnEd~m_}@v|3C*S1wmghDG2#M=eyzQ4bT zXPOtxfJ4yd@<79HB$5A0{M|QLDaY@B1q>lVEU;woZv;e>_EyNR1L*8Hvv<&;oHQG$ zzimy>U~z1y#^Kvcgs74iw2_%i(Nj?a+f}f2bYSTRK?fe)UA9HuoGmX~?O6Th^@zl( zgGr`oY2|2%w;Tf(vI~Z>Sc6{7@RohLrZSdNgG9{*w)He4AJw2%tRf@Njg0Vu3zp1L z*eVpDsV=bg4LscXQoh?($UKPa(;?sY}DT)idiXDj6WXLFq%EQbi+ zmYi+So1%CPx%4T|OSI<8Tk*vGV7~r?Bl`*)7b8_3CQZT*+9Ftj|5XPMity$;oA;KQi(g=Oh+MQ+i0fbd#^y zC5=G5PQGh%{mnd5%nb~7=cMSAYQ{&T4aYuiqdYOEH+x;3A*Xow8gD3R!jUAa&i~bZ zZWaRK=E$G81=Rs}{OZfP8|s6%lj>9%%eQrKbPTY6W+d*Q<&CdAQ|zoRvQE#{ebd3Z ziHxprdxm7kAa6J;YlARgdkzv~@PJThzK>9bN>9i`7QxQFt{N-pPkjKmbBJ9I&++qm zBoro9uNH1j_%<0Lhg9jSw8;N&(7L$})+@TSvkO;d38#nCC7-Xgv{k2E*E zNET0(Oy14aF!`70V&0D=nr7A{(aI1E8Vc^7REc%wS|T44!y!KibX-^RF(iWv=oKlV z7r3zC{;8Nv!xvr06^4l_1)4LC@i^L?$)++O3J)ENZsPM?n3RRG;; zUSN1AKgeJ(M0ed9I6CXuJ)?BtkUVRKofgMsJ(7WJvL~BVbn#m6m%c+8dhhz+Z=783pv-$?fh?L_j*GpKY0MIRdsb$4jM@qp6}J1$5w|Ha zdB5mgXI=QG|K?ikJc;IHAiTauz=v*8OdDQFZ-PLXA3wiY z8}HVgB*r2+!b_YXiTAO$4~ECT;+Yr(C#l&9pPW1La?Juku(~B4ot>S?rB;nS#*v31 zCNXQagZHKL+878|-YtEPrsYTx%tg=KZe}tXk$wNfuT`^+*M&6m3=U0Kv{GK^X~b4Y ziHKfpa>vH-6y|MAQWciYSWDN8Nh9V?Jpc3hbdr$)yo|hEmB3V-om34M!>xrnq7KF$(dAYB2I?< z3#GsN?B)V_D39`Hd#9J4bsVj^cCq1=BZj5F6aQdq9U4HruZk9`atA^rjw)<$5RNyt zYh#lAN7=$T-}N@VvxS+{C>N!2Ts$Sr8&^=0Y+^y`g$R)ig)4-d~fo4%%o z5s%lpKmZEj0SC-$<$!N)9h%1&Nw>+QJ~>biTe?~)G{xF{o!-!qH^c;hKyer>p7(5+ zW9=su?d+PWaplX(HiOXBvn+|TI($mZQVasrgMb+t`KYpk;!^y1!SnI4qqbNNViL?y zWo8^%EQhC7|B^DS)80X=P@GFn#9MF7D%^e&!CRNMip*&dUUi|S+3KXW3_xg8?1-^; zcxfb~g)sTBeSrGZ>79EcmDzVj4WfN9iZg>kx`yfPFi$|<1tWcK!58p!3mV6RT)v0#$%qSouRH(X#JY3a{KTm&s4iysC? zFAF9#r+|$;vrqal+`Md^&dp;#1>?|;;nCm`+_C7rwylws7SZrbBFT#@Y-lv$BsP{Y zxaoG~Y7igXLe1T2%A!(RI_2cCd|Tje6e`CEMGX}N6#Kx7Zp(19KPk( z1osbC)LBwRA90}B!DT(he(E`Q990v2O6}S4!STs=_zm&ic0Cyj8RR$cI+}R6Au^n) zdF2#}Ggn_N<(TmAZ1(!~c=FEs?qMp-tR#r6^>%pnS{8JV7K8(fQ?M>`G@jVCC<N&X1MB^h`$iU3(x+W~88k_)*BPUk{$YtbUR8qxyCJ+3#-oQI}5Q=fg8R zc&5EN5l0B!&@qee*R6&R>_2!JTpA}kbu2TRyn2Ysyw)QWUzZf}1%XD~ z|KUhCKC!7wV%ND>tu(DYvIIDUPXZ(kL&g*u3^TX z>rH>_`L*61h=Z_C&SG}h=~1BrjEXQX4vNf6xbUrjUF+R_m7{XRdRZ54$BF`J0F z8KT)@$e2|`UEY7Jpv^48Z;#@vAN*UVME5tZX*S|OfdxH|<%Fc9Xl&0d5Z%5V6A*eg z7FuEz6qM!AGpO^K`u)Bq`-y@jQOl(UB?jc47S36A29ijL6af7I4w0+9#OnE<)yt+> zw31uFY84pKx8@}X_rA9VW~KKKn>qRmt)6h;L5@~MWTliaw-?ZKjm#30NpFpAa?Y4* zjX5?XMZ#h8$am=~4res_o6Ou*ihs?b%M%=H5xWkJn5-$V<>%RvLF*G*D z+H4|%>SN`$a;rxf9UIM7C4S_EdmJNr2Vb8tl5(qaF>r?+n1>V58q03;$6bf{lGCt(nW z{xO$Nyy4Q0*T8=(bq4O}BF-W|%zLBZ15MO?O@@MtyViT~o8P#DB*dEZIvReE_eHP# z=mS>tW^`ty%oWvz6oas=SXi)(BzRkZ!ag3Fa)T9OQs}Pi6rb1&4k`R@L1Wv~m9x!2EdpGqHal*Z z#6*Om8`uZ!AH38m{uU-9zw3*s1Hx74CRk@ps-XVGYkFZ9ibraTuROZG0jFmZJ zx<-T1A$QdZ2czYS8LFEF6Ozeb?Hk32_8u1F>84x;IrNA>|PkPqFkNi_;@$% ze{>6<OVKRrPqSz~ z-THjH-V)l6n8V?)9(LZu(=T`BAhj#H`mJcWIew^RD*)NUF^@-281s;vr1q z)vFzo#lLS=ERaOPT^-T2NO%U0>0InIO{$eOb&9AwE(}8V#tp;d ztf1bD-Y3Ba_ZPi};j-Q2uiYpMC6G>&84~6-2eR6CYP*LsS&NYh^Q?6Zs(INs5-w_| z=2}Wf!^0EN1&Qq}2CQMqWSj-iZ)sZSP?!W-f|XVEL=kFV<1FGv2;Iyk%!0@sbogL& z@g4Fs#AGtP*^|ZQ3p43(IzM{x;@OKkq|JqwbFQ%=p8Ng#NEj?yU5I;CmzVqM(S!cV zqvBU!^L(TC$VHf~2#sM?A6ZsOm+^XL=fZkfhVbaC=g(ejM-n|#0~|W9@aVmqr;PZS zCR&81=goDM?!9oJWCmry0n^U*B=m9_6NG&a;e<`1V?mcV>*x+UkxoFvEi-`_Zo8pF zNj+G;)FI+txrVOAE&8171%XU?mC3qpUPEIME^R7AYnIbPwpw>)I@<#hg~cKN6Hb3PMhEvjuPK#burT|(o`b3_7FZ6$O;W8DGqfw2JL5}UeERp zxU1vxLe`|pXjrfejLf!9QDAc|7MXFR`B3Qhp7U6Uz5AZqWh8#lDi^UOp%vDXT*z)P zEOFilI3fj7T3n%YWy4usn*CxY_`BnMQoYoWjU*IjkNGbfn*W$K-fqbhsqV$;V8dgX z@(AyF;_cq!*_otZ^n|7bB)G=*{_6!YO^7rg4FZ|OL7j-48$HX^Z5%_2kHXn}tWNmz zhHZ%4-q(6x3?T$2@73S?D^J&-Z+-mH*+-;7RDe|f@$;AL{H8P^X(uz~NRlhSII_0X zuVXXJy=J>jVD7Tb^@ok#gTsRCvOOL#IMc4{JJ!Ua8R@M*dh|$>ET7-L64cQ3?<{-1 zy$M}Go=fHZb@I?!ftoRJ^$@EpIoHm+g~cjiczGc?W!O>Lh6N67>Le+jEvaMe^XlnZ zdFo#_=APJwfHpx~4&NU4)~^Jv0n@E6$HgN0yDB&d7|h>yP@T9924Q8=TW|KRNpS17 zb0G*R!AN3L{xe%P6x6Gs!ZZDuXo!esoIkdcK%jM3TJtw)qH)?uFGPK`=Tz|00#J*p z#5bnZjy#{?=2n|JNC2iZ{_MV+RO8PZT|xTFjn>Yd+GAxIG*j{ai7`f9vyyL#?uPA6~bYqqCb4B4=dwl(>zv8xYJ%8F?VY|Q8 z*DdAvvV`|?J6tDgid6Tj{f+*L>6BnjBCx3)oSGbSu*(t@`CA(Hm3oB=Jef9sZzlv(iLbu^a&G@>7M+gUjc-%8ChS zrD!Bd25N`<>fxd4rjL0~3b*#kD_z^Qp8oHzD686y-sbl1+KUHYu&L!?5hfsi{PL?; zJT98&a|DQ!Gkf)ztDgSIF1IsR)9Et78M)vI)jFG0g}A!v@?w9)=!dmxm#ZK8E4qy* zi8+^+8XOh){N?(_!(F%x=z)TdO%bzCbe7>cOknHpCPT`i`oa_pvWtYVuY9Li)du{tA zGomsUDLPl^`SS<6ubx6OPfz#Y6XY_z2fEZVW<|E5$Sb~dUcbnmoSu14I{kS5BD-;l z&y2;ZwmbU##aFg;Od|%--S=-etx&;t3dL|2H&I$x*ud7u|8{Hl!S)NC0DLtK0o$fC z5G(b?`X9g8{UcqDqO1e#b&eR10`ea^B3bdcT+G4JZSFBDg>4b6)b{#QlviFz=9LCu zRp!~l2Txgj>)`gYhjfz5i#VLwL)m<*w2-|j&Ms8ylp`@f?F!p#TTiyOU%Y$(&QFJv zgU-YjoUGCD%k|BVKPu>hpBT4o2MTqnfA!g?yI*Pg*}LyQ`?UYn*4nE_p~r#HXg!3E zyBlcSADCDt{WtU{?G$W$sDu62VQKmKN*PH^yb_lUl3nFZM+kf99AMEE_4~-=-omxTX9uj(WdVn>A4ouZUg~_1F zlGeF<#{9e9nuMdeIyBt%jI)Us64;E!Hg0`lp9y^ns_VsChJS;y;9%nT0isFyqM`7Y zeL2(mQ@i8d)D!LvVoy1sVAV4NVvI+9R3Bu+u>N@$EW@uIz?Zgv3_@@a2s|pZmisQ^ zq|8}@{UJ|YRSr)n>}k5QPou$B-l!ypXJ_Pw<)q~1nBY3BP2FMu`ntN-`3LWe>x_X6 z4#VWaZ=WzS7`&};-IrMN{zmVa#{)>IX(ujShF1oe)ddePz^Ozc)v%aa>BhWz9d;zt z$!e#LGT;rC@S=l_wPcZt_DvkQYAGA};48QR?kg~jP+=$Rm9qkValyx6ma;ITN?_q4 zK{?fnwJzbcE9G_B%W6d@yi%T}CJ{+-_6Zn){=@bOqgv7`%2Sr4kt>At+HbvQF2%4O zVQ~q;l#8X9e_k8cN5~|wv3Q|#Fm;Dk0ta8$2!l?hThsdBRRotVW@eks~ecNXof z!Ml6DBUI<7rHl}hNmq;+baxP2bJ2xX-MX-8u;XTSR~&U)f~I?xk*@P>O%1v&V0bx% zLqjhT$O^;AIXWi!!> z*l8)~xXz`=<8Y37F?u7i0P*)Mth_QxPLf8mgKDeKJz_dvxXUuO6E`XQfpCdoS&7T! z-C4W4i{NdA)#SQgZkCSNjT%ODPkM<6r{Wj-g{qePN`-@>J0QhtD56Hh+1j?!!VF|B z`Bj=f>QAiKsO0YySmE+uhlOp0bF2|s*QPzWeXwilG}+FzwYa{9k!!wfT^zkah>-^Wg{CP+){T^560iUSJ2X~Ao_g`ZU)#)ef?kX1Gj2)QbGWuaCGY^33=i10o; zHnz@5D2u2Lqs0+5PoP>Qufzx->jcpEcbqL4I9>W$v(YRJB;pF?=lQ%=J-nSc;t#p@ z`08z4T4zanjLFrkMvryg*jZz~C?(W0xJF}uhS%a!tbMsX7#@rFGt*w$^pIlZ?3mYQ zmDpSxAuWmxvzw}zX0al2j`{~RZJbT?aIRhYCFxoW zxTZ|!-wS)aZC4_SaQ2LPI)mhyb=X7LmWA~uH2_ES$r;0tgW zUvo0`;=!Ff7ZvmPvV=xp9o8u?6)C5ou!GiuSBDGW{)(z_W6YM%T*$=aG1B2>j_xw4 zw@g|8zPP#;D=mQ@#<$3DT=%nST6JUaA_qn?jl|&@+Zvk1C*}%Ph8pX54O1GkJ9NLIK-Uz%w(UaI!c>U7SAFd-7>3m!+X#guIBKKkmx z1`i4+*!XV{PvJM>R&R|cvl8bYb3nc|Gf7l{oe*HQ;=W?XpKjj1_3^D+P(7&|teSg9 z`fYNg`PqHAPR=8HU)3|x@7oH5vAtl1v_5&vj2q@DazL6x<#)5_dB#5*hByEz>K8zW z_5GDuFcWMVI@IrWH#%=B_^_$$J*%+7>fZWHbStd3*aX^O0blxbH zE1l@y^&ac8CBDD@7Gh)+Ll2^uI@`bNo5t^*x*r}&aXXa(^HMc5ZH_rGRRPZaDAH=E zDltCJzSJdl=2B>U&1Ig0)594z1@`ai%($;7U;kzQ==9H+EZ+Z>JLvXkYxCs!WNUWL z#f$B`5A)j0(2Ka^mHK8EB{#!c-10x6oiYdXR31c3BbPc>9jOb%BrY!y)7anPq_?qs zeOXy_I9_OJgGN5RjKTb1jp)EKfb;!ZP?BpMV|mKUWFTuC2C1xP%$Ukaiu%SkqkY$0 z2~*=$D`^+3Sd-E%Fg#&2C!ruXJA(SaPQJ^kaoCXR2*r&j_!GaZ?6*PRJ>jCSrT7cH z!jVyW2x_5c{$}%6{k#&-BLmJyH+#CiSn(U-TNdZ87PvXP!!509KgwQ!-_FxH?yWDTK`J3cUtZ~ zaB{7<&Ze4ijOv^nOr~>l5xAu7iN2BNVTtQLD}(QVEp;htv6KSKik**7h#JxrKVsWQ z7R#3!e(^44_yiIA)upQVc6ci6ieL_o5#tK^`@Xl6k!M7W>A~0i-p&>rAE}3SV8G+{ zSHBgS?YC3=qM<(YV8VFa)4C%YSoY1M(NHQR?yYqvSTQi)y!Q~ZZ}!RZ>8amt_P&`} zCE>xsIuEmKDY_i~Syh&{8jnpAn%y0_*svxyd%6t|?oigwo^8`q^)f@@YtwqJg<0+Q zis@w1QzDVI?afbr$EHG!ux}3(kL97u@$Rk1cU~iLoat8gHJqvz;KicI2nn$L| z65kjtu*c(x4CSS%w9%5FL$3|<1Vvr&K&fK!Q~^XZH3d`PF7JFXrN+rAf{xw7ERSoL zKQgiH%ENe<&Ap4;gAR6ANE&jsUNevduZ@)tzcKsX3ic>a>SAZ3Wd)%S2e|%^&^@t= z@S(cH)q=NsQiY`0lSBvCT2NdO0w$ASQaNYt7Zl`{&cX5MEv6F+fG)0`ES||Wox!9V z_58gVW`xTaXB>r94Tl=28XkKV4_Q4)os30?d%5B76v#+(q;K?7{AfS8L8oy91M^ zBU-VAVhn1ys&0?<%$oKgbzd(yl&T_rwspWt%K_5M)dUY-u5#_XSH2vDd2&EmdQDd# zN>jd|;M|l#jd51Qkub(4m9<^MuJ$gl)+TiAu!+I_J#p!LuRs;%cl@N`s~E%}S6P zkPKjE7+VRqO)eJ7T5+Rt$hFa+k?s#PXA>_h%c)dP?O`P~He=8mm8?t0nd0V|q7(u9 zb9gLwZZM7?8F%-`=V+eg`eE7WdQ9XSbW79n#f&5j9^RoS=bG#yP66HU2wv*m*596= zD1#ypQRXOKn4J;%7*s%RXO_bZv@}P@38w3{jc0#+^cAm9p>Dc!RO?{AcZmV^LoKvR z1d0E;DV9%E)?-GQM;XsGfJSF7GY6DKjuYr+RYd!$oauof9Ym)%x>)(9L{cwxr>fOf z)Yb zM>Vkx?4E(s9iH_SZ1FJ8W__?hnm4fvm8*xZ?q=48hsQgp6{)4IrHr%Ek6eos9m%fi|MSIVc|@6-{`8q$o~}jZiE*yD`zyJ@&rQwZ1jDbW#fXX=3)o*3P0_qaQ8R+T}mTd zBxk3SB`?tz4y$(%=!)Sg@cpqxg*0&N;iTtg$UNBzT06&R;yei&<9H20%{M-|zB0iE z$jBsr5m_tUn<7u!l%XBW9SMT+__Twh9LX(KHb8c?#%4=LKofPnNMI^sXk7&J3At!F zr!b6mvIU0Z-mVF4j^||3$cnCyodexNA&h5@g{ROaOgv}1rJ6h zg&o8k?K!zRkLq_i`ASaZJinT{c8oTMwU)+CCS#7SR_yYky2AJh5L?AM5E%l}9ZS_1 zc(k(=tzaxq33jQ*Ev^{%o43aj&pOX-qc>wy(eooF4Z>-(J>y7hlbQb5_{hr&IJZxU z_ehm#Rn&g%*;QCXPZQJ)-?$G;#}AG!J)cPJfLa?%x9AWgB>%GO&#_TD?TB}M3xZM) zOQ|4Jo|h#UoBBuOe(Cu$E^s=ozUE7rG4c36+$TDs_il7}DsTFE7SrA&0tu9@s`Hz3 zypz2*R4f`CEg;@Jiovoh;buALB~^EM675d^`d)cxq}~jhahY{{>7S5X?l;+!8}fw4jAclfx>J>d?&{t9m@NXYzJq7l6)zH7Zp34 zFKrz)kjxW^&KUpTx`0P&mS(D^i540k5mTqrfK#hEOcT0OjM7+Q8D2$MqE)p#HRNof z#f=i2o(KFSdn4LhIJHHWxgUcCQy%fJ^rz z_nCr8&QFCyaE0}?o^PAN4mlGPPdWcQOxO#xB8A}qZ#KZ36@Y0F*=QcW6{69Gl7c7J zF&uNqO|7A?s1+(?jS4z4NF(3&-Cg{gQvXA3aAM0_yenK{@>cW}So|R6N@gPSP_j$p zoT7aMU9sCUt7FNi~GXp(X!IkPMfQpu=NE6Tj*yM5AQb_6Qo5#-V# zVqtw^{K;$i6*I$q-A`NI`*aN7q7T5S8_Hu2A+8 z626ruJ#jU94@Sn$QYZQ46^w#fo*zpYR>VRX8MFd&Wj5LjpqyN2(@bIsB~q{Jqohn^ zzg>UWe7EztyeW!|rhttrZ2@OQt0f7@4qu<$Q3^Rz1Ukvo5N7H@ovNnIyG3QDKEW7o zE;d93H=ljJzP;r*$;~%}qQbN3*{6vpI#z{Cc_O1&ArTjf$`NWi~qEL2+eR($j|+WX{GGvI|$j zJ9A;so9s@*g4a)t_caJvt~At=#(I@^H7KQPJ!#n8fum+`lD@uqpjX?$&&e>hGOyX1 z`0rA$@(~VNW@zsR1vWnri|Oh-HH$!?dX)b{H3%Y3re_}q9G^VKb;P0hHf?a zT;j(r+Zcjya&kb<)ryjNQDcny{yi$xkAi{Y4XM#`u{0%<9;^bhYmTaKwUd!@VM!4# z_=EB!onE!eUAyRHKwX7uSB7tiT|PhVR$ZOPy*Lx~mu^AX$SKncdx{2}seNzuM5yMu z6{pPFpqv+UAi^#evM`rH&^ym|pOXOAEr0?AG}b-3*a$Z6X0Gkn61mczqoZoln)-7 zaVf{5Qmbrj$N3>}-CPKACbV~(if+}A$wX(!@7buuhoC8BIu66`VsJF#&-8T)ReY4t zrg>|}{?fUu3W|mog6ao)>#ebD3;G)FC1$&JpDwD^56^9*R1YgjSXTHYZ?^x$i{gry z_M)PqVCz(`(NCz$3pI{)xp_551CV_76~y_H$zrCghS6kcdE4KXZCq*ct70u3hm-3T zm`2}`C{))Dp|FDIx_2vE7YzEw<};T9PP_TH!Yk2`*dU9C#admhT%@lF3R(3qbxP5t zrWvI~R8F7Y=>NKV%WK@dyr@%TXXl!B7J*(c^V#Zx>gF^GnDjo~%=z{QpMT!|ttpq9 zUopYjHKnFrnCaE7Y%P!Ldu)urXG`0EVngmX^=n7WQoHfF<#^)8H$UJKgiA(_OLp?* z3uhu9JzmF@L8_HhjXUl@;z6#*zsLzT<-AV5n11`RBwGb=F8S7$?V zCcCL!>QGCDT$RI6?HAns?4st=14NhV{@3~ITrKULxPXIOi7jHFHBt5ZM==4wsUB-V z>pZ6OZy|*4+aT4&TwQb-#V=^?W%$gCl@f1k$Im>7C?#=u{$(SD3E|uC$q0jj=du!c zaG4@Fkf#|u2s8Ls+^^Md&fIg5{rLm&o314FW3ZAx>oam~d-L{fYBt=Bo_y4LqPdO1 zMdzE+mSC;2O1Rnp+jtF9N~VUoi^4PjV6Ji_Jp2w4*MERjlzhNaORQHG9VfU9^_K_^ zH2~=`$6%J4w7VxwmWl7CK9BEl_*IuT6ekV2Tqo7B>gC7iP4j{z(s**!ztdkJH&s?k zl1Glyyv)F?G%QNU&{={rDJv;=LF#uxtW5L6ZI}f`Z2omo@&IUp>X$_E51!)l* zLl&xzncn&26ib8t_mknf;n=AY3+1<$Jow_#gD2RH;Hvj^qX!a?*ymt6dZpZ>uhzG( zQ0(!`4Kmq1PyIx}lHV&9zRw9Yc-p|+8r7pMbhmnR$+1jZ9wk)?yIJzA0M^(!c=gs=}1`y zN`SVbsT8On0o9y$AsK$rjttUGq!nuE@5Gt2z?Rw^J)fU0ge{Ggg}&i0L+&B04-YNr z1`)Y#_GEsRf=bd@@B8ZVk>_V87Id(_KX~Pfcn1;mn48lMC;g9Zest^Rzumg#!PtYR zlegpj!RJJ254KMzHhW8UN-z3{x5u-aCueW3J%6@6a7`*6i4QSX-m%2ugWI{Z zef!SGAOD6#ct;W>yHm_A~)Wr>haqd%KgFiXh=-P<1xYDT&i=IY;y)pO;34+ zPw^k5`k&l%q5y}0Mc{bEB_B^oJ=9Fh?VGo*J#YoqVB0i?Q~V)*OCHzp@$Z%S6<6lz zJuaRYeAbjxV;HUmkHr7526y_OA>&_ren_tP!@*-ZjSPE?K7pT;dmsIt%o+N6Z{=9* z;O!f~zxLJO`3a7L(?JfXjHP+?K-$7HBB~#+Z*Ht@K5X7>nU?;6ckWJqHhn|yz8XZ@ zQqAa-&*kpYzkT!e?VBH6>-}OIP`VljZG>-ZgsWd1oY4Ep_4(-+(!XS zFzUP6$Xf!TLVf4?#RcwaY8G$!ci)Z<8TRb(;9xuy_xE*= z1cjt1oSa~qsbkuokEgR4!fWSs>+#ljjDc{N`SFLz!G$e^KiD{VcW|QljrmII~J$ zV7Y>+nx0JIx@NL|PA}el`{NH&QK-uN(#RCz^BpP(dEq6CeuK*R+TH7u`@-P0vjfegjBjiKm9jOkDD?1Fz8JvxooF2Ks`M#a`Ww@) z%`+L2a8>K@Xxu+%%^1j!f4lHeoemF&v#HD%qv?tDy=*9k)i1y~IU08)84;{g4=;{~ zL*=BFT4+mtpxFahX*4iCm4i^f)gx!UweMb)h>O5ukRM-YQy93mVH;`qlO zaAjwg|8OqXf!yZ$ZnHuxQDVpR;({y?!d}CW?LZoB(ghR!j>RFk9V{Gzjfb;?nJtNi z1Pa~MStZpb-v^#xdqBjGwhUJqv$3@^i47+pNEzYA{gn&Rv13pUVS5%ixp_alA&8$_ zitfJ$!jswg@ZjX^+aY9?ZG-fAPB%0o2VzIO&alfGYY`Y6nW5s76K5W8z3;WyJpI@X z3j5>)Hpf3tXPhhJ>H&{8#_|~HZx1K%g4cRc68rSKeKy=!N5|t9}>OjxNLc`Y(gS(f5PbqrZ})?{se!TNDl&1uR=>@U*{k_vmaq zm>dw`F&)GIM4Q%=@~hoT710y1dgV=YeM7-THr$)tVU(iL!~!5TO-w-Z=}g78GY8H4 zd4_$anhuj&P+;Ny;9xeL%p7S)W3p{R z85|IrUC+fn@V8_akn}seZ?Av+KZig+ACKbcF}jbG=xPY^rW&9kEI>*xUs3m9IA(SW z-=~Z#4Kt^k6SFJE%Z%S#45TR|FwQ<(9K1!2IA%h!6z0hz2{%I+JA~6QYGC9``g<@V zBlpI}z}?$|;v+fntr|COosz)YbNj@)D#6KzsksuX^5YMXd|X6nt~KF(cr1GgOK9{q zhjM(vt#PK?&Iz9QEB@cq(a15x1xhpSV#bFLDRZRN^Hxy^^eQ;+thQi!HMb;tBL_Qt z9p@&5VIhD8BV9O7j<`#P$`QC^tl|E!x&CzByS*Vksh?DNbU4+emSF11WY~<11sUKi zrc7^UOdPnJKh8&#mRSX!jm260uTKVj#0UTWJ15|Fm{}hN0}1mAFY0~( zjDXK-^62K2Chw}v24$XsGN@S$bV!KE&kq3uNG`-f zyB?XI9Ukh}{r)r2Wt&e|OiJGN1=D-J<#>pPLY3?B9-NvmW*X6xlQYSRhunc{1m0e> ztC+9I-F>UCRaw&F+r7QIwTl6%E9%wL_st-a=;xqlM!xwwnVm>;IvlR{A!R&3<2RZq z$rn{*%$4QlF60~@?Oh)B{aSmfgXP`yWW+y{zjdCL@(E@s=dd+9{FV!;INHjI6dZ)H z7GeMjjAgvTBF@1V1Rbc|8JsXI7S0efaMKa1HJrq#kQh1Cg~ZN}M^_X=%O$urEnt)H zn5_$3qc1K{{1hHU_%Il_$whavNA(4#tQJVPX_H)-G!Fm7!1UWPmOZ!Y5xm3R#aqm# zs$V`Evy=W)7?$tE+uU)kX)svMXOJ~n+L{k>83tkri%}Sin}iVUP0z`k)kTxt%(Tee5Y{G!MTW=ES&%i_49LCihKP3`G3+BNUNie}X3Y z?ROtz8Up43_4e6oqSK#r?VM+~8re zq2B?-qH{~N_Lp2{_87vptE=By{sqheAVeMX#p&6>XgzTkP!SWq_ChLP7fhqblJ2+kj+?#x_6;*OFcR7Ro5%c8tCTDj9&! z0UT#_jI{kHkL)P^-lu5^bGK*{CVLkE2%X9GwseFGI2f&+w3Z_Tiv>sRf7TEd>|?4| zyEsQ*OL({XE5C;Mmf82$H~Re^BfiZeoPZ_Ln`aw8 z{($k(ay76uS~ab$s9K7tw)zmy@lE3i>K-#;v_Y57o679^uThufzrnxqm7|BH#8jsEet)HM?iwG%v5}!1 zzh6t%66qjkT3#Uc5Rd*qGYSV`(TlZoCkXA1)2jU$;ul<@4+MgsMbw>uCW80>|3)MYX zP`lNG#kDWt4HmKmYB3Ihd10*4BjM$g+@fm{g_Tu8XLe7Huh8e7Klq{zq#D0WB8Z8a*1q0y!0&lBafpi!4cF@4(cDXxGZbrk1r=oggBSn6!p zS#HA!(|~Xb8od=;U>90svpN5Z+=;*ec15X!0-UzL1Pob0I^Eww<2&wO@b9x*#JJ;Z zhF)`YPL@UOD_1p8`|mn)XngUE=NOJ_*0P%I4i05;Mae1cb4T!~P|1W;T`7*CM}al{ zyQEzmh$=f?J;QW4nXSUSh|y^?=knaZH4wcsz5z`=b?X^Z82sfzxF+hi)icXLeGVwU zx_r<|pL-W_dq5{!n={D+?}P`dW_Fj_<37FX-VJH(N@} zxu}n!Pj#1%Zs&Z~q4kxc0riNRrf66ZS&X0kEW=grcDSMTa$T!uez zB#IW&__Vl-p?MBKUZ&OSxgVFcp}`<1$^%wZCI)mBsQtO6Dx;fEj-|cMj!wQYlI)R3EL`n^HF4p4k5DM#cuzcoV$tpiUn}*E9sWMs&4du|0scIZzA6F+1 z39F${A~*}&(Jg|#ClKtu?#sCDfxSd8qBG>7xOH04Sh$e@#ew}|S(+Y@@aG@cJ|Ufh)&48~mlsvl z8%XR}EL*={&4n{WvKpvYO`n2O8hGD~i~q~L?|<|C;IF>oSDBz!cpB^v`|6OoqAmsR z7SvKxEobr?WV1}sHC$hU$p1YZ_!$i|^uM#=D~*`N*gLm?0vB*=tw>*{e1O#o--U`AGD@0m3x(V>y|7DOrD5NS){d4~`xwe2 zXJPTdY+m`yKsfMVvi;=dsy0`?h~=+kg`gRZLTT_+M3oGlg+;;lC7U2gD&g%pw*FlV zMDK?8@7+c3I=;WN8pHcqsz(fm3EoTD>^Y&c;t5lUA`+sx8BO|sp&6onzgM7^{)(%* z(rRJ3O!Mdi@?WK86f%p~&w(tjj=V_H@~ z2bA2Ba94LJ(*~|H%Nb#!le891&#?naw@G(8%i4B%iX~4jL}*QLG#JS#QK3l#tr8;b z1d{;SyfwZKEY4WAF?`+GNDo%~-nX(6OTK)2GQ~_UcQ$kIB_^=J+)0DE6P$DKsytu}xfzBy}CjTgp;#wm*pwF}Vx~hZMwW9buCTB9YH~qpgp-eY+~eqIKQ+ zxPUd;*s)@6?lznGYK^jZH&;_>v)G23vTPAf3XoX3?l{`NyCQKi+G2jK;Q|gkyAs6y z2RmNLW8K;Cb$Ie~r=&<)i|1O>)8c`Bu+LoysoQb*#I6kWGh4FRX-QA*wh*y?CS;d+ z79dKX1oGC;giIRjv{U1FghKaj*r?c&P&adEcQZB2apPbqQ=+UL65U-@+Eh#|SJDO@ z7?_9OcdhYHr5rZSJ~W(AEW&$5i^W}=w}Xq#j8H^s$eje};ue6~9w8qrf`TwMBgE6> z$?VgqvWqPFEa}tf1vi}Ih(_)JI;PYC2@HRwrQntTliSwm3voZgdjjN zyo+X{0I`{#UNQ#&C--L=PHPehl+GLw%k>YK1d?n{F7Ql+{}ESnf9K9!w`JY``YLl; zI>-3YiJW~)oE6zIa3#=O8N~k1zrb6WAwOZd?dY3GlMWUj5G(3Nitq^To;+?Kit)Zs`)cPs6H>0$t)9U+8r2PgSwYmCjRplm4RL|pPIb3x{TY6{G5HN^@c3mON~J9tfwGczrB z?Sc0iyPh@jA$wp`e2}I=P1c+}umg9IJ#Y!A#%$Mt5tHD%15Yq;*)4w^vt3G?i_Lfc zcw5`NB@02T7+8_}TwL>KscR{+vzxMXAL~EEl!b{*{+SNCYtU+|VOtcz8CjAA{dbwN zpecpS7_(&jXt&3G^7CBPs5563Yp+T=)h)G(b!|A^>MbKo%vY+Wa`W0Cex?m)@beY= zP}_fqP9NP+B7!#g-=o$)Bu!NvaSON)`bf%gxJBuWhh0eN|9?oWnIRPRNz4`=Vq2D9 ziEAOWDbP0L*^w!}Tk!i?crI z4q!6vvt<@hTy&wyA%f}fk&A{${W_pZk07EX+ay;=7V&ChNFEnk@x(fsH6Ik5N<%tO zJ(7!ZRh>i*=WXiNF>ax93{@EPtI%0@j8JcZfKc>~xS>7oeRGx{DQJgL6SV{GS!hyr zMT1w6&)|$W_V@RmtZi!xCSO5*+o^)IUiLPp*m+gLUMZ&c5SbXBRUhgSB;IK148CDTvk z3ZR~!3Q*i1x2OZLobV-6k5QEUx;Tw4gKE>alOoaArH?r*W8Sl}DHn@>f;#oyW`&@F zQqk8et2-M_KQc>>)RQd;+_+{2;S8DZ`pvw0^sA{oe3mh(qmvMH($r<;{AEG~E)9Z2+`^fOhmCgS8r`_^Uh%juf=3J3U&pT=$T^t8aFc>*|_CSpUWUsg4LcX49uhu z9uk7bj(i;>G+-6H6>XY2JZkLiwa>R)`C!}T%bmlG@$mHQ=*{EF$%`o$ zAP=P!qSIK#-t62v8-6Dj=hb_X8c9CxKa>)0^`2*`UcGlZdo3%_geRoxe5)_GDW6f| zjglWvRsoowc;s#Xr>pniX;<%|&{@6rBB}yS?#1m|Bplrvk(Ecy`uA)+etE-}3g$WI zE;`4u<;=u-+1XHzr0jIFUU`lv6Qmuj^`6+a#U|I)(HI3)o@-6zO!K6z87?}4)7hwJ zg5sI3oA&vZ-JkP%L+wVo!9syzBrodDRNxX!)tRe7{6oWowEAUXYE`I5DF&KK=RY`C zPv(w-W$Cnyuxj_%drzKiK3Wc|)qgP#Dy}L0R)FF#x!0tS2}rrbf#QvOC@a!eX@Phu5VEIc zDCZzFDEFQ{-)np#oN zD8-VTNEt4@s4`!YMw5fHKiDc~mYA@?x)y-c(}&nf?|rfME5{ZNm2KkR2n3o#)}NjwT!I6%zFq+; z#SUkCHygLUm%vHsOtl&~g)y?=WB+9{kvSq+&Wl6T^67O&6qIno`5B7J+n%}X}Cn*Od zdG6-e#kiLUEs0`5dj)nlF5yLWZ)<)1#fxWK(cL5)l3Dxt%7p_0VPXp+S}Q}Ft==Hq z=^6(%Etq=i{*?DN9=&?>rvzV^ka+5zCL(d>$0LGbUkW=Q546F4>Gzz_pR-((C4_%i z|3>(aO)hg2XJEM5sh7TF_a1G(+*nVHGJrV?<&EFqrLa5!Ajb}tN}GeKqqv4{m5v5B zn8x+q_S#kvm0fe`#9hhf-eq!drt}r5Wfqg%RBRyW4Kgb2XT_5h&C~pd`_G9vC+vbILT^x5Z!SHU;u>Wh<;qFN5?pHI z>Gt>(cPe9neomhWvghNXlo9KlLIVJVyoS?)GpNX3MDT2r`FlIzHb@emenJ# z_t=i-pVHXUN*`+N0O~NsQBf)Z4n|QgauXiOjgC-WGU0Yci$M%W>dR(d>*4Xm8wbRj z`^0W>BjE@=tzt8Bu8l7`MsX>}_k)8U|JMHlTiYVqJ#wA=&a9k8|L9v7fICs(YL1UL z^YF{v2anfw|NYnZZ@2$6D`H0TVu{76y$Xc4C#*c%l6pw zqgZHl`?o^ZE!I5$E@`A+K8CfiI?6-`P}tg6F{eI>f3g6T`c?*8hzPUSiqfhttwroV zu`4?)XZU!sJDDEAto@fchzNO9UaQwhO;CE&`Vx5zE-m{L%DfP}FRdAug_6*}Jv-hl zE8=+&p+fBv(eo#`TyP^@v}kLgoXcagIG6J)6IaMOfv;<;NeI)dE8)zM=5cmVSG2X(jKVc#tdI^U*lY z{FVc+f!p_wW7<|HJGGIChB1gaj4Dd5dedmRJ>b{t6IghLs)7BTpl(_^p#FRw)r4zE z1wxTWiRfd~X*Po@=jf%SyQP}?IYRxNFGXe!-6F9;NbkWIQZy^sP?+zew073vPa`gX zNqWoDA1j}Q=B6sPfRgyGe1*SLTwl{97t-}b)Fm zXlVHLE^((Dlz}!Uaqul5Lkp&j!sMb-ScI`Q)f&Y$QVZ&c64jMB6d-QJ!WJFut`At$ zuJ*{KSwG3#j3rj)AXsp5l`chxAa3Sm-@7c@2WmSrB@gJ!;E3x5R#NYNIaBzy;3Jy< zThV_ZLYH!O=q%M=jnAetrHiudHxj_dq)O7c?@ulR^TEmjXH4G{VS_GrurKg=Wb(=D z9F}!b(4$xCQhe3f0FVR*Ih=(w zLVaKx&JC-OG;{8A_A{Au6rJRO*WoFJ%_(}+lXvo3*QEZ`lBltXy1f+G6^eXdYJ8U` z4_zi~;TH}VpUA5fF9+JC#k~VNgRegRDAmZg7Iyt0`k#J6z7kUi!NIvrUs3l=t5wC9 z!fFrt?=Cn94ki~Dcvx7hWvPjlJl$2JUQ}YRi<+eV(k9<#UsW{=igiB48b9V7Ha8q= z=3!HmvLIfQ@*mkevWcMh<&1^1o^j!%m4W|+o0NZNhDX#V0n%P|3j6D5! zYToVZ0f}T`5iSg6y{fT`7WHQ=)z0Rb|7c@DXWK5iCNS6_hk7L-g$h~Kymmx)g=n8| zbgv7!V%G}P9KjW#KVLYBEQJZ zxZAD5ct1fb;ALv$;nGcU@Z!3ReVCf|W#?6^rs;`k=-eb>7v5|MhOJ_rqqi{}txRz^ z2=R9ZT!UW{Yx1@3jNq;ga@uHjy>7u!&iN}qAVN_1yfRS&RCKq;{hjgGc9!q#wcz;- z5z5g7>1Kjnh3lE^0x!mWpRhNrx_F?YDks+eP*(jiMaZdIA|uW_C#@P3Q%Xyw3SMgl zv6om2Sx~?wR0Ga1s(Eb53~iEWe$u-xlwUiO7F7C|YgYLNG@9oA%K6#!Cb!m*eeShS z0{1(X4>ZBE>6-y0nM6DrA~I5H>!J-kzBu5lW*o|d!Z;-69-TV3zjNM#nhC+Qimluf z14~-pS;lAqL{<6fIOD2af`bdc>gX%|k(JvSHuy1c1sJ``K?uVFuwQ`_o{K*AL0G!X z@Gtd(c8Lr7EJouY0Ti|M=bdW#QMUN?2j9pFmIoo(6?e5x2Hs-LN=fY{O8mpRYK zZ^{1WL-ki?J42|L-Bv#mvX7=^Q)M)gRKRvTnqsllZX?w)>VeyIgn)iRR0yNO?`wo* zofO_tkFd2$@Q|3O#f^q>NDRvg{48k?BW>o&cIe+G&ImSn5uLp*z)y}f#|s`VQUz%9 zblHlmY+w|#CI>ZirbT0;i<=|ir!fXMq`m8{bW$=7Z)gl^pnvb4IH=Q^Mq>}|m*01< z@87>mu12o^ie#dxv0_eoL?02xc^O3of?d! zKqpf8%K_H3{63r#bSAP)`f(E6OvaKqvraqsroTCwen}~mH(awy7-jz{muK@wK_gu2 zp=}T;Ta@~3h|_Lhhjd}(ay4xra-N}fWS(4OCT>~1JG_vd4KS#xpRPSv-+cUxtYeBh z2eW0JI6gC#DbNl`NvIWW7e;*Cl~Y3dDf4?awdWO>>-&bBHwDso#HvlZ{JSbE)yJ|X zxtM+b~r2|$C!liyuzF=ndGY!4WiYYmjpvh)VCvf93+W3({tE8-CFjm!1tE?TY zX0frYjBhZ``&z!bv^yyqCQYk8l^pP(-cBwP-YA(nieJd^CYceX z2D0hF8r`~LN4?w_{wKG~IM2Y1t2}W{eNmS}pZnLZn-8Yl;jO#xpcRhs8yOdoY+SHT z=r_@=to^tAr~5dAq-Z|PKaX}(YDkO+46O$7OBeOXjow(klE#U)C0TJbzZu5?hnt3F zdaYd7vr-tA!)F~<*+9y((JtGr*r7GM!>j0tB@4^}))?t~`b92iuaGIf^tWlwvTJ^* zxpdwS7ko8mX(l7D&)c(;*{Q+E;aPJbUaPe7)F%)!_K>Vi#apHQz*p=Gf)w6Rs-~fK z-2SPyVBJ)hm8)HkZ9hKt=+eMukKlW5KN-gy+& zo9Ic_=QM2shQlz*eAI&q8zo%2k{%5nYF4;fvOTURp<0SD$>8aoa(>1&7RM@-Zk@j7 zp1pFQ4217S?|+iJ(<`&?M>|VBolHitgozdhEH5omM*S4Gsw=kB@O0jq2MH@t%yhK> z-_T%x@ZAoZaZz}NjEB~Pe|(IFq4m!T)bOf*f3!xTvU$0Dv>?wxVL+v~;N*P1u}#ME z|KtXZ7Dtv|TVe<$T={~EJZ=4H>&3Ijk251!o?Wozh;oQu#?M*IccW>OJ~g&wmY4WO z^RJXUM5?yJw9cKtDpV|^eDeKZ|9dtayUv3f|MJ=Qw{Lxa`%^%~Cuh~ALAcuk_^HD&DGl*a z#|KW|O<&PTdI~j2B1H`?*hc zw*duzX9`ABZvXnhv!}n-F%ucMqJD|iXfhMT8#haKBpD0KoGL1|`OG=xl~-`>&B54c zawO0f!7Q8~qt3!`6ML7#J8s3CuzuxIxP@Uet-8TM$*aU}f&&$|-=X&9((#ky2}+^S z9pT2M`661=qI0_?=_oaaP0!`oAv!?VMD0uc3Y2X-6-ao`C7=lIbw)zidZssbRyCph z&5ftQRN7lDzlJ6562}cP-6@fxU#40@tn>70U9;Ad(l=BP%sm=gPq%I-yXb0J?&?df zmWjxAZ+47PIS(vBx>E8=0xp6oU0jYy0(~WHvIF`uU)sV!E@Z zaagRTB))EqbTPN>^ISV_BGBEROou%Bjbs}AcmoU%TQ^BUQG*FDDRqL7MAVlf;4yk@ zspZ*X&2end#8JM6`Iy|>af;Tct4%;w{{DX{I$?t%aGNhT1{TDC0!nH$VN%JRnBA%W zwiI%uDRqVc5C zf417ceaoow?N8O!+C{AHCEwSKad#7pi%8zK#r$jIp%>%!h3PtObl88b_O2_t&-_tgjbA+z)LN77TIawjd79rBiYc;P64)=(tJ2_JR+;;nZ_F#L%$RqpT-{cT_D2HA$T{E6M zF8pTG{n6?0tzwDq)j7ExhWY0x&7NrxQCN$%AMKIzPf?IbnvD4PVX+6-bhwMCJS%}x z^eq=!8XoO~R&6Gva9h4WwzJ-&64w1N_wJ%u_OIHV-Y>uB*0mPd3w6zO|K?rl?}~m; zQ`V$l(mhhd=#-p5B-@99Mx!r!27bP1(oYyXV zj}=Hhht3O-`Q`RwHhPZN=Sr7^&W;^K7oC?O^UKHEz^RehuSR@N`q#J9cP%`~8TXA~ zZh}Hbi~%sncBz-9)^r(A=jrGS4`zhH3L!K2NWp}#)XG013&^oWF*GNb1Q$pvIcR|GL`H(763py;gcJ&As72 zlUENs@ZZS+`>chsrq?GPjg28VriM z7eg^SJsyCs-}WEiI%$!z1hB zl9;bOovOpHlw8uOf}0&zg}NBV{) z#4~-vs3h%z_dqeyGK}uqjZpS1AsPQW#G-?A!aB941z-4x|PFS-B6avGg2b17ZzMPbTB{{087NStL!j!Ec8pe73YK zIvvlBn@K2gjLm|~@DSW)YE^G>M0}2^wRxdZW~xnUrTu_2gi_$Aq=*tImZUwQ{>zNk z9zhdwi#aaEs>V5pc^n*5DJ2TY+*u0}XQ>Q@`~*phzDFNhDy=2LKt&SPGy#^BCOCu29}SH_AoVxTF!T^ukA10Zv+D%ce#mZ;2EURYEXk84Dj=GTJ%M3&v$m z_6*_6xx2+=x66AcvI7cK4`sI6J!dY%QO!D;)b*!u*&d+_!`N0w7`#n$&+9PSYFI}# zr|803Q7QIIVv}n92eteH%plfxZ8sTj_EZyt7lp}TemdAo)vI!I&Q)yHtM{lXHf-R% z%h|vOQimF&NHsn>xkec8_TYj~;P+xe>FG0%{V|WS!i3tQDxf$=OM(g_8H=aKg$dfO ziSnbo%R#Ki5xfY!9c4n*%u<`eXpbx*PWXHVI! zHW1C6^O`kun-}{pvTg#c#fDuKbRg}*{J43mG#VFFO8D8t1)Ok$@UBAP8sIx~z3h6)A}e$u)zu za@#J_Ww({s+4et!6wmdtUi?mv8;!fzq=m=GW#Br{mXF_bFnP69-JizpooBN#TvC;! zrmfsL>h*k6byRGP3BqjsqxbAZM;K5gJnHVpeq1Os1Rl$1?mj}=+kU2@=B_mp-izl$ zun@#;`$}5hb>(O#mTKicc6F1fawps#FoIAzqh(H*mgUC<(AHGQ9pUv*fpg@6YfqhL z(kQfEoR;-KI$|!=?z&{Caw1;dx1Cj_*l98dnSm@-!71%@t903ms&CoK2hn>$oi5XH z?I)q-l`(R0?|)*)vv{Y^>hg2>uNy(B{dz>F^gFy~di@<-DA%@kEz94omKg_QWw4zQ zZie3L`hI4ZaJN0(B@ggK5Gk;F;lvC6=%+dI3XK)c=C;(KJOIt!B8-#%K2CDDs0^l5 zRBJCSFH&R4i@zIIYK9p+Oa!lljW_h~PM_!IP&-!>$>QDggaquwd~#H22+jb(YT;?o zv-{dl$9Hfb#`{pBGB(dU*VQYXoC;jECw+T#t@le!$5hkPyFU2%ckGMnw{PQ7fBl!Y zsd8=6Lr+|REB2lK&DU@GMBG5%6%+x{$2 zpXHzan`^Z5BwC!{a(jJ`b(!eAgPW7H2jT#?94ei!01?~EKYfFrrzf6^n>@x8_HU5MAhVKUy;CEY*UIu6^9m}ba{8?x*O(>pe#mlJvE<|a1d!1amL0L6#P>bVqj zfd9#BMSgT9O#9vruS~=fhH*i$yKr zu&ZnCDdCRcFw zFAQ>=UBX~qaF1$IDJWXqG-n~?*TXT1SC4Vv(PJb^j|YWhlPkOhPFQu*n!^y1m+b7-y1$|-3;N`s=DRu>5lF<`!Ed&R z^yPHs=a=nF#3dvUiw$Q`VG@L2jm;$|@{;-)&>KWSEDwAL(JQ!y^1t%EDGiiG9ObCKgq{YB<;Ac^XdPt=^mIAuiZ@&x2TP#OEznP?lG{PVaB2Tz1CbEYtghL$ z_Dbn0OdCal>^DbvjK$x-(e-KrOGee2Qmgz12c3g>Y1|!nCkC;e`?AMcbR_P?GEe)$ z>bYkG9@VD?{i+q%w0j5hHEMO+{M(XkY5o-&f)Vlfmi?lU!!PUHWi^`Ki7sV8C)fdR zAytcqq#EI{Lz%PFxNDW=TH@rE8|`I+HXLCv_|i79K`vx6&&S2d#)kDQK2 zvD{rc(1N!L;-7Dn`DLc?JH=LooZ$JXH18%->F|nLMi3!mzD}{0B5R!SQ6xbLt&9n> zED54aQ9R12%JkwL9cuy0?#Z5u$LIk!oJcjr>gn`Qu9Oh-vK% zQ1I#CLN4c)OAE}G)-d~Pk@ONyN_bHo;nU_|t)-(RO~-b6`eETn(qUuD&u@pAr<9f2 zE{nuQhlHb}z_|{y^NaOVzhIV_ZNtP4%md>`D*o4o%RWJks%m}D7mD|oN)o*`G1OP? znBZab^-)&`sq_I73Qh91FUGyVFUUpU%%nE;M3v1}C8ohNlFoaKJ7p|ZJCI9SF*R?tN}d%jDQ z+b)-49*+0M(_KVNrjE>V%5P}xXrXRo**&_jiwn~H`|WBO>~wRRh zDFpX`_-L?SA}Nj-Z1E{(7MZ)rqVEay`O!&~zqArce5J!*TJMu=^^>YApUr)TzXkc& z$_#Vg-YOG7laTXT&+A~g!BdqaZ=gE9a$C=@^_0=-fJym(x;xwEsE+K8-`DyScPpV* ztdW*AyN-h$Zv+S|0}>?-GL(x_#%O>+gGSMeFsdY9BUO3t&%hV(7t8N|&gs70cV>9l zr1BzLwMKLMx%>2aKBqyvc--*dx#f>S&*C`Wq?JJWnJH1LCFK(|ZLp2sq74-+ivmcl z`HoLdD_nmx;X+&q*q znv3v?cZ0Zq2h+D`l$BF3{Y4p^DsCu=o~<=ob7ISWmQvgKQPxa@0aygG4^hBhPV~Ro zI=je!kH#C~-9Wl9qD~q_Hh5e3qVxQmjL97#wWIr2HuA`Jy?UB>is`Ts52ZfL3h-B! zHIk=(!5X6Km#-i@Zkho@r43zUd+JsYT;!iYHT%`JBs z7Dh}02M2(T^^p6|mmx0$XP!#f0%D0Yj5giqT7hMqy%9Kdc(%aEYt8L1zSsy+N(q-U zSDz@a2VSWN0eAAX9zzHz zs@Z1a7G}k7l?pb~WdY^*v@Xcw>oXi6?xWO!Oh8yY$sPxQfxo%Ex4+%4D;?gPchXQ? zUTyAIw1^|=s93ST#Yw^cK?{W_r6@MocLksPRulAv{umHA=3drg2rm8zFS+bHAGbpb zr)*2@rk)~Bplup4wN7<_Vq>QO5RlbGNy!bIp-23bG|)T@CQC=noGWhI?G6uiZtZXF zKTYq*?ruHY#+^l^b(+Qj_&D0A3<9Af79iUN?4J4QC`7ha5vmq=i_}s{ z8VlP|Fbi-I>}zb*oKP#ttZ$xAxoe}zi;d&So+`6ScWLJ-a*~za+2Qm)D7pxqChuwFlD|bDk|5wRfjvbiws{iX@Cz5j(uk zKH;oot{aYLSEEhUwR@rMOzGIo6`bI7kkr+{6W|N&i*togg$y7`R1uKoE4|tNP$n}r zR@wcMb&?4Npb-iJQUH))^3ARNhnx634u2LqXyd_snQwD>mCbPKfP_+-PRvymB4kou z5+S)q2~{hpAz0F9>}gisQhhp>WSuBm0zQMhR0y1O7u!m9NhxNKXo{r-xng*< z%sV^Vt8kO>qn16n#LI@gH#bT(oA6E#$;&d@2k}~F0DAL;!W$-$R5u|Q3%83hqm^}8Nm=j5qq}?i506BJzD`8J z`385l(!;9L7w!553gDNgqho;W^ySs|cLYQ+O0a&}pLFA1#{@c<4v_Tklcq&qW z3#m!+^Qqt|6EJ|~T7V51rJVA`Ri&CqFeJ5e>zqT^C9H`hRW-GX-Re&pr4adKwF|V6 zkf`AT*cdof_MH1vW^P3rPUhBjJ=*+}&Inb&gN$4&wWMEf(1+rMG6QMEUbuIF$y`=g z;V4rrq}$0YOEz~I=*xPEU6O|26RLaE(Ta-ZSR(`zVGFL;2}Viy)<_cSBQ&o)X8Gd_ zhQJ#?5UN=3J5#tRG|y{^w;00Mca33vnO^5d+ebUk&NG zp$&VFt_Qe!nDisl)6FIu#0jx(4tMsy-@e&a47Z(qCL71?ckoag_p+*3GFQ~zezJYL zT|Y2!klkh`Sz&gyIp|_fjnNiZ0C^@fw$A-uYqy^~+S?z%K9}OT_$o`R&po(6H$kAO z;cmIL5_@!lb~afb?fd;m>nRSv=7M{Er6Kni04|&8r5pUkXyavjtwp16?B#P_j+24` zu*GI%7u*E4pqs+s8*2g=ST?i68>O46H(4+^KXKk6K5n*8HBy33BLHNitNr85!Lb)0G3-})x58{$d37G)dz7JLL+I%-RfvG zSR4fZ4?PMPnmXcf(~bS@SKZ9$1L?)3=P?HD^f7TD#(&^CAw61(iGh9YX*iTu?Gsy; zCXkOcgPEc_Tva=Jb$YC@6VzSE<7K;orzkxA;?I5DUz|a)4_mxK0uUJ)AQ>U|RqQ7j z20}kz`O0oK78{7xQI*YQ5>{h{sQjMm!}fBcKt2dD_9D(&19jz&hf=pj(D7XyTU}r` zSUL5e6`(%J-+<{HT}?p1ajKQ7ydDi4i)^_(|(#@n(nd=QMO(?usz3r7|`{lLv27gP1`Daa}-)4|CyT%YX ztkM7RVpT`klJ-nBW0bFhe<)q&-HLuTVfGY^?|cRH%4TdiiuHyQw~9pd?y2H@CNqUG zmCS?Tj44;lQOH4)+4z31U3a}Ne-GOA!Gi<-KqmUmG|fii_Fuks0(N(nbNh;K8cyN*u8LiWU~Eoq$YJ72!65opzdde71_3*&`w z|Nr(jA@8v>%4hQbb;m-T87fR&0}v{xLj;0f?=rthv@4v<43ejexm-h$I71~OtWwVg zo&|SY_VIOd{m}}ipYtaE>!s!&6 zgXatVCJ=|!z)<|#ufJnQkQqVP6-|&}IYc7~uQ5h5IVR&Y6nV}|MHAQtwc(wMlgl^K zDDxtSXq!LhVfoovGog=`EQ8(mI0$VF7g@p!SE);rD2X)`>mcYr_a*?!KVhwT>|C*Z zF*=wH=U`agiU1YMrf>+4qnEbCI*Czq$%x~Sevs(YsgYhnVD-!!F0d{jvSOsmsgwJ!O_I6L=wRI_-rpC)m3?sMoBKe0n(NAXoWdiR2`#+S3YN-T3( z=eh4CT_4=|$LmM82m7pl#-HLjU|M^tvr6CZ-249M9y5)a#OR32z=J<+h4Stz(V%aM zH3IbR?ug>5@04aJH?SkJdV`&Z+xt-s){L8fx~$gTo!bvNeCutnN6fKUSkd*lpnZ7@ zL4VQ2p#{XI`&qZ(ed+rLgZ;<1xd-IiIH@)`1Eq6}HuWEOc5i%{;pdm}>5VUs0*0!# zPrm-@=!s5&tNiZkui7UETZh}FLkHMtf)9PE#O--gK>bN{Tn*KYjMO9$JT#nj6W@G(F5x?1&VjiSnDkvNv%F{FH;-61?&yYYlvdc1!omco_or$aBXY`m?% zf_4K}Ix+{0EKQ4E5rQX4^;1t#pM?PwH~8laTcN-W7EP}Z^_offW;3vMLFO${lL^1{ z@n`c{b=gSM>vh1mTl9-$E4-GhBMGc@^FMl2oDOp^zKWgLas68t_3yf5Gpcha1o=pf zH^TU2{2d5E%2C~0DdD0UUFjc~ngc2(Ap}M-n8s+vPb!l@I1J3R`a{LiK`cRv+ zNV5-}U0%YXzBdpz-?Olt?@&NZeUQgLT7qml!}5O$si^fzXif& zDlT%Yj!l%dOtt$ViKf?+fDN0EpO8P7phvLzO}8Rn;a_?N(pGj-;Lo>0c{Y+E2}6%` zQLA!cvqPyBo?N51BY(6m1_0-KTrcR27owtf1RjgM>?|xM$N^P#PHDSBP8z|U?hCDm zw#x5Dx3w!OwKh16^ar>8iHvGN6jVk7G3hCsI!^@?O z4CuPrJm?X_PZn^E2Qpc&B2|SE7;Y0$TfSa}>y0kJl6aLt<-~ZOm>j6pr8$E{@QTGu zG&_?w;z&c|CvN5K7|ju1$c#8ap0wzcdnMS zUC7I`F`AJ)I2J`b%RP^YWHZzflG@BG_D9DOY<&-qk(@n!PuJSNg?c}bJSpG_4 zNFU384=&#vj!rfQQmnYbC36J>qM%*p%vzbi#0sC!oGD?-$Shw(d=V z`=M^cTHvrH=@OLh+~E+_C(=OBMJ5?|Ah0m^PVW3--n!S68DmXeWxCTq?5OiMP-_tv zS|@_uwG$ka(&KA!ylFxTE0!N^*yXq;|AUF-sV)u~GsMx^SW=$>0FZ2HhS!HmMcZi& zztNiJh(>Z~4;&o{BU<#C?LFl5bG+>zUHnWqTl--A98PYumU125Fzqhp9C?fk&FMxN zS*{{io9kQzI<#*vZgM#IrATcC!S+XeQ4hG)POnK0iC1FFtesB~M-)TeqgUKYp)XWp z##bh(ozXGtoA>foyg6+yM1ZNqYm(iJJF$DTUuu@%C!coWL!oi#J|>uPekEE`hFo_O^0@1^1d->XK^pw)ctO2XH#UFKtt+m^@s> z3&Z%641q7K#~3PC@#s@x(So+yvdVPPnX8}9kVT0IjVs=ks!!5CevN~1TthkBkx zy4<_al%asoz3B9@{y0UomE=i!wdDFlnUEhh#EJOg-U?gDW)Ic`tOK=j>e)L^V~3$* z*!O-Y;;dFR@b$9m@|%%p{1(2_2~r1);xZJSm0`+Jz8L-l_RwOfIP^;Lr`GIF&d1K1 z0x;06BPwXFlAAmXa5Zl_NUR)WWg++HS1hX(2aD@SoiDuE6C(4F?4%kM5yI=;*?0Cd zo65s4KG#e73RY#i2ZyB%dWna+0ymTDli5N1LFMJ#9`63>`i<+?(fM~4!W=+A{?Ma4 zJ9qCErQ9cO3PyZ^+LHbRB^xev0H)xeV%l2+ODExiZ1G*5=F3Y`79ozcs6P*LnP6a{ zGur{jV`e{f=Z&JZ%$r`mFu|&*9#fD1W%V*{-j`>jRBP7(!0TTN0T+i8vs>srH4>0g zU*^F$@Fx~v5|fTiD~cW9ltsISInL7{(~3XpOdh5clu~{aPjt#Qm0YUgYu&!de4$pG|e}oyUk6A zQnh!h=JJ0qa<{w8KeQXjs?Yi}tm>sD={e{RR;&+!XNqf>c=kE1KdbKIP#>CSJcKrEeG->e<$WHx=EkYkvLyr(3OgE_F{1Y#=+o0d?KP)Cq!Q8(Jdmz zz~t_;)zA2fPw$OslP4AjJj*GsUo!F7S9?nxb%Q@tpic?daQ{?lJWJCiU4ii=yVQ_$ zG?mMRvO+>W$B6HE$ZX1G&;u(Clt;mhjKVakU>Z1IJbEP8pnZR^w{<6x5c|%}JdCt0 z778HUS(mSQd1!?AWf0(%<7;Roy4D@#GJUsrRJ8XP7IDjPrhLeJbB-7#$PrEGzLaV< zDd@G_mzqz}hWYn)L+M1N zfQ9Ce9mWnvZ|+K79QiwII!t2=i++e~_1D>$9OMf1naGG8m7+f0ieWlNRXo<=y=#7| z^9AVJv$px^>13S53!VJ4=BEKl0JATUYZRU;Qm=qDz&eTCnGcr6Fzr@ZtzoJOvLqJ4 zPoSlV?Z#QtR%dSi0k?Xuq61V&Fs^o}S~k_u1^*X_uI%Ve+4wWtp094J`E{}o%S$oR z(^nYP&;tbu(%+lS@cDD%OHfKr&y(e;p+cv%6I8?4MSh{WOu%uiZ3?YjW6HX;Wm|*Y zul^!h4b0ai1gfW$0`3hLo_d@;vKG)#!1&Lc2Fp$JNF$!Kw zLRTe}+TF%DfLKHR?<2)M9r5no(eUCO@Lve%9IW^t}nGnJtWabD-uCNP5u6BTKIo8bO z<`(3g*2g?B|J|JF&NDZuxS(OvlsT2sQG;Kv*C0b0DQ+AwEvRbAU z3;A=chDcNDW?B8kL(THpZ|}S9E6{U9C~7m^%NQK?0XUKFBC;LkiPZJ=vIdW(bTLmE z^@|}m!(@w25EQg-xJrw-nmTZONOi8|BJFPQAFfHg&JRs$0S5f`Sid#zZC9r}=`^i; z?B!(GLT6%iX~8jyDFOdPoGP=lB$lU^&Jcws2Y1sgBxXvBZ+-MX_JvO&FI6S zq?kf-wmg9&1-fD2YYwZuv$OSJ@80&4o2OiE9igXM$cn-QlIE+gYbig968TtxFhg!E z)=c=fYub@}$**sP#FrMXu>)Oxj9L?ubyaSu3}cs!(Z!@LaT&zrp0{{=C~*ZEAc}#< z7p0vso1UlQ7L>A>jKZO@71~c6L!v!0r6o#{hNX>zXK)vQP{s+VGqiI#{M{h5yf+pT z#iY2i!i9nnolyLh5Lvg4KzDM|Fr~e>Fja0-K1m878TM~Xe`juq{-^W!ljFwK;ltzO zqxtmc`NjD;8+2q3XPgb6laQN{+}}+%Ax&f$%}D)r^fL;^lbfZ3mW6U7b-`V;c-bQK z)?ds+FI^KymD^SQJEbZ*_Xlgz7}P~`8aWD!S};%ca7S;p!BcUvzDSMQRh1{rP<8|x z6sCjTxvMZY7R&@A70r16?$~yOEwUWt)s!85lpeZZXCF_@7sB}@nvoCkw_i6ZgvWkb zn1TkiRLu?K0IaMRbwK zlQ;Eb=0i|+QLE~AJ_B-_{aITiRl%5g~ zJ34y7oQ8U02ze=!ahU18N zKAlY28w;;b4fGg{HL!BoT84V)4vIQYRV0vh_S35Oy2wncsg*kJTFqUgbSef)GZ$N3 zyE)F$TC-TsIA;Nh<;qZ*JHvWfDwQM8dsk%DG~I_eUn-RZz2L@oDfC$D%2IsWbvb+imRf7aA=+I!*b#(|U zsp;7zlGv;HCD4-`?&zI)rpB`DbtSTXS;{v(mBtfhl0I$a{-OwX*W7AwXlbe%DPF(+ zikkxibB0Yi3FfX%POS41_sNhj3<{u1_%Rxys1lw4%OQp9;=^+|FH`Y5`_d4i{SYG1t*8v_;ykMz0*>t(x}&_p z@YJTNV!BKh%$Ae_qLEgQc5lp&yn~XJt<2JAV4XN-&gPiw$cd-3FpT9UK{sJIYrUf4 z39{9ku*-0rF@)IgzWf=fkfkSv6#@eS@Zc*xz&KC{_u{5YJi=b!vw{4U{@sw%pn~Pc z4cvGXwl84v_-XOBxu)ZU#v{Em7ux?_*CG)hXg`|Rk0|FB`Q4h>#f1@o9E~=Jm|T=e zre}EkV6nz4u+bA%xJm{buVQ_zl4CdBjat)=$~8TqB{*>{WgH1+ubdC$>{ z+NalmvoulB6H!LQw$y^=)k6`$v$Ol?@gQRZp?KGrnHT74yk1linv`5zQvqEBMu7Q% z_$wTkUDJz&Kcj_@A>4Ui^aBtGLkqh4SK$#RP3@)PnMAc;Q^j5}3Vj|vmg?zW7P?wJ zWs`^OvfBykM5(O)(;*90h;U#9>7l8MBy1YJM>Zz6R9#ODSIXB?Ort+T@ERArV-nnR1GG{1<}z*l zE$tQ&fxWT&-PP@MyHc7g^4=bgj?Q@BmDhZSFO^_w#EQxDC{s`R7uB~c1)M$7H))U> zP$v(~%_2D8f1Xa>#LJN7XGam5Dw`B3j2krA7r}9^{2GqWRu^>m#`sfe8`)X@HFfW4 zGkxSZE=Lhr-{P2@OR;sZyX2#+8Ts>@>G1{3h<69aG0bst;uzY3>CAyPYfZZGnJe~b zr_VVPQTo9CH`VQ%aRlIX8L*6JjB(6_iE73y9z@#!|J^z1SKOfv`fL{znrZ5g z9QQ6QEM!2j?U$z9UCaT|}?v>f^055bAAvKwIQ=vbJNvxA20aQj7kOX?0YX@K) z@h7^Ga8ckcoAc-uT&>-Hf80Q9fuWpNcyJEqAtsnxdT4R{c9>YMI9`UV5%92wkh`t% zt8ZP_&I-wEvFRLIMa2=2mNky^RK6k`Tt4ph5DLE>^o%PYk!|0O#CEGm8byEm({ovm zSSaiwUW138eR@(qX7yDUHK0CC+18w15FzF%HpuCvjU@Mhu6%K$8w-R?T2rb37p_ya z^D?Inc|7uc|SA4L7@EZlpL`TvIbQI3s%kYh=|G>bZT z*w)|ACkREc01}W=DMIe<-P#!(L|PPubpssX+xFXgb*;S;X5e%|4kAqIrv3eu+3!h) z2qGJ04#aX202EPEl))e7-sx6K z3{JSh&qJe_muj?;bLDn6t_VqZF@ARXjgD(J6k|$F%Xe;m8Dxp)5R(w6c_&Md;i#33 zKfi@X%dwV_yFN5libfr_*(E@SYkC1ks>0}Lrf`Kdn@alY@#)K>S3_Z|>Gb5{tis;0 zGSy*wvCVbu+3;nboja$HLjHe};*_3DOP#*&fuw&`{T5~?r2l+cTQtWfd>>}w8PUd__^diyDm&^sP)o_Z`U?%ijQ>*S$va40So-V^AVXuIvhjUZx0dp(&oc`0EkJ)kqLql(w zB+!6fV)eJZ&jeHEt(sH;lX?oh zUL`$+m4u|*{eF9z!Qk|Iiz;=2%WH)Cq1*|eTBypM;L3syiMq6duU#9ifg+66vK`CH zm}x1N#6PT9HFm{Ms%FuP-4v?PeDAx$ZYVvQAa{W;^xscy^X-bt8zt@d(2{Jf%QxJo z+G|`e=-r=!_28hP9m##OH9);}D>goksVLW-6S6hCB)1oDysohd35-6ud@CzTQLyAy zZKF{|mBCZ%x9aaB!7Jqm5f;OQVX-n{FZwqJ%hvOW6`2^Hr2O#ot2Vo+%N}oR>py9iH07dPuo5q_EGa>f#VWXT5^9K8 zmXX7<)<3@{VI<55N&Ut%sJ9e>B4dzt2h83?f{LU%^5j|4tqI&q=VXpvtBdVy;mok? zl%Us50$|(t2a?3#W-YJx2)mLQ1sy>M?z0O~sqi%m&cSdg#NK#24pNHjE~7X%{7--C z{rXx>s-;RCc@;5s>h2-^Iu%OJ3OBB!WHlKWU837 zlS`)!to-kg2)lum0YfUB=HiqLgkk5LH_p)m63))%pQcu(L-S#WVZovo2hAbs(5tv= zpR9?*fz-RomyII4-M-+|pe$Rg?ibd-CyH>~!uD{d+@uVD=WkA1vFs$`UOfV!@rJDS zElaHjwvX-lmseL5+_+k{c7YNSsZyg~@euQiZ_F!AX!*F^cv$rRP&~Y#!Pn-nwxEIS=0i419y9r@B`^`^ z#m%+P6w=a&_5z`tQ4gmLBP@u^nP6P2d~3VuEL7C8eKc3sqE6myKlt)ju^CB_aCM5s zzRs?qe=-QJJ{FCF9!eVRPa ze00h+kUV0=+EJi-*dfxfCAnmtvkfIcife7Y8fM7|^arAcfsY}i6(V*e_*)NglJMR9 Jd;NCse*?3lLYn{p literal 0 HcmV?d00001 diff --git a/binutils/po/fr.gmo b/binutils/po/fr.gmo new file mode 100644 index 0000000000000000000000000000000000000000..b4f3a9f25d0c3da0dd63b672eab5141a88f5fa8c GIT binary patch literal 178907 zcmdqKb$Aq4`1id8E7nq>RFHw^P!E2%HdoMf)Zgu<#w#U7HxwY?L*ai0@ zxF55Z0+6E$j_d-f>X&uYkSb>98k!1WL~zq2je!V)GjVmH!f` z@D0xYDcBVEPjE1-x73z@1XQ_K!anduC_O)fvgc1Q4-Q;r?RYwDg8K%T4ey4-;NNg4 z99n7X^*E^X55XC*{&FjS9_)|%ESL+Qg%e<#6}CRh-~ik=z$x%kD7^+8VdIrTrN0lV zK7WQIVb;n(U=Mgal>OF2)!U6w^>z>38*Xvj233yl;bAavWFU|aX2JvDeNgrGI;;n4 zA7$HlLzs!XEtFn!9oIqW{RHd*GmZ`fa$s+$dRqz)hSx#W%e&6q_!uj1DC~>>k?;_B zn{$5&l~3DaZMmnx=D1ITUE$Tv|0Q@R?#9R2cq1H-g3{|wsQ5oXwV&3jEGI$fcMMd2 zy$#B~Z^O2*+3_}Be<-~oa1^{0j)7l5<=c0)t*4|nDoYo|Dr{F|Wk{LJ~cImw0}4oBmE0aUyC7)sv3CtJN^ zuruy^p!`3EL*YTE*!;tAFWgr+-T{^07N~m2I5iO17xsfK;dnR%E`rkM2G|UK3?=6e zxF6hot@ZB+_r{$C)y^h6cQI^-`)Jr4UI`C`_rZPO8&L7ThLYRhG~3==z}C3CL8Ti9 z>%v0Eg;4ca235c7;HR}HKUBS4euixq@4#DeH#igf5Pl#0V1MGSqplISWg~4ZBM>Mi z(oyx$>2~Z}pMHFAAh4KpA3hQYd=95R8VKA42S0`^_#5m3Yd>zssqU~L?&(nF%ZIY# zk+2Qi06W0@q0)T}d%&ho*z`l7(np}|SPl<@C&K#h2B`Ah29@qL*a_Bu(&pC_w#PjV zsvcvo5nKZ$cRiGxOJERQ12IG3RjB;Fg-TcFDVxuMuq*CCP__B&c?_5vqP3glcEopxW8runye!IqQEQRJwss<-t!#_&#<4IhJ(VS`ufyfh2;!Mzy<;pb58 zxB07X9D&_%PlmnVk#GpS32Hq34l19Xui5gsz2Tv-KO7Gmz|~OY zJ00#0Z-;xp$DI2WD7`*{M*ds2-8O^jx80%S^n-`MAyD}(gVKAg^M4c$#{DOh{W9OS z@glG%?xUb-Z&3Ds8)m|$@7Va`;XvHWq3m)yYzVhQ)%(v-`gPc5?b{zJ|C6A~^B`0^ zdI2i_AFwIx`mSXr^l*=dbzvzy9G1g+@Fl47y$OfGz1|B1#=@!aP9IPx`)rT7gZ(doiPynct47UCZ?6tKh!)KMXaFyaCnEw!!^i zy*jnbIM5n4!kq=1!O?IZIM?}?JNMC0?QcC)Jv`$4pM#S3AyohU)A@UKZN7aW>IVim z_aLZx%ZAEtDwLj!pxV{3@BnxUl-#QwAB3{w8*qR46;wUfuV?dV4qM`G0X;YXwt=&t z%C{1>f@@%Fcny?2o`j0`Eo=w(s&Dl=1a`tb9`=PxpxWsTQ0?M9sD8BHZkB_f#hAm)^hPBMR zFb)pD9fc~-bx`BdGq4x@0}g?~MpkYql)h)duJ9hH{_?2{->b3BuRoN2A*lXyG&~TV z0aeb8P5CgyQ!_0Y^eI0 z2D4xx)OdRtRJ(r#%1-Y=mA}!R);>L;^qBzF-xfi&$15FWatrLJ#*4#}G9A!-by$rRN5yar`>xz6&be6Hx7btMh*cs$RA`_g{{U_O^2N zhbm7;I2w+H3~Pb)a5s3N<5f_4-UwB`EzbWlsQBMG{s!CPuCskacw44`ZdmdBkYBH z8|(+0wy@`xdD7uun_NE{;PSr$MDJcJ9@15bh07M;PS+>7BfcmK+O+lwzcKC z3rg-g&Yf|Pt=A4v_AP)xSnhZklwL1DwWB|w`q{8{w!chbAFR2i4B9q1w@OsQ3$^?6U-_-c~~oUIJCFhoH*ynR7SkP|MuU zI2fv4kArGw4@1fM4(7mG9c{lJ0X^Ikp!ABue((&aay$up!grzO?WUcq{6nGI?TJwB zZ4;EHK_7!hidl?J6m>w+i;J7pTqWDY`yK#)#l$0D*Xs3xig{awG67g91pv} z2jNio6_lNObhG6d167YxU>+=h(&J8eFnkTF{WK2NGVA45P%n?)V#2yaRgJ@nJAjyxCB8T>({Z zmpbt)yg zehk%)zkzCRKR}IRO?un-DkucZYRx_kkKu z4~1%POQ7U#gwo@2sP_5-RDHb%r^4@HUpVSuTTe$q)$4hV&%q(MYxlMK=Rn!#a5x^W zgzCRfL$#wfq3l_|pIsOCg+p*hp!)T7@KE>#RDHBN#J00sDE($Z$zKH3ZccLUE1~2+ z3j4tCpyajhZ|f%vWtY>S`pq3s_S*tw@AshE!f!z2g{tqfp!C}aHBLV0+)qK-^=&v2{sCpbv01gu zeSnjp>itou{CQqh*Wb?FGRN8_3rf!tsQiwEYBw98 z?DaTQyZsxg{p~;8wu>H6^)eEwz0HKG=f%*>Lyng~tv~LD%I8(6{`#r&{|&ar-E4$q zU#Rvp6{>udusOU4O787Y<$D3Do%{kl*m9(`{~*VCuoC}cVG;ZjDqi6z%j2Q!cokHB zFT!5%XDB;$8g1<`63YIIq1x+OsCIBWR6BSW%I;gC#;M<->b2JxTb>d)0Qad-`8^3W zUi=7UkM3h_IR-;u{h;Qf z)=>5z4^@A&VG~#cHQrS~wdX6L@_P-c{r=|IW~z-h8Y;g^sQ!KflwKb}4>p}<<@ACo ze*u&|Pk@Sd9aR0i>canm8b8`hx9xT;RJ!F*cE1R!eclhH|L0Kl`xUA^HlAVYuQgP8 z`a!kJ94LEFg_^&jQ1wy?Rlc=Q?f)jI_W3bXzx@fSz3p|FmD?RE-EgRQGok8bAyoV| zQ2Jj5)jnQ;(*HN8e%o@U<#Z^0&TzaQYMguwD!=!j%KImjeOk=2<<5q3mpb=)sCM!o z)HwGeG%AU7F^`k8={B776_jVWlD^$B_ zJjcds4i(-Rs$Bh?dlHmA=0Mr$1StDm1*OM5Q2p&WD0_Vj)y{T5+}1}wD0?h|YPToA zp>Q))d46&J`_Hxcj)WfmA*lK|*10c+lJlT*zYSIHzo4<#JUc(NhTZY+3uTW&D1D2e z>~RcK`PM;|cOz8)x*Mv!J?{82R6qUzs-0|i`~xb#Mjx1sW{m2c~_2~<034|CxVsPX75DE;n+s`n=y--F8kSE%yrQDEh@ zfXb&6tON647Ca1U-Et0;o)<#(n|q=9*>_NO%P6$tVMC~T>jc#gra_f!Ih0*acm9_^ zmFH2YdixyKgZ08zpC(ZH?+;~%j!<$2xbR7E1n${z2)x|6KZ0r}UFTc<$HN@lCqwD` z0#v!*htlV3=l&b2J{lF-b>sn1`So!e4b=|jI(H>h`#23s?xoIs3sir46iVLfP~+sM zQ2MrBVCVb!Q1x~hRJ{A3^mzu#Zf`@`B@nUYX$j>&7)t*FsCl;x%06qM^t;r#?}4hX z=N!L+(yQ@88{dPfw?0tv212#_QBeJD4wSwZL#;<=%4s?WC^ z1I1Rq_E7yi+qsLO>gOb={BCf32ulA~q1N%=Lh0Y2#EuW0pz@mpd%)$e1H2Au+}sLf zkME%BWsg$Z&f7rw_lKHCra_H2$3W$GE$js!ap6Bf$@ikRoRgsJz6i=*r$N>CIZ*X= z4V1ojLiMYy&i$DSuT^HtxhIq!9iZapK-KRYsB$ca>erV-#oGua|7j?F--6P=_F@~q zJCq(%p~^oWD*x3`=`VD=2P&U8pvHxtox4TMraKg>J`RJj_X?VZ&2l}TW;;%3~HR|36(Ak z)m~zbCpd0!yctUG$D!=jfyi{#s`9*|XBR2SJU?Q=kVILfP|VsQhk% zs+TXI+G*qEHeCm({xkqe{{krcoaFq^asCfN)%&MV?WWEOE3XIC_&gcP9!Ejd`-xEf z{AxHAegIXD{zuq$p99st#zD2C0w_DIftm1rD1HBchryOBt^Jn5nYbT<(x=6dc3eLc z_P{+7Dtsv%2VaB}VC$o7xl7?N+$Tcm_cT<0t#`E352}6UK-p;;RQoK0vePM0`fY}N z;P;Lljq3S2+4A=glIW|MJs~@23*YAA0A72iY&&^Qw`WdR-47$MT zbpjlW`*o=PvfqYUfd#Mts=qx0)$Riq+HqkR93m&wI%k{XcTje%bCK0!3{<~A6>9#w z7Al`7pz5Rk#nyi?l$<$G@ynp*t5cl+Wl-bcX6Jqxw!{4?RQ)!-#L8(0_rX039ss99 z$&Eqv!{cFVxE?CqW>^-ZAXIPwP6cvJ6E+!@^OgK7tJFSp?v;DflIf>UZS&R>Cj zQShBBYXz>R1GIgV@w_(eVhi^*>$9$ZwpQS(-B`!HQcJIt2flfS`IdAA+iC^gziZO26}<^tl|W{>Z{>~z3qHs8@u^J^)T-e7}ehjrizsCqmaD%~Ye_4Nom6xRB}&R+we;!TCpr^5L^1=SBegdWV; zZuL3{%6~MJehZ++r&FNTLk~Ot#B07a%_Pr zN0T3IyirhkRzlU!d2lLx3921-{>l31L6v(g90;F)(y#W<)_)9~f%`b9bZbSJ@Ah<9#>3}ffgjv1!>mq3kQcR`IKTcO(9tI&gcbjmR8swZrWdlpnZ zFMuk?u~7P60%gzJpxXPhQ0=5?=L};NY~rK^C-cMU|%z*^@%6Kb7*4pe)% z7Ha%|0BT-%3#$Kp4AqbJ?qc=n1C`HYDF1~}?d~L~d@gnVS3!*fk3;pF@1e@qvTKGJ zkGepO3%O9^&2dombf7}P9o~lOUw=Zi z&+a`l%y@VN9D)0KsQ&UjRJxwMY&(cU>3IXxIQ|aQIJ8f1Tb@a9Fz(}^#_>m>%JC&s zzJWeAod>1obf|W78r1x?(fMzIYIhk2XPEvt5URcxK$U+LlwP+$+2JRs^sW2ac9ID_ z+!J717=_aNOy~ay)VTH$)co=dlzn&aXWK^yxEOa9RDL%?$$1Cn!oVRJX8g&6@;?cx zoEzb6_z=|i)2hGCrwB^V7*zZXQ0@K!sQUW^G8_bUJ2b7S*G>RhbnimV+HJk`$(wr-vTvW zZ-uJ=PoVm9MwZq8K&bxG6?TEMpvH;Sj_1OrxUX}(2THGJpya*g+&@6+{WsM3P;Zd6 zLrbXo>FhWbN}m!aJ01&VmouQsd9ia}>%#AF?#H3*{W4U${s=N`2U-rc_1O-pJ&b|U zV=uacfcfb(apR=Lt6NByGWl-gN0?Llt;4JtH zRJ+U_YR9Q1Q1jyTQ2KrhWrtS7Y(7Jv)=$My=`Mh3C-=k2@I|P0)GpiBZ%?T59SYT6 z=Q;ODjyJ<@_`eP{9@NdrF#Gv~;1JwVsPLPh@_h$N|Hk}iKz3;lH4hDiTEEPK>K{vB zCR_)V?ggm!^$*ngq0b0A9z~$WyGx+P=WS4O_8e*JryG=BQ=rOG2FJp4pzQgf{P{8Om@U1xNL-A}_D+{@t+@Bz3SW{$Dr*d0*z_zbGP zn~k*`1f^dQRK2W)6X4BoIt+}n`p$rA7g4x7yx6%nL5=I%pvvEDe1=)i^@Qq2*-+{7 zpvtof%I+7!18eDdzqR*E6KuSu6K#DDfzop!oCw!J+37>5`uWYV-=qw)?ux@~{5L_h ztM8%4iF%Xm___zw`k)x9{>z}o#Z#dA%Pmmp9)N0ZFTsxRFUR&%?6^7}%D)7vJnNzC zwh5}eZ-r_vKS0$_$6Py~9|qN)E{3x2b5QHMmU*^3v!U`o530Nyq5Ab-Q2ns(RBMke za6Il@sB&Bi)&A~-s^4#61h$-J^*jNp|KAAJ9-n}+Hm9zx&Ly z@j64bqg<%)6;SQ-VmJ?84ky7nA)9V0RC`_s6)z6e{+2@3>*-MWZGtN2$57+NZuz!< z91ImN3YFifurItBD&42BE^Jj`=b3g;<4IST2g{)B@EB|YKY)9{Z=w2kpfJPS=jaL5 z4$g&YpC7^z@E<69jR@Ozu^LLBH=)x13TMJj^KCyk4i3S64jc|&hw2xtifsQWg&Lpk zgBn+xEwJ?-g6cPyK<{-;Q2!MqnuZ!=T#R zDyZ@9a>w`J5Zoj0>9f@h8;$v3t2~ubp5W+})wZu|BXJoC7tE91ErI zIyeJf3#Y-13cKDu45}Sm24$Cb;6ixd5<4%hhLXDxsz1F3)jn!3we}ncyWkE%mG=~= z`gk0w9)E(;=a6N#-OPrPcRWIAudwAg1gc-=Lya?MLdm@z zsyt6Zwd=2-`d6zXtp6aWeq8`p!((6t+-;?ecO+E!MNs3 zxvzm*r#uFw&zDg8*FDO%D-Y)4o()xxH$mC?Yp8K!zoTt_3!vN=LG|aaVQ*OX7`txm z4>fNuh9lwS&VM_Uz1tmY``IB-?qN`RO@-3`2&nqF%kfhveVQF-`&TZM{`pYpSHK2v zEtGxFg__4VLzV9XC_VpzYFGQLvg1xRRQkD4?Ii|t;8jrL%y!2n$J=qShhr&}oQ+W9 z^4n13*+Hvq{~ZU_Ue1J?M{b6i&t8UV9}P~h{y```Cqczu2~}SkoclGXe(^JuJ=>gU z+fy!-|8Y>`(GM8R|7mfujXw-ZP6TQ`S`XDvUx5=~^HXd)m=9&2i=oD$PoU)f471_iQ1kh)Q*FIY zhtgv{RJ&dYRUfxP+3i?fNyS z{#WaCE3Y?{{JF3rJRU0DM#m4K?7RON*1khvGu(@y$_k&R7`xvU7{SGC+ z$(eSa)(5KJ4~EibF6pW zzG!%sl`{gWA639X@K&h!-$Uu!dcBpO1EpsHRK9DV>~IUz`23l3w>{gsXF$n26H3lj zD0}=2)votD$Leo*flzYCL!~Q* zvinN7J3Jq%{;qZIt#CN*_n_i+IM24TY^eI138hCFRQXPZ8V??W8V`Si9vpvuhFLe1 z!YR0Kgep(Q1vY*UD18f{+Uprm<=70B?@Lg6ee1a22CM%NsCt|X6)z0czmJ8o$4036 zYO~|>Q1<;CHinHZv~u=?>Svvu`%tLxF;Mf~bQd0lD)&*2>s|QuQ1*KSN{<&Ezk#xI z=uVPa0OI7JqTsjub}FCzssy0`oQkE zM?;ls8I*q4L)r61sP_5+RKNTiO5diJTRGifBiy6m1UMCHe7ge9fuBLu`-m&-KA;rN z!u<%;c-Q($TmSu_#)~mf<(doCuaAf7hc`lvyRSoy8+ER-a@#?bZyZ#-N~m;~K@UCy zRo`Dh>0kS5cRvtL$DI#H!MmZ_Rqbo69os{-yDX^wJsoO1IU5dzFG9_0`&?_~j)orY zS&m0Q>2)ELoGnm#eFW9McE8S+zpLXgxEub5LABd_=O2aRaIc24?@LhqwC(k_-_3@y z@99wT?}X}~A3(+HdxIV4qfqsK2~_`n8ft$22ljw%H(GtBK(&tu)Ht&Ws=hCG?uVfA zc@L`HHQZ#!$Kg=+UjfyAu7K(XPea-LTc~==xY4%zworPEfW6>ysC;gKnQ#l#yk7q% zJC6>6vfJ@c^VVfh?ffOE{`nSEd;JosUHu6)@9%xHP1g-7d^A)&9|k371(aSlIR9s$ z?C~{JJ+!*T#_tN1&v+<(4~LqsPKS#Blneh2%B~G>wR!}h>OTj{ZihqJ=R~M>bffeC z4r-h@@HQK7G*rFDp~lAxpz^)Zx!;F-;rv&B>w8fBY2Q0-yB!O=<31iL{5F^mzknLo#@}W8?U_*Sx8Qi_-EH+Og=%;A zL5)w(!&*>B!wmMbIF{FD|LQ!i!oLWA|Cr`3F0ErPt|4B&yZ!*LBZxbY^vk#&Kv)j$ zZwP-9_wii6Xp;r{;J1Z%I_@Lhn@&av*J{sC5>|oV6}V+D9iLew{x%_u*JuJf@(rva z{@zRo2f?G9TtDIp^1TSZcFtn~a<}51hyQE%osYW*?oVBK9`ba&gkK$Gjv}6pM#R%G z9`^zlX9Vt5#@GHi&BeLIg%=`2$B&#toZm{)A7y-5?+{+@Few~6Bs7uE$f=G^Q;9(FS8pp%ZC zE}nHUHzA|UIgaCc8|Pl6nMl0%xIT-pLvYu^eWgqLH?qd#r)T;<5ywB45YEt(IO-FA zhI3y`*l5y~Irjlh))dESDe1oFTI+;L;>Y0OoCo3e3~|Hw{pNBQjNe`4u?Ktwzx$oP zaIEAK_Y~j}uJ1N=TzC3d>zkm&L{i}+}CsN z>EbqV{DJV3IPXN(xA02hT)@eaF7OO~&m!wLmoLEqhAwj)K-(F@^<&O0&(}G3b8+9m ze?Hfjv!?nlk07qXOK?=+ugt}t!u7@Yv&1mZ-r`*InpfZs(lE^j z+Cd#H@oU2MCB$!o|Eu_|cVP zbXl>ifKK?O-xMOe}2L0n_;=O|WVemZSe+N^K z)wqwugV%HdOeKj!Ds;zhIJ_6O#A5?;%DFCsH{xFeb=-m6s>iSRy-wU?h{G#>=3Sc{ z7cYX}i<~Q5qWQ1~arWcX@r2W3I&r3ReLm^tz_l)1aoW1;Rq%ItaCA-yms?`~BJDWj zq#l~5XXE#W(??;0UD|qFYoC1s=QP5X;h)R(L&RT%`!$4W-fiLHw}+n+b|>faoH|xo zn7>cEc)r)MQi@|LvYzMcfqMh)@uWQy_rY*~sP9DUsLSO)x4}o?0mLiddVj)C<(k*!%zgK}@oS5F4RM~rZvf$32Cm{-M^nO1mIuc; z{4VBtKm2}!$Kt+^>&v+Qlk+~})Wh#q_#AQyoQw*>bQBO*M?KubIWOS)C*#BV&2cMn zej=A$VjGZ=?%&3I9tt@8?`iczgV{r_%8<@#4r@%y}Aa?R`GMZv}C6 zjODruY4SLA9M74H-|fyVzqZ8P8}|(SALhD&JUMPaW`)!9Fx)wWjV0c4*arW<@$1g@ zlcZbEbryV!aIKeb!GAW_S;Tu3UQU>fyPdo>&Mm*boX_As0X{_BzqzhMyc1pAckv&C z-#hRH&b3?*g8p$P?l7m0cJM0l=5y{lU&cR-sbP?k8+799d0?cMrS<9?ChCG(T{9_!V>NxE_BU`{4gI z=fN)hmK3?4;O`%eNw+U2ufdw5A!Ce=y*W>D@g5+I*Hi=NaxOxCYtGwUJ|6MDaI(MS zI-VjMXJ9+$=#;$WHxc)voV;Qj=#8A0;XKY;I5S9}4JY7#5NF8c(;k1le{mt_LekE2 z`3#jn;+!tJBb%^~@OuzoW{Oo!t4D%Xc{zR9^4?jJcHaPkMkUwr}aD&pw4jyO76 z5dN3*+a31^cdc)CzRUILoL8Heth3<0F5TCpyBwW$e1_kd@K_i2Cuur!y$^o-yEyN0 zy_z%)IFEGkHWQYGe+B2y&Tk=p13C96{{>E$zVLFwk0xFwVc&4Q(#6LsurF~RCr&A0 zo1FhD@|i%`Ik@|B_UC#H;qP+2fa`q-|A})l?gu$%;^!Z`J)FOCt>a<%1T2LGPG$sNZ$j;#Zwc$nd9agJ=<;ZepN_AH{~>2f zPHv$DLU3Q=rXh_yRbv>zmjy1;m)T##V%fB$2(jZpF^I1T<+4! zeTnjc=fXdo|A~&h@teo>;hc|f-IRFakh>SxcS3HD1i1Ac2oio9=lh&X@Lxo{4xBn( zB>Zap4&-_tY;q6o4~X{^eob(X;<^>reK=1dtQl?{LEQe)g6n?>Ym3J+=l><{SBZNL ze$(KM_|K=TD>!=+b}D>@vpMH^PS7wXTh8B!^E>Y4gln<7H|NbH=+utxax<2;_TK7NbfP{QALGB=RNSp2>u>?5u_a(;;0Kj!%t za0LFZk#0783HK1LTRI)D;JP8_7{Y3&v^OPRtv?)t$ajE?{~PQ^+_o<6Q@HoRoq=2T z5lfNv3>=N$(WL8&`w-$Z3(o|$vvF-dT&byk1PW3a6J{j zhe@{(UdX9qGj9K=<t4hyBVH{y!s)P(unRf&!+kF2O3rVI^ALV#63;&d;=h}7zr(eT5_mp-<;2$! z#{D_h_rYS^-#hN-th3ns84EGtt?~1#UGuOp`oogL`5w<_q^~mo!u5aWVM!M8v z0`3<`cMN<2HYZNi;~)IbaWYRL-fl#=hBJcS{m%a~;w;7QahG@y@k%)TV+r9eCN}RD=7b`#bG;Hl;{7smS3-BM9l85}Z zaLywA64)4-=Mz4O>kN1k@t=o}5&kvoi2oB@4}d@7*3pJEIzGc)-(4R^x_gPI<0$;s zxww_MA3~RxaDPmkdx-M^?)~6+&R@A+i~kjb=i}bU^~w14BwZsXV^6NH#P0^eIuK_V z*V8%Qz^&tOu8X-|PyE4zJMX{=Tpvx?DNfFx#9fG=j&tEJ_#Xk^bbiMXcX!SY2|o}a zd*DA2_nVyGa{hr|UpR$yU%_i(5phd7ug9(9R^psUx(&{K41VX}cNTH$aO!v+ca-oK zaJM0D34R{@l=BQ<4m_23I-Z6b2-9&j{?EfWXo?&N$NU0%X{GXDP28o#%2 zbj1IDrQd2dIye|(1D8NS2mc`fd1i9g24>_YsTaO-%_QP)EV&vfp)Q~d8z zpgXQZejn1;g(Ep%;rcyz5@{nYPAS*V;@1rKtxnE83TrU6bWv$^X{om)9E(SyrQI6_ z8Wcne!)2kOuon-Pmq$vA;$A2g_98{4(O9^U2n`$NR+i*Pi{sw>ShU1zA0N=L2G3dT z<8y4l)Y8K6{77lI(2LiUZim4M37$D-O$jfq2*;(7R~CyF#X==sq_jL7D~pBsI{-!I z1R5&p(89u4I3Bmj?B8+W(xUPOs97aE&41$j`4qXqgiuM?#LO)Z#mc?t{6uyO!l6R! zG$1J%f#WEeH=&{=KOFN&Q64S{mzHA_f+m*9mi9U~Tu_dIz4EA+8!l2DuOw7fMrlmc zyaiz|ClVu4G*;>5h4PCrdE5(^l$BS?=3WgE5(!5{h%L2ul(0&KM8f&e;^OF1Sv0;h zQeLniZ0kB&CRIbliq}5gLp7`mTkiSFY<@IW5-P{!CZH%5ttg|p*b>fa-?w6pH?MuX zqo*qL3ZkXup-5@mYhU5VF#l`%5Y#$$_HaIj^upqJo!_nfFN#~*Qc(^3LxY8@EC@E7-`gs_|vqPmF%e|s- zxyeGcrgA0XNI#iAJ6b`;rO|SaR$S;+lwz<#@|Yh@L{+jt!<WXVscoAx%pK3M~mmicMQn2?`_evf@ys zX%4ohs`$f;=TmU%yu7l^v`J$-wJ3EtB8&PNg0diI>~1sto3JFDk9*z91A| z(9z4UC|HE$i;3VBo8IYlDvy?jid9YRiz{4&c<1V3{!`M?B^t`+N0wET+3GC~hYJ~t ziX-{45MAw{_Jt~k7xW^9n4Ih4WhicwnbxT?j&re%x_&j72Api&=$uk#6Qcf@nr8U< z(F)Ueyz&Lqf$S<9Pl(d0y|ilW*`KCQr(ED$ht42BnPbwpJa6R0JTtsbibYCP4&x@s zjf|t*P(|!1)w@`rVXo_}Rmzao?9$>;Ycv_JFjOAW7^V&-&1;Mk&aWscQZrKQv{>CS z*Zks0L3zj2Zk=Yhgv9Ptk?j5NQEg#m89#AK@pI`$Ql-iW;I~jamwDx;7gVuEdW}|( zDVv16_=33_J0i=&YP!qAv1l7c)G+w+E(mZy6IViU$zcSTAtNFxcx%L@xa#l=CUGg`H3OzUn|N4_(z zX~M-yto-R>roQKg3c~&r%mg9LJuesxFDodnC=3VvcAKg3e~_0G)j}=2tSriU-1?=a zk#|tK_{pdl8yC++)@ak6j+abm=KIL}N{SL=MzT6&hbrPs#lfH-s#3(lCg*T0#yGxo zLAcZ_sVFXwl+l`V#*K@o6rh-Cmw`9cDr!baE#eEzYBE2}sLifu87q zrO_ZNhsew~4IL|+OjxX0f2?9m<`*+rJknZ=rJH7ADa&DJN?A9#ElW#ULqVz+L$$Jt zB`GVeU`60f7&?BqHT1Y>sF3c=F0(9L5SbrA4;v?`1~m~ZttbxqmI_8nOjVolH||Z1 zhs|u8v}8ocbQE?5+=D8a)Y=gp83FfsnuVw^hcg3)qGxNwe@JFB8JUQs5q zV8E!^Z@LgRE0OpD8*53t%**m(?F&<#^6bj`p{ifd_iG>Q)t_CP8%3)ROm39)l1J6i zi4eOE>KON?g^DW}{1R@v%~sm~FCqwrUwVj&}dA7I8s*8$!7pIGUGYN$BE($Xb1 z4#p&H2BH<^-jK}FL4JmDFOzL$c#z`yhx&!{)pF8pNy9OhCO<^CQpR4UE_F4?o5Hxo zcwD-O9#9l64ac~T!N^3o*`v6mj5%H=e{33;pSkZ4DJ?@Yjjw6(i;Jb5uZ>M$;Q&kY8NQ67yJ2dyOMVotE*pRs0J=iAoTGsazjSa7~sh-4ZJ z@+RUHV^mL!oK&L;N>AjnF%qieQdCfo%%L(Et1u18H#<#xL3An81FJ#1QlmJGjzn`g zXm?oYWf~-EEY}QwOaaB*#45$?no`V0veGMyViP}c%~RuWH~hPq(%g|tOmmu0YnUAW zb$Vp>(`F@T>ff{yqpq*23ABxam4JGP(~I=H4l z6HRF`Bi-QRFHurQ$Yk58DS;hNXjrx}niCHE%^uJC9uCUppD~Ohqh03*1Qb%-$YyA14f<;S1u|n>=D3aNX*%ej#N<5f@ zAT+ZhVX`B8_7?LFhwik6z0+v~qU^L%Wi+0|wB-3iGXteof;OT{IhvG-HF%~ikQq>> z*u}UK7!A=!*BUjE87+vIsmt6s^OHG|;}XiG&q!t^>1Ir(-D;|gC!N`oYD=2Z^r*yW zfwoV{z-azLI=$@}c0x-GhE9oGgptXvPunitRKGUUSi_b}x6N$Jo2snXswKO%OIt&# z)Sc3fH)+9Xh;)rLO%I-3n0v>@c>cX27ts|U+q&5SL_G77QAUnX#PcD75n$fJU1yw}P(J zR50))re#|(PS6qr(HS)-rB#eKEUc+V{x0S+TmEV*l$v`DW$Ia;Dj~I_?Wms>n1!7lOH;C*UZ*a4oLJnYv&t#2UU(H1NAsPZyoO|^ z?O*Wm53>uh4?o?*Z5!1}-$A+^B{CWf&Cid8m$)6So-Nt^sD135c#drE8h2_R?`#tB zFxdpT9kZ{UxwYr-u!k{>5-^P}Y>o+q%gpp#lYm`MI7u50J;&yDDJrzL+U9a2H&k8` zlNU#T)2LxL)$%k2Fj-HtD;XOzAz{|&Ql7}pA!b6!_6POsw@lGY%~Bek*y`C^fJCW5 z>YPcxNj&mk-PFFYo1Od<>5Qf>VIq>!N-O6-CAqY6UOi0`lbupJw-r-^2tPbkj=8^JRqn*yrNlEFwO98{e1Nre zXG+z{e|IBN%F2nSLFL@X%&%azzC^cLC|~h1#q(z_jgZOl&of6Zi(b2M_Q%h1-J)hp zNeq;{GLh)jHHeS|+vjF!W1;2fr*uxeGQ3Ivfoi+ zn{hNA%8xLw2!7Vdj3?#}9X8q&+eS#uwT6@_xz?0&hg0v4CtqdghUw~?h16tb#5Pe% z?K>x|e{GWq2Hj28>T64$1?=p0YcgfoARdGl?=SW->FTNmJ+};aQs?#W=@l#p#X<#) zsFLwt=MQqN+19?^#?GllB}L6`D4C+B=A*SLJDY^1Tu*gd;{5rATI9JtGc?XEZoOfn zyL6_ z5XixfIq}wmlahk$XemvT{eB`&O11IWlUK~#<58)nRij%?hJ!rD;NEZAksU3o^h%K;YJFyj#VnqpgrUca_rpQZHtN#SD zgRijK8;7r2MX7uJC{0|7C|`iy&T>(CKA6IX|Id8)o5E;nhJWQr_2k}r79T%X;G|t zOp~`Ym0poXn%SZil=~%3lUAjL>4h%Vm~kUi3M6jeQjKG=yiuxV!?R5?mN)ItrAsrb zORd(Q^0eAlCoQ!Z3~e@@*cg~N+)UHLIa|1UPiSt~NVrtJ`7>P?v zjYD6`=)#kjV7hh^Fe62PZ6fK~_yS5R&8=hFZY=2EFH5}CEkO|knGGb*8+hddTV2iezqeQPI0Y3apuoQP(p`w8amOKO%Q1+$qtE#4ZYkwQ3|Y! zkJ%@-Hi=)PvQS}=_K?YK*;o}h+|;u#L==a3CDxw{d9RxIimqYRrt^ix!whKJCe|QN zOBl_MHr!92$l8cl!SjLzp;8|7nOH|?VqaJhcS2WsnUT_hm?r6eJv8at*#6=pE#E4+ zIc>u6WR6QpLjUvp#*H7^&6_rUsF~2yGUnE#bWbU$U1I3AxD1+9z}Y)!6){7|imW5L z9uZt=s(e?BkZo+~p^Z^Q3emv*igXJXCi4`5$qI0K6_f2hjor?c|4FRWd>JG7;o1CeeadKV)*IE&>A{q?g=HApM_CY&RR%?m$CP= zl30kT*En;#Hw28qS;Ojmfn93v>Rss-%RZII9%U@@d1v3Qa8sn&C3AX;QJPlY(+A4+uTr8n43mS483yA3-WBn*w!UBw$8k6MsO?4q{cjl;0B%+DXA5y@=W2k3JUXQ zep8>Ova8i2Kh8>s(W6z0ZUVMI1CHRn}bj9CdLm-A_&g7#tBuGq}>s+#2l-C{Hun$WJA?MO%W3#7W@ym+cWUYO4ih7m3+u=V z)_==OzfyCz%l&Fw8jF}0TY2QStjYsaZ#lzTedCM616Fh7kiLwEAb#<@lri>zL5 zKs8Y$K(8Y6`y*~s7W#6^bZ2b`M^#-k&`6iUaEWe|>6fDkIlQ*9LrFW5W78xwF>gsH z>&t)YDdo(n)Ayji+od1FfnCkJ&60-9s?zNAPtEwLcR`v>W0n|I#L*3+1^yJ86l!Db zz>3cMUy5KP^G-99@vcbo(k5MBOI45_Jr|XlU!A5+VOq#c8g6goCZlMZpoz|xz>j`- zM~els-aOU+;7d^5d1fqR+BGt$5I^0hwBG z@G{w;IlE#{zk~@freu=j&Fa8DBwdz$dyEQ;+gonQ7Olpb%}Zkn^KzySoif7S$@ZID z+^dM|Hr#T(dSqI*ZinkGMa|N35@EX_&3~j(sadI2A6fXf@VHg=|MSBN4C5X?nH5}B z#kiCAUvB0Ht3LWjw?Ex+Cyzd=-o3Ay)=z9q=77ta0sjKJE56&rLJWSVagb!t~9V!(@OjK)W7Z648vR7yE-TesH-gYs%1^(KBpXZNIEjn>k}etxart`)X9Oly;An zHEcwV`(>j48<*q;&fT(-<@AOF`McOsp+YL?{c7E$DKrn+(ZbhWTQT#a3KQzvKfh>16~&WCUU{hD#T;Lin%)(erWF1{C6P&5 ziXAR!OgjxpfNMa!6J$P)BRReZzirtdZZTLJ>i2XgJYT8JSelYFCAF#`@i3MaZ`uv& z>aK&5X_LW^jU}o~qNr-#zU9eibw$$FNB%EP3sR*da!QzTmcMtHlMv{at0v9-ZG?*~ zG0Tj3cp*9=z#4f+VpOn{B6K@suVLY#iJE^IGlQn)?1?`k!79>Gq*&{PcRCT-^7s`W{8?!flU%R z8#%rjvaEvBij=AauL_v2K$&|C!6H+t#7i{^m3(p4-Ul%EWRt(qkV^XPj@|I+SHHX$ zRAfi69m}wrodOfnzxNy*DKYH(@~gb8G{)l*VO8FdqdnE5*A&*7o&&ooKUij>mr9Bqkvat^Ju5MW&^TKhr ztg?!HEllJ1#Po=d3+^|?h%uiJXW>Mke>gAu=(em|7SmI=EN*FZ%bMbnB2Bki(^K)% zdqJ4bHz-?s?Pu;>HshV{RDJ8%O{LlARI!B_mU$(|x1eRJtmGRz{zrkTR`QfojZ&ngO7S)LS7|%k z;#Qw8+&Y8yv_u+I8~>97jF~fbI0GOcA_1n-(hX75o>cb+&3xcq+)Le+B5IUG)$m$r z(i-MH!{h`KAW^;&RhzzA}NdU(Fhxt6jmH5FJ~%FIh-&T zunY2()-43g9b7v#B<_LxD@ik9;A>W`CZZm4n}t9pGt~rhwQdTImce*)K_3#y${9T+ zMKvyU!&RQxDb8m!cq3j<3asVrye5fe$}E;3jjeoy!mN$cB>8G7g1gJZD^WCZr8h&b znQP38tx{`*q$w=OW6*e*_sdcbUz#b7AHlc2|53J-rXq>il4$O_7ZrzRW##4_Hg358 zrVX9g%ndwbC?&M82i;h&iL&Q#qnS|=G5>bt(VC2C^O~wz&g)|x-Mj*Rki~mV^FkHn z(T?4`dA#e{F?Ckik>Gj76$Oz(rC^gHEGX08aAA>?5?so9y zE|pEHzo+eV8DW?3Zr7#WR-*6Ll=I?-d0RVLTv1YL>VCPgZL-$|^;xgPd$|5ie-UpX zn)ig_YKkt3Uu&+z+CC!%%<@2As5XHA+ie1yM=wW6e#^OautaT=%|*M-U#*l!sI za}!o~b!cuaWQ`j>ZTL8+POiDX#>ZgF*`QM}eU(7p7`0=RF;Olb&!j~5^*to;OG2ij zptLk^JaA*+2u0t?yD`*KE$~ zW|d0&L5NrZMc?7FM{;(y^x4_Xczd74EPkr~h-GIF18g#XIh8tA2PkRcHcCnf{mZFk zddc6I&8#Vwgn5AAT8eJtBwp>O#5;YAuoKN|{#}UGV5gevvy;7-=|_KQ#tzzFIM?uF zNi`+?m};7Ry5#>7&@Ze{``bcVIA88HADbImxFl4{zH*#;F87z(^EPDE{RGhuo0M%r z_%0(si60&AICNI~Li25&^cb{F)(`p_;Z6nB7_DZB_CsFg)?BEBSGTH*&gQMo)DH*y zW=Ns^6<4mmKrBV6n(AwNFZYL<&r>C@g2rXH;)tU36;q#o6kneSTI zP1O$S!P-A(`rPahL+1`2JeZ#o+RtCvdsX_j8%r%ZJztgLr-TPBGrvvE;bHWSYSb0Q z7Q=j9qyb+vZlG^vHOS>=q5H71`?ibyxQ#!^j>0NR_v>T`id(!;W@C ztNGQX76Kh3@wxHxlJbt|VWn01y>FU235WY}@J{3YYaBmbcWz;=A7C{mzk0grc8mPJbV4BABAh~|ArJ`$FgQGDZ$XEsullprrr zY@0Qo&kggDJ=@UTsxwg=YUD)FT&K^ICtj8`W44=Zx|=xV7$8qy+V$rkeX=#Vn`Xsc z6k?6Rk6^ja;C@BIx@&=6U!O2Bj|DETwDFnlVtt>EF~{WKzI}@hlwnwfDY*Z6Gi+cE zHFz%a><1ssueEFZt#%C}{zFnzGp1R(Y~4@BC(v&LMn8R(Ja6boW3j~VMctm>zuB0q zUs_KxS<1}q?n+jTI5D>eBYo1>DUk}>&nDU-DiJW6O>e@Hu#)eSTUpXQX;0%)fmDY7 zD}vI#4d*19M=;&Z{X%m~%Wp8YaEYmA2eFA&CCUzrQY{ugP1lE>HR~;+dsKM-R{-p{ z;~76_jQpHjH&5*MOkF_Do!fSviRSz5c8SPW(v9JqSD996rYZA9jJ$~x$Jx-OeDbY9 z1C8$HxlV(eu>GE@Zq;LUeu~16O?X3w)feA-=i9>cEBP1cPx?m#yyRiEnG}l_M~nFO zU!sdAW4Q5g3U7!~KrL;JdKIPq>l?Pyv7ToiTfwVkUZMFio0Q6RD|6d8-Du!Gx zX_`=b_P@9962!ZAHy?CJc+*wWtIO)G*9|n=*e?{&`T12C>t?FL-J(ne=9xFNOjhOI z=-i=ZwdAFRP@Jj6{-VT1DlmJ^D)GWh?XuL|eDjq;jW@9h)9$5(Y9SQS7iJM|>%$7>k4-G^; z%qXkMtrE5B=tS~qkyyFZO_4NdL1kQCI}@;zWGRx=0I3S*T>mr7BZ`ZXUoGB|b}7Pr zT@dOE^JP^NRkglS6w##}>HTj~Bo=LUx29i4aC3|maKQ8YIDYGKclOLm!mU>Ic-sqA zEYpC%?>A`M$=OJDONnN7wru_XC8mB%yDJh+yq(M1xgqS}v4d5&4CNmTB-UoT5H~Sz z>^QE?cUEvlpWgmmK>nwJ*+j=Z9yRB)S#ZC;kOfUd9zmP9K~KLTFXN^pAG*^`%o^jn z$mpLGO#Etsi~Rf*(M5=tXhY$)w#M~q{<4ZD{?b$YeCombPtEw^* zeV&vGcZ)i{%dLKu_GRu})XE?9B+VSVAbC>}yO3&@?&tr}zanO#BmK%G@ zXMiCI#}zW1nYWU9s;r1|eqr8-9b>{xXTE!RZt0lfSQn$c_48E=B9;P{Rjy)s*@|}_ zfb31ZtcJ9t#b2^Q7w%!B#+@fKj>|bR0X*IsHVZyLW5V1exZu_*V6B{Z1NRXs#Vcu& z4S|J-SPeDthplQ!2g)CcQ#hibh*LIY5@M^?xjIJ8ElseLWR=(O9WpMf7Oj=3T7)3T`=EF37_6p?1zl>oQF z`O<=A!?6BngD53CfKu##r0Q-pTv!l8p^p3S2l4a%&AkWr$(hB)6p^+K;T-u{V#H;y zPjJHd`Q@3i1>XH7ft2+VL?RI#7UN*V3!!RFkpGo-b5WNZiIq7;=|V}ZZO7$X$3$Pt zsCK}fJCS6@6;-DvhbZIv2V{x$v|c=obTUKdgE^fxzh?7rTjeL3YeO&aMMU>W;3>5T zOKe)+h~tJZA%i3J(J^8gUs-$nlw2?t%t(qUmW69*n9DuIK|%MmV(r2#(zb@terjuG z&pA#G#-OMqW7qd~1@q1;Wv_0MS>HQ7-&S-LxHHwn2H*Et>1K!Zez>D;pp~u9oN{q! zcEFzMqK&bmvf;c~7W2^H6h6?ZVOWtR%8`^UOsc(@=q-VynUx=NQ7pm47OXF#%y@ivZ{B|-1@y^6S+5uZxfwE8OMprtV5Wk97U??mzHSJuyR0H zffFm~3$%&YVWG_fi2N07x{fV$OslCYUPdzUz%6nRkY2&Ax@OSEM;i{Y$v-7*)q;Av zKb+S>p!7qTK(Z?Bht=U9MbI#yL51|&Zyd{e`}%xt-n4^hSCFyiDW}Y36qSE~^F5lf zdd|I}YR(%vp(N(k6cqrG{hxcTovsA}y;Pz)3mH`xw7KvkY&n$UI{Q+Sc1cS&^{PZ#aM)6v~0CzAfAM( z9@6o2ahlOsBAQ!G7o#<^FVAi*DkfO9X4$x0;Wvoe!hlr|Ewu^$R&|s=H$m-ByG&PI<9<%&b0g! zTMMp8?Rk`*@)saz{}Y>x6JYX%q;r~nJ5%) z*Q&)BfO?E$dd|4&FxzwCIwvyk}P~w;r*;i$4q=+N|NsX=i=m zPlRZ{`T;rdd$bsD{|w9H3C7?-rKhq0f&N@@<>E?}<{L<-KMeMMAbA^y!(*8K^u-T% z@BDE0b3nu=r`2UT<33LbJHRm&&wnD{xhwY^+WJP|iujL5w0PJS-gbBiPOIcs?Yc}b z_b@tddLMPJ`B+f+F^u}ur$94~S&&S3`|;A#Cm##Z=sYx^;-@_kY^>>Wp{Wu>LSSkE zXn7wsaQSw%pH~#^bS}4dWgK!7s4%!DwcP2_=_fx?-STMYT5>qtATRQ(o7z~wwaZPE zLN~qF>siSOaT%v`TBcL$))CVQAa-CkgiXW$vcs8Ia+8fpqp~TDNJcS$YpYL!hnt)s zv7E?l+#9yQ6;%3LGBjZ5L8)J!3XZ~FR7$#Lrojlk;Rc(^_J6r9>^)>Z?(QO&(+uCVgl|ny>N%Eacv-mQ#CU_NJ&RcI}GpO@Y+FWXeo3@!628wGJ(! z1MZulfKg&IW$UvyQmZF|)y(SVkTVM)H6cQJW(S%sf}tErRg~n2(2I|hCf=#3Ac>1K zO1`k=XeiaXl5^1p{;yDxajL(N7>3wI&p8Vo=|Lz^(&byzhSG6lj z>5sllu;kw8sjBGoMBvH&2nY2+ZO8zOOc9Fqjq6H=i6pJZ^8?-no5r`{C`? zKPTlVV>e$64vp^VRp`bE3N;Csvp-|5dHh%MWaG`W!PhVR>z`=h&-}dmdHlB47O>6f zHvng!pR1AU46K?*cgC@)xbtcx&FY1a+MvrS}794E~oqSSXl|%poQQ4onK&R^|OEKmfr-nH&QMpCS{?{ zT56SXDAha9k$w)VCEPl;fobdW%ZEC)Yz+JO$5QVdMdUS z?iU@Gj*9vbo;&5atiYxfjH{61eRinH57NKyhp#~-dG3Pd`D>dPKRP+Dj_yVFupcbk zFYfT!B}21*d2o4WU_vLLVYzgBsMyP?E!VN(o^L+B`+3=Lx|EBxw#t)RZsvx2{&>?- zmEUyq1|`zL#mm;ZHjLD<95CSxp(LlTna|i6k$F!8FwFo_wgp#L`)iSK9)+Xr$~6~W z+l=yAP$*R@V0XL}s8fdX62&SS=WW^W>yOC)SL@3g&*An>^Y2%l%UmzDF1Q(G{>9}O zYVOx^hAW5Q>h1tNwk^y&)njdKVcRm|EtJYk+qi5+fiX44?(|Ztn*uX)xzGK47E$@l z-p;|qcCn#;{c;3FW=_J=DuDBp?Jq%XJn=$o-+E@IzMFLwUw`hBb3D^uc?AB`$$B|D zBr4E!J1mM2hP2F^w3952i7O1&!tqVksuf0wjP1n%?4B8SD@_2&b32#?KjDVEf{0dV zG+71MToOT8-!$7U8BGpuL(B(Qvq(%kW5wjmh+m7iHMTD4Bwyk8?%=~+!R%Zt`FXrl z|Js5^yLC;|`=i(Tb6U1EoLm*e=233_e^d+`+qT56spE0^mkrxdjYugjit7 z;NJ;|Chb6*Uj*pB)F4rF zfo(m_$VWA(6|2z5GeaZ1;DRM{6t)TlXsSzWMbtn<(MwV$^=*zIQ|cOUEMg`+*bhp~ zz_Oli8{*$>*50*oOZ%fWL=rv)y23`7;=OtRx<*j(`{b0WSgXJ{{IdAv< zR2ZKUGDfsur%7#8_w9ILnzENvn&6N8xhgeG)xu1sYDvmAXQ`;dNAzM87XDM%sNmRX z=b4+IwBbS1`qPx`2T@hCt^qLuNp!n&Vj7!189&)DV5Y}z0O@p9u%sAwbkx7khJ3K) z%z_E3kKE&6<9AP-*_{c*`LY^}cSip|M`dr03-1RLadw?Kv0hy7nkyL#lJ!}@>%^HL zpPXDq`XeL1aZX~9G^Iz>OE>wNUD61|>*TvO*Wb(|#oWMPcTNgVsb+kH+HmaSHp)|T zdb8IR4LQTZ*LXuo6TV5Z>hxco=Vl>5Zoc_*Z-I5#JAUYnLf-9$!LxIII%W1u&jm32TEusvrJWAFe`X}*t9hDuM! zLl(j4-lQ5U@lQ}==C z%m6hL2qQM}zBoE%(;LK>CrNYDi)8Us$>iN!4U>O`F6PZhqG@JL60QuvpuynoNtL_K zTubC*VtdF5fyi|wAA>TufL@UzdVvcI?w^X;wEd#%xWX_|r69C9h{rO$B7?~RG?GPB zN3D2$X+OkWVHX!~UEk;P^F)5QI%Ppsa6LPe)8=V7)Ntg?%wpXUXTCEWN79Ni!4@{& zpy1@RO|@8tlcoE%9{Jdrb#+ggh-6*2NGwF6e$etGrHWRR{&a=O{p}6piMkF&pRCcP zfbB*bKVftJAM0)vBW|}lfn`}xB(rn_k^j|}@}RKfa=BaF+_v!DZ7nSkF47{dil>x2pgqt9gOpk^CTo!4TecYvAa-XZMWKg(LE;+3vJBF6)sD zWaC}gq@s&AdO!CQ%Fuf^2cP|lvwHLHUHp)5{`@XOxY6~{W4&>5y@xVy-vU`QxsZ$9 zk!j3w`}VBNr zdAVkRKvmugEtB3(laZG3b>` zlE9*@{M8X@5DdY zT89Qu@2jE(tK0(-iK7Y|9EfAzPHjxG|0qW|=es_pR~F$gNx3a1I_p+V&!~FM5_tq| zyuM5m0R4I+pB3$n(1(ZTolRd;!;r_0E)W2Nc)$VkS~=jGTZiT`Ml#uCVxJtShb>*N z6q;fkzKPz@k$qwU*g!!Hy5~I`hOB*1(TP)2HLiSF*=8WRdX^<|R>Y^oEX5$$dLS^{ zMn0gS=p~}oSvRDq!to{{cSf}0ZTZMuyITCNZF{^OjrWlE_c6ezhqqSl3VVi*Z)ajjjBbC{AMh&F>b`&&&Lb`_O z-~_ITIK7fowUT19b^7kP@&Y&Ib6-=(jKVU*;+5$8J<2Jd_w@4MWg5ukykM`+9BJv#M_dFgA&VadMlZ`wXsCdVJ+n_b8E#&-sB`n!sbCQ87#)0AvX(0{IB$B+i!iGj;D6z4O!A-X-SBIcN1je#K`@I1rCt-=A55BH-VJ`*MMMZN# z`X8P9&i6LB$N^z_P84?^-6}ay-18tt=;*U~ct>DPvU)nWsLTpNjQq6|(nlKBm z`C{>OS-x<{%TFI$7Zp(15a04^jQa;G>MW_Ek05A9xU9$6Pd(?3Z`IsBrS|2?_a~>X z@f+g3oq94BGRW`Xbu{sCLu5Ep^U5g{G*@3O<(T&0`Q^^e;rONZ-NRIvSxFFC>tJ}k zBMZ7m3&Mc~6|Bn~ACB!>6a_5?x)Zrb5Xcd5PP!i{>I!l8#E{v4$w4u2?nY}uuWr~| zVm4TcOI&qIt@fiEy*Z@7r_Z*DF4^WzrK7{$!;9^+$ko9tcycG5?vJvll0I$Y%b-bW zz0QdJ#;@j#O6cRxr35n#NBfn8&g4%}(xExoJ+c*LL%2@F1eZ{c0IQ>bc6=s8?`0?- zMN3P{+{tfYng)=Q*o^UOhxmOQDF5T$?f(7PBoFu=j=b_WZU4fxZHFhhpGbC7{aSkV zy!u7fkLuT}FMf5$NnJXLzZ#z7!E@286LEyl4IZ=jeocEVV&(OfwrDzK!~W9q;L@P% z)UnKL^6DWj^G1(Qd|gt=7X%t{|3@R;_{5>6hLx%T@T&u;YYfgH5^`bZF{Q*CpZWM(BF`J0F8KT)@$e2|`UEY7Dpv^48Z;#@vAN<=yiOJu*rrC%C z1s3=?mJ^hcqOm=?dLO|&KSZIk=U{IDr&%n;->i3(T>?aDAL@k#Zlo*hES~zDp zF_7GpNCDsv;1Idm%UwPFvwGPSi&pX|Sgish`qsQ;!@cP(va`~Ah{GKH1y_$Dc%Y-( zLb6gynA;26bdk&w<8g11ZbE0wwZ~m?y4)718&cGdA$XV!zd2cj)Y!fwKqoLs9 zZuFLZ@e6m51X+__N5c>F-u22!AF!e~qjM`|uBa}g7=&5H!h&Te!P^29_VLh^8>|qM zLU(0Ud~7cuQuy7-w>0z&LD(iNujv&jc`lh$ruOCOUT^8?`f`76Nhu+; ztRMBjvF+)~*=C>?0j{lfdD1Y6xe2~0+Q*B4Ut}m|t&W@R~i$_Hh3T8pIm#k)Kv94tMS^JnqoScT5wME}RkF?l^85n#Y4Ih4KTD6WE^NZ_G z=Ft-jcM9Y@00vqv7C@W8gKMm;#BJie$e-t?L5xm5 zGx;>lxAAm+1qEa&nq~cI7R{#{4>#*0q4S7291iQz#G82f^|l)#g4oe;bl`1k-r^YA0mz?^_iMB#}I$NeEP}MD@O`IW|8Blt3QA8xo-v z0V|5+p)k483euBVVB=gdu}&~VSmi2))dQCHE%JWKbqRJZsw`+;k&4{a5nYRfXW*F5 z#i(gwt*j|3qVl*fXuCIV7$#>0_U?M02%o**^%{oDPLscOqb!&}I!$IsJFg+gYTvQ# zF3w~vMk>s+)-|x^RpUswsGXW?DM1a7PK6gFwzC+phAERl3&7vfw9uh23A6+&tLlj& z)V{`9#ElTTnN64lp*`^M_oKJ3k*7f>?+( z{{a#Pi&hunUe(#_#Vz_!_OgLYd6mh!=5L^}2$wb$qBYCu zAzQ6GGo9}Oi9#+JSXf$=;z_I6jo#y81Qd^}kR#;?MW;>h45Y+QT3yU^i!_y+TxSR$ z3uJ``loW>|j)D7`sGZB*@42hv>O$6}%4k@y42;ZT+I4Ft; z-RN1SZsQnIeAJ%J$LfSXZ`g*&?R}&7)euBr@?QPDKlfzi*~Vv|o_|UjLabLCN^_kdWCUAD&~24~uJeaD(uG$Xy0 z<>h5fvV4B~N>D@BUt9KkdlR~Xq)X-fP4duMftoRJ^$@EpIoIf2XR%5co?S>z8AeLm zu-HRuq9oMUOZVWPyNg4)Dt@p;3kmE(ZNY?@kq+-g$?3BZ)bpVK!_HU8}D3ep#Dw08E?9xKbB zvHJJoQf@YoqkBhZpWg0&rb+sxH4mJs!t+qLCxK3*yf;`CbTgfFnIQzb-K8k(uq2dx zSC+?ysiY|m68~%1s0*-ITZj|M*WvJ8;PX`TxGbGm@4S>V*8N+9o4dD~x@ND-aeF~D zH{!V1o;P~G9g&4uh_$%7ws@@R*ENeZ{kGb?Hf&GEO*v&)l?r%Jjm?+q`ifNSw~VqMizkk|?5z2H7LFA;~$iCC?xn!`b(*>Fe_ zicL)KDm-r-y=ym<<3&FqjvY)l9Pc9ZXw%ph{FfWOCw^~)V>e?JixTw-u4?C~ai1KL z^iSLk`OA-Vw4a2rOdAvTE=+4+TMtlnS-?mY(ydIFwCb0eL~l&RlgK9}cld+K%}Nt# z#c}|!%TE+O&t86|tE`xSR*FWVWWaW~uO1z#Zu*$_q;PAmywbJZ=;{CdoU*EY)LYx! zUR+=LibE|Ai!cHCqiwhh@PUGlO%bz4cS%2=)#?yg#G`liG+>WWT{H0qPnVr?IpKT~3B9)4C?6Md{4Wx=}E^a<&MpVWkMW+fqd$zRw;t448>}(f4K`zs~Y?pe*tjIG-43lezOm?LIpojD2ChJL}{V3fsN1p z?aubn=DH{VUrj^6v6&c%mHKMs%dfV-q{~s1b%4Fj5#v!n{zKnLRy-~jbFg%qdyGn9 zTLde$x$*?%l^2qEr2$x#dHQJS39D}%+#F;ac&9_QxvscAAg-V@rEC#4u zVRLcgw;P-5&zIQq7sK)Q6BAqZWW61~URnF>)3SZ=6XUk+*g_N4zxm?x?Qb;woZUBH zeBS?NWAVju=y5|p;*u(bSqp^UB7W4i?^e{YIi z&QHS|#}kvN(t3rOK&@oq=5ID|4ZxiMO(F%G9f2&>f)E?u_TKc!2m5g2k+B4(Q!CrK zhlE~H4|WZq0~hL{!er27N$WgGWBy%lO~O%K5e;`egEsL(0-NF3#;s56Gof#Rb-h^2 z@NZB$2ovN7h$iI=hr(a>Pq;UTJ%vEQs%Hko7?1j>KFEe){qrtZhF>GV zSGIq`hJX+VJSw!7`!3?7%vpl{K2Kg%4o@lUX}Ysdqrq0*s3eEy=j4WkQgU-la2?jB zZZTl{y1Lf+2k(sQjDgG^hRKEBK4oMucpKrmFR|v$N4=*W4VPtCH*|yHJpa@Ta;7fK!k9g!T4N z>Ytv#&+Bt}FV;%8_$wE>1&v@6M(&qi>KsaVZwc%nUnRF0dG>2?Hrepv2w0Eu(&H4; zsaidXd?Vw0s$G^P?PNyjcs^O2^VeWaozy7adT!Wso!eOF)<;IbjKk3)ebieQrfR53 zMOEQD47H|Awmy7)Z8On&oU{~lT<6l`aX81UkM@NYK>nVEl~;zzNz!O`P#yKDM@;9s zyDVcnag(wWgewfoN?a!I&f48w2yY{-CO7?ZvvkC6)G)$((n~}*6~E9gRJG(+sy!&Y z!=~5)BWgs@*0z-vW*}?HuhRTcKd@e-lD}7Ah0B8x3p)z0utsQIoA%`P!Kta!WINZ^ z;`$m!uKBj{_V@)tj4YrkI|1f>)fdehtbv9uo?ZY`JptCsVdGc(HWUjRED@QeMOaLk z&FO3O;u|>an?kG#Zwr4(=^`3Wnb01*r~HMOUTrWrIiwzZgX??tbR+brk9${d1EY&} z4aeC?s#%4r!@+ZHqGSSE$Q37!=0)+|X8cP1J>TPtawNAF^)11Um~PF>0nmv6XaoP? z-lkDjr>Yt-CGud=CEfoqJhxMWJtvIL1Zj!A%VOY5aX{fWEqD#L@RRDp*szKUvdSi6 zL*ACW(y0|QufzyI>jcpEx122)I9~czv(YRJ zDB>FBr}?~AJ-nSE@kd;HeEqhrtTUrM#^h>N!^fgGMr+I$rG$D0*JupT@J3vUwI{a+ z+sESl%(Ry_J)~GUJLdISB{tVaNQ+{_?4~NFS*(bhqy9ln8)p+eoNAYTNxBvTxi1f+ zRLlIj|Mv6}VM%u*pmo=>=WD-Rd-^p#F*iS+{}{^DiwF0TE-L2nc?pfcIxH$L6)DtEyMxw(SBDGW{)(z_ zW6YM%T*$=aF%t1IM|YXjTc)gk@2;-JN=u-J@pT!F>wY#(t8NTl=)h2>p*TEaTSK$> z#9YD3P-7jhVXNXNsDs3H06dPQ>lK_A0Ck~0aLagsWQAM!rI}XarD_j7Xm9h@T)$+v zF)sq+WX3 z36VHo@F2k!Q?jKW?yW5tHCvtWj_K6%WH8|Eo;K$=74 zchmJeNIXN$F@Kop;(EqpgNC zV_F5A9-db|+I4I?ZK{P9G+xf>JnR1DKx(2GS9);(Iqzp_V0^kJkXPG|Fm~}_6JNB zZ~n|3bi1^*cKU3*arugi7u$Cq=Czrj7jefc_029yZid(0@;{-SG6(cj9z;wdmpWD* zsSCs;&Mpws*x!QE+t|Lnsw_GjFEq13L!Vy8V7|9TbYK?1>Hc+;HvF ziCKVcb>q^ z!{QFnm90Kq#EHsv`!JGUyPw%@k1N#dOnF*z*l+ILM(`_TYou!WCsREXg|Z0;aPr)+ zVvN~**3?AnUupJU%iRY~t`*nWR5OlIoioB@IyV=AOWL038+jgPxbCwu_zu`om$DX1 zDX^^AtHV>GhIGY`*!Gdd@}-7fyh|BALBxJ_sVW`}&$PQDm;*9mTp@qo^tLkcjHod^ z__p8M+JNID_0Sd!c-;Q#w?cFLwrXEA)Q28S7_WO;cVq+0zIi+vN`=I|weAEf2Ijjr z9%A<09$7v;_1k>!yGyI2eb8CwQI;)5XTv|Q%F;>p+x=cKos4@*B(k`<_W7?kRHza5?1AF3Jak!Jh@1d2f+=v9 zcfOcXg1388g{0V%NC($iwzwh$OeVpk@`}0dD9A0HgOkw# zrV|RVU0gd^Jd$m&VzWGp(|3x)$7JIrvh z#a(K}pmIx8cj5^vB4q}b#7kII#W&6V)OSItIci{Z^G!iRv# zZ8YCcm$uhmEIKdk4osSkXvG$aF{t6Hx;@r2Yubl2`MQHBRYjb(O@Nh_gH1126Fhji z%5~zs^5rPZ69Q%FHC=%yO?gMbsVM~;mWX!%Avw z#-KMUS(gr);^vv66k+%0@L29VV2~dfclQoop?Q|;hh?YhF_HV|mM+Q{GmkoQ%lFpaOC`vm9n@OLKG_W4c~kefs6{H@rRr zyXnqRt%LdAe}hGizZ zrL~yukoHUfbN-?|CEg5()}&|SN|bh_T?1p<=twizHOm22{6=e%tIV4v6uCr6Tq{n$!i&swz8k(4B_toY%Sj2XB*?dizYIjtN zVXo!@1s)z|g}Xwf%c&T)9y;oy(*w|vVaSP}etg?Sq}R@3`_u}jRbx`4q#LKAkm8?O zz|CGyy=qHRR74twr{){&fFVq=%)`Q&Z13x;z{vj;`fh|5GAm~^q4ETS0BrPqn`PsI zs^;PZ^a?-iRCw|?=Uqx8TqG~g#xq``FC13yK+qM#Rp9$$iwbGr*u!zp&5%ji30ixF z(ZqQYG{*57gqm-Ba(!ij4UmyZ{vxtgx;I5q+mxXl%smN$^7u4DQb=-(l?{*+T4S@N zBcKVpzD-~%W81n2=3{cvLZ>i{PGk!V$-P|@+#Juzq>&X}A3FuQhe8<78VgUMO_+FS zyQQI=ev^Sx({F_4EQYEV;)M}nNPAAM=u!Pnl&|DePWsi?3@aSYITESSJ66{iqTU;^jHwPyY&nBMRL2t&UqOXpbG!UoZ z_KYL3LuUG8<0G#s;M_hX-XK+`RZ-`)XIEhnJxx$IeB&N09X}vldOnug0kt-kZs8$N zNdD#2zrsf8xFg>6EeJ|IETsZXd0v)aZ0aA8`=#g4xWMV8`kF6g#>C_QXpiWK-pkR^ znY`(zSxkGA8%UsRRh{3Q;+^chZN;L&(E{SlqZlm95^k1*USf5ZC(-WoZ|;_dhU(3* zSso?H6N@~0({l!2Iyzqg>r=z3?;Y-2&XtQOXuM(RET$c-#2g?_yWLiW09r{5nrScr zZl{vFMIqIWsSNZ*KGpq|wP(*asl>2M&@LFMpsnhiV;U316T4~e86dx~u!ht|gN;M`Qi0_0P z(xJRB$xd(LF-_=> zF-l{(%kV1760NG`scp_CTHG+f+4=C`c*sWJ3N_td!63-)A&Xu9&3-tU6kAFXZnQCZ zYW&H`(Q!POcvFgvPA>CsGO?Gi8*$L%7rH4nPEWrG)HyC+nqqeEU(;^HDfwLMRP{2? zU%_>Y8*3d8rQPdA7U0r7$$h3^lJisH5L{t>qvyw_utUxS#Z%~?hY5S3R-`Z-;Cutj zSpk>^p^fJ8fi@a#C@FaEI)-Boxv4eu6}3VItx-WFgEaDO-`(!#l=>I70mYWL_@r=& z$y?D^?Bb=AE18MRL&+(TbBfLpc*Sndki*JrCDH@tBoo&m<65co%k?_>tJ#uzu35CL zSs_0?hp0zRp>pE%IA?#XAKos6i0^@Cr5$ylY?c-kK5Ik;3wsI|yXgOSQae;Wjc{7N z#w_8Gmd(rocc1eS=A{$Yt|ABNT*U$6^)Z)I%i8YFULc3m&?M$ebY@u~q>@pk zR+M?qPy4vX>_>VRX8MFd&Wj5Rl zpqyNA)1|}`N~B)bM@gB;e!KFh`EK;NyeW!|rhttrZ2{**t0fA^4&S`IrxbFg2y~RG zAzZ2lb*h>+?-rGr`UGRVx!4dDTzmR(Wpl&#Bsbp>mLuVd(~Gkei02XuJqhrTdcnUf z074DyFle^zxxw!_2YTQKQ*-93EWO3j)=>Ha=8kGQuauCtZvN^L+fVD~j8bG<$r$fe z@oUx|9%)CYUsrb_XQTAVmN8q*-6h7tXpcBs`_Zhg{cNaEnO`s0ykKL>ZlmIhewmF( zJX>5Dmh|)y2AT6i3)zJ$;hniK=uLK~VZrOC#`_wCELR$8Nn^dryP7SfYdvY$-GQTK zZ=AlqNzkj~;B+#Kt;}n-CjPtBt9*n5m)W*=LV-^27HnPxa}o@yQUZOPg(^q9+cPuV z9l{Dr7vK{JP`(HShiq7y2M&;4As{Adil2?_XS`TQFfe0S+LUqIxLYA&!yOZ4u6`*k zNJj}*Q#9zr`zPw4X6ROv&n13rbBsXEbObG5=`Uep+)zJHGj^`l_mctdKmTr5q= zxCg7i?3$zMfle|~E-Wd+1%FVUq|>WTxoa044XCSN?aJ^ivCHSj-Kr~k+zXnhzjO=C zMoyVt*i$s%Ozk`06QY{tRva_yfI=_mK!ja(vM^Uc&^ym|pOe6@>wp3VG}b-3*a$Z6 zX0GGd61mczBT_Z)T_p2j7r6$>l}ju5QCE*C6KT29A|mM`CX2e376Ro5gh7rWw@Rc2u z>R}}b%L+f^&F1fTQCtzzUQ|>R9G&Vl`U!QpQ{z~dn^to)0Lf=xL7Xm`EN04T7)@rD zxASe;#+4?&D%R3*IJ$0uY4jbrh3eWN6jtzD_iknDf`Q*SeCARBwVQsceI*3zDE^X(5FK5YNiluOO8m|&fnQd2L?^lDeOmdEuyHiqD{rOn@QAorU3wIgP!-T2%> zp1ASN30#73$;kJTQNDcPOyu(86%4uLe!)6#Xv0V3VWVLm*AVc9@wiwafYLNrxqJ@< zGy`DZz*0K10^@vjJ|t(do7$xgwPeUuISkc)!R=2jYCb(cbgAxtzS_yv(%Fd%IJlMA zA_iI$Rli@32>?#@SPNR`F`a%3B6QydsV=7KqRS|LK~pcoXI`w7cw-|!(;%Xh#O3Li zjTEL0-+oU<7!*8Ll}N&6is0Bh&EVNEgMY>STK$IRzGAaKTN1zNN>V3-mHb)L$i>aI zyLYMCa5sALY3qsRHU<}+Z%SK&waO~tY6EQJHApF$8tg6%(*S_E%7gIeH7KsXgjJM$ zz*0-BR2CgaxD55@2o5y>=`j!4S!&Ymo-|n|zMJ|yz6bHEE^jDK8gjW#tYg*7kI{bf zf+W&-a@D`nUmy=vR!fvej?=u%z^pVZO32Vz0-BVSl)IqyL#_4aKK-cU;b#*MCp!=* z-iMqGglN(lAXEiu5gS7ms>n?5)%XlcgZ_8Q@OpUY*olSm+e?BSm z#3S}On2ug4xBSh@<~52ve!fa3yJxAND7)m>iiPh(p$1PHm}}6>pmo7`9^i#`(i9-Q z$@+C#eV^k=gyW}iQi%6<%Qd77vw`F;xyDhF+;dh&>87v7S{6ySuULigM`#1` zs4Vmie;INQVSRXLNjHedHQ$r@SqdsiW4#}$%SWD_pIXqt%HH6GFXBB!&=YP>I~or@ zo&WUC{J-6~;lbF0C*y;|y}?7Gv&B4j#{OS3@jb~3c2d+uQBk>XD z%6pbrd~o;f;Lfl5ckkZ&?6Y5xX#5TZ2kY3yWI~-R_iz1AKfQP7U%i~tnhiFIjvIqU zbqC|)^LIb)z57u)D4)pJ6`}F|KKBji+iy^oj!)-zMh|YR67_b8W`D3b8WNB}V)GM{ zXx}H(95eVE|Dzs1xbcMaLe1ds&fmGQ}Q!#Fiq7LUU`-|K&Y9Dn245&7Vc29MbY$f^Aklm`4BFMRrI(qriB!rTda>+VOt zzVXc<@`!4PtEbEF>--EGk|$Pt_n*jq%FAJlk!%@6vPp5M zjEwJoR9^fWH#ST@_F_28-I#u+3~v+9u`s;*QLb1(XMEt4_ZBEnJOF%a{oRjvw|Po^ zb@AwysX5Q+*u{wGOdheNE%6c?MfvE+2uQ+B%$G#G)luZDqzu2L3O%1FG4bZnyC3oA zVH$q6c6w~3d7?9gm<$g(xOn$p%G%Iwx!(uu+T}6Z3V~Mv(&Q<(8cYHFS0s7FwtJ($ zB!L^=$9`-CNBHi4BQ8r{NpN)EPikk_2LK!U+gchnl zt5^f$2t$NmoSb6sq?LVg!$Wkhf-_mvfdNBy&`V{Q!i^43QG7k5nYHcX%iIgs^!&(70Sp zhegiS_L|^Z!`K(R*1Fg-heogg3w1h$f99rBIyCL4oFHrm5xPNo}Ks$d$)@Dtj zAbJ`o6@78YF6Z>_%FXCApW4XhN=YG7ZRf~JaQS6Eu}5+}j#sudhtug88ogj}jMCQHjuI|!F57O*|1 zxp11k1ApML`)@cr` zO)RUOBiS3_#@nY~SAbhLa%s#F=SZG7HlB-H#gUtja^5zNl<)MBfgk z>&%0g%!?f?Wb5I5WFOYc(QZe#_pt64S5|3FTa0jOI;-c2S;a_QvQKAi8o}5MBH18? zj%l74LRTFlI79ei*)$oi8Dp5}KN^WAFleeJ+d{t4yE;<6Zl7@#t|swjn-Z@a^|`GA zv&IbGgKGthJ<&;-iKU@gBxATGK(=>kTxwfsVviQg-*t#4Ky|Z3@2@yTp^ZmupVxL% zBe#Xx>gTz*Mx~!pls2@^PDekajY8)-Ds414p@JU#gtkXAcy;5!`qC2>cmzLwEGF4YKPC_p&U(?9b1^(Odj6uX&_oa4 zxgTaRqCkh|$6K<m&u{y!U|YHt?At#Ljz&KWc1C|DTjAO6ZLD&* zsuZ9cDJ zB(GdG)(J>lQR_1$RXr*^bSbCaHKUpU0RS%;73ZU~%NsmiUDKfG$yL?cQr)${3{2j{n8~JDaj1E+2_&FHPDO` zJKTReklK(aLHn#@P^Ar_O-KuOIZIeW*@}H{FvuFh6n533mEsaGoLBwA7AXK6(17i3 zZc6Rh+??tp{>t!n9I#+ZB(7up)BJLXji%;|SHMqBxirsI`#GayR31KuE-T5HALA$! zvUkg--#qCBoN)l79PPmXu)YHANiM509$k7Al-9>q&i6#f6wTlP)G_|)(bMH-0z__| zH@n^>gj>kk(*yc#0|?xH7u_hZvF0yPJC(J2F-8CeIe3>+9i8TX%~ zj1$X_fO;|fpTF$mljC21)kn#*BEE{EWI2N>5MxsNvK_~*bk)H zvoikxK+z>BnRJ!?yC1)G&|4nHkA?*1&%GzgI}SfCPVav7lCD=j$8c_aYN^?$p5e{z z&u$Lxe&Lt-sa7DddhCJS4W|ERB5L)UuP=~6OzmPDb=*f=m3SiP%0B@z7~~i7|H8C4 z^yzCF;hWTCd>$VL4VdxL2eMp3U<}gDy`S}XA@j9;AfJ4s5VY5h#!)Fk&J(loei&$6 zNKzTcvH(93^Abx6NeBl9E^}CfP$Q!rfff!qq!Y00Awb4bT>j?%3CVOQK}AyOpbmSW z^5r9CH|Og-UP&uPctfPzlFE^i`1EHsFVxMhRM^&|2Ou3dlnSSFhV-J3AjeJvcN*3_ zx`o;r5ARSNfL?u>x!?hNRsqS6(m6Uxevo<=T#Q!!GN&5N?GUX|MMX_0Qx}zBL36g9 zFg8>O0;!WvC@rcvM;`{6w2?=4lQg-BG)cOP;(?83&(SoJkd{s5kQig4_6Qn77w$nZ z_xFu!d(a2#oii(A*M9j^rzZ(ZxCi^6O?JSLfx3U6_)-M_sfG`Bck4#q4oLGspsMJAwX}WKTo~vDI1P$A)GjzEZ)7h=C z_W|@6qQ3j~0CTfo#b;NlCSM~lLiAnM^8OR-GOwdvC$G{Emq6d4g+r;h67^FnC~l>J z)U`HcVJh}S=qNRv^JubnFJ3uWH73U>`Y&?~{0-JAum}TUbEFs+oIukDd+@6ds{N~` zcGucWE{tK)vM{A?BzmY?ma0kgSUqOQfh+L`_Y18+mIaN+CYeTnlbA1YQ+*_&GBa&> z8#HQ3o(|cM&76S|W)hKRi(UzUQ|Y=+lON*L=f(u9j7WAr_(MGb7#Ee0S?Lhz%|=oRS$3|8A+R$)RAgxhW8 zz*x!0095G1B;guAkR@vPHghPn z1vdJu5`9}OeVbrjIvJN4Y{nCSG&iD)UD$SdPsi9na3(sh<+RAph~Otl+;)Zf7?Xgm zHMJgW6Ezo=eK|G&el=?qH6h}%Y9V7xuvgD>f3*G_F(}%dSieCi(P*U>#f~gg%6y>VF-ZrJHh~NV z-$P3Vgd(;+9|-5DnMxsJJO9loZcSyI;1z{gOz1Iyrr0s{ED*a(PeN&Fdn{xQ2du4N z_RZPDM|c82DtD0IFo7ohKv0VU4 zY)ZgF@^H-;EJZ=JLS)Tj8>2c(#tRn%J3KR{IiFWF6tujxsO$#tB0=FDbo`Ca(-fb0 zjl=j$pDALS@;F(($lM4u>-41yt@J@M4kcveb_MnADhkjCtaeOg3W5gYpR(Je{)5rkW?~vPjpi1(*Tl zLqIf&k>LSb1b$Pdb7#2HAITkM!aZdUFG5=coQ&*+tA9%WrAhCnmdH&6{TDc1*@x@U zq#o+3f9-mqs@ECtSW|RQbVLrfw6THuoSOyDal+E4$G@k3RaQt(dLF@oe0$*>r57$h zw#>2STi$1HZ~pww=WkSs-b)UX`xm}9=4Q~NUiDfCp?UO-=uo*1kZ8kLyi(1&8}&*d z)zvWKIc|kKK@AlO$2REFchlzG{1{DM{u}%&KR!#D3U$8d&jC+gQ^+7 z9ZUy^d|$&cU72@!j=hBUBKZiM@x2vR!bb692~Cyfzu%uD6vH$~w=#97P=$M|g?AvM z^|G*_MtFs+Cq#|ZC>zIT!ZC|8jnn}h;toD{1$A`5d!7n3kmHr$oM|*@-Z?9MU;j5p zdJ0;+cY4yWs71$8_pSrrwc(|dS@rL9Jlr`%)1g1v!vfFJsF#=Bv(*7$cKv30X0jX@ z4U^r(uv>f4jMeQREYtE{Rj+1F)##D^I4Q{wrCt(6hSA?-ox8T)oiL%;ewec3mvHl7r_S zJO+S?(62PfzEr$md5Q8;2zO_=i}>OK6mo64DG4El$x8kE8nEPvnHU{@qNKl-bI@M6 zz(JZ>1#<`Zg1cBPT1aBE*8lG$ZSt9D*@Y=F6bxXRU8XMFQpMe>wx;zd(;6~Fs$E*Jmr`5UKutU#lGOq6ArSqZ`#~$$ z@_qfH#~bf{JaSi&6S^EerkRkrLFGTZ8XbxUwAZ{0(w1brC0X!eqC*aNLQzP}zLc@VBrs=9t%gXZ;0hPJ1EE;>R zACl7wkjcV}Eef@K0ii*x)5OTo^+F~HAH$hU=@3wE5nm8y;beos2Y$8T!_{;ZAPPX@&s6@Xzw(fM9hUs3*u7jjv zPU|{Em3_zko-<<&N5d6}j9{&dz%}xA7OJhY=57l_8fgcCaYAwL<+?i@4j>efO~lKz z#xV8c>Q@2_oLC7@9!3%cYnbL{gS~m zu?Uha2p4#G7tm4?+T=f!e_a*;{QZ42%O26@tq_^cv0cX-Yp4-tG0&|h1j#%Kcg z!Efod^|*W8`Z1+oVDJ5`r85|c^{U)%aw7?)R zF?{iqn~iQs+l4uoUk&wQi{T!G@Ac&yjn)*u=83HvEX;P)+Ns1pK@q1nD5?{gumhq2 zJj(96NKJ522f%B>a}es_m$@ANXbR-2yOH}gns9}(J;k*JoZsPFIUpK;Z^%ucjU5`1 zcI{*es!i=R`wI6*z+DdhwE=7`QTdSorx(fwM+j(ZRxP&^ppET*%{&mGheHAvS9W|B zxt~F(d;Bni~$JfHx*FZxf3*b zHc*rt?#|#=dxoOUEA=xHsX!kB+O&n36Nx?CGXCORmjU@_iXN{;piXl(vP!(jWow{{ zLnen$DJM_LJ^3dYg$(I<&9_qB8}-jL<+?lJK4GeI53Uft^>C7LvoNBnw6P0_H{wE- zb{Xjls|ijh_;MM5!QdcoD7o)_she0wvxt((@F@A;Vc{iRYg0%%us|F5137d-?6ZCX z=1PVENty14alVENaSXt^nw@}PGomFoK?*eJ2ejnqR;ipoiDZOVkY8?j6>C+5KDyh~ z6FUISmSW97{0SSM-7e@*eh|Z?lxzO;&;9%8Bw(*)`MefEEG*Tnx~9>viP*1>E@1nC z*Tlo5=?3|-{$ZU^40ufbxKD8O?f#1=i@~MNm=j-98Ku;*rdzQz1Mi-g);}%$@QWV? ze{L^&S&GgtPmD8W-_sX$L%k7~Imst7Q(gNh*Dd;ZL^4c6y?<{{etH*}jlaJOA2JK< z-YpCd-^Nr#@VM5=9>-SB$A9)i)43Mq;UY?XS#uDCz>lo##F7x;_QoQp;8a_OFqR>F zrnDuHG|Y2~n8gBq_LoWNk4RM5EPR5+Ty(98;~6l|L^Ce)B=WE=akb22MGz7c+E~K2 z7<`d(%)P+&rMZ{ouu<^BCpSV5*U~cPlhexwTenM}z6G~28OAPxhU7_sc+f=S!#1(u zRf|g%j*{!fl8=rhL7M~Hxc?{GgIxch*$EW9VPGGJ=$-p{=LIB~;GuMbGs8l>!$}~P@6Cpiz zHj&g^y_*3BkPX|>Z#V@yIB`7}t8-b&*DEJ%cDR3k>LIrwZtS1J!Ix=?+47mQJy6`1 zLjY)of(e*xYvTAINw(a+DPE0+m)AN7>m!h{g4S(f?F2HH?sio`s++!P3RI2N8^_<} zEz8{O-}@l5#**Q(LICnA0)FM+~2JU8;ya z3r?y6wN8ZVImxOZEjj{~QgPhhP)eHfJ%p&jvb8|6-F8PCpHU z!rkD_gky)Ynxs^(x3VE5U2qB1m7=PiM^KpxO%?i6z`-S$_j(dbt_X zACLdOK3okOR~ou@S#La3p<#9KyE%dv2q=%aKttlAy^hQTO*8{3{)`I4Qsnr_>4q;a zlvD--v4Ps|hZm+m2w;#UbiCAs*Hp20KYl{Q{7}1A(6a6)*O{sWpUv04@snb9G(Ysn z4i02`#>X(Se8Nf*uWM?$=7o*sdqHEHoEJ|ZTn5*gn9?ycF{9SRjB;k&rS$Kb8Z!2d z-x3rFSH`(`uyyagcs~pq55B$5Oqa#OhjYxygzNcF^piPMS#7rd7b=f7Om`rr-(%NL zH%CGnYzgI)-Wdm7DNtA&w@N(vdU5@+bDDpYlc?=VS-GUP>W2CVg!kcK)9Bu1nzlxZ z#a@h>iGOsmP`Hp99I4CiZ>Aa7fZ2bm>1&pWc-b;iiNN(DI@FBhRc7yr&b`l23mLt_ zEnx!KlmVajQphRnx%;!KnGx5HX0_NZV{*bYRhvgy@{H|62ipU>d0m^!OShdA*SeMw z*&3-7`iky|SSh8CF{XQOU)brrM&$5)tfLJI>2u|FBjp*~FiyYEsC$`?HLUMZ(>qTU zkvv5uLDsO}XMGh}`5^P_(J6t)LVdb71;dyoX4-ry8NQJc&p*_BsY{`+GG8XZa(qIz zGlQ}Aj<#6jm9gG-nlCYu$}`y;nlxh0ZbG=lOx=l0t}RU1A<;{Yyi` zBF2cZh4Rjg&z-tZqf;A%Z{Zh%@n~RKi5yhTBwTn#l$K^L)LPah?ru*AWI2Ipw$I85 zp^3<6P$3ghUF5BfN6RakQ^O@XXq6nNXC^#9fWnO?_9L|BNH=i(=3> zE~%ICMUo8W=Edw%wll zz9O%K<_H35sq5sU6I_NQ29K$V!x=Tz)k}4?WN-bUia}L2wSwKIcncqBKS^8>ad0o$|&(*AC)KM>As+Uuao28e?d94r_YP?X5VCtI| zn;P%K3wBzD0%D9GE>dwLj({~_a4Ih(-}n<4B~SC|zoN3nurFXHvsRE=z?yW9uEv_= z4;`>zoe37lSQn&rcdRJ(Gr(HAj6G4iy-f7gwn&-ntrR1_E!}N~-Skv=B8P0JIjRZH z8=F4jhYAE=iEcQON>Zs^APNkQ_~wj|p-~Q`UWKMRD6F#>=h~21s!Jl$UK#{LWRE7m zrk_Js?#(F}u{!4MWMjc@lqFh+R#N9>LQBY~zhH3Y? z;0)cLe3eM>XrHbQirf;zq)k^%V|GoR$w%bk6jWR#JKZfSsMCyW%hjshmSxWOZ$53X!US-c7DA7czn8k@h#EMYHhHG@pXS|;e7ZSf6CGA1ls+ z^7ew?HE?_3>~cr;#4%6sxjN7nl(FZO*jEbs@ofO+Cmy-8%GvD&xcJ)(=-h5EtVdO# zDUhIDizwOM5gEnQtbfnOE*{;(8x=ogbV&w?Z}W{_IhT9ehb?QkxDCSWz)(zn(qL#FN!#;Q%M?yc9|tDw$+ zmZ|#Q3-~v)__wP`U#X?Oy;9$%NLfA7nXK)hs%qD?=cqkNerB%8mO2voN^qy>an+?= z;s#oIR*jzSsG2KC#JxE4Qo5Fu%2DJr^WuCBm=5)w*VgPD3udjHS$MJtud(J_R}Hi6 z;T~L)sT87y!2Mp}0&l91rFZsanDH-dzDP4%%l+afL!}DI1&Sa)5oCD)MD+RjAQWf| zPoHfzA;Gu!C9iF_3lKj{_6A6nySXjP|KIOMS=c!|Xm?JO&y-A!zK0Y!Di*h?kc!py zC}wg<&_QjMR~yhrhZh$BsXm>cqu4c|3sNvY=JVwgtyrIM)iUY9C?lj!hNqTR(KH`W zw?>6OXJm7*A?|XpqNz0?d!vQ*cYk@dyuSH#Wjz`1VPhMCAIL2gFY&13 z$~3VJMf`LsZ7AnR&4>VyFirQ0wh2))2pqxP$jxPv>ws67nu(-ykHV>M!I zq6g#6ZY1AN;O!)G6I9%{t}OnVu_d(UNJbQBd z3B(3}6#3L?6iv8sh3TtJ)A@CE1SzI9i`dBH`R+&3U@En_=euLul85h<3`@6_<%!4! zeWl;;`%w7ka`$jAYa*fM*OzDcZM1igUlm{R>a+aydt$lxevNj>kYfEJFy6`!UTZ$5 zBdDUkjvY+HoRX$Xe04C@DSi|uzB+%j)oD=0KsQ!0-Tnz3)Clj~V{%jZD#<6*c9ta> z#^1pdrX2@eFpQ5<>PYtvTv&WmBr{*(R^$o|mvqs5@r_*E5l#Q|V4)9;m^eW{B?M#| zcuDrrMxXD4e!mSpjI71yGNz@@D?^t{2aPr6rV0(iy`{9j+t|-1#a!>kFHc`1yT1mX zjMJgMpnW*ZI(@rX`8KRzQ7mhr_e+RreB!>t3#*IkUoJn-$u3~?aX2zbC7}p-o27`b zb#%8^rZ_wVaa>$@^zJW9i>r%Y2D(dZhbpFd1Foy&f-*OW6#O)&xKJ9gTc2xPN=|i+ z>+061&J)<8dFtSrrMekf@|BB>dRmiUv-HJCnniUz%g|VDIwy%pB0< zxc!4n4AEvzNA(wINwP!Iljz1dG)5!2g7gA+V7*nkmDV(!r+b1wXuS0*`1%@(mC&)t zBBESJO)ew3ai8x3VKa@ zP?m}Ky(RoX(=X!^3Zg^AaZ0rpr!ZLy=L2?`QFEM zq^tF%BOUBn^K0{c(~QAO97oNU58$*4b%Vg!7jVi`e*Af*7HAmgg)|Tp6bd{W=OlYpw zQ@>d=ELx`0w*^><>>ofagc%Ug$!5%w* z_~!7KJj{Eyo}PK+)=G1mV@`M(1H>ISD4RaXE`|O!xniDKpn6hDg*cOG+(eU-N0i3x z5ZX;IBy5r>semWEwVW++%|sC5c{;fU4}Gt{WD1L<&kAPJZJh4;>an}ntP~t7Uw;Ij zTVjNtEpBMT0$LYOGw{Zt+M5Xm$np%Wk%sW$<*v zyyVl3Pp%+Tf*6TG9wCPMJzMrLZ!U-*+;h;rBY*+ThwCLPM9<~!b-Z&beSfbbS@ud> zFLpg>^Q|1#O%Idh%^fsvo*kyKy;n%(MDe;zLr72*`hRvniP+>i zl6C$l_CXt~8jU$ejwX1#%%2wlt6*&g7s$Jc0H`r%*0RdFTR|jwP%ydWdln?!L@(W# zbpQ<fW?&ucRBWX6iP3QE zdM#~(1db!=D!S@ZV5B)@3AT4e*n(8(#ron(3kALf1ff#gLdJjPQ!17x{mprCgp}Ewe**beVYs=8 zOK7gsMg==z7LeT#+Y8xrDZV)a6!$-%AmM~uvYZiB&51l!m?BrFa1~uoOk^m!4Kor_o4<8OaeLKIrN zZkz3j*X(Fix_W*cMO>pOQ|?P~jk1ND&MxciZVkTq?9)_`lk7{bEulYAvSP!uc))P+ zt`S!&j!TTy81zXiq!bLUsSUSc7LHWg;E8s%sKcI`(F&ECRt~aDDt?B)5)>|6PP8BD zvX7dgly#wR6j#!jCQWQ@qeLk_t(S*;pK$fEHq_Qy7YtK#ZAplg2>Gq36tu_7^AiM8 ze`jFzXX2zb;$l;%Aej#U!{K%SQMtM;N@u%uU)0u`_p)ixzD@S5fXs5&0sU-Z!Z0?m z3!Hs$Wv1p0$Bk6j-$HAPEHT92O}v5)d7}jcilwjT*R9pf|d6Js7$+xB~>+oAsYi#YdpvGLnf|SU4sl&)SYiVam zdK3mJO&!dx4Q{^$!sjZEHp6h{Fqtliu@;-|SmCr)b%qoC>G>gSlec9Irzwb}IHD6C zcLZ7SNgB5RmIao79&%pfbR!?i+$*lK>qC4PoKM7Mt0r;Wu}W>rOc{sBOlnTU#TRB= zsQ~HJZpsu}uUb$8$ryrw&$d0XGa|hZd$X0QW+0VR$znXQP3oqtX2w`+-_tT32>(gW zjz!}`;iBV0f_5}i@px<4Y$|JV*3NX6GRLdB;pW=64+y=ehl4W*cb2&dbpt!WIMW); zAGWI90~i^mS(Y=UUKCa+FpR%X=Rw*(SKq0;rF9!1%j9|qYnNIic#!fGR)ZTHl;5uG zOL7!6hMBrYX;h4X5mPUWgzK$+!PCMwjpm?c>F7f}2VkRO<*1>**{Zhufc)YzF9zW( zy`ETLyQ~<+3)?sD(nggu2dhmI+K_DLTt8DNvf8<@r1=Vz0^0gBUm4HUd0Bgr z>1>kpUjbtfLlo4hV{qL6Z5OM$>LUAuK#0atE^4lB2gQFRFl>Caxv;=0o@j*e;6ePp ze{=7_eX{Cusbr(08Sb#@Umcp}OOobguTMbX`8g|h$?v;ux>R^V7e}s;wO~)s(8IX*dy7VR=WSR9%3;TV^`u?bT(sNOuI|Ds`fz%_&5@&)aSLWv zv9@xxaiJC&S4A2g#`sTF^=Qw85z;xpj(2xhkJ0q zBvG#K6)ohl6BXS;-~Y18Ngrg@xMgJu{So#lQEX%m6_O3KT|@HRCJY{s8|0kxd$i+V zpiGuls_}(ERV0&UWtjsfA4_t)9qMOLyY$cU>D7+3>0kyNY#y2hpjeg@%hs8 zwH|(Vo6G-v#lB5Cje?y)(P-(e_@JRZ*IL*oj8Ig4ROz`>DLpBEs7flhV?A2x?Y|3# z0Jbh?ybiSN4OJQT2Y05cdfkUrwsu;2(kH_2ubE0M`|dA9x4mKuawOjU?|bI3aAetN ziRi>dgm6m|aC4*73O*5L^smA&G;}`A-fbxe^DGIwQ5UF$U0Cw%DyX5UOP@>Vf^cS( zJuXQsQq}8?>i_2me0GbZyR%G!SF4s**R`A1Xq7%B#-lQyLHe^+yxwH1Q6s^tRm-#+ ztsY=O!-B`BHCB5ZD9B5yqHZ!tczYvZV%2O_1Z(?qF#yF`R+V+_&P2Efm1nK6YFN~6 z<4~?n@@bkYp5&UCvztK*M92`;ObTy=XC?&m(9ozt^PD1cyWR) zGKejBbxt|0;q=CAY-y$G2D{mv-djLgFxpnjE+Cfxxjfs5ao;Ok{K~_gnI}0xz*OB|BF1krsnH znA`LBJcIAWFts{6d1C6lRDE}Fj3_)oO@242Rck0NKl`R_rMO}o8$Za??S(t{nRH*v zf8{t^Mi%WG^Kw(T6YQdR?jqT#X{8EKC_6zzAL3{C_p}c462?1qz|#oG(tk19`#;u) zkZl_u1CF_R^Lkb|k}|tn@BZ;INw#f%T40h_MV$IOqm!D`BhE6F3Dq$N0Wkr{SR_`_ zjg%XwN3V>BPi9pdA*AHl>ZTY`Y(!!brGSwl>Wx=HrAg$M!s1-IU2$Bni!MkCtdpsMyeG#^t5ochRKyS$hq5T1_y4N zb2-KIEdDTfX!A^5fDL5fPo%MV^#c(I-;a()Z~x3Ky5-sjNw=B4F@wVADrOr|)v)d9 z4}-lQIQN`B4^;ls7eCy+^TXZGffk=(qvSGkvc+p7gQHs+5(>eJ?8;w9%BI>WTD!QY ziU{|SaL}Sw4!#9F#Wj~CKJE^4hV5dF5?;%$%e@j3WD8(%?VO6=zpi^Hv-vUy*%@Ibb(mU3RZDU zp1dT7IlYv$|8#$+=gKg7Q8B)nK7E>@Pr2p{%_IefA?7O>4M7w8Z|)@vGIxPY8(T@Z z8LHPPWfJY$1`%opklaBS6)uuy?LhIh_MB@jvG7>5vZ1SXl2-30Ru8+zqcmA(;;rby z(MA84AI+fO7y&WV%enb5)Zujrr5p}rxxd2bb zpk@d83yE&Yz~26;YU#KpPWGVBa?p}(H+q~jzQQF9J~pY6IV5fQ$pO^!_Qvg<+efz_ z-d_E4MLG>R6{2B^@aBRmr}FgZs!z!-$40_ajV!nj>lwzy5i@A|j$%{i)NgEOeFl)*4~i&TN__ zKP*y7z%zsCv73s=yN8FkP`2RlV->qBWPOTe$Uv~Tv9z+HjblQf0g$${{dxBn5=`0A9iZO2YR;xqKEKby-KH zkK>-tX)r8OvW|i$g-_AoF5E9))!FPQnd?)@0;Xo@bB}Pk{k&;XaIh1{niB z2Z1TIdG3qW^p}Q;;!yo`70sd6XX*f4wf&!OK6Y%Y8_C&V24M04yl?wIf4u2H{J!Nk z?A?Qlm#rxsSMIGz0&OT80K?L`(7CtnEJWxJpvvdC-;_C1D_a2SkS zLk}#B)$A7O-PX9=YJyG~-%Cu1mq!=ds81@G<@ylyj-6J!(S5bPyzzW>Q|@!{Y#Ei; zDkMXf_yCDfTuW=$H;NI>qq5Cx)>F|eZ<#C>0f3TeRV z_Wm2cm|t0)N8_{86GUxT6qv3U^2#GSJ-HE_dn*3yZWhmCpiS$6q@746 zFwA6pa*@Tga+xJ@z&$A)3|s-hJV@4Q5CrU$1|W3OV&Ve2ww(*&t=-0tmD<;+Na;Ic zh3n1;wSR>4%sz8fg3U>-lhgKthw4Ki@Y@hciXwOx+x1+NJ&50oC93obpg-m@w zygePB@u`@_i;wECd_}@vH|Rd1`3JA=TFm{7rur09EI#g|uugybtL}#`Vfk@kJLb>> z7SKLx?hTXIG2VVy+u{{B-@v;--pKI^=#l6;?Az*v@%7 z;{w~2Md`QKdG>x_)un|}6zBgV`SMd<_{G^nLimF6MD7k9!En`4fN{uk6)HFpcA@a-{E&=B;`8Sp5#P_q)Gf99ZI|#QNnxtvV5<3uKBDW>jPPWnM9+vJoxE9fxfs+2f zaN%xuzmE>ho$lcBq{J{N6D^>_bCsH+?u0AMlwe1?2P{O=8KS~5k+5$XMpt~oU|%kxTl*zmVQbvQC2J&XwBxJrIX&+~UEcS=V( zkn*HDrz!i>kn$A@s_TxRQ%;zg4`1EY6unZ#ZKl9N4uoz^!<6?nmQDHu<74sZ3&&NJ zmL@3mkdT2eZEO^~Tidcx;j2k4SfY*JU0q?@n06#4%zF5bEV-KUrP^!7x4;@DgGK-yvLB&kt1(pvZA*&|J|CD$w~ zRBngXX=AQn$6Klut18v~{$-9i>n;{9q^eq`Mje;htVxSzhE%9Zm#|i*RMjTg9dEE{ zu2W;$VtOWPyzi8CBe@x;LBOwj$|yQxIJ{}Fz|@FlYk;d-?;lnF38YMj(9-%ChD^m+ zUzb*EixhQ=`5gDRERY-T>&4A&OSrnNO+%C`{QRmVw-C#Xw>D7Ct(w0*{b=HAX$Phu zk_}i;pm`x+)+1dD`EEijU>?CpcCVBOB4TU`i-9w>;_!PS--mP&O_%f?$+$_^p`Dtp zyaucFqr}$Ni7oE+aUp0!JaCs})1JshS?3_poO??4Dz>e0ZlF88{slP`=;;x;nZr7+ z8Pze0{#Va6*%_&yuW$5zu2DD+(WLfn4nF%8i09_rySS6x{P|tx;6~R&&%#3-$G!gi z&VKqp=jn5S6y|LA-GA;rmtS3)<{^`G|HYc7$gJWDCZtk+E zCTGADv|a%*T@LnIB5r4ElY09()9<6B%s+p_5L`Z_u72q;k> z&@I0t{g}2$+7ZO%)MwZ`%SvBaupyx{%cJay_`_pQJ5!NOue6MIQm*vP?J;$h&+dNt z0E8Zfeam~z*KTB_o#X8|3ujT8y8V(!i+eU3=g2;l2AXU&7l(vZ_Qh8LX{w`opmv;7VxZ<=E&F{pjBF4*s^OY0C-1%}hsa-O^EuC1++B2ipoxeu zGV&GLpb!|++>QHwhV%U_j3!i& z;-^IlUvmr%m|(rh1EX80IaKLcZws7rc8Py0ZY(G~EfZ}jZfgTV~;!X_jG1A{N~5IbWT;p`OM zS9pR#KdM>q;=YRSFD(vLCNp)xn1Ym46cDI+jLy^wD#i{!BmYGBC?&XoQ*TNpPm1Qu zv!*vM6F=CKW>FcCdsr8XniUZ4SF+7NYH)??4NZ!Zp2RS>TqO0=&@u^GUF)pDtk_X) zW5-J(%KY*I3Y~V~MynzM1PQLW>(MDfa(m?k34JsTrgg8%$72ati5}Id8tK*uwUqJX zf=K|~AYJoOP&89#v6su)51_tsg(Q&ojVX2C8ybzp^FQfcqYEt@_Za(HZxY5TV}vnAV!msO#bt6Y4yq$6c<=A zEhFD96Tm~Rj$}@OTtL6jgkzG>|CL=PtEn#`Yhih&)pOWC5dGn z8l089q>C)c;)IWI7BMDY6vi?^|kKXh8MsE&v&eLbx1oUpRPmT_E4==Vo_g_SHXrmA##&N;|bv*hg zYoNn9+Q$7ZY2aij(x&MM*50eJP=M%o8RDBuTesY)f|41!E&PO67kn;($I9KXdo*Ou zOv_{B-%ZG-JmBhx0}xJEv9L7T5sd|>5q7>+=PPPbo%(jqd9L$Z6*J`AWRsXkCh>7n z!jF5mb(Oqf@CSTvLIzPuPyVLcJ3Nzk7FGDQ^z3={OSuG_ci64)lv8&dRb(jLt1o_a zCyR}GtGE3A3J%2l|6ASJHPw||X?kDtD~@|cA?OmgEV(_^Wsf@$AQf!{1R#|h3I&be zfUptJ98ja4nBOz)sN24qJJ%nZ=UpF}x%W9ps5@pN#t~(4_Rh?mA1l|#yH>8OxiYmc z#-0na@VFE!Y#Z%P;+bh%1DAtZ{HwUyEoT8jwrslPIfV;_RaOj zetFC-6lp{8GqZ-+S2B8+QM`k&$=X+LQd#)gb`JbXzHA9syzW==kiv!T*QI;E_AbwL z-wpl{{A6bLpKd1qeDjdLTK1bZEb;;IC4vGFA1c65_T zYxR&YE?fp;=u9azoFR~|S5F6qX~WI&!vHIoFCd!lS6)A>z$PyT*bX6gY2=wN<`21C6`>Ix!+8}m+x z@**rVi}A1awkM-CL3TpY5Os^(6U5!q%iCF_50B=>)nL5Z$SJ)0!}OFuv6*O=%r9MT z)#;zj%UUeHmHXRjl{TWQ^(EWowtIOF$BIzkbU5Z(!p$PqgRS~t!VZNNEzXq9woDp~ zf17k`w@Mj=(x!M$tvvQ#ifG2_fMI9Rp6qW}R+gVx%-wEEOLIu1GHCL$vMYOz*4_^g zEptj+7OL?Xxi#E51?O2tw?4(*Wb^>GPBKmI%1wKxXgOgR(T>N9q3w(Q3tY zvgpgjM_&GggGaJ-h_|osBB-ZiG@fz4yvjvY-$;@sp%Bah|I)KI!HQw$vv?Ug|rp=|u@PI^0wlRSdfA89y$}>Hwz7x)Z_eGfWmd zx;j5v#>=P*#-(Qa&f6Mu_ zXIEn)q%V%Ix$kp4dUipgEgRA!vSlB#9&3p}mpzcSclL=MI`pEJ$oiQ%3bJE9~s+_BwMS+(4A-FnZCZuUm@Z)thw#S)>lNCW4X zA_Q}Ci`?X=ya9zt1m8TwnsvyaiK3>a3{?&VbPW-N4GlHG;xKJi_{V0iN1m);%3q_< znWZMzH^vh%4AL!0&P(HErmZ`;1z!V7(6Cq8^FyHnhXso;NDT<2Ns?E1nxG#Yaexco znn{HnG1qOq+*{uuiM_eP6fEI0TOOx(-5+nSZ;)APRE~r8o@UW#qVBKN-KTpdAJY5W zZa#ZiUts(yV0#}*Jov6LwF}^69!+7JBVCn#aXgy8Ap;g+J;c{QdkdpqaCmU8V+liN z%@$e1OPj)~#L|6v>{tJ|S>=T9C2<(a6@%aEdzc9)R*0?(%5#d~1*HyGgN% zq4FPX1Jr`NvXHPE*)X6WZs#<*w)52@qp~R&j!2Kl(Z)J6QO-a;ieD~w36<36vO~%!$~P<09CLY7-p*`RjsS1 z$#eD@J)W_!)+w@xU={i8DCOg)jON>HGTN2jBB6VZv?ANFqKWAPJ;|oQ~bDJJMK!FwTp*n-~zs>n^ah4#6=d zOI1D*429B_!5D=e!uM=~G$q13Uijamxj`mt9=kEKxTee8%wbiv)n2cyRCdu^t-gSG zF#l;ew~hv|EzCypD^6EMFCUH8UT<&h>`7kRaPu0Dk3^6-mU!km;@WK*Hq2w-+Mz9JrC!GOZxlslB8oC-oPDUDhut31k(Vtf-i%(;;!GxL9&+{xv@w7qsYYZ@Pj z37=1GO|#C?br7yDvQ>WHt#J0+GzchN$G8;!1_|n#YPPp2SNK!~A`v|0;G?=8@hyoa z-~pM26Xv?Tt>;y}6kuqmQUpArUq1KH$7vNa%NkRNQkoaE)xd7(0xTBD1DI&~*=YX7 z`u6UV$5)TJk3l&VM$fjDOLSIAc9yOKl5gaYbMzPIca#fu@TGF_qnZq1eU(Wp(W4E^ zWDfaWVzS+!T=lpPUQo?gcw1LG0NmBr%Z+`e3blECZH7(tTqDxm%D^An_$h9wYHJkG&1Ow4b*l~}q_t$=%epZ;Em^Um1hXi8Ix}jnWJI7Df5qDoV5IRB)25OU zLD%bk3st)*LxxBH@G5vFHQ1;IXXrqYZawZ?3pSj!$ixJf&HW__U|`(A2M*{!-Qq+s zq;w|*Y`N6+U|54-j!8%7R@s_c%=T3G7bc)(dE`Rx<0ee}KuG!f0-=UHWK0^o&8!_F2v%sD_!uWh z*X`NnlEy_$YGKSiKpE>5Z;DJ?1@|Z^3qft7m`E=v4|W+UnZyY zndNU3FMc$7O|p&>%E#{)D5{2v^Y`v(KE<^X%B^!x2ySFvY;Z9^$@!stUK1WZAI&?m z!{2+O`Mr%@{s2xLOC9CUTUAFlIKNS2Tci0n4QY~)`^gPtJLl@vt1%2Vq~Y1at=)yu z1&K>TgOnX_NCwZ**!nN9{KAO@Nw6XRFU|*6Fm@!D1djjzoSK3Ki==}nZ!thqgH8UY z$u>_3gzR}9e9L1!Rn6y$8@1nmKYH_E^0s|?b8gQEk5My;LCDhL=`+0bQu9%-I8tbf zec)cM;KkJf&0__^f;ZHT^S(AMHmHHs9Jf^& z17b^2#3U1CqoWf~|7imvHa|L|Ao7*>2j?fQ&{QQE&V(xB)7K)%-4_0q;;8v zg{XS2G+7Y>6%xwhi2jArwSd2CnLB(8g~IrQ`!kepehn7AwFz@rR-E2Kx4E~!ytDEH zyh*`)A+-GQ%h#{Ckp~VdE?<3*_VU^G&f0Uh)D?Fpg2&JeRsrw9iSE28dQekz4aS7T z_+n{=(h$S3zqbrmL&8WqCO%q|nL?4**072`eF-AEPZpQtmnx{tWa9mn+(ocbMU23? zX|Pm(zD4bfooB4>M&d@7t5W2LA6J&Qo&P2}=a2Y6D#WokDBE_}VYIrtW%W0H+}_pI z9PmoRtdy_n>|ZV?V&?nTrO4j$-b?1PUk3f^W)g+Aw^#OGy+B~p>At)?M76u-q|TwW zV?}nSioDu=?XP#HdvbZ@J&6LlQ{A|{lEdz15(Qq{qPP9z(DT*)?J*(9CsAl>xa}uq ze4+Wk?vua&c7J7Wr$<$+rftff{~fww#wQfA?pWy`)}Q~d|9o3j*b^jD#HG*fHv5UW z)}GR_&?LI4`VjH6^=8gQJko3YZuQ~U_SRpl?bJ0;cdk$UYL-F2_O@16UO+VYX%&^7 zL7qO_OuU~S3=g%bnp&w=$%I$=VYR*G-9PN^?YvxJZ&l)948$bAC&{=r_mH^l;g9Q^ zPabbiF9*5SpFG~bY!>D9cfZ+xt%7h2cH;r4k3qdRqucL(GkU#COd&1qZ{XfsX;^Hs z{ya8kdZ8Kp1ItC`jQO8o_tc>t?K9ZR0Qb{KGSJMA&jkM6DgwR#8}cxjXG{-8_85^**o-rFt~CAjrc{r z#%C&m<`~M~oIjZS4M>#*fk&K!#~eVyh&jwB^;(*~m(f)M>S)|JQ6?#+Y8iq2%XHal zu_CUzgyX@^tbVq;R?RE3ZUskg+^;&d%WYw1(IpHNfp&Rj&HNjn8~B@i0u=mhs|V6< zdW27cj6#t@tPUSBqt(14epXNFvV+Zl>Gj+$BA;724TK;9Q)y0Q#<;@fU#!lz9h85m zXqNARiP;S`{fjYeGP7?Na6d#~qdYj-thf}RuO4O+gL%mLB#Tkf%~70PcI#hjHp{mu zRJS_q=+_3z%UC=n%`JMBu_(bW`>KNIFq4ZrcZb?rjuO)p`9LPTVHIz>qDK=t;L#jtk%MRJqpx} zU^C+B$**k+l_=hZ((@vhK8fTLuW0O3_cDtMeP-PuKjDofm{IKOR_h)tVBNmU;yCnI zEPY8o#f2m;P_Pf23Lh_Pb{!H4$wa_0e+H02M^l?dM(7qT8l3eEtqEM(xN5bB^}7f6 znDanPcDhlL@TM7UJXG?|kWQW8k_iiX;oFh`9nr$fuGMa6&qpp%s@b~B&!j%0PLy0{ z5(5EZ&FobfmeLJc)+v_T$LZMqf4I5YJ;;tH{ zM+TYbp2#VZ;?OZcq0ruPrt>gaEs=BgJr6Co7N%dtusqzMLQ7<{TnxwD#H*aZ8LY)HOAI_Pdle+dKS~G=##U#X>k}OF1S2|n{nN11bj(q(G@Ua5`Lc2~-eDupDL{AytVf)!G0b#Nf36|m37Puu*kt%-nR^QlF zQu{l|7E#3qN@;>c>})`T=t>bOc3tGM6Yt6#+}crSLkMzkP3EYkyC&{ zW3<(#aySIOvVq3+S`3cwOHhL?Mh*=wU@FF?RQyvVozyPKz8W9ye)=#{xmDm??WaLgUuq&U8J8AEBlSd$(iE)4<>u1dZFP!0G zobntJr!hSB+uv2Judi!j$)SVB#%XI~T+8-@sodR!Xs+}t!5BD|%wLrC>kBr)xLclF zqD4!i=^ebZMLTP#iU+bGAk^gs3o}GPdrPy8U)dJ3Q5wJRurHUG!KKze50RMSK#lOd zFp$Zo^XmgVjlOlN;Oa9@I=~S-^falC2{}=u-&OqB(s@d37`97OplIQj<7=3w($6c5IQ|iGsN#et$7gI zMJhFAR>A#7Z(MI&bng3h24g~a#n^h}TPp6|B2dC3#CGfFts>08Dlmm~ z0#hCL9linAZ*&4*5#LRBuBDn7#K3W2k#Wj};nQ<=FqcN+6LB1N5@w&Bg8*b6 zJ?Hes6`JL?S%aeuy&?z-+M7q{f4l(y7N=KmvA~suIhycWQLLe(+GztjgM20HU z6B=YJkp<;3y@~xv^ZMa}D0^aTPvp#n6(A=w@ZJE%C}x72fa<3!iDW(U)i&qDj*%o$CyxgiZ|x zKHa~V;7J;skQP2*^m}|!y*cw^LcMXdW`o%SJ)eB9cC`6RIuM!ND|a27afP8PI!z`; z@CxZPjrSj!S}Q*ge$x9?9A8#X+hS-!O|gg5=U*eDw7))>ImHa|Lm+lPa=BFTFnRRxiCmbo>d@3c1%0vkt8brhOi^)L zC(IbEHvo3=l0jh-Kku)uKYNB+>evB23+3G!D5f#A2zv}~1-bE0J!V7u0NgH~D_(f; z#&eQIX%Td3L>U^32UTY+fbCPfYnqBm=T;inI~euIwQ{Zb+-ba#XI zOSO6E>f7&-413%iRGw~t5 zTgAI+RYz}PruQ9uoz*7m#8;!-tOAqzy3$MgED7e0%F*;^hqHe)-DPfvy1UnOD%P>I zn}$W*0!d~%VM;N(cDjVdq%a%2C~`>~Wmv}(vYUi+0gZ;@sJ5_OX1oH5gJwA^nFQA; z5{2!!etF+Ek+rfV%$AorkvoTk*91BGtrpm7x+JT;okf6FIO*U)jDHh;jabpC3`+;= zM`u5dm%tIy3@?X!L%gR_=QToE6QnE2h?=N?zeK)4={L5PSJ_{KEJCx7##nSLO~IfZ z96bWfSjG}6(f35~VIT!JP1z!7x&hM*TeO&(zy5@wdGN_ykKEld?1d|UQ=Pj<3ZP+2 zj5|ZLnAr;VXLm7rP|U@s2NRLAS(RQt7P~_d<~W@Vh{$dhM2|^S7SOzJ9PZ&2nt|?_ z<6Iw+NMpZ-(=dDU)WxI%X!Y}VLaawOe%c?}_4DbNf66ClnyjHINZ#A-O{VA|y@npV z9d&PZ6qG=6xwqY$txG$H4XQ%6rJw%-6M&Q3BV}{4!0v!*dV=e1mjozKm2W~dP!RcF z!v3seO+nqgBS$QM>LQ;dRp$1j|7~syD);NAvywuqUsak!5Z3msT5hZtC-wxI+(MQ; z87v6jFF|TQ{~NxPrS5>NA%EewN9}Z0B*VI)>`+(6y%*v&k47D8sQJt%UB(iO&odgx zz@z28&ENc8c?s2#bBodINC$gY*aE+T{Lo94Ya&|;3$fakbLCZdmO^nakHeS-(`|2@ zf>;o-S_lTCh>ZNepsO5^IV|sT5TuRG;tu+P*A(di6 zp_YWb>a9GcHq2s1A+{1tu^rRKRxNR)c+=joUvNU+)u`$j(vw@|KJbjoJ4~ zFkjOpys%9xa?EG}Qbbt|I2YjZ?)VHaT$U$5vH1KfC-pX$VNXu}t9ix_fJtKVq!yed+ zWaHV#H@UU4zw>Ijv>Ygjc53X`e#@RjB;SP+lCv_a=;yVVJ8E2>;*t>?G4*MFVRmPP zx01SoSr9qnSOy0EesHgG8Lx) zzjUnG;81a+tLo-(@~r{Q8J|8n{pd%v#M4n7S;u2C(dEC!)-3wZQ6scWcYfr7bcs#5 z#tI-e*8vnMFPG#A9Wnd;mme==mr}0emP`cRiy)m8b8JUqSi;fj`trus^R?IX!`6*b zNriU&qEDFiNO}CMESwx-wsbgctxzD|4y)#K_==(A7#7ov5>nQw5(~bDItitq%P@_Iv zoags!>k`U?ABt1UwL5twQAw^`)VOGoOFopI1WW&DzZS+|JmbGqZEAjC=!9*m0iokW zRhIk6rieL%aLT756OnDg59mR@+Jo;(@dG3{i>eJ!jFh-K1acC;qz&lm-NlJ`Yv{ye zo3WmMIQa8;zZligj*&ypw#k8NE!%$Hv6ez9ui7c`#UMC`({=vg30=>7)}t>`i~9n` zXP%4}L$|jmS%RpR;Y1B)CQ6zd9kV-2@w=8VDp)pD*k+W!V|@62udb7NhJ&+ zUnVs#=Q+6ZyFOLtN|`GHn=xDXL36q4b}2x&mby98NS;`4sMfM>SFYIKBmcs2&0J`s z1|WNB#X1|AHcKal;?hABc6vbM2^q!`UL~^?df@b;N{7Gi{S3S#YhrZk~UBQgNA5)DhenF z%p+Z_9g4JKu6m^!t)sSEsa$OphhB!%S!(Le#G8yi&?y zvHyYPSMu`I4N@HJRjA4+C+2QkKUF|R=1M%*;z|k{d7%3tr0LdxAepr(*oQBeyjqnZ zkR_{E#6JMZD&r%&Qa2fSM2e7v5(n$EOn5q4UT1tiGzEGpx&zH!VhFS02Ksi*;ySv#Mv)#!NHfNI^NCdHB6K)$t!d(^6h zH7(Y_)c2s-jBho>$#IO}Gwc*|#5VNi-v4$UK`}VpM>s1;rAWb0BpC~L7s}jccbDLp z%ZG#Hd#OM6PrxTHlo#@|CDYK>Bv|2w(IH9|^HnyZ&2*#O^eJtzVc_b3iGfL1I89cMw2+iY zRk#$Pk*T+nE+0KSJ^cCKxuml;*_1CYg$e5zCP$k%irc|A(8rnZFv#qRMqVqoOKWEp zCT#_}Tp>c;{iBr~wK~3d8Uv|}HS7|v)ES0uGZpTWgEN#Qq6W~byMV4z?jfoS8`C&* zTi1z6az&P-XeWMnK}Lu6HU@P>vYEu-q^YD|5eVTJ^!n!Z%e}6L8@BA&{Yu9aFe~4t z8h(jZs6X$l#ulJM<_=giw?-$WA%$8CQuaPpP)!TAGd(PFP&BY6k+1JQU623ieob0R zS=Ksawzb0qv(ldTE@+@8Iw-36R2_M@p`x3{9yM$Xwf1^`0k6QxjR6`Zrrk`CyvN>{ zYeML9vRq2!WU>v*_myv*zH*&RJDID^LkdC5+E;R2jLH|$s)}kx?zGbnWYp5~yV3&# zDn+}r*0XNe4RI~eXc5P2X{>3aRLEZVEplOTLD8322PYo{G2jN)Ai-z}w^PtfYFed7 z2>N();wiMm@2l)wdN+aj%zSfx_8}NXRU~EOHLMA!2RyJo&@Z%LsM3KT&cq##^MUl6#imLZ+%iAB<3 z0i0}kVYqD&me&qh;GfT4BLL&O^_X4QYRTB9N>Jw)4$%~Y6~1Zt*vhVCeG^*J(I#cl zSejd57NSH66L>ls>r9i3<3y+CtaeOND5j{7I_EcMXF7+>H1&LFEFsKGu6A(Y zYI1~(lWe@S%NAJMnrE(LqDy^YGV6$H^(7vhADn$6THFtRnA+y*Py`AX6{7m}K2oYr zd52h5m^uTSjNJ#SomemC^nEGvrJ(uz(_ZkXmPHTr7X>#tSt(oM%~_;84BN6^Z9NN1 zYfhz^2%{_Eu`vyR4zu4-P~iZAk+qE4J}iTum;|ha3{XHUmP>Wq|7CFzDqXygeZSab zm`u=WCW8xokGAqjL29cmSYBe{NAyW~1SMcg>ZZ74hF6z|HYL` zOH=(Y0IjVhUx2!@^WC$@6RtXUn9C&p&fsJJde*V+luo0+Hj zx}F7UrelzMj=^-3Ua2%ehXr+%qqbM1P_8+owN$m4se(3fmAIRtm{w^fBY7)g!rZ_K zlsvt>x3&1|Ppdk#q8pYEt}m_#l%XV<=bLgxh_*&|e>}C(ER2*rIEN;Ob6vik1+}H> zNSakCC8hqgs1ZvIzq!^;HPF4~0Tc!NEBxl7(vOPR*~PB8gf!Ju^}f$pWGT~ddp<3Q zscu&p=S^eONDh($t%jZ#EoF*%E4?M3uOl_1pKnhtK$+S5?ZKb+Se2iunsLg@eC8HZ zO9wGL-f@G^b-?3cKEPi*@ch9|U&we*3>}*RdW#zO1GQ=)@IH)%V z_R*u(RBEb+Dv^vRJ*xMr%OYewhT`Bx0R^mu=wl03i#^7CgrLFOhH6tPPTM2}sDqUg z)pdTd|NcPC|Kj4$H<$LE)OvkJ13n&G5T%k)H%1sGzF2tHmf*`b?+l+@jKEX`j>h%# z{~`?;9Rt|FNpTEoIg`_z1+|lRj*-fbCS_a+GSD7!dzKhW#|K*#kA4PWckwS~)u#^( z%`-T6c8O?eaT%Go)JnKwOjIEjEUwz{0bZe)95Ytykp~CoS{ZE zzTAfy0fiEjHa+e=xh0o6533|f#JD0nv%o=grmFoA(R%g0Kg3OTCS4N#82SS%HehQ# zN2Y9j*n2ajVre~heg>qlA0k6;=oqQvGYjOX_nU^AnzK%Dr9u%D!t8&c0_)-7*U)EE z)Vv8=7#pZ*wG4E6jrw)+$W>>DPOI>|}_@rIUdsqasnzyN>`Bl_NfmHwjNx0BW(x zOxDsJ1-CViC2g|ZwsJsz`N|M#wm^gLfXS7{p@$xV-S$J#55{~vQlWm%>NMX}^C>eE zKZY54{6=k2Lmd_i#J69l;#DyxQ4Pw=7*(^=OBafrSe}H&toYVk!4}|Ruf*JFr8`V~Zmrqn?6K zn&+5!!ol*q@o0N3Yq&6%>Ad&Hd{)N9r$Y@(&^Ws@x&CwpEkSv7K`5>ioQis7OO1*V z)~D~V>Gv+9$W7UJ5aMHFyRj+3S$fLYZS$uD)GXK7^k8ot95X*N4%uzZ7q;7PJ{!xY z9iR*e%1qS8F_LU9fG6%7KNocX9P7#t2)>DweNX7oFob07o>^4cLz{m$ow@DpIn? zT{29OLN6i&z<#;-x$8R+G0wn4_oGQ{khJz)CJ)Sk$G2KUCM}n{+s!@P)*?5u<#X## zS2!~1ZPH5}DAQhMyFR@Es(P^a-#E@X&{g<}{(~wmgJ7FfqFO$)i@*)|0OA`4@T*_h zi=wyc+2g?@?|w5GrF8Q6=5zsjc2eR6rmtcsGMOGAOys?84{VC5r5KVIQ0&1`PfTm> z={p{+kgATW`v@M>F_gBlPI$ydU`qZA#yJ<9pH;VLuW$oX$kHXe4UdC~BFHg+7v9`F z6SZPY8$&vaYr#RX+H?#p0upRnW@19-jRtYYW7e577=%hD5inVIG*CWF5lPq3cu-9Z zaff{pp<(*CpB!oei@ZjK>!eO({lETnJ{}*@gZ_h&b!#;Lc;Sv0PZruf_bbzyPw2F) zZdL<&tzpN}fGtcW*rD6iQCyUx(w{~#=sr#^i2~67e`6w<9cr4*we}3;-#_#vD^TaY z@b<0zu(t9CiZsk9=6~v_SW|25_4?lZDm{C-!ObAsP4i_-{T2X@)FY_T=pTzOhMjbj zv22kt{&2$#i#NR^2ZbJ6;au-73f>3v;SWyTx53KW8}5$&X>bgD+^IL- z-}bzogY)24(MbI1K*F@mn|ob-$FYCySxv91Q!wTcPZ~ z4i%2g8$+RKumtV}kB9Q_6*v#}XtMTd;0)B~IrXPd{_M8W+FJ;fKL3Oh;Cpa9?7Pb5 zZxxjKZ*Vkx3o4zrYqs*|LxuBLDE$WNXQv*1xs<>h6laQ8gGmjC5Y`bR;P ztB0Wc>$2L`mr}=l;2881a3s7KZVO+9Y9GFa6XBL?YTueIfWH0*(T9+dqWxHUWkZUIk$Y9}v(a(6%67{2cK4phE<1pC9y4z&3* z3M&8O@H%)V9N2+0`V;Zlo^pFoD0BgWjz1$5x-^eEdmd$ig8u3S*x57`%DaTRh`YI0 zAsgNYZ-G}_ZR_78$;&yI$87rF{6 z9yh_E@D(WgT?oA7j)ZD|W<%vi6YL6)fs%JRl$;A;7+wa6X6R+u9j=3Nx9RoPpPix7 zrwA$>_0WSSI`eBCpN9&^4^aN?a)WgrhO$2g%KiRu89W6}g5Sb%aO{n^fhpKc=5Qdq z5K8Xjj^Dv)sC(Z;n!{SCc-#t=E+0b0zw6D`-{EjO)bpUsSHP{|aZu@h0aUrU3wDJ6 zcItPb>~|zHN5TG3;n)Xm3lD>GcQzaeZ--mKFQMe;-D=D0HcnaQ`?a2*eozBfaar`Mp;Z=*YGc@IOG&xeCx z3zYwVcYF#eK0ianv)7%rd`*E;H$llg7mk7V!y)h&xEaj9%l1oqK;_F?xEMYOl|BRS zw)wOaDu0fKYTvJcivJsMBHZ#G+uqEDl79kJJnn*{;YU#Ny?gCABMIgHc(^mX2dX^0 z36*b~-)GaW7?z@Lfik}jj(}gmt>A9|vi;X+xDDz;sQOR_$HE$@aGwvifDgdU;R{gy zz6VvWI^G`&b%vY49&lTz^coB$w-PEpTb%w?a02QNpwgrN1J+(SRR6LcR6d;rm5vX> z0{9b@{jm?)emn{l-wUAX`3q3(!&^}C+v*{kZo5MH-vm_-E`zf70^AaA@^C1$FYF07 zfh(cHzZOn{H^Axe2e=2E{D{>*5T1;Kd*DR$=Ra-p?Nq3Ayc?=sJO`)b5ntE?hMz~}{P9L8)QJ7n?@-4u{}RsXK)?2ZE%&c|NWSB~|3{(FmDpSS ziLFgEU5_W|LL*>JY(UWQ%Zrk`1RTf<#Z_jl^) zkYI+ELxLBII&}B_C@DGO` zoDFw@4N&np3HFBPLdEw^sQA4P2f&}9%1z%dY(6fA-B6zh6`u2;^5s@2Igdk?=g(kI zxY?K1-fplj>IqQ#Q7HLq;Y9ck*b9CD`@oK0*>=4@RCp`k5cp>}99{<}!uMc5*zapw z&S%0ws9T`?`#Y3Bk3fZM9o!Obz0T(Mu2A_h0qzDXq0;dPxE1`H)4v`{-pf$o{0%Dq zdwpZ&42N<*6Dl2(Q1LtyZVs=7%C~!<((M&E5Pl0KulKjM9V~!SmqO)#wc}b?iTbZF zAN~N9-hIEb{oxci6!k@LYxq1=K79xa;dgKZ9QC~|mo-r7l!S`^IZ)|y50w9JLY1Fi zpvq6)4_2-RyQ3Znw}Dfk;Z^0iZU_|e+i0+yn` zJ(S!^DE|+Hir3jreHGje_2W=--iOMsZ=uT1rvI_&KL{$klc37`0w{MCa0j>=Djugo zh3j(1TcPAWe;7+g!7QmCC%F$C$`LWS&*57TR+zo@0I}OTR6pn_6 z!XfZh$B*D})Z2wRn0W04748I7JPv}}!ZV@5cMVjzcpNIfdUmi3I~F@GhT}0$K(!lJ zLZ#PJZ~^=X?hPmAbujhiEZ7_Mqi|>ViDQ?Itowmb?x({^unLZY7ekeYx8Y#;HQWsD z+|kBoFjPA*2Pz)TQ03xyD0>$`)&DDD5BL(4z0cq?u;a!ZOg_B`RX=})%Ktu_SoKt> z{8$0Q@Dj%tpu*E}(+(#8he4I&m5}Z=bQqifkAWM($DsUu3aZ?F0F|$KojRCuvkg={ zcY(^6;n0KAp~_JmRJcxd>YL##)c=OchasIin0&8?l5;kk3@?YupRb_8-@Qu*(@qyb zx!(^epKpN*&y!I3^EOnu>d@7)H+%?nAyhhUvYC~;BUJe1U{P>$JIb*BdGw#zCdaGU&m-K;_59Q1$;= zI23;8)cv-w?nMmd&2#V-j}t`3K?cMV()pMZ1V z(5-AeI|z10eIiu8o&{BZZ-7eQ$DzvoCs6U}xOE59Ukrvy&jpTkQ1Lqis=QwbJHi*B z%IB+aG~BMcl{Xuz9MnRkXEU4+kAl0yH=*)j+a5OEhdWloLiEpq3h&EM>9h{cgj;W8 z%lUGsd`&==tFz%q_z0W`e}yXl6SnPO#-D$Jo1(r2DqQzK$$c6s9A7$h*Pd4HASihY zq2wG5mEMm+#s6EV^19P@Hl2n+rE3XPdD+*go1oJ7Sf~FFC^>gPrRN7w^}hS|R^Aw> z^1K&R|FbWY+~c9r?PAB*;TY82cd+iKLybcdQ03zQsBj(+)h^rw)z3Tt6`oI_!oTs3 zHXXKuvr&(MitpiYEPN2EUW9tt^1M5gzfq|4IS1|upN6Yox1BnK?t_Ox$uHg6)}wu( z!chy=9;||@2WLRV_jaiKdSgFWHHQ03q)sQmZ=s(c7^|h%C{S# z((it#dj2_7{`Bo{;}L=5P#+BC-|cV@_#ssK^%-EpKN2e47DJ6oPlU!kl-v*DUa9*4G6sU51Jyia_2$fFjpa*;9+jtd1`O^sH&tIVO z^&BX9|AK1o-f`x?K;=V^u(e+RWv>j%za&(-It8j6{S(UHN1)2jI;irp-4I*O$3xj~ zgenI|I`tJ${@x3f9-TnxweDxe|^Qj-~hI%+u{hI(KHv#3}1yJd7pW`P`_PUR-{uM)& zua!{Yx)OTu6(~7BLB&5j(x&5FD0_`i`Efp!`GZjP{1Z3?ZZpd2PlihGTBve(1XTF1 zgG#@9p~~G0Q2G23RD43a+w!+LRC@P@o#7r(`BDs3z8682zhj;LIZk~oRJz{_RZri7 z3g53#`95H@4c}a-de`K56_kG;Ic_w@wpTkrmDjOQ@hOLjf1~4Ba3tz`q3Y9jQ1RM) ztS!g8Ko9jusC+4hGG7Um9!J7W;ptH6az0e~zuuWY05v{--kHA*RZqWzve#h`Yu+6y z{GL;fgNpZ5sPxz$D*aA?^8X^JbiWxYU7mz0FF!z~uQ$%ddp=b8+aF5)dC-HmK&9_1 zQ0eo%)9=2gjn^nBe~O{n`vp+tqYf&*XF-MMLa2D$3?=^&sQA7MRS&*`Di^;vb}g{= zZF{Kv@8dWE%D+iaa_2+EZ$GGXJ{T$;PJjx}RZjnYD0k06mG2Lr+J)|g*8j0k`8pY@ z|JnzZ!BtT0#-mW-`wGh5Z;n03TmOeb#is-+K4nn;EQ1~4(NN>K6X3@138-*B2bB-& zpxWaB6KuNe0o5)SLFLObsCsxTRJ^W%N|y(r;_)I>KK%^Uo@_tShQosjcRp17$3eND z>C7wPMAQkWa(gvYIG=%&;g&@#!=@%$-mk038?&j*QtMn zDhE9#S-Jh7)MKFJltQ&vi(m;n0jghp5h`E07h8Knpu$lIl`b=(;=eysJdShvS3`yS zIjHn}3o0Fcg9_KyldU=*DnBMT?h92<*E;hPp~~~$q2yf-i{LF#;rt1zzn?V4hIcJg zcyEEKpU**!AAg0)uQ4T-`#^>3V5s_eo>M;r6_59!%6X@$mODX(djwQ^&wvVd6slhT z8Op!Q;ZXPjR6DlGG~2F)q5PW(mF_E`>d#uI|5vDX{8}h^uS5B_ajESudPAAdg_6Gp zDxQ}^(@#L9(xcX z3YAXtq0&1F)ovUFRUU7EO22y@Uv&J`vBPW|-ff}MV~|tt2{o>n4Hb_?Q0aCM%!e04 z4?gG2zlEi!cba4S)f&eOpu+Pi909kSYuk}xsPG*OS9hRZLZxq)G8>*@(6qZy`ujkY z-$S7C@p9xoe9*||{Ry9RpjJ~#}%3zd)C zEVk{-B&hUT;kX7WKF31k{}oW-c^=B$*HHP>dv7am3{<>pq57rM9Pfw9w{=kEeWxWh zyp!Na)J;(3_fj|%-r~$Zf|Ao~A8WoBoPv69I2WD|mA_v@^<&+Z+H~9zPC~s5n)HH& zsNaQh-)G+rp=wwQN5dzf`jJhRbqGb_Bq;SIP;%aN>i)~^yuT8vy}l00-%nvV{103P zXGd&0T?JK6AA_5~@1fG`SEzcjZH3Lp%B zs=V%0W9#=EsBj$x<^C3^dh-pGy`Ht!-d=Dv>OaFd@Hwa7H`XDv5cM*saNY!G!Ed0_ zzj!|zo1a1k6CxA|}kT#WiDsCqmoVdc(+8vh&*<==Bq^=yX*%P`yn^+c%rH~^}jyc(+g zc?3>`A3~L*f&1HjrvfT}TA z)!)aU{C@=!?9c~L{(S+JZ#(_dwu@t+(r+5ncxD+K3=ehctDuMaS*UP)*dtCqdP-n_(^d6i$NkFSq6Qbhr!ZXQ9IREmZx@yTZ!NcbpGZjt_)tA0LE@ z$M#p+@J@yDZw2(=iBRS7TBz_m1(h!Ap#1A}m9;krc0@fLDu3oc*>8ZVUnj!>@Cm4L z`#qGsu2UVyEYOe=hZ|yB`JOnB}S32DgKILiMZVQ2qKzQ1)+vYIh!jDn~ED&hS4_<-gD&%Kv^&y$niT6IAmdkN4f_es2{kalK?)OmTW7oTFycR;)tA(B5BT#alg%e@ddu)F_ z11djGhsyV7;9A){7b^`P6sHXOUad3p3da0mF8N9mt7Vjb^s`p=E& zFP@_Pg=1gn5Q^ij{?!hlFEM`&($$9^|F`vj#9O2j?hk~QV(+i-*zz#`U0c5vLFHE? zRJlF_Dqn7a3eWve_3>r675p43-$U=&a?uki9j8Fqp93YY3d-J*up>Ml61>nwPJJm< z`M47Hfp2~_=i6lxsw z1@z#~AK7%809C*1q2h5lRK0!}7Q?TcdiRg*_-ZLsxj6|=f{($0aEniD`?Lofi8=;V z{?CE(_X((Q`~p?)cKOt%<8Y|(&VWjnW~ltW2x^>hzteves=jyn%!Y3?R6D#cl>Gys z+OspE(%~uS!F5pOq{rtry#_+Ln+BEMRgOo&%}`$rm5+BowNI})ehXKi-r@^epH@Sa zgX`c@_yknDn*XH@cO6td9RkbY$*=@|2vshJer3~V92|st1>6~)3RPZifGR&PLdEYj zsCfMhm5#l?w(%&2(q9IZu7^O$I|(Y??|^CtK6U2bLY2>r*ID~Lpwzp;Zg3>r3l>4e z{}`xp@eio{xDP7cFFW-&Q0d#{8(R;1Lxq1hR63SHx!WHqe1}7g3r~Z}hpQYPg(}A% zK-vEZsvd0ht<@g@rC$K2!g)~ncc$arP~+S8q1uBVq0+7Ech;Z5Q1+)f)0%78GLU&ks=Y`uu3~vjobY7#s?ZfW`1;sQUUdRJiy2k4=|ZQ0Z3%l^@Mc|5&JU zcOg`H_!z1`*#0M5Pv=6_tHYq=T?dtJ4?yM9`_O~GLY0f&KU@FygX&)oa_Tdj`YJdP z{fD69*ZCJ)UWUOc)YD-lyc#NAJ$|+Eo(w(IwNT~xNXN^e()UTYJN(RX*WYY-7enPw z9aQ~22g=`nLe+z(q0;eZsPx$}lxNEOP^f$u4^__gb37RC(1CstYP@q@hdd+aJ*f2C zGB3}h*953?SP#{1-Qf5(l)qbSlxNam98~>U4L5;DLA3`b!j0hjQ1$6!sBmuFG0)`R zZcy&_fT}mspvu=GsPdVF^7pTB6ubwHfZsuluLf?MXWFCHQ2BowRQ~2|V%6I~mFIn+ z{Nl>N&(S$hvam5-00^z%B~@b3hb zk7JOrrr&OQkOxMwtd*O@?Ka2pMz=_3bx8K?R_Iuxi}H3eBB8P z;W}qNd~0iO7F>Y-3TWiPk*J@8lGmwwo*C~>gcDG&foex?hib<*VLNCY3=oga=#DU6E;Hme>GHi-hisln{StA+Wjz8x{rn` zA9JDV_W@At|B+DPz7EQt$D#VGci?Q;dHXyw?ph2L&Xb}1eF!QYJ2DvG0~W)na4l55 zxgQ=3JMEYkdL14G74F(zd8Yq62&(-%4w`<+@oA`j{}-tI++n9Y)1S?P^5<-*{Cxqc zo!orqJoA3aM5yw64pjO5m*YoJ?eyloZ96jos-DK7((6>Hba?=(9De~Nr>|$zX9iUM zuY{6w0aX4z162<`fumv9U2OT91l3+03zffDL)m)*DqlW_ieI-rHk^Z?)U%<=TOE}B zfDjr9{L*R9=0gm3ynqTbr2voiN3@Tpz`sSH+ z!?{rY9S2p;uZ0TFXV8qZ``LQ72UNaIhf1#ssCM*pSOnjIil^7#mWK&Y`E)oegttKT zhu=f_-*rHqna7TX%8!Gf+Lf!J>g_vlF5GpXHE)6{uNOg;`@5jh=QGFdgKR$U0lT7K z3zcq-a7%asRK33dDjb(W<@X&><^NsB|3KyQmV<5m9SG&V04lv_LZwRsR6d{Scr%o| z7o7SRsBrF>Z_}j|PDEV`mCu(#mDh)%%KPWggMGr*yckMd36(B?cKSC#)teWg+RKfG z*m^z;%Kzz5>7Inj*S|xh_d`(ib{$l?8!^<%nGL004V9j!L$w=s!ujxJsB{}T%+~)g zP~lHOm6Ma9(&YxI^7Rr_es48A&x{{uLxuljsCMK5*aiLsH-Vdsu;J(iyP@6#ZU(2q zEnqoR{jY*5cjrQ-|8r33`>SLANLxvuR+Zr%t-!{?yF*>#dN?*-MK z>;_dIr$VKB3siW|gG!g{pz`%TsC@VgD&00Nw&i1UD7ia9nGb==#}cUaCkiLQ2B`9X z9aOvZJS>LYCtG_9q4KK&Dxcy|`LqT~{*h4OIupvDE1~lJ0jK|};}=l&H=1J8sRvX% z`azZF(Qq7`0%yR3;28KgRJb=TvG#U@ayJqx{fnW}a|Kj79SPN*T?G}+*Py94P~~Tn zskZ!V52YRjmEKdK(qTWScpL*2-oHcT;|);qZimX3hoRbqpP<_H-KW`hbw8-`bRkqY z9)zXv8>b#$YRlmYsPc9eRQq`^RJ-<>Q+M0TmgBKd;V*|Ocl$%xJJs<}eMNsL}0*Ar#q3ZF|Q2G82 zR5|N9+lJSJ3jYkK^jr;dhr$|E%85z4=-;57IcR5-SoXTvuHs$5Ngith}l`k8|22M&Zv z*CU|P>r}WWyc{Y$K7?ww|Kr%B%*r1EWj@t$F;qQU;nW8}`Ev|Zex3%E&JRPSpBR%|8O^Uq+NCX-GKTs%--YP z1pQj{Z$_^}*%$M+7$GsKzUZ`gn*X+siyeIbk zt1I^Zirzs`m)iLoaC0>3{n6L;CkvCO5%ivScBMTHS*K%v0X)XpzY#WaN6`NgyEi!Z z!qMDcq4z%bLhi#*55Vnj*jJg=Me}E_7vKlnS2(#ZJIZjRv-40u?^68Jb+|?P|54aU zIn{F9-G_Q}XE%)BUppCp$E?&nt30wD5vs#{Ah)iAoEtq~>C9U&;LpZf-{J8t%h+ zE`TG@r&xwgac)LA&c}@II`j(M8@rR7?1emk!>#KoxUqXa8@v8hg55sIDd4Wcd>=T^ z$@T37xrH<9g5B+Kdp8`YXDkhYy6Cb(N5Y%98?b*N`iDaGTc^Qcn0ItxRGX^nNc46< z@83?o^bY3U47V#_f?NIj?U+yE-XFU^V)i)hF67pArE?o`>fO;R!cGNtw?OZ4%$GZV z*_H~Of%*B6AzAwR7W;G|rcaaR+dM~c)4=^#)YG{afF?zeiSz+qBjaog^h3t96-2q4RJC*M*S3OjS&VrGnqey z`Oe7s4Q?kp$R6tCZ;HOIIo!3}`(fu4=k^6>=ijJ5bb2e$>*bzTVSl)@^DG>Wei?eZ z^ZY7zKWFb1WOhaWS2zOwH_^YG=kK@~0+}`uADTQ2|Twz|5AIr5Iv?aX3tjr z##-(e>dSpgjz1v(Mf6W~^5&s#cCzRq&Go1Y+wt)AfcuM_n-uoWL;qc8Usfu)J2`bv zxB&G`XJ6)%xQ|5MDDIb>y}8bOGI|TRFL&y@cpi$KTX2))S=VarTe(+aXIsoRCvQ4n z#x_*wKJNd>64$Mm{RQ=w&JU~0IvMJ%aq|Ki%}#S4)O%vrzYcV6u5cRvgf*Cd3H!sv z*gu!&vH07c`vey@S>JF<%LfF)GRzGUjvl#-C5PkLUi#nfd63UJN^j zKwUo}V-P$6y>HP=!9}phnA(4H-Lu96x(>w6TX0kCUEt&xgTTN22;;}7FGk)G*dNJ# z7wRXR{XfHr*x45I7ttStxvsrXFNOEO5$N@C`m5oe(SKT&+{KVD^cePTN8LXVjCovnx{dey7 z&>IN9a`u>#hW5bj*4(|hXCmVbcpY{Q;AUtZ+6}$!;ZDvC+MzA6^F6!<{axVmsITR@ z1&(v}HbJfHM5msDoL^9TsPBf?V|NPAN%Z}z3B7I6ds_0i@8v#=yTI9bA2XfJXhv@t z_f7b*3iUc}jcGeNKX<}x5pMp5{?0t_OG{v2kv@mz?UpLre@h>t9uhMld@I~g92oeAh&?&QgQw6lML6kL^< zoehVeKZfVt-2HI7IUI_f#?Jn=qjM|ueca{T2XcRkKf7YqfV*S3pTuq7fZb6%cSBEC z6dsG69j!9d6}LTk&VzCEmpOf57xer~-;HExAoMR^1Ac=#$z6=uy~r)&u61sHf`?;v zF!v7Jy8Z@t;@+G4RHrBX?%c;=e|vZdG6wRTLZ+??p3g+D5;aF~%vhc+VsplLI(i%P z+=6*`?jv}9DxS9RsNc6*X6$}D>QWaD zr=5jn%uYk6A)tG|d;S5LmpS=^kUiLi>od$RM!y4Y%ei~-JjdDVj-5-mhhgVB^lF@& zA5pL4-Z&>L`=fWRv$F#GkDyM#CU`P__Qw7_Ja>lAV()97k8<|QG54?TJn!h#$G``; zFUIh5WL+vtxS8$Dr96atHz((QIGTG08F0A(C1hdc3tA{;s(}-C< ztVZt(?gO~Z1&3j#>tQ&nI!u;C=$LzUYm2_CG`ZM$Yb+j*npWC+?-(Q?Or+KM(UW{$qu7;HtIbv{5SV-SqfbHVs@$1n~YnJJI1Z+S!DF$d3QJyJLhnpg#Kah zVPk`Oi~H|*z8$?so!&**uW|lwi~H-*@8V=W=IjXXY=-Rm&lo#&MjR$O;l2;`Ak;Il z(^(d{`l7cEISKSzNR|V#u;`UPb zFYc>(*3~88M(S(1x7GvK=Gf^;oOC_J^ZB^j19gqn3ccoJ)H_~*tnrwA!hJ?SZdcsA zgPjK4S4)<2{}gInyK=V1SE+z;U1U$>J#z;PmWcIAE;vwhLK73!LgyFa6^ z>tpolxnrn{xwpYgS1nxP3K-U%7UVt4}2vw2?T?7WTM zht_)NLD-FZ6Wslc`$z8i*b8%?$Nd&||LWX1CkDsz|0MKBBG-rh93z6{^_h2XgIBOJIg`K^* zUq^pA_aV-FGW^-u>Bn<5_b14_fcx(}-;3F`Ja6Lc2)(#JMbE>$isym&`zHJcdPCsn zs1M<}6!TY6>za%D8q}fAm5HioL!>6^rJ{|Ev3O0&izK67tR|jFMyrN&33cgG)>2=Q zs7ra($wa-^H#M$H8=6b{rj}ZR`SGe~bu1pO@=|TNYu7j}!86yAdC~owqA7*QYe*() zl975Z7H^Cu8Uej1hFmuea^k-LB6XnjcBK1*Y zv#c?aZ1fV;_>BAWDY(HO0d#v4f!jAl0|E$wqzw6Zal zhn{aTHnyvqBQr~u#k3G62rEF z-JZi73u%YdiMqPPDy3*@RjjeHHfr-a(V(D4>SV8PYN&Ep4>sP_@~k?MtdBI32m!#T4^|Nl|ZDbKkmVuQCyDjKtz8uWwzISJBdF6K06SFBv>|DUu5M zrpBu*6(uWcV=GAjN=~!67S#W)kGVO7fOAFFKtKR zQxaNhP4UV^Jw=A{;R{JyNHh_$c%spxxK?>haZ;v=KvXBvRwXyoWpXSP@k5jq7=?9m zOFU8^tMuL3tZqLosyqUmjM>ES-TEPG-&s?e&P@F>J}Y}v+$ckeP-JB!R%Z&8Vo()J zHPl5~OupMHsq~prS53sp+{Ts$Q}|5cs_3Y0VPRUdxm5-z?G)>2u~eh2lk#BskeYbY zklIM9w!c@=RJnqzsl$R-XR4t$pfS-HsZ&1ot!r`?QUhCy`9n@;#43^z>W=ZqPe4;P z0|hTD*=8lYl~iYwOk}d3WYvi#lkHw(EvcszQR>V}P++~R3>h|-Qcb<7_2Wf3m!2Xr zXGXa4jL9n)TvQK}_Br^fmP#`Ymz zqbZa*QKV1=Dn*t}l`c}VCTe`O<=x7lGzE)YmPIw5eKQq4*sx+m@1`EEZ&hwXpYNsA z1t=Psj1P6mI8kc5>Yix;Q&hn0vXkY&@4H-QvVO}OEH&i{OHDG-)bKkYaCU#kmTUfg z$FgZ((uv@QA~yl%+osev4s}`J>YW)G#Im}LoU)Kr6ntm#XtXMmog3o9AA0yf$Z?ZZ zsZ6GO5jTn$)*Q<8_wGrJVp;5fp#IEgeU6UjmDEKTJ$XfS44%5Ar8Fc`shIlrg8B&k zTs%5{9ObWm$ucvVS(QkxSeoy}Mvfhw@6}f_=2{Yt)>SWE9j=S630Fkd=6ekdmH8Af zh8$_36z=d$Z%ILYG8Rr%CSwha^rwDc6^gWqKt_Y%_Pi(z^1C`x8KuuMeHZPpLhgCt zaJ0FyuBj>-_RDR7y0!7%^LJp7k4E`W=4^5+ECX-x8}_%nmNTr zV@4uUMP*?&(-5tURmX5-?PS~#&v3k{F3hN~I@TPm3dibALYjUh<;_n;y#u1j1igbb z_hRZacN^tJG)^$jyZbQ@hg({z)VW&U1OLmLl5vj_Swke5Vya*)sRy><=o=nBmXWcm zr>%>=tA{~(t!j{Gd&>SPZ$YH4iRzVB+bNA4|8Ge42CKkF<5e~)X)h*4l@(l5)@vji zrkrX}&S1<)>08w~gs!Fv=Awb)(v;8`+nUGl+)SCQ75=N1WX#De&E-@}wwz{oy2UUvOUWy9%ez~N>E(WG-z5us?wW3NDu zdK&M|W86oLkFTH<)I{UaBy&b4M3|ewrgKUq@e257-8lcu94{7cAY`h+S@!Gd6godN z)`79lz{omL%20>pnx-e=5kWoE_}J1L4r8M+k*Et>NlrzpV=Jsl%|1@Ij~~t?Gqq&6 z+H`dV2IIZiXeDVk(p8;oG)CEuoHs^7jxRNpl^Gve!pSC6ko;t)XxAoI(Eu?lvtt3G zQxWyB=6uljvBfJeNat9YX#!fjNF56Xagtq)mKkcccnt~C#CP0w<2%K*SFSBKs~_ox zR84jp&F}9vz_hO#&W26?n^Ize>j%{s+QLC!qZ;DENE=1Qc?D#mlF`PotR6A3_8x8=3gK?knS^X=O(RLT5Wdzxt$GWH-Faak%^MIo#c!;HMo{MeA5q3b^yU z>CtF|$MQ~tsdlcfOQ&*neYF+O*00=}>avC663D%&t|9RIw_t0P$;Y-F*t(rHf(VEA zZ;C}5^S$u?!5A!LXz3Y~x)v8vrZ-wQNsmO0b&Wk;c^Emu(}YVJ^(qJ>M>vO6@QOq# ziWe(0UNAhDX2yz{TW8F9VlK?e7j4L@BqatZ=@vg+^hX5xPHQ@mMs?h(6z*~* zxFS-yVpSwr#dKDd%+TBR@Y&<8@MHuLGTSO;DwSuK*4k}GvxadlOeKi2O?*zvIEOC6 z^P5Q;Esad9Mdz{0(WlPa1|UEw?8BgFF>R#tXbh;&DJcXnZ)yF_RgYM|h-y5t{;9i}>A00gU_0oh5;-ksx*>F~t8i@^7!Brw;}P4y zRcD4F8d<0Z*5D=RpTs@%BeX@x3+3edd%hgti^F{w5}nY&i+Ft zt5~$qs;*n`bM997_OduVMh;D66lga)Y#+~XO;yl!#Vhb|1=hk0MzXH;x^=$RWl~5j zSGv}C=?;Mu%4%V>$mtx{R8rZvZnu#sx-Zw7D@E(X5F1%u2J|JkSNK0dbhR85OfQ4Y3RC{As)yr3VMvX%pwV z5!dQxo%6J@ZLfSOls8r?nXxv}@T9wCn=ww%N(50E)hA_Tj5jH&u1EULX0wfdt6@gl zwPch(TyU;iaP5jYH@VE|dJYIm2v)TA>RF{3ooPFcm<{s=4AS;X z-JpSrr?iHnRa2L!aC*|3SdcZBK*zt#jKpsGxJ^B4)k<&2U3-p9h>9vIlF^lJwn;gw zvvWhc-Im@zv-?5=`lbdNM{J@QBR6~XLuVFp{MDXG+LH0S1yo^k&8liP-E&(4Hr(MH z4gR%%$Kn`4=xal}z>ZG*;5ywUrEzwpmdbZ!jy&$W>#)(yvSxCN5VC7UoV9S6Wuyw1 z(VN4fGh?B?Rr$6=t-hk0V&+Ti;So#%05JFYMK=*X}et zYO@dV{1L3#8!}et2U1Mn*jZ*M+)jIgGcv`rLt)ygI`+<65>0mg8f#?1riubsBN6Qm zG}1oPaOG}UDWk#~II>~ocHyvYF2B>um@sZ^y|0#%-wTnjO0)K?t4LeK{#pUXYL-Wxm2tE`PABbC%1$@rsf1-`bO)_%B6ItM!IKr-h{E;24m<8Dmjc3Yk(Yh1!8 zHl0#-P~%U3Dypm0p}U2GqExDhl@vR%GUe3_7}V!!)4Ra8t+31{&0N#prZB(pXX($* z2Cck!o5Cg`tRfbtgAYfv1>VS*x{2lF0;vdG8B;YqYUeZ{F5j-i+VB!oD?*{uG^EX7 zxg3_jiUc`o-D*A4muurnP6wllGp0!Cy~C_>Vid)RIOUTGUfNC|@7UGgEQQ>LpQtj+wnHP8X426ZqsBEx>e=NYbego-AWPtW2u!d_9QL<) za+(RVf?O%7ITmRCb7T<^JBwf^+eTT_w8Bgus^PmYMcduWOq^xOOz70yDfLXBtFX;O zUNTyrSjnQk+pNn9-8^HK7U|5)B2#uGHIvdpeS=oVv(n2doS@9i#;j9kb`r_#^w?Jc zt4Yf~5o#3oiv;>Zkm=c2I!%GoLEjK*UQYb*&Xv~{tS#A6 zmK6l;p*MI@s#FUNAtj0~(G+=`Q`s45q?s{!WuqU{ENM9g3}7T^?67*G@hrnJ`ZVn=_%032 zR*K5^lo=(SGxy7rsmaE%DM4oK!xz;?TuKs2_TRD%sJ6^xIkK^W^2@{}!f1iO_#v~y zY6UIZnS!=q;;aPZg{S(-Y_(cRoZ*7bl67YPPJM3!{gCOhB*k>x(a4Huyp;fxUKsTsOOwSHiDLSch>b zYgX)%u@sv^L{pQrs#r>5+HCp)tqaTG;q1^!z@mTvTST%$;|qwln6*O6ZZhmIkfcv9 zN>B_zX2!sNCd<_YcAVjc56H~)GYJN>^iS%sO*PKgH7DRC%q;M59L^YJWTb;u#!@s> zT-kS4NFXaL69zVrh*3KKY9b9&_R(=}LMo9ja_CPeT#)bJ>S4(q0=8 zt6Au+jl|h4F}BvIgWj(x<%F*F3S#lf>+ z>m&bl|7OfA%J&w`EHWK)mdC6qDZGJ*+M$BhGZlnP09<;9Z9q&@u)1)~;5Fg3Cd)S@ z5sFP(dW6OVL;<3h`Wfj4Aau$Bftd_&;i{{TP$)Ha{xABjJXZ+*u+K#Nzwh$~#F@NU z!qV7MSMu0Nh|?1*Cycf$fxhMW}%-C18C)x2FO(0 z^st-)t)Z_1?MH-#&bq4cg$42Gs_{$mT|}0$H7-jT*|KE9CVPH*)Ft9Iz8teto$^-W zjuTaD=p76-a@nAqn8uWc^$3Yf`>G(AvvI`Lj4R-rXJCZK{H2hT*1GPu?)RByB zKbtj!BAK1l%tV323+YmL7M_yhtyhvnHIF_;G8_I5U`=F6V{|~Q+=l0X4Ob$ zt{X8nbh44-qD-ooo~380E_Ypz;6{p>5VL^HDvbsk!HiUV<}v7(ncst({4|-}Dj#{9 zAT36FV&-s!WN;~2GNxv=IWq#{2u&=R@@#Od{r3O6gF-|tJry(ZQ*1SJqz>)e&Rdbt zxK_)`G*0f!GVN1lC{TvuM6xO~=aH~#4JFG)<_0B8m^oVArYI#(*+@T$?flM;f?B1` zteo_qh}qLnts`lsiT+&74Gw*I8Z^9NnEprq&5H>BGFSR%g&0xJi`xLIuV(O zwCz`GF=j-U8J1^>3foaD=a7BDc)1l?)*G%FAMER zyp;r#Kn(mhG;uic;%^nPS5ylV3(x zC1d7<9D6m*IXhq8OeRl8rfUq16{b?Y8()T&<;;Rjn=)3|a0O*ZKvX@K*2bb$zMKXv zleKf@hQ-V`2}@P9UJG7&)hR89{q}YxwI|2ANr%K763pb6zg?xknNg>&L4CJFKbiwO zns<{PHJQ26Z1+#j_^vlVnssA_7&+po28l|)3(W|%w%SQWr~NxoFp@bONoTwv(!8ur z*AJyKNPC7gar2r~Ru`s$%$zCapaEsmx1wo+IyzqhXX`m!!+@EM$*2YxOeC3Nj@Pb@ zli&=8S`*K>kQm?5&6?f9pfDpD;R%w<@hQapaixB?A0IMg|Q>4v1IAH%d5ld+QIE$PQR zBrS`KT<>m+O6v?dMbk-T9ZvC=lL^km>@kNc;Q_R}#fk6h+o+L<%ytAT^6q2^O{ zJ$=^vHd8w6)0{fJ24o6Y1Dg(R#B264+*~PylroOnvSEsLIK>pi39(0NjRr$WJ8RCY zR(I}m$E1F!o$hy@$$0{{zGU=#2HS69UG|9x$PKF96l}vW;68R_cGczT( zHl&o(xd8lkwiSdX1wkiJ&8H8{t~8V`bywgAxX&+W zdu(D!>5M5hM#2BB2P?8Ck+lj+tK%$wP}(|Su|O{Tp-S45EEnw#Y0Ow6A_1-d;kEf} zg5>xj{IX?@a(ASw<=V8S0jB}i%7XOnC1u`}8-lAoQ_eJ+=jA)ay+NYLYR)IJmDoBU zStBI>9kI%wl(bLjq+H?;(wC+M`tfQjWd3;FS(cb)lRO+5O$)Gz+@2UkEa03IV`eAJ zKl*AN2U6F5oPYyu!BmPiM=P7`yV5R5D(&IPIl}y{H9suAC)vUjqM#JhG^G+v+D#2! zr8-wvA8YoUnOS=k!NWQpM8|Y^7GjobvLDJg|nbR(eife2O*1n9Ulp2&uW7A*c4NsLACRi0Yr(1k6 z18Dh@kyWM{8OTmdi&s`&G^xx~3WdtVoKmeIEnHGJBNk~$)>oIL67!bwa)xxnRct?0 zFDXQdPS52RRb4cGwjRuT3zwQ`2lE4 zjQ?)FYvKK6iEvV~%%C}4E?Skfz?fPuk!h18Cokp&Lllq}43Qs#-<8(xT(otwo?bi+ zuT%(HHPe}Pz%=dcHq;cHm;|&ji)?H1sELMYw%w_;;Pequ(m@80!orzF#nVb>*}k$3VL`juz!-Q8Oh9%jtGB>`q!2&Yn|l-)Jz4pHkWH1F0wn9Z1R)oeks_+gK!CSP{#8 zyVy<5Wnk_2V-oXSk$Jk>8}Tv9wA(&;Z3+y3C2#o-hVHgTskihG#<48DNR;}QoKygVaPhI^Jqlp zx)@0`JzJdwsSV`qZZm| zp|(N)qg6FdN_gc+J?+Owhx%`TJaP`dBaN~fUZpf?eF)h_vc!(G-SkL#Ua!wBG;)x^ z97RslHPy#W-XCDnHdE`udV`-f++O~adBaSd1$!2w zuxRpRzi^rs!DW&C0MDvgy>;TO>N8B^3q3h-2_jhuPH?ssWe*RnUsgemEW0bc&E$@+UX=}Nr%jwYe?~eHB+cn)Wnp3`fjpo@@n}IR7Qj?kIc|A z?Mz0NTq{2tYYP{aPA;G3G9c40SY5jnP4gFF_NW4{GqmP2W2|1K1Ln?JaPp&Yc1cOu zlyYBM5siY=p5@*{eRRW}#S(iPQh6G-TV$D6QP?{3}%-`3@`g+cakhgvhWk#IoQ8*RDPeQj< z?nH%1!_3(SKkYIswO;CnU}tdZ_cGPrMxjF(ECv9wPrrhVpf>ENIhqc zTH7z?IAZVgf2!1G<3&6{tN*)eS|!Cmlekf-RY z7M=M{Wan}Y>~t<;q0N1+QXg5-7cb0bEc|XKS0Pq?xy#Y-zFyV_s^dr*P%Zq-&{rU5=x{E=SB8jHRx< zGw*+?ckUlcElV}lH})qSR$9*6gjvB!E8MGx>$Us4c6fVUiUyZ*Iem zwKCIw^{Wl@OrXuHelsIAu}WDBdHM`TtiGw9&j6*HcP||$E0@n1M)?|(EyZq}mriPx zTr8+}(HC9Q$MsAr>Du=p#!e%#E7z9~{Z?O}70k?E86($3=+*g#3^RN8J^~}1S{;O* zHM^W4C5Ni`vT2<@wM2b4KDciY5(eThsma93|4I=NG?z*<5AID*^P*>)uX(m1;tx1A z$!^M=^VYp>I*UpfGU3yQT+555niNaFKjvo9{wiE1^IXv&P;wXOEZurtmQ6gET{e_v zHlyo85rnNpvuy*EHYm;B?Db!Wb>?L)^+PfVYE+7mBJn>WDC-+fPNLbK7-Ck^_;y|9 zE2%be>2|&y+t|vn(oUkZvc;>h`tqi_oE0=$O`iV-vHjjItplZzH(0e^VZVIm4BD=` zw)V_6-@LV>GQLP_63%HgXkcW@GH=tD&z?QQny%v0O`SWd?Kb^U=gCp~CE(-usO*@U806>b*1ZaD=RubNJKPhG{Ia2A_k7v@#cc6xbno6QZG{1gpLWwBn2PPVa3fZ2T?B1=T)8gn%q7@~N8D&iLo>aYrlDA1Bt_DeN7BniIgN*W z$XseShMHDUd6Z){w=u!lf>^RqzGftNb81^s(psN@^*9SiQaK_;=>YxjYnIg2WIjjP zUg!eC{jea^7v{@qB`P=B0|C*aZJ7O6)zc#=JD<^6dX|qEdWO>D9__|@k)~$VT~75= z3^N^s(#DM9PTK(@lB%cCEil z!iz?Z@Ylk^?&I?*kA2Y!M(6HKzEaRwWWUtd4SRY=xPhfPzFVcGyf*DS%Y;8882haR z*ZBU+qO*{y*9hKC@{IqJGq$kS#7M||D^k<)^t8{eD>lWdQbTL_XWY$d z47J7-*k3ZX%d>3P^YWu!ia=OaUN6Y9<(8Ptw11_YHT%c<6o5#UWqoL|nzoGHEH6^6 zZ;dRm=PJw_Easz@ODfuRQ4ys)MYElF15z~9+P7E|TWWfqC6!qMT%7f0l3q5_t^yyX zG2ck9)th_fEm!v)8IuUrSFv|ds_{j|jgj-q=5DyxUE5y}TZDr|I`vYeSC6MTKhoRm>e^u;nAyC7kB zJ%|)F%fOXQN%L71S4Y#^#U>ytvm~rdVx<}S?7t+CXJLKY zk8{7wz0}kAUYRLamaC)!hRY>NV66z*G&L`sQGLu8|4g2nsQGftXkUdW;D6Sl7-{C# zhl6W}0o%<>0!1dwOKyBV%6&9W)uN3gHa`!b_g>BTP(7;~>JKPUS+vbr<})&O6h?6( z&I-1QQENR~G4l>;rYmketCLTZO8a$LJ890RJ=T(t?;Rs(mPQ8HjjX~#_3nJ3#;M0U zWkKJn@dbRlhEIIEPa@fgqK4m1A#G+c)bpwJw4!7U-yYGj7W>V10ToUCa)L$>=51nI zmD~8~j(T2&)s9XLr6aC63cq-fh{srT@@n|jqWzE#y6zht5j#?(9+?CS?1K$e;+dMx zz=c<>G$ly8Voxk{Ou{;ic(bC7ywu1vhR^C~yzk9SR5fvALGBu~cOG$HB{BKJC(P|v zKw22YN8%|Ow|W&kx^`DF7;bB~3-_$0u`gRXt7JAG*f4LF@$nuOS@`rmiCCqVQus8p zG9%kE*|AK~$ksKvW%McdR*aD%n{j=9$_zgOewq_pX}jz9l2orsB$w%Jn6TO%b?1%N zi7i6uV79S!9I0Se%QVu#+M^E~D0OJ(6hsrpHXNI(AcSFW+DuWb<9oS2O9 zSAa<9B@&6vr7E?&&8Rs8X{=AfspdGh_QQ}V=1gXj%uQ=lXv_wZ{n$)8bXtY9KW38i z1v|CyR7=*SG=O!Va$!%zHfD<0RP(tq(|$S$r3`@5?~5hX^^S#IrWd!SAOt-0unoZitd3te3!P_*ST%X7CpM5!F7jUDr$PYPc4HHA)@rdLgRV`7}y{;6ZbjstJnJ=4*A_N4gq zZK=OEq)O?|1v*K7C06Ha8U$b{+g-tX$W6)xp68y=Qlh8T=%$KC;Si?g*Y%UcMB6`xqW)WhBkPMP9r_RsXE6TQ{=R;PNuC9V7ruvC z8~d74n&nIdT%TyOLx%rF-`to){>{TbS33D2jz4sO;SWVH?MEi6tJ*nRt3$*lB>xW% z*!pEQH{;AE^aw_4`lS)S9?(DAlK>Hq9|xiUYW!mceGKsJ?utgNTGkWz;uhD)>>q8(VFliQv*0qXDVIc zYF-;%xrQCI6->KZ)-r;yA3bs>z06r^Z-5(|YH+4+#v&=PCS0|K4@0TcMD)7H>alBv z4_h;QG$P#PCn3Xo0vqVQF=xrI{bZlO%IoW>E3$nS)g0{WC_^Vfw6W&YPJ^ zE<1M!jK4rqPDWnk`(-(darjXwj5z}vtd-kK(zOLlx4FRdO(n&Iy9@n%3 zCMmQ3`T0WGV~WR*vY0NwO3Ru#A*ubsk&ca@1!hiVqh|WZ^_|8__q%3$t5w-(zfc4m zwpA+HE))#HNlY!$=Uinv?y5@5NStLIw+^9?E$Itl#)Jh+mWJ(cQz@&@&^MU3?aY`w zuH{y9`Ny=}8i^)?2$m&gon#T7aK^*!x=NCUbEZozTw6Zuv7 z&FS_s6E|J~Np}~DpIgJwIsr#uys`P-@L_5@hmTgM+Ih^n zCimQ&FVl=>_9n_nR=*}^O3@`pOvvcg-xOq2EU|e9Q!|$Z3gN| z`cIA036go6Lydu?*w)#MGnSbZ*uap&W|q^{GQCy~&G5<}nn;2v>N>TjgLH)j*s+hQ zDhh`?;*r+Z9whtB>EG3G=6--OA5-uOY~{-|B!0bfeV#Qo31h2{pRTsKSGUIsd0|2N zNU|R!)m!(gYiTnh#!aymEj!JO={>bpMXrqkH^01O_~>+j(=WV`*T!*fk!!cW%`Yjp zO_lxGjAqtk_)YMve9a7`>Lbl&Y)DU%SVelelHtAvrU;lRIxi%q+v-61D&mz2%_S>! z5|gpE*%J0GYKEzmPmi;ppUYBVHIe5)SJ#F5Uviba=uvq}N#{{%lY=&%{ z&gMtQn^N@V_V?DzL2>)RRDGOW+WN%NGSVp+*Q_FJij2k<`n-~gak?lfcxFAJvUOG~ zm=e=&b|-E9OwU=Ht14=8ii?TrLh~EEq>0-al)xd_^@}`k@eQU-t7o$v$a!mi zn8>y>Ug>1oKh><-XpHxR%sib;QG=ny*YdU+Li6H?ne%DG)1e#HQsK79ncjisll-hP?lpDD+x7VAVF;%4WUPL?Z5V?1UD7t*& zZe`Se$=+?2o9!O5Jn0M-zU+xcw(m-&-+zOMU-ibGzkjg47m4hfM&AF_dqfo5^!q~! zxcem=`{I<1iF@D2f7godJ+_rFN>BSXwEIoxbTXu~-x;`!*B*#p3*(x|`U&l)re5#L zdjCJO3S|nAGYzioWY>N_1i|?VJ#S`FxvZ(7P!71po7${hBWpf{vrpEd z|I!!5XZ390|~nLJdE1)7mLrWwH? z;$D?84$?yXJ&UOWCT zk2>uOOPr0#o;jOH&r*w*X)bM&`#-kP+P<;wmwh+*+KcQp68v;4u(iUBQ`{WG`Cw{` z{0RJ@hqa7X#t=t2<0GptN0~uYVY`E>VlB4WAr(%z)L%s1Mt6c?lpC?*&m6m(qXJJe zEo5wZu2Yq_b_K+Aki21RM`DVbF8>|2%mB=cQ!|28y8^PbLT#HPuYdwMeu*6{n2G9S zyYXJOc&7cOk#>dHaamA|4UGQJXYJhV-~YZC_pVdx-|a%of(`o}9j)5?L!UxE(`N@k zHgWuHBs|*dHX|nuk(8u$xbx3b2Zu|FfyO$%nN0|P)SpR5tl5=*^8;pTr{vOIYT7tf z#!s6i%rPuu9Oy$DI74d2hX04TcW-a%y7qtdZ+I2jyFX4$gB%FE-Psgq4K~CL*gUpL z(!;~!$hI(wuazt=yX|{FpYOQLHP@1CobJo-s126Zn)f;8xQ{W_t^-L{o&T%z+-wBM z&4E8*3#e@r z%rDt7&>QZsIv`Bgo&&^K9zaxD?-P`v(i8HKO)&njtHw(FQxgF9k+55TAwPQ~fiUSq zwQ+O8x5*GWrAl9=P5!@u>*fYn@93q2UAQxsG<9hs%vdsZs#@~;qK0|DLdWuPB#|={ z#|Q@o!{12^A);4=N%-NUx&#Fb$rdJa``T#I>tB32CuRnxKfl*cMjd`C zWJxBc>3;R#M(;O%Hke%R=HTA%I3+jl-o+L5=5Ov&;YN?ZkNarB-dc!>ewj<;mdGe{*YO~iDmZK z&k}2s$(cMd)!9>AN0=fsY9dXG5m8rQ`Ct~jN87+2aV2EVX`_}pk zIFB(|8ED-2B3J7$A(saF|9W%!uU7Eo5HELN^&CQ{+nS^|!o!yVP0mjGo=#XO>~{al zo6|3stoU$0%@+ z7CV+-Nt#PGU~3!ZfW(sIO?QyuY^1v%ae50voHBKw;2%UkOa~N*9_g~r^u8)u0RKK` zMf6i@Kbiry-x^@WBKwa5Wx3uppj}x6sFI3OtWegiy1u09HA^Hc+I)TEI}Q598NMol zjx-W2tT7#pjsO!})Hze;iK_*vyop80ZJlE#-7c*G>gGf}f&xvRj%zcrEcO=HWyJ@W zyL@X)=gWdUe^t@Wd8isxPMPd8&T_pPk_alySArm75{_yNKzvp?8Id;cr9klb)PYun z4A*HhB$%3A7Nz02)xV+)JFtJ$Dilc3@l@-LS?$_SBHZK3UNa`7F4S~ekqOI^fwXIh zG^`(98Zu~sLOyI`Z(lmS^D8#X>O0xzh<+NO_7IRzNLP0pol~-rlwrv zlM1Yp&wWpw;y6J|_brFyD5r40v)SRhG+@fOY_HB`Q8vkCQSY(GR?=WWD1)t^jJOF@ z%rZa9%K`}{k+(x$W@vLt)4XgEpysiYhoDO_JvuyrrOE?o2&07#JoZ0%H@p$qYe4=G3jf@UPiMvQ&SQ(!o#Cis-vv$!$2I1Q22i%I?r6QG5MO&|-9x>t&i zpr-n2X?X;HliA+hc>2!A?%wpQtoYHabvT^tp%;k~aNR-Q>M|$esU^Ks6jY!)5rS+2 zb`_pScWOjkAC zND)PVeMt{E_o|ibuXi6%Cx3^zrWoqJ!J`7z^h0dLu*pQV@GY(=NFfi_oO#lEJmTl( zb_Q_l6B32QfNE|snQ@z?n?pM(3hr_LSMLEBAr^%~DH-rQR!0mjN0!;?8R%f5ra$(i zP*o5Ss<9LRqt7e)%2NeH3Bb}0v0J?d@l?$=zoM~tr(fLoo<(B_%}X}$V{e81a80CP zjTja6!B8$__DXN1DJvowpL~z$-SlH zl}{c&S;h0=j8iRv)$mRs2|e6#(y_oe9T^zJzzUB%hS8tCa{vV(&GSBY#n4YF!m&6K z%wAdqn!vKDO+Weocgpfee2>ZZ0IEMdAmbug$M)KupW}t^fuS&dSjAk^kQsyA$OsBPQS+US7+tKm97#3Em&~sT^ z!S;r@Y`A-BFK~ky5y6Vb7l5sC+UbrFG%xkW`nO7;7I_=ICl$jCBiqU7;@#On@5$!Y zT7T(@9MZIlw|ZcQ_HyNFv+RBhIV`i&0tZE)E3)1JK>6gAHtlOjOMcfE6YmbHEOKxg zEq25<+KVw7yMi=Ap_9Y%mqz`buRq>e+4_qe24zx>_KhW6283-w8bqfwILFAS$wD7-B|;;{``tzVn>%;@qyKa=!ad;Z?FF34h$|3L$Jm5!%LJu`3CMz< zQ5dUyZiwPN{z$;D%Id^6^HK5Hu?yx#Oh>NOK=17L3gN;EScQLw;|{AK-GUSWsggx3 zC)OW6+prtW!c0qHm7wDfggyfwR)C|TdNaM4)o>Pp<+W6zBPzIBU0>@QEIX)%u|4tj z*f-hFk#Y1N-i^Wdohv_kkzvSn>L`4Diup9{8S!*${fD)!QZ&o@(=3`#f83P^z^+i( zw;FbR%FQw;J`$)~;svaYmWmvqxBCBr10)lS>QK(}M7Ke78H*H^tAE+(FKs(VTZ#0y zdaLG}EHjR}4Lqa#v%WCdnu7!-V8#x??-tA-MG`)Y)wP23cUiLmVob%cov4C2#~sLI z^a&9qS{@P6n911B|SRvt=hMK5<1^h!Y@K0zF{V*=r&_E4W%_G}IQf{t=;`FYb z>0}+9o_%1yU_OuwlgT9l(0LbQO^yvd4 z0LO89vD{Ob<9BFX$%J&Hx3;ylxpkk!drdOef=3Sek6w3X^{?5iYKjNH+oNt z(p(Ihyx5hW3^g47*dSxykGhztL+C1jTxSUL9(v}cDN}?{JFq7UwKv;8A_e!=g{(`J z(X^n8%*>8X(YcW^oSXv^`xMrH_Q6js#qI9J{ zzPvQY1I8F0`}BaAc?ED~S;GLuGCBX{xt2RtiMQKmb__8E17ovcSCZ!SJX2@y>1-mg z37N$2wvMB|w}Af+_8S=C?l?dd9m|d0v(25JrS>!uoAQW2G#~3c`16L&uCF#CBq*8u zaXlW=!bzAm3_=&S$GrQ_|7E$+Od@s`v-c^Y-L1>zjFbC6m}8!=nkmpY@kaa_1}AnL?GJDw}GU%q=7{l?hx*7EM$a z@DN&caI1gTU#c`c)IaYp&1+)-iV*X(U?!gP4K-zGvUrGnvqRnHq=vK$)ZUJZJW~zCu2fwK;84Ys@ba=fy-Nx zAYk`o^8C^B_r=HDS!J*%7C5-hg+Pi9Tj-| zYW?}@E+mO#pb#UIE)R$=K<#+phpCi(wnbI#e@vt7ZgwEL*ltw|NxS=o8Til~gmgUl6r z`SQu`4==z8=jZzn6**At11R;1S&{81@&jKwueWj}=Mx`EXB;oLav0}WUM(u6Jy&Jua7O78C{)19(AMy~GQ8VxUO&=_CN<}pWKJ?NP7ZFKQ?d(|+ziS1>3dI$j(x)c8gg4XEd z+=;L(9Zwf2{!wp@y;EIbIXB3IOnD(D(Xd71#vtAShwZ>0UMyu!6A!JG1(+0kNsA^( z2q#GYC@&g+YL{4=1mrd{dx|&!pOR^CVm=z9#vl!zjn9WbqB3x-D8`ljpN<#=^7(0# zst0#j!t^jNsnrh?)G7>8UP8_;fk%y95*gB{iscwhv+nsYJ!%N=wjaaEgp^)jds1Hq zfwXGM`3kOg?TeE-YY$L`3xTaUV{go3j zPwsjTNYb8QKW3vM?<3Vqm29tFDKEggtX2%dDa>_G+duR zTnDSSsSLp;kA*TbSa7o8v-rF=A0fQ@nKxD<92HES(*EPU$+_q90k>*}|Aen}vv1m2fByHD34 zc)B(2D=eA(ezvw#I1^E}ntb?cXIr|j;QNqz1ShVdk(Q!Baqnsez~Hvh`!5sDo4ooJ z1jN(3+fTqsEf3+Alr9zMK=NY)J$&b%Pa5O(?UJW(|5O@E^TNcd5n)NbHcM#fyeDu0 zDLwI-kpH459t7i(fkg-hX8{{gUUrr;5ml>45#u_|rvjTSX-6$e$MbG+z`VhMI(kvO z_1tjd7Pl}hZMn+RGU;fOZuPd>w4kDiCQMW!z!n#KURRI26-TFPPDs9S7zBrGjSLgx zw`9fzoz}TWEZ|lq=Lvm?BlIiGE=rFfAC=l2PdF<$5P4sVf~7kd_FpKEL6ztR;$Zk5 z^9!-AswM9jL7f%>FxUgB$^HgKY@0qH-dW4k1OG(5Fvb~TH$Z=nGE%$Nv@Mfm7%9T; z6C&X@ZhI!JSANuus@oMsTI_9ddLHQRvr&KL{Jgh~9#X3Y02@^>n6CDZ=UT)R+8A0R z&Ej(mu2FuT7irbQF9}L?%q3pe@9WAsm-NS+M7u5j zJChdulJQt)&QPgYGfNOa5C>-sZ$y@R^G-00ri=!r+D@Iek;5pK86;)2-jVeNd0q*Z z#C5!tEjIt$@+0}G222vE&v_rMx-RTp&tm!eOCh?_g~I%*Vykr zAEVLWxF;WVPbz{XI9{5D0vX5ScOFaUKgn{-H(DdpD&*yPa9gKm(p1CyU3}6U0A_f8 z66fr0Nk9{rpfgG?-@g|g%%m=-v>p}=*kZ*HpcyksWyxjEG8Dx~r^u^~?>9Do+_<0S zYz3vfDsF<99V978lLJmgH>SpeX@h!@a<(emSV`n35Rwov*V2%h`Txz*t8UCy2hNNXhD2}=YE8|&@C&>&T2UK#-L@)zeGV$}nDhX8mnIz# zfgBJT-Q-gAs|Hi86WlDTajdm}16aLzYgTz#UClgYJV57VWt3j@y5ZM#&CUr_V`3ax zr>vbM&`ixXvt~k0O@CP^cR(j|?)`O^F?^L{6&>pfngqbD{>-I$u9)_<0Xze$s#bcI z`&5$mZ)TD20}rdudJ+p>w{|4oJ4eKzb2S77;`1P1Y7YV@?@5mD+D}iO^Pun&jZyGD zlAc}VRJ}D!$4R_xAgf`H;ei5pUToaGbMMX_u$Tl+tLC03eh&lT$h)iS z#Ae(3s-EFfKT-gJodfAwPy6IsFn)@s@Q!JBkTG}BbLkZq6pzjP(yRyB23!jV1_Xp? z&bHk77V-SmY2~s0lSh#YMfr%TcW&NKvjhl4i!k>-$f>}3?!DV!O_c+Kqa^e;>sA|S zr)|5}v^vt%v^H4YUMby^Xz~Lem-3SHeeV~LfSpu5h+-O2|A7Onr)Yl^Cg(`xZjE`V zx-|jjTr*XH@oDx{cl3HL!FFHn%rdmBrTQg)Z&T5R;d&Ha}Y<25?z}^W$4klAB0kd&dtH)DDN|0`Txmh13|k$KQ{=*Od#q9=z!ZepqeG<8v|^ zN=?B1OYZw57USoS?zH~%0r`SFiNtd6=UFlFFRZhgWlPb^+n-cr>8o+nF`?1D(28AQ zy4=(C67X+B%!R$ysxZwkW4E4bqi*+mMZG=kDVTL-XXE$3W2F(J5A1<_$UVqLcZG41 zB+Ljt>}|3)&OYC;XF=q32*DO=G|8uN`ac^^vB%@7jB%x_G`tZcs@K7^O!^vvJ9ii3 zlL{adsVkTr_jKfo3H4{^h#_{Hm>lh3&&d6-E61{3ki;&gRS|jjhcIAmy=Ec{UK^tw zE)@2??Imj$_29%gdW%e@C?th@BJaUO_9We>oRRnl-zGqh69=FJtthkKvz!YGa+A&A zbaV*YNC6{1(FqOE#6ScTQrK(|Q2jOu%EOw%Ll4=GEP4a@_9sjmkseo@_4pTVics=7VaGs6u&*6!;Cgs3Xw^sLjYbN~RTOwR{2dcWJP;;R)k0#UN0 zI)SkuZ=HrzaBi*OIoWY-gC5bm3%SUyo% zk2+x;t0+V8lYm5uWsrhQ%V-K!1RelnhPtqVkPawQ9L*r=FVt0*B|*cfYPFRfi8aE) zllmT+!>uEs3)|l)z#)*d>bV*WDX?8F2!ryQp-xaRn-F^ze;kF_G8MhImU@V=;RQX_ zMWm!n6k;+c=K|kI`x+YegPuX^E?8{$;%ql;pSvO|)AQjz%qcpucgS4hEc?N`p|SQe8B*Fso4J^dr`i4jdNrJQnd?A`mvlE^ z>+$Mk!A~m|+MN>lEl&kOcLBbpOa&d)W|;S6v;tcUpKdg9SrYK5Dcv5fK9O(oHmoX}g1n@yB@6-ZK4WEjVg<{SO!_HDsSk9=quu9WwEGj`rd*69D?YW66=`4Qy?@{4951?T6V!_HcK2=|* zAj&d%$dOH!EVmyg?Mpe;o4GHk`tA6mqxC`{TRdSj+0l8XtFfTrQ#PhD24qF}oxU@= zg3+v#%_XGcc149(zC$^+t(})`XbyWdh2}*oKHcD%hj#W>o z;iuAmpl!u2sdLH^%fFnP_t>!fY{k3&TS#pCNgQJjbPmE_|A=7foWzjR`bT6@< zi%RGw`ZxE>L*tXoCRQFLNe~M;`q*;@SemJTIc-+M${vj0T2%8z6x7?s0RU40Rzy%0 z=g+dVBU@D*we}p(0YdvFQi_789}{r(MJ#WBedFb;9V(>^S#U%_B=)XE7ifYOyB729 zQqxkJGmG?U)_6LHtxFdOj1GQNE91_r+;)7jKneBFNDKLo=S#IOf4I_0)iOa-&>BXN1ft`8UVm zRKV`WUfx4$PZ0Dcr^hGpp!22_@p6|Ahe%%#G}ca(v^uP2V+yHkFo5E?C-?ZwXl-hWYb z2$GyRyOIp{NV)X`q!ueJy3a~vvK$V9JOOk}IHZ<>Ro(#~Fv6?Nia{}`S|CtasZ_{% zo&42+q@Ej!Z}cpN-Sixq6`}IwKkQ?waR5lI%h*hTJ1_LquL_|z;zJj5)pUzz;x?e#R1~AZXlEW*8N;S9H|cIvON~} zDfwTOS`lwOKkd^Vcvek?ldx><+A>oWG5=&GJWuiPK$jeq_r4s%LxfM1g9Oy)ax1Ad;~@PMw!~X~p)VJnc0JDvEp|-LY0zeusuuDOB`Xrku1AsoV1z zP$trEt*Z(~&PpVFhfVShCS+4YOrQ z_@!Ru02o-nfXY!UkrH3RZB%V`n?a+62fOnY-s{xDp5slC9EE!FQF_QQW_e$YZlBO4bW%qQ4Bw1G0NU9P=dIQJl^l zNR_@KLTDkKzp4ej^SqTgUq-#46)=*quc2lye1A?{IRk4ZKdrCA=hNPW#6yt-yD}%} zlAP=yYfAF25RcJr)^WBmLJO#Cv8M>YV04)fGbR3VPl3dR)34}tkgST#&x*GkE~n_Y zYbBZ;E=S5Y&E%RZp<~)qbUm}=2+8<=;7k^qYg5SNTm$4{y)nUp?JGZC2w~A!i(Zel^Xma z{BlaF*Jx)o3=gqKybEvecubE}y~ z!cGvXYlq}iwddMUD_a)~RL0>mju9d@|5k7%bPR)C)6)k;@KsUN%_gnl@aXFLwT7f^8{SJFS(6jn^QQh&29A%d!a<9~_p9$mI)H zP^>*&M?FehJr+?r?>-}sehLmxQ@~fi!@JDBoNa(%%P;}~UD9CSz*0Ihz2U6lS9}_2 zlcLQM+*Rc;9olNiujQXBYCaFN=%Ua6dB2ytrLz;MbafpkDs4AV=L**E*J1%^r+Tan ztrKL;zXcJxJz0kDxw^>q#cyKnWqACGYZA+AMHG*PsCcfTF%K}C8X6fa%E@Z?pl_<2D=NxG!4KaD-@&8-Cw?{yw_2M}o8r<@&xA#DXkyT_U@i~QG@mvFh~nS6POqOc_ebPt8li+-Z?_EcWtvS(?%rse73erslj-+;mZ{T}aV{(=O{;8E9<1kdB_lB2qr??FC`fg)N(Jc`jl{`07!GmUOyQ8 z;2Xz<4&zg9EjXU`zghm~&JB+;9K4twjt>Tp2|pa{oKa?W$nD2o?oWrOv*okN;fJGUhDLB}|ydv9JUGDDP!QH$4yLa#3 zx%1VXf2W)h!VGqZ&zXW7bw9_-gj{E9%l(ZR?B2Vx{sZjOZ;41en4JCT)9~Hd*)l@k zBkG+V&d_NOc1A-y($`OQS=3Zi>H*nntTlDb6^^@T- zoYwP;@xhSW7PzO^+*WA+fR*ajzO+Nj}Jb%8}pt_Y@`G7cYLoQv0^6I`1iGOMFCAO?j zXaHEUjWcp4kScI8R;cHV{^q$>)V{tX4Yrjz7@|miN5(;puvG8%c1KZ6 zeDV1O^GOx;Ao=%(8MMV4*apN@4#o&?(w@0$OI@%#k_}ALthSfGrqS15eTAa(#)F&F zM*<%X#OO%a2#dmdTclNA8fn^(#zZ4}>~a7NHFgZ34u)h{lIEFmgkipeCse0?B^a^bOcw+I0e^HK!>Au!$aS# z6%G=-D{AOV)=6%;Q}wBOtG)!EsiMHhQf1vEni%Oc&S>;kP8KvxxF~%35#@{yXe;9?j`}{k$xsEFIjJtj=2` z6>@)(#SI_-dfbyuW4XvEv!bDWKYBXFg(%;t@hr|f&pr4IUQ

TGJy)3~tS!y62Dq@& zN58-2Q7bUYYTX&*aK?Cp4Wu)KiklgdCuwKF8z3-U!{w{Jp?|1cu-*R!k_EV##T2bDQcC${xO50WY!K;tBYdXwJ<}*l%omE$SI>3>B9NH)@-fT z&CJT;7gxAZm@j4Bk*QV*H5BD6z~Iy|g?L$NZ{uz?$xJQ5>x##kv6ylF^vNT46Lv z2bl~Hi;ClI@iu~c-c+V9FoU{`@H5SUj`eLI?b7uYcUQ1Qy=jXI_qrIY#gQz!>-^K1 zLr!=>7Uo>V5Y>ha#10=HIc2-x2SFPpX`Sa?h!AYUcH|QHFSii&D=pgf$Dg%r{YvFM z3Glc8mJ6K~g_M}Gh$t*|pYr`~1Nu2@33E-MHt)Lk?c&`p-(32DQ0qRE@6)lZMurqZ zJAR(})N;FLGpprm|G0ZQyzQ=E`wgNv4_YEq(!;6jS1lh!*iMewhW|`5mcjyE?b}*` zZSGIstj(wz4kqnSi6Vx88%ttuVP+6=6;FKR5lF_UeidamuCi?RrZ%g&LRa?oBCKrb ztKTorU9mWoRg5t6u$I{7Nas?BnoZ@vTw34b{ixbTBDbTJ?Hxh?kl~FqOxpty9a^wO z|A}|#yXK>|3C_HK^P6S@-RXcE^I-S)prLkulp$c@{QDZ_%;yenvxIDgoNW3kK6q7{ z%7Cf=>aQPle=7*SEM#~CjY#&Y#?tR7WJ=5m|6(h~(Br)Fk@Q0JSN^Mytiq@=`1__l z-&YuY4f%YPv!zLmd3{$^38boMVaSKBPZ9R@&P<#p&`kg9i0t1+j!&ADjoA&h{(Sq^ zUsTcHg7v~80pcBW9y$N_+=4Po+tl4vudf~?$CoUWp0v; zYeGSzK{eyD#y>HHTyNc|ic256h|k#P)ydF@@hKui3kq<6h8?L1`^d;49af0^QP!)8 z^|((8n$AAg>sA{MV)R*3@6b0Tj$5lS-pbTf>dcowO{j0iBtXPwmLtgrQwmN$-A5FEerQjTH*AgBwTN VC7AfyKRizdo7(%|RZPp#`+q3*=cNDu literal 0 HcmV?d00001 diff --git a/binutils/po/ja.po b/binutils/po/ja.po index bc8c0e6..6de19a1 100644 --- a/binutils/po/ja.po +++ b/binutils/po/ja.po @@ -1,16 +1,17 @@ -# Japanese message for binutils +# Japanese messages for binutils # This file is distributed under the same license as the binutils package. # Copyright (C) 2001, 2010 Free Software Foundation, Inc. # Daisuke Yamashita , 2001. -# Yasuaki Taniguchi , 2010. +# Yasuaki Taniguchi , 2010, 2011. msgid "" msgstr "" "Project-Id-Version: binutils 2.20.90\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" "POT-Creation-Date: 2010-11-05 11:33+0100\n" -"PO-Revision-Date: 2010-11-25 18:46+0900\n" +"PO-Revision-Date: 2011-08-28 14:39+0900\n" "Last-Translator: Yasuaki Taniguchi \n" "Language-Team: Japanese \n" +"Language: ja\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" @@ -963,12 +964,12 @@ msgstr " --add-stdcall-underscore インターフェースライブラリ #: dlltool.c:3904 #, c-format msgid " --no-leading-underscore All symbols shouldn't be prefixed by an underscore.\n" -msgstr " --no-leading-underscore 全てのシンボルの先頭に下線 (_) が付いていないとする\n" +msgstr " --no-leading-underscore すべてのシンボルの先頭に下線 (_) が付いていないとする\n" #: dlltool.c:3905 #, c-format msgid " --leading-underscore All symbols should be prefixed by an underscore.\n" -msgstr " --leading-underscore すべのシンボルの先頭に下線 (_) が付いているとする\n" +msgstr " --leading-underscore すべてのシンボルの先頭に下線 (_) が付いているとする\n" #: dlltool.c:3906 #, c-format @@ -1488,7 +1489,7 @@ msgstr "(非 inline)" #: dwarf.c:1488 #, c-format msgid "(inlined)" -msgstr "(inlined 化)" +msgstr "(inline 化)" #: dwarf.c:1491 #, c-format @@ -2201,12 +2202,12 @@ msgstr "%s セクションの内容:\n" #: dwarf.c:4962 #, c-format msgid " DW_CFA_??? (User defined call frame op: %#x)\n" -msgstr "" +msgstr " DW_CFA_??? (ユーザ定義フレーム呼び出し操作: %#x)\n" #: dwarf.c:4964 #, c-format msgid "unsupported or unknown Dwarf Call Frame Instruction number: %#x\n" -msgstr "" +msgstr "サポートされないまたは不明な Dwarf フレーム呼び出し命令番号: %#x\n" #: dwarf.c:4989 #, c-format @@ -2273,6 +2274,8 @@ msgid "" "This executable has been built without support for a\n" "64 bit data type and so it cannot process 64 bit ELF files.\n" msgstr "" +"この実行ファイルは 64 ビットサポート無しでコンパイルされているため\n" +"64 ビット ELF ファイルを処理できません。\n" #: elfedit.c:440 #, c-format @@ -2321,7 +2324,7 @@ msgstr "書庫内の長いシンボル名の読み込み中にメモリが足り #: elfedit.c:602 readelf.c:12726 #, c-format msgid "%s: failed to read long symbol name string table\n" -msgstr "" +msgstr "%s: 長いシンボル名文字列表の読み込みに失敗しました\n" #: elfedit.c:734 readelf.c:12852 #, c-format @@ -2361,7 +2364,7 @@ msgstr "'%s': そのようなファイルはありません\n" #: elfedit.c:961 readelf.c:13136 #, c-format msgid "Could not locate '%s'. System error message: %s\n" -msgstr "" +msgstr "'%s' を配置できませんでした。システムエラーメッセージ: %s\n" #: elfedit.c:968 readelf.c:13143 #, c-format @@ -2541,7 +2544,7 @@ msgstr "Pascal ファイル名はサポートされていません" #: ieee.c:1889 msgid "unsupported qualifier" -msgstr "" +msgstr "サポートされない修飾子です" #: ieee.c:2158 msgid "undefined variable in ATN" @@ -3272,7 +3275,7 @@ msgstr "" " --add-section = Add section found in to output\n" " --rename-section =[,] セクション名を から に変更する\n" " --long-section-names {enable|disable|keep}\n" -" Handle long section names in Coff objects.\n" +" Coff オブジェクトでの長いセクション名の扱い\n" " --change-leading-char Force output format's leading character style\n" " --remove-leading-char 大域シンボルから先頭文字を削除する\n" " --reverse-bytes= Reverse bytes at a time, in output sections with content\n" @@ -3397,7 +3400,7 @@ msgstr "%s: fread(3) が失敗しました" #: objcopy.c:837 #, c-format msgid "%s:%d: Ignoring rubbish found on this line" -msgstr "" +msgstr "%s:%d: この行で見つかったゴミを無視しています" #: objcopy.c:1128 #, c-format @@ -3422,7 +3425,7 @@ msgstr "シンボル再定義ファイル %s を開けません (エラー: %s)" #: objcopy.c:1321 #, c-format msgid "%s:%d: garbage found at end of line" -msgstr "%s:%d: 行末にごみが存在します" +msgstr "%s:%d: 行末にゴミが存在します" #: objcopy.c:1324 #, c-format @@ -3508,11 +3511,11 @@ msgstr "プライベート BFD データをコピー中にエラーが発生し #: objcopy.c:1960 #, c-format msgid "this target does not support %lu alternative machine codes" -msgstr "" +msgstr "このターゲットは %lu 代替マシンコードをサポートしません" #: objcopy.c:1964 msgid "treating that number as an absolute e_machine value instead" -msgstr "" +msgstr "その番号を代わりに絶対的な e_machine 値として扱います" #: objcopy.c:1968 msgid "ignoring the alternative value" @@ -3639,20 +3642,20 @@ msgstr "警告: 0x%s から 0x%x までの隙間の埋め込みを切り詰め #: objcopy.c:3677 #, c-format msgid "unknown long section names option '%s'" -msgstr "" +msgstr "長いセクション名の扱いに対する不明なオプション '%s' です" #: objcopy.c:3695 msgid "unable to parse alternative machine code" -msgstr "" +msgstr "代替マシンコードを解析できません" #: objcopy.c:3740 msgid "number of bytes to reverse must be positive and even" -msgstr "" +msgstr "逆にするバイト数は正の偶数でなければいけません" #: objcopy.c:3743 #, c-format msgid "Warning: ignoring previous --reverse-bytes value of %d" -msgstr "" +msgstr "警告: 前にある --reverse-bytes の値 %d は無視しています" #: objcopy.c:3758 #, c-format @@ -3814,7 +3817,7 @@ msgid "" " --stop-address=ADDR Only process data whose address is <= ADDR\n" " --prefix-addresses Print complete address alongside disassembly\n" " --[no-]show-raw-insn Display hex alongside symbolic disassembly\n" -" --insn-width=WIDTH Display WIDTH bytes on a single line for -d\n" +" --insn-width=WIDTH Display WIDTH bytes on a signle line for -d\n" " --adjust-vma=OFFSET Add OFFSET to all displayed section addresses\n" " --special-syms Include special symbols in symbol dumps\n" " --prefix=PREFIX Add PREFIX to absolute paths for -S\n" @@ -3841,7 +3844,7 @@ msgstr "" " --stop-address=ADDR アドレスが ADDR 以下のデータのみ処理する\n" " --prefix-addresses Print complete address alongside disassembly\n" " --[no-]show-raw-insn Display hex alongside symbolic disassembly\n" -" --insn-width=WIDTH Display WIDTH bytes on a single line for -d\n" +" --insn-width=WIDTH Display WIDTH bytes on a signle line for -d\n" " --adjust-vma=OFFSET Add OFFSET to all displayed section addresses\n" " --special-syms シンボルダンプ時に特殊シンボルを含める\n" " --prefix=PREFIX Add PREFIX to absolute paths for -S\n" @@ -3891,7 +3894,7 @@ msgstr " (ファイルオフセット: 0x%lx)" #: objdump.c:1634 #, c-format msgid "disassemble_fn returned length %d" -msgstr "" +msgstr "disassemble_fn が長さ %d を返しました" #: objdump.c:1939 #, c-format @@ -4021,7 +4024,7 @@ msgstr "エラー: 停止アドレスは開始アドレスより後でなけれ #: objdump.c:3333 msgid "error: prefix strip must be non-negative" -msgstr "" +msgstr "エラー: prefix strip は非負の値でなければいけません" #: objdump.c:3338 msgid "error: instruction width must be positive" @@ -4249,9 +4252,8 @@ msgid "unknown" msgstr "不明" #: readelf.c:2292 -#, fuzzy msgid "unknown mac" -msgstr "不明なセクションです" +msgstr "不明な mac" #: readelf.c:2356 msgid ", relocatable" @@ -4279,11 +4281,11 @@ msgstr ", 不明な ISA" #: readelf.c:2680 msgid "Standalone App" -msgstr "" +msgstr "独立アプリケーション" #: readelf.c:2689 msgid "Bare-metal C6000" -msgstr "" +msgstr "ベアメタル C6000" #: readelf.c:2699 readelf.c:3462 readelf.c:3478 #, c-format @@ -4601,9 +4603,9 @@ msgid " Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align msgstr " タイプ オフセット 仮想Addr 物理Addr FileSiz MemSiz Flg Align\n" #: readelf.c:3731 -#, fuzzy, c-format +#, c-format msgid " Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align\n" -msgstr " タイプ オフセット 仮想Addr 物理Addr FileSiz MemSiz Flg Align\n" +msgstr "" #: readelf.c:3735 #, c-format @@ -4761,12 +4763,12 @@ msgstr "" #: readelf.c:4656 readelf.c:4667 readelf.c:4678 #, c-format msgid " [Nr] Name\n" -msgstr "" +msgstr " [番] 名前\n" #: readelf.c:4657 -#, fuzzy, c-format +#, c-format msgid " Type Addr Off Size ES Lk Inf Al\n" -msgstr " [番] 名前 タイプ アドレス Off サイズ ES Flg Lk Inf Al\n" +msgstr " 型 アドレス Off サイズ ES Lk Inf Al\n" #: readelf.c:4661 #, c-format @@ -4774,34 +4776,34 @@ msgid " [Nr] Name Type Addr Off Size ES Flg Lk msgstr " [番] 名前 タイプ アドレス Off サイズ ES Flg Lk Inf Al\n" #: readelf.c:4668 -#, fuzzy, c-format +#, c-format msgid " Type Address Off Size ES Lk Inf Al\n" -msgstr " [番] 名前 タイプ アドレス Off サイズ ES Flg Lk Inf Al\n" +msgstr " 型 アドレス Off サイズ ES Lk Inf Al\n" #: readelf.c:4672 -#, fuzzy, c-format +#, c-format msgid " [Nr] Name Type Address Off Size ES Flg Lk Inf Al\n" -msgstr " [番] 名前 タイプ アドレス Off サイズ ES Flg Lk Inf Al\n" +msgstr " [番] 名前 型 アドレス Off サイズ ES Flg Lk Inf Al\n" #: readelf.c:4679 -#, fuzzy, c-format +#, c-format msgid " Type Address Offset Link\n" -msgstr " [番] 名前 タイプ アドレス Offset\n" +msgstr " 型 アドレス オフセット リンク\n" #: readelf.c:4680 -#, fuzzy, c-format +#, c-format msgid " Size EntSize Info Align\n" -msgstr " サイズ EntSize フラグ Link Info Align\n" +msgstr " サイズ EntSize 情報 整列\n" #: readelf.c:4684 #, c-format msgid " [Nr] Name Type Address Offset\n" -msgstr " [番] 名前 タイプ アドレス Offset\n" +msgstr " [番] 名前 タイプ アドレス オフセット\n" #: readelf.c:4685 #, c-format msgid " Size EntSize Flags Link Info Align\n" -msgstr " サイズ EntSize フラグ Link Info Align\n" +msgstr " サイズ EntSize フラグ Link 情報 整列\n" #: readelf.c:4690 #, c-format @@ -4922,9 +4924,8 @@ msgid "Seg Offset Type SymVec DataType\n" msgstr "" #: readelf.c:5214 -#, fuzzy msgid "dynamic section image relas" -msgstr "rpc セクション" +msgstr "" #: readelf.c:5218 #, c-format @@ -4936,9 +4937,9 @@ msgstr "" "イメージ再配置\n" #: readelf.c:5220 -#, fuzzy, c-format +#, c-format msgid "Seg Offset Type Addend Seg Sym Off\n" -msgstr " [番] 名前 タイプ アドレス Offset\n" +msgstr "" #: readelf.c:5275 msgid "dynamic string section" @@ -5405,12 +5406,12 @@ msgstr " フラグ: %s バージョン: %d\n" #: readelf.c:7995 #, c-format msgid " Version need aux past end of section\n" -msgstr "" +msgstr " セクション終了後の必要バージョン補助\n" #: readelf.c:8000 #, c-format msgid " Version need past end of section\n" -msgstr "" +msgstr " セクション終了後の必要バージョン\n" #: readelf.c:8037 msgid "version string table" @@ -5583,13 +5584,13 @@ msgstr "" "動的シンボル情報は表示用シンボルとしては利用できません。\n" #: readelf.c:9026 -#, fuzzy, c-format +#, c-format msgid "" "\n" "Histogram for bucket list length (total of %lu buckets):\n" msgstr "" "\n" -"バケットリストの度数分布 (全 %d 個のバケット):\n" +"バケットリスト長の度数分布 (全 %lu 個のバケット):\n" #: readelf.c:9028 readelf.c:9098 #, c-format @@ -5597,13 +5598,13 @@ msgid " Length Number %% of total Coverage\n" msgstr " 長さ 個数 占有率 範囲\n" #: readelf.c:9096 -#, fuzzy, c-format +#, c-format msgid "" "\n" "Histogram for `.gnu.hash' bucket list length (total of %lu buckets):\n" msgstr "" "\n" -"バケットリストの度数分布 (全 %d 個のバケット):\n" +"`.gnu.hash' バケットリスト長の度数分布 (全 %lu 個のバケット):\n" #: readelf.c:9162 #, c-format @@ -5744,7 +5745,7 @@ msgstr "セクション %d は存在しないためダンプされませんで #: readelf.c:10430 readelf.c:10444 readelf.c:10463 readelf.c:10781 #, c-format msgid "None\n" -msgstr "" +msgstr "なし\n" #: readelf.c:10431 #, c-format @@ -5850,7 +5851,7 @@ msgstr "ハードウェア浮動小数 (MIPS32r2 64-bit FPU)\n" #: readelf.c:10814 #, c-format msgid "Not used\n" -msgstr "" +msgstr "未使用\n" #: readelf.c:10817 #, c-format @@ -6591,7 +6592,7 @@ msgstr "予期しないバージョン文字列" #: resbin.c:966 #, c-format msgid "version length %d does not match resource length %lu" -msgstr "バージョ長 %d はリソース長 %lu の一致しません" +msgstr "バージョン長 %d はリソース長 %lu の一致しません" #: resbin.c:970 #, c-format diff --git a/binutils/po/ro.gmo b/binutils/po/ro.gmo new file mode 100644 index 0000000000000000000000000000000000000000..f1c1e0e13add2ca5452b62c7bfd215988060f134 GIT binary patch literal 20265 zcmd6udz@ueb>|PUOiYYsR7@rk9Z5SG6&)XAd`FmZ9E}#th!2e7E1E#Qzx_D( z+H>h?Gg2#ckfMk0@g5L(!-%mjG^K9eRZxGZxhCPmh%5Qi)0zQrJ z-}B$MgOb~Kdb|(R_`U&ZohnPN>Jl}AE@!)2O^r$*Fabu zJqj|^=wyUId|2yo96XutSy1I)25Mby^WS%ZEOm4bsQx|+YJL6zRK4$k*W8e$(ea4yyfA&vD}#2G#x^Q1h7rweAg2?HvSHfUgI|$2WnR z&!2$m=fj}*_a#vC`HoLN24xffo(U>{2$a5E4r+a`0M*`pkbhCrf4>D}YSBADtJ1*maPg6h8ps^7z)+J7Uc z_TJ{dKLDzqkAs^31EA#NAyD=H1yn!JWYJcDt3dJLT<|#XLQwe^f#UNhsQ#}6SAq$s z{2P7x&HnpVP~*81R6p+lHLj0(d;k<5z7I-H9tTzalndQBo)7B#98mpj041N>KvX^2 z@9~wO=JyUzdh$U~u9^Tt5ykZwFQW zZ$ORn0Z`-lw#T1?s(<_%SN{x9`ImqyzXO#1Tn(zdL!jnytH-;2{-;3A>)W8_F|gK+ zW3|VPpyX&bh{{JPsCnHAN-pjMnOgJ?(12eA*MmO-Rc>&YIUPe9i0VWiTj%)uT~Ooy z1*m>crjp990oC3{Q2aaq%8uRSzi$V{ue(9j`#31MnFqz^he1>&I%$K$OTYoXUkYlx z*MrjUw$J}V5R(&q7(5Al2-G+p1yxU*GpvqQf?AKuK#luqQ2jMP1HKVdyYKV(_n^k{ zGmqwCSAQp{a&=JouLBXm=&wC~1Jt^$yu{hT3qbY%QV^Ai-T?A1x|cspHTnUl{Ig!* z?A>1QnS8$-lpNj$o&eqj{yO;Q;HBVEunj&6O3&*g-o-j)pvJXw#LfRAQ2c%&C_TLf zRD0KfvNv_`bnq4sQxe?;s{SXyZQu_;$@PYfE`1Et{4>yiZvsyT?*TRL&w?udEl~3M zV^Dm5`X(obYeCKT3h*TGFsOBS4XAo|gIc%01r7Kqa25D4D7{#@+2Qj%Ry=M2B~N?6 zGr-J$zaCWmyFmkf7JMG~2*}b#E4MiNayf_!MOT61^Q*zT=3a^Zv(~eDNuawfNJMvQ04Cc)&2)T&GR$h)4=<|aquCKrlX54cj;|V?YCfm*LyKNS>SEpS>WCN`*Wb|$3x&M@Favw^0pS-0A33! z{|%t*)CWL~z4TRSNZfeczhdpGWqZG_)%~j-(LhZuBW`nt>bB+`aK`iyhg!uz$sAte+4MLx)ap8 zzZ=wij(Yq&sP-NNwcft~)$em&?BrnxRQ)xe_`L~K{VPEAyWgiD0>z)-_1|v;CD(rm zYFzh$=Yn4Y)z4FQy7pFqPvv_UTmfDJ9tUm&#kXys__Y^Q|IQHp!DHEP~%wf8xGF|wf>ia&j2UEW5GJ8elk#U@iK4_d<$3sKLoNBMh}DP z=d>%_yw-!_$F<-IU<=gvkAPZ_*MMs0y`a|pOQ87pLs08<>@GL{RiMhR2bF#`sPW~X z`0#3vw}YD3yFr!vG^q9-^!fh;p2zpf-EN#4K$YJG%I-8kjpMbT%DoGeetrQIA0PF& zV%+iTR8V@l78Ji<0-gxQ;3Z%NiZAa3S>os`-~f2$9(-I-&jE;LZU0*HpF@8Dh3CKX z@>A%8&`A(YM3+N9gq}(xTR@HBR_I1Z&ph-h`{w>^_V53}V;$V&-vyfEfAQaUfGcSC zm;PIKBYOUmgXmk}E&ly4JiY_`4D`Fuule$S#{1Qffm)Cr$-pb1e}u%J*Fb*@-2^4j zQ>goI!SKAC7xC)_&@6Nr6rRuW@tJ@k1fEYM0`UkCjTbS?B&=)I7hzk;3xy;C1N6$jA`U>EukbeB&%2iyjI z06N~M{R8+g^fu`2kRIvhM(DrkgXe|NR_Gc?GO6bw=*Q4eD20xJZ;yjdf&LeCKlBSo z&qtsyLl;1LUIxhq>G`??`}c47y91J5?S!N^--G@m^yiSCr$bMJs`}uOtY2i`+@Ci9 zcS8-I_D3Fn+oPZf{geOxwnyozo_9l|(2JmTkaSVcK4=&8HRuZHFmyZg&yb#rp-JdN z`tZ-Q!G8zc2b~N347v?k59#^e&=;WR>x1WiLZ7s6=r4E=RD)g(y$5D11wmdstJ?#JWVL}`O(4_`8;5h;Nx zZR?audHJRYiV2js|33o2|pb?N^WP+p%0XuITo- z6E8Oa--T;_EbFjPEzQitwOXDm9u+ z`2qb3W$j98WtK1N1~?U4JyrY0R7|Vev5Gv@UTxwT>Cx0|GCQ5*l?=tbPA#H#y{BSo zNh9ebMWva%Ig34znP43bTIHXeil>WSDrUBMuvgw%kG|5aUh8&5xujmkMPr(2cC(r@ zIenFGoSG?mU>Y}e)9MW-ZnY9hhq|5S!hv=AyQ-z_RwF)as!c3N)@jSAmZmW`)hzds z%ysg(S{mBonGa1L?j*91bgfay`i!E#BPQT57H~ALcW14gqi8*A=1DCw+nU+I1iS9l zJ+#u00%TpS$Xc~%v@E6-r+Hhpcjt^ubFYqUb-R^R)0s4>nWijt!t`cmWB8)BE>y~4 zb0}>z%yeRMwhm*Lu-&Pp87+=CGp!+}KPbF5fD!hc%CxCe*n8?pXY;1%nVLqjh3zQm z*j}d7EXHWrLC!Su*|?)R33ZaWWb-EeRJ$E*J*7Hn7Ua*(Yp9mY#N9?mn^C-`+3l=W z8*SQ{#!RTgcCmsJojh%sTCuI!Tos?8_)ItRyHzMZaiDp~gk;-WTZOk#xR$`4dLx=3SN@z#+YVq{%kku;vh9xTJ1hzFkr6+%jq`q^V-Ij z8(;;(s`=%tqDD0>D;s?;*S-fo!0v;s9PP}b!AAFlXi!_a-7R@b=F$!_aVYH^Fzrs< z>B_XJ2)xdk2%b3@H&PiptH@tCT?|67b}iow5}C9orUS*KwFZW&SJmuFVt(2=gnNkr{LlU%3@U}Mi<4s5wacM z{QTY0_vPeqEuFI|=&J3#FfwX@L|n6GJ;Q;il_pmbBU@P=7en*jnAtzrK5yxP9x5|1 zcvR<6yjXBJpQH3aYX>44n!|WVOfX=Whq$L-1JR~#c0<-YgbOt|x25>n!e_1T3x6aO zRpwl@b=!6`(`d$USB|D-b+^@O=5!QoyWj$*KZB#0Rjm`MZ0q?T#r>JevHL+(lFK!X zblR@6Wlbpqd0H~PSb56YzH%gmu4k(VWF^5Tu3;OkO$^emDz5ovHj~!7c`Pxttw-B% z|MIkcpkvk#4_|C{tN&CaZf#olH`Shm=W+9gPqNy)=fxXx76 zN_nSSo?;$zp0 zZ8Jk-g<-b^S4Ym1jI7&;y4ECAthGBZgk&}0(rqm};ho!i;%3+%^TQEIIKRzqUQP7g z?oJm5KiXNFbEk{Ks!pIm?>6qeZHF*|jKThqlw^%nav)Mm_r#o9i{RuzFT9j#%iO z!7Ny>*_>Ayte)3PwI)H69*C|;l2-qcm6v33Zh1v^d6~((Su2)5J~i0BF7h6+vC7`B zZM)fA(-!kagzRpLAr7X56&>F*K4ymG0<4b4jdK$1K3cOzhgoV|Io%Gt)6J*TaaPZCE0AFOcf8{1`u_9cyGl|vL> zgcr7biDb*LA+WbJEkhS2p>`9Per+eFIek3_&JBnOPxwPE3pQ~8jkSs?z45H%tc?OU zB>1DPRy5JA-k?_45@em7m0$}EEVNriG?~l!DvXAX1dfs3k<*ca-9miIb+j3XuFUL| zn1I!4>1?H_-^;XH4}IY5&l%@x(uRbnT*huCD7{=iw;QP^eU;oT=6+?iaNF@7pA{Un zxhUVy(@8;JzB(cqF}boG>$C<}rre1UH~u;^B_CC9Dj*i_XD15p#Z>*Kf1z`WtqgQq zjg%!%%-A)1_w1WgyMwh0*>Va8!EMe1y@U?xKowQ5$1O3^+jID4r9}LTrb?TX60VEl zY8Cs5ac}0)wESZ0#R}-vrp%`8s@<&fT7*R58#%W&@%u2vT(Vt8I@2tz_?D7;wpsID zSfpjEmg`An{GrSHArfX1ZAmG4=%GmLU+7YCm2{=U=At2Y+Z_&ZesLq~UWG5i_7%IN zms(+6kddMsb$$2u7Zc6KHza1wbi1%dJ|%0+dS)%i2`r={ z%|x6?yPObad1*_9i?u`Ot;XgFr)-(X(TVYBapL6oB^O8D>kdt8>2PU_Gn(7fU23tf zyU)I@9hbN#!VzC8V-+!Y*=UZ^Q33Ca6{lV$hql{%uqmMzNjviQS5YfZ587jdBs+Y# zJ5(nr;XLKNA^RKXKyCmXL&80;M-E=WL;z0!l7{v zW%W$g1%0W#+M%4Q=r%E*7P+*3g>(9cU+NXm%JYmp&*;LS-zF{0M5~r6!I`t0b2Xfy zVI3}k?39DyY|DKukFp)H*f3dJzp2Zqhf63H^8_&M?QlBa*bwe}+x8qu)x)#w|E7H) ztIb8-V&AOdhP#njuLtYa)@3j1*(+o1Wl4bgbDc-zoTk3&xFKAe)Qk=z&V8WGkXW)3 zX7XAxuypPO%%4beazap{aDGObP$tn=5+9!gVUjAY3t_#C#$8L)5{H%^T)hRrQK3; zm`vC&7iD@^Op3d>X75Por&4OUnl}-gCn^!7P2yuWSUTtl)#&8-x^;_E*7v3K7CUgH zSAXZ&*q9D4VMlXD2&bW&9n#f<^-rTiajF|U!(~wL8tW)l)+^u?f(}fovz`uG(>Rs#0krSgG!B*RPIM^eT7`{5iYWhD9&lx6 zt#VZeiEwq-?WB#iS-)o8#cM9RWWc%5mEG-nTB~fux2{Y!N6f(9J(CrCfMp-AY{!O< z*h6n+cmw~;`gJ428!lKkykVGv6+$+t_WOn9E;H-aj|>l2hA$o-9@rJPJC#ZNigrU@ z*NE8_cXhZ;yJlNYi|yGJh1n~ijCO*5}=p;A`wvO!fQlNg_KUz6KAiRUJ+ zXKh33wL@MdZ(c42wAZ*3BzjO!)?`U%%fRlPyT^L-U$V4J%Gu1umiBb=Y-I%~Nb zPP2`sicQ5#Z{9hvr*i3~7hhIc-z%&hxx1*0WvC%M9x<0rr=5Yl4ekgUl^ys1y5MQq z&-Ui^8;yJ2Jd~MLo6Wk_8x@{2pX2I-yR&Y?#JC6@4mo+a6YMs+sf{NTA-zgBPjQim z>c!JZgF4&&_Nv6mv_;BHdX#%YRW-WLNZPp1IwcU>Q--9HkMS--414BHmR3_^BYcmg z*eml0XIYH1OufqMqPaiFho7UgUXYIjq;AO|A6ZrnisF0cb;HkymW}d_;@BX|MLkAK zpl>@@b6MLC(8v6GffgU=vl6WtEFb7`Q4j_Co+K0}9+d)p-1DUIk$I&Rz1WanZxBY0 zYu_n{O<3-aYkyS1y?Meg+*jk}!$hQ*`}R_;NRd9jZa&r*R*|g0tI}(^a;Y7?;$eq? zU#O_X>CK5R8@$`ok|?C6?t*`c7ZdgCW_5c%x}a728G?GtmhlC)#)ha~+Be0bJ=gh8 z#3Sccb;*LR$nN-Pn$17KOhcUQ|03$Ao4Y|9^|SuG74@yGy^pCc?$iwl-CLYh%*^q~ z%2be_Cn!z#PCkBxvUW|&a=Ex&H^4=qKNQ7j_)xOi)Vi&CGlkcZRCKwMcb5wO9c5uS z8kB0W*Tgx2KdTuF1AkqNORucVN>Q{gfKuV!y)~aFG+!!TpKo&@vDT=lwjk~o*Wzw{ zo@ZGZTVxV#^`!qGUB%= z;1_p_fS;XnEGuAV%6TRs{-Qm9K4<&Rl60-s#5XTfygjaBvN7H=>mfQ6_sqC$Y+gg6 zddd~PjR10wHGiQq>j|MAc9@yeRB;Swgc5Mfn;y<9_R1oXi>*h)f&+?jAX>#5k!$Vv{h3VN1P{X#NcDJ?DbU}p{4^{!iuDq zHf!ddq-1gw52q+Nkt(2QrNIUjts3x4CtTe4v6MNu`Oe0vnN=v6UUea04{Wq!hc$YT zP$eb&par%O?O@%DGU}G^tUxYEaNe7W%SOBLI zt|G?WhV_ute3Cb{{h+-1;`AVJF~`^>N4r=Ko8qn}8DQ$T>VL7~i#Itw%A)f@}NjjpULOi5K!c z_<$}{;cZ$s7*meh=~3NEDKyCs-D38KmagCMn23ZM3WmES!joAsJjSF5WiP=6Df_<_ zrtD9di`a#Hq*5_U*3sG6uFh9*-X1yA?6KIM)I)X%RxZkoxdFk6w%gczG`>I;3aL;8 z({gdy63Ffo7m%;uYoo$8oT(sYFQmy0Mo(JZ(%TkySjSSU%x>sHo2bbDVN7#$*6K|- zF0k!PE3BCu@m*s4ryD7Ea8(>OM7l3ehf}#l<;$ zEGRPUT!Zlo(rb2ZN4VPEoO$zFx(n5(4Rp!}C?1YN{{6`Voqh%j0-aCVTnKb7s{Xm) z#la+Y6Xz1>;Nomdh;;5-#s+Er#0BTM^(u3xf58@HFI=*1F2#V3%lEQ^;9fO0s9 zef)EQ63<7a7-)?<@7a{?QVn_omZn;L9|@J;Lnu_-Dvq}bg_7VVGOnXDcF4KRn2cGZ zXFnFuJ5AAUMMAMvDHl*P6lTl8*itUIbjHU>GuGeR8RW`cj~0T(W{Xh!;Ap`&mue-- zhDZHcv4<&4IxS({7uz;*Q3;Xi>Oh{JR$!S7A1f_)fe}{76sAnLjZsd-)stZ}B1QekXl;gsYGoAI2+`og3W7 z7q4i)%lKs{{p}mE9VPSjQ!@{Bqg0sE>e<*fbS=4F~ zpk1~*xD+;oB}Nt49pRh8UP=_67KcTm90Z7tpnVasroxEzWNT3}cECk)BYWA1E-Hi@ zg{`R9x_%ml`J>^aHE&&TeC&hVRXGRSU4W-a6#Lt{;-weIb!IMp40p{%bcy2<#%-ni zPXztfh524@@%3HB-Q60LO4#Kx@Xj6AnV6$Zo@3o*B3unwr}66}s`r8|+3>j%Oo5^dwbegRUaA3hB1KAc{-B&Q_B$+*Wf zg2Mf(6-ox)P?R793r8^6Em=sY^)9m4Ak8*ZY)b}BGHc3fxm2~K^05P4t6~}#ji6|E zQBG+nr96N9EjIQD*=5WN41xXBPK12eurD$y0})we@~72cEsBLJOzIPsVtHjTdbZk^ zc7bNx1Njh$u?q(j{rC2YBA2U>aGbaCuOjq}1je{o2!ww5JBu0B-fkn&+-vk$=AANk z1JHJt4|&=jhxVqOAT;-F#Z>K~cD4ymmfVVpa)m6*F8HQ&VIi$?PHe9c?~ExtNle=P zWI75~E$*e+`#%EGw1MxGCE@67kGOps=@7dtVd>T7Lb5--I&zglG}qS0Dv%v618fq3 z=~4>ULqx;NDe~K#eKkWqNUa|G+VDGnFV!wTdgSG?moXnr(w@TAGxNDFLlI8(5R7UO zvhMSrTysU4G5Rk#XX=LlD|=O#>%x2j)w+?8Q{wpFt8IG^7XYq>a^nlKadPu+H9cxC zZTrUH#jYo_PF1n3nmm1?&A^dFKo~{*M zj3hU4OTN9f#Pan`h-M?OeYYeV5f|&jbLMa{?Y?T^z~lrI(WgzP#WVbbM4n84H(uko lYz%>Jw7LIj`5*>rA_6=AL`nIcLwijrZFa;OJN* z5NHL{4+#X`s~HF!GgZEU!0SbUKx6m@^x)U#bmXSc9F6<8_Clh*bE>yae&V8YC-wV6o|03KU{sC2vw30yJFxU!a zz-%bFXTw_XQrHk)16#wppvv(I>!IRZ1RKNaq4awn>;PYI{26w_-J;Cu zcPQ+Jdm(HD&x1;T9h4roLz*)1CJe&;%1I0RLe+Nyl>WJi!%Uc2VcYd&sPqrRqhPJ$to*rfAntQv7JL>?g6)>s_AG&eaNh{0!q1?}HRyO7 zuNW%*{ZQ@s3mgM8mIne2;3_EnZG>vKo1xlmJ8S};+R#3F^-jXTt9ATIc@~JREnulWn}wjw_(bbvIP}AEE50?J1U1 zpvt!rs=wX=rQf$Ef3)+$X{e_@HzD1qa|xUu*Rgg_3^@R5?F){_Re);m5*p_+JcVSD!%1 zJ9M2bcPTss_jV}%PhckOaJtPu3>)LV%JD9!{GNhphtx9yfo5<3Yz-&EVQ?W-d2WPF z;U`dXcEjfIfc4hD3v7Zr1Io^hbnZgf5%-DkAb2%A7~T&Lgl|B_{}xJa?K7>tw}NeP z_kc<_0oH(djtijLu>`7p&w-z%P=Ba)yK;lIi+AAdxNDz{eh9xGe%OMz=g`&&d}=GU zmKq2Y5@|(E%5*3Ctwle+FA!Knx{n?S1ipaNb_N3Xz@d*K3;qtf!L-NhIMox@!94@2 zemPKjJOQ?Yn_y@7093k9U@zG4ahrY^RQduaJ(j@^@Kjg}-UwCSJD}3N2D`#qPuTo= z!%ny-K(%8jtP9sd$=wJg=W-Z?*Fn?}coizY@1WA{_oU6|VAvh^5U6r2fF4}$!f$qb z5q8D@XQ=$zJY~~&bDRj3t^`WX1~><9gTrCdr)_^Z3QAAs!1@Y@lKY6`*N#n}vGzU$ z9!dBbsQSDCrJq{QT0L}w9_}encDe{E{4^*#+X~e_4?)@4yHIxaH{1_4d(QeF43%y$ z)Hru6RJqQ9(${@Z>0g5V;E%8o?DD+L=Wr-Hp8%C#$hlWQ*~z)EJG=$~B6i1fB`IzmOCNZ1puh4tXwa0Gl59tmr|V&|nj%^f%{0<2c7_j!CRol)9<13>HV6m&m7nW_gXjrUI&%md$1Mk^SYHY z2`b)+Q2Aa44~5Ud{xJ0oJI)S-s`p7y@veY<;V#$+roCzB&!U{m}%z$Wl;I1o;R zwc%>0`ke(2fOonSI4Hf`3G2YGpxXTxsPc7w*Xnm5RQ{(y z)#o87JK6;me>ZFhyT50d4n5oxVGURekA-EhCVUC1es99zu<`qWz<4+f9u7A{`M(8w zqnI`ySbb0a+}cMjlzm?X)eg_W#_&TpDwS~x9ta12MLuba58tqkry!?(7YO`H$KUWX zWg-6BKNzzK{~Jz9Vcz}QtqcCapY;6$DS?}a_hM>_ncr5XrI`MF4Qz)04ybYD4XA$h zE^H2K?w4Z5fwr(N?hM!zj)MonInKY#xle?$zl~7s@QCw&4ocofQ2qB$=kL|9`Synt zKQPF-hd{O42&nv~L6vhMlwF+!Tf)!9@U1XR55U`N=vmMzy|uq*C~us>W3Wv4en*~R-%{iyl=mP4S% zwLB<2tb=O*n_+$U22{O1gR+Cv+O`}`p~}@C9t5+Y;uS*4U*r6@LY3!HI1GLZTfts+ zQp~(C0S>|)fvV3IsB!5T*az;0!(gzkm0Ju|-g9AhxE-p$eCEO%*R%NzgeqSMs{fn_ z4~83{>bVt4Z!bW#%P&yv+pxa%Zx2&hy4#oG2@d5 zWe2^W^fDGouenh2&VU-bA*Q1IoUQp$k1l8XbLfK;pRC}+7vfs^6>9;}Y^?j&* z@DEh|nl`p}-5YwihdG9z=^rlqbf|J}f*QxSIQKnJ@g9e=`xl)5J5cTNm2>~)ShtCl z(*mkKUEnx49x|*2Hp2bkC63oXmGfq(`aR|RKZlC{z2on&J?@kPZF_cv(nC5_y2()O zS_D=8)llWz2$k+yD0_R#@hzzS{GN(VIgdH_E*Ji;bAJO>j@_^~tlP}ymk!nbBcSRx7fK%|K-t4;C_7yT zRgMdw?DSTse4l`-|Eo}PK8NZbH4d`+Xy-T*DtD$LUb%3!Qs49D;ij)OhPOAm*m4Yls`nx|9bN^GhP$E0o#}1uc(fWyuh%#}3MKbrD7iJg6tmuF3kTuO zfwIF(V0X9`%D&!!YUfX(#?!j(Y<>Gd+1C+J@s5Fqzyc`yIR{EF*TEOzgHZFs+3jt8 z?tzl~j&rAWudvtD*sJT_Io?j zxbqy8{k;aIkB^}ARHKt+M<_cR0cA%spyDrp($8Y3c3TZScsW$P9)_yV=gwWfbBej2 zaVS)~o(yGYJD}uz4@bh3F1BBfh92%oQ00oi0dNCUJ)VHQ;d@Z?cEhe#{^3w|dn%N@ z-2_$coly074XS=$LD_wsLoB<(cX5w~U%*b?Y`Zn+Zu9R5m3}mo+@qn|wFJsuR>2f0Mi-WVvo=0NFr z4fNnmQ1wP#4{s8;Kv4`4rIsvL(FLZnk4#S<+-om}|PZ&xsXF~OxyP)*<6qLT-hqA}toV&r{RzF>!{D(oc^9(3GuXO%fq4c*C zs$HLhlK&o5zxo08hBXJ-d=7)s=VZrK@G#ulq2m7tWp}j(+jV1iI2!i=I36yCvb!gt z?Cf2r{;(UWe%;e;|H^{W`y43yE{1CFbD_$&6>6M($hn_{((BuBGTaTNzwsF<=03nW zsCM58mEZ4BgveWzF ze(({f@$m_$e*Yzue(PsiJ+*;q@4j#doCB5rrLZr26RJPfAD&|FYY%`L7uQ1R?OG_g zJE7Y1GpO;Q$p|~I4und76jZ-k3Ds`bx$t+P^!2xMw;pNrk^xoDBB=aMfU=uSQ2Kfd z%5MLLvcDFitX=eiYL_uk_I5N>J1>G}9&)@KYW;C9R6egl_1Djw|L?FZ?xv$H`$O5& zG^qMjz=PnWP;&2ts^2asJNXrQu=N29RJ^>gmaCxjcnws3FTy_X z7brb-9cT4021@^npzL)$lpWj&Wd}Q;^!@_WIQ0iqyY@N4)~5&#!hHr*eosJ+7e7Ji zqvv>AkD*ZGWEd*mSy1xsgBn+Ugwl8W33hzx57qxNpxW(7D0`1U$+-$j&ht=u+znN3 zZ=%&_4=8yfVI4RFsysPR@}f}kH$b)5)lltx7gWD^4yyj|LJxiemEQrAto{Z$&V*{O zrBHgh49Xs!aPE(xhr9k{Ti>2g`GukKTLP7SJyg4FgR+B{o&UE`@tRJt?b8FwoedR# zAymIP4az>ZLfP96sPcRWrJuS-+Ishfva3l@{ih5n-4-Z2dC<8(f-1*vP@X5)>6%C7>dzuyQ|u8*My8&0=!`asn`7fPRN zpyF+TYM)nK_+L=tN4pu;ZpTBVI}S?kmqOX+15oAv0!n|sLD^%yqip-Ng{sd0D7zd9 zrSEA_^H&6_T`HjJw;sy=Z-KJUPoVnk&rtT(c&3%x6Dr*(sCY+1waWsi_-moce+`s< z?1C!)?@;}=_0g6ypvtqs@dl`I@=>V#-iNC1pHTW~HOtm}1eCkjxi>=D$wN@%+)vQx z;TYQw+CmTiK2Y_X3Kd=k6@Lws9xsEn;7w5ayc4P)J>|mRhV^iN<-&i1vYUFdZM=h^ z!ViI}*8u090;P}HP~@WHmLgi z>ik>GvH6aH9{wSy_BhG8FN2cvkaNEcRqwx`(brr%KedHD@$V0%k36XI7DDM`B~<;+ zfvWFTsQz^?l)XLX_%c*K{t(JezH;0Rm0#VEmD>iY{{5iJa|D#0WP%6OQjg<^LO0eH!Fid99%G=?eFQ z*)Rjngj%Ic)I>UA8HUe0pBXO^TD(^0+dVc^_ zo^PG|Z>aXDn{U^VEur%3=Qs|^4(2#_1(bc92_<*4bKeHlpLRmYdmU<={0yqRZRgwh zejZf2T>%yEeyH+11EsgOq4W|cu=QyTc`t)nk9-OT!*&a8xo1Q5^QCYgyaK8{-*OBT+VXXR z>gOYzyAY~N)9>+oT>&;N{wnE8&8mhc+L6tvkk&WLIsvOgx z>OT)E|J6|GFLB%smCqYchr?7n*>lz%ytoO7K2Gf?gQ7wiW+9B<{#fJfp!5lSB~Lep>IblidE zcKd>)j(Zh=bo2Gn@< z4^%r2J|)Gx7q$wH!2Kc|37f65^`8aRPA5XO>$OmNdK1osJyu)$UJX^x$D!IWWlc&T z1Y5%?a0MI-cR`K&El#!VdL-01vmPq^A$SC=z1EgD8=i*yIH>$;oR$)p2j@V!AA{|n zx6bNgI8?ruLHVbgZpZZwFbDSlI0Ie?mHvAu{f$4v-e<_^Oxci@F?c#EH9Pa%$*!w6a!}+*hf|8Sdc1oZCZiGtr4^(?BILF>^ISZ;k z?t-#|_o4dje;m`!we$W#Q03?ZSHUY_ci45KZNF?-6ZZvB>zm7<>U|fKUR$1L^%I7& z!^h!h*#G>Lz%qC|l)e83rRT{P*z(^AkH+2LLR;SjQ0@96oCrHyWYaBzvZE)U`a!*m zt$ojh{c$gc3*qfhdT+bQ_Wx4Hdto;Ish3#0oB?I0S3%kLw@~HFxYW+S=R)=S=b`#} zHoWoz?H7 za3k*E^|qfp0+ml-i;X`4O20dx#>-|mqy#)T07`!|pxWm~=l>UMkGsu{w*51q%6BDH z`oEy;rS(=j{`80H$1@$vq2|2}Q1jS5P~*t+Q2ng#P1X*Bum$d!uqBK_+3|WP`@RAy zzuRDQ_#&(UzjFK@Y8?0#&V|EnP6^zSO8Y?dqp7#q@#zNmJ?`(|T`BA@Zcho^5oCVe z#<;sbcKZ=_vLEC0SGen-pYKuvztzPa{zwTtM!FR>Qv*{-H@a4;dB5`f{Zq|;_~F{A z#(tlMJ&D(#PO6zVhd|A5lcDVK6ezoY4jv0z)lD`1Y#CgQ`&~$J0^xe8MqlSZ>F;_t z488#C!^ZVf&G_uWMYzX7<+~k9zh6R)yPXe6HT`EMlpfE72f)jq)&Vy`#oG=$z;B`2 zrEvo*|4^v%%!a+;I_G~M?1cLhsByS%LmQp}RgPka+5(qA+28eW0Q?#Df;}3gn)|TF zzzcC-3^nfcZ=7nz;Y*?N3p7bJ>!m($7|s!J2s{OLg^xh>$FE@oX7RF<=KV)tcNl1D z%ija4o=3yc@C>N=4kW%JmbJKD-t--3%x@Sq4?VTcGUZKT!J1Xqjs4do9#F@FFah z|G`!-H$wI6Z{RAJ*(z0kfe1VfmEYjjR$e}oeQbkjhwq{E(yoowcedjy$2+0Q{h4En zwzl2J!%_Gzf|?)ha_&^m>TfK}$Ny9~8-536caz$sn)zThRQd0Q8b`adx8=PQs-HCO zVB6^!*ctbgQ2KfbPKPNSQ_XyE6x2Al6CMc%b+Y<99ZtagG?f0DcTNqgfq78%{u*Y& zR$Wrf^NVAl+VLhRz5f6;4i4*T%e4V2{~Cu_x#>{#Ukg3>Jgf=7bNm%b?|(y$XWhD` z24=xgQ2lN*l%3rKJ@_ruy0by|RI@G&LfOL+&bz!)G*kQ?`O+(1gwSo40sXT2-WX; zA8PI4aH#xGhO+-p;0!pWe`;VZybeCjcwKvdwbvJhrJ8v=Ez{O(H8l1ERsWRXsexfk=!v}a-@*c+hCgV~A&1<9IiK&6#DbT0W?fCTmv8jO%Yp|Z2lN#8a!gv_A!{5E3o04vvIpL5)+dI5sY}{pU%)H)emGr zjSI7(_H$>!{_uV%JNpsJK07Q*HT&G7pz>J)HLe~H)j#flW8fdKF&tiM+j|<6{a*m* z!q=ht-QiKIpEXc+^$b+M{u$1NW6G?3T?b2XH!QdIb+Y5bP~+!6P#^f zRJlKa(re2lwjBn+4BShg!neVG@Jl!rwpnW9Xk2Iu4c)w$;$ zmul9NS3s5bd$<_pEwg%f3#vWa9G_~|RXI@O<$Z7(Y`HwutanSG^#2HK27iaDXTuY$ z{K;@K?n|NC?OP~2YPZ7ba~xDT*F&Xy8ESlLa-ww)g@@xl0jeGDhO)n!D^tySt`C&` zO@xEs@$gu97nI(bon-AW8xF)>05x7+0VU@p_$d4vN}oGVw)xjTB{lFS?!#drJaCmw zw-TzoZiBbOSD^H=c6F+`Z~hrn|NjB1+()cQHS2>@pxXUWD0@sf)#|M#?1(!Zc7h=& z`&$Fm&W}UsWjE9~J!q}%Kj*OVuF;zwX>c)D|MfwG6kq4ZJrbUQ9Ch3e-g!uoI{RQp~DrQfHW|1Yo!?)}cN zYz|eg9#HjI2-S{vLe={dsC7+?^|pK?p!(ghFcYqUs?U>-pFq_o$=bZa%*oN@h8|*rv zE7ZIiff_H4hw4Ai!8)+x*>*kJ3pT|)7^?k`gtChbupPV;N-wX&(_p=GtUaC&W#>;o z*;mbTZM}y>wew7i7g+ygP~+GgQ2p==sQR?LFxA}uxf-e*sTbM) zI2x**&xEpv8=&m#6)1c7%lUV{*p9zbpxX6rI0b$NXTpJ-?0)8KsPW-vI0t55l4|yM zcR-cvIjH)kU24nM6|TcQ6RO=mfwHH+ox9y-);$Ogz<)OE1J8vk;bTztI`(qgey2gr zI}bpuXKHS?7CQ>){Ic1yp}1xWVfERG5eRGblYwxY3sPT&R5hfOVm_H8rpm_JC>dO{n?f zT_`;_y2-{H3)L^Oq3V4ql-+#`)$Sv2w*Br>sCNAhHiAuWvF+XkN^U09{80uqe%}mL z&RVzHb#)<>`yQAL+uUZy{U|&T_X}_V{1j?DIr4U^=R7zP_jT}i_zg7u@eW(g4N&94 zXYdwy_%^$K{SvBN)9py7Mag*Ux+{Z)p@8{tW@K>nuX!t|6{>88d?oCkr z|4FEE;RnZ758HU7q3o#)O5R0KDJr;Z?Z5h0@14&)9x<8&rR(_pD8~$nj&x z8PC~q?VTJQeq*4LhqH?z>?bZ1SpIU!Mv+-2Xu3>%HdYX*d`60;u)X(@=Ik@O3*Lg`vi``=Q2* z4sY0e%Av}41C-sq1!Yei-?Zb*OxO_jiO_=^pvH~cU0y^|Vv51tR7g-hN|4RDJ+FzP+qe($_*_4N(Zywm6d+Ya5J#`h^u z{pJ{`cFTpT*R4?fChbF8{&rCF+*qjb^;|d~{sT2$&Hu>i=P~#I?lvFWe)A4g|L*;X zU5CwsN8#QIHU8B6)Y|W8I0yFzmXz)pzQK-sCCg- zQ046Uh27tm!3^BLLbXr-FYWvqhU#DEL-nJlpvJe|Q1QBaWjO=NzScm^7mq=W8{a_L zal^0eyfOqTpOc}=`7l&_HT=fL3qh@i&V*U;0Vw-!{H-0w=EE_#Z-knseuA&S!~c^S zxED6~&hF2if+KJ@{NA=xHdMP^1Jy1+!C`RD4^~f?L+SZDsBx)VF}Fm&5n0B z!FsrNLFxG&sPVP_@76BnLbd-rQ1#jkC3oB(c0IHiN{@HLR`4^}5bn3zjx$Z6%H1Do zTv-KWANNDq#|N+tZ1blrPX<)HIZ$?dK2$sY?AY%w+us&J>3u6yzy2O7pU!_!Sjw@?Q=|!QY_L4`CK6hEXW{`w*(%HAzV`dI>|-eagWrr&LWLELFI(u`gAfwKD&coy6QrO#l^ zG;_av2$a3v1V_WvT4_dKL0hm zCNQ;5n%P%0gROD*g~Q<#sQz&d)VlHusB*Win`XxA@lbM3fm7g1a4zgv&!%4mmF@|s z_WToSeKM%NEq@-AJ#2z%uQyRFc02!`4bn{iDS+}n6RI6| zK&AT;wu3zz+ImfaDt|FN0B(X^;SEswe;KNO1sYkoIZ*xTR46^a10}ypW1HVmQ2lou zlwIBmHBS8u)$a~%l4j=pYoPQ{_rNsMZ-+YG2(^B1(bRGZlwGcYs_%Vp7))!HX6$z) zoP~RnbN}YtQw~ZCtMc5o`xx@i;a z0I!15-xIJU{1Uc>HCo#GcY-Z&9|e2BQmFmuWl;6l4jaMmpvJw_gKfPgLak@cg&NQA zgKEEzpys7!t!(>6U>5EzP~-C7P~+a{)@kN``R!2c)4ffa+25Q9d*Xi6v36T)Ujw1$ zqjIQvKMXa#r+Bu!qoM2~2g)AKg2%#pp!Ctaoz;T}rO)9|_05N>-?{K0cny?39&qm0 z;r_V4gVM|I@IctKy|trmQ2EY+8i&_HwZlD7<$D&Y-5PhW?J*9@PK)3Kcp=ny^C?vR znH{ZOXF`oPE8(^9MyURm-6_q?n`cAy!);LV--D`Gv(8q|V5oIU7F7Q(gf-!ISPXZ- zX0T5eTaU3&<4*;Y+|;gioaq6j_n}bjxDKkF--A28-ZsxB?dR zw&nc-$_^&=vE@1es{dU9H6HAQs(0PKcAPvEPQ<+c%I@xl8c$z@YQF~ktemb;{bB-? zoMlk@-T{^0pHTg<$Dwvy%!2iB=Rl2b5jY!egiGL$a6Vkv-|}TBIT-`&d{G2X#Qg|V z`;X+K7SrKba2Wgy&VyYC+WvSZRJopq>JQBhx9*W}AntYWFt`(He)tp0KKc$yGyA{Q zFpT?KsQD^;u+3)+)I9JNlpZ^$Tm6iMD(@<&^}sf$`EEDV_&y}V_OA$3_Q2DkQYU9s@vcEM@;rBZCTQC#%0mIVF{iZ2Uc61U{{qBJp zhwEorJ@kQcFM!hPdZ=;nO{ns;A8yCzd9V-e)ll`h8>+p(fExcgjIia&g|l#<2gkx6 zpvpaXq@C{;L#2BND&Ie#+P}>xYcJ(P~%w+)ckM;RCzvyl2d1#=Rn!>MyURBA5=X) zf$A4+k4Q87>VZ(>@mMH*&xRV8ZiTsUzwuVT^P$3Tft%z%!S>tDumX3xiD_oPdoh%| z#v~iQ0&1N22eyQVOil}=Kpk~b*&pIKE)Dx}p4Z@?kH3GY&*<2^pCzvi1#;Z=hj<-N zTuj?M`yE8sNZkJ+{0YKVas8rA7U+lHQ^eDu`;~7x8AV*T!tV*f%JI7jx7Ou4KDUVd z)+g*e&c8TMA%2q@*b!Xe&hdICHq}Ld$V?E(zPW~g-%RCR( zWrXu9i0PAhq;~&*$$iI7I>SJy$bHY_cK@i`nX@@eAY${Wa8fdIp^Zn7~YGVcey?j8Ru~A zAB%AJ!hMtT=tsJ?oFUFNoOj~SYjx)621g{M9l-S!q`%MkT?NC$+=`!nJmSK-!FrtA zT)++|b3e+YqqmD^U95GGQQ{mYbIq-iKx5KOCLXs(%yXH;aHrtD+NJ#)SrhSF&dJs{ zb}T0Rjs$lt!Z$egWrWe)10~Mg(#e|YI6Wa9+j29%RS>@v>00}B!0#F2hVlE|l51c?t1# zJjXeY@Go)Sz}d*ft?&3F;iqxljjZqB)x^1&^D@Gp!S7jQ{qFK5IB>U1*Am+q#`UAl zt+3ZQ_jhsMz<(asSK^n$^_|H2l z8e|+m*gr1fd9WQ}pCZRUGH@SAyp5zgi*qLK4us!IgpQEqQJ}=dpUU-R_}@VMBVm;D z3&QRq%}w}qggRQ|SD)+4iQf+YSMl5E!W8~4*SEnZ;Mbf76X!y>1^$Kq8m=`*vh)gk z!}V{RLkQDx9e$0dlYius*A^TTI3FTT2lzB`-r@R2s5#6(_{*Ky6U~JF!R?#CE65)X zFC;#Fn0Xd0B102WTx7(FRVMATonp|t$a3kk*!k6N&dHP}EFU0*CLhIsg<>GgOpAmL9 z=kuI8mRp$Lr(HbX>m(J5V;Zua=j?@B^Z!KBo{jrZ*aCKRHc*3Wy`R()>X;8tBu#Bj zUU`ij&56GmzX)efP92^rPg~q;-Sr!!xds`x;&&w1^SI`f@W7YE{}SH9c@VND!9|2! z=wyAubzkC~<>W|yU;OTXkHD71%jLQS;b(CD3+e0NzL&E-?zO~u62C!&a~a^ZW^*(o zY@IwfCg67&*Ujz|De z?>RfZK%AcmV;d2862H#KI0mNSzR$%ugXBQ5zUdK!LU(Wde=W4<`;it8%j+coSMb;wDGjVIJ z`ze0Qh^u2f*WE~y&8cG*XBK{UI=B4V6SoQOqwwFsb!~Za@XC0g+?8`C?vaFzC*Es)!cbHR0M|cf+>)k&cA3N&$39hww@Q>HYt2U>9Y<6+4 zMaH+jC!B`6H9Q*5K{i{CKvQ2XT!#Bb!b%C7j{5+vbsT_yW0>dSJ_Ot0=2d_5jBzLN zb$rZOO5AthV9qnSo`Z~E2xmJS;1Nw=eDXxP-jrHyQU%&hL@e7dbD(xt#n3AdpJ>5pWXz9XLZSpHBE6 zjQ=H^3rIWH<&!Ca#5qfJ#|Xkc#_u8AHHq7hIvtMRt6U$>`6g#$+&^(X=;RNDzxe{- zHN?@eg*ZA|5&oC+I{^1+cdc)CzQ^@hoY$I|tg~P(!*G&3S^0$6q1LJ-u?mesO*a@Egq8g8b*Zvh;^n5`H4_(h2(y*UMde zyaLUL`xtSG3A@SppF%#92su@_!k>jkqhE-%5Bh{;xsp@pT;HWY>ZXNw4D#_%`R? z_~qel;^HXmQPNIz@=heqUC8TB_;$|UxYn@)J`Rgvu9H~+Z!n?u=R3j<;XKsI%5!-f zgrAOYi2o61YtGy83&Cc@$sueP*N1ZISc>0f*pxWixSoN311BqmcJPnc_#cGhc+M9% z{~^v@ejq#=_X^Gt&aWBrKH@BMvL1u)xICwD{V8WB7j_u_SCj5h+&R>z(8a6gc$cf= zbI9|LD_vT-FIPVB0{Ex%Kh?1>esj4#mh%y=8xn5 zc%3X3 z;J~ZIJs-d6@MiqyQP*Xhy$L%5zQTDB=Y>wta3@>NKZx@O?&Ap8Vzmk9tz5T)I&O9O z91VYR=~gMe4K}|K!Y(GwtMCQFCc3b?_zmD(#aRo#g)o!w51hn@xh z;r5TY{skP3|7)Z>2EK%Q7}u>`8L#5H4(Absr6t&#lCRbe#}M)zkK?c_*L#&s6#p)dB=`X#BYF~j!W@> zhwEwh?I7I(cnPPDZMgj-#if6nu%C&45MdX>x19eGxSu3!yr01FYvNSk|19C3xwz*L z7UKF6=T_7Yx$Z;U65^%6(XI>&2)l%{IqnNMmveqcoQLr{n|S^)82|m9`yH-z6v2z| zD6+3e(+HnJ+%Cj<-i1BL zbr-@9hA(se;QV`Vy_C2^aM$JfHm?7GrMNc`zdP;<&MX)Ib*^>%MOX{2Ym(m_` z<2VZWAL3sd_c+{LxqgOoD%a29mrMAuxVs|v6a1dS?^u_|uefV*{T*=z5oay#g)Zy^ zcsy}`AnZR}PbU07xOHT4{V``t+)D_*41R@MM+&^!$vBGZF9~0dzlY8y!&5nL!cWKf zPM)soktP-Y2{6dnhO;T@dvboOd^iW-*Mhj;aGvJUo=uwfoxDRO$Q|SG+f3T}xPMf7 zu63+LhJUms&Ie9THrLm39>$q?v~l699Tip!Ss%c!oy=LJ`HJupkUf+03MXKv<5`3~ zR7tLa@)F8&i;F9qNBl-k_8YjTaNP#|orjFqIA6j20&&K3U8wxv)3B|R@i$>QF2;Xw zLLTyaigOm}7sGnUyom5AT&KcYi2po%l<;q17yKXRdJy~xw~ltC(eXL%TJHK}(%nZq z9V_rZ$HlF{{V-*D3HK+&*-o4faW{t(Ie+7NJ^oh_o`ZWU*X!`>O}e^HMkB7T#_vYL zIumC&*E2ZZz^&t0t_!)|Nc^FMJMX|6u1_TFbSLLe;x52X#|7|L{EvrkI=_>NdjRK0 zgddEM2KZ0L{U+ykoV)Ss52upu8+bj;CvGw44Y+mOPMlLox5>Fz;&(oN=Mr~6P93k~ zju5^JcRS)1;pf56I5+rm;2Ffz@ig2-n2u}le;!6jyUT@l$L|i#lkqc}AeTU^g} z?lgD-{`ELVay`nGWeV5lIyudikmEcT_LlSS>SR2H`#8dy5vK#~KF9f=gu4g+TU{CV zcRU8ah?5Z{ZUN_g_?=AnEUrhxdpJ9ChLkbKB*J?Wb|h?x`xJOM?o8O#$*SwyAMPy9 zR=67yXDsJ#;+>A)v+yU}-@r7^QqFZI2gWma4q*d{cLL`$u4mwPH|JxNUtRA>CSy` zg8w}VbjKFt_al7`IEM2TuHT2Jk+#6aDdzfF{F>sv-O1Umu-em#7ZyjB6nl%qrO|>& zanCw|+PRUua7idX>_x+6Wd+6gQ7=>)_6qWgBcGl{Lli-VG}c}EL2+NMdrn_ zn;#D4p{GG{$q1Z4)x1gNMLFS8j}&F$qHu8;Iw5FsiF9eNv%8~3m27?RY>PvH4$P7M;8!V#oklGN)ciS=S2z& zBTJ;w=#ql6-1%YK){znwHB_j0oua+e!n&~ao~O*_MM{f8WvJW)xG1Nv!pkc!Dp5=Nd6J^Kl@=5h0BIRUU94Yg#;ykas7=`7L$Gk`^s*(ljj4X(T{0x)w zQc*@$6o-lma{YAH0`^?hJdg5}7TCJ_Y5mggIaztN$xOF1IjhxVg_xEq6j~fAC^WXF z8srs3OA133#vE)R?)9?r&^CKh?d!|sto4# z%r7qQIX@Jg-^I%*&s~V-3yI(rn%?PkEsK!D=pj|b{8vfG6=^7&SFp6a z#5QknIGo2=R9KKx8ltOp=#-~=ctNiq50!IWxRiq1WX3vG#|bXBDX!lP#(?A2O_>wg zY*NG@Qd>Qvb`~rv(4~2 zrL>?(^)PON+{ifA4OPURTD6M>>SVdjTB#06W|tI)R>Nexyii$4W0*RWN?vW8a87xC zzRXCmlVbHmUGoYHa?83TcIza?#U%EmiKOp;k7_F`&G?BEs-HzSQc)_60KSFVxy&mw zy`Yjdl3TQDOz9-#Md#1a*imp?Sf+bixHQsEC9$2(%9ZicO!;9`#>5a(B=(A=h#K;- z%&2Rs#OZ(_=48#wo$@MAPd&V-CN5PvZc%|c@g!u{Kb^um!h%)rrD9+4-V9E9=1)*B;y&2iL1HFjFn{C z)9oV5GwY#(q)D%mq?AOWQTlV(OD_sBOBaWS48nekX3a5cxFwO&g|mBj z1^osN=;0ORveKLt3>VIuy)0N5K0cTeUf#niDaq}DfwItw3DvMY(VLZCR9X;>=9U(e zl(8D{3#(GZTof{#SZ>c7Ra}59#AZlULm)9hZU3dzwWt%?krEHR^GEo5s7O**Qq zRqY})F^){WIDsD z)nZzAvpVvfQB4yrR&3=@7c=cWFO(bhr(h-smE7}!!SK@D!t%Uu(6`%kjsHWukr6G_ z!b?jctjDciVj6h|RTe)PEo0;28Oxf|^rYj(6Po$HU|t1PDP=~oWf&1Ek1`bpgMO%L zQ5rTmhf7Nt$Cu0x7kfqJg=GaLSo6pU6QT(fC}i4Y;7!zu%qU)p=zO!9%n37UvnyK4 zN+hSk3l%3QE?15|@NZ zqio?!BrRTCIsBDhLJH5zE?}?4W{*up>=-dWoVzeuUWA7~&YK}6U}F5Q#kk_I3#OEd z!+Eo<+*#$t(ee_h1qDXTe$$1pSt*Flx3LySOS}xPv{PQ9Q=Z*fKUDS$`hJ~)eFm~? zbE9b0fys@MUi_#$IuT;mL0zKW^iW|rgI~;Tx7kYj|Ak~~#&8ra&a--pWidP~GvpYx z*C53(qlj)KuwgP%I_1?4;M|n=(gX6t#o@wC6{b zFg>suv@12L!{|sfmxFeP6<)eQti`g-@W&KT$W5$b)UGMTY$PkZk_bBS6IVYqj&j4l zn<>p5x!5$P3ALKZ@n5G$WU2kZ3MVH4}|A%F?Q|!qnexg5&E7-!9xTGQOU40*jdVax3z=NfU1w zZ$xQWs-4KVzC;RkajTtQJ@4pHNz6*Bn_q*$eVAN(qM6(>?nb#)Njyt4H65BzI=jB{ z`<3QSB;S!JAoF%5KyVXyu zWs}DU+u3cOt~@$8Q@}(MEM|-weEcO!;s_bHo$3 ziZYROW>2auX@cp|h>=`vpW=a$oCS1x+cE5f78?v*A+iugCi^~ZyL8k1)=XkGTQ1!; zvz9kaS+P}%cWalnnpBB9r9E%bg3}S{j5VnoJi9RWj*asCdqpmyt3b$=#$N};(yKI> z+rKT4a!9WU>AzjOxa@OD&Zuq1-ozo)Z7wSfzOgaXrOqR@8DO*@OI!ol0d8J=>7&(* zW_>NF3iLdUdIrNJ-}`XK4zTK)a30A*(Mml>daJJY#MXH(&-o;tA1+MTp(rIsys5Yi zrpFlWp@2)b(8j9tJHCJx8pg`gKJ>F?Wr?UR=%)XLWVn!MK^8zs$6nLATnpnG(#RF- zHC}8&Kto9*Ou{fM5^2c;y#Ha-5&MhNUO%U-0n{vkS5hKi$J^8`VnRL%KaBG9}8)$tevlb~{`>TeAC6 z``9`59NFGA?%FAOh)Kl5WE13e%zo+2tv!E-J)B{bfa!E$b49oW?xO>gzWc}*k&AwhH?s+R|G%nc*c{nGKY^d)wU55bFC(2Lax=N+~d@{ z=gC(Yx?#HNW+5?|8L>^2V*Abs>tAa!!JxazT6Jy7vw*$bZjGlb8N!3`!o9{Fi#b%g zuE3z|uEsptHc?m`M7fcWP`Rpe5XtC##y`mXRmgiq6_Ij#AEls-8;5xeO8FA8$HiwX zXC^bFnuJx2I%H6r37)sRR}qMA4u2sO4?&kzUoMC$?-@u~qPs^)2e-tz<>SnsV4l`v z_uMkzNu4*ax0gFVR2s@UHgx+vqv5s-&pihT2(uqWpN4$gL_0rd?^ZC31}` zSve6J(q-+ zH5m@_7=wGiNymstNrhJw$umz)dWCY$9<+={5wVvda=y_L?zO2Iuif?qyW1{%03N&_X zE2M(u$K;tBRFRkxP_=r7BBj~Nb@Sy&*;n8>q2fd zS}RK`f?nw<@xpYe3dTSzidBy>dD~LS4QZsAEn04wU(+OMl`Kpzbg{;a8lfsc>;^8) zI3CTLLRGJLwn;|w#tvP&B(=KKvi^jp)qZi3Qk%ihX4938fr-P-G;MEKoim;3@s^*` z&^*bMeUF+j+H>K)J(-?t5*rILx59i;)zoElq?8Br$pH)n+}Pk{vxQ7<>|;YL6ex^e zGP}!C(UOy?X!|D4N9|+AU!UGP9MWm^nKfS{N>_BEaZt z-%7Ov34R@QT}kOiQoN2TkS(-tHX81d^yUNxmr%(i1%|@dXrDm|Mr#ZfVfJ zUlx0*TY?G@WHyjIZ{WeltaQ6X9bz_q$c)c3lQcW&bve_CX*08y9b#Ya^|c)rrKK0s zaV(mh?kAbMFNs;I5avE1ZwZ^&{z^ZgLRmb~;7*BNBz93ytSv@7L!N!2iCDYmhe~wY zvCvCrYgI|+X!#R?0V7c)G@j$)qR{_5zX=mFdwA0)W||2-DPwL;s_Y3B zwMz`$7MDWf1#tQf+JcxNWLd`X-H#70H%-1TN*G~u=}{U}5ETdm_Z!kJT$s!g1jZY{ zm8-BQgi&g_{XfiIZLSjh*Ev)1|9#H;P-og=7I#=@JImvNR53HSTEcic3-rC0?~CGR zAVX{Dkhv!mUw-CASUGDU6<*5T&q`t;re5RJ?cNYD3TF+g_XYOJ-qpL384_A@dyw#ydaoLJw%BFa}J_;keujVU6@uS`{(($V1@ysfQTJh{tON?c!#H}ic zjOA)YQk4-AUQx6U$arXM#*~=-`wytKVKyQ9vGa4%&I>iWsPVluV_Zd{?lEx0_7c?! zbQ4)s31&M{Wny&lbW?$MA@s)+G+bU3AGf)os4zE;m>7EHniu5RjIphYZET%--HhN? znDG+x9D*BoTBIa4r0O%3|0*cVpZQIDn#Qiuj{G?*CPt4|jonBFhtv`eHPdE%<;0tB z1*K8X7RScl^RIhlFlL#4C8E6S!2TM8^{4Wf zhufq?VGHJ`@nz^vp4m88D`TN8mm5$`6baC)$o&6^+mv~}oD$tx+rv@0EE;H3mb`G0 zZj|YtqcJ(Wwy{S^dy-?*#7bh`l8(2R|I|~3GpkPDgZ^%pehde8HSab{8Zs+Ov(rB< zt>6`XmIbonA+rXhYr(AMKNs>3KGy9NaS@!KQ8Z2sW zxy3D7#yWzR#uVm_oRK+ow7rwn=t0(niL@_CcEeNTb>( zN6Kshv$dH$lU}~^?~hZSJv?|Z1vNi=e1y-`vbTp$N*sT*!czwK<`ZMS)2(M$Llh#o zmxqF;5J`fP7yG)QY2sA#V`}f$+&rC#dY#SV4*wAee;M=tAyDljo{ZR|3@iSB^@yjE zu>a~2PyDe=B`L1jGUxy1vCRMd2Pst_R)G*s|b3( zS~qF(%tLlc;g?=pG4rPi6YA?g>5lUH^_?>y@joCcd{_689X;(EHhSEIQMN{jzg3qi ziYJl0@=(o-Iet;9dsk$-Quqs%SSCp+_PC%ib{diZXF$9YWIm1~Ilc(rwrmi$7_1KU ze>w_0PpQpVnvgUhwVELIFcyn9c0+M>*Fnj&$>7h%5>+BmG&OJE@?^AXL6X)-{y$E0 z6Q#s*im7szzjv4&6X@5gx{~?Z2p3smmKyc&LUc@kRq~$1sA37pdB@Q_*z;fPwuuw8 zYri$a>zavL3NH=kmfJ5BxFX5ggCi>m^Pd#@W$`mf7N!yZ@y){}? zu+(#5=9Y;03r1f2n>Z?l8KUNuqmx*fjU2xi(yW4$s+3p?UKKE3fim|Pg88Oav6pIM zMe@Z}c^|;sla2pJLq*bmckG5o|N7;Qxums9Cw9bZgW zM!wR}5;Ke(!ULiTFDpB9c$VoDDwU}@R;?nj-FptL~ z^JZlrMlXE!$j}~(Z`oLfdRLE(ka^*_M@C6`juxg-d`k6*j|=WMl@enfAI`#wK>u)F z_R(!gj|`@#9vR%y=#eqiB}JNUwI-+HrT5%0pKnmM_S( yf zGsrV|S5j+ijH$LSCVXMVzB>`jHmz*GdZN2YzBs=C)rs*xlH#Tg|29mpRIlccq9LD^bDLPF?mY1{UeaMlPeb@xWgk;PD~&vqxAYD|AsFJ6=&oWRQ?Ep+wm*F z#_<LIsT2y``5O)yLArrt9d)GNurrD z3nfTnD<7dSYvUwIez6q6-R0qxD2!a`&CqM+8uMbSiZxo&6c*$$Xf(|GWr>F`%~Z#a z;A`LiC|iQ5Na6@dG^a<|VCL`LsrfQb+`dCK~FPA@L@m|y1Put^c- zm*_W~m+zzm7x&ZE0zOXHWgiMipCRv1nc@bQNGDa_({^PUZI|$F*QMT8r0>?0@#2Pg zTRT!%UQ}$_{y3xCc&`iUvtF_HaQ&VBLf%3&?+Ha^iY|)ZYOcfDKBEGd<$=CbW8Xc= z$Q(J+H%>DmxF)inSX(k*f7WtQ^|`(w8J-e2g-BL}H(jfWvM*WfT~>M}S@tQ2FD+J0 z|9yVl$Tk0m^NSPG1OBM_mO@NL6|s_;_c-{@%@X!zOX!JF|1HIlZpfR@2Lt0GtUa>z zi;pvLSxRkR{>qp!Ze;e@m{Iw%tgn6a&hW?A*ig7$K~T3;3kTi9DAe!XE#Xax=U{v*|3!dtcZ2^f9{lCe*4w zW6IP~qy0^+6{T`HUzIB-ih=5JU8ron{gz=cE2eeVhUV5n#)MJRM@?|W$ujrX_!vwX z8+0nBuM+4RqjrokD$3&HnbgR>zJ~<68arT3=rV(X<`p0?!vr2{iAVg^{Ro~;XM{@SI^x50Zczd74 zEPg8giDhpO18g#XIh8n82dHW6HcCPb{mW@3ddc6Y&8#UFhk1bDEJe3*Vz2g7Q#IA88H zADhd}TO2B8UpYZNm-|bdcpEa}{(|U-O&MWA_%0(su|FN|IdoR1Jo9ayj(Xf zaIb=@jaI!x`ynrLYc5p8t6Nn?kKnDAiYDl2{7uN{$4N~)WMm=)l-$VMVN4U^w zLVkR*)hrjM(Wkv(Og&mpSatAyNj<77G2gYYo2osugVq1Y8FNOA&YUxJ=urMnXg_~t z?^WsBZY;Iv^n6u{zY=y>YW|x#l84cIYEf4eTMhGdk=lIGxVFBPRXdBDh3>=3?%OW* z<2L>bS6L>t7`2qw@b#ru`&BFIKS)+MnkAI^Yh(O6s!P3X=d-djFX=FLV@nzPBWUcK zU5GZiH-9^4QgQ}v^g7P{NtL&?T`QSC!;W)9tNGWZ76M%gqI05UMP*$mhm}_8|Gr7Z zi8+6#yXS2ZN zl{P-pU8wKVG3J;Y+_!Hj19cc)ZYu77-V7a>Lk7=9w*BCv`L}kp|JANW#D9_0w2U!J zm#zED_$2ymz?4s4CC|A}~zo^^O`!^fo?ThuqlO@dD?yh9zh?BE=G1A9cZE+{)YCm^WQDxw&k) z^}2y(8~cR+}OR!;${_-#>`Rjq$}Gb%#}u0egcg@^k9@4QhBR2Z8uq% z0f)GI92S_y_*h<7v&%Be06#@+RJD&>61BL86mD6q2RDhaJ&wvL?Di^g`VYA!qE?N1 z6-leage9C*`(G#0f{ujQq1a6^H)g9yRSykBz04@9#;p{!^5{hJ=>?@_DsF$>iI`&aX? z=p@4tWuqxlk`)b2GNwpM=7g^zsD}%sf5OZfkEq1o4<6bqi4W10e~R%}}=Rjp=2h--XdDPd%BffZS3{!@d^OMUCMQT9AF^*#x8e18Rh~7MzS=5%ljE^E{z7A|wZ2LcRBm}; z2V&`1vP!=2QmbY%xY-DDCoBg!c2a{{Y8B48C-ChJmu@Iw(L#i;I7w_Ye{E`wYbzMN zIGtKo86Mh(u*-|Hu=c81+`{!%0|^c~m!_j;^05%?>KjB}*SSrf@lDC74450O>hN&` z09K5aEkN9mWFezkVD)CJxZ-9NYmMV~4X?E9c1i=`hSRH*#u4*C1ok9L#{w7bl+S1w zBVtSEZRZ}YM`(vp^V$%R;vg4dp)F|Pp<#w!%2*;}aTMi=;Y{w$S8fttk3nMU1#`f9}TeWs? zp~AQkCnV*wkBlx;mcV!N=+Ly~STXWLNNgmSN*c?d=Y`QhD4Q%*AvA(@fJU7invH!TLhu84L2?-P$c>F$@ zejY!#eDXLsv$&WdrENnwM}L+Yu`?KQIALpR=a#Ys9(|gFl=Tx-A~78nV|9fWBGm#= z{FQa{lrA}vD6@&tg_2s^p3Apxa{5|MwN-F#Lz)>^RBdjoVT>EDk|j3Mdhs-+lUWKm znB8gk+UF6z$|nSClNaP7PWMUSDYZD3*o44D)urLZmD`-7MM)$1leC%Ph0Wz1!ckQ3 zmd>;;!RVEK$IHld9Fef*O;nVnjcq9EO`$U~M%r#D6LL6G9~&dC@pBiSzeFw=A7&)Q z6wAUjG{ACM=b+>CsLv7HLt_Xg~Fu`8nGunsF;C$=vn5UBS_LrR?5a0`=w1two)# zf_7#zvD*(kE5q#Z-Y;Df8fazfJ*Qk8f)3PEL-ZVbDx2n|WpRWCyYQq|4abT+Q9-1< zFxl({pcm96C0`XTbMb^UB4DhfmfC2kZltu`MkBPJGKt+n8vF37W!30pxs7|rI=MGF z-zGkXF^(OTvku{w3KFTRFF4Vnsd8%J9FkZ`Umzp`!;&?RMij4LaNYFLF|DSqcv+E) z2WgRwfc6S?)ir~jAALlNP5voSt5&OX!==Mo2#kIh6G&Did^o@KXJTkL(BMM)9XF2U zd;5lb4j%Nz^c7^_Jmr+RjG~GU2)Rcft6?4;RWR3romXy>8V0eE!rtx9+Yg3^Uby(8 z2=EHavALmjyLjp1S^aO)al*2PLTm`|G5)s-#rSop@a;O<6ltVD;*NLJI5C z8dt3xG6)$Vj@2r)XH|Pqy0v$xoo-@lCfI^WdMh{iMBh5blqc0xuLqvr<~8s3 zU-{_?K*_#_x`nJ`rWPgv;4J(~8d#i98cJ@$OfRP(EG5)cj^)#ki1H;9G|*J?@x&(? zj~Hp)n09k4UWjc`0#?(gZEEC*PITNPC+-Jy;SpdJ1?$D~G zw5yD)lV z!2TAln*PfV=cwc+8M*+Rk05%`jG;y0bt5a()r9Q)LNSs)q(KMWPnj(GiB@Z8=2KJffZzRbI2_p zAhi-9J99LeLj;p?D4U|BM@~6k+19_Uqgo2-6VX=wwNa80DikSG4f9y(Ly5p5b9O^JpAKP4Vtt~Rn{&%^_X@pi z=4Rfn6BTKGF&$~|*OtJ^XXl1TkBD|2eMY0ILs80j^ra(`N2i;rqTQ1Yo*YldL1R+$ zazNj}D#mj4Z#*d&K!x=vnx%s(kbL(@@&7J>d<{V}2j>TZp=$>93-PpjOCIxf) zXPavt|ByV{L^I9v_1XCP4SM({KaW0>e!I65_~!JR2B+_zy@~4-s+za%lxU4sy%=8@Ec>1#L`pqr_Y`99@0Wu%y(tkjM|@w17Z(`1ejcBO6*qw`uP7H2KsixoEp=rAO7$*sq;DZ=NjYFhK1n2s zp;m%ATh3Ut>A4aqVzJUwc|Bw@wRn|96SZJe&xWlN$BT_iTSenYkvrwNyuh{!rmK+B z`#hi~KgjTSY`%t&E;`3L7RK-n4_b?)@-hREcu8kmdQvsOB zhH#S2yTCJHM#{XW3D`2gDceG;EBrdeaULBK7}jT&&85&rI#9CThVCuE->wXdTn?}%a$D{ zdmUnnQ*Oi0>I@rbTh6X&;OX+QIJ6ftNoURSIX`l%_5nulj3fSW#JPb&S^o4QEj-v+ zcHxE;*$n6mO&u+4CADabUq+zxHZ70$NqhI_A=F7NQqG4^oS(mR<-)0}Dkegq6-dN8 z6zgHUKTKp=6wC(>L7%-38onlt{4vRQui>R!yZ0Dv2ocf(O9y{VjR&EejS$XgeN=%`9T@@~`-W2h(b>#h# zrOr4khYH`;oIUA_qIeCt43Otbv?j~Dc*gxCeEnyZ*DYkY9gkgMIVI^BsR!>S^-D~9x|;zP03+m zs_Hf@AZC!9ZVyRJbJHiEpKJs$+p(L5w7aUdWEc-}G&~MMo?HlF!HVjch&Y)4`h^g7 zr#2FDS=~$wM*qKv$=-nr`!|!$+4bhcdTF+6uH-DpqR$DUPC^I@;N)dwJaY0|a*~K7 zkgiiNhsoFCl4c-TC% z0!eb!$-mmq%|bxj0{Js;L3O~LxcaglhQ<*6WOJ&VyG$TI7EZS~oGkdPS!Wws&QwG&QvmW^DDo1Ulue z=Q&@VSz5SWq>E>hOun0|5%Tx2#oSwwYMQeqiB=}XprPOqNtLnAp(TnjF%AVI5WBAQ zV@L)U(Ceg#UJ$}U_@~Zn8eeoBS8_~LDF_XN^jNM}bT9>greqP-Rx43o!iRKM*zMbI zhP^M~b3t*q+GUBW5PG(zpv}z`P{Wq9o5jPCWPWXFJ0-0s0QRx*h6HCx+or`bom_h8 z^~jGySl94miO8bs0*Qr4)DKxcqg2s4r9WAri{H^f-chq~^lptl18hIpcm(A9oej4- zBktRspt39|npqA5QT)|{@}RKf3b{LVbl#{nQpfD0CNNH?*9Inw>R{WF32JIOzP07UXUSOa@6Dmk zMBt7M8MvM%wg$dulp(B>XU*8@b6g&g9Aw+q<&#Q7JTUl! z*r7~)aB%e0m)WZaj~*os`QRTMWeNxS9>!U3f?SVb%)8-(ECMd<;`)j$W*L14F0-?N z*@_Sqw)^1~Zc_w!Ul<%@UHGT}CVK2VN!`goc?&NIVc}b& zkEo@#{>XtaW zwY8~`T6Ok3fjmqx6SHPJ#8^77EkK0vZt8n1EjM+7x!9T8-E6O{kbQqMu2u8K>$bEL z8629SXr-dig><$;Mnvpt+s8bI3kYv(BvoPQELw(TOct>S;`#l9+rRIE7qv7SWtStr z+}+acDluL=X0&~+A;JAnku>(pOC0cE+ucIK&{cLa*b%9oLMbC>y0*;R@Ues2j~#ZM z`KD*Bf3l!5q$Wp>f|u(7yWWc%OzZmVG=BEn;_36J=I5C_oG;KyL`EZOmGYgrdzV^S zOxGjqSL`+?tozH9tk)XYOJ}dlpSyIiucWRILL5ujB^sBp&$uHv#T@i1G;*2=)Yce4WuS zkQRkD?1Ax)(RIvOUdGgo6*aH2@MzU+;jHHV8hMJ7I$tQ2Nz6CJ57%cZz3Iw-fP>Mth9(m zWD?1;xQ-32Y{Q8yGA3!dUAfu>6(O+52Jep!l$?YmN@Iw1tqVsfxGpA|+ob=|zVChS z$)y|+&U2!3_i0!q2TDX9q!|Wzuu!nc2=EoGNBcXzCQgJ+DN!nDSk^>XxXTxxr_1Gw zgnahW^B$rOR5r}F{Msh`gB1;tRHu(%Xl7ge_K1(uB~mq9%GMVDnM2mM6R{Ev~^7$^f)bu z1eUm9UFPQ6wy#Cep~Xb*#4d6Z=n+Uxx*sXk72zC6AoG7&f@0#_jn*8!I^egQ*5ZAlJSXTH`TAxmtU-Y zk@chcb?4bH9|=~MgT(JFZ4tq9dr&9hNJ=+!%;)uCCky!X8d)<;`uG%H&!J#8XwVjPdNX&>(Yy-=n{plCAiccV9-{cX38#}Dq1O+)~a8!nx)6OlJQx1Oeeuk zlbN*utFbj?xi*_*Lpsz6^HiA^%R8*hO~AD>T3P3=8YW~vR#rdMU(8sMU#V?T07VCA zYvVLfVgs59Ok)46$GN^r~xwMV?CX$tRM?6q7 ziAq-(tfG3eeS4?bN`uoWElI5;i%w|dXU?7N>~511bELSwVl6NzHnSDXyRWao*gCg~ z4^sZTa1G*g3drQA*?pUyUO9&WvJ}l_<7qCMpUyvbwcZlikGR8;u+DVeq^B=0DnM#c zboW_JvnEXroRAuXjCqI`$kPHX7Uai=zejvHji%~I8n?0+C8OgL})4l?*!7#*F6)J|;1CjPk^!=>Y_8qLxXDWHILjbW~b&_N=U<*P0RPAw!fhNL&$R2d~jg>d=qEACiwr?LE$Yb+0yL8~rXRlnj zbmbUnbCKmjYHWz-^6(@Y28&h~;$GG1*jmD)4`(k3WaCv% z)^+#*7K;?prb6`QoF4MkMljRXby}iOXa+u(mP+xYRqVjv`QikWjH@F@$`Oi9o5M4( zlGtf=G20gDDkHh}5HS|$3Qbco9Ev$6+7Fq*ie>VVYn`O7b|^PAEfN!#2}jwFQwtfj0i_3N}5CSJ4Mwh``fpXbgrb`O{Z z*<}YjVsf^w>pR}WVi_5nJA3x5fUKC`p%TEU-koi)1e~>)1E>H^wVIE?Y zrRSR8^%kp?;pv4GlwnrdZVMc`C{9v7^D@W!^U{S=vH0@?&|Szp~4oSUh+ zrkQSa1uhoVKTN@yfFbf}jhJku6nec2s z6AcmZO#H_?2?RP9Mr;0NnrKNo(+g1_?Ku_PvjEhhD)E}F+9}Ux3UjMn9V7r#8h>`* zVXE=xhOQueDV)|Jp8Bz}3|iDbmM-N6fr8uzIeT($_>_S3w7aLBs=|xO;GP+DcFISG zRl#u6$(EUv;PAT?gB_lPlJClSYyc%)v61*+)5ctY$J$4nNWPAQ9|~WjnkQsw!=sB* zAy^L|8y&pnp=U;XBv!3&TTf_f>tJSB@_yyjR%aIkKk6bU!yd zKRjfc5<<<&7QbH@9L(F6k8+Acj~|lNnOe z*ENfnWS1WwlAonAv{L`p@X(~a67>GerZ+cSXHF8&|35m@WPcG7*MOci~!t+QtFp&;`t@&~D|r zq}RCIB#p)NxO_p!=fUMWy2=Uwv{E#3N(O32`0Dz)>gE{p zfedc#l~=m90|Wg(Jfy5@j}IAg-aAoK~xZ!O*mg_vK0B+%coCW9v(U~e`zEc%~xhf z+Oa7sUWT_3=$wD~^1L!avd{0{LRz}9xhRyDUlxa`n^cjjr>?#TL{!EnMJEbfzI=M| zr3;YETeq$wCn#k4I_OeE%thu?k(c<=d3`01nUA%V#ZiNZHQz%Whzl+jCZwK>F{ih>~r>|ZS2jHtM1Z2mjX*Y5Dn*GPYKaeG63neO2Oe{xq_2dSZ<#d#^APsFz&0`I|eKq2b;J zt&u{_)*+VaL4=KO%l8K4gMDuPj70+5)CxKe(9kRH0oHJI;I>AnV=`E>WOeTHm_O26 zYdESarV*iM@FreJVKa?w!uljWbM!4y-6+;_{JWJN#svGJMQiz@p~#m*1=Ge;-*IpA zL_~x5DGUlxJ!e2n^U)YJ2Kg{Nz8Hct{F(vp+5ZLz0V7cJn9y3`yQq_LXQ}P|B6(Fg zMM~jM)17^q4ZiZmB)PP;MQ&I)B{#<;sl$Eh76Z^X%(Wpu#9+c^Ov~UfLN4<5CNo38 zn@^$pQfux#KDZR;0c6xP$7RUK${@3b5XTD$Dv?UHR9vkLW752iIFiiC>Zd+sz#BZ_ z#Ri+!l0`1oH%a8GrEKJ*SC9s{ufP_eB2M^KhyrnO!Bb$CvM^&xVBu1Na;g_^U2d;k zDPNa8tyUUDRLZ>68j%cVPlFNIKfF(v)s$W_p0Xs3ULma4ej8j0Er#_-9+#w;auW;pji}&ZoUK`3TPsgzEfs z$_NRW48_7=goAj^MHgCi>%z8Rr<>WsaMbMynjTq3y1}zGHR$$$<7FKQ4ZBD}Rs=?X zAK~s<6HiLEDcQaa*us}ZQ(jTt=M9)QQPbNN{ku`M;a+gDaUQ>vdQsBvab@}Sz z^XCvTbbIudh+*OP3umtuS&##VUo*D6(Hev&n{+wtz>JFFnpmI#sJjDc{I;ekv@>CA~9K>GZr?oc-5O zP3_cFy!G7F^a{7J9=ft(24)FIi}d*5iYQgXO)9R6++ot1b+Ri`9w z8Spp-$6Q&tA+iARk1VXbG9@QTqy3=T>JyIu=amRq#&;4foq3%W2LPW@?d7+t#Ai#gx0m`PhlVInmSE(NNp{tuMy;$Z}V^7dk7p{>`Knz-6GlVM?=B_h+b7>kYB?7qe>K2OlT4Pw>twiGWZTSOBn zldK2(l)o*ZR|uvchinI*=lY&y-3YxhB)n@dkJCk1!*(`HwO6>>96T2iWg(zNTnXZ6 zUXhX;I7j^x&&zR6)nT(^#Lpy^Bi=!5v+!BunC;HsK1CGy5%NV@-HY0J9? ze@=2bb4W|#T`mT_lmwLGrqx~}Ej&_v1RGXShpciJ2_fgCuk>1lz(zXG6;a-IHZ0Z! z31tyAV5~Tz=DAU=QdD9FkaZ5w4;Ml#7zJH=RnTY_1`;tt`AIpiRgY+ASo}KI9?#y_ zo^_`5$DG27m6c*fC$9RnF#m zhV&>g%r{j5W{DySj{1zcwq%n=IMFZTl6EZt@`fUevRURU!#6i~P?mHz0*3b-GYK6f zObFgCtdJp5hO-0uf!Syn4!8B;Wn5r5qRy{j{)6~tsn||}L!cB*BOO?H<%$Mn{zPou z%H<9pxGI-^9+{w!FE~eB-`JE-5J~>_n}Qui2l*6l>Ly}gCEE!NkA#zpSEQHg5eC<+ z)5Z59USIW-dY3gh(3j2SnPy>7)OB4*vp7GL>3%BS?16IpYb%Y+gw|VQ(FF9@;MPOO3^RkL$((Aq=jjEn_p^X9ozY5=48A0c(!g5%`6$;!F@e89 zJ|k9DE1#%~sYtZp5wLnkcgpcbNWc=X6qM~*=CWNvV^h>VQe zXVM?r3WV`qup@0q9y3eBJVg)4?oh?u^gYk#pN%2WfDH9LEu{5* z%pT0#Y<6^L-0fj>-c;=)rn2{3;Sj5PTVp;`)9$u_swCl6!yiqDw z1~EJyBi3b0e82W55F=9zJxIkg*x~WmG;#0L$rPcKZl`i%QL1iDn`5GxssOw{6=`); zl~~)zW2s9lOr+3wmCHOwx7K&KDR6jPJmaLEy!wsho45WHm&LtratGaY`ntGzd3%26 z4i_)B?>@}eW+uBx1YT)uz9_kwUVqP@Lq7!uj8qXsfRRfbtAW%75)h{sNMIZ;!0A1= zSNAH54JQgs?a<^i%DByaYoq~8YjARWJteu;F)dGdnFYuihe0Zj42Y?mw5Zo&Gy1z= zB}`4PT1mSQ#hR3E3Bz+64JT9!A&y`^Fz4H=8q9`NM;LA*!Jp)1Wxq}IJrXX)T1vhk zDjXeUfTEV{%&%R1Y?!aai<1F&Rt^tzeX-7Oq}Z~=ccq7iOknr0q(f|F=P#Wih$?LR z2$C;HoY`EQD-?7lA}!hM2bbqi{7TuHsM`Ky(?c;RTRA|I=Y|yvW`}c40b2h`x5rxH zK1gz{bDd2!ON<(v8Ix^pp#qn*J!x#@d6*Kq&&m)x;H55QeU?(qvSN4EHaRt)himOYvgk9+{2W-SrA%E`;7V^n6PL1iotHZ&U10p^invd>Drb)9ZoO9o@j$H*c;i$%MqcwGjj>0p_)Pam4JkWwLxm>bJv# z*LGY zGt0Ct@tSFYAFpl8QC_;rK3WoV=(RCVt!M~wP^x%5RR9%DT_F@i$U9$b)Y!a*qT^eb z6>*L5M<%vKMHnx#xfcn05MvL6q>;1rnu+whwkV(C#{9i?*rT*k7u#ByRuBsD2BH5e z*q&HLciUunL@JKlZg(YwV=382v{efG%O3ERo3u zXA;s)J-=edjBpv}OrWr;5l{nFBVy0zA*(0ZCgaoLQ7{G2fnlb}K6j}VgUi8@Aa<={ zmd_9n$~8Rg*SUQmNP2@kAgeuL|ENM)K(5?=idFNhycp4~PWW(OauLh-rPGU7UOE-B zbObO79H|#C6mw9=RdqksGj|b~w_N>!2IZJlOi{DwP&6BxiOHkqyZ%uFg88G+D;p ztOU6M$pB`@*r61*$;CpsR=QC+>9wgtlkR=GGvI|~8I&5SA68mpGY7p<$+~pnDdCVa=P$i*_7z^=g1YI>QLTex?=lAX zhk9t2NF@H%rdWQWvT} z3nNf3p_W9!$QqZfu1MH0uujdcA^6>2E$XOgB`+UX=_*t8#svo5%Tb3)-)w@-C5jsA^PAc1sZ2Lgv@pw04D(YB<5d zN*=3P%5g#M@#RC!%@~_<+nZQ7-QD&OhpO=)2AtcKoy{``6jtG@aVq2n=aWMO6nT>- zC3ed~t)~jt*S4pj8X0sbn~(QX!pxYBg?uJ@qP-q^OuQ z0Z+|0`hh~&u*}0EnJnJWRe>r0Q?hrXypUNrpC(kEU{88JQZeB-s~b|!I?uh)o4Kjzotpp+!fD!`&yjeO*?w#} za<2j*?Nj0&T4nYsYQGMA6&9zbIn<5ZxQs~04_KF;Z_Dg}SsPEc=ny0%|7F+T!ABXi zBfT5?5R^t(N+mKCd0CQRQ~yZ0Uk34v3!FBpulc3im_+=qFLOF#@cPR7Ek)B$ikND*PIqwyUCe4aRazk!%TDQK`}~a8Ow+& z$|YJ=%Tps~b6VV#;MUgC>dhq(fh*K>e+82uyN5h>`EMRaut|xfB;m#ylXp!#*;v1s z9(3N6Vk;Xvd2<5T9mI{a(bF$%Qy|Vjzc{FKvwUfa`QE>#-*iqXV69y>$a($>tvfY; zvFD+zdxMk(xC~EvpAAe3eku||7_1KrV%rpPD1@N&6#f^-griXFq%acT;ij<=1rQoU zHk!w)LNxkNQt*s*OveGa*=iUo>OzIAQ9&$&H1h4(-Tvp4`aSgl$5ym>SGmOHtSzKjXL>PgOYkKC>k{@;-}{@ z^^{Yn>^MEn(BIaN=od!B_e5u99Sx;yniUl}YlR9v_LM^G()eGK*`bPQMAC{iW(k+* z*=`P`JJnuc0Nmu~D4lfeDteIiRoXzjzRBg(^0r5?7sMf3Xfox@nuR@6c{8MFclWj1Z5p$uGT z(~i^OkT#^W5zBC7Un&YZ2hBIU;k{lP=RlhYhHku^4qBRskqEWEFKhB zh9x~cgF|L(%|~{TN_giG2EEC{X+-e)sbycckjs^hTH4s4imnEwbgd^HM>ue*IoQsz zzL}v{+adU5a<&53+?(X@Qm={;PPEKuAB+N<-eZV)Rh!*rFqLx9Cq$^S#rq>OQ@BI& z!ZHNp1P&v82HujNxfh#%)WtBE+U0oicmBloh0> zM3^ZWauVYccThJBtI6k*ek`($AqbnBZ;*4fqGVCjg3&O(rwa9>B*5{8)M$CJ1d{Cm zq5{x$pz5l2GFmPoDar+ZFrMU~SMBn!E(RIUP@&qD<6CN1z$e10D}FpkJW+oc7L<*g zGK1t#(S&nq-@^kDs!3@jD6=*w{DJ|bW0$=m%w8?%U1Yn@KmhA{T7d#ubWcNU6q^V$ z*LG~FT-l!^R<%92orM=)T}Mn8)#`_Lyiux$ zl_o4N{FFCWzs`#iikSUH#YDl@sa|8B(2#pAj&-?7Ge^@P`RuC}Crf4#GwW(NO{SLj z{&u!;rOB^~wQL+gu3ODC_Ku7~b?u}SR_%rD-DT^7iN3M<98v(cn|v$05)DZkq<>nh z)okTb`kF)`s}W|KQW{dzjZz{ir_Y!4e?7eEHIDCHG$?Y2b4@>eP4_@P_u5n4L8CO2 zqfakpc*le1o@@UW$Yti&nPBajQd2MNdi9m9<#BzFjR}12>FU?nkjqW|IuNteZeng> zPu%zx3@$ejno;1AIbVJeLgd-!&*8`=_Y2;6lZ}{B92-skaZQ0(m^c?J0#Le!Dwpqx z08MEy(ZEtVX9XtsYHNv{$>D03In>FJt8zH1*UBJPu z#6B_50#yC}Yytr7RFAcwbsp2nw-CaJZIJ0=qAs?K5*IY_GR4eGl#*<0_A}W;DkXJ! z@@1oi3E|uC$q0jiXRi{OaoG@@kf)hE2s8Ra!ml-Mcjyf(FuafRQ~|Qp>9BS%r!7eUHa}x>oV!P&FATRVt&=-4JAlJA=jDexO(}q za-(@c5@{m2>fbqDAaAN%Et5QQoaW06?4@B*k`A3qz>{(%rk16L4l4{bLAY27)5g$V?RI!=Co$XtA8uWi~hPz8^L7iBrxV_}`*Up~)WBf)) z)yulk1C2-Ga}qiRrQF$9&Rw0M*z+%*CzIXfY@aAt@)ezhAHtzV7n(LN!Y>oAOM>Sr zQD_@Y0n(dXnWfkL0#DL${Op_*;hk%RhLmYGEk#JKB}$TePRl6WjMbuL(R7D8tFZkz z)_}b8yRVv>!9HsDg-vi_>BzbalmKf-Qz@Z>6jTTALNel_9XX_%lUA6e?@BUfft}hM zJ6~`YjxDVz3wU3)`z}%cJKwr9Ha3NwJ+(vQtLUudZ(F9NyeoJ#hKb z)lpbdiAX$yyYiS5i;s>T9Ub}d@aWNFPd)V|5{)0B;OGi|F}YAX<&HixJbL8Vk!QYi z9fG80=LUf|kqBAGo|u68QDe^Q=C~=>~=Zer}(5 z>MNwg(AN`(HVz&=a^l3%;eY&(Lw!B+dnb+_9sbeq2no3L`{aoy^Q+@0p4L~_IC7l) z>~FmlRVZ`haq1kU&XbRS<-p(z;~$S7j6WKGIDUWpVE4~=-x>dAe1G@dp?|);`{(12 zcHc!u`hp+xdiU+|r{iCZe?9(a$bX-XKcIjfy&sQ$>mMJDe@XdI`JP|iAOB|eJG67) z!1z6S`-JkJjz8Z0&QM)Lb(AK0+B+qYOYb$-Psi%y0X;t$f6Tw%sOj;8p~gD3;fJqS zdW|#b3*)~Z-*?aVcmE3=z0a=)<4@@MSDM3b0NewH<)QKYKL42i&<{Qx|B_et864#$ z9lkmsf#GmC{+sa!n#%5<*XQ1O{sSgPo8$WcrLW**f%jXG-e?|8nk3Su<&i7dyV4v2EmFpd384)8G|784I&o0eM%f|A$OXdaS6JCH7xUs45 z54`76d+x>>ZpN@aQ3s#ERf#bX1HHLo@z|D7a98mD8J`7Vk z?GqJm#(W<%0|YRL8mdEK;_kOtl;08(idB2~umAJl_P>4{!J>d%8(Mh$FTnU6S@C!O zD*yn|`6nC)T{JDR&`!g#&Mukpkol-d{nx_I@h8a~JJ}&30xJyIW62Lc!7LZP^d+qC z2aX@yJ}D{zYX8PK@@w`DlYV>m+kln*sDX{&qq@NHDex6tV0V5%d!I1j8W5n5;bZD2 zTJ#}BK4seAHEYe+k6AI6h;{j{XVC!0CEM6aa{)-9U4NUuU@+c+Y->$Vt6$+eedOQT z7H>27ZyDZ+yfllfjr1Vq1?CLt?*}{)w){Ep)B?m7391a?HPY36dGZNb)gBY1Om%4D zBjyfWGKudU0i%D&rCpwaOCG*}Quhk2$lx%Yf9T$(VXm;J+A#oAyRLuY&`I@MxQb{F z`%}d~6_xQuV&r#Zi(K*o`u)9i1DI`&q`%za!4ft3F&6d8Xk zRslYJZROsG9(s{j8__HI-{?x*yW%y~z!;yF7K+SZeygG)o+8h}6=9Aj4GaBSbpt&T zdcJm8!kKLOoZ%n8PaPr4r?x0}Yd-#Y4Pv&A3nTTOXNAOvAqpm=mR0hyuusZzWm@}f zW+My`1po%W;H$Tg*Yg38`e^tEapNK@#7ki$#PBfdBQMwipr#$$rG0`?+IC{(6eU^~)c zVqejsXgGU!_uF2U*02uaX!3~@*zv^7rejOp#=rhgUA?6cCggyJX{5bWpN@asqS%Qa zw+m@2r7aQSdy*%{??Fw)u%uGFzbD%+6t6AYG4O^?(?%9-9%e$1*ka|N_T1hV^0W0| z56F3(B|I?Rr)3u0{6lO!6OF<@ye;-=pipX)^aSA$i0Y+A8q9L6QR#=?-64d(iwkvD z^j7r>X3XhnrWnrIq zT96`(hzuBs!l0^pm}}G7`&JBpHC^2r*Aqz1+kj$7PBh$7w(?Cf$lkg> zN2CPdgQW)u-{`_{;rPw1H5nFu%@7d3ci%y;Ok-#U**prUi>AGuN2n#hnR#w%wl01cf?Mt~{`Nu?h9mW&{pmM1jXS2JrcN^r8KTnj zo|fC~=JqI`XUEsG^ZE^35=6*(KYNp@Yw8DsnYroFh~ShFXQp*h&-pvHwtZq%5*9MP z&`{Qwq~jL>LY6Dp06y6LE72us0F-P9hBjDTIQ7u4I#4oM2iY@_1L{gDj7i}wjr&bT z+5Uc<_d%eLhE5J;OpwekvdNG{B%v@8l^Bo*-mXwLtia`wW}e$-3I2E85|oK%ABbgC z6H?o}QMNN;EW(0hc6#AFwCn^N684&kTRzTuhg)HUu5_(55_}0+1a9Y}rWy#TxT1;V;8LNbq zJyy5sbYqj-Ta7qqz{nR9X~T@rocxC;*ZAvPastiH*Jyp zkX83K{FdMfc@>P9j@YNbh5=RB(M*LT1tTKJmHpKLMx$_qjqEZ-&ix^C3On9+Emao` zlx9jx!hz7*KNzmbrTQP9Mm0`fznsxvG+L%Z!;ww|E;%yUaFR?4ELMH#V2i00A1T3o7QD~0F{MM@JR}5CPGCOZ#dDwReu*f zrDd^`!~_4(u$3^BNENI3>8mlI1-?J<+I+xf)f!-JHho39ixn3w_&~Z$tkHe!{YYo2 zKA`$kP3-<)H(1Wq?>4+SiL+7#>!}a48hJ$BYyrv2KmF3bwdbC zpejV)cwu9-+c>!Vg#iT=w&o8a8XtMx{5n`Shm|7lNt9tAKVTqx6Zguezl+$%Oojg8j=!Mu4~JhpzCpG<>d+Lq_P|k= z_@o*spFTPSl4#g2ACrL3Cli2xB|~di@wGVuNjMvrvw{wf`)i&Zb^nJcNVMt^%FJj2 z%4ns;dCTAf@hUO_D;(NJpA1`VWyyrwqX?Ec&VR)`ou`%Xm^Q*}DspN)F?-AIH-bZR z2~`(1eXaZ|)-3@-V{MxgER|?|dGi6h0gqab#I^gapxy49{MG9tMXNEF^>zIMTCGjW zmQ0}k{Z!)jEgei_*EGx7cD(m-cK0}|Ad4N!4K4rF)U3}%t@SQNg+X$3?I9JEZesA( z$b`$*B=?xZ>h9S&uOx0%;*@^i#4?vQf0joyJkFn{ zO@M?*n9p(9n85L0@4l0fW;p(*+;Qbm~)lis(fXJBaeNukC zNsHnwo}TT1NJ44W%G_2jG4LcHf0E#y4*IlrTQno9SlVq*Jt-nbGd7it zIG?wA_o*jS6Y#HVaGR8crxRn5Sn&x!IYw5Q1K9R-rnONh#RS;+_4KY@17YOBr-ts%~AWM1{ zL4?t&5KjN^?tU)~;tYdel8HrAq7wcZv~9$sSp=L3oROVmss(BEJVVgQ+kFHQD6ORV zVI!_UwGbmL0(Qm1B0-&_@nXt39&ip`Ci*P~ML<*RaZg?Z9M@2Yu%Cv`W_*Iy0o4rG zVQwmc@qC#BTdWPmUNzoKt}8wxlOw(`NlZyB7kD^jc16U!K({w#4V3+OVsk6#Exh-N zCkkVar~H4w`jBiqn+_FfT7xBY*mRofJe_`yszU1J#k?C@e|r_1309Wrz6G-h!>3%u zv7ukoOxVyqkQ!Fi=nWPv3i7D7Rf(CFvs$XMYnLPSqop*} z&sQ70MlZip9q&3F_DL8v$O`&1h$>mcP=0I&viB*Di56DeR;J}FrLtcm&aU$PB|KIZ z?$4H=-=M{%?LOsA$XgV+Y4j2*GohfTvA#~rPLCA3p!vUIk10e4lcvzN6@%lL8!C<7 zXlhp9CL~{(9@NZ-UCE`kxP>`bG*xDXG|)E~=o=gg7?Gr;_4y3@SZ@}tPi2{zNl$T{ zjBe6?zuMs$O|~!9_SfQ18S5(XY4n{XbI3FmJQ+bW(o>vtYci*}2yIa!db-FOLPtdgQFN9|v*!uW^4hhFPg+jNDj z)2YWuJ~^5CxlKRH1eZGM7Nv_GyLw^Bt>NIf%`>ZL2@0xAE(s+?>QmqxjU?|yHY5R{ zG^#s{D#@%h*u7!p8t9iw#1Bxlb5Hz0TT3KVi|#|?{M z8-M@tE<=`;Qr zEfWkN6H0cu)2ky-De@92OZ;J#s;KpZ{^O7K=;1SIIgReH%$dc!r}>A`KXg782(!uV zcLM|i#(ULsVcQyd#!$Ac-lxnje5<`qQIm(M-GzF(ud475r5$Ou2mj#6Gxt=!E>Z{r zXB-q%+bKs?k>Tbku#pW|IOYQq^o!!5bxa{fod!MI)N@Z=HC~O45?~3<$tkIxaZ!v* z5KCtymG4a@HO4RESIYlJf5?xgvZEwqQqeon)`#aj{X(N>%wi>cWC1!Fc zIdF{H-gZ7+VvBP{UxDH$D43mv{+_SG&<$}zI2Cp)gF>pkR4b`*C|4h9(;&HJR~G>D zk%is2jZ6;bYi%&LR;^Kk zp(#*EWF^>qX@$d6gpTd@^?ySUr*zPazoS6r@w=6J@I8%B zX}cc$zOBc|H@BCrt#ON#{^YSwX}vviUk6rz9`)-{_cT1E-R`KTwLDeGW`lM-7|6w7 zoN-%XiPTYIPBgqEO*jefu>F~6M23VgXyI&%t<_vvr5(UN2bR_xvK5f|;MK8Huo*5Iq9#@6tQBBMhG9)gC$Xy@Dw1}#%30fEu%L;inYf49R~!tt%CV8@e1SKb~-n#>s(dm*0> zhR+^R=aLCZP$!-2Aq+9LhZCzZtwiN!Ma{d#+j-Z%`;sq|6n0;c0&A150{QpW#eJd_C)l}IZu zp*kIW1VL?&1YzG6iY4!PdqgmTSzwdlIKGcCrI0+i4+3x7grApx8)19z2x2lqPXkq2 zkp4NemodD(H7mdqT&>macV?M{Os~~?MHTGyx{5EO6EUmNQmq{= z$9r1^Kof^fJpp1gXBO|zG+4M>MY1%uKhf6U-kVX*YB6E2k4T~J@EB|3<1BT=KHD8I z$1o~$@Gw?PzKs(_Q8a_?HFAKgR=G@IwNqqesJq3Bo*}r$U!9{_G^#kAscW2=>77L9anUovHqq7FoeFD;8fzZ6v-pAQkq#pe-kT4LY;!Uziev47b=r(yWp@R&mJtZHig8cKGjSL|Fw8qewGj+@4 z5pVJ)hb74UgGjC5(A<{)?!_nzHR5oMqr`f)`q}f(&jLBft}Tz!2D0Vx0ToB~6zB2v z1JOgYxXrX#D=^Yc1aXUyLJSF(q3RVXfKB@BOyis|phm6HXmx$_T0pUPl)uwK_E>QR z%NH^-##r-yscG5xAK4LJ1o11rSK>w=>(Q|)L%0A_9a&de;U0vIzCIef`W-DAi>`o8 zrQ;~%>8^*@LiO_FVb-e0V%|NUG80}2=A5Q(Mr!Q8%ZicBi^EJ?9c~zd9si7KZS~Vi zj?TN4!#2<{5jaI!hF0$r{e>lIk+o=Yns8l}y6Tli`uT70+ew7$0mA5&st41YuAJMZ z)$HQ$dC|IU`7GrxJsA=5A{R3j`7{K%eLv>Z^1Bc*<>VLA55Z(XVvTY7?N6W}1a`IhJ7-MKZRH3;N;{g}A~7f4|r$Svc4L5r5b2N~Kw zb?T@i5b#3s@V=jkG2mm(3&l0LBNFAK;@fwLQrHa84fl>xG6=&~;xk40cJkv0hlWjq znV;`H&UyrSa3ril3t8gIllpDdPQNN2xYY3L);VJ7QO(!_4&NYvj|++kly+}#N%7OQ z8}aj-RFFwh+gZn>lLaz?uo_Lz*GfT*74B~eRFu4%j=9JMD&!WWEX!hh@o?A-m4GKy z^X--GX1Ls~@H-kTnKkEzFI_k_oDBo_nH#edeXD1ew0ebgX_n0#^NTdsP-4Gv;;k>e zHTvcRqR+NQKV*+;kL6v+T{v>;AiSZ)&SUxPpw#=d!JSbNr=j*-y(epH`4K*gnKqY<#RqW_0?yy zg?`Jx&k1n246^ie@Q2;0-C z6(XRF?0IND8@4_C2ID2Y?pwN`RezP)B% zU9$5gGtq=&qGjUGVoR~I_RpxJ8rV^qM<~6nw1ON<8n{mb*__iVn`L-|InjgJTnR#)>M$g3lMXr219D1sY+QgR z*uLjL7%rF8NH4E;R@tOXG|z(lm?^Wka*~|Qm|MUW`z^aYv%2>FOBc1fS7I2m1*(X^ zf^9Xf265u-9r%jttKBKvXeOXBpJdf7>y_vqz><)f2Lo}-TWgz>UF4P_3v{VdYkoBO zljKj9C=-#)?3%Ryr9Wr|@?p0KahxBSkx5}>QjHzLeR0pk^_BUj%KlAXdb@#-C?;lx zE;OP~hx1RBY1z>b)~ViADC%JN8H`QstpNGo3!1a+u3mt9WZCRr%$lX>O!DP4TY49p zfLv>Pe{N`0*?s%KJ;XS?@7O*cco&236lB2a`tLNdt`)TlxE?!eccfD`wO6BM_-wb0 zb+p^k1g3mGs}ZKi9;{Df0CVcU)5y5DImg^{^p4mUsZJ%}QslcYHarC@NR*H<9$`)@ zx5$>_1)bidYDIRJ5^XmN0cl`SB5N{*)71r%=7?v%*E#7B!D0xS8c2+=;-wPNbp+kH z>XfF?=Gd7=lYNGgNKDLCppY=qVGV7VA25qJ zDi>%Nma6(h2Qw))Dp~llA~BN@(wH0OWygZn%r3=4G~*1#7dkjO(BJhqE1k8`2qMvw zyb+t%v;HAB}e4Dq6DnDSEF~9cIDzaT;0%Bwmm{;zxh?< zOYKQTi(E?ji@75Qd*2^&H(D;jc#;w@Wsj%FMdaQ6R*{FfKcM8DYx$r^Ch#rYprp{IC!*Sn+HdLaiQHYYr<+_G%s*wWEXo9XtanV>bRWvr zo7B=K_RD~h*if~WJIltQYJIr5C_3x!XX?7N7XPza8!YME7+ZkVTAV54bJsG@!0kTk zwc)7S5Rh)58OsfNbLt$I_4?ZJ6*_RAnA3&8q8lHLi)RpHw zT1^C+u>03YNZ%X&nGRTc`zdBoDGvI(8~;og{0JS+1o7T6<=Efe*lz>irxx%Y6h*nn zR*Dt?%E{!v`?pXj@k$=nX03RXNtR<~zS^jL21@ULJ$qtWFvu5cBdtyD-(~V zEyj(=!n|jMYp3O~JV7K)plyN`v;e4Lg&G(-!WBd=8o6+;IE{1oD&e)tQV9#Chq$Vq^%0je$R<1(6UZo7?H5|R#;hE6IT4ST}u3?FnNOounOW z#{(!cYl&VY048)dV%F`8`LWd5&*zDz5G6Os#no%vAc`G7VkzmcJpmfi#?y(QCQ@sX zqjg=2qCnLuHFJ1#MHC;W`!zTQN)3DCh76WO5uUXJgxdaMtzwyC9BVuA z-1BEf28RuMXw#aIZ%6Yi_wf3B6`f22Wpy&b zOraOeGpLi_I^g-r@Tn&kpLseUSpGi*^sCESnVWKSAg4dh*uFacXD)a6Kga)AikC0e zIQGl%k*kmYMiYHq6P-Ak+)OkXZ>N#S(Mzg7kHD*a|`M@Pd zxpXHy&V0>nvbA1O)23hHpO8hXT2v-}YLky{r~@1Gs@D5DV4x!2SyL11GlI4+GNJ=yEXsjHAnw?}6*YIP!x% z$76QBy}3h(LoV;XjK>0@HMjqg-8cXz>&-9}gfI#DAApqNM=~e1ld%=f$q*p@5x;NV zeq)FA=c>Hh*woWGg9!+PE@VDDxgRqij0L7C=mI5nWUt-O1G>?wS7q`<^5mF0x)%lq zXj(5x>Iin0XSD|{y7_d$NC{uVaH)gP9NAt?a)J=BW@%lOZ_jQ+>JtYXURRUab1$eT ztkKsJu=83^Opxn6fw-L)E#~>)agKob#K+Vb&tEjX_e#itjcVg+s=kn1W{VOxw*0&rRC*LANN&xY!1^$E0teRIi7Tlpttq?9cI^c{aeHg&`U)3b zsoVITJ5Rr&<2}vi6R_^Zn=`gU^9rFg1IyIe;#UzR^8)s8$X@D<99ypHKD7It$F;3m zfi?pARpaBE0CNqGUY1%Pr3*>Mq6m;eC`ct)P7(OG)brK~3(-tW-zH#2T4;%Oh}zI+ zuBTIphESz*39`3!aqUVyx2mTZdgz--xD03Pd{3kKOoCg{`AE&CmAa$ZOo(1R@M?rF z%yj!G&ueP5$GQz6t}X9oke`jJTW!qtx@+nC&EA^**EG-x!L?`h{i5rDCa$T8K4l`0 z<1`9D0iZ0N_lep zoxuBEY6RJ+6r3bS+L4fCIwT#dVe0dO`c%kvlDxJ?o40PSZEkFzxODkyvr*ApLz8YI zdi)-S*(XG>yVdwvC1&AnoVBHm6W7*OtC{Gl)e0R`2+>WUC}H=2h87RTQ1zmTs4zp! zM(>c?a*gfTXU{joTVK05Anj3nCGG=NnV zJCb-aQQJ-I3z74MKMfBd0*>aTqK?i93)VKSukS3coZuYh-;95*zMBsqMfHF&6bFq9 z@j%+!FHO29tZAY*R_j_K=qw@QWt2%jSl9R@MsQo%&1*@`ETfx*Loq}m)e8{FkGApI z>tQ~m7a0^%dITgOvCk(_RqL99+iCBfm79nm>njT<#_x@P&erpB-K1pboYxWpB*PXH-wXrIAx@hAgwT-3Hsxc1u_4WPXa&6`9Cx~d#CjVz(^ACBedjOLlYL}EBOldu2PL*I0iE4eGTNDf)RTd^& z4Vu_j9XUBM{wKP|$Ka*;U(spjq*)P1wDM>vEVcn)D-?=W?bhNy4 z^Hw@wW&h1v;&4R5OCnkkq-Zz03K`UJ>pJ7wQ)5+6kEFHk6@@ji-TQSnrvCXPEiHb( z29D{QDS`NOkykr8@`ZIGK>}#XRv{$Bci6MP*c80^Hfxj|6Vrjx3lg~-+2%$j99*n} zhGth@Pj=Ypu$pL`5%tIL6!#5mW#EM4N1nW=r1W1sE`LgjBpE#dO3+4~w0wB#xpO6P zc>;d<6N$`W`zfMWDX~@mr$9miF^eN15@>|?65#8FbB91BlrtPwky@ErN!N?NBit4l z2`P=p5*q!$Qaw4cchpQtx<0-8hiPfy;Ic1See~9}n%=^n;fL~KorC9PuhO|iAO-DUX)nzAoqDn1#pB7yW+Np0n2^|~u*yzty9 zgcMGLv)s(~Y)PCFD0HlJq~H;! z<8N(*yDNrFuzB`3pqbN>PQ) zeqsDGo;nP9_w6qrWAMx{Df?Upzb5YM7=n!* zGERTr{;lf`c%5=0w0?BEAGSWG4haUOJ{{nDsaLlk+E0*@xVTMh#Am4)ky#0R;yZyM zKLn1}{dc+d!nYqxpscS6L4+lJ&f#u6#e?BvYuk(4w{PBlEJmI%_XpZ=G+o`b(V9s4 z!KKh%m3=GBRxp?P3A-W~tMIBzw_89iBUYr0_N1^=Il>z{-zuLs=Z^pgD6#J(W4SIY zt*%{HI|G)Asxp01`4b>2v&+XL*bGvCvvY(?;FuVUI*H-Pyx}l8?rlip{*i|eEuoG0 zS6>xfx1mp}_G6Ky39O)hyc_?Oy@I+=dNd=n*XR4$#7`=(w+*E5yn|UbATZ9HWW=IL z1H8kU@!#`Wn5TQjy&lKJ?2^}DvPp}N(7{AU*w77y+kF=epS2aRXi9lB|IX$eO`aMI z4``TQ%aem2hx~d@!mMdYQVj(qE{}%3$;_esjox4oF<54^`&R~6{8!VG;rQot@LRnY z=i6WM-7k=tvYoVSF$@bgdv~;72jzB|y?XdD5cwpgP>;h?$dlswtDuDgzUVN8Gg%C; zo_fK{+&r=S8-@sQB%caN(T4?H_$2=ei0GezRCK}4Yd6{3fGcKIv?dNw{nGpsdr4}V zNoK4yNuw^^?Iu)rd=Aa_scO@Kx0RO=S^QL(@k=6x>R48JryrR=Lg z2D|-flT_PH7g>|s-0tEG`9@;wsoW_)wQO!IgUEmPD9r^s&#vDCXz#Icz5|XR)IySW z%3Vs9aX#o0w2#DMfUr%|Ow7I%J!8MU4O+z!68Q$eHY4ODAvY?ri6`2QIVAe_Q@2>L zyR4!f+z!S!Q2?rv9ljzF=uj3UtogsM`{b@(x^zD3eqR*BY!jR4?q7bPC2ItQv2lF& z+h36Uh0%BsW>2K0T@@Zc|qcT!6C>3Y4y_^}Bxy!$WDT#L$o4Nl9uIhW>npd`);CvoRu-?V5GSOO zye4F2LLUhYADc3$B=ULWLANG{acgTcnufGZX}Dl8h*B|Om2R#0gEraAGG3}K1gx+{ zlw)6RMH8qt$x#(0krrA`EFe?yGnt z4&Aj{P(N8Wgc2-mOR?34{2g^Abza^5T)UA;`@^q%p&ANhBJHNLVSB(>`&xsB zih)!y0@5koW(5lqFr>bp_^56G(KW+MJNJgSmbPyz6k~?+Ya44a)X!W+w^KY+9}in$ zp9M&)s+#ql6%eb^ip^T15%~705hGa`z4FwPIfj5+%tE**PGlD6o#8W2kD#*zen=G) zbA;6AMF}#4V{ASwTQLvx5npf!;jfK%s?0%dQ_h7Qma~G7;Oa}RvcmSNMO=lfSh2aR3M>Aj6Ygr zuLKzH$7rrSY_pKCX$=z3hH^WUL#esr?xW$t+N%~r7p}MZ0z{BZ(N$}K>6_9#IYfuO z3=3wkc6dv!sU)=AHqr6g?>O@^U}uUM8F?OsKrn?*9EDtO272vLiIYJsLT zSiR7jtrj(o-EVtAm{Dwf6UOGuhj87~3OtcQ97B+PDgP+iFn=@FKy)P{R9=)2jit9F zdp6oxtl##;SS&}VsWi7zN5HFac6jLejl)AC@JZDY>$B5p%V-=LF>ZHREu=Ivu$Jy8 zxNC8A0VI7g4eezuKaVheMzpGPRp$-L6qs;xRZ%@C1L#hB9NK;o@TEv;9}%Y_=(z!v zZ`~q-LpA3H$ZJurpBMqkegy`#K+_2iX*W}uJRe?qyR-Y5pqyI3@#id-kxiN3S^!ad zHy4(geI;J)8MiFG0!C}QvSZ7r)J8hJJM@P(N^DH4p3TL@I-Tii-B$3SKV7J{0j+5h zWqSk@ZQ^#C+3!8PElrU|7lbr4D4JK0rIVaIQs!wB_@IjBlJ}X75e02pQ=?c1B-JUL z5n%CN$XUp}e=r|?H;Vv)*n(s$MuDMn%i9mt4Kgk>x)$kgZn`d-zra`O zJAd9dtb__%tDX?H0EAI1{z2nEs zivN()RA4f}PIPIDjk;!d-u#cdH#M5adxF40t5ht)UkYmOGQU09etG=h^2y`e*?kfx zjqpyxcpE$e`oR|z5g`Voi%9VRuv7z*c!&mt#0rDj#Z%0iqff6dpPceiGY~~o&{O4k z;~dIBL6{{Pqy0;<8BS6tW(VwIpZWscD)!f`oml}D?R+sEOYWkobm=%})fM8IgNBv$ zd-9fQ6XwJ8RFlb9US@*=yek&)?B1Ek#*1XnL)D^8g^c@oSc(-d1Y+0qh0QGaBa zWm5?r#$&ABKmm&_{hoPw@xrOo=Po{fiR(I*!(61aA6i2&4r8MfG+$7r-%^#TCa?@F zDz>Qo)aMrbe0t;2cGYoaO<3`)4_CeTjQ{keW*Fxk2D-VmsC>3e*IPF+gizKznhI0y z=ecsnVokbPW!c6Ni$I}#UIl}q4wpLKt8&G7y^u%p#7xsnA#+6}m7#9-0|jUA#>Blw zOeKy_edxg8Nu%`ljSb$Ic1(i@3O3XOVVCKI!`>w*K)AH6YKn;n{QhvEv`c|+KmICo z4yq(^N2vI*$)UFJ_lDcIm)AB#hMhdrvLvYmStXQmyV&?J?&^J_jhbLD-$g$B_a(3VM>-@SPkz~;iPt&WM}P)c4#y^ zKDpW5;rX<>W+jQ^YF47Nu=p300%7?xVHm}J0C4^;9>H%ZRp^y*@2Nr*^1rnJI9>WbDd*{X`*AzjVb5Dy$>-S&rMq+`)9=Y442Z{{-eq1VN&uIjmB4zr)#=aw>Ecf zxs^%ipmIUUehY)?_=#d1BZR0jtL2s3OKa+GvGzEEDY8R7Ehkz*0Ifii zRv&`47b0mgpi-UsU>e%6R*l`H#~Pc#`sU4Ro1R7)LH{Bv+k(0uEx+k&d8>t><|GW- z-2)7n)MU75G#{x*Ez*?0yg@G;o7|F=hvdH#UBEGObY>Fmv{QmFeuT&d3kWep-0^`9 z_`nmKrAm7-k~y@xnCzjKdFS#ulbYWs9HD+tyAbEzuDh=>mE%-z?t+jw0I`2RnBfF8NHQ7yP zQ`xei^^q2mGEKDv{3O3xAiEe!&!amX{f#jrHMGy+rC>BtM^VEC6V} zGzL(K>>cS+(9m7aoW^{#qiLc6=>jSs#YnPwTDp5@q#)CtC(VH5^c5A9#ggeo7C)N+ zHTqkOUO9b9X!J;D>;7FPU~%?saeqxAaxUv0rrRsa|38`q8^)$H6Xd^^aZd__EM?XD z++A3onsZ5EtDf(_G4WCtYjPr{N6WtCt@9bAV49#OY`(5x1zeU@Jt9YwsaAZnmM`F= zab3WZlJ!-5HZ^s4`TSMYD9WZ3yKq>jr_i_MTX90?2sYrktP6C>U*y)HKeg4X&=WQ2C$7q$|4!yW0LRR-%^Ys&1U~@~7BbdhD z%Z9JOFM8yD8tZw=Mm+V_=sB-GqWmU_U~ixJ1{YY|d5g3iZ>+4Z zy!p)`Gzhlj!~>?>+QnmNh_`+vL0>TUTTS?Q>TRYiwR&pqVbRc`6BVgz6S8ZZgSf* zurm#xORFLnHXq;7agzY9iO&QKjlenyWyfggsD+=}3d1j+zI5S>onBHhr#f+e?h)1< zZaS@j5Y>)|3PvsK;Kashb+q@%=)8?Xion)qfC*f-9X&-lSH3IRPqJ zW^_)bM;_5~-)Wlc$r9GzWF=Q3=uGOZ+VlO}^c)*yuRADafPb+iCg`(Gin+FLLH50S zVx~UfjWiyXQTsOb>-DNdGi9f>ZJ~47GjMGoKw0RMmfH&nV*fy`+lB|x_KW8)Xz^ri zAVJX^D_bNc2m`LH7Diql6#R9ZxdxH@#n-8|n5wPw&g7WEisYZp14Q744x%y&YeEtT zGAh-7E7}^nN!q7O#4B4{;Ru;(bY|wgb8^n4y?2*J&;l^qV#XadeQQms8T;<7-qd>m zo{5dR->#avsj!5B2a~oiQ9~K9Wc!fBD(9R{u~G|RIfYNdYv4up3&__btFx$dBH>b_ zK5nr^E&2_*jO6Y%ohhwmcV5XB?=DgO_K?V~=LIin4WBW{9MU)orivO*;}ZZ3vUw#LV{>kK?p~5G zn)zlJh=+)YIgn7W$`K#-H;KLQC@hXFvY`>&E->YL!)ND)M~{eMNQOB2j5?osjgk79 zhB(9}R0f@ooo{JflcMx-Z}Ys&cV0>g&t{X7hR8`Z zlS&Ur_Ebyf>q0u(27E>^jw*DDRH_*L!FUJrN~NHyinR#G5OaVE)p~ikYFkoe%RAh4 zcKPDkQpYwA`aGtq6k)p0LBWDRwHeW7AiyZx{a7-S)}**t!DPO!!W#Ps$j}|k8$9p` zW${f?Sxrbin6QG9zG=K{nH)yVriw==!?i>k|ICmGdHf-ue9xr&M(EmFyp&G3B+ILp zm(~_vUs~I#Q`pHP2_?x&S|vY;%B@LYhnnTcW(`DUFbDAQg{HS^y2_R1TbxJ1^+W%# z;?~Y8s2D`UP}_`cGp=eVBFx9?VYyqb9Xu9k0kRWyEu6PApreeRDwyD=o>M8no0rq5 z>G10qdv7PAnV&lfTd2&AF{^oJn)_skse0iWR$g5+N5%z4@`*33hR3Ra)D?KUA7_g& z%ok! z?Ul{Tt6YLvzXibHA3;x-k?^zHUy8|OS2@w3jE0jgnBv+S$&QoKG)k^nA$$RW!Y^^C zu?_-WZu?NBIW1Ncr#I*_e-9csjbLWgyQY%h8n96q@h;IEwk zX?SfYl+${JzA`T`>P6p_r0t>Y*8@=mAf{CA`7K?@IqTkI6SD0X7-W)HKR&G6?^s_C~2;d|LuObo9=E#{_#j0ay3SF)}_az zx#cUi&BLEFO$S&)UisruhRJ1hNxY-d!vXrAl}63Zn_Wi z?ZCz?&|CEsu2i12rTvuxxQ48h(!1fxh*)@(FJH*-eqn)zat|H(tj$Z_ck4l=wYH60 zV0H@8N3QJjc0@c~75g8%f6w8(U-`CwU#mWD9_xl;d#OPe#REDS5Kz>3c@Q-16(vN` zh8p$^UhiiM3J}}7zZ=Z}nzKvy6l8mq1VZm&;{FbY5c5;NHQ z^wT{QV6SXmX-GB?&8#x;-la;q{3A*Y-xJ@42Vk?p?&;{!asgz>Nm#L!+cz^2>(+1P?&}9I}Oc z^KnbQ0Dj8&>G+2qJse3V?G9OigNKD;E^D`I0&JtaMQ5htxhk z`BD{NX%~RStF*V zbbh@P{2C(JiP2NT&{V~9IaGCwR(ogA&&2JrdE1AJwA`Qt7T2sX!y50B?2!4Z=v1&a z7;vUNMKbRxsaW!TSnn=lGE@}kZLeJ3@YZS>Tq+2?CM>j^a3>oO17*fU6-8sMgr2RV z0(&gMzzC-ByErBrD_24=t0_Cb4lSYfpQ6aB?C+}LD!A98EggV`wqeb--gZwFiM<66 z!D>!4q~r0yxbgXOaQo*wtIMyYRo$QIW$b;XqieI=&!`thXKgJnDW4DG!g~ywfcQxL zut2#S5}a!g3*DgK)iygko-b>ul#WhhSYE$OjmVY)Gz8P7(A^E_zRepben5bgOvW{$ zf>j&`@f8-DeFSQDAR+nSPE9*?c$fRjJy8E&nfKu}7Vf_D#ZE?QKn8Ic^W6C)Cn#;v~}lD8QAgE5)oP zpFbO)Ve}K)!`JOYu-Nt_4&cM9~QjB0xkNZBowqX4>cyhA~6eTG_hJF z#a%)SkxkR6yck`yz5Pa{x`M|n$)#wPbo{^b9XR{0mUY!0E~ ztcONwt}F45Kx;ox$I!&SIY5ItZ>1C7FEM~_eLecZ;^BowzjwPRp5^*RZL7BO0xHqc z$@}yS2HZYTh7^O@5=wbg@jQXQ6@wv7=@MW)w9woigG{=nS3BEsbtHdgOmv5D0#Tie z8I;-^W)Vw9ZH$iN>vCeiRN;=C0_Sd(|Iv1_AAb-RD*97GuOv0R5v5^0v;0^k_V_!U z+3uTcwiH`er9Uy1ujDC_|0rx_kim(|^3ar0~PHtuQE7rfpOXx-#1+|ODjiZZ%nfg0o5NZDO&3%(UXb~2gP7WM=?E7e!1CKny z!Ked&@Cc~AZ|K8#sDn#co|qmwe^FI2zBAZxgTh=|{1Nt2+bp_}qos~MowzUfzQww9 zwxoEyG(EI(ky+Pv{?$Y`I`E(V=|R=`B!RTWEf5Emx!e#ZP=2E*t8FFpsvXXj3*T5i zO~7r@{5PQko00q`R#SH&P3X5P>grpi4+L+9>*J%fqSVFO>UVHFpoTpSBhy?9`@_jLgmpcTmB&ha~JIhY^lC&j|{$6TM8Wq-$oi<_Imi#6!xGHU z$aJM3iCu#%U!kzMg3%qUw_FtsELPzrNM>Zi8-GYfWKU9j^NIhKb+T5No;g-%PWz4u z*BK(+-PUX`sg^MtQUl=DY04O$0 z{((iVn48_3I&G96@P=jQMq~MDQg-eMQX=aX;k;QrozjIULsG(7`h^p}jkxxwOs+!6J0n+nnH>{I)>L0t zm(*$A?2m{Q_5TL-x8|Rgy6$vyuhK2e5Sd*Ek=2HLbO>s%vVq!f^$2tJJtQFbtMiC& zmou{Wl009y6WGkB(x54X^7AU~(Y@hvw`(69zwtNK zDqPAW(h52qwzN@rC(NpC1lYNo;kc@B`L*77!DsEdoAwTKuM1)bl+t}+vC^K(Si4%J z)$uOY+tv#+2WhWTVX!iw*TPY57yv;_*_$T3C`GtsCF)-J6M&)efIja@n~t>C4MFBt}9y|O0}BSp%5y#d?)nEC^~kR)uwNH@}N@UrMcm=7X-WsQVmgdKYF{F z(N$_vZ9bWQrSpk$3_lQbTNx-Zh;xF$VQ%eU2>-EvKuE%+w!&t0nB-RD#K~(MaP=7w zA}9U?2g=&yYjP7TGdiLVs*pEDx3gx7(2Zvc6B^qd%pB@B97aW^WH;Q{V;r@XvC%OPG2FL zBl>dj(a!R=M%VkoDR|be>1prmbooNr@N0BL2RYrlW}YjgO4BiB;y$J>5y9@QJcW2F zqCkpF>K4XX84cX!X-ZEN10xP(vX!S`^}=3a`byzMbnPY8yih-a6NnmSC#AiBAUL$2 z5|_QYF5?NVTX!7eLaHl>d>?XPh0XLCzJ^`rX>{M@{-ZA}o<6h4HK>cLmp9f{mshtJ zH`Z6LP(^GhMGsYKKHaV(`SSg>59I#KoX%h5Z0LM_1bLgG03Vt)43&1pCA-?ZP=+eq z?ZcFMqcZrFVZwb9jc6N8*g4=yBM><6*ysqbj`m8&TI3dav9LZj#oo_EM1w&uMn=OV zZ8Kgaa2u7JG!wjN5!!oO>$t0-#E-0$1u0J)uW)>!(PjX^*GQIk&gg||%=$;jrJ9WY zNQa}(|5Q!&QI#Qk*}cLyFQXmiUxaRi?5o1n`%F-#YobQf4TcVcRv{amd7y1zm&oi z>VTPiIZPD!FBqY6vZk;9;QJ3xcDpysR!;9yxVC4Y+MNM;zUIDf0T9MQM! ztEhhDIkEz5D?a?_)#)V8?nlZK{U)T|H+fVk_4o`=12d8NL%4HNSMKqb(?=iT@b)D= zTgU0w+3l!A-(FkEO~2Qg;Cp4~fr%0bzGa{TR{t~1o)LoD_Nim!5gySZ0zhTm(@O4} z^t;0ipoc+_id^QK7U(?$sANZxe@l2aJ$L5530hYI<71!@G*000PEHuGPK@d1jd#)Y z&%&Bne^@<83O}B&&)Uio+si*p?<&|&$>I&OKgm}X_wJpQMvhNh+}Qn)*D~12rRLh} zk@-))3}}JY;xlrm{gj9`0_;Th$Mjf6X9Q*5_$nUK82Rpx$NSCricVT{4_>Y*;bS;d z#;_KWoB179e38<`g>b>mV%!Q_ z0T8TWCkHwu3fv*OhxOQ!ALV95-a!d;v@NV;W8ZJbyN-^T7cmHxzNE6n)aiqh5GT?N zeu=8OI?;9Z^1|fWRktS~|H-Rw#UWXmy{RZA;iK%RJw3q!<_T_hznbj+qgY#<1Qp9m zkCjtwC1M4V6hPV;?Pg4Jba00wT5qJ%2fWttQGcF2kIC-e?!5y*up4Xnz=ox=+6tbA zK9wlL#q!GNatqaNw}xSe(P~GP=l6Dh#n*WY3Ug({5016Ti^hYJY=G_lf)P8mRklqj zeYTJ=wA|?!DItd_8b^X7XNupUV?U;$&wD7^^fJrtmj^qv&Y_C6mo+V8`i4L2d;Q^i zUZt893(N54iXEwWyd>Q*=&%}A3k}{&hOk~rQ6{^8PX|4I>zr3v8;n{lC&)p}S7nEvZYDvU@KpVUF;B%n2Ey@%;D> z4B+cUr9r1h9(*uDCl=C)2IlHj#2Uo^s!?z$ zNOVU52}6>U)=5uuDI#0d7LzNbRoRECrjP9o=W=8k<*(eH2u0BAGxKc$wHIYFxuO?@ z1iD2m_4!C&!Jm^Sh`A}PUezraa=x^aj80|XRtP2ADiQodfKQH`K6`9R7zY{3H#OnDo1>(~~JjJLX^xt4dVc$;8XJ!qj4kNk)sNH`~`j?nZ z<|;ORVa`Ucpgu#1bP5HUywHi`Pn|t{_D3>@rw*SyHVlQ5qfG_dIQUSwGto#-4zH9o z&)uogsGV7qh=4~~x~1Kmm-1Rh_#o$@bBn@}zn^M6h4EUoqu@a=Lo2B!+;Y|H-gS8m zLzso!Iq_XmYX;%+@;a(_W$ohh!rGclZ*@~Jlcxv}KvnV!GZgF2S3W)vS_l@(y9J6* zFsoB2&p#pFRj3Ytv&Jy%YpoK>{RS#_PkJh+*KVU8P&^-km|`rfu1c~d!cmo0K0%4= zoGs^VH}`;=`U5DZO5CU~%QmCL#Fg?)8lv#H4y4)!%xF_?j6Sly@y6!rrB}D7k3P&T zf=_R*tW3|XU)=sNW_SAZIxnd$>5=w_rpK==i-SG@q(S}EWyC!{KK_OD#CCoH(&?`t%9u!u(W~R$hJ4 zKcg^BF9RMudz=cyx@+f)p{}XPfLc6y?x}_3FiII(mlBoeU{pdr^!?@VHx(+2s@8a{ z@q~@E{k@I4@ zB#=054@`fLD>==R?Zia}iKNE{WYO5ozMKnYT{Xw}kV0o8j{fKrK!_JPZ*~ZT3km!j z*M<)a+8udA+3&YgGmqIBuwSil=C@%FO`kaph1FX=FgzM&^C)S%0e*190`8qogO3~6 zsj{>1=G0TXmzNLWEFVz-kuRccjDVE1H>m|y#?@RCH)nn_Ol zs6?lcz{gzxE7S&`%2yxt&|w=)5GF?PAAfwJ;5(&T!?{ub^ixz)2j)f&ZgRD(R%|#; zNv1BYR`3`gn1Y{c8#wl+J4lC%yIza8t=pJNe#`&xU?iHdGSC9#Psj()A%#wp6_sxV zK36v!;k)Rya&@EK>%Cy=E-F|g{1*BZNa2ib0a`1JBsc`E`(<%j{-+#1t91pIo##i3 zzafJV3_rW#r%QEhV^p<9*2^QxGaGpAX)92ZrNKHOY_fNX4DvRSp@Q!y{|MG78^?At zIFLkFS=ChQA|L6deH8=~^!zV>ojfV+OW0ZnyPi;{`>&*0V?#}agQy#>;C6g(#t+5o zxZ)!L8=z-)`NjP_K*{cMRmNlYuLy0JUw7(tG%pf)2Nd-2#2Y)3JhD7I!JCObe_i@#x2 zV2^qVjmT1^p|!iDT%Aaf(vqg>r}E~1O|zfL&PfpCFxAbexG#H@Tn&5d#WSbRE_9H} zEXkF^dC_E{sgf$)>~s{TJA!+&-`W4D88vL*hP{&v_QnqP})ezjg%PL{Q_6uhO`dfXW1?qC(~Fa zsH=Ah;SefTQ<~yO9=Z<>_HoNhT)CN6&!vDNP;U%3epF^L>XL+0%dsj`rXPOYhu-Z_0z zul}1H-jZxf0c`iQ1}>Z;te$SYdgTIS5p)L?A_m)q-KS>6CBAYiO8d z$oqgOC^+3v0j*e+*hc;Ycdk))gUOeUTdbI~6LyKh1mB0>Hb@Wer|UMxwnSD24lHvA9A zp;!uUoc-6jLlc&ccL{5CgSqWSh}99@6c#gPatYeIV)7FBE?L*R=`+3maTjjLdWsk- z#{-cf$d?j+u)^O|d7eCe=GYpn2gZ{bJqyF}o^i1Y5JfsC)M(G7!MrZCkt;q=g0& z33Hnb3M0aM{3oyE__1Tho*+p!8EwJvVWo7^E{UK5*XVg*2Lfui00borkkx_F;DLy% z9FT@&5t@0uV)J5wok?Tq8u`x01zGI%N?z^UNkPbi9NF#F9Mij)Bqw0(kK`Gf!G6hV zKFKehH;QrhS5gk5F09Z0oKE$w$GB$7BoJPso9r@IjOe`0#=0 zx)&nG6zkz^@BPfZtmf3>q3K4uN%M8jQ)D+o4D&CD0&AeBNw?#K3Pb<@(Ii!lDA1TH z`^_(SksrVdIfWM8xb%muVBa#+1yy#e)WmzO9!@I9%-<1 zWxpm{>$;&Z5AtD%DPm3ajLfDKqO_^pmQqHs%kd0JuuQ*yIu}a>+1j2#7uYFrTQqf* z<W_2%ik<1=GAyEBrhw7-qwjMPX2!aGP}B!y$vdmFu~s0$-)H6f4B+JuE;@Kq@Q zW&jS<{MP11=yJYj@15TRg1-YtWE6#?R9-7HYjloe?8Pc6leG7?N8mCuhK3;ghackK zKU0*jca86Fc-itnGqFHHl{=f5+2F`DOOGP5Yc<#mLX+R-_Y1^yg4SxcM23*+haj&P(oIUo8OqsAj)Zz=!bgO2K{>Ly|cRPa4uyLAaapAD6p;#dqtlCwjfu~dBr=B~0;^-nV zH`hQzy6WjdFOe^>0m^bjgsnV>)+8nX{h&ui@tXc9Lq2nw5!1y1u z?Vf$%$l)_IkQxzti)oY@PS>woK(~BB zZ)zc+ zB~Tk1%O2W|&kZ$xo=@wBXJ^2>u^I5jkY~@01G}+_jRDrw@s>~Es6ntckYl)V=nzlzn1fM?MBLg}_P{>Jx;KX~KUJJ)hQfJd4bOhYDEk>xZ zZkN+XkDP>m+pCj&Naay0&Qwaw#Ma)s?mb;NeY9CPe@J1l>`ugltT^mVaZ6_gt+x!c zaQNJxo?AHk+z}~_KL2koZN26R2j$VQiIqne|TG`Lm?!2~Je#y$; zO+PvbB>l6_gTi$cS(k2cz4`Al1| z2BaCH{8mG7$20FUW3|PTEvhzU*JOhYkIdYClT#OPLk)XNiRmd3X}syFmF=g_9i7xG zvX3Rh+B@j2wX&Tr&h2_+n2>JPR#L|m{TqKWX`Eik1*jw8=YCsyMs|Wiz@YKvf!ec@6fVXmCAe zkkbc3D1(qjxm#=~=dZ9`G}b;TC@NS;$cUAGYZqzS_am%^0dcFX9eg#8$u61aBa*6t zc`zZ(q7)H&)CdQ0l5!g4U3gMKDMbKw)Is?nZ{VtM;K0rR>qfSRJRd}fy&Eu5PL)L9 zl<;6)a;((eA&;*eG$=uipIGW+w1&O6b1YP)2J&2KaW{59e1hcfRVqWeN1v(tBE%}` zlRUNg2MN&z9Kl>GO(V$xpXQJ_u68qB0?v&Fddv%H7%hr*MKRtqN?g7uaY7yT-+y8cWu2?h>rwN-l;3Q&j(*5 z@>zWRd%~Jhw_H;Y`ykpLYD7(jHwTbQmw2pZh4Wr=V)HI`;<2NVwJkm>-1jJ`pFS2V zopXkbo%4!8?ra8lXznFQUcg^C-I?L%o-WeSQ>UVDfQ5X-#ii5z62GjNWo86pE5X&_ z;&xtEN=0hLyP=MLpb=?5Suf{II$_*#nAvQh{Y^O7zJMG&vmrk*g@`E@2m}xehUlcM zuHs=dn7zWGO$CJ|QV1v-(r$lCub+uIJA&mQBsp*M+?a?ioA8ztjt~{LsV)SW^)*_I zIf;s3`#mfXKULusXUgObej1sKYEvgxlusUvPF#sX#k;0IN2bAeVuyLe8dcV!2EaYkqk~&{;0Csq zcfk&goUF`w$#NW>xTPT?g zE25Ue>A>=V)Gp;e`mG2)v2?$bjjuhwGfO-pwHA_ZAFZRrv+PItq&I1`T3FEzlJ0)N zW019k*Z04En`BYGYkT)swQZ`>Pm))Fd@#G4vUb;|FhJ#;NiP`bP82e+3TI^at)}3| z-aD@a?mxf;*DOeOxV6nI9mfz}iEAFyT(p!MrHw=3RsFIw-o$4ih10A@ ztR<kDC;$DE7)`a_+ zOi{2^Bjn9z*~i(YcCeov$g{_^H}-+Ctpr+~|HTxic*Kroj*e_KdeMOC7}__PtrXME z&dR%DBk`{-QD$UQDE#%5EtHqm4TnsJ9CemclvR~;v3}*vz+`0M&482hzm8t_x!vIg z_CqZ5Tf{~IS1i@9U==37PAm0*pM(+AIkxMTG4)V>+^UenPP z5%<{reTGe!^ojp5gdOl_o_G9E3I>^D$lB9tX%%OJ zGaK0{{FRUxxMy!b%CRD>^nrA=ooYdVW@~oEBy(@v5(=O7!i8P72nnPMaUQVs9 zKsTeuUY4x_hCrzVIr_S0*=~&DZ8;{=a)@{Dgq}j+_pI_ele$9YTb=gju$NSFsmiTo z?HKOipowcVWUpq@-w}$L>uns3MRbLPED-zNY+W2X8r{wcE*+<6%B zZ-L%<*(LDQ^^p!}Vy^~ivzbzo@&jmx?pHWsAu3^tSh3;noDqe5(tKG#E4Wc%BAvVY ztZGyCJm;S!#1xAzAsLtqv9fN85z8Te;P9!L_Wo3_MD~~Po%W0ebdS`aw&R-Zs;M?d zA1cY*fjarxCznLlW{DMsW0oqJv|^jkCIg5E!6LZ+)9bMNj*qSc30#V18bn8Dmo~P> zrRB;QdKRD@I?GlEogLSzHXtl~G9kB|B}_o_9M7zCB=NA&|!IDk?>4 zZ8D>;#eH*C9jIo)M!r#XVCK>9P-bDrlL-F6Bj2Hzk|EiP1{tlyo$?T}+sWx7?8LWdLaxV`$L3ZKWz~8D;Sjj`Nc_|zB!Ubk)coq$qJ+_pOff;Un%fMu z%i-I4L2CT1EJ+D7#_p_4@*oKBY&Futpwt4!-7Q)|?=+fhW0U<;(MYG0yfr?SJw~W( zMbdpu$kgZm#tv6S1nykZd}^tIl2U<;kp-7z{vt5>F{(-JFrY-h{1V;^sAoP35vI?q zTv^#96>w(fJU8%8PpmGlT;cumhDdNkuByE+p33Dr6|Kk^aI#FUph7(SSZ?>=H>N-z z3A=I@9G?`5?|#bhyTk@v9AtvX*|9>y%)l06aGh^;T&hu{Rsyb;TKO1IWWf}tQ=n>n z!3ToPXC>jf54+k~fJp>SEuPhGsN;r25rOaYSKe15suhO4uE>jpW1ZzN;#7PyS}`uu z*+G*Fnah=PQ*nm91b#_sIv61*E9GYo1c;GY%cIG3$tvfR+})4(*QAC18*b%agP~so z?+qfB?;iRthu;N#_uJp>{&$M7Q*`4Mu-5k_=5ew#Up)eR-s=^iEJ$%tEAJp#@Y6u=LxK2VpgI8$95S%Gg(@4F1Hc8#=)^G*^!1h-nnS zrb7UVO_QT4lA$*ww84>$fe-vx1cVXkPdH?FQC2+`&SbtF7XC9++U0`NnLz81Kv{&x zMn|!wr^FJX_|Z>d$*V?edWtC5j3=r#l(0`>pp=(F-TzS%4B3ue!pel#1n`1m$!xQ= zL!N@gwuR}VDdesXd~t;PlN{KR{KJ&}(S|rF0oabrYN*BLTWPCyU`SXZEA_WsqFOFZ z2(8daM}x=O5}3iu1}IeWdA4NWHAER^zsZyDD7~5ehpcr_qOhd0sGpmCrKr*!V1tM< z+FO>eY&4p&Bu;GbN@))DXRg|c4vUGbL-9I%f9TLq!C>v-LiX>9r3Y|0An~BBWE_9P2j1cDsw(wHGcQlAHmlj3{bI2TpUGl=f`; zn5ok{N$YC#{e~MAl{v;^$&gx_1g$itTpO<0dn++uTd*7cKec%5#Um$zZmpz%rHp}; zt8l&nfk;L_iQwx?n@gLQGKcp&hZPUqX?s01ly)6oe{9M?YpYw^0DA-R(<1Scv|p4` zV@w_1d&!a~AUc_Z9D9>jw#A>GJoU)Kk3IY_P{>$hZktCwECRwbs5E-^~kTA zW(vm_{{b7ZaCh&{*Qn$t_ya<504I_FN){T9$*fDE!V9rODU8=8AUqsidc8=DW2h8ffiJ5PUSR8CuB2ZWoUKa z#@n!o*I3NjPLeDkzKPjgdKJP*E}(u7nC8Dsbn^8fbc?t|Sqv%xf7qqK-t{N>P_kaV zBe{EPF*^u+KWj`OeEP$->wdd*=2{=wo_c@0e7FCogP>-(?%%uqz#Ncu$8fhPDTU&U z>65#IW%bIP4f0YK7y<zQgK`OIz@YT)JK!z@ZJ zp;IdAOD@2nL-LqM8Op?;cU2YK^8h)pHm&vB23-i#Mmb^S-kTgndEn){L4Z)4P$>4g z+c7Ezo4&-&KZV_1zS|L74re2$ce%!q(S*Y>slQ9WD@@!StknP=RNmcqjkwJ2pA(pa zdUroHgks2v`&Z&#{gx0pn{h9ty)+Oa{NW44sfU=KVj9)PT3$n*@4n9A` zjtS1%HJWwqqA!{!S0v(x=j{zG!PSKjD^(ja!RH5=S$nMBt*mRIZcV8XJ8}B(QK|3` zObb4H0q|A7k+c^_@o4B_}FLtT7g7c4o@aE#J- zZop1eUCJ)N(i>4U4fX_(2K3>}m7)(>Em`GuJpQ*uT%5G{;CanO( z$cl@86s+ZhEalP4@+#W0k2!NmG#f}-$vcQ=!c`MNHLb=_y3s*gsDjzUj^60ety>YO zUnL4($2`W{ZpxA$Jh-{?`pPEPkDh;Hdqo?=66=qU7OgW$n5J`9 zJ3Tbu9Z{kMi3Yi1B`x^v>g1*ICw%n%%hSnAh_4S=?7jIif820L9Ux@Q6v4j0iy%4G z@nNlAGVW)&-+-d?z|AIR4$+-J=#M!`T0{BTw2{$8H(a7!jdZh{FBEDkt=J3r`Zrgl zem>>RmJ45VHRspA+0oxp8t_0Kop3-wyOIFfKa;q%2LsEDaI_ks=?tOTnr~mwVzkW| z&G3n+4n|~Xlq52(b$)_X;@rXpqx zqsElxq&TL1+)%~>1;PBJngSy^q*jeAY9gqb2D1Ib3yRRWwSmF>l)ovYjy6J+)TE;9Tq3=-gDM}f*<=;gAlc5iMjyz}1SnlZKr zqV1rM(HyM5*+R%Z9=BM;1^i{^p}slUH_sU1P_XN*8XV?lTIEB?14dbuH*n1B-XrjN z7m?BGSxKB!y`di27czm0FC<;`g)et!eC>zDwp~e1sJ8P?#uE#%GKNu2G_uOy#lJF# z^)?>cnczrU(=Rv=$>e1%;Ex0pJL)Yx1-(-tX-9W*I;Eb?D#BZnLPHeKr3CqajhnA0 zYizPz62ZZ4FiqndOQ}dHr(qttuo{Vq(yao3rqvLD2Q zK2if>=FTH#ahu@y3T)t|;^mrH1YmA}%;$x%i9%K-2+ZNSsfxAbV+`_5OSc&MFJvqXvT6@7T*;S{1FWMB z*J6!8teUPYm(0Vl74TRJ_(c!uFNSay7FRx#Ns>3e2XJ80b+kr@Rz0OPh=;xfVTp}7 z4ofkEg?iF7cuFi$vWN7xD$q1DrpmIEy(-;PgiD>wvQB!6B&be>o0he5M1z6#WlmsV z6jDiDGW}X}m6lnLZ=1us z4SOLAjZYdEeGKWFwwyN*XU1wzR{(F%gcJ^_!bD4YeG^V#Hhm9XONo2hQql6B9PqW-ae*ZLeRRw6BPk&M3ZPZZCfaF{{2|2lK+@ z!pixbON+b$y|}%;xV*EuNp!TRllfa4OUqn|2bLwVaGt{UCbg6og&mC{s1;m1&(#F4 z(MP=e6|g7uBnD`7GdfI`2>lb$n{F;rZq!AtVU4JT9T;^4l004u60TagyndwsBqX<7 zNGM&+aB=6#vR>aCUarmqLRKzQifzErjuKUCFzzqYglVBDA}x`>`52y#&^06EdK!+5 z_5~vzO1!Z#1M{c?m<50wGK6-JM3rsIG@xQ-b~x73aDpAyfrf5*4Un895X7~sr`u#y!f}v`9u&X4^xDc|Nyb-DoBm@P;!HN^2c3Mo7*+R4pkz%}P1UhxzTLOPSQ6brpoC zB!ifX5BV>>W-INVwq#s3g@Q=vt%ey<2tCyNcyo2Tu-U9cRrsF4pvXzbzmN#aX;H?- z0fn|4iazDrewPrNP8W%+K>z8S9g@ON3LF=W^sBXzyaB3<|B?pWrHf!WYtYO_h$Gbt zpBiE%A%E9i0uM3|E%UzEq5wYy$qN#khVlx4LNi~6Z9S*j94`fnXlfYAhF>E9l(~eCCF#7t zGWUHF)RZR6yRl7Y@YThF1DU2ZI4Hs~K2@oYmA6tLWpo?gGC<1a*d_l64Zs(mE;cL8 zSSe+$$`?s-xt4!I9LL8nF{ zc5h8s*U&I^idh!9%?`EhVoq7!#D(~y(vry^g(3N%73^hfH+Dpkmk7{UTIWB$rE%|N z>}+d&W!^Uk^M2!&d{CF(7JOyr$=1NqiPlOw;#5Eh>)=p^9&J>Rt|;hZy&-#{l--1*q1asHvW8a!LZI9pX^En4 z&RSnwzp{N{b+b4=)(>EW$*hEwQ|+{YCAHtLd`W&(w6tg&IXMgYE14#}Rr8F4 zuIlM`?R9}B9DL8Wr%AyppthG)X+5$ExD+ zt9a6ParD`yr0Eh9N}Yc;eRXARLzwr5U}MMy#Vg)kv1Xi|OsPN@p+;WKk+tSgIok%| zMKOT{Xz194WrJ^JM^etNw-d=5>jT^GVp_1G%*vZeu@D$H`x4b~b+clygy)o2n{C=At%<=J7V`Q_x=ma^A6=#D!ZDb!UhqM1pjd7h9r`xOcKjd-kOIy zlsqz-#EK(hG3`{-zH%?~4tlnr{5DjD$Cb~QqF0W(``pv?e_wl#%6Un?5}92|pbyTA zI=gTonKg(%$H=-)+mt~A4+xzU>BlHE3kGu^@agw07B$Kpzl{ju(YK@#OMN>*bJZO`Z+)=GKE-of#3siE_@x|Nj@snq?m<)X=48SeZ?d5dm zZBLmzfKV2JLe=L7w@69$RadB9lu?|Vry@{5h*Td&d-AQZL;I&~~zp%3g zhzdirdxtHN84(l8qvKa=OHk63(zqzQ(}j7RNTwtQO8zezsy9ao&YD$W*T`hg3!WRxSYxn_BcL z?G_(eG^0ic!2(}{XOYk!cJ((TUS zdux)E=>T21TrFK$RvZ$MKIQBrkg}wmH*UFiN+#28E`B;>Pu3=K@##9(VnJE0 zJgYAs!t(0p)J(#CE$K4z-7gOrPT4AW4lk(+A>>Cfe5KUIsYO+41Fg`iH!N!%H}< zU?f0n?~)DFhO<uO!Q?iQP!=Ha z$2--wpbBK?a5rFLL@xOdGl`4L`-O@v>Ndo!K4w?G|I##wx2ZvP?MgMeh0P@)E1#}u z8fqJ%GP614ZSCsV;}lb>_`KaXjT$L|&5h+eO?+@*hlG1QFZZZYN&Xu8S8rQ{%TZN3 zbG~9wwCh>KyQF+#)R-pH>fuA!ln1D%PCs>g;T)mIRJJR=|vW8|H{;6t0c#1JKctDv}8o@k}wYeO3!A8p@KrDwL=u$g(04Ca)A3WMOm#kZ+@eEq~obN)O1q4S^3(Em)a>>;KGnmI={F|#amNyl@VF19!nS20}@!y z`YsP@PWBk8V2uGa7+wxSWq5N7z>WR4NN8p6*&5pw5B2krlG3s|{F0{fe!pQ}$p<9% zYgkotRKo{waxqEPib+jjjxY{-8+~+vcy0NF4I9tPK!eTIE0-2uU6P?*Uw>_9V-7bB z>ZNT#WI%i>^$;ULQl%D{9rYk~5N%SMPg`xYsO+AQhf04YMG`=82Pd@D^}s|D!B6Hx zCG8kDrF_*!{uFn*63B^N=@tjdNxVxUw9UYWu3%Bz9YKl9_KI_iTA#tXIrZ0O>WD0& zssOpqicXK;ZB4X(KB@v*`Ptooc47eY>onIVoR9;BTt9z>*YYAciMEy?kL;GGP9dd6QD|l41O#(g9Z1lYYhQaB+1l4-ykSK;24m}Piy6sca)IO!hC#z8QVLi{DU>mHZKxv|m=0410UXnbZA#divK9U!_J;dw z?Od_yHFq6;R=u)#d1?7o${2%#Lysz*myXRT*Q+?ToYSE;iLrinNIF<{M$r&pOQE(B z!1^e~y!n`QLV3i=^iefWD>t!wdlHmOH8FOA-)3lf=8RnU2WmEq?UaS&OW_*k=V$YL zGZGiRxX#7@uEhij0hGcDd)YfnCz|vMG4gKXfh`Um8cK^g6fS%GV6HuuR3xq}Wx)1y zWXJ~7J)P5k9tZak-WvpQ?qRd8=)o1Vm;ac<`y83WuSmH*9@_VW9d1XM^hw3bDWA|^ zzNg7N?SauT{V-@8%tYAC5ORbAz*$s~-4#28yvy!N)__~SLApSzIlev6nmLq*kU|FN za{Y%thM;wQ+>r+#3>u9NQ!%F?Nn`6k`rUP0_)+xBYXnTMv>97SlP+fwdHcLnOt$t5BxttKEU=?@=wpj|cVd91EB|*bnC%rH6(V zSe2JNGG2?#S}U4o4YOx2c<5#O0zJKtvo$Y@bF{@%PYn!VzPF}ps#K)!lwCpNVPRml zqRm@l7jpoI$r3qThmoAs+TOX9a0G<-ebY0?8c(4$K_hXWOtX3)Xpm1V0Pvt7_PdCU z02xy*2TftAjBhQ@G7^dp2QXGszlt6dgOBt`h$=3QOhNIQd0Kwv@;g4IJxYsn@*YJY zy^<;Y3u}dOziH2D0Qdl<@wQ{vi}C6M17WHvpX^QmuHhH}AZXh2Ap)sYZX|oo=a(oW zSmXG^*jTngDLS)rQgfrSC#WLu{Y{N?adkzS${7@ZMmjn?H~r4*=MAe60dV4YtKHJ> z;K6t|AWLrHn$aE%(h4l52akxaK^rkyfo3{mVnw3bK$FA7HM0RRnIsJW%3I zl!mft)y*LhM$LjDx<)&%NE9LPVQo@DQnE^bq@kTe!PgqXRE(61aMhv`_I)`B4Ri2c z>*DH>(Sakmw}2#x0ysHcxtP;8Jl1$CetG({~b9V96|`xJxdpsH{rD64uTA z?UcKx7|JZ-d|>HUv#ZHYAY?D3-QV-IxJKhP0+5Ej=+ZPQc=FD0DY%~-QtPxDn; zno=~*`Pbu_{|6Gc&_Y_n8828p)N2cp<_~C9ML(0*w>CJrpnp>=Qio#%|KX#hdo8AIWGa!(1 zyVAA1N=LRXOZ`xyZ|(QF5zB(CN+45HAxr;%QqC%0Q8W(^7mKG2*RZ|jZg1SAYv%My z!`1`&dVHD3R$~?~u4e_o=G0fa!+tDN>MwvB{h?$*6@u7NYDC^|D4UR4cXLOwq9H1e zW-?W+SuC3hUg30QHNopO4~Qaq$V@whAl_qSHtA(HWAi0Jar&a_9MP0?w@;|GR-m=` z8xZTzjf%^k9AX#2g2H72DP7{HA5Kr0lXWRF>SZNw~IEecjuK0EW9BjQo$2fcv(Efv)|gx7Df4UT z|6b}J*3ms7{<1z}Ufvht32VyQ`A4kXjIT@m#>(l77>i(cVGnuj=G@tXyUo6{g((}a z$v6vzsZflZMRC#)xB_adoo|KhLcz>YoO*YGImy99enB6&D22?}hD;S;Gfw)^>B(5` zdt5Y>A2eYKn@aVh+LB2ENiXfc*-&qLiWB80yfR&nRbF4J*HZN$QE8v|TS`U8I*=TD zZ9}EW`4m1AUZI7d$lWa;^$-?&@8xv}L19lw;I&3LlMawV!D_ z(Xd0yhTU}HW9esml?fE$;2NJ};e3g)McR#qgWwHLbL< z?|`r51Je7m@uA#a<#odf^zy*wZenbi!ggjT5`&2grbTF9n2i5;uEmHnSPhq^o}oC) Yn#^1}$Y$E3opZ#J&RZwAg|<%o2mJn@*8l(j literal 0 HcmV?d00001 diff --git a/binutils/po/sk.gmo b/binutils/po/sk.gmo new file mode 100644 index 0000000000000000000000000000000000000000..df4639ac938b28ce2e25df4c6b230839978663c2 GIT binary patch literal 149635 zcmdp<2Y6h?`L9>T25b!2bW;yD!Zvu_ZH$p@%a$9sO9qTE_DWjG!je|(O11GO3s2!83gLv<`xjJXU- zpY>4sI}Iw_rEo`hD;x@+g#%zwjpb)MDE*eh(Qp|Y2~UMe*F8}A{s>C`fLe=hI+XiL zDEqUa^mi|mKAwikU*BXbHU>_DN>>_AheyFm_!lVs>{J(vZ4CE<)8K446`lyo;9sH2 zZL@j{zX0x!`AjJJAHoT6&CL+~n!GAF4*Rp=9`I3b zUcbrWDS@iTEpT^uEL1*jf_uXEy?Jo6*)NCk_e-eqyU+9AQ0W<*vi5KQl$@Wyf$;ZG z{$GSj$EGc@*eo~`?hQ|dithy|_bm@0k8m!O`5Y+uPrya6SK9QlKb(yDG&l)930?VR z%)9`qo}2`w-#2Kr0>6jyKjbp&hsMASFz*MI&Sg;ke*)$I1}M2Nz+(70l)iVk-1@n(Q1Yfg z$=L_SVFerje+;GXbD_dr2Nlnsq3ZkFa1h+`3hSr$gmOQ?^Kdu>^M!CD_@K9c8U~oZ zfC@k0O41HX;Z%4&RQrAz?hLp4jrAX;a46<|;1Jm6`71aJ^Zjrk?01#rqZ%qbCqw1` zMi{{7;WqFq@4orfRxidw>3=rd3D(1&@EC7C0ZQK0a4dWbDjhwqG5y4$!j(hS?^@U& zo()y+egjn>?|_Qu32*)gs+@XVYkJ)oj>0_G^9ax1LdE+U90#|#&f3d7cp&DJ;NI{( zsC4adz3F#3+!gatQ2M(H4u(&A_iy2Dn0NlI#XrZh9V$P+hLU$L90A|=<{fS@xijE! z?3-X;cplU^awS|S|8NPMOyiMWehK675vX$c8V-Xy-(>lo2d7{@5~?5h6O{be&6fTV za6HB(Q1VZP+rwAkDEK|pxI5|=i)R5Gi}^=z9J~?EhHrcKF~75ZGy(f#e>z+rUIw>> z*TBu;J#Yei7AoESZnb`7Jlq8H45)Y)!wq07>8qQ4#2zz z+!QW^Jz)YWy>&2vN5P%prBLa=AF6#m36;N3q4Klc8`fS&!7-Q*fGW3Nz>VRbq0;db zR5^SIRd0Lz)5gJ_q1^X`#jw)b9}1^nJ{4{cpM(S9M{pwC{7q}G^PtjsB2>G*4k{ln z!cp)WI0X)W%j#VUDxPzo`kA|+((^V{J>2kZE6)K?^?V$ZzN(@0yap;gzkn*ItKfF< zF1QQ)I~)v)-m&}*g=(*5Q01@yD!&bIC_D;E-nFnVe8`)hgDTI@Jo~=O*o}D*RJx9V zDvz7sGWZl!yBqtS>A4n4|EpmsJQ|LM_rN~z-*7ir^uE=zVNiNl0F|B;>#TpDqVYd z&W4h^pEuXRO)3kIo+qHfe*~3|@4S1zkF9>hq0%+mvk}VwNl^9Ze7Fz1 z0V-YJLDka%pV+uJ8LEEOL8bqAsQ7;kmCrvx)zjx;Klmw}4tsuT`Q96Dh$6O2h!jqx$b3Ro2 zzZ-4^-+}#M(O2egb2t=p0Jng9L-|_ zrDqjXxnB%bf8T=Z!_VPl_#IpiPWsm3oeH{J%%)A?%hj}5K1TTaN{}L>RA42JM?Dv-5eWCi_qoBfF1697?K&4}|SdlB2Vz>k5 za?fh`0Olj1^f$Yx$jLnjs=gixCFgV~_us&Y@J=`keg(_m;2uRT-wm)5^HFd|_&gj7 zzkn*YID@|QF&V0y_JPt@HB|l&htkKzFn|w2mBTww?R~4BMXtW>31x183U`7x{}w9V zr(gg-_1vPD`5Onf$Nm5)f2%#ugv#H|Q1$6AQ2zb}m&5++7sVF9G*tV#2lj?fL6zr= zaBKJllz#hdP~__SaH#yugc={3q4fDn&+DM_cOO(e{}}d!12!yj^>Rlz9&;5``#BY= z9$W>b&)>tv@DVr;4(e_CTmq%{R?jP8DdrcU(z|^h%l~*d7xQAM`h5vhx!wTP9$tcD z;Kmyj#iqbAI2rx~?g{UP8^CX%($%xC$=w2~T*r9xJSe$MQ1Z@!lJh8(zBk#}@;?Ep zzAlH-QwB<}KZmL>7kTroQ2O|*w|^T-PHdAR*Issm(rW`81kZqydmB`}ei)8~FGI=i zzp3eOsOK`c2li(`g?|KUoc|cAo_qsUUj6%--u8qVUuHq2s~IZ3W1#BUIZ*k%4NCuC zLg{Do{zdM&WH?lL)x#0+JgE2|hSFEh&5GRf!34M(b1S?Dz6TZ0^_yF}x(BKpAA{;2 zUW95Vu`Mj$gP_V`54absg`?qxQ2ob~a1s0lsvghZ(%L~2R6dS_((9E_?e1x~6Z{G) z{I*+JeV+zZ9}k9dzYr??UEcf>R6f6lYEL7!w)mz%mE%EB`Z*S=9$W%dPPakTgU6xD z;Vrlw{MK{8HWuGF&&5#X*9Mi|UqZ?GBUHP52CCe?g#jEi!1PuQ>oM0s*+1&}AyoeR zZEJE%pvK?jQ29F*D*eBO>OWq9swZE-jbN~ymCrCJeeDI+zH6b%<6J0xJqsto&!OTQ zy}jw_AgJ`Fpz6mNQ2ojyQ2xGvlDEqaMQ%Nz3J%A78B~AqG*mr%6UzVgJDOf*L8Y$= zN} z`8^M%kI!HLcML2alcD6Vf|7qMRJmOMCGXEr?dc8g{ymhwx7ykKPlEEd7%IM2sCsi2 zl%B7KiuYlt`tcc*ezzTH^>+%C|5Z@+=y-3w4l3Szq0%-Tf`sH__+WCNDE1w~7W6Wcq+Ep2p z+(V$^y97!v_j$e#XG1&B20p)KMRC!zs<^CX4 z{eK^--fca^>}Npf`(UX0dK^^xZ-&y}y-@Y-IjC}e7b-tJhFZPr2c_?wVQ;t>RJlxt zs?P_&P2ox2{sM2l2}qDHx7ns zC-b1vT?bW9J755hhtm7i-u+Ri{JsJ=fFD8S`wOUWeTSL*j<7H0IF$QDsP;Dx%HI<2 zz7i_k?cRJUl-@6Z%I||v`gsc~ecwXqwO`!o`(UX0umDPb?NIr>2C9BN2qph>7{LC+ ztv?$LWu6a}pB5USKfy!Z5+3Du4k zLzU}6p3PA4{Rm3#DNy;k3@SZ$K;{2osPw$+?TbcQxPDOeb`Vs1pAQv(D^z(N303}Q z!wPsKRDZC+C`(@)%HLj|6;Sc7gete6K*>7^DxPy;Pk2An{Oe)Z3-%dp>Ffuk{}E9A zYb})C+Mw#|;ZWsqE_Ce+DqrtI>1Dk!mXFP$#+wOH{lsFZbQ}n!*A-BDTLl&V=idDS zsCs%8RQeu)<#401mY)Ss@htV`CMZ203N_F9Ih4GMJ#Y1V6so*mhsxK#y?KLi7JdL! ze=`KmfXkuuez|wQ8!Fz%q4NC-RQ`I6xAYE#vM-0y`wA$1wL#_cG^l!ZnK$1BRWF|O z`~<3f_20w%7encN0+hTdunf+HO5aIPjd2Tkz z>cvQ?b~@LaGf?49hSK--Q2KlVs@y+@inrHf(^uScGE_gf5UL!Ty!li(1@pB~_5DMr zeDs=P^`$>l{&w`{J)qpnq4cx>N}tQ2+WTQp_3U~mJ>B8?gy)-{-#}MS%S<1|Q0DPa z{o~%yl_!+m4uiws#V~-6LAiefXTxo#+PGH@m5%e^X!tlRg*~TPx~9Stis&Dqf~S1p9vrJ9{ zoPzl$Q1_(P!dc`=*>--8Ob``*?M)I+ta3!&2W1XO)~5xV*V zRqnm^v3_A&sPdQwmCkl3yTD!$v{1o#P*UUr{fi;CR(TM|yed=*r=yazXi zdsY;=^~jm92J^3=#)%%4#+~5$m`kAA;WVgns(|X}PJ+_Iop2%i*qf&Zd<-YUt@bzn`$Dyk(>(9= zd>1PG)=Mm&3OF6}=}_(HZ&2;_8>s$m;sMqVEP>-O9|;%3-@yam##N@*6;SE?4LlIO z36-Am1Fe1?1*Oj`pz_sssg=`oD0wG9)r(i5%5{f>irl_&15~+P1Lgi9RK477nT1~h z)ow0?sxR+ArK^0o#eV@*dR~IkM@houtbmH=66o5GXRm52kL}rSZpwtkK2X*!ggTB!NLp>SJxB2>M<0;=Em1C+eiq4fKWci*no{EvXD=X*oduLGgt zZG`H_PJo*4UE+BqRC~J)YP@?M-UoXosUJl;*HsidW*g@1b)=Vy+j2xv>=OiBcXSbJ zjPy6h7sXcM|Hr2m#ftF%K9qhxJk9!%9Z$FCqnS|YUFg{Y74Jz<_4hV71bz(Fj0r`o#gp@sC>N%RZsh!WBtnkFpl}RQ0aIH7Q-IrT00y9rSH9=(%S%4 zFHVF3yZ|cPU9cy74XQtQ3rf!V=UKXkL5(lVq4aYK)I9BSI0OC(sy=RbzV&YblwM1r z-=n?x7AQTv2$kNVi>*HH0jFV} z0W0Bg(Df5g;Y%(t{WU?Q^CGBv`WLAB{u$J`5&yN-=R=|7-vL#wpF-t(=SxlQa;WmW z18RQscPM|GUS{!?Lg}j+N`F_vMetRqc*kAt%MogvKLyf!W0ygd-!)L>dmmK){Q{Ie z23%qJE%RIe1MHVUg+CH*2#;1;cXDpPSmP3sjXL~*d_r|>bRW@EMgd1W01(g2Ifs*%ExF7r{oB}6ZZS~;@D0$aH z>ER7{5c~@EhD)xoe!s@^5~y-|4QkvQd99_t5$=rwZidQl>}D(H=}`S_GgN&$8m{WW zI0_fSKDRP%tVh3mdr|D#Ui9mC(5_M7e)m{9E_$da_BQUZhiPB*r|&#Qe*#B6UKBfo z@cTbe6uScFzdU8-mU-IpdpuM*Uj#MoJPf6m*fZwd7jBPnAXL65!xC5tMuGxPlM{`u7Q$!2b90N zq0;{ksD5+9=PX_0;0VlRQ1#&usQ%?jZ+{=0g84J3@)`fUr7I29-y8+y|1zk2-3NNbR5~w&nx{Mh)gCwgyVcLVpyqEs zgKCe@LA9&?|FCqvHa-o9>bIss^#je`d?Fl+`8IF< z07~E6zGUIXLY4b0sBlTBc6}67KY2A&{7*pT|23$5ulKUmuN`4C=J9X{ycEjcqi`|& z08WSHub8~!pz6i-Q0???D7|g`sy$yVgnME>5UO836Yc`<@_Yl*9AbT5vv@X#(#se) z5YC4IOv6#|G^qK~eNg#%4yqn~2bHg(uUmbe2>W8557j>$=Cay$*HT%LrA z_hYE`yzv_*e;25FwKr5g8=>_5BdGdtHdMI#pu)WZ`@k=t^tRqVE&YR_^jr=%fy+Fb zq1wmc-h3idKF))xKi5Fjvv;B58}O#(X9koW4uncy3I^~LD1F@E`46c0Hhjy{w>6xH zc{o)2I2=l^zlLge&p_3?_20JoGa5?%La6*?U;s~pnn&FP=fDS`^t$CcR-QXU)t}v< z+Fb<<;A$v&XM6MQQ1$f%sQU2*EQ15zwRThsRet9~<@ZJ?{ruURpM`2~@4(@3(0gWH z1T_vF4@bklK*{+Q25|HDEk9$S>RBb61y@6r<6WN5dVb*9>jSIb+e6jk- zNL-2%Re!F9(% zpVQ!c_yAOSZ1b7b`=PJ`^H{hZJQgZ_CqVT_S3v3aeyH)|MX2y^LDjD>q0%+r-!`sI zfvWedo)^JIm>-2x;m)6%UTUHGrB*2aw?ozEH{nRQ^%q64S~v?TJ=Z{`=Rqj=(Xp~@lgmFcqssvcbmW&eAq{5%O2|2uFT9Qn1)m+PS9UIP!5Kd5>$@*5kE z7ekHDr$V*U%c11n0@cqv3RNy|LA8&5-}>EkOHzyaSICqlLJDyaIDg6hZ4h1KvDsPY&P>*4%0Le;+`p(}T& z_^yBo{}5C;e-2fTwl3=7`ky&a>HLxBg>VndcSE)7uiyr7XpbJTDR2~&p3_izx&kVl zcYE_Q@F2_|LFsA!dOch}a{|pvwC@sP;c( z!yc}l)p;HcRi39q$-4on{2qhS?*~xrev{s&-@#DnTmn_!&xfifk3!YwPoe5@?>?sY z0IIz9hw6`xg5~f|sQ$L+Mi#ylZiu-Ws$Q&w8n1o^CGRGv{^TL3`tWZkeQwsbhpTtH zLiHnaq1wUuQ0ch=PJs`=F|hZ>JzP5~g_2(b)hFSZ-k2XZ*VmH5USn{>}Ps904l!Y;ePNoD1G;;vcCaCF-*obi58#5Bm-<`-M>DcMMd0JrAlKJ^)qEx7yaqbtasI`A}E|Z-YwTmfKmqmR1Yqv8zlThh83abA60ZQ&aq1x+KJDMK%f-0}WU;s~tYNt0tmHS6f^<=Z1O#V2i z`dta-ehiepu7r~RG*o%_3ang4L-mtOq0)aAl>fWnLiiq3J}2#L{+B@YKSx2O^Aae1 zJpdE%Rk$H6A87s1To_R0`Gq9R;P2yWv#$9@Ka_VwWCn zU1AbcKQSGu|LB1I;Ym>S>mn$*w?fJL1S(%6i>+QS@jMo)9{difzP<;g*I~Pwzj~;8 zdnS~;KY8=l-hJ1>rsu^__3v0H|F?Pb>u@~gEr(b+%z?^Rv*+2cALhHE()}bi@!nD%P*kHv+r)!zf6FtcLzbG`%I{Q z<9?|2`kLo@yIVUP1eNZ6pxS4f=T%VU`3h9JdJZ!=yF%$p}q4cu|s+}GT)jzNH?x#cbTNgv6=W!^#ehL+?&v27B z5UL%NK=m_?Q2os5Q1YIK($Bx4^fG*e_2+v-_0P>v_33n|^xgs0FFgiT9) zIeMhoPlPIu#nAQBQ00F#RQ*2Fn=ggR-z`w>=pHD&Jq)FXm!RT(A1YtpL+NSjQ6^^; zRJlxn%1@2AKN3nGCqcEp%b?oFQ&93Z8*SxZ45h#6uo~7wmE&Ka;`NjtJs&}74mDkX5 z)*mi}O83D~_49D3`g=K4`1_&ac@#>Y&q0;X8&KsC8*lAs3#jMTouI~zX>b<&2~@a; zpz`w^RD5qk>H8Zf{cg2~wbwCF@++arH|5R8dtL_BZ~h5N-pg<=_%WOd;}cBIVNiNL z&+{gz_VloK{~W6RZnLMA%PgpLwL!I`W1;HfWl-t+y*EDxRe#@y%J1eAExmg{`CkN8 zPW4dvPQg)d4OBX>g?qwx;7qv7UZ(FxsDAVWSO)(D$HVnXto$cJ)t4rydGzT}?euR@ z`s!V3+y$!qCPV3I8C1Rc5mf#!gsKM*!I7|NlJ#q&q4ISQRKAXasz+BqmBXD-?coKe z{Co!$|H#Qc9;p8FM^Ns+gNo;EDE;j;#p+iHRC}z0D!&xm6dnnc-jkv7bDekp3sgE@ zfXde=Q022(ndx^VRQOUT{mg}`->p#N>UnTW_$R1*JquMYzJ{uQn@_cT#i8O~097wi zQ2o;d-u(e6{k#hmPycCF-V>nufw|s%nCHn*dcPDZ-2G7Lejln`Y*cRftc04Eq@dc< zu~6}z2i5-WgBqtEhUyodh4TMTsQU3eRQ|_Lw|vcj($_&y`EG;C=kZYW^HLbV+o9_F z3veU&0aST@1(lznGpzjfgUauTQ0_Oue+k?a zyKCXGxa)U3W~KWw?7rjvH_n#%CH{wCr{DhA-wu2AWPKd_L71iECvpEL=40U**s1^9 zfcw7K75?U8w>jbU+Ydh_+|TBI8R3rRTAyo*ckk)>H2$bYvE}elFS8GBH{katggqN3 z;g8^}xIe(P1K02H&u|)B2=!Y8HKtt5bshH|xIHWfeuofNzdv~Dei803V*UlJ;Cfk> z{--)R-ly+6+@8mLAbu;6tNoS$bARk>;j>V`BHZrf{#Ur~$^EaeyBCJPzj8Al^QqqA zDerbVVcx>-EW%xl-IkFs@;VChA92%fCY(!rI+ZhfDQbG$p&?st?oXS{iD zPhmK24{#Ne*E=wO=KbEteafd}5_V5;y?}g;Df+F(e5ZH61@m28O_=Y({vrIGgIT|w zF_&Wh2>dy`2e%(#-^le_?vKFkudpxF?^^B;!>@h^aIZ1pByVO3HFhd?$6!9)`|n4( zuf@-4*e%2EQtpfK6aIF@eJ9)&Vwb>ueazwS58Pai{Xe{{(7qkJ6k*En%d|OmE)JVQ z{pz?U33Ag(s-_JEgh={Mh}5?78Y^+*tguM!0gWulRX-v5tK1-Ni!szd1FK-@Ue!~4?uHC%d9r)h> z`yaz*AFdR)o49WA=C`H3;qj3xB^N{2#ftLe{Q?`yC!wDrY^8XIjktp?-H7 z+?+tS*CK0Qc)oYPB_jJ!!rg=0aa_-FE#guiuiugQ`&@n_{$>A-PqXePc$vq*cV)rv zKJG7pM-c9}-0zS7C%Iqk{hk81#(gw)%eiW}-wXZ}`*XY>tYUr1XY|J~9Gi;2+3+2% z@3{|uCvty2m&T>uUdC~lZ{w=udJ(%Tx%MWUekWr$#>-zH`#G5R#@v(ppzC&G zx$d#6fWLqbVH_bVWc?1iQo`MX{Uok!v73h5-z>1;SPj(75m*W zKZ1EzcsLAy8aKya9_;OYO!y2JQ?FQn-N9UEaSg!V9>`jOeHr&pbIrwGzZba%Vt+BR zZ-j?pe*|p8{%6?fcbXyg1?JsxPr!fRX9T43?u~TfuSIeda>s{w%;=&q(?$!2MVst_NY-u`5T`yVz+y zqTl`4591om^%CYH-1U1IIfJ?X3-{MJ8~gLIzh8oX{dPds23!O2+h$g=I^1?4{HE9y z;}*v}m;0}{*Sz#kxaqeU{05!_&xVa~GJf=9s?Ynbv}GSpJNz2^L%3eT{!{!7L*^sg zKZn~s++WH)TV$~h@N+!Z`}o-zZsKKf8)GXc_BXB@xWeCqggY9;&7lQsjkqr*JX=Ju zvBa?v+%e)d3b*G8uV0mq=UeU*T<3A^jomx&SKiMS$oMmMCD;u|&Khrj9K4?EP27I% z?eOA$PkP>s{eAv^Pk3I$-$dl<#}rw|HnP9@nCIX&7Q5dddn>M9-t}zU9`t@MjfBYt z=4Jq4560h9T>33{e_11deF$?S^4^52F)xV77>fVN*ww;z{9MMR-x#htx!)bREAamf z_g7%|0(_9`YOWu1oxr8vHt=|4EaN%_^Bkz(`SPrd#5umQRE;`SoBW*Y9rZ_v5PI{vpB*gxiv~oxS_>*!_(ASGbbg_rq@!_y6R6FZ^zY-#IY+ zeU01oxP`xGFza^$EW!S9t{L8rZB+N$1{uxVS8?sZMHI1{xR!E#=>4+v;GVJm;X>da zev8K~yt}O5;Od24HP>|P50D`L+Z?&KbLqDc@kM{n;qPlMwxwg$gj<2*_gsf@f4i4) z5pHbvyWd9qJ;>YdiL8AvkHqZ~>=tvcXSw~o-#>A`kSqLEV}Ay6clPde+<(qBz{``r zd6;KlZsXd~+mFR=7IAGBN&6ePjrVdCZe#8jVOPcd?1;a;vEK;$LGXOszCc!rYcuXY z!v1;~{k@96KX5hUrswV6$adg}*bonTd>9xPQm}IPSN{ z{TG;D;cCOY3eMx2&2<5O9>(r5?uT$qCeB?k|AYH6T-$OV{Y}GeN94WDH4?vDnD=81&4(A(EX!nNYA z-|w;83_mT9rN`J^_&t#8b=+R}{%3H%lKbuOw;}f*dU+SXtGu6)a0|=_;2!>d&CMp{ z^QYbqTjTDT{8i)};XUmKhj3-Q%w2H%1?HnMUkB%NeafZZPrM)9AHw~i`28pM>k-Gc z+@I*(HzvM5n0LVKkKAv=HHvE**TxFW?=k#xbRo7JyAu3vh>WrDOWXqNevRAaa1C}x z!f(0G<$esDhTq5V_g5d^Rh~b=?GF6t_h;^V`uqMc>F?!s5Z8%Z_hWYq{(2xU{C$Ak z6WHl@E^>SMdznXZZHRjVeALHzrkDF9{=V~ezw~Uy?Pjj;y^Pnf|2Oxy`Y_jUUx}=8 z%rE1%4_pc#hb{2$xSt?$ZHd40;3sew82+y2<_m9L=;g}oOMkx#83FhE!ExlX-uvB& z`$3U>hw@J1=47rL@c%dXJE-5~gxeh6>dlwHbGdfsIu!di<;nl%_&EMay#My;=;!UW z@w|<2BZ&WS+?9-9Lyn%fv-c7+koz;a9>d>Et_eP^<+x4uGLGVYV{bnRKWVO>Tvu~# z=KV<4MVK3rKc8zX=Cg5onET&yeaZdPP``5Se-0brZtxAl{f+A$+*iZ9vDa^ZL+m7P zmhnfpKY{rIFYC|PZH0Ll_WCXMey8BRCD%%>yS&>Axb-t{vF)%MN}g`PZWR0tJQlm} zxX$8w1b?5v8?hhe<5JKwFmH@`Yuq;BUf=V*6;AbXg?(}R4Oed;ZXWLX4dvPc`y=7k z*nPwG0p`zPnyZZK3*3ftP2dWD!-?ZT3_r)OeyyG>xqqDNuf%gIVRzzQPN#AIA$D70 zsPcZXj{TnN6YPf|FZ^}*H10!~eYqCk@E&2V;eMI-bSLIVui~03f4CpTbp=-g=A+?Z_*)Fa-&WjQ>SfAqJKX!g3aH=TB5r^3_lrnt zpNI_k`_h|_C)|7Zdj`9YxDN7ip2q#Bn5STV$=khx`2;Tgrf_YF{e^`6Dc3t(TN6)Q zj{IK3Tn|6P&%?<2CFTw55bRqyBlH`dJ0Q$f6bd~xc@u%{k;FbW4@g0&&d5f)Ndkganks<8Dk&& zyqpY6u^WiLlkhXz>%@Db^QlSICR-Bq$sm(#ZEa|-&jg8dGH9r8PNkEz!~4Yg^r`4* zs!la#g1U67DJafN?9+v1RdHsiIV^6jP1ZFuCu@UDSK+#K&PoW}uWC{9khWw-DGFNB zsrq!HDQIYJO{QDYN&ZeGAxmR@wTz9L!E z+K_4vT2nzqvR;0IrbJ5%xp7`AS0sb-hBTg1>5iZ>QQe5jGeNScrL{vk54!M>4LG9# z-%56O0Si221J@hSjBGD%Y!7Nu&8>-s=1frBSQ}J#w3=duOMKPtyDvpj zNpWV9>QY&{W<|p)6hO^sSKMWpOtPuEu_LH$Yid!6gmJh8OiMHmZVl>_tu6{_U+K&G zQTn7p^VZf}lWL;MP(MN;Sr4f;Qr4Vm4XCcQL0dDLsU;D0sjOGYjrA#S$RxrP5X+{oWgDGXmOR#DOXiTZ3_>xlI@)eK)O?|XEkJ6txYO|<-_Zn z+lH@5WL69gs@rN-QZ$Wt2pU~842HC(S`&>b$Ku8|?;$g^vzY%V=$wY?bb_|yA_^7g z>Sm*tt-%;G$QTHOHpBiyaE|Hfm%(wSrO)odM-O< zWWk)uVCMWv*8?s{H#8|_&Ww}qyk_~{1mBA~x1Ly^3g3bxuCbw}b#S!B<|!_eXgN@J^KD#zQ9-Si{DKx6Ru~&Y zf>u{43$jS1h%|~kpQ>GGvp(r!wfb%{s7=vom*-KPXK}8|%W7~M3&71tJa^uvOT zh5%(FSMaeuxggTEZ|=DcFhc{(uRD1G!m-N_CTsV+&QdeJvec(jZ7n~L0`K<+eEIJ0 z2Rys}C98xm6@>~|Y+Y&S9P6{MZ+C8H(2zH56x4;hst^WiP9|$}#knpa!l_4?gn}@6 zjmi~zknppJk?pbEc<=AjDONNb8nvIBY$~t`f*FkoW=}y`Ba^2-St%{4Or}BOdr4D* zajrQzX(IKnscM;<&8$wPS1uhEG>n-rept{{!w z3dWQpE0oF|pBq$_G^HEjnVNJ%ODp4Pm{_GEYa)@!Xu5-7dUI>OrB5~!o0UN@Tf<*L z7V^DIS|=G6EE-Y17AiHy(vo@uSENi;Ub88xWYDlyGKnLdQZjCy15D?10KiMaBvOVlJ8v)tH4Kdh7o zK|G#puW4+nO~%7|TcTlYQc#}KR43Wql453RcF{1hjw>x;FiOV!VwsJa)C{NLABgz4;qhmbku4TvK&YL zR<@;^1Ewx5iFAfJwezH*$^sV0M@?V~=__>SI^rvAR9>g57TAz7I1}ufXl$b%X3aMD zSK$8*$-(Zb8Oi2a%StwisY&vuNT;vWNj_YGYWB*k#Yriy?H$8bb87daC*Y@NC+BQc zlzFUswlFXJRRyi3N`wxsiu&U6Gah{9*Y8AQ0}~7%*cq4*Y5J3DYYnE9G*1d6%mgJ& zfs>QuH~cNm(BGM@MrJ>KPNsdB>O>|PSHwYyZgn>)Si}U0rqR5TT2P;CPNsRd;>iJb zH!Jf&si8p$e=LlTPvuDFT1c6ydY=ErMx`T6jRkQ2nL$_(X@*9k(6rH1Kn8VBE43CH zkK>~?m1>NeByXa5T5ECI9O!KahUrZ6NRy7&xiO){VNx(3t8_zcGTY85M(30t$VcNO z6vR?rQr!778vXp%A4;%VR}HbE>(c$vr2=<5s?Ly!kMGV9t%up*=li zO-DV?g*gQW)6z+4Xf9pUYU#=Q?Xpu1f&&sQ*~0FsQ;o+7*p-H&J?d~WSkuZAvhU|} zQ8s8kKQ@v&8!^J>6FB!>#)c2H1p&wXP{47W0@fxQS$>Ix3xa);$(De1kQUeMGGUwX zTF!5;*6^%-6}D6#0A)lH}E!oellTjk2Js{q!v^M=}Z{E)VWWb3dXen>P2`!NR# zoJ(Ve*AUMET42ad*_?Mx(tLdwGdj?di7c8_5yp)60cqgXsZ5e6R^_5#9xKb77xxgF zbLWnSMwW=^LsqA$F-Xbw`0=v;v}5)qFpY3p{7AIYlw70mG5Q)@ov2y4I+3pBxlf+l z92Jk6YUFFJ96_YadZk>W3TzFk+io;(zT?w015wt+7xat^7$SnOo21ifdF7pLElGTLvZ>@*PBHfM42JBcErG_}hANe^8iiGTW2)NQ z$!bbT-n1Q?@aHD~wh`esn#`+7?`JI={JD2AzXiwofj#8mn^9QLIFy5GFob~h4sC1BkHF3>z%drBQCvIBRXO$I z7S6@)17Yu>L+8;aorGtO*|(53O9!-{P%VPsIVB9TtiP_HH9KW)Xt+O@93bUQsq2EmA$ z3uf545U$g7uFbZIOO`d>Gds*`$|eipGeC7+tp-Z}v|N_Sv}G3?TupKVvBnZ@k(PwM zm6rMF%y+3>3JXU#*1znL$mBJ5DQqgjsvDXaIO7Rzn6@%kZDaAVL?#kf!Sjl4wa*q2 zH;jsuRHb&y8=1gFD0P~PcbP0-!V*}WqC_ohf?h9_Yk8%lquC`G&k5O`ro4LM4AWB0 z)K8vrvVJ0E#~L_0?|!XZ$jQR61_tqrue z)GNNRxxI_3gdB*bRt?0Z_4^{i5w8{IT5 z4y9;wbeYSuJh`VDbwtvh8x57VMaWAhn^LP-0`^-wd8u3E+_ECWr8OPM$j_vnP?%0M zv}k=cPhV#6f^ts`fyyKg0+d4G8b)6W$i0-ABpS<*SGISdO zn*oh_w9F=bU8DsC`6D`CUstlgVzn$U3EFXO36eCa4mv_=6oZwk4OUY51?i-@xo%Bs znA1FI1vN~Y=u8dhFA%B(WY?ZZ);^@nC8}%1Gv9QYclFSR%Tuclt=b>ix(Jh#7uxlR z7R?amXwDBy2%2d!QDRKf0(%(J(d{Rweovn>Bk=BFeR3_?1$H&atto_}y2#6nRGQtI zdPl#;rucZF+K#&NWyf9@p;Z@S|gDGk2Ce9=vFFrF=vsrbLIL9ZQb=%x-kH+2> z#vwOkNs1e|lZlnd=1u~fzSb>OtC0}qQTGK(cam~>RDvwgVYTs3);Ya-f$`O3a&z1w34H0MY0j_0RN0``vx zuqu+DnovMH`Yc)!5B%?M}&^n=# zkV}Bqcia-*X+I~ez+_0by31Jr^|rUxP&M{RMW5^{RD(TIU+Du06txfO$jQc z=Fb1c*j46A!G9bx8UOFcybgJ$EUH*?TIy>a%jwOG#3~7A?Q39YefYX4em`VrE}U?W z*2{`TT`y*WJN`8z9V-&bP|o@eLU9ifRues^!oLEvY)HvQq0mQ zD;OH?qpDPX7BTIXTR4U~jXHIA(j=$9vtqP0;JB zyZ`GCi;%VK!;q7oVaJmrP*@iZpUQ-0mRc~?CXt;nrH9B3#uWrkrE7Cf9THZj$y~*l z!ldL0b4Ovj6eaakj0sh2Pgph&>7<)^1^S?h*@>9WnRE|o;nR?xo`v$(MSq14RN)Md zyyi^`EdlEyF;FebFN(-aKTKOzi98B)9am>DZcde(80U$K+xmX44t1|HYgJv#iTi0? z&NZ95u5)F=3KUQEo|z37mT`AQXmjCC5}bmVdatW;IC&9ng0N@HDjV|;mSSDkpbbvd zbX%*T$MSB2S(*t?Z0PvB-$V)P=<0NXJ1NU9M0>%WPB53p7bnwqhRzEQGhvueh8D)$ zl1Y~`R$98EG9)0Wu|um<$=Xm(ix#T7`4y(cJ@Jv2+GLZKCiH4bRu0?K-Ad|Cj)lpl z#5QxnV$E*nC~U~led>1uF@f4O8!97IXB(z=@9$c z*1shwx5~?!tl!9{y=YL?secL(}co>({Ley2krmMOQvY%e{e}L zUbq08uYa23S{7gn*ANTChJpWA))4 zT?K1lE!R(D+!C>$0LPG$;3!|*ZMd;F6TZZQtZ<0%PJuZUZlBaCv}QEXppnq(iLy)W z%rsoj#CWBdu$u^(SdCdN64k<)V79`d(!zw~jXOcc9qHx0#E6t^Ol}C2xGMi38DE;s zStzcnl!cG=-m}ECJN0mGC@aA9+?^O@EE1f92X5ImJpW{YBign1E;$zw)l#xOS<_~( zfrU@PN=tcxuy7qXOiLI^zA&XIDy2eFGO0E#{YQVZbv&b~p*`?!Zkq012dvG#AF5rFA>e zUfTqFl~NE+mm^uprQio9)(sNS#T2=#nX#VkT<_^mGDPRbRFGK`)x|lRytG6&Ib#H> zRv>#&E}c4~d|uhy>5*)NFAu0_%~O!yYx3CXL#c{3Nmw+6rE|-s&6+*WM0O!8>Q{S% z-n(QSELpyrDJ@8r-x8|zr*I>Aa_a|Sud7fJHCLkWobAry{@h&Y`~{VEy3{?c%Vb|5 zP=2EUBxSnJlkjd*L!!B~x}os3EdSgg2lM0FG;5LWFiB1porDuMCnv12p|zFsRgs?; z<{j2Sp2GTJ(>;S*N19#5nB8nIr@8JGTQ{fAKCHU|Z;0!d;}zO5j?b3D*!|HPcBSRB z7e$iBtsa?W$pT-7SKv56)2N47t=#yYUJ~7Yaiaw3a9G?PCG&frFj?;OSm;5OT;cU( z;u?JJxnqW;$t|98-%aRRn#)e;A=G~OI)9|9D5KLP(XE@*Hzun}D=L@FneI*rx*V6Y zD9Xwbt17tGj^O!NM`oD$L>4yul4-t%3QU#MCMVh*+3^#NBqMnZr+nEPU!G`dO${Cv zEa%+I;9;cehknZ&+iDtW6@vF-g%vIOo2;$(QsS$|=SN5+2PnT3^{$Z&hD z8SPnlFJYJ) zvQnJ-G54q_+i+gHtdas*wvH7_%Vsk?;Ha&4cgQ+SPNFfzwwHUeEvurAY|7kTScW&# z;>-?ciJ9=kM!E0uR`98boCvFr%w2Q+Oiq^HQe%U!bpDJP71Jwy3AlFbZD`7xPZ3-V zMK#NAY~_wRG={3eiOutQjED>tuX&N&bDv&xGpSwx2J*L zx5K_(k**;z-A)fAW^Gf1wJn|5OH5s!eqGzrodpZ09nn55R*=v*Q)A8*ba75x#ZWeN zwocM&tuH(FdyK!8GT>XDV=V z2gY4&KBT!)YP4mYrCzHyUL;U;WP>6|G_fn%+5a>SOhi996ivOqw-;xe||~tLhHp;_qJ)+ z$rZ{Z_0!uqm8O$}Dfg`<@;_1U8q8o6bqBO__Zi)4(>i3Kv>@;2iq#aGJ{-B@GgX;KH-ooli6+TV!vPh?By6|IO=Gs>*x^T}W+Px+)H&NeEBX6-lZ_73` zwKeg!ezubgvUxJOe4Z!S)aGlkpH*a4t(uDmE!OA@W!VD-uCMXEC=bFD$8a%jb%@` z`^}JW=_OZqzG{#tg^LV1evu~6ClSoA7(q9iv-PQn!dg-GYX{zGcK*Ie_%e-mt>|bP zo>QnZDM!l0|A?TxPce9jZl!OyTR!1iEV-|KS?03+d^f)FRp6x?rF8PeYc=|kl!ly@ zbR2C#`1X-~KTchV>MYqSSXPz-Trjoe@!hRAlGdN(HTBZ%FF@bf--&)0e9IBe1#9mErUHl?YV zj?QZ;7MV$*+R8+Bk)ojU2=adFH%7Q#QDs!%wXicGc|-vS39=MpkPRu$EvE zNvcO^lmRgOUet`n`rPN0x=UR|c$gN1hQdNwokSI?J(3XJTE`r|=9Zm7*;9c|`>|NT z)H9Zy_vp(NL87f)ZI^S0RKwf=A>H^{q`Wb{yXof-_|zK_>mt$lTf3~aXV%(zH`81x zBmB|LnqJnyZ?-G%-mk@572ki%=y2sF?mwoQ3C54*^(&5hyTy6evpbK=#*cM=&!j&m82_CF*N5@TqxX<$(hS}$Q?7EIPu0AfFTAxe6Vl|!JrY&b z=mBM^%3P1ID)6d#>806MPP2wkmBxZP?H1Tvlg@dwR+uL+=cv0v8QJzpNV&UCil>1J zrug;wpZi+JRE7PFq`BWZNM6uMS8f}JZ)dD<8shwvUbW*jKz--UeZZ=!A}>s>?TA;m z@iqg;I{iX|Z6m}`Z)KkECSJ49;ZKC+mD#>|zWgeOTRT{lf6_%F6M3HX5?~#D5_=#) zqE7D{S2gjeRbFLK5xZ|lRaJKzqB_Y6Su#IJFeF1rt#(&6EOjGDRZX4%pJ$zc*0E-- zMf=Z-FwJoT8*7ICU2<0?>hgj!Og8hSSywMPk4*QW^qan&_f($u@Qpz}&(gqGws-<_ zuMRq&nLM8sCG9NKEj6DbcfpXFy5a0%@e**gWv4AKn2y8oJi)>es|HGnzB!^px+sQ& z$Y|6p9@ey_-K*8Ut!4N6TtZgmNhJG}Tlj&Pyq93&bggckEiAL_@s&s$wu88e+~zcH z#$q!X#nx1n$dzcE^-UghLUDe!6A_m8#fdoc24=}w?~%tYN?b3YS}$@)Riw<~`jk%1 zN#Adp0}K}JjIHqEhl2BFZyaG;NDxZ zrrgCRrJH!^M*9Hu)Q)C7Yw#uJRC5E1M?pQGHnNxLvGs2QCv3(?J8}w(?4FE}@?1-| zBjuXfXG3uoKDWnhK@-8eWGk;v@Hmo6)VeRt&P~;}vEQt4E!uHS`1hY(x$tRCd*7HZ z-_YPQbZ$+mcns0LVK8mh9tq)D6Js}T_PiPMd6n0lppWZK-Xx!db&Ee7zD>K^0?!o3 zGG!xQgexs)PsKMePKtas>k|}i8WD+8UjgESGV2s2TCYu|m+91RT>XxQ^HxixRUzHG zWOlLPn5bqi#C6iq)}vP`r5*Y?C9%7}uIczXI*v<}ZcZfnIqo~Y8eZ3la;J)1hMCfY}~1Gi|W0mOZS zMm;>ulJzA`MEy(SY!_H(ri{&WpDc0xr4hfRGq^I- z^>3E5%5=Tz(pys#-3jQ%AkH~ePQRwzX;pS;_|n{L ziO?R8s--{F9?rmI5J;<7w^#Bay>k(Le=@5Cr0qzU))AkG;85%iMc9_ zzW)@8s!j5r5csT1*I~S?0_js@1qbN})J@qb0Hqf_yM$-`@=_K#`9ui)ToCskJ+q;lE_gKIp=(%jg%Tngmh4!EXa1uS!iOy{p|b+qhZ`AK;@RB{ zB_$N$hMe#tE?FOnO5?2FS5T5TM925Y(560t=SL~hqhTy6%#Dq%q;1kygqe zODZaT492Dm|BJEtIf>$1UDY_JA<>dS;i;9srhn4cW&#=-(&cjmT>E;(!oI>rn z9o^APne=t-ure}8+O~Qk;LGvU0!>2P%!^sJ{SzIlWK16tLB*1aMVy_8PN@-KFDkH; zW<^e2%ATa~-)IXbgDmp%^*m-&T1WS@rb-Gq+^BbBQ_THSn>;IYTDB%W)n%9=$JPAO z!!jM2Rclz2Sjn?*$Ked)_KgF7NXMN<4Tks`qGm|?cpH*ZYvQ$QsFajbI#JuuUV7Ms zHKRtZ88sde{uio{IX3d$%qYbfSI%`&h_a673iba>@_I3o7m8Df z*c{B}r$eUt#4|Z;>`>xzKle@6CR%r=Usjs?Zz+=GPH^ltZT{TdR0jEHv$Dq=3*H!# zx@-a;nG*ZSdtO4iKLN6+yE7JOWks0mF3)B<$80{d3mfUrq}1$3al1TbS`gg5NT`4O zlzWFu$89=QEaa~BJ*rS4Hs9`2EuBBr6@Bd~6yR%M*AgmSZ>Zf5H+Rat5U*T0mHJoT zG^v?4XRe=@6lzG*D7q3pf?mq^w8ij+Cd8Q!!&tN>J?&=raRJ8LJ&*Al5txDjc&X@NBbXrNB zwmtz7@8a$FFt4^$lZ``PLa;CK<@(OCHnq@H)%TdGVYS2Bv;Ac*Z;Vjc;X?Vdp;F5v z)tn~@CJYNkja1(`YP?d_?F*6x(@cvrr66iO{@iwnKZ0%bzQTW-Ua@xF@HA;gD|`vA zxt_seSjDjFVU5G44x4j$IC5n3?oVDZj(Mkcl6NI{Vx-g27B<`Jr0Xha67?n z4alkQ&VM<pOew6e zysg&CwS4EMSK-t|5?oc+5jdSnD=oo~-Kwc59sayT)?OQWY}#f&Pwm~q1m#}x4N9!> z<;I$@-T5)koSkB<>4bW7A-v7Zq-C<&06|vlUJsN~f${;KC}`ZG~Grqtd!6`}%Y{3nTo)$h>mRO{AI< z?QU+!NRnEOK7GybpB_;L+;cLobY=VMNc}3~G`t?@YILlTxwa04Q@qxx>oHHuk#??4 zqEcjM1^cC}elDZ*B7$uApS5Uu#bW;3oLhyqJ$LQcx+xn6hWU?_Z5c*$`yV5IS6*`U zEmB$QdkV|YQ#7x6RoGP-6_CE=plY10iW1`<>T5a|wbCgu-4=J++GqB`vAwpszM#6e zyzb}zK^r>p`*RXF9KXRdMjLzY!&l!t)f5`so*e&ilkfXeQ+2v%b~*i@TGonW1Fv?t zXBrAc9fnpwD~YG@*~Gp3>7J{ii!5Ph>>TQu?zt_&$a68@@9JW*U@bg4Nr-f#;Z%V& z1wKFO(k5-&lTl&bDm3|^*UUaKRcG{tjBZ~4@UMMPb@`sos$_VQ-F8sXDJr4J)80|( z%YV?wk6mi|;g>)7myh@h7xCBj4v4)Z68ulS0z$RTzWSkr`wzm~J1>?K|Efm#nhc+B z>`F1xr@c?=|KVR&4cX%N4!+>gWVRLZuXFV*nX3|(6xU>vwN_tb6^e2d$h$^D(cO3T z8{#+Q+(WOuU~CW0Gv+UvTUMzci|II20>1O6HEZj}+=p|J$UKJc>rj2x{+`ZqJ&_OA z{BAirW)1Cwk)ev<3s}$K%Oylgt5@aM0F-XdWi&sh=9;IVc-OC1DIeC%)DcCV7u1m1 zg;Rg3-oUjgmM2I+w?7_qn4{Y{S9NbTEzdT!W~CeFBwv=|^7r`El=W^R2k7Y!^ZJ;*jD|iRJ1{e1Ypma7a|!+Z&dm!p84PL=pIx zP_-<{x4*(1gx?f%!kI0&hX-fChl08Hom;feA9rgGE*8IdaR*`+4;*0DXXEGjFXy}yN31vR7c>eQi{YT<3K zJM2xf&o{aEQo}ixio;K^!cA>!vBV#FAGJ*t!tDf8m9yPQn0nWVWL-nOE9v|5T*4W% zFuR`7Ze+@g*>k2BxMS@6tRjCBxk5?l^m1;Pl&&6A_Em^*$vhiXUWjfVQ@R(G}%D8xqoT5bN^{t6Sj&; zJp44RNun?vibyfr_qrpV1^&Mr+iXJJbIxbr=YC47E!4Sr9PcpO1B3FWU)YRu&k62v zDkn%yDnY`SNTXuOTsxH4tq^;Bh>Eeq= z>il0?5VP;P{dWiL@Psq;(vtAbloJ*s>Cw3eH^J9TUMg)QTzG~)I;&R>G$jw+OcCM3 zX-Ly%&p&n)sG^Q$u{cYrQDD_iSkO}4K|o#1=X zTH^4dFh`)(aLBN;rxLSEMV}>oH?d}~=BeP08{o0bkC&Q8WdDPM zs&-+nqk_U79JO}yuU4|1edl1|KolveuB%ixI#^rowT5M#W>R{(YtXo0%Lqj>&0SZ7#bCtpAAN*SI6! z-*S2L*4n^l?SdntcIr?qAp4k;J-Mf%(&K1#BI7@F5Nf=Fg$@1zW_IBxe7tn)>Djb| zzU{x4hSv6kD%o0o3!m4j*fQnwyma#A`amR~GRWpB7oh8U6SmK;rYD8-14~jaL>Kdf zZuX-73pM8dT5_wx|KH2e!m`R`ZWDT$N^NP(?e5OeV8?X3*qzIEhY)#gw4%4y-P9v; zn1!xThhih!z2W&cHwUj{a_wL9;?*HqmUngcxwkxh_dPMdhx>YOVK6_xP`7J)*2#1% zXyqR~bAqvvPfxk(#G?U5y;G-c+)Rz06}&~C*dS{UWGGe~A2W`YQ9NoCXRM0{jUqsw z7;isKWM#R|y#zx`(zK-}>6UN9dT4&ynpwqU`I0s?T>ng)?Dvl87$ukfbP}w6>Eaq* z8PWd%p}%o!vGU04d0e`4A5i4~ljv1bZLX)?e|f2u6Q`gRmHUi|U)1AYY2lz(19ckF z4lJS>j)J)O=?ArgmC#d11MfyYzAeVbZV|ka8txNcNF;QPqLAh>$gJ#4DX46=xdvkV$<77qbRRvtQu+Uvia}wpG ze`=fUwk_AWijwt}(YV7K`q}ibnp%ZnBT=twP<_E9%$*HWt{A%s{=*SCAE7}1 zijS&rfxv>wP~cjasBq)8OL>`OawYq*yn8`Ab4Sdj?Qlhb2IvmFsF1vxtp4SqbOH!V zSEmpWyVr3B~P-BlJJ6lB? zn)CX-JVl`f_caWHndH#3@42iqaZ!XWZl%ZBL^@kHKV`YxO<_Yv*9`L%N(g6}-!EFs zanq(tBT-BU$C!lW+da^>t?_G7n!Z*{P~Ym`Su>#o3gDhw_)M` zkoPXVaa~EiZ%#{}VmG=4Q)Q8Us2*;$q%KOLZI&gHASv2qL13lG6h-lotV||NvZ{b{ zW<5BCo*&$E(E_>$9@MCNWI#2c{YB0vxxarztjEqwQgT0V5AG$ZEOPI)Vy{Q6ct@-h z-RJla?UdEoAMLzMu62by*sE;Hn)>xvd~0c&q*KkF40>EiCoz*h^2@wMx%9E4L@N8{ zG`zfQk@oV~32#vRm>wTIKp24w8f}_9a$e#gNj(IsqVhrfjlYNR((YUxtm>c`*F{tG z52$JcTNGpPEvp-QE07wk`Iw?B+R~}-ZE}&DZv`lniygzt#VI^yA!Zm3T=AhkBTzc0 z!yg@5aG$i(6k+MZFmVC?^bNmQ{#I(A#hHcWPi=_G&?^ip|1~6VgdO#qJ>}5AeN57@ z5#xFFN+*u034L>Qb+r?%=r`e4d?#yc#U1Zga3Zw1Sq(Bnvtu8lONQ^dU{Cw0!gxMe9fg zu>Vv9ifbk84n||h*X%7B3~a@SAfMc;{peaJ-z{3=XpV01v@WjGekGwiacZm`Xnb4y zwhwG$x}dbEb-+sh&Ezks&>eq^K9sl4I8r8AJCW?CK^}kFnKQcJ zbu)sxLIW&8TKfu7PXb83x5jJxfT7*y!INMscwRq7(342E-&4XFXrF5iPP}SW5bWFr z)hW|rK~okuag9eAtN9M8H{GIpPJK&|6teuC1($EM9{2cjc`fDlY>_dC+>JGEFc@*I znmg*pDpB0xBAU(}C_*d>jneFS9;*{amf7hUO=_?k9!4}Rl z3<%e$3fr5HJ@HkYB3|koU-oviO}bqq1b5~~r?|Sf;xs?G|KK4pIekvG)IOs-nI&}a zjRYRq(aVMYMMv%Ct0PpsTFm#Pi7D7(-wfX?XQMuN6@c#QAP{(1{{gE6@w?J=C zdzI61V>G>iwX)Df_plj+%bJBLIbx2S2ykGs+N;5Y@EA&`(e9yrgaEA`3C_eKg4pV7 zr#nVaUh0i~-#ST=MWH*P;>HL!-9hj8WuKWXuP!t*4-_gX0(zqZb!abFT5Xoyk0E?y zbeQoV?|aswbSe3RC)%_RU@hr){bGvMc2#muJjq0{l!~E^_GXO6?!t>q`6OZaOXGfz z7Vodlul~jkgUYi;N0a{MKx&(ihEcy@N2fm5xtlKCV;t+Xh_JZiHBXqD{U0SnrjRo2j;3v>J_%ynpy&cV{&4_)k6VJV=*= zx-u6Fa~nHI{U$L0cA)iKqEO)v(aWstFov-#1Wt-EjHw9s#)H@^x4rLj#nveET%vmktmpwNL zV3a+>0D906KMm$YaFLS->mkKmT6VHmq8wB0fj}xFV1PwlmSrblhd&U73?f+JhMMZl z@OV_CQj`{`6%U<4A@0M)g|V|^XVHkVC#CHAKKfBHq5YeeyAbuvru}-kPSlEWgEQ7p zpJIBN953;7b#Y^1H8)Ld{b_2No_@Kh@RLnZsZTWQ`XHOXPog4-HNy*}7cCW<`HkkU zh`wcl(H-V^lqjl1VfZRzkwx#}Zv*qNx~14X00LLy9{ig7*lbA#^~UJs$VEa&>31tk~S0Andov?GePR}&@D7T ziS)oRnag;OS+97KdWy=aJ-#j>O!3#592t~l+WSO|L|LYEhie-?`fInhb12Nuo$QT? zVd(oR`2bfSIHtwd!;Wr4uA6tCTAe(oC`x6UBr;hO zbnEI#*!sTanZ?FX1z1g(nVcjLo4wxIH%R#$$Kml@M~SYVW3r^C)wRyT>gw|9ZAvKS zJg7oPwwrrMifmflX!Ja7P^LGf-B$|_nwf>{@3D2h(OGa&bS*;t+0})rGG@n&s@S>n z6c)Z(SzcX_8cwF1?4xcn%Y{>U*^PXd1v4H_v%_^FAdD51DHFUJY~4h+CdLOEw}s%s zAz@s+N6>?Dguzsl+;Gc`nTFfub0cq2bTbQ%gp19i#=5gcTrMGysnn?^&D=HgsEB<~ zBfe(!0A$s7ulHaJNHlWs(lRlk6;E2tu5~`m7H7#|indjyIkG!Q27nm*e$>s(;=!j9 zlIslN`@%?DK$)$B-a$QCsOO`tz1}gD_o_zrNwv|mV13L?>m#}nMz$d{M|5_Teao3N z>I;I3@-BOlXRLFUgs7D1Chug{skMdlsViE$QQNE?m$&A4&;l{~aGR_FQ$*~Lu)z^7)B;s8 zqg?BJw!Gd+^&W~sA{0%Jbsk(5DSUSEVbKyH$y5UD@CcZ835b3lj-F>9W@m9>VL@|K zq+p|x3+N}`SUF*P6C07Je|~=*+oLt88J;V?EUuIr<0?~|RT|LcjpQUVhSi3})-8!% z=bttBtN)=3ZreY)Y`6VmXa@!02=DJ4b{5|WTmduQy`a1a=8Le4QxTkW5O^w~tTKbS zO~Efil@tZd39@Y%3B_GJOeDl)v~;|5ScS8kokbCN6@xOV?RFGFW^0^W`EmSM#O~IV z)=$EQmAFedAh##Lx=C8r_Xu8hQ)adrV4TZ^P^?gbI8JhGYLsrmc8RHZZ}$4ud*!KF zq+Qzd0?zO9-37t}3b{C*zsy?@!v*qx3yZbHImlmW5DuU|DY?$PP- z$Kz&(v#_II*HpsAO7tosVUY}Wq%EF5YGzE!hOhPp{QX%oW7;;qQgAEG59+ckz!c-5 z&a9La8AdcwU5G;r!S;=&-^^6j8TubJGm{n+kRntwEtsj){BqiPBnE&M$^|w$=dxy| z$a`~E(rx#-#W@XB)$Mlk^!o5wc{Vzn@|64MIbNx0%9E4ypf3g4%i4cf$QmJoz#R@d?Bt948#@687`Z}nm+2bdUQ#@UYSnqtNl97;q`C6ZYQ5?rK9W`*EAf(z zJkcEj%(GQ!iYQ8sCNUuU`|6v*zB*F5+Z(*J%FuvSbq)O&yY zJAuqi zKL7H;{7N(PaBX>3jM0n-!=w}YOFNTVokw4;tf`_Ehx3~w&e@Cprf^mkc}(F3Qcc$9 z*PpN=YGc_&6OC3@9&Bzrh9(>xZNViJF0=)r)GKC9)}qMk)wvJ`QsJ?mn0+|3aTzfY8BR1KImod?p=Gg1?`L!?B)>ofAVAqek!@aTB zc~@eOZS}rfT)OpfUO*hw#9>c^zWE3<(gTwTWxC-=6`g9S#k&)4-cS{_^auaitpVxp zbqN6Jr*QjtVxk$LWflg8dU5p!-U0AbfF{XuHupLD`ht!rzx9squRS!%ZhCm$o(@ud zMeZcfL7+7{#bBcS%4joA6#rgtOkwoE`zBw?$@%XP*miURM{xzqcLg>vbx#$d@f(_8glg|qFPD%#3dxC-wYJN;4w2UEg>u^fL#6waH7~R2uDs51E zs*(qTv~DWL3$1r^inBU{2dZLhK&VY>>iZVtw3X1O`Q%sfAV{S&0Yt zv~$huuX$&2pPIP`i#ZOB{i%C*OpXCBYQbG!5&>xSts9$(EABmXRdf7HunbSD9*>Es zkN)@H2!Dj{La(?Juv8)+-HmWqtG0 zMHrs0k9!~QBY%Iku%0CoakiTK_-hwi#$O@#q4fw)+~(32^sWwv3u!CG!lkQQ7&57SejO=@XJEn3I(@#dg;p@BMj(Y*EC zXyfVvO3|vMX$;|LskTWsI#va$@Pdjbj;jD;EvIlT(V@}*qZtD)UUNe7m)LFwWsZ|62jj5P# zui8JJYY`IK&_n6B;>P{dSnCBTCfh&{Wx$ z(1f}yI+lQHi5Uo;7&ZirtfJJ$%xIQG zSBkQ*K71FQUnRb@tS{uiP0H%uHD~=1(yWTDV>L_SA;(iWu3o!J_7fQrt{sCsDASGG ze)pS|5n&ix&7)nc9-QeUYu%C=VFsxf&~Pb}iu|5p8TtpQ-Q2a-$g~PrjJVb1xQ7sU z*q3=4`SAEmbHMkAUO=g)%~dIJLKEytNfYqjvz%s{nR8=LLIp!YP# zLj9q3-x#b;jJX!<=o7co8k+^C=M68WPm@h**y{Mf5d_2&#isB!PB)sN<5xDK8hL3Q z!LlyKXzRcOXm5FIzI6FY&8cLJe(YuCN}l$*2<5uw=m6TTP{$C@3n)7Z(1}_$X3a!h zCL5(4(9xQB|1QfILBz3&E&~Z2G_cn9EY^6UnQ)?DPV-xZLzYpdSZtq467VPA2O-rr z>q(^U)$7)dr1viNFzB=zVrLTO(AfnKHl(md&fmgU4<7L#bNu4UJ3*bZtF)@OMyl9} z6DfN;X0DA6uuTEx9BnIS#R!`p4L08JS%%TWhEf|Qz3>!4FF6V1N}cvxM!+e}V^iKU zQ-6X1(FF0K1nAK$?}wkDOFucRLc+iD%xuvLA5rzr)%oN@V9zv}iTAV#Iog=N%E-i1WCk3#)_$(q*{@p^t;wd*buK; z3F$}|liB9cuuyD4Fpv^gjY4154Wd{VERnP`QI*3tTRf0ZFr>!LhS_UHB!9c~UXyOf zQ0W#~%jY_}@Jk_);U5qFAmPdRmibvEW}xgpTAs%v?dmrY$d~Rb=Q3{H)1lRw2oB*u zUEjWmkRENdT>5|Re7og1B`%>A=3csCzR9lEEZnhJGS;?K2xk`gb0(B%XhwBSJ9C93 z=b4tKmxSH1FL>H)qjTFlV}@|D+b0ZH6~`s*^}NJpm>b1mtI0c0bH%24&l9rWW8>Y& zXku+-Y1dj2caZ4jTja#KvLJCgk*2oOJrbHm7$s!eL?He>?L4jGt@YqpM_7QwYc*RA zdR-~F+$H5vJYu`QJ@p9d-)>WO$qW3?b$&Z~OQ%6*)Rq z1eGo|`8utsGWKxFww`PCZ#JE5tQ~fgyEwnT^oyUfd}w*w_CSHdp5~!T$v|?6-P&|} zoA|iPiP!8|a6z394zhqI{$dvV-`a7v$Gbzhmhz_zpVUp?^myXzI}se@b-{*>d*mIz zn3CE*LPECt%@p{B;PL#$_ND@zHaW1Hcm{>g?#?%qYrSUVQ(l`084&>Xdpl~=t_~uo zu=fISUx_cu(?b~ZOwlrlHV|tA0x9;;#9M5!C#>I;hTN?)d)V7SAff?V?naFq z^JFU&GM}BwzcY)jkPNG?iHwS@d{Vme!Xu(`T14<@*^S*VRL6y0t0 z8Jr+i-R-fS*$MZtj=!G56sji9TgJdjJq07>Io$^6?eWhlnO2Dk2&z`PCFl;UW(<%T zPOOy~Lcq46<|cj+YwuDXxQrt*>?r~_)=JZ1bgrpKs2Ta@W(=Q+SQx6Or(SW{m@|j; z&}iCQK4(iS1WAjfk=nybf8b=t9P~yl>()WH-GZBSTM#!*j}1*{0}?N9&i3xft`aVy zWI+d;(F@f6CK}!Dq_V}V!OZCOlZrCRfCYTC7 z7sCS|aDppqi_M&+FkP}5r+n&|pv^5P*Lr+H%#V%Qj}BYAgDq}kR~nPYOy}cy<8Ia#}KobgZZ0)yuU{dexYXzsR zazGXLZ!K~)`)HEoyjHuk^6gJzS=f~!zumOV#jF=)`={cGw|N&#@s=KzYG1s1SqL+V zh4z>_{+6R%*qxEDw5hP8+6)W+3n&P;$Qk=C#8=`|2U8sG%5Qu}_j(IoI#k_C2?Q@mBH(!2+!|X$ z6Hh8&f#03XD?)O~e?vv3&S>vTBYQaPxQit5S>no1ur9j{p#13UK}m03{zUfnpmV{M zC7;=LXO(dH(kMLA{8+V(&>0=BXPQ&yoVp89+@*B%8($|tcQBcu!&xjW-$X8j=V4*n zdO7(f#XC>FF|)ivp*vL=tXN)}rs#D2P8@-F4_7G@T`zr&y%Z)Ud@zb_Lc^uabkWwd zX5yRF#o0NO=w6LN&kgMgL_In=V5l5pqckne&@68z)m+uUXGM!sG>+tc5Po%3eSRqY z9;+UXC}BT{oBjnGPjFf|#>PAJkntyRI6Pz3xn!sQBeG)S8MV<5t6$Sg`89C*?Q`M! zVaH0SS=75}!IfZRZ_@S%lr66dHWM7%-rGiJ-CXF_Rb_PUuuvf}GlF&!EpY_|y}h}< zl^>e)VNQ_zC=pr-X1&vnipP}4>K8@mHH%9tPuA(gv`jP0qG>Ye_`4i(t_fO(Qp|UpM;Row z=KP@(nva!_BP=DyHb!c{k(F_$!ryijQiGhcUD9qeEtZ>VP^7=?9*ho5`h#wTrw5}* zYTy!H{xfY0$?>U$1jpPpKegQ~nLb80kGO>Lpv%fp&R<0;SzdhFGO?$B(>R=d+CA5E z&(U`in)#E%{eyTg_9i#uvebmloa+%>Ax=j8o481-BM zW?`HSjtrf%^4NlN_=YNlCB#7pv{{7>J_y z#&rOEREp;&y4|u~g+8oAs%!$H%e||kz(KSUnR5AlgJ)GR$GPzoRm55)gQWLKe-)I} zb0g!$LSYn4&*3qV*PIWH9;ekG>JR@eqAtG&VUkJ7WoN;hW_rRX)1!lhQ%C$pjNde! zD%b=opzpC(yE15~caH&Zs{|2$`3fM!Rh_FiK)hBVZTa*(cmd*&6zQZaCyHbleA1lN zsg=9b@zXx+KuZNGqC@3>)s~r&h50Ae?{#Fm+qx?$zxU_HiHn zZR=;_H@j#tvkQ)M;JHrnZ2D0ic1ksYESbx8s?}A%nUPK!WlNBm^{hp*iunv^6Sa~S zAC}*ZS>-obmn;oz%*h%$Ai_Nz@A$X*PzR-5JmTr~pO0|Jq!#w)C9OyswfjXxoWqdw zV|sV@5u>)xE&*PKVAD(=NGmHz$LOxa9s8rq-~KEV*yL|0!_eE67m#LIcGY}71Wu5U z?Nu(eo~Dl$>8pNf;!vwy2Gp%co>;*@*v+ zbCrF0rIG1-hRE5UU_v>|H`b^U`Gq0nt?`^o*RpDe#)FVQZ8TxRGN$hF33RI;o*33w z4=c??uCPnqtpA1=IW#3%jk9XVIjCM^5fmSuYMH3pO{$j#AO-j;h?6ao1d~*O{niND z?d`Byc{J7atH8E&PN$zOF#g_@!YOY<=cwSh1TwV&j+e<=_yFrc_*-F)2tv4g zr%#K$dbf6w864!U8cNdTV@TyQs!yW4<@fd9dU%)jxN~(=C$D~@%Xg-Mp0c*-t5dpL z^b%lF6w^{#Z+~$Ae*14Nxr}{E0Me<+J@vvIFm^jle!Tu0)BN(^b%aoUSVFBDzt7j0 zQW}%X*G^YjFCcRnM3Mwjr&LvnSOdT4(m04>`mC5%?pKDaQV{>XrsmxSqD$_7bMibb znGiV2cIr|}Y?7tGQpqh>$$!uUP7PE{~6 z`$!d?myWxM`T39Di}He^V}v!-e>&UoYlHpA&+AVywxc&~!K7I0tIu|QR7tNUPcS<*FU}3(O@LQ!tf~;dU^F z9+n2=H?O|SSKsF6jf}VCeUQL)v*n4+%TXXjY_!@^VCS*|XJxFD)>ku#Ae1IQB<@Ad ztehkHbFqO^uq@}3!|jE1tw2HKftr!<8;PoHla;8$>f-Vq5#PJ2H(126koiedz^p7w z4eG{RCtX`9O+@Keuh6Pz7q@3OeEDyqavf5Nocr8Ap8M#NxxfAJn&&CaJ|6DuZqME) zfoXQVPqWbum-%|rU+o-@=K6!3Yb(p^vu?{G>gFN-i`%L__sQ&sf6M=xkA8mp=f8OW z!@s@tAq{6&G3CprQrgkzMirIC7|A!DcmCIi|fn_}I4liC0 znmgFucTYe0*{?`rfPNgz4fpQR<8Wt$Rdsf~*CoDoZNGog-QxnJz1iK5J~{lAr7=@` z@Njf$%^xp5UMO?_Xzs&n572yoH@j|5VcqWe0Y!#(5C6{iAUz$8Qrc;BnA2w$ z;*#at%_q9$_^a7f+~dc`-Pr{*|CM?Ea+W2z^o#oY73_a-@%nI&+Nmv_OOeA>ByQg zF*iPstigKs`RIFwjHi&7a0vK$Qb;=6`m9IW==|AlQ;>r~8>U#OxF#kqKm>TMq$u`{&z z-~a9ZzCQfl|Ly;h$k5*d4j*O8X&L&8p6NwwZU6bO`%-%?q5XOH)v+(&oC=0MegA!| zch~M*AKnw*Ez0F&rtphDpV-oU-4`P7{_ro&$;F!^jFCs(gNuI#_Bm8Y-xG78C#a_p zaOp4Gwb!M+eO5E|cB3YZSTtQISox;?_68$pYQV_PGgKkW7ax9^!TW~i#G;|UY_X- zB4JBL7n)c>!Up?-1>&{W|ue7cIL(WA8Hd@Mo|Lac-gWzDC>Z!01T(tJ$3Q zsoHbyQ!%R1Khb(Z;WC0Okk6*w*0!t}(&#wz$LGCMyzkt~eersq0PC?0jonPUr0IQ* zBg=Evw(ZDs8K@P3!$ruLw4rli7qX@a7iWmE)dV187<#;E|Kvs+k|yEMMoi`$y@ICT zFel3UpY#&|durX+9J5pVy~ADM&7Ze2PC2$Yl8>$P2L8_j47GlKSk~TiPMe_+1sp-X zHWDGbobT>xO;;G*#p?qIb_*YL{Z2!10b3EgIOgEqmxudWq_rEdUICjSG;}4=-Il;f z9^f*?qs!{#`DNF9x@jw_$&KOPc*DaU-)un7?za4JkPV}XCudNbArw>&$_eQ0PH=)< zdEu>d)%?9V?1&b0Na%H;C}WHLc}%h!C$K$nM=?FyaAGp({qQf{^DU88rzL61YU5mS zcWaL+At5^fPYtdZL#E^|H33{WXXi#>Ctr`_ajQ8}oQ-XQW32R{-dv9WDH0yNp|b20 zu4X5Z%B$zlXi@wFA(NZ!MVdA;T8gS+tJ`{c@p}8b3!5n0n5fjZPVJ4{X=f%dTlB5! z7{jSB?p=BrM|tOO3^AeaLQH)B-Ua@~M?d++&1~_^1!4yT>ge@kHa^>x<2opM}F?dt9ERi7am;E@FPbE;?;eR{^WO;r$Er zsj$Rs+dmUR^0I|5*Ntp^d2Zt%0N{=3s9(|~7uNXW(Vpf-y|Jshw}td~0y8^{zhstR zeg&A?b<2aH1zN+qB+bE`5zqVE650oQ(ht#QunPU~x_6Aslq402EDnRB#bV3~>*DOb zM4Q@`aIFb(w;^|>`)#<6|D--TKfl*3^*pS?rN8vJ?x>)PS&cIFZ5mg_yo(PBDin&; zw%t%cNRNG)Pjef27!%VdSmup0W`<`U4ATLlsKj7f0zr&3L2E(rfwqTIk7W0Gw;5s1 zgCk@OEdb2Uo}HPa!v|IU_vhu0KRv}pRnG=U4)712*f8;+MEG~mJu|d|lx0SwOC#7hH zU-Y3x?U(l{uy@!j;3`6FK>D?w*SCMtVGh!1AS+UE?XlxDQB9tyB21P>p`!o(aPOFO ziX6w|LgC1f)cbbhJYb^4`IrFMU&z0`b8fReB!ic4(;g&706@RJ*R1qM2wr?EKam`f zbL68(&b)8#JhzS)Z#I1p_nPnjhn7ZYK(b3u2^J@3c3C7yj)2jm4k0rHMDV(~!++%N zxffe_;wpo1XHM^9nyE(=m&^lg^}_e zU-z0H{>e`jvM4fEJVsMU;~-ubV~fX$ayyJT5)6Q)G`Y}Mvvo4r?A)vk#J}7>*++ar z)GFWRM8A;`#sGGvWlX?%>kk51v9&X@@<@P5?*T06V*fc(UzqzyS=HVd^NSX zitcf{Iu-Ir55+I!$W{$JQ0Y4tCPtEu!Nxrj*bT3hy1|_ucha7NqzTO_j?+IpQ-q~3 zBwhJFOY`WP9Q0$-LwXA(-a6aC>JRxnJ|T^lxj!cA;v217G@3@OH_i^a=US*1LQEso zM(wB2>3ZQrrsuE)Z5?A!4X#l>4$V03{tUL1P9LAOXMgiE7b?>_F;IK{^J#5=KHfHx z&Q^$+^F7~2h3F2AQ<$EvGAp+JZU+|2Do49Xr!>x?afT_UJNmK!Q}=HplN2W9s}$s6 z?BkaqKnp++n(s16$fT6u>K>KqXMe|O?xNvo>kyc^fFmtlM2U>yiOH0KBDW|RxR1K- z&xq{Z`R3Ngu|!Y~T|v(mPMVc{9deKr166r#QT`jQ`tote&o=`CkWA=~G0cmGS2B>( ze74{cvL8#NTbdQX(>>;l*-4>`ehNwtkFb(K6J*zte_)p(ei!}#7GrC7G_hn4fyyAA zlBMHjVAIYQs!qE}3Z2RFxb!vqDWILHOry4aEb=T+O@X2J-ah2F*+&^d;cqs!DSWTH zmwLx~J*Kl?z|+Sz{!;A;S{`LK^l|9uNb zj{Z;bW+Unz56rNH$}ABw6SXJ$26$q@Z7w6n%`27{I?6|gE!_3tK(FSO3XDF+Bdn|gw>?3ak*^xMx{Ta2oW z2vJOusq0?zWUqhdQilXk!~`eaE*oNe62-tl;q-5hvF_nqoF(+U_4AHUV%hcq6Z~YH z9VDT(#SRj7b3bZZ|C>Dk(j}5XMKwh^OngGL7~>0b&C|m9aYkl={}9L~FmNMKDF)4? zui&%IO#g^)IaA_Wo;7%m^-asU+oSvn0A`N>&8t}?9m2#=`lJy+CiR!3RM#y+H7IZT z2eEv|^jBV20I0fVT_FLJFm+-Aktu+&nNT5@5M*8S6*qgo26qDRV1oQv{nXqr26F0a z6mm_~_VQEsv*>zG*Q>;l_9@gEgcZjb^a&y1Ijj$xnV(|QH}AtwZ)g-9{{InAclP^8 zq&Ow)v7Y|wj_EV}HvW^fq?7*lf5G~8-gs00#wGnO>ty@vj>=}ZM~1}S8K|Y?Z$2CD z%-eYc9%ns69RYhUphMDdizXc{WxbhelE%Gp@z3Xoo6QEVjA;?0Z*HgVnss{KQ&WPUlJeIEp9W9RC|!Pv#UuTH_Lux| zE15vjI|zIj*O97cx``!SWJ@gib11wot(wk$&iS&$!)EfwgjcL>jdO(|y6@`~*`g2n zTe!b)!CyrOfG2xNPtM^tR3vq0+bcw7DY^zrcDm;me-@Za#Sejz5Up_(z9fGu)CX6Y zR+oC)%p!XW(@cuwQr?;0j0k|_%j-YaT~)gp!j}M{0&M@vnFM(z#db%8=R zpL}TcNf@4pMdC*3%l_}gsYis2mLq*|`r4OKPcUP33c5Qcr(*YJeBsBP|pxpRKX8z@=eoy zRX+13ErX6+dm#XT%A|@7men5cs()D56O1yfsoa`9`86vP=Bl?nnT8O!A`n6271IaP zh(A2(&0+}XnL)k)UEAw(8t|G(XJSZcg~g~%b#bpT-fdzi&pwd7N_v|i+$&(K64q>r z4$UUGfWK7W4eRg7UJ*ia>cUw0alHgDysv|lwz~<(d7WgG=qq>qrY)EnHhuX_EF@)Q ziyLP{tFQ`Wt_mk`>5{Q7Z+kqG@M3Iau;f@2o3s=(1v(zdYHovW|EGqO3|iGLL1^4S z(+BxHZx9h;3&O)NcQWkhmi1|{lZQLZKESl`_tJv;SP6Ods~}o~odz%9a0Vp&e2W|R z zn}O?l+~MWe*&4^>QWF2T2hQ19#X`b%7c?*?WiU-vC(tn#=Tev+f8<*$GZJjm>~2I- zxtB;A@&$vm@r^BYhPu@23(>nj{DU9(v36-o42C4u%0ZQ2Ob0P@b|ahRttA#3D&+4I z*$F4rZRe@K{aYwmIwFXxXUE0K)TrJxAvYq+1K&2ZpphZDiW5lW~V3*l zu4kR{v(i_@AlrshFpPpG4Os~i5M4ffM8z&bV*ZHWN)M#OxWG;&#*=4~;HO?1aZ=NrA?_HPoCeD0OTa|7LCf|n6X`B~8#CW%l)HeoC<8AzaVJ7RT~xBwScDzE>JhrB z=-MN>rMo};W!u)bwDwR(0W{N=3JTsKBE15WR(9izpgLAlJ)#ZfB!M&^oRN(~epQ^B zSQrc#npHkoqw3jOoKR?D9RVt-K%hhUJ^2 zZvV%>NI+jhF2l`6H-ZwaddcTQK9kW`!zhDDFMKev)!+O5-9NnlhuJ^gAptEGfBF)n zr(Yu%3N>_fXxGLOOzMt-L*A)Cl@0Ke`PqHyjU*zMzHA8S`<^~B{onf2`JanHLb6*{ZBFFJqw(RgbJ;`Jr3MUkN@~CGk$W^Kkt(j!+L|+h;*lD zsU-Q~e?g7z9l}cv6`OCNVy&YS>mA0TrwA7@Uqs{H-8(GJ zy{9*QVE3L$MfK%kCDTW(rBMtuPVi#)Al|x$Qv@Vpo50D!9Wmx!yxDIqzB_?>nl7p7 z6J1ohHzW2v)7;QVrh+y(jRXsAbwGXNAx!5@;$UYL(@n#TDk5G+nf=AUP>ApHF@Fjo zJXIPb8)fgEw=i|WQCMDE5R{Uv9gm0*HUYGMP`-mZmo$9IBJ4+5WR_($Cw2%=4K0Fi zv$fM#IqFavI84uN1Bi6D>T8wwv3=5irNHSddie0BlZ)~+LYicTu8=8BZHObCz`sNA z)T*?U^&>Xvxv@Uxm7>0rQyr@m;2QfAHG8{RQ*!8Fd)NXC3T*Y(Zk3_16|oobKy?6}Bl|y+KxXrXp zs??l`=}Qs9=FyDH)K|?vYb(>16xHL$!gHZt>dzE_h+E?dM-6|<_Skg2(#k zkb(~>aBm7cm-#0_89JhB{8)H|4kd>eu>=@Bk&G~)+tDeGYkxKiscgj>fuU6Bebo@P zjIBRmxbgv2rV*dh>6qKESvLJnlq?h2H&k1qowU32E|C+kLeD|UdX7w)X0H0t0JmOZ zswSSDapSFq=b@0kl$CnP&(%X^;>w~E-v&4*+_D`M!kd;APlfHY(-z_o zYdHc!QT5nXx&AUr`rl6A5)aNEK}Hh-B?fL+Nfd%7f{xkVVU#5Z$j;)6_fV_yVIM9}(2pPad9!gP?CHIFmoGF$;z|Z}Me|I>h!Vn+$dfFq7GUcEBQi5z z;`b{6myq-$yfQfskv+}HNcSt<9|BVB`)=14T3f25I$!G7kI$DG9QR+M;I$k$w2`{2 zxb^8jrMLS`5G*20M*K5GB(hwTkboCKmT70Lb@+bv()^$6hxjja6#SPO_5Tx1<+|3x z&CmZOrgALt3aarhj2q0S8EpRFGnLz^Fy3Q~e0;FTm6iX&>B3vh$NzEj`~NZa;{Tsp z2rrF&2?|Iu-Rp%;Zzzarxwx3r2@g#2J7PgKoQGr3lI6b) zXA)YZc(nno2~ZTqNkh`VE0|?=dq2FE3H^K@SP6(q0;>p6~x{2_~6;f5t} zfwHeCKvt+DTnJ@gn7o1HYkg!jE3$A?O>oC1I2i^|;3Pg)<7Y+@iRjhdE2O*x6%e{W z5p(@q4edmE2^h4v0$4q?i=WwYp^?S33`z^o%n24rqIxX;Sq_E}=6W}>CQh-O`)idS zR22Z~(SB*8#U%P7f%kvQXdiw#zxwGF5EP^@{bp>G)qH*ZnaF70Fg?6hn&Y~C-V>B- zAm#JkIc4QyY84z3JCl*c0(fQzf+Ia*>#}K>l7S2_j}giw>g)lrf33Axtp`&9D}zbH z0LI(l{pwQ6IbD|s9FiS$_C!NLQy7a9sunfWh)@VBWnx!dr|1KPrxnai2m_6+h5v7j zho^|q}O;S!FnuMHIbT)5}|iDmcM_4z}Y`Jw`4-IhS;;ZwK0wb1ygx7yt~hLcgjlH zZx1U9XhG_*p(^exPCwC8JJcamMLi8`;ZXrem6&5lO!f1QAfsc3DhR=cWnMmZ3Y@J* zStx+1*lhdT$+CfoJ`lZ`L0wt9p)oFM>8M$?KiclyoqxDm4Uk`xIYBQFDpKU1c>oC$ zivkTVv1Dy4_`2{Au^-C=aU!v=uMoJ@n{_jDn_?|x#|D+NPA*hMfn9gsajqQ1IWcPt z)TaXcz;?dp)#9Jt{o$Y1FaFn~XJrx(dtSsz01tav<3?Kg_Jd5mp(zP;A&>>e^xynb zDG)7L*-5Ft__uv3)==x5Pm;RW9Ub?{UA$>&jE5ur%DTVphmQNBt=;X^ll=Yk>&v6` zTW@0~r#4Ea+pYUC#~37nYEPN+R% zC!Fxk;qmw1QR7Jgp0nq+L*@9);#BYF$h>?AdIR?7fb0(r7FCEM!e4HC;utQz+mE?O z1s2kWcNdJ!D7z+ZjQc22jEnEKyMzdOTs!z^NZW1h-EGvVg4ZX!&7H+HxaJ+<-5G<& z_$}igdBO8e*HhI*PtM$O3z`r#sZa{iAjBhWpd$VH2?r|o<9sta=zhad9j5T234pzA z4q_N9Qv!NeZ^yp&vQti z{J|Y@SNQZPE0VP*Qzn9^OhD+c1;q)P7bO3(sB&;Nd%|H(IQzR*;vjq+IeM_g0$(nY z2-M}_&M0t<;3_j^B?njr5@gL{%~=B~s`a)_h`1_7yZ|Unmb~IBNW4AxStHGs?w;(i zZFO`0{-Sp-$qRYC;ulY5nBS(DpjAU54{PLDuu26aZ18>M7Jw1nu)L<$Di0}A#XF1I z7dDK&hV>!Rb43Rw*JufGx~%2FA*#ucWM+z_pDLQbJ)LJ0{niJ&z3t1Vqgi>Xf!7vN zW`qXzg#}2N?EAX;HL*YaV@lcmD#{4?u&8XLhB-1>e{NXnM`H>=P5|K>_T!)*e!2PJ z)A`N6|NFmhNN=Ek0eZS=kxrp^8Nql4u6spSaPYrTy?OjWAL0Jnd4vS;5qM~|L~e{Y;!gB zkHn{0wcE-pS~CvMKrM+S|E27el@x7J|2_`ADL=OJu{EiyGF4)U(?&fUj7T7Z_&P@0 zo>)SS8Z-|MRi%}9K7CYS1yn-x!hH&bQ6Y}^c88n8z%CGt{Bqz5klERb|Hg{P@*d(Ax3fucp05l52J{y3K2mnhKUealdT~JxG zS)c#R(o~%2B!k!`r8xtoCff$9)<^RXjXPNC*P0I+sCnyEZezdr(HgHev)FcurF^>R znid$-1y6idV)??3{~SmY%a6Q)g|v}}_LD-xt#05?R{98F`tr&S|H%ZtnUZ4~Z9@KRZz{zGi*eaE(&#H4 z)_PXZG?k8>o3nFWhM!&}@?4_(68ag-F<~K!#UMOzEn>6oMz5Z$h^lv()K5NJz$~uK zOVB{x(D=)9RCo&bX?>1*d8&}{hd*7^SM<|0xI;@io6xD!EWr6 zCTWyc+70WD$w2Q@=du`)xX0vd5qDL#hD@wD4M8VL^C`6vGb+-!nemW16DdlsIB2DF z?ql5Ul3q^R^Db9?CVTzxPjU-*Mby5Z6Uh%?S%{J*tVoirjutA4-%}kw@fL3B}V}0cg&VS=Q86ZO3Uqjas}@OBciw)kuF$nS6T0 zG<_Z3p>1XpsjU;tr?X$(`uG`Xzfo$u*ZksVx`WH)Q@7GusYPqI`HP>aX?Jg{cXX^O zx~jZ$c?WNu0n>OY;2putFW*p{dmjQ8-asMp)1}JDHXGs;I=o4TT?^8FdW4MJJAUSb z)5zk}r9qvzUj3Pt&;A|5->g$qjqKq0Kr+bc^~6C{F?4@VPyJ$qihn87XxQGW)cCFg zGXmpu#`>kG4afIm~UHqE|!kYj!I`FeOY_-nc z=YXizLh`FOGoJB<0T4S;_mEO8KFd+7`ynGR?8U$zSZ@2Ppi$I#S%i`9f}j@ z>!|;#jl3i_rDz9MVW2_M`Kfkd7C9>IKvp=ncB8~uJ_wpS6;y1cbsP}7YmlwL-dUU} zst2zzxTCdhdRk)}!|qdt#Ignp@benB1RR&bLe3O>4HaX?g%t0JjBZ?q0u~{*X_WC! zs5k8?5)%TGU;l8GSV!-}9!o3#u8ZtF3JH73?DSn&DP|lq;x~8i%2}qN_}};9&pX$* z@7=-nL)~IOoO6j9N!%ZGM9eio`$y)(`E-3Sb{*qwZu{yWhrd$5=_{oilH_o%gPkvP zP?|E72V{~wh-443K$bGcP4eeRTl%6)-9(Yt*SRRj&XK;ql4}%nWft>l^AP5^`U2f6 zU3>9?5tK@Kka|+O`}%_iiVig$l2(THQMU04#=N~LCeY#9-0j0P!5_MqrRO`^M z(gdqE?AE3tfZ9)O^XxeXMXwLhsexj@j=28C#F`3>-Ht9=gLoV6U%mgu&HqO zSxJX(*zJ0!gk))`(=6FU3#CXKUuJe8{D326UNe{J-Ogh_Bz6&Jk^-t`X1N%_D%h27 zkoSF^khlmWkbjG;jOM9-v`4qCmp7g@Gd2OMR}2+DCeKQz&OvEIPmsnbot<*cz(E*lz6c4(m9AhtOp)5`(c4Rqqn$Mz$lT`EqYktoz zvS0$apnc$ZHuRkvL@Qooi{wT~U7o#7FF0|I+*Z7YX3N)r%NsbiO0h;30GO97#)Y>r z^6;^9^yt!^qnwo{>1zb#bbDLGUthn@0oO$qBZRRPlFHBEl(r_BUqr$=+p>1?KkqNE zE zl@TPVFIhF0$h)-*Rjq58RO_+{FI%M&dkNBZk9&@}?F>mHOGTtaptV$ax86-tjSt(h z_71HF1EIY8eOGab0eqmR$7DPZCu#Kresb{Bv zf!!^OeqbXN0hS+mM?YJf20OSJ3?hC>Pu>9*1leDOHQoGgtAX?+c#y8XT;#_|YHDc71*Ko2L-7qrt(8Plx^0XRcf6xkvQc zSf1XM$awRvHvHyYzk&AV-J{WSm0uY01bKHyzfiAqK#Lc;*pxq+&ds|-sNTH0Y7L$N z_mZEo?H+k7B_W8TyW>^Gx-^o|7qQ#ah}QioAl`$+^qd(?bGE?C3WUB zm_RK>g2p!G;8=44ZJbH>G{ux8FPaBNnhIoq|BBbbeGL!tbFpw<3_NyLn16FnokW7ws&QMmy|@z5Fomc!<{qMDnr<~fF3 zY-H)tV~)4)sLpowQ0a6?qEl7A-r(*X|2JcU6p?hfNO~oBDeq0sOgXnBU~E^exY(4| zKV>JyWL@WaV+IDis}38j3L0`ucF&+;U{_$4AYX-D#u%@PI;&{lC5SaOir!~brZSFF z6Bvb<&gxFdsbs6pF=wL$%5a{{ZZ}P3RY42gf@ii!qp6<31SHH;Tq|pWyO@TLr!X$r zX|kC{sE%PeDpVaLwcZMYnCORRyEnZ1)MJ{HQ57}HZn%`yIVqkF0u$|MAG6E|JBCHd z$WUrUz+|t{j?G$;lHPHJKR!bJm-4l4%*vh>DSM2zWmEW>3pJ9igH-o#Zr?o3gu2Xi zWVfDRf4Df@!<~K>*m_c=QsCn-oN?ikC}Cau>?R`2@(t< z_2fJrXIJ~rAtT3+%NNM4;B|gi`B-ONN%7o$&A6` zPOPxcClbu9Jc>z0!XX31KnaG`c7t13!1Nf5v2!>FBy5{Hj?{wW2+bXAxqXo{yh*$l z)x;5~W#&adw6e)rwBMrYS^q%ApxWOk?86H@;r0<>H3LcvSflhCL$-TI+{nYa-L(o| z0VzOGM%%LtWb^VO7w*DyUZPTdO2r66VxTzpV+g#Hd~SB_?r&mv80E-#K2f$7S0G`A zcD2P6NGCG*LZBWc%+Tz!FP@pA`+r%nM{$qE;O2Do51z&Hpn`UI}tN zny!_Ogxy)@LsF^iwo>>EH?oQA7)9+fzn3^FM*GK`sHzpPN=z|7fC4T?&F8BNYfm1n z!+7F;to%-<>n>MTn9*0bZ}3&zT8n2#g$1nVUnW28s1Vg*Rc5A~6Rm?8NVW_?(*93d z)+tyrpk7vr*8-5LXr69A-?^(oi5AFQ;51(lXor;(L5CQMt>wnb*uCal6Hr0=+jau$VmB|QTU z8q|MfdAd|foFeiRx)NkIbU*A-MMp7Wn`EE(j`rd{f!mc|KI@myhueC6SwdDT5eq82 z*XL$Z9M%-)t^Dngex+s7&`weoObb>04~yVUG4I1Y2%iBwl%R6S&kvRzmQ%JoTKSEo zY)#47!Z#1Q@zeR{##K9R=~I^3r6jNa%Dk;9=~|j=T%+Pya6b7Z0wV@GqL%q)3qE_r zifijU+uSpP%L*2JOZF-DE1_Mc3~t5Z8W5RF+DUXW;K;SOZS~U)aDgctw%6vd&44wW zUNcjCxo#-+5(I9~_;h*o@x^~%7rd-uWjrn^tkG<)N$ttct2Z08Ro2|)NYiLfWjmo+ zNX0xrZr?rS$y}3eO0*D9&N?q0rsiPz?Xdpd;IPcTQk^t?e_a+;{if$j=6Sklid&Z| zjnt2ff*^8u2m2j5X0>Y+1MZFdH#@I~RtSQMp&6vX#nC+mSZ!B~it+6(m$4x@Skp_$ zkZp`QMP9nB8q}pr17E>qpTd3456%b(3;?@kQdzEw19?-%@>dOB}T+gzgxsqoAbwJCnj_(q;%EDSkp&7F{%$k0ISeaD)8C-z@odg3YLDS#l;esz>c>Yqw>@TzC-SUwqG)wSp}ckfK- zG^y(YZ24ZxkuLm5+9Cu>@iovKX9{pA0deYRGEKHmv`mQ#Od3;3e#hc)J?z$=e|qL?T`)8tIQ(18 zwByp6JI5K!aH|X9S|V;4h1B9Ux!A$2-U;W3pv6UgfRBdoDxDFKXx2;%V>a!s2@}PEHK2 zwVR4ayxR9OZgs1>EBLouw-MJHeTR`$u?Qo=`;JNtpIYR&GSB=ZTeE#NQl5FMB%+9)h%l&hQLe>)K&8v94pc@0+auiOuR!}}V`5Zh@M~2hwT$yEfe74_%>3nM84%k9P2SWO@&K&!? zcNSUFx9s2Y!FRWjmp@ku6rKt9TBjor-~H!C<2VUiWoh>!SZ64P)9Ct zIjc+U$sA5S9tCNth_!6QI2{}HiQg^abRx(5c0&vKH~Y_f+;#YE`wQN^XBXySHxKz} z)M<{-h^Z#%oBM!sc&8zTZd_FQZ2baeMVXLzajo;$rovLSVY}&EpS|^S5c~Q^ACbs# z{jWcw=d})Linp7&=Pw$qBGcNYtf9&b={`s-M{)GL*ZgF;{yMbNRo1V^xT1Pvsu;1@^KKZj#swubT&h;UN9&4|19$ZCs2<26tmie4^**&knNp(9Xo(lcJ$Z)=g1vmAdGXQI5 z8p{v0U#`F&l=?}!9SNMQM$@ytaUY88JF$f4@_XxyKs#g3g_~O+c#e4!xGBX1PF5%I z&=AQt83^XE4xtl*fWM$g8w|dU;X<@44eE`_z?6_JC^3$@%{kkIrHQ&nGQx9(Q66

ar|T z23kpB1uL_O=Ert`?)tg)s6?x)`lDeW#BhgH-2Aw`{}TEk3{bLKGP_<4bCPlh73%G& z&z85IT-vJ^q3++tPCt>Ce=WYl9puDybkC_E)@X_{u-PPq=U2><59d^}ql%p zCGw6&x6nbwfP&PfRgDH_6trhv=LP1|J;GY-+{z+uuoAoaVquh3+cW1!aLFncnIr6w zxSVd1^GFa94-?f)V-@|N<}KdT$YXhP1qAPu#!BS0Lb?$QUWd!Au1wjj#v1$<{8L%o z`VD-@aQMtu#<_O(t*B^wpxv2vI zOLcn)f>ur}rOI-J*|bEUn=1K8Xgk+n$cZzN%`*2aQ%R8u(*XFk1y-3$H|QSVT!M#%ADY(iZF$tgiLsoEx&d zQcTL7_I1KnCVPQMX^&b^@+a6Wo=_4;DpHsd z1}5I9az{uM`gKud^{lKD_MCH7kRhnY(&EzWmFbJohZ0XF{2LCdXL+wGGiSqnOUu-P z?0QQ(6KaVL@CN@I9V9?0dDpagJDeFDL*JJ4p$R9koFnT#vrdxk@-K-5KgT&DGUZ!v zEx#wD)i@8!8HvQb>fJhON9t3xxYn7;RW(#W!*sQ#gzt54bY`AhQ2=gw57iW6&aXoW zz}h#nExpXE8M?17OcT1YlT#`i2A{g5m7{+#0=}WCFkIf4+&At)$z#9xGp*V!lt^hL zkMv*{?PyXi=ed_3{xor`Z-3gUD%ha;VjBs)HZW_xtB&&fdR$_c{PI=7pwMVf|llS6F! z83>!K_gA;t=Qg8jojYH63{RBarJVnrsvN%S=*w$lN~0bUJo>}yJpyoqd1I1WmZ)fX zYk&J5VE&?9!)_}6gRR`nMqS>y@xbZUuASqHH#|l;`c|Jhoid1IagL$9_47d{kXxPc za8)aiN&4>GNw4Bl^`A_#{*(HEt-s5kJvyU~pLV{$4`65>k$GJO3UYaJDjSD6;6CW_dT@vtCT>vVs9|eZ3Yqe?f^@C! z5=UpY{{q+cbH+oB{&Tz7lMzZ<)8Un9d8%c!rxf%A0n37??^K4Ri;lwN62rB6=*o zC*t8CTrx+H0a0vUUT+_%rC7<7ei-zHOn8}6}2 zD8c{16JfyzNRsJy+j~~kT{5}eu7rUkO~U;hL9-bNA3=TnvW%611|U*cB1|6nVrlV* zH%p7mq1$*R_|hPot>!4G5(hz}o6-WDxw=8{Ya#ejFJ_ZHcIT>l&J3&hpjQn$s4S5f~1p9Vw3GwRq%z)A9DSHY>TpMJz)Ku`s_k$93#6*=?(q-S(h= zbT-)Cc?moH@WWp=pALGxX089?nCmWj_yCB;0AKqA7va&i*}C5Ox=Ce5;XPI@_pF(L z7Tm~(P=_|if^P|kS*(bmt|v-9ry|}W$f#T>9N$t010`b%E99Bh%4k#7U35q)cjz)k zNjUT}Lb1zSx_EYUty3_{qC}-yUO<7PB$IGG)+Et%oewY~8XOSfN<8`rrOLVB-HxNZ zU%U9u#7z8QuCMaFq`n}rXs{0#7sk)4%1MSmN;iX`EX7qs{&G{1cAM;P_mf1)D&m2;uJ`>vHVSL%zi4JgM5ga> zFq-}T;m(cbugJt;d;tTFeH4BSbfF}Nuv{|fKm5&7re|4uffomc-sn6cQL(!vxz+a* zHB<`@K}kZ=w<=B}S5^wq;hKv3B7JxcJ~lJ6cu6J}{l%=}X zakrno4c$z-9}b#_6mwhRNbu3ylED`T3KFQSK&s|GhlT4R=Ls08S*+lG?7+OSEaKDokOIu zyFgg9u&sAQ5$4yWPC(VI4%2|bP*`h2yx2nDfQ@fs*xn0tm7C6zQgr=;U&8A0?9FS+ z;b&8Tmh5-X`R+mA++J$TF8GuwDa&DQ2cXSe^CBxcMC~_fY&B}o)v|17-x+KX=WC@| z!pL|;h0%O|yc{l zu-j=xPC_u__IQqqO8nx9e@nab7yxdsYaN)-^Zr2S9t)f}5Jl&#azY4T=ebD7D;dH~ z*W;{3_bf%~N)YzL+-oRJ9$BtP(X5Q}d-5&(i0-LN;GL4>ul_XndEBL{=*z?H)9Qmu zZCojy`1Wt219B_6&BxxUh;}IgZz3K9;|p%E{|iR4u2R#Wz379HPj&c+zUOM4;L6SBGy3k0j>tRYk5iR) zG`s$p`Y!7$KXB`p=}6xyhh@;!bpcgaGrjtXC(UGsG)@FFd? zD90%)C+D{)Pg0^7F{{DqP;wG%Acz#@u21%NMT`eW-Q$P}Qh%X1| zY}Wj1Ir|QZsU75#C0Z3D6*|Q272|HXB)`9>4zn>Nz>+S+ z(ZHqch{Sb%jahzV_g{_TYQkLaK&Ajii4eEF+atC!)sP{+aDQLB)o}yR7`7}eFJbZu zx$Q=0X?=5k^}**Hm&%pd_2*B%+Rzy=(<^cz{@4D%-h8^Uy6~ADoE?k<=EefS_R&RO zF~!~PVDGGI$BkJWv8!8tw)A9^D>XK`yMvP)7EvRqJzce7(A4Jslf_35H(|kXXc63P zM^cP+Pylo1&z9+n*1op5jFyZq7;mdv>q?u?zkD#i!WqXZgXasc z568-%RT^`)A8hyG4oLeC*Ou)okG@=4Q{7OD7!OBYx7q*ZXsF(s$GOq^{Q46Xu(g8AeDxZ;aqqveXb z{!1H2-Ztm6_Uy~WrCT4bOauMR?jZ?ENBIMrkM6I|KS=VsF1B(LG=#vV-7#S%SAa~< zEx)WAf34$i$Un7I6c1Nn8Yo|8vOt@B%O~Cm^cYB&dyqlS$z|n$>oz6-j841A+wuLi zhm|+kc>k7=kavfuLKf&L0Vg@UjONHp%ZQ`krrA@F>8(bCPM9w0Lf1?57FzxH(Uz-g zo#BXpmtYvke9{m#*h&S(=bnlV!>pkE5<@6qK|)gQBr(RBn0rPqrS=f?G~{f@f__R6 zO0ryPp(@03WT4F1>K#-qHn?krxDUH zW6DE4>ns5qHKY{6BwGYV7fxMeBtV{0tRkU`9N=@;FjSU~7z`}$B613ZIqDu<{4*XR zP1*Bc-NYwd21ZgvH%s)hyC9^iyIIiLI`Diz$`|p<_?nwtCt|mZCrL#z_UVnzvKa|w zv`aC)?j3iB55Y^gqMjowk0L;OmncyZWhd>mtbv3%ivux@+%T6@{jvC zkH8zdchQWdRV3{F`)C5we;Gs$n!$X$QTwO$@QUfU_nPP zr7k$>MTk^{wZBSOKyj5{vs9C~Ipx_dP*gA84UoGLo!~_mZ4ge&reJy9D;qv^qq;T@ zNl8~Fx;1#}SnRvuVMl_zES$2UWK%{jv}FeUJyi|q%VKTYqy%&Vl}ho{q_d(`Pp(QE zMhuB_7%=kOlDe9KT|Tcoq6ugdK+xu>WFm{n%KGM~i>qtv6h8m_eY8;i{%m1A33|1h zVqE`5G;levevL@LOA0EnttYtgv!UBjl{)TDWh(rCgAH~pguIR(4{^4R8ZS(DNDe+q z0QVNXUs+4i#a8KK5@EUfk^3=EC^*j2mGl=;%CdawvC51~W-Sk|ye;V}dV~*Tx-Ix#oLj73F9z z5gxOm-pFd-1d~K?xLW0#=uxrN%&0Hb_sX)olb@*N<_LZ4T*6I`jEB&Ej(cJ#->5lH z#k@tZrafinK936&Poi)sB-72^Z*k_X40_Lrtj3>E@BG(MB{PHsq3CVTqS@Ouioibb6-yCc#UzALaex+XP*~Ghbtqp_+zRZ1N{#3NhOR)6hlP z*mp_!YsY}1u$#Ib-Y#vG93+yU1gT5Bn!W0FmI&>{trmx(uw$5{P#}gVV+F>SN(88N zXu^S8?@;I!@4H562qL*XDn)3+>Qt66vui?r7qfd7Q;LfQ=C)Dw8cIp^w@J>C43V6+ zuaO;XSQeC+#VNbQN0$fM#_VeF$q&IY+C$-N^-%UbT~JjAU>IQNBSOOUZH0yvThD~4 z2e3=#y~PY<{pj=Y-wdtqM}LE9R>n-fWmJ}uD6rgl+}q{`bS_GAbM35)0?$|*1EP_0 zgx=aJD1r-tpn~6a@D`}=(5?k{T_I60Xt-Y2B9oL$pa2vLw@P*gFv`;E3_r{acP(F7 zhV3(jRe_X*h=wDHE1oZ2D{Wv_YdRSeduMhfTle`8NZ%cU z$4Li8hs0>oWqK3S3qyx6C1pW3s}9gLOJd_+Dc?t&2(&}a zFE~(q0bTGRyB885W@JZ?s*>d%%$q_~A?RU>I?LV#GqtBKc3SfarBMXD>qBUHewm}v zQUJzmwULvpGUrQQa!qM7iEjCH&@WI9sRNE_}8;eXc^{V*E!X6I8rrSYXCNZBqx!iAp;705a= z{>7Z$W*dXph-_5_3EEd>(POa;lD?&@fmd82KruuXxnrZ9>3(o_<6d*8ocEv$Tp>re zf9|2tHg`7G)}O3wdP%8!&Bn$5s{Wp6+=B1KW-8FSU7WEuWe@=tR;bKl2JzI|6QFP~ zLM=etd)7RiefIn9gQMSJP(S@6SLbaJ0kPCy8Lo{^xL|VZQphG3ux5Egts~52WY;#g zC+y#{H3E)BTKFI1lYP3e{QaBzzoC&Y&TqJT@+weioX!JK6le9^QKdg%CVJsal4Tn*b zjL4+Jih1z4B~^c{?g#Wcy!*iu4Zmt!9hiKf52uce8XGOdQyo9xcyP5!P>W zlBuIg?Y~)W{RM=@;vp#?lT{J1cshXSCTLDoFC9z$zXj@cW{$}?)Xqw41Hh~kSeH)3 zA(;wRD^um9dgsPKENj2=pH>ADTEmf5nD}PdiS0f+7(L`$PFzGzc1`rO)q#(-s}ZC< zo^*51 zGOtE#g9@MU0KSVsyf;XBxX7<96?m=QAHrkr-3 z)(K4Fe9t-=-7u0a}PL+o_9TpDpwirk=6Pun!=!w?DDZ?s)En@)0#oOP^N#r*ox zFMggJXnKU|Xct?*X3Z%Jp~z>?I4O9e+!@q>zjQk?B1jM@LRBaR*Bp8hCADK9OKN^N zJsg>J2pJ)Jp3cyQhFkUcl4#Y7WSUW`71J=R4hX{yu9n}Y#XH9Vr7?s|fZ$=OsM(d| zn6L$mFhUZUUTkkF@O5*icf8phopQc_pkfq;>aEw9v!}cUCU=@z7nA-_FjTZ!C$GfE z6tkIuWtfPvm@LphEih9CW#~0atY9b8IG9rXQ@Qgqv-9!j)xrcnsW-!UXJpNMedGR0&1Ys9%A6F4MH#E;Vj z;IS8>f~8#^|8j{f^Y0qErp9*WgEK*%GwjmIJ&$-kWWyUxYccu#te>y}qNC|+zAs6A z$;DB$CW^TUBc70&1iwwp&C3rqS2yPQXh6)0C1hnf(A*-u7P@B6*&aY{dnwz!q`k$@ zKxmxHr!Tb|GYk1KI3X+m!PZ1g7d9156C=pw+RXgqnRaiq20^iz!q`V9dYTC^xrwrF^DMl&YAsF^Se>LPWZlE79o=g z>>G+zAzEa?T|Taa?|Hk%)?yqtGP}$8UOty#Xn?*6?O9tnBTJ3q7+aX2TQiHD$XAx` zHKD*NNUDU)Ww`jU8-~B>wOBD{;00Fb#$&VrX%05mL7TYU^?W6EQ^3h*(U7z90d48|U@ zh?cu4n$#ks)9^AjT7-ivHQf^Xo$e_)GI|y0Q4?S%_;3TSfWW5_(qzOgCbNVnNkl~I z%6_!GAHsqf;Wak#C5eL|`QB)7jvSH5z5iK`a)SZHQhhje43ffSIGn9ZuLIE^9$ow! zd<&lX+K+SBHrJvFQZ##cQltnbgGZ68wKluk+ndMz&8^XZ)VQZ?pN79OkfvRC4hbQ-Kw|i0<90Jch%5q zp{B0|5hAX{YZSOOsA^7-mz8Erb1;_fbHM&!5n!xS9!6;nWV@>3TN{3Ob9b8&_mAry z!*8P#R;q1VDVFZ+C@)p(Gm6{a)iv1Knh2pvAC-us{Hy4_b+(879mW=A4Sjo?(-hP+LgPLni8@(b#ulRDw=0~V``uFhDH}mgS#qLntEJ5Z%kE#49#PKo*w@lx%7|Or`pp176VR}!DKZwF0gQ=I ze-OB%2qX*m!I81w-x-ZFi1ZjfBnxpgM<0*o_@9j86#AloeC(yEK`Jj&o{W96ciJiD zV9_`Opgg{j%~Xr6w9gq_JyWt^R)hy-1}go72he=X7Vv3FY@+1RR?eC7(nvgw z(t@3NE3g>SPY_)gRk+`avMbc?I73)sjiRpK3F4-;=#NrAlBqoomGsfjJSxQehA7!hBW`0rm({eu$w>2NVUrwg+Fx84ZjRFqR0 z)tKVa+k~{Gy-O-lVCAe+8YD3%E<*3@N(r3OPR}9TmUwg4(NQLbwSPcTBsCHMwj07#D*r2ek zHP^TDV>6RL5u@x-_1qlII+N|dX318Z*aWZWdai!YY@9L z%xJ8Ok%C;PXI#CJTESv?qKW9gh*VsgiV;>DjkE^Me5F@r&R^(cV@9pTxT*Ks4w%(S zhtm=egH%k~_}d7CU)u*eHoI&7@G7vEo( zzRVmuK>|5vrn{%FRexQ&3J~9iG%_7UE)bdGJh>daC#?8E!ujNGS(*|iqCAPUJ;yWM zaDOcLv=NtJMq=?92(R5r#VejW`>;Ywqo-7G^p2nz3THKhAlEPzGS~Vmd08F^f1S+{J>xcdT6OJau>`@#gjHGxI!d6VS zls3klCh|$AB)<3Sqs`By@EoE=i>%8**1c$B)_^}Wc!dpP!FQVg)4zNzbD~av*dyU3 zh6Tj%{Ux#f6kD?XglK0e5ChIu!Ohw4X>3@S+z8>3CPcBnyvPkocWP1{5$F3jH+7~A zxr#9vDZN^TQR{|fJ`j{mvUADEaBk-PbRU&It z9w>Avsm(}>$As$D*wHgSZYn8ahJ=336ahu`(Reh<3(Kgh1z`5Ofu^T~&4#Mte27$< zv5|n$uK}oWD^fWr4{yIZ8je{`eDGYK6t~UfE|-d?z_aWtuG>K#8a=cVX0Bp@ofUV? zHPEx0>4RHU8Qn(jdh><2ywGXW&0@rGcjKiGu{Gt9#il5DPpFRnLla>lXw)=gIBRwC z>P&uo17h6io-6sa02bw=vPzM0VG-f{J|R$e-fk7@#K{ULrXk{l`5`EBVltmLW?1-6 z6&*6;W8H-Gq>EqE61t4j=DxqHTjKJ60dh`d#N3&Z0Ihx#*gP_#_z5@moTv;zTfUG> zqv4n~(A*z4zaBA2M;ZHdbvdG+SgO=f1k4E5|ErGqKtsN!A3kJje6N}9cuQQKmvvsRC~(h%q5}}v8;W#PKUwj&&j&J0QIc19JL`P??)lvlZMr!49&tQDDPxD2p4w9%ROphY*EP(vsvPbao)t z6is2JD^SEH&C;aB&<}Lwt;h;XF`PJ$CHJ_C#ax^yD{O#HOa{s9_n*C7Dzf7%w2#NF z0nz!l;{8}LCQgd*DI#oN#+OOMr^5z`KO1*6aqgFa>-6pkdh^4@3tcBB*C#Qo_JvVE zl`4g4AjuHX%cTr7+6abW9HNF+#-8bdU4}-{D={l%9Zdu(3}ZWcL$EacrSl%WWvHkI z3=pVh5rPd(vy$q&TsbSUNgVWHH4K>@pR6t~ZVc|$%Ulpx%2t;_N@{I|B+U~r3TLrvO2r9+%N{%h|ZED36Gxz$wP(b8B`LYhgGDpYedif`_|mT6ty6lv2pF}J7PtzMRw$!A12pdpGt(Kaq? zm)4-^l5fI^@?^spO+0H=C$loGygU0qAideg3k_Y_0?Iq2@85jXPEeIcO0y`2_P!cu z?yoMsh7~Fo26Wu#^L?#_*oLgn6%^tr>d$8%(v7a-w;xi2?L6Y$Rl+-At(^_m7cjTN z`{$zFGlnuvPs`yTzzc^%kdqk*{CWR=`&&Lb#GbU519 z`RaV}6vSVWawX|ieXo5u#RmBn-PTguCp@T)Q2{7(FePv= zA~Vr`jB6^%*K-27LEn}!<}v`d*`{*YoV_cBx%(xd1sRZA@_e&ZjeWA(iD|5^(ra{3 ze$B%`elyTohMQOqLia_B?Q_vVxxk(Msqxh}B-%i$A3>9SXP6sRS45RNH>|b=x%XK_ zs>1RdHB`#0GhDw&q~+v|*B8_|vjEI4SZN*SUDH!8n!SDZued#2!=feiU-V3AHv0ji z>f~Xt%={s1Am#0E@Th0~GyFBYHubKLw<`pe^q&%?F(^PtaA;1%ojWwqK&!Qm$^2pU zF1H2sv31ofDx2#W@bi;y!Ym}0reEQ`r5Fc@dJi@|jK5CD@x|QAWx5->LNCl;r<~xzXReaNp z#0M6sY(Xb@6DoZ8nG7)G*yTkdD=~P*x>f{1&zJIX&6C{Sz$GgVa0cF<| zfAIScPp&Kd@VB1{j`ujH)_1Bl$6YAP<;5vi{a|djf9b#RXfO2Ah1=(JT+Ja1f z+MaiCxoVzg#y5%6%hSdbia?Xc|MSi%X40QyE-aN?c=IUM=N`NoFfZ$Yi5f3;Bik2Z zI@6(`oY+{xI~E@giFWb@LPoKO*g2eon$6yXfhLKk~U#cK~NSE z5Ks|iaY0Z}P~5;5L>5sHaR*ccL{wfD6+}hU|L1!@_c?QBl9c-X-v9OcU)O)Go_@}= z-OqkM%X!Yp(>rf|b%x(%n`JWl!mIf2zRfe4ZI6|0CbQ%GOlDWO6WkLX3ipS{!-L>y z@Njr8+zs9acY^o3{ZHYcn1?OMWcG%m;Wlt4l$?byf#G1yvs1P~pylW8l?rFL*ChIX>xp z3y#Npz~W4199#?)|9heGbvu;&C*A(vQ03py9Liw@R6aZ4cz7e60Dl5^f?F>M`QIDz zFSCaKl<%*=nec~D{&!oN$s7acL6zTma5B8d?f(w9!#sXjCUXj$4qM>I;Fj>8Q1!X_ z@=Rt5+!spjDb7owd5AAI~cnIbr;2v-Z+y{2TUEzgr3-}4=r=a@# zE%2}Khj29w_qzqI%}MiyOy+O!wX-sr4-xRC_hd5d_9wU$ za&l1NJ7E^~z`fun;V$r-Q04kKl>Fa8wZ9P;2YoULMwm~9azD#?9aK8*gNpA(w|@gh znD@FQlbHc0L$#xG;DPY#Q2q5OI0pV6O3uz72s{p+fH@CQL7Cg&;qc!uf`?xk`r&*i zdHqoJd@WS^?u2SLKZpCl7vTYL>km@aa5R)T3*~6Pd_rEfXe{)Q5xI)8M|CZ-)y1eYijT zHQrQ0@OdcnJI*RD0j{noMRm z+!gK$_lHNr2~hE@bMuYxc+5{i<#Vr(1wAqcj>G&;sCv83R;TzwG^qOy(rG3LXn@fwKP%{4x#r z(Cb3^KlRB_-urwiw8z=-o?)5H3iuS<<1+->ER*^3O_|K=MD*G%lr8qZznwOR)9GKz zWX^^!!ycKxOrOL5ui-)XoAtHO58A&T^x(VTe)ziyZUY~HyTQky%J&85KcLEG$8QAv zGZh|;`2;9`olyPoTu5}8_qq9ExI5;{pz7@=xHr5V?g<}(3jaLZ3;x~ByWADhH5x|P z&w&TRcBph-1l2FDhDz^Op!&xnQ04wQ+zvL}9m;VsJQVW+XAe|+y%z2P?}EzTkKFuk zsP?$WH$!_o94dSs?h7x03V$=)5q<~m1D}8@&)1>yv-5w2_T2y#ej3~t7NGKd9#puG zK(+HP!%^@FsB~rS3G>iBp~`C%+#61Z^1l*}f$xEm`#HER{0`h6{sgMregl=CE$$8e z_JXRHNzMguXUuu1a@zo>!VBPdct0Eg-+-#;Vc!bnz9m$8_Jt8V+PMO%zWbr%y%);g z6>vXzD^z^nbMvpD^7juYeX#3&A^(R$rF$Bb`(mhaT?Zxi0_T-b`MuH2w?mc3Jy7xe z!tMVKC4Z}LdpSUr|0F1Ri=ooF21@^&1yyf1LY4Q!Q0aIXO8%Djhjbncm9FEU+QU*P zxouG4&vWxF&Ih67JPTFNZ$jmB=LbT14~0`O&w?udbD`wj3FYr`sPcOrD&D_B$=m6{ z5dJWz^q=4?!bzB~g3{}cK&A6dsPNl76xzc`sCcG8^{W-mqVs&`$Drc79UcI`3-^bA zaBlsb;64gU-gGzvz7tM{*TWs)Q&8>oMX2`pSE%~g{^4LBL5+)9sQ$77%3l}!5j-Cr z0+)X`=%ce?7V{0x$Ds85TTty|^!I{(J{n5SG^qMs3RRxnQ2OP)Q0co2s(h}85&Q-` z6g~wN@32RL`B2z|c>$aTKMqI1UqH#(?9m`+7pU}Q;b^!Ls+`YCPqu>!cOu*Yw!)oY1*#k_fXe?3&Y!}m zm`D6LtXEHfO2-GG@^dp>0KWsbgS-7Cw4Z~a;vWwi;Av3ly96rU8==DA0Tu7#ZvJn0 zJmwKU4fT8?RJc`8`K~~<$4lJ&NvQnX<@P^@2V;H_s=l`WS&%aU?t*y^l$=xH2v~-@ z!gHY7;fJ8Y-vy6_Ps8ouo<9$IViZ(-3*gSM4Jse~Q0e|CRQWssm9Ia;W8ijAFjl}h z@G5u@RQTp6L;Grjil+?KUeASUU!Q_X_d`(S_!K-2ZuL~qcQc{-$9m`W@F>g=L$#}a zL8Wh>UxfOY43)n&D1CG>l>6tL-*x^Tj>UefUxs!#3GR(~F5C^az&&6e+#OyH_ko{v z-VY`J*Uo=K`8(iOp}kIm5$07;`F$5`hc~$W)=vlbF;MO3M0g}z5BG;R!!htXa9{W* zsQTOf*P%QoL6zqWsPZ`(PJ(B`y-@MJ0VRLe=Rt;oz7a13`D5TX z%(J1&eLYlp-U_#bUxzBsd!g#}WvKr97L?xE>UW`hcY{jDXm|vi0o88G@Id%!I0`=G zdB^HAmZ8kC;c>c2y{y`l1ZBvd;(9xA_!;Ba_4RK4{; zwV#XJe2tsG0OkK4=Mzx<`p;15-tMKqi7>*v5~|$JhDyhEa0_?`R64%~w}KBrrS~zY zcKn>XzYe#>yxGgaeMdL~^C3|Fj(~D+gi2SFo7X~>TQ5|8u7`^MPN?$x4jc`ih7;jd zuY`6q1!gg?fRgt<7{MFd{XV!o=3ha@{}Pnke?jTBon8(383h&Z5m5eSLCISNmELZ+ zB|Hai1J8%s!ONZ3!L2dh3U`2CaXttY-%p|B{~jto|Ab1{u73>u;$W!s%z(0A0Tr$t z9s6IrGyYG(eY$f6RD9h~`FKB+oU7pB@CLX!d=#ple+bo2 ze-3wqZ$Q=eR(}q9cL%8QZh&gfr$Whn7u*3}0+rrtp~~x9Q1N{SDt$kOJHuz8^7}fJ z`-sHo2tpNEq322_5xcs-Qg z2q^oJQ1MQL%GWHYey|oQe-}gP(~m%<|0_`K<6$>H2UTu=aqjw;(EcYt`JW3_j;BJ& zYk_L-B`CSqz+K_joR31ue-l;CzO@Io&5{`uzK=tQ4q4diypyd7osyz1k zYbdwFq3mZsg~fJ>Tx;pTgZR{|TzyZuM5E z&t04mlzkQ|U&q3|;XF7I=Ar8U8mRKP$$7W)ap!O0F1Wu5mH+Mk8O#U3%`i`Z(lDUp|k7Q!%fHO3$5e+%WnLRQ>(=-yz+@GsCPu90IMJ zpz6OHs$E|RRc<%I2KaR-f4_xF|8~QMnfwEx`qfyt4_pl8UWEI?^PtM(dZ_Zg6Dl1~ z!s+mjQ2q4CcMLN{4*?#!pa0ccQJRW`tE`on{_n9L?IldoCe?I`1!ymyGc-S_>OwV5m z_rQD=oDFYv)X#LNa$64P!1JK;^<8)j9KK`V45)BtL8a$*sCa+r_S@_<%;t&H z;c?h^L$%9W;dJ;zsC4hVbBO0esB*ai%KZ;e`95ryVYa_rfJ*lrP~rXvSHjV|hJ2k5 zPr&>=I34b?+c4{&OPn8qD$mE^47mC3LH=B*{GA79!f(UraLYZ0*>i=t@MO$aK$X{T zp!)r8dxr4MQ0?@C&Kuz#nD2Bx3L7y$508b1?lsKx-x}w7DE}XT>L;IuYOh~~YG+SF zwfi^WE^yDihuJ)%!8snPT#tdT!Bubxf==Ft_Qr(driNje$2TWEM-Iz;81n^_hS|Dt z-zmc~x8nbNC_QlG)X=X_g%RdFl>G%z<@N=rdVJ39_n#L0&xK0o$x!puE_e{^g9?8w zRDXQ{O20l2rT@1%KKMTnN}n`1Cqe0f=}>ZuQ2sB5(jPZK$^RNuKYt1;|65HTmN^hM zK)E+T>B}>q(s4D^xN?u%f6w^}RK4%q81lCaD*T6_^yOEe#`y=JMVeI}J)tpX=u9pz8BJsQUgXRC@mjsjkd{vqHHY3S~bBDxIf8 zrRNJ!n*6{=j;I3;r6R%A*TP zuU`$7??<5e;SMJbv*(UEsQz>}RKNTSl-?S3QjoV8&cghDD1VParDMzaf#ae2@o8{6 z{5VuQ`W2L%cPtoY^PDV{c|O#5xB*Hp-3d>GuR@jI39iFhlez~UWU>OcR-C7 zFT;Cjz!R5*cJlg)(4Qxq62|o$ymuJ;3-E_<{K{dOU%!KNt{Rqki-?|IJuGuR_RqEr z%k(3!ZSAnkneZ9d1y^LcQhEGB1^S?mp?d`fl z{D(u;ewc0fA}}3cDP3+q-QLY{bINmJOiqHE`iF&bx`sj zfXerCZhjN0JooGg{rNa3_g1L>aTZj#OQHOI-uW1m9{LlE;6c4%9ySvyf6Y+#MW}MP z3@Uw}fvVpJpwj;p}oF~H(*k1xw&mV?L*R@dcZiCVXk3!}1Pf-5% z*bvfl5LA5Qq00LtsPweM2%ZBa=Q=34{{@x)A3%kB5vn{k>kHxcfoiWuJ7+zJyxO4zK3iDzpy>uZw5Z((F&$CeF z^cGb3?avPOhdF0M^^Y~q^Wia=Z-$z8J_{A!j^~8@j)u~|jZop1Lb>-luW;Vtybr4W zo`lNBt5D^=?Yly`90p}R(ame&RLmE`3GgAP@NdFx;EwMO=6#{s;drR|#9Synuna1F z=Rnot74TVjGgP@;{GPyDp~m&cpz=HH+>qbNQ1#vcw}$;t@tg;h&yPUG_eCiEau1aM zhoSQE1XMcSfNBr>ofq`#O84j7{!ys> zJqH!v8&K_MSCo4MC%`A*5-5M!3qn6@glfO-Q0?M9ZoU>u|J(^B=P{`E^fKHL9{j$L zu8C0f*9hhBG^li)1Jw?$hid2dJAdQ$o4r4@yHQZ-o$1U$>DhNf$-Noo;DhjFIO@Vs zuKiHud=XUpy%Ng*7opPqC{#LLfU57UFADiQ0IEM71DT#@TA}jQ0p;&{sDANP=fhCt z^Awx{UxOOQ#$6oR$La6{%%6fPzn7rWvDGDEU3v&qyXb{#59dR*->YCFd>Bgphz|t! zgQ3b}0#rUuhRWYMI2FDhs=Yl3EG$nz|m0tj)#)J97-Q`L*@TtQ04g` zY=(P$FvwX4)t}CF^QBPr@hPbKd=#o2{s<*Mds%Rw4VC{QlpeeYs@^{ikB8rcO2=DJ z`P%LBAm<49Zp@wVBk(1te4Kwp(8t$8mD?>)>HY>(e|a7%o}E4v%!k0~m`{es!4E;D z`!T5X&0nF$xsg|f`dJ25eibOWS3srrn^67qmr(k4v#SCRb8=%s0C)7CjYv<-49+v6AJO(O1S39H{oy4OQwt>)!%%W>gR1YZ zLdE|ORKNQ*RC)a!O5Wi&hJ2k4RbH1n?}p0H3vd$L^{sZjmwT~PkN3{{R#LHXPImf-I|sC>_cN>2_d z{vuSm-UX%Cu5kO$y7_DF{(Y$QJp+}#e?Z9@{<)B!-J#?~Q2l%y9042MJRhq3RzbyA zf~uGEpwf8_l)NuNmE*lo>3JGT-s@2QxA=T$Py0fZ<21F-VfE@Zi1@+yP?|4{qP9*DwN(h;IAn)Gd_Dn{uA8Cqc`sDFk3;$YB~-co!QKB3)gDHCA+)oDoX10@ z^PN!TaTb)ntDws9R_C{&>fs5fdVCQoKYxSj--sP2C7{xaP~ljyB4bb-2zpf z--pu6zk@2LZEp|#^+2d{nhBMz5>)&bLbdykLFMyP(E1yczsI4<gBc?+sP9`L0QZVFU<%b?1;6{=tK!13^MC_Q#RR670)kA&NN zIm9y+9)r09s(e2QrBCmIs_)-ImCx%?<^GO4LwW28WuJvA&*PxlWeZfl>V@)uIh356 zpxVt>oWFp|&#8l}q z4N&DU8A@MvInRX}udarp;FqDw^%qd(_cy5Y@A|cnj>DkJd4_W#RDRzHRevR@arz>t za(M_U{XcQO1SN0tuLtf86@HwXXF{d#6u24ef@)7^K-J%wFbi*iN5h{(wbvcK5!@%h zV==eDnegNA1o#Y8`H#74SY{ZEf7kfUY`E7uXb(6p;C>j9cX9tq>^=&&!OYZw=X~fU z?)CdD_rHXXLH!QK{Q%sy!~8+aALIHk_b0o%{OC6$Wgf}>tAx|l_uSviH5*x< zmIJ?IupiE~3;t&WtK|Qqus;#M%b|YXf!%&D^8~+F{yXvaEqDQPei{40ZZUT8@8`IU z<@%IcOofl(_e8F*bH9k|IIipPGl@$D`d#oIF8%(6-A>s3oJ&8ZXqkV*7q~jz?kD)! zf%_F)OR>M6>uX$Ud;j8EPMY+45r3bBr{V8Vt_JScL;b$1xcU7d!2W+0yUA|;3zW`{ ze;;(2FJrMA_a8K->_`L`FExA|U zc^UH|T>8D6>qFT0!&bt~;?nON$W%G`{SE)`!c=zmgHmp7xT$adk!wr&!EJ%dAMO6J z&P>4WNZhV~g;e+mx6$rj{`8X$(C<(W|4#gW5IyWy~+LET$i~28?l>)SwHpVZ@RtA$6_zNJRiGV zx!!>+>3#h^!nFnF6S(5v-SG{iYbQVHKK*{k^$V`~9;N~A?{PonJP^Ajgq41Mfa`4T zm%+=prs8&%`+Ey+huizGdkboOIGKC>4#Pag{mFbG=2kcvZtwP2aK9&4{5y@X58!sY zyN`nZ#kC#w68mAUg_uv03@ko``3$bzu{#Co_XhV&Q8UXJgbME)TJ^f>-&peL%>4a(F+Ry#U z&#$<@ANLNfe{bGbhS4#WO=?)T#Uz3xZPi1fRSYXEL_;aq>@%6S;3FqwNXzl-Y(uKT&ZP1yA=@G#8Xe!nGQ=5jxgFpqNS z7va7;_P@nEo@;~4eFnD^xfWvnH}))fGv{E|?|aPkWdV z#1;QOg57W2eh=&$@c(fx{chs=0dCu1eh+TXa6blKiT$_TkNjQ5rTN|ETuofJ;cpN4 zSFY#qH{rhoy2J_~)e+b^i^)q)n0nW3~ z=mYLg=jy=x5Pt69ewDlJf%$RFoo@an=Ff2dU)Z&9|0LIAnE!%#G1t3@Yqk50aWeLQ z!e9LRI`_|F_zL_HZVz$kHy-nj+^%`D@ecgY=Gq1OBe@ph=T#i<<=Wak{R+E(aD5AZ5q=iI_&1;XdvVk6V7K4Q`Rib< zW4W2nWB01tyS1&Y{~N=lT+2LN&F-gwIgkAXa3=Ck$NuYZf6Q6#UzZ!^pK|?x`=hWw zzfOJ``x4jLTzlj15~%g?_wjcK{94L?4)=pFPe;x_Q}%evOvi08cGtc(ney?}V*Wh;|4!!U|_!@4L zxYw^3kU0+Xt=K>3<|fQbxennPiwyl{a=qK-{sQ|Sa^Hd5o^UDGTJAprui@&l5VSGw z@ALbEabLuxUlY8T>p|R0a4hol+btlo8|E{){~}iw_nqclw z4)yyQZYv41(*0Jrzm%(&OTQhsj=-&l>o~&ccP96v-T!3#eE_@faD9Sn2h8`mzedb2 zas89)G%o%2`7fAPx!tejP8uG??LBUH9(E67{xjw_n8&;woCE(0 zKEXAGFeh>Sj{Co2znbg)n177GypPKROs~|852MM-WE8r*MBK z_g@Oe%v#JBBV!A$G29>T_W$DkR_-_RaK||1{0e^e;d+Jpm0VwzCBGfr4^H;`fSbRH z#Sgf~A@jYsJj(qgxE;X#@$l2w|F;J!aZIwdL@TOc>p~eQM8HM(aqWsJ*<^^v0kXos9 zl#1rJxhGfdiArrr#A^$=e4$*K9DM74BAHJnqo&@jmO?oqL{FisQ0$>}a9Y^iTFMu~ zeRH9;2f+U9B=5@*1LNu$RjHgn$KU$J&=`2JYm8j6w-P1o-vIg;x z1f0`>Z)I_)fOQ^{fNiDD&e8^zZDm78PwU!3CCZfxQK?%=&2`Ej6>ZsVQyguja#ya0 zGRI-m$jYdwT<9#d<}70s&mit4EA(hw-^k9ssI^q=$#oPf(a6qx)Y9J*%414b!Afjo zWt!SiW4U#0$9l3%tLam;jg<->I{Tx1Z&$bKAQo?N&n)#KtXS%aXkz)Ow@4oH1a2!O z{zxjdGs{Eg3oX6vmK0S^tvqY5v-*pKu4D zq0l#=6jgaD<`X(9J)u)6f|lOab%ma&6U(U6dQmjGr___{RDq48_RPI9Mj_{Sw3Kr+ zRr4HIjPKx1mC|m$ zYkZBROxij-T6;#-c864Bh$V&`C{MLErbU7Zj(V&~)a9YGrm$;#s%|^Fa_t3)l_D8y z{b4nIH|Z~FWs~w!=_wE81w|ocLA!_*v+Ku(s3Og&lBiaoMeIRTpx)oA3Zy~@sBHrz zqZ*(tj*WZXWT};)wB9Ce*Dr75+4^jfu~-?@XKHECRW1t^waoj34VN7?s$tv*jRxueq-vTw&P-b^D0J1?MA4kiTsxz4 zV`oQuaYQ1eyTo{_!EQ=djv=5}m^PVK)wOc94e}dG<#nqXqK*m2OlpX_T1(}^%50&t zZPi)X&cfN*mcls=QFnK11I>oF?C71Aly=-*Ro z=?P_AUl&F5G^W%hI-4!@wRZOA3)#3Fr$`A-i)NLIqk5u3Uw4UVL$HhERTx=kbDf<@ zFq?45FP6zH2_-}CY^w$=ma>?0y`4RAyp-b1&O(j>A=ne8r6-nA6Lzq87Zw>mv)TUsFl5%2RTM4hEf*sOsP0_3!i2{>N#})tBeO>y!$8ldqi|vFRU;u3XUb}c z2Cdp(P+g-c(Xw1;FOG>hOycDE{|(8};hI7gig`=?$o%jO5oyk1KiU*OO-{`@o25r& znRM8cEqLL71Vni%Gj^zG%|l)Xz-D0J(=b=+?TMyODNc(c ztVC0oqZFpeZ~R+Yq2~l!DfwKOH5JMprX^P?WEF8VMYp<}7As-pyUz*g7oH6+>v4x79J(tj!FvR{z#Y zEV*$~%`r3%9|Js%9bMg2Tr`DBR56A;Huo1x#r`g>6R6ElzgfI_7+3LCT_4+{<68UM znZ#EMIGR~5sDu`vTsEkj-0z_3Fp5sibtjcQm^#d63HWxpa4ajx)*hB2uGp(lc4z`P zF_pTY>*MYdnfoCV<6*ci;8AZE@TdU+^My{!-VmX=B~2nQbU+9-UHIXTS}DzQLL{ar0O%t?KJE6o&t=gBVI+j{ar<;XV97cjfi+CcM5k@4NKHhn_r8RXO z8#F4j#-y$_gS1g(Y@(EwDk{eEss|4?NT_(ehn}h_^i<1VhB$9karA++!s6WuE?&#H zM^AjtQxZ=elJH6iEtWXLbYqBFMGN7j#sAX*-=l9OI6BfaSz2NFw6;#wB^t{^=Lv0^ zK$F$<#35*+w(5LAQveN>nuT-}J$QlO8`n#@;vlN2jbOP-T@zQi4c5$)$&tsomcVNZ zo!v<}$2ZlgVo9e>CEu#>aO+}!H9V<<8k){@E$okmp@w;t`f->KXV($oI=p3>HPrkz z8rEa&tdm*EAE+u$`#lu}pWVOD#NXmo;eBB9d$f zt{?v`1O=81>urN;jOS`S;^+m^+BGG@=B$*n?A>Qyh3#=;Y1Z;Z1MVe`9 zvznzaNf;TDxhxEYaXN$T$b-jC>YE(KAJW3sEZNc)K*~XlqiVB=Eg=Tjk@*H|`O;Y- zl*Qt~5>E=N%((sH!g_4TvMs@D1t;knnO6W?o`t}pmloF*OB>Ys8Ohj`>S1TLrI*>$ zdMzLk)7dwMFxh!D0`?ev!!z<<+}o=zjI;xHLMuE@$Sz012CXYW+;oo*nrHmy*|wG}nTK zEGr7;A~nC6rSATytCa6(>nP-p$hF$Msi%Vhq$k(aZNt9iT_MR5csc@0Z02O+oxHjk zlWp|0N@|@4G(ed9C9+6JmDX(B~LDfyPNcCFX0;aN) zAzTS-Pvlt+21rcFt5$0~^*c09u=+B;IBC5_?E}!?YknzFu>d{Rajz}?sZ^S7XiDS- z@3kcsG1l2*p-`jYsZl65cDzm((O%s*P zG_EUGUPrE(K;$ADB9)T4aZ17nIY8okkE&+lQ~I)-rJyM$Nik(x$gL|B2MDl2-n2w* zKtfzqx<_#g`U}$3h(e;{JpiAsR`clsvzn0PJ1VWL>;`R^sk&!VBwH(0`CE|^U`1D_ z4PpVsep@-RcUR8Fv+(4px&(C~$cA(_h1tBA5=Mb!*C|!;C5A_Oy!2@Sy~PGq?AIR5 zN|>!8cuH$dRT)W{HM23n;!XbD3#*|ZteOV46Uk9h?(Mm5ElN70DU8T}*)b_4PcK5aSQzI5&?|bx zKTw_q3TdI*ryohwCgLoX{cCf@c6yAYoGtZvdT+&ro)b;!D7KcTh1inf8}vr1HTYI) z2gF+!n=;RWx=^XcxV|g*KaX$zg2sku*@8w>n>86`;iB}WG8z=Q7R*XQH344U*^m(H z!e>oA`|z`~=UA0*N+Ha&vW!TLB}56LnZ_0A!viWaC9qlnp03WW9F0=jk^jTkRrX53 ze;hLz|38m;6Y@-5tYrPQ%3B`$N<~Iq)r47l3yiJL*_47`jttFIayDbH4)XaD^AinM zg+31PUj`a-X&o#?Pgp_RlLVKv>EpEh+$v9Mv<$_CHKDjt-`Q&qM+S=!_;E)TB= zRBxV&kVYsceLRdQA!eTdlTr6tT^68a`a27;z;c)~4Jy!wgn<(5S-^lHhJL@wPixHL&hX^UO%=%|E&&{%>*u$^VJ!fgptVBLi2>Gm~gk4 zxppGVPSgx4O2yMWA+EA8I}O<#P&Q4f`BZt(0EWn9YVuYuMYFq26=QRW>O`(aR5on# zRBPvLQd2X5t4d;qx2dTKb1t93RV7$yGsW9fF+4Jhcd*!OX9do9$FV9oT@@Mr3<}Hq$Zh1S)91o6lqbS{5;d~Uc|r+JMT#IY1`J=Yc~1gH7#*w zhuk4|3DtcKb|HMH9IeT8HMPYdK|}7}4koC!5okr|z6QW@5U1XD1uD^@wha;QPjK3% zw_DF|3bv^=V1H$5vV{CcqB&aR1|7??>K5S~O=-RHj9{>N& zf_KQL2HtA^|E7dchVjmum%sol>eK^bYs=m2*Z7>&wgG*nl|f35=jmZ9mR&nP%_&i_ zPPScIwitp_{l;3GLTh4}4w?$B`I!y}^MJsPV9U(*U|F*f1#_{|?cEa9&A}WtNz>Be zgw*KgsAA`8IK7>clEh>~g~Y9NEs|Z8ZNPPKUI#VBK` z;5-wtEu;8BWC&ah9^03bwA)5aU!k=(ocQ%5*;e7KI$`l1RGg*3g(*d8Db12nDfMc5 zFa4XRCq!KxeUZD_WXjH7=Q}Dcx?e?7k$|>d$|R{-lM^RHMIz^#ETvPy7O1`8!B~p8 zcFR?=nVuvm78lfTYD1Sc7{!f&CL|eiEl-qK-F{juV>Cg^xec0nc8y`Lp+9O~(m12p zTC>Dil3kY0uxPGWCo1U>^))WDD^9Dj(Umbu(h|#7IP#np7bj^jG4ToMv^dEsOP1|! zC#5r>#8aE!I)SD&bzR05r&E-YmQGQeg148pUee+jS}IvpX>T)^>yUs!W@Up-#5}C=c4}R+I0vhPym>!alI|5+ z_rwZJp(JX7MBzEn4B7CWPi5-DMN7hoi5{NRM>2&Mm6YFf07;pxhjyHj?Z_3Uwsf?o zN=dhk;ZdR-f*Dus#CW(kOCdTpl)OplbaVbh^j3B=OunRDzxZBv3YhqXSJtUIzZ zt@sOF>=<_zR!(hRa?1SKt2||l0c=sQstvCBBUtz7;U6QlcYhN|k-gn-2~}pI?ct*j zj0HxXR*r}8ykUg@Eq3r?giiJFIvYpWINl)6THd&L&QJvtq|9RHYvU37d8FAo zy+54yafdJA^u=(Ul=4@I?R_C0oZ4~yxWm`WBsH`9Smx+FK*`<#CL5D=Zfp)?gB?h! z-s|v`op*{^FDKR2kg0#95Y&FSA41TU{qkiAkPwYXhbOuLR2P+Csle{d})7L@# z1TPE13uS}2R}*dRY(cKQqgCEAkzP0G=<4m_y{|;`_zUHD2y%Ikwb0e;jWJnzdQqz- zHW7YCuStyGVTxn4Q+m8b72bNX^L>M!?i)nJe-PBNZ1wH&`XR$6W+fqgdRcu*<6KXz zOw_z@w#G}=YQcH6kSO;Vt88D~*7ziXh0RBxq^h=Y?o$jcxc)t^dA0kp@i|Bj*WBMV zwpyTOQjU~~{}n+sZ-BW(+aVci%T8WNtiE3!GUo*|gkSuiq^ilI;~#7O!89e*>pzLN32sKy`GGEDGuGYv19FMZ~Q3+b*|d>8WN=)a_Q`F1eSDYIc>wIucxbyOYEVFMb#6{Yi?Ak zt3o)Kk3J5kV%$%dzt(yyFv_W%R=3#4DU|VYueETc#5Hqm5PEG0!gymP6$j7=Os}R$ zb6Wim+K9aYn{L^d22e|;h1w}0You|AAvM8}A$&5VFKN`4_`nd_*3-ua;^xk)!9G{f z)P|{4b;4r9A_co7mn=!^v`19)lj1nS)S{YEo!5G8LdazuWrOmmvY)srTg-)y9_x83Yg^ZuEZ^n?0$&t#%1821seL zo2tI>*2`*=r5LkqChaR*HH}`S&a7>K;Jv&m=%ku5tZON@?y`PT^%dIoe;^}i^@Nld z>-kJ@o0+w?NAuU|6?xj~e<)F%H~DRXlXpbdYFtg__o0;L46wrf^rb)(G(2=%AO*ZrSkYUu0RUgOGMO z*I#0>?6uVdXH+Tj-5zUX9J*rESNcOqn)gzTcXk}~>JH;cxr4X;(aCmt-F#MRe1<6L zG;!mm8FNk}8r|A9mR)z=&}a$S>8%M?(ncn44B1mEC51y^dbwKj0Zv;{qPFYP+FQ2Q zOT6PG4;3sS>uV&k*G0X>uY=Z{%g*x1);37uI4|8 zvJytfl`7zDQl@r>kB(ul(-x^rokHgsh__ms=GIAyw@s~^QfA&G(i9Ks!{BHs+)bhn{^9kcJn&&Y-8B z#r6gQ=v!dg5z!k#OsQFVPZ^n?HU%S}9r5?K!YW4-?%sI9EfuKr1!_a3vE0rpGuqo= zmp5z@VX3bs>GZK3vkskdkS}a?aYk5MvF&`gpr|SKOn-?a7bZ2deJg>~#_|y=4eOoE zjyX-IxoZ-t<^fm;nv0qWJ)G-gzFo@YZ8p51l<(#Fn8J1Ic~H(@o3VoCGb-UVm44=% zxnc!{)TPG480n4KcPI%zYx!!PPt0qYvyeAHbg+Qoi|8d9@yDWTh*@?v=?8Z9*xwWP009 z?X*R?7B-%(ccokW?D=!zM;c1vP=T$v`!gbYzD^&QrdnfrQrn(E1z5#|l-R?9l@f{1 zRjB_Sj+1J7OK$ZFrn-WMm1^WEBh&lzhs-3v_IShFP*$xIXX!`3(w1LXDB5O|%dW`m(1q*>=o3 zqb%pEIJL!xLO5l`W;mZ;m=|xStC{#A3zro48#R6FgZN0D7eO4yMeIvkUXv9*bx&(xwu%;{>T9h+@TNdaZicU|{H8Li@Mal2q1)PJaoqK5iZ6i;px^ zgQpW7yT;#ctCx^^WRp6qkd_cH72*akpaAS6BWT-fvT>}W#3D=&$8W(VKGLI-lEje} z-k+y5XQ@2+;6t45kSiUBRyT=l<4KalB+ubB2x){5O~EQw=lgipSNotXvM*>#TzV9Y zMW!CdWjCy(*L0V=+U8W436{!AV0e+#B(9vQNkYR^rJ`YK&fb-8nA+Xjq9tvmVJg#( zcG0E}4O83r(5sA$jtx^e4ZR9+L;T{xt52jo5E>tjXT~!{jd0=NS}x+7ag2!?uY9|Z zg&S>^Pq^w6m5emGsQHxU#XPpGIboEE!r4!bome+w&|)M^D%^&?cxteOa`OiR8uB#R z8(>8-HJ+WFVVUFbf<5z|dRC>svi@uazICir`p;oB39sGxvv7N1BpU5=0}Y(oJ4RCJ z>}>vQUQMLv%ej0<-_)~?Is3?QXCFBU5&nydi`fJCaPn_ba+GqlSf5()H+D3rHO*h(;}Ubm(BQO}PYG!lrJM3) zxT$<(OpFg=BSv~9v6UPhos%#0hyt5_)zLjG$-4jIdZA}AwdLzcWuYd;qYfntV0}ACz zAFHvIe>fv6y%&TAg(P8Sr#UY7(jiQ!DQF_$QKmoKkR%PkwiQ2hW$4B6&c}RxjJd$; z3Soyq71XqJe%8)%>U(q2Q=GQcrlRzlUh2!nI=n7}yo+UP*(3(N*%rQHQB^z>!#Kq9 zDpoh8hQ5Y;qHL-;(@ROQURCaV{iQVy&v~O`8loe|N%0&xNogAL<&3&HNzid61yK+1 z1AJ5bEM924&Hm9n#X5NB(F}_+;kygPb~JB8b3;o*XTyw!`RBxHH_5x7Ye3<%wB!g} zk$p@}e24y3qN&l*eC2|Zq|MwO6K>BUhI23;Imyiy+f=rPWmbNMJXKO{#)E0NAyiwn zA_lblC^VrVbeo+Bx5uC9Ic1!N@ah9f$M)}1a|zxk9;C5{RHPeubyb)&b*4~!uEK^^ zl|vX9>&v%Uorm4gWWa2x*!kg^iZ@?>$j%Sf@s$?dAzWWb-b}QqN7yl88dY{jv)xFY zE}qC#VlUjSt<7n0ttp`F;KxmskI>C*L#{erYahqHexI|U!g>`m z(Ty}*+cWd-ZqNV2u#$AOqSB2vDDVO-F9op0s$a8i;u>~W2E=}CPWg_dGCjD;PWox1 z{McI^yuF^twg}?mnTkh!rrKt*i%gB+kZTFY?m~*{JHOS4BJi{ET7~hxbDRS{Do_lDX6c?T? z4ScID3Qv2q@Y0XvHxXBpj8#p!Q`YjJ#M&zfVc=WbIBVVt3vZLNU{s8jsOs`A9PX;d z<>O@apnH0Z435c?$NH62ZR&t~ud2m1V$+?urYk3|aqgA$6^w5@V+|=z{;%oGYbAQX z>HS#rU~|4@3K6fn6QMOBh8**T81(cFlz1)?fBfq0)+RQI=qpT}Qb^v{Vg3Xs1{iz-Qd6#Vs|SBAZzJC+8&DBLEvW{NJd{Y7Mf|Ux zsg)+LS*KHAgD2ttQvUywXyfu3WR`Z9(ovYy$~br?Dsxod@`-&MO%f>m+H>f}VI`o9 z#DQjNTPHXY4?j&;3$#zYc2Q#a>rIuAi~MhkFy1mt)UaFi8I{9Jhe~VM1_*x{fZjTF z3jf6s$Adz(7u#`#svs%rlq~J+g%Ky3!tgO|PIgHPA^) z;?sK}C)JclMaFI+L)wz7Ef1?73ZIp1mwieq9-}2jGbH{v3oa%5i!`=yPEAF-Ikd!D zy<}T`p|Y#7*WYOZQY}!1($Ko%Hp1j(&}1kLA)Z*X>w(>1YUK=yB0S0uQIB5OQYqPK zgm8+eP|n*}5VqM#3SSu08yP-J;{265fDW+O4n#@&vW$K`wuz!~z@8mbxwfZUzb6yx zk(B242c4nT^c5}@eO`~qXw&sdFb+T1KwPi>H%Sj^?{vP}Au}8v9#c#9z?T*jp4Jci zBU0%J+R$CP$oJ+keJesY8l`$!B2Gi!o**H=l#e`hRXe_e^E z#k>M+<1dpjOghc0ebY*-W@m0OB6BeNT0Hz9KN*fqPL9U5v?YJhff{WsSo4mD+~B9T z$R~r@EMkvltp5B5#}9^Q^l+L>|FOe6vXzqye3D7iS*fCYu+}qd-PxBM_%tBjj|;}6}=8- zh69;&7tOADcFrk5bDf#fUq!J#7_@sl0}h#+9Hl(CDzEo3yId~m0EQx(!(YTAE8d;M zE}1`MGxr640?fCKE0cpQkI*}KD+(Q8dN2H)9TFPm=FveTD+ig!=J04tW|c!c8E#9x zdZyDIX)zW~AJL-Ycp_U^1cz-Eubj#D{+&uypS!Of^hhrWOb(rz((+SO)peiOPFfn? zZ23piNbmT!H7bbvkWD6vCdkRE-8H_{)* zpmsKtX>zG((i#U17FnB}9I+FOK_9e~+F{+IH~zKOu=nZ``C(G+&t+($ZPp6Bv^|SS zyG>fB`psmH9%)Y^ga{UuLcxyT>xfS*${%gTHJg#5&owVkEv z7QVY13w6y%m+3F?_eE472+$X?+KcEczAT@-ZJ(;5sz3h#Kvg|h_>iH{!Go@dpEia= zFCJcnSn6$G8*jXlv79-f1v#pzZ~b~HTOHOF4XuIAb&W=YB{5y2R>RblDwHR9{EZ?q zhQZ>JW73eqhu;#TXDeExzlZ0Ikv(aZk~fHo{-#4=wOVM^F8=&as5*aO>#8RCHc+hw zs#*t~;=WUAfA+#TmR_Cdtg4d4RAK*}T!lXwp%Ywma?{gm_0i8>g4l~(p-$s+PD1zk zH?nOzL;a6W408@v`KDECJD%4p6}?_mle*B~1j{6!)~;^fcaOoA%~C4Gw({(&uVH6j zPCP^Gv~;p#5Py%GeiUx=gL~jx-SHthJXF1^VI`*V%qR5=VRL*Gs+IGCjG$BKO8#C2 zB^ZyP(=tL<}A6*d>dLdLjNS#Ev49VV%($Ie~8tW~O+p5m#T;-6W>TP2}61FKa*y)AL63Pvu)~o9wy5V>-mJpdPl_^_+A`;hER{pd|qU) zetHV3j>>_>Z-F$)Vp_SLw?=x|kJ?5T{V^0v zkg6u_K#dG)Z*^OZoT;dN5v@}*&-n9uK~m_#K8;R_gS_gk1aw&Zch2G|w;y!klpfhv zU>x$jlzsKD$LKGiq^C_aDO3=ZJ>4iiluw?j;^d}WhMe+8IXl{W`TJ*@SSVAOnW@hc zjZ7xR`U|mXmw41bPOXDhk3$EOt7{ANX{;^kg{OR_bc*}3m0m8g-3xEARvEVF8{)hQ z2Y&lGw!gL~8b5B__-IbKz^cF0*2CCPh~{XbZUxZ5iyW;gDaK1J7UD(`ETl19DWnQq zUgc8h=}osFKc%0Zx~TK0#rT_r;Yl~k+Mo?$+jtMoZ5Pj5HhXd6HTD~9W3RF8DNWJn z<}gI23T8}ZmX7)>jnxeTZLwM=NYP;KakC%78O50jt>gG;2cCu0C{7m2dX3Tkgt3+x z{+^<>7+*wNqG%E}yGf?snsQcs$2y0(TlJ%ZR8si!V>aIo=akdO=4i~eK99R%T4z|$ za7tJ4Qvf+@;UdJ1enZ086%xLuNWDDCeIwmtaOof~M@BrOmw!H@#-h$8A`iymO zGS1Fkv1sAqC1JhEDB`n^JdSUt)kPT zO8bT!Q<4q#tqXJU>~rFnzXYFhAK5!11nn(W=i^~kNtQI9vH9_!-cpmEp*?BKsGaht zljVQ6r@GnL%rrfi^v&d#;n3o<>tMe_i(L8OG>8&tZ%}@4Eam159dW`y={UyH%gZPeL zHI3Dk%8oXXN35^5?T~piDm$`ulp+hZw$fJH8IjT7o>GQ}Q1Jtu(;9xDYg)md#H$U= z$wIqkM|62K+IBX^G@v|2^Bla?%I%71bl9ONU|0~1rd_t{wplN7sI2XD<~+TV)K1nZAyvGnlugVh|0nBI~f6P2RTsZ|N# zyQ9$q7aD9v`vg!0W)p92`ZDwFZza%|E3CuAcjDp`XSU@=Fn_7AtT!zu+aJKK+VvI( zv8|M(N8Rg!@C}a0{=&3r-(;<@Al6x7NuGX}MXhgvj?s~m_4;m+HU`pfR`KkKA%I6D z{zqqhGLX^Cwl;@N3;FEYXua_2A-W?5zy&v}kcGr@I{F)Ja*i zI2O`f4l)LKSYa8X>98_i-PgwUO1s9XbXt-~EU5z=J(-@!I_D*g%_lW4S-f;6Wzv(Y ztgCZgKCfxQ_#~(N8CM?j4<=~!d=?=yO&e(9&*&E~!A4}7v^O^3w=Db#=)~T>9Tc0E zgs-RsV^yQN^L*{w@c`Z)k27Q0cm$gucu;}1T&KzDkG&}dwLb0&Ju{kTS&vn_s1{d- zc|vu8fCqauLa9qWEnz3JefJJ+iG#*Y^(hp!{?eFfI_8Z$M)il*!JD1%lB3p%+Q7EJ z;hc$0qQiEN+0qpm>*9A`JQ+-L?2L@PzoAG?Zm~cb*t0HH-@D;SRgXP7&{}0fnXikn z?Bg3c_Bto?CqKu-Mi)Dd3haOIC``6|$KxRf^2}1BBh+>eu+CcFO2t$Rc2^5cLaf~)zS_PA~ zjYL@=E+iq$`xV^3M5(#u5K>rWFukpgZ>k+Nwah|&kiphB&HZSwu4HdXZL$w%n^yB| z8rgZCZx^%=#zdJW!p44B7*UBn-?fx5hDh16r^v-qdw-Ow@(T}lXi_ESXEmleM}6YW zPW)28JhbZbmZ50XKWc)e{purc%=+w$uwjllHuhZIOR?A&q0Hx@81=2p!@Zw6&_>$&tDf=lzhrDo^@nutZd(w2e+}UxgBNb}NuBkQC^mV-NH~3Vdna?-cEHAZXUS0Ku8Mopb z%%4Ahv01q$_su1=sjsrxgkpcs1|_vVI!6ngL~S4K#{0M7vk~_G{DFkzlN@<{4Y3e4 zc6Vo*S+glGXin1uwg63)B=*W$thQ>l?|1@Gbx0lx@F&!Ja(&fD5ph#M4tw*NC3M!R z+R@hla=gP6cCpdhlQY@wEqSUmO`>;bRxl>HDcFbV(l6#hfT1>D7_R zn@+yZ%VL}<34gYSLO}1QAKIHtVwe7~@0if6*f7$crL@7LMStu|pX1=`u*?QnEXT^) z)KhMRe|5!nd9CWS+OM!0=K*Qh9hA8E<1F!8q1x?R!XNY0=-bX)WYT;*0wi<3=XIQ& zQt9F)Y-Z3*`}~iEB2|ZF!iy=)1^MQ4scnQxa&FU7e~r2`TGZRZvjmPTwCW(K9Rf~8 zrQKsD(|nke<1qcSsfbNBhNT|;Ve}=`0%J6Kzn@(z4xV&jHvu9fg>ukl+qIG_n40{O((i6Cj@Fs(V zS9d;m5k2KO&!3~$M*+ey+IVFhUR4=v*C8EIZP@CLhd)JB^W}*`P1@|yc2a}YgBUiE zNy|2Mmh7vB_X^{7OngB%=uW*#_~F_VZAss8;Z&5I{ejMj_ccl8EhH7 z;>`f<{S9W%M+*nDw)w1d1T#mnKkgW2k4uZGr`#*Tfj@Pb5P8ZiOvJ(((pIV}mI3ar z8&$`3?wY`Pp7e27Jn(n6Y~rP_K5%cJnX(2X3qs4A1l9Uev)Gu2j$$k$En?+>lTE9l zmDyEi<-5AiV7b_L4j+VRMRZeXQKh+eJ)b$M{nAkUbtzwRg#Ak;#XgZ&P3p=dOGwZY z9FoeXjfU{xc^TS+XC_*SQnNT$ZOktZbAl)HpO}V<-i5!7b1LpZeDYl*FOtMD9=+1F z%V?Ia6^(;ycyz8Xx>q@=Z>hIlziqy1#!$@ljY3a=%*O;U4fc8l}b7hW8<4D!6py3X&dHe$vMNsYZ&#yBrF;gUK1Q;3lVLz*?h#` z9ZWw=;i;`&Q)gftTaDE}t)+OAzk6!YqL*x@CiR?AK{Ii%*PglxIZcT9pjmigqB+N! zzEPAYbAvoD9fgl#+vNGhg6!56=3uwXLRWtj_iJsez@Ah}Afg@IjnyQV@cK!&|ivN9|)* z`Xi8S%;j|OCa14@*=e(keGSW}M{#BFjUif%K6$Ta3uRX3>nT3{_1!v;`Xj@|LOb&q zJkUwPil#bi)6mDTov4%J!fAFXjCtO~6s&ssFkTF()J=s2SKsKi%1Bx3TqDOnReHlMRil>F1 z63zZ;tlG296XE3gB)dNzApc55RCJG_}N zQH=YA+=A8W+GR%&YMxg!WUlTht@drb)ly@XZvGUPouYJGOQuU=_PyG_hnMS7gJ&<5 zm0G9%yaazj0==R4m(9n(5Ue+2k@Y@w6uwl9MXMm}T%#0N!85j6amO3-wdsowN`*Yt z`m1O!#kE?plVS;u&)=EYWX z)mAZR^9g=7r2z$>;gP+?xbb3P>t(RY>dCcx`G-fJm{A+n7m}u0^^*lxC34E z89g1I80ccVVdmts85B|7IIP^7_OhXANN*_Iu)iL>(fq83_+S#I*S0>l;V+|l9Ku7G z7~n&HVF!h)!TR-+7o#nCo*Y+ zZ+*I52UVQ9jUBZW$a^!LoOCQ^?1g4K&r&~pnoB(JNR$<)%`gUzS>|rTPTZ!$(tssi zG_o}lTiRsUru2zbtOqo{7y2?`nxXYYC{T-3$B4qpFW=E-XI^{UqYb*M5%$JQI#9## znfd~xEmSnkh~_mdTDpWl@kBL|7_TLRTXIxH3Adwao{xIfXp-ccR?HOH-W4Ho#`*Yt z3;yy!_z)|NGyWKewX)cQMCe3L;xQFC%%BrlKA}!|h>MrQ-?2RH7t`;;PF99T6q;(q zB%P^VsZob_znH(r6&!4eon3BG=aTY992o}Z-ncpG9(CeP(@kNw-Td*gO;>VL^=5x< zs2aV$l46Y@Ov>Z8RFb~f*xZyEXsMN5#@{qbQmJ#ywldMvkUBjzA`{w6olbMxct-BV znxkDP^rWuTlI?kTybKKGi*W5;d*|ZbCTlc{Nc#}sZ5s14h&{dzRB%6lRzJ05KSn1` z@?%HXIapOSx#M*Mw%+ZF)Ov29X37SMy)tQUyt2bDnbp~Qttoye%kYISQ*Bxlr23xh z(XD?n69Q_74t{V+F(4RN}(UbNoMpFhJVhN@^YR{On83uv5`;IHby zYVrRm?p&9nNRoV?Ut3R+!w$Q!L#esU^z>mQY(#TuZG*s&`erhWElDL&=sHy;0o&c* z_8ImGreC37fEPQzzq?0dWL8RunLT#O3{;gF;c@eD_wZX7AM2EdPDpE_rz;U?3B6;g zbiIt8roJ?qp7Ln}GnLEWOk_)ny((giqEzLj5HYy=W)`a@?Ten*S5GUKEzOWq=TwlLBI6mG#1zv;#=AtGN z1tpH!<)cKpO)XQ-2Th%Bg+8|41Dkfi3|J4kGyb5T3|A7vG(We%5TQ7!quI)9^KD!x zjvL{# zTSALAR7_w|tR>aiu5W|!_a=7rybbZ8fafPP=d8u!Kw(hD$TPajvJ?JR+d^pK)~!I& z&ZtFY+%oTeVm z*G|^LwKTo{;QsygZ_Tg{c~bF;)6%XN)Qhw6bnKa=^5cykA;vpRv3?DC*e^yxG6!dl z3#_QdkRL{Z9Wg&o(JDHZ-#VwZ8YbZ97m3~`*vZwYNjoSKBP+B;%jJ5_aAeE(?2JZ@ zKB1`T=YiMv#a_Ec(tJ2FUFfl}M~Z#6B%&0|4qj_%rrwO$h!V zXJ8}uYa*4HeqLYDR25QDsf=3LSi5zLn%Q+xWck+Z))UQ7OhI(MDQzJTg$lq0OSGaT zNIP7l-DXs;0q{4BePa+qHE=f-ljDRP-<^G=nkGx-AEVu>_)bXFyYhF^;U;uXMH@1d zwX~+JV3tC9OC_M*sghhuTR+rVeeL%3o`-ij54#-*a@ZbOu@iqlbTM1eohg`dSq$z-d`HRamKd(5j(+6Hp(GST*ptzJ$d1x_{ zI-V&Xn) zSCNu;1~>maxOJ<(b?5G%zWBq<|8wUi1qb93gol*n{y4aGb8z#^`qrQC-um(nH>tUx zu!_M3Zdy~eyE2z-pe?~Vj>9coAwZ&DI+>mP_2B(fuL-|BU7U{YQO)l+9Bhn+IFziv zm3!K2GB=(5^$<@Gb8@?nkN#pTfm6Wp z>1=oKWm8VwLc23~7#VNx)?X^+Y_+hkZed^}{F5dhezhbB3%!pwuTEbo9(7^inIE4y zw-Th`i!xXJ;xZYQd+l%DAMJhkyAl|h@80bAU?0qqDE+ds985!t96tE)_oF?0i0sib zyVghd^B%RH0C8QeiGsY2N1nB?$|-bmx-VvBg}ub?hu?CWuTRfTiRdhD$)lMU!yPsb zhhtWZ5DQd`3-z;;!9J3M|5zUxOfsc#zz+9^!SD=WW5<#?sKPfoPaN+-X2_L=@1q8a z-3c#=xp&sUqwxV;S>BU96}m6I#)sby-k{dQ+6GtJLugPNyJS_NTjRZ<3dxSB50YdE zBr=~YSjHQ%C6a!#iHKeG0iAsK6;WOnCxzR`n54(AKm5uFIG#agWQ!KuCDel?XJD!B z2{%?I`?M-;qh2=QunzrnHr=0$F@X=ym@RL~y77%RIb;EY;p_2?les2zYX}ygxzJ4J zj@e9C3*Q!yc1H)(55MhOvE0piT(n?l`@rm=(|wVjU9yq7X1%_6q=e`nD@4dflL1_= zF0<5BUZu@AyMP0j9bI!a-A{MYF|S%Rn*$A!4MB`5=`IXQv4lvBZ3+v09=a0}l7LmU znFK+!Z+QFl=pFmhbNlyAyp~?W`Wj89yUc$04R*l-95L@lD6*yF^gT!Xk1hhROTGR5 zbydADJt!Kc{i%wk743AoIrlSXUhc^`3!umaGkvWPXn%=%=aYRzF!Z>Bantwglw5A1%ipzBUWEHJ18 zuUr%70a4Zw&WM;pTFh2fc8%@YHW`cekl6nBw&Dy%9$$&Z$GY4=xd<_V5JSMqwS{;H zPplTRmfRS$Uz%0aGPE(JQz;lqH1?6gp8z*a!^he`kBkWwF6cNTPvk*LKEK1bQ(@yg z3Rx|Lzs9(HGuEa%WE+r+f9fABfocY|^@Y z;i)!5=iwu9ySn}l>{lf9i_hVQ-`k~QFMlEl{Lh1}(Jw?noowrFGpPaIWdBEpOrP-^M}SH>b?!8=wAKMQu!cfv2|gMS=1V*5~+&< zAsJhDRw!eCTdkoh5v%74em!DNM zEP=~DU?Lw$&(;I(DB0N|yRMttya@k;Y3vKp9u`gS_K~QRK*t{Ws=!%CM=&0WI~3gE zVP5r7bT)5C|fV_U(}%*pYJ~W{osvK?CdfX zMcIfFZ}n2g1w$Ps2F|Ncaw3Fq0)wwm`FM}9kKy8axs{}wk(fFSS>!oURR?y#FC95R z!!y~Rz2Cc6KZ1p!y+o;{X}`iN6(ktf>)F-y1BvHMTS)0%i7a7YvL>49JBU0X!rRm< zzPJRygmW9u=;-xm#+*f)*wL)bz3uI$z4rs|`lV{|`A+g47m8zNRU}T$N|B0nDweMY*j;cw+2Rwi5AF=xsw<%yYs zP-$<6hjBs|uO$&B(1pw6r8z)k)U!k3%AMOW(`;8|=%%%N%^9h&XF?8ypr(*nhRXib zMh&R0H?6am5gzE*+sW|60od(@Fq%uVh?ogoKH!=`ww`UI=z(KB=X>Of{ZJi_pq;K1 z>`tgp!b~*rHXNa$)J9>AGr`6Z z-+Yn*B!(B`>tTbbZcNQnsy4~(3i<-Fqsc*7%Wnr#`0opcK>_PWDju-bfd$)Y@j2^A zPd7?#9M!*Vp+)+!{^9S)d`b!_)eI43kcfSzR9OQZE0kwm;)lOCe{QebUsdv2qAwp^ zn&QgM)FJ9E=)HD*SD_b+@$Toc<(F?~C&>M9xxXTW1{3stOHMTR&LhXneR{u- zNHoBEu=TkNi0FgvE{IucQU7Mv*dD#~B>)@(peqSjXPo#+_=4fP5Rphff#sXQ*G>8D z!|^)-SbMuKpcv2`V{{sEjrc+Z0Kq0<12w8q=0PID0r&P*)Q4Bt-8u7jJKP_c9t#0D zI7r$`x+OLta48P-BXE`nqP_oWCNptq$KZYhMi@VlQjD(Ntgrn$%IV?3zhCE9tw*iYo!ws?xWXDex8>#Gxrpu_nT^vYJ+IfW&hSAlEh(N0O`0c< zmI77wM#S=zuY73dM)IwDJ&gBIaP^)%2m9n|6uO06* z+0qgm4By~oh(|2eK2C#7FvSmu%m(pvSqe!SLf>4+#}6j#r{>l9s_2njG5kG%-YQ2} z>$Ab8m&zimySIoUf?=Z`KdQgHi3GWgz5w&l;A?ecbkI5TC(;CwdHsfoJW8-5bYSWg8?#gIBvSPBX zeK_dov)E;Kz>Hzdm<~bV`mSOA4ZcwQBqjss1olKuJTAW3Sys{Zl zk#uH?sgo$6Wq3i~{PK_9-fax=;@6#iuE9?|_rqk%KNF269 zqVq*<^yhY-P@neb6QU!)dNp}%VDKwn&S{ntg)3>ew()J!93sw3BVq(YGZstQg_t3U z-EPu9vfXm{#nY)t55 zr}3h?oj1s@b%5VP4~VC1Tp@G2V;Z<|P<7yO>VPxQE|ABfU2PqTRpmNZP1mWyB^{Xs z%xLh4XosUN9Gi^uyK^?$_nC)=Tm8O?uTy>NkM}o?4gRKK0cWU=NI1b~VtY8*=|kFt z`38t{-DuE-CLli)Kor5;x%IpSL}yloFXEg*hBmB{E%i0P{7yAwFbmwSmrVL{eUrwT zup|~5dW{Jar=m9~_oArm>*|&rJrwu7bd;|ZE2hgSHeL>TeOLD>;T8h*cVNOosTB{> zbngxA9<76V32CtDj{rV;&vrf_u@&wEhv*y7_GT*={7_~(tCT>Ix}MwN>F>^5zYG+8 zBG_FkC0j;@h2ONYGda~)-2@L;14xA&H|9V(2eFr~onwd{06(E=u)IbN<7XZGbS1a{ z{H0!!gFv)ZOyB(1g6eu5Z>iO|b-8H~8ji~vdF`84aSHqA+r-oBMy*7_qJpUdi=D=U z5$T+(PBdLeFT5)zZv3?T^B;a5{8B9A{P>F}AO0JrIINXXSUpfr>=55(AajV3*1I~)M&whO-@BGW60t9rbV#Ffr9DrFOKTP49|c4PM#M^7(5$& zZZOF8dx+9L?H}i1W)^R4oS5t|FxYe>Nw_KDGH4%LthKbb_k|drB#jn4*R8Y#p)9== z+o&UOpx&3n;vgHjgQ<}CLeF7sNx0e@9^PACI(mO^^F|)b%liI%ya)izHguN``d z9)=SG<~&U7w-{)>l!vP>KCtWu;^!cMvveD@m6{)Dq)RYJGBLSP&Bm&EEt;_dO2Om_ zr-ETvjWp0H%04XOI4sUF9X$0+sXC0qHHEZ03qH6$aIdEpFvR`s(fS?hPxD^`j9CT} zT(Ad_4|e@d2517MPf2&EYkp)Yh8MDeS=43QYYnsz#yXHBtaWGVLQp0%G=f6QO>dE`EV<{Mo?C~2s`d*d@vunWiO1;Z-iiCour3|jfY+O zw;j_q%_&uuJDP`oT&vQ7bSbq;qXFsEj?sRy3S{sRy+uAjTvl;0uN;7{CKVLDO#Cae zQ-3+99nf9ne*6aAde*Xi{=S5I0OOU+8~sXxHnbl7z`uT)cA%rZ=o}~Q%Id=%M&rt3yof z{|*^*!}dQ<#~jZ8Q$hw+Bn z`=F?b^~7{a$+GDcqbj$~K9}9>K#d8yZ;l_N?TK(9w zk<6>*4N~EO*>)zen4(4yF)jLI8xan6ZDqWp>$T%B4UiS%dQIN5quD9ysG3-{`|B=5 zgaeceCK{rAZ6r%}pe5`tN9XdS`?-&f$R>9*v}@NlY;2w=uLRYDXQ{GJc!Y#BoJ1X( z2%7l8cDY`GJPn_i`ZL zkId#&x{)qjT9blkPF_PHCo{BNN&mIL&0E}jky=!?Vg|QV+O1s6BxB@)pS5BPuJlaL zr3pSHGRcu_1cEyPX(bK?r?hk}KjluF)d1#jRJZAR?FCf%jVcH2S?+Wp7BkpyNn&+c z4>gMF2+&gjD);6f54ZE0=-uW_UKd5)Om^iBst8--Lp1H3{(RSK#h}(bFv__K^)s6A8s(y??tUZ@MzRI`$u8`?Q%*1RoCYi+*g8M_^(`fY;_}T)J1i6 z3CB4AQ}=eJ)U@nJox0!X+V1m)>BBa6Ah?Hogw(}v%vS30zZSSq|5ffl1TE$>u)g}` zSTV=l797$8Tu-`hyv_W-`ywd<>$3>E{%m8s^O*%{Ek>-kLa;ni!I8TkBwhLzb<;j^ z63_|lwyQXj@$``e*qR@ff5kg0`ARk4`hnK=v6b+i7Cu%;6peG0X5_J%mKC=Zb{w0s z)o=vE?I9-Fyy7g$#_#}@gdEyL_pXemucouZ*_E^qzOol}OuY*ixr+;byik+?$?=3e zr%hi~iX0#ADy*chn3s8Kk$ipcZ9=WzrWbt5eRNi=s!4vT9RRrzy|Sp)X)!7X3?>i~ z!#%nY{eD8c^zK;4P&ajH9oC>mUynUA021T8!ywu-4<0j*!CrsCJ{apB;rQ{or(}iT zV=J#Od{RHwkW(tUXcV~SmXycpF^IwD4f+v>+Ro&~`gqBp!8v$XE#wa+D?;ejKZnqD zfaEgv#WA`Y6Svyd`o?He&GmMOo&Pl9OKp1ofmAjkC-cwCg6hQ7xsxcuCqC1-m=PCh z$p9j(IYt=M(^u9@SPH(>MRwS~SRlHB*og5odK;4}-^U&9HRLMTJfu!}6(NUBDw3!T zX-?$E$+60FovOZ*qI0&CqjZoIS4xugLDkYT9hHcQCA5Ld1?1X>2Qqi9f3xx9V=MRJ zzxUuYpM54ui>PHWte=HXu!MGCt&fEc9Vgbh`FJP5JyKp2+pQ_UH!t(yf6lm{K5w<$ zvE!Bv!@3!$JUv01u+Qxuguihhs!)%GnBqvz(T}|@2Ihx!Zmedt9D&z8iaJ(>t2-9W z!8n4e8-Lu~QSYQ{?&DmMycKnB*UH$jUDyhp*;0s(_sJqBR@Ya2ic2^woJqqYi&u8o zAz6nU@H%wEp5^~UP(OF-stM?n?NTJF>5?2Iy9|IYkKRvta#8hjE0tg*X*iE~ z>ap+I$9p;2{k*Ofu)QM&(_rx}f$BgCve#<9{1LQWF5bn&`-xupYmZzuI!AmfA*J1) zg`M`x@)tYI+r32DEZv^p1>ahmgCFkPPUnAaw2jlmg!=^XjOKJXbv=@n&&s~~;*VB* zQ0s1;6DhPN^_|=9^4ec1YA}|v0qQgjY#RmG9PFj8sBA7l=9L-5#`N^ok+r56<%SVu zEkZfs`~x-G^g|ezS8>jk@kHcIE}dAi5QAPj_02MBkure3Qov2&({rQ zpX`fwgSnpuQCHwJpG!b~-kK%cz#+^dt}s`kfmCp{hpnQLH^lYE2dJM>aGQ@Lce5#rlKCfC zX#eKcMU`yfb)j2Ri7V%ahxojS#cz&Z8a3YBZUI3vC0#Q*S-BJy@sLuVGE)kIXR>UO zc3U;^35807THbk17{L*(>~X8?)<_z#nhRM@h(K2cBkWh)fPQFYxn3=Q2Hs!|3+S8X z`r4aa7!<^X04yKRX{$EJC1bT_bfH7xB>;n{kKRj{3blg2*)EDzJ8J>hnu~T)A6pLP z1D(^Q7)$Hbf@fY;7C^u)Xq0dLlIla!hXz>u;OIa#5LF!CNgPbAeRXlUnMnVn!zFBGorFwF7eP`;^+fw?@~wDAZ$* z9c_=^UmIS}y=qNH()8N;#+GR7dWv@6Z5CKFP$(d2ku%)FOlb?Jdpjj#3`}~`G5nf- zf;BFKjgEvL^Up+x6kRK__}vGc6b=hx?ObeHC>n zN+O=x)j92_h|?3lQpaH!2#rm_Xi_Q_5EOk(wCcy3!jQOgJb6W?L`rAvn1PN%L+YPt z`$XxI)toW55t+U~Y{oU04~J1?p_;4ZNbIvNBfrS~JuQosH(>5GG+7?Vq^asrg( z8T^eG3Av@9j?sIf!=cy^Nx6De49IlU$mJjYzHJHr7Am(#x?$HArIz4xxiHM7@y(0Mmr(jaTgr)-Q)pis3QjixE;mJNQ**aG~Vq5 zXyFi15Zw$!S0g1Tr$C8()X{tWu}*1^Zj}i`KL$%)hw1j32AIK;lT*sSCwCsh7oPd3 zA}gT{t8l3us6hv0K+4zm@)l?Q{Py| zujVD-&iUB%wYzAxrQ3tjM=7rgWN_VtZD!~Ywlm%5#KH~7&Yms9oS33`4<*)rTz`Sd zv`NWA^$i%NN7hF6BomZ!1HlPJ(Zr8~SaJ|Eayj>aXaR<0CM8;TzQWHQx0T{a_kv0FmEac;!ql~bv?d&iOB!^MXZ9|xN2r5W4 zp6>5{j6ywZKH1wxe%z8_b8w;$wGnD^jJ!tpIzj05EwY!^otA?U^>VVLUKgpRUa$gE z%JjR#&o3yzmE@od_&1;MG$vR2`np0=BtngkiqUCQbCLcfgdPB=vkrg_df+_7+&Xhq zmJJNyYFe*7c{&JY6$qN*VvM0G%zQLiUSb<48Sp5tMh^8TUS%TUr8NR0t}?Hr^(p__ zidfksJo-Fj6t)}Re0k4bSEohu3w!>GdX0}QY2S`SqG3jnJGI}K zcD}4&_}UU@TdZi(9(WMV+P6;z=)qvpoaot*@>D%CCZB?hyTdZYF6E_Ij7B1yt)Vl2 zM3kmGoTd_SIli%T<6R~#KA<>SNn*ol;+Of3xxNx!J*~gIQQx{5gyz;4f_83zNJmO> za(1jL!gbDz=<1f2!X?nL^+LiSDa-DQfwn_lZ>-0mNC8wAyNM%SImEbRh3Sm4&wr2T$p zzGsK$Iq|u!BNXP`qXa*_VCCe`m!0^+hp)b-jmUxbdh+J0lds+dkgiXoCv zA0Z|4wx6LOnn7Zl24^%s^lnnMa1dd6#??aW(p)oSy|z!IlrSj!ehJ{ zwKJ61A^x&8S%ZET)-;-OPZh#FVy4Z$X=s$`7~RZ8<6)E81`~~fF1i?=7O)AT)F|Lh zppoD9NJxQSl2NboMJn#JShbhXO$lzDaMh0h^wZ~JyRN9zi8aF&3#kQL_|%M{YijGr z5_mi}Dne;@2otpm3&ZR~QEL#3b9A zwDYjn;wT&lTbm0F?X%%t&2A*JRZ9a)IyAS@91c^i8BX99B%HbonAGcBHS%V-|Aj^X zCrMoP{>r*HO}#tdQ&2g?aM}F5=AkUq>(!5Zjgd3 zyAFtw61%SMbJhCAkhz6W zZz7hjlUCM>eoO%AT?CFR-DGTeZF@T~j{&*7<3iHE6qL2M<^PX^?l#>!(C$pP=NJdy z%MR3?w@*%ylN)@ENpoyBflaHcOSL`u<$PH$YB}Ll^gk%-husj=mi({wLxQSPkUv$8 z;&eM#B>`{Octjg%hl)rwr_tPq?vWqp9WC&YOgaJ)xA7r3<{TS1NyX=`Dz-$aBG{w@ zb8r92wjIe*h<=>n{ayx)gKTu)k7|7NX#arQqRh;VylDH>6XazmC2ZqDQqZ~F#MNH! z5ASU*FP%XUc1HKun-3EGM8ov-V~~`1H<4q9Wn;GgnrpW%11WH;H?P3ADFrBJUo=m$ zw4>-!-gqe!l`dY3c|c!C6}5Ld+=CXzfKqpSHQj5kGbq?IhN84sQe1MAx#gxR#l$2j z(V$*~wp|hR#ID0l@{+?#&CmZ;t0~4M>E#L>@F**)nXKL0snjEHHR%)UndfeW>*8H52j8uyL&b0)7^K`niT8SuV>S-DoSk}6 zSF+$n@L45GIsf!ueRXqwe^Hg_ZDJoM-(dy_)Kqr`X*0l$N;ZaUPIfn)ITh zBfTGqH{h=x##UKXbu-N>X@&4pH1rx?0Sn$UAeEQW`&9`E7cBHg&zhUea=c zdNktJGb{h(J>JbbBjs@dv~PImhU+@9Eeqyzd4z%f5h!}s9zH@puUtz>l$DVfagB@W zOj%(!8d<@oEG|Q_q+I^0sf1F?jK#WV$qIj$F8Z`zocM;!EprIVh-JHLC@agg&Bd?G zZ+LfTPLd(ss_S%XrQAWSJU_;oWteu0UcmGtNS$UhLy378Rh@fhZb02wt)2#TW1?Xn z!^pieUcp4bDCXbd=HsZBUuhw2Sg*-Aiyp(hpO}%dy^@X@Mn$WXu>e;``>@n_0)kqn z8{t%L>7a!ilH7;%J}}4Up^fr}jgBZC_Ng}_9B z;0D9rYWXQt46*e*HkwjJ_yqXd;<3mPWXneig$v@&Y!2&00!LX4+Op&zad4M6H_J zhuJ4Oyr)=uCuS~K_q>pZ-19gXP@Wzz}s!~(5B8W);jO)NhYDMSG{81tt4n$iK|yaGTuASKH}we)N~ zc@pg7qIh+u(uGX`SoBCICO7f+d)1N)Uc42Lw_PGZh8OwRl;o^{6{ei`A-&4N-@DLx-+z`)oE4mYc=1L&0XNvQyvG2JtWg*K*tm$>=ObIxb z&}7(z;1jz$-a94jj&6hkWVMol~Zu zT;6))*=$bAru~`sZ|?Ed`Re%OJqM@PGu`!myM8nojnKdE&dAYA?v-QIDmMHZsCc%S zu60F3l*~@^!X~!oxc#IX0`=G?FVZc$Ci!fBEG_`CJ@t= z#&tL&7thlP*2+Iz`8-M=b$F&+>2j_15z^_*u$#qHEm1Be` zhGZ8P0juw2?2&Wc=1YY19+lBCobVhPU1o%UdfPE8lIDPo;Y{6@AX{mia@jU5XF7HL z(03;LN&<#RHtvPC7u;dQcW6U&*l|#2I~Pk__G2TXki)6%N&58ghlgL`#gr3$Nu0c1 z*%kAWV-V!zR)H_PHb;3Cq8JH|RbT|t-NPTAKYOv^k#iHfBpwRuxPvo^oGp;&>{w~| z)IQFp6H685PAynS5tHp340Rgb6x(ojci4YT8I%qrMY2p>^jXq5_bkv+W=F1$#|r#J3OESgM+l$uLbV34C3y8sIC$#$+{tR42& zsd75IvCyr8TX*ZI<_lu3C~-geMJ4t}J8zD0wtJ+#+7KZ6xod~~be7ObR9cA$7nXnC zc~!!X)={LWZ!2|CMb?tKgXwF6kx^oU0_F$ERB{~4^rK3fyL#MQD3JG4e#mOuRhQH@ z>{xv;2<@{%k}H1tnM&WJA)dtBYW3m6hlN?!cIA}tV!#lcVsD#gI;i@*2v_#}6i@7) z6_ZE}iW<(if z*S9~cv4me9>gMPw-Rsm8>I2t+=~mAXq;bqQX{tPA8uzSL{iF?TgqEyY00as)^KG`- zgl?^(0h(aZf$-h+gecj{W%GSIcK4lb*=K&_cBxWEc_3Np7;9w`^$GSXSZO;xTvZAgkc5C;TH&5zoLRW&ajH>eFaeZxXg64y- zq*w5Ri0V8O_!%M<=cTRDP#1IBXubeHirOdjwYftP8vl?tHHVrm{=Tao zpq}>oF4*hS$b^nar~?-IMqS~?^5=ao)j0vGv)6a+Qs>T#)1$su#K|AqjZRVLDQ6G@ z;p}Snqy;dHs$8Wh8ZL*yR-}*?<^k#|5BwDI_k1ZjQ*b8D>m*yC6v^1G{07cSl67my zYtPm=2EfIM!mHLcUOjsL;^AY~DQ)-(*$WhhTf9Vc>3{v?`{(NlA!9Ayo>(C5D_!B? zN&y3)5*sTU-_n4Jm=e2N=J|^RZ6M!#q=idB?t^G5 z1yDFG(IHHPgp%gu;X;^j-g0$NAZgN#c1kvc ziE3-asnRf>GbWx!Q3A!wv5^vO2<j3G8bv%AS>Uh!W2uWFs2$``qmYFwh7NkZc)JT6mCaN|T8CL20L@$@H_169DfPM+_u4nPqizVnM&| z5|Ya0dk@|Fo@=+kkdr=v}8p2 z2w{lQ`PqGK#*W~XpptMC)8IQt6hZ=E4@-V8BzAEZr~7fN`?@mk^U+G@<* zCr9Kwa7_-?b#e&~Kiq*@$VpAw4dwl9zZ_NfT@qmBLbwt6X+O=it2uGNQKRRvZN3-e zTIE(&6L45G1^$ZsT<<;QG(?OMNbzDF={pbgmRzV_3{N=Bvx;WN2;0>t z0sYd^)kS|m3e93)u3a;8HaJ!tec%=fyV>_*krmQ^epA}MB;bXqH6tAifi3NdWbo|2wKE(H);#5YqfH|5$EZ=orVyI znXJe1%N3JQGImp03Psq6u+&6=gyLkP)%i~@JB$!hS4iOVv=>3&!=7`}Gy-PYf zTZi*rptZ{Uml*$moboHU9$*WG^ai#nG%H;_Sl$P8QQ8SsScI8h(6YEV)i~kS`@KEn zW7Cg1eF%b=v+gWNcg|W06A)6RBi;d&kwIH7q1doV?UUFo1kO5-5;PXgsKM@JoPKN4 z{({cNVB*0k(5X!CXQ2Yp-5N&btdqe?B?Jd1n*?NBWgG7V?`8 zlLz7b&2nVd3!-jZ$7Ae#p|YYTYh9x7vu{59_u7NI(ugS{U)dM3Zkk8BAI|Mv18pg- zGB_x;i|1Bv3M;p$M;CN%j*{F{C{$Vs8L%?9Rst|b0iPk?&)T_6rer2ta_!)vt{uru zTgnouldLTaCl8 z!6?8!G$HwTij#uCrY)J(D;onhsqqxCE}lxW+V`B?n)8o$8cAQODnxCj=;oJ*+o6&9 z!7LNn8b!mUu$q!P#D^8 zLL|%4*d5+x3=atID5Va)Bx%+K1!Hg*7qZdSo2I4y2s|rF2fXY>O=MD;sVA8TAYy69h%29s;gWK*MdNkJ;+aa( zPP=VWw6VX-Fc{Y_!BX+?%u!{sK$zDKQj+ICg}#_vdS&fO(p#BmqnIGhYO}>ksSoY0 zknlcaGm==<6$GO<(B~r&_F2u5<;k;^2at5j?68Q%$X#6s-ObwEw!MaZb#>>))tyvQ zv*%kfs@^4CG^1s{L~)Gt$OCa#@3{H&y}2qa^?s@235v1l-Vvb!pUva+UdC# z+*?F0w09W5v$^Hp5T=Hc_y6W6JD04Qrl-112;)5(d}b@T_lRR5C$cKwGnRV}#Z#w@ z2%2U!Vj{z_k#FxRt$+z`k}Ppr(2+)I?yaXR96o$gvjSatmjmo}t}IqpPA^+;LTRO2 zguNkAO-7aO^0gezl{=o8h}V1FU`)!H`j$|mYNkLGQhh%*m3i?(t9hfYAid_I342)k z;!mc)HUA0oq>#FnxL!T=P-e5{*rT*+f}LPAz>#s-ove;O zrlRugn_hCPm~MN|@}neuW$%on4lF>jx@t_Kq4+v}a$MnjY*L$~F7nFZH;a5j5Y#If z5MQAsdo?_L2L`Lj?DuGtqg4nY?A$`;px<_}3rVMCB)80N^*+mHbAjR%t3jx&O}MB` zhwX{3%QZ$Tfxj$kD*Xyp4ah{O&9n(k<{iz-%H$dk`<3Cy(P&Sqo>`UmZ7FH8rPI`E z5&n{OIIb^53)Iv@`sC(|;MYd>Y^E~YFdbux0aE)FePXL|FE-9duh14e`|8z;?^Y~h z4mJ_(FM83m6cY$4&x4A0df`OibjBqxNjjK=F-NM~9UC4^jv17PJIpucqGZdF6Yq#T zVjQE#cw0yl!Gc1x$YFNM%>eU&!rz$T-xUS)vMh7hjpi$Wy8;{9k=&xMK?=!Xf}BuD zsAxQdud!`3%-U?XOL{z9eO6C)YZOb5*?{AUiv`?G47RLcm4{_DW3L3W1i z5CK0QR9wq7oqc|G%w~supm*IN|2!M7CWrcI~~64OQOG6 z4@B~^HaKY|43PUl`hhNO)M@!XLES*NPMas7Kh(g zk(5%HW~o5-a6V83f;7Vsb5Y}zNCXc^V}&6|bJdwMouJ%L2pWc8)P7OQBYsj_Hbvv) zcgjX60YdsM?buwe!$MR*ZHh`XVm~<<&XFRn35yB{Qad&$OcFYmE_itZfWbzsEJb@% z6Bj{HJ%~!|Nhv_K$CLe2$cJ&uyjtwPq`Q~?Px<)^|FCkY$S65_C9E`=F<>hY9H!A$ zCOa6dWpB5ewdB%k7VcFuC$S_Vfxe|2)RX~H%K~?!lTr0R{vDbZoYwnRCly1?z3l8o zl@Q#}#{u1J363b)?APuHoNYWrIWSi`BQCf|j?F;b3vkcNT@w4eu-{eaO@q;wm_96^ zecO@9rC74wy%juz1$T2k#rI+wnwp*2%Hw}KLF*aN(Hdj{NLGg&b^*`DmzyB$M1(s( z10h>Qkdsbl6&nPC#imDMG*x?|PiSqectA4eGQJy^e>@;Q1q+By_Wo~JB6ynbD zUivFiC~2`ue1u|R+8*)NgWfA-F3s6y{TLvRpK1yzV{O^ zyb0slt#EQ|MCdA$~KvnA@Q>!@HJD~U^%KU}X~ z*`qN?(tL|IqN*5{jw(-=Fj#$1&xs5EDlt%jVTMc`gRFEou-@7v9_s+g7GY;3sdrFc z-LCR;4(9JqnDNoO@|n}15vj!VVtnKo^G|1kbZ#~A`xudl^Q#yKWz-w-1m%|vuWqUI zB#j^vMv__S3#61-U3>oR29-j}j~zxY%i}>D0lk>}R-t@|fh1q}4!PdRrNMhLbzy8V zF%tPDNCRXoC3Lpac}i1c2%O7=6I(7?)@SQB!1y8IDAAoX%fy1FN3lU+n5f~a>_0R$ z@v_3NU0-B(Re_K!T^3&4nl>Sw@#yH_Fx_#V^xBobN~obx$$q4BL&f3lyio}E$-K@SJu~hAM1c#S88dUQe)C%^E8|%n+HbI(tc+q@Y;`Mr>i4Qk+t;HepE+3j_H@C%nI9X zbOxlBSYm2O6+y(K6`^wH1!aDx%DizWI?owk+6GZQg_+^U|BxWb4+Oa>R#G|pWo*NY zf&i)A!{KGRAL6*ruOt}eR_uix}7`Ul!=#8$SRTQ7? zUVbHWOd6gMhAh*`AA4RyVGVGS$ysG9-4w~L=4kI+=xDr6x5(aHK@AE3scY z-I%)q14n^|nI|b88$ zSVW&1?F>Vc?H1-T1=eJ7uAo3P8u2(y!}QVT7iu2g3~Z7nv`${YDYg57`V+cTO-{Di z;C33QVw1Scl76I)nJiUvRU{ZHic$H4vYkb5*{)n*VeGV~(hV_*N`@jFU|a8cAvRUh z>lKe1H=@d9>XyUkiCd?qd5t>HqtVXO=zn@Dnb&p0$cc)DNQ5JogLHBu*er>iX?fE; zTs7kfMOL1ms$yJp*iRl`WI1CBmXFEK+R_ z_0{Z*4d5a~i$H;WMxi=t9H(imCmNLp)}W&C2$bB-yY?8|I^jZD)M887 z;pj3|SinWfYkr&J=@by~nioyezguR}>Obf|&EzF&EPX;*0}1;^kT7Yp13rYhJX`5? zclMj^o&&IQ(}!?Z=gRc+{{7~c?+NA9ba^0^(YoL}hBqV5uj%2&kGdW;{pz#HG-kD2 zjGV`K_rRK)4h(e@x7m^`qqS7N38)JY8fp175pNrhTyxy|$7y6_wga0*d@TrBfuTjI z+uiWEPtQeS1q!!e4V6`qA7Yb?RlKofDfZw1vt&%&$v$<;|pT3 zLF^6pgM;}f=?%h+>??>V$^9`&Qy}22TODPcp55*|Yeq^(VLNU0o}!WlN#Ed(yHcJb zX_^`?6}IC@>=|v!^xR4jttj85Lt)=s1CmANZWgHKp2q%6+tP%k{A0Ac7;)*XNAbgX zk%iqRoKD4>-E6Cj62UsEgN_YPfpaeIrIL{8R2eJ&@mZ%`dsbh&eZBwro$Kw|IXy>$ z8RW4uS_^}7$ue`tRKv(@`caZzq|NH>aIBl6rxh=b9~D|w0Svvn|R8VXTJ;SSO=yQ{AZ4mtz6w?oE_ xag;DU0XieY8{xPsz;1Z-gLX?H`f!qsxW=@HkV@SrF3W+IfQfykK<82Qe*wI?d%FMt literal 0 HcmV?d00001 diff --git a/binutils/po/tr.gmo b/binutils/po/tr.gmo new file mode 100644 index 0000000000000000000000000000000000000000..71904464e412a81213d3677751fdcc3fdc3a090d GIT binary patch literal 129842 zcmd?S2Yg%Q{r{`56ZYP47$y!_A&U@#9Y`F91e`(agai|UY{`y@EE&m8Y({|&%J`A8 z_b3|*Wv>EdLs^9aExSNVp%e-wP)ecD-uLGjM@O<8!tdXE@9TB%dA*L_=ULxp@8=x7 zxzTE8$GCpGYAm)5yl=Z$Z0pryu|w*l8;d=0U@W!?d=hQ}--K9+eF1lbo6U~Jc7uDt zO<@Xd2#o9;{!Oh{;O;$Y`O5F^H!VHwZXF&z&=WtE06d z2DgQ)HOFGra7V`j;NGaa;aGSxY=D1;3TJ#yEH(tz!>!>AI36AjN5ZRM4SX36hpWwv z#WsSY;U;hj+zGZg9t*2bUjdaKPeP@`=TPp}JSY|$2DgG+!pTtScPNy*NfO)h zV4DvA1M5*=3uXVWa2yO;Ym6|Q2zfIDm^cSiqF$N}+zj={j;kL|8AQDeRJtsHo5FJ(Z-5)4ei*8pyyVo&;m)X6Uu^SfSGYCm zNl^9gP`ElQIQGGvP#+72!Ykkx@M+kLgGVy4*g_m^aXje;drv_A8nM{jr^I4JJ@)(4 zNo&|}hOK8`z#*uEGp)b7L4|KWSOr_5+JzHgHM|ST{@YOYK7?z+HO{i-U_B^%BcbAP zFqE7nQ0a9MTpQj7CFcPs_fNq%d;x9=V`tm++6v0uaHw+D0C$6npwi(i7{I%o`Kyj! zLxp4ebF6<;q1-n^*Ds0FR}J_f@<#?o%(3F3+k(&%G)!r z9{vj|o%gxawzsE4h3iA8^0NI;ZF*0KipP;~Uw8wY06&6~S96)o&lWfq^^c(B-UqjV z>s@Z$?*_L+y#Px7(NO9CGpKZU3r>TZUSZ7_!cnMCg&V>Lq0;>YI1auCRsOfXG8S7O zHo*1Z9Jn(~LY4oM;9z(V?F`~t2GH+{^e z*A7tWyr*L$RQe>K+NEW1CwRUy|0P@v^$QShV=p`P>u@vFZ$stZ7jP>$=y6-`w}D%t z-UF&U%!DeZCqjkm9vHw^;12LhsBmumD_dWNLgnv%uo^CaD*q=y<-g}P@qYf%v=R)PvBB*pb1*$!|0?OW9Q1X5QCI3UmFX4Kq z*Zhsu-wY~VJ45+9(djRQ@~6|89}AUl7eV=Zx8v(j^8XFx-#X9Rc5oivTcN`J98`JvGu!|Udcpd$5j5r6spmKz0VU^DDEC)G#ruA!@V@|S;U{nujK65p z@h~WV3edQRvVS$Kf{#L#?+=`M;0JIkxc!?}{&*<;`B3S-3@W}qg-VYbpzJ>a6~8y3;=Afwwm$6&r9T}8 zFzb?C?j+J)!b{Ivfi7;A-$PSPQR)W8phc^0s=%=G$nf^r?qR zk2z53*5!B=tV8`8Y=B$*$%gY#sCf6n>F`{rcIREF^7k23cvgAW_Cv#=>O%{ZyTwrc zo$ST*%WeF2ha)j>fr`(mP~p4*Dm`9;%J5IUFk8PlLO{$D!;khx@~A z|8CQ95!?{;U8^Lxs1NOlU;1f{!@v1Zb0!sdn zf7o=~2Ck2KGz?%plz&O6^f}G(CaCiEEL46ihf0rizp(Dc!m+3ig7R+}+zj3Tm7b3{ z^@mV$SNW%vw*%Y+^<*fy^P$qS2TK0g&isD3JL(smdetv&J=+3qjQ%LN7Mub{!I?0C z--q(=3Mlyx!x8XJD0}OFW%FecRQmS9HQ*1S()Sd&9{dFy0-u2E!WW^^`wwtS_;;xA zt@kfmz9vAG$1bS&pW%29l)XPf`M=TEwq0m|O0Q#}(*G9R6^_4zTcLg#Dm^}h3jdC=L59;{fVvAR z9Z!b}&uwsZ_&8K}pMh(_*P+7w4pjO6!kG^qG|0?PwtzCPg38CepzKX{=5wLK*XGp6 zK&9WwQ1QAQ%Ks;!(&G)N^7$DY1GiaakSSjWLY13ND0vsc0N&xuUxEtvr%?V6TGh(k z7;cJs7pVBuLQ^lG?9GRgw-~Mie*{%d&wwho=R@VsRgSko)rW_m^5ZGT*P!C@0hIi2 zpyIR9YBpTM;C86TL51far{4+X?r5m;@)M}`_#P<#--4UN525mP)zt^Zn&5U&?Oz@$ zeCI*gyV~)7DF0uAiq}U_^1gy9*K4dX$c$%3LFN0NP~oeCYTpilO0Q114eWtR|1+S< z`GZh${{)r)%c0U^^)+qyH-$>a@lgIwgbL?$sQ9)(r9;-4{}8G?o(AR5tx)pchLZb{ zQ-1@M&qLN4Wa{shQ1KiEC2yMJLdPDcd_Dy#UKcy{jZktPgsZ{lU<3RuR61`p*qZMF z<^N=;csE0(M=w-(&vv{ED!i}4ZQ*-R@my_)Enk~MsYgPk^JK?1sPy~3Gd~9^-LHd^ zcMIGX-VYVN|3HPKVQpKF(opI%q5QoI2Jm-Kq3YEqQ1XVXXY2J|Q0i8wbUq!b z|GNPyf1ZO%@3*1C`3aOigV(qE0aSQLK*et!RJ=Q(?4JVV{z@o&w?oydH=x3`<_6ZE z;ZX6~2TJ}zC^<_U&w|S5TcPUNb58v^l)H^KwD~^@Djl1l^05Hr?~kF<=_bdA;MS;L zgsR_vbLvetvT{a1mEYM=^<@!M{&zbb@AQ{J#qR>B^!phc10RF3{}oiathuq}HjX15 zr$B|X1uDIBPJJ9)74=zA?b~@!@wg0{{Dd{AKY;<#g* zQyZ=+Fh7X$1{J=?H?#TmI#l}p9jg3nwfP{^A5Vs|w*)G@r@+zhQmFKP5h}i)Le<0n zK;`2OTiA3T2bJFYL+Q6eh5s06(hVMr`Z2gB47RlHs-eO&9xDEa!9C%La5{VtPJ-)g zHOQQ044-sB-Z!R61d{d3 zwFOGQ$MHg_a`_NcJYI&iaJ}tqx*P!2@B9EZzzbnB`~#H#V}n6vAGirB-si!3_yU{{ zH`~FcYZsh>`hKW>V%;5WJhz6*r!lY<{scaB^>?!U%s8lU>;w0Q2SJs;%N^f_ z2ch0>=RszEu>>}vz7;B;{sU*iaaFdQod^}5`=G+R$}WS<`s);^{Qn75d|rU^XPu!o zfA)vFqfS7Tm($@?_!b-wtE(;B;26}GK*@U%O3r4(2ATP8GgN+^1?B!>sQ9kEt93sH z%3Ti1pIf2QFSeVF*G#BzUjz?JT0#rJk3Z?%poC0?o zZr!KheyFd5d%)#T;TyWU%SR}G?}sV}tBe>FTLce+viBftf`doebXoxA%P@f1`) zx%nttuXcqh-}^x2?*cd(_CUG2$LW6oRZiC*ZCM57Zf~giIUlNiWu5t%Q0@42&iqNZ zI_fta{{&_K1E_phe+>Cc`&9=EG%U?~&|a>^yk*v)*oioNW*+&0dd{JP7+X`$+Xuz& zg@Ze6J$($SefR`c!>^(0Vbvnb>5e^6_4;C{_U#F%`u;m8_aDP5_!X3#AZ^>jX;AVO zLG=%(LAn1al)In9b>T0d+RI)@938J(PMLRJig`{mxIJ!gn83fA~IBJHGW1R(>NKiTWt0cI4-9 zPxxmz8E&5+6k7Lk0 z1o$LufNS;GdN~6wKz%t>dlXw@{h0t2{>4z?y$C8?FF~~#Z@|Og zhP^hQ@=)PE8!A2zLxt-DsP=KIKI`usm_&Uhl)wLkvN!BVSD&HEZ5FD1`Vmxld&cR1 z3e_GAKFZdo?crLe_lHAZ6I4DO3ipObLdEw^SP%aW)!&Uf+WMP=l6NUoyzYQ1Cm%TT zEswF~dm2={PJ(mbEl~Z-n%}eeyDwCI=!MdM5Gwt?glf+kkG0`D3GR#fEU57O4$g#I z9%t2QDD}_b@YSgYun~3539kIY^-*67gD&LZr`^J~q{HuW~=gm<0vJ9#{eHzN& zSD?cC1(e)%FSqr11l$RAD^z$+fT|ByLdkyxs=O|Tst4n)u<4nCYA23?l6Nzd`xl|w zmE}zFhD&SN^T0u{7k6u-3yg3 zzjf+&pz`f&sQS4Dg+=Mt1ZA%e2Jl2U9bN~O?_a>J;3n7D{Mj8!Jq;=ylThXL2q?Mt zL*>VpQ1yMaYpuU~K&8WhQ1Qw^m5*gk|4b;kw?KvS8OQgb(rdNrY&>^!oDWqmehk-z z=faKPRZw#7h9=#i>@A0y#|`?KwYM>pdKaj49|z^`V5sp)4^+OK3KgC!;Rf(Q$LFEk z|Iw-c4was(UvKkaH>mMSlj9<&a(@g|xw;rCeI9cB6iWV1H`sn|3{?9xAIjb`xCeXy zDqlW_O2>_UZo@qiD&HHS{7pIiBcb}Iv!VL=UqO}2PI02pp z)qXw)mCkG2WYcvMsBnyO>X}gS?}VxkXFBzRunzTmP~qSCX4{S*4Ap=A2+H4Epwi`O zsPO#_DnB;5#n#U_l)4@&o`*u^?@~Ako(<*x6{vW94JBvmTP-I*g)aeR@5gXwcs-m8 ze*+uf(A#Xg)CrZpOQHNb393E394en~gc{#H098&tfQt8^+tDAynle;12^GGVpz`f+Q0cniU3Pp? z2bJ&ba3(wr?gQV3Dks6+Hof+M3V$zT=_n&4co<7i!#kDpWl0gemwcRJiuJ z-{#YqQ0?3`Q0adwRQvNZRKC6mC3pP?Z2j9EDxVWj`Fa{udA<=U{7*vl8=pXpZ+3dn zmg^d*a+!nbr|y8tm#3lRzYCQwt3PD(b!S+MItevCxeO}b{{j{7y&ksq=fF9ryP?|0 zr=ZgJH8=)-2-V*Ok680&sB)ErCj2l!eIt~;=imWw)kkf5%!EphMNr{83MzdsfXdIC zpvuGJFo18usqjCr5l(%~j;qdwZK$7x^Wdn*ZT_DE)t+1nl@4!0)ti4qg>UU&+4LR; z+51`tGuc6A>&QIHLOow%-+o0O(%b?nq7oqCqzoF{oZqL|o z9taihV;wJripK*`_25IOc&__v8}D79;x`MbTz?PB{bf-8Jp>iL&zySoXKjDJCzSm> zRCzrcs{Y*!Ri1tgmEM1WDwk_MXTz}rRC-T`s*g*d;&UNXemo9UA6|#@f5>layI2bg zs54OM^fr{7wVt=>Jj$^fDn55Y<;S0({Mq>hTaTtf`EwLhI-CZTKG(tN@OQ8t?)0LK zPX|u0vi;F!P~q={%J=U>)thUf>_6c2Uxpi_{>G^{eA(9DJ)y#v zaXcNG^nxlMe}ZG+8n4*;w>O-K`VgpeyacLzJPg&I{Shi1H-6R1t%1s)1EI=8pW``D z@x2WyU;hYIt~Pniwr9IQ)w?uQyKpR2JTHN2Pj7?c;QcUwUqHowi`Q*An*f#Hhd{;W zBB*-v6qG+}yR5`v5%HPM}Uhv;g?ee(aTR97% z%I}$QEW95oe?N!QVEj!hZz)u}bT(A|ei|yCe}`(1H-5{O&lae9z09fag-Yj-q00OA zZ(Dz+LB;ntsPumjs-JijDm?4_!OGbaD*j2Rap05l(*!RC*l*<*o-RJf}hB_jOR=c?BxotG;9Ntp+L`XG6*BgDU4g zfePP+Q1#+wXZ{eB{FkBfEoR34< ze+#O-eh!uX8@+4CA^Sk-{}3u3mqE3A&p^rj8w}uv@7Z=?6jVA+f=cf>Q0-p^t_e?o z@^2YbdAky-KHUcu-#6fT@FS@3ehnpWy+2#^4p8wL4Hf=+K=P;xJZ zipPym>H9QP`F|VA{l`%4*T13iZTS1vp9N6<91fLkKY$D1&!Oty+JCX(8wr&!lVJc4 zgNoyFOHU zZVy$DYoXGq1uDP09hX6+%e7E)9)&8$uQ~PSQ1xu>kL-A2L#X<62voiw2^G#$q1x3e zVE~_jDvuw*J>V7}+wjeRYNro@%ID*t!g)4S`rHat51(@SpFxFhgTLAM*1*B2_l7EG z4N&dnY&Zp;02RMqL;3$_sCvB7C$>K91(m-oQ2zc1Dn6Gx^@C9U{T{0Rd)8G2?~3RJq>2$c>GLgoLb zj%$8l-ERX`KE^}2KNKpzj)Mxv&!FTy>i7~=J$N6g-h2TS&$a$(!?!cs8}&X=@jePl z?lQ-lq2loZRQi78IOt2OzbOpR9|6@K90*nZ=0KIxg;3?|M5uhd394MY2bFK@d}ZT1 z2984A4r}50a4LKWDqP$DYfx+utmbE3J#fjt8&)xoB|isa{zr5+gFnI2u5dqiHg>P% zS?T>e&%Nl~3V(^7@?;6>$9SI3^WD&2ccMR!dnos{*zd$_1IQ2|b}g1pjo6i&1y21R z?C9DT^%J<&^%w3>(7%RT>%0e{K8;&({srnfcpvu~xY+^qhTJWvb*;{GGw$x>c^IT? zG4Ce5#Pd?_MW`1Wo0JRq0O||SKhfzOz;hRRbGYw9Z%>$j>mnDU@S+Qi&5vj(-x|1g zK<|f`{ha6NJgYps$?dP(-NVMn)3pV5j&aWqJMInVaDRgNFxY`SUH^vLa!=;@67F|! zyE*0?aMyC{%2=3oP>=Q4|FhFOis##$y)V#vhx<5gmGz6zPs7u(qw5!r#tSN|Djhnehn-fPhAQr4 z&T;aVVdoz_&vbS-<9QO#DeUdZ{d?Tpi{8`Do%+$uc>WD~RO8s8PX7n!PvQ=^8@VsS ztd3jP=GZ+G9t(BNLjM%FKk9RMJ{K9!qQ2bO|EIGz5xt-A{3?8ednnJdo!P3`ZO7d= zsF(0OntM;|==vUd>aVZiPNGki=0VK;HN`#eh<+8%|HJ(n zb`N*@GvFPV=~`}Kejmlo?dU&%`F1>C=ImUKx;tV|k8fah8FqfkeVwx>{XKa8CHxcj zF1X8MejfJ*+`3+JJOO(>m=A$d(K`d~$-M*5jc^l~aCU!*`XTK4>lD=f8it*vD2{dJ zotWK#UPr{fx0{c+`vaPnV&@j_M(iIAcZa`%>W_3iiFy^>e9rS-56`-`L_NyseTDi&+^PS_z$>_a$9)vHu0D%c z%Be@g+mTZZ|IU2}&p*M=4$j`$@NVu~kUtx~;`ABn#y-dXTG;;|I2dk(-oJR(6~Lr> z-W{`1?)gX7IJOM6#$dWM7S^?d`!~q&*EHPy8hb}@{~OKu+`n*gI(cUJ7rPcaFY>H; zNC#$dct83JU@hv$c|O^>K`XpYasJ$f*<@rK?bNa`0=2G}xQ{^pGkB6Se~M@AIqEu? z`y=#!j*R=!`$3sMJuTeJ%56E9vRPZ z{|voDoPIs_k1`S=X1X5Yz8>=jxJPpT-092gJ??$EZ{ybW4fnC!f56_KxbJh}V0al` zKj!HM?g>t35cZjre;i`c0_c!_KCdB~kbAd@j#z+_O;s4fU$n zdD6K%3;kz!zL@(k%zp;kxOLSz>iH(@HQ`p*Vd$UF^FG|)=RVnLbMD$c9FN@&r*}N& zGq}%pW`{WaUpn+i4Tfdj@WTUOQ&L z;`wIo`%s^QTI0|)QC|SJMQ?MSTY1)X5YKy|Hy9Z+cuw=I>pGr?b6?K$N$8#I^tVFY zj@?bU>$q8_iap5vh%<`=igzj>rQwi_nqjS!@UZ2 z4|KAYqJKU2`_^jgS)OaTn@}I>SHk9i~F}uj+~#XAFk7IHvv0i z;EmiD^L(_ECG+i_n@8bP?$f#FpszXdSnTRL3%yIYe}?+ka3=RcWPF2q51vOtrtz_N zt#z}H@B;dOb^d(p^xwqJGw40+)E=k1hwE^2Hg+@*cm;ch@cbpupF>^i!w2Ab+|P5r z&8_Qh+)c%PgR{3E&tGxt>fwG0{U4$Jg8NA9?u_1Z+!yk^5VKo&zKr_??pv_)2Pfwj zsF$GL1@##2E3tniYF&@P6VN-{sjqh21a5);6nGH!Ti`CvEDm?&ZbW}Cr}t;LE%F|M z?YR3CuE#wdy~DY0z^<=p)n{SUYgM!yfejFbHk&xfJ^HSTxk*0mhV(+i>%1p09DT??>-Y^nQ%`XXqDr{v-GP+)s1+>t&wTcW%yrd!s%Hw@+hX z5$a933p}^LKJFJVZ-%;d<~a|)g8up+o)@CH6d8|m`>QwdyeiK*>^*^D6MV*7g3a#v zH_nfHQNQEl--Ej=P|rqvJ=_-cUEJ?F^9x|wJ-_I<3^`x({2X^Hc7FngJ3oZEn9p-| zNAf%gJ6-6Ha&|UET|hs2orL12=yh{n%=44j(KP|S>7I{uGNpg2bAJ=hf0Ks0CSvzq z?EToenS{M3P)~%rasSZiZwxm=eG~V)PER7%!fuLtKKFX4_r+Y-SnON~_uxK~``n0| z$?kb4^mT1w5v#%N8a%)3%v(|a#XVof^KKCtccG46_sNXAihI9^!7!e8<8CEaS6sAq!mJ=iZ_1x4&*hZybu9(7VTJ{uI9Do)Q+FcY9pu_WVT)3UWGY`6FU$7A zVIu(#X7qHnrt$$Ux>KF0Y&S8+Xl7SiE}62=O{uo-bS@io=YpnGhwKEMiLNffYOFRd zN(GbCc`W7feL-`gHIoX`g&@`0)!jE-vMN{z9ZpGOTfrX4VVQ-{VS6r<$t_iS6_%#E z+ZLq?K_Z_Da$O2)A|rcbo{4I^{AkbRI}_ccBL+jO3PXc@DwAtVn1~fz1ToKxW82L#CZXAXB>gx=dLy38b7>LC3<>RByjTRHiAFr=|e1bA+Z2Op-!Vt;nlK9TZ1xu(lCVu3Uk869b$K+km zy@+TlDvH*O93>Z&GMv-_9H*pMbyI?DoDlAR@X z7A2GwK{C;uP@Pq2RPZX=Q5ow{_Q-aLt>L6ednVo1Jv3SmN>ay5v@uYeN_9;0VcXN7 z+mwm2IFLV)GFf6%nVarRbfhF!Ey!?F9~M$+!}=0!Wg=GciEIZMQE=%tfUQDzejqEf zBWg>klI6{3O;Aw7s`M&mvk9JaqGWfqve>>9s3)Z*g}@da`1am4(JQvR(o%iwJMy`n zu5Sr}v->T!T#NNBmQ6DdCV~$|c>>I_t)DlJ4Vmj|ndwc_C9QIKnJFpw-d#48N*1$x zrJVQ<+Xte|QHeJu+k=Gbdq?!fTqjzDTCb+`kwuLln4an^(+PqpnM4Pj_ry%PBReFN z(v>R|(&{&BI}>y&+0=ybl)%oGg=P$}G?!nzpe9I<9yhio=xod7Q!VjSrhUOt@l5LI zcx&pInxLzzt%f2-R~`zjDg^QAK}&6CJ{>Q#<V#l&E<3b4NcDE*7=c(l@2}iQJD$j7LTC7G?V=eD zqG-0L@9jm0*<2iTq9@bs{UsIaGpPi9jMc|W6CN+4#BC*iXJ+ZDT{so=;uy|3jmP`? zY$sfrRzc9*lg|e9d0mNofw7aZq*l~Atcs5u$C!bROzx`24Ob^n+dz*&pJWorn%F^G ziENwD5v^wRkfoPxCWjV+xrs~E*XnbD=S!Y{!Hk`xwiP*5-DGScfx)H13{O^{uG%_&ebt**MIgdOLl^3F|b zqL7NqqIF-ddM}cM=l_Odd{R<>E3Y=k7J`dm&?ShB&VX{+InPCb4RDU zqj!>Lq??boo7St=U_vkxt$aF}3Tq(QXpBl7Id6=FGG98{+KN8(#q&L;Ah~1!O^b3% zgQbh;Yi;{ZbXrpZ)|?L-JoE*%24Rjhb*0+U?R`Na!^|m5vImnJ8_hVQFX+mVCf;%7 z_N&1)Bd$3!)4;GT8lVOH);262H)EN&$$wKyOmKZrjiD_Zu8(nHOm}vXaX~GasARNp zZ0gJAvVEPJ(vX`rf8$tlZd?~q>`S~pZD?Cx2h)yX0tfZ^lu~Fqjn`78le1f~xebDY z6J23uS88tKaU6bITRWTyY+E-IC)aTly-aHmIwlf2+n4z26BzTI$M|7enZrH4&EX#X z941p4rq>a7L2y7S)fF%k?lRS`;OmS_<96nCVf`oTpiNs+rp8rFlvWQoD-h0c*cD=zQoS#=Yi!Sg97ZN{s2;D0rlvw<8x{}!ug8Zr9`$u)6|Z$M4_yRE8Qv;^KfwF{9J_NMX5|zn9ly8m{m*}wG8GKSDd@W z-d+h0NRvbRGF-FEv$m^YT%~$!$J_D6c(@pAaYhX#*9zS_Uo*uNqU=U0SlDutLIah` zP8|2^d=&)OL{Zl?5>dAuHpRmk?vj_9*qB9L+p1=fWV+z;?y0PI3aay|E;?`{Gu7Lj zPq1Q4DM8kvbTxx^4W+Zz}mt;yrnShmdI7+R2v4;EM5iUMg(n(68S_M*=1x*RVezkoIVt0N|` zLZQ>htzxiTeo0_!j{LE16I#1*!L<8G3~UvNUmwi9*@YQrTA4Wzu3;aFN|;w(#M z46Ma-rJk{`u+2tZKGm69!cwAJvM&kUY-1LR^b0ZCo-K`}#p!%>I=))C4xG3X~TBCnXOe)PJF53uSomk(M`R!bSw_mV3j$_vnDnzP#4 z7YU_l8)k&^to8Ci{N$Y3jI%jv_v&oARSt|>jCE41os#hNQw-<_e*ASlyq zzf||q6dj^#X6*vFbwa?n=yejwxLRi>>-jP{O!tzej%5;Tw)>{Kht;xNxHD$md0`w$ zp+VM3l>YM6!>ai%-B}C0HX@E<$!C!^bFGx4)$bhMQ*c6$32M{Xw)_O^TbO(mAJivV z+rDos@wd!3MV>Y+RVeznq%-lq_pfpK#F}94^ogdwDe;&|tHK+JsO8i466m#$S($`C2pJmUCCqfFI66w^ z7}%+wPxUg}u#y-jsMfgTb{j4x!5Ly{`(>rdyJ}Zy#;-0P)-2Z0a!$u9nqD# zC=TgVdrHk1rMnX_Zrn%34M&?4XpQI;Xde+)QZmU2b+y^l(g`g!E+PxqB$K70Y*{j4 zlRcjvE+c4qlVpTignU@XZQoQfG$*3YYH>bAE7O-rd4YL5*sLhfbqW0?n0=srU5tw= zD>zIj)fq=4s!+~mtS2+y!A^Mzn# zN@Bne-0XDIrGz7J6Nv(wGMpzsyS#H#Bs8qnx{lVd?I|njZ?UUv!f`I2EDm)gj6k-f znnt@AgeVba4uDk@rQ~TE?X%1d>+L9^U)szt%U{Lxpa2XMNi#d}LvS~E^72+D{mMu2 ze*9IMAwB>rBQapsQI-{vp{fsCn0oO8Rywj~#8Vu$mWYbmWyqCDGZUJU;c8J5FFQah{#j8xLg>C#%p z09Scf)GTOHkxX@J_S(e>xlj)KT?0xQNRD+AhQzKAhZW7Q?kaF*4COVbopvBY<+Wo| z>&EnO<Vzdw7(?^MlxH_oWxogX+hX=sa3~? zUx4es!tMNTq+K!%cgg0QU&xV!0e7~XgyLczOK)z6iyn`OaAaLif(G1osU)bhYH0TC zZ1sbQfe*b|3M&M=n6)>*D90(ho-XaXQZ8czM2o4>Ma8;s-OLLAKU!2Q6ZV}J6^md#RlEKxV~n6Q_I4q3gO&23S^t$WjspI-SH@Uu({7~gn9JA4{KT3e z%KyVFW2DS~bLFUfovk$e1NNf^UT34LE?IUecNSl_N}?N#m=$?9c8?(?!Reg1*%e^{-Jc;xmhUN?QDBYA*SOo| zT4Rc+(}-)0VDxeX`+4RS6f>fsx6#Pa3`MM1^*CJ;)x|MC_A8>&d_YQiji6vo>GAeT zL`vwB>A)ne#kFnm1!2s*xJn`OEuph4F})^vI1UgBu<1OI7)31NoGnbV2E)(WgHGNpTC;1X#3Q<%_lcW@KJz984Fp8rz9yzKzk2q66UOtIH}203WdtV+yzMo>+DoKj8VT-3e%5Ku-v+K+~j<9VVGjpY+`2L35kmH zL8?@Y{VOCL!jQAlNK-Q&)1J8v;OJPB^qDGA{kP1+rm)|hc??Iba%A^{>n2T^JY(YYhDbF0 z30-BA+c5S;*KPze6?3kXL!A;94Po8%iS<*b&9EXX2#ea)w9Z+VtivVCRs6cLV7V=a zq&w~w+3zwlY2OaYl|)UKC@hB!Ox(UFS*V*itJxmoGV@cZ?2Dd?Z`6ULG-w;17XZ?U zY+Y-*Ba%vboM;aR$iUh$wT!b#W)Hq7i)w3xH5P?s(%s$6Y9p5u<_uOsp4_^Q%*;z| z(-zL`r)BNCA*RBjYgY5Z39RXYs!dZFZ!)!Zni7oN1-;->H+kCZNYHrHG*X(H1oH+8 z=MFNO*lCf$wY`#Pn*59e>9k4QE~}L`Og>oVIEuHRLN50j>6^+M&d%cXCLcBP@5rQD z>YAG8H#V5_IwpLRS%hOn#F{2|XLhJ_0gN0XQ**aOR~nx(RWo^SM4NL7uA@%T6Si^q zjh)TI5uMS#~AHOADjvk8W!t)|@@`!AWFtY=W4VJ;Ef?V8X`I z?2Ht6StCyGO1&xgR}3b*25J#6^cF?f^2pe)*eVodxeXS!d+KIRnbOqIY(25H&goF` zG%CWm-Y!-NcgsaCxNcj`WPrw*3G=#{&r2)N*F96dd0*HD%2YU4U-aT^fj7MoV>f^q zigUV=mzUx)Vm@b1QLSJ@hUohy*NhLM;{_k&P>TF1?riv27dfpXOVOompb+~*?rB=c zKKp`kzD>1ZMaw?+RKDp1O(#k7QegQ|&Q`SSWS#jgKGM}FWhPFV7R)U@O;`-EeX26+ zKocpq<9V-MZjwt9Sq86-+81HJv5IZw9KS}MGn-W(G0F7yHzFyiTjrFZT$>m6``hBU zt4ar};6b93Eh`;LEU{kCW_I+e2<3rCZ4VgMXLUf=gt4B=!8`8eCDl1uPBQGPlY_jc z%t>F4P>GWdnmBvPKnY`|OlG0cAHb~OtF)}o4SLCGFke_0+{_8D!8*z5KJ=h>?(_nb zd8^5{9OW_zO+zp9H=Q}knXft!jqy6yI)zTg9C|E17xbuoLC!3mfJJ!l{`(AGa^J1XQDcI?Wj&z%>#dv`@ zolST4bn^Ob*z&l~eqh1MEj9_zJpT}Ws~2|Uv~(42E!X0K7D?qdE$O9v{I4tZf)Do#fu5&vV}l7o4z4+v-T33 zcrdeRcN(dpt_wvJwgi{IG&`+y8Qh=Kb`G2RI)@h%)Tk6AMdH6AsN{89C($hZ3^(&> z-V85(IK)QICCmVJu|p$O3?7wlC-Zd*HN)(7gHA$M#dPK!S>>yxWSOVjZ|7v`n#~>$Y>XuaAOq>Z5T=w2P~#rBw?Eq;Uu}N^$1EXH5|K} zW>Lkc%xZaSg3Gz-e78J}2${90uOO`z30Q%%h$Iyv5;XGpiYb|n;=ORZ7tH7VRIhdy<}&i*IweBUM0(y*i0eg zd?LNR!f#X3SkIMMXX!$3IMScw(|me_>4JGf#@H;B*tA|!X?)?P7;{)CsBUW?&OQKd zfwkJ`^prT$ksh`G&Su`Wx z{9E%ShvMVxkeihjpJ!%iQb`!8knRj2p4$O{>E3PkFW)*_62%;iv%*EqiF-3D zQjcQC7le;!DP$@s{q<;q%mH_r!+}R1IHcg&kJxBCH``G|`>8KBYDGkE9Wtb5%3W<% z3xm2kt)TNJqEkrgj#I#aVYotshtFAJl^BS<7y!ld`qpjOw4!i)}EF=SlqH} zNNDPFc{;~$URbbow!$YBJ2`EyCEpG{|B}@RyxzUXmatti^Y$QEd? zI#rhFLS0#RE1|fbe9%HRRHn_CGLx6k%rV@!-a$+8nKlwFNekVUH;?LeBbG`2g^EV0 zuE`yvPg%BNj1<|->J4Ah%}2!OYX`hMzfxY3zR6sEp-u_L)s(2a?Y5z`MMlpin6BtY z7UF_LD+}DF@`2csYk z0+mt@W^43IZ1p0$YKn8KmXmE!M*qXlXm?L5+~wP;O3S5=ipNcKyV6k}R{t+ZlQ8%4Ie zFHc4*IFgLYgBjFMLB&hc1S7oi&m;TKy_sbdmhGm#W7c+R~`?s7a zlz0CH5z&Q=l?aZ4;#P=Es8&7{m0Xs1?p78kCF8Z`ZN3CTK`6Z%=-POPO6_HLZoFAg z&jfK!yK#n&&n48 z-^?4cb`>PK#4#)n#1s1#ryWjPbK}H( z*E#g0Eb$7wbs_Qg+Z*MtTt~(0`!+iEM~hRO!w9uHSXwB=iN&U6*yf~%4?bz+Orh1YKJR^=w zp8{9B!jna1hu#%UJ79|pf!ttC!CB-*R6NgQ42!`bQ6g1H&cm;@RXmzi=G?rHqA$)D z-y_hbcctuG;aPqkBRhJk9It*~1&JQL_X1qjSC-IhYOxk<&9T+uONxrsYz^q#n{(YhD&X-ib6b z;m`-YVQN3aQ*3y~*d9sW!g9?`t|nR28#Xq@nCZ1U->xclZuX`b5}U}uxSC+(2sJz- z$0|$%zGzc6IVomZ@NM-Oe;ZE_zzm9Ld6kH%W02_KHhcF^+HG}W}$WNIeW zG#=xd-7xO%&;-jnOiVfPmt~Pu!{&jnLQog%$!B^vINQYIIQw`MJ{*H`WLGSwwa1_uT0pv4Nyvw^J+OzrY+x=lCgxT*5{6I+CA?j;rTiC?WP@-5QY*0uK795hc zyhzK7G6l$)MqDuus&rMm6+1KLu`g@banqEUv!_oqXXE^M*mawBToqVzJ}>Aj`m>u9 zpB10kJWK%J73OFH#Va3* zRXl7pGs}4lqum!FwF*RHYNJG5g{f6+gsq_9niV%!-Ob?w+pUCEEvs{%vm!Hm z=}pzuro#8D82R{VL!^f_O+<9kXx3Iu8>*hPm4TS)`@*O+>BA80D(TDQ`WGwTGn%1n zJKK{Q(G}-}=DYM>yJ%V8sP*Pf5D=o7q*!h_J;~ zqtY)U2Aa%O_S`0k9lyBKF?_uDzi?DoeMrd)0fn`45dL3^|9A1$r%#3CUhyc?9wcXv zzI5VhQhkP6`(i0pZO&1mY>U?4zOn8*efmY&-yi!%f?r;#wY{h&2)+SwKA1*FZX$DX zYZz%*q7R$M23*~Ly0yf#gM3p^kz0fS_~{r50gJ6zWvs-nUfa9IxnXO1 zV)H_?@Vroc;DVT0(QQ;2W!%MvIB_+b*px1NK%xIXAx8hQEnLqkn0A6umOCcPKTVQ1 zZtK-N7f-4C_W%NHm`_NRJ9Eu~QrZ6jX3YFmAUoi^&TaZ;hKQ(ifLW`#g*J^DoyL&Z zPOP@EIYWG6oD>}&3~y~WCkAQ7)ULFpOwsqn{;V7g*B?)Dq+)PP8}8it zVcof^jl&xHvMFUj%~aBAYhPYZ=360rag|T$>sy45z>6ITouA1f`pgDe2;Rvk>r*~-oF^3Pr=eqQMfa2Bv zrZlB-&(T++`O`!jK8*bb*nTes1p&ap}^Y+NQf;uJ>_1d`8cm1fz zE@G{$2l$Aa_EFy01eTFqd~$_lym^;WS+754DITVYPMnMvG)yGEJIGd?9lK19O2e9& zBvS)9JY&<<=a7|Rve1OARKGwF`iUkD?N=Y7ekj1Qtxrvd`m|&CtuLzw`nx7F)_&%y zC^Fg-(y|7ozKjo88%LpU6stL8KBX^5XbxoFhYaOgYfSHKQ8me8Cjf5uirUg{3YE(U zs|ZV&&y#2&E3@L(Xx;fs`BSt|NTtl{5ws6F0%#7O_^omimWWlo9qO&Pf*F;mb?!)| z50531Ms+4$z0Zk$=k-g3z(&UoQX%v{&#=s=B& zq$c|0W>1&SS9(KJh@1^89T!HkwC)$p?03_>P}fsXA^TGN6PMB&0s4MmN0v66|6mEf zBoQe#MSJcAYgYlhzD;b~UfBlK?+)98P0k))+RWy9Iu`lmaUzy5Mif4FH`FOt^4%rA zv1u}ic1L-_7Ak)PNSINChG7=@hWIf3ajh%trKMPJ6YFo3Y1YHe#}^y@@1M$w_HDy0 z1yo+@aI_P?9*1AtvU%sfj$oV4qM;quyB4*mZQDDi9SKUq%qb>TI@eol=0a70Z4%;c z|6NJP^k`*FZ?;I^NT#QBju{Ideu#=&_Eo!GT&A$;MP3KQt z(yQ6_A{Z@jid!Gmb8gjq#?*6|pRoUC7d_9QfYniXX8@o>ALBqO%2GbY^`7x@3NAX@g3L!*@}=;P>q9XZBPR3(6{ zhMwy41*lbXLeo)9F4T`^%)f%yP-Xmw9b)B1C7)@CjprYS`GYRAKSv{_H-;$wesD#D z!pXZtajm7IDLZnE!D?qV`SW~j9C~HQRLj|$d=DQ(kG9x^+5W%CXg(hstED+{BONUH z`hvb2(5i#a5r}jLdf{ZW+@BT5cO{qb^diBjT<{_){v;)8*c+S3zh|{|H}99jfj7?4ZD} z$ zJz_TwH!o7V5EKm+1LMDOr13j5mL$Qcg{2UgugJMQ@ zoPxG_OOCq{j5SL}J`SJ;(Dac0aFjB~T0@-qe7k#@qeO&hX&a|anmuv$d^6|J2Va~! z($T0Y^f}f03stSX!@jc2kJHSygg z$yREhMTmi&$<#F>G?KnXlnam8vWL4?!eXRNa^lR&LLxA$Wv-~2Tri6a1Dwp#cLsR- zWl?u9YQ%^=f+_hFt4z7}Zo1c0FhxD0NvRs%hiX%b=X&T{mFT9)PuaN-D|LNrV|Kc+ ziCg1!l~^t`uGjp;uW9qA1H7=rILS0Kh-EOOiKQ=ORzvNWYnUP#D629lboWF{qSa#>umuY;i1P zmJBr}VVqEn0o|q|$j48H1v_x4fnd#_5mYzXu}>tshQ%i9Jsw4|xJ;%+7Lx|5eHF}o zEgZm@-XP-Ieb>iE(luDcmX3h&S8#NM**117OZp2Il=K#JXDeHonlamhI`~PIaEnbQ z*pzuQ{0*mmrM7(|$+*4viB}4j{gYNR|FiEQ6bGyv`q$YZ0_)q3Xd`Ew+Ee)QpCr<0 z>8Y$t@;2^}Si`)A`k=ZY-0Cq&F)Y?#2XRgAcn|fxA@UK7m|1FIO(-0KG|Zbdb9S>` zd*O{SjnXnqI^>)Ar(aVj%>sba)TjH(XO=Oyi%v|m5u)lMu z>EvnE+{fr(9JV!^seP>=W7d)MuTF_9cxWb#X^v_z(t^Zh2qr zH0I{r3oU_}H!lbklCWgwV&?djvxQEHwIQ)7;X;g={X}ZH3b2-pqIS%@hnjDfF_Z%K zug|EcMM3>7ah`}}V(ciqu8XHM_|+UgON$P-R>HPjuQ8L|fo(IK#|FcjEdQhzu}hcb z+ozcQYDvt$cv2jmnJ&g@tAyBrnaLYdOs26&5$+bU(3J0sp+$i(-(}Qup{F&p5u4V~ z(4eH#frCJAgD_fKYCeZ!OkDIi+t9)4RnfeP3B0ioZKCX;oG59iXQodTtwqLz16$G( zYX|93Cd>Wxpj|!JZxbz|Rp}ozN-zDJN9koUo8dNvI@6JjOXOQyjyKaHP1C}$&YYN~qw(%*Jbv8k?3@2Q9$mrq95*xdO_tJzJWnFl zuDRI$Bp4d6Y8xugtgcx?QP~(0JAgl}QlS~3Bj|4&?FagsM!SInczub1q%F5>v>X&v zo7J{qH8ddAoL0%T@i;H2wku>Q6w`xh%3X&ZoAk1l-aj;FsHf?*#P%HejX|{;-!q9# zU*HnhUBmy7gR?kZMg3Ws{2o}*tl_{ zRwbC3E%4AAYc&5XL|rW~-zK08BmKEhvx1B>_g-;cFI$ffTB-^Qih4cS3cCE66cc)H z)gR8(jMuELxKW-GBJ3F%L}}=wnM9$DK2=dPNwWh17)U~7oJgz8SKl~w>OV_0-G2SY zmRHm8hqJTkzA3~{!Wn%{PJPsLov|eWm*~@L2rPMNlkH)8A9gV_8M*b_>oLs&N)vX* zOg=$bt(VD$#bz`woH)CFDy2p1d~U*Fwdc&6i*`7@Tw+c`7^5k(W;g6d@iDE6(!+jp zD$kce7((U?5leirZN=6a51Q4acQPq-OS|aw+H(udgq{T-R$7cCS!tfwJO>|T$84GO zvoveAm(!KEa)I57mJ!#UNC@d}uAY<01X)_s5y0*#0{h(Xw_x1u$e<6MQSX4aaSPiaKAq6UR#1Bqt*uBxNSzV@rEuK6~D8Pwa= zPoqm4LErA*_j3_b7!?Nd{+YsOgJ7nf-|l}lMIdODvc-22*$wYDUu}}qrFkYf1d`8> zu^FtF+q9g7foaSXs&Mt36MZ@)Wfm>ml)+?7BA@4VVTOiP;U=+h=Kc%P&X#OTY~)d9 z&3}O=bHs#h!yX*b=g+FE_$S_(`VK>QpiP6_u+=n1_9J`tqbQ@vJ@fh$B!%p>66c{4 z`5<|vj{NIc1Gy@33mPPOFRA9Ed83KKhK6vg3$GGBEg zHdCL#F_TU=mG>L*m}Yu0HZvKH%^*9;iHnq0Wtp2$0@=s2vsJR#O)*SJ=(5$xu!7Ic zfg*RxL+NL?hHdVbs>%%YbxzYylE3Vk_qqZlZ#6zD5frtn&uW^%gg(DzhU~**vzix9 znMOmdFC*{9C=B&}4b5SHq!v5cELvmRS(O{nn=>dhBS%xUOMBuK?;N{6)^8izgBSn% zSLiPu$4@itA)JKIjb+&T$etV}8i&U%TysbsSo82rt)TTJHd zKqb$x*lbm%6*elWG6Rm1Dm!;I)Gt7oh9xpen(fXcMVfTACB@xc3jFMp{#u5)C*8DJ zP#w}=i=wKRmb7OT9QlL?U}9HStf{9>Z=I>> zH!Y1>9*rar`ihos7ztW&OvjF1(IDL9YvSN@qPMso=}Q%I*lUY5(;O5VHhtkG!K;%b zHM=%`^M#XW>KEKP5>1OXRLobTh8XwWgmC&PKglA=6-|s0t+rZjGRE6+sa<0`ASD7F zQuI`km5C!lKuzR?SI}ZUr^2gjh6|Kz{g-hmAB1Hk-IbQv5~pnX(X?mSCI9Z;u8i9X zUK3Nb$L331T7=SCS*G3e;jQ{-SF=7FF1@?X&vw*9+;_vw&Wf4uYr(2O=f(LFyCQFv zZ=5y%;evvRGX8eCBbq#NQh}^=%guY61Bsn<{7e9u4CK>nH=26HDs;-e{m2Y~zckFX z4^g?y@Z<<8B(vA&tLB7$=$wv-lbFxH3jBIzG0!5i) zNX2`93ukK}OxHgo)NOG=&K-hKWo0k0By8qnP?&?ob9H9i8I^6i?QrkIzQyiqB&}RAw$7p(KXVwu z4Nk3-wB4vNU3k=$S?AZPxLKMs9a&MNF^nv!S28Y+f!vZdB`nP3q9{|62~lM5VY-rN zSiBvd+^QI*=H^TaeS)&c4%3vSQWdjR&2Q0Pe`3e@>xVo2jVU9Nq<}|#^sXbuJ5&&E z`%T>YkVgiQSf@d!TqUU&4fE<7(O~_ErW&2%KF$(G%jPq!5mVD9kY-CXmhRAe#ygvNgdrYEr>0$WRWRnTK&%kypLu!V$o&D;n&f$bY4lHPySZYreh_=&6-;^$v9#h zGl4nT$N`~w_FVb@)!w-@$8lYGzP84vNW0AdIYvRE*jB4)Qe%JwDYp0u0+K}|7+?V? zfMq<50w@BO*Zu~*a*USVN*k}VBmKSR_dn;{n>Vwvz+$v}W)@Q+5mlM@ea}7bbFPl7 zcV4`6raCF;aMRGZC*B8z5qwR&kLbbdLD~;hV#WK~_LtW2Pq6L|L87dhDrxb{}OfL|Vsn)^F*5`}M$`VB3 zg{*x3HLd$-{5`LWzB@{iUNDvsYbXL&wGgeyve&#o*SDMar-43j{}KP#lSBt)+3CZ znHuBn;8@TWt`ne4W7kE2dh3M;k{-P1X*1!lEPn7{IFO7)?ozjoim<(WGtaKUL~RoS z>T)oEZnNAoW z8qc+|3sujOu-Q&2B1SU^A0FQ|rV1R@2_NxDvM3Jsq!)-5nn4tYa@1a0d;ICI*%hRn zZF?ZECHGELI$e%{wC(~5dz*-`b6@r-cm=2b_9RgZQ#-sgT%fM-KHMsMG7_w6>e4-n zvQk&=zyzypV8u+y@+UJ{?dTY`(-QL{)@;M45mC9Zg{-u}Y2HAgFK913h#RjNc*kpF z#=MHV_ck3j;trhs;SM~s+%*Tv2Wl>sJ!ub#AWoFTh@UL*2ys7Z#-a3IPO0JVpR?EO*qXbaZ;;p$I;)0eazY@9?RVY zhq(>ZB2VsYJo|cy?QvC>JQ?Ub8n@*EG+V9OV?DFO3>gFY6s_Cq4m4gAaca|#Wpjc6=7kYQR}s23V&qAKH$YdK#E608O%p)eXP-APa{rqODPCdVnbi#|+M($$Mo z%jOdLus}bSGS?^{>i7NBl+o7>)ThIJElby~M5`ikjg>1_D~e$33(lP*C%}b8ZE~U>W)+-y{dD$v39b zlvl??I=^eZB3Mp zfPMIMH7X@8Ik%W(Z-1BF+ca=tdEI(iUgCLDdomJmZd`@f!%ik; zWBSWDi&HG}Mf^6xL)u_}a=3pG4_a@EV)W5Nv^h)Qr0-yxKu7V*4N6uHU#Nrpr7mWd zB-Y(Wz?cDnO9Ux~ET6@t)yKWbhY~A$5uKYyselm^i)8St@tP%ip6fZhWNhd-FrFrH zAbvL7O(6h_bz_#irb5=0cw9fWK6(_*+bWQUXaa#Pbet5qyVtfz0At~KWAk(CI z+jZ6exqN`SL8=F!lWHKInE4lFV0u>u|TvL)wX`+*Jr4e zQwjTt4~j(W^Y@mv5v8hWo|3Q)MR8{>?ee1@s{O2ymGM3tpRt##Um#x_@okj{xk=BY zr%REb0VK_K=qf)wO=GE5ZROLt%~UQoXMAbW-u5DvH%j%qRENhx95GvWKmP?hvDB#> zi%wpYa6&(u#220h<0-9|3zcVjh0-ViYW%D@ETdOR1BGdObgF>#Oxle?waQ%nQru}r z36J6iE<@|&sQf__o{afAJ}x@KO0eWu|Vo)wPD^=J21pyGb8B>%F%+|E%l#EYmcvAr)JPss_MxnjVD^4Sb`XQ zUE1RF3gwbZ3@GBuCQS@Yr_Inz-2lLrK#>G(ckV51$gQQU{YMP#BS1%O5)UG>kG3Yh zJAp}U8-tpE40n3Pcfx|-l)sZ zzQKRhC)aO&eB)QwKfduX1^eX8hE7eCyMCkk_}_0{|My>gOooLy1t#{_Fn^3eDN1E` zcSyFXYH4qeRDNILjytGs5qdwm_$`Ftd~mo3hyFRW{EqPc+Hin3*xK32o-!8Q+C4n$ zpPuy3u75K4t;G#3`niJc><$+Xho_&!nyo({T)g{npC)lE zJ~^Y|^LIaPz58+e?nh1;OEBWG#G4mAOEkKqgd^P9a&dOJf40YX)y(pMD{BXPKYRDX zcywUT>Q*-g|M;Hf_b{r_r2S%_tdHV0YT8*HoWA>!OJuk`>13ep?+(vL2Q147wfJ21 z)sTMppD;ERzdO3%u&iO5I2xa!1OCVNxI(oa zd%>eIm6x{ZaI*BoJFBwvkM9TXzJK@Q_F!+s^1uBX@j`nH)E4aB_ZTU8&74(Owsw6u z&D+-6=7{nKBVOHq`*%p?sM@8P`Y*94pVRX8@ZI;L ze|*oCFtUOA?BD)WUAgf~klyCt9MnLwC$?EMee25ja{<%R$v?gyy@qGp9`2289T`Wi ze)#sM!|Lr%NaUlfQMLW{?|ZE2+n+QvnnFu+psPUlcSm)V7~8=>>!sP%udFqch=WQX z#C}uT2gT6q)(yxfrml$(ZKeZ28<`W9ZL}A?`xXl%u55ERDyhGkv+Zt;y-Cf$_oi_w zSgxaqyU}4ji=%4y?cWt^dq6%yrU5Xe*1U|5Z9GCD_?i?JzC-&0vK2xEe6Pu&InvqT z;azQhe3!pQ8V_5bT_9?DAMn>fDVM4@_a$56kwNVH(K#2-Vw`7f@%cTgv|qz(B#n9d zw*#O9)!Sfa#A*xhz8swnj;%f6yb@^C{eso+Scv5_A3I<;1~lj(PxSm~Pt!9~)&3i; zPYu4%8g6t+ug(lRy!&2HMYrPE)<|KwL<$=1^XV|&n`^Gu6d-680^nmEx!#N&gb^5l z;A{euC0kHyFwf4W@{kvIkil86h9n(7_MmGG{d|HJ4fP3CXpVuj(qqSndSL?!s1g?@ zj5Vd{cRw5q{t)oktf7V$Yu|)?$TRMXm*!Le1JamC!jDk~jJ(pxOU}Bqt9Qgj-k5Ca-pa!mVnA*rqXf)QnDBayCEDmY99z8GB)7Ltkv z3&Tp>g1gKfcVLL&09144Crp^k8_Ax>rqc{JI!U*J8yDs>^SGIu(&9wupneGmqb0 zG(zN8-3A%mL-&vd0>k$9KT#|j=g4B_YNP#w;khBmKqfX&fsmbg02h|5(Q?-SpAYtF z`2w!osw1u%H7bUiJ1oa}es1WhwccERB&OaNM5sp-HS?Gi0}#aN!3>RJa98@*Kl3zZ zYVFEri)1RVZap-@hxYl5h!4FmMghsF{P_OWPu4ht^)LUnY8*NYDa;)QpHDmy+xXwu zG)l`=441Ik>a!lb5f;QA#&L9b=}XnCs&_x^fVr*UmF=JPcp^+%rUrC^xoSCopdM?mWA1n)m|fvVz+kU$RGQ)-u! zMT>Tlyh(c|veiH}0-#1hGEq-k<83Z>5^NV=*i$TSn90uU+Q zvfqbd&_Tk+aK=d{9ger><8YpF>+Me(#_rbEFV2VEV>s`hoE_Sh=6~M)WdOg*Ca{aJ z!UrY<8ciDlc$_=93vuLe=%u)o*5?-M1M{0VVJU(iNcu+hLam-y zXCW6`Qjgwx`!@$Bynz!~rWa9d$(_;w9*7+_f(7Z)e z^$3m8x3;kPz@(+@q&wga?J0-KVA+?l012^P9NRXzvC9Q7r!|Z499yR-wCe4tQ4*fq z#jr+FW0se6*@IvHYt14dgk=nHFmQrwW3ZCHE*8M6{`&n@2^E)rfBCu3VKY%%!l2{8 z(=(7zI@7Md6ZP)EF&R-b@C$2)S5S>(q6wC60vg`^;M_t&*LlKc?E!SblH;}#Np;l6 zS8%A?-2Pb3dR2a)7Zq9>JKi;pj@XC#;YPmtnJ)rj5e>_?$R*^kr~qexk=?Wo zX?!m|GnEHQ1E$QuDe0l^E0Zh1;FObY=QV~Qun@Hx!sJ@peM*su ztU*wg;GW+8bkV3Dl=;wDy-s?f8>aC5=4R$@%FrMb;GcqwvM16&h#Lz)ewZ6;k?;of zZIJMqfJYmTXrsOs*9_{SxF~q=xdtngy$p=lbjDuz*g7;Y91*@zn6=ZU&MLCG-t64IZ#ZJ*lhqtYIQ@N zq*craaF1#1;ji7tO|>o3FtV+705C5N#k8Uxl;hxyOLQF~z?H!vY9JC?n`Z?Z%HU*l6Yj;DI~B^EC5G$snSU73zn zQn77LShuo$Dm}+GWzSp@Kr`_%1<@L}5$Pjjr@s={^_L9MWaJIgn0~by`Jl=O1N)f8 z*gmSAF&H^7&}iWNG~#%={_Y3p%^rCaqysS995w#s<4@nHpgqa9Ato>FUGuFDM*Z;Z zU**0`fVc2OS<%K2HKUN5I&ym&ACFKvNPQ-IS+nUpe!Mj_DJdyrH>s+t^^`Y#%2n~X za;94etE*^nM#R3KgSq@l6;RFvQGSR?7*t$uLy!ApH;H>KNs~_Y1w#FEYlW!=U8dVG zTuE;n+sI>V7ZBE=BER1i&9W`QO1nv6@eIW9+MlCu|r{hpCA0Ew*&j{71YxiPV zoM0x-T#@UJlC3G10h0V+t8%L@5|&LM&Wys1Rhay7v~R?pL0~x;W5Bif7Pq5zk0CE- zF^cNHFo;n4Sm(RaID9!np3uKL;oY2i#7NM8~ zmTY>F8=W@BoCiJ_Hbub1@-?2RzbNu`pG}8 zB|sGYQ-|{*op_YVMir?Vibic|B^t<0#gwZ%zFcOhJdcf-EH3(pi>!40~f8 z@8*uXtpus#rh%ZT3`&jJ8v8782E}y_m#W66ZGL79VPrM^qZ5`*SLMw#i&|rt#?XJ9 zCln4|E#QftuFY~KM1YADQa0SQ6=@P-BZ_UDWnhz?EKF{g@vXD8=8Gezld;%eJ1E6q z?WpXLo!{ZQvEpAe9Yx~US4c7ckp3HX`U95RYO`mkY7_W;$!c5I-HTn-Hmk`cNmDU6 zG+hSSb@%a^Yp%D?XR^Af$uS=|3Y}#gLq#v2F63qKMm0A5iVfg?n#u0|(dHo81=G<* z+;JlbKGLv-V)x{((>55+G796HvtezKD$ddj2?{;zntJZLfZ0RvEGCnkf70w(W0)!% zK?8j9kAwyihhHLqf9_EF-)bm?Wo{vC=l+W?t8OKPs}l(CD`+ zLQ+2*%(5pBq#WN5)kSW@=ej0{95tzY<%u2Z;*)^@BrOr zvJW_-wUWLb!H5xZ;7q5cr$WIGOn`2sYYp32FMbAqbF2rG<@nIH>F+BYqfk{qQv zjrl}-+&pj$Lm=a^t1H+TOheGZ=pJW0<}00XyL!iOjY`K=LXA!-r>+kx+EZ#CpQKMr-FCZ|pA*sj^ zF+{AIT!3s8C>vVl*$DYY0RulZW`mCP=Z_PR&Vn==^_6> z6uGGj`2cYsB}3G49}z|j7Slp zTpq_PQ%U?=In-b?rK#1B>j9@1K5!!df4cqMufFU5Il<2?T?XaIAYq<}%uJJFZu3El zKBP&9rC`2w#xh{0P4_^ocBnd@9qR~Ys)bP>B8P6h^`w;Ss1 zS-S6p&swizr)(ynqR}(v6h`e5oefyRS5u%%(iaSli(xJdAXg{X?2e($GNWXlFXS~F zf=9g8qZo2m_2;*5q0Sn8zPqPVDM z0}0@PAmhBaD@^Olf4@wn*Y1D1IuACUiB zXz35DRS+4>oIJlxpka?t-kze`nq^db7Js73jh<1CZ4Fm%l%4AP^o|1%E9%U?Cmo%e z{v-Kgrselx#4oehHkV%}^n;(_TvluqC6UAGHc zmJMiDn_D$Y-(j73pV6&7h%>(B^u(Y40~Q_|!w1+roX-FE8JL=Y)TOLXh7Pycz@#;7ChhvO z+f4qyrW}28ayGMolK-Nn{Qnc-_YvV)=uSc+lYQvg~pAq(hOpFvC z6xGq{%rXq@Y}v{t=cPW8(`do{I$XSc@YdlDKt2(@Z`ut7hEHXGcGQ5fXO*>S;I6s& zy}$mk>PL>rvWdsW$0ZjMMeSu0GPfgZO(M2Z{;pk%l>^U!Lxc(>JJGQTCd zRyJ6tRPg5Ht102DX8hRmRW%s-ebVssH@O2#bwD+%Yc8MYQw|ZZBm~Mo2+kdW3)5nw zRqkj35D*cOE-ima*z|DqBbA3VWkH7<<4q5z&VJWsKk5GC@R6B9Q-ZW8{8X4#v_|bx z1oulcnm%2Q0kMEvRtP>>v4ZWX-?s%t6pkrdWBg-hz(z*8pXF6QMCM?0^%c&41X`F& z?X~7YDu_jbf2*++_i0i332bpWoCY>)Hc7ugqipVOBi)3hP#5nSs3;l&fCY2(fPIW35Du}|?**{Qor6=L- zM@wJ6`{D75H|p&72@;Mx=|@t}+p8;Y|3a1}^I|yd1KOnQ!?lC}1#~quruUKY#?V^C{y_TrD{`Uq ze0sMxN4t$d;&k0=6CdL7p?SQ>-Dk9$GVvvXGlMu?`i^q7a_)S8bc$NL?Elivy?FHh zej1(!So*H2v!KFeEq4^0b#ivD%w@K=RuHahvB%`$+9V^G3>k_}#yjNwV{jyKQeDMG z56XW{%l|-oO75@yv+d#SyYGJZeYpTyeEX{EQrurM{JdQn+Q#euxt-XIb4KjAeU~}ks(bsR2rtSA~VUG_xS%wMg z`$uqO&9nn4mIVlXf9G%i24{of3Op&dr}uo;AV3S1d3K~YT=OJR0OHHR+3C?d*Oue7 zIlu7!w&wTGwnp2kKw1m^d3CIRhugc+NdNT>zRl3kAGjWSp4Ep5rSrilcf^H?kIMaT zwW5>G=`qu^o8o2hOUFwbON}%R7TV&D>q#%_u+K`VS=OO}MEYoNkFr{qObez@q94Pwo50G+|M%UHgBAg6>RK{ zxz_ZUYHgqQ2{!*d*)mx2xMJM9f*+9ohK&g~H#^9eE6}?m44KY*H2D$LQ}Enrzb&eI zY5744TzdOc3SDZBU$H=1*CjbX-Sh-Qo+uDhMZ&!8dDs$nIwDyfsak;>BKJJK!_zxT zwBu>@QZW*rO(~ZW@V&3S_m^8WK7MD~jC_V3-LxveP+*iMX&#sG?8|H}QF*^ryb@`> zAlxYiL4|&|^z7ax%jQje4Qji*{|K)#<@(PoTjI}tulSXp5m=TIIi`@8oIJx3R=Z(F zwZhE;O3=tmZYt`|xE%|)Dt;)GEQNouPt9NLMytk$Mc?PDRV_x*f?~*c;6Y7k74O5F z>I8#KJuM>{N~yMDk#H(RjkM|(Avix8Z;Ve5pqMphMrJ0truZuQlD2~a8{qkyY~tsMGfdqVyQb``r~UZ-7Xb?|C*{Ij14ZChmT&+0&H4dCf6|I~r70J|T*Dn330aJe+oj(pMyO+^wV z{Zd{Pa66wS8k%je9T# z8f`MOMuVE(*mg?%Pzs9l5LzN9wT|K|+#Y(gdp6wI91;VGq`XbV6Xjz)IU8PUH=ale z?8ijMq}ukDP?TKWPH`-X^MsXMdnjEliC*?dg#7M%@lSDJVknxdYJAqHDa3GAb)+(+=`^Ht~r}u|sk{<5aLu-V?kzewq#+s>e@zyF+ zwNMxv40BY$Ps4rtYrIQNaXD>}MeAj&skzkHDjZJP)}>U0EivW^vXSEC1(;&l2*4)l z-1H}&XU!P6%v2R~?D*=Zb%w(97Q98`);d~?N5<@F2d1~{{jT@Fx$#NT4E3u|$uluJ zRdBW`X@zafQyodi@wk=W`1D_`O24v6%lg(a~xJ^n{!kAGw*B*dY{p3X?a$s!rrv+OfK-KU0 z7Kg$IFm@ca+98<&~0_KIa%|nRlPP@7xzIJLQ_3dSJy``OwdQe`|d}> z>g!vLww&Eg>D!Rja!wVzOREb~*DxT^FbV-$Af9&t-&HAEr74RPwd*_0Cc`PtCfHbO z8X#x8E#6V1%F)Rmuzc-z#o}YxR2Z99!Sa;^L~tY;Iqd6!qxvS7HQ9rFx@V1!B1(|( zd&T~5ld~bUQ)^TdIbaG-dEtwI^RwQof*0~py>4_cFlRLBB2ATOMH*3|Y2en2n$<>L zi{M9QX`LEQuY#j-28Prlbu<9w4%P=XRMd_7P!n*RLXf4&p}Z%dX{{b-B1Nv)6jQxI zb4b-cmK)q}_Tamq6e8p$#XFU3ew$~?#^bs#YM*GJw6Lz7CM(Oi2k{-*B#THQ&*!#Q=rsOnuU?d*)|&3XZWse%PbHx`2JG=NpwbumU9 z1Nb0R(;|jf^~8tcJpMN3mMM?3Fp`+0i0iCX3mAP0QcW|&TMo|Y(D~>{qQ1o?DneUGF(!Nw5~L_qM$~O_CZ@cgyu@puwgGogfKOE4~7{Wp}nSKm+pd`!4icAQsNm^ zZdiyI(nq!#M*V=S2uT4#LLqKxrqGI&j>Um_9}iD|r^|GnixWoSgHD@rkB&$;wr|FL zNu5#%n)veW2T$H&-60l`HvH@r$+O7z#o^D=kMgJ|-#8sAE{b}zbmzh2drwHjq2L(c zJ5AxJVuQBjqkm#w#by=d;qf=*nbUk~RttMxwqypj`27}Q_3AkGPzlMeofa$ zCmV_iP#stnAE`@gf-1(e^6(x!6U$82n2h`EjOG)?D((>zBl6$|gM!$(14y_(S@fl> zMy+B>c(!h>8wz}3&KMcg0-NI%9q?F*+>Xt|*BxkXS05~r6fF$Qb~A_u@NmeTr>`uD7&ckM@>j0tI?B@{ z-CtVW(VcN*5uQuDS=^^%CFAChy}>cp^)T@2$`zWN*qXxlk(~BhJ7Gh!M0Q^QCgAoF z?U-84MRe<}^B*bpgzEewt}&FfG;qJraUrMdD$#mduaz`eF6ya7Xu6izxqn6*O@-F~ zlVd7Y?WSxnmdkS@IZq#x&c5aE!72R2e6tC=AdT&Vno(43S$+!F!Ppt$1;<3Ctlv0A z)TMpg1}%$P;iWgJfao}b){mT8>|XRjYMyLS21?^=HC)R_6w$@CV_>J&wRz}shh~>+ zbeKF8Q+tgLEe}z2Xji7XM(%!AEFVf5LyFN7tXd?l1SrC|NohQIx^9`_xTqB)P7I61quNT6RmU<0<&3 zF_Uo!dPN)1iNw^Q+lBKWSx?OT*XdD4}9zSQ@+3t5%<{K6`TSUI*`pTLjz+{(g0K8)XD$ zhhQO{D?)I}oQiRR!6b>zaXQJ8lp}G60twD4ZhDbqhU9k}buWF_U$&`&gY9O>+kYCL zk6(WWZQp|@J^ynN78-u9iBVwM;^A>vs97X)0z3Myzx^Emz$W1!JbH8cPoI5v{p0Vh ze@bKVc{bQ1|G!E1WAa5^pfX$F3Nriy^oOWU<2UxEZ%As${)S$?aWb-;hCih^lLo@@ z+G~D~Sz^)ZlT}>}>3zojmt(QGK~4)$f3h#9Ld2wXsq^79ILFv)v4NXND>x8@Pee4; z=|pPpQXV;uVaAsMBU>evcnM$}(_cjyZJN7-Cy$F%n99I6Pr2Vi9Ga_sdLd zsf=xuuEq4!_(m`>j(oGM%sjQ4k3BF#A+L37qxH{fk|yM^F4?B&7TK@C;kWsoOTA?h zOw5*?HAaO^$a2vpqSKY2wT(RB`&hP)w2a~UX7YE!O`a>nNHdZO^MC&FbXgi^7 zz zmID_=3nG2|)kEW5P;MZMA){cSI3D$%agPW?B}Ms`R$iuG7plFPpuid4$%z>P-> z+Y4_pX1uEw@a%%6jn_YhTTzfWQ$vi?XpWkU zn~oP7gZkq3E!@oUMh^sbDfW`{6P=0ww7cTT;{sJ#SY6m$*k4#)c=%`eVcVLU=}yaT z%T2~Oc5#eIX4(>o7SliD>UQ;SB+DgEVwJC-`PV|k{nPku-QBKke4^hP)zp*o z!KdbVa>|e(`$5OXd{%`PO7FlpGboIk0W9qJ_5gOkiTxy=Ck?Q>%M z-j>Ou;~YVI?K6k4IW`+xwPNemiHxKCMvAcGOC-h76l&&sugf?et^Mjr~p7~4NpEU_fP`@2ML$s@zHqnrs=T0t8<0!k{l@Y5*1F^p6+z&vFwgs=!z|~P%xjV&>{)6(_xSGK)p46 z=t&ElbnC*VHCZ&Hi-i>Q4>ccrRe%r@cW}p}?cHkaXY49O_hyl9+ami=Z1Ww*J}1uI z1O%l{L*BP&PBOveUfNwnlM(g()G!z$GQsE6-0*ZvJRykpv__vN|%~&KP#uC0nk9(w>%vrxX2Fo@y4X0h4aJHR~RL7 z7~d*a+3_2{!Wtkz$BpH%kVNNNp1}%yqo&f}!&%i9#IpRrlNEYwFQ1QdfOBRpQV5$; z*~r8&ONbj?2{E1tc+4;X;>*aa3zfBRt8b}NzJW==Gs7p9{}nPr(GFt*&*j+6f{G`C z`lhiDUu%2<)DgK)^XG#lFJ+cZoLC`C&di6s8Q$hfD!>0sNrCJ1JBBP^>s)$EytIj- zuwhMn%H6lJ2^dnB%5ZZq9-5LRPYnJQv8W*QW7$@JX5-J5H;^09Xu8269F7XkDI< zr~xfTF6uR!ROxh&;s3(qXYF!UM!GG2dZY`Pi*Db#`(*X`QmtG`&}^^`MIaW>0*MfS z(oH{;brKS-?P00be^AS>B?*#rE0_-J(GO0rFiC?GfLLfcI;!R#yDOJ@iN095yK=9X z;2kLx?WV%4T=6b}HHia5tRh=v>^(xC@qFp`4<0^vL~Vj`(vpblM~HTH2F7OBXCw^m z_r4-L8s0n5`E}ioUn`9{o%JJL^W6`ReNaWqx!J=JIz*|8K?!KoaWKZC&4e)Nn!}F0 z`ux%Q?Yk@Q{?`i1UHe?p6ougm6L)H8<+8*iwF|Q>etpOa=kJ&)aRlWypf!*yvJj%C zxX-ZU;c$lilKI)7@|u^!ax6ws+* z&|+=%Jw7^S-JF;AHj74DUz?X{rTx=%_?XBcrT)Zd8iws_mG@ZJp2RADq%khn+}ex& zuda|GmNlJV_TAW{OH#H_QCAfgP97W`&bzXgO`nHwC%+0@yaVv0{t0%ltu%Yw+O-LH z0C{=X{hZ5~#On>$`)Q{Gx}PuAjaXO5?5KkLa8g#YyqULjYu@H-k;uUMWe z0jeDaY47DZqHnrsC^DJJZNh$&j*I?BR&cvgV)_GaGsPI0&YRxo%n+sL8KvFh%U5e( zZ?QhqI?IK{BBG@6#`u2o-rE`AxFI+{M$2r0b9rNJMvZC)?_goeaKC>*9y(qAh%U&3 zRvKk>Q4iM0;hw+%Yt9t{5cR)HYK}RSM;a7Tu>f&zi4_ZO&b&+r0bo{I0C@{i&|AvX z$5&uVDM_q&XQ|t}GCd`Yy2V`x50*`?$cdY4WaWXw5-Xhjrd9pLmGLh^v|vttAz{Yj zu4S-te$}*H2{?acJnzUs0+yUS8Ss@Q5L(%v;2N?kGuQSva*bdFJeqF#@wr4Q`PZ;uBZrm-)=QsuS9xEx%Y8d zt1%ATY-&&%{nGC3feaeIpw{zXQlH48t>^O$q$Sb#rI+#- z(V1W*7p(0zXw3SJ{Vd!`%pIzPUxP5<62D8iVYi?gB{lk)?8jR)BwYzO1w3=WC8U15 zqC1zTbDPQ@&^R*X{sFZa>W1tNZtOaDJIaY`=Ppgl9)me`?bgnC2o)_SofpsXoUXo3 zuw2AR8EF!_7D4ik>hcL&#yJ)~y%}gz&6yIwpJCS78t#MB?Pllb$GqXOv0LM~WE>X#AZgh%_y;C4mRNF=qsjTWFm|nzg zrJqTU>iP(`U0DO?T&ykv62?vea&CP3>EKv^uOxdH^f>Y3ynsquHgVc9Fa%!tZc$k6H z=$jDAIvZ{BEfG`F6Nr>ATO^=-Wr9m44(0d^mzj&VwdWB4ae&j0W1N-E-TXjkI!6?U z6@dfMWYC}re;tI%$F|3u4$nF57mb#mOCU&e#@5hc+tM>2Psq#e^@RUXRRx&GV(2SO zrn5pa;hyb75T#7K;5r=)b^ucCx*T=Av}iU61s@odP3@Xbe(aG*4u0q3QGP2o1FMxy zleSzvkxKigI&_18j*G9P!|a^BWvpc?1AIawcgb) zBNMo6IL;wzKPHOBb*SN_5e3cBRs6HRMLZA-N28aNX73scnoHNU)p=wTYP@wMf35e) z{MZ;ZA?ic)nMx6bmUc8aoOl%poZ>Cat-QjGO;k)4pl+Hjhh5?Po02W1zpo$NA{iE; zg+}o3gy&}2TejQI$v90Y;#F_#Z-3sq72F`sN$F(6F|kj)3X~meO{j`_o`gzLOq6{U z)NG=c8mt-D8``KJq>*O8*8{HRZ54Ub%M4^RK8 z_p@&dPB0sS=J6}z%Ri`s{7B|{U%vf25|wwjvV50@>&sK(fB`VC}iU6NzTj*~TSZRzR52VV+j zr5txmRzC1xHc^#D-6NmDt>ndRbZaI*13M{b{Mo2zYHyX$B@Upt%95@J)H zkd{9)RL#^uH(j!y`u06l10yQwIe7rY#!~&(R3l%$x_RZQB$-A{}-r4`noAT zorUK@Zw>ZzhisyXU8$~aU8_F%_~Tz!_fCc=jgEFsxd&@l-8)j$<0-bG1tM3s2vjk# zw>Tb))v7M0P@Yi4N5J3|k;xItT{!?@^6*;(ZHLYd1o)=PDdo?(-op|$>&@Ig>wU@X z9mk-$0#%mKXB++H5t0@ z(^F8$vceEuf6u_bdVc?_>S|7_oFMdC?=I|_?wdRV_n-`8;b4xrW>dte_XQAwqjAIn zrwqK+$~RA+JX;I(lx4*l_g2jwUIDrm{m5SfcgWDp`iEZfc{$lyfJP#7nIGTQ(GIxP zq!n9HQ6e~V1p=SpLE&OdE#nf=6~JcdF=PiEr;&E3B&p-a7_*wjklE<`^)CXj9bfT$9B!W1H!A+U+E*!qld~ z6%Cx0Zmq2a=R~`IFiH6Zzl`?BGVfekKFQLd zE}C9}AQ`woc*(=6%(G;{Xe{qX7pbX?DeCPs#%ofI#u)p#sz2eeb?gtTvDCS63A*$2T%>Q7+Uvs`!L<2CvYinkDDSYIyle zmNNUx{)qfa)zv2<%@ajME63HbA&=ooorz6K*hIyW&EOeob=t$d{hD*1;$4k;`Fy z3gxcYBI%!hp4n0a)E+w4%_;+IxyU{N2-4B>||e?tgoX6uxt`aq2D&0&$H^CDxYK zzM?}FL99L-x63?zmRdPJ@m88`Jbjj$I6mz*KhMD_#o|8I>$nY-18x1=*#mQgs zKa>8zlrEfL@Ln(*Y7lCLD{nfRpcP|U!GI(l+BWG)hc_{d2jEm{Tsnk|xH!vn0G2ZQ zvULw{1MPrBfXG~5JlA^(w{9511q;js=*euZy@qy4uMdw-D^dpu)2gAEz@@{%b;ZQ5 zP&~(w63Q^4#pcP`2)v5lOo=TK?7Njh< zlZ(>@1#BnYQ+;<-&YcI^FrJD*xHX1Vg>PW-8qIVKBDa&AhGH^ZThh^9VzC17B@xMo zL1&cHD)))b^_KqK*~gZvplD+9q3S;<4jKF>M}Q}ea=5QLVdvNUNj_Cf?H zZTpaI>p~fiOhs+BI4t!@4L004bmn^^jB=dHcct}gUnjTK^<~P^Gdw_=({%49A^@m1 zd=ttSwevyy*uf@<1sG#Ql}5yM?kp-M|6cH0iB7m37cw4cSl<2(R*1E?87i{{z zIf6M108deQ+L4^K{!E=CBSAAzGf66g)A{i3J6b^LEQcv9R|`dIRkM%M*$F^r*k9gn za!=i3gE{`-HeK9cS1aOf35POQXLHTTi1NV)pO`NRBVHy1NlY2C&?fK)-3e?0T|fCv zb^q~K)qRB0eWIR`h#zv{m03vlFgA)d>sWC{89@@eIUjpso95urBNxc);YTL*CRfI7 zQ~Z0t9AsOVpqgXixo=H~K*CqZ6VE2JRXk(j$v)V6cId#3F$Z5mxa-gqYAD7a+~ zmy`dy#-Ybgr!eU9oPEju(&(Bpu4dLcz?@~u(S{=6-cxYt@qn?bx|IrPwhOV>>k3P9pc^9e#&XzXm5DrRwPRif6 z1;Y}W-K;`x7fn0NS~k6?P0DCGX~uc-v^42-1B8W*50qMGNlas9OXU2O1gWC9&?M%P zzHNeV{)D}*MH4388y6}=A?E>x6Jyr&wi5O&m_NEK74B)R?TD2xk{p;@w~Y)AR>~Om zHT=5UOlHo=4cJPIb0H=CUJWL#Eu=^k|Hyo#;AWt#yWF≪iIqNj5r8PSfupYdE(<@%dL^|~)_f1TF zC&}0~%U6Mgk3T~KESmks4CQ)nV=>ao=1S+)5{*JhC;ThDAkZ9u&`~zq`-OR$C1b@| zH}=q+&b{YiOwCOZ11EE5GLSbGOwn1sipi_(K&;fQLZkS3b;|^2KX-<>Kj+|ve5KkG z>JEOUaGo#l+Z}<*Yf+xcQ!v#k7Ub){~(y5ADVK`f9eI z=^|P0K~?J}rjFq%jO?`+j%jo8sii60F8e{fS$$vmMjyemv_K9n#)lN}6XZEd^}#ng zx@$faK=!7DoJGJF2gj|r(6MNFH@q8c^RyX=Fpiks6SUUs9Gzbg=Z?B(B1pS{6=~$% zm8#iD@8#q9gpL^T1-Df07|(_bx!7|?w(x8shbo8Lcro+=51%aI2AC7f38|WQuF(*< zACLK1XdC@?imz-hz|g=a83SNxhrP6xRR5>iH{FOg#p^b@z;*O54vU!%s*~gqfhPr? zBzTV~+dqc)Tnk)krqEMe24a3{{E_dQOfzl+Lkw&UrJQ3$Vu8)!vB5zae>kis;Yg}Z zY$({EVGLb=8YQm2+=PWXIiJ7g2P48|l09rO57S)n79>u{^ZZa>-Y6~sucwoUwQRYL zs)TKAtrvVr@(qCGB?&wla3KIygr;0v#7-~vUY^av4VdB)Rou&yTtW0?vUrhI*Ze1Y zuSOS0_y>a?JU6L5@V(keW>dS0LgW`EX&c;n>{wbfSVyC@CUW{VYK<3?=w$kJTTC;v z$<|i{htWRHUfDlVR&nvA0GzxI#h4oEl3XCjo15#IQi7AXwD$PZU(0qcb|gKN-=#TW zlHVu^h9)Yg;an=YI5=ag$@pfcR-7m6?YYltp+aX6o&-yZ)}Ys^(!prFm4>5XoXbH3 zPc=gquM<3_(tvXwPVK~C0dV4Dk|H)$HbCA!gEc1I!G?TgHb_IYF*tjJG|#SUbz}k**45(uNc)D|;>5AOIfw z!9=2vvP>rBq!UPZtJkV@INUWDlqgCrA9nVotQ86U8kZYlYeNe8jTE_YRsemlNWz_m z-ahWPBd0vl$%Z?PzA-*DVIx`F)ve;yAPHgKDod0O`;vWD`VyUH);`IIVbss z$w&o^xRJCiaUI(>YS=4pq*T>SbZ)nGJ)A_77$b@_E?@IQsYP{+rwp@Qr)aJhqJC1W zm{3YwG%{y8g4(8XMa%8sReieTa;1oGUBt3GtiRPQ*>2_%#VT>biBS`ejf|t)Ga=75 z8n-R`QKkoy_H=*SaOz}OX|&z*(Bh`@A-xlnZA3uohU@<}gyuKSF7)(pupue*W>ycI zCP;?FMn%ZmhTl_hIy}Z{(2}{OTg?c%vZXXF3zL{qGZfHjMr>EJm=Z(nSr;4hbu&4e z;s~Y`vMI=`Sx19%N|J}~KPQ_ni*8D>Q(*aH1@{Xv>)`9BnnEp8xuBxwD2zzyAg#8E;!ei1}{;iMuNG9&1unHAE#(#$hH9AI$y zfJOGbEMm+$chQ&KK$R$D(-!+9DOr(2Ohw#07L6(~*(vLSt~#0)-FG)dKrbP3s1$tu z(XNagqA3Kwww|Ohw;yw&&vIGQhzp{T1b76SP&l>9J=2P?nz0nSKi+nXWs7TjlkIybl%RTW{1_O7}ZM}-8Fvks% zq!v?9;O%!Di)~DA;K*2;6td) zh+r=g8fDhZF=9tCzeXncaM<|4e1*(dewQqYo)U{#y?M52qvFBfd{<1q>3G}4s(~Z} z+tt=9*B1xa$gNati4%Ut(|j;lb|eFym(tfpfx+1M9@)bfruh_BxM};6Oz={vL}vGU z)?(fcV>#@RQwg<`xQ+VUr3FMyQ(f8W)h~1)-H5}i@-eNEU;R>ktenVt4{Zo;-`W|R z>^X<)B2J5WHP;Kz=F-S|4SehAgU3(5S`&Ay=vvLf0-o6DTHKlt*O{eLQ6{uWgmx$} z6Z2rZ31Jt(fdJPMp6XfF7-Ip2QFV$^F3PwPBRpO<37|`=qEcf;QK4Mow#o6(}*=@eo=MWlcrEpH?d4?X*&M zG(p^{j{?!!5WDm#wpY|iP~s9b!=LMA44}!l3`s%2G$BzhZ~iqeANV$vaQ z1+sGTVxw)Hc+IT!$VExd=F!W9AmcGxV+ImjTySS~B~7E}`(j!hPh~-9gen+Y`e+TF6tv@cbp?;N($7It7@&VwIDYoup`%f zhu<8i2)n1rw*Yv%DvbYtY)@!}tgci3v|l~odOUPJ+3EQ)Qd`8IYlf!SG_9-4m)iMW zh?;(k9j`K%=h?Kq9B&MR_fqV3Q(=rtei`IlI{1j4iS2lBH+^#wRQ@szcY5G#TCH0> zIW8i8rLawiq58NXfk18n%JnP1=HkaVi=3jOxWBp>oXQ|uJnyWSPIU}+IfSg{dKhwj zjg|lkaRQemK}H(a_+6veIGe7b^TPE@G)6&~ST0M(L|f%+*A9E5OXiCvo`xIeYZVlR zn>1qAZ6oo?Zex9=H)S`d3LEci*m00fdWOVP6i2wfMTKVGm1vrCa(;H&D-G6h^g`eA zAvtCiWm-W|w@K24(+!7X(O~fo^h5MmFKcBT{zaYhBW-Q{_@(ryXvLMdIir!F?WNw% z%DuNh!T(7j)(UsDrEm$38(a)dL11jhT1m%SOCWoRT{NvvlWrrGabv>9s{y$u_K#3u zA`)>H8|rSW5uPFfY~WxEp6wDTq~)ory^JeBC2xhR0hJ72yIkm+Gc!lEdOPbe9% ze36J0RH?W2eEPfcoM%}i#4#x(C-sq{uEK8OP0HF()F#$|pWseQ^UzbUyZhr8P4Az* zuY3*e8c3tFM&qM{3p>F0S2aqt#5N;Gt%j_KiBnx~owYAJc5RV!uG${6nI$kT3)Ol;)$T3+@?%k?8|8Sa>5;DaGEJwQ=jFU72( zOrcW{=ezGwQWXW(o*U~`J_7%ASe?njRyrFLO&B|#vU*@aEnd|QP_Q7C6X zf`y1&?<*aP;a4EbgEdtg!HpqtIW;V%&{(~) zxXEA26Dzj9`sM3Q-x%~g_O9fm|x>Hk?c;0K-G>7qoTGAOBf70tbzE4VnDKB z8%`9*p@IUjvVfkIcJHFDUK#eqpJ2?5et}(^9n^)qpUJnG)3&b5DWNDQ!59J<+`wzh zxf6p+WU`)k)!KIma{u4(2W$u$Pw!018u+pQ{lYH4bpP0z!n@@F0&@L&*TYZR4~rRV zEi}af`eYWjB5@uauNnD3DblukbdU9TMcYe#Qx@Y?ZQcT0Y{`)B{E&$v`E`fqIdj%rGT__ znpkd)SxjA;-b1e62ffKh)$=+S`RXUv-dEyAXNl#&5vlpRmOXS$=`M1EtDYX^Ye|%8 zRs|VKD_cA&DO1#7MG&Q&=orgLZX{^a?#=4X7b|zZ6w`(-Vq0c7G1b1p;#zt*;bS?v zi4)g@wHb=t`|2Sn8=h7*P-sbiQ=!7>KMKB`l#H@$oTJ)Lt)~U3T|ER31ksq%A(!Gx zs#ykMoT6E)QH`O1oSNY&_wSmLQn%`;-GoM&2$Uq$S>iMpmdW{Un6l9+8E!1$3mRIP zWBoxG_r;e*<$7VGvhi(_yj+bdwGRW9&JWvz90kI!jZ=Wyjs-ba7FcoA;3|?fhcZES G@&63~10YTS literal 0 HcmV?d00001 diff --git a/binutils/po/uk.gmo b/binutils/po/uk.gmo new file mode 100644 index 0000000000000000000000000000000000000000..6cd6aa15ee07b7a87db63759829e6d4950797df4 GIT binary patch literal 172392 zcmdp<33yy({qHA%0xkPmc1~N`rjY4E=|V|L)1;+^ZZv5Nl+sR;NisCagqfsGY>`!D z6J!xk7G+ZeludSJS5O26Sq0euf80)G!@!nffR zIR5ZhY#eNd~9B-{t}bT}4vL52H6sC4}S%D>N{{4ZN(=JTNR*FfdVkKiPDJCuL#!trp}krt07 z(B%WHL;rfX3*2xyae)D>hNIzhn1NOB7FY>ChH^h)MJz_v#@0aj|0J9YH%VB&SHUT$ zkAc#^9m@arpwjatRQk*6V==NkHXZU8yO@7F%N*_ncW#KqHi9$YU^oX>z(%NWFY|l~ zD!hS>vDg?`18ZO>R6g7R_l0jmQrB?Md0H&?6S%{-@qeRO?7{EEViaxct&6zfAs1V{-TxA+ z=S^@B`e#9f|2?=HycLdsPr@{Y1z{s`^?x4jZs2ggIHCqvmk6iPmXF}soLW1;+C>iJEm_}&c5;2)ss%jaHQ{$s0mi{NPV*TT)< zwXhoA4wc`ZL&@cN*I2r*hN?F&K;`?OYc2kh;55`JI2B$4oVz7F0bxA3AvohogQC zZV3loAB$}PcY+G945~dG2nWLXP~~_SlssyO3jc>*{Q^7y^>#N{`s?8KsE>zZ;RSGS z_%KvG`4CE8mfdLflW>33=Rl?JF*pWpaFgZBc&PBc0r!G;L7D#<9tn52+0xks6~DD` zI{XTAql-a2mVq50oSBGf(0M^_5Rsy{~=7+D{se zME_){_VH7=Df}%|{yht~gMatj;908&JHkQe&xES)hd|luf*ZoqAkm4P<<;jxwbu)w z%JX`-GrR-t2%m(KckjS0;l|HddWl)8{7px3>EI{a3{F+pRE1t4R=Ld36;NxL)lNmJ>lt4 z<#z*A{GNqsNAE)A>z7dJ*zrZHU*nkue^4}i+Qg;3?#1Qp-4Fn||$ z-VRl7o`b3%uR+D<11S3?ub98PLiszztLH-H!%Da{JPE3N&WFmcJD|dU9I9Tu0cHO^ zD1QgNYVjHl72f`yv!U{NiB~s4#j6vJg(pF!`xdwxd;-e-yHN4?!kcgPnw4i94n=>q zXDgKbv!LQ}36#9N9je~F2vzc&Ku}8!DgQg9>NEKYRC3_9wxKa1k60&w%6LU2sqM4ph9h zdDGkvgQ|CxQ1PsTst+BWCwpG(c@vz9`NMDs-1sjR{wS#aXgZt@&wzWt-$B*Ke|T>3 zmbr^VmG^w8a9g0nEV5pD&?d}Q)$8dP~41l8^uq4H@hRK5HjRQzs+ zsz-l>+rt6>H0}abAI3q|!)0(o_zkG`dK#PvAA<7l3%Dg5{ITWFNH_uYeo*<6hWo

<<-Q3d(*DR5%xU_03TBpMc}x zm+$~M{$G}lS*Ubf0=I#`gi8Oja4`Hk+yQR%nW=Y!JEEQdr9Tg9$BdN zbOKbpz7i^(4?*Sk^HBb6Qc~jNc@0!MUJZAHKY+@IyWy_zL%2KKy0paAx3N&|=Lon5 zJRZvZWl-*Ztl*-pI`7L$$LG zD1R@8Xr;Ff3_#jj{d29d_{tl{Md;}#A;sedzp-}#v1P_9D!O?J|K_yNOPJn9H2SWL~7Ajs>!-4Q; zQ2BE=RDF6Hs-C|E75;}%G?f|7r4LWRG@<`!N#RQ^_b^-8F4PJr_NGN^j;AXL6S2bJ%i zLev<{pgKQ_2VU|eE&P#9DWMbUN+v^{G9|9UJ5Gxr+eNEW$$^Y z@HXAX>d927c&&l~yc{Zi4?xx9kD&5vr)|w%1yp{wK$)KfRj+S`s!xCN`kQTM`8pP= z9xi~2{~D07**F*~{E<-pPk~DBe5iOfLA94ID7k)~*S`kJ-5pT% z^tVv*`V*+|ciY9}(kQ6%u7b7j2q<}Y162H;hLT^edwvcT{&u@sy7q?hZ!%OkHBjTE z4ybn81qZ;Jq2hT5RJlA0RbMyX&GK(|C^<9&DxYhh+DQf~|IUZ1S64vg&uviYc?c?B z--e3E2T<|;5-R^P-mH#ATXaZ-FYWhoJK3X{i3@d3Ye)Hn4asg)>n90IFR64CSt5h{bCw zsC)^a>TL~FdJ3g@jU~oz5WO)o{vM7(??M8*?CWEr;}lTIssL$Pw>0|DxTLt z<@c|k;`tI(yZ!>o{}IDYE-!$RQ^!H|M?ZoJ=OL(acmt}uKKA-sj4-)c4&~nxsPK-3 zVHC|Ys5%PPZd7pnap;?=96+?@wiPksiK zpHD-T_eW6S4&2M~Yn*2_lssGnRenc%_4#lb>YJeI{|8X*YT({hPqz0Q3Z*{=Dt-Gy z<>SFn?Y{}CUR?y0KUaJH!t)8wH=*MBIaEGuRc`7ba0Ap6pycL$Q0bTsm2XGEa(Ffj z;N9N*B{&=P#_+2hKtL9_Wb-wYM+TVXBSda8w!gvzH=p~8C~%H6^Pte$qm2GrkzOW=F(2snG1`SU~Q z@&jIh{-P>N@261lnK#|sUjpTSNwqIOsDA4{sQmgJRDB*$QxaPX);CbAY1^4&n$^0;40V!pM?j(c?XunPJ!Qrst-eFmBg09b~qRQ1}Ysp z&Mt|qgjuNgzXWAI`XDo33lBv73{<_@<6z7G3fPFc6UyClQ0=a4jxhrjkDo)i-*~R& z(|oA>yb?}^CG$$$y5STk^)X(3E38BPDLetrn_m(;9X<~0;j#rKv2J)TRDIp=5X<)) zpz?jYg(a~c!A>|I?pkZ+tx)cM50%c@btP^;@B-+{+jI6Jb9Wh3KD`Ikj^->bi6!AR z@F=*|l9Je|a1CsO0}d^Toei^4`7+=z3#Se$|1XD<2VX$R>0J-EeA*wXeVq*VfR94i zdk3m~H(hG+Y=c8kKLjPe--5C~;0UWv!=dERTqwEH4CT-F;ok5U-ux{%0QCmTj053x z)LX*0;X?Q`%|-q+wnSog%A!HSfY2IP_|ZcQf1(^~F%`Zh^{|x8Wcd{Mh2ZH&nm4 z6wZQYLdoA};4nDq8cXk7sQSJJj(~rLs$ZL5Yw~OctdKcWKHUzdz*nKtwcB-8?niiD z4He#pumx8B#N_x7p~Cq9eg_`;(-IwBiG2uFKbo&M`Eo8)efkqr`nR~jI1Q>?GjJNb z5YB+ldG#JQT7Iv9%h3M;RQ>z{E`nR%R1!NHHp3qH98AI5n=SsofXdH-G!B*TG}r+z zfO5CVEhaa<2GyQ^1LwlcZ?*n)DOA1rJ*}~_Nd>3O5eu6uy`%y|HSR%>TYM|OhBb){=gUat$z4?bw za%a2Gj8(82bvsn~+yp1U`{7Xd2_%}aT|T$*aR8;>6RMq!f&*a-RJa+ac5*$GoO&6m zo^1JVlbd@%wT~uv5WEg<2S0}Dw>SI3+|@yq^NFw#J`PvFiCm;@t+1 zKz%b*z29oXQWt&-O0J&`6|Wm%EqoU$oSFfpEfx18{oj_Gl)8D`T&VWm2$lZxpvwE#P;&I2UVpcNrEWa1 z5MF`)(NOYe`$45nUay2lqFx1S;8RfP+IiDbS3eGest0F5$;tDe!nqf!UB3er&%v8n zJ}iK$7gs{{KTkoWYx~VD|0cjaQ7`lA6X0H`uYrp9Q&95db147EZc*y`=fk1u&52O< z9)a@beW-qT@RpYUBcQ@x1_O8|+!0>y`7qQt<`u90465F4w^gZ=yJMjGkCWj%_&YcR z?!L9fe;PavbqiEDZ$Z_cowqR_0Rz;RLbb1Z;KA@CsCr(tt>xEQQ0aIW%HBVq@^v_e zie|6+Q0`xcss}soVDXv{4@Z3*JPtk&>);WCOI<&9 zBUHIO19yiXd-V=GmOA-35vpFE2i1>003`>@cPe$`zLTKhc{wbD&qIa3;m+2s_JhjT z#a?~1SDy)2qyJ;5cn{gd+Q$-jHtJL1x8W|kmO43e9o!%FTb{#rD|Pel1XTDJLG?RN z!f(QjcQ1AGth1ox+6PebVuwAf9(2I@s85B9;B!#rFeb42wixb!`Z(AGFMz}07f|uo zb4Y0n5g%ItRj%d3jNMTA^PpGnx~JuT3sn1h0IK~D9d7=$K=l`ALe>9^q4Mt`sCxZ5 zlsq3Y!s_dIsQNY+O8$NwD*kst`M>qZQYU9SpvvnmcqrVntklWfW8fUr=Rmo8393F$ z7*!g(37!a5juZE?`o0`W4jd1a?t48yhiggyV%SaFTrEr{-dqj?|^F8e}hRlevGC2yKpe-YheH%fRaD2L&?Fd##*@Zp!Cm#ad;<` z-1v*Q2BK)ls{iWmD4`^mb!E0X{d6(A1c1@K(*(cCYYRQgM(229IDC`TafE2p@$j;XYN?-(LzP zCpMd2>ec~gK>5EIsvR5$RWF`~GvVh@?X0@m%C{4${$Bu>!9TzNj;rzY8#bWsgzD#? zg*9-{40AUhsvkKW-Ut5(pM)3BH1|gzX!7@5sCe82m4DB|gJCes%DolNLVYe&{dfVY zJyp-PeEvREIG@5SoOO`p>(AkI)bB&dg9!&)yv~Hu{|!`mZ$8KBV;fZZ?}IAm_hA*R zoLd@O0gr_$&zGU{H8#)2P5VLlcOq0h{}og{f6uFTn{Vlx1y#=NQ07-bh4VO^0e4+s z>8yv6SJ%QJ@Dr%=+4&Hw2MM?z>Kow{_&0bB9I?>!ANSm}*79=(l)Z03jq4tUivRFB z3-?HRU1^iAApMY8?XbG zA8Pr036%Ty;OVgDu+rF1;P2s4@auZqN}{KlXvD$7evv$%moj(?6loIewYR)5D?a`S)NY{KRwOkyZ~n;Q{F13RO@4 z3FXh!{#dTZxfb=ccS_RA;{-Sc^{?T<@Kd-7&S)x) zod|ypr9Z9N%IyrOe&XM78#uVd;=32z7Ihbt`KeIy^a`lUje7V%~qPbxv(1bH=)w`2vqre4At%?v|71zLzVOGQ1a+QI1P?y zvwGAFRqwBZ(tiUElX<)4=Rr{AvKp$rTn$wouR*12K-%Iz1a5))5U6rp0cG!7Q0}jX zyTO;C+WQw?e?o_iE1O^v{qJ~w24ydCwB`GSQ0aIbZV!V@X>4OS5h}h@q2y&f+!>w% z72Xw4{lR@udR(XQ%{0Q|9q(N)hST<|2?RDd)8^<1cM?u1ImTW|;X8C1Hr>9P8_7u*tc4cr9QL6ze&DEZL?Reone)vLRp z)bD_plCqc#Y$53+Zmr(w{3J1YSUoUm*!_(nbsDBNWjz7Xn;Ks*VIbH>2 z|52!Ne-^4eZhf4|tt3>ty&TH@&!O`9EvWji`SF&o3!w7387hB!pvvKFSO#y0ipMKZ z_5Xc%92|Cn^~YC2x!dtX^M5QG z6r6_o3aD~<9V$MtQ!Rfgq1sIyRJ~ja)o)!370$a*=`1_V@@p~N0`;*_@jVkB1}}n= z3m?IHxb$=zU)~K>er0Ev98W;W*B?WL^FFMGlfGsB*BYqy_8e6C>~W^a+gVWc?we5c z_a-RQ-Po%AbwSvwWTerN11y{D%9Xz7{H< z-++<_+kVH!YkNWUe+NP3(>YN6_|s7S>~OxtV?0#7Zh*>{)1d0%-B96t0M!nMUSR&L zhANl4;9U42R6M3%X!)}iu0(w)RJ$JZUE>%i|Lb5CJOxT#{06FiehyV{j{TmM(```g z@)fB5V8BJjUEofr$3gjjFgzS~K$XuUQ04rN=irMiAFH71MFz^wwNnYY0UP~Qblgtgx~-~fl?pv1Ln{00jTye?XuEX z3Ct=mu2rxMjZaJIBe->K3bm%J>lN;2P#@^k(tC@0Bkq@R$M%VvuOg0PM{z%n`dDsV zw{lZ$W2?D!(WGJvG5Za73;r$j`g_6eq8GVDAX@bbVxq%|ox5n`YqN-;48HUwL&W_LgzqjJksRbnjlqr*OZC`Wej26+fu=A=MVuKRxR0UdFTJ zfv#HgzJP2^aQ+=xfxDA z;kE~c*DmPa;nkbNr!lYgh9#Ii!}E2p3ab4d&huZr`9;{(o=teQU^a&PdGs&f9_|gM zq4yH@;^?XEPe;x6nUiO4phiTwzE;*Z#okZ3r}KOS`gFtY`h@@gz>Tg?4Y3KBog4{& zIO?5H?~A?FP~#X~PoqE5+gr>tTPC?Hi(1!X=ndemM13ae@A14n&u-2U3F990&*QH1 z?&LO!TGtvl1O0Eon@r37zZP|XemDFC{sf+mNhSA8)QIk0*9;%#zK|_McU{HvKyHmQ z?&3b0dn#`C;byz5;QAx>G+sC!F2n2w_(a6UH_$uOyZI9LH)0-MKjWblvp=GL82Wp7 zd)xE;d-Qaj#QlBL6S=oWZ!7Lb?ClSKiC%b(^UsUCyA3xa?=Z}8OKWG`lw#)~o^R(4 zuYiZ?m`%pgEj%OkWA}1@2R(*T?)nY?2lBipdPj5X8j4?kD{{ifsf%;k08q=JM`PXC)cSCO*^tMC&d-$$*!(;3n^xC;OLJ)fu zhS$41oQd9!+;@7-eK0?V=ij5Z!0TND=c2E1zph!_-{<}iJ+@ulJYfy$DL%{qeYS7i z``jDA=yeEY8%6Y9#m%nhb)vTu_jh>KbszUd+=p_HK)*JU9<RaI{NSWILZDBZl*Qv>V~)RG|&4l z&B5HG(Z4C8$FM*42ktA;TLUkFL%2VS_$#+F(c2xp9lZX7@LKNMz4}z_9LMuU`0*_{ z;JO-h%9{_u{ann#>oN5I<;~v1>?I6_dhT{5SOG=WH^rL9dHjW8)jV-J^K^ zE%zSyu@*MKS|834aDVK539rV__r3l_JpTo|G2~vC*SpEbiK&)bGm~*6W{bEp+T5aO--N z`|CVE2UlX3=(%er@4myUg&pyugZotPR(jW?{%1s87YXM`^nbyf;ob!QHt=S5vSL%o{&1@6~S z-z|Nfmx1SaewgRi;ZZPp?TSKk6!WG;%mZz2*v}{q{<`1ub8qJj*p6N$_BIF$0QFk*6X;FE?KwWo0qEa@dNk_Cyg$E2JppwS z_BZi<{vK|Q-UwL5eFS!A!N;-tPZ(Y=qW%r{2i$)_f2=p-xS5U|#V$e3ksNoWVYz?4 z)_c(4S%>~8Zzin;_%|E3DfE8r?K}iEr`0tFvtQVw`+p7Udhh;Oc(ym&18##~2VnjZ zTr2;$uSUNdy?>)O9O@d%y$xow(d%+L$bFuF$GrpkAH%odS>ApeJIhhG!r!9T26soT zOLNSPxhHdP>-9=0n_>77UcbQ2FTMJku+u+}g*Rg9Xw0wT`JX)Rf*-qhhvVR8m<{39 z^(V}Z;kg>S7s1iojoz>O;p>?H%B%0=IgOiBu=7LbnlxZ`8Tz_b@w_!=w|M*Wd0yeo zjzsTZ)Gx!`;9lJS!p&yfcX<2X<#`PH_u}S5o}c8_^&`wT=WgZR0`vVapUU0NU5{Rh z`x5R4xOc()3hqVb)cyYh_Kx8$zW#)LT`yw)0{?6}jPp^W9UJB~sv_nG^1PwoR`wV> z-}80&4CY5+rmLBIBmaC1em#ZRXWVaapNQE#m>q!rkKyL1x8~M05c4tIx_*lJuQ7ju z`!76Shu*_Hhu3r7UZ~y}vytfiko!37zs0>DdMBX1ndb$t86FS6K>sA}Kk|GXJO)or z;Qk1;t^wHl27DfF;&klarQZCT@IdY@G2f2+9PYiny+`1my}ji;mw0)3D|U1Z#%w(I zzj>a-{ZI7&4Cip)jQ*#@X9>^Yb)EO?Tj&qx`D@&J;AT1Mhj{)IT!DH9&u@E2e@5>W z)Ve<7{wdF6x%cGx3Lg)d?TX&v*nN@b1YC+biTRiCR@6sw>-r;ilDiG{_uyc-33mR# z^G~=h#Z3chT}!;1$I$z_4{Hf#?{J@u+1cm~@%plVG0%IWKZ$z;>dWAX*xixmK{Dg+ z=6N!DAMrc~{scR^D&bP@zoY*nI19dye!`hDKfvw?^rm5UKhJC6{@zUZ9_kg`|KQej zA$H${rP$T=q35PNAB)+KxlhIJ$Ig_zMcss*^U!;WXI&@oe6V--y!UrU%*wcb$o(Q_ zH=*Co^SRvLG-t7$yEI}N=Dz4>9@Pbr_k>{-lyh2BGOL++92eGRjE?x#_| zirJ+w&8_PP+*k5^0G!R;fc@Rz_1K$={*&BOd>HTX{0?Ti-osvao#7u=VQ)|D=sFtn z8lE5LuJC#%qW2|cCr8|F@BNmWBe_@UfvW^JX7NS{XUZ6j}sfi>HoR?@z zI-9kfiA-mZZpsDMl1wxvGubJ5pYd=GNekw6wbdsx0WLa|ZOQgd@&u##9m-34u1z*{ zrqb;}XF8}&Hp@=XmgwjpHO^{XOERcQWw4aa^aOQ@`c|?$8zkF0I(wAoK_3=!4rivY zt!Ve>u*gErVN<%bHN9Fnnq8ghY-mYZS*JS`)kLf8QM@j>O$wtaooP#SlG7NB9G)E+ zWRk7vhJ;I4)+Z42w9Cj~Z1?ci?w}#v-kC_XXM^FbjX`}+r{zb*@a$Aoo2pDhOKKHq zrIK_jysB(A*;e1$6Et?Ubtv;ge_f!}iT075L36Uxd8>?8oN{&)C*@Xkx{JWt)13ho zuQBLqCykAS(Ui_vm9yBO8Xrhwvc9W1?`J`XaxXI*_dbFIdOtlU>6qGl*@iB*YItE(zXO=BwC(VFOSrD+XKSuvxviAsTMYw>%40Kg5Qm+cKZC*N9MI&|DM1hA{)|BpY zRUqhWA@`Ic%AI*>>SIt)AY&&}X=x2DVY;Zs(o;efc)2sn3j(wj_HF^OLAAau6h*Y4 zRutGFQz_A)G0~ZjgizgA^!l`;s@kklmhA#tqsfz|)>K31$Y`r8$eqwfOM%i( z?T+O;S^p%NRh#-+RDW)=tw<*bX0|36vIJGFj93QceCbGMvnh3|6>SN6oc83@Db&EW zrOVwAVs$#Ra#?wh8b5hrdC=CtKxb(@+1j*hO}sU^HeR1Rrab8AXeg(O(a+~RrFzHb z21_g2GO2jBA(QIpT$VF)vB;^2WHK7>AehnKS*Yow&1hm}5X@FjRg{E6>+-FaALc9? zP+>0AsS7B$dJUCq3>3Aa808XD?1S7p%eWJLBxls}JZGiSK`Peix?rHTKEA}`RFZhM zv#}x3+8RfwQ?FHG8uroChsvzvsJE3Hc+yB*c{e2*l5{DqYe9l4=0OmTC%YS3yBd@6 zu-;av*O?mBq&4VBc6X#14w_!njkM#6OX!S}F}rByf+jYjX?l5w?ddq`L|1EP7%sK8 zx;2@gCpUe9bnyxOC~#}hDGYahJL4uFPenaHR6KV|LeLk?Exc;jzlKQ zK-O7OCu0tW$Hz@(0LO4aE{0DYtv<34W%Y?HLfzW$r~-=>Gw6947P#Crlit9RHv2IoMm3E7{&y6#3~%vPglFz;zhOhN}~rl`t-G zR);qZjG?PRvAYl^T$=MZW2@ziTHTz$tngoTypdWJ8n{~SOWcoXuvOSZ60Ipl7v8Z` zFyzqyC*9Q+#!I^7yKpS+3|ZVk@m=1{LYG>m74`AH_;pn^hFHd-2Md)m|OJ#B8%7mr){ z##9a^^ zoJ@8EtY37vW|s}yjL+r5_G%5!+E;N)^$y64Na-Eu1wq(9so58WP*~hK2iCSR)I>0J za&%WJ*;yXMkB+8b3B$O+nY8x!9AYw|)q>op&so^Vf;ScAq~7f zolO$Ns(cWPg{7Id;-;B-bDkDtXl9bpt25LXe91}tc-4O@n0;caao3P;>qvCclw70m zA^I9zpJ-UQI+1B)(kDx9n2SY?Rtj^i29JoDNu_+F3T*ADUol!RWb$#EiB~4#izMR$ zx`-eYlL)O&=7DC>yPT7ASt!bbNLNFD)yv&n+_|B-M&^-Xg{rt6QQnOQBi zo**Yhd?ae|j6l}Ezw_=E6_jc&@%Eb4JDN&cU9`abvuoFgZlG>Zx?KgKQ+ zcR8u$T{q&|Ndt|Xqk{*NMosxKgN6a>E;SNKwR`7DoUdCpCEEKCPfa*WWQ(e~@~y9` zo*N+fFk5ikl5FkB<#YIuFDmBqTAB0mo&|U!#PEkVB7_!;YyLC5=t<;una2{Vt zfGe>UXXH?Dt<$X!wKbnZ{Rm@ns6ZSrPy&Q}oVr#wM>qU#M>^zGXWzT?n3BA8G~TJz9lFG)8qG1qBmK zPpY4gzPH(J>F+fr=)0BV1_j>r*Koa#KD&1-X>bD}ZS4@Ru|e5hTGMacYm{Ost#N2I zx2Eg8p0uV_6b#$Z2`@MJw+#fpL1b3V_kP^<=g7sVs=hvxT;(Tr)RI=4YuVOKZZ9U( zW+%q!`59suEw?Zc&M2pAHy{WW)AHOkud&;8fiAcr57yt|0u8XW3B+O#Q5bH~Tx=tN zFrHp_>Fjp)JC-SQ$u0#veAw8D-LmF{88Ku(gv4qgtiVX^B(JxCWmLu+!yC(8U6c4W zcP@1AFlR|_BVjE}u0n^baEnic9_QjcyiuXK*{V4%ThzX?J-u3jfR3FxerEst;IVl$geCb$L!BB-s-2F;EY(g_7kU#wXy@*lkT!f zQmT_xfksN8Szh$pLFPiH!4+>2C}ZNY73bWp2iDyc3hTTHgQed47+HnA1RqvwYFKbp zX`?NikYddC0wRNn1gomS_J$fvMGo8*SBZW@vJ`8&SW8;(C%Uo^a<$9{^r$7Nh(i8|xlL%b%SY4pODXASa&g8uJhzQgP*0qqI^9nFWEPRL z6Dd2Eso9bC%h`&ax;NkLCF4vZS=}kPs?!}kL0h^p)s#v$j!87Q!E$Gc7T1|*W8;F@ zX|QckmWM~-VVb4Hc(`s~G)#6g+6MVrWC8hCt|jdvy9;4-3S2vhXu*_aM};Nl zMskct=+m@-9lCUMOa7|gGv>?;ym?rkTuXM2T@7+`b`1*URUc`Yna;4GQfNT4Wd_!k z$gHIPGT=@G&c85bHlXa=zxDIZe89i>fnheAR<9V&@lj`8G`}IEzPE#wA=hQe7uRto z6DyPLy*zOFwSKW$jSpcO^<0$cxe_qn6d{XrSZ(~wHJ@+Z!}w|vxjNO#wihcseOwEY znYL6X3;W&*U9B$=w=9%NW!ZTknVMWQrn2&;Ptg~VF08f23u7k_4vlzVRirRBp$F|f zZb6E=n~8@L``j5Yd6dE-8)x|81AgZFnKZ*p`X}|+t{La;x&uY>%q>iC zy2u&j{m4bFmi11iX0q?CkU{2IJ`U_skfL1qH77c>&e0lFFtRQ3bEfpMK*LXVu1-?S zzCW_P6>~zwxagh}jd68jtOI3={9zTL(Fvp01V?GYKCO#|*mSs?=G}#!aYl`vOGnds z`=_CZ`nkg0^jy%+i#4n!wj|n{Y02_stvcwVy0YHWV}goQdqZZbg_g^{J|EP1o9%EA zQ4nrXXi7Z7KAFvjxT-DjKM!xt+^X_m@!TrcF&6~PT8QEsNvI7Kv<{~z2=qhu? z;6DzTg#Yh{ydG($ES9pQv&`2#maE(8iB%F#+t%Zl37#*UMx-R?EkjrAJmU)ZIt3 zQt4U9uv=zfAL??{Wp}TfeDM_Pwn_z?A#2?#v#4(W?oT#P{r)fO7BEEZ^GG-AD)H&txx_HPpHBX9%(HY6j}t< z$HySwOvA)RM*3mga+%0fpzpAHd*jAb`GIkPS8-cE&)1>;^UPXR-~Pn?ur67w4xJhRzC;nb1w>hZe@%l1ZO_ zth9JV{g4Mq^&MKBN;Zc6bZDWfpQ|`7ZpKGk8k22Wn$Rm7Ie*yx?boON{4qDVnAm1X zSgg725=G99`yx9ZHuypu*m&C9xL&!~H|u~Ynb7rm_-1bU@{VSZZU{TWyr&juKe_0& zzak0FXHH~rVsw3c3v!*U`UzaDa}irnn1iHqlBZy=I$Wj0hkn+8^Qr20&xFv|wf-$1 z@~gb8$@-0A+KW0>otw9wM9JuP`_jjwz@x&Uik4OKu`PUZsSi``)=0C#2)8I3uGVtW zxT`})7^u@RBBFKq=xTFiZb8+2{@+?{F7oU@T5ZlR4j1|2Q>-!Lf3i6I-(Sw{y=2O0 zN^=b#!=eQ(Z{|j3lBT&*jdR@jzrAG2Dy%m3Z6UUJ;WS)GV50qhdC8QV`7bUh#)}tV z3-h1mxQ+$b;x)u#x1rjLH7Qa_Q5 zFUzGY^scX%h0}U(S>ANJ?BQHa&I8Nm{=8AbBF@?0cgwcn`66>1$=&c^b}sI2v9vqc z&}FZ2g)?ErrKZTUa2+^|OBhI|z%#`t>PxMB$)>xs^dG%u>l8#=sypyzZkX;~sB27R zz1Ka8Mphm)b&)5zl6C%s(NNCHxZhZ?5#(M8cH`c7vrAQO%QP3I(7Rr{J#L*Ke^gLW z(s|GP)-1ce&9<4^zaL#$?I<-ko8fv${6LpAWPH(9Z0JoHv#d;FwPrnSqgXcV32N)A zrq{Ygp;)<;(-;(`B`!*=jJX$Va;eI-tC}TM3upG}Qs-ke;VOzm&Sjr9*Y^Khow0qS zc%6%Yy>l1!E=){c-h{8{`KdrSkd9~Mm)k_mCqz$Czao3AI^C{?wW2Ip7>!ZHx2P{+ z48GF0eh1p?8ep$d48q}ZBq{kAe8s>zB@g--BKI{i*6hwnPk)jjIyR<)%#v4qoUVg^mKq0WS~ZE)%8i%w^3m-Vx5^_O4vX7VvQPqr(Q>E9 zLJO+oa<7?*Yw-DbN3|)lf5F*)tMey9<1P$%E)rE>#MF6tz8YNM!Dcc zQ=z3p|C5c)-k12Q@p?Ln*Z4=ShkxWVVJA9eH@;eV()*a1kJC&$cjQNEDxo&LA=$}R zl{;*fZtZGocO~^Tm$&&g68~B|O zrY5XPZcEn}k-hD{x<%(<6Sgs@BVto413B;+BEQm{(J}L=SGGO8Zoevu{IXT2(6?MN z!{dnBD0fGW!{{Vh(`-_?_q=jhq@jzY((PPjc~2`&UrxKphUY74ynt%q(+YVntUfZ* z%u9v5Uw#9O?YPSMGiTP$sIx$<)p;Enp2lD}*LNON!~N2jkFMYLbOoSMZNj~h8kVJb z7`8oEzxi5&Manfe-(K|Xfh?cqz#H43XW-AFX4Zw`GIBdHeCuQ#8)hUw6uE9BlN;Sp zcfu%#yA>{+{LWLD>O5!LcW0cK3Eyu?At8J08x5HTilg5yT;8m!8(-J*mc7W+=Lywy zEw7ogaA*+eqLk8th{hSdviIM|S!r3Vnm${nU9}z;o*hoJo zz3o?Xs3H2foM`O*vz;lfZrAyL7tv}OAzw9dA1GMV&WV<3$Q*r`$70L3C3vHN!-t}c zef!BK^R8ye^6HsY%MUoeRRYbdcT$*2|ghjmuE975ho-XLNINOsD(O?mI!Ge~QlA&!iW0 zhp6+@RU#a1Hj4S?Ac z1JcCKcdG{&naVEDcD8knBp&8l(P{jG=;RdsjQ%?9ex;qzg6jBm-bCsvD}0<}WuZ>G z^kK)W%(ag}^kJTlv^z0BH_@DGkhNH#H%3!!U2VLvo)e8hE=}eyAE8OMb@^KC#}c`$ zR?VG<`{`ZI$M9wLFhuvpK@h(F?%q}C^G$_5y!a2Cx+J^u_Tl;$Cg#x~EPnc+RbADA zKDJU(@_w@*T$;#doG%t4k*jD`BJE@&ca|$$w+Y66Z6fAG_G$b%}iRB#7J>h$O_> zddz*WN)n+lC>ze%&RkjwEz3rC-bN@>0)1PE7R`&Wt|r?@$@*zJR(t2W?|<2+wfO#* z3(#wIsAqTG3h#2&&7VKVOjjdI1`d?$bp64=nxuUY#eeN!K{IhKdOyY&m|&qU$fR4- z&3x7&*Oq!&(HR61!p5mZqpLmKF;h-y_SQ;s@6yNX8r@6xih8XdC0Rvu>zF!KZl74o zy)NS{+GoAIgY4+h?xm&hb8Tu|h4t0qtsNf8Y6Mn3tp^=W4YbX>M$&j^miQGiKNPq+dmt@BnCmB^nMOKRi3N9C?GMx%F;>m)R zo~*Ri<-t0fMSM~{B1h?f!p|PfY;DeeC8)pHMLZAVf~TQpp$*$-dBqkTLU%80_?LlQVK)^xr;lmpTc57Rap09vfZ}gC>8z&< ztcS0p@qLXHpGji+;NDGhHnRmbEl65WSktM~oaqY68k$D4O~PBI^_HBj0%tmJ#T1&g z5Guc-qK`)C6ettaW!x*Wz7^#*lUzhr75K<1ALSN);iKR!i#SIR+|p23 zX1Vhbk=E&tj1ssF2wZn>!vTfXwltA1(Kt(ToJ9-0^FxJ*X9b@Oh|_^H%*wWx!`<)$4~r`H@n@RYnoRJ&j$nBICwBCSkHMD{-0L1=A{BoLHe0@_$~5!BtX5H2jr z(wruOdC5-B+%rB;CmP-8d2YI~i%m+o>(Dk`!oM`@T=B_7dr7s2(P^SRi@<7AWuim% zmEEu1;+{nswt!~On>nBNKi#qGxL*HE^6gHtt5GL5GwxBHaKthhzg)>E)OF?J^r_6| zjq^n|+x2+>*Xc*R(WhDX%Ex*IN&YsbGs|^UG%i`9&bQNIX_ZCKE}FjXN0tDCL_JIL zPVh!sgx`qE}nE4++;sMT(r)Nfvq1fp#|=HD%M zy=c_e@*pu+g%R(L9c1 zqsn03{JI%a_((V5X!{w9WA)5@Nizhtujdu=(D!BiG z7tw{2^@xt5;#Z_xtkypkeYq?M+^=L%38!c$&3zGxdRBPNpzGwNKZ)bc^b~gxwl#=z zT#-YN8Fy%rO#nXVHCtY28$r#?pY8EJh0Ri3q-)~X@atxBgm;`$a$nbuoC%6L@}}Wh z8;-cNIqsGzBKta3R2=tF8}0P<@>PKm@o-bUpTNQmNRQv^osQ2zmwY;2$6f9#5?gq*2NManT=$yQW z|MUlA!zjf-)( zp{>qTBNa+jr7qv}(loodg*%`@jeb2q%{$tghZ&UH;l%msr8LiuOk2~;Y1(zX>!`uXxo-hn8uT<9z; z!{2_cFdK`b>$cGLu>;m&*QF7N?PDeazIaV9uO8Shm@-wR*78FadQ*VDGZEAtR=bcb z>gbRW5A5_d-J#{8TOi35z3a@w!A>1H818~PsT^~^c2S^3epRiFPj`t!*t*eD<(h0y zcGX(C@|DcZdXAw3vzNU6xd(R~FDUb)9SsGvdX7)&weiNalqqG9Ni?RqE7we3J8taS zaTD>vUtxAJUc`Sl1W0qpkAp3Z?5wjaqe&4pLf+*jJ)Ef0PaqVuU-K{YPPuP`4I68f zP4|&!6x79h6KPL`H^XegIkELBVcw-d~;;_P6m&YFa{@eI6=vhWXTx zr;!$@%*cH$v(NK!Mb6zDQ2Hg8{L3dgdC;pu;O{zL00}e1284ZPOYd(CMc>y5J@7TB zZy)NM5YUpe>+SPz@+ws>Oa05A>W1gdnd^Jf;v7=PPjlz%$d!C(R}A08z#9puoUZ)Q z;ZWH^ASrvDpw<~zmy<>R!g8TuGS=q{#ZEX`7zN{NeCoe)$kYBRh!d^rIyI3K*KPs7 zSKa8pQbZi~RV(_g6pY=-Os$a?U9~#2rN+hpj+wllkm{vyed)lNuo}gRo{dtJv--@V zTV%1JoFuP#YLZZ%IXz7mc$V;D%uW#z2)oFBUr9b`6ku;HFE#NIE;7y0Z{;L;)5#Wd zRJ8LJ&EdU6&5SY8i5?C#YcW@XRqw9H!)~M~fq`EZ$c3O6xa|XCd5O2Lb%h#Qc{!IZ zZ!GW5Nx6K=^v-E0(3LtrmDO~SE%sn?c`$CQB;L4*ic`PubrlVZEYP%^sO|XUrWO9= zsMY#f|H*2F+IO?lAdfuZ16J+Li2U-}^7``D^6BMsjtS*`F75s>3X5IL(mAl%&eDel z`TbwnpfZ@m=faqi)$%ym9@h}UF(}7P^lBGcCCl$lbLLDPm*irwnsoN>|5&#SeXTvb~=d$z0ZN`o7uImen_7hX%;ORc^X z8KCHkewu%q7jo^s(t`Ky<N*vqgF2NJ*s(`76~)7E zVdwO<0mSj4+*fP8c^IMmyNN-CHNJdL6Sh0wg(qE{W5i2eqN?z+1w8&`B>w!#W*H@tR227+Gs$ZW-ClB+?|Og(X?m-q#TBGBb zk(0?ZphC~w>( zw4rxVE1vSE-{Q_#`^?Rjx*O}8i>ixD>k{|lPvnW;^^u38u^Ut~PO{_bzWNqqO|io5 z^zZ|EeD>SqOfb6!`KOlEl1yC1@VQlZ5GT3t) zO_9kUpB?IBs9-HTIz)(w(Qu%^9GI^ry0|H~Z9Y?+wptB6kea!9PJLD{_Q$Igu6x@* zdJf*7f2Zp58IV=U@JO%i%aNyK2}PdqhKircsJ~0u^wp=}`K>qXh0Dn6It*{8<%9p$ zS$L{#?hL$=;J*`XhyN{2{>*xqPkeQ*uZ&TC+G}wB$Ha0Ok}H015YAsCt&m^B)C@3R zB`hkg$tD}EzDO(d%2gn58gYfV@9Qe_n?G)$Rw5kMuW9r9BKd?C zrc~V%zdjPppm^VJgeV=>%p`~+vjsI|ZPmnp(T! z&2U_2UU_SgO+a0>dI(F{o6-&RXvpEW&XnlB2fVpu#0Un7dOOf=F)D8Su0#}oe|JvHXne9LOhNc5B&-1wu@h02t#$Ne))Pug^9F+yz`!R(ytELUtu%M<_y9}BVZY3 zY=Py(NEmx3L~^EKzANg7GB4pwQkY!Ns2G_xbM~AWMdm1b&sAhkUbZMIz1}Gdqte$j zWwBg@OT4+D3S9I%P3fn5E}kwGcoq>Bim-pJ-+jJBp<8dPjPEzpzQ+Xi&I_k=3YT|W zisq?p=6iL8tKpnU;okP0^-x6nIl@8McRqw`m=z|x-Ei7Zg?$LFiYSc8*RjnqK{-Pl zg;gvJCg&(W_OI-B>|d=_TdSCa!=+(Ok_^)ubZJKWKJN%;f&b-G8%;<&=WPal?5DWe zGMyX8@#>{b7?d_$VKdIp6Wnwv?~$5T#4j!3n`8iy#lc(Zu@K1%OqsD6ZASrLxaEpx(RBtF`icLRKl z1uX3Y7nL40hd6t&6U!S2Pp{3nyHw*U5xB+HUcH{b+o#GfftF z+5Gx!+8xUZ&sH|NQIqY%Q78D!t(G`^FU+Y_H5?M`^r^&b+#s`*-)(K2<*?y0h2W+! z#cQph{E3Jjf1<8E`g_qm`QLyLzYZ@B4-6$k%>c+Pt>*iCJ>s z zPP3M>7so59IU%>BMRN8eic(2c83 zjObD7T_)|BW*aob_Zov@!>m1!pct==OkwS}$-Oy1qtU>kA?X%a!zyQXy4qQ1WPy?9 zGFm^ROG*dEbkvSp|JdCf-oOD({hR=T#I22*woc^f$$f{7pE=M8D`iT?{a8e!j5zBm zkKNZ0{307ae1idUOxs2Y4fazwvr}y{@omw)#*SKn@SDMIv^t?* z5q90F365~GWJ#D3L@fBxT(ONAnM|6)qRzXSoRA^H^kEsT4Z42YmRyw=Q}}YFood%y zn8ktY6w_sJk>VY99J!&7Eie*MKcg8sJUi4`T#(?9Jk_IvzD&PvpcPDx5fhMpO2dA% zQ^i~!=tsRrJ2$m%vK`0|Wm`DoX^MP&K&M!vK|6Q)kTd4SrZLIHN^!I z)(uzhTr6dzU!u%OXUoZaeahKVaQcpM&SSR3F|#q}ZXs4rVt_BOqhMVLQ1*IoX{)!fn?5ksCNdHG0bq`y@) z2)d*wtx1p=%M5dm(rMJOIf*n6~R#7`` zDSoOP-}J(VZ)lRkp%?VgbSnD9uy-r58B z$hj)i8WhX@#$5hjLdPg{qaSc6G~!rRtIK!R)WRR8BU$#y>lqBrds)y=_JoV=F<$ym z2FPm8XMNxZwJLnhbRV{v)G@Xu^|A&>xpSX>iWM6be8?#_h11-e?si8&+(z&qv~oil zHKTF})oX1b=uBCRX8fOL&kUAu__9{b~=OA6n9?YWf{Lwt;*F{G{AE^$?X1B5e?3SxZf{# zn}ngDR;|TQHN8L6u14NivBumJtLo}ztzOkR)R|sg!=ZvSt*BGq#8*|xNsySj+Q^=K z?gPtex6>KSWLxZm0W@rP5;`mu*W7bfsFo`!%l@sQ&S=I%@0gxoG z<#E!<53t?GQhW^ZhVs>g?;L4h&Rk>_FIji74bYbCY)O-{`3q+RWz{-}C3!L`W&>%e z9xpao+0wZD*v8BnBVQ#`#o*_^mD-$j$&gmPq#Ovn!7S~K1|xN>hL$u)J^9mLQ|N9 zMNPu)nQSXG&@y2!XKooT5x6DkaFawC;x@4RIb*EP0P%8ZOJ}gp*s+s>nVBR@x#^}( zI@2USVnYAtB3-VPXC*$})yf2d^g98cw5bd0IX$eMwD|#qKThD=lU!)kVx?|B2wD2DwAwySG02YS5%`zKeY?hME{u$TVZ1P!y*>y zh6|)#cj4^CGZyBohIUOiv>NIzS*~s3O>l&zGzZ&*u0>u*2Y4S0v#2ramQCR_EfOG^B$mG^~p08z*h`Y(`TGVGg*)_n>C6UcpyA2E}IlFZSNO$|Is1=@Td76j)Vzzxl4rT)FORW#-wlr_UbZBpTJdI{cYRuGrLjdHf)D z4S9gN(dNY&?VdV*Y`pJyiPL%w_K%K-X?rf!)gq#fS7&pL98n=YRi<$KsWYd~o=>M( ztS!lQT@Dxj_)TTCH0PM6SZ);kb=~AqD!>4R3V5&}YnKk-%#c&JKYoR(4w)xB$1Xt- zr?83yqqTrT9!-@W`&zVy#m=ET<0vU}9f#Sp7c?A=CMbPy4`#MMx}sUny#rL?xX3cC zT>=t~!Wybu@lC7Qp3x&E-o*YZSGVb~9crm5zC{$KTDhv3J-$k4iopn46Uu2o+1KOk z2@*C-X+@@o>rdeYY|eIoL)jx(+L7IrG^qNT6=!PSI~_Q+1B6dn-@!q(TU^7j|+8i zj2j9RJM=m4CHIpw{Ui&uwKbmaC1~LWwZspPhAGL2weLCDtg>{cH&R&mD){KYN|&sc ztU^8&gfDb~T>D3t*|mSX*!U{Y{_@r9qZ2y<*MRB1USdPAF|z1{uYJ}6*(%6lQv|Ag zPe{xYl4`1Ia-iW*I(rbTy5<1p5{uq127h3n_2bE{&mvX0Va+f1z(yEKVWAY%jNn9Z z>{cL=yxrTIMnM~+ZO`cYTvaO?oTB&ok88Epe_Ct3 z@3VEA@dq1_D0*_d&jHK*2M}BPRAqaKKc5=!iy-47A08X;gN(20&vV+Su2UDhSL=ih zW4N-y_b12u>W2~X_ojs$+vM}a#rdFRSz?gW9 z<^bn6bha)-YMpUGQ4L%~ZgF{8@8&9ikvy#STAVt~8RPr3Ie!1>)cN_NXODdk0#kG~ zIdk##<4--o*Tr?e;VN}MdgRR6j;z?lA4@9dj4^GR2vs__Zpo!o8hdk1spMd1?9}y3}kgJVDuV1 z<%z)-1kC1dULjm}RocG=B@K4Ci_*hj2j`ET`~JD}XCFTXPBs?SpY4Fg2|0J-H0FPj zj-LCICr&+Zf0;hnZ;I9u3RI4&>G2$QVh zTa~dOX*4<&tgz*n7&0ljHh2HMp4w*6yJFW!G9VRrAjM{0YR-<4u}KkH;;v|BzgX6+ zM312ihy)lPh<0qmF^Zok3PE^$F$C{)-oF3q ziwpu+>Uwju0wqA~kRj3}sL!q8tTISWZ4Gx(QbrFf1vRRYsvy*r_pA_pZJg7EwKWb^ z!6w~XGU|RUT~;4HZOClHgH%zc=;sw?f`U2caz33JyKnE!{iD;>A;vN<2(;Qr(wXcD z%b>rJ){v^;=#Z;Y;VBcoh*&?06OiNhxd&KtZv*Eyc#WU}ua{Rcy!K0ZoB6c2(jelc zZ13bAQOSzYBwv1dm)-XQT7zxns6}|paLT~(lkt-pb44UAMjD;gVS`qYDUg%=BoMDq z@@b#*9d=+*AJTMeAMae zR>07Kb!?(M^(2$4^={o*r@Yuc(eb8sD(LCV`T0jqAnA2C#@8?u`TXed^F?7vq}OsY z9)~vTK0 zyFUL>0`WeV9Z-@Gkz}29MOk8K;Zsb4&=tn<%;W6*$$FYo$YT z%-`h3>q)t)cu9+w19GH3&{p9@>eyl&2(&O94!$tGtGATm5nYK(czzN7Rcst#-@fS^ zy_DZlBGRd$UA~tB<(7mdeBwu_ zB&j9HAh$`_J`g%tNa*-D0h5;)0pf#7-|>YItaBk?pBCC0WI=_DVY~KyW!rj>lr_p~ znbM4%_cimKDg7}gsTCjH3ePFhu(*81JYwPIBtt2ROFG=v*2122(5y3cj za9m_~99c`v^5Ii#lmtGW{F<1%xa^~NG5$#rU&WM5t1 zcwU2oy09lX4PpMQjDNV~JOzx|f{ee5zPCjm$}A3>hop#CO5fQ0;bqzUu|+9G7JE$| zKlS}nr=L7^C`X)CRQdRIi(puR03+w^sJ3A#4iOOWCbG(Db5-Le9x9aNa9f-bF%*id zJ8Hk%gh3<3Y_=q~+!~wf%gPEiu^$`VHEb)DI@5*_Yo?feoNU6$f~St1Ipyfh-x#+im4tz09qJ<|_S(7NR!5qea6`QPaUF#r zO?5cNrK3Cf+h?qrmGnhwrXh_F2jRsjrVpkJO*-q;z@k+RO$62hQ#Dw+o_nf0y3nip zetLXi?&%+2zP9=!qDwb_%Gtn|0DWrZ%=)>_8=QFEK6E;tI-bG}kwnr^e0xGO)C*-K zKv1ayL***w}9=C*I70ZaqfAKySrj=@f7 zD-W|7P}2!!fky_$)J}$yL{a`*xDqv_N39)OsQUhPtkkd(#e!gvG6OADXT63{tatRv z^yqC{jm4J!qH+S0Y!op%3CU+p-9xGlM;Cijdz-b5<={w{6sV>r6|p42FB?1*m9oi1 zd!8TT=bk)$luTH7o>&i0Mj0m8_UX`MVW*eQg`xIdK7jF?+6rCzue^MymGvPa(<)nR zUc-gY2e&tt7RXY7u4S5svMAlzpwQ4Pb?xesjx1j3B1syZJ9AcxUsat z$sjsHQn8lBIDsl8uGCLG`Os;pKL4KB`gD&25K55P#!UO6YHx#TDjhqB0eG-M2r)|? z3a_bMU04;FraB_Tw#^rQ-yB`2>iP7=(<4y<=Akz=Ut3&|eJ>Or7>^bo8Sl+>9W62d0W)x>M92)SxF16te<9O9fsTCFV$U{X!M%;jH8kaZkqXHeS4fJ+5ly1)V?d3geNYGC9+q1pudA zLnR70wo0 ztE7zj(0M{Yr;p8_ec~u9Zds==sOFP^8_SHK1Jz&aJF{yHsDkdt0}{S!5{jY&R*oM; zuEf=4fFA00tIa9iK$1#Gk`O^})PN+n6H+t=Kzfu(*%32{9Vz=#DxG6FHCertZdnNN zoWJyBv{rfaYUwX4>l~I!F!V$%>()ssMrg2jeNaqZG%%cr5&^2H`{kt@OY2Jne|Sma zlSs!EJlu`)hXZs>Om+6T)eRXf$=yVlH-EL)3;;9@HyQN!jMhZv+^!N5jWi5jNRl@bm#jD39Rn7Bk0Bl|vx zK`L?lXNp%|9@)v5N0!WQtjwp3#k|D$`YP9vc*{-t);*{8_U#i@d(cxRM=yy#wiaf-{q;KW$HrOhlN^BFI-w$yTo0Ix|&l5n^yj-ma^dh@|FWX)XE#63rxFp~~ARiEfZ__Oz^(bxmmd4FbZ8%fjFg zmJ?K|-xiXq*{3GOnrgMnm~VH9|GuQyRJ&<27sm*iMq3Bw5h10S`60*B`BDXDEj3vl`H#YL@<~+ql%0>kzU?Lo;N@ml zcq>(R*hot)BLT~I^BKV?`(Ml0`Eq?k z$Oa$6g=Aqep%utfUHW1FNv`ATKM`ZN#BbEpkXd*(W`JgEd1Tc%wV6)eubM$;W`$fq zWv+Ap#_D&Zb)3>5>=Ih&rr?|d7B)vZrE^_w9>E>r{8}C`n}3fl zq}7YPGa<%D^@p_iCVj^llGm$0^FxKE$*C-}d*b@YXI8lA($!*>2KJMz7X-=}3Ju&- zDSj@EF)A*aY|#asAjwI;I=R82vr#7YFi~;e#(OW7FRdOO$1Y!GNgxYi@#ZM(AGzRx zX^*L~WG*jV@iv={)X*xk43-EZp?nk&p12Rp#GtJVD&d}V8(YC-%1dylA3GNMLl)2Y z#HllnpXVi}W!t^jP}#GOXQgaX6Le{Lnr~N#8j@PW26zqLzf9+7^PD#%RvEV>G46ao zqNzDIC|kpta%oKqbhCY5@KtqDpj40}`d*sm%t6z2UL$tkWq8?oys-D1+?_>;qP>mF zUstU|21G2iz%U^+#ogwvRj#4AwgA#OF;(XPu`*;E6{O9-ZD|#OBF)Gl3OG}lLgSn3 z%h%EuohMZ@#L@^?Z!`0Q{zmX6-b$Zhlc3vCTX(Je(KPdEzfJdP|ES3{+?l+kw1|(h*%dN>=^~67Qr0iIDK2Hr=wA;fErzNumKi35LiQT zYV&pOL)*49>0#%%Ix73`vU(LXmvYOJguiV#LcAi366hQLo>pJg>u3Tc+q-5iSqzm* zQsa3nTex5%-y;O8C}}5Vf|Y$3krH{&kzNzbN_&~O2CQwj%8{*jCx2=vQ{M}V22#lz zeUG9^JH!gx>FbRBb$y6_vF7+Yi8h5T5Qh?`Q^FfK{)@ceO3IXAPvf^SUsVGTPKq@a zwku~^Z!au`LZbFlips8uuT})523`3Kabx5 zHa1)MYzM2H{2@3v45OR|i|^J)%@)gIhbkT?M5}(sa+pRMFTc{604E-9{&r90NpX&v z1|DIKudS_?%C=Er>hZl(5o&ta7+d1AdO=M@7o@V}#k*6St zh3$=N3v|baX8!)zh+P|$$bt1}*E}GkBnznjwXIV@Ihu}=ff89`ZK>0@c`Qv#v;MY$ zncEd`w(4_yeUuI0@Ji+i=MNQm#)} z+R!N9*0B#xnc?*!F_xflf>vNxIp0tpPWl&2G zU3ZoP4QWVCH`=@o631WbqH_8hhi5kp85wNZ^fNS=0o>+Z2VQrD4PbJm&8dv<_~N05 z+Mk7Th02urlM!6r)B~q6e8hP9`uq>c|bO-tHxUI-)Km}z!v824$3|X~!pRcKtvp@`|;6L5Cm{BGIPG@21W+B!1 zwWd)&KaT8_e*&E9Yhkr6lHuwo0QSivsz^JE`^-eyqP>2dhYM2_tLnj=ez;MojC@)bRenCvvSw11%IRBkDfnu z-+jE<{^tJHH^Ob2TpE1S+S`_^U}<=rBzbC(j%8%lvdnG(U~^kb`U}$A!Un^2u@wWPW~089Z2m-vvv1!M?cl_A*z5k6v5D4&K-)n+NkvHv*KXu~# z4w^mk_(`^VpUG})S@iF4|2XG0QKj@)1M?I*DCv)6bNTA@rU4ru&+eqxCbc=77=4a- z5GG_!c`F@ypp~*L=x88C$&(Eq>Zqq3Pt%OG9|d+;1tT&i?8w6rW>M;)be9%UPL&S- z*47K1ho%)khsSr$aF2WqHzvN13?g96t8ItFq zjWGX6Vr1^b<+&#U{fBUou5XeQUmxFp@V>u0_+Reb6T3_19$UYyVHAnY;Jz=I*_JeBU<@ee;`NyZ665a4!w#&XPV*I;GR@z6Zwl zedEvr_kZo)2kyOhk9Km;ou_7e9oeOWRUgwuP~#^KjvxM~C0%>Ec>URx@!`wOhwl=U zU0Obf8}lGv?-?1XZ*FVCcW^>P(=dGXf*9YUtN0Uz{clqy~$){Vl$6G(!`Z<5Ru=U#H6CQmq=8t#zQ(wKf z^=n>wnI^B`2JG20d28|kka%(O7eRU-&eq{j!%tMoke{QFnJ%qceZ}Tr%$$C zqwA^QcK$-?CAR-wnA~QzpG`hsR(I&_gUN@Q(IW!|3CzT@TAB7;?v2y2}d7D zjy*l%tby@(@|($BxBl7WPQZ?TC%25d_W;dgnEX)V;YPQ?i=UpDqwf|zFL?T-+1BWl)2Pv;j{xZkf{h2{RR>Ez(`ZnYK zlPF{Bms_uh&NQGqd?5tKBt%wxe2XFAahQ@xtGD>!11K!^vNE3VrCk=ztaR zG+$)uqD@Bs7pVVNBGX&K=bst&pZM>cd%))VJl5KX8$J*K)g z#^_?$48t!ScTdmqH8_pb@+u)Ivuer|_JciC>{^7DNsYV*&%Q0*CjmKPYaT z{1P~Kf%ehX&&G`8g{@x*L0d0sq?6nH{U=6|xr3Gx51+NxcPkAUN@Z{i;XSP@GyW8^ z2|*H*v>3?a>VnXOB{&3S%**t&bt_90(Ye-x!2_g?miO~#*nlUWAc@4UzYbPza17l7 z@YiD?|7GhHI=YqS5?^TDM1R3fcbP&k)j3*U#Xz5BT>ZO+}0hQD`PC@rUDQ4qm;!c~C*rd&c|V zlb>z9EMOo(5x#Eo{a;R}42WqVOtknr?)FValSFW5Qhx%!OpAZvPp0)zgx4~e7m+bY z7q5;H*_!mnVuvDB)2b&vWg)~qkVc>CVL_=@q{BOsXrS=5t=nF0X`7@aB#MUVSCIjk)mGqjYCPi#K@5%Qfw5z>y~;Yh0%re` z2zxK_pl_lW;6gHbcYoy;Jn zzXM?cc z3GrGnNi9{9a|)kqE0#>XqGk;2P}ThX;gx(FA~h!kKGJ9I zvGIk&Xo+81(8wZ31dXq)EwQ&T590SMp2R-7t@$!&C1#$7%kMnrgU87s=O6sQ0%2^Q zQvUT{#&QS1+NZo$q2hD)QDEg>^?Mj@*m-rksZKRci9O>^WBJ9NLvPI{ec&B`y#krB z1@z)wOmFoEoYLY1=WN{mHB zD}^nO{G%;JE`FADmAu3ZulI(8Nyi+-yu*=|-R3w5#!&9|Rl1 z2_f~-gX3`G>{Ny_#c;J*0>}@>?Z!1wg&^lN?+lj(_&2$x84BWwk-R1e-JLr#IY`vF z0mn7GDFKs*yAHVDO95B@vqmK7pw)uE3s&D}2j3i7i38te7{z++QFjNeILAwJin5Bt z_GTP1k%u}>bC{cZ{&{DXYl8CMFcHB7hLz;g4ChsrZ*iFkN=Tjr{JnGceLId97tFoi zJ}ASw{cE2?1~Qun2|K2riGuO4nAW&75G)OnV_1y5ec+E@#Xv6qIo?C34k1nAWA@gL6iAb*%-QX z3rr#79S0uH&g{{=@d3ig0U!mt)Z@o?@EsCOI4LKaj1T+IJV)OApTKRPx(h|d1LH^NWRxx36i*_DlfQ)FLrWNI_( z22WF<5!}~`X4FW?YM!_|tat<(2Q)>5ND?|FCl&3#+bljHIWuZ`&h^5F(!b`P%XrzlQ?VGF-#kn z3M|>i?gH-tjM@Lq)k~L}kv>1ihIk-XKVo>xYdkJc`@w-RI_OjThIAyiPSFxnv7(m* zEaaHseJ4frX&PwMk{@pT@=PQ)tNODw?Ez5aE$Jy;hiMDR5_(jW^jD0D-k_^kxiNQ2 z-}A?b#ga$>|1^j0BS!4`%<~0x9Sn8Z0qr z?Lsi?2nc}hG;eL1Bt# z$))G7Qan)8$Xl#QBTuB{9;2r0xoS}cZ5pts#gN2~=!Dgy*820|ss!r0>1`l3@-uubk!RZj_Iv;78(Bs&dw=uI8fmX%SM3ziHycQ4 zk9h@2CWbI5Q_ZX*7Qw!TNu(-5TxDf2`5=ReM7T`NuKccKZGKHcRP3GvWz8T74tyfo zV-#)LoAimJ20BIkCZN*@dH`sxV~`SE=Rooz&z#M1iyH^Vb3bY!@pr})II}oPISEA> zKxLwcR3zKxi~u5kIdR4V_sinMWVI7LcTKGD!2JmXxk)BBC4ciR<6cwUo^9PB$6 zd^B(Im-z>I&ub;?Q-@g4MbE7*tVZ8Qq3PO3`(kEILZ+@!R$=tQ2C~fpC=GCEi8>CO zWw=Zx@jEsezLxwqC6W%23fTfa_2cvxCCowhz;I#kr$p%Grn zau7Wu&8!ZZ6y<>Bu#Jy7_XuNQli{;dHU1mcX<9J(1b1qS0F^z%1}oOd$7jFzo|8&pREvzlCVx-&}%ddgO za0bAoR2Cdt7rMJmQ@e5f+I~zE~Id z95^$q;k3X)R|;-NzEdx`-%ilT$6~p2ax#nBg*5NKrmJ?5KK>(JpTdZj=y*u8M-)k% z6;f=rk&sop&LMLt+|D(!T&FC+$i*u@l)_cW1#GEA+&b~>^DAlb@vxG<0^Ei5;@K1r zC2V^f2U+j6q$@2Z?;z`Nk~^Mk8t?GU_3+C85sILxj&MOjH|?+7EN{&{8?4s(*TCAQ zr@VDp|Lyt8EI=`*oMaNX1@zq9v+P}&V-suZ=SzXU+$>x&gmz+Gb$LE(*(qVsxoh+? zZ1a0YlL7k;)gjwH(_U>4eefW0tqV3l!-)UXzzmzrr1P-8M4-;6e~u0?|9#T#?FqAMwA-d`Oo`>f)W4Sr>F1wxxDZCxgLM_aQ0kE z_=0cq&m;xeMEiAV9Rj7i$NI%MW`NoW90G`5#}b~#E(xQL&ZwNjGk=?-)Oj-eh7xQNr?8iw&@5^Lx%G?<*YO=mCTP++BI5b7-Xp)~x%7JYQXr?% zA^wp7s+PfT6M-Xc(%fH_0)iM`+j=F>JU_comk&Oz$-b`lf#Yb(-oL%~TQ~Ji-K?4$ zeXxfFM3#2tbxFJC$>d)VK9n(Pap)TYRkopzECKYW6U5GY0;=`QPbDoBWMk2JM2x&n zi*`oP!U7vgfa2hKK-{N*25ympv+@8)_4EQ!ngM}n^onA9cPOxr1ERpee!$Ir4|etW zGUNVFsBD3k+;S*_-%9_^5<O;tcvc;eZAvD?glaU`wLPDo!|i%UNK0!bEJ3zbI4B1^kyF zju_)GAq?PVrqxzahR>ABIL>R<#it4-$Z!iY{g%8vW1>_3DR0kAfxB@siekc$~duDNCW?C;I^^9Q6=5fH68# zDvJ~Ryc@cqx%^jlXMoPMB@ew;rlG3%y3U+wsZ@>73`Ne$uR)ij7szUra5E0s zraqN-Y9PX3Wjbbj$% z-Y+>2ONwn2ou1_8=jzAV<p5(H6YPHDae~W9ke839kJg-z^Q_Ov>&jw zW@$LGa6&?LD7hL)Yq3EsKY4NU>{4mZK+Dw6lwZ5<9wQO|I|lpre~fZU zr|IjgKzaz=dO1(hGT>RR(+w7F!K=LTL_eh-NUX6tv6nmaF`I0nOe@yz@Ksbp&5$9` zBpO@!wXGKsqD~r0cQy@6lQ*QbU_$vFG8wSH6^6zTHdjpY8CRL_r6U{pm}JiLg`m zVcR?hp4pL2k?2}SU&J`<_Q?;oJsHTAg`IXaCBrGwg*f}rew6vNSqMgZM|7>Q6jy<% zvq2?2sG}rnEpWG+p?Y|#>LK{4jn7^WiAkAI@xi18;i7lZaP$k4iMg=LL8Ay8UNM)qoia2bp0Oa|tlP z-Q4@?!sR)Rxx=@@*;f3R$Z_jusB0VNT4k+scLN3Mf^aS1+<*C0`ei#k1}GP-*Il9^D;HhX&RZ*T3{3e`zBHyMMKjei58P%NNLzJ)IDnPCOBL`0K=V z`RkvC5bCj3>kHR#W*-2NFMexz83;c`!kpyn$s*}OF}3Z?TUqE?_@qV8wXF@M9%&c4 z?r4yM@hI(EMEh&RG79vUER7jdVERo~sf2o=RD~jjVgXYk5*A8zM=ffx#@2j4L{>{B zI64UHC zXG$sYWh_KRnpWG=UKc6r*`PhIOrkJ{4a^#u7i;dG6 zSz7CGi9k7MVwmkt!ODR^eWAT6fADsYeP`oQo73_#u2a9uHbqV`su!aIO`hye<{vUJ z<{dBIJD7ji!QkTDoW)>lSJfz^+TF4%Mr+3v2m; zqAWc?RJZRifX+Qox^b*Aoa4cDIFkg4NycWF4o)(z>+L zA8&uC;^Uq42{%+hVZ?F9V-*Uj=TTOUc+uw_*EA%SK+craBLMSdci9c6bf-EHaH)ro z4+m*Pkp#yui5Q`+xJkRSxktbB*+u-KMB92oi2zGIo1yYZwDYcH3%8%-GARn4NyHvT zxR+eMq@jKN>ADj6uM}*5Q;U^}yx+S@3Efc|R|Z8h13q`uq>iQ2T|873-RxAJc~^8t z_^VS@G!aH^X&Z-V3L0bprj7cvO2%O38l_VmEB-QiR1{PtSy5{3`76@R{HrnKo>z6c z;*=j-wrxe1^;3JM7z9b}{z;Ob|FI!3^qoa9c8QnMQ2^;{<4KiIHfS7iVGP>9GkrWe z9!=mqv^;w@wAxJ|G?kG7NnWD;V%&u(l&G^bd0(zG1%lmS*!^~NCGW~iRp>7berS|Kj2Z6|d;2>3rdb>5*|{E}Rk=JKik52P63zaY3yjH<_% zT7zAu7!!Zh3;Q`!j8k_BWNDp)l3&my`TuQ*WN7WehJZ52IcCx?(YUlS<(GXD$!uF+ z$eOTJY@aH{nhZu9gIwq;;*`*`jZ=C2-f=Luz|Q5UDW$Y7T`6Yq(y_n>Rf)Vi2{&!P zaLIl#kf2$aXmjl0;9g8s(p0d4-!&pjgfv{n3MfGeGeC}DWDEuTRl!eJ%++1&3Vs6; z!(K()93KS!*fvDiQRc1uDsZUcUD_7IL_@1q*c1Mt26Q2({GKke-o=1yZC095=BIFZ z(@VwXv;s7!Vg_h?6AIdPRw{#J2ZJjr7D%yPBmR)dYzD~A9>2!5uB!G$d~KI0P2u5A zf4Pcdm;Kqr81CVmdPuiX*MHLQwt%t2FCO|3VVCL6h(>3)v><#Sl1Dep7BB+#PyN4=cH#=14r?H)M+ z*%q*)KAc{em~`v4{n{(>BL3dXa|+T-n?3hyJao>voR;aKLnRcH>~uaudU*jQhjpI( z%N`RkKt=nQRC#GOLRo0k`l zPZC7cXB; zQ08ttpuhfc;l{!}kj{2L3{Hnh(f`7R+Rr^FWcN3NCODHn)*eT}bgUT5dpEl#%+P{& z>!kz#_nUI}Chuu`sMkmyn#kiL_4iL++(!7!{nO%_E_90@1eHQ(UaYh!IW4Z&4j3{M zRIp@|CYth1Pat(fg`g{@NP%mvkvsxN-I~0~*?VuLzJFh+B;`X&adUEESUFoG zeDH{_K1!g{5~!~gHgiQeX0I#lvCb5^tG*5o_LUEw$n~l*AO7vAj_e9pN5ML-FV+W_ z+wK&LE*)I|;mUJ!YYWdIrPlLil1^_wT)defV{McQ_2SsNGJ9tWmkJdrvy?RW9c%V~ z^55%7g?~$HS0^zs5#E~ofy)Fe1tWqbKeSrAT0LURC_NCX78xIqty(zs|T+*VxrzPH~@Ph!h`4dI?1j6Gg#<|Oz*H%+ipLZ#z zDwML?)gO@K4F6Fsc?#pmE~$}0j3)dqY4nKFG&Oxy2kB2&`6&uq4(ZGS0f(xbv4#x6 zy;3ab{qfo*Fgnwm7U*4=)U(ognIa(sRYv(p$dVdVshukYBvd4tw%_6plnPSc5X%Y2 zRyI;=*_-g3_D9&|w(80h6gVo8IAuk7n`z|S<}2f)51l9{PzY7^Pn=ePG)lb94Q5;l zGXlaJT4k?^Y@&pUq^1={K^^Mw2go787!Qs{v0C5}5 zGIxef>3oN<=t3rxymRSto$9AMhQ2iLJ||E zTZXGljPGc8_{pPZAE_y@IkCjU;GgL4;V0*hJ#uvZ@BjYqIRr^gMlOC4uf)PKZ=RP4ggb%x5{-ttYcfy@kXe`OXp*M2;=Itx!O&SOK&@m!A)MO`-w zlp>3ukLpw%y#tg%BJ{yU3i5CL>Y#K4Q~AK_gEHK9W}UWU!gqs~wZ7*=#&{8yWGL9;kxd$10SQ zo2DFYv`udURWb7C?%{P7@Z*?AMe3eHZ(^8@DV;r{ca+wU`=)91cEOToJ%AKz3?>(W>0XW%A@X3a{Y zw9*Hew~bED*aHy-D|o+4P;mbaFY1J;ItY;&}DU(YHP-6 zvagzUgmsO(Ir5$_a&c~nv@t9@`N^abt?@-?X8FZ-Bv6B&*42q~N3r&p;-;}Str^%0 z6)Vr$*=#8vLOEp7XMy(wHM!61bJ*9|zPH8IrR9~Yn~U=o7dd@N<9jCanPzy;%r29K z<5`7CK5bH50w3KFLY~q|T2EAd1Rj&RHR@mByQ~CWYfG#w(Q0z&5!x(GWQk>@b5n50 zt!-h|qPC{CZD7F?xiq3T#5R`>0D8+@2~$BHQI}S4Ug$_SX!cN&0?g(ja)??p`2%jSZao< z8`39#WbW@HHC5=*e!6{EU$6rY7NLxUJcyj&24Th%A6b@R?Q@ zOtSf$dr6(P`kdKiSLk~N)j!E$!eUNQ9XZdlDGF0Z%$b~77C~x^m%_ViIa*am{Xerv zmQxIM)@OwF8_Tv&M{u@%xuK@%yC%@E&7fi=7v`RN;QpK}naj$viKpKhf9o4_irAw9 z>@Fgp^4a>y&y8!|B4Q=5-A~;ayyMgk9`E&Su|*L@~-Kpq03>GIF&_EQ$1KCr);B3yw)< z!i7_7Y^8pkr~1lgy0R&mMSIK>nci~}F8{8SIOf*YKc|Z&FPz!glEJhx4Qz9kbU-P_)fGz>R=pA{ZFtQ= zaPRpY8yd=>*T=^QkW|Lj&kbU|1)?(*ryg)cXdk;LktRh}AzJobx^i&5w!mq~7Xzi6 zEojUH+=B%prQ{`T{6i87Teeg9q$(9~de7?s);01J)QqSpl-?SFr*Na)sl>h_xtJ~K zWk|HT#i(`aR+6t$p^Z0ETo5xP)eqI2)gv6y4m%ss;nU;-Elem!g8ME@4PDT#U07&H zUkb;3*E#F4<=@ybDq|9i)p7Nc<`k@4_Xc_+wp)(u5dK?hY9aHZ3l*WFGhgzAb!asl zBJ>Jfk!Uc5RAlMrJ%p`kiU7SJ`e1l9U061d#E{!>f&jLX{R16=QM6~+- z0^|pL??jR(>hcJw{g2GyzCf1K(7P=j>^3;O_ws{>fykZP7#>N_fH$v9n88d4f&kG9 zMQo0$Pa9Gs)Cc z%Ab%73yd(6m;^VU=?#g~lDGg}tXQs`W?7P2R)>unrD71Ni3oH1Q$oXhS^-A%b+utd z;j{TdWWLCG7<^?7hsew?rOref=2=F?eo8GZzbhA3u_P5H@s-U5>jK0O#>A<`jVBk@ zbSq#<+HtRh_)c6^ooQW27y5}ZB5fZB34Bg+twM@9e$4wRUFmQSOQs9d>0Pqu;V0)G zJ9_NIsYgz8*0Iihk@%1puysXZ07luoDwPb~cr*>G=6TAuZb>+ixmXiI z$Qv+}U->mlAq+`eq-btgHku=Th_W@Wr~=~n$w!#vE;@is8hQj?sSVgS`Cz{<0CDOT z%aRf2R9#{`+a{T_Qih1YCzR>Z!#b1+~wqj(sfDE;lYE3 zgaw2RVN!pLEQfVJR#?);=6_JprTLC7QcsE>H+-)Z@FY2XLT}3qrq5D&R;FL6S=Bta z@&sAzKan-kPJFBt3`10Z{~N@(l&>RUP}Y@fW9$MUatiGgcM&W3orR7M6=vi@eyh?0 zI^p7rC@qocUm7nQ7|G|<{!(9sAzX4F?kS=xEJM!evC&&15CYC*jDjRS#qk@2*vU`z#)#UTSA)=ZXKP}P-S9v z{$%VzLi8wzaZAZAJT@n#dWXramR_%ERc5{grMsFQuW>uO*k z1HCAf@>hY|8hA;e9a7zxFDC3A+pkNVt<-HCu&OEq#}GN>6DXFw(VY$VYu@fo=@~bw zo)9$EvsIfG6MYP@o(NO<6sT0}ZINEIsTB>-=!Y$ezF?->y0;T(mfBWt%}tDqj~{JV zxO$CixO3Gm-w|?>eFCRs$=vH#lk+_X>7>VIC*e+qQwsv=*Je1EHkMYdZ!?^{FEaJ3 z;rP;nG@PqzE1RnZF*KZatu{Gpt&&A)2y?oTEd#&2xUsObEHDF5c%f@T+|DLM4LHgX zb=6{nBOzWt+mn?h=93(n?OpNe;E+1$&5i^w7=HfR#T8F0fl@`G1n4``q!Ng#3k#JD zGU!>Oh%5TKca97o#35=2EiT8_yNpDwXJ4m+$8eftQ#PA`jqi8SDp4Fj%&3c% zs(`iH2sY3|O>9Q6*tQ8y-omo&0Y^T0Th!dT3ZbtoUGgM`fDcePF~5Pm&D1j{nn7?3 zoNdz{#6gji?q}ZQaLqO%J&K{oejkNH`^uqKTu|!gZr25tA>R>`xOEhz>fZ7MTCYXni&ujXGp|V7P^JbkB=4&6 zeCRQmZHd^ zll#5}`1CWdl86-5yixZ|Z~UJjVDlqa#+&5(e4`?0mOOw zSd8gsaL28m4UvI(Y}#$dT8bMD*nu6()4+nAlH*FYO=Uky0JJ$}`=iTtjQip_Cs6?j z*Fm-RV#E<1y-W4_$BFH{dl*z~;^MsRyFL%shIwamzjJap=(XDzG^gA^z3NDeAuT4o zJ>V6bI{BE^Q?7t6I9ps}6Hx>&6x-2ex;lRO5y!unT!!@N%olZC1UPqCrat%}Ek{T& zX%9lNy-V3NLR&~G^URc2{~jP=xbco6D2r=r{cwyb&2l(~X0v8&#_Vm;sXO=Ic|mr> zlGAxHtH4$mWqW2EJU1Z5IE0#+Y}n&MTv(`M;O@D}TOdvmk5`lQ|QB#Zi#i70DM!@_$_*Nrb5|ZrQ#z}tWpFA7}2Xltf=b>PK;&H zxvV)q-~mlLQ#{RI=$4MLPu0Zkd~TaUYN5eB2gcBjxwS2YZxC7o0di53iLi3u=7Gz_ zKo}sMSTkum?-!SB=!-?!B1jI%Lqe+>GLG0GLaFA14W ze>mJar{Op0gk)!%T9gTG>`ooe$;)26&LPa)V1SW!;M{?W2bK>!bl~JqgHMx%7WS+x z;1^`X*GP{_+H`oqb#7l#P-yzk`uNEB?^4;*f$=#$eY<@6F@67(Z|?h6^Oc8kq$z#^ z_-s-2Wr(REviRI0Y56QWF1p(| zXbc0@h-LW^{9S7~I4x(-$4Ac{JK=bo{a$xNG`-UgG07CB$c9==?<-8~^hpvDAJ>Ls zFEvzp^i^0K=ekCk4&%P{gMNka8ew>ln|bH*jHFu?j#1vH+-ns^SUJ*peDK<(vEqvo zxAR$F!$gYVh@nDGMY7~I3y({%$R)04TDhjnSz5z^M_Pt)Y-R`2C$jyK5a@ah*4y@z zX)u5hAAvb{O#N^g`s%{fMb;E6#V;f6QeMlJ$v}VB?V32t7tRzyK!b2lG?HN@3&Xe0 z50q0)^dA4&UT9RyHSJSQ7RjZhYYWTsHx`yR%RvQTA(3_RWFu3+T$|y_F-43!6o4;1^j;-P~Bbu4}BZ6)lfk_oIp&%jap>8EQLVCg!p(DZL(3goS7g_i_*v zPKhTb0tea3vE_-0412L@VY4~4cYHVmy99asfXyV%<&Yz5M2JZRvpUJBmTeh_wjgIs zoU#3z>$%r1FNI+%mr2nHmNdW*(x`fC8g?gRMoRg`c91>AeIjDGBy#PEA7}QJ|8G<$ zl&PY`NECJ`?eX)EguZ+n`ro`BFuSs50A`KuI%@FvBj*F&HQ-%axCyIY-T2`kH$lYI zaKI&@&oc8Pk`;;}-r#(oA`j%ULbgt_V~HSPo9tdbIdD|Vz+Hbo-B0$YJ|P0;mEZt(v0OCT7YSkDVZ`X&1Q0G zE%ZxzJjc;{vZyQaG-$`wFHPkn;d0uTcfw7DWVL!e3Bm!?o0l(MwNF~XXe0v>19*vW zVXR1G1cmQS6+>CrX%>7(&!OJZMvV+R%2g>m}dxz`=Lg zazJMiA)#xa#^xQ-c2wj7kfj`N-BwOLscq*d+ffjogz6oR_4y)0hEw*e3~Xiywzg4| z)Z&7{0hep2o5sSZMVEr-jf!N#GT`uIJKk5-v)EjO717Y{icH>?HA4kqB5RP$08_;D z;`(L1IpZ`aBJAiOy66a7If3uvpqk-XCpl+IRoQP#Gi%%MqDQH%GVST)W6J`FDn6+s zN{D-ue>=$6p7G=@X6&P^m~c*MF)(XB1hED_$NmsPtQ0 zyWXr&Hqz@@8`O|6XN3?{^O(yQB3)LJm z5MOajBaVZWl3T46PW63Zxfwc`WR2u|+Xk)VbcDmN3x}Ndx45R`VOO{fSU*UuF!5`P zc95~O%K7Laf>pxaa1dxf@XsApbDyb=Tq&K$2>uoM&8i2>JnN_mH)rN%W3a z8x-5gy;kfxU;Ax@hFlvs-|hM98$Vp!NOcX2W@v%rS(=GLv8bd=3G47-rY+Bgs4?Q2 zXOBL7;wjH{x}=UaSs+xRSh@?&kM&HY<%nHPNMYzy4n<$XN9G!p6d<;_Cwbby5S-+i zil$Y)=#*xYgimUteQ54)#5bFoqU*J54LN|pM);+C2$x0RFZkO}BI?%4CEMz}UqYN8N019BH^JZ+I(duFBDa=U#`wyi-Gt z*l@_i7Ph^8yy~f-DoD8}NxX`kw8a0wy2Qm<$?4Fr3iWGfARxu1cvlv>jj3vE(&*JY zA@Zxd@)W>>aNB@-qiy16ppTs$3X#?58-^Ji{@VB$wK5@S0Z5K~oT(zc6~e>Gk0ig3Gv?sw!7v>GuFCt*I$Ew# zsIXo{n{a@v#NvZW&dZ%ILlLd_hoS>O$#I{mUok$C&!N+&p`v3QRFxMsN>q||;H8{r^Tu_)ph zE|m&W5pz;ABqb;VNM(GO&%Qs($$}KbcTA__ots`Wp(Y_LNgTb&K$CuLJM>)xMV!0L zIxbVkwn?&}TEc?YPME5x*kLNtbs`_AyV;##*6tGw0Hfk?WAWOm6V;`QL@c#?k_Cik z^f8*6g>`pDwfe+BndFL)H-6~q%If0v;LZwu=g(}fDg7%;BncxGvW4qfi?^7ccO|k! z-UnvMmf{ok-c?E2o0mCYXi^?yCkD~iLO%juKiXWn^lTdZKFu_eHkieP^_jd*kC^J- zM%6G9YW>oJlu!f}#1Nv4REc2a4Q?fyJH-jblX7s1h9c3DB^h5@xpqyp;%EaH(sjz+ zx)Wo7%su$7E$2!)BU(iDmYdG;GyTQh_=Te0OmWv_(xEeugy5DRCef+k9c}BLD*L5>6#OB@e zs!+oomeVa+!CQP(;e9K6C1OoVQyLa?A24?fp!%$;8^%*1TL)`Yhs_=ud%O|^GJF(I zpV6g&Sqv+J@`5#Kl>Td@^p7k?%2MD9|WY6et z3!*;|jz=6ycW8X@;uReuq4lv1T00cs-PBC8bvxdo-#;@@j@Ja?IUK2U;=#o$duX!x zm65j0^Pm1<`~2QZ9R9#b3i48fRhC4HjlG*h^EAO3uQP}B5wCIMJZps~%4eD10;Lne zwe#QpDJVBh8LYQB$cEW^O<*kHaz&yn8|OboVWDdj?=i)E40`;621q@Imq&*lG)KQv znpmQO^!@ROVaXH&R$Ia{ZcZL$xNLweBGp5&KnAq-9LodH$r(B$fq%RQRv-MXEI>Xe zc5O;_Vt`5OGH$6GX$t5&hYLKbGB|qH5_tRV_E4JFGD~RE;yhKL6i|}a8tz}jw49@1 z_^mGkXFd1AOF)#3H??5xO`B<)f3&^o_*+a&Gi{tPD>O0rq3HHsLF>EL8|V=5Aq`@} z%9N}bbbU#dxhWfcar`%X*Z(G<{nj&6Z@^$ZgEU>lLAT{SGLS=9ugc5SjXrH4O~ z$W~aJmMsz?(}^UVjf`24V}*SRo4JlD1kT?sXE&RUqVzaiLo)zl|ce}F0?b^5d z4trCAfkRr9Uk!oVEm$$5OhF4W1}^COChY16{hVZ}g+UQN5i!xpa6YpR@D5Qrx*=jV zfhw>LkQ^wWoVppin7x5!G1oj4i%H3dP6KjRkw^+EkxZ$J2uoGnF2Bpn)&_6B+lg4L zmnQMuP9S-uZ1F_=FK6Opf5!?BLJ>-H;?;z!HHU9>Fj0^y1lXam3jNUd%KGBsvxS_vNyXF3Hi4`}_WXq* zlu3d_ZbJ@Q;jZLNR)kGd8z1%5D*RUi7Ln=L=prVEU{>)K9p(igCOtg+HD}tICeowe zO5WHDNe1wTkBDRxiLp%J;_ebB>;VYw&IU)Ki9P{@Y;~90y-_-^rj}4r;10Es4#sYz zCt)SIjeKMsDvZXwllqW}XcIu>yoHxCOYL}@NnZ+K`O1oFCYWGnSDKI7G0JIU{0kNL zns=zYJl7oC8{SP(m=Nhu+R~DSE?HqM(Yi`L=w0DCM?u)hGX_LtrnD)+C zB)YQD?UtI`InxFrgS+8kCVK8x|8|Xuy6&qZG6=}R?D^+#U z;-|*tf(q^YY%>Kfd1EG2_MK}!VqKMI(=x-{Y;M%$Z-T1x&yxY?qtM?lStOMr5vLJb zcr#}~`#Jx6CEM%4`}wd+d^+rmIJ-zCD{ySw*J&Hb;3XeS%&}H2U8*oe8=&tREuH4! zhEZveAZ|si2x`jiO07zq_Y0BA>t&f0PGDBaU!6icaxZw*0%|OY->K}=w!lPcbc?#w z3$W7Lj43LC^JDpvVg|`F4IJr`8@~=+CBZ62m0^@hCY;xihp^AyYO}~7JFHdVr#aV` zH)DQr*um}ny!a}VSvzWwW4IZPs0Js43x=?Bm>!@lG_D6uD70-Fp;ZXP6G8HUG!0_g z7nnC%5?U=37_)+!^*$Cv^3E*P9T3RjEuM=b?J4QZ%fO6A(B5h&IOfLLz@!dk(%b%YM=oQKFHV=R$6c90e8IxzIsolJs|RTa|CxcrWz7dvP1Oi zaDyC7;t8HKt@7z}7PQC>FAu`=04m@fFX-62hS*7<^Po&Fdfn1WWMXBcKh#HjkepBQ zuMkpYc;=W8Ct%_6g}lHR2^SK`>$zLqc|>Zm0j&35os+cFSnD9_k-wIqlH-6Hjo1&G9s*}x7fsjsDm$rzgFZH6x1vp< zKbiMtp)2Kox8~$l?8gtk;dC1{+eB zjDIk|N)gKLUn)|jgT9%Q6y_ANmSrouBt<*Ko}zZ&ZOI3%c7Fm4KdPNy2q-4Wggwu$ zO{L;NnF@{xh`>^Ytt&wt?TQsf0`dw`Cuy~T0sIVdR?I!Qw5Ho@msZvm=N6Z*j4yKl zCz3vsye3tGC@Hes$Z`20k~J>@q|iYy^@u(FveZFQHnOuR1htXPoBe#7$GrYVSjY72 zJOB#mmMAZapv2&L9H%cd=?HL_gS$%$O>FN(R#`oWQ@869dSzBBjpIf=I z@f>H4j~`i~LVH0cWgZxxxPECE&FU&;5uC6YPu`Nb&Tz%|usKv@oQa$jH!cygAg>hR zNWsIv{NQ@BmgNQjucgIcWfdh%fF>WlqD~oFl57_CzM$p0t=R%pw&}hneLK< zT+ATlnc6mr&dG=V3)tZo*Ecp3r@x_T@Lw&jYd)8(E_6uUn;17;tLRllrZOv+6sYIw zVUuVdr*p|4K6~Pc<7d0CbspBQKXUr)WAm*2!nc!XoNDbH2<@u$w03x`TtTmd znffkk@9>AbKPH^gT@`DKbWno($6w`86EFHU-hwJ3JT%;kRpzhz!XN&@DY|@1QodGr zQ;FZo&Fm~!oUyhK?U)ghA!b3Vf0k?4}+5iw;B zZraYwsn^|_k}4KT=t30su0zpCWh@SnrGoGSgvpl`X}OC!+CPhyfJhKg~qR}j+Ao|))15&aKbT{fG)z^VDhgy=k;Wcq28`1fPF*ag^cvRg0 zJ4FG%#CO`>V}n{2vtkIz_=Tid#VYP1Fja}dL21_7`;sZhZ3@=s{vC;@-~%&jL#ZPmv7FzJhxEspH2GY~rPGU+Su%tnLwJzZF@qWQvVT z)q)1$D;Pe}DuWFKbl+kY&8LnJ^@c+xA&fk#40BuFetl)7ECgXjP`mt3fn7O&^b>7>=G7gKKIY z07Xadv!&v|nBs6K7IOKNdhRQ1h-PBQ1`Q*7taV77FY}46GILp^6fGnU4B!wbjV13o zm$E(IHjhk@chrHMJWmE$c~G}xM)E35fR=p9i^{5K5_N%6I~IL#&*XojZhZ4Z-KsvT z%A@FXpYbkz6*iiU*=lipy@auoH&}cM{up-Y54d}}(<)YUbda*HJL-)sS^e(JQWa4` za2jzpPX-D?iUr!hxG+aFwqzJ%*4o)APqLs40@si= zEL~NN@Cd?;T_(0qwZT27dN5QN=9db(me*ehJo~Z;QxPq@ei?&sP?@`em3Ro4P}KCD zQGHRyp~`?ar<0#5Hovr+6qMwk!;st9`T%IXV7YdJsGq{$C3+?4gJ|#)INncylSYy> z&`9LO{Y|KeUfaf=hLG)Jh017`b;ifU|7AlBBBJpylACbL+2?Nnt zK_BlLd=wK73^YLfH)e5nY%{%az~qHZ-eh)Z3%))-@z_!Qs(w!PzA0SfR?_f6lao(I zx}asZ9W@=y0{m*R*c4jAOb=7Eu7NEyFGt=gNOV+3jL`EE6UsQZWZo;XCtsC_4E{oC z+TIg27Snj)H$X(T zy2hzPy2(%;-!r%O64%r_1lIROUEL%Zq!scs9LW1TZk_CDDGPLBjT+&)>l60ex?Q~6 zbL(WFW-BerwfxoOBc1K}B!)638$t)OX8(clQ9g&6#=l#?;+v=VCX7yNatRMwfJdG^ z=C?I7*Ff;iIb3!b6q0M?`gMxV3BF2!0UDg-l~4&Pgor4!j1VA(Mt+$_kJ9K}2t`$a zcldmh&*G@Y>5@q(;HML~P)>i+*hNP&W2GV_Q5E&!SF>%JkH4S1wST;#vC_lL^e?@y zZrjeZSEp9-ZBnRQ1QbCF(98$)$?p>}C7TD?%&-*$ArOQ%rg_#lclBo@2vi>kF%G%h zYpV+zKRh(Puy_6GDGfHSZ`WjfMccbF5aL3j3A!Jy9@u)BD2`T=_>|CYjRJd9u7j#! zikR^*wJ+j~cu#}^LVT4H2}!ElmFtMC5kW?$P+=esC&ab~P~wh1i+(>p?39ex#UCMF zA)|(D6Iq4L%DQU8jJsM_ZYTXJz5hiGzKf&r41dU8!?O?BWO}ii-prT@%#+fE` zzbCvb^qLc;F3fJtRVRw8zQJ%BrXV;Wt`4RkM<9ZYLcqc6LOXjZW%lWOAt1;PWLy98 zvPfm543G(2k*pwYZgle*S^o@UzHTLm$lE_Ub$_gS4+eV;#i?)&G?pMCt8aNWn%#=`ou z9wXuQb0saPm-fN7LrrEIS{mb9ZGInquJ~v z^d(u=9ORT9=q?Su|5vbPG_wZ;^P0E_iDw>rp1$~+-kxGm8 zNhJ7WL}Mw!-&N^f$IY|M;RJ!zzaPnaVXQFC(0i%up`?DcI7&NAI@z$ds#zA-R010j zjB=Abj*;MS8n!(LV(R7IaJ$+75iHQQ9;71`w%}Mx&k-TjQC(65MHGgYrwD8#z7csE zh_;5cnnH%o`N=j$tmWlWCCxK98nk`2%t_IcvLQ$>bkWN&k(5b!$ks^irgVvhZ0G(9 z%-(A&LsB#)QxTN3W^N=XkldsmIQm4x{Dic4h;Uny1XN_~bxe0Acx~Y-r{$r8a^6%Z zF{6Vin|qEl3D+nQi5q{L%Gc|-QSmjjkg`2xs$?8Xc?@R~1~+EMT`+jN0~8z!FTUUFU3;G`t>o7Hc|4a64%3VwCQ*S%vTNy7 zZz6Ys=on6`!X-QVD;!e8=K{ca~CVyz=pGKI|GOxQC$E#Xm1exO7P@1Hwes$f`9O;mP2*Z6k zEw<{eU5)nX7HK!w&8(>ai8T){5!zM$0~fQJ_eGl6dolv~Ot8fu32hW%`=tD2-jvaW=s z)6aeR;^cox!ZH$TNfM@B(=-d0`XEpusy4XWhKFQTS<;w|Vk!~Bt2J=CSluhkMI>Hj z`h&{1yM$0Y_4^W*3HGhh2L!_OJc1BdD@_C^Y@*j%ZzDYl;S|Etu~Q+as(xr$DIv)y zS#Te0C(L>w9spCHKAEkK2i~%BK6_kous5XAL_cC<7N>;P$_zk$9UQUj=-60@u1vLA zvg|rAG6+{Z8{ClLcFkZ(P1!bC|2ftMnTNo^p3?h8NW%pY6ls?>FxXZ%DvOjUt6-}% zzQQMI&xgdWBtm4|6%Df%x-H(baImm-Ax6^-(g}LZA;ysDW(o`2&-FUU2@lCqMB)2} z{M!6%Rhn~RQkrk_yi_z@-ihhUgk90Di@vB2d1QCoKzqurFsq{u;f#Zn0{zvIx%PW|LhB zK?!!H85%Tiy{KVUc*pMG3pfjz9i`s55&aTH;4oi^l zI-2T2iVz|Sl!Os2!P4Jv#d(I+3^QwEuDP;WmbbQMPpY*x4upN%A7J2Rt^GC)Xo1p0 zU}d|Ky~8k%q>?6RldL4`pkKO`%i8cx!q#$A9Y^=_)_kwbRjiEQjFBtzS?w!}iOt{S_pkrJ+iy z!Ef3~kViQ|N~a!Qpco6edrlWL19ILJj%=}MB% z3+vzD{a>QhqSW!fYon?cAlCrvxVRM1Yi&Gn_)Tcg460iyMGd)HpljU^0)ki&HLRI( zYX(-2Ag0xF?{-jsB(+%=B(SpmZrq=bR>~HbsRDe*=~Ahxl(2v~$JM3Na3PYDsg>+6 zTtW?e$P0q9M1SIG$+oQfR0X@UQHMlqYgmJ-Q({dlvbAUfNEiYqf@DSP61xt4U=>&r zdW|e~+G{>#3ZS8iwY2NNGiUUdtMeA9s@%rf%-k^uv)Z%}k4%HI2hE;}^4FLW1B>F7 zOVlb+@j;0?1{FX~ygH1H{<|P2l9O6e>gkZXd?iv;!QYO$7x%zJe?6M3LQ1pv+kyJQ zF`K~?hon$Y#I>g3NtEh%u!S*fWeW+iWTPGeig>=c3%9#ysT>X$uPgW4*pJ07O)NSU zz!bL0>b-tl<0)}?jj6SWJRB~>PfJ=eqEx*I`qcdKr;eQr^bHx=^bujg5YSl%-B?&# zSi73ZZRkZ4zN~W?7EBf}U^Ay>UK`(dU<{b$rS%Plc&nuXgiVdn28E;bpU8lyVic4K zl`sQrlU0VIL>eqAO(HgAyr!!d(b4m?#J7tH&upraZ8zRQ+w(^s9c-FJhJ>%uAU~%< zp_D^4ox7D)azA6l(K-8|-Fv^Sd;@%$gsyC}An#blgzcwvFG4}Zl(s?%_VsWEMq_~o zB33L9GiYZDsPwg?7vU*Xa3LHc9n2&`nF7T;*NQ?8(+f^rUgRN)YiP`blt~qGo3ZCk zqOMs9rLwImSuHK7%1d7jp}^Q9s4lo7C1NOtGp4p)dyo&cw%B@YJ{w$<4<4KjM#vc- zuH_pmP+nyhM}{)bJj$VA+rev%D?`{vvDmgFso$(_W7fOdbb3J+BUqACP2r&MrF5Nk zxRQF6PrG&d>G6fRr+<9;+Uk#}p1Aqb3kw%7aeectl{4$-Hg7z^Q`06&WpZa8L6=gq z`aaf3=FmsDZplTMQ-|gFv;6JBgR-xuESvFtp_!#%%Miz^kVpOWuHMW&3Ol=dvqJ6o z0{aX~!uILi!2vJ7Xx`n`;Pt9Sr6ouqIS`Vk)grlFjjJ`R-Hd8FUUmbeA&XgWWly-p z#kj@=pHqll?qnT|e5UcoFdmAW=r+q(6$SRmv)elEr$D6j>zO4SlWGhPBX)}5YfINg zR=<5o#`fLKHd8f2^*S^bq*6mi?SnaYF`g_`nLrdbknkx*BZPqJE7}+foYK8LJT41#@43h?CVqYq0qy+O-t-Vv0@ic*m+!yXKScDEF!y>O_Hy_XLt z-ZurR=uQ7k@AptuI4Lwq{+46UQ9A7nUNbtH{1KG-aG6S1MLe4&h{#VOissyg^4)U|s zf`1Z7Zj&pw>Mh1qjTfKaSmYMO*g^-TLYK~sK>DXj0kSWuS(f?F?)f&#W~VRb5E zDnsfO+J@!RLZuJVH~m&7?Ube>*#r1N^dd@@jV#$X^6R0;yheOBK?KGzf$^bEee0Xi zP6VhdqKXd6aX#&J*UPj*U@~Bec*eY-66g5NiCNu{Km%zP9RTDJOo80?cMV%PkrXUL z#EE(Pqeu5PJ{ZKHuB3(gtr6wEh=Ad#mM?P@%0OO|Ez?{X*nhc$sB25>m!{7~*d|NZ zs-1;JY&_Gi_CFgNlErnFWDq^zvm7Z?23?{4C4gu~v6#MxW^;ZiTv2%+Z060M0Sg|H1= z|A}}*hzRk50MJZ=ZIoT9^?U7A+>#7-^40@Zp}?kW5uo*@U9J%H0eg zxv_-W3EeOWn(EPakf~TcCI9u+p>Z4at(|DeQS)Gnu4owt#gn0nWTwWU^SFjUg(otrMZr*JN2>%+fj#?pw};BahdKaJ zVp+KW61OpTkJlO=j?CtXkUpka5dXAQ@6(HTr#p9eL(44rKtiOTS=6FLX{%hejxu;} zU6F*2*Atl=T1`3?aZB!KHNy%YZrWLRnV8dN*CQ*wsQmawN@o4mW~T1z>ZWuxARiL( zrxnVplcgoolE9Q&lzxSSyomCDq%cC`%NFZp_|%&B%)_*njh4i&zY3huE1IV|Z7pQE zZ97qcydJYR`rVh0bmV0BS% z8t7M;xX)0kGHAh0?_w~;=ou(z)mbniyMIxNN`tLlOe?@3`;=>nZRw&RDUgFQh5z3d zxv>Cps&Y_*PDwlRmCOmRR*XbwzHLQ0%+;(^_9AMb)+Qo2MRHGO-wQ;X72qBcCiGsb zhGyJZJBcoGZz=HJ?Fc3tlwJ+0T7I+yNUwx<)by-6?H6DOv3a5?4IM_7nIM@5y<=|` z4G-3uS17!yWx)8-=K99UwGs5DsBc>2>gC*8z@eB1C^#F%RtkI*H0ry74$rrDr!BsG4k0wLq(2Zs^anWlYRG?WaZs}*L#MrOe=W7{fOdZl~ z`yRuulekkIi@2{C&c-L77220fs?f6aS^{%r2_$L>Sd-^hw_O8P+&)hhg5n4zxsZwW zcyA}L@>2-hE+?Su2$y36UAg58U?#b0RU#@$(_DrK)Pcgj>=f=v9bH>^c5$9FCKs7V zdkz{_ug;IPNc%ZHO8_+Y9ZfxRR9Wz~MNR^}JU_gKvFe~*lO6|!tb-KtD8A4$^`2lX zFI-$)4k8HEF+?!AEfbwVFDC1Hnc6+Ak`cbPxUsl41H?3vO9LROytHs}dD}ts5XQ#T zwT+rN80HjS&qQ319q;ajzv7McmCd!TXxZV~Y%E;OgrPT*d?`BLQG~`X(~7B?$%~jo zLVE=y^u?43_mK76+R{cLOaS+T3-kz2)zKdb^T}r;#7*Bgfg6$$%|LNyEtx}EZ{OH% zJ3xKL(+;2~m64PHrduf*V!<)bUb1lh=kViYNv5H(+?G;JX{q-McUtrZaCvEAdFATj z&C#&X@X}Sij!Sz`Rk;_^={b7T)^PA}yQxOnt?TgOR|fN_Wvbdj957YWo&iSwP7fsO zgN90b>NL7+=7q~8V}s0yv^W~v%3S2YSVb_3`4NvD6~E6f8AznYr@dfh8aHIB^0+Zm zn9neLse#ywfLM2=haoVdWD7BzFw$Ic+II3n4@+uUODj^`RrlfeX!KvSmlS>y8mIRH zGG!H{BUCDiNTz?|$l(z9u;h_Bzi;kWgt}lzV&;R4s%pP!W^hu(UhZA>9#0;d6mZuCsk zxl5;~yTBUT&2C=5ae8vucLmVABf)JK@1Ar7`s~M&Lt%gG?%L--L_AGi2Vpz@_ZLu` zoW`MVYTu3goSdE_D5Q@hx{F&-4?bwdkiWv{6;OWIIMm0aRYd_d|M9P0Un0ERHnw<2 z-fmsFdmYx=B^M|KOg-Ma0O2P}0cI#vzK1fHujq$jvG?|5&*~hKKB%6CJa8L3ZOaeA zUAvBSxdlr;kYZ15=klK8YYZ_TkF08VH5=*Sdr_!)SAI`;f9-NvTcu6R2VD}D92gKj z%r5H67v!YTD!tb=;AxwwWB!~$i=-Y?%gpZ=bS3mHa^9FNsI?f0f0x=T5*ThIpF90( zu%H0MG|hEYFAM8I-Uq{*N22$hXpTcte?bKQMw)f`_RH#ddUCGA;pn?cQBd< z7*WS@c(OIv#4y>*1QuF{_lf{eB`9K4dcwg1Pjv(3gHG|my2L_>t05l~gw9uaQxm+mQjO65-5~0>V&^j0Z@KdxccKOdho3)T{45Gb z9g-5P*W@-3MDXKRIkh0^`klFec0mDkbtHn0BXmb%uf#<~(bB9Sj5r}pitzL#%S}p3_-~qzSh|`KHxFZ7 z@ezeW{GX>3qi`$Pg_R;9RTRTSzIpYVoaZT;L<)0XY&aXwqkAE#2m@w?>_-YA^xLFz zra1V8p+csIK_*59o{IQ-?YzHmi*_9ap$JcCbME=G;*^r;DmK^**Vs%p(gPqelNgaD zjJl$+AL<(=D?YX=!=z7Wo-YocR8AU%p4C?xb`@K%Ks7#MGDU{#PZiWQ)#+ak%~ z1}(PHAdLIhR7BQ4SYhnpXY@RFfkhp-c6z=9hgi*`WV3FT)Tn1qqp@RN^nrn(;Uf++ zps@D?x9;D+alGE5(2ChdjOTpY(Ryp-Z%dPPwC&OEDhr_u8ro0K_`sZ_v-JXc;K4Xq zp@y-LeJj!iSK6S@`$|VPsd^n^0k2858`4=HnGNc!kA*oX$MERY;KSP1X{@`R5?BB8 z!m=y%vzXJgSyq~?+;_2H6l-*`Y+6#b3(L45K!v#2+oGY;d-ZmuBu;ZCs#Y=+!fU)3 z3pjk)?EZ!Sfg8JBI@^`LV8C;{B=b z)r}y#od?)q%{!TM0pjFX=6*SBjb0Sr;hyzYnq4aCE(wTZ2ucs1HVCd>k5niLF_R8+ zYp5KlU;Ix*#po{fS>D7PeY>9F36O~Ls#RIaDW5%mWD&Pc6q&RV z1@LUi73gA30OMpWn?gkdS#^(nx*tbGiYij$K5TOb(=~ZDeB&%Y6(9y1i3DsMQ^wTH z0}ZfXa6T+$*%1Lmoc847UH{G$48E#4W)|Qa(ePAv->M9-iog`<3wtD@*lSjOirtIg z69UzblZePJEMqPE?IC6)|cW-NIXAQ36bRt{Jc7H1Nqw|MbhARyFqo{Vpi24&og zktsFw2$YP7Bk&UyE0wlq=UdzRaK;yudCA0s&xh>)Kj7HXdlKW)b!4-o9v_{&dE@x< zRmuaLsF*&ZBV|xS7ErVnY;apDuK_-%<<2pSd|48T&QuFgq!NX192-E7MYxP9a`Fz+ zOhb!_pJXH+R38JVB6e2hiUOHtD8fhxYih0{Z^@GB*=Zg5-L8$C6KUIPC1P(u^?2O{ z>@SyUwdY&Rj|bZ+ILsK&^iz|%38@I+Vo0vt#l4z{nT*1ldKhPhdIa_PFssWS?zxXH zHic!bqSuY+7LTCu_2%f75STYaQ?Sy^EBG`A!I*ImV&lmkZ#`baYahcNZ~`R4o29%R1&qYVMRv$RvP!ocH&26E5tdQS*P`Q0EsBj&X|SY`VAHL7;@o=jh$~jP|q4 zRB|(iIF3p+$4AJ?(u2)zZtm26pdnf9W9E$S8Cg zIg(fgE;imI?!>hrPKnr$i~% z)5*jDrvdcSdB%PROw>PbhSoRl`s>^Nd?o~c^aUs#2zOww!*A;}Ck2?P`dLS_%|nw) z#$hTTJ*J?Bk4h%3Gn?qCsx%~wUV3T%C~6W;q-iuCX!G(E++?pCHNMv(i`FJ2vd~V! zBAi6{XhOj{UP2mUtVl9jv#d99Q!;sxW9>Ay) z+AQ@03R?O&eRY_G&z8Pl@P5g)a$=~lIg#MNx4c}we$2k+60;pj?j#NCh8BRTXGi1h zYbUI^BApr$)Vcq7|MmAT1%qYe!r8E^Wu}gfsCK?~e6uQElm1G3bRo+Qj$TP_Wp>S!OY_6++vUBfa1oyO;I7^ z>f)$=p)E)jJ_sU@zV8*#IQ4}V!sf6&H3h{773XPx>aGxgiclo?kitrYnnpQe`fa81 z2x1kE8%wa9OHADiiIM?&omSq^1vnVj|W^a3HNu%O))9kJ^w-it}K42G+Shk?zC& zPksl+V1~bDMp)Fg!Gh1lTSVH5@&t#QdvNeCRg%A=%1Nwwh->e!v>YOk9rhDV(2#b( zbQdz$6g>UYJtwGZPnlJy537I!(HWBKzGF(1Y*X&Yc!io19}W-@P8BfLzw8`?qYjpj=-^;k=N3oHcRseL6@D^AM9WL z=_@b)jQv99C6aT(5dLl#Gbn>Gie^iHmD(%6e(l0DBlhaWpYt}>H;Qh}7Tf17DfGke zU-BOi%-aV)+JnN6ezC!*H`6(^mf~TMgMH}a{MQXSyz=aq&u+wJ6}haZ@i9DxWU8qi z;|ho{KOWrjM?9S=+W@SHtuJSZ!+*~&pQ>A*R{6qi4q2mwPkGm4xnbt-0uaSd+pq_d zCD80n`-!P;s5>Nu^d$8?acgdARkiS(eQ{V1fFm(8K;qQelJyD&(&i+_*T`)2(=S>$ z(m2OWe`bSVw}sG@ScFZYE7xlN8j5gYH%Vw^g@(?%C*{t5$SCGoE2&S9G->9H5KCYM z`Vk9hXWVU${eP!pwk$QR9oiy?RR=V_s*L=wm3b&bYog+rx`tXLvi@1wH_$!#Cjs*uOFm z7!Fs#Ja`JshZ~^6^*P)Y{seo#PGOs#yTZPxhdVBY{ZY3-rRRlE>Gvd*yEmZH>q|HY zcB={mc7o%f;!^^ZzH8wKcqSYMpMVP2&rtRTR$KY|!2YP$L789b^q+xBzh9uzqicA3cI3Cz^U+1I0Zfoi(tnCY`)Ega(@h52LA>nf57TM zU>q!iCGa$8@&_ut`$et2m2f`lQ=#m?1Lf~7wSmBLI0%xZfy1HF<$X99=EMSltzaHh zIUNZL;2bFbk8!*k%D*q+P&gzW2o%FIsPw%Ej)Kp_JlL_$sz*b~I{=P`SHiLI4X57z zKjg z8=%yGfn(rTQ0X$T*~$+?h4XwU{g)hjwgdvRP%nh@;W<$C{3EDv4>-t{|2ioBbD+xA zD^ULJe6X!A%N?U|Ec)x=NO(Kk0e%A2KIE$Jv_(pM%WYeBXDQ8e9;3=>hyd0{XycPC_FTyS1XO7=M<=c-?`MK*MHh+qt z^8XNcGyF3gloJT-zn=K)M7jL~Z54tpJexK%;XOCndeL-~Z67XyozZ_1Dn2j4-Qd@7FWCJrwmyu715sB)**^)YJv$fTU0?%L zJRXHZ;m1(+cP8+XI~DeaE1~k^NVp9=4@%xuP;zdDL3kG=nt_jCPuSrW>#jGHKlxDU zvkz1_)0;BN_aV(0=K-)miL)(57dXlt}=&% z;LT8S-*DXOc3WPD!hO(hhKk1%Q2zY@75`oCu>Kao9Z{D^zX^y_(#E$@X;=3zJ( z9t-9FEsk$N#iz@?R$d-d`C9DMM?%TH9*%`C!hG0u18!geoC;?_<;(GKIs7M7`i#HN z=2I&+rxQK^`QcegH2H3z7ckVFTri$`%wOV z2UV|nJxtpLcZJITy`a)-Zz#D5sQf(E>2H9OP;Z1vkFk$fdzDcA%Rx~2bPZHGz6=ZC zHji5SGvVH-8=>NR6I4BaA1eR8g4@A89<%8-63YK0p~}HsQ1;%3-Qf<8)Aqpua4UEe zRQQjFQ{cmJ4(#}ZZ9hw)^iP1N;^0|08Flzsn{QV@rQV?UxyVjTIz)~g*q zwe@op9Dx2DxEoBsZQ#jJ`EWi|{@m>JA9Ly#pvuQburuuanYFhk?2CG=QZJG>q$zJG&?-}i7J?DB;zH>08QF#@~7i=o1E15~~|0VU@RsPg=8*cDq%pyU)m zxnBX5j)y_T^UrWw_yAPCJqwj?AHzX#%kQkbp|A_;xlX+tD*x9w9uF%}Uk3AF$M0== zkA^EzFNQ$^x1r?8DpvuLCQ1$#KI0)Vgd%+K(?EM=)2YYRqWAf<(sQS6>R#xr^DD_gP{5Ti} z;T?|eLxrc;);T8sCqtFvqafXD;B+_%o(DU?e?a;B7F4<02$iorI_8*i(;q6H!=dt} z2zsy#svNC_itnXP{TQ5&`U|LhnAj=DMr|NnwR;a1(O zdJL4i{tO6zr&!))tONB@P4=oz6lq?N!!_a zb`tD_`eLYjy#}iOJ`9z0)jz!&fXY0NUs=r?kRX&b`3g?AT>Gdd7Kl2h)cz%JZZ`)g zwfpZtxzF9hmh&M{>A48X{1_uv4!(lQkB)t9|F)ascqo4tJ2paj+L+l z9tEpmpuaV*aXc0(J^l`1X2SK$T zS3{MX2vMvK>2e9RK8vZCGQ2O z_U;>J-Zg0Rp&yj}xlr~hp!_=ws$5+TRgUh2^7l2U^3x&TruRUoay}o*{t-~+;B2S9 z2g={)pwi=0I12`b=9qEhY^Zu(0zG&%R5-4JDu0hcrOQW9&?8-w2gI z@58O&*HG>Dk5K76V7SevF|aG@BB=Ve07~w9DF1GPDxc3g{tRWW?+EK(2~_zy3MyRp zLJxinC1;zFHvWZB=@^2tcLY>^+~~|-hN|a3!+h9(lyz4MmEO%z0#&|iU^jTa)4$HCAAm~t=b-B8S5V>Gc8tyU zaZvdhf~t2%I&OgS??=a;V{LmCgetEyq2f~s75^g~uYt<<=b-A-R^x2E`aqTA;n0Iq zq4K5DnI8p}9%sX?;Z;!SawC+xhn)FKunX$nN8*4}nd=6#{UKg_9TL&bY3 zRC*i=m3|jNrTeW=>HZj0efTF-dFeR8rtdJQc!#0N-=R?QZ-5?r94dW3hO)Qy-d4Xa zRJ@9z{3(HI@2jB7$6BcPUIP`Lo1x{9 zuS1pFoQc+6H^%``{!fC6&l0HkR6zL?hg-mNp~i6+!7bsNP~m(Rs+@P2Wb4B?sC1hJ z)h_P?l`nCq@_as2yzYlemzSa9@c~pmb(w72lR;477zP#Y0;u@UhH}5cnJ3_M)a&77 z_y|<_-MYwzcMvQ_T@BS=TniP?d!YP(!l_?_O8*a_##7%z`O|HRWq+uA-`lAdLzRcs zP;%Ef^$AdNE`n;eZh#8k2XJqgKh@^X0Z{gigbK%LQ0a3SR60Bc6_59v{?^4d+(V$! zbsSWBEP)DF#HkO5%9k@7Z-uI_FF5lLq4MWvsC4Ks&Ca8`Lxpn@RKI^VRCr&2Do@>~ z+j=?#Y8<&3D&J0UycsH7uRzt)@11)088#k;Q00B4V*^yUkA+I_OQFJjH&p$89jaaE zFw^!2L8$g@1yuWX1eAZ5LFK~(Q04dqr~e65d){f5l{X5?zy08FxCYAnDmWBA4;9Z2 zvu!@~fl8+-Q29F>Dxb=r!n+#EzayObTxWg@R6HMo3g4^Fd?Qr8cAsP85rit=rBL=( zLCHS^D*h)xh3__~c)tx5j*fF}{C9%#e>{}?g^n>OfBpnj@2__1zeAgp%RHOj z`B3F!9+bZ!sPsJ6@m#2O^E#;fe%z@)hm%ovo^R{N9H{t&pvqM(R5~5x)TcW0i=g6p zEmV5n4b^_U4CSuN0-Jt2Ip#Y~bzBA&-dd>iIMk_6fogBBfQrWrQ0ewE%!9u|4-Q#q z&F8{ds2kvTc(3CRP~jP|j~#zh!$Q>OK!xuWcwG+l5~`e^T4LMNyP?wQ1vnah2_<*0 zQkzbzpwj(fsCYjJRsY|FW8h~{<-gxzoBmUw%Ku`hc40kKeqRbD=T0a&|A2D85i0)q zOKd)kh4WGG2bC|^K$Yj)q56ppP~m?WD!zfGw!I$>)oz8L?41qOkK6={;FinmynhB% zxjP>!KktGg;FGW%{t6et&~oeU7B~g<_i!2#hV!?lDmQUkcSPd;}-K{1tZHBL;_}z6Q$w z*Woa@<^Hza7y}jG8aNd;L&>=tDt&TR+H{)=XQD2HN{7p!2RA~Mqa9b}1ZKega5Aig zbK&(+>GU&{yNMw?A3PcEgL<3t9J8OW0G=y( zcnfN*{S%HYK-J?P zpvudP1{=;3VL9r5z~yjKqg9^`)xZ4$Ibf6!+DktzB>cg)^PAA4sx8?*6z};o{(%#~(+lHLLhp0#1XXWpDza7W!2UU-b zgKBTig6d~CK$Wlepu)4$1GfEG4rTvvsB(NV#M{6FQ2o@CQ1#~?2@rPD7^^|Z@FHe5ZS+T$X)JzNQuj*U>^IvpzA9*29tU!dB@J`dY`DufD8 z6;ymqfb#DasBk?D$HMQNI`~Kqdp(TDpvvdxa3(B#)W-WLsCeH9)j!<}6`$|mK)B~) zwj9raD)(nWwYT3wnfH0z+MfXxo(8D&J_nk13ab785-NUMKVkdHz2O$9S3=3Dgz7hr zhjs7)sQNzgNt-?qI0W^vQ1$CpsPg!4sB*piQM z3d;YBpyK}wRC~AWi*6qVDt)eiipTd*;T-mowI70&s4s-d-z{FY`9Byce@da^c^p*u z?seP<6`x_RSbN7p<=+O_1AYQkFMfr}$1PvA+zqPV84Xn~T3}Cj36#6rAk9SJao8Dt z3Y8ukq3YEZui5@@PbhU1Dt^a7wHvR&xp3O+HvLY4LFvP#u;V|h`6{UJU+2_YyP=hEOQ71_3aEDZDyaJM5S$3Tf7*0i3DrNH1ZD37cp~iZmW{`$umJT% za3*{Ms^8k{ZR`J9D1YyPYdSKnf5(m!4*l5Hw|Ai0S=Bek$fx9dZLS6@kaL&Nc1ciJfu-*C6M0 z_z3on?viWTrTJZRP5V^~RSu4aO3(Wt&2``lsQ%+e$6nj!nto*{?2CReR5_}F%Fhd& z`PES6oz%o3<_dkmC+*F&{W&q1|g zKf>){-|kl4csLmKM5y*F0#$#`g4@8ypvvV7Q1br`6~Cd|<(mAO4V6Eq!a49QsB)Xv zBiFP?lc4(5RZ#6uBUE}_3l+ZCpa*}2d2sihHoSA8>SqG(1FwS$$A6&ugMl2@QoUaY z6~8l~sgF?UyAiH{!R>AQ{s?7$8&rAw0?J^<)xHLHvFS7!R-&wdYUiJZ3QxyfZ9a{IGM@w0 zAKVC4E^~IX_Paopn;EblJP<1X&VU`^Ls04YG?cy0eQbC~LFMmCsC+ye?ga0FO0Sop z!m;h{xu(CI=(re~b_}W<9S66A=R>uNH^5c!L8$WD&$BFn%D2Oy>d%>QM|eAwzt2FW zH$#U9S5huIZ);8 zWXC7q4yZfyweEI?s_%JF{w;%r@DQl>^KRG`{tT5Ko%-bls^9>qbUpzpUGIRC;nz^* zb7X&8E+SC%=@h7Z*Z?KxUvPVvvsZ4Q7WRgU_mNQfc`{UZ&VlL|?}N&(ub|>HaDYv} z5LCLH1ZD3=xG#JgPJsmjtv~Cb+UL`u+W)^e_1~bv^9fY>>omxgqZpit`WiSJehZ7> zq`|hF9|{$|OQ7oCV^HZl)n-7&Rf%+ua z1h)w0n*MDqRC&1{s@{I-)cx{p`j$YM{{gC1}u7oNd=R=jl8==ze zb*S)n8D`B#L*@HSsPtX}RSr*d{0pqeVSf~=y&6Bl#w!Xv)Mr4&>vp(5d=<){aU*T` zBT)7Ce7G1s301E57?o?rCnMox)DvI_cra8tuZL=PE`VzPABNrFTTt%5gv#IC(Kft& zpvplJ+#4R@)c3(fs5^|Y=1ZX3&9kA>=UKP}z6({p_a1A*(+Cyr+u$0RL#12UI9m>n zfND=JgKDo|aOzIua|1u29uHOCMoqBo+#=W;^`%ht|1PNV@*-RYKZmM^Gxp96tb<2E zmG>M{G!*}5- z_ytsbTv%-D;rUSI=y9la<2`sN%$=5N)+vsFs?YDj6|nPk%Ni&-k3jWPJ!jZ-7zYnT zT@H7IFF>W|XHe-raHcJf2SA1I9;ouS!>n90j;@6a8w2-1mG_6C()&fI{Mc%?&4)p7 zI_jlx9=rf9ho3@~)9G_;`w)k!NB2YJ|A$chK=--UUIA42!%*=&4l18+ges43K!tzT zdA7VSg{q%NLzT}f;4JtEl)v5Q+jJQZ)lVMHKfF6fRwC+us|Y{ND)G{tRD|Yu;0- zg-ZV?pz6t2Q0>MpOKrU8K-H^b9B+e4uXmy9(|~2R{w#q?zcZlXy#Xp;zJY}>f4Oak zqfp^E0WN@#!5X;ZzP4T*3YG46LWSoQsB)28X8Y~IP~~7g+ygei;qVM7dyhed_e-dH z-Df{5Z+|HDS~v#Y4OMQxfeKH*6}f?P;r{Rl_!CsRuHWCJLzRaEq4Mo)sPghQRQc|3fEyn| zwG$DjdU`BWIe8kYoOE4n)2A4!ydDBo|NaIi!w;a^n}Jc=F3o^Sw+7e;ghsPNqk z6^^H19sB?;gv;tIuZC)8e}XD+dmWe?2*IOZ41Nfg!=?3h9C#B{zV%P!22O>`q0;v= zxCn0F;QAe?{^Ai>0(Wb)_3=P>BI*mF;xTlMZHEtXd=x4jdo|hqa-`$_Q044csDAJc zD1Tpo%Ew=z`p>*(+y0G(s<)+3>2xgI0iFfB!5g5`e*;wdf9cq_#j2M$9t)MOcSF^y z|3D8G9%RF@KU8@;2&x=j2vv?AfXdHz9J?KC^R)oVyalShoDI9fo1pUd0jTi&3?(;z zt9 zf1ieGKR$#iPq~NN^yveY4*Af73!&T{2<89LQ0>Tta4h@)s(kH!gbimtRKAqL!{Iup za+`Ccl{XCbMZFIk3>%^3UgUTOR5^VHsyuuERj$3GY&$*#c0_#^R61V_HLiIHD!$&) zww)OXm!h5o)t;RR)t*Jy7*$YtR=W8fA+n#9ad4H(#Tn?2U$3lhoTB!Vd0IK{x4V7-M!3sF& zB-_3o4;B9Vq1^9uvaNpwaDUV>I0ilqRZg}z#n$UWI01D8s$N|Nm9I}h)!!eX>cfyz zt^GMr?RgVaIlTs|oqG)`9dqDq^YUmj@olBwe;Y_Id^gL90?Q*7#&lIS1Iv6V5j)J}5c~JR%6I47Nhm!jd+zxJg zmaW$wR5&L{a``Nai8V*%&Rzmg1mqN7{Z$Z_gpP<^M z@#k3gE1}Z)XvbTi^5Jc$^xgGbo8Akd!nGF4{gqJhc^aypd=DyKc;xQk3um&!H$3jzYpym(XICj6# z*1sTBIbQ%(Pgg^g{}Z9o?>eabdJ)cpZ$agM{zW#un&5cUx4{MQOSlS7zSx%Yi=q0H zAEC@=Ut;G)=Rn!}5-Pv;ximMB0~hAq?%k$AxdcKUhlzTbPTf-ITFXMRwJOd6z z?{D0?6#g4|{s6N(;77>Zz`YQ)u0NpnGk4<_)N|+Gt*EcT>^<(S(XT=OPV^|=fmKkK z_N&)%tK3(i-!rWIq9iVP3{_lzThw*{J6l*PJ2Zxd8kAwGH-9L+=kzm+Jkk zxS?qa9EiTI^%kbCgwT7@*_HMzWSxcmrSMPA{%x>u!0vsvz0<(=)UKrQBj6+W&%I5&E}k>_>Tzn=R!+}wfQP25NGtU5gc{SxleotsgP zi!qyo{%dew>`ryEm-74_x2_xDmhPFVn7n3ScTeOLa93i!A6(?*CM~5sXl}2oGj?~v z?R{_%x9V&@)HMzH$HLpW>#%<*`iDdHn`gpdm~ZLAs5VF!-ELqP^w?HRUWfA31-GkV zoVz3U-I!0|uE*|Am_3a`Tb^ z*q@DBZJ4fic&@_Df!wE|p2NKyH;2p6U2IJUI$^#Cc4Iv2QrmKCn%t|<4;d4_HN^7( z?C;5~z9;P5)S!M6Hz%Vv3aX!JfMswX;nJ1wWPXhL8PsZHhd48tKZE)1$oUW4QFf3$ z)XDFNzAm*}HQWba=XB?mZE|z{6ZMBqZ#8l_Hy=K zL*_Q<{|ZN-{}%e!^87t_F?Sc^3-eLTblrvCB%WKKe+}nhDSBhk+n!tP@;dGa&)52v z9DhXq%jlosDXJ3XD+#Q{|H&mZ9&)Jvx z6z*e@H;VfeXKx>8UX0!n?rWWT1J6UT^Hn1Av!hUVcYau1=F_Nq;^rkZnw{nf)O%yszYcM3u5%iHhSivV2?xM^v3~*24h$DdEQ84{Xr6**&ruINRua~Rb13oNT zkH>Bg?%lcPBZFfb=6h2IVQ&WJ{n6VA?&jQ}9q5jojqoP)_kb^={tM47aDub96>424 zJN0zr{2R50`aXCIcBk>2K;OR_(c1yNXC;sO0q%3T3!R>TkI< zCfmaKxf^E7adQd!eR$r_=|6{^n|Xc}GOaUL5#|%zbKLoJ7AD_vzvcAbMUJki7Uuu2 z{I9_L1Tt*OFYtHCNV7Yd=dS4K3PYxRW~?jq zHn{B#b72hqmC|(A9_aa(z9Tsi^M`y5_$}&s?qbXyKyC?ljdSxeJQ}k@xp(H)#Sk~J z8~484Oox(JPo7S|{!Z{JWDMfD0hzkWc|HfdO4R@2d2jT7f?+rpy)Aie!CYs4j^X+3 zG`Y|5d?ETA5e#gL-Hq@T)Jt(YAO4kF*X!8pidi4j?^`Xi)^|7R*)AMTI|D74orz9e zn(o8y`3GcPWX0(BfV!c+0n!~Xp|cZSbn?`xh}b}&~d=Kj@_=UtroPf+KfuEg*QWL+&w zxLM%Lr96zgpOf=29K*e{47f`0Yl_UUzmKyshv(ajDgGdHBX=jvjzcfV^Ca#sP+ta5 zclLynarXgw`y+ET_ZB>_f+u43oD0t@==oPa^cG*dw^%m+&oyHu@ zb^Tjz-1CtuPeW zLBAu{sK@<2=v8Zu(X3!Xdp!aeE8q zVeU>m|BC(W>l)`i4zJ|C3wy6%=?3l&$a)#|72MC_HV5;c(I1C?51#o8?9B5{nBVVY z2hlqZ^>_^b$vs?_(ysk6yV~hZ!|fj22XO0p9vQpwJQ~i!&iUM@pnoKM+}NPr;{JP{ z??&%Qr*}E_tDXP7aeoW?+c=p|IXlApxcz~9Ezf7+{#<8vJ8lo<{uMJ_@4_hVw{bG9 zE_sWaX7sj%e}wyDu%2iC`jm(5P)FcLnD^#>5?K$W**O5SDabwnv-E2;cHYD8NX+`e zi%>rXUv+K|=2_PZ+zW7f1^OcHsFH_k0x3x^j_qmJ7@E z@No1iot-0{{y^-lLH`)|4);IMpXtltdAfVP82*gC1=#rscE@Zs&j-NUoSj7kx)Aki z+`39pd)U1h^D#U(xkx>Px>T~b=b(2s_J>#}fp5^e5c4^3U-)l_usMiXQ=CM=&ynwqW2GJaGmMQ^n5V-Barn0&;R0n5cLq$^RUxN7P$JO_YHFD z(4UX`0o3)V2g8Breb2M5W8v-G7xR1{W_@5M2HDE>#dc52lJf%4D^Sh9*^Bd?l-va;?`AynSTX&j-mL0`v{(| z!;jbCdhSPjOYl4HvoTxdWYof)xqoo#&X}FTb20XEa61+CIPR^`y9d2q=$*!WKYClE zzL&d!`*6(9m0isCcCucFx#;Oy%X2x;BQd|1=gZOCo;aQZA3@!f=SI0l9p-r!yaDwz z?CW}y=k2lgN2iuv0yTeugD}%I5wnkZUc%i68OLLI63+{HUg_+-gWiYMdf-vmm3u4P zUBdk%_hRe?xi92?8@s1Dcg~5y@%%pp{ZYvEuN_fef})qxdrAT0dYb!1^F)7(-b!b_ zKhGE7Ule!Gau;#;M*RImVD?WGJ+M20=Z(mk$=$?V z?puNnW4;}C9(D@g@zB4X!tV1s){IgnjfkS8=EB!q51|dUX}E& zCLF2^*C!^VBqMMxQS;_E)|Q9sJzO+|Ys0Yy(gdRgbxKS7ToSHmh{R)FL)*`#HpXgcP1q}r)MF`L-{O^q%A+KC!VA~dHMA(ry*4Z)9Zrv6TfuJ6VU~rY!>V{R z8gEjHCYmA*6*Xa-*YP?9H58S-{)wT=VLjM*SIM)gcztcCfh5OZK>x%5uRa`&SABt(2#ms7+!71bMk;)FHmloD zi%O3G*GFt(_-_4>wePI4O=qTl8K0FsDsGe^MJTi;6p5Nbr5IF35_Qo~i^+FeC6zwY zqE$qk%x!3?GlkD2u8NN878YiPn_Fdo(oV6S8A&wQIw=oUW(Q((P}3>h|#Qcb<7@#94~m!2ZBaBitLV?n8D0Th2ZGhJ(f?M1C?PoQ&&t4CRJ$S5!wc1UkB+p7#Ugw)Kat|;Vf+6k98R#&S4 z$aaRUe3Gjw8mVX)kX~am63&-sW1#3}>X`PTgih5V%dn`%vwy0>r#Gw^(YvXK>tC7O(C2vxbpeV-D&qs4Q%;oH zuDYihzyuXAv+QIz@cS;;nQYqfW=l=D!ctuyZ>;-`5IDQPVaqjtzhT+5FUdskLy?^T zi)~Zt8wWZsarMrO3?dobMpjwKC7(IDKQ3g+)lTzy9i9|&GdqHi8el8ZCIDzt4Tei}S zW}4#lt5@WCk&)xZm$KLMSY~Mf&SDFtU{4g5y)_QxIJ%LtRYj=1)G7*YR{Xc?k_6}nbsw(l?>}F-J{G@ zC{-VmakUz?+2L5a9fc?vk!%TaZ!F_Zbb*{!!t>nKiU+aSr0a|^S1}P-LL_=jo zC>jmYYf!3{V;X@neDIYCwZ_g?aturrG5K8;stD6(nZAp5SRwbkU@+WV5pApt2mNwe zpl)rVR~*++C)`{YXJl&i(%ncqsId6X$Qf%F&7{|aCZCFzau}(kxs6n{5S4lwejA3V zp~eI~UNGpJDi-x&<8!#ao_4sYCLHr>8>0=8I!bf#+_{Og2*lz+{0L#{$Ay|OH5v{v z{IL2&!^F`KS1LTXwNcEB%YqmqKo@r7Yh^#JDpJ1wBEU5>!;piV6K8}&GtEa7tzN?4n@>7@&8>XCUP|je?NaevcvQgctIyQd${dS+_%!79_$6&OtP7NAv6 zyOFHwWTP?4bmY7-60&@$uBb@)&=Ra~GzG~|c8YdQyom;gVVNBZ5S{X{hc)Me#*Zyt zfk86IN=y^b;)S9t7{o|+HCkq<+2Ym3NfY03+l}uu*Iv1{*sOje8&WmdZ8X2X*#OhN zYB(D-`EN>z39cVhV`vKpeT`~}3nOh58Rr#{iAqKr$C8#)`yis^Jt=)lupiWo9(*i?Hj5~W_DZcdN8;dje0&2tY~23 z@4By)m!_2+l@>bN5&G39*&@5)U6#YqzvXbWKfzBrtPDq4RZ4T`d2_WmHPvMc#U(BGX1IpH@88l}t5iO=<-peMj1fdIcwl2B+>qx54@{52 zQihhEF^RUgh%&v=x=C^*YOHJQ>B_^%5uPSo(x_EI7&*c@q=J{n6Jfkqlk$S$xinK& z%-lL<&J%NCR=#LMn(8SrNJ+N%!J^;WFuPW3D(+P52*Z=j??Ros#eQyPu#EwBezKig zEUy@tr$*q;Z5yuA$Hnar$%9J}=?ZH`I9RhaOKB$Y{F%M8=pqnuq4CEgN%sm3#qGBS zE9JOX=kR;S5zhMxoYVB01~k1LbW@3}7BtxqI@guBHVuph^XcOe+rU+&h9MeRs0Y^I zCK7Yb!#Lk`a~F!W(c)F%ER@KqIZC&-YEN>^<@~I{aZNZ{mrQ5>A(d4uT4+_*E%-Ti zt9^SJoD(63CNm1On;o`~XSk*+=(^(7c(@vCK?Wlk*CyRMU!$oMQp=UBHD0nqAcZno z7%g%-$F(?a)u$^6uH~b?sd>=IG}*%EGm0iJH8C?=CbqGTA<6XY*}Yy?r{@i12FSR; z$P70()Q2=HVm`CREH@8w0jonCrfx>XEKWo00y}@2Xh!Mj1MQ@VbKQVz^|Q`-(%80F zz7)zEE0xSx8)b{sJq<_#RI?U(4_L5ioehND#- zjh8z;X-zK3m`kAJUuH&PH+|fup0#SFx8troMmF^HEy;^Ig8r4q1|pv?w{Fx zp@IDqgN!3K(TtIsz51au3pxI3&lGLRc-|7Ku({?}HkUvgpiMsDEXi z?a-6%jPK52(vsY!`L!s#1|5>ZEY@WTPKLXGrFn*!3lO_a1enUxHz^t7H?8h$7qQ4 z_y$&@${QJhuhCKl@ryRgUNGnucv_DmSmoQ)Qcucd-9#_wMK@`8CLXofhj{)7*6a-# zEA#^iCUER5GZb#8y}=ooV%nh~ZB>-L^Oks{oxesJSg@(209H#xy914+&oo@wTUN@b zpaza?Sh-y|teea4^in2_8(Z(ICFJ)~Bs6K(o^cgvi`ZW)z?khWnqKC3tigNZhIth= zq54n-wMR03Z(D({ZKt&#Zj;Vwopo9=XH70rE==QYOk;Lio+xWv!YDSGQg%?|Pk+j* zD%GL8g@U3)qLGypJFzn5)eIQa=V{Zsz_+ciEFjHX)8D2rzwu}3&&~#|yjYvUrXZ|5 z5~G6;hO`CVz?iy`<>UgX2wVwMH9czQG)-KdU5T~fC8$<}LZ@j+o56B9EP>^5a@4xj zdZsVe#+95-k1o!bA|>|@Gs=lkOpV7VpG@$QcGB{WT@B7sxZMv0Ps0Q^dF1m1fy?XsE(WIvOI>xQ0+IyIh1$lNK9f2|NISaaM_g{x(lmGhtScDoP*O$e1NXIy1A#lo?6Qq_j|9r`7R{^s)*kC^fS&>(r^8L^3-$_Eo^Dlk!XqT1iZk zm&#UugJCZ}z^eURe$X0YT9>1R$hgu(`2uu0!C5VDNjpYjTBP|&dDeRN^szW@PB+*b zwVS~<-P#U}+ZJ(BteuSTwNkX}0oyxKO@Wg^-yCUPR{ZeJmDkm*E!k3*5d`g_*Lh*8 zR0|CuC5kT56nUFdnHg!MnK5}qgCEljX;~#q$08Vj&|V-^0Z1;p5v)0c%mk|KglAlA zQr?t9=Pn~zooki;w9P0#I2o=@i)g(W$VkxGVf94gS%zcuY1&)xT^gFL6qWC3bEkXG z+%He2CL7151evuDUsM}$nI5la|1HyiYRgQPBO9wJzf4?0j1~xtA2K_vR?sq?DQKG~ z&PqUDaE71ER;!i7xi07|S*P~z)c4lW51B4YQcTAk4y_KyS_v@ewRxdxLV_PhJ!d7l zk(7#~0%Qa27aO+%kV-cvFxW&Sn<7zmNm+zz<60Q5uZ=XY=i;oe4&zeRtk~5@5^M?) zO-<4&BMFIVv*}A~U04PWW`<4zmZb@>MI!x^KLjAYPCSc+zfEBnq031o$( z!oUU+F-qoNb*N73MNzMS@pG2U>C(pn6+hh26egQpe`L44tP=vpMfV)445}MrJ*_@V z4y!SCXEhq)XqVroHL^w?PadAI?tEdKuB7MEp~}|sG!#)kmwEUi>9rAYFblmkp%}X* z#@1SO&<8XooX~Y%K_pgDKhgS@OujZB)OlOm{vaa5-z?u0c^dn0BIVNG04}|QHXx=cIJj`_khQ^eCd)S`5vH27^aza! zhyp}0^)u29Kt2 z+K&heozcpPg$1#2)5Nko7m*cgjmuI>wk(;j$)2Ac(Ri%dmt%IS6W+nN<3!b3dIv*| zTsA8wW-{erJwhUrzA6ajY~0j1CyDIN2D^Qx9Z8md8vaU(f!ZT`>PW`6pUs#-k<89& zYNAXV*Amr&0atQP(567wA+?rZrUk7!I44gl1Z*hlgf%JLSet6MSv8WG>qd+XoowW| zD3dCtXUSQr%U#zaxRGKi#4I4QN~6I>dPXWfix~9F%^RV zGPsm1DO0oBoEiafgeFp-@N96b{r3O6gF-|tITbVV6Kpkeqz>)u&RdbtxK_)`G*0f! zGVN1pC{TjqcztDR&Ld$}8cLRo%nnM1FmtrJO;Jjol97HA+xeXx1+_|>`B~{f5woYE zT1V1M6aBfE8yx!bHYfeEr*r=JlDK9JNo@c&N1~@vmYEf4^9(<1$wXu#(zai%#h4LY zYFM5jDrk2>Qe~+9G_$p;Z8^O!stnXWN3R+vipZhRS9mNN@BZOT|}!<8;W0>bLKv^Ey5^ySoPnXH{FJ1l0t zNmwewwOa7ft4>Kd?6+J|x_&5?LE1B{ zj+xh_GP*DgWEM^{2Ms8jz7a^AQyVoBk=l-6Mc$nZp=otd@a&+2Km^-8 zuiyfbAt-Z9t@XdO;AT9U*!wXzi}?v}FSC2#Z!7QuMPr?gEYkc12#7g(q_d@N%b+m1 z@^1zIx3)#Hg#E50mmJ}CZm73qPi}63d@6dW}pMke2wl;`aE3eM1jkSH9x3^bQxWg6zfa zY`4B+lZ1Y{+dTA}Z8L;5{gywTOXc0B7rXyITpiuiHn@`IHyh^v&l*=sIz4^H{5DlO z?9;-iUIQ`(td30wH{vyW8E&o=KuQV6ZP_qIJD6Y!;)K{EwMK)Xq@6XVR;xR8!eJui zkT=a38<}fX%)WnPW&&m=;TK-hGMO!C4f}cZnvU1?-?SuV_M;b&+*P7y-zn>bvXHW^ zGxs6$Mv~p#^?fz(^Bk+xtjVOK_SCF`7#eg3{_ZiyxG>PFO6F3xBAR^d!SYyF(f?mIz6JD?oT{KARvpz6if; zS)=S7=_x?; zigYPSpOQ&g<`2?WBnA5MYAa;^c->i+m}Zka92rdtu!-EB7)312IVZ-(P-b5c0p2U4;E($^S9Rgu=t*23R8&ErI@BE5pUFPYWg)x=jv)B z&7LzeYY*m-dS&V(3JQj4qN*B6lVq5U96uOJSs7@{8onlvz^maq)vCjl+YeP`g-Frq zxxB(kmM1xUVHKJsrn7;(VjBs?3d+95BN;Gj;pU9Kxh_T$ zP0tpUAhm(K-ED@j8It^9$%0#s;iwOVT<%R1sS2MQjs~Yon#_W13ns#xn@YcYX(l?p z1wZxukL{!t6-9KaB$`#|>S(yEu%vYP+-c@qxe;7!+He-#W0+PBr5fw_Ba;KynwcOX z=C`g=N|O<7j$fKlx88!!^D20=gmX@-LX8da0eRjk&M*$h+YEuLqKy@iO1WSzA=K3A zf4H*RNeQkQsiy<@=+J=8kVnqpcc?*jgH1}4)`yT?B&XYvwwoR)&ujI$g$52Xn4`$? zXk%^6a?3X6)1 z{laNl1eZnj13XPNdh5hl)n}L{7J72v5=64%oZxIN${rrtw5)zmzIpCe^_0| zsLYE!esDtC@J^T)w3A8Hk_?$S*O1@^Yo<_5)Wn2;`mWeDc{O|pDkZ{}M`mcLb|xiD zu9cq+HHAxO6_?I*8IbB1tghXPruhpodsKnf8Cvt1F;=gV0dr?9IQdbyVEXiuX{Elj zA{qs!L%X0+Az@LiQ+09ev5UJqVPkSLdur;7^DDEdESXbOSNZf+qtsl{CV%0=MboDH zb4@Es;c~hPS9yX0s_m;#Lyi4LS+FD-IhTiK4WMxDv?bH#y5N+UL!glupUELC_KOGl zNStk>R0)t`W?lAJ8WMOViZ%D3LTOF_Fn?bw>zg<$Lf-m4lo@d*N8wZqKMCDdxf2y2 z4O3?y{IpAPmi=O&X`0PJK3=_z(5tlAZ)Vk35cPJ4Jrc92q0gpP&FzAS8T@3wp|Pn| zd+W>}PNlci0b-h5?MOv1`LwuBhu2NAnK8whFf0A8q-eDzd1Rd!Z*skV6CrntYFRHm z*dS~&Cc(KxO;=jH(NN>nDALIjLb`4#y98Eno`~v6X<=YOa*=j?Xd?n4i^<+zvO&If1D?NoPeCARf76a{L1laj?_#%=6fR7%V&=_l*s)gT z*{^=JVV(-KdDU-Ts5(+1YXMK6;fT~W*76ykWb^JN<7DOXIm0ktW3r{#jq{R8t&)oc z^)C9NYx20BX(e6zo^R|l5W7-+`Ot6m^;yBx{FO0sb%;_rM{AC zBbRLF+p&$UEGz9KN-JBu8mljFs>@kTqt)p7ZxGw>?b13>8hL|N>lOCPcg~>gs%vY{ z0`tvVJ1XOgv?k%4R-Fb$rY!R|ed&S)bFFC;pKj{ZNo}|3k2)2H?U(o5C#)7$llECJ z7AG^)Z^9PV$D{FTzSWhi%dM>F{2&q0sL=$YG3Fm(u(gY!GE>AxPBD3v=1WQndWjqK z+Cu26z5Cdv+3rzeUui7b57asbiTr%?(zpMKVpXinY_X}OEqC=9_Kjz1xz@-`=kFHD zQii4GFp%-8!JAc5WQGUPMjJ{t?n4PW1pD%Wvs7WGaas1lbkItvmF4EEVrp3G8%_CE zSX|#=+?XC+n$%hAgdWeNmG3|e4K`>(1eM^JV?qqFoZA2IX{B*#74jrBr}&8oYc>Zcf{ zItZnW8%5epTl*Q*->|9o4L3)kvA1bin~tol=j{x0l^Fg-Gi%djGwddt^7idof6Ic) zMvm~;!h-JO^9hfA(Q-!T?o7T?&{$-@)YuJrdPlg9r8&M^rKP+!?K{haKP4FZtpr#5 z{>!4Xkf_xN-c9n1|HUa=SZib?WWE)tX?b$mXV(=QBbAAv)%-K==C^XEL6w7?59XWe8OJKbpaBrB*RUmJ^oYP$UBBw zV@lg!GPX-IY}fMgqh5+YSVmqi$*|>?n9Q_)jh!|7$NCh2P=;lFXt9d6jNL3RRHbi? zl-Y9?<_#9}QOmOOc3qT*DNo@{C*HsW4Yl?y$|5UF&r?>BA;861ZzkzwBkd~iVH)#| z^cuanXWnvk-;ptiP?h1F?ls02{q-FLrm*@%rNVF1+gOihSZDdloVI04GQwv+wNj-Q z`i;#*hE3}w_0vyVeBda$H?X2ApN&vH08(zF)0pAR9GT$jL*}H6f}$^$>DUDc!|Oq$ zs96TCXskD%RdIDRxm|1mvL-_!i{Ip%|HZnDS5t#D$!5jW&$HxNy|lV-&vwXjI~Fn{ z9Xk?|Z?$EiRE`E&sb+%Yi*uu-G+`Ovs|woFDM{;T(=~EjpN3dthCT7=8%b<_9zgHCn(?7}RyWiiI9+AYHfO2N$k_~K2a*|*JbUbIgj>OOG3VPjG$Q>8E7}M3JcY{^Mx9xp6HYX z{VOLH@a-Bt@$Ei|WG9Lmem4fRnZ;1gr`FSo>Z|$oh?ce3Z?+4lXzG^}G=ea16WglX z#!q+D@+z!$bgC&GG0jo<#fx|>!lIK`&9@fqhjh?&-{=V0ks|fTBv{%$*ia>&sp$+{ zc-2Z%f}|_<#8Ss3tkaM;Kit4ejZ9d?+9h$fD0I5t(sWs5l;Kz*91Tw_&V+aR_%F&X2p z0FlsT5{b0zW%m$ME*i15XT7|SfW|H*< zJGJmsOV*_{fOVg8VNb+1W{TJh^SLt9emV)W7yu>TC08M$ge5mH&1N~xkzU}?SWmgB z&*F!*zrY}kieT2d-F7qa!w)Ml^<^K^9j8mp^FsN`2-d%tZc`OCo3xYjNqE&cmz zcxHdcgfdP)qHjQ9Rh!Xvcwr8Vq@}SHoR-GQpt<_MLwcN9LYwx#xBxewCIoM3g(ld! zyCT!}HAS!Vmf9B#%#tqdY>R8``|DBJLq-{g#&bOGgAAeIEy&}eB z=39-LzO<665E5|zTueKj`3=N?R1lqSW>d0#-<(5Vtb8+{CbCOeLHElh$V!izzsh1w zAXDUbfP-)g#OdPe7cXB}PrJq8>vaXDfrOz>}v2kL4InAp1 zpOxYX4z@|W{T^rb2eHz{o8Ot>TLCnS0~y_$;dhL78^_8zvtXZ=)|p{TU(U~V-H2=V z+b_vbX1Y%QVXSP|dey`~^pU z?t&;Nz6jIh_@7ow+K^Z3XIZ^93CcN4zGg~l>I1s2mm)ms#?pnUPLgS4svR_08}y~A z>5YUGD^YnV-;cbJVZLW70lu!EBqrMaF%ttiU|$IHPcPVoD__2yq50!b_9gUoZTc@KnI9?i&lZ?&G0<9zOfFg*oMLJK2kK0v zD?FIjM%S!m2W>Ue?v{0oAnZqv+(|EUmf9QW2B#XF>6@`gimwe;uI0l}Dm5X!?s4$A zwZn(49XVkQLRpb3LM%H2StZdes znMy7@cSswJyLm%KKr+sPWCUhWd&fdZl^Wk>n+JT2VKN@tI8JLym8i)d2x#-Ha+Y)R zZohuplL4b^=XJKJl+?~BSjgSv`>K9|*r9%#$nIv_ueQ7*3f9^atB+5=9jo_HR@Pjag{I-agd~4jZAHDW@#x?H7(@Z2T-Rb1EA((?@RVG*+_THQQUQ%0~Nz zBF$l2rK0UZ!62N()FOS>RifjrsSi*bX<9vib~toq5~N zjLBnKZZ(&GOv|m2Xd;MUSz^{n7U2nJJlw9UBxyKjy41ol+YI^ZkedFnytS8G?^D*! zUp$vDYG^?O6CGdVtri`yQlqVJLIquComNDWQMIc?Nk8;)BKv9HRNFbqj%qYYb}eQ+ zuQIPW*#G4PNWIFcpacI0Tm5;u~+M-^tj*?$%U(}P? zO4DyP#v-aM_>vsDS5Uj-wfa(8rf9YA*3AAgm2vNfPr46pp5i6oe!u2XwDNLN^Z z9s8)NqHwq)9!Y)eL9)-B{9O%a?guFKF$J%{R=!k2;@3OZ=UHQuFt+OW>1vyMb$hIk z7ZxOsB>O>9y>-93mNYYB+!R~UveV3n-cxH;o?s5sH7VgHPU*Ol5qPQMnTp1EjR$zpy`*ernCV*=VN zHbXW}XY-@ujR|^l`+IBVpt${Dsy&wv`0rZry~nl^M(JtahIYT{oJ@vf_B#WY@!A9NYhg?iSwEru z)YR);8Snq6R-sG*a;E8PJDIiL4?+6-|3UkDyq!2tU$AIiQK_t{p->LE#+%x#T_bCr z&)Fwy(SPZS;md!+EcX#rdF}>Ljc;nnCLJ@w?}i;yxC!SvZ}=t zZj8fx>@k?|zi5&1ISXe>H_)OXhubq%q}v|wChKXD?3k|)@bTEBY!g!d?K63(97}6P z7Mf-RgOGbw#yCg{^_NRbj>rS|CbMSBe2&wPf&ZCLBb?EKnLHQ;Hri?TvZrua-?QBFeIrq*99HM51JwZHZEglQ}>>; z_u8+u*L$xWE!b{R8`Xs#UYMrrC6!w8kv~_ZB2=9_P^g-cvCTy)s_+rNSPn<`7GhLL z?6h;;y*Wa7$h7_`CHuit)vQ}Uj6rh3*d;NIO`mjztq5QyrxrlkT@@@@sGS`3&w`LI z-gaTZ6xECFc%S|5RljNEKp-xc)nL3c`g;@Gx%uy(4kpezjo#Y@m|I7?M@LrsB>J2q zO`i)vJ~?R_>5qKfCOJt&(v+@KFU3>W;*v%nStq^oiAYj^nMaDbrQa?v6P;4c_=vO- zR>sw4TNZ|8uPYw1O$@2YhJx!zlB$mWtNmOS0^;V#pKuGR1Mc`eYIQf%2X7~tQ|0TQ z6XR(4Gr!MBJfg@OpSY&;i@Fsx#Z4}m4c2{CbcM|P(j9}m5e};j!hr2LNQ~zJLZ$iM zz!)k!ArDyulMmZwtVDlm2H-IgcIz+fXJJ_=O!`nQ+=%jRIz$>$Wv|jA|NlYjMmkup z=z*Q>T$uwv9SDRGOUF*8mUMkl5#A56vD{yl%9#?!hz5qhUnsK&3MFi^$O(l|7;ZR$ z7aLBJw1$0ildFbxO{88BsYalo{BDK^y22-Ha8({Q8(Tbu@I zk5*_Soi~us{3vX;U8Bn?+P#-Q2gdw|b@z6A=moS`w1cu7X18B6vYc--%SxnDKu!ucs+_=oSYfj`JQ-d-^;j`^^Q%R z{yMwl*z?a5ihArz&r@N%$H9*?Si$bt83T5eNdDronVJ%cd6~UUEH2ot*-s~zx#x_j z80#r0j{o&%1h9N)#}^GrO{sZ;8NPs16-L#6`GEK`g9RN~TbxTT0pHTDvrBMcE9 zHI${rn5Y}DyfYo|u{Lm-yDSW*b9lL{5tc3s7%JJ$8H0Wm$zzSI3;;K|$jv$o$hCp~ ze>%4FpRC~Zd7|9G)omD^Zfla=hzMUgG~C+gdpco}uoL|+AKUrzNvkt!DvrU>9ETwf z;3Zv#LP_hUt)4EXfT_j=EHLUcg*JLM<73h*A7kLk8Jq%3$z#X#D@k+C25hhq4w!sX z;Mj%)hx&}BnfKSWc-B_+TxetU5>gm;o>2l5z0w8dne6+l6hz9UcEqpDPhIpD(et-9KElKX2d_kUJ?J4*$*(__8mj4m}LKv zu`JDZjcA7!0jp%9lqi(yR!tvJ^@t@BF4}l~;adRx;tZb^VMlTjb=KHfUcL*O5TeeW zvPfJ_NEJ;iPHyuYBWX8j0H~V=>L)0$o~2@U2wm3s01KCIEa_-jsOK{kZS98& zpmNHjHe)Z>vmuS3qI~%fL=3`7jUkASDh)=g&0EPByte5`D@I1>v^f&Y%r1}8{I=CU zqzo&tc(+j~h@#V}#vAk6HJ`+Bk3(BcXF}>irP+#2Se6X5T}z~4?eNlwK?4=i!zT6i zsna{ZVl&UavwgPcgJsMfLJ|t;>W-C7m@>Do%goDRm4=zAl#6^)L3Pq|UsLBe&d^f$ zmSb|1({aD8y_MDEz?5^@UTw>xY?@0~>#@dG(r`f}gQXuXa}%h9Wq#zB8543MZ^yip zq0Ko>dD&n<<*~De;7c()8r(pnN*mG$MuQyq+5aTF5sk=N!=g+w2@$MWx!MFGm1&VA zFQ7Jh14<{r5=9?;$?C#h3XX;fy-PL@EotX_8(bXPw#)=NKpWl4Sqt1V93;mHu5rsP zdZ2TD4u8+C781!)G@3Q%-7rB1F8T&v?0`-xp9Qf?*Iu$N>Ihb0tNGUs?s-%cOm+oy|i3apL-!qb$Ix5q&tO$eudCUQ&4Nyl%|hw|20UOFn&JSp^* zAk<&!oiwWC2^B)ifd<&gS*>d=8>j2SJn4%VV}I&qFgm#63y7l<9M_k1q6oCl=>bPx zHIn`H&VcIV@37DmBi-XX%2-W1oUNEInW#G75{iNra`uu7PnwSx`FU+N9pG5xNE8|a zrn%v8kJ~KW9okA!aGLwSdS{^sF)0*EngP#ab|m1kWf`5GK@NrjeZMDzstyrh8cPab zw0THdX;&dog0R5h>{jn=JQdjTD}cp2{o=;=R5ZF!Ub2Aqd*@jXw?rD%h;Bgxb|9pn z`3Y@aXcY@Oe`Pwp*kuk_@?)I}m6 zw%FBDSdH#vme3;{Cj}Omq$3A|1X$6L3kdo20#9Jt z1k<-Z$ena~G`jTz*j>s3B)8NFE^S}6+d9ExLu*D(qYaE5zPVmyLGs z*bBm7mN~&n#21LIe%kJi9+a1QW9?fdNQoHe|ExZDu^k3SHLqmO#p>n_9HzU@hspzLr?Y66N#03@AD0?*KoZclSVMGM)^39dU7qB|`Ti0^HB~)HJnD`2 zd~5U0+REP0qwMs!Hv&X|VT7lqf zBjYBWG2%*u#u@L`-Tn)wPW?syrQtH+0b6%=kxZ7k0ughJ4d{eiP@0&)EaVv-V^z!z zr+C-zbKqBHwPVY8RD5sU6?0>z%Wl=c?(Fvp5yA>uMSO?T4yz&Cf(!x4B#TQlpG1xP4EKIMpH$O(Bu6-BLI>CMs+ynb|SaIbm@x>l^4G|)1R1iiMCSdkM}NG zY_i-qYBuPM^3VFjBxsHjlt36;fxg>e{wR|0!$e&xNP7o?4HRQ2PVK}MEI4jSE~5vi zC`lAeU?-x=IgJF7(4%Ki4<+vd#{@ECOlE-NNvbIlsPcHlgfPXkXF_I>ov!zZQi<$z zREMP-KKg5SDX=MIU}1(tX9_n_`#SIs%OF0X!SutqU|oYW95#*w7frcb3&rlexTT$S zcXR6v)(hbSy)X&690!)Qh7KhfY7{P%Ppj%jaMixXnPtk*6PQgnohSgr=I-)?H&6lC zjyt<2dphR$GFDeIA&vJg-MDe>#u*atm1M4&jx6Ox!}7WuC_%Dr}Jsy}fl zyR>YckM}}OosDQ~R`pVqPqAlqVa)e=2$x>Fe(lCwWd1SDWgT6VQC_+)f4q?oGmFK; zE(>5UVse;4S!2Pg;o=DA5;k8^a>FgN#~N;%aKDV{WnjrU&4 zMso>hieguOGR$zqV?&I6J?dg+4xy=pTX%Wj#bWL68RO~YM*RAwJMRCI;3=E zKR&oL+XKNE8GCbyGxIvYmC70g$ezj3FIP0(F-yFi#j<0BDFhfB4XcuPUe7ai_Fmc> zN^L?X@w=^Kt1ooO-ywd3BitPas$ydq?_It&*R#}~#$uB`A{0%JwIBR>;j_~hiwX%z zCVyOyN5HgOMD!g8LUz;krY~K(q_HVjtFHt1C@*hV5?Xr`3lST>ygx>!IV(^zJlBeu zTxmYWRXU4R>e0c49Rvi$e*_T!L~~xEKeoFRVFpJPk0({30;t= zpz?;m5a?-LE$DPh=AX11wYP=hY_)0e17!{}A@59N+D)ow?A{mD)zclNZ-zZAF{5z9 zE{%XKw)zM+cC%=ex*NQ8ar%wdC2d}{Rz|D`AT-CFlDI9H324b3&~970+*3R z1JwmQ9IaY9-rwp^RF)pJw}1{w4N4@?aHlH7B>{&QyF7DqKt|pHDS!JD%7C5-4!1ZN z92K~5bNb4~0W67apd&`6T`qCH0JGz+Z>C)K@->R0n9WXKLnT_-f=mX;T;%0fr_NvR zPh6b6HYq-8hKQY{Li-CM)lkK7Rq}7k>H&QpY@x0op zlx9b--+0ZIj%ma|Ke&Gf5dxE5t56KLyNTRFX9IKRXJ46}yK!@hRo|W8x!VGrSEXK% zSEpxAzmO*oPdXRy#UwVW53XR6nzCIeGZ0%U8T7_`GYwXsSotlb+)6+A*HY7`-*b`| z(x(Uq@x&xKg6%9Y4sGP{295x@6QBvc?9FwyzFN>W<=gV^h1rWn*-dTF%hN*%sK}k< zKM1sXr{GSMW!ZSzMDg2tYvP^iipse|9%9N135iB6N*IG=2LiT(et5B@bDDZ+P&z0n z^b&}sNQfrL{-`J#e`=Rlng--PGJA?TfSi)j;KX>;NA*D#JnNr#fkb7{SaFO)+uvNK z6X@rgB~=gMvK-UHy(Fk_3^A+FNks{{xC9+FaY<}Qy~>_rEX}&-!|bS`yxV%r4~L}m zg4&b%IvAu?Q_fdty<1MHZLT!unDQ1>iz`Ddbnq@Str(xMa`BJ$=9l-dod@|9hg+h zrf7fVOw5zJo(7Y&Cist8sL1^1G$%fD5^V(vBi0WtDc!>y9FnvnvPxO*on82WjytQC5 zBrEaYWjiM@`CoWvk+2#$!Zs-4IMn*78*)sJ0WWI7T`h?KH0suc%_0`}EV^deZV8s* z2VvWhLG{*ew}2^h9l-((FfbJjnwj@~k#vqwCyZo06@Xa`QcYLyYjxz=>Ni`y&OuBm zyw~RjFHOVnbZgvK@nrJ*@};>fnTWI1?89HX*wTK5+=td9JaH3^tP~lGdxr-AhP0KU z|5Czv(^tO=1M&3k_7k)c-6DZwXpJN>5@Y6u;<+2cfuRU=hI~SipLeE;~y)5ml>4amIBgJr&xdlD5^NbUbet z2h9r&)YgmQjps%iZ*U9K#0@ujS|%MW((&GnCNHRXqA3%V3UGsqJ&$Tfz7boe0w*G0 z0tTTWHH&6#7_LyI&byY1z#|Y~*3829OL{0uTIAYWF0rO6^%slWp>V-4T2)iNrJ&ciB zwE|l%%WzVJ-zQYUS;F>ATd(4%i>ccUMVjnca(XW5?z83o`R(oAEOtoE8VGD$!Em}- zKb~t6lhQ`lijsr#uDr-GShHMsJ&(u2{9IH|Xbl`9d3tlk0DPm!Ay0{&uyxa{Qvc4A z;|OMt88dt>9M>`VB8ou;#HAy`N$?6&`&{*5zGA>&Na{%}#0hqHw`$EQ&~U1Vg0#13 zqDMm@LKPN`N9)zwO*>(z)2{nvF8~Y=a||AC*NK^@vM?6RmTJ*U{TL zw9WzTF(&bD%m2=x#lPe{)}Av`YTnFz2q2h)i-zNo<=&zb%%Ul$ftj|GP21RE6iXQ- z<+PrY_Xd4l36~^w+>tLgDWc!%KiJwsQhh*gu!tqmkDZI#7XGmd>c}=CBf+?SpeXm< z47}dIzDKymV*kn-77ez0lA}(`L@qi33hba@`q*5;Nh z)yRIk4>Sgl8JVBNIfENg(1a$~jFOb^-?I#6T98f6nJ`IZ>18f5WWz|S z$jzBoX0E+Db0)d7btvU#4im)fAWcD*9B3-GF#!*u4emk8*{X2yk|<6fG$GDh%R*}5 zWAfEBthe9puC4`0#%~W+?{ZPp{VYwZZj4nM&YToRLq4k(T8a>@2p!>Ps&F4JlfYaQPJRWEPND=)9Bxu;A9XuYhQ(p|5M zysm3@HsBgVlgL_SZ6`ryYO$F)6LBi-r9x>1v@=KEA7vUNRyk(TslKpD2;6ATLYha4 zXxx?1~-5V==#M z-h%`Ksf7�YWurSx$Wu_59{$6|w%BpCT8D@*Y+1+`XUN5)cqg!pQqzr$XzI_wIu= zQw{=-lF-|z8!(cewi#a2Xh=iT+~9e;sdP``$!EP^%1h4og};Od*iO}hD5fs;&pN_- ziuM=7YUxFRXX3@^1nknc@F5QJits6 z7mZXMsSCs`9$X-%v40zOX=8i+u(J62ywHIS8e#G>2J@*kq5}s39PM96Np2#E<;gFT zs8wSqqL=lI8B;k)_}}vlW#2Vd!ozsgIJS>CRgyXc{w5fO#|VNmc|>(%7l&1YjB_X& zHQG~rNW4@2tDu~oa>dtDT$?aBWb587Gd_!~e{bf?{d6~kGKa|Yf3l}5vJ@*Cu>rx+ zq&GRIHK&o}Dl8XQuARpl@3sU)u2(%yfD6TSLxpB%Brt}pd~E3i3QI1VyiG=cWeqU3 zFq=6{mPO_z*|CW`CsR#LwEoY{o^fv&;;Jcmt&;<#8dj|AaSlO4OJg?ch9c&SF*?eD zLCJ3#l=akfTvzMz0pwEjfM7*d6o;dsNG_Y_iZ0w++aj`AnT{nGFMDptu)0c`$kTQv z__wQv{V)4T{V#(u?rODJi{tyXZppnJx@8uTx|+wh(MLmDnco(IM`S9j#>74Tz2CcC zg|O?v>pkHQvu$~NHkRjQCgA=hkA0Ge@xA*VwEn#%@&$PkiIctW?PV8#XPt|wY%Y2* z{9#p=wo0ImDUBY5mi-DlCwsbH0{LwocVVwFD-1K-*p25}s1yBOHgE6rbeQ%0+{`z= z&P=05FWCddkozGU-4(`8k}@Owu(wIPaq)TFo&}TFCWKlDXkwox>3`2?ialQ2kuxqg zl^kyz64mPvT84df!GpWA^GO9ziqsUsjz>E3#gzK3ZPXCEO-zAyh-c(}7$~r80FfBr zS{0M`cnCw*#%l)B@!ACK2%)g=%_v#BsD~iV$4XVh(GJ05 zd)V2D>Pa#)*wG{}7~vrxjgf0RoS~(J0YX@ygN7Z%e3G!p4_ls30$j` zhC}acz`@=DxNY8qi3lblVR)(qmjQ43&Q{VxqlQmu&Zbrfk|s+%wTG3K#YT@Y=#5I& zrGw(T2|ODRK-@Gu7BuY*n1kG5OKbPmbowQ-VDy-(JJ?os^A~eUGI&MPrvnNc&uZkV zb8ihOt80m#ySJqbDnP`}p<`Ykb)4fy_N zV39YnHs&8{p;;mb?(3ykdZMy^>V$c$P8mXAGlACX zAjJ8x!{yXhK}rD=&HklhQKgTi+|Cw}M8Q;WS{WXAhZ9`cq-^9&g=x-JKNXaK3&8xU zicN??iTSZm>rr8GZMew2={i%U>l7;cgi#cUp58Ux3pvPgchs)qO7R7xZfPw>J0zS5 zV9xEEQ{v5l{HF1mjDTlwy;%d7#`3ymuxpkBs~2kt`uL%B7iaHi`XZO^%di z(J~gZ@s#Dys8{2OmpKZicu5ZfwiXYc7UHyGqCF^)--=Wac4y=(Wh(5b7Q><^0}5g> za>lv~U6uIM!=B51(vTygkgcD-eVav0>WN2ps1;#qCNjojca;Pz1)(>9n@^N_6-rW6 zY?#21@{M+M`?m0*wO?=$jO^KKe#P#{%AaRrInLZJJzhhx(oP5Mes50w-=#>KaoktW!&4e8NPP z1B>Z0t*&A;hK|Cd7AJx*Qh~cBD&*5pRS(7C2@P1;l#_=tjvKrES$yYWN*lKd`pqm()IGi=}_rH}~*i`QD0m{X4MO=9AdQ ze$Y7>fBhp4Q}_HCiOV;uuj!@ST)2nVxxjt1x4OK(t@zRyYbAo&o3x|?WlQ2B*obUl z?+rP!{Xq*gue9Y{Frh4ZW}NONs^_W_wu%0+#r)9ZB=d>oM~Nj!gj~Mga{*YEslYic zRuN^F*6!G;=G`c$wr`NEQ3fvb3XHRT8zvquRr2sF2`YUgGD7Z@^l$2ia{;>>`{V*zdqP2fvbnwy4_a?>F)mn5n9iQx zgSW-5iC-@E_wu?ncnC_8FqS+ge-SYN`@IC z6x&f4qQy^*_Z$Z^?{$tFPa*GqWXTIPPAwsBoGiec(;@O}50=NN4P~}UNQEeCA#=%K zqH0Z{UO%%t}Bptm;sxtW+|{dY$yEproD~i7$2*qi%W*&x)h+c|+-On*AO9 z@OBZ{`5r_|hB4Ow1hdP4h8VF-1&gYWD4^)S>1$QUl5EaKj5OPoSw^*&=>XS3SV%qKwIpwbDz@xRjF~}t>?Rarw5%Cs0b34uU$)KrXt3l zL7n0G@`fqk&q!>^no%M0(W4abo$J`VB)A1&W3%;dZ#%| zkYy;y^{P0+ASQ;JPN_L?@nwXT3T7J&hA{%+T|~)ytUDMiT-M=9qYE%NkQ=J1!&c{@sYGCQb3?0N5>$g`TE zTb0)7KL+eIcJ0>I-90*FXUwBFDr%BR-%CdA`ccG1@rHaJX|XgVAokuu5VigaB`m8>rfh+Z3tt%uauGqp(Z&zBTxQgAp z6YNc~dT>YOiq}bznZCWb2xmxOoX!^IT5&;n1tg2HUO<3-m^VXJ*-qXIXe${GxuFy-xl`r_ zn4+jB6sl{70#?CuqpFpy3kE4;^O@iY6B~Uiyb`$x|9|(eSgWIzi$rZf467a{qepb9 zG@}$hI?Ml6{jIxqaE-Hv7j@$6`@OW&1-fJAQ>z`-E&L8JDGYBW&9^_eaH08IQ!e|h z4#jELy*_-%hQXw@0xy`3)Zo3`C$n@gcETafb+5h!nF{`C1Y~w zh1)qUy)=!LmE-w1R&Brgi2M*$NO&3oAqRd+OvEZT4Ta6$g8&@>Flb;dof5_o^Wry! z8f%li&hq3{mE!5V~7h{_~N#mrdhCBBh*o+;rs}aDvNFzl1(e z1Nc56Y-?banv6?Du<6G4V0cw7*z9pvWNV@{rq$#h%Xi8P@(B_oQ~yrR-?WiZwM6EY zidEB${47N1v8e=nC{@yd-Np~K)}MIcc*n!jt%vOn1X=eXrv^gvXbccef(Xkbr9u^J z>Af+(<`js<@RY?5n&YT{#7QZ2rF=QxUd+THC}rRJz@-Ar0;T}Y}4yIoGY+|gKi>6;c$30d&$ z+Lmb~A1T4i`-Y@%7TEGuVmEUR!ubsD-dtvTCK)o+7|tZ&G?1+g4eDes-54t6O6Mpo zvU_@I@|G_g_d={~a{0mf&g2UxUpRI0`Eft4IC*tvWo>El0_PYf=e8)dx572bUh+FD zn|mj>hAZROugy)mF_Pe~i#W8-kaF_*QjeX zn|$Gg{tKtiym0EPr~cyfsc~hNnVjRG&kod47kx~vKiFL(edXE`hx*q0XBX}FckpHE z(AVbD$<5{6lkbapxqu z;)~-~r>|Zr)A0PsQ{z)^Pnn#vI0fCY`W$)2);7OoOck@mIr9EaezTNQPw|^fUW%)( z&-A~kyQZ(NlQeXF@+Hs!rE?Pl06%xmJ^w9EgX`;!0l!ZkeMDw+9f0a@?7!b%c=GtC`t$QXaAI`9cGmtNqQD)lWa7Py%nr>XXMmiA)^&=i>f*YYbOk+a;=37xw=+Hn;!xn^ux?YJGA4;bMPj z|No^iMr}{pjSH%MXkcppH+%irCy(DorGE1GLru*mv`%$gljHrXEDpLhwr#-Lll>nt zkN2NEdf30d3iwTH4Kj;`W>RykoI(B zhVj*9HdMx{rl*XpKWDfyCv$?=YXWZ+u~#z;u$;~Jg)FLJ_%)(G#(btF_vCPn;+lKV>i6I$07=;Y4Bf#tNnj{tQ!2h zyUK)U78dsZ7!mJUYmiVHkj(Px^U3FE_4Zf4iZyop?6I8}h3Zp=5;iA-(qI4VANExC zmUe}s^e?qGEXT?!1AX%Nw-~&=U)IN0R`>r=JqONP>f8r-Q$S6Sa!<1Z$S9qfg7FfEnru zJxVE?XIAko(KaK5jPVkOZ`b$VbM$hY$I>NAF}mhfY2EtSSoXA#8u$foKppv8HN#H5 zzsKq*F{XL+o;?219)#jO@Ig4V!v<$#@BgDP_@o%3ETBT<324GE8S##&gzR$^I{t5K z;y{qs9e=AH?TUKb6V7jzy_L7nfy-5+V}(iEt7{?{3)+*=6J^FJOR%~Bp3e76%{9N*`ZzuH_rt~q<3{0uBEZ<Y-$@cdKW7C7g-*-)Ok*ZqajspzA5j4OC9;2As_IxC)hMt}f8kQ4Y6gJl@}*fGUAb#x zn&KiVmEh9_0X0PQ5R_|proByNeU}#=qyVnH9%**o0xhnRXT@S zBjLnZ$r%HaeC(obv6kPl(?d{N+5bJDB`;L+h=ha$kz09zso=^V-(_LkYcF3DYa9xp!)`E_H8>S&~L=D%J)q zWxCgBqkE=aOG2p>VB~gF-Kus_+1__ygb9PnfDwlS7=7L{3e5i1+f+q#LKWuNs3Eaj*M-q}rNnnE&}}!o2wYb*E2~_8`L& zhD{=N!75GXVCFZ zDL;#!Jq)#IiLhvvhfQbLVN{&j(33K1=tVbN`fQ6{W~@opw8f?JiuOfMQ~KuC;0=uB zDDoOka0KnGSd@z1J4g1#N%Kiv@{X-f%52&{8^3JyS8Ez&S~sf^1z3>OFEh$cdbs{s z;l}{9{gpwG;QoDCmLLU-u$on@drl%%L~eyqI!K~whv*%0Q{dp!w?U5|?G2#PjI1nv zXCGG<7wi5#m>ljQg4Cav4GN@KTitLv8ZhG|ePl8pIs=pIQ$CQhR^qLVfz~7=-(|SQ zaQ~lRVuHBgQx4)9Wm;47foH4$C_Hcl9^}f$~8F3}ylx?AMPLKtJ6xs{jI{-TW3B=tP zvwJosRW_qlicWHwH+r=J4_D=A|;7a10nI+Q2<|m z764yw^dJshR{-FGvV7RCC`hONnB@}EpJpT0?I0?5IEAZeQLI+LV}?6%##g$r6-M|> zg-S*!TLis;sHkE^YtzWc;<3yXI+Ne8=OxtdXcL2$Ge43;Q)&{qNO2FY!=tspIbRyPr#k-0=+tT>xm{B^`*(U%^r4}&LZ#mr&To4Y z=f6n)I|VR>T+Z*N?HzsbsjcmhF|WJHse@$?33+qHy-hLI7lB7_gV{-0l?v4 z5IIWY#`H)DY)mL#T|gNO?56sN25mvqra2qjr-2(`m|@MTsKqF%-J-4L#vE(N7mc0S z5=&$7^U>V{r0x!ZJD43?r@c~6pM2{t0QYba_unSrE&@Msv6=}zosCsoNLjNimO}b< z2jw^CZ6*J-MCBs!BB={&V@{Qv>oAToR+xdw+6euU*zmji3pvlR*M43!-imdS&g@q#jy91%cOs$s*?-cv02|si{Z2+e!{;6}mT7mYWuOcnZ zY)_)SHpDfH9Pk~m2{4laEw{|rmuT1$jYNrz8X8;>S}c`!Ytjpf%ex zLCi=PO0aQBy*-O!jM{_z@%Zh;DKOhvlTD3R4hb(T*l*V>y$fWW1`p6ppovjfJEf}G z)85i{K@~NYWL$wJWR4jT;_lHzh#(CVz^s)_PDuudWxnq-IwH9~eb0ZbNS+*`Nt@G> z%XK1*FF7>%9bGw49Gpq8V0-*HI`vmIybdCAxGWkz15KI3JJp}~3Y?r+3<(5ZIj*Vc z@&EHY-`&EqEk6IjqP@`b?^LXJY%FMMY`z>np*6z%mx&Eq@(+fjt=jNsDA|!~zf#9e z0R3Y{3My3&{ZbT+#cA+8;wmP{xMc58g5Ks9T0WK8OF#Kc$>vr}WOK~)JJPwt*YGg& znc?O;P3j?_o)O3^CLS`c4|N>P%y2(f{}d8RgV!scbQ)5;y6xtA5aol#*VVbyv14C4 z^^N-~TotfAp&62cCKpf*QH}Bp%fcUN`$Skq4S23=U5d(4P_@<3c#3}ez93>_V;+9h zgnfNAzgCT}V75&EPyRVSPA5C&Rl`9LMUr!ru|`z<`BPS}{oBhu4NhIz?1A3<2|8BX zs7T4p(436Cy5Ny1JWlr~LNAgTL^i=NpyFr(X|SEipKs4T;fGlZnGCO5^1ALa|JkV0 zx6cs_)usOSi=4{aWCK6Nv_1JUgrdQ6y)paiid38H5`Kkhb`X{HJ(0s#idHCz|3^Mx zZqa~btP0SmtXSHQ=1V}2L8zriEj9PhFaq)bSa$gFroq!mQ(>&!05)Xs8j|oQ{6sOU<+I!fMj@ zg}MVWG`?uU1#Sx6{f3RzuLvHUzKqFQ%1Y4B@HxbU* zZb(aMW%AV8aG5r24$3KJd6#S!8-HkbDg{IeYS{~k8p2R=4yfZ#Fi}jn(CN>a}8w#qTu=!Bt#p(8NS!kY~6Y3}+*V;4NEq+TD#aREAKA$LC`<# z`qHd09PdE4*K@S}R--Y0VXG+^ctF#oK*4x#pL1S*9bHVr$iSPAZv~1x8U#re}=>x`J${jTR2t#lp0ckt5E%6rA-y_Wfv?d|I zfn&EVWn1+wml6A>0td(DERG{EhgcnJw!*}+tgUh5uflu30&D)b@|VZhO*_@uz%=H@ z4k(CUhdmqLbEJdDp?k3m4&JCvnO{0GF@Oyy>>!;*@b!I#^|j%3E-!{o7s`*mxZZxN z84)LIMFK`0TM~l|;WRBttM`RH**H2!Sjy!2)EOgPpN1T^MA%7VKHHqb$w}$8Xx2}O zmHg0eqTJE3h~j)qDyMZvTa6&1ZKmIjMXV~&Bv8p{L$nZ?vV4-{o-cb9bqg$LGMg)htAem)LA{8>mK=#zo&Mt%|D&wFSNtaUFGZbfwk);wltFvYoeOCVC}S_Zn7Ml<{Z8-|Mm3HgWMo zU(o>UE9q?!EoB}ZEPQ6>%`GJ9Z6#eRa8?RB;yk;%jK`*WZ1CwXG#TDCbTY@Rj&_v}jPx@^ zb9vg--_qOkB6=<3&JWJL`PDZkf7n2s7($t+s-Ll&LhudQunYeT2tr6}zVlE5^EyWq z?_yx=`h*0Y+hKB@6pY?@IGGNndIVu2$zz|4>5&a!yF>T@lWZ!ztVLq5qk(KK{+t$!jr z1$>$nfuA7oUa@}BVS3=xQ95j);E`>_v9YCnC;dCs3>1O9Bo=AM4vqO&inbFBSC+$s zlBlicGb+0G;{W{c#dBw2H}9^!c>6?|sMixYkp-aa;}`+4W7NxJ*Q<{cn1K|MU|Znf zPX7laP$I7QO=J)IS2Fz%$0peDAML&ghyQr@O%n`d6np9?hdyXs6L#4lK4+Vv%5@0D z6shA*rlALN!}^y9)DcA(`XG};2?@u>x`gmV*t981mAHlFU>I7Qzf)T>7liG~Eme8e zG?XUk>V#ErA&eq*?^yk&loXO*>B=Dcf-51a7Shy>*0o3HT2c>uT<*^lzEcZ067Lat zK;z$To?vJ`$+4+xTZ{|6$Vzd#Ru<1DREa$GV2KDI;hIEz$EAdWF@YvsR7ck7!oxNA zyq4XBU|Fkw4Cn7eM2*^pU0RXjR=Y6;(O7(9Trc6>z+ffMGegEo1S#UcKsBj($JxO_ zi^UJ2yM`ML?+_8l@f@zTYYLd6nwRM~0Yi#IWhg=-H`ym^t5J(t<=Po8?Xb}aYff@- zLSzF^f}_Rd+0)iy^`{9x%t{$t5G<-;aWoCGtcjbET(YaKqOIN4HnY<5A2~$Si_8Pz`R}lLOXeYk!RG%khJ_x3^U}?qQ3ft zcCIoz95`8M$^BM9 z5CrMdUzoK3HpaQLfes8x8+?Crken|AiEoXAJF9DQ?(h+7ndb%!d=p);uPDM%MD?DM zV;Ix~H19w?r2w?q^ehr%=;(QCOO#$&p`RGPsk!lR_M+Qa5#ep4KN$LZr+J z1#+5gKeAQft+dXFMWSa(X{?@R-BG%$BZqT1W2J?@h(23286)04cyFg3xYVkBT{ZT3 zx)9PtNAqoIIhw}Pv$dFn%rCA3h6ZTwZ;AJRplE~rhr4;T5A2?!PrIHYBDWOCc3l!p zHN^o5UjK}733f>S2}3!VG3t~IWJnB_ZPudjnj4Oh8jooD@J5>G&OHrlyWFAMmw!c& zH+(_mlYKXg{3b^|hifs;l$HiEsOKEnI*~U&JgZwFXe}XTeXPWpMHq@wjWpPN%t|C? zwO`r~7UK?&dZ5YV&^e6>?8qDjS{3*s6No*C+{}5{QhxFb23YmU2oe)X$_UAz{|<9U zPUM{jJA?yk zVrGH!e4IiJA-T{~n<&&0(@JUC#MX+O7Uy@~QGz)El2EHq&nle6_^=8wvLlDh!I2IN z!~vQD-EvS*+XRcd+|0|t|D0U5BYsop%1Df_I$M1hK%+6U&PLSlz=A>Z=20@*13ryu zH_5>^O3^!I{i~xkifw?^{~vHRLXBIK4oR`hNNbzWsUCA?ryw@D9U@{iutK0{S?o*d z7HZ3(5iqS@6#%q7(FlL(j(%x0Imb>jO-%8jNCt3WOyI$^MW~O`nisd$N)$??nM5aB z&}4?fhi2`v=bs*hQif=)b%lvkaU!;ehX#w-?g2Lsi5O9nE;+%j30roc3K_93j7C}b zz>{yFHY^02jVst?P^c5+gjoY5(f!G;Z57!{U#J}yqRzph$P?=32#zx*G zBxbZNd1+hf+9mX^bbw4cH>K z!Uh_k`}O{SZvCXP4+K{fWbbpCX`7wH!vw@V?AT?u@u85HlWHJ*)V7;SGo_Hpb(7tG zT3?bQ`)X4Lr_b%KeL4cxhCl|#ye1c|Ey&Y6w6UwU>a{QjZ8{-e`(iam=B(8;dP~8r zB!rsk5uR9U`>?oMO=N@Z1vSZxK=it{@{Z6;^`S@>*5Fgbg8xvt;NL11RDxK{al;bb zo}MF02opst;8?^Y9$#aYjgJ*>?7kY%N%u)fv@ z<-r{>y8@0>OlVs6xj=j+UHMxXHAJL9Opsazj!}w1Tv@z!PXdLM!ZKue$gIMQxUV=H zWM(U)!w5KK?<~V8K*)a1C8;t9cz8wC!={y0yhoX7;)s%4@@o@*f%#w)o5$|jqK}zl z4*yfflm4)L?xKR5N+dxP00kALCN+=ivB0$CqZ&scf{ zymYRuI&4sgaPFUn6QASm^O^HkF9CMS)`H3cRC#3D`+%j!C}u%#x;0g`)z>}sHD_J6 zKwE$|_Gl=jw4=nTrB5vVXXM#!pbrpV>z{sM@QwQLzXp%IMtqn~eA3Z15vA|UJ$dx| z>w~%J8NF|Q8d?vQdL>#!4?>=3o;Awah(g7_UeIYa!)#1kwyE z6+EB3M!!d*9=W+&@n#lA)C8UBi8ZjT2I8LA)Mu!|;lK|7n6{mKhoFu~MGGyBSB;K# zC`EL|Sl6ohb32(qUav-dc$c~+(N$XStPS?QEf7aVE3leO587*D!sv`TXKsw$pmMs( zqRr-sb=ko3{M6~I*Sl?QR!BWZj8;XkErfu~xi&EuTdkzHHj6hrXl^1UbxIf1u!;IW zv?5B*Tl5cOE^)1ZW19b!jl#dpp=NWC&ecW19+19Vni-+@=I^_w-gD>0{`=Z?#$N7l zdm(myzw!+*jUErG$+ivPAxFPWZo<~g(_&?#riB%oo6)lnjYg_%S08=|$7bFYBPa`e z<+UhhEwCGKr>}huYM^KuCvdSVNG#N`@V5&>-U}@GqsLXivn}^!HHp=3AzErr*+h8a zHLByXn}(62&#eU)W<9ph`CfT9KKbhH^($-h+ry1JFYRpIc)hPfm;bz|MVee9;N{Nk zbHn*JIMJ|t;@lEWS?;#+AG*@v#5unN<;1z|y#)oK?(jse1byM8^No;A9^s+iKB0%+OC1e~RUV?*-j9SHFs}-x&SAsw!m<}uxTdJ;2y&HO#uH=07H;CS29N$MC}>-(m>ckDNX*w@rneKPn8LT;9eD61$YI!A5O;A zfi&{YcL!51KY9G$XTV=f7Rt^OxvQ&pcCyq!n{)=39ArAMTP`Ya*)6gEOFG@?*H@ie zSQFu>jMQnTB%YvqCu9sK>IN~)W0jG`-`zwmUt0+<$IVI?Jo?g=0-kHjc1?2Ej-!9f$XH$grRIAOIYGA?9$|GbqydwpGAt@JU)l3Y~xE{mIc|BdPmGMV_$$%LiZwv&k-)>WG5R8A*f5`2^U{XWdv7v#T_#w)$!cuDZej718i-rvmT#YXW%|kE|8{e5asNj%mo52#?T)@2sk+)k zLY@t*?MOF^0^;D?YtP-+fnhQ=X|iYw`xp!P@Hjtf;OVTXRV4O7c?Zc(ps)nchr28G z-#bH<{{Q;x-*8{m?iO))BC|pG(;H4-rmyRJi)%|`V>-7#ltVc^$C8o0u5PDq%S-va z&Vk-LJuX6^w*GSd-h3*>1+BZ9qc=21qsPc&YW(-hXr6h}Qq%CH!xWJ#}k9J+$nSA}ER_`$_+Q{p15xmC<4Wa=;{&`^zCL54{87gF&`Z*e3h*Ns{9sBR%85*}+% zWm+wCd}np*4J<)#K!bLqytTNC?M>+L2h#QxBxH>%%Cj__6on#)j@tqwtJj-(QCIl@ zid5$&{FjbI`1-w#`ExI`ssHzzW{{#YP6DfEJ~Y>@>OmD#1c+3(D&%ShsMAhqTlW(- zEOa)pLD!9blwoNei;XTF>WYa_cYayfo-#`LLZ6#sWPd#~n9HU%UqK&Y9oi#{QCdRT zXn(~=y>wzhA;b1XxXi0rs-qx6~-t3xV zy#dk;M1CR*R)ezMw#8m2$(@=rV4!45`UVb0%HNSf^J#rQpWSlGl< z2N`aoR^AWqYqRoG2Kt@KxiKbYr=A}nIg^=Nd(EUp{qq;5Q{p1;O8M)FjN;w_<<_C@ z40H||6yeEl8d->)LrNjgg4l4cRElxEXfDJ3F;Qrpn>lM>RVmn_a_}0n(~U)5!xH-( zSf_Xwv}kYJgou-O)PLEe=!1srgZHdMpg+7`*^<=mr@v5|Xb_LBRvqK)e@C`mI5}Nj zNY{jMhm9=z9D3E4>s4G%-;5yb*1d&`uMVbOIzRaKx4+$=nB!2jnae){yfWb z^U{wxkfp=zP__B~IDP%neT#~@Xfa=Km>=)88}lLNzdlyv>JJvj=KLS@gvY<)Y}Dh2 zaYLQQG3BF>#xqh{={9%y)PF*wPv0FPpQiNsx?X zU}`;3?kjrotN6!LgY^&k7?${mR0)8{UG@B@)tsxy87iIKn3tR}M*3CIh8-winbt0I zPE~psIMCz_M!8`(YdeFT-3{^`K4w~cRj0&p(-l+g$!d)w5~MZqqcw{>r9`}*%7Kcu zNxNG0&Ru7-kwE#Luu0bjHXG9~FL#x=?T(kZcpwq^z)_Dm8>O;6&1W_ChKOT4TG1ss zv_xrd<`pM=rae>(q`AiXSGgfJxatf>`S|C$iIAI4f?!tH*d;yP)v;izB7i3;FQWr_ zZywQd^~SUo7N58+BR-Yv(lWN?;J_7jY0g9;i0srU^wjg(i8x2J1_+ zdvnMUJ+8FX2<9NJkF+56%LGK{60uuat~LW~AOmj?sOD?bC`}vJW}iERcR5(geOKLy zF^8izeezuLpc+yo(RN+2@pNEEgVlANhG3g|5=coRe9}R2lhPgTywxW&!A5pPtI{mn zU9ilcK}&yfVYLt4`;uLc*RO6R;vr|pBSquYnyRyLZQJmVgb)Pp9sU~o%QUFL21fhf zTfa$=w;YOYPyE&?;_BAM`bYhR*V~Mn_HNuOc|;NwZ0y3co!E3t!j!rh2d<8{}NuNWs6MF^&@{U#f(cPhLW5*6*x?*$i|n&s7|!zg;LXe1YwKGpd&`4`WiqVke3U#AQtx8)7Ep5B`in-ltk)vwCQo^f8XP|N z&BVi8fV;818H~Huh{vhWsYkLk=su0j8g~w8u$p#8MY_Lx=5}nbGrCi4dlNd603h6d z2Ko!4bM485&biufZSRcMPng5Th)=Ux)#;d1aoi@Rw3}*@6Rk)I^pSwLnH3JHqge(W z)hUdO_1N0TG>=pNY9gPW#lJ$k=L)elTu{`0$6 zx4NbOuxrY$3juI@gf6C*e)kb`!B4S_fCdV-?+`%F?zKFyo$H-*s+kJ`t5}9Lxx|hO&3?0WneshMVO z&$hs*keoC3bwwk>qbyM)(H=I9bFG?4mRNLMeH1P!UY4KodRqBgt@0tm$xHTA*EjVw z+>6_l$;fKYw`!}OZ%LYs<3$?dAL#4O{9gaI&4T%&MIj$<+6{WQ7mf%bX9^jGlfAUJ z*9f5LvAsRBxe&;AQJOz(UWj;=Sf@^vuWsRm%mS~?ox!_PI%(A6iSm9U;Xe8pYnT?d z9x{puI`{wMdu6NC40@oW*)W&J0VCPb-nI(|Z|}4!)C=f)$E8*+=7f?>_6d$kce&i& zYu8qu8CLMopG4yDqKTF$;I?!aaLSz_GvY`XlNu35pv(&mezj(^aj(@#Iz$Ez`?*7v zs%9AYa5`Ff z_`SWQ2ssBS_^1v5OVP6KB>_-$@%y)17~s4Z=^5AECb`gXkL4y!@r{Z@^^(fAFlx~f zH2H#*8fJpTymTTWN^*OX)7?^#-)cK{KR1RTHRlNOJTQ{VxPq;dMU%gqnBoO94Vdg8 zD>GKvq&%HF7ZE9B-A~U*XK6tyJUV-9>BX}o)_?Jg8-=ic&q*YT%-&O=%l4_!@0>Btf)N27{sl z^jDNh-meCL~oawuzGG+47`9>tNc($14(UD))0unk9w04KJ^tZBNFVg((A$ z(PHw`x49|OFCM@P;bz5|<=t23Nz*WqzFgUwUs9fo{?)Cey>(OLN_uafk!+GcR2uPqxw@*=kqxt2Mu|kn3(=VE!F2<3Z<)7EygIy!;;H=5T!zA5Ay5Wt0r7KJt4gRjMETJ z68Y>yy2qHdh6AN4nGlyl!ej2U#{*gMJu$^ihfIO&>e6(9eC!*NR>fSs>~Gl3Z<31#_w9r-2CZo7=vqPrjLiiBhbgRX?m9@^cwsj#UdBJ1@Ycn@#EI6m9UTBTOqsJmo+(XYDQr<#w?l8=W~@y&@JLisQ*#_?EFbCZFrID z@-P{14pV)6=bvN8;5c?3$|$Tkhp5nwYOSo~zS4=#Ry|RuM#qXrFOCbP8q){C{y?$Z zPsk%@B)h!5_jkw$y*TlcqSQ==dzSLC5B_iU)s4;Dbr=Jo=LluaOA!O zg{+Su!$MBa^cAMDZl~@!_CM_F>^&!Fxo~uPT*rHnKNR?4!5r05tXM_?YEZg{?YyA3 zh$=v6hvQau>rHhEsRd$G@@jd)JVHs~%_|#R?3{uH>5_&ey&zvjE|UX>-_cer&dD#8 zh%}<*RMeqkazUx0rlmI))^w!aq!V7LP4A7}FcH038E)-u8!UQbliiqRYajmjhmF|o znq6Hrmmn`K@6NBS@3e@#qq=uA9T#QV zmhan$8?b9xqmc6F3R!V(>I_b*Etq*x3$eqcJ&kF+=>DK06t*UDBwoBUC!orxzq)*X zBxF%tmf}Tl0*etDQJq3W165>VKb=~0#}QzaK1OLyHdjU<+j0A60~_)s7#>&eD1GGa z^3n)wMs&dE^Nj`B3*(aTvAIWVuf1`byELmack^}`n4c%Kp8Y$Xx|1m(j`WRFikND{n!`N6A=x@cmghB}*X$8amu^$BFMXjCtt8_MSY%Cd{%x8n#6IK1h;Mf?F zZSo|$&}dzUxkrV$pe2FNQz&qlf`Q$QkWACN#EP zjmxQ*sAd=gA4)q#<6>Vc6v@K#bP4*jo#^Ksk#;d%n1g>xD6QH2?YeMYsaMGB*`nn; zrEF)tuXXy_@6O)1_L9`G%WB)aDP?1tk0Z7jq%?z}ctcVqX*7l~KV@yIObM16`N^g{ z|K{Wcn-q?qY>^OR_uLQ2*>>+u&bi!OUSEFjLju9aWP{;^e$0cPYjw3e7QRE2S40T# zx89swdJ~Gm-uJW#KltXG&!2kp`EMBD#zNR~o2evpQU6LX7Q9~7}I7Ml#7x5fQKvb&iOdGuK{>)=N^I^-X9 z|7e#RR(aQ+wN2kU-EI0i&&o7s>{uBl?35TS%1n{+eaFgH$RXWYsPk4Ix5)1~;?^Yx z$gnbV<*Kry3L0W^PCHLs-g?_oVPG0}mxt%hO8Xwz6?p^O{3+*J-v;h72bmpF(W`s( zJRu+!5wfkD5qZyQN;Koi{SP_hUb2Pc zwb#{`W~#4whIz#w0g5hIRJyu&x7hWO~mJ(DA)< zDEyE6>aVCo;w9;Z#6 zj&UYru9QP4h6rVLt7d9Z+8S(EtqXYbMiTDtE^q39+BuRe%X>9|n*VxWhYh&OD^Fo0 zQK)@e`7Sj^FTultoM>7T5*mbDL?7xvSDKe#L0&^MUUJ>)J~h#wEP#|u5&j})_&2Lx z7fljCKd>jcYH1DeMnNbV(g%yxV5;+;&5mZdzS&Q0v8qnvrB9`s&enuGBis5YoBHP5 zOV5A9mhI-IL8&(LO^|ZWpAOpF`589z&6nm{O{DF-K?57}_t}OkyQ^I|pRquA9#^(E zH;IKy9GN-$St5zy96C%eOP zAUWU@wsj>-xMX0P+;>F%@*Zac%Et0l++reD$x*+zzB|DF7CYYmA+y3CH&@7dVg`cx z5MKY~8<%EpUYVm)Ls zG(>qc5(4T9_?)n#KSkL4!U{<&-Wwmom%ggYE*`oDu4y$FFV0oDO#ss%>%vTeu%w75 zQ%7ZfaWRj02l*!3ny6(1v=cdvR8b8fqK2iImehvnE=5}rWje1k5hIdzh@aNKGISeJ za_XjwyjT@Zgq9Ws)XhAOqUA5jkh{j*aTGS7g&mzwP_4sqhm3n(nnO~Cuv!H4il5j& zW}348`-|3jRgun=OT@OBbu(O`Zgr9=prjQE@*&)Ar53UH0mKHS6_KZy!se8w5wPo(CmTY@#2T3(tl-h^H>nsm9 z%XGBoxji2iZnC+8l5Lj>O^&1wvS}EL0R;(?`K8c+pxJJ{X{ggNB-YTi*-FK5i@)R& zra)Hfj6YflOsHVr-p2A!>FiQ=-m$U6lJmw?q5&xJ2+>FHET&cok+Y?Um=(3qt;II! z%lVjC%S6gv$Q_9}(Yh(ptq|}o|vdU20 zoP%^*UN37O9t(*L{uzHpd{&dPd*2%cE5_&aBf6vuz5*+ z%E{`c_Evc6&2lbJ(zD^E2Iav`47f>&syDPvY8v~*=$i5p8S zs~L&snraE{m2_a0mSM3^(xslUEjf=PUh^y)Y_KY+Xz#__4bk#-TGh5JguS9HrqVuR ztFEMUv`a%TV@q@6^%vG$7+e>&T2eaab|W_AOcGx!T5O7=pDzuep%sD;o|-u!OaN>; zIXef)n8NggR7J3ENF2iQbtZqEDtj0Z8WS$m^W9dR;SG+UzBH@{T{uL24+`MsrEPN= zFtg4+%kJkJE>W=$b7HzW(%;_N=5kN9@|OLjt$IVX5iD&JD7k_Va(fzrKHjJUZMp~* z!Pyp~zfZTnzqiKSRsNYEKRZ@hr14Q4W*bYKw>;Z888?D#X!`fJI%#OpS$^ zx9;v1_pS7k-&OR(++wWtC|_#!r`vehWJqp9`aFzi4!I!Za5n>QBLk6VJ2WD}3IEbK_&Wb#Xk93o}eB9;A68`f=L?A4(D$fN<`5RI&f^;s)XtSzFD zA(Jz1MP?{|Z7wDMvekzIu}N7#(u6~1Ic}kz{3XLm$xh90{9AAz~XNPLW0+O=7zhd z{68gAS0kI3_z1ejNSZ6z*B*a3Z%3EVBd`&?cgfaFkhR_J%g&qY}2hh|=KE^M1pdb?_vQ+AgWo5bljePOeiKS;(5 z<$F`9YK*QcJ3fFjesN4yM&yZuTagw-m*k1sSXk=jVZ{Use0$&GfqvYp{ML!$*$`QI zAMTk3;WHmK8oQygx?sU#Rx|?pB`3Y*9*xxPz-P0*_k9u0q+=aj#T#-|Dt|?qIw#50 zEASkxJt&7`k+ucylFX94`;CIevNv*aE#WB%L0UBgRB}wRnlPGox6k+hvz0(t$!eKv z4NGZ8f>b$9hOXNzZHmy4xr|@G)ykX+X~jk6?Dhy$Rm1E-6XWa%+q+yCK`+G~Sny5A zUuyj1fxQw^xO*oCS^6LuwyT>4Ysy;imq_-HZ01=#ryDM9 zW$YBv)DfzV>RnS;pt}>LN#b#t6bjca+8}j;9r$F4b)TuCrBx7~C0Y59R@)??yOv~@ z$iqFlPR)6!w`tle!lVW}YgW0VJLW5-t-5<>XL_uVUoMu{`IkeJaQ$!IXY@-@oT2R4DBXMNl>Y>)2*Gj{p{Ci_^sCmbOT26 zvG@p>`7FKfs@CX#^igtcmBE+!LC(R2$X_U(38lN%`>K3eCZ-xr2rmEH@vy5%gRi&B zyU-QxsZ1*xCY2Gul@Y4p5Gc;e;e5NlL9y!e&FvzEGVmrXP>rAa|LCf4z2Aib_>F2< zdh}cPxz>y&`0<{mFhv7d!643sr#HZj#7z=nxBwcI?cTx z)rwKp*HN30CmP@?7ztlob~ddIDDrqQ>U43VGLitp(XZKMuU{9=$R3Ikissv$k`q)Vc&mq?yB(O1CjS%&^uQ`W9uwU|!o^q zMIpm1MXfFw`bfn=4z|=YAtE#%Rr-djNOVOO!qfo<^Op6FA=R6}r#j;eQn{!gf7d$N z4Pf$wRMR5j=i-mj6D4^#5P@EPfFhuiWdf+=cOebx>!-iKkSs>xS>A_=*~@*2yiwJm zav2U26n|?qm^x^1EvFf4P9;4en@&h-ul4{K@UD$gJvnSaY~7iecQ<-zboon~;F=;C zT9@@qq@?J-2}%}Dg_Na&<>djXKYEaxd1}e=-o#wWN^QhOWCJTQ1+VKO+jHcjD zl*g4PYTAP&hvzhvn8PRTO7%9(l%~@#`k57mnqvEn7XUo0n#hgO+JqY3fi5uB^*AXo zP`)O;nYxLz8IP2i#s%9KI6>4EnhXRW(pe~ zq(pISLs}#z$VMiI_qBY48JhlN)1M^eRv2zAEmBbpA6nB7z1Ou!meQLmRx!6y%1JQa zc+5OL{-77JQyg)`{dM8uRH9;epp*(xsdv3T8C|Go>~UTECXO>D5?h2iCS+&TvQW!# zRLmiUbd`%1Z6~?x)K$}7Ym&*sRm&kX)B)gfAy+EU@I@z-5HJW=ShMgufu2q6UsWr* zk!2O|ZeACMOBUbLP*bS@DRw43_Ty9>gC_>vtDJSK4iglO#-PL9B56}CAp~*K< zsvuw%C>?^S8{Elzw?}UM&pz(on&t+m8KX=(|C6e@SPeh=btM`Jkx5smO~?Ih*~ETa zgF3V#-7`(f5&fyfN5;!Cd?bX`l?NMK9Km=sPZF^u;%<+$-}KQ~^GSL#v{2Yfg_I3r zlJ;hGj+A9<%zf1=^RcnGHC&!tUcb{{B7+PQ1De#{b`Z;kTky_ha`Gr`uJ&f&BwYy+ zn1Jy^UYz?p~XnyCl2>vPH7e<&qo;)a()@67m_Y-#@OG zc(u3^!&N*psXO|E5v_GgIB0SzD+kpl#FpINA*#wOVU8fIqBN4t@>;$YD7THf`&nq| z8P~{`O1{LswRK`R)HP@C1f0u+k@!8Nw~j!sc2VN%2bVBJ3hv)3wX?go5ZfwL{A^Q7 zd`deS>%7RS26S=yQa9ymkX0s4mJ%a_btVThw^U{cu%4u-uzyY+;Nv#`y;92|kbRJD zQc!G#PiEx=PcPF8YR=u*|L-#|_dopwlJG|Jqj67L( zSa{skFI~HFb+9zQJO52>SrG%C@2vgR^46XH#2&|$RtRP8uOpcs@BbNR3@OEoMLlHQ zZ8WYwg5OvqOv0r#d1)_xcc$hr?VVJ`4jqU4IbUx^@K!8EXKO2_)R=w8erwvZzg7l; z!2i+mEX>o}6hF>)3%L>$EK*$Y?*50mrHgIZodjJu53Bm;G%YBpChAt{LtNC=^fZ#U zRHi;}IdA1N&@D&&RwmjaD+%{7={c21zlW9I>dxiTKhp?-*g*Kb9JdT>@1Nn~i9WH8CY&yEOYn)X2nEv= zf0hj)cEz}fE-}S`$tgx#POnH4W(XQiij(74T_+aeu&W|7g!68*OXX*d4JZ3Sn%lNF zFNbtA9@yZTaGk~zd$`#*qT4p=;o<=hYaLipOoprdd<3Y5T}T9t^LP!Mv^)cGgZ82u zbqp&a4Z(uY#nQI_E;%SHR?me3FR78RjclmKYRw?P(xppw3#Y%c^>F^4meorf+d~4bayK|mi?$-g ztJm8Jr?N!OyCic72G@Ocfp8O3VC^&3wVe{z&K{}x>81Nbk3*sIhZWYX5PWW3J?~%g z-zy_e=JHNsiR^xg-qAo7P#qv@ybD&Dw3FDKv{n+8K+Mq?*VlV;z!I{+XMM4OUhLIaa5OgXT97s>xcs0$_Uahie!M?+e#~tyW(6G|dyU+GmC!Uk zc6Chh%sbp}KI^&oVz$S}rt36;V^^$VQ0U6M%lY6jvjC5eT~kw72vS<7(Sb~?)0YNtk6*kT~l0u{?FzwY;D81~0(87ImzGE)NLit)tc zfP!wZZCsQ|hpnY`y5AFSgAh618*b0<>d0hP6wdT-AKQ7oH{9Di;LXmKWm6iha#7b> z?AQ@Zvv)w>KhoZAq_{`&Y^az{43cR&ZxvWuBu`>Pb^>8~Eh2y$qpP-zy9b>~ z8_PQFs*_Xf`t6h#*E}x6}>cf zq{5eHZVtGwbuf4SvdTZ+8Y-Q>Tno5G8 z4B_%M0NlECV|Mx)R-Q&fD_iSJx!lXIPMyErz*m2gna{=9YnAER>RoyD`mFB3pm!!n zvR(1&R%pm-t-rCoqhzZCI|8J2P_4Q1b2pjVMzuyTebn5Y-`(3ORj*&48r-`2T0PC% z+l&44*e>raFIu0h$m~dwTeGkE>l;t$^7hdC8>OG#)9oQNlwL-K*9>i%Lt`+U7#t4n z-{A}&emTxUX(FE16Pvdv`P2#9u6i+de)g5wxf?g9K*+`vi;O`A9KSn}!kT+^dgk;C zM_VMaVxN9t5RKcw80^g8%7q)}r})_-bk*e)VP0y;wMmGrJb395Y4?zYU|aEd#bx>Q zvq;48#7#3{s>lA(6rfYJMngwypbfYdUPbYsM(fZ`665Ys4;&Z_GOF9ZeKy08T>?&@hCQZeU=v zYkjmjh-N0lDVt=!IuLW$MFsSJUBFIVgeA$9*e5-iPt1`R_HSKF5U6);Cb3V+mt4{B z+A>S4$7B#HsyqTf)8`hgLvo7n>%w4TaaM?N^fK7kHkbh5v?70A{`40wOY^&by!T(T zyP_%f$*`Z9lM65cS4S&ZkYN}OcI`5&5NZAB-`d8uQiHh4d5~kt)~9l4xU`Av`z{7> zZNJKg;gDj(77QS5w@BecHJe$0)a5V#Uu|di;^%SQ@!z%nieG63T4HVdlBC5BDYh)x zs%2S7a&Qo0S?wy)qFrgTFN#Fyh4Fb?KN>K9}_Pwk%Id zcvAR7BrYv8#n;2G5h!_R?@O6n&}g4d&#LMN$3Q#h3mLR3f6ifV3<~gLjF`?-WJ7bamz2`O8VSLI!qi4+1*WzgaE09yBs-efjK#@f2lQM~gx%<)}R-D%^;TW53?VE$|Y}S434fY?@T5@pOCI?I3VY8KA@% zI*OCX#aGavcw0_EZ@{cyJS489dqU2b9e+kyqg!*rwewSNT)MDyqI0xfDi3VqIn{jI zQV=*WA2ZjKThx(za7!>|bZvnm7DAD@c;<5)UU#QI2Os7umnb|td~xM+1mbG6UiNko z#odn;)28swlsh2;<@KvrR?Ovhej1|jyzXzX8G|m_Jf7_I)|=1%i4vg8&psX0Oew+e zR>)5y2y>w%qDeH2o^C1+FT_rrlD)H(lw|n+lFU8iK|zrRj8qq$!%Jiid^RF2Vlydu zg#a~8{I^tImKx^f|jwdZvRH<_VawW{D;8 z@E#_VyiDBF`Wn8emwL4QLl2P=JVE^gQ#Hw95latHv{S2@d$as36RY2)jm#RXt>%9* zm;?Nqz5JR|HWKXs4qA#%l0kH6`@l#|s({Qsp3n^@=%w%}`{KCm+yT|R@lKMNMUX|G zpe$~7!1geU0X)Xek$)zjN#TW{qyU8zTjk+GBu2MKXkQ4t$c@t9*C!~lj!kGfI;^gJ z0TK4A=_zlU^>dxufC3KcGguY!uiK?zS8yWpF?u!AtnPy(ZbMzvA(#|B``(!gn66=J zxfNhsc%QJ_4jG+cIW2sh?M6HRGtxqs4!(x5u^8S?VP;Jdg7!gQqC~|@F!}qdy4lUO zn!kPVh38*-{&@t8mQ>x(s;dn*(lt{6uKeQdmDkUoJBNyON7?tKj8UJCXJ3RlX8+OCFJ`+ROWyH8UQkAN!UqV>;3<_Ff$a)GxC2N|w|n zwxS08i8e#K&;Jb(=V;ZqBig=aXG+rAT8pIH?c9XBj!Drjzzm_+V#1P9m4XxGE=Yqh z8z(a|j$7-PDPrbGhdUN#2ud#i<|${m9cfODQ{B>-C%ev&q%lFaVN%+=I8plI@_ON^XZp5T_1gM zsB3!^!gzHlMN#S2y*VRYpI_sS;fZ&&7L} zcCYN;|2bbJ#qE(ednV?|U49Y=3tdnDw1t;ZXQZHE{foiI=GN@TJhdZD;#!1pbFG3{ak{yF2psK3#kK=Eq=#?$ zLZ=KThCafQhhV-(mtzlnT?wxP>=5SrsXe( zU9D_3&EP8S3D{zbYKv8gYBIihiCww;;jrDmv%{o{LTBNPuHd>^f@6MLKgKO~n^hh0 z)=>9Ygv^1a*TPk}r~sGPEV8%a_W8P-*~{P#tE@ZF>E_a%fhsNf%M^Nv#^h9WhpT_YHtMgJ+yoB|t zsz(JBmtN~8Ah7z-lc~!CP`bs)qAhJ^3?PM^LxBllZd+BtGSBGg z{g_0YV*p_-##V+O0Cj|AH#0>|1LGL3%za(dCwQ_2dfatW==QOUx;(!?u87N1gqcBa zf|=j8ElXw-o%O7}KjvUhNQ%(v{ecTxh&?KgErcb#d24QUhw?en(EMo0O$cfUYdGcV z&EW+BTW)7|NK3tjo9u`K5@nhXo;_AIaU{$=gmU+^&Uzc_pm!O|hCKfN!R%UpbA^7p zK4ZSdNQ%^i8ScRZFHm*%9dNB)F)6&N=X{n0MUUKAyyvJ;jFG-q&m9}H+kTk89{*-C zK11`8r0uQR;`Z_k5BrH?RA6rw-J?jnQ7nX#H$#;3+sX%)tny^Y4T6_ z#8QpBPoybv9|dJe`j5tGSx)}qW~yMW0vC%{HI@;aP>7CD8&@HC*)g3lm9Xb(KvXxsm_f}T-ACUbJSs)p6hG*E2vpeGr1Y^+#)m^5hnhGJAtH@xUjU2h2nF_Joodvl=R;qT^%TEfgt=;A^0}F0h zkK9-hQDzIup8d;KAu^Ye!x&YSb0tq%cJpPgZpbt};6ST)=%H&(AF3{c8u$K-{gfg~ zMlpjX=>2@`NKK035a18Wtus4H9(SC_F3?q|A_dl5tOFVq$b%;ARXtZ(M>oOUji+!u z7ir)rb7n65_`)>CgBDvB0B)99AxHYonU%{w*ZV;Ict%TUor@z`i!xc`!mI%&+Bc#U zVoIIN0qb$|tqijWwH9o^q^g9no1he2(IK#WJn?`rK#5h-m_X`}M(X+<2;}#Oi|ILl zUtR5$QobJ9InJ)9;~R-g>Y)ARI8j;Lmt8>CcF1&!Y3Er)m~?sfTB0!regX zKZMpaW-dg0teJL1vbcNpxzR)z330)tR80JAYm zx#&WOz_?0R%AsEBvxH6lF)gz`d!QRr^wVd1XdIr)uHrUD$Wo(utUx0~gnd!9oj?uA zD%2<{2GUfhqqV>tRwK&yhhDT*&o|8a=&i@a5Z7?M(nHyhdj0&X7v6c}?0Yl6P~L2x zLdteJ20h4{x}S8tlCnyJ#<3P`g6qRh=@Y9-5&s(1G9|~tl!g_#qFRc+&{Ysh_gh@L zc2KSBs4#8xGD7ykAa_K%k0Bngaie&sr>6;pllI5dmlaVj5@MT$$RXvkUBD(N&{^iZ zFz!t+K;o)aV$x3^J)AX=?Z>t;g_3-MnE+brS%@63;|QxKxGMF)ypl~0H#|}Xrlvqy z>dao#Tv=UTU)j62vbMjogYB`RLoU19t7|ujO*SPa$ynZay>CbM%?J}2Doe>>mrVX` zb3t0)6%z(tv06wZ|M3A9%)+AqZ)%4A zUQwB-hqSefs+rT^<$0Fr1sScz<18Jj@`wKRng0cR#3v;NM$!dq=*;vQu%k3a;4R8^ z+ji*S;r4Lf#o)z0bBhtn7ZKU50?|m0+l-FxOu!g&We^h(+8i0IvuHr}(++M0k?(-I@pKu zPe3PUwy}C+b86DAdppP#MWbxV!KaTU`g`d4*Nx3vEk3ffz}HNtX5bimBtEJ>7evja@@B%D(*xp~E(&Udl5f*6kiDxvh? zo%;38#@@}5nTcS1c1xJys%DG12IMLkhy^^}p4Gw}kuav0@j0B9VUH*RiZ6O<0bJPk)E(|v=rh(Gc)xT3RkdTA#n<0OEce1^MKIuiVu}H zma+vTe=m%u+`%K?xnY}xIh(4Rx-|>`s;{nLPd>uRddfpQ;ch4h5|Q}QrDWXAiN&9T zoZh!m%}+`v2r!~1F-jxwz^j?h)sDBQj_wg4l2b+zE^5@DKQwi#cca4QE1dCivc794 zx$w!xCm_4ZL_3aClQ{j;A~QFJNd;bQ#9YcndExm!hDr@mF^ZoHB2?D($6 zj(QXD)*>=FWZ_Gc49b;0z5sJsO1Q%OPY1Tpc%K7OQ;juoignBcGY_?Ai~iorT45B^ z(mV(ucy-a5tvruP%YT$#Xws8nchc*l&!xp!#>T31yV z#=Ch;GyeFU%3P^+pn|r^1!%qrnHU`jE3e$$IV=(F6EbD7r2;tM2@G)u$V9`g(s!y+ zbE}YC&%WN8b-fn87J9bAXy|*S&v+BX28tjC>a3N1!M&fWWaa7hlv5vKNPHeGXKjOr z!&TW()TCIie@|i1g^=$=8i?4nV#D7S5iasEojA|2*wd$}cR>`VBTjCbj;qt$keMj! zFy64OvB|y?gH1x#Wu~&L2`jA!3INpeQo-8KhaFXDYcCqy_AdjE|4+=%VnA=;jn2ocB~017zR zgJ=0BgQX18XG{D+LP_Zo&a4Ek*{yO2g8&fa$IuP0jo#bY0duvgvQHY3|R~-lZNFIDt`)Pp{LT5(jdY+cJx5Mx}ImMW_dY%k%kn5hPP|Nq%8}H zQtO{b7Omy#;YUTmq=)y}R4(i+2F1ecW+^+m@Uaoi-~v2ivQ8vo_prxl>;sliUODHJ zkJK~0HD147+2#Rj+m4EIo#0JjNRw-3Slk^NNfWI))yO!@H+GdA7xOfgso(EzZpA~m z3*UPw84ECHZ~Due1lK-hW@QgW1asHYz-4~^(gPj&UL>Sz6hrWb+vpk(xQ2C~1W*0+ z>XnPV)NNlZtJ$f~SqxL&6`WZ{jOo}r8M$CWEMT>^KG%>&Ne4+LNwPqtP+j4S_G?pV zrh-cApggsUxoD%-9}onO4=3j;rza#dLZtQ6qK+{X%*Ln}v@(C{ka^m%^2>$X1p)^&*dcfEm&5&u0^0W(!pQB4;G!$VSCIw?_x(~)MGeNEbm7f+POKbV^Csqn_N9svpG)kXbaJrFq8FxF5&vy z!XGL7tDjJo{Gw+LcV|S|c5ixRLIiuujO37)y{B+tY5q3aDt?egw#pf|I|em$@NBM( zFke$#oQ`=QP)mW2{h!pWvS2|u3G0${vT;B5{nGyYNx3)Y{IoJRAY@FbzTnTFEZ<)i zj}wb&R&^4qU4*9Rj`0jh-^O)H)W|5|-hB=+ytBPlw8P1LOu1w&ls8y>r}-MwXJ6t< zk4Byjtv<0-Imo1#m*8J~=e6@!ugqavKLe{zDJdOjH9N$kxY!FZ$>*z5V520a@OQ`# z{&=6t)M#RVO*W%`I@-A*_UBJlkJsOHi3!WlPKy&sYw@wV?JGa!a98{$dch~W&-FAi zX`l=HyZOqU=ew+X?eU&f6p)4-v3tBt0yEMk#_9?#*`eRVpfHavy^j{JZ|tt^Y-~{- zw|8$xo2VvM{qDoa*O$%sejqw#Xk2EFwDD~Gn&#BwfWcY_D941$Hm4)X%&aTi?94L* zBq;+trsWCUfuZdy>}f_dm_xX3vo|e-m){*)k+N{hV_K$J90`1_FAirHTyZiQsW6a0 zI^d`~1H-RN=SHb(uTMteIg}z(N2a0>9-BTfBjSF8hnV(CFu4dv>6K!9i zPvVs3pjZ4g40Exe3S)xdFLdr-28msa^vLA*`^g%JOOsGtY)g?3DOPm^5Z|vCgx5mC z9f;U2)<5NvYDML-(S#tRH+yxjE@R-p%mOfj@t6cJOs(8rl`y?`@6NuS-{o>3)&D3> zc|#AUglV9|u3f2JF&SdhAiH!1a@M(jgKufBK@+O7n;EG|SJ^3asV$RhX7-teN3KgP z6L-aKQTAMF?YC^HJXSMuyIiTb`*uFKtcn5YRpabYgAVNwGkJF_W=xOfTU; zPuWV}Titk#R9P&m9zfIHn094@zDE8VUnSjqb7gB40=P@Lu&xC9u)fl(b$)<+F4rhw z#VBUc{7y{M})J0a$7da!=3smpPqRdYS6aDA+zi2ov!{O`gC#kQUyVRFX<0d>hefAMK8g#Z3gqf`zk_+z?D!h>sB|Y=kJM{8ClxEn)%nsK z%jwY;`|ZzyizEZ&y*+vexys^QXuDpT4g%xT?W?8qyYWT89mMr>jaT0jt>S z5O3TI?3*DfM5D{B)qi`0COMXH+qk<7GMIwQr{e)qaAgE-2FAVdZes@H^<$Mu9n`}N zJRX#io%e&q=^h!xPZ#?poH5O02lSLYSc1U`ayoe8)0jQDAGi#$hNGGOx2OUMiPoU} z`r2#xM+>n?Tn(cdK$qkR@DFmfY?g=D(`med-KzlyzV|(epy|^aC zke>;gE+U{_cwrt(s3sFsET{UrM>BnY@qq8K))5@W*h84)FK2r^ ziw3XAGB2u|5qWHfw{)h)Qol|X=S0&1o#eZjD*@Xmbf+uXRPJ-VF%1h$%FM>JJT@()p6J$GmLc$G_&PwfsW1l8%j1H5{X=m&f6U`fB!ZUAkwa-q7g@I@C%pSWe1wCaYC3obH zNI6eitYon88s!pkRmm4{Q&?A%()DQ;Xi60k-V%x4Qp1r{zV+;ndI6Ff#@ZN-q~N5M bZ7Y7faxt+0>DCrDv3mv>mn7y% z;$s%GnmsW{VieaA1`rqsf^4!(07oT@CUM_l+~b!2_gBlkw|jb!JWt;L`@a2|JHK0X zt4>v&sycP5>fE}2K6Jku68!G`Kq7H0_{}2{i68BoNW623d=rU_&rT!`2QLAS0vo_j zg4cp4fH#Auf}6mPg0F!mg9i>tB#s9AfdM!UJQBRjxxeh(3&7s^uK-2=Z{We;JK!PU zLFXhA72vTTe~B^tI}^MHB&&&KU{7!xcntUm*bjUSJQO@>sLlUb;9%V2!4tu+I=mHB zzPEx3|0t+(z3lLaVTr^*+=IdX;B2rj_;XPC+649jUk1g8qlPCEXMv-^LEu%O=-&-a z1@8lu&m%u&pAQ0+uUe2ICw}GJe*iy>`|xuUi37kBK+)^ta5{Jz?(c%i-x~0A@KsRx z>odZ-F9grP{S8q0S_6vCKS9+;a-_}o7*P4R9Ha^p3!VFMho2Z_!(9l94_|h;2vquy zgQ~|PM_W3d0#Cp_4^;S{fl7Z1cs{t_7@N)nQ2y6CTn&oe8=&}c%Gg8#)+RC_tV=8a zRsVklsiMTk&$IC_1eO2mLHTb0$ASBiSRZgAC_3{%(OCi>3clv>g9QE9|bD>iC_{u75q4O33wP- z07d6oQ0;Ufcp}&diq2c^`2m;N{@MrZga4<&3a|-OykCIFgPTC{?>X=j;CtY4;IXr9 zyBi8B-sPb9`cqKhTS4V#9Vof-FnB8X0yqHtc%8)y99|8o{oVzh0zLtX?jiNI{htlW zodr(@zXz&)-wP(e7r?&YF%6dP`QW*@uK?8!R)8w!TcFz2Nx4MgGhh{XEO-Z~d~F6l z3BCi0?lDxN`r9~A`TGJm4qOcC`Fo(+ao@{rdzk@>-5{O7hTnnl^8$h+sSHb>Z&w}OSIiSj43#uRd3{?1sK}2F=|0bL75#VXK z=YXF9Zw8g#o6f&qvz0ra2XCVNX25fK{=q9Ozs7-w;x2%z_DLkZ2JQyOT$M;{KY%v$ z1!Oetm%f6mAYA@y$U^WnkR%fMYiW->e+ul4yXSSb9SsBz!aW&00{k3!xWYTU7F2nD z4)z2$IsaWC*-ShG?hC%?+%JPYaK8Z_4es-G+mDY0MfVI){p8cmod(sOTfhMP5qLbf z3{<{$gKFnbg38|k->~iPSWxYJ45<419Qa}I2cYn2VQT--Qz&Xxqe_D@H|j-E(bpZUJo7&{tOgf7J_=d1yuQ;ahUkFE%%Y&hw(oJ zl>8kG4g}|bJ;7T+)!Sk)0Pl6U8&ti$4J!Wr-?8KRVPF#XNKp0E2&%l-gDS_bK=ExE zsB&xp#g`{Q(fOCd4}aH|;~3E74-}ojpvv=UQ2eR|)o%U^6un=%=SxAQw+j^g=fOk3 z1HNbL=}1uVhl7guSy15%pz`+(Q2D<2yrDj!Gvz{cwXitZ>-?RAF3W{2N!I3E=KrJ&kX2dH>|2S|7isE{HLJmWhtn3y%GF4xC1;A zd>%Xs-0x>L-=6?a#XSgA|Cj*|1=FCy%?DNP<)HY!89W;NBX}102B`7kw4d8_a-hn6 z9jNwx3n>0C0mY~L-SaAMp!I=XCH;{F^|9zZO)!e*voA+MIg}sQf+d{NDvN z?j8P1%iqDE=u8I>0~aPvX6-(_F`J_;TWCVpe}%@aWRf8F72pz^r|900xvD*vb4 z?8bTUSlk6r_3<50{bd=bezp!g6MO+weop$WEzf9B{Fnxw0)7Kjd6$6dcTa#y_vl+J zy|JMB#S~EG{v4?KXadEbYn}VYpxXOwpz_)7@Q>gzxZef?@W@+jz6OJzz?}odpKpP^ z!CyP~7EpBl2A%+ZV4-b)y+F|$0;*gWf)(H#_xwiiG~A0pwXerPwUhT89(o&X75B+t z0G*^?*C9TsRvPA1((^1^*iiz{Q~I|3UCX@W4AQKTZV|ZXzi9SAZvjH-QSb z3G4&D0QLiqyvx!b3+nlFQ2e_FJO!K&9t>^)#jihrD&OD14}%}L+t&9XU=Q5KgOUfQ zf*%3Tb?(W|odLy{W{2Mf)sJokmCtn!p92HjhqhXN4FdPaJq=WTs=x!m%RuET@BF_8 zehBvs&i^J*^|J*0D7XgH^PQmh@EEB4_PocI>o`#S9tf)aj04sF^I#JEEf|0gf@&YH zgUZjLi!A-)LCJ$b&OHuPd8@#Kz-CZy2{-F4C9=IPk6%^ku z0oCtjfQNuz0LA}rgOWEt0@Z#NgNpw!sPa4ko&>%Is{b6l#PZ>IQ29uL%I`Vg5#U7k zJPnFYBPcpoJNLIhmGh^d#*tgWkAe4rivNhizk{mp{g>MO9tp}_0V@6wP~{s3ia!&b ze->1F^FWp7zd`la+d<`L8z}ko2T=L`C#d@U&@$^j85Ez+1`h)-cK&ss`1M6l?e1Do zbXvi~!R-zo2Sx9n;8EaV_gZ>=LG|YgK*cYB>My?l)nC_vqW3tca(-aB<;&sV$8nzu z_5;U&YS&HR(cmvY$h%wx%Ktp5^xtvrBUada_5zj85KzxA1{MBt(8vu?^)Vk* zxMdDI-SbyL@$>MNwp?d|;?p!x`OZ4L5l{$=GoYS-AJjOz&f!a-_~JY~7VhVr`=rfQKe_}|KE4C0T&qBp;{{Ohk9)wbOH2jN#(fQV z3b+DPzMpjNBez(6dnDKw|1X20a~CK&e*r%Ver&6i3l*U1{cMMmK-Fi);T53j{oA18 z-3;yzE_1jFRK2bfewh9PF54IVbvJ7_VC$dhqx-?rztVRIx9Cacl;FWn*>?JQ@F3h- zQ0=-IJP^DNJRbZmD0#66RJ+{{D*W?cPw-9f0C3-@ZU5^Dsyr1S*+~osMQ1!Hel>t< zpFaUbXQg|-5mdZqL6s-*jP3VFgNio@6rIn52ZLV%)t|l%N?tAm`+#em`vp+>JK$NH zkB@?f;64si`|A&$0-g^BV8P)J9JYb#ADy7+_I%EUI~}aRJgzr*0RIH4KfLGMgZ^RDn+nog6IX(5 zwBIj*;{Tbi*>o=jd*Yr0UbPQ=0lxvh_c}Tm9pme7l3(1fzsp>JaL4@%nGSvh91s2# z+zy_W*vI7iU!dgZN&D<$cu1w;RAiz#Bp3_im8vCfc0) zUQppyf$F~-!H`DKB)YrK=rp~Q1QM6D&60L3cnImejfl;j!yUdDNy`*2UL9= zy1xy794L9z4-}nGgNir9VWY!qK+*jksCN7dQ2bd3sy?3r4**{QMdvMtA34CbgOeO4 z!GPyyf@;qffr>u|6hFQUD*g?i^0^RHewKnN|3*;x_@l$8K*fLAx!(hoj~)lw@*V<; z?#ZCq#o3_vG!7Kqi=BVgxmz559aKB}8L0Za$GNwH;^X6>;=kqG2YqlK(_fDVPsD!` zsCqAe9|XS&D*fw0rT~NF`$5TtKY@}f2lTM zL6xr=6yLu9iZ5RUmHrPw(Y*~+{@X#d|4xUmIz044wtoAAiZ>cmKf44}dFD9(>p;=} zC8&OX7brQ}4yqh~1C`DT4iEUSP475R zf4xA{FF~buKB)Xo0hOOxQ1O~U)zkIP{cG?8xZ6S1^Y1{l=Vw5*-*-Wkv&TnleH{x1 zxch?YClf%WQwNHl*MQ>t_d(_3=gxgIsQljrD*a8M;yntg-@Xbe{xOHxdQO6J4+d4w zp9a-lE&|2pT2T3#2Pz-m0L90JpyF)?RgOP8daU`hz)E`v;IL|$w z4XU2!flBWN=YKP(ax4PX|F$~+r$O=gHBjZ*_t1S36Twr!DzF7q{vQMt{|Sfx0#$Dx zKg`yD1*qqvLDl=`LFHqPd;Wb;e7g%&{?~yj@1H=G_wVlczK7fAM}f-M08o7Y6sYji zK!vXb#m6f_(Yqd0`oDF!22{L1fC~Q)Q03nL2%EnERQSPQB{;?T-|TP|D1LN0d>2&s zlRjqK?{HA=8c_9kHK=y?b5P~J1ynz}A5=b`167`Vj@&14Joph%;Rb-JzlmTH%!5kz zSKtBQ22kVoHc;i?35xGeIQOg0eZWyR{UbopJ>KDPP<*d)*a)h>eAT({1jWa-pz_rT zD!*@n;_Ja5w|wgj%6}xN^e+Zg?pjd!{~D-vvJh1NUJi=ykAiB4uYk(`en;E#d<;~5 z90MwyGePlhl6zhSsvMVs;=|RT`sY_b^{a1zlB+)jmCkR#zTmx}`qPu3vcnVa! zgFa!?>jU=3{b^A2uXO(31XaE}K=E-isPa4miodTq-1n2V+=qhlKL%8LI0aPr(?IcO z2q?acaQ+iPg}=o4&vNc&P;%od4u1xUfA=_C4~qV7Q1KrH#rGGT`wdX(9&nsZ_oJYm zALZP~J9mY14**rp!Jz0(bC`Bm0M$Of460s!1d7kgLCKK^LA9F~K&A69Q2pqGf#v7N zK$W{UC_1Nu;>S2p`J4$?QpxVzZ?)iG>za3OR z-35wIPr2tkPq5`Z3>5vNo%>W!`o=&|=?nptpHU7cgW}V4hiOph&j!WcMo@hJ0;qcU z4ybb8;&3%6{&qV2i^JzZrSk?T`um+|=^g~CUJn74pHm&44xWsA7^wP7JO36?{rAhD z`1eat<-Y?|y1xS@j~;N({{o8cOQ6c}Pf&8@Jy7lY$dhb&P6g#228!NioPQcrIp=`l zT}F-vdSO()bLT+OyTakM;J&zj04m;(LD8S@a4Faa_f}B( ze*+YsdREx@RdLhT-X`|v{tMjy9sHCF@O#{s(3!piP6qYMyJvH` zKLtO;S0V?_<@zRmQ^EE4z0UpZT>9OJ->LRCk>OsyBOD$Nei`?D#CZt(DOd-7AAA+O zi06L;AH;o|i*qaZ58V2F#Q9yx{dlf#IRC5g|04Gp=l(1Bt|IVbC^Nq%{y)j}Nk>DT zm-FmLTw7ci`5ox)=g8rHY5bOP4aEIz@H5~Y;0iAN`a$!ss8XiHVay{iOfaxO=7(i4(XV!F8v3>ed0>J=2;5Q^D}J+ucnC|Cr4#b{%P*_1&2AmDK4!_{Kj*CCf5c%=UVN; zT;sy@1c&1PRp*|^eGS)7ac=|lo5uaQTv_W(oPqyoT#|L2Twmk*F4yO{^t+Yo$By1` z?j<{4;?nOR{AY4K%stcM#8~dz&6DU~p4&?!XX126OJ1lj=9k6qyWGEk>+@XiSntFx z_xy2(-@^Ye7yn%DKZyTnxWDN9j&Yd8|8z$~UgNl`@zXm4w{r#D_u;yj%m3cw{v3sK zG`@`c7I&{O>u}%6^*b*88hLg{?0H}O_jm4_dA`(yq8)=D#s7QG{Q!6hVLKe1G|yQ2 zNc;%@4>&&s{TlwWxo(hy-+ys`p1n2yZ{q)0!k-WR!TJBh#a{z{f$K8j>;s<3^QXZ! zuCuwmiNAiwg0sQ%!H)M%JcMv( z5@xjv*B>0kbrn~@v-K|QP23;Nbq($>aSiAGQo;=7{ukgFt_uA0Yvlf2E|zu@U*)=t z>lys-;rbT$3kdf)a0vKit_Apy;L@)b{zq}?R||f_(Hz13_qbmSHo4~t^H=@j*TS>6 z@XvAIpZjaLPjM~6y%794*AfNfw=d66!tHwU*!6W3-eEh19|=f{3miv#%~|ozXa!i2Z5h;;YNd362|{-aX0_M?>NE^a_%qT zp2YnP_}$8Vf&1+)-Y2>LI{x~-#`S%!=XkaaYzE%|zYbpD!s9f*Pvh=EylLPi_&f|= z&2<}>`SGmM-A=~uJ6z{-orvGdT)*LdAlL0&lL$Kp+=c&>;Ae2J0uKPsa5VPAeLmMj z+{b|WP2l+#!I92Ah5P^J{w%IXxDLRb;W~~>zcCgPn|StF;w}dt$8VnV-w#aT|0!@^ zu1|BX-_N*4nLG3+@bkp`DA(mYPvU-?d;QjM4d#BVaoK;z;y%#1e?<6ET)%PdNj$p{ zcQ5Cz<^E8v>$#5N%JKZOTp#55pSb4X_a!d>`xW=Aa2&#Qr1QUs@PEX87uPua4vdAb z!B4-D&TkN5dvX7i^$!0B;T>`}cKc>&w-C2}H*!COOTUd=%ef}HXZ`R$mHW@Q=fC3FaPCj$>dkd1?gij?UHD^gw{U$E zKmV)aS=u|m8C-q1`rI&xF{RA75DYvEN~`x1UQcC^U!zQ)bEG*#eYA;|2;g8cm7G-OWpl-+z;T{Yq)!Z?|`pzW!-bpIfF32dwoFk5k)1Fityb`O4yJJGXeWlMc^uC5Tw%;)NZUWFk&dv^7#>Q$I- zA53dVXJ%#_GU=dDE?&2fLkfZURZYoU-kd2kWgBXP#(b_epQ;bC4NaMRV?M+GA!KBF zqNjpRnmMzOY3eaCRi7baK~UM0$~OhMnPIe9nN&KHFATAS^`Btl$zm|ExxPA+SB$1i zeWsy_vhir@tV}REo6poVsgdW5fdm*bqm>00+o)P%3pVUDhe|zRR|h#K|0lx3YtL5sV3&b*o?+0$Fi<= z+Rs$!49XBzWxT1zf)twa-36hUsi{$&zNfh^(>ExnGpSKVG_de5O#KktR&n=3is3P{>N=46RSmj~g<>hfqEBRWpqEo14qep58ae z4jO!B-=MxGm(NrsGj%hkUzx1ST$QZOT-`TlY^>=E|B-DyJ<(o;AUPqZ8d{&vCJQzB zY-7`O|16oz%&VzuPG^!n_e1Nlg{I-b=v+hZrXVw~F^4#{e(^Z+PNwSW!e~J-#)ic+ zl>M}6n&`|ZVndGfy2hQjfWb&A1PS4LrF#gHN!Xq&G^J~l|5RO;PRMUWIvp4XB1Hlu*W47GJG5cAiAtP8 zFcj&S8LqJYH?2TDSziQlkSY|A#C4gxi$l?aq5M-v2;-U2A=}UhdGW^d5+A;~d&nIWrrE1Bbf#JaTzj%AMc6>p z6uUMJ(tDqVl}u*q8|$*w!BDEqR)#WJ+0u|}XsOpoNtN>mjwcD`a_D+j)Xls59b*f(tU4#sICU z(KO!zQl7^lm({GJc5fQI<$sqJ@2Ul6#A@$6UlPkBKaRvxD6Z}>g6&p3%%}2F)=ZSk zo3ojwzCrSGT;cB`1ZiNN)U~*9jCHjcWSy70Caff_YY&441~et(QLlzDXrPNoZ>!D~ zG9)o4q#rOS$TJFJhL-3#ca!tT^neaMH&2U!ih|e(BmP|}4*cYhxi)mu;BcMYc>v$c2Iifz*T=VgtG?j1Oaa(de=e z6P5_mF7YZ=0|M(5kazE5*1Yy70E@<5Pi=* zCe`4FQKx)SuH;Ojr3xiugbG})F2ga*r8$epvodv!mO-)q5wFm$G-J?&ga+*5&5i|) zZZF899cWawvfp-aMtg~EJ4h$%qC$4l%PFK$hGwQ})b`??y`IQjB)gJ#?VkpQ_%>rg z*w6a~L6sBZW?pG~;2bDX_3Fb>_H{Qhqpm7{SJHWe^i3izmdiJZP%gXJS471vZWC5) zc5M3C=Q#6CAJEf2Emf#wIS8ZLc+WE#wZxEoYvuV4~})?@--XvLEcZGC&4*#FFVLu~7{(@ls=myJCTPvv8jFRO`FOlz3k zkejP&M07CyXkr>!-OLy>Cso(1nP1(!KEz3mgE_Xpc;Q?4zD8FsoOHWFgh*#<_LWJ=TRCdTS!W<^8gLe;Be zAknQR*)ei`(U~$TwzNO8YDp+}lDB2EMfK??g4H?Zvo>z3Asy1SD*?!hcyWo6M947V zmojWf6#pBQYoHl3{Dfg*eV7>r3n*?TqU<$7jinbf>^Yev`UeuV=r=0Y*b>y|(%G5W zO!~A`O^s$XO<6j1Q>wnvh+heO%L);^41zhd{-mEQl_=Ln6{-={k^r<#JLp8Tra&v7 zsn3zMlE5~PQ_QncLS{XyI8z#em?&o(HM1!yUlE~bh7+hBqDd;16N*6GRXvAUzvFS@es=_p`T#oK?vQTHO-MT0!}l80N0G?aoLKQMm{zb2F*gnT9R|43qaRQ=$Mhex90fbopng zDML2XUajv^PDe1QQ6-%%)S#@DZH=+IXP%QRrmFH?93x;@SJGuYfrb{N3?e-9Nw2M|+jBSRa^vS~Pj%EiP*=IHFevL$eJv`QbLTkbPxuqzl{7%59f)OHxzek=~g?l;WKF)c-ua z@e@Y$4KAE8!pO>^0;BOMzp;Ya^;50SC<{>rT%9FtMobsJa@bX;UX{GsRQcX8VU*!z zKyFM%l%d!HxEp;CnK6P<1-N|G)u)^Q`5&e(-YWOIBJP%oKUN;PzWAQ);R zG-zof%5+3BSC<|>Y-mGf?(nL;rNfKJNGW4fQ1@}$I`p7uu&N|-E}ypI1oj(ZGo@5i4hp&D zZigFU>Hll_Q>K z@(o(w^z(ZYO60@7$NF10lXh46F`rgGJn(cSIhWjJr4nv&fv4LJ%$s~&ENh)##L zW7hX<;}xN9*Gu4 zQ7Pn_wcrx}jgxUzeRf{po|(bb*wIA!ZxKrhA~3TVo`f}P==f}iC3;*`quOTFePf^riN<-ROmM7Zg~QXRAWA+pSE@*TA7+0oLFLpD zBP&g77CDn;M@t)pQe{g>g&m@_#^rW$&Qw`Np^vgO)fCIx#>C0_ER`eUO=;rfL@O^^ zW|1-EP8W{H)*zitR%yYe#B&s*7SEB-!TVF2BWhmhiDfII#_IN-)T68js9Ix@b!#*< zU%#fav-HPgE56EJ2nx-O+OxDx=zNhXvqe>umskrjg0EVU?1KBSkz+?s95G=`EGLyl zzSw<0w<=$hCoM?2SgN6V5sT+=*n|WUo(xhOHfSu%m`FrWL&b+^x8TxOgmCZtH&1$0Z+|rS@{5Jn<6AV z(`-FOTI49h{!Be$}$o&KTeT0I-`$Xv2FxIa}>*IeIVhNdeFzoO=v zydsm=8j=0Ey@|r?Y@=QMH3qCMNZH1wc+$98JoPJz!$yoAJ;f0;UCFWCT42tdrR3b= zqqgUU4+|8*F-^2`Yz^7P$v7$7E%!`oXbCNL(`IJpd1_%Xy;X?pGmO=Z&rYf?$3mPj z>Izw;0a-t{I#<9bE6G5ITrGI(rO{4S%)*Q|B4OJY`cu?FBU)~ek0r-plg5s%95dA> zVlCvH53)jII?-h>p;qfw&s=s{+BIT!PqSca{$eaejr67i6;ickMBmda+(z?bPfP}y z1np)8YHzc#Y);CgmMMzevgp3`!zM2!jXDtOHbpD7j!MF?0wZ)|wmGVyi4AMBNj{27 z%hp+Q;%N<8><6`zjr}h62kfZ{M_)8z%2*i(X}Q2}rh5ikDq}FJZs~yudXK4Wp!U!< zyfbgd6i(0BnMIHH4YiaAiHt=cnN9TQUR&^EWhCgaG+I#fGp62lv);tgCVmiQ+h+7U z*=f;;+^Ay8IgVmyQ+0MDU)pT%Y+**BslKT<3EF5SW(P&-h7Mr@)L8|@;AF$3MUe-4634urka&^r@(lXK4O_mIST2Uzf=B; zLPFBMq<~6Bzrn8oN71g81XqlN8)SO0VtQoMgH`AJ^u>p6{n;ZOAzE=wB z7{r?CoI%=Hiz>-V*W+!G%}f(R13PaCZ9&o|pnZ|RMJV*^XKYu@dQqxC`>~sOCZsl> zH6SQmTU`p~no!J>La2hUTTe;REz48KPxYTYRwnHd``8MzMQQl!V{}`o-NtajOfQ^7 zO&~D8k~F5KLQQI_-hAlpHxa$!va*6zVl_xOD}U zscLc*ieSyG^_ux3=83bcU6|D+u`ZK6yfN&qsw|3=wss5E%~>jvCT{HyOj9%|Tv!}B zX5{CG5j#Mbz^S6ZGSrcN$Gk2`&D3s6m3`aB7-<_b`l{+~V^nA8qnY9;K}A8^AZYzn z+3BXeRn-&`aHY{EoA%8#Rdhyf!7Ob;8^b_n1!i)bD~j&TbkNnZ*#01kjlGTuSttr= zX;96+I_OF)xd#E={TArMn{>O+FSvn>e12oq9;Ni}nY9$uw@~W9piIOrbu9+RA8XK9zgmJ03 zl300VjF?qoa5Chn*$}0r8*}3ZY_4R|!}5h|hGrBgq2y;gMiRg?*Tg-~t*kWlAokCz ziZz)e8?a57 zqfW}YI>XybFfFaUue`aH=#B-Zoy|}&iha%8$N1B_EEz*ZA(42xFODFKX{?3!DoOa8 z&gExl0U@awHi=PXhQ3yvDIoVIo31g&RP`WL&4kc&hjcn3z8yW z=3drd(^RW+XEb2#Ng9)6$xb>sIwdNYw}E7$WCftYkDICY(4wZOMifrj%^D1eGxcLt zAZ;o^Z*pZ?cpr%|lU8la!QCnbMF=TI2C!zFic{?yr22{1OlQ#z=~t?9v&v?N$x`0f z&@tYKu@mWZfLA=p_7KhdQ_MUyniv1ZApJ1JQU`9z4KX{RbwQF1Ft*ir6^CswrgyyH zFis>iK~%-K6?R9-SETB~Gzvn*HVYufUV(WlIJPn$k5r<$+limn)r>0Y*Az%?1cRS> z15Cv{ zByK+A3Am~+PhqO*s#;VqLuF)|s8UVQ8)D8BKx5d%@e|xIRLUWZnsifM=^MuT+(K^{ z0~v{t&{uS{O{!3c4YAjVQ}uVl$&!D*Uf4uJwc_1l!xWoFkve1Rx%&zZMWb0r=~Bbp zS8Xg}xwNqyI zTq+`BTCLhO(>cs6qk{zE#G?|L@RJ(~3rPak;qw?P~ z(`Z(;m?e&QXD;f>;Zt9FW&L8-u2~?rIS&69b>>+j-NgpQlP))!U8op-0ud4|is2@) zk&fazL3gT(-mP*xis@cn#VD^^Xug@5ml-ycf6nR*t-!~L))nmfSX?PJ3k61!X$o4M zqKQhY4~tT%7b#hZ^e1Wgp~t+AKC`)@WNvIu6!G46^b+rNpn(_oRZJLolYzC;(SBU$ z8ln7-a}i(nO0S4wlv60WQ5MT5Zdo$fEF}L&x4R|Di)J7&tb7)t(v;Jj%QVDL?n|_F zX^7pmz|zG3on$?K$|UF8eR(zRa+-);aJP)Em{eWJnLPu$JC(_&O*6Gi8Csvv@JS=G zyGFbfq)}G;M)GHPV(v@F)K+ADJ?on2(RdvoHf=04gkca3dG zKnU~t4ZF8R(fqm_Ec0jeB?7%=!&>mXzP4L4AmGyGwq~V;8jTRnqi5noW(^1tmbw${ zm=56#56*~Sr zvGrn|x~W+y=z%+cjXO8TmnU_m_tH`tf3ncB>$mYI;f@)eN}eOStW}WgtTjxtyxovi zu7(7oQaVVBm(Tor|9&X7r6>yEw7$|1WAgc&_DDo-YznQ(>;l@w;MmHjc|O5yle(F8 zVTko*l{U=EE#FXBsfpclz5UM8o;QZ1x!2W_l4)aGcpGfm@g+;&9_n{(J` z)o+Gi45>MfjbS{p4Ys`(O+AX981>EgXcxon>q>*9V9kx%X7&#ak6j3x95IY%aTAZ8 z*)umhQ74pW=q;J1FpysJt8GABq|0;Ar;doX7Vc4}9-@sGr_s7#>fyev+ubDd0A@Fs zGY_M-P*h2V#U`X-pcs!}=ub#XO13f;7W0BsYx;Nw%yZt$0X>ONn=e&nHEI7GISMqW0VqDV*_ntYCKe1pQZQy zn~7pUojsn3P<5Hc4N#U$LmZJ1RtgGkgc*F!6Wlfz)7J~?X z91OzS-lqGM4Zu+`eq)#bQBdVIbe(xRC$uyOBml)AJj~Ob**tlA6NsJsd znzI6PXc6Y+SR?AZwS7VY$k}@t>Eh=vs?JfTo*HNt5Kx~S{-TI(@@XEq{aQERnzm6e z53qyfJkbVhNnFhs>&8sJkH$rK^)yyxl!Z#rh&sfKBUjNf-LSvR8#QOr>h&d$g6MoYqoE*&6d2*Wz^9*ygiv#h_9!0^U| zWgX7Exlkt!#lOXBDXDZ+d%77m)N4mgr+VsWIBT=+#i9uM#7)h>2HL4NQX*TlWD@hw z6xN2%HO$P`Hgi6p1`Cl%jEbED%+TS7Qnaf06ECWuQ~W^l0@tG1!Ran~EL5!B>!@fF zF-mqS7*(+6Gh z-%BP26_r-(x(=ec>5~{OqbJkXIb$)W(+t&_OlCJB_c$bA^hym}vj<8VwZ$50#J6enrif1W^$j@Qn@m(|rl9o6sdn$rN729_vS(t< z#bZVV6=TAc22-9si807~N>Qoz!jJ(FZaAxbI*hc(A*G>yi78glVCI>3s|E!lnoXej=B$|87I3nrL;n& zm&Qm792b|BrozpbLYp6_8LO-%jp{ul@JH17X6`1jX#zSm*;ru*y_3CadiPA|KvdJ^ z%J$a@_9$n2BD85{;gCAP*Rs_S<5oxNKNDon#>g;7Z+;-`i)`Rny{4_RKvq|0TBnmP ziHVbV^{hfhJAD!pr_LBVdCHjcDuW8cM`hB!KakJV>Zs*>Ar^?2J@y=I{6&*1Wu6vP z)Xia zdCJA6U_piUw`Rce&=nX93{oo zux;#mBq?B!%j1m-Y2dM@28rft)0J<8TpP5;p8S=8=7+#;c+O5pgl)-B}?+ zA&jL&L^6tDDMWJwO{&b8z!b=81*P#>&4H0R0ND=C;*;tvF^T0wB2%Es7CKjbsKTp) z=OrfD0ZBQ z_;IS98-#5aNL2DlqZvD5GxbQ}vICmZEEmo#-SzpR~*0#@PILVq(6V)*FJEU_@hMqO!S0rXLapM*JAvDaJ|sRW#odi{?}; zJVXz|wFu5*Z%WOJRy%xCfDTIniK&R3sOQRbo&){GZYI}=qI@%lHzw^yt9$VXNuW8i zd7-4Ii67~~p%w+xMY-$~^9T-U>d-5+@^TYg^hk!C(yw0_+jc{f)MYo2(!`Z!rL`bU z*(49EbMYVt;$r7iXyosED_r@E*YHl}G zns=lBAP(A^=062D|2ZdU$u%Q`^>zkxUKR_?nYvKbwx%`8VZ6uEB{#FDMErRZr#Tbm zx?pm1bse&Me6~hg&Bjb1mXwOc`3k(7)s#UNHn5PH%45}MK8Z7xTEN<_C73v4ipDzH z>Qt3V-O#P~iofW)hEuWybRq0!vt1JI8f4nU3noswXyOo*9-~dlT76oB>ERkJ^dTS& z>8<&rS2(TdO*xIZ`?xNBO{ARBALLmADN4>PDutQu*Ns6@@j8j6^-R)E?s* zEMzjX)dTes3(OIP_j!DLtav`Q=|zg~laV}eBP_uY1Jq%fwln79QRDI8#qhLtI85)b z)yimL>cSoxjiC%0xH~4A2-a8A!E*jnN1RvA8>vXcF&k4A<`Y3E8q*qL3(OarWeF=- zP2#a}Ss5qQz zWKRLI4W34vL{*plyy-zza{86&`o_yqwdY;UTS+yLo|v0lsBE6Y%X3AqyaiP?EVDFC z_X?(+(kd(F#m*?JRbi2!puHWkio(}T09Tgo1GvHjRmc&O=JY*<)yFXpp^>m2kz;eWU5%^g7c!(e{uzZZ+5z#0QKz zxyos1sIzt-?Lu`LGXh;Yv3KBKl#&rr6E92kOI+l41?-w(&&Xp^>_GHzfb!FY`1%hm zG>T=8u2hjsC$ifD<{NTm_fkDNOp!TTgFeGW;P5bCqjAtRjS>LPODNlnNyg@`K9iEJ z#hapbS69Q?rSp25k@V6u7H{?)>3)ezo8Ko=-UsfN&^tREgPh{aZwa=3Ya8?yTB4+Y z45min6#1)f_6-u+;2be^;+bbq4Ja*X!Y33H6H8{T|{>$K>GOfB4=lSxpURzZvg zQ;pnC+M7moj(H_l{N-#y%T`5;wqw0+rB*CHxTkh+(l*SPw>Em&Mwo%pK55j9DHo1_ zRc0jAgi9^OMK|4m$}gd6yya(@XM049y6rqg)3Q_836(*2lO)o1zoSVJuVI0D}3 z{5p0(rRi0$2N0NDcy(2!+?;2h%7In*E>-1(hx=;bnbl0qqqU)>L7mVXq{7VD>hTFP z&>Jnt-r6<3x^%)0v%YzmsK#qXu~KD;x+m%MjHcWSH*24vS#P0{_ms`{uk$t8w8Ur7 zNoKfLTKNbC?S@4Q41ntN)ejDPp;yVI+JxvD11;E-EDd2zhdgOjo4!$HzA~9{1v6>; zrJ&;cIperkicz?NW_TvK*!<39*wdA!YDx|(jDi!(r&e732_#H$d3-z3;KSOg4quM#5@r7TemOi(tqOSSWkmk~` zl5|GI0g7W&r{kHITg}>rKIT>&qb^mQsS{(%G2cL{a`FccPgq$|#0$-vBlLqAsuwfP($NU)MW5qG#H7U!3x zj$*g|p|Pg+V}!!&X?QWu%?RO}mDN<(90_{WB)q55M9rc@=;gbj2Eoj{gdJG59%Gqc z5@oZ~9V@^GZj7};lM5&&nzFOFrmypmOZ7;_H;Y-iF;<7;CQhC_E&>BwExg>ES&S>Kv>x6iWl=>oq~=EHqb#;SxwTqpZL~ zG8#?!%KH=QcoW5b9Mueo*7(vi9VU0$+2d!NYV3)% z!Z(+7H_?ogz+#u*b3m37$_N4V{aAyRKSIWtgM`L*^7ch9;AqJ3j~BZW4LZ=(F1HzT z3PwqDdZBGQJTBf2PPo}uf+RJUu-hHx6Rj$tQTPi9^Tk#>@v(Z!NW`4!p@z1Z@_EZg z)3yETn{8x;L}WP>j?vztA!YYCGkF4`q$sR22^=>%x;IqACvurx=qP~6ji2x38$)F$ z;o6uTjl9F>OA`Xqg*ZZwkowMRNZL4~&Sb_Xnp44siykl?FsHSZgs1aierE#vRHKQi z!g}8*w)cr5YFXPG+a{dRp9__+p;&d)_lDg_ty!&A%9|5*pbLjH>x{-Q+AG*%XW=Qd7u1GN()LO*3*4Wj{ z3%5d3b9Klem5BJw)oy_$sHL0Dq@sBJkEuVdt|z>g;l0iRTz%se^nK5hI zQHmtvm%S(Y0$7icBa7W?D$=9%nK+}=`j}HMLCmBxAtkdlrOgJdw)jBqB`e8idjNs@ zYxtCoiDqkJm{pDNftMT2@%3+BDKqB<7ll_HIOFZ)82W~G*dY`1RsrIhA6=g^e46iB zyPTKAjmCqn&p9>;on}uVyquKe^ks|^pywygViP((iybj_;(!5Nd=dt>n^Odu{017cjJiENb?0|m@Bo<%mUbT_g`f$G$k}` zwjHy%T4oUXc1?0zI(eZ#MwWLwn_0;#1OxjG7})RZ0X-*Anwqp4C9A!o(bg0S{-^ivPrxMa8D}+#jlvB|_UG~0!GN=d3>=p+@^_?ls>N=PCPV>Be4H(ncGz=%aJuoymHIrhmYZNv<*eP-Jme#?{ zS3>*ng`WX~8bHN5A9aTCTw#T(GCf6r0YTsb+_ENSW7^3yog zCfjh1`Op=r&#>C+frADNi~=gNOxBWPBokrZkYF(SNY6yip1)iC&@Q#OwslM2UVi_A zgmMeE5%5Gc^rrR!g6``d!$HopJQ(~gei_wW4ss>jJQu63*L zTiN=;wuP%7oWCG)+h^O>t$c6o+wrH~$3EY&Yx{k_pTGUZ%^Oy4`u+U2b;h?>!KJCN z%l@&s9WFt5=%P)#TDcuAM&0{NTiXL~?0DBi*!=jS*Tu>9-EHgI-q^fr-R_Nl;sL?7 zt=PHS7R??A2>X`YwdMAX`?ufJzI*xYJ3BOvE_;2;YwK1UO2y&l1&eRC5qw~}ZY=Z| zOf8hh-#yl`b=yLlOS#2Y5}$u}ufqIRWoq-CYyR2(X6Jfk)THy!O`EqCr)7@WUG(cE z8zE%2g6rm)khUVsZRf*FZrQe?eRoi{T>hyomC5Kso$b3#OrMi7CH9ZjuGrbJdXq9p zcHdp~CsUX0ySFYi1i~9=L7Wcg)LEcb<1Y*}6*o2dAl?7`wt&pfKuR#bJu7 ze*H_ESGGOexsU8XnxUV#mU^m2?N|j)#}|m=4MdqXa?wZ4dl&XNQWaIBo5+7vc3* zp9ZH*Si|e$Xq_t*dQHcwN34`_5t7N47Nexw=&}EcUtYbi{jb|zU;l=Brw!gKIbg7T zt$~2{v)n8zu|d!I_GvAnlV%osAAVb2Sh@3_6^q}rpKNbi*ZR`hw+#`(V~ZdyGj@iM zO65Iwu6^i@6@P1eOijqepn&mD-rHPmethF|rtGFWBVuWnVH(&qW8qb2j@l)vbqx>J z-M(@AwuSTWb{_LveFEle>XPr=FS}>i21THG&@)?~?OatH+ANO@wZ~dVq-$$xVq{yA z>`&YL`v09Pw(r`!s^jS$3wJ%x(Xnnr$E{25dgu*Dx|S9pPSWPI)>a68xt74)$Q%H4#)qf51z*=WU2c}#e&+Xm! zth%S|;d_4_HZ!-;9M+`?EIH?@k`uRAyc`%09XLC8&_Gv2lwKXSOakGlX+fYOwr^kZ znB;mCE;?e?6j?u#P-!~jyv32IpPbe6F#hZoOI3EC8g%K{pIDa ztbB6gpU^H=#yO;q5u$K%hFM8>zx($bhNhLX;lbkD+Wxfc%{8~T?_B?ePi%Y`&kHJ- zSh3_Pj-(Sn{|#~H)0!5tEPjKMVcsK@Xx)C_iaWPIYMC87Z89D_2qb4DMJ=N}@fz~v z`%1k1GYrK#i#mXhp@S>TJVpICE{HpxUb1H6bI8ZAeXo7nN7C^yd)>S_IT${bREP@G zrBeLJ;FBpmHzeeM3g5cQs~UJGXNS+?H=9;%{Ed3s+P5F-?ChW{=MH5Ol2C-Ys0dyA zUHemOpN#rlJwdxjNF_t1MZL_3MFisf1yz!GMwPcox$`>Iw-hV-sc$WN$M!8>W*xxk zYcMYDifd5f&d0bSDoJq_c08>-m94@4LB%PptJ)qurH^ux;2MC>#@kkP8XtK)@LI=W ztEo%*H?N`KD}^|kfOy}|We+~L_?3?N_K9q`2&$GD3u-+1dc~Qj(VErR$$~8Sp&ogQ zZ}Lg^(0{b{AgI{3xN~9Kx^=tP+`jqMj$NH?gyAT0o^<&vY7jf&DB!p9ktMfCh)UeH zt<%&+b%te?85ec%N|$pOqsJm(M!V8@$TwA;h>C>1gk_IWD*D1k!pQfgbb<%#WW?SHxVUeSy`t6GvDlPPHcqG=isg%X{Tf)UOg z#cGylU9=c%eCpn}r64c3{h@^`R!9#tBA#fC#587ndA|P0sGEsSZ!+=QZ|nH;vUR5| zUAt}b=GK*uFJ7~3ap(HBc3%)>|1z~n-lp+KB$tTQpmRkeS=)CP$48BU!W1ajqgu+- zSiDo|b#`o8C7sEtIj8`{lw8*GQ=^pRSb_bmVt6fk`POLGqPVqT-13UEk1KW=eZ~;= z=`}aFcbR-r27Mfx(mgAr9XdUo6eor$x`m$-^;z==@yBRI_L(wz0nuXLjrJS}6YgA5 zCXyNEutTq7kHbwmiXyh(7E2}Au)1@7>$97eY+EQv;Y!OFpk2a6pNNjgwBNSq-8B!y z>Fn6G^{;K~Jjc6Iyalgg))GE^)*C)dYneQd{b>)$YHpIKH?T>CXDCZW8x$q^d<0Oc^x zohx?jUb{N-U-r5d4mvwjr8`zEdtEeis++OnRP3VJmL($!%U-|d3Dl!!Iy-(pf7d@m z!_W-BA|D#n4rOrwA_aD(OHLm*4bs=URz1lZc6WB}yT00@Tuc zwOx6YCa9NTgkham>+9e(c~?HmhwlDM{+PhQuGd%YY-{&vmL#L3^#Q&@loZ>y|C@vY zR-)(Mbm4>%!Sb!$BIS0%4DHDtNlU5TxKSeugJzNcwP zO!*>90Xg%v8^lofNBrNPE9@RC~ihzLTUt7Ba2AoI97)5=4Iv% zuj=cvJspDWyLWD4>dM1l*}AoFtIsNoFS%ng(oPHR>cRQ2k#1Ps(c#q~=~->-Hr(B| z@*yPk(x;aF!&7jYKv@csv|chtv7?wM#q2U@yt7%f`Bw()$g;<*7g&a1MX-Sa+0Xoi z8D|Ri=g#$3um_de63nNycOVVfCvIZ1Nm`Ss92ARaZrg9`8dvMqq6z~m2Zcn8E)y;* z+NyKZmh951-!9~ORHJ^R?Ofc^fqvo1#Iyz0=!&QW?@#6ePsWUOk^WFb>ix-#_hd|N zid2Y*()*J+&yy+A8zKsZJMT~CB2Ok&*W_n-EIM$c0z(64e`a8lnz{Mjoolx|x%jQN zbt~Rl|HggK5sx(zb3SI*S)HqzH64pyS5-*PGI?3u`mCQXbUUYaG41SDllyQTh4i|e z3>U>xZZ&7>GBb)FFRvK?gPBnY2~95FXJ!=5VoKt=Jlk2!@~z6Xot~AM$?U~^BnT%Y zL3cBfuJZ}xKy0D9`}u^I0 ztxP1XRd^k^++53-?mwqF|2v&-%>)0JyB)m_jks8{x`yt7vDY+&;NExb8ba%W#ZR)$ zV`G_)Yd$~V-WZI3^G8xao2-%|TbKH|x;-wQ(L5fM)D-%`x3@fDLu>J5$I;U%Ngp|?D|6UD&B^zqC|)>U5robGHIZ93YEj8fqER`d_Hi^4Fr@Jd1QFdmlg zQJWUz-$(XrQrOj-G=NDn)v}<^hdshSJm)Io=lGs_Y4}Q|;A~esbz%E$yB05g>%Qlf zZ(X`r^jAE;eEa&Bez#aW;*~w@sj+QkEMTh;GfW%Pr=dN2rL*@^=6WToD?4`Wx?}Uoj%}OU6<4*;*&)86s$q9BvNG@l%+cwn1tsxK z)th9m^l?f4LwRcK>J7z@g+bfC`PF6y-XT}^oT*7#!D`HI)&7FzR7|KBh4_o1!}x69`Qtct zNk2=$XUxTR0TlZ(#dck6SV`&u5?D+LjK5l+Zw3<-3n}dT5ML&-FS!nzG|ZuVbEa*Wn4tySJIPMM4qSGP7SBPy$?%O2gfLMsTEtlX{4a=1zulaCoR z@xnvw7mwM7VMQ#aLeae>vdkRbb}~K}Xn%`$ioI>?Wa+Zw-Hp#}+P?k1ZR>)H#cyJ} zkgPOEc9;LQgd-5_+HF?`HUE-f%<`?G$nG)ejxx-0$HZ3+Gv74f;CT02vP%b6U~`l{ zZSl>&dqFZ<9fL{Tn@FO+8okel?G7~$RLW}}pu1i&e$0Z~4FpshOmTi(3) z-E9lk{0&;qxI#(oVVTA+WDFZIdh`^Rl}>C-+TUEXMW!tXMpEDayuTN8D*h4I}I0*e^KILES*1JvAa+d>I*rP{WRZcMqg{uJ0iSV+P0J!$&d zW^G-y;g!y}eE;9mY(k;64P(NJv|V{b1>rC>+4kuKpkYH>A6tI^9v01PVYPT@0y4)n zqaO5>{RPX7#m&m~o3Z_}TR&R!Z2Qfwh4w@DvR4WMsgFW?s8;dbP~d(xwnmg5vSI5X zUA~9*m7Ez|5U`rLyX|i_Ss%+{g6%lEx!D?u?zNR9;|>SWc2uArW?glhB%o|5khY%u zww2Aw)?0S2l{K6#!u-447suzfGR=Q&^GfYR8A95x5|!fJG54qh+@9HdZC%7dyZP?FLSOVq-QvMVd-RY% zuyy|QW;2yt|MdFZvts4WjoX%QGZX6FmeS6@|9;nocbD9?-q_e^)oAgZtuJV6 z(Hh9PA}!h0zT16YUK7j}|7=}_jH0aVx2-X&Pb|1tE~23O&&s>0sP!+ylnrn0WP%=T zd-^?6jjd>v;dUr&hp|D0#z6DoY-O$JacO|oRZ^0Rf)rC|eRkyrSDS&>jQo8U)JE%R zh^2&Y*IhysdDya+d?SAO>-X)_p;OydEZMdF6_G0WHhlZe&41K)+_$Y@`M5M-{G;%O zk_i}5D*YJzwiO-o{WQmT~+q#Vp zt~b_BRmER!7aebh`+lEm?_9Cv$rUSFH@3BIxLa`~(wDu{ai5*|8HUU$;+9bjVunCP zpI=P|i+B23vwO1Qo~X#QvjYuo<$J9!n7IOeC0}0OwL6NsWBro5eAJRpu4^!h2Yqk{ zTT5n|s&q;|wQj3#_45xr^3YN(Yey+4aLE_e#fd1uj^F#~?~0d^IM3PKE1K6)1O06K z@zJ6&vE(c2alS0=#OTuUMIQ%{K#;PuU^(ASU-@|ZPAk6_-0sDy8K3&-arnvf1bGpHvC$;9T5|;0a<f{LK04O}if6_}sb$Mv`iHk8B$j+%9!@*Y3p+-23jL zEuAQO9UZNYuUG*SV_zq?3-d5i$x)niu>4t#!NsANoxI;S%)|J~rsIvq<5*he)w%ae zs_5J0ixz0iBvYLDH1cm-NHe3ql>aPv+s2iD*ojfRwB9;n zyuo@arx&wkie|g#?}3XqrXs}7txJ^%B+7gPTmkK{Y!!4(vr9ku-8G&wY=){aDREnO z(Xy7PYAlavmVCU7y!aI}A1k6M8#?c61d91r$_|yuEI>zVHZHJIcSD=?Au(rq9+ER& z(!h*`Hl)gbw_Bu^KhUvGFF^zqYBiF8EABRvZJi`--@*n6{ga_|k zy|BW5ox6`ZM3<;qDEDvVN2w{Q7O9wllx8kA`H3wIDS`&}G7-vudRr0vx{TGIyJT+< z-`ZAe)r1|urJ2~=npqc2FaD;sokLl}T0f&wr}is}|F=G&tz6sL*uX&B4`Ch>fke>e z%{zDRTDN2kn)j~oo7mAx=KpE!Tz=b5jy(Q5>#yKp4A_Sac9TmEn*{>oJXmb@vKZ_k zzyy0)K`}o(*U+w)be>+d((VWrt&g_8xDiN;9e*7_XwsKk82Bg3=wl#fYXJr3Utzqg} z7}GdIWYime!G?Z?nAUV4oZD3(^~Ww%mRe&JD3}bVsPBaVtLY~6ezvPK?vZ&zo)=qs zHe2k%*wni4keaLUF}C2;nMnf@?oQk#0jb9)oD(@`P6q6>G&(i&YUJa*Xw(w5#b+C* z{Xe>TkO^~#ZfB0ZFr|88U(M+yIe#sTIu;hAxDm=DOjEz(8rw1R5G)TY?fzYCx}8Pa zuffaJ^_=A)q=m)tp_rd2ysw>07gb)@xez0=#-K02`T zWEj7=l|N>dMMict{qP>=o@@=vHL#Zv(v8Ww8P9G9|0F~(QFlRbkQKTSVm!}RLoxz( zZ)bi{>-c?IyD5Mc(o- z%q(-uTy!~mP$%t{M_|rx3!9&`?(zuC%Z=lk)VROowVI95;=@_oW5+XNq96fgXvP!7 zcJ;#Si=IChX_-wNC3qAL6Tb%7MZ#C#`6qGCJa1wsXn__RFsb~UnOSfqqO$Z_9#9!x zMpJYtr>~wddu8S>uy5AXRUS3ju|I#~nQ1>KQgVv@tqwg^up#oFn>!SxOf3wzhMz8sFV-FWbgFu_4>B1TafD40H?P#E4j_?<5NZT7#( zOuN&w^;eIlc%xk!`f$1W-Q1=5%3a-JHxcMTufP1#R6=~(4-5*a_8x1fMWT=1*C4bP`=gn@FCX&&JE*>LMT~l_$3I;38TsI zra2aUm*{IaK5pDyptghkrDs6UUyyJ8gfE!3eDJO{yOFj=XzrUfs%@Ch(t_-tUmQMA zrfR$YVEH;XrIC!uty+mWnon4IR!Bg)l)8>Q2)3@4=v`a<*vp~1hMLAKpEUZD`zz_| z5q|&OO2<3$P-z43!_#{^tz0=B?d6qVS@1OuHPa8JxR#K3!=cYP9c^>V9rLq9DUbae zXj2}`pk+nJ$5<-U6EFjWR(d5IXA2eKsEk3c0F*b>FWyNZ+Cev)w|2j1_p!&kT^TfV z0Wk;_)=#vI_Nemy`e=ZmXz5wwG%aopuPVlbhlvOsG&G0{?rY(3Zpj*E033fP{YI}<`#N(GO4~f{jT?r` zwuTWOz-vTPl(Uud4~!nu|@; zlY|*|zndIZXO1|zHDHskf7<)j+Rq`X|6Hvfo^Cv>ce)=#pZX1KtDWC!IkdvL65Nez zc6}E_(;HUGE6>Hqqt17hBK!H@P!dzdF3fU&VyYfXxqT9i!yQ}ATh>4HJHcWd=N8>&X@-HsOxN*N+oRv8Y4Lu=e64?U{QR(auyicq`7i3Cg1#Ds z3MN*W;zg+xoYi&yt7nZr>I3hS?dQ27dCO)D?#j?rA(37A87hxIb+0l7zn846OGW%J z@o|aT63%sHzWE5_p@nZfSZ1rBG^;R+F2UI|bDbBrKC$4cpc-8tJ+;r_*=P$atxqtin2j8?=*BH7j-Jv2HP`w~2-nm26_JkfHo{5-`GFa&dj2Wh-Dx4lWtP-tCP_ zxgco#{6BvFZ-h>b;JIY+^WE!cO*}U0@p!bid%E_Q&WrW0JD<|!;XMq8!U`@zTTgkJ z$c>WeG-D@Z_A^G>+tCbU;Z9-vNQ;a)gCaa+P&d`boH4IMW6lWu89`8?3~?Y=64*Wu zGw5|;UutzAaU{|&O(rr++?)tY4t1gmLt?bfWDvP(AA$xE{U!s~XX^^dlMOi@m}W|~ zB9>XaQh#~JgO$2-DwA_189co`fVOEx-94p}?-g=DrKa)->qXY~iF-1=nY8QURJqS+Kgl-lWBvU;|; zzx`a)#(ippUVhOfK6{aXT?Pv8VAw9PSMSi!4!__@CixT@#GAwG#o=ir&`8Qw+T;6B zG1Jw~rUn{Uo_h4McUCBynU}$w$pCzE(iZ1eaFD2bQr~c44|?m@La0eYc~c|+Sps~X zUsM=SUW|!PiWD%{hX4)+riEa~{VCZkgxDBt?|!;^1LG~XKJhLW=ID$V;(F3T2BqAe~uy2qqdr zfac&+p*ho(d{oZee*c>^;i7n)AyWv&i8lrZZJyDAM8yXRWJ%`J>DqMsO{z$Y_V~3w z5rHW2`8!(pJOrd+pK>|QS6eP*((=qD7EqI2=J~O~wff*#|AANfR@bB*2@GzI5S?IYr0Z*C1hzTBQJps3WCZm;YXTa12K-6PZr~_xnxW( zuI1*|LQjfE=w#jR(61|jo&4}Mtg)3#|D?a`Cw@@5^rP3_{+{HyM9f|ud6nAr6|RfG zVW%N1vr$$lAR^0zj5t?x5!+EC!Bf|d-QGhem(`giK+GMi@R817mY#K&1~=5}o#9h? zvC3PZe$|n_DsP0=t=m^ezZq?z6_8!9a*3hZ1=BFt&NsXBNXUsxV3FAlJsv%UlM>A5E#0Rq zgx_80?L=X#+UfpzV^8ME#?g_*S45Yx`oU^_a4IzU^_(96_|wMkTjTA=sH?{xEngkz zH5IRg*~jm(S*=y6d-bd(f5;eBaW0`(;26h!6d~v^mRtR6o&pt{O@V7w+ptyhdt@ZL z%Q98w7<{^3y&`F1b_|c6t#N`npYN=>SMm(IDPUUx^ zY)&EnTX;qqL?oiG?Ysztu5eR_p{5CRiB7XRS;I~D%DK_6=V0b3))lNeZw=9ObDhFq zrC&IR=bjLCP^WmK5vFOdhi`C@bdImbv@78ynh3F2gHtf#3>HBUc$Q3L*q)WtLpBW2 zPyZEy_ zF}Wr1DE;J0yb)D{-y0<`dQZNAi}-(5B6~ERW=^?jFW#Vsst-+^URIoe)4MWw>|W&! z^eUF?qHJm*%{SXhtnB=h3ya6$#p02wgxM#|A03=akkVZe@ZTZC9~eFUwR04D>4}l4 zdI8LJrUmiCH(} zMNd|`Xyb%PUVQz7wa14o&ge=O28)s1Z`~DB((m`Aeo;4gzr=_4-h8cnpeGsUYb>oh z$kgvhk@j%-nYuT>s4Fm8?zhg#wl>=TXzja1#@|DKe3tV|B0H1uTbQ3V>7GbM8@%3uEW4Yv>9CcuH8&47hGKj6O!Sc>Z zTgpS`83M|(N72s+KxgMGW{JDn%#LN`)ScJC8Ia?omt>3vLVY_GFb`gS_>`KxCR8P& z751oVT23cNAr(Y+DgjUt%hECdGp7oGf4GE1Kwbduqn%^Ny}7Xsc* zR&eAp>BWND*`*Z|w>-pMREyBg>ciUa?7wVT>m5W85=?Q~x<1*K;+EgAIQ!w}P+hZt zoJ*8K!RdD`QYM*)ofEcB52#5dKqEurp#uD5Ev8tt-5VdQt=_L4wcf8k5>|Qxx%61N zkmmNPScTNl&BIBqXf$4CZF5#C&48G=@q|X`M94A~elDvfUKR@Z3Nh!ZZS%F&s_Q)c zKb_@x-pB`xcP5kOtOCDrqUntNMp-+o{E>$D=t}dx#n}} zIvpO$SadmQ>hseVlk^Hn)*Sbvibd0CHCd+I6o*P;IFBq(x`^lI$c@ad(j4VU!UatFDpg8H+^*r+O&hm95 zc&%|~apUR6{mHhtMEq&ZW}jw%@Xv$gkPSVXm4dqH2)wz*R@EsIZlTS~pQ!Q5eI)SB z-uh9e-od7qexjpFKMptTGZI$Uu&2x=g8OyGmx4{B3q9jJPm1~yV7kqk!R%5S|G{?u z@yGTw`SIlLXEu)bWADq_ips}Njr#bB(JlXD-v?`=W5-YUqi<~R8a7`v?gZND8Zett zCLMkyO%y@Y_>{s@Y=@&p_^ds?y}&N=&@(qu{RjL^0r21KV`PgT1<-=}Dbq^DgE_m)PhQeRa3pG= zYeYwj2E-P>ItSmSBh`iG2RNLekLvz;{{;^i2CabGLJ-T$tQkJzlG6%@Ld#4J6hii4 zU6+cB<4~eU$t;%G@#SAU zTP;+z@(#&xOK{8*pM|d_OO4^4arJKNI$22atg_P=lXh-wy)^T^gPnYXh&q>rtWLskP0Mus4)GFdH{``gYBj!uBD0=52 zJDUX+4V^@Pm9GUDXB+QYRvb8_W(vOEsehh=@q6&9eJ6)bWMFYO3o;ed-I_zim&$$o zFnr{Y*V>D6Z^bNWF0!x(bi|2C@GHl;H&fW*gO+@pWi_tp#)Qr%{D3ED-uM~u!$lv+ zqeFzWBqO7QoN+@N+|`DvPER5v&E1CcY*#7xemWjOo7syOLBqI-<|NS}1a_)&lpgCS zt$WsrfCyqByrZM|P1Efmd-zjipp9;u>w)=Dj#uWxO*c_G3`Ib04^Uy6 M(j8AFCsxV-1Gs`*!2kdN literal 0 HcmV?d00001 diff --git a/binutils/po/zh_TW.gmo b/binutils/po/zh_TW.gmo new file mode 100644 index 0000000000000000000000000000000000000000..b02a71ee6b1e68f2bccaf882696c939761359459 GIT binary patch literal 121475 zcmd?S33yy(`TsqIvb4y)?}tKY3Yo4@N=XW7n?j*YYm=5jDD5Pfq@k0UFq5@Zib^_2Fl-ap@Q^XxE_2H zZUWzfJHp}3i9|IVWjqA#hq@O|hBw0o_y?$PCKo0WBjF6VJ#2(i;Zbk`yav|5m*7}9 zd{H8?8Jq;SfV1GPu*G;HtU`S?RC+uCl@1?3xm)khL}Cow4sHu)LZ#o4Q0`7L^>uI} z>L=lN_z6@v#xC~pYk`vgB`9|{Lz%y5`fDHN(`6jo2mJ$}a8Ek`!&-HLG_$pNVH(Bb{bx`v1aBp}M zR66|5)H^Qo{xm`Pe=1aZUI7)Kr{KPDc*?7%8COBsyBR89eqr2@NGd$jpvvpfP;xGU zqu_H;_CJ6M$L?*3#6j>#crd&U%D;D^%xl^ci8-(xN_`8I{6E1)xI@~f%L=$Z>TBUN z_0wr&&P9MHTDE(8755w80hb{O190DcpVyN)G3{`%2>GJxA zK>2$b+zdW$d=+km`Y*Hsj!-Od_!q2iu%Py21WakiTvsarYUC1W`}? z^6R8EZ1{$+XCK0msDpF7zk5Q3??6}uTcO&8ufS?}7nJ?iq3pd0*MsYx>&wALQ1&K3 z#p7@&IV+*k>r%J@ybVgu51`yX36t7?>6&S zjQ@fP$Ij<_{|827x;QU1&%>I3rbFp@gjH->L0<+!woL< z;aLI$)Tcq!)9*mZdkJm>{|V*)W*7N#v^U%l^+9lF*a3&bQ%rpZl>HmvUhrwCaIAf? zPmdZXcQfE5*akO&7eJNM>*40`UMPQ_fm^`0q4H&|OMJL@f)h|5Y&_2RJt(=a!@c1a zm-_O3FgybF8Sr5EN2qX3y3FUt5pWOGUx3P|8;mbOg?H`Cz5QLG+PgWXJ`V1V`WmS6 z_G35$ehih)`(NSP+pj}~>rJTgvhz26de4Q5$1(5#cq5z!--eP`bEVJE7C0I8m!ag| z2X}xQUFF^H33o!h1WNvKQ0f02sC4)hoDH|U+M6$h6H%WDH-!&ErTcSm3j94(`QQ0l ziNwaR0d52r!rfpyRQW#*j(}f>%BM@SJ_^eIb#OoU0#v*R6c%U=GE8x{%kQ+xR%1{@B(-U z{5jkg?*47BzYM-Joc0MGfc|;k^XdO0RQXKYlt?@m?H3 zyMwU;`a9mANSut(6%UXXaMTYN>qrgTvA@NG=wWZ*Az!X9ec0EJyWwc;Jp*@yAHogb zmXG-K+65||_c6|aN}m)|yL1-Z6<%cK_ru|+pM!Xtc*)eS!mUuh4wZi&!tLO&M}58D z0d9+WZ>aJx52~Dg1u9(kzyQ7scY*(e3g`BZ`T8;%Dt`}z)o=+^`9B3JAMSw~m%Iz* zZ{l&EzT3myQI0h(geup^!L8vXQ1QLZ)UQK@?;lX^COqNG@nWd@k%6P&X)u5{LY0r7 zz-sspDEYfQ>D!?L;P$9L59LocR61M?RZnh*lKUuBKKusC{y*SuaEqsW{_P7D-V{{5 z8GzfsuRz83N;n4I2PNeePM`4vvN@Uvr`I zxfd#27eV=VD^$3jfhsS5fSbT!&v}0~gRWegdZF=XC^=_BxxW@F-VZ>9|2bF-{{|<* zE>H|Jl@=zu^0iec@R2d*B3k1yp>Vg$nQAq2#XjGhg0z zfl8+-Q01W6c$D!A#`EDc%x{DW&zo>(IQ&Il-gYz2fNC#Vq3nGLO8#YVI{ZGI3jYN+ zhWota>&1a^E7Z+!Q@FzPkB2JXr^7Aa9Z>e3gd|zw4XAQ|`^!F_FGHz6fl0W_E1vV< zo~Vz9Do@{r>%zOCs8QsC1b4OE2$0xViM9 z(d@k z`g36b^Tu;b|8}?o`mey9;NOi~zV5@f7gYN=8_He*E`w*o`S2a6@;dzu-~Kc~rT-GR zHCzQ1p07cbvpY@w3{-jfJ5+k?@@vn1pz?n%91REHaCjxGh1bH#@HbHMw)>6Gw@Fax zGXp9;7DA<4kMSBA8;@uDD!V93!~zxSZRv)1o?KQtDqKD0o& zTLI88F0)}VeE?hoIADlZd$@8dTUDqRkT%D=p+PlJljm8O3WoQC>YsCaDh2VY+r zpyYKym8avN z_z+aQeh-z7A3@0-{g!Wc+h8^7^Nl}%iuWI(%I8jR`|$4v_e6a-RC=5OcZT1Ali-t3 z@%+@d<6peG7LG-~1*%-14tIo?z%lUqQ2G5EsB-%$RQhl6SD&9XaC_7XJ=S;$ zRCw-%yTM;Um4o4b^YvtV7@(dGl`d_t6MotB-!^Xaj*s6sI05q(sQ8=-70w%>(&I&_ ze18va0JneFr~7EAbes%TpO!+U^Z8KWeGV#L--SxYDf|D3rZ- z;K6Xm_kB7phnu3l0PY394Q1~&sPK&Zz_%M)!6fPcDm@$FX0QV`!U4Dmd>kr2UNQ3z zq2!PJyHCd*;KryY!2r&H@~<5#ea<%C1XbRihRUyZpweT*552p|a5Cycq5L}wZUt|I zO3#N({U(&$wf^Dd?E<$zJrhdqVNmJW2POYJGk*Y%L;bv|*Z!xkXWPKd(Vqy{hqK^B zI1dK!WGMfxhLZmyI3B(RWpCq;e7;PFO5c9CF8mTy`knzdg5QTD;p1>a_&ij4zX7*} z??Z)eqmO<0ng&%Kd!XX~4dXpf_I?fJ|7QR4?Lq@odL0jy{^!B~J_xsgZ@>xgBdGdN z^NCNt`B3%?aCdkGl=-7j<@(QXEZpK#FMkG<`QcFMd;(N?yc{Z?Pe7&T%TV!q3o2ay zhKl!A|Mul-H>h~;4M)IvQ2BTmRC&sp`UF#-17-hermmj4Xy(pg$nPF;d<~@sBr%Vs(gQF<|Bp;bMupJpv9o8D=%Gc+i%1t+vyh~sJ?=bThp~C$xl>ful z_Hs9eTcX|_Dn7N))e9(lhe63(0Y3-73{_6Q0ab1aSHK_LZ9w`5R1-FK8Lgnk)>kLaY!JVMm zzdTgaU|6hcP*V|C?K7uOO>#jS@jb|o8<@-KR;j4pc-;RJvuWq;l?1M`G zZ$Opv2chKt7ApVWfl7~c*7M=t5-J_1Lit+{70$U(@oj-hhpd@@393Av4du_RQ1V}g zlKZx)KY_~Uk?Rk0^>*awx*XF$d4GE;vKO3s6DID7^+z!#v>dAkwb zd~YcKXF|oh87e*cp~8Ef@h+(Fz5;iIzlVzF@R7cJZ4ITK0F}-&jcrirce0tE50&oU zhLU#+JODlb6~2E%g`;5uUyr(=)aO9?dlwAg&!EcT-;Eo5&W9s_YWJo>g`)|MhIy!Z zc`+OdABJi--h(^C?KbrCr$VLYVyJXK%Jffya(@MsyCwTfrtx)Ow zb*TRDMyULG1}eQ@hYIK4p!^xJvDXiv!aE)+ev6^v-3?{`3@G>Cg0gozRK5BIRJhjL z#QQTADqj0T$zKX3XQlC6sC>Q^s-8V#>JOmYZMLb;|A|oP*bJ4A1t@<{g-WNJj6a0i zqkbN$e*e|fTWsd#jE5?}3!v)Da;W_8HJ)VpXF4r+j>)_t-b*OaQ zY8PKlc7v^`_lGOsRWN`Xjq>pt2iHZt6srI0fYaa!Q0aa@tcCBxsc^!sUOxks|5roB z>u;vN+it_$IJO1K-B+R9Jz*SP<>l`W748$D%KcqX<@7D6{9Ai>Z$1txUdy4<>vH3> za6IbaqkVYxh6+c<)Zc{4-7{bA3PNP z+ti2d;r+cB%KRy)`n%Dd!xHuIAlL{`hthuq%HHNR-rq$~{+$UG{^z06VR+J~OC6NE z`v0na#Q1Sf(l>P0;d4Cqd%~4+nRsU~9eA?wD^T_IEI10@3g3V~gID3; zu8FjVI5>RPu*7K$AWl7m`a?n7bpEi!66}pzG%WEwcqUXn)*kB1bthD~`k>#;xz1b1od@@{!dMP{--T_sQwpikMFr0w;3sCZIg>wHYRQUf5 z6`s*Y`u=sQ@d&7VJ^?EKzXX*Z--4=7KZHu(PocuM>r!uT5|n>UQ045)Q03|}<84s! zcmgV2-+}>Lf0?g0W8hfS%b@Db*G&B&oQV3bQ0>g9)G)XHw*>Z~z5%wuU0Qv9f7y65 zRJy+kl~3!pc}|8(_jags`65)h-Dv7xLzSBi+I=`C!?~zCVF$becEKIeKHR53rRV){ z7x+7<_HMln-wxEm>8MYJ3dbW*_TPiDw|%EKpAVI;=Rn!J8!DZCZ|b#{d;i88J7ELn zmqUg3w@~gj?(*fd4sMHjF_gVLRQ#m4;O9_Jg`2UOB~zZ9xmJOP!zA4AF6BQwmcTP}o>e;$zloxdJL)k3i+`2T=A$f7RE6$j0>Fl7$*~oe$M+-wsvJegftGuTb&W;4B~ReWBugBvksI0Ojx5Q04D7sCN9t{%m=kZ%4)(mq3N{ zbSU#npyF|-@#j$K_$gGlb~@j4Z>aJy$J8mPc=kipldnR#yT#PcLdpL-RCqSMz~{#} zD7kZ>;?V|G4o`+t;Vn?@?ORag;h#|UH@(oStD*ck0ID1>GxZmt%Ei@C1NzAApMIPfYz=sCMf;I39iqRc^;!>fP1Dk;AB$Q0cJb zGM~O*fGTg7LFwOR{5e#+@(ENwxBKOOe7G-Ed}ctU#}QEF=@>IV9V$Q0g$m!5Q1d%HKQ-=tg`dwg!h;H)htgjL<R5_2JqCDxF3{m5W-a@N`3^@0n2L|5m7cehsRgy#rM)H@VK6 zPlj~UiB>onc0iTO%b?=@GF16|4=NtRulMqHg0epWDqWYuDeyAmi%{vb@wa`vlCS~w zEU0qzRVcZaLePt()L%CB4`Cj4 z;-+DVGe7}K{=bcz-R#?mDyVjSA7cxYe3-zuo^o&yz*yP)FvB5Z~KH2ov)@aD(D zN$6i}d>YFBT6g+!T@_S)I}|GYRzaozWl-U~8LC}-94bHGg(|N#cX@XysQPjeRKIr* zRJ;Bs7{HIA(tU@!efuyMO5F>m!)u`G!5^X0ahvaZ{V`B-GjN3L!FAzHQ1$ChsPudT zs=R#!4}u%tWwL=bUz6ye=alr z2r8fc0F^Ey?(^os=ccEp^wKA zQ01opmCjc|Cp+5UdKSmJJr+|K*i%*Q10$G zz5;?NHgz;N~bSF#rGyC`HvW1gUW{w;RLwVV?JI7L6z@zD0!ztwX@%Xa{nVJ z|6YX(-P%LDjE+!QJ7uPx|%Q1E9+N z*-&!shLZCXl>9eL|05{>H+;(X!`nfne-&IC&V$PLCaCu2a47r7nf_^}e>PNoxE0F% zYf$#q|FQRfODJ_Ul>d7}rDLOUv6;6*g*RtB8IDAK9#s6k3003DgOc}wajl>D^w=1x zo!S{HJtsru-+bc=Gd~5&pUaFl8y_;h2qphdQ1SmeRDbaaRDX5A)873uV*&1i{wYxH z$OBOQ)Z0+$HtHE4-L*>(mXMH{2+c+00z0y$mb0So^y3o{jK!xXND7o)L zrNg$*dH?n`E{2NNDyVp!3YGqsLAkrz_)9Zi>v>;Zwt;GgrbET211cP6L52G|sC0M; zs{XtTCHF0;_G-Nsy#CHm?k7R{-(u>cq1uCspu%?-RJ;9{@m;8N+wo^!UM-ZIW~g*I z4$8mtVE}J2J_l7U-!t`gFM9L+pz{3)sCbRM0gKWINmmX0u{auU-Id+Cse%W z!vJQW(&J1hch^FdhdYfA8Gi~@E`DkJ8&rK<`(s%gV@-XA@p7ni zyalQ~cnod;pMok6FG1z&C$I*Ndc}u(9+deCSP#Drm7dQ-wc8)VTA2K~kJnLf80u<% zHq--`{JU{2_gM0CIOe}bXDj$MEbRdggy&)RTRe}#>{*`s(YqBgWN~GAC2G1QxBh!K z46i%UU(7w4`+DqmW3~zWCA=O>XU6Qx%@R}p8#}rVK>avwb^VF^Z|GmgJsG`2QJ>AN zxPBjX9lVcwUEJ(~dQsLc9`qJ+--X^jFa_3Sn7@Vea|Hb>K-UPGUOH9t=F}H{Fd@Xh_gj5;M$rS~?Y4#SOH5ape zx&OdD7X7~$ttBo&Z*%SqxZmXtuU}#B=O~gUbD_yQ3p;=3d7jzbis$J(r?IyW_b+jC zFM3azyA4rq#q&?m`zQ8}H2p84KbKAn}^h~UUn-6$?i~DBGGUzcxNNmTgYXp1_J1=m54)aURkAm?fZ_WK4f_aU( zyN738+oGOmdLNWr8b}@VB!MnL{ zLH+{xvg!W`^#|BrANya0Bj9G}eay420JhunILs#6^OwDG;w;n}W9ZTtR@X}IpCTi? zX5;QB*gKm0Q#23b{=UiS=J_w!y&gNy^Q`e!CuSP|GL3fU9BNTB6-u0LZZL|jGt8gc zFq?^t<4i3J+Edi^BKOhgzXwk<^Cx*;VdjVP{5JaEMaBc@eX-1+K6CRB`Zr^@&CGW- z_bK=>`m?e3irL*6Uc9)>UWJ^G(=m z!mX}l=wHP1{@f>XpYF9eckLfe!fvPOorHNK_eExQgz4XJ>foi(@lRn)E(H}lDm%kRqQ;-{g9de5xphczd~<+>^_hF z)!aWqPuDNF=kd(6z+HF3W4P}`?|kmHu={zFwF>fC3KtEh(<8B&u_JZHzzKrMNOqR@dHa8E$gSfxWy%2rPF(zYI z*SY9j&ix(KKY{bOmm=d6)O+(h0sfi$ciy@?C-EHmZ<#-TG5y!D^JDaWWa^GRb19|?4TUQ@9OB;zVqyCWl z80_wb-ZR{n@VpeWTX?>b`#J7gu=9q=`9A8EsCP%b7x%ZY|1H$I9)YKzca*8GHEsd7 zL4OuJ6#Ff3cQZ@EJ-Fwfzpv^20q%&rAHojYy$d(uo{HX4+~4DVlv~%0xLXH1|HS-l z)Z=;9H4-+$Ec^>*x?bn`ICu`~tGGAgUW_^`L#`_B+1%?P^E&J{z}@7Q=cnNYs1M|M z6g(b&3!_K4bv=rnt~=1z^=}XNyFPAz%{|fV{M+n=R?fxj3KVy6-+-Nixxd2wJo>}1 zJB9l&)YrqOVR-eUo@?p}XdZ)oUHu*6dw4&huW}uX4YQoulC; za6|5sk-st2^=H+nW6pywL3K z%=4b+hpYxXKWuJ<{kV7HZbp9vcE5%bYfe~;&Ba0Ke{Jl}?!pYVL0$$kL6Bhfn*^>@%O z@ce7;gSnsL4zHJZ-q_rH1MY|VG~7Ogh2^NXl+KuNt{0N5ES9xBF z;tFIu${k+)vFEjU&SCFy44dGOLrbvPo_}h7+>81*CjTDXU5$DH>KovWsPE$bota+@ zyX^US<5|f07thadw_^8eaIEdU!ja{m(b{>Zx--imr%*v0)7o^!a} z!TkDZOz!v4`vT^tbL(p3{t?gH;qG0h!`U&O_eO66)bGH@;Bfc?_gQ9VG&}%%y52(n zS~vxDkNNp|)c->L4O!qinfqYwFJgDLx%)D959RrD+}oqSf_njaCtxpt|3Li{?(n)5 zy(uVmMeiQd{3iUBJuf%8EttQ6-q$4;H(xdL4Ny=xxgV1ouv;Uq}BMvv(^T z9rL#v^R3W(1dhYrdOUB0`EIDc#Qk&hbk(DGJNNdev*;hf^J1RQ<~hmpx!#)F-#Z1p zr!X6i-YMMIqRyc{1L`^n9)+9X@J-aSxc879Gnbtcc>X4Cdbl6tejmND=q-)eNsJuX zG|=6e%M^l+e6BmFDoh7Nn2vOBZ^( zvYkOsKG&H~bq8J9-gLevpXPTe0a=n5DXaDE?fG<}5Cn75+0NeO1Wvm1IywsJ-Vu$d z?zGcs>P_W)gIq@>Yp3WDh%Cf(3IER1-jeXs%>3o2T-gI|5+e?fwn%C2oYft;< zrgU3xS1ud$=7Oelr|bmXsh%Ff>Z~>|PX{x*@>t5{2ZH8QYbG6Z6@qkkPw&83$*N!> zayY9C+Y0tj4$CY=4m)z0Om3CZtFWr8w{3a45Tx?yAlIXyrZTce=DDbL$d8U(zB|=R zI$|)osxUgpr!%>>l#5uwB8Yj;C1fzZzbexowB@qBsjh4xsLHeltpmM2J!-28(^M$x z^KHw!RuWf=K)?K}FBH<!p3cbiAtjsZ4Ja?|L0^`@x8t}Y7uh3> zL1N@gbKRb9?dx=5P_C59bA@l_KsMFg)fUR|IWu$|+5_a|yL==ixeqKrD* zVa#1&h~;!id>eDYN~(>EA2}7qwIkQ(@-FCIPP7#jMXNDK2?I#yXWfvRz_p zENRk_>1yj89j^x^sS`@{F;JXJbzJk|+tZ-em5H)AkUz09Sz=R}+tr=wOiQd1Vt#WypDJl4&yKFk$Ud-|}auRmfVIayJm3ZT_JxE#KJH9_*ooEqi zy_&j?DQX14+;n%DP7ut>q&n%m>oZ-Q*^!Zyo?M~OrGB%vJ4L6GO;4Lj3G8lJ>c#-8 za`_cYYJ#pwQzq90-EFyix+R&;bSybGnMog)Y)v0u6ZG`7)lkIf$|Ipwg&;XMXsPYa zcO?sL`L3ScC6O7yO2uRWa%)3H{~>a<{H zE<3t6NcZ>T7=d`b&|kTcb~2U8M9%Qr+eI@PMA2+f-#dy9v$-VdR9~hy^p{kekx8fM zW4u0Iy6}WDO59fRcV3pR+QO-z7sqhsG?^S2@SSjJS_MIKUp^bq=k=uW1;$R!l3G#k zuqruW3S$O3GP$doGFF{HZ38_9eUeKgZ{i1SC9-`&$F!Q&LzZ5?nH*gR7Ns(M7)EM8 z`jh4V81nbXUJDDAbmVO%>8fc^uU0QBTu?1@!7l;uyD|Tik3_DAkf{=s*w17XjxaRdfwNE1@=la8q=#J7dgKBk zsOL;qE8RN|l1Xgz=5m>&mt-m`uCGTfHAk85sL)BCk#0WO;aaa+hiSn)wDMi;>8J*h zjn1glk$K}Jl=;%x)>iakAerxT1<8^DG%e4q3RW$rul4Oa(P>QwSTi3qco+z39ikj- z>PfeCbqoZl3^S)J$sWv{GslfH27;a(X%afF+j0gc|%bZ26|WHahUVjZcrbgU(vg(%;|m$i)Z=^}!#nWWL`W&YwV zT5RS-E=!y8AlB8;Uk!3M7k6$1r~zQCoRH$VHZ2Pk4RftWQO$fQ_B}z=idZ0;5QZmf z-rt$Kg(Z0%D%2}8D<-csLUp~!*r-ujD6i=h2DG4 z^y>{S;lg>9S+u~XEF|IJA#$&fP-5}Z4>yJwRkY$>t@wZ1;hXnuIH!$tEm^$5vSD*s zQx~;Z=DHo%t|ic5I6iRjEm22tyr3a~x=M{gy0Ydxjq}yFOQ~#yrl|vGsX|#1SGrXy z=F#BD{9KOX<>^dMl+NKpF{_v|Y8lKHSIpgt&|V1-=^}>?V7TU&XMI=0xJvcdkGGR6 z@Nfmzl8hQkuGP9VUo*uNqU^>hSk!WpLPM3xZX6Hld=&(1qNr;ciKyF-n&Pnxcgagl zY}_KRZ&kBMa$RtF_f*z91=aa<4;{FZneOk+r&zH_GbLH+*5t-mta=cKX%e%Ju6`Q} z*Lu}7H=K@-h=b6?T=(Ky9ilmpjD1@bN};^5V8o(IAB|4bfBK9uK`RkNWmM-;k}<*b zwE76?o6UY7|3Tw{%C#gK5SZ&@aJ`!TdT=dibAzCE?|ghvy@ytYGkc6tC==Wh(CW^h%p(k#iY8_wkGJ(JFhW%^JJYvl$!i-Q{N7;S6s&4G+4Ds15FFZ0~nn zk}DBq0@mE&d<}TDyw8lEAXNEaF7iEc7*5k|nN9QEzeK*PJ(0&%yN;jSFKe!WA%v`S z6Irc)lo+Y(7WL+{dPe_W)n4QBUrnla=X^JZktMl}`L!Uu5*?Dltw59tj>28lF5lej z(L1gVBU&7jNIagd@h*j&?Pz zHn(Dfqc578x(Tmqy2HJd+R(PbGOt((D+&wSMAlLK0NTsTRuncJVXa+RhQ7&^c3pZI z+4Ql3S}PTSYhrY(M=h|##MLl&Oe?$HWVjG`5el6~ZWV)N`6Yp^Ir7K5O=<1Mg6a2> z$hUZOamKtlT1+p=b*Gq-%hJR#CXVdH@{YAVcIs>mP{C7!Z4G%k$)t$kRLM0X*E0}w z=i0kEy3+0AQf+SN*V{!O*qiERwU^Lo=;(tifkz=Q$9h*XT%>p(1&u5DL7ZUzPpxKQe5wnPOV612MKVYTC+f{LW0j6 z`YI=_B#9%1m!<&uK!@u#HpM8$(*!105y@3u85Uldj#s$mr}N!iy{x{P6()L?fNt)d z?<%l7Of)qLZ0{;aOvM@LXJFBR4hiZ) zkQ+y_;lRRGt?xdqS0skT0+eH1L9?rl$d%5bU3Y#!!rTm!!vxN#C?iU!CKja_L(9Hd zA%VQGVi;ITCPq>Ib*6eWA&XPVB=>O8atI~9c*39|^aPNeGanb9f+LLOX znXKo_US?zlaVOCImCd`%KzhD*zU z(71poKorw3BduShuZamPW`Kn&)19JFYDoA$^j&$b5d6nJ6Y>AO&ub88@}h;g_Yy04 ztSM&cV3ZS1+e%=lef*jv{GrIu5HIDXL&ecidyavf`uTJ}vkfnaae``%CAV$3xCCd2 zrR|qBD(|XYr5Ve9Aq!$Xj6pd8Y_NLQ|&1=W0YFTj{DY{GFa-(DQ*N*IA`OE*oj7(^%$<_>^W6s6>8niOW4AJ+R( z!l1Nibjx4G^q>F?6-hTc2#4S{cnamMN&1zK;=}P*X@-OWSQCi>vyQT?hz(W4utlkt zJYqb1qVQYz~q+fdDAap8L@Jv0XGFnCW(%5=SZg9Jh&nE{>bM9O;0CX7oBwlYmt4bLvN;znI?6pOURQ2)sq;D3MBZt%(&BPfl% zErd2$DIb~*UK!&k;D38%jKwzXM*5Dqe0?mOSTjWVe|Tk#l=*M29F?!Lm8O5de$>$G zY;@Hn%TDEPW2*+%b{1E7{=c_`GUVo;mF54xHI06U=ZeKblk+%upU+tZ7||i z$Nbo@h)W9tQqpS#1$Ro1w^w3PBA;9bCUGs+wk4NDF$=|23R&0^ znq`UUcge$XfJlH(=b^+XVln4zVY)@g@K}R)982BsENB#VxAfPaZtL@JJXnz2s{PC| zVd1J~7?#kJe2FlHC@!T*QVO{~Ej-7s+1lvs?&=TB%nf|qyC>~k1rt4>Bq>NhM;~bt z<*btv216+;;~_)AYQ1|~&5b;hoi0|O0$jbF)V@&1WnEL)0?w=bf_R8x(&8ZsL-5(sR!Ukp{EP*wDD5)_s$CLLVaQo&q^TK?YtL*0I6l@S zeGZbS!CU50Q#fePJb|NDIr4kKb<=0fY^}!*)=vBx?}FM<)dc)otbn?T~qU6a~j-v9T&ctEW)uO;!WGf zF+0?`07ee6sktrDmByz`)lA+y(e7M=b<}Bk!Zr@Sv9q}>)z_OFT@x&0bANOVnfY1Q zvP@rFSG!#BQj@T}N5ARzPLq;cIZ01P@$%^CHIPR-<9Di8c9W}=CWFt~SeRz{T54k_ zM1n;Q+8m5L=??leDQ z`zzedsjHtkGb~DO%h0mOzpA-vxemsq>>V>&&1rRk99V)#R*s_$-aIbKPb5|^tF}y* zUx^8&MbQk8ZfhgfojnYLlgi}S1aU8WL`kHu$)N)?v zEsF5vk+EN~RVd1`4HmY0>gLUw)zr}JJ@K{9bf|b572#ZO7psKZa*+ksw$)q)Xq=gH zubYK==>>*$&y{c97xsa270&95UYsrPrZ-~z1~5Z$PB-%MQc_0D=iDi()ojQR{jkY( zv93lbQ$Kxnu&DGjVKK!1smiSb)l+V#@?O2%w69EM8NANXz6kq` zRctHg_;vEkZ2pXxNv40W5lKnia;FUC+P$zp*cQiKRXSJ&4^rK1S?N$>iS-$5X2-vZ zP#$>H{(#|(tPbe9FwUTI@Q%BCNp)eClMDywle%#Dq*~onJhGh z2QVx6DlPAGgI;nP!50=rG;_jhgidnWhaU9KonC-)Z#9K2N4ZQw)6mcSO=pgB?yC+& zW2(-z&Z3iXhaQX11wCqCFl4#3pyYC??n4=!*5n9lSRQ;t-O*_(yA3&9I=PdkN>7r^ zC#*YZJDb#`vikFwnn;cADl9GZcK41Z99~-43EPt3L<&21yIQ-SX(zOxQaYUz|CN%$ z!XzsTbWov!9dBi>f3LTKc`?xL6ztqoXIGo7C3u0jE8ErG*UjsC^17`_bW1;D-F%ui!;2pd@sYEH8Nx1hXrzk4qw?+Q zzD}WLnBA`EDiE(-&wZ_h zFKE!E@wFD`p=tG~<8*B`?@Tn$n>WXsuHsGF5hK)gx>kL}%(Q>E-QFmk-$|Imqu?r} zrTOlCouAKTa-F<7U8#NWR0!(O^z~D_da^hpxwRLs-QR7AjB6$ zw{WMkuKt5K(GhrO(SNJO92CZmb*~>J@4qGq0>VLs~{~+C2rdNzF})0XP`M2XcJD?Rk*M(DzzPZt951RPJe>rPnB5KyDlBn zVb-66REOUEYU$>)WE^c)ez^~8w6qTCqBTulOfJWr1l0vxYIU-uYl&-cTiQwlSZs7A zQpX%!_h_HmTCOw0?mWD`WapySQR19lCCiuCTp{CpBE7!C?^DuQ&y`qb=|XQf(x2qJ z`1AAj@VgoT@8%weIRx~*d@`vANJ*6O3vSK>@Zdf4J%X@T;tpm1JN z-=NTVfP;yos9Qd2>&v^>+^ph6yCp6lD@!D@Xhyz;Z_Sq+ichjb?p9jDJabEvO2Sx$ zv@?Ww?gs#_d-vVHeCuvW6>~Jn3KxkJinF0XOjyaQxJd@u3@an+(YemD5FFhS%d@1u zFVMCk;3I(Q=R>bFKqw7&UID{pixM~)rKvmas_h$weKah3FG^7h<+x#PnWT~m^EQ2i$26 zhaP?4kb>twVx#TcY-bJar@q*z6%oC4$dH;TcePtB4C?B%g3g+x`SnzeW!Y38GIc={c z-%dXNlGO-&hP}s@@?##VhD)H>0`@p1maDw}T&jk)k*ku8KkqaZG^TqwAsR@QAL6!$X^UCM^a?8aI1 zcnQrN!%gZPv^1Y-BhlJvq1*EAQQdCLGRePG(J0k*x#RRH%U+C=BAZ#g;p@8jm>7NS zfS2dj$V<|}rE;YPoX-RFP@QHC8XRyy{yBmoYvhZjH1>BC)wdrIdr&8vPPmy~wVbVs6!PvMtK! zKmGwr32#b!2Rkm%hLl@kh4 zv|ZsgvhbXxQg>2P8K!TfrL|tlc!yH0^PAyT5K$lmUZQ{L(;`?ZwI)c7Ra&z=&&-f| zr4>Oxk92D-T9eRKRizP<{}Ls|nATq_tytAYk?-!ylhF%~C8P47k@_j9cxjs8gjfEV zt|R%){^Xupjl-QEU^)BYa>k%x8K&{Y44(P^EoTbl-G4zud?8~Ef}^0=3Xu!dnuns2 z%M#CRWr0#MRcqevOCS`4(yM{4jd!TjUiRjux&`%2kmR%*XXyCc5@+66E9WCNv%}SP z6%#vLVv@poqoVKXAU13rOO6o7F&Xy>)7YVuxFa(S*S>JXrM+OcY!Dl()-$qkA2!nh z${?xojDUxG$U}H$-4Bv zUoIgvXDU7T)J_;~A1fX6SJeu2!`QeGhg-4gxHKvtSC#9Mrq@Z?hb-N@3*6V1B`)4` zh9aZAIh?O*p{DiZyE|qTatoOM<|WggS#ly<>Rb;~r(o37rQG*HYU+CWS~cw|pu=E= z&(hY^xj{!wT?gOzmXbcTrj8TsHFXP|g(b)x;tG?oJh*PRX`(-B8xBL&pZcA8Dab(_u{u*jz0+mz4(aEB+L+^^FAF#!SKsH!Y zaF&N6DxPO@hQ;8JD6uLe=h4^NDjv-$bM9V9(HG~7?-6LzyHfV8_AGxGBR_ho9IruN z1&JTM4+U7(SC-K1YOxk<-Lci;ONxrs0uAWw%{g_6jdSK&uU4Ky>V&DUe4Vq74?T+E zp?buqg^6?}M<)ekixx%6>sneJcyuXQ_7mm{HH(2UU&wTgmG`4$FzWMp=nRfp%|XZ3 zTn-PNwK0d4^0so;G8!UDv=CT!HR;rk$~;3Nrm!{#(_5>072CJOZac>J`-+u580MB0 z{K;Z9fL^F?kR;6MX@tzP+7O20Bs89|Pii|SlBCYqt@GEl_*xt;tIW~2`_sI7;+HR! zL5&ON@G_SsgP7<@2xnBaVyX5`FV`l+*1Rl&yc6kW!jTVp!_c!gf`$v)P+wNNgepQ)+?<jXKQMg5LKV;wYdU0pv4Nyvw^X9iD2kRcW_W!+lz6d*R%Fb>{*7fx+OvbsUgN6deOpve`HD{P{^MYnEJiAHpS^b&KWg3u;RtvR^g|@E#(a2Ci zhz-G(Nr)1SbxikVLB6wGjA&_0SR>Nac^}OtH))=euSEgH)?O)8|7}Uin>)$OC&7K=U!aI}pZz zZ|6zF3s1AM?iQis6E@_`y*uK%%%ldd&Xe%Wr_-Q7S16nAjS=sR6TE!V*InTWO24V1 zaZ;FgZfal)b%EbX3J)GL5y#_Vkdai9?xeLW5LjKXM^4#q?*^im|jFy7)#x zym$77(PYaNbT#s^HwpSwAlw3Sycr2Y?;4TFG)w~peK9>NTgPE^jU~;tjG;t`qOo_>FE6`Mn2)RA=bmXCL%s* zbZe`w4OLIt%0SHZeNj}J^kE2gmGotD{fkxDGrFN{2iubx(G}-}?z{A%cG0rFQ5|+Q zEllkB<_P1}nRZ^EcdERcqJzpqpOSPPG_$La5mAe)MrBY&3^kdn?72@8KYp>(F?_uD zzi?DoeMrd)0fn`45dL3^|9|3bm_8Mfd-bDCe~_F#`qGK3OZ7&z_Qg`H+MJ_A`4(-k zeP=!F^ywF6|6uGp3E}cet?xxOK?oZl^T9Pbaub`Ad&_v`3{|&mN)dV!If}nL@2jz& zgD4`QqZwLI@`m`srGavq@~PKSa!kCfsN!ye#_(hvR-oGTOu=)iE|GzWT z*1B4LLXX3ap;(LEVqj5_8ta%WtuFe$E~upsnATF~K78e7m^1xuVbfuA{ZWn~h3LcP zVLR-_xR|=1h1&k3^=5JHv&5|K?dV1J$>b#85XrDGHIVBgP@G5T>Sb=z&If+oqC|#} zgohG+Oo|~<6B(NM2x&2}G(BAYkof*v&u&g$6riq;KNI6C&^h-HYR)(|2=3u57OMm~ zx5(%-yXd(5$+uF)f>8El7KTj~gP|~Zf5Mhs8;zBkm7_@te?q}~T|KY0kaLGD!oyMR zt}pOQ{p2m*7}OgpHa_E6nJNGgcKXDMwPAX{UblRse!xwn$XvIsT)r9~2A7CcjUj?!Q&g&bm9gfFi0NnV$%dH0zyXNdzZ671eEWMjX#Pl1ygmTt9@meT043uk_BTPEQagbr1^ zSJw2(4M;1`ZT( zveKE(Na+u~Tm|=CM>w$esWUZ*S+IVh+(tt_pVO%nc{Gdvha@o8R`|s~+j(^6bM4fe zt%et-dR@*Hbn!|W4UB74{a?fpP(OMPMpYF?Ig9gC9KustQM>fb0xiFBOv(27{U7b9 z1l0ukzqhf@O_Q4#IvL85aCF`gdsk4$Wa3^sclxd$HQ6H8%6dQ;ao0Y|8=t^3@{3Pa zSf;vnDV6p5W0vA!n)t-Yc|pTO;@d&C;_TQmIW7%rZjww5Jg{;hqtk+gMIs)hppM+cGE-W#tdOI|FFCYaGKzCvgeGpT>vVLW#v-YSKDpV~qw|%ap({jY!%N47 z(=4s~MKk~1^iZhv6jaE8H2=hAk_DX?b|Eg zpoY7{{$P{Y<4c>_Twmw%aCw}FrJNCkkKGM*%9VV##CJAbCeiLFPuN1`j{pfXipVg^ zqOc)era!K=!d_a6^)|8oMwwU_dtqyPO=S<$|2w55P5lsXpeR9KIrFK+p~3%`!w zo6e%4AJ$uoTGaOKooUB{(lBq9issr<`) zK2yVlj$HTIe=)dKCp8Lu%AT{(N-Ra18p*4+@?I}1T0HgW-hx${<@;J&y9&$cCg`dB zVK3Tl_57i$&Q!itZ|Ha%3~AWOP~R4})7{0t5h6|JPc7-yY=PlM1M&UWpS=&47#k*Qxx3_vio?r z-%yefTh|$v?u-k<|FIxi{*gnYl`QDv=;1nYf}^NP09lPZ)#nRPtL8+e6PaA7AI-Rb z1+SsXgdcWDlpB?NrXewve;noyy4?O8jg;OPqWFh{D;g9|-ld9bEfr1Kkz)*2JFh7` z&)3GGSB6ZroW05S@iFvxi%ppQ|BFoG^RbCqniCu8U@5FG=-Yr+9ej>JbakQ^O-9T8 zS&e)vxrC=538u2(#Z>%BO5CtNQP00;vYY1q>{MY0Kj`EN2Zkz!Lz(uqbG+5pw1Gr@ zUq5TaDr=$6^cgex=fxaFyjSgp>!!nx@Fmot`o7N(3c__fRjTO>ObW~W%Y@WAcPcAP zGFKNPE0mcPB=pc$=z4rbow4Vheyfv$sy_mtP+3tT3QF0Jhz2ie~5KcP7*_@s6<4`N{l4A_o`$+rZU)JgG z*Wx4KSP1zq@~+N4{zO${K38LA#J);a70s8XGFgk8gxw{{R%)O{h@qXy)EW^Q$*@M0 z3y<0Ihr8CmVysOvac*TH6}Z(hE2=IR+#&e(u9c-2mH|-8MF{HD0U4a-ng(<|pBrHh((6 z3rmcXTr-1M21A-yhK0;)s2#J0DVBkR2 z>TyXiCeh#raZPr-hx*Av!rWx{sRiHTMMNX2|x4I^_lM%@&)gRObJn~6D{Jgu6oH>ibhmD#NYXfK>1 zMVfHRRkbmi46(;v&%UQV>r}KaX$+~0I|5@zGN82OeYMk=yLT_N1m@nnAXG@glAnvY z<5y-2of2y!6SJa)7&rTg)p8YJEg8k_xOopX-!Ee*1^i#1QBjM623z7h5zEBbQFyJ3 zr!<7CIpHiVKHORZ+kU;qO?HR2&2SzY3~#dhlU~d&T~^pWCHz-Q65)#{#o?LjVoX~l z#1G6|-ne2in?;Ifw~&RV{6GRN3WWPEqn-l!S+I%nTAc4(uO>5N336S@%>3KI$6~=TAq1bw}hgy zF*0!oe_EwNGek!)*f`z~3^t8-1BdYX5(7zJZrNx#G^lo~ZDVR^K&m;dl568}aZv47 z$kHh02Gx|iPCYj1Wi7pb=+02j)@z9!IrQfQ)oy&xBsQH#ePB@SrUE?jwyaHRv}H0+ zg7r6}%*<@=q=@Q!pwx!;F+nbp#A{x`scRoy`rKLi{A0@z>JcN)SO&6>ZU;XsOyYgLpU{+m;Iz6`<;GGB;U;)`vow>Ia{ z`AvE!lR~$uhfc2}x71DOS@2<{#YvKt=KAJ^_$WJW%VdzH`3pihJ$Wxj%K|Ye^B06d zdh)jIQf^_fix_2`6_=&`9jy0sx;=xq6bo!+FCrf*deB_obVyV4f`v0klipNeMOgqD zvo_71$9U4(CKvZZXE#oo7)5_oSC#`kmINivm(F3{H^a4knrl&7!&&dhM5Btsplgv< zV`94Q<7c6|S=~u^72A8$nZwMSZom&68FQ`PgEbIbQDC@`qkq$t5576&{ov_MGhKV* zt7(|Y2}U}_IUE-FFhI6fq0^Rav|UEZRI26s%bM%DB}A3ouY1!aV4(iRRjT4!(HhKg zuEMIBx8~+k8quw;L7~||q8q=f>S(gB{VK2PzRlnU^?vo!>C#5fw}#g5&GcjJ zW-=U`L3TSQF49_+Wo|+VWFODZR>@+UVz`jdWvi261)rM(MRv+V>F2kGeeRd4$_({& zPS;P8zwDX!TY-|d8XuJiirdv^HQiuBpWkvr_OXfi%}Zy^rXkmtk@sX2hWfyU=BPhX ziydzky|M4C%8lsF85FvaqpRAbJ@M*yj;)Ukw~hV5i~sqnb@QW-^M+%;M2VK$JmIKG zsH>V1+H^T@woSj>Itg8@OezUxy+q$tvIPwc{ucNxCiixrl4nd}fhyB#8x>WVAxBA- zom&kJ7a&~25*sBguro=qCS7ewad(#jzaXu@mSOHmH|-WwM-JAasOqI9?O8=fY>AZW zi*;Z+8nTKF6cqrKIjTe}RYN777P0hi`DnaDSGI)d8Vfn)bH#iIlsQMyj@DFcamd!d zY~aP~s%%1sCLJw1u0zBaverl#MuG;Vn`mO$t$T4BRT(28R^ zcJzt{(I#IL2cJ{@#r?>zR3V4GwnQ_{L9t=e7hY1lI!RKqYZGq1a1u@Zf~_Obv}i-c zeMM@db03-z&Tz_4vPg186K6!Lt(KdN3GG;F*Z2-di9m-GKb7QV;)oDX6FK1(w7Acy z@G6_*5+&Qjwa#*&x@D=wLFtnsgZmBH4y23c9ycu3>CLmQ_u3v&xKIx4p?>sn1J z2uodRGc{lIugghzaq*6CrNk_^r#5xHH(8G9pO|c-+U(b*$_qL41)Vi(EO= z>VG!ieKfZbi!MWsa2-uc=auyNwB4j6(hK^O#Fv2tr>hH+oURI4m)~nIny(S(fh&!9;;Vx1Je3&0 z(~6LAGY;Eg!5sGyf`KHiH#|09HQ=i>>W*YT4_fdDRV^erIT(Dw995(%A`1KchM&M- z18e{eknxAZ$iB6-!hEmve{h4p7%pR|MH%Rl1ZBh983eNR8&|;|B5ejJ_iyD-hTBD$ zjgBL0u-4%iEbLhVcGSyqy7+&r{9-}(52Z%I|0=HrQ8OgO%()y)78OMWW|`{|8#7XF zQ%)>n<`XgA(L+8j+QPJsRe|Q&mN}Lc)o}OXpD0BCCnoPwd2Vc)$L*(VJRC@vDhB+* z(!7VBGn0MX*}aFm&0QyeGL2m)1*&u=9!PxfMum$B4$I;PclCBtMndjVSw~6Oe!u@G zST!(FJqQ6-!mOp0-;X?@(qJgOw8BJf{ZvW}3|8RNzH>KI58@lT&%6xL5Nub~h}|l0 zu1aC_7>*kt3eP#SOR|b3VY8KDL<~pZK0I1A3>Et*PxuIrB#YvZCq1`lq8WtZkdE4` zwr+U-=U5d;J3aP*UQ6;$WIA0O0czd3DeP?^!s5Q{k@E_o|MnzM3{yM&-f#h%g7@L} zv?U|Kti~qgSrnDJgaam+u(4OnluUmzlhp?HfbF!zybx=8z^5UivTHkJr7oQ2E-3W5 z+Y=As!fSNA$!lZAR7LK+MaK=l1E;@t2Y6_@Yj!gqsJU2Hs67mJ;;^5cWlOm!9C9sC#gK;^qGkm zQ$V3*diVx^GPsTwk}*h6$SOm_KifONt1v(ufm!H*ilgKnzAP||?DXPZ-C#L{YrIyi z-}uU!*YSD}4i~S^T{y(c4@g<{Z2{iN>C{+L^(I$EK)Y$4TBem}2@ok9MfbNV%4&AL zv3rFp!Wpr=_g015*5=9!U~S3FE7-+|J{F=d>DU>j#Rc_(1{zV7{zqEQ-*YEMb(ZU5 zsH#Rmn+TM~tx~(RoK=2R&N(IF(wo` z(A1p->c!AoE>UAYx$nFUQW9L>8$~F05#=Nyxr^)Y%k^=7TixI^Ql$_m#>#&CXIuxdmB^^G^%(XU*mp z*PQyo$o&GpL2d1j#66ssNe)A@c;+YKP{1yN#`a6?oUjfR=&o>qN9M?~^walMp$PR| zq1X5PC?6>&adk@% zhbqv5fP$L$owyYc2FuXj_$D}DHNG*GCVjW?%5sXcy`<-&APG+y7PI246fjze3E=D) z8Z;8vvKV~hWx7%^Y*#x`!SlwDfhk6e%vQMWEeeP$K?z=s7HpFoLuH5E{AK@Ao`dQI zDt0ao)+7AQdV2RlTWgBL_-qF=<=fJDX%9H4D4;+Dr|_d#pbuNZU-N5tN&PR(8U1i6 z-(9hUCFWyizD5b@wl_|iDpub}Wpm(O> zAqLr7@1lDfJ8mwvK8`XfHApOtT@U`;VlL4*7={r12W_7c#A9=YG-I~QLIHxHmtZWI zRF?WV!V0SM9D0~u#PbArG!o$4NQGE|os7!H@E83|PBF4aA}bXXK*e9V^EICvuB7Ch z9A-WTvi6{p=&Q}gVe*IgL+yeQ!*|CUl+tAaX(i1=&h147hzph7ylWlDJ!Gx~dt=%W z%|2ci-G(c!m#Ltu6ouUz2P}|j2~A!dsstLQbRW7@mD8Juv)w!Co6UP6Dy-Zqje+=7 z28P*KtS6>S3IW=NJi`wiCNT!VzNBYEl{|tfvS-viaXFcmzz`D(fpKM75A0p{a{k>~ zif{N!d_{a@Jq+5R!99@yuK4-NmT`*~quM$b{(J;#s>Ya_m;@<49XGx6yvPtX7)jpg7~eta7GlB?R% zr#Z|}E`l?@G-z)t9?R>cDk{~)W5JJ@&AZNjvY#;3p&5%#UP|Ev?QBDQ;jlBF)Oty% z9N{Y{jlxFtpE-wR^eSkeVA}2*WMR8+ay4Fek^2fz*{5ejs;P8Ur4u%`ON(2>QDM85IxhTh1ueSpsA5sW5<*PyWW{k6|Dsz8j;N3>G|~&5R5I&86KKnw zOq&sr`2g_Ujy_nO;^si7n*dqLZh#un3xr5jyuInN&Gm$NRsN+iyl)_jtW|=Y9VaG8 zeIz%`n`#FPv1|r7=|MA}mocV1!TntO{H=Vmn^X_BR_beI(nGEE;a*$(Ot8d-SOtM3E!W8L=KztwAc5FeGLSRzY}}76i`$m9 zn0cl}NQ$MxfQU;GjNTiAE(B9(#2L*5o@9UVV98@Yve;#&MTd$#?S$SE4e(gV03G}< zirv9VJykJyztaKOk9^XRAX|Bd;?yyaaA8mO)6y)qEZ#nEL17oOySEsJcd*Hvh9(

EvGa1Sm|=O&6j<*VFfFfcNOv3pmMRE=B5m)A$y6iPtkVX)+v? zOh>A*s(a;-R+H;7G~2QiIpxNeIXB3SSbUFLxFF%pS0a!~5;rqk6aawQwf!etPB7hzsPwnwS}hU!WXK*xgkBxoYc%<;zji=_{)8$#aD#oFAV8?|fd`;`0*ak|YKw z;!}_&hKAE-XeI}M%@(#I611&eyQ+(BEotpP!qDD_twWfI2O-&qw#L7Uzy#RFpvE7) zJ1WU{gaz+Ue+R=tI1r&|j;NyPz!YVeM`zMQ3E=loi9Y^?A8ajK^xWbm4_A~PmOJ1G zvp6zmJqrT_iq>3&UL-iXLT-Ftcc1KU`$7(z)xTP^`qvgqf;e5U8sK8dQ8~><1*VZF&aZ`|M;;Q}vm(w9X2Rtoa&0%f;y>VphLaN=Xmlr@V(dMUVHMcLB zZSsln{CNwFS}T)O;b&=Vmsm@j8fsAET=>+J;b#I!x{^^q=e&W+>Y179Dt5CPxL8Z< z04`1(63==HKuGxlPT_4^acS3rO&hniNudC1^2=~Lc+v7Cv@KhK z|FY+nzqoA0PnR!Su?z*&Tdmw8EJs8;6+t)v``CLwO<;!;e5|)mU{YwW1cUs+7*S)$XAN%s9%NDE#GY;vo zZL8UmhM|N083MKYcK^aC5+uKl*S4;0dm%5!9zzY;w#F}gcrkl{w=QhzM=Fi}wzXJ$ zSYCJUv7bX7%YT8`55DPG_KO9T1q)^#y*GRKD;|;hC-2t3zB+sM;@=;9vY_ya5t#G5 z=BwJ|SJfMz)E|BM1Q2<-QfrDq>#SY>tU5V0d-Xu=_QCqp@#=$#*)Kkuy?(QLb_(5M zB&cN`txn#mo*$h%eYZM&6Vb*+7x(85PyDEQa=bou+a3!4q?c~K2be0XB3l02=!u0xe;Y;j$7^RE z#A$KwEr6IiJdU-(Yai9gYqiOvaOdpFs-wsGcj*_$A9-f^# zriwE^97jhh3si$!F#?=Bdu8s#&Fa_})f+z$6noNYSk>dFYh%X+Sj$xPk=ej%pPt8( zs6WkN%$_}so(W8GYDPFSDS-OBmuugiu1=h(KKf|x^3D2{Y3=*k(b2idQ4B~>^iW;W zwpasCel6MD%SWM;7_)px(CUH+cC`0|ua z1lRcVUG%p)c_v#_zxQx<>Il{sqX?xJYaZeP9)5`JQ=PshD8<3EUUBrb$*W&YabvG%G7ar2W@e9JpWJD>!Gxjx^4e-U|n5P>oM~qgaq@wC4o$=g zg6P&rvcLkKq9T83hW&W95>(~y!I3qoTphb@*uf^axIQOvl&fFx>_#M0Szo4{w>oAA~j+U>QRR)EmvntG} z8ie0=WFmcN9ye6f?u~)Zn7edxcItZV{l5Z9VR{9pP_tRX)rqgvQFi{w(Q?JMwzuCl zC8Ii!{98NvA=e4`{(Y1`} z^=1!$t0mSMHXMg?stylQdT3!c_QCT4A5|oKcJKS_m+iY(lAW&}`5c^TXch4);;F+m z46K)dL(QL84}3zBbLU;~>cZq+IR=7d?fgn@>&k31^-BU*;v9`~9+hgfC3D^^oW zb6<{ug~T~4wzYFR@L=A~+iio8PYWNMZ!x4!K`!2%y?kQs;Ab<_=Kv5QjkhNIemmx) zI`LV)uC)_~L9XU5k5{jp!OUbx#g~EWL@~%tp=v8USbcOs3q!up@KO;Qwm^l%wDTZC zpx5i(vZZ#nt9=0Y;xtH?^<15%PzJ^byW!$AsIEv`tcYy2+Yoj&GR*nac*C_TxFmF& zZTgcZAizR;@k${%RG?eoF)pvz{`O8N>5_@B-k+{tJD$A?)y6(fnwLdUY+!0+6ZHLL z1a5eLUhFNzhuMZUcX%%%4AB>>)ko!7dNmYIcKy_+^-~u!d-dc0a3-%*<>$#@%2j?| zu7ZGMdXc9e2#EF5XJ-#j)y^I);~i;;I1|Zv)-jy#AbT~;16Et~@#Hv`PQz)A;=GP6 zc4HkK^mz31V-9z-US0_H$8<>58%O8PPg2!z_w)SVxNm*f6rlq77vB~up37=S&Sdrk z{vJE`t$5BS8)#u0T%FNSyuDW#?eO&MgG1FTpNJIZrOoOTny|klspGeZ=l2c5RF3T~ zCKDG) z>m!t$Z29P#kg}#AUImCem2JDWa3GCTADnzINp)L4`sK|1?{yf2L%|e@_!zxf8N0Rx za6yerb7h^YpPI^_H&WRM;Y*1Cm zb6OnWU2ZSa38wX9o5@}Bg;v47nM%a;cX4|{mlkW{CgOjPnc>}X32z~skGUplpS>{( z)l9mAV6}xcFd#GgIqwiVv>o7ptPMq`sF1vU0euEs7;7@n(lqYEZxZ&rBcN+wJJ_AE z&)G70`yg4J9FHIvyV;2B1Y;g#w*%F>hZ>Fqm!kQxNZGU4c=>9gxRP2#P|`%$#>=+1 zVu|!i^~hJ%_wPrPTfP2~wvVxt+Hr58zi+|$whcaig-@w2^q@)I*wOxcmJ;-y&Qb}d z#G1QMvrNp{0iKSC$DM+McB5XW*fdD0k@?m|Qds0N>1(8X*&-+^!0rL9%pEudp)T@M zD!VxLY!7+{4L|QpgFl8d}lXdLo&b~|LJU+)(5`!M$@Xl&R3OJy=DA@Fe zkA*`VC=~t}D&+8#R+re`mRFStebvr=7im@O!hUoioS>BdXgEQE0f{yLgqkUfkRBnO zAgxX76SOQ_^zT%(Oy2tU#a!45{$Gw~koT(>FWNIcs^7a&y?HH4h*(_{wrqDwBWaIN z5+94$LY=!)AgwR*Ni~%``TL3~M{-%U{@uF}{qROOk99KX%X0yx3B3OioD57a6fUak z-KI^MO_~NN9g3cJsxP`;J@3)N|Fi6Q>Ri3!60kcqeiBj;H@~1Cm*rzl1M$sIc zSC+Wwr1~({(>1qgNxXxZBEFh=d}DU%ARa>Kl{~}(`Fo9q@A=FmWYu4k&VVgYmVXwG z@Zz{^5$sL%i^RROA>27pz5R7<^b0H`N79e16ToM@ZxHFL5fzUR>T$Jo zqF#sTsqMD_un!*2v95iojvbhVK}Yod=GQP(&3->Nci{c(g=N&I13|*h!s@?b`@Oh; zv+yZlUluH145#uc2)n(~1YxL}G3;7UTuy@DsL1RIfqBhuVe%PNr!Z3i zicCs|B136*BDqPjDKH(?CY8ymI{L6C2<#;cUD5Dug?R9G{vxM;`ujq!4o=TZpO6tm z{e-ab_Xj7S2J`+Oo{s&me|x`v=eAUiY>P}}(;jOYDTAsl@1$AO1i3s3sKIL`5vyme zcn%=>Q@whyc41PQPxkNO(b~j0Y0R9%2L$4N%Th47x3>*aTd%2OawzB!&PMIj4?p8B zoH&EAQq^>(&ic}D*LpbY$P3(hp{xx7ozrv5ve`BUkNn*yWIZG91= zwsZH0Mod0Dxu?|mLNl^tOHr!J=7puW;8Lklt=Vo`94^FWbW!)_HSZ*}2pSc-0L}o@ zR_rcekYT0=$sTG|^C^qpPzl^fLBaah6D8{b;p~iXnkzk1I9flk!(nRF2l#ryGX@?L zg-@YwFu8)AlwyYG)HrK)V?*qQyJ3`84YkNe+M>JUuM*As;c8}|HkB!Kt>H(@1~QKN z{DnAm+=OPD2rb)Ydke|1wLJ=uH3L3x=kCpYGzpGKiX|;gei(j@889f#CxH95`S9CJ ztV1Hoez=zu2d=*07!{^0t3J3}J@P$h=j`>5ak9lXmSkTa#l%T)Vud$OP*{ z%r!YxyE%b*xAbl+Nk*yVGj|0b3vCc^BzVrAnTW{r6ReN}3IH>KqiuWQuhe6Vk5(@q z0~|P7)IK~MA**`W?=cgLT_hY~*%ts5Mx}M;ld}M2iUoMyqOX^)Rma8x6x+vq_Y!O^!m1|K9DmA7Dmpj zWdreNsC+D~ouIr!g#QObIO^wLvUd1&4X#vcp^we~qBSp_RX@D|a|8)gVrMKh$1d1C zLV1($=le$+%;2jBTOsc-sQ&fDJk2|Wq#lCZ$U6~Us53@C|J?D;Pv2?#i>>+7%tXHK zBH;m7_+mm8z^f3@zYP5pz*pJk-T+V=w|l%)#?Yw!np0&_*A>8#+Dk)4GlL> zzv0DT#g&zak({&?oS3O1ZIs8Vf#Wt#8NG!# zNd1oqHglg&K?Vo_o!x5=&{({bs+2(GK%hN?YbB|t`mZ6fYZ#j-N&QJ<^K>f)1sd0a zZ4s^uPBf2v1TAQItF;jPs@c;(@=`dVheI&Nz-eJOX45HDoHp=LC&_gLJ!G~;ZusVQ zDY3Eu1>p(Xd$+8}>+2iF*#d-llc^D|=av-_oUzH`VwwzCZU8tY#nEaWieuhT1R1zq z=Vk(I6)JbU`1@HVy2xUCW1%Mr%NW{^EuoQT7~HP|NaJC0Ua|o8*+8xjAgz}Lb~1 zR5Dn@U`XNH&Ac2?MdBXi;s-m|Wz{o>fg;EsPm%qGkPMw%fIuyVNfgfjVeaE^5(spxUh{vbqu*BM4^4x?-`zMga|o$V0)k-Ib5~dVm|$G z>vqk{n0`RU!!~vxsI+JlZQ2H{ozUr+qm(!)%n00gv2;@Opnq*G%}@?9s?ul>oTi6B zK|=-zEo~rW2-?D7F&LuLwA*;-JwJ7`Hu0UcXtqGPY5!YRP)=3Q11ce9MUsxHqdh3y z)WAQaqALM=CKX+-HY-8#f%{p2_ylI#l${u@)PK#DXHTQ|$_k3FEZ2OsQhPP(l)xKA zM-QyVQ|Of7PWaE#DM39&v!F;gv<%e+qTy)hQXMr&Z3B zR2aEhrmUDM&MJ&c^C+g;N;;i#-Fb96`!Ed%GlHkuU`eT_c@T=M-8==a32Y8{BT&_T z@@p8na=rThBYKUNwlrVTMid7l!T*O?4qF=vj{?8#GZ6m(msp7Po=j8V_~hY@oEbNJ zMmHR2WH5l{+%t3#h!A}YRbkAJg_)2@;POu7J%aaPS|Qe{o&FAv!6GTBhUr(#32W|Q zP0xjrR#t0Hj3fgc{ecd>z<cx|#?>r%CWZ{%xeL2AXB!EBu};XA10K`@;ar`VHa>gpIKsnX7pgZ-VEyv` z@3j6mnr8$etMl+kwRhKAilhvK!O4+hfVNO<=rYa{yMjqzWaPwK=Fh zL=e@456SilWK0*iAoU|e^rbEChR!*mXBt`k61d=IW7LD5#ObcxYU5BA)wHe}ErchP zY7Vld!l`ZK;h$1>IqpD#6u-c(Zcdv`fHYQC7n*?BOAsN3HZ&er0P1@Ab)o$-8`sC0 zO_(x?fwjnsiGQ>si>+AT#V~|l5lW*$)@M8V!x$#o#< z&~w*5hK4&T-l@AgI&Og0=YabAhKG^nCHdsIBmkOu_Z*NJ>Eak)7$a#y3I+a@D&q<+{2q0 zGC;%n$;s-i;}HkOhPXK|PZ3%_p}}(6+a~o<@wj6)L=TB7%uAa!&tAk17A%NYgtFQe zuUF~aIy<&({oVRCa`|BIpc`Pk*4=Mv(35_4;b(GMbdJLiiKH|b*{SCH;}}nJ&Yfmv3;DeMh6b>knzT!kOP6^2IhoV*4#NT zm0A$ZmCkkb#2JG8lPyAig4+JnJ2(&x{ON{u4*D)USKkLZm^=498!%IpPYNXhSa*V* zqGQ#|FNckWqm13iPE9fJ6#_(!M9T`g|Kn7qfm#rg(L442>NP7v0D>S0zCN5g_ zWKPnl9s2aa%)P7FpiXX#LdU+vKAF0I=*@wBZG+wWaFB+AOFh838YCcz0=P67cGT5R zSVK1)z=YAUaqZeIxTMxUm{^y$HroE}2oHwls#${oN!IDT^N9{iR#7J^f)Rzv4VA5Ai zoCj2ACP*fUsouMXn5|ILGwT%!oSTLNk$mZ}OOZsNp)kGtj(k2(-#H99rXkuI&C$cm zhT}%>Gl)Gpl>HKpaSC>Zo3d#$*j3#YswqP~f=WMvqXYg_JrFps7+x zg25S!0+3>dv{sB36=7m+$K=#le~HRR}*>Elo> zXGFP6UL^nH?u)X_v@HEhrFbq7nPfX7Zz%ny9->_R=DXF&@z%|1UnOkdJiCGuJ$L=o z?Bx%+%ptWy1*-%PgIg1z*@&ENF-~{}30W0Jy;wvu< z-Mk3U0WMX@vW;7Q2IM!-3I)6o9g{;3vB?d8=D+hf49}bt<*v#8AVx&~^Pv`^U}-r- zSOa_^5zh^ExMoBq)7W(5ygh3zVf2vV1@PdQ%qU|ZF^2kpBB)`$L0~0s_uvwyJxFRG zM%M}=d6gGTQ5?d=?~=(UrGcaFgVR`i0*hr@9%G#s;4%^sOWlHItREpViLrrOH*Q?t zP(u94?C98!ek4Ti=(;vBfxI+?0pk=qk+^*q_mpFgqvJ@v(r}*r<=FRgS3YLv4n3rQ z#IZ{=_mQLHwAAg4bPN4d4wo2(YGYtX2c&{2KdefuVd^K0(l@*3$GLIGZjr-Lw|qGo zOSA6EMi2!Ugnp1$`|1=9C0f!ps(<}8*8)V%x&f(b-Ii6r|8)9AX}sfe{Z&3+!13O20ySDYhi#G>XpR_V(8gVl!NcX> zm?|+03Cm?99g6_)Fzecw@J~ee;X(1Q5bw``hq+P>h2z;R)S5ke4rE9jNM2NLUWEcz zkDmzbDPZKFeQ(-&ahD|tFvPu3ruK{%^Nyj^YTDxv6Q)Lr}@?0Wt`tZZ9G8Zq%vhR|FUgw~`*Ew6$WBluWLdOU&O z8G6Bju>=k^c${d0u%a9Ck|-(_vi3gD;mxZvkB(=ZVlXVxLnk;XxN8{&FU~^4{tCiU zu~eXHTNbOer8#IJZjn@+_TBn(>au)=JGWqYN4=wzR1* zpVShb_+f5r9Ab{oZO}H%-o06U^Z_Q)=3z^rn)EInSQa$sRt`6%#!nm2l7+HbNEK$% zN^}=WfEox#z_pfYqR!fplhqF|quDnyW&(S3!YXZhrbN6HpI;v zc()6e>c$2EX>uxsg#3fFYM5wDNQICtls0WjsSZ-(fq5;A>5u6Wp<38q)yLQ7Mla4j zekjlCv}Lw7$iAU!CubEH&!#dhM6GXPo`fFMHPd0Jgi`R^3fn(IK|kHjhNAmBlg-g& zTHj-`pfDLsKj%35&btI-ESeFYMJfcqI4-dacSx%@Sfqsak*YrMQd#K(D9Vrn*$(_G zl+qDBqKeTSX2Y|XLzHAjv#g`T)A%4jFg!zE9Lwy3N9_xHR<=X&!Aw?)DV30kpB$#k z6vA?NRZ+ujd1uVppLj$sai<_gEM6fvq5@iYNo3@u@pG{xj?@ z;3x1RimOG@)as-PkJ@6vYrbPS}k@QsHCof`_E0 zdJ3IlIzlqnH;&=VqB=4g!w9u*!`h8q^3){-wO(;zAWYqznmhL%zcc6$pFpz=w52L7o8F7I2L`+7uZYf?p3pn%yG5N96+i$Jaq^n=Ycsdv z+3wbfz@C=0j^3!aQme`Wh&XdAYuS}lPV1ziAR6}i4Qw|{>qRMO>TGTL3^Cf+=Zl#H zhn9OoAv`|Ty}YU7nz67Q5SBEi5+yz6#`1U4r~#|g<7?P2g~M%;hA8X?9VK@JiLv}@ zXdRG!i(2M5ZjM{GX*Wwci!#c1hcv@1{lvFkUG+3#E=IMd{vpP2qoU~(Q1BRspX$a=5Uq1@o2d56F zlBSA&i~WSF-k`bI!SxgQZq@}mM&jRN>%ny(`=%pnCkz`E{xYlpP;l$9sPDwVMio*? z9A)vLLEUcCN{m5`^?BZuIt?`}NYx`uat|IgkkYTb0W%X78VC+Up?;wOi(d5x>|zb8 znl@0k9GDy}bBqKaJ~#N&Y0(S)R{D zdcD|>Z_^IYpEKO6mV4wE6vH+pPm$JFx=P zgK~bpfxOJ=7(&Fk->|H~I51mU>@kTBE>0z*6JYKTdRM;LyT54D1T1mjxy>@CL$X|= z>b_3o9^5myYscE5fz59)R~7-v>B``BcF+rANe30mOFDGn#gdLaBircGJA@}nWxJ#U zNnHj}Vh0j8@Hs54OFH1jzNBL_QnL3VZDPJsrEeOq3~$d_kTcRuN0J$gtRlB_2OteR zm^*VDRE_8F)_At%cUv~YUd$xlquVlq$N^!K27g@V*pOFq!}?cYXh{5KNhO)hp?9#OU4N5EYRUuV zg(@oyz_^2CD9Wid%xM=}+cXycAp~O`k>-8&t1H^ffTJaHPD55}<&t!Y{~9To&6{+{Y11XYgTVh~I~GU8P^5hSVG5a2%4(J7CypqijF1JXMG z8^mN*bt4b*wQhI~mZv)>nUoiZYshS`M1253;rnGJ6I5J=+=mL7Fwo^vga9JwUB z>k4tNK)6e`EZMfCf5}Tr*8jz^t;Q@|28S9bV?&oM4lK1C6dEZ+! zCA!=gL25~Oj(m@|)!SF%F)Ftiey2W-Pj+Z@xgEl#hY$uZ>EG1l@tGYOG3XW_fqe>B zN7lD2ZGNqqV;%QFG-pq^&X#76ldX_|0>=nY+FAu)@=>I$7{`4jwX-+qzhnHQcbps^ zoUkxM;Q2-X5dGwgtp)^+X)^Vtj<8fkmg{j@xkKLRh;P>9aK7@B754}xk z?Zi={ne(Ga)69^_IOWX|tsTQv$>Fn@7^HBB01c|!RBnw6p45YCfnC{TI09Yh){TK$ z+`uF&gC9ZZ2O zBmdLHrIfX-nYVZ27S-WCNr8Ao1}=A1?+A#~~j6#yg?d=htCW zh5c4tjsK>H-$JSy0yQ)V1qSdpY`-C*Bo=IB{#vl~Oehq%iab0wl}DK3L29PRgBwe+ zAG~+({@(2)79S5*Bxm14%01Adz)ErYOb==}j=C6Tx;5c9P6X1M0WV+y;Nj^clw9SG zk=-RFl5dK`4=K5MhyV%(3eX9u`R)E*aE_vqFd*gyn=>GB;&N?(2RW9~RjVMUw-|NZ zOk8T-l!mK=n7bjzpuR+{5+^2nQ6-nsf*W!{=*A{%-fA46yFJJD{`tdTmd%Y|?TFl4+1X*aqf9_+ z4aY3cP%gbn5KPb=kY;8;Y>@U(OAypRAz`9}@cr5}y~6C5-`2moMXT2b$7ZL#s~v=C zk9Y4O$N0?s(Ya}cRhW*v->)~+2=YG2#>0>TM|o!tIx76(xZDQ;0UxOwEjux#-5h|s z!lZeKB{XMy?5b|s&n%O7I$C5L5s?hQ!G%zr*#O@)5dsys^CnXLAJIXi|Hm!$`YeKZ z6HX1B7z>*)94zHEb{Ep*F-C=s7ZyY-(Vwy{h$%AX?;6-Wl;y@&Y=I%pV_65HV=sFm z%<_z2J#unp`Z%1IKvr{HP{vRHFuLeu&&Tf4Ub<>)mnlxWNL=2ia10a2fNZGJD#clV zSA?1%Hzk?X9DIjg99X`i44(WyPz7N|L->}?ef9`kh4h?ysPA$q7fyC9sQLVts_1lL zXDfFggjRDTM~#IDr8ohU2Dec$T6{*oU_6%NZ1M4e%Ky;-;Z2rR;C1<8wsadZvg7i~ zlh?4zEPXlYAKw91?cE8#2W2TQWrA`4M->{c@jw58^?u=Y%mpr0yKw^UQE-$8qQU;r zJ9cKMQXT&`=I%rVhyX|MTUuclNLdt9Uq3#I%M019xpSYw3&9>slA1hPJI#c=kr4$* z-bQJ_%u^ZuGEIE2m8F|pnzAlh019-|v9hPV8T%UTp;!|T9Hfl`|43dy4r3^k>Zea2 z)s$Z9Dn!2>%1BG>D0=7+%7vhl3a&kQA*le-lmPSW2j&PWNpPIiE4OQ>KXQ=n^koDi z)Ks2*EF$J0GdAlqIh%5UEE)=JAU5-$486&HIDle8e zz~F71jm^MjVl1)u-BQiPZc#8gdNW-^T?LAL>!Z=weX;BcR%{)cd`%s?9A^xj#kG_0 z8q$&!ikaV)1V$}1`cQ-rX2ytgkm#O(XVfeHGc|SBXgM##jvz*1rOUwlFanBw2 z5ZVbVPW^&d%JHEiO5W$cA{{iNG@`H!*aWYUDhmmjU|tYKp~(g!j%APr}8@ zE`JAHFyH={4t%D~nVNy|=a~ zB$3OyJcXZ@Fq#1E?Q^u!AipsR0jU^D&u({LNQDO$^2Dn z^elpe^K$qo?~MKUrqm(}D(N#2bnNK`m3A?wxX`Qi`E}*~pdTl$muRou9A#RBVw@A- ztw6F=yf$yRz$U@jAk#6#tH>II`NOdAM6F0zZ6j!Zt_dpL^ZjyCT%K ziSUs@60C0%rT)8b}y{oGG?1DZC#{2gB+ZMjEAo2rN)%>Na!kVI;9!Kdv6dunmd0< zLZP-Ev<8w6(-12-cj}V%BIhhG*yNTr5q$SFn7*dY&y5j_sb>{3jz({ZYRokVg(Ltr zdETFvB>d{5FX`TZ`Mf_ZWCAPzWM&c!VB&t*ZN6tJj>YU%#7r8U)+;SA^N?|X>06Kk z2>04;>}_BmaUN~kg_v9saH@g4Mi7@Jp#mEya+R(yvGZ8DmP26kj{IvncT z33F)HKd^h};_P2KvKN@?5`>Yc!cZ>NG&ERt;d+?v7Zy}r{@n(62pZ>Xcn#uoQ+ z0+a^yO%f3HNA1!NwGTg0hcRi)&~f`T)<)LW>X9q8Gj} z$Q}f>3d*^Blsu$D`_^qo!iifyHl_%mE9oh_v)c)XU?gY`;xO<*0Yrp=tsx($B66UT z;^>hebO%}dYiWeB!{)E+;61ePP>sY*<8Li`qQJ`umBrX9iQUHU>BXC2fZX6T!{G=?t~ z{3dTQeUjf0!mF2+b!*nFu_P9w4{Fo6T9xP*0Y~;&e5Zmc;>(4Q`R#2ymDo_wxo`qa z#VT1UYg#U41LrMw`nzWEG-WCJBzko~{F?CwkK%`SW)we~KA?xWGe=?1W*m0qSs>>S z3y=aR9KA>^h)aNM40{yMkW`D1m@tj>E4eXh*bAf$E*=4Ie3It)k=H0{Ks?HHTQJg; z9mFvx))C{+Q*L-qi^4t8W6X`IX+&i}jN2CCFpi7b+8cyg!r@mOGKLYaXD$U&nXT!QuO>*`nDC<4F05?_2QP zP9be9>+r%1t$48>mT(I(mUjo9ypk=FFoEy;!3~>y#A+K+4Z5e>2j{|_<*8&R`D<}D zfa+$GNM8cfp71;hY6v@YM%T`s2@@85vT(oCfcn`7xJ{c3gEdV$@mNcjy`Q_L^Vh3*llcnIUf$(cvzw`|?~+G>m%&cM~_Y`2rCDXoybGij0Y zf^9cBg?^&Tty02>0ZVOke}8bX63Gr`R3#LIj?*SWG3lAn;7mT?lDn5P)M1619($Ea zQHP<3e_c5AubD%z)S%#b6#a?Sw9K7mKqD=(^agmHXe44U6~m>hKTqm|vYZKhSs!rV zP2B{3*x7ZM$!LhbaR??#uMOi}eT2htcT_dG1%2P@>@QID4k%*w|qJ{e*IZS-zGF$Lmt4QpOFObFv z76iCE^2@!WIBg0)qE0kZNR!$yY4z!~D&3iJR-sjZzM&`=9|qN5E|(wNqQBb*s?0hmm*Zg#zfgaCGbHJpx+R}@JNtnt!v zmzN(W6@2;FI7!+5B<;YRt46KP9u%itf`VF>(G$A?`~1t5X9$zUV^UCzoDs} z8vLc(sU<(9k!p}1;RZB+nA+WM#P@J>&uJiQ((8St+0ELa>2axgp|^kwrMqA@)*K-t%blrR1Ub-_Fv$ukn#+! z2InpT{VI~)MGPYqUfQTEV?VLD+bCtYAm(jDLu?^3R7j0!Rl$>E>s*g|Ak!|0y zMrm*iZqyWMMzds=>f_(wqGDl}N>t#coEw@>Uf3k?QNH;A6wYJNdutNW3B1Soidbvr z!GoC}-Y51kGDY%WNt&h}U5F+f@xz%? zgBZAkmgm}BlEBHMVt8v0CTibZ$U5aG)g}mU2yNzkKzVyUWA)}u<1p3F9Qz+PJx_J0 z-{LLf%31}VF!3!wlsJ#FL*;3;sG~S@R+~wi0W-S*8yfn0?N&c!hKTAER~{JEl2uR zY>VGR(qOtOQv)34&~lTuMzKD@zHLhYI^4A2<|QdpM2ii3y*!lR}F7&#h& z%4n1|b15jkBuwovTXsxquzr~ih6({&cA;jJ2JM4dJ29MY=vwpo>h+cAK9bsLnBj-o ze&W5oD{z4}Goo^t%ru~qh60Yp>e|r|5+=VAH^4T94?+TFZeVR{yvq=|1^JL`1QU1u zm@4w7FSf3FrP*`IA8H-I7GWlry#V&y@eN3)`3YsOo0&}Ia2~^KmK=$qZp~z$7KKDQ zY zI^D8G2%V|V?iRv^$;uMNY9Q)lr$&P6z!3;hLr%ozuQi62uhT(fo%|Kd6K_0K9dw{jsYN%^W}c$R z(*cc>lt85KUvK}8d=c@ZO>=;Qbp104N;xS?*>e@M`K`D>CC7M2UP)vF^kf<~tb6hs zI!r-G5CU}2-Fa&=BrT+4gxW8Uj8n8<2y5_AP%St;oHjs%4Qv2R;JQS3OkDpA*ajpR zVn~wuRjd^xDB60@JP^6gAZe}NxC-VHOFIlQVx&8Gjh)bx$Zx5^jtA7duxANa%}^ZF z+hz>fh2X^I&cf!KX)arumb^f^V{~#MwE|V9JTQnrUO^~Gx-NIS2R)}{j0Ze69LUxq z2^%>z!~kh}JaR!fe)VVf{XCAI0K z9>~1NrA8^<3{wIz_~eS_Y^4Xf+KnV_+o2`gEteZfCg@O9^MyIA0vo}YAJV;qU({|iHH!# z4vBSQb{0C&P2?p-^GNib_(2d5iMf)f%Q0tOX?icLUrXBP9yM4ttN4X1<(xmd$W}_ePeF_^oQ?) z@?_)cuFbz$l}UX<>xW4Z-aT>0n3`sAfL=6#jJGm2x>+f`Np*Y8N-0>Y*&9&^a(&VD zS_6zdrV2zU4$WBI3jE1lSz{y1iaKWplu?r zyuGyCMFbz7Q)6mgJ@wMa+R0Uc(AMep*Wxc$8ycNnI3&r|Ld*P zp0L2H^1h`#UQ8Q|4BkfW{Aq-TN&optA`! zc&$lpG66O>ZCorv&7@(7;E4p}04tJDB zp!>lVh33j8+GjZZLG$Cmvtgc-QYbWc{?jHeWFx4^8_B6u`lIk3I3Mfbh4sVVySL%> zlVH+8gDbNSPF0V6nbEb++?jG}t~X)z4WK43uuG91ssZ1^#E;i;5#zLYPe|d}!tLZk z^fXdxNkoMg()albtw_pmi*L48AqJVGPkuY3i00KA>o#n94W6;ESk@FPP2`cSY~ z#YemQcX{I9_-gjEhamI53-kli3r_JK!26yOs%iNsGI?IB{@pD|dW9bjNEbbNV`4@* zp_cB*@hG0+@M;P1E?c!_10a>2QJ$?R)Hv*4L{39nb8j^I;Yw8_W6B4J03;8Y;y|;q zgcsb~aC;@G2#<3AS8hVna!2it2t^Tnn&A*32wDitp%=2vpus_%CfApEI-~Fq%LmH@ z?7s13G>fWwC;}@o74qN+a2E$$;e zec{GkxZvn_4?8hHd&H4;L~4i1zVd8p{>9h9?%s(W6J^GgPvs z5#)|r1cR(+vqyE4RA)K$gFJv7t6gt)BLuX6VBoEhJq2B0Ea(WJ^xLVdLcI#>338zO zuxqEjhuUNI@ONZP9$%*4D0KT2%iy^zEG2o=rAX7)(uMo|`?-gT_KkB7W(LPmFlOC; zRD|~EYd`N7RHIRBK%s)8WH>#*yV|Y}Mje$l^5U6o z->Z&&3F0dD3?-z4b(~2?=iAe&U0hk}s1rMa3Od`K(1pMXeS4be9!~ubb`!f|#G(X; z^KFC<1&k`l!_wBF@O-aj#;ZUDPPQ?vCT_H{^>PuRlh}ErU)bz6NJSJ)g5UYhu`cqcIerQ`EcvsjY3{j z!ThOBvUK=f*zfUTSk$;|YX>cr7P39JRgfH)W}rpQyArBWG^t+xM! zJB^Ri_+_jy+3m;{V|BAlt25p)2nPA^xV({U=@o*Eld^ny>GyN_Z*F*-bIX|H!{NpW zy4lPk45MNy-aA?VA(=HG-k$s&tepA5LNxU1wX3>l7*AV3Dl*a-QDg+eLN&#mEJCf{ zLLe6EZnr)dpDz4hRLI|mR4F%e@sXH8$2Gc|3K$E$K(h#DBZEABG9W#q`0#MVTQfk<<+ z)xTP^`qvg%YN=aE^P7}f^ZL52Eegfe$=1HM9x;}i;IIjMD2yQR. */ + +#include "sysdep.h" +#include "bfd.h" +#include "bucomm.h" +#include "libiberty.h" +#include "windres.h" +#include "safe-ctype.h" + +/* The current language. */ + +static unsigned short language; + +/* The resource information during a sub statement. */ + +static rc_res_res_info sub_res_info; + +/* Dialog information. This is built by the nonterminals styles and + controls. */ + +static rc_dialog dialog; + +/* This is used when building a style. It is modified by the + nonterminal styleexpr. */ + +static unsigned long style; + +/* These are used when building a control. They are set before using + control_params. */ + +static rc_uint_type base_style; +static rc_uint_type default_style; +static rc_res_id class; +static rc_res_id res_text_field; +static unichar null_unichar; + +/* This is used for COMBOBOX, LISTBOX and EDITTEXT which + do not allow resource 'text' field in control definition. */ +static const rc_res_id res_null_text = { 1, {{0, &null_unichar}}}; + + + +/* Enabling traces. */ +#ifndef YYDEBUG +# define YYDEBUG 0 +#endif + +/* Enabling verbose error messages. */ +#ifdef YYERROR_VERBOSE +# undef YYERROR_VERBOSE +# define YYERROR_VERBOSE 1 +#else +# define YYERROR_VERBOSE 0 +#endif + +/* Enabling the token table. */ +#ifndef YYTOKEN_TABLE +# define YYTOKEN_TABLE 0 +#endif + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 69 "rcparse.y" +{ + rc_accelerator acc; + rc_accelerator *pacc; + rc_dialog_control *dialog_control; + rc_menuitem *menuitem; + struct + { + rc_rcdata_item *first; + rc_rcdata_item *last; + } rcdata; + rc_rcdata_item *rcdata_item; + rc_fixed_versioninfo *fixver; + rc_ver_info *verinfo; + rc_ver_stringinfo *verstring; + rc_ver_varinfo *vervar; + rc_toolbar_item *toobar_item; + rc_res_id id; + rc_res_res_info res_info; + struct + { + rc_uint_type on; + rc_uint_type off; + } memflags; + struct + { + rc_uint_type val; + /* Nonzero if this number was explicitly specified as long. */ + int dword; + } i; + rc_uint_type il; + rc_uint_type is; + const char *s; + struct + { + rc_uint_type length; + const char *s; + } ss; + unichar *uni; + struct + { + rc_uint_type length; + const unichar *s; + } suni; +} +/* Line 193 of yacc.c. */ +#line 404 "rcparse.c" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + + + +/* Copy the second part of user declarations. */ + + +/* Line 216 of yacc.c. */ +#line 417 "rcparse.c" + +#ifdef short +# undef short +#endif + +#ifdef YYTYPE_UINT8 +typedef YYTYPE_UINT8 yytype_uint8; +#else +typedef unsigned char yytype_uint8; +#endif + +#ifdef YYTYPE_INT8 +typedef YYTYPE_INT8 yytype_int8; +#elif (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +typedef signed char yytype_int8; +#else +typedef short int yytype_int8; +#endif + +#ifdef YYTYPE_UINT16 +typedef YYTYPE_UINT16 yytype_uint16; +#else +typedef unsigned short int yytype_uint16; +#endif + +#ifdef YYTYPE_INT16 +typedef YYTYPE_INT16 yytype_int16; +#else +typedef short int yytype_int16; +#endif + +#ifndef YYSIZE_T +# ifdef __SIZE_TYPE__ +# define YYSIZE_T __SIZE_TYPE__ +# elif defined size_t +# define YYSIZE_T size_t +# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# else +# define YYSIZE_T unsigned int +# endif +#endif + +#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) + +#ifndef YY_ +# if defined YYENABLE_NLS && YYENABLE_NLS +# if ENABLE_NLS +# include /* INFRINGES ON USER NAME SPACE */ +# define YY_(msgid) dgettext ("bison-runtime", msgid) +# endif +# endif +# ifndef YY_ +# define YY_(msgid) msgid +# endif +#endif + +/* Suppress unused-variable warnings by "using" E. */ +#if ! defined lint || defined __GNUC__ +# define YYUSE(e) ((void) (e)) +#else +# define YYUSE(e) /* empty */ +#endif + +/* Identity function, used to suppress warnings about constant conditions. */ +#ifndef lint +# define YYID(n) (n) +#else +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static int +YYID (int i) +#else +static int +YYID (i) + int i; +#endif +{ + return i; +} +#endif + +#if ! defined yyoverflow || YYERROR_VERBOSE + +/* The parser invokes alloca or malloc; define the necessary symbols. */ + +# ifdef YYSTACK_USE_ALLOCA +# if YYSTACK_USE_ALLOCA +# ifdef __GNUC__ +# define YYSTACK_ALLOC __builtin_alloca +# elif defined __BUILTIN_VA_ARG_INCR +# include /* INFRINGES ON USER NAME SPACE */ +# elif defined _AIX +# define YYSTACK_ALLOC __alloca +# elif defined _MSC_VER +# include /* INFRINGES ON USER NAME SPACE */ +# define alloca _alloca +# else +# define YYSTACK_ALLOC alloca +# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# endif +# endif +# endif + +# ifdef YYSTACK_ALLOC + /* Pacify GCC's `empty if-body' warning. */ +# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) +# ifndef YYSTACK_ALLOC_MAXIMUM + /* The OS might guarantee only one guard page at the bottom of the stack, + and a page size can be as small as 4096 bytes. So we cannot safely + invoke alloca (N) if N exceeds 4096. Use a slightly smaller number + to allow for a few compiler-allocated temporary stack slots. */ +# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ +# endif +# else +# define YYSTACK_ALLOC YYMALLOC +# define YYSTACK_FREE YYFREE +# ifndef YYSTACK_ALLOC_MAXIMUM +# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM +# endif +# if (defined __cplusplus && ! defined _STDLIB_H \ + && ! ((defined YYMALLOC || defined malloc) \ + && (defined YYFREE || defined free))) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# ifndef YYMALLOC +# define YYMALLOC malloc +# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifndef YYFREE +# define YYFREE free +# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void free (void *); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# endif +#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ + + +#if (! defined yyoverflow \ + && (! defined __cplusplus \ + || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) + +/* A type that is properly aligned for any stack member. */ +union yyalloc +{ + yytype_int16 yyss; + YYSTYPE yyvs; + }; + +/* The size of the maximum gap between one aligned stack and the next. */ +# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) + +/* The size of an array large to enough to hold all stacks, each with + N elements. */ +# define YYSTACK_BYTES(N) \ + ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ + + YYSTACK_GAP_MAXIMUM) + +/* Copy COUNT objects from FROM to TO. The source and destination do + not overlap. */ +# ifndef YYCOPY +# if defined __GNUC__ && 1 < __GNUC__ +# define YYCOPY(To, From, Count) \ + __builtin_memcpy (To, From, (Count) * sizeof (*(From))) +# else +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ + while (YYID (0)) +# endif +# endif + +/* Relocate STACK from its old location to the new one. The + local variables YYSIZE and YYSTACKSIZE give the old and new number of + elements in the stack, and YYPTR gives the new location of the + stack. Advance YYPTR to a properly aligned location for the next + stack. */ +# define YYSTACK_RELOCATE(Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack, Stack, yysize); \ + Stack = &yyptr->Stack; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ + while (YYID (0)) + +#endif + +/* YYFINAL -- State number of the termination state. */ +#define YYFINAL 2 +/* YYLAST -- Last index in YYTABLE. */ +#define YYLAST 835 + +/* YYNTOKENS -- Number of terminals. */ +#define YYNTOKENS 112 +/* YYNNTS -- Number of nonterminals. */ +#define YYNNTS 99 +/* YYNRULES -- Number of rules. */ +#define YYNRULES 270 +/* YYNRULES -- Number of states. */ +#define YYNSTATES 515 + +/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ +#define YYUNDEFTOK 2 +#define YYMAXUTOK 353 + +#define YYTRANSLATE(YYX) \ + ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + +/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ +static const yytype_uint8 yytranslate[] = +{ + 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 105, 100, 2, + 110, 111, 103, 101, 108, 102, 2, 104, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 109, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 99, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 98, 2, 106, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, + 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, + 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, + 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, + 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, + 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, + 95, 96, 97, 107 +}; + +#if YYDEBUG +/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in + YYRHS. */ +static const yytype_uint16 yyprhs[] = +{ + 0, 0, 3, 4, 7, 10, 13, 16, 19, 22, + 25, 28, 31, 34, 37, 40, 43, 46, 49, 56, + 57, 60, 63, 68, 70, 72, 74, 78, 81, 83, + 85, 87, 89, 91, 93, 98, 103, 104, 118, 119, + 133, 134, 149, 150, 154, 155, 159, 163, 167, 171, + 175, 181, 188, 196, 205, 209, 213, 218, 222, 223, + 226, 227, 232, 233, 238, 239, 244, 245, 250, 251, + 256, 257, 261, 273, 286, 287, 292, 293, 298, 299, + 303, 304, 309, 310, 315, 322, 331, 342, 354, 355, + 360, 361, 365, 366, 371, 372, 377, 378, 383, 384, + 389, 390, 395, 396, 400, 401, 406, 407, 423, 430, + 439, 449, 452, 453, 456, 458, 460, 461, 465, 466, + 470, 471, 475, 476, 480, 485, 490, 494, 501, 502, + 505, 510, 513, 520, 521, 525, 528, 530, 532, 534, + 536, 538, 540, 547, 548, 551, 554, 558, 564, 567, + 573, 580, 588, 598, 603, 604, 607, 608, 610, 612, + 614, 616, 620, 624, 628, 631, 632, 639, 640, 644, + 649, 652, 654, 656, 658, 660, 662, 664, 666, 668, + 670, 672, 679, 684, 693, 694, 698, 701, 708, 709, + 716, 723, 727, 731, 735, 739, 743, 744, 753, 761, + 762, 768, 769, 773, 775, 777, 779, 781, 784, 786, + 789, 790, 793, 797, 802, 806, 807, 810, 811, 814, + 816, 818, 820, 822, 824, 826, 828, 830, 832, 834, + 837, 839, 841, 843, 846, 848, 851, 853, 856, 860, + 865, 867, 871, 872, 874, 877, 879, 881, 885, 888, + 891, 895, 899, 903, 907, 911, 915, 919, 923, 926, + 928, 930, 934, 937, 941, 945, 949, 953, 957, 961, + 965 +}; + +/* YYRHS -- A `-1'-separated list of the rules' RHS. */ +static const yytype_int16 yyrhs[] = +{ + 113, 0, -1, -1, 113, 114, -1, 113, 120, -1, + 113, 121, -1, 113, 122, -1, 113, 162, -1, 113, + 163, -1, 113, 164, -1, 113, 165, -1, 113, 170, + -1, 113, 173, -1, 113, 178, -1, 113, 183, -1, + 113, 182, -1, 113, 185, -1, 113, 97, -1, 190, + 5, 193, 3, 115, 4, -1, -1, 115, 116, -1, + 117, 208, -1, 117, 208, 108, 118, -1, 92, -1, + 209, -1, 119, -1, 118, 108, 119, -1, 118, 119, + -1, 6, -1, 7, -1, 8, -1, 9, -1, 10, + -1, 11, -1, 190, 12, 195, 197, -1, 190, 13, + 194, 197, -1, -1, 190, 14, 195, 126, 209, 205, + 205, 205, 123, 127, 3, 128, 4, -1, -1, 190, + 15, 195, 126, 209, 205, 205, 205, 124, 127, 3, + 128, 4, -1, -1, 190, 15, 195, 126, 209, 205, + 205, 205, 205, 125, 127, 3, 128, 4, -1, -1, + 16, 109, 206, -1, -1, 127, 17, 198, -1, 127, + 18, 190, -1, 127, 19, 202, -1, 127, 16, 206, + -1, 127, 18, 198, -1, 127, 41, 206, 108, 198, + -1, 127, 41, 206, 108, 198, 205, -1, 127, 41, + 206, 108, 198, 205, 205, -1, 127, 41, 206, 108, + 198, 205, 205, 205, -1, 127, 57, 190, -1, 127, + 55, 206, -1, 127, 54, 206, 205, -1, 127, 56, + 206, -1, -1, 128, 129, -1, -1, 20, 153, 130, + 151, -1, -1, 21, 153, 131, 151, -1, -1, 22, + 153, 132, 151, -1, -1, 38, 153, 133, 151, -1, + -1, 23, 153, 134, 151, -1, -1, 24, 135, 151, + -1, 10, 153, 206, 152, 156, 205, 205, 205, 205, + 204, 155, -1, 10, 153, 206, 152, 156, 205, 205, + 205, 205, 205, 205, 155, -1, -1, 25, 153, 136, + 151, -1, -1, 26, 153, 137, 151, -1, -1, 27, + 138, 151, -1, -1, 28, 153, 139, 151, -1, -1, + 39, 153, 140, 151, -1, 42, 192, 206, 205, 205, + 155, -1, 42, 192, 206, 205, 205, 205, 205, 155, + -1, 42, 192, 206, 205, 205, 205, 205, 158, 204, + 155, -1, 42, 192, 206, 205, 205, 205, 205, 158, + 205, 205, 155, -1, -1, 40, 153, 141, 151, -1, + -1, 29, 142, 151, -1, -1, 30, 153, 143, 151, + -1, -1, 31, 153, 144, 151, -1, -1, 32, 153, + 145, 151, -1, -1, 33, 153, 146, 151, -1, -1, + 34, 153, 147, 151, -1, -1, 35, 148, 151, -1, + -1, 36, 153, 149, 151, -1, -1, 37, 192, 206, + 108, 206, 108, 206, 108, 206, 108, 206, 108, 150, + 202, 204, -1, 206, 205, 205, 205, 205, 155, -1, + 206, 205, 205, 205, 205, 160, 204, 155, -1, 206, + 205, 205, 205, 205, 160, 205, 205, 155, -1, 108, + 154, -1, -1, 154, 108, -1, 209, -1, 198, -1, + -1, 3, 174, 4, -1, -1, 108, 157, 202, -1, + -1, 108, 159, 202, -1, -1, 108, 161, 202, -1, + 190, 41, 194, 197, -1, 190, 42, 194, 197, -1, + 54, 206, 205, -1, 190, 57, 193, 3, 166, 4, + -1, -1, 166, 167, -1, 59, 198, 205, 168, -1, + 59, 60, -1, 61, 198, 168, 3, 166, 4, -1, + -1, 168, 108, 169, -1, 168, 169, -1, 62, -1, + 63, -1, 64, -1, 65, -1, 66, -1, 67, -1, + 190, 58, 193, 3, 171, 4, -1, -1, 171, 172, + -1, 59, 198, -1, 59, 198, 205, -1, 59, 198, + 205, 205, 204, -1, 59, 60, -1, 61, 198, 3, + 171, 4, -1, 61, 198, 205, 3, 171, 4, -1, + 61, 198, 205, 205, 3, 171, 4, -1, 61, 198, + 205, 205, 205, 204, 3, 171, 4, -1, 190, 68, + 195, 197, -1, -1, 175, 176, -1, -1, 177, -1, + 200, -1, 201, -1, 207, -1, 177, 108, 200, -1, + 177, 108, 201, -1, 177, 108, 207, -1, 177, 108, + -1, -1, 70, 193, 3, 179, 180, 4, -1, -1, + 180, 206, 198, -1, 180, 206, 108, 198, -1, 180, + 1, -1, 190, -1, 48, -1, 69, -1, 49, -1, + 50, -1, 51, -1, 45, -1, 46, -1, 43, -1, + 44, -1, 190, 181, 193, 3, 174, 4, -1, 190, + 181, 193, 197, -1, 190, 52, 193, 206, 205, 3, + 184, 4, -1, -1, 184, 53, 190, -1, 184, 60, + -1, 190, 71, 186, 3, 187, 4, -1, -1, 186, + 72, 206, 205, 205, 205, -1, 186, 73, 206, 205, + 205, 205, -1, 186, 74, 206, -1, 186, 75, 206, + -1, 186, 76, 206, -1, 186, 77, 206, -1, 186, + 78, 206, -1, -1, 187, 79, 3, 82, 3, 188, + 4, 4, -1, 187, 80, 3, 81, 198, 189, 4, + -1, -1, 188, 81, 198, 108, 198, -1, -1, 189, + 205, 205, -1, 209, -1, 191, -1, 199, -1, 93, + -1, 209, 108, -1, 191, -1, 191, 108, -1, -1, + 193, 196, -1, 193, 55, 206, -1, 193, 54, 206, + 205, -1, 193, 56, 206, -1, -1, 194, 196, -1, + -1, 195, 196, -1, 83, -1, 84, -1, 85, -1, + 86, -1, 87, -1, 88, -1, 89, -1, 92, -1, + 93, -1, 199, -1, 198, 199, -1, 91, -1, 92, + -1, 96, -1, 200, 96, -1, 95, -1, 201, 95, + -1, 203, -1, 90, 203, -1, 202, 98, 203, -1, + 202, 98, 90, 203, -1, 94, -1, 110, 206, 111, + -1, -1, 205, -1, 108, 206, -1, 207, -1, 94, + -1, 110, 207, 111, -1, 106, 207, -1, 102, 207, + -1, 207, 103, 207, -1, 207, 104, 207, -1, 207, + 105, 207, -1, 207, 101, 207, -1, 207, 102, 207, + -1, 207, 100, 207, -1, 207, 99, 207, -1, 207, + 98, 207, -1, 108, 209, -1, 210, -1, 94, -1, + 110, 207, 111, -1, 106, 207, -1, 210, 103, 207, + -1, 210, 104, 207, -1, 210, 105, 207, -1, 210, + 101, 207, -1, 210, 102, 207, -1, 210, 100, 207, + -1, 210, 99, 207, -1, 210, 98, 207, -1 +}; + +/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ +static const yytype_uint16 yyrline[] = +{ + 0, 177, 177, 179, 180, 181, 182, 183, 184, 185, + 186, 187, 188, 189, 190, 191, 192, 193, 199, 210, + 213, 234, 239, 251, 271, 281, 285, 290, 297, 301, + 306, 310, 314, 318, 327, 339, 353, 351, 378, 376, + 405, 403, 435, 438, 444, 446, 452, 456, 461, 465, + 469, 482, 497, 512, 527, 531, 535, 539, 545, 547, + 559, 558, 571, 570, 583, 582, 595, 594, 610, 609, + 622, 621, 635, 646, 656, 655, 668, 667, 680, 679, + 692, 691, 704, 703, 718, 723, 729, 735, 742, 741, + 757, 756, 769, 768, 781, 780, 792, 791, 804, 803, + 816, 815, 828, 827, 840, 839, 853, 851, 872, 883, + 894, 906, 917, 920, 924, 929, 939, 942, 952, 951, + 958, 957, 964, 963, 971, 983, 996, 1005, 1016, 1019, + 1036, 1040, 1044, 1052, 1055, 1059, 1066, 1070, 1074, 1078, + 1082, 1086, 1095, 1106, 1109, 1126, 1130, 1134, 1138, 1142, + 1146, 1150, 1154, 1164, 1177, 1177, 1189, 1193, 1200, 1208, + 1216, 1224, 1233, 1242, 1251, 1261, 1260, 1265, 1267, 1272, + 1277, 1285, 1289, 1294, 1299, 1304, 1309, 1314, 1319, 1324, + 1329, 1340, 1347, 1357, 1363, 1364, 1383, 1408, 1419, 1424, + 1430, 1436, 1441, 1446, 1451, 1456, 1471, 1474, 1478, 1486, + 1489, 1497, 1500, 1509, 1514, 1523, 1527, 1537, 1542, 1546, + 1557, 1563, 1569, 1574, 1579, 1590, 1595, 1607, 1612, 1624, + 1629, 1634, 1639, 1644, 1649, 1654, 1664, 1668, 1676, 1681, + 1696, 1700, 1709, 1713, 1725, 1729, 1751, 1755, 1759, 1763, + 1770, 1774, 1784, 1787, 1796, 1805, 1814, 1818, 1822, 1827, + 1832, 1837, 1842, 1847, 1852, 1857, 1862, 1867, 1878, 1887, + 1898, 1902, 1906, 1911, 1916, 1921, 1926, 1931, 1936, 1941, + 1946 +}; +#endif + +#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE +/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. + First, the terminals, then, starting at YYNTOKENS, nonterminals. */ +static const char *const yytname[] = +{ + "$end", "error", "$undefined", "BEG", "END", "ACCELERATORS", "VIRTKEY", + "ASCII", "NOINVERT", "SHIFT", "CONTROL", "ALT", "BITMAP", "CURSOR", + "DIALOG", "DIALOGEX", "EXSTYLE", "CAPTION", "CLASS", "STYLE", + "AUTO3STATE", "AUTOCHECKBOX", "AUTORADIOBUTTON", "CHECKBOX", "COMBOBOX", + "CTEXT", "DEFPUSHBUTTON", "EDITTEXT", "GROUPBOX", "LISTBOX", "LTEXT", + "PUSHBOX", "PUSHBUTTON", "RADIOBUTTON", "RTEXT", "SCROLLBAR", "STATE3", + "USERBUTTON", "BEDIT", "HEDIT", "IEDIT", "FONT", "ICON", "ANICURSOR", + "ANIICON", "DLGINCLUDE", "DLGINIT", "FONTDIR", "HTML", "MANIFEST", + "PLUGPLAY", "VXD", "TOOLBAR", "BUTTON", "LANGUAGE", "CHARACTERISTICS", + "VERSIONK", "MENU", "MENUEX", "MENUITEM", "SEPARATOR", "POPUP", + "CHECKED", "GRAYED", "HELP", "INACTIVE", "MENUBARBREAK", "MENUBREAK", + "MESSAGETABLE", "RCDATA", "STRINGTABLE", "VERSIONINFO", "FILEVERSION", + "PRODUCTVERSION", "FILEFLAGSMASK", "FILEFLAGS", "FILEOS", "FILETYPE", + "FILESUBTYPE", "BLOCKSTRINGFILEINFO", "BLOCKVARFILEINFO", "VALUE", + "BLOCK", "MOVEABLE", "FIXED", "PURE", "IMPURE", "PRELOAD", "LOADONCALL", + "DISCARDABLE", "NOT", "QUOTEDUNISTRING", "QUOTEDSTRING", "STRING", + "NUMBER", "SIZEDUNISTRING", "SIZEDSTRING", "IGNORED_TOKEN", "'|'", "'^'", + "'&'", "'+'", "'-'", "'*'", "'/'", "'%'", "'~'", "NEG", "','", "'='", + "'('", "')'", "$accept", "input", "accelerator", "acc_entries", + "acc_entry", "acc_event", "acc_options", "acc_option", "bitmap", + "cursor", "dialog", "@1", "@2", "@3", "exstyle", "styles", "controls", + "control", "@4", "@5", "@6", "@7", "@8", "@9", "@10", "@11", "@12", + "@13", "@14", "@15", "@16", "@17", "@18", "@19", "@20", "@21", "@22", + "@23", "@24", "control_params", "cresid", "optresidc", "resid", + "opt_control_data", "control_styleexpr", "@25", "icon_styleexpr", "@26", + "control_params_styleexpr", "@27", "font", "icon", "language", "menu", + "menuitems", "menuitem", "menuitem_flags", "menuitem_flag", "menuex", + "menuexitems", "menuexitem", "messagetable", "optrcdata_data", "@28", + "optrcdata_data_int", "rcdata_data", "stringtable", "@29", "string_data", + "rcdata_id", "user", "toolbar", "toolbar_data", "versioninfo", + "fixedverinfo", "verblocks", "vervals", "vertrans", "id", "resname", + "resref", "suboptions", "memflags_move_discard", "memflags_move", + "memflag", "file_name", "res_unicode_string_concat", + "res_unicode_string", "sizedstring", "sizedunistring", "styleexpr", + "parennumber", "optcnumexpr", "cnumexpr", "numexpr", "sizednumexpr", + "cposnumexpr", "posnumexpr", "sizedposnumexpr", 0 +}; +#endif + +# ifdef YYPRINT +/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to + token YYLEX-NUM. */ +static const yytype_uint16 yytoknum[] = +{ + 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, + 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, + 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, + 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, + 295, 296, 297, 298, 299, 300, 301, 302, 303, 304, + 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, + 315, 316, 317, 318, 319, 320, 321, 322, 323, 324, + 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, + 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, + 345, 346, 347, 348, 349, 350, 351, 352, 124, 94, + 38, 43, 45, 42, 47, 37, 126, 353, 44, 61, + 40, 41 +}; +# endif + +/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ +static const yytype_uint8 yyr1[] = +{ + 0, 112, 113, 113, 113, 113, 113, 113, 113, 113, + 113, 113, 113, 113, 113, 113, 113, 113, 114, 115, + 115, 116, 116, 117, 117, 118, 118, 118, 119, 119, + 119, 119, 119, 119, 120, 121, 123, 122, 124, 122, + 125, 122, 126, 126, 127, 127, 127, 127, 127, 127, + 127, 127, 127, 127, 127, 127, 127, 127, 128, 128, + 130, 129, 131, 129, 132, 129, 133, 129, 134, 129, + 135, 129, 129, 129, 136, 129, 137, 129, 138, 129, + 139, 129, 140, 129, 129, 129, 129, 129, 141, 129, + 142, 129, 143, 129, 144, 129, 145, 129, 146, 129, + 147, 129, 148, 129, 149, 129, 150, 129, 151, 151, + 151, 152, 153, 153, 154, 154, 155, 155, 157, 156, + 159, 158, 161, 160, 162, 163, 164, 165, 166, 166, + 167, 167, 167, 168, 168, 168, 169, 169, 169, 169, + 169, 169, 170, 171, 171, 172, 172, 172, 172, 172, + 172, 172, 172, 173, 175, 174, 176, 176, 177, 177, + 177, 177, 177, 177, 177, 179, 178, 180, 180, 180, + 180, 181, 181, 181, 181, 181, 181, 181, 181, 181, + 181, 182, 182, 183, 184, 184, 184, 185, 186, 186, + 186, 186, 186, 186, 186, 186, 187, 187, 187, 188, + 188, 189, 189, 190, 190, 191, 191, 192, 192, 192, + 193, 193, 193, 193, 193, 194, 194, 195, 195, 196, + 196, 196, 196, 196, 196, 196, 197, 197, 198, 198, + 199, 199, 200, 200, 201, 201, 202, 202, 202, 202, + 203, 203, 204, 204, 205, 206, 207, 207, 207, 207, + 207, 207, 207, 207, 207, 207, 207, 207, 208, 209, + 210, 210, 210, 210, 210, 210, 210, 210, 210, 210, + 210 +}; + +/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ +static const yytype_uint8 yyr2[] = +{ + 0, 2, 0, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 6, 0, + 2, 2, 4, 1, 1, 1, 3, 2, 1, 1, + 1, 1, 1, 1, 4, 4, 0, 13, 0, 13, + 0, 14, 0, 3, 0, 3, 3, 3, 3, 3, + 5, 6, 7, 8, 3, 3, 4, 3, 0, 2, + 0, 4, 0, 4, 0, 4, 0, 4, 0, 4, + 0, 3, 11, 12, 0, 4, 0, 4, 0, 3, + 0, 4, 0, 4, 6, 8, 10, 11, 0, 4, + 0, 3, 0, 4, 0, 4, 0, 4, 0, 4, + 0, 4, 0, 3, 0, 4, 0, 15, 6, 8, + 9, 2, 0, 2, 1, 1, 0, 3, 0, 3, + 0, 3, 0, 3, 4, 4, 3, 6, 0, 2, + 4, 2, 6, 0, 3, 2, 1, 1, 1, 1, + 1, 1, 6, 0, 2, 2, 3, 5, 2, 5, + 6, 7, 9, 4, 0, 2, 0, 1, 1, 1, + 1, 3, 3, 3, 2, 0, 6, 0, 3, 4, + 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 6, 4, 8, 0, 3, 2, 6, 0, 6, + 6, 3, 3, 3, 3, 3, 0, 8, 7, 0, + 5, 0, 3, 1, 1, 1, 1, 2, 1, 2, + 0, 2, 3, 4, 3, 0, 2, 0, 2, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, + 1, 1, 1, 2, 1, 2, 1, 2, 3, 4, + 1, 3, 0, 1, 2, 1, 1, 3, 2, 2, + 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, + 1, 3, 2, 3, 3, 3, 3, 3, 3, 3, + 3 +}; + +/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state + STATE-NUM when YYTABLE doesn't specify something else to do. Zero + means the default is an error. */ +static const yytype_uint16 yydefact[] = +{ + 2, 0, 1, 0, 210, 230, 231, 206, 260, 17, + 0, 0, 3, 4, 5, 6, 7, 8, 9, 10, + 11, 12, 13, 15, 14, 16, 0, 204, 205, 203, + 259, 246, 0, 0, 0, 0, 245, 0, 262, 0, + 210, 217, 215, 217, 217, 215, 215, 179, 180, 177, + 178, 172, 174, 175, 176, 210, 210, 210, 217, 173, + 188, 210, 171, 0, 0, 0, 0, 0, 0, 0, + 0, 249, 248, 0, 0, 126, 0, 0, 0, 0, + 0, 0, 0, 0, 165, 0, 0, 0, 219, 220, + 221, 222, 223, 224, 225, 211, 261, 0, 0, 0, + 42, 42, 0, 0, 0, 0, 0, 0, 0, 0, + 270, 269, 268, 266, 267, 263, 264, 265, 247, 244, + 257, 256, 255, 253, 254, 250, 251, 252, 167, 0, + 212, 214, 19, 226, 227, 218, 34, 216, 35, 0, + 0, 0, 124, 125, 0, 128, 143, 153, 196, 0, + 0, 0, 0, 0, 0, 0, 154, 182, 0, 213, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 191, 192, 193, 194, 195, 0, 156, 170, 166, 0, + 18, 23, 20, 0, 24, 43, 0, 0, 184, 127, + 0, 0, 129, 142, 0, 0, 144, 187, 0, 0, + 0, 0, 181, 234, 232, 155, 157, 158, 159, 160, + 0, 168, 228, 0, 21, 0, 0, 0, 131, 0, + 133, 148, 145, 0, 0, 0, 0, 0, 164, 233, + 235, 169, 229, 258, 0, 36, 38, 183, 0, 186, + 133, 0, 146, 143, 0, 0, 0, 189, 190, 161, + 162, 163, 28, 29, 30, 31, 32, 33, 22, 25, + 44, 44, 40, 185, 130, 128, 136, 137, 138, 139, + 140, 141, 0, 135, 242, 0, 143, 0, 199, 201, + 0, 27, 0, 0, 44, 0, 134, 147, 243, 149, + 0, 143, 242, 0, 0, 26, 58, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 58, 0, 132, 150, + 0, 0, 0, 0, 198, 0, 0, 48, 45, 46, + 49, 205, 0, 240, 0, 47, 236, 0, 0, 55, + 57, 54, 0, 58, 151, 143, 197, 0, 202, 37, + 112, 112, 112, 112, 112, 70, 112, 112, 78, 112, + 90, 112, 112, 112, 112, 112, 102, 112, 0, 112, + 112, 112, 0, 59, 237, 0, 0, 0, 56, 39, + 0, 0, 0, 0, 0, 115, 114, 60, 62, 64, + 68, 0, 74, 76, 0, 80, 0, 92, 94, 96, + 98, 100, 0, 104, 208, 0, 0, 66, 82, 88, + 0, 241, 0, 238, 50, 41, 152, 200, 0, 113, + 0, 0, 0, 0, 71, 0, 0, 0, 79, 0, + 91, 0, 0, 0, 0, 0, 103, 0, 209, 0, + 207, 0, 0, 0, 0, 239, 51, 0, 0, 61, + 63, 65, 69, 0, 75, 77, 81, 93, 95, 97, + 99, 101, 105, 0, 67, 83, 89, 0, 52, 111, + 118, 0, 0, 0, 116, 53, 0, 0, 0, 0, + 154, 84, 0, 119, 0, 116, 0, 0, 116, 0, + 122, 108, 242, 0, 117, 120, 85, 242, 242, 0, + 116, 243, 0, 0, 116, 243, 116, 243, 123, 109, + 116, 0, 121, 86, 116, 72, 116, 110, 0, 87, + 73, 106, 0, 242, 107 +}; + +/* YYDEFGOTO[NTERM-NUM]. */ +static const yytype_int16 yydefgoto[] = +{ + -1, 1, 12, 160, 182, 183, 258, 259, 13, 14, + 15, 260, 261, 284, 140, 282, 316, 363, 410, 411, + 412, 431, 413, 381, 416, 417, 384, 419, 432, 433, + 386, 421, 422, 423, 424, 425, 392, 427, 512, 414, + 438, 373, 374, 471, 461, 466, 487, 493, 482, 489, + 16, 17, 18, 19, 165, 192, 241, 273, 20, 166, + 196, 21, 175, 176, 205, 206, 22, 128, 158, 61, + 23, 24, 217, 25, 108, 167, 293, 294, 26, 27, + 395, 37, 99, 98, 95, 136, 375, 212, 207, 208, + 325, 326, 287, 288, 415, 36, 214, 376, 30 +}; + +/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing + STATE-NUM. */ +#define YYPACT_NINF -309 +static const yytype_int16 yypact[] = +{ + -309, 68, -309, 338, -309, -309, -309, -309, -309, -309, + 338, 338, -309, -309, -309, -309, -309, -309, -309, -309, + -309, -309, -309, -309, -309, -309, 458, -309, -309, -309, + 605, -309, 338, 338, 338, -92, 642, 230, -309, 534, + -309, -309, -309, -309, -309, -309, -309, -309, -309, -309, + -309, -309, -309, -309, -309, -309, -309, -309, -309, -309, + -309, -309, -309, 338, 338, 338, 338, 338, 338, 338, + 338, -309, -309, 695, 338, -309, 338, 338, 338, 338, + 338, 338, 338, 338, -309, 338, 338, 338, -309, -309, + -309, -309, -309, -309, -309, -309, -309, 329, 724, 724, + 242, 242, 724, 724, 499, 434, 457, 724, 192, 250, + 392, 718, 318, 174, 174, -309, -309, -309, -309, -309, + 392, 718, 318, 174, 174, -309, -309, -309, -309, -92, + -309, -309, -309, -309, -309, -309, -309, -309, -309, -81, + 263, 263, -309, -309, -92, -309, -309, -309, -309, 338, + 338, 338, 338, 338, 338, 338, -309, -309, 6, -309, + 13, 338, -92, -92, 48, 8, 105, 35, -92, -92, + -309, -309, -309, -309, -309, 53, 373, -309, -309, -38, + -309, -309, -309, -48, -309, -309, -92, -92, -309, -309, + -36, 7, -309, -309, 80, 7, -309, -309, 60, 103, + -92, -92, -309, -309, -309, -309, 17, 38, 47, 642, + 7, 7, -309, 263, 65, -92, -92, -1, -309, 163, + 7, -309, 163, 12, 74, 94, -92, -92, 373, -309, + -309, 7, -309, -309, 818, -309, -92, -309, 253, -309, + -309, 184, -92, -309, 5, 177, 7, -309, -309, 38, + 47, 642, -309, -309, -309, -309, -309, -309, 25, -309, + -309, -309, -309, -309, 155, -309, -309, -309, -309, -309, + -309, -309, 768, -309, -92, 120, -309, 10, -309, 7, + 818, -309, 556, 562, -309, 137, -309, -309, -309, -309, + 141, -309, -92, 21, 2, -309, -309, 338, 7, 253, + -46, 338, 338, 338, 338, 253, -309, 573, -309, -309, + 153, 188, 172, 7, -309, -92, 655, -309, 7, -309, + 7, 40, 27, -309, 338, 99, -309, 93, -92, -309, + -309, -309, 692, -309, -309, -309, -309, 168, -309, -309, + 258, 258, 258, 258, 258, -309, 258, 258, -309, 258, + -309, 258, 258, 258, 258, 258, -309, 258, 253, 258, + 258, 258, 253, -309, -309, 95, 98, 7, -309, -309, + 729, 173, 7, 338, 102, 7, -309, -309, -309, -309, + -309, 338, -309, -309, 338, -309, 338, -309, -309, -309, + -309, -309, 338, -309, 117, 338, 123, -309, -309, -309, + 338, -309, 27, -309, 163, -309, -309, 7, 128, -309, + 338, 338, 338, 338, -309, -92, 338, 338, -309, 338, + -309, 338, 338, 338, 338, 338, -309, 338, -309, 131, + -309, 338, 338, 338, -92, -309, -92, 258, 132, -309, + -309, -309, -309, -92, -309, -309, -309, -309, -309, -309, + -309, -309, -309, 338, -309, -309, -309, -92, -92, -309, + -309, -92, -92, 149, 18, -309, -46, -92, -92, 338, + -309, -309, -92, 99, -92, 19, 154, 203, 20, -92, + -309, -309, -92, 338, -309, -309, -309, -92, -92, -46, + 225, -92, 165, -46, 225, -92, 225, -92, 99, -309, + 225, 338, 99, -309, 225, -309, 225, -309, 182, -309, + -309, -309, -46, -71, -309 +}; + +/* YYPGOTO[NTERM-NUM]. */ +static const yytype_int16 yypgoto[] = +{ + -309, -309, -309, -309, -309, -309, -309, -240, -309, -309, + -309, -309, -309, -309, 144, -235, -295, -309, -309, -309, + -309, -309, -309, -309, -309, -309, -309, -309, -309, -309, + -309, -309, -309, -309, -309, -309, -309, -309, -309, 239, + -309, 431, -156, -100, -309, -309, -309, -309, -309, -309, + -309, -309, -309, -309, 26, -309, 56, 39, -309, -196, + -309, -309, -173, -309, -309, -309, -309, -309, -309, -309, + -309, -309, -309, -309, -309, -309, -309, -309, -25, -265, + -55, 232, 0, 333, 432, 375, -129, 4, 82, 84, + -237, -308, -283, -33, -3, 9, -309, 3, -309 +}; + +/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If + positive, shift that token. If negative, reduce the rule which + number is the opposite. If zero, do what YYDEFACT says. + If YYTABLE_NINF, syntax error. */ +#define YYTABLE_NINF -229 +static const yytype_int16 yytable[] = +{ + 35, 62, 75, 237, 29, 28, 314, 177, 276, 311, + 178, 332, 189, 291, 364, 243, 74, 180, 281, 38, + 39, 470, 470, 470, 218, 312, 283, 366, 161, 29, + 28, 252, 253, 254, 255, 256, 257, 74, 370, 197, + 295, 71, 72, 73, 322, 102, 103, 275, 323, 307, + 211, 188, 238, 5, 6, 5, 6, 202, 403, 239, + 213, 219, 220, 224, 324, 222, 223, 190, 2, 191, + 210, 119, 110, 111, 112, 113, 114, 115, 116, 117, + 290, 231, 129, 130, 131, 120, 121, 122, 123, 124, + 125, 126, 127, 394, 435, 310, 159, 394, 5, 6, + 31, 144, 313, 5, 6, 181, 225, 8, 32, 193, + 74, 164, 33, 74, 198, 199, 34, 279, 74, 10, + 74, 323, 3, 11, 289, 228, 74, 480, 485, 186, + 187, -228, -228, 280, 229, 200, 201, 324, 4, 371, + 221, 308, 230, 162, 163, 309, 168, 169, 170, 171, + 172, 173, 174, 215, 216, 179, 245, 334, 185, 5, + 6, 7, 8, 184, 194, 9, 195, 226, 227, 318, + 320, 5, 6, 234, 10, 246, 336, 406, 11, 194, + 278, 195, 235, 236, 337, 209, 240, 265, 402, 242, + 244, 335, 323, 247, 248, 148, 190, 366, 191, 490, + 194, 367, 195, 262, 494, 496, 401, 484, 324, 274, + 409, 277, 194, 263, 195, 232, 233, 266, 267, 268, + 269, 270, 271, 232, 232, 428, 232, 232, 470, 473, + 514, 430, 194, 84, 195, 232, 437, 251, 404, 453, + 460, 29, 28, 407, 292, 141, 266, 267, 268, 269, + 270, 271, 498, 156, 5, 6, 502, 469, 139, 5, + 6, 315, 483, 272, 149, 150, 151, 152, 153, 154, + 155, 74, 97, 501, 319, 513, 372, 81, 82, 83, + 331, 459, 338, 232, 85, 86, 87, 104, 105, 106, + 511, 285, 272, 109, 317, 368, 264, 477, 327, 328, + 329, 330, 29, 321, 85, 86, 87, 400, 29, 28, + 249, 286, 250, 88, 89, 90, 91, 92, 93, 94, + 0, 365, 232, 0, 232, 88, 89, 90, 91, 92, + 93, 94, 132, 88, 89, 90, 91, 92, 93, 94, + 0, 232, 133, 134, 5, 6, 7, 8, 0, 5, + 6, 0, 8, 0, 0, 0, 0, 8, 0, 10, + 0, 396, 28, 11, 10, 396, 28, 0, 11, 10, + 408, 436, 0, 11, 0, 481, 100, 101, 486, 232, + 0, 0, 443, 85, 86, 87, 0, 0, 0, 0, + 499, 107, 429, 0, 503, 0, 505, 434, 0, 0, + 507, 457, 0, 458, 509, 0, 510, 0, 232, 0, + 462, 232, 88, 89, 90, 91, 92, 93, 94, 79, + 80, 81, 82, 83, 464, 465, 0, 0, 467, 468, + 0, 472, 31, 0, 474, 475, 0, 145, 0, 478, + 32, 479, 0, 0, 33, 0, 488, 0, 34, 491, + 463, 0, 0, 0, 495, 497, 0, 0, 500, 0, + 146, 0, 504, 40, 506, 0, 476, 31, 203, 204, + 41, 42, 43, 44, 138, 32, 0, 142, 143, 33, + 492, 0, 147, 34, 157, 0, 0, 0, 85, 86, + 87, 77, 78, 79, 80, 81, 82, 83, 508, 45, + 46, 47, 48, 49, 50, 0, 51, 52, 53, 54, + 55, 85, 86, 87, 0, 56, 57, 88, 89, 90, + 91, 92, 93, 94, 0, 0, 58, 59, 0, 60, + 135, 137, 135, 135, 137, 137, 0, 0, 0, 135, + 88, 89, 90, 91, 92, 93, 94, 0, 0, 5, + 6, 7, 8, 85, 86, 87, 0, 0, 0, 296, + 0, 0, 0, 0, 10, 306, 0, 0, 11, 0, + 0, 0, 297, 298, 299, 300, 333, 0, 297, 298, + 299, 300, 88, 89, 90, 91, 92, 93, 94, 297, + 298, 299, 300, 31, 0, 0, 0, 301, 0, 0, + 0, 32, 0, 301, 0, 33, 0, 0, 0, 34, + 302, 303, 304, 305, 301, 0, 302, 303, 304, 305, + 0, 0, 0, 418, 0, 420, 0, 302, 303, 304, + 305, 426, 76, 77, 78, 79, 80, 81, 82, 83, + 0, 0, 0, 0, 0, 96, 0, 0, 0, 439, + 440, 441, 442, 0, 0, 444, 445, 0, 446, 339, + 447, 448, 449, 450, 451, 340, 452, 0, 0, 0, + 454, 455, 456, 0, 0, 341, 342, 343, 344, 345, + 346, 347, 348, 349, 350, 351, 352, 353, 354, 355, + 356, 357, 358, 359, 360, 361, 369, 362, 0, 0, + 0, 0, 340, 63, 64, 65, 66, 67, 68, 69, + 70, 0, 341, 342, 343, 344, 345, 346, 347, 348, + 349, 350, 351, 352, 353, 354, 355, 356, 357, 358, + 359, 360, 361, 405, 362, 0, 0, 0, 0, 340, + 76, 77, 78, 79, 80, 81, 82, 83, 0, 341, + 342, 343, 344, 345, 346, 347, 348, 349, 350, 351, + 352, 353, 354, 355, 356, 357, 358, 359, 360, 361, + 0, 362, 377, 378, 379, 380, 0, 382, 383, 0, + 385, 0, 387, 388, 389, 390, 391, 0, 393, 0, + 397, 398, 399, 76, 77, 78, 79, 80, 81, 82, + 83, 0, 0, 0, 0, 0, 118, 88, 89, 90, + 91, 92, 93, 94, 0, 0, 133, 134, 78, 79, + 80, 81, 82, 83, 252, 253, 254, 255, 256, 257, + 266, 267, 268, 269, 270, 271 +}; + +static const yytype_int16 yycheck[] = +{ + 3, 26, 35, 4, 1, 1, 4, 1, 3, 292, + 4, 306, 4, 3, 322, 3, 108, 4, 258, 10, + 11, 3, 3, 3, 60, 4, 261, 98, 109, 26, + 26, 6, 7, 8, 9, 10, 11, 108, 333, 4, + 280, 32, 33, 34, 90, 45, 46, 243, 94, 284, + 179, 3, 53, 91, 92, 91, 92, 4, 366, 60, + 108, 190, 191, 3, 110, 194, 195, 59, 0, 61, + 108, 74, 63, 64, 65, 66, 67, 68, 69, 70, + 276, 210, 85, 86, 87, 76, 77, 78, 79, 80, + 81, 82, 83, 358, 402, 291, 129, 362, 91, 92, + 94, 104, 81, 91, 92, 92, 3, 94, 102, 4, + 108, 144, 106, 108, 79, 80, 110, 246, 108, 106, + 108, 94, 54, 110, 4, 108, 108, 108, 108, 162, + 163, 91, 92, 108, 96, 168, 169, 110, 70, 335, + 60, 4, 95, 140, 141, 4, 149, 150, 151, 152, + 153, 154, 155, 186, 187, 158, 82, 4, 161, 91, + 92, 93, 94, 160, 59, 97, 61, 200, 201, 298, + 299, 91, 92, 108, 106, 81, 4, 4, 110, 59, + 3, 61, 215, 216, 313, 176, 219, 3, 90, 222, + 223, 3, 94, 226, 227, 3, 59, 98, 61, 482, + 59, 108, 61, 236, 487, 488, 111, 4, 110, 242, + 108, 244, 59, 238, 61, 211, 213, 62, 63, 64, + 65, 66, 67, 219, 220, 108, 222, 223, 3, 466, + 513, 108, 59, 3, 61, 231, 108, 228, 367, 108, + 108, 238, 238, 372, 277, 101, 62, 63, 64, 65, + 66, 67, 489, 3, 91, 92, 493, 108, 16, 91, + 92, 294, 108, 108, 72, 73, 74, 75, 76, 77, + 78, 108, 40, 108, 299, 512, 108, 103, 104, 105, + 305, 437, 315, 279, 54, 55, 56, 55, 56, 57, + 108, 265, 108, 61, 297, 328, 240, 470, 301, 302, + 303, 304, 299, 299, 54, 55, 56, 362, 305, 305, + 228, 272, 228, 83, 84, 85, 86, 87, 88, 89, + -1, 324, 318, -1, 320, 83, 84, 85, 86, 87, + 88, 89, 3, 83, 84, 85, 86, 87, 88, 89, + -1, 337, 92, 93, 91, 92, 93, 94, -1, 91, + 92, -1, 94, -1, -1, -1, -1, 94, -1, 106, + -1, 358, 358, 110, 106, 362, 362, -1, 110, 106, + 373, 404, -1, 110, -1, 475, 43, 44, 478, 375, + -1, -1, 415, 54, 55, 56, -1, -1, -1, -1, + 490, 58, 395, -1, 494, -1, 496, 400, -1, -1, + 500, 434, -1, 436, 504, -1, 506, -1, 404, -1, + 443, 407, 83, 84, 85, 86, 87, 88, 89, 101, + 102, 103, 104, 105, 457, 458, -1, -1, 461, 462, + -1, 464, 94, -1, 467, 468, -1, 3, -1, 472, + 102, 474, -1, -1, 106, -1, 479, -1, 110, 482, + 453, -1, -1, -1, 487, 488, -1, -1, 491, -1, + 3, -1, 495, 5, 497, -1, 469, 94, 95, 96, + 12, 13, 14, 15, 99, 102, -1, 102, 103, 106, + 483, -1, 107, 110, 109, -1, -1, -1, 54, 55, + 56, 99, 100, 101, 102, 103, 104, 105, 501, 41, + 42, 43, 44, 45, 46, -1, 48, 49, 50, 51, + 52, 54, 55, 56, -1, 57, 58, 83, 84, 85, + 86, 87, 88, 89, -1, -1, 68, 69, -1, 71, + 98, 99, 100, 101, 102, 103, -1, -1, -1, 107, + 83, 84, 85, 86, 87, 88, 89, -1, -1, 91, + 92, 93, 94, 54, 55, 56, -1, -1, -1, 3, + -1, -1, -1, -1, 106, 3, -1, -1, 110, -1, + -1, -1, 16, 17, 18, 19, 3, -1, 16, 17, + 18, 19, 83, 84, 85, 86, 87, 88, 89, 16, + 17, 18, 19, 94, -1, -1, -1, 41, -1, -1, + -1, 102, -1, 41, -1, 106, -1, -1, -1, 110, + 54, 55, 56, 57, 41, -1, 54, 55, 56, 57, + -1, -1, -1, 384, -1, 386, -1, 54, 55, 56, + 57, 392, 98, 99, 100, 101, 102, 103, 104, 105, + -1, -1, -1, -1, -1, 111, -1, -1, -1, 410, + 411, 412, 413, -1, -1, 416, 417, -1, 419, 4, + 421, 422, 423, 424, 425, 10, 427, -1, -1, -1, + 431, 432, 433, -1, -1, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 35, 36, 37, 38, 39, 40, 4, 42, -1, -1, + -1, -1, 10, 98, 99, 100, 101, 102, 103, 104, + 105, -1, 20, 21, 22, 23, 24, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, + 38, 39, 40, 4, 42, -1, -1, -1, -1, 10, + 98, 99, 100, 101, 102, 103, 104, 105, -1, 20, + 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, + -1, 42, 341, 342, 343, 344, -1, 346, 347, -1, + 349, -1, 351, 352, 353, 354, 355, -1, 357, -1, + 359, 360, 361, 98, 99, 100, 101, 102, 103, 104, + 105, -1, -1, -1, -1, -1, 111, 83, 84, 85, + 86, 87, 88, 89, -1, -1, 92, 93, 100, 101, + 102, 103, 104, 105, 6, 7, 8, 9, 10, 11, + 62, 63, 64, 65, 66, 67 +}; + +/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing + symbol of state STATE-NUM. */ +static const yytype_uint8 yystos[] = +{ + 0, 113, 0, 54, 70, 91, 92, 93, 94, 97, + 106, 110, 114, 120, 121, 122, 162, 163, 164, 165, + 170, 173, 178, 182, 183, 185, 190, 191, 199, 209, + 210, 94, 102, 106, 110, 206, 207, 193, 207, 207, + 5, 12, 13, 14, 15, 41, 42, 43, 44, 45, + 46, 48, 49, 50, 51, 52, 57, 58, 68, 69, + 71, 181, 190, 98, 99, 100, 101, 102, 103, 104, + 105, 207, 207, 207, 108, 205, 98, 99, 100, 101, + 102, 103, 104, 105, 3, 54, 55, 56, 83, 84, + 85, 86, 87, 88, 89, 196, 111, 193, 195, 194, + 195, 195, 194, 194, 193, 193, 193, 195, 186, 193, + 207, 207, 207, 207, 207, 207, 207, 207, 111, 206, + 207, 207, 207, 207, 207, 207, 207, 207, 179, 206, + 206, 206, 3, 92, 93, 196, 197, 196, 197, 16, + 126, 126, 197, 197, 206, 3, 3, 197, 3, 72, + 73, 74, 75, 76, 77, 78, 3, 197, 180, 205, + 115, 109, 209, 209, 205, 166, 171, 187, 206, 206, + 206, 206, 206, 206, 206, 174, 175, 1, 4, 206, + 4, 92, 116, 117, 209, 206, 205, 205, 3, 4, + 59, 61, 167, 4, 59, 61, 172, 4, 79, 80, + 205, 205, 4, 95, 96, 176, 177, 200, 201, 207, + 108, 198, 199, 108, 208, 205, 205, 184, 60, 198, + 198, 60, 198, 198, 3, 3, 205, 205, 108, 96, + 95, 198, 199, 209, 108, 205, 205, 4, 53, 60, + 205, 168, 205, 3, 205, 82, 81, 205, 205, 200, + 201, 207, 6, 7, 8, 9, 10, 11, 118, 119, + 123, 124, 205, 190, 168, 3, 62, 63, 64, 65, + 66, 67, 108, 169, 205, 171, 3, 205, 3, 198, + 108, 119, 127, 127, 125, 166, 169, 204, 205, 4, + 171, 3, 205, 188, 189, 119, 3, 16, 17, 18, + 19, 41, 54, 55, 56, 57, 3, 127, 4, 4, + 171, 204, 4, 81, 4, 205, 128, 206, 198, 190, + 198, 199, 90, 94, 110, 202, 203, 206, 206, 206, + 206, 190, 128, 3, 4, 3, 4, 198, 205, 4, + 10, 20, 21, 22, 23, 24, 25, 26, 27, 28, + 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, + 39, 40, 42, 129, 203, 206, 98, 108, 205, 4, + 128, 171, 108, 153, 154, 198, 209, 153, 153, 153, + 153, 135, 153, 153, 138, 153, 142, 153, 153, 153, + 153, 153, 148, 153, 191, 192, 209, 153, 153, 153, + 192, 111, 90, 203, 198, 4, 4, 198, 206, 108, + 130, 131, 132, 134, 151, 206, 136, 137, 151, 139, + 151, 143, 144, 145, 146, 147, 151, 149, 108, 206, + 108, 133, 140, 141, 206, 203, 205, 108, 152, 151, + 151, 151, 151, 205, 151, 151, 151, 151, 151, 151, + 151, 151, 151, 108, 151, 151, 151, 205, 205, 154, + 108, 156, 205, 206, 205, 205, 157, 205, 205, 108, + 3, 155, 205, 202, 205, 205, 206, 174, 205, 205, + 108, 155, 160, 108, 4, 108, 155, 158, 205, 161, + 204, 205, 206, 159, 204, 205, 204, 205, 202, 155, + 205, 108, 202, 155, 205, 155, 205, 155, 206, 155, + 155, 108, 150, 202, 204 +}; + +#define yyerrok (yyerrstatus = 0) +#define yyclearin (yychar = YYEMPTY) +#define YYEMPTY (-2) +#define YYEOF 0 + +#define YYACCEPT goto yyacceptlab +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab + + +/* Like YYERROR except do call yyerror. This remains here temporarily + to ease the transition to the new meaning of YYERROR, for GCC. + Once GCC version 2 has supplanted version 1, this can go. */ + +#define YYFAIL goto yyerrlab + +#define YYRECOVERING() (!!yyerrstatus) + +#define YYBACKUP(Token, Value) \ +do \ + if (yychar == YYEMPTY && yylen == 1) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ + YYPOPSTACK (1); \ + goto yybackup; \ + } \ + else \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ +while (YYID (0)) + + +#define YYTERROR 1 +#define YYERRCODE 256 + + +/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. + If N is 0, then set CURRENT to the empty location which ends + the previous symbol: RHS[0] (always defined). */ + +#define YYRHSLOC(Rhs, K) ((Rhs)[K]) +#ifndef YYLLOC_DEFAULT +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ + if (YYID (N)) \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ + while (YYID (0)) +#endif + + +/* YY_LOCATION_PRINT -- Print the location on the stream. + This macro was not mandated originally: define only if we know + we won't break user code: when these are the locations we know. */ + +#ifndef YY_LOCATION_PRINT +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) +# else +# define YY_LOCATION_PRINT(File, Loc) ((void) 0) +# endif +#endif + + +/* YYLEX -- calling `yylex' with the right arguments. */ + +#ifdef YYLEX_PARAM +# define YYLEX yylex (YYLEX_PARAM) +#else +# define YYLEX yylex () +#endif + +/* Enable debugging if requested. */ +#if YYDEBUG + +# ifndef YYFPRINTF +# include /* INFRINGES ON USER NAME SPACE */ +# define YYFPRINTF fprintf +# endif + +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ +} while (YYID (0)) + +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yy_symbol_print (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ +} while (YYID (0)) + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_value_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (!yyvaluep) + return; +# ifdef YYPRINT + if (yytype < YYNTOKENS) + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# else + YYUSE (yyoutput); +# endif + switch (yytype) + { + default: + break; + } +} + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (yytype < YYNTOKENS) + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + else + YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + + yy_symbol_value_print (yyoutput, yytype, yyvaluep); + YYFPRINTF (yyoutput, ")"); +} + +/*------------------------------------------------------------------. +| yy_stack_print -- Print the state stack from its BOTTOM up to its | +| TOP (included). | +`------------------------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_stack_print (yytype_int16 *bottom, yytype_int16 *top) +#else +static void +yy_stack_print (bottom, top) + yytype_int16 *bottom; + yytype_int16 *top; +#endif +{ + YYFPRINTF (stderr, "Stack now"); + for (; bottom <= top; ++bottom) + YYFPRINTF (stderr, " %d", *bottom); + YYFPRINTF (stderr, "\n"); +} + +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ +} while (YYID (0)) + + +/*------------------------------------------------. +| Report that the YYRULE is going to be reduced. | +`------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_reduce_print (YYSTYPE *yyvsp, int yyrule) +#else +static void +yy_reduce_print (yyvsp, yyrule) + YYSTYPE *yyvsp; + int yyrule; +#endif +{ + int yynrhs = yyr2[yyrule]; + int yyi; + unsigned long int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", + yyrule - 1, yylno); + /* The symbols being reduced. */ + for (yyi = 0; yyi < yynrhs; yyi++) + { + fprintf (stderr, " $%d = ", yyi + 1); + yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], + &(yyvsp[(yyi + 1) - (yynrhs)]) + ); + fprintf (stderr, "\n"); + } +} + +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ + yy_reduce_print (yyvsp, Rule); \ +} while (YYID (0)) + +/* Nonzero means print parse trace. It is left uninitialized so that + multiple parsers can coexist. */ +int yydebug; +#else /* !YYDEBUG */ +# define YYDPRINTF(Args) +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YY_STACK_PRINT(Bottom, Top) +# define YY_REDUCE_PRINT(Rule) +#endif /* !YYDEBUG */ + + +/* YYINITDEPTH -- initial size of the parser's stacks. */ +#ifndef YYINITDEPTH +# define YYINITDEPTH 200 +#endif + +/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only + if the built-in stack extension method is used). + + Do not make this value too large; the results are undefined if + YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + evaluated with infinite-precision integer arithmetic. */ + +#ifndef YYMAXDEPTH +# define YYMAXDEPTH 10000 +#endif + + + +#if YYERROR_VERBOSE + +# ifndef yystrlen +# if defined __GLIBC__ && defined _STRING_H +# define yystrlen strlen +# else +/* Return the length of YYSTR. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static YYSIZE_T +yystrlen (const char *yystr) +#else +static YYSIZE_T +yystrlen (yystr) + const char *yystr; +#endif +{ + YYSIZE_T yylen; + for (yylen = 0; yystr[yylen]; yylen++) + continue; + return yylen; +} +# endif +# endif + +# ifndef yystpcpy +# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE +# define yystpcpy stpcpy +# else +/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in + YYDEST. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static char * +yystpcpy (char *yydest, const char *yysrc) +#else +static char * +yystpcpy (yydest, yysrc) + char *yydest; + const char *yysrc; +#endif +{ + char *yyd = yydest; + const char *yys = yysrc; + + while ((*yyd++ = *yys++) != '\0') + continue; + + return yyd - 1; +} +# endif +# endif + +# ifndef yytnamerr +/* Copy to YYRES the contents of YYSTR after stripping away unnecessary + quotes and backslashes, so that it's suitable for yyerror. The + heuristic is that double-quoting is unnecessary unless the string + contains an apostrophe, a comma, or backslash (other than + backslash-backslash). YYSTR is taken from yytname. If YYRES is + null, do not copy; instead, return the length of what the result + would have been. */ +static YYSIZE_T +yytnamerr (char *yyres, const char *yystr) +{ + if (*yystr == '"') + { + YYSIZE_T yyn = 0; + char const *yyp = yystr; + + for (;;) + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; + + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; + + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } + do_not_strip_quotes: ; + } + + if (! yyres) + return yystrlen (yystr); + + return yystpcpy (yyres, yystr) - yyres; +} +# endif + +/* Copy into YYRESULT an error message about the unexpected token + YYCHAR while in state YYSTATE. Return the number of bytes copied, + including the terminating null byte. If YYRESULT is null, do not + copy anything; just return the number of bytes that would be + copied. As a special case, return 0 if an ordinary "syntax error" + message will do. Return YYSIZE_MAXIMUM if overflow occurs during + size calculation. */ +static YYSIZE_T +yysyntax_error (char *yyresult, int yystate, int yychar) +{ + int yyn = yypact[yystate]; + + if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) + return 0; + else + { + int yytype = YYTRANSLATE (yychar); + YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); + YYSIZE_T yysize = yysize0; + YYSIZE_T yysize1; + int yysize_overflow = 0; + enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; + char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + int yyx; + +# if 0 + /* This is so xgettext sees the translatable formats that are + constructed on the fly. */ + YY_("syntax error, unexpected %s"); + YY_("syntax error, unexpected %s, expecting %s"); + YY_("syntax error, unexpected %s, expecting %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); +# endif + char *yyfmt; + char const *yyf; + static char const yyunexpected[] = "syntax error, unexpected %s"; + static char const yyexpecting[] = ", expecting %s"; + static char const yyor[] = " or %s"; + char yyformat[sizeof yyunexpected + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; + char const *yyprefix = yyexpecting; + + /* Start YYX at -YYN if negative to avoid negative indexes in + YYCHECK. */ + int yyxbegin = yyn < 0 ? -yyn : 0; + + /* Stay within bounds of both yycheck and yytname. */ + int yychecklim = YYLAST - yyn + 1; + int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; + int yycount = 1; + + yyarg[0] = yytname[yytype]; + yyfmt = yystpcpy (yyformat, yyunexpected); + + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } + + yyf = YY_(yyformat); + yysize1 = yysize + yystrlen (yyf); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + + if (yysize_overflow) + return YYSIZE_MAXIMUM; + + if (yyresult) + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yyresult; + int yyi = 0; + while ((*yyp = *yyf) != '\0') + { + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } + } + } + return yysize; + } +} +#endif /* YYERROR_VERBOSE */ + + +/*-----------------------------------------------. +| Release the memory associated to this symbol. | +`-----------------------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +#else +static void +yydestruct (yymsg, yytype, yyvaluep) + const char *yymsg; + int yytype; + YYSTYPE *yyvaluep; +#endif +{ + YYUSE (yyvaluep); + + if (!yymsg) + yymsg = "Deleting"; + YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); + + switch (yytype) + { + + default: + break; + } +} + + +/* Prevent warnings from -Wmissing-prototypes. */ + +#ifdef YYPARSE_PARAM +#if defined __STDC__ || defined __cplusplus +int yyparse (void *YYPARSE_PARAM); +#else +int yyparse (); +#endif +#else /* ! YYPARSE_PARAM */ +#if defined __STDC__ || defined __cplusplus +int yyparse (void); +#else +int yyparse (); +#endif +#endif /* ! YYPARSE_PARAM */ + + + +/* The look-ahead symbol. */ +int yychar; + +/* The semantic value of the look-ahead symbol. */ +YYSTYPE yylval; + +/* Number of syntax errors so far. */ +int yynerrs; + + + +/*----------. +| yyparse. | +`----------*/ + +#ifdef YYPARSE_PARAM +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void *YYPARSE_PARAM) +#else +int +yyparse (YYPARSE_PARAM) + void *YYPARSE_PARAM; +#endif +#else /* ! YYPARSE_PARAM */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void) +#else +int +yyparse () + +#endif +#endif +{ + + int yystate; + int yyn; + int yyresult; + /* Number of tokens to shift before error messages enabled. */ + int yyerrstatus; + /* Look-ahead token as an internal (translated) token number. */ + int yytoken = 0; +#if YYERROR_VERBOSE + /* Buffer for error messages, and its allocated size. */ + char yymsgbuf[128]; + char *yymsg = yymsgbuf; + YYSIZE_T yymsg_alloc = sizeof yymsgbuf; +#endif + + /* Three stacks and their tools: + `yyss': related to states, + `yyvs': related to semantic values, + `yyls': related to locations. + + Refer to the stacks thru separate pointers, to allow yyoverflow + to reallocate them elsewhere. */ + + /* The state stack. */ + yytype_int16 yyssa[YYINITDEPTH]; + yytype_int16 *yyss = yyssa; + yytype_int16 *yyssp; + + /* The semantic value stack. */ + YYSTYPE yyvsa[YYINITDEPTH]; + YYSTYPE *yyvs = yyvsa; + YYSTYPE *yyvsp; + + + +#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) + + YYSIZE_T yystacksize = YYINITDEPTH; + + /* The variables used to return semantic value and location from the + action routines. */ + YYSTYPE yyval; + + + /* The number of symbols on the RHS of the reduced rule. + Keep to zero when no symbol should be popped. */ + int yylen = 0; + + YYDPRINTF ((stderr, "Starting parse\n")); + + yystate = 0; + yyerrstatus = 0; + yynerrs = 0; + yychar = YYEMPTY; /* Cause a token to be read. */ + + /* Initialize stack pointers. + Waste one element of value and location stack + so that they stay on the same level as the state stack. + The wasted elements are never initialized. */ + + yyssp = yyss; + yyvsp = yyvs; + + goto yysetstate; + +/*------------------------------------------------------------. +| yynewstate -- Push a new state, which is found in yystate. | +`------------------------------------------------------------*/ + yynewstate: + /* In all cases, when you get here, the value and location stacks + have just been pushed. So pushing a state here evens the stacks. */ + yyssp++; + + yysetstate: + *yyssp = yystate; + + if (yyss + yystacksize - 1 <= yyssp) + { + /* Get the current used size of the three stacks, in elements. */ + YYSIZE_T yysize = yyssp - yyss + 1; + +#ifdef yyoverflow + { + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + yytype_int16 *yyss1 = yyss; + + + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), + + &yystacksize); + + yyss = yyss1; + yyvs = yyvs1; + } +#else /* no yyoverflow */ +# ifndef YYSTACK_RELOCATE + goto yyexhaustedlab; +# else + /* Extend the stack our own way. */ + if (YYMAXDEPTH <= yystacksize) + goto yyexhaustedlab; + yystacksize *= 2; + if (YYMAXDEPTH < yystacksize) + yystacksize = YYMAXDEPTH; + + { + yytype_int16 *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss); + YYSTACK_RELOCATE (yyvs); + +# undef YYSTACK_RELOCATE + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); + } +# endif +#endif /* no yyoverflow */ + + yyssp = yyss + yysize - 1; + yyvsp = yyvs + yysize - 1; + + + YYDPRINTF ((stderr, "Stack size increased to %lu\n", + (unsigned long int) yystacksize)); + + if (yyss + yystacksize - 1 <= yyssp) + YYABORT; + } + + YYDPRINTF ((stderr, "Entering state %d\n", yystate)); + + goto yybackup; + +/*-----------. +| yybackup. | +`-----------*/ +yybackup: + + /* Do appropriate processing given the current state. Read a + look-ahead token if we need one and don't already have one. */ + + /* First try to decide what to do without reference to look-ahead token. */ + yyn = yypact[yystate]; + if (yyn == YYPACT_NINF) + goto yydefault; + + /* Not known => get a look-ahead token if don't already have one. */ + + /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ + if (yychar == YYEMPTY) + { + YYDPRINTF ((stderr, "Reading a token: ")); + yychar = YYLEX; + } + + if (yychar <= YYEOF) + { + yychar = yytoken = YYEOF; + YYDPRINTF ((stderr, "Now at end of input.\n")); + } + else + { + yytoken = YYTRANSLATE (yychar); + YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + } + + /* If the proper action on seeing token YYTOKEN is to reduce or to + detect an error, take that action. */ + yyn += yytoken; + if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) + goto yydefault; + yyn = yytable[yyn]; + if (yyn <= 0) + { + if (yyn == 0 || yyn == YYTABLE_NINF) + goto yyerrlab; + yyn = -yyn; + goto yyreduce; + } + + if (yyn == YYFINAL) + YYACCEPT; + + /* Count tokens shifted since error; after three, turn off error + status. */ + if (yyerrstatus) + yyerrstatus--; + + /* Shift the look-ahead token. */ + YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + + /* Discard the shifted token unless it is eof. */ + if (yychar != YYEOF) + yychar = YYEMPTY; + + yystate = yyn; + *++yyvsp = yylval; + + goto yynewstate; + + +/*-----------------------------------------------------------. +| yydefault -- do the default action for the current state. | +`-----------------------------------------------------------*/ +yydefault: + yyn = yydefact[yystate]; + if (yyn == 0) + goto yyerrlab; + goto yyreduce; + + +/*-----------------------------. +| yyreduce -- Do a reduction. | +`-----------------------------*/ +yyreduce: + /* yyn is the number of a rule to reduce with. */ + yylen = yyr2[yyn]; + + /* If YYLEN is nonzero, implement the default value of the action: + `$$ = $1'. + + Otherwise, the following line sets YYVAL to garbage. + This behavior is undocumented and Bison + users should not rely upon it. Assigning to YYVAL + unconditionally makes the parser a bit smaller, and it avoids a + GCC warning that YYVAL may be used uninitialized. */ + yyval = yyvsp[1-yylen]; + + + YY_REDUCE_PRINT (yyn); + switch (yyn) + { + case 18: +#line 200 "rcparse.y" + { + define_accelerator ((yyvsp[(1) - (6)].id), &(yyvsp[(3) - (6)].res_info), (yyvsp[(5) - (6)].pacc)); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 19: +#line 210 "rcparse.y" + { + (yyval.pacc) = NULL; + } + break; + + case 20: +#line 214 "rcparse.y" + { + rc_accelerator *a; + + a = (rc_accelerator *) res_alloc (sizeof *a); + *a = (yyvsp[(2) - (2)].acc); + if ((yyvsp[(1) - (2)].pacc) == NULL) + (yyval.pacc) = a; + else + { + rc_accelerator **pp; + + for (pp = &(yyvsp[(1) - (2)].pacc)->next; *pp != NULL; pp = &(*pp)->next) + ; + *pp = a; + (yyval.pacc) = (yyvsp[(1) - (2)].pacc); + } + } + break; + + case 21: +#line 235 "rcparse.y" + { + (yyval.acc) = (yyvsp[(1) - (2)].acc); + (yyval.acc).id = (yyvsp[(2) - (2)].il); + } + break; + + case 22: +#line 240 "rcparse.y" + { + (yyval.acc) = (yyvsp[(1) - (4)].acc); + (yyval.acc).id = (yyvsp[(2) - (4)].il); + (yyval.acc).flags |= (yyvsp[(4) - (4)].is); + if (((yyval.acc).flags & ACC_VIRTKEY) == 0 + && ((yyval.acc).flags & (ACC_SHIFT | ACC_CONTROL)) != 0) + rcparse_warning (_("inappropriate modifiers for non-VIRTKEY")); + } + break; + + case 23: +#line 252 "rcparse.y" + { + const char *s = (yyvsp[(1) - (1)].s); + char ch; + + (yyval.acc).next = NULL; + (yyval.acc).id = 0; + ch = *s; + if (ch != '^') + (yyval.acc).flags = 0; + else + { + (yyval.acc).flags = ACC_CONTROL | ACC_VIRTKEY; + ++s; + ch = TOUPPER (s[0]); + } + (yyval.acc).key = ch; + if (s[1] != '\0') + rcparse_warning (_("accelerator should only be one character")); + } + break; + + case 24: +#line 272 "rcparse.y" + { + (yyval.acc).next = NULL; + (yyval.acc).flags = 0; + (yyval.acc).id = 0; + (yyval.acc).key = (yyvsp[(1) - (1)].il); + } + break; + + case 25: +#line 282 "rcparse.y" + { + (yyval.is) = (yyvsp[(1) - (1)].is); + } + break; + + case 26: +#line 286 "rcparse.y" + { + (yyval.is) = (yyvsp[(1) - (3)].is) | (yyvsp[(3) - (3)].is); + } + break; + + case 27: +#line 291 "rcparse.y" + { + (yyval.is) = (yyvsp[(1) - (2)].is) | (yyvsp[(2) - (2)].is); + } + break; + + case 28: +#line 298 "rcparse.y" + { + (yyval.is) = ACC_VIRTKEY; + } + break; + + case 29: +#line 302 "rcparse.y" + { + /* This is just the absence of VIRTKEY. */ + (yyval.is) = 0; + } + break; + + case 30: +#line 307 "rcparse.y" + { + (yyval.is) = ACC_NOINVERT; + } + break; + + case 31: +#line 311 "rcparse.y" + { + (yyval.is) = ACC_SHIFT; + } + break; + + case 32: +#line 315 "rcparse.y" + { + (yyval.is) = ACC_CONTROL; + } + break; + + case 33: +#line 319 "rcparse.y" + { + (yyval.is) = ACC_ALT; + } + break; + + case 34: +#line 328 "rcparse.y" + { + define_bitmap ((yyvsp[(1) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s)); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 35: +#line 340 "rcparse.y" + { + define_cursor ((yyvsp[(1) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s)); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 36: +#line 353 "rcparse.y" + { + memset (&dialog, 0, sizeof dialog); + dialog.x = (yyvsp[(5) - (8)].il); + dialog.y = (yyvsp[(6) - (8)].il); + dialog.width = (yyvsp[(7) - (8)].il); + dialog.height = (yyvsp[(8) - (8)].il); + dialog.style = WS_POPUP | WS_BORDER | WS_SYSMENU; + dialog.exstyle = (yyvsp[(4) - (8)].il); + dialog.menu.named = 1; + dialog.class.named = 1; + dialog.font = NULL; + dialog.ex = NULL; + dialog.controls = NULL; + sub_res_info = (yyvsp[(3) - (8)].res_info); + style = 0; + } + break; + + case 37: +#line 370 "rcparse.y" + { + define_dialog ((yyvsp[(1) - (13)].id), &sub_res_info, &dialog); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 38: +#line 378 "rcparse.y" + { + memset (&dialog, 0, sizeof dialog); + dialog.x = (yyvsp[(5) - (8)].il); + dialog.y = (yyvsp[(6) - (8)].il); + dialog.width = (yyvsp[(7) - (8)].il); + dialog.height = (yyvsp[(8) - (8)].il); + dialog.style = WS_POPUP | WS_BORDER | WS_SYSMENU; + dialog.exstyle = (yyvsp[(4) - (8)].il); + dialog.menu.named = 1; + dialog.class.named = 1; + dialog.font = NULL; + dialog.ex = ((rc_dialog_ex *) + res_alloc (sizeof (rc_dialog_ex))); + memset (dialog.ex, 0, sizeof (rc_dialog_ex)); + dialog.controls = NULL; + sub_res_info = (yyvsp[(3) - (8)].res_info); + style = 0; + } + break; + + case 39: +#line 397 "rcparse.y" + { + define_dialog ((yyvsp[(1) - (13)].id), &sub_res_info, &dialog); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 40: +#line 405 "rcparse.y" + { + memset (&dialog, 0, sizeof dialog); + dialog.x = (yyvsp[(5) - (9)].il); + dialog.y = (yyvsp[(6) - (9)].il); + dialog.width = (yyvsp[(7) - (9)].il); + dialog.height = (yyvsp[(8) - (9)].il); + dialog.style = WS_POPUP | WS_BORDER | WS_SYSMENU; + dialog.exstyle = (yyvsp[(4) - (9)].il); + dialog.menu.named = 1; + dialog.class.named = 1; + dialog.font = NULL; + dialog.ex = ((rc_dialog_ex *) + res_alloc (sizeof (rc_dialog_ex))); + memset (dialog.ex, 0, sizeof (rc_dialog_ex)); + dialog.ex->help = (yyvsp[(9) - (9)].il); + dialog.controls = NULL; + sub_res_info = (yyvsp[(3) - (9)].res_info); + style = 0; + } + break; + + case 41: +#line 425 "rcparse.y" + { + define_dialog ((yyvsp[(1) - (14)].id), &sub_res_info, &dialog); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 42: +#line 435 "rcparse.y" + { + (yyval.il) = 0; + } + break; + + case 43: +#line 439 "rcparse.y" + { + (yyval.il) = (yyvsp[(3) - (3)].il); + } + break; + + case 45: +#line 447 "rcparse.y" + { + dialog.style |= WS_CAPTION; + style |= WS_CAPTION; + dialog.caption = (yyvsp[(3) - (3)].uni); + } + break; + + case 46: +#line 453 "rcparse.y" + { + dialog.class = (yyvsp[(3) - (3)].id); + } + break; + + case 47: +#line 458 "rcparse.y" + { + dialog.style = style; + } + break; + + case 48: +#line 462 "rcparse.y" + { + dialog.exstyle = (yyvsp[(3) - (3)].il); + } + break; + + case 49: +#line 466 "rcparse.y" + { + res_unistring_to_id (& dialog.class, (yyvsp[(3) - (3)].uni)); + } + break; + + case 50: +#line 470 "rcparse.y" + { + dialog.style |= DS_SETFONT; + style |= DS_SETFONT; + dialog.pointsize = (yyvsp[(3) - (5)].il); + dialog.font = (yyvsp[(5) - (5)].uni); + if (dialog.ex != NULL) + { + dialog.ex->weight = 0; + dialog.ex->italic = 0; + dialog.ex->charset = 1; + } + } + break; + + case 51: +#line 483 "rcparse.y" + { + dialog.style |= DS_SETFONT; + style |= DS_SETFONT; + dialog.pointsize = (yyvsp[(3) - (6)].il); + dialog.font = (yyvsp[(5) - (6)].uni); + if (dialog.ex == NULL) + rcparse_warning (_("extended FONT requires DIALOGEX")); + else + { + dialog.ex->weight = (yyvsp[(6) - (6)].il); + dialog.ex->italic = 0; + dialog.ex->charset = 1; + } + } + break; + + case 52: +#line 498 "rcparse.y" + { + dialog.style |= DS_SETFONT; + style |= DS_SETFONT; + dialog.pointsize = (yyvsp[(3) - (7)].il); + dialog.font = (yyvsp[(5) - (7)].uni); + if (dialog.ex == NULL) + rcparse_warning (_("extended FONT requires DIALOGEX")); + else + { + dialog.ex->weight = (yyvsp[(6) - (7)].il); + dialog.ex->italic = (yyvsp[(7) - (7)].il); + dialog.ex->charset = 1; + } + } + break; + + case 53: +#line 513 "rcparse.y" + { + dialog.style |= DS_SETFONT; + style |= DS_SETFONT; + dialog.pointsize = (yyvsp[(3) - (8)].il); + dialog.font = (yyvsp[(5) - (8)].uni); + if (dialog.ex == NULL) + rcparse_warning (_("extended FONT requires DIALOGEX")); + else + { + dialog.ex->weight = (yyvsp[(6) - (8)].il); + dialog.ex->italic = (yyvsp[(7) - (8)].il); + dialog.ex->charset = (yyvsp[(8) - (8)].il); + } + } + break; + + case 54: +#line 528 "rcparse.y" + { + dialog.menu = (yyvsp[(3) - (3)].id); + } + break; + + case 55: +#line 532 "rcparse.y" + { + sub_res_info.characteristics = (yyvsp[(3) - (3)].il); + } + break; + + case 56: +#line 536 "rcparse.y" + { + sub_res_info.language = (yyvsp[(3) - (4)].il) | ((yyvsp[(4) - (4)].il) << SUBLANG_SHIFT); + } + break; + + case 57: +#line 540 "rcparse.y" + { + sub_res_info.version = (yyvsp[(3) - (3)].il); + } + break; + + case 59: +#line 548 "rcparse.y" + { + rc_dialog_control **pp; + + for (pp = &dialog.controls; *pp != NULL; pp = &(*pp)->next) + ; + *pp = (yyvsp[(2) - (2)].dialog_control); + } + break; + + case 60: +#line 559 "rcparse.y" + { + default_style = BS_AUTO3STATE | WS_TABSTOP; + base_style = BS_AUTO3STATE; + class.named = 0; + class.u.id = CTL_BUTTON; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 61: +#line 567 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 62: +#line 571 "rcparse.y" + { + default_style = BS_AUTOCHECKBOX | WS_TABSTOP; + base_style = BS_AUTOCHECKBOX; + class.named = 0; + class.u.id = CTL_BUTTON; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 63: +#line 579 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 64: +#line 583 "rcparse.y" + { + default_style = BS_AUTORADIOBUTTON | WS_TABSTOP; + base_style = BS_AUTORADIOBUTTON; + class.named = 0; + class.u.id = CTL_BUTTON; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 65: +#line 591 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 66: +#line 595 "rcparse.y" + { + default_style = ES_LEFT | WS_BORDER | WS_TABSTOP; + base_style = ES_LEFT | WS_BORDER | WS_TABSTOP; + class.named = 0; + class.u.id = CTL_EDIT; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 67: +#line 603 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + if (dialog.ex == NULL) + rcparse_warning (_("BEDIT requires DIALOGEX")); + res_string_to_id (&(yyval.dialog_control)->class, "BEDIT"); + } + break; + + case 68: +#line 610 "rcparse.y" + { + default_style = BS_CHECKBOX | WS_TABSTOP; + base_style = BS_CHECKBOX | WS_TABSTOP; + class.named = 0; + class.u.id = CTL_BUTTON; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 69: +#line 618 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 70: +#line 622 "rcparse.y" + { + /* This is as per MSDN documentation. With some (???) + versions of MS rc.exe their is no default style. */ + default_style = CBS_SIMPLE | WS_TABSTOP; + base_style = 0; + class.named = 0; + class.u.id = CTL_COMBOBOX; + res_text_field = res_null_text; + } + break; + + case 71: +#line 632 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(3) - (3)].dialog_control); + } + break; + + case 72: +#line 637 "rcparse.y" + { + (yyval.dialog_control) = define_control ((yyvsp[(2) - (11)].id), (yyvsp[(3) - (11)].il), (yyvsp[(6) - (11)].il), (yyvsp[(7) - (11)].il), (yyvsp[(8) - (11)].il), (yyvsp[(9) - (11)].il), (yyvsp[(4) - (11)].id), style, (yyvsp[(10) - (11)].il)); + if ((yyvsp[(11) - (11)].rcdata_item) != NULL) + { + if (dialog.ex == NULL) + rcparse_warning (_("control data requires DIALOGEX")); + (yyval.dialog_control)->data = (yyvsp[(11) - (11)].rcdata_item); + } + } + break; + + case 73: +#line 648 "rcparse.y" + { + (yyval.dialog_control) = define_control ((yyvsp[(2) - (12)].id), (yyvsp[(3) - (12)].il), (yyvsp[(6) - (12)].il), (yyvsp[(7) - (12)].il), (yyvsp[(8) - (12)].il), (yyvsp[(9) - (12)].il), (yyvsp[(4) - (12)].id), style, (yyvsp[(10) - (12)].il)); + if (dialog.ex == NULL) + rcparse_warning (_("help ID requires DIALOGEX")); + (yyval.dialog_control)->help = (yyvsp[(11) - (12)].il); + (yyval.dialog_control)->data = (yyvsp[(12) - (12)].rcdata_item); + } + break; + + case 74: +#line 656 "rcparse.y" + { + default_style = SS_CENTER | WS_GROUP; + base_style = SS_CENTER; + class.named = 0; + class.u.id = CTL_STATIC; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 75: +#line 664 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 76: +#line 668 "rcparse.y" + { + default_style = BS_DEFPUSHBUTTON | WS_TABSTOP; + base_style = BS_DEFPUSHBUTTON | WS_TABSTOP; + class.named = 0; + class.u.id = CTL_BUTTON; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 77: +#line 676 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 78: +#line 680 "rcparse.y" + { + default_style = ES_LEFT | WS_BORDER | WS_TABSTOP; + base_style = ES_LEFT | WS_BORDER | WS_TABSTOP; + class.named = 0; + class.u.id = CTL_EDIT; + res_text_field = res_null_text; + } + break; + + case 79: +#line 688 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(3) - (3)].dialog_control); + } + break; + + case 80: +#line 692 "rcparse.y" + { + default_style = BS_GROUPBOX; + base_style = BS_GROUPBOX; + class.named = 0; + class.u.id = CTL_BUTTON; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 81: +#line 700 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 82: +#line 704 "rcparse.y" + { + default_style = ES_LEFT | WS_BORDER | WS_TABSTOP; + base_style = ES_LEFT | WS_BORDER | WS_TABSTOP; + class.named = 0; + class.u.id = CTL_EDIT; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 83: +#line 712 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + if (dialog.ex == NULL) + rcparse_warning (_("IEDIT requires DIALOGEX")); + res_string_to_id (&(yyval.dialog_control)->class, "HEDIT"); + } + break; + + case 84: +#line 719 "rcparse.y" + { + (yyval.dialog_control) = define_icon_control ((yyvsp[(2) - (6)].id), (yyvsp[(3) - (6)].il), (yyvsp[(4) - (6)].il), (yyvsp[(5) - (6)].il), 0, 0, 0, (yyvsp[(6) - (6)].rcdata_item), + dialog.ex); + } + break; + + case 85: +#line 725 "rcparse.y" + { + (yyval.dialog_control) = define_icon_control ((yyvsp[(2) - (8)].id), (yyvsp[(3) - (8)].il), (yyvsp[(4) - (8)].il), (yyvsp[(5) - (8)].il), 0, 0, 0, (yyvsp[(8) - (8)].rcdata_item), + dialog.ex); + } + break; + + case 86: +#line 731 "rcparse.y" + { + (yyval.dialog_control) = define_icon_control ((yyvsp[(2) - (10)].id), (yyvsp[(3) - (10)].il), (yyvsp[(4) - (10)].il), (yyvsp[(5) - (10)].il), style, (yyvsp[(9) - (10)].il), 0, (yyvsp[(10) - (10)].rcdata_item), + dialog.ex); + } + break; + + case 87: +#line 737 "rcparse.y" + { + (yyval.dialog_control) = define_icon_control ((yyvsp[(2) - (11)].id), (yyvsp[(3) - (11)].il), (yyvsp[(4) - (11)].il), (yyvsp[(5) - (11)].il), style, (yyvsp[(9) - (11)].il), (yyvsp[(10) - (11)].il), (yyvsp[(11) - (11)].rcdata_item), + dialog.ex); + } + break; + + case 88: +#line 742 "rcparse.y" + { + default_style = ES_LEFT | WS_BORDER | WS_TABSTOP; + base_style = ES_LEFT | WS_BORDER | WS_TABSTOP; + class.named = 0; + class.u.id = CTL_EDIT; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 89: +#line 750 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + if (dialog.ex == NULL) + rcparse_warning (_("IEDIT requires DIALOGEX")); + res_string_to_id (&(yyval.dialog_control)->class, "IEDIT"); + } + break; + + case 90: +#line 757 "rcparse.y" + { + default_style = LBS_NOTIFY | WS_BORDER; + base_style = LBS_NOTIFY | WS_BORDER; + class.named = 0; + class.u.id = CTL_LISTBOX; + res_text_field = res_null_text; + } + break; + + case 91: +#line 765 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(3) - (3)].dialog_control); + } + break; + + case 92: +#line 769 "rcparse.y" + { + default_style = SS_LEFT | WS_GROUP; + base_style = SS_LEFT; + class.named = 0; + class.u.id = CTL_STATIC; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 93: +#line 777 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 94: +#line 781 "rcparse.y" + { + default_style = BS_PUSHBOX | WS_TABSTOP; + base_style = BS_PUSHBOX; + class.named = 0; + class.u.id = CTL_BUTTON; + } + break; + + case 95: +#line 788 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 96: +#line 792 "rcparse.y" + { + default_style = BS_PUSHBUTTON | WS_TABSTOP; + base_style = BS_PUSHBUTTON | WS_TABSTOP; + class.named = 0; + class.u.id = CTL_BUTTON; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 97: +#line 800 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 98: +#line 804 "rcparse.y" + { + default_style = BS_RADIOBUTTON | WS_TABSTOP; + base_style = BS_RADIOBUTTON; + class.named = 0; + class.u.id = CTL_BUTTON; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 99: +#line 812 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 100: +#line 816 "rcparse.y" + { + default_style = SS_RIGHT | WS_GROUP; + base_style = SS_RIGHT; + class.named = 0; + class.u.id = CTL_STATIC; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 101: +#line 824 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 102: +#line 828 "rcparse.y" + { + default_style = SBS_HORZ; + base_style = 0; + class.named = 0; + class.u.id = CTL_SCROLLBAR; + res_text_field = res_null_text; + } + break; + + case 103: +#line 836 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(3) - (3)].dialog_control); + } + break; + + case 104: +#line 840 "rcparse.y" + { + default_style = BS_3STATE | WS_TABSTOP; + base_style = BS_3STATE; + class.named = 0; + class.u.id = CTL_BUTTON; + res_text_field = (yyvsp[(2) - (2)].id); + } + break; + + case 105: +#line 848 "rcparse.y" + { + (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control); + } + break; + + case 106: +#line 853 "rcparse.y" + { style = WS_CHILD | WS_VISIBLE; } + break; + + case 107: +#line 855 "rcparse.y" + { + rc_res_id cid; + cid.named = 0; + cid.u.id = CTL_BUTTON; + (yyval.dialog_control) = define_control ((yyvsp[(2) - (15)].id), (yyvsp[(3) - (15)].il), (yyvsp[(5) - (15)].il), (yyvsp[(7) - (15)].il), (yyvsp[(9) - (15)].il), (yyvsp[(11) - (15)].il), cid, + style, (yyvsp[(15) - (15)].il)); + } + break; + + case 108: +#line 873 "rcparse.y" + { + (yyval.dialog_control) = define_control (res_text_field, (yyvsp[(1) - (6)].il), (yyvsp[(2) - (6)].il), (yyvsp[(3) - (6)].il), (yyvsp[(4) - (6)].il), (yyvsp[(5) - (6)].il), class, + default_style | WS_CHILD | WS_VISIBLE, 0); + if ((yyvsp[(6) - (6)].rcdata_item) != NULL) + { + if (dialog.ex == NULL) + rcparse_warning (_("control data requires DIALOGEX")); + (yyval.dialog_control)->data = (yyvsp[(6) - (6)].rcdata_item); + } + } + break; + + case 109: +#line 885 "rcparse.y" + { + (yyval.dialog_control) = define_control (res_text_field, (yyvsp[(1) - (8)].il), (yyvsp[(2) - (8)].il), (yyvsp[(3) - (8)].il), (yyvsp[(4) - (8)].il), (yyvsp[(5) - (8)].il), class, style, (yyvsp[(7) - (8)].il)); + if ((yyvsp[(8) - (8)].rcdata_item) != NULL) + { + if (dialog.ex == NULL) + rcparse_warning (_("control data requires DIALOGEX")); + (yyval.dialog_control)->data = (yyvsp[(8) - (8)].rcdata_item); + } + } + break; + + case 110: +#line 896 "rcparse.y" + { + (yyval.dialog_control) = define_control (res_text_field, (yyvsp[(1) - (9)].il), (yyvsp[(2) - (9)].il), (yyvsp[(3) - (9)].il), (yyvsp[(4) - (9)].il), (yyvsp[(5) - (9)].il), class, style, (yyvsp[(7) - (9)].il)); + if (dialog.ex == NULL) + rcparse_warning (_("help ID requires DIALOGEX")); + (yyval.dialog_control)->help = (yyvsp[(8) - (9)].il); + (yyval.dialog_control)->data = (yyvsp[(9) - (9)].rcdata_item); + } + break; + + case 111: +#line 907 "rcparse.y" + { + if ((yyvsp[(2) - (2)].id).named) + res_unistring_to_id (&(yyval.id), (yyvsp[(2) - (2)].id).u.n.name); + else + (yyval.id)=(yyvsp[(2) - (2)].id); + } + break; + + case 112: +#line 917 "rcparse.y" + { + res_string_to_id (&(yyval.id), ""); + } + break; + + case 113: +#line 920 "rcparse.y" + { (yyval.id)=(yyvsp[(1) - (2)].id); } + break; + + case 114: +#line 925 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = (yyvsp[(1) - (1)].il); + } + break; + + case 115: +#line 930 "rcparse.y" + { + (yyval.id).named = 1; + (yyval.id).u.n.name = (yyvsp[(1) - (1)].uni); + (yyval.id).u.n.length = unichar_len ((yyvsp[(1) - (1)].uni)); + } + break; + + case 116: +#line 939 "rcparse.y" + { + (yyval.rcdata_item) = NULL; + } + break; + + case 117: +#line 943 "rcparse.y" + { + (yyval.rcdata_item) = (yyvsp[(2) - (3)].rcdata).first; + } + break; + + case 118: +#line 952 "rcparse.y" + { style = WS_CHILD | WS_VISIBLE; } + break; + + case 120: +#line 958 "rcparse.y" + { style = SS_ICON | WS_CHILD | WS_VISIBLE; } + break; + + case 122: +#line 964 "rcparse.y" + { style = base_style | WS_CHILD | WS_VISIBLE; } + break; + + case 124: +#line 972 "rcparse.y" + { + define_font ((yyvsp[(1) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s)); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 125: +#line 984 "rcparse.y" + { + define_icon ((yyvsp[(1) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s)); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 126: +#line 997 "rcparse.y" + { + language = (yyvsp[(2) - (3)].il) | ((yyvsp[(3) - (3)].il) << SUBLANG_SHIFT); + } + break; + + case 127: +#line 1006 "rcparse.y" + { + define_menu ((yyvsp[(1) - (6)].id), &(yyvsp[(3) - (6)].res_info), (yyvsp[(5) - (6)].menuitem)); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 128: +#line 1016 "rcparse.y" + { + (yyval.menuitem) = NULL; + } + break; + + case 129: +#line 1020 "rcparse.y" + { + if ((yyvsp[(1) - (2)].menuitem) == NULL) + (yyval.menuitem) = (yyvsp[(2) - (2)].menuitem); + else + { + rc_menuitem **pp; + + for (pp = &(yyvsp[(1) - (2)].menuitem)->next; *pp != NULL; pp = &(*pp)->next) + ; + *pp = (yyvsp[(2) - (2)].menuitem); + (yyval.menuitem) = (yyvsp[(1) - (2)].menuitem); + } + } + break; + + case 130: +#line 1037 "rcparse.y" + { + (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (4)].uni), (yyvsp[(3) - (4)].il), (yyvsp[(4) - (4)].is), 0, 0, NULL); + } + break; + + case 131: +#line 1041 "rcparse.y" + { + (yyval.menuitem) = define_menuitem (NULL, 0, 0, 0, 0, NULL); + } + break; + + case 132: +#line 1045 "rcparse.y" + { + (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (6)].uni), 0, (yyvsp[(3) - (6)].is), 0, 0, (yyvsp[(5) - (6)].menuitem)); + } + break; + + case 133: +#line 1052 "rcparse.y" + { + (yyval.is) = 0; + } + break; + + case 134: +#line 1056 "rcparse.y" + { + (yyval.is) = (yyvsp[(1) - (3)].is) | (yyvsp[(3) - (3)].is); + } + break; + + case 135: +#line 1060 "rcparse.y" + { + (yyval.is) = (yyvsp[(1) - (2)].is) | (yyvsp[(2) - (2)].is); + } + break; + + case 136: +#line 1067 "rcparse.y" + { + (yyval.is) = MENUITEM_CHECKED; + } + break; + + case 137: +#line 1071 "rcparse.y" + { + (yyval.is) = MENUITEM_GRAYED; + } + break; + + case 138: +#line 1075 "rcparse.y" + { + (yyval.is) = MENUITEM_HELP; + } + break; + + case 139: +#line 1079 "rcparse.y" + { + (yyval.is) = MENUITEM_INACTIVE; + } + break; + + case 140: +#line 1083 "rcparse.y" + { + (yyval.is) = MENUITEM_MENUBARBREAK; + } + break; + + case 141: +#line 1087 "rcparse.y" + { + (yyval.is) = MENUITEM_MENUBREAK; + } + break; + + case 142: +#line 1096 "rcparse.y" + { + define_menu ((yyvsp[(1) - (6)].id), &(yyvsp[(3) - (6)].res_info), (yyvsp[(5) - (6)].menuitem)); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 143: +#line 1106 "rcparse.y" + { + (yyval.menuitem) = NULL; + } + break; + + case 144: +#line 1110 "rcparse.y" + { + if ((yyvsp[(1) - (2)].menuitem) == NULL) + (yyval.menuitem) = (yyvsp[(2) - (2)].menuitem); + else + { + rc_menuitem **pp; + + for (pp = &(yyvsp[(1) - (2)].menuitem)->next; *pp != NULL; pp = &(*pp)->next) + ; + *pp = (yyvsp[(2) - (2)].menuitem); + (yyval.menuitem) = (yyvsp[(1) - (2)].menuitem); + } + } + break; + + case 145: +#line 1127 "rcparse.y" + { + (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (2)].uni), 0, 0, 0, 0, NULL); + } + break; + + case 146: +#line 1131 "rcparse.y" + { + (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (3)].uni), (yyvsp[(3) - (3)].il), 0, 0, 0, NULL); + } + break; + + case 147: +#line 1135 "rcparse.y" + { + (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (5)].uni), (yyvsp[(3) - (5)].il), (yyvsp[(4) - (5)].il), (yyvsp[(5) - (5)].il), 0, NULL); + } + break; + + case 148: +#line 1139 "rcparse.y" + { + (yyval.menuitem) = define_menuitem (NULL, 0, 0, 0, 0, NULL); + } + break; + + case 149: +#line 1143 "rcparse.y" + { + (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (5)].uni), 0, 0, 0, 0, (yyvsp[(4) - (5)].menuitem)); + } + break; + + case 150: +#line 1147 "rcparse.y" + { + (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (6)].uni), (yyvsp[(3) - (6)].il), 0, 0, 0, (yyvsp[(5) - (6)].menuitem)); + } + break; + + case 151: +#line 1151 "rcparse.y" + { + (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (7)].uni), (yyvsp[(3) - (7)].il), (yyvsp[(4) - (7)].il), 0, 0, (yyvsp[(6) - (7)].menuitem)); + } + break; + + case 152: +#line 1156 "rcparse.y" + { + (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (9)].uni), (yyvsp[(3) - (9)].il), (yyvsp[(4) - (9)].il), (yyvsp[(5) - (9)].il), (yyvsp[(6) - (9)].il), (yyvsp[(8) - (9)].menuitem)); + } + break; + + case 153: +#line 1165 "rcparse.y" + { + define_messagetable ((yyvsp[(1) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s)); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 154: +#line 1177 "rcparse.y" + { + rcparse_rcdata (); + } + break; + + case 155: +#line 1181 "rcparse.y" + { + rcparse_normal (); + (yyval.rcdata) = (yyvsp[(2) - (2)].rcdata); + } + break; + + case 156: +#line 1189 "rcparse.y" + { + (yyval.rcdata).first = NULL; + (yyval.rcdata).last = NULL; + } + break; + + case 157: +#line 1194 "rcparse.y" + { + (yyval.rcdata) = (yyvsp[(1) - (1)].rcdata); + } + break; + + case 158: +#line 1201 "rcparse.y" + { + rc_rcdata_item *ri; + + ri = define_rcdata_string ((yyvsp[(1) - (1)].ss).s, (yyvsp[(1) - (1)].ss).length); + (yyval.rcdata).first = ri; + (yyval.rcdata).last = ri; + } + break; + + case 159: +#line 1209 "rcparse.y" + { + rc_rcdata_item *ri; + + ri = define_rcdata_unistring ((yyvsp[(1) - (1)].suni).s, (yyvsp[(1) - (1)].suni).length); + (yyval.rcdata).first = ri; + (yyval.rcdata).last = ri; + } + break; + + case 160: +#line 1217 "rcparse.y" + { + rc_rcdata_item *ri; + + ri = define_rcdata_number ((yyvsp[(1) - (1)].i).val, (yyvsp[(1) - (1)].i).dword); + (yyval.rcdata).first = ri; + (yyval.rcdata).last = ri; + } + break; + + case 161: +#line 1225 "rcparse.y" + { + rc_rcdata_item *ri; + + ri = define_rcdata_string ((yyvsp[(3) - (3)].ss).s, (yyvsp[(3) - (3)].ss).length); + (yyval.rcdata).first = (yyvsp[(1) - (3)].rcdata).first; + (yyvsp[(1) - (3)].rcdata).last->next = ri; + (yyval.rcdata).last = ri; + } + break; + + case 162: +#line 1234 "rcparse.y" + { + rc_rcdata_item *ri; + + ri = define_rcdata_unistring ((yyvsp[(3) - (3)].suni).s, (yyvsp[(3) - (3)].suni).length); + (yyval.rcdata).first = (yyvsp[(1) - (3)].rcdata).first; + (yyvsp[(1) - (3)].rcdata).last->next = ri; + (yyval.rcdata).last = ri; + } + break; + + case 163: +#line 1243 "rcparse.y" + { + rc_rcdata_item *ri; + + ri = define_rcdata_number ((yyvsp[(3) - (3)].i).val, (yyvsp[(3) - (3)].i).dword); + (yyval.rcdata).first = (yyvsp[(1) - (3)].rcdata).first; + (yyvsp[(1) - (3)].rcdata).last->next = ri; + (yyval.rcdata).last = ri; + } + break; + + case 164: +#line 1252 "rcparse.y" + { + (yyval.rcdata)=(yyvsp[(1) - (2)].rcdata); + } + break; + + case 165: +#line 1261 "rcparse.y" + { sub_res_info = (yyvsp[(2) - (3)].res_info); } + break; + + case 168: +#line 1268 "rcparse.y" + { + define_stringtable (&sub_res_info, (yyvsp[(2) - (3)].il), (yyvsp[(3) - (3)].uni)); + rcparse_discard_strings (); + } + break; + + case 169: +#line 1273 "rcparse.y" + { + define_stringtable (&sub_res_info, (yyvsp[(2) - (4)].il), (yyvsp[(4) - (4)].uni)); + rcparse_discard_strings (); + } + break; + + case 170: +#line 1278 "rcparse.y" + { + rcparse_warning (_("invalid stringtable resource.")); + abort (); + } + break; + + case 171: +#line 1286 "rcparse.y" + { + (yyval.id)=(yyvsp[(1) - (1)].id); + } + break; + + case 172: +#line 1290 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = 23; + } + break; + + case 173: +#line 1295 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = RT_RCDATA; + } + break; + + case 174: +#line 1300 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = RT_MANIFEST; + } + break; + + case 175: +#line 1305 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = RT_PLUGPLAY; + } + break; + + case 176: +#line 1310 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = RT_VXD; + } + break; + + case 177: +#line 1315 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = RT_DLGINCLUDE; + } + break; + + case 178: +#line 1320 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = RT_DLGINIT; + } + break; + + case 179: +#line 1325 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = RT_ANICURSOR; + } + break; + + case 180: +#line 1330 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = RT_ANIICON; + } + break; + + case 181: +#line 1341 "rcparse.y" + { + define_user_data ((yyvsp[(1) - (6)].id), (yyvsp[(2) - (6)].id), &(yyvsp[(3) - (6)].res_info), (yyvsp[(5) - (6)].rcdata).first); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 182: +#line 1348 "rcparse.y" + { + define_user_file ((yyvsp[(1) - (4)].id), (yyvsp[(2) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s)); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 183: +#line 1358 "rcparse.y" + { + define_toolbar ((yyvsp[(1) - (8)].id), &(yyvsp[(3) - (8)].res_info), (yyvsp[(4) - (8)].il), (yyvsp[(5) - (8)].il), (yyvsp[(7) - (8)].toobar_item)); + } + break; + + case 184: +#line 1363 "rcparse.y" + { (yyval.toobar_item)= NULL; } + break; + + case 185: +#line 1365 "rcparse.y" + { + rc_toolbar_item *c,*n; + c = (yyvsp[(1) - (3)].toobar_item); + n= (rc_toolbar_item *) + res_alloc (sizeof (rc_toolbar_item)); + if (c != NULL) + while (c->next != NULL) + c = c->next; + n->prev = c; + n->next = NULL; + if (c != NULL) + c->next = n; + n->id = (yyvsp[(3) - (3)].id); + if ((yyvsp[(1) - (3)].toobar_item) == NULL) + (yyval.toobar_item) = n; + else + (yyval.toobar_item) = (yyvsp[(1) - (3)].toobar_item); + } + break; + + case 186: +#line 1384 "rcparse.y" + { + rc_toolbar_item *c,*n; + c = (yyvsp[(1) - (2)].toobar_item); + n= (rc_toolbar_item *) + res_alloc (sizeof (rc_toolbar_item)); + if (c != NULL) + while (c->next != NULL) + c = c->next; + n->prev = c; + n->next = NULL; + if (c != NULL) + c->next = n; + n->id.named = 0; + n->id.u.id = 0; + if ((yyvsp[(1) - (2)].toobar_item) == NULL) + (yyval.toobar_item) = n; + else + (yyval.toobar_item) = (yyvsp[(1) - (2)].toobar_item); + } + break; + + case 187: +#line 1409 "rcparse.y" + { + define_versioninfo ((yyvsp[(1) - (6)].id), language, (yyvsp[(3) - (6)].fixver), (yyvsp[(5) - (6)].verinfo)); + if (yychar != YYEMPTY) + YYERROR; + rcparse_discard_strings (); + } + break; + + case 188: +#line 1419 "rcparse.y" + { + (yyval.fixver) = ((rc_fixed_versioninfo *) + res_alloc (sizeof (rc_fixed_versioninfo))); + memset ((yyval.fixver), 0, sizeof (rc_fixed_versioninfo)); + } + break; + + case 189: +#line 1425 "rcparse.y" + { + (yyvsp[(1) - (6)].fixver)->file_version_ms = ((yyvsp[(3) - (6)].il) << 16) | (yyvsp[(4) - (6)].il); + (yyvsp[(1) - (6)].fixver)->file_version_ls = ((yyvsp[(5) - (6)].il) << 16) | (yyvsp[(6) - (6)].il); + (yyval.fixver) = (yyvsp[(1) - (6)].fixver); + } + break; + + case 190: +#line 1431 "rcparse.y" + { + (yyvsp[(1) - (6)].fixver)->product_version_ms = ((yyvsp[(3) - (6)].il) << 16) | (yyvsp[(4) - (6)].il); + (yyvsp[(1) - (6)].fixver)->product_version_ls = ((yyvsp[(5) - (6)].il) << 16) | (yyvsp[(6) - (6)].il); + (yyval.fixver) = (yyvsp[(1) - (6)].fixver); + } + break; + + case 191: +#line 1437 "rcparse.y" + { + (yyvsp[(1) - (3)].fixver)->file_flags_mask = (yyvsp[(3) - (3)].il); + (yyval.fixver) = (yyvsp[(1) - (3)].fixver); + } + break; + + case 192: +#line 1442 "rcparse.y" + { + (yyvsp[(1) - (3)].fixver)->file_flags = (yyvsp[(3) - (3)].il); + (yyval.fixver) = (yyvsp[(1) - (3)].fixver); + } + break; + + case 193: +#line 1447 "rcparse.y" + { + (yyvsp[(1) - (3)].fixver)->file_os = (yyvsp[(3) - (3)].il); + (yyval.fixver) = (yyvsp[(1) - (3)].fixver); + } + break; + + case 194: +#line 1452 "rcparse.y" + { + (yyvsp[(1) - (3)].fixver)->file_type = (yyvsp[(3) - (3)].il); + (yyval.fixver) = (yyvsp[(1) - (3)].fixver); + } + break; + + case 195: +#line 1457 "rcparse.y" + { + (yyvsp[(1) - (3)].fixver)->file_subtype = (yyvsp[(3) - (3)].il); + (yyval.fixver) = (yyvsp[(1) - (3)].fixver); + } + break; + + case 196: +#line 1471 "rcparse.y" + { + (yyval.verinfo) = NULL; + } + break; + + case 197: +#line 1475 "rcparse.y" + { + (yyval.verinfo) = append_ver_stringfileinfo ((yyvsp[(1) - (8)].verinfo), (yyvsp[(4) - (8)].s), (yyvsp[(6) - (8)].verstring)); + } + break; + + case 198: +#line 1479 "rcparse.y" + { + (yyval.verinfo) = append_ver_varfileinfo ((yyvsp[(1) - (7)].verinfo), (yyvsp[(5) - (7)].uni), (yyvsp[(6) - (7)].vervar)); + } + break; + + case 199: +#line 1486 "rcparse.y" + { + (yyval.verstring) = NULL; + } + break; + + case 200: +#line 1490 "rcparse.y" + { + (yyval.verstring) = append_verval ((yyvsp[(1) - (5)].verstring), (yyvsp[(3) - (5)].uni), (yyvsp[(5) - (5)].uni)); + } + break; + + case 201: +#line 1497 "rcparse.y" + { + (yyval.vervar) = NULL; + } + break; + + case 202: +#line 1501 "rcparse.y" + { + (yyval.vervar) = append_vertrans ((yyvsp[(1) - (3)].vervar), (yyvsp[(2) - (3)].il), (yyvsp[(3) - (3)].il)); + } + break; + + case 203: +#line 1510 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = (yyvsp[(1) - (1)].il); + } + break; + + case 204: +#line 1515 "rcparse.y" + { + res_unistring_to_id (&(yyval.id), (yyvsp[(1) - (1)].uni)); + } + break; + + case 205: +#line 1524 "rcparse.y" + { + (yyval.uni) = (yyvsp[(1) - (1)].uni); + } + break; + + case 206: +#line 1528 "rcparse.y" + { + unichar *h = NULL; + unicode_from_ascii ((rc_uint_type *) NULL, &h, (yyvsp[(1) - (1)].s)); + (yyval.uni) = h; + } + break; + + case 207: +#line 1538 "rcparse.y" + { + (yyval.id).named = 0; + (yyval.id).u.id = (yyvsp[(1) - (2)].il); + } + break; + + case 208: +#line 1543 "rcparse.y" + { + res_unistring_to_id (&(yyval.id), (yyvsp[(1) - (1)].uni)); + } + break; + + case 209: +#line 1547 "rcparse.y" + { + res_unistring_to_id (&(yyval.id), (yyvsp[(1) - (2)].uni)); + } + break; + + case 210: +#line 1557 "rcparse.y" + { + memset (&(yyval.res_info), 0, sizeof (rc_res_res_info)); + (yyval.res_info).language = language; + /* FIXME: Is this the right default? */ + (yyval.res_info).memflags = MEMFLAG_MOVEABLE | MEMFLAG_PURE | MEMFLAG_DISCARDABLE; + } + break; + + case 211: +#line 1564 "rcparse.y" + { + (yyval.res_info) = (yyvsp[(1) - (2)].res_info); + (yyval.res_info).memflags |= (yyvsp[(2) - (2)].memflags).on; + (yyval.res_info).memflags &=~ (yyvsp[(2) - (2)].memflags).off; + } + break; + + case 212: +#line 1570 "rcparse.y" + { + (yyval.res_info) = (yyvsp[(1) - (3)].res_info); + (yyval.res_info).characteristics = (yyvsp[(3) - (3)].il); + } + break; + + case 213: +#line 1575 "rcparse.y" + { + (yyval.res_info) = (yyvsp[(1) - (4)].res_info); + (yyval.res_info).language = (yyvsp[(3) - (4)].il) | ((yyvsp[(4) - (4)].il) << SUBLANG_SHIFT); + } + break; + + case 214: +#line 1580 "rcparse.y" + { + (yyval.res_info) = (yyvsp[(1) - (3)].res_info); + (yyval.res_info).version = (yyvsp[(3) - (3)].il); + } + break; + + case 215: +#line 1590 "rcparse.y" + { + memset (&(yyval.res_info), 0, sizeof (rc_res_res_info)); + (yyval.res_info).language = language; + (yyval.res_info).memflags = MEMFLAG_MOVEABLE | MEMFLAG_DISCARDABLE; + } + break; + + case 216: +#line 1596 "rcparse.y" + { + (yyval.res_info) = (yyvsp[(1) - (2)].res_info); + (yyval.res_info).memflags |= (yyvsp[(2) - (2)].memflags).on; + (yyval.res_info).memflags &=~ (yyvsp[(2) - (2)].memflags).off; + } + break; + + case 217: +#line 1607 "rcparse.y" + { + memset (&(yyval.res_info), 0, sizeof (rc_res_res_info)); + (yyval.res_info).language = language; + (yyval.res_info).memflags = MEMFLAG_MOVEABLE | MEMFLAG_PURE | MEMFLAG_DISCARDABLE; + } + break; + + case 218: +#line 1613 "rcparse.y" + { + (yyval.res_info) = (yyvsp[(1) - (2)].res_info); + (yyval.res_info).memflags |= (yyvsp[(2) - (2)].memflags).on; + (yyval.res_info).memflags &=~ (yyvsp[(2) - (2)].memflags).off; + } + break; + + case 219: +#line 1625 "rcparse.y" + { + (yyval.memflags).on = MEMFLAG_MOVEABLE; + (yyval.memflags).off = 0; + } + break; + + case 220: +#line 1630 "rcparse.y" + { + (yyval.memflags).on = 0; + (yyval.memflags).off = MEMFLAG_MOVEABLE; + } + break; + + case 221: +#line 1635 "rcparse.y" + { + (yyval.memflags).on = MEMFLAG_PURE; + (yyval.memflags).off = 0; + } + break; + + case 222: +#line 1640 "rcparse.y" + { + (yyval.memflags).on = 0; + (yyval.memflags).off = MEMFLAG_PURE; + } + break; + + case 223: +#line 1645 "rcparse.y" + { + (yyval.memflags).on = MEMFLAG_PRELOAD; + (yyval.memflags).off = 0; + } + break; + + case 224: +#line 1650 "rcparse.y" + { + (yyval.memflags).on = 0; + (yyval.memflags).off = MEMFLAG_PRELOAD; + } + break; + + case 225: +#line 1655 "rcparse.y" + { + (yyval.memflags).on = MEMFLAG_DISCARDABLE; + (yyval.memflags).off = 0; + } + break; + + case 226: +#line 1665 "rcparse.y" + { + (yyval.s) = (yyvsp[(1) - (1)].s); + } + break; + + case 227: +#line 1669 "rcparse.y" + { + (yyval.s) = (yyvsp[(1) - (1)].s); + } + break; + + case 228: +#line 1677 "rcparse.y" + { + (yyval.uni) = (yyvsp[(1) - (1)].uni); + } + break; + + case 229: +#line 1682 "rcparse.y" + { + rc_uint_type l1 = unichar_len ((yyvsp[(1) - (2)].uni)); + rc_uint_type l2 = unichar_len ((yyvsp[(2) - (2)].uni)); + unichar *h = (unichar *) res_alloc ((l1 + l2 + 1) * sizeof (unichar)); + if (l1 != 0) + memcpy (h, (yyvsp[(1) - (2)].uni), l1 * sizeof (unichar)); + if (l2 != 0) + memcpy (h + l1, (yyvsp[(2) - (2)].uni), l2 * sizeof (unichar)); + h[l1 + l2] = 0; + (yyval.uni) = h; + } + break; + + case 230: +#line 1697 "rcparse.y" + { + (yyval.uni) = unichar_dup ((yyvsp[(1) - (1)].uni)); + } + break; + + case 231: +#line 1701 "rcparse.y" + { + unichar *h = NULL; + unicode_from_ascii ((rc_uint_type *) NULL, &h, (yyvsp[(1) - (1)].s)); + (yyval.uni) = h; + } + break; + + case 232: +#line 1710 "rcparse.y" + { + (yyval.ss) = (yyvsp[(1) - (1)].ss); + } + break; + + case 233: +#line 1714 "rcparse.y" + { + rc_uint_type l = (yyvsp[(1) - (2)].ss).length + (yyvsp[(2) - (2)].ss).length; + char *h = (char *) res_alloc (l); + memcpy (h, (yyvsp[(1) - (2)].ss).s, (yyvsp[(1) - (2)].ss).length); + memcpy (h + (yyvsp[(1) - (2)].ss).length, (yyvsp[(2) - (2)].ss).s, (yyvsp[(2) - (2)].ss).length); + (yyval.ss).s = h; + (yyval.ss).length = l; + } + break; + + case 234: +#line 1726 "rcparse.y" + { + (yyval.suni) = (yyvsp[(1) - (1)].suni); + } + break; + + case 235: +#line 1730 "rcparse.y" + { + rc_uint_type l = (yyvsp[(1) - (2)].suni).length + (yyvsp[(2) - (2)].suni).length; + unichar *h = (unichar *) res_alloc (l * sizeof (unichar)); + memcpy (h, (yyvsp[(1) - (2)].suni).s, (yyvsp[(1) - (2)].suni).length * sizeof (unichar)); + memcpy (h + (yyvsp[(1) - (2)].suni).length, (yyvsp[(2) - (2)].suni).s, (yyvsp[(2) - (2)].suni).length * sizeof (unichar)); + (yyval.suni).s = h; + (yyval.suni).length = l; + } + break; + + case 236: +#line 1752 "rcparse.y" + { + style |= (yyvsp[(1) - (1)].il); + } + break; + + case 237: +#line 1756 "rcparse.y" + { + style &=~ (yyvsp[(2) - (2)].il); + } + break; + + case 238: +#line 1760 "rcparse.y" + { + style |= (yyvsp[(3) - (3)].il); + } + break; + + case 239: +#line 1764 "rcparse.y" + { + style &=~ (yyvsp[(4) - (4)].il); + } + break; + + case 240: +#line 1771 "rcparse.y" + { + (yyval.il) = (yyvsp[(1) - (1)].i).val; + } + break; + + case 241: +#line 1775 "rcparse.y" + { + (yyval.il) = (yyvsp[(2) - (3)].il); + } + break; + + case 242: +#line 1784 "rcparse.y" + { + (yyval.il) = 0; + } + break; + + case 243: +#line 1788 "rcparse.y" + { + (yyval.il) = (yyvsp[(1) - (1)].il); + } + break; + + case 244: +#line 1797 "rcparse.y" + { + (yyval.il) = (yyvsp[(2) - (2)].il); + } + break; + + case 245: +#line 1806 "rcparse.y" + { + (yyval.il) = (yyvsp[(1) - (1)].i).val; + } + break; + + case 246: +#line 1815 "rcparse.y" + { + (yyval.i) = (yyvsp[(1) - (1)].i); + } + break; + + case 247: +#line 1819 "rcparse.y" + { + (yyval.i) = (yyvsp[(2) - (3)].i); + } + break; + + case 248: +#line 1823 "rcparse.y" + { + (yyval.i).val = ~ (yyvsp[(2) - (2)].i).val; + (yyval.i).dword = (yyvsp[(2) - (2)].i).dword; + } + break; + + case 249: +#line 1828 "rcparse.y" + { + (yyval.i).val = - (yyvsp[(2) - (2)].i).val; + (yyval.i).dword = (yyvsp[(2) - (2)].i).dword; + } + break; + + case 250: +#line 1833 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val * (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 251: +#line 1838 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val / (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 252: +#line 1843 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val % (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 253: +#line 1848 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val + (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 254: +#line 1853 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val - (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 255: +#line 1858 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val & (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 256: +#line 1863 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val ^ (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 257: +#line 1868 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val | (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 258: +#line 1879 "rcparse.y" + { + (yyval.il) = (yyvsp[(2) - (2)].il); + } + break; + + case 259: +#line 1888 "rcparse.y" + { + (yyval.il) = (yyvsp[(1) - (1)].i).val; + } + break; + + case 260: +#line 1899 "rcparse.y" + { + (yyval.i) = (yyvsp[(1) - (1)].i); + } + break; + + case 261: +#line 1903 "rcparse.y" + { + (yyval.i) = (yyvsp[(2) - (3)].i); + } + break; + + case 262: +#line 1907 "rcparse.y" + { + (yyval.i).val = ~ (yyvsp[(2) - (2)].i).val; + (yyval.i).dword = (yyvsp[(2) - (2)].i).dword; + } + break; + + case 263: +#line 1912 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val * (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 264: +#line 1917 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val / (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 265: +#line 1922 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val % (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 266: +#line 1927 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val + (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 267: +#line 1932 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val - (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 268: +#line 1937 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val & (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 269: +#line 1942 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val ^ (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + case 270: +#line 1947 "rcparse.y" + { + (yyval.i).val = (yyvsp[(1) - (3)].i).val | (yyvsp[(3) - (3)].i).val; + (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword; + } + break; + + +/* Line 1267 of yacc.c. */ +#line 4374 "rcparse.c" + default: break; + } + YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); + + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + + *++yyvsp = yyval; + + + /* Now `shift' the result of the reduction. Determine what state + that goes to, based on the state we popped back to and the rule + number reduced by. */ + + yyn = yyr1[yyn]; + + yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; + if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yytable[yystate]; + else + yystate = yydefgoto[yyn - YYNTOKENS]; + + goto yynewstate; + + +/*------------------------------------. +| yyerrlab -- here on detecting error | +`------------------------------------*/ +yyerrlab: + /* If not already recovering from an error, report this error. */ + if (!yyerrstatus) + { + ++yynerrs; +#if ! YYERROR_VERBOSE + yyerror (YY_("syntax error")); +#else + { + YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); + if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) + { + YYSIZE_T yyalloc = 2 * yysize; + if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) + yyalloc = YYSTACK_ALLOC_MAXIMUM; + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); + yymsg = (char *) YYSTACK_ALLOC (yyalloc); + if (yymsg) + yymsg_alloc = yyalloc; + else + { + yymsg = yymsgbuf; + yymsg_alloc = sizeof yymsgbuf; + } + } + + if (0 < yysize && yysize <= yymsg_alloc) + { + (void) yysyntax_error (yymsg, yystate, yychar); + yyerror (yymsg); + } + else + { + yyerror (YY_("syntax error")); + if (yysize != 0) + goto yyexhaustedlab; + } + } +#endif + } + + + + if (yyerrstatus == 3) + { + /* If just tried and failed to reuse look-ahead token after an + error, discard it. */ + + if (yychar <= YYEOF) + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } + else + { + yydestruct ("Error: discarding", + yytoken, &yylval); + yychar = YYEMPTY; + } + } + + /* Else will try to reuse look-ahead token after shifting the error + token. */ + goto yyerrlab1; + + +/*---------------------------------------------------. +| yyerrorlab -- error raised explicitly by YYERROR. | +`---------------------------------------------------*/ +yyerrorlab: + + /* Pacify compilers like GCC when the user code never invokes + YYERROR and the label yyerrorlab therefore never appears in user + code. */ + if (/*CONSTCOND*/ 0) + goto yyerrorlab; + + /* Do not reclaim the symbols of the rule which action triggered + this YYERROR. */ + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + yystate = *yyssp; + goto yyerrlab1; + + +/*-------------------------------------------------------------. +| yyerrlab1 -- common code for both syntax error and YYERROR. | +`-------------------------------------------------------------*/ +yyerrlab1: + yyerrstatus = 3; /* Each real token shifted decrements this. */ + + for (;;) + { + yyn = yypact[yystate]; + if (yyn != YYPACT_NINF) + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } + + /* Pop the current state because it cannot handle the error token. */ + if (yyssp == yyss) + YYABORT; + + + yydestruct ("Error: popping", + yystos[yystate], yyvsp); + YYPOPSTACK (1); + yystate = *yyssp; + YY_STACK_PRINT (yyss, yyssp); + } + + if (yyn == YYFINAL) + YYACCEPT; + + *++yyvsp = yylval; + + + /* Shift the error token. */ + YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); + + yystate = yyn; + goto yynewstate; + + +/*-------------------------------------. +| yyacceptlab -- YYACCEPT comes here. | +`-------------------------------------*/ +yyacceptlab: + yyresult = 0; + goto yyreturn; + +/*-----------------------------------. +| yyabortlab -- YYABORT comes here. | +`-----------------------------------*/ +yyabortlab: + yyresult = 1; + goto yyreturn; + +#ifndef yyoverflow +/*-------------------------------------------------. +| yyexhaustedlab -- memory exhaustion comes here. | +`-------------------------------------------------*/ +yyexhaustedlab: + yyerror (YY_("memory exhausted")); + yyresult = 2; + /* Fall through. */ +#endif + +yyreturn: + if (yychar != YYEOF && yychar != YYEMPTY) + yydestruct ("Cleanup: discarding lookahead", + yytoken, &yylval); + /* Do not reclaim the symbols of the rule which action triggered + this YYABORT or YYACCEPT. */ + YYPOPSTACK (yylen); + YY_STACK_PRINT (yyss, yyssp); + while (yyssp != yyss) + { + yydestruct ("Cleanup: popping", + yystos[*yyssp], yyvsp); + YYPOPSTACK (1); + } +#ifndef yyoverflow + if (yyss != yyssa) + YYSTACK_FREE (yyss); +#endif +#if YYERROR_VERBOSE + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); +#endif + /* Make sure YYID is used. */ + return YYID (yyresult); +} + + +#line 1953 "rcparse.y" + + +/* Set the language from the command line. */ + +void +rcparse_set_language (int lang) +{ + language = lang; +} + diff --git a/binutils/rcparse.h b/binutils/rcparse.h new file mode 100644 index 0000000..e86edd9 --- /dev/null +++ b/binutils/rcparse.h @@ -0,0 +1,297 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton interface for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + BEG = 258, + END = 259, + ACCELERATORS = 260, + VIRTKEY = 261, + ASCII = 262, + NOINVERT = 263, + SHIFT = 264, + CONTROL = 265, + ALT = 266, + BITMAP = 267, + CURSOR = 268, + DIALOG = 269, + DIALOGEX = 270, + EXSTYLE = 271, + CAPTION = 272, + CLASS = 273, + STYLE = 274, + AUTO3STATE = 275, + AUTOCHECKBOX = 276, + AUTORADIOBUTTON = 277, + CHECKBOX = 278, + COMBOBOX = 279, + CTEXT = 280, + DEFPUSHBUTTON = 281, + EDITTEXT = 282, + GROUPBOX = 283, + LISTBOX = 284, + LTEXT = 285, + PUSHBOX = 286, + PUSHBUTTON = 287, + RADIOBUTTON = 288, + RTEXT = 289, + SCROLLBAR = 290, + STATE3 = 291, + USERBUTTON = 292, + BEDIT = 293, + HEDIT = 294, + IEDIT = 295, + FONT = 296, + ICON = 297, + ANICURSOR = 298, + ANIICON = 299, + DLGINCLUDE = 300, + DLGINIT = 301, + FONTDIR = 302, + HTML = 303, + MANIFEST = 304, + PLUGPLAY = 305, + VXD = 306, + TOOLBAR = 307, + BUTTON = 308, + LANGUAGE = 309, + CHARACTERISTICS = 310, + VERSIONK = 311, + MENU = 312, + MENUEX = 313, + MENUITEM = 314, + SEPARATOR = 315, + POPUP = 316, + CHECKED = 317, + GRAYED = 318, + HELP = 319, + INACTIVE = 320, + MENUBARBREAK = 321, + MENUBREAK = 322, + MESSAGETABLE = 323, + RCDATA = 324, + STRINGTABLE = 325, + VERSIONINFO = 326, + FILEVERSION = 327, + PRODUCTVERSION = 328, + FILEFLAGSMASK = 329, + FILEFLAGS = 330, + FILEOS = 331, + FILETYPE = 332, + FILESUBTYPE = 333, + BLOCKSTRINGFILEINFO = 334, + BLOCKVARFILEINFO = 335, + VALUE = 336, + BLOCK = 337, + MOVEABLE = 338, + FIXED = 339, + PURE = 340, + IMPURE = 341, + PRELOAD = 342, + LOADONCALL = 343, + DISCARDABLE = 344, + NOT = 345, + QUOTEDUNISTRING = 346, + QUOTEDSTRING = 347, + STRING = 348, + NUMBER = 349, + SIZEDUNISTRING = 350, + SIZEDSTRING = 351, + IGNORED_TOKEN = 352, + NEG = 353 + }; +#endif +/* Tokens. */ +#define BEG 258 +#define END 259 +#define ACCELERATORS 260 +#define VIRTKEY 261 +#define ASCII 262 +#define NOINVERT 263 +#define SHIFT 264 +#define CONTROL 265 +#define ALT 266 +#define BITMAP 267 +#define CURSOR 268 +#define DIALOG 269 +#define DIALOGEX 270 +#define EXSTYLE 271 +#define CAPTION 272 +#define CLASS 273 +#define STYLE 274 +#define AUTO3STATE 275 +#define AUTOCHECKBOX 276 +#define AUTORADIOBUTTON 277 +#define CHECKBOX 278 +#define COMBOBOX 279 +#define CTEXT 280 +#define DEFPUSHBUTTON 281 +#define EDITTEXT 282 +#define GROUPBOX 283 +#define LISTBOX 284 +#define LTEXT 285 +#define PUSHBOX 286 +#define PUSHBUTTON 287 +#define RADIOBUTTON 288 +#define RTEXT 289 +#define SCROLLBAR 290 +#define STATE3 291 +#define USERBUTTON 292 +#define BEDIT 293 +#define HEDIT 294 +#define IEDIT 295 +#define FONT 296 +#define ICON 297 +#define ANICURSOR 298 +#define ANIICON 299 +#define DLGINCLUDE 300 +#define DLGINIT 301 +#define FONTDIR 302 +#define HTML 303 +#define MANIFEST 304 +#define PLUGPLAY 305 +#define VXD 306 +#define TOOLBAR 307 +#define BUTTON 308 +#define LANGUAGE 309 +#define CHARACTERISTICS 310 +#define VERSIONK 311 +#define MENU 312 +#define MENUEX 313 +#define MENUITEM 314 +#define SEPARATOR 315 +#define POPUP 316 +#define CHECKED 317 +#define GRAYED 318 +#define HELP 319 +#define INACTIVE 320 +#define MENUBARBREAK 321 +#define MENUBREAK 322 +#define MESSAGETABLE 323 +#define RCDATA 324 +#define STRINGTABLE 325 +#define VERSIONINFO 326 +#define FILEVERSION 327 +#define PRODUCTVERSION 328 +#define FILEFLAGSMASK 329 +#define FILEFLAGS 330 +#define FILEOS 331 +#define FILETYPE 332 +#define FILESUBTYPE 333 +#define BLOCKSTRINGFILEINFO 334 +#define BLOCKVARFILEINFO 335 +#define VALUE 336 +#define BLOCK 337 +#define MOVEABLE 338 +#define FIXED 339 +#define PURE 340 +#define IMPURE 341 +#define PRELOAD 342 +#define LOADONCALL 343 +#define DISCARDABLE 344 +#define NOT 345 +#define QUOTEDUNISTRING 346 +#define QUOTEDSTRING 347 +#define STRING 348 +#define NUMBER 349 +#define SIZEDUNISTRING 350 +#define SIZEDSTRING 351 +#define IGNORED_TOKEN 352 +#define NEG 353 + + + + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 69 "rcparse.y" +{ + rc_accelerator acc; + rc_accelerator *pacc; + rc_dialog_control *dialog_control; + rc_menuitem *menuitem; + struct + { + rc_rcdata_item *first; + rc_rcdata_item *last; + } rcdata; + rc_rcdata_item *rcdata_item; + rc_fixed_versioninfo *fixver; + rc_ver_info *verinfo; + rc_ver_stringinfo *verstring; + rc_ver_varinfo *vervar; + rc_toolbar_item *toobar_item; + rc_res_id id; + rc_res_res_info res_info; + struct + { + rc_uint_type on; + rc_uint_type off; + } memflags; + struct + { + rc_uint_type val; + /* Nonzero if this number was explicitly specified as long. */ + int dword; + } i; + rc_uint_type il; + rc_uint_type is; + const char *s; + struct + { + rc_uint_type length; + const char *s; + } ss; + unichar *uni; + struct + { + rc_uint_type length; + const unichar *s; + } suni; +} +/* Line 1529 of yacc.c. */ +#line 290 "rcparse.h" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + +extern YYSTYPE yylval; + diff --git a/binutils/readelf.c b/binutils/readelf.c index 7ac9914..9e13190 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -140,6 +140,8 @@ #include "elf/sparc.h" #include "elf/spu.h" #include "elf/tic6x.h" +#include "elf/tilegx.h" +#include "elf/tilepro.h" #include "elf/v850.h" #include "elf/vax.h" #include "elf/x86-64.h" @@ -286,6 +288,12 @@ print_mode; } \ while (0) +/* Retrieve NMEMB structures, each SIZE bytes long from FILE starting at OFFSET. + Put the retrieved data into VAR, if it is not NULL. Otherwise allocate a buffer + using malloc and fill that. In either case return the pointer to the start of + the retrieved data or NULL if something went wrong. If something does go wrong + emit an error message using REASON as part of the context. */ + static void * get_data (void * var, FILE * file, long offset, size_t size, size_t nmemb, const char * reason) @@ -592,11 +600,14 @@ guess_is_rela (unsigned int e_machine) case EM_SPARCV9: case EM_SPU: case EM_TI_C6000: + case EM_TILEGX: + case EM_TILEPRO: case EM_V850: case EM_CYGNUS_V850: case EM_VAX: case EM_X86_64: case EM_L1OM: + case EM_K1OM: case EM_XSTORMY16: case EM_XTENSA: case EM_XTENSA_OLD: @@ -1128,6 +1139,7 @@ dump_relocations (FILE * file, case EM_X86_64: case EM_L1OM: + case EM_K1OM: rtype = elf_x86_64_reloc_type (type); break; @@ -1213,6 +1225,14 @@ dump_relocations (FILE * file, case EM_TI_C6000: rtype = elf_tic6x_reloc_type (type); break; + + case EM_TILEGX: + rtype = elf_tilegx_reloc_type (type); + break; + + case EM_TILEPRO: + rtype = elf_tilepro_reloc_type (type); + break; } if (rtype == NULL) @@ -1313,7 +1333,8 @@ dump_relocations (FILE * file, && psym->st_shndx == SHN_MIPS_SUNDEFINED) sec_name = "SUNDEF"; else if ((elf_header.e_machine == EM_X86_64 - || elf_header.e_machine == EM_L1OM) + || elf_header.e_machine == EM_L1OM + || elf_header.e_machine == EM_K1OM) && psym->st_shndx == SHN_X86_64_LCOMMON) sec_name = "LARGE_COMMON"; else if (elf_header.e_machine == EM_IA_64 @@ -1881,6 +1902,7 @@ get_machine_name (unsigned e_machine) case EM_PRISM: return "Vitesse Prism"; case EM_X86_64: return "Advanced Micro Devices X86-64"; case EM_L1OM: return "Intel L1OM"; + case EM_K1OM: return "Intel K1OM"; case EM_S390_OLD: case EM_S390: return "IBM S/390"; case EM_SCORE: return "SUNPLUS S+Core"; @@ -1959,6 +1981,7 @@ get_machine_name (unsigned e_machine) case EM_STM8: return "STMicroeletronics STM8 8-bit microcontroller"; case EM_TILE64: return "Tilera TILE64 multicore architecture family"; case EM_TILEPRO: return "Tilera TILEPro multicore architecture family"; + case EM_TILEGX: return "Tilera TILE-Gx multicore architecture family"; case EM_CUDA: return "NVIDIA CUDA architecture"; default: snprintf (buff, sizeof (buff), _(": 0x%x"), e_machine); @@ -2405,6 +2428,9 @@ get_machine_flags (unsigned e_flags, unsigned e_machine) if (e_flags & EF_MIPS_ARCH_ASE_M16) strcat (buf, ", mips16"); + if (e_flags & EF_MIPS_ARCH_ASE_MICROMIPS) + strcat (buf, ", micromips"); + switch ((e_flags & EF_MIPS_ARCH)) { case E_MIPS_ARCH_1: strcat (buf, ", mips1"); break; @@ -2593,8 +2619,7 @@ get_osabi_name (unsigned int osabi) case ELFOSABI_NONE: return "UNIX - System V"; case ELFOSABI_HPUX: return "UNIX - HP-UX"; case ELFOSABI_NETBSD: return "UNIX - NetBSD"; - case ELFOSABI_LINUX: return "UNIX - Linux"; - case ELFOSABI_HURD: return "GNU/Hurd"; + case ELFOSABI_GNU: return "UNIX - GNU"; case ELFOSABI_SOLARIS: return "UNIX - Solaris"; case ELFOSABI_AIX: return "UNIX - AIX"; case ELFOSABI_IRIX: return "UNIX - IRIX"; @@ -3025,6 +3050,7 @@ get_section_type_name (unsigned int sh_type) break; case EM_X86_64: case EM_L1OM: + case EM_K1OM: result = get_x86_64_section_type_name (sh_type); break; case EM_ARM: @@ -3065,7 +3091,9 @@ get_section_type_name (unsigned int sh_type) else if ((sh_type >= SHT_LOUSER) && (sh_type <= SHT_HIUSER)) sprintf (buff, "LOUSER+%x", sh_type - SHT_LOUSER); else - snprintf (buff, sizeof (buff), _(": %x"), sh_type); + /* This message is probably going to be displayed in a 15 + character wide field, so put the hex value first. */ + snprintf (buff, sizeof (buff), _("%08x: "), sh_type); return buff; } @@ -3073,6 +3101,8 @@ get_section_type_name (unsigned int sh_type) #define OPTION_DEBUG_DUMP 512 #define OPTION_DYN_SYMS 513 +#define OPTION_DWARF_DEPTH 514 +#define OPTION_DWARF_START 515 static struct option options[] = { @@ -3106,6 +3136,9 @@ static struct option options[] = #endif {"debug-dump", optional_argument, 0, OPTION_DEBUG_DUMP}, + {"dwarf-depth", required_argument, 0, OPTION_DWARF_DEPTH}, + {"dwarf-start", required_argument, 0, OPTION_DWARF_START}, + {"version", no_argument, 0, 'v'}, {"wide", no_argument, 0, 'W'}, {"help", no_argument, 0, 'H'}, @@ -3149,6 +3182,10 @@ usage (FILE * stream) =frames-interp,=str,=loc,=Ranges,=pubtypes,\n\ =gdb_index,=trace_info,=trace_abbrev,=trace_aranges]\n\ Display the contents of DWARF2 debug sections\n")); + fprintf (stream, _("\ + --dwarf-depth=N Do not display DIEs at depth N or greater\n\ + --dwarf-start=N Display DIEs starting with N, at the same depth\n\ + or deeper\n")); #ifdef SUPPORT_DISASSEMBLY fprintf (stream, _("\ -i --instruction-dump=\n\ @@ -3355,6 +3392,20 @@ parse_args (int argc, char ** argv) dwarf_select_sections_by_names (optarg); } break; + case OPTION_DWARF_DEPTH: + { + char *cp; + + dwarf_cutoff_level = strtoul (optarg, & cp, 0); + } + break; + case OPTION_DWARF_START: + { + char *cp; + + dwarf_start_die = strtoul (optarg, & cp, 0); + } + break; case OPTION_DYN_SYMS: do_dyn_syms++; break; @@ -4251,6 +4302,7 @@ get_elf_section_flags (bfd_vma sh_flags) case EM_486: case EM_X86_64: case EM_L1OM: + case EM_K1OM: case EM_OLD_SPARCV9: case EM_SPARC32PLUS: case EM_SPARCV9: @@ -4302,7 +4354,8 @@ get_elf_section_flags (bfd_vma sh_flags) default: if ((elf_header.e_machine == EM_X86_64 - || elf_header.e_machine == EM_L1OM) + || elf_header.e_machine == EM_L1OM + || elf_header.e_machine == EM_K1OM) && flag == SHF_X86_64_LARGE) *p = 'l'; else if (flag & SHF_MASKOS) @@ -4525,7 +4578,7 @@ process_section_headers (FILE * file) dynamic_strings = (char *) get_data (NULL, file, section->sh_offset, 1, section->sh_size, _("dynamic strings")); - dynamic_strings_length = section->sh_size; + dynamic_strings_length = dynamic_strings == NULL ? 0 : section->sh_size; } else if (section->sh_type == SHT_SYMTAB_SHNDX) { @@ -4567,6 +4620,7 @@ process_section_headers (FILE * file) || (do_debug_ranges && streq (name, "ranges")) || (do_debug_frames && streq (name, "frame")) || (do_debug_macinfo && streq (name, "macinfo")) + || (do_debug_macinfo && streq (name, "macro")) || (do_debug_str && streq (name, "str")) || (do_debug_loc && streq (name, "loc")) ) @@ -4692,6 +4746,7 @@ process_section_headers (FILE * file) case EM_486: case EM_X86_64: case EM_L1OM: + case EM_K1OM: case EM_OLD_SPARCV9: case EM_SPARC32PLUS: case EM_SPARCV9: @@ -4820,7 +4875,8 @@ process_section_headers (FILE * file) if (!do_section_details) { if (elf_header.e_machine == EM_X86_64 - || elf_header.e_machine == EM_L1OM) + || elf_header.e_machine == EM_L1OM + || elf_header.e_machine == EM_K1OM) printf (_("Key to Flags:\n\ W (write), A (alloc), X (execute), M (merge), S (strings), l (large)\n\ I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)\n\ @@ -5006,6 +5062,8 @@ process_section_groups (FILE * file) start = (unsigned char *) get_data (NULL, file, section->sh_offset, 1, section->sh_size, _("section data")); + if (start == NULL) + continue; indices = start; size = (section->sh_size / section->sh_entsize) - 1; @@ -5711,6 +5769,7 @@ ia64_process_unwind (FILE * file) aux.symtab = GET_ELF_SYMBOLS (file, sec); strsec = section_headers + sec->sh_link; + assert (aux.strtab == NULL); aux.strtab = (char *) get_data (NULL, file, strsec->sh_offset, 1, strsec->sh_size, _("string table")); @@ -5793,11 +5852,11 @@ ia64_process_unwind (FILE * file) } else { - aux.info_size = sec->sh_size; aux.info_addr = sec->sh_addr; aux.info = (unsigned char *) get_data (NULL, file, sec->sh_offset, 1, - aux.info_size, + sec->sh_size, _("unwind info")); + aux.info_size = aux.info == NULL ? 0 : sec->sh_size; printf (_("\nUnwind section ")); @@ -6124,6 +6183,7 @@ hppa_process_unwind (FILE * file) aux.symtab = GET_ELF_SYMBOLS (file, sec); strsec = section_headers + sec->sh_link; + assert (aux.strtab == NULL); aux.strtab = (char *) get_data (NULL, file, strsec->sh_offset, 1, strsec->sh_size, _("string table")); @@ -6250,7 +6310,6 @@ arm_section_get_word (struct arm_unw_aux_info *aux, arm_sec->sec = sec; arm_sec->data = get_data (NULL, aux->file, sec->sh_offset, 1, sec->sh_size, _("unwind data")); - arm_sec->rela = NULL; arm_sec->nrelas = 0; @@ -7009,6 +7068,7 @@ arm_process_unwind (FILE *file) aux.symtab = GET_ELF_SYMBOLS (file, sec); strsec = section_headers + sec->sh_link; + assert (aux.strtab == NULL); aux.strtab = get_data (NULL, file, strsec->sh_offset, 1, strsec->sh_size, _("string table")); aux.strtab_size = aux.strtab != NULL ? strsec->sh_size : 0; @@ -7518,7 +7578,7 @@ process_dynamic_section (FILE * file) dynamic_strings = (char *) get_data (NULL, file, offset, 1, str_tab_len, _("dynamic string table")); - dynamic_strings_length = str_tab_len; + dynamic_strings_length = dynamic_strings == NULL ? 0 : str_tab_len; break; } } @@ -8056,9 +8116,9 @@ process_version_sections (FILE * file) edefs = (Elf_External_Verdef *) get_data (NULL, file, section->sh_offset, 1,section->sh_size, _("version definition section")); - endbuf = (char *) edefs + section->sh_size; if (!edefs) break; + endbuf = (char *) edefs + section->sh_size; for (idx = cnt = 0; cnt < section->sh_info; ++cnt) { @@ -8175,9 +8235,9 @@ process_version_sections (FILE * file) section->sh_offset, 1, section->sh_size, _("version need section")); - endbuf = (char *) eneed + section->sh_size; if (!eneed) break; + endbuf = (char *) eneed + section->sh_size; for (idx = cnt = 0; cnt < section->sh_info; ++cnt) { @@ -8393,9 +8453,10 @@ process_version_sections (FILE * file) Elf_External_Vernaux evna; unsigned long a_off; - get_data (&evn, file, offset, sizeof (evn), 1, - _("version need")); - + if (get_data (&evn, file, offset, sizeof (evn), 1, + _("version need")) == NULL) + break; + ivn.vn_aux = BYTE_GET (evn.vn_aux); ivn.vn_next = BYTE_GET (evn.vn_next); @@ -8403,11 +8464,17 @@ process_version_sections (FILE * file) do { - get_data (&evna, file, a_off, sizeof (evna), - 1, _("version need aux (2)")); - - ivna.vna_next = BYTE_GET (evna.vna_next); - ivna.vna_other = BYTE_GET (evna.vna_other); + if (get_data (&evna, file, a_off, sizeof (evna), + 1, _("version need aux (2)")) == NULL) + { + ivna.vna_next = 0; + ivna.vna_other = 0; + } + else + { + ivna.vna_next = BYTE_GET (evna.vna_next); + ivna.vna_other = BYTE_GET (evna.vna_other); + } a_off += ivna.vna_next; } @@ -8448,11 +8515,17 @@ process_version_sections (FILE * file) do { - get_data (&evd, file, offset, sizeof (evd), 1, - _("version def")); - - ivd.vd_next = BYTE_GET (evd.vd_next); - ivd.vd_ndx = BYTE_GET (evd.vd_ndx); + if (get_data (&evd, file, offset, sizeof (evd), 1, + _("version def")) == NULL) + { + ivd.vd_next = 0; + ivd.vd_ndx = 0; + } + else + { + ivd.vd_next = BYTE_GET (evd.vd_next); + ivd.vd_ndx = BYTE_GET (evd.vd_ndx); + } offset += ivd.vd_next; } @@ -8466,10 +8539,11 @@ process_version_sections (FILE * file) ivd.vd_aux = BYTE_GET (evd.vd_aux); - get_data (&evda, file, - offset - ivd.vd_next + ivd.vd_aux, - sizeof (evda), 1, - _("version def aux")); + if (get_data (&evda, file, + offset - ivd.vd_next + ivd.vd_aux, + sizeof (evda), 1, + _("version def aux")) == NULL) + break; ivda.vda_name = BYTE_GET (evda.vda_name); @@ -8525,8 +8599,8 @@ get_symbol_binding (unsigned int binding) else if (binding >= STB_LOOS && binding <= STB_HIOS) { if (binding == STB_GNU_UNIQUE - && (elf_header.e_ident[EI_OSABI] == ELFOSABI_LINUX - /* GNU/Linux is still using the default value 0. */ + && (elf_header.e_ident[EI_OSABI] == ELFOSABI_GNU + /* GNU is still using the default value 0. */ || elf_header.e_ident[EI_OSABI] == ELFOSABI_NONE)) return "UNIQUE"; snprintf (buff, sizeof (buff), _(": %d"), binding); @@ -8578,8 +8652,8 @@ get_symbol_type (unsigned int type) } if (type == STT_GNU_IFUNC - && (elf_header.e_ident[EI_OSABI] == ELFOSABI_LINUX - /* GNU/Linux is still using the default value 0. */ + && (elf_header.e_ident[EI_OSABI] == ELFOSABI_GNU + /* GNU is still using the default value 0. */ || elf_header.e_ident[EI_OSABI] == ELFOSABI_NONE)) return "IFUNC"; @@ -8609,11 +8683,20 @@ get_mips_symbol_other (unsigned int other) { switch (other) { - case STO_OPTIONAL: return "OPTIONAL"; - case STO_MIPS16: return "MIPS16"; - case STO_MIPS_PLT: return "MIPS PLT"; - case STO_MIPS_PIC: return "MIPS PIC"; - default: return NULL; + case STO_OPTIONAL: + return "OPTIONAL"; + case STO_MIPS_PLT: + return "MIPS PLT"; + case STO_MIPS_PIC: + return "MIPS PIC"; + case STO_MICROMIPS: + return "MICROMIPS"; + case STO_MICROMIPS | STO_MIPS_PIC: + return "MICROMIPS, MIPS PIC"; + case STO_MIPS16: + return "MIPS16"; + default: + return NULL; } } @@ -8722,7 +8805,8 @@ get_symbol_index_type (unsigned int type) && elf_header.e_ident[EI_OSABI] == ELFOSABI_HPUX) return "ANSI_COM"; else if ((elf_header.e_machine == EM_X86_64 - || elf_header.e_machine == EM_L1OM) + || elf_header.e_machine == EM_L1OM + || elf_header.e_machine == EM_K1OM) && type == SHN_X86_64_LCOMMON) return "LARGE_COM"; else if ((type == SHN_MIPS_SCOMMON @@ -9130,8 +9214,8 @@ process_symbol_table (FILE * file) print_symbol (25, psym->st_name < strtab_size ? strtab + psym->st_name : _("")); - if (section->sh_type == SHT_DYNSYM && - version_info[DT_VERSIONTAGIDX (DT_VERSYM)] != 0) + if (section->sh_type == SHT_DYNSYM + && version_info[DT_VERSIONTAGIDX (DT_VERSYM)] != 0) { unsigned char data[2]; unsigned short vers_data; @@ -9143,8 +9227,9 @@ process_symbol_table (FILE * file) (file, version_info[DT_VERSIONTAGIDX (DT_VERSYM)], sizeof data + si * sizeof (vers_data)); - get_data (&data, file, offset + si * sizeof (vers_data), - sizeof (data), 1, _("version data")); + if (get_data (&data, file, offset + si * sizeof (vers_data), + sizeof (data), 1, _("version data")) == NULL) + break; vers_data = byte_get (data, 2); @@ -9172,8 +9257,14 @@ process_symbol_table (FILE * file) { unsigned long vna_off; - get_data (&evn, file, offset, sizeof (evn), 1, - _("version need")); + if (get_data (&evn, file, offset, sizeof (evn), 1, + _("version need")) == NULL) + { + ivna.vna_next = 0; + ivna.vna_other = 0; + ivna.vna_name = 0; + break; + } ivn.vn_aux = BYTE_GET (evn.vn_aux); ivn.vn_next = BYTE_GET (evn.vn_next); @@ -9184,13 +9275,20 @@ process_symbol_table (FILE * file) { Elf_External_Vernaux evna; - get_data (&evna, file, vna_off, - sizeof (evna), 1, - _("version need aux (3)")); - - ivna.vna_other = BYTE_GET (evna.vna_other); - ivna.vna_next = BYTE_GET (evna.vna_next); - ivna.vna_name = BYTE_GET (evna.vna_name); + if (get_data (&evna, file, vna_off, + sizeof (evna), 1, + _("version need aux (3)")) == NULL) + { + ivna.vna_next = 0; + ivna.vna_other = 0; + ivna.vna_name = 0; + } + else + { + ivna.vna_other = BYTE_GET (evna.vna_other); + ivna.vna_next = BYTE_GET (evna.vna_next); + ivna.vna_name = BYTE_GET (evna.vna_name); + } vna_off += ivna.vna_next; } @@ -9237,12 +9335,19 @@ process_symbol_table (FILE * file) { Elf_External_Verdef evd; - get_data (&evd, file, off, sizeof (evd), - 1, _("version def")); - - ivd.vd_ndx = BYTE_GET (evd.vd_ndx); - ivd.vd_aux = BYTE_GET (evd.vd_aux); - ivd.vd_next = BYTE_GET (evd.vd_next); + if (get_data (&evd, file, off, sizeof (evd), + 1, _("version def")) == NULL) + { + ivd.vd_ndx = 0; + ivd.vd_aux = 0; + ivd.vd_next = 0; + } + else + { + ivd.vd_ndx = BYTE_GET (evd.vd_ndx); + ivd.vd_aux = BYTE_GET (evd.vd_aux); + ivd.vd_next = BYTE_GET (evd.vd_next); + } off += ivd.vd_next; } @@ -9252,8 +9357,9 @@ process_symbol_table (FILE * file) off -= ivd.vd_next; off += ivd.vd_aux; - get_data (&evda, file, off, sizeof (evda), - 1, _("version def aux")); + if (get_data (&evda, file, off, sizeof (evda), + 1, _("version def aux")) == NULL) + break; ivda.vda_name = BYTE_GET (evda.vda_name); @@ -9662,6 +9768,10 @@ is_32bit_abs_reloc (unsigned int reloc_type) return reloc_type == 6; /* R_SPU_ADDR32 */ case EM_TI_C6000: return reloc_type == 1; /* R_C6000_ABS32. */ + case EM_TILEGX: + return reloc_type == 2; /* R_TILEGX_32. */ + case EM_TILEPRO: + return reloc_type == 1; /* R_TILEPRO_32. */ case EM_CYGNUS_V850: case EM_V850: return reloc_type == 6; /* R_V850_ABS32. */ @@ -9669,6 +9779,7 @@ is_32bit_abs_reloc (unsigned int reloc_type) return reloc_type == 1; /* R_VAX_32. */ case EM_X86_64: case EM_L1OM: + case EM_K1OM: return reloc_type == 10; /* R_X86_64_32. */ case EM_XC16X: case EM_C166: @@ -9721,8 +9832,13 @@ is_32bit_pcrel_reloc (unsigned int reloc_type) return reloc_type == 6; /* R_SPARC_DISP32. */ case EM_SPU: return reloc_type == 13; /* R_SPU_REL32. */ + case EM_TILEGX: + return reloc_type == 6; /* R_TILEGX_32_PCREL. */ + case EM_TILEPRO: + return reloc_type == 4; /* R_TILEPRO_32_PCREL. */ case EM_X86_64: case EM_L1OM: + case EM_K1OM: return reloc_type == 2; /* R_X86_64_PC32. */ case EM_XTENSA_OLD: case EM_XTENSA: @@ -9759,12 +9875,15 @@ is_64bit_abs_reloc (unsigned int reloc_type) return reloc_type == 54; /* R_SPARC_UA64. */ case EM_X86_64: case EM_L1OM: + case EM_K1OM: return reloc_type == 1; /* R_X86_64_64. */ case EM_S390_OLD: case EM_S390: - return reloc_type == 22; /* R_S390_64 */ + return reloc_type == 22; /* R_S390_64. */ + case EM_TILEGX: + return reloc_type == 1; /* R_TILEGX_64. */ case EM_MIPS: - return reloc_type == 18; /* R_MIPS_64 */ + return reloc_type == 18; /* R_MIPS_64. */ default: return FALSE; } @@ -9779,23 +9898,26 @@ is_64bit_pcrel_reloc (unsigned int reloc_type) switch (elf_header.e_machine) { case EM_ALPHA: - return reloc_type == 11; /* R_ALPHA_SREL64 */ + return reloc_type == 11; /* R_ALPHA_SREL64. */ case EM_IA_64: - return reloc_type == 0x4f; /* R_IA64_PCREL64LSB */ + return reloc_type == 0x4f; /* R_IA64_PCREL64LSB. */ case EM_PARISC: - return reloc_type == 72; /* R_PARISC_PCREL64 */ + return reloc_type == 72; /* R_PARISC_PCREL64. */ case EM_PPC64: - return reloc_type == 44; /* R_PPC64_REL64 */ + return reloc_type == 44; /* R_PPC64_REL64. */ case EM_SPARC32PLUS: case EM_SPARCV9: case EM_SPARC: - return reloc_type == 46; /* R_SPARC_DISP64 */ + return reloc_type == 46; /* R_SPARC_DISP64. */ case EM_X86_64: case EM_L1OM: - return reloc_type == 24; /* R_X86_64_PC64 */ + case EM_K1OM: + return reloc_type == 24; /* R_X86_64_PC64. */ case EM_S390_OLD: case EM_S390: - return reloc_type == 23; /* R_S390_PC64 */ + return reloc_type == 23; /* R_S390_PC64. */ + case EM_TILEGX: + return reloc_type == 5; /* R_TILEGX_64_PCREL. */ default: return FALSE; } @@ -9883,10 +10005,13 @@ is_none_reloc (unsigned int reloc_type) case EM_CRIS: /* R_CRIS_NONE. */ case EM_X86_64: /* R_X86_64_NONE. */ case EM_L1OM: /* R_X86_64_NONE. */ + case EM_K1OM: /* R_X86_64_NONE. */ case EM_MN10300: /* R_MN10300_NONE. */ case EM_MOXIE: /* R_MOXIE_NONE. */ case EM_M32R: /* R_M32R_NONE. */ case EM_TI_C6000:/* R_C6000_NONE. */ + case EM_TILEGX: /* R_TILEGX_NONE. */ + case EM_TILEPRO: /* R_TILEPRO_NONE. */ case EM_XC16X: case EM_C166: /* R_XC16X_NONE. */ return reloc_type == 0; @@ -10338,12 +10463,17 @@ load_specific_debug_section (enum dwarf_section_display_enum debug, snprintf (buf, sizeof (buf), _("%s section data"), section->name); section->address = sec->sh_addr; - section->size = sec->sh_size; section->start = (unsigned char *) get_data (NULL, (FILE *) file, sec->sh_offset, 1, sec->sh_size, buf); - if (uncompress_section_contents (§ion->start, §ion->size)) - sec->sh_size = section->size; + if (section->start == NULL) + section->size = 0; + else + { + section->size = sec->sh_size; + if (uncompress_section_contents (§ion->start, §ion->size)) + sec->sh_size = section->size; + } if (section->start == NULL) return 0; @@ -10966,6 +11096,88 @@ display_power_gnu_attribute (unsigned char * p, int tag) return p; } +static void +display_sparc_hwcaps (int mask) +{ + if (mask) + { + int first = 1; + if (mask & ELF_SPARC_HWCAP_MUL32) + fputs ("mul32", stdout), first = 0; + if (mask & ELF_SPARC_HWCAP_DIV32) + printf ("%sdiv32", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_FSMULD) + printf ("%sfsmuld", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_V8PLUS) + printf ("%sv8plus", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_POPC) + printf ("%spopc", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_VIS) + printf ("%svis", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_VIS2) + printf ("%svis2", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_ASI_BLK_INIT) + printf ("%sASIBlkInit", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_FMAF) + printf ("%sfmaf", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_VIS3) + printf ("%svis3", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_HPC) + printf ("%shpc", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_RANDOM) + printf ("%srandom", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_TRANS) + printf ("%strans", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_FJFMAU) + printf ("%sfjfmau", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_IMA) + printf ("%sima", first ? "" : "|"), first = 0; + if (mask & ELF_SPARC_HWCAP_ASI_CACHE_SPARING) + printf ("%scspare", first ? "" : "|"), first = 0; + } + else + fputc('0', stdout); + fputc('\n', stdout); +} + +static unsigned char * +display_sparc_gnu_attribute (unsigned char * p, int tag) +{ + int type; + unsigned int len; + int val; + + if (tag == Tag_GNU_Sparc_HWCAPS) + { + val = read_uleb128 (p, &len); + p += len; + printf (" Tag_GNU_Sparc_HWCAPS: "); + + display_sparc_hwcaps (val); + return p; + } + + if (tag & 1) + type = 1; /* String. */ + else + type = 2; /* uleb128. */ + printf (" Tag_unknown_%d: ", tag); + + if (type == 1) + { + printf ("\"%s\"\n", p); + p += strlen ((char *) p) + 1; + } + else + { + val = read_uleb128 (p, &len); + p += len; + printf ("%d (0x%x)\n", val, val); + } + + return p; +} + static unsigned char * display_mips_gnu_attribute (unsigned char * p, int tag) { @@ -11415,6 +11627,13 @@ process_power_specific (FILE * file) } static int +process_sparc_specific (FILE * file) +{ + return process_attributes (file, NULL, SHT_GNU_ATTRIBUTES, NULL, + display_sparc_gnu_attribute); +} + +static int process_tic6x_specific (FILE * file) { return process_attributes (file, "c6xabi", SHT_C6000_ATTRIBUTES, @@ -11911,6 +12130,9 @@ process_mips_specific (FILE * file) offset = offset_from_vma (file, pltgot, global_end - pltgot); data = (unsigned char *) get_data (NULL, file, offset, global_end - pltgot, 1, _("GOT")); + if (data == NULL) + return 0; + printf (_("\nPrimary GOT:\n")); printf (_(" Canonical gp value: ")); print_vma (pltgot + 0x7ff0, LONG_HEX); @@ -12007,6 +12229,9 @@ process_mips_specific (FILE * file) offset = offset_from_vma (file, mips_pltgot, end - mips_pltgot); data = (unsigned char *) get_data (NULL, file, offset, end - mips_pltgot, 1, _("PLT GOT")); + if (data == NULL) + return 0; + printf (_("\nPLT GOT:\n\n")); printf (_(" Reserved entries:\n")); printf (_(" %*s %*s Purpose\n"), @@ -12085,8 +12310,6 @@ process_gnu_liblist (FILE * file) strtab = (char *) get_data (NULL, file, string_sec->sh_offset, 1, string_sec->sh_size, _("liblist string table")); - strtab_size = string_sec->sh_size; - if (strtab == NULL || section->sh_entsize != sizeof (Elf32_External_Lib)) { @@ -12094,6 +12317,7 @@ process_gnu_liblist (FILE * file) free (strtab); break; } + strtab_size = string_sec->sh_size; printf (_("\nLibrary list section '%s' contains %lu entries:\n"), SECTION_NAME (section), @@ -12178,6 +12402,8 @@ get_note_type (unsigned e_type) return _("NT_S390_CTRS (s390 control registers)"); case NT_S390_PREFIX: return _("NT_S390_PREFIX (s390 prefix register)"); + case NT_ARM_VFP: + return _("NT_ARM_VFP (arm VFP registers)"); case NT_PSTATUS: return _("NT_PSTATUS (pstatus structure)"); case NT_FPREGS: @@ -12231,6 +12457,63 @@ get_gnu_elf_note_type (unsigned e_type) return buff; } +static int +print_gnu_note (Elf_Internal_Note *pnote) +{ + switch (pnote->type) + { + case NT_GNU_BUILD_ID: + { + unsigned long i; + + printf (_(" Build ID: ")); + for (i = 0; i < pnote->descsz; ++i) + printf ("%02x", pnote->descdata[i] & 0xff); + printf (_("\n")); + } + break; + + case NT_GNU_ABI_TAG: + { + unsigned long os, major, minor, subminor; + const char *osname; + + os = byte_get ((unsigned char *) pnote->descdata, 4); + major = byte_get ((unsigned char *) pnote->descdata + 4, 4); + minor = byte_get ((unsigned char *) pnote->descdata + 8, 4); + subminor = byte_get ((unsigned char *) pnote->descdata + 12, 4); + + switch (os) + { + case GNU_ABI_TAG_LINUX: + osname = "Linux"; + break; + case GNU_ABI_TAG_HURD: + osname = "Hurd"; + break; + case GNU_ABI_TAG_SOLARIS: + osname = "Solaris"; + break; + case GNU_ABI_TAG_FREEBSD: + osname = "FreeBSD"; + break; + case GNU_ABI_TAG_NETBSD: + osname = "NetBSD"; + break; + default: + osname = "Unknown"; + break; + } + + printf (_(" OS: %s, ABI: %ld.%ld.%ld\n"), osname, + major, minor, subminor); + } + break; + } + + return 1; +} + static const char * get_netbsd_elfcore_note_type (unsigned e_type) { @@ -12294,6 +12577,61 @@ get_netbsd_elfcore_note_type (unsigned e_type) } static const char * +get_stapsdt_note_type (unsigned e_type) +{ + static char buff[64]; + + switch (e_type) + { + case NT_STAPSDT: + return _("NT_STAPSDT (SystemTap probe descriptors)"); + + default: + break; + } + + snprintf (buff, sizeof (buff), _("Unknown note type: (0x%08x)"), e_type); + return buff; +} + +static int +print_stapsdt_note (Elf_Internal_Note *pnote) +{ + int addr_size = is_32bit_elf ? 4 : 8; + char *data = pnote->descdata; + char *data_end = pnote->descdata + pnote->descsz; + bfd_vma pc, base_addr, semaphore; + char *provider, *probe, *arg_fmt; + + pc = byte_get ((unsigned char *) data, addr_size); + data += addr_size; + base_addr = byte_get ((unsigned char *) data, addr_size); + data += addr_size; + semaphore = byte_get ((unsigned char *) data, addr_size); + data += addr_size; + + provider = data; + data += strlen (data) + 1; + probe = data; + data += strlen (data) + 1; + arg_fmt = data; + data += strlen (data) + 1; + + printf (_(" Provider: %s\n"), provider); + printf (_(" Name: %s\n"), probe); + printf (_(" Location: ")); + print_vma (pc, FULL_HEX); + printf (_(", Base: ")); + print_vma (base_addr, FULL_HEX); + printf (_(", Semaphore: ")); + print_vma (semaphore, FULL_HEX); + printf (_("\n")); + printf (_(" Arguments: %s\n"), arg_fmt); + + return data == data_end; +} + +static const char * get_ia64_vms_note_type (unsigned e_type) { static char buff[64]; @@ -12439,15 +12777,22 @@ process_note (Elf_Internal_Note * pnote) /* VMS/ia64-specific file notes. */ nt = get_ia64_vms_note_type (pnote->type); + else if (const_strneq (pnote->namedata, "stapsdt")) + nt = get_stapsdt_note_type (pnote->type); + else /* Don't recognize this note name; just use the default set of note type strings. */ nt = get_note_type (pnote->type); - printf (" %-10s\t0x%08lx\t%s\n", name, pnote->descsz, nt); + printf (" %-20s 0x%08lx\t%s\n", name, pnote->descsz, nt); if (const_strneq (pnote->namedata, "IPF/VMS")) return print_ia64_vms_note (pnote); + else if (const_strneq (pnote->namedata, "GNU")) + return print_gnu_note (pnote); + else if (const_strneq (pnote->namedata, "stapsdt")) + return print_stapsdt_note (pnote); else return 1; } @@ -12472,7 +12817,7 @@ process_corefile_note_segment (FILE * file, bfd_vma offset, bfd_vma length) printf (_("\nNotes at offset 0x%08lx with length 0x%08lx:\n"), (unsigned long) offset, (unsigned long) length); - printf (_(" Owner\t\tData size\tDescription\n")); + printf (_(" %-20s %10s\tDescription\n"), _("Owner"), _("Data size")); while (external < (Elf_External_Note *) ((char *) pnotes + length)) { @@ -12642,6 +12987,11 @@ process_arch_specific (FILE * file) case EM_PPC: return process_power_specific (file); break; + case EM_SPARC: + case EM_SPARC32PLUS: + case EM_SPARCV9: + return process_sparc_specific (file); + break; case EM_TI_C6000: return process_tic6x_specific (file); break; diff --git a/binutils/resres.c b/binutils/resres.c index 9f90df0..ff95cb5 100644 --- a/binutils/resres.c +++ b/binutils/resres.c @@ -1,5 +1,5 @@ /* resres.c: read_res_file and write_res_file implementation for windres. - Copyright 1998, 1999, 2001, 2002, 2005, 2007, 2008 + Copyright 1998, 1999, 2001, 2002, 2005, 2007, 2008, 2011 Free Software Foundation, Inc. Written by Anders Norlander . Rewritten by Kai Tietz, Onevision. @@ -98,7 +98,7 @@ read_res_file (const char *fn) off = 0; if (! probe_binary (&wrbfd, flen)) - set_windres_bfd_endianess (&wrbfd, ! target_is_bigendian); + set_windres_bfd_endianness (&wrbfd, ! target_is_bigendian); skip_null_resource (&wrbfd, &off, flen); diff --git a/binutils/sysinfo.c b/binutils/sysinfo.c new file mode 100644 index 0000000..3637974 --- /dev/null +++ b/binutils/sysinfo.c @@ -0,0 +1,1962 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton implementation for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* C LALR(1) parser skeleton written by Richard Stallman, by + simplifying the original so-called "semantic" parser. */ + +/* All symbols defined below should begin with yy or YY, to avoid + infringing on user name space. This should be done even for local + variables, as they might otherwise be expanded by user macros. + There are some unavoidable exceptions within include files to + define necessary library symbols; they are noted "INFRINGES ON + USER NAME SPACE" below. */ + +/* Identify Bison output. */ +#define YYBISON 1 + +/* Bison version. */ +#define YYBISON_VERSION "2.3" + +/* Skeleton name. */ +#define YYSKELETON_NAME "yacc.c" + +/* Pure parsers. */ +#define YYPURE 0 + +/* Using locations. */ +#define YYLSP_NEEDED 0 + + + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + COND = 258, + REPEAT = 259, + TYPE = 260, + NAME = 261, + NUMBER = 262, + UNIT = 263 + }; +#endif +/* Tokens. */ +#define COND 258 +#define REPEAT 259 +#define TYPE 260 +#define NAME 261 +#define NUMBER 262 +#define UNIT 263 + + + + +/* Copy the first part of user declarations. */ +#line 21 "sysinfo.y" + +#include +#include + +static char writecode; +static char *it; +static int code; +static char * repeat; +static char *oldrepeat; +static char *name; +static int rdepth; +static char *names[] = {" ","[n]","[n][m]"}; +static char *pnames[]= {"","*","**"}; + +static int yyerror (char *s); +extern int yylex (void); + + +/* Enabling traces. */ +#ifndef YYDEBUG +# define YYDEBUG 0 +#endif + +/* Enabling verbose error messages. */ +#ifdef YYERROR_VERBOSE +# undef YYERROR_VERBOSE +# define YYERROR_VERBOSE 1 +#else +# define YYERROR_VERBOSE 0 +#endif + +/* Enabling the token table. */ +#ifndef YYTOKEN_TABLE +# define YYTOKEN_TABLE 0 +#endif + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 40 "sysinfo.y" +{ + int i; + char *s; +} +/* Line 193 of yacc.c. */ +#line 135 "sysinfo.c" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + + + +/* Copy the second part of user declarations. */ + + +/* Line 216 of yacc.c. */ +#line 148 "sysinfo.c" + +#ifdef short +# undef short +#endif + +#ifdef YYTYPE_UINT8 +typedef YYTYPE_UINT8 yytype_uint8; +#else +typedef unsigned char yytype_uint8; +#endif + +#ifdef YYTYPE_INT8 +typedef YYTYPE_INT8 yytype_int8; +#elif (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +typedef signed char yytype_int8; +#else +typedef short int yytype_int8; +#endif + +#ifdef YYTYPE_UINT16 +typedef YYTYPE_UINT16 yytype_uint16; +#else +typedef unsigned short int yytype_uint16; +#endif + +#ifdef YYTYPE_INT16 +typedef YYTYPE_INT16 yytype_int16; +#else +typedef short int yytype_int16; +#endif + +#ifndef YYSIZE_T +# ifdef __SIZE_TYPE__ +# define YYSIZE_T __SIZE_TYPE__ +# elif defined size_t +# define YYSIZE_T size_t +# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# else +# define YYSIZE_T unsigned int +# endif +#endif + +#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) + +#ifndef YY_ +# if defined YYENABLE_NLS && YYENABLE_NLS +# if ENABLE_NLS +# include /* INFRINGES ON USER NAME SPACE */ +# define YY_(msgid) dgettext ("bison-runtime", msgid) +# endif +# endif +# ifndef YY_ +# define YY_(msgid) msgid +# endif +#endif + +/* Suppress unused-variable warnings by "using" E. */ +#if ! defined lint || defined __GNUC__ +# define YYUSE(e) ((void) (e)) +#else +# define YYUSE(e) /* empty */ +#endif + +/* Identity function, used to suppress warnings about constant conditions. */ +#ifndef lint +# define YYID(n) (n) +#else +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static int +YYID (int i) +#else +static int +YYID (i) + int i; +#endif +{ + return i; +} +#endif + +#if ! defined yyoverflow || YYERROR_VERBOSE + +/* The parser invokes alloca or malloc; define the necessary symbols. */ + +# ifdef YYSTACK_USE_ALLOCA +# if YYSTACK_USE_ALLOCA +# ifdef __GNUC__ +# define YYSTACK_ALLOC __builtin_alloca +# elif defined __BUILTIN_VA_ARG_INCR +# include /* INFRINGES ON USER NAME SPACE */ +# elif defined _AIX +# define YYSTACK_ALLOC __alloca +# elif defined _MSC_VER +# include /* INFRINGES ON USER NAME SPACE */ +# define alloca _alloca +# else +# define YYSTACK_ALLOC alloca +# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# endif +# endif +# endif + +# ifdef YYSTACK_ALLOC + /* Pacify GCC's `empty if-body' warning. */ +# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) +# ifndef YYSTACK_ALLOC_MAXIMUM + /* The OS might guarantee only one guard page at the bottom of the stack, + and a page size can be as small as 4096 bytes. So we cannot safely + invoke alloca (N) if N exceeds 4096. Use a slightly smaller number + to allow for a few compiler-allocated temporary stack slots. */ +# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ +# endif +# else +# define YYSTACK_ALLOC YYMALLOC +# define YYSTACK_FREE YYFREE +# ifndef YYSTACK_ALLOC_MAXIMUM +# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM +# endif +# if (defined __cplusplus && ! defined _STDLIB_H \ + && ! ((defined YYMALLOC || defined malloc) \ + && (defined YYFREE || defined free))) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# ifndef YYMALLOC +# define YYMALLOC malloc +# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifndef YYFREE +# define YYFREE free +# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void free (void *); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# endif +#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ + + +#if (! defined yyoverflow \ + && (! defined __cplusplus \ + || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) + +/* A type that is properly aligned for any stack member. */ +union yyalloc +{ + yytype_int16 yyss; + YYSTYPE yyvs; + }; + +/* The size of the maximum gap between one aligned stack and the next. */ +# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) + +/* The size of an array large to enough to hold all stacks, each with + N elements. */ +# define YYSTACK_BYTES(N) \ + ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ + + YYSTACK_GAP_MAXIMUM) + +/* Copy COUNT objects from FROM to TO. The source and destination do + not overlap. */ +# ifndef YYCOPY +# if defined __GNUC__ && 1 < __GNUC__ +# define YYCOPY(To, From, Count) \ + __builtin_memcpy (To, From, (Count) * sizeof (*(From))) +# else +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ + while (YYID (0)) +# endif +# endif + +/* Relocate STACK from its old location to the new one. The + local variables YYSIZE and YYSTACKSIZE give the old and new number of + elements in the stack, and YYPTR gives the new location of the + stack. Advance YYPTR to a properly aligned location for the next + stack. */ +# define YYSTACK_RELOCATE(Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack, Stack, yysize); \ + Stack = &yyptr->Stack; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ + while (YYID (0)) + +#endif + +/* YYFINAL -- State number of the termination state. */ +#define YYFINAL 3 +/* YYLAST -- Last index in YYTABLE. */ +#define YYLAST 38 + +/* YYNTOKENS -- Number of terminals. */ +#define YYNTOKENS 11 +/* YYNNTS -- Number of nonterminals. */ +#define YYNNTS 19 +/* YYNRULES -- Number of rules. */ +#define YYNRULES 27 +/* YYNRULES -- Number of states. */ +#define YYNSTATES 55 + +/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ +#define YYUNDEFTOK 2 +#define YYMAXUTOK 263 + +#define YYTRANSLATE(YYX) \ + ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + +/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ +static const yytype_uint8 yytranslate[] = +{ + 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 5, 6, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, + 7, 8, 9, 10 +}; + +#if YYDEBUG +/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in + YYRHS. */ +static const yytype_uint8 yyprhs[] = +{ + 0, 0, 3, 4, 7, 10, 11, 12, 19, 22, + 25, 28, 29, 30, 37, 38, 45, 46, 57, 59, + 60, 64, 67, 71, 72, 73, 77, 78 +}; + +/* YYRHS -- A `-1'-separated list of the rules' RHS. */ +static const yytype_int8 yyrhs[] = +{ + 12, 0, -1, -1, 13, 14, -1, 15, 14, -1, + -1, -1, 5, 8, 9, 16, 17, 6, -1, 22, + 17, -1, 20, 17, -1, 18, 17, -1, -1, -1, + 5, 4, 8, 19, 17, 6, -1, -1, 5, 3, + 8, 21, 17, 6, -1, -1, 5, 25, 5, 24, + 26, 6, 27, 23, 28, 6, -1, 7, -1, -1, + 5, 8, 6, -1, 9, 10, -1, 5, 8, 6, + -1, -1, -1, 5, 29, 6, -1, -1, 29, 5, + 8, 8, 6, -1 +}; + +/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ +static const yytype_uint16 yyrline[] = +{ + 0, 54, 54, 54, 92, 93, 98, 97, 169, 170, + 171, 172, 176, 175, 223, 222, 250, 249, 357, 358, + 362, 367, 373, 374, 377, 378, 380, 382 +}; +#endif + +#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE +/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. + First, the terminals, then, starting at YYNTOKENS, nonterminals. */ +static const char *const yytname[] = +{ + "$end", "error", "$undefined", "COND", "REPEAT", "'('", "')'", "TYPE", + "NAME", "NUMBER", "UNIT", "$accept", "top", "@1", "it_list", "it", "@2", + "it_field_list", "repeat_it_field", "@3", "cond_it_field", "@4", + "it_field", "@5", "attr_type", "attr_desc", "attr_size", "attr_id", + "enums", "enum_list", 0 +}; +#endif + +# ifdef YYPRINT +/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to + token YYLEX-NUM. */ +static const yytype_uint16 yytoknum[] = +{ + 0, 256, 257, 258, 259, 40, 41, 260, 261, 262, + 263 +}; +# endif + +/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ +static const yytype_uint8 yyr1[] = +{ + 0, 11, 13, 12, 14, 14, 16, 15, 17, 17, + 17, 17, 19, 18, 21, 20, 23, 22, 24, 24, + 25, 26, 27, 27, 28, 28, 29, 29 +}; + +/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ +static const yytype_uint8 yyr2[] = +{ + 0, 2, 0, 2, 2, 0, 0, 6, 2, 2, + 2, 0, 0, 6, 0, 6, 0, 10, 1, 0, + 3, 2, 3, 0, 0, 3, 0, 5 +}; + +/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state + STATE-NUM when YYTABLE doesn't specify something else to do. Zero + means the default is an error. */ +static const yytype_uint8 yydefact[] = +{ + 2, 0, 5, 1, 0, 3, 5, 0, 4, 6, + 11, 0, 0, 11, 11, 11, 0, 0, 0, 0, + 7, 10, 9, 8, 14, 12, 0, 19, 11, 11, + 20, 18, 0, 0, 0, 0, 0, 15, 13, 21, + 23, 0, 16, 0, 24, 22, 26, 0, 0, 17, + 0, 25, 0, 0, 27 +}; + +/* YYDEFGOTO[NTERM-NUM]. */ +static const yytype_int8 yydefgoto[] = +{ + -1, 1, 2, 5, 6, 10, 12, 13, 29, 14, + 28, 15, 44, 32, 19, 36, 42, 47, 48 +}; + +/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing + STATE-NUM. */ +#define YYPACT_NINF -14 +static const yytype_int8 yypact[] = +{ + -14, 8, 4, -14, 2, -14, 4, 3, -14, -14, + 6, 0, 7, 6, 6, 6, 9, 10, 11, 15, + -14, -14, -14, -14, -14, -14, 16, 14, 6, 6, + -14, -14, 5, 17, 18, 19, 20, -14, -14, -14, + 22, 23, -14, 24, 27, -14, -14, 28, 1, -14, + 25, -14, 29, 30, -14 +}; + +/* YYPGOTO[NTERM-NUM]. */ +static const yytype_int8 yypgoto[] = +{ + -14, -14, -14, 32, -14, -14, -13, -14, -14, -14, + -14, -14, -14, -14, -14, -14, -14, -14, -14 +}; + +/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If + positive, shift that token. If negative, reduce the rule which + number is the opposite. If zero, do what YYDEFACT says. + If YYTABLE_NINF, syntax error. */ +#define YYTABLE_NINF -1 +static const yytype_uint8 yytable[] = +{ + 21, 22, 23, 16, 17, 18, 50, 51, 3, 4, + 7, 11, 9, 20, 35, 33, 34, 24, 25, 26, + 27, 31, 30, 37, 38, 0, 40, 41, 0, 39, + 45, 43, 46, 52, 49, 0, 54, 53, 8 +}; + +static const yytype_int8 yycheck[] = +{ + 13, 14, 15, 3, 4, 5, 5, 6, 0, 5, + 8, 5, 9, 6, 9, 28, 29, 8, 8, 8, + 5, 7, 6, 6, 6, -1, 6, 5, -1, 10, + 6, 8, 5, 8, 6, -1, 6, 8, 6 +}; + +/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing + symbol of state STATE-NUM. */ +static const yytype_uint8 yystos[] = +{ + 0, 12, 13, 0, 5, 14, 15, 8, 14, 9, + 16, 5, 17, 18, 20, 22, 3, 4, 5, 25, + 6, 17, 17, 17, 8, 8, 8, 5, 21, 19, + 6, 7, 24, 17, 17, 9, 26, 6, 6, 10, + 6, 5, 27, 8, 23, 6, 5, 28, 29, 6, + 5, 6, 8, 8, 6 +}; + +#define yyerrok (yyerrstatus = 0) +#define yyclearin (yychar = YYEMPTY) +#define YYEMPTY (-2) +#define YYEOF 0 + +#define YYACCEPT goto yyacceptlab +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab + + +/* Like YYERROR except do call yyerror. This remains here temporarily + to ease the transition to the new meaning of YYERROR, for GCC. + Once GCC version 2 has supplanted version 1, this can go. */ + +#define YYFAIL goto yyerrlab + +#define YYRECOVERING() (!!yyerrstatus) + +#define YYBACKUP(Token, Value) \ +do \ + if (yychar == YYEMPTY && yylen == 1) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ + YYPOPSTACK (1); \ + goto yybackup; \ + } \ + else \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ +while (YYID (0)) + + +#define YYTERROR 1 +#define YYERRCODE 256 + + +/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. + If N is 0, then set CURRENT to the empty location which ends + the previous symbol: RHS[0] (always defined). */ + +#define YYRHSLOC(Rhs, K) ((Rhs)[K]) +#ifndef YYLLOC_DEFAULT +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ + if (YYID (N)) \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ + while (YYID (0)) +#endif + + +/* YY_LOCATION_PRINT -- Print the location on the stream. + This macro was not mandated originally: define only if we know + we won't break user code: when these are the locations we know. */ + +#ifndef YY_LOCATION_PRINT +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) +# else +# define YY_LOCATION_PRINT(File, Loc) ((void) 0) +# endif +#endif + + +/* YYLEX -- calling `yylex' with the right arguments. */ + +#ifdef YYLEX_PARAM +# define YYLEX yylex (YYLEX_PARAM) +#else +# define YYLEX yylex () +#endif + +/* Enable debugging if requested. */ +#if YYDEBUG + +# ifndef YYFPRINTF +# include /* INFRINGES ON USER NAME SPACE */ +# define YYFPRINTF fprintf +# endif + +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ +} while (YYID (0)) + +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yy_symbol_print (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ +} while (YYID (0)) + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_value_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (!yyvaluep) + return; +# ifdef YYPRINT + if (yytype < YYNTOKENS) + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# else + YYUSE (yyoutput); +# endif + switch (yytype) + { + default: + break; + } +} + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (yytype < YYNTOKENS) + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + else + YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + + yy_symbol_value_print (yyoutput, yytype, yyvaluep); + YYFPRINTF (yyoutput, ")"); +} + +/*------------------------------------------------------------------. +| yy_stack_print -- Print the state stack from its BOTTOM up to its | +| TOP (included). | +`------------------------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_stack_print (yytype_int16 *bottom, yytype_int16 *top) +#else +static void +yy_stack_print (bottom, top) + yytype_int16 *bottom; + yytype_int16 *top; +#endif +{ + YYFPRINTF (stderr, "Stack now"); + for (; bottom <= top; ++bottom) + YYFPRINTF (stderr, " %d", *bottom); + YYFPRINTF (stderr, "\n"); +} + +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ +} while (YYID (0)) + + +/*------------------------------------------------. +| Report that the YYRULE is going to be reduced. | +`------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_reduce_print (YYSTYPE *yyvsp, int yyrule) +#else +static void +yy_reduce_print (yyvsp, yyrule) + YYSTYPE *yyvsp; + int yyrule; +#endif +{ + int yynrhs = yyr2[yyrule]; + int yyi; + unsigned long int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", + yyrule - 1, yylno); + /* The symbols being reduced. */ + for (yyi = 0; yyi < yynrhs; yyi++) + { + fprintf (stderr, " $%d = ", yyi + 1); + yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], + &(yyvsp[(yyi + 1) - (yynrhs)]) + ); + fprintf (stderr, "\n"); + } +} + +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ + yy_reduce_print (yyvsp, Rule); \ +} while (YYID (0)) + +/* Nonzero means print parse trace. It is left uninitialized so that + multiple parsers can coexist. */ +int yydebug; +#else /* !YYDEBUG */ +# define YYDPRINTF(Args) +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YY_STACK_PRINT(Bottom, Top) +# define YY_REDUCE_PRINT(Rule) +#endif /* !YYDEBUG */ + + +/* YYINITDEPTH -- initial size of the parser's stacks. */ +#ifndef YYINITDEPTH +# define YYINITDEPTH 200 +#endif + +/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only + if the built-in stack extension method is used). + + Do not make this value too large; the results are undefined if + YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + evaluated with infinite-precision integer arithmetic. */ + +#ifndef YYMAXDEPTH +# define YYMAXDEPTH 10000 +#endif + + + +#if YYERROR_VERBOSE + +# ifndef yystrlen +# if defined __GLIBC__ && defined _STRING_H +# define yystrlen strlen +# else +/* Return the length of YYSTR. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static YYSIZE_T +yystrlen (const char *yystr) +#else +static YYSIZE_T +yystrlen (yystr) + const char *yystr; +#endif +{ + YYSIZE_T yylen; + for (yylen = 0; yystr[yylen]; yylen++) + continue; + return yylen; +} +# endif +# endif + +# ifndef yystpcpy +# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE +# define yystpcpy stpcpy +# else +/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in + YYDEST. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static char * +yystpcpy (char *yydest, const char *yysrc) +#else +static char * +yystpcpy (yydest, yysrc) + char *yydest; + const char *yysrc; +#endif +{ + char *yyd = yydest; + const char *yys = yysrc; + + while ((*yyd++ = *yys++) != '\0') + continue; + + return yyd - 1; +} +# endif +# endif + +# ifndef yytnamerr +/* Copy to YYRES the contents of YYSTR after stripping away unnecessary + quotes and backslashes, so that it's suitable for yyerror. The + heuristic is that double-quoting is unnecessary unless the string + contains an apostrophe, a comma, or backslash (other than + backslash-backslash). YYSTR is taken from yytname. If YYRES is + null, do not copy; instead, return the length of what the result + would have been. */ +static YYSIZE_T +yytnamerr (char *yyres, const char *yystr) +{ + if (*yystr == '"') + { + YYSIZE_T yyn = 0; + char const *yyp = yystr; + + for (;;) + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; + + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; + + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } + do_not_strip_quotes: ; + } + + if (! yyres) + return yystrlen (yystr); + + return yystpcpy (yyres, yystr) - yyres; +} +# endif + +/* Copy into YYRESULT an error message about the unexpected token + YYCHAR while in state YYSTATE. Return the number of bytes copied, + including the terminating null byte. If YYRESULT is null, do not + copy anything; just return the number of bytes that would be + copied. As a special case, return 0 if an ordinary "syntax error" + message will do. Return YYSIZE_MAXIMUM if overflow occurs during + size calculation. */ +static YYSIZE_T +yysyntax_error (char *yyresult, int yystate, int yychar) +{ + int yyn = yypact[yystate]; + + if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) + return 0; + else + { + int yytype = YYTRANSLATE (yychar); + YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); + YYSIZE_T yysize = yysize0; + YYSIZE_T yysize1; + int yysize_overflow = 0; + enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; + char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + int yyx; + +# if 0 + /* This is so xgettext sees the translatable formats that are + constructed on the fly. */ + YY_("syntax error, unexpected %s"); + YY_("syntax error, unexpected %s, expecting %s"); + YY_("syntax error, unexpected %s, expecting %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); +# endif + char *yyfmt; + char const *yyf; + static char const yyunexpected[] = "syntax error, unexpected %s"; + static char const yyexpecting[] = ", expecting %s"; + static char const yyor[] = " or %s"; + char yyformat[sizeof yyunexpected + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; + char const *yyprefix = yyexpecting; + + /* Start YYX at -YYN if negative to avoid negative indexes in + YYCHECK. */ + int yyxbegin = yyn < 0 ? -yyn : 0; + + /* Stay within bounds of both yycheck and yytname. */ + int yychecklim = YYLAST - yyn + 1; + int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; + int yycount = 1; + + yyarg[0] = yytname[yytype]; + yyfmt = yystpcpy (yyformat, yyunexpected); + + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } + + yyf = YY_(yyformat); + yysize1 = yysize + yystrlen (yyf); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + + if (yysize_overflow) + return YYSIZE_MAXIMUM; + + if (yyresult) + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yyresult; + int yyi = 0; + while ((*yyp = *yyf) != '\0') + { + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } + } + } + return yysize; + } +} +#endif /* YYERROR_VERBOSE */ + + +/*-----------------------------------------------. +| Release the memory associated to this symbol. | +`-----------------------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +#else +static void +yydestruct (yymsg, yytype, yyvaluep) + const char *yymsg; + int yytype; + YYSTYPE *yyvaluep; +#endif +{ + YYUSE (yyvaluep); + + if (!yymsg) + yymsg = "Deleting"; + YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); + + switch (yytype) + { + + default: + break; + } +} + + +/* Prevent warnings from -Wmissing-prototypes. */ + +#ifdef YYPARSE_PARAM +#if defined __STDC__ || defined __cplusplus +int yyparse (void *YYPARSE_PARAM); +#else +int yyparse (); +#endif +#else /* ! YYPARSE_PARAM */ +#if defined __STDC__ || defined __cplusplus +int yyparse (void); +#else +int yyparse (); +#endif +#endif /* ! YYPARSE_PARAM */ + + + +/* The look-ahead symbol. */ +int yychar; + +/* The semantic value of the look-ahead symbol. */ +YYSTYPE yylval; + +/* Number of syntax errors so far. */ +int yynerrs; + + + +/*----------. +| yyparse. | +`----------*/ + +#ifdef YYPARSE_PARAM +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void *YYPARSE_PARAM) +#else +int +yyparse (YYPARSE_PARAM) + void *YYPARSE_PARAM; +#endif +#else /* ! YYPARSE_PARAM */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void) +#else +int +yyparse () + +#endif +#endif +{ + + int yystate; + int yyn; + int yyresult; + /* Number of tokens to shift before error messages enabled. */ + int yyerrstatus; + /* Look-ahead token as an internal (translated) token number. */ + int yytoken = 0; +#if YYERROR_VERBOSE + /* Buffer for error messages, and its allocated size. */ + char yymsgbuf[128]; + char *yymsg = yymsgbuf; + YYSIZE_T yymsg_alloc = sizeof yymsgbuf; +#endif + + /* Three stacks and their tools: + `yyss': related to states, + `yyvs': related to semantic values, + `yyls': related to locations. + + Refer to the stacks thru separate pointers, to allow yyoverflow + to reallocate them elsewhere. */ + + /* The state stack. */ + yytype_int16 yyssa[YYINITDEPTH]; + yytype_int16 *yyss = yyssa; + yytype_int16 *yyssp; + + /* The semantic value stack. */ + YYSTYPE yyvsa[YYINITDEPTH]; + YYSTYPE *yyvs = yyvsa; + YYSTYPE *yyvsp; + + + +#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) + + YYSIZE_T yystacksize = YYINITDEPTH; + + /* The variables used to return semantic value and location from the + action routines. */ + YYSTYPE yyval; + + + /* The number of symbols on the RHS of the reduced rule. + Keep to zero when no symbol should be popped. */ + int yylen = 0; + + YYDPRINTF ((stderr, "Starting parse\n")); + + yystate = 0; + yyerrstatus = 0; + yynerrs = 0; + yychar = YYEMPTY; /* Cause a token to be read. */ + + /* Initialize stack pointers. + Waste one element of value and location stack + so that they stay on the same level as the state stack. + The wasted elements are never initialized. */ + + yyssp = yyss; + yyvsp = yyvs; + + goto yysetstate; + +/*------------------------------------------------------------. +| yynewstate -- Push a new state, which is found in yystate. | +`------------------------------------------------------------*/ + yynewstate: + /* In all cases, when you get here, the value and location stacks + have just been pushed. So pushing a state here evens the stacks. */ + yyssp++; + + yysetstate: + *yyssp = yystate; + + if (yyss + yystacksize - 1 <= yyssp) + { + /* Get the current used size of the three stacks, in elements. */ + YYSIZE_T yysize = yyssp - yyss + 1; + +#ifdef yyoverflow + { + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + yytype_int16 *yyss1 = yyss; + + + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), + + &yystacksize); + + yyss = yyss1; + yyvs = yyvs1; + } +#else /* no yyoverflow */ +# ifndef YYSTACK_RELOCATE + goto yyexhaustedlab; +# else + /* Extend the stack our own way. */ + if (YYMAXDEPTH <= yystacksize) + goto yyexhaustedlab; + yystacksize *= 2; + if (YYMAXDEPTH < yystacksize) + yystacksize = YYMAXDEPTH; + + { + yytype_int16 *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss); + YYSTACK_RELOCATE (yyvs); + +# undef YYSTACK_RELOCATE + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); + } +# endif +#endif /* no yyoverflow */ + + yyssp = yyss + yysize - 1; + yyvsp = yyvs + yysize - 1; + + + YYDPRINTF ((stderr, "Stack size increased to %lu\n", + (unsigned long int) yystacksize)); + + if (yyss + yystacksize - 1 <= yyssp) + YYABORT; + } + + YYDPRINTF ((stderr, "Entering state %d\n", yystate)); + + goto yybackup; + +/*-----------. +| yybackup. | +`-----------*/ +yybackup: + + /* Do appropriate processing given the current state. Read a + look-ahead token if we need one and don't already have one. */ + + /* First try to decide what to do without reference to look-ahead token. */ + yyn = yypact[yystate]; + if (yyn == YYPACT_NINF) + goto yydefault; + + /* Not known => get a look-ahead token if don't already have one. */ + + /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ + if (yychar == YYEMPTY) + { + YYDPRINTF ((stderr, "Reading a token: ")); + yychar = YYLEX; + } + + if (yychar <= YYEOF) + { + yychar = yytoken = YYEOF; + YYDPRINTF ((stderr, "Now at end of input.\n")); + } + else + { + yytoken = YYTRANSLATE (yychar); + YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + } + + /* If the proper action on seeing token YYTOKEN is to reduce or to + detect an error, take that action. */ + yyn += yytoken; + if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) + goto yydefault; + yyn = yytable[yyn]; + if (yyn <= 0) + { + if (yyn == 0 || yyn == YYTABLE_NINF) + goto yyerrlab; + yyn = -yyn; + goto yyreduce; + } + + if (yyn == YYFINAL) + YYACCEPT; + + /* Count tokens shifted since error; after three, turn off error + status. */ + if (yyerrstatus) + yyerrstatus--; + + /* Shift the look-ahead token. */ + YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + + /* Discard the shifted token unless it is eof. */ + if (yychar != YYEOF) + yychar = YYEMPTY; + + yystate = yyn; + *++yyvsp = yylval; + + goto yynewstate; + + +/*-----------------------------------------------------------. +| yydefault -- do the default action for the current state. | +`-----------------------------------------------------------*/ +yydefault: + yyn = yydefact[yystate]; + if (yyn == 0) + goto yyerrlab; + goto yyreduce; + + +/*-----------------------------. +| yyreduce -- Do a reduction. | +`-----------------------------*/ +yyreduce: + /* yyn is the number of a rule to reduce with. */ + yylen = yyr2[yyn]; + + /* If YYLEN is nonzero, implement the default value of the action: + `$$ = $1'. + + Otherwise, the following line sets YYVAL to garbage. + This behavior is undocumented and Bison + users should not rely upon it. Assigning to YYVAL + unconditionally makes the parser a bit smaller, and it avoids a + GCC warning that YYVAL may be used uninitialized. */ + yyval = yyvsp[1-yylen]; + + + YY_REDUCE_PRINT (yyn); + switch (yyn) + { + case 2: +#line 54 "sysinfo.y" + { + switch (writecode) + { + case 'i': + printf("#ifdef SYSROFF_SWAP_IN\n"); + break; + case 'p': + printf("#ifdef SYSROFF_p\n"); + break; + case 'd': + break; + case 'g': + printf("#ifdef SYSROFF_SWAP_OUT\n"); + break; + case 'c': + printf("#ifdef SYSROFF_PRINT\n"); + printf("#include \n"); + printf("#include \n"); + printf("#include \n"); + break; + } + } + break; + + case 3: +#line 76 "sysinfo.y" + { + switch (writecode) { + case 'i': + case 'p': + case 'g': + case 'c': + printf("#endif\n"); + break; + case 'd': + break; + } +} + break; + + case 6: +#line 98 "sysinfo.y" + { + it = (yyvsp[(2) - (3)].s); code = (yyvsp[(3) - (3)].i); + switch (writecode) + { + case 'd': + printf("\n\n\n#define IT_%s_CODE 0x%x\n", it,code); + printf("struct IT_%s;\n", it); + printf("extern void sysroff_swap_%s_in (struct IT_%s *);\n", + (yyvsp[(2) - (3)].s), it); + printf("extern void sysroff_swap_%s_out (FILE *, struct IT_%s *);\n", + (yyvsp[(2) - (3)].s), it); + printf("extern void sysroff_print_%s_out (struct IT_%s *);\n", + (yyvsp[(2) - (3)].s), it); + printf("struct IT_%s { \n", it); + break; + case 'i': + printf("void sysroff_swap_%s_in (struct IT_%s * ptr)\n",(yyvsp[(2) - (3)].s),it); + printf("{\n"); + printf("\tunsigned char raw[255];\n"); + printf("\tint idx = 0;\n"); + printf("\tint size;\n"); + printf("\tmemset(raw,0,255);\n"); + printf("\tmemset(ptr,0,sizeof(*ptr));\n"); + printf("\tsize = fillup(raw);\n"); + break; + case 'g': + printf("void sysroff_swap_%s_out (FILE * ffile, struct IT_%s * ptr)\n",(yyvsp[(2) - (3)].s),it); + printf("{\n"); + printf("\tunsigned char raw[255];\n"); + printf("\tint idx = 16;\n"); + printf("\tmemset (raw, 0, 255);\n"); + printf("\tcode = IT_%s_CODE;\n", it); + break; + case 'o': + printf("void sysroff_swap_%s_out (bfd * abfd, struct IT_%s * ptr)\n",(yyvsp[(2) - (3)].s), it); + printf("{\n"); + printf("\tint idx = 0;\n"); + break; + case 'c': + printf("void sysroff_print_%s_out (struct IT_%s *ptr)\n",(yyvsp[(2) - (3)].s),it); + printf("{\n"); + printf("itheader(\"%s\", IT_%s_CODE);\n",(yyvsp[(2) - (3)].s),(yyvsp[(2) - (3)].s)); + break; + + case 't': + break; + } + + } + break; + + case 7: +#line 149 "sysinfo.y" + { + switch (writecode) { + case 'd': + printf("};\n"); + break; + case 'g': + printf("\tchecksum(ffile,raw, idx, IT_%s_CODE);\n", it); + + case 'i': + + case 'o': + case 'c': + printf("}\n"); + } +} + break; + + case 12: +#line 176 "sysinfo.y" + { + rdepth++; + switch (writecode) + { + case 'c': + if (rdepth==1) + printf("\tprintf(\"repeat %%d\\n\", %s);\n",(yyvsp[(3) - (3)].s)); + if (rdepth==2) + printf("\tprintf(\"repeat %%d\\n\", %s[n]);\n",(yyvsp[(3) - (3)].s)); + case 'i': + case 'g': + case 'o': + + if (rdepth==1) + { + printf("\t{ int n; for (n = 0; n < %s; n++) {\n", (yyvsp[(3) - (3)].s)); + } + if (rdepth == 2) { + printf("\t{ int m; for (m = 0; m < %s[n]; m++) {\n", (yyvsp[(3) - (3)].s)); + } + + break; + } + + oldrepeat = repeat; + repeat = (yyvsp[(3) - (3)].s); + } + break; + + case 13: +#line 206 "sysinfo.y" + { + repeat = oldrepeat; + oldrepeat =0; + rdepth--; + switch (writecode) + { + case 'i': + case 'g': + case 'o': + case 'c': + printf("\t}}\n"); + } + } + break; + + case 14: +#line 223 "sysinfo.y" + { + switch (writecode) + { + case 'i': + case 'g': + case 'o': + case 'c': + printf("\tif (%s) {\n", (yyvsp[(3) - (3)].s)); + break; + } + } + break; + + case 15: +#line 236 "sysinfo.y" + { + switch (writecode) + { + case 'i': + case 'g': + case 'o': + case 'c': + printf("\t}\n"); + } + } + break; + + case 16: +#line 250 "sysinfo.y" + {name = (yyvsp[(7) - (7)].s); } + break; + + case 17: +#line 252 "sysinfo.y" + { + char *desc = (yyvsp[(2) - (10)].s); + char *type = (yyvsp[(4) - (10)].s); + int size = (yyvsp[(5) - (10)].i); + char *id = (yyvsp[(7) - (10)].s); +char *p = names[rdepth]; +char *ptr = pnames[rdepth]; + switch (writecode) + { + case 'g': + if (size % 8) + { + + printf("\twriteBITS(ptr->%s%s,raw,&idx,%d);\n", + id, + names[rdepth], size); + + } + else { + printf("\twrite%s(ptr->%s%s,raw,&idx,%d,ffile);\n", + type, + id, + names[rdepth],size/8); + } + break; + case 'i': + { + + if (rdepth >= 1) + + { + printf("if (!ptr->%s) ptr->%s = (%s*)xcalloc(%s, sizeof(ptr->%s[0]));\n", + id, + id, + type, + repeat, + id); + } + + if (rdepth == 2) + { + printf("if (!ptr->%s[n]) ptr->%s[n] = (%s**)xcalloc(%s[n], sizeof(ptr->%s[n][0]));\n", + id, + id, + type, + repeat, + id); + } + + } + + if (size % 8) + { + printf("\tptr->%s%s = getBITS(raw,&idx, %d,size);\n", + id, + names[rdepth], + size); + } + else { + printf("\tptr->%s%s = get%s(raw,&idx, %d,size);\n", + id, + names[rdepth], + type, + size/8); + } + break; + case 'o': + printf("\tput%s(raw,%d,%d,&idx,ptr->%s%s);\n", type,size/8,size%8,id,names[rdepth]); + break; + case 'd': + if (repeat) + printf("\t/* repeat %s */\n", repeat); + + if (type[0] == 'I') { + printf("\tint %s%s; \t/* %s */\n",ptr,id, desc); + } + else if (type[0] =='C') { + printf("\tchar %s*%s;\t /* %s */\n",ptr,id, desc); + } + else { + printf("\tbarray %s%s;\t /* %s */\n",ptr,id, desc); + } + break; + case 'c': + printf("tabout();\n"); + printf("\tprintf(\"/*%-30s*/ ptr->%s = \");\n", desc, id); + + if (type[0] == 'I') + printf("\tprintf(\"%%d\\n\",ptr->%s%s);\n", id,p); + else if (type[0] == 'C') + printf("\tprintf(\"%%s\\n\",ptr->%s%s);\n", id,p); + + else if (type[0] == 'B') + { + printf("\tpbarray(&ptr->%s%s);\n", id,p); + } + else abort(); + break; + } + } + break; + + case 18: +#line 357 "sysinfo.y" + { (yyval.s) = (yyvsp[(1) - (1)].s); } + break; + + case 19: +#line 358 "sysinfo.y" + { (yyval.s) = "INT";} + break; + + case 20: +#line 363 "sysinfo.y" + { (yyval.s) = (yyvsp[(2) - (3)].s); } + break; + + case 21: +#line 368 "sysinfo.y" + { (yyval.i) = (yyvsp[(1) - (2)].i) * (yyvsp[(2) - (2)].i); } + break; + + case 22: +#line 373 "sysinfo.y" + { (yyval.s) = (yyvsp[(2) - (3)].s); } + break; + + case 23: +#line 374 "sysinfo.y" + { (yyval.s) = "dummy";} + break; + + case 27: +#line 382 "sysinfo.y" + { + switch (writecode) + { + case 'd': + printf("#define %s %s\n", (yyvsp[(3) - (5)].s),(yyvsp[(4) - (5)].s)); + break; + case 'c': + printf("if (ptr->%s%s == %s) { tabout(); printf(\"%s\\n\");}\n", name, names[rdepth],(yyvsp[(4) - (5)].s),(yyvsp[(3) - (5)].s)); + } + } + break; + + +/* Line 1267 of yacc.c. */ +#line 1715 "sysinfo.c" + default: break; + } + YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); + + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + + *++yyvsp = yyval; + + + /* Now `shift' the result of the reduction. Determine what state + that goes to, based on the state we popped back to and the rule + number reduced by. */ + + yyn = yyr1[yyn]; + + yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; + if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yytable[yystate]; + else + yystate = yydefgoto[yyn - YYNTOKENS]; + + goto yynewstate; + + +/*------------------------------------. +| yyerrlab -- here on detecting error | +`------------------------------------*/ +yyerrlab: + /* If not already recovering from an error, report this error. */ + if (!yyerrstatus) + { + ++yynerrs; +#if ! YYERROR_VERBOSE + yyerror (YY_("syntax error")); +#else + { + YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); + if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) + { + YYSIZE_T yyalloc = 2 * yysize; + if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) + yyalloc = YYSTACK_ALLOC_MAXIMUM; + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); + yymsg = (char *) YYSTACK_ALLOC (yyalloc); + if (yymsg) + yymsg_alloc = yyalloc; + else + { + yymsg = yymsgbuf; + yymsg_alloc = sizeof yymsgbuf; + } + } + + if (0 < yysize && yysize <= yymsg_alloc) + { + (void) yysyntax_error (yymsg, yystate, yychar); + yyerror (yymsg); + } + else + { + yyerror (YY_("syntax error")); + if (yysize != 0) + goto yyexhaustedlab; + } + } +#endif + } + + + + if (yyerrstatus == 3) + { + /* If just tried and failed to reuse look-ahead token after an + error, discard it. */ + + if (yychar <= YYEOF) + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } + else + { + yydestruct ("Error: discarding", + yytoken, &yylval); + yychar = YYEMPTY; + } + } + + /* Else will try to reuse look-ahead token after shifting the error + token. */ + goto yyerrlab1; + + +/*---------------------------------------------------. +| yyerrorlab -- error raised explicitly by YYERROR. | +`---------------------------------------------------*/ +yyerrorlab: + + /* Pacify compilers like GCC when the user code never invokes + YYERROR and the label yyerrorlab therefore never appears in user + code. */ + if (/*CONSTCOND*/ 0) + goto yyerrorlab; + + /* Do not reclaim the symbols of the rule which action triggered + this YYERROR. */ + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + yystate = *yyssp; + goto yyerrlab1; + + +/*-------------------------------------------------------------. +| yyerrlab1 -- common code for both syntax error and YYERROR. | +`-------------------------------------------------------------*/ +yyerrlab1: + yyerrstatus = 3; /* Each real token shifted decrements this. */ + + for (;;) + { + yyn = yypact[yystate]; + if (yyn != YYPACT_NINF) + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } + + /* Pop the current state because it cannot handle the error token. */ + if (yyssp == yyss) + YYABORT; + + + yydestruct ("Error: popping", + yystos[yystate], yyvsp); + YYPOPSTACK (1); + yystate = *yyssp; + YY_STACK_PRINT (yyss, yyssp); + } + + if (yyn == YYFINAL) + YYACCEPT; + + *++yyvsp = yylval; + + + /* Shift the error token. */ + YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); + + yystate = yyn; + goto yynewstate; + + +/*-------------------------------------. +| yyacceptlab -- YYACCEPT comes here. | +`-------------------------------------*/ +yyacceptlab: + yyresult = 0; + goto yyreturn; + +/*-----------------------------------. +| yyabortlab -- YYABORT comes here. | +`-----------------------------------*/ +yyabortlab: + yyresult = 1; + goto yyreturn; + +#ifndef yyoverflow +/*-------------------------------------------------. +| yyexhaustedlab -- memory exhaustion comes here. | +`-------------------------------------------------*/ +yyexhaustedlab: + yyerror (YY_("memory exhausted")); + yyresult = 2; + /* Fall through. */ +#endif + +yyreturn: + if (yychar != YYEOF && yychar != YYEMPTY) + yydestruct ("Cleanup: discarding lookahead", + yytoken, &yylval); + /* Do not reclaim the symbols of the rule which action triggered + this YYABORT or YYACCEPT. */ + YYPOPSTACK (yylen); + YY_STACK_PRINT (yyss, yyssp); + while (yyssp != yyss) + { + yydestruct ("Cleanup: popping", + yystos[*yyssp], yyvsp); + YYPOPSTACK (1); + } +#ifndef yyoverflow + if (yyss != yyssa) + YYSTACK_FREE (yyss); +#endif +#if YYERROR_VERBOSE + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); +#endif + /* Make sure YYID is used. */ + return YYID (yyresult); +} + + +#line 397 "sysinfo.y" + +/* four modes + + -d write structure definitions for sysroff in host format + -i write functions to swap into sysroff format in + -o write functions to swap into sysroff format out + -c write code to print info in human form */ + +int yydebug; + +int +main (int ac, char **av) +{ + yydebug=0; + if (ac > 1) + writecode = av[1][1]; +if (writecode == 'd') + { + printf("typedef struct { unsigned char *data; int len; } barray; \n"); + printf("typedef int INT;\n"); + printf("typedef char * CHARS;\n"); + + } + yyparse(); +return 0; +} + +static int +yyerror (char *s) +{ + fprintf(stderr, "%s\n" , s); + return 0; +} + diff --git a/binutils/sysinfo.h b/binutils/sysinfo.h new file mode 100644 index 0000000..7515e22 --- /dev/null +++ b/binutils/sysinfo.h @@ -0,0 +1,77 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton interface for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + COND = 258, + REPEAT = 259, + TYPE = 260, + NAME = 261, + NUMBER = 262, + UNIT = 263 + }; +#endif +/* Tokens. */ +#define COND 258 +#define REPEAT 259 +#define TYPE 260 +#define NAME 261 +#define NUMBER 262 +#define UNIT 263 + + + + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 40 "sysinfo.y" +{ + int i; + char *s; +} +/* Line 1529 of yacc.c. */ +#line 70 "sysinfo.h" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + +extern YYSTYPE yylval; + diff --git a/binutils/syslex.c b/binutils/syslex.c new file mode 100644 index 0000000..b5f49a3 --- /dev/null +++ b/binutils/syslex.c @@ -0,0 +1,1903 @@ + +#line 3 "syslex.c" + +#define YY_INT_ALIGNED short int + +/* A lexical scanner generated by flex */ + +#define FLEX_SCANNER +#define YY_FLEX_MAJOR_VERSION 2 +#define YY_FLEX_MINOR_VERSION 5 +#define YY_FLEX_SUBMINOR_VERSION 35 +#if YY_FLEX_SUBMINOR_VERSION > 0 +#define FLEX_BETA +#endif + +/* First, we deal with platform-specific or compiler-specific issues. */ + +/* begin standard C headers. */ +#include +#include +#include +#include + +/* end standard C headers. */ + +/* flex integer type definitions */ + +#ifndef FLEXINT_H +#define FLEXINT_H + +/* C99 systems have . Non-C99 systems may or may not. */ + +#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L + +/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, + * if you want the limit (max/min) macros for int types. + */ +#ifndef __STDC_LIMIT_MACROS +#define __STDC_LIMIT_MACROS 1 +#endif + +#include +typedef int8_t flex_int8_t; +typedef uint8_t flex_uint8_t; +typedef int16_t flex_int16_t; +typedef uint16_t flex_uint16_t; +typedef int32_t flex_int32_t; +typedef uint32_t flex_uint32_t; +#else +typedef signed char flex_int8_t; +typedef short int flex_int16_t; +typedef int flex_int32_t; +typedef unsigned char flex_uint8_t; +typedef unsigned short int flex_uint16_t; +typedef unsigned int flex_uint32_t; +#endif /* ! C99 */ + +/* Limits of integral types. */ +#ifndef INT8_MIN +#define INT8_MIN (-128) +#endif +#ifndef INT16_MIN +#define INT16_MIN (-32767-1) +#endif +#ifndef INT32_MIN +#define INT32_MIN (-2147483647-1) +#endif +#ifndef INT8_MAX +#define INT8_MAX (127) +#endif +#ifndef INT16_MAX +#define INT16_MAX (32767) +#endif +#ifndef INT32_MAX +#define INT32_MAX (2147483647) +#endif +#ifndef UINT8_MAX +#define UINT8_MAX (255U) +#endif +#ifndef UINT16_MAX +#define UINT16_MAX (65535U) +#endif +#ifndef UINT32_MAX +#define UINT32_MAX (4294967295U) +#endif + +#endif /* ! FLEXINT_H */ + +#ifdef __cplusplus + +/* The "const" storage-class-modifier is valid. */ +#define YY_USE_CONST + +#else /* ! __cplusplus */ + +/* C99 requires __STDC__ to be defined as 1. */ +#if defined (__STDC__) + +#define YY_USE_CONST + +#endif /* defined (__STDC__) */ +#endif /* ! __cplusplus */ + +#ifdef YY_USE_CONST +#define yyconst const +#else +#define yyconst +#endif + +/* Returned upon end-of-file. */ +#define YY_NULL 0 + +/* Promotes a possibly negative, possibly signed char to an unsigned + * integer for use as an array index. If the signed char is negative, + * we want to instead treat it as an 8-bit unsigned char, hence the + * double cast. + */ +#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) + +/* Enter a start condition. This macro really ought to take a parameter, + * but we do it the disgusting crufty way forced on us by the ()-less + * definition of BEGIN. + */ +#define BEGIN (yy_start) = 1 + 2 * + +/* Translate the current start state into a value that can be later handed + * to BEGIN to return to the state. The YYSTATE alias is for lex + * compatibility. + */ +#define YY_START (((yy_start) - 1) / 2) +#define YYSTATE YY_START + +/* Action number for EOF rule of a given start state. */ +#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) + +/* Special action meaning "start processing a new file". */ +#define YY_NEW_FILE yyrestart(yyin ) + +#define YY_END_OF_BUFFER_CHAR 0 + +/* Size of default input buffer. */ +#ifndef YY_BUF_SIZE +#define YY_BUF_SIZE 16384 +#endif + +/* The state buf must be large enough to hold one state per character in the main buffer. + */ +#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) + +#ifndef YY_TYPEDEF_YY_BUFFER_STATE +#define YY_TYPEDEF_YY_BUFFER_STATE +typedef struct yy_buffer_state *YY_BUFFER_STATE; +#endif + +#ifndef YY_TYPEDEF_YY_SIZE_T +#define YY_TYPEDEF_YY_SIZE_T +typedef size_t yy_size_t; +#endif + +extern yy_size_t yyleng; + +extern FILE *yyin, *yyout; + +#define EOB_ACT_CONTINUE_SCAN 0 +#define EOB_ACT_END_OF_FILE 1 +#define EOB_ACT_LAST_MATCH 2 + + #define YY_LESS_LINENO(n) + +/* Return all but the first "n" matched characters back to the input stream. */ +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + *yy_cp = (yy_hold_char); \ + YY_RESTORE_YY_MORE_OFFSET \ + (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ + YY_DO_BEFORE_ACTION; /* set up yytext again */ \ + } \ + while ( 0 ) + +#define unput(c) yyunput( c, (yytext_ptr) ) + +#ifndef YY_STRUCT_YY_BUFFER_STATE +#define YY_STRUCT_YY_BUFFER_STATE +struct yy_buffer_state + { + FILE *yy_input_file; + + char *yy_ch_buf; /* input buffer */ + char *yy_buf_pos; /* current position in input buffer */ + + /* Size of input buffer in bytes, not including room for EOB + * characters. + */ + yy_size_t yy_buf_size; + + /* Number of characters read into yy_ch_buf, not including EOB + * characters. + */ + yy_size_t yy_n_chars; + + /* Whether we "own" the buffer - i.e., we know we created it, + * and can realloc() it to grow it, and should free() it to + * delete it. + */ + int yy_is_our_buffer; + + /* Whether this is an "interactive" input source; if so, and + * if we're using stdio for input, then we want to use getc() + * instead of fread(), to make sure we stop fetching input after + * each newline. + */ + int yy_is_interactive; + + /* Whether we're considered to be at the beginning of a line. + * If so, '^' rules will be active on the next match, otherwise + * not. + */ + int yy_at_bol; + + int yy_bs_lineno; /**< The line count. */ + int yy_bs_column; /**< The column count. */ + + /* Whether to try to fill the input buffer when we reach the + * end of it. + */ + int yy_fill_buffer; + + int yy_buffer_status; + +#define YY_BUFFER_NEW 0 +#define YY_BUFFER_NORMAL 1 + /* When an EOF's been seen but there's still some text to process + * then we mark the buffer as YY_EOF_PENDING, to indicate that we + * shouldn't try reading from the input source any more. We might + * still have a bunch of tokens to match, though, because of + * possible backing-up. + * + * When we actually see the EOF, we change the status to "new" + * (via yyrestart()), so that the user can continue scanning by + * just pointing yyin at a new input file. + */ +#define YY_BUFFER_EOF_PENDING 2 + + }; +#endif /* !YY_STRUCT_YY_BUFFER_STATE */ + +/* Stack of input buffers. */ +static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ +static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ +static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ + +/* We provide macros for accessing buffer states in case in the + * future we want to put the buffer states in a more general + * "scanner state". + * + * Returns the top of the stack, or NULL. + */ +#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ + ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ + : NULL) + +/* Same as previous macro, but useful when we know that the buffer stack is not + * NULL or when we need an lvalue. For internal use only. + */ +#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] + +/* yy_hold_char holds the character lost when yytext is formed. */ +static char yy_hold_char; +static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */ +yy_size_t yyleng; + +/* Points to current character in buffer. */ +static char *yy_c_buf_p = (char *) 0; +static int yy_init = 0; /* whether we need to initialize */ +static int yy_start = 0; /* start state number */ + +/* Flag which is used to allow yywrap()'s to do buffer switches + * instead of setting up a fresh yyin. A bit of a hack ... + */ +static int yy_did_buffer_switch_on_eof; + +void yyrestart (FILE *input_file ); +void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ); +YY_BUFFER_STATE yy_create_buffer (FILE *file,int size ); +void yy_delete_buffer (YY_BUFFER_STATE b ); +void yy_flush_buffer (YY_BUFFER_STATE b ); +void yypush_buffer_state (YY_BUFFER_STATE new_buffer ); +void yypop_buffer_state (void ); + +static void yyensure_buffer_stack (void ); +static void yy_load_buffer_state (void ); +static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file ); + +#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER ) + +YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size ); +YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str ); +YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,yy_size_t len ); + +void *yyalloc (yy_size_t ); +void *yyrealloc (void *,yy_size_t ); +void yyfree (void * ); + +#define yy_new_buffer yy_create_buffer + +#define yy_set_interactive(is_interactive) \ + { \ + if ( ! YY_CURRENT_BUFFER ){ \ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer(yyin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ + } + +#define yy_set_bol(at_bol) \ + { \ + if ( ! YY_CURRENT_BUFFER ){\ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer(yyin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ + } + +#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) + +typedef unsigned char YY_CHAR; + +FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0; + +typedef int yy_state_type; + +extern int yylineno; + +int yylineno = 1; + +extern char *yytext; +#define yytext_ptr yytext + +static yy_state_type yy_get_previous_state (void ); +static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); +static int yy_get_next_buffer (void ); +static void yy_fatal_error (yyconst char msg[] ); + +/* Done after the current pattern has been matched and before the + * corresponding action - sets up yytext. + */ +#define YY_DO_BEFORE_ACTION \ + (yytext_ptr) = yy_bp; \ + yyleng = (size_t) (yy_cp - yy_bp); \ + (yy_hold_char) = *yy_cp; \ + *yy_cp = '\0'; \ + (yy_c_buf_p) = yy_cp; + +#define YY_NUM_RULES 25 +#define YY_END_OF_BUFFER 26 +/* This struct is not used in this scanner, + but its presence is necessary. */ +struct yy_trans_info + { + flex_int32_t yy_verify; + flex_int32_t yy_nxt; + }; +static yyconst flex_int16_t yy_accept[81] = + { 0, + 0, 0, 26, 25, 7, 8, 5, 25, 1, 2, + 11, 11, 6, 3, 4, 25, 25, 25, 25, 25, + 25, 25, 0, 9, 11, 0, 6, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, + 13, 0, 0, 0, 0, 16, 0, 0, 0, 0, + 0, 12, 15, 0, 23, 0, 0, 0, 0, 0, + 0, 14, 18, 0, 0, 0, 0, 0, 17, 0, + 24, 0, 0, 0, 20, 22, 0, 21, 19, 0 + } ; + +static yyconst flex_int32_t yy_ec[256] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 4, 1, 5, 1, 1, 1, 1, 1, 6, + 7, 1, 1, 1, 1, 1, 1, 8, 9, 9, + 9, 9, 9, 9, 9, 9, 9, 1, 10, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 11, 1, 12, 1, 1, 1, 13, 14, 15, 16, + + 17, 18, 19, 20, 21, 1, 1, 22, 1, 23, + 24, 25, 1, 26, 27, 28, 29, 30, 1, 31, + 32, 33, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1 + } ; + +static yyconst flex_int32_t yy_meta[34] = + { 0, + 1, 1, 2, 1, 1, 1, 1, 3, 3, 1, + 1, 1, 3, 3, 3, 3, 3, 3, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1 + } ; + +static yyconst flex_int16_t yy_base[84] = + { 0, + 0, 0, 100, 101, 101, 101, 101, 94, 101, 101, + 26, 28, 0, 101, 101, 82, 26, 18, 74, 79, + 78, 81, 88, 101, 32, 0, 0, 76, 65, 62, + 61, 75, 20, 59, 61, 66, 58, 0, 57, 56, + 54, 63, 53, 62, 54, 101, 59, 48, 53, 46, + 59, 101, 44, 43, 101, 41, 55, 46, 53, 44, + 31, 101, 101, 39, 27, 21, 39, 19, 101, 35, + 101, 33, 26, 29, 101, 101, 28, 101, 101, 101, + 58, 61, 41 + } ; + +static yyconst flex_int16_t yy_def[84] = + { 0, + 80, 1, 80, 80, 80, 80, 80, 81, 80, 80, + 80, 80, 82, 80, 80, 80, 80, 80, 80, 80, + 80, 80, 81, 80, 80, 83, 82, 80, 80, 80, + 80, 80, 80, 80, 80, 80, 80, 83, 80, 80, + 80, 80, 80, 80, 80, 80, 80, 80, 80, 80, + 80, 80, 80, 80, 80, 80, 80, 80, 80, 80, + 80, 80, 80, 80, 80, 80, 80, 80, 80, 80, + 80, 80, 80, 80, 80, 80, 80, 80, 80, 0, + 80, 80, 80 + } ; + +static yyconst flex_int16_t yy_nxt[135] = + { 0, + 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17, 18, 4, 4, 4, 4, 4, + 19, 4, 4, 4, 4, 20, 21, 4, 4, 22, + 4, 4, 4, 25, 25, 25, 25, 32, 29, 25, + 25, 33, 44, 38, 79, 78, 30, 77, 45, 76, + 75, 74, 73, 72, 71, 70, 26, 31, 23, 23, + 23, 27, 69, 27, 68, 67, 66, 65, 64, 63, + 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, + 52, 51, 50, 49, 48, 47, 46, 43, 42, 41, + 40, 39, 24, 37, 36, 35, 34, 28, 24, 80, + + 3, 80, 80, 80, 80, 80, 80, 80, 80, 80, + 80, 80, 80, 80, 80, 80, 80, 80, 80, 80, + 80, 80, 80, 80, 80, 80, 80, 80, 80, 80, + 80, 80, 80, 80 + } ; + +static yyconst flex_int16_t yy_chk[135] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 11, 11, 12, 12, 18, 17, 25, + 25, 18, 33, 83, 77, 74, 17, 73, 33, 72, + 70, 68, 67, 66, 65, 64, 11, 17, 81, 81, + 81, 82, 61, 82, 60, 59, 58, 57, 56, 54, + 53, 51, 50, 49, 48, 47, 45, 44, 43, 42, + 41, 40, 39, 37, 36, 35, 34, 32, 31, 30, + 29, 28, 23, 22, 21, 20, 19, 16, 8, 3, + + 80, 80, 80, 80, 80, 80, 80, 80, 80, 80, + 80, 80, 80, 80, 80, 80, 80, 80, 80, 80, + 80, 80, 80, 80, 80, 80, 80, 80, 80, 80, + 80, 80, 80, 80 + } ; + +static yy_state_type yy_last_accepting_state; +static char *yy_last_accepting_cpos; + +extern int yy_flex_debug; +int yy_flex_debug = 0; + +/* The intent behind this definition is that it'll catch + * any uses of REJECT which flex missed. + */ +#define REJECT reject_used_but_not_detected +#define yymore() yymore_used_but_not_detected +#define YY_MORE_ADJ 0 +#define YY_RESTORE_YY_MORE_OFFSET +char *yytext; +#line 1 "syslex.l" +#define YY_NO_INPUT 1 +#line 4 "syslex.l" +/* Copyright 2001, 2003, 2005, 2007, 2011 Free Software Foundation, Inc. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GLD; see the file COPYING. If not, write to the Free + Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA + 02110-1301, USA. */ + +#include "config.h" +#ifdef HAVE_STRING_H +#include +#else +#ifdef HAVE_STRINGS_H +#include +#endif +#endif +#include "sysinfo.h" + +#ifndef YY_NO_UNPUT +#define YY_NO_UNPUT +#endif + +#ifndef yywrap +static int yywrap (void) { return 1; } +#endif + +extern int yylex (void); +#line 541 "syslex.c" + +#define INITIAL 0 + +#ifndef YY_NO_UNISTD_H +/* Special case for "unistd.h", since it is non-ANSI. We include it way + * down here because we want the user's section 1 to have been scanned first. + * The user has a chance to override it with an option. + */ +#include +#endif + +#ifndef YY_EXTRA_TYPE +#define YY_EXTRA_TYPE void * +#endif + +static int yy_init_globals (void ); + +/* Accessor methods to globals. + These are made visible to non-reentrant scanners for convenience. */ + +int yylex_destroy (void ); + +int yyget_debug (void ); + +void yyset_debug (int debug_flag ); + +YY_EXTRA_TYPE yyget_extra (void ); + +void yyset_extra (YY_EXTRA_TYPE user_defined ); + +FILE *yyget_in (void ); + +void yyset_in (FILE * in_str ); + +FILE *yyget_out (void ); + +void yyset_out (FILE * out_str ); + +yy_size_t yyget_leng (void ); + +char *yyget_text (void ); + +int yyget_lineno (void ); + +void yyset_lineno (int line_number ); + +/* Macros after this point can all be overridden by user definitions in + * section 1. + */ + +#ifndef YY_SKIP_YYWRAP +#ifdef __cplusplus +extern "C" int yywrap (void ); +#else +extern int yywrap (void ); +#endif +#endif + +#ifndef yytext_ptr +static void yy_flex_strncpy (char *,yyconst char *,int ); +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * ); +#endif + +#ifndef YY_NO_INPUT + +#ifdef __cplusplus +static int yyinput (void ); +#else +static int input (void ); +#endif + +#endif + +/* Amount of stuff to slurp up with each read. */ +#ifndef YY_READ_BUF_SIZE +#define YY_READ_BUF_SIZE 8192 +#endif + +/* Copy whatever the last rule matched to the standard output. */ +#ifndef ECHO +/* This used to be an fputs(), but since the string might contain NUL's, + * we now use fwrite(). + */ +#define ECHO fwrite( yytext, yyleng, 1, yyout ) +#endif + +/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, + * is returned in "result". + */ +#ifndef YY_INPUT +#define YY_INPUT(buf,result,max_size) \ + if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ + { \ + int c = '*'; \ + yy_size_t n; \ + for ( n = 0; n < max_size && \ + (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ + buf[n] = (char) c; \ + if ( c == '\n' ) \ + buf[n++] = (char) c; \ + if ( c == EOF && ferror( yyin ) ) \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + result = n; \ + } \ + else \ + { \ + errno=0; \ + while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ + { \ + if( errno != EINTR) \ + { \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + break; \ + } \ + errno=0; \ + clearerr(yyin); \ + } \ + }\ +\ + +#endif + +/* No semi-colon after return; correct usage is to write "yyterminate();" - + * we don't want an extra ';' after the "return" because that will cause + * some compilers to complain about unreachable statements. + */ +#ifndef yyterminate +#define yyterminate() return YY_NULL +#endif + +/* Number of entries by which start-condition stack grows. */ +#ifndef YY_START_STACK_INCR +#define YY_START_STACK_INCR 25 +#endif + +/* Report a fatal error. */ +#ifndef YY_FATAL_ERROR +#define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) +#endif + +/* end tables serialization structures and prototypes */ + +/* Default declaration of generated scanner - a define so the user can + * easily add parameters. + */ +#ifndef YY_DECL +#define YY_DECL_IS_OURS 1 + +extern int yylex (void); + +#define YY_DECL int yylex (void) +#endif /* !YY_DECL */ + +/* Code executed at the beginning of each rule, after yytext and yyleng + * have been set up. + */ +#ifndef YY_USER_ACTION +#define YY_USER_ACTION +#endif + +/* Code executed at the end of each rule. */ +#ifndef YY_BREAK +#define YY_BREAK break; +#endif + +#define YY_RULE_SETUP \ + YY_USER_ACTION + +/** The main scanner function which does all the work. + */ +YY_DECL +{ + register yy_state_type yy_current_state; + register char *yy_cp, *yy_bp; + register int yy_act; + +#line 43 "syslex.l" + +#line 723 "syslex.c" + + if ( !(yy_init) ) + { + (yy_init) = 1; + +#ifdef YY_USER_INIT + YY_USER_INIT; +#endif + + if ( ! (yy_start) ) + (yy_start) = 1; /* first start state */ + + if ( ! yyin ) + yyin = stdin; + + if ( ! yyout ) + yyout = stdout; + + if ( ! YY_CURRENT_BUFFER ) { + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer(yyin,YY_BUF_SIZE ); + } + + yy_load_buffer_state( ); + } + + while ( 1 ) /* loops until end-of-file is reached */ + { + yy_cp = (yy_c_buf_p); + + /* Support of yytext. */ + *yy_cp = (yy_hold_char); + + /* yy_bp points to the position in yy_ch_buf of the start of + * the current run. + */ + yy_bp = yy_cp; + + yy_current_state = (yy_start); +yy_match: + do + { + register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)]; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 81 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + ++yy_cp; + } + while ( yy_base[yy_current_state] != 101 ); + +yy_find_action: + yy_act = yy_accept[yy_current_state]; + if ( yy_act == 0 ) + { /* have to back up */ + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + yy_act = yy_accept[yy_current_state]; + } + + YY_DO_BEFORE_ACTION; + +do_action: /* This label is used only to access EOF actions. */ + + switch ( yy_act ) + { /* beginning of action switch */ + case 0: /* must back up */ + /* undo the effects of YY_DO_BEFORE_ACTION */ + *yy_cp = (yy_hold_char); + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + goto yy_find_action; + +case 1: +YY_RULE_SETUP +#line 44 "syslex.l" +{ return '(';} + YY_BREAK +case 2: +YY_RULE_SETUP +#line 45 "syslex.l" +{ return ')';} + YY_BREAK +case 3: +YY_RULE_SETUP +#line 46 "syslex.l" +{ return '[';} + YY_BREAK +case 4: +YY_RULE_SETUP +#line 47 "syslex.l" +{ return ']';} + YY_BREAK +case 5: +YY_RULE_SETUP +#line 48 "syslex.l" +{ ; } + YY_BREAK +case 6: +YY_RULE_SETUP +#line 49 "syslex.l" +{ ; } + YY_BREAK +case 7: +YY_RULE_SETUP +#line 50 "syslex.l" +{ ; } + YY_BREAK +case 8: +/* rule 8 can match eol */ +YY_RULE_SETUP +#line 51 "syslex.l" +{ ; } + YY_BREAK +case 9: +/* rule 9 can match eol */ +YY_RULE_SETUP +#line 52 "syslex.l" +{ + yylval.s = malloc (yyleng - 1); + memcpy (yylval.s, yytext + 1, yyleng - 2); + yylval.s[yyleng - 2] = '\0'; + return NAME; + } + YY_BREAK +case 10: +YY_RULE_SETUP +#line 59 "syslex.l" +{ + yylval.i = strtol(yytext,0,16); + return NUMBER; + } + YY_BREAK +case 11: +YY_RULE_SETUP +#line 64 "syslex.l" +{ + yylval.i = atoi(yytext); + return NUMBER; + } + YY_BREAK +case 12: +YY_RULE_SETUP +#line 70 "syslex.l" +{ yylval.i =1 ;return UNIT;} + YY_BREAK +case 13: +YY_RULE_SETUP +#line 71 "syslex.l" +{ yylval.i = 1; return UNIT;} + YY_BREAK +case 14: +YY_RULE_SETUP +#line 72 "syslex.l" +{ yylval.i= 8; return UNIT;} + YY_BREAK +case 15: +YY_RULE_SETUP +#line 73 "syslex.l" +{ yylval.i = 8; return UNIT;} + YY_BREAK +case 16: +YY_RULE_SETUP +#line 75 "syslex.l" +{ yylval.s = "INT"; return TYPE;} + YY_BREAK +case 17: +YY_RULE_SETUP +#line 76 "syslex.l" +{ yylval.s = "BARRAY"; return TYPE;} + YY_BREAK +case 18: +YY_RULE_SETUP +#line 77 "syslex.l" +{ yylval.s = "CHARS"; return TYPE;} + YY_BREAK +case 19: +YY_RULE_SETUP +#line 78 "syslex.l" +{ yylval.i = 0; return NUMBER;} + YY_BREAK +case 20: +YY_RULE_SETUP +#line 79 "syslex.l" +{ yylval.i = -4; return NUMBER;} + YY_BREAK +case 21: +YY_RULE_SETUP +#line 80 "syslex.l" +{ yylval.i = -2; return NUMBER; } + YY_BREAK +case 22: +YY_RULE_SETUP +#line 81 "syslex.l" +{ yylval.i = -1; return NUMBER; } + YY_BREAK +case 23: +YY_RULE_SETUP +#line 82 "syslex.l" +{ return COND;} + YY_BREAK +case 24: +YY_RULE_SETUP +#line 83 "syslex.l" +{ return REPEAT;} + YY_BREAK +case 25: +YY_RULE_SETUP +#line 84 "syslex.l" +ECHO; + YY_BREAK +#line 944 "syslex.c" +case YY_STATE_EOF(INITIAL): + yyterminate(); + + case YY_END_OF_BUFFER: + { + /* Amount of text matched not including the EOB char. */ + int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; + + /* Undo the effects of YY_DO_BEFORE_ACTION. */ + *yy_cp = (yy_hold_char); + YY_RESTORE_YY_MORE_OFFSET + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) + { + /* We're scanning a new file or input source. It's + * possible that this happened because the user + * just pointed yyin at a new source and called + * yylex(). If so, then we have to assure + * consistency between YY_CURRENT_BUFFER and our + * globals. Here is the right place to do so, because + * this is the first action (other than possibly a + * back-up) that will match for the new input source. + */ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; + } + + /* Note that here we test for yy_c_buf_p "<=" to the position + * of the first EOB in the buffer, since yy_c_buf_p will + * already have been incremented past the NUL character + * (since all states make transitions on EOB to the + * end-of-buffer state). Contrast this with the test + * in input(). + */ + if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + { /* This was really a NUL. */ + yy_state_type yy_next_state; + + (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + /* Okay, we're now positioned to make the NUL + * transition. We couldn't have + * yy_get_previous_state() go ahead and do it + * for us because it doesn't know how to deal + * with the possibility of jamming (and we don't + * want to build jamming into it because then it + * will run more slowly). + */ + + yy_next_state = yy_try_NUL_trans( yy_current_state ); + + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + + if ( yy_next_state ) + { + /* Consume the NUL. */ + yy_cp = ++(yy_c_buf_p); + yy_current_state = yy_next_state; + goto yy_match; + } + + else + { + yy_cp = (yy_c_buf_p); + goto yy_find_action; + } + } + + else switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_END_OF_FILE: + { + (yy_did_buffer_switch_on_eof) = 0; + + if ( yywrap( ) ) + { + /* Note: because we've taken care in + * yy_get_next_buffer() to have set up + * yytext, we can now set up + * yy_c_buf_p so that if some total + * hoser (like flex itself) wants to + * call the scanner after we return the + * YY_NULL, it'll still work - another + * YY_NULL will get returned. + */ + (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; + + yy_act = YY_STATE_EOF(YY_START); + goto do_action; + } + + else + { + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; + } + break; + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = + (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_match; + + case EOB_ACT_LAST_MATCH: + (yy_c_buf_p) = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_find_action; + } + break; + } + + default: + YY_FATAL_ERROR( + "fatal flex scanner internal error--no action found" ); + } /* end of action switch */ + } /* end of scanning one token */ +} /* end of yylex */ + +/* yy_get_next_buffer - try to read in a new buffer + * + * Returns a code representing an action: + * EOB_ACT_LAST_MATCH - + * EOB_ACT_CONTINUE_SCAN - continue scanning from current position + * EOB_ACT_END_OF_FILE - end of file + */ +static int yy_get_next_buffer (void) +{ + register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; + register char *source = (yytext_ptr); + register int number_to_move, i; + int ret_val; + + if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) + YY_FATAL_ERROR( + "fatal flex scanner internal error--end of buffer missed" ); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) + { /* Don't try to fill the buffer, so this is an EOF. */ + if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) + { + /* We matched a single character, the EOB, so + * treat this as a final EOF. + */ + return EOB_ACT_END_OF_FILE; + } + + else + { + /* We matched some text prior to the EOB, first + * process it. + */ + return EOB_ACT_LAST_MATCH; + } + } + + /* Try to read more data. */ + + /* First move last chars to start of buffer. */ + number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; + + for ( i = 0; i < number_to_move; ++i ) + *(dest++) = *(source++); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) + /* don't do the read, it's not guaranteed to return an EOF, + * just force an EOF + */ + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; + + else + { + yy_size_t num_to_read = + YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; + + while ( num_to_read <= 0 ) + { /* Not enough room in the buffer - grow it. */ + + /* just a shorter name for the current buffer */ + YY_BUFFER_STATE b = YY_CURRENT_BUFFER; + + int yy_c_buf_p_offset = + (int) ((yy_c_buf_p) - b->yy_ch_buf); + + if ( b->yy_is_our_buffer ) + { + yy_size_t new_size = b->yy_buf_size * 2; + + if ( new_size <= 0 ) + b->yy_buf_size += b->yy_buf_size / 8; + else + b->yy_buf_size *= 2; + + b->yy_ch_buf = (char *) + /* Include room in for 2 EOB chars. */ + yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); + } + else + /* Can't grow it, we don't own it. */ + b->yy_ch_buf = 0; + + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( + "fatal error - scanner input buffer overflow" ); + + (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; + + num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - + number_to_move - 1; + + } + + if ( num_to_read > YY_READ_BUF_SIZE ) + num_to_read = YY_READ_BUF_SIZE; + + /* Read in more data. */ + YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), + (yy_n_chars), num_to_read ); + + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + if ( (yy_n_chars) == 0 ) + { + if ( number_to_move == YY_MORE_ADJ ) + { + ret_val = EOB_ACT_END_OF_FILE; + yyrestart(yyin ); + } + + else + { + ret_val = EOB_ACT_LAST_MATCH; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = + YY_BUFFER_EOF_PENDING; + } + } + + else + ret_val = EOB_ACT_CONTINUE_SCAN; + + if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { + /* Extend the array by 50%, plus the number we really need. */ + yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); + if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); + } + + (yy_n_chars) += number_to_move; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; + + (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; + + return ret_val; +} + +/* yy_get_previous_state - get the state just before the EOB char was reached */ + + static yy_state_type yy_get_previous_state (void) +{ + register yy_state_type yy_current_state; + register char *yy_cp; + + yy_current_state = (yy_start); + + for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) + { + register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1); + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 81 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + } + + return yy_current_state; +} + +/* yy_try_NUL_trans - try to make a transition on the NUL character + * + * synopsis + * next_state = yy_try_NUL_trans( current_state ); + */ + static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) +{ + register int yy_is_jam; + register char *yy_cp = (yy_c_buf_p); + + register YY_CHAR yy_c = 1; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 81 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + yy_is_jam = (yy_current_state == 80); + + return yy_is_jam ? 0 : yy_current_state; +} + +#ifndef YY_NO_INPUT +#ifdef __cplusplus + static int yyinput (void) +#else + static int input (void) +#endif + +{ + int c; + + *(yy_c_buf_p) = (yy_hold_char); + + if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) + { + /* yy_c_buf_p now points to the character we want to return. + * If this occurs *before* the EOB characters, then it's a + * valid NUL; if not, then we've hit the end of the buffer. + */ + if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + /* This was really a NUL. */ + *(yy_c_buf_p) = '\0'; + + else + { /* need more input */ + yy_size_t offset = (yy_c_buf_p) - (yytext_ptr); + ++(yy_c_buf_p); + + switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_LAST_MATCH: + /* This happens because yy_g_n_b() + * sees that we've accumulated a + * token and flags that we need to + * try matching the token before + * proceeding. But for input(), + * there's no matching to consider. + * So convert the EOB_ACT_LAST_MATCH + * to EOB_ACT_END_OF_FILE. + */ + + /* Reset buffer status. */ + yyrestart(yyin ); + + /*FALLTHROUGH*/ + + case EOB_ACT_END_OF_FILE: + { + if ( yywrap( ) ) + return 0; + + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; +#ifdef __cplusplus + return yyinput(); +#else + return input(); +#endif + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = (yytext_ptr) + offset; + break; + } + } + } + + c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ + *(yy_c_buf_p) = '\0'; /* preserve yytext */ + (yy_hold_char) = *++(yy_c_buf_p); + + return c; +} +#endif /* ifndef YY_NO_INPUT */ + +/** Immediately switch to a different input stream. + * @param input_file A readable stream. + * + * @note This function does not reset the start condition to @c INITIAL . + */ + void yyrestart (FILE * input_file ) +{ + + if ( ! YY_CURRENT_BUFFER ){ + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer(yyin,YY_BUF_SIZE ); + } + + yy_init_buffer(YY_CURRENT_BUFFER,input_file ); + yy_load_buffer_state( ); +} + +/** Switch to a different input buffer. + * @param new_buffer The new input buffer. + * + */ + void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ) +{ + + /* TODO. We should be able to replace this entire function body + * with + * yypop_buffer_state(); + * yypush_buffer_state(new_buffer); + */ + yyensure_buffer_stack (); + if ( YY_CURRENT_BUFFER == new_buffer ) + return; + + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + YY_CURRENT_BUFFER_LVALUE = new_buffer; + yy_load_buffer_state( ); + + /* We don't actually know whether we did this switch during + * EOF (yywrap()) processing, but the only time this flag + * is looked at is after yywrap() is called, so it's safe + * to go ahead and always set it. + */ + (yy_did_buffer_switch_on_eof) = 1; +} + +static void yy_load_buffer_state (void) +{ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; + yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; + (yy_hold_char) = *(yy_c_buf_p); +} + +/** Allocate and initialize an input buffer state. + * @param file A readable stream. + * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. + * + * @return the allocated buffer state. + */ + YY_BUFFER_STATE yy_create_buffer (FILE * file, int size ) +{ + YY_BUFFER_STATE b; + + b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_buf_size = size; + + /* yy_ch_buf has to be 2 characters longer than the size given because + * we need to put in 2 end-of-buffer characters. + */ + b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 ); + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_is_our_buffer = 1; + + yy_init_buffer(b,file ); + + return b; +} + +/** Destroy the buffer. + * @param b a buffer created with yy_create_buffer() + * + */ + void yy_delete_buffer (YY_BUFFER_STATE b ) +{ + + if ( ! b ) + return; + + if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ + YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; + + if ( b->yy_is_our_buffer ) + yyfree((void *) b->yy_ch_buf ); + + yyfree((void *) b ); +} + +#ifndef __cplusplus +extern int isatty (int ); +#endif /* __cplusplus */ + +/* Initializes or reinitializes a buffer. + * This function is sometimes called more than once on the same buffer, + * such as during a yyrestart() or at EOF. + */ + static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file ) + +{ + int oerrno = errno; + + yy_flush_buffer(b ); + + b->yy_input_file = file; + b->yy_fill_buffer = 1; + + /* If b is the current buffer, then yy_init_buffer was _probably_ + * called from yyrestart() or through yy_get_next_buffer. + * In that case, we don't want to reset the lineno or column. + */ + if (b != YY_CURRENT_BUFFER){ + b->yy_bs_lineno = 1; + b->yy_bs_column = 0; + } + + b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0; + + errno = oerrno; +} + +/** Discard all buffered characters. On the next scan, YY_INPUT will be called. + * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. + * + */ + void yy_flush_buffer (YY_BUFFER_STATE b ) +{ + if ( ! b ) + return; + + b->yy_n_chars = 0; + + /* We always need two end-of-buffer characters. The first causes + * a transition to the end-of-buffer state. The second causes + * a jam in that state. + */ + b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; + b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; + + b->yy_buf_pos = &b->yy_ch_buf[0]; + + b->yy_at_bol = 1; + b->yy_buffer_status = YY_BUFFER_NEW; + + if ( b == YY_CURRENT_BUFFER ) + yy_load_buffer_state( ); +} + +/** Pushes the new state onto the stack. The new state becomes + * the current state. This function will allocate the stack + * if necessary. + * @param new_buffer The new state. + * + */ +void yypush_buffer_state (YY_BUFFER_STATE new_buffer ) +{ + if (new_buffer == NULL) + return; + + yyensure_buffer_stack(); + + /* This block is copied from yy_switch_to_buffer. */ + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + /* Only push if top exists. Otherwise, replace top. */ + if (YY_CURRENT_BUFFER) + (yy_buffer_stack_top)++; + YY_CURRENT_BUFFER_LVALUE = new_buffer; + + /* copied from yy_switch_to_buffer. */ + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; +} + +/** Removes and deletes the top of the stack, if present. + * The next element becomes the new top. + * + */ +void yypop_buffer_state (void) +{ + if (!YY_CURRENT_BUFFER) + return; + + yy_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + if ((yy_buffer_stack_top) > 0) + --(yy_buffer_stack_top); + + if (YY_CURRENT_BUFFER) { + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; + } +} + +/* Allocates the stack if it does not exist. + * Guarantees space for at least one push. + */ +static void yyensure_buffer_stack (void) +{ + yy_size_t num_to_alloc; + + if (!(yy_buffer_stack)) { + + /* First allocation is just for 2 elements, since we don't know if this + * scanner will even need a stack. We use 2 instead of 1 to avoid an + * immediate realloc on the next call. + */ + num_to_alloc = 1; + (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc + (num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); + + memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); + + (yy_buffer_stack_max) = num_to_alloc; + (yy_buffer_stack_top) = 0; + return; + } + + if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ + + /* Increase the buffer to prepare for a possible push. */ + int grow_size = 8 /* arbitrary grow size */; + + num_to_alloc = (yy_buffer_stack_max) + grow_size; + (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc + ((yy_buffer_stack), + num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); + + /* zero only the new slots.*/ + memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); + (yy_buffer_stack_max) = num_to_alloc; + } +} + +/** Setup the input buffer state to scan directly from a user-specified character buffer. + * @param base the character buffer + * @param size the size in bytes of the character buffer + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size ) +{ + YY_BUFFER_STATE b; + + if ( size < 2 || + base[size-2] != YY_END_OF_BUFFER_CHAR || + base[size-1] != YY_END_OF_BUFFER_CHAR ) + /* They forgot to leave room for the EOB's. */ + return 0; + + b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); + + b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ + b->yy_buf_pos = b->yy_ch_buf = base; + b->yy_is_our_buffer = 0; + b->yy_input_file = 0; + b->yy_n_chars = b->yy_buf_size; + b->yy_is_interactive = 0; + b->yy_at_bol = 1; + b->yy_fill_buffer = 0; + b->yy_buffer_status = YY_BUFFER_NEW; + + yy_switch_to_buffer(b ); + + return b; +} + +/** Setup the input buffer state to scan a string. The next call to yylex() will + * scan from a @e copy of @a str. + * @param yystr a NUL-terminated string to scan + * + * @return the newly allocated buffer state object. + * @note If you want to scan bytes that may contain NUL values, then use + * yy_scan_bytes() instead. + */ +YY_BUFFER_STATE yy_scan_string (yyconst char * yystr ) +{ + + return yy_scan_bytes(yystr,strlen(yystr) ); +} + +/** Setup the input buffer state to scan the given bytes. The next call to yylex() will + * scan from a @e copy of @a bytes. + * @param bytes the byte buffer to scan + * @param len the number of bytes in the buffer pointed to by @a bytes. + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len ) +{ + YY_BUFFER_STATE b; + char *buf; + yy_size_t n, i; + + /* Get memory for full buffer, including space for trailing EOB's. */ + n = _yybytes_len + 2; + buf = (char *) yyalloc(n ); + if ( ! buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); + + for ( i = 0; i < _yybytes_len; ++i ) + buf[i] = yybytes[i]; + + buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; + + b = yy_scan_buffer(buf,n ); + if ( ! b ) + YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); + + /* It's okay to grow etc. this buffer, and we should throw it + * away when we're done. + */ + b->yy_is_our_buffer = 1; + + return b; +} + +#ifndef YY_EXIT_FAILURE +#define YY_EXIT_FAILURE 2 +#endif + +static void yy_fatal_error (yyconst char* msg ) +{ + (void) fprintf( stderr, "%s\n", msg ); + exit( YY_EXIT_FAILURE ); +} + +/* Redefine yyless() so it works in section 3 code. */ + +#undef yyless +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + yytext[yyleng] = (yy_hold_char); \ + (yy_c_buf_p) = yytext + yyless_macro_arg; \ + (yy_hold_char) = *(yy_c_buf_p); \ + *(yy_c_buf_p) = '\0'; \ + yyleng = yyless_macro_arg; \ + } \ + while ( 0 ) + +/* Accessor methods (get/set functions) to struct members. */ + +/** Get the current line number. + * + */ +int yyget_lineno (void) +{ + + return yylineno; +} + +/** Get the input stream. + * + */ +FILE *yyget_in (void) +{ + return yyin; +} + +/** Get the output stream. + * + */ +FILE *yyget_out (void) +{ + return yyout; +} + +/** Get the length of the current token. + * + */ +yy_size_t yyget_leng (void) +{ + return yyleng; +} + +/** Get the current token. + * + */ + +char *yyget_text (void) +{ + return yytext; +} + +/** Set the current line number. + * @param line_number + * + */ +void yyset_lineno (int line_number ) +{ + + yylineno = line_number; +} + +/** Set the input stream. This does not discard the current + * input buffer. + * @param in_str A readable stream. + * + * @see yy_switch_to_buffer + */ +void yyset_in (FILE * in_str ) +{ + yyin = in_str ; +} + +void yyset_out (FILE * out_str ) +{ + yyout = out_str ; +} + +int yyget_debug (void) +{ + return yy_flex_debug; +} + +void yyset_debug (int bdebug ) +{ + yy_flex_debug = bdebug ; +} + +static int yy_init_globals (void) +{ + /* Initialization is the same as for the non-reentrant scanner. + * This function is called from yylex_destroy(), so don't allocate here. + */ + + (yy_buffer_stack) = 0; + (yy_buffer_stack_top) = 0; + (yy_buffer_stack_max) = 0; + (yy_c_buf_p) = (char *) 0; + (yy_init) = 0; + (yy_start) = 0; + +/* Defined in main.c */ +#ifdef YY_STDINIT + yyin = stdin; + yyout = stdout; +#else + yyin = (FILE *) 0; + yyout = (FILE *) 0; +#endif + + /* For future reference: Set errno on error, since we are called by + * yylex_init() + */ + return 0; +} + +/* yylex_destroy is for both reentrant and non-reentrant scanners. */ +int yylex_destroy (void) +{ + + /* Pop the buffer stack, destroying each element. */ + while(YY_CURRENT_BUFFER){ + yy_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + yypop_buffer_state(); + } + + /* Destroy the stack itself. */ + yyfree((yy_buffer_stack) ); + (yy_buffer_stack) = NULL; + + /* Reset the globals. This is important in a non-reentrant scanner so the next time + * yylex() is called, initialization will occur. */ + yy_init_globals( ); + + return 0; +} + +/* + * Internal utility routines. + */ + +#ifndef yytext_ptr +static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) +{ + register int i; + for ( i = 0; i < n; ++i ) + s1[i] = s2[i]; +} +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * s ) +{ + register int n; + for ( n = 0; s[n]; ++n ) + ; + + return n; +} +#endif + +void *yyalloc (yy_size_t size ) +{ + return (void *) malloc( size ); +} + +void *yyrealloc (void * ptr, yy_size_t size ) +{ + /* The cast to (char *) in the following accommodates both + * implementations that use char* generic pointers, and those + * that use void* generic pointers. It works with the latter + * because both ANSI C and C++ allow castless assignment from + * any pointer type to void*, and deal with argument conversions + * as though doing an assignment. + */ + return (void *) realloc( (char *) ptr, size ); +} + +void yyfree (void * ptr ) +{ + free( (char *) ptr ); /* see yyrealloc() for (char *) cast */ +} + +#define YYTABLES_NAME "yytables" + +#line 84 "syslex.l" diff --git a/binutils/testsuite/ChangeLog b/binutils/testsuite/ChangeLog index fb9ad82..dd93b48 100644 --- a/binutils/testsuite/ChangeLog +++ b/binutils/testsuite/ChangeLog @@ -1,3 +1,66 @@ +2011-09-28 Matthew Gretton-Dann + + Apply from mainline. + 2011-09-28 Matthew Gretton-Dann + * binutils-all/elfedit-4.d: Give test a unique name. + +2011-09-15 H.J. Lu + + PR binutils/13180 + * binutils-all/group-6.d: New. + * binutils-all/group-6.s: Likewise. + + * binutils-all/objcopy.exp: Run group-6 for ELF targrts. + +2011-07-22 H.J. Lu + + * binutils-all/elfedit.exp: Run elfedit-4. + + * binutils-all/elfedit-4.d: New. + +2011-06-30 Bernd Schmidt + + * binutils-all/objcopy.exp (strip_test, strip_executable): + On ELF targets, test that OS/ABI is preserved. + (copy_setup): Do test on tic6x-*-uclinux. + +2011-06-19 H.J. Lu + + * binutils-all/elfedit-1.d: Updated for x32. + +2011-05-18 Nick Clifton + + PR binutils/12753 + * lib/utils-lib.exp (run_dump_test): Allow nm as a program. + * binutils-all/nm.exp: Test running "nm -g" on an object file + containing a unique symbol. + +2011-05-13 Alan Modra + + * binutils-all/objcopy.exp objcopy_text): Remove xfails for sh-rtems + and tic4x. + +2011-05-02 H.J. Lu + + PR binutils/12720 + * binutils-all/ar.exp (delete_an_element): New. + (move_an_element): Likewise. + Run delete_an_element and move_an_element. + +2011-04-30 H.J. Lu + + * binutils-all/x86-64/compressed-1a.d: Adjust for change in output + format. + +2011-04-29 Hans-Peter Nilsson + + * binutils-all/i386/compressed-1a.d: Adjust for change in output + format. + +2011-04-28 Tom Tromey + + * binutils-all/objdump.W: Correct output. + 011-04-11 Kai Tietz * binutils-all/windres/windres.exp: Add '// cpparg

_qUY+_Xq>aq@mHez`~!5JzoK+v zXn#}E^*gaK?PcgXe}T^9FdBEM=c1nz(Dmt$j&m(K|9R+oZb!#GgyyO8@`$f1R--*0 z9siDWeIYuJE$HvgztM5)JsXEgw|Qz73o~ZEbSR+|4*X% z{s@ixxRtSfZP0#3pySU%^Z7D1!mrVMR9qGLX@u7C2y{LVq2s@TzW+124%Ju3`<>7{ zPez}ggT}cWTjK%ryL!T!i2ID>Rp|JSpy$^%wC)SO5a(i3^u3GFap$6WdIufvcl5k1 z^J3(!I=Vg`(Dk_hvp5TlcL};r-cHxQOy<25>ro56-xA#q{n7p=pyS_-uGF^fCU@eiTvTW)QvS0l7N3|+5l(Eau>TK^ldC4P>sSA|#Nd)g7r zOP}O*=y|ggt>f)zT;HPWQTo*wzcHGZ{^;{pp#46C&T}I={&(m(TjsSm|LUOowFP#; zv(fsPkH)bRt-r$SVttyS^>!Y5uHTHV^Ihn38_@mr3%VbxydLlMNBg@5&Brt7`L+c+ z;9uAcTfGtUnTqE55wy-eK);_Q*GCN4I!p>a37@f~^=z1JPzrz(bN8anB z{dPv<9*9}IBzY&A-{;YF`53L+BWQhAcr)Isi_W(@djC>%yxUTHB^vj;Xr2$E`8@uu zsG|YsJjS5waTjLsd34+l(7OH;UB`-V$8){V^Y0>b9@n7b--hOKF&gI^==yw!*259B z9_zjn{SU+}?JLlHKZt&hU%_g)1>L7VqIG}NmdIa?WGi%>zGxi|PuItzbut|t{|)pU z*^lP+Z!Ce?cO%}D(f!a1oyU3Tcvqt9b_ZH7kE8S3gT{3jeXi1b5qBf>ob8C_?JRU( zT#4p$33|S5L)YUUw7)uAW4>L{^%{jfKNIa|X}bR|W@-O~)>r9m5nn$vo{{MIH=^Ur zL*siBU9a7#{d2O&_IST4ny;o<3@4%ayf!%#t&@AvbMjSmUO%DhR_*xkCfIJE!SXnm|g=d&AK-y`UFrFX=7c1Gj72t7|OL-Vvaxe=|) zuh9G+Li2L;hjH%KL&xiq9G9-&i{|TDbR9M%zd`3!?4#(fIU3IZH2&%6@1w`ixL!zZ zNY}TaaeRf=cV=hQVJY-_GxYubXuXX@=W`X>|AT1VzKGVvZghR~K8|@cK+l1mXxx{h zd6|pG{Wewj?@Bb!kD&W*IhwBz()}OMbEC|sk^fWBxF(?WFbBQA z4t?(sIl|KhXD&*%k3LK=(;+bi83`+_#|PEkWbiiq8Lc z^n9tXJIbQ0JbZ-a$4ht z?+f(zTj8%_-p$eX&&B3=6Iyp`(SE*1&$-;MSjn%YldE7~uh`~Md-uesku{!T*Ip*tGKdFb!38!(G=(f3|P z^SK3m{(CgOLf^*x8ld-wq3bdgt&aziYteb_LFfN3x}WQP7xqHuKL(9&Hkz;1Xk722 zdHxBrSY>~V*8!dHFtom|LG!f?U5A~?f6@4A9f;?;VH?_4py%;QG`^qFxJ!K>d2NEm z+Xs!~YBWFd(D7EG_4_RvccmYqKDwggUxJEqoE(DI;q_=;K9k&u##!KC#8oqS2HMXp$rsV}+n?^2{W<#YhMqU$&^#J&HFU8zgICokLbRt^jlo- zfX;6W`g`LZbU$rP*Z)J`Kk-ofP922i?*VjvucFU?ldSlA70t`5=>GaLc^I>_%l{Mg)EwP6L(n{5g5_~GmcxbUK3Id+@lJF< z|Ag+xqKBhh2hD5e)E#663Z-&!d6p_3`LFcmT8b8d~>z(D-uy z4XY;Gpy$???dxn zHYYcKeHx+T4#P6|Ai5sUp!0Y?c^G}~gaWzw-^H%z^Jk!WAA{!idd%W{JQ`n5?GLaG z?cdP4Y?vGGormV>^3;9=?PnFbE+3+G^&7fgC*;NR9npM`M(^K%=5=LiZ$sCqK*6vg z`hI;p3cI888JMn5Ozm4!`zbVE>(Sq72h;Wc(D9Bfl$(D}or>O{jMm8wXx%MEze^j? z{Om{`K=(_5!g0N8a%gfAI`5gO{Uo}+uc7sD7+wFWMZ!MGYm?6;KSTFzv7(XhHt2pF zo7xYe>-!dZUi_M@TrBe24ZS`Nt;c)O{4Pf4^9FkEeUk1ULGx9zcy9jwZG%2H0o}JZ zqvy<{n8mlzJRLye$~h|94U*l^x)_Sq?+xg@SE1|n6`GF%C8GaYXg#(^zaRavGG2*3 zcON?67n5HmOO%ZHwLt5o2U`Es8A{zFMODYbg5sW#~9_(DPy$w!`nxerlJE`E^3a zKQDP1T0gT>dmeh8uR!PVF_yr?=zb|yF2<{b?x!Yb+{4iGWENTn52x$zpz-{Uo-Yl{ zhvU%odJ=v9YjhpURfxLkik_2Wu{o|r>*@zQ6N^`jd5l2EzY4qI+uY_ zZX40}zCrsdcwDSQ9rXGsXkJI6`J007w;AX-tFR<~ipKFBT9@T2NBs5B^=yxxn}e`8 zo{!G|;?%wYi_*RweeMA?509hcY(&>{Kf2x(jt^_1?=?o_Yn$4Al4qjh4M+Fmcr@Mx z>H2f%du!40-b44ZJj?4x`ZbreZO?7kz&|=EsHB!F%YrvNyF0XQTg0Xg_t(-zA;U{0%|pISO6BDQLep zq3gN;v-lcXcYDyfEL|<)JrzBV$D{o}gvPNFjdwFTug}pqGu30PCL*qj@+Ry?--$e;J;Po6-ILJ6ccGPKi;k!U?kMdxz|I?h{Yp8iJncg>d3 zUu*Pt$`00$U|ey((a9p zHy(@Pz392~C?18+Vi9}^-T&*+bt}>)JP|$LPDATwBKrOU^u1;1y1sz!lb_J&h2^Imd48egGKu}^EE@$^R5^AfZU7hoq`o!Wn*{gmh&_v@n1w@2%D0vgv0bpJnr zes8v-`*Sy1Z-1ioT(V0%-vZrFgVFh1jjrPYERCy@o6!2(iRR%ubiCqSqdw}P@ApH` zjmy&YRoIR8r|5cSyG6eHp#4lozjuq#dRULH!w=XIi+7Lxb{aa~sMNk0t(*DixSP@a z|3k9KDba5Y^m@nC9-7)$V3zB5qvNhb*JW4o2)Z9C_lW&?J{s>8Xnb?gyuN_ue>?hJ z{4U+k?HS`%OSVPt4@TE#BD#+sMAu^zdVc(bu4|oMvED<__okrZ%t6=ZiFEyC^t}($ z{gS7~xF;k#q3@lYycDhX*=U`;fv(F=G@gQ|#doJMdJdh7?*A$1{-2AUi*KX9YYwCF zmg*gLMDsWi&C?xd{7aK>qT_slJ+V}uXb(Z-xf#v-L+Chr&^XHUjeOTd^Vb>u&R&Fm zKOaHYXFJ;euV`Mg{i2R~qIEe7-EVK9{d}J+*FWl@Eq3SnDC~&OqH+9)&ObXK+WpY+ zZ$R_88h!73bU!s27UPpgd{DRhbwIT64 zw;B5UwV1`n(er2%`rgOr_p|6(F-}vo?$1K!JqfMj+p#FFK*xCnjpuuGUWJFo^^?## zK0CFqM(6i*@;!83zo5@$&yM&ypyQ23f4|*`-d~2+<$J094;pW!b7I_XXq}D4A~+A7 z?_zWv-b3r{0Qz02dTxA22cdDFpPYg2w`bAwX)`+R9`u|mF)aFRfv(RmbY8ch@jQbq za3{J?N}U(aHAedzipF&*+V8_?9^OLd`v*FHjq~HZcIbW{g}%2WUH>4p4<~C5k9nMi z&TkSL#}jD(yU{$BxFGg%eY76OqUYZNH2zP~dMG#|{cb|{*TtB{`Dh+r$I^HR&2OQR z@qMg;?xR*{fBn$9xf*?MesTx8Pl}9+@9c5t{OX~38;IuhGBhu9(R^)6*MCLpx8mry zUKg{p&p_+vax9N`qx<_Q^!d%nPtf{4fYwd!g^~AWXg&8$?TgTLn~wG~4?SmJM(bu9 zI?vzHyj2?$_XnWyjz;^x2i@nJuo~uEl)kTMydBYg&PLa5M!NnQ`ut~TzK)>rl^z>; zs)xqW2am!_(cdl8(7fG=zW)mP-fnc?{*C6j?zlLYPs1$jYtZZS&~;sx{2Z;zzf-&1 z#nFEwbo_JB^ZiCFi7U`~y^-97C20SR##3Z`^migUPFJ*U&QI5`K-d2+G_R|%Fn)tR z{}cLq=BNpgm-^_sbU^ET5L%y;(Roit&&fy8dfbHh>yOSW_mX(-cr@;osXYjNZUWlh z4783OKXILXQAi!7<9aA zQ+rNw5xP!m&^rG#c@V9WLX)GvW6}1>XdXJD{q3f~>&Hq2>dQ_Sc`EGz&+Jn%1PeJQp4%+WLY>unYIKRg%7QQUb zsXFL9&&AewDY_q*VHV#-=k+5xufmtdILD#=H$&ssBEvg{{fv(&Xo~&OU&P==>EGD9cK|b{_E-fXXrl2xhmp4 z2F*tc^!fmF{4wZxaVr|fYIOYf(e*xr)@PBcqwX4_arHyv7=f-d7?B((o&seM;+LAw52^7Z8V>He4KdG<@X zUf|jouPoYMt<-Lw?2$Yx-5;0Q*CyvA7ohoAf%d-{?QduDTXbH3rTfLNi}@Xg&g*3K z`F5$@C$-N>jz{w`HMQ?T$6JKvdktEb?X|^1gKaMQpF9ei(Rn_F?ze5&7XL%@(DtUt*LXC4k76f$2i+efZjSxa1nqw)I_{GU~UpG9B z_RV-Eet@1=^&iO1|KA%MjDBz4#8!AD+2Xkyw0gtm8yHkM?|Yyqt$} zGsCeX-oU&Tq4_*vUi^+~fm3Nu!2b9XUWlC@$<17aPh&@{^=Molg=f*;iUaY)`LWK| z;VHBiB)>zyLyZMm@Opgz z@u;(bi{reQf>(2WCc3T#pNP6X4&5i6(fv6Dt-tHA7e0fd@ek~c!=8-4FL)Lm{|_95 zk3SXj{~MiOo2PR#=i`ky3%^F|;gTgWk2leI7Jeq`qc@uW2XO}ZKa7qyeQ9p~|Gv!o zcmeGe%i?#@L+CiW(D+VxF80&ycslJh*a1r{kM-}3&Swd_-+sp%@Yv^b^Zz@Q52N}1 z9$R3S6;XFrqy4;zJ+a8jsN(_Xew>4Sa0Pb60;{5*E_em)x#;_4SI2t;@l@J(p!xV8 z8gJ7zxtY&!7CP@yFT_7DUYR_CZ?^KJ1)ynhoerM&~6!5h~zUu?J`zCUyDY}#+2{Z!o; z@sC66VKI6x|A>CCvYX;OADEnh&g*3yia+Bp?7cbm@v~@M)_F7XGam1ty$RjNgWrm} zUV;s1mv}qsyB(VUH_{Y^?(o4o`s!Q z@7nK0KF4g$&2Zdi9>@ClH2NLcnapg9^Q|s=E}n^9@HVurx2Nkxx5xeV==I5HzLwxg zxC{OLaMb(p=laU%`F%RRgLk2IbM6Nb*8^yK2l^c=xg&nJwoFby<6Mkc+=?gSK|BtR z`!MRN1sd=5XdXA9@g4V3#4`}f)4l+!;+0qgAH>4AF!?n4y?!2@&t7!BO6`p69ngNq zV?$hw#=SFL&-pm!)e1XueG1y&YIHrnM(e)eC$Y~i!Ccxa(0Q)GlDG#wSARnP+)(b* zIG3BCzuQm8EKWwBy9dqti|Fr;x6t1s2eCBP{4C;ahVH9TXdOI>ekVRe>#6qt;=Nwz z{p&D)ebM>uLch1AK96~|LHoZ5-A7krMO=@?@H4E8`_S)Y?ymS<&>1hGJv6xmoqxOC z5yvR3Mtde&-%HT>Y(@8P?w-hVKXl*CM(gZ-^c*U+H}?A=>`r?*djC)Cht0l-_-;n? zb|*TI1(?O>(L8^UuK$egzXD&z`~A`P7NYC_eDZ(kdZDkPPAj1G(h1GOm1th?L+7_1 zt*@`KESCQ|=2aJuracm^&&#m~PDP)46a9VlKYXbGf8IjZ@wsoKz6*R8>r@?Ea=i~) z7c`1#Pr)YKTh4yzb8rNbRPdwYP677z8dHL%-6l>GIA~_$;=bPy7f}hZR)2d)R zH!b-Tdj4!jpZgDeu4kdV%rx?RC(dVHWsBtH$GNgtUSmigcn>?$u2~{4|9d|YoyU_n8u#M4%%f+?yv)t?|K!nmnd`XTpj=-5_j4(_9>vS& z<^L{dkJj%j^!xY{cEp3&92-^0%m44oT!`-99ccX)shF2xm`r7K-)GT0^+fAwBDz23 zqwDkrnzz5x^=ilD<^MUU3;G=xgVya$==uISI^JGvgyoNoxKBaX`zo}*7t!-<4_Yrr zRf^}^p?`jwfPOcoV-1{(UGP=(yH()0m}gt`cgbY5|K(_Z2hs7XRnE)bzXQ?t9!~9# zQoHK$F`psmxid964~_3-G{4`Vc{;vIjE=YT2bc+a8v+KWDSY}LH{bFUMc&+D){ z&PVHOJ-R=CM&oLm4KKqi?dQ<^ZpZxng04@kYI*tR-yn2;Bhb9xhvsc{y8aGUp?w68 z!OGR6-7Gl>?SC?Qe-2t-Ponkn8Jf>BH6p+L(eq^vcE*p;`^VPI%Rj%*MDsTW{m#xn z=d~H_FQ-Q#6E6<)_FfPf7he=TZHC)JNkTq+IjiE zpK7DepN)$*ed^Bp9m;bw9JUYLZ(fEHs=XFA(=%+t=-ra*f_b!^(yvDJ9Su}6m(7auN z`R5R3X}^Ki`IqQchZoU0{Tl7Re2aL# zEgIk1=z83P&SxX~=YxaT25Ys9an48kn~_|R+>Jh8yj5QQ-y?NI&#~_4^Vgu`Jc&hc z4<3czp>^{+7R5%bBTsG6c*dZ=`{ttO!5*{@YPX5H7=dTdegy635PCj0Y#Vhj9vyc% zdY*lUerJzq7j-=xt&iDgKG)-zJk}HI(C*whFaN)TI~Mc52k3cHpi7L`6umwHXW|Mx z8{2h_I+}~_pO>*OevS6qtXrH5=c4O&En0u`(DUFmbRECIk8}9@uI`bC-KWGl)asF! z|NHV(^!Y2$JUxWg`Chcnj-dOlM$hQ4J-Qyl(Q$82*O#L6dLP|4dA(xY+o9*~mFPM4 z0(QlnXx=KH8v9`&T3=V=(YOSC{uOkb|DpTlFuJZaPm8)fJvjlbyP3(A=yzf_`u?Bj z`F%|9usK@CgV6b1js5UGbf0~Lj#s`<%)1>r@AJ{$<+q{vdI^m;(>Lm?3|e19(7fJ< z*7b{65r0JUTc}@*TOF;dcIbW|hmLzE`u>aQ`v0&G?VSD*cR#F5`*QTTd(b?uLC5(W z2V=qE8z8j7A_<>PxXQA(3jn>)S$+hVEevOV-aZs#ZYwSdOBHG^y zv|fKk=Xu=e@q7z(z0X4DdnY>XI<#Jn;2>;%M%=#@jrS#V-+qm!VEw@{|4Z>y+7IDC z{07g#HfP4U@gRD>Zp98*Ye=l$NOWJ^iT1w=jcX4&zlvu?-SxyQ?F*AL(RF_sUH6^I z?)M>RKl9La{1UDI%sFwtAzE*jqSxo6dDw=| zr{cMh@4+~L_Pyx3eT(KjGc5K=W%Rq!8_oALbiS`*X*`71Z=v%d&STK}?~LZ-5_G*6 zqV=~CUFUM=$G8J<812W=`4k);@t=x*Kjxt4(i`Z${R;gam%kw9(-(d2KCFdrp?UiW zeZIkRK#6mbo}|EHQLYB=)9jn*YQg%kEJin z%bbTNpzAjS9e-)^bF{vW8WZ($9(JaEYw|sG-bY^)?+r%tcQaZCE73aJfo1VObp6VX zjeRo^-H-R8aVTw3K8@DFdhCG}E{^a0Ftp!E=<|=F z_4oq1u3umqEI2+dQy4p85$uVs+W>Tam!f%m3Eig$()ErL;`?|rx_+->Df}w=TQcvG zxLz(<6U|do^qe1#&U+df-&5$gAE0p_J2C3IEmoj?CT4L0n!h{H`hOa&=Qq&r`3}rt zsYy{U4bi&30L{z2=zDLZ>z|_QbJXOR|7mFdJ&Q=I?9t{X>|=<1dT*?a};Sf$r;f(fQUHrwAB~=uH=)ljNAve7`d)#l5pR7ouF+_mkD>kSLhIp#>m$B_=y`HCmc%!4 zZXwQnH1CsU#Jm@y?|+P*)7e{MKlDTMcMEpH*VFafnGt6jbRMJ8^LhsM#YJfUzoPlA zJuA-B;dngl#pwJtU{Cx3t)CXR#-D30Lf2yr+V6Mh{0q*G^QQq?e_hai&cw<%4LuJZ zLBE?T@d7M%TjXgxx=v4GN8E?byY}t;JrGVnpMMXBVB(D&r-4(yryQB3o4?Pdpq376F=sA?VJKEjRes91YxEYPR z^gZF3$@$4|(Rdo(8{>~fpI?UN>kl-)+52L>2B2{+MAv5@x*mD=$GOk~eSQFX&P+$w z?|s&Ep}ozxs1y z{YInb$KzWdSrqdcfVStL`*uCLPQRjgsr6W#2j`=CxE)*IJLvw%eLQ|Y z4Z+&9FGBmd3yuE`?1*`bBmdoSAnohXeD6TxEc`^g*Bs5?sN};~jrRNK?~>opx<2m7 zXm>*E{zCM**=SuYMeFKqw61Z z9~#H=Xr8}B^HKcSh^H}njt)o1zX83!7@g<4=zBjUD=v-aJ7AXU!_awMkH+^L`g`qv zXnhu57W1s19D>%(&B>S0bN(mck`yyf35s@I!R{%dd*}+GCdX1?cad>DV3Dqu-rkt7F`%=(sJg z3l2i({{XsvYtcBqMC+)?ny__pT=J3RHq5Wr7b3q+(D5%s^Ya9n|Ly4d{)+Zr<;9p^ z7c`zT(D5f@d7O)`<8x@7`>-pX_)_Fy0-D#E$!E~@+luawLNCX;+XUVB6R|TshG*h8 z=7oqdmiN^68`u(c+YW#ki zjK2SBvdC+3UJXF^-92c1yn*@khy7{SSQl|lLG!u{^Xne{T~Pb=sE3hwZw}uVbU(FO zpO;xqdo;QakKGt~=!BhUUy9c2YIMJUjqUUJJ-aEM@A!7i|3b`ie=a)y%V>Xpqw7`u zoj9L+;#k_#(Ca^-`=Z>I*l$hIx*nL?6I1(+)Lx3#^}EhSe)w<&~xo-blkhp{q!8VZ`Pyh_dS}=%=@v=TA}-_C;I#a=(=2n z&VMWI?PuUe$6B<${>CD#Z=Ib{kBvTye;#=ax?g@l z_e0hHMSMf>7}^)3^?WlL*DGj$htT}i_&ny(8r_fQqvy$VbiJNL>+4%|ALZ>z=Lwp> zap-z1K--$F4j)D9{WWwx zKcaP1Yj4Ec0;|v-imvZfXx%KvYPbPiuYKuyi7#UQ_0YIFqvM=|uG6*X`wP+aT8ECe z9~Xn%FSj&pb@`rd5x{_AKy ze?|LmzAx74Z0tjOD)zx$OPmFW5SL~3uq{JKNmuev|-e=1tP7oq3s6X^J#q2Gbh2O^F^XuaHso&#HwWxtR2 z&O+<;_T(nC{{BVt(DaAA%+><@y(kW%ed58q{D1FlYVuQb+-5&Ve;1+a_y{_mH_`e3 zj)Sr7FY(+xXdS(Y=KULVy-xf!9EGRSUWkw3k7!-p{aeKK5<1U4X#Lha6u)Ojq36jH zXr5m|=W!4nufp%KubZLsxgI^&K19ba`A5Xp3w{4OoXa`89Icbn{)u|M4zsi$M)%1p zXdZq;_i^3Bu^+nODYQqU`Co>v@9$`y${vaDeLFN?7bfpR?{7fQ*&osUTjbvuzfrO; zdjDdyPG+Fz%1ZPc{unD_#sA{`Y=GwRO7wTe{Ny|6c)z20$z}@X$2|r8`5a~38hU*t4#3~h@p=|7nEzdvfu85Dqvu4t0ic?Z$R^rIXc#-2KpWEhUV*fbe$KY=iGig8vjQ7JE}~qUwt%x6L1Kw#RgcR zY{C3}+#TJQccJV2BxZ3NIrb!-)~piw=z-SVbTrPl(SCEQM&7EU zagI#wr_uA`2efWGXCq&e(K=mM?#3bROf- z^Y?!AyYLoT_vLHE`-9Q*U=|w3tI40xeUPmg=Rs>UALpa_n2zOeF1pUk(DQjeR>Q)z zBA&YFxpWFzr^Aw0U>VwXqU-e-x^H%%{rru_S@DFpJ_P+fOhxDQ5IX-&=y~-QI!?BB z#Mu(9kD=)Ar90B~RcQYoCl6sI+GXlQKPRF29fZ#J2DGjoN8{Xz&hI~T+-h~BzaE&s zzN!5*x_+C{b=il;n|ETIKP{3Yurt^1M90~I#``b&UX6OOe>-;bJJ!@D$@^%h-{YJF^RcIW$(S29uq)md@4skW)oxHQ|KBSdis#T?kM5gl4P#$+OHM`i&5P*y^9v5ZR*ho6%}(w_ z>%Ds8f|*aS7dmduCNW+gw0#5G&ogL#enroNqnj4Y|8rSK%wK0T-WzZ)F2V8z`1b&s z#d)=;Ma20Dx=v+V#yDr7d7On=dHBRIYVg?~1mkq4Qsk zS=^7-d+{~}GxuR_d<0*`|I_v+a5`3f{QuaqCnZtbWR0OtkZLG{~s*cons zx^A3>+V`t>baJDh_Pbe7^L`I(56g6N{oMaT-! z$VWlVmvpGOHXDx`e}_KGukP#W+rwz`W1-r)5la6c)cU%zpKE7NIFft@l>9!Z^<1OB z>-Szz^K%~5xa@_Bv+4l14mv~4rx8%?x((`nY$w!uDL2sVgHcfZmkKp+9)g;m`=I98 zA5inR?jW~sjDs4NWyS+g`(deQcmL7>%HB;-{j&i|{wP#@mkoAyTSLvCc&K^%kmb)q zjra9K+;w`WF&$Q>{8r;?sBwM~YQ7$VJz(LX#k}`Iy`b_-q1M@lQ2p#1=H^KPtV(_w z)H=HdUIt%)TJLW|^+TEAZhvhH6@LI;1s6lD)3s37lY>xk{|pspg%LJSp!zimNd(!b`OQ>_Z+Bsy##99UV-ZG z6Hsx7#W?w^p^t1ksPfTPJ_Yt7e;?F1e*xvMW~{T{9?I@8sJN#=_2*MiTf>?OZhek|S{DyM&95(@>gy%Cbs7VuzZ_~@c0l#h zIjHtUB)R=1395c3)co5773Vpq`-SQO*FWjdNB%)5{T)zo{|wbnmyUPyu7Pnd)OgQ; z+J{#dUxbSD7*s!9KEc&TK$QBOUx6Bzuw>USO`&(cZuznBYO1r1cfw)h*F&w7 z5-F~I^`Z8c(NJ+Og5LN-t;1bVcD{yM55-cQUN5MAyb)?$t%e$>w_pcYD9!atC#Z3Y zfs&sDH9sDJQE&&;yeXCL_K&8}M}7oUyQjjoa3fUzo`M>WS`%H|@lfNp6l&cbf?Dq- zGu(JbLiNi{PkPVhY_|CKY{bu<=gy-tCOe+|^U{nEpu zTYj>;ZuW&5r&Un*xqB>MYKq%Onn10GIH>jY1k}1X2Q}`kr@Hu(pxSj8>c54??eJ3a zXQ9?d(HouKwNQ4tL+y{5umW5I}I39&+*PE6vKhw>(=1}Ww6qNrd zmVe6fd!g3Zc~}{?o8|g#2von_2g|}YU?2FNvDR$Y9~0r_lrM*h?-{6Z`ViKHg>QE2 zw>DJVL!sih9ctd~g1SC`2h|T%=D7B@f$E3eP~$lnYJ7J>*(o{KjZl25MfOg<3D+x45`dpxSvC91cH){a~Br-8@e)ZiCv7%H8I!a}A*SHwWte z=3%IQcn-?n_pm#xy2#~Yq5Ld?qv0D+e(K)t*41>VaoYy9Z|%4Imr#Cxhdy}aV#n4{ z<2nLrJ=_E}Up7O)q+fM?%eug;4eH!b-5nU2cD`0yQ6+LtTePLES%0gPJe*K=scasQwFE z>hg`C_NPSH39g1(r(ZzrZ$CjF^xf_3c82P&7^ro2BUFDp087F3Q2o0NYJ3hrwd=}d z?m4R`RGhc$qG&}(n-}U!9 z{r*t>G6SmJ%c1s#x1i$t0jj-W%U%1bLXBfns5pDVl5oE9PU8bm*UL3f`}}9d+7Gz> zFaTRnemm59-wo9-C04lmnmSPJnq*u7CHIQui?4M3(hw@{F|Y<)3>EhVsC{4;)ch;- zpo_B!>`cBb)b(LHRC`xJt(VZ(I@mvn2w;gKU9);@nOIEq@ zYXN0125LXJ1uCBHQ1ktivDCxvI#dU$yaQDKjD#AmB~bJ85vYFs7OLHKR=a)}2DL60 zK&{VLq2voc;^d;B_Jyg?yDq|!?l+}{s^@{HC^NU&4X8x z-wLIF0BXMeZuNB@bMXv^x=t>IYX2Unefd1pyy*708~6E8?RpGq{vL-~KPA_?b=?)J zpHrdM$t_U*zaDmi??A23%hx%7HK6vR!BBSRLD}00W#c+7?B*N36> zw?Osh=TQ58ku7e%Rf5X5fPG<4%P)iK@3pWBJOVY|XQ1X~*{#k`bEy4zAk;dT3st`Y zYJTm8>W`0LFIfJ0H$O%~*_&hehm3DRALZwu=D`))Tzk92n&gwAH=a=QY7^A_I0YqN z<^?xD+C%m4%~16ljR&E|`3I=|r{0S$zF|<~v;cbj3^g9dpw>gRmz=+mPFpIJAXozaOgIH$sj78&KDaird|O5)C_%zti&XK&_w4b~v_!@{<6y|15$- z;9F4ZzvfOCXD_JzY7tcX-ZU23<@URFQ2S`6aV=CkKCyhcSDc-0Q2llbRC~5S$$bYk z&Q*8Y^%80w&anI|Q1P6B8rQ2{b^Xu+sz1j;^}`&fd9@#EUj7Mhfc0K;`^#LY`MbyX z1#C~g&>p+)!0zNzpw{^&;}6E`UU%!&54B%yhiXruH(dNp;TZCMsCBd(YTQpk*{l4f z8}DeS_AG|lFSbCn|0Gm@RNL$J@4is|eW!6R)HoD<%h~G;m7fkZU!RBShqF-Q(P5wS zmj!iQdIk=LCtwfQ?rorF*J~VvCl@B-G3}yFesP^uI(mwk2x=`aY z0%{x=LG|lysDAy%SonR{?^U7Jc{8Yf7!9=#&xg`m4i(1^D7)vO`mxyuZv6T|jcX3n zd|U#hw;i^HUqG#+>c^b@c2ND82(_=xgX+&Wp!(-~D0>Y)bc}?m9}COEo1qWh0Tsuy zmfvUjQ&97{t8ffd*?veeFf^e|0mQuyZS3Pu05dE`2?sqW?A`0sQZfd zpvE)ogkwvn`_^Qr_#c6aXET)kA*lVT=-2N0)&~wDe;d@iIu13z|AaMR`ET5PZv@mn zlmpey+bzEdYCgXOH9yW+d6|>0e``Tq*V{nV4}-c+W*F~-+UIsat+TJ8_KnNFb^e<} zwR0Gh|Cvzo_d?B^9Z>846jZ!5zH{+(gR&EVYS%)jeti^by&SOmb5MROeea(CJ3-Ck z1yJog0<~ZL2{k_TPr3e#f@+T+YQ4^cnl}$ZjmLhdeW%zDZaq|il4}avzyYuwyw%G0 zK+U7Cp!V5oPP_Rt0`?-m6h^^MEMNbOtIsm7hl=wgjD=VJ==Ra6Q2X^x7=YhH_0zDk z&d*dhhWutY2wri{jeio1BtH!*o}Ezr{TI|YH2BHQo31d1{C!aI{Q=d_kw3d}Nr&>k z8fyOShq71b7q_3ahq5~js=wDljqiS_{qh&6cecvrzWmhGpRQusr-7YM&`}-mTYbpzL>nT95Hi>*RK* z{(0TXYlao~`nwPG#?$y9l)smt;&~q`zT$<7d;L-s%6>zr_Vk0A$K#;-eX`Zx1~tx4 zL-ps2Q0sIb)HswXT-@7_!lA}vDAf2*huYURK+TV%umcP$;^aC)^@HCy2Wp1hAETkhHvuZ{c~I@U2dbaeL$!Y&l)WFI z#<^&5*I(74`mYZh29u!HL3hj0e0a!GOT?^U=L z%HFR~{Zyx9aql|V7ivGg5vqS5h8n+Dq59)TsOw9^QpLmcJTVZ;&%IFg-h{e7{0cRH zYm_eT-9IEk^~YMM{pbzY7M_FBYh0$dw{Av5$=wBIcO&${FQMWrUe?(Qhbm8lSHUGv z`_nq8`T9OoyhX~nacd71PXNmAdMLjqq1s!yyc@T6Q0uin)clwRo51^_+PxPl{?o7* zta@p2@BStMc9tBx9)1Wl-jyr3@o55eUojkNJnn#sW52P~WyQVyIuiD$d@({`EyTj=Zl@ zac{q#1xu2D4Yq;@pyIsbO4t8gq55MyRR1i8y3THc8n2VEBfPq@vv&jRM}8I5`Z^6Y zpRT>iaRAi5Hp6&7RQt9-jl&1f2a8v6>$Wb`IP`_OK4)0@TH}7$iSnPI#-n9bw_i+# z+8>^S+W(J1-Itz$+OKP0?dHuWsPeh63Vh!9F4TJb0qVL|`WiRR1EBinHmG^O2Wnq9 z4JFsSnwwu!p!#zKR6iYtYDbCcF5eJpK8=CukF~H9d<|;el<+ybouI~b4pcuq3$+g% zhU$;MUEO58ftvY*LUr14&^5RwJ$A#y6@Qo`@&Bx-{?9w z?meLD=R;lZRzcbS7^+|Xf{LqF1J~b!q1Jyq)cjctrS~NC!Ed1SN;P!j)D&tRjDy;z za-hcTcBpY*3Dpnlq5K|#vVR6@{#_kj-1~l{7gQX};b^!QYCY9&CozA!XYRkW5`J+(r{s^@% z`I_2w5^6kVL(PLVmOl+8e|dys7pS;S8^cJ@X?t;1WO#^EXG zgReu4^EYr9tlh@VyBSdH`$?$w?1b7EOSg6X*cJN7kA~V$ZiKpSKLypEvryyK>Uw8? zl<^)ogz|Tw;;!G$?E~4cHTe}#`^yoi{w&$v?Sn1gK=R9=`sHh=eX3>$H$KCl+HpHn z``?6Gua|Um@ePHVFLN!w5tb%@97_Ha)PC2nlbe6zpyGK5%Fp{y{a3ED>(}N`^E?x( zpH@SS^Hx|N9)&(wxQkoA*TNX`ZJ_4Ua;W-4P)lW}BwR4~4FX`>ZvmVsEjIsP&sCo9X z)Ia=C6{Ad4SnPfK6@~y}y(12i4yTq2ynLYR74)`E>aJH~)J>&5v84#%~YQ{Z65QPVYLX zc{2ufhL1z(pETAO zVeUH65~{yOK>3{kWpAzV2-N&7GThm}0_u9!9ctVrK*hHZYQ3z2if=oV-*>J4OQ?P0 z52))z^AWB+1EBIL#s$zv{!ys){TkGK{uru#Wkx!-hw`5aW%qX21@3_w$5Nx*{2L7G zlfMh6o$bShpY4hnnx*pw`8BsQZw|pyu%*SP@<} z&h`ak4_Kb^B&c{N!)ov`sQ6xkmElR~gGFLoe6^tF>p)ln-VY`JFjO3`L5;_EP~%-R z*7biCsQJ+rY8?AOwKoYW-n*gv?SP8oeW-E!6>2_Lj&tQLpz?#E`hOzSe4Pi?zxToB z@F3JU6_0nB*k9AP(*$>rU-$Bi{!ijFa_JUgfH$(N?7AQaOK=nts%)h5-=<8d&8 z{5&YT&qK|ZBT)TaD9x?E22ks>JM07lmR|=YzYl8t{|dE#mrr;4y`aWB3u->z3bik8 zg_E1}}qWcj_8|IGNSv3#bpTL((MoiW-t9%`IsLD|0_DvtHWSE2Nd zS^bYt?JJRGaYHX|%STy$v@sJ(eu3pzLHXMPwXP08jq`WLlGzq7R6OmB1EKme0qXu> z3e-Nf5o-KCh1bKsVQ<(r$8jF?kv{}G!Lv~7tNA3iUu8k9%e7GZ=rO4EQE0N8x3!_> z;{@0auC)9ysD3Fo#mU!(HONOnt*Z%8dJCb}<;%tsP;p*5)y2~Xsy&OK*25mCb{3oF z>{o`0t1;BN83NVrS(bkqDvl4J`tc0x3Cm4)>tGnvJ~kV6fSaNAxu2lcMf({pp2@~d za2VyMq2lRzqpe4%@p>L=9Ug|A;d!X_+xaH9o|0fo^2?y+#XhL@_&HSkNem*N?}IQt#v#hggku1mPiv-z~6>@AdkqkcnS zj*=z-UO?tF<^3q1hTM%-by-oKl_?w6bFPuYZQW@%yZHmv$#Iy;0{>qxLzd8St`UB|P z!-akW+)G^@>bwU(a8w(urD^C7q^=hBs-YW9rLcXL*z4i13w4D!lztCXA3*q@KwrxtfK`ABpoQGa2ofPMlooTsiI@@vh{ddhcW>ndWqjiX&i z%qwZvQ0%>|IM55AR{|STDgS}RX15aMjV+F0oL5GsTZrvjDGR3E z>RXOw*l2`I514AQO*t=5eDe`by+ z+k9r{TKG6I{)Bu<>W5R`hx3K#b>mo$p3(~(@zS*zRTfMG&8G5xYtt$E;S$cz;`@~8 zG$H@Ct+P^;mEcG;BeRGjoOq90ds|^M&iXEb@)jX}Pt(r3sqchNA(P>sYYKaxd@!A2 z%r@hzD+LFz`2up~@L$pVbGs0Bn+fm2{*|$uf zlWZRDS!{(#9= zLgsd4&Qhkdnz-Jve#o?bi$r!jbqUDLC7z|kU5C1C;>3Ai7b(!`SnM_^MaisMb{ z_-iP0(@mW1p`Cvc?;0z;8sA@VzJl2LQXYq&aC|5g<@^`;Iy%!hf706i8g?Hh|1|NO zB9@iNe2Q*;&Icnile!aT;~e(45!XG~_?n{y$zk(q^DUXVl+7oGLIkykIEtWq zEq(?gcZl-SuoUu#kh_J0znaTSjj(wFUzz0FP(BD*r8g;SN8LusQn0fdeWiD(?@pOg z3)=LJ$@hk5@%ubwZP2U7aSi9!Tc7ahR#*&e=w-SCh;KLfrPxit)(9)V-}>bo_MS7{ zr{D|7&xiFw+I%Bzt%BYC_))6Fc`WRL-EWaCgRT3q`zd2K1YSj%(kAjgYfn+LH__@; z{{`pS_>0A!?n{+A(;lU_;2o3)Q*BNr;pb0u=27=I$7T3edWAN$A|Jr_Th_jwR;T)A z7Q=TI|7YYk<5#H=_U@v6_i)bVF8m!}yuZQEEtK!FK9}5T>Kbr7gzRYAHJNIKPAXIBWMhbd^Svzl{3#i0?dhYH%czzYo2yVFkDd*{AWZcM2QH zUxCgWuoL--=5rJ>8#tbz9TV}TGz_`7Ij@E7$83B{SvwoxhtKrFqN)GEVtNCa8%+0V z+I1yIGKbP`_!#`z@~t_45WOkbt7By^kxxT^ApUA|=ox^&iZiSUe)ucza?>BQt2OPJ zOvxYkd;^`gIQLP0grf*;Q_|m6+8R4b{jtG6j~cex;(L(zyl9d>R5Sic^#c$$bChACH^1b=tG+lLdI|uK7XdH3qF)~o8N1&Rf@VbmM;sBpJn2+^5r>3k-yr;^-*i%cI^L+ z%{kT&vUeSA?Ll78%A+_QKz1NL2E!uA-cD>gERGu~zX2ORkza`IYl-oFj;FD4xA~}o zty;(_6}5KVM7`3@)SV)>E+(t8?AW#MUpgA&I)zvGpEu zO6$?*pVJLHj_fM?d0rb^aJ}*S6S4S-+^fR)~CK>pPX74UxG9Uk8ZgtC0FEeDgV} zmpU>gN@@7}5+D8Gyb#~Tteuj1l=6qL^E&5GVuQb`H|%rHKOp{O^Z5y7#jKy6NB3li zt+(*G)AGCVwH{qwyN0!EvDgReKReLr<;@b@eApK|^Ndb8kboL9z1Fx9h@dgzQmUug%vj>4C$?Ovh%G17P|W3qsDEK|R7KArMu zoOhy(Pus&vS`625{tI!xOP$g~$ZoMZSHgHuKb|-@;lHZIu!zbZDeE87FOpwD{ml1WeBgRju z8)UZcCI5oyrEtCtn-hsE%ly5C+!M&hn*2Cq7SRuPQ}&HHYmAQ?l-IR*n~`A3*u{*iGVT0>||N2*HE?`zblaGjpAV9$>I3O>^wqQ3_7<{|1#}-ne)=-ZzwXS zDVs~#B#v6xy&kzX=m!%&C53&*q4X=&(3#ZzXG;jAugqCVtfmo zqv+lQ?;!siet$PRm62_yddo{^r~V*4h3pRWl*)4cHa@n%>tHM7V~D9D{sz#W2h4v> zYVxe@)NRMccG~qK?Ns^-*(mD%LcbIClp14iyTz>hXzGVk_8{lKnC)WJSK{D5 zAqx8g&ZWKqzJ_2sll*>k_|Lz>9;bY(#UNWn$SW<;Bvi0l-LCmi`**yN}9upyk!GW+d`qcc8>(>FI@cdw1P ziz4sOFR=49e&VfYIQgm^1BhV?_Hr!l8rbWN?PA#Z9Qp5%|CajOIlqM%%bH)A>4bi3 z;%P?Ro#;Ky`H#f>3i-RSt8XrLBL5L`!IVI|!jT=1Eu|>qNOU`K-V%MK-sm)-J@u?T zrzx9_?hUXz@mx+_SM0=d9!#%N7MkuQhCi`)8S%V}uF_+)^J)Bi2!F-)la&8O{c;Ya zQReU35WA(2IZ65NX8#jnjkCC=GY3DRX_58iblTnlyPu&SZS5L^o#)K@EQ5p zW@jV1N)K?Pp&Lx$l;27IZmZ`%^9`F|HYM{7b?b?-IChRw_cHBOx|U-a`FY4bgP+E* zJ~E|g^8)1WhnuWFp7%5u19acyd;xVmIp2%V>K4mo*mwf{#@6q<;1kGH=Sas+du;Z> z#}<5kg{;yE?A%IUC{?FEhVx<6zsjL>J&fSs6Ogb$R;Ka~us0e8@KKEzj&oEEsecjq z%GkacnOkk_>QZ)L@)K_%>NAK@sRlaNlYa@j>uFas=ilJ#DRjG<{&xJ7=BQ5_R&Z>^ zcTeQ+!q#lq30og>v>>na3LNN8!#+YDb77Bi9I}3^f{s#qbY7r;eE8Xc&EFAxkh0Op z>3fA`CcgvU4-?l}>$kSVybt+q$X`ME>-am3pXbo&#`*2oUqIan^k2nxcYHLY{#$JS zjl9y=Mwg>Ms2_pN3)4mlI%DH5v0EM=4^ytx7aMmFM`j6}hrH5l=-*5m`jdYV+2Ne8rF>~fY;%w)hVKB!7JPk$ zj8Y=8T!q|6=+?&Oll0R)oUcQ!19D2|6*oT564x&rImjF)KOdR#=>Lh{QX3!1pWyH# zqtuV`@6p*|wp8{e^7o-vp7M{eGZfjkh~YV6oQT}_u)73FW%2Q}={`XD6Xa8{`6PA6 z>C?^By@`!#)Wu`t2kfq)ZTC{A)L-r3{0HjpMNa>Q$T`YB-<9P3*^s(1*r|=barml9J7YOlT1egNoZm*Q zgWzk#qcjw|e)8qbeg)b!mAt-{i9>%msWhg1F#KF$%7(g@#52mTs)?of&PKM%B$&Xwsj=k78McFpujKbGk&R;?=+~nF&erJfy z(d0+s>lcn^iS==Go+qBiY4@f0=d-e~N*oU%_a}AHaJ^94YOc9jdNV|%f@5v@7KfluETd2F6^D@}H1e^Lc>LvUr{RGo(e3S8U2R8R( z|A^VR9-Hmae~F_i=jG6^OH4|O%-=J}c0l(ED_@DdH>|Eawnh^}59GIF<2c-Fwi_W| z-F&Zs1CSd?JR>PjwD{gN*~h5AS58R-h~WXNUrc!w>))TKyPEh5W9MTl8-ahNp&XwO z(?R4Hn$6?LJdB-NC@)WJN-5T-IzLSuKTv+&#%wihe1`KRYnx>HVyhH3GO*hoze+n` zGxAN*A8K~*L+2d2E3mN^AHQ-`bK>5gbwbXUSj=0|J%V06iz(7%>RQ_-kx!>DQn2|l zayj@tf{%X0RG+fx#Px{v(;#HSkv)dZ2RS~rSl>gh4~Nnj;(g4@caxv0zCuT-rm--x zi$eP7CeHg{?{EB7$JZQuKgoGKZJ1!b`D;47bOhOP=yyOq4w+G$e}qq^$=H9>e8iYu z2iOkX3AFbQi}7vaL}FWy?md=|N3I+`_oGvk^7dw_CZK{MpE95V=XcjIh5*PtCsb54t0N9|CXV= z1Nm6=$Km^o*;zwuzY;?e+E@bC3icbZ?=jtz*4Aufe&c)&c7o|Qu-V)y# z*x!iEkN9j)+=VGm<-8+@QXBG@+Ijbo_MF7V5b`y!_d34oW2-6pldL_<&~1eOiSTCR zZbzmN@$)%p*bs|V_LV-sRs($8jP4xTvfS#+nk^^A^%niF@wW;aui-0${EgO^iO5zZ z)(({Svv{R8+l`?J2OQZ8GG0o%{gie2AJ3`rV ztG_J7R{$BMkFZq{oA**z4u49kDDzSF5xS+2OTkV$_8y@ve`4!X^Lr54qm)lW?_T8h zk>84L1h(cQdlO^TM+Qmru<;w^n`pyaj;Ae_t;meUM|0}0#Ma-Oe~GR7_@1e;ri{;r z!@5xREPl#TuGAfFBaRs=$LC&-=de*6wn0AA+V=`Jl+Ib(#$m4~y5Hh|C%Ts-8%znr z6;AtZqI^BJQ>Yt(J*AE&cc0l)S-Acn{e|BoY<5DgIQBcB(+d6S*6(j{ek1<7B3F~T zMEsmVb{RJBz}`^uZ&3G>^~r6>+`;)?Y)7D51DRQzKaP!_oclOmjlU+;{f^#YY$@%) z-glJw;cvvD^o-g31^Fb4$JNk(l--5?RmfZi=b)=p82>Gijl|AA>c-*sfc2;9w-K*W zHs$Au=Mr@9=Da%R$FR8py$e$g1&fetkKA-@-EJ|5%3Xv0Y-BcA%>4B=Vb@VM0@=19 zv42O~Zop0g@%DvET_~GndM}e7X7;~ErYHHUiK!`NKU?h5>4(ji(0PZLcj9L%{*+1( z!&&5eknd0ZeU$M}B8EMWt&@~Zx4zBvq`7agerrv;T3X!}&PQ;(#u1B+DcHOd8>7kJ z1!odVZOZ)Edzt#bi0e+X^EYJy>XdTSm&lHz?s8<7nSHO4KT6Ps&(XgMx!=fl=3MCw z^4DUc7J6UducGX8v_ZZ)GCA-ejuOOkKE&pm=$%0RBz2)_vGsGXY%4mCTD;9Uf02qD z?51Mxamr_7<2vGgl;e>Q-S?@hh>w<(?W5lxvvx+(W~HN)7eyyD-AY*{j?VZQMBO}# zEfasmu~mlrW!UY8jV;J2sY#`&+ekc0WzFWp^ucP=KVtj^orgJAavVjzD0Y5zYGF?j zUlMk5WRUbV^$oDK7JqkJ%*8pcgxv(%(}nu=)E`0iAZ6d+<6X{oQ1%hL5}hRCo`SDy zu-U+3=!9-@jx_2|VDA`y-=aPq-vc?K=+CRwU&u#bw>n1$%G*<}bRXqy@V&)l!>XX$ z3R@p=+>Ok$)V+?~D~O{ldXExA31ZkvzAxuWU%_3}1=BffTxH|)9)51F4BDt;#3xn_GaG1ege4KfQj|B-gCBCpg6`yF8k%9WZ? zx07QmZF!V7U5=j^@_nhBiT#@?Q@RRyANlpfm<*r8-YSd#G4g8WN0hw-Q;|JPEa&mx zU&@wFV(UH1A0>uC)-PSi&kE@yiSEGOGx(`UOiGi?&uHx5L3uE3#?DfXNyPgEzHUdp z7x{0nmw??H@VAQg?8IJ2c!qpsm|$&^oiDMMh21weDx>!*Wj|r>BQBnd`*DE~jo4=k4&(0-ckbCtzy`5TyOr55z|?#+kk#7{(7PJ2IVWzUB&rG{0yP4 z4*APDrf}?`>=k6oQ(lduxV3Esc4tr@P5u|NyTE(}@jL#z5$6}^HMB8)0oipX@Uz+K zK;0u870Hjcb~ePX(kk@-z>m@u)E%<%R{l2ZD&0qU6LilL=SXBD8NaURZ^YO8=s#gL zB|C%j7U+ElmmvF?#gIUM&9?ayOZ|7)`kK0}=A#Zal?tO*&-y*f%2Zwx*{{%1dY>3G zkhz8WN!E@pj3p`GfQ?Vc--N%J=JSB*W;+vMvx)mg;@fBSW34>S+W#&7-lsmDep`>N zhSa}`-C*+Jy9YMk!QWk!^Pj+lWpjRl_AErcI^1Ex_ha*J>Ly_C6=W}ir=)|8y2y1w zZZ>?D{``!x*3=!se-3hO(OpOWb?Pstt|YeqM!qX`V<|sH*<57WTKmjp*i+QML!Htx z&Vy+NcJ3oz!s_0^k5XIOS(>tMInHogi=WW+8SyLq4u{cqRX9rHcNaWp_CMgfBV~UO z%OBVqNPMl(X#}G=&QbOX{nUr^CqwK{rTiImzOtBl;^PiGpNGAZ)GO_W-%$Q6^{q_* zg!z7gvd579+WKLWQweKM`&!^nDI%ngs-piH`K{CBC~%M&(zBw6P+7ex~hDQyxJ~cZKM8v9|W7>{(=<$HpPk zJ!8y3Zvyip65VLxT}1iI$bQfHc#|1`k9p`Wq3lM^mEK2Yr?vkQ>I$2$t=I~t9>~6d z&LHahVrw_;7|D5W_%-@U$s7-oSE@%@Gqb6D7Drq4k;S31eVorVUFC-m_s6tvEM+gz zSLxJ`qO2PE-kiUKy?BnQ$TX5XGD+m$Bd(eF-Gbau`h7S$iO6)s-$3HNo%$CzHgRkw z=66DTK0|&N@^h`tibJU}ZGQ>=X|iK%4h6{nj%}qE(fx?y0qUmV|3&N+$6q=!{fXmw zY}~;4T8__=d*}imva#I8;0@%JUbno?pWqlqyNjaVlGv3}@g0Dl;j0+s#gKmuDy_qQ zL;7PCWseij3i3n9e`jOzI~+@04SaoNV_S*1iXm4P8&AT8)R*O0M|o}9wG@4&d#S$# zUXSkMl)Xz_i_C9r?B0odFOD)+c0F;n!cMIDDMsB?jt43K0zZFY<2mxR$*)4@Z}fg6 zFY)Ern_+e)6GJ`ZlkvC8`rsCgFSb86+W}-&sLpf-U{h&6_LP3K_HV<+7~=1U{szi1 z8}=#Z*~HS@Y~O78<6zVF56738~H94jeTDumtv>^4U4d3-B% zviOdh%mRE|i`*&n4`b&e&ey5`@bM+~9)R;uZvz0`Z9~M49WbMi1ybnIR)21Fa29g<%-fHCU#eY0@4^sEK=`=-tHD!-rvmJ85loE2TvNqH! zU5oA^YgaPy|BkN@Tvb?M${Uk^lOvdxBR`mYHu^{KqjZDWdXRR_Apf`8!nx9iCi56= zd5!%2#PJ}0o}>JXC*l6MjQG!E_W(Yxw7&QfxeqNiN$s;Sd>Xl<=+~tEjm?kh(>QNJ zEWZ%rQz{_ch^-i88&ZBHKDuJFJ+TB+N$mfIoh;&729M%np0!6ZYeM?%P3p^2mX6Kp zFcR6u*bAm9#Pt)tKgIq{rdN-$$MEqxLT9X9k;F5cqZe{-Q?E1u`RmZFK^tnA|NDt| zC-q6_x8nHR+BycG?@+!Kxud4v3Ei1ie>;9=Ag{ED7@y*3$MK!XcBih6#aEa%%_NQ{ zmM=$KUz%KH{2#&BT68yZlqWwDAK#;MDd!8(TY;^?MRo=(N%7QbXF6H80; zeGNX9j+4K`VpM)U`6k$DU_RHO|1Ir$o#PW?iZFYp$t&$Zcdx||X>3e+2KsN~;~pF5 z*~AkY((W1|ZF&{G!X_u1hpn!m&8MsItJIY81|hM=ldod!7)CKGtvw}>`FrtcK5~v`48jdP-}J z9Yf+%c@*&|4Nz>>KYtQKC-i$@ry=zfIOb3nMU0P!jPLz+z8$&x&P?u~wej;CcCye5 zr~W9%-^3>ueTnf!PM)D`DRP}*YiwInb8YlM?o;CW(Mo#T_&gvZA?Z)rb}O<vp*2I%PBu*@kyl?bxGLm%=u>=m!dxuA0_CslK5#(EH|4!$;V^+FKqO~_fN=v zO8$2A@4;6QsC18Xs4rrEe#cf#Y#!lI`U%#6lh8km?T5+lM}7~nOeRL9-_ae6%`dQ} zbPf5>kyrBL|2^dDp_gj%Dt`$5Cy*;b`7Owfw|H*DMj7gqc2c&9;}ILgsW6h`S>o{H z??i~bk0@J2em3@wnSNVryiECSWP_<1GS#iV8or8=zn5b;ewI@Hh4sTC^y*MPld>Lg zGyT#GDy=1kr#S!2=Bmn4@G*gY=}p;BiW@r_#Bvf2r>q-o9EMIL{ZR|QGmurf3)veu z=DBRxyOdA1_|9On0>18`?itt(d)?75Z}ry`qtY}u8oh@&Z_D`u)VD`2m`0#`196n4 zycRZYMfMOr%Tazk$2`hb5Ysvvv#Qk3<|si~Z|p3fKA8TZtUh%YriU$-tFb%W`YFle z=26xby(cJ7B9475#q^pvVne+6|lC{ucp zywX?Xud{RIA4O&?I`?ya5POw5zlnDAqdkQgkFM6Hag;A3_M0t#NXnLew*Cm_#qq@S z7q*oqqjw+q(INfw73EziKZu_v8NZISEeAU_E&hY1`(()Yc*g9HXOKS>Vo$|?Sl=e9 zKP{$ls<8Ad?LKDb&zWo%JdB+Y*!z*=4%$3KeL_sl;AG;y0ef4iQ`$v-I!7PmiV#~r zbmt(elttM?_+4qX8`0NqS$nD=^Evj`Q?`IOqLHoZ)WSaIygWxAi@6m#QP^FL{Ue;; z#xaN(c7^oC_t=?5OkWa9CG3{7IrJsIuff*W=Jy)pls01TL1O4><+I37#@-Tif8@9n zy=y7!V{>CQv7AS5DMu#fA8?#SehSB{_^OKEf$#y!d!QG<#sSJU;(M4JlD;F~8vj>d z^C4sgbN)2`uj059xiQETw|FG~9PQbG-0R2<(j-^|3y2JTygH7K4ceT z^GjHmSkmx47yf}n8)9s3e(G@ko7q~2oyN%jW%*oVoIFe2Iof&(8-+NO?nmxU^j{&i zk3-^C-SgBH!Kc#u4&I-a5`R_V8fkUQ&DV5n+(Nk@sma(ZP9NRF@d@#a!SA=|J#1q- z$8^^q{}J^|kXwwMEtD5WR_S5tdRa_=qFa&p8(Drk=fRYL?g7~?S+eA)cz;4nc5;?4 zkm;)(&+5FeEK_B^+L@)o_#c&->HfGt!W3UlOhzCkHOrTl;A_*ei7zH2E-8@ZkITx= z@RtgYMKC5l-WQh^@AqY;!Q^D>e3@A>S%J)~KwPFTCN?cQ%NLswlNy)g&-7)*Oz@|c z3QrECP6*HNC&x@KSu#DtpXtxY@%sX)@qwH`e0EH-FD5yVn403pZ+svFi-8<;Gt+$1 z^Jgf&xR_L5e45X*5lBt+)r)N;M+s>eDKSKwnmna`sqoaapp*Et)Vf)i&GKguWlDNX zhCe(eH9p)0hU?6%jBNa*rDn>8JS3-KHa?J5c0?3>c$ntt4v^O(Lg=Z3096Gc;EyEvQDm>huN-%MRs{ZiD zhsVcc#gz1le2o-eL!Un@u2DnveXQU0nqR|_p-xMlQYzT|l3qXg#uF1mk{X{kAoXlw zJl`Z0e5;O}ZrDeqXQdp9K^yGj)6Q#KS^qn~+B{nTNllhd!dPt2) z;ZLS}ToUUbkp+iYuMlHh3pUn2oyM|&wVuPfHuCxK%9fz`Z6fe?ywu>RuFZ$%buv;Z zap~FZyABwlQxDF3rr%rdq4PMnV>I$fPRlgb-?mi2(YVrPO?=_L!F{8fMKtN!tjWbi zn}&!sZD?A3x;ATiakYpLwTO$0Hp>+q+O=7;i^?_+3B38m18?3u*KF73&9NGulHt#3 zKPYnO1wE6=LZGjGNiiAm>>YkaHYbqDzT~SHNX_ymYKXH_V*MGJ^&4FzxUOj_v4K=} zVQpv{YYm{c@;%4CNdcy@KQ)F~-t8|S{Aher>H zjO>XWUs=ev z#is-klY)`>^DJ{2zep4ESN;Dn5jlKtWWVUB{{6JEa<36whb+Uk7jr$xws5w0EzZ=m zEMKahwVmSSKYJrJ&8J&KIpivy8I$Nb>EglnZ<1$< zJBZ*kN%v>a!71KM(bk+2n0n#b3y<#Fe^6wzJoUVBvAZuOtCI`Xm%_+v8tz8tOqx-{n#3(gQDmrVA<-~`CX)p1vG_H>uR2TtKC zIxyt^Gx!t`mMfB?`>ghvEIog-|L)#qAyI{Bw)$_)|D}tgo3&{Yybs8`z0=J_qPs7( zs5>Wf#qzlu*Fc=zvuZmCUQ9Fdx*$a>BAlC^#PF&9j5MDwseW;eu@Y&uN!-2cj88mJ3V_S zck6R%av;{(cV^vnEj%SA-PgZQxAy%ahh4;hNofcXR1Y{GA>9(Roxp_kMUUv)erV@D z!2sE90;$}ide300l%Yi4Or-M2lbmfsp%(_>x`5Dd?~O}%M1(BZi-yqm32fk5NxtmV z38`t5QhnYG^GE77KPrJ?j&+H;DyVgRzXvsgk#K`*;-F0MT_?hVA8rNml z;;PNKaL>+kW6Cs-xZ!aeM<9L9No1hNJO~E@8)n;eu$wN>12x(XFw)V8x z@eI3jlfaccIovLlnL#5i#N1Ni^k-zGWmxODh=%7hkDVNpc62*Ym*E=t&V%~qG!I!o ziF(#b2={t4Pb+uTc{4J?O&9Nt$Umk`B29?R4KHXS*Ff~(&RwGaTfae2(O8haw~F1= z>Ctb9&p$cKpQ?+HwLK{&Gs&BO?b~^?vV&(zPnCMWQZ4V`ygt`WPF!*tmoetC3A;W| z@+W)mT=GZ5OO#1&e1bPDx<&F&4%kQqvSO2cQT?I^5AKq?W_XZMeDMUG`+|)%?QNrh z)VSnqCSgd`#kL3UJ%@LV)`Oz=b}|rW54dh=%8T2pEeh9~WW9+@O$^tgg}Fu4#cdENe=+D!pA`w9xQ6HU`#(Q$2{Vi$v&wY zO|O*TDCI@FmD>Amr{|s?!!NivxvP@<0U>x*2tJpXUPeqjcdp*Nb@#t&0@KZx$xA$~ zG~L&83!&Ggns34P`0i($;Ew~&SOF8)8OxiyTC4niqk-^V+<4;~AH3NM&U+i_;1gs> zuX1|vXGU+~=UsPo7nEOJIX7eV3Qu?8!FLUAIJ^B*TqV5U)wB!g0Pp_TyWz1*zSEEF zQlNog$9eZv|N6>@w?hrX3wW&?^scJlOCr5G^4`O66X^B7UKEw|1y_?MwY^+&ds|RZ zZ-eu{nbj+)0u@8tNsDz6?jA$^lhbi6C9i|^Gf}2Ln~f=r*DZG6p`mti-u*#%%4GfI zm;3fM(7I)l;RAv%U$E2n5K&FdgxVxDM*IRV`ey8hFLUJI^ zo@{#kGY*xw)!+@J`xP$}Gi+7bS`&CX;Cb&|u&$@&y(5YbB(TTwLXiu!_w0)W#Z=HQ z#mpnUAuPaT?oGYDDGaCg!zcLtwkPI3M5xF%MB4{__56(z8)<*d@ZMB<&yVB!)OFLK zFJ@9Q0vCGBod(Sjw`#fLiAwQ)`Sj(Er5DJ+f&&SCu>21Zy8gmn)y(F__f;*$3IFZA zfT=E}gtTN{80)>W-5l{WLZh>I01B3P?HlUt5dR&Cy${rO6594*1gY;DyjhtSY{47- zu+#zM~R?xJirLl~@l$ zdGA(u?~{G7S2F4K1VuXi(C6E>_?vD7N}1=1v%%gw$%F)7N=jg|0`@MZ z`FA^KAc^@I;0!(--BvLdfvf{c?nLTCqwusBBtVH~)l?&eN$=<(O`IlG*@;!$AYVLg- z<=xTgS;?-K?(wIQuUqGSJt7D79}-=|yHgvGr>+`c@U+1BNxDe_lDwB`5w1Kb@=&h?YfVT5JQQxjZJa=r)TK3_36;2BFxi(4` zx_eC^fpqW1*d#6s`dKz)XbXI!mix|MV-}N>(Y&GlY~k)jbv?-7eY&L#zuv|AGRCK* zH_qVUj1Q*rUghbhYF=Np?(LHbzub6xSWq>D7kX?K^cbcI=Di}}3%dNP(ncqrJMVc? z;=ykad6V0=j^v#ks)?5n>z0a7~pZR%& z$7k;se2X|GvuSwKmf=mBn20wc}x^>|2IrP{JN z{_}pa%2Tz9Q2+T<^I|r?LDhV#j#mz0-Uwx-rSR+B1<6Jz##QD%7Znt5&g4ucPfSMp zQB5OSPmgHPax}KMlh%Wpt6^p6)qL)2Vw+pJ&-6J=Lq5#BAcW9tvOhI3%iV2+ya5Z9 z$Q|#z7i8Weq-!MKB(!hGAES7G9{lQRbO(Fa?5>A;-xYkPYrkeQW1M^jCoGI z7V;V<)7LG!%V0i9jMwvc@G70+ZFt^q$ayL{v#!mn{^vJ2;VB96ykp9*r(EtGe{f6g z-c3&;ox4Q2K)oMObxV*>HMoJ=Q|^VovW96I1kxj#xSz8^RA~=ybl4-f+l?CF2{4R& zc4po@9U2m%;^PsTw~O}U09#&&p3}SL#tlFH{`se!omqhhkMrhAXo zOfMaxXUnuT5DZidZr1<9 z^1whW&$01M`2ZqMF}9t`I(Xk8H*FQVHZ1bA@B-$XH{s&F??bt&sObexJY0Iyr*U{n zYFgej3I=VHE7wt;L~av3M|tyEA7tdd*UWvZnQI_3D>*)b?@#iYmzmX=C#JN71nv(a z@@;ZXiRY>C#JCIRcW|2OX{%nl_P&Tlts6D1AN;Dqd&Q5Evrs_LM1QfkL*B;*O~kiP zh`I3o$1~wA>f9EGXu7Asyq;-zu}#a@qd&U>_XoUn^nPga$z8Vr|JW(g1M%%sd5@CY z|K7>}(?~pb{}u|LXXH->gpxZAF63|Ezc?>ur^w`dZo6+9p8z2fI;$})6UCbm_3^)DUgS!V@3 zBK()OZLgks-rYvfx9>mIy$`9vQ#}2D+!e5>ja zIkM#D=$^fNtdL$q`VP3r#_GL%v;Vvz|2GEisg~>CzqU3vo{K!O>pmdZ ziWEQp{fa%U2X$=_y(-@Y&+2w-tL>F%JvYO0qso0h5VQnyugby7pl9w$?Ar&uL2<8+ z%`@+Vyl;H$eMoF}AUTWQ8@c>3fczI-{1+!79xgb|eKpG+&%eG#$_?3DR2O-FNCVuI zmZ1HrX0Pvq4f+3Ad)KzOjwD^XzFNOx*={z{w5m8sSjLv85dxWM5DZ|qdh61l0t!T% z(@-FxY4`iv-}{Nk)2doklssEkw}F+B=gc@qq%~33*wrez*8cp|SZB22pWwkzlQW-+I}-+U=v^ns zF~@)s{2yY4DDqWZg{QgT7dJ5uA^Z$la`f|fjMtAWcPHtMY{f=U&J}rX$?-!`a$2G8 zo%#9*gZOUw5gF*Yu3Og>5o7ZWMkP$mHtan&fOA8PmuJjbW!%Reu>iuGTdN1fDyD@0d14fUMnA|A$uf zaL1zth!O4oz=HqxEmuK&M5%FM)>Hk?qgM5A7WcQ$G8Zo%YW8kw zc3!Tac-pxZ`WR6)N~YIw2vVoKAinZ9)R@Vss~K!sM+kixxb}dxr67X^5nxVYl(jq(^&ldW@T=1f~Mc>?rrUC{(Wxo{!#p2 zbbzS?IF$c+R;s1qsn3S{e(yw1rJOC{CeFCkXkZPK$PZ67R7W?c0TmvOL4&MDaK$wO z;%Z-Fe=nqRuO4!4?;cgv+xGl_eP8{575{xVNd>{rd4;*jYos2&=782jb{P@5d{~-; zV`A%TIjfu~I03R(bx(-0f)8^8iD4bcOVxqspIx5Z;!Hl(Z+$a$^o^nhMeb8WM1MmKyZ9<{#d^v?RdZ&E7>w|>((J^m&X^II@=1@Pj#ke<39u1K&C^Q*TOFirTW#Cq~e1f44I5#pKDa6v7Q+AYy6)rJWFUq zh_rARah9z0ZMAww^s$KgarJ(xKV572!B-s_daI5sLl5@ND9>H{wmRq%78o@|{GI3K z3d+{EPYlbz_u=q|L)g#HW)@~=JFRbjL|m9#{K#0?B~C2?Yx`>a3VNVoBQjpUm_UWo7n*tEbp!|&|Kl3u}(0ZqXUJgA60)s-N4o06a=P@0VwePI$GT{eJj{<2}EFV}yyQmb)(fY;@p&U^OX1EP+tv-93uLjx;Y+p(u95TZPVkX01N zr&I{RtqoS$l)#r4EpDR`{3)zK{4Nd!0;RtK;uE<#5Y0B9c(Xf?sRU?1+Mc8Jy2J-5())q1as-#ruK z^x3#ict>t7E2a`b;Cy&%5fbt2gS`2V^WljVXDh^pD9{b_o)Uq=|{Yp<^_*0dT zsE1bziw?qcg~kG+#pW5yl@Lw;zIqWO8Q^*Mv)%p6!^7JvH*F9<%}3*bL?5`8AK>Q# ztz_gE9ra*Sbhq3jNd|ODsfYlTk1o$4Pn;o8l(Wd)nCZZ9>D199wH2U^S1y4MdN-eX z+*_*arZqxCr!53f*dxN*H`UND)I@Ngs=rjZmqc=!7(%S#G9fp?JxPOG;t*hXM)C+B?Hl`|BpnQ8 z4*FUgTJ5IfUGtk|HO-4apiFk2d6b}S2d0JugWxw_{rf-%gSEzVFgTWR9o$?JG-UqE z+Q+~We}*YKJL*i$F2)5z4SPo*iMY^X7(n?5TPQPtU`$r$_Cn16$py=Ngv!?(Y=q8X z#jO0(UW52E?h>%xo5zxwjZ*e@EGx?M8leciK=Ig_^zj*s@WQ0UC|^Qof7U2E#L ztpisaN#)P*Bd$Y2o)AA+0nYSlt?8-GztwpYyV~e}jVIAQ2Co)$2#3G*ZbsG6QlUFM zzJV~ZejlZaK+#T!#NrlhgQgO5w22b zNu(F)R6D)CGO&oo_P}bVY%Wl8@>Z-LLZ2?9KAA^U_ha`Io*9OarF!{tzJpM8T}e67 zyLQke2h=4AbR;7DkO_sh`nRkp4J0*?t(-f~w5A_Tv;7vjf7F_OJT3QPJE5)V<=vgK zY-L-2)Bp6Y{gweYb~n6WpoV?Vjc=~4?C%`ybx$^7GN-GDO80Yt!|~kwqe*AHyZsAI ztST;Kun}x>6E54^a+1X#f$P}bcv(e@ZEL!ze7z`tS2o6FXZIpie&&}8+AXbpYnnk{ zf8HkyJA)(+&4aVGOK)c%FU-AbP5=HoT!67b(zz<~tmhwfJ@NfS55=~k&MlCj0RC$_ zVQwmN!ibdE-QHZ@{cCIbUwN=H)hJF*_}>McX?Q)<=BsDwb)>q#{4KO-rbO-@9 z9QB~3eQ|+A&i_a%B$o1{H$p6YqexTvtX>?Sp4@s21g(%^gN#z2V_j~2P`p!SE(Ua- zv^cN~?u}B2DH@6aC|?}a5#u1cIzm5~|3bS>QkjcBobnJAZyU;cT?SAwr|v2~LT{{j<4?O5#*izsI8+ z{z|7am4;JBh@hRUajV6_8@~>PO>gQYe+3#-xQUekrJxBi;IN70-a-sQn7r)FsBK+7Sbz zOmgtdLs5)P@OG*cvsB3!P4g90%>urSBw+y*xb=`VPNElw(y^^PYJ(FA)XYXyzxD>m zHr23Grxnulx$CsiTNT-~& z7}C|zwKCp;So!U%uiRHNrqQbmvFUig;B){eSc`LCyinQy;4%hv>OU9Pm- z$3Y)vNMUII=wHJ{UU4>ub0c05hCu9w0%*2ZjFT{%j7t-SgJ~f0iXQGqTM?aw+;W6F z=%jSdgoTpUgz1%eNlQ^kzO*Sd1MQ*P{B(+k-z7IH@W&w$jU+FK6K8cW5e>D_;?>jb z%q@PUkLo#f7jx@i$)p?c)5G=P6GqmHjB|mn8xr!+GdDS<3-)6ZWw7BP2(~_ShH!ra z!((Y#N>-L#dIL@(f~`(eh*D5QL;F0s91_ryxND`mMbrU6D=r0eI$VYyld+w~0P1LG z*Eq7C0akKGtnaRhQP572676%L`226Pd;MGL1D%`vW!PD_$wO+%fj9b8GfUh)+wZ1` zxxiXcOI?aQTN7K&`%GT-+&Q7WI=ZN1ion0YVCd8jx*OM5L^YRz`?Yr{%G7UiHyN%0 zH2AQ+YXK0|!(VsbAiHN%fQVcV17KdK_}g$(+sd%Iy;2$cargXGIiAmZPiL`B`Omv# zLm#fadC54)%UP)c*9jag>Ex_;7aBPS$<+T1H?nr!L$c`6XEyameRDycRIMRH$=-kFMiK zu5<{;>yG%eyBynw+QBIa_6Tpbu`TEjV-6(~EjFQ&AZ~WSh?8j~EEhAB6S^L2 z#Jn?-Tgw~5pklNOS!quM^Z1(c^*jH4 zs{cN*-=EAr)$jI&!_My?fA345)cc+AAsFg^sk$fDiAy{dUj$I83OqmZn%V8-vPV08 zC1Ob1EJNeKjbl#?D3F@bpx)ZGMAjM*hRMbz1=-Z-AiUbOXuXMM+pU8760HZuD^p_1 z=BUZ`svm_)b@t*8S(`iPDOnv9imt zC#dx>{{$wDgF&OLHe(A~_43d+d6@v#n$Ik}7R%#=#5_`e;!p-P^BEmE>m{b@6Zwod6D-GBc z)K0v|0lI+SzS0M@pbD`yv5UNpryr$?=eY_NTu$KGe;?LQl|lom`jvf{xB*=cRMx+G9E9&y!IbZa`uGacm)&I~Yubj6FFn4xwU)2jj3xXVfiF$qaV85` zZMa?7t7~bt##i-PkSKmFzm90wlUCVrjQ$ox1=m~r~P;J!3XCOztAEasQpqsavibM9Bxomrit>hF*l#} zL3|Blje2ItCQxDon;Knjf|Z^)5#`+MuMH!38c%xuIb5@;Vm^tfX00OSa&8(p9=iI< zU{L=zSP^O5@<@+rA|K_{POS;boBLjTGQMvrj_upnO;|gkL!;!F7h1yMOo*58tmQz; zL`ZI=p=fzOD2wGr+0j`XSTV4jB@Y@-g!zB|i#E`4F%oxOqiNeD2ILEaD#w%XazAjrf|@~rT0{2=@R zna>Iro$22mK+s_L(xAlUW+roNOWg|pGI^ggaF{eB*O4%wmu|guj8Tp~APVy`F&t4w z78BRz>CY+@sHV-5c0gilxsj$-@W6I$N6{;tFB_&D+oKv9UH;?rl`x-BbI!!PNx{x>`*!IeX(9&Z0_XNLd3nc2prLzfQ9 zpaewb=#-m`PP>xmUahPUUHT zEQdZ4n;Buxx+h|e+-|8Yt=UTXaHju{e%+{HiALFM&#}#_hnzixzYg^OFKfQZ#Cwh_ z22^M;K5uw*yAH>c!O9Jl2I)&eQmNt}OO6+fglR*94|4mc?tUI!mO88d`HOoDO0|ObhC-xToz*w%d;S^2y26d5bp-=;-7ENryvMDM z60)(gA+#g;9d?ru%t6ddQfr-OcIuOCm;nLMXq1kK@0Y(a;i1bSD&)Fh^ZOr8uUH46 z^^i22F3pEjyON@^+Ch!Xx(0OJ>KtI7!^x2|_AYuRX_rFaMkvk>3#M!?!*4rsT1@4! zz4Rej;IvRZ9(~hrsZ+e`Ibj{sQl@reC2+kQ*L1oEy~aAJ3{#6-#(Xj}{9wpTI%ad_ zT6rAg^)O zKhgmYr_J)F2viJDh0kGtX<(>~RHbhaKOFlrkLXYpu|)bSNA?>LH+3=dV0NI`Ch9TglU}uhrDN$fjyqbu z&}aqzgXan^LuE@0Q|DL##3fs$N%Hxk`FK)b=p6_>a5`KOz7OM4IpL6x!!g0>aqqts z@up|MWUIQoZYk9}`Akr^iLulxZYVj#UWiJ(SEw5h{hLmikOOt|=}E_)Xz;>MCIuJ~ zH#ZT9z=cDuv9t8y&!Wk2srckt0ldf)LBV=@T=ES0!j7hj!o%(n4amT9iNd--JL0@M^T@)Sb z;&z9_9Z0{kEqpD<5C9{RPQfmBz6yXUl~4dQ~MO& z(;zQ3=#@)r=_`u0h@Fk&u2VGubDrYgEqtzz)6M7{YJ{y$|A71Qn>n;cXLgaJkaNO9 zJ;PKy?2j6U<;5^lZF$|Gh=CI<7{Q6_6f3N5m%wWWp?{M^}aGLHx|8ScTi54w^so)BZ~>AsOaN~DwT6Yr4M1@QXA3IjuBXL zf->6gJ)COq}9a;hL+#y^|*V2jq^wixnblixcayFp1*ZCpZV!s8nnv zQC7{(o=o+iJ`W{KokihEbhOJDoM3~U(+#zfm>4DCuJ`71k%NXH-ILd>RlDhuz95mi z$xhqEb&A8LI%!Ill>xIix*9TMLUUE>F6@OD zxhN7}Dm_oYT`KBep1~+*LP`lm_U>98P(lq%e)<7}#^OABM#YT5#j|Tjca0AC06S7lAnDAy=zC$*A!q&wB@6 zs=k@(e`5(9s^^lh9+RnoCD0%I9+ZCe*Mk;${FPkA7+ZA`MXlC?eb0GZ>xJ&Ag=b8B zVJ;?2iFTW#mJiRoDTPuJ+ozB&$v>UeQ|rQ!e)OS_bSV_({_~3Xh|77~@}!Y_d9GO- z`J#_J80$oIG`P=j80M4fx!GD-psKU1dF+eNW}mp5-Qu%nPv>HyIEC)w#vn;1CP3hv z5kkoNW8TAFh*&7y;^EEN=hia|_A7yfFmghg2w=NYH0hjB31=%gdP(r1RcaUa^1#)h zwj@in=oj;w0-X|;#+l{XS>Q8tmaDQRE##M<=yoHSq>DKcAyUHLn`17ned6HR>_b&V@WzSP7ab==46XnCBQ&0wW8be zgWh#fkIs&JO1T-;pUuq=gAH`j05I59|FnCK*$fRp;|y|fS`tvBgfn}--LO8Xfgn;i zJDCO2Vw-r>*d~-y)R?{g14Q{6sre&V^aP5OSb;K`jX_QX^zr*Hn?Gsif`*8G{Qh7} zr2|7HjFNl}7UB=>>V_mNFb+$fT1(2MaXq)F>_l1VVjNC!`CCh5M;ZpZA7ZE>vSOV6 z#KQy$H%T0fj+ns{Qn8W-*HR9RpZKqgZ8{7?HEZ4#1zbySi!@hJ5JfI+{fKjKGvJz@ zrzspr@Y|1|EoBdU_S54xtsl*3$ryF$G(70j4U#o>Jrn*cyOkW&h4vvAm^O=5>$iRk zdV5;HSVDZrz|!;-Q5DQ6JRA;4>)#_+SK})kKfe+x!v+1O^%s}`qc}rykV8%#8GZ&U zE2&hFZT{knBwO+qvYtfxins(C@-S?;6H!IIo6!B#{ruRpsh+v(FE`A3Fm&BGc;gKM z3h%cPT#dvGFo|NjyIEqwH&I($GZQpgS8ri9G61tB)W!F@fdfomW-+CzwOm|0-!Kgk3?ywwqB0sAiCARZ zMbUMFqCUL#JgT9m|1TPf^Se6ZHMf-~PP3V@_oykHuQRHDBUXe=a|#%sxi733Fg|cJ9lX z*W8mQ-xP)IgeELVO)H_bk*t(daCx*aDESB^N}QfibIw|mCRW?H%#x+ z-NLc|tJn3HNrM|;#)e7%Dos(;Jrl;!${^>c8u7>Cu-QkKGNjd$-W_`ie67-oa?XXj z!LxM;77K_WxM(m`Zi($3a7CDBX7eJ1Oo|1Bo+1hvG?$S#&v}NGwYj=gvI(ihjYk$I zTXM)Hpd9;T4PpHQcC~~mGRBDm9{|;>5s~E`4~`YwtPPoERg=Q_YV`W_K;+7JaUCa= zLCQmmJYl(Imv5N_CzBvs1gjbHM)_}1#+U}ldEU}Om&wt&z2n(;=@AlBy}UEqZZGeA z#~05!YT`oVu3ImbH`ZUhE-6GTtP3kiz}xBR%(tOoS)5?`>*%5)*iBlG!(y{AMKN~{^1x+MHmL`X>JaMFm!c6?B;Kj z88i67dX9{T_u`6Qmvt>wSAo!%svoCN5Df#8_nT!K4{5YFO-C7mUARAECkN$t^^mTy z5QX(w`%+zpbx&XIzz0BapQZ!C3qT^JjFLFm`*A2N11d0$1~2+p)o40-80ej3_rPF3 z@99VIW)~Kq7)_fL+HvaC-4|oLlqcyCAcT>Wl zpi=i78hd-MX6SfvV48pUrQB6u9rffc&~ZMowhdNn|>OM2esxNnpV z+-_(N2~Pa7V`y^1Y|D6ia-#IKy3Vls62ZhtJ!q{weR7vyP6{p$&YfhIxwW!Z3q5x| zS0rDMo#4b;_l;L2lP9>Me({HDh+>;nqD0}6Sfk4CKpuFkZEIy`eK(IYG4m~g;nr4O zN47-hh?Ngp-9H3nwN@+y;6zEc_Q94%`>u-ImpKY>4;gXpX8+^d?Ec3EUfNtisih-J zOcp5GVuGjo86Py2UmcR+=**pX6oNZB^dEt=v1?W3_it!x>Zoy4_l{(I@40krk2ngk z$?#!X{-TcY7+iz~x6-)8x;aN@cl-U{POtVqoX#!o%P&K7!RQEv;tb*NC9SNkiPEP@ z=9fsE6>rrES#z#J9VKyRQOt45U5*)reCK$(Kv7DCrvP{-@b}(btO^>CkJcB~KI-Ax zpfg?|)E@@$vdFmi#nB2n^cpI}@K;BLQlNK29b9uVg%2+Pa!rjE_XCXUr>m`fu&*K7 zh3{wgp+FpdV#x{8^6t51AJ{CzS;ZHj27R+Dzy=stxzgggmLMcv2M*p<(ES_YM$GL+ za-Oje#-BwnrDl$bee~4nv*>TlD(EFT6tA}387=_pQ=;Kw5#ty{AP2Z2VQS6Ys8n>e z@s@iZ!5H$;ZDkjpfiTM$7=E7Pdw$Ylg*~H`96v9h+(T7bhqehUxe3b__ zmIe8T?NMl(Q=GK?hJai^5+3CyHvk0Qf-Rd;ctgH>u?ssh`LiPnVZI=n>7gZ)>K%co z)9ATTv^J)i?Sra?lV_|{?ERdlrjv>kjH3oeYm}3}P>xLgciZ6evhQyY` zK!bDl!>a-7ESQ>wdz+4yUEm=D>53euoSotdLyPGen~BIZQnw59LP~b>18Ef=lGMTH zlD^q_(~z!kG_NkxF(&$*t05QD^WC9KJJr@BNtT!IKzv z(prH7FjUT_Xbo67V~8sxz`0o-p?8sXJlKS9 z_1CW+SG#}Te6h7L%^=3t>9Nw)>YMGI!78!s&_eu^=~|2N@4!BXn{O%vgJ9{6hceMB z>LY(Bw3TY64#W~cJ7kU5($1?HWs59O{D2r}0KvU@W0}Jq{PqIsh}wYqb5Lk(P#FBe zMyg8ZCEWynD)-<@N+(x@L2N@HX&`)cXwEe(RKmB+fH$s`Q3ZaXvKM$n4r3EyirjB5 zclzVh;nd+zIvno21lcr;r)=o7OI>qTJ`8LUtg}BCFQDkslv^|Ok}g=5nC$JCC*d@b zJqN~5NGOiS(NaS_)66-qSJrZKEN39V<+W=XhN4%7D9i$1!!fWu`Kg+J zD%MJm-AR!Jz~^h;^0}$zXXj=sH0c{idbpA%v7K}H_rLS)S|zVWHTI{*2}rsU$dCh-ip@H`p+#)59bVl z8~!&%sloZ#^Yn%h%qp*o7T-c5C2@Gz!x9b&hlhXLmiF@KA8@9c1Ccg>>xTRMIBG0O!5Ek#xjMPT6eoXek{QO92A!RqbD#to15-|M$lVFO-L$ z{niR2z<1 z$}5)@j>#B0@`vy)(^)%2Yq$cTta)?`uKhzb5l8=U<>)%9F|s1$55aa~Q_7xH(I^1J zhLQ^f>e1H>yeLnWQA1QqNA*%?TJzE+Xuv)yD3klHFd2@TB|z6x?$rnW59P2&j+9^d z2%%O@5Wa(b9QAmRX;7RG*9r_b*1t0)m5uVL8gNZTzxDDqgkVWFD5zagfGvg{k=?p_ z`23OjEwDua$Bpr~$TIQ{%hXzZvGUShT5(UUtjx^kYt>8&7D;5hI%f;=sbhuEz54p) z#uoW=wL2mR^%y}Fwaj*t05Vf$CZX0Uwl?LO3YIz+fcV3stETUw%&k>YJm~FedQzyc zZQ3oY=Ak{F8!$0-!Su*Arn+_Cq)%rG)(?as>0nln+V% z**j{j%GX1i!g@;!;D7T+n#7bcudGHV=%vcNOA=gWzjEC|0y7yAnwAT*%Yom`Py$C` zynvKJ?!PCg%G4Fs*OJ3w@Lh%2Ma6TZ>UdX(TVahj#qgA?cf37n?fKN!f6)X{T#|_c z8IU(RIBU^KQc{0YjV~!z^KmEGK`2X}P=|732_!pu8%J5{)d@!Yjp+vXAsKh!CX9Ht`aM`KWFbD}%x4 zaU6YP*$)+O`iR0pY)%>)2{H9Nx;Y9m4zzk{#0GsNhg-QGf*w#Ot(*ju9a$z}5A{jx zEy`SJbsZsxP123&%BHU-1Q(?^M=cWf;#`3^#i#?Gn)+}$Gc|Q~38KmsO5QzMerHPn zkw6ZRuDU~jd1yx-v#$Mk23jXs>e|k)Q5MmY8mNdkId+e; zy=Tp0@qd5(&z&j}D5r$ib zDi4r!1`;GP1lDm~dfO3J87Y_OLlb`CKslz0MqWF;Hm7-$vf(MDah8I|o@~+REuCF9 zV6dH~9G2?4l^uAchRchWc%EiJ%`)%LI2f42(`@Z+faFP->nodTR|pN@aK7SRH`F=y z%qe-e5q~wnMi!==oFxrmE&Z|gF_neu_8%{-pA zfOWle)|yiX`wkZlq;n;7dU2??#?j}IBeflVsUE_?>rsd)`3GKoJtIepFRD0KT^-|m z{~^}IWy5%6v3Vg%*2ofA8aXkGEnqWzRBo!}6+6lv>&%UlOo(0}5|#iJk9PEBly(yy zGpQP_Eg^N!iXYf=9VtI5AO#R$AYa~QhE9zGm40^&s<#d?cbZ-&X3F8}*X@BFX7Fhr z=Mp`Ib8{JfYpqdPotUY*Q~*)}BV0}Y69tE{Y78wFw)6%5|2Vo;j+)eN@kzU~zOo z`rD~fmS{wwE#Gh%M-=%|CZ-cm zg?0Jo^%-1Z;>m`nxj!&>C@Bd!a;~SG2sjGguxDnaC`R0G{fre`XY#rij-vYqucKp? z`+(kEkrqmNJ~_U2vVE@8ia;vFjv-udeZ}!Jn6IlgFChfyfc5VeQF%oN^49vY9@t2K z6X?M^QGrEopIi|uXl@E{5f;NIcRJR}535dGg5^Z%!kN2w1-l(`N^NMo$HvD(Ru7q--k#6>9)95|Nt=jDjaU$?hZKxJ zacE}Rq9JP_R`WKUA#R(q2tA4k*jy z)iQln$}^GlM_}Dh`>b~?{Uuom5j(G2>%we8oWVy>T)=gYyx>ay6G-AjKv2fX;6yXP zxefjHQF=-X`B{nrF1A=Y(GR$a1n!PmFh>%nIkF7f!vkD3SPmlV6OSNt%u6JpwH^}O zz&ZqeO@^Vz9;Eyz70-Qd;nya%x#cKU#9dH6Xl?NTSWsm`jYO_`sL7d%dOeGDLEjeZ zmr=azNm7{P*xd-Z0%9NTgE~dy?!uXdU8`c)te}!Q0;8+yNzNYAdXEV#wf7!g^5b-t z+clTNqFC-%bBko;bk{R<%KF822JSG2f2di4IpWMX>*T?7INRjxejOM?4pZ1D(=6pB zR?ftU*12GxL@dOWmr-%Sqdj#KRZ0)xLg9+?Nr(l7X0Tj>P|S%A;|(A31mcJ4;inIz z$25n+M+1iv0jdBN?rSbZ26PkQSC4Ey^;{O`kI?MtIIrU9)D zZCLflk~zEU8Pkl@G)sW+4-1PWW@v%rL8t)*&AU{3Ztbv&BjB(1<*xRnb(H&nv#b;e zdZfqL2;;pQ=Xh<)aCCEp;4yJET=s(3sf6jssFmUX2u1U4oS4_fyids9%?H93P7k#T z9|=qquJw9CZ&J?K*|#(#E`c;mqOm>S8%q)WXR}$ihq`EJYD)vJ}0; ztJ!qscu~>C6cZt1JH;Y2V5~{7;uoRN1T3VYEgi&aY2HJSc!KNwSqlboePz5?>1%9M zpaF$WS|zn%a{S1axo8E^Xoj5_&!s-CMjZUe6^Vq?d|wRup+$-dTT8{8D60V|N!W*c z)y- ziLB4FzH-}8SZPP^Zy_~2Fox?(h3~`W<2;a?MMDDbpQneXKpIQxi*ID3BS64k)b^V! z$tD=^5~l*%Wt`DwWVOuU6Ti~^V4(Kf3m|p?Sv}UJSs{3-OeCS+yk7QdhKOsV}n&?92hQzbtN~Cx?!4CxrhjFHOp>X`)a}Xt}$h28c&f^cHo2;aj7EOo6 z}S1aMS27+;A-86?d zcfNiAusMQOorB9GY@)7|47O0v#pm)+tLXp@hH!_R`)la#Y9bOhY0c)tMNwS61<`nt z&zRfO#y?yI$4(;CrOyf3KktE0-r0@d@s?Kb=Oy9gYRXU(t;5>ebfX2EdHI+#ChNlo zV9nt|u0&=PuxLm07X9A+U=|cvc5Ft~-1SAZv0W)$Ty(Y_4Xd1dZvRU81#>dPOKSFXR7%_F{?{ zovKK-w9bi`jhI33ZmXWZjtkP$k|*uM<~Nq$vdjn_c%ZoO}iXq@`aXN*Za~zPyT%g50uX7 zwH_fCZk~_l3_o#fZYawtRkrI4cGLKSu4HFFyNiA6*^}FM)e;f&+fwa$CC%)eWDA*hzI=f_MiO zbO$D7o*DTMHRrJ7T9YlZykx<_E_Ir%rKbEhf?dKJnF#~D57w~)_&<-csfzo%lu%^h z?^JuxEoh!D!R*6pG-)<&oR~zw|H6mds?;iy#PJabEFt+h%}6qkbs|kOPEM9=mJ|nM z+JG+H?2E-*qKjiipuo7nZf^U7;+$j!NQev2%_~{Zuf-3PAIJ+HGpN};6L)wX*?^fJo9lK~mNzz%s#V*~3i#NqX#Mrt)`;Q(kHJ)J*qJaDaV8MvjA_s& zdq2yB=C8y!wb}?&BGK^$0u>}70i~)hAg_akv~ZXJR<=lAMQj4}0|hTS?9k`R?w$p>w3~G=tl-IXB*@-dU%tT9Y+=pVU zeVC+KD;6*}xD!>oAe;32hTKwP&D}LT{)Z3Lu5=?a=EHk>`_IYwa%*|1f5zW8JuEG|O@?85wH zuq^EJ{6KWvz{C1bYCvT#qes+O#XpjF>9jj)bOlK4sMb_bFPnsB(I^Dli!1aJRPY>u zR1qqycb#z|dyI?mKwhH)z9HgJT$Cw$3f@H;T>P|ej;~FX=jXmDASz#*QmrP24)s>l z>+zxw+^QIt(9k((GK3OZ07xp}JsGZVns2VrznaMpx;KNQm^cj`t{MHM8RbK#SqBq5 zIlm3A4Eg2`fnai+%EiG^(Y&zGfLo4Ve+_4CYAP>8>CYGia?2VpCxla+T=NkWaVZ^P z)0DHGJ3QmyBrNw6wU23`g#?C+4;dXvA_<)C^=aEZ+ZRNDw%_f}HR70bidtA-qB0|2*jI|>`KCx+Hu}IhYJ;Kaj z0aAQETHHsNKzcC+P1ugSlcB9KRmvB!hUyJ1fgIWg$CF)<;^fgz1+R_4^Wj^{V2u<= z!ss2f?H;67%RFK^a55K@v{^i$o^egLAlQLI|J<|lTiGY%+ZWlC)PNMA@xyz_@SZmtIuqjPU|thk`QosG_u^AEPi%$KGVNB&-W>9NU&R3D#>`W2Mf_O zOiy(divyk@qC=|f;qcIhzbsYLs95q8JnWh{Kvjpvg<_s8&}|SQ)`g z8DsuRG|EM_x$=u8S?VtheR$B?c)49(S#!$AWLM35h*O*cnYs(vj-bBY)s>d*fS4|v zp^s3ex)m!a_gfoe!A8%3wmF#Rr29X>K7brRml;2ruZ_#!-;e|N8%o^O^{ADkatnkG ze-4F%cWRixW?$&;dK22ZLb_ zsxd9*Yi1IiUX8YQ{#ZRUqGiRi$$K2Ai8g=Iu@*IJh%ClabgJd@8HVrIjDEK^F_G>Pfu{#r4uy0f&TfROy{)Ugg|=9xtJa3SHxYt< z>>#`DRAv~=TnY|ny){{=X8}e<4r4)jY8D*e@obe%apUsxHw;Rr79uMV2ysTKBTS=< zm4XbBAHe*2r<6oD8yM3(enD;~IiIagZ)S4pu{hM}h5SvrjL5n=_B!sC_p+YHZF7OQ z3F9ts_sz4}*d>e83JQMRGqttJ69TQxm93rCvW^%De>mu$WCQxwKl<0F^9TKF{Pq6{ zzxyxqVbn)09N(Em_o7d83Mpd|6&}FjzNdYQ53nZsD0t4mskJ8hPAsD z|2oi!N2k==dC=Ni-`=gHvVzS!)8ZuhSNL%LY5u7Lrg$O-PJl|t{6~70JV3|#58A66 zB|yFN2y^ndYM;yl7p#*Zg5&l=F;N`y*IV0W3+#XDl3mp_wLMa<0WRc~SXdad5>JXDJt>Ct1mPm~ z^ki;K1FKIMQy4qHKMlY0>zGP^D=P7Oti-QlD!qEL@LlYQ-=Brw`E|^uJy|H`Q7j5= zjXoYvii7y1IEYW4d=Ez3!}kqc;Rli`nv1Q_iltAR3k)<6i9Czz5JPMB&4gpr2o(ET z%;ShQl+7r~#0}A3QJ)mUzcwvrMdTc0$WTU9r~+uX<%Px?m9H;GhS`hD{?OqtYHGuK zk=a5InbKl8BoL?d_=UB^)Ig!#jF{c9LSx3o{0UylRcZGY(^3hLnXo zv?S)#q*Ip;+?&=1cJzbSm4mE(5hK{#ibbN4CJ%kD+OF5PLZ9TsErd0ZloXUIgAekV zr)}v&-P#Q5cOEe^T~4R62vW&q6j?rO(w@ca(8G^?r2I`8oV-n`>LZIfO4=nbo_-&A zFr-joJ7IrHStXyCn zUXW=bg1#qf8u$4S4W{u8 zirT-(42TpO02%eFJ`@U)W z^=g~oLL=oM)IfpvIaLsbbZ=CHhDQBMLn!5mq_v6R4@L7fs4Eg)+(2&n7cmR8+PAO9 zO$Cz-_q%MCyLG6yKlp6^tVL6iUy8%bO__zT-cU$p@10m9QNzdkn_Y=u-c0-o7GOQR zKz%FKcQLLpt0SA2hi>7BCf`4v6x<9CoG}}vyCH)-0tKgzV8Qt42q>2~H1T*9J`-Of zs6O1+>)izsmZU4)K3|xh#qmk^d13zP!hB5YQ#@4bRZ6EGGRX@AwS|_IW~2+#{`|+e z-{*gS@)KQjUr!Rm^%_dWDt%jRaz6T1waIkE*jJk{=l+WoNI(+UFD!%_CsN1BpXa%L zt*lVr+6$iF&Xa5jj_7p{d<$~hHr+a?+<(Ke6gL^2yCg6rFcLfYx(EFZ_Zettr_wQ# zM#vuEOn5yBoCZGu6dGvD>+DZe^;^8>_BDbPg3sC4Fjw|QhGB0jA<@IhQS*0f)58VR z2i>!2SWg9+xzCQsE8@?wP;G^81N}K~nfXTJJFVc58G6RWtUqC02Ugn88i$KqhDY7% z>ys{pi8gcLl(rN}_Pp&_8)qOAk@k6WGtC{O6wDfILDvjHU9>8peb1&p<3StS1O zqFVGM2n8LU;wOpE;Lsgj5`WHO)qEHOj8|7EM9v4P+P#a*TNHv}2{jRqIds%4oSQxb zM67SOq(mbL&g`Au^8`^VbER>Go|}kf9HK1p~0AxgAc$Kr0aXKzCD)(a5Y{T!T(v#pxchVZv-u zzt-%+O_6=7ilq!Smq!OXALaBf`!>{JoMa1Ex?j8$K?AT74dhTDtae?PxWuzd%kZ^# z8^Gc_KN&|i!J%+7dNvkHeZn>L**4~sk~9Xyo_oCvCiu}%VhTO;0C@<6EkeM!I1-gf zGl-3tyP_Cng?IJXI=5*DWp;kS11w`|5Al)_$c0+J&SfBQXv2z41oK^uCtlKRzyTk- zr^xUyYcx-nLyb>f`{!pfvUUEiTlo2Z-^6a&1U_pdnnWh6MW}Wq8+!V4d)iQ!C}th;GShL0`sa%@MBE~PmxQpG1vfHCJsNO z)|pHvq+VtrajQV>f(j^wd}P2TRQMjm20e?dhj~9U={R7^W)Me}L&K{roT$8Iu_~of z>89v2b*bZk2K;kS4o0u4BGq&poFGd*;ys|2`?^eho!o!sXKj8%=T04XqQQHb_Vvb% ze;7^~#q%4#j<)lWam^8!=>pm^K&RvStcUphOLhtgwS*6B$og|$Hn!$Ty2UX2HZHw0IoCvem`<67p1)xeDmlRi^| zPQySrzGr8#ZM%kHIr1&ic?>QcC%UtXUFXo-x;%%)w>%XkF&fj?QBlv5gW6+3u3>;j9#b>C-i9Oc*)8_lmJRy-z^_Vybx;NfdcDapk~~yJ~-+e*5yc?dY>(X+j)H;7G))UgBcHeUQUc zG`S0tHa$Y#iY|*HJXwCg@)sYy*MfNZGe}%yuEqgdI<9^TtwvmukOVMNQd?)0bL)+{ zz6^Bk_JTVv>LbD{fTTo}lN*C5*m%l9yc9ewB=6Y%Vxv%fhN2CqkEtc+lHWvQJ4iIX*G>Ah!Uga2y1Qs2Y&}-+IH*vXum)S z&JUoCCnZSXTWIC2?Y-sH2V2nPRYGI$;ko^)0`X!H!U6_UIrb!iU(NtBUsD`kb=bte zUb((LdSqrA-1{4qL)sEfk-lB&R7kyTUo1Snm!sK5-4w~$pB zZCSV2!mi%@I);&#Qe(S!{h^Bv@$==a8Lp!)W@^eZhdzAt@2%~S!KIdpW2rjsUmwm@ z&#PmF6}GmWA{SXF@cTVMY!3xSs@orWXXZZH?}>O@;(v5tVHZt0HJK%PR$QyT0=Lgl zcSz$PwP|<^QFvpNjYY~)N39MM1yF#}F9Irjpib2SZYJmXz%OvAsVGAAF*!u-q|J?V$nMY{{* z)$p$bUwq==i%%Z3ZyR9w6toTx+UHlFuJ7=w)z4xasX06D+Li6Czpd`f%vTS0*0*-& zA9>A&#z)ljdUL9`h^Oc9zlM5JTeDQatG6qh&h5tnad&EE!GAm%L1(M@&bUNu_Rl7f znp~J!oMm~=pUmPm${BKOHC$p;6xZz`JY1_}Ae24qv z(7!RYzFVZ$cTZ+#wW{AenF~Lk#-B~Dmfrs8M%CPm+TuS??LS(E@1D*c29B;6;Fwkf z56U2w`((FFpvjg$=p>iRLKv0|(?O9JF^?KRDz2uFI&zN5SH3{)hRFp84MUd)%VbG` zLKGIy1HE*_CcF(A0z)Uq6NyJOD;lI^3zWp<>%rP&YBO{d+x_0{5f~mx!_1@|sl0@U z%=O5JWoE;$c9Zlx{J>r%-nr-@It= zDL_gy5T7wsD0kueZ(|NkC;M0r`ZVls*_s{y^`fJG8uMf*h!qH!Tj`mDpfmbQvD+ z9PE6?(G$8aS{&!6hoRWifx5AD_1D$cLxm*=T6xybRNt8_q!9!b-nJuEWiT@oeX!_+ zJR4i(0X9)D9$T^O@IjdX75B(!ol{*@mLvG$6hZ}$-1Xn3fezIV+Kgl{$}uh zaLu#sozEg@>@M^sYsD+|x7Q3Pl}bWT09JB;&^c}rn@kKSI*dcIP=sIh|LoaiDjKKJyZy-bRHwmR18 z9y{rU4J!Zw11%&V-Mt|(w`RA`ue}`;%8DvtnmvJ-jBEi&L-eEbJidCd<0;bMQ%xBq z8F(kEV(qXS3m%WqRpQUTU|!^@@@G1AQqP^s;~0&^+qo@JX;2KYJh-b*+rL=h^{*SbfuNl5McM5wmO zrMw+O2$c|_nIH>d=>CazmP>6gp;uJI?A7fPvK8EcB^R8>fLyaIL|bjZ6P#MbUzvzT z;${Nq$hByIJKk3E(MFQMEl2t}8yP4g%Hy{67`^qR!hsCb*m8P26Rqu>gVSjr^{=So z4!w{h{S6A~UjQS9APzPr18KWs!TRnp&LbqoQL=X}JzFRQ6e7#;Ym*F;U#YbC;ee!6 zPg!N&;&=SjR}w_dkus|86;ul+8$~lyY|QNMm4;LQXQ-aWr!~~+0Cs%U+WpxjRpW6r zJsTVNk@IYI;_6a29zll49J3Uxx~<*Km3V21}C>cg6=zYI)| z@oiNsk<1`*E~+vxwsf#9jG6pxJ90}2LJ{!4$x5;>S1fuVuesjoYN&G zTk(U|?#`~qho|Nv)w-TrXzlKbGwl=E0J{r1$acX>)zY z2h(iylh$plTIA?pmkWo1%nQ9J%f8$w(L|tL1mh%7)NghJiL|} zkKZWZ+RLhgqne=7ADWn(Wr}%C+;M))^?%WEY1*n$#zFH|!>Qptj}h;>0xYCa^`Q{% zRSp_5WEeS+D2{Yk*K@dky!#$Ry@}n~;Q&W8V2`KsbLf7O0XY7Td_?0oR!(Gpe zrCmmPx&_5EdQ<-v#i31%0ol7{S4n=Ei#x0J?)))N)VLOVMZx!r3C(c&1GK%dpmD}? zDj#E!=P<#?Awix9;-4Yg7X$j6+ zyH~f@ryNtdCp{DW z*z=IfsD-_4FxDl>L72lF19oAOA&1w3mfJ+Z6_-Z9T?`65S=VIynox~F8z{T^o2(;h5tInVQGb9Z9S8H!$HzEgNp8@7(ZDak7zb)Jw zguK@PvbTwA^6bjuEPgbZA=)F6Oh2MJ-P(9R7oYsr+S~f;>g#H6XL)6qAKB{$Nho}5QMP;X-?PW)!)t=c(h&fi zn=JN{UeRNGgO>iA!o4e??t-s+U~nAnc$A|!h=7Z8i5ls=*jxS2U&glLy>(u$uC2db z9Si9#5|FmKGYpqz?NA%5%fB|XHUPD`yt1=3+*UD1Yt4NdOZh!szX-@xO zWk2B6H|@5fUrnk)+jYlTxW4>=?1y8JyH@H&3Z7{=B~^|(We&(|T-hNWP2~)|bkjF` zTX9;^df+QjOSv{dC0u#~RC>&NXnCc8^k+1kwKC2GvOZW*A?Q-}^rGdRZ^!6FQ$C6lHLOt}t5Ka9+yJW=VC6G=qysc` z;ov><1+kzPU*XX;oYjS4aX=-qAl;$Mdm+ceP%r;v0i~w+*MEgtVRuCvIS3oO8>Veh z+HG$0&}w_7_I$PZ%Z6htu?tFkpvTa|p`f@}ByZSpFHGC*g<1Krao})p=k4)yFK3VV zgHrY0+PfrKg(BM{Gd%nSKNv8W`Lz~3Ho(Cikyr`jHQ1)*wB8FS*t{ckG0Sm)g$FRS zCDH4SbK*5NO=hm7J*hS9DoOXG;xP~njRAPX5x=0+-oxXg{!ld} zEBie*`N~_J&02bs`|JE-Nfp$)$RrN)C@4HFqo{`*z>3X8=bhn?lt2GmdFZ0AMKE_} zYGsL#g*`8LcZ5mh%I4%HIXHMfX#l<`bvT|AstrI}7gE4*f^vKGd30-8US+`Op5Q)% z;w!XhS*J5BiWvDPmHILY;a%)(b7y&7A$l?(Q~E1CiVKg#<@iz@g{DJ@n3Bs9g$B{M z08{Z+i|%Y@C_7`IVtZ4XNl?ELQTAqgYiDn!v%aaHa2)-uV!wqE|a~TI(i4`zC70s^n3d^mxudizUA4PUoQNVp?2?G zDaKrH=&&<7*!*~ijPwYBffb z4Sg04;~wyI6Ka{W&-<8yY8zWvDO21JNNAu+UcmxB;GCuE>tg$3Orm9`h^s_;NBk{> z7hOJ2mm;p?OzD#mwm)efLsRDxqZyjz^vc7aiLzt{T?`?9R!&i%z+xtR6L>=6!>K}G zb0KdMk`e@;f&8+MZhS$!?fImHKI>(PF?N-%B}A@OE-*&C{fdzt=)#l#o9b>_58l_B zVAI;(R->qyq>b!1>S*V%Hs z!^3I>8=h7pn47EI;ewW{-+u=)elsu($%n=@ad;gxocvEqslqd)_ zwt}pO=jM2oTPRH-d6oSEgW4%;qSi58PkkbRRSGWv*BXJ}HR=|I7u>M3eB_iEbp%YD zeACg@(RNZ(RhHT{-~ABy>O?m~ab37Arp7dKoJ-0b7AI|)FEpZn6EmdsE!BWqP0B%J zoL{O?ME7&`VvJ4Wh}*B~Bx?8p8_F^DA2~ihqz^26e28HA5Wkpqatb z66s@PCY7SXWMGeDtF%8^8W!uqlYz&P>vUjK>K$poGiCOdv4dFO-hZ+BYW=la(U(A> zzizDm4Z-e^1n?)0)~^xl!2_qH(-I?6hu~hi(%W)Rs$T2Y&D~<({>)mN3Xi7{{ee$V z;DyNdBY%>?{3hdBM`q)&kxLHLi_00i{S|(fpFAqg&5n+O?J3dF5`%hx2bZM}o5A`J zevK|++O{HprH)i`T7zsDl~US4OM{NOWqAD7S(t=l8~Mk@F_RIx9P=DwesA<}I>*(? zD9q}~ZPVoP6P}5g>)d_O3_pa_=e~+ICVTn0ZTX*UT<-D4*_ACtpO@r*H;Y(_9lCeT zJ4gJA9!0+{@T;U~MYbF4gZ9U7eqG(!UEg~BjePb9v^eM)Y6(^n&+fx|N$q1aP1Ax{ zU010h%V+Mtpg8GXgO{h!SKwiIpj@n#vGF5eZ+U=M0dioOqt~RyYQXP))^Q$!taqP@Xp^t?VeUr^fl-3$|!rqZ;wj zdmFKM&ymye(owStD(W)3O5E>=U`)fjh;kjg0 z-eL>-Xv)OdlKAxi4a#qJAI%)o$#st6!+{0U7N6iwq}M}xW7nK|D8L1yGxsin8F5p> zaYyKgDVj)faddHH@d8k-R4>s(zt~~Vx_xN5nVsCh=5N>X)rTtNl#`N;{Buyka!XGy zt`x8B3PL)uTDf?1!R^h+iWpatdz$I3gC6iPM5M<8mQRfLJ0C))X?#!*Z>jIFV6VvgAgrYpLngpZZ z5XWR)qo;jHqS+5o)8BeK+y4ID&mLP1!|zETWq&Xtd31Txc0E{s05V!-BnfmGu(^ZT z;Z|z;*4yoscWj>Yga>Z-di&1*jIP%YAN@H_Lht!N2UGC)AZYvHqmiI^I=nO4R*r}@ zzWN7~Sl$W%2M2#{h9PmkkkIV2louFUN`Y>CB~;oU-$naMz(=?mptp2ILJQ&|@}jkl zp5ws?(3hsnXwQ0h_|GyI$?e_4p$ffArw#~%rxP0?$Cu*0V!b%d3BG|6pSiPiQ9M~> zVp;)vqG0O^VVJ)7ucQIl?Nf7_6z%y&N%-}WWZyj&j#iG&p~}M`2RIa*g{I{Qz@P4i z%`D}c?M<`7kt~~tcy_x4gbOQwwyceZE9|6RLqQP>m8fW#Qbe+%|dV& zCk$d1D{-1k>0vp?y}h8ai)saS6HZt}DQWnuxu$n1h6+q{;!Neud?@70DoXU1Vff5N zB=1^nYK7xj)fiZmB)-(45+~`Xl!2D1(%=6d%^!y7ENTXA&a%S>#FBQV^`5NqDVkQ! zz4;GwHCvdUHYQ2;8`oT-lrT>RxjmwEAI;~O#F&J{E%#Gfd@_0EaA2)+_juYjw4?y7 z_mcgL!iQ4!Q>;QrB}=hgjOms=s|6wV#nJu0=KVOXX0rF&(@I%M^bB3v9Sp;X+}K!k zxn-E@a7;^*!K@k5*B*368Quj0#z<=&eMPGxEt>mvTU!mU(U;onZ z?d`jUk2NMSylEUS*L4GYB$TO03VJiOiM9F&Lga@BaQ@@`YKC{|BBaoWu<_vX8{v_K z_(3ZzW?JZ^c+W-AsjP!{VTw2yF8(1G7wu~6yI6rx5s28$7e!ZWpvI_&HT`Wh(363i zUnjakBacX@xwB-QKp<6|uf;!%D3>aEWcd&G)c?UNYkV;B4Ff0v$|3S#iTTI}WhozNlID&&8lRiC~}bUt6}hJRD4cM zjqC4D=LUMCTFW}qcrDB--aWhe&^_o8qC?j%brr)gDm-0t&??(U^F(G`jY@7NGQ)|3 zw4b0nGt1Q)JI2?{vanh_LwMT-ESRD{ITFQGbWVd2m-|!3Z~)U&tr;P@gP+0jwl6M{-)*SK(r->b}#DRJ&bpt2(g}y0x|%zssYbE zN<0vWx>9^Bh(XP{8xefJi@g26L~UeC&3xWOy_`0o!;tgfYWr$s%(lN(f9*=)^6E?sB9@3 z9RiNhjiZOM|KO=;!bwh(5xLKzO@&*)K9f6vZMem)!c%%hiBG#&wo6C!kW8`mdw&x(pOhxcCI z*(~v>Ypm=-wM}9$cGsTVzz}Rp68DrFiH93ERHm!QO9L_QFisBIEljPMdu` zK36vWWK|0vEmUscqm=$&voqaAJU<+=skV#uB@~-!diLn`!{C#2^kR3HBj&=0jVPSA zJfX?;wNXneXVnjgJrK1qHx>=nh;O7YONrULo^^1gLI|9stF;{IsivJz zy4ZZVzr44#2Jc&bm3Q0C<*|Rm&V~s{PE-&4Lktzaf}ewY)RdS3B45ALBl`pv0WJIx zu7spV5;E8~v+g~&yKj&@jL;R5NVc+p!;!@k2T!UJFqpZ@Ya&ti8TZN1T3Ha3qLD3L z(lsMil-nbOXadn#@Q6K3?F^YZ>OF^_v?_L-j1He3BYMFc9A6xkMWF4i?Y-*t>h9ii zv_dx@yinvC8aZ`^Pb3~Uvfosah3pso;maR22(U}I7dgR?Y#pu>G(J7m!IRz^&4kvG ztGELpNJ;VVW7;qMyy)nXG@edK;VLJOZn9t-CS(4ffs+$&({olft!i zaD3Db@l&o|#k|WzopPV+h_U9m4^TL{&0+P1r zom!BGw)?o7zJ?q_#Q5n&9#CO6!?h01?!-yza7VF;j8;Ks5LpTFTKFlM`RxF9*6X-> zLNH$4bS(ZcH!)BXn}lfbg-7y~4?jhXudahUBfup|U_Q9sKM}S-wa)bXJvVJOm()Lg z-2wy(ejiL%WZ;0aYx?JGuXBkM9vqY*_s^h=cB~y4J_`p>FhGEcBMxSzq_fkFj(!Xg zHlk|j-}OL7W}NQG<{laht|$R*`B2u6Tin`$Uj4hN7>=>NX8XsI~7npzUZ z-`i!+xyvTZu&;5#3V6sfl!ArzQf4>(N)@u6T=G1o4v|df2#qIlUqb>oLTy4=9R}kvkY%}cXgo`qdk9_16sHNYp){z33JPZxjk8qrGdWyk zXD0&w5atH;P{geL4CgADv4FS>MJI@Cg2EFjgk>U|449+b-0vuZTO_}Wf+_;XZxpv`gc;HDX8E)-{aE!pgZ!jh2UW=vg>oz*vT zEMWUPu@QS9SDBYihQCzsZFWXN5h>gdOf8hc-Dw=(e%71Dy*Mlba@M=77MSt!Q!>@o z%R=;S!S?uk!}lV>g6kNx7&E2=BX@l7CiD=X$=Ow^H(enH`YW~~KxSM^_Jh5@Z?C3? z?06-nOZ$C#b=&_C%Fj{JR3R`S?S-T3vKRUK!04U|Q6kofPx`I**-e5$@e)@MRBR3+ z>Pc>T>|AjiLh0ZaO~}roSOjW>(HS(R+haNVf#q=PMnJFiy{DQ=I*iK zmmG^R>Cq1j^sNW*Ck|15<@ua{)x$2G9K#lP;$h6SSuu69| zd@mzXv8DRwl(9_Oj(-trIrJ^{@8R58`7pe-G6%=o=_WAs9lxZ-Hio$h+f#MUO@kM~ zitUtscxCIwjW+@HuUpfbwsrV#{GBv!&*3PlyDrE?WAkGpr~b72P7U||H-X?e&t zC-h{Nb@~#V8NbT&X7@>QWJcY}wb1<2_+C1~{-|*64s_CR7DhPuf zFi7{IbuOap>&2#q(-a#CHj&~mYk!hHBOKlg&FQmj49-25?TRhwRKIYnI{MtXnDL*U z+d)o%aZKj221zmAs!sH^Q{o*$;b`7LfIYn#Ri?;b#fF<350$bw`1QQMSrOMb6Kgv6 z2tG~CDJBwwX57hCL&;#|EMz~-tQ%G(Q1PNf8zIDa0$+mJ?1*tl*;qqp60mlMA?C4YD^QCjoM3v&u_or^eW3->a?h2)+x?#GbkT$m%-O^F%w zFVo+0OV3H55o3*l$Bx?aFok^G%N*@Nj2G9Jgx8vOIV~ZCh+~H{o>Pu~wY;~zva9wD z1rZ=<1?+9Vn)h3Xjm#39*=f@i7Q!)rg?YQC!vJ_r%5;_$V9+@}MXepjzjFtvJOJ0$ zCl+-JVy*t6u4>bE_DmYia!nJAPFWeDoNB`f{g21W7(z)ElILfFMBh_|i;u4*lO*kg z@maABXf9|jyeF}jw&aniG!y<3E}PDr64#P;$@|l<^zMbWjjQTDtwjP>D)a1< zCj=z@YE$#|JrC<;9dhw$Uiy&i)BXQ5_io)$U0J?oyqZt3oi+!kR0O(#F*dH`BAiqr zP)cBvMLFd_3W+eGOGZc_GM)Y2-{OpZDxV(XJoQVDdMmzI|Ne8X+upGwB%Jxss!Aj6 zbzf_)d7pC$<26!t(dnL}^8)Q;hQ-cE6_6}wY+y3VNXLpfOW-`WDGy#eQN55wC3rOR zSOJvNwaY{Dt^%0XURD){8XtJpebY;8+|=YoU(l{x(c!5a;Dl$k^5jfF5>#c!xv2Ci z-LKSPyF~j;~IKfTzWLm{cnO5D~re4gY0?*xV(?M^Cn% zY;W9sMsCt4CI__F*j(Fq+$`2TDtFa32B{VQDzI!CXYyufFS_Z{2plEIio6z8PLFYU zVq;4WIqmXvXO7WZg)|N5(Vn#I2d!TLMS*4ODBY2fcX>GN9AWe%t&F~QjadssVQkao zG6G!T?d2xWbnv9z+q-(L7cC4ytjDy7keFpmXdNu~D6?{+2-wib3Q?A3F z1F&#cpmI9EYy&diT$U1fb7iVU@b=|}__8(`j;Xy=s~yGMsM3yctU+Qvr>??;ljs#i z)Y6dC>^_8(w)Gx2OjOoP6uOmMK}nxZYbLeXr228{ACo6$8UN@{L8J2Adt zN(Tmrn(Vuy1A|JW$r{zLGtTC>ZGo9=?RLc^T`O-c*34s(-uf+rbti{ ziShK1#7TPLj+rJHxXg6gJjA(mxwt3%FQMyHahFWXp79C6doV3ZC;yjIdaE^pJ?7=d z+3iAkOVh{Xz&5*+rVm=`SNFCy*6v?l(|w4zuPSQn|!04DFKuY56J(`GPA5M10WCXxBo2K@VrR4=NJ7dk(5n%zaPod4FtBAVF z0j1IWG^v)H?emcL8Fjp$mMRcs*Ghm6q7a*WndbF`YSF=$oat;F*S zb%HR5$aRB+jM_5eJV3|ZUOKR6jN~}2G`hj3S@$n;oShUAUVVBpn(Xg> z3b}859PJ)7zW!z~nhbtZRO{`D`z=%Al!b1<7(1zsc(ANcdIKd)IHQ8g-)*(jzq=Y6 zIkFHs5927hDqxOtEehPqP<|q>DRyqrzUcNa?hO1f?jq7c4`soT7@|T9!mkOwSLcqm ztG3A`dGY;r&;p9#UPlVLZTN$2M|}!>j*NG;`yRO(xd|h$oVVYH_paR&LD%llRwxK4 z!NqU{Q?OGG==K+#n1#c&pMl|KyS4y;B}#X<+~Ct-ENMurCHAG8rT)L19-WXF{68$; zCKh7IPuU3Alc20LJ?)=`8s1qzA}7$=-n~+@Q);s#V|J{E86)ZL9qxYxcfO<0+tyKx z-mvzVIiWU)E(X^Z)l4fIZ z#j3ASUv{FuEjQY{NSO|3F!4hkF=wKd*Od6AIftu3RF0Y{i;vmfyi!El+59AhanVal zh2G@VB-RN&2Ep5Ow#xymm8=*YJ+_&#uiGB@J1|c5()^h$uL__HStcZfgAbJZwfO4k zg83REsy|DpG<~|flZzLsuVaO8^4H#DSj6v*JG^JSeu`QAV@7ev$ByDzwR{8w_RHl7Ci4=s*v3q~9s#E*uicjAsKl=8L0svW%L3@n| z++E9X(7L)*C720YD`vywQi*g1aYGw-+fB{6 z6Qjt{c{P8IJ30L&;N!S46HDeDy{^*?ik0UsTwH4)B)f*hzV&Zczxmx&$qA$)?Dr;r zy|%EndH9>$`tRXa-K}`>_4^OScjYz+TMr7yI|3yLX9B?MmXsA2>`}8^zvjz!kp|8| z#(ipOkzK89iSayO%6*qKcL%H8!3cR(X;ng{2zYH((ugf}2QUYK-P0$+&kCRNz34d! zwIfrPjj2;tE-7iZyb+lpP?*8XSXSmdWf~jvo$2C_S3e)$y;kmSdz}}xI%vn;Pw-NKftO4U86mzI;A=i9~ z@Ek08W2kv-_D!8BTav{sZ0gG@`akrJ}Iai6m zCk7A{Pa}D?YcmR#uokIb)0Ep#rm{%d14~%1J&=Cb5L2lh(a7UIiQDhqD-ySp#Uv&h z@bbupV6EE`ccL~%o6_%CB*X74K?&ky*-LdNC#QQv)dvYAbl%zPBQW6X2F_3>_wc9l zj)mc9(kJ!_g|afB^BL^xdh_WkPu~OEl(Zu(no8m#Nx0n_q-s*hp1dY|g+NTVWKY1LvxkJi z`C_UdY5%#-;z4XbGw*01gQ2A{Fy2;~db#sn#dyGYNm0+6+Sd(V=wE|<)1Ghl`d%as z(|Qe8#Licla89gN=-capt1a7W9ML^(F4lwBRk{%^p=P3#Zp#8DZewc;BWQX0taOjI zhdA91CwdCO10U<8L|Ut8EWJ;vbNaH zh!W$4_odg9{#Qo_L$=Sg)CfH6K=UztomqEkIhwIc;5Lu7+>>CNT_KSTZ&cboVo|aU zNxBT3M-0OWMt3;R>pxwtef13Px}w32D5TuPbLhMV{c3sDTpCJ!ZD=$#!|^I5valQC zXQ|3ykQ`w<64DKj{&(cS8^5|rZDEK??k@6S_ z*;1P|!db@9oksh5X(N)SwQjaI6c5*Q*k4pGX2dmMdWXdjJ{r=%%P*n;V#Q>HwI^v^ z;$Sh}%B`Z|4}n-P138DxPL&1?17>v|;J{;cWShTTRcnzE7YYze+P>H`W9BDvZkr3l z>+FrU-x6D{d;4{;&oiA)_-v8Mxxm!@_*W4&1jJPFq?JogB2= zZd&muz$-(8Kxb~TL0-H#I9$S!g#g!C?V|SE6r15~Fz))!8=UR;d7M+X-Wg2ipQRUz zL^oGRia&{Y>2vmWDsDk1s$A^hU$Gy2IoW2%z$Sy;ZAIv8yW-?F7s6p9h_3A4d68Hb z*<#NpV>nLuLW;j{H=jP=Xej(3$Bwd1Qga1(=BT=~mvp=KBa zO)=4=zAc-;IlC8w66F z1y;I)jHMKu)jigO^@2ku=qEUZH47DlCPHUE+lVHj3CC8c_sSyFW)^y)#@1WLU&U4k(ez%Z(F zc%<=fBU$?0Wvn{9yAD5|3i+1GJNa|^_B)B$Q;qnTYIKHZ{?Shk4CK>XfpQK=mxJuk zIa!}zP)WexOQ@u6$zYR>Q4q~54|&0S$$vY^;#wq$Akwu}?Xa@1zkrsZQ^-Q;^-R&u%O3Ne5}qTMhB za=-!aO9Lk#Kd<~X%Afe ziq|QVrW|$+bxJZ))+?Tgg9#|H!7Rq%!W$w{=_OM^EXr-ur<}ee?N?$`xF2B&u`@O` z_{pZC;KQE&c8)+tBNBeFbIPwpp_zD^e-jFpMi10qtRoZ_b`>{-LE_t*EpyivB5b5p zuT?3AGz1^ZdM%4_YMO>}_UU&s3%b)K+=LNHRLtaTYRtGpsZ(d@i%E}%qOuZ>@F!LkT>^v&gDzer!E(Jk~|{v0kffI7erd9J`3Te#Sn_H zO=LITI-%uw_+~`PLxS2(tjei7@fj=nOESJqttbet@M?^k5>8_=i%okS#J#z7O3ho@ zgWLP6cp5H{#{_$(k;!X`OAKo=OLbdciU^C50@JP2{yP0H&o3e<+~^LZG^mBzuheRm z-r~g=#b>)lu<4+pa+1v&Af@pUPlOSgue}hSombslXNn50Okqc6Y_OL%3UQKVtf;I2 z<;I2gVyJ=Ub9r~c)XlLX>nT zHb)ue71crbsqr6E2}&~cqIwA1;2uUjjdkPHEl9wIxTN~!p-$ON(VMszXEY2HO@jPh zEIx#gF@o-st5!-eD^KUVwh&t;%)*mKz8E+m90uZdM@ETGr&1pSeoX3Ej)NW)KOe4T z55I~Y}=a{t+;rLVByFOX7(NIg%_HKo@t!!(!^4iP=IBa255$1r36o01o>cS zAJ`FYtJJ?4@z-0)7Y`Zc>_WBRPUiJx`S(;Mg0qNqeDcCo11JzZP5h(lPphJ4?}E)j z)--iFUWJ8+DqbkPW8h43mzA?9I?3sO1Nxpg5B#j563U9DBkYfp%-KdRNpHk}>4 z{Vcw~@BzS??cj4;m|d}WXvdn*ZQ%~Jo;pXsZvGPG3Y(Kcz8508$efg1+TB2@J!dL0 zB;(>;#}-Mcef62Kt_M`uK!+7g3LN0^hOkfL_#z7%W|7l_j5cw#2hVV|tm|_H^^y!KyrwdXZSVz#l+rB-~cr8%s;KZ!Faz zwb2So7E;&ehVRq#Qk_INrcZ4m%O#tWMrtGh{U@$xyKl$c~g0 zV!?F1&F0ZY%XCU717$1<3`~O zHWVX)FC&FBZi;|Ztb+>lO}|G$)n2{pOt&=$CTz1V5vx$p`Sz4{{p ztPp6JbghNaDOFI@l#=(v`KJTWy| zO#7;ISbNLo)ryZ=$!Otfi`rp+6-i-I*xT$g*foa#*NfNJX35Ew4VDM&fRtD6yuTgz z%W$*>=e;8rT%ZZ?-R&Ru+?kh6O4_?P_nB?}a(-=iB?8@)|IS9j_9ITHbux{rXvBIn zgSEQ6xO(AM*pd{qri?Zwwp?T+wFwb47ar%MCx+_hXe6^{)Q!&F1j8ThJZzT^AU30R z-n$Gm)m1I`cJ*j|owuCtK3ntGH)K-fahBuM1T)ei{p4kOS^E9^v!+%8&-)^pbTPU(F&_XIPp~iq1tE;BGu(Wg#Q`hV6;)!JV zvKVQqo#j(EoOqGi@!kSO;cbgZAzWAZTfI4Tfl*^W_15i;9kk{967*-%yVT*8}~2$G-$};+2XF8^(;V0xz)0z5<$3!NZNa zRo1Cw)mWxSlp}O9ot`@ zdf`U}dy#-FbybvGPMNsm+V}3=_8#HV&TKPh7XNitNes+9xQz3FX$}U0m^kSo1T2t+ zRDusMx)>9zxcS{Z^F``9WU_prkx)0kpb_3JxAhyJ6*RWyd@bW0*IS-=6#x=2tO#D} zs+Qh9_Fs3Pb&ew(wd+1|bI(=PJVqhPm|LRJLb`cj8Z*V2r&_$%AlTZ}k`~{qGmWfa zwM*!mQLDx(ql0OhW3xgYZ@P*p!R%?#T$c1+=2aMYiZFJ)OgN=%m*c5Gy~f76)QonE zee=wE)%X;jrDm`2dwBT7^MHY~4|+i5>{{?#F#c|;3fJDetcr_g6oQR$=>wmQUb%ar z>+{>4((bf}K>@MB>;)^eqmu@cLZe_pSXq$uQu$Z%i#j{(B{zzjt5($H zhDhr`w3-l2)IYV2OwA_3Gd+8)XLp-&OHkN}*Kcd7(c_x37lF<8H@zX4AD@(&<&H~= z3ekj>o5U}Oj00?BF^y+i1r9N)$>4T(PL)Xwf%~eTxm~}{agC3Vd6(yRG-v>B<^Pfw{SPU7G$j73oY}cAn--6z|G9>7oEr7GQ z2Vxzh4-905M_e;WkBQMD)ws>^lL_c>Fd$($j0J{K%lDhH^N0u4NEv$tufW_5N(^)b zAt6niDN#yjunJd;v_C;b<`)p}(X#{-kxeYBQmSb5wi1+rF;jS8FUxlC+uI!ufY=c2 zrM*Mr&wBY!!9J&MqLDcOSg__~Opq#i$wJIAEmcZJtUBJQs}WoH-HDFTE%hv`Vjjqo zEMAB?aHY$F>02_YY~rJc@`TiO4~l`zg`nc|PsJ2-P4g=xc8Nh>)n&!UAT9z zp7N=jyVx5xn~T@~xaoZCY$6F4(O+4fcSvQ;)r(dn5NzhL^U#UH&1Y_yJ$)5Ckt!}D zFH`wj15GfJp1TI-rM-W;3@|Rl(g3-J^yfjh*r(jr7^Oy5(JJqdB_Lpyy`8<`_Gq%( zzi?$d9O9!ssSOSc7}JR;s*@W}C*X{gJ79!`M{Q?O7a=j0JV%7O|_!^ zN(;1Mjk$(1snM9ZwdCDx%wAiQh!29>5|(xA*@BpUP5oJeIZ#Mq%S%%Rq55A5ge6D z4R=h?a*_zDi(W4;+H4kX2BZ~YS3UDU>e%x`2^4y}1fZtGM{O1Ua$W@(q;tBE zpKf~{yuS3VPtfVrP*!;Jrs)BimMpzE`h2-@#%p9`uBd<~oeC`qCN51`vbdEf{_+jW zO}x1t+`2|>pealBhcoMlFo3l4Le(Av$9-cOBD2@hg}W_v|M7AC|n%< zO0OrC6befOK>Q1;t4M-MbLOeU-5<6lnR>z8w|;)YW)be8C66eCi)K+g1;(R|18UsZ zTC9_o*J6?uf`?qqAv>!(S%?XSAK%jUd{?6XS(sOC+`u6>bFJOAmm4ZcAN5f9+M3C)WfFN$J+uzHnoL(%!uNV$>Y^lI)ZybT`5n6O#SF1<1W2#vGIs zOgNaT$n-qC%#j>R8seX!FA*EF+_SZ{qk(o{l~pAsi#>}iPY*5GgBT_Dkp@9v&$A62 z8a3DX$DOv*y0H;f}fjbKT;&gftm@|Be! z9U};YPeh-{@1}HFRFUa3@S`K;4+w-ZZb)Zz^bdyaNz<$aCD*Dn27@OrS0{+_M%S5) z!t}(}MP5H)Rgx#zqjF3(q%@PhFuML2s>5HF@f51_dOR4E8{r8u|=<*lotHdWrG1G5v76;3aKg!E0L(~|A08_gDby_+{~tla1v z+`I)qvKKphRmc>IDN`>nMx}4Zoxj2{Osda8r|EDlM;~4Dja3fz_Lyc{1Fxs1R0A}< z4q+solteqSI~d?$Pr*;@N|5fMNP^`Fj%{27Z5O<%Et0c6Nd6zT{8-AXK%`MUg;aPu?k?TUd-~ z0kzeU-kJh`s&?92OWWY8!B~k+=nY=1+sFFX)XCcf{U(Gen5-p`aNS0Lmt~0%Sxr;VGef%L;_-*>C$hz7eqRhI7KrT$i z;NX?cKMbhKBImtV`XyIXMvPo3CS?sdlRWTS$RW!jsYAuq=ayP_`s+^m?f%9VQeA)F zw#ZigGL`+1ej_zk`Fk{A%iWL1?AeZHz@qWaxrr86^zirmd&<_HDi=nanp;R*S5Xds zC@(=1lXJ1h)fD~t2bVzb>a#>REgOcU;0_#0@d@g<} zQxI?lZ(RZ>b}`0A61Oym=HxF4qLVBlPST-}3@pWmq3gu8hH%_eo9iE91ZzR-%q0$$ zFSE`QhF?j%(ELK_Vind1xh{$fhiVNz+*cv}jH%F5t0NO^QM? z!TC%)%)Xd$;>Ls1i?Hs@x=~ZXezk6AU~HuY3*w5v!k^%ZvX6MSxEBEkCe=$F|Ihl* z4^D~PTiR(?tZfk+X6{KR6xk!XbS=j3V3HSly&m+%zPJOQBw+4x5ajFOSF2vr*ZiK% z4eq=)5KXGUO@s>CpOe=?N?@5teI0w$LM{fGUZ+oi4a|RsaO5B^quoeFb}#c^G5M=B zAo;6rj6Xe;KfC-MczwYLyBxUb-YZym1gtmti~KMXg-D+#M|&rh^5%GWOil;|R7gOf zpLbj+;FE62z74~rFY!1{7ZT*O6vk5Iwdk^2FzyGuW24M05=4PCdF*T8vz*sK>J^Ix z%5Q!XDR6n$qP_vBD7PaZza^$}rI5B;DS$>225egrzVL>Boi5{O=@g zs9qu7C2!8?-QiD6ir1%N1n$UwqmOV0aKqU}Hy7$PHrDen{&Z+2P!4%{M2T0?Ql?b| z?4xl~1XciGCpn)A-Y7i9gix|U;%O}FOwg&e)oBzJ>uQut_C&fJp2|UdcY8H~FDYriiYx`Ojx$)C9+d)H7y9P$&_VGaM=KP%X3V)}HNpgQaIe9ZQlpf`tj-NU%quKJar- zV7`myrRk>9!TD=8pmm1g)!@!KO==dWP&b~I3|P8JcQ@C82lvm2{W%0B{(+UP#-g?^ zxzK3y<+9C{EA=*ENYlN^2G+5stsbOpaFrpOU|MQm-O9I~-`nDy zSRq~D;-V^j=ewy2J^{GE(_;l{GCfwDP)fuzHma*=A$uY8w-JsK>bUMt9!jSB^V|~g zv}G(3X!tV3YZ^rgDP~w^9V3QjURxd&acGCEmRG=(*>!(s$6M&hFzv)(=hPkm`|jaJ zwUr+|$Sd*g+&fT?Y5D0uxKi$OoWAiG?2n;|pg&W6LbhY(G9<*nShZEwH_MAA_#uB7 zoK27=GNtH*j=e5~%9QkUYsBAr6(Yh~$J%nL5U9tmYp5RUO>14-u`-fETX{e&s4q-D znQn=dOQtIGY)J}edrIQ6HYQK;$Z1HTxkmlB(o;o{^dWD1)}kVKBgV8}G}3si+# zU_mOnwuu@o@)e?rAv-APyiP)`Zh-q82IB5V7SryEX(HyfyZ8 z+a&{%{K*vOb_#Eg0zQeEBr`qmNG|N0(`-=H}PlKT%INgpeT z%yhIE4p`_{F#N76Hm^ELbf{VAP+Q2OpveA}F%M*J8z@ML8XD)Au3W}(dq&L??T1tZ zQ`HeONme6BH+YI8lB(1_#dO|z{%Z>I10A=3JHHzHfiZsg_T<^*ez#o^D_rl`wz(V67I5Xgt5t10yJ!BvsfqK^i93$p%R7_$FF%UIkJjF3A>)fAV0kIE z^&>QI6erb(`LG6~SuI47;_OwE>9=-`Y?EC=T+b$Vm9|*~?mcW-xg?dq0LPN(6%aq9 zOPQY&kAv>WXCbJYU4$+R9Z^bq|{%?4yFPIy_<*CmNFF&BKwBQ#eCR9h z67(`!IJ;P$1A;V<6?FGX2!>!_iaz7_;)A^KN&|CL6;oujySSeynl4Y(iv%&yD=5^ST`+V3#_AxmjLu?TeE$$@limsw>Y< zc-8~{;22_S>Wf|Bn5c(OztmQvm_0xFe7F>4)KTRcmn}g0s~gaB z{T)oz?*ndiCfI~c=U9}`xl<^0%HJ#gsQKLZLy*-~cSosy{yC_9P|#YgT)VpEnVKKW z9>Mdj<+yf{YG-9F>8cgpfJ(Qum(lp$^`8!ohu43ajE7S7aXRg_3qinGq?~fAAqx0P zLMLIuvCEtZ<=(?bPqvp9&naKp-ndWZlyhn=&o5tIonL-qX7T#d7mwC#mN}-S;>j00 z^PAcMv`zJ#`azoxz6g$FS6?hte-fMU@7MSk9JZ!wonPhO%jTo^nEZ}kqdo|(uOzbO z`tJ6s=iry_!A2FZ6ld#2y$+f`WdN6_Vd8_*Jd08gNujclszm4l@+vx6-b8DID=C&A zu3H@;PzJI;-r0^syIHc#5A{ZZ*?WqGVg#NTIBGlrRD zht%{ecoH4iL@Xt`X6AZF)F~9y4AZ6H$UTpZ%+i_M&&YcTA}z|^M~D%NNKQ<|PUKOc zSg7#71)44W2?Ub^D;L7{m&hoc}K&&_Zo@` zUEn~*ODneUnsRNtv|9U!EbOYhbh+$p2^N47DnYW*e%|GiD{Qj|Q?f~kCs|U@C(3SK z;58cDDF611(&OdQeKcx=*~6d^jmA_h*J7h_(2h6Ef&*PO-Rq2ZUk{Dz8t!f31xn*t|{!T={i5w;F@K(GSt0lbhY#hfsvv64ZI^V{MD=Ha)^GIz*`RPpH1H7@kf0o{dee7dN*yPMw^D`XzGED zjADDpJka-;aP%hgDg^~aS<8YA?I?j%DKW)#xa0kjoiu+QfStt`#IB1$thu064JSJ& zkOXO*_+Xr85}_$PCP~OWG)FI;f%^K|Qo}Ru2DlC4ph7Zx=Uz;|OT%DH*&81nASiH3 zB<)PpD^4-i!T_S#WnQ}#eKuS5U%`!5+_#zimf}sGVwBV3nfnRrEe?MZq^MbFRkU~J z36rLA+#h0+X05TqDLYO-$Thmd*JT(|lidCIGJ3jVh@zxDGkqF*%nM)R<&|oB<>O_Z zo*XZem1ewrOD8y9S!}Cj*0l3LV*Gmc3`etz{z6ewob%koLKN=vS*W3aEK*#%OjG}EHHmOb=RQH&cGK`-&9`11fovB&Ij z?|Z4o%a`|GF0b7D;)jL5eTI=xg3Hg2G<8#c{>;5h{+>Iji}R@;5HHzsjF)0=nY~I4 z-N>fpf$5_tPN^OXbS^$K(eMrJ1-JCwZferrM~P1*sNLn46GM3Fpc_h+1+jU+p~!;a z8fTw^iE9Wzdrrx~K&5-M*L9^_5OG2fj=EDlRN(+lt-WwoOSVw2teSx_xeA$J5Q%dD z$TiTNXHc|?cmd$kU?DX|OtVG9&d8~$(1PbkK+hnQn>G$QW6SsZ=JMTI^l*03#@6?(O*X?QIxQEz z!&<%yj9vIMzv?1p&YYo{n=xxTdF`2y0u$ErxjJUiDdoM~9v;i^#i}QVh#sc0vb;tF zH;m2gDq?#&o)^;BQh8=fAK8wp&(H$afw(h{{;055u8rbqljZA{QjXaJ!-%Mel}^s( zEgE(qPSFMw@eNr#xHuQ9pVD$zi?{GCao0?d){&`QiB%-$pk(9z49VS~O-l)=*`BP` z>P%L)75ZS?88C4KP=plpZ7?ojk}|qq>ljkEd&WsSKj+x*AkoG)Wo;ww!LU#l|I`gWZt<0Ix6IJKTw zDwr(pb(~rii2!p%+*qlJ(7g^hHrUaBFvcv1KyuE?TpjDz>p($=Za!O?;|nb!s0Bf@ z)BGG1-b>8_mfF)Db74t{#E$M#tQXfD8F&}Ot6jar22x7J#*&3W)5qY7k)DI;zm7K} zR?#q~V+BjQGq@x!dx-?EUfoQ57bvi|(>)^+~#9CWoeFbWe#B6M2`;tg>HYSynTMeFsot&O$&#%so* zGfj!jqefinpBO6a(iu}6ywMbb1)5{pL5mJ*F_7oKA@^p`pW6eu#utGBZ2hbk;m`us z5aa1jDgS8oaN~LA@4}QyoRMoLr-fYKZ>tiUL(TANHOHLPbxqHbzP5A|hrM#w!fg&j zNK8{x;I6szh#knG%5q?t_<4~b)xs%?fGh0DoGCv0{qyyEAJ^hFmcx&n)ibr}E`MYz zu?`+zXr?S=`l&<qkf^?IwzU#@<6^NZy#5gv7o+8PkY*;Z}x?xTCQ zge=O+UVqxJ@avWoiM$_^w@lYHN|D4xT@m7!b^D>C+;t*C+f76MPaG%-%AZU z_E?p8=ZGd9J7<;sNdmA?*WGHpT^33tpV*ZTwTcpOgX9r^z}eeH1Q=;RXjD>S|77;N z`|BImv67Z}!EiWWghh0X*D|5}eY1Q|jo(~>3z!4Us90PprYuZ6FjJRIRB zEjBOejssmWR21HZ3-ph(^B3lf z!(*HT@CH!tcHZI7=vE}KG~$pa+nLbnIB0JrW67G@f@fnbHmqy=Q^Uf)J`jI$L))Pt4`;>5a-u;zdso7((y8z?T0GY$NN zs*iWX#$jbX*;c#*tem2xWF=K5l;UKaOLzkY(~Zs|gEJ2>cOKs2n$E%4`>~sxgzF%r zK3jXXc{e?DI60=vZF4mW3T-feRwzCT(-s|_PEGNY6mvN2$Lso)`Ow6_u9wq8OhGO= zxz7CzA`BY1vI3KmC~bDMiqS0FZ8mR3kVHKTdp~)n(-q$0CZU#itBU^4sWo7Nz>4W##XI%L-}LCK zd2P!@{km}@Y${PT-~)L8bSCeP|Mu$dhMt*TmMM)(m^QM7TW|Pn=GFJOugid+(Ud;N z7EB`8Ym`P%>0r*_$zy}TWJR=S*k1SYf)_zU!AKMgV+Hf^DUCXg*IER-RqIEzS+$!AJ$> zCZlFrQJfXnrgtL$)g#D)R*~I+dM7)vmT^3hN+r+_YLNHUw@;o2w`fSO&G0geqW$vQ zLe-laib_ex4_g`Prb%FInL)@a1+we|BOhtmyUm`jnaykpQ`n{t5V%9yxctG>Caa@nRUGL1Glu%R}SNB zE3x>_W`QH+8DaWmWyKjp2Y$QsI?&Ai6*I9srY;En_`?;_k(qJ$AM#V_o?EGd7I(gqnU^jbyj<2{7(P|zvAJW<8p-|h`rtwuppkxU_Zu2ddM64C; z1^8F~LJMhorq^BsWi2!Y@$J%X&F>)2U7?&FPFQMp8=a=gtiUVRL%$lEXAXq{??Bh; z4>T(lP-Q+*UALY-A=U%|ko61W76d<1#OT(0^3PCZDfv{H{m3*eU?KQfncz~kD4l9O zu!jj6=8e;fyAJ4{SbyKTya; zPwk`!GG7K*gn;-8_cY)?@?M;$Vvrw@%mp^Xj{H5GN5ZsT92ghP!?Yx{5O8E0hLP`* zqJ-UTZyrn)1Ye_BlMUa^_QnjGE1k`0A7!{Q#mA|}{f|x|Z8Atx`IE^~~RW+6S9Bi{Uv09d!NHO^svC&Trz}SvqJCv$+af`Hw|`lTy>;#~Z-fK3)A<^lP8}8`Cf!uXJ4Zfe!yVybMmdC>0?(o1|k%oivt1+1J zI;nlO2;+F35=ZUq*h8}l$lR0qee~V^WzCuhF7C1%MERE|2!Y+Xm5hFqjNNmBONDN| zT%^s4r&w=k6EpY}D@4vcB|0q4x7c9gG8?HUQ@zn{KP*c~^V9ufA#BrVl~ttn*3xI! z8J8v&?+I;U0sp_HuYTpZU=%G7IT*; zKhMREJ=`SQH%RamZ%CS>ES@vNdWi(q_M(HCjo1bbpb7*EX>bz8DGC;5l^%0&dM|Ep zrniaZ!YGuK5V*8YkGAd-vW+qC5Oo2!(eyhyavozf`Pcq&YlXy=j#OSfr2(`4k|$vB zZA2zDnGQb~ZANdf*D>0586P!aYmn~Y;9oEK$ISA{4MXVB-Kc_&80sr~Jx6CD4zafR zn3^!87V%*(bB>D8)yc_7MMqD0ckJ$i&BrCgIc#r`q-}3c@-&0FA}%*|1VtmyfU2D_ z$jdbhHE}v9Qn6(YMtlESj7;zbQez3^Gz>x2(S=(<)F`mo9pB-k4$M`RAWsK{AedA) zO|q9xRKtfMgn;X|%v>g?@A;!fM6C{^cx0dv&PMX$=^-wDinM3;W03TK7;3I{I0P2e zE30snObJhW7=)=>!HX4EmL|MjceE=83Sc~|{atLP`Y8XDBFgHzyCTPqDT^Bk%yYB_ zU_^&T?O~ZbvuGS7T@Dtk3Xz9eF<5#%$)tzr>bf*(Wg7SbRiw%>tf9u!^+f`LDn$Y^ z6{74@;bE(c+Ee~{MU^F|X@2i?hsyR#x9nMt_QGe6w+iN}Z1&@CY>ipZUl!&h(~@4a z7k2mK#T}P*gPdeArK2317b5@c%&C>1P7XB@zu`DyO)Z;98d~glR?18MU4pYCKlIvDq1-jESlZ+w2^eRU~LKoX5-Myl4y$s zI9XH}nYkG6DqwYvRLIwWmr95vQ~vnTE*Eoqb_wy=y^{#28Sm)T6My#D0;tBTZgL86 z89kP-;ooFmv~Au*WMzamE2bd$Ztvry45C! zYWcMyE_+H+RiFN>`P9CPr)lffb-BfyW5P$xsK*f;zfH{&Qx1E+8)=D8lp>gV{C!WD z8+wws03}HLu^c)bL8?MZ612nBmH!BL&V>U6$Kd=GyK=5n2+=_CSg~{_EStQsy}WH^ zGah8h4J6DeV_E@f<$+}^P_NK49qwmv_&BS4HhMkOKd=3-*Y;N$!yK0ctQO}2g&Q^i zsZoJlMTt18jxEgoW2si-LYmTI8r|gS9VBcdp=9DmzwQ=3grxrXfS0}`Q7s^`knD)p zTRGQ5AbTw8=7(3(p&FbRD`YSD7NF}0JvFZ5ckeKKn`%_QmZ4S+Ji<5T7&0FHnxu+RCZy-*^^s zxLdtHIwiR`6#2!~%|o+Qe)jV9=m-1X(eQ_>_n$u5dUmZ6D;8%Qdbm0UYl6p6ZlAyt zI%S8@1s#L7Dm8*#;ZIb)Y^2QM#?5Z6-GBDz>67d@RofZ!@YqF_T4Bx*J@MiB43$%R zdk?Z3FJ|85#6&lCHOfBmb2|h*GR602ty)_9%#Ng;KWlBT;D;I3Dh{cSgOEwv`0F(-n zNrKjF!-vpXg|e=sw3rdd=NQn9p;S6cH$SK+g>y<#F#TQ;5l}GnZUQD8qNrXyxF63f zH$yz;G(8x=0u?d#aS6yXKV?NNyD||}H?TH9`f7@lf@aogNe=deG}=EXa5F;skcD85Ceni?)C+8>|D;{|PBy>a^7+PAqpNdqg3e|--! zKCX3`KUe*IWv)_i+pHR5EFWw|y@iD>%&Ho$LS9h3BN^`p)Lv9^AF6VbE&G$?aoc3^ z7BWagF*r9h{p%x4`q)Ab$?`pqvZQy&hRUsk6+aG3RhZcKfcuEIk%-U_sQ z2P|IxH9i14SeI5fK8Q1qf8JQEm&a*`@|*S2n~RO=HwmDx^?!4@@!^Yl`4`RNW{+Pi zE)E+_nqz#y!x~dnfP`|L)QLM4mh#2a%$BFBtWJHoF*Oul_G&vmKKKG)stvx|TmrA* zHfkI+t2Aqz>^7_1s`qiLxi4SV%fD?h`3IfcT>4^lhm& ze)+i^rubf~e`fItq2E0qckj5LD#X7d@cQ4r>pjV~1bILu$OtNKIP!E2nceyhF{s@G zb)i(s3?m6Ee|WohY&AVqc}zj9(?YKYfdYe1nbA-&X7?d$EghiTE#VwMG~LO`d(fHl zI%Z^&3iv)=>y9zK^K%=>&An`((Dc@!6)Vm>Uy+8Cf09FaFqJBw{pfwglJ-s=J22bW z~ZJ;R^~!D}zr_nfy|{SZ~#+ zP;4lSm@7W<|JY z3=|=a0~ez~$GQ5;_25#^X7QQn7^wD{v<$JP%ot?^qj!L||Iy9WvnrcDm~8kMTFM~6 zku_`Zt*Fpa9*bpc;k@02?`3!KY%lyQFi`ychtOBOGQnSqXJ3RmbE-6ZVJFROFu=Q^rUm)A zOgl}2zX>=qnIWp1 zJ8y^M6FEBuJL=%sH6kPf-4Pep@tYHknRZ2@J5_;WE?BKXxnL5N9VpWx<0;opDVDf+{sNN~r64(* zup8Rrx6Vg3mP)#l+&ZeOpI(a&bi#ywu-`p?u>RnlZO(UF&-k@yz$9zV6b=C!n`;jq z-G6rX-s81-b7HMuFmQ)? zL0!ohGSwHCXxs8k4|psLqeI7DfarJix~d)!gz}rXDs>%RtYoMAQIBU|p6sArF&&8wA=j-X8^S0x2ygBq`TZ(UhI9jcxiK>G_&3H$^LM+d+&6A(tUPx zn@39av9}$P7-}^69glh|!Hl9A~-iJs_lhS>Fgmk-FUR+x2E-iHzZ&XW5w^vqv z%ioJs>~4~kLxbgds?=Rtt(I1AuPpv{ahZCLd7!iVEI0`$5%9zDhhKI-{4&M^c3sjD z$m#1nlauFne>p5wzqQqS>rFr3Am=g%H?Z{>QLs}dlsq4|?9+wJNW z`1R5T;L{&FL=ZAHDpNfi9pfq?7ZYK; zYIFtgA|*I~GLzA8a5!g6j!#KZ1qmiIirg$svvfA7t_Gd)D@(aJ8Jv0)$F)n{!=sR* zu|7+{K>-mgc60)0hshTDBxUqaq&i?VIO+Czs6pFB4sxbFXMS3lG9t3@55J@=2|DQJ z`1$XP9rM=4-Oc+PG-)hy)8aQ06p&?*O+Ok>d|PFk<0U_BEEh)+Aa%&OL<(*ospup9 zYG%I=zg+5e2ZwC!&LBq3bj_25diE9Lq!x>d@ySkaq5AMYs}KL{M2v{E=YWCO5*@#R z&!rg$L1)qro`o~8v>yPUcG5ju0`OgBvf5Q$xp@cs;g`2cFmD|gDJ2VrkfTK;_)DfO zu+0g5a(Pm5PJ6?h*F)OxUXl09hhGNOCq{!VB~edSPrgt1Ue@OtfwYH%Slttj#yyQ+ z2`j`g1z+a@CHCi8BFj!o#&ZjH|4uJ?=?;sQB0209D+~69qo$RAB4GUUF@8#5$GHl?-e2 z^(3~g|9gI4eUQh0`Z*mO;RqCCpTIY*U|LmeeLAnpMEmch)D;#xJmQT~xl%cbo4F_b z(=)HjdYw^1r+%q>zrK+8*CU0mfsLr#-RV{Q$4CL^6Tq~WPIgi~dvt&G#cf9J9!Oaw zJpsSkKi(f3swi(D6-qP*;rC3(a6EwUz&;%f$Le(U4+)*R)wA`jmF30zD~t21E)`Xm z7DB7X_g9wYH(M^6EzhsIlB#}pe`RHE-PK~^tMezmx|+JZzq(4V-2)Pk-Pv6GuCXsu zdkhFWOGFZ<@vc3=B}$1I?F<8~hldZYZ2nUF{wWcSnQe1^ULMYNUo%Gc&8kZ<~@sAuREVN?PfI97X_b7b00i&(CDw(o#VZO5B~`bnpAIxVh?1N*I(0pB4GcjK5Of=qi9U4ibpL> z9Sj@QqX&=IbT^7at2GM{Q8sz}bmQswYnuY2^}8>~(y{iyI*6xPYu`4eFrS-UC)I~v zNKdwV3MW!;Hs>!jCySp!{^9!b@x3ZfzzQJ-i}3A+GclmR#g>Fp1b{jE94Z_0T^> z3!p$xZ+@DZSO5KgSD#n^{a^FC;r_xm8|iUIrgmu%SFTOBUc+_3ub3Dv$0y7h1e)u1 z*Y17tNn{YLT9!mkQPC1|_u)T@z}ISzhP&oeeNr}m{E^N3;%SNw9zJ^U;K9s3#G?+C z!W?lzOgq=aUj7oq;%E*ZTS9yH+iL$9Ez7J0u?b?n90^g?<5YUU&)`%gF5R&v9sqX$kbC%;#0w!CrCmN%waKEH6&=gqcX zT(s#I3)Kz@3nIr?96G33jA#$o-TIJ~YUGx_^8R6Y|GGa)@GM zCslECx@RJrb!7}+wgW=Z{EG`Vzu>vJz%{A1R=!-!47B)0vbgB^;PA77;{jR{6T5;O z;qry+O6*FBSBq#c%Uj(8Y2Ul35ca#K9ZbSXJY8X!)K14GT{Qk{N|}x<{Z}NcqrBS( zrphR0_rx_AXyAVJ3`yQu`*|Q@b0{qWH{88snO2mDnGqx-*q1iw`Lpg$Yy z!svu})WlX4uSSXLg*G7>Ma#yovG0GSW_?mnNhD`es~9am^!x`5D% z+-U~MUc2+%-N$RsHw}44C=5kD=N;2mBK4xv3LOyq z*cFYHOQ`%7yUWYk3z4+^EFU)uQ3aZ4WYF*}AcsB=KJD-j9i-Sc0G+l1%^Kem&R53F z`aoQTUp-K~MjhLKX+`UBL&wln@!9~C7(&>$>#%R)E8&#jns#6^cHo-;Zra*s#qT11 z&FQni&uI3}20L!bXSDQVUVvy4jf*8ijvi;@7M=PFzlQEO1xuG}JX*KAhcau_4VK1) zH+}97h&3+66syMVAzGsyJRJvk7xcYdeRY0303Hx;SADhn zlHB*Yb|ATVMjDOlUx1AklzL?&IQV@C+>2A2P!8yBe9hFF}s{8C!-P2cs5Ma^?W8 z^a0Cm6n7_a5iPx}0e!xB6*t3J+RSsv7`VFr;JUImo5f zj(ZBzs*L^cw?bcr;DUW5=y&Jz1v(I2V`~FiN;EAjz?UTJC-x(~xp5*32le@(q0$5z z5VEbV7XnqE4N-DvTP;}9fJzN9&>1Hz67B{Qb}VmD^Ec-p^l%-jbS^#p1*t>Injnb9 zS%(SMXFGa5>AE3*YPL$1L3AiAJAIi-Rnu)7Y#v?7^S~8LbZq`K>>AcKt!)|*M9`5= z#ISJMwmDlhbMASkLd4RCUoZvB%7;qGR7_Yz=5)-C#C`HHAchA+L#{T-`hJfuvflwb z^fG6GtF_v=@Hz7V#YLXW6SnyT4px>SPhI!1nN%+eLBouX-R{B7)uKjdWge|x>%ZT8 z^2xV}lj0n+9PY*FuAdvPC;Xt{MBB2s{dNiOBL5G>4BQ|Rbabfi z+izEv(R_=vNt1{PNv>FCISOA%HE=T0qavxGbup$yw02xZo>&R3v9jxi5*;qF2HF!C zovtzNMI|iIg9%pkT6x<@aMp?#9-Ew!F6d*9D%leJCd1!Bud1x50bEKAO&5D(z$&Mn48C$R?3( zHin6d6Ei1-6W7Zsm^~+xWZ6NWZD{-5}q@(%Th2R)UWS~Td z`loX`V}3}y#^>!`flpFWQ}!VmsAP8I4dAhJYWyx((GauFIRIYN zR@A{O9VK0$wUb1xO942=`gVj-J1IihU~|OS*89|7;mS(8FKBDyb8UwnOgGgR>^XpT z5KIBC32(CUr4QY%EGQAzYvVY9=KwVJO;LIg+mi@TI zG8Pk|P4L)Cloh~_Aw&p+=wL9an327EaMt9eTWmVc|K7T}_+q2F%3-@D5O$@Y<=1RZ z3j2k$c}hG@D)p9?2OcJ)exz8wUEO{5Kb~FR`fhX8h1ThF@WlnckPCrL(xr2%3y@(E zZtErf=br&Md5}ld=7;}tV{P-<(?^?YaR~m6ZcGebRsd+kyMe-uO5kgP-kbkjGSKCM z1=k~GrC0tryG@Up=j7ug_W;3m*F@z(mt(<@$w9zy*xMy8to~auwc^)+6(aNqb3%H6 za$RdZpk;JP`O+}7c7VJ;6pf2t%MOHan z8Go5{VoU}$*^}Wb+{|#xs@69j*)~0CGz@><1&7yNp6m_><#%!)LY{_j$zTCDBz9KY zIpM-goOI0awh>l-4`$!J66_m><&6*ORgX}7NdsIZ2(gL&v3;VY-sPMs99Gk5A@rF^ z*-YXk#PR0*DQvb^`3aMw`4^?!yu$6#1Qx{ZTqeg%zfjW?zTjM^3Os+w`rzdt;E-LhTnou$z7?rV}P8$^8HI+yH=WXMJ< zJbxyw6KU(IWg0J9*1)F#n0}1^-d-mo36O6TOZ8k9jvK~47G7JWLT`r0R>W=y~V||J6PWfxDnhWfw+?UzzD@~v0dHT2P?F_?sG(xI6 zI`kbwBQ!2IC;ZMzqKlcNyy$}j@7bHgtT^)wze&N(XV0$^qnvT|*8-Q4s z)ARb6j>3%oh+|*D_?n}zao`vNG3j7RDPCMlW{;kLgoi9UT`e!H?tZtq5O5!P8{+;*jujVA1}YmH3Zr)|@Yvqh zR@BeLL|&Me;F=NiZ0Hgkxk*g{2+_~fPi+Zc8@9S+&^EKM-i&5zBB&g2p%kf? z1@o>I!-z7msiw%wujBZZ;#E&d~v}L5-i;=L$ca8%<=nceB)kX$kPkSl2m^9CXLU;&AcQh2f<}liRV(WvZI=vB6aqw;lR`!0nlS^lRGa-qw=#Udw}#pH;d94ErIf% z=ytej$MikE#>4&_SefR|9-@rKmoYF#QNucr`@rSP@*nVHqQAtXhVG8KE!Vh7v+A^G z-aUrc@T$wS4b`i!RqGo$svR$Vk>=6@?h)1xgN-08vK8VP-Qe|l7pJKV zx8-sIM5hsRt#r=iZHhEQgn@3{NwjGKNu5njM!U;+J~md)w%2yBd>v>x;BxXsboY0f zH?4kSaAkqdmhJQ^FV!#iZuOR~MSZquk?Fwa(y}U+H)~;BsrgG&de1#rocd2ZnTUlT zn;8umBOJVFS^dlb7Um&nL;SE~a-;h8>9crEoc+rfZv({7O(Ik@u73B<;h;I+{~t{k z-Kmt79dSq6TM}P4el9-QnLF#<8|U2UTz?kcgBDHs;r~iA0=IYhW9QACm$12mpAqhl z#y?9}fse#IRx8S9Ed+aOYt83F=gScL#*AhXdfEjA6!$*3#8=;~y$GF|mb{KiOJtg* zSksUfX!Hbj!DF$?nPi2Z;Y(=od2Hd^TQ?TV9^&uu{Gjzl-Br)$tl#RIbZ^tvB7lfB z$?RPmLtKNg0p%crrDB*VwhkQ7)+W$T8)x}#=0(Fu?QPx$%w*~F*-)r-#}=DsHq<|WFPo!9y< zy2OJAp)HJM{kItSH1nX&&(HwkOlHUEi3;B8{zbK?e?t3gA*uW0`_S#yh$;QzOx=k0 z0=ZTG2&hx}gG(pQ5-rydzL=0;B8mCMJRXxJOUqhcS>AL|fRL7EvDi179(fl8y#zc5 zmb2(`{_Wbcy9=eiCE0E_o^SpB-^ia+{oC{PjX8)Ot}A&>H)O0(+&nC}Brb5pQ0%6@Nb*sTstCX_f|fN!5TwnuZyh(4uQg^)J90)HDq>6GI;VTAP#|{ z+nwX2+sK=2z=DY^)R{off{8cRDG$Q$ib)t`T;aTppTd<`kHfm3p>=gc6!d!8h5wE+ z*qs5Aq8#gyROQx9aOR`soI6me2&%sF8MvY#gKmA;WTp}{DCn&1zH_m1dt1N^e&9Zv zO$U+Pb$y$hNrQYht+wod|AHpEKCxt7u^|8XdGjNC{-cLLD;Nplzz3 zNI&3ROK{U2vlv;DFwG0G#W7Y8%ypEPs$)kcx+4=uYkxqoZA+5@3Of{TdR(jEocv?F zyn-@Ufmg!5Wpvw#lcLjO2t+Wh6+|90@=y?0I_#d>YPc>(BbzwRrR|VnGtp_{xd?sVuM9j zspvu*>a+WoCtr1{tDC$nN_@AHrG7<%qC(who^-Hn+LFtY-nCBkFP6S%Tb{w&A&Fph z=Z;C&JCd%+^|rW-=K85+b6}xJLP0}A$v`=>CPpm~8Zk3Rum$*zT;(#JU8`Ppm;d}_^?y|S_lJ*fx#Ufkeofmn>Ze?? zy4DILTsR|=#sF>!zn)HQVW09O_x`czbtJ6?vo81_o}>qRIXXheZJBAL-P;xZxhg{F z!OJpUz>Sc>LS=G78pv)ZWukIEapyZU>kURAI9gh-`hdeHe_DX>Wx?EE zv~E;5zc2j0ZJ2t^4)`FYixN`p9eGw9CIld{67VS`7C$UPkAry{9y%FqL(IWoUPrq} zYJ4ni=)?b3pM5j&V&Y?03O-_9AJ9j3jTRy?AWIWp>u!p(&`0O9YVAx>b8yF{BGe+h zfD7ki!0zD5pSy7`U&a!dc}J-Kf>pFh~x+`jjxXKO|KpmgLe8STV`&yeQzM$?OeOwzqd~p7Aoww(KI?_wH`3 zv54I6V(Ym0ig#b_%dGf08H9QDNWP*;*pr>u8M+5+_nv=i?1jW{*rd+quL&rp+309y zqxI*HRpr5>@3IdnO(&ht4_*c4n%wzmV}7iV|~y8tprAn$EPa(a&A@p4!4zjzC1GR!6w0AFO*dGACg89BS-G4 zttWjGM+zv{TZi7geSL7=+p*Y5V@4#F*NXvU_*i;Oyl98Jr~h5mOT4_yrT<<7Pgp*x z=66*j*C`l^U;g{Q!k-*4&w#mqa4Jh4R;r};ti-|l3-&H0JlNW(1dMZvH<#ztSbsLJ zbPN0P$@-&>tyu%43bB_myO$cpRl0KRCpagL5zNAg#3EIL_lb{Im3NTkqGH+iD&>hDd9jGl5BlMwIl6IhAReBoU$(>3FD|oB<0ZomJMOAyxlI&+S@^pJ6_p52f?i z+9rL^{MwhaR)$iTkR;a26OFY)h*sbjlP?_g$n|`TtPC4uPU8?+*c<4-cma!&(Y#A& z%)5|i8(5EyY{r5=vXjQJTOFn6ic#)tO)Mr|9!#p>iRX%Ezx|>DK_sO|`Ke3SB)kNt z=6wgGM;L(EKd)l_vd=Lt)EJN@i&QKjO~*$q_s^6n4$mTXT&ri1lq_4uow7++w4e)- zm$+_`b%#8`@vp4|PPaaH!09>88_=V+PL7By=Qafyno9<|JKF7CUc4E%*pxFYDJ3=2 zBO#XQimJOddAMLLS_)Yxn5dhi6G8(N`foMJ9gEgZdKE$N(diER{cg}lVA(VNnzOuo zdYdM2i3A8a(NdqU_I9_mhd4)VBe=-FkYl9HSqm^?fTY=|jC>1Fm-I#|c<^3Pe6gVVf|C~K&ok3eCPH|?;(6%?`M&qO97r6QHdeFgsVST>)m%ZcQ|?1wl`^8~Xe1 z)~3GX3cMs{UzirfTj8&w#p5kSbZFXb%|mJE@5=ha``eql&-(l8$QM_tt7PxyE-x*U zg78=D&6TZ<=XAHGnBRJbcs~4^4q3s=#)g!CN6t?;G<)Gx8;>7o>n>FDk!t?X7z5m8 z@KLZxW>E~cKV}6}Q{n6P+o%cDMNuCN5#)Mj#GQ(~TwGXL`a$h}{@KQK&J|FQwVdqn zeG}uoFa!DIl-whB*@XrQc=MkAtgejQZEdXI-TH%dwnKkRPBs2sEH98%E`nJP%(_UG zB*J&DZrs22TWNclkX+xm4V|mUqZ2>C>{JgAWUrzbb`pzjZg5b`8uv8mTm@qzSutzF zSvjDO^4MMqF= z=5fayz_Ep`RALf@>#6^fTM*Xj9pATgQ#+0I;}a6Z~dNR^TYler8ol!*Rv!M zLEE1oAJLK7oJjEe8jgYo#v$xtDZ4vZ3Sd?3Cu{B02mgaz!`)f&?QFGa`jZ_fx{b}B zj*a2g$Z6JwK24#x_4_a-%gs$tL4Bj*Um}!{x57OowO`l91m-F7IDtL#gyQXv)3N7@ zc?9+vFoEW$j?0O)nZ2!tFtIk-q9aE393ms1&$r%N4)TDlcTwT@Iy1`73rCmNN)KtX5i ze4UW8n|q{34}$Ltn6F8{>=9%!8J@g%TB+xR?XtLo9!Uo>7=qdA0)B8LwWyf^&kt~1 z&8}tc-_xZ;0^w&TpuSN{vQ(VD(ao*0Ejd1&=B5?j6Nm8I~E}a-`aKz`!`pq zmU8PjIrQ{L`Lzny)ry)^mpq4eUQS-y?fm4Ee6I&>u@z#YR0Z6lyR`NDo61gHRX_7< zzTZFdSa5{BSQ`E&uSan>_yx?^O-cwYy7(qhzuYJObnW~_Hh8*ikp@5=gePRU!Qz)i zSwe;ZGiS4hIAuyk4~93+J?Rc=TYd2<6>Dj^R(=zLtzinvKuole7tE#U#B<&hlp&}! z_Ph?FG)`&gx*t8XUrBSCKB94H`d5bgS^dqLOxYccf5mc&9)Q%2_Cp7nE`CNDezxGw zaI|ZWA9h*-|HJ;}OCCK7Y$Vd%y_QM?i9E}SXU>oMUivHrilONIM)LkxSjOg>{> zo-@asOuk@~S|fDA1ltzH3?k7^>Vmd?%( zCw8G2aU~D1`e6~oJt~b}R&L;Me3%YPvJ5QpU-1q#M#OS0iJ1th5Fm&ZBxOu zc(0&7B7WH9{yF5=cxdL6&09V1jny=7z2_pDo*Wl#hw6m`1>(6gYv)gP&fKI9E0^I6 zf7?upJoJ}l`8+0zprkACmmiN^x2$^@J69$i`N7uHOWlLFXFO5%X40L})puv#t9br& z7%#5o6Wwqw_cZ#sz+}$$k4}`7OFBh4dWzP{NRl@*CNQEg?qj5dz&{ zQIue%NvcL!nRmx5*tb3O;(u^nur)Ep^m>XUGCne+jXwEg7AX`{3Jd7UUL&v~IM`7iCsuc}4KoFvC2+QqQ9()1 zww^Wt)c-ERb*g8ktlT1KZ%{qO2W*U!{H5;3MVfA4qandy)oi@Eet~f}?d_c1YMr-| z$M5sdof76hii#I^?W5Yc$mEhud_@p3+?CL-(S?Psl+wYgc51>jqbtw&Xx^LQ# zpri{7W|3#z>6a%O=e4Au*~r3}2_ffJVdP{s5KIOZpL~1ErYQ;h{12Ce0k{>@6Pv!u zbD?=_#>#-1*l(G9udN~$fXn-Gk+)^PFl{_JzefJ>K{q3YRsc}!UEO!->{nt)lV zY+^wlBSx26E(o;rVBGk*Jp|0#r0U)2{J}OOfGOuGHh>oj4>O9IExUzzYSUfW)Gppt z`y4y9*NBRfkbBZlmPr)eFbg3DS^=uvgBU+U=zSK;^_5ju56sfe~zobnO}_jeCOiym z3jW@WQLA|unsEr2>i%$<7;!F|QQYFypUX0q=a^hTQMU8!cdB_p-#!ZUlDa^T3pK+A zi+wJi|GP`&??|`@FEeRVzs+bSWKzmL6@5VNx?2juhL8Pj>jhHl!2nOAyvOmkS$*oA z&jU+cym9nyFcwaty}IEIcJUng_bfRb&gf?Sh>7r0O{Ll#9W+=9l+oZU^mG8GuK&#F ziDxU7g8{)-T^;PScP8~*`E$X}5T_e+BMnX2PxyUCcT)$Dmd)cpER?sDc=EdWGo!P+ z5?ltm>%$#VB0jU0jk$sAYEL0}$EdPGq66J7L-kHBr5}rVEchj2N@$9>&z8>2FPsFG zCemD_BV7zG%AL!lMo;GqNt12O@TbS17f(Z(y3rfPB)GY>dH4KrHpS?ZD>qjIZ%Iwe zvtTb7ywK{Qp9@W*s0r$_%-rl&L~24Yg)D05Ew=mH-WWLhng8C4I)x{h7-M(-e z`2FqA6Imt(Ka*<#Y4h)D9^Tpx=k3T$(>x!SO##xw4P0pV$sY8QMS&3NjSr0ak-YTIr&mH-?GvcvG~5DN;9bjjH_)U^&2bvx;v5Yn#h zo4u(DA=zDCVH?08@kd-i5df>1rZ8!_`|%Q(HLN9dxEn$h0$*I_a-dtX^N)^{UhwE} zd9SNiIzKUgEXdnl=A>)DplCl{(+!Otazu?@&;w6(a)rI%MFD$da;hyUZI+gKi>NU& zdJ$MAlu@BA>Hw;R@ziFe)&~CwAL9U*ulmsj6>@(JBxnm3smEO(qN z!cFia-Ow}X^d9J!(812(&6TsWV_y4dOccWJBlAG`!|MK%n=3C~Y%I}g|9E8?K|TqT z!mZzKY(_zTp^%3Uf>R@?OAduQBH84?nI85V=hw=@TTcrR+yZDw0sd{M=b> z66eUXrR=ilB63Pxxh>G!V7x~z_5~zv3^)E3t#lqu@q{ks_n?hVJxsTjP2(7*K|CRz z@BKHQ?DUW2f)>^~4M>+|$&4gnsnAX%}?YM_-s(xG6>eg}{`% zEVyNIw09C)2ZH)5Izb~w*8izV6pm7wPnjL6Z8{O`n3nS_(>;DnH@f%%9MDCW;D-Lh z^9g#-QkFQ+TfM}Jk51?Z)0xIvGMsbz5goS8StrRAZOPp*hp~~{w)u=dVyU!F@D!n; z)O`sd*NAU!9h$G?X7RTR4gM&!Pe2%3UvT*EeD*hTv-sOZh7YatWr~gGaiLl}Eg+9R zc1vEvbH=81Wax{2@)2&vfH+IPcJ!o54$DB2_IjVS(nETyU4HFxDupY{A3q4POgxGt7a z%ChN(=WHJ>HQ?!}znd}|eB9PGkCTqBPflOK)DV6ag9>b`m|!6twTyCM(P%Z;jx~3B z#WgLe&!4y%ETUS|%9(7xgGI>A%jKSX2M#g5%_tyKHVv{VNi{EhpZ+NUOe#aqW~VNS z3DC>ki038jORq3{>~iFfhgpA==sd`^2_ElA*~H5}%cWK=gOp7b@?#DaQHMt5>o=Eg zT)$~D&9VA;H6HFp*FWE|^ZH;|OPlY^6$8LzaRh|m@~+R((VG^{)r>AzmZjvc;_U9x zSo*4d3q@mUGdihjNvpdO`R(;{+n(ch<4m9~)`Lx_T8-V@&@R(W`uA+M$>U=NxDf}q z83xEW_G7vM&-!wC;MC^%g`eVuH_Vs&1>Nl6P@fv-UoJKqayE>rdt>anuauNx?QkCt z9(78XMa$2uPMgR_7z7Dq;y`jefC~Ng58tNWY>-D z%6~&Nb9{ErF3`sP?X~rLIdEu?yfm<(72a2LH9}b6!B3aZ2&Imw66a zq@3B;kU3{6f4$QG{>kH+_ZE@}wgzmRjh`6{*z(%!4aBCc=@gNzq0`iS`h^1@|3bb- z)2|$O^sg>2@&8yr2w;+pm8sF*r1vSa&wWq=> zW7LoyVTZFZjdjR+e;4%^9_UhGnTc5H7V={o@$!mA6P$OcbvOBQfgSWo4|dgU4gIp$ zdS7y){1_KT;3T+yBhOj*yn=B|4Rk-kZu>^0|Cvn@vxfP08ZOq|t0 zbO`#$*&a{sC`P3ILuw#<`%tPCm72e;MWGX^peQ)cnQS{%(_$|~hiY?mEj$M}mE@yb zk0qF1b6R1icNvwegkz6kRoaOTX}UWxUxD_ccmL`7IubNtt-Wj2*J$ECtsc3X_^gVA z08(@D{CcO?JbKn6VPR*y-%fAskIy}(CMjH{{X#P?z#@K-8ZRC_^C}h~8oV3KR}O_= z%8F#c@d_}C!PEVvSJl$A2TPtN$aP|jlU{2#iWR?t})o^<({}rARhm~nVT0G7>56G@$cI_(E zbPtdCNUI!1rC?2!5Hx4Bsa3)yN1pv2U^FcXpTX)wL$ z;4ad8HL*x)yF;DY$I-6etWI*Y55+Nwo-bBCTA`v9t zgWk^GaGOokr{%)BJ~+YbYjX4~NGTpXQ5L~L^7PSL!u^Ui4yJtMPkvf?Dg5Dp3bS z#vMKq60rS+@Ug9zcV@zgco5Ynok$vxM3v&2P#LgGQ0fVz1lh&a@H+K(BB$@?MJ|Wt zCP+@87lcs5wmHF!L3^ECUbLm*UazrBdV%I7B!faiv+jwEpJ)j?Gwf0@O%S~)cQeYwy>}7 zLY2I|a2iS727if8CQdZ*ls$vZgGnJ{EUA6uPwOjXfWLylkH{CmVpBGQ$U5hAqconJ z^oW2SLrcsxvR6HChGTlAcby(m`#vc*4i1W7vcm8O^)U~YV2N9RD^OiPRk>YgPX0h( z3Jlv4O=NNmWg!%eosTY176+}?7Ry>RR$MV!gchm^dIY@oWz-A2ZDJ0?FQon?pj8#x zo97D=8Web9M2rKD?z>0P%qb+%(oH+z?4hgz=}93AKoUQ1AFO!;By?%K^dA_mz=0A+ z#1;Z7NJ$Xfx2Gitn;0bD@-xJ9C~%{tyoFNBg3)L;>y5Cp?uYxEc_E-s$bmF4M~eE@ ze)UMkeb`o$MOz<+qC%|#*R}NBX}Wxv8&@yHCaM&ytgHj$(_;ZH4&~G%2WEluj>5co->a$)bW~k8w3W;K>kif4tq8a2pwK^CeEXHhsXNfZb_OU`DXCoYPlY z$?sxmhv2_GuhO`-J6e3FH+jWHf8&v81(IwH-h`-y9g_n9cnR?b&$R*cY_c|3gRse^(pCL`=kcn{M_km#4*{Zi1q@fwC>i;9|O}gVeuDs7@YkrE9ZM4AGL=po@ z(Uhn%2!ax-01^d|wCZK6aWEuENSK@nP>?L2)7#qgXLwJqtmQjvDm(sKF~4pX77 zf?x})kxGeHwFEap=FX%kqKVOfG83PX3+LB92@QFZqwwtKTLYf;NWM>=edMew+F**b z?4CU$5=PcMCA=$c}3Zf*!xDoY@~__49&jS=EDE+m*4O&o!L3KM`-gh$`?LQRo@K#SRfx* zRIC}q9*NQ<5+esagq*5t7yN2))^1@R|GE@G6Ws)4-s6MJ{fx=*h9O&JgPcBqqiTgK zJZk@>>ApA7@RW#)nu#Or&K+{nxV%MHPAQ;vO?pZlXs>t2>#>p&z{dM?20J|Xt`d|K zY?xBldD7z7t1ExDGh{99Z-d#PW|vfNL%jLb^0)XmpFVSxv=5A zE|f49hC{`IddEivSK0G@EIq-U4*D2GgARZ3M=}rCU$+{?)oPd&w^`5JBr;!WQgs%* z3{$nd<_VTk%GKDaP$V*N!dEck4 ztW-|kn`&w7AvLRy^J#r(9yNQ#7OhdM%|=z&r}My%y8=DwdXzyIwvIxWFmtiPq$DtH z(S#j7csP5{eEJ_ee0ZM}*f2`F2m1(*6#1y#$f%Y?+RWa$5(}pMDkkjhFeShxBMyc! zD#&X7rs_$M&(8NKh5}&%LFT04zvkgStuv)D(APSzQLq`)=#lXj zGJv7BG@LAX6+ws4${`HHp8yt|i*$hPelJ%yuV}pz)zgJnfVrS%gU+*0J8x!Zl#cLG z=aNFbp%ole~jd_3*|Cw7~N45=**O*H4`;C0YL()Nure* z6*`l@$00qc1GKOe#-9Sf1acLTAk*Qpo&wv?V3y!RHjhO;}auuJC=2(hXs$WM;SK zjq-SY-YC@3{P)K8Z#njrrryiqcSk4fncurLRts-SFw@l&JR{qI^;7FcRWu%ce&?&^ zvm$!%si0LuxryRG!EKhqm*7OP^}==}Qx?sr<6Z}ym6r@CyT-AG#^ImPtJSc4j}Vm@ zf%-Tq!MKhYp6#r?c-pyVU9;LjMi(>osn!DU1$HXzi*y$_=M(Ho5U=b2Qv>zp;cp-P z{CAxmj|Nhd&q;m|1Hs(SKWRLFd}K|PRTr8F8cMc2WW^d7s7?T7hk7&@3)4 zZhX<1`CNi!fh*c)zQVAVvF~tii%&OJ^MUzVm?9)l2_uze+eMwkU=fJ<^M7yy$*|Kb zZpaW<=|-szt@w+iV2Zr;A_=Cia{Hp+2tk6f8ZG|3H^qy-Ur4(rqm> z1+KHfCGqtJzTre)?4DC}_nbGy#=9^AXx{ubu0HSFB{4bN@idgped z<$l<~5k65L9Qfp?!vkgOb@lXz0tRt^*BbUlJLDZ8)m>}c8{Y`w8P^(k{{Dj-fRG#% za#d@S>A_TDaL6k(j3TJKo4h!M%g`9=d4pC&Ua+G(-QDi|c53k3<~2GmP(jklgO`=x z3%#QYd_e>)(gqXpF_(-Jkz%D#jq#;H=~!X-0V= zm$P@o((jSQ5~A6Z9_%!WDwBG*yM9A0Ha1ex665FLc}@F<~X5 zx}#!^AgS9~H7aIBDNN_Y2_B-fK-+HYLe{Exn?>875hmFaLQRlCbMzcUGskFR7^<@k zP7sv^k^#+J)IHT!*A2U3ZW>+L?MK<|7==Tsq){o97_TV3D`8&ObxH{f6#YB|hMcb( zhH(jIOcI6!$1A>W%~R%AwU}`uv|Ds<(4?DdZW_oe9-hA2esqhh0EAig14HMZuHf`E z6%K>&x{2xJH^g(Er#UGm_1>+SXSs9hm*mIFN#XW%M#W4HZ74LH&qgFK#UZ`FXBlMp zc|ZMQR~fMyW2y3nk`g|DUA@ch1Djh(pQ`C2vNDsnryIdSuY#G zoRj+yiT?Ayqm$ZAgvn)RmO7>Q?YE3boXFTVcEq$AX}cIs9?*yIB=4+mWUfAcZ%!c5 zg8R-*2F**(!3nDl{v2O617R1V2!NE3WgLGHtf3yVFIY@X2s?V)tjFO3KN}p3B)cHa zwWsoqd=nirGQYAfDW=-yBC-#~JnSNfRV7nD7eDebC4c${swgD@bEO#7uUOgBEZ!)Rm)#w&^tWwu4Zp_ZiEN*;EJI^3*S$O6yrtb1KW+D0_ zeBSbMUZ+arOD~>13(uaSgvj5bYl|-B+bqWex@PiCO>)Ru=l5WShO~y5$kKPh1#3^Y zp1*wYZ2I=-S4VqW+h-^H)3;&x-48_gZj?3}9#izYW873hWY8?t8DR2?Yo;(DSg&Vo z`yBfw2(MBiiR+m5NEKcHw@gs-&;OpxU3nLX2q_hz7px1X>zVp2fwQG*|FyK82yrJAHuR3#n2>`vMEcW%rtwayQXAxaHBE zOkK3*3YW*Y zk2)Vs4ftQ)`rw@4-3z2qI3dJA?veZWM^XU-M}OV<@w*@Q{$?p@C`k&ffYK?W-Gva8 zo{CE6G@EId42iCE<(OK{lHeNFEMuS?Kv+_Rm*a&Z`r)P_PUl1(lbJNxLZ56Oe`|u9 zk&NO7k-%U~5y3BHat#z;1P3WsP0<`*6?wEa$v_=&7l)K8a*=}?KsC=yZZv@~OK2g2 zbejqD`HnfqB+k$MTH4ybnuYVi7pzZI-Nr8-O@shZdVT#491ORVH+C%ZXnx z29K;V7!1z1H7NPd|EHM$eXmMGFBJ%#`ultt>MNHzC9u!)v(U2)T}5LV`jgWSs8O z{d*U%%#|gtv-E5w>)7ca!NXsBOje>BEN`v}W zMipW-_S$QLbkmI#Q^V$q>KgL~TN_#0SlMJ3!QztS;@Q&kc)2zEm}ofDyzL!tAqnkm zxtV1PvDjr1$vh@GQ)1)&-0aqS3L!Pm;ki^rCulEJG%5}o2C0!JP!`R-0vpew{$4c( zK--o_Kh$iJN>XN{D>{F0NA{fO7@FQTE)gNoJYBDODG_dT^;YVEuW0^(O*2NiY=Qk= zmX@UkX&*UH-AEBCpyIIG4)TeOW?<_ZoNC0d$6^SWiD@UTRKCUFq7G~ z?DS53rG&-vzD&Tw+s-q;pOC~9Ua5L$1x(;r$Z4UmgptgB8pcx=3!(D^*Rl#Rh@RQ{ zz$2U`HkFh&02w8vCWvjIUlgmw9vBo&&S1tzwpZUC+E7JnXp5`4Z1k*dsyr`>8vz_< zi>}6+64f<1Hc2wsb_yRV@}-i2HT8PrE*yn=`51B;j8UOYxL@mFk`h>= zaG+{g(8<`QZA(?|Sj|v!KM&3@Pxpt@K4*H6*KK-xosj}HlYjbd*%n_*hwiC@sw>U? z>qlXlH!~W1u|B>55a-@UM!bVVEhkjLL7RIY(JIEP1u()t!IV^$Z5*|Z5=6ITteV>r z4Iaa6#f<{@yTDI>w6tm#K2R4$Ym}2GdfA|K-c=Ml<XrEGV@p|J$;%v1KSAbB1;b30+h0lp;w6m;pC05HSKJ;$ zkKqLFMKuhK=$rq___h8Ov@lGL0@mv4SBxmdl& z^#;QSok!#k@)rBPC5}AhP7?JHGb;xieihFpii79Di5yoevp*J@ct+FlNRuG%1MP#5f3gEGEd?ghuYm9yzMM~x%l({ z^?dnGXY=3Ip1fFHmf&+`=Z{f%0|3ikt#9OxALnjqBADW|i1^^v$R{Be^LUbyAR;a* zV_33r@mK%~R~vsS?^Z+~;Az<8mD^OOE7oJkhE_?#qLCCzp^4cOl6I?CscbxyV|5V^ zVry(ccCGPqx==x*M8hf+T>ZLFrLuAt_DtRMf`Y``erQ50a}!6d=aOpH1yf?S7u{N}URU&Cr<;So!jKO6YU&EVq^3z6(|| zYk=c326SifqOeT0cYL(8l(qt9Rx0d!A@SUam<+J>O-4Dz_jTMDt;=bdxA^fopt7C=Vm)9 zA=KF*#Az0R`}LiG%%-s!9y?^eu6iz#c{>cCqdWUNankJ~&~X!bew7N9tDc`e&s zyZw@Q0Ta?$eZnaC6e@_Qd%;?^pWp3X;CgYWpMW*dI{(w~iOz(+3bIERyoupZ1P1;J zod_IUp#pg+G^DD7%tm=8uCo|%y1UBU&;$?Jd0I>JNiHm&t*@y=h2r2~n*`jCEDW@9h znM(JmHIiL$%rZ9*CXK|6I5zK1-p0gLR@=)P189r=jXFIQB(y0vl4G|k@zGp9uGtB4 z4>Izn^vdh48Qc*ca(;+aRhSj*3(ZsBNnR5eRQo8pVQD8tfijlLP4&J2W6N6E=1d0Rp_Y7gHKJgypeM)z+Gva7 zsG?%G&&WbjxeQkq<(x;vWRuI2=Y2TiLD;orbnhI#@0SgMZ^thmC7U?J#t-Y601V+S zWp&ENYTav1@TOdM9#-wnM>6ggdRVL%j-wy#C$O`x^rcT>8gBQ-S# zaOiF!WN3b}^c21E1c=6_?ul@h%{0zcmC)Md=TBE(sEm>h#eOqETVc5@@2oMmg$nqC z$#pfq`8O1Qo%c#>6^|yc{D=8x8Wi&fS6}{v+SO$ zxGD54MHA;s1w=_PRq;cR={>tiLgQIcMv8p+Hjzd{F4lKdD= zL)|NrwfM4Fh3{qJ9t>%-#7RpFb@ESk{~>DwS+xYw?~z>%NUp$Rs2}sYvoE;6YQ=p` ziy2AMeZ$|khyJE@>-#rDe}7&7J*+K=^$IzL%TX5Yuh1l1@pWd2Cbr{{f~j{6;>4Ez z_JtA>QCFO0@}1Dq4Yekmh*65ry7D$@Ce^jcL@eMu&y^~)<&b(=Fth@vR4Ys14 zLp|+AE@-Kd{>mSHYUd%kny*Z9lTb}*9_1P3`$X8&cB5Qyr*9rNv;6ucoogF z#g~h#k3^r4^Anj7kKa3RosN6QuU}TB2?S^)GBrI859NwlV|ITB+Ex*$711IM8|XHSq#?;qFfHk-sO?4wUPMDZ=$ zhJ4Y^7!lqg(yV$ON-W zx)C}i0wxqB(t&CO#nbj__yH=g%MI3&ysF#8A&0$6vNvBsD7DPkI3;^J@KLv|FUW0<%+N}~6b5l6=$k)fJR%dg@5s-gBh_iAgm72cn` zhG2%<2UT@NyizVvDffFQfXzBJaYrJo%7{{}A@*+1Cwsevr>&a zl@IB26_Xe^TWtixkGgFmcsA{p)$!{5VRB&rHAM-zd}v=-^@(f`sE{`Qmu_Z;79>$2UdptU!uf%&OTDTQr+<10)0`Y@&SX}Bv z1}`xs_L=Zdk>}wU!9ZDt)N^@1Qh26qRFOHPHl-x)k?}`+3PFGc97T#WLWVQrQDz<6 zR|v)tv-sV_`vzizW}o!&@)1cH>)%grY<0svxioewv~)Ny{1>4e17wJ_s)Ai|4O^a7?Pj3SNg1 zrSBoRgWJg)QgFu03A5IdXHRW_FJ4f-TQ}$l65=8w!B~hjxNKkE5GL3~r9pG#p8j^; zNwv^X?sHt;s5~Y&VBo^*UcHZr&O14f4CGgA#XjSwme*#Bil{JgubNtFXMW zNs*HIO+W?Vb0&yMdSh)aS&b{MsU$Q;G}*Rr*xU|uEH{+5yjQNM^X1B2oQ@rTNHyu? zrLaK~YCJ@1AVeM=uhGxccDX&lpOMF{1@NpZ+|iUs5ufHhc8|;gc1{2J@iujxKvX-u z0W`mJtaKS+1!sV87(r!42|UY#6o--eM`I0AbrAp1#{?!_-bbC8*CEMeetPAP4`$(& zgS}o^q$IWSQ_QIBpQ|`$-kyf>EPhIw1bg&7e7&qMRsmK)0F)t4i;01_j4#$FTBl-c z$XaC#W$Z|unT01x;&qmvZLKVBJ-D~E^y2yE))(uyea%98sn~3c7eD_y*KCj=Cq~%r za6R*TAfnSOUf0^ym1mQ8{rttVSI?K8E^jWi4&dnEkmBe+V&yob_&Gn*4^={sKqC}@ zr~`%gt1Aj7qcbg05QJ&=HScdndqjH$;qHtn4LUmVNOeJh0o?4K^rB|Q!-53OI~$p= z=d)P>gHQCnX>@H(G7bMmrah?M`rwhHNYN*z)z2ie- zgYn-jY=&8W^a>^q+uDmS9&UUbOxa}H9(8f!h3}!%dD~iU`NNQ5KeI_}T5SREGD{+8 zleb}~W0M@0f$QJWsPF;9qYj-82Vb2!9GK$v!bUXN;UMPvkXyBNU&ILQpC7tz?Dh_5 zS3aMcuDCf#-XcMrPsrF5WAWkzQu6cL;L{M&NjZzs$8$@(5f5JZ$nh6#_9; zzr~juItd2O@br|&nCBcfdAG=2Ff?eHHD53_VHBG}i4`29yh!eNW;RK=w4VE;2e7r8 z6l0{6tTK2eN7s~HqZ%+~yPa;d27$st7ZH&(V|glr0qH2*IkAXuf6lX1<#Vbg>g!km$p z3a!899j?I2_RpOaEAzvIB!#NhU1uX!iWjJ*1?ENj&NSjGg3axgAqx>bx71>EaCw1a zMyW>5z*3J3ZM)siv)#aViDc730LM zMWmZhZ_#NDkjjuBD+eomUkPF0c3u9&Q;Oj|#)JK#ej(xRJFE+)PV#)G=JcNia=IG+ z_}O#E+_W-GRsc&T;6z?0&SAh|^5q}o6*x0G>4ZZrpgT2{Zo3Y~j`KEzbKQ&U%SZ@$ z!wf>KdyLBgW@KFvnu0H`iJbBvze3NLatuiuLt=94JhQ>1aaFGEtTidnva;bDcTJWj ze1JZ1kPqw@Izkyz2IHuT?0O{Vy*@D+Lz&|I3JY`T1ti~u;E90pE>7NA*&*;}!iVRBzD`M_AeWDxNN z|1AT#A?xP58eWha*M9jpUhCoizj3%EuX=FvCDixxp<@gm>*eDJ-p4q|jzaeMhOWIj z+}k&8wJXsfkYOkSWZ_bvd;IskJaEJjNQ*?l%9bU_48a z42NaHvGH+I7n#4k`R^CIgY-3)286QU=1C|lxngWKD^~#h0k%cW#GLNQ|I#YAK=Uba z*O%BY=2@BRtel25y2JibB~8oSwGtZ}8ckVlVlyLY$tu^*j(6Knhv z^h`+Bx!)SLnI!zRtnj&4WlVSAO%ZTXVdT)$sq?}^gezPwoNz0S2qM|iHJUV&5bC>^or`>0-;=B+2V#5@o#p9Rjw#jf09)7trH&+f06-J1^ zWr!1ehc_lO7wH1HZ$G2F<&03oGYmuy45em4aD zghbdt=23&I&8FY5$PGzGb)6};e67I*mIsP{`H;@Myr`ZxrhgoU96k!XIJAWt5=&^? z%?}k{IY#x&vaZxsMNEvu(nHO0@*r-2G^m(ykl+OA zfa@?Y{QhQ0GOZUeI97mdrh7W~6d`i^!zZieQmDmsChK-kwiV7GZWA6tTsXiQj6(Z< zbOscP5l3O~SL7^XhR4t4>w-54o7X{Qz%-;4=lrO(&vb@TJR~johOGed+ut@l`Z%vs zpgpdY6R4bw z3%aW#cZcQ-)3}BVs5jl3{5bD03$Ci2o^-Y}FnZ}kGP!hWOQSBFhLo%O5SmC6ao<`d zM|gTb-b{jx4KJqy;R}oWHD{=Z3*lgC)E>^(V)@^SA*7tLd?#ARJlvn7p(d!@F4&mY z`H1C=Tfyi8d^d9N5vs1e%586%nKO4-F$^t==CR&%6m*M?)+TrnXl#uX46grJhIb|% z+b*}Jz3EN~ITYX?98=UD_YMfRS7po7CbZ46rS?;oVZ?pwnh$q{r*PO=oqMqsP$)Hl z95S*6RxT3Q{KM&Vb#8Wzm+Kvc2GVy`xA5jq9B9$d0Wp?X=jg%1Z?{w}sJE9`S-Sz4 zgyhqN*Wa>-Z;g)OEXLU6Oq2SM?FD%R-e4*nna!k3%D{A@-@nR)*{7=n&?E0B!tm?1 zOUm{VPngDi#D*&e`V4e9iAGs&5gs9+WMmm$YI!NxmPwnzN&pUnfsN^B%I=6d6Q?kw3oZS;o2nP z{g{2YJXRTiON;jx1L+R>mp3~)ra;K?!S3a)KqAQl>C!np{`B&p%*AQkD2tKIzq_=! zx>~iE!s9l+148WUmFLf1OlZ=zK%@L+6Mnm$9E4Q9b4Ib#6-S&uCBu~hT1{0X#y$O7 z4x0syZ2{f@YU+rN=u@}PnI6YATp+yA1m#d16{SJE87Ymgmy^}t6KTfmCf~6GL>UCV*wt#HK6;~+FZw=uft2fu4u6>oaCjB8A&gbWtZ?fNA ztmP5k?%qxzj#8m2`D}by^i=UlvL}@|gvv5E4Bea0UX_swyk=(kZc*GypLhE6e@ZZn z&D2MuC-i)2~no-L9t3n#)$| zuNbada8G>XQa6vf8~P$;CNVc$*G&6@1>`bhdx;dFZm-FTWKdFI!x&XyNxHk?kBy%4 z)C`l&%n%l2@OxD|QY%krCs~k$brZ)iuA?iBhYe6pr~gVPR}A~&hlGdR6FfU7$@Iygm_RkwLn<)XsZ64nF; z-^idQ*hP(pk)&u1ljvTDqvsVRpOD{0ZEJYrLS%j20If;|HRwb~Z!i zQ%zO$3O#kJO!a-a5U{*C>7^Hcr&ut)iU9B$Y9=@Tw=vDj3W5x+S=Q0GKF@b94(Fh?1 zN_z-1=w9AQY20j7DU5h=Qf5Br882Z}KK~i>L$c8yR!V*2a8f+830R(BaVo z$3#hzWD1SRV@lik>pOdfJ_`XM6uus6Pcw> zw-@Cpo|QqNTQo7DZb<&1v$pgKmIII0!6Pw&tq*QBZDYmi({=m~c0B6Xf}_fQ=9B%X zkY;ieE;#{`u9;*}UTC?%eldzRt5|zM{FWE71YfJ4Gp%@hh#8U%NfurUsT!}`s93Gv zQV8(3;1o$Y3NfkKu#{Vfv@tEsR!IT^?lfOlPe0&BIF#n_Q)l%!=4qfjdb-0d*2|Pc z(rVRf{Vom2oWe4cNXS#()l3pTTC5|uIsl^!{XWVJQ=OH-tRj{MT1WGfY==k$$Arua z#N<-@i^s8@XrA^^haa*g;f;}zuzcQpcQMi^&B%7R2ol3=G>lyS_$)iILF~ME?4$A7 z4WO-h4OTJl!fo8gPW0S>sowlHQsztwV<~6c2V@^@(9;woXS@!~RUpXP303hN4poAyPY&(o$$>mRY@_nuwnB61tycP=$l6fc zSJ8hkRPiYF$23)YF~y6|&UsZ`h~z0*MSOPF7VgdF8&6(rrqA>J$qC57e2s$AaNAPP z;iHk*5%wf3_+n$(QXBl0tlNM4X3#&F-x>6OLjdewdB}hBY$ZL5lm=kJM?>xO5^35B zUdC#7VgbxH+5o2K5OOzWG?PDyKMtpG|U~Z0AR|Zh`NkarRN$ zg%Eg!BriW{NAnUZpRT_|%a4TS+apM^`4GR>T5N;MtG{qmi}**EYB}|!w!mY!=Ra<1dku81jc)qzATzF>Q&JQ1y z`SO6*BUoPa?l}p6@e)A;#UF5+`cav!>^ckqxXgtl{@wQJ?OQWn&~xp{#`4e{qDDQ+ zI`bGTL^rF_Qt9P{(1bl1BLx5mgQY-U z!}kv_re+^rG^YfG?VV7?wzIaeqBeuG?~$QiYzMlM2j}FM@H^ZBE7q|2Nm^<*1F6JmW(aFEhU)pf4 zG@P5etmS;wa(=$_qLkt&D8%G6%q`~^E^SzboWFF)g@rQY!u?BzTv#Y8UbuhR-tK); zhP?N%`u&fW41fQAX?XuZ_4_B6bb3(D^q`vQ!DTZ&;5y?#AIz0aJ(#=X=oe@hy%y%m zH7v}P^IMoBxl0;(VeXQ%T%hn$Za9Bg!-aAZ3k#Q=#Jy@s_o^k`Lo$z8_ynt8h;EvcgIh=td zs)IUnUp-qBYvRUF+Y|CRwbv_Eu>?2Q+BqJHm>OvYIf^aQi z^A@X6;i7b$uH&%p$P)rDY7D*#I640`bHt~~p}R*O<3;iR60Gkq4zBQtee~vxn$S*M z3Nw<-Fmy<<78P&mE11l@u5H~c`cp=<03%m8RV#4O{ynRUU3gEe*YXI+ZfqGadzXyD z_C1&ECBx*y(@}kTt0=X>Jh-iVlL~T$+B3`kb!PO2!X9V+?|FcSNhx8+n=1@=8(ybX zE+CPo*JKQI1#*i_E5`m-Rom_FR0@Fpmf}43*NCl80wYvPL3R*|3;kLTjgjgAbwf|X zC>=gak7AL0Vi`r_6TKv@(j8TkZ)bD6>QR38MfA6)`#ZOr?($dUa>~P)yn*thyZrp+ z#=kXPr7l4cagtk%`N+jaSIKi3NkKBEVOLkMcbdnlj+YDG&Do9QiL~n`8qY7)qvHhx zI+l5>>5`GQceq7}5GG_)YWb_iIx|iFLNZRyd9-q;{D;n28 zVoX<6?^L%+i^JVzLRGqlV-v9#>FT5q1BIxoiQKFWra+z`FBw#IPm^Oq3lcB{3J~%r z9lBxU`G+*rg1`)&F^$jCUEg@Ibe%SxX|$$RfTHEts9;%6>AYvr!DwnLr^lh0Ru`Wv zuf|l)S44|uF;zWf?>MdL3FnRUC@~#J06`4q#-Y0O<*@Eq)NxQW78a-#%AfrsMrd>;N9IPvh9 zjTT8|#QLhkbrV3oR-G28$zdX&=~~LQU)#K3juqBH3T5=X&Wu*F@1{t&3eVJ59bMvXWWg0sODA@8VUs+N=kPx7=$=XKtr>WZk&8 z>to`XGnczo*k$8_h9TrQvxaLYIFFKKvg47>ckRc#t4$s}e7B2ytF)r_tK?w+bs)L2 z^)KkY<2s?&lvAyxh?*KGf9K4RS8r?$z#qY=fx8x;tgue=El>f zbSksYq&j1HfT7u=3|ZD!SyxRt(sOv>rE7$7)hSPnr=1bL?akP5u3Q{wA#g!5Oc?bDwa`9~pR;73n|Eer>{w^2@j9X41aI7IynHM}zbHOk9!@;SfUJ7+EA_(`PMW&PDYyaFE6C!w9NSF75hYi z*L)eaFv`3ipFw~J$EnJo&9J>MmPXLqE-BU;oz?BKdW`NCM^_CO3~sEp9xf8ow*+O! zA7wHd3$qT=$yslvcR@iD)^7ib79F;U;yU&X#|c5zO;mQxOO7ji3rb>DT)~mAny1A8 zo6r-I0S>u1WSI}LPec|;ikmpufQ#Y}sjn3yF_UuOVT}r%$n(vG`G3JGaI`Q#%exc) zSeU=hZ}}hL#qzMk2xLi9NPSBJGk5Xyx+-UUiw&$}Ls5rS1tVt$2S4;?_Ie10hi8vJ zoBMJ8$9tdSAhZ443~f1(Gox{F14D@pM2GnIJ2P1F+&yR(l^2)si~(Ce`OXi|ev!o;y)^(1 zL8#6_^}I!;i%BmW7fRoyy?k%8h2E8hpDq)M&KH;oi}NHtTvvY(^DS^q|~}MI?O(@{A-B z+(hB`!8zOe#<))@Pnh+0DZ(2AvLqbx(o1-OgtwK*~h%Ii;tCRvlX& zQC)_C{Y)~7(*Y(2KK+(z7nw~-UnQ-P&4|J3LxxE7>+&INRTmE*knKHox2t`dXuj_s zwa{pS6Br&trWFFy6H2cp7(hyi8DJjnZFfF;dn!aQ0i<%fcULq_SCD1-IM!nqbrO@> zP0K6XRO~KTV0(#4e)PNf9^M=pj#m{`v5ORu{UlmL3TXIW&7b8HK_2ES3XzyAL%fBU zILd;@f(SPUlH(19<=*H{w=NAhL4)0RHhy=0*n9yKB=!m5>y%Sa4i=9&+DFGHJb7$Y3kK;KWv*X3rm@5-eC+&SIbx?((jMp$nA))3J;NjI&r9WY{5>#;ur?>_J`}v{h6lztAu`g*} z#XLdz3a?^qX(+f?N(Zk3zzqK@@;Agw057zgrt3rm05?x5X!$_qV0ErgS?6w_?QBaDw7bBWMNIYkxux|2i< z%X)5Du1e_IO|Z+5>K;0r6|^fpvTY}N_Us4^wA2sVMAVoa@EW_6poA=iO}$X_Y_&Acch+Lk zKA>ZU<(VC$9fEEX#3A~3NEmj`k-$kN1%WKMI|pxbpVMphIYPO!-9O6x(AI$LuAU1H ztkuu?s;m1EetURmz-W8RNTnQb!VnfuXNF-@4R60O#@8*iBt!igzgo9K%kbpNFJyuV z`Y0N2N^=y3-j<5^-QnPC%`xsD9e4fnlklnJZqWx_h|Fh>Vv^q^-S^V^#Lr17ZF$7nyi<~y=N}XNm&QjUb2dJql0jsD1>bZ?@W-w7P5Ulc^!vCLsUtx zCU-L3SBC`?fvm-=&?a#f%EG{_F#E|Rt4^hq%F$!jfI2ycCmvVFa83qBWgwl_9|P&S z$Nl3bOy6Ctg+598ykrTFpRFu?xw5>`v4b}O7vaKUQ+l2FZo0xVC|LIha`HHs3T9D! zVjns>k+{f9K9}C6%JY;`s)5Ikl{!l$H%%p)uzMwI!(h5y(_?yXFsR}QivHBa79r9s z#t#j>N}^n_fnQb;D7xQ4Ia?&CJl>Y$m(S3Z$ZR6r$??|vx!JAvq-%Iuv)O)}RSj1B zI8tbVxzi+J>}H*uyf!F5g=d{{PZu{nsECULqY>bt5G8=KM*k)=9tr)vC%}?KZ>=bB zxumm3rzMzhIcJ8TakjYWltYywUmZvWhu&+RAVo`f5FZkx$a_n^5!YcPSLSr9;87TE zgFyZ?AkkB(1;%EGy7`dhmM|i}#YF|;)u#@%6)hPw10jL-A}XG@sg*`U%_``p)!^jN zcuLf1{s=J3ygvXv4c%XD5e{d4g#t{=XDLi@?!-N~eUrXP?U5Y7>C4SVk=3^H%M$FE zpy=G7fr_!stu7TLBsw|htp79S1_eNJN7cV#If*UV1HLr=AjJzny{m!r>xT?RyvD62 z^B$e`my1Tw!7HI@EBR0AW=}?&p{-Qnl2_TRAYt0o42g{iWwBgC(chSYiI-zsObZ@Y z;d+Xv0_rBlEvhH{3L^A+1BA4YJ2xI)=FS5LnI@|{mQIR?${WkakHnhhRFFP zCBQEr#J7mN&4iA|&`#)ufrXTTs7KdivPB%ghAUy!HIbF<2x~r)7QOT-0rOXMakiQ# zEGyai67P7swiH&6uslEx(exsAqNGw?n7{kg(u-&Oq&JelxPOy-Ke*?;AKbe&b3U#s zpCuI~HqF!T`WM6!>1Sootgu6CaqBPsyu5LDzB9eC@?vwIC?WM5H^+qKS%2?6r```{ zi8mPiH>tOuX@_2#`E=J7e!9Cr!VitL;6Lt7;L@1q%7GW|KA7d)j_%Daj4tcS{`9iG zc=3<^yJGHpv-j1Pu){I`uIhVlR(;2V%2j;@Cr9@_Ap~Re-&K7-c|hM!?#<5X*A?0e^N3&toZ#Lu`DjlWH&k1*7 zs5v>2v!lc9o3uVZ1d2pDt)_%ari|YI9t)L|P}sNd0%*6a{R3WP6Nqyt2^`qj?*v!q z5k09`0omA^Pm&bo_1RU7HQD=SHa-DP%E{K>9#8rP#xGw*q_aW;Jbsvi_h+X%^D}Juw4^amp2E$s_QD?(jJy-Q!7)%N;YlfwuH^t*w(iP`m*A3lkJ2 z_R$H-sgrXgu&y?dY>2IOR>!iwxUw-eos9`LY)%hkTeim8Zg=WD%)olh!`lWvzCkgU zzyue8~EqVGwWh`rMMSQ0<2 zT&k9?fov;4oBl)sSE3N%IRG6uBANO-YcF030`T?OHK&B@EJ0M^uz1o8tpKdp+6G6F z<^I9X|44!R@Y=0r0R;|L6wzdvau}XD@{L$^1B07-aC)KfU`rCcLJ#9gh3N{Y>n@K| z#bqJyNZ6iYX+pp;8?ut6uJK&^NMB~XDoB19=(B8>6*NPh)f=eA03jvI&_bmmK7Zdw zgP_% z5V)ZRA%kpwiTE)_kKn9RVVYXn1Vgz4Qn-S+z)7yZ5fG-RxTH{+8PzEKqG6?4n3=IR zUUPQo_w7SGIpn6P$5IRb<6g7?>e>@-fxn z$(a-%e73T=*kx$>aeT)ey`4cqhmgcHyb`$zvS#=Z1rF#K0G~o{&gBK9lMI;FaGdtz zH`~YG$1w5JAFxi~W18qxP4@#nz&D5-P(QgL=Eu&sts=v7Kypw5cv+5Z_P_pNxAtRa z|Fkhld-F@riCb{rkPg>bjnJxUI6)q~Nvg4=lLN`7!R*$_`MbF$Z&)!hx{frYuFhk< zYWJ>Yb6sPM*C1DXxYt_U!uMxzsy@}gj#0wqgc$_F`TbvcFp00h zWh?k4F>N!bvn(m6UY%uPa=n+D)8> z=WD9C_MMfpP6TNi3+{x4jvImF4}GB!Bz#$1-XP1TWXYN|WH?e+jD2f2ozG!OCia%$ zy?XH+c}$+<=1Y5acRu_m%;ewd{|gVoeF%Qxg5K8sf0YGY;@csFkhv-Wa(3{T06ySS z65rQLY+bdos7LBq4HwuyczQ$j1-)mcKUe5cAE|Ae01;%q1Ox18Xv>2OR?}JOEC>Aj z(;bqFPF$Oz7;Il=|2x8F4Oh){nYEC|^6TwzE&=}}&(qKG)9q%J(PxS4o|@w0&xg!j zjE2QY4q2u#@t8Jfxr$13!E@$#m*p~<36#~YB#Mlh6dZyX0LK?BUM=P_RRxt_J*$PP zK~ex1%yS1vXhzuEA7%7>i}8gg+Em?m8i{iW0I3sgVrMPz}D!%*f#EdkO@@0FW zKhg|~(A+=&bSy6q-fTTZQSONlDBxH&Yp$`VibRzCJ{6h|wt1%ddZzcYFm$vYc6uqD z_b?V`{#~&Q{k*Ztvr9gl6fndwVelz;QQ_{v-HPBU;X$0qIgESBC&I5A(9qp zhYg)UnWdLX2?-%0K$ogHX+e4*s1Uh>W>eOE1Lv0Pn>=c8b3Z>8pEmP;eg=Q+8Ip26 zn7uzYOa6JU^XObU5R0SWJI*?DX~|c-!lU9t6d@A8rPU5Pa57)YB}yy`Odw3L=`Mf% zcS~T&IzPsBK=8y@^~uDZW#|qrM6?n*U!G+FY#0W+EX>8(cfYVQmZXbJivJ<|nY74S z3UaoGAaK#W} z&$QZkwz~3F!|_kB(W^7J1@mJbn>LUOZFQG%Hu{%qgaytnJ(yJ{x%Lc97qsIg8EktO zc*%0i5AJ>2yxdq^GOqTYmtVekK8B|q%_fV%8C`@&FB(Y=t3%O^cU>X+ae7o{4o=B{ zgv-juE=cO$N;H{E7&?Wl5le}ds<$RS2JS1Y25#n1mr}zO@d!lG0xs+2rUjxp>~#qA z3k|LLdGK!K6Uke(dm%D)a4MD+9NQkQ`{d>Fzmiod%Ukterob(G>^@z7w(=YqVr=7~ zamnO?OIB%`k720Y>hj|2ddNxb))tpGUR2}N>(r2;E0puG>k0!S)^d|a=8rr%lnF7E&Z2jIiZ*FNKe!aM)swnWEy+&whO<$T z=|j3bY+j!bp=?T`6PTpr`+4~B`9LDF4u{O5XK;TSzoPdOpI-N74bz2qP|cImME61 z^TqR5oi8kC{;;zy4t2M)s;^)rVIc>~-Hbl2dyAC-7&s7#hjB!eYNCQB`<=yCORqq7 z7(^wC$Rp_GyYr)+5tvhISR;1MF<~qPqQ^ItZ!JQFvx=N*c236gZc-1^J|u2AQdZS^ z^Xqi1jb*k}+U1fH@{*>=1O486Jjh1I zw+eYHrf{xFj<`*yIzqwVadG>o5G#jQN;qE9t-?*n`N$b>W-k`tg8A+TehxvJ+--DGDaGK~)9sh?a%es~Cyx8HP(ZiBnc_NlD7lJ1kkJ%`1CBkQ_n zz8y86xfA{{S8c#h^E9VP#l|Bx z&)KKUurx>OB3a&II$%x})RE-_iv&*fJg3~fC^Qbo+m z;Qo#fMo_9iKWAG@#_FOTn8KatCe8Os9x;-5tiRZJdAGZ=rk^&EE{;dgnNI5_G?bHH z3iDD*B48?hZ;16=m4lg1Q5G#)5b>k?& z&&TIu2nU0lQdHWzLnDjp#SW(tlwBc^CT z?C#(WNGACekRa#c^pJo{=MMEPWh{4l9+FrlkE3?i&5EmHW+!8@1W->Yh86>qU8cbE zSWX^yI3PVW$bs+a@A8B&q)J0>7$|*NAfv+3(Jlfkr=sx^@ z3m*YPY&`yg{-Y_lmldnp*J!Uw|1Gpao00yHIv)WwFU`CngyE@W(%{JvH6IVeN|tRq zwP@m9$#*330;LJ#hp_qN5&U1 zvt$K<-}`0eRs5<^N{!%5tAHf49UIHoELVFLTNMv?xKR(n414E6)#sgWdPG*%H{Bl6 z8HT0I$Fgh7<%Au4TNwq0S~p){ay5FY6KCp{#&4&h$Ji=d977~-51ZHQlX=R_ovP!KjuQ6!CNV=T@_WO z!>MOg5=*78RyV!^x^oW{s^KY+*49IcZ|Po+aGk~xJ?R7_e^NSAP#r!GSo2RwXTZRf z3L%89enswy*1x2XxHa?7 zt&giea*NIC!`834#aT{b(fYoMKYcm$MgB97@j8Dr^h>m8Od+0M&Fg3D*_Xw=G`9D? z*;b{FK@*VIQ6t@-WNEXlq|CIA!;IL4AI5|}*KSFXXA3Ek-u7DgZ1aR!T-IvGE$42G zH+l8T&~-S7*DLE=PnN$}dHx7m_Ih>Y&$xM$B|SJ9FpSV5@)5WZQlYdxAPI`m;#H>B z)dv+ukPnEJc0rf)Z2_<~l~DY{Z+`O|Gh~4HrVS%`){S2Ow%NlB-5ECWfE?i@6db!S ztGfgrAWhwx`I0e8=INerBvv-7w-PBe6Hydx)A*icP;A7zZ3Gsaxo}rEs&f}xa{Bc* zVV6jJv%EWood0DrwoHencZD^@eYiMLzxEvt!DIgO-S*%e&?SMxePqV%l`?a!y^f88 z){v%}N&|uQ4Tr(82z<@f1S&h_BBgjXjoaJZ-OgP1g44?j8v5mWM=El*y+arprYr5} z*37%k^H*y_W7(e^zRW#3@_NU%9GMnLGA<2k(j~(oOiGEP(PSp4fTXl;0!wwBls`$$ zXVG0AslzT-q&uB?{Yg%N^ydP9>ZK}1s2cFr%=_QIUf$STdGY+W8l?IMhlF)enrE2R zQma0-7G#+qnV2JG(oRge7*Nam?1zz5nM$XF*bLF&dn zQ?gVh)oVnTTB~50)-%;Wb1TzK48hk%Ww)Mf)D99sVtF^*{oH)FJ3p7VnfrWkNuPyo zckbb6m(5m}1sr}#Ml@U1Z@NN_hsA&1jP43~H-_J`~OTbMuJ3&2O-O)I<1h91~O z!1x~S#Ys%=kc2H`&2HASTp81IY+l~{n$r$<_QbB&?9600+T-wKH|oq}k! z3Z5lSlW;7>9;HJMS5QOqe>s;xgiP^ZKBe?aDffj1#kYxC8Z9F?komB}u<@qBnXOn5 zUCU_?7g*hp6}Rf4rnaC`OXNBP7PV#KIzu^pQwiYO%eo66?0GbQm8D%iT&SI-tHqls z9qEvm$ayQpr&4sEfnRrj{$G3U@gk(3onG9BT9G{J4$iaENY7ubu9m!H1eVDUhZ{mx zvb|66${_N4vpPdE~p3h-hABpZIou)&GOvXD(EK6D4?;3`oViJ z`ZFzefXswq;2I;O1LLSL;%%RwA?Bd8!6^d)|9G%4|1GHxMHL6#chs;vf3KkI*!5+H zt@jv(19G(C=m@kjPA3l;#vfcCTp5)1zyd1)NN-!^7{vb?gvj+A|H@R0qX+{8i=8Xc zpSApIlgJ4vN?dKwICIF=e)?t(q%7$3?&L2bml}8V)pIn*zNWGUaY}F2m%cVk zxwCzIe9&v&d~M%%+<{WeIM{Xi_8;QRAIa+ z#>x8kX7I@TNv#cUJ$3#NV{Y7Y#9rX0n>)6o_JSh_0V3?-Ef6@NZT`NEwyM?+SCPI1 zBOAB<^G_Jk0cen^!bIXkqy^y+Vo_yvF@`yDfw3{@3S~|~B`uOg$>4?VqGtkTlLB1k z&R2(ZkM}FkG4+1cWtdrJNS^uV&|})UbXvx;1kGaeJqQy}cGri}A}Mo}Wdk&Dc!0RV z6|te%!bnpW@D-Nj+Dd?Pv~9uYdT1q#R3j$@5}jIr*J|qvG2!5fZqhhTEYZh&#%LI> z%d-Zp8_Ic*zb`w;h)Wk{2sgQ*m!lciSVZ4O(_#MOnr$bvj4enTJS`qhz^lP`rw06= z-k!xa*;IxJDzC+BtiN)s1KKQ;YQQ#s4@1@Et>02WNRH*TF{FAC*_LQ#4ds?jU}WB0 zVXn4=>$MLqvYYrr;(eB(gjLYIb1bLjpyM^0k|o!*l;;fcvq7<sO)Q@gIF`UAoj~1r}ImE(+gLNES>>^bGlb?vDwSjqazs|tb!mGff@G%6EZp)mBd!!`Cnmojl%&h-jkO& z=kI)octDa`6nvd`)P)25WYUI}GE8;+F?@zn5J=;H2pT%OavI;4&B1uPDSN>^^&O~l zup~nGaBpFksWl$^NH@m^?ba6PCo&NpA~sg-h+?m?jwz5f*-}q1EBnf&KAMU!M1mxT zr(TmRldya{%5BT32v$(W8jxh1)*CcYm@7X>d+@)1y7}bg*2?pz%U?xeUe*PTOKvR{ z5`%Q)#JpM|Wku|OQ$F8ocGH!V;Y~PFJkIaNeMo(7B$9)X>X!IOgOd%(@Xa?zr+2>@ z^cy3f0Xx#8nUW=fR~u(RE-AS-NQ9-&Au%qOha7>R0F0>LR~#x~EW233!e>m+FmDS@g^<bsTd76bAu;vxyS|)&03TK z#mn4>^4nvCDdR52bjVY-7)GE`*74-<(UO=&Hf^-(@?AhmumT`g0=9s`GR1(CP48od zx;(gH)>iWrfbPU6p0bIB5I<6Ug~XHO z5i(l~QEY;%079Mmzz_8a7y;c?JVT4C zoaVVPRFxsH$45L>%TpG~dWy;gXzITuCJ3w0Zj(R{0D`MG(}gL@s?Y8Eg*?MMm+g#X z{emRlw2LJQ1Dv=iclmRF62paAz$WEZQqBNFDeW_LD&3irgW_DncV`L`C}d}>fjCa3 zu*a%|lZu!LB!$G1mpc?0U3#(hbnzvASmX`B&6AB**ohf}eLf~rC$h0&0locjthW2A zNk^j2R^MwvkL<7oaxhY!8k0{e67p+rNVYR)fV<&dmCW%nWmA-R*Jdwk9p3k;t<8UFz{@@HXO?fjFa^|;+s9TC3;jqq{N$l%cjxZB;~jK}n< zVqG|?q(gVyDDo1Qm$;jHzH9b$B}K39*^VF2E&YYt_eq{A7pi!ioY^Qig~t zD9RAgXQ>cWU?3o<8i4z10ReyOe1{LV-9tuov6j3()DL4ugvVG@}^cWX+*6wWH`QpyY#GYV5 zcVkSw%qzw@xih$QB&0Q|_<0Z`OB-6z<>QQYkF&to(%RYkSkK6=u75h0olV@-x!e@S z+^cf7z_`R$J$O9tBDYn?3{+Wy)I6g&so!(2Nyk)?n=v1$ci}V>ODVQ#Koan_t)cWz zQOJpK)?S5>*ey`_?zi3Rv}W!UW7~y2dJAb)nTxc6pv$#>D-UX+2XxAboR>NMNd}SLK1e<0`!q6nNZCvxPX7|+ z$YaN%c@5Q4<(ke5#ofpR83%y!Xe-4*hN}pR=2%+3z_~$~r^qG-;XmMFAwJo@7OOQf z1ky|%k#L6-oAMkXP+6U!VQuCUGh9|A#s&hzEXmyabLVHt*&$0%$y@sIA_28c|Z%6{w~?mSq9WQX=Z zzw7@qfQUo1)UCnudr4PYQyxY2@g(m}SQh^7TM^*9-Du5OW0f2~(BGkQ7xk*^$2iC`nL;2|a+ zGXUKaM+X1|T5-dCI`e9&Ws)S%W>CjFFTd;}3J1i*Nk#wAShh^!07`Y8v7~hR9>Mfg zr!L0EjV8_K!x^*Q01#3--pzl5ee%Hq6# zok0@(jf??XJTgqC5c$zd>z2q~z$Qm;k|pmoUqYcHV|Gl|guSb*2V;qVW{Zq$O#m>HJBE?8n?cE= z3C*EX<@p3t^B4Jes);Zyp{6#m5Csb&B*mqKlyci_Pc@J=4NpEocbv*EY@CxzZd;uq zz#E$KJWYJyFZifGnDEV|h%vU`9*oCRlC+EtYxn^zZ>&DAEyGpsvhR$z#l*>EmFFLa z4FulNz&h8r5kasCW?F+sCxL;|2iT>>hiGEBDcq;7b3o9E(f(J{oqU%g4oCS^lLkgR zJpB3p2L09#LL0B4H6BLvhK}Xz$aYF~V_RN6PlNu{UrmGNlEZaq67pE0dq|O`?`W4@IpL&;kKrS`YB&0*165dckWJefTd zGMZpKWNu(fw^)FFtJ9b#(3BHEIAN4_*Od)7Ww!we375N`Xhaq4?_K$0J4li7L74J8bj9`7y0XgcB0*4v^n&|i~3qV-dIV=O@_O8Gw zWQPhkp2#@%`M+4J*yOnNuSqkM&zcb2_y`G!$dJJ zlW+uvKtb}{Xv>MeSOnqFO8MW4FV?*#XV{7jW{P?obCO~`DKj+2YH*CiiVLa-*A1&Y zRZU_vB2cJq7Le>0M$R;tKe2%gtK8>+(dZ?!V%^Jg6INE~Vs>-I{%m9Cl9hZRsR`30 zrn#4oDveBa9Td47CyG|rbh8A3yM_H>?Ahf^EwhmJj~krC5Sao%liOzsFmOMV!v@&J znvgQ|N&}Pp(WNs^$&%ouI9oUJD9~`R)=%kTZ z%#xCWzff*KhuG5DmZaKS6Td-#bTL;0Z|(FD2zy(uhy0L+XS-Y5u%yc8 zK^`46Ok~tyMyWyXV(?BGsVcbXOcQZ<+1K;88~9th689a~G1Q!e7OO-OATh6)TrggA zq{#_$SmBW|-%6K1nnTK6V-4NJu}kxF3>{QtKPLP8sLzR#)Fp*k%|phR=2zvZs2w%u+4hxhlEg($x1xRe zG%$2-twh$Nt<$Hx9k;AGW1OxnzHAxjVxAKHmUrrsimCMzp{X^CMc-=?&&kuwPN!`0G82w*Goh(@u5O{nh0>zUR{zXf3CIoXHhuCpJovt*)d5+Q^ z3Dr>E=t$|C&g4$XH}5AU0?e&)v|p7hN?#6Ca!a?ZlV$(8-B8+CHW@mR^9#a1EXg{o zRat!W1PFt-7R7QQ+HYnAJgPn~|80F4^&1>BxKBCE^3vVSiv_gau~GAb)APZ*+)zHr zY$0U^;LM#>)&<40C}M4#Y)M2Xt$5K^!@*kCSJZSI4)m07rG)A1V%;yhP8GcXKX{iE z1JnZN++f_NaUkjpp702ryr0yS0~HG?h0frNc#|_3abx+Z4V#S|&vsMLuLC(G@<-c2 z*J;DJg{DH&X2l$pj`M_pRsAK+i0*MOVvgGH`E<&tcTeRBAybs71bTgr6}3R6Dbqa!MoHuiS0G@8s$*Tbl_G zahWw~;SzWYLlm?4&m{Rf)18cH5A$k7wCbnE?Shh$o-5v;KE%P^>P#s~LqQUmn;l_( zomrRNQOv;Td57uB!N9$d^Q!zyrq%LdK|j%Sk1<#W@VaI_dM0LdpLfc zDnOlk3is4^K0KE~JgzmLC~O5=O2hTNXssAzvqR*IjN5jXLSss$(N7#~W>QD`xsCx^ z?LHrQJcKx~NHqkK0geh{9l?lW^_ijZi^sdBB6M`UcPLc{9!lj6T8OcXbz0uY_`xe2X|3Jvdmcwo4C;Bx?nkLXBq(=*Saou?_o6x2bw(DFabc!rLh)Y(~BGLFte-42E zPHud=MN1~b|Ck6nFlffOXy;WGb(o8k^Cao{jDQX&}c*Dl9vs`!> zS#Q19S$w&^v?(yNuhO9jtf#*Gi#*O+!Bv>#wX+6CrJ_uV*x{mGz zyw{HW%9*fr5N*xuH~nxjv11u-EK^+ja`J(e7>|@hP^u7cvo;)gCWujJghoRkP^d|E@$a*C-y_*TI{HQb4p#%&O!Y5K-oKqa||!&TUzBv3?x zG@OngXeqtTCCMvb6fW8Z**AwpHpg-@2GDKrh52Yih)Tiah^d0R6mz)Y+5-Jvl4Pp0;9B*8u8W9FPD;*e`^H z5E3iSA)r3S5ZQp^8MKYUd`pIt{{)sYMHPa{);oS1TfVuCMq-S#*_1m2bl^ zCt^cK@I`_0J_wOEgj*hg_R!YS4N7x%l-M0OywPRXlv<`R4Pj z^~IM|UwfW!V|=TP<@MF7N#Y$^3Ym6j4Ts4>(6PNkUd!aIhe8WwA#;;J3>7@wi{XJG zmMS14_dB9MkV~WADC^cx+|$rpIuRg>QweIyNPMi@s1b12+ zBTR7JZA#rJo-nf7fY#pj$VYhLPngm{n|Jxot15?wSeX(GS!{!5X+v+EA{BWvDbz$z zr~e@(`7glfU93Sn=j5%x6_2DUuJ#n=NS#8^7(bPTB5*|^J~eU`&})P-##95t-m*ut zVb|rvk$QU?NtU({Ez}J4k^4B-Om!=yfnhq$lK%ALk-S38uf3bQ^x;7%x(r>tnazq* zprgW#c^N@B7KX=i8)&KxrNVfVN0_w{=GrFYdR>*-w%!mY8^To4wCT93Ew#F8W2RyX z(Uhh)9HIrmPBEIe0gYDAt^3Q@lmv3axbilD6-{}{C-$$_-k%fOajl8OCvdOk#KMAj zQH7=bi4(_asX$em}gjVCFP^&|zsESY*|(OGGOt zrNA5&d0_m*6U@eTENEN|4)L3PYbYs5bD5_rJC>dGF6+P55tnnRw#0CYltwEK8NzMg!w`>*6&I5ve&lSs>X}*c5dm2O4QE2G z0vujYLCb6pO)=DGx#{f0+~Y~(wmc5XN&ti8j4W%OXD!q_NKd2H4N>L&iSB_;d{H^} zL%AbgWpXt(#G5hrwR(=7Qgo8JMwG6A)3pX2znot>>cpjnx-OeJMO}X3LO*;=UuLI$ z7bWQ3c(aLL8p3luKpk!TDaq`1dIK_~2}~Y5oSirHFSr8|-*@gRs^7y`!KD)WVCang zK-Yp#=vmtX6E-9qI+)UZ=p&e2o<8$P3WK7_Ya=1O!gx1(pv$Zr@ny^V!g-;L7(-4L z76JjGkTJ_8HWiY^%34{caWDs<@J~x#)Plp1wcrJFEV9r6kJ&Ul{?b%EKx%38xEnl@ z-6_yMo!S2PubUFPE+U4|Hmu!0)iNseQCgVR<;ihO=zSd8(4YFbf(eF=eb+|A=uU*h+&M}7q1+wl$D zgC2-G`~J!XuJ0@JnBS|Q*7+LO^~jx3^ixJnk=7jajD3~Q;hw93w6ag7n*NW|6Dhvwc0)k$QzI$}#3!{0bpao`2el!Ou|wX?00 zV_e40b*kjN%$C!=?~k{w=rO1uiMcS>^+7o4c#j*kGq5Y0O>(^t%xB*jq;-jo%lQ!* z$MP@2nfj|Sf0L{Taoh!DS)F5Nn9aNIJS)A!%^t4ZaFaP6%Kt!Ia;1jEAD_ywWKDiY z;okpUbVNAuy3WNkdXO*9z4{v1d6sY!|ogv?7Co?wJ8(dlvKSx+@QMZufun*1$|t+FLu zeHQ)}uAUbk&E(Oa4$;PM1kuNP2Ezf-h|6p-eRH7Q#y8_&J<`8r!cy^d!~~>azN?4% z?j5OEG(}FQ0uD8MnNh3FFQ09#EpL3WY^XmTwz%RNA(Z5;Ml2vk;Te!A;;E+j42h^I zn>WmwD6o)q2akvyf3<Cvx5Kn z$M{Jv>1)SC@9tn{kOxSIDPa*WFCzKuxAESqQT5!MU1f+(DcYTt2lM3HbYY;?K*uor zeMWGGrh6B=3fB?VWQV9o?aw+)kkkTc^Ud!vu?rPwLyE${jdwbqCB#D&KC$bHLYHz%w6wckQ)!yw z5DOu3sBGYBdE==@tlVeC+{9{&Z6=Qy#+vv5ienLA8EPgq;QmD|Z`v;Nj}=QKr|)bv z8eT}6$Eh%c8Cbtw+jO*?M*sU8^@z)uxbx(HapjULSA!>$C!c>|A~X z(!He&*Apj&08+q+^b5i=H`2xEi3%uKoobEI}*bNvb0HA zL1H>QOIQv20Rz%qQ7nWwB1eTK*IQ~~x|pytHW`1V6q;uG%45MFOhQ89e>_F@VJ9P@ z2L8~}!V7|ULYWiG`>ZT8X_jWh+*F=kQg@^pKG9)_HJeMzM?M{7Al(`?ms?JFUrR3G4Ff=VCdcf1qw$!NAL^TqUWyRQ z43$z1i@(bQG90Y-?wJmI`uF|C`kE)U`l{8c=KVmnSa(R`ZJCUImn+Q%Jh9sEoAq(H8mSQj6x2 zdjP2BDA{wTbMKC>_u-@VO;}iaAdOZoi`Za3Id*6aY4g|k%FthTcRC*mCDwDObW&@e zeW_}Q3yPIVX6vn|sjm?z!j2&=>3r<{g8W`AyjeM<0c@0Sx$<%uocvNlog#OBS0~x64J<8nAG%~Xu0NB zkv}}uuh~GPoy)patwne`WmUqSFg@8*icx1&zqt1am7Og+U69e@xvxVSO+R4M4tAom#F6B$ofk)n zLbiRVLbOq~9qpM;r7}pdGwL@)Gy(&HDB>o#omEZgQOi&LO-PEa~mC^65g(kon7fxf-E^T_yUq zTU}Jxn;(;TMw`Npi{;%#oXSMmYK{2r<11ST8`u)~+aDM8mky*GA#5HZ0R5@TjLdKf zgQs2DQV~B+bLM7d-JUcu;MCBEDNK^H}kV`b7B6U)B z-Q2fwJ9-3CTe&|+2SmZpxl5fSTycsV11}e7yyj|K-ml$g1u!@iop>|-hEIlszOvWu z*|H;Mt;hTCg7xrwCc+0_W2KD?@f6Irwry&!*~d>>ZA0t#Pvjv8wS ze`w{_?RjP@|EHb5D3M99kuBnL=%9+7(zWX8uEw7~N>c1#&vppd0=Ls_%|LtbHWmjd#{tPmFd8cePiYSAs| z`aLSey}Fpu9)I~Ud3LaLlQQgqOFRod0}o&3R&2}?8CUp{SQ3ww1S0O(sk*rm;pkz9 zWuAapC+Z+L+_jf`WA9|^viUV=`Xem4@Yk=avn0zJl@FFbFMraynoP!vgsR|6za7z@jKe))wBhR77`RpVkX*LEXmO!gQ0>b3O4>j>KY)PlW{JR@NlCJeaXA3;Af z*RR<^?qI3-F8?wqmu1ZkNfWy@SGuzg$_(ctmz=f2!jN*7>N05F=~y(P#C(}#J}O+D zs0##6{^^e%d^&ngN*x3O#bNGl&5n+aw_KwvE2A~4&#iYm+|9dXb9swP`Mc(Dn#(y84o*lmAC=1HSsGw#U!Egm>0!xCB;7ImR zmQ}BVJ={9eRMnNDcE;Uaw+SZkVpqDb2M-@Te)I3&Jb3cplP~T=0mgRU@&t1}&vZrx zdxjyy5+tM$2%YzD?v?Tmwc&w|66a2773wiDBriPd^meb!IA|vnOu=ZVgER-lW4`m< zEpvlkfpEd!xl=J}b$lOFhW*`~RC}YWzvD3Cl@OkUD^=4-d~)%15#cjP=?L?{8w_Ts zIMZE>@KPpI3~zbL0howsNj~DS`&hcDf*L;Y9t9ZN&xTygYT|x+#jp<4DNqHlJv=(L zt`p*Uai+RtQznioRf~)3pkOiF?q0wD&krAd3!FPm=`;$rTy#Jj$y;?2 zefuUp*QCUGzE4%rIO5`tirXC&r<4w_3IStW@oIp-GIYt+{)$C*WD=un}{y@D81~SLX=d86JY05cYh|Rh4A&?F)@ha6T z$!=`wir!Msn>{i^CIetuhKv-4&r34qs{rfCJ~+rYtZ>;cEuC(&uucyFi7~uzA6}c3 zV~n0gReC)lSw?HsAD@%ApFkEIQc=6hrT{utqI+SS;4h^O(#7$K!uL4rOxI#^)W|VR z6>9B@n-M60C%Q!3djyTf?@HZl{Jy3F{=+C=R-WbwN>-SRAn@vUwYR{l$+F%SS`u{A z9!%*TBM{9<%VpkuoqI2NR3=Ra2o^47b1W6oIIXS+-qKY85qca+Lltao?N@G0RrvO| zg+ZlE1Ror>c#P3LWR0KXN1&I(15hH4@i9fHXV+E#2NUYKZK85*)lxvJugo)@l4O8X z@f`JpnDyjqJOML3!xN!?S2&VaRN1XZ#d=`EMItT==v$ z@Qs%!m2x~>V zo=`#%hBg`^PEuA{RoAA{DTpSeduo|zsc$6$j_YcSSu?T%wUZv5s2r=9c5%y_OIwO_ zPv)Bp%!@B7JdiCXgk$i*4qRCC{nWAtTWRX1AsK99mK0Onz7&VIDedmu_)FbNeJZ@w zSS(k>uzlU_jm^-C)`nyQlHa&zv_Aigb}{c!3p7cWG6x(mF5M7nX;u z7*NHM5*lvTv|O$pM#s?;7QMLZMCyX#!H^)eO&IPCC9aUWNnAFo1V};!z1S&uF%VNP zk+SG$_&J2f?EjSCL48WPh5()lCB<~4lwI(^W`TtlGzN+hoAJrzr+Af@ABx+x(9WMf z63dh4k>|p^3gt!#1UEd!< z4k~p3?>xm76`gBzt#{X5XMIYdgQ2Hy0lkj2sd{u{^D$gjI`g;a_$}uhQMMdg_wX~z z6ZqA*KwQq>r5i;59VWX;ue`eqPVq3Bj!}xwZu6_a#FPXq#&p4_H%*}K3;@K{-Y((+Rtvoaka13rZx9o2hHPT>?8l_e?LT{CD38vRH^Cfn z)+(!DW{nQC3zNw-rZXtKM&%wlaMRiat*KbbQ4_U4PvTM9WmztIfISaWQHOYthP5x# zMskgM6^_$64`F_HR9d^Wv2pj-#^&fjddo|u8$Y@C<&*K%UtaAUe`@ZKok7-k?v`@B z1Mn*^(c@zVTVKuTa^!e_`tq7I%*MN(mlR!A@N`g$MZ-2=Ir)93yZ}pQSzi#ZDe)qc z(O2ODD$|Fo)S100{&7V~vg!<{ak$cz)nqp1J1);z=U?EWsn3jop%+Jg7Or=-YvF?r z_K)XS$K{L()fLR}f5e@*M_X+j_z0twO46HBGjw5{ML=s-0ySS-I?RPi=EW6MrB{sJ zBR4O$=P!z9MSt-NO#kJ(#=dpu@E&X&oK;QyMW$$q%eOd+Hi+JKxh2Q7oO-dF2$@83 z?}fvx@+2nVqaV(WuVYnAyyilC@JI2FFG5gJGeWr)RsscIJoV)pO1^;wb3$k04HOf+ zR$shdJfC0xW=gxy{`ubH&o_Bk9K!&pnsSOYn_OD2f4DWlc7>m8mRE@e`Ju!Ry%VCQ z?_2aWf{13Z=re8SFsM|W^rt^P*)oT0Tc+ehJhsFMy86?aE5Giu-R%A}UkYDJgS-6U(KWCv-P1X_UuT)^EPuAUGRTTWGAqbkT3FW3-giNtfPAg0^ZT^-nq+gZ_B+{Ik| z@Xfz}_Tb*rYw0}+HS7bvqtf{9_><2++j@MToEuvYA3peY>yvv=?r%N%;_D|{!~s0H z|1|Y2E3UOailL$nmHd!@_xS$rkdIK>`!=ICHcBgxz;C@0wHOy#Fqg84F=!)%O zj&r%ukPG@2OaKI%pUCu*-JIq$O_2F^@U)6;!SIK~^IxI#|F8di*Fg(vF*(08P9J{- zzPON{wbM8_pmK<(2;GuZ$~6$6sHy@sNeKIC>r*K$l|VdEH3wca@QOxJI)(}>ja@Uj zl#O7b*r&W~gKH zBubbQ>rL9;PQq2&XKlpsR`U&BKCSomGievg*4gy4{g2`2njigc*JVDMqRPZ|^t3oB z$FJP#k`HV5mVbJsu{7)Om}@`rsZiJ@s~N8yC}VS&5J%yx(S$`buXUSM4cnAubpr-8 zYkQW_pIX9G!e}^@<7^3!!xE@KX>sKZ-z*uS+(9W!ib0gzlS3cnx*&Xn_NB6Dfzm7S zk4IGtH@CHC=G`2Ix=UvXxrG*pgCVZ8jU!{-IU#5CAJw)XE+-F?T?U&r1Et<^j9{hA ziZ_r{8Er}kPTkwGz82Ed?KE1_)?TQX?iO&Bo7VNPHgDQl%3xD8NXR_A5~WGi&6O3>rSPXc8{li)0n#gtc}xBV$^e}W0fUJsQ>G8a4jQ(rl1-fmQoUyyRy`d13!74 zurO0HSmopg8sCLw0>ZscEH`8%v#FfokiB5#mEFk%Ouo2^w;Sb*QO*WOVF7J!ptwk& z*+|E)q=6jlop!RZ?mLl6p}U9g);53tA(3pq|8Q;N`-_Gl&ypR;;xLS|@!@2m|GsdL zTgwLdZf)cCojZ3nH*T+zK*IiY>%ujaoJ#4S`Wsw-^})LTXO+UWclP{0KYw7f66>$Z zXnU6)PG?sxP&zCVP%m+Vya0~gxIbY^9GlGNTQ4KyHefNF*1`ci6g$jDH29d<3DxE) zUQyk;!0}KiQnz-8DyP*Ah$)+Iea6 zSo>KaB!q&f=qm3m!FBCX_?m=W_jNR}s=+=6C)iht>W`cv#H>o~Sgdx_PNLyDm4jEq zo)HERb2VJl&d*(JV~D((7e7iSbylP2XjgxCn#lN*eTcB~#$4Poq;HxAvsA|$MSjqt z`=kusK%>QFWi-l>uI|yr`J2$1gF#&M3tAyh? znuX!uKTA^B%(%A40OPAz@j61>M(_8!D$bV>#@#*np>e{|JiRXlwYy+m0$0NM$>*u8lXybLC$LG0q+0Ba$3iK3d^9_m z$!$}k5i)^(D<wVgmO+55FzLEI-G$N0>u%mOUdFVv?nOZK95(7AE8}rKPglCfz6s_p0rJT)vW}TJ z_~=lk**#eLZGL*-kdd4(>WG(nz1^IXjq21ztX%um(EMvF*M@!u|2_Hr`wb-oNH-z_ zG4n9+=_tTyX!S#bJ82|Kv*9kivx#x@77Mjfv=T~Tj3MX-#Z3oxQ>kn5T}=M21Faj> zCA*Tx_8BK%m{IWeZuk^&09nepaD)wGA#H?rS-|Gc>we?sb@u`rZ?$+S{qhN>Aqq%N9hFcP%2H zUZqqTbvJL_gL^M=hq&o3jMJW8aSuLcZk4_0uj5_&FJ0Ah^BIZ*YV$Roz8F1*UbC;=Czbq;`z&FTY=nkpwCPe{D?P&LamFj+;WG-%%hsI2}Q1_EnN5% zKh&3-Sl`{lI>LF){&=}&cs5;XxU)mG?Bn(M>-lMM0Vs$pOe8e`N9t-5)T+R8o7lIxO;DDDQC`w4ArX`pUHPVrMwr0HcG7g6-|MlAfoxSajn91Gw0+&xNsm> z!NQS&bvTDt=dCKSku15!Q5i?#YE~(`apx;a!&115{7&Izt~Hb5LK>hN;5g0S|KZB+ zFaKf5w~`-%A^!Ylsie}dkvhVS_U;j#KATG3dWifuY4uN zwxZafNLbQ(j3YN`XG8VJF(onxwA7u}CzF(ACwCHB1Wuk4-Ur8|d*+c@ek1@u8l#W6 zD)UoZAER;;!+2iLqGgJtF9V&U)?0d}&w5>+61I{-TOQO-Igg=l#TIQk z{B$m}{qafWBn2V^I#HCf7PyNmwW4}>*UBJ!EUg9q13M(mB3N#w1YuN~!^fVaA~*S| zvEQjHEw_(7$&8pHC=MqdzQ?el1G_PHN<>+1LVus3RNMaVGm@oUyKtx)K8*P)5&7#s?|-SBiC# zdhRYJ@f^z>{Ht4c;z*X{y*bW@O`;000-XLZmG&60@Mydu7qXC}qZzA?{J<@`XVh5i zrs~$@-jo7X<^zp0xGC6Aae;{F_B9%*3^9vIVNMV}YpGIFUZmKTOk^PMsZ;gH)?^!v zxqyOLA@@)`TtMNxLX7B@*mYBjg$G$b9$-BC!823^Wv`q!FN|r!1|-TZdtXIfj^)M0 z%PFD6yvW(R2=eJ&j%No{^OpSQak@gOPCj^(LI(+3bnhOncvNTn;;VAXUD0cH^o}`E znrTqzpzkKGu(_W2!Tw9UQzkx^c&|x#36FA>Zpal9b>3t}Sr@OxJ~VzY%*e1yRs@dI z5gSL3I-Y2cbdFq&lCDU;IM*k>@DrATpbT%SecU{Y7#=K#HSw6J((vLL;Ot_}ZiFzY zeb0E5!lh|nY2A9KrAvsc0gicjPHGBM-;rd$`0A@i4Gt((8}8UEC?rrk)Wp~DJHQro zO*hupscc%(%(0f}0jA)pRUuyHa!$LrPjyVeGb=tX+N;qDMAkB}>yydtTeoi9LYzA^ zJA0|!L|Fap4}P%PsC&r@4>5&bAmQ98|6@Fa0=GS1L=Bt(9aJ#?B}oWsls{Qg8q+-8 z+mmH~uircOn2z;M%os%N~3GM+=%a=nGE|z-F3bwrP5are4WTi@iY|Pw7gr#DXXih>KC8T}5g;N;>eak3_I881Em_Iyw zZ$uN;Yt`i}H6|Hw;1A@tjd$gHuuU~`)Bp+55hymn{2=l1qgw1J|2oeeUMQss*FUn0 zg~D)!M-*t1D>#P$XTi$|>&)4>oCunR9nX*M8!Y1MIfJC@q%%iW1nkjd`b?Ox%qx^S zFY(Jt!(LMHwdyBg%ekPrvgN`=#p^L)pXpQm2T2EYH-Oq`qSsE0570j2^4zrwU`*Vi zd?Nc_L#p5dxi-N^BYv@@;Y)w;WnH;KAp$l2UhI8s{Hyj)r6pPNm&I8$G3ctYWF9;- zA3o~^6F7O6yXOuys9`jTa$GSzM7B_@|MbZ8 z`S{aEPwJ2J(RcOVqwm{4`-e7NI7S!%JdCO6qUR&Za`5J_0AMYGT`!x(wme4$ppHCr zQ4dUhQ8sQ5}sYrtHDuBe(VbETw(Xz|f_rHD+| zbR8x=M?UM?Xr#B+&2%08r`;!4Ghw&yktX$=U+T468T#Vh2uwmR58oTb004Z;s@>MM z=%yJnHE^kBU(Ij@c-B%Drmaq)n=LQUIE16! zH-9xsSDuPC8jZoAb`RJ(vP9f1&X@n#8qjPSK;F>>Q zr$ey$?N;*~h8kPX+L)QzD0(^;U+!GWx^WxjVF@pz$g?5xdAHsSRfmm{a?7d+PuHoP zE_O2D3nj8Kp(HeliE5Scj;LC{!uwmn7bqzCV0aX@Bfij)4!c@UqT9e7X4DnU!o4g0 z?%z)1F$`9IX@`4% zd3H@q=R$lt@e-vtGEXm{?)I(!B@PW|qslcGzp&E8#Et%=?J_mYW$L}^2cYx~Xl^89 zlI+@b3ZvwpPaYrF`@(-0*MT;>_i<(2D8z5i_||D|n9?2JM{N{tfT1#4iy>giY)hU? zQ`)R;<<~5EYx(MDh4RJcZe=a(EV;WX#G^ZCGx}Lb<1A-*v;i^X;+o~ZcK+wr=X~ax zEDEUv#W%sWtwr%qrb->Wf!3~wa>{Q(&zElc#t}M)h%vQ4HAwU!u%jf@{mr?t( z|Ihb>fMy!slJ_O12rMoZ;=vLCzHuF|8dVU5pp#Nh~u$mU*> zRq9VwftBq+rM)b7tN`j4J6g6y$-1dN5uYwTj4lj zQC%W-TNY$VW+erndy~Y+kSc%|v%Rie(2jc{z02+q(%X3Q;LA_H`1-T^zD6r7q>FoT ze7r6B{fsz5_{rDxeHN8H870xGRLQ=qD{RUvJjE<^9icG0eR>{S^zoM z&4Z%2gWg*c)48#%EPDIdFE>N@r^o$OPnMbyJd`AY@zBsl>-vm&d^H(HxvF3Ax(ZO7 zii0`Y-H&9xQokl93wg({%^IAonh8NVKox$GroBx9{1F&%lbu#wCEj%GzbW6ox+(aM+;h*ag zgEKEFrAWyX3m$`*b5@nRLpE~hD-6}Sbyzn;O+P>0-kDxU2cfhd2PF1k$#CSd6eUfW z2uK??G1g6))@jlNn;cWgMNE{;-13iiwo}dLmmI}MAeap_-c(YS+{Q%1{pV+I{$CP9 zzIya|+D+xeYmjMI@$Lp`34D8F404Y?^{a=n`Wbg3b4T4HNYJRIg`$?Nn`mL6CMD2M zI_2;end8#dcY&iso@YK4jdO$;m_q|wv}j!Bi0g-^liPh_4_r64XE?};U_qcyt$Yh3 zM)T-pEl+{7blRiaS_~?r^bH0eQ41pCXl?q4*(5EL*WtRNi z#@(CWr&|h>3_1hSBSL}QyNG9*BscpavV%>ZnvrBhRJIFmZwHgqsO|w#=osd;5}8mM z1Jh;{@U&NPmSd$)?X-;d5L-aiGo8b*wdj&|AW4~j@hs?+JshHN#}yvNeV>X1yk4C^ z`GAq^X(;{nWk(U;mz_vj*Tz&@3{6~C^`X7@_+gtULwx1&b@n$S<7%FS>+`7P#*1dn zw;?C7M_|mvCpK7U!5gENu1#!dJcs%CGhL+RM)JEfyQ)N)*5S$5pFH6uua3WXygK$O z(sWXuD{o{bv4q$vwlikgTf&2?w7uA^`q@~Xwna0&)HF3Tw5t_X3w$04zHO-PHfBd| zy7AfEjtbJL=*p&dy=vfCT~~aJuJL!PT>wl1Z^o@< zrlE32iqJPzTI(8YAgBdg%T)2H@D=O}9$bJ`;?!*^a1Vc{kz%^V@gz}nr)Cj&;=tW! zFzEul1e0@y6fGdhJsgjO1iLk)1IZM}c}HJ<^=R^?I5S;?DgaY(RjAGO?u;61X#w}K z`1MyeMAn}C%a>2@eYs%^G*$g$Aft1?NR#&lX;>n!OA znqy`tDEZk5WU5YkiKY;Ha$}Zj6<8E6tjwNLg^5J>o<$3twFrDyLMs{>nR}syJnQ;M zT)Hnd(kuZQTbcM1234+T!D+k8@k%O(#f4qdImbmWew3xzYL00vd)gYz(iR$KR1!Bf zh~0q&P3M1)DZv(liSRVlf9Lptv;I5hK#V#XYUgW2rKhX8^LeU3^1uMevN1dQJ z;#ZIlI_ABUA_Pbal|AndDqU|AUq=X2(U9oZZV2mJ_RBOsk|i5aV9Jc9wTPm6$uo2! zj8JRTm4?um@mI3(Q0KOKX)7E zhEghDy!j8gqjfI7zw16r+74(v%QBxodh+Sxv{JI4HkQ>tMxrky40+Wh@yZb^I6AMS zd)#$vAy%ika?8YwLHIlVY%MSNTvM8Oa!-)aEM9Mc(KmPhEEcqrucly3S}K6<)3e)RO7 zj^xqPPZZD<5?i`;^K|B3i7c1b@d-(4+Qp80LNX(Unh#Xd^* zKqrFSmh>`iB=$s8_B7lQeMNH$t|fq^JydP(;XW=y4=z`q&LndsIPT!;4q(E6RE+eP z-RM3#3d-h_B6hMAo+Dd$dJbY@E*Ru;ec^|E4a;*N3pUI3n~p%sZOYXqH;mG+o!w^? z)8wL}2mI#YSKlOLaQ+xgWeyBEJx?`*133f3y%iVTa{_8(J|w{zca=}pwHYP^>qUkj ztkaexT&R2+Dr*9Y4AN0Iy8&i?y@JlU4{A<58bH_Za+1Wkr=I;P4d+}qH_;K5+>H#E zd9yL-<#J-K0CRg}@XHO}FIZWrB~*}rU~u;gcS8$&Fo*lbrX>F?MHIue+MTFWfK-iG z3_Vn!2=*wn9h_w(omx^ zg~{U9tPw0Lt`TSRQDs#a_iW!5m+)f;*L41Xx0U4w{%p~Dc?A!19^Ez1S?xnV30Z z4_0;*;S${-lABV}=+HZe=IBhR@XP*?!cml(Hy@@uN=4$VZuVE$DmnHLhKV;1(30sw z`yim9Mugj-#5^oiiO?v#ix>FoO)-E*)wW1jj1~?j;MenrU7@uvX;3OLh>9^rsLcar zdm2{m&>X9Hh?Tz{!Hr5tB+G}X+(#WH`?xKrvs1+Il~9G@T~Ypd?dr&?zWEg_Si?DR zfxhV#X9U|=0-4z>Zd0Y=-lkKxkIL)1hq4Wg*Xxm~HHXHZoxHsMhlAt&>wlP^?7L!g z>9RPc5|f}%1z#f=zG&b~meSp(gDE@dE@SY=l<@bH&mVlbwXuG=W*b|NJ|$1^{1!wAjsAo05PN3 z%D1cIe-X#|uQkeHxZPzM{VULpBZlikj*n)q4~|ao?ld}P8e3s`;v@Hegm%}=bU(pw zh4K5~QP6B_Ha&sQ5^FL)T`TfWlaG=-nyqfFv5b|WBQ6A~2T^tu03rskl67uWy6^C- z5R{Wjt-GQ?+)9sLPEU?^wv3h@?#{ovvim*Q&dM1MeH-jB!3Y1KD)>eT&e6e5eY@I0 z7%&<_Uz ziwA-WWN*PxEK`kUH#Se0tp5A_)@8_%hSc_?3(CxKTBRIz(H*Z?DwDn{=$g*Ml7gk) z`1I_9O{iJ)x_rj@foTfY-acC@^u2v~th*d2!06dB#{W2Kt`2@3hG zZ)`y4YqbITKbm#&WK$;=h8vy15&|1WG+kb?iH#I((LoKx)@cUU37=n>*UHH*)+ib# zUOq9q){Jr{Y6RDRLfV(o)Re)#oZQ|xe1S2*%=PJ7%?<@GM1}!BQ{%$hhLKnl=4$?~ z=r?n#t?-#8hrz+KBL=Hc*UNYgy=>vZL`z{YVE9@HLMlM}e0KDVaIl32wq~z*dNru_ z)pMFv?j4K}|2A}k(-GPP*)WOjfe@WC$n$!oety6Hczk0+zav3B5A3GDc^M#?g63HGYO%vUQ{C^{4cbIb&2koD5N6RFW)U7A-T>&-DOEl?XL2 z{{-`aSiqrhxF%pU2SCq5u>}UDN5YZSx46#0aLFC2{=6?^6Q3bbJW!h@Gqn} zLz8Tuts$Py&4qIe<|&g6HO&H9mBxjh>x#qk!~h8a7`2HEo*WNPD9XH#YV$N;(G^CG zb3-bfp{vYaZ4!Nra61TrkB^}LzV1#Qp#-n9pP-aWD`?9)fsl*;BeJxI9}PX1cf=dq zxV?6=c_WUj4ZL|16t_uE=abD31S=;u)}xW<(N1Ru>sFbD0YGenzF4~4+0rk6U zGUx~2r#jHrrtU zFg->qy9@3UE!QlV%lBo_MDzzA;yxf46z#_MPun z|MWioI@_l^FaGTGLgg_2{Ju%5)4wcNyR{cl)o1OeO55cbC*t0mN1$$b?GA)J&77K; zW=xkkb78bej7_AWUfQ|eKj))NMC43_!R zd6161d-|RhTXLeoXLoctY2>gd2ztohYN6w!Oq!)=Zy?kVqKRyf`=Tpr22slL;>Xq< zqYY4HaU!ptBNdK@+99>{UL2 zz_&%TU5LiauHO6PfkeDBX?QesXa57;dYcnkCjNMT$C#u}=XBENLdOWeEgqjXJtiPL z1f}u(^?3aw^G?N?z0}HOg;EyIa2GX3O#%eR6CM+EmQ%Dfy7j`~LZ|?~k7R^RiEmH7lzq^~yxIl%u6=nw&Ht5u|)Y z<)bN)#MG5sMVLm>VcPMT+kV50qf#>(gr_QaTl>fI0FlDx5XsnBW6M8IOn8SL@50Bh zFkv;`(%a<9>Gmuf{yDjFPL58-@8f4S1g^kzB-`tfQ;`Wu34EZM2O^IsaJE(5Z?`D4 zfEeh9o<TwiBRv3l87L} z7?;T*2ll3dAz)hD1KW3%f{@l6tUkR#xrPohB(W?0vG15k#if2uz8elyxM5_l#VCAp z)i2tD2JaD&DCS3cg!aX5rtqhS_+2kHKyM;ck=|z9KJ-?X+*3`2VxUxqriB8tu=Ny! z#-b2)-YC8_6U7_@>De=8yy>_SE!>bFM6U&(s$aws3Z`4=T!_Qtx$(^&0Ap%ADu4+{ z6_+)B@Dvb{4BD&rlbGO$M_bM?0fbC zU}+hh=b|M8;%A=Um);M*{^H4X{_AVS(;k-UyJ=K}J>xP=<3(?mV62kZ_4`jA-N!6a zC56fpgd#(HZ(W~hg269JLuMKY@~dFbdod+)2EY9?lD%Bz6LXk%n8C>omP+249_0}! zQJU6)Urx43J|T|9=I|7tVqWUeiPE4p-&2&%jxi;lKl&P;NaY(Alyn`VlOU)$MC!y! ztrjqF79^*U4EwasO{dso^&aq)6RG3CAz zg?*0n|0ESsEV12$Io)>0s~}jC=R_(r1JxQ=77yAf%r8!7^XI$2Py*Vd=3rbfl!8KP zYeRf$J=;C7=B15HnV^+Z{JK3dq&>_cXjGS{waty2cW!=gvR16Ls7<9mCV4As@qnbmDxJ-zYBk z6x;O?tP$+U@7Al2<~gmJN&$^t9fk$5SZs98O*AG-vQcd%JwQ?1qf@bWc>3b(;29#j zMw6lqALv#!n0y|RZ%)i2~P!At%dNO8B2}A8Lnv`6O{(WID(E}D z6z)>LC8R@=orjOE%Xi3-`%vhF1}T&}bR0C3a&nr}1B@+&VU4q>^NuZmr^e-!?p|!72oLU zS%1m&NyMxIOk`0pdDbXA6b$GSnj!3K8%4OxDZV;pbs4(+-DQCx%rRs2-1dffBt6=Y z17ti^Z~>8j8EQJs`}RwL@+Obt)Yz+mB!%;zlcW$_I^+LYSU5fz;7Y#Y*knAxJI7%xds~K4>UqTB#e-VOa5?5M3&?eB zB+!~k0<8F;Fs>0p_VzvPF`}komXjS|*SxB>6!QHZSR%<%7GFYYY(ZDa*<0UCVI^VM za+mrUtsDbm+$s3Rl@XZsOBKxQOIcj=+>&ctxCKR7$UWZv1@{Pa2q zs)Si$DG+~c>Mp!9ikAj{t`K4*&tR}s7p@D!Awt`k;_MQ#e?2&qp+`_Q#FYZ-PNXDF z*p{obU}>O`PrySj=v2=6c>5R?ihP7o;uZGGq-JNmM$GeXVul%Jda|ctH|!Y!sEhiXEoZkG=Q3QtjN+Ja>s?pC2xYHW9Qk;aj9VY zP12qnk$S~s&u|!R+?w$H%n8W)4fH$iN`UMp{{y@@oe6>ozitfjX#Vo}PtX2h8v%)h zYG;|=B4o458Cyqas^h;t`s3QeDt*O0&FuN6ouW<%w^8FYdd*2VAQwdtr+6@Ut*~Et zNFAr=meEtJE{kg`#H=iC@%yEv=EbfT4c%1_7RgkpUSCePJ%1>yfO7wwlWu$Ix)Y%; zZA5xq#^ap->p!nwnTtlp;E-&^su;)w9uYE2#3)j^_%myc0PO-%WC)e+a=R%)PXqDS^5JP2e=u@JMDrD6NDLp%|(ZSP%*NE7=Bsq6s396bhw0 ziP(e0N%5u2_;iBSI?DOepQD^tGJ1PQVovIcD|Rj1q)AjlTq$jQNf&~^Ue(x@Db&NP zVhEMkttu2C7NQ1sxo}#F~AJ_066v@thc;1G@bF9H%I9 zX|x3uL^LeJFG%%+8g;CB94;I0sQ@@T9L6z($TSl2fn2a*_vs_$&|)9gp|7u3Lq!{*y!D4cmH7VM^Cp~#))%*?|OXycO)bWE@7}F$^izV80CUXQJlpyjTW&*%d?iQH(xQp5DHXu32pVRQl zFPnhMAvk z-N)Drm5ALJiW03@o|sV;1bGP_Y3s?q`X-?aOQUMm>9}n%l~N1xYM=A`r8LE9cEA5k z8k}Vx50-UgEWaFtJPCVw(9XBja~d40WZtC<`kJbTWSMuBA>a6dz|L$Rqxja`$c)5vhyzg?21TI0ONqu_TcPDbEQkdC`(Q z6VRj4ids|PhV9u7r3G9(?VyEwpFRGf0EzJg#WX?yAm`&ceRz)}#7q-GM1RClYAA(5 zR+qBm&c{-jTqUs#;&b;JJxPCHfhj0!vgSI~e;lPHOJ&6ykqy7|=qlHmBLf8ip?_q` zdZ#SJcTlTvy+#;I#6(rnVc#NgE&Zn{`mu(=VQIEFtx?`hNi1j@wTm zJ|rXTC^=PXyOPFRhYARR!jdin)COvnBU?!5DLImN+&{7S4*qB7qNY;hIAFLDMp%_6 z(oQymaO|)?zPg68;D~)lRb^2S{@^iKb-8HsKr(_!O9uPqZ||jt0#56ktwS;Zn%dKx zX6Xe8Y3ciO6V`|CF!cxCN9oVIW2>vfud9~K#YWe6NsVsR$lgRH*?}I-LZi-0KsbTq z;w%R4@dr2uGEHEq&#i!l&}haAY|m8lE#wsBuF6Wdhdw_GJIfkT)Vm+k(LS|1lMNy1 z=Oz*)N~0#=kM7G0d*SEzMu%9Bu?L9>h>9_j6YmAJX8xX1d2)k}lF<;yH(&Y_*sEFqL&+oNUj}x(VPT-;f4a4~Wo{KKXpI}t#sbO%Z#=!;&?Vc|AZ{G35i9XWeSh|1 zU;p#M|9WA6jRcQTD<_SJ+3THb(LOOmft=(Sf#QDemm$$XD_#3!($TfMx_CQ*7Jj}=Nu#Q6<+z|%=vY2 zO|-zcVF)S~)%~-ssMk!_b;*`>1*N?fT+-3IA6uEZKh;Jov6Hk;Yu$`5wTtrAsf|8P;qB@wJX?zqUi4jK5K7v7gqw zP=q|dzFm2Icukl2{&z2C-`oEm?SH@W=~rJqd3uega9?z1^pz7voS!{IHFqliROhtH z*#=D&+ZjcRVp);?KO0>pPws#E^ubqO+R23$R9>RW@WcAzAn;aKz`3BAuO*s22A0aS zU<&wM^sZhqpnSeNZg&vNtG~nqYu|Ou-t~NqsK)Xu}Hkw2@LKOZN&(ULH`P@22W zo3oi8$$^IIXW%5w=URomj|!`dDme2Swj%E|#d)BV67LK)9mO0r`kBJxWnC(JYO0VU z6^1c9T2YpUccKEGj(Bo@tJ;k4x9s05(W|!l+7K;SJM_;8far|E%0eT{G}%JbZ3yC# z{So^|Tx#~C=^=?aw{UUB9`!@fSanoGMdC-Q@&Xunop_Tv%A5Kcifyi~Asq)u#51La zP*!IpWT*LrHo3CMZmn5hkShdUm ztqb$Vt&1+W#1HN{BV=hNEsANI`2kJql&A~z-UX$*W=Lx6V@s1asxZBFAdc{3xb+`5 zhkxB3{Q1W4uLpxa-yHt+bnxd}!@n+ROj_c!7l{7HP|k&)P7XE(e(P-5x}F?t-dZ1M z+1YJrd3&JU?e(GFx5-V`U*yTb?aiTI?+moOGuUu&syplJlxDCr@F1+UgR<5;gDc?I z!I3xCcZSF4+(8UIyp7HE!Nxa-f4()m5PsfUyx)_9JG(>c+a28bZU-b|(YptOjR)JF z4mbW_U=1G(p7VzTEk7JQwhwO(UC4(+E7*T|aPVs3jIlBt9TLU3u#x&k;v?|8f0G=A(nLjSRL{%JfB_lecpus<3aWI3a`3mUVKD=M5@I-j)z zjW|ErJ7s<$>-NKsd&lhxz~s3K9c(wg*G;e~5~IvmipN>>kr0;#VG94@x&d%AH4g}T zCF`sBI09I=`S<+vwXnZbwqm7=%~_m0wgH*d#=)1u<;N<2_Ef^6O{_z~i^rlUW9fS=v}59dw_XrRC+InfEuO%X={ zOVn{+#|uWwB+ZOrL>Ss%l5@#CC7_bXb|joS{aC+2DswA{XV6k>b$I0Dv_PCo0*JrR zT=c~=E?tz_#DFVve&pzo=9EYP!7cs%|-O>bfk- zhDZnWJib#t$W04P%5{`*4AI` zmH(__p^blkA43jwAy>uvt2?FTg$)-*su0J64LdK1N3_)zre!I8)gOLRHy?aiWdXA@GCW6cmk2wOZo|UaW{UpJcja8c=vof#P>w{Y7VJrz<-?WzjVjeNTkuVS3!&{YNKz*+Brh$I2nO#aLmBV zQi`m*RRjljM9d*jvLn%UBr*}6I)bi(1m2e&)qnRkk z6bYsoT~430uyD?j|KqhV9oUkeNt@=#Dt&sFab`!`=A(od2x==Xm@B`y)^Q>(XuE*d zH(z}A@Uu^}j&Ghkc{P5Lq8aSY6N7Df|+L0WyXb!2L7|_rA@C5r&=rNO}gu z(oy&TH3JnOqKrJGt?By-+W8zdBuqN)e71&bDy%jxVt+2pMH*S pdncmSQEDfAy+#0xyk&q_v8NR3oIF?lq}MF;EWOk&kz;=u{ePCIOV$7Y literal 0 HcmV?d00001 diff --git a/gas/po/fr.po b/gas/po/fr.po index 78872e7..847b320 100644 --- a/gas/po/fr.po +++ b/gas/po/fr.po @@ -1,78 +1,81 @@ -# Messages français pour GNU concernant gas. -# Copyright © 2004 Free Software Foundation, Inc. +# French translation of GNU gas. +# Copyright (C) 2011 Free Software Foundation, Inc. +# This file is distributed under the same license as the binutils package. # Michel Robitaille , traducteur depuis/since 1996. -# +# Frédéric Marchal , 2011. msgid "" msgstr "" -"Project-Id-Version: GNU gas 2.14rel030712\n" -"POT-Creation-Date: 2007-10-08 12:03+0100\n" -"PO-Revision-Date: 2004-05-10 08:00-0500\n" -"Last-Translator: Michel Robitaille \n" +"Project-Id-Version: gas-2.20.90\n" +"Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" +"POT-Creation-Date: 2010-11-05 11:33+0100\n" +"PO-Revision-Date: 2011-05-14 14:30+0200\n" +"Last-Translator: Frédéric Marchal \n" "Language-Team: French \n" +"Language: fr\n" "MIME-Version: 1.0\n" -"Content-Type: text/plain; charset=ISO-8859-1\n" -"Content-Transfer-Encoding: 8-bit\n" -"Plural-Forms: nplurals=2; plural=(n > 1);\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"Plural-Forms: nplurals=2; plural=(n > 1);\n" +"X-Generator: Lokalize 1.0\n" -#: app.c:473 app.c:487 +#: app.c:488 app.c:502 msgid "end of file in comment" msgstr "fin du fichier dans le commentaire" -#: app.c:565 app.c:612 -#, fuzzy, c-format +#: app.c:580 app.c:627 +#, c-format msgid "end of file in string; '%c' inserted" -msgstr "fin du fichier dans la chaîne; « \" » inséré" +msgstr "fin du fichier dans la chaîne; « %c » inséré" -#: app.c:638 +#: app.c:653 #, c-format msgid "unknown escape '\\%c' in string; ignored" -msgstr "échappement inconnu « \\%c » dans la chaîne; ignoré" +msgstr "échappement inconnu « \\%c » dans la chaîne; ignoré" -#: app.c:801 +#: app.c:826 msgid "end of file not at end of a line; newline inserted" -msgstr "fin du fichier n'est pas à la fin de la ligne; nouvelle ligne insérée" +msgstr "fin du fichier n'est pas à la fin de la ligne; nouvelle ligne insérée" -#: app.c:957 +#: app.c:989 msgid "end of file in multiline comment" msgstr "fin de fichier dans un commentaire multilignes" -#: app.c:1022 +#: app.c:1064 msgid "end of file after a one-character quote; \\0 inserted" -msgstr "" -"fin du fichier après la présence d'un seul caractère apostrophe; \\0 inséré" +msgstr "fin du fichier après la présence d'un seul caractère apostrophe; \\0 inséré" -#: app.c:1030 +#: app.c:1072 msgid "end of file in escape character" -msgstr "fin de fichier dans le caractère d'échappement" +msgstr "fin de fichier dans le caractère d'échappement" -#: app.c:1042 +#: app.c:1084 msgid "missing close quote; (assumed)" -msgstr "apostrophe de fermeture manquant; (assumé)" +msgstr "apostrophe de fermeture manquant; (assumé)" -#: app.c:1110 app.c:1164 app.c:1175 app.c:1249 +#: app.c:1153 app.c:1208 app.c:1219 app.c:1293 msgid "end of file in comment; newline inserted" -msgstr "fin de fichier dans le commentaire; nouvelle ligne insérée" +msgstr "fin de fichier dans le commentaire; nouvelle ligne insérée" -#: as.c:158 +#: as.c:161 msgid "missing emulation mode name" -msgstr "nom du mode d'émulation manquant" +msgstr "nom du mode d'émulation manquant" -#: as.c:173 +#: as.c:176 #, c-format msgid "unrecognized emulation name `%s'" -msgstr "nom de l'émulation non reconnu « %s »" +msgstr "nom de l'émulation non reconnu « %s »" -#: as.c:220 -#, fuzzy, c-format +#: as.c:223 +#, c-format msgid "GNU assembler version %s (%s) using BFD version %s\n" -msgstr "Version de l'assembleur GNU %s (%s) utilisant la version BFD %s" +msgstr "Version de l'assembleur GNU %s (%s) utilisant la version BFD %s\n" -#: as.c:227 +#: as.c:230 #, c-format msgid "Usage: %s [option...] [asmfile...]\n" msgstr "Usage: %s [option...] [fichier-assembleur...]\n" -#: as.c:229 +#: as.c:232 #, c-format msgid "" "Options:\n" @@ -80,6 +83,7 @@ msgid "" " \t Sub-options [default hls]:\n" " \t c omit false conditionals\n" " \t d omit debugging directives\n" +" \t g include general info\n" " \t h include high-level source\n" " \t l include assembly\n" " \t m include macro expansions\n" @@ -89,486 +93,474 @@ msgid "" msgstr "" "Options:\n" " -a[sous-option...]\t activer l'affichage\n" -" \t Sous-options [par défaut hls]:\n" -" \t c omettre les faux conditionels\n" -" \t d omettre les directives de débug\n" +" \t Sous-options [par défaut hls]:\n" +" \t c omettre les faux conditionnels\n" +" \t d omettre les directives de débug\n" +" \t g inclure les informations générales\n" " \t h inclure les sources de haut niveau\n" " \t l inclure l'assembleur\n" " \t m inclure l'expansion de macros\n" -" \t n omettre le tratiement des formulaires " -"(forms)\n" +" \t n omettre le traitement des formulaires (forms)\n" " \t s inclure les symboles\n" -" \t =FICHIER les lister au FICHIER (doit être la " -"dernière sous-option)\n" +" \t =FICHIER les lister dans le FICHIER (doit être la dernière sous-option)\n" -#: as.c:242 +#: as.c:246 #, c-format msgid " --alternate initially turn on alternate macro syntax\n" +msgstr " --alternate active dès le départ la syntaxe alternée des macros\n" + +#: as.c:249 +#, c-format +msgid "" +" --compress-debug-sections\n" +" compress DWARF debug sections using zlib\n" +msgstr "" +" --compress-debug-sections\n" +" compresser les sections DWARF de débug avec zlib\n" + +#: as.c:252 +#, c-format +msgid "" +" --nocompress-debug-sections\n" +" don't compress DWARF debug sections\n" msgstr "" +" --nocompress-debug-sections\n" +" ne pas compresser les sections de débug DWARF\n" -#: as.c:244 +#: as.c:256 #, c-format msgid " -D produce assembler debugging messages\n" -msgstr " -D produire les messages de débug assembleur\n" +msgstr " -D produire les messages de débug assembleur\n" -#: as.c:246 +#: as.c:258 #, c-format -msgid " --debug-prefix-map OLD=NEW Map OLD to NEW in debug information\n" +msgid "" +" --debug-prefix-map OLD=NEW\n" +" map OLD to NEW in debug information\n" msgstr "" +" --debug-prefix-map ANCIEN=NOUVEAU\n" +" remplace ANCIEN par NOUVEAU dans les informations de débug\n" -#: as.c:248 +#: as.c:261 #, c-format msgid " --defsym SYM=VAL define symbol SYM to given value\n" -msgstr " --defsym SYMBOLE=VALEUR définir le SYMBOLE avec une valeur\n" +msgstr " --defsym SYMBOLE=VALEUR définir le SYMBOLE avec cette valeur\n" -#: as.c:264 +#: as.c:277 #, c-format msgid " emulate output (default %s)\n" -msgstr " émuler la sortie (par défaut %s)\n" +msgstr " émuler la sortie (par défaut %s)\n" -#: as.c:269 +#: as.c:282 #, c-format msgid " --execstack require executable stack for this object\n" -msgstr "" -" --execstack requiert une pile exécutable pour cet objet\n" +msgstr " --execstack requiert une pile exécutable pour cet objet\n" -#: as.c:271 +#: as.c:284 #, c-format -msgid "" -" --noexecstack don't require executable stack for this object\n" -msgstr "" -" --noexecstack ne requiert pas de pile exécutable pour cet objet\n" +msgid " --noexecstack don't require executable stack for this object\n" +msgstr " --noexecstack ne requiert pas de pile exécutable pour cet objet\n" -#: as.c:274 +#: as.c:287 #, c-format msgid " -f skip whitespace and comment preprocessing\n" -msgstr "" -" -f escamoter le pré-traitement des espaces blancs et " -"des commentaires\n" +msgstr " -f escamoter le prétraitement des espaces et des commentaires\n" -#: as.c:276 -#, fuzzy, c-format +#: as.c:289 +#, c-format msgid " -g --gen-debug generate debugging information\n" -msgstr "" -" --gstabs générer les talons d'information pour le débug\n" +msgstr " -g --gen-debug générer les informations de débug\n" -#: as.c:278 -#, fuzzy, c-format +#: as.c:291 +#, c-format msgid " --gstabs generate STABS debugging information\n" -msgstr "" -" --gstabs générer les talons d'information pour le débug\n" +msgstr " --gstabs générer les informations STABS de débug\n" -#: as.c:280 -#, fuzzy, c-format -msgid "" -" --gstabs+ generate STABS debug info with GNU extensions\n" -msgstr "" -" --gstabs générer les talons d'information pour le débug\n" +#: as.c:293 +#, c-format +msgid " --gstabs+ generate STABS debug info with GNU extensions\n" +msgstr " --gstabs+ générer les infos STABS de débug avec les extensions GNU\n" -#: as.c:282 -#, fuzzy, c-format +#: as.c:295 +#, c-format msgid " --gdwarf-2 generate DWARF2 debugging information\n" -msgstr " --gdwarf2 généréer les informations de débug DWARF2\n" +msgstr " --gdwarf-2 générer les informations de débug DWARF2\n" -#: as.c:284 +#: as.c:297 #, c-format msgid " --hash-size= set the hash table size close to \n" -msgstr "" +msgstr " --hash-size= fixer la taille de la table de hash proche de \n" -#: as.c:286 +#: as.c:299 #, c-format msgid " --help show this message and exit\n" -msgstr " --help afficher l'aide-mémoire et quitter\n" +msgstr " --help afficher l'aide-mémoire et quitter\n" -#: as.c:288 +#: as.c:301 #, c-format msgid " --target-help show target specific options\n" -msgstr "" -" --target-help montrer les options spécifiques de la cible\n" +msgstr " --target-help montrer les options spécifiques de la cible\n" -#: as.c:290 +#: as.c:303 #, c-format -msgid "" -" -I DIR add DIR to search list for .include directives\n" +msgid " -I DIR add DIR to search list for .include directives\n" msgstr "" -" -I RÉPERTOIRE ajouter le RÉPERTOIRE à la liste de recherche\n" -"pour les directive .include\n" +" -I RÉPERTOIRE ajouter le RÉPERTOIRE à la liste de recherche\n" +"des directives .include\n" -#: as.c:292 +#: as.c:305 #, c-format msgid " -J don't warn about signed overflow\n" -msgstr " -J ne pas avertir lors d'un débordement signé\n" +msgstr " -J ne pas avertir lors d'un débordement signé\n" -#: as.c:294 +#: as.c:307 #, c-format -msgid "" -" -K warn when differences altered for long " -"displacements\n" -msgstr "" -" -K avertir lorsque des différences sont altérées lors " -"de longs déplacements\n" +msgid " -K warn when differences altered for long displacements\n" +msgstr " -K avertir lorsque des différences sont altérées lors de longs déplacements\n" -#: as.c:296 +#: as.c:309 #, c-format msgid " -L,--keep-locals keep local symbols (e.g. starting with `L')\n" -msgstr "" -" -L,--keep-locals conserver les symboles locaux (i.e. débutant par « " -"L »)\n" +msgstr " -L,--keep-locals conserver les symboles locaux (i.e. débutant par « L »)\n" -#: as.c:298 +#: as.c:311 #, c-format msgid " -M,--mri assemble in MRI compatibility mode\n" -msgstr " -M,--mri assembler en mode compatibilité MRI\n" +msgstr " -M,--mri assembler en mode compatibilité MRI\n" -#: as.c:300 +#: as.c:313 #, c-format -msgid "" -" --MD FILE write dependency information in FILE (default " -"none)\n" +msgid " --MD FILE write dependency information in FILE (default none)\n" msgstr "" -" --MD FICHIER écrire les information de dépendance dans le\n" -" FICHIER (par défaut aucun)\n" +" --MD FICHIER écrire les information de dépendance dans le\n" +" FICHIER (par défaut aucun)\n" -#: as.c:302 +#: as.c:315 #, c-format msgid " -nocpp ignored\n" -msgstr " -nocpp ignorée\n" +msgstr " -nocpp ignorée\n" -#: as.c:304 +#: as.c:317 #, c-format -msgid "" -" -o OBJFILE name the object-file output OBJFILE (default " -"a.out)\n" +msgid " -o OBJFILE name the object-file output OBJFILE (default a.out)\n" msgstr "" -" -o NOM donner le NOM au fichier d'objets de sortie\n" -" (par défaut a.out)\n" +" -o NOM nommer le fichier d'objets de sortie NOM\n" +" (par défaut a.out)\n" -#: as.c:306 +#: as.c:319 #, c-format msgid " -R fold data section into text section\n" -msgstr "" -" -R joindre la section de données avec la section " -"texte\n" +msgstr " -R joindre la section de données avec la section texte\n" -#: as.c:308 +#: as.c:321 #, c-format msgid "" " --reduce-memory-overheads \n" " prefer smaller memory use at the cost of longer\n" " assembly times\n" msgstr "" +" --reduce-memory-overheads \n" +" favoriser l'utilisation réduite de la mémoire au\n" +" détriment d'un temps d'assemblage accru\n" -#: as.c:312 +#: as.c:325 #, c-format -msgid "" -" --statistics print various measured statistics from execution\n" -msgstr "" -" --statistics afficher diverses mesures de statistiques de " -"l'exécution\n" +msgid " --statistics print various measured statistics from execution\n" +msgstr " --statistics afficher diverses mesures de statistiques de l'exécution\n" -#: as.c:314 +#: as.c:327 #, c-format msgid " --strip-local-absolute strip local absolute symbols\n" -msgstr " --strip-local-absolute éliminer les symboles absolus locaux\n" +msgstr " --strip-local-absolute éliminer les symboles absolus locaux\n" -#: as.c:316 +#: as.c:329 #, c-format -msgid "" -" --traditional-format Use same format as native assembler when possible\n" -msgstr "" -" --traditional-format utiliser le même format que l'assembleur natif " -"lorsque c'est possible\n" +msgid " --traditional-format Use same format as native assembler when possible\n" +msgstr " --traditional-format utiliser le même format que l'assembleur natif lorsque c'est possible\n" -#: as.c:318 +#: as.c:331 #, c-format msgid " --version print assembler version number and exit\n" -msgstr "" -" --version afficher le numéro de la version de l'assembleur " -"et quitter\n" +msgstr " --version afficher le numéro de la version de l'assembleur et quitter\n" -#: as.c:320 +#: as.c:333 #, c-format msgid " -W --no-warn suppress warnings\n" msgstr " -W --no-warn supprimer les avertissements\n" -#: as.c:322 +#: as.c:335 #, c-format msgid " --warn don't suppress warnings\n" msgstr " --warn ne pas supprimer les avertissements\n" -#: as.c:324 +#: as.c:337 #, c-format msgid " --fatal-warnings treat warnings as errors\n" -msgstr "" -" --fatal-warnings traiter les averitssements comme des erreurs\n" +msgstr " --fatal-warnings traiter les avertissements comme des erreurs\n" -#: as.c:327 +#: as.c:340 #, c-format msgid "" " --itbl INSTTBL extend instruction set to include instructions\n" -" matching the specifications defined in file " -"INSTTBL\n" +" matching the specifications defined in file INSTTBL\n" msgstr "" -" --itbl INSTTBL étendre le jeu d'instructions pour inclure les\n" -" instructions concordants avec les spécifications\n" -" définies dans le fichier INSTTBL\n" +" --itbl INSTTBL étendre le jeu d'instructions pour inclure les\n" +" instructions concordants avec les spécifications\n" +" définies dans le fichier INSTTBL\n" -#: as.c:331 +#: as.c:344 #, c-format msgid " -w ignored\n" -msgstr " -w ignorée\n" +msgstr " -w ignorée\n" -#: as.c:333 +#: as.c:346 #, c-format msgid " -X ignored\n" -msgstr " -X ignorée\n" +msgstr " -X ignorée\n" -#: as.c:335 +#: as.c:348 #, c-format msgid " -Z generate object file even after errors\n" -msgstr "" -" -Z générer le fichier objet même après des erreurs\n" +msgstr " -Z générer le fichier objet même après des erreurs\n" -#: as.c:337 +#: as.c:350 #, c-format msgid "" -" --listing-lhs-width set the width in words of the output data column " -"of\n" +" --listing-lhs-width set the width in words of the output data column of\n" " the listing\n" msgstr "" -" --listing-lhs-width initialiser la largeur en mots de la colonne de " -"données\n" +" --listing-lhs-width initialiser la largeur en mots de la colonne de données\n" " en sortie sur le listing\n" -#: as.c:340 +#: as.c:353 #, c-format msgid "" " --listing-lhs-width2 set the width in words of the continuation lines\n" -" of the output data column; ignored if smaller " -"than\n" +" of the output data column; ignored if smaller than\n" " the width of the first line\n" msgstr "" -" --listing-lhs-width2 initialiser la largeur en mots des lignes de " -"continuation\n" -" de la colonne de données en sortie; ignoré si plus " -"petit que\n" -" la largeur de la première ligne\n" +" --listing-lhs-width2 initialiser la largeur en mots des lignes de continuation\n" +" de la colonne de données en sortie; ignoré si plus petit que\n" +" la largeur de la première ligne\n" -#: as.c:344 +#: as.c:357 #, c-format msgid "" " --listing-rhs-width set the max width in characters of the lines from\n" " the source file\n" msgstr "" -" --listing-rhs-width initialiser la largeur maximale en caractères des " -"lignes\n" +" --listing-rhs-width initialiser la largeur maximale en caractères des lignes\n" " du fichier source\n" -#: as.c:347 +#: as.c:360 #, c-format msgid "" " --listing-cont-lines set the maximum number of continuation lines used\n" " for the output data column of the listing\n" msgstr "" -" --listing-cont-lines initialiser le nombre maximal de lignes de " -"continuation à utiliser\n" -" pour la colonne de donnée en sortie dans le " -"listing\n" +" --listing-cont-lines initialiser le nombre maximal de lignes de continuation à utiliser\n" +" pour la colonne de donnée en sortie dans le listing\n" -#: as.c:350 -#, fuzzy, c-format +#: as.c:363 +#, c-format msgid " @FILE read options from FILE\n" -msgstr " -w ignorée\n" +msgstr " @FICHIER lire les options dans le FICHIER\n" -#: as.c:358 +#: as.c:371 #, c-format msgid "Report bugs to %s\n" -msgstr "Rapporter toutes anomalies à %s\n" +msgstr "Rapporter toutes anomalies à %s\n" -#: as.c:563 -#, fuzzy, c-format +#: as.c:581 +#, c-format msgid "unrecognized option -%c%s" -msgstr "option non reconnue « -%c%s »" +msgstr "option non reconnue -%c%s" #. This output is intended to follow the GNU standards document. -#: as.c:601 +#: as.c:619 #, c-format msgid "GNU assembler %s\n" msgstr "Assembleur GNU %s\n" -#: as.c:602 -#, fuzzy, c-format -msgid "Copyright 2007 Free Software Foundation, Inc.\n" -msgstr "Copyright 2002 Free Software Foundation, Inc.\n" +#: as.c:620 +#, c-format +msgid "Copyright 2010 Free Software Foundation, Inc.\n" +msgstr "Copyright 2010 Free Software Foundation, Inc.\n" -#: as.c:603 -#, fuzzy, c-format +#: as.c:621 +#, c-format msgid "" "This program is free software; you may redistribute it under the terms of\n" "the GNU General Public License version 3 or later.\n" "This program has absolutely no warranty.\n" msgstr "" "Ce logiciel est libre; vous pouvez le redistribuer selon les termes de la\n" -"licence GNU General Public License. AUCUNE garantie n'est donnée.\n" +"version 3 de la licence GNU General Public License ou suivante.\n" +"Ce programme n'est couvert par AUCUNE garantie.\n" -#: as.c:607 +#: as.c:625 #, c-format msgid "This assembler was configured for a target of `%s'.\n" -msgstr "Cet assembleur a été configuré pour la cible « %s ».\n" +msgstr "Cet assembleur a été configuré pour la cible « %s ».\n" -#: as.c:614 +#: as.c:632 msgid "multiple emulation names specified" -msgstr "multiples noms d'émulation spécifiés" +msgstr "multiples noms d'émulation spécifiés" -#: as.c:616 +#: as.c:634 msgid "emulations not handled in this configuration" -msgstr "émulations non traités dans cette configuration" +msgstr "émulations non traités dans cette configuration" -#: as.c:621 +#: as.c:639 #, c-format msgid "alias = %s\n" msgstr "alias = %s\n" -#: as.c:622 +#: as.c:640 #, c-format msgid "canonical = %s\n" msgstr "canonique = %s\n" -#: as.c:623 +#: as.c:641 #, c-format msgid "cpu-type = %s\n" msgstr "type de CPU = %s\n" -#: as.c:625 +#: as.c:643 #, c-format msgid "format = %s\n" msgstr "format = %s\n" -#: as.c:628 +#: as.c:646 #, c-format msgid "bfd-target = %s\n" msgstr "cible-bfd = %s\n" -#: as.c:645 +#: as.c:654 +msgid "cannot compress debug sections (zlib not installed)" +msgstr "impossible de compresser les sections de débug (zlib pas installé)" + +#: as.c:675 msgid "bad defsym; format is --defsym name=value" -msgstr "defsym erroné; format est --defsym nom=valeur" +msgstr "defsym erroné; format est --defsym nom=valeur" -#: as.c:665 +#: as.c:695 msgid "no file name following -t option" -msgstr "aucun nom de fichier après l'option -t" +msgstr "aucun nom de fichier après l'option -t" -#: as.c:680 +#: as.c:710 #, c-format msgid "failed to read instruction table %s\n" -msgstr "échec de lecture de la table d'instructions %s\n" +msgstr "échec de lecture de la table d'instructions %s\n" -#: as.c:848 +#: as.c:881 #, c-format msgid "invalid listing option `%c'" -msgstr "Option de listage invalide « %c »" +msgstr "option de listage invalide « %c »" -#: as.c:901 +#: as.c:934 msgid "--hash-size needs a numeric argument" -msgstr "" +msgstr "--hash-size requiert un argument numérique" -#: as.c:926 +#: as.c:959 #, c-format msgid "%s: total time in assembly: %ld.%06ld\n" msgstr "%s: temps total d'assemblage: %ld.%06ld\n" -#: as.c:929 +#: as.c:962 #, c-format msgid "%s: data size %ld\n" -msgstr "%s: taille des données %ld\n" +msgstr "%s: taille des données %ld\n" -#: as.c:1239 +#: as.c:1272 #, c-format msgid "%d warnings, treating warnings as errors" -msgstr "%d AVERTISSEMENTS, traitement des avertissements comme des erreurs" +msgstr "%d avertissements, traitement des avertissements comme des erreurs" -#: as.h:237 +#: as.h:184 #, c-format msgid "Case value %ld unexpected at line %d of file \"%s\"\n" -msgstr "Casse inattendue valeur %ld à la ligne %d du fichier « %s »\n" +msgstr "Casse valeur %ld inattendue à la ligne %d du fichier « %s »\n" #. #. * We have a GROSS internal error. #. * This should never happen. #. -#: atof-generic.c:417 config/tc-m68k.c:3391 +#: atof-generic.c:417 config/tc-m68k.c:3579 msgid "failed sanity check" -msgstr "la vérification de l'état de santé a échoué" - -#: cgen.c:113 config/tc-alpha.c:1926 config/tc-alpha.c:1950 -#: config/tc-d10v.c:584 config/tc-d30v.c:572 config/tc-mn10200.c:1132 -#: config/tc-mn10300.c:1892 config/tc-ppc.c:2424 config/tc-ppc.c:2641 -#: config/tc-ppc.c:2653 config/tc-s390.c:1231 config/tc-s390.c:1331 -#: config/tc-s390.c:1460 config/tc-v850.c:1762 config/tc-v850.c:1785 -#: config/tc-v850.c:1988 +msgstr "la vérification de l'état de santé a échoué" + +#: cgen.c:113 config/tc-alpha.c:2104 config/tc-alpha.c:2128 +#: config/tc-arc.c:1684 config/tc-d10v.c:552 config/tc-d30v.c:538 +#: config/tc-mn10200.c:1100 config/tc-mn10300.c:1751 config/tc-ppc.c:2586 +#: config/tc-ppc.c:2737 config/tc-ppc.c:2879 config/tc-ppc.c:2890 +#: config/tc-s390.c:1223 config/tc-s390.c:1323 config/tc-s390.c:1452 +#: config/tc-v850.c:2229 config/tc-v850.c:2300 config/tc-v850.c:2346 +#: config/tc-v850.c:2383 config/tc-v850.c:2420 config/tc-v850.c:2649 msgid "too many fixups" msgstr "trop de correctifs" -#: cgen.c:400 cgen.c:420 config/tc-d10v.c:495 config/tc-d30v.c:487 -#: config/tc-mn10200.c:1074 config/tc-mn10300.c:1816 config/tc-ppc.c:2456 -#: config/tc-s390.c:1219 config/tc-v850.c:1964 config/tc-z80.c:422 +#: cgen.c:400 cgen.c:420 config/tc-arc.c:1665 config/tc-d10v.c:463 +#: config/tc-d30v.c:454 config/tc-i370.c:2125 config/tc-mn10200.c:1042 +#: config/tc-mn10300.c:1676 config/tc-ppc.c:2625 config/tc-s390.c:1194 +#: config/tc-v850.c:2337 config/tc-v850.c:2371 config/tc-v850.c:2411 +#: config/tc-v850.c:2622 config/tc-z80.c:417 msgid "illegal operand" -msgstr "opérande illégale" - -#: cgen.c:424 config/tc-avr.c:546 config/tc-d10v.c:497 config/tc-d30v.c:489 -#: config/tc-h8300.c:449 config/tc-mcore.c:662 config/tc-mmix.c:488 -#: config/tc-mn10200.c:1077 config/tc-mn10300.c:1819 config/tc-msp430.c:455 -#: config/tc-or32.c:307 config/tc-ppc.c:2458 config/tc-s390.c:1221 -#: config/tc-sh.c:1359 config/tc-sh64.c:2213 config/tc-v850.c:1967 -#: config/tc-z80.c:575 config/tc-z8k.c:350 +msgstr "opérande illégal" + +#: cgen.c:424 config/tc-arc.c:1667 config/tc-avr.c:590 config/tc-d10v.c:465 +#: config/tc-d30v.c:456 config/tc-h8300.c:500 config/tc-i370.c:2127 +#: config/tc-mcore.c:662 config/tc-microblaze.c:579 config/tc-mmix.c:488 +#: config/tc-mn10200.c:1045 config/tc-mn10300.c:1679 config/tc-msp430.c:452 +#: config/tc-or32.c:307 config/tc-ppc.c:2627 config/tc-s390.c:1212 +#: config/tc-sh.c:1387 config/tc-sh64.c:2213 config/tc-v850.c:2341 +#: config/tc-v850.c:2375 config/tc-v850.c:2415 config/tc-v850.c:2625 +#: config/tc-z80.c:570 config/tc-z8k.c:350 msgid "missing operand" -msgstr "opérande manquante" +msgstr "opérande manquant" -#: cgen.c:798 +#: cgen.c:799 msgid "a reloc on this operand implies an overflow" -msgstr "" +msgstr "un réadressage de cet opérande implique un débordement" -#: cgen.c:821 -#, fuzzy +#: cgen.c:822 msgid "operand mask overflow" -msgstr "débordement de l'opérande" +msgstr "débordement du masque de l'opérande" #. We can't actually support subtracting a symbol. -#: cgen.c:884 config/tc-arc.c:1287 config/tc-arm.c:1522 config/tc-arm.c:8151 -#: config/tc-arm.c:8202 config/tc-arm.c:8435 config/tc-arm.c:9158 -#: config/tc-arm.c:9962 config/tc-arm.c:9990 config/tc-arm.c:10247 -#: config/tc-arm.c:10264 config/tc-arm.c:10386 config/tc-avr.c:1056 -#: config/tc-cris.c:3984 config/tc-d10v.c:1536 config/tc-d30v.c:1937 -#: config/tc-mips.c:4180 config/tc-mips.c:5304 config/tc-mips.c:6243 -#: config/tc-mips.c:6835 config/tc-msp430.c:1976 config/tc-ppc.c:5615 -#: config/tc-spu.c:957 config/tc-spu.c:981 config/tc-v850.c:2303 -#: config/tc-xstormy16.c:484 config/tc-xtensa.c:5613 config/tc-xtensa.c:11575 +#: cgen.c:886 config/tc-arc.c:1249 config/tc-arm.c:1631 config/tc-arm.c:8897 +#: config/tc-arm.c:8949 config/tc-arm.c:9196 config/tc-arm.c:9986 +#: config/tc-arm.c:11068 config/tc-arm.c:11108 config/tc-arm.c:11436 +#: config/tc-arm.c:11475 config/tc-avr.c:1108 config/tc-cris.c:4043 +#: config/tc-d10v.c:1511 config/tc-d30v.c:1915 config/tc-mips.c:4462 +#: config/tc-mips.c:5586 config/tc-mips.c:6557 config/tc-mips.c:7133 +#: config/tc-msp430.c:1936 config/tc-ppc.c:5874 config/tc-spu.c:957 +#: config/tc-spu.c:981 config/tc-v850.c:3084 config/tc-xstormy16.c:483 +#: config/tc-xtensa.c:5833 config/tc-xtensa.c:11830 msgid "expression too complex" msgstr "expression trop complexe" -#: cgen.c:978 config/tc-ppc.c:5739 config/tc-s390.c:2093 config/tc-v850.c:2343 -#: config/tc-xstormy16.c:538 +#: cgen.c:982 config/tc-arc.c:1310 config/tc-ppc.c:5999 config/tc-s390.c:2028 +#: config/tc-v850.c:3131 config/tc-xstormy16.c:537 msgid "unresolved expression that must be resolved" -msgstr "expression non résolue qui doit être résolue" +msgstr "expression non résolue qui doit être résolue" -#: cgen.c:1003 config/tc-xstormy16.c:563 +#: cgen.c:1007 config/tc-xstormy16.c:562 #, c-format msgid "internal error: can't install fix for reloc type %d (`%s')" -msgstr "" -"ERREUR interne: ne peut installer un correctif pour le type de " -"relocalisation %d (« %s »)" +msgstr "erreur interne: ne peut installer un correctif pour le type de réadressage %d (« %s »)" -#: cgen.c:1033 -#, fuzzy +#: cgen.c:1037 msgid "relocation is not supported" -msgstr ".option pic%d n'est pas supportée" +msgstr "le réadressage n'est pas supporté" #: cond.c:83 msgid "invalid identifier for \".ifdef\"" -msgstr "identificateur invalide pour « .ifdef »" +msgstr "identificateur invalide pour « .ifdef »" #: cond.c:150 msgid "non-constant expression in \".if\" statement" -msgstr "expression n'est pas une constante dans la déclaration « .if »" +msgstr "expression n'est pas une constante dans la déclaration « .if »" #: cond.c:277 msgid "bad format for ifc or ifnc" @@ -576,35 +568,35 @@ msgstr "mauvais format pour ifc ou ifnc" #: cond.c:307 msgid "\".elseif\" without matching \".if\"" -msgstr "« .elseif» sans pairage «.if »" +msgstr "« .elseif » sans « .if » correspondant" #: cond.c:311 msgid "\".elseif\" after \".else\"" -msgstr "« .elseif» après «.else »" +msgstr "« .elseif » après « .else »" #: cond.c:314 cond.c:420 msgid "here is the previous \"else\"" -msgstr "voici le « else » précédent" +msgstr "voici le « else » précédent" #: cond.c:317 cond.c:423 msgid "here is the previous \"if\"" -msgstr "voici le « if » précédent" +msgstr "voici le « if » précédent" #: cond.c:346 msgid "non-constant expression in \".elseif\" statement" -msgstr "expression n'est pas une constante dans la déclaration « .elseif »" +msgstr "expression n'est pas une constante dans la déclaration « .elseif »" #: cond.c:384 msgid "\".endif\" without \".if\"" -msgstr "« .endif» sans «.if »" +msgstr "« .endif » sans « .if »" #: cond.c:413 msgid "\".else\" without matching \".if\"" -msgstr "« .else» non pairé avec «if »" +msgstr "« .else » sans « .if » correspondant" #: cond.c:417 msgid "duplicate \"else\"" -msgstr "duplicité du « else »" +msgstr "« else » en double" #: cond.c:468 msgid ".ifeqs syntax error" @@ -612,2747 +604,3019 @@ msgstr ".ifeqs erreur de syntaxe" #: cond.c:549 msgid "end of macro inside conditional" -msgstr "fin de macro à l'intérieur d'un conditionnel" +msgstr "fin de macro à l'intérieur d'un conditionnel" #: cond.c:551 msgid "end of file inside conditional" -msgstr "fin de fichier à l'intérieur d'un conditionnel" +msgstr "fin de fichier à l'intérieur d'un conditionnel" #: cond.c:554 msgid "here is the start of the unterminated conditional" -msgstr "voici le début du conditionnel non terminé" +msgstr "voici le début du conditionnel non terminé" #: cond.c:558 msgid "here is the \"else\" of the unterminated conditional" -msgstr "voici le « else » du conditionnel non terminé" +msgstr "voici le « else » du conditionnel non terminé" #: config/atof-ieee.c:141 -#, fuzzy msgid "cannot create floating-point number" -msgstr "nombre flottant invalide" +msgstr "impossible de créer le nombre à virgule flottante" + +#: config/atof-ieee.c:288 +msgid "NaNs are not supported by this target\n" +msgstr "NaNs ne sont pas supportés par cette cible\n" -#: config/atof-vax.c:450 config/tc-bfin.c:728 config/tc-fr30.c:357 -#: config/tc-frv.c:1600 config/tc-i960.c:1754 config/tc-ip2k.c:371 -#: config/tc-iq2000.c:764 config/tc-m32c.c:1236 config/tc-m32r.c:2142 -#: config/tc-mep.c:1714 config/tc-mt.c:473 config/tc-openrisc.c:375 -#: config/tc-xc16x.c:258 config/tc-xstormy16.c:631 -msgid "Bad call to md_atof()" -msgstr "appel erroné de md_atof()" +#: config/atof-ieee.c:327 config/atof-ieee.c:368 +msgid "Infinities are not supported by this target\n" +msgstr "Les nombres infinis ne sont pas supportés par cette cible\n" -#: config/obj-aout.c:85 +#: config/atof-ieee.c:784 config/atof-vax.c:450 config/tc-arm.c:1026 +#: config/tc-ia64.c:11433 config/tc-tic30.c:1259 config/tc-tic4x.c:2598 +msgid "Unrecognized or unsupported floating point constant" +msgstr "Constante décimale non reconnue ou non supportée" + +#: config/obj-aout.c:84 #, c-format msgid "Attempt to put a common symbol into set %s" msgstr "Tentative de placer un symbole commun dans l'ensemble %s" -#: config/obj-aout.c:89 +#: config/obj-aout.c:88 #, c-format msgid "Attempt to put an undefined symbol into set %s" -msgstr "Tentative de placer le symbole indéfini dans l'ensemble %s" +msgstr "Tentative de placer le symbole indéfini dans l'ensemble %s" -#: config/obj-aout.c:116 config/obj-coff.c:1339 +#: config/obj-aout.c:115 config/obj-coff.c:1394 #, c-format msgid "Symbol `%s' can not be both weak and common" -msgstr "Symbole « %s» ne peut être à la fois «weak» et «common »" +msgstr "Symbole « %s» ne peut être à la fois « weak » et « common »" -#: config/obj-coff.c:133 +#: config/obj-coff.c:136 #, c-format msgid "Inserting \"%s\" into structure table failed: %s" -msgstr "Insertion de « %s » dans la table de structure a échoué: %s" +msgstr "Insertion de « %s » dans la table de structure a échoué: %s" + +#: config/obj-coff.c:215 config/obj-coff.c:1691 config/tc-ppc.c:4937 +#: config/tc-tic54x.c:4008 read.c:2806 +#, c-format +msgid "error setting flags for \"%s\": %s" +msgstr "erreur lors de l'initialisation des fanions de « %s »: %s" #. Zero is used as an end marker in the file. -#: config/obj-coff.c:366 +#: config/obj-coff.c:434 msgid "Line numbers must be positive integers\n" -msgstr "Les numéros de lignes doit être des entiers positifs\n" +msgstr "Les numéros de lignes doivent être des entiers positifs\n" -#: config/obj-coff.c:398 +#: config/obj-coff.c:466 msgid ".ln pseudo-op inside .def/.endef: ignored." -msgstr ".ln pseudo opérateur à l'intérieur de .def/.endef: ignoré." +msgstr ".ln pseudo opérateur à l'intérieur de .def/.endef: ignoré." -#: config/obj-coff.c:440 ecoff.c:3240 +#: config/obj-coff.c:508 ecoff.c:3250 msgid ".loc outside of .text" -msgstr ".loc à l'extérieur de .text" +msgstr ".loc à l'extérieur de .text" -#: config/obj-coff.c:447 +#: config/obj-coff.c:515 msgid ".loc pseudo-op inside .def/.endef: ignored." -msgstr ".loc pseudo opérateur à l'intérieur de .def/.endef: ignoré." +msgstr ".loc pseudo opérateur à l'intérieur de .def/.endef: ignoré." -#: config/obj-coff.c:528 +#: config/obj-coff.c:596 msgid ".def pseudo-op used inside of .def/.endef: ignored." -msgstr ".def pseudo opérateur utilisé à l'intérieur de .def/.endef: ignoré." +msgstr ".def pseudo opérateur utilisé à l'intérieur de .def/.endef: ignoré." -#: config/obj-coff.c:567 +#: config/obj-coff.c:632 msgid ".endef pseudo-op used outside of .def/.endef: ignored." -msgstr ".endef pseudo opérateur utilisé à l'extérieur de .def/.endef: ignoré." +msgstr ".endef pseudo opérateur utilisé à l'extérieur de .def/.endef: ignoré." -#: config/obj-coff.c:606 +#: config/obj-coff.c:671 #, c-format msgid "`%s' symbol without preceding function" -msgstr "« %s » symbole sans fonction qui la précède" +msgstr "« %s » symbole sans fonction qui la précède" -#: config/obj-coff.c:693 +#: config/obj-coff.c:758 #, c-format msgid "unexpected storage class %d" msgstr "classe de stockage inattendue %d" -#: config/obj-coff.c:801 +#: config/obj-coff.c:866 msgid ".dim pseudo-op used outside of .def/.endef: ignored." -msgstr ".dim pseudo opérateur utilisé à l'extérieur de .def/.endef: ignoré." +msgstr ".dim pseudo opérateur utilisé à l'extérieur de .def/.endef: ignoré." -#: config/obj-coff.c:821 +#: config/obj-coff.c:886 msgid "badly formed .dim directive ignored" -msgstr "directive .dim mal composée - ignorée" +msgstr "directive .dim mal composée est ignorée" -#: config/obj-coff.c:870 +#: config/obj-coff.c:935 msgid ".size pseudo-op used outside of .def/.endef ignored." -msgstr ".size pseudo opérateur utilisé à l'extérieur de .def/.endef ignoré." +msgstr ".size pseudo opérateur utilisé à l'extérieur de .def/.endef ignoré." -#: config/obj-coff.c:885 +#: config/obj-coff.c:950 msgid ".scl pseudo-op used outside of .def/.endef ignored." -msgstr ".scl pseudo opérateur utilisé à l'extérieur de .def/.endef ignoré." +msgstr ".scl pseudo opérateur utilisé à l'extérieur de .def/.endef ignoré." -#: config/obj-coff.c:902 +#: config/obj-coff.c:967 msgid ".tag pseudo-op used outside of .def/.endef ignored." -msgstr ".tag pseudo opérateur utilisé à l'extérieur de .def/.endef ignoré." +msgstr ".tag pseudo opérateur utilisé à l'extérieur de .def/.endef ignoré." -#: config/obj-coff.c:920 +#: config/obj-coff.c:985 #, c-format msgid "tag not found for .tag %s" -msgstr "étiquette non repérée pour .tag %s" +msgstr "étiquette non repérée pour le .tag %s" -#: config/obj-coff.c:933 +#: config/obj-coff.c:998 msgid ".type pseudo-op used outside of .def/.endef ignored." -msgstr ".type pseudo opérateur utilisé à l'extérieur de .def/.endef ignoré." +msgstr ".type pseudo opérateur utilisé à l'extérieur de .def/.endef ignoré." -#: config/obj-coff.c:952 +#: config/obj-coff.c:1017 msgid ".val pseudo-op used outside of .def/.endef ignored." -msgstr ".val pseudo opérateur utilisé à l'extérieur de .def/.endef ignoré." +msgstr ".val pseudo opérateur utilisé à l'extérieur de .def/.endef ignoré." -#: config/obj-coff.c:1119 -#, fuzzy +#: config/obj-coff.c:1174 msgid "badly formed .weak directive ignored" -msgstr "directive .dim mal composée - ignorée" +msgstr "directive .dim mal composée est ignorée" -#: config/obj-coff.c:1297 +#: config/obj-coff.c:1352 msgid "mismatched .eb" msgstr ".eb ne concorde pas" -#: config/obj-coff.c:1318 -#, fuzzy, c-format +#: config/obj-coff.c:1373 +#, c-format msgid "C_EFCN symbol for %s out of scope" -msgstr "symbole C_EFCN hors limite" +msgstr "symbole C_EFCN pour %s hors limite" + +#: config/obj-coff.c:1427 +#, c-format +msgid "Warning: internal error: forgetting to set endndx of %s" +msgstr "Attention: erreur interne: on a oublié de fixer endndx de %s" #. STYP_INFO #. STYP_LIB #. STYP_OVER -#: config/obj-coff.c:1590 +#: config/obj-coff.c:1657 #, c-format msgid "unsupported section attribute '%c'" -msgstr "attribut de section non supporté « %c »" +msgstr "attribut de section non supporté « %c »" -#: config/obj-coff.c:1594 config/tc-ppc.c:4647 +#: config/obj-coff.c:1661 config/tc-ppc.c:4919 #, c-format msgid "unknown section attribute '%c'" -msgstr "attribut de section inconnu « %c »" - -#: config/obj-coff.c:1622 config/tc-ppc.c:4665 config/tc-tic54x.c:4285 -#: read.c:2754 -#, c-format -msgid "error setting flags for \"%s\": %s" -msgstr "erreur lors de l'initialisation des fanions de « %s »: %s" +msgstr "attribut de section inconnu « %c »" -#: config/obj-coff.c:1633 +#: config/obj-coff.c:1703 #, c-format msgid "Ignoring changed section attributes for %s" -msgstr "A ignoré les attributs de section modifiés pour %s" +msgstr "Ignore les changements des attributs de section pour %s" -#: config/obj-coff.c:1764 +#: config/obj-coff.c:1838 #, c-format msgid "0x%lx: \"%s\" type = %ld, class = %d, segment = %d\n" -msgstr "0x%lx: « %s » type = %ld, classe = %d, segment = %d\n" +msgstr "0x%lx: « %s » type = %ld, classe = %d, segment = %d\n" #: config/obj-ecoff.c:125 msgid "Can't set GP value" -msgstr "Ne peut initialiser une valeur GP" +msgstr "Ne peut initialiser la valeur GP" #: config/obj-ecoff.c:132 msgid "Can't set register masks" msgstr "Ne peut initialiser les masques de registres" -#: config/obj-elf.c:323 config/tc-sparc.c:4053 config/tc-v850.c:450 +#: config/obj-elf.c:334 config/tc-sparc.c:3949 config/tc-v850.c:503 #, c-format msgid "bad .common segment %s" -msgstr "segment .common erroné %s" +msgstr "segment .common erroné %s" -#: config/obj-elf.c:601 +#: config/obj-elf.c:411 +msgid "Missing symbol name in directive" +msgstr "Nom de symbole manquant dans la directive" + +#: config/obj-elf.c:618 #, c-format msgid "setting incorrect section type for %s" msgstr "initialisation incorrecte du type de section pour %s" -#: config/obj-elf.c:606 +#: config/obj-elf.c:623 #, c-format msgid "ignoring incorrect section type for %s" -msgstr "type de section incorrect de %s a été ignoré" +msgstr "type de section incorrect de %s a été ignoré" -#: config/obj-elf.c:648 +#: config/obj-elf.c:665 #, c-format msgid "setting incorrect section attributes for %s" msgstr "initialisation incorrecte des attributs de section de %s" -#: config/obj-elf.c:700 -#, fuzzy, c-format +#: config/obj-elf.c:720 +#, c-format msgid "ignoring changed section type for %s" -msgstr "changement d'entité de taille de section pour %s" +msgstr "changement de type de section ignoré pour %s" -#: config/obj-elf.c:712 +#: config/obj-elf.c:732 #, c-format msgid "ignoring changed section attributes for %s" -msgstr "changement d'attributs de section ignoré pour %s" +msgstr "changement d'attributs de section ignoré pour %s" -#: config/obj-elf.c:714 +#: config/obj-elf.c:734 #, c-format msgid "ignoring changed section entity size for %s" -msgstr "changement d'entité de taille de section pour %s" +msgstr "changement d'entité de taille de section pour %s" -#: config/obj-elf.c:767 -msgid "unrecognized .section attribute: want a,w,x,M,S,G,T" -msgstr "attribut .section non reconnu: nécessite a,w,x,M,S,G,T" +#: config/obj-elf.c:794 +msgid "unrecognized .section attribute: want a,e,w,x,M,S,G,T" +msgstr "attribut .section non reconnu: a,e,w,x,M,S,G,T attendu" -#: config/obj-elf.c:804 -msgid "unrecognized section attribute" -msgstr "attribut de section non reconnu" - -#: config/obj-elf.c:832 read.c:2738 +#: config/obj-elf.c:836 read.c:2790 msgid "unrecognized section type" msgstr "type de section non reconnnu" -#: config/obj-elf.c:862 +#: config/obj-elf.c:868 +msgid "unrecognized section attribute" +msgstr "attribut de section non reconnu" + +#: config/obj-elf.c:899 config/tc-alpha.c:4208 msgid "missing name" msgstr "nom manquant" -#: config/obj-elf.c:973 +#: config/obj-elf.c:1030 msgid "invalid merge entity size" -msgstr "fusion invalide d'entité taille" +msgstr "mauvaise taille de fusion d'entité" -#: config/obj-elf.c:980 +#: config/obj-elf.c:1037 msgid "entity size for SHF_MERGE not specified" -msgstr "taille d'entité pour SHF_MERGE non spécifiée" +msgstr "taille d'entité pour SHF_MERGE non spécifiée" -#: config/obj-elf.c:1000 +#: config/obj-elf.c:1043 +msgid "? section flag ignored with G present" +msgstr "fanion ? de section ignoré quand G est présent" + +#: config/obj-elf.c:1062 msgid "group name for SHF_GROUP not specified" -msgstr "nom de groupe pour SHF_GROUP non spécifié" +msgstr "nom de groupe pour SHF_GROUP non spécifié" -#: config/obj-elf.c:1013 +#: config/obj-elf.c:1085 msgid "character following name is not '#'" -msgstr "caractère suivant le nom n'est pas « # »" +msgstr "caractère suivant le nom n'est pas « # »" -#: config/obj-elf.c:1128 +#: config/obj-elf.c:1204 msgid ".previous without corresponding .section; ignored" -msgstr ".previous sans directive correspondante .section; ignoré" +msgstr ".previous sans .section correspondante; ignoré" -#: config/obj-elf.c:1154 +#: config/obj-elf.c:1230 msgid ".popsection without corresponding .pushsection; ignored" -msgstr ".popsection sans directive correspondante .pushsection; ignoré" +msgstr ".popsection sans .pushsection correspondant; ignoré" -#: config/obj-elf.c:1206 +#: config/obj-elf.c:1276 msgid "expected comma after name in .symver" -msgstr "virgule attendue après le nom dans .symver" +msgstr "virgule attendue après le nom dans .symver" -#: config/obj-elf.c:1230 +#: config/obj-elf.c:1300 #, c-format msgid "missing version name in `%s' for symbol `%s'" -msgstr "nom de version manquant dans « %s» pour le symbole «%s »" +msgstr "nom de version manquant dans « %s» pour le symbole «%s »" -#: config/obj-elf.c:1241 +#: config/obj-elf.c:1311 #, c-format msgid "multiple versions [`%s'|`%s'] for symbol `%s'" -msgstr "version multiples [« %s»|«%s»] pour le symbole «%s »" +msgstr "versions multiples [«%s»|«%s»] pour le symbole «%s»" + +#: config/obj-elf.c:1348 +#, c-format +msgid "expected `%s' to have already been set for .vtable_inherit" +msgstr "«%s» aurait déjà dû être fixé pour .vtable_inherit" + +#: config/obj-elf.c:1358 +msgid "expected comma after name in .vtable_inherit" +msgstr "virgule attendue après le nom dans .vtable_inherit" -#: config/obj-elf.c:1471 +#: config/obj-elf.c:1411 +msgid "expected comma after name in .vtable_entry" +msgstr "virgule attendue après le nom dans .vtable_entry" + +#: config/obj-elf.c:1534 msgid "expected quoted string" -msgstr "chaîne en commentaire attendue" +msgstr "chaîne entre apostrophes attendue" -#: config/obj-elf.c:1491 +#: config/obj-elf.c:1554 #, c-format msgid "expected comma after name `%s' in .size directive" -msgstr "virgule attendue après le nom « %s » dans la directive .size" +msgstr "virgule attendue après le nom « %s » dans la directive .size" -#: config/obj-elf.c:1500 +#: config/obj-elf.c:1563 msgid "missing expression in .size directive" msgstr "expression manquante dans la directive .size" -#: config/obj-elf.c:1599 +#: config/obj-elf.c:1687 +#, c-format +msgid "symbol '%s' is already defined" +msgstr "symbole « %s » déjà défini" + +#: config/obj-elf.c:1707 config/obj-elf.c:1719 +#, c-format +msgid "symbol type \"%s\" is supported only by GNU targets" +msgstr "type de symbole « %s » n'est supporté que par les cibles GNU" + +#: config/obj-elf.c:1730 #, c-format msgid "unrecognized symbol type \"%s\"" -msgstr "type de symbole non reconnu « %s »" +msgstr "type de symbole non reconnu « %s »" -#: config/obj-elf.c:1770 +#: config/obj-elf.c:1906 msgid ".size expression too complicated to fix up" -msgstr "expression .size trop compliquée pour tenter de la corriger" +msgstr "expression .size trop compliquée pour tenter de la corriger" -#: config/obj-elf.c:1802 +#: config/obj-elf.c:1938 #, c-format -msgid "" -"invalid attempt to declare external version name as default in symbol `%s'" -msgstr "" -"tentative invalide de déclaration d'un nom de version externe comme symbole " -"par défaut « %s »" +msgid "invalid attempt to declare external version name as default in symbol `%s'" +msgstr "tentative invalide de déclaration d'un nom de version externe comme nom par défaut pour le symbole « %s »" -#: config/obj-elf.c:1863 ecoff.c:3598 +#: config/obj-elf.c:1999 ecoff.c:3608 #, c-format msgid "symbol `%s' can not be both weak and common" -msgstr "Symbole « %s » ne peut être à la fois weak et common" +msgstr "symbole « %s » ne peut être à la fois weak et common" -#: config/obj-elf.c:1970 +#: config/obj-elf.c:2116 #, c-format msgid "assuming all members of group `%s' are COMDAT" -msgstr "assumer que tous les membres du groupe « %s » sont COMDAT" +msgstr "assume que tous les membres du groupe « %s » sont COMDAT" -#: config/obj-elf.c:1992 +#: config/obj-elf.c:2128 #, c-format msgid "can't create group: %s" -msgstr "ne peut créet le groupe: %s" +msgstr "ne peut créer le groupe: %s" -#: config/obj-elf.c:2102 +#: config/obj-elf.c:2260 #, c-format msgid "failed to set up debugging information: %s" -msgstr "échec d'initialisation des informations de débug: %s" +msgstr "échec d'initialisation des informations de débug: %s" -#: config/obj-elf.c:2122 +#: config/obj-elf.c:2280 #, c-format msgid "can't start writing .mdebug section: %s" -msgstr "ne peut débuter l'écriture de la section .mdebug: %s" +msgstr "ne peut débuter l'écriture de la section .mdebug: %s" -#: config/obj-elf.c:2130 +#: config/obj-elf.c:2288 #, c-format msgid "could not write .mdebug section: %s" -msgstr "ne peut écrire la section .mdebug: %s" +msgstr "n'a pas pu écrire la section .mdebug: %s" -#: config/obj-som.c:129 -msgid "Only one .version pseudo-op per file!" -msgstr "Un seul pseudo opérateur .version par fichier!" +#: config/obj-som.c:58 +msgid "Only one .compiler pseudo-op per file!" +msgstr "Un seul pseudo opérateur .compiler par fichier !" -#: config/obj-som.c:146 config/obj-som.c:188 +#: config/obj-som.c:75 config/obj-som.c:146 config/obj-som.c:188 msgid "Expected quoted string" -msgstr "chaîne mise en commentaire attendue" +msgstr "Chaîne entre apostrophes attendue" + +#: config/obj-som.c:88 +msgid ".compiler directive missing language and version" +msgstr "il manque le langage et la version dans la directive .compiler" + +#: config/obj-som.c:98 +msgid ".compiler directive missing version" +msgstr "il manque la version dans la directive .compiler" + +#: config/obj-som.c:114 +#, c-format +msgid "FATAL: Attaching compiler header %s" +msgstr "FATAL: Attachement de l'en-tête du compilateur %s" + +#: config/obj-som.c:129 +msgid "Only one .version pseudo-op per file!" +msgstr "Un seul pseudo opérateur .version par fichier !" #: config/obj-som.c:153 -#, fuzzy, c-format +#, c-format msgid "attaching version header %s: %s" -msgstr "FATAL: attachement de l'en-tête de version %s" +msgstr "attachement de l'en-tête de version %s: %s" #: config/obj-som.c:171 msgid "Only one .copyright pseudo-op per file!" -msgstr "Un seul pseudo opérateur .copyright par fichier!" +msgstr "Un seul pseudo opérateur .copyright par fichier !" #: config/obj-som.c:195 -#, fuzzy, c-format +#, c-format msgid "attaching copyright header %s: %s" -msgstr "FATAL: attachement de l'en-tête de version %s" +msgstr "attachement de l'en-tête de copyright %s: %s" -#: config/tc-alpha.c:592 +#: config/tc-alpha.c:656 #, c-format msgid "No !literal!%ld was found" -msgstr "Aucun !literal!%ld n'a été retrouvé" +msgstr "Aucun !literal!%ld n'a été retrouvé" -#: config/tc-alpha.c:599 +#: config/tc-alpha.c:663 #, c-format msgid "No !tlsgd!%ld was found" -msgstr "Aucun !tlsgd!%ld n'a été retrouvé" +msgstr "Aucun !tlsgd!%ld n'a été trouvé" -#: config/tc-alpha.c:606 +#: config/tc-alpha.c:670 #, c-format msgid "No !tlsldm!%ld was found" -msgstr "Aucun !tlsldm!%ld n'a été retrouvé" +msgstr "Aucun !tlsldm!%ld n'a été trouvé" -#: config/tc-alpha.c:615 +#: config/tc-alpha.c:679 #, c-format msgid "No ldah !gpdisp!%ld was found" -msgstr "Aucun ldah !gpdisp!%ld n'a été retrouvé" +msgstr "Aucun ldah !gpdisp!%ld n'a été trouvé" -#: config/tc-alpha.c:665 +#: config/tc-alpha.c:729 #, c-format msgid "too many !literal!%ld for %s" msgstr "trop de !literal!%ld pour %s" -#: config/tc-alpha.c:695 +#: config/tc-alpha.c:759 #, c-format msgid "No lda !gpdisp!%ld was found" -msgstr "Aucun lda !gpdisp!%ld n'a été retrouvé" +msgstr "Aucun lda !gpdisp!%ld n'a été trouvé" #. Only support one relocation op per insn. -#: config/tc-alpha.c:852 +#: config/tc-alpha.c:918 msgid "More than one relocation op per insn" -msgstr "Plus d'un opérateur de relocalisation par insn" +msgstr "Plus d'un opérateur de réadressage par insn" -#: config/tc-alpha.c:868 +#: config/tc-alpha.c:934 msgid "No relocation operand" -msgstr "Pas d'opérande de relocalisation" +msgstr "Pas d'opérande de réadressage" -#: config/tc-alpha.c:878 +#: config/tc-alpha.c:944 #, c-format msgid "Unknown relocation operand: !%s" -msgstr "Opérande de relocalisation inconnue: !%s" +msgstr "Opérande de réadressage inconnu: !%s" -#: config/tc-alpha.c:888 +#: config/tc-alpha.c:954 #, c-format msgid "no sequence number after !%s" -msgstr "pas de numéro de séquence après !%s" +msgstr "pas de numéro de séquence après !%s" -#: config/tc-alpha.c:898 +#: config/tc-alpha.c:964 #, c-format msgid "!%s does not use a sequence number" -msgstr "!%s n'utilise pas un numéro de séquence" +msgstr "!%s n'utilise pas un numéro de séquence" -#: config/tc-alpha.c:908 +#: config/tc-alpha.c:974 #, c-format msgid "Bad sequence number: !%s!%s" -msgstr "Numéro de séquence erroné: !%s!%s" +msgstr "Numéro de séquence erroné: !%s!%s" -#: config/tc-alpha.c:1123 config/tc-alpha.c:3139 +#: config/tc-alpha.c:1189 config/tc-alpha.c:3364 #, c-format msgid "inappropriate arguments for opcode `%s'" -msgstr "arguments inappropriés pour le opcode « %s »" +msgstr "arguments inappropriés pour l'opcode « %s »" -#: config/tc-alpha.c:1125 config/tc-alpha.c:3141 +#: config/tc-alpha.c:1191 config/tc-alpha.c:3366 #, c-format msgid "opcode `%s' not supported for target %s" -msgstr "opcode « %s » n'est pas supporté pour la cible %s" +msgstr "opcode « %s » n'est pas supporté pour la cible %s" -#: config/tc-alpha.c:1129 config/tc-alpha.c:3145 config/tc-avr.c:1325 -#: config/tc-msp430.c:1868 +#: config/tc-alpha.c:1195 config/tc-alpha.c:3370 config/tc-avr.c:1384 +#: config/tc-msp430.c:1828 #, c-format msgid "unknown opcode `%s'" -msgstr "opcode inconnu « %s »" +msgstr "opcode inconnu « %s »" -#: config/tc-alpha.c:1209 config/tc-alpha.c:1384 +#: config/tc-alpha.c:1276 config/tc-alpha.c:1537 msgid "overflow in literal (.lita) table" -msgstr "débordement dans la table de litérals (.lita)" +msgstr "débordement dans la table de littéraux (.lita)" -#: config/tc-alpha.c:1216 config/tc-alpha.c:1240 config/tc-alpha.c:1397 -#: config/tc-alpha.c:2049 config/tc-alpha.c:2093 config/tc-alpha.c:2162 -#: config/tc-alpha.c:2245 config/tc-alpha.c:2470 config/tc-alpha.c:2568 +#: config/tc-alpha.c:1283 config/tc-alpha.c:1307 config/tc-alpha.c:1550 +#: config/tc-alpha.c:2237 config/tc-alpha.c:2282 config/tc-alpha.c:2351 +#: config/tc-alpha.c:2434 config/tc-alpha.c:2659 config/tc-alpha.c:2757 msgid "macro requires $at register while noat in effect" msgstr "macro requiert le registre $at alors qu'il n'est pas effectif" -#: config/tc-alpha.c:1218 config/tc-alpha.c:1242 config/tc-alpha.c:1399 +#: config/tc-alpha.c:1285 config/tc-alpha.c:1309 config/tc-alpha.c:1552 msgid "macro requires $at while $at in use" -msgstr "macro requiert $at alors que $at est utilisé" +msgstr "macro requiert $at alors que $at est utilisé" -#: config/tc-alpha.c:1346 +#: config/tc-alpha.c:1495 msgid "bignum invalid; zero assumed" -msgstr "grand nombre invalide; zéro assumé" +msgstr "grand nombre invalide; zéro assumé" -#: config/tc-alpha.c:1348 +#: config/tc-alpha.c:1497 msgid "floating point number invalid; zero assumed" -msgstr "nombre flottant invalide; zéro assumé" +msgstr "nombre flottant invalide; zéro assumé" -#: config/tc-alpha.c:1353 +#: config/tc-alpha.c:1502 msgid "can't handle expression" msgstr "ne peut traiter l'expression" -#: config/tc-alpha.c:1390 +#: config/tc-alpha.c:1543 msgid "overflow in literal (.lit8) table" -msgstr "débordement dans la table de litérals (.lit8)" +msgstr "débordement dans la table de littéraux (.lit8)" -#: config/tc-alpha.c:1674 +#: config/tc-alpha.c:1840 #, c-format msgid "too many ldah insns for !gpdisp!%ld" msgstr "trop de ldah insns pour !gpdisp!%ld" -#: config/tc-alpha.c:1676 config/tc-alpha.c:1688 +#: config/tc-alpha.c:1842 config/tc-alpha.c:1854 #, c-format msgid "both insns for !gpdisp!%ld must be in the same section" -msgstr "les deux insns pour !gpdisp!%ld doivent être dans la même section" +msgstr "les deux insns pour !gpdisp!%ld doivent être dans la même section" -#: config/tc-alpha.c:1686 +#: config/tc-alpha.c:1852 #, c-format msgid "too many lda insns for !gpdisp!%ld" msgstr "trop de lda insns pour !gpdisp!%ld" -#: config/tc-alpha.c:1742 +#: config/tc-alpha.c:1908 #, c-format msgid "too many lituse insns for !lituse_tlsgd!%ld" -msgstr "trop de lituse insn pour !lituse)tlsgd!%ld" +msgstr "trop de lituse insns pour !lituse_tlsgd!%ld" -#: config/tc-alpha.c:1745 +#: config/tc-alpha.c:1911 #, c-format msgid "too many lituse insns for !lituse_tlsldm!%ld" -msgstr "trop de lituse insn pour !lituse_tlsldm!%ld" +msgstr "trop de lituse insns pour !lituse_tlsldm!%ld" -#: config/tc-alpha.c:1762 +#: config/tc-alpha.c:1928 #, c-format msgid "duplicate !tlsgd!%ld" -msgstr "duplicité de !tlsgd!%ld" +msgstr "!tlsgd!%ld en double" -#: config/tc-alpha.c:1764 +#: config/tc-alpha.c:1930 #, c-format msgid "sequence number in use for !tlsldm!%ld" -msgstr "numéro de séquence utilisé dans !tlsldm!%ld" +msgstr "numéro de séquence utilisé dans !tlsldm!%ld" -#: config/tc-alpha.c:1778 +#: config/tc-alpha.c:1944 #, c-format msgid "duplicate !tlsldm!%ld" -msgstr "duplicité de !tlsldm!%ld" +msgstr "!tlsldm!%ld en double" -#: config/tc-alpha.c:1780 +#: config/tc-alpha.c:1946 #, c-format msgid "sequence number in use for !tlsgd!%ld" -msgstr "numéro de séquence utilisé pour !tlsgd!%ld" +msgstr "numéro de séquence utilisé pour !tlsgd!%ld" -#: config/tc-alpha.c:1823 config/tc-arc.c:292 config/tc-mn10200.c:888 -#: config/tc-mn10300.c:2604 config/tc-ppc.c:1563 config/tc-s390.c:615 -#: config/tc-v850.c:1588 -#, fuzzy +#: config/tc-alpha.c:2001 config/tc-arc.c:292 config/tc-mn10200.c:856 +#: config/tc-mn10300.c:1148 config/tc-ppc.c:1699 config/tc-s390.c:611 msgid "operand" -msgstr "Mauvaise opérande" +msgstr "opérande" -#: config/tc-alpha.c:1962 +#: config/tc-alpha.c:2140 msgid "invalid relocation for instruction" -msgstr "relocalisation invalide pour l'instruction" +msgstr "réadressage invalide pour l'instruction" -#: config/tc-alpha.c:1973 +#: config/tc-alpha.c:2154 msgid "invalid relocation for field" -msgstr "relocalisation invalide pour le champ" +msgstr "réadressage invalide pour le champ" -#: config/tc-alpha.c:2760 +#: config/tc-alpha.c:2985 msgid "can not resolve expression" -msgstr "ne peut résoudre l'expression" +msgstr "ne peut résoudre l'expression" -#: config/tc-alpha.c:3275 config/tc-ppc.c:1862 config/tc-ppc.c:4410 +#: config/tc-alpha.c:3524 config/tc-i370.c:1055 config/tc-microblaze.c:185 +#: config/tc-ppc.c:2024 config/tc-ppc.c:4682 #, c-format msgid ".COMMon length (%ld.) <0! Ignored." -msgstr "longueur de .COMMon (%ld.) <0! ignoré." +msgstr "longueur de .COMMon (%ld.) <0! Ignoré." -#: config/tc-alpha.c:3304 config/tc-sparc.c:3923 config/tc-v850.c:245 +#: config/tc-alpha.c:3535 config/tc-sparc.c:3820 config/tc-v850.c:298 msgid "Ignoring attempt to re-define symbol" -msgstr "Tentative ignorée de re-définition de symbole" +msgstr "Ignore la tentative de redéfinition du symbole" -#: config/tc-alpha.c:3313 config/tc-alpha.c:3322 config/tc-ppc.c:4447 -#: config/tc-sparc.c:3931 +#: config/tc-alpha.c:3627 config/tc-ppc.c:4719 config/tc-sparc.c:3828 #, c-format msgid "Length of .comm \"%s\" is already %ld. Not changed to %ld." -msgstr "Longueur de .comm « %s » est déjà %ld. N'a pas été changé pour %ld." +msgstr "Longueur de .comm « %s » est déjà %ld. N'a pas été changé pour %ld." -#: config/tc-alpha.c:3439 ecoff.c:3054 +#: config/tc-alpha.c:3730 ecoff.c:3064 msgid ".ent directive has no name" msgstr "La directive .ent n'a pas de nom" -#: config/tc-alpha.c:3447 +#: config/tc-alpha.c:3738 msgid "nested .ent directives" -msgstr "directive .ent imbriquées" +msgstr "directive .ent imbriquées" -#: config/tc-alpha.c:3491 ecoff.c:3005 +#: config/tc-alpha.c:3783 ecoff.c:3015 msgid ".end directive has no name" msgstr "Directive .end n'a pas de nom" -#: config/tc-alpha.c:3500 +#: config/tc-alpha.c:3792 msgid ".end directive without matching .ent" msgstr "directive .end sans concordance avec une directive .ent" -#: config/tc-alpha.c:3502 +#: config/tc-alpha.c:3794 msgid ".end directive names different symbol than .ent" -msgstr "Directive .end a un nom différent de symbole que .ent" +msgstr "Directive .end ne nomme pas le même symbole que .ent" -#: config/tc-alpha.c:3545 ecoff.c:3140 +#: config/tc-alpha.c:3837 ecoff.c:3150 msgid ".fmask outside of .ent" msgstr ".fmask en dehors de .ent" -#: config/tc-alpha.c:3547 config/tc-score.c:5886 ecoff.c:3204 +#: config/tc-alpha.c:3839 config/tc-score.c:5601 ecoff.c:3214 msgid ".mask outside of .ent" msgstr ".mask en dehors de .ent" -#: config/tc-alpha.c:3555 ecoff.c:3147 +#: config/tc-alpha.c:3847 ecoff.c:3157 msgid "bad .fmask directive" -msgstr "directive .fmask erronée" +msgstr "directive .fmask erronée" -#: config/tc-alpha.c:3557 ecoff.c:3211 +#: config/tc-alpha.c:3849 ecoff.c:3221 msgid "bad .mask directive" -msgstr "directive .mask erronée" +msgstr "directive .mask erronée" -#: config/tc-alpha.c:3590 config/tc-mips.c:14642 config/tc-score.c:6029 -#: ecoff.c:3168 +#: config/tc-alpha.c:3882 config/tc-mips.c:15153 config/tc-score.c:5743 +#: ecoff.c:3178 msgid ".frame outside of .ent" -msgstr ".frame à l'extérieur de .ent" +msgstr ".frame à l'extérieur de .ent" -#: config/tc-alpha.c:3601 ecoff.c:3179 +#: config/tc-alpha.c:3893 ecoff.c:3189 msgid "bad .frame directive" -msgstr "directive .frame erronée" +msgstr "directive .frame erronée" -#: config/tc-alpha.c:3633 +#: config/tc-alpha.c:3927 msgid ".prologue directive without a preceding .ent directive" -msgstr "directive .prologue sans directive .ent qui la précède" +msgstr "directive .prologue sans directive .ent précédente" -#: config/tc-alpha.c:3651 +#: config/tc-alpha.c:3945 #, c-format msgid "Invalid argument %d to .prologue." msgstr "argument invalide %d pour .prologue" -#: config/tc-alpha.c:3742 +#: config/tc-alpha.c:4036 msgid "ECOFF debugging is disabled." -msgstr "Mise au point de ECOFF est désactivée." +msgstr "Débug ECOFF désactivé." -#: config/tc-alpha.c:3756 +#: config/tc-alpha.c:4050 msgid ".ent directive without matching .end" -msgstr "directive .ent sans concordance d'une directive .end" +msgstr "directive .ent sans concordance avec une directive .end" -#: config/tc-alpha.c:3841 +#: config/tc-alpha.c:4135 msgid ".usepv directive has no name" -msgstr "Directive .usepv n'a pas de nom" +msgstr "Directive .usepv sans nom" -#: config/tc-alpha.c:3852 +#: config/tc-alpha.c:4146 msgid ".usepv directive has no type" -msgstr "Directive .usepv n'a pas de type" +msgstr "Directive .usepv sans type" -#: config/tc-alpha.c:3867 +#: config/tc-alpha.c:4161 msgid "unknown argument for .usepv" -msgstr "argument inconnue pour .usepv" +msgstr "argument inconnu pour .usepv" -#: config/tc-alpha.c:3900 -msgid "Unknown section directive" -msgstr "Directive de section inconnue" +#: config/tc-alpha.c:4276 +#, c-format +msgid "unknown section attribute %s" +msgstr "attribut de section inconnu %s" -#: config/tc-alpha.c:3935 +#: config/tc-alpha.c:4389 msgid ".ent directive has no symbol" -msgstr "Directive .ent n'a pas de symbole" +msgstr "Directive .ent sans symbole" + +#: config/tc-alpha.c:4418 +msgid ".handler directive has no name" +msgstr "Directive .handler sans nom" -#: config/tc-alpha.c:3960 +#: config/tc-alpha.c:4447 msgid "Bad .frame directive 1./2. param" -msgstr "Directive .frame erronée paramètre 1./2." +msgstr "Directive .frame erronée paramètre 1./2." -#: config/tc-alpha.c:3972 +#: config/tc-alpha.c:4459 msgid "Bad .frame directive 3./4. param" -msgstr "Directive .frame erronée paramètre 3./4." +msgstr "Directive .frame erronée paramètre 3./4." -#: config/tc-alpha.c:3994 +#: config/tc-alpha.c:4497 msgid ".pdesc directive not in link (.link) section" msgstr "Directive .pdesc n'est pas dans la section .link" -#: config/tc-alpha.c:4002 -msgid ".pdesc has no matching .ent" -msgstr ".pdesc n'est pas pairé avec .ent" - -#: config/tc-alpha.c:4013 +#: config/tc-alpha.c:4505 msgid ".pdesc directive has no entry symbol" -msgstr "Directive .pdesc n'a pas de symbole d'entrée" +msgstr "Directive .pdesc n'a pas de symbole d'entrée" + +#: config/tc-alpha.c:4523 +msgid ".pdesc has no matching .ent" +msgstr ".pdesc n'a pas de .ent correspondant" -#: config/tc-alpha.c:4026 +#: config/tc-alpha.c:4541 msgid "No comma after .pdesc " -msgstr "Pas de virgule après .pdesc " +msgstr "Pas de virgule après .pdesc " -#: config/tc-alpha.c:4046 +#: config/tc-alpha.c:4561 msgid "unknown procedure kind" -msgstr "type de procédure inconnue" +msgstr "type de procédure inconnue" -#: config/tc-alpha.c:4136 +#: config/tc-alpha.c:4673 msgid ".name directive not in link (.link) section" msgstr "Directive .name n'est pas dans la section .link" -#: config/tc-alpha.c:4144 +#: config/tc-alpha.c:4681 msgid ".name directive has no symbol" -msgstr "Directive .name n'a pas de symbole" +msgstr "Directive .name sans symbole" -#: config/tc-alpha.c:4175 +#: config/tc-alpha.c:4716 msgid "No symbol after .linkage" -msgstr "Pas de symbole après .linkage" +msgstr "Pas de symbole après .linkage" -#: config/tc-alpha.c:4199 +#: config/tc-alpha.c:4769 msgid "No symbol after .code_address" -msgstr "Pas de symbole après .code_address" +msgstr "Pas de symbole après .code_address" -#: config/tc-alpha.c:4226 config/tc-score.c:5892 +#: config/tc-alpha.c:4796 config/tc-score.c:5607 msgid "Bad .mask directive" -msgstr "Directive .mask erronée" +msgstr "Directive .mask erronée" -#: config/tc-alpha.c:4244 +#: config/tc-alpha.c:4814 msgid "Bad .fmask directive" -msgstr "Directive .fmask erronée" +msgstr "Directive .fmask erronée" -#: config/tc-alpha.c:4401 +#: config/tc-alpha.c:4971 #, c-format msgid "Expected comma after name \"%s\"" -msgstr "Virgule attendue après le nom « %s »" +msgstr "Virgule attendue après le nom « %s »" -#. *symbol_get_obj (symbolP) = (signed char) temp; -#: config/tc-alpha.c:4412 +#: config/tc-alpha.c:4983 #, c-format msgid "unhandled: .proc %s,%d" -msgstr "non traité: .proc %s,%d" +msgstr "non traité: .proc %s,%d" -#: config/tc-alpha.c:4446 +#: config/tc-alpha.c:5017 #, c-format msgid "Tried to .set unrecognized mode `%s'" -msgstr "Essayé la directive .set pour un mode non reconnu « %s »" +msgstr "Essayé la directive .set pour le mode non reconnu « %s »" -#: config/tc-alpha.c:4472 +#: config/tc-alpha.c:5043 #, c-format msgid "Bad base register, using $%d." -msgstr "Registre de base erroné, utilise $%d." +msgstr "Registre de base erroné, utilise $%d." -#: config/tc-alpha.c:4493 +#: config/tc-alpha.c:5064 #, c-format msgid "Alignment too large: %d. assumed" -msgstr "Alignement trop grand: %d. assumé" +msgstr "Alignement trop grand: %d. assumé" -#: config/tc-alpha.c:4497 config/tc-d30v.c:2082 +#: config/tc-alpha.c:5068 config/tc-d30v.c:2060 msgid "Alignment negative: 0 assumed" -msgstr "Alignement négatif: 0 assumé" +msgstr "Alignement négatif: 0 assumé" -#: config/tc-alpha.c:4775 +#: config/tc-alpha.c:5162 config/tc-alpha.c:5655 +#, c-format +msgid "Unknown CPU identifier `%s'" +msgstr "Identificateur de CPU inconnu « %s »" + +#: config/tc-alpha.c:5353 #, c-format msgid "Chose GP value of %lx\n" -msgstr "Choisir une valeur GP de %lx\n" +msgstr "Valeur GP choisie: %lx\n" -#: config/tc-alpha.c:4789 -msgid "Bad .section directive: want a,s,w,x,M,S,G,T in string" -msgstr "Directive .section erronée: nécessite a,s,w,x,M,S,G,T dans la chaîne" +#: config/tc-alpha.c:5367 +msgid "bad .section directive: want a,s,w,x,M,S,G,T in string" +msgstr "mauvaise directive .section: nécessite a,s,w,x,M,S,G,T dans la chaîne" -#: config/tc-alpha.c:4878 +#: config/tc-alpha.c:5456 #, c-format msgid "internal error: can't hash opcode `%s': %s" -msgstr "" -"erreur interne: ne peut insérer dans la table de hachage le opcode « %s »: %s" +msgstr "erreur interne: l'opcode « %s » ne peut être hashé: %s" -#: config/tc-alpha.c:4914 +#: config/tc-alpha.c:5492 #, c-format msgid "internal error: can't hash macro `%s': %s" -msgstr "" -"erreur interne: ne peut insérer dans la table de hachage la macro « %s »: %s" +msgstr "erreur interne: la macro « %s » ne peut être hashé: %s" -#: config/tc-alpha.c:4998 config/tc-arm.c:6059 config/tc-arm.c:6071 -#: config/tc-i960.c:708 config/tc-xtensa.c:5177 config/tc-xtensa.c:5255 -#: config/tc-xtensa.c:5301 config/tc-z80.c:1893 +#: config/tc-alpha.c:5577 config/tc-arm.c:6588 config/tc-arm.c:6600 +#: config/tc-i960.c:708 config/tc-xtensa.c:5315 config/tc-xtensa.c:5393 +#: config/tc-xtensa.c:5510 config/tc-z80.c:1888 msgid "syntax error" msgstr "erreur de syntaxe" -#: config/tc-alpha.c:5067 config/tc-h8300.c:2053 config/tc-hppa.c:1381 -#: config/tc-i860.c:1057 config/tc-m68hc11.c:560 config/tc-m68k.c:4728 -#: config/tc-ns32k.c:1943 config/tc-or32.c:580 config/tc-sparc.c:2998 -#: config/tc-spu.c:744 config/tc-z8k.c:1332 -msgid "Bad call to MD_ATOF()" -msgstr "Appel erroné de MD_ATOF()" - -#: config/tc-alpha.c:5116 -#, c-format -msgid "Unknown CPU identifier `%s'" -msgstr "identificateur de CPU inconnu « %s »" - -#: config/tc-alpha.c:5159 +#: config/tc-alpha.c:5706 msgid "" "Alpha options:\n" "-32addr\t\t\ttreat addresses as 32-bit values\n" "-F\t\t\tlack floating point instructions support\n" "-mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n" "\t\t\tspecify variant of Alpha architecture\n" -"-m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | " -"-m21264b\n" +"-m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n" "\t\t\tthese variants include PALcode opcodes\n" msgstr "" "Options pour Alpha:\n" -"-32addr traiter les addresses comme des valeurs de 32 bits\n" -"-F suppléer le manque de soutien des instructions en " -"virgule flottante\n" +"-32addr traiter les adresses comme des valeurs de 32 bits\n" +"-F manque de soutien des instructions en virgule flottante\n" "-mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n" -" spécifier le type d'architecture Alpha\n" -"-m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m 21264a | " -"-m21264b\n" -" inclure les opcode PAL des variantes d'architecture\n" +" spécifier la variante d'architecture Alpha\n" +"-m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m 21264a | -m21264b\n" +" ces variantes contiennent les opcodes PALcode\n" -#: config/tc-alpha.c:5169 +#: config/tc-alpha.c:5716 msgid "" "VMS options:\n" -"-+\t\t\thash encode (don't truncate) names longer than 64 characters\n" +"-+\t\t\tencode (don't truncate) names longer than 64 characters\n" "-H\t\t\tshow new symbol after hash truncation\n" +"-replace/-noreplace\tenable or disable the optimization of procedure calls\n" msgstr "" -"-+ encoder par hachage (sans tronquer) les noms plus " -"longs que 64 caractères\n" -"-H afficher les nouveaux symboles après une troncation " -"du hachage\n" +"Options VMS:\n" +"-+\t\t\tencoder (sans tronquer) les noms plus longs que 64 caractères\n" +"-H\t\t\tafficher les nouveaux symboles après une troncation du hachage\n" +"-replace/-noreplace\tactiver ou non l'optimisation des appels de procédure\n" -#: config/tc-alpha.c:5346 +#: config/tc-alpha.c:5967 #, c-format msgid "unhandled relocation type %s" -msgstr "type de relocalisation non traité %s" +msgstr "type de réadressage non traité %s" -#: config/tc-alpha.c:5359 +#: config/tc-alpha.c:5980 msgid "non-absolute expression in constant field" msgstr "expression non absolue dams le champ de constante" -#: config/tc-alpha.c:5373 +#: config/tc-alpha.c:5994 #, c-format msgid "type %d reloc done?\n" -msgstr "type %d relocalisation complété?\n" +msgstr "type de réadressage %d fait ?\n" -#: config/tc-alpha.c:5420 config/tc-alpha.c:5427 +#: config/tc-alpha.c:6041 config/tc-alpha.c:6048 msgid "Used $at without \".set noat\"" msgstr "Utilisation de $at sans \".set noat\"" -#: config/tc-alpha.c:5589 +#: config/tc-alpha.c:6217 #, c-format msgid "!samegp reloc against symbol without .prologue: %s" -msgstr "relocalisation !samgp vers le symbole sans .prologue: %s" +msgstr "réadressage !samgp vers le symbole sans .prologue: %s" -#: config/tc-alpha.c:5626 config/tc-xtensa.c:5811 +#: config/tc-alpha.c:6261 config/tc-xtensa.c:5999 #, c-format msgid "cannot represent `%s' relocation in object file" -msgstr "ne peut représenter la relocalisation « %s » dans le fichier objet" +msgstr "ne peut représenter le réadressage « %s » dans le fichier objet" -#: config/tc-alpha.c:5632 config/tc-xtensa.c:5819 +#: config/tc-alpha.c:6267 #, c-format msgid "internal error? cannot generate `%s' relocation" -msgstr "erreur interne? ne peut générer la relocalisation « %s »" +msgstr "erreur interne ? ne peut générer le réadressage « %s »" -#: config/tc-alpha.c:5683 +#: config/tc-alpha.c:6363 #, c-format msgid "frame reg expected, using $%d." msgstr "registre de trame attendu, utilise $%d" -#: config/tc-arc.c:1076 config/tc-ip2k.c:249 config/tc-mt.c:348 -msgid "md_estimate_size_before_relax\n" -msgstr "md_estimate_size_before_relax\n" +#: config/tc-arc.c:194 config/tc-arc.c:215 config/tc-arc.c:992 +#: config/tc-h8300.c:77 config/tc-h8300.c:86 config/tc-h8300.c:96 +#: config/tc-h8300.c:106 config/tc-h8300.c:116 config/tc-h8300.c:127 +#: config/tc-h8300.c:244 config/tc-hppa.c:6866 config/tc-hppa.c:6872 +#: config/tc-hppa.c:6878 config/tc-hppa.c:6884 config/tc-hppa.c:8291 +#: config/tc-lm32.c:198 config/tc-mn10300.c:937 config/tc-mn10300.c:942 +#: config/tc-mn10300.c:2433 config/tc-xc16x.c:79 config/tc-xc16x.c:86 +#: config/tc-xc16x.c:93 +msgid "could not set architecture and machine" +msgstr "ne peut initialiser l'architecture et la machine" + +#: config/tc-arc.c:212 config/tc-arm.c:22001 config/tc-score.c:6303 +#: config/tc-score.c:6532 config/tc-score.c:6537 +msgid "virtual memory exhausted" +msgstr "mémoire virtuelle épuisée" + +#: config/tc-arc.c:432 config/tc-arc.c:671 +msgid "expected comma after operand name" +msgstr "virgule attendue après le nom de l'opérande" + +#: config/tc-arc.c:443 +#, c-format +msgid "negative operand number %d" +msgstr "numéro d'opérande négatif %d" + +#: config/tc-arc.c:455 +msgid "expected comma after register-number" +msgstr "virgule attendue après register-number" + +#: config/tc-arc.c:480 +msgid "invalid mode" +msgstr "mode invalide" + +#: config/tc-arc.c:497 +msgid "expected comma after register-mode" +msgstr "virgule attendue après register-mode" + +#: config/tc-arc.c:514 +msgid "shortcut designator invalid" +msgstr "indicateur de raccourci invalide" + +#: config/tc-arc.c:529 +#, c-format +msgid "core register value (%d) too large" +msgstr "valeur de registre coeur (%d) trop grande" + +#: config/tc-arc.c:537 +#, c-format +msgid "condition code value (%d) too large" +msgstr "valeur du code de condition (%d) trop grande" + +#: config/tc-arc.c:555 +#, c-format +msgid "attempt to override symbol: %s" +msgstr "tentative de contourner le symbole: %s" + +#: config/tc-arc.c:626 +msgid "invalid opertype" +msgstr "opertype invalide" + +#: config/tc-arc.c:683 +msgid "expected comma after opcode" +msgstr "virgule attendue après l'opcode" + +#: config/tc-arc.c:693 +#, c-format +msgid "negative subopcode %d" +msgstr "sous-opcode négatif %d" + +#: config/tc-arc.c:702 +msgid "subcode value found when opcode not equal 0x03" +msgstr "valeur de sous-code trouvée alors que l'opcode n'est pas égal à 0x03" + +#: config/tc-arc.c:710 +#, c-format +msgid "invalid subopcode %d" +msgstr "sous-opcode invalide %d" + +#: config/tc-arc.c:721 +msgid "expected comma after subopcode" +msgstr "virgule attendue après le sous-opcode" + +#: config/tc-arc.c:740 +msgid "invalid suffix class" +msgstr "classe de suffixe invalide" + +#: config/tc-arc.c:749 +msgid "expected comma after suffix class" +msgstr "virgule attendue après la classe de suffixe" + +#: config/tc-arc.c:768 +msgid "invalid syntax class" +msgstr "syntaxe de classe invalide" + +#: config/tc-arc.c:775 +msgid "opcode 0x3 and SYNTAX_3OP invalid" +msgstr "opcode 0x3 et SYNTAX_3OP invalides" + +#: config/tc-arc.c:795 +msgid "unknown suffix class" +msgstr "classe de suffix inconnu" + +#: config/tc-arc.c:862 +msgid "expected comma after symbol name" +msgstr "virgule attendue après le nom de symbole" + +#: config/tc-arc.c:872 +msgid "negative symbol length" +msgstr "longueur de symbole négative" + +#: config/tc-arc.c:883 +msgid "ignoring attempt to re-define symbol" +msgstr "ignore la tentative de redéfinition du symbole" + +#: config/tc-arc.c:890 +#, c-format +msgid "length of symbol \"%s\" already %ld, ignoring %d" +msgstr "longueur du symbole « %s » est déjà %ld, ignore %d" + +#: config/tc-arc.c:904 +msgid "assuming symbol alignment of zero" +msgstr "suppose un alignement de symbole nul" + +#: config/tc-arc.c:971 +msgid "\".option\" directive must appear before any instructions" +msgstr "la directive « .option » doit apparaître avant toute instruction" + +#: config/tc-arc.c:981 +msgid "\".option\" directive conflicts with initial definition" +msgstr "la directive « .option » entre en conflit avec la définition initiale" + +#: config/tc-arc.c:989 +msgid "\".option\" directive overrides command-line (default) value" +msgstr "la directive « .option » passe outre la valeur (par défaut) de la ligne de commande" + +#: config/tc-arc.c:999 +msgid "invalid identifier for \".option\"" +msgstr "identificateur invalide pour « .option »" + +#: config/tc-arc.c:1037 config/tc-i860.c:1035 config/tc-ip2k.c:249 +msgid "relaxation not supported\n" +msgstr "relaxation non supportée\n" + +#: config/tc-arc.c:1081 +msgid "expression too complex code symbol" +msgstr "symbole de code trop complexe dans l'expression" + +#: config/tc-arc.c:1108 +#, c-format +msgid "missing ')' in %%-op" +msgstr "« ) » manquant dans %%-op" + +#: config/tc-arc.c:1364 config/tc-dlx.c:1201 config/tc-i960.c:2639 +#: config/tc-m32r.c:2281 config/tc-sparc.c:3508 +#, c-format +msgid "internal error: can't export reloc type %d (`%s')" +msgstr "erreur interne: ne peut exporter le type de réadressage %d (« %s »)" + +#: config/tc-arc.c:1496 +#, c-format +msgid "unknown syntax format character `%c'" +msgstr "syntaxe inconnue de format de caractère « %c »" + +#: config/tc-arc.c:1635 +msgid "too many suffixes" +msgstr "trop de suffixes" + +#: config/tc-arc.c:1674 +msgid "symbol as destination register" +msgstr "symbole en tant que registre de destination" + +#. xgettext:c-format. +#: config/tc-arc.c:1759 config/tc-i370.c:2207 config/tc-mn10200.c:1141 +#: config/tc-mn10300.c:1820 config/tc-ppc.c:2939 config/tc-s390.c:1465 +#: config/tc-v850.c:2699 +#, c-format +msgid "junk at end of line: `%s'" +msgstr "rebut à la fin de la ligne: « %s »" + +#: config/tc-arc.c:1798 +msgid "8 byte instruction in delay slot" +msgstr "instruction 8 byte dans la plage de délai" -#: config/tc-arc.c:1087 -msgid "md_convert_frag\n" -msgstr "md_convert_frag\n" +#. except for jl addr +#: config/tc-arc.c:1801 +msgid "8 byte jump instruction with delay slot" +msgstr "instruction de saut 8 byte avec une plage de délai" -#: config/tc-arm.c:483 +#: config/tc-arc.c:1809 +msgid "conditional branch follows set of flags" +msgstr "un branchement conditionnel suit un ensemble de fanions" + +#: config/tc-arc.c:1893 config/tc-arm.c:15965 +#, c-format +msgid "bad instruction `%s'" +msgstr "instruction « %s » erronée" + +#: config/tc-arm.c:529 msgid "ARM register expected" msgstr "registre ARM attendu" -#: config/tc-arm.c:484 +#: config/tc-arm.c:530 msgid "bad or missing co-processor number" -msgstr "numéro de co-processeur erroné ou manquant" +msgstr "numéro de co-processeur erroné ou manquant" -#: config/tc-arm.c:485 +#: config/tc-arm.c:531 msgid "co-processor register expected" msgstr "registre de coprocesseur attendu" -#: config/tc-arm.c:486 +#: config/tc-arm.c:532 msgid "FPA register expected" msgstr "registre FPA attendu" -#: config/tc-arm.c:487 +#: config/tc-arm.c:533 msgid "VFP single precision register expected" -msgstr "registre VFP en simple précision attendu" +msgstr "registre VFP en simple précision attendu" -#: config/tc-arm.c:488 -#, fuzzy +#: config/tc-arm.c:534 msgid "VFP/Neon double precision register expected" -msgstr "registre VFP en double précision attendu" +msgstr "registre VFP/Neon en double précision attendu" -#: config/tc-arm.c:489 -#, fuzzy +#: config/tc-arm.c:535 msgid "Neon quad precision register expected" -msgstr "registre VFP en double précision attendu" +msgstr "registre Neon en quadruple précision attendu" -#: config/tc-arm.c:490 -#, fuzzy +#: config/tc-arm.c:536 msgid "VFP single or double precision register expected" -msgstr "registre VFP en simple précision attendu" +msgstr "registre VFP en simple ou double précision attendu" -#: config/tc-arm.c:491 -#, fuzzy +#: config/tc-arm.c:537 msgid "Neon double or quad precision register expected" -msgstr "registre VFP en double précision attendu" +msgstr "registre Neon en double ou quadruple précision attendu" -#: config/tc-arm.c:492 -#, fuzzy +#: config/tc-arm.c:538 msgid "VFP single, double or Neon quad precision register expected" -msgstr "registre VFP en simple précision attendu" +msgstr "registre VFP en simple, double ou Neon en quadruple précision attendu" -#: config/tc-arm.c:493 +#: config/tc-arm.c:539 msgid "VFP system register expected" -msgstr "registre système VFP attendu" +msgstr "registre système VFP attendu" -#: config/tc-arm.c:494 +#: config/tc-arm.c:540 msgid "Maverick MVF register expected" msgstr "registre Maverick MVF attendu" -#: config/tc-arm.c:495 +#: config/tc-arm.c:541 msgid "Maverick MVD register expected" msgstr "registre Maverick MVD attendu" -#: config/tc-arm.c:496 +#: config/tc-arm.c:542 msgid "Maverick MVFX register expected" msgstr "registre Maverick MVFX attendu" -#: config/tc-arm.c:497 -#, fuzzy +#: config/tc-arm.c:543 msgid "Maverick MVDX register expected" -msgstr "registre Maverick MVD attendu" +msgstr "registre Maverick MVDX attendu" -#: config/tc-arm.c:498 +#: config/tc-arm.c:544 msgid "Maverick MVAX register expected" msgstr "registre Maverick MVAX attendu" -#: config/tc-arm.c:499 +#: config/tc-arm.c:545 msgid "Maverick DSPSC register expected" msgstr "registre Maverick DSPSC attendu" -#: config/tc-arm.c:500 -#, fuzzy +#: config/tc-arm.c:546 msgid "iWMMXt data register expected" -msgstr "registre ARM attendu" +msgstr "registre de donnée iWMMXt attendu" -#: config/tc-arm.c:501 config/tc-arm.c:5868 -#, fuzzy +#: config/tc-arm.c:547 config/tc-arm.c:6363 msgid "iWMMXt control register expected" -msgstr "registre en virgule flottante attendu" +msgstr "registre de contrôle iWMMXt attendu" -#: config/tc-arm.c:502 -#, fuzzy +#: config/tc-arm.c:548 msgid "iWMMXt scalar register expected" -msgstr "registre ARM attendu" +msgstr "registre scalaire iWMMXt attendu" -#: config/tc-arm.c:503 -#, fuzzy +#: config/tc-arm.c:549 msgid "XScale accumulator register expected" -msgstr "Registre accumulateur invalide." +msgstr "registre accumulateur XScale invalide" #. For score5u : div/mul will pop warning message, mmu/alw/asw will pop error message. -#: config/tc-arm.c:652 config/tc-score.c:47 +#: config/tc-arm.c:698 config/tc-score.c:259 msgid "bad arguments to instruction" -msgstr "arguments erronés pour l'instruction" +msgstr "arguments erronés pour l'instruction" -#: config/tc-arm.c:653 config/tc-score.c:48 +#: config/tc-arm.c:699 +msgid "r13 not allowed here" +msgstr "r13 n'est pas permis ici" + +#: config/tc-arm.c:700 msgid "r15 not allowed here" msgstr "r15 n'est pas permis ici" -#: config/tc-arm.c:654 -#, fuzzy +#: config/tc-arm.c:701 msgid "instruction cannot be conditional" -msgstr "l'instruction n'est pas conditionnelle" +msgstr "l'instruction ne peut pas être conditionnelle" -#: config/tc-arm.c:655 -#, fuzzy +#: config/tc-arm.c:702 msgid "registers may not be the same" -msgstr "registre r0 ne peut être utilisé ici" +msgstr "les registres ne peuvent pas être les mêmes" -#: config/tc-arm.c:656 +#: config/tc-arm.c:703 msgid "lo register required" msgstr "registre LO requis" -#: config/tc-arm.c:657 -#, fuzzy +#: config/tc-arm.c:704 msgid "instruction not supported in Thumb16 mode" -msgstr "relocalisation @%s n'est pas supporté en mode %s bits" +msgstr "instruction pas supportée en mode Thumb16" -#: config/tc-arm.c:658 +#: config/tc-arm.c:705 msgid "instruction does not accept this addressing mode" -msgstr "" +msgstr "l'instruction n'accepte pas ce mode d'adressage" -#: config/tc-arm.c:659 +#: config/tc-arm.c:706 msgid "branch must be last instruction in IT block" -msgstr "" +msgstr "le branchement doit être la dernière instruction du bloc IT" -#: config/tc-arm.c:660 -#, fuzzy +#: config/tc-arm.c:707 msgid "instruction not allowed in IT block" -msgstr "instruction non permise: %s" +msgstr "instruction non permise dans un bloc IT" -#: config/tc-arm.c:661 -#, fuzzy +#: config/tc-arm.c:708 msgid "selected FPU does not support instruction" -msgstr "Le processeur cible ne supporte pas cette instruction" +msgstr "le FPU choisi ne supporte pas l'instruction" + +#: config/tc-arm.c:709 +msgid "thumb conditional instruction should be in IT block" +msgstr "l'instruction conditionnelle thumb devrait être dans le bloc IT" + +#: config/tc-arm.c:710 +msgid "incorrect condition in IT block" +msgstr "condition incorrect dans le bloc IT" -#: config/tc-arm.c:803 -#, fuzzy +#: config/tc-arm.c:711 +msgid "IT falling in the range of a previous IT block" +msgstr "IT atterri dans la plage d'un bloc IT précédent" + +#: config/tc-arm.c:712 +msgid "missing .fnstart before unwinding directive" +msgstr ".fnstart manquant avant la directive de déroulement" + +#: config/tc-arm.c:714 +msgid "cannot use register index with PC-relative addressing" +msgstr "ne peut pas utiliser un index de registre avec un adressage relatif au PC" + +#: config/tc-arm.c:716 +msgid "cannot use writeback with PC-relative addressing" +msgstr "la réécriture ne peut pas être utilisée avec un adressage relatif au PC" + +#: config/tc-arm.c:907 msgid "immediate expression requires a # prefix" -msgstr "expression immédiate attendue" +msgstr "préfixe # attendu avec une expression immédiate" + +#: config/tc-arm.c:935 read.c:3678 +msgid "missing expression" +msgstr "expression manquante" -#: config/tc-arm.c:830 config/tc-score.c:5675 expr.c:1300 read.c:2439 +#: config/tc-arm.c:935 config/tc-score.c:6519 expr.c:1358 read.c:2469 msgid "bad expression" -msgstr "expression erronée" +msgstr "expression erronée" -#: config/tc-arm.c:841 config/tc-i860.c:1003 config/tc-sparc.c:2898 +#: config/tc-arm.c:946 config/tc-i860.c:1004 config/tc-sparc.c:2880 msgid "bad segment" -msgstr "segment erroné" +msgstr "segment erroné" -#: config/tc-arm.c:858 config/tc-arm.c:4393 config/tc-i960.c:1300 -#: config/tc-score.c:985 +#: config/tc-arm.c:965 config/tc-arm.c:4809 config/tc-i960.c:1300 +#: config/tc-score.c:1211 msgid "invalid constant" msgstr "constante invalide" -#: config/tc-arm.c:919 config/tc-score.c:4749 -msgid "bad call to MD_ATOF()" -msgstr "appel erroné de MD_ATOF()" - -#: config/tc-arm.c:986 -#, fuzzy +#: config/tc-arm.c:1095 msgid "expected #constant" -msgstr " attendu" +msgstr "#constante attendu" -#: config/tc-arm.c:1147 -#, fuzzy, c-format +#: config/tc-arm.c:1256 +#, c-format msgid "unexpected character `%c' in type specifier" -msgstr "virgule attendue après le nom « %s » dans la directive .size" +msgstr "caractère « %c » inattendu dans le spécificateur de type" -#: config/tc-arm.c:1164 -#, fuzzy, c-format +#: config/tc-arm.c:1273 +#, c-format msgid "bad size %d in type specifier" -msgstr "spécificateur psr erroné/manquant" +msgstr "mauvaise taille %d dans le spécifieur de type" -#: config/tc-arm.c:1214 +#: config/tc-arm.c:1323 msgid "only one type should be specified for operand" -msgstr "" +msgstr "un type seulement devrait être spécifié pour l'opérande" -#: config/tc-arm.c:1220 -#, fuzzy +#: config/tc-arm.c:1329 msgid "vector type expected" -msgstr "Nom de registre attendu" +msgstr "type vectoriel attendu" -#: config/tc-arm.c:1292 -#, fuzzy +#: config/tc-arm.c:1401 msgid "can't redefine type for operand" -msgstr "ne peut trouver le opcode pour concorder avec les opérandes" +msgstr "le type ne peut pas être redéfini pour un opérande" -#: config/tc-arm.c:1303 +#: config/tc-arm.c:1412 msgid "only D registers may be indexed" -msgstr "" +msgstr "seulement les registres D peuvent être indexés" -#: config/tc-arm.c:1309 -#, fuzzy +#: config/tc-arm.c:1418 msgid "can't change index for operand" -msgstr "opcode ou opérandes erronés" +msgstr "l'index de l'opérande ne peut pas être changé" -#: config/tc-arm.c:1325 config/tc-arm.c:3994 -#, fuzzy +#: config/tc-arm.c:1434 config/tc-arm.c:3318 config/tc-arm.c:4391 msgid "constant expression required" -msgstr "expression de constante attendue" +msgstr "expression constante attendue" -#: config/tc-arm.c:1369 -#, fuzzy +#: config/tc-arm.c:1477 msgid "register operand expected, but got scalar" -msgstr "registre attendu, mais a eu '%.6s'" +msgstr "opérande de registre attendu mais on a trouvé un scalaire" -#: config/tc-arm.c:1402 +#: config/tc-arm.c:1510 msgid "scalar must have an index" -msgstr "" +msgstr "le scalaire doit avoir un indexe" -#: config/tc-arm.c:1407 config/tc-arm.c:13144 config/tc-arm.c:13192 -#: config/tc-arm.c:13594 -#, fuzzy +#: config/tc-arm.c:1515 config/tc-arm.c:14574 config/tc-arm.c:14624 +#: config/tc-arm.c:15039 msgid "scalar index out of range" -msgstr "valeur hors limite" +msgstr "index scalaire hors limite" -#: config/tc-arm.c:1454 +#: config/tc-arm.c:1563 msgid "bad range in register list" -msgstr "hors limite dans la liste de registres" +msgstr "mauvaise limite dans la liste des registres" -#: config/tc-arm.c:1462 config/tc-arm.c:1471 config/tc-arm.c:1512 +#: config/tc-arm.c:1571 config/tc-arm.c:1580 config/tc-arm.c:1621 #, c-format msgid "Warning: duplicated register (r%d) in register list" -msgstr "" -"AVERTISSEMENT: duplication de registre (r%d) dans la liste des registres" +msgstr "Attention: registre en double (r%d) dans la liste des registres" -#: config/tc-arm.c:1474 +#: config/tc-arm.c:1583 msgid "Warning: register range not in ascending order" -msgstr "AVERTISSEMENT: gamme de registres n'est pas en ordre ascendant" +msgstr "Attention: gamme de registres n'est pas en ordre croissant" -#: config/tc-arm.c:1485 +#: config/tc-arm.c:1594 msgid "missing `}'" -msgstr "« } » manquant" +msgstr "« } » manquant" -#: config/tc-arm.c:1501 +#: config/tc-arm.c:1610 msgid "invalid register mask" msgstr "masque de registre invalide" -#: config/tc-arm.c:1583 -#, fuzzy +#: config/tc-arm.c:1692 msgid "expecting {" -msgstr ") attendu" +msgstr "{ attendu" -#: config/tc-arm.c:1638 config/tc-arm.c:1682 -#, fuzzy +#: config/tc-arm.c:1747 config/tc-arm.c:1791 msgid "register out of range in list" -msgstr "registre hors limite" +msgstr "registre hors limite dans la liste" -#: config/tc-arm.c:1654 config/tc-arm.c:1699 config/tc-h8300.c:989 -#: config/tc-mips.c:10172 config/tc-mips.c:10194 +#: config/tc-arm.c:1763 config/tc-arm.c:1808 config/tc-h8300.c:1040 +#: config/tc-mips.c:10575 config/tc-mips.c:10597 msgid "invalid register list" msgstr "liste de registres invalide" -#: config/tc-arm.c:1660 config/tc-arm.c:3459 config/tc-arm.c:3592 +#: config/tc-arm.c:1769 config/tc-arm.c:3832 config/tc-arm.c:3965 msgid "register list not in ascending order" -msgstr "liste de registres n'est pas en ordre ascendant" +msgstr "liste de registres n'est pas en ordre croissant" -#: config/tc-arm.c:1691 +#: config/tc-arm.c:1800 msgid "register range not in ascending order" -msgstr "gamme de registres n'est pas en ordre ascendant" +msgstr "gamme de registres n'est pas en ordre croissant" -#: config/tc-arm.c:1724 +#: config/tc-arm.c:1833 msgid "non-contiguous register range" -msgstr "game de registres non contiguë" +msgstr "game de registres non contiguë" -#: config/tc-arm.c:1850 +#: config/tc-arm.c:1892 +msgid "register stride must be 1 or 2" +msgstr "pas des registres doit être 1 ou 2" + +#: config/tc-arm.c:1893 +msgid "mismatched element/structure types in list" +msgstr "types d'élément/structure en désaccord dans la liste" + +#: config/tc-arm.c:1957 msgid "don't use Rn-Rm syntax with non-unit stride" -msgstr "" +msgstr "n'utilisez pas la syntaxe Rn-Rm avec un pas non unitaire" -#: config/tc-arm.c:1905 +#: config/tc-arm.c:2012 msgid "error parsing element/structure list" -msgstr "" +msgstr "erreur lors de l'analyse de la liste élément/structure" -#: config/tc-arm.c:1911 -#, fuzzy +#: config/tc-arm.c:2018 msgid "expected }" -msgstr "%c attendu" +msgstr "} attendu" -#: config/tc-arm.c:1967 -#, fuzzy, c-format +#: config/tc-arm.c:2075 +#, c-format msgid "ignoring attempt to redefine built-in register '%s'" -msgstr "Tentative ignorée de re-définition du symbole « %s »." +msgstr "ignore la tentative de redéfinir le registre intégré « %s »" -#: config/tc-arm.c:1972 +#: config/tc-arm.c:2080 #, c-format msgid "ignoring redefinition of register alias '%s'" -msgstr "a ignoré la redéfinition de l'alias du registre « %s »" +msgstr "ignore la redéfinition de l'alias du registre « %s »" -#: config/tc-arm.c:2000 -#, fuzzy +#: config/tc-arm.c:2108 msgid "attempt to redefine typed alias" -msgstr "tentative de redéfinition de symbole" +msgstr "tentative de redéfinition de l'alias typé" -#: config/tc-arm.c:2038 -#, fuzzy, c-format +#: config/tc-arm.c:2147 +#, c-format msgid "unknown register '%s' -- .req ignored" -msgstr "échappement inconnu « \\%c » dans la chaîne; ignoré" +msgstr "registre « %s » inconnu -- .req ignoré" -#: config/tc-arm.c:2134 -#, fuzzy +#: config/tc-arm.c:2242 msgid "bad type for register" -msgstr "# registre bars" +msgstr "mauvais type pour le registre" -#: config/tc-arm.c:2145 -#, fuzzy +#: config/tc-arm.c:2253 msgid "expression must be constant" -msgstr "l'opérande doit être une constante" +msgstr "l'expression doit être une constante" -#: config/tc-arm.c:2162 -#, fuzzy +#: config/tc-arm.c:2270 msgid "can't redefine the type of a register alias" -msgstr "Ne peut utiliser l'adresse d'un registre." +msgstr "le type d'un alias de registre ne peut pas être redéfini" -#: config/tc-arm.c:2169 +#: config/tc-arm.c:2277 msgid "you must specify a single type only" -msgstr "" +msgstr "vous ne pouvez spécifier qu'un type unique" -#: config/tc-arm.c:2182 +#: config/tc-arm.c:2290 msgid "can't redefine the index of a scalar alias" -msgstr "" +msgstr "l'indexe d'un alias scalaire ne peut pas être redéfini" -#: config/tc-arm.c:2190 -#, fuzzy +#: config/tc-arm.c:2298 msgid "scalar index must be constant" -msgstr "l'opérande doit être une constante" +msgstr "l'indexe scalaire doit être constant" -#: config/tc-arm.c:2199 -#, fuzzy +#: config/tc-arm.c:2307 msgid "expecting ]" -msgstr ") attendu" +msgstr "] attendu" -#: config/tc-arm.c:2236 +#: config/tc-arm.c:2354 msgid "invalid syntax for .req directive" msgstr "syntaxe invalide pour le directive .req" -#: config/tc-arm.c:2242 -#, fuzzy +#: config/tc-arm.c:2360 msgid "invalid syntax for .dn directive" -msgstr "syntaxe invalide pour le directive .req" +msgstr "syntaxe invalide pour le directive .dn" -#: config/tc-arm.c:2248 -#, fuzzy +#: config/tc-arm.c:2366 msgid "invalid syntax for .qn directive" -msgstr "syntaxe invalide pour le directive .req" +msgstr "syntaxe invalide pour le directive .qn" -#: config/tc-arm.c:2274 -#, fuzzy +#: config/tc-arm.c:2392 msgid "invalid syntax for .unreq directive" -msgstr "syntaxe invalide pour le directive .req" +msgstr "syntaxe invalide pour le directive .unreq" -#: config/tc-arm.c:2280 -#, fuzzy, c-format +#: config/tc-arm.c:2399 +#, c-format msgid "unknown register alias '%s'" -msgstr "instruction inconnue « %s »" +msgstr "alias de registre « %s » inconnu" -#: config/tc-arm.c:2282 -#, fuzzy, c-format +#: config/tc-arm.c:2401 +#, c-format msgid "ignoring attempt to undefine built-in register '%s'" -msgstr "a ignoré la redéfinition de l'alias du registre « %s »" +msgstr "ignore la tentative d'annuler la définition du registre intégré « %s »" + +#: config/tc-arm.c:2652 +#, c-format +msgid "Failed to find real start of function: %s\n" +msgstr "impossible de trouver le début réel de la fonction: %s\n" -#: config/tc-arm.c:2449 +#: config/tc-arm.c:2669 msgid "selected processor does not support THUMB opcodes" -msgstr "le processeur choisi ne supporte pas les opcode THUMB" +msgstr "le processeur choisi ne supporte pas les opcodes THUMB" -#: config/tc-arm.c:2463 +#: config/tc-arm.c:2682 msgid "selected processor does not support ARM opcodes" -msgstr "le processeur choisi ne supporte pas les opcode ARM" +msgstr "le processeur choisi ne supporte pas les opcodes ARM" -#: config/tc-arm.c:2476 +#: config/tc-arm.c:2694 #, c-format msgid "invalid instruction size selected (%d)" -msgstr "taille d'instruction invalide (%d)" +msgstr "taille d'instruction choisie invalide (%d)" -#: config/tc-arm.c:2508 +#: config/tc-arm.c:2726 #, c-format msgid "invalid operand to .code directive (%d) (expecting 16 or 32)" -msgstr "opérande invalide pour la directive .code (%d) (attendu 16 ou 32)" +msgstr "opérande invalide pour la directive .code (%d) (attendu 16 ou 32)" -#: config/tc-arm.c:2564 +#: config/tc-arm.c:2782 #, c-format msgid "expected comma after name \"%s\"" -msgstr "virgule attendue après le nom « %s »" +msgstr "virgule attendue après le nom « %s »" -#: config/tc-arm.c:2614 config/tc-m32r.c:588 +#: config/tc-arm.c:2832 config/tc-m32r.c:588 #, c-format msgid "symbol `%s' already defined" -msgstr "symbole « %s » est déjà défini" +msgstr "symbole « %s » déjà défini" -#: config/tc-arm.c:2648 -#, fuzzy, c-format +#: config/tc-arm.c:2866 +#, c-format msgid "unrecognized syntax mode \"%s\"" -msgstr "type de symbole non reconnu « %s »" +msgstr "mode de syntaxe « %s » non reconnu" -#: config/tc-arm.c:2669 +#: config/tc-arm.c:2887 #, c-format msgid "alignment too large: %d assumed" -msgstr "alignement trop grand: %d assumé" +msgstr "alignement trop grand: %d assumé" -#: config/tc-arm.c:2672 +#: config/tc-arm.c:2890 msgid "alignment negative. 0 assumed." -msgstr "alignement négatif: 0 assumé" +msgstr "alignement négatif: 0 assumé." -#: config/tc-arm.c:2819 +#: config/tc-arm.c:3040 msgid "literal pool overflow" -msgstr "débordement du bassin de mots" +msgstr "débordement du pool de littéraux" -#: config/tc-arm.c:2975 config/tc-arm.c:5803 -#, fuzzy +#: config/tc-arm.c:3196 config/tc-arm.c:6298 msgid "unrecognized relocation suffix" -msgstr "option « %s » non reconnue" +msgstr "suffixe de réadressage non reconnu" -#: config/tc-arm.c:2988 +#: config/tc-arm.c:3211 msgid "(plt) is only valid on branch targets" -msgstr "" +msgstr "(plt) est seulement valable dans des cibles de branchements" -#: config/tc-arm.c:2994 config/tc-s390.c:1129 config/tc-s390.c:1743 -#: config/tc-xtensa.c:1546 +#: config/tc-arm.c:3217 config/tc-s390.c:1107 config/tc-s390.c:1730 +#: config/tc-xtensa.c:1591 #, c-format msgid "%s relocations do not fit in %d bytes" -msgstr "relocalisations %s n'entre pas dans %d octets" +msgstr "réadressages %s n'entre pas dans %d octets" -#: config/tc-arm.c:3042 dwarf2dbg.c:694 -#, fuzzy +#: config/tc-arm.c:3294 +msgid ".inst.n operand too big. Use .inst.w instead" +msgstr "opérande .inst.n trop grand. Utilisez plutôt .inst.w" + +#: config/tc-arm.c:3314 +msgid "cannot determine Thumb instruction size. Use .inst.n/.inst.w instead" +msgstr "impossible de déterminer la taille de l'instruction Thumb. Utilisez plutôt .inst.n/.inst.w" + +#: config/tc-arm.c:3344 +msgid "width suffixes are invalid in ARM mode" +msgstr "les suffixes de largeurs sont invalides en mode ARM" + +#: config/tc-arm.c:3386 dwarf2dbg.c:707 msgid "expected 0 or 1" -msgstr "%c attendu" +msgstr "0 ou 1 attendu" -#: config/tc-arm.c:3046 -#, fuzzy +#: config/tc-arm.c:3390 msgid "missing comma" -msgstr "« do » manquant" +msgstr "virgule manquante" -#: config/tc-arm.c:3101 -#, fuzzy +#: config/tc-arm.c:3423 +msgid "duplicate .fnstart directive" +msgstr "directive .fnstart en double" + +#: config/tc-arm.c:3454 msgid "duplicate .handlerdata directive" -msgstr "directive end non pairée" +msgstr "directive .handlerdata en double" + +#: config/tc-arm.c:3473 +msgid ".fnend directive without .fnstart" +msgstr "directive .fnend sans .fnstart" -#: config/tc-arm.c:3172 +#: config/tc-arm.c:3539 msgid "personality routine specified for cantunwind frame" -msgstr "" +msgstr "routine de personnalité spécifiée dans un cadre cantunwind" -#: config/tc-arm.c:3186 +#: config/tc-arm.c:3556 msgid "duplicate .personalityindex directive" -msgstr "" +msgstr "directive .personalityindex en double" -#: config/tc-arm.c:3193 +#: config/tc-arm.c:3563 msgid "bad personality routine number" -msgstr "" +msgstr "mauvais numéro de routine de personnalité" -#: config/tc-arm.c:3212 -#, fuzzy +#: config/tc-arm.c:3585 msgid "duplicate .personality directive" -msgstr "spécificateur de bit psr est duplicaté" +msgstr "directive .personality en double" -#: config/tc-arm.c:3235 config/tc-arm.c:3363 config/tc-arm.c:3411 -#, fuzzy +#: config/tc-arm.c:3608 config/tc-arm.c:3736 config/tc-arm.c:3784 msgid "expected register list" -msgstr "registre attendu" +msgstr "liste de registre attendue" -#: config/tc-arm.c:3317 -#, fuzzy +#: config/tc-arm.c:3690 msgid "expected , " -msgstr " attendu" +msgstr ", attendu" -#: config/tc-arm.c:3326 +#: config/tc-arm.c:3699 msgid "number of registers must be in the range [1:4]" -msgstr "Les numéros de registres doivent être dans les bornes [1:4]" +msgstr "Le nombre de registres doit être compris dans l'intervalle [1:4]" -#: config/tc-arm.c:3473 config/tc-arm.c:3606 -#, fuzzy +#: config/tc-arm.c:3846 config/tc-arm.c:3979 msgid "bad register range" -msgstr "Gamme de registre erronée" +msgstr "mauvaise gamme de registre" -#: config/tc-arm.c:3660 -#, fuzzy +#: config/tc-arm.c:4036 msgid "register expected" -msgstr "registre ARM attendu" +msgstr "registre attendu" -#: config/tc-arm.c:3670 -#, fuzzy +#: config/tc-arm.c:4046 msgid "FPA .unwind_save does not take a register list" -msgstr "MSP430 n'a pas de registres %d" +msgstr "FPA .unwind_save n'accepte pas une liste de registres" -#: config/tc-arm.c:3688 +#: config/tc-arm.c:4065 msgid ".unwind_save does not support this kind of register" -msgstr "" +msgstr ".unwind_save ne supporte pas ce type de registre" -#: config/tc-arm.c:3724 +#: config/tc-arm.c:4104 msgid "SP and PC not permitted in .unwind_movsp directive" -msgstr "" +msgstr "SP et PC pas permis dans la directive .unwind_movsp" -#: config/tc-arm.c:3729 -#, fuzzy +#: config/tc-arm.c:4109 msgid "unexpected .unwind_movsp directive" -msgstr "directive .ent imbriquées" +msgstr "directive .unwind_movsp inattendue" -#: config/tc-arm.c:3753 -#, fuzzy +#: config/tc-arm.c:4136 msgid "stack increment must be multiple of 4" -msgstr "opérande doit être un multiple de 4" +msgstr "incrément de pile doit être un multiple de 4" -#: config/tc-arm.c:3782 -#, fuzzy +#: config/tc-arm.c:4168 msgid "expected , " -msgstr "@ attendu (exp, reg16)" +msgstr ", attendu" -#: config/tc-arm.c:3800 +#: config/tc-arm.c:4186 msgid "register must be either sp or set by a previousunwind_movsp directive" -msgstr "" +msgstr "le registre doit être soit sp ou soit spécifié par une directive unwind_movsp précédente" -#: config/tc-arm.c:3836 +#: config/tc-arm.c:4225 msgid "expected , " -msgstr "" +msgstr ", attendu" -#: config/tc-arm.c:3848 -#, fuzzy +#: config/tc-arm.c:4237 msgid "unwind opcode too long" -msgstr "opcode inconnu %s" +msgstr "opcode unwind trop long" -#: config/tc-arm.c:3853 -#, fuzzy +#: config/tc-arm.c:4242 msgid "invalid unwind opcode" -msgstr "opcode invalide" +msgstr "opcode unwind incorrect" -#: config/tc-arm.c:4000 config/tc-arm.c:4863 config/tc-arm.c:8438 -#: config/tc-arm.c:8920 config/tc-arm.c:11718 config/tc-arm.c:18690 -#: config/tc-arm.c:18715 config/tc-arm.c:18723 config/tc-z8k.c:1144 +#: config/tc-arm.c:4397 config/tc-arm.c:5307 config/tc-arm.c:9199 +#: config/tc-arm.c:9724 config/tc-arm.c:13036 config/tc-arm.c:21030 +#: config/tc-arm.c:21055 config/tc-arm.c:21063 config/tc-z8k.c:1144 #: config/tc-z8k.c:1154 msgid "immediate value out of range" -msgstr "valeur immediate est hors limite" +msgstr "valeur immédiate hors limite" -#: config/tc-arm.c:4147 -#, fuzzy +#: config/tc-arm.c:4562 msgid "invalid FPA immediate expression" -msgstr ": mode siam invalide pour l'expression" +msgstr "mauvaise expression FPA immédiate" -#: config/tc-arm.c:4271 config/tc-arm.c:4279 +#: config/tc-arm.c:4686 config/tc-arm.c:4695 msgid "shift expression expected" -msgstr "expression de décalage attendu" +msgstr "expression de décalage attendu" -#: config/tc-arm.c:4293 -#, fuzzy +#: config/tc-arm.c:4709 msgid "'LSL' or 'ASR' required" -msgstr "')' requis" +msgstr "« LSL » ou « ASR » requis" -#: config/tc-arm.c:4301 -#, fuzzy +#: config/tc-arm.c:4717 msgid "'LSL' required" -msgstr "')' requis" +msgstr "« LSL » requis" -#: config/tc-arm.c:4309 -#, fuzzy +#: config/tc-arm.c:4725 msgid "'ASR' required" -msgstr "')' requis" +msgstr "« ASR » requis" -#: config/tc-arm.c:4381 config/tc-arm.c:4857 config/tc-arm.c:6429 -#: config/tc-v850.c:1859 config/tc-v850.c:1880 +#: config/tc-arm.c:4797 config/tc-arm.c:5301 config/tc-arm.c:7010 msgid "constant expression expected" -msgstr "expression de constante attendue" +msgstr "expression constante attendue" -#: config/tc-arm.c:4388 -#, fuzzy +#: config/tc-arm.c:4804 msgid "invalid rotation" -msgstr "Relocalisation invalide" +msgstr "rotation invalide" -#: config/tc-arm.c:4548 config/tc-arm.c:4693 -#, fuzzy +#: config/tc-arm.c:4964 config/tc-arm.c:5128 msgid "unknown group relocation" -msgstr "Type de relocalisation inconnu" +msgstr "réadressage de groupe inconnu" -#: config/tc-arm.c:4661 -#, fuzzy +#: config/tc-arm.c:5000 msgid "alignment must be constant" -msgstr "l'opérande doit être une constante" +msgstr "l'alignement doit être une constante" -#: config/tc-arm.c:4724 -#, fuzzy +#: config/tc-arm.c:5159 msgid "this group relocation is not allowed on this instruction" -msgstr "type de relocalisation invalide %d pour l'instruction %s" +msgstr "ce réadressage de groupe n'est pas permis sur cette instruction" -#: config/tc-arm.c:4736 config/tc-arm.c:5127 -#, fuzzy +#: config/tc-arm.c:5180 config/tc-arm.c:5585 msgid "']' expected" -msgstr "acc0 attendu" +msgstr "« ] » attendu" -#: config/tc-arm.c:4754 +#: config/tc-arm.c:5198 msgid "'}' expected at end of 'option' field" -msgstr "" +msgstr "« } » attendu à la fin du champ « option »" -#: config/tc-arm.c:4759 -#, fuzzy +#: config/tc-arm.c:5203 msgid "cannot combine index with option" -msgstr "insn ne peut être combiné avec pmuls" +msgstr "index ne peut pas être combiné avec option" -#: config/tc-arm.c:4772 -#, fuzzy +#: config/tc-arm.c:5216 msgid "cannot combine pre- and post-indexing" -msgstr "ne peut à la fois pré-décrémenter et post-décrémenter" +msgstr "ne peut combiner pré et post indexation" -#: config/tc-arm.c:4933 +#: config/tc-arm.c:5381 msgid "flag for {c}psr instruction expected" msgstr "fanion pour instruction {c}psr attendu" -#: config/tc-arm.c:4958 -#, fuzzy +#: config/tc-arm.c:5406 msgid "unrecognized CPS flag" -msgstr "opcode non reconnu" +msgstr "fanion CPS non reconnu" -#: config/tc-arm.c:4965 -#, fuzzy +#: config/tc-arm.c:5413 msgid "missing CPS flags" -msgstr "classe manquante" +msgstr "fanions CPS manquants" -#: config/tc-arm.c:4988 config/tc-arm.c:4994 +#: config/tc-arm.c:5436 config/tc-arm.c:5442 msgid "valid endian specifiers are be or le" -msgstr "" +msgstr "spécificateurs petit/gros boutistes possibles sont be ou le" # macro.c:559error setting flags for \".sbss\": %s" -#: config/tc-arm.c:5016 -#, fuzzy +#: config/tc-arm.c:5464 msgid "missing rotation field after comma" -msgstr ") manquante après les paramètres formels" +msgstr "champ de rotation manquant après la virgule" -#: config/tc-arm.c:5031 +#: config/tc-arm.c:5479 msgid "rotation can only be 0, 8, 16, or 24" -msgstr "" +msgstr "rotation ne peut être que 0, 8, 16 ou 24" -#: config/tc-arm.c:5051 -#, fuzzy +#: config/tc-arm.c:5508 msgid "condition required" -msgstr "valeur constante requise" +msgstr "condition requise" -#: config/tc-arm.c:5089 config/tc-arm.c:6924 -#, fuzzy +#: config/tc-arm.c:5547 config/tc-arm.c:7594 msgid "'[' expected" -msgstr "acc0 attendu" +msgstr "« [ » attendu" -#: config/tc-arm.c:5102 -#, fuzzy +#: config/tc-arm.c:5560 msgid "',' expected" -msgstr "acc0 attendu" +msgstr "« , » attendu" -#: config/tc-arm.c:5119 -#, fuzzy +#: config/tc-arm.c:5577 msgid "invalid shift" -msgstr "décalage invalide" +msgstr "décalage invalide" -#: config/tc-arm.c:5192 -#, fuzzy +#: config/tc-arm.c:5650 msgid "can't use Neon quad register here" -msgstr "ne peut analyser la liste de registres" +msgstr "un quadruple registre Neon ne peut pas être utilisé ici" -#: config/tc-arm.c:5258 +#: config/tc-arm.c:5716 msgid "expected or or operand" -msgstr "" +msgstr "opérande ou ou attendu" -#: config/tc-arm.c:5338 -#, fuzzy +#: config/tc-arm.c:5796 msgid "parse error" -msgstr "erreur de syntaxe" +msgstr "erreur d'analyse" -#: config/tc-arm.c:5348 read.c:2096 -#, fuzzy +#: config/tc-arm.c:5806 read.c:2140 msgid "expected comma" -msgstr "%c attendu" +msgstr "virgule attendue" + +#. ISB can only take SY as an option. +#: config/tc-arm.c:6065 +msgid "invalid barrier type" +msgstr "type de barrière invalide" -#: config/tc-arm.c:5638 config/tc-arm.c:5708 -#, fuzzy +#: config/tc-arm.c:6202 msgid "immediate value is out of range" -msgstr "valeur immediate est hors limite" +msgstr "valeur immédiate hors limite" -#: config/tc-arm.c:5853 -#, fuzzy +#: config/tc-arm.c:6348 msgid "iWMMXt data or control register expected" -msgstr "registre en virgule flottante attendu" +msgstr "registre de donnée ou de contrôle iWMMXt attendu" + +#: config/tc-arm.c:6392 +msgid "Banked registers are not available with this architecture." +msgstr "Registres « Banked » non disponibles pour cette architecture" + +#: config/tc-arm.c:6517 +#, c-format +msgid "unhandled operand code %d" +msgstr "code d'opérande %d non géré" -#: config/tc-arm.c:6085 config/tc-score.c:56 +#: config/tc-arm.c:6614 config/tc-score.c:264 msgid "garbage following instruction" msgstr "instruction suivie de rebuts" -#: config/tc-arm.c:6172 -#, fuzzy +#. If REG is R13 (the stack pointer), warn that its use is +#. deprecated. +#: config/tc-arm.c:6655 +msgid "use of r13 is deprecated" +msgstr "utilisation de r13 est obsolète" + +#: config/tc-arm.c:6725 msgid "D register out of range for selected VFP version" -msgstr "registre hors limite" +msgstr "registre D hors limite pour la version VFP choisie" -#: config/tc-arm.c:6251 -#, fuzzy +#: config/tc-arm.c:6804 msgid "instruction does not accept preindexed addressing" -msgstr "L'instruction « %s » requiert une mode d'adressage éligné" +msgstr "l'instruction n'accepte pas un adressage pré indexé" #. unindexed - only for coprocessor -#: config/tc-arm.c:6267 config/tc-arm.c:8244 -#, fuzzy +#: config/tc-arm.c:6820 config/tc-arm.c:8992 msgid "instruction does not accept unindexed addressing" -msgstr "r2 ne devrait pas être utilisé en mode d'adressage indexé" +msgstr "l'instruction n'accepte pas un adressage désindexé" -#: config/tc-arm.c:6275 -#, fuzzy +#: config/tc-arm.c:6828 msgid "destination register same as write-back base" -msgstr "registre %s identique à la base de ré-écriture arrière" +msgstr "le registre de destination est le même que la base de réécriture arrière" -#: config/tc-arm.c:6276 -#, fuzzy +#: config/tc-arm.c:6829 msgid "source register same as write-back base" -msgstr "registre %s identique à la base de ré-écriture arrière" +msgstr "registre source identique à la base de réécriture arrière" -#: config/tc-arm.c:6322 -#, fuzzy +#: config/tc-arm.c:6879 +msgid "use of PC in this instruction is deprecated" +msgstr "l'utilisation de PC dans cette instruction est dépréciée" + +#: config/tc-arm.c:6897 msgid "instruction does not accept scaled register index" -msgstr "l'instruction n'est pas conditionnelle" +msgstr "l'instruction n'accepte pas un index de registre mis à l'échelle" -#: config/tc-arm.c:6362 -#, fuzzy +#: config/tc-arm.c:6943 msgid "instruction does not support unindexed addressing" -msgstr "L'instruction « %s » requiert une mode d'adressage éligné" +msgstr "l'instruction n'accepte pas l'adressage désindexé" -#: config/tc-arm.c:6377 +#: config/tc-arm.c:6958 msgid "pc may not be used with write-back" -msgstr "PC le peut être utilisé en mode ré-écriture" +msgstr "PC ne peut être utilisé en mode réécriture" -#: config/tc-arm.c:6382 -#, fuzzy +#: config/tc-arm.c:6963 msgid "instruction does not support writeback" -msgstr "l'instruction n'est pas conditionnelle" +msgstr "l'instruction ne supporte pas la réécriture" -#: config/tc-arm.c:6424 +#: config/tc-arm.c:7005 msgid "invalid pseudo operation" -msgstr "pseudo opération invalide" +msgstr "pseudo opération invalide" -#: config/tc-arm.c:6470 +#: config/tc-arm.c:7051 msgid "literal pool insertion failed" -msgstr "insertion dans le bassin de mots à échoué" +msgstr "insertion dans le pool littéral a échoué" -#: config/tc-arm.c:6528 +#: config/tc-arm.c:7110 msgid "Rn must not overlap other operands" -msgstr "" +msgstr "Rn ne peut pas recouvrir d'autres opérandes" -#: config/tc-arm.c:6628 config/tc-arm.c:6647 config/tc-arm.c:6660 -#: config/tc-arm.c:8787 config/tc-arm.c:8807 config/tc-arm.c:8821 +#: config/tc-arm.c:7115 +msgid "swp{b} use is deprecated for this architecture" +msgstr "swp{b} est déprécié pour cette architecture" + +#: config/tc-arm.c:7212 config/tc-arm.c:9559 +msgid "bad barrier type" +msgstr "mauvais type de barrière" + +#: config/tc-arm.c:7223 config/tc-arm.c:7242 config/tc-arm.c:7255 +#: config/tc-arm.c:9571 config/tc-arm.c:9602 config/tc-arm.c:9624 msgid "bit-field extends past end of register" -msgstr "" +msgstr "le champ de bits s'étend au delà de la fin du registre" -#: config/tc-arm.c:6689 +#: config/tc-arm.c:7284 msgid "the only suffix valid here is '(plt)'" -msgstr "" +msgstr "le seul suffixe valable ici est « (plt) »" -#: config/tc-arm.c:6742 -#, fuzzy +#: config/tc-arm.c:7335 msgid "use of r15 in blx in ARM mode is not really useful" -msgstr "utilisation de r15 dans le bx en mode ARM n'est pas très utile" +msgstr "utilisation de r15 dans le blx en mode ARM n'est pas très utile" -#: config/tc-arm.c:6765 +#: config/tc-arm.c:7357 msgid "use of r15 in bx in ARM mode is not really useful" -msgstr "utilisation de r15 dans le bx en mode ARM n'est pas très utile" +msgstr "utilisation de r15 dans le bx en mode ARM n'est pas très utile" -#: config/tc-arm.c:6777 config/tc-arm.c:8959 +#: config/tc-arm.c:7382 msgid "use of r15 in bxj is not really useful" -msgstr "utilisation de r15 dans le bxj n'est pas très utile" +msgstr "utilisation de r15 dans le bxj n'est pas très utile" -#: config/tc-arm.c:6891 config/tc-arm.c:6900 +#: config/tc-arm.c:7561 config/tc-arm.c:7570 msgid "writeback of base register is UNPREDICTABLE" -msgstr "ré-écriture arrière du registre de base est IMPRÉVISIBLE" +msgstr "réécriture arrière du registre de base est IMPRÉVISIBLE" -#: config/tc-arm.c:6894 +#: config/tc-arm.c:7564 msgid "writeback of base register when in register list is UNPREDICTABLE" -msgstr "" -"ré-écriture du registre de base lorsque dans la liste de registres est " -"IMPRÉVISBLE" +msgstr "réécriture du registre de base en étant dans une liste de registres est IMPRÉVISBLE" -#: config/tc-arm.c:6904 +#: config/tc-arm.c:7574 msgid "if writeback register is in list, it must be the lowest reg in the list" -msgstr "" -"si la registre de ré-écriture est dans la liste, il doit être le plus bas " -"dans la liste" +msgstr "si le registre de réécriture est dans la liste, il doit être le plus bas dans la liste" -#: config/tc-arm.c:6919 -#, fuzzy +#: config/tc-arm.c:7589 msgid "first destination register must be even" -msgstr "registre de destination doit être pair" +msgstr "le premier registre de destination doit être pair" -#: config/tc-arm.c:6922 config/tc-arm.c:6989 -#, fuzzy +#: config/tc-arm.c:7592 config/tc-arm.c:7661 msgid "can only load two consecutive registers" -msgstr "seuls deux registres consécutifs VFP SP sont permis ici" +msgstr "seuls deux registres consécutifs peuvent être chargés" #. If op 1 were present and equal to PC, this function wouldn't #. have been called in the first place. #. If op 2 were present and equal to PC, this function wouldn't #. have been called in the first place. -#: config/tc-arm.c:6923 config/tc-arm.c:6992 config/tc-arm.c:7514 -#: config/tc-arm.c:9437 +#: config/tc-arm.c:7593 config/tc-arm.c:7664 config/tc-arm.c:8262 +#: config/tc-arm.c:10318 msgid "r14 not allowed here" msgstr "r14 n'est pas permis ici" -#: config/tc-arm.c:6937 -#, fuzzy +#: config/tc-arm.c:7607 msgid "base register written back, and overlaps second destination register" -msgstr "Les instructions écrivent au même registre de destination." +msgstr "registre de base réécrit et recouvre le second registre de destination" -#: config/tc-arm.c:6945 -#, fuzzy +#: config/tc-arm.c:7615 msgid "index register overlaps destination register" -msgstr "setx: registre temporaire identique au registre de destination" +msgstr "registre d'index recouvre le registre de destination" -#: config/tc-arm.c:6975 config/tc-arm.c:7496 +#: config/tc-arm.c:7645 config/tc-arm.c:8244 msgid "offset must be zero in ARM encoding" -msgstr "" +msgstr "l'offset doit être zéro dans l'encodage ARM" -#: config/tc-arm.c:6986 config/tc-arm.c:7508 -#, fuzzy +#: config/tc-arm.c:7658 config/tc-arm.c:8256 msgid "even register required" -msgstr "numéro paire de registre est requis" +msgstr "numéro pair de registre requis" -#: config/tc-arm.c:7017 config/tc-arm.c:7048 -#, fuzzy +#: config/tc-arm.c:7689 config/tc-arm.c:7721 msgid "this instruction requires a post-indexed address" -msgstr "L'instruction « %s » requiert une mode d'adressage éligné" +msgstr "cette instruction requiert un adresse post indexée" -#: config/tc-arm.c:7075 -#, fuzzy +#: config/tc-arm.c:7748 msgid "Rd and Rm should be different in mla" -msgstr "rd et rm doivent être différents dans mla" +msgstr "Rd et Rm devraient être différents dans mla" -#: config/tc-arm.c:7099 config/tc-arm.c:9695 -#, fuzzy +#: config/tc-arm.c:7772 config/tc-arm.c:10662 msgid ":lower16: not allowed this instruction" -msgstr "directive unwind n'est pas suivie d'une instruction." +msgstr ":lower16: pas permis dans cette instruction" -#: config/tc-arm.c:7101 -#, fuzzy +#: config/tc-arm.c:7774 msgid ":upper16: not allowed instruction" -msgstr "r15 n'est pas permis dans l'espace de commutation (swap)" +msgstr ":upper16: pas permis dans cette instruction" -#: config/tc-arm.c:7120 -#, fuzzy +#: config/tc-arm.c:7793 config/tc-arm.c:7836 msgid "operand 1 must be FPSCR" -msgstr "seconde opérande doit être un 1" +msgstr "opérande 1 doit être FPSCR" + +#: config/tc-arm.c:7855 +msgid "operand 0 must be FPSCR" +msgstr "opérande 0 doit être FPSCR" -#: config/tc-arm.c:7153 config/tc-arm.c:9804 -#, fuzzy +#: config/tc-arm.c:7875 config/tc-arm.c:10780 +msgid "bad register for mrs" +msgstr "mauvais registre pour mrs" + +#: config/tc-arm.c:7882 config/tc-arm.c:10803 msgid "'CPSR' or 'SPSR' expected" -msgstr "CPSR ou SPSR attendu" +msgstr "« CPSR » ou « SPSR » attendu" -#: config/tc-arm.c:7190 -#, fuzzy +#: config/tc-arm.c:7923 msgid "Rd and Rm should be different in mul" -msgstr "rd et rm doivent être différents dans mul" +msgstr "Rd et Rm devraient être différents dans mul" + +#: config/tc-arm.c:7942 config/tc-arm.c:8189 config/tc-arm.c:10937 +msgid "rdhi and rdlo must be different" +msgstr "rdhi et rdlo doivent être différents" -#: config/tc-arm.c:7211 +#: config/tc-arm.c:7948 msgid "rdhi, rdlo and rm must all be different" -msgstr "rdhi, rdlo et rm doivent tous être différents" +msgstr "rdhi, rdlo et rm doivent tous être différents" -#: config/tc-arm.c:7273 +#: config/tc-arm.c:8014 msgid "'[' expected after PLD mnemonic" -msgstr "« [ » attendu après la mnémonique PLD" +msgstr "« [ » attendu après la mnémonique PLD" -#: config/tc-arm.c:7275 config/tc-arm.c:7290 +#: config/tc-arm.c:8016 config/tc-arm.c:8031 msgid "post-indexed expression used in preload instruction" -msgstr "expression post-indexée dans une instruction préchargée" +msgstr "expression post-indexée utilisée dans une instruction de préchargement" -#: config/tc-arm.c:7277 config/tc-arm.c:7292 +#: config/tc-arm.c:8018 config/tc-arm.c:8033 msgid "writeback used in preload instruction" -msgstr "more ré-écriture utilisé dans une instruction de préchargement" +msgstr "réécriture utilisée dans une instruction de préchargement" -#: config/tc-arm.c:7279 config/tc-arm.c:7294 -#, fuzzy +#: config/tc-arm.c:8020 config/tc-arm.c:8035 msgid "unindexed addressing used in preload instruction" -msgstr "expression post-indexée dans une instruction préchargée" +msgstr "expression désindexée utilisée dans une instruction de préchargement" -#: config/tc-arm.c:7288 -#, fuzzy +#: config/tc-arm.c:8029 msgid "'[' expected after PLI mnemonic" -msgstr "« [ » attendu après la mnémonique PLD" - -#: config/tc-arm.c:7441 config/tc-arm.c:9884 -msgid "rdhi and rdlo must be different" -msgstr "rdhi et rdlo doivent être différents" +msgstr "« [ » attendu après la mnémonique PLI" -#: config/tc-arm.c:7467 -#, fuzzy +#: config/tc-arm.c:8215 msgid "SRS base register must be r13" -msgstr "registre de base erroné: doit être r0" +msgstr "le registre de base SRS doit être r13" -#: config/tc-arm.c:7511 -#, fuzzy +#: config/tc-arm.c:8259 msgid "can only store two consecutive registers" -msgstr "seuls deux registres consécutifs VFP SP sont permis ici" +msgstr "seuls deux registres consécutifs peuvent être stockés" -#: config/tc-arm.c:7606 config/tc-arm.c:7623 +#: config/tc-arm.c:8354 config/tc-arm.c:8371 msgid "only two consecutive VFP SP registers allowed here" -msgstr "seuls deux registres consécutifs VFP SP sont permis ici" +msgstr "seuls deux registres consécutifs VFP SP sont permis ici" -#: config/tc-arm.c:7651 config/tc-arm.c:7666 +#: config/tc-arm.c:8399 config/tc-arm.c:8414 msgid "this addressing mode requires base-register writeback" -msgstr "ce mode d'adressage requiert un registre de base avec écriture" +msgstr "ce mode d'adressage requiert une réécriture du registre de base" -#: config/tc-arm.c:7841 -#, fuzzy +#: config/tc-arm.c:8588 msgid "this instruction does not support indexing" -msgstr "l'instruction n'est pas conditionnelle" +msgstr "cette instruction ne supporte pas l'indexage" -#: config/tc-arm.c:7865 +#: config/tc-arm.c:8611 msgid "only r15 allowed here" msgstr "seul r15 est permis ici" -#: config/tc-arm.c:8000 -#, fuzzy +#: config/tc-arm.c:8746 msgid "immediate operand requires iWMMXt2" -msgstr "opérande immédiate est trop grande" +msgstr "opérande immédiat requiert iwMMXt2" -#: config/tc-arm.c:8144 +#: config/tc-arm.c:8890 msgid "shift by register not allowed in thumb mode" -msgstr "" +msgstr "décalage par registre pas permis en mode thumb" -#: config/tc-arm.c:8156 config/tc-arm.c:18197 +#: config/tc-arm.c:8902 config/tc-arm.c:11480 config/tc-arm.c:20417 msgid "shift expression is too large" -msgstr "l'expression de décalage est trop grande" +msgstr "l'expression de décalage est trop grande" -#: config/tc-arm.c:8182 -#, fuzzy +#: config/tc-arm.c:8929 msgid "Instruction does not support =N addresses" -msgstr "adresse de départ non supportée" - -#: config/tc-arm.c:8187 -#, fuzzy -msgid "cannot use register index with PC-relative addressing" -msgstr "Syntaxe invalide en mode d'adressage relatif au PC" +msgstr "L'instruction ne supporte par les adresses =N" -#: config/tc-arm.c:8188 -#, fuzzy +#: config/tc-arm.c:8935 msgid "cannot use register index with this instruction" -msgstr "liste de registres invalide pour les instructions push/pop" +msgstr "un index de registre ne peut être utilisé avec cette instruction" -#: config/tc-arm.c:8190 +#: config/tc-arm.c:8937 msgid "Thumb does not support negative register indexing" -msgstr "" +msgstr "Thumb ne supporte pas l'indexation négative du registre" -#: config/tc-arm.c:8192 +#: config/tc-arm.c:8939 msgid "Thumb does not support register post-indexing" -msgstr "" +msgstr "Thumb ne supporte pas la post-indexation du registre" -#: config/tc-arm.c:8194 +#: config/tc-arm.c:8941 msgid "Thumb does not support register indexing with writeback" -msgstr "" +msgstr "Thumb ne supporte pas l'indexation du registre avec réécriture" -#: config/tc-arm.c:8196 +#: config/tc-arm.c:8943 msgid "Thumb supports only LSL in shifted register indexing" -msgstr "" +msgstr "Thumb supporte uniquement LSL dans l'indexation décalée du registre" -#: config/tc-arm.c:8205 config/tc-arm.c:12946 -#, fuzzy +#: config/tc-arm.c:8952 config/tc-arm.c:14376 msgid "shift out of range" -msgstr "décalage hors limite" - -#: config/tc-arm.c:8213 -#, fuzzy -msgid "cannot use writeback with PC-relative addressing" -msgstr "Syntaxe invalide en mode d'adressage relatif au PC" +msgstr "décalage hors limite" -#: config/tc-arm.c:8215 -#, fuzzy +#: config/tc-arm.c:8961 msgid "cannot use writeback with this instruction" -msgstr "constant trop grande pour être insérée dans l'instruction" +msgstr "cette instruction ne peut pas utiliser la réécriture" -#: config/tc-arm.c:8234 -#, fuzzy +#: config/tc-arm.c:8982 msgid "cannot use post-indexing with PC-relative addressing" -msgstr "Syntaxe invalide en mode d'adressage relatif au PC" +msgstr "le post-indexage ne peut pas être utilisé avec un adressage relatif au PC" -#: config/tc-arm.c:8235 -#, fuzzy +#: config/tc-arm.c:8983 msgid "cannot use post-indexing with this instruction" -msgstr "Ne peut utiliser une virgule flottante insn dans cette section" +msgstr "le post-indexage ne peut pas être utilisé avec cette instruction" -#: config/tc-arm.c:8362 -#, fuzzy -msgid "PC not allowed as destination" -msgstr "r15 n'est pas permis comme registre de base" - -#: config/tc-arm.c:8433 +#: config/tc-arm.c:9194 msgid "only SUBS PC, LR, #const allowed" -msgstr "" +msgstr "seulement SUBS PC, LR, #const permis" -#: config/tc-arm.c:8506 config/tc-arm.c:8647 config/tc-arm.c:8739 -#: config/tc-arm.c:9759 -#, fuzzy +#: config/tc-arm.c:9273 config/tc-arm.c:9424 config/tc-arm.c:9521 +#: config/tc-arm.c:10741 config/tc-arm.c:11043 msgid "shift must be constant" -msgstr "L'identificateur de trappe doit être une constante." +msgstr "le décalage doit être constant" -#: config/tc-arm.c:8533 config/tc-arm.c:8662 config/tc-arm.c:8754 -#: config/tc-arm.c:9772 -#, fuzzy +#: config/tc-arm.c:9300 config/tc-arm.c:9439 config/tc-arm.c:9536 +#: config/tc-arm.c:10754 msgid "unshifted register required" -msgstr "registre HI requis" +msgstr "registre non décalé requis" -#: config/tc-arm.c:8548 config/tc-arm.c:8765 config/tc-arm.c:9871 -#, fuzzy +#: config/tc-arm.c:9315 config/tc-arm.c:9547 config/tc-arm.c:10898 msgid "dest must overlap one source register" -msgstr "dest et source1 doivent être le même registre" +msgstr "dest dois recouvrir un registre source" -#: config/tc-arm.c:8665 +#: config/tc-arm.c:9442 msgid "dest and source1 must be the same register" -msgstr "dest et source1 doivent être le même registre" +msgstr "dest et source1 doivent être le même registre" -#: config/tc-arm.c:8916 -#, fuzzy +#: config/tc-arm.c:9720 msgid "instruction is always unconditional" -msgstr "l'instruction n'est pas conditionnelle" +msgstr "l'instruction est toujours non-conditionnelle" -#: config/tc-arm.c:8998 -#, fuzzy +#: config/tc-arm.c:9815 msgid "selected processor does not support 'A' form of this instruction" -msgstr "Le processeur cible ne supporte pas cette instruction" +msgstr "le processeur sélectionné ne supporte pas la forme « A » de cette instruction" -#: config/tc-arm.c:9001 -#, fuzzy +#: config/tc-arm.c:9818 msgid "Thumb does not support the 2-argument form of this instruction" -msgstr "Le processeur cible ne supporte pas cette instruction" +msgstr "Thumb ne supporte pas la forme de cette instruction avec 2 arguments" -#: config/tc-arm.c:9100 -#, fuzzy +#: config/tc-arm.c:9926 msgid "SP not allowed in register list" -msgstr "hors limite dans la liste de registres" +msgstr "SP pas permis dans la liste des registres" -#: config/tc-arm.c:9105 -#, fuzzy -msgid "LR and PC should not both be in register list" -msgstr "Le second registre devrait suivre le tiret dans la liste de registres" +#: config/tc-arm.c:9930 config/tc-arm.c:10036 +msgid "having the base register in the register list when using write back is UNPREDICTABLE" +msgstr "le résultat est IMPRÉVISIBLE si le registre de base est dans la liste des registres pendant une réécriture" -#: config/tc-arm.c:9109 -#, fuzzy -msgid "base register should not be in register list when written back" -msgstr "Le second registre devrait suivre le tiret dans la liste de registres" +#: config/tc-arm.c:9938 +msgid "LR and PC should not both be in register list" +msgstr "LR et PC ne devraient pas être tous les deux dans la liste des registres" -#: config/tc-arm.c:9115 -#, fuzzy +#: config/tc-arm.c:9946 msgid "PC not allowed in register list" -msgstr "hors limite dans la liste de registres" +msgstr "PC pas permis dans la liste des registres" -#: config/tc-arm.c:9118 config/tc-arm.c:9184 config/tc-arm.c:9224 -#, c-format -msgid "value stored for r%d is UNPREDICTABLE" -msgstr "" - -#: config/tc-arm.c:9160 +#: config/tc-arm.c:9988 msgid "Thumb load/store multiple does not support {reglist}^" -msgstr "" +msgstr "Load/store multiples de Thumb ne supportent pas {reglist}" + +#: config/tc-arm.c:10013 config/tc-arm.c:10090 +#, c-format +msgid "value stored for r%d is UNKNOWN" +msgstr "valeur stockée pour r%d est INCONNUE" -#: config/tc-arm.c:9217 +#: config/tc-arm.c:10083 msgid "Thumb-2 instruction only valid in unified syntax" -msgstr "" +msgstr "Instruction Thumb 2 seulement valide dans la syntaxe unifiée" -#: config/tc-arm.c:9221 config/tc-arm.c:9231 -#, fuzzy +#: config/tc-arm.c:10087 config/tc-arm.c:10097 msgid "this instruction will write back the base register" -msgstr "Les instructions écrivent au même registre de destination." +msgstr "cette instruction va réécrire le registre de base" -#: config/tc-arm.c:9234 -#, fuzzy +#: config/tc-arm.c:10100 msgid "this instruction will not write back the base register" -msgstr "Les instructions écrivent au même registre de destination." +msgstr "cette instruction ne va pas réécrire le registre de base" -#: config/tc-arm.c:9263 -#, fuzzy +#: config/tc-arm.c:10131 msgid "r14 not allowed as first register when second register is omitted" -msgstr "r15 n'est pas permis comme registre de base en mode ré-écriture" +msgstr "r14 n'est pas permis comme premier registre quand le second registre est omis" -#: config/tc-arm.c:9360 config/tc-arm.c:9373 config/tc-arm.c:9409 -#, fuzzy +#: config/tc-arm.c:10241 config/tc-arm.c:10254 config/tc-arm.c:10290 msgid "Thumb does not support this addressing mode" -msgstr "utilise .code16 pour assurer un mode d'adressage correct" +msgstr "Thumb ne supporte pas ce mode d'adressage" -#: config/tc-arm.c:9377 +#: config/tc-arm.c:10258 msgid "byte or halfword not valid for base register" msgstr "octet ou demi-mot non valide pour un registre de base" -#: config/tc-arm.c:9380 +#: config/tc-arm.c:10261 msgid "r15 based store not allowed" -msgstr "r15 utilisé comme registre de base de stockage n'est pas permis" +msgstr "r15 utilisé comme registre de base de stockage n'est pas permis" -#: config/tc-arm.c:9382 +#: config/tc-arm.c:10263 msgid "invalid base register for register offset" -msgstr "registre de base invalide pour un registre de décalage" +msgstr "registre de base invalide pour un registre de décalage" -#: config/tc-arm.c:9680 +#: config/tc-arm.c:10445 +#, c-format +msgid "Use of r%u as a source register is deprecated when r%u is the destination register." +msgstr "L'utilisation de r%u en tant que registre source est dépréciée quand r%u est le registre destination" + +#: config/tc-arm.c:10618 +msgid "shifts in CMP/MOV instructions are only supported in unified syntax" +msgstr "les décalages dans les instructions CMP/MOV sont uniquement supportées dans la syntaxe unifiée" + +#: config/tc-arm.c:10646 msgid "only lo regs allowed with immediate" -msgstr "seul les registres LO sont permis avec un immédiat" +msgstr "seul les registres lo sont permis avec un immédiat" -#: config/tc-arm.c:9700 -#, fuzzy +#: config/tc-arm.c:10667 msgid ":upper16: not allowed this instruction" -msgstr "incapable d'élargir l'instruction" +msgstr ":upper16: pas permis dans cette instruction" -#: config/tc-arm.c:9794 config/tc-arm.c:9826 config/tc-arm.c:9832 -#, fuzzy +#: config/tc-arm.c:10793 config/tc-arm.c:10799 config/tc-arm.c:10832 +#: config/tc-arm.c:10838 msgid "selected processor does not support requested special purpose register" -msgstr "le processeur choisi ne supporte pas les opcode ARM" - -#: config/tc-arm.c:9800 -#, fuzzy, c-format -msgid "" -"selected processor does not support requested special purpose register %x" -msgstr "le processeur choisi ne supporte pas les opcode ARM" +msgstr "le processeur sélectionné ne supporte pas le registre spécialisé demandé" -#: config/tc-arm.c:9821 -#, fuzzy +#: config/tc-arm.c:10822 msgid "Thumb encoding does not support an immediate here" -msgstr "système à octets de poids fort n'est pas supporté" +msgstr "encodage Thumb ne supporte pas un immédiat ici" + +#: config/tc-arm.c:10903 +msgid "Thumb-2 MUL must not set flags" +msgstr "MUL sur Thumb-2 ne doit pas activer de fanion" -#: config/tc-arm.c:9906 +#: config/tc-arm.c:10968 msgid "Thumb does not support NOP with hints" -msgstr "" +msgstr "Thumb ne supporte pas NOP avec des indices" -#: config/tc-arm.c:9988 +#: config/tc-arm.c:11106 msgid "push/pop do not support {reglist}^" -msgstr "" +msgstr "push/pop ne supporte pas {reglist}^" -#: config/tc-arm.c:10011 +#: config/tc-arm.c:11129 msgid "invalid register list to push/pop instruction" msgstr "liste de registres invalide pour les instructions push/pop" -#: config/tc-arm.c:10203 +#: config/tc-arm.c:11362 msgid "source1 and dest must be same register" -msgstr "source1 et dest doivent être le même registre" +msgstr "source1 et dest doivent être le même registre" -#: config/tc-arm.c:10224 -#, fuzzy +#: config/tc-arm.c:11383 msgid "ror #imm not supported" -msgstr "rva n'est pas supportée" +msgstr "ror #imm n'est pas supportée" + +#: config/tc-arm.c:11434 +msgid "SMC is not permitted on this architecture" +msgstr "SMC n'est pas permis sur cette architecture" -#: config/tc-arm.c:10349 -#, fuzzy +#: config/tc-arm.c:11597 msgid "Thumb encoding does not support rotation" -msgstr "système à octets de poids fort n'est pas supporté" +msgstr "l'encodage Thumb ne supporte pas les rotations" -#: config/tc-arm.c:10368 -#, fuzzy -msgid "instruction requires register index" -msgstr "Instruction requiert une étiquette" +#: config/tc-arm.c:11610 +msgid "SVC is not permitted on this architecture" +msgstr "SVC pas permis sur cette architecture" -#: config/tc-arm.c:10370 -#, fuzzy -msgid "PC is not a valid index register" -msgstr "registre d'index invalide" +#: config/tc-arm.c:11626 +msgid "instruction requires register index" +msgstr "l'instruction requiert un index de registre" -#: config/tc-arm.c:10372 -#, fuzzy +#: config/tc-arm.c:11635 msgid "instruction does not allow shifted index" -msgstr "instruction non permise: %s" +msgstr "l'instruction n'autorise pas un index décalé" -#: config/tc-arm.c:10791 -#, fuzzy +#: config/tc-arm.c:11780 +msgid "invalid neon suffix for non neon instruction" +msgstr "suffixe néon invalide pour une instruction non néon" + +#: config/tc-arm.c:12071 config/tc-arm.c:12406 msgid "invalid instruction shape" -msgstr "instruction « %s » erronée" +msgstr "mauvaise forme d'instruction" -#: config/tc-arm.c:11033 +#: config/tc-arm.c:12315 msgid "types specified in both the mnemonic and operands" -msgstr "" +msgstr "types spécifiés à la fois dans la mnémonique et les opérandes" -#: config/tc-arm.c:11070 +#: config/tc-arm.c:12352 msgid "operand types can't be inferred" -msgstr "" +msgstr "les types de l'opérande ne peuvent pas être inférés" -#: config/tc-arm.c:11076 +#: config/tc-arm.c:12358 msgid "type specifier has the wrong number of parts" -msgstr "" +msgstr "le spécificateur de type a le mauvais nombre de parties" -#: config/tc-arm.c:11131 -#, fuzzy +#: config/tc-arm.c:12422 config/tc-arm.c:14117 config/tc-arm.c:14124 msgid "operand size must match register width" -msgstr "tailles/opérandes ne concordent pas" +msgstr "la taille de l'opérande doit correspondre à la largeur du registre" -#: config/tc-arm.c:11142 -#, fuzzy +#: config/tc-arm.c:12433 msgid "bad type in Neon instruction" -msgstr "arguments erronés pour l'instruction" +msgstr "mauvais type dans une instruction Neon" -#: config/tc-arm.c:11153 -#, fuzzy +#: config/tc-arm.c:12444 msgid "inconsistent types in Neon instruction" -msgstr "constant trop grande pour être insérée dans l'instruction" +msgstr "types inconsistants dans une instruction Neon" -#: config/tc-arm.c:12202 -#, fuzzy +#: config/tc-arm.c:13261 +msgid "first and second operands shall be the same register" +msgstr "le premier et second opérandes seront les mêmes registres" + +#: config/tc-arm.c:13529 msgid "scalar out of range for multiply instruction" -msgstr "valeur d'opérande hors limite pour l'instruction" +msgstr "scalaire hors limite pour une instruction de multiplication" -#: config/tc-arm.c:12366 config/tc-arm.c:12378 -#, fuzzy +#: config/tc-arm.c:13705 config/tc-arm.c:13717 msgid "immediate out of range for insert" -msgstr "valeur immediate est hors limite" +msgstr "valeur immédiate hors limite pour une insertion" -#: config/tc-arm.c:12390 config/tc-arm.c:13292 -#, fuzzy +#: config/tc-arm.c:13729 config/tc-arm.c:14724 msgid "immediate out of range for shift" -msgstr "valeur immediate est hors limite" +msgstr "valeur immédiate hors limite pour un décalage" -#: config/tc-arm.c:12447 config/tc-arm.c:12474 config/tc-arm.c:12792 -#: config/tc-arm.c:13238 +#: config/tc-arm.c:13786 config/tc-arm.c:13813 config/tc-arm.c:14222 +#: config/tc-arm.c:14670 msgid "immediate out of range" -msgstr "valeur immediate est hors limite" +msgstr "valeur immédiate hors limite" -#: config/tc-arm.c:12511 -#, fuzzy +#: config/tc-arm.c:13850 msgid "immediate out of range for narrowing operation" -msgstr "valeur d'opérande hors limite pour l'instruction" +msgstr "valeur immédiate hors limite pour une opération de rétrécissement" -#: config/tc-arm.c:12631 -#, fuzzy +#: config/tc-arm.c:13975 msgid "operands 0 and 1 must be the same register" -msgstr "dest et source1 doivent être le même registre" +msgstr "opérandes 0 et 1 doivent être le même registre" -#: config/tc-arm.c:12766 +#: config/tc-arm.c:14196 msgid "operand size must be specified for immediate VMOV" -msgstr "" +msgstr "la taille de l'opérande doit être spécifiée pour VMOV immédiat" -#: config/tc-arm.c:12776 -#, fuzzy +#: config/tc-arm.c:14206 msgid "immediate has bits set outside the operand size" -msgstr "pas de concordance entre la taille du opcode et celle de l'opérande" +msgstr "la valeur immédiate à des bits mis en dehors de la taille de l'opérande" -#: config/tc-arm.c:12972 +#: config/tc-arm.c:14402 msgid "elements must be smaller than reversal region" -msgstr "" +msgstr "les éléments doivent être plus petits que la région inversée" -#: config/tc-arm.c:13143 config/tc-arm.c:13191 -#, fuzzy +#: config/tc-arm.c:14573 config/tc-arm.c:14623 msgid "bad type for scalar" -msgstr "%s: type erroné pour un symbole faible" +msgstr "mauvais type pour un scalaire" -#: config/tc-arm.c:13255 config/tc-arm.c:13263 -#, fuzzy +#: config/tc-arm.c:14687 config/tc-arm.c:14695 msgid "VFP registers must be adjacent" -msgstr "dernier registre doit être R7" +msgstr "les registres VFP doivent être adjacents" -#: config/tc-arm.c:13404 +#: config/tc-arm.c:14836 msgid "bad list length for table lookup" -msgstr "" +msgstr "mauvaise longueur de liste pour une recherche dans la table" -#: config/tc-arm.c:13434 +#: config/tc-arm.c:14866 msgid "writeback (!) must be used for VLDMDB and VSTMDB" -msgstr "" +msgstr "réécriture (!) doit être utilisée pour VLDMDB et VSTMDB" -#: config/tc-arm.c:13437 +#: config/tc-arm.c:14869 msgid "register list must contain at least 1 and at most 16 registers" -msgstr "" +msgstr "une liste de registres doit contenir au moins 1 registre et au plus 16 registres" -#: config/tc-arm.c:13514 -#, fuzzy +#: config/tc-arm.c:14894 +msgid "Use of PC here is deprecated" +msgstr "L'utilisation de PC ici est dépréciée" + +#: config/tc-arm.c:14896 +msgid "Use of PC here is UNPREDICTABLE" +msgstr "L'utilisation de PC ici est IMPRÉVISIBLE" + +#: config/tc-arm.c:14959 msgid "bad alignment" -msgstr "segment erroné" +msgstr "mauvais alignement" -#: config/tc-arm.c:13531 -#, fuzzy +#: config/tc-arm.c:14976 msgid "bad list type for instruction" -msgstr "type de relocalisation invalide %d pour l'instruction %s" +msgstr "mauvais type de liste pour l'instruction" -#: config/tc-arm.c:13573 -#, fuzzy +#: config/tc-arm.c:15018 msgid "unsupported alignment for instruction" -msgstr "arguments erronés pour l'instruction" +msgstr "alignement non supporté pour l'instruction" -#: config/tc-arm.c:13592 config/tc-arm.c:13686 config/tc-arm.c:13697 -#: config/tc-arm.c:13707 config/tc-arm.c:13721 -#, fuzzy +#: config/tc-arm.c:15037 config/tc-arm.c:15131 config/tc-arm.c:15142 +#: config/tc-arm.c:15152 config/tc-arm.c:15166 msgid "bad list length" -msgstr "# conflit de longueur" +msgstr "mauvaise longueur de liste" -#: config/tc-arm.c:13597 +#: config/tc-arm.c:15042 msgid "stride of 2 unavailable when element size is 8" -msgstr "" +msgstr "pas de 2 pas disponible quand la taille de l'élément est 8" -#: config/tc-arm.c:13630 config/tc-arm.c:13705 -#, fuzzy +#: config/tc-arm.c:15075 config/tc-arm.c:15150 msgid "can't use alignment with this instruction" -msgstr "Ne peut utiliser une virgule flottante insn dans cette section" +msgstr "un alignement ne peut pas être utilisé avec cette instruction" -#: config/tc-arm.c:13769 -#, fuzzy +#: config/tc-arm.c:15217 msgid "post-index must be a register" -msgstr "Expression .REG doit être un registre" +msgstr "le post-index doit être un registre" -#: config/tc-arm.c:13771 -#, fuzzy +#: config/tc-arm.c:15219 msgid "bad register for post-index" -msgstr "Registre invalide pour un post/pré incrémentation." +msgstr "mauvais registre pour un post-index" -#: config/tc-arm.c:14058 config/tc-arm.c:14144 +#: config/tc-arm.c:15532 config/tc-arm.c:15618 msgid "conditional infixes are deprecated in unified syntax" -msgstr "" +msgstr "les infixes conditionnels sont dépréciés dans la syntaxe unifiée" -#: config/tc-arm.c:14177 -#, c-format -msgid "bad instruction `%s'" -msgstr "instruction « %s » erronée" +#: config/tc-arm.c:15766 +msgid "Warning: conditional outside an IT block for Thumb." +msgstr "Attention: condition hors d'un bloc IT pour Thumb." -#: config/tc-arm.c:14183 -#, fuzzy +#: config/tc-arm.c:15971 msgid "s suffix on comparison instruction is deprecated" -msgstr "fanion pour instruction {c}psr attendu" +msgstr "suffixe s dans une instruction de comparaison est déprécié" -#: config/tc-arm.c:14202 config/tc-arm.c:14283 +#: config/tc-arm.c:15990 #, c-format -msgid "selected processor does not support `%s'" -msgstr "le processeur choisi ne supporte pas « %s »" +msgid "selected processor does not support Thumb mode `%s'" +msgstr "le processeur choisi ne supporte pas le mode Thumb « %s »" -#: config/tc-arm.c:14208 -#, fuzzy +#: config/tc-arm.c:15996 msgid "Thumb does not support conditional execution" -msgstr "cmpu ne supporte pas le code de condition %s" - -#: config/tc-arm.c:14231 -msgid "incorrect condition in IT block" -msgstr "" +msgstr "Thumb ne supporte pas l'exécution conditionnelle" -#: config/tc-arm.c:14237 -msgid "thumb conditional instruction not in IT block" -msgstr "" +#: config/tc-arm.c:16015 +#, c-format +msgid "selected processor does not support Thumb-2 mode `%s'" +msgstr "le processeur choisi ne supporte pas le mode Thumb-2 « %s »" -#: config/tc-arm.c:14257 +#: config/tc-arm.c:16040 #, c-format msgid "cannot honor width suffix -- `%s'" -msgstr "" +msgstr "ne peut honorer le suffixe de largeur -- « %s »" + +#: config/tc-arm.c:16081 +#, c-format +msgid "selected processor does not support ARM mode `%s'" +msgstr "le processeur choisi ne supporte pas le mode ARM « %s »" -#: config/tc-arm.c:14288 +#: config/tc-arm.c:16086 #, c-format msgid "width suffixes are invalid in ARM mode -- `%s'" -msgstr "" +msgstr "les suffixes de largeur sont invalides en mode ARM -- « %s »" -#: config/tc-arm.c:14312 +#: config/tc-arm.c:16119 #, c-format msgid "attempt to use an ARM instruction on a Thumb-only processor -- `%s'" -msgstr "" +msgstr "tentative d'utiliser une instruction ARM sur un processeur ne supportant que Thumb -- « %s »" -#: config/tc-arm.c:17063 -msgid "alignments greater than 32 bytes not supported in .text sections." -msgstr "" -"alignements plus grand que 32 octets ne sont pas supportés dans les sections " -".text" +#: config/tc-arm.c:16136 +#, c-format +msgid "section '%s' finished with an open IT block." +msgstr "la section « %s » s'est terminée avec un bloc IT ouvert." -#: config/tc-arm.c:17357 -msgid "handerdata in cantunwind frame" -msgstr "" +#: config/tc-arm.c:16141 +msgid "file finished with an open IT block." +msgstr "le fichier s'est terminé avec un bloc IT ouvert." + +#: config/tc-arm.c:19172 +#, c-format +msgid "alignments greater than %d bytes not supported in .text sections." +msgstr "alignements plus grand que %d octets ne sont pas supportés dans les sections .text" -#: config/tc-arm.c:17374 +#: config/tc-arm.c:19440 config/tc-ia64.c:3469 +#, c-format +msgid "Group section `%s' has no group signature" +msgstr "La section de groupe « %s » n'a pas de signature de groupe" + +#: config/tc-arm.c:19485 +msgid "handlerdata in cantunwind frame" +msgstr "handlerdata dans un cadre cantunwind" + +#: config/tc-arm.c:19502 msgid "too many unwind opcodes for personality routine 0" -msgstr "" +msgstr "trop d'opcodes unwind pour la routine de personnalité 0" -#: config/tc-arm.c:17406 -#, fuzzy +#: config/tc-arm.c:19534 msgid "too many unwind opcodes" -msgstr "trop d'opérandes" +msgstr "trop d'opcodes unwind" -#: config/tc-arm.c:17940 config/tc-arm.c:18224 -#, fuzzy, c-format +#: config/tc-arm.c:19794 +msgid "GOT already in the symbol table" +msgstr "GOT est déjà dans la table des symboles" + +#: config/tc-arm.c:20132 config/tc-arm.c:20174 config/tc-arm.c:20444 +#, c-format msgid "undefined symbol %s used as an immediate value" -msgstr "zéro utilisé comme valeur immédiate" +msgstr "symbole non défini %s utilisé comme valeur immédiate" + +#: config/tc-arm.c:20134 config/tc-arm.c:20176 +#, c-format +msgid "symbol %s is in a different section" +msgstr "le symbole %s est dans une section différente" -#: config/tc-arm.c:17954 config/tc-arm.c:18263 +#: config/tc-arm.c:20136 config/tc-arm.c:20178 +#, c-format +msgid "symbol %s is weak and may be overridden later" +msgstr "le symbole %s est faible et pourrait être remplacé plus tard" + +#: config/tc-arm.c:20155 config/tc-arm.c:20486 #, c-format msgid "invalid constant (%lx) after fixup" -msgstr "constante invalide (%lx) après le correctif" +msgstr "constante invalide (%lx) après le correctif" -#: config/tc-arm.c:17991 +#: config/tc-arm.c:20211 #, c-format msgid "unable to compute ADRL instructions for PC offset of 0x%lx" -msgstr "" -"incapable de calculer les instructions ADRL pour le décalage PC de 0x%lx" +msgstr "incapable de calculer les instructions ADRL pour le décalage PC de 0x%lx" -#: config/tc-arm.c:18026 config/tc-arm.c:18051 +#: config/tc-arm.c:20246 config/tc-arm.c:20271 msgid "invalid literal constant: pool needs to be closer" -msgstr "litéral de constante invalide: le bassin doit être plus près" +msgstr "constante littéral invalide: le bassin doit être plus près" -#: config/tc-arm.c:18029 config/tc-arm.c:18067 +#: config/tc-arm.c:20249 config/tc-arm.c:20287 #, c-format msgid "bad immediate value for offset (%ld)" -msgstr "valeur immédiate erronée pour le décalage (%ld)" +msgstr "valeur immédiate erronée pour l'offset (%ld)" -#: config/tc-arm.c:18053 -#, fuzzy, c-format +#: config/tc-arm.c:20273 +#, c-format msgid "bad immediate value for 8-bit offset (%ld)" -msgstr "valeur immédiate erronée pour le décalage (%ld)" +msgstr "valeur immédiate erronée pour un offset 8 bits (%ld)" -#: config/tc-arm.c:18108 -#, fuzzy +#: config/tc-arm.c:20328 msgid "offset not a multiple of 4" -msgstr "décalage de sauvegarde du registre n'est pas un multiple de %u" +msgstr "l'offset n'est pas un multiple de 4" -#: config/tc-arm.c:18115 config/tc-arm.c:18130 config/tc-arm.c:18145 -#: config/tc-arm.c:18156 config/tc-arm.c:18179 config/tc-arm.c:18774 -#: config/tc-pj.c:498 config/tc-sh.c:4214 +#: config/tc-arm.c:20335 config/tc-arm.c:20350 config/tc-arm.c:20365 +#: config/tc-arm.c:20376 config/tc-arm.c:20399 config/tc-arm.c:21114 +#: config/tc-moxie.c:662 config/tc-pj.c:448 config/tc-sh.c:4281 msgid "offset out of range" -msgstr "décalage hors limite" +msgstr "offset hors limite" -#: config/tc-arm.c:18279 -#, fuzzy +#: config/tc-arm.c:20502 msgid "invalid smc expression" -msgstr "expression swi invalide" +msgstr "expression smc invalide" + +#: config/tc-arm.c:20511 +msgid "invalid hvc expression" +msgstr "expression hvc invalide" -#: config/tc-arm.c:18290 config/tc-arm.c:18299 +#: config/tc-arm.c:20522 config/tc-arm.c:20531 msgid "invalid swi expression" msgstr "expression swi invalide" -#: config/tc-arm.c:18309 +#: config/tc-arm.c:20541 msgid "invalid expression in load/store multiple" msgstr "expression invalide dans chargement/stockage multiples" -#: config/tc-arm.c:18339 -#, fuzzy +#: config/tc-arm.c:20602 +#, c-format +msgid "blx to '%s' an ARM ISA state function changed to bl" +msgstr "blx vers « %s » dans la fonction d'état ARM ISA changé en bl" + +#: config/tc-arm.c:20621 msgid "misaligned branch destination" -msgstr "donnée mal alignées" +msgstr "destination de branchement mal alignée" -#: config/tc-arm.c:18343 config/tc-arm.c:18380 config/tc-arm.c:18394 -#: config/tc-arm.c:18407 config/tc-arm.c:18446 config/tc-arm.c:18471 +#: config/tc-arm.c:20625 config/tc-arm.c:20662 config/tc-arm.c:20676 +#: config/tc-arm.c:20689 config/tc-arm.c:20799 config/tc-arm.c:20817 msgid "branch out of range" -msgstr "branchement hors gammme" +msgstr "branchement hors limite" -#: config/tc-arm.c:18420 -#, fuzzy +#: config/tc-arm.c:20712 msgid "conditional branch out of range" -msgstr "branchement hors gammme" +msgstr "branchement conditionnel hors limite" -#: config/tc-arm.c:18548 -#, fuzzy +#: config/tc-arm.c:20748 +#, c-format +msgid "blx to Thumb func '%s' from Thumb ISA state changed to bl" +msgstr "blx vers fonction Thumb « %s » depuis l'état Thumb ISA changé en bl" + +#: config/tc-arm.c:20805 +msgid "Thumb2 branch out of range" +msgstr "branchement Thumb2 hors limite" + +#: config/tc-arm.c:20888 msgid "rel31 relocation overflow" -msgstr "débordement de relocalisation" +msgstr "débordement de réadressage rel31" -#: config/tc-arm.c:18560 config/tc-arm.c:18583 -#, fuzzy +#: config/tc-arm.c:20900 config/tc-arm.c:20923 msgid "co-processor offset out of range" -msgstr "décalage hors limite" +msgstr "offset du coprocesseur hors limite" -#: config/tc-arm.c:18600 -#, fuzzy, c-format +#: config/tc-arm.c:20940 +#, c-format msgid "invalid offset, target not word aligned (0x%08lX)" -msgstr "" -"décalage invalide, cible n'est pas aligner sur une frontière de mot (0x%08X)" +msgstr "offset invalide, cible n'est pas alignée sur une frontière de mot (0x%08lX)" -#: config/tc-arm.c:18607 config/tc-arm.c:18616 config/tc-arm.c:18624 -#: config/tc-arm.c:18632 config/tc-arm.c:18640 +#: config/tc-arm.c:20947 config/tc-arm.c:20956 config/tc-arm.c:20964 +#: config/tc-arm.c:20972 config/tc-arm.c:20980 #, c-format msgid "invalid offset, value too big (0x%08lX)" -msgstr "décalage invalide, valeur trop grande (0x%08lX)" +msgstr "offset invalide, valeur trop grande (0x%08lX)" -#: config/tc-arm.c:18681 +#: config/tc-arm.c:21021 msgid "invalid Hi register with immediate" -msgstr "registre HI invalide avec une immédiat" +msgstr "registre HI invalide avec une immédiat" -#: config/tc-arm.c:18697 +#: config/tc-arm.c:21037 msgid "invalid immediate for stack address calculation" -msgstr "immédiat invalide pour un calcul d'adresse de pile" +msgstr "immédiat invalide pour un calcul d'adresse de pile" -#: config/tc-arm.c:18705 +#: config/tc-arm.c:21045 #, c-format msgid "invalid immediate for address calculation (value = 0x%08lX)" -msgstr "immédiat invalide pour le calcul d'adresse (valeur = 0x%08lX)" +msgstr "immédiat invalide pour le calcul d'adresse (valeur = 0x%08lX)" -#: config/tc-arm.c:18735 -#, fuzzy, c-format +#: config/tc-arm.c:21075 +#, c-format msgid "invalid immediate: %ld is out of range" -msgstr "immédiat invalide: %ld est trop grand" +msgstr "immédiat invalide: %ld est hors limite" -#: config/tc-arm.c:18747 -#, fuzzy, c-format +#: config/tc-arm.c:21087 +#, c-format msgid "invalid shift value: %ld" -msgstr "valeur de décalage Thumb illégale: %ld" +msgstr "valeur de décalage illégale: %ld" -#: config/tc-arm.c:18826 +#: config/tc-arm.c:21166 #, c-format msgid "the offset 0x%08lX is not representable" -msgstr "" +msgstr "l'offset 0x%08lX n'est pas représentable" -#: config/tc-arm.c:18866 +#: config/tc-arm.c:21206 #, c-format msgid "bad offset 0x%08lX (only 12 bits available for the magnitude)" -msgstr "" +msgstr "mauvais offset 0x%08lX (seulement 12 bits disponibles pour grandeur)" -#: config/tc-arm.c:18905 +#: config/tc-arm.c:21245 #, c-format msgid "bad offset 0x%08lX (only 8 bits available for the magnitude)" -msgstr "" +msgstr "mauvais offset 0x%08lX (seulement 8 bits disponibles pour la grandeur)" -#: config/tc-arm.c:18945 +#: config/tc-arm.c:21285 #, c-format msgid "bad offset 0x%08lX (must be word-aligned)" -msgstr "" +msgstr "mauvais offset 0x%08lX (doit être aligné sur un mot)" -#: config/tc-arm.c:18950 +#: config/tc-arm.c:21290 #, c-format msgid "bad offset 0x%08lX (must be an 8-bit number of words)" -msgstr "" +msgstr "mauvais offset 0x%08lX (doit être un nombre 8-bits de mots)" -#: config/tc-arm.c:18976 config/tc-score.c:5480 +#: config/tc-arm.c:21321 config/tc-score.c:7397 #, c-format msgid "bad relocation fixup type (%d)" -msgstr "type erroné de correctif de relocalisation (%d)" +msgstr "type erroné de correctif de réadressage (%d)" -#: config/tc-arm.c:19079 +#: config/tc-arm.c:21432 msgid "literal referenced across section boundary" -msgstr "litéral référencé à travers une frontière de section" +msgstr "littéral référencé à travers une frontière de section" -#: config/tc-arm.c:19139 +#: config/tc-arm.c:21494 msgid "internal relocation (type: IMMEDIATE) not fixed up" -msgstr "relocalisation interne (type: IMMEDIAT) n'est pas corrigé" +msgstr "réadressage interne (type: IMMÉDIAT) n'est pas corrigé" -#: config/tc-arm.c:19144 +#: config/tc-arm.c:21499 msgid "ADRL used for a symbol not defined in the same file" -msgstr "ADRL utilisé pour un symbole qui n'est pas défini dans le même fichier" +msgstr "ADRL utilisé pour un symbole qui n'est pas défini dans le même fichier" -#: config/tc-arm.c:19159 +#: config/tc-arm.c:21514 #, c-format msgid "undefined local label `%s'" -msgstr "" +msgstr "label local « %s » non défini" -#: config/tc-arm.c:19165 +#: config/tc-arm.c:21520 msgid "internal_relocation (type: OFFSET_IMM) not fixed up" -msgstr "relocalisation interne (type: OFFSET_IMM) n'est pas corrigé" +msgstr "réadressage interne (type: OFFSET_IMM) n'est pas corrigé" -#: config/tc-arm.c:19186 config/tc-cris.c:3925 config/tc-mcore.c:1992 -#: config/tc-mmix.c:2887 config/tc-ns32k.c:2282 config/tc-score.c:5571 +#: config/tc-arm.c:21542 config/tc-cris.c:3984 config/tc-mcore.c:1926 +#: config/tc-microblaze.c:1833 config/tc-mmix.c:2867 config/tc-moxie.c:757 +#: config/tc-ns32k.c:2248 config/tc-score.c:7490 msgid "" msgstr "" -#: config/tc-arm.c:19189 config/tc-arm.c:19210 config/tc-score.c:5573 +#: config/tc-arm.c:21545 config/tc-arm.c:21566 config/tc-score.c:7492 #, c-format msgid "cannot represent %s relocation in this object file format" -msgstr "" -"ne peut représenter la relocalisation %s dans ce format de fichier objet" +msgstr "ne peut représenter le réadressage %s dans ce format de fichier objet" -#: config/tc-arm.c:19444 +#: config/tc-arm.c:21906 #, c-format msgid "%s: unexpected function type: %d" msgstr "%s: type de fonction inattendu: %d" -#: config/tc-arm.c:19534 config/tc-score.c:6592 config/tc-score.c:6608 -#: config/tc-score.c:6613 -msgid "virtual memory exhausted" -msgstr "mémoire virtuelle épuisée" - -#: config/tc-arm.c:19567 +#: config/tc-arm.c:22035 msgid "use of old and new-style options to set CPU type" -msgstr "utilise des options vieilles et nouvelles pour définit le type de CPU" +msgstr "utilise des vieux et nouveaux styles d'options pour définir le type de CPU" -#: config/tc-arm.c:19577 +#: config/tc-arm.c:22045 msgid "use of old and new-style options to set FPU type" -msgstr "utilise des options vieilles et nouvelles pour définit le type de FPU" +msgstr "utilise des vieux et nouveaux styles d'options pour définir le type de FPU" -#: config/tc-arm.c:19652 +#: config/tc-arm.c:22121 msgid "hard-float conflicts with specified fpu" -msgstr "" +msgstr "nombres flottants matériel entrent en conflit avec le fpu spécifié" -#: config/tc-arm.c:19835 +#: config/tc-arm.c:22308 msgid "generate PIC code" -msgstr "générer du code PIC" +msgstr "générer du code PIC" -#: config/tc-arm.c:19836 +#: config/tc-arm.c:22309 msgid "assemble Thumb code" msgstr "assembler en code Thumb" -#: config/tc-arm.c:19837 +#: config/tc-arm.c:22310 msgid "support ARM/Thumb interworking" -msgstr "supporter l'inter-réseautage ARM/Thumb" +msgstr "supporter l'interaction ARM/Thumb" -#: config/tc-arm.c:19839 +#: config/tc-arm.c:22312 msgid "code uses 32-bit program counter" msgstr "le code utilise un compteur de programme de 32 bits" -#: config/tc-arm.c:19840 +#: config/tc-arm.c:22313 msgid "code uses 26-bit program counter" msgstr "le code utilise un compteur de programme de 26 bits" -#: config/tc-arm.c:19841 +#: config/tc-arm.c:22314 msgid "floating point args are in fp regs" msgstr "arguments en virgule flottante sont dans les registres FP" -#: config/tc-arm.c:19843 +#: config/tc-arm.c:22316 msgid "re-entrant code" -msgstr "code ré-entrant" +msgstr "code réentrant" -#: config/tc-arm.c:19844 +#: config/tc-arm.c:22317 msgid "code is ATPCS conformant" msgstr "code est conforme ATPCS" -#: config/tc-arm.c:19845 +#: config/tc-arm.c:22318 msgid "assemble for big-endian" -msgstr "assembler pour un système à octets de poids fort" +msgstr "assembler pour un système à octets de poids fort" -#: config/tc-arm.c:19846 +#: config/tc-arm.c:22319 msgid "assemble for little-endian" -msgstr "assembler pour un système à octets de poids faible" +msgstr "assembler pour un système à octets de poids faible" #. These are recognized by the assembler, but have no affect on code. -#: config/tc-arm.c:19850 +#: config/tc-arm.c:22323 msgid "use frame pointer" msgstr "utiliser le pointeur de trame" -#: config/tc-arm.c:19851 +#: config/tc-arm.c:22324 msgid "use stack size checking" -msgstr "utiliser la vérification de la taille de la pile" +msgstr "utiliser la vérification de la taille de la pile" + +#: config/tc-arm.c:22327 +msgid "do not warn on use of deprecated feature" +msgstr "ne pas avertir en cas d'utilisation d'une fonctionnalité dépréciée" #. DON'T add any new processors to this list -- we want the whole list #. to go away... Add them to the processors table instead. -#: config/tc-arm.c:19867 config/tc-arm.c:19868 +#: config/tc-arm.c:22344 config/tc-arm.c:22345 msgid "use -mcpu=arm1" msgstr "utiliser -mcpu=arm1" -#: config/tc-arm.c:19869 config/tc-arm.c:19870 +#: config/tc-arm.c:22346 config/tc-arm.c:22347 msgid "use -mcpu=arm2" msgstr "utiliser -mcpu=arm2" -#: config/tc-arm.c:19871 config/tc-arm.c:19872 +#: config/tc-arm.c:22348 config/tc-arm.c:22349 msgid "use -mcpu=arm250" msgstr "utiliser -mcpu=arm250" -#: config/tc-arm.c:19873 config/tc-arm.c:19874 +#: config/tc-arm.c:22350 config/tc-arm.c:22351 msgid "use -mcpu=arm3" msgstr "utiliser -mcpu=arm3" -#: config/tc-arm.c:19875 config/tc-arm.c:19876 +#: config/tc-arm.c:22352 config/tc-arm.c:22353 msgid "use -mcpu=arm6" msgstr "utiliser -mcpu=arm6" -#: config/tc-arm.c:19877 config/tc-arm.c:19878 +#: config/tc-arm.c:22354 config/tc-arm.c:22355 msgid "use -mcpu=arm600" msgstr "utiliser -mcpu=arm600" -#: config/tc-arm.c:19879 config/tc-arm.c:19880 +#: config/tc-arm.c:22356 config/tc-arm.c:22357 msgid "use -mcpu=arm610" msgstr "utiliser -mcpu=arm610" -#: config/tc-arm.c:19881 config/tc-arm.c:19882 +#: config/tc-arm.c:22358 config/tc-arm.c:22359 msgid "use -mcpu=arm620" msgstr "utiliser -mcpu=arm620" -#: config/tc-arm.c:19883 config/tc-arm.c:19884 +#: config/tc-arm.c:22360 config/tc-arm.c:22361 msgid "use -mcpu=arm7" msgstr "utiliser -mcpu=arm7" -#: config/tc-arm.c:19885 config/tc-arm.c:19886 +#: config/tc-arm.c:22362 config/tc-arm.c:22363 msgid "use -mcpu=arm70" msgstr "utiliser -mcpu=arm70" -#: config/tc-arm.c:19887 config/tc-arm.c:19888 +#: config/tc-arm.c:22364 config/tc-arm.c:22365 msgid "use -mcpu=arm700" msgstr "utiliser -mcpu=arm700" -#: config/tc-arm.c:19889 config/tc-arm.c:19890 +#: config/tc-arm.c:22366 config/tc-arm.c:22367 msgid "use -mcpu=arm700i" msgstr "utiliser -mcpu=arm700i" -#: config/tc-arm.c:19891 config/tc-arm.c:19892 +#: config/tc-arm.c:22368 config/tc-arm.c:22369 msgid "use -mcpu=arm710" msgstr "utiliser -mcpu=arm710" -#: config/tc-arm.c:19893 config/tc-arm.c:19894 +#: config/tc-arm.c:22370 config/tc-arm.c:22371 msgid "use -mcpu=arm710c" msgstr "utiliser -mcpu=arm710c" -#: config/tc-arm.c:19895 config/tc-arm.c:19896 +#: config/tc-arm.c:22372 config/tc-arm.c:22373 msgid "use -mcpu=arm720" msgstr "utiliser -mcpu=arm720" -#: config/tc-arm.c:19897 config/tc-arm.c:19898 +#: config/tc-arm.c:22374 config/tc-arm.c:22375 msgid "use -mcpu=arm7d" msgstr "utiliser -mcpu=arm7d" -#: config/tc-arm.c:19899 config/tc-arm.c:19900 +#: config/tc-arm.c:22376 config/tc-arm.c:22377 msgid "use -mcpu=arm7di" msgstr "utiliser -mcpu=arm7di" -#: config/tc-arm.c:19901 config/tc-arm.c:19902 +#: config/tc-arm.c:22378 config/tc-arm.c:22379 msgid "use -mcpu=arm7m" msgstr "utiliser -mcpu=arm7m" -#: config/tc-arm.c:19903 config/tc-arm.c:19904 +#: config/tc-arm.c:22380 config/tc-arm.c:22381 msgid "use -mcpu=arm7dm" msgstr "utiliser -mcpu=arm7dm" -#: config/tc-arm.c:19905 config/tc-arm.c:19906 +#: config/tc-arm.c:22382 config/tc-arm.c:22383 msgid "use -mcpu=arm7dmi" msgstr "utiliser -mcpu=arm7dmi" -#: config/tc-arm.c:19907 config/tc-arm.c:19908 +#: config/tc-arm.c:22384 config/tc-arm.c:22385 msgid "use -mcpu=arm7100" msgstr "utiliser -mcpu=arm7100" -#: config/tc-arm.c:19909 config/tc-arm.c:19910 +#: config/tc-arm.c:22386 config/tc-arm.c:22387 msgid "use -mcpu=arm7500" msgstr "utiliser -mcpu=arm7500" -#: config/tc-arm.c:19911 config/tc-arm.c:19912 +#: config/tc-arm.c:22388 config/tc-arm.c:22389 msgid "use -mcpu=arm7500fe" msgstr "utiliser -mcpu=arm7500fe" -#: config/tc-arm.c:19913 config/tc-arm.c:19914 config/tc-arm.c:19915 -#: config/tc-arm.c:19916 +#: config/tc-arm.c:22390 config/tc-arm.c:22391 config/tc-arm.c:22392 +#: config/tc-arm.c:22393 msgid "use -mcpu=arm7tdmi" msgstr "utiliser -mcpu=arm7tdmi" -#: config/tc-arm.c:19917 config/tc-arm.c:19918 +#: config/tc-arm.c:22394 config/tc-arm.c:22395 msgid "use -mcpu=arm710t" msgstr "utiliser -mcpu=arm710t" -#: config/tc-arm.c:19919 config/tc-arm.c:19920 +#: config/tc-arm.c:22396 config/tc-arm.c:22397 msgid "use -mcpu=arm720t" msgstr "utiliser -mcpu=arm720t" -#: config/tc-arm.c:19921 config/tc-arm.c:19922 +#: config/tc-arm.c:22398 config/tc-arm.c:22399 msgid "use -mcpu=arm740t" msgstr "utiliser -mcpu=arm740t" -#: config/tc-arm.c:19923 config/tc-arm.c:19924 +#: config/tc-arm.c:22400 config/tc-arm.c:22401 msgid "use -mcpu=arm8" msgstr "utiliser -mcpu=arm8" -#: config/tc-arm.c:19925 config/tc-arm.c:19926 +#: config/tc-arm.c:22402 config/tc-arm.c:22403 msgid "use -mcpu=arm810" msgstr "utiliser -mcpu=arm810" -#: config/tc-arm.c:19927 config/tc-arm.c:19928 +#: config/tc-arm.c:22404 config/tc-arm.c:22405 msgid "use -mcpu=arm9" msgstr "utiliser -mcpu=arm9" -#: config/tc-arm.c:19929 config/tc-arm.c:19930 +#: config/tc-arm.c:22406 config/tc-arm.c:22407 msgid "use -mcpu=arm9tdmi" msgstr "utiliser -mcpu=arm9tdmi" -#: config/tc-arm.c:19931 config/tc-arm.c:19932 +#: config/tc-arm.c:22408 config/tc-arm.c:22409 msgid "use -mcpu=arm920" msgstr "utiliser -mcpu=arm920" -#: config/tc-arm.c:19933 config/tc-arm.c:19934 +#: config/tc-arm.c:22410 config/tc-arm.c:22411 msgid "use -mcpu=arm940" msgstr "utiliser -mcpu=arm940" -#: config/tc-arm.c:19935 +#: config/tc-arm.c:22412 msgid "use -mcpu=strongarm" msgstr "utiliser -mcpu=strongarm" -#: config/tc-arm.c:19937 +#: config/tc-arm.c:22414 msgid "use -mcpu=strongarm110" msgstr "utiliser -mcpu=strongarm110" -#: config/tc-arm.c:19939 +#: config/tc-arm.c:22416 msgid "use -mcpu=strongarm1100" msgstr "utiliser -mcpu=strongarm1100" -#: config/tc-arm.c:19941 +#: config/tc-arm.c:22418 msgid "use -mcpu=strongarm1110" msgstr "utiliser -mcpu=strongarm1110" -#: config/tc-arm.c:19942 +#: config/tc-arm.c:22419 msgid "use -mcpu=xscale" msgstr "utiliser -mcpu=xscale" -#: config/tc-arm.c:19943 +#: config/tc-arm.c:22420 msgid "use -mcpu=iwmmxt" msgstr "utiliser -mcpu=iwmmxt" -#: config/tc-arm.c:19944 +#: config/tc-arm.c:22421 msgid "use -mcpu=all" msgstr "utiliser -mcpu=all" #. Architecture variants -- don't add any more to this list either. -#: config/tc-arm.c:19947 config/tc-arm.c:19948 +#: config/tc-arm.c:22424 config/tc-arm.c:22425 msgid "use -march=armv2" msgstr "utiliser -march=armv2" -#: config/tc-arm.c:19949 config/tc-arm.c:19950 +#: config/tc-arm.c:22426 config/tc-arm.c:22427 msgid "use -march=armv2a" msgstr "utiliser -march=armv2a" -#: config/tc-arm.c:19951 config/tc-arm.c:19952 +#: config/tc-arm.c:22428 config/tc-arm.c:22429 msgid "use -march=armv3" msgstr "utiliser -march=armv3" -#: config/tc-arm.c:19953 config/tc-arm.c:19954 +#: config/tc-arm.c:22430 config/tc-arm.c:22431 msgid "use -march=armv3m" msgstr "utiliser -march=armv3m" -#: config/tc-arm.c:19955 config/tc-arm.c:19956 +#: config/tc-arm.c:22432 config/tc-arm.c:22433 msgid "use -march=armv4" msgstr "utiliser -march=armv4" -#: config/tc-arm.c:19957 config/tc-arm.c:19958 +#: config/tc-arm.c:22434 config/tc-arm.c:22435 msgid "use -march=armv4t" msgstr "utiliser -march=armv4t" -#: config/tc-arm.c:19959 config/tc-arm.c:19960 +#: config/tc-arm.c:22436 config/tc-arm.c:22437 msgid "use -march=armv5" msgstr "utiliser -march=armv5" -#: config/tc-arm.c:19961 config/tc-arm.c:19962 +#: config/tc-arm.c:22438 config/tc-arm.c:22439 msgid "use -march=armv5t" -msgstr "utilsier -march=armv5t" +msgstr "utiliser -march=armv5t" -#: config/tc-arm.c:19963 config/tc-arm.c:19964 +#: config/tc-arm.c:22440 config/tc-arm.c:22441 msgid "use -march=armv5te" msgstr "utiliser -march=armv5te" #. Floating point variants -- don't add any more to this list either. -#: config/tc-arm.c:19967 +#: config/tc-arm.c:22444 msgid "use -mfpu=fpe" msgstr "utiliser -mfpu=fpe" -#: config/tc-arm.c:19968 +#: config/tc-arm.c:22445 msgid "use -mfpu=fpa10" msgstr "utiliser -mfpu=fpa10" -#: config/tc-arm.c:19969 +#: config/tc-arm.c:22446 msgid "use -mfpu=fpa11" msgstr "utiliser -mfpu=fpa11" -#: config/tc-arm.c:19971 +#: config/tc-arm.c:22448 msgid "use either -mfpu=softfpa or -mfpu=softvfp" msgstr "utiliser soit -mfpu=softfpa ou -mfpu=softvfp" -#: config/tc-arm.c:20232 +#: config/tc-arm.c:22772 msgid "invalid architectural extension" msgstr "extension d'architecture invalide" -#: config/tc-arm.c:20246 +#: config/tc-arm.c:22805 +msgid "must specify extensions to add before specifying those to remove" +msgstr "vous devez spécifier les extensions à ajouter avant celles à retirer" + +#: config/tc-arm.c:22813 msgid "missing architectural extension" msgstr "extension d'architecture manquante" -#: config/tc-arm.c:20259 +#: config/tc-arm.c:22828 +msgid "extension does not apply to the base architecture" +msgstr "l'extension ne s'applique pas à l'architecture de base" + +#: config/tc-arm.c:22851 #, c-format -msgid "unknown architectural extnsion `%s'" -msgstr "extension d'architecture inconnue « %s »" +msgid "unknown architectural extension `%s'" +msgstr "extension d'architecture inconnue « %s »" -#: config/tc-arm.c:20283 +#: config/tc-arm.c:22853 +msgid "architectural extensions must be specified in alphabetical order" +msgstr "les extensions d'architecture doivent être spécifiées dans l'ordre alphabétique" + +#: config/tc-arm.c:22885 #, c-format msgid "missing cpu name `%s'" -msgstr "nom de cpu manquant « %s »" +msgstr "nom de cpu manquant « %s »" -#: config/tc-arm.c:20308 config/tc-arm.c:20693 +#: config/tc-arm.c:22911 config/tc-arm.c:23401 #, c-format msgid "unknown cpu `%s'" -msgstr "cpu inconnu « %s »" +msgstr "cpu inconnu « %s »" -#: config/tc-arm.c:20326 +#: config/tc-arm.c:22929 #, c-format msgid "missing architecture name `%s'" -msgstr "nom d'architecture manquante « %s »" +msgstr "nom d'architecture manquante « %s »" -#: config/tc-arm.c:20343 config/tc-arm.c:20727 config/tc-arm.c:20758 +#: config/tc-arm.c:22946 config/tc-arm.c:23435 config/tc-arm.c:23466 +#: config/tc-arm.c:23517 config/tc-score.c:7727 #, c-format msgid "unknown architecture `%s'\n" -msgstr "architecture inconnue « %s »\n" +msgstr "architecture inconnue « %s »\n" -#: config/tc-arm.c:20359 config/tc-arm.c:20789 +#: config/tc-arm.c:22962 config/tc-arm.c:23548 #, c-format msgid "unknown floating point format `%s'\n" -msgstr "format de virgule flottante inconnu « %s »\n" +msgstr "format de virgule flottante inconnu « %s »\n" -#: config/tc-arm.c:20375 -#, fuzzy, c-format +#: config/tc-arm.c:22978 +#, c-format msgid "unknown floating point abi `%s'\n" -msgstr "format de virgule flottante inconnu « %s »\n" +msgstr "ABI virgule flottante inconnue « %s »\n" -#: config/tc-arm.c:20391 -#, fuzzy, c-format +#: config/tc-arm.c:22994 +#, c-format msgid "unknown EABI `%s'\n" -msgstr "cpu inconnu « %s »" +msgstr "EABI inconnue « %s »\n" + +#: config/tc-arm.c:23014 +#, c-format +msgid "unknown implicit IT mode `%s', should be arm, thumb, always, or never." +msgstr "mode IT implicite « %s » inconnu, devrait être arm, thumb, always ou never." -#: config/tc-arm.c:20398 +#: config/tc-arm.c:23024 msgid "\t assemble for CPU " -msgstr "'nom>\t assembler pour le CPU " +msgstr "\t assembler pour le CPU " -#: config/tc-arm.c:20400 +#: config/tc-arm.c:23026 msgid "\t assemble for architecture " -msgstr "\t assembler pour l'architecture " +msgstr "\t assembler pour l'architecture " -#: config/tc-arm.c:20402 +#: config/tc-arm.c:23028 msgid "\t assemble for FPU architecture " -msgstr "\t assembler pour l'architecture FPU " +msgstr "\t assembler pour l'architecture FPU " -#: config/tc-arm.c:20404 +#: config/tc-arm.c:23030 msgid "\t assemble for floating point ABI " -msgstr "" +msgstr "\t assembler pour l'ABI virgule flottante " -#: config/tc-arm.c:20407 -msgid "\t assemble for eabi version " -msgstr "" +#: config/tc-arm.c:23033 +msgid "\t\t assemble for eabi version " +msgstr "\t\t assembler pour la version eabi " + +#: config/tc-arm.c:23036 +msgid "\t controls implicit insertion of IT instructions" +msgstr "\t contrôle l'insertion implicite d'instructions IT" -#: config/tc-arm.c:20449 config/tc-arm.c:20469 config/tc-arm.c:20491 +#: config/tc-arm.c:23080 config/tc-arm.c:23098 config/tc-arm.c:23118 #, c-format msgid "option `-%c%s' is deprecated: %s" -msgstr "option « -%c%s » est déprécié: %s" +msgstr "option « -%c%s » est dépréciée: %s" -#: config/tc-arm.c:20512 +#: config/tc-arm.c:23138 #, c-format msgid " ARM-specific assembler options:\n" -msgstr "Options en assembleur spécifiques ARM:\n" +msgstr "Options en assembleur spécifiques ARM:\n" -#: config/tc-arm.c:20523 +#: config/tc-arm.c:23149 #, c-format msgid " -EB assemble code for a big-endian cpu\n" -msgstr "" -" -EB assembler le code pour un système de poids fort\n" +msgstr " -EB assembler le code pour un système de poids fort\n" -#: config/tc-arm.c:20528 +#: config/tc-arm.c:23154 #, c-format msgid " -EL assemble code for a little-endian cpu\n" -msgstr "" -" -EL assembler le code pour un système de poids faible\n" +msgstr " -EL assembler le code pour un système de poids faible\n" + +#: config/tc-arm.c:23158 +#, c-format +msgid " --fix-v4bx Allow BX in ARMv4 code\n" +msgstr " --fix-v4bx Autoriser BX dans du code ARMv4\n" -#: config/tc-avr.c:262 +#: config/tc-arm.c:23499 +#, c-format +msgid "architectural extension `%s' is not allowed for the current base architecture" +msgstr "l'extension d'architecture « %s » n'est pas permise pour l'architecture de base actuelle" + +#: config/tc-avr.c:336 #, c-format msgid "Known MCU names:" msgstr "Noms MCU connus:" -#: config/tc-avr.c:328 +#: config/tc-avr.c:401 #, c-format msgid "" "AVR options:\n" " -mmcu=[avr-name] select microcontroller variant\n" " [avr-name] can be:\n" -" avr1 - AT90S1200, ATtiny1x, ATtiny28\n" -" avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n" -" avr3 - ATmega103, ATmega603\n" -" avr4 - ATmega83, ATmega85\n" -" avr5 - ATmega161, ATmega163, ATmega32, AT94K\n" +" avr1 - classic AVR core without data RAM\n" +" avr2 - classic AVR core with up to 8K program memory\n" +" avr25 - classic AVR core with up to 8K program memory\n" +" plus the MOVW instruction\n" +" avr3 - classic AVR core with up to 64K program memory\n" +" avr31 - classic AVR core with up to 128K program memory\n" +" avr35 - classic AVR core with up to 64K program memory\n" +" plus the MOVW instruction\n" +" avr4 - enhanced AVR core with up to 8K program memory\n" +" avr5 - enhanced AVR core with up to 64K program memory\n" +" avr51 - enhanced AVR core with up to 128K program memory\n" +" avr6 - enhanced AVR core with up to 256K program memory\n" " or immediate microcontroller name.\n" msgstr "" -"Options AVR:\n" -" -mmcu=[nom-avr] sélectionner la variante du micro-contrôleur\n" -" [nom-avr] peut être:\n" -" avr1 - AT90S1200, ATtiny1x, ATtiny28\n" -" avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n" -" avr3 - ATmega103, ATmega603\n" -" avr4 - ATmega83, ATmega85\n" -" avr5 - ATmega161, ATmega163, ATmega32, AT94K\n" -" ou un nom immédiat de micro-contrôleur\n" - -#: config/tc-avr.c:338 +"options AVR\n" +" -mmcu=[avr-nom] choisi la variante de microcontrôleur\n" +" [avr-nom] peut être:\n" +" avr1 - coeur AVR classique dans RAM données\n" +" avr2 - coeur AVR classique avec jusqu'à 8K de mémoire programme\n" +" avr25 - coeur AVR classique avec jusqu'à 8K de mémoire programme\n" +" plus l'instruction MOVW\n" +" avr3 - coeur AVR classique avec jusqu'à 64K de mémoire programme\n" +" avr31 - coeur AVR classique avec jusqu'à 128K de mémoire programme\n" +" avr35 - coeur AVR classique avec jusqu'à 64K de mémoire programme\n" +" plus l'instruction MOVW\n" +" avr4 - coeur AVR amélioré avec jusqu'à 8K de mémoire programme\n" +" avr5 - coeur AVR amélioré avec jusqu'à 64K de mémoire programme\n" +" avr51 - coeur AVR amélioré avec jusqu'à 128K de mémoire programme\n" +" avr6 - coeur AVR amélioré avec jusqu'à 256K de mémoire programme\n" +" or immédiatement le nom du microcontrôleur.\n" + +#: config/tc-avr.c:418 #, c-format msgid "" " -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" @@ -3361,805 +3625,852 @@ msgid "" " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" " (default for avr3, avr5)\n" msgstr "" -" -mall-opcodes accepter tous les opcode AVR, même non supportés par MCU\n" -" -mno-skip-bug désactiver les avertissements pour l'escamotage des\n" -" instructions de 2 mots (par défaut pour avr4, avr5)\n" -" -mno-wrap rejeter les instructions rjmp/rcall avec un emballage de " -"8K\n" -" (par défaut pour avr3, avr5)\n" +" -mall-opcodes accepter tous les opcode AVR, même non supportés par MCU\n" +" -mno-skip-bug désactiver les avertissements pour l'escamotage des\n" +" instructions de 2 mots (par défaut pour avr4, avr5)\n" +" -mno-wrap rejeter les instructions rjmp/rcall avec un emballage de 8K\n" +" (par défaut pour avr3, avr5)\n" -#: config/tc-avr.c:382 config/tc-msp430.c:747 +#: config/tc-avr.c:462 config/tc-msp430.c:743 #, c-format msgid "unknown MCU: %s\n" msgstr "MCU inconnue: %s\n" -#: config/tc-avr.c:391 +#: config/tc-avr.c:471 #, c-format msgid "redefinition of mcu type `%s' to `%s'" -msgstr "redéfinition du type MCU « %s» à «%s »" - -#: config/tc-avr.c:438 config/tc-cr16.c:699 config/tc-crx.c:491 -#: config/tc-d10v.c:277 config/tc-d30v.c:311 config/tc-maxq.c:411 -#: config/tc-mips.c:10773 config/tc-mmix.c:2263 config/tc-mn10200.c:341 -#: config/tc-msp430.c:871 config/tc-pj.c:341 config/tc-ppc.c:5236 -#: config/tc-sh.c:3076 config/tc-v850.c:1198 -msgid "bad call to md_atof" -msgstr "appel erroné à md_atof" +msgstr "redéfinition du type MCU « %s » en « %s »" -#: config/tc-avr.c:505 +#: config/tc-avr.c:549 msgid "constant value required" msgstr "valeur constante requise" -#: config/tc-avr.c:508 -#, fuzzy, c-format +#: config/tc-avr.c:552 +#, c-format msgid "number must be positive and less than %d" -msgstr "le nombre doit être plus petit que %d" +msgstr "le nombre doit être positif et plus petit que %d" -#: config/tc-avr.c:534 config/tc-avr.c:669 +#: config/tc-avr.c:578 config/tc-avr.c:715 #, c-format msgid "constant out of 8-bit range: %d" msgstr "constante hors limite pour les bornes de 8 bits: %d" -#: config/tc-avr.c:602 config/tc-score.c:974 read.c:3564 +#: config/tc-avr.c:646 config/tc-score.c:1200 read.c:3676 msgid "illegal expression" -msgstr "expression illégale" +msgstr "expression illégale" -#: config/tc-avr.c:631 config/tc-avr.c:1390 +#: config/tc-avr.c:675 config/tc-avr.c:1451 msgid "`)' required" -msgstr "« ) » requis" - -#: config/tc-avr.c:652 -#, fuzzy -msgid "expression dangerous with linker stubs" -msgstr "expression n'entre pas dans un OCTET" +msgstr "« ) » requis" -#: config/tc-avr.c:724 +#: config/tc-avr.c:770 msgid "register r16-r23 required" -msgstr "resigstres r16-R32 requis" +msgstr "registres r16-r23 requis" -#: config/tc-avr.c:730 +#: config/tc-avr.c:776 msgid "register number above 15 required" -msgstr "Numéro de registre au-dessus de 15 est requis" +msgstr "numéro de registre au-dessus de 15 requis" -#: config/tc-avr.c:736 +#: config/tc-avr.c:782 msgid "even register number required" -msgstr "numéro paire de registre est requis" +msgstr "numéro paire de registre requis" -#: config/tc-avr.c:742 +#: config/tc-avr.c:788 msgid "register r24, r26, r28 or r30 required" -msgstr "registre R24, R26, R28 ou R30 est requis" +msgstr "registre r24, r26, r28 ou r30 requis" -#: config/tc-avr.c:748 +#: config/tc-avr.c:794 msgid "register name or number from 0 to 31 required" -msgstr "nom de registre ou numéro de registre 0 à 31 est requis" +msgstr "nom de registre ou numéro de registre 0 à 31 requis" -#: config/tc-avr.c:766 +#: config/tc-avr.c:812 msgid "pointer register (X, Y or Z) required" -msgstr "registre de pointeur (X, Y ou Z) est requist" +msgstr "registre de pointeur (X, Y ou Z) requis" -#: config/tc-avr.c:773 +#: config/tc-avr.c:819 msgid "cannot both predecrement and postincrement" -msgstr "ne peut à la fois pré-décrémenter et post-décrémenter" +msgstr "ne peut pré-décrémenter et post-incrémenter en même temps" -#: config/tc-avr.c:781 +#: config/tc-avr.c:827 msgid "addressing mode not supported" -msgstr "mode d'adressage non supporté" +msgstr "mode d'adressage non supporté" -#: config/tc-avr.c:787 +#: config/tc-avr.c:833 msgid "can't predecrement" -msgstr "ne peut faire une pré-décrémentation" +msgstr "ne peut faire une pré-décrémentation" -#: config/tc-avr.c:790 +#: config/tc-avr.c:836 msgid "pointer register Z required" -msgstr "registre de pointeurs Z requis" +msgstr "registre de pointeur Z requis" + +#: config/tc-avr.c:850 +msgid "postincrement not supported" +msgstr "post-incrémentation pas supportée" -#: config/tc-avr.c:808 +#: config/tc-avr.c:860 msgid "pointer register (Y or Z) required" -msgstr "registre de pointeurs (Y ou Z) requis" +msgstr "registre de pointeur (Y ou Z) requis" -#: config/tc-avr.c:912 +#: config/tc-avr.c:964 #, c-format msgid "unknown constraint `%c'" -msgstr "contrainte inconnue « %c »" +msgstr "contrainte inconnue « %c »" -#: config/tc-avr.c:964 +#: config/tc-avr.c:1016 msgid "`,' required" -msgstr "« , » requis" +msgstr "« , » requis" -#: config/tc-avr.c:982 +#: config/tc-avr.c:1034 msgid "undefined combination of operands" -msgstr "combinaison d'opérandes indéfinie" +msgstr "combinaison d'opérandes indéfinie" -#: config/tc-avr.c:991 +#: config/tc-avr.c:1043 msgid "skipping two-word instruction" msgstr "escamotage d'une instruction de 2 mots" -#: config/tc-avr.c:1083 config/tc-avr.c:1099 config/tc-avr.c:1213 -#: config/tc-msp430.c:2009 config/tc-msp430.c:2027 +#: config/tc-avr.c:1135 config/tc-avr.c:1151 config/tc-avr.c:1272 +#: config/tc-msp430.c:1969 config/tc-msp430.c:1987 #, c-format msgid "odd address operand: %ld" -msgstr "opérande d'adresse impaire: %ld" +msgstr "opérande d'adresse impaire: %ld" -#: config/tc-avr.c:1091 config/tc-avr.c:1110 config/tc-avr.c:1132 -#: config/tc-avr.c:1139 config/tc-avr.c:1146 config/tc-d10v.c:537 -#: config/tc-d30v.c:588 config/tc-msp430.c:2017 config/tc-msp430.c:2032 -#: config/tc-msp430.c:2042 +#: config/tc-avr.c:1143 config/tc-avr.c:1162 config/tc-avr.c:1180 +#: config/tc-avr.c:1191 config/tc-avr.c:1198 config/tc-avr.c:1205 +#: config/tc-d10v.c:505 config/tc-d30v.c:554 config/tc-msp430.c:1977 +#: config/tc-msp430.c:1992 config/tc-msp430.c:2002 #, c-format msgid "operand out of range: %ld" -msgstr "opérande hors limite: %ld" +msgstr "opérande hors limite: %ld" -#: config/tc-avr.c:1222 config/tc-d10v.c:1619 config/tc-d30v.c:2059 -#: config/tc-msp430.c:2060 +#: config/tc-avr.c:1281 config/tc-d10v.c:1594 config/tc-d30v.c:2037 +#: config/tc-msp430.c:2020 #, c-format msgid "line %d: unknown relocation type: 0x%x" -msgstr "ligne %d: type de relocalisation inconnu: 0x%x" +msgstr "ligne %d: type de réadressage inconnu: 0x%x" -#: config/tc-avr.c:1236 +#: config/tc-avr.c:1295 msgid "only constant expression allowed" -msgstr "seule une expression de constante est permise" +msgstr "seule une expression constante est permise" #. xgettext:c-format. -#: config/tc-avr.c:1296 config/tc-bfin.c:771 config/tc-d10v.c:1491 -#: config/tc-d30v.c:1803 config/tc-mn10200.c:813 config/tc-mn10300.c:2311 -#: config/tc-msp430.c:2095 config/tc-or32.c:1017 config/tc-ppc.c:6115 -#: config/tc-spu.c:880 config/tc-spu.c:1067 config/tc-v850.c:2219 -#: config/tc-z80.c:2017 +#: config/tc-avr.c:1355 config/tc-bfin.c:828 config/tc-d10v.c:1466 +#: config/tc-d30v.c:1774 config/tc-mn10200.c:781 config/tc-mn10300.c:2170 +#: config/tc-msp430.c:2055 config/tc-or32.c:957 config/tc-ppc.c:6383 +#: config/tc-spu.c:879 config/tc-spu.c:1090 config/tc-v850.c:3000 +#: config/tc-z80.c:2012 #, c-format msgid "reloc %d not supported by object file format" -msgstr "relocalisation %d n'est pas supporté dans le format du fichier objet" +msgstr "réadressage %d n'est pas supporté dans le format du fichier objet" -#: config/tc-avr.c:1319 config/tc-h8300.c:1866 config/tc-mcore.c:881 -#: config/tc-msp430.c:1860 config/tc-pj.c:253 config/tc-sh.c:2544 -#: config/tc-z8k.c:1216 +#: config/tc-avr.c:1378 config/tc-h8300.c:1935 config/tc-mcore.c:881 +#: config/tc-microblaze.c:823 config/tc-moxie.c:178 config/tc-msp430.c:1820 +#: config/tc-pj.c:253 config/tc-sh.c:2590 config/tc-z8k.c:1216 msgid "can't find opcode " -msgstr "ne peut repérer le opcode " +msgstr "ne peut repérer l'opcode " -#: config/tc-avr.c:1336 +#: config/tc-avr.c:1395 #, c-format msgid "illegal opcode %s for mcu %s" -msgstr "opcode illégale %s pour MCU %s" +msgstr "opcode %s illégal pour MCU %s" -#: config/tc-avr.c:1345 +#: config/tc-avr.c:1406 msgid "garbage at end of line" -msgstr "rebut à la fin de la ligne" +msgstr "rebut à la fin de la ligne" -#: config/tc-avr.c:1417 config/tc-avr.c:1424 +#: config/tc-avr.c:1480 config/tc-avr.c:1487 #, c-format msgid "illegal %srelocation size: %d" -msgstr "taille des %srelocalisations illégale: %d" +msgstr "taille des %sréadressages illégale: %d" + +#: config/tc-bfin.c:96 config/tc-frv.c:1605 config/tc-frv.c:1615 +msgid "missing ')'" +msgstr "« ) » manquant" + +#: config/tc-bfin.c:437 +#, c-format +msgid " Blackfin specific assembler options:\n" +msgstr " Options en assembleur spécifiques Blackfin:\n" + +#: config/tc-bfin.c:438 +#, c-format +msgid " -mcpu= specify the name of the target CPU\n" +msgstr " -mcpu= spécifie le nom du CPU cible\n" + +#: config/tc-bfin.c:439 +#, c-format +msgid " -mfdpic assemble for the FDPIC ABI\n" +msgstr " -mfdpic assembler pour l'ABI FDPIC\n" + +#: config/tc-bfin.c:440 +#, c-format +msgid " -mno-fdpic/-mnopic disable -mfdpic\n" +msgstr " -mno-fdpic/-mnopic désactiver -mfdpic\n" + +#: config/tc-bfin.c:453 +msgid "Could not set architecture and machine." +msgstr "N'a pu initialiser l'architecture et la machine" -#: config/tc-bfin.c:338 -#, fuzzy, c-format -msgid " BFIN specific command line options:\n" -msgstr " Options spécifiques de la ligne de commande FR30:\n" +#: config/tc-bfin.c:602 +msgid "Parse failed." +msgstr "L'analyse a échoué." -#: config/tc-cr16.c:159 read.c:4275 +#: config/tc-bfin.c:677 +msgid "pcrel too far BFD_RELOC_BFIN_10" +msgstr "pcrel trop éloigné BFD_RELOC_BFIN_10" + +#: config/tc-bfin.c:693 +msgid "pcrel too far BFD_RELOC_BFIN_12" +msgstr "pcrel trop éloigné BFD_RELOC_BFIN_12" + +#: config/tc-bfin.c:713 +msgid "pcrel too far BFD_RELOC_BFIN_24" +msgstr "pcrel trop éloigné BFD_RELOC_BFIN_24" + +#: config/tc-bfin.c:728 +msgid "pcrel too far BFD_RELOC_BFIN_5" +msgstr "pcrel trop éloigné BFD_RELOC_BFIN_5" + +#: config/tc-bfin.c:740 +msgid "pcrel too far BFD_RELOC_BFIN_11_PCREL" +msgstr "pcrel trop éloigné BFD_RELOC_BFIN_11_PCREL" + +#: config/tc-bfin.c:750 +msgid "rel too far BFD_RELOC_8" +msgstr "rel trop éloigné BFD_RELOC_8" + +#: config/tc-bfin.c:757 +msgid "rel too far BFD_RELOC_16" +msgstr "rel trop éloigné BFD_RELOC_16" + +#: config/tc-cr16.c:164 read.c:4436 msgid "using a bit field width of zero" -msgstr "utilise un champ de bits dont la largeur est zéro" +msgstr "utilise un champ de bits dont la largeur est zéro" -#: config/tc-cr16.c:167 read.c:4283 +#: config/tc-cr16.c:172 read.c:4444 #, c-format msgid "field width \"%s\" too complex for a bitfield" -msgstr "largeur du champ « %s » trop complexe pour un champs de bits" +msgstr "largeur du champ « %s » trop complexe pour un champs de bits" -#: config/tc-cr16.c:176 read.c:4291 +#: config/tc-cr16.c:181 read.c:4452 #, c-format msgid "field width %lu too big to fit in %d bytes: truncated to %d bits" -msgstr "" -"largeur du champ %lu trop grande pour s'insérer dans %d octets: tronqué à %d " -"bits" +msgstr "largeur du champ %lu trop grande pour s'insérer dans %d octets: tronqué à %d bits" -#: config/tc-cr16.c:198 read.c:4313 +#: config/tc-cr16.c:203 read.c:4474 #, c-format msgid "field value \"%s\" too complex for a bitfield" -msgstr "valeur du champ « %s » trop complexe pour un champ de bits" +msgstr "valeur du champ « %s » trop complexe pour un champ de bits" -#: config/tc-cr16.c:379 +#: config/tc-cr16.c:384 #, c-format msgid "Unknown register pair - index relative mode: `%d'" -msgstr "" +msgstr "Paire de registres inconnue - mode d'indexation relatif: « %d »" -#: config/tc-cr16.c:556 config/tc-crx.c:344 config/tc-mn10200.c:800 -#: write.c:959 +#: config/tc-cr16.c:570 config/tc-crx.c:345 config/tc-mn10200.c:768 +#: write.c:986 #, c-format msgid "can't resolve `%s' {%s section} - `%s' {%s section}" -msgstr "ne peut résoudre `%s' {section %s} - `%s' {section %s}" +msgstr "ne peut résoudre « %s » {section %s} - « %s » {section %s}" -#: config/tc-cr16.c:572 config/tc-crx.c:360 -#, fuzzy, c-format +#: config/tc-cr16.c:602 config/tc-crx.c:361 +#, c-format msgid "internal error: reloc %d (`%s') not supported by object file format" -msgstr "relocalisation %d n'est pas supporté dans le format du fichier objet" +msgstr "erreur interne: réadressage %d (« %s ») n'est pas supporté dans le format du fichier objet" + +#: config/tc-cr16.c:695 config/tc-i386.c:8604 config/tc-s390.c:1804 +msgid "GOT already in symbol table" +msgstr "GOT est déjà dans la table de symboles" -#: config/tc-cr16.c:791 config/tc-cr16.c:814 config/tc-cris.c:1181 -#: config/tc-crx.c:582 config/tc-crx.c:609 config/tc-crx.c:627 +#: config/tc-cr16.c:804 config/tc-cr16.c:827 config/tc-cris.c:1190 +#: config/tc-crx.c:535 config/tc-crx.c:562 config/tc-crx.c:580 +#: config/tc-pdp11.c:194 msgid "Virtual memory exhausted" -msgstr "Mémoire virtuelle épuisée" +msgstr "Mémoire virtuelle épuisée" -#: config/tc-cr16.c:799 config/tc-crx.c:619 config/tc-crx.c:637 -#: config/tc-i386.c:1640 config/tc-i386.c:1662 config/tc-m68k.c:4461 -#: config/tc-maxq.c:2903 +#: config/tc-cr16.c:812 config/tc-crx.c:572 config/tc-crx.c:591 +#: config/tc-i386.c:2258 config/tc-i386.c:2280 config/tc-m68k.c:4656 #, c-format msgid "Internal Error: Can't hash %s: %s" -msgstr "ERREUR interne: ne peut adresser par hachage %s: %s" +msgstr "Erreur interne: ne peut adresser par hachage %s: %s" -#: config/tc-cr16.c:825 config/tc-cris.c:1215 config/tc-crx.c:592 +#: config/tc-cr16.c:838 config/tc-cris.c:1224 config/tc-crx.c:545 #, c-format msgid "Can't hash `%s': %s\n" -msgstr "Ne peut adresser par hachage « %s »: %s\n" +msgstr "Ne peut adresser par hachage « %s »: %s\n" -#: config/tc-cr16.c:826 config/tc-cris.c:1216 config/tc-crx.c:593 +#: config/tc-cr16.c:839 config/tc-cris.c:1225 config/tc-crx.c:546 msgid "(unknown reason)" msgstr "(raison inconnue)" #. Missing or bad expr becomes absolute 0. -#: config/tc-cr16.c:876 config/tc-crx.c:665 config/tc-maxq.c:1513 +#: config/tc-cr16.c:891 config/tc-crx.c:619 #, c-format msgid "missing or invalid displacement expression `%s' taken as 0" -msgstr "expression de déplacement invalide ou manquante « %s » alors 0 assumé" +msgstr "expression de déplacement invalide ou manquante « %s » alors 0 est assumé à sa place" -#: config/tc-cr16.c:988 -#, fuzzy, c-format +#: config/tc-cr16.c:941 +#, c-format +msgid "GOT bad expression with %s." +msgstr "mauvaise expression GOT avec %s" + +#: config/tc-cr16.c:1052 +#, c-format msgid "operand %d: illegal use expression: `%s`" -msgstr "expression illégale" +msgstr "opérande %d: expression use illégale: « %s »" -#: config/tc-cr16.c:1045 config/tc-crx.c:1173 -#, fuzzy, c-format +#: config/tc-cr16.c:1117 config/tc-crx.c:1127 +#, c-format msgid "Unknown register: `%d'" -msgstr "Registre indéfinie: « %s »." +msgstr "Registre inconnu: « %d »." #. Issue a error message when register is illegal. -#: config/tc-cr16.c:1053 config/tc-crx.c:1181 +#: config/tc-cr16.c:1125 config/tc-crx.c:1135 #, c-format msgid "Illegal register (`%s') in Instruction: `%s'" -msgstr "" +msgstr "Registre illégal (« %s ») dans l'instruction: « %s »" -#: config/tc-cr16.c:1124 config/tc-cr16.c:1199 config/tc-crx.c:803 -#: config/tc-crx.c:823 config/tc-crx.c:838 -#, fuzzy, c-format +#: config/tc-cr16.c:1196 config/tc-cr16.c:1271 config/tc-crx.c:757 +#: config/tc-crx.c:777 config/tc-crx.c:792 +#, c-format msgid "Illegal register `%s' in Instruction `%s'" -msgstr "registre illégal inclu dans la liste" +msgstr "Registre illégal « %s » dans l'instruction « %s »" -#: config/tc-cr16.c:1152 config/tc-cr16.c:1163 -#, fuzzy, c-format +#: config/tc-cr16.c:1224 config/tc-cr16.c:1235 +#, c-format msgid "Illegal register pair `%s' in Instruction `%s'" -msgstr "Registre source invalide pour cette instruction, utiliser « tfr »." +msgstr "Paire de registres illégale « %s » dans l'instruction « %s »" -#: config/tc-cr16.c:1188 config/tc-i960.c:835 +#: config/tc-cr16.c:1260 config/tc-i960.c:835 msgid "unmatched '['" -msgstr "« [ » non pairé" +msgstr "« [ » non pairé" -#: config/tc-cr16.c:1194 config/tc-i960.c:842 +#: config/tc-cr16.c:1266 config/tc-i960.c:842 msgid "garbage after index spec ignored" -msgstr "rabiut après la spécification d'index ignoré" +msgstr "le rebut après la spécification d'index est ignoré" -#: config/tc-cr16.c:1342 config/tc-crx.c:982 -#, fuzzy, c-format +#: config/tc-cr16.c:1414 config/tc-crx.c:936 +#, c-format msgid "Illegal operands (whitespace): `%s'" -msgstr "opérandes illégales pour %s" +msgstr "Opérandes illégaux (espaces): « %s »" -#: config/tc-cr16.c:1354 config/tc-cr16.c:1361 config/tc-cr16.c:1378 -#: config/tc-crx.c:994 config/tc-crx.c:1001 config/tc-crx.c:1018 -#: config/tc-crx.c:1810 -#, fuzzy, c-format +#: config/tc-cr16.c:1426 config/tc-cr16.c:1433 config/tc-cr16.c:1450 +#: config/tc-crx.c:948 config/tc-crx.c:955 config/tc-crx.c:972 +#: config/tc-crx.c:1764 +#, c-format msgid "Missing matching brackets : `%s'" -msgstr "nom d'architecture manquante « %s »" +msgstr "Accolades pairées manquantes: « %s »" -#: config/tc-cr16.c:1410 config/tc-crx.c:1044 -#, fuzzy, c-format +#: config/tc-cr16.c:1482 config/tc-crx.c:998 +#, c-format msgid "Unknown exception: `%s'" -msgstr "opcode inconnu: « %s »" +msgstr "Exception inconnue: « %s »" -#: config/tc-cr16.c:1497 config/tc-crx.c:1140 +#: config/tc-cr16.c:1569 config/tc-crx.c:1094 #, c-format msgid "Illegal `cinv' parameter: `%c'" -msgstr "" +msgstr "Paramètre « cinv » illégal: « %c »" -#: config/tc-cr16.c:1519 config/tc-cr16.c:1558 -#, fuzzy, c-format +#: config/tc-cr16.c:1591 config/tc-cr16.c:1630 +#, c-format msgid "Unknown register pair: `%d'" -msgstr "contrainte inconnue « %c »" +msgstr "Paire de registres inconnue: « %d »" #. Issue a error message when register pair is illegal. -#: config/tc-cr16.c:1527 +#: config/tc-cr16.c:1599 #, c-format msgid "Illegal register pair (`%s') in Instruction: `%s'" -msgstr "" +msgstr "Paire de registres inconnue (« %s ») dans l'instruction: « %s »" #. Issue a error message when register pair is illegal. -#: config/tc-cr16.c:1566 -#, fuzzy, c-format +#: config/tc-cr16.c:1638 +#, c-format msgid "Illegal index register pair (`%s') in Instruction: `%s'" -msgstr "Registre source invalide pour cette instruction, utiliser « tfr »." +msgstr "Paire de registres d'index illégale (« %s ») dans l'instruction: « %s »" -#: config/tc-cr16.c:1605 -#, fuzzy, c-format +#: config/tc-cr16.c:1677 +#, c-format msgid "Unknown processor register : `%d'" -msgstr "registre de coprocesseur attendu" +msgstr "Registre processeur inconnu: « %d »" #. Issue a error message when register pair is illegal. -#: config/tc-cr16.c:1613 +#: config/tc-cr16.c:1685 #, c-format msgid "Illegal processor register (`%s') in Instruction: `%s'" -msgstr "" +msgstr "Registre processeur illégal (« %s ») dans l'instruction: « %s »" -#: config/tc-cr16.c:1661 -#, fuzzy, c-format +#: config/tc-cr16.c:1733 +#, c-format msgid "Unknown processor register (32 bit) : `%d'" -msgstr "registre de coprocesseur attendu" +msgstr "Registre processeur (32 bits) inconnu: « %d »" #. Issue a error message when register pair is illegal. -#: config/tc-cr16.c:1669 +#: config/tc-cr16.c:1741 #, c-format msgid "Illegal 32 bit - processor register (`%s') in Instruction: `%s'" -msgstr "" +msgstr "Registre du processeur 32 bits illégal (« %s ») dans l'instruction: « %s »" -#: config/tc-cr16.c:2033 config/tc-crx.c:1708 config/tc-crx.c:1725 +#: config/tc-cr16.c:2105 config/tc-crx.c:1662 config/tc-crx.c:1679 #, c-format msgid "Same src/dest register is used (`r%d'), result is undefined" -msgstr "" +msgstr "Même registre src/dest est utilisé (« r%d »), le résultat est indéfini" -#: config/tc-cr16.c:2054 -#, fuzzy +#: config/tc-cr16.c:2126 msgid "RA register is saved twice." -msgstr "Symbole du registre %s est déjà défini." +msgstr "Le registre RA est sauvegardé deux fois." -#: config/tc-cr16.c:2058 -#, fuzzy, c-format +#: config/tc-cr16.c:2130 +#, c-format msgid "`%s' Illegal use of registers." -msgstr "setx: registre temporaire G0 illégal" +msgstr "« %s » Utilisation illégale des registres." -#: config/tc-cr16.c:2072 +#: config/tc-cr16.c:2144 #, c-format msgid "`%s' Illegal count-register combination." -msgstr "" +msgstr "« %s » Combinaison de registres de comptage illégale." -#: config/tc-cr16.c:2078 -#, fuzzy, c-format +#: config/tc-cr16.c:2150 +#, c-format msgid "`%s' Illegal use of register." -msgstr "setx: registre temporaire G0 illégal" +msgstr "« %s » Utilisation de registre illégale." -#: config/tc-cr16.c:2087 config/tc-crx.c:1717 +#: config/tc-cr16.c:2159 config/tc-crx.c:1671 #, c-format msgid "`%s' has undefined result" -msgstr "" +msgstr "« %s » a un résultat indéfini" -#: config/tc-cr16.c:2095 +#: config/tc-cr16.c:2167 #, c-format msgid "Same src/dest register is used (`r%d'),result is undefined" -msgstr "" +msgstr "Même registre src/dest est utilisé (« r%d »), le résultat est indéfini" -#: config/tc-cr16.c:2266 config/tc-crx.c:1622 -#, fuzzy +#: config/tc-cr16.c:2338 config/tc-crx.c:1576 msgid "Incorrect number of operands" -msgstr "Nombre erroné d'éopérandes" +msgstr "Nombre d'opérandes incorrect" -#: config/tc-cr16.c:2268 config/tc-crx.c:1624 -#, fuzzy, c-format +#: config/tc-cr16.c:2340 config/tc-crx.c:1578 +#, c-format msgid "Illegal type of operand (arg %d)" -msgstr "opérandes illégales pour %s" +msgstr "Type d'opérande illégal (arg %d)" -#: config/tc-cr16.c:2274 config/tc-crx.c:1630 -#, fuzzy, c-format +#: config/tc-cr16.c:2346 config/tc-crx.c:1584 +#, c-format msgid "Operand out of range (arg %d)" -msgstr "opérande hors limite: %ld" +msgstr "Opérande hors limite (arg %d)" -#: config/tc-cr16.c:2277 config/tc-crx.c:1633 -#, fuzzy, c-format +#: config/tc-cr16.c:2349 config/tc-crx.c:1587 +#, c-format msgid "Operand has odd displacement (arg %d)" -msgstr "déplacement impair à %x" +msgstr "L'opérande a un déplacement impair (arg %d)" -#: config/tc-cr16.c:2280 config/tc-cr16.c:2311 config/tc-crx.c:1646 -#: config/tc-crx.c:1677 -#, fuzzy, c-format +#: config/tc-cr16.c:2352 config/tc-cr16.c:2383 config/tc-crx.c:1600 +#: config/tc-crx.c:1631 +#, c-format msgid "Illegal operand (arg %d)" -msgstr "opérandes illégales pour %s" +msgstr "Opérande illégal (arg %d)" #. Give an error if a frag containing code is not aligned to a 2-byte #. boundary. -#: config/tc-cr16.c:2413 config/tc-cr16.h:71 config/tc-crx.c:1999 +#: config/tc-cr16.c:2485 config/tc-cr16.h:73 config/tc-crx.c:1953 #: config/tc-crx.h:76 -#, fuzzy msgid "instruction address is not a multiple of 2" -msgstr "doit faire un branchement vers une adresse qui est un multiple de 4" +msgstr "l'adresse de l'instruction n'est pas un multiple de 2" -#: config/tc-cr16.c:2490 config/tc-cris.c:1529 config/tc-cris.c:1537 -#: config/tc-crx.c:2035 config/tc-dlx.c:685 config/tc-hppa.c:3261 -#: config/tc-i860.c:490 config/tc-i860.c:507 config/tc-i860.c:987 -#: config/tc-sparc.c:1431 config/tc-sparc.c:1439 +#: config/tc-cr16.c:2562 config/tc-cris.c:1538 config/tc-cris.c:1546 +#: config/tc-crx.c:1989 config/tc-dlx.c:685 config/tc-hppa.c:3244 +#: config/tc-hppa.c:3251 config/tc-i860.c:491 config/tc-i860.c:508 +#: config/tc-i860.c:988 config/tc-sparc.c:1410 config/tc-sparc.c:1418 #, c-format msgid "Unknown opcode: `%s'" -msgstr "opcode inconnu: « %s »" +msgstr "Opcode inconnu: « %s »" -#: config/tc-cris.c:547 config/tc-m68hc11.c:2796 +#: config/tc-cris.c:551 config/tc-m68hc11.c:2733 #, c-format msgid "internal inconsistency problem in %s: fr_symbol %lx" -msgstr "problème interne d'inconsistance dans %s: fr_symbol %lx" +msgstr "problème interne d'inconsistance dans %s: fr_symbol %lx" -#: config/tc-cris.c:551 config/tc-m68hc11.c:2800 config/tc-msp430.c:2286 +#: config/tc-cris.c:555 config/tc-m68hc11.c:2737 config/tc-msp430.c:2246 #, c-format msgid "internal inconsistency problem in %s: resolved symbol" -msgstr "problème interne d'inconsistance dans %s: symbole résolu" +msgstr "problème interne d'inconsistance dans %s: symbole résolu" -#: config/tc-cris.c:561 config/tc-m68hc11.c:2806 +#: config/tc-cris.c:565 config/tc-m68hc11.c:2743 #, c-format msgid "internal inconsistency problem in %s: fr_subtype %d" -msgstr "problème interne d'inconsistance dans %s: fr_subtype %d" +msgstr "problème interne d'inconsistance dans %s: fr_subtype %d" -#: config/tc-cris.c:901 +#: config/tc-cris.c:905 msgid "Relaxation to long branches for .arch common_v10_v32 not implemented" -msgstr "" +msgstr "Relaxations vers des branchements longs ne sont pas implémentés pour .arch common_v10_v32" -#: config/tc-cris.c:931 +#: config/tc-cris.c:935 msgid "Complicated LAPC target operand is not a multiple of two. Use LAPC.D" -msgstr "" +msgstr "Opérande cible LAPC compliqué n'est pas un multiple de deux. Utilisez LAPC.D" -#: config/tc-cris.c:936 +#: config/tc-cris.c:940 #, c-format -msgid "" -"Internal error found in md_convert_frag: offset %ld. Please report this." -msgstr "" +msgid "Internal error found in md_convert_frag: offset %ld. Please report this." +msgstr "Erreur interne découverte dans md_convert_frag: offset %ld. Merci de rapporter ceci." -#: config/tc-cris.c:961 +#: config/tc-cris.c:965 #, c-format msgid "internal inconsistency in %s: bdapq no symbol" msgstr "inconsistence interne dans %s: bdapq pas de symbole" -#: config/tc-cris.c:974 +#: config/tc-cris.c:978 #, c-format msgid "internal inconsistency in %s: bdap.w with no symbol" msgstr "inconsistence interne dans %s: bdap.w sans symbole" -#: config/tc-cris.c:998 +#: config/tc-cris.c:1002 msgid "section alignment must be >= 4 bytes to check MULS/MULU safeness" -msgstr "" +msgstr "alignement de section doit être >= 4 octets pour garantir la sécurité de MULS/MULU" -#: config/tc-cris.c:1007 +#: config/tc-cris.c:1011 msgid "dangerous MULS/MULU location; give it higher alignment" -msgstr "" +msgstr "emplacement dangereux pour MULS/MULU; utilisez un alignement plus grand" -#: config/tc-cris.c:1112 -msgid "" -"Out-of-range .word offset handling is not implemented for .arch " -"common_v10_v32" -msgstr "" +#. Bail out for compatibility mode. (It seems it can be implemented, +#. perhaps with a 10-byte sequence: "move.d NNNN,$pc/$acr", "jump +#. $acr", "nop"; but doesn't seem worth it at the moment.) +#: config/tc-cris.c:1052 +msgid "Out-of-range .word offset handling is not implemented for .arch common_v10_v32" +msgstr "La gestion des offsets .word hors limite n'est pas implémentée pour .arch common_v10_v32" + +#: config/tc-cris.c:1097 +msgid ".word case-table handling failed: table too large" +msgstr "traitement de la table des cas .word a échoué: table trop grande" -#: config/tc-cris.c:1220 +#: config/tc-cris.c:1229 #, c-format msgid "Buggy opcode: `%s' \"%s\"\n" -msgstr "opcode erroné: « %s» «%s »\n" +msgstr "Opcode erroné: « %s » « %s »\n" -#: config/tc-cris.c:1635 +#: config/tc-cris.c:1644 #, c-format msgid "Immediate value not in 5 bit unsigned range: %ld" -msgstr "Valeur immédiate n'est pas dans les bornes non signées de 5 bits: %ld" +msgstr "Valeur immédiate n'est pas dans les bornes non signées de 5 bits: %ld" -#: config/tc-cris.c:1651 +#: config/tc-cris.c:1660 #, c-format msgid "Immediate value not in 4 bit unsigned range: %ld" -msgstr "Valeur immédiate n'est pas dans les bornes non signées de 4 bits: %ld" +msgstr "Valeur immédiate n'est pas dans les bornes non signées de 4 bits: %ld" -#: config/tc-cris.c:1703 +#: config/tc-cris.c:1712 #, c-format msgid "Immediate value not in 6 bit range: %ld" -msgstr "Valeur immédiate n'est pas dans les bornes non signées de 6 bits: %ld" +msgstr "Valeur immédiate n'est pas dans les bornes non signées de 6 bits: %ld" -#: config/tc-cris.c:1718 +#: config/tc-cris.c:1727 #, c-format msgid "Immediate value not in 6 bit unsigned range: %ld" -msgstr "Valeur immédiate n'est pas dans les bornes non signées de 6 bits: %ld" +msgstr "Valeur immédiate n'est pas dans les bornes non signées de 6 bits: %ld" #. Others have a generic warning. -#: config/tc-cris.c:1826 +#: config/tc-cris.c:1835 #, c-format msgid "Unimplemented register `%s' specified" -msgstr "Registre spécifié non implanté « %s »" +msgstr "Registre « %s » spécifié n'est pas implémenté" #. We've come to the end of instructions with this #. opcode, so it must be an error. -#: config/tc-cris.c:2069 +#: config/tc-cris.c:2079 msgid "Illegal operands" -msgstr "opérandes illégales" +msgstr "Opérandes illégaux" -#: config/tc-cris.c:2110 config/tc-cris.c:2150 +#: config/tc-cris.c:2120 config/tc-cris.c:2160 #, c-format msgid "Immediate value not in 8 bit range: %ld" -msgstr "Valeur immédiate n'est pas dans les bornes non signées de 8 bits: %ld" +msgstr "Valeur immédiate n'est pas dans les bornes de 8 bits: %ld" -#: config/tc-cris.c:2120 config/tc-cris.c:2171 +#: config/tc-cris.c:2130 config/tc-cris.c:2181 #, c-format msgid "Immediate value not in 16 bit range: %ld" -msgstr "Valeur immédiate n'est pas dans les bornes non signées de 16 bits: %ld" +msgstr "Valeur immédiate n'est pas dans les bornes de 16 bits: %ld" -#: config/tc-cris.c:2155 -#, fuzzy, c-format +#: config/tc-cris.c:2165 +#, c-format msgid "Immediate value not in 8 bit signed range: %ld" -msgstr "Valeur immédiate n'est pas dans les bornes non signées de 5 bits: %ld" +msgstr "Valeur immédiate n'est pas dans les bornes signées de 8 bits: %ld" -#: config/tc-cris.c:2160 -#, fuzzy, c-format +#: config/tc-cris.c:2170 +#, c-format msgid "Immediate value not in 8 bit unsigned range: %ld" -msgstr "Valeur immédiate n'est pas dans les bornes non signées de 5 bits: %ld" +msgstr "Valeur immédiate n'est pas dans les bornes non signées de 8 bits: %ld" -#: config/tc-cris.c:2176 -#, fuzzy, c-format +#: config/tc-cris.c:2186 +#, c-format msgid "Immediate value not in 16 bit signed range: %ld" -msgstr "Valeur immédiate n'est pas dans les bornes non signées de 6 bits: %ld" +msgstr "Valeur immédiate n'est pas dans les bornes signées de 16 bits: %ld" -#: config/tc-cris.c:2181 -#, fuzzy, c-format +#: config/tc-cris.c:2191 +#, c-format msgid "Immediate value not in 16 bit unsigned range: %ld" -msgstr "Valeur immédiate n'est pas dans les bornes non signées de 6 bits: %ld" +msgstr "Valeur immédiate n'est pas dans les bornes non signées de 16 bits: %ld" -#: config/tc-cris.c:2203 +#: config/tc-cris.c:2217 +msgid "TLS relocation size does not match operand size" +msgstr "la taille de réadressage TLS ne concorde pas avec la taille de l'opérande" + +#: config/tc-cris.c:2218 msgid "PIC relocation size does not match operand size" -msgstr "" -"la taille de relocalisation PIC ne concorde pas avec la taille de l'opérande" +msgstr "la taille de réadressage PIC ne concorde pas avec la taille de l'opérande" -#: config/tc-cris.c:3346 +#: config/tc-cris.c:3365 msgid "Calling gen_cond_branch_32 for .arch common_v10_v32\n" -msgstr "" +msgstr "Appel de gen_cond_branch_32 pour .arch common_v10_v32\n" -#: config/tc-cris.c:3350 +#: config/tc-cris.c:3369 msgid "32-bit conditional branch generated" -msgstr "Branchement conditionnel 32 bits a été généré" +msgstr "Branchement conditionnel 32 bits a été généré" -#: config/tc-cris.c:3411 +#: config/tc-cris.c:3430 msgid "Complex expression not supported" -msgstr "expressions complexes ne sont pas supportées" +msgstr "Expression complexe pas supportée" #. FIXME: Is this function mentioned in the internals.texi manual? If #. not, add it. -#: config/tc-cris.c:3537 +#: config/tc-cris.c:3580 msgid "Bad call to md_atof () - floating point formats are not supported" -msgstr "" -"Appel erroné à md_atof() - format en virgule flottante n'est pas supporté" +msgstr "Appel erroné à md_atof() - formats en virgule flottante ne sont pas supportés" -#: config/tc-cris.c:3578 +#: config/tc-cris.c:3621 msgid "PC-relative relocation must be trivially resolved" -msgstr "relocalisation relative au PC doit être résolue de manière triviale" +msgstr "réadressage relatif au PC doit être résolu de manière triviale" -#: config/tc-cris.c:3631 +#: config/tc-cris.c:3693 #, c-format msgid "Value not in 16 bit range: %ld" msgstr "Valeur n'est pas dans les bornes de 16 bits: %ld" -#: config/tc-cris.c:3642 -#, fuzzy, c-format +#: config/tc-cris.c:3701 +#, c-format msgid "Value not in 16 bit signed range: %ld" -msgstr "Valeur n'est pas dans les bornes non signées de 6 bits: %ld" +msgstr "Valeur n'est pas dans les bornes signées de 16 bits: %ld" -#: config/tc-cris.c:3653 +#: config/tc-cris.c:3709 #, c-format msgid "Value not in 8 bit range: %ld" msgstr "Valeur n'est pas dans les bornes de 8 bits: %ld" -#: config/tc-cris.c:3661 -#, fuzzy, c-format +#: config/tc-cris.c:3716 +#, c-format msgid "Value not in 8 bit signed range: %ld" -msgstr "Valeur n'est pas dans les bornes de 4 bits: %ld" +msgstr "Valeur n'est pas dans les bornes signées de 8 bits: %ld" -#: config/tc-cris.c:3672 +#: config/tc-cris.c:3726 #, c-format msgid "Value not in 4 bit unsigned range: %ld" -msgstr "Valeur n'est pas dans les bornes de 4 bits: %ld" +msgstr "Valeur n'est pas dans les bornes non signées de 4 bits: %ld" -#: config/tc-cris.c:3680 +#: config/tc-cris.c:3733 #, c-format msgid "Value not in 5 bit unsigned range: %ld" -msgstr "Valeur n'est pas dans les bornes de 5 bits: %ld" +msgstr "Valeur n'est pas dans les bornes non signées de 5 bits: %ld" -#: config/tc-cris.c:3688 +#: config/tc-cris.c:3740 #, c-format msgid "Value not in 6 bit range: %ld" msgstr "Valeur n'est pas dans les bornes de 6 bits: %ld" -#: config/tc-cris.c:3696 +#: config/tc-cris.c:3747 #, c-format msgid "Value not in 6 bit unsigned range: %ld" -msgstr "Valeur n'est pas dans les bornes non signées de 6 bits: %ld" +msgstr "Valeur n'est pas dans les bornes non signées de 6 bits: %ld" -#: config/tc-cris.c:3742 +#: config/tc-cris.c:3791 #, c-format msgid "Please use --help to see usage and options for this assembler.\n" -msgstr "SVP utiliser --help pour connaître les options pour ect assembleur.\n" +msgstr "Veuillez utiliser --help pour connaître les options pour cet assembleur.\n" -#: config/tc-cris.c:3754 +#: config/tc-cris.c:3803 msgid "--no-underscore is invalid with a.out format" msgstr "--no-underscore est invalide pour une format a.out" -#: config/tc-cris.c:3778 -#, fuzzy, c-format +#: config/tc-cris.c:3827 +#, c-format msgid "invalid in --march=: %s" -msgstr "architecture invalide -xarch=%s" +msgstr " invalide dans --march=: %s" -#: config/tc-cris.c:3877 -msgid "" -"Semantics error. This type of operand can not be relocated, it must be an " -"assembly-time constant" -msgstr "" -"ERREUR de sémantique. Ce type d'opérande ne peut être relocalisé, ce doit " -"être\n" -"une constante utilisée au moment de l'assemblage" +#: config/tc-cris.c:3936 config/tc-moxie.c:709 +msgid "Semantics error. This type of operand can not be relocated, it must be an assembly-time constant" +msgstr "Erreur de sémantique. Ce type d'opérande ne peut être relocalisé, il doit être une constante résolue au moment de l'assemblage" -#: config/tc-cris.c:3926 +#: config/tc-cris.c:3985 config/tc-moxie.c:758 #, c-format msgid "Cannot generate relocation type for symbol %s, code %s" -msgstr "Ne peut générer un type de relocalisation pour le symbole %s, code %s" +msgstr "Ne peut générer un type de réadressage pour le symbole %s, code %s" #. The messages are formatted to line up with the generic options. -#: config/tc-cris.c:3939 +#: config/tc-cris.c:3998 #, c-format msgid "CRIS-specific options:\n" -msgstr "Options spécifiques CRIS:\n" +msgstr "Options spécifiques CRIS:\n" -#: config/tc-cris.c:3941 -msgid "" -" -h, -H Don't execute, print this help text. Deprecated.\n" -msgstr " -h, -H afficher l'aide mémoire. Déprécié.\n" +#: config/tc-cris.c:4000 +msgid " -h, -H Don't execute, print this help text. Deprecated.\n" +msgstr " -h, -H Ne rien exécuter, afficher ce message d'aide. Déprécié.\n" -#: config/tc-cris.c:3943 +#: config/tc-cris.c:4002 msgid " -N Warn when branches are expanded to jumps.\n" -msgstr "" -" -N avertir lorsque l'expansion des branches est faite " -"pour des sauts.\n" +msgstr " -N Avertir lorsque l'expansion des branches est faite pour des sauts.\n" -#: config/tc-cris.c:3945 -msgid "" -" --underscore User symbols are normally prepended with " -"underscore.\n" +#: config/tc-cris.c:4004 +msgid " --underscore User symbols are normally prepended with underscore.\n" msgstr "" -" --underscore symboles usagers sont normalement préfixés avec\n" -" le caractère de soulignement.\n" +" --underscore Symboles utilisateurs sont normalement préfixés avec\n" +" le caractère de soulignement.\n" -#: config/tc-cris.c:3947 +#: config/tc-cris.c:4006 msgid " Registers will not need any prefix.\n" -msgstr " registres n'ont pas besoin de préfixe\n" +msgstr " Registres n'ont pas besoin de préfixe\n" -#: config/tc-cris.c:3949 +#: config/tc-cris.c:4008 msgid " --no-underscore User symbols do not have any prefix.\n" -msgstr " --no-underscore les symboles usagers n'ont pas de préfixe\n" +msgstr " --no-underscore Les symboles utilisateurs n'ont pas de préfixe\n" -#: config/tc-cris.c:3951 +#: config/tc-cris.c:4010 msgid " Registers will require a `$'-prefix.\n" -msgstr " registres auront besoin de « $ »-prefix\n" +msgstr " Registres auront besoin du préfixe « $ »\n" -#: config/tc-cris.c:3953 +#: config/tc-cris.c:4012 msgid " --pic\t\t\tEnable generation of position-independent code.\n" -msgstr "" -" --pic permetre la génération de code indépendant de la " -"position\n" +msgstr " --pic\t\t\tPermettre la génération de code indépendant de la position.\n" -#: config/tc-cris.c:3955 +#: config/tc-cris.c:4014 msgid "" " --march=\t\tGenerate code for . Valid choices for \n" "\t\t\t\tare v0_v10, v10, v32 and common_v10_v32.\n" msgstr "" +" --march=\t\tGénérer le code pour . Choix possibles pour \n" +"\t\t\t\tsont v0_v10, v10, v32 et common_v10_v32.\n" -#: config/tc-cris.c:3976 +#: config/tc-cris.c:4035 msgid "Invalid relocation" -msgstr "Relocalisation invalide" +msgstr "Réadressage invalide" -#: config/tc-cris.c:4013 +#: config/tc-cris.c:4072 msgid "Invalid pc-relative relocation" -msgstr "relocalisation relative du PC invalide" +msgstr "Réadressage relatif du PC invalide" -#: config/tc-cris.c:4058 +#: config/tc-cris.c:4117 #, c-format msgid "Adjusted signed .word (%ld) overflows: `switch'-statement too large." -msgstr "" -"A ajusté le débordement signé de .word (%ld): option -statement trop grande." +msgstr "A ajusté le débordement signé de .word (%ld): option -statement trop grande." -#: config/tc-cris.c:4088 +#: config/tc-cris.c:4147 #, c-format msgid ".syntax %s requires command-line option `--underscore'" -msgstr ".syntax %s requiert l'option « --underscore »" +msgstr ".syntax %s requiert l'option « --underscore »" -#: config/tc-cris.c:4097 +#: config/tc-cris.c:4156 #, c-format msgid ".syntax %s requires command-line option `--no-underscore'" -msgstr ".syntax %s requiert l'option « --no-underscore »" +msgstr ".syntax %s requiert l'option « --no-underscore »" -#: config/tc-cris.c:4134 +#: config/tc-cris.c:4193 msgid "Unknown .syntax operand" -msgstr "Opérande inconnue .syntax" +msgstr "Opérande .syntax inconnu" -#: config/tc-cris.c:4144 +#: config/tc-cris.c:4203 msgid "Pseudodirective .file is only valid when generating ELF" -msgstr "Pseudo-directive .file est valide seulement lors de la génération ELF" +msgstr "Pseudo-directive .file est valide seulement lors de la génération ELF" -#: config/tc-cris.c:4156 +#: config/tc-cris.c:4215 msgid "Pseudodirective .loc is only valid when generating ELF" -msgstr "Pseudo-directive .loc est valide seulement lors de la génération ELF" +msgstr "Pseudo-directive .loc est valide seulement lors de la génération ELF" + +#: config/tc-cris.c:4230 +#, c-format +msgid "internal inconsistency problem: %s called for %d bytes" +msgstr "problème interne d'inconsistance: %s appelé pour %d octets" -#: config/tc-cris.c:4299 -#, fuzzy +#: config/tc-cris.c:4382 msgid "unknown operand to .arch" -msgstr "opérande inconnue %s" +msgstr "opérande inconnu pour .arch" -#: config/tc-cris.c:4308 +#: config/tc-cris.c:4391 msgid ".arch requires a matching --march=... option" -msgstr "" +msgstr ".arch requiert une option --march=... correspondante" -#: config/tc-crx.c:866 +#: config/tc-crx.c:820 #, c-format msgid "Illegal Scale - `%d'" -msgstr "" +msgstr "Échelle illégale - « %d »" -#: config/tc-crx.c:1310 -#, fuzzy, c-format +#: config/tc-crx.c:1264 +#, c-format msgid "Illegal Co-processor register in Instruction `%s' " -msgstr "Registre source invalide pour cette instruction, utiliser « tfr »." +msgstr "Registre coprocesseur illégal dans l'instruction « %s »" -#: config/tc-crx.c:1317 +#: config/tc-crx.c:1271 #, c-format msgid "Illegal Co-processor special register in Instruction `%s' " -msgstr "" +msgstr "Registre coprocesseur spécial illégal dans l'instruction « %s »" -#: config/tc-crx.c:1636 -#, fuzzy, c-format +#: config/tc-crx.c:1590 +#, c-format msgid "Invalid DISPU4 operand value (arg %d)" -msgstr "Opérande invalide (utiiser 1, 2, ou 3)" +msgstr "Valeur de l'opérande DISPU4 invalide (arg %d)" -#: config/tc-crx.c:1639 -#, fuzzy, c-format +#: config/tc-crx.c:1593 +#, c-format msgid "Invalid CST4 operand value (arg %d)" -msgstr "Opérande invalide (utiiser 1, 2, ou 3)" +msgstr "Valeur de l'opérande CST4 invalide (arg %d)" -#: config/tc-crx.c:1642 +#: config/tc-crx.c:1596 #, c-format msgid "Operand value is not within upper 64 KB (arg %d)" -msgstr "" +msgstr "La valeur de l'opérande n'est pas dans les 64 ko supérieurs (arg %d)" -#: config/tc-crx.c:1779 -#, fuzzy +#: config/tc-crx.c:1733 msgid "Invalid Register in Register List" -msgstr "liste de registres invalide" +msgstr "Registre invalide dans la liste des registres" -#: config/tc-crx.c:1833 -#, fuzzy, c-format +#: config/tc-crx.c:1787 +#, c-format msgid "Illegal register `%s' in cop-register list" -msgstr "registre illégal inclu dans la liste" +msgstr "Registre « %s » illégal dans la liste des registres cop" -#: config/tc-crx.c:1841 -#, fuzzy, c-format +#: config/tc-crx.c:1795 +#, c-format msgid "Illegal register `%s' in cop-special-register list" -msgstr "registre illégal inclu dans la liste" +msgstr "Registre « %s » illégal dans la liste des registres cop spéciaux" -#: config/tc-crx.c:1860 -#, fuzzy, c-format +#: config/tc-crx.c:1814 +#, c-format msgid "Illegal register `%s' in user register list" -msgstr "registre illégal inclu dans la liste" +msgstr "Registre « %s » illégal dans la liste des registres utilisateurs" -#: config/tc-crx.c:1879 -#, fuzzy, c-format +#: config/tc-crx.c:1833 +#, c-format msgid "Illegal register `%s' in register list" -msgstr "Registre en virgule flottante est dans la liste de registres" +msgstr "Registre « %s » illégal dans la liste des registres" -#: config/tc-crx.c:1885 +#: config/tc-crx.c:1839 #, c-format msgid "Maximum %d bits may be set in `mask16' operand" -msgstr "" +msgstr "Au plus %d bits peuvent être mis dans l'opérande « mask16 »" -#: config/tc-crx.c:1894 +#: config/tc-crx.c:1848 #, c-format msgid "rest of line ignored; first ignored character is `%c'" -msgstr "reste de la ligne ignorée; premier caractère ignoré est « %c »" +msgstr "reste de la ligne ignorée; premier caractère ignoré est « %c »" -#: config/tc-crx.c:1902 +#: config/tc-crx.c:1856 #, c-format msgid "Illegal `mask16' operand, operation is undefined - `%s'" -msgstr "" +msgstr "Opérande « mask16 » illégal, l'opération est non définie - « %s »" #. HI can't be specified without LO (and vise-versa). -#: config/tc-crx.c:1908 +#: config/tc-crx.c:1862 msgid "HI/LO registers should be specified together" -msgstr "" +msgstr "Les registres HI/LO devraient être spécifiés ensembles" -#: config/tc-crx.c:1914 +#: config/tc-crx.c:1868 msgid "HI/LO registers should be specified without additional registers" -msgstr "" +msgstr "Le registre HI/LO devraient être spécifiés sans registre additionnel" -#: config/tc-d10v.c:216 +#: config/tc-d10v.c:218 #, c-format msgid "" "D10V options:\n" @@ -4170,1601 +4481,1787 @@ msgid "" " instructions together.\n" msgstr "" "Options D10V:\n" -"-O Optimiser. Certaines opérations seont faites en " -"parallèle.\n" -"--gstabs-packing empaqueter les instructions adjacentes short " -"ensembles mêne\n" -" lorsque --gstabs est spécifié. Activé par défaut.\n" -"--no-gstabs-packing Si --gstabs est spécifié, ne pas empaqueter les " -"instructions\n" +"-O Optimiser. Certaines opérations seront faites en parallèle.\n" +"--gstabs-packing Empaqueter les instructions adjacentes short ensembles même\n" +" lorsque --gstabs est spécifié. Activé par défaut.\n" +"--no-gstabs-packing Si --gstabs est spécifié, ne pas empaqueter les instructions\n" " adjacentes ensembles.\n" -#: config/tc-d10v.c:607 +#: config/tc-d10v.c:575 msgid "operand is not an immediate" -msgstr "opérande n'est pas un immédiat" +msgstr "opérande n'est pas un immédiat" -#: config/tc-d10v.c:625 +#: config/tc-d10v.c:593 #, c-format msgid "operand out of range: %lu" -msgstr "opérande hors limite: %lu" +msgstr "opérande hors limite: %lu" -#: config/tc-d10v.c:683 +#: config/tc-d10v.c:653 msgid "Instruction must be executed in parallel with another instruction." -msgstr "L'instruction doit être exécutée en parallèle avec une autre." +msgstr "L'instruction doit être exécutée en parallèle avec une autre." -#: config/tc-d10v.c:737 config/tc-d10v.c:745 +#: config/tc-d10v.c:707 config/tc-d10v.c:715 #, c-format msgid "packing conflict: %s must dispatch sequentially" -msgstr "conflit d'empaquetage: %s doit être soumis séquentiellement" +msgstr "conflit d'empaquetage: %s doit être soumis séquentiellement" -#: config/tc-d10v.c:844 +#: config/tc-d10v.c:814 #, c-format msgid "resource conflict (R%d)" -msgstr "conflit de ressources (R%d)" +msgstr "conflit de ressource (R%d)" -#: config/tc-d10v.c:847 +#: config/tc-d10v.c:817 #, c-format msgid "resource conflict (A%d)" -msgstr "conflit de ressources (A%d)" +msgstr "conflit de ressource (A%d)" -#: config/tc-d10v.c:849 +#: config/tc-d10v.c:819 msgid "resource conflict (PSW)" -msgstr "conflit de ressources (PSW)" +msgstr "conflit de ressource (PSW)" -#: config/tc-d10v.c:851 +#: config/tc-d10v.c:821 msgid "resource conflict (C flag)" -msgstr "conflit de ressources (fanion C)" +msgstr "conflit de ressource (fanion C)" -#: config/tc-d10v.c:853 +#: config/tc-d10v.c:823 msgid "resource conflict (F flag)" -msgstr "conflit de ressources (fanion F)" +msgstr "conflit de ressource (fanion F)" -#: config/tc-d10v.c:1003 +#: config/tc-d10v.c:973 msgid "Instruction must be executed in parallel" -msgstr "L'instruction doit être exécutée en parallèle" +msgstr "L'instruction doit être exécutée en parallèle" -#: config/tc-d10v.c:1006 +#: config/tc-d10v.c:976 msgid "Long instructions may not be combined." -msgstr "Les instructions longues ne peuvent pas être combinées." +msgstr "Les instructions longues ne peuvent pas être combinées." -#: config/tc-d10v.c:1039 +#: config/tc-d10v.c:1009 msgid "One of these instructions may not be executed in parallel." -msgstr "Une de ces instructions ne peut pas être exécutée en parallèle" +msgstr "Une de ces instructions ne peut pas être exécutée en parallèle" -#: config/tc-d10v.c:1043 config/tc-d30v.c:1070 +#: config/tc-d10v.c:1013 config/tc-d30v.c:1038 msgid "Two IU instructions may not be executed in parallel" -msgstr "Deux instruction IU ne peuvent pas être exécutées en parallèle" +msgstr "Deux instruction IU ne peuvent pas être exécutées en parallèle" -#: config/tc-d10v.c:1045 config/tc-d10v.c:1053 config/tc-d10v.c:1067 -#: config/tc-d10v.c:1082 config/tc-d30v.c:1071 config/tc-d30v.c:1080 +#: config/tc-d10v.c:1015 config/tc-d10v.c:1023 config/tc-d10v.c:1037 +#: config/tc-d10v.c:1052 config/tc-d30v.c:1039 config/tc-d30v.c:1048 msgid "Swapping instruction order" -msgstr "Ordre d'instruction de commutation (swapping)" +msgstr "Échange l'ordre des instructions" -#: config/tc-d10v.c:1051 config/tc-d30v.c:1077 +#: config/tc-d10v.c:1021 config/tc-d30v.c:1045 msgid "Two MU instructions may not be executed in parallel" -msgstr "Deux instructions MU ne peuvent pas être exécutées en parallèle." +msgstr "Deux instructions MU ne peuvent pas être exécutées en parallèle." -#: config/tc-d10v.c:1071 config/tc-d30v.c:1097 +#: config/tc-d10v.c:1041 config/tc-d30v.c:1065 msgid "IU instruction may not be in the left container" -msgstr "L'instruction IU ne peut pas être laissé dans le conteneur de gauche" +msgstr "L'instruction IU ne peut pas être laissée dans le conteneur de gauche" -#: config/tc-d10v.c:1073 config/tc-d10v.c:1088 -msgid "" -"Instruction in R container is squashed by flow control instruction in L " -"container." -msgstr "" -"Instruction dans le conteneur R est écrasé par une instruction de contrôle " -"de flux\n" -"du conteneur L." +#: config/tc-d10v.c:1043 config/tc-d10v.c:1058 +msgid "Instruction in R container is squashed by flow control instruction in L container." +msgstr "Instruction dans le conteneur R est écrasée par une instruction de contrôle de flux du conteneur L." -#: config/tc-d10v.c:1086 config/tc-d30v.c:1108 +#: config/tc-d10v.c:1056 config/tc-d30v.c:1076 msgid "MU instruction may not be in the right container" -msgstr "L'instruction MU ne peut pas être dans le conteneur de droite" +msgstr "L'instruction MU ne peut pas être dans le conteneur de droite" -#: config/tc-d10v.c:1092 config/tc-d30v.c:1120 +#: config/tc-d10v.c:1062 config/tc-d30v.c:1088 msgid "unknown execution type passed to write_2_short()" -msgstr "type d'excution inconnue passé à write_2_short()" +msgstr "type d'exécution inconnue passé à write_2_short()" -#: config/tc-d10v.c:1220 config/tc-d10v.c:1393 +#: config/tc-d10v.c:1191 config/tc-d10v.c:1366 msgid "bad opcode or operands" -msgstr "opcode ou opérandes erronés" +msgstr "opcode ou opérandes erronés" -#: config/tc-d10v.c:1295 +#: config/tc-d10v.c:1268 msgid "value out of range" msgstr "valeur hors limite" -#: config/tc-d10v.c:1369 +#: config/tc-d10v.c:1342 msgid "illegal operand - register name found where none expected" -msgstr "" -"opérande illégale - nom de registre repéré alors qu'aucun n'était attendu" +msgstr "opérande illégal - nom de registre repéré alors qu'aucun n'était attendu" -#: config/tc-d10v.c:1404 +#: config/tc-d10v.c:1377 msgid "Register number must be EVEN" -msgstr "le numéro de registre doit être PAIR" +msgstr "Le numéro de registre doit être PAIR" -#: config/tc-d10v.c:1407 +#: config/tc-d10v.c:1380 msgid "Unsupported use of sp" -msgstr "Utilisation non supporté de sp" +msgstr "Utilisation non supportée de sp" -#: config/tc-d10v.c:1426 +#: config/tc-d10v.c:1399 #, c-format msgid "cr%ld is a reserved control register" -msgstr "cr%ld est un registre de contrôle réservé" +msgstr "cr%ld est un registre de contrôle réservé" -#: config/tc-d10v.c:1599 +#: config/tc-d10v.c:1574 #, c-format msgid "line %d: rep or repi must include at least 4 instructions" msgstr "ligne %d: rep ou repi doit inclure au moins 4 instructions" -#: config/tc-d10v.c:1779 -#, fuzzy +#: config/tc-d10v.c:1763 msgid "can't find previous opcode " -msgstr "ne peut repérer le opcode " +msgstr "ne peut repérer l'opcode précédent" -#: config/tc-d10v.c:1791 -#, fuzzy, c-format +#: config/tc-d10v.c:1775 +#, c-format msgid "could not assemble: %s" -msgstr "ne peut créer la section %s" +msgstr "n'a pu assembler: %s" -#: config/tc-d10v.c:1806 config/tc-d10v.c:1828 config/tc-d30v.c:1776 +#: config/tc-d10v.c:1790 config/tc-d10v.c:1812 config/tc-d30v.c:1747 msgid "Unable to mix instructions as specified" -msgstr "Incapable de mélanger les instructions tel que spécifié" +msgstr "Incapable de mélanger les instructions tel que spécifié" -#: config/tc-d30v.c:149 +#: config/tc-d30v.c:150 #, c-format msgid "Register name %s conflicts with symbol of the same name" -msgstr "Nom de registre %s est en conflit avec un symbole du même nom" +msgstr "Nom de registre %s est en conflit avec un symbole du même nom" -#: config/tc-d30v.c:239 +#: config/tc-d30v.c:240 #, c-format msgid "" "\n" "D30V options:\n" -"-O Make adjacent short instructions parallel if " -"possible.\n" +"-O Make adjacent short instructions parallel if possible.\n" "-n Warn about all NOPs inserted by the assembler.\n" "-N\t\t\tWarn about NOPs inserted after word multiplies.\n" -"-c Warn about symbols whoes names match register " -"names.\n" +"-c Warn about symbols whoes names match register names.\n" "-C Opposite of -C. -c is the default.\n" msgstr "" "\n" "Option D30V:\n" -"-O rendre le instructions adjacentes courtes " -"parallèles\n" +"-O Rendre le instructions adjacentes courtes parallèles\n" " si possible.\n" -"-n avertir de tous les NOP insérés par l'assembleur.\n" -"-N avertir de tous les NOP insérés après des mots " -"multiples\n" -"-c avertir de tous les symboles ayant des noms " -"identiques à\n" +"-n Avertir de tous les NOP insérés par l'assembleur.\n" +"-N Avertir de tous les NOP insérés après des mots multiples\n" +"-c Avertir de tous les symboles ayant des noms identiques\n" " aux noms de registres\n" -"-C inverse de -c. -c est le défaut.\n" +"-C Inverse de -c. -c est le défaut.\n" -#: config/tc-d30v.c:401 +#: config/tc-d30v.c:368 msgid "unexpected 12-bit reloc type" -msgstr "type de relocalisation 12-bits attendu" +msgstr "type de réadressage 12-bits inattendu" -#: config/tc-d30v.c:408 +#: config/tc-d30v.c:375 msgid "unexpected 18-bit reloc type" -msgstr "type de relocalisation 18-bits attendu" +msgstr "type de réadressage 18-bits inattendu" -#: config/tc-d30v.c:658 +#: config/tc-d30v.c:626 #, c-format msgid "%s NOP inserted" -msgstr "%s NOP inséré" +msgstr "%s NOP inséré" -#: config/tc-d30v.c:659 +#: config/tc-d30v.c:627 msgid "sequential" -msgstr "séquentiel" +msgstr "séquentiel" -#: config/tc-d30v.c:659 +#: config/tc-d30v.c:627 msgid "parallel" -msgstr "parallèle" +msgstr "parallèle" -#: config/tc-d30v.c:1066 +#: config/tc-d30v.c:1034 msgid "Instructions may not be executed in parallel" -msgstr "Les instructions ne peuvent pas être exécutées en parallèle" +msgstr "Les instructions ne peuvent pas être exécutées en parallèle" -#: config/tc-d30v.c:1079 +#: config/tc-d30v.c:1047 #, c-format msgid "Executing %s in IU may not work" -msgstr "Exécution de %s dans IU peut ne pas fonctionner" +msgstr "Exécution de %s dans IU peut ne pas fonctionner" -#: config/tc-d30v.c:1086 +#: config/tc-d30v.c:1054 #, c-format msgid "Executing %s in IU may not work in parallel execution" -msgstr "" -"Exécution de %s dans IU peut ne pas fonctionner lors d'une exécution en " -"parallèle" +msgstr "Exécution de %s dans IU peut ne pas fonctionner lors d'une exécution en parallèle" -#: config/tc-d30v.c:1099 +#: config/tc-d30v.c:1067 #, c-format msgid "special left instruction `%s' kills instruction `%s' in right container" -msgstr "" -"instruction spéciale de gauche %s» écrase l'instruction du conteneur de " -"droite « %s »" +msgstr "instruction spéciale de gauche « %s » écrase l'instruction « %s » du conteneur de droite" -#: config/tc-d30v.c:1110 +#: config/tc-d30v.c:1078 #, c-format msgid "Executing %s in reverse serial with %s may not work" -msgstr "Exécuter %s en ordre sériel inverse avec %s peut ne pas fonctionner" +msgstr "Exécuter %s en ordre sériel inverse avec %s peut ne pas fonctionner" -#: config/tc-d30v.c:1113 +#: config/tc-d30v.c:1081 #, c-format msgid "Executing %s in IU in reverse serial may not work" -msgstr "Exécuter %s dans IU en ordre sériel inverse peut ne pas fonctionner" +msgstr "Exécuter %s dans IU en ordre sériel inverse peut ne pas fonctionner" -#: config/tc-d30v.c:1302 +#: config/tc-d30v.c:1271 msgid "Odd numbered register used as target of multi-register instruction" -msgstr "" -"Registre numéroté impair utilisé comme cible d'une instruction à multiples " -"resgistres" +msgstr "Registre numéroté impair utilisé comme cible d'une instruction à registres multiples" -#: config/tc-d30v.c:1366 config/tc-d30v.c:1401 +#: config/tc-d30v.c:1335 config/tc-d30v.c:1371 #, c-format msgid "unknown condition code: %s" msgstr "code de condition inconnue: %s" -#: config/tc-d30v.c:1394 +#: config/tc-d30v.c:1364 #, c-format msgid "cmpu doesn't support condition code %s" msgstr "cmpu ne supporte pas le code de condition %s" -#: config/tc-d30v.c:1429 +#: config/tc-d30v.c:1399 #, c-format msgid "unknown opcode: %s" msgstr "opcode inconnu: %s" -#: config/tc-d30v.c:1440 +#: config/tc-d30v.c:1410 #, c-format msgid "operands for opcode `%s' do not match any valid format" -msgstr "opérande pour le opcode « %s » ne correspond pas avec un format valide" +msgstr "opérandes pour l'opcode « %s » ne correspondent à aucun format valable" -#: config/tc-d30v.c:1655 config/tc-d30v.c:1672 +#: config/tc-d30v.c:1625 config/tc-d30v.c:1642 msgid "Cannot assemble instruction" msgstr "Ne peut assembler l'instruction" -#: config/tc-d30v.c:1657 +#: config/tc-d30v.c:1627 msgid "First opcode is long. Unable to mix instructions as specified." -msgstr "" -"Le 1er opcode est long. Incapable de mélanger des instructions tel que " -"spécifié." +msgstr "Le 1er opcode est long. Incapable de mélanger des instructions tel que spécifié." -#: config/tc-d30v.c:1726 +#: config/tc-d30v.c:1697 msgid "word of NOPs added between word multiply and load" -msgstr "mot de NOP ajouté entre « word multiply» et «load »" +msgstr "mot de NOP ajouté entre « word multiply » et « load »" -#: config/tc-d30v.c:1728 +#: config/tc-d30v.c:1699 msgid "word of NOPs added between word multiply and 16-bit multiply" -msgstr "mot de NOP ajouté entre « word multiply» et «16- bits multiply »'" +msgstr "mot de NOP ajouté entre « word multiply » et « 16- bits multiply »" -#: config/tc-d30v.c:1760 +#: config/tc-d30v.c:1731 msgid "Instruction uses long version, so it cannot be mixed as specified" -msgstr "" -"L'instruction utilise une version avec long, aussi elle ne peut être " -"mélangée tel que spécifié" +msgstr "L'instruction utilise une version avec long, aussi elle ne peut être mélangée tel que spécifié" -#: config/tc-d30v.c:1887 +#: config/tc-d30v.c:1858 #, c-format msgid "value too large to fit in %d bits" msgstr "valeur trop grande pour entrer dans %d bits" -#: config/tc-d30v.c:1948 +#: config/tc-d30v.c:1926 #, c-format msgid "line %d: unable to place address of symbol '%s' into a byte" -msgstr "" -"ligne %d: incapable d'insérer l'adresse du symbole « %s » dans un octet" +msgstr "ligne %d: incapable d'insérer l'adresse du symbole « %s » dans un octet" -#: config/tc-d30v.c:1951 +#: config/tc-d30v.c:1929 #, c-format msgid "line %d: unable to place value %lx into a byte" -msgstr "ligne %d: incapable d'insérer la valeur %lx dans un octet" +msgstr "ligne %d: incapable d'insérer la valeur %lx dans un octet" -#: config/tc-d30v.c:1959 +#: config/tc-d30v.c:1937 #, c-format msgid "line %d: unable to place address of symbol '%s' into a short" -msgstr "" -"ligne %d: incapable d'insérer l'adresse du symbole « %s » dans un short" +msgstr "ligne %d: incapable d'insérer l'adresse du symbole « %s » dans un short" -#: config/tc-d30v.c:1962 +#: config/tc-d30v.c:1940 #, c-format msgid "line %d: unable to place value %lx into a short" -msgstr "ligne %d: incapable d'insérer la valeur %lx dans un short" +msgstr "ligne %d: incapable d'insérer la valeur %lx dans un short" -#: config/tc-d30v.c:1970 +#: config/tc-d30v.c:1948 #, c-format msgid "line %d: unable to place address of symbol '%s' into a quad" -msgstr "ligne %d: incapable d'insérer l'adresse du symbole « %s » dans un quad" +msgstr "ligne %d: incapable d'insérer l'adresse du symbole « %s » dans un quad" -#: config/tc-d30v.c:2078 +#: config/tc-d30v.c:2056 #, c-format msgid "Alignment too large: %d assumed" -msgstr "Alignement trop grand: %d assumé" +msgstr "Alignement trop grand: %d assumé" -#: config/tc-dlx.c:211 +#: config/tc-dlx.c:212 msgid "missing .proc" msgstr ".proc manquant" -#: config/tc-dlx.c:228 +#: config/tc-dlx.c:229 msgid ".endfunc missing for previous .proc" -msgstr ".endfunc manquant pour la déclaration .proc précédente" +msgstr ".endfunc manquant pour la déclaration .proc précédente" + +#: config/tc-dlx.c:291 config/tc-i860.c:227 config/tc-mips.c:1916 +#, c-format +msgid "internal error: can't hash `%s': %s\n" +msgstr "erreur interne: ne peut adresser par hachage « %s »: %s\n" #. Probably a memory allocation problem? Give up now. -#: config/tc-dlx.c:297 config/tc-hppa.c:8306 config/tc-mips.c:1768 -#: config/tc-mips.c:1820 config/tc-or32.c:211 config/tc-sparc.c:869 +#: config/tc-dlx.c:298 config/tc-hppa.c:8333 config/tc-mips.c:1919 +#: config/tc-mips.c:1973 config/tc-or32.c:211 config/tc-sparc.c:860 msgid "Broken assembler. No assembly attempted." -msgstr "Bris d'assemblage. Aucune tentative d'assemblage." +msgstr "Assemblage cassé. Aucune tentative d'assemblage." -#: config/tc-dlx.c:327 +#: config/tc-dlx.c:328 #, c-format msgid "Bad operand for a load instruction: <%s>" -msgstr "Opérande invalide pour une instruction de chargement (load): « %s »" +msgstr "Opérande invalide pour une instruction de chargement (load): « %s »" -#: config/tc-dlx.c:441 +#: config/tc-dlx.c:442 #, c-format msgid "Bad operand for a store instruction: <%s>" -msgstr "Opérande erronée pour une instruction de stockage: « %s »" +msgstr "Opérande erroné pour une instruction de stockage: « %s »" -#: config/tc-dlx.c:621 +#: config/tc-dlx.c:622 #, c-format msgid "Expression Error for operand modifier %%hi/%%lo\n" -msgstr "ERREUR d'expression pour le modificateur d'opérande %%hi/%%lo\n" +msgstr "Erreur d'expression pour le modificateur d'opérande %%hi/%%lo\n" -#: config/tc-dlx.c:634 config/tc-or32.c:871 +#: config/tc-dlx.c:635 config/tc-or32.c:811 #, c-format msgid "Invalid expression after %%%%\n" -msgstr "expression invalide après %%%%\n" +msgstr "Expression invalide après %%%%\n" -#: config/tc-dlx.c:703 +#: config/tc-dlx.c:703 config/tc-tic4x.c:2487 #, c-format msgid "Unknown opcode `%s'." -msgstr "opcode inconnu « %s »" +msgstr "Opcode « %s » inconnu." -#: config/tc-dlx.c:716 +#: config/tc-dlx.c:715 msgid "Can not set dlx_skip_hi16_flag" -msgstr "ne peut initialiser dlx_skip_hi16_flag" +msgstr "Ne peut initialiser dlx_skip_hi16_flag" -#: config/tc-dlx.c:730 +#: config/tc-dlx.c:729 #, c-format msgid "Missing arguments for opcode <%s>." -msgstr "arguments manquants pour le opcode « %s »" +msgstr "Arguments manquants pour l'opcode « %s »." -#: config/tc-dlx.c:764 +#: config/tc-dlx.c:763 #, c-format msgid "Too many operands: %s" -msgstr "Trop d'opérandes: %s" +msgstr "Trop d'opérandes: %s" -#: config/tc-dlx.c:801 +#: config/tc-dlx.c:800 #, c-format msgid "Both the_insn.HI and the_insn.LO are set : %s" -msgstr "à la fois the_insn.HI et the_insn.LO sont initialisés : %s" +msgstr "À la fois the_insn.HI et the_insn.LO sont initialisés : %s" -#: config/tc-dlx.c:871 +#: config/tc-dlx.c:870 msgid "failed regnum sanity check." -msgstr "échec du regnum de la vérification de l'état de santé" +msgstr "échec de la vérification de l'état de santé du regnum." -#: config/tc-dlx.c:884 +#: config/tc-dlx.c:883 msgid "failed general register sanity check." -msgstr "échec du registre général de la vérification de l'état de santé" +msgstr "échec de la vérification de l'état de santé du registre général." + +#. Types or values of args don't match. +#: config/tc-dlx.c:891 +msgid "Invalid operands" +msgstr "Opérandes invalides" -#: config/tc-dlx.c:1175 config/tc-or32.c:833 +#: config/tc-dlx.c:1120 config/tc-or32.c:773 #, c-format msgid "label \"$%d\" redefined" -msgstr "étiquette \"$%d\" redéfinie" +msgstr "étiquette « $%d » redéfinie" -#: config/tc-dlx.c:1213 +#: config/tc-dlx.c:1158 msgid "Invalid expression after # number\n" -msgstr "expression invalide après # numéro\n" +msgstr "Expression invalide après # numéro\n" #: config/tc-fr30.c:82 #, c-format msgid " FR30 specific command line options:\n" -msgstr " Options spécifiques de la ligne de commande FR30:\n" +msgstr " Options spécifiques de la ligne de commande FR30:\n" #: config/tc-fr30.c:135 #, c-format msgid "Instruction %s not allowed in a delay slot." -msgstr "Instruction %s n'est pas permise dans la plage de délai" +msgstr "Instruction %s n'est pas permise dans la plage de délai." -#: config/tc-frv.c:461 +#: config/tc-frv.c:405 +#, c-format +msgid "Unknown cpu -mcpu=%s" +msgstr "Cpu inconnu -mcpu=%s" + +#: config/tc-frv.c:458 #, c-format msgid "FRV specific command line options:\n" -msgstr "Options spécifiques FRV de la ligne de commande:\n" +msgstr "Options spécifiques FRV de la ligne de commande:\n" + +#: config/tc-frv.c:459 +#, c-format +msgid "-G n Put data <= n bytes in the small data area\n" +msgstr "-G n Place données <= n octets dans la zone des petites données\n" + +#: config/tc-frv.c:460 +#, c-format +msgid "-mgpr-32 Mark generated file as only using 32 GPRs\n" +msgstr "-mgpr-32 Marque le fichier généré comme n'utilisant que 32 GPR\n" + +#: config/tc-frv.c:461 +#, c-format +msgid "-mgpr-64 Mark generated file as using all 64 GPRs\n" +msgstr "-mgpr-64 Marque le fichier généré comme utilisant les 64 GPR\n" #: config/tc-frv.c:462 #, c-format -msgid "-G n Data >= n bytes is in small data area\n" -msgstr "-G n données >= n octets est une petite zone de données\n" +msgid "-mfpr-32 Mark generated file as only using 32 FPRs\n" +msgstr "-mfpr-32 Marque le fichier généré comme n'utilisant que 32 FPR\n" #: config/tc-frv.c:463 #, c-format -msgid "-mgpr-32 Note 32 gprs are used\n" -msgstr "-mgpr-32 noter que grps 32 est utilisé\n" +msgid "-mfpr-64 Mark generated file as using all 64 FPRs\n" +msgstr "-mfpr-64 Marque le fichier généré comme utilisant les 64 FPR\n" #: config/tc-frv.c:464 #, c-format -msgid "-mgpr-64 Note 64 gprs are used\n" -msgstr "-mgpr-64 noter que grps 64 est utilisé\n" +msgid "-msoft-float Mark generated file as using software FP\n" +msgstr "-msoft-float Marque le fichier généré comme utilisant la virgule flottante logicielle\n" #: config/tc-frv.c:465 #, c-format -msgid "-mfpr-32 Note 32 fprs are used\n" -msgstr "-mfpr-32 noter que frps 32 est utilisé\n" +msgid "-mdword Mark generated file as using a 8-byte stack alignment\n" +msgstr "-mdword Marquer le fichier comme utilisant un alignement de pile de 8 octets\n" #: config/tc-frv.c:466 #, c-format -msgid "-mfpr-64 Note 64 fprs are used\n" -msgstr "-mfpr-64 noter que frps 64 est utilisé\n" +msgid "-mno-dword Mark generated file as using a 4-byte stack alignment\n" +msgstr "-mno-dword Marquer le fichier comme utilisant un alignement de pile de 4 octets\n" #: config/tc-frv.c:467 #, c-format -msgid "-msoft-float Note software fp is used\n" -msgstr "-msoft-float noter que le fp logiciel est utilisé\n" +msgid "-mdouble Mark generated file as using double precision FP insns\n" +msgstr "-mdouble Marque le fichier généré comme utilisant les instructions FP double précision\n" #: config/tc-frv.c:468 #, c-format -msgid "-mdword Note stack is aligned to a 8 byte boundary\n" -msgstr "" -"-mdword noter que la pile est alignée sur une frontière de 8 octets\n" +msgid "-mmedia Mark generated file as using media insns\n" +msgstr "-mmedia Marque le fichier généré comme utilisant les instructions media\n" #: config/tc-frv.c:469 #, c-format -msgid "-mno-dword Note stack is aligned to a 4 byte boundary\n" -msgstr "" -"-mno-dword noter que la pile est alignée sur une frontière de 4 octets\n" +msgid "-mmuladd Mark generated file as using multiply add/subtract insns\n" +msgstr "-mmuladd Marquer le fichier généré comme utilisant des instructions add/subtract multiples\n" #: config/tc-frv.c:470 #, c-format -msgid "-mdouble Note fp double insns are used\n" -msgstr "-mdouble noter que insns fp double sont utilisés\n" +msgid "-mpack Allow instructions to be packed\n" +msgstr "-mpack Autorise le compactage des instructions\n" #: config/tc-frv.c:471 #, c-format -msgid "-mmedia Note media insns are used\n" -msgstr "-mmedia noter que insns fp double sont utilisés\n" +msgid "-mno-pack Do not allow instructions to be packed\n" +msgstr "-mno-pack Ne pas autoriser le compactage des instructions\n" #: config/tc-frv.c:472 #, c-format -msgid "-mmuladd Note multiply add/subtract insns are used\n" -msgstr "" -"-mmuladd noter que les insns multiplicatif add/sous sont utilisés\n" +msgid "-mpic Mark generated file as using small position independent code\n" +msgstr "-mpic Marquer le fichier généré comme utilisant du petit code indépendant de la position\n" #: config/tc-frv.c:473 #, c-format -msgid "-mpack Note instructions are packed\n" -msgstr "-mpack noter que les instructions sont empaquetées\n" +msgid "-mPIC Mark generated file as using large position independent code\n" +msgstr "-mPIC Marquer le fichier généré comme utilisant du grand code indépendant de la position\n" #: config/tc-frv.c:474 #, c-format -msgid "-mno-pack Do not allow instructions to be packed\n" -msgstr "-mno-pack ne pas empaqueter les instructions\n" +msgid "-mlibrary-pic Mark generated file as using position indepedent code for libraries\n" +msgstr "-mlibrary-pic Marquer le fichier généré comme utilisant du code indépendant de la position pour des librairies\n" #: config/tc-frv.c:475 #, c-format -msgid "-mpic Note small position independent code\n" -msgstr "-mpic noter le petit code indépendant de la position\n" +msgid "-mfdpic Assemble for the FDPIC ABI\n" +msgstr "-mfdpic Assemble pour l'ABI FDPIC\n" #: config/tc-frv.c:476 #, c-format -msgid "-mPIC Note large position independent code\n" -msgstr "-mPIC noter le grand code indépendant de la position\n" +msgid "-mnopic Disable -mpic, -mPIC, -mlibrary-pic and -mfdpic\n" +msgstr "-mnopic Désactive -mpic, -mPIC, -mlibrary-pic et -mfdpic\n" #: config/tc-frv.c:477 #, c-format -msgid "-mlibrary-pic Compile library for large position indepedent code\n" -msgstr "" -"-mlibrary-pic compiler la librairie pour du grand code indépendant de la " -"position\n" +msgid "-mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat}\n" +msgstr "-mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat}\n" #: config/tc-frv.c:478 #, c-format -msgid "-mfdpic Assemble for the FDPIC ABI\n" -msgstr "" +msgid " Record the cpu type\n" +msgstr " Enregistrer le type de cpu\n" #: config/tc-frv.c:479 #, c-format -msgid "-mnopic Disable -mpic, -mPIC, -mlibrary-pic and -mfdpic\n" -msgstr "" +msgid "-mtomcat-stats Print out stats for tomcat workarounds\n" +msgstr "-mtomcat-stats Afficher les statistiques pour les arrangements pour tomcat\n" #: config/tc-frv.c:480 -#, fuzzy, c-format -msgid "-mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat}\n" -msgstr "-mcpu={fr500|fr400|fr300|frv|simple|tomcat}\n" - -#: config/tc-frv.c:481 -#, c-format -msgid " Record the cpu type\n" -msgstr " enregistrer le type de cpu\n" - -#: config/tc-frv.c:482 -#, c-format -msgid "-mtomcat-stats Print out stats for tomcat workarounds\n" -msgstr "" -"-mtomcat-stats afficher les statistiques pour les arrangements pour tomcat\n" - -#: config/tc-frv.c:483 #, c-format -msgid "-mtomcat-debug Debug tomcat workarounds\n" -msgstr "-mtomcat-debug arrengements de débug pour tomcat\n" +msgid "-mtomcat-debug Debug tomcat workarounds\n" +msgstr "-mtomcat-debug Arrangements de débug pour tomcat\n" -#: config/tc-frv.c:1187 +#: config/tc-frv.c:1162 msgid "VLIW packing used for -mno-pack" -msgstr "VLIW empaquetage utilisé pour -mno-pack" +msgstr "VLIW empaquetage utilisé pour -mno-pack" -#: config/tc-frv.c:1197 -#, fuzzy +#: config/tc-frv.c:1172 msgid "Instruction not supported by this architecture" -msgstr "L'option -R n'est pas supportée pour la cible." +msgstr "Instruction pas supportée par cette architecture" -#: config/tc-frv.c:1207 +#: config/tc-frv.c:1182 msgid "VLIW packing constraint violation" msgstr "VLIW violation de la contrainte d'empaquetage" -#: config/tc-frv.c:1874 +#: config/tc-frv.c:1773 #, c-format msgid "Relocation %s is not safe for %s" -msgstr "Relocalisation %s n'est pas sûre pour %s" - -#: config/tc-h8300.c:76 config/tc-h8300.c:85 config/tc-h8300.c:95 -#: config/tc-h8300.c:105 config/tc-h8300.c:115 config/tc-h8300.c:126 -#: config/tc-h8300.c:193 config/tc-hppa.c:6839 config/tc-hppa.c:6845 -#: config/tc-hppa.c:6851 config/tc-hppa.c:6857 config/tc-hppa.c:8264 -#: config/tc-mn10300.c:1222 config/tc-mn10300.c:1227 config/tc-mn10300.c:2729 -#: config/tc-xc16x.c:79 config/tc-xc16x.c:86 config/tc-xc16x.c:93 -msgid "could not set architecture and machine" -msgstr "ne peut initialiser l'architecture et la machine" +msgstr "Réadressage %s n'est pas sûr pour %s" + +#: config/tc-h8300.c:174 +#, c-format +msgid "new section '%s' defined without attributes - this might cause problems" +msgstr "nouvelle section « %s » définie sans attributs - cela pourrait causer des problèmes" -#: config/tc-h8300.c:395 config/tc-h8300.c:403 +#: config/tc-h8300.c:446 config/tc-h8300.c:454 msgid "Reg not valid for H8/300" msgstr "Registre invalide pour H8/300" -#: config/tc-h8300.c:484 +#: config/tc-h8300.c:535 msgid "invalid operand size requested" -msgstr "requête invalide de taille d'opérandes" +msgstr "mauvaise taille d'opérande demandée" -#: config/tc-h8300.c:583 +#: config/tc-h8300.c:634 msgid "Invalid register list for ldm/stm\n" msgstr "Liste de registres invalide pour ldm/stm\n" -#: config/tc-h8300.c:609 config/tc-h8300.c:614 config/tc-h8300.c:621 +#: config/tc-h8300.c:660 config/tc-h8300.c:665 config/tc-h8300.c:672 msgid "mismatch between register and suffix" msgstr "pas de concordance entre le registre et le suffixe" -#: config/tc-h8300.c:648 +#: config/tc-h8300.c:677 +msgid "invalid suffix after register." +msgstr "suffixe invalide après le registre." + +#: config/tc-h8300.c:699 msgid "address too high for vector table jmp/jsr" msgstr "adresse trop grande pour la table de vecteur jmp/jsr" -#: config/tc-h8300.c:675 config/tc-h8300.c:787 config/tc-h8300.c:797 +#: config/tc-h8300.c:726 config/tc-h8300.c:838 config/tc-h8300.c:848 msgid "Wrong size pointer register for architecture." -msgstr "Taille erronée du registre de pointeur pour l'architecture" +msgstr "Taille erronée du registre de pointeur pour l'architecture" -#: config/tc-h8300.c:734 config/tc-h8300.c:742 config/tc-h8300.c:771 +#: config/tc-h8300.c:785 config/tc-h8300.c:793 config/tc-h8300.c:822 msgid "expected @(exp, reg16)" -msgstr "@ attendu (exp, reg16)" +msgstr "@(exp, reg16) attendu" -#: config/tc-h8300.c:760 +#: config/tc-h8300.c:811 msgid "expected .L, .W or .B for register in indexed addressing mode" -msgstr "attendu .L, .W ou .B pour le registre dans le mode d'adressage indexé" +msgstr ".L, .W ou .B attendu pour le registre dans le mode d'adressage indexé" -#: config/tc-h8300.c:954 +#: config/tc-h8300.c:1005 msgid "expected valid addressing mode for mova: \"@(disp, ea.sz),ERn\"" -msgstr "attendu un mode d'adressage valide pour mova: \"@(disp, ea.sz),ERn\"" +msgstr "mode d'adressage valide attendu pour mova: \"@(disp, ea.sz),ERn\"" -#: config/tc-h8300.c:972 config/tc-h8300.c:981 +#: config/tc-h8300.c:1023 config/tc-h8300.c:1032 msgid "expected register" msgstr "registre attendu" -#: config/tc-h8300.c:997 +#: config/tc-h8300.c:1048 msgid "expected closing paren" -msgstr "parenthèses de fermeture attendue" +msgstr "parenthèses fermante attendue" -#: config/tc-h8300.c:1056 +#: config/tc-h8300.c:1107 #, c-format msgid "can't use high part of register in operand %d" -msgstr "ne peut utiliser la partie haute du registre dans l'opérande %d" +msgstr "ne peut utiliser la partie haute du registre dans l'opérande %d" -#: config/tc-h8300.c:1213 +#: config/tc-h8300.c:1264 #, c-format msgid "Opcode `%s' with these operand types not available in %s mode" -msgstr "" -"Opcode « %s » avec ces type d'opérandes ne sont pas disponibles en mode %s" +msgstr "Opcode « %s » avec ces types d'opérandes ne sont pas disponibles en mode %s" -#: config/tc-h8300.c:1222 +#: config/tc-h8300.c:1273 msgid "mismatch between opcode size and operand size" -msgstr "pas de concordance entre la taille du opcode et celle de l'opérande" +msgstr "pas de concordance entre la taille du opcode et celle de l'opérande" -#: config/tc-h8300.c:1258 +#: config/tc-h8300.c:1309 #, c-format msgid "operand %s0x%lx out of range." -msgstr "opérande %s0x%lx hors limite." +msgstr "opérande %s0x%lx hors limite." -#: config/tc-h8300.c:1354 +#: config/tc-h8300.c:1416 msgid "Can't work out size of operand.\n" -msgstr "Ne peut traiter la taille de l'opérande.\n" +msgstr "Ne peut découvrir la taille de l'opérande.\n" -#: config/tc-h8300.c:1403 +#: config/tc-h8300.c:1465 #, c-format msgid "Opcode `%s' with these operand types not available in H8/300 mode" -msgstr "" -"opcode « %s » avec ces types d'opérandes ne sont pas disponibles en mode " -"H8/300" +msgstr "Opcode « %s » avec ces types d'opérandes n'est pas disponible en mode H8/300" -#: config/tc-h8300.c:1408 +#: config/tc-h8300.c:1470 #, c-format msgid "Opcode `%s' with these operand types not available in H8/300H mode" -msgstr "" -"Opcode « %s » avec ces types d'opérandes ne sont pas disponibles en mode " -"H8/300H" +msgstr "Opcode « %s » avec ces types d'opérandes n'est pas disponible en mode H8/300H" -#: config/tc-h8300.c:1414 +#: config/tc-h8300.c:1476 #, c-format msgid "Opcode `%s' with these operand types not available in H8/300S mode" -msgstr "" -"Opcode « %s » avec ces types d'opérandes ne sont pas disponibles en mode " -"H8/300S" +msgstr "Opcode « %s » avec ces types d'opérandes n'est pas disponible en mode H8/300S" -#: config/tc-h8300.c:1475 config/tc-h8300.c:1495 +#: config/tc-h8300.c:1537 config/tc-h8300.c:1557 msgid "Need #1 or #2 here" msgstr "A besoin de #1 ou #2 ici" -#: config/tc-h8300.c:1490 +#: config/tc-h8300.c:1552 msgid "#4 not valid on H8/300." msgstr "#4 n'est pas valide sur H8/300." -#: config/tc-h8300.c:1596 config/tc-h8300.c:1678 +#: config/tc-h8300.c:1660 config/tc-h8300.c:1742 #, c-format msgid "branch operand has odd offset (%lx)\n" -msgstr "opérande de branchement a un décalage impair (%lx)\n" +msgstr "opérande de branchement a un décalage impair (%lx)\n" -#: config/tc-h8300.c:1716 +#: config/tc-h8300.c:1780 msgid "destination operand must be 16 bit register" -msgstr "opérande de destination doit être un registre de 16 bits" +msgstr "opérande de destination doit être un registre de 16 bits" -#: config/tc-h8300.c:1725 +#: config/tc-h8300.c:1789 msgid "source operand must be 8 bit register" -msgstr "opérande source doit être un registre de 8 bits" +msgstr "opérande source doit être un registre de 8 bits" -#: config/tc-h8300.c:1733 +#: config/tc-h8300.c:1797 msgid "destination operand must be 16bit absolute address" -msgstr "opérande de destination doit être une adresse absolue de 16 bits" +msgstr "opérande de destination doit être une adresse absolue de 16 bits" -#: config/tc-h8300.c:1740 +#: config/tc-h8300.c:1804 msgid "destination operand must be 8 bit register" -msgstr "opérande de destination doit être un registre de 8 bits" +msgstr "opérande de destination doit être un registre de 8 bits" -#: config/tc-h8300.c:1748 +#: config/tc-h8300.c:1812 msgid "source operand must be 16bit absolute address" -msgstr "opérande source doit être une adresse absolue de 16 bits" +msgstr "opérande source doit être une adresse absolue de 16 bits" #. This seems more sane than saying "too many operands". We'll #. get here only if the trailing trash starts with a comma. #. Types or values of args don't match. -#: config/tc-h8300.c:1756 config/tc-mmix.c:472 config/tc-mmix.c:484 -#: config/tc-mmix.c:2525 config/tc-mmix.c:2549 config/tc-mmix.c:2822 -#: config/tc-or32.c:528 +#: config/tc-h8300.c:1820 config/tc-mmix.c:472 config/tc-mmix.c:484 +#: config/tc-mmix.c:2505 config/tc-mmix.c:2529 config/tc-mmix.c:2802 +#: config/tc-or32.c:527 msgid "invalid operands" -msgstr "opérandes invalides" +msgstr "opérandes invalides" -#: config/tc-h8300.c:1787 +#: config/tc-h8300.c:1851 msgid "operand/size mis-match" -msgstr "tailles/opérandes ne concordent pas" +msgstr "tailles/opérandes ne concordent pas" -#: config/tc-h8300.c:1883 config/tc-mips.c:9771 config/tc-sh.c:2925 +#: config/tc-h8300.c:1952 config/tc-mips.c:10170 config/tc-sh.c:2971 #: config/tc-sh64.c:2795 config/tc-z8k.c:1226 msgid "unknown opcode" msgstr "opcode inconnu" -#: config/tc-h8300.c:1916 -#, fuzzy +#: config/tc-h8300.c:1985 msgid "invalid operand in ldm" -msgstr "opérande invalide" +msgstr "opérande invalide dans ldm" -#: config/tc-h8300.c:1925 -#, fuzzy +#: config/tc-h8300.c:1994 msgid "invalid operand in stm" -msgstr "opérandes invalides" +msgstr "opérande invalide dans stm" -#: config/tc-h8300.c:2091 +#: config/tc-h8300.c:2120 #, c-format msgid "call to tc_aout_fix_to_chars \n" msgstr "appel de tc_aout_fix_to_chars \n" -#: config/tc-h8300.c:2100 config/tc-xc16x.c:389 +#: config/tc-h8300.c:2129 config/tc-xc16x.c:347 #, c-format msgid "call to md_convert_frag \n" msgstr "appel de md_convert_frag \n" -#: config/tc-h8300.c:2151 config/tc-xc16x.c:293 +#: config/tc-h8300.c:2180 config/tc-xc16x.c:251 #, c-format -msgid "call tomd_estimate_size_before_relax \n" -msgstr "appel de tomd_estimate_size_before_relax \n" +msgid "call to md_estimate_size_before_relax \n" +msgstr "appel de md_estimate_size_before_relax \n" + +#: config/tc-h8300.c:2195 +msgid "Unexpected reference to a symbol in a non-code section" +msgstr "Référence inattendue à un symbole dans une section qui n'est pas du code" + +#: config/tc-h8300.c:2211 config/tc-xc16x.c:292 +msgid "Difference of symbols in different sections is not supported" +msgstr "Des différences de symboles dans des sections différentes ne sont pas supportées" -#: config/tc-h8300.c:2202 config/tc-mcore.c:2265 config/tc-pj.c:537 -#: config/tc-sh.c:4401 config/tc-xc16x.c:357 +#: config/tc-h8300.c:2233 config/tc-mcore.c:2199 config/tc-microblaze.c:2294 +#: config/tc-pj.c:487 config/tc-sh.c:4468 config/tc-tic6x.c:4103 +#: config/tc-xc16x.c:315 #, c-format msgid "Cannot represent relocation type %s" -msgstr "Ne peut représenter le type de relocalisation %s" +msgstr "Ne peut représenter le type de réadressage %s" #. Simple range checking for FIELD against HIGH and LOW bounds. #. IGNORE is used to suppress the error message. #. Variant of CHECK_FIELD for use in md_apply_fix and other places where #. the current file and line number are not valid. -#: config/tc-hppa.c:1015 config/tc-hppa.c:1029 +#: config/tc-hppa.c:1029 config/tc-hppa.c:1043 #, c-format msgid "Field out of range [%d..%d] (%d)." msgstr "Champ hors limite [%d..%d] (%d)." #. Simple alignment checking for FIELD against ALIGN (a power of two). #. IGNORE is used to suppress the error message. -#: config/tc-hppa.c:1043 +#: config/tc-hppa.c:1057 #, c-format msgid "Field not properly aligned [%d] (%d)." -msgstr "Champ incorrectement alligné [%d] (%d)." +msgstr "Champ incorrectement aligné [%d] (%d)." -#: config/tc-hppa.c:1092 +#: config/tc-hppa.c:1110 msgid "Missing .exit\n" msgstr ".exit manquant\n" -#: config/tc-hppa.c:1095 +#: config/tc-hppa.c:1113 msgid "Missing .procend\n" msgstr ".procend manquant\n" -#: config/tc-hppa.c:1277 +#: config/tc-hppa.c:1298 #, c-format msgid "Invalid field selector. Assuming F%%." -msgstr "Sélecteur de champ invalide. F%% assumé." +msgstr "Sélecteur de champ invalide. F%% assumé." -#: config/tc-hppa.c:1304 +#: config/tc-hppa.c:1325 msgid "Bad segment in expression." -msgstr "Segment erroné dans l'expression." +msgstr "Segment erroné dans l'expression." -#: config/tc-hppa.c:1329 +#: config/tc-hppa.c:1350 #, c-format msgid "Invalid Nullification: (%c)" msgstr "Nullification invalide: (%c)" -#: config/tc-hppa.c:1438 +#: config/tc-hppa.c:1421 msgid "Cannot handle fixup" msgstr "Ne peut traiter le correctif" -#: config/tc-hppa.c:1736 +#: config/tc-hppa.c:1719 #, c-format msgid " -Q ignored\n" -msgstr " -Q ignoré\n" +msgstr " -Q ignoré\n" -#: config/tc-hppa.c:1740 +#: config/tc-hppa.c:1723 #, c-format msgid " -c print a warning if a comment is found\n" -msgstr " -c avertir si un commentaire est trouver\n" +msgstr " -c avertir si un commentaire est trouvé\n" -#: config/tc-hppa.c:1806 +#: config/tc-hppa.c:1789 #, c-format msgid "no hppa_fixup entry for fixup type 0x%x" -msgstr "pas d'entrée hppa_fixup entry pour le coirrectif du type 0x%x" +msgstr "pas d'entrée hppa_fixup entry pour le correctif du type 0x%x" -#: config/tc-hppa.c:1985 +#: config/tc-hppa.c:1968 msgid "Unknown relocation encountered in md_apply_fix." -msgstr "Relocalisation inconnue rencontrée dans md_apply_fix." +msgstr "Réadressage inconnu rencontré dans md_apply_fix." -#: config/tc-hppa.c:2173 config/tc-hppa.c:2198 +#: config/tc-hppa.c:2156 config/tc-hppa.c:2181 #, c-format msgid "Undefined register: '%s'." -msgstr "Registre indéfinie: « %s »." +msgstr "Registre indéfini: « %s »." -#: config/tc-hppa.c:2232 +#: config/tc-hppa.c:2215 #, c-format msgid "Non-absolute symbol: '%s'." -msgstr "Symbole non absolu: « %s »." +msgstr "Symbole non absolu: « %s »." -#: config/tc-hppa.c:2247 +#: config/tc-hppa.c:2230 #, c-format msgid "Undefined absolute constant: '%s'." -msgstr "Constante absolue indéfinie: « %s »." +msgstr "Constante absolue indéfinie: « %s »." -#: config/tc-hppa.c:2278 config/tc-hppa.c:5697 +#: config/tc-hppa.c:2261 config/tc-hppa.c:5696 msgid "could not update architecture and machine" -msgstr "ne peut mettre à jour l'architecture et la machine" +msgstr "ne peut mettre à jour l'architecture et la machine" -#: config/tc-hppa.c:2316 +#: config/tc-hppa.c:2299 #, c-format msgid "Invalid FP Compare Condition: %s" msgstr "Condition de comparaison FP invalide: %s" -#: config/tc-hppa.c:2371 +#: config/tc-hppa.c:2354 #, c-format msgid "Invalid FTEST completer: %s" -msgstr "Complèteur FTEST invalise: %s" +msgstr "Complèteur FTEST invalide: %s" -#: config/tc-hppa.c:2437 config/tc-hppa.c:2474 +#: config/tc-hppa.c:2420 config/tc-hppa.c:2457 #, c-format msgid "Invalid FP Operand Format: %3s" -msgstr "Format d'opérande FP invalide: %3s" +msgstr "Format d'opérande FP invalide: %3s" -#: config/tc-hppa.c:2609 +#: config/tc-hppa.c:2591 msgid "Bad segment (should be absolute)." -msgstr "Segement erroné (doit être absolu)." +msgstr "Segment erroné (devrait être absolu)." -#: config/tc-hppa.c:2635 +#: config/tc-hppa.c:2617 #, c-format msgid "Invalid argument location: %s\n" -msgstr "Localisation invalide de l'argument: %s\n" +msgstr "Position d'argument invalide: %s\n" -#: config/tc-hppa.c:2664 +#: config/tc-hppa.c:2646 #, c-format msgid "Invalid argument description: %d" msgstr "Description invalide de l'argument: %d" -#: config/tc-hppa.c:3490 +#: config/tc-hppa.c:3474 msgid "Invalid Indexed Load Completer." -msgstr "Complèteur de chargement indexé invalide." +msgstr "Complèteur de chargement indexé invalide." -#: config/tc-hppa.c:3495 +#: config/tc-hppa.c:3479 msgid "Invalid Indexed Load Completer Syntax." -msgstr "Syntaxe de complèteur de chargement indexé invalide." +msgstr "Syntaxe de complèteur de chargement indexé invalide." -#: config/tc-hppa.c:3529 +#: config/tc-hppa.c:3513 msgid "Invalid Short Load/Store Completer." -msgstr "Short Load/Store Completer invalide." +msgstr "Complèteur Load/Store courts invalide." -#: config/tc-hppa.c:3589 config/tc-hppa.c:3594 +#: config/tc-hppa.c:3573 config/tc-hppa.c:3578 msgid "Invalid Store Bytes Short Completer" -msgstr "Store Bytes Short Completer invalide" +msgstr "Complèteur Store Bytes Short invalide" -#: config/tc-hppa.c:3905 config/tc-hppa.c:3911 +#: config/tc-hppa.c:3889 config/tc-hppa.c:3895 msgid "Invalid left/right combination completer" -msgstr "Combinaison de complèteur left/right invalide" +msgstr "Complèteur de combinaisons left/right invalide" -#: config/tc-hppa.c:3960 config/tc-hppa.c:3967 +#: config/tc-hppa.c:3944 config/tc-hppa.c:3951 msgid "Invalid permutation completer" -msgstr "Permutation de complèteur invalide" +msgstr "Complèteur de permutations invalide" -#: config/tc-hppa.c:4067 +#: config/tc-hppa.c:4057 #, c-format msgid "Invalid Add Condition: %s" msgstr "Condition d'addition invalide: %s" -#: config/tc-hppa.c:4078 config/tc-hppa.c:4088 +#: config/tc-hppa.c:4068 config/tc-hppa.c:4078 msgid "Invalid Add and Branch Condition" msgstr "Condition d'addition et de branchement invalide" -#: config/tc-hppa.c:4109 config/tc-hppa.c:4246 +#: config/tc-hppa.c:4099 config/tc-hppa.c:4236 msgid "Invalid Compare/Subtract Condition" msgstr "Condition comparaison/soustraction invalide" -#: config/tc-hppa.c:4149 +#: config/tc-hppa.c:4139 #, c-format msgid "Invalid Bit Branch Condition: %c" msgstr "Condition de bit de branchement invalide: %c" -#: config/tc-hppa.c:4234 +#: config/tc-hppa.c:4224 #, c-format msgid "Invalid Compare/Subtract Condition: %s" msgstr "Condition comparaison/soustraction invalide: %s" -#: config/tc-hppa.c:4261 +#: config/tc-hppa.c:4251 msgid "Invalid Compare and Branch Condition" msgstr "Condition comparaison et de branchement invalide" -#: config/tc-hppa.c:4357 +#: config/tc-hppa.c:4347 msgid "Invalid Logical Instruction Condition." -msgstr "Instruction de condition logique invalide." +msgstr "Condition d'instruction logique invalide." -#: config/tc-hppa.c:4412 +#: config/tc-hppa.c:4405 msgid "Invalid Shift/Extract/Deposit Condition." -msgstr "Condition décalage/extraction/dépot invalide." +msgstr "Condition décalage/extraction/dépôt invalide." -#: config/tc-hppa.c:4524 +#: config/tc-hppa.c:4517 msgid "Invalid Unit Instruction Condition." -msgstr "Instruction unaire (Unit) de condition invalide." +msgstr "Condition d'instruction unaire (Unit) invalide." -#: config/tc-hppa.c:4999 config/tc-hppa.c:5031 config/tc-hppa.c:5062 -#: config/tc-hppa.c:5092 +#: config/tc-hppa.c:4992 config/tc-hppa.c:5024 config/tc-hppa.c:5055 +#: config/tc-hppa.c:5085 msgid "Branch to unaligned address" -msgstr "Branchement non aligné sur une adresse" +msgstr "Branchement sur une adresse non alignée" -#: config/tc-hppa.c:5270 +#: config/tc-hppa.c:5269 msgid "Invalid SFU identifier" msgstr "Identificateur SFU invalide" -#: config/tc-hppa.c:5320 +#: config/tc-hppa.c:5319 msgid "Invalid COPR identifier" msgstr "Identificateur COPR invalide" -#: config/tc-hppa.c:5449 +#: config/tc-hppa.c:5448 msgid "Invalid Floating Point Operand Format." -msgstr "Format d'opérande en virgule flottante invalide." +msgstr "Format d'opérande en virgule flottante invalide." -#: config/tc-hppa.c:5566 config/tc-hppa.c:5586 config/tc-hppa.c:5606 -#: config/tc-hppa.c:5626 config/tc-hppa.c:5646 +#: config/tc-hppa.c:5565 config/tc-hppa.c:5585 config/tc-hppa.c:5605 +#: config/tc-hppa.c:5625 config/tc-hppa.c:5645 msgid "Invalid register for single precision fmpyadd or fmpysub" -msgstr "Registre invalide pour la précision simple fmpyadd ou fmpysub" +msgstr "Registre invalide pour la simple précision fmpyadd ou fmpysub" -#: config/tc-hppa.c:5714 +#: config/tc-hppa.c:5713 #, c-format msgid "Invalid operands %s" -msgstr "opérandes invalides %s" +msgstr "Opérandes invalides %s" -#: config/tc-hppa.c:5769 config/tc-hppa.c:6975 config/tc-hppa.c:7030 +#: config/tc-hppa.c:5723 +#, c-format +msgid "Immediates %d and %d will give undefined behavior." +msgstr "Les valeurs immédiates %d et %d vont donner lieu à un comportement indéfini." + +#: config/tc-hppa.c:5775 config/tc-hppa.c:7002 config/tc-hppa.c:7057 msgid "Missing function name for .PROC (corrupted label chain)" -msgstr "Nom de fonction manquant pour .PROC (chaîne d'étiquette corrompue)" +msgstr "Nom de fonction manquant pour .PROC (chaîne d'étiquette corrompue)" -#: config/tc-hppa.c:5772 config/tc-hppa.c:7033 +#: config/tc-hppa.c:5778 config/tc-hppa.c:7060 msgid "Missing function name for .PROC" -msgstr "Nom de fonction mauqnat pour .PROC" +msgstr "Nom de fonction manquant pour .PROC" -#: config/tc-hppa.c:5831 +#: config/tc-hppa.c:5837 msgid "Argument to .BLOCK/.BLOCKZ must be between 0 and 0x3fffffff" -msgstr "" +msgstr "L'argument à .BLOCK/.BLOCKZ doit être compris entre 0 et 0x3fffffff" -#: config/tc-hppa.c:5927 +#: config/tc-hppa.c:5933 #, c-format msgid "Invalid .CALL argument: %s" -msgstr "Argument invalide .CALL: %s" +msgstr "Argument .CALL invalide: %s" -#: config/tc-hppa.c:6061 +#: config/tc-hppa.c:6081 msgid ".callinfo is not within a procedure definition" -msgstr ".callinfo n'est pas à l'intérieur de la définition de procédure" +msgstr ".callinfo n'est pas à l'intérieur de la définition de procédure" -#: config/tc-hppa.c:6081 +#: config/tc-hppa.c:6101 #, c-format msgid "FRAME parameter must be a multiple of 8: %d\n" -msgstr "Paramètre FRAME doit être un multiple de 8: %d\n" +msgstr "Paramètre FRAME doit être un multiple de 8: %d\n" -#: config/tc-hppa.c:6100 +#: config/tc-hppa.c:6120 msgid "Value for ENTRY_GR must be in the range 3..18\n" -msgstr "Valeur de ENTRY_GR doit être dans la plage 3..18\n" +msgstr "Valeur de ENTRY_GR doit être dans la plage 3..18\n" -#: config/tc-hppa.c:6112 +#: config/tc-hppa.c:6132 msgid "Value for ENTRY_FR must be in the range 12..21\n" -msgstr "Valeur de ENTRY_FR doit être dans la plage 12..21\n" +msgstr "Valeur de ENTRY_FR doit être dans la plage 12..21\n" -#: config/tc-hppa.c:6122 +#: config/tc-hppa.c:6142 msgid "Value for ENTRY_SR must be 3\n" -msgstr "Valeur de ENTRY_SR doit être 3\n" +msgstr "Valeur de ENTRY_SR doit être 3\n" -#: config/tc-hppa.c:6178 +#: config/tc-hppa.c:6198 #, c-format msgid "Invalid .CALLINFO argument: %s" -msgstr "Argument à .CALLINFO invalide: %s" +msgstr "Argument à .CALLINFO invalide: %s" -#: config/tc-hppa.c:6288 +#: config/tc-hppa.c:6308 msgid "The .ENTER pseudo-op is not supported" -msgstr "Le pseudo-op .ENTER n'est pas supporté" +msgstr "Le pseudo-op .ENTER n'est pas supporté" -#: config/tc-hppa.c:6304 +#: config/tc-hppa.c:6324 msgid "Misplaced .entry. Ignored." -msgstr ".entry mal positionné. Ignoré." +msgstr ".entry mal positionné. Ignoré." -#: config/tc-hppa.c:6308 +#: config/tc-hppa.c:6328 msgid "Missing .callinfo." msgstr ".callinfo manquant." -#: config/tc-hppa.c:6372 +#: config/tc-hppa.c:6392 msgid ".REG expression must be a register" -msgstr "Expression .REG doit être un registre" +msgstr "Expression .REG doit être un registre" -#: config/tc-hppa.c:6388 +#: config/tc-hppa.c:6408 msgid "bad or irreducible absolute expression; zero assumed" -msgstr "expression absolue erronée ou irréductible; zéro assumé" +msgstr "expression absolue erronée ou irréductible; zéro assumé" -#: config/tc-hppa.c:6399 +#: config/tc-hppa.c:6419 msgid ".REG must use a label" -msgstr ".REG doit avoir une étiquette" +msgstr ".REG doit utiliser une étiquette" -#: config/tc-hppa.c:6401 +#: config/tc-hppa.c:6421 msgid ".EQU must use a label" -msgstr ".EQU doit avoir une étiquette" +msgstr ".EQU doit utiliser une étiquette" -#: config/tc-hppa.c:6463 +#: config/tc-hppa.c:6483 #, c-format msgid "Symbol '%s' could not be created." -msgstr "Symbole « %s » n'a pu être créé." +msgstr "Symbole « %s » n'a pu être créé." -#: config/tc-hppa.c:6467 +#: config/tc-hppa.c:6487 msgid "No memory for symbol name." -msgstr "Pas de mémoire pour le nom de symbole." +msgstr "Pas de mémoire pour le nom de symbole." -#: config/tc-hppa.c:6516 +#: config/tc-hppa.c:6537 msgid ".EXIT must appear within a procedure" -msgstr ".EXIT doit apparaître à l'intérieur d'une procédure" +msgstr ".EXIT doit apparaître à l'intérieur d'une procédure" -#: config/tc-hppa.c:6520 +#: config/tc-hppa.c:6541 msgid "Missing .callinfo" msgstr ".callinfo manquant" -#: config/tc-hppa.c:6524 +#: config/tc-hppa.c:6545 msgid "No .ENTRY for this .EXIT" msgstr "Pas de .ENTRY pour ce .EXIT" -#: config/tc-hppa.c:6564 +#: config/tc-hppa.c:6585 #, c-format msgid "Using ENTRY rather than CODE in export directive for %s" -msgstr "Utilise ENTRY plutôt que CODE dans la directive d'exportation pour %s" +msgstr "Utilise ENTRY plutôt que CODE dans la directive d'exportation pour %s" -#: config/tc-hppa.c:6681 +#: config/tc-hppa.c:6708 #, c-format msgid "Undefined .EXPORT/.IMPORT argument (ignored): %s" -msgstr "Argument .EXPORT/.IMPORT non défini (ignoré): %s" +msgstr "Argument .EXPORT/.IMPORT non défini (ignoré): %s" -#: config/tc-hppa.c:6705 +#: config/tc-hppa.c:6732 #, c-format msgid "Cannot define export symbol: %s\n" -msgstr "Ne peut définit un symbole d'exportation: %s\n" +msgstr "Ne peut définir un symbole d'exportation: %s\n" -#: config/tc-hppa.c:6802 +#: config/tc-hppa.c:6829 msgid "Missing label name on .LABEL" -msgstr "Nom d'étiquette manquant pour .LABEL" +msgstr "Nom d'étiquette manquant pour .LABEL" -#: config/tc-hppa.c:6807 +#: config/tc-hppa.c:6834 msgid "extra .LABEL arguments ignored." -msgstr "arguments superflues pour .LABEL sont ignorés." +msgstr "arguments superflus pour .LABEL sont ignorés." -#: config/tc-hppa.c:6823 +#: config/tc-hppa.c:6850 msgid "The .LEAVE pseudo-op is not supported" -msgstr "Le pseudo-op .LEAVE n'est pas supporté" +msgstr "Le pseudo-op .LEAVE n'est pas supporté" -#: config/tc-hppa.c:6861 +#: config/tc-hppa.c:6888 msgid "Unrecognized .LEVEL argument\n" msgstr "Argument .LEVEL non reconnu\n" -#: config/tc-hppa.c:6895 +#: config/tc-hppa.c:6922 #, c-format msgid "Cannot define static symbol: %s\n" -msgstr "Ne peut définir le symbole statique: %s\n" +msgstr "Ne peut définir le symbole statique: %s\n" -#: config/tc-hppa.c:6929 +#: config/tc-hppa.c:6956 msgid "Nested procedures" -msgstr "Procédure imbriquées" +msgstr "Procédure imbriquées" -#: config/tc-hppa.c:6939 +#: config/tc-hppa.c:6966 msgid "Cannot allocate unwind descriptor\n" -msgstr "Ne peut allouer un descripteur non étendu\n" +msgstr "Ne peut allouer un descripteur unwind\n" -#: config/tc-hppa.c:7037 +#: config/tc-hppa.c:7064 msgid "misplaced .procend" -msgstr ".procend mal positionné" +msgstr ".procend mal positionné" -#: config/tc-hppa.c:7040 +#: config/tc-hppa.c:7067 msgid "Missing .callinfo for this procedure" -msgstr ".callinfo manquant pour cette procédure" +msgstr ".callinfo manquant pour cette procédure" -#: config/tc-hppa.c:7043 +#: config/tc-hppa.c:7070 msgid "Missing .EXIT for a .ENTRY" msgstr ".EXIT manquant pour un .ENTRY" -#: config/tc-hppa.c:7080 +#: config/tc-hppa.c:7107 msgid "Not in a space.\n" -msgstr "N'est pas dans l'espace.\n" +msgstr "N'est pas dans un espace.\n" -#: config/tc-hppa.c:7083 +#: config/tc-hppa.c:7110 msgid "Not in a subspace.\n" -msgstr "N'est pas dans le sous-espace.\n" +msgstr "N'est pas dans un sous-espace.\n" -#: config/tc-hppa.c:7172 +#: config/tc-hppa.c:7199 msgid "Invalid .SPACE argument" msgstr "Argument .SPACE invalide" -#: config/tc-hppa.c:7218 +#: config/tc-hppa.c:7245 msgid "Can't change spaces within a procedure definition. Ignored" -msgstr "" -"Ne peut changes les espace à l'intérieur d'une définition de procédure. " -"Ignoré" +msgstr "Ne peut changer les espace à l'intérieur d'une définition de procédure. Ignoré" -#: config/tc-hppa.c:7346 +#: config/tc-hppa.c:7373 #, c-format msgid "Undefined space: '%s' Assuming space number = 0." -msgstr "Espace indéfini: « %s » Numéro d'espace assumé = 0." +msgstr "Espace indéfini: « %s » Numéro d'espace assumé = 0." -#: config/tc-hppa.c:7369 +#: config/tc-hppa.c:7396 msgid "Must be in a space before changing or declaring subspaces.\n" -msgstr "" -"Doit être dans un espace avant de changer ou déclarer des sous-espaces.\n" +msgstr "Doit être dans un espace avant de changer ou déclarer des sous-espaces.\n" -#: config/tc-hppa.c:7373 +#: config/tc-hppa.c:7400 msgid "Can't change subspaces within a procedure definition. Ignored" -msgstr "" -"Ne peut modifier des sous-espaces à l'intéieur de la définitin d'une " -"procédure. Ignoré" +msgstr "Ne peut modifier des sous-espaces à l'intérieur de la définition d'une procédure. Ignoré" -#: config/tc-hppa.c:7409 +#: config/tc-hppa.c:7436 msgid "Parameters of an existing subspace can't be modified" -msgstr "Paramètres de sous-espaces existants ne peuvent être modifiés" +msgstr "Paramètres de sous-espaces existants ne peuvent être modifiés" -#: config/tc-hppa.c:7461 +#: config/tc-hppa.c:7488 msgid "Alignment must be a power of 2" -msgstr "Alignement doit être une puissance de 2" +msgstr "Alignement doit être une puissance de 2" -#: config/tc-hppa.c:7508 +#: config/tc-hppa.c:7535 msgid "FIRST not supported as a .SUBSPACE argument" -msgstr "FIRST n'est pas supporté comme un argument pour .SUBSPACE" +msgstr "FIRST n'est pas supporté comme un argument pour .SUBSPACE" -#: config/tc-hppa.c:7510 +#: config/tc-hppa.c:7537 msgid "Invalid .SUBSPACE argument" -msgstr "argument .SUBSPACE invallide" +msgstr "argument .SUBSPACE invalide" -#: config/tc-hppa.c:7699 +#: config/tc-hppa.c:7726 #, c-format msgid "Internal error: Unable to find containing space for %s." -msgstr "ERREUR interne: incapable de repérer l'espace contenu pour %s." +msgstr "Erreur interne: incapable de repérer l'espace contenant pour %s." -#: config/tc-hppa.c:7737 +#: config/tc-hppa.c:7764 #, c-format msgid "Out of memory: could not allocate new space chain entry: %s\n" -msgstr "" -"Mémoire épuisé: ne peut allouer un nouvel espace pour une entrée de chaîne: " -"%s\n" +msgstr "Mémoire épuisé: ne peut allouer un nouvel espace pour une entrée de chaîne: %s\n" -#: config/tc-hppa.c:7825 +#: config/tc-hppa.c:7852 #, c-format msgid "Out of memory: could not allocate new subspace chain entry: %s\n" -msgstr "" -"Mémoire épuisé: ne peut allouer un nouvel sous-espace pour une entrée de " -"chaîne: %s\n" +msgstr "Mémoire épuisé: ne peut allouer un nouveau sous-espace pour une entrée de chaîne: %s\n" -#: config/tc-hppa.c:8270 +#: config/tc-hppa.c:8297 msgid "-R option not supported on this target." -msgstr "L'option -R n'est pas supportée pour la cible." +msgstr "L'option -R n'est pas supportée pour cette cible." -#: config/tc-hppa.c:8287 config/tc-sparc.c:825 config/tc-sparc.c:861 +#: config/tc-hppa.c:8314 config/tc-sparc.c:815 config/tc-sparc.c:852 #, c-format msgid "Internal error: can't hash `%s': %s\n" -msgstr "ERREUR interne: ne peut adresser par hachage « %s »: %s\n" +msgstr "Erreur interne: ne peut adresser par hachage « %s »: %s\n" -#: config/tc-hppa.c:8296 config/tc-i860.c:236 +#: config/tc-hppa.c:8323 config/tc-i860.c:236 #, c-format msgid "internal error: losing opcode: `%s' \"%s\"\n" -msgstr "erreur interne: perte du opcode: « %s» «%s »\n" +msgstr "erreur interne: perte de l'opcode: « %s» «%s »\n" + +#: config/tc-i370.c:419 config/tc-ppc.c:1155 config/tc-s390.c:406 +#: config/tc-s390.c:413 +#, c-format +msgid "invalid switch -m%s" +msgstr "option invalide -m%s" + +#: config/tc-i370.c:516 config/tc-s390.c:515 +#, c-format +msgid "Internal assembler error for instruction %s" +msgstr "Erreur interne d'assembleur pour l'instruction %s" + +#: config/tc-i370.c:535 +#, c-format +msgid "Internal assembler error for macro %s" +msgstr "Erreur interne d'assembleur pour la macro %s" + +#: config/tc-i370.c:630 config/tc-ppc.c:1862 +msgid "identifier+constant@got means identifier@got+constant" +msgstr "identificateur+constante@got signifie identificateur@got+constante" + +#: config/tc-i370.c:684 config/tc-m68k.c:8077 config/tc-ppc.c:1951 +#, c-format +msgid "%s relocations do not fit in %d bytes\n" +msgstr "Le réadressage %s n'entre pas dans %d octets\n" + +#: config/tc-i370.c:926 config/tc-i370.c:966 +msgid "unsupported DC type" +msgstr "type de DC non supporté" + +#: config/tc-i370.c:938 config/tc-i370.c:948 config/tc-i370.c:1530 +#: config/tc-i370.c:1541 +msgid "missing end-quote" +msgstr "apostrophe de fin manquant" + +#: config/tc-i370.c:996 +msgid "unsupported alignment" +msgstr "alignement non supporté" + +#: config/tc-i370.c:1003 +msgid "this DS form not yet supported" +msgstr "Ce DS n'est pas encore supportée" + +#: config/tc-i370.c:1046 config/tc-m32r.c:1493 config/tc-microblaze.c:177 +#: config/tc-ppc.c:2016 config/tc-ppc.c:4674 +msgid "Expected comma after symbol-name: rest of line ignored." +msgstr "Virgule attendue après le nom de symbole: reste de la ligne ignoré." + +#: config/tc-i370.c:1069 config/tc-m32r.c:1517 config/tc-microblaze.c:199 +#: config/tc-ppc.c:2038 config/tc-ppc.c:3241 config/tc-ppc.c:4698 +msgid "ignoring bad alignment" +msgstr "mauvais alignement ignoré" + +#: config/tc-i370.c:1080 config/tc-m32r.c:1544 config/tc-microblaze.c:210 +#: config/tc-ppc.c:2049 config/tc-ppc.c:4710 +#, c-format +msgid "Ignoring attempt to re-define symbol `%s'." +msgstr "Tentative ignorée de redéfinition du symbole « %s »." + +#: config/tc-i370.c:1088 config/tc-microblaze.c:218 config/tc-ppc.c:2057 +#, c-format +msgid "Length of .lcomm \"%s\" is already %ld. Not changed to %ld." +msgstr "Longueur de .lcomm « %s » est déjà %ld. N'a pas été changé à %ld." + +#: config/tc-i370.c:1107 config/tc-m32r.c:1529 config/tc-microblaze.c:234 +#: config/tc-ppc.c:2075 config/tc-v850.c:375 +msgid "Common alignment not a power of 2" +msgstr "Alignement du commun n'est pas une puissance de 2" + +#: config/tc-i370.c:1245 +msgid "Missing or bad .using directive" +msgstr "Directive .using manquante ou mauvaise" + +#: config/tc-i370.c:1290 +msgid "Literal Pool Overflow" +msgstr "Débordement du bassin des littéraux" + +#: config/tc-i370.c:1588 +msgid "expression not a constant" +msgstr "l'expression n'est pas une constante" + +#: config/tc-i370.c:1595 +msgid "Unknown/unsupported address literal type" +msgstr "Type d'adresse littérale inconnue ou non supportée" + +#: config/tc-i370.c:1618 +#, c-format +msgid ".ltorg without prior .using in section %s" +msgstr ".ltorg sans .using précédent dans la section %s" + +#: config/tc-i370.c:1622 +#, c-format +msgid ".ltorg in section %s paired to .using in section %s" +msgstr ".ltorg dans la section %s est associé à .using dans la section %s" + +#: config/tc-i370.c:1645 +#, c-format +msgid "bad alignment of %d bytes in literal pool" +msgstr "mauvais alignement de %d octets dans le bassin des littéraux" + +#: config/tc-i370.c:1669 +msgid "bad literal size\n" +msgstr "mauvaise taille littérale\n" + +#: config/tc-i370.c:1743 +msgid ".using: base address expression illegal or too complex" +msgstr ".using: expression de l'adresse de base illégale ou trop complexe" + +#: config/tc-i370.c:1778 config/tc-i370.c:1787 +#, c-format +msgid "droping register %d in section %s does not match using register %d" +msgstr "l'abandon du registre %d dans la section %s ne correspond pas à l'utilisation du registre %d" + +#: config/tc-i370.c:1791 +#, c-format +msgid "droping register %d in section %s previously used in section %s" +msgstr "abandon du registre %d dans la section %s précédemment utilisé dans la section %s" + +#: config/tc-i370.c:1847 config/tc-ppc.c:3078 +msgid "wrong number of operands" +msgstr "nombre d'opérandes erroné" + +#: config/tc-i370.c:1928 config/tc-mn10200.c:898 config/tc-mn10300.c:1251 +#: config/tc-ppc.c:2374 config/tc-s390.c:1549 config/tc-v850.c:2024 +#, c-format +msgid "Unrecognized opcode: `%s'" +msgstr "Opcode non reconnu: « %s »" + +#: config/tc-i370.c:2071 +msgid "not using any base register" +msgstr "aucun registre de base utilisé" -#: config/tc-i386.c:1355 +#: config/tc-i370.c:2101 +#, c-format +msgid "expecting a register for operand %d" +msgstr "registre attendu pour l'opérande %d" + +#. Not used --- don't have any 8 byte instructions. +#: config/tc-i370.c:2222 +msgid "Internal Error: bad instruction length" +msgstr "Erreur interne: mauvaise longueur d'instruction" + +#: config/tc-i386.c:1848 #, c-format msgid "%s shortened to %s" -msgstr "%s réduit à %s" +msgstr "%s réduit à %s" -#: config/tc-i386.c:1425 +#: config/tc-i386.c:1934 msgid "same type of prefix used twice" -msgstr "même type de préfixe utilisé deux fois" +msgstr "même type de préfixe utilisé deux fois" -#: config/tc-i386.c:1450 -msgid "64bit mode not supported on this CPU." -msgstr "mode 64 bits n'est pas supporté sur ce CPU" +#: config/tc-i386.c:1961 +#, c-format +msgid "64bit mode not supported on `%s'." +msgstr "mode 64 bits pas supporté sur « %s »" -#: config/tc-i386.c:1454 -msgid "32bit mode not supported on this CPU." -msgstr "mode 32 bits n'est pas supporté sur ce CPU" +#: config/tc-i386.c:1970 +#, c-format +msgid "32bit mode not supported on `%s'." +msgstr "mode 32 bits pas supporté sur « %s »" -#: config/tc-i386.c:1489 +#: config/tc-i386.c:2010 msgid "bad argument to syntax directive." -msgstr "mauvais argument pour la directive de syntaxe" +msgstr "mauvais argument pour la directive de syntaxe." + +#: config/tc-i386.c:2059 +msgid "bad argument to sse_check directive." +msgstr "mauvais argument pour la directive sse_check." + +#: config/tc-i386.c:2063 +msgid "missing argument for sse_check directive" +msgstr "argument manquant pour la directive sse_check" + +#: config/tc-i386.c:2093 +#, c-format +msgid "`%s' is not supported on `%s'" +msgstr "« %s » n'est pas supporté sur « %s »" -#: config/tc-i386.c:1569 +#: config/tc-i386.c:2166 #, c-format msgid "no such architecture: `%s'" -msgstr "pas de telle architecture: %s" +msgstr "pas de telle architecture: « %s »" -#: config/tc-i386.c:1574 +#: config/tc-i386.c:2171 msgid "missing cpu architecture" msgstr "architecture cpu manquante" -#: config/tc-i386.c:1588 +#: config/tc-i386.c:2185 #, c-format msgid "no such architecture modifier: `%s'" -msgstr "pas de telle modificateur d'architecture: « %s »" +msgstr "pas de tel modificateur d'architecture: « %s »" + +#: config/tc-i386.c:2200 config/tc-i386.c:2215 +msgid "Intel L1OM is 64bit ELF only" +msgstr "Intel L1OM supporte uniquement les ELF 64 bits" -#: config/tc-i386.c:1604 config/tc-i386.c:7257 config/tc-maxq.c:223 +#: config/tc-i386.c:2224 config/tc-i386.c:8494 msgid "Unknown architecture" -msgstr "architecture inconnue" +msgstr "Architecture inconnue" -#: config/tc-i386.c:1951 -#, fuzzy, c-format +#: config/tc-i386.c:2570 +#, c-format msgid "unknown relocation (%u)" -msgstr "Type de relocalisation inconnu" +msgstr "réadressage inconnu (%u)" -#: config/tc-i386.c:1953 +#: config/tc-i386.c:2572 #, c-format msgid "%u-byte relocation cannot be applied to %u-byte field" -msgstr "" +msgstr "réadressage %u octets ne peut pas être appliqué sur un champ de %u octets" -#: config/tc-i386.c:1957 -#, fuzzy +#: config/tc-i386.c:2576 msgid "non-pc-relative relocation for pc-relative field" -msgstr "type de relocalisation non supporté pour un décalage de champ DS" +msgstr "réadressage non relatif au PC pour un champ relatif au PC" -#: config/tc-i386.c:1962 +#: config/tc-i386.c:2581 msgid "relocated field and relocation type differ in signedness" -msgstr "" +msgstr "le champ relocalisé et le type relocalisé diffèrent sur le signe" -#: config/tc-i386.c:1971 -#, fuzzy +#: config/tc-i386.c:2590 msgid "there are no unsigned pc-relative relocations" -msgstr "Il n'y a pas de relocalisations relatives au PC non signées" +msgstr "il n'y a pas de réadressage non signé relative au PC" -#: config/tc-i386.c:1979 -#, fuzzy, c-format +#: config/tc-i386.c:2598 +#, c-format msgid "cannot do %u byte pc-relative relocation" -msgstr "ne peut faire une relocalisation relative au PC de %d octets" +msgstr "ne peut faire un réadressage relatif au PC de %u octets" -#: config/tc-i386.c:1996 -#, fuzzy, c-format +#: config/tc-i386.c:2615 +#, c-format msgid "cannot do %s %u byte relocation" -msgstr "ne peut faire une relocalisation %s %d octets" +msgstr "ne peut faire un réadressage %s %u octets" + +#: config/tc-i386.c:2899 +#, c-format +msgid "can't use register '%s%s' as operand %d in '%s'." +msgstr "ne peut utiliser le registre « %s%s » comme opérande %d dans « %s »." + +#: config/tc-i386.c:3011 +#, c-format +msgid "SSE instruction `%s' is used" +msgstr "instruction SSE « %s » est utilisée" -#: config/tc-i386.c:2206 config/tc-i386.c:3472 -#, fuzzy, c-format +#: config/tc-i386.c:3025 config/tc-i386.c:4455 +#, c-format msgid "ambiguous operand size for `%s'" -msgstr "Opérande invalide pour « %s »" +msgstr "taille d'opérande ambiguë pour « %s »" -#: config/tc-i386.c:2255 -#, fuzzy, c-format -msgid "can't use register '%s%s' as operand %d in '%s'." -msgstr "ne peut utiliser le registre '%%%s' comme opérande %d dans '%s'." +#: config/tc-i386.c:3042 +msgid "expecting lockable instruction after `lock'" +msgstr "instruction verrouillable attendue après l'instruction « lock »" #. UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. -#: config/tc-i386.c:2294 +#: config/tc-i386.c:3093 #, c-format msgid "translating to `%sp'" -msgstr "traduction à « %sp »" +msgstr "traduction en « %sp »" -#: config/tc-i386.c:2342 -#, fuzzy, c-format +#: config/tc-i386.c:3148 +#, c-format msgid "can't encode register '%s%s' in an instruction requiring REX prefix." -msgstr "" -"ne peut encoder le registre '%%%s» dans l'instruction nécessitant le préfixe " -"REX.\n" +msgstr "ne peut encoder le registre « %s%s » dans l'instruction nécessitant le préfixe REX." -#: config/tc-i386.c:2389 config/tc-i386.c:2497 config/tc-maxq.c:838 -#: config/tc-maxq.c:868 +#: config/tc-i386.c:3191 config/tc-i386.c:3323 #, c-format msgid "no such instruction: `%s'" -msgstr "pas de telle instruction: « %s »" +msgstr "pas de telle instruction: « %s »" -#: config/tc-i386.c:2400 config/tc-i386.c:2530 config/tc-maxq.c:846 +#: config/tc-i386.c:3202 config/tc-i386.c:3356 #, c-format msgid "invalid character %s in mnemonic" -msgstr "caractère invalide %s dans la mnémonique" +msgstr "caractère %s invalide dans la mnémonique" -#: config/tc-i386.c:2407 +#: config/tc-i386.c:3209 msgid "expecting prefix; got nothing" -msgstr "préfixe attendu; n'a rien obtenu" +msgstr "préfixe attendu; rien de trouvé" -#: config/tc-i386.c:2409 +#: config/tc-i386.c:3211 msgid "expecting mnemonic; got nothing" -msgstr "mnémonique attendue; n'a rien obtenu" +msgstr "mnémonique attendue; rien de trouvé" -#: config/tc-i386.c:2424 config/tc-i386.c:2548 -#, fuzzy, c-format +#: config/tc-i386.c:3226 config/tc-i386.c:3374 +#, c-format msgid "`%s' is only supported in 64-bit mode" -msgstr "relocalisation @%s n'est pas supporté en mode %s bits" +msgstr "« %s » est uniquement supporté en mode 64 bits" -#: config/tc-i386.c:2425 config/tc-i386.c:2547 -#, fuzzy, c-format +#: config/tc-i386.c:3227 config/tc-i386.c:3373 +#, c-format msgid "`%s' is not supported in 64-bit mode" -msgstr "relocalisation @%s n'est pas supporté en mode %s bits" +msgstr "« %s » n'est pas supporté en mode 64 bits" -#: config/tc-i386.c:2437 +#: config/tc-i386.c:3239 #, c-format msgid "redundant %s prefix" -msgstr "préfixe %s redondant" +msgstr "préfixe %s redondant" -#: config/tc-i386.c:2554 -#, fuzzy, c-format +#: config/tc-i386.c:3380 +#, c-format msgid "`%s' is not supported on `%s%s'" -msgstr "« %s» n'est pas supporté sur «%s »" +msgstr "« %s » n'est pas supporté sur « %s%s »" -#: config/tc-i386.c:2562 +#: config/tc-i386.c:3391 msgid "use .code16 to ensure correct addressing mode" -msgstr "utilise .code16 pour assurer un mode d'adressage correct" +msgstr "utilisez .code16 pour assurer un mode d'adressage correct" -#: config/tc-i386.c:2575 +#: config/tc-i386.c:3404 #, c-format msgid "expecting string instruction after `%s'" -msgstr "chaîne d'instruction attendue après « %s »" +msgstr "chaîne d'instruction attendue après « %s »" -#: config/tc-i386.c:2607 +#: config/tc-i386.c:3436 #, c-format msgid "invalid character %s before operand %d" -msgstr "caractère ivalide %s avant l'opérande %d" +msgstr "caractère %s invalide avant l'opérande %d" -#: config/tc-i386.c:2621 +#: config/tc-i386.c:3450 #, c-format msgid "unbalanced parenthesis in operand %d." -msgstr "parenthèses non pairées dans l'éopérande %d." +msgstr "parenthèses non pairées dans l'opérande %d." -#: config/tc-i386.c:2624 config/tc-maxq.c:1888 +#: config/tc-i386.c:3453 #, c-format msgid "unbalanced brackets in operand %d." -msgstr "crochets non pairés dans l'opérande %d." +msgstr "crochets non pairés dans l'opérande %d." -#: config/tc-i386.c:2633 +#: config/tc-i386.c:3462 #, c-format msgid "invalid character %s in operand %d" -msgstr "caractère invalide %s dans l'opérande %d" +msgstr "caractère invalide %s dans l'opérande %d" -#: config/tc-i386.c:2660 config/tc-maxq.c:1914 +#: config/tc-i386.c:3490 #, c-format msgid "spurious operands; (%d operands/instruction max)" -msgstr "fausses opérandes; (%d opérandes/instructions au maximum)" +msgstr "opérandes parasites; (%d opérandes/instructions au maximum)" -#: config/tc-i386.c:2683 config/tc-maxq.c:1934 +#: config/tc-i386.c:3513 msgid "expecting operand after ','; got nothing" -msgstr "opérande attendue après « , »; n'a rien obtenu" +msgstr "opérande attendu après « , »; rien de trouvé" -#: config/tc-i386.c:2688 +#: config/tc-i386.c:3518 msgid "expecting operand before ','; got nothing" -msgstr "opérande attendue avant « , »; n'a rien obtenu" +msgstr "opérande attendu avant « , »; rien de trouvé" + +#: config/tc-i386.c:4156 +msgid "operand size mismatch" +msgstr "non concordance de la taille d'opérande" + +#: config/tc-i386.c:4159 +msgid "operand type mismatch" +msgstr "non concordance du type d'opérande" + +#: config/tc-i386.c:4162 +msgid "register type mismatch" +msgstr "non concordance du type de registre" + +#: config/tc-i386.c:4165 +msgid "number of operands mismatch" +msgstr "non concordance du nombre d'opérandes" + +#: config/tc-i386.c:4168 +msgid "invalid instruction suffix" +msgstr "suffixe d'instruction invalide" -#. We found no match. -#: config/tc-i386.c:3223 +#: config/tc-i386.c:4171 +msgid "Imm4 isn't the first operand" +msgstr "Imm4 n'est pas le premier opérande" + +#: config/tc-i386.c:4174 +msgid "only supported with old gcc" +msgstr "uniquement supporté avec un ancien gcc" + +#: config/tc-i386.c:4177 +msgid "unsupported with Intel mnemonic" +msgstr "non supporté avec les mnémoniques Intel" + +#: config/tc-i386.c:4180 +msgid "unsupported syntax" +msgstr "syntaxe non supportée" + +#: config/tc-i386.c:4183 +msgid "unsupported" +msgstr "non supporté" + +#: config/tc-i386.c:4186 #, c-format -msgid "suffix or operands invalid for `%s'" -msgstr "suffixe ou opérande invalide pour « %s »" +msgid "%s for `%s'" +msgstr "%s pour « %s »" -#: config/tc-i386.c:3234 +#: config/tc-i386.c:4197 #, c-format msgid "indirect %s without `*'" -msgstr "indirect %s sans « * »" +msgstr "%s indirect sans « * »" #. Warn them that a data or address size prefix doesn't #. affect assembly of the next line of code. -#: config/tc-i386.c:3242 +#: config/tc-i386.c:4205 #, c-format msgid "stand-alone `%s' prefix" -msgstr "préfixe « %s » autonome" +msgstr "préfixe « %s » autonome" -#: config/tc-i386.c:3276 config/tc-i386.c:3291 +#: config/tc-i386.c:4239 config/tc-i386.c:4255 #, c-format -msgid "`%s' operand %d must use `%%es' segment" -msgstr "« %s» opérande %d doit utiliser le segment «%%es »" +msgid "`%s' operand %d must use `%ses' segment" +msgstr "« %s » opérande %d doit utiliser le segment « %ses »" #. We have to know the operand size for crc32. -#: config/tc-i386.c:3344 -#, fuzzy, c-format +#: config/tc-i386.c:4309 +#, c-format msgid "ambiguous memory operand size for `%s`" -msgstr "opérande mémoire erronée « %s »" +msgstr "taille d'opérande mémoire ambigu pour « %s »" -#: config/tc-i386.c:3445 -msgid "" -"no instruction mnemonic suffix given and no register operands; can't size " -"instruction" -msgstr "" -"aucun suffixe de mnémonique d'instruction fourni et pas d'opérandes " -"registre;\n" -"ne peut déterminer la taille de l'instruction" +#: config/tc-i386.c:4428 +msgid "no instruction mnemonic suffix given and no register operands; can't size instruction" +msgstr "aucun suffixe de mnémonique d'instruction fourni et pas d'opérande registre; ne peut déterminer la taille de l'instruction" -#: config/tc-i386.c:3598 config/tc-i386.c:3672 config/tc-i386.c:3703 -#: config/tc-i386.c:3751 config/tc-i386.c:3789 -#, fuzzy, c-format +#: config/tc-i386.c:4565 config/tc-i386.c:4640 config/tc-i386.c:4669 +#: config/tc-i386.c:4715 config/tc-i386.c:4753 +#, c-format msgid "Incorrect register `%s%s' used with `%c' suffix" -msgstr "Registre incorrect « %%%s» utilisé avec le suffixe « %c »" +msgstr "Registre incorrect « %s%s » utilisé avec le suffixe « %c »" -#: config/tc-i386.c:3606 config/tc-i386.c:3679 config/tc-i386.c:3796 -#, fuzzy, c-format +#: config/tc-i386.c:4573 config/tc-i386.c:4647 config/tc-i386.c:4760 +#, c-format msgid "using `%s%s' instead of `%s%s' due to `%c' suffix" -msgstr "utilise « %%%s» au lieu de «%%%s» en raison du suffixe «%c »" +msgstr "utilise « %s%s » au lieu de « %s%s» en raison du suffixe « %c »" -#: config/tc-i386.c:3631 config/tc-i386.c:3655 config/tc-i386.c:3725 -#: config/tc-i386.c:3772 -#, fuzzy, c-format +#: config/tc-i386.c:4599 config/tc-i386.c:4623 config/tc-i386.c:4691 +#: config/tc-i386.c:4736 +#, c-format msgid "`%s%s' not allowed with `%s%c'" -msgstr "« %%%s» n'est pas permis avec «%s%c »" +msgstr "« %s%s» n'est pas permis avec « %s%c »" -#: config/tc-i386.c:3864 +#: config/tc-i386.c:4825 msgid "no instruction mnemonic suffix given; can't determine immediate size" -msgstr "" -"aucun suffixe de mnémonique d'instruction fourni; ne peut déterminer la " -"taille de l'immédiat" +msgstr "aucun suffixe de mnémonique d'instruction fourni; ne peut déterminer la taille de l'immédiat" -#: config/tc-i386.c:4054 config/tc-i386.c:4089 config/tc-i386.c:4158 -#: config/tc-i386.c:4209 -#, fuzzy, c-format -msgid "Incorrect operands for the '%s' instruction" -msgstr "relocalisation d'opérande invalide pour l'instruction '%s'" - -#: config/tc-i386.c:4216 -#, fuzzy, c-format -msgid "Internal error for the '%s' instruction" -msgstr "erreur interne d'assembleur pour l'instruction %s" - -#: config/tc-i386.c:4248 +#: config/tc-i386.c:4861 #, c-format -msgid "the last operand of `%s' must be `%sxmm0'" -msgstr "" +msgid "the last operand of `%s' must be `%s%s'" +msgstr "le dernier opérande de « %s » doit être « %s%s »" -#: config/tc-i386.c:4251 +#: config/tc-i386.c:4864 #, c-format -msgid "the first operand of `%s' must be `%sxmm0'" -msgstr "" +msgid "the first operand of `%s' must be `%s%s'" +msgstr "le premier opérande de « %s » doit être « %s%s »" -#: config/tc-i386.c:4294 +#: config/tc-i386.c:5012 #, c-format -msgid "you can't `pop %%cs'" -msgstr "vous ne pouvez pas utiliser « pop %%cs »" +msgid "you can't `pop %scs'" +msgstr "vous ne pouvez pas utiliser « pop %scs »" #. Reversed arguments on faddp, fsubp, etc. -#: config/tc-i386.c:4323 -#, fuzzy, c-format +#: config/tc-i386.c:5041 +#, c-format msgid "translating to `%s %s%s,%s%s'" -msgstr "traduction à « %s %%%s,%%%s »" +msgstr "traduction en « %s %s%s,%s%s »" #. Extraneous `l' suffix on fp insn. -#: config/tc-i386.c:4330 -#, fuzzy, c-format +#: config/tc-i386.c:5048 +#, c-format msgid "translating to `%s %s%s'" -msgstr "traduction à « %s %%%s »" +msgstr "traduction en « %s %s%s »" -#: config/tc-i386.c:4358 -#, fuzzy, c-format +#: config/tc-i386.c:5076 +#, c-format msgid "segment override on `%s' is ineffectual" -msgstr "écrasement de segment sur `lea' n,est pas effectif" +msgstr "écrasement de segment sur « %s » est inefficace" -#: config/tc-i386.c:4785 config/tc-i386.c:4879 config/tc-i386.c:4924 +#: config/tc-i386.c:5734 config/tc-i386.c:5828 config/tc-i386.c:5873 msgid "skipping prefixes on this instruction" -msgstr "escamotage des préfixes sur cette instruction" +msgstr "escamotage des préfixes sur cette instruction" -#: config/tc-i386.c:4944 +#: config/tc-i386.c:5893 msgid "16-bit jump out of range" msgstr "saut de 16 bits hors limite" -#: config/tc-i386.c:4953 +#: config/tc-i386.c:5902 #, c-format msgid "can't handle non absolute segment in `%s'" -msgstr "ne peut traiter un segment non absolu dans « %s »" +msgstr "ne peut traiter un segment non absolu dans « %s »" -#: config/tc-i386.c:5539 -#, fuzzy, c-format +#: config/tc-i386.c:6482 +#, c-format msgid "@%s reloc is not supported with %d-bit output format" -msgstr "relocalisation @%s n'est pas supporté en mode %s bits" +msgstr "réadressage @%s n'est pas supporté dans le format de sortie %d bits" -#: config/tc-i386.c:5583 -#, fuzzy, c-format +#: config/tc-i386.c:6529 +#, c-format msgid "missing or invalid expression `%s'" -msgstr "expression immédiate invalide ou manquante « %s » prise alors pour 0" +msgstr "expression manquante ou invalide « %s »" -#: config/tc-i386.c:5636 -#, fuzzy, c-format +#: config/tc-i386.c:6588 +#, c-format msgid "at most %d immediate operands are allowed" -msgstr "seulement les opérandes immédiates 1 ou 2 sont permises" +msgstr "au plus %d opérandes immédiats sont permis" -#: config/tc-i386.c:5658 config/tc-i386.c:5896 config/tc-maxq.c:1500 +#: config/tc-i386.c:6610 config/tc-i386.c:6857 #, c-format msgid "junk `%s' after expression" -msgstr "rebuts « %s » après l'expression" +msgstr "rebuts « %s » après l'expression" -#: config/tc-i386.c:5671 -#, fuzzy, c-format +#: config/tc-i386.c:6631 +#, c-format msgid "missing or invalid immediate expression `%s'" -msgstr "expression immédiate invalide ou manquante « %s » prise alors pour 0" +msgstr "expression immédiate manquante ou invalide « %s »" -#: config/tc-i386.c:5694 config/tc-i386.c:5951 config/tc-maxq.c:1530 +#: config/tc-i386.c:6654 config/tc-i386.c:6947 #, c-format msgid "unimplemented segment %s in operand" -msgstr "segment non implanté %s dans l'opérande" +msgstr "segment %s non implémenté dans l'opérande" -#: config/tc-i386.c:5700 -#, fuzzy, c-format +#: config/tc-i386.c:6661 +#, c-format msgid "illegal immediate register operand %s" -msgstr "Opérande invalide immédiate d'écriture" +msgstr "opérande de registre immédiat illégal %s" -#: config/tc-i386.c:5748 +#: config/tc-i386.c:6709 #, c-format msgid "expecting scale factor of 1, 2, 4, or 8: got `%s'" -msgstr "facteur d'échelle attendu de 1, 2, 4, ou 8: a obtenu « %s »" +msgstr "facteur d'échelle attendu de 1, 2, 4, ou 8: a obtenu « %s »" -#: config/tc-i386.c:5757 +#: config/tc-i386.c:6718 #, c-format msgid "scale factor of %d without an index register" -msgstr "facteur d'échelle de %d sans registre d'index" +msgstr "facteur d'échelle de %d sans registre d'index" -#: config/tc-i386.c:5779 -#, fuzzy, c-format +#: config/tc-i386.c:6740 +#, c-format msgid "at most %d displacement operands are allowed" -msgstr "seulement les opérandes immédiates 1 ou 2 sont permises" +msgstr "au plus %d opérandes de déplacement sont permis" -#: config/tc-i386.c:5936 -#, fuzzy, c-format +#: config/tc-i386.c:6913 +#, c-format msgid "missing or invalid displacement expression `%s'" -msgstr "expression de déplacement invalide ou manquante « %s » alors 0 assumé" +msgstr "expression de déplacement manquante ou invalide « %s »" + +#: config/tc-i386.c:6930 +#, c-format +msgid "0x%lx out range of signed 32bit displacement" +msgstr "0x%lx hors limite pour un déplacement signé de 32 bits" -#: config/tc-i386.c:6056 +#: config/tc-i386.c:7034 #, c-format -msgid "`%s' is not a valid base/index expression" -msgstr "« %s » n'est pas une expression de base/index valide" +msgid "`%s' is not valid here (expected `%c%s%s%c')" +msgstr "« %s » n'est pas valable ici (attendu « %c%s%s%c »)" -#: config/tc-i386.c:6060 +#: config/tc-i386.c:7114 #, c-format -msgid "`%s' is not a valid %s bit base/index expression" -msgstr "« %s » n'est pas une expression de base/index valide de %s bits" +msgid "`%s' is not a valid %s expression" +msgstr "« %s » n'est pas une expression %s valide" -#: config/tc-i386.c:6136 +#: config/tc-i386.c:7119 +#, c-format +msgid "`%s' is not a valid %s-bit %s expression" +msgstr "« %s » n'est pas une expression de %s bits %s valide" + +#: config/tc-i386.c:7200 #, c-format msgid "bad memory operand `%s'" -msgstr "opérande mémoire erronée « %s »" +msgstr "opérande mémoire erroné « %s »" -#: config/tc-i386.c:6151 +#: config/tc-i386.c:7215 #, c-format msgid "junk `%s' after register" -msgstr "rebut « %s » après le registre" +msgstr "rebut « %s » après le registre" -#: config/tc-i386.c:6163 config/tc-i386.c:6279 config/tc-i386.c:6320 +#: config/tc-i386.c:7228 config/tc-i386.c:7344 config/tc-i386.c:7385 #, c-format msgid "bad register name `%s'" -msgstr "mauvais nom de registre « %s »" +msgstr "mauvais nom de registre « %s »" -#: config/tc-i386.c:6171 +#: config/tc-i386.c:7236 msgid "immediate operand illegal with absolute jump" -msgstr "opérande immédiate illégale avec un saut absolu" +msgstr "opérande immédiat illégal avec un saut absolu" -#: config/tc-i386.c:6193 +#: config/tc-i386.c:7258 #, c-format msgid "too many memory references for `%s'" -msgstr "trop de références en mémoire pour « %s »" +msgstr "trop de références mémoires pour « %s »" -#: config/tc-i386.c:6271 +#: config/tc-i386.c:7336 #, c-format msgid "expecting `,' or `)' after index register in `%s'" -msgstr "attendu « ,» ou «)» après le registre d'index dans «%s »" +msgstr "« , » ou « ) » attendu après le registre d'index dans « %s »" -#: config/tc-i386.c:6296 +#: config/tc-i386.c:7361 #, c-format msgid "expecting `)' after scale factor in `%s'" -msgstr "attendu « )» après le facteur d'échelle dans «%s »" +msgstr "« ) » attendu après le facteur d'échelle dans « %s »" -#: config/tc-i386.c:6304 +#: config/tc-i386.c:7369 #, c-format msgid "expecting index register or scale factor after `,'; got '%c'" -msgstr "" -"attendu un registre d'index ou un facteur d'échelle après « ,»; a obtenu «%c " -"»" +msgstr "registre d'index ou facteur d'échelle attendu après « , »; a obtenu « %c »" -#: config/tc-i386.c:6312 +#: config/tc-i386.c:7377 #, c-format msgid "expecting `,' or `)' after base register in `%s'" -msgstr "attendu « ,» ou «)» après le registre de base dans «%s »" +msgstr "« , » ou « ) » attendu après le registre de base dans « %s »" #. It's not a memory operand; argh! -#: config/tc-i386.c:6355 +#: config/tc-i386.c:7421 #, c-format msgid "invalid char %s beginning operand %d `%s'" -msgstr "caractère invalide %s au débutde l'opérande %d « %s »" +msgstr "caractère %s invalide au début de l'opérande %d « %s »" -#: config/tc-i386.c:6531 +#: config/tc-i386.c:7603 msgid "long jump required" msgstr "long saut (jump) requis" -#: config/tc-i386.c:6586 -#, fuzzy +#: config/tc-i386.c:7658 msgid "jump target out of range" -msgstr "call/jmp cible hors limite (1)" +msgstr "cible du saut hors limite" -#: config/tc-i386.c:6831 -msgid "Bad call to md_atof ()" -msgstr "Appel erroné à md_atof ()" - -#: config/tc-i386.c:7094 +#: config/tc-i386.c:8172 msgid "No compiled in support for x86_64" -msgstr "Pas compilé pour le support pour x86_64" +msgstr "Pas compilé pour le support pour x86_64" -#: config/tc-i386.c:7123 config/tc-i386.c:7139 -#, fuzzy, c-format +#: config/tc-i386.c:8204 config/tc-i386.c:8259 +#, c-format msgid "Invalid -march= option: `%s'" -msgstr "Condition de comparaison FP invalide: %s" +msgstr "Option -march= invalide: « %s »" -#: config/tc-i386.c:7144 config/tc-i386.c:7156 -#, fuzzy, c-format +#: config/tc-i386.c:8268 config/tc-i386.c:8280 +#, c-format msgid "Invalid -mtune= option: `%s'" -msgstr "Option de listage invalide « %c »" +msgstr "Option -mtune= invalide: « %s »" + +#: config/tc-i386.c:8289 +#, c-format +msgid "Invalid -mmnemonic= option: `%s'" +msgstr "Option -mmnemonic= invalide: « %s »" + +#: config/tc-i386.c:8298 +#, c-format +msgid "Invalid -msyntax= option: `%s'" +msgstr "Option -msyntax= invalide: « %s »" -#: config/tc-i386.c:7170 -#, fuzzy, c-format +#: config/tc-i386.c:8325 +#, c-format +msgid "Invalid -msse-check= option: `%s'" +msgstr "Option -msse-check= invalide: « %s »" + +#: config/tc-i386.c:8334 +#, c-format +msgid "Invalid -mavxscalar= option: `%s'" +msgstr "Option -mavxscalar= invalide: « %s »" + +#: config/tc-i386.c:8426 +#, c-format msgid "" " -Q ignored\n" " -V print assembler version number\n" " -k ignored\n" msgstr "" -" -V afficher la version de l'assembleur\n" -" -Qy, -Qn ignoré\n" +" -Q ignoré\n" +" -V afficher la version de l'assembleur\n" +" -k ignoré\n" -#: config/tc-i386.c:7175 +#: config/tc-i386.c:8431 #, c-format msgid "" " -n Do not optimize code alignment\n" @@ -5773,230 +6270,189 @@ msgstr "" " -n ne pas optimiser l'alignement du code\n" " -q ne pas produire d'avertissement\n" -#: config/tc-i386.c:7179 -#, fuzzy, c-format +#: config/tc-i386.c:8435 +#, c-format msgid " -s ignored\n" -msgstr " -w ignorée\n" +msgstr " -s ignoré\n" -#: config/tc-i386.c:7183 -#, fuzzy, c-format +#: config/tc-i386.c:8440 +#, c-format msgid " --32/--64 generate 32bit/64bit code\n" -msgstr " --gdwarf2 généréer les informations de débug DWARF2\n" +msgstr " --32/--64 générer du code 32/64 bits\n" -#: config/tc-i386.c:7187 +#: config/tc-i386.c:8444 #, c-format msgid " --divide do not treat `/' as a comment character\n" -msgstr "" +msgstr " --divide ne traite pas « / » comme un caractère de commentaire\n" -#: config/tc-i386.c:7190 -#, fuzzy, c-format +#: config/tc-i386.c:8447 +#, c-format msgid " --divide ignored\n" -msgstr " -nocpp ignorée\n" +msgstr " --divide ignoré\n" -#: config/tc-i386.c:7193 +#: config/tc-i386.c:8450 #, c-format msgid "" -" -march=CPU/-mtune=CPU generate code/optimize for CPU, where CPU is one " -"of:\n" -" i386, i486, pentium, pentiumpro, pentium4, " -"nocona,\n" -" core, core2, k6, athlon, k8, generic32, " -"generic64\n" +" -march=CPU[,+EXTENSION...]\n" +" generate code for CPU and EXTENSION, CPU is one of:\n" msgstr "" +" -march=CPU[,+EXTENSION...]\n" +" générer du code pour CPU et EXTENSION, CPU est l'un de ceux-ci:\n" -#: config/tc-i386.c:7346 config/tc-s390.c:1862 -msgid "GOT already in symbol table" -msgstr "GOT est déjà dans la table de symboles" - -#: config/tc-i386.c:7495 +#: config/tc-i386.c:8454 #, c-format -msgid "can not do %d byte pc-relative relocation" -msgstr "ne peut faire une relocalisation relative au PC de %d octets" +msgid " EXTENSION is combination of:\n" +msgstr " EXTENSION est une combinaison de:\n" -#: config/tc-i386.c:7513 config/tc-maxq.c:247 +#: config/tc-i386.c:8457 #, c-format -msgid "can not do %d byte relocation" -msgstr "ne peut relocaliser %d octets" +msgid " -mtune=CPU optimize for CPU, CPU is one of:\n" +msgstr " -mtune=CPU optimiser pour CPU, CPU est l'un de ceux-ci:\n" -#: config/tc-i386.c:7592 config/tc-maxq.c:274 config/tc-s390.c:2308 +#: config/tc-i386.c:8460 #, c-format -msgid "cannot represent relocation type %s" -msgstr "ne peut représenter le type de relocalisation %s" +msgid " -msse2avx encode SSE instructions with VEX prefix\n" +msgstr " -msse2avx encoder les instructions SSE avec le préfixe VEX\n" -#: config/tc-i386.c:7844 -#, fuzzy, c-format -msgid "invalid operand for '%s' ('%s' unexpected)" -msgstr "repéré %d opérande pour '%s': attendu %d" - -#: config/tc-i386.c:7856 +#: config/tc-i386.c:8462 #, c-format -msgid "too many memory references for '%s'" -msgstr "trop de références mémoire pour « %s »" +msgid "" +" -msse-check=[none|error|warning]\n" +" check SSE instructions\n" +msgstr "" +" -msse-check=[none|error|warning]\n" +" vérifier les instructions SSE\n" -#. See the comments in intel_bracket_expr. -#: config/tc-i386.c:7867 +#: config/tc-i386.c:8465 #, c-format -msgid "Treating `%s' as memory reference" +msgid "" +" -mavxscalar=[128|256] encode scalar AVX instructions with specific vector\n" +" length\n" msgstr "" +" -mavxscalar=[128|256] encoder les instructions scalaires AVX avec une longueur de vecteur\n" +" spécifique\n" -#: config/tc-i386.c:8183 -#, fuzzy, c-format -msgid "Unknown operand modifier `%s'" -msgstr "modificateur d'opérande inconnu « %s »\n" +#: config/tc-i386.c:8468 +#, c-format +msgid " -mmnemonic=[att|intel] use AT&T/Intel mnemonic\n" +msgstr " -mmnemonic=[att|intel] utiliser les mnémoniques AT&T/Intel\n" -#: config/tc-i386.c:8199 -#, fuzzy -msgid "Conflicting operand modifiers" -msgstr "modificateur d'opérande non traité" +#: config/tc-i386.c:8470 +#, c-format +msgid " -msyntax=[att|intel] use AT&T/Intel syntax\n" +msgstr " -msyntax=[att|intel] utiliser la syntaxe AT&T/Intel\n" -#: config/tc-i386.c:8248 -#, fuzzy -msgid "Invalid operand to `OFFSET'" -msgstr "Opérande invalide pour « %s »" +#: config/tc-i386.c:8472 +#, c-format +msgid " -mindex-reg support pseudo index registers\n" +msgstr " -mindex-reg supporter les registres pseudo index\n" -#: config/tc-i386.c:8322 +#: config/tc-i386.c:8474 #, c-format -msgid "`[%.*s]' taken to mean just `%.*s'" -msgstr "" +msgid " -mnaked-reg don't require `%%' prefix for registers\n" +msgstr " -mnaked-reg n'exige pas le préfixe « %% » pour les registres\n" -#: config/tc-i386.c:8414 +#: config/tc-i386.c:8476 #, c-format -msgid "`%s' is not a valid segment register" -msgstr "« %s » n'est pas un registre de segment valide" +msgid " -mold-gcc support old (<= 2.8.1) versions of gcc\n" +msgstr " -mold-gcc supporter les anciennes (<= 2.8.1) versions de gcc\n" -#: config/tc-i386.c:8419 -#, fuzzy -msgid "Extra segment override ignored" -msgstr "Argument pour .even ignoré" +#: config/tc-i386.c:8530 +msgid "Intel L1OM is 64bit only" +msgstr "Le L10M d'Intel est 64 bits uniquement" -#: config/tc-i386.c:8453 config/tc-i386.c:8618 -#, fuzzy -msgid "Register scaling only allowed in memory operands" -msgstr "Registre d'échelle seulement permis dans les opérandes en mémoire" - -#: config/tc-i386.c:8475 config/tc-i386.c:8594 -#, fuzzy, c-format -msgid "Syntax error: Expecting a constant, got `%s'" -msgstr "ERREUR de syntaxe. Attendait une constante. A obtenu « %s ».\n" - -#: config/tc-i386.c:8503 -#, fuzzy -msgid "Too many register references in memory operand" -msgstr "Trop de références registre dans l'opérande mémoire.\n" - -#: config/tc-i386.c:8522 -#, fuzzy -msgid "Invalid use of register" -msgstr "Registre source invalide." - -#: config/tc-i386.c:8671 +#: config/tc-i386.c:8753 #, c-format -msgid "Unrecognized token '%s'" -msgstr "Jeton non reconnu « %s »" - -#: config/tc-i386.c:8687 -#, fuzzy, c-format -msgid "Unexpected token `%s'" -msgstr "Jeton attendu « %s »\n" +msgid "can not do %d byte pc-relative relocation" +msgstr "ne peut faire un réadressage relatif au PC de %d octets" -#: config/tc-i386.c:8845 -#, fuzzy -msgid "`:' expected" -msgstr "acc0 attendu" +#: config/tc-i386.c:8771 +#, c-format +msgid "can not do %d byte relocation" +msgstr "ne peut relocaliser %d octets" -#: config/tc-i386.c:8870 -#, fuzzy, c-format -msgid "Unrecognized token `%s'" -msgstr "Jeton non reconnnu « %s »\n" +#: config/tc-i386.c:8854 config/tc-s390.c:2239 +#, c-format +msgid "cannot represent relocation type %s" +msgstr "ne peut représenter le type de réadressage %s" -#: config/tc-i386.c:9005 -#, fuzzy -msgid "Bad .section directive: want a,l,w,x,M,S,G,T in string" -msgstr "Directive .section erronée: nécessite a,s,w,x,M,S,G,T dans la chaîne" +#: config/tc-i386.c:8961 +msgid "bad .section directive: want a,l,w,x,M,S,G,T in string" +msgstr "Directive .section erronée: nécessite a,l,w,x,M,S,G,T dans la chaîne" -#: config/tc-i386.c:9008 -#, fuzzy -msgid "Bad .section directive: want a,w,x,M,S,G,T in string" -msgstr "Directive .section erronée: nécessite a,s,w,x,M,S,G,T dans la chaîne" +#: config/tc-i386.c:8964 +msgid "bad .section directive: want a,w,x,M,S,G,T in string" +msgstr "Directive .section erronée: nécessite a,w,x,M,S,G,T dans la chaîne" -#: config/tc-i386.c:9027 +#: config/tc-i386.c:8983 msgid ".largecomm supported only in 64bit mode, producing .comm" -msgstr "" +msgstr ".largecomm supporté uniquement en mode 64 bits, .comm produit" #: config/tc-i860.c:122 msgid "Directive .dual available only with -mintel-syntax option" -msgstr "" +msgstr "Directive .dual uniquement disponible avec l'option -mintel-syntax" #: config/tc-i860.c:132 msgid "Directive .enddual available only with -mintel-syntax option" -msgstr "" +msgstr "Directive .enddual uniquement disponible avec l'option -mintel-syntax" #: config/tc-i860.c:145 msgid "Directive .atmp available only with -mintel-syntax option" -msgstr "" +msgstr "Directive .atmp uniquement disponible avec l'option -mintel-syntax" #: config/tc-i860.c:167 config/tc-i860.c:171 msgid "Unknown temporary pseudo register" msgstr "Pseudo registre temporaire inconnu" -#: config/tc-i860.c:227 config/tc-mips.c:1765 -#, c-format -msgid "internal error: can't hash `%s': %s\n" -msgstr "ERREUR interne: ne peut adresser par hachage « %s »: %s\n" - #: config/tc-i860.c:247 msgid "Defective assembler. No assembly attempted." -msgstr "Assembleur défectueux. Aucune tentative d'assemblage." +msgstr "Assembleur défectueux. Aucune tentative d'assemblage." -#: config/tc-i860.c:393 config/tc-i860.c:938 config/tc-m68k.c:3726 -#: config/tc-m68k.c:3758 config/tc-sparc.c:2711 +#: config/tc-i860.c:393 config/tc-i860.c:939 config/tc-m68k.c:3914 +#: config/tc-m68k.c:3946 config/tc-sparc.c:2697 msgid "failed sanity check." -msgstr "la vérification de l'état de santé a échoué" +msgstr "la vérification de l'état de santé a échoué." #: config/tc-i860.c:400 #, c-format msgid "Expanded opcode after delayed branch: `%s'" -msgstr "opcode étendu après un branchement retardé: « %s »" +msgstr "opcode étendu après un branchement retardé: « %s »" #: config/tc-i860.c:404 #, c-format msgid "Expanded opcode in dual mode: `%s'" -msgstr "Expansion du opcode en mode dual: « %s »" +msgstr "opcode étendu en mode dual: « %s »" #: config/tc-i860.c:408 #, c-format msgid "An instruction was expanded (%s)" -msgstr "Une instruction a été étendu (%s)" +msgstr "Une instruction a été étendue (%s)" -#: config/tc-i860.c:674 +#: config/tc-i860.c:675 msgid "Pipelined instruction: fsrc1 = fdest" -msgstr "Instruction pipelinée: fsrc1 = fdest" +msgstr "Instruction pipelinée: fsrc1 = fdest" -#: config/tc-i860.c:877 config/tc-i860.c:884 config/tc-i860.c:891 +#: config/tc-i860.c:878 config/tc-i860.c:885 config/tc-i860.c:892 msgid "Assembler does not yet support PIC" -msgstr "Assembleu be supporte pas encore PIC" +msgstr "Assembleur ne supporte pas encore PIC" -#: config/tc-i860.c:955 +#: config/tc-i860.c:956 #, c-format msgid "Illegal operands for %s" -msgstr "opérandes illégales pour %s" +msgstr "Opérandes illégaux pour %s" -#: config/tc-i860.c:972 +#: config/tc-i860.c:973 #, c-format msgid "'d.%s' must be 8-byte aligned" -msgstr "" +msgstr "« d.%s » doit être aligné sur 8 octets" -#: config/tc-i860.c:980 -#, fuzzy, c-format +#: config/tc-i860.c:981 +#, c-format msgid "Prefix 'd.' invalid for instruction `%s'" -msgstr "Rebut à la fin d'instruction: « %s »." - -#: config/tc-i860.c:1086 -msgid "i860_estimate_size_before_relax\n" -msgstr "i860_estimate_size_before_relax\n" +msgstr "Préfixe « d. » invalide pour l'instruction « %s »" -#: config/tc-i860.c:1185 -#, fuzzy, c-format +#: config/tc-i860.c:1134 +#, c-format msgid "" " -EL\t\t\t generate code for little endian mode (default)\n" " -EB\t\t\t generate code for big endian mode\n" @@ -6004,63 +6460,59 @@ msgid "" " -mxp\t\t\t enable i860XP support (disabled by default)\n" " -mintel-syntax\t enable Intel syntax (default to AT&T/SVR4)\n" msgstr "" -" -EL générer du code pour un système à octets de poids " -"faible (pas défaut)\n" -" -EB générer du code pour un système à octets de poids fort\n" -" -mwarn-expand avertir si des pseudo opérations sont étendues\n" -" -mxp activer le support pour i860XP (désactivé par défaut)\n" +" -EL générer du code pour un système à octets de poids faible (par défaut)\n" +" -EB générer du code pour un système à octets de poids fort\n" +" -mwarn-expand avertir si des pseudo opérations sont étendues\n" +" -mxp activer le support pour i860XP (désactivé par défaut)\n" +" -mintel-syntax activer la syntaxe Intel (défaut: AT&T/SVR4)\n" #. SVR4 compatibility flags. -#: config/tc-i860.c:1193 +#: config/tc-i860.c:1142 #, c-format msgid "" " -V\t\t\t print assembler version number\n" " -Qy, -Qn\t\t ignored\n" msgstr "" " -V afficher la version de l'assembleur\n" -" -Qy, -Qn ignoré\n" +" -Qy, -Qn ignoré\n" -#: config/tc-i860.c:1256 +#: config/tc-i860.c:1205 msgid "This immediate requires 0 MOD 2 alignment" -msgstr "Cette immédiate requiert un alignement 0 MOD 2" +msgstr "Cette valeur immédiat requiert un alignement 0 MOD 2" -#: config/tc-i860.c:1259 +#: config/tc-i860.c:1208 msgid "This immediate requires 0 MOD 4 alignment" -msgstr "Cette immédiate requiert un alignement 0 MOD 4" +msgstr "Cette valeur immédiate requiert un alignement 0 MOD 4" -#: config/tc-i860.c:1262 +#: config/tc-i860.c:1211 msgid "This immediate requires 0 MOD 8 alignment" -msgstr "Cette immédiate requiert un alignement 0 MOD 8" +msgstr "Cette valeur immédiate requiert un alignement 0 MOD 8" -#: config/tc-i860.c:1265 +#: config/tc-i860.c:1214 msgid "This immediate requires 0 MOD 16 alignment" -msgstr "Cette immédiate requiert un alignement 0 MOD 16" +msgstr "Cette valeur immédiate requiert un alignement 0 MOD 16" -#: config/tc-i860.c:1360 +#: config/tc-i860.c:1309 msgid "5-bit immediate too large" -msgstr "immédiate de 5 bits trop grande" +msgstr "immédiate de 5 bits trop grande" -#: config/tc-i860.c:1363 +#: config/tc-i860.c:1312 msgid "5-bit field must be absolute" -msgstr "champ de 5 bits doit être absolu" +msgstr "champ de 5 bits doit être absolu" -#: config/tc-i860.c:1408 config/tc-i860.c:1431 +#: config/tc-i860.c:1357 config/tc-i860.c:1380 msgid "A branch offset requires 0 MOD 4 alignment" -msgstr "Un décalage de branchement requiert un alignement 0 MOD 4" +msgstr "Un décalage de branchement requiert un alignement 0 MOD 4" -#: config/tc-i860.c:1452 +#: config/tc-i860.c:1401 #, c-format msgid "Unrecognized fix-up (0x%08lx)" -msgstr "Forme de correctif non reconnu (0x%08lx)" - -#: config/tc-i860.h:76 -msgid "i860_convert_frag\n" -msgstr "i860_convert_frag\n" +msgstr "Forme de correctif non reconnue (0x%08lx)" #: config/tc-i960.c:486 #, c-format msgid "Hashing returned \"%s\"." -msgstr "La fonction de hachage a retourné « %s »." +msgstr "La fonction de hachage a retourné « %s »." #: config/tc-i960.c:582 config/tc-i960.c:1112 msgid "expression syntax error" @@ -6068,24 +6520,24 @@ msgstr "erreur de syntaxe dans l'expression" #: config/tc-i960.c:618 msgid "attempt to branch into different segment" -msgstr "tentative de branchement dans un segment différent" +msgstr "tentative de branchement dans un segment différent" #: config/tc-i960.c:622 #, c-format msgid "target of %s instruction must be a label" -msgstr "cible de l'instruction %s doit être une étiquette" +msgstr "cible de l'instruction %s doit être une étiquette" #: config/tc-i960.c:732 msgid "unaligned register" -msgstr "registre non aligné" +msgstr "registre non aligné" #: config/tc-i960.c:754 msgid "no such sfr in this architecture" -msgstr "pas de tel « sfr » pour cette architecture" +msgstr "pas de tel « sfr » pour cette architecture" #: config/tc-i960.c:792 msgid "illegal literal" -msgstr "litéral illégal" +msgstr "littéral illégal" #: config/tc-i960.c:942 msgid "invalid index register" @@ -6093,16 +6545,15 @@ msgstr "registre d'index invalide" #: config/tc-i960.c:965 msgid "invalid scale factor" -msgstr "facteur d'échelle invalide" +msgstr "facteur d'échelle invalide" #: config/tc-i960.c:1189 msgid "architecture of opcode conflicts with that of earlier instruction(s)" -msgstr "" -"conflit de opcode d'architecture avec ceux d'instructions déjà définies" +msgstr "conflits de opcode d'architecture avec ceux d'instruction(s) déjà définie(s)" -#: config/tc-i960.c:1423 config/tc-xtensa.c:11341 +#: config/tc-i960.c:1423 config/tc-xtensa.c:11519 msgid "too many operands" -msgstr "trop d'opérandes" +msgstr "trop d'opérandes" #. We never moved: there was no opcode either! #: config/tc-i960.c:1471 @@ -6111,34 +6562,34 @@ msgstr "opcode manquant" #: config/tc-i960.c:1611 msgid "branch prediction invalid on this opcode" -msgstr "prédiction de branchement invalide pour ce opcode" +msgstr "prédiction de branchement invalide pour cet opcode" #: config/tc-i960.c:1649 #, c-format msgid "invalid opcode, \"%s\"." -msgstr "opcode invalide, « %s »." +msgstr "opcode invalide, « %s »." #: config/tc-i960.c:1651 #, c-format msgid "improper number of operands. expecting %d, got %d" -msgstr "nombre incorrect d'opérandes. Attendait %d, a obtenu %d" +msgstr "nombre incorrect d'opérandes. Attendait %d, a obtenu %d" -#: config/tc-i960.c:1808 +#: config/tc-i960.c:1751 #, c-format msgid "Fixup of %ld too large for field width of %d" msgstr "Correctif de %ld trop grand pour la largeur du champ de %d" -#: config/tc-i960.c:1918 +#: config/tc-i960.c:1861 #, c-format msgid "invalid architecture %s" msgstr "architecture invalide %s" -#: config/tc-i960.c:1938 +#: config/tc-i960.c:1881 #, c-format msgid "I960 options:\n" msgstr "Options I960:\n" -#: config/tc-i960.c:1941 +#: config/tc-i960.c:1884 #, c-format msgid "" "\n" @@ -6150,165 +6601,653 @@ msgid "" "\t\t\tlong displacements\n" msgstr "" "\n" -" spécifier la variante d'architecture 960\n" -"-b ajouter du code pour la cueuillette de " -"statistiques au sujet des branchements utilisés\n" -"-link-relax préserver les directives individuelles pour que " -"l'éditeur de lien\n" +" spécifier la variante d'architecture 960\n" +"-b ajouter du code pour la cueillette de statistiques au sujet des branchements utilisés\n" +"-link-relax préserver les directives individuelles pour que l'éditeur de lien\n" " puisse faire la relaxe (format b.out seulement)\n" -"-no-relax ne pas altérer les instructions " -"comparer-et-aiguiller pour\n" -" les longs déplacements\n" +"-no-relax ne pas altérer les instructions comparer-et-aiguiller pour\n" +" les longs déplacements\n" -#: config/tc-i960.c:2205 +#: config/tc-i960.c:2146 msgid "should have 1 or 2 operands" -msgstr "devrait avoir 1 ou 2 opérandes" +msgstr "devrait avoir 1 ou 2 opérandes" -#: config/tc-i960.c:2213 config/tc-i960.c:2228 +#: config/tc-i960.c:2154 config/tc-i960.c:2169 #, c-format msgid "Redefining leafproc %s" -msgstr "Redéfinition leafproc %s" +msgstr "Redéfinition leafproc %s" -#: config/tc-i960.c:2258 +#: config/tc-i960.c:2199 msgid "should have two operands" -msgstr "devrait avoir deux opérandes" +msgstr "devrait avoir deux opérandes" -#: config/tc-i960.c:2268 +#: config/tc-i960.c:2209 msgid "'entry_num' must be absolute number in [0,31]" -msgstr "« entry_num » doit être un nombre absolu dans [0,31]" +msgstr "« entry_num » doit être un nombre absolu dans [0,31]" -#: config/tc-i960.c:2276 +#: config/tc-i960.c:2217 #, c-format msgid "Redefining entrynum for sysproc %s" -msgstr "Redéfinition entrynum pour sysproc %s" +msgstr "Redéfinition de entrynum pour sysproc %s" #. Should not happen: see block comment above. -#: config/tc-i960.c:2376 +#: config/tc-i960.c:2317 #, c-format msgid "Trying to 'bal' to %s" -msgstr "Tentative de « bal » vers %s" +msgstr "Tentative de « bal » vers %s" -#: config/tc-i960.c:2386 +#: config/tc-i960.c:2327 msgid "Looks like a proc, but can't tell what kind.\n" -msgstr "Ressemble à une procédure, mais ne peut dire de quel genre.\n" +msgstr "Ressemble à une procédure, mais ne peut dire de quel genre.\n" -#: config/tc-i960.c:2405 +#: config/tc-i960.c:2346 msgid "big endian mode is not supported" -msgstr "système à octets de poids fort n'est pas supporté" +msgstr "système à octets de poids fort n'est pas supporté" -#: config/tc-i960.c:2407 +#: config/tc-i960.c:2348 #, c-format msgid "ignoring unrecognized .endian type `%s'" -msgstr "type de système à octets non reconnu dans .endian « %s »" +msgstr "ignore le type .endian non reconnu « %s »" -#: config/tc-i960.c:2452 +#: config/tc-i960.c:2393 msgid "can't use COBR format with external label" -msgstr "ne peut utiliser un format COBR avec une étiquette externe" +msgstr "ne peut utiliser un format COBR avec une étiquette externe" -#: config/tc-i960.c:2627 +#: config/tc-i960.c:2568 msgid "option --link-relax is only supported in b.out format" -msgstr "L'option --link-relax est seulement supporté dans le format b.out" +msgstr "l'option --link-relax est seulement supportée dans le format b.out" -#: config/tc-i960.c:2654 +#: config/tc-i960.c:2595 #, c-format msgid "No 'bal' entry point for leafproc %s" -msgstr "Pas de point d'entrée « bal » pour la procédure leafproc %s" +msgstr "Pas de point d'entrée « bal » pour la procédure leafproc %s" + +#: config/tc-ia64.c:864 +msgid "bad .section directive: want a,o,s,w,x,M,S,G,T in string" +msgstr "directive .section erronée: nécessite a,o,s,w,x,M,S,G,T dans la chaîne" -#: config/tc-ia64.c:1030 -msgid "Bad .section directive: want a,o,s,w,x,M,S,G,T in string" -msgstr "Directive .section erronée: nécessite a,o,s,w,x,M,S,G,T dans la chaîne" +#: config/tc-ia64.c:916 +msgid "Size of frame exceeds maximum of 96 registers" +msgstr "La taille du cadre dépasse le maximum de 96 registres" -#: config/tc-ia64.c:1173 +#: config/tc-ia64.c:921 +msgid "Size of rotating registers exceeds frame size" +msgstr "La taille des registres de rotation dépasse la taille du cadre" + +#: config/tc-ia64.c:1008 msgid "Unwind directive not followed by an instruction." msgstr "directive unwind n'est pas suivie d'une instruction." -#: config/tc-ia64.c:5122 -msgid "Register name expected" -msgstr "Nom de registre attendu" +#: config/tc-ia64.c:1017 config/tc-ia64.c:7447 +msgid "qualifying predicate not followed by instruction" +msgstr "le prédicat qualifiant n'est pas suivi d'une instruction" + +#: config/tc-ia64.c:1082 config/tc-ia64.c:1116 +msgid "record type is not valid" +msgstr "le type d'enregistrement n'est pas valable" + +#: config/tc-ia64.c:1185 +msgid "Invalid record type for P3 format." +msgstr "Type d'enregistrement invalide pour le format P3." + +#: config/tc-ia64.c:1221 +msgid "Invalid record type for format P6" +msgstr "Type d'enregistrement invalide pour le format P6." + +#: config/tc-ia64.c:1401 config/tc-ia64.c:1453 +msgid "Invalid record type for format B1" +msgstr "Type d'enregistrement invalide pour le format B1." + +#: config/tc-ia64.c:1486 +msgid "Invalid record type for format X1" +msgstr "Type d'enregistrement invalide pour le format X1." + +#: config/tc-ia64.c:1528 +msgid "Invalid record type for format X3" +msgstr "Type d'enregistrement invalide pour le format X3." + +#: config/tc-ia64.c:1566 +msgid "Previous .save incomplete" +msgstr ".save précédent incomplet" + +#: config/tc-ia64.c:2391 +msgid "spill_mask record unimplemented." +msgstr "enregistrement spill_mask non implémenté." + +#: config/tc-ia64.c:2448 +msgid "record_type_not_valid" +msgstr "type_enregistrement_invalide" + +#: config/tc-ia64.c:2533 +msgid "Ignoring attempt to spill beyond end of region" +msgstr "Ignore la tentative de déborder au delà de la fin de la région" + +#: config/tc-ia64.c:2592 +msgid "Only constant space allocation is supported" +msgstr "Seules les allocations à taille constante sont supportées" + +#: config/tc-ia64.c:2606 +msgid "Only constant offsets are supported" +msgstr "Seuls des offsets constants sont supportés" + +#: config/tc-ia64.c:2629 +msgid "Section switching in code is not supported." +msgstr "Commutation de section dans le code n'est pas supporté." + +#: config/tc-ia64.c:2671 +msgid " Insn slot not set in unwind record." +msgstr " Emplacement Insn pas mis dans l'enregistrement unwind." + +#: config/tc-ia64.c:2745 +msgid "frgr_mem record before region record!" +msgstr "enregistrement frgr_mem avant l'enregistrement de région !" + +#: config/tc-ia64.c:2756 +msgid "fr_mem record before region record!" +msgstr "enregistrement fr_mem avant l'enregistrement de région !" + +#: config/tc-ia64.c:2765 +msgid "gr_mem record before region record!" +msgstr "enregistrement gr_mem avant l'enregistrement de région !" + +#: config/tc-ia64.c:2774 +msgid "br_mem record before region record!" +msgstr "enregistrement br_mem avant l'enregistrement de région !" + +#: config/tc-ia64.c:2784 +msgid "gr_gr record before region record!" +msgstr "enregistrement gr_gr avant l'enregistrement de région !" + +#: config/tc-ia64.c:2792 +msgid "br_gr record before region record!" +msgstr "enregistrement br_gr avant l'enregistrement de région !" + +#: config/tc-ia64.c:2910 +#, c-format +msgid "First operand to .%s must be a predicate" +msgstr "Le premier opérande de .%s doit être un prédicat" + +#: config/tc-ia64.c:2914 +#, c-format +msgid "Pointless use of p0 as first operand to .%s" +msgstr "Utilisation inutile de p0 comme premier opérande de .%s" + +#: config/tc-ia64.c:2970 +#, c-format +msgid "Operand %d to .%s must be a preserved register" +msgstr "L'opérande %d de .%s doit être un registre préservé" + +#: config/tc-ia64.c:3006 +#, c-format +msgid "Operand %d to .%s must be a writable register" +msgstr "L'opérande %d de .%s doit être un registre avec accès en écriture" + +#: config/tc-ia64.c:3031 +#, c-format +msgid "Radix `%s' unsupported or invalid" +msgstr "Radical « %s » non supporté ou invalide" + +#: config/tc-ia64.c:3061 config/tc-ia64.c:3066 +#, c-format +msgid ".%s outside of %s" +msgstr ".%s en dehors de %s" + +#: config/tc-ia64.c:3151 +msgid "Tags on unwind pseudo-ops aren't supported, yet" +msgstr "Les étiquettes sur les pseudo-op unwind ne sont pas encore supportées" + +#: config/tc-ia64.c:3173 +msgid "First operand to .fframe must be a constant" +msgstr "Le premier opérande de .fframe doit être une constante" + +#: config/tc-ia64.c:3193 +msgid "First operand to .vframe must be a general register" +msgstr "Le premier opérande de .vframe doit être un registre général" -#: config/tc-ia64.c:5127 config/tc-ia64.c:5440 +#: config/tc-ia64.c:3201 +msgid "Operand of .vframe contradicts .prologue" +msgstr "L'opérande de .vframe contredit le .prologue" + +#: config/tc-ia64.c:3211 +msgid ".vframepsp is meaningless, assuming .vframesp was meant" +msgstr ".vframepsp n'a pas de sens, je suppose que c'est .vframesp qui était prévu" + +#: config/tc-ia64.c:3219 +msgid "Operand to .vframesp must be a constant (sp-relative offset)" +msgstr "L'opérande de .vframesp doit être une constante (offset relatif à sp)" + +#: config/tc-ia64.c:3246 +msgid "First operand to .save not a register" +msgstr "Le premier opérande de .save n'est pas un registre" + +#: config/tc-ia64.c:3252 +msgid "Second operand to .save not a valid register" +msgstr "Le second opérande de .save n'est pas un registre valide" + +#: config/tc-ia64.c:3283 config/tc-ia64.c:3294 config/tc-ia64.c:3302 +msgid "Second operand of .save contradicts .prologue" +msgstr "Le second opérande de .save contredit le .prologue" + +#: config/tc-ia64.c:3309 +msgid "First operand to .save not a valid register" +msgstr "Le premier opérande de .save n'est pas un registre valide" + +#: config/tc-ia64.c:3327 +msgid "First operand to .restore must be stack pointer (sp)" +msgstr "Le premier opérande de .restore doit être le pointeur de pile (sp)" + +#: config/tc-ia64.c:3336 +msgid "Second operand to .restore must be a constant >= 0" +msgstr "Le second opérande de .restore doit être une constante >= 0" + +#: config/tc-ia64.c:3346 +#, c-format +msgid "Epilogue count of %lu exceeds number of nested prologues (%u)" +msgstr "Le décompte des épilogues de %lu dépasse le nombre de prologues imbriqués (%u)" + +#: config/tc-ia64.c:3433 +#, c-format +msgid "Illegal section name `%s' (causes unwind section name clash)" +msgstr "Nom de section illégal « %s » (provoque une collision des noms des sections unwind)" + +#: config/tc-ia64.c:3624 +msgid "First operand to .altrp not a valid branch register" +msgstr "Le premier opérande de .altrp n'est pas un registre de branchement valide" + +#: config/tc-ia64.c:3653 +#, c-format +msgid "First operand to .%s not a register" +msgstr "Le premier opérande de .%s n'est pas un registre" + +#: config/tc-ia64.c:3658 +#, c-format +msgid "Second operand to .%s not a constant" +msgstr "Le second opérande de .%s n'est pas une constante" + +#: config/tc-ia64.c:3725 +#, c-format +msgid "First operand to .%s not a valid register" +msgstr "Le premier opérande de .%s n'est pas un registre valide" + +#: config/tc-ia64.c:3748 +msgid "First operand to .save.g must be a positive 4-bit constant" +msgstr "Le premier opérande de .save.g doit être une constante positive de 4 bits" + +#: config/tc-ia64.c:3761 +msgid "Second operand to .save.g must be a general register" +msgstr "Le second opérande de .save.g doit être un registre général" + +#: config/tc-ia64.c:3766 +#, c-format +msgid "Second operand to .save.g must be the first of %d general registers" +msgstr "Le second opérande de .save.g doit être le premier des %d registres généraux" + +#: config/tc-ia64.c:3789 +msgid "Operand to .save.f must be a positive 20-bit constant" +msgstr "L'opérande de .save.f doit être une constante positive de 20 bits" + +#: config/tc-ia64.c:3812 +msgid "First operand to .save.b must be a positive 5-bit constant" +msgstr "Le premier opérande de .save.b doit être une constante positive de 5 bits" + +#: config/tc-ia64.c:3825 +msgid "Second operand to .save.b must be a general register" +msgstr "Le second opérande de .save.b doit être un registre général" + +#: config/tc-ia64.c:3830 +#, c-format +msgid "Second operand to .save.b must be the first of %d general registers" +msgstr "Le second opérande de .save.b doit être le premier des %d registres généraux" + +#: config/tc-ia64.c:3856 +msgid "First operand to .save.gf must be a non-negative 4-bit constant" +msgstr "Le premier opérande de .save.gf doit être une constante non négative de 4 bits" + +#: config/tc-ia64.c:3864 +msgid "Second operand to .save.gf must be a non-negative 20-bit constant" +msgstr "Le second opérande de .save.gf doit être une constante non négative de 20 bits" + +#: config/tc-ia64.c:3872 +msgid "Operands to .save.gf may not be both zero" +msgstr "Les opérandes de .save.gf ne peuvent pas être tous les deux à zéro" + +#: config/tc-ia64.c:3889 +msgid "Operand to .spill must be a constant" +msgstr "L'opérande de .spill doit être une constante" + +#: config/tc-ia64.c:3958 +#, c-format +msgid "Operand %d to .%s must be a constant" +msgstr "L'opérande %d de .%s doit être une constante" + +#: config/tc-ia64.c:3979 +#, c-format +msgid "Missing .label_state %ld" +msgstr ".label_state %ld manquant" + +#: config/tc-ia64.c:4033 +msgid "Operand to .label_state must be a constant" +msgstr "L'opérande de .label_state doit être une constante" + +#: config/tc-ia64.c:4052 +msgid "Operand to .copy_state must be a constant" +msgstr "L'opérande de .copy_state doit être une constante" + +#: config/tc-ia64.c:4075 +msgid "First operand to .unwabi must be a constant" +msgstr "Le premier opérande de .unwabi doit être une constante" + +#: config/tc-ia64.c:4081 +msgid "Second operand to .unwabi must be a constant" +msgstr "Le second opérande de .unwabi doit être une constante" + +#: config/tc-ia64.c:4116 +msgid "Missing .endp after previous .proc" +msgstr ".endp manquant après la déclaration .proc précédente" + +#: config/tc-ia64.c:4135 +msgid "Empty argument of .proc" +msgstr "Argument vide dans .proc" + +#: config/tc-ia64.c:4140 +#, c-format +msgid "`%s' was already defined" +msgstr "« %s » a déjà été défini" + +#: config/tc-ia64.c:4183 +msgid "Initial .body should precede any instructions" +msgstr "Le .body initial doit précéder toute instruction" + +#: config/tc-ia64.c:4202 +msgid ".prologue within prologue" +msgstr ".prologue à l'intérieur d'un prologue" + +#: config/tc-ia64.c:4207 +msgid "Initial .prologue should precede any instructions" +msgstr "Le .prologue initial doit précéder toute instruction" + +#: config/tc-ia64.c:4217 +msgid "First operand to .prologue must be a positive 4-bit constant" +msgstr "Le premier opérande de .prologue doit être une constante positive de 4 bits" + +#: config/tc-ia64.c:4219 +msgid "Pointless use of zero first operand to .prologue" +msgstr "Utilisation inutile de zéro premier opérande de .prologue" + +#: config/tc-ia64.c:4233 +msgid "Using a constant as second operand to .prologue is deprecated" +msgstr "L'utilisation d'une constante comme second opérande de .prologue est dépréciée" + +#: config/tc-ia64.c:4239 +msgid "Second operand to .prologue must be a general register" +msgstr "Le second opérande de .prologue doit être un registre général" + +#: config/tc-ia64.c:4244 +#, c-format +msgid "Second operand to .prologue must be the first of %d general registers" +msgstr "Le second opérande de .prologue doit être le premier des %d registres généraux" + +#: config/tc-ia64.c:4356 +#, c-format +msgid "`%s' was not defined within procedure" +msgstr "« %s » n'a pas été défini à l'intérieur d'une procédure" + +#: config/tc-ia64.c:4394 +msgid "Empty argument of .endp" +msgstr "Argument vide dans .endp" + +#: config/tc-ia64.c:4408 +#, c-format +msgid "`%s' was not specified with previous .proc" +msgstr "« %s » n'a pas été spécifié avec le .proc précédent" + +#: config/tc-ia64.c:4423 +#, c-format +msgid "`%s' should be an operand to this .endp" +msgstr "« %s » devrait être un opérande de ce .endp" + +#: config/tc-ia64.c:4464 config/tc-ia64.c:4802 config/tc-ia64.c:5109 msgid "Comma expected" -msgstr "Virgule attendu" +msgstr "Virgule attendue" + +#: config/tc-ia64.c:4505 +msgid "Expected '['" +msgstr "« [ » attendu" + +#: config/tc-ia64.c:4514 config/tc-ia64.c:7582 +msgid "Expected ']'" +msgstr "« ] » attendu" + +#: config/tc-ia64.c:4519 +msgid "Number of elements must be positive" +msgstr "Le nombre d'éléments doit être positif" -#: config/tc-ia64.c:5135 +#: config/tc-ia64.c:4530 +#, c-format +msgid "Used more than the declared %d rotating registers" +msgstr "A utilisé plus que les %d registres rotatifs déclarés" + +#: config/tc-ia64.c:4538 +msgid "Used more than the available 96 rotating registers" +msgstr "A utilisé plus que les 96 registres rotatifs disponibles" + +#: config/tc-ia64.c:4545 +msgid "Used more than the available 48 rotating registers" +msgstr "A utilisé plus que les 48 registres rotatifs disponibles" + +#: config/tc-ia64.c:4573 +#, c-format +msgid "Attempt to redefine register set `%s'" +msgstr "Tentative de redéfinition de l'ensemble de registres « %s »" + +#: config/tc-ia64.c:4639 +#, c-format +msgid "Unknown psr option `%s'" +msgstr "Option psr inconnue « %s »" + +#: config/tc-ia64.c:4687 +msgid "Missing section name" +msgstr "Nom de section manquant" + +#: config/tc-ia64.c:4697 +msgid "Comma expected after section name" +msgstr "Virgule attendue après le nom de section" + +#: config/tc-ia64.c:4708 +msgid "Creating sections with .xdataN/.xrealN/.xstringZ is deprecated." +msgstr "Création de sections avec .xdataN/.xrealN/.xstringZ est dépréciée." + +#: config/tc-ia64.c:4797 +msgid "Register name expected" +msgstr "Nom de registre attendu" + +#: config/tc-ia64.c:4810 msgid "Register value annotation ignored" -msgstr "Annotation de valeur de registre ignorée" +msgstr "Annotation de valeur de registre ignorée" -#: config/tc-ia64.c:5176 +#: config/tc-ia64.c:4849 msgid "Directive invalid within a bundle" -msgstr "Directive invalide à l'intérieur du paquet" +msgstr "Directive invalide à l'intérieur d'un paquet" -#: config/tc-ia64.c:5269 +#: config/tc-ia64.c:4940 msgid "Missing predicate relation type" -msgstr "Type de relation de prédicact manquant" +msgstr "Type de relation de prédicat manquant" -#: config/tc-ia64.c:5275 +#: config/tc-ia64.c:4946 msgid "Unrecognized predicate relation type" -msgstr "Type de relation de prédicat non reconnu" +msgstr "Type de relation de prédicat non reconnu" -#: config/tc-ia64.c:5321 +#: config/tc-ia64.c:4992 msgid "Bad register range" -msgstr "Gamme de registre erronée" +msgstr "Gamme de registre erronée" -#: config/tc-ia64.c:5330 +#: config/tc-ia64.c:5001 config/tc-ia64.c:7527 msgid "Predicate register expected" -msgstr "Registre de prédicat attendu" +msgstr "Registre de prédicat attendu" -#: config/tc-ia64.c:5335 +#: config/tc-ia64.c:5006 msgid "Duplicate predicate register ignored" -msgstr "Prédicat de registre en double ignoré" +msgstr "Prédicat de registre en double ignoré" -#: config/tc-ia64.c:5351 +#: config/tc-ia64.c:5022 msgid "Predicate source and target required" -msgstr "Prédicat source et cible requis" +msgstr "Prédicat source et cible requis" -#: config/tc-ia64.c:5353 config/tc-ia64.c:5365 +#: config/tc-ia64.c:5024 config/tc-ia64.c:5036 msgid "Use of p0 is not valid in this context" -msgstr "Utilisation de p n'est pas valide dans ce contexte" +msgstr "Utilisation de p0 n'est pas valide dans ce contexte" -#: config/tc-ia64.c:5360 +#: config/tc-ia64.c:5031 msgid "At least two PR arguments expected" msgstr "Au moins deux arguments PR attendus" -#: config/tc-ia64.c:5374 +#: config/tc-ia64.c:5045 msgid "At least one PR argument expected" msgstr "Au moins un argument PR attendu" -#: config/tc-ia64.c:5410 +#: config/tc-ia64.c:5080 #, c-format msgid "Inserting \"%s\" into entry hint table failed: %s" -msgstr "Insertion de « %s » dans la table d'indices a échoué: %s" +msgstr "Insertion de « %s » dans la table d'indices a échoué: %s" #. FIXME -- need 62-bit relocation type -#: config/tc-ia64.c:5886 +#: config/tc-ia64.c:5548 msgid "62-bit relocation not yet implemented" -msgstr "Relocalisation 62 bits n'est pas encore implantée" +msgstr "Réadressage 62 bits n'est pas encore implémenté" #. XXX technically, this is wrong: we should not be issuing warning #. messages until we're sure this instruction pattern is going to #. be used! -#: config/tc-ia64.c:5970 +#: config/tc-ia64.c:5632 msgid "lower 16 bits of mask ignored" -msgstr "16 bits du bas du masque sont ignorés" +msgstr "16 bits inférieurs du masque sont ignorés" + +#: config/tc-ia64.c:5946 +msgid "Expected separator `='" +msgstr "Séparateur « = » attendu" + +#: config/tc-ia64.c:5980 +msgid "Duplicate equal sign (=) in instruction" +msgstr "Signe égal (=) en double dans l'instruction" + +#: config/tc-ia64.c:5987 +#, c-format +msgid "Illegal operand separator `%c'" +msgstr "Séparateur d'opérande « %c » illégal" + +#: config/tc-ia64.c:6102 +#, c-format +msgid "Operand %u of `%s' should be %s" +msgstr "L'opérande %u de « %s » devrait être %s" + +#: config/tc-ia64.c:6106 +msgid "Wrong number of output operands" +msgstr "Nombre d'opérandes de sortie erroné" + +#: config/tc-ia64.c:6108 +msgid "Wrong number of input operands" +msgstr "Nombre d'opérandes d'entrée erroné" + +#: config/tc-ia64.c:6110 +msgid "Operand mismatch" +msgstr "Opérandes ne concordent pas" + +#: config/tc-ia64.c:6192 +#, c-format +msgid "Invalid use of `%c%d' as output operand" +msgstr "Utilisation invalide de « %c%d » en tant que opérande de sortie" + +#: config/tc-ia64.c:6195 +#, c-format +msgid "Invalid use of `r%d' as base update address operand" +msgstr "Utilisation invalide de « r%d » en tant opérande de mise à jour de base de l'adresse" + +#: config/tc-ia64.c:6219 +#, c-format +msgid "Invalid duplicate use of `%c%d'" +msgstr "Utilisation redondante de « %c%d » n'est pas permise" + +#: config/tc-ia64.c:6226 +#, c-format +msgid "Invalid simultaneous use of `f%d' and `f%d'" +msgstr "Utilisation simultanée de « f%d » et « f%d » n'est pas permise" + +#: config/tc-ia64.c:6232 +#, c-format +msgid "Dangerous simultaneous use of `f%d' and `f%d'" +msgstr "Utilisation simultanée de « f%d » et « f%d » est dangereuse" -#: config/tc-ia64.c:6585 +#: config/tc-ia64.c:6276 msgid "Value truncated to 62 bits" -msgstr "Valeur tronquée à 62 bits" +msgstr "Valeur tronquée à 62 bits" + +#: config/tc-ia64.c:6339 +#, c-format +msgid "Bad operand value: %s" +msgstr "Mauvaise valeur de l'opérande: %s" #. Give an error if a frag containing code is not aligned to a 16 byte #. boundary. -#: config/tc-ia64.c:6723 config/tc-ia64.h:172 -#, fuzzy +#: config/tc-ia64.c:6414 config/tc-ia64.h:177 msgid "instruction address is not a multiple of 16" -msgstr "doit faire un branchement vers une adresse qui est un multiple de 4" +msgstr "l'adresse de l'instruction n'est pas un multiple de 16" + +#: config/tc-ia64.c:6482 +#, c-format +msgid "`%s' must be last in bundle" +msgstr "« %s » doit être le dernier dans le paquet" + +#: config/tc-ia64.c:6514 +#, c-format +msgid "Internal error: don't know how to force %s to end of instruction group" +msgstr "Erreur interne: je ne sais pas comment forcer %s à la fin du groupe d'instructions" + +#: config/tc-ia64.c:6527 +#, c-format +msgid "`%s' must be last in instruction group" +msgstr "« %s » doit être le dernier dans le groupe d'instructions" + +#: config/tc-ia64.c:6557 +msgid "Label must be first in a bundle" +msgstr "L'étiquette doit être la première dans un paquet" + +#: config/tc-ia64.c:6634 +msgid "hint in B unit may be treated as nop" +msgstr "hint dans une unité B pourrait être traité comme un nop" + +#: config/tc-ia64.c:6645 +msgid "hint in B unit can't be used" +msgstr "hint ne peut pas être utilisé dans une unité B" + +#: config/tc-ia64.c:6659 +msgid "emit_one_bundle: unexpected dynamic op" +msgstr "emit_one_bundle: opérande dynamique inattendu" + +#: config/tc-ia64.c:6782 +#, c-format +msgid "`%s' does not fit into %s template" +msgstr "« %s » n'entre pas dans le modèle %s" -#: config/tc-ia64.c:7273 +#: config/tc-ia64.c:6797 +#, c-format +msgid "`%s' does not fit into bundle" +msgstr "« %s » n'entre pas dans le paquet" + +#: config/tc-ia64.c:6809 +#, c-format +msgid "`%s' can't go in %s of %s template" +msgstr "« %s » ne peut pas aller dans %s du modèle %s" + +#: config/tc-ia64.c:6815 +msgid "Missing '}' at end of file" +msgstr "« } » manquant à la fin du fichier" + +#: config/tc-ia64.c:6962 #, c-format msgid "Unrecognized option '-x%s'" -msgstr "Option non reconnue '-x%s'" +msgstr "Option non reconnue « -x%s »" -#: config/tc-ia64.c:7301 -#, fuzzy +#: config/tc-ia64.c:6989 msgid "" "IA-64 options:\n" " --mconstant-gp\t mark output file as using the constant-GP model\n" @@ -6334,491 +7273,574 @@ msgid "" "\t\t\t dependency violation checking\n" msgstr "" "Options IA-64:\n" -" --mconstant-gp indiquer que le fichier utilise le modèle de " -"constantes GP\n" -" (initialiser le fanion d'en-tête ELF " -"EF_IA_64_CONS_GP)\n" -" --mauto-pic indiquer que le fichier utilise le modèle de " -"constantes GP\n" -" sans les descripteurs de fonction " -"(initialiser le fanion d'en-tête ELF\n" +" --mconstant-gp indiquer que le fichier utilise le modèle de constantes GP\n" +" (initialiser le fanion d'en-tête ELF EF_IA_64_CONS_GP)\n" +" --mauto-pic indiquer que le fichier utilise le modèle de constantes GP\n" +" sans les descripteurs de fonction (initialiser le fanion d'en-tête ELF\n" " EF_IA_64_NOFUNCDESC_CONS_GP)\n" -" -milp32|-milp64|-mlp64|-mp64 sélectionner le modèle de données (par " -"défaut -mlp64)\n" -" -mle | -mbe sélectionner le système à octet de poids " -"faible ou fort (par défaut -mle)\n" -" -x | -xexplicit activer la vérification de violation de " -"dépendance (par défaut)\n" -" -xauto enlever automatiquement les violations de " -"dépendance\n" -" -xdebug passer en mode débug le vérificateur de " -"violations de dépendance\n" - -#: config/tc-ia64.c:7331 +" -milp32|-milp64|-mlp64|-mp64 sélectionner le modèle de données (par défaut -mlp64)\n" +" -mle | -mbe sélectionner le système à octet de poids faible ou fort (par défaut -mle)\n" +" -mtune=[itanium1|itanium2] ajuster pour un CPU spécifique (par défaut -mtune=itanium2)\n" +" -munwind-check=[warning|error]\n" +" vérifie la directive unwind (par défaut -munwind-check=warning)\n" +" -mint.b=[ok|warning|error] vérifie hint.b (par défaut -mhint.b=error)\n" +" -x | -xexplicit activer la vérification des violations de dépendances\n" +" -xauto enlever automatiquement les violations de dépendances (par défaut)\n" +" -xnone aucune vérification des violations de dépendances\n" +" -xdebug passer en mode débug le vérificateur de violations de dépendances\n" +" -xdebugn débug du vérificateur des violations des dépendances mais désactive\n" +" la vérification des violations de dépendances\n" +" -xdebugx débug du vérificateur des violations des dépendances et active\n" +" la vérification des violations de dépendances\n" + +#: config/tc-ia64.c:7019 msgid "--gstabs is not supported for ia64" -msgstr "--gstabs n'est pas supporté pour ia64" +msgstr "--gstabs n'est pas supporté pour ia64" + +#: config/tc-ia64.c:7257 +#, c-format +msgid "ia64.md_begin: can't hash `%s': %s" +msgstr "ia64.md_begin: ne peut adresser par hachage « %s »: %s" -#: config/tc-ia64.c:7636 config/tc-mips.c:1754 +#: config/tc-ia64.c:7318 +#, c-format +msgid "Inserting \"%s\" into constant hash table failed: %s" +msgstr "Insertion de « %s » dans la table de hachage des constantes a échoué: %s" + +#: config/tc-ia64.c:7330 config/tc-mips.c:1905 msgid "Could not set architecture and machine" msgstr "Ne peut initialiser l'architecture et la machine" -#: config/tc-ia64.c:7762 +#: config/tc-ia64.c:7462 msgid "Explicit stops are ignored in auto mode" -msgstr "Les arrêts explicites sont ignorés en mode auto" +msgstr "Les arrêts explicites sont ignorés en mode auto" -#: config/tc-ia64.c:7784 +#: config/tc-ia64.c:7471 +msgid "Found '{' when manual bundling is already turned on" +msgstr "« { » trouvé alors que le paquetage manuel est déjà activé" + +#: config/tc-ia64.c:7484 msgid "Found '{' after explicit switch to automatic mode" -msgstr "Trouvé « { » après un passage explicite en mode automatique" +msgstr "« { » trouvé après un passage explicite en mode automatique" + +#: config/tc-ia64.c:7490 +msgid "Found '}' when manual bundling is off" +msgstr "« } » trouvé alors que le paquetage manuel est désactivé" + +#: config/tc-ia64.c:7517 +msgid "Expected ')'" +msgstr "« ) » attendu" + +#: config/tc-ia64.c:7522 +msgid "Qualifying predicate expected" +msgstr "Prédicat qualifiant attendu" + +#: config/tc-ia64.c:7541 +msgid "Tag must come before qualifying predicate." +msgstr "L'étiquette doit venir avant le prédicat qualifiant." + +#: config/tc-ia64.c:7571 +msgid "Expected ':'" +msgstr "« : » attendu" -#: config/tc-ia64.c:8389 +#: config/tc-ia64.c:7587 +msgid "Tag name expected" +msgstr "Nom d'étiquette attendu" + +#: config/tc-ia64.c:7689 +msgid "Rotating register index must be a non-negative constant" +msgstr "L'index du registre rotatif doit être une constante non négative" + +#: config/tc-ia64.c:7694 +#, c-format +msgid "Index out of range 0..%u" +msgstr "Index hors de la gamme 0..%u" + +#: config/tc-ia64.c:7706 +msgid "Indirect register index must be a general register" +msgstr "L'index du registre indirect doit être un registre général" + +#: config/tc-ia64.c:7715 +msgid "Index can only be applied to rotating or indirect registers" +msgstr "L'index peut uniquement être appliqué aux registres rotatifs ou indirects" + +#: config/tc-ia64.c:7751 config/tc-xstormy16.c:146 +msgid "Expected '('" +msgstr "« ( » attendu" + +#: config/tc-ia64.c:7759 config/tc-pdp11.c:448 config/tc-pdp11.c:514 +#: config/tc-pdp11.c:553 config/tc-xstormy16.c:155 +msgid "Missing ')'" +msgstr "« ) » manquante" + +#: config/tc-ia64.c:7777 config/tc-xstormy16.c:162 +msgid "Not a symbolic expression" +msgstr "Pas une expression symbolique" + +#: config/tc-ia64.c:7782 config/tc-ia64.c:7796 +msgid "Illegal combination of relocation functions" +msgstr "Combinaison illégale de fonctions de réadressage" + +#: config/tc-ia64.c:7885 +msgid "No current frame" +msgstr "Pas de cadre actif" + +#: config/tc-ia64.c:7887 +#, c-format +msgid "Register number out of range 0..%u" +msgstr "Numéro de registre hors de la gamme 0..%u" + +#: config/tc-ia64.c:7925 +msgid "Standalone `#' is illegal" +msgstr "« # » seul est illégal" + +#: config/tc-ia64.c:7928 +msgid "Redundant `#' suffix operators" +msgstr "Opérateurs de suffixe « # » redondant" + +#: config/tc-ia64.c:8086 #, c-format msgid "Unhandled dependency %s for %s (%s), note %d" -msgstr "Dépendance non traitée %s pour %s (%s), noter %d" +msgstr "Dépendance non traitée %s pour %s (%s), noter %d" -#: config/tc-ia64.c:9665 +#: config/tc-ia64.c:9381 #, c-format msgid "Unrecognized dependency specifier %d\n" -msgstr "Spécificateur de dépendance non reconnu %d\n" +msgstr "Spécificateur de dépendance non reconnu %d\n" -#: config/tc-ia64.c:10562 +#: config/tc-ia64.c:10257 msgid "Only the first path encountering the conflict is reported" -msgstr "Seul le premier chemin où le conflit est rencontré est rapporté" +msgstr "Seul le premier chemin où le conflit est rencontré est rapporté" -#: config/tc-ia64.c:10565 +#: config/tc-ia64.c:10259 msgid "This is the location of the conflicting usage" -msgstr "Voici la localisation d'un usage conflictuel." +msgstr "Voici la position de l'usage conflictuel" + +#: config/tc-ia64.c:10520 +#, c-format +msgid "Unknown opcode `%s'" +msgstr "Opcode inconnu « %s »" + +#: config/tc-ia64.c:10598 +#, c-format +msgid "AR %d can only be accessed by %c-unit" +msgstr "AR %d uniquement accessible par unité %c" + +#: config/tc-ia64.c:10610 +msgid "hint.b may be treated as nop" +msgstr "hint.b pourrait être traité comme un nop" + +#: config/tc-ia64.c:10613 +msgid "hint.b shouldn't be used" +msgstr "hint.b ne devrait pas être utilisé" + +#: config/tc-ia64.c:10652 +#, c-format +msgid "`%s' cannot be predicated" +msgstr "« %s » ne peu pas être transformé en prédicat" + +#: config/tc-ia64.c:10724 +msgid "Closing bracket missing" +msgstr "Accolade fermante manquante" + +#: config/tc-ia64.c:10733 +msgid "Index must be a general register" +msgstr "L'index doit être un registre général" + +#: config/tc-ia64.c:10898 +#, c-format +msgid "Unsupported fixup size %d" +msgstr "Taille du correctif %d non supportée" + +#. This should be an error, but since previously there wasn't any +#. diagnostic here, don't make it fail because of this for now. +#: config/tc-ia64.c:11170 +#, c-format +msgid "Cannot express %s%d%s relocation" +msgstr "Ne peut exprimer le réadressage %s%d%s" + +#: config/tc-ia64.c:11189 +msgid "No addend allowed in @fptr() relocation" +msgstr "Pas d'addende autorisé dans le réadressage @fptr()" + +#: config/tc-ia64.c:11228 +msgid "integer operand out of range" +msgstr "Opérande entier hors limite" + +#: config/tc-ia64.c:11295 +#, c-format +msgid "%s must have a constant value" +msgstr "%s doit avoir une valeur constante" + +#: config/tc-ia64.c:11315 +msgid "cannot resolve @slotcount parameter" +msgstr "ne peut résoudre le paramètre @slotcount" + +#: config/tc-ia64.c:11348 +msgid "invalid @slotcount value" +msgstr "valeur @slotcount invalide" + +#: config/tc-ia64.c:11385 config/tc-z8k.c:1372 +#, c-format +msgid "Cannot represent %s relocation in object file" +msgstr "Ne peut représenter le réadressage « %s » dans le fichier objet" -#: config/tc-ia64.c:11791 -#, fuzzy +#: config/tc-ia64.c:11496 msgid "Can't add stop bit to mark end of instruction group" -msgstr "constant trop grande pour être insérée dans l'instruction" +msgstr "Ne peut ajouter le bit de stop pour marquer la fin du groupe d'instructions" -#: config/tc-ia64.c:11891 config/tc-score.c:6398 read.c:1446 read.c:2417 -#: read.c:3046 read.c:3379 read.c:3423 +#: config/tc-ia64.c:11596 config/tc-score.c:6109 read.c:1451 read.c:2447 +#: read.c:3149 read.c:3490 read.c:3534 msgid "expected symbol name" msgstr "nom de symbole attendu" -#: config/tc-ia64.c:11901 read.c:2427 read.c:3056 read.c:3407 stabs.c:468 +#: config/tc-ia64.c:11606 read.c:2457 read.c:3159 read.c:3518 stabs.c:468 #, c-format msgid "expected comma after \"%s\"" -msgstr "virgule attendue après « %s »" +msgstr "virgule attendue après « %s »" -#: config/tc-ia64.c:11943 +#: config/tc-ia64.c:11648 #, c-format msgid "`%s' is already the alias of %s `%s'" -msgstr "« %s» est déjà l'alias de %s `%s'" +msgstr "« %s » est déjà l'alias de %s « %s »" -#: config/tc-ia64.c:11953 +#: config/tc-ia64.c:11658 #, c-format msgid "%s `%s' already has an alias `%s'" -msgstr "%s `%s' a déjà un alias `%s'" +msgstr "%s « %s » a déjà un alias « %s »" -#: config/tc-ia64.c:11964 +#: config/tc-ia64.c:11669 #, c-format msgid "inserting \"%s\" into %s alias hash table failed: %s" -msgstr "insertion de « %s » dans la table d'alias %s a échoué: %s" +msgstr "insertion de « %s » dans la table de hachage des alias %s a échoué: %s" -#: config/tc-ia64.c:11972 +#: config/tc-ia64.c:11677 #, c-format msgid "inserting \"%s\" into %s name hash table failed: %s" -msgstr "insertion de « %s » dans la table de noms %s a échoué: %s" +msgstr "insertion de « %s » dans la table de hachage des noms %s a échoué: %s" -#: config/tc-ia64.c:11991 +#: config/tc-ia64.c:11703 #, c-format msgid "symbol `%s' aliased to `%s' is not used" -msgstr "symbole « %s » ayant l'alias `%s' n'est pas utilisé" +msgstr "symbole « %s » ayant l'alias « %s » n'est pas utilisé" -#: config/tc-ia64.c:12013 +#: config/tc-ia64.c:11726 #, c-format msgid "section `%s' aliased to `%s' is not used" -msgstr "section « %s » ayant l'alias `%s' n'est pas utilisée" +msgstr "section « %s » ayant l'alias « %s » n'est pas utilisée" #: config/tc-ip2k.c:158 #, c-format msgid "IP2K specific command line options:\n" -msgstr "options IP2K spécifique de la ligne de commande:\n" +msgstr "options spécifiques IP2K de la ligne de commande:\n" #: config/tc-ip2k.c:159 #, c-format msgid " -mip2022 restrict to IP2022 insns \n" -msgstr " -mip2022 restraindre au insns IP2022\n" +msgstr " -mip2022 restreindre au insns IP2022\n" #: config/tc-ip2k.c:160 #, c-format msgid " -mip2022ext permit extended IP2022 insn\n" -msgstr "" -" -mip2022ext supporter le jeu étendu d'instructions IP2022\n" - -#: config/tc-ip2k.c:274 -msgid "md_pcrel_from\n" -msgstr "md_pcrel_from\n" +msgstr " -mip2022ext supporter le jeu étendu d'instructions IP2022\n" #: config/tc-iq2000.c:364 -#, fuzzy, c-format +#, c-format msgid "the yielding instruction %s may not be in a delay slot." -msgstr "Instruction %s n'est pas permise dans la plage de délai" +msgstr "L'instruction pour passer la main %s peut ne pas être dans la plage de délai." #: config/tc-iq2000.c:372 #, c-format msgid "Register number (R%ld) for double word access must be even." -msgstr "" +msgstr "Numéro de registre (R%ld) doit être paire pour un accès en mot double." #: config/tc-iq2000.c:381 config/tc-iq2000.c:386 config/tc-iq2000.c:391 #: config/tc-iq2000.c:408 config/tc-mt.c:244 config/tc-mt.c:249 #, c-format msgid "operand references R%ld of previous load." -msgstr "" +msgstr "l'opérande référence le R%ld du chargement précédent." #: config/tc-iq2000.c:396 msgid "instruction implicitly accesses R31 of previous load." -msgstr "" +msgstr "l'instruction accède implicitement à R31 du chargement précédent." -#: config/tc-iq2000.c:651 config/tc-mep.c:1647 -#, fuzzy +#: config/tc-iq2000.c:651 config/tc-mep.c:2008 msgid "Unmatched high relocation" -msgstr "Relocalisation %%hi non pairée" +msgstr "Réadressage haut sans correspondant" -#: config/tc-iq2000.c:878 config/tc-mips.c:14503 config/tc-score.c:6105 +#: config/tc-iq2000.c:829 config/tc-mips.c:15017 config/tc-score.c:5819 msgid ".end not in text section" msgstr ".end n'est pas dans la section de texte" -#: config/tc-iq2000.c:882 config/tc-mips.c:14507 config/tc-score.c:6108 +#: config/tc-iq2000.c:833 config/tc-mips.c:15021 config/tc-score.c:5822 msgid ".end directive without a preceding .ent directive." -msgstr "directive .end n'est pas précédé de la directive .ent" +msgstr "directive .end n'est pas précédée de la directive .ent." -#: config/tc-iq2000.c:891 config/tc-mips.c:14516 config/tc-score.c:6116 +#: config/tc-iq2000.c:842 config/tc-mips.c:15030 config/tc-score.c:5830 msgid ".end symbol does not match .ent symbol." -msgstr "symbole .end n'est pas pairé avec le symbole .ent" +msgstr "symbole .end n'a pas de correspondance avec le symbole .ent." -#: config/tc-iq2000.c:894 config/tc-mips.c:14523 config/tc-score.c:6121 +#: config/tc-iq2000.c:845 config/tc-mips.c:15037 config/tc-score.c:5835 msgid ".end directive missing or unknown symbol" msgstr "Directive .end manquante ou symbole inconnu" -#: config/tc-iq2000.c:912 -#, fuzzy +#: config/tc-iq2000.c:863 msgid "Expected simple number." -msgstr "nombre simple attendu" +msgstr "Nombre simple attendu." -#: config/tc-iq2000.c:941 config/tc-mips.c:14428 config/tc-score.c:5955 +#: config/tc-iq2000.c:892 config/tc-mips.c:14942 config/tc-score.c:5670 #, c-format msgid " *input_line_pointer == '%c' 0x%02x\n" -msgstr " *input_line_pointer == « %c » 0x%02x\n" +msgstr " *input_line_pointer == « %c » 0x%02x\n" -#: config/tc-iq2000.c:943 -#, fuzzy +#: config/tc-iq2000.c:894 msgid "Invalid number" -msgstr "nombre invalide" +msgstr "Nombre invalide" -#: config/tc-iq2000.c:978 config/tc-mips.c:14598 config/tc-score.c:5994 +#: config/tc-iq2000.c:928 config/tc-mips.c:15109 config/tc-score.c:5708 msgid ".ent or .aent not in text section." msgstr ".ent ou .aent n'est pas dans la section texte." -#: config/tc-iq2000.c:981 -#, fuzzy +#: config/tc-iq2000.c:931 msgid "missing `.end'" -msgstr ".end manquant" +msgstr "« .end » manquant" + +#: config/tc-lm32.c:237 config/tc-moxie.c:575 +msgid "bad call to md_atof" +msgstr "appel erroné à md_atof" -#: config/tc-m32c.c:137 -#, fuzzy, c-format +#: config/tc-m32c.c:143 +#, c-format msgid " M32C specific command line options:\n" -msgstr " Option spécifiques de la ligne de commande M32R:\n" +msgstr " Options spécifiques M32R de la ligne de commande:\n" #. Pretend that we do not recognise this option. #: config/tc-m32r.c:331 msgid "Unrecognised option: -hidden" msgstr "Option non reconnue: -hidden" -#: config/tc-m32r.c:358 config/tc-sparc.c:595 +#: config/tc-m32r.c:358 config/tc-sparc.c:583 msgid "Unrecognized option following -K" -msgstr "option non reconnnue après -K" +msgstr "Option non reconnue après -K" #: config/tc-m32r.c:373 #, c-format msgid " M32R specific command line options:\n" -msgstr " Option spécifiques de la ligne de commande M32R:\n" +msgstr " Options spécifiques M32R de la ligne de commande:\n" #: config/tc-m32r.c:375 #, c-format -msgid "" -" -m32r disable support for the m32rx instruction set\n" -msgstr "" -" -m32r désactiver le support du jeu d'instructions m32rx\n" +msgid " -m32r disable support for the m32rx instruction set\n" +msgstr " -m32r désactiver le support du jeu d'instructions m32rx\n" #: config/tc-m32r.c:377 #, c-format msgid " -m32rx support the extended m32rx instruction set\n" -msgstr "" -" -m32rx supporter le jeu étendu d'instructions m32rx\n" +msgstr " -m32rx supporter le jeu étendu d'instructions m32rx\n" #: config/tc-m32r.c:379 -#, fuzzy, c-format +#, c-format msgid " -m32r2 support the extended m32r2 instruction set\n" -msgstr "" -" -m32rx supporter le jeu étendu d'instructions m32rx\n" +msgstr " -m32r2 supporter le jeu étendu d'instructions m32r2\n" #: config/tc-m32r.c:381 #, c-format msgid " -EL,-little produce little endian code and data\n" -msgstr "" +msgstr " -EL,-little produire du code et des données pour systèmes à octets de poids faible\n" #: config/tc-m32r.c:383 -#, fuzzy, c-format +#, c-format msgid " -EB,-big produce big endian code and data\n" -msgstr "" -" -EB assembler le code pour un système de poids fort\n" +msgstr " -EB,-big produire du code et des données pour systèmes à octets de poids fort\n" #: config/tc-m32r.c:385 -#, fuzzy, c-format +#, c-format msgid " -parallel try to combine instructions in parallel\n" -msgstr "" -" -O essayer de combiner les instructions en parallèle\n" +msgstr " -parallèle essayer de combiner les instructions en parallèle\n" #: config/tc-m32r.c:387 #, c-format msgid " -no-parallel disable -parallel\n" -msgstr "" +msgstr " -no-parallel désactive -parallel\n" #: config/tc-m32r.c:389 -#, fuzzy, c-format -msgid "" -" -no-bitinst disallow the M32R2's extended bit-field " -"instructions\n" -msgstr "" -" -m32rx supporter le jeu étendu d'instructions m32rx\n" +#, c-format +msgid " -no-bitinst disallow the M32R2's extended bit-field instructions\n" +msgstr " -no-bitinst refuser les instructions de champ de bits étendues du M32R2\n" #: config/tc-m32r.c:391 -#, fuzzy, c-format +#, c-format msgid " -O try to optimize code. Implies -parallel\n" -msgstr "" -" -O essayer de combiner les instructions en parallèle\n" +msgstr " -O essayer d'optimiser le code. Implique -parallel\n" #: config/tc-m32r.c:394 #, c-format -msgid "" -" -warn-explicit-parallel-conflicts warn when parallel instructions\n" -msgstr "" -" -warn-explicit-parallel-conflicts avertir lorsque des instructions " -"parallèles\n" +msgid " -warn-explicit-parallel-conflicts warn when parallel instructions\n" +msgstr " -warn-explicit-parallel-conflicts avertir lorsque des instructions parallèles\n" #: config/tc-m32r.c:396 -#, fuzzy, c-format +#, c-format msgid " might violate contraints\n" -msgstr " violent les contraintes\n" +msgstr " pourraient violer les contraintes\n" #: config/tc-m32r.c:398 #, c-format msgid " -no-warn-explicit-parallel-conflicts do not warn when parallel\n" -msgstr "" -" -no-warn-explicit-parallel-conflicts ne pas avertir lorsque des " -"instructions\n" +msgstr " -no-warn-explicit-parallel-conflicts ne pas avertir lorsque des instructions\n" #: config/tc-m32r.c:400 -#, fuzzy, c-format -msgid "" -" instructions might violate " -"contraints\n" -msgstr "" -" parallèles violent les contraintes\n" +#, c-format +msgid " instructions might violate contraints\n" +msgstr " parallèles pourraient violer les contraintes\n" #: config/tc-m32r.c:402 #, c-format -msgid "" -" -Wp synonym for -warn-explicit-parallel-conflicts\n" -msgstr "" -" -Wp identique à -warn-explicit-parallel-conflicts\n" +msgid " -Wp synonym for -warn-explicit-parallel-conflicts\n" +msgstr " -Wp identique à -warn-explicit-parallel-conflicts\n" #: config/tc-m32r.c:404 #, c-format -msgid "" -" -Wnp synonym for -no-warn-explicit-parallel-conflicts\n" -msgstr "" -" -Wnp identique à -no-warn-explicit-parallel-conflicts\n" +msgid " -Wnp synonym for -no-warn-explicit-parallel-conflicts\n" +msgstr " -Wnp identique à -no-warn-explicit-parallel-conflicts\n" #: config/tc-m32r.c:406 -#, fuzzy, c-format -msgid "" -" -ignore-parallel-conflicts do not check parallel instructions\n" -msgstr "" -" -warn-explicit-parallel-conflicts avertir lorsque des instructions " -"parallèles\n" +#, c-format +msgid " -ignore-parallel-conflicts do not check parallel instructions\n" +msgstr " -ignore-parallel-conflicts ne vérifie pas les instructions parallèles\n" #: config/tc-m32r.c:408 -#, fuzzy, c-format +#, c-format msgid " fo contraint violations\n" -msgstr " violent les contraintes\n" +msgstr " pour des violations de contraintes\n" #: config/tc-m32r.c:410 -#, fuzzy, c-format -msgid "" -" -no-ignore-parallel-conflicts check parallel instructions for\n" -msgstr "" -" -warn-explicit-parallel-conflicts avertir lorsque des instructions " -"parallèles\n" +#, c-format +msgid " -no-ignore-parallel-conflicts check parallel instructions for\n" +msgstr " -no-ignore-parallel-conflicts vérifie les instructions parallèles pour\n" #: config/tc-m32r.c:412 -#, fuzzy, c-format +#, c-format msgid " contraint violations\n" -msgstr " violent les contraintes\n" +msgstr " des violations de contraintes\n" #: config/tc-m32r.c:414 -#, fuzzy, c-format +#, c-format msgid " -Ip synonym for -ignore-parallel-conflicts\n" -msgstr "" -" -Wp identique à -warn-explicit-parallel-conflicts\n" +msgstr " -Ip identique à -ignore-parallel-conflicts\n" #: config/tc-m32r.c:416 -#, fuzzy, c-format +#, c-format msgid " -nIp synonym for -no-ignore-parallel-conflicts\n" -msgstr "" -" -Wnp identique à -no-warn-explicit-parallel-conflicts\n" +msgstr " -nIp identique à -no-ignore-parallel-conflicts\n" #: config/tc-m32r.c:419 #, c-format -msgid "" -" -warn-unmatched-high warn when an (s)high reloc has no matching low " -"reloc\n" +msgid " -warn-unmatched-high warn when an (s)high reloc has no matching low reloc\n" msgstr "" -" -warn-unmatched-high avertir lorsqu'il y a un relocalisation de type " -"haute\n" -" qui ne concorde pas avec une relocalisation de " -"type basse\n" +" -warn-unmatched-high avertir lorsqu'il y a un réadressage de type haut\n" +" qui ne concorde pas avec un réadressage de type bas\n" #: config/tc-m32r.c:421 #, c-format msgid " -no-warn-unmatched-high do not warn about missing low relocs\n" -msgstr "" -" -no-warn-unmatched-high ne pas avertir lorsque des relocalisations basses " -"sont manquantes\n" +msgstr " -no-warn-unmatched-high ne pas avertir lorsque des réadressages bas sont manquants\n" #: config/tc-m32r.c:423 #, c-format msgid " -Wuh synonym for -warn-unmatched-high\n" -msgstr " -Wuh identique à -warn-unmatched-high\n" +msgstr " -Wuh identique à -warn-unmatched-high\n" #: config/tc-m32r.c:425 #, c-format msgid " -Wnuh synonym for -no-warn-unmatched-high\n" -msgstr " -Wnuh identique à -no-warn-unmatched-high\n" +msgstr " -Wnuh identique à -no-warn-unmatched-high\n" #: config/tc-m32r.c:428 -#, fuzzy, c-format +#, c-format msgid " -KPIC generate PIC\n" -msgstr " -w ignorée\n" +msgstr " -KPIC générer PIC\n" -#: config/tc-m32r.c:849 -#, fuzzy +#: config/tc-m32r.c:850 msgid "instructions write to the same destination register." -msgstr "Les instructions écrivent au même registre de destination." +msgstr "les instructions écrivent dans le même registre de destination." -#: config/tc-m32r.c:857 +#: config/tc-m32r.c:858 msgid "Instructions do not use parallel execution pipelines." -msgstr "" -"Les instructions n'utilisent pas de pipelines parallèles durant l'exécution." +msgstr "Les instructions n'utilisent pas de pipelines parallèles durant l'exécution." -#: config/tc-m32r.c:865 +#: config/tc-m32r.c:866 msgid "Instructions share the same execution pipeline" -msgstr "Les instructions partagent le même pipeline durant l'exécution" +msgstr "Les instructions partagent le même pipeline durant l'exécution" -#: config/tc-m32r.c:930 config/tc-m32r.c:1044 +#: config/tc-m32r.c:931 config/tc-m32r.c:1045 #, c-format msgid "not a 16 bit instruction '%s'" -msgstr "n'est pas une instruction de 16 bits « %s »" +msgstr "n'est pas une instruction de 16 bits « %s »" -#: config/tc-m32r.c:942 config/tc-m32r.c:1056 config/tc-m32r.c:1240 -#, fuzzy, c-format +#: config/tc-m32r.c:943 config/tc-m32r.c:1057 config/tc-m32r.c:1241 +#, c-format msgid "instruction '%s' is for the M32R2 only" -msgstr "instruction « %s » est valable seulement pour M32RX" +msgstr "instruction « %s » est valable seulement pour le M32R2" -#: config/tc-m32r.c:955 config/tc-m32r.c:1069 config/tc-m32r.c:1253 +#: config/tc-m32r.c:956 config/tc-m32r.c:1070 config/tc-m32r.c:1254 #, c-format msgid "unknown instruction '%s'" -msgstr "instruction inconnue « %s »" +msgstr "instruction inconnue « %s »" -#: config/tc-m32r.c:964 config/tc-m32r.c:1076 config/tc-m32r.c:1260 +#: config/tc-m32r.c:965 config/tc-m32r.c:1077 config/tc-m32r.c:1261 #, c-format msgid "instruction '%s' is for the M32RX only" -msgstr "instruction « %s » est valable seulement pour M32RX" +msgstr "instruction « %s » est valable seulement pour le M32RX" -#: config/tc-m32r.c:973 config/tc-m32r.c:1085 +#: config/tc-m32r.c:974 config/tc-m32r.c:1086 #, c-format msgid "instruction '%s' cannot be executed in parallel." -msgstr "instruction « %s » ne peut être exécutée en parallèle." +msgstr "instruction « %s » ne peut être exécutée en parallèle." -#: config/tc-m32r.c:1028 config/tc-m32r.c:1110 config/tc-m32r.c:1317 +#: config/tc-m32r.c:1029 config/tc-m32r.c:1111 config/tc-m32r.c:1318 msgid "internal error: lookup/get operands failed" -msgstr "erreur interne: opérande lookup/get a échoué" +msgstr "erreur interne: opérande lookup/get a échoué" -#: config/tc-m32r.c:1095 +#: config/tc-m32r.c:1096 #, c-format msgid "'%s': only the NOP instruction can be issued in parallel on the m32r" -msgstr "" -"« %s »: seule l'instruction NOP peut être utilisée en parallèle sur le m32r" +msgstr "« %s »: seule l'instruction NOP peut être utilisée en parallèle sur le m32r" -#: config/tc-m32r.c:1124 +#: config/tc-m32r.c:1125 #, c-format -msgid "" -"%s: output of 1st instruction is the same as an input to 2nd instruction - " -"is this intentional ?" -msgstr "" -"%s: la sortie de la 1ere instruction est la même que l'entrée de la 2e " -"instruction - est-ce intentionnel ?" +msgid "%s: output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?" +msgstr "%s: la sortie de la 1ère instruction est la même que l'entrée de la 2ème instruction - est-ce intentionnel ?" -#: config/tc-m32r.c:1128 +#: config/tc-m32r.c:1129 #, c-format -msgid "" -"%s: output of 2nd instruction is the same as an input to 1st instruction - " -"is this intentional ?" -msgstr "" -"%s: la sortie de la 2e instruction est la même que l'entrée de la 1ere " -"instruction - est-ce intentionnel ?" - -#: config/tc-m32r.c:1492 config/tc-ppc.c:1854 config/tc-ppc.c:4402 -msgid "Expected comma after symbol-name: rest of line ignored." -msgstr "Virgule attendue après le nomde symbole: reste de la ligne ignoré." +msgid "%s: output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?" +msgstr "%s: la sortie de la 2ème instruction est la même que l'entrée de la 1ère instruction - est-ce intentionnel ?" -#: config/tc-m32r.c:1502 +#: config/tc-m32r.c:1503 #, c-format msgid ".SCOMMon length (%ld.) <0! Ignored." -msgstr "longueur .SCOMMon (%ld.) <0! Ignoré." - -#: config/tc-m32r.c:1516 config/tc-ppc.c:1876 config/tc-ppc.c:3023 -#: config/tc-ppc.c:4426 -msgid "ignoring bad alignment" -msgstr "mauvais alignement ignoré" - -#: config/tc-m32r.c:1528 config/tc-ppc.c:1913 config/tc-v850.c:322 -msgid "Common alignment not a power of 2" -msgstr "Alignement du commun n'est pas une puissance de 2" - -#: config/tc-m32r.c:1543 config/tc-ppc.c:1887 config/tc-ppc.c:4438 -#, c-format -msgid "Ignoring attempt to re-define symbol `%s'." -msgstr "Tentative ignorée de re-définition du symbole « %s »." +msgstr "longueur .SCOMMon (%ld.) <0! Ignoré." -#: config/tc-m32r.c:1552 +#: config/tc-m32r.c:1553 #, c-format msgid "Length of .scomm \"%s\" is already %ld. Not changed to %ld." -msgstr "Longueur de .scomm « %s » est déjà %ld. N'a pas été changé à %ld." +msgstr "Longueur de .scomm « %s » est déjà %ld. N'a pas été changé à %ld." -#: config/tc-m32r.c:1788 +#: config/tc-m32r.c:1789 msgid "Addend to unresolved symbol not on word boundary." -msgstr "Ajout d'un symbole non résolu n'est pas sur une frontière de mot" +msgstr "Ajout d'un symbole non résolu n'est pas sur une frontière de mot." -#: config/tc-m32r.c:1929 config/tc-m32r.c:1982 config/tc-sh.c:747 +#: config/tc-m32r.c:1930 config/tc-m32r.c:1983 config/tc-sh.c:775 +#: config/tc-sh.c:2456 msgid "Invalid PIC expression." -msgstr "expresion PIC invalide" +msgstr "Expresion PIC invalide" -#: config/tc-m32r.c:2073 +#: config/tc-m32r.c:2074 msgid "Unmatched high/shigh reloc" -msgstr "Relocalisation high/shigh non pairée" - -#: config/tc-m32r.c:2333 config/tc-sparc.c:3604 -#, c-format -msgid "internal error: can't export reloc type %d (`%s')" -msgstr "erreur interne: ne peut exporter le type de relocalisation %d (« %s »)" +msgstr "Réadressage high/shigh non pairé" #: config/tc-m68hc11.c:371 -#, fuzzy, c-format +#, c-format msgid "" "Motorola 68HC11/68HC12/68HCS12 options:\n" " -m68hc11 | -m68hc12 |\n" @@ -6839,796 +7861,734 @@ msgid "" msgstr "" "Options Motorola 68HC11/68HC12:\n" " -m68hc11 | -m68hc12\n" -" -m68hcs12 spécifier le processeur [par défaut %s]\n" -" -mshort utiliser l'ABI int de 16 bits (par défaut)\n" +" -m68hcs12 spécifier le processeur [par défaut %s]\n" +" -mshort utiliser l'ABI int de 16 bits (par défaut)\n" " -mlong utiliser l'ABI int de 32 bits\n" " -mshort-double utiliser l'ABI double de 32 bits\n" -" -mlong-double utiliser l'ABI double de 64 bits\n" -" --force-long-branchs toujours convertir les branchements relatifs en " -"absolus\n" -" -S,--short-branchs ne pas convertir les branchements relatifs en " -"absolus\n" -" lorsque le décalage est hors limite\n" -" --strict-direct-mode ne pas convertir le mode direct en mode étendu\n" -" lorsque l'instruction ne supporte pas le mode " -"direct\n" -" --print-insn-syntax afficher la syntaxe de l'instruction en cas " -"d'erreur\n" +" -mlong-double utiliser l'ABI double de 64 bits (par défaut)\n" +" --force-long-branchs toujours convertir les branchements relatifs en absolus\n" +" -S,--short-branchs ne pas convertir les branchements relatifs en absolus\n" +" lorsque le décalage est hors limite\n" +" --strict-direct-mode ne pas convertir le mode direct en mode étendu\n" +" lorsque l'instruction ne supporte pas le mode direct\n" +" --print-insn-syntax afficher la syntaxe de l'instruction en cas d'erreur\n" " --print-opcodes afficher la liste des instruction avec la syntaxe\n" -" --generate-example générer un exemple de chaque instruction\n" +" --generate-example générer un exemple de chaque instruction\n" " (utiliser en mode test)\n" #: config/tc-m68hc11.c:417 #, c-format msgid "Default target `%s' is not supported." -msgstr "Cible de défaut « %s » n'est pas supportée." +msgstr "Cible par défaut « %s » n'est pas supportée." #. Dump the opcode statistics table. #: config/tc-m68hc11.c:435 #, c-format msgid "Name # Modes Min ops Max ops Modes mask # Used\n" -msgstr "Nom # Modes Min ops Max ops Modes masq. # Utilisé\n" +msgstr "Nom # Modes Min ops Max ops Modes masq. # Utilisé\n" #: config/tc-m68hc11.c:501 #, c-format msgid "Option `%s' is not recognized." -msgstr "L'option « %s » n'est pas reconnue." +msgstr "L'option « %s » n'est pas reconnue." -#: config/tc-m68hc11.c:723 +#: config/tc-m68hc11.c:671 msgid "#" msgstr "#" -#: config/tc-m68hc11.c:732 +#: config/tc-m68hc11.c:680 msgid "#" msgstr "#" -#: config/tc-m68hc11.c:741 config/tc-m68hc11.c:750 +#: config/tc-m68hc11.c:689 config/tc-m68hc11.c:698 msgid ",X" msgstr ",X" -#: config/tc-m68hc11.c:777 +#: config/tc-m68hc11.c:725 msgid "*" msgstr "*" -#: config/tc-m68hc11.c:789 +#: config/tc-m68hc11.c:737 msgid "#" msgstr "#" -#: config/tc-m68hc11.c:799 +#: config/tc-m68hc11.c:747 #, c-format msgid "symbol%d" msgstr "symbole%d" -#: config/tc-m68hc11.c:801 +#: config/tc-m68hc11.c:749 msgid "" msgstr "" -#: config/tc-m68hc11.c:820 +#: config/tc-m68hc11.c:768 msgid "

?$Y{cfy8*YQzuC+60FYB%^J?srRG zkFIlkYCnbM?KQM64xo80^Jmy9IWjpvxfR`qdGgi zM6dTp>+B&kuCvkgyn&u$Thjf5Xx*InSM0|c=yLy!r!sJs%V`w zLC=>S=(x9|b-5JH!*}R&r~eawF1rXFzY%&4^+ebGAUghB^!Zh2UO!FkztHFMABx}E z<{?SC)2KTiBNp09|;wKaPGs^o2$8-H}1)#yIhmf8o= zI2Ab@=T$ZIxen;QzZM(f9Q3_!(e?a;j#v6fcp*B!W>^>pp!?uvw7+}MeextapY`ZD zaRANliAUplEp*&I==tzO@^dr~CH{-&JEQp-i`L6h^j!N4Yh&hE)JspijP^)$z8lf; zf5etp^mu$Xd!X^3icRntwEtaboJ(ir%{|X*V;kCSu^CQB&)?6`I2O*%o7?|IXuV#6 zey?vu@6Sf}=euaU_M`DBohNT@o~xqobw!^ahQ@n(y8a>>*G*{rwxj!KA39FCym@oa zr55NqyP@?q7Cnz=qH%Z*JqO>$Lii!N{x4GdS1dsL5c*u6oV>YlD2k3#70qXNG~ah7 zC!_DpLg%+2wO1rpqvL&q?z1n^bF|P2as4#(y^3hu>!9nu3_XuVqvzB8==d+9<9~}j z_Y1m?f+xm0%c192E%dprXk2@vak&evm&egOY)0d=7YpKX^!e)po|=P3~L zJQ;oN0yJ)&(DC}9;}1p0y%$U3jCB7wG)}Li_6BtRU!ddtgs!_p!I)natW3KzdLE5I z$DM<#v+_ipHl0W^gF_{g{kB@KtPqCl!fxc16dz z8Qr(j(0RRro{O6?gFmD7S*U3AUlUz-2lP912YP=&y1xlM|8}GMwREwli>8=cr|5Zc zSGv9&eSQm?pRD51-x+8fmnT0(zk3JKekzrWy6K4K_ck<7&!PMLZ8Q%1(E2K0D(a#W)}ehHTKCJ*^Z$3W zpYu+R^R|#uhVLKX+!)SiaJT>A_553<7JvRoUah{fZ z5zX@!tcH0`i@4Q9`yYs|cN}_u20D**==%Ra>+rPG!l_0{Nj z8__syL+5ouCh~G2nwLw^`nw6;Pfwxq-IVTsi{|ma)IO_xyw@CEe?QFNU1yxYbANX*jyCrl9xNU`^bP#-r3(F-~oC{+A~2M4wxPzPCMj1f5Trvt!@X zM#sMz&D(giu3o~X_(F>iLi6?#7Q=PPFVH&MgRc89`u-W`MjbRj-|vf!a6-Di4qMXx1pOzZr|bn0zxrsLyQA|Pg5JLmoyYv-s&xNrG!F;R^Yx4iBkpa{{eKgh zzr|>Me1rCT2py+H<;cVN==DbEdzYd2r=jC6Oum<{Z%_V%?*F1yqF!2}@$ZGs=YI5e zz$@sv@;$nr525?HY}GiAI-=kIap-)fC)c3yJAlTa9*HNAo@j zTj8tN1phYij z?_cT0(O)?*54?!->K+%_&Pe?v2?v+^JsTYjz;G{ z2VK`%bo|3;|J7SWy!xQ~a~xWCZ(|)ifX1=?tmeebX2xvgVAT!DTcZ$RTT7LDW6Xx`VNaoU%zpV=nrvl)85 zJ7#b^I{sXA->yLG`19l*w0;kx^--d2#JL4puUDt`t!SPeM*CTUo|7BU_-;qnbway{ z(?#h0zUX{Lq5aQ8_wQ$De2TS?dajJV-xkf!&FT6Q^j!S_Jtuxf=k*^Nms2{#`1SE5 z+I=xMZfKmwqVF$4-}?yNkGs+LOLvU(wJv684??d`MCbQ>asyg_yU~8LJH@z_(et?* z7QwsG{W(3k6bsYdfX?Gfw4cLh|D`%dT~tG_w?XrK4SLSphxza|^!LUpG!EO*`0hvd zd%iAFcNNifUW}e|m!NfaE1Kuo>He$eJh!CwZ|Q#iuF+2ht&?i#{%VfSXE0`P7B<7T zQakICn0I+}o-NUOxfWaD*wkK&&igwwUVowIZk}#2UTL&_9-4;+X#Mt1jzri0AllFD z)LxFRdmTFN_h>(du_+em9{axwx)1L~^DzsJ%iCxje~!lGXu5t%kI2(SXq-Eu;|@XN zIvz8)0L|a~XuiKk`~3r*SH4T*xeDlhZ;q~OG}gn1(0%m*W^fm}j(k019T~L$nrOeB z(D@8V-ixkhKKk6cbbSZf@9|{W%VHnaN9%Yf`rhN{y5B_O{srd74?XXSTpsgniN@&) zbRUgJ$6J=JZ$RVwC+5~=uULOY%y7LadjA@9+*{Fo|37s6b?Ep%pmle`6)}&>=(tVM z_zy(;xdV&g!)U$EPwiJz`~B4ZDz$%3?W3t(_{ylKa%kSFqjlLN*%|Hs>eL>V9Gk8` zl$@P>A>DrmJ%=`>>)X-!{h8W%u8MZaQ_=qCqtCybT#JtL zdAh#`-7kmGbrrfgo<9w3Uy$1MlI_vwuT1S>=y-Rc@t%R!-{RyNbo_1Te11(HMdNu= z@A%H1hWhR%BoT30hLgRi0W`6c>&`X}8#`qDGe^Yy`(ta`3$Z@#!wgowInMu1crop}u_?ZZ9q>Q& zJa0ELZ`L(949&+U=<`KKg{`p;?Qz%`C(V@-xmK)G%oo8w&i;9+vENf==`2X*Y^oF!qe`E^Z9c0J2DlW--qb@a>hh_ zF2TCAAHyf{6P$rJj?J4j3{M!BH)}nP#GA44oq4lv#h0-SRvDi+_rK3#G+LMIa1s84 z&VTM*5uXES+%CL3Z|?tI*&sAeYq2?=d{6A}%hCBvLi4Z=8)N=^`5ut>HfTMLxG&yY zf!%2zP3^7|VqG)wa;|Sf_erh$W4?W{3GGE_9Dcz|vF-yA$EkQ1?N`uo>r4!9LHk*O zzV{oGs>#C-T`@&FpIqv(FW=(*SzL(%mwMz3#0>%G{*7_U3#q5UBGU7CyqaRnORHRyMF zCmN?bi{kg|*_ff-49!PBEQa@|>yM+~#W(OQ+=0d?XK{RI>!SO-PijAfuKRtoZV#jL zt+piQbp!f+ehgjDDlCb+(R1qv8mC&%$KQ{&M&sNK?e{v&;Qz26uEgsxvoz}DLG=D> z=(@i|>+=vg@6%t1{n!Pq`$^agzd-vxZCT8tV{$_BUG#i9g8sg%`(nhm4H~a*XkPoH zzoW*c>rbHLEJpXw-)LT%zZCQ9l)M4GJ{g_w<7geMMC1#2oKTTh!^4eugCs6gso{;d?VI%19oP9kK&0G@a{L``tNV$&He9V zE%SEl-v^SfqT}vF>!-_4u*-{&-Ob>#C~w2sTH$(!{R<26M4 zDYG`d2kp>!KakpQq379AbiVD@#rJqR_N4tITCWY>k35b->*Eo$zCXp0%;yN2hv6II zxhd%Wd?EQ&GVg~mPG#)M{gLQ%?;}zH#@1MIlzH7H) zE1vrb%~NJe%>P>Sd+-*T&my11_o^kDuLtoGT#4Q3x9HZqSz8#V|7ZN(;(F~bB0e+G zJnTg4q|ldfjsfeG9toXRthegZ6(6&&PAWiRUjt&!@5I zIW!&J-_N4?Sc5*lA6-}3Z{v4DSM>TM^c;E(o!=K|og78a#d_a`qtW=ijQ0O$@}%uC zzw^+%v_s>1I~s>&$*oE{M9sg-`KI_o)V;8y)j-zp_{(Z!Ac=9nc zKC96FzE7U;L&U2Rp2YP_(0KGl|Ndn%dXCRWf9Jo7o=d+cPuv;j%bDo)hG_nKpz*#P zo$nO%yZSOV#^2DqRsJ#J+#juzIq3KMGc195e~NRVG&--!=sK@VPC?_pI^92x#-qxv zur-#Z-3P6s(dc|;qW!&r#&s_`?uonOcSTKf9sSXKPDJyy4xQ%_^!;jk;_q+zpzFFF z{d2~f=zD)-2CMIle04*=FC)-8cnGbdx6ySR#cEjh=cvQM=@Ym?S9XhWG$u(#l9mfh-?zgDhX6WyotI>JgkX($$e-FC; z(|?b8YL~nLTXKCmdjCu8jQReEdGtiTM~|ZOcs02nt%oXqMm(-X^Dz%y{}wzAv-ibw zXQ1)xhSu{vXuh69*S|4&2#t4z{gM9$==snKeg1Cr+*^pgw*}kd5p=(_{wwYeLf@N) zzV`;YA9kSgIORaxZ;RIXO{u*YJwHB0&#mKVTrW5n>#2{{=cVZW8H(2Lz3BL}(RjUs z=4m^6P98_|Rq^jwe_PDZ9*WlaWVBwEp!5C;jZ>a~BCZwDI_{2+GZC%3C1^apL+5+q zq3EYNo`p;cd*1`!F9KM*Gk6Z=4@>(73fjzqdD{@m_@1|EJg*OB{~( zdL^f#@mz=2$8mIBwU5O2uphd?~j^@q!FE4pV*OB2*EiJGE+TS#E{0-=O z4xs&?lbw?_7O%t(xD8Lo^YY~6=CK8OeHfaLm6*YAlK-LkIWuogZhTsz^Bal-vxyhF z{$n{gx#v)w6QZB1&~e6~_a8^=c5Ax+8(KF7PK@zRMdx1+&1-+O9_~l$cQN+Ff6%;k z&KLcTN8|7&8po{sF@9xiPO~FA{xmdSAENcU4?U01D3Fs|k5w^4yAzhjVd#9O;mP=B za!b0u8#7!lP%tO=Tsj|JZ)0qNSD^Wuh0X8_^n5t2P)_dob19m)htd8&LeIA!(0KoY zp5tep6zi*xo*Q?f@n44StFO>F?N6RuI4AdeSqD$z`e^jrx(9uKIl4c0qV;|lt*;72 za&q@;ZM5G`Xuku|bxlm|1?ariqx*Ol`upO9qVZl`G|!iy{SQgkXJ9MZ&!h7>fY#et z#iCA|CvQWqzlfffThP27N5{Rec-R)r(*X4O`_c33IduLz&^Z2^u4hU_J}*P#eHVH@ zJ%;wb49&;4Xx>YgjCnOd>uoezhYQjAIf(Y3DHZu{jqdmR(K_3V?eK53KAWDLll!~) zKJ+`c3B8_EIw$vBX^Wma%A8}S6@Qcvl;FG2ztI$IyLIF2R5cX9Uboz^!feie%aF^|Gm(0CZprN zh1UHM^n2Ur^f;GpNB6-JbbWi!eB?bN;(ThdJsOWOsl5!{uRoymbr79T(Xw&wR84kA z>-JW(-e#e7zY{$VN}idM`}amY(Ks!}M)(_A#}}5%$^G+HA3U4(QZz1G(fY{FM84~x z=j`q1JeHvA{|K%7Bj`Rot9-2v=fwCOlOxgd?@4q$U!d_nnygbX)_*fP-{olhzCq97P6H|V_nL-$kZ3uAsY(KvTU*FP1l-)B;L1-kx^(Kzo$*HNf)?ElJ` zq1_T)?*OcW_a#@M-}gi4{;66e*4q-T;~UWR&PDgxW^9VTU?HqrHO`^B=sa#f=W##Q z!X@Z?KcM^YKdgrrT@-aU7_Gx`=y|so&HolGjM>%VoGFUdaf8$zh<$0#K>Ph0?Wa=p zSWgc$|C7-3d_8)uX4i=E+oJ2b2VLh&=>FY>?vHb7=H&if?}xs>5Y5B)=y_0@yk;~Z*&j&l>*|5Iq5x1;?XLgQ5P;y4GcN8|NBEQ+t9_t&9uJ(|qa ziSxS!I={YX9Y2oN`3kg-zD2)xM^gKgx-q}n==bPaG=7hw=j;YFkA>^Sd3`QA?}2DM z7hnizDZYra7dl_2)PoU?>R&-zdfu4g!Tg3i4 z3p2E9qtErklW_#L#Ru?m+={NJa?3a$uR+_h(EM(}_E@-8PVT>VT#nsnzl_#V{?-wP z&S)KtLG!W#t)rjO{!VQZ{dGd;KQXxmeeWn*2N$=ExD7+=U^)8!mzcrA?c#i@g6^|R z(f97dy7)HQ|Dj~H_VL{Hm>aj$-iqcUZ-=;E7u~-%q5VFFo{t}(`6%2m^4cC<*C4bm zA4BWl6}0YlqV@kDI{#BT#r1~h{CZ*&oQBr>C+Pe8(*1IsBTkp2`+X)_2j8OgablO) z@0G9_?W@qbehQo5w`ji4?3$DN?`HMT{+~e4i4V|t9Yxn)^O6*w%S4r^Bi=aZowY-2i}V_m zBKFTo&s+2c2(I?1Y2S@7NpYdVWalGcJ$)+yXuCMx*b|Lx0D7 zjMl+1wEoZT70>s<&a@xKVz?81{{UK_nJeP?9%#KxL(lt7*Z~itp~}GFL_YG(*p)f#~@;8NL4!8uw3Adp}xtrLIor4_c2MQ+pt~u6xlsT8!4oMzsH* z(Yi0*JL26Gy*>;b?~&AAf!5=8w0`sVi8!B&KGzvNkA|b`ordP`O|-wg=s8rZZ=7cp z(d*Y?2B)CwT87SlBO1p&==w@t6YVPKJT6DaxeHz263pNy==%Ob_hHd~F~6GV{4Pb` zABEQQ9L(Ux!|gWkU{wHKo6 z`53MHf0E}7ig7MS=QRpj<2*bCe?kA;oO6BT;dC_atX^D_ip_e6AlPoeQ!iKTEa8s}rl zsyD_t(Fd*T*_grC(farrt;;;aqYkQJJ=z1&-xG7w^{>!*7QHFXsm^Gg??UtR44Rjf zXuqGMzh{o2=T@~5k=FreoX4ThO-I-923m)oqv!HTH^+D_(e}Mq7vDy|D~Hf^Uoce#6F-PfRXH4}~7D_9VJK=;9KseS&vF>Wo)&-LzT zT(80mjzGUlGtmA147&f;qwC&=g)#fS_;XcJ^!anqywySDcOzOq3(@`a5xU-k=yRne zMEpCT{a=UW@iw&oSy%)YrR%Sw{cc0|NvZpzj;mu!+C$NPmZR%gi%oGGy8f~cM4k4+ z7PO~ebNm!Ne@~g1ll4AvZHR4YpD;Nms}FWY*Rc%UH(SyEi%g02pN-Z{12q5Fqw9Da zi{hJ@!4J{(|BB|R(9}35EJfyU(yv|e7uYPbijm(!-j_$|=-ABUb(tI%^{7rH-> zp!@FR>5;#N==%Dm_I>F7T!ikEx6pIrU-WlGsfXjwIZe=d9EXlG3tiV5biF^J`={iL zsEev--St4%c^8_;r_ugjK=ZZ%ozI@sE<7{Ve*wCV4w$=Nus!XWX#BrN>nP`u_R*??LnP5<1WC(etm!W3hi)qWQfAjo)%~-rLar|3>?- z{dm;RZOK(=o^zgv`YMHv(-u9aZ$aa{5RKnYXkPREFV<5R9q$_S`!EsB&nv0@0h*V; zQoG!&h<7`*j&DTc^$L0p??uNw^U0V;XY{$T=z7=S6?ho!_tM!hpS#feFDHLN`>QY~ z^4t?|%ES49ZMeSc>G*wIb#6}Xe{OXw8rN^obrhHv?V9Mh(HE`n3D^i%q4Pe5&bRvf zupc_^4D5yL(Y&AiOzeY>XuL+F`I>{q^J{E{CoPD-r|*W=Zyz-7W6=FE2Rq^G*a7oD z8~yY^zduvadfAXXgrit@#pfbkPcDk@+-{D#J%((_T5m!SO&Mc4UIauJ?F`+anNJJ9`h;?kJM z1?WDzHnnd<>-=SO9-Gkj4r2y0FT|g>nxgTZiOy#;dM=%`EPg-LM)P?;y3Uno9uK1P zJpaYmNA0jW?TP3--olpn30eoIycFNHw&=c}g#P|`0gdZAEJ!|n!YgV2`EumF<14Yg z8R-7sh~{NKx#Fr@ao$Wu_xENrUdPdR zoWCM|hYdj6^U=E8fv&g2>#@IDqU}3U`vvrz+l7ALtG^NTcOBk9`w_GbPIxocR}HQI z!RYme(KxR{<9-0mf8~`?FRicv?P2KiOVIuBC7Q3p=z6QX74Nk{^UxQ)J{?`p5;Tu{ z(BHTD-;Vs%!6LLfqUZaS=>EP9joa(!`m$C<+&ZA+-i|*10y>|M)BQite4Y7D%(n^} z?_TJ4_W^VsbI|;)Li_s$9jDm45r-?$>od{#tViQ}4BclnSI0W8K=c0~ny;m3ymp}R zD!V4~+%|c0at_-62K3xKhVNjl_oDy5(fTO6HpXv*_B#fx%Qw*Ta5p+mxplG5_UQh* z4W0K>==t#(x{r&#AN5lcjmJRryc&bn{bDq4o6zU?qWiYU2Qf}tbY3ITexE|mm9NqF z@~)3Kl}&a-=lKAd*LTtRXKhH|Vf6kD=y(gzIDd%7Is3yH?>w|VyQTIdH1DrrL;MOo zPs)50d1;EqbvWAJb7(xiL*rHQ<5+iNv<`-%{Y^yo#}f2h`!x9nI-i0Y<6NtT*7+sq zxpFtU{<-LTE0bTK`)NN~hlMspe(Is`^+ET?xODx^bp3mDzFC_iF17Gjr5#1;6Uvhq1_CxFFE_7YbruO>O{vGYV*yoYYI_Pt~(Q|b?8uypc@%EzUc*!r~{*`zs z?J4McyU=}*|I4r$Hl}?CTJI~d3m(B{*x{@A9XJJ@?^e7U_oL_8sIQ|=W}xv}gZ94* z%|m8e%)dUCpxqCR$0)QuXW=GXgI8vAzJC+-_2;+I&xPN`J{o|=X%05U_t3bUxIMlwb+JDZTIAEADbN2%}pJ&l^ zeU9e4(9iMvs0MnDwnMMqkA9z)q4W3=i(uhj!ZWZP?F*8l(Dl8GuK!!?i}`+y@75r+ zeioqf{}>(bFZ8`?zeW9bMCUmeGx!9Wmp9RR{}@Z+j^u%KKmYG>|1|Xd%ILXqC3;Se z#0)M#>+XFt{#(&~_g88c|0AwfL(i?Q=sui)&VNyI3%ZU&XuQt+GyZH9*Q_rN7vICoyYa)`{U7hJd5VzO?3Tx(Qym^8_%DPzF!@k zM@RJhxf3(^4mz*z(eLz$ha*2V(Dn90#~p^Q@4n>hbpKT}PamRjKA5hTITG=_5Y2l_ zbbsE7O>kkl{xh2IbB@OI&Cq;Yfemm1x~})o->rMldOYpFh(jH8URPrVN2T_oXdYic z&-t}zU2aeJ52bdoV{yF_+E24&FLXUOq4hljt>@R!@4!~Hj(4E*&38QFR0EA$J9OOM zXur3j`)V4Rj~CH(eT3%oPc#puvrfou*GK2y7u(}#wEov%3p{|P3B8vD2pvKbq->H+vXEp$HlZkr4aExfj$N_$-mqXpMa7C0D|ReD z#r|C1IrnTfA)@d5{QI1blWWd7cROXy%$(iD-Rk>(#z4)V0;u_P0+jvpq2hiJ%KjU$ z5Bwc!UCZ3PzJFg`1SNkLl-!$8^Xd;{*FEa{_otc0RZ#tNKU7>>pw^)#^_-nya2ojt zRR28$b^W~$H4huqukVjzKdAU-K=orBYCc^KJ@}mEzclXGpuRs321E6KIh6eipzJ>g zHIF}nBVn^W>-+O=I#j=}fSLyvTmCMn`S%jky!r~xf{hxwb`(I}hgLz!J!0GfHJ^Wh z>UXb^Yu6B{eyD(oXB|{~UWU5A{|0rx>e{%zzkbYxit7}p_FMzi4;!K4{{^a_2RCtX z&xe{v%b?=A2x|R)398+D?p5EvZhAspFN>h=Gglj5h5gCz*3{JxgtA`-755rA0zM71 zVdK4Be3PKYZ6Q?rYoX$O70S=AR^P3en@@A0`sWHLx#!>jxE)S{sr$HoIU36D^-%q@ z1xl`QbJxC+Q1kRCs5l>hn*Z-Wtz+K4t{>;a;p9()YVS)>_x(Si{Eu!?-+#}FL9P4O zLESgLg@a+A{an8!Al< zhKm1tsD5d&zndQeq2_-9)ciWu$}cl+fV!T)fm%;eT01*!pw^9nQ2n0=C3h~={J9>M z!_83Fan=E@KP#Z-&-GCA_8BPupFz!^-P^eO?ojh~BGkNC1~pG_gYx%0)P3d;t8aXu zlN$=v{>4!1-epkn+yk|~Y=s`Ie~@ecVNmf+fRbAdrN0hpo^67<|Lk#aegCFmnnzop;%j<{i+>1|d=xf-7eK97YmJ+r?&B$ky7F#N?LGo(oKAx3uiK#F z+XOX#e}`(%IM4NKIn;G^Ez~^x5GwxmZQXi018RL)4tv9kq1LTepytI-a2RaW&e@p> z)xL9}%HM*DqfPtz{`W%qL(P{nq3$;~L9I9Iq2k^KHLsg@aC(!VuB&o57TyfU!5vWJ zp54*esemoXpA7ebmqE>sTcP|vZ~PMKKGFCvH(uSL#%Vg#JS>IMI~MACycB9aY=mm} z$5!8c?f!gLgyq*XvO2+pDvSw(JE7Y3p|O5fH$GjV%Ev*qZ;|CsgzA?Ypsvs7p!|Gn{0+)a z^KSM1f9I_o)Oe-Bk#HE)yjlgdUfd1U&Zl4#_%)Q>9k2!5H`Uoc49dux&Kd^j4ae{Y2H|29-Re}rvei!?Wmy`b#O zgdSWBC3gYTx_KW|yZ(fl4^6u}|6QQkIUK4T3!vmyK=t2h<8@H&djt-JFT;kgdAjS* zHc6U zx*7I^Pe851e?Z02F4NtQyFv9+f$=1`H~DpzzYnUP-i99h6)KK4Jsn3u^+P38|DOic zzH6c4cm;NcJD~ctb1!!tWI>H@F;ssZ2j%xHE58D&-yg90tx)a#9xC28y`8^-Q0x74 zsCmB#s-5RU#qltdoo!aXPaiiAdO@wfxlr?GB~-uP4K*GgL5+8tzAoP#jwfFPC3g>$ z-;bfL>%XApSG#_$y+fhO%c1(=T-Xyn1P8$FQ2mwK->vH-q1Ky4Q2l!@RKGtCwSI1e ziuW(5cBKz+^Xv$?7x~Me+Ib_?ec@H8_300&e(5vN_4g4__Nt)z^K7X29)hy_5ma1z z4|47644ac50TtIYsCFF>W%oLm4mU!@{|D53Jan+r%Y~YM5h%ZxL-pIkQ2qQSl;37U z90x#M7e!FxxE5->pMqK^K7)$8{!llc(xCc%3{?Azp`HWQK-qs9=E1+9=3#i4TYt}j z8RR#^QLw>q7uN)+@r^>&UjTLAeI9E3{s$Fr*AcEirbCVA2~c{E!TsSkQ2y#?Ir&~t z{S$`jzY{IL4ys=_Le0Y+(1V?_U3*7ET^~hI{jdb8ofkp%|Km{W?PpN-e}h_w4j$>A zJJX@^DCtHUEpD=EKoY?YjV~Up7Gb+W~bQA2{0C z?+G;?h0t#&RR67m^0yhPy+6Xf(93cD4>zuaYS$f5^X3hx`MJ*+*FSxr=64}ff2@HT zmph@>@z3E17#i#RE`sW>OQGU@3Tj+Fhw6|0$GLXqK-rlKHGj{6it`z$cK-y`PwmFL z=kW=7R`7bg6|cnzFL z{&}c=Xp`&4XEfCHTne?$oC;-s0~`duhl;EFR2SzgsQ6EXBjH0(_I97<+MN!Sp9#mn zlc4Oq0@cnxq53;C-LU}5{v~i2d>U%LG@Rl3XE;>9ErJ8#y-;!fXiS^w=1CMv{}!lu z{TR({xQ7w;ITb>cXvc0B^s ze_uf9H#oxeLszKla0=9QR|<7~oeXvTTw&$wp~h_s^x)5y-+zv4e2+^T^*} z`Q~%oIxrM!e$0dF|Kp+N&+Sn2af{`5pXaW_RH*V?D7~YguJ^UZhoR>E7O3ZsHuIgm zbg1icmT@gqe|!W-!$ZPuyo%ry@;Afj@NYN{PS11WaW&NX{tj#lo9DZEl?gTe1yJkn zTBvz^FVyw*uCYmh)9VjgQGNte|Hh%@PlsA>?u3f}Z8#Ku2X+0XN8C6^p!)wjsPVo7 zYCdj(y6@C4bmKb+%Kt2=@>8G(ABSqkM^OG-7diHT>en$)&*P=ggU3Mi^W~O*#PaV$ z-Jkz}nm2nFyZP1y>Ux_Gwf>(4HNUTcnpbaH`S(!suwK-$Eu2JtFjV_i8*ef`1J&;z zL)odnz>W8zQ2jR#YF%GxeAM`hF@2%y$0*eGxE5;M-iGR*79}n}7V3Ih3Dtl17(apP z=N6@IeI5+ezJ*Zp{TQhJTniP?eQ-bc9+bZy;BXi!bL}gK>bKLO{9F$;zu&O>zo5pw zP0Y1-qA?0}9iIR-j<-SGH$H{(dqBCnu7^O4TRv1A$3b0R=R@`5dZ_!|M^OIvT;$jr z>i!dfYTwyV?Yb6fzC8-nZ=XZmciL9CcI86N|MQ{d#jQ}|yBK+T8uto&D~>tx?b$9_=#HXo{etDpz(gqqKrq3r(*W&fZmC*K=N zelFB}T?G~I15k2rK&_A4jr%Qj>sDVVxfw7UR>JY{L8y7qaEbHR8LE8~j73oWek|Mz zUIq7tw?WN=N1^87+fetL=1ZOaXsGKa3^mT@LakrVLiw$?%y9~wNd5|_b#OZz2Gfsp z^Q8h#Bfl1E+ z?dpd^t(%9#DeyX|cKr&~-#w0T_Gd%Qzg1B4>K4nt0SA)*9V*VgD_s99fEve@Q2l%p z)b+R#>bde~sQzwwtb1-vgPQk)p{}D`sClx=>Tid-@2rQKXWv4#zrk@Xe-La!z9(!9 zheEB}V=bQt8pJ5rP~-iFvC;8PuNBlfd#L5pjs2kf4Tl=<@vtd8 z&dOKAX5=r1nm0E>T^}2u=F?WFc5a92@75pMkl-WwuH)egNnZo)Owi(b^XMl=I+}KW!LOm#siv#kI?)pHKZl}8bXazm; zAt*Z&tb8t%UKLbaXF!enZN|+|*Yz(@^SRAwZXRUAqscFav*B-0^KAO*uD!>??&Pnx z{F_kY^cR$!4rjRWnh4d-W8olpi{-zv`qpQ<`&SNByNjUu=OXCAXQ1ZSHmLD$y4uA% z7)mY-)vv2zH+Ub^y74iT{2psu`+GvogK<#x5vcK931$CosBwN9YCio8HGcb^<>qxN zl-y7#e-YyuurK+0pxXH@>;(@z+m%m->hDvb+J7t5_5L;N1HE%xekRm=%js}5+zfT! zIp|y$XC9Q^Sy27F0ji(Bf?6M1o#*`bfa=G&(4VhR&m#}O3Gff7c*maao`+9_{mDNE z2f%t4xX%ZMLXZ3?D8I!}@m~rxkG5F(A5ih6U+DU6I#fSaK$WkCT2JnQny(w7`td`k z^``zsEj-r{42P

0~PmbsCGUL zH9lWKt#b|5x^d|Uo0Fda_kr`F`e_l={pMsi39f;%v(?z(a+mK0H7=823wR>j6J7{q z=L)Fx>|UsLJ^|I9Z=voxZLe_ksZi@zU#RP89@IQO!^$6oy0319{a~vrUArei#gz{= z4_8_KF5_EJ^Zrk$dC>MMr#}iRp5vhU^A>n8d>syjKSIsho>#khFb8Trodeb0+o9}z z0@bgLuW{>AN8?1O`MeBz@NTH<{dMF2pyF+Lt&49c)O;&|8lQ{dMEHQ^8(rt*Iz!cu zgBt&ZPW`D4#_d6<>wFv3_;tI%Jul9L8o%qH{JjG;Zhu3~_YOC@@t6vA zA2=4O9alrO>jkL(+6Lvn#ZAu6aAP6V{pD24UuF5HE&o1L`*y$C`RNQb-czCavjXP8 zv!Lw11Le2zEl%z*sPWH&@)L%Ne;L&LS!?;Hp?{r0jemn%UH=S&YG)PH{Jj>ce?EY+ zx7TgXPY0-YhC^MKVJN?GsC9V_)H?7cRR4c(Y<{~d?_nGZM^PVvvVRNIy08Iio%sb0 zh3R*=`bALJ!zobp_dvz}E!4Wu$}d8l#y&e-BEH=p~!!znL? zTKArTnqNDh;%joZTMu%f){m2*=H10m{dF503_pPKbI3hTegxEfTMRYdu7O$bbEx@~ zdavu>iN@tn^XCRQ5xxe8!4CJiekp{S#}`7$y#PnRU!dX`aKH1r5K3+>)br@8Q2q5T z)Vyi=fa|v`D7_U><9r*`Jb4#t{OdjFpIHYh($9&ztqouJm~Ww0K+ z8R~ku18N*ML5+XPqprLwRDQIv0;-=bg_3_6YJ7Kl%KlOzgznM_=tDyShI;iXOZK(OU14{1TCtbgehYiWEfQn-kRKMQ^2f@w8=1;lj z`-xEPIRdI5Rzdl@6Dr=9q5AI|sQx%)gR?sdDqjH=$0bnnY(3QYegkFi(5GGh7f|= zq1yEkR6AO};I8{QQ2MvP*6=AP|L;MKL&F!{yzL3K&J{z|Uj}u3Jqs1r`%wMS>?ODE z_JSI>iBNK-P<~FZ@{6J7$^B5***2)S>uqxRwoupcAgK8=6H0$6RDZ9A(!UpK{(c4} z-|}S_XF627BT)0~DyXC2L*c&U zOQ7Of0sZR;N^S$xIDG>Z$3B~#-gv0|GN^d&g<99PLiw%#nqw!Z_T)g#-vX%h<9w+3 z@;ub~Q15l;rxlcbKdAe~Y^Z)KH?Fbz+o8tgRm*ROny>r5;pXEI*o^#AsD54rH7{<1 z8lPvOuCGs_+THj~mv0Ld=SZmQa4FQdUJ126JOb4p??UPS4HaL9x160U<7}vTS^?G0 zYoY9Y05xwLzU|_g1a&4%*^43o70v@Bnxw)cCHm{CcQ<*aBr| z&vzW#L$!Yh)OgH<(u+gQ_tT*I^A0GzO>i3g3hI6`>|NLXRZ#Y?hidn0Q0vZ5P~+C_ zJ*S@qRX-o9{8%WzS3%8}N1)oh&Fc4k-;GyKs5rBr;+O-azYJ>LTmlvMCO80o4%I*H zKXCqrLiw2wHGhtRva`l`Gt@Xf3#Iot)OgnW(Di30sQO{X`B3dx0k!^J4t2e5gK9_X zt*+ljK=or7YJ5(HS~u51`F{=SdfE>Az}6o*Ka-&PGX{12Txwiz^`Ahse~*t{yE{V3 z4T91OL$%{fsCL{0H6AZP^}`=f>)QUGxa)j0)Hu(E>Yrs$>)M%?zsB+pSbme`Ke7C8 zmT&f{YiCEO>vtg3Ix@lXVJQ1?D_>>2#L90qJ_+^w@RrqoZTY{gzQt!QzRpng23tPY z7&Wf2`tvM*qjA0Q4XAnZHI%=4pF4Z4jUlLh7!FlG6KWhwpxSi;l>hTBf0N}OHExEI z-)8y0q5SQ)&5c7U)I1nv%!jhK0?OaH#&uBr`7j&^UxJ!vO}=pRvp4KZevv2=e+x=}hvnOR?dDH^ zsQ6|=t#juYpM{#=zeC-RGQV;83Mly-q59!-DEoVS>)O{IYTizO>hI-H>%eN*6Rv~m zhxd#PzjO0C6J}9f0JYBE0CnAc47H9Qu-)xTjfHv+xERXM(@^$*g1VlXe((CL2lU8C zpsv@GpyY3b8n1Vu;{P7XPtzaVdOiY5{xqn5z69GP zBPHbu%KF#iosu%IK7F&hU+w=ng*v4hs8`x1A<_WyL-yqJCFDe zPfoJ47+Iw}^fxr(a~15~fbO;Accbq3Bw5LwLySGBf0Gz5qyA>(j>7J6#Y5c)$~MrR zw<%K^Z*i7Urgm4!5BkH&2k9kixAJ35KB&6^KQkGh7{t*LyZa!YoZ6E)1O2w>o@@R6p~W;2 zop(9Em^L-RW~-*`og({;$rZr^iRCBcdQ;bx<6F~Ri`;?ahhe`8>iST6lNiF(DZPrG zXMMGa^D)@VqWmyyJcZ2TCigBe>;FTdG>14(CzihCpRuy;*cd{8T#N0dlnukqGw5t0 ze*)$6sQ(6A8!fg9e67P)Yw926c$)gD==@>*cL-%)U}rsk{-$ga?LUcg{l8(}rcUWj z5QFTl+D6N z2{Ml$-yJ&*Xj6>37m(|eWTQ7Rx5L+H{2YwEuc(`j+{N$~xC35;tpU_!A$OAL_DAnh z>}MdOv=E;cQJ;ygE3ow;a(Va~LEX93{bX@UHUpV`sOyJ~HrQ6$tUu(xWGvIL*$Dl) zjLBQXeK#_fkUy7WiOEZRcRTNk?H<@vDkX+}(JLh0ba)5$lx{)y7wq4J?e5gQO5K6T zo=Vv-)`lbSwVAR?>I$sidzg><*qM)P2Kjrazt#G?A-o^`{~;fT7s55>^AKxuE;e7l z|8D5tg8TxD^(gA^Ge5UtcQJ8YM7|39N`IlZ0-NuXpFw>gb|b{tkg|2i@e|sVt2u5b zzZLtRaMUM1-R$?l{u|gi0NDl94Z`<)%Hqh>BNnB{tQ|VPj=F)CKgd{YZBhN**trnB ze(3W$k#Z#mKjTa!e!`k^7BMTeft#qmnYc5st8^YboLKkAMhn{7le$KfdC0CIAEalA z^$YwqryWP&b8mDCv3)FhgDJn$`lmU%o3POq{b!)kc4X?Kqx1>oM_BpY7Q;epH9F1y`lX|5-oUeelpqEM63rT(C3-D(z>VC%OHyqCr z?~T^Jt?16NKKmWHJBUZ=FZ>j8o=M$L$ZzEQc>3>Xt6yX~A7XC`K1-m|9q4s4ndR92 zld|^6mROtk*>}qC=KCgejz)JTa!R?x9YbILUnZq7_|364K8MZ%>PxAANC&!CQ9rpTHRNX_dl~!~Ii=6&gB94%$JfhdzaeFhV&gmN zU!mM%uI)f(FYJ6kyh=}_KZCj(u^YB)%GIz>ZvID7|15INt&jDL`$*synYXbQq|<3r z2DW-oKGfPZ0lU4>odbVPnn#BaUwiC4np8HOxPBo28f`e-#_&GQzeDa*@~>g%X!3f` z2+~!^-%j0k#5o(EJBXpw+SeQ(&5_TsSfq0+^;4~_HxT7-S}zU)BGC>`-Km z!R9?MN?!XZN)u>*46ek-X7t8Vuk^9CJ7n?gP26KSKbF`ATUh~o6rCXbh|hzqe}6~+ z94d~t${Vr20o@?=CzjKZDZ~Ff%IC^I$3Twyl#j#KZk(?&h4J|M%-ZxIWly4a5N&Qt z`LD?BX8n3B@%OR57>?a>9BYw13V+3vzX%UT<`Zm8z|Ya>D!oA6hsfT`5#{*8Y`lfc z71&OvT^As`H~DL+n`-`!#C9X>9Ypz^^y`6~pT_YlN09!YZXa~sO&XJC#9fBK;rLo$ zf}auF*__uy{y`3<>Dc*9`fzXT|AF6AI6gt|A><#2mm^nb?Z_gp^aip@50KBKE{x7u z_`lW_^IL5C4w<=(-;I?2Zm~^I8qXWe#yQp(-y<`Q`o2kRdy;k>X+B@X$L-WTj9l1s zXVP!{Z`=~;2g<*)x&pHsRDQ}yhS_=w8`oj)B+K{4&qLJbVDDx0mQ#K?oI!pB{jdhv z5y*Ux|9#+P@EYrr>)_q^Y>7;ejsPxU)s1k_J?3wX?J8kK&AzDl{zsV zi>Ut!{*LWM@HM!CvNzE^*7|TAF_hbRKhBk|#Lv;3-+}Dca1wTJO7i^*ab1m0Q|#?w zx{uJlz43hwI_rHaJfBkE0l#ygQZr(Wa(*mwdD!h~9G7tHfscCDH?n&(Wrxzn(`fr`oGZ<<_H;r2 zUS#KE_kCnOB0n0r3Sua+b_~Q{S39pq-5B)OnBQM1zm4ND?CwojLu9vEd|7aR>;|d3 z`Od+{N@841zg%o~kE3oY=WkJV3iYix#&JyNIM?*}->LbjGkv|v&Q)+ZKF+5-kD*(Y zR31k6Y|5YJXijWj!`9Ttkbi>Mx=_#7oS*h3o(j%SAa@4+P(+{KL|LWTYhZE_%FpDy zfIj<%;|*+FM%i!9%uathQ1=9Olqxw_I?2KRdp$Ajj*VsbJQ`oA$b3p{^C=I~71S#Y zrF}|YQ1=pYXIbC1p+C-|eMfVgi0&3_El2J?n*$-^@052TmRZOvJ%^2tv9T7eMK4Id zVE-7(l+HnCw#kp={C;9g<0!S5MxnnSy3b*EBb))>p{yx=v<|rgv2`_i3gJfL%Q9QO zasG6pPH7uDpCQy18;d#Lm-A5;cR9Wuv-qxd;wcTW`?8hw#KvTNDS7CG@bNCbF0uaF z&0^hP<1oP}`88(a5oBL6f3s=(X7ukfJ;^ETo5}B>UAH6aA@e;kB&W^T9ZSKf$lYV@ z`joPD$X}7Q66a&&G3BRgY|gKR zZy>`zyTbo-%__m~_@9K%qZ~onow)Wz_5W_kdA>Rx+rS-@tonZB2EU&U2_saVME=!C$b;HKag2xbvGC(PRSvbJ&1o8^4VtRW$W)^ zxF7KxYW`Xg$Mwjs!B3b&=>Z$B2IvQ=KPQi)vxws;*jmE*%^dd;^VR6wU^aSko=$m3ow1dP4FBv`${*-o zLH=~&IMiepQvM=&{yDLf1JSuz_N;w=0Q}jE?=UfRf}^Sblm5Gbd@J;nn%LZU2OCQD ztz74q;U^cJdN%f{_{g(=w>S#Oy^h5^U>MM@^g?$<$MY;Por)adX300wsD9O&t=wz)2#o}sQU?-2*(BJmsvfh zDQh^2$v2^{9&ucT&Uf^~CA4id_7BGQLSov)u^5@*97@BfdmX;b(F1v2K|GDIIS;)P zka^JL(y;v*b(zSWkNkU1Jmp4gwKe}Lx|n<=T!PHC=3C_>(R~}aA=p0B+NkpN$UIBA zz7KK{?b_4g+yb{zz8?R1614Of+-B#u;$sx`Pnx}3h%H8Ywh+T9)NO@9T8f`M+VB;2 zPqnswZoY2C?{EaS65|=1D|Mppls+f_q&rRd0UKYU+r--S6#5sUqjWZ9*TD|>EFy;6 ziTzS^?0KXtaeGK;XWlH&p^(`UMUhdzqNJo1mg@ur_=ZM~S7-{kx_Y%9HJzAvKeWzO@6>ttem7CEK; zjXKXp=Q`@{fXz7$!`EnH>CgGeP-!AIPQvf2Hb+(VBS!}tJLT(2>#(&4GOMw512*;~ z?vJqfnZ>^!Hb-*|Ag|BQm7cLaXlgPlyHIlIe?i%9*ef=fH?V&tZTS}aN z3$ds40r`>C4{_O)jrcp4{JR`CV($X#3-R$XvCW`t632POSOHJAwyvZtyK_uK_Ild; zAmtyR+Y*`G@%sx@`X6N2*rfl<ENrD?>t19RQFb^o zCt2*zQ1%jKN~4({6Y=#9I!c{6KgZ-gMgMH{I$?Vj{^wEN1>OD8`G~SZ@%JEl|KnWg zGjx^iNA^7Q{%84S#4-_o%cvVc*+nK_!a4uzYd^K2UzEBdyBmH-QFoNZcq_K1A(w~V z5^P72JCP%f+^fWJhWU}c(gbX^AkO+`dkQ=c*&C629a}*<5L-_p+Zigg;J635UX;Cs z?^Tp9$NuluHq^oF8iOd&r-R{EyV#hs_7^b2??WS${7w zQk0U9OiSu7CXOqJw-4ucVW&TBI+)`a&L70a3hcG#{10>oke`73N7T2X&8yM-g1AbF z;Ro_%*c?FJ-|%cWi28;cN>eFQ>Q6tt=}v3>txx$T{OpF_efT(+c$CWUe>1*Yb3{3B zi?2D6OQ3i|wWv3^>IZ>3)HZMM2$=UQTT7n%3bNhg+* zk$aKzUf6C*Jl&AZFViaZN-@W8#L@>JAEMKn^8-!xENm{K z{!WfR&F50i_5UwX3e)a)(K!vB%aJ_@e^uyyNQ^TnS2}~T{~>n>=VzJTF~}<2Z~5^y zJ`WMYg~WFT<#%&lO!*>oM)^HqQO2`v#lakw3_6?m+K<$UaCceJM{z z<_YRX5nnpClT%k@envk;{bKZ#4k!NmP3}qK3DjS2v8Pe?JjZ6@J&!id!G=;B`sqXb z9YEP+>i)KVQ{9>PZfAXaI(GKaSm3W2vL8{t4jcPp^B9vk7u|8xrIUZl?90yal)oum z(x>=(0v*0?mok(1uB5I2of)n=B}SRjhsgYduUlO<@i&z?;`Cz)?fsvPS+3dUtDY%; za^3^oY518Bm0m*UWp|qLwCU`N&mbLV@vk=DFHo@_x#`5V*2+SZ?L}T`630Z22aqX* z@8L`7UHm_SOg6Tsqql`)Hf=bPvAm2JzA;-)n)MO+Ofnsj`Pu6BMD}ot?H=N~ASuqh ztv%Z)+l1aM>aVx92R2{8&OGGWa#Uig8@!b`@1*>EV)&LLO8!&RyO{hqYgb@HJR036 zIi9z+sjM@4_aghS^;d{|CdaAR?uNbAl<$o_rS+We!TBkiH%6u_Jm2DGdDeZ}DAv)`crJVD9u(ucX z_D60QzM511x3#65I;9ox$0Ylu*cyuLBec5-T*dJ#hf*t;h2J=KUc*lmz2Pt&b|t1} zCbx|;eUEb{HiEP}aVTv^<|llf0qFHxsbY5*p5)A^d+{2 zQP=Ve`g6@5kzf3GjMfm@kvd1j;659JSWyhko zmGU8G_jmNq!vCx2eF@hg_a${VnO+yll#W0rO8H0F2+|yjA;|BKP7mUoLU|X?-$Qo_ z_OcNu#m`*y-=|HZsQbcnzr$}Uj-}Xr3E4t)Hj#hY{L1!7WRJoBC7kb%jMDu!o_&y2 zIvl_HuJtNx=hM%#(V2w5dntbooon&`2|li;>}_nFkL<6E$ za(*cOo+6eabd{bkpE2r=K=*5G7h6pGAQz-ZYsIGW=aKJ8`R$zlNSoT@zX6BR71Ui# zSy$|3o9;uz(1HAe90yajj2M2l*qxU9`y_4cZUrA8S8Q!Kh4ys8{xI1j#zU#wgpVLy zO8y6Als<#y$c{sH7P1e(Agv&_WyrQjYTqB!ucS3~Zf*zS8@& z^HTi$mDGRVAh(PoonsF24`9CuM+Q32(GLTVorKNx9IsL~4clkqdzkg}I?6skcN04Q z!`DP?D0M)-1pVpetBATgknN1#4(p@q;dva_pnC>wX@Klp^psX(Q)w&mi>z!ieruJy>$SMXmvO17+7) z45wQ8+w@%#c0NJpFKqXt{8^5LoVS4wTN@=l96v9?cj&k0sqd{q(tFswn*7b2A3zLu zCB@x{7*54TJ{*A`Kbg&A$Zz2MVC?;tq$8OYl+`2FZ?V^a<4KEKb*~cZAm)qGZ}<(; zg~So0L(SLuNn^H#^P>@HK`i@WZ$GGXH|4j`58t9c(Bddhvh^3|z0FSn=qNOV@2-y58`|MwXFeush-#Fr~HDub)|YVCy_& zXX2wX$93pdSbyJ%k5{Sdi(sy`WroH68*S~4Y%V^#VRtH2;%AcnzZY;VatGiihK*~m z`xNC9tY1%{ZmIeTy)&pggVW>C--7J7a9_&GId5-1Wp@?2?^8CH^VV=YHsbWxarEhJ z_<5V-X>{|5sW*0W;W_YN>i?Dj(oFJ7#mGH}?itiI$5v}=?<#B@g`Yc#tpWATIN!qg z{gkgm=Q#K>ez#-e0%DAFemJ^EbFOp*^4;7i|Njf_Y2X*qF%qUS?PIC*bpL^!Ff!CCEmxc_MO0k>5<+iNrgY^7qgwGn>-8 zjDA;Yf!!s<(3ZLz$uGrL19U>@T!Q{{*cn1y0p}NB`!ra9tu*w`$HsQryFc83ZXa~2 z(A}y&vlM|V(O-z(P59|aY#(y2lws{?g3cr4Z{lc&t+$YW6Tf#N|0X_<2CAk!(T)AJ@xu6n^G@)hOnh{7(V+En^JqqFLb9Vqw!ga?PW04WY4s| zeGA)4C*kXJ^p!dxvjEw#$Sgqb*`#)!j_)1RZKN!X`o+lKgl>I~S18{D-CrngMx56n zyWQ;1r2aMRr@{AVo6;dxcMrUfc;^!PFX#-V{zrHkG7mzfG|JwE_n<$*VjoJ~)7F=b`6XpDQr!-hkvDx*jH*o zegbv(;^!*36x*BOaFaU#AGcHYD)BBR?lIUJW`3Wd?0V!MGTCLEA4DvdV7nFPS0k4X zuf$#f$7$3ZiR^IL5nIc#dp|bXL#1Ph_j`B|b!GT@34TJ^H`Z5;=#PcuM^M)fouQP^ z<$M}tuj8i~^^aR@w^6=;^S_b12j9=*^9cFkNJDM_I=^DS7o3LA<;XTc?mW)7T6;M4 z(-G9oxAWl^Yj6C0X?>`wy|9&!-L^@(uM@*Q)O9jlVF5DVQ~njcJ|^D_`Ny%7PF%0U zS=426B&QR}ACy$^18q@y2%RAP#raiaIw3nIseC-~zDE2?O^JDl*`7i9Qyfbu&!!JP zCjNbiX%HMlOkWe{rO0+frnBkD#yq?3Cn1+Y-Q)PWkoudg-49cy)FG)KI^y>rY`=(~ zQ5IW$+R)1EZp4>TDz@K2=6aV+sX}kF#h!-VEadj4j~+GoM)Mk9OaM1YdD#sE9Y~utF#|B`(q~yoduN5rX7z^pPaT) zzY%*sAglBV`5^TmwyPBI+%G#k2{zv^0@Eyt<(#`_-Cr8ZY=w#y-Y>&Y1E!dih+`jNh zbVm^DZIrj+I6=DPZzlF@lGvq~?@Or#+uj@Ga-%*y)JRCe|PKS?uS- z9+YjQ&wC-GbRvFUCw~lnTarH={l9T=B%FtjCB*p$=O>`|9>*S>FHql6uGEFNCc{D4 z9!vQE{9c(9+uqn-VsZEi{CNQ1gOX(SBL<~G97D08G#2|Y(>s{_EacB8zdLb0gv@aK zOeW6xNp^fi{@iMPbtQhzMgCH2zv`d2b{~O_XOMdx{i$#TwjbyGY#Y~m%-Cl1-y^=e zX~#AWrQ4BtihkG|`T8dBYTVzAlwXC-@9@!*`d=yTYywXw^~I^!I3C&gHa{d1LH=*z zZA_ig0Ed*3`2LCGe)^>`I?rS0SK|5#A2*=Wow~-HzmDGF#C#&>`z6KJ!^Z0-*cAOe zk(ti12;Uzf_Zfa#P#&bAl#eGrj)F(x%FYwdpk-^W_zU>l#K$UjVZGvsoy^SQ;d9Of}@oy=b@HpbE3re;fK-k@#+ z?dWehyAi`8lb?ajTk%nejk{^X9ySNwL3W(^o{7)XDF488&Lm$Cy$;BqimwAX?}NW$ z;(Ev07enR)>b}RuRn$p!2xZyizv28{+W$E*eZhH8bSjZaHGfBP{*c8%b;>W;SDJ$T zW!U@zV+SDfH^(G&{)es0Ild;IQ>eek+Uc}-j>Auo2BOmnxr^cP=pKe%2eU7kM=3iO z8_UqyfJ^~Cl^P@0hPtaPu1kseB+8bX?GLSQoHTO8a0qtBW4nZQPYo*I7LL2j=jYg5 zP5r}WXEL!hqwFoHG@0|=>|FV!*gXK>4-wmP$|q1Zf*5b2ygBh)gwK~Lp9F(6kn-;+ z%dyx?$t$g*tS^2`(H~3<9`z?D^?L+Amt&_RvU8|cDsV_CC;s!%y$`O!-hA5sm(`6l zS<9vzM{JeI{fc}MM;7wmbKFH6S`))PwDD%@*TG-WJp=jk$SY+ccLkhB{&nl)RBPKK zCi4xv3A;*{!28kviSsVR|2_6k$4?eVH`+Fsx*)a3*A$LVsZ)9#`SYy)Aj-!Q&k5*v z;>hD%>2&J%NA5Os+PR{X7R0sG`fVn%D>?q8Y#?!NMCJ*T6W+8o=zJ44J~7`fQT`-0 zDky&kU&rHLX@b?aqaPa5wqxKc_+J1IL4F|dbVa5+MAe><}yTeCR!qpY*l ztL!=Kynw&ul&6yq5&P}v9KxKq$mDi|e<5=j<=Yk^p$j+~( zu04m+aSn;U?XaJPp3?F7{E>4H-OH>@<*!(O>HK3W-vIZeJwMQfBViMCM$zwknV*To zwV(AtOUfD}-wORUR$qb5`#5h+e<}4N*4v0>JpJV-V#zc8_pBXCBu z`2GZ2ha=lIsXUjuVZ?U<^-BBVW0Kh&V{I8tnbHI1r;PGnY0p~9?nL$%bcdL%FUX&} zY2ONy-;V5A_}(fK-y~!QbF|>RALVzM{XjQ`wigj&Q|h0=PCbkF2NReF??A6R_LN2t z|Km0Wds#cO(eXGx#B}dNW;g7;M%gj&XDh$d+Pa4Nc^sRFrQGV?#`jg!p934?Pw6r0 z_9O47MvWTHE{GI{t4b=pXx!^qz$~j>7FU_qG0xx6_+c|AXQVf3h?InvHfmH}5s61C7Dv2jSwVDhw4f?n;)P41MP;QC{1!wjuozv8 zZan5mFH)iS^223bLCo`QM9Yf2&UtBaMB7WlL|ay}tV`oiSuAi;5G(6ciP_3X1yPok zhbtnXa9Kgf1%~T*WknT!Vr6mJkcW~OW(%V6@{(|VM6uBE|IjnJlZH(hQM+%dO3Sgb zBwSJEEh&zadEt0GQkqvn0P!W!O20Rfdo$iR6ep~FbZC35B2v&e6pEA)Og^EiKOzO8 zf^cQHkzeGcDZW%MQkkEYs=m*QxL%8BI4aa>CCeHI&2QxQled7F7?QGr>H(>qB1yd! zUL1>JrZ`+yq`nQ8EvrLSz0oo5r8K7Z%GLGJl89zwqyEfMN@L}&JImGZ0!md@Rhc9j zNLGd`iXxRZl@t1v(b9-!QfYa@DqmG;oRyhAJ+R%sacE+oR+HnIXI{8q0Yk?miWkQ! zxUP~1nXV2qSxdZVp;sP@$D@o)8Z)M*nIJbqqv)nGTHb_-lj1TLsi>s8^Okv)#dr(G z7c&zW#U!1Y^5H_w!X>ea0vdMFE*@|WqJ zU(9t-#07_0zYt?1Y8nZ06U%8V7qG79(1P|+gG{3xR z(1=OXbn3$yj7R+IJ$W7nD@K|pIbEiCk^YSX|8+4l-3xhB$LD5dq>so<-?eCuB+(wJ zrZsLvW{+K~WhAL(>{>K4Av%3TX67zsdnN_mbJv0Q?3pk-qGwO6hDs|Uiw8}~o?fd* z;#>&ywO1UjC}8b~FtUrIan>cTbF{27QlufSD$R>j#Ji;JBDfK;(!6LHtFRU{jkN~Q zzw&*@-jXQOI8qj7)^}%(6L(?FpWfx=6|r(|2AVu}X?G5lMhi+J8L8MWi7hFQEg?LX zmtB|&v68Z`NBn z<XyVVBMn|pGXo!w4}=nC|&J*^M^WtWI8ls%lsJG-mVe>~&y=s_f0cRZOC z@LZ^+s@iHOdtBWLCDF>tl1SY;BXeeEW!0rdM|pbQ;l@;sw@6t&J1s#^g+_TrB+h;x9duNGM+Frc2drWy4+KoBsF2iuqoWsckYd{n8z|* zCWqXOJ?gSn zN5A_|*;R4>e!@Cj{Y+HRBgy1+uTi7isNch=YqhTE-)v|4O4u87ksMzl=ACk}B&Fe@CEZ{21WHU$@oDiU=b) zzk4SxOKwZN*Yj{mfAZ`c&Zp_-UYiO#nMk@SdCguL$>&Woe_;@u&*0Xp+Nw%DBI|V& zAx(RK?P9lu_iX2;kXuzr$nFL4z>o_uQA(VVii%i;{|pieahC`!?wPkVkal#J+VGj` z(qU7^FYcK%LyGiLP#DUnsgamgS=^>ZX1IayU)__YiVL%dCgdf;3(O=8EAvXcoCrw&idMxMA8 zUjacUc7k}#@YjiGS$;_sGbpL5darP+`kFwjmFtByqGeUSY3+<5U&T&KVkMJy&EzI7?{Dte z(0{sO&#tPJWuVaScZ;EBKqbZT(2{5Y1E~}QPyj z>sF#O-Jlj$#7h4qgm|oqZ9;!eIk)aXVW1u~1~+OnD%c)QJjA;i_J5|cwWzJWSTvvc zqY2`wwA0y0`wxrL=PmA$p6aN@&u5Ol$k-z=Lc}R~R?!Cg@ zfvpkjyH>H`>fY5uF`n{@BVnfZE(Sm^Won}~9-zJEb18ay&R~M%$CwiM){ZTAr9{{4 zbYf4J+?m`Zi96$c$74~if{oB8?iF{xknZ? zff?b&*+0>2)1w$SMeS5+N(5V|ZpS>>mvzSKm|M&JY5@>kzUbYHKjuAG~(+CAZu4IT>J>!BOYtewSG!q%FmT~Y`5&r<#^ z+-_n{KYMtc27-?BpA`P_Eu9zo)KDEeYJqoE1@HBG+xK6cd93mKU+?yO+?2S}CzcZT zavvyaBd+GAn068BR7`RwEv}1@dvk~^EyuN#{0`O*eLPad+7aUo+3utoYA5I4@j|6b z^=V6D<1E^@clyjp!QK}ExjjyQv)*1eyZ8>Zsag_pPrTLYIV!d1;6!Wm_%UqiVN<*3 zPM^}#Jz{4kJwPN4OkKlK=Nw_`I zZp_YcsKi|j{y@49P~wq9zX z(WXuvCKHp_Hg`hwerRDNVrydJu~>oY{ zt7LB+LEBBzt*9WvT|cMP|Io=xjHMsQcdg6gews`$yH1eaBiP5NaWz8t7a*y8CPIXqNt*SEr{e#bni`oA6n?0k>NNTG8 zw>atyqYguL1TnK_>_INMe`f`SHJP|*-P^W%af)c4zV*X_bV)+KE`IwR4gbie;Z#B)!u zKNj-0)0pW0l-z5-zPaE(G{!2T-2QnaGee1;vfv}$6sBVlGm`!Zxt*7Us3Jbl`(&$nJ>~9~{ zTIp;sdvr}}_6eV_?Djvnt;$NqKU%4^S0#J@XyqSbnaoGw_JO7UwG{t} zPVY)~zjUuZX1HD=+(6+Kh+x0ibs)%~D?T~$jJ5$!H|6$?tsyI1gX z#&=b!H>dRJA{#P&$9hs>v)y0A0@Wne_Lv!XOwk1MKZ)Rr8naWoWzU?NJs~$|;)Jxc zv^l$2rxJ@x;tfDw^w5%+u#oD1_k)#{y=Y#1t3OvriYqvc_D%2GJJpN!@c(A`e>45R zJ@uDYxXNf%Y2t*nHgy-l1@h5oLL-`VPIv32EI(FRnaa@f02|(=HGM>r%1TzD?>Goi zK2s^_5hI?31h=sFJj%nB#XN?R>$^)^;nIS_aH+OZ{2q+vXQFGTz4eule@cmN)n{eg zc7iW<{9Dh`u|%7pKbiVd7SrF-(xp1}!RvOa#~%XWZ{{w;kNXmm>zT$kZ+tpEI<<^% zP+=;(*tae0qCMVXg%H=DrEzwGh$*%>4{)JkLsw^cehD9Ar+S5@|1v%$g?x_3Z6&@e zt}7(ft0<_9=aEHp*?k~J+go^TOKWPR%qc@Sx0|$8-X?@drbO}CK_BV7< zazVK7VkWiJPHn%k`kv^-xw1n3^UI*w`fP8x|Gc~0?nAp;sNF+PZfvVt!8@mOzRel%YV$P+4(zlzk3#R3YAr55%(R!WVeY|Q}s1>lK*$_NbVgw z|Cf75iZ0p3eS4+Xq3TWbccAt8mA-zhZ`$&pV>{E*af72X?a0?o$=Y_aO6A!%Uarri z-4?$8^26XI_JDU@gJiv~=i_ASb;agB1@@a3sb2IFG5)K%|HTj6RdoAK{+7P>on&N& zwpe%wv@NM9pC9wBCK~2{BFR;oyhr8sCad@i)Bh@VP*-gwsPcAgr;Z(C#ggSd8cAFZ z{*{>c9z3_x&?1TLocMkiLt4hyqo3B-agRoDE$*1b^S{2yDJh-Visi@G5My;2(CTCx|#K-UJ*ukvcW zCfXBw85^>^X1E!ah$``F8d!qCD@WoLH}K5O$v#Nd%e&jPG|xO9``>o3SMj{6Xh|g> zb@AB90P;HyzGt4~q1I_)SCCuZKki^8Le^B<)z+1^et9sgbes78MrP2;pdr4Anwv#6 zl-!1KY1H3aVMBHaH)Ed6+?|-m_wvNMQgut*_`2;J9!nX_g6hiPEa+Olx{6otBE5L~ zk0@*(I{Pti;_xv$e;r5LIBtW+|MCaZoV|PdFgZ{Np8LG8ew5;#{(`m#AsB6g);-qO zoU&Xyi7gAi$Nu5LVT8U0qfgQG+Zgpwc&Y!z39TS*v=STJHJvASmA@X=tX8gu$iEIa z3K~-T^e*uWi=?+!za4cAdkt0gNIJ*6Xamy?xV{d;RI2`JMPe%W_G&-IC~%Tp64eo5 z)^=j_9O~8>zRl|YHfdKcEHzdi-9|O57xI2lCOiD_Mz7)w7KV!Gap%3Rzq()9F!^8l zWUqAQ~c0V!VRDegPQ z{Ol|~fDT_&#igKUgrwhksns3hX@q56qIo2lACkkw?VkyH3_NaDHTpQQBlqG~6> z=eiyFa=yOw+=y2KUEsq!*%|FnXZoiS=`;}?0*XzuzUE0O-W`{E7_VbSM_&evnC`i7CQ|R&E zH4+}$GCvFapK&n({V$8KTg#=#N1XN@uavg>mPC=h$jnX83m5Ur3ZBB;&b+_oaC7m} zxaF6`imLeHX~%d=TCgIjO#W5=Ou)3Fk#hx}>yAi(_>$jYtR2$YSO+s-gee1 zt)dIU<>fp@vGVdb=H5b*A2aLJ)8l#t-vjk`(6rY0->^%3w$H1&zI2+>-pgLfFAjA} zFZAYjjCZQ}0NW@{pD=o9`beVjJpa>RuC?}FUYMT(1setAtJ_u*DJ!ZhPHErMUu1B? zx2^bqa&+JBnd#|iDeVXHve2XVV0Y42EDgsO4o>M%kf$GB7I+=_ni7LgJME!`@3ZLV zq*>X+r;XCG94jnL=};VX!X>dfM8{7X=htTCO!sSjjnX`JB0H2u{J(kZ==sh{dCl6{ z*NBOe0#6;ev5j$ zN&YjG|B>DR)=7rOAWeEcZpk#M_ZA0@P}0 zL%ASU%A(7>;YHRx_JyloFRAZX&_%XP+JF8_7S4-QE{SlhqOPl}PHFBw{*Pev3=+uu zWzx`z?;&Wj`{EqK(>;DqWb2R_@ZSY-Aw%W*RP)Z4*Peh#xmyrWSXyy z^5d|W$Bjir?yLGd8dbTU%fu^VEX4k163b$Yc-_M6-+JhsPBxXejk{kk>XLP@!Rj&J zYJdCUhQ8$8v4q#Qj`9AU`_S1Ox_(bsPf$b8|xJ z!CfP1(rPrdap8Xrk>2z_l$9ur&7d90q9G@Yh8}kLG)iA*^oG=OP+Myk4r<4;D+iS^ zepTRq9aQZOJ|N{*Us90PF}-)tVeG6f<(uYuwkqVY#{UkCe$0oUy1YM+wR)m0Dx;eV z*u@RD?DR70*Dr}xv03B3Wxpg6<_Sw*SB;hX4;2{bSk>QOuqz_|k4F4=h`hprdFm+k zf#y}uDm0d+bgT+#!X-^f{Sw?waZM6_@$M#;$@zOlDVi@ex*nZMRwuq0>b_PTyuC4E zImvr<5mR+jg)e0ALabNdG;c~IuAkWJb`!x+l-m{~qwj+1*C#ySJD*&_`rbu&aX88Y z5_f+(J1Z+AjVI^|Pw%0T3KI=N@Izx&TqT1yjRC<9W2{h2q8B6ZmdcrM@~B=dZgLdl7wvsMpPqE8sHC=R5E`zPfL4_|n=JWdvk1ceL5@ zm4cfI|2B($-N4tI8Z}C6dK0*599Y#sJt>WgMVp8-v{w~wKt#0o0ULczIQS}blmUw zNe543?lNrbkIVmI?alk*I+A?v`qz3DW%uw%x-E)L!ZNme8%fA!1_=gaw|jhbQ2_;_ z&DIoXnRdVT=lhF@Tu#-g0(q`J-3CrZ?wPSiq%-vLONP@Y-H7kEu~`i=Y%W^AD6C8F zbZ3XhN7wG2O)JD}lV{{ps>=-xRU&031SmNWUy*LYtLs~nf@f#RAaFKBusgNc!l0@K zREDTE;7wJNxCyh*9`~0Y0+Qp&l3XGwdVtY6bFu(ow0QFC@SPniKXjmOZCv<-*9*+% zTW~0Q7Va6prxR(~x!>WD;;_Wud2>nBWCv#2B5L@uO4=Yj=o&E#(n5TM2V4RNcTiEv!CWuUjZ0 zI@x(@SpFD=9qVnREqY@JOurmsX5C%ecoDNVTGX*T2494z>ORwU()#Ep%~d~wB#4$p z?Mogk3vpK(MxBaZzpXc4`y_(UqUQ5TKwMhRrRQX>-ZO8G;l*l0Gy(ZvC95yjpVOpOshl4L;o#m$rXGZ|3|lj0{`OiJ}B#-bv=jg4VU= za?nhXB813cTXO=OUIxoy6peH0k#Kd7oHO)srWN6k-Q2T!jLro-t>-(l{{T2yYElA% z>dUYy_C>@GSME}~Lqes=&6O9__B0&@_Ny5pM~W&{!VAR$>~bwW%%+3D4#Tu4?UUjxW*!8SWA{=TM!RiE>e- zqKv^#b!LBKN%DcS=%Lw@SfvF|<)$GcHN#Gv7x^-)FmiIo#W#0!`Z+Z;nOn@8K7QqP z=*DF3zwZqZUghBM_u(bX-vwuLJkiw|j?H+3%O!v7nUQjftaKs3a4-#I>B9nuXe*(! zl<2`vO8-PyC@T(_UY%qvtN3ByA>7=+_*goYUyo&%XwFGQcGQU~p4$AH9O-b8&)l5+_ST|t7!LAVkvP6i*N_9+;n`EPt?FD?g2w;UO3<#d0v9gaZjm~-dkiyNIN z7ti9BzW8GG=IlF0MN5tFzkp@HamSU%6EX*BW0ew#t>rK-}&z&{r92${&4=0ezz}dKEJ>JeJIt);P9J_E8jjT}*~mjMO(oeb)&T}q5=0AZtQZBmeJjgG>rU5kmi)olCS z(3&CXW78;(k2Evrekb&zgP3;6+T2F>#p<9Vvz$7@lYK)(S|R^7dv)#}TBQXQ9`-M1 zEmHmWE`Ou}dTN5~#7Gpi88j8v2h;&%J43GGK&@oHCKu|Mym&73$jLNV<@LFIxS$Np zVt6^43eV~8V}Fx93CW2v4O`Lmv>otEBk+R50p=7-+1%+NHr_^!#fPvEY!Qtz@3ZrZ z&||J`ue~<$@45XpvWZ6*CPa(BTUs19dkCJteW4F%$`m1HJU%I`j^8T?j6~OLm$LH~A7Jjrd)SVcD(I2(F;aQd=e_*#=5h%(h0?+hC=X%+#(l`*X_( z9;HK3eva2{t5{BAuGy$axg1DFj)$(k0&tuEMk^xvS?0<~O_ZaY+i5gGd3)c>52yD{ z#i@N89|zAgSHzUE(2_*v!spsaCy+8Dk=kQ4WHb)Sa=lS@be2a}Ok$6Y6p*8ANgF)v zo*Y9!E|^2Hrnc1Y;?E;%e+%nI zGg#$*ivc}%8txdQ9(y1PfjW+Wo2j_1=bpW%i?+^GClW;^Pt_Y~BCK<1+K#GMI$t$R zIkm^SzZ(vPW%`;f-CkVm%L+Gpx-1?rZ?1{rl0uW5Nb%hA;-k4`65lgu)!M^N@d!z6 zN+nwMG(Kh+F!a0v$!=)z0h@G{-923eBZ;0z%G4 z_2Ho&PWxl^w6SvLue<2p+xqMF9RL4iZVThMjwbk1Stew&M>KU?rs0zxo;@RoDg#Ko za77&bRh2Lx?cGpMAf+yn3S*TJ%n)|hUOu(twa6i6_&VtyiAQi-k>9GyKE(&3s%Lo~ zpnbZNOk$^)zSI~$BJVeU?dks$TWT|wonnh7$sHDq@%`QLBE}Au$#A1sGGDn2ej9^P zP63q6D(oBA{_;vBr5a5BHhMlZqyj%Ws9e;nrcN?JZhy( z&*pJ?Glcg<$Fz=Uk7>BJN!xH-3nLsiscJF`HOJLz6v)Qd94db> zLNOjLq z7D;Hw2rU=>PH*j(_1FH{y)I2r#-;ANf8PNKAv--~s$o0AF*|!G^|LPDK}_4*Xq}Yt z%}KV*fbcw24+lh_%JY!mrBxwXLh{+M;k)At)&ay*m#6mfhipjDLJfF`M8l;{_14ra>zK|v zx0@<~NaZ%8BRT5a(#vJ2ljYgslbPcOLuS$`%^i2q17A3CR+f8-%s$ZMPo4|Krev{_OEfr<$TALcYNmRI$O zXuuT?og)rQx2}hN9;M`EIceP-s7f5*wO)cykD*$oqsbKtj2nx!GOUVT0V4{HK9W;& zkHv{(m?SxJRSJwr;3t*N>GTf{SJHjq4&Js-&VNjmOu`yfM(7(Tme;!)zV(Ep(T6C4n{+;RCwqGB(@1&0YN5 z8tm#Vs*K*=_9{7oizctU-8g@B0!1%~>yslotZr8o<7WB5X7;h^?W6Jr6QaOPD_}e9 z_*SHp;Xq#-g?^=@aQvu8z?aTneTH=4KmWMWz0O%a9O7meAwJ?{RPL$BhByVrF;0VW zjGn@ZsH7raL$zHOre&yi1NtB!#?|ZVmzHhOdS71Ft8E{sQVuD66(XV0mnu&v^0JM;>`-W-dbK!E`CMxkd$?p^#8! zJP1Y|RKU3g0o(57r?HD@B)EK7;#x6AD&ZAqd6z|MqQV5!ulUq-IfZqo%$J&E2$%TR z+qZdkBzB=1#8AOh7X7HHBNFo_f{m2K>T+ed4Jd~8BN5l+r40(Y=wn8-^VxH=MWdKe zTb*=6@io+qY=uldo19pbUMWRPr`P;$uDIyyKd7MXF6isrq>G|sUES_D>nCsNPeGXLb)USt@nBZ9YVzaT0cdUb(auUR|w4 z>TDW!ovR6$^OXMX^oD!fjo-`%H~HV{wnzN41!%>vx&1^XQDeWp1ZME7uNKrVxW0<% zyLFvvHP!73IBYNaH(n~W$uLkLu~C^}^AGHc7X^w9DIQ+mkbfn7UY+ZGKRhDz9E#sJ z`Hfv)1ZY7Fx16G425(iVo+FB3hzJ+h2$Xh*fPo`?fH66n)hcKKfjd3V_UrLvK`n%- z1N=t7in5f}!VwGNE4SI~iDz9$kCF!!&Z#iAo4aj?9_<@-BV5@iouNZ3APO@AV{`?b z(BGZ;co&*&giq1c=ry?mo`zjgzw}EST%$;-l}tr7H+$;K!-qU*DR-6xCDF`2V{qaO zCeF9fN>Y%1_^rM*%YBJsfK1=MW~16wpP=JR+HQB+Ze6E3Y^sx|WbxA&PtnVehYk9w zQun%rog#cpL$s(wig;noWx(DQgf#A>efJZ~Q`oKrQvB2B&*j#Ys>yg}lwD=)91rO> z7vkTPIYkU%_=$EPl7>?9X~=Fp1b;L8tkVJR;(di-8ywt(Le1QIP_(mMC$R*2iN*YY zq+?IcCZhM|K_=3f7n63O{rMP7VlE6U_UVsy1ec=tS*h>bsi;=U!6<`KPK1;)iX43G z^gsy>Fu4{722I6f^o)|VFS^Q#QA^7VF;kPbs#EPdkIWdcGLAM;te|Sr~^H(=u0QrE+D6iK@0C<0L{DC`AVsMSo`*~xXx8>O4 zc)){6M1F_rxJ;68%z!yFBsB5QAeV#V1Np@g6HgoHRftl+-`MOh$Yux;8k$6(!NE$r zJ*EXW?!H4L{>jIc?pHIzuk4xB?h^?}Bn3WUR{DeALuY4y-RY1iR#^^=FRdk|&XRpE zNdlXN?!tr1M0zALU>wX7($oKRicBxg_xV zb$(WH#I!U9r#x5~6{Ux9m(p8R#N}fYZh1)^^a)6a_~mrKas~_AxTS^ZP`L1Gng#}= zC<%ZoI77RysF>_Qt2^rz9vmq!A-@UhL#p8RnedS-1`8z5bdj}(lY;9Q2bWB!UUbe=7DGa$kGfH-x1ajp85o&^A{+$(UURZ#c}k^fni?ot@5{oK=PNJE%FY4KDEs? z&tjQm?{xm++##Fs7m_9<3R~y!faMTP#8JH4|Ip`6XQ@LyiO#B2f!wG$Hj*Dke4-yo zNF``!MfrQkHznSzLoIMRJ4^O0Nzz#^m?zZ#c^5aE6IvC81hmLm%w9ZFO4XF4N4O1> zl0d}gQ<+sN_bS{T_ zjsjP?{cCcUzrVD1dEUUgoj`st2Efk7p_Z0NFDycr+oCnA${POOp!JyxdLVH%XHk42 zE^Qiz#rKGV7L#B>(%Y*q+q$4Kj-V4Nqd1YILlQ=GOGoI&F_#Nd@(8s(=6qH2L#zcH?l~UPJoqllUB-Rd`Qba7!Jf8)1)6!R84 zD$P#vV8$oEQ$W(I#bln)N0$hsT$B16vj%)E`ZjVt>NUS{2o?*7F}P%-Q&jraHn<|@ zS=hV;AuC=5p|>d_z1=FZ;VDnTu{IWG=y?R(_QRI&8Ey`}5j=3hd%f45ELwO^!yRd% zpDR0aYsTM{8=aQ~!6&G8q4QoWvlS=V_+Ww7?Oj|ea9;Xyn#bf5!{DoJT2;nyuy) z_d8ElH`af6RnY_uWEPPO{SC*&|+k-nGW|Ma>DkQ#q zP1W^rr*iZ)Ki{NJA1NDk@O}EX*K3vP$2AUJHaO?^Zi5Ic;XXCOJZn5VgVr#ALQg7~I1HhDGBdyjx2_r?xT%13zfX+C%{Re{wA0B*s z@bbaVgC8D96#!Fa+5c=tldGNlv1;cJhJUQ$AFTF1^>+K2O>hl4=muwdC2y(-^-A}<8I*M1m22rk*@2Ug^2TOKxCPR9syrQ~Wp$;^2|GEe zpHUAP84BH6pN%iw%UJjP)zC%&N~$nD98MNe70BjGtb!kh%0i<8(^T^vSa=#*(2D-2Z{o=GteDGbX$PU^ zA33yM4G>JkO$f?HFacB^F3yE_+*X_wB0{C}^!n&XIZ4IBBl1ZM7dL&U^X$>XkL5v? z@IG-4wTMlfXD=GDB#0Ux_vGTFiJa>zy#50S$I8w@{T`=pxuB)SWWj+Ml zBXu-!GVQ%znBRTBw8*l+v+8CLzXm$DAm5o`!5wYo7yBjam||*g5B*0VZR}cAglD5)r}*W-g_yX+N0ircWIC1uj&|AC$4wTo^&=cBt(TbZ(3sAoP(2(yLwZ4_ucWr z@~&KDRE!CjyTBR3_fArYu8ERwN$&$CuSib!h&(eFQAb&}SrqeOb5CzZA(usxzbiP* zb@Jx40eTA=&$~-iK?8D^`^?%01H4Rh#w+AIYKs%e_r5q<(0!p`dvYLQTnx3@mTnkV zMwDLE!Aq)e1Mw^v*VM@IFksw9(cRny$s0aj`euF?YQ^CvIGorx@19%sj=N$wtNJ3; zpl@~s*Z>2oS6a;23Pi{2ATzlcVt7Tkj(H$Syt92awk?4vac?s2V5`WVMXSl%m5FJT z=urHy<>F=aDH8}W@jkr!PUBz=u`2dhE0qh zapq#Jk%ehZ2tsb?HU(E4j(v`2wUU>iUQtXnL&sX5<5U)cD9a*R?1U)qis2=fRE1u- z;4J{LqU_|1f=$YmOkLPfDxV#P2qA`$tVe51;p2EkohC<|sakw3DmD?@z%LvE^B+U`TH`WLsnN%s!1gFj_?l{%6X2m9L#Tg9G8bo)A3Y7lteq zG8Mx1!ofX*moTEhK5E&xZ^njqk=_^P7n3?-I@rUCRiZ$*k&R|{{oy)tu z{*Zv^*W2r_et6K``P<8->2 zmfpBA6X=q5``b$QJr2YYL51Xpp`~3^M@n>9A-@sf(*VL}d}EdS5zd%_gpwww`7#gs zKa@Q`v5~6MdrmjuQRhBh#xmw+20S;UWGiqUU3(0rjs*~V z<<5|$)9+^XXZF80LS$}h5MZ;P%X@-$<*p_V^!;GCV8ShK)qs*STWQTOQofT#PP6w) zaMxl~LR|73&{a$0aZJ`y&-A?GwZN;~YtBH3cwz!;`QbtLSNT289K7My$P)w;j&f&y zGR>-;iKJ(KzEyCDe7>Acgt0$V7|*xVN>X=lIG#V{p>^1uBz~GR*OE7j;8f;;{xc$x!c6%S?y6|eQ z_mT1w{dDEtf9XP&$am^rbAUNV33*T~rw%elE7(PDvmW_lI^~A8x3{mrrOxwmbn4UR zoOntK`ZMV<<#5g zLz>z41~G)j_j)4qW_XOcmWgSp9#{Stre~2>yJ-j_s6soX^{niN; zQlbxUCEl}+8b{^{dV&gM8yW&shZ7YB&tb(rfrS0GGjTOmT+|_dJ3lVar09nQHF-pe zdMWQgHHZawe82_Nxw7b4 zW6hApl_72~b)HA8kHV!6gB`XTk;jv6uIYFht4w84wBYZkuAR?Yacn;K0VAr{>t7MP zSuZQ6%Q#I^yAecw!aL^{zv~K*y5_+(xcCp%M120km6L0-#%NOY9@aICy3Z@`zhpLo zEkvP(-sj-UW_h;e8zNgdXqGx_T$V0F17=UWgAWv8#Zj|#-+I)k`;PxZS?nbq>6s1? z!qo(kU-)#O`VV0XqriBrkOc4#KT(p}Bu}dW*Q^XX&#xnTPeMyY4XXmIb?k_IExPxf z+*iL9HmTsaF)#~~dh-#CW$LUwefHem6+xK}1JY)YSTl2p1)-Tlz}bSl%1;?3!P=|m z8=E|MsofF5XoixisAJZ>3{bc~Ga7c*un#MZS6G)>0K!xcF513}a(C9q1fnN+=}8gg zwrSV!O|H%joikt0xOgBF>KM2lB*jpn*K?|IHtH5}1d&JZ>9K_A6cYh{|w<$t!g$(a?lfNjtfMsWjb=V|O!3 z;5dv|kn+lXP9?jUdc~@)I2=w2YY@Yvk55z|k05a~tP!Ue&UNi0k4<_|fK6@vCruDV zD+yZ=PI-}nvzA`7k(Q#Z#^;o)`Lq*kp!I%!HrDFM2n>fP*>-VE@()D7O->E}M=gy+>IGhLoCKK$+I?=s2K_0ATZYZhTk53MlYl2j*2&mI zeG;~f@>yDFN64{Bx-orueW(e+C0Wrig@np9S0IitLV>4d-W|`)%$%Hqs7i&Jw@+5> z`5HhZkOL%bfyTwTAmCSF24tYm@3M3DpTwd5z%{dL=IA2rh z9D0JCGTel}T1Jvsn0j)STZXmt*S)7y7Os~aH1)(mK!Q#VbN7Z9_gi|jxbquVsDiq2 zjRf1<%cGD|QrU5sfrrjcnSoWs=@`f2E__&3^~TA2)x)Z;y#12u^ybCmYWE3}DqT+* zriWrzu&(_s>U`E2dlVNAq;ny3dba;bw^08hfXaXA-s8mUk%<{y#EUQIf>hKcEMZU9c9GFQdJshN+T3 z!;-{IGF2C#v*b>o=fM~10FH+=rbzl$D4aIoD&}3OEVhuxDlqsYX2P{D{?EXVRaO=P0^Q z`;X|jLuWMngs6O44G7DKt||ixSA0uoXE$&i)vdfF^j?gVS5gnk$GcaIhrLb$QXxhb zp^(c9POZUw*`4JDhwy<||7ICYS&EhDtgq@}ko-3>P0AYXoc-+41tF~FjREsv0jTmY zWQqNZ>!4;>4x;X< zu0R2^f2g;#8;RADk|95Y-8vM-K%g*4<9W6D;-^>7p0DjZYYdGC&Un-1chqzzyxzjk z_`x3}9Ji24BQG}b{6s2&8iKRQow8mE$JiqodY7YWb#S}W6S>+<+&5;SOhjQilJtbA z>G3|bH1KxpRlHx(EuI};pDz3!zwq9oO+=+eV+cz{ct#G{Hyd)*kTsC1d7I8h&zk?} zlV2n8$nVCRM!U(ep;++D*R*Q3(MB}kt#bvgdV5cPJ^$_Zwx+!}oL8#`qneGv8v3XO z{Fn#?t7y+ZBC8al-o-UdP6d3l$#D5}vOelyY2BTa9D&_V;IQKbrnc&!@bJd;u3=tm z>Ii%Wp@j(vsO6u%K13SB21;`x^QhNOoy5&1Rx&5>V)&Xw;-eyE* zZiw~0P5Yhot;PQ+M{a_6M4bE~D{o}lqeR?=04~W4%kEeRl;w`=m>Mh#AzAHYxY6QD zP6mfkd!jQ(TD|P73$v;5aD^1}a5>N`oAR@8N_#6H2g)_P7(*DAt20YRCihugpu7q_d7OMJbiwID*ZSJ?VkR z9OZ?V1Qk8fdO-`_0?1Fgn>RV+WXg=I3vx{n^pZ2e+;3tL(ulhiDc z4{2?RD$RM|q)0O5T?RToC7G)?W@o85z6aaNnT_*cdauk>Fy3Px_`Jn-R?MAfk{FRX z&eRnKocHJ^jq@HnGHX{3Tq>yami0PC@mND;0s#RQ{_u_*ujZb4f8^|C7;T{LN^?}h zmQU>P40lD|Cm<0s?!qT|=4KBa+1l`m_84j*4 zATPJBhId@}@JiHA{9rAtfVVW?)`@v-oD&Fwy?RH$$nm~b;XR?=Lg`*lSX8P#JNuTd zCt>xG&0p!Zw�eF^YdS5;r^6Maz0@$_rp-CKet7hF6!d<>RY4ehgQ-JUHn>lnJ=0 zooW$U5aVrb>t|u=3@kLDEgi+XdER4?_|@l^vt65-u39T-VCvge$!)ld6Z@FIrr~nY z^zeA(aA}9VHJ;1uSdG-h#1%>O**td)`kv)p5K5N$yTm$taPsVri_j5s({?h>rmohChop#@(M2lym|a9OY_N@t;g%& zw;2bgEF4fKABz?k=YS3l%cjen($FJ6%m{xZb#dWe_6G0z@an`OuAhRuU~)LL>~Ob# zYMue+{FJm!U`uoIE3jfYoka<5G&MrFBIxI9;445SKN97?n3aS%1i^zdiMW66E-jhu{xUHFUMhh}Awl_<=NahZ*{GtOk$ zvRdZ+ijVDXSY`Z*gQu}p$TqVsMGhfhb&3}C=Jks2Me3t!biA;u{XDBcGC~Bqi9Qsr zNDMA+Wr}DN{8+$yj59}J#SMSUL6l@91FZ2|#%#fKk!j^bMoNihT4~XC@Epg%U8&MY zAf#5e7y!nU`VP>rhRLb!I%=kty6fBX57xIA63294=e?nXww8>fS9ap$$W^0bGAZoM z@t+SiH6JlUHzRXppbbRM+F+3q8ee|=+l6S`^m~BE7)-to?I-SaEAf7bFJ7DV?es77|iGTLidHNHs zY$RA(7Fu)ab2oJj#hhKcy}k1T?7FU44SO!gUTN|fQ?W-tcVgfhc$>H4g@vDH;d#pF<253&iX1c6d+rc=W< zH2OELD2_cYk;;{U({pp$ITnG`#B5*X&R7;orjvtNOXZ})E~k5Q5x_=`u15&AEaU%! z_EKslovK9Cw9c8-O_)LW*><12N((a3kuGE7(xYy0J&x99rBTY{l^!qjR_btwbKLM9 zD2Q8yZR3NLDrSOJ$Y+dd8>L!vXbDfcGne7A?BUhudm5k%uze0PId$uut}PyVZ7+0 zcP~Y{nf!QRE-=Q#9ifuoEz_3}9h|UkMldf1gHvXx3UV~%^5frj2@AooC-@&HO5hL> zz@+LHtQs+`qdj;B7WK#=SPKJoD{DLKwAPZmyBf);L=Ebb+MJy%wDq+Ox5M0Ru_2pn z!x)4bzFx4KU>(mi*0`;TdjZuA^Q=X$`x;6J71gzxzjuiS&&G{mSS-O`_)wN!>Kr9v z!E+*5P_p8h4QM3KNSJu*hrvtTR06$R_JD{E0q_N9iKqcq7eR0iugGh+(+wy%}{??o#5f$ zij@|)ei`q`E7-XcfNsh-kehrPUhi_m09HE}hK2g{cwpb?;3BBg2j+@YW234L@zusy z=)11PIKA-Kpme+uL0x}G&Q$@p-U?8m|CNq|z@)!Eqpqst4LwdVSNXglt;iBfmZ$Hi6Pz;fo!Qd9~?hI~L9!Z|24)+;VI?@{US<@1-nbc;$dR6a4OSJzmS@pCZK z*b4H)zQhD?pJa{IR+I*}lOh>Jmw(@oqj0LZ^MV+R@#DTDJ+?;pgfMBkdtp(o;vU@DHcjEHD7LyS-I_GZIX}$ zG0AVh)pa8_DEZMC+BLqw7dSVOtdTmF1taBRnxCDOLuW$W)gfpC5#DqYP>+Th$G>i& zCo#2II-Yg$o>(5GUL^BkIW5vlhO%shLoCZ~oTFl)h3-Ze0>8x>ZwE8>;zkgs$fbp1 z! zT?LXlYBW{VE2gvgVjc25%uwOT1MwvwT#vZJzPIJoOB1gH)5N`*mMcB_b384o^ml7SVmmCy<#L=0OIKw zC&y(VN!OcqLda&kI30vK#3p^~{_>gdf13>7C~<9c=o_>K8e5rKIy)l((jpKDyYIOw zE6iRUT~K;%$6iJ;3ST~#Mbgn5Wn2m#xF}%8{x=+%Cn{c8g?7GF%J~;*@^I>?8Kx4 zQqM2iRYM1R`}=cO{KvF9VK$lo3mWqHoUfyfY{jdLNOW$1pJsw19ij>E$G zq4^r`13Qer(|5V>C|!eUAc+CapXxiny$~vM9^l>{36&2X{G*_j+hqMnQ;xUo)A(=C zYm8JZ6PIsk{XkL!EhH=npbjoBv}}6>AmV~gl`z$1D^6#FX9iFZVO9vst&BW-7=jRY z=(1pBbG>pU$5$ld{)!TJus-Ny)dxKGApM#7HS>m`rM|~%4FWvnM6e^I$AUW>@kEL} zz9cu9hF26V*uzrB-E0huqkuK-K@U#DGR%sc5PFLh+LX($m`QTAHm0LT7k{80it4)J z$?ba_sfpRvwLxd0`wwXG0F}GrUz057Dtn2|pQqv_#lMmm8d; z-V(s;o-sK5ph{BwA@cl2T}}XHmC1nh)?}gA z6&MvcjMX`AnCgJX(OFb&Aq>~-8NscbW~;mai+YE8Sq-8X-F(O(ZL47-c& znc8~E8!ere&o;N$>N;Xw{AIR(lG^HDe;-~RFYXO5iOKjUjQGFIrBxrbaC~PL{j(v> zDgKc~R8R_!m>&-+XO_+O43fhQainz8$5Y5^~Rki#&(ul`IHQTwHW9GM-G^y*cdorQIQODP!G_t{+-#ijT)fYd4f55(49S61TM_b5jS*w zCiKhpzuMd~qwnxTpVY;sVju9N&=1{LKfR=uS!5Zo%j`NIp3W3E1AE#ID2w?TD$qv$ z_R2t!GDFEAeRNT#`)kr>JbuHfydv}Fd=FXlVtIeN z;V#g5xwG|fX&#F{N>7z=GKH%042KCKkC*f3&lsK#FQ_{GCBrze<#_pTUiIU`!aR|M z)(pQda86|gk9IJLpB7lN|}BGYZLBjR+;9-VQF z8iABwimRN^hH`Qh8&}GK<=nBbbkcyOXvCM6c_pzFvb8CV7~}%{-0?!=nd*0M6DRG( zb$@7`7&WzF%E-^6=bmY?9ukPtdi=~<;&ve2ZWu0(c+r@#H~$8c<&kM$^^|J$jARvG z0RSI(OhyyZVeTlKcc>m1sq_CC;N{P&zf3QGenasM)n81n{-VA5M{;eRiu4%2s10Q^ zH9uD5?MNtJ=jCAQrZe=%`6LcLjL0~#;7g+4!D2NTlr}C)LHi^|eDa-wQNGV@`uWFA z3{mL#0;XI**Abk^iDIKQic@W>GCs_n!k?Bubm073{C05s-v8zotH>fMWtP>;zvI<& z@ZbI|{fcLtGHd$B_`@0?1?DN?nASl4oy@ow{waPNDvyJINxu@G)JhlA+y|D{Xb!H~ z*lXjc+~5G{#oHL=yj2KT4-fgOD7b>$*$U&JA{w_;B8Bzr_dt+t!>tlR{7 zBtB(rOPH2S!zc!gOW{I}p1N>6VLYsCBgRqYx}(pinxA&qt>SRnMZ@f44$mRh{2CLZlQ}hiBwkNuY1Z8wf7g$6HLK#o`*I z#COw@Xk!^j12!Z73>>Pc0-tR3Zd3^AS&xhr5SGqT4ApyvWD7E|+=o1+l}DNrd|1ex z*1Wg1y@}uwlb%rCy{Cwo>kE-#w`8FhIzB6V=pU_7#OL0|>eIE2+~}#%R~1&DNK&Nh zz{SvW337N9RnGuPC6@*^wk`}^4x>GHDE6fWJLLwXO!Vi|lt0y+uk6Se@4zASK{fj1 zT;!aykqyIK_|h0694T*_mhXn$9<4%+@ZY>$Wz$|XR?ecP(xJ$+EsD{s7c2{4Q%2X< znDR$MMnb(PNyw25YeyIvx0fxhbigA*=&@DHE8r?*QfLXssR{ie%yswQu-3m+7B>qT zmUvy~JUF!MRqR4O_esoW0~@u#w8hMN`)ZZmj`$u>E3nbVvU| zCx|7rWD{~jTYb9TOrvsY{_>->L|&3^A*z)=W)IGFu&A0T#UDss8;;n~ffgE7<~b{@>m+S=3&k#NQ17c8O5 zEt@JcZvJKo%(Odk|KL_?601S*wl|FV)vP0vS(9mKq#lGCsL(p63cR21jcU-)q}$YTgEQL28yOsLAjwr8!so_SG1zFynB)>t?xI`+7o$&*qw3HI-PYG|bYJ z*&CY;#cK}Ui8Ye6f;>UomvrXMq_1EB*24?bw{qE6uf}_zFC&8@ zvr%Fu+$~_MICaFCrnh^*s5~QlLiPiwiP#oF4Pne)?JSX6CtvB=)1}3Ee8O~}mlhu_ zEv5ui)$8G2rS^B?DFtDmSz%oz#OcG&KlyIq_r>2Ieoq(uSI&_(uw;(xNfCapAVjRv zpSmwOAH#0&gTckmQzXeoET<&kj z4Ldxr_$4wItnSH|@J{yBjA3spAy>%JLHllberGcfHUB;!NOt6Hq|2{)&6s4}_86cy+gb?^MyYVB2fwru zm_MfV^zrdB$>apbXpzdX9oof+Ro3g1mG z4L={PK-j#rQr4<5e^74qkeT-sZwmtUJb|#_z3y}4xkYg>fPyG=<^_1WDjQe;(G4%^g7>{`x(-g!v1vgp6h?GvK|a9H4cfK z#!C@#enWXc!P%@1q~1bv;W19=$uacv@{<8%+Uct#k6R_vQeCtYh%0aqUerj70YX72 zRd6k#HXOSB^OFN2?IjTx_s)Rv>WXS92~SmfaCUx;t}vER6Y+plN6o^y`9mOLeY+-k zA9LNeRxk!}6^?>8%)>OUZZrI# zE*u`-?`-0Opx5Si?7u8`&&Qjfv&Zb9Xfk5L02Um9@k($Fm9K;L; zd(3=--!p?LZr3tcr*<5`vkY6g9ZrSMD~5hgcatCE#S)oLe%l+009a_bFIGq7=!dV4~F3t0uZx51&rGeS5ON`1m^4B2nyl+%~S^h>YjVeg*|C2rEQ zU6A`iXvVT3 ztk`5XKMv`tNa_vb@xFhIY|n<%JY9}8e*4-#KAw|d^?%&LkN@)~cIqZ@og)o9S<+ZE zBMt5iQws;lhYJ$12*wC7=rpvanZi9C@~J>#M+TSgD||B*Tt3yd1qnM9=xbeN+r{uc zLg_d&%;lDgpg9o+{oRx9NBu|cXlX8QXFhuB`*KROxXSAx4ai!*cmt?qg|CysXJ4bmd7IzZ zxzkWQm*x#k`+5`YFb+o&Vr4K33Et6mIWn$t0yCXK^o0gEFV`2ssu1u0cv`|4V?&1B z5LU|8>M2Op6=G}X&K!03aH*sv`Jv5uG=XbiQ?kIcgcir!%jxp5LTMbFe{;T*!~~?N z&t{>R>B+%kc~?E)39EsGV|7ew;p3wWdNCao9u?Gon!!;kO>3D8+WktE0V?gzasF?x`@luv~TcbirlltsX|7iTxt6U}EaH zyOZG?HQn})I{W_p{1j2clBv|RZAxDURXt0mYp-&-rUPDmO3ipi5%=noYfQ{3nUQP) zlZW}vyGxa1;GR7p**{Kq=hx`UC)Ye_)(k7+r^yvgn-yHeYDQ-<5>qC2RxODnwP8{l zvTKvOLusIYX=cIaPlkW;Vtr#xLF71+gA(kod+DZ=a8C(I(g{M}vgvr$MX?n&_Zrz< z_bNCsav2Rigd)Z)04^FSZ1C2VLo$#ChkI_KRjxmKemLvcxM#U+9OwAk*kX#}KFHZC zc?AeD_awtGS~*PazF(N%eNSvta<>#VDRKEYVm9!+0&oU8a zTW6JX>y61j53+fE#+?^26CD>o#;S7AV-S@%L0L8>)^7@jyxXYlT2<|=8(`qjJlRQF zD9;vMw{Dy@jTFRQ3CHPVpa*?_%$_UP_mE7Yu$@U!0>@$bCo*??Pu6Fq5bkYq3b=m* zG=kq4bTtYyab&%yu?R`#v;=jXt$*k5K!dYx+Mn!=DAD^4MDnNxsa!6tytB3QS2@TA z4T<|@>K$|3-g>>7hrrtQdDqj#0C;o1gPpC{Pe&mvSTmQWH#}WMkUA4F)IB)ORu4U% zQEeFKEnBjr5aBgbxxVM+!DtylB9(b3SAh*9^Q$fZP`W`$L#qBsy8*p~A(wTG9q#MZ zyh9j%X-&2Um+$&0DLwTs%%eZpk#|pHu2YFo8;ATsrm}pKS7@&m4@`P z@ic@G!XzV@7TS!FTEnUZ4T6Qbkl$xWWa;XPk%FZzy#=f|j22K7lJjbLc!x;Elj2bxp;au0S7ccIB>1@}Z^0xnJ}KCJr96eI8qAmM%Z^ z(&dMDX0Is=4aJ?=(~A$6AMx7NPnyh1eRJ8?!ftK;b!~fYv3qZOeRF5=zSpQ*Z$diU zg5Z|t7uw;Zx@I<%tF;T9)$PX;frP5HAqQAIY!8byEX~jNQ8jJ$aOrb6(*GLtg>}uPYx^ z_=`k56t7A>_uDLF#oYrfWp52J`!p-Ws{|aBq{R4P!!ex_g8bHSaD4z;gKswDV^8`Z z-9Gd6@nM-UE)JCX;?j)QL;ZA%YX4~t2A|Z*MP9+|&bPe^I*Qd~2$}>7_u+US-S##T z?ng)HB&tPvG8KceTe{yipZjIw>^+a1#aNLJ5bOl2$OlH0;#Pwe8#dMh4tG% zrEIBAL{at+8H&HzSk95_kW>IUL()wA3K=P8x4&-rem4FsoE!3{j6)p1zv2Zll+^qz zr6RuYxmhWfEu*J<1ouEaq_MLcc!C_MS58A3y6c=lkZ2I@+j@mr&KO_v3W&0$`RSoD zPRmH$RJ!)_+N-g`hW5hqyXN}NvS>0X;47>GRUa%man!~UnN2I%Q*uXRj&6`ndyPaG zfaM6!n2Pu2(Z%7L$@N2rknJ0VX}?{?609^{lLsq&7NI9Q(;LCv^L;En3@De1kyeaV z_Eyk2Zj&xd0;t3gH6lx-OH1V@la{i@Bxk_nJd$43);T9Ol?R;|rmOB>H@BbbIaPU; zdh0#`x(GJnhF-LnS$)n{r&|3(f9VLOrUEFuFPYPL8~h!9o^E`eJ-zgHOm?ZNhz0f3 zZL*04kj%(_be^Q=RJJ`i9bBL3Y$PgfCk3b-c4KH0F1pCvZj)KthINxSfH-u?9w)>M zxsPdZYD_03M!rlJ#m->9MSUt)Zz*P-+0LKM#dQC??WvV~a|0^3Jz8KMK>d?qA}Rns zCQfz*e}W{hWM-!6n{499>`n5@tchWf_9c`9W2pRRK!Zv9}<-n zj=kctPgBgT>GP9mHSh$NKpct*Jf!F*MvlCh2Dt5QWp8Wva=d7y#xFYIdFuXQULHZsqr` zhSU6KsGi2}YN&Su?C_$q^P|gs#s`il3an0AUFxPI$Pk%hkttQTv$JJi|FW|MS5)q& zU6iB^Wr>&_RzWdFSq4j0VXHL&ln^NFdKt#R|t|NRqUADCG7ODUFToxFBb;Gy7!Vsv&y z=MiD&;OLFm&~{@z0ogIISI|-~TsHw$uxLQmoBhW71`u^tQINGFul3-h5Q^#QCsmWVaD>hFC3NagP zWZ2dU3kD@DPXZTG-SrX3Xw1bHeLA{{ex z*$ic{S!El~%*=qm0?1v^1|R(mT2!kRY(?#FmNPEmiUf3i3L;@lmNBY&LsF%7cFu8x zH*b3=`4PyG`@9dADSI7Q*GwW#WVvSPt+do)k~?*kSbZfZIO*(MTwflaW2t-lfLGhx z6Tfoh4(V(Jhp}9#T4LG0RoeQr$-}vdgn_U>-tX+-&2-R*jTxAP$iav_N*%0MqX8;e zT*A2IXtED44c)sGw0s(bZ{i5nCbb>Z^SnPj`+jj2x1d=f!LYbHzaqN~aq@IVRR_N@wHyCWV5fMm#IWy^uGioW>b;4-NE7(~nW*9aA z9idEz8N!(7>Ux;@^TVM3o9!s$!zPkiD;%k}9y(nn+W6b%tBA$99^0J?#|LggzCG|# zO?Wc6-#1k{9inNzn&Zd*iFxLyRQ;UnobjfnaV)Tw#q$9Dx_!2C`bHuO6yfa2uL!qa zzv-Sn`Df$@`d8=m#!f;L!b2m>%ZrWmUs5iW5lCH^qFQgUJiI1D%rK!h0jKM>{P4HV z>&^dId)0ltz4~mN2YKBOgw2j*CuZFxV&WQ#qh3d##-`@&;)`@wFdFu3R`yPUZG@Xg zjh{uq2Nos!T26NGeOW)2tpx$-oYb(y%UEgAZZo(QZWZ)D6UR;(HE{s z=>^A$sDby0B?9$i?;;<2yyh2 z#uv9!CBZNg5GqM4lgmJ4bKm+NLw}d){Ju=TuHD`g2MzTHeLk6u)OENW7t8jSAUK>dfFq z_^N=F_vnER(Ab58(JL3k;zoRhC)aSk62`#+l_rAxgD!zZ28FR+{>cJL9q_OJ8?|D0 zMY%W#8#^0PKiGqC+~%>>_DZvh-It`(u>&u%t+WDq`92N>#nmEt!;X7t`ufc5*w`H~ zsekOeh5<*mK5t0^xp+;Mf=St^w;8}A9)a|Qv@1WWd zG%PZ~aDScuxCHCMf4_O7%f#Og?eD|GH>w1ir`^0eGyA_FIZoS*O;ce!1!rj`uFncH z>&gP5#sb8>L0@{+t=&$F<4C%zra~;0wD66FT^Hz{I=p|Pp&>?iWDdV*8E{-^K0OXy zDt>uwKIK;DWs^+bSm!6pOQ7CG3-J#}FW@N;MIz*&RBa|yzrY{p0f1BGcuOt=VZbaT z$|82{=1|X~^C=8h|fK6OK2T8UxVQMHUrKP-%}o53Vg|t1JioBfLP+ zH${tPSSzsTKjei|*;3SyyeD}BCmeg+T4CU*IR$7pRg5?{r+A!7T{cMOBrgiOdqns zDFv~VHWPjrFEIxu|J+@bAg-h6@d9B}LnEX)q~7H6GMdXE);Dq3Verv-xGEL`V9cD{ zooOk9MWB&OGQZ9oyn)c3pK2+GgWaq1{arJF^5o7>XMS8zTn{c3RIT@aSYn+}e%!<1 z+;ra(Ndd03l?5}t6{}gFoEnPG@S# zE00}y$-&sIT=x1U!IksR$VXOPwb*2@U9*MKT?py(>^L}Nx{4~qDIIK3H1e+)MRMr^g59A4mF4mo7sU^pTEj_nrqg z-M733xQM3)TR_!%4KYM1Zqse9d2aeb&(iAwZoLtTHq7}P$;TrtHEK*K8~dDD(;STg zt^hyq4wc>@{j`g9rL0e7^$XOn(*3g9+!SJGc@)wbT;WBHT~ooF=BSa6d|IWs+8H7? zH|yr2sZ&J`Ff_|vRfa(mb;%t31`%skPEim_(R^QG9*cN)tccE1$oq>Vu)wBXUM13f zu4t@1?3A%wvn(^I;1WE(EGKZIa)l4l-B!rwNEe>D-*i^?phlw!c3_qih>ED2e|&

%}F}Gt=VF~Zm-39(_)G;}5e3Wq) z?#>cFsCzVC$BCQB!0dmF01#YI`PC%jVFVGgR~9bWtRn+7$=aJwNRAJy6>NN3tzd4< zaeF>3cYpsKy!X|}FeIxPbK_SW^-rAqY60>MH+|9g79~~H__!2Qf&Nx8!{c*vtjR5u z_KeiR33*mMw-MEpJf=C3;ArA4#lo%YfO`d3MchFr(K_K3NbFGX7o$|e;JFR0)=v6RaAn^^3j2Q6pGpl}aBn+CEd zz$B#k{i8bGE|N95RXJ<^Pjcqfa&~|9i>x@6?ys1GrGnERU_PH&4^CjN2Y)RQ%A;gV z)7`Z!tG%O>b9h&49TRSH1zvYN&dhpI`1&`}Swn+O$`^n&>Zmrl_9#{s@4%@ujnl0K{SQrxfvkVz6&G->sSCrcK3A3tk`?;_c@ucD2~ z9+jT8>_IjzcfjK8%8a1TEAj@LM@F-7PoDhYSF{U*%Lk~1pU4N=!kZ2D&g}cIeqP(& zS>Js1m0ZY_CU#(`B@6_f8;13gGQ>!TrUh-d?BkGv7PN8pgrMd4>Vg??DZBGQV#|GhY9dYz23s(aqyi2zEqcr|MN6-;?6|CO8|;x z#YrBxNf_X+*<3}^7^nxR`B)*NSV`K7gLASOwLsx_XUhH?z#iQWY}vpj_2s44yn1Y| z5tG0ymTuy-ymV3%pyPo zMpXaegN{6(Ca)*8XUeNImv+x%HwML4vZpF2MfWS}&+72~)>Nu9FcuR=C^ z;wL*+twFDe2T5Z?s{IVmbMBSNea?jA2HTZ?3k-R;crG@aJVzREp z(mrH)<=dpC?)*AG`^}plJ#H1Y+!OstcW$KY;QVUVl|#c3$YfCvzusrS<{V^)Tbao_ zzivHy!{$jfw&ymRU*Gtj$zS*0{XeHk=$#j+RSwJ@1)aTje6{eEk5 z#jgUu0`Jd|FeL65VvBv2M30f6mU5<7LW}$UO|lIHKEf7`-N2>m4#Y*|MQd#i0wB0h zU=Q^ktI?kIc!JK7%*a>TV`wU6M6U@58>SPRAg7n&o?*Q>&IwO3$&}n#x~QJAF=48L zJyN`D7YUKR_^)_&8J2T%niTE%MoA*{l5BuH6pmIN#<9xdAba@g5`k^K%Tmps?z+n? z<<9FRtZ*XBCdi!}1L~tw%?wn8RQF736xv>dRLaOC{J5$!czIa~mAU|KURjdVOmLu;eYL|O zyq~)=dvIy1Z9vK6!BP|eQ19DlS*3629$lVaUwB7>q9qqw4V`A@G>}ncaAXc4wq_9# z#0i6#rAnM8QzKZ~Xm2m{SV{P2H{n-Bl(O2(nrnNOV64Cd9L`kP%zHw|YKrDG@I&Vn~o?|=Z z>RJ9UU#O+UyT&Bxeq$Xav<1^@NY@Fa`)EF;M71QH?YJY=^26I#jst6z`-gXZLu(4q zc`FIcD14N%pJEjvT`0wNG46Kkxh3elFOKg2CGU!HHM8B>Ue+n9oX4cv{0PHvBtI)w zT`mQtPn*(`BqeKxRH*xUlZf}F8QhTGt60m7S+iuKr9V+DeigAIG=&#Um_e*W24ilZ zozQe*WgH};#tt!hRe3LWGEFWxrEFm?OipePfBY%yYu-t=m&o~$Zr;28$)QaMG?|>M zCV*<%El?cY@Lc;-?xcLXcfa-HpIg2{qFcWHrRCeNZ(2S!_`nl?-7ejq%NF=V3v-d& zyv@WU?&&=^j~^b`_xIC_Ii4g-kirx~xT7m=zGH~-PL}_Of5CODwrpcRT9GO#r#O4)0 zp`0udlgq!oq5ijCS>uCOZy7)hP!EwODa>Cww4RJo5onH0GoI6}?nzq=#_(XZ9(_n2 zM4z426cw4_9utjobS)2f^G*_nLwJr`bWq((FDm`^Wy4oAB_u7C!*3drZSVPWKuoAYA?RHHw)+&OUfAhd?rkXNZ`c)mrfS zoeH>E&n7@#k&;^%Nr~$G?WK2|bQXGMC_4>pC5U968!LxHw;+-plKC8I<}5EaT3S3k z4~G9+D1_94w3FcsWUjZz&C748w!mpRX7V(JjA-p1eoyjMO$wH((J|m8WrTjD0u66B z6B0`Dgv13_fbyE>#t`_Um zCVN!Q^6DT<$W=!fG{n8OB3Xxx)b?!;Q!nne>65x)Ma3b*1FvqsTJL$VO$x@iJR_;R)HKGvBK`O-# z937$Ume5XF=`<`EG&He%tDAorAx)HsJxNh#dH~uXlLH-V3H{l1^-%7*HxA@cGZP>z z?7rGjtGK+z$T6^(lVKRnsXWx6S2M~rCZu3yT^4wXyX#IwxV_jS;M|13}Br2 zRPc0NOy3D!J{UZK%dsjR8zaJVdvi|l+Rp1Is3Wf4Sz#dpe(}|S zn@WO{FPql}Iu2B!gShc>3M)9Gx@h(1Y864g;S>NmGzV=>&^&~k@3w(ge;c`VR{Deo zjS=f}1@nutMJYpwQdGxCwqm6GfQ@iidGIksccJ>Fn{y(9|9qi}D%d19Khu+H353WT zGkLT_8s_BH7#Sog&j3wADyGx^(b@4887`;PHlxVxE4Lr!;JN5Fu?MzrI$4)cnd^Ns zCuX`^8o4Fdx5mA66R)o=qwSPDu90HHS2(qMojqnNXBlm@J(WAZ_|X8-$CG!Pl_moP zsve92uxFM&-ipoIq&uGQn41$`r6Znhb(Zp^@-K~KlKwBw3_GY|EOS00vM07|O32$zq4X zlIi(NNSXn6+&_LP5NO^_FnwX=J&wLviHa4(uNw>|7)P#eo`obVs)?I1&tv%=2UHqy zDC-MXz!Z{oIKc+hK|2b!M~3*qYJ4RBa5NYO{=j-Z6gU5vk8sjz6cwlm`cXL!AQ6!N zxVEs1G`xl;2(H%KWzRtcLA&#W8#sTpahid$ErxGh!eL!D@qSDGdR?B9K+u=|ZD`Q3=>C<8PhYqr>v zxIF5cCjGh5(Aw0WjLD4;ru{_FHl*A5W{Rot&w;9`65WK0TAH~~oM|a!2@wj*Y`q(Y zbV0V)ev!G>B1ODUN4@A0(VNZSn4%LA?UOkP8OzuYcS&&U`bkfF4jMqtyVli$o2@@( zb62x0qW3Bu$p;qSE7xr=(Oxd~rQ|7v-mD8@l1~oL4@0p{f`8OTe>|l~YWyF;%|}KDo^$bO>n$IXh-# z*Ey1En|-P_KT1cxs4F{pVhE@aqcdpCUx#v-0;l1?D${jc>SpM8x60Ek7-?Yp>lAZa`PMTpkex7@#na~9!zd~0RAOn1?34C*_5$%~B;fctiA4_@x3j7nhD zc1pMRZ1d^1W&oOZy02Slo>q3yV{n2j9>aM}ENp9p z$lL(v%Q$KAWc7Ko`y`Ptr%zTd2AX*X@i4(9r9!s_r88&@mfOTf0qAQs_fawjL?1!J zE83LQ&>S)*LN^%YECMhd$;$0J(ocG;P)~)J9IbPyWQ?pfC{9LdBy`i&!PHu3#Xuay z0_{;GgRs2R?TVr3b${Z}^z^xRHs?P*PMgb|8!;Ci$b)f3O>(VO7uAo#$y8r}1HDgD zhr6?4O6# zAtZMMM}kkFU+B6@P&2VBnZgtSIdzTOp}H(%cz2Ey1-JKrdrK7&uJad%TrI{dOOp-lYhJ>vVse5o?5@7v zdbXpn8fGC{$qLxpVRzAQBNiD;G!)MjRsc(jc3sB-a1fKBrYN*z3M6xFJR!?9=zWBj z*#m_(CzgbLaX)_tYcxxpgObJ)l9&=M78sqfIyy0zz^weYhXfd6$&F?Qw+gZwngVY~ z44$p2r=@9u(?HpLp{%=wSK-zvXFqA(yGr@4UEwCWXI_<5kjlIt;(517DcIJ0b4%kC zSclwenwS2ec%}-mjbz55(L)b^sIW_sjBE=80B=uaI|V1jRndysDlllNQ|~J@ex#5| z<>O`+p6bkvL)UxYO~om0Jmn`IF+F#yt=Ee_T*T}QELI~7P6g19OWna0@3oY{rEz)e z$FTna=CZde`qxybD9%$FYpC<%d$cf!e>j2LywssS0Z_M#- ztF)umgeOg{&<|xL}fa5o5V|?4M(PBk_a2&Kjo_sQc1}%bntk#G9QQg~p-j z;PZEQ*m(b2gwRCe5e^r{6vHFI z2{Mu;Evj9~qcmlh(Gk%9aBc8kWXqY8rtEr;D8c&L0u%%2u06GE11h}atVZ&f)6s;Rm`jXI7ZOSX7)!8jY%fap zy1g`3Bm5FSHKFGXdZ7WG9=jw8J!ZWd@`%Ws-O`k;i>)7^jukePZt; zCM2it>=XkPCn^|WHpRS9xi6)-Cj=~6TIo zyRnj`O!v*W`I^dn8?OK?Kb~JS{Nad}_TP8szf$;RMbS9|NhumB`#2Gc=Ll_ z1gNAL!9{X92Pb_e5v;J88G>z2_pcM-aF~*W2TiVmU#ytA@U{hT;LgnG^sv|Mae<}f z<*uURLk$L(urW@RdE_aw@0C4%X4NC31r=$@Qi^OqP z@v5on%(1Ukfh*eUPo(z4uq&!n{2B)SUTR52VPVYh5{9UdL-4DCW7WRnyQpO{Nm-1y zZL|)>@nJ`Ltz9VluA@H1PbQYRd+-Ul6~P6orhHF7d1xnm*Z_`C*KU0$3IZj#n2X>C zb}Dh9{z3?&@N?~ZV7S??tz;KG@3F4hKw(a}7{*LS(i$-yvqj|o$MyLY32^_9Wvas@ z3i%1kzg6PwNf1>|j`q(&4IeD7i5+OI?>>fR(lRN3v>{_ttc3|Z>F%8!eG6Z`uUGS0 zdog;$+*1PFMkl%$T=$p&rfE3u$>a6|Lq8&6V@=8%70%6E5!DHCK9P`{E!2nO{Go9$ zD5&v9B6PU;sM3dA2^RQdz$X$iq6LNLwxhB0{LfgdxBRy-? zN((@5xHn8NVN?%?#K|^xSSvU{CM=C^#=fqy=kH*gnx*A4`4M?6F4#~r4uB7oHL?2Y z88i7Bfti0|>rJ{YpJw*U?+?1)C4leC*WSj1Ztt(+uzOE!Q-ooeQ#2^ZH!5RzR(LU;Nr-LL*~PjUiz$NIhD zf8T$wwtej zX`NbX6yGA7V%iUwa$hBl-H+A5-~@S9*%<;T9lSP>++z#u$e5V9+%57l_{tDDjt&bZ z#ZsA;u~6B#>O%0|-ut)9)%*3bwZr_ zUQCl@+j5gu%+0P{LyMGzv9X6a$NGxdXuy+4lc1Ym)O1< zL8PvXOKqTzRMId~RfDU)uSkcXSKf6(A+YoHIHmy_ACY`N*(hqPm_;mUKZa0Zo0x`3p^CvFXVOeOhTYcVSRO(}G=!A4md3Te8!?30gp z^=Xxln84l?OYG%|1He+XFUCN1j4b5eF}B6;3`i-SWYx;B!>j8<;&FrdkH$NPeRy@3 z-ISm>{&dt{8BK{q&S=(J7a>eeDupJCgx zS9=}ai^SYnt8w6sRw$Rnl|e<@4x2sd`Z z3#UpBQ53bdN0b;FdL)&aRIl1Pc%dT{z3PE{YOIM%GNWNJ3 zRN%HUUfxtthSN*rzq>_+es}Sq8QyEHXY?{Q!pn!0$WUw;S<&juHhWZdB2vQo8Kz|N&NV(HL5)I;8iE8Xr|VrO-mb-Zj{?7bTEW{9&hxz7L3-kbKtc_ewe z^;Y^6x9#Rgnx;x@l4W@rqs>-ZSPaN&&-n4+0tzUzHU*OWjQf1{bNwSCm%FMcuzOw} z{cH*DjNBt5W6v9edF-8Uy(8XMNAQcVPcxiOe6|qKQeaVEcmWY}4aPKSreE$aB?(=?{PK^^m=MbgRNtae917w|*B$WKQIKot@*GUqEy^*L*;mgGq!^A*2 z*xgbz#g@zbkHJFUkdV3<^mS1)H=37nOZm%u5^WXa1cKXdMZf1Vs7}I7}64q5< z`P|vW>$aLJWy8IXTP3a?zqTK}u^`HAmn4(UG$(m`1OwKAGj~Q)J}Js3E9MgmoD2cu zg$k^p=)$~NA?6}jX9lEKcV`uPcwF7|@b7DDKg!tIw%unm?*xG9`q|u@0p@9@(~_DA zpYti@{f8^KEf8OWq2_VSpWu%JWBu$BW3SPUau=WTEWOLwU(cbq=e<_=zFf$+T;3_4 z^S7@ha7|R=V}|GqQSQoL+N{NSte_Y>sEs3!Xn9~)h^8dJ+<$-y#J&L5F@8}*qLr3H zA^B1z2hThmC}8BQqPNou;)qOM(QvEX22JO*rjr#Bl0Lg>la-Qstu*DaH(U%Jxu~gm zYJR84b+6-~u-PlO26F!W4slJoV!AN|QVE6Be%{=9TrH02Y@ApkT_Cb#%Qb*=fzHN!pa0ylr`bVn2W-PIREa~uJ%>; zh!O_nrYvUCE=BlJq&3~Nc7w{g$r_bG za1#2GyI_JWlvGg$Y#mHKSJ3oU=u|>@N#ub|LuO=97rGtC~;5;ezh8FKFf5(&wkGH{h3RBeDFz9$FUu>pjh2-z8~9eE6P=+ zVIXClazHD<%y24`z-T7}7s((eY)G_UWHy=TfB84q0z+n@hN)>RNCptUK8@3K<(4b9 zoa3Bc#mMl@YlObKRJgM3FxA{>9D03fvPl!GTyg-Hxy&KQMs_kjaS&ww);h2vT#r)! z75~L{ExAD%Ar_yBUYeVm}#%Hw#Q`^q|)Ms(ivP^UXqJ0YLLlx$G~`cXB;e9z4Pr8 zUcHuq53i1Ts54<9{MF*k1YK!?)<{uA=en`%WTzD;^C7I8opX?`m=;@Yj@K~jPnCnn zs?V(9K8l`xLr82U=vjk8o)&?*$(ZyMY<`G&#!!-f`puh8HL_UQnxmyC-We(%ay-L9 zEDR6bK;E+kLhg`ld;>H3NALT;DOr2IV){p|mP32(eQWl~nWKI=EkwjY9by4wI1CsI{5E1nxW zkB4U?cFVaO?Job_F5LvAYnx!8_2QZJ=fWby@$N5>K@r9nbgPElKLSw8S2b%uF7GDL zSU**JGF z1=McTw9cBSu^E$#;v>x~Yr`og3}5Lg>Qz%iCqL0!%8Mu=Zg1&2sPx>3G}tcRwl?$g zbjf8!vW>o=-B|bkesg#&miz`;U^x{INSovS&|ASb#@1FGHLpPftvm(WyZy7C`$w`! zSzDIIer271Tn`NoMAVORXjxAf0>t4=9n2Ug8mJ!CV43C?R&HDi!-67slqbW)k(>0S zIuVp`<9`0|z)-d5`ScY3aLpnZ{cwLwJ9HqiXA;Y6SCFQ;tLZ*&UaqY@fA(_q&2vwh zF8dl!Or7PP9yd>3JlooMPTa}X+Sx1OwSKHpk@^~2^CDP%XFzp(?7#|iDt>buym z$IUkz&%db@M>nV;6_iM05XR=N=>sga6_=^&QFrZeb`Yc*>qI@vuxm8&CeZ2Jf<@ui zkZuUWjbHw%*Fb_w&+0X`)2=;bBaefI?8M$?ht3L0aHPwwgezCf7 z>kCD&d<7ige#iRxOaBtri33?oRE0FmzzbfiuQo-4QItv<;M*a$O@wurXqBNeh(fTY z)Lei0l&V=t7#;SvhrIpH-+KE!jiL&|fm6u%GOgSaRZOWjXu7M@TcqTJt;?0g|M#kr z6t;G(=jctiA87M^=}<0~r3nh3OYo3HU1Bm4hq$|E?jl`BGNvzz5U?dZdOYE3^EZ|$ z^p$RFM2*KumFrW(UI($%-IbeadlEXI5Ig6Zhyv+(YvMqa&r0qbQSM_kq``(bV2HzD zWqw2HG(r|zqsY4M20eIq&=uI+R||{@%?44&OsFU=?GXA3RxO!oD!Bnp>&gITb!7nd z=v%3t^;zco6+A`s-7XVNsq2*x73L>xp<@Kotpc*oFY!egZ`J*36OzEd*$1W6|8OrX z>c-#Iy%`9{-n?h36KOXDeY*640l!zTUNn7uy-Vs{PVXS7JU|WH3T}7r z_=1k1Rznnl)59`(6jBkP0~M2>$#AtTx$CBR?F@~ z~vKnV>j#eNVmwkLDI0 z9sO7~Cg0>%7wSPU)sz+{`+`>BRmY)kn<~;QTMF({+dkXA>uSO+br-dLA(yB!#=OAW zYgcLYj5#`xLa0g+k%D)t4vW%fbU^<9=_QIia|DJ}H}9vk9TRzM)opc`u zrov8f0n*Y1vFFjdayzFCONo|0#s`p`BPW9asfghbaB;Cro`q%}@$e1lA@AV0RhmJy zfCL{oGtx*2$H395ayZCS4aJoo3mp7D-{#pUNV3N zVuU%Q9J$vyN1@pue++Ui8hAY{B?I?*4W^%U9^=*|EBWa6`( zMrjqzBYm0ybJN6Yk2(NS!kv@&W^yD{4xN{@9xcu>+MhRm zg`{l@=E@r0ueQ-*QpQJ_!59A+xTjLMaqG)}taVS2b>r3@Jm-SAcCrs_G&hI;W5fBQ zqe*wAZrA0dS({WtuG|!mxR@)qoktB6DtqOE*&{6BV$*O&c_YOWgO8(85k>iGT{8PqE^$7CB) zJ57FV30t}4a20T`W?k4VrffFY>`{2j!o`$PhROeQzR>NSe_A;6)B~0bJ!|1UO4Z== zvmMgGo00(R)QiK3WSiD#`jRGfQXAIUyfoD-=8&q|wt9d^tHaXB^qpwcPZt3zG0sm{ zIxmeVLr!wu6(s9e^=eM|&D^lek}PU1M6HA9GE_1Y7sQj<22)d zr4=!Lt18eVQn1d7n$8V-ZX2OOZ*g4&y~>jXPFQ(xAxRJRc5XEkEI+Hbjs#N$ron|todp%15Ay-{rGph~!pc!0q~0>x;E8}>g;1FP*}DI@B;$D=@gM8gDE-xy{UD<%*4AA=&I#~| z<_}L!-^&3qa{*#x?LoE=K8nnBk$~5zF50A)AAGW+dtO$?Wp9~SPN=)C(#0RmR>PYr z8LIqUi+5x)s*1&goezFR>nMcs)Do^wVOw$HmEtRW7h0ux0^v&IQO$buIfYm7cs&QB ze>D0$(q{3>J5Cc#FTQX2c<{7uH7tD)XW)JQnk`>AhY|ch2A;&A>1OhhiBCG|Q-$HT~ORHJnACl`rU&Ns3_DY*_HGWS6b2QUst3VDvJ zDJ=*e|HT}pQle@?*=s2GLFd^q)2|@*i4IX$#_+^QiTG&PnGzE3ZEr3y*hqjRrCai9 zF;a(%C;chv0kwu97Cw~rcW=do4ewn#+*4s`76nA;{_X`J4 zE2{{NmOs#dX)_1&eb@Z7*RNjlI7|f%$osrOcM&v@DDH6u8rHkogS5np3k%o)6_Q1= zq=)Y654AE=eKJ`dUDk|N+a9#g>pgt%VEIAk_~9cElC{_&lUnN)@1!2>xL;Fj!>IWS z9#^6);fKVc2rdil7zQ9Sm>^r{GssCA39>6eCz%4uX~o z?$9R5-X3Sy2J>u4rMx(MMnigkN|ySdVq0b{(4Bp|LkOPSuJJmW`ruW?nuJ-j@__49 zrHU7kE7NIxTR-e`bzfLAF z(?rdnX+n4f$|*!yd_XE=)-Y0y(wzsGP`Jn(Rh`#`(6pmpi_E=jHhr<2m z2K7c?si|q_-@eR0Jzd{Kj_U8*64}gu%4I+2pGf3W|D0^I@?_&7W0qq)_RaX&Qbm)i zTKH%A8QyOH#8MKbaaZP!mYc+sa`;0zz?ooLiaiu0cMenTehNA;Qy!R}1RM=Sz$H15 z6vuD+9rQ^TxHzR=ToNn4iKa&O#k=tw?7a%uQY?0}cO9%NkyMrt7Diw$;sgnNZ zeoc~1Ku*@a4pjh&BWjtD%V^tZ&aU1B9zF0O6dAXgg);I| z^#-jMt;$uvmiZ;5oYsmND{UTSxo?m1P5IE$|^R^+9TcxSSMvj`Fv}M2Rub*wUwGUc` zwx9tsXy*+`Yz$4hw&81-+4)|t$30+Q+#Agp?v#drb zV4d%t3WCJq(A zwAG1eM2dEgT%$r&GdF5ARo3GL=Oi{^^|HH*Z)E9FLP4^qXclqQ)K3nH2`z4i!I4RVsPQ2%#hd!D^w@JI@g_gK8ZHS6} z%p}OR$cIial%!R6K#q)K5#Rw=d2!$P<|J+^wlU{~DA$2Tm)Ik}V;EWm=}2$+*O=c`yQ`0T$|+8E8PFY>%edQCGvnY>K`+Sstv6CKwwY(6 z^;;0+_4y$eDo#Bl1ph? zoT5oHL`2uCH)fij79X$t+^L?eOpE0_{OO~p(^rwO(C22i@?7Tn(A=+uKcQAGw3T{wM{$GSj8imYu*-Dp`Z# zPK>O3UZjR;w#iCV^QL9KPF*X3lz$z6-}>!~^=7kVz%HZpD(-G2PoMGv6ub%|VH#qn z)BQYEohesuPQQJ{wh% z7eHqJTt&6muG(tac7vW2l*em2A)Ol6I$0AVhAa{0DvkU&YgdvsN$yDea}iM8#Q)L}=R0fu z?Ji4v7aHS=s7FmtFVx(%H%0ZNpqLv&lJaR=j|AH;ygQYnEiU{PPMQLm|3Fg_W}9Mc z)y$u-ov8kwZ^15Rsv{deeeqK2HZk(1g7X(PK5vr1XKqTAXj2QbtGe7V!Xo=uwi?)< zB$Eq+gjjVkgv-`fh?L-*^SCpI?`zdi4OvtEh_RjkM|dH-hKQ`8TN)6#0o^l4&ZB41wbb~6{uLp{h3L$cpA_>W14VnT~U$INql&?&dr))p0x3d`@ZQ{lXn3stW zPgbxnlc<1=D%B8;7?TNYao69>8v8ZmQH55TImZ^ZSqQ&m)Isna#`vm(_?BRn;y#(qp8y! z8Ad}x&Xr`DAPYiIshEIb*cWQxW)(bxLmHFGe+f_9Tt~+8=Iz?+w|QEnhReT+vcU)O zFm(oV8;1*-#PnX60?{yWrIZ-ak{7ctvit~8#vJ?C0R`K+kOMitb z#(5CY4-o}DmgP;HP`DxMS#)XZ#G)MycP_LpsJ>w0C4Sj!Zmz$$AcZ+bu`@hU1kXP#e$xBt z2Sk3e=;c6FXSD4eQn?y%9aP(dR^WFqR{dtfWq*xNGMV2P6njguQwhlR&ket{tnU7B zRC6~3=ih%15gHwqC0;aoS#OS6!uNr5LT()K-qp-{1fB_-uIp z*U|Y@uI&{S=+NBfX7l<&%E&5ENkr;4lvV{3RdGYf5t;L0F$``lRpOO~f8mOh& zy!QIXm(OjK#gDup&oR+V<3b{&ww=g06pmSjZtng#-~6X8*-E#;PjkCJH~E1=-XNP&KD82W zs9q>thg}vOhT(H)k1{EiR1TqcO&sSf5fV=ar%9;vXnE;8LF(r#z>I$+-4?YxOSD7) zR}E{f<{?8k)-(Zt!5L_gFmxgR-YHMF zC7wMgIh}6b@1ZN;8qcu=ap}g!H2(wVAbZh2|GR_F-O+IGH+98;c87X#z&6qK<18>4 zX{!66bH2E2TH(p_>_VP+3n>7sORkEdMy0YVT@S{w}z@lbcPuJu7!O(b|^Ieoq2_!QR zR!;UP6^ggTzuaJ06zPyExItIAqF3L=0(GQLp-Xugzz4;)}mAP`xZa1wwPr4qmyOg?xW5moZ~kB~AA| zSP}tu7Em~{)=(COV_ONPN*N^{)BR%?ZKwJ57!s<>J2hQ(V%0TBRUGZ02oR>RL$hoTJ}+o1NgJ21m^8!$ z)!&9kYdASqLeyeG=`84XR^9tvDUZ76bFUz)Jg!;=GfU@ToX?@4s~}3f^M&LOn{e9? zbi$i+Uj8^=TAniS^CjMjI$t6|!THi7E#>+0!Za|`@n5$$=Lc7h@aXEIe^8V)k!1QF zT~squ;T4nCdR$rW>czV1N%OqUqdwalnte^VttKF6MS;W=BMDe~CZRmkibQUu7?%i~ z#1qPT^5v@7qe?h{<%RUQx&5D(mLGol^ZfsOf@MSe`tL4;31xr(#LdP3ER8_w$dF(x z27@SEM}}|{gysQmBvF%6UJeT8w(yqR)YA(d>ARhctoKavib{|gWl2xI?QI;5Qf0mx z-^nPl$c?d0&T(xTdFF|AHm`XX|9;h_8;caUeLQE6wA z-F@}R%eq2bbs4-a)0pLy3hM#$T9=HkXG$Ga?b{h%xxCb}@VOa#apsP<920#rkue(! z-uEq9!tL|S4z3_2STMx^uYM`f*yTB*8;8N9&*ttb3h!y(pPDb^)S?$x7p-speQK4B z=taBbGHJ}^^I)ao*OED3+5__vWX#4MY3H?OI{ge-58G**&rjh_$aS_gJd??QS&vTO z$W0|wEEgWq!yF5~w8GHH< z$qi}CFHpHy#VVwm$U4+@7XjrQoSVVt2yv_N4o)GhnkkApGDIrIpHYDWWCK4R5=N{= z%SlIBo}#tsjFz|L6Ku;FBsU=_VgdRjScMp*Op^CHM!oHvvD3~$IrY1EKLi8gg_O38 z1~y`aV2-WQ)&YqUBh~)MZm_+nP7Q6^hR|%c`Fk~kcT9S$)A&%W#e~B~$}WPPiR?dY z^LT!SR!dA3N|x5z)CQ74(?!D=Vepq*l4Y+$xHl{MF9u(P&>{bi!bdTGaEto{ZjqJ@D6Xb{W6AgKKi^z`{*)VPh{n;o zE*C_qp47KeaioAa7j78h;7}AG3~{Xa4*AZZ6NbP19ckD?*=sM?88-tq+x+PiWsZeq zAO+K&ayC)x#rhA0D~lo31fW1>+iii5_pQlHn*v6_hun0_<0*fg(oE|1&Z;?;AL~}I zBUlllnd3+e$alnvy-+1)IHSWi-~O=nUCJKPV&)Fy(}`%>Ji@T3yTaW~ zp%Jb^SCP*-L?8AXlr@U>(Z$hdfA=GdQrAI|nWh4hBA6Penxjpf1KRB_Ev|gJ@@Ve}ULcmNZOY%nLH>;&{$|%r@UKHHfGCsMn+T{24%y+!edJy-srM z9p|PE9s*=x$<#}Pm|o!mI4VZurRsnj+u=JLo?$Y^HmufdzvI{B%OJEgN?iuq8Byyj zG?9{CWQUtV^b!;c*0uF%k;FeA`#CzrEjT>5a}MCK5Dga&Iw2!ScB;=rLdv553&6}u zB%a|RtYA^>hS-^!9fy8ou9oR|C8+d!7S7M%L|k^sMd{!cdzI-^1I{&Cnm}&DDx~Ti z^K3PjH+Qc$j1yDLYtSN(#8 zvJatPI?;t0_nREH$s`!svb^r+-j1E*EVhRD_vZPVjn%F(Hez(nXmZQENJ2Ra1<(w| z^k7Q?;BsP!m*f$`+cq87&p~eFdG|{g-LHp-0075ti3E$0B;iTsZ@XQ2Q&z9Oz5u{4^!S$`nsp^T-qX4h6_h6m&?1X>yUPc=E$# zIqFlB;WlTx7d|X31MZU7d0tBzbO}WC!Wj*B6O~WweS3>SeGbkc1Tq?T;`|z=y7CZv zG=pg|sLgoufi0-%Fve6@6fZ?!M>mFiGudcwCgA+dm)ye$B0iM>>PqK*=*&Z;Dq!43Vi zP<|1T_3Rj*?)7vdT2vxGPe6TrS3VB&KW&`wc-c0OgPiUB%wZdAt3(S;E3q)5@d789 zS43^r!17B@4!?GG?Tm)YerqI_NX{juUw*zrMi~>S!3`ZY7BDQVm+lQh+%%LuCIa? z!QRYHlbBqV;xwwDCXc|W;|s>xO;ga=9Jn1VF}5sd^Ruati>LiAqrzvjtv*&Aq@F$@ zCWP3<1tIEKU9;)RN`8_T{~M|qWf`f{T*RF$E>d9?IW36xtL?_m0F4%=VeyNkPyt#x zpTt7VfD57m%d8y0NdtjzIqFodep5!Py$})XX7am8mMOvCxqEhWf&Y%6l0MHb6>;Xl zCy@b2I(at?kL;l*aV1viH)-I-@YX9$3zg52Ur$&Jh;-y7_MYlV6~g~q?^&5yc_D$> ziQ{2E6=wB}sD1bV+w$LF4KfY&;@~Va4%x)hN)(;EYPar+Sl#K>L-kJhAIc?Jf!*+H zEU4a7_FDV)WOx~B?lt7bX`KJK{-aztF(cLyrJ~q?3D7($EUeiDMpv0zd?qW{mg$hV zGrGM5t&MJt%QH&g?o1%NnH5}S$y}upwpMOZXW6sYPN|b}I#e@6y1XP#B#-xK zw;#h5s(-Y9CPHlbp&CT$SxxC`nBj#K0u>aC&zG&DmMZPdfKAG&3>@zoR^G@OgD7B` z!{pYdFOp6?36h6NW%3Wk&(5k|>NdR+G&DB!wC$MzNI*%^4o|DX@T4`tTYix5z z2QXLMMg`gaZi|kLlTx~7SG}K;5x|-P{gowBEKt{WYJw~TX_tQZN6<|Jr|crK!-Mvi=zCM01{r(|x^9e9aD+3K^6S2b4o8CoZk&fcDc zRXTIkRjF!3gSAJoh}CRxwD<2-yEwe#PFAC732sb2w3c5HWKHXr)nf%zIf}Fm2wz#1 zk?ziPA?5v2_YprS(%80|l`;uSvwKY>R1GGP#5O)wo-L;c_br8#GWv7K=YUv77Cx4k zN%d+FHi{wP>da+70TmvKFqu^0L7mfGu{NOEht}`aVycb$S1D!;7V8oNVpH`-c{AE?;5S-aq=pxrI_XwS(s2-15ngrL8$TL&NHvo|q#At#lPr{3Uh7nvs zDFB&O$9qy~L??W&Dv(9LZQScZC#0^w_{grW>4k4zZB`swU9F_wH0gm&u)~{9-gylh zHZMaP?bf+Dk@3&Y45;!3Bix)Ug|U)(;*Jyf*Mz8Ac{4^<3m}h!K8h#HZ3I5jZF=@= zZufTeo8v;o=+OxTwSq`UZPI3|rK*1Q02Sq&%KLJ7>nDBW{rl^!bt;Z~(?AzUJME1)$l|RQH#=dA}Jn5Q9{}Dc?N4^;4 zBY0U`3G3pur$6ZSEsa#eHP+qM)teeGa(s_yKdobcl@ttI;g()k8CcrGziK?K@4s-& zs*%-+w0f-N*}L3lW^ExQyClu5Mokf{F@BfQFri0C!&ES;aLLgz1p(W3-~g_h{e zzB!AH_!TZesVRTQS#va;I#UFZvK>03zqPbwCLdmmC>10U+Nuo z$+$3la&$1%KL`HXf&G^IFn1PVodpGO8x6)Z!%}3`1{5{uA$yzJ3@UJbbOrKg9n8;RZbbh|f zL`e%cR+YZI2t4cQ*t83jK5o1n|Hflb}4w-8eCu+9y999Q|znpALV% z`}Fnqn{VzlVv*9yDG-iU@18^IpiHE6ynqw)8+T0kl`5H6z^>kFMU^g!?rrgzdq&7< zPdatei7HE$`OvWi&KHQO(YsxFiT)#1&+TU@Q>2@%zbec8*xk9yawd~|NH&Mp%Qsor zItH!8>uHjq-3ttAU&VPekg@Y_VsbJUUN#QPPqNpStHqSzEIet7Xej;G_BhIExJ8OY z>*Da*8IoCQ{{*89_F#o6o+{Ib0R%qQ026b6+`N~wet-V`{D=9q`OW!n=HD=ms!q!4 z*#4TA01hoDqJ+^z?B~u32NEF#r(Wz>)gUWmk1|$7yDDv`5=%$90@zd7nny0R+x25O z{>}JMi>GXtwAinz`HHD(HCODv+++40a1HBec}<*Ze2hUH zjm&|S`2dHKO{61>O?uw9VtC!UhzEKN^6aVMbL$(zAv@)6*;((QYkJaFS2txMnoPH? z#`0HFBUJZP3(68Unax0J#;sTP<+*0-u1tv(^J!1n=;Ykc`DU!SHM3F{X7B7GQj4`l zQ9e&?+nive9hAAaJo*lo4{aB1wrr|t4j$BV~X z{B&VqI96r6k59?vJpqD@Th9}iv{EsZPbWsUGy$?Q@#VopSA5xPt@!!zryx_S^WE_& z@Z{YX#PK-DIK;*7ILM=R8;{1<<+FDAXX6w8Y-McOJ{#*}`2P6#L%nRACqn4J_^Rdn zZL!sV{kiU@`rd;7V4mR7?jD%Cch=7U>Gy=Z{=2VwPx2w|^H6=#xrs4N?A4fbYi&n7 zUH4c`j86A1=tjo&^5NaynL&Ey)RY!dyCprAT@B(;<|!DXVK7Au>;YyVp$O_x5=x+Kl0eE4RK1Dd-Pia?B1oHct)G5{D~UBCe`L- z!`vyDYK-)nV>kSr7Hqfq%iN`VNPOJWQuHsrhG31{KUeN@cH) z1|2v0&(T#C#N{FJpP1|o*e8;{6C~Z#pz#@f^vj1Uym6nE^9(jV7LX&hY#f4b6~L78 zR4j7<`|TcFKXuEi#_bo5eL`(uLS^b#l&=IS?<6}2D`|!WUm9b0YM%oiOD~4s2Hrir z)V*vTmp83*17IDmaP2kb%=cYgSBiVskr;oqr&B(`nC`}B3yE@zrvfQCcRzf;zVZCo z%cpNvpS*e=P^E8nH(p{<$Cw;C@9=E_SBxJ|I?>L%;rWI9)xsh-_;Aq2hX@wq-O=!U z;~ExoN)U&J?^zNjkr-D+MVs zExZGQAj+kXjIJW3<&DhQAe9+4#)TULSqUcE;>>MX-q8W?hM*bm==HTxzpJOs^p+4e zvWbFHPvLIFLsY-$<;uCy4rpdNEBV*C0YkCvBJYq8J5h40>HOdS4KE_gl8P3WhZ`KF zlB-k^aytfN8;r$i+}!j(5~X(gtibRDbLBrf>*uF>NU8gBxBC{8GrHo(%{~>EdP@tp zHwMZ_*j*d#4|lsyF84>>H>Z#B_1eeib3%HUqtVy|Z_AaEpuG#U)<-eY~*n*9Exc+pl=2tNSMG z(5L5*o7MB-Uh}-ye18e)IXG>;AY5^eJ=;A${rb25!RaY1)bUr;JK4X)T+@9s=pR3B zUY^JhJkl-tMYf*PH8=Eecewkt&}`ImXL97d{Xy?!aPigcwU=wp%YrQS7H&WFi1F?l zbRCZyxpUpe5qNk)VksW+gH!nO<>u?|qel-u>n;{xjb9m9o}(?3`_tp*5d`;k=hm%T zKW+C9c{ySiS)-2Fr)|pJ1z!?gxWTrJzTim z-3I=mf4tp45a^-YseBNqBzRfm?9#>tzFn}yL%d?pRIoP2IoQ?Xw_V3;9o}79~^<1IAMZ24BGAYUD^F_*(Wrr40XO4ThQh59uAH!8D|C#7tS~jxd~>$Xix@&tc`uWO}FdO^0VcI zw~udkUq`L6f1X@2>i+JpB;7@o?CLY^HyKfPiNQ3jFiPQHwKp(EmnZue5Ey?CEE;Pn zeqFCNRm;QZhAcQY%H@F=lXM7TA&{921!LoB_j|T@Y9muBLx;fngNBtFvi>aOA%D}z z&dmpR#N~Co&09BiI>Df8mIXz5+)5pwh(E8Kqt$#PbwZkZhAxHOVuVElT+C-#! z)xNxW`E=#S$G01VSm`z-g7TyNlUg_A$W*Bug`Nqle*Se(&iZO+)*tewbelJ8o6AcJ zPnQ?21756v7w4nitEbD0*Hv7qDlT0IyqtmGK3!hE270BMz{+(KSXs$UKV4a&A2G(=a7lq?6 za6*TB{CuCExs=ndGn-Bn!myJ!%q}@jce}^K-J`+MJToIJy5(9^cQYI6(kY|{$0K<4 z!3pP)2#X4W2=6c`~T4WViyNT^nryt8;hPyU%w>5w?EqeNAG zclMz)#}k#ku87dFUd6~qu&xVLx=~#d>xMQ|Tf2$Q8n(%|hdg$NP&)SP<+E4Mg~-)1 zkJX#3^Xm2b>%TwWu}BQcHc zXDISjYuPlpkvPAljnQEHl55AC>i+VVJ2TrcyQs66=}K?zCeD|m#f-yk=esnP06uVz=mmzh_3ChNU;`Qx)^Q>tn?NkU^BFAj`@ zbIuBRGIe6afK@$z)9jxi8cz-x?DQ=C(9Hca(@PrDRS5|M$C8VpYV13*u}m2aUn`*R z|Gv5b3o)@qjtE@F@HQg`3d3Q{CqE`W{-%?9jf@fe3R@)n3Is{4xYWyts)!YVX4UvM zpT6FBzC3M!Zifwa!NJDsJ-AuD2NU&vn6e;~{XO_$yyB-f>+n+|(DBZ$H&y&j)!Gl6 z&$l)fr?ut_IBj1*E$2HSA9&R263t2!p3Rhi1s8w5SatKZxpfQAB^DlTp2x2T%_eG` zBO-cRKx1bfxsIzw?Vp^Ic(w5sVvC{O{-^sNzj5LIN5%IRNu-m3+`i~ZZ>CLma@Cis zp;fj2x0c>6QKq)J{Mka`6UCU2&Ok4|#h;hI8fUL}8Kut=ONF-l4>w4pdgU_d`>UahXJe)(i| z1DR!gfTz8FM+j@|laH$&GPP4fd-$0&n?J05`F8bH8kYH8F(@6tki|A%uBp8fnDAj@ zP}xp_L`zbTv?oS$q0ivtCQ^Lo{vD*xZFxWFU)|b=P>n;elZT{*5Dl5tV(W;bZ}>3S zaZ_3vy#B4(3wJ^_*BuA+6Qsm`ha!^R*&f&AQ8%mv`3P3y=ErnBrQs{NIf^lDi1y*# z%JzqP5KWU#@RJ_{Hw@P>I=)-+YWutNxYu23SIemRjH~m7qPq&R<(=DSGCce@_9s^@ zbv7}=fTd#<|9X8ztJA3ZW|F%h7E((O6+-Sapu>Z%xP>pjFx>dc+LaUs%Py{$Q6ilP zOves#gHlD96yVXy;OJ~@K>S*60p}2OqlqVRp3Q3xFSd`Gm$+oUd6Ln$X?&b4TvC^5 zKwy~ZILhZtaVGn2sT(S_WWxRWi1_&m;ud4^(Mh`t)+jyph182q+%*`|PD)R5+()^C zpvJsVac=Y1NYm?|{CX+nNl1cm+0GcQjgKm`$kv|sp;l)MXLf&v?sb1my>vIe2s65|xlNh$=XiCSLelkQOlv5W zl!V;t1|BPrH-lpj8X56Xdl2)A|dwXC@pjfh3?6gRGp@g7C+@0C55kx}t)(8Xd7AT&|}DCPd^I=LeX9By1EVx3@h7Cuw^eEw@RyXo_PP z1{4f=o9r0!p2++DL12do7sRNv|CEVN5kc(C)Yp(0hjxAa7Tgb3D|Wgt5H^ixli>Q2 zFL1x|{0>&!j4g`QeEwu=)d>N+t%T?nB?LN)c`T?CIz{g1+`Vxsq6|j#+e(b?bJQ1D z0f8T5qn+lMM^#IOk+m!LI2xuhxvqNEBQ;#O!N`nZg`U$=YFW(^VkUmr5|57Hrq|uN zJLDixLtP$!kbP^4W^efD;lhvW&E2g21tHxQg}7{^<>_DA>zY&eh+$_1<4b+VpTwAR zXZPW2R^R+TZ|-lt-B@v+|9QogRNFRdvwY=R`}Jy`yT?>QRU1>*KW|uT^$lxYHqTye z)V2L*&^#=tDrWqg#fdjMg=?c-1eQ}Wdqvf*hlO>` zc11*kxFO5;?1biTlY`QiA~|G}WU}B!ZlRQ`&qngy^j2z234+3>?ZIxJnF)W*sOeLj zu%!C+$_q&G>b_G6t6Q$oBAbWP}KAL3J8= zg|U(~*x~Vu*k`SXDcU5*ihlH(H9lFyTe9e9B(OpL$MiwAMZ9Z)INpN~q znW^{6-%qBV$+06DjUhfO8~pGh@5|WX{QC(;;>kZ(w3cJ8x(8&(v#I}m>S)F(geG?V zSf&nTYEx4N^5f(z^d)&NbXem5nhuih#9+={b0DL|B?b!#PIlecQ)f;xt}u2N1W05l z-Cs!&!bvs-2>VZNSotN`BJNEen0qKR?+*a>{E?#nu*0Y&kThG`6ciMLU4NApmP~3u z#Nn>#8$rFR{(Ng3R7>-hHHgOdLCX50qu{gm!BX4{Tsu`YnHR7qC5k@6GfbmE;D(i8 z5k%AcAd;6tkWL46iiF>nU&(Ei%lDNPR|`-GBR=@bb?Mi&w{d{>_}gln@nh&ae`SN^ zSwS>zCL+$1;XH(6s=R`Rz2-ZKRd|Jr@N(#YL|0yRbw}0Zc8G&t(NowRIXJSG+_MO! zp~Ypgd;6^YsQH^z@HqVRPx{H&fv!I3BN|H`RNJQga&sq0C=-`T?vA%*hJCzXlyg8{ zOu7+&Lrp(2;TfMLpVG0O?3(#Ila|A8Mu=HKLA#Oh0NI}B$X&ZWy`J*jb@tbV)tpQ|4k|F~Y)EMq)7 zjhEqkcF@}rw z_mcg+Y=5ulZ&B&tC4u_!1AgZ7SC11%4Tm2NbB$s3Gs}+F1TD)231v_4b2{nIY)vli z^XBM|!-;+wV(vRyJY_tG4DRsZ7T^09q(6Xo9X^`bR{wZ+uYW9k5R@Bq-C3q?{P<9= zI#>KjYn!~OptZ_Wqr-IF+Oo8acS(OO>#vhj{SAHAkM|fS zcIapi6DRizsUme)^nTsNXy=R>@1C5#kAM0;+}TZy-W_WO+d{TJkKpYbTK8^1@KbX< z!g={&cVVGW)^uf8MdiGP`(!5{y9~9QcYC4%;;E80J!qZ6HdXWC3SAd#pK9W@g?LrU zrdKV)jc!w?8Jsqjyf;}YKZtM1Bh(K;FGK7PYi8n5qT<=o!qRw8+t5P^DJg;6%XI^) zYbal4{U?phZzV-?FiISftfp5?DZ0M=iKyG(O>OXV(xi zkiBGnnVY+ll&enW+Veyf>F)20bDpt4sJJjJs92iD<}ObMF7+Pu7G2oH@{Ff)J=yp< zt61|@=_BS)buDP^%b&Q82EQBY`@5KUwtfb|h7MveY%x5Wo6mEbOB~R#Q4Gkzpgfrg z^%~%lupE9vZ=e4dEtn>zz4&GMjq$_QUADn%;U+V1XV1FpEXU>>W$Y4>g6aRiO6nzR zuDMD&A~)|IJy>W}ieJ9dE+h1qGlub#!$z>aNBRj#WTK+gihKR?Sog6mAIN0QQfK`% zmo#D#-XzHrJPl~VYE4I14anS|d>(^B^YX~9tY$tjp~rOnm6;)kJ9@9m>l_TM2({C|F&_qVp@Kn8!0oK0{t~4P07^WBmUHAuXo5v4#8nZTW9XU{hK;5(c}# z7%aTw9Ab;v>GQ~v<~B8^e_L`$Rv)DyC{RxwNayg|vCH%^1fmg#?w)r%{D4GmZm~$z zgnwKPkMv^pEZ1(+DB@0;6^fIJ4O|pLvymrooqlPmx;g1bK_ax)X=c_`Tfa0-S1sAZ zA}#z3DE@~_6y2}TP{yZdZ|7{v0cdOgU}C|x-For;=hha;3M#IKtwq}SwU1{Bw8MHi zZC*e5+l!a4p0}GYzcNz@xMHj8iY*(tG#bK^RM7>+zJivVXPAZ(YM$Dr5>_i&CQwTS z^Ib<;YdWsrKTHQ?v?kOO1}9G*-`G$UwP!W1J2mn;4${{9U5_2qPlQWz3Ct){swXoI zL8jLatzX6qxr*$QH#d1mhe2I?Do@@FM+VZ}K%jAcDJB|6ZOWLV&!i4wmuT6jS~3?} zY}_n438MFHMfI}sf>r4sTuK0x4*XXJeb`4$HtRIMak>9a6|(r^SCww*upyKa zKZD3x03T<6Ok>vTG|ksjJo&U%ZB3D1ps_d3nLS$yjjh&$Md>=(_KUy^Z+jETyFza))R>X?19AUiz6q@uMD$j4Q= zyN=jyvc!t=H4ySWz5HHq$?+o>j8%BCv5co_r+I6RxcF}AfsQb<6AY)PN^jpXb665q z%qDL6q?k^JC{{!rCB@I1Ed`%%GXfl5=Y;nE^0 z#%bh>}( z(e@wD?S3rZ0QsPc+ACU1*)oh$L{CTN;K&i`eB2uxjRqfMFHlSLZBB$xhL3y0y^o`q zpHK*oE}`Ijw+dCs)m5Q@)b#Syo*44elaCRc!ZsT>Aj+1(~cnw|Iy?%F$1-3$TgE`Rp?$q(Pu1)aYf=qjVi5icLxb~&=O zs__u30X=*9wq5yn8KK`EN-Ix^!mU1c<}ed*B`76|oyoX=8CAQU_jMbihQrD@n{OthCifi0q%}LyHo$OqbgniNo2IV>AfTt(tM=B?6;1N~h`) z`(^g@E+xV%bNF@}X=iT4e_T7f219~s{jEpSeUZlt1W7s-%iG~U(k|@ug*-TfM__*# zaRsVe&pvqOAKI^Ho9oT$=JQ#_8%whw*51r2-9!s}vG#I(^QsOqfVHBiY1}?M?7Z=% z_(k(@Gcv=5d1sIHVz5n6&7v0}=f(-{VLGks2{Fc6Rk_d0!H;86xKZtXFnDZ`uZEE# zwWNe1;|r7y8wJXgz_WmT#lWN3MPk0TlE+L4EX4-q_Bq2GBD9PCqz;FmHb17wd>mlN z&_n&8Mah*k=I26bh=~FtHXrfC8{0iSrna8lKzwxGJVl;cXLG!jGFByXrdG?x3Jxjo zps!=3lRCQ^w_Un=az*>5s`|nD%&Xe+bF{!43}x8g@j~Q{9-7J*YqeJlLu|C>r3av= zfnh8>8w0!TljZJ_1TRUY0mI^kYGc_foSAX`@-(V z4VyX{Lu^PCP6K_}jIZkI;*@}sFgyE-P|1zYq@p<5?aeJbOv_oefP^C!gGxr^{n5~J zaB18o%4hv%0zX6nab)vK@sK3V0cFTCd)VmNL*j=l?FCKDT`I8-_X2BxB0>JLI;-1z zyIaQi@NlQF)E_6M(udC6W!I9LjUlgRLEu>6Sd^4BY=P$*i#ippvUJrkVAe|cQ^Juv zC|Fv`bcHxI$a#f2RReHzIMbc%yUds_DZ8N*edN&;-WQ-X1Ud-dh8@0Lq z15G{Wot}&F#uoo@V?ULt=N};5zgvR;em~S(X2s$~$*B>stDR>} zp!%+3C*$26Mt}a>7J=Jia4wnzKN$P>)584n;?JEs|4cnF5C{Ny#{l3=2YtQcqQITb z-SwyU{u)G@WtHj{Bi*oLPwvHX2diyYk{fAstdieo=Pm`(JQm7hs-SzFfBS;5!H9Rc zHWD8nq%(=ZC5;Nk$sryK#$<|n#h#l<2n}?)8tIgQ!X7#gRLXF<2`{D&VVB#(FMnEI z`u*X`&!m__agpyVRwK^i=C`CY8}@@n@a~_vjea>Ox6vj-(7v3n1x{aB2T+!i z?8yxp)<_yL!}42G>_Y6V`+t>tN^RHOMW{^f&bvtd^%^aGhcSf5++Skp!0xgBX4TL1 z`kN<(kSOVsIp%lIE|!n>_Rd6| zf&AZ@DDHs?$AY;Bw}n{H-E-;If3&oDy4tHo7!tX|e&ZY@Nx>WyRLAkzRx2X zN3mnsY~Sr#+BSu(fJzZ{IW`90&td=J3LxA&9ue7+-GY}*d^{&vrf|UF$G`k(bYR%$ z*qLsQwhx`c_ruY8^V{&u`Mn7wFs114ydo0l6Tj#EC5c;EQjlrdg77)~er~WP0N2aH zudo655L~;MlNGCQo?x(ib%W$MHbumc86a4+8+KL=QJ8tlglWZ_TeNpew7rcRO9kOF zO&g-qwMI-uc1ja^XsD(MDG5&Zq`>jx1YC4w?a*66YObd#0_Utzo?3&Z6cmMuaZ0yv|Bqm~m>0(KgrI0W4?g1^G3VYD1( zron9nQ?|r0#wT(cQw^#cF#v>_R>RC&n8sIVmHdZ0T~DF{ZdO~Vc#^K72KbttkNvK9 z&3woTw=F=EhrzhB+SA8Y-BN^+a*FGQ*yEpwm^J6aqO1c9q&tN zWp1^PNR1thBDKg)Ct%E}7Fjw5Ev-UVF+i^TGLD&JZ+wGkH|)B5w)y%tZXq8?>w7rr zPHU$MOKskM_`Beg`SBzTGUa}3cYl4SA9$IaB|x8a92py2E%eRnH$mta*xBwmYjOAU%5EQ<_mgfPk8&195tx4D-@lahF}wX6y`|! z*C-|$fJ3=K1HmVSzc6WMNHaSzkUIBlQj5hn(#cDn0psJEY>#pM@%9owm;9P7YbUtU zLirqE02xd^pS`Az-Z3eQ*nzxLZCuQjT@Vkbo^as@!*9NH6zw=LfzP2!2${do?|z*sPix+8$+fSMw5 zLnuXCucs{JC{cVqi5FT#zy{=}d=-GVgB{(1BSh6J;edg7%XVo$=N{m>KiP>~NEZL}p3`!MTLC3}9>4*!kg2vToVMUh4hL z<@Xy^)&9$oUuu1$&lWUyF;vo?kmPl(22z?3nX06eB$87rjPmrkb)nKAI;o#iI`IH- zXB1A7rwr1XZ-(;(s4w#9tS%6#&j0M4v(mrw_XGXCVn44eJkZbf1ytbYcfWJvoE;5* zzc@WcVf{~4k0&)^XJ?q65LB0Onrq;vxLh?c#?)W{Zc6b&LM z{uOZE&bb8B=@1Q$sovPxNMJLY6R=vecO?=6&z@&ZSwfPj^^O#ySHnc5c9pP6H=Yxz zvSk}+%}|yF`wwZ1h8)gn%A0G{y*MRF7H6f^jLP@==Ut0q|GnXtH1ft`#}nO?Od)|w zw(THeL||C$U08=)X~W#8oF2V+CMpZ^8kq8Pov$n^eLWYjG&~CbFxpI$E}La1Wn=;% zS$j+CMYZKw)dWpG=VQF6?;r0S45QxC3hYd>55=mS@MJ?$7Z;>?zVZBx3B1qr6V><6 zOoNbSAJ_0V>l?(P+95r|9t95~V|RTr)$`PK~~>05O*Z{i=%dK zx;SM~AR&G(sTvKzYVLOJ5u01L(!E~@j1?fr`s+4O2|d}Cz~ffANiCW{1sL6gJu&!` zqz>^V8hcNN9{v7JbyH_!wZuaE=1nxvHU8EtE$5fmTx<}d<|m|upXKlSKK#(qRO5AT zzX~uTS?+DUoS|jsgpv8S+`4k!F=G0%#fbvex||Ex1RVK;r#1I-0#HikeA|}>-;Q_u zAf1@eyj+c8&O>{! z#ebZ|lm##?9u2wiNId7P%4`}~j(HgAY8^;S1`dYXR*Gpwcyy25beR_a=IwhursrJk zvGj;}56Z09#FKE_TKUyXC}0{3E*QHxSmowpVNM8x$xXld|FPcZtQzqMtiGWkS71grVM!c`3C_jSGz)U2k)l6WsswBB~p4jk`^ zTU9Gn&-DL9rVL3uS9e=?+B7$x{-nmh@?hE+&UR#G?A79W60-ri|8VKS{f9hP z!uVBp`+T^&kBlpn&1h3;1aeh+LG5R}a5Y8W+Ahx5r-!p7<+xI;HMDoE*6E=HTIW;h>zq2lx?62Iy~|J_Y9j4luf{Dq&~bzHvP~)fley4|KoveC>(!ogvI! zn9z=?l=j_*=tr`$V)B8^3|)pWW75GzPc@|;W3W`K{L^*AD8Fs%|C={iY@Q4hUk5yN zQ2ktm1e*>3DC8?ckJIGp4CV^5CYD4-Q*DVk|5&lEv7@{rbAF+_Z0g;ROJhg{czjTW zwv{?+KC_}C#Ip%o2yC>9bMjQbt$y6xI(@rZ=T-s|M-FVS|Ce}8*T`- z0G&?n`HwH(1dyMDAQW-HO~~85Jnsw+J;Bhd@^T_Q`P4sUTV?S$CT!#QPz! zHa_izkIDpCoBlR0UFw#^85=!4iN&xRZbL}@6~lw!nSjvL>fK2)K~HloLQ9q+juNpY zi=?s2+NIt$CZm(a1gS{}pkj%4FyH#K6nxr)zA<2rGwP%tnrPF3*$~gP8(R}S4JrXhuOcCY>zn%9B2^1uZKQQYfh zR87i-#_W*(s2T?|6wXnP<2I42nKPi4dJ^jMro z4orSFI!)IH-Z@bNS5QIS7oy88K2sOS+h}mPd#Z}o&h@oFFSY5KM7X7ex^khTH|d#X zuC3ham?^hWvPaawj#Q)_JIz-Rg4Rh7L@SzKbnsq#eB&ThmkC3X_BZUle)!t$<`x5~ z;+(Sa+6d8&u@kG4J#k>o%ea$=VqLW7T$f#pjocxF{zo<;b#Bhx5EgPA5@+!;tvwx)pe}$6rz*9 zb8Xj13<$VUkckzrs83;G8-on+&mymeB8+R|Xgfz`NGL0jx+EgOMmz<~h*le{Y|K?? zc{PNupE|2y#shUVWQQ?y?)3#eg|cYBv=`?hV73$X3-Ou>b@(AA5RD573@09jP*OeZ z0QkfvZL@oN>brq4%FV_*Aw7?uxihybr~X1X3O96jQSOO9>aXRcd$cq}Mzm+#a1SIb zQ~ok@OperbBLal0Hnb*uKVj~CcgzpO;wv2Sxr+7V*4V&D&QiA8(!F4&l#( ze=v1Vm2RGbois7hiIX@GS29E~aZ$;6@fTtus7U`kUYO>Z;YNTdIKo$(OP$B7dd(|) z*Q4dF?G@g4ddN}xJllSJJkAIExif>KtD46mWpyQb)8he zAS|+ZI(m&T1cpnWTG-&UNS|jm+`1v{X=gDfRUK{C@BnY?$d=+uf~aqgVyokmeURYn zk5s{TV?T~l-0{%5T{3A0z=lpM8+NnMs?o zb#SRM6*v_*Cc2?S)D$FbR66-{mrxP1a3s;b(f~Z!j zb=_(*xvT~5E0pSYdZTU56R(~s_ZGyiT)m-P_8jtI%Ev9Wya%Uv80zonWCasiYPZg9 zVP4B}wRl%Ga&6t#T5D}1xDkB%q{l_4kF^)Ex3!vC=%6_XPg80R>B6|S#6R=K?lXzPi^6NBs5 zYH}*D$M8-Dq+A&8$-0#F5uS}bt~fcbSX?S=6CRL%s*Y~Ri9RM(Ly^Nxlq5w@rOUP+ zNzcY8k(ms-GsZP#5>?e)aeQ!SfMHX|i4U}t&s-fjGA_vYow*N6fKXlU%52Qj5^>Y| zJ2=n;6XtulowVd0{Er4rDDJ$Hf(b#J=rMRu5KPC(84>OdXjGAQBMsD8DwAK#)1*Wx z!Ik{c`mM?reN>Xwm0d*9!q!z6c-ivSVOA@XXJ8fS+N-DXaEz~l zli3rFl#wJr@{ZPGcJD$81eFo(Cv!T|?+ z{7;~wm>4({OYPwr7k@LxFO>)kwYx$N&e2L)>Ff9|2Byms_Be?)Ro}rwUEO`0*H-sj zpN|PumV2I@^IUxzZt2F*96=(FoPee?o+y2F6L2+T5|E2~`dTJ;Ehb!XT-3_7bz4OL z9nQ(FyPqCt7E6>4hhB0#KkfA1nV>XES0WTk!6G5rFxjpc{eovI$$&ce8p~SCSgu(%2fS|C9@mjQ zNnzl^dy3hsj5y{Hrkp>W$IY8pn_0tfqYBUb^%W-%uypd8+{?j0pEo}(bd`bOG1f2c zkbcmS08C!x1flGUEZ(dl`#c8ta9KS>0tn)v9Aiar7!Z6Sb0eRTZ~O8hpnZTGd^#xM zLP8OPwF{FVi#aNNPu)z`S2te-*m}(66V>w^Jb8{K(;r-5Q5$PU1H1;rdYTQBdo%ijKzBUej}KR= zw5OCpj`3r*G*JnCP6#Z9Eg_W_M(ROEH?|-%H3x7@B=F!VZmwKn4}E6Iv{eDlfN9lf z-hEa@xgGLos?x4uKb4*4gsvx{O-_3E*>*#+#4858ovVc-C^xT1wu$$7{J!%Th05T3 z@nLCSf?!sp8TVO8i&(hFmuG;eM){t`R@I#fNBumY8kXE8!>@RZ&559k>SO+;a>F*T zjuM@G)$!;Cv(S!Jtej^mpr}BE%y>s4-VUh3fWt$39Ik5jMXn;aj*=lh`fC2i&KJg# z^FgSn`VhYhbQ^M$k2G}lNFRDfC;;}CvV||=^bk7tY6-QEwTMNzF>u1eMPMe=t1+cklqzOYAtHhn&6dsxt1jdCSfyfGU0vPyrs;kayFrf#NoaX2 z>k8o9GI^IftIsxGm34_Rv@BY1C?QQs(g=yBihDGPW_3d*a=%?uax64Rh%JFPb35cc z08#Q}sF5%%-pz})i%{j|={bcCsg?`b6yHQTtMyO-@J^Q{<~=^%x#Wctmbc5ZSU-C} zd4pg;W=3*j4Pp4n=VM0+-Qu+H_Np=iQhGD?8ZKn&+f($xixS=D5ayW#G>pO{3SF$W zrR*=E0POqRl)GMs+>SZe_pdu-@$wN?m9?s#}lyoJV za)GNunW8TGz0R7r*w6s|+h12V+=-EMU$IlMHqt>mBo{y?;7*vjbaY0-onE6UCJA2K zz#VvW%K$@+OjzRcY|Y>b z;hZG_ody?|?!E_y!LquRMShR>vOSUHodwIfzl`1wkx0f=;TjVyAd`iV2g8J>hkL=N zvy{s(ny@Uuq_Fxqk~0HbQSLp^fw>?S8@m#WPP8)}tTzE?17=6t&9&gv@7Y0qf#LCO zqUs3$AX&yORz-U*HX#rz;dzQa6|Z=^`$B%rwu@qWoWG<_VPV@GJ8sH@cPouzjrsRM z{E+{BXdljY`Vai4!MptLrvdx$k^O+NTW;fRMM`E440|fp+@?w2ON$Fg^6FhbdD}~i zi}@Qr^`n>{NmcHkOBsNl5&%DLYY4`W*lV=nbd95L)>mKYol(>p_T1?0#Qv3KdAYU* zV`-WIOMF_EP|GboMcyjC%yE{QiA|M+%S!9@h|Vf`h4EX(kPtM&U6&AHMK61ux4|@3 zOX5fLaYJ3tZ7tjVlUJ{wes|yh`LDqCFM zj3#azC4{c#cfnrVu%>s%5lFN=ZX8KvQyL*LScoF!8WO0D^?NCS`XpAzI+$)fcMw+6 zsdK7Y6S@>#uOw>UB0!2A`x(X;wEDx~m(Xf>+rn z>C5X=%h%A8)mJaS`MxO{Q5RMhU7A~#YyIWD&J*&9JPo1JO$N>PgOM^A=Nb8_=p|6I z-#u5g;?w_Rb5s8OIO_YA5(g~#wMVhL``6z7=Djs{xy55g>lZ4S}*qQFZFmp6{gsI*;wNi zz;f^YN(PwLo4NNCKc2dBr;H@|NLa6Okz%#|b)a<2lu)ec&kyF`&wrR-o8O%OX8z5M z8i*9P{rRImTy?DP)A`ZOny|q$*cNy?RsQP0pP2f))cGHqcD-J2F^&zJr>|eUu!kW$ zb9pDeq6ISpc3=r+-1Bn6?W3FHl1Aw-5c$qJ=NH2n7lR`Vcgotct+h9=U);Snt?+nv zi}yM9n!EQ9d)h2U@>vLc4$nc6jKcV)qa2HA)(DcXGbvp?_CCjY5Nw776Xv73TTzCE zZkMw`(47GBv}*{_)@^9|Eo$O3A>65Vmq0+1h zekJMMBS)Oa4UZ-9UuRWmz|&XwKj-D{Jie3j9skev@9%%#{U`hn0vD%Xw_S(VFLQw} zw=br+z*tec9<$&a%zKufu_9_WeI=d@_v1FmO4@BP9UTg!j7>)<%mj(_94J;Q++vXx z#psp;Riqy7wP>amLSmGmd!E~o)!*5rS>WG=iftL#Lr_yyIYz$|hiM&Smf`-EJgoH3I@1X=E< zBto&^S?m0C9s0H=rDjGq~MZG;v)u z8MVXRAv(RHMjBG?u&SAuWTU(%zhTV6>aJ_^inel>8u9FIGw5uvG`b9a(;=M?jd8YqWI}q>-P;}>H2LzxE)FJ;9mkR^i#n&$Pfe+f zTPWO#<)*9^BF=E4YZ>pX?~5Vyfd9erHVdNoM7sm)cyoR$=9!N-l}}yhQM3W4=TosF zfofaTlr@%9Pn;Xp$XE;8HI1AOf7_KAAaXj2;(%$y*%C->%*TpHG=Iy2it2Kv|Sz)tI8}N(EVJJSDwdCL`FZ zQQytz(<;iW1}kLZaH29k9$3%Yoo^-J?>FBeT=5S~vYtchd?!NhND99b)3U2KyPGyB zq81mHl4kAd8bxolxUll*!KV*G7xx`%K?ah~o9lw3*E_xbXusKfv+?r#Z|0lLmupX6 zzq-S)W>y)H~~RV(8;C=Hy3wPeC5rZ{`}$#U;=55aM60a!#kVi{`x7d=u1M zV7+I|$vl9QLoyLCcu?%{*j=0oV`wUdyait$D_92QF%vfrit46wEJ9C%l%!V!GgF`1 z_+oBnZs#k&WIeI_)H2M6rxnsoinPcWh6NA60dc0_ABsb^iQXh(r8cdk9PwhUi8tw1 zGTO>XC=E%+_1YE?6G)nxuzpH)X^wFFG;dW}WTaE%j``*%`FPLm{@hcSq-@jjkXjca zd}ihb8p-yXJdq<4ukYqCu%KP3ZfF(O02vN)$2U-n8)nf<`jW*0^gmjA3mRnc$0LxNe^IRl;q5P0)yB*^)p}v4~-6kISwyP5SGlIbc8$6ssF2vjH~ZdfHgL25!j> zmK)1jJ>9a2kcY6)lICJ;V+$W%R7L%(d!VqVdR4qXtPD;43o;Hk^65^tHy@MIK-7Q{ zkc907eyHnFo>g5~j-x+YmqYz8RCh$MIEdgd{y)~n$`())=*9U?+L+=lgqxs#@KvCE@IS&y7W|n(L`&9)iguK%Vp) zGEj+EMUt`SUr0)Ei1?gsG^B>DSFfDFj`ug>EFol-c9-L9doY+FD%mQcBU3A)ggk<_ zRnN2wZD+JSOb)`CD9qEJKq+jDQ<5DG|BC|>L1Jk0$1*cW5!y^H3f2&*=*d}fjch!q zvckWb4{$NOYr~{*&DS1~P|oHqFTvR4a2>&gCe-lwp7^^ExSy)jg8`wPuM|@Llb?4k8GGx{WfhMd z#5U0_#E=??PH*UT zS7t-2U6VKk-bpCn2{`t24`Ahjzk}Z6W3$v-!lW3YFbQ(z7o%_LL$hluBf<@Y5 z@Qkl9hV@g>u<`vq>NQJdCxr+vSlBt<67g#Et#h~fr z)*U)9b;8Hh8|DO7mpA+Un}Sh!##Z2ys0rc~rZgF)qshEO2A56;G1Jv%+Jh8T8sqcD!69j^6A=_xF_ zH_6zQo!y&PuIwLyD?`!Bu)VT2h^#37Zq?RF%z;8no+56taW!Fos)<}f+`<(Sm7QYD zLKN!C3}9p<7$C9h&ELPCk!HwWE?WT`yT^?CmYY*ed9v&UZGZ^xF>vgC>J$&=< z#r@&KQ``tiu(WMTAxqA)gZuiX=*QsM^QGlC1r%bz0HgW22TSjo`jpOpDiJ%4!-9!_7j+e zdciWvV#x0KD;)lf6uK4Q8N&I#!y}~b+3sdh;G1G72J^#$1r0mG*Y%=PnYo8+>@m(!UvLfE;xaXI5(TJQyQlMw^b#C63wj_ zmw7yT;dq=bL^%W0TRDt7@=RP}Ve($nm?@^Zbm9TaO@BgLe`y}e+|!NvdM5~KW=qT! zH8v{S-rUYxo}RC7TNUf~Oj>xqb9<8FNh#^JhSXBPbkQ>om`-k3Q|H=oDZVy2zTVf> zvb1!zecs{DZ;k8y{_e)S8OCefwUtvTd$Yt2bGvVMyT=99QRbeE7CheG>UOXF{Dp*e zeg64^g;uRfqf%TW2=^v3=(!iqM$(-;)}E(4H2w%dtwgJ!P})3!DU%4nJCIIK2t@yn zs9gW!8XY2Z7;OqQF+RTuqJa8;>M$|L!ti)&pOj%X%A)vYv$7f{GikmRKLh8vI2j&N zLV57z&+r~R9X?FK%oESBVn227>{7%%!FjPWa~>HoL`FRTs9>bN3|Iqvr>q*bw+jYsj9 zj$Ywr?ze+#Gj#y4a)m$qhswd#hG5N7gL|XGawBH1^&kP2NN!>7pVEbykRM8bMNWeO#h89&#=s+rrLi23RPtx8C1(79WG&s-OJZEwe}OB@GCRBD*YzypX1utN1E=Py`gpT5(*whp8norJ-_ z4wK2}!_iMw2pO0?gPlD8^SxUzh{;Aie@Kxzi)dGg7}sEpwvS2R;P;`7V-h&%856V% z74jhye`>x)-!CfYY&gU@8GDppXmIXSTNyrmw(|Vp%DuZQk6*u9Uip6UI<^5-AwVcn z{VVmfKFy?td1$kj(V~y7!AAL@!~1{(-2U$R?kOjj1ckGzi#Z03OA-*YZji$dVu^4o zAp0N~)5+_<2k58e-SQFUM`3CG-Fz`V`{B`{-5dWMed^4n@nve){9bao*7$I?*Sxi! z5-)d5;rV8L4h)|%AC4#?6XjTbMT?x;f$D7I z_yFIzAx*%1AScTdkAAffzCf{&o6o2@DC(4)pJ)&;IP97xDs}pB5VEteAy>pGDPD2a+!);7_1Y_7mct$qlYvqvEP&S04Y4ap<;mPbspaTPOO z>WJR0?;ie^MrLcHLtDR^0_r<>kG+L^ofbFH#{&=moG%a_Aw4~bQL}ygzyy2z-nqCG z2|_$FE%FaX2V~{1W97|M#Zq#KELzFed0MVZow@wk(<+A>fKdM3S(b53VPPm6YI7he zG>!dYXE9O2mv{}eAZOgD8bXuK;k6C(Ae+8@>A2L^z}`6V47wh z11K81o|%D)D>QPmw5z*n{7G;`=Bl}}a=JfRA#>}BvLwtO$#*q95-e702+bSB$z3_g z4Tth-p!enU>gmK1J1lLnK+5HIUM5D( z+5L$f(Z=cV(H1pMY*Ux)`^LbiXd6qYL<)R<7{LgO`O>A$*>-oVbQMBLaf%LD7C|z2 zP~FSShc*gJTxJXvnS>^1=3f1B||HOc}GR#iYdu)F-Z=7;hge^x|=XnP> z=^ZAt{b}#X@i?PG5emi*(%^@h=tY182%cIf>@=B}+oRx*=^ny)?V}HPDD5377J@RT zc_?bukB$j-3OBP#PcH5R#aYLpt#rO@-!hp*1;s7={*DDlmoYDWn6q8y?6};UpXw_q z^yMW27|!%SeMpY&wbeB}fDk>*`8XW?C|NVvkvj;g40{-X=@Yv*mzsc>mb>_b1`I7? zW{h-<9D^v_+ok-{XGX<1-N3A2!?l_a!xM2#rrWt9+h0v(Xcz9mEP)G&K$@D^!GE^B zaaR)yoBZ^CX9z?Jxcr2kcWuJo(b3#exx!DL@t$V%6}sA~Tt@$ySo`xQ>OXwTiSh|Y z@wFJ+Pu`Bra{lrRkS~O^{#J~vsOkNUtr>WSwhGnrA9J!2ot5OyPrLvNkBukM@PmW@ zdv;)!wl>whpSzGZdTw*5>}o1?E^8PVcPyYexIGgGVgm0v_;F9!P^8hs0$d7z)Nzq9 zWKe=nMczoCulQUYK5YRxR%+U&mpC=lq7OUM>UtKyI3Xgp@W-*-auj65ClL@U@97_V z>iP1<=&`i5tEan&s?LO0^P%p>df??RKxHOXo3jOk>C(fwj%o@l_7c+FlguSa$l+Ts3N@WAY zpD*3I@q9^H(~CCOUn9B@n#c;|iQ&AxEF<03#XtK<(!tShYd86y_ft+AF?H`aZfo)- z-23{kj~5ooIhMUnb?h_mmbP&&!F9!ADMn#l}}{y9OQ%4qpx^lPpA&2dDUwB%D;wWsd|1byW^`2n?d!05t!sH)3cSxiuox5W;!kJYlGxY zj4Tl5t9f1nM?ZBg^95;Vi$Ky^d60wXAS3UTtJJ{d{Mi#OLLqvQwB3#Q7d?y-!Prb>#UM*+li*og?kOwe1ss4 zW~V|DNz5Gn!rMrJEnphOLd1aJ4h85{r=xRSjhZ<`<^a-mD&AMe6BpwU773KqlXfRv zf7?qOogS4O@$2w0ti!dmJ1u36RB&p+hsbtnBYC)s1fw41mE}XIo7+NW_-w&|{ z)2yV3e}u#N*aE)Y!?Uc}bUBpv$u9>tfZ>aUTQ7s>AcrPwtqg@$Y45orKW4v|Z-n#^ zb!%?!r8a@ViID)1DuTv@Bj>r6meV>L;V~=lqPKo<@9Vu4bmsT~2kV!`@4#1LM$s3a zH(bnnnQ0?9pGCG*OauJx86GyzEOaamN6wd>hqw%$w%7Qb!$EkQY`e7Td8qd2Nb)2<_5MbLb%n#h`OT~tWK3&LQo-*w$RkM8>}LjAA3R4A$8~NOqW$FOdl`5xf|94Tk2rS82Fn?lSr2&CH$01&ZeAhKexHJ&OH!-Cy{vWR(+@5>L#f< zV4ga=DTgt)iJff!rk^}tUi|THXS^cnJOLBF@TztufX1oBx+PEfjNB371I+>3d;tM* z$}Zz!GWU%KzpXhHTi$xwwit>bww3o)M|vUrCr8nCPgT?R z^2y7e+i$LWv>+A>eq^Uj&-;8{zh0wX$mrdEZqq8)=>n>sc$~&kSaI4%wEXPHc9^n@ z<(=KF)02#e-qINP+& zj(-f>uSeM#FZThpLWe_qB1EIp!0abY28ZTj!Eea8&CjBJrS3J^`O{Ea>h(5lc?Kj0 zjTVvitNR(+o8KAN{NdQmh_b{fWYyP@4MVjS5ioQcjTA#SHE_Z0S}()Nl90K3{2k|b zY9Ix|OoO8TD&C>Z9K&nL_eDycSi(n8zrJ~`EJ%P6?9yNdK)%D2Pw*h?1-S~{*x zvs8EeZM$~D?4!K?z)9ClBaYKf_yImT@hbh__wJtGo*Dz4_IGYyzCBm;VEM0>xNiM) zez#7u?ri6+j>M#O^xDmTK9CCKqA9IW+p}G+=gcke(BxgY)!y~sNz|yb7^YJy2A66F zcJ4EolOvY8y*-C+FUSgTfcm`zaf`M*0(-XCZb8j3`!|YUa`klU1WkHbe&l~>`jgDP zXsX){1^mtRw91I;jf2$z-4j1oWld~wI3mQIJxMah{dzWnZ z^JPc;`A#*|Hair@Wgyc{gJcy)It15U-ikHO{0iMXo_c@JE!g0)`k!?w8@l_sFJZKy4)=O(DaS9 zrM)_8D&U_(a+78B5Y>OjQJYI2Msz#q52cDLb3dsU>S&cC#p@N-$JQrxt+f~1o0{bu z3qA-WpOJ2zUV^a}9!e*p8Cl8T>=-1Wl4_zB)<3e3RtFqO;6Z#5b-K7WU&ZX{zmsm; zaJiQodHJ}c<=7+X(f<9OpQXLtC5WbCpciD-Y>n)=e}hQ#cFO9(xZBy{K)yZ`)5_HKvj!K1JY$uQGK6g&KepM@2}{s3rO*%^=X@(TrN zDoX)4M8Wo%W&vlS2y*Uo*Ehbs58?|L_(fbQj zG2%F^JhyN;(kN9pLPK+M} zjj5Gn8yb4ZBy9K5p~X$wC}IcpdG0f#@T?W0!0~wlu9)afN-bJUX&nV8pa*YR??2h+ zFOeX%gwPuN5$UQR&!>;-*XFNw-x0K}!U`O-{LgJNTkX>qO{e;2Pj`>ojS+~Y20?nZ zqnFPYmxt0ia~_HI01k_~_~Y#_%ZaNU>13ZiB48JTq`USc`2lKjbu@X=+oZdK(e{nu zX!|xT!@b1gT3@|pHO9B*yDUzMCWcJjEBz;TxxVw+==kn} zL{!6OR*p9~wzBbi?n>2LG~PRYSXj6<9G1Ut_hi^DA8#$xh6@YlwY=T5ynVa&q7qPj z4Ea}%Ps7sk_MLMZ)*)}7JLDZ|yyx(DzC35hJJfHl4bR)#-LLA9cfW4_{_{D*e@PAW z9G;55_3y9F>2$A|iDJN|)4lU%y2o|qO!pS*rtU4AbM$v;n7!^S)N8o2P|xqq0!86t zyLbOgA&fVq zut%A`v%5_y8Ze;atjL$V5JEt~DMY`As6CYd4#uCM&Ing9p0*mLrbc>s>4B+f0pPe`Cv%an*t5ktxthQWw&CrT+M*B+Rpy@L+M!aw& z1(;rLDkZoazo5jD@^_4I{T|+mhXDVQB%|}+iQODyvkk|n>{ zCgXtVk%1tOKyGzB(9c+j=kJdbMKXy`SSQ1#K05G-Z)smL8!5v5*n1iqd4q9&Wx(Kv zY+~ms25lGU6Q0c0L-iRZz zMM>d6jw$(?li&OFZ75gAi21;3dq&D5mzzstGA2i*qpR1i3MZgf zVWFx2@d29JpcdYcI>gh{(wTIP8X6ulMKXo7tGJvZ(2P z$0@E9a^rxO*00iWH9Tu@1VIT%FL``eo#WC3Teju=^OvRUa4m39)i-xzvDE=AzKQYT z((A_;d>&qdxRO%GYp_7-_m0r%kouz2&khji7>-{&eDw51=bI7r{DrkyH71@v0_i$B z3%Sdi`X&xNRI8nTDc5!6q#BdT939J!!WQjCg22Q3C@2n%ZDHELid3*RzV-WO@iA1K(|4s2YhUt_; z$u%lhCcju;uT9$N$Uo9YZQ-7!X_DXQ!$;3szRH3Grn{AXcW$@+>O`ZBqcciZ)P6Zp zbcoN)WqmZsOqVjrJ-0*DKF#_@C>Yl_M>c>fsWvCf8i9tU#%?GqFk*(HB2Yw#k`}Ri zV>Gfu8a3m<#GtkV?ml6py6Ns;p^4te%s@C~0G3V{HLyO|k9X#r72IxX%8m zPz9*n;z^ppoEYh<{Qv4;VGo)bEHs8*QOCw1#V(Bc>E>wj0}Dx5Q>{mCpZ|!PJUl&0 z4B=&r%IeNJplg*^3rq;V1nWeSs_PK*@Y<4=KIXA(PWp%GDLF{D*ch(Xv2O0|LrYBl z9cH0o_{GKGre7`JQ8v5L!JXT;P&ew;-?{zeo!kFmIDxFxC(=OMc{HB5){7Ec@?4@= z#D8y&5TjL>>%q4R|GfRryWe4|Uwu`LS^c5VuaK6wfIqkqXE=OG;vWey!aUj~ zQy}`uo|-*L#(THc#FDDc3|<5Le-+b5W_)YjHkoO$7=@&VUa|&P5|wt8RPuRPtUrf! zt7M~XK*Fr;jdMTa95MI%DS6M~^dd|3RZ_(!7l=H#CAM;SB?H*C9_MR=x;x*i^Q#LU zuj?GlMZ9XAE66&BVv-#uhPIz)c)vuSha0@M^a<=UgBAk!m#yQ|6OuDIQPuJ>lhpz$ z<70BGt`EO8sYH70?_xb>PUEh#YHCG3u9g^v8<7hM!%mT0S>mj#@6_R17~1liM33n2 zMhV=Kk;gBb`oq`v$T}O4>W7uJ1xw#dgkA7RbHL>{2k>Ar9lpm+yM003_OTxBT&SVV z&V`LaNc4>xgYIHnJDD-W082B!GlGe)B;7;`WBx1AF?i)_;cfalf4w0(Y5}OtCrMv0 zdWf`S7Ux3aLc$o?h2eY-X%Usc9@l9B7USVH?0Gj24k}ldXyi%(5O-PSp6L}aYCxa2ohA_D){u;Kf$@MTduhqO&ZV?N6{Y+M?cx!Fu7=l{_ z4&kNYg&@+?nO)X0a)Z~4&$wGtJr?$+mr)vCyEVG?VPR`)#@}pv^;hyt)O%xh?#ze4 zW9m($h5AsX%G<4J)n1!mB~7T(6G+V#70$|A7-W;4@;XCjqVdO-yTy48tx`n1k7h9> zaZx6hH5=jI9smF|)sV?XQ`{7lcT#9@=+mpO*LJ{W$`|Hy4L4(Z*M59uTs&=o{~Yxl$1@xs00T7Q1S zuS+`^Aor&bFIB=fRu9QHa}9jo&g~#-+QVFq?Qa|fZonAiTYy3fzDxXKY1$;zmL$Hn zDu<-R_wPXX(EHeB|B-wxJxNJgc5c(@rS}i$TwmNJK$u1Zv1Y57NMf#Bl>iMh(Z|qJ zJ27U{=hXpHpH{hj=}uO%C@U5fI8F~fDvs+g+Ld|Q@=K5JcSg|Ixjm>ap?s^Z@G-gr zw_tH1NB(F7(HSPJw+aXI!y~cq)P$J=B6&QDK3SD|?5NJ@w=%E=0jybAmlOnhSpUQ- zuC1=G-n91xyG5Bb@|vbcc;^_R)RQmFon(vWEaLUR#A9k}uc1efgutUkpN)$@S{Q`! zqa6rVq8qA6>~0q&!|3=@U3gLGeGh84lS_32mvp;PmgEu(B&2VDzs%J~d=_0tVrtRV zxA3S`0I?d&q%ZshU%{rt1ISB3+9& zR7m zEJLgNsPs(zM^KS*qNBTu(IaZ~|h+BJbPm2t&ceRvJS8B#kmN2-g4*Gbb^qyqCZEf{z4|DtwwCt;j)MaQa}vDCg({=?9d-e!#_@?dfK zZ-4t+YB_?j%m?D<>X$xPeDg4`7#b-bhEznjN~PukSbX#7f|ee@pQS({uluB6OX@D> z77#!r3tfgmmny_HcUx?|v@}gxLyV+xa&D_JcP^G5He9Y9ABf{s;wlZAoCKa`CuMpaszy&PBq+BtkMQPsG zb*eqAlSx`=+eu?}wuvzo=vF8tMw9gu^G}RBYQv#3HEwOadw6l{U|Gn*gRNunF)wTt zTh7$;B3n-lx{cLo`_o9WuR&@OSSz*UPuBd%x+K3_UgNz4d}x-@CPNUTfdskX9P`c-aP__8 z|GBFOfVnFyW8ArU?-m<9xO?l)CEC-<+J1SdwqL64-CLJwd-s;w&fZ6RO0i~I(e|sm zw{B^pU)^1Z|9+YO{qiz9SO1&ptpEMe{zuEz-|PFASn*eChc~Z*^ofE~FM?70VXR7K z(EvDU#b0GH99Q7pl>^=|L1a#@!E+fgcXeZ&;(YsR3RX4UfrpIBbVqntrn@lS3nVid zJ|eV7Pm_{HjkA^2=yjYKiIE0B$qEVzFWwDKG|<3|i3{Q}o0`sz=Bf_usyts;iEV1= z8xL?W-pBa%dpf=ZOLbg@^4P*2xs-muOAp}%AoTKK7R4b%jUkF4YY|=A+&Ck|P41MCo*npO zX95%;`|b}{6$0LavO`~3E})|zSh_VDEqzsk$Gaa7=X}s1Lm%_R=Cs=V?UWogD$#k$ zUmk9oU52oiNRFni4L=5W46aX}OU~^$zraLOJ=4H#!I5RWYfEUHuE%l0N#gRNwE2+% z$G2q_h%>CR^z?7vKYjIZaXM1JU(MtR?U#L(Wfm}KOXT7YKN`N`B;YzObG{ah3S9-Xs1OO&aHg!0)hfP zg)ka~ov<-F(Aw95a@@+M`-6cjIr}blV|QUJ8-0+~2w!BLTi9Yt(5kFCKj_s2+Zt+g z$IG(@#LCA8+N~_?QW`gXH>X&Rk;yqwltt+1IyMspdBV%%6V$k|oZ#aPp6lSFcm!2@ z>Vrq2_rda?%vZjxLD)Pv3n7UnbAC3j!KS7Zgvxp)`?~yBIM*T^a>D1!hG=vV4riM+ zvf;>-v6K(}4|Arge8Rq!J`o#W&W5crpC#bCjPZFwx7ObtVnDS-Pmz$mVUDCi>bF-V z{!8v6D0Glzc?{8%XK3=wl8-%R8q-D6oX4;&q(cj(HW=bNqN;IgN1{e2yPFg8;~J1I z+>`g!#A0N z)!S|z4~*qq{;Oxci~GBDGc6)k(x?GTN?^;ct1-&gU=7i=$CuvCtRf zRzP63Jb!TUAS&2kD&NduP|j$9(pJr^Z|vp4R%p-uQ~j!*v8SnN14e`&YMY*MXS7$Y znI4h}cnPsDl=X-F`$yAXk0>OvIyq2%VKP%wpG@&Kq6pX|;DU|Lc@rjHT1NGUY9KE= zki*Hsok2Z;<>jYS=xXpr9`wWI=Pw_ z4vTwkGdASIZ<|!hi&%3z{;^3Oz}-2vK=s@KGQpW1#6$z42|nawPJYu#OzKK}9)&{3eF&_u-UJTpdcMm)hTX&%<&;TtfO19K?Bs)I%v z`ja^V{oIgB@BHNq-$UNcMuJLIfMG$kLTAJ8$XPk==w{&>eFX2dDal%1(H2r@F4CS5ZBh6=A_hZZbr9y#kkWPwdUany38Mqdt>z%q2q~6} zinW~`D$mmBx7#D!_(tUTxOeNzgI?8?uyPn6rpH1xSFX;-RZAmaip!h=YI8YLL2KTwu9X%dRDZ4;#Eo<|k+X^SgiO^*;B zkc*`Xy}PM8)WKEx_X^iS*TvIFS{Qqz?$)$eJQWo~@H8trXgPXT1D~EC%cl=(f}H&L z$dv{0&_X0mmX6(9BCgDd%VivFlG}YcX?zlx?8kwb^KC+YDwXxzDvUmS@#AM%$^bkm zorM`j3RuJ;IM|gG5KbAxJF3=k3STXUVr7w_;@K`~&EAl&Zb(s#b1A;kIDyqW@rb{i60b z&Wnpkn_Zk_9nWK@T6H?4wbMiFbIFw;ImIzc++^AWq?!{N#K!piz~n?kWo@9olr2;#6+q6vA{rV zrIe6#BH2sa%4aV~VlOTEkIL$?NYo{~;PYku%O|3`|Biz5JBy=o=g+tkOS;As8*Qh^e*h z<{=z?)xFlEsH_RrqcZf|=FW)50+b$zRK3ciVc1Bak$J~SPyWGXWHHmh?noAv`6yd;&H?Rj)NCMd8A(*XX105)z5+0>_U%bcV1vqP03qEe=X zkq+J@hp+Ghqy~E}{lD@i_BY?Jo(e%BW*3?=r*)7u6RxlYk7@Uqn8uI;{hW%R$HTGPbR7(%rr z=K)pZDre|&lV552Q40x|rd*>(pfX9ZHZ)#SoK&b>!yMA~)YUnQ8kZVVxKCSmH6G2# zaGco_bSTf~CX3o7OktG(E8#3re`(Wk(y?CiQ%ue4^~Sg!=Qgz22p!Sz5FRB2p5}w) zM%RWtL8(#wO3I*5QnM(|fxZQ$DP~3!28DzVw;e3H)0*F%at~+P7Y-s$PB7GMjQ9jU z3(l`V%8heDs9ggryK(%T0fNPd6p)1thFa|ab-4CciKWwzO@4&wo#403KAA0yXi3bV zJ|`b31_q257uQuw7DDE(y))JpvXW=XpthDt>UM?kr7)qBO%}nKC`BzK6Y9gJ_1zIJ~7) zT+VL+G3AOIfv*{6JOt>si*5pqJ`hG)HPLjmW^9+wQ^IloNO?6TA8;G~O8sKWI}O^U z5QuJj*Q{iy=G!Y92w393cuJGamD8j36|=KbvymE8Qn-kUm)pTpJmA%z1|O~w!Eyta zND|ke|Eg+P;gYyFj-jIkW zp`}BCulB^dVE8$j*dJo3i`ClEL7iKt98Noi!H^!gq1Z~H|I=%FUMl!BAXb;$##+^` zM56KFE%{I9M`zs!kr$}*DYEL=CCKBVezc=Qd=FzlL6+A%E;Nft6sqwKV?a;yI-t^% zvl3dRgmpZ@#iIgY3RrKlxwk2egX?YkL-Y zQSNkkoN8i9ynO>%tvBY>Ed|>8=}iP40<}7e^DF6xbSTTQWbYo_t-HW_?xIe+Z>j@EHNhcYpnYh?>&i)9rA zH@lvPrdUy&2{lWW$`P<2n;! zBFSElk2g^~r2mUBr?~y>^hc3XQ+{`{{x&UKv1SlKs^)?@K%Z_LG}#VPY*F`}v74Ta z!4Y8ol%63vc2Z2uE&}ep-IZm|G$=NW<>S{+o(Ahu&QWm0<4Ref(>>s&qWRQZ1c~bL zT!{Ouz|a}cGUil!?6P2OMl@`r2H!gX>zM>-BM#*QiIFe>T-jpht4M?t^8IL2M$2k_Iuch>-`?;=U>$eEs967tjAT z(Eq>!tP?*a3tT>62Vl#ntdE1AUM^>76Bqg?PTG{J6vC5cPa|6umg}A})1PSi>DnVl zR?WJ)pN)Wo|A6{g0F@LhL5`(t5~(wc%u;PgKI0HY35}CYOI2_aD^mPf{Ri!!J1&DJ zUny@b_L#SsP47hAkT_*qq^<5?_rvDKXdPEKpp8k^ zSc#bc_0xU%Z{9+d-a+xS#W(6NQg5>Su(!FsyMF^4#{<%!Y_Form~4JF`t6IKo-Qpv zfBotUIe%i*HzWxH=KMqm%_@dxE(d7Y3(aRbl8T)SOJ_3NS+al`?kKP#7hjY%wU*e> z5RK_jO!uI?5g8PPdU5 zY|n6OjIP0V4RH(){~48!pGxo%Ch#_UxF`M>rU7f>#qD@6Vni=)epgI&@~sy)|I(Q7 z%eTMeqOI8{EW;w8FJ7%R>p6;EvqR(@N%(4mv+v#3wkIAbWzTlkTslp6ocK^xe4y** z@M(cS4rg+3z<^?}DXLh(VTE_2Yc+ybu08YT?0NZ#JrTz5n%TR~Oua1RZ85C!Gb@~| zY(l}iQll1+x@4Wr;}>_3u)t`qWc{Kx&i&O~r-WU&EC)GosJ98#i5%t`&5$A5@boSNO1z zBqT1B!G{|kjNyZw@61`BZke-v+2K|NAI;WbIPjck675(93-y=<2^P!Zt>g_4hQE-_718%di!s#Rjz}aYW=k^|Tn56BTjCZP5JLk|4sh0>p ze6}uQXn)(#DTcb!4<{w(@!*k3spafSF<76?K^);Hd^^U2pO;Bg535!^XG-7Tlzx_^ zT&)_e$4e+q_zjWs8(=J~B7?WLMt}b0ubC&98>D4M;En^P9|7s4P8+@ZPF%sYExhf1(+n%*H2n#HR7v zFNMQveWGRUa3*K~9c@)=un1-n*Fy{@N-fr}s$pv0yufpDRwpqBV54vlKys6E)1~P? z`@_^Zqi5)8x))6=BW$m-x22m=!CDAlT4=Rm%6ZZCQe_QPLNwgT&d?bn=@|onj=;v3 zodh8Y{rhHJc6NbQg|A%u&HeXspzJ*aO*M0N8%0e|`;NI6-Nc?;aujUf(zYr6IJ>kd z#!$wN^DxZ82VW$G1Id8Ksx_9knvqniS7U9|@%k?+7sj#q-8J5pXARA9Q2D6amRBaq zfz{t3H8PzL1Ig-At%#`*VGwsYWrmsPg95 zOemD)2?VgZdw6}&96AR{$k-u=ZaBtXV~UJ1OQ^uRhTB9(R-{CGjY21bcmM0EQ&?I3 z!qg3;!Q5RS7`#(q7~IpmCd5EK>g_+x8S~CXq}FT3(b1 zpgzFB{W|a6{k=m)^#B`cb?a)t!!&^#ypuR?^;okBC{eyJ;q=RQ%WQRZ5RgG+<01Gl zg=5>7JLq*uX+cqq!td+h&L#}m?zSp$`E!ywX9#XRK0Ca4hJ@)rey5v=>O?APjO?7a zo+9uTr{!I^B90zdnQdlpQWoomuiC1(Nhbd#o>_1X0XP3f!C#zA#(4}1!b=~G20}uf z$S+gS<D_^=4Dm<&m=byf$zUQ9imIfMl~OYvL-GZNn3UfQ*&mM znHGdu)-a6jNGsDI9>X6^DP$*-CW;j9S8ETWCmZEA{4 z#*-PJZhjyNrAoO@UqZ7rsGKAxjmSG1;+l>^ba++BUZ$H9q3YQz?-4x_9&|zYqOVIb zP`!79Xg25j)$_hbABRWh7s|j_2USiQ8hK5yb(fpw>ly*}SZ(aY%)SlFYX3!s*MA3F zn^q&Q=~6;-EL5AWip(C_KiYY1$S~9M2-=Jt^|%{qiAyl9w!Dibn7b2B4}SYYJt2L!*3`B54hWhWm@@Z;AnpFDgs-PK(U3$)vjDK{w*5XaOH%c0}0d6O)ugfn*H zv*&k70UJ1_cgj$M)zi~e$~J<(mCDwWdGC;7brUl%o<6os^x{JB@v}R@myaD++9NJ+ z?CIL%B>sN&WaIy+ekuuzIjxS(v*l#EsU5IWNoU3ESer{oi)@a4VF!yH z%hnu2(Kbs$^AZaX^EIV5%vKHvykMG}TKmvc*mg(3t=a{5<)msyE(3`VPz0*BGUlKV z^&mBp54YPkC>Y_C4I<+B{oDZM&0tKM1nM?*)mTg~x^&5`IAx~X7EXp$> z(<4O+lT1%1+L}+H?-o*55bR5R=?|A)0)gS=essA1v8JEGNkH2fBs^eg+mh()%9Jmz zY}{|XPuyuPE=_UcV^6;ck)zPSpkU+i7T`-fi2XYDAl35Gf3+eTRC-jZ3>7_`8KM~> z{Eo24OX1=Da}k;D#D0~}gOkpLtVhes>}`XHWn~xgNt<=P-(1~;3dNW;L#?H`9V)F| ze9{<+D^3U4nea#Eg_yL8k8mar@v&I%tNk*_Zt*uc))XWXw3rxPycF~RM1eP?rh z4@RWZ$ibzylc=#bnQjF&cjxJH-va|FBoxwopd+_SNIr~pvTFbFesD`Cw;;kOoaIWZ zd`!WJdA<SqmU&*7x` z;)w>bJtp8|G9cP)@2L1?`Zjb8Jf6wNgKx67P9S-5nAq=T@qA$TqE1iso>eEcdP43B z9|yC!XExmOuTqP|V?=%0^g>L9Yn~sNy6~7-Erjmb1x zbTKk(f$$Fismeh3`-`XJXXik&yS46i^WCk(^+7Z+boqMm&G6OJ_@Dj?pxUIfhS6W za`+J(UqJbTXyQ-9UTmCPdLj=Xi@c1yY8&gbK|rLT{NN~kWrg< zObNEv2j_H^v`0*)*%RkBR1h826N}yr4B*8ug1)S7A5sKiWAoer+*~)mYms^Lo|;v2 zD&~dFZqD+}`lW z37)9jgx!bI5|G_ja;;mpKY-UyCMtNcd-~B|3G*sSf~b7bT~#BKkL*}}+MZSRSx~OE z9(4a1ylx5I+nY=`@X?XLrzVK!+xx3AFI^8YgIr%h=YyIiCg^14Yd+KscNafMHeLkT zv&Z=i&E7-NlD|8WExwHQbDV+HfNZ|);MXIT*&}{P`f%N;TDM)fxa1>^T7_gMVr&oH zPttC@QO^ye*@WE*i8Ds*`;7NV6GbkqK@Ex>U zx3mK%?eD(UiWB8*G_Wo=1I`syQ1vZ^I~WuBI~2QXW(3?%RG8Tp1kr@$6B^!x5mLM8 zMSjuB#@3M{$-u=!y~jx1Ka?rWoz*D2@8*GOG}S@hg1xmw_t^sjfS@B5KjXnH1#yI$deEf<qQ?e!C?6&;8fW z2ebkHFKmQ%T4ZaDXB0Z`w0}(7+r|yX54~n9z9v6su@^*MNGd3@t#8V&puT3`9nKSY zQS2pe(T-Ujuv1&ODk3@{SQLZ9Nv@Hdd%bE<(vXYaIM6C(H!v2b8;T*>e zhi@ae?7@$bz{j@(*@k)IjuF^+66TR&tFZyZ#zd*RfeT=*mbz_TNSe2^mF=wVZ<(6C zJu2s=e!~;b;7m5`M$%ye$T+wd!qcCwNMrRG(tCI|PJbG5bwz;kp5(d5^YL_ZMYwil zZ4>0Yxgu)%VQQTD4H>o0c)Gr_dUVE0c0Uk8i8zVQkOmU0Z=z6#2lldo&B2wE7+%9e z_>wIt`jyyPrkd({6liF8ypGA=1J{yNU(jPtvo_#2*$NbG;(gt8ulxX(j5?7UAf>$2 z+h>zbI{?Zv!FC%9Ls_z=&hn}whi8Dwv2S3Xv3O#ci~I!2Q}s8{8HPDMay{f~2PT&# zrW;~;JcbuDs?j~$L;EBKZmJJX!yJBZAO9p3XwQKDu_{xiro$J-1kc>GFg%k7)|k;M zg^8F!-FBMEJ(r&TJf2$cAvY*`YpUHVgqR9GXWAT?H;M<}*x;(=My3yPCn&zdR5)`w zIZB)RQPRq}ACsmCyrvt5#880HiH`#z7agC?l^b*tMxhWRZ<-!$&WORZ`YogZ(Md$l zrRPNCZD1`Kw&k-5CVQ89uRGH%4UB^Nl}qD*5`lo*F|w<>>qlLerPOS2NF zIRERh^v(trP@X1eQ>};V&L`%aaM7aiZh$^aiDI3Jy><_07Uh!JuJb6Y(s7Y4BX`%<{>gAr8T3zrSp$g;{(&__MCHds0mHg z>ee1hvOk~O!dNOGJ=aqC$n(aH zs|W+T-G5z@XjN)#u=P%XK=CXp9fAVzq$~kiHHJBw(j%F{^>*sL#3^iu;cb^3U_^L} zHn7>wnu@to&!|+m5!R97q*Ms$^x;X*@Tbl}cbYL(u`svqOZG*E_ejBWd$1;~4Y3x= zl|(wB=`%GcDv3urUV;z{f`+p+mk5P!?9*^+QYYH3hf4jkJN!;HlnP%`=d`|cwplek zHE)isG@@53>85sLY6Z5uX1dY}knRTF8yTrakK+`)&i7+asXr!fswUsW!ps#0>Fnik|WCTg{ z>n;+f*|ED`2ld1Y7PzIG!!N;XlI4Ttq3efGC1u~!x$9x_pP4eHQ!|dH+Jil$aB%PM z)DJlMtkCWSbEmGO%p8W6p=D28T$pZFXEanZ8T#lxrj#TSWbrBQE|d^ESvoP9griP_ zK>Xpx4F*SJ)iN0EqH)TV+K~wX_&5tv0EspF7zXmh(ZsGn%*+(#hhA(%YLk*M9z`R zzk72Rj8ZPV=dxYC_OwFB!;J!62`LR>w3l`2f@2P8f6d!tQB00K2-aItB! z3V}}sjeRM+I{URtZM$;l?wWx8mvO^v{qW7=<7M1{4(-{IT*N-Muy^~OdDvqJ-$uRX zVHKO~NrSZQ!qs@X-4l0U58Mflu}W7ETv!wQ9gIKV{k0}zcHMCtN9*49>&d_w_D(w) zXS$w;8b{(`JcLNW7BJf!C|W~W0RxBhuw&+BraB>ivXfuqxl`=5-k%<|@wT3xu~lF; z6S%6EoP7<12M=4*-KhwbkHsN{|2R@@=Ik~VA>|ec#wpM`?&xCM3Hza;ZGn@CVug7_ zAS1Gt=}+Ul($E@dBnJf{7UoehBVJ>QaKg_n{*2z$(cU158rwB#7t?dU&<-I!h0m7} z;XUg>W^--2Qq=RzS1?1`;%GACcc!bR2 z#rr-w#bu1F3+}J4iL5T@)hpwB2$o%yZTb|H$#`Dm8x`+>XCB5ESAn16Tewdp01P^( z_}_d|FAq?mm%p5{RGX;h>2!&QNlZO5t8+>g52lCatQaKx!FNJZ?HI12c>Zen)ym?- zH>A^kWrmx1ZI+%czL;&myVHYf98q;d2bkQt@*4VJr7=}R)zDv+IEujEVhlRd>NTGo z6SE68EU|@l_ zvo$J^T^}gr8)q)u;JiQ%J?qu&D;k7JR1knK+5SR$k>w+-R=ZBfhRkLAVg;AWeD(j^m~$XmahpC+A%vkFm^nOLw{*KvpsWu(q}};E1}#J1nH#t+P4~ zRuKbvnNcGAyr$0jm9(8+Q~bORWo&c38I*sWhS61h^-rgbRE`!#! zLJxkBxFB^7y8GQvtf6Db-U^yYs2tw=`qu5hK^>gEvHRQbrc#`Pd?uSGzrha{Y9)XO zeQrGHfRdRXp}6TNBTD^Fw02`(3}1SM`vT2s8lplzXLEA^s==K+c+WzP<)lFnTNvU_ zTyx}!ad^ZuMf?>b>hSKt&1;|tDPA~phCmAp+b33#;YIFqF-wOd)dCI|(Ab-aW7PGv zngH^!!e~dQU-`it_;bA$*JQ7%SODUJeGTnIO`l7T#cNA3pdOz;<1%5ea~zqKrV&n1 z!NgKL!p|fa-a$=?@%icgWP9Ut_=>3?_csove*I!|f3o>S(`>vY7Wf3gC!(I(Z;-nU zLZY0K_k3ri#kH}ofAif`*?p6k=p?+QS==(x_>Yye9|e55|7MA9SL^&FUpBe1R)01a zNUkpsuD=t@=aP8b5*-r60gV^v>4;<+k~2cV>$_V6@aX9ZUe_y*cki)cvaM^7`;U?7IFzKB93KeR zR4+aAyYdDk)A+gBI_B)O%;IpE$5*GQ{zg8c4K|?LmP42{qxvU$4U3d-;jN$<@9M-G zCsMV4AMM|xa@owVLJmq!#tw1Ie|@&{^6Ap|S;0wUrgdi=#BEi=kjy&x0M@RW#=eDd z9a!LiNek{K(u6LVFTBZ<-bm6Rh@9g$w@ZJ0gaV?12IH5JO!{NjIOzF`WhZEc;oe1c zIxWVNwMjGrx9llj8CcSNb3YrL-pD>;kQM3@m>BnesNh(VzG^(CaZ^ zVxmRn&a@EZnbu|KbGsQB#VSh=1JurWZRO!>0|QK@KSvgg|m9t zJGN5DbS^JXq)ga3SbOdZfyi1xyX$QX+_^T|iZLQ)#{9~XL&ExfJ zzA-BHc<_#5TUX#Yzy<3=Ut#26btOMQ$E2upPnBjp#A9d{%!@(qqyK#K^!yfod%g6e zT4{_|Yddt5LxnM^9h^6ghf%*bi|V&iC069rdMr5{W|WqKo4QqJySVW}ZJaW{@2O0f z$`r7_J3-C;5_r~>Z;tK<^)l&&pE24^KWKBoU}*H=WEUtO15S}Zq<|=*?6ZY=E&a@mw)voEDGj=B z)5Whc^I#iiy{xBkW#hB>H@YMduZdtXBX;sdS%Kg2`3)g{=d_sL_nc1mv2q-4ul!0P zl==Pd4=3b$J#AYdI#Z&;gd{fFZVc6~wDrM4K#Kj`l^woj zp)Rxu+vvNpezz+v{P|;X2&JE69dV*zqVXTRvH00Kd_1psM1dht!MF~%?Z@nv@OywH z1-<_C!POF8M<_o^%I&1CJy+(7KDmqj?89a%)+1St1?TK~k{mHxb|8q|^3e#0`^Wmfr1Yy8+es}= zj<6dGN2OAO#?&5X;BU)-KK z&#Dv<&L|uj3iypUZ!P5h@X2#y{=g${ebeQXBWuf(nwg{9)tPL%ZuQ1j1|G{GOfcWd zZ=ef3_-~P?(B3-&!^O@%c#4tw$?Ph8Jg_)BXV*embi;V7G#UKy%Ep*AY+q&-*iw(B zRZZ<`)usV?mg%Gt%V^6FHD1P0BZNk+TOU!A zyQ$j~%p_yX&_|dWwtU>(k`&v{Xwm(KfG(QP%EFly0_yLis4$Yq7+J= zwS{;Ti_xIJZN|BpT$1kZ?8D+K4v&rpDnmV98@ijrMXhF|=+oXe*!|nfmp`BC3OjBp zyfEQ{{A~83(5776u&|5WLCCH{K1wMAE!T6IV)fo#!fps}#U@w;PCF&u&yMK~R2ijK z!2DBcVE=;sQ0QM}W$R~tEiHO`;r!Ltjh}13UojjFt0QVzbcfpbz25*^G*!~U)d3%L z0=LOMf=$a{AHRDyiKmpwEyZe;f(?Y5jA#?074pmZ?ZGHDU}NoUcmI@NlX}>u!9IV4 znHh(i`gvWP9Ma+wr!Ib;qxL zjZzWac8t7DI!rTlAFQ8&3OZxQ)ZJdjQ#L;l{6|#q?(VQtxz6wMTQ=>?_eEW}#t)LVphM_lV|~ zY-}eIew3;>grHwf@4Q*4L%ekw{zGN|AqV#Mn{M0R2ql_XS+%jwi!)u}?s)hzEL~SN zNO@GW;vmt~VEUbU^FR=RFy4s*xOLwfNllBq4r@NVlFHVCi(Ps$8knt7$yx#kr<_HO z8d`d*V9?_cMs}QdRz^2ds`k-ZQd&m>KZoOQc+X}vA44i}AR)ZK>X{dHJKprl7*9%? ze{&QIV4g-kzJX*SI{B{pagTLyX*kQ|cz&QF%=W>2!I;silj6!a*I?IOEmc=pMs0Wx z*BG3x;tcG_Lln}forPPvOU%3fEuJa8RZR1k@f@yrHNM}u3h0h0UQH=?aVMiUpV-Gu zI~Pw7o?e$)&Q5r_XeTyu1wjX=tV6>S5w8;!EgVH69G@KVz`&M`k9P!oe#$_02UK1> z{=g-eyN+n48!$o)?VG=Jg8}=5Zjq0*^xzs&jEy-X#H$Ya{N`(`^3mpZzeKmJ^hVM} zw5n7IneN|EMAMmxGimnHuvB>uM1QRwx;9dV>NxjyTf%G8?o||b1Yc8$jDzXlQ z+hzkG4L3@i=?XHb2Q9P&>Go{@Z2lnDeprwV{md_5eur5<1%)Y3pJM+aQMj-?!sq(h z7iFta*iHFSo1fL}(E9|~AlY~JKY!?w>L=nti}IjZgv1>wf}tz^;vJHgC{bzz$o#HD zT?H@Lf*-0cuZXchYO_XJ)r_9645E}tUOe{dfxI+$w@QA+lSsG!B4jJ+YQA zGtad1zBwlw)+hm1!(olSTv)jO*6AZpTlns7BJnY)l4CzJ7e6V{wQ7DqKluv+q&x|~k? z;-_OwhL9fD>g9*a`gOZgOZq>#h)Z|dT1A~@p}0aL5N(p==Tls7OcyRV z<^rmIdrCsI2KFAmPYZ^V(onm8!U%s4t~V973VcNCTjq1nDN70Hu_Q?QALPD$+2-b> zVkJ;3F1m8-ZZpUwSBiY2jLNg@&=%+0H-&}IA;o=~0 zq?nlgyi9-I+6~bm((?Fm8&553xDyNtV3ymuCcJQe`26L|r%#?geDgGmG8jh};aiH9(d;Fdl z>r3~G%soQu;e2*Y?hr~?PDdZE$!}M2xp}j zpQe2h2TF=S8FD`|j&X=$Fr7Bxqh#gD%2`8$EykyrT&Y`+$mJl@Yyg+T#|ki(&?V;0 zVLA$I*bHaK5SyZYa#3(dV7~$#`lR}AS5MY=zKi9CH-M3<(da;*9(V(zmJQHZtZUnA z@NDs6`)`=x0->pu;^~Bn;IAoN#*8k`mUc~F#oYQ)xv9J6*}zKP`Lep!9hCL2?LOdC z3#c{Glqln2k}a!Oo?Y z#V~~*N^0C1dg})Z>KJXA)7i*V6>%uXgJz4c*tmLRsVoRE5{_yCy3paeb0g`Mkfd=r zoj08}2C_9`-A#_(&gOtw_Tc%I;^}hfCEaz?#}g~NerjHmlBcJ8ggQYb<&Oz?mA1Uv zI_*1tSRqc;<~7j|mLT6|9jaYo9kByHDC^zXp!8}+%mSC`LEQnocEC$b+^i;68d|eK zYD3MlWEw!qSG!|t(u`EVlrc)+;q(wO9gb{r6e=l1)J&sW02Ds44Ybx@Js)}Vt++xO z2i@Oa*wmst0ZAn>%UAE`RCVz9_l&{2b+%@nOOJ8J7-#2<;bThV=FKEmXvx2YjS=JK z^O>%aZVnG`gZUU7tMlA*dJp+J2 z*Y^g=8@1a4iz(GuFJI>xt$ubP%(&5{U5+ne{b+w<3%`Rr<^syzv~MYc=S90cJ6^-( zOlPqeV2e^^nJVfv-E;o>F$`|TKDlpc+q|~pHM;v{^Es}_-h(QkjFfdm^)L&WlO8}m zSX5`vOil*ygYnDDocmW-l|)6VYR&+RYeO*_lh zewz6O?`2q5^j_YoBHm53g;519tBy4T-3Uap}YKP+)P9~(*X+&}!^AcS;^9t1# zMQ!tCFpIikX!3B(|2R247`&7?+tb~j;yF)eUILh&u?#`0Y;CUhASBiWIg1j-z27sNrv=R%P@i%% z&NBXx2g7bKdm_-qL&7$IZY|?nUamOQIyWt3|%RaHLC5CKQEm3uH&wvXJ!Zdgnz zU;o!&%B8(#Uu6vteC*>6v7jYcP5{Ze<*XL(c1ECJbcs$xh{zPDe` z|FQ3O+p}Sr?g1PdPt#}>sHR)gOY2>QPZ(s2vnk@yd9z0IWl;4p(Gu~h0VkUrgT(cc5=|sGbYABt~({m zRe6ZbOoNiWC zM#s_`Co-*WGL4csL=V!HN=fG4Bt7 z$NUUT#o$PBtcWd{^)lkCbJ9&3iO`aIzKUyDTM#|3cSiO1q7sG_7E-vsO1$TxGr{Q* zEN#&tnz9g<4Rj>)zPow_1Dbk9Yf}>w2JJkh5OW3=j-u&=++;Nx-Q1Ghmaa6{0O$US zuZyfOoxwBXa`{!~5K&+nrKBENBbXOg5kjzWjGlG1-S2P&u~3mL2X{s)_yv@S*fwHS zL^7`q_7AL7M|dc#$%9r}^CrH@Z$wUE8M7a6#8IR_=-^7xqhsl)lhwoH=Xpu=nT(Q^ za=S{Gcf$rbZ(w+rX<3>aprM-VLwPXEzO0WtIHAcxx`zEEf?^UR>pJtRw2ZIWXq}JG zIaJi{p-#W9lJupsa`MZD|6ogmPj|Ohn?k22AEj35uy0ytDNMg zy<6v1PcDoA%gjT|f;ja|ZRqy0+$6>RO?jKheOgR=@%r^5E#KFJzJ^?h@OYggl2=XY z_o&3NaO;)=ia2?+_ntXFK$ic!=Z32*#Xi18MZMySZr3)vH6Gvl^2 zeSK@VwJGy9#d|ghYE$SP&S9$Phc_8Pu{@R}QKBjH?uI*2mQoCHWruSJ$LT zu+jI8mDS_p{f{dATq5j?Pu9tbX@bP;P%L_5Wq#6Cm5N@|+QZAaa({#RC#MS@XpI7F z$?dLwF`j;#yHiGDQpMUE$UW+6$}jZm<_(W7<&mm&$U}p6@bTta=ihD>wWQG{ZEd{k z2*z)F^Tc^`JLFlP!2O9A!I?%;6JyM~>pZqWutM@xY8#N1L2@FtA-K@|o3wiM&zSVe zm67Fe@YcVS7Jtg7ik)u%23mZh3;^2(_qw`=uI#YW#u7A);d*2}bVHf7b}!)4H1mUl zCM{=1p_MMxU@EIk&koniKeYM$$AkQXHSh`^FD~Z~Z}X2|@(D(H#ig$M1TJy7E>i8DphnH0@F`cgbah0=~;90!B zvx&*J+l{Lb=)8Tqr}S@}K?Ne7 zNShfh2k!q>#k;bFYItS%b2W2<#ScI0w29mvmS#@o8`_F44r83arO8zB)qNjO-)0i% zXxW@K6>|LiOBo$+lM`Xe!xmtSRt`xfNtb z7n-6$6;Fpo*0Ygl{eg<*U|`*V=G!{Eo9L?Jr@sk-&1Q;wL4av?zL9ND1Y>bOsV8NIfVM=x8Mvz7g}Mvwul#*9sKsY{}KWXU4MS? zIrCr5YV#)uLP590m)q@a9KAn0Enuv@WNVXk%0I+Ly7I|ilAW+)nAXEGL+QZq_rCmL z*s}H$CD_|l1{pq*UoMHH`^qG*V~GihPY#skcH;^az~M(Ri$V8MZ< zfgMcNGf?h}ZU*|ZeGUP4po}ebU=OD@;EMzL18W53?Fy4io~ ze}2im?i$GJr-4vA-YE1$CW36DM=PvMkvEiCi-doFfiJ!>9*?05_HPzd3s#4OsuP>Pkqj!Hwm=;=du%1}}qlCGcc6>u9U<$K>k+Z1ZOq?Q>voOXM~3 zo8z2Tco(n7Pm& z$3^1Buabk>PBR!yz>5>-*I)^)&D-8KaAI{FXPbnD&JKTtk)9w~aqHVn6MGHOPGIa+ zL(>g>blNlx$KB!1@$stoa45VZ0K;CM(?7}p?GvH6FAxAWR)H4^eoi1wf!ZV)xFOfY_dg`^Ey!g zZZo_hmo+cyN8mH{14BZ5zK?QAO4OSH9)4-f#;C2(pHQz#fOS{vCR2Id9yH{F{oP1N zoBHEGYsSCD zcSj;+rEjH&dsKG6PETD?{_u;js`w~_UuV2?d#H8w9M4xUw8PSZa0@((;SxZHuNR*o zi;8h;Lp4ZLG&)`<4VcP|H?`#B23(EUH1JWyTy-^3p~WyV=XbWw3ptJ%r}Jtm+f=6H z^wuq{Ec@|P`H(E7LifkgQC8RJd?svk{c|*0{_)W=wZU%;Uo71idVLwr zM>Ijfyu6-hR~}}(MIKY2;Yc7G?doUWPBiL7^2e*rJWRe?*R?`=+sRXzSe%+;mPjES zsyN+EkQ<>~alA2YpoZvWyr0oL`y9~J&nE^Z^tH*sBt~pbhNUW>XAF)WZ}`)*#o=-- zF*AfRN?`_!&hK4ZrHXdU3_Wm)23(3kEC#%24 z^@}gz5Gq8@o}ljvn_OUsv{@HpEY3DZ$CE*>{?+Tn@vC&b77MruzZoaYJjF>xU=bGj zTOaPw;BdJ7pRe9L{CVZh>kO@RnYPIv;KTu_ipLT>n)@@uZp0!I8;3E$6u+HMWdPrA zi3?#-pv0+hE@%u{n8;yv+Wk3*4~djfBkc~QW~qA~A^WVu53MsBI4Dd}4WVwB>1i^R zbLnP=*WCSx>g_tgsh^7Kyj+%NG&v>}|L`{~WT&cTmN$3daGsaLI-6Yji5;OSg-qFF z|2>1qfk$NnBo~WF3?Dyx4m`B#SLgV@8HNtSTp3YSNkK}>5M=^+1#SR_9cB#T;^s^! ztPM=Iw*xMx>2lT8D^sBcm*~?=!nnS(t6YcJ8}mV;qyi+IrGY7=T#%*9pfg&ioOG4W z>6adoz8Q1%>$+-RnIOSHz zjK$Vsb!<&~s2teLB*jD;O`QP6I;O|Xp651lRZw(wy<%tV9JDK?m&AoWc7LP0-37!h z?L?0(iLu43`cjp5>(hra2>H;?2e8cb*B z@I4|re(D8=oUZqya9+X1VfJB(hJ*NTi67|i>{vUOD!j!?&z(<6oK2SiBHh>(qXpM> z-s+vP?Y1a4qK{|Uy+B+s#Sf#~lJ5x4sZI_c$ST7-8xQ^`JIth(3duZ{;-E6E(2G0& z>E-L6Fm=ak>g(81wIFIVdAu;X$^yMiDnz&BXYQBlIVw_vtCo|Lo9V|d_;cL)J6Tj z*3Ps!t|Cjr^_gE$w8vpNMv^62cw-3K*uXdjg9FZ+2L0si|u?^!bQ z-ntTkp(7fXZtj^U&wfsd)Wm&C5k%TL_v{*|6y7$q{o3U{b@39uQ(CyW(qGJ*ViGBI zOH(88(;6is*FT#Ks$e`)|C9HKOb$|pLhW!N84X_LQMo<&Bd{NPS(Mur1tDSCQb|id zGlqZOTq|P-Tm}vmX6ZRP^wg6n2CvA|<`!rMy)N!;qy{qD*eTv6(n@Z9qmwO@2MfMR zK?`48XB@?rp%8hgFhsGaB!JWQaek)gMEcp4n=a|arM(d`vIWp)pNEL$D}X>nUUXfR zP+#j`ZjV{1DbJh|F0vTy3}q@`789fa>NHPRcw(rg9Z!@&Dw$!f!X%)EUvxF9Wjy00 zUksr|-Er9b9FNKk9iNc)STh-~gxcfRU&D<9U99E#j!Rt?+d}#wMVs4)7jf=KOdh=uKhd*8yh^G*QoH*e$jj4vO!7^^s*bVgmxwapPEcUpMCM* z>z&Pwi&Wa&d32BTLl>#Kb%9D-+ZU+x(fM^Ae)Ii<&u#iO#Aggp17BwlnfkVfqDGDn zpnl=PTAs*Q`F?f$k9f52pU5KvZ~WG}|8N$iTQ8EvS25wAZ7(OUr|&^UCohuq0BcVU z*T-L?@DYAaJh^uKC?Hq(d(CQ5zCOY$PtPtWpJd$aE@PQXsukZg3e2iRH3%x8GbSH~ z$hWncydpt9!={v+$e+Tu7>f6Hg3``^xV-;tT%VL5DjsaJj_VK^w2dir@tEOrQAGo# zVR;`!>1PgR&|R1(E_vX#)EGtS^!nB;YwGtI)uI!5Gg*YEB2QFVH4~pHCiPNXZ2TxBT{r1B@8duDkVft zy_p$P`e^8Tnei59Vzf{y)9fG_2&cTuPO6~N(4yiK?vylcTZ!JWSJU95_g}z;ae-(1 zXgEt%i=~<>d^HF|@o*-$aUl)Jm%AD$UUcFxM zp4D`+4>l`ypJ4N1oqalMaF+z8ZD#y%Ii;g1@5M})%57HuU<2%!qC>BoUB{S0D(T-* zBtSE5(Y{{7v?uA>gZYn7#@9DTe)GpnL~lCNd0^?l2>0D$5#%pR%Y$a3f4sQ9KohZk z!{*j$o-%Cl{>%=sY`De&-eIIDM>Fb zIJ_D*nTe6fxsCc=LvgcV{`yj8+_G-t%BQtk*JVSRjSig2R+eoa@zfFM>6G&$mEoNINgX?D0akh96 zc(z3rq}kRjKaJUSg}@{UIm?z9^FI5eXD=?Wgy{w9{EIpcT!>-K^7Z}qwn*DJ)b;|~ zD_tmvKm-F(mLTl|lK>3uhwZEE;(QnL=%5CPj9WoYOXYGwIi?TldgP0R6QW;`^0-LG z6_(Z#MRCv}N-%K9<;zDuY+b)`^V#Yzm*#sj$yC4Uf;htc^%6EaDAaGEZ79vcE|m1f z>16dMuk-3kNTwkMQFjG}nhKN*+2@pQsE}-0iRs5FX{HgC0{QNoajsI^lEqXs?c93d z@^yYCmA+#z0#^cch518gLeW7&*P5`(TDkvexb1}l`Iu^IUVSJCd)PW-#n89FcWbV*V#LkwTdJn%C85ef`x*?1Cj<74yLFsVJ#fy%8> zkI1pa09emWlv84*u#SjV!9WZ@{xnJ!ov=PyaG)?cD|auWQ5`IiH#u6X@x9+E|Kg1D zN00yejFN9PW~-9mTxEF&9}|_K z^QGhG9Q0x=;!+&I3GbhcFJWZwU6u^{4_%)TxZrb1hj&Xk`$8l}Za0C4uC?5k@cW9A zi52B8=4-d`ea-8?f2?8VXkiCoXx_lH+rB%V9br5>J;cQ=Kv9AK?vAiOOsYsRjV5vQ z&7s&HW3XS(ukR?VqFjy@qGRY61r{7vOxR-e?4BECawbs1rXC@!QZ!PG9{U+N^TE)| zayc-My$`RXUZvq18yz`aDzq!0BV>`NGuS~Y4bo?{Y{uxUJPs_Ub!P(?NzIuIiA=tb z5M%$&${W?`*=~T)u^*RvClxxV6|^tK%=e&{*GV==h8Lcx{gd%_A@(9rjgo7X)8~GX zGxJem_EDA()@K$}t5mL|$)qmx_r945b+h}?*14|h9hWICOgZj`*>G{Ukw3v6;mC<& zRT@QmEdD4s8Kflu4gi{%7Y3?ZM&gP(;6)`f=|-~h9&^9^B)NrTnnXs=K(8sDLPjf? zAy^eOyb9nX2zg?zln$6YAh#WEQhqalRM7^-{2xeKrNzUiUp>CYf1c(-v_UAC9Y;C| z3AjEXExlb`OAdYQ^T&@qzgH&W6f-+X!4{rD&)oB>GvFJ7Du1Hf9x$ViIj23|K=PPb zmqo+&AtYd&Al;a(8u-{ro}4b^-2BC(r%4e_K^K!_z@X>#niV&UprGCQAz+&PUxEV- zlp0^owx!fX1c`yS+pkOGU%7k59O8X*%WObMSOqTB18!@eanUJEE*EO?qbnE-X-C{4nqz*dWnn%L*Un zKh%U|ebz=W?sgT(%^eheis%mZ$(W|f*sg7DZr|L#b^XTnt@ZWot=rqTZ`|Cv{n6-m z8xm;Rtv-MI=SC7Y1}Rg{ZV-IuE!@$Q|)#-Q|Q>lxLjUci*5*C}kn5h0l9+MpZe1sy@!vk z$tFH%e?|R^Sb{p#GUyQWQ4N)VxRMOTwzzX9eyVrIDSO^|%bf6?+SAL&gw`Cr+EpSL zKSWm~Hk2wwWA3@_Q&S`rZhm!F)pg6mnS2!q20S%Tk!f4!)sOLCkj&=~NMvA$=M)>< ztyK}L5L7}z=Q@Dx;7+oS2oYHpZ=#i<+in(+j4cpdP6Mw{KuKoc^D-_dJetqSewI^n z>!;PqZp1Mg3n|y7=BS0F%SaUh*xxnj8%OiMJmEp%A(EWhr2)88fxH}1sF!0#`VWu_ z%i{@wihj}b+#vMpEy=1RAO;Y18;dm+6kVw0UKAK~Kv$DxXi_+VKbN&YmwMS;V=~f#Htg z4dVB;I%f%7Slm-#&1?{n_Fe`EEP2d_-N05VS!$oD@~pGj6W~k@v|>4-U>Ugw2;3-g zJqgWl`(H)9hy<9{BltX6Y54|?*zeu<=wf5V6s7o0TfV2c#r zZ&}j@P>evZ_~~iJ8K`e6IP8MqU`%uj9Y)yUDU^o<$3>po6klQnp-%7>8?T*J@60YwQuO)bM}T?A1N8p;(j^@8){dA2E&L}ymrJA-^jct7nr-9=l|X%tst z&dvl8g2#?ekGu8Ho!r1^fR&7%6HBFb?ebi7BPN(71-%64l5-tLJx_Fk&ij}gBO!=n zAHJLG3;ce4DIK4&^~K(pr70@Ml@-m|^*IM<8+#fY^Os*gjS=vz^lAJ%0=TY7?sfo) z3wTGbDVWNsTx>v0ykzy;pJa4Mtf+x+A9j6rUSVJNnT2{u$be4ieEL#Zi80A4>w0aV z+?=ypdp<$;OiES0{S`2Y`5aHB*SK5Q9kEb;{$l;$O^|w9_wQs*n4hfv@GU`FN6&dL z@nrAW)iY{l80~OBGZ=PaY=;VkuxAP)3Xg7G3d8;+jp;T(R~exejf=iBt^JC@%Kr51 z%IcV&6M1;vx@M(!AR>+#1YF_E5A84v(V1<-$5-IMHKSK)I4`2^x%@bKmE9dPTr7YA z)5~`r>$Us+L}!Myt= z&aB>xa%n)-E^S0_bQ!8j+>Uk?E?MUMYz{E!19-nYrqmyiI-Rd++pq@HdVvkK1F_tDkaSV!&EoI zfog`O@Y>tpQH-)T1oxn!hoFbUsbjy4F21sIGF|9gO4N`;e!x#iv*?c4HUQRQ?3~vl zPZ|(LXa-o1+PGNE=vsd^oSJc15+2GUl=M@?9+yasD#j^TybI&-;Kx2r*nYmEoyDG0 z)ZfJg@(tPjj9(ewe{54qRc6bQX-A2$g8mjZ$j^)$J37BF>@$n9}dX%5BfV?Nt^}}!=mOiTLZhDmp!CB`ShJFu; zhm1b<3(M)(&~hn}%?v9Lsm2r;-+IH=Wk2}t-d4;GU5$8uHpyh7KhPvNh}x^H2^ewK zBr;y4pLCe+vLe0yu5S(X7fGD@!wBB}ZN=XBQw39EEttouKRh}SgJD|3<*Jri@IrNQ zRwRJ5(=!0Tx1FlV?Dv0en^a}?8r47%ZXUk$u?(T-{vJ418U8AH@M^S`Fi?m!Y-n%9 zKu%5#%b5(ICDg{w+1#) z?jV!@ESbZQC@zEM0FIxP6hECZN!w=?9-q_DMJ33W&ZFCBQ?z<^`N@^h!MnW!d%(({ z{Y(@dasYD4gU5FX+1L3mc)?URR!=_*1b9T;BBw+_`4JKH6Nm#QIrN0&IP*13{(MCvUEy?stPXtz@Hv8zX(QKCWLckh4uRh;-EOv=WZ6s2ajHQoZCIT!;D z1pGS@nulT0&rf>;S$LCRrGkBv5Wx98Fil3M0R45(L!qh^iR=&$Q;*qSW6X45RX`8@ zR;uK>r(Hax%LICTjp}?Py$;QwP>Sv>!mbj)BWTH?UFbsr^?b%oA&L6=1Rju0*_K0! z4v6)uBYfepCs=%nygH0jo?W+0!kxQe=||-g3UlmU+HYJ6MgvRs3Nc14m%~G-6vo!X(FDjawqe z-5RC&ldm2(`zo=sxcErE>$HkJvECcBGO7!s{c=opLcuKDX(vQPT(C_!Oi#yZyV)I0 z@YlOHv3m~R;kb&16vPWUbRQ%Dx3kltrFru~vIt?I<^2!1vxqL_btk{MfnnJ;dD0+B zx_b?f+!dB0K?JXBM zsQf-AG5MCTwt7>%cD=7ih!*6Mo0Z04y_;D%Vjj>oK#$c`8}jFJ*wdjkC9v%uj6@fu za7Ks4O1q_2XzHfM!oO7M;k~EbW@2bam8(RVon>}fx@mj4Qg40bV*0@jziZuFmv?>M zl$)|%TicW5zUo{g;e_S__Vnb9gIg>A)VemjF?Ez9Dq+=Fu=ULi&a*3-KWk$K8kOVh zemn0yXio`L~8-BD|L@HSoH+--ShYsbv1D_2Lw zYTQC?7eIWQxp8TAKD#P&TrWo4OH)fuerft*g3r|7U)Vn*dn7?d28%(%+7>=7ok@Q% z3g3xd?V&@owJX&y>t@^1udnv!^DlVB#Q$2VgD~iP@PzkDPY|?0+-?Fe#8Ix6Y%@jl zg)@*{Z+CW#m%pTCd=IB@ci+#$2l3Sb*0S{_GOf;Zj_RL6(2KojKX73>XsFDgi=DDJ zBV*B^)0Ng1q;7fVmiw}ea<#K5IpYj$vflk>7q&{u3nAsL0koq;7tPx+F=4wiOABPO zrN2M|-O<3M<_aN(YTRLAYQK%=>cMzj57+nluy*n#=xmgO$T?-}Q-2;K{+M2yb zRJ*IZ01P}7f4L1cf{|ajd`hr*xmSYEG*5?bPp6PWI=|d9j60(dzP6qAuz_wg2}mC1 zv+PQa5dMz9oq$DhK;$X#oG-l@4}spbsDt)%cQ*1#xDo8i512C3bb=%m6+KUaVJuOH zflceIWK10XE65B%CDumQIfe<~2L#eWPf)}Q zPDoT9^N7}!1?>(CiK%MtnjMyaFnj)iA?C8`NrH=>JOR^lz0qxxG$_tYx%$!@ID?4~ zEkM2PX&FHYUb22?(6OauU?MH=*Qrq~&jl8H#j$$M*A4320r~A82W)9y@`apM&i!h^0Djr$j!$MZ70uV(9JzC_DR2iPb7^-cCezxH~g*X+mTiq@QJHn{T*7UvyS6KM;@PDu* zp4}ckE(}l_c1*F8V~1-7(hOFJBEaMd;(lJPOk8TVOm$EYi6scmtvftf%%l|<>@deW zua5DraO8;q9T3(^aW}iR$N7oIN5UW-L|pe_aBGC z%0iqR49;kA7O99GG+NOaV;p;9nd7ij1?xj_%7pElPK&>cVWrL;JEw^777O7~_GXY` z7%E0c6{PzF{mLDT7(zl|J33iuz}hEcMtL>Yj>X1&0;~CEYw+Xl(AVpOACHH=ZV!H3 z41N7*@Z)e*Uizv_fX02Y%Z~QG%#JtPPt=(mw~Mr9eEMjkt){+a$L$KE-i_s2H#P>E z-XNbyGZX9X##ZN>k8!iD7N3Ty4GnU0V`DPVygPLC$rC?=RrdzJw)-6`zd1Pjt&O3o z+k;;}8k_=O50}nyc6@VxU}F12%jJRiW~XDh`^Q67hiWbctKM4f^VZP5-d?VEduXF> zZx3w$?SZi;Z;y}P_4gEU97_Wb*&D5V-&~qoTht%ADO+my4%NW4J&!|n^zdZ2Q!&4_ zSIfU0U>B)0-(IN4%hmNA*eG`A?zg$DtZ}wB4^qa%@v*v`zdl?@3|{P>^0;b#d2`Yk z$I{rixPO2@dM}C0ks>eU9tn|_@gAg^6XF>;=}_V6?mc??=Nb|eV=6d}O82JyR^AYQ zj}ylucx3c*a7_c%NCXhJ?Tq2Golz8u(~(5k&~^=QUKjuW9)3uF1j^fXvNZNUrExnE6!MdBWNKA zxn7!WH@BsBnjztOhP-6X(7V|A=oMD?e39Xa=BD_zB*F|Kx6J1}yeg36D!73GK5Eb( zzve8uWV$G8bxDe-Y=~)Ruw|6v!Smq8wtV4F+@1(C8Q*G+spa|XRNzxnzSO>yIvfE% z)#g>BZ+=+Ycy}28TV>e%{VcjZzcEp<8}DvLn?KN`KZ>1+Sx%c&xpk7p0n1Au(-yDC z?0%=+{_E4{(}S@^WBiHcztavbGwt8T(fU;gNb{LB)=1P04oByK!eANl4MAAOF|r8s zhk&b(Rr5?R6O{T0bQra~>d@SbPYi?uIAcDNWf$D{25}yJm77>bHC^DF39eZvWZczZ zWNOVf)5+WFQYU|&BCwDF(mYRuW%UzP5ynYLw7iY7i?$#Hy279rqxGH?3Ppa7w1I&E z!$Zx`WFkjB(Ss0?(vL&w8<=XYTBo9PNg#|XC?60#>{Li<%}Ps_KYpA4w*pD260gj> zr!I>y7n<_z&vjy^mf|BeUit89ap6ru<;VHmSN9*@|I7yd?(q|Tj%q8LxpF^M`8E*M zlLzFw+O#^-=SWZZF=yZ*edX-xw8nh%*FKtYV&2r-m; zsnW6nrR{?Vq3trCg^WqF1-AtO^QI{-GJd)_C}ym`pw#QHnH6A^hL{LKHY5+GwT#kJ z!miJ)01(gRnl@RyZ|d1IqCSP}31G#aM*3(Tg52Mqjo#_KyxldWtFV`9O{u(=I!H<~Eml}e>laa`r2T(;~)Nt}{h zPU6b%|Gn2eJ=X%D7!CRM-^V+?_r33Y{qToxd;Kp2{60&07v;?BgW&hT2j9RSevLN; z!3V)d!F#}e4&Dy_4R{;4{>LcbPlI}X8e9whJ-7i}^W#Bq3z&d+fyY4A`#<0ZzzuH> zg3aJ=@OtpKJ^n4Yh5O03xN#l_*XTW{{{9+NyR~n1<3A2=;{Fsk4F+!uf}4Sx!3pqj za0U1q;H}`l1vi3kzAOlC1b2XX|2%jPc*Nfamj}UW?ymxW3fu|418jjIco2L$_*>vA z@OMGF4*n~6H5gnG1n&b@f@{Go;5u+0D88Nm87lZI@cp1V<1)AwycWC_6kirV(eY0~ z_4A)V_47uE(ftNc_bq?_>!9lY7f|%P`JF+)|G^6W6v6c%tO`B>s{Lc2#y<>-U;i0Y zy&wGvXa}zcHJ^vU2VWNi&w%RpPkz#k`#td2xW5)5Qh(n9uL6JM-H!hEgKy-1288sW z4qgL34PFU;4OIPq1Bze&4P=Rf%V4^mzYjztg1h|vM?gds94J0~1JpQw z4{BYmcux@Ue{eH@Lh$3D#`zhLD#5RUYrx+D`9Js`e?su>{1G3o2UWicicimj8t)XS zasJHX{{=7O{_^*_`m4Y|`#{Oj=Rno_T~KoJCtwJ^ zgUPA>4WQm{^Y@Q}h(d4x)Of!Rir)VSe)}H;!QX-(<^EeN^1lQp5UM@kcfsET=OF&$ z;AJ$fgH7;$@Q=U>cq2?GgI@qY555j2B;c38dGK(cN5KC9?gqDAM;q`PU;~_= zboT1oV2%5$VZveX=fOE}Ba8kk;J*N?;9X2!;~xe85%>;-mdl_DYP`>bp90_dfgpGY zd=Aw6zXU%CzUPDP{+GdR-2Xd}DFyGn-r4c3pw{yfpw{grumpY;6#w3GgR_5Y!8^I% z3yMF#4Qk%k-AG&TB~au3&=fWjydHcjco5tPegXUl_`g8Wv30#`|0PiKe8WxdJ^^+A z2mXH3w6o)119=pD7gT=}H#@m|0=$y@Bj5wzH^KYCRkt{P?E~-Q{#&5kuMDIH-c6^D7`z2>uSd2D}?)(N)j_3*f&7KLCCYdQ~ zQ1eq;(fMPP4HWgM-xCz|_blak$`4ZzZ?oZ_1%HH+{@%oec&*=CCNQNa`t-ze>YK{p?rc;q&!U7O?e$fa&R3b|GSDC@#*7~ zclsA?aE$Vpzt=iH?ym)rzrGzrY|QQ@;M@K46<|!+L)k&OjH2HQ4onZUraw-RY=4mQ zX^MWUDWNX-q0(kkJ_9x=+bM{#tuJ6d>0*;|rMnFdfS;nwQRXR6Qr1xr5Az>@{oc#p z=P3V>vXdemOn;lX*h*QTpuRo7PjdG(* zH*MZ>M_&hfnpGNAqDEA&MD_AwSgp^-&4p5{8rQjYO|s7FaXs?gm1?c1S=Wg9U$tIs zRZF$nV%Tao>mhw~>n)VZ%{WXJ>#fpWM^Yu4Y0niJ&1kl|x3ExZg!gXQIDO9@_lMzD zcN4baQ1=jGb@SAvUCbtn3*q*UZk_({ty@x3n0&P!G1kINT+>T+G*{gn)x+JTT03%W zqrFi%X_d;m(q@Lu=+Sny8HIY=Zk1+g^kbFaOW2yPCSg4DiKyIieax0xrCMQ6sadbq z=aRIeRx>KK!t7}&38Q8+ZYHkHT!lBYg*9nyhjURqYKos5@4t21rZsNDbM!hm={X3R z$p%Zi$vW7+a|UZlIk>l8Lg7x^b|&o-~?q zrCrVwY&vTq>=)6oU~{-}^R~f0N|lPeKtPhH)GW`3wQAB5L&9RUUaqw(7%DWgEVj6w z?jGz#PaN?!vC<3%F-)p+^{5iYFk-eA@3C2InJ5%?MUh|nOq=w`ue)FFa8*>CE6NBo zTT(~UhDWxnbcS#%-7GY#{e+~eCeyWb+vczwFEm)snQE=tS_~KBid(=TY*0_Lajg6$5qEiLpfePVOKQWgsJ*z8Y^g5k^dkz9@3C9H{?QN{ZESnhf5GP4ZM@`bZi zjAA5fTAIZRIzxbM@QId?H%&=r3LQat|M5m0H!CfO`j#)8g!P)$* zn~aRET;;r#wXDbG#t>_gpJN=}d)wWEp0F85klB;?vDB`rkMiR9vaUpJm?F5Cb;%w0RcsA7A z>xv3eW~V~W+#+qN3;k`F`2`wTFPGk|IvYKj`1r+%d{C@mkTa4!wIfKymnb;PXp=J2 z0Z%Wshek|IXAaUOEXPgkb0cP95s+e|oy_|x>r*ZTMHFmzHEv_Yyf*LY=;ZPUiE`(`ZI zEL*P^<@r*54h2i)snjA0nj!K@%-@bD!R9(4G;s<~L{U9vVnhRRvqiHR;(JBHE(W6C zdJ;M3Xxt+Dz=yY*?J`*aR@H*&*%Dr(f?Y_0Eeg(EFp`7|ZJhiJD;g&ZN5DhtXpXpM zEV!q1&&7;>ud|_3V|c^T14(-Z`yt*Hi^YfD5N4T(q6y}nP;J?5Bt%k?4HL9RYH{#h8w?zHo5?BnXxLlc3pp#i*JUF7lw>D=ia0tk@Jc**ftxF zCUd^G(L9n@sNuqEVG_5SjXQ(A&VJebL@V$!8Akb^l)`=EG3ON|Mk- zA!QmD^w)RywDOT#%8oQfA6b9exnqkh5mUQcl?oxMEjdpm2p7LClFWxBs)&1Rnzuuu z-&MvvxJcG~wmOHfS4@9OUNhvm9vM$oqQKUO`OGy-3nA@irSOSY`1Rpp+{Q30lDkw8 zQ>Tj|B845mWGF7dbik2#c1$-i2X|V+SPSoK&(v_FTdHMpvnbQ|wIPACwgj5Rv7W*4 z#aT*2qF#^X|C^EMmF^s7y?qt-NYwP;Rsfsat|Mm39Lu&=4yud<@)%5N6Od!QfZ0zwqCg z?o?vU%LMRT47Z@y#q=dMZ=wQz!V~gnJ8nhm!v`nnLB>9+^faPdAJ30?yq?H!Pfdn@ zRQo6?m+-RLko_I8!PO#tqK6S9NpI?N>%*1f<&~pGvG6Nrp?d}qYmpw$j1u{0ohgr^ z+Zi?=^!0S9y&j3ON%d^4gz1pH$v2w+!x$3Bu^5_2$;a`wzA_eCA{R|%A{dNrVU-sb z@bVX^wAnslK10DR>49e!99UBe4y4{*Go7x_HRE=}$-G#%{jN<9-?{DHo%gvw#BHn~f)I#6 zVVSXsPVObfx@*hMEL62aDL!W|xu;1M8GD_{ch`NVtSkSib{gv>F$`H!gwt6fN8|*yRD?zo6ovdOb*a~j3b7l4i zxh3z!n6Aj)`$)U$<(lkuW~6LO#MZm} zt}9*kA16Qowu#XGUH{d_g3``upA@X?h2Zb zHZt8llJf?cQx8%zH7F^AIl<_m4%oG;J%QmCj za08?D_ME;JEBoHK4<8wi?JZl|yV1^^ytU@>c4_E~Ew>8P?Jh?;L?#Q4DfcyFeF7dC_7>cZp)!ZoX> zCU3ZQaxL|?5Wg38V9XLC-?%vyezeWr?1$n{*5cjaO^fYjX>r4@cww=$t6GnX&GyZ- zsL!<#oWhQ%v@jKJYh$-c_3$Q0+_13Ms%+i7^^Wd5R~IM8ZjbRUbw+~o?0~V8b6ulW zs@B(A^n#j9@7%Gea6`AAD4LC$g*&jv+NzlfZNPKHxvU-?CU06j89w%yYeJpLYiP5YHfyd~uRYXJzoq9oXO^DqywW+jw6AlnbF_1K z>4~L-Vdv=50dCH9j)$u{=R4;@>YU;Bm8DO24tLH{`*}3ge>CJ9Wan2qFLeHK=U4iM z>AXzs^VHsN-TA&xcFrz6)j7w2XBh4o>x?0+@=;apoYY`6dSdC&($f%=^*5!j7_j_i322|L`1YTZx5*j+Enf>$3|D@y4VQvpDJwZqN7=ful z^-*SapmQp;DV*ie;m&DYFYOOCS8iZ34`8%yY`eYi{I}B1mpfnSyfEGQeCG?Dp9{mz z7in>V`bQikYME!H)n3}iBc=!yp=;>wVcR)qc!hzFbMxghJ~6tv*=r$&dHQk z%e1kx*SwxCwN6h3svveSImsC0p+s}juP}ZYg>gR9vV-EeM zZK5a0<_Fb>O82kQ2cZWIKb`73#`hT*jzjaq4*f7MlWe_eA}`ZXYFrqa zL1d;dlu(mO?lyM-cajj)Q>na&5vV!Iqdv0LB>}GXxB1f;E_rN4>q1vG`YnAD1M+%bN*DsLCASX0FY#at49!g78jRq(2PxGPQ{$nm_2H34Lh`3F6A~JX(s?aE!+E#Il{}{t z@exNJ#6~Qh3?OdO@nukbsg=`If+!6vU#F*xxvXe=cds@mzo{jXiR;}TZgGLth;tNu z65Qt!SuV}>>y8E|4@Zq0B0_s;u^|%AKpev`ZjU%~VI0#;tf_IqSn@JLgO!l%D4suM4l1$DXd{N^RbN+vJodh+{_h{W&xR#G#@w>;E4-e&B4J;B0;^A z!pce`;pP@4>u0paECt-wyt#H!@`!^Y%gmQ9a#8Qdn98_0;&92bD`2Nh3PY0~$)^Q} zd7d*l#i95N15~S zECZ7!xb3VJ3Z0mQNsL@2H(#fz;vLPl|6q$m1am_*zaN%A^>UG2vEj=mny;LlbQx+* zoryf9=)ssh)Qw?5vbht!NX7E9Z&p3fc^JCr29iBSBReu9nYPJe3y#{5CJ4R0FEe#$ z4nb|tfg16U@$=_uq?54oNY?^{Mz7fDoC8scwB;Bzy!HenjfxJA(w`iu^BpeHK4eF3 zSW#-2#wz^DbxtGlG#m9~@9CUT0#>}xaGd2?b~wbL=WNZZ9mt*kd5wlLx0p}hNmhA= zdG8Yt1s80jbB5>wd|(&&)iBqN5~-osWQU8EUtOI%dR61(jv;yVV!ntEhDoufRD&y- zQj_sheaDhUty=D!(nWUbHz(K2>*3M~(EYx1tp zP-fPr73l_-b1f%05B7aDHp6~QJTP-h%%$B>>D=j8bBxT*lj&tiDjT%!JlWtYSkp}? z4^h#Mmr3OyV3=Rfk+W_SB5(E0K46c6Y6F1T;6Vu(JdR_7 zIi2_8Yf0xtZ*18m;mY@iyY5lHuAMDF@=uME8!uG*T zs|fy-I30%rh??0BZY|Y7Qn^$(cWCr5{uE$t7*BU^&?+%^d7~R{bcgQt7MLNcW|RP2SN2`*Vha1o!NVjBY>O&8;9~ z$j2_y+w|MmD$_i(4%)IjlCuu*M(L9_9?2isJL!Cx)k_l!OBKjVI!Ahv6YW??a+Tj` z^NZx6b4vCFac~Cu1sKt@QE0iE=gv6>JZle98+4FXoEGf-7M);_U7mi-dRJ}^Uk~|V zQfq7D`&E?*8*C)G;j!iW(4u4{`|#5_gUdm3B?~f+^vc&DFDo{BcOla)tP@KwvbMSq=-Cw4a%*L^J;Y}QE!;70eU)UK?3@zYi9^!4LyQF*w9@99xm4RkW*~FW1MW}j zqk6IjXT>&#vIGWhu_|H~Gk5!RC-jMu?Q>Q_)lcEcZE3VypKXU5!6)1SP}=wS3V8}U z3R+0FG~9Vm|G9EVs@wGb#Rgv0J(~W&z1pFbw^q>Sn%ZY`w4{E2|oAR9Q+esD%OZX6D zsiN0XdXu>DM>aQgkjRgXo8{Qn z;uOoMP7VkB8Q3Lp-J0>%!YVH_W0xMT;9HMQ6PY|(0xipV%0kl~-{%g8+Xxl_xNmaA zOy)_6l`Q{0&v1l_PTI1g2p42uCd*_`Q^LHHj`w!8v*asX7H= zA54`74cSY%gnnT`_Kicq{&UPi`$-7EYdVbW(P;oT-lY(&)kWx8SuK}7zPmV$3+?-j z?okc%fgN1)-$hum<0jp`?`6Q;#7`ot7P^ZG93%1)n4OG& z+h&SaD=1NPEz#lo49Dyx(1@kB$yAqJcUe+@c8IyBVa8{yMXz~Sudj&4o#QgI-ZJF2 zojT{PN$r8QRNU#LOxLWX`|@rQV24A~m}h7^MIk-bW_c^_EYaY|1AT}6OEjt_t5wDa^i#u??9Go8gYnKG{taPfHvLCqYW_)%Cs-R zT3%$oOvK#D1r1qV{v?(xFHYGQ;Z;<7!3bNLisTzGDM_-FcmyBhZM%Z&)2{5GWFXT` zjg&i*Fo}`(=&6{d|LQ{WM{jB9=C1>hrm*$^TudGB5Me&;Y=wsx{z za9v!^c3g(FPXCbzxo?{Oqjue0yxxB+B4!TjIkhi3p4@9)+&>{1)y`4WXE*#mE?K@! zkM#HPV0i|xFoQnz;+hPYT~Ff)Vpg&O1ar8-;=7c*yZKpHWhk$uJM<(mJm(gFsFJ{7 K?crQd4E`U8ogj(; literal 0 HcmV?d00001 diff --git a/gas/po/rw.gmo b/gas/po/rw.gmo new file mode 100644 index 0000000000000000000000000000000000000000..8879b0effcdbc01223a2cd5c64a5b6abd25115ae GIT binary patch literal 396 zcmYL^-%i3X6vj1rwM(zP=!JLM*$xP^A|XLch%OSG-k0rc)Qpz2XCM#a>-j96B}TsV zmp1vnoo zVgR;Y?eR3l?rS`r!lYkc>+ux9gzG$>AgqJQaXi+=^;n+#(bjuBe-N&>!Q&}_%dr?f z!kn0KqsNmQ8{!n4gyS&tCXeS&+=Ztw=Vp(m8~Sf??f!*j2yeyw7-p--Qw|Gb9vo@z z!}5f`U_~so&EqMGQ!oc!LyaR~yT?-qD_}5=Le+l)3t-$Gu6z|NNq9ag{}U{ZX?J=& zDX<-Ce*QL3VJ5->yIlYBqtb_BX*`IkKXA7zUlv0Mhhi|UM%Dis+hFcJZriv6H>Nn`+MR<#2tUW7*!i%V&yARZ@CVfT$3NonGto zGZSuc%;QOg6EQh%#ngD+^gHgtX)zk{6)*$V$K^O2)lRMxZk=mlTEZhSDXznKcox0* z1mj}lla#^asCsK)Ol*P5{})EY@fZQ8oAXiqU4|-u8nwT|vU$^C9!!jlQ1$jfjcW|1 z#MP+royRoz8P%@$w41k_7)ZDs24F8#`Uupz&cs-F1{>jhv&0!!-y-x9e-e}7OU#ae zXI=flSe)=*7!`M+@*T&__zYElf^!~Ebj*wze__49)?!w?jQKIbZ8z^l zQT2AfFt`x4E=$bgn4a)UjDzw2b@P`6m9Hu)z8h+Mqfzl|FdLr7oEY|wYbP%%JruPL z<52Ur5tZ*TX2HaF-M%Y_Uc!A)>9bM!&!PGq?w*U!kI4wP$AmZ*b)J@@#(fS`qW^tY zZyHoRwaihNitsLskM~gf=o{)hrh4G!Jp?tc?NIeCFb|{JeTK>({-LWcC8i);8g(Ap zVgl@qnzzZQ{ka0w?lp{y@65=L?0XlJ6Q3K^eofT)$D;PbevE-HQT2KryL}rM6)uYE zS1r`O>}u%~FcIP1sPSJ%ok!0T7oQom56fV79Dr(ny@j8m)+O;%XC>4;3`X^94yvEW z%%7Fm8XSq5r?r?5kD&VH|HAbnpBai8 z?>tn$c4IuehMKRpsQ!h0>CA_kr}pM3%ujd;s@;1Sf{|ajcFLRmQTuEIYJKmc=IaM) zU9-J*<12%y35TNEnSjc_#^R5euQ3|&ao;%8m_b;a_>!pk8HL&x8!;_jHh-epN&D9I zy8^}_{3ohELop`K!PvOYJd9q#H&FBS9o5hH?_52(QR($i`??P%#kuI4U(87O8fsm` zzjy1I5jD@XQRT*BI9!W4aWkgFXP6sfe{kQQWibNbsu&6DVnJ+AR|4kjSH3pGDiFgAWgm5ct}t#1xg zxDF~`Z`Anbp!$CdgYYwE!)!lXJ&jT4yc;ILe^B+TLG7D!sP?{?(SExAr7}xkEYe$G zLhOlZXA-m>*Q55!Zqzw=j9TBA{(ioFoeq-{E`YxILiM{hY96Mb=4ZWy@1xrDgmLwFu`t0P z)ckZs-5aw|{oaV$=O-{Te!}>eCaj-to{FH_sfy}f2UPkr)VW-Tx$p{lF(90)KMSfK zB~kUZK$V|}g>V;YJl|0Bnl!whZ@(7A{Dj-1#=X?SM^NR$L~!+mpw2@F^nHJ!?zO|H z`{5;O-8>OpJ#kR!xlrS-i`u81F(!^ijcX37zgy6Y4^jIw0za&49x|ZfOPVb)2jStU zeY735zuuzeCwyerzf7onl~C(72-S}bsBs*(^q&|=I7bve-}wwd%~K2X;&4>|mSRb~ zj1@3xRF~ckHO?^@j2p0~AHOa^^`}ChpYMCC3u@eRu^O&NwG%O#Tel3Td%G-Zzt%y` z&p6b*u@p5gr!XYiGS+Anud?fJ!U^O6U3 zFSJFqH`&~ZTE82peew~#7$>Hm?|VK7HNWjq{T_lkSF=&`umN??UPILrIhH#gsZi@v z9=+HHbzWwp)^`)C|1VJe`hYq=-qLL$x;rGvP|qc&}jq{y_C3Y8*H3IZ)wh zSOj~b%5AgwN2q%uAg-V9dm{+d?=GnM8-tpM-KhP43$ zfQ4U}Nt3wsuZYUm-NH*y^Kb@L?hC5FDU-VOEr6Qm%BXb+MfGzIYTnPI<|$$_Ki~IS zUetbRX-+_$*WIY~e`xVhz3!anMeUmwsPT=&PIwJR`MQbfpC^@D?@XxhAE8bM!EUJeT!q>nRo{Npy?6&TFJDmYCgC^FH12|^_L`y>N2AhLqSpU}`3*Jy znXO4ft>GBssotHYOcH5%H*$37B8q|1?pxX1~^7H+= zFrV24m47Ab=ed8)h`HUmWka=B6Lk*_LFM0yrTzGQOVqsN&g1600qUOm3)TNsm>e&l z&h1CkK1`d}-6O@ZJmH?`#lz-f)I3DW=hh{?SsE4J64mZ7)VW@Rx`&QqKKz1_Fjs!J z&V^C=s-Wg66tyn>Q0uY~^>fl@OFx8K_baIV8Mc61?_8+$sEO*wK-B!sM~&+mM#KM5 z>k^@$%NHLtZ+WpGwngpZC8+P6U8w$izyg@Cke{as*1+7j71hsIsCo1+?8cE3bzVxK z*1I8UKXpgdH_pNvQS)`m;{QXfOX4DKy$YLMQ1MI5W2kXGN1caA!EPSYVidwfQS1E& zYCMBb_tP}g{ks!2ua8jWKce~6ay_o=A!zZpaD1FD@o#hpD->$wxv?n%_R z-lN({TEfMbM2$NXQ{Z^idEJ0&=OL!`=hyZn-TG(d@Dw4w4SI1ID*tiRdHZf=EaUcH zZLC842vmJHQ0w#+wGWe&b?ZR#=NDmUKZH=*|R z9rXQNRNjrN66*V?3#$H+sC)}7{yJ*EyhY7Nvmn-OS5$vvRCks@-DiJc zL0pR3#}85C53J$lFF$IXI->UTJk&jNz~XONe6*Tw|K~upQyaC<#-RGK4SnA$X2e?V zp2~*WccoG5*bKD}f1%cQhQ)6%kD~5}Td4lOLd|Qk+OA(kQ1#SC)zcoezT;5qxg53r zM^NoPL@)Z+as5n*%2x)JuLbIy54P|s^b$USnuiyt@kXfY`da|iUN!V$2h@Er&fJW7 z3Ex7kQ@nbvo`R@$YoO-23##48sQUJx?)B@acHdciKz+CV=}`5RLXE2(s@!nY`Y%B3 zr>&^d}Qf?OaBr(&r4t1~M92vqs`sPD&HsQHi3+|65dRJb8(UyneY$4#hn ze8hZ*nunw<+vICN&QCA^16sT9*+i&wk`=W-iko#Ty`!ZMMxC>1sQEsM8pnOq zIs~?H-~X9V>z5Z5UlWzTE2>}PQ2XM5dEX4%)}5177(#jp)IJ@Cx^FjPEc}An|AFmX zy=hSSLQwPA!JL9xpWUc+d5)T=c%g3HgHiqLfJz^W>gQGqUqH>*Pt-i8Z13hNzgZF0 zpJu4_?}2J>BRhcu&G$jn z{Jlc`92Kpj+qX$k`#BHld$R>Jg<6lMsPPO#wX+a4Puo%Z{RDdPA!>di{OR(?HFIJR@s&{PF$^^?OHuQF3N_xl z=*1{qU4Jv7*0&t$p6G#UZ#-(=mZQdX&cbidOE`WvXFk;U>Y&cWVAOoh$DFtmHI6r^ zart+5^OgXWFFUHAd$4=d`J1qjV~+eeAPhJ-xt-7C8&0{q3VB(TAx@wU3@mw_kIJ+hJ#V_zY+7{ zbJV?(rk88424*MR6V=ZZ7!8l0>b-*M*9X+RC+O|Q8H`$&hUmo}<}{1nhHC%3#fRdqt5AO%#Y8pkn#<1_ds)0KPIC3 zw*~X!bY9D+- zjVIPnx39CJ_HR+tJhwru*JSkK9@Ko@L9JW3VeWp2jXEbmsPR=Z+o0C1KWg4bqxQuy zRR6D_=H(TtA7O{PcrWU_Zm8f~Rglf+-%JQS;s}gGe^+5G^iFp`xE*_%l z`C+CV?cyt;=Ajj8o%^BYeLkxFQ>b}G#h7o+Cu zB5OuGfM2*L9yxVtP)I5ct%GW}zb2n7E;iz-A7Pa56 zp!yNzAJ@;csPzp&tz#F|cxIs&*Pz-xi@7n}1V7*3KP-T1cMxj+rlb0O5VPPL)cSiT zy7o(B5aAA}a*I&sb|)&|Q%sIAC%Jjag&I#y)Hu4L^36u|?-1%(~iWcR%g z7j>R1q0Vz-)VlOUwKLJen^61W3@YDiRKFrkaq}F6>Th*aJMB>OI0Dt59jJcZN9||- zsV+SsYF;a#=CvPcewL!v<09(5`i9yE*{8XESq*jWdZO|zN3Hic)VjSveV+$Rck7W3 zb?-Dlr4Ph{I2+aObyPpX&2alM4=TPMYTbsS?*Fx@{r=qI6VG({N}=Yf6KdQOQ0M0m z`tqaZA@MA?Pl}_ypL$q$k$DZZe*$N_dWvHR;qIvZZAE>rJVTXFImhj@%Bb;7L(TIg z)I7dN^}{>YtxHMNK5dFx$0?|JU4vS`^QiOt6m>6n=DBr`gIc%TsQpm^HQy~QJQOuw zbFnNQvv8dGuHGW3^{9c$*9o<5Gti6sQ2n@vTA%O>oGDQIvoI>XB5K^7F(1xF?elA> zalSy+A8VnTheD`*TNh(sFD!s#Q0sCOHSW)-e9`~s#+3~<-xX2)9AM!ksQz8E@JG~q zq+8_LD~bv?vT#oePet9s>rne(uZ5qW=KB-soCYp->zx$UuSRBfb1Z7!|7YO?sCB=N znxFVf+`Ur3Y-3I{kC^|V#-C=Xo6j1k@L<&ZZ9v^8x6BC3+&pAMtw&ANJhVdfb1>?B z%|Pv|-RQ+DsPTP9ty{F^E?mg0irTNOQT-o=x<8g#_%NzJPf`0Z_6oPo=~3sbBC6j5 zQS-14mG2d*Utw3e@3};%^O+S@e`WMydsMrBqxR=IRR2$+*6|@~zCEj4zmu7{QTfWD z&RH|mJuwco&$grX=SkFli?G^R4AswmsQZ5hs{hYW`z+BKcYcau5aBVX`8j}^$GfO@ zK4A$=xz>%hHERF%MV*J)sC!~9YJ5*n^+a9g?zar6`?Dfy-TI@(vki1<-J6}-yGTwG~E(@T}V-56TN7Vf^9##J~)OgOJ`tQHPrDsB=SH~o&Q1f5U?2Xw8&qTFz3N;UY zdtLnrQ1h1s)&H8P`5kD^MBM|MEd4NQ+;36mDAGQ+4}wwqunKA%{V+GKLG8bXsQ!i9 z@8_EjFKS`84XB zd`F$*CpB-FaDH&3DF;R$L# z#5nHyR~WVLYN5v8(c%YN{A^S`o6NHo|J)3F!tJNT=$n7k`nE*1GYNH{?L*yHFH!yW zJL!I(-iylD2DRU&pw7h&)P4>;<<50#RR0U3_C*WSc&DSz$qp=x4^aCr)oGW%6l$M# zK-D`3mH#Yi{=cBs!+XYk&y+&#pDL*ML8$Y&3^k6MsB)3cy8V+Cb)KrC)_VkM{uiL~ z?M3b9N2vQL%sKb-MPk%C*GA>*hAKA`wJ*0}c)W$0&j+Y{vCg~o$cO4*HB^6lq3+KW zsCB%KrSKJM-tt^<`5L0udmO4?OHljz0BW6|pxOz0(e)z(YQ6rja44$2@u>1!QS)*U zed~J3t)~}tZ&g6m*8_D=%toE##i)DchNV9-qg{6Mm>V@;6;b=66>8s4LbbmewT_R_ zcaE>P_Htn!;v1s&!4y`gbGxTtl_X5n(EbJ`rWE;$1VLE<|iEEmRslY zsCjLL>i=9+z3Wl^KZUCA4XXd~ZoBhY43*v-bq<(LaoC)RR6->apxo%Dt}4T{%?ayABbvqmW8)k`UO-y z&r$RJ9kmal-F5Sn2fc(_VNo1`zV$=h_ped=F8V$9b7Okcxy*~Iue^mDpw_RmIUF^= zvr*$&YvDtv{$54Z^BzMm;(fO-%cAC|A8LG)QRi_LYQ9dQzHc8{`Ug~f0T0|b(xL9v zGMFFxSo{{$IIg1FeT%9${6n`ssZsTpLd7>m?Zf`4`*t>JKb%3W=Qq@TNczbAoDzb% zw|b!ZvlzX&4>g{9sB&LW`!w-mw_c@C^)yAT%TQGRR-yLOKGgg@My=y_)Vv2iabYhi zoZZ63EL_dPEiBv}wH_l-^EVUq>wsnER#g2*EPT~`Z1Mk@5udtz2~g!Tpw53ji!X!f zPaO-lvv42tZ*!idueb04^OE@(H4k4<^#?w4?Ity|qS^^YrB^|XuL-JOT~Xs1Y~e{3 zUTAJaS8fFXBe0D?K!-G-x`#MzrZeTWiX(oH& z_ERO)_ufEMJ4;db!(P<6yM@|^KT!8$l9z5@mqms9Vs>1P8plmkzh9&FS%g<^zo$pl zR}>3k6I8i5sQr8vL-0FlzZH4y_F;3>c^QNH9$AFiho@2BC-+hJMEWc;0b9NI^BlklA6&h){&W4Dg=NWq4K+`xKl%Cock<KVc=z>Qx))xf>WLrL#Wz8%<62bwJ=FSU4(IRt-}$t`d`d@^ ze}-y5R(OBkzXQ<#%M)IP?eRa<_*z78=?k$B;nz4H+eh^G{qG54L~`kku|Dgt5{r-? zC5pfA@AH+zii9U(ZoH2gU&5&VzIEw{TBpURd>^nAmI(0o^uW!i`NT@&uq2j^ z=I{G{8jl*!1ssguQ1dh(x{E)9+Ml0L>s%-X?a|L2sC^VUmcQ@k#O$bW4b*w+V=gl< zqxO5)*#5qsn-ky}!sRg)CW+(LuPEjq+zWMnSE26znOf|{Sl*q?n7F_~Nc5ng}K7~(gf=B;>g=U=FOyb3i>_wgcrwDc1x+&uWD zbp6eWSxIk?IdQhdpF^!vj8raPHdMblnE#;m)kgCgYG3}e^h~K;{)$+i_|8}g&!EN~ zKaCq-aa8{Yqw3p=YUdVe9De*I<-?3S59;TTpXprw4C!6@hNyPuU{O4Qc`#ZAH=a@$ zLbw-(!JVjmuotz@UZK`Cenz*?Dx_sm#S{|}<(;XWq8nAzPq$c7~dw?nPNI`bmx9DYLOkDbHSmjksf ztuZQ2M4i8RsQtGCbq}0Em5-Fuo!iuAL5xp)Rn+{pL(St<)V!TS&0~aI?taUQaR^ty z?AX-8lTi25a@6>aSo$N2PmtTqa}a7?8lv+5gPO0^sQMnE?wJHZZa!+DzAyg4U_6I9 zkFoN&`OArlZ;aY!^U=5NsP&1H*I5*Ge|JE&Gub?Xy2rj?HH?wZrME!EPet7utFavZ zK=r3=e%J0u)P6f|zCf){v;zLVpAR!*FyRnX{|2Jc51__z7j^#p3p(?l?!$Jdc9vi; zK1R(``a=G`Uw1S{-50%3?XN~Jo<*JGx2Sy(udrK>9H{xIj7sl|+8+zdjpku2M*LMw zfk}$EbqYqE%lfGMcL3_XUu>Sm=!CywJd7Ib_Dd?%{>q1%&noD})~I7CH@@+?bf4)L} ze|$onA5Ss2e*#eRP#Cp715xERquP6hIxlgHyL?4a=VB;s@Z;A@n1yiVlFt6<+vliy zA7OLMSjye+<5BB%1~u+ySQcZHcH^msUc!AXJO|Sf-ix}wo}ktvW*L7^2ih-)s&7SE zSNBz`QmFYHj9T|~sP)*7>i;9u zdIeN){mX><^>THy1FGH;=6cjVxrsU#A5r&K+&|p>R7Qozq3*HcsC8SB7N6pVwRR6+PcJrDHwGZ;67n`H% z9g6DLTr7-xQ2qIdI(JE`xc(Q#3WOV=&iM+|_s4ToJ&CKj`h!sSRby2A1k}$xD=oYS zHQ(1P?5XDVWkS?FS`u~d4MNS^GSt2~gxb$9QTsGSb@%gqWz>AmMy=;z48dop{gJtb zn~xT#`I>;b7jK}-rK{<_H!GvocQWdn?7`Uh9CbhV)pGNa0Cg_%U@Yu_>gOQTd76Wo z&yA>i{URpE@U>mN=}`4mL(M}w)c*blwO=-3K75V3e=^i@^AUo|-wKQ3Sk$>Zi)t@U zUHAQ(8`ZydsC}^zHJ=+%^K%2$o~NE0e@fJTE02|MB5J-Lp!PvPeSc3dX2j}#)Qg(8 zeGS}ro}u!^Yv|5@Zd7`I)c#qDTK`k1cJ83YpT3bx4?*?61#15eMeUmnsPlLVbuYX? zwG*+iyC>6Nc*2=b3^tsIF98pOcVD#UJ13%gHYpKiE95Ms=psl^(AcT zey$He&DU^LKbE7uhYq3E^$Kdge?jeoOwHW9lt#7xC#pXyQ0MU+>YP2p2$-R{8+Q)W zz268`&t%m8S%=zJ_fY-*jM|?mTeyByMAhFI)z4w5^S=zWKQ5#Ck*KBHS5;Bt9%JE+ zsGn>!gJvgt~jD5Edf7CpN(?SP>Jocl)+2s@!_icwV6HzvLau|gNu{yuC&_+QjKmiyDS-x5m_o`zb_e^LF7)7AAeC-x)U z3>)Bm)Ojk_&F$BwsPGunxmt;up9`q*_;+{fofo4J?tjKQ1wnl?d#pB@{i0|f4O_42x@*CpvE`A;%A}eWe4gUTtv;^TU5W}_H^HuL8$M~ znyCH{M6J&n)ID|A(*1h5@|jTUTnW|BuBiPp8?_!+Q0o_=x0}z*=$m(pLwrkA`+ZRD z%|ewsZs9NJC7iC0YrhPtomQy*Fdj9Y^_G4HHU3wq{S~vXTc2WPC@Ox6c?31@pUtfO zTzYfV`J9Zpr_Z9s{|q&r$o*Zvv!T|Z5~|+bsCiw9UOa2@Z_Shg-1w`Z#@`Wjj}1kQ zdp+v=_%7=E8m42Nu9psD3_0^)uX1 zcV1JX=B+Af{QXepU&Q*WZ`J9Gc z+=D@Q2g_mnF|J%QRQd$ezTbe_R~O8879Vr0I}bTf^V1|= z#b_A&Z@1p5FgoE<7!_-w(wn2!zbop#n}yo9=TQ6MBWk^pk8|loQ2X#tRQYk{T-3f; zgIc$fsCoQ}>Q{;JZa>yTrO(6qcpgJB`#)};=AhQ|5^6nOqt@Fy!Hp{jRbNGnhb>U+ z*ca8$WvG331l7(DOV2jZ?TdQmG}Jk`gevzLHLiG*+&FTg;wxbwwny!&KB#@X4K+U( zQRm$=+3nBlsCrAH%C|-@4nvJ=32Ghop~iI{HI65!?^(YoZlB~v?W+N(by;Tdw^8er zajMH-6*bObsB^OwwJ+YFzCV&qbM;q7-+4BdVle4X%nZ~0eShxN7S)fxQ1{SE)IE0t zwg3EQxO&r~#$Cr8g_^$|$QA0jf~5%8ob7&2or5}0Pf_cWa*k`KwmHV!i#19AfSTtD zb6vZwQ1dzl^Whp)zn-GzIr=>J>$NPX^U)i%FBYNp(K*!o`_Fglkr*|!kmp7 z*CkYY5f-@fnE|y9Wl`(a4|UEbq2^@=YCqgTm5aL2jXx{qC)^!%uGXQ(e+io?-~ZgX z=zzNKH=yb}it7JM)c#1g$epJg*pzS&RKIVa_GRqFZakGy=f5XvUrazR9z@O4L)83) zUE=n67Sy_w!wNVUHNWRj^AmNcE1%n}foiWiYCblg#`6SKf3jt6e-uLXzawg1W}1i1 zx0syxB+K1?ErR;_upMfD_eYI;32Hv}U~znaYA?eIw?7-9*5Pl|{BAO@p~m?Gb^oSY z>F&{nsQ58h88@TGA8D2Ae^JzZ+z7R9{ZaSwc2s|_p~n9Wb-(3X?dt1?n(w9Nbxce+ zV2#_S8BpiG66#zvM%`oM%*Ey|)IPX~n%}3W@g-a9`d1RQkDH+v`=ZXl98`M;QR{FQ zbsjzIoQYBMn%BaOP~+;2TAvxH{v5LSn->0t+GnxWyM0v-Rc|x&Vt-UU^UOV{^L86G zU(q(Wb8<8A0*!F_D4w^MYssd5WnCEklj_4yr$?4!QNpkE*vO z7RIia0ym(_T}JKOz{75zzftvWLCw=`RKNX>xpAdJwHJb_zaFaJT~R-; zOtr`){cMvbF3s=d~zdZ(l6 zTZ201Cs60-EowYzPP=)pfYAvzL#$JJ3 z{;fylyMVCL@T9<(H zZXC%`-xmc??bShjUv$S9xY*ok9!Kr#o2Yi8UvT$VQB*%VVM&~Xs`mzJKYc~*uXGpP z`cy!jhvumJdoHTJ6R3KApw3l_OD=zT)c$COs(&VG9`2#ag}dzbeI8W3jW8e1K#lt% z>f8igaqC(PHI6o@dS;>a$8OXb9FY;j(!c|e{VG(LRuVF!qearnhM`hG~ zGr`<}!Gs@R5lnO2^``}D-BzLc|H0zp{Ok5veN=o0R6qVkwY%NIuTbYY(H(c*bE5Wf zdDMJ1LhZMasC~Q?b*>Mg>br}Y*TB23--S@?+Yhy`7NE}ib=1D_zvt#RH)`M1Le)P8 zwazP0?Hoh(>k+E|KT-WjcHh-o2DMKHpuUe+q2}ub24c7euHD$E@&!=!)it|d6vCsh zC{97`i)*NJ{TQ{cep)#8L)Wj2sQ#8l?TePEb1)j!zk^r@U!lfR_K_QJE7X1(g}NVS zn(Hux@DYrRksrICPvW5VMLE>D8-itV52~FgPh5I#vjZxADQe!&qxu)+sr!D-hPux? zn8Q*1n1{-@*}Q?8C%Ec_W#?c4W-h9-)+=p7v zH>mv@@s-P$3v&~$jb8j4)t@z}eR&$AV%XQNe=)EK;o_)%4o2OND^T^{Le1|7)H(;g zapO#eny)gba-A^&PDjo222{UKpz3>rF)`&^*RLSdJk&(p5C5R$Q3e-JV3^k7}%t@&G{D64@)&Kjb zens$r0q_H|a&Iu}RH zbA8nMPD71nA8Mc6M75jbt6QHEsDAcE)jtna?l>01_ZFY`n_G`2sPccK7dNB!#}!n6 zBY$`GWI@eSEmVJcpuT@Lpw7)RGuaO}A5~H5<1iQxqwdd$KV83rQ2W0d*2Lwg@0T$A zpYHv#sCjIGDmMky{z24vdVrd*M1Em>6of0!`7d25F{2V+qCZVPIiE}{1E8`L`Z zg?062z!1U>QT?2UO5bAMLCr(taAAD=J`Jk><*+a|K=p4HY8>ZK=i@nQo??V|{mG8{ zIi(&d|3K8bZbt3z>!|$_7{T>BJF4A^7H(_d5vXze5A)zg3%@}1|2wLGu_L;1rA3|p z*5*)i0jhs{Q2qWF^?maNwGT@~a{UZN?W_3~zGOy;?9zkHuI4iHHtM{_j^f52j5-Hx zQRAJ2>gN$mj@MEB_>Nk?cv0PWilWxLHY&Xbs{B6|K8PCkZB)LGsCkYP;OZ@an&gZ=m+o7t}hZjP5Ln>VIo2fc;VXV~54RLGAB|F~a!HZ+JC8w_ zm2f+(gfmh3U!dB}7R!yRDr#NZVi}x+vG571-`_2qAhw&A%&7aa1!}#~cSEKHi6R36jj@sWTprOZN21nwDMrDQ=2eV9_<{KXRsI92KR+=x2F7#ikP z1a3a6pz7;@8c%Q3`VB?ZGac2=B2>ODsQdUJs=Zql{{*!UKBD$VhJ>#E3aI_u1~tF` zpvJYeKOOi0Yp96-W*6Sc@pT0)*J7!X6W>o)5qt>quYP~~IAZlJ}p~lf4H4h6h6COkL^FP%69LsC_7uD}psD4ec_^qgW;S#Fe zpBA4sxvQr*YTq?N-Cx7ZUFaqJ0d;@HP2tXcWmG!@Q2Tccs(-sMBi={V6FsHtM=8|4 zXpOpu2BOZ}G;X&M{ND^wOyP+Z?sdeNgwza!Y?{MoI1FIUQ<#3ZTwID^$J1 zQSBZ^)pHBgzo=^O`-avnpy`yQ1>XLEQrl{D5>t`<1Ja@soI1SbQIn?}qLwyg# z$>72{QR`G5z1R!Y&zY$E=oqTK+o*gIGCG4$_hWNZyE?fbT!sXG66Hxg#pw{C8YJFd0cubtv z^(Q52f7L~`GZ;0FIjH_0GC!ieuhQgmKd0nJiku<&x!dY?kI8@8Z3_ZcxF;Yz4})JAAJXF2s zQ1`!oAy(xk&C)@O@^As(x`pb8I^w_YTsWrf1=8#E#|(T3ZUBQhU)iN)P7rs+9xMa`|6Q} z!xVS@Oo|$RR@6K-MXkf%=*2y#pBL_+>Q7q2Ys$_-*OA@HZP*`KSS*c|8g#WJXCyU)OjtAT91}k2K!-tJc=4u*z#^3 zlA!vN7q$QEqx#VcHIJiF`(p`uaX;#O-8Yj|aPw6Im9HDB{CJC>kGe1Rq2}?9g}c9vxpo-e|4uKx*#ip^e;9QyhO6W1%ZqBSo;e)V-Ud|u zt5_W4)pg-|sPBvEsQ#Zu?eB-E`^K-HJ9jzIOSm-Z`=>Rk+ycylSFj33ukZTZ)SQE= z?>g#U{D_+G)D7JCNjcPfPek>5JL+6LLO-0Y|L}|o>->NJ>*ufEyW-c2ePL5lDJCb zKTiFvsH-p5C439{CnJ1+m$ww=BwuFIi%_;SY0+^mpZ?T0)#~3xo23Wr)Sesn2zUQu~09AMjQsxll`_isIWm=OSnQ$21E8;*tzn&+g#Ug)LtDApD z$oDKEuAQ|Ljr>RWjQdr{+)AE5h!02E9k|xw*VFDX;!5EwtK%*0^r!AWDKmr5KJx#C z%YUo0265BLw+i*tv%Z`myqEat)OC(J!&2@g@8|i162F4*Fx)^|8p`}bSWkN!Q#Y&6 z#k&7?CVwIF>*0?mJ+BDs=|$N}#1|qQjn6sj|8DB2O5II}^S5%JiMvZ&4a!`gj;+Lx zCVy!@v5C8A{ZPHTt^T`|c|pG9guj#SZ+&Y;p6rBIk(L$z!6JNS5c<|s9JmyrIK_4kUk*U#p_SJ?iOjJTCnPElETKSn<`@~*pB&noKaMIE)s`<-w( z>eusv_zC1~NPKJJGFbc!!iVVF1nLUq)6M$vH+5_$&neR8VRk;@*rfYhb-w>rB&`|w za`5?wdh~dS3r{^KdC!99XtOeD`q}OXp8?e0mrovRKdjATAuAt5U1!J_pKufE(v!~e zCMW!jPfqIn^#l`6N%#Q~b1^laiF{5|&#&he?|%~a>(S4j8L2ZmaercS`f!6h$*8Le z;n(zUBi14O`%~Ncnida`p3uU>sAm#+iSj*O{@a-THz&Rrc_xu?nmW(oWb4Nw^1q3jHRjy%_RTZd_=voU!Fkl&9_I@|@I5*-G4QT!#NrM?Kq$)6ZPvzUB6BHBz5x^-MZT-l!(Zj_jI%tEaX(@HnJM3sg!h)b zb*79S{S01!vXiZG{#ezsg7@;2i^zKitEW2o7ZX2;PcqsVL48qa?=b1tc;7?(e9POA z`2M`l@U_7BaT@8zC^v!kPUH`=ycvo6^$f6=VWe#)&#&h;;a1jP#T}qu{Bf?Q44?ai zhf=qG4WXa^^yDXA&k8;(Nz<Gz)sl6v$cB3ywo-6@-n_ggr?@db;tcO`4vQ%7pJp$2)($fIpk|_uu_0=bGK6wKvGZM#A*Lu?R>-npcThFI4?~nMjAkRv|zdxG^-z8qp zManI+_chkA;G-uJp8_^MUj+Y2 z$XfDOY&?Ugqc!38lzBz{@5rZL|5v51%7pcdCG8A(Q`5$;rwZ@yD63~XWr~u&4WBXO zPGX0iUdHCyOo=2n)AuoS5$Kyx(KHg7R9TP~?vz4@K#ND^@k?3bQ>ql1Ns@nTr zm)#Rg-r>acCao-G+gti4Ol|KYt!@?R&sg}aA&wgt^F?Hsl zpRxJqSwZ+Q^~SI|$K%Ccd4H=Tip9B7?!V8;yMtH$YLTZUdAnJi1?bOv@`v(?MBGR6 zwIWW>C5P|7^(pt6^dq#tk#w*1At&*he#^I(@EB{qh#7@){1r9NBFYWoGt|l^C9Z|_ zdkuNcQ%_gY8j&Y~&EK!87ZV?W&r9;_*X$edFUl{bjosvJOqm6QXOTALS0S?u=@qFz zKK3KuSZg!3^>2gO9j}w#n{pY*^UC@egL+@`{=({uN%;3?8+9MII;xX)l<+|^Os9@< zyz6;S+pGBWp#Ji|m9K5-{*-?~{&;+%vhN;Pd;*L>xCZGPsOJIwc*v(X`Mz44s=pxh zmZ1J$&sg$YCy$5tU_Sg)h@KGAHxu>9@+IcIEOj)ZKm9DOBTgWkkx!rB>Q}v)sBbmt zlZb!BXDi_;*3T!jr>81${dnI&d>-&E&A4v_x};k zKlAKa%!l8$^YBksdOp$SDDqS%{nxY1-p`Y#Bx!nD5!ZoFDn5Jo9Hi`C(n?eJJM!td zOuQfAn|#*r-iSQcslOrpyJ%yMLz$U;BD20xNl#~E<+s~B{}TSlXC$BHgv*gHD)s(H zePPM3=Z57UNBSK;y-15gT4ijg0oA2pJUC+p;-;>qzm&4PC_%Y;fM!w>F z+K?yE%B-diJ^s}Df%quA^VfNO&p6s|$Xf*BN7KJfsOJkG{rjL7NMAwRW6M8~@Ks-q z|NlQlX@`Ff)c5o!e-GXh;aBQiLf`l&b3KI#S0S8+PXhYGKi}&~LE3%7pD4eCw(9VH zi1@I?>p6p&h>u2G8rq*_ed$BKr7nwSB6*q;Zp0@H`F8WEK)$5p*At30iTm~RBOm`H zs;4t;p0xUg;6UPLTD~3Deplj8@o7f57!{QB?tN1C-qV5w`X9?0T zSs#>THf1UiPQs@x?>)))*3!$8-kW!S;wxBOZqmP7KUBU4@99Y2!Y71w^1ki^Vyzk*Xh2`VbGnIMN)0?z)63wmT-f9 z-K0!f;-*<#Jo2`;_Y>5cojmVpV<~x3p`Hs?-v}Gu4(rbr^6JU#@LZ?NEb`1nJr}G` zwJof;%aqZ-^|RLMR@^kol+X)LWGge*(vK3?#@Z=L+AhM6NV`H@3l-qupI7#5ppIbT z($iK2;`UgXPUKx`{qJi1=uOe?6hRlqRkX&cvgX z&xywgZzo>>?|O2Xde1{Y3e&&q#2w>Pz|zhzhlQ=J&*Z!FTbXQ>=|g%h()q1zPi?}f zFd6%I8g1_3^Xo}Znttz}KWg-RApa)P^76ix`r;B!Nm>TlZ%nv1@xPv|H9$SNd9Og8t-Sw9dL7=c^NDMH zxkUO1>e)mc<&~ebExa$FosxWJkiL*lGU5_ZW+Zv{5}r>u0iS$?ixZAd+A_u!!h2qu zlPkP8puVs8>p8;vM*@Q}mGvQ%dM*>!g1Yov{w=?Y;SMKHG3wHDhtsZ01j(x%~P>bl1#JatVZZ8GnptRF|1H$8o< z-XG){MY(;X*CM_G>1zq!6mzn!-J#JHp-p$`f14&iddho}5T>OV`~DU`oPIEeR^x_8pu^*$c!^COrjhoF#oOarre)KEFSc$=``IJwc@X#B_WP z@m`PkYJ4J7Pjh9krzUaB=~Giab%|?0){#IY9uRrg_d4J7# zZxVh**#wl)lg!Lao;;+(vU3*_gp0Rv768GyFPdk;#pV#uVB3zjCbvTjuR*Yc*?W`jFl|20jU!$F8 zRB+JxbJhCzlk|6dCX+ti>Py3#JR!Y4bq=O1{}U_EU)KI6@^mC`HtKps+$qwBkT(r^ zt`m2GxZ*g0d@*foTgekddJR5$hFknb%Eh3q3-qZoakoh8Ox_;WH(zG{lha-f5P#F& zOYk0#`U+XzzbPNe=LYRBByItpZR9;nI5F=*)cb|>VBT9&?gr{f#rr4s>iI-oJzvPH zC#B7Y-v6_>A2xqIDc_5@HPqRL_blWYN?Lfz3?)7*bp`QRP5Ns-dP-XznaO{iw1XC} zH2&WLcotweYjZRGIzhM-{(91rR+u(oQZ@%=qw)Dn+%Ox92aAyTuGR6$`l|A8NxMb< zDZ~|`yq*EpejCE8Xnz@T@vM)&4E$#*;hXfKfaO(u3+iug;Vy(LQ0GzN{<5-P2#=u7 z{CxIXUsNtD@xgkr=k{-DjjilL+6uJ(CH$4q+)4ZuD-+k^O4$6YqwZhN5PNBcZ-`Gq zxk*-k9pVO4M|3>J=Ov$5%*{JKzn(WXw%e5XkN90yb|&#tsp~Z5xBb>$zTe88<^2SC z2GOsiR9KfX)d=gEZDp2IzB6&{$y`&e)n3Ou6Q*TGgM6|Ie-!a}RlUL6;(od4V1>rK3$ zHOm{5IlO0aicd2Gc3ralcjG5-li{-ri{qC7+Be<#uh^YQS0 zj&g%AHFd-wE{+QFbS11O;J31c$yb>C>G37;kE|~vt?ePInK?yu-&2`gRo&C4r{{4`b$9hlpVQS{x2ooG?%bv(t1_!9 zPiJM;a0}cnL&|fCz(!fEpp8gb;$L1S&oWBoG6LPyv7c zwf5fM{_;^>bD&~+GV|MOKfb-!Uhlnj=&ws%{oMra@6g82<@b;C{U<~D2bBGMp8u27 zdzbIOF+Be{S-UHY^WO;V{w(^v0{j8xe+Af^w0DQkbL#%vJo~x8{W6~YT7K*A?NCqO z|557xv%r3h@Bb3t*J$TIpl$s<<@+Dx**`>ikI$bE?(c`P-$}dw7SI1OFu#ws{}TUx z8D&3*-(T=K0{-{%{l5$Fzks@5;rnmnnf`tY@cLV(4gLM!lpTe#-^BRd=J%fpb@zDw zi~0T?+We>ar@ucE-r@fXb^Ix|mr$PE-EI&KYjXz4=zr*wY zocjL)|9&&|{ur?TFW-LybMmiH)(rjsuY6vk>;|8Yf%_BGUFY`}aQ_~k|23b#iN5r= z3(Ov$|7EEA*C@Y6TR)F~cY*oyVSN7--~VCS`J2FgpMO7}^54s|9}n-uqoT|2|CZ=@K1lgAhhu}XhVPhD!(85*W$N^ zwjKd{Nc+Ez-($+o`1hOm{;R0-OG5o0r(A!}`2924ILG|%hq8a3&$og3CDeNi%pU)K zk}-C}d;bagd5eD!!dO0`{I^nn5PmQ7`!?lkwDW-e|Hm-C|AsdIG-baQxC5U3LB9VE zzW+=p|L^&I#P1F29`OC2pufLG**AIi+i8Eo@4J+3^X&U!EM5Be>y-Zrp1q{bALsL1 z^z%pf)Zb5qclssZ%zf&749smWvj2aB-}+kx{@BXh&eT>FZDO?03+I{(dw6UIYHGg#Ldi-}N`9&Tr=5 z*MWPF-#^8_-%CCHy$0;x=HDOU_umd}|5iN<<67nOCiQ+NZT&62H~IeS`TpmC{l}>D zzwz%e-~V0e{A$K?jnCgmyFUutZ|C=q@%we_ss6u7`1zDJe+roYhtJPw_X%zNL>Sxe z1LoK8{qND1{x)b&fB!iDp7ZR->=$dt^FI&VU!tyF`A^Z-pW)fR&iDU>?>`gj3H&dH zw)MR&;PCeeW6<9pru_d5@V|}r{!^ZPo8LYCr?_UG%KJahw{YUHxv^ezni|KD8Jk!Td)6Tz1-T#Y!e-xN!{QH}{9_z0OeMJ8bpK_Mo&jy8Yww>OoT-9Sw%3Ek@h#y}Wj%(I3Q4 z+JpY`m}bYFA)`D!YYjV%R=?fwfzkD7Je<(apg&R@>Y+EF*>-ny)@vPhG?v9Pv%9^q zb8mWXCZ}h#@}f2DmoH8_{jxP0bxsd@3}E!4JGR-#XLEF=F=AMU)ZyI+!%q83qtWRz zm_vrD`RKG8?bf*UnmsC;8sAFU86P%RH1`J`pS6ybW2i~%y}S}%|23PZ^4pAwCF!@T z1-Tl~qBdKt=YuZIoV5DKn%h?Y<(#VE$^9FvAD4qOo3=Yw8c)i(e_O11*=m2AX=Fi1 zCxanKm`^yb-2!oXW%sB&8;nL>W~s^Q&26pxL^JAWMXmDjlkJh3>kP-d`oYU`d_r$= zu4(2mGn&<@!?%uv5ibVAc6rL?=$`euoe`A|U)lHQ<>|qoH)3rE;AX#d%Kt&V!xM1w z804o}dq`vV<~R1_jF)9IX>T>|HOrD-*_;}GSd`|KVt!RU-3i?=gf8>YAB@X>hbho% zv8Rr@=U=A!u=B-)tyZ?m&%d(VxJ3O9^VQPeC*w0VUc@5^$hE0a?{q-Ow!PQk*`yr5 zJnK{tjgP0_@NC!xP0|XM&pX2r`?Bm$P7m1o5xnsuFIUROk7P&^w@nd2c5l4BTA^or z+Bju_e7(Y>jb3l?qVxsr9)`7Km!*{)RlS~SLpLBF$BplFhJ!LkM|*J48g;Hi$~xzB zs~btmy1zfLl>?J6KZF}=@m>6Lw*%qp_BxUJK@9*o=tgpwjsDinS5^fit6G4Tjjj9T zgNKhc>s8AaLm_XwbJpQ)`-d;tg-jZIK&#d5dzFM2{XxHDn9*o}-As15`>n0_KHhi~ zTjgoD-wDg0LQ%D2D1RR&)SDR2KoQS7hp?B!XR(@nM(kDTWZZ&&hz9|rRUDtNs|E+( zh9nB_8jT~UXs@A#gu0DlL*row&XJzBMrCI>91NlQs&mrmokhs%6Jqwl+h_ZaTF2}k zh->G(8+z)F4|?Up$Gdxbchh^8l#iLRoCcO7mXO!&_78g#cxg@^)9O{-#&1S%M4?49 zoMU$nZT?3hAxx)waoh-_@VDuSJNJ(phlBoD%oy6mpACYRPFv^Q)5&SraUxHG>-HzU zv<^QR!J*ma`5us)+y@5b^ z>P=rTq*r&ku3j(hbao~#=yBmd-zfvJ63ZK%iu(yqTm1_f)9`&FLbFHR;b<(8C~S?m zsKdE)$fAbo%pCoQDBDfZMrNSn8(U10li`}(Xa>1nfX`~SGp?+hJbnJ?qC(4~ebvlFZ__}E6y zD73vZi8Z}K2^$qFk_bGQz}-8o5n^vU7jHFT>}OFOT90iFyJwBw;1D9yIv9cUkVz`> zw6v#4FX3qrBD~(XH9YQ&rzwq-7%NI!JTkRVZ`f*g)jj<=0oE(90Obg&Br*l)S)b|9 z3Pj<^<P0zVwT=)(tnN4G*R@)v(6qZpN1Y*@AMRnA6V-l(XvYqTQqYz>`o6Z%`Vh!Yv&Zsmz{55(8lX)Q%4aNkKI^@h)A3_NQWVepkRo+PVoar~g z5#AB?)`lrZ7l;9_FUiJYg4|%(g@j_Y2@NH^Cn~@Nm~q@29AL%xPNxxfxeeKE1E{a@ zsl)j`JMK?_?vIgN^1rRGyx8&(*Di)ONf#aDs;TVP4h0-#25BbM4MbU`D1T zn3S*Gh&Fzo+3FxociP?<5)!s2Ofll&JZ&5^VWaY)38TZ#GW-?7Jn6dn@xjjK2QGsf zYqo7932x!v;0$r4@6s*IB+~#^%AT|X6PYyx<`?ndc@SMrZ>$gJG>YNM)gTz83@%X~ z7x;PJy5wC$1}~XuN<>2qsDD>npobT$fm7Q+Ou~` z>Zs6TI}-0u$5@gup^bR9De)s?D`O44*OJYwK93<_BT<3TW1&qY-eUY z#jn#n-iSRGddu$F`s%u=9TA>S))!%su3-%iw+(=vu}u0pc^$Eg><{cYMd42?l-2WE zZUM|{gs(wdwqg^P9sK$2w^nC?%W@AiFmtagRVJ0PZ0OBG57nt^OVFSG%WE68>>jSL zOGan1B)Dc^1d7Fp>TGS&tJdf3q`dWcV{;L}EjTXmG@`_#ftnB?eawZSE>st}j)9r^ z0Zl2Fj=Ysgf2N(-N-QcbZfA~UtFZ*LkZh}`5KW)*WEB^-ej%{gKdg8itP2>+5&h$4 zv1wyNxja*^6nY9pA8hVztR(C3O1b^f?uXwfS&nafw6%Q!OF&N=Lsj zP?3AGoynvV_!EvD<35#!{h}IP{w*Kst7ns%vokqMAm+_!tt$NW>gbxpPM^*4MA|V3 zEc?CqNt$O{rn>l%h9B^)8WGI~E-uRLTL}%(d|xXUAYE;fNz4;deAXYl=&KzZJK6|f zFby5U_0s@mzK8&ZH87t5atd0a=&FmJNHqb$FKEP^bF+d@vna3bxRU?};^-Y_?u!YG zO5{It3YvRy)Vx-dKh*8x7}%F#Y5!~hfk1M3@4a$)>2SGRJzrW~KWB0`cD7vpJi_oE zb+}=)Z`=Xm!Oo4pPc#+IskD)!m}DJ{IdsUag}1ba(H`&epfq zZoRsLA4MKWH6ha9xxKnNWvthtB}HM>IhJV89BQYqC{|-y9>{CJR%YsG$>(g$!wWX$ zmE!d!+2s(@glrgdQ8Y$cQPlZh_$^+S{pk2C?2*=SOY%>U)D0&g3uO~}+Z!BDI(NW| z;*F*D8|78O;qZ+O;cu4Bwgo`hYaMiY*NQiqo!+SPMrtMPyf>QNqc=h^--6~8z_aJt z66$`oBE}f%#d2@&&2sa+1!)Ioj>^xMM$2`g@mf>LciEKWe`Vhc51`(gjRW~?dztGawLW!G{54rp0dcrni>uan-NXMuOq{8`NLBkOxKdQ4|kc@!Sq-z>R>#;^;RO(N=S?Z|0SfO*KRJY z-ii}8>9ZZ!k}Ss2r00*BfcjT`G&M+0-av2M=ljJ{oI z+`3tn2WNI(UT5K41S2ymV{Wsvo`N8fX8Vu1B}?0`64{hXkK5Tb;$a2+Zd^- zg(77}r#$$mK3ti@(Wn|9z{_76I|ZfXT{a$G?tZ*;v)q1o&m<&4RT}esIhEgkk0-_r z9Btg4>QopTe#=^(p}1!46S8-YC+;O|lAV@r@)_gjm4;057rU#jnE&&zM{jKzQAZ(w zOWXs~xRII20utYwShPTpQWS0m@Nhs!(xaLQEctU%fQ<)gX|v=#f(P&@lNv-@UfHvH zj3Ux2dcM;50^q2qRW670WRw*bcs`su*h*GdZv>Bh;C2}%dvEs%^(1)i8Bf?nChC+= zhIo>}t1FG|RK6`g5L{y#VrMJ1u%k#q5M~P^Ieb|)QZ!_?+aKZW7X8h4p;@oBd#bHi z1p7$iY^*&S2+(+dQ&tqvD3LrNZYrrmTXPx3!tvXEPn7K$FPXNH5UOaL-rN3&r=s}O zkYyh(-8dD6eUBo(j^Tg$+N>F&)wkDm|6OXk}PvHpt66Z0S} z2Y~`{w{fan7XBU&q|VE}mt5z}NZoa=D!gWWUh7jDsM{&7(f8g}ufZMse&}X5M45`u zWW{Q^J(wtrM}Ib$qchYMdjvf}B4kO8N*Ju!ek)k`4RR#wZ5A_@o;hiiw~b7c1f=%c zt>H^m?3C}y@*%My4#`^Cfn6eCU{AFWAg?b-t7Oj_4n1uf9P5I8F`Wp%+#BLc3-)CTs&!|}u&Q^KrWtZNj!*E$AizyS#{xc$Pn5L&^5p8j=26%!u4 zT7o)7Qc`18ln1{K^lxEH^JJ@2bbNw{V3f0c?|KnqXOR=!G|H!;Ch*J1B_Tw%;@)7z zXmB)c5afZ9>r2gVRDR-w&O|XqA%r~R!6}jpp_=l)-M9byBgNo7b9Wa;=mZEVk4NRU z1x!g9_TS|uJPl!e1jQrW@~&zJ^;)t#)o%5G>D5T)dx+u7;&*-Fk z#ylJl-p&yZW5bGCvt`e1^i9RkrtQ0&ajBtBnpK6Jsb;&8fQ?GwzW;WI=X@<9)USpu9}!j%Ck{t(jE{Q z;4%ojNIp6+R;AaqmYt(JF^GxfzigcpNlTUP>2x;?{#E^4wo=v+uM@E`L#=42D(Z+C zeM@GVnktHJJ!sf8a?C@Z4Ab0nsfc02>FGYznG98K=!pndZ*wm4Ozn>^TZ4tWM3rd_ zonIwc_GxnL?FxNCu{>PP3xX*(`7^9;sfxkq>I2J+wb{a9x6-I*k@TPgS3(=7C|~_~ zpsz+WdJu+`am~f>7z9Q|LW`R!vQb$2J$G(n?oCstC92_H?^0j%#(a7v_t&qW!s!Tn|gYE(Nv4bRPQp4Z&RfK znKYy2Rh!sr6@v&CBNVqK=ObyNi{=^OL5H*5u-I67B63dyUD%rgPrLk`%A5_DF!wh^ zq@H4aXOq!M0Lh3#+Q|!Q&8y*V)9lq^-HRla(E)4y%uJ=xOe$RL_Q5p7W4S{@Uj!@> zp;Uay-ykVTIaQB&9T0 z;%&;wSpfag!&Up2s+5lx^%qJpES<(^^6|+YW3ENoMAev}Mg|)v!!ls^4F!rJnh?NW z37AnAkxXwbSnQymL|RuTMXc)pBPmnPQn{pF-R*qn>AvyBEZIR*ZIW!GA<RmPl0b*ZO0hRBD#ZOsVD}4n}`>E&FO`$YPH8l9fBO~#D=B^ zTN7s%#YPP*%w-Y>zf?!;zb`$Fm#&k|BFD;%jGOBq(sHe-DQCFZI9+ULU@}C}G{fQ2 z2si6j*&pq0TNw=qh$slA>Yd*y-&h*GVTY^B_atrv22RunLS7Z87U? zam$U;!FDLwNqxM8lgP<@PU@;;L z70A6uyRU*^+*IP9VTn8g;JT+5AO!ET)rP$Mv{Z+acVG(c)(ye6M#M3pdH&ig%SlVr~`r z53ADR-J?Z-4*;yUpFj)6?cIKV<+)-?74_O#Hd_gS*pPgVQJCZb= zB#6~=>&gA{ru#P)K?-Okk-;8bCYV@oe#>!`yd%sr*;pdilhu6=BC)Vzw^kgd$xi>IWt@c;!KURo90UVZ#4oZ zD0*)@DI^JWbVot4r>BRL_desGjvY;V3OBPfL#JJMB!d_efvN-aAy?77K$NVq2W6?< znLm11D;wp;-rK9YYwN44D|}^jU#^|UZ|k=g)LW1B*3ZuknkH^mUvG!6YHfXeK^r%$ z4MJ{PYpWa++St?ATdOw~fZt5uw-fa3w-x}um4Mf7t;M$2Zl#Jh*7fl1o8O#QAJnLr z_4KR@Q;6T$kV#)V{D4DqV6RgrJGdzMP|``U!C^2z$RPU)J05{SL85+GKEz;UP|>7n z=9q=xZG5=q;urbDgZ5lHup3AvJcxSgXjt_7H;WB-zdIfNp|5W2n9E48=2fLSA{g9; zSP~)}EF?7TlFD_D*W#7&f%ALvSXUAAW@y6FFlZ(;fnxVb1E@xet-M-%isl)MUc!fzA~H4#(!x#y)?wqyt%=$iyH8c8X+k~oLD|AKAD zz}B{9joW#C(}F+vd@FoOpSSG6*@a*^PXK(2 z0DL`A-vs5bjRR4YOVxAJY;Qa=Z*(}y$kyJUU0x{Zvc%`BOi5VOSWzs{45k1HREj1hS30%=^ z2smBmL9pe4n1Lg~3SqLMBAs%3hrJobTJfp~!5P#Xg5dcO##?NR$DLCS!Sa5J$@UZ7 z3@#8UJ3A-#F19=c+OH_VT<{5PvM@v2uGfhP^lwpMSZ0q~WHS~&?Nf6PH;cQw+neO8 z3-ST6D(EVZv&SaO9M4$0V})p++*EZv+|4}M=E#m#lBu$35BA+}?QLcvyom@HJ+)9l z?wtq03Mo#^UEHh9=K5Q26?btw2K#j7q4kI62)OuRxz@bC-n6Lf)6i7CR(Yd&{bmio z?Br9e=2r5lqF}zLj3sy2AE0_`rL*#4<$PspWq0L+l|3;WhzYdChq1WYU}f}!RlKO$ zy(bSI#LzsmK-nm=fV}FV4re5ZZ3S^p^zbX}DXU_qq(RB8`}-SvPaa&oHvRPR?9OLF_Oy^<#l7DN66J|5Vh_?3!z;^Mk6vVJ0j7rH4J>J?I_g3fJRpCbPoF* zDwU4L4#;3B#^cEx{kp1=g_H5klhCpq`Om*wpc;W1 za;Rtg> z@3p^A%u%j0`cioXofw}f;{bxN0+th4c{Y;bEcjA7?Bxl^gIsP5GYkCG9#DW`+!ENuoQK&QkzMH}C@X;h0aHT1c>a~* z-di`%7o5bbgtX$`gNOMpaOE;`A@D3X&+G9hIoXot5!u{-dtKj*Op zw3x-FWma)^XAl+ZRoN^*K<#!1d$)O2Dk?T@yb{;&zCe>;%(1hDI)o#yKbFlp!H^}V z8S3EF5d}B-nXMHBVVwvi^Gkqn>q_}#9~x!kh%Bc23~1kC4hhZk?m_JnCf;^-_C$M3 z&)8x%nFf~e2jk>-Ai!Qs1cwK@kH&;-nKMQ*mPP2;amNUTeCtbLtYy+*T#_p%_J%(bJ3?eK6mg**Dl|a{z3WvkhTeRs1>#{5r{NDB#;y zZKk;3OI5R(Q?-CA#_LcyOk;L6{8?_@wH5l7S-W=|GK?q1_#VX{~U3lcR_wA^fs zh~VAZdHDE)73GM%`{dE`E9-RRp4N{mK~cQPY}hE@mSg`i87 z5d;XFROgxKG5ylfvF6^oq}4hhfSiUn)nn2LoiVE5hI4543EV90Li#>DoLClSP|J?E z=7A%~vF^jmnt6BWaOv=UBP!7WZB|?vP%9OsJPeEwK~Irh(&H-!*F6rY4P?ioQ$ynS z%k{TpG9IDq_a@iqPC}wBHbfw|Q`oYG^Ml2`2}#P~9Z}VRVN9wZ7I`c^49A7na6HzK zpn0e$qT>GAWs;9S2^n-yZ$D8e8C2U+;~3R23$vypp35a!cQ~zT=Pjh$guiVWfG$d6 zp3aHMf-%pCY7LpkI`$zsEE(q+;1eBWjKZykLj1d*ovn?AjAL_KKrZ%dGiUi&7Y-$3 z3X+Nalp9nu2;MOuK@4S%MF1!*P@Yay7KHg?V3kS@5~vWoCcRXClNug_RviwoYDvsw zVJsl7Pfo9sXq+4$#r+g59zBuCpMHQvwbucnay%sWAeKQfD-6?8 z#VL%ov{cUuRN};FmWfxfG+2vKVgpY>-@HEwp-rO0X(P6JSpj>U6WQWYi6@3Z6q|SN z-M90u?kJw8=5CtCUS%%@kwStrM2*eI_a8kWBSRFF>j7*kD$IhD04lm;hM{6p2i!Dt zUQCjN|K>-=Dva~UUSWlI!be$bDz976wW99`E4R+vK}L{y;CY*#FPF{beLVa~Jt5AM zL>Re`1EA3Bcouq3j4 z9y!Yo=m~zse!rM-N>u5P&2Z(9MKYJ4E<>nUaW@-P1=Zn^*oweYGHPuVi;YP7Z|F-< zX`9?PCZNNpI`Ye>3$U8iyjA!I9I)1sr7mT-#CV!!9NtLS(UKumO{m9Uz$hK>CAdYS z3lLp&b~eY-N%#8FQg6WSs4C34_omvGW?VLRKVr*o+}o_?>A`k% zItyQg*X5`;7#G!ZCl|u@mnBa#KJrdI6U>9{jcVC^MA$}+gpy3LjIKg2-AEEasT z8#oAdIVx`>a&r*v!Oq9=^$#_3^O8S3APqpzPwL(&iw9;>(L5rjpjjb!M*GEQ+he+-*ZC<2!Woft}h*8=*4CN#r0I2TeyPt-O1w5;(7rzAIIH z@jy8P*uJ^BOBA}Uzc#^}7yDTF-h&j52jQDlRwrgA$paWDv7P^2{JTcZSopBOp#sJ3sAH4^S>XAP1q{?!bv~Y4EsWE9aln@+LrJ zC3Sz(3R6u;gzLYC$RDDvYrZ@q4b$$vuMd@j&K!-r1wPu-v_=RHuFfKb2iKeVrETdR zBI?OhVi&$ZpQJ*|$JDG;vSty1RER`x8Q9L4NP~I3V*Ls~JMKvQ366-oF9!dz)90dcSFokQH zf5^Eb!HwZq2V~{Do9MW z=8Bdvx&SSg!pMR;5ujUQQ3SpAwuL~Nj^vtAEQuD21R5SNj!-u~FhZd5O+BCU2zt51 z4wdf43|pia3m=ZlnqOvrf7~1GBj@jn;movIHJ}%x4XYj%1GkHL47cI7Nr&Q2%nIog zuPtgX#Vn-_O^rqH!~LbvlA_ft89{K@oFT)7GUlmy*Anzhrq`tryaW)4Hbo072&%U?kb@e zN|6^tY>VHEC_lCMcgnf#`P$f#z^|I7O&+ePF6PX~6J_yUS_%`N#lOtX<}4bL*(?%9 zBlWQzO+qq)23(FhWb7grtKhs@1t*7r>k@FPa5N00$IAYN^|flb21wQf;8NDzS648j z#h0mY*^xNhmlz3&Nv2=XWf$!YBb3CZ*$?4VQ90SJ$7-Tv_2+L|g^+y`4qWScpGfJ2-Km4){be_^{yEV|PM zm%!&a@XoOOXoiAl>)>WK6AyvZY77yZp(9x4lC*3?$zdys7IU>#q(j5VU`_2p64nF- zFWpg#WSOr9qmeq4iLX`H{qoVaZYhbb{#uK5SjDhPHp_IA8uaIxRjA6uSAXqf-3(b9 zThEz!TY_q$WHfB2)a?kdP=Bc#NYV%gkdbU^{sFWX&RI!s`Xph zQxGv;^`1#uDrA;vmU|FqsI*XM_39Aa+9rq{h#CYWkLJGlUni(cIB~L$=Ia!=H<~3S3`iJMs#)WC9Q?n+572C(yNPC9a|x zSIi($l2O5J6ndv__o&Ig?a!XtS;Ff57Qyu|0Ay`~qj06tN#{1%oDb;Sy?Jlr(W9gW z1g4!8J$(G&$%5i3yVk>y&u@;&D;0s=V!s0X-F2sSg?FL`c#b8x4kA&|K(uWy0POnsfZQbAcw5+rYHGx%wyAN=1%r5e-Wb5l@&OIDo$44f~zCyLEzFFw>^4C2FW}1Qw z#sUHFDl2xmYw!sujr}A1tFLO#lgl`%1^|lg%C3{Pi`hZ$P9~#eS9=D9nsNaUhN9I+NThJaMa(z zlVYdUwhLD0H-i(h!mJq(%q~k+aWD_t$+E!^_O+ovPqEMkOH0)Vaw~Ea!Y%e4H04xtMHR;4bE3dNFM&C>Pa?hHfsXVqx`* z>gm3fs(WPcU=R%O!co)JeQ6kjk*5)?j)c^PN2zumuv&TZt77i|6bo0*qlie!?Bg30 zG(P2uZ8N0Pp|j%DK&qr^YabjQULW(nTx+Oir3MT08(&BE05qIoSpX=h7PE|;kX^eM z{^<1VB{QLw)mH+gXGbHaiQ!DIeR_Q~KCO@~4I;!WSk!w&`&1Y_u+Fe%2R8fUPPvTk zvOF^qj5~hNez^8lT*nM3^2GEgUqlvG%j{(H>H)_<+ACjFxEwBKPGi0_$(^cLy-YX` zoLY2WNZ4BnNVhyO&SZ`J>BK;syAa&3QN+AgX9G+jW{<0&JmCx4hrHpY=1yVt9MF*F zdnbf6W;QDKC#E5!#`ByEi`w@+tno^z3RwS5yM>863GG1i=uR>H;7al6NiOvfUeNJ7 z33ZnViB-AdCD<#g*hiPOgJI51n92cDJhEG5r1>`4TBpH^DKntXhGM5Dm8P<`h7jox zPt*Lt>d{tSv3L0%r)pyExa?T7nzbzzJ(10FBR`w__5-7-#UthZS;A%;Ga6Q;%i`ee z&^!?p2Im{OIyvD6Z(R0h80112B5XdwOP|xEnoWwgK{`~-_M^ez878tW@w6U(j@YAY zn5M6fJ46${IKhJO3=&J++#~FLp7;`LzMZV_10ZyiaS97`Ml1J|KU+7*I1*}iahG*#_- z3~%R3vGs6!*Dsd9HmAu+bT0FxeP#WvV(anRD#-v?o-oz806RKaO&d=>=IW53{Dy7b zisy&JX=|e^hM~8)_3ZX}q3fwfyS=NJcF%;PJ}nZi0@(U^ z=h3F%UY-!irPG!b2(NE}Quz@)$Ro<3UF62e#WeO5hG${xnz!cm&XaquDle}p zNOy9kI1*RCh*{}!H&c8oe`t+DgPRtclL`|z2@^Q;jtI*s*jUFvXu|Tb#nwZtWST9F z`xVnXU4p9;Dapc( z^|!bfDsZ)sAwe(TRdP!SQT&RIYsiDIP$rpD-g|fLd+Xo3`9599r&X43mRkt+++w@M zI2D~*ZgJeozgU5tItT0{G)!s{&sM&nhC9kJ8ZVVH ziTQ{n+vu!6t=Lx6{u~v=?!O)+_16(JEu7Gzc&&ucq2u=a=jc?k1^ z;RU%AxVD7AI22m?bBa4>6NPhH9c$;_&#Dg*ROgyr?^u_~jB{IUR z!yh4n&>E<1L6>i7syZ8f#Ni2Eh}#zPgFoudE;@8vVSS~nH=&4Ulk3X67pc;<1nDSk zKRwNlOA6>r?T*E^kz{DL6khd=7)}bZWUD?2XzQqadI`mM4kpB81{$h%EVzuEouUgO z3+X|i6?*15^?J}WHlYzE$AVGuWcxuT{)c93aWduA)yC@i+R@Rq;t6&P*I&TJ_~OZ~ z6w+EkXG|E=U1Rcx8mWr`B*ha?6$XjN^B%(UCxKquE#SAaa?g@05!9j?OO()T`re4i+`Ku~nXrkjR;@L|VT&qnja;~$6 zuV--KCaH`*%z@Ir*2OE#2D(eiX&IdHRckQ|(qbq@Iv!cD_gRZW_bCIqn1;$|{s;xh zqIL)+;OJ5u2l-2^vCX_y}fkOSyEdh$5wrKiB_ck&2L?D~+*K zpK1-jURIS5{Iy%)VCeWFxZ4$2=(E0cLd08aD!|;fNZ_!$=7UsQ%VIzg(x9%@aU$aA z7@tXQi?J!Fr|8A4&k$rnA`&j1d5R`)#G8E}>I%}17Mu$NayL~Sm7hiL&q;6ebZ*W( z#24y>>!Svza7&9;%XiWRefcF?rPZsBv$O5$ zdd*;Qc)7U3X}y9U1Tj5V2IvdM*!PM)E6BDZm$yvATihMupZ?;TIg7fWm-ik#e6*=> z3vAr*Y5R3G`liSMEUQ99hHF=fCrTdC8enpq|V zvj-^V>q;z;SFX`G>Ga4rBtcOgG&^OZBQ`#bm2MCXgG1HFS%fkblbwkjMkBjBsU&B{ zpkM<|UM1r>7XWkMsqIB>BN)NPQ!gW?i=?QmS0# z5cHgZpFG*Quj8i5*Apwq_JVv8q`_qFRmAYDmZ@Pzm!RanSgUnp2M~Fb1K^j?)U!=F z9L5Rt6Ha1#JZ$aaMXK0-WGm`GAB|io!VP*X3Oh-S1PNL4kzM&7^*~~QSvWhS%cO#~ zDWt{f76jex$mS4eVBsk`%Ds)duqZX0nVpN>U-hP)3Nvi9Jg`I`Nq19$j<#72MF_pv zY_Xg9v(b*G+<0{FZksvI?_Ks85q5_(r#Mz(JN9&SkELZ{+eJpi{Mithz(DgmN|{Wq z`*=bXv$dZ?eA%!o?Bi4v9&r_{Cn=|@BFCE7Xd=Z47^R{O&mgu-#zVXQ>GKtCK^oeP z^~q2XUYIxj}CdbhJv;it&pw~f7RBRA%hW2zb>{qqhzy@ znMMGAK{{NKg^cRE)2rBZRouk!N~T~gq0$^IVao*wlV7vBKEU0Ab*e>r4e*KXIQ$-A zqwzz-lOKS~kiMA2!WeE*O>bODCP7kxW?S7V=hfEl=P3Zg8@Hzu0^7&CSQ<-p8HA7uP=pU>yW8ub8VjAM^N|Z&@qwdm~U!80gzp&IB?k{ge zcFG18Mj;hgr3x9+xff5CuA2*D3gcIRu3sAR=A|KT&p<+eK!QZxc@O=LY*Cxcq#++` z#Oyd(k@ASyM4D8JCKY=eB8S{5>t0AJHuD4#oT;_wfovbo*0ku#y|7HCwwmlvOC=kN z@&C7!Ix#@V_n z6r3N>RMD1OoQY_XsbQ3P%g=Rtz(oiX@eD|7Ayq8Pz5=K(DY~^ zM2zqgEeExnqq=o^M6Do4LBl@XezLQ7z4>rUpUJ6HUJYUt79FINszN$}6EQg2UMrBu z`DRPZ1nZBh@J#pWgz&BR%GGAp8;b8VtMur@kNQ!RjM*+2Pc$hS1C74$HxFs$y~%7J#1-%YH|9GHPtg7_B*}?QL@Z5EK}wTIo$RrY5Xg_xF`b?D zUhZSu6FzuX8GLwSOGlf^qmY~QtgOUt_I0mmY)%OmknPz&&YaWoQ4J2v(WJJSrLJ>` z7LS7UPEioQM1WmRzEd_%y1K-mD%3T8%||FR)!7#zRwcQWe%)8{q1MVkWjA%hO_1j; zY_A58A!f`iBVX547artPk7QW6mf;!E)n#QJo{MAQ_Nu^0;h# zv)(8a0_K2SGVgo#Rp)}u4skA+>prfl(sKE|@39Bpm>NcAuE=8mYO5M|z-+%E7F3SS z*|EC?=sNlP*owN$ZchCs?8ynFRk_>}!c;&qU?I0P@x|(jkp*RoibiKta4A3v5|#qbeqyN<5}&N- zH_)EXGZ}li?Af( zK_A#jrnQmF2!Q5sZ-7JJT35cDQ0Z(nnj~CRfbyE600FWaXay#rwt0FAYg3Lonl;Y` zV%mg47nT~+5mU1KaP)UVwjd;bUscgdMTLnu%dL{fg?(fpQx={?024h1AMCv+_cs}{ zc%X8*R^2-}2jduBH^YI6JAHMclkX^1czJX~r{n*WajLpuTKiSKFe4PC# zKIVknOxSwj^$gB~*9@$l1V|$fg%7v)?{0qZ@Nr0Vg;4eJqlcd$${!McN)k0$WrhfN z*xtGW-{5r!=G#@L#wl^4s#koxwVS>FR~fS%Dit$@Z(Q{pLwJ@gkoB5}KwFBdIKjvl znD~d>AfdS022=MMwz3x(Z}1@GzIi`@>@7hguDqgaM*tn;jy>I2tM#--PoLX6FMASP zp98$Ty?7)e_bm~dN+|!slQQU{v3^j!KwompS>?F2SU&HmSyOGa!YxI=k|Ft$*-Cu!9rq^eG$ zOO6gwZ2FerMQ#xa}Hou$%%ik33`*p_pJ%2Oac|k=Sohq;F`_1pML0p znJMXoba10G?ZLR=3czRzGDc+U3NhUY2t89~E{jO-cZ$!p?>*)9iDt#}+t+QspFQ=T zW^#w~UA^|zI4qrgfRGTz>1iCMK^s@EEd)hje9onLPLG3a5BnJ=0e@DQx+#lWIAF{QOs{ilv&3_$q^$tRP{ElAKq3PIPs0+sRm8{V?n4 zjrC8cMOi%YYW5UMaTlh2_G|R`BMI#H4J5gA;^|+!fK*P8@IvUWl^2O{A&r065m^ z7B-=5j3(M%(2_W$HPbmqM!;*&(P;)ZqW8G2%1y!qMSo5)NARttI~7I~Haiur3`SOq zg%4@9lAEFe3PU~ViVBx+7PHStST^tBSLZxsqs@8x^*PTzdphS~jbw(?vPlP@10Sa; z6^Y-QJwbHpIl>_yp4jT!r)SqW=o2A@?Pg7#njYKNGSXZrl0h7S%`d)hR{8FmbBgnH z_*rG62w5Kds_2Yq)j*VN%yNZtcGu}aI!_`JgA7pBNfHg3i_X*f6@v52Cl{5!^NRZK zcx8R~$g4Kmy(e4uH};AwKWB3=Jigv^6Kp#0_`_Om0`GD- z1G(NjU>+}mOJ?*oDM^gV#Eea0$LEdC0K4-ru1F5*QZNm&3MpSafX*_qfy$Hj+=OeE zWP-)3exazQB5#)vSkzl4p?a&l7>2Dtiad(lCNstuWF05az>~8g4}|woiSSNONt{sV zBu*sV*yQ$3KQ!_N2PfYsWX88crJ!GAtxF?+e00ifER}W~9@cNd^M~^QF{I#L1=ld} zIaJhlVn0|;q8?l7(!ets|V1Sy5hETnJ$Pba~ zH){|U^N{T#E41VHk<{KviqUY@OO;hLkXn~=9KY4E4ne8Y>c+eLX}E&UT9KlRHYii- z6@OqiX}HU{+qOqw3(NmbG?yZXaD2p`ndXeS8`znxWRt40yyj&n6{G_8v4wPo~D4o>L2Pqy}m#)6A2E7^$jk9@X5|9?t=`aIEZk6+@-; zqG1Hd>20ys9*AR!7koIWcxDQ6%7I1NFPx4;s^?blGzHdSPzHiUnLe(^H96xvbR~UJ zf`}@7Wn(ql-P1Y^T2vNYrs^w$@nF$t@uUz{B@Q*w!{Xqm&9#vhK;kkP56H1T=AR|2 zwu{mHmai-{)a1GuH3a|(^xgRCwV%_->4h~r1=5yDI)#Pgu(kT`wam{NML$0XB`q-z z4l7`?+TJ>3Zkn-_3UNQB>^VIc^dQ9GFhDl)A&utgx-m2~dteS)4(97BpbF z8NypioHCoUZ*Bk;NrYu)gacFRD>TuMzi_g0FgPnbMRabs2xc7HUS7;goV0pJQdLY^ zg#d+2v$a($BJqdJLpbq5jQ2T@c6?<~L0KyyM79eH>+B0t_FX~SH*Q*ijSu%*j8A?{ zoXq>8_M@s5`d!>e0K1M_kYZ)BDJ`$AU9)j62H=!MjMGAi4cJjGNFg%^vLa@woghyM z|M_ZheN-g-c$KBk$pX$?b^m+@57LsP;Izbl`mc+|QUI zqT{hz!uF=g4MmoX(W#Rgh|G|Oi=`=fB?k(4=Pg>bz-9taxT0<5g~Rh0unQW4tbsdU zH_2_J90T=M$UKmXf9{lKD`s;L+O75;Hv#Q^YkM;_guq%YjI-sl$>=1M%dF)YGX}~z zDogjX&P&?~QO1g|&o1_!tr2CpLX!&3SQ&lD0Nkns^JEsEDC)BA-BQ@EF$} znu;i+cPziVgkQ)hw555p1r37}K&^fE#&^%|u z9cV~#kXr5B$(>4I%HOg0dr2y)aOBbM*)mmB*IE<+#o zn^y>Wrm3>CSJ`}prh;TqJN~C_9J|tDN~!}5JV!cTGL5DJbUK!-&NN_GHm3e#*Pftg z)OvxM*}R3R0?1q}NoT!;ur&je2tAfzVmCp<3XJ=CH99#OHESSg;57+ka)zl!*&L`l z248fZWqxCh@^dNZ*`#4RDxm$)`okZ=44dl|J$LGr3k;t}N8Fl`tu~lw?4}+D5%P1- z1Z8)}g&Uc4>yF8*$pQ$ut`2fXZKTkdCVMqM)3cV$1W6E%>tUcF!)X3J(efxoM^|Ww z`+EhfTrG(@M_QgI%#5reHXrjV8gzwuft!Yr&cG5FL_W z#Lu*C4|Nuga>-4pFh#N#$wE^$UAGBjgBo^t#XTscj>xghb|p+ZuLN!7fL$&2uU0RV z `MZDyI(x`Ws)>{8pC_pbZBh-a-XCV?q~Z`LujHy)+cHxH<752KSzqtFWQ%r_d( zB#v;e8y&RRx^t=?OsbkN+$V} zr@9?ocM+3|L{iY=&}t9ZXF8tGnjrsiH8-TbJ>rZ*I{xFgsW>tB{o#zFNRImQ^^|C3 z>S4&Tl0AK+!>u51WDkUQZu2!lV6Mz?J$mYZlrN~~q9m2wL+uy^6u+`}(HwM-3IbfY z!oZvKXi!c1!`)C25WB|Sqt-f zGI5XBidiOV^|jg{MHrh>()BxwhvX;B8K`U+Q%xSFm0~T_M>jpFEgc0cV#L)%t;jp7 zN-t6+Zm&S{Wa4yNh1smM#=9Rr*x%aR`M^&*MO4w8>o%QCMzMBK@O0&H(%i~-3GykT zDOiDNm|!#-G2Z5>ett=(yT5OJYKtXt$MtKPcrKIzI%_-~W;u;40@)SW~x>u&`kc%AQ&K41yQJZ&oZDcVsnBZKC z-n7&SbVRbf&OdS%z!NA{t=F%uO_d@hRDdHpn-LQ7WRE?NM$=I}bQ9s!a@w-vB5d6$ z-}w4f@iDS;x0<8xTwB@P>Bni-g2YADcSW0oSJr_=@@bfppNZ1!hAs_o#g2_u@HOkC zmf=+u+?y5Od`^ui0G7lu62~$5Fo}qHr#yzj*)aj1P>nAp{PsdfAfncBHvTBCdMnGZ zmBoM|h~)xESH2f@SQ|Uo<0-*!T2^o_oYgB#&6s=Cn3zDr5;jJ-Ve{~6cn^*`$$voz z(Gj;Sa-$`et5m0k6k@>Cge{qr@^ClS-EZw}UQn!)^HqVwH5Z*_4@)^f=n#9%C@+D`A;)2I z?550B&BAYFv%RG=E8(Zxk$Q2}~90d7O_Tcfv~pBu$=!I92i- zrQ{5*apRpwxYI+z2;XQl+mm!v1d;CC91vz%8j*g{+}S4sG=4DFL5!G3#Sfj;v@926 zQImoOE>lc^_adeoxBe2k8V#5@?r>ixAINurWWq_Z7d zi?EplD5lo{H6A<0EEVw8bu3tg7cApk#5Qx5T zY}$)txsDl#crxB+0GPiz?R|M0_uaF3hZS%EA$W^CuF6nFvmj~vgPkWIZQJ5k(zfLz zV28=T>(bNA1yK0sTr*9X|bP#L%y!JDhe%U7npxzN3U5)GusXtJEHz!Q$eOg3nQ z)2TbC7lKafW>A9!3+shfE|UsU$kYg}lgojd7xCA0*kNQRPT(dO2f{ta)05!vBax4o zp{DVgc~-cZ_a3o&w*P>`@rEZm!j)Q&6hQR0tOge%;BX@{Kj3-7DD1KX3e?+BXx`!A zxR2}HvS?e1cpK#B5|X*cPTNAZZkA7SvnAkEZvtVAJFBSdVwTF-j!BC$kbA<-tGQJ?sIDsd9Q+$izFb1iIGX2>7^)^6AXIhW5{3GyQQ!!NbY%hISl z{$O#D%v6al7^0Vrx7OC~ytTGo8%w=GDJ~G^uL#cqjonm+trfFx8kUP)#4_H%J+Qjs zI=a_EyQ<+F%b!v(~yo6>^U9%wf;P=fCap& z9i_z!gAQ$b4Z|-1sO3e?8jzc5Bj`oVWg9u{gLyq`c_jHOd_XvHsX=>?l8``i#sOd` zZ18F+uxVygh^5aaXV(?y9!XQ_yMGR-84Ke)>qU)>%uWg;jk)p`w3R_597-}ic7U_l zrH&!RZEjIITGxzV;GP=f562CcgmD|C&78Xy(jseMa!!M9&;^pVL^`@3C}>y`$v)LZ z!$9N7DG%DMv!)x(kBtgub%>1eo5)*6p55qFq7syTJsC`kn6 zCF>xASpL+Rcd6#CysBZ`DIacaZQg&lvA5}GcciAau{orU?v!^Q+~42X#4ozPwe|4R z{kt2xoBP|3KHA-X^5DVl=ANlFsY5ebm=v6~@WIaJ2bpMei5e2JL6=U1LXn6ei-C1x)~ z9qk*JmPO57cWw^NU?+J(Bc0m_h$dfU#5El?jqW=4{blo~0M&4DYeWxU<9)DX20vWs zHQ#!+xb)-&A9kT}A?1+?Xi4TuAobhT(qpOI#90wtz*U9msWRD-OoIDdZN%P5<{rlG zm6olllt-@2uSc5NjfExW>R>^KRQ%4OiZQz3RMBmw8+Eh>VbJ(4aK6e`<(HF4IuE1( zrN;2i)*8hqn0ZSGNRXvO15;CVr-1X7Fz0Tas31L9Fkoc$SjS&tP_{*Cry?mi>@H*| zT;G;2Hlj0Jwl<2S4mmi(&GdbD&CY6pOe+Ax4_pYXb>di2l2 zE%B{t3iC3vh0Q$Bakleo!6#$`O5{6(@0QRWK1-9 zquC|LGnS(`n%SM3o>+zGmBgcU7y<*zt3F5MY_lX%pH>r9ugj`noSD-?)jRb5JkgS= z$2P&jd%THltgqFIC#@+_A;D(VE7QB`FN`*sTf@4I7w&i@OPnlA%AO13YQ1HFDGi15 zoXGHRrxj8SY)sN#0@3&!K9M?&A*K>r6v220WtodMJ%KI+L<){>&Kjl~ryauE%FM1* zl?i)D zX67;L$uUkyS28ylYLyBQ5aj_!q#AL{F{d}CM?&SGiAbic(dY1LmYEP#TwAp;wfYr? z8J(U6U;A?49t3yk)^B{d);$*avaS2oHWNhtW9d#tlTgwsUOe@#U#@kBzI^MEEX&|@ zWBsCW(CqP0pg`9*6GvbzunZ0P6AqLFMRJi~LLmEYE-A?w# z%8{Uyu&`e_PmoLiL6!4i)}Bg~(m9vwXWS2$(cbh@30nHV?9-a45MeQ7WcN5%!>zPo zRB%P5K`}?%{FXJFq-aqhcZg>7qlm4-`Gc+14-3ND3UAy}9@Z+4c}U$ybBmf!(~ae+ zP7^MKlHbS3O^u9%DiJe41-IshgF*@n|3Tmvb>?#`;i-DH7u|UnGD5!~MzevmU4eRL za7_Z?$zN0?HG{x3ahlj&U0#$f6#^gP{M+6sWL*}z5qV@G9glA%8d~`j0 zF?bLZNa+_W+@$X$qK&GWlfIn`(T-PosxB{RQO8^_~a5x|&Ba*HZb;ji^`jvRk5q8I$FQScemS zzNLe~K5aCmN;8^}Re=eGW8W!?+@lOk?$7a>@9}l$O7-NTQkxp{qbHp2%yt1FBpwVo z_OOj{SD=!6MEgQ-l2b?9b~Nt>fAX{6dh4wlZxwFW4uc(8*3C$Sa2Hzi3qd3rSLf)6 z)tgtr;lAQvMA178(JdbIrFUp|I;3bWW)4qZc&hn|;LVZCQR~4eKPw_@=Pt6}!Mwqf z7@$9X(LurqGO!8Y;z*HtoANgUonBp_A%{Q&g0eR|2O2{-1rqNr&K}8B6?)K9GpSpk zWcu-RITdgpbi4K=j~WkmkJQV>ybcssUU3EmC{;kpcvk(Axgz~~FMWHOzJ31vYBa{Z zET}$?b&)Y`PPtoGoZVN&?%o8U<(tz91%f#Zk(-Bze`Bo55%v%*d6fOq-Ou3^z}3KL zu2scZ1T(wAu6s0P*bv0#9Q8Oq_NZM|r3R4iWQfw7w5qCQPEclVT}`ZVotp{H1e!SN z_8`?vCm=!^F4>wQSjO*XA8BVz2T(^ScjTpCMtbHnCIXioZ%qA~6dP*?$-Vk%l6!&; zNIMm!kf0@)I_<2Pv#P;3F&qa&I)Wo-FKXxCS0kW$Vw9jV%xat zwR&#pl&hav)OM_j)3u)f;IW`%d+-8oTRp@9l71MAt$yWZSXNAEV3?d6VXO3cx8C|D zyszSMpf(CYmjGHh?gD1k!e%mv3Y9cLus4N}!g!$-v60ZW**uvI9J8>`s+efP^H|NJ zaAfG+JTHS zFstSP7H+uwv+9XdxDqk{@uH_>c_l zfzy@8+``H9!e0PPtT2#<(K{jX!uDX+jE0^4oZo7!TwR4ynSFh2svf~4d9zKG)>{N@ zS3e_}(C`Aqm>UmreqGB)q2&lG?VMpyo#w$z6=g3nRWdpf5uCLPd(T}DX)({H z$$}o)rs2o=6QE*R(tfrj@}a+Iy%c(cd>&0(?cmr)O3+nUl1JRzKs(u`))g_-=%QIT z7#V7ij`ViO(fn_o$5h;Z4$Z%lVh>T=GM}dq) zvTfH7jLO&FE7!8pILu1fF_eh;v_D(BbMtADW#5Ry#uC?STS1L~BF3SQ37*H8^Fi$3 zdvn`?sjH}2f~bb*87k>G%n8Ev=y2F|Qs8oM?auKcJTqNFhusUigfFdkwyp|%C$?w` z!0W?_;$>w*wRAW=qNO$JN|S=ltRX)!m{!u;l^HFTD;U|I66uHP zRZV&ozioT@@ssW5<7J%Kt^C^TIj2s89$<`H$WgtEFe0dDY{mdb%umUF4LVPFSg(h| zYW*aqV66KJFmSw^G`*w?jVenn63hdDsxllWBaZ^IDK*1kNAU8rB@r^4!`Go66)QdI7LD zM;LS7X4v2hN+wkuq#*2LFVX|2%6U^ZysYC0dfgZ=uS?Ve=FRvxnqSRPWau4|P`e(i z%+2)SDb09PRhynTf=TU4L{&-Pohm*&_V;;X=}Wy^J0irgg9F_ zsTHD=)22vcoIVxV1t69;*hq=(W3d&JEnPwy+r8Pq`*lS6qDL;b){O_rTy%Db`RJt$ zfSIo31UoX((3y!MO9#hy*3xh_pEomD9T6xJjo%fR>{$wOL71IiK766{bY11O?n)Yh zOwNZ6Pm3TQSHi>9PglxsNwfP=<%$VOL}sC04f3OTb?%=w>nEs?u}YgDum)ScC5*^0 zqu|-RDpBH4xgXXM@po}u>u#QVB39>-{%b{bm_CnlX9P{RZCr2KolM1W?WQeajm3)R zDmVx!(jr2P-Ueo`vh24fD;uusG~&6 zsGL*nDiqBfo;nPpRO=aBr=b~9b|#UuV)~@WRQ{QnavhNHKsR>3VbStp7^5!$=~GZT zwnxWc9!n&bJOUpyt2%0?2Z(B&VGE1Yx(O{nnqJt|8b;V9hO{hW zKHXQ{%mE7OZw@6_s4Wx=G<|(X8jsmq=p`^t%Zan9DdN7Jv|B1@zihj80EsNYkcAL6 zdYY;amyl(k=g2cI(pM#`(X|k<$|Sm~oI6&A>o?|fI9%uW_Hg}{{&(BlMK@OGf!W~+_?>g+y{Ja6!UZp_`B+$Q@nnr!%zlvHZI9M$9!ry|^JsFB z!v6n{FWae$_~(Lefh` z41oxF0;6qaY8FDNl5tE=P$)8=$xJN;AM>y=IBK~37JA@pqT~*X2q{U*(7@P3~ zSq1d!!Z`*^b~nYy7@1J)^?vtE_nES(M*aPu5m`9jIcUZSQCXv0C!yhsJjQc?7rKmx z&!LHNTqb80mch&@Jha8hbV%LwqDy>m9s|KxUG|M~RBqgl>7%gibL|6kaXJ#L))IYz zVsR*zb*>hMIBK`prhlI~>e$1WhjBCI7DrH5XZJ!r46_6!Yh)2>#F-D0!_4DgRb87d z;H{ckPv`$a+TchD?IzL|WP#weY_~=yBCe^}LUAGmf_wTA)pkX!bY1mGy;pKO@~#Oa zf&IoLY?7-IAjqnF%D!y+w%AY9Omr?jp6z$}fgU=~#QTEI%`6;pSk!dy;D>ghAO&?M zHNPU`f!LHAJ6qtsq!qoQf`ZvM7r^g*_|ewgFIB_jlWF58!)3Be1kW;wy#gwx7OV6G zhD;b~5DEgsn7v#J0h59&27 zg>&Rq@01}PO4=PFR~iXd<{;j~$IOCMm=qdaB-4CtL~_tGMN>Gz?MQ)l^H;9-Bq&DJ zutC&H2e>bS!z>-znesR~_bdVvO=K<7uUmwjRF=meY%GGF%7_`-jO&+F6p~wd(V8hH zTI*D12oP%&e)Wy?DtDaORK|oSk~O2bE6|@;R-o=F^O%7T4@HDA62P$UQ%F`KNe{=j!av2OmN6hf)|l+k}&!gElU-=x4E~o(J- zBGo&xo2Osg{8sgK+9JA545LkT9V!=@3K*j2oW+dtU`;lo%%!@iJ)JKtJbpu*J-$nl2Sgm4rn*U6B>cKxtAuFT z8G^gIX|)L0YUimJqO3cc?cFcrX*D?I`+2G3JQkl9`mr`R02Xy_Oa84patt#aTjH1u zR+3h@$8TO!v&C}G>us)+x)P5>=r{9NS=3Q}!#ecAXUc~UYBhD6VA5qOGh=gn7#duP zEi*iVV2mgkrEBW+O59z_plMG@kw|=L2PAbR#m?u|en{BB%mGFXj+$Cg3z^{i3{*(H z_SsIKQ}+j)PCh$)3X*0GtF6ktJg>z3&eH{s_8cm$@)KubSl0d>?chB6M7W=hgBL>&Hj6laq^a{(z3+hT6@6lkcqmu1b3X(=s_*9xRRnxg|3E0=$4b-6I(FCiF_ zrrQI{9`$;#y}vH8CWwE6w!)^a_>p0;i;!MDHKAwbvAOZ%;N0^F&t&Ich2^0KUaMND zF3L!aTGU0>Nw2Nj?dDvtQ?&w!6sn71x?{}-a2kS_%!iE{Kmra|Xr;hf z_bA!Hf>*#8V@NQwD-xevKRpBUhAo0?NEPcIEp3C!+yt9^xVu5HK$UyWqBt}~D<)`* zB!HOiy%+m0B)d1`CAC$u+;AHta*)X)#N_C$nw_J1(v;)1s2g_5SHN7r%DlJMhRvm;%f$xOJ=c4fnNed0&R6_COeHE^1}Nn zYE5Y@vAMNygM=;dbYT`DU~e|GQxo0c*GyA!YH5zmjNHzqE?VqM23` z(gokjAhI$?zO3+0X%Wy=Sg}4VgRbI$Sj=D_w9`7crIb4~l*Ef7jXlO0r$;-n5I=1% z^*Ex|^Wpe$hOK)ai8$yD{K1qDDu*tqR~7Fi$1neTGrU9rGXG4)l)Ovi%o zEL+>~q&DgPY%RnE)|+3q(TZ5*E!Gy-tIyPqVLVw?e`NM0TEM(swMvl!>1!iR&qyjj zoX5+-#PT4PpI+VRlTLG3zWLcn@2UM8be~?m_vG>J-nH_FXIs5GWK)vafaB+5%ie~v zSl!X)2jb#T%)HrFjvW+bQ5b*kC5O`Ngsy$n`$^ z_OSs?&iuLyrY&$sD-E<>p03_=_q=RYwyw) z$C2iJ=hl3R^g$0|nkoT0SjLveIv`nN$j_e1lm%*Ldlz zz3G*AQh%@a_rLFm$jGcLgxsymmLM}CG7fj#=R<}`tQ2+>nS4l;Q`(8p)}y23%?KA} zs)=yf5+|ZWMLBIVRv(Kg@!83bF)wkJ_}>zaFZm-R;8KDjpW;JEqZ`ox3DCRDuj>4ArCp(M_K8w~+;o4dUn4dcw?uh$pq@8h(?`y2JQ zHx?SrZ!9(+EHxf{Tp!`%=IiE&A1^En8eN*-_!xhdi6$_j`8sJ6cPcF91S-Pc*q%|H{qgzI;-D|4DPfpImEf z+b4~041OFAU*+4z#UTb1h|fk&&lYRn&mZTX$)4BRzcMR#7V7VRe0aXOH8FX`Pmx9=+_RM6q zPyAll85UH*qmGA%MV03&UYeS#Fyi;Vm-5zE{ zxCl~AN~1!#1~+NI^agkTO;NkT*2CP0Er7GzQX1opzDE<=tKbt)4kREFXEoU*YJ~hJ|iLH-L>0y9<7|$*6K6>yHV?6it6)5FgTY}uJx4604^()n_o|RB_@0uc*s}T z4p77{6>K$5dCIDkl#L+!|ax-?0Uu`~1gGXx_q?PR>}wX@9iU zfAbSB272y`(&xidwr1Er^Q~Ncdi&YkiOnoqHM4D?0AI*R^CAFUQ?kP&h{D zH$RO|!p@>F@Ds;@QAfcTV7A^XM&|kJpW!QXEa9m6eAsX8at>#;oo(+~t;)CR-qnR~ z5foYcfkDP#d8YHEZ2j~2^>4#HU;@5|3(J4K5{MfEaOtE_$`Q7~MGzQ_x*T-tNagGQ zj(ZIN^|lReNz(yn9stoBuYcp54n)OjkUi5rSQ!pQ-}{;^`{N;a@Ac2U(Gg{W?6k&* z2P4~IZb$q`bMS1C&GzryrqZU){C?7jXO`s%-PS<2oipboDGgpB*c4Fa8k&vYd( zF!8(X-|TD}v>=I&2i>x>IbY`Iy#=^+XNvZ&diva_YV$l$S36@Yal6NZ(;n9ymD?WP zvKJhreDTq&k1_xRNBuo6$Kd?VuYZ2?>mE0ooqzrJQ-Kdq#9r@^U9$nbpuxGuVvu#R zE6c`f#kymxx$`Y&U2@P7l*WcAhob2KRk%=DAG-YK={$cOs9){MGMxWez52;Q<2uAw zogswZ^BROl)$RuT>PHXWg+2;HvC(JTbs^MIf`QIZTwDix&`!sQc)9xKSFQj_9l$vK z(LQ(;i^D#e#jXC{ID(tDD*;pl)@)EisoDIh$+7j*CnhXVt&nhv+Mj!eV+cY--2;VN zh-C~91n(nx_<$4nDI4d;wc0Rca~$5EGfu%tbspa$+4e!DS{9?fb_AWA2$;M_e% z+s7U+n#6%m0M;(FX9G|*@al9hp}{|wt1FLh-CKF{zwrycNqRgxNJP-jgbOZ8XA@Jw z1Q(8CNBz4&mKEyPbK*v64J97*of1MAG}+_wA3xy+#HHIiWXF88Z56}q1ipS8M|3K~ zp3-<%Hq5==#tBBAEl78v-P!H$AH~Mizf6LGxg$gR?Y#cGqJ5wdP!79>@tcF=js5cZ z>;L(B412SPY%F{2Re2!3v8arTjxw@6V8c}L#%ASKeWmq4L(F66h-S+3J6BujA zy2xZA>I0{Ly5?wy`)5WuJ213uXyILv!mtPTDi}N(h^u@qei!&~R0pu0iGv5yAas4g z5|n|kA~0blk@??D$V7{Q9bzAy$L8jMsp5@({rCOXKfnG>l0+pqaC4#X5rO!eP{R$5 zI%aq8Bxefo)svEZM#Gy82Vi zqm?&F8$5xbMGvZB;!inMNPX>a?!_kcf2;2s5fRGUGdYfBV4~0=J1F_4tlX)055K{V zpT7QWuLBoN@k;2ZnJb;nNutzOMnEI92d3ZVv+}5QBuI;3?VW~tSl)Z{%bzBP(^KfQ zqF+?6t0tNTA`Ei^tQ+PA)sm#bMBjo7_8*hu=}GYSJ?4Oe=pdS>ZI3tetM-nBg|o3E z5vD0(Y9&sJJTPBBOy90Y^PSEfX$JjvrHku#E4xo7Z%gDG9dyeVkMNdA;D|V8gwR=> z#|${+bQ^yjKYPe`Plo#^`zL!?zX^*l>S`RcPvz@Im+j-d~Y z8`*LdO`fLp9}ikMGoFV*I_U85KOG!*Ojbr%7UN?9m+0}LC~2GW$AgpIYA@1HX{6+6 z(Aia)%SPwcS(LVrcbP-$6v8m)PT;#V;o1-B=p+Bva<|n%7z>CN3t-|q$`7LSoyU$G zDR}<`nszceacG+&xH|)b$R5!jy!6Sz$q3bju$iBw1czL@+^)?!{jzZg@;}jKH+Hnl zMn$}KO-NLa>9+X9a8B!Qp)InC%E@=QW76a~EX?zuK|37%7p{K$fle~fT>pR?rpW|& zpdi@?J8mZk80AjTt7I4j%#8`GQrHv#s+6t4;XN&zA5_1GIgBCJTYOMLykn9#Ke3r* z{}@&6;B3Fofh4U!XBT<<%X}37`OPn;G7`lAvnmfk6kG(wC@;l9Clc2!&)K8flBhst zfxPb{`kWrRPQsL&=ySnc3LN4Db`ZM9<%%)1I(k1Z5K55O4vZ!`X_JoPpfrDKmwG@| zlPif&46Ip5rb;ypF7)p2XJ9W$GDd_pfcqYLvoOWs)umA!Bl}m6vFG_N1&J(BH94#U z(Im)i?6~0!@0g9`KW30Mn?r13JYzVq0>iF;X~J_~Eu>PU+crK3aT%dgx-~ zwTK3qo0btRH9@l>SA!vR09@gUzRsW3a`Mkc?~FT|b2T_f@?RjVTus;(8I5ay9;~e0 zo)1!stznWa9o;VT^H-+K04GSQyMOF*z z-T+SEh~V^dKF#EGk0pCg0Z?pD;S-jET1?YG>@C1yN;Vx1jA0K80xPQ$qyT6j4)HVsjW6lR&!sH*?>h z^6No=Jtl*@b;}&kts31D9`;^6c^R#Tzp1gq6HyhJS)xs}BPzI=i{B&@f@?h=aO- z?KS4NqW5CntW%Q>t9Qb00iL1^l?^k1m`gQ< zqL%g#cc|E?OS~tQF!zLgkjc4UzOSSYJ4bb7V9w6R`}}JF||edvpwFe~5KK zGO^jSdt>+jlL7Vo| z7g$ftYFgL!E*Qt`YyJsV3v!V!jV#3&4Fl1P+z`8qW6!`oGe)cB+q~63HQjCWU;&dA zfFkY@?kb@#DBIR}7HJr}n_xh>GDasuHWz<0CLN5_+J69Q(6Q4fFPnRyrQe)$leX*6 z%~!%YWi-nKZ&tt2J7wkoHf+5glt#Zu!x@HT!%6?a2B3yD-;{l+>BExzmQ?C$g<6@6 z4hw&P+YkB%9If_EPUkcO0}SV+xmL2SZ{QO5sCEarU}G9Cn~jq2_0y9QPgYH88DB)o zOH^10N=*&Bpm<5j7;6cpl8dkiWB9XTvvBo)ZJTS`az z6`50k09*+w8_8dR;#=mYW^B`bw|pX9qF4i+Jci=ry=UUYV83hKmrZp7&xPxTVbCbB>%utW zHb{(IZgtbWv=0`_;=tStRXlxkuN)kmY+{Z|icS?*@D1Yb%__qGbRD0T+4B2^`KyaR zU_X~FPwbmGq&-7G0vN;J29&%mE-!be;Ii=Za2`vyz%0DR(%)!v+I$<~9~EET(KED502+Ch*qpcRD+q zA%!ajJ$ynOr8cgbsoyhmUHGarV8+)2Dgc}iG60_#GPD3^Md#`gW>iw-$=RfVLNnEI z=f*Xf1)r4Z&BAbpjCcFa!|CHq`sCR(4&K&pCe7pA;b$}t2%bAvt~|P5ZGgF+r0w%# zU|AP#yYh&Ah(`3dFVY^a`WT5C2g$8L@4)>c>)rhd zNzsQ|+5N_~_;)!(0B8BR0OeY5^Q4NXp+6B^Jhk=$=Q{6U;Xj8*|6w5i?~ZzgtIa~ zgjV#!X|1h3VT3iOXRFdOVO3rgo35W=RT9?WMm)8~U*TH>MtWQ0XOA`VgQ!n6DdSEb z-_gBk;};z%qKS0Zv0waRyYjAcbbNIQoQ}>XX!8X7kPdvc$i0ymV4&p$1fF#wUPOcu zzmLH!;pxe40G{{SV?_e&q!I26(cu1X(;*;)Li(%D5dW$EE&oM>8{g6`r`dM2g2_=s zce501%7m2k#Yu8A6=0jtABO|!WP>}#^Ko-xhs@C#YLVfO@uzi1oru-+>0oYDCpPfn zr#4im-)D}%DunR*x6k!iW+ngl{CO=#fRBZUD7D@`!lTOKqY{Ee5fil+z_KQ{Wj{$=^4+i$rY;!Ug#vb|6eoS!5S z?>-tGj>etiL)506dp?#%$FHJe(QJP$`6Z0ZKM&m14k32mE=_NX=xP&UtR_IT{_syr6P}8D5J}byJHwqL#)_Yjx$z%A6+CG+qF-wx?pojzIl4IF zWMh3NpFF=!PF_vu8YbV`gzU#eI_7_r5Sd3A9K@??kl*MqrM0XHoX`G%)HkD3`Ky&* zQAp|t&T|iGeA00(zYmekL*0JhU?4%Z=acjwv)QFx3=l`W8j)?*82(yL{xQtuib*jt z-sP)n_6K)FKu=K48J`d4bW#NieKlM>u_#9r4TPORPO;sHEohYHpW66BwNc?u%O)j$ zr-3z4Gs%FhNOj1?-MhwC%OBkyTl~7S;-;2N{08JGwozA@uZ`B;dXW*tnjM%MK2)@k z@tM6-1Zxu{BzZi2dUt(=Y`{Ri?4it0A9M~6DieMRyq@TNTAp*3rs=jddMzq;G4dbFFh_620Hbn58I#8Xv-SQS@-fq6r}aXzsWz zLvYS43|bRPj}M2OIIillhOgN#67>+n2n`6Lr?EuAsn76T=p+}=aa*Ub50#&%rUBjt zv8%r%lncuWY+qm^oHtngQaQYOXy?oVxcX(d$mg&M41rI{d^x3S@QX$vBQ;~z6hNX-DH=dM1TiIrv`K^#w?gj^M5)-1YrpFAdCwrO)*vnZn)NoKoq z%BcT-`8?O6S!=QtMIGd2DM4u1Xg7V>{gb(1EGao8DK0ZNYUx6{EC2b8kyqE~1|Y(1 z!`^-OaLry~0YdE9>J9z)kyNxmYx8X7f$J`TK#}Rld)FH1McW5fwHs-Dz7x|{NG%Rh z>KY@obQ;z_qov ztsq$kno}yek|74fC^o<&x;Z5{an%^@spDqKcBM`-rln>R$m_h(_((C?^W}>JoauqP z{s?te^4A3V;;0zltvY0XJAJUrvnrclg%pj;TCQRU0Di8`v;oHG_T;!Ud(s%;)7l6O zfEQaz`!rwX1BMG{8n(zLzjYREodievPBp2Nj!w@!~k*%g^2{7xB~&wl0kgz_ER$ zElE6r0S1bf?dedZY1Z!2?*eZ7I1Wyh>N9W;4q_VLO17sajvGt`*=S3Nq}(Kdi1Ead zoLoi=bTH@2cjZ+8*W+U2~MFnH-3UX}G zgqU!KNV?lHJ+?envY7%~YyZz=zDrKI;t81sFT5&9GV1bBL8jnk89@?f%9n~N#T=@z zO#cme2%7b}V%gM~1<~5BAgbt&n(lgU7{CTjMwi&$^1OTfXB4&kJj21K-Uf{#lWwydg5CgxhqAf=! zW7rh0dz0fXGuw5^c@kbW&-a`@p?YAWM~34XxT0~-llw!p`9*hZMbDGuLZG5Va&1q= znFZWcVNg*p=voFY*`2GJu^r>h{R(<&7pKmGoY#LU@wfa*+ULeXl~#!jW^wY~H1`5n z^evek_myVDRVc52KE%!~g@^e)UTirUFkQ9ZvmOm#3&O*D_M~x?UWH}bm^_PR_gdY~ zk{I4=bO`U=DqEq^gs$qC%IlcCQ)4%fMqDoD6U|MKEseLaF|C+*unkwU2&-v|UFYc5aIY znLb=)+r98u7rD2pYVgm%xfQ%ml0*|~_0}b3-1VYIRWg+ewWx*Jl?EKI{0{7R+5BP8 zmBthuLFQ0hj5hJeC2qIe8Q)8Zk_#={awA7lT07{A;Va9CIvrt=a_Z=1gBn%hNZVV_ zxucmB$|p@?GE0^c77gu06N=xycGDSWF+~6P>E+32cw)E2I#n}bmt(de-D>czd?7Fp zB3f76nRN>L|E?dr097Ej+dlR&CX30-(qC3>cP!Kh80tqJ+OqEmsKnE~h07_W^# zaC<=jcu|?xjOEx{w)#2dX;a=3FFPL$JKOq|-@=jDZ!^WBN><5S!8joYk-P3juB*7Z zWEtf4h>1f+K9K`3*d~~0)|tom?~^71yy{NA|pJK zAYjGfhM8S7MN_7Oa@3Gphb8Q+@ttfgH?B>c3xyPM2sHUwZq=`UD|oUv@nmV@$u&Kp z4&%-1q)73E4rZF7(#sGZ1GCjhZyOUo$QF-r*rofB8JPgviw8nmjq=0ZO0ZIn=>(hyg+yvaew`YH4-js#^8NR%#b1 zhNCZSWn_NwU!@VzwbSu<%Oql8RbmgOw7kTiUsrxjq@RoamgVhLY-{qMM58zH98Jf> z!}!J8i%nuWNLbx$FZ%_zN&I_aq-yyf);esx{<+@fTu|U_r*BT3@>Ki0 z_$;`iX-_{Vvs3N&;Hw7n99d=$b}v3tZmHBI{bKlP%#AgXH+bWWiqA;?TD4BUl*+~G zpKtjBPQ*7qpZ~7-%*q@wQQuOjem*b0knN6K(+ZdR;)p;SAL+ialHi~=ZLK$JpSLyI3d}jPYbb-8m`}VU3W#{t@ zUz>pG*eyrwgW|Sv4k0(p1V@#z5MfzXP9{-FXS-DLG)*k|St?+)?&6^kO)9eA`kq+M zjsWEcP8u>SK3nNP6j_rcXSB|(!JyRu%WYn348K@*%G+z7EUYe)I&+>MF{qv{Vj1(F zmTpezw-oy=y?SM>8RA;?~{)C?dnFT)ilcO*Y&bbc=uc!|i9UKsd>*MT`@7POf356vYZ`xz0i+fY8nz z5fi`*YevUroOd&~W~N7+!)=Z4^u#|{Cl+)SF_2?t=0MD{hTi=j{~O{}jlF?gK`~`h z=AzbT-pY}6i&d}E&H5%%g5c~%b22c$($qh zPF}v0YX%HgWL8p(Ak>2(>(u0J4YH5a*iiYbPZ?>VUHA7j;SCh`KBWPl2LFb97w#?Lc+T(}+Dnm8z1AeFmQ4jo&<0F&dV-q^36243Pb4_( zU6JC-^r9v}$t3`t%l_6Z?%Eb?T0$?RBJCD;R-dli4Lpp6Rd;cAJV6?lUM8Ia>SIVr zw^&hY+;h%K>!KOhp%ZQ!aL|5E!IDWNc=m{`4`*tKBQtT3breYW-Md zLTP;;%?6cjf0=-jvmM-jsAbeo)r{6ElrA4rt^NG2hx6mqnNmpa+P&&L+4b&|`}dcOCSSBfPH6tQiV?jp=@)|)-aMtF425>FuuC97c$s%cijnDjG3H!5Pv95 zqMWMe%xgymBU3ylFN66L`yoc@G48WHrQLG**(D^<=;wc-#_?Ox*UE$;%9o`{#23|d zuU=(=keM|oXjpMXn@dfjF7I+pqc+!tvPsp#or;SIEn#m0jIl*|2=a1CY%>29v&&|L zg&pK|?9Ffey-&-(Z2a}dzi$04K`;sG>P%5Kyn2u}q`?Y>k5~G`A&NxjCnKJWGBEg( zREBjHFuwCw#I=#eYKUEaSB_@}TZA~I`{kT*Vqj6J)Mf*scWFC(DGi4WC)!(FLr~-J zK1KZuY;k#~^|u`GEj^1nh{Ym8EUQkkiZ8i%BDRT{fankQgwd0mNn&yPge~s&6&QKY z{qiB|gdumfdi3atB9Yp=3r!r4r5_xiP0h-Mdx{LhWWb;mTb25`0S-bbHk z8rRIP)`kC;sEHPZMsfGq!__LILB@593-cgl*1HF?s;OQq1*QT$rLE1|9c^}^YF8fM zHKhg=00#2hK6(3Ea{~2&P>)CoNWg(h;r?)hr^hzU?DOqI31VyWz33#{hhy;A@E z7uOQ8`V!zFATOj*nRq-?n0++f*!p{Vt#T||@cKq_%FE+pTuMiC#!FQsy%t*JfFQkP zv=t&kX%>O_W$=S-TJja1{>6i*cF58hK#OqVu|+=**%r-!AVDkycExXBN{A? zFR9vZ!wZgrTw7u;U=)QWa3+2bwbnNWKeDX|TqN(>M~M}J*@F7Vl<`6r97!doiYX!q zZ`^Jcx;s*libNxlbmcvD9y8in2~t5iYi+_o#xYEU^q5&4e71`i-2(c_;icXcQP09{ zC%aZ8-{;mXDn}Ptf}>PhOrYD$WR_vk=Q)=Y=0(>WO#liXC>P2H34&Oh<1EjJBXdZe zrC_s1ibGec2$mN=QYwQMYN8mta2Dx$n51T?V~F~$!9-_J7j!k3_Fu8(Y!iAf?nbva z-YJ#s_`wRH5(L~lQQ}|QMe5baQ$tp_aD+)npG60Ovj5F5_ix{Omww-dA=5xlEZV_? z{*aJ^^6b;Hp*(9e%e8Q__?k@nRq|AFhOR}VFx`sVlTY0B70zd8bi)0pxz4&0rrFSc z7k5vx*j~-88GQypuKa}%67ip$3j)}Lq+%Y<$9z%o1Jjix3YKFcpIzF#wD~!3EPFTR zZm;13SljLObS2L#8<<~zeNce^dAW2Q=J6OM5`i7Xb5VVroCmBouu9@gBO4#Q+DvPV z*T|;%6gm{7CUOdoR+W2;7q08GaxgfRim6N5EM)=oX&b7G8OhisE9VokHCQa1>Z*l5 z&qFyN02sllSraJbc!>MHZ;5yJ`)yi(8?74?~}x}nq(F+`q0qBf`W z$)Hj+Q+!sp$R=8?^8yorK!BNRQ*ml$c?27mx(h=btJ2`INbDWKaLx<^fr*1NfI+p} z%wTIww2K)CA}1-Gh))>AD`uSoK^K6i7I1-wu;*YNz50W6Aj!{|V%VX5jEOwT@<;q=zLDmS}Ki= zI5YUFLHW=eZB!}>S&^sa6DsGOQIDelSWH9{d1Ez6UCcvU-zm-{a*54`a(IJe#lBkK z^i~mBgl?>-wcjaPAT|VE^PipS1JY^lnIQ}rR#@LP6Pe21Y;2jh>HCTB3ma@150Y|! zqNNkG5W5Fw6b6qZH_^v8zff03(CQzbcyAO9u~azW)6q+6^30=hqueFtf{qBU?lFh{dL5VRE({`1ai$GC^c5XaYD&;=$Y4%6>k zrm2Wcz&s+LV>W&Z)O#wJlOW>s>t1z{V+Y|XPs)|F9{$Q?i`y3GEqkU}3d_T25b#q? zi)ER`rAxbmE0-?qA4c&6-azQaB{^}{VHPfQg)1x8&QiM7H6ZhFJ&B0v-i21K1gadd z!P*hGh5T0JY2ZFIA=8Yd5NT&7WG8Ka~r9A|g+8<5iNyDLd;WY=5=)%@0u-y*{&Vf_0@Lc$hB{J}J)9(=(gzu@9E z;7~uUrHZ@%^!DUw7Wbdse!Nmy71;Bevyibpfoasn!&Jjj-+%V4aNETcLI0z&5SwCv zb!^KeMpEu+v$CQoe#-BuzzOHIg#y%C)ely$yWOgZ38bmY0O%6$OBJddyo~BUq3gib zzWIgHNG>f4U3AMpXT{z|8t3&fNXWVeS1&{l=u)sF2$9`FqJ0v2*dLTJ(gsF|5#pDvC_Kdz7a zJGVgW$A{sk;*L@(S#m^0WC0B1@205sHW2i8N8Sf0j2KN_?r&-=!ex75?Y z`z~-O)x{69REjlLpn(|M@2cxNyTt>l?glIq5@i@RLfQ~GNxz_b@FlvFbkB^0Xgt!y zk#P~}7G?D@o~=K+eP`v-`n{F=Ftcsm zy5z0@>cYujAAXbeij)rKL&Bu3au+9HdAVTnaCmV#i-=C*K@c)o3WHO=*?!$9U0=Zq zsjM7&ya3Hbdvd3P1>W%l%5m^!;Z4r@)YEL ziS6)A5$o&6`{VVU{_(oJS902BT;T>$h5TOuU|=~XXY8ZSmzR-YT-`4&gX`?EGCAsD zAuybiLrYPA{=ibSfUy%F!Yy%ZGqD?*&S?G8Sf2En(#3l+JCQ$9rGhanubi8Lgg-PU z?x8KSd|NN=^49Uu;r8~l&Z}&#yvto~aSliah44nCvf`9nF*>nS`*bD7fPq6wWAPs8 zw%DOF7DQg`zUQZ#Au|gRY*IUBD!a)u@YUI5vfkw%gqu3}vnbt`g+#s6cvnAa?y|X> zX`^H26FWqbxk??_vT@ZZbH+xd0@GAc0Z1(=TdBP+pp>FFknZHn7++*CZs;j#eVi1O z7J&iii5IK8eK3ptt)kgpaSgiWsiK5;#Ys5uD(&53l*K!Ci{T*``$%m4jvrA4_H%Zi zf}1M$lTmXi*^IujQE1z$b^>b{?(-XgIwtU>GReZCk$=bKagIG37R^5bfm9}Vs*(u_ zn0Gy&X?J*D`6xv?UuQwZAKl`xg{OoGKc zAt_(pU0j^(^gwBXJ@;&Mu^_pdaRzqt<)4+51g!N8*ck_{Wn`n?-d;4&Q8TQpN$a_s z!MqLbvsUh{;HYRvNpi*AIT7-4kZ#Q#HM3Zwbm4-KhOHW>rB$$N*KAFXqA&v=6w*4u z9Hj4xtE{!R`hJpJ(+0CiwdOCxFT^ERDy>TShA-tNnfLSEa1>O_dM#1KOUU|I#=1-6 zgV3bVhbS5j$!+jYk7p9nTyzvZF9Wi#PJ}J2F^EGT>%nsItj2jcT7(?O6+CKxZKZWo z`&ZsLap$r!Q!`S`!RbVeFfwPgn>C#iPSvPcBM)wJaG()BtkIG4dPsbW0$#$+00A;} zkmt{l2QNewuurkeg&N$&zkkY-w4yRadwq;7<6tOuP&tT!nHH+_+M!y|qnG zUAyHMBeOR`X%t+raCsz`jkyRMrtpQyv50Q#Wwk#+b7C%{0EysT^KcWVmHV~nE--6- z@O`PY!p|U+Hcw*oX$lb_eCMrgHG*%8)F5sBL@mO`$)!JvW6)jDI0YH9qsV3{B1mTa zXy1IHr24b2Tfxj;onAJ<;72q83biJ#oqwyk)W?%msu9wm{) z%f)28h`oOJ_5CO3G-)aa^X@IW!~C_p%ObR+V~Ko7x#FDFS8g3Oc46Wr%)4UHyp5s5 zY=Aqkdb|aQt1&jS_jjM*a2_Rg7w_v#7>a0tn$V#(8)mHby_0OLiKbUx|2Kzi$wR}} z->tQ+H!)?Ur43*4LMzFAvDyx_s1q~DR-MbxG<7O~BvIZ0FtJSWv8%NOU7%;){Bd=|0-=k0&@HO1 ze0=Zmca`eV!i2I^=MBtb7ECW4QO# z!#%($Kt{d>*N^%}T`@=CvbkB4%}q5Ly@s33v#DSRMKL(BH`RtCZzs2gp!p-qLrRn5 zw5Zxjsg*-aiX62qo6;E#q-DKyjxv({FSHSv$shRJ#%uLdv&qnfUz#fKhK zRZLG1$aQs^?owdKL4Y{MrsHjLIYy;#O<`DXnnTtWj%rnYGS7uVi6=8@JNp;4{ndx< z&f;myAJg=hnk56X@V?q0vz3GxgE5{K_b*+lc}nIJvbGZck5LdT+W1$O1jc)q$rUi? zxecnpliJ31!ntH=b@D-zDnaMR9{UarVh{FtwTPT)NN#x zk}R8j0$ur)F@{BmxnHFT3X(MrmhkfOf&~HKgAjKt0YrX1t*A}&gGkPfIjUtEXLiLT z5B3zcbZ>l0s^BJvQfzH(ZeBU& zuO#_54R$4#nCBO$zs_eodzKdwMrTdR(waE7}PN#V^wxdB(x~tNwb=E2=LSZ4YN~ zS4$i(>yooN*vI388*XrxpUiJipbnXKZk%HTRQLCm#dGOHah?ExxL44n>Xt9;IvVjvs7kMNjS44UMcf)?3SP0 zZ=8K1CzgXI$@R62IWWm#eaSW660*D^R?zeS#{alJ@aXW2G^yJ{j_&9eSP%jMq|7sV zF_cy=$LP`y%9RBV3(M^;Z}o#SSteBgJ$d6xZ5d+%@Lx>^Bd#S%Im;hYF*E{dEFAy% z3D*Kt{}dCoQkr~MnH12!gxI#n#N-Fu2{ut0tHEeb@OkxGR$(^iTr7EZD3kK|?vrOL zQ{t*fxAGU9dH?ob}{}kA8GZ-*_YjE!OhG>jy2p`D^|qD2M+RwZp9$Sc04K z<(wm4wgJ#9&*A;+pB@iLG>el1pC+7qfF`Zf0|H&PNYWySQQ8HC=>1E-ttvm?v!#D! z`+kTn)uj>y}77THdW1Yp;C#@ad`*TFd;`ipO6sE|BJ?;T96SK)8A{#p5U6KCGa! zM6i<)aO}xK>{{*HWxDz5(!$MG#p7oWxjQ4du0J7@P?ee#{dX8qLKw+DEt4~+&P6`-RgU8?A zZjo5>_bq;$`Rn`VkAA;x^gxBHj5kIR?C8XG)-9-(BYSkpXWSg^+zeAJnWuJh*AL3f-_MWg*&-u z8isy>o3HgF%;(R* zE$$;Is?t)Hgq6q5c=}BIi*av0kWJ#HaWO^rytlBha54)kP$=?0ueL$PA%mvGY0m8Y&9Mt&Ba~r8zz|Q6%!=ZKq?* zC(vh^+TuC+Bu#&jwi(v{>qFGt773Q&7V|huY$!C`oNkfaM8`OhCW5?!_l_-JX|rnR ztH#e%VNtpx!J@-a=k~@>wa3;Nm90dM%S#_BylKNHW00LVpA_S>Hxu|!*p;tWuP!yK zymy9Imlhxi$_;dN={luVy_G4rq)_5NT_HOyTQZo~t+yl=>L4E+b)fqF4oO~nC;P{@ zK3n|j(qFHAuA9PjhxC0&DYGLnJdfF~!y}%6pvh~;PrUF1|pq7PO|ul4;Njw z{BTK(w?y&c>wfw4@J9y1z{l$BXY8YPU!3)eW@R0eo59!$oXsKz(EWKoq|<+2KEjy| ztau*>ubr*d#|W?!&mZ-Bl(!?>a5Buz5(q>oV(tlYk@14;pSWMievYL4E&>YtZWv5& zrB+u+n+Ox-UdSPKOsSVZcpZKKTB9-;V`94FTCZ(ON#mq?YLAfl{xhGUB$>}^#4N^I zXiiXcv8gyeWd#hhoO-$jLWg08?Or%@V9P}z{QEnE5iKO)(slORaoI(Buv?p;F8PNrTQo?-OxFP>-&myd}Lh zk2V5Y$y3!<(r+%JnD**$KbqCdG&B3*JBoAX@ma53P zN$mdV%kaThlq@%r_c@Yiq-y9cP3VJ&m|J~w9qo_D#&x=S*xe58JgwA1Z^vs!OuV(l z$bC>Qb(YF5xGX9U`xvVBypIqdvL}6TT&)d!Cs?nY2?aw{_%Hd`@pRS9_YPI^W)Hl1 z@#N|K%8(TY7LEdwOBa_F3|Z(byjtAeo-3rwa;1`#b%A!wVDGzyl!}aiKnk!-nV3;_xh22ehfqJL;Qod?( zSVPU`fEccb1;Of~o-;oS>9w70x^{BEY>l+w}8&>AM5D=Vjo_`8&IV;jlwq^D6)P`VA zj~;F|US;mkMH0y=kIEUR{pKee5r{1z4fC;LMU=Lmut`@SqD8E+Us_yDTP7b0)8>jt z-8eB)m;jj_#ThsH5iw}p%R*P|%bQoOBB7xg6nk=!5h^c@s{fb&>;S93e}E@P5GXXT zT@v;!yGbG5x0cHmNOx7%6-#5~_h+bX;(|hOsOIxZe@W5%LKPgUPizlfog6LR5Z{>} zOk1m)s5okkDz?-wUVc%;+~gPUMf4esoNUuyc1nkM!4WXSwTyFb2vxx?)j=&pawr%n zU)8G2GH6(VEM>Uu^uC9I>4e666i)mBjf#a7$@P}_Pg9?~O=CkJuxlEI!OQP+1x~rU zKmMULqb?j9okO8jcl+e}xRbjq7fOngG7t>73g-9$-kTB!&R|||))ehk)NslVU`Xm> z1MRwQh3F2C-ccUOQ{$#|4v>O#Cb92*X$I$m1>x;I#Ln^uu37BXz%$?MT z{k_cDBi3MO0ht698pM3=VttUantf`Lpn1_J%%R`#MXe|5c={g=O&`^UkI^TSkhP&; zRB%!%MNL8>rEHB^*i5OJHz=O2{&8A(+tan%87da(O}-m})1$7#)3rMjjby`6l3kVQ zq{+9if3OX5cC#!|4hL96;1Zw*mLbzXJ2z$6G0OYP{Cy9C-orSc<#KyG+FYc(#w6EVgr#y=4E1DHrjm*%B}$dI;B4R(MPzfV98^RzKKo!$QaQEUf>mfj|e zpwU(j4?2=MEK8~g`_#YywXAHcYC1iLfP5H@wr#@#%FZw+jY?$kxs2}lklqA)AxjQ? zY!s%M7Pl5={)80WvNl-svC>sGl47aIR1iihMFkwMv0|m_SUZpfqlH`lWcE^-IG0G@ zso(f?To=QwTpj;Gt#eOD;H=_wdljp9So-YF@<}y_>RKi%ES>kU~W?dT3 zgUt+|bJJlaBGMI;M>ZBQtNL!OQ`-3Wv@%@d2>HwXHTTeoXf}0@mqS_vx6CCUBLt@~ zEuFSN)WdpXf(>Q82fQ)ei$l7x_+W9&S8DvKPPaBxyL4Tz!|K$@9{!h6)#VceW?k_PP}ZY?c74N2u`0z{E~Rc$As ziex%!2t~|HP53$Un#x3G(`quc&B7x@)`AoJ)eukG0?SuO(*=) z&=o3<_r?6I>xQCV&V)iftqOID&~n3;VMIZcisS;@oT+Sax_UsOt^j;YOwpD}ik0T8 z3Zt}3ARgaNM3=&JW+5R?)Mc?1ULNSUw?|03I2c)W0XIMSbW$N6UhD3YLOZPncpl#UQ07H@(DNyUsN+#@lk`gM@$FwKZ&cu^2|j}buxZ28M;sJVkW25nLTwV{|4`F9HVDa*x{p?F zf4kxhP$^RMy3yb}OL*i#2SFP;FY2jlNcuP`N=63NKq&V1R7|9w+fc$DO2!7&AkfEb zL(QF>FjZuJ)?I(!vDaFNt|M2Lps#kx%uO}m!%Y|x1Eatp_#Aq2_d?1Oy_1IpJWuj= z@D>YJ;|4Z3CbJWN9NCN3wo4ap+Fm-Rb<~@!qkiKB1QOJ-kbsjmFfcIHq!W`XP{d08 zu_e=*KuVS>E2O80_aSP8B|o5u_CzA_B^!Zm5LXV=N=mcUcx_IGjRSfi-9tlNKysn_ zDSp53>MB=;WUOhn|?O82wonrZ>^hKL7c=0(uf z#-view+t?Bv3;+Q#$;|Zh$+NX9 z-G`6$F96{sGbFm^edZhjtBxMTXhilT^y?r)_^!}#26V&>~o(e16 zDjVr7vl-{U066BDPqpjyM08D_QB^^nT^n-w9Haw+ceD$%8otv84y;; zTiFH9AJjC34vCOibhQXehhzI8Z|*JpFtd-l)kz<#;Us(Pfrt4Zhxj`8jxn8BBE+Mk z{nK^yz?FK})|20}epKxnYm|LAZ{+t#N@z>OpMNkg>=|ipd+Tgp{>E^{M;Dj))9cc21R`8QxozQwVuy3Z);s#CQ<%j{+T&J854 z6E&yctY0wNIe_D&C?t4{vlKe`+V~da5%}F%vQXyZr#xH4GRT8${}qZmdjg=#YKN<^1)AXFi-`F!IkOw2C60LgV; z>ArNnvd|55DAaG*s6G-K=A+gqn0o`C^V*PLwug=0NF^R%Vp~}L^{-sR5Axx*puCfw zHhGH(>dh~?6FGwHr< z)Ob_uYW^x@l5lL&z`9AJ*<;R4lw7;^rduThZ(;y^_wVbfYa&j>>uL!k{W}y2rkDP0J)Qi990S5*sQ95VJE&bKpXRHZSzS1 ze~8tdjFv?7E1~bV#5iZ1NKgsuX`a;1*_8P5;nVdyD-Rxi9d$a(m&V1nj~@OJ)jXkY zmg7g6sNejG=^UsV?C$qa*5NdUllf5(k5?B8>s_Q-2}<)(@$KW)=8pY=rNHOl0bmJF zrD;^O0xmd8y$=VcGz6Ar1QZV_D9Q4cv>9_VoiFKYul`Sc4?tc;JV@J)kl;;t6EuWZ69V8>CQvB6EQHdjQhi%qt(Tdv-I z{*aFaEO#YYc%+lkj9pq|^YaZO@dm0kq(iIH=O&*<*F>}BN+dV-Wwl*^j|-ntwBIci zlY=w8 zS)uK~z6&u1p?D@Ve^52Q+U+jh1kXtbj_JV~tyi1K4wNL?u8VKbVi9^D z|1HxG&x2{D%FLQ2=|NExUXw-!XOu8X89P-VBB}_qbDx14=8-n0cwY0Ghp8}`4>dik zwPhm*$e`fpYUvZ%(t1Mtpl{8zOU?H6l5FGdE@{i_32VL*Cl~^g;-a!ON5w;URi!?Q zZB0|eRx=6{MwAXOWSmmL1;_ev7WpGY;JB20ToTI(DFnxe zHsb4sJrYL~*T)vt!Z|SzA{

k{0oN#TV?1B=|jitlmc(`fjbG#9;d%-XR}10;pF|Kb?w)mWiZz zLDKH1cb3^F{_MJTk`aJZ$c@d-7?LT@!AO@cGs2Z2DC+i|hb1@!Avjmp-?(;>A>8&; zHivl8+n#NLtXq*@98h?b@FJ5UVPo-DFJ>HzED2jclZ#|mDIO4xkr-7E|$2Y zZWeGwFu|;>+SOc266KtX3fD8%&655sz>9RBjRWp&ZZ2>vfmOBf$`3(xe$QR4>`%## z+Wzv4C>x>B}VL_8 z^4U4TkgafQF!d>>1=%*_P3<}A1L{aKsxfkKKMfa@G;p&Wc6ao^BBCafO>K9f@hAw_ zXeXq=>_y?N08&&o#P3KV=^poA;g;`C{~~chYjybTg6OR_R>irPeia5;+NTdB_Ix14 z)d$d7b7b7N^4NtbzNCDx<}ev4$iVRC(6V*N)Gku2*P?56CzZ9`li`Nx{&4gWn~qIt zRK$fyxe)Ea>1Aa4JFRb>jEqjGcEiLN2wqDuNbqj9dZu&t$>V#sRomCah1wB4V24m$ z$jjnNcZ}eu&GJOy|1Nle+w#X(x*L6Jj0ydN@oj~O@pXfeStVk(8WIT?M&1w*dUy*& z*7%*`&`NNHBjdE%TN#XE(gkVy;WATV3uQ5@hH|>h)}L|35`8DYSPCO^+CdKOG4ZO4 zmX1+bD`O)(G&X;48|<27S)Vz!rc+bax^4%Gl=HkE0RdO5_j!WC-RURoQl`)hp?)7+ z+FAxg?M%dfy(Hm8*i6e)fLbsNi_DGsAaaG1rL?Oz7PnL>UaCF_$+fcAsmrLp-+Kka z1H29gReNYme}p?hH3O7*Dji-uNE9TEbutFVCWiX4kII8folWaYh%p2d(561Mx*Jsa zjV)qUe--hPfxxQJ`pflewnm1Ph%65wwMc3R3T=1(YD zHSFJV$SYz^^4Mw5+}zkA_B(#QNNPuCYtuBc#0zR4?3WqvWexl-W}m&2moJHHNq$9b zqou~#JfD%Gt^T6wMlMx zIT{jdG)%rYVawuoeCLgAPHPAvu)VTS3n7&B)@>;sDr@#BPZAXej4`xSEi|kwyKBa= zrD5LE?o&y`+o0V#ef~1sBJ1rjdu?EpTqoALK` zmjP6`Sy5gpVDk_%}nZ+Fbw6J>&# zYfh?3WPX`d{hJtQZ5fo(y7H!O*-P6O+XU2^hIbdZgPk|O;$mu3M-FUDoD>Ief)uSi z;i+YA-y<*#5Bz9vtUh6wBF2<FFuxV;l`N3IH^G35eQH*o(JDEmS%yK?-4a-)- z#>Vzm^qh7sng(d5P58eQ)jB=npi=s$*EpL9r`ILj_()E2NP95!;lRb z4>na89~)29pXK4M0mUFiskBeP5O6t7pVUZ1)+!$mKQ7E+jbuvY|k+^V4ogo}I*e{&rvwD2e z3>mLy0k=4`ID_TNZ|QVjY>c4Uv*l&(!>~737(vYCGLUQUhy*+(79S~&yoIfBx3|A- z5_25_d>gB?f>xsOhdLjx6KuVMs}qd26%i|ER-C(U`lgw1pzX`Z@_$U3rGYuSG={&(p(Y1&GZLT za@a{`59cKXUfv@=g}jYx05ZQDcaEx52Y9vx)m^UVl>;&7kBrjLD+sOXkd+R~G_f2q zEIGAq@vf}!g>^_fK~#azm*+h!5U8+>RsQqAZ;}V6sV^0!VbqX1DT-$_T7SkiV63-gr;nq>}1_o zr@_9#u#u#Drm~M9g!FRfSrm5~`z@zf4&hm4toL)^Dksb@%|@j9C>=t`Ww;29@oL)% z447*|7Te@>DQXO$RA>kR1*t-EtIk?ZYfRM@rEtIHXLWJbcaCY=sU>kZfw`F%2q279 zi(Sv*n2^)oM(mcMup2`wWz` zAI_St1(soRcyyv|3Mm0lokR}IwfWCmYKcdHu2??Ks=U4S^zN#12Vlc5%$B{Bk~a7% zKyTuLda{H>)FoqtH4fH<^ILXbfx4RWYV(4YvvNg z=149Nqdr#cmr?_W1&T)82%W{|F?Hvtkd~h{aU0UYRzPlYvAR2U4RjV%T|1@>B zk?RpkH4CNzYkTx49uyW18P7gS4%RF*jzq$pAf)POZCw$QtYL#=a4SdcBUv}OBD4+v zRB%V=O(HB|^}d!k8Cyu0a@^Z;v=~iSMHinkWz~_jS-!j^smd9>h)#kNVE-k?xG^7% z!^f?bGf;%VXl5+AAUjAo05a&y&Y|q;Q6=BD^zq>CX1DOPrKgonzhWiR;gqRbiUDpaHw?&SBg7%_{;4|Gb8QcC(=%_DInobpP4`lAqD!OcV1E5^w#J^N{_( zdF^x7bIx>X>#ku;#BQu7@DIkl2Jo+%V?c)auJ!no=yGz0`q94rZHyYoAq`B+VM&39 zheqH-3+5~KlZOJ}$@e(ul@;N$cxv&8;!db$o`|G7U1ASgRun~$;>6!s5YSZ zF{`4$kd9poYV^x%892fXVAtOK`e}U*`&cU6ip5DExJLI9P=&$5>~ znM%-zSs+tiKR5&k;~;=W>4q^7z5b0r=lFqcL!T~${z57_$!+I%JRO2z71bptW-%#K zJ`s!wLVeuDW;0_?Ea@hgpgBG4QI;m2o+5BkHq`L9FN05;=L$%NF*djaCXy9v5E_f7 zNp~6#rNP;bNLIjw@mSM?JIXD@SGiiLRkz5NkUb@-pUKovzoZ1O!%k|vTz>GyWo5RU zFZ;dj_-t-|<=MdpMFthV>0zcJmxDl`Qu6>nwsG>BOVh3Oswu*u_~Ah0T4%dl>j@5s zxXuCJK^)mE|5j^P2CR;|(K+xWUSFe{f12^9W{yq_vzNz-%lVXu@Q?(Bc->QP6*PzO zPFG)^WpWqkNjr6dE5>Oh4s)TNVx$#Z=fHB_>_R$)Y{9C#Gmod8?L2&87{ue<()x9N z)ruTA1C~x*3b4qiyLmZIoe#|PyeWA$!=)6bBseOoZzAfG4$#`O#Ey{ zU(V!7Ba1;7Agf%~v|HrAi8w&ZqTb;3Z;jVsjC!B&u)XPWxqo=Dv;JQv!=u(-cup%t zi#H&B8ngD;LEpk^Cbd~d-xmnBvkRaP<+1V0iI1ZA03pqqYfa<~#O~*-HUN-yW6gI zV@oabGqf#E!r9@>qGj7IomF6zbzVSkaA5aDfX+!fvt2P+LHw#V*_d%rbhb!3m(y*V z9tVVpM)a!Woq76i^}2sYX}i%NY+7Yu&c`;!L3^5BPjRVnuZEyOkI~Pf z{t~1s+f5`C%Y>g?<#}3atxFbZ5{U##1*@YRv{@7VJ@Gi$Ck;7Yegp_bO&E+6;txkB z_IJ#+=TL!-iZ_5Kwn_tXn$9s~;T&6(ykeV(Kq_LVH&{8V1dMLO8G%ZV*CBa`;Qg)j z{lmkfbyTRhZY)=u>M6rbQhM<0$v0H5x2?lytdjJCN^?+2f)cag7Dok65+Yq+5EUh4 zIutM)pTO$kOEa+5-wd`t;9z8UlaSXovalV`@wfqzC8@=f@6lgLoOZOuN!FV$w|EXB4wT{J}u^3*~vJzu=L-GtGu8R_iT7*PX-TiM~9W=rh}RB8DIyb9$rXFBBcN>kt-MSEt=lGa(;E zt1Be!fMRHI@+J@pf<)5LoQzPAtK7fkR93@kOB+U#a9)N+I^_`H?u)5 zszeG?YntX4`MbC%_w%Zcn=lM%4Vv?U6)@TlaLb$iRBO_bMHHUu(bh`NYj)}$+YopSFa#duW!Hku=w%?Sqf@-|cOcQpZPmvy&$R}43? zXqr0IF;g{PS)k3eQgOVz#ob-adY@JQaR_+MNwjsg(oV7W9{_u~yjNp2CI zh*J(d8Cy~(3vQKh5r1k2=8W(h9~>daJ98D1n3QM!gPi#W5=LwEO6jCFk&;Q<}?Yk zHLy*db}zWObn7i+_T9%{O#9HezPPx29b=v5=_+I4gaGpseW_#m5xb*X?>J}jBPyU#O6D`zk2*Se z%oM`qbq@u@@6civW3X&~Z7^DaxYbR9)?c@vQgRFjM`KB8DrF$lKIT8zA-?17xP3JW z5U5T_4x)sd<`z_5eu2O-$2O;)dSK8`=7lPOoGKvIn;>g?wL30Kt?5L|aPtMe^@eYo zu6xE>7RqD08G8ij1b@gl^J}8)95hjt=rQ*z`HR z(+zE#?wW0p#MykucT&>g+CbI(ss@>8B4Ra!5(#|)scL>qnAg$OH`p5-Akh z{JYO3KkA0x7x$3da?ulDT?CA}IAt85i0l>nq-Q7*Ftl+|6<|y1>J8w86>n_yj>;bm zI|S^-oqLDAe~z}ki+9@|ty6~i`1A;8v8@Y!N_|c(ClgNF7wnUHFB;G6>$4rsx0S@L z$YQU5qpVn5)&5wd$VdpO>Fr9N@vTl?RdCI=6MW@R3LgF$A<=Da`g2UM4{b1(C_Ca1Cc@ zOATY#Dkl+3>aVypkL;q?MLT6sJ6-i?ds)8t17TRdW88ReD`vVrOt_-07-zX04)I8L z7r%9hE~ukJm|9SR1{F6Z>}-Q_hBK~|-DQqFyRioWtn3IrQJ}+-TKg>`B_Wz;B_Qg*%?ZB&*i4#g$S14T3iN% z@69$C6Rnxe4y5?^gCNi&k2Vrfz(Kn)SiTTxvAEc|t95jlMa4`Wi;^3fj9U`6Y8Iw! zOKO28*>e}xeZs9i==eT%G{B$JFYLFrdb z#(Z03RKjYU4eW**|ExKc$VDmM{jI{?hpt#?GF&kk&P+PW#ZZ@;Q+=4)uKK$Vx&z9C zplO=`Lg98iUh0=VN_vG`(s%pg-jVnx?)ti5GoIKg^qYQ3huP4k8W2})!@@cXUA<6x z(Q0bZ_1wT&%>2ufGf=^CT(%`O?xYMv-WqV z=k`1;Yds$%jg1NY*&J#(az2Vtt|E-Fgdw9U@KnvtnCs^6$|b=q%pONvRGfe65_Xm3 z={#RRGAB(OXd0dzD$`$9g(#}|r=F9K+>|B=2?$ENN2ML}hmsC$xC!9D?F1sxfmPXy*WT$#6x~$WAJN{0c$N<$$J!7+K`@pqX z7$V5JJR#pQmz%R7;tREO>HtF}hwR`Kbnf5*Dw`B5Zl2hL$t~rnWR$l5dvngF@cEzL#*L?Drmk6ATUMP# z+h3Bq11Lg>g|!Sf`^?Mx&2+k@i>~l12MwW zK4hB?^R? z;5?wpQk{1!5JaGu?p11vm90UTiv7bRiIf5M3$`9p5qxXB+?A@bupHV7Ta=b2Sel|> zX7O;$!*iNR_2W``xFkx-5u$8E3e50+p4c(61Nc>nQ*>cPpDT=Ni_MZg!7~9jye9Tf z5;iX>Sajq1^{dxgOi5U(%uZ4&Q@ddu2sbp=R}wV-rIvPZNDHST+-d8C^N|vL#!{cu zK~Sucp4mP`dx5nDh@?~?bvg&*+yGo^Gna=Y_c+g8hTI?Kb3j^~4abC# zA}V2OZ-P22Fm0wzfs$5ORj!5Tn1E!N+7ysHJ~_izs)+cQ)+Q9Sw=y^j(Td&vM$uJi zO@u2pHsgcGtyTOlPyzchN!KTkL^t~1S^D-x~ z81}R-#fz=O*|2aQqY4!>(cjvJ!CYt77R}*Z{e95V`|!^V6FINrPrT{ya0?72qqYT| z!_k|UK;Fbv84>VmbBqtC_|5nyOq`GRsz!`#I-pVmfCldYDga=S1-$5?_`mRJo1k$O zQtf$=2ZQ8O7I3`&x!|UT$GWq}kxi{NHRp!HXBxg`jy5lj$=?!BPu_Aih!^Tn_p)>L`lDDUQaFcmcB_8s->1 z0GX2%ph{>GM}iD)v{R9wku4csnFI51KUg@`{iqFSAFqGIlx*n>wbr~k4W>6fUV9aN zB>Z|Qeg-=%$PsJyhvJLN zqlI}&rOZXnqsX-e7AVJ@o%lmvL()){PI0G?gZ@rWd`m=N229~$fe2@=jj>TU`B)^v7u)V=t zF-!E29A832E08mL*&G&&*&im}eD80D{g<0u755sCE_hro8Mr%cgm4|OaZ`>iLt|ah z%mckhmXByHK;pvHj(wq+-qBG{8MHv}n5YPr@-H~VlpZN$By(VNIZAmD(nwPy?lAyo zcAo~e$JLWTm5&)TguevoLIxtI#kGMyt%8aFIPX<-7-EDVUq+QN*Lb{b?wwB05Q5p0u+Q$0W=8jT z3+*VmbiSNGB^o}|5PsF6h5Dx(>Fq&hUTeHE37d0=?~sH8O~}|VVX$Db zp86_WpvV&j=Da?R*%zZz9<_rMnJwq+E$SFp_+smKWm$S#8_PH&bEE=Pe9{rhAdFl} zF%OmhU~Kc`>HWk6lIDYxvDsPdyh*H!(ts*%JAkzjt$n=2grdU!pY{=E5HTV+M_+zM zLsqJV0r++p!P;cdxE1C5x5~w2)J;!)=6qZCjbjULm*w}1%h!G=YWV?8tVuJ#Erz&} z;u1ytyo`gd3g#YYcI8REyNaI*a|PqCD^^S_4;&T{nP`CEqxNwfD<+Xzdew&KX8mQ& z_yU6T8uz|A#!(3R6C?qOWa6o3pkg=b-2#KJjtQ;}tgBkKfNbcq*(2(TU(AT^LT>YG zAyF5RO$6{r@j0bIHKNi$W?-l?P^(qwFygis4#ydH_Uk84yI^9HiVb1r6p*-ZfP zTma?W`wu@YyPMks>V$4d_(_y8@pYHRrmm}i6s3NiE0W+9%~Oz;48GyIr56=C0a~l} zx#1yPlImrhY4DN|aX?%kuabTUkdY0A-xfbQ>2}#~lLiCY5WH8ouJ+-lYxCvPwc8Ll z{<#zILCXit4iZ0FU3=tAG#@ACS{K(|-;`<@t)Ge*0=E~&oa&j+P{d&yUDA<;c^j%vch9~W#1E$DwtJF4n0|t!5XuAEeC?V;@7cMu z30snXGZYw1_{`ZWUGJg}AO$QnpilRZK!4c7tSXlPQ+(Nen(zjmf!X)XQz7o?OK`c% zPdDcv92SIXbi-7A^%lLh7Dr3ez1zXb=)^H!R*ov|jh|~(IFA{qI=t|nVJln)>G zfwzL{LVS`40tick4G-wN{bkn+>#Sut9?1_-t!PJIST zVD5F`oLJK#?{>Yt+h{2+y(Mo+#bYpgF|EaD3ztcV%V-OJWxF>LlNQ-Psj{pADNFQP z&4#LCvfDp`=(e?vhADR`Wajw16%*OjVk?(6qLgGIQo(0T2uE5B{R?iG=%6E1MAbVq zca~6!1SN486oEPOJBRf!9eQNz;{z6|qEn5GgwKP6WNbx{#HH@y!UCu;@DzVk^(N*Y zFHsyfDP?ervDr3mRV9~A->uQ^c~jm$@8zHKmlE1XwI|Kx*Y?Jm*Pb+* z$E|jk$sl`h=`NkjiZ#i-RU#x;Vz@*(fC-ASr%+odr`?;kvZ9w&g2YRgcD`S_dgJ3C z=Ku2Hc#}fyo4bE?MnfR<*AF3*WI6v^#0qJ!#Bo_}kl4Y1t>c2|DoUg=CrVSkIiQ__zA?88HmU(durlsj^Z~=Lr=1MO7u3}t0 zuUz?Axj^Qq?ZG~|Cv)8ZmULw*${3FF@@;u)w!OG3L3(87i}nWh-`3#i>L1&CJ~Qu7 zGug^VQ(Ov*2W2;S7&L3j=@6FyYKpGV;PB1auI9bfCz456y+4MglCED&9l`w;re-6{ zM5!=v;uHwwSRWio9E6^Y57rNlHZenxA3+Mj83^o~pAv%(?!ttJkQh(1_JFz*UH`PiJ>&F8Eyv!OX}w9j;9 z&L?q67c)wV)7?JQ=vEtRF597ic~H zk;F=dkKXA!K&P{T(HI&bppnJ`-$1rNlK<2mfj6#NvW8cA&J~;@7O3e?N`QnuA~(wQPZXfaB@leKyIu(<`u$M3OcYWG5Wyz}Pm#&dW?9b!FO0(WD`{DBL>yvgF$ynci#uY0L0gajLw?~f3J!9#khgMeW$oGRVB!7$TRXSiIF2I>&$XUn6hROLP|JgLup|VAA}NUh%Lzmo zIoN`@T(b`{BKIdeMlp61@uGSs{w^b-Chj|zr%CBM|hRo$R8 zMt`JpR|ZBrt1wRMsuL&ky1I~(O~68oDc~nteq-qYFg*TAGJ&cl7#?S&VleZ@^(vhw zqMZ}_c_O!7HN(M(t>4vaXP^F&%JNVza&j~!1seMX&pvlq=ekt1$9vf<4nOJl#raI=eZ#_2&WlEx$5NFpwpmS17`jQ){h#$5W)M*YN zI|-akDn9^OVYyAee?7ypc`zq0$KhK9dD$P^Dr88E^<@mKvAW17fUr`&wHV>j7>N6~ z(4sucP6pYk7Nn)(KER3Kgqxi3Lw=^^YbjmH{-th~cltwqOX^8dYff!jw}OAK`N;BE za_qe5{hG?rzA#USM3Fhw_5UQzFLji>uF6Z>X4zaS`=o?=r9iIbAwOj*z#lK>G#TV1 zg0GueW%tHy0);dTn88rQh=gx(WL8T@Y5~ohQQ<&9XJ{;`j)K}!Dzh*=nZ|*c64%9e zVmU=Ez0BZp$mL@p&;^J>J3$6Jj+Ne-yT`I3CI4$G7hLu7b18A!PbC08bOrwedXcbm zB6KqPGBuE8#+t)g)x{)7CO}!mza>(U8acS<8~uTn!g(8>dJ&asy&DOW4>@;QvSk#G?g5M*ePd$k=~6E2GGv$=2Zf*nm?dj^@lqnY97|5pNW<$L_#u zTPHg}EW*X*yO+S959I9LEI~ew<+;Er1E6|huF?ZR>sP#+uCB)PoMXCAEn&dCG}j&* z{MUb*i9%9t(pbx{_nwtI5(pZCqs_5l@I(S5B`kP^$!JTd^$S?@E!dqqiy*!Kkp@fEq_}lfKvKDygriEN;*x5}uwHi}(-cZyERvKo` zeN(~lJcV`fN4jg9zUI|^kAnTFH5v|3XHu9BWZz^}>dVVbwFG$7#WpmX&e{#zbn!yE ztu|NIh+)ad4SVMYgz_il-@;uXVaz}m?{?o=?A*p(0`;<*>9D39VTLoP`e-b@txg*9 zN(O4}DljN-O(tjLUbrRi zkw19{9c!ej`4rmTU3y@7DVCqs_oQ$8=9;W|y1TT1R@nAH*3KRy}2vq#%G{7 zm%5$p!&mKJ*qE~gavds60I{|P2F^MMi5bB<6Uoe81geDO-OVWu<4t8ImSL!|-dhV* zGiI*11EfE=nH}-?VFXIx?l@35auUe$J9k@dc9rt=E%{`72mMV_7Jr{eYU>ekgKwZh94sWz9zby-~E~=Mj49%3cT?c8D7s zncRSNehdhP#K>2$SXb213_PMW7h!E|nfMsWLz8`*6e|V}1$c^V?{FqFw=3UFHSF0^ zMRy=0)gt8-BH5<4G&&!rhTWCoD;foINrP4la5I;9Ual+nVlR@R)$f*AQzwYSrx%G` zmY+Q*6pgl$9Hg*YTO%WbwOr)|2T&%|B#@f=-S({Qnzcc(Ph|hmkXR&{Cu>w^|7wPi zf2U9qKBdaT`qB2bEdHzZcABF{ea1$iKE2x6KJ4|ubvrV;)oV6)xBE18zgMXT zy@p7s3Zs@zWJ=<}joozKd4w)_6#5Ycx{ zKaUyD@%eCVLs4cOIrlOvzceCY=X}Ys?;?_A@FPt~aO7Emwsdc*7B9|@FX6)v7^8Lyv+$jr3{R+^c>u6h-mSN>L=u~n*U=kEYEYGi!=0o5*VLQXtYUl#W8&oG&fi4Sn zN`ymZ!N=7DW|0pQM{09K2r0Jx@X9u8RK@+H zH_!g~>ev5#TfQW({5LOOz5F{A#Np~0lGEJNrptmwQ7hBoCp8H~tLkzx@@Q)0S!|2C zsy4gy<6D@-?Teu4Wed_m(gvQ#DMZHY5HT3Pzj)yT4wcdUtV}O0c}^Zdx)_if=vqb` z0KoLB*grozFK^#I#EYx!jBa&AR!Eo!Y*9LvBm((7m|u@-@^~oU=|Kqc^f-%v_q4kc X35c?_dHg4-#5mY /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# else +# define YYSIZE_T unsigned int +# endif +#endif + +#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) + +#ifndef YY_ +# if defined YYENABLE_NLS && YYENABLE_NLS +# if ENABLE_NLS +# include /* INFRINGES ON USER NAME SPACE */ +# define YY_(msgid) dgettext ("bison-runtime", msgid) +# endif +# endif +# ifndef YY_ +# define YY_(msgid) msgid +# endif +#endif + +/* Suppress unused-variable warnings by "using" E. */ +#if ! defined lint || defined __GNUC__ +# define YYUSE(e) ((void) (e)) +#else +# define YYUSE(e) /* empty */ +#endif + +/* Identity function, used to suppress warnings about constant conditions. */ +#ifndef lint +# define YYID(n) (n) +#else +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static int +YYID (int i) +#else +static int +YYID (i) + int i; +#endif +{ + return i; +} +#endif + +#if ! defined yyoverflow || YYERROR_VERBOSE + +/* The parser invokes alloca or malloc; define the necessary symbols. */ + +# ifdef YYSTACK_USE_ALLOCA +# if YYSTACK_USE_ALLOCA +# ifdef __GNUC__ +# define YYSTACK_ALLOC __builtin_alloca +# elif defined __BUILTIN_VA_ARG_INCR +# include /* INFRINGES ON USER NAME SPACE */ +# elif defined _AIX +# define YYSTACK_ALLOC __alloca +# elif defined _MSC_VER +# include /* INFRINGES ON USER NAME SPACE */ +# define alloca _alloca +# else +# define YYSTACK_ALLOC alloca +# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# endif +# endif +# endif + +# ifdef YYSTACK_ALLOC + /* Pacify GCC's `empty if-body' warning. */ +# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) +# ifndef YYSTACK_ALLOC_MAXIMUM + /* The OS might guarantee only one guard page at the bottom of the stack, + and a page size can be as small as 4096 bytes. So we cannot safely + invoke alloca (N) if N exceeds 4096. Use a slightly smaller number + to allow for a few compiler-allocated temporary stack slots. */ +# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ +# endif +# else +# define YYSTACK_ALLOC YYMALLOC +# define YYSTACK_FREE YYFREE +# ifndef YYSTACK_ALLOC_MAXIMUM +# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM +# endif +# if (defined __cplusplus && ! defined _STDLIB_H \ + && ! ((defined YYMALLOC || defined malloc) \ + && (defined YYFREE || defined free))) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# ifndef YYMALLOC +# define YYMALLOC malloc +# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifndef YYFREE +# define YYFREE free +# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void free (void *); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# endif +#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ + + +#if (! defined yyoverflow \ + && (! defined __cplusplus \ + || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) + +/* A type that is properly aligned for any stack member. */ +union yyalloc +{ + yytype_int16 yyss; + YYSTYPE yyvs; + }; + +/* The size of the maximum gap between one aligned stack and the next. */ +# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) + +/* The size of an array large to enough to hold all stacks, each with + N elements. */ +# define YYSTACK_BYTES(N) \ + ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ + + YYSTACK_GAP_MAXIMUM) + +/* Copy COUNT objects from FROM to TO. The source and destination do + not overlap. */ +# ifndef YYCOPY +# if defined __GNUC__ && 1 < __GNUC__ +# define YYCOPY(To, From, Count) \ + __builtin_memcpy (To, From, (Count) * sizeof (*(From))) +# else +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ + while (YYID (0)) +# endif +# endif + +/* Relocate STACK from its old location to the new one. The + local variables YYSIZE and YYSTACKSIZE give the old and new number of + elements in the stack, and YYPTR gives the new location of the + stack. Advance YYPTR to a properly aligned location for the next + stack. */ +# define YYSTACK_RELOCATE(Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack, Stack, yysize); \ + Stack = &yyptr->Stack; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ + while (YYID (0)) + +#endif + +/* YYFINAL -- State number of the termination state. */ +#define YYFINAL 216 +/* YYLAST -- Last index in YYTABLE. */ +#define YYLAST 602 + +/* YYNTOKENS -- Number of terminals. */ +#define YYNTOKENS 121 +/* YYNNTS -- Number of nonterminals. */ +#define YYNNTS 57 +/* YYNRULES -- Number of rules. */ +#define YYNRULES 237 +/* YYNRULES -- Number of states. */ +#define YYNSTATES 594 + +/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ +#define YYUNDEFTOK 2 +#define YYMAXUTOK 369 + +#define YYTRANSLATE(YYX) \ + ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + +/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ +static const yytype_uint8 yytranslate[] = +{ + 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 115, 2, 2, 2, 2, + 2, 2, 2, 120, 116, 119, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 117, 2, 118, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, + 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, + 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, + 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, + 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, + 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, + 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, + 105, 106, 107, 108, 109, 110, 111, 112, 113, 114 +}; + +#if YYDEBUG +/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in + YYRHS. */ +static const yytype_uint16 yyprhs[] = +{ + 0, 0, 3, 5, 7, 9, 11, 13, 16, 20, + 24, 27, 31, 35, 39, 43, 47, 51, 55, 58, + 68, 78, 88, 96, 101, 110, 119, 125, 133, 142, + 148, 154, 160, 166, 172, 178, 185, 191, 195, 196, + 200, 201, 205, 206, 210, 215, 220, 228, 232, 238, + 244, 250, 253, 256, 259, 263, 266, 269, 272, 275, + 278, 281, 284, 288, 292, 294, 296, 298, 300, 303, + 306, 309, 312, 314, 316, 318, 320, 324, 333, 342, + 350, 361, 373, 379, 387, 397, 407, 417, 424, 425, + 429, 430, 434, 435, 439, 440, 444, 445, 449, 450, + 454, 455, 459, 460, 464, 465, 469, 470, 474, 475, + 479, 480, 484, 485, 489, 490, 494, 495, 499, 500, + 504, 505, 509, 510, 514, 515, 519, 524, 529, 534, + 539, 548, 557, 566, 575, 576, 580, 581, 585, 586, + 590, 591, 595, 596, 600, 601, 605, 606, 610, 614, + 621, 631, 641, 646, 651, 656, 661, 664, 667, 670, + 673, 676, 680, 689, 698, 707, 716, 725, 734, 735, + 739, 740, 744, 745, 749, 750, 754, 759, 764, 770, + 776, 782, 788, 794, 804, 814, 824, 825, 829, 830, + 834, 835, 839, 840, 844, 845, 849, 855, 859, 867, + 875, 881, 885, 893, 901, 906, 908, 910, 912, 914, + 918, 926, 934, 938, 943, 950, 952, 957, 959, 963, + 971, 972, 974, 975, 978, 980, 982, 983, 985, 987, + 988, 990, 992, 994, 995, 997, 999, 1000 +}; + +/* YYRHS -- A `-1'-separated list of the rules' RHS. */ +static const yytype_int16 yyrhs[] = +{ + 122, 0, -1, 7, -1, 25, -1, 31, -1, 90, + -1, 68, -1, 24, 6, -1, 24, 13, 6, -1, + 24, 9, 6, -1, 27, 6, -1, 27, 13, 6, + -1, 21, 9, 6, -1, 21, 10, 6, -1, 24, + 10, 6, -1, 24, 11, 6, -1, 27, 11, 6, + -1, 21, 11, 6, -1, 21, 6, -1, 53, 10, + 115, 6, 116, 171, 117, 3, 118, -1, 53, 11, + 115, 6, 116, 171, 117, 3, 118, -1, 53, 12, + 115, 6, 116, 171, 117, 3, 118, -1, 91, 115, + 6, 116, 3, 119, 3, -1, 30, 3, 116, 3, + -1, 30, 171, 117, 3, 118, 14, 116, 3, -1, + 30, 171, 117, 3, 118, 174, 116, 3, -1, 54, + 176, 3, 116, 3, -1, 54, 176, 117, 3, 118, + 116, 3, -1, 54, 176, 6, 117, 3, 118, 116, + 3, -1, 108, 115, 6, 116, 3, -1, 30, 115, + 6, 116, 3, -1, 18, 115, 6, 116, 3, -1, + 55, 115, 6, 116, 3, -1, 19, 115, 6, 116, + 3, -1, 70, 115, 6, 116, 3, -1, 53, 12, + 115, 6, 116, 3, -1, 53, 115, 6, 116, 3, + -1, 91, 115, 6, -1, -1, 100, 123, 168, -1, + -1, 98, 124, 168, -1, -1, 99, 125, 168, -1, + 77, 3, 119, 3, -1, 73, 3, 119, 3, -1, + 18, 115, 6, 116, 3, 116, 3, -1, 45, 115, + 6, -1, 26, 115, 6, 116, 3, -1, 20, 115, + 6, 116, 3, -1, 28, 115, 6, 116, 3, -1, + 92, 3, -1, 84, 3, -1, 83, 3, -1, 74, + 175, 3, -1, 71, 3, -1, 76, 5, -1, 72, + 5, -1, 97, 172, -1, 29, 172, -1, 47, 3, + -1, 48, 3, -1, 24, 177, 3, -1, 27, 177, + 3, -1, 96, -1, 103, -1, 101, -1, 102, -1, + 109, 175, -1, 110, 175, -1, 104, 175, -1, 82, + 175, -1, 89, -1, 88, -1, 112, -1, 93, -1, + 66, 115, 6, -1, 53, 175, 3, 116, 6, 117, + 3, 118, -1, 53, 175, 6, 117, 3, 118, 116, + 3, -1, 53, 175, 3, 116, 117, 3, 118, -1, + 53, 175, 117, 3, 118, 116, 171, 117, 3, 118, + -1, 53, 175, 6, 117, 3, 118, 116, 171, 117, + 3, 118, -1, 53, 175, 3, 116, 3, -1, 53, + 175, 117, 3, 118, 116, 3, -1, 26, 115, 6, + 116, 171, 117, 3, 118, 10, -1, 20, 115, 6, + 116, 171, 117, 3, 118, 10, -1, 28, 115, 6, + 116, 171, 117, 3, 118, 10, -1, 74, 175, 171, + 117, 3, 118, -1, -1, 94, 126, 162, -1, -1, + 67, 127, 165, -1, -1, 17, 128, 164, -1, -1, + 16, 129, 165, -1, -1, 51, 130, 164, -1, -1, + 52, 131, 164, -1, -1, 36, 132, 163, -1, -1, + 37, 133, 163, -1, -1, 32, 134, 164, -1, -1, + 33, 135, 164, -1, -1, 111, 136, 164, -1, -1, + 114, 137, 164, -1, -1, 69, 138, 165, -1, -1, + 107, 139, 163, -1, -1, 105, 140, 163, -1, -1, + 36, 141, 166, -1, -1, 37, 142, 166, -1, -1, + 113, 143, 166, -1, -1, 46, 144, 166, -1, 26, + 3, 116, 3, -1, 20, 3, 116, 3, -1, 28, + 3, 116, 3, -1, 23, 3, 116, 3, -1, 26, + 3, 116, 171, 117, 3, 118, 10, -1, 20, 3, + 116, 171, 117, 3, 118, 10, -1, 28, 3, 116, + 171, 117, 3, 118, 10, -1, 23, 3, 116, 171, + 117, 3, 118, 10, -1, -1, 43, 145, 169, -1, + -1, 39, 146, 169, -1, -1, 38, 147, 169, -1, + -1, 41, 148, 169, -1, -1, 40, 149, 169, -1, + -1, 44, 150, 170, -1, -1, 87, 151, 170, -1, + 95, 12, 3, -1, 95, 175, 171, 117, 3, 118, + -1, 22, 115, 6, 116, 171, 117, 3, 118, 10, + -1, 23, 115, 6, 116, 171, 117, 3, 118, 10, + -1, 56, 3, 116, 3, -1, 57, 3, 116, 3, + -1, 49, 3, 116, 3, -1, 50, 3, 116, 3, + -1, 63, 3, -1, 64, 3, -1, 59, 3, -1, + 60, 3, -1, 61, 3, -1, 78, 115, 6, -1, + 53, 175, 3, 116, 117, 3, 120, 118, -1, 53, + 175, 3, 116, 117, 119, 3, 118, -1, 53, 175, + 117, 3, 120, 118, 116, 3, -1, 53, 175, 117, + 119, 3, 118, 116, 3, -1, 54, 176, 117, 3, + 120, 118, 116, 3, -1, 54, 176, 117, 119, 3, + 118, 116, 3, -1, -1, 85, 152, 167, -1, -1, + 86, 153, 167, -1, -1, 81, 154, 167, -1, -1, + 80, 155, 167, -1, 65, 3, 116, 5, -1, 62, + 5, 116, 3, -1, 85, 115, 6, 116, 3, -1, + 86, 115, 6, 116, 3, -1, 65, 115, 6, 116, + 5, -1, 22, 115, 6, 116, 3, -1, 23, 115, + 6, 116, 3, -1, 53, 175, 3, 116, 117, 3, + 116, 3, 118, -1, 53, 175, 117, 3, 116, 3, + 118, 116, 3, -1, 54, 176, 117, 3, 116, 3, + 118, 116, 3, -1, -1, 108, 156, 161, -1, -1, + 18, 157, 161, -1, -1, 55, 158, 161, -1, -1, + 19, 159, 161, -1, -1, 70, 160, 161, -1, 94, + 115, 6, 116, 3, -1, 3, 116, 3, -1, 171, + 117, 3, 118, 14, 116, 3, -1, 171, 117, 3, + 118, 174, 116, 3, -1, 3, 116, 3, 116, 3, + -1, 3, 116, 3, -1, 171, 117, 3, 118, 14, + 116, 3, -1, 171, 117, 3, 118, 174, 116, 3, + -1, 115, 6, 116, 3, -1, 162, -1, 163, -1, + 162, -1, 3, -1, 3, 116, 3, -1, 171, 117, + 3, 118, 14, 116, 3, -1, 171, 117, 3, 118, + 174, 116, 3, -1, 3, 116, 3, -1, 115, 6, + 116, 3, -1, 115, 6, 116, 3, 116, 3, -1, + 167, -1, 115, 6, 116, 3, -1, 170, -1, 3, + 116, 3, -1, 171, 117, 3, 118, 177, 116, 3, + -1, -1, 6, -1, -1, 173, 4, -1, 10, -1, + 11, -1, -1, 12, -1, 15, -1, -1, 10, -1, + 11, -1, 12, -1, -1, 10, -1, 11, -1, -1, + 12, -1 +}; + +/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ +static const yytype_uint16 yyrline[] = +{ + 0, 170, 170, 175, 178, 181, 184, 189, 204, 207, + 212, 221, 226, 234, 237, 242, 244, 246, 251, 269, + 277, 283, 291, 300, 305, 308, 313, 318, 321, 329, + 336, 344, 350, 356, 362, 368, 376, 386, 391, 391, + 392, 392, 393, 393, 397, 410, 423, 428, 433, 435, + 440, 445, 447, 449, 454, 459, 464, 472, 480, 482, + 487, 489, 491, 493, 498, 500, 502, 504, 509, 511, + 513, 518, 523, 525, 527, 529, 534, 540, 548, 562, + 567, 572, 577, 582, 587, 589, 591, 596, 601, 601, + 602, 602, 603, 603, 604, 604, 605, 605, 606, 606, + 607, 607, 608, 608, 609, 609, 610, 610, 611, 611, + 612, 612, 613, 613, 614, 614, 615, 615, 619, 619, + 620, 620, 621, 621, 622, 622, 626, 628, 630, 632, + 635, 637, 639, 641, 646, 646, 647, 647, 648, 648, + 649, 649, 650, 650, 651, 651, 652, 652, 656, 658, + 663, 669, 675, 677, 679, 681, 687, 689, 691, 693, + 695, 698, 709, 711, 716, 718, 723, 725, 730, 730, + 731, 731, 732, 732, 733, 733, 737, 743, 748, 750, + 755, 760, 766, 771, 774, 777, 782, 782, 783, 783, + 784, 784, 785, 785, 786, 786, 791, 801, 803, 805, + 807, 814, 816, 818, 824, 829, 830, 834, 835, 841, + 843, 845, 852, 856, 858, 860, 866, 868, 871, 873, + 879, 880, 883, 883, 888, 889, 890, 891, 892, 895, + 896, 897, 898, 901, 902, 903, 906, 907 +}; +#endif + +#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE +/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. + First, the terminals, then, starting at YYNTOKENS, nonterminals. */ +static const char *const yytname[] = +{ + "$end", "error", "$undefined", "REG", "FLAG", "CREG", "EXPR", + "UNKNOWN_OPCODE", "IS_OPCODE", "DOT_S", "DOT_B", "DOT_W", "DOT_L", + "DOT_A", "DOT_UB", "DOT_UW", "ABS", "ADC", "ADD", "AND_", "BCLR", "BCND", + "BMCND", "BNOT", "BRA", "BRK", "BSET", "BSR", "BTST", "CLRPSW", "CMP", + "DBT", "DIV", "DIVU", "EDIV", "EDIVU", "EMUL", "EMULU", "FADD", "FCMP", + "FDIV", "FMUL", "FREIT", "FSUB", "FTOI", "INT", "ITOF", "JMP", "JSR", + "MACHI", "MACLO", "MAX", "MIN", "MOV", "MOVU", "MUL", "MULHI", "MULLO", + "MULU", "MVFACHI", "MVFACMI", "MVFACLO", "MVFC", "MVTACHI", "MVTACLO", + "MVTC", "MVTIPL", "NEG", "NOP", "NOT", "OR", "POP", "POPC", "POPM", + "PUSH", "PUSHA", "PUSHC", "PUSHM", "RACW", "REIT", "REVL", "REVW", + "RMPA", "ROLC", "RORC", "ROTL", "ROTR", "ROUND", "RTE", "RTFI", "RTS", + "RTSD", "SAT", "SATR", "SBB", "SCCND", "SCMPU", "SETPSW", "SHAR", "SHLL", + "SHLR", "SMOVB", "SMOVF", "SMOVU", "SSTR", "STNZ", "STOP", "STZ", "SUB", + "SUNTIL", "SWHILE", "TST", "WAIT", "XCHG", "XOR", "'#'", "','", "'['", + "']'", "'-'", "'+'", "$accept", "statement", "@1", "@2", "@3", "@4", + "@5", "@6", "@7", "@8", "@9", "@10", "@11", "@12", "@13", "@14", "@15", + "@16", "@17", "@18", "@19", "@20", "@21", "@22", "@23", "@24", "@25", + "@26", "@27", "@28", "@29", "@30", "@31", "@32", "@33", "@34", "@35", + "@36", "@37", "@38", "op_subadd", "op_dp20_rm", "op_dp20_i", + "op_dp20_rim", "op_dp20_rms", "op_xchg", "op_shift_rot", "op_shift", + "float2_op", "float2_op_ni", "disp", "flag", "@39", "memex", "bwl", "bw", + "opt_l", 0 +}; +#endif + +# ifdef YYPRINT +/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to + token YYLEX-NUM. */ +static const yytype_uint16 yytoknum[] = +{ + 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, + 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, + 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, + 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, + 295, 296, 297, 298, 299, 300, 301, 302, 303, 304, + 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, + 315, 316, 317, 318, 319, 320, 321, 322, 323, 324, + 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, + 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, + 345, 346, 347, 348, 349, 350, 351, 352, 353, 354, + 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, + 365, 366, 367, 368, 369, 35, 44, 91, 93, 45, + 43 +}; +# endif + +/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ +static const yytype_uint8 yyr1[] = +{ + 0, 121, 122, 122, 122, 122, 122, 122, 122, 122, + 122, 122, 122, 122, 122, 122, 122, 122, 122, 122, + 122, 122, 122, 122, 122, 122, 122, 122, 122, 122, + 122, 122, 122, 122, 122, 122, 122, 122, 123, 122, + 124, 122, 125, 122, 122, 122, 122, 122, 122, 122, + 122, 122, 122, 122, 122, 122, 122, 122, 122, 122, + 122, 122, 122, 122, 122, 122, 122, 122, 122, 122, + 122, 122, 122, 122, 122, 122, 122, 122, 122, 122, + 122, 122, 122, 122, 122, 122, 122, 122, 126, 122, + 127, 122, 128, 122, 129, 122, 130, 122, 131, 122, + 132, 122, 133, 122, 134, 122, 135, 122, 136, 122, + 137, 122, 138, 122, 139, 122, 140, 122, 141, 122, + 142, 122, 143, 122, 144, 122, 122, 122, 122, 122, + 122, 122, 122, 122, 145, 122, 146, 122, 147, 122, + 148, 122, 149, 122, 150, 122, 151, 122, 122, 122, + 122, 122, 122, 122, 122, 122, 122, 122, 122, 122, + 122, 122, 122, 122, 122, 122, 122, 122, 152, 122, + 153, 122, 154, 122, 155, 122, 122, 122, 122, 122, + 122, 122, 122, 122, 122, 122, 156, 122, 157, 122, + 158, 122, 159, 122, 160, 122, 122, 161, 161, 161, + 161, 162, 162, 162, 163, 164, 164, 165, 165, 166, + 166, 166, 167, 168, 168, 168, 169, 169, 170, 170, + 171, 171, 173, 172, 174, 174, 174, 174, 174, 175, + 175, 175, 175, 176, 176, 176, 177, 177 +}; + +/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ +static const yytype_uint8 yyr2[] = +{ + 0, 2, 1, 1, 1, 1, 1, 2, 3, 3, + 2, 3, 3, 3, 3, 3, 3, 3, 2, 9, + 9, 9, 7, 4, 8, 8, 5, 7, 8, 5, + 5, 5, 5, 5, 5, 6, 5, 3, 0, 3, + 0, 3, 0, 3, 4, 4, 7, 3, 5, 5, + 5, 2, 2, 2, 3, 2, 2, 2, 2, 2, + 2, 2, 3, 3, 1, 1, 1, 1, 2, 2, + 2, 2, 1, 1, 1, 1, 3, 8, 8, 7, + 10, 11, 5, 7, 9, 9, 9, 6, 0, 3, + 0, 3, 0, 3, 0, 3, 0, 3, 0, 3, + 0, 3, 0, 3, 0, 3, 0, 3, 0, 3, + 0, 3, 0, 3, 0, 3, 0, 3, 0, 3, + 0, 3, 0, 3, 0, 3, 4, 4, 4, 4, + 8, 8, 8, 8, 0, 3, 0, 3, 0, 3, + 0, 3, 0, 3, 0, 3, 0, 3, 3, 6, + 9, 9, 4, 4, 4, 4, 2, 2, 2, 2, + 2, 3, 8, 8, 8, 8, 8, 8, 0, 3, + 0, 3, 0, 3, 0, 3, 4, 4, 5, 5, + 5, 5, 5, 9, 9, 9, 0, 3, 0, 3, + 0, 3, 0, 3, 0, 3, 5, 3, 7, 7, + 5, 3, 7, 7, 4, 1, 1, 1, 1, 3, + 7, 7, 3, 4, 6, 1, 4, 1, 3, 7, + 0, 1, 0, 2, 1, 1, 0, 1, 1, 0, + 1, 1, 1, 0, 1, 1, 0, 1 +}; + +/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state + STATE-NUM when YYTABLE doesn't specify something else to do. Zero + means the default is an error. */ +static const yytype_uint8 yydefact[] = +{ + 0, 2, 94, 92, 188, 192, 0, 0, 0, 0, + 236, 3, 0, 236, 0, 222, 220, 4, 104, 106, + 118, 120, 138, 136, 142, 140, 134, 144, 0, 124, + 0, 0, 0, 0, 96, 98, 229, 233, 190, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 90, + 6, 112, 194, 0, 0, 0, 229, 0, 0, 0, + 174, 172, 229, 0, 0, 168, 170, 146, 73, 72, + 5, 0, 0, 75, 88, 229, 64, 222, 40, 42, + 38, 66, 67, 65, 229, 116, 114, 186, 229, 229, + 108, 74, 122, 110, 0, 220, 220, 0, 220, 0, + 220, 0, 0, 18, 0, 0, 0, 0, 0, 0, + 7, 0, 0, 0, 237, 0, 0, 0, 0, 10, + 0, 0, 0, 0, 0, 59, 0, 0, 221, 0, + 0, 220, 220, 0, 220, 0, 220, 220, 220, 220, + 220, 220, 220, 0, 220, 60, 61, 0, 0, 220, + 220, 230, 231, 232, 0, 0, 234, 235, 0, 0, + 220, 0, 0, 158, 159, 160, 0, 156, 157, 0, + 0, 0, 220, 220, 0, 220, 55, 57, 0, 230, + 231, 232, 220, 56, 0, 0, 0, 0, 71, 53, + 52, 0, 0, 0, 0, 220, 0, 51, 0, 220, + 232, 220, 58, 0, 0, 0, 70, 0, 0, 0, + 220, 68, 69, 220, 220, 220, 1, 208, 207, 95, + 0, 0, 0, 205, 206, 93, 0, 0, 189, 0, + 0, 193, 220, 0, 12, 13, 17, 0, 220, 0, + 9, 14, 15, 8, 62, 220, 0, 16, 11, 63, + 220, 0, 223, 0, 0, 0, 105, 107, 101, 0, + 119, 0, 103, 121, 0, 0, 139, 217, 0, 137, + 143, 141, 135, 145, 47, 125, 0, 0, 97, 99, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 191, 0, 0, 0, 0, 0, 76, 91, 113, + 0, 195, 0, 54, 0, 0, 161, 0, 175, 173, + 0, 169, 0, 171, 147, 37, 0, 89, 148, 0, + 0, 215, 41, 43, 39, 117, 115, 0, 187, 109, + 123, 111, 0, 0, 0, 0, 0, 0, 0, 127, + 0, 220, 220, 129, 0, 220, 126, 0, 220, 128, + 0, 220, 23, 0, 0, 0, 0, 0, 0, 0, + 154, 155, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 152, 153, 177, 176, 0, + 0, 45, 0, 44, 0, 0, 0, 0, 0, 0, + 0, 0, 201, 0, 0, 31, 197, 0, 33, 0, + 49, 0, 181, 0, 0, 182, 0, 0, 48, 0, + 0, 50, 0, 30, 226, 209, 0, 218, 0, 0, + 220, 220, 220, 36, 82, 0, 0, 0, 0, 0, + 0, 0, 26, 0, 0, 0, 0, 0, 32, 180, + 34, 0, 212, 178, 179, 0, 196, 0, 0, 29, + 226, 204, 0, 0, 226, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 224, 225, 227, 0, 228, 0, + 226, 216, 236, 0, 0, 35, 0, 0, 0, 0, + 0, 0, 220, 0, 0, 0, 0, 0, 0, 0, + 87, 0, 149, 213, 0, 0, 46, 200, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 79, + 0, 0, 220, 0, 83, 0, 0, 0, 0, 0, + 27, 0, 0, 22, 0, 0, 0, 0, 0, 131, + 0, 0, 133, 0, 130, 0, 132, 0, 24, 25, + 0, 0, 0, 0, 0, 0, 77, 0, 162, 163, + 78, 0, 0, 0, 164, 165, 28, 0, 166, 167, + 214, 202, 203, 198, 199, 85, 150, 151, 84, 86, + 210, 211, 219, 19, 20, 21, 183, 0, 184, 0, + 185, 0, 80, 81 +}; + +/* YYDEFGOTO[NTERM-NUM]. */ +static const yytype_int16 yydefgoto[] = +{ + -1, 94, 205, 203, 204, 199, 172, 96, 95, 149, + 150, 133, 135, 131, 132, 213, 215, 173, 208, 207, + 134, 136, 214, 144, 141, 138, 137, 140, 139, 142, + 195, 192, 194, 187, 186, 210, 98, 160, 100, 175, + 228, 223, 224, 225, 219, 260, 321, 322, 266, 267, + 220, 125, 126, 469, 155, 158, 116 +}; + +/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing + STATE-NUM. */ +#define YYPACT_NINF -415 +static const yytype_int16 yypact[] = +{ + 464, -415, -415, -415, -67, -62, 24, 94, -54, 25, + 83, -415, 26, 39, 27, -415, 18, -415, -415, -415, + -32, -30, -415, -415, -415, -415, -415, -415, -6, -415, + 112, 114, 129, 134, -415, -415, -4, 4, 34, 150, + 154, 173, 179, 192, 203, 200, 206, 28, 95, -415, + -415, -415, 96, 209, 208, 211, 57, 210, 214, 103, + -415, -415, 57, 216, 217, 106, 108, -415, -415, -415, + -415, 109, 222, -415, 111, 195, -415, -415, -415, -415, + -415, -415, -415, -415, 57, -415, -415, 113, 57, 57, + -415, -415, -415, -415, 227, 40, 19, 224, 152, 225, + 152, 116, 229, -415, 230, 231, 232, 233, 117, 234, + -415, 235, 236, 237, -415, 238, 242, 130, 241, -415, + 243, 244, 245, 135, 246, -415, 249, 138, -415, 250, + 140, 19, 19, 143, 161, 143, 161, 20, 20, 20, + 20, 20, 162, 253, 161, -415, -415, 139, 144, 19, + 19, 146, 147, 148, 258, -1, -415, -415, 13, 259, + 152, 151, 153, -415, -415, -415, 155, -415, -415, 156, + 260, 262, 40, 40, 264, 152, -415, -415, 157, -415, + -415, -415, 166, -415, 158, 267, 271, 271, -415, -415, + -415, 269, 271, 272, 271, 162, 273, -415, 274, 167, + 278, 276, -415, 30, 30, 30, -415, 143, 143, 277, + 152, -415, -415, 19, 161, 19, -415, 169, -415, -415, + 170, 169, 280, -415, -415, -415, 175, 176, -415, 171, + 177, -415, 168, 181, -415, -415, -415, 182, 172, 183, + -415, -415, -415, -415, -415, 174, 187, -415, -415, -415, + 178, 188, -415, 281, 189, 286, -415, -415, -415, 191, + -415, 193, -415, -415, 197, 284, -415, -415, 199, -415, + -415, -415, -415, -415, -415, -415, 291, 292, -415, -415, + 290, 294, 295, 201, 202, 204, 0, 207, 205, 8, + 212, -415, 299, 303, 305, 304, 215, -415, -415, -415, + 218, -415, 308, -415, 213, 309, -415, 220, -415, -415, + 221, -415, 223, -415, -415, 226, 228, -415, -415, 239, + 313, -415, -415, -415, -415, -415, -415, 247, -415, -415, + -415, -415, 311, 312, 248, 317, 321, 324, 330, -415, + 240, 180, 184, -415, 251, 185, -415, 252, 186, -415, + 254, 190, -415, 335, 255, 337, 338, 340, 256, 342, + -415, -415, 261, 263, 265, 343, 14, 344, -81, 345, + 346, 347, -8, 348, 349, -415, -415, -415, -415, 350, + 351, -415, 355, -415, 356, 357, 358, 359, 362, 363, + 266, 364, -415, 257, 367, 268, 270, 275, -415, 371, + -415, 279, -415, 282, 373, -415, 283, 375, -415, 285, + 377, -415, 293, -415, 48, -415, 289, -415, 380, 296, + 276, 276, 194, -415, -415, 298, 10, 300, 382, 287, + 301, 302, -415, 306, 384, 297, 307, 310, -415, -415, + -415, 314, -415, -415, -415, 315, -415, 318, 385, -415, + 66, -415, 386, 387, 87, 319, 388, 389, 320, 391, + 322, 392, 323, 394, -415, -415, -415, 326, -415, 327, + 136, -415, 341, 316, 328, -415, 329, 395, 36, 398, + 331, 332, 196, 333, 336, 339, 352, 405, 353, 360, + -415, 406, -415, 361, 383, 423, -415, -415, 427, 454, + 401, 354, 404, 402, 461, 407, 462, 411, 463, 413, + 419, 466, 467, 468, 420, 424, 426, 469, 428, -415, + 470, 471, 198, 474, -415, 334, 432, 436, 441, 475, + -415, 445, 450, -415, 451, 453, 455, 456, 458, -415, + 416, 447, -415, 452, -415, 457, -415, 465, -415, -415, + 460, 476, 495, 477, 478, 479, -415, 480, -415, -415, + -415, 482, 582, 583, -415, -415, -415, 589, -415, -415, + -415, -415, -415, -415, -415, -415, -415, -415, -415, -415, + -415, -415, -415, -415, -415, -415, -415, 590, -415, 483, + -415, 484, -415, -415 +}; + +/* YYPGOTO[NTERM-NUM]. */ +static const yytype_int16 yypgoto[] = +{ + -415, -415, -415, -415, -415, -415, -415, -415, -415, -415, + -415, -415, -415, -415, -415, -415, -415, -415, -415, -415, + -415, -415, -415, -415, -415, -415, -415, -415, -415, -415, + -415, -415, -415, -415, -415, -415, -415, -415, -415, -415, + -96, -86, -101, -77, -98, -126, -145, -114, 22, -130, + -16, 396, -415, -414, -18, -415, -12 +}; + +/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If + positive, shift that token. If negative, reduce the rule which + number is the opposite. If zero, do what YYDEFACT says. + If YYTABLE_NINF, syntax error. */ +#define YYTABLE_NINF -103 +static const yytype_int16 yytable[] = +{ + 130, 122, 284, 368, 231, 285, 151, 152, 153, 218, + 263, 372, 273, 478, 156, 157, 287, 424, 275, 288, + 425, 127, 221, 264, 128, 128, 128, 101, 108, 117, + 123, 169, 258, 307, 262, 428, 495, 429, 182, 430, + 499, 308, 309, 217, 188, 119, 128, 311, 97, 313, + 120, 114, 121, 99, 256, 257, 512, 201, 464, 465, + 466, 107, 467, 468, 291, 314, 206, 179, 180, 181, + 211, 212, 278, 279, 298, 299, 464, 465, 466, 301, + 494, 468, 229, -100, 229, -102, 218, 218, 330, 110, + 323, 324, 111, 112, 113, 114, 115, 464, 465, 466, + 103, 498, 468, 104, 105, 106, 325, 326, 434, 143, + 435, 154, 436, 317, 328, 145, 286, 146, 261, 369, + 261, 268, 268, 268, 268, 268, 268, 373, 261, 479, + 289, 426, 147, 129, 222, 265, 329, 148, 331, 102, + 109, 118, 124, 170, 229, 320, 464, 465, 466, 159, + 511, 468, 518, 161, 519, 227, 520, 162, 128, 229, + 269, 270, 271, 272, 259, 264, 304, 128, 128, 303, + 221, 339, 128, 128, 128, 343, 163, 346, 128, 268, + 128, 349, 164, 400, 128, 319, 128, 402, 405, 408, + 128, 128, 128, 411, 229, 165, 128, 475, 261, 524, + 128, 560, 128, 167, 128, 179, 180, 200, 166, 168, + 171, 174, 176, 177, 178, 183, 340, 184, 185, 189, + 190, 191, 344, 193, 196, 197, 198, 216, 209, 347, + 226, 230, 232, 238, 350, 233, 234, 235, 236, 237, + 239, 240, 241, 242, 243, 244, 245, 246, 249, 247, + 248, 250, 251, 252, 253, 276, 254, 255, 222, 274, + 277, 280, 281, 282, 283, 290, 296, 292, 297, 293, + 300, 294, 295, 306, 307, 310, 302, 305, 312, 315, + 316, 318, 128, 327, 352, 332, 334, 333, 337, 354, + 358, 335, 336, 338, 360, 361, 362, 341, 342, 345, + 363, 364, 375, 348, 351, 353, 376, 355, 377, 378, + 356, 381, 383, 357, 392, 393, 359, 365, 366, 390, + 395, 367, 371, 370, 396, 401, 403, 397, 374, 406, + 382, 379, 409, 398, 380, 412, 384, 385, 413, 386, + 415, 416, 387, 417, 388, 419, 423, 427, 431, 432, + 433, 437, 438, 114, 440, 439, 389, 399, 441, 442, + 443, 444, 445, 391, 394, 446, 447, 449, 404, 407, + 451, 410, 418, 414, 455, 450, 458, 420, 460, 421, + 462, 422, 448, 471, 452, 481, 453, 486, 493, 496, + 497, 501, 502, 454, 504, 506, 456, 508, 517, 457, + 459, 521, 461, 482, 473, 474, 476, 470, 530, 533, + 463, 539, 542, 487, 472, 477, 548, 544, 480, 483, + 484, 546, 549, 553, 485, 488, 575, 554, 489, 555, + 0, 557, 490, 514, 491, 564, 492, 500, 503, 565, + 505, 507, 509, 510, 566, 515, 516, 522, 568, 526, + 523, 563, 527, 569, 570, 528, 571, 576, 572, 573, + 513, 574, 577, 580, 0, 0, 525, 578, 0, 531, + 529, 1, 540, 202, 0, 579, 532, 534, 0, 581, + 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, + 12, 13, 14, 15, 16, 17, 18, 19, 582, 535, + 20, 21, 22, 23, 24, 25, 561, 26, 27, 28, + 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, + 39, 40, 541, 41, 42, 43, 44, 45, 46, 47, + 48, 49, 50, 51, 52, 53, 54, 55, 56, 536, + 57, 58, 59, 537, 60, 61, 62, 63, 64, 65, + 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, + 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, + 538, 86, 87, 88, 89, 90, 91, 92, 93, 543, + 545, 547, 550, 551, 552, 588, 589, 556, 558, 559, + 562, 567, 590, 591, 0, 583, 584, 585, 586, 587, + 0, 592, 593 +}; + +static const yytype_int16 yycheck[] = +{ + 16, 13, 3, 3, 100, 6, 10, 11, 12, 95, + 136, 3, 142, 3, 10, 11, 3, 3, 144, 6, + 6, 3, 3, 3, 6, 6, 6, 3, 3, 3, + 3, 3, 133, 3, 135, 116, 450, 118, 56, 120, + 454, 186, 187, 3, 62, 6, 6, 192, 115, 194, + 11, 12, 13, 115, 131, 132, 470, 75, 10, 11, + 12, 115, 14, 15, 160, 195, 84, 10, 11, 12, + 88, 89, 149, 150, 172, 173, 10, 11, 12, 175, + 14, 15, 98, 115, 100, 115, 172, 173, 214, 6, + 204, 205, 9, 10, 11, 12, 13, 10, 11, 12, + 6, 14, 15, 9, 10, 11, 207, 208, 116, 115, + 118, 115, 120, 199, 210, 3, 117, 3, 134, 119, + 136, 137, 138, 139, 140, 141, 142, 119, 144, 119, + 117, 117, 3, 115, 115, 115, 213, 3, 215, 115, + 115, 115, 115, 115, 160, 115, 10, 11, 12, 115, + 14, 15, 116, 3, 118, 3, 120, 3, 6, 175, + 138, 139, 140, 141, 3, 3, 182, 6, 6, 3, + 3, 3, 6, 6, 6, 3, 3, 3, 6, 195, + 6, 3, 3, 3, 6, 201, 6, 3, 3, 3, + 6, 6, 6, 3, 210, 3, 6, 3, 214, 3, + 6, 3, 6, 3, 6, 10, 11, 12, 5, 3, + 115, 115, 3, 5, 3, 5, 232, 3, 115, 3, + 3, 115, 238, 115, 115, 3, 115, 0, 115, 245, + 6, 6, 116, 116, 250, 6, 6, 6, 6, 6, + 6, 6, 6, 6, 6, 3, 116, 6, 3, 6, + 6, 116, 6, 4, 116, 116, 6, 117, 115, 6, + 116, 115, 115, 115, 6, 6, 6, 116, 6, 116, + 6, 116, 116, 6, 3, 6, 119, 119, 6, 6, + 6, 3, 6, 6, 3, 116, 6, 117, 117, 3, + 6, 116, 116, 116, 3, 3, 6, 116, 116, 116, + 6, 6, 3, 116, 116, 116, 3, 116, 3, 5, + 117, 3, 3, 116, 3, 3, 117, 116, 116, 6, + 3, 117, 117, 116, 3, 341, 342, 3, 116, 345, + 117, 116, 348, 3, 116, 351, 116, 116, 3, 116, + 3, 3, 116, 3, 116, 3, 3, 3, 3, 3, + 3, 3, 3, 12, 3, 5, 117, 117, 3, 3, + 3, 3, 3, 116, 116, 3, 3, 3, 117, 117, + 3, 117, 116, 118, 3, 118, 3, 116, 3, 116, + 3, 116, 116, 3, 116, 3, 116, 3, 3, 3, + 3, 3, 3, 118, 3, 3, 117, 3, 3, 117, + 117, 3, 117, 116, 420, 421, 422, 118, 3, 3, + 117, 10, 10, 116, 118, 117, 3, 10, 118, 118, + 118, 10, 3, 3, 118, 118, 10, 3, 118, 3, + -1, 3, 118, 117, 119, 3, 118, 118, 118, 3, + 118, 118, 116, 116, 3, 117, 117, 116, 3, 116, + 118, 117, 116, 3, 3, 116, 3, 10, 3, 3, + 472, 3, 10, 3, -1, -1, 482, 10, -1, 116, + 118, 7, 118, 77, -1, 10, 116, 116, -1, 3, + 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 33, 3, 116, + 36, 37, 38, 39, 40, 41, 522, 43, 44, 45, + 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, + 56, 57, 118, 59, 60, 61, 62, 63, 64, 65, + 66, 67, 68, 69, 70, 71, 72, 73, 74, 116, + 76, 77, 78, 116, 80, 81, 82, 83, 84, 85, + 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, + 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, + 116, 107, 108, 109, 110, 111, 112, 113, 114, 118, + 118, 118, 116, 116, 116, 3, 3, 118, 118, 118, + 116, 116, 3, 3, -1, 118, 118, 118, 118, 117, + -1, 118, 118 +}; + +/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing + symbol of state STATE-NUM. */ +static const yytype_uint8 yystos[] = +{ + 0, 7, 16, 17, 18, 19, 20, 21, 22, 23, + 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, + 36, 37, 38, 39, 40, 41, 43, 44, 45, 46, + 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, + 57, 59, 60, 61, 62, 63, 64, 65, 66, 67, + 68, 69, 70, 71, 72, 73, 74, 76, 77, 78, + 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, + 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, + 100, 101, 102, 103, 104, 105, 107, 108, 109, 110, + 111, 112, 113, 114, 122, 129, 128, 115, 157, 115, + 159, 3, 115, 6, 9, 10, 11, 115, 3, 115, + 6, 9, 10, 11, 12, 13, 177, 3, 115, 6, + 11, 13, 177, 3, 115, 172, 173, 3, 6, 115, + 171, 134, 135, 132, 141, 133, 142, 147, 146, 149, + 148, 145, 150, 115, 144, 3, 3, 3, 3, 130, + 131, 10, 11, 12, 115, 175, 10, 11, 176, 115, + 158, 3, 3, 3, 3, 3, 5, 3, 3, 3, + 115, 115, 127, 138, 115, 160, 3, 5, 3, 10, + 11, 12, 175, 5, 3, 115, 155, 154, 175, 3, + 3, 115, 152, 115, 153, 151, 115, 3, 115, 126, + 12, 175, 172, 124, 125, 123, 175, 140, 139, 115, + 156, 175, 175, 136, 143, 137, 0, 3, 162, 165, + 171, 3, 115, 162, 163, 164, 6, 3, 161, 171, + 6, 161, 116, 6, 6, 6, 6, 6, 116, 6, + 6, 6, 6, 6, 3, 116, 6, 6, 6, 3, + 116, 6, 4, 116, 6, 117, 164, 164, 163, 3, + 166, 171, 163, 166, 3, 115, 169, 170, 171, 169, + 169, 169, 169, 170, 6, 166, 116, 116, 164, 164, + 115, 115, 115, 6, 3, 6, 117, 3, 6, 117, + 6, 161, 116, 116, 116, 116, 6, 6, 165, 165, + 6, 161, 119, 3, 171, 119, 6, 3, 167, 167, + 6, 167, 6, 167, 170, 6, 6, 162, 3, 171, + 115, 167, 168, 168, 168, 163, 163, 6, 161, 164, + 166, 164, 116, 117, 6, 116, 116, 117, 116, 3, + 171, 116, 116, 3, 171, 116, 3, 171, 116, 3, + 171, 116, 3, 116, 3, 116, 117, 116, 6, 117, + 3, 3, 6, 6, 6, 116, 116, 117, 3, 119, + 116, 117, 3, 119, 116, 3, 3, 3, 5, 116, + 116, 3, 117, 3, 116, 116, 116, 116, 116, 117, + 6, 116, 3, 3, 116, 3, 3, 3, 3, 117, + 3, 171, 3, 171, 117, 3, 171, 117, 3, 171, + 117, 3, 171, 3, 118, 3, 3, 3, 116, 3, + 116, 116, 116, 3, 3, 6, 117, 3, 116, 118, + 120, 3, 3, 3, 116, 118, 120, 3, 3, 5, + 3, 3, 3, 3, 3, 3, 3, 3, 116, 3, + 118, 3, 116, 116, 118, 3, 117, 117, 3, 117, + 3, 117, 3, 117, 10, 11, 12, 14, 15, 174, + 118, 3, 118, 171, 171, 3, 171, 117, 3, 119, + 118, 3, 116, 118, 118, 118, 3, 116, 118, 118, + 118, 119, 118, 3, 14, 174, 3, 3, 14, 174, + 118, 3, 3, 118, 3, 118, 3, 118, 3, 116, + 116, 14, 174, 177, 117, 117, 117, 3, 116, 118, + 120, 3, 116, 118, 3, 171, 116, 116, 116, 118, + 3, 116, 116, 3, 116, 116, 116, 116, 116, 10, + 118, 118, 10, 118, 10, 118, 10, 118, 3, 3, + 116, 116, 116, 3, 3, 3, 118, 3, 118, 118, + 3, 171, 116, 117, 3, 3, 3, 116, 3, 3, + 3, 3, 3, 3, 3, 10, 10, 10, 10, 10, + 3, 3, 3, 118, 118, 118, 118, 117, 3, 3, + 3, 3, 118, 118 +}; + +#define yyerrok (yyerrstatus = 0) +#define yyclearin (yychar = YYEMPTY) +#define YYEMPTY (-2) +#define YYEOF 0 + +#define YYACCEPT goto yyacceptlab +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab + + +/* Like YYERROR except do call yyerror. This remains here temporarily + to ease the transition to the new meaning of YYERROR, for GCC. + Once GCC version 2 has supplanted version 1, this can go. */ + +#define YYFAIL goto yyerrlab + +#define YYRECOVERING() (!!yyerrstatus) + +#define YYBACKUP(Token, Value) \ +do \ + if (yychar == YYEMPTY && yylen == 1) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ + YYPOPSTACK (1); \ + goto yybackup; \ + } \ + else \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ +while (YYID (0)) + + +#define YYTERROR 1 +#define YYERRCODE 256 + + +/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. + If N is 0, then set CURRENT to the empty location which ends + the previous symbol: RHS[0] (always defined). */ + +#define YYRHSLOC(Rhs, K) ((Rhs)[K]) +#ifndef YYLLOC_DEFAULT +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ + if (YYID (N)) \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ + while (YYID (0)) +#endif + + +/* YY_LOCATION_PRINT -- Print the location on the stream. + This macro was not mandated originally: define only if we know + we won't break user code: when these are the locations we know. */ + +#ifndef YY_LOCATION_PRINT +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) +# else +# define YY_LOCATION_PRINT(File, Loc) ((void) 0) +# endif +#endif + + +/* YYLEX -- calling `yylex' with the right arguments. */ + +#ifdef YYLEX_PARAM +# define YYLEX yylex (YYLEX_PARAM) +#else +# define YYLEX yylex () +#endif + +/* Enable debugging if requested. */ +#if YYDEBUG + +# ifndef YYFPRINTF +# include /* INFRINGES ON USER NAME SPACE */ +# define YYFPRINTF fprintf +# endif + +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ +} while (YYID (0)) + +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yy_symbol_print (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ +} while (YYID (0)) + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_value_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (!yyvaluep) + return; +# ifdef YYPRINT + if (yytype < YYNTOKENS) + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# else + YYUSE (yyoutput); +# endif + switch (yytype) + { + default: + break; + } +} + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (yytype < YYNTOKENS) + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + else + YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + + yy_symbol_value_print (yyoutput, yytype, yyvaluep); + YYFPRINTF (yyoutput, ")"); +} + +/*------------------------------------------------------------------. +| yy_stack_print -- Print the state stack from its BOTTOM up to its | +| TOP (included). | +`------------------------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_stack_print (yytype_int16 *bottom, yytype_int16 *top) +#else +static void +yy_stack_print (bottom, top) + yytype_int16 *bottom; + yytype_int16 *top; +#endif +{ + YYFPRINTF (stderr, "Stack now"); + for (; bottom <= top; ++bottom) + YYFPRINTF (stderr, " %d", *bottom); + YYFPRINTF (stderr, "\n"); +} + +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ +} while (YYID (0)) + + +/*------------------------------------------------. +| Report that the YYRULE is going to be reduced. | +`------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_reduce_print (YYSTYPE *yyvsp, int yyrule) +#else +static void +yy_reduce_print (yyvsp, yyrule) + YYSTYPE *yyvsp; + int yyrule; +#endif +{ + int yynrhs = yyr2[yyrule]; + int yyi; + unsigned long int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", + yyrule - 1, yylno); + /* The symbols being reduced. */ + for (yyi = 0; yyi < yynrhs; yyi++) + { + fprintf (stderr, " $%d = ", yyi + 1); + yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], + &(yyvsp[(yyi + 1) - (yynrhs)]) + ); + fprintf (stderr, "\n"); + } +} + +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ + yy_reduce_print (yyvsp, Rule); \ +} while (YYID (0)) + +/* Nonzero means print parse trace. It is left uninitialized so that + multiple parsers can coexist. */ +int yydebug; +#else /* !YYDEBUG */ +# define YYDPRINTF(Args) +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YY_STACK_PRINT(Bottom, Top) +# define YY_REDUCE_PRINT(Rule) +#endif /* !YYDEBUG */ + + +/* YYINITDEPTH -- initial size of the parser's stacks. */ +#ifndef YYINITDEPTH +# define YYINITDEPTH 200 +#endif + +/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only + if the built-in stack extension method is used). + + Do not make this value too large; the results are undefined if + YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + evaluated with infinite-precision integer arithmetic. */ + +#ifndef YYMAXDEPTH +# define YYMAXDEPTH 10000 +#endif + + + +#if YYERROR_VERBOSE + +# ifndef yystrlen +# if defined __GLIBC__ && defined _STRING_H +# define yystrlen strlen +# else +/* Return the length of YYSTR. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static YYSIZE_T +yystrlen (const char *yystr) +#else +static YYSIZE_T +yystrlen (yystr) + const char *yystr; +#endif +{ + YYSIZE_T yylen; + for (yylen = 0; yystr[yylen]; yylen++) + continue; + return yylen; +} +# endif +# endif + +# ifndef yystpcpy +# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE +# define yystpcpy stpcpy +# else +/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in + YYDEST. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static char * +yystpcpy (char *yydest, const char *yysrc) +#else +static char * +yystpcpy (yydest, yysrc) + char *yydest; + const char *yysrc; +#endif +{ + char *yyd = yydest; + const char *yys = yysrc; + + while ((*yyd++ = *yys++) != '\0') + continue; + + return yyd - 1; +} +# endif +# endif + +# ifndef yytnamerr +/* Copy to YYRES the contents of YYSTR after stripping away unnecessary + quotes and backslashes, so that it's suitable for yyerror. The + heuristic is that double-quoting is unnecessary unless the string + contains an apostrophe, a comma, or backslash (other than + backslash-backslash). YYSTR is taken from yytname. If YYRES is + null, do not copy; instead, return the length of what the result + would have been. */ +static YYSIZE_T +yytnamerr (char *yyres, const char *yystr) +{ + if (*yystr == '"') + { + YYSIZE_T yyn = 0; + char const *yyp = yystr; + + for (;;) + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; + + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; + + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } + do_not_strip_quotes: ; + } + + if (! yyres) + return yystrlen (yystr); + + return yystpcpy (yyres, yystr) - yyres; +} +# endif + +/* Copy into YYRESULT an error message about the unexpected token + YYCHAR while in state YYSTATE. Return the number of bytes copied, + including the terminating null byte. If YYRESULT is null, do not + copy anything; just return the number of bytes that would be + copied. As a special case, return 0 if an ordinary "syntax error" + message will do. Return YYSIZE_MAXIMUM if overflow occurs during + size calculation. */ +static YYSIZE_T +yysyntax_error (char *yyresult, int yystate, int yychar) +{ + int yyn = yypact[yystate]; + + if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) + return 0; + else + { + int yytype = YYTRANSLATE (yychar); + YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); + YYSIZE_T yysize = yysize0; + YYSIZE_T yysize1; + int yysize_overflow = 0; + enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; + char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + int yyx; + +# if 0 + /* This is so xgettext sees the translatable formats that are + constructed on the fly. */ + YY_("syntax error, unexpected %s"); + YY_("syntax error, unexpected %s, expecting %s"); + YY_("syntax error, unexpected %s, expecting %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); +# endif + char *yyfmt; + char const *yyf; + static char const yyunexpected[] = "syntax error, unexpected %s"; + static char const yyexpecting[] = ", expecting %s"; + static char const yyor[] = " or %s"; + char yyformat[sizeof yyunexpected + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; + char const *yyprefix = yyexpecting; + + /* Start YYX at -YYN if negative to avoid negative indexes in + YYCHECK. */ + int yyxbegin = yyn < 0 ? -yyn : 0; + + /* Stay within bounds of both yycheck and yytname. */ + int yychecklim = YYLAST - yyn + 1; + int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; + int yycount = 1; + + yyarg[0] = yytname[yytype]; + yyfmt = yystpcpy (yyformat, yyunexpected); + + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } + + yyf = YY_(yyformat); + yysize1 = yysize + yystrlen (yyf); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + + if (yysize_overflow) + return YYSIZE_MAXIMUM; + + if (yyresult) + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yyresult; + int yyi = 0; + while ((*yyp = *yyf) != '\0') + { + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } + } + } + return yysize; + } +} +#endif /* YYERROR_VERBOSE */ + + +/*-----------------------------------------------. +| Release the memory associated to this symbol. | +`-----------------------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +#else +static void +yydestruct (yymsg, yytype, yyvaluep) + const char *yymsg; + int yytype; + YYSTYPE *yyvaluep; +#endif +{ + YYUSE (yyvaluep); + + if (!yymsg) + yymsg = "Deleting"; + YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); + + switch (yytype) + { + + default: + break; + } +} + + +/* Prevent warnings from -Wmissing-prototypes. */ + +#ifdef YYPARSE_PARAM +#if defined __STDC__ || defined __cplusplus +int yyparse (void *YYPARSE_PARAM); +#else +int yyparse (); +#endif +#else /* ! YYPARSE_PARAM */ +#if defined __STDC__ || defined __cplusplus +int yyparse (void); +#else +int yyparse (); +#endif +#endif /* ! YYPARSE_PARAM */ + + + +/* The look-ahead symbol. */ +int yychar; + +/* The semantic value of the look-ahead symbol. */ +YYSTYPE yylval; + +/* Number of syntax errors so far. */ +int yynerrs; + + + +/*----------. +| yyparse. | +`----------*/ + +#ifdef YYPARSE_PARAM +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void *YYPARSE_PARAM) +#else +int +yyparse (YYPARSE_PARAM) + void *YYPARSE_PARAM; +#endif +#else /* ! YYPARSE_PARAM */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void) +#else +int +yyparse () + +#endif +#endif +{ + + int yystate; + int yyn; + int yyresult; + /* Number of tokens to shift before error messages enabled. */ + int yyerrstatus; + /* Look-ahead token as an internal (translated) token number. */ + int yytoken = 0; +#if YYERROR_VERBOSE + /* Buffer for error messages, and its allocated size. */ + char yymsgbuf[128]; + char *yymsg = yymsgbuf; + YYSIZE_T yymsg_alloc = sizeof yymsgbuf; +#endif + + /* Three stacks and their tools: + `yyss': related to states, + `yyvs': related to semantic values, + `yyls': related to locations. + + Refer to the stacks thru separate pointers, to allow yyoverflow + to reallocate them elsewhere. */ + + /* The state stack. */ + yytype_int16 yyssa[YYINITDEPTH]; + yytype_int16 *yyss = yyssa; + yytype_int16 *yyssp; + + /* The semantic value stack. */ + YYSTYPE yyvsa[YYINITDEPTH]; + YYSTYPE *yyvs = yyvsa; + YYSTYPE *yyvsp; + + + +#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) + + YYSIZE_T yystacksize = YYINITDEPTH; + + /* The variables used to return semantic value and location from the + action routines. */ + YYSTYPE yyval; + + + /* The number of symbols on the RHS of the reduced rule. + Keep to zero when no symbol should be popped. */ + int yylen = 0; + + YYDPRINTF ((stderr, "Starting parse\n")); + + yystate = 0; + yyerrstatus = 0; + yynerrs = 0; + yychar = YYEMPTY; /* Cause a token to be read. */ + + /* Initialize stack pointers. + Waste one element of value and location stack + so that they stay on the same level as the state stack. + The wasted elements are never initialized. */ + + yyssp = yyss; + yyvsp = yyvs; + + goto yysetstate; + +/*------------------------------------------------------------. +| yynewstate -- Push a new state, which is found in yystate. | +`------------------------------------------------------------*/ + yynewstate: + /* In all cases, when you get here, the value and location stacks + have just been pushed. So pushing a state here evens the stacks. */ + yyssp++; + + yysetstate: + *yyssp = yystate; + + if (yyss + yystacksize - 1 <= yyssp) + { + /* Get the current used size of the three stacks, in elements. */ + YYSIZE_T yysize = yyssp - yyss + 1; + +#ifdef yyoverflow + { + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + yytype_int16 *yyss1 = yyss; + + + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), + + &yystacksize); + + yyss = yyss1; + yyvs = yyvs1; + } +#else /* no yyoverflow */ +# ifndef YYSTACK_RELOCATE + goto yyexhaustedlab; +# else + /* Extend the stack our own way. */ + if (YYMAXDEPTH <= yystacksize) + goto yyexhaustedlab; + yystacksize *= 2; + if (YYMAXDEPTH < yystacksize) + yystacksize = YYMAXDEPTH; + + { + yytype_int16 *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss); + YYSTACK_RELOCATE (yyvs); + +# undef YYSTACK_RELOCATE + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); + } +# endif +#endif /* no yyoverflow */ + + yyssp = yyss + yysize - 1; + yyvsp = yyvs + yysize - 1; + + + YYDPRINTF ((stderr, "Stack size increased to %lu\n", + (unsigned long int) yystacksize)); + + if (yyss + yystacksize - 1 <= yyssp) + YYABORT; + } + + YYDPRINTF ((stderr, "Entering state %d\n", yystate)); + + goto yybackup; + +/*-----------. +| yybackup. | +`-----------*/ +yybackup: + + /* Do appropriate processing given the current state. Read a + look-ahead token if we need one and don't already have one. */ + + /* First try to decide what to do without reference to look-ahead token. */ + yyn = yypact[yystate]; + if (yyn == YYPACT_NINF) + goto yydefault; + + /* Not known => get a look-ahead token if don't already have one. */ + + /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ + if (yychar == YYEMPTY) + { + YYDPRINTF ((stderr, "Reading a token: ")); + yychar = YYLEX; + } + + if (yychar <= YYEOF) + { + yychar = yytoken = YYEOF; + YYDPRINTF ((stderr, "Now at end of input.\n")); + } + else + { + yytoken = YYTRANSLATE (yychar); + YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + } + + /* If the proper action on seeing token YYTOKEN is to reduce or to + detect an error, take that action. */ + yyn += yytoken; + if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) + goto yydefault; + yyn = yytable[yyn]; + if (yyn <= 0) + { + if (yyn == 0 || yyn == YYTABLE_NINF) + goto yyerrlab; + yyn = -yyn; + goto yyreduce; + } + + if (yyn == YYFINAL) + YYACCEPT; + + /* Count tokens shifted since error; after three, turn off error + status. */ + if (yyerrstatus) + yyerrstatus--; + + /* Shift the look-ahead token. */ + YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + + /* Discard the shifted token unless it is eof. */ + if (yychar != YYEOF) + yychar = YYEMPTY; + + yystate = yyn; + *++yyvsp = yylval; + + goto yynewstate; + + +/*-----------------------------------------------------------. +| yydefault -- do the default action for the current state. | +`-----------------------------------------------------------*/ +yydefault: + yyn = yydefact[yystate]; + if (yyn == 0) + goto yyerrlab; + goto yyreduce; + + +/*-----------------------------. +| yyreduce -- Do a reduction. | +`-----------------------------*/ +yyreduce: + /* yyn is the number of a rule to reduce with. */ + yylen = yyr2[yyn]; + + /* If YYLEN is nonzero, implement the default value of the action: + `$$ = $1'. + + Otherwise, the following line sets YYVAL to garbage. + This behavior is undocumented and Bison + users should not rely upon it. Assigning to YYVAL + unconditionally makes the parser a bit smaller, and it avoids a + GCC warning that YYVAL may be used uninitialized. */ + yyval = yyvsp[1-yylen]; + + + YY_REDUCE_PRINT (yyn); + switch (yyn) + { + case 2: +#line 171 "rx-parse.y" + { as_bad (_("Unknown opcode: %s"), rx_init_start); } + break; + + case 3: +#line 176 "rx-parse.y" + { B1 (0x00); } + break; + + case 4: +#line 179 "rx-parse.y" + { B1 (0x01); } + break; + + case 5: +#line 182 "rx-parse.y" + { B1 (0x02); } + break; + + case 6: +#line 185 "rx-parse.y" + { B1 (0x03); } + break; + + case 7: +#line 190 "rx-parse.y" + { if (rx_disp3op ((yyvsp[(2) - (2)].exp))) + { B1 (0x08); rx_disp3 ((yyvsp[(2) - (2)].exp), 5); } + else if (rx_intop ((yyvsp[(2) - (2)].exp), 8)) + { B1 (0x2e); PC1 ((yyvsp[(2) - (2)].exp)); } + else if (rx_intop ((yyvsp[(2) - (2)].exp), 16)) + { B1 (0x38); PC2 ((yyvsp[(2) - (2)].exp)); } + else if (rx_intop ((yyvsp[(2) - (2)].exp), 24)) + { B1 (0x04); PC3 ((yyvsp[(2) - (2)].exp)); } + else + { rx_relax (RX_RELAX_BRANCH, 0); + rx_linkrelax_branch (); + /* We'll convert this to a longer one later if needed. */ + B1 (0x08); rx_disp3 ((yyvsp[(2) - (2)].exp), 5); } } + break; + + case 8: +#line 205 "rx-parse.y" + { B1 (0x04); PC3 ((yyvsp[(3) - (3)].exp)); } + break; + + case 9: +#line 208 "rx-parse.y" + { B1 (0x08); rx_disp3 ((yyvsp[(3) - (3)].exp), 5); } + break; + + case 10: +#line 213 "rx-parse.y" + { if (rx_intop ((yyvsp[(2) - (2)].exp), 16)) + { B1 (0x39); PC2 ((yyvsp[(2) - (2)].exp)); } + else if (rx_intop ((yyvsp[(2) - (2)].exp), 24)) + { B1 (0x05); PC3 ((yyvsp[(2) - (2)].exp)); } + else + { rx_relax (RX_RELAX_BRANCH, 0); + rx_linkrelax_branch (); + B1 (0x39); PC2 ((yyvsp[(2) - (2)].exp)); } } + break; + + case 11: +#line 222 "rx-parse.y" + { B1 (0x05), PC3 ((yyvsp[(3) - (3)].exp)); } + break; + + case 12: +#line 227 "rx-parse.y" + { if ((yyvsp[(1) - (3)].regno) == COND_EQ || (yyvsp[(1) - (3)].regno) == COND_NE) + { B1 ((yyvsp[(1) - (3)].regno) == COND_EQ ? 0x10 : 0x18); rx_disp3 ((yyvsp[(3) - (3)].exp), 5); } + else + as_bad (_("Only BEQ and BNE may have .S")); } + break; + + case 13: +#line 235 "rx-parse.y" + { B1 (0x20); F ((yyvsp[(1) - (3)].regno), 4, 4); PC1 ((yyvsp[(3) - (3)].exp)); } + break; + + case 14: +#line 238 "rx-parse.y" + { B1 (0x2e), PC1 ((yyvsp[(3) - (3)].exp)); } + break; + + case 15: +#line 243 "rx-parse.y" + { B1 (0x38), PC2 ((yyvsp[(3) - (3)].exp)); } + break; + + case 16: +#line 245 "rx-parse.y" + { B1 (0x39), PC2 ((yyvsp[(3) - (3)].exp)); } + break; + + case 17: +#line 247 "rx-parse.y" + { if ((yyvsp[(1) - (3)].regno) == COND_EQ || (yyvsp[(1) - (3)].regno) == COND_NE) + { B1 ((yyvsp[(1) - (3)].regno) == COND_EQ ? 0x3a : 0x3b); PC2 ((yyvsp[(3) - (3)].exp)); } + else + as_bad (_("Only BEQ and BNE may have .W")); } + break; + + case 18: +#line 252 "rx-parse.y" + { if ((yyvsp[(1) - (2)].regno) == COND_EQ || (yyvsp[(1) - (2)].regno) == COND_NE) + { + rx_relax (RX_RELAX_BRANCH, 0); + rx_linkrelax_branch (); + B1 ((yyvsp[(1) - (2)].regno) == COND_EQ ? 0x10 : 0x18); rx_disp3 ((yyvsp[(2) - (2)].exp), 5); + } + else + { + rx_relax (RX_RELAX_BRANCH, 0); + /* This is because we might turn it into a + jump-over-jump long branch. */ + rx_linkrelax_branch (); + B1 (0x20); F ((yyvsp[(1) - (2)].regno), 4, 4); PC1 ((yyvsp[(2) - (2)].exp)); + } } + break; + + case 19: +#line 271 "rx-parse.y" + { if ((yyvsp[(8) - (9)].regno) <= 7 && rx_uintop ((yyvsp[(4) - (9)].exp), 8) && rx_disp5op0 (&(yyvsp[(6) - (9)].exp), BSIZE)) + { B2 (0x3c, 0); rx_field5s2 ((yyvsp[(6) - (9)].exp)); F ((yyvsp[(8) - (9)].regno), 9, 3); O1 ((yyvsp[(4) - (9)].exp)); } + else + { B2 (0xf8, 0x04); F ((yyvsp[(8) - (9)].regno), 8, 4); DSP ((yyvsp[(6) - (9)].exp), 6, BSIZE); O1 ((yyvsp[(4) - (9)].exp)); + if ((yyvsp[(4) - (9)].exp).X_op != O_constant && (yyvsp[(4) - (9)].exp).X_op != O_big) rx_linkrelax_imm (12); } } + break; + + case 20: +#line 278 "rx-parse.y" + { if ((yyvsp[(8) - (9)].regno) <= 7 && rx_uintop ((yyvsp[(4) - (9)].exp), 8) && rx_disp5op0 (&(yyvsp[(6) - (9)].exp), WSIZE)) + { B2 (0x3d, 0); rx_field5s2 ((yyvsp[(6) - (9)].exp)); F ((yyvsp[(8) - (9)].regno), 9, 3); O1 ((yyvsp[(4) - (9)].exp)); } + else + { B2 (0xf8, 0x01); F ((yyvsp[(8) - (9)].regno), 8, 4); DSP ((yyvsp[(6) - (9)].exp), 6, WSIZE); IMM ((yyvsp[(4) - (9)].exp), 12); } } + break; + + case 21: +#line 284 "rx-parse.y" + { if ((yyvsp[(8) - (9)].regno) <= 7 && rx_uintop ((yyvsp[(4) - (9)].exp), 8) && rx_disp5op0 (&(yyvsp[(6) - (9)].exp), LSIZE)) + { B2 (0x3e, 0); rx_field5s2 ((yyvsp[(6) - (9)].exp)); F ((yyvsp[(8) - (9)].regno), 9, 3); O1 ((yyvsp[(4) - (9)].exp)); } + else + { B2 (0xf8, 0x02); F ((yyvsp[(8) - (9)].regno), 8, 4); DSP ((yyvsp[(6) - (9)].exp), 6, LSIZE); IMM ((yyvsp[(4) - (9)].exp), 12); } } + break; + + case 22: +#line 292 "rx-parse.y" + { B2 (0x3f, 0); F ((yyvsp[(5) - (7)].regno), 8, 4); F ((yyvsp[(7) - (7)].regno), 12, 4); rtsd_immediate ((yyvsp[(3) - (7)].exp)); + if ((yyvsp[(5) - (7)].regno) == 0) + rx_error (_("RTSD cannot pop R0")); + if ((yyvsp[(5) - (7)].regno) > (yyvsp[(7) - (7)].regno)) + rx_error (_("RTSD first reg must be <= second reg")); } + break; + + case 23: +#line 301 "rx-parse.y" + { B2 (0x47, 0); F ((yyvsp[(2) - (4)].regno), 8, 4); F ((yyvsp[(4) - (4)].regno), 12, 4); } + break; + + case 24: +#line 306 "rx-parse.y" + { B2 (0x44, 0); F ((yyvsp[(4) - (8)].regno), 8, 4); F ((yyvsp[(8) - (8)].regno), 12, 4); DSP ((yyvsp[(2) - (8)].exp), 6, BSIZE); } + break; + + case 25: +#line 309 "rx-parse.y" + { B3 (MEMEX, 0x04, 0); F ((yyvsp[(6) - (8)].regno), 8, 2); F ((yyvsp[(4) - (8)].regno), 16, 4); F ((yyvsp[(8) - (8)].regno), 20, 4); DSP ((yyvsp[(2) - (8)].exp), 14, sizemap[(yyvsp[(6) - (8)].regno)]); } + break; + + case 26: +#line 314 "rx-parse.y" + { B2 (0x5b, 0x00); F ((yyvsp[(2) - (5)].regno), 5, 1); F ((yyvsp[(3) - (5)].regno), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); } + break; + + case 27: +#line 319 "rx-parse.y" + { B2 (0x58, 0x00); F ((yyvsp[(2) - (7)].regno), 5, 1); F ((yyvsp[(4) - (7)].regno), 8, 4); F ((yyvsp[(7) - (7)].regno), 12, 4); } + break; + + case 28: +#line 322 "rx-parse.y" + { if ((yyvsp[(5) - (8)].regno) <= 7 && (yyvsp[(8) - (8)].regno) <= 7 && rx_disp5op (&(yyvsp[(3) - (8)].exp), (yyvsp[(2) - (8)].regno))) + { B2 (0xb0, 0); F ((yyvsp[(2) - (8)].regno), 4, 1); F ((yyvsp[(5) - (8)].regno), 9, 3); F ((yyvsp[(8) - (8)].regno), 13, 3); rx_field5s ((yyvsp[(3) - (8)].exp)); } + else + { B2 (0x58, 0x00); F ((yyvsp[(2) - (8)].regno), 5, 1); F ((yyvsp[(5) - (8)].regno), 8, 4); F ((yyvsp[(8) - (8)].regno), 12, 4); DSP ((yyvsp[(3) - (8)].exp), 6, (yyvsp[(2) - (8)].regno)); } } + break; + + case 29: +#line 330 "rx-parse.y" + { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4)) + { B2 (0x60, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); } + else + /* This is really an add, but we negate the immediate. */ + { B2 (0x70, 0); F ((yyvsp[(5) - (5)].regno), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); NIMM ((yyvsp[(3) - (5)].exp), 6); } } + break; + + case 30: +#line 337 "rx-parse.y" + { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4)) + { B2 (0x61, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); } + else if (rx_uintop ((yyvsp[(3) - (5)].exp), 8)) + { B2 (0x75, 0x50); F ((yyvsp[(5) - (5)].regno), 12, 4); UO1 ((yyvsp[(3) - (5)].exp)); } + else + { B2 (0x74, 0x00); F ((yyvsp[(5) - (5)].regno), 12, 4); IMM ((yyvsp[(3) - (5)].exp), 6); } } + break; + + case 31: +#line 345 "rx-parse.y" + { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4)) + { B2 (0x62, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); } + else + { B2 (0x70, 0); F ((yyvsp[(5) - (5)].regno), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); IMM ((yyvsp[(3) - (5)].exp), 6); } } + break; + + case 32: +#line 351 "rx-parse.y" + { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4)) + { B2 (0x63, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); } + else + { B2 (0x74, 0x10); F ((yyvsp[(5) - (5)].regno), 12, 4); IMM ((yyvsp[(3) - (5)].exp), 6); } } + break; + + case 33: +#line 357 "rx-parse.y" + { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4)) + { B2 (0x64, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); } + else + { B2 (0x74, 0x20); F ((yyvsp[(5) - (5)].regno), 12, 4); IMM ((yyvsp[(3) - (5)].exp), 6); } } + break; + + case 34: +#line 363 "rx-parse.y" + { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4)) + { B2 (0x65, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); } + else + { B2 (0x74, 0x30); F ((yyvsp[(5) - (5)].regno), 12, 4); IMM ((yyvsp[(3) - (5)].exp), 6); } } + break; + + case 35: +#line 369 "rx-parse.y" + { if (rx_uintop ((yyvsp[(4) - (6)].exp), 4)) + { B2 (0x66, 0); FE ((yyvsp[(4) - (6)].exp), 8, 4); F ((yyvsp[(6) - (6)].regno), 12, 4); } + else if (rx_uintop ((yyvsp[(4) - (6)].exp), 8)) + { B2 (0x75, 0x40); F ((yyvsp[(6) - (6)].regno), 12, 4); UO1 ((yyvsp[(4) - (6)].exp)); } + else + { B2 (0xfb, 0x02); F ((yyvsp[(6) - (6)].regno), 8, 4); IMM ((yyvsp[(4) - (6)].exp), 12); } } + break; + + case 36: +#line 377 "rx-parse.y" + { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4)) + { B2 (0x66, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); } + else if (rx_uintop ((yyvsp[(3) - (5)].exp), 8)) + { B2 (0x75, 0x40); F ((yyvsp[(5) - (5)].regno), 12, 4); UO1 ((yyvsp[(3) - (5)].exp)); } + else + { B2 (0xfb, 0x02); F ((yyvsp[(5) - (5)].regno), 8, 4); IMM ((yyvsp[(3) - (5)].exp), 12); } } + break; + + case 37: +#line 387 "rx-parse.y" + { B1 (0x67); rtsd_immediate ((yyvsp[(3) - (3)].exp)); } + break; + + case 38: +#line 391 "rx-parse.y" + { sub_op = 0; } + break; + + case 40: +#line 392 "rx-parse.y" + { sub_op = 1; } + break; + + case 42: +#line 393 "rx-parse.y" + { sub_op = 2; } + break; + + case 44: +#line 398 "rx-parse.y" + { + if ((yyvsp[(2) - (4)].regno) == (yyvsp[(4) - (4)].regno)) + { B2 (0x7e, 0x80); F (LSIZE, 10, 2); F ((yyvsp[(2) - (4)].regno), 12, 4); } + else + { B2 (0x6e, 0); F ((yyvsp[(2) - (4)].regno), 8, 4); F ((yyvsp[(4) - (4)].regno), 12, 4); } + if ((yyvsp[(2) - (4)].regno) == 0) + rx_error (_("PUSHM cannot push R0")); + if ((yyvsp[(2) - (4)].regno) > (yyvsp[(4) - (4)].regno)) + rx_error (_("PUSHM first reg must be <= second reg")); } + break; + + case 45: +#line 411 "rx-parse.y" + { + if ((yyvsp[(2) - (4)].regno) == (yyvsp[(4) - (4)].regno)) + { B2 (0x7e, 0xb0); F ((yyvsp[(2) - (4)].regno), 12, 4); } + else + { B2 (0x6f, 0); F ((yyvsp[(2) - (4)].regno), 8, 4); F ((yyvsp[(4) - (4)].regno), 12, 4); } + if ((yyvsp[(2) - (4)].regno) == 0) + rx_error (_("POPM cannot pop R0")); + if ((yyvsp[(2) - (4)].regno) > (yyvsp[(4) - (4)].regno)) + rx_error (_("POPM first reg must be <= second reg")); } + break; + + case 46: +#line 424 "rx-parse.y" + { B2 (0x70, 0x00); F ((yyvsp[(5) - (7)].regno), 8, 4); F ((yyvsp[(7) - (7)].regno), 12, 4); IMM ((yyvsp[(3) - (7)].exp), 6); } + break; + + case 47: +#line 429 "rx-parse.y" + { B2(0x75, 0x60), UO1 ((yyvsp[(3) - (3)].exp)); } + break; + + case 48: +#line 434 "rx-parse.y" + { B2 (0x78, 0); FE ((yyvsp[(3) - (5)].exp), 7, 5); F ((yyvsp[(5) - (5)].regno), 12, 4); } + break; + + case 49: +#line 436 "rx-parse.y" + { B2 (0x7a, 0); FE ((yyvsp[(3) - (5)].exp), 7, 5); F ((yyvsp[(5) - (5)].regno), 12, 4); } + break; + + case 50: +#line 441 "rx-parse.y" + { B2 (0x7c, 0x00); FE ((yyvsp[(3) - (5)].exp), 7, 5); F ((yyvsp[(5) - (5)].regno), 12, 4); } + break; + + case 51: +#line 446 "rx-parse.y" + { B2 (0x7e, 0x30); F ((yyvsp[(2) - (2)].regno), 12, 4); } + break; + + case 52: +#line 448 "rx-parse.y" + { B2 (0x7e, 0x40); F ((yyvsp[(2) - (2)].regno), 12, 4); } + break; + + case 53: +#line 450 "rx-parse.y" + { B2 (0x7e, 0x50); F ((yyvsp[(2) - (2)].regno), 12, 4); } + break; + + case 54: +#line 455 "rx-parse.y" + { B2 (0x7e, 0x80); F ((yyvsp[(2) - (3)].regno), 10, 2); F ((yyvsp[(3) - (3)].regno), 12, 4); } + break; + + case 55: +#line 460 "rx-parse.y" + { B2 (0x7e, 0xb0); F ((yyvsp[(2) - (2)].regno), 12, 4); } + break; + + case 56: +#line 465 "rx-parse.y" + { if ((yyvsp[(2) - (2)].regno) < 16) + { B2 (0x7e, 0xc0); F ((yyvsp[(2) - (2)].regno), 12, 4); } + else + as_bad (_("PUSHC can only push the first 16 control registers")); } + break; + + case 57: +#line 473 "rx-parse.y" + { if ((yyvsp[(2) - (2)].regno) < 16) + { B2 (0x7e, 0xe0); F ((yyvsp[(2) - (2)].regno), 12, 4); } + else + as_bad (_("POPC can only pop the first 16 control registers")); } + break; + + case 58: +#line 481 "rx-parse.y" + { B2 (0x7f, 0xa0); F ((yyvsp[(2) - (2)].regno), 12, 4); } + break; + + case 59: +#line 483 "rx-parse.y" + { B2 (0x7f, 0xb0); F ((yyvsp[(2) - (2)].regno), 12, 4); } + break; + + case 60: +#line 488 "rx-parse.y" + { B2 (0x7f, 0x00); F ((yyvsp[(2) - (2)].regno), 12, 4); } + break; + + case 61: +#line 490 "rx-parse.y" + { B2 (0x7f, 0x10); F ((yyvsp[(2) - (2)].regno), 12, 4); } + break; + + case 62: +#line 492 "rx-parse.y" + { B2 (0x7f, 0x40); F ((yyvsp[(3) - (3)].regno), 12, 4); } + break; + + case 63: +#line 494 "rx-parse.y" + { B2 (0x7f, 0x50); F ((yyvsp[(3) - (3)].regno), 12, 4); } + break; + + case 64: +#line 499 "rx-parse.y" + { B2 (0x7f, 0x83); } + break; + + case 65: +#line 501 "rx-parse.y" + { B2 (0x7f, 0x87); } + break; + + case 66: +#line 503 "rx-parse.y" + { B2 (0x7f, 0x8b); } + break; + + case 67: +#line 505 "rx-parse.y" + { B2 (0x7f, 0x8f); } + break; + + case 68: +#line 510 "rx-parse.y" + { B2 (0x7f, 0x80); F ((yyvsp[(2) - (2)].regno), 14, 2); } + break; + + case 69: +#line 512 "rx-parse.y" + { B2 (0x7f, 0x84); F ((yyvsp[(2) - (2)].regno), 14, 2); } + break; + + case 70: +#line 514 "rx-parse.y" + { B2 (0x7f, 0x88); F ((yyvsp[(2) - (2)].regno), 14, 2); } + break; + + case 71: +#line 519 "rx-parse.y" + { B2 (0x7f, 0x8c); F ((yyvsp[(2) - (2)].regno), 14, 2); } + break; + + case 72: +#line 524 "rx-parse.y" + { B2 (0x7f, 0x94); } + break; + + case 73: +#line 526 "rx-parse.y" + { B2 (0x7f, 0x95); } + break; + + case 74: +#line 528 "rx-parse.y" + { B2 (0x7f, 0x96); } + break; + + case 75: +#line 530 "rx-parse.y" + { B2 (0x7f, 0x93); } + break; + + case 76: +#line 535 "rx-parse.y" + { B3 (0x75, 0x70, 0x00); FE ((yyvsp[(3) - (3)].exp), 20, 4); } + break; + + case 77: +#line 541 "rx-parse.y" + { if ((yyvsp[(3) - (8)].regno) <= 7 && (yyvsp[(7) - (8)].regno) <= 7 && rx_disp5op (&(yyvsp[(5) - (8)].exp), (yyvsp[(2) - (8)].regno))) + { B2 (0x80, 0); F ((yyvsp[(2) - (8)].regno), 2, 2); F ((yyvsp[(7) - (8)].regno), 9, 3); F ((yyvsp[(3) - (8)].regno), 13, 3); rx_field5s ((yyvsp[(5) - (8)].exp)); } + else + { B2 (0xc3, 0x00); F ((yyvsp[(2) - (8)].regno), 2, 2); F ((yyvsp[(7) - (8)].regno), 8, 4); F ((yyvsp[(3) - (8)].regno), 12, 4); DSP ((yyvsp[(5) - (8)].exp), 4, (yyvsp[(2) - (8)].regno)); }} + break; + + case 78: +#line 549 "rx-parse.y" + { if ((yyvsp[(5) - (8)].regno) <= 7 && (yyvsp[(8) - (8)].regno) <= 7 && rx_disp5op (&(yyvsp[(3) - (8)].exp), (yyvsp[(2) - (8)].regno))) + { B2 (0x88, 0); F ((yyvsp[(2) - (8)].regno), 2, 2); F ((yyvsp[(5) - (8)].regno), 9, 3); F ((yyvsp[(8) - (8)].regno), 13, 3); rx_field5s ((yyvsp[(3) - (8)].exp)); } + else + { B2 (0xcc, 0x00); F ((yyvsp[(2) - (8)].regno), 2, 2); F ((yyvsp[(5) - (8)].regno), 8, 4); F ((yyvsp[(8) - (8)].regno), 12, 4); DSP ((yyvsp[(3) - (8)].exp), 6, (yyvsp[(2) - (8)].regno)); } } + break; + + case 79: +#line 563 "rx-parse.y" + { B2 (0xc3, 0x00); F ((yyvsp[(2) - (7)].regno), 2, 2); F ((yyvsp[(6) - (7)].regno), 8, 4); F ((yyvsp[(3) - (7)].regno), 12, 4); } + break; + + case 80: +#line 568 "rx-parse.y" + { B2 (0xc0, 0); F ((yyvsp[(2) - (10)].regno), 2, 2); F ((yyvsp[(4) - (10)].regno), 8, 4); F ((yyvsp[(9) - (10)].regno), 12, 4); DSP ((yyvsp[(7) - (10)].exp), 4, (yyvsp[(2) - (10)].regno)); } + break; + + case 81: +#line 573 "rx-parse.y" + { B2 (0xc0, 0x00); F ((yyvsp[(2) - (11)].regno), 2, 2); F ((yyvsp[(5) - (11)].regno), 8, 4); F ((yyvsp[(10) - (11)].regno), 12, 4); DSP ((yyvsp[(3) - (11)].exp), 6, (yyvsp[(2) - (11)].regno)); DSP ((yyvsp[(8) - (11)].exp), 4, (yyvsp[(2) - (11)].regno)); } + break; + + case 82: +#line 578 "rx-parse.y" + { B2 (0xcf, 0x00); F ((yyvsp[(2) - (5)].regno), 2, 2); F ((yyvsp[(3) - (5)].regno), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); } + break; + + case 83: +#line 583 "rx-parse.y" + { B2 (0xcc, 0x00); F ((yyvsp[(2) - (7)].regno), 2, 2); F ((yyvsp[(4) - (7)].regno), 8, 4); F ((yyvsp[(7) - (7)].regno), 12, 4); } + break; + + case 84: +#line 588 "rx-parse.y" + { B2 (0xf0, 0x00); F ((yyvsp[(7) - (9)].regno), 8, 4); FE ((yyvsp[(3) - (9)].exp), 13, 3); DSP ((yyvsp[(5) - (9)].exp), 6, BSIZE); } + break; + + case 85: +#line 590 "rx-parse.y" + { B2 (0xf0, 0x08); F ((yyvsp[(7) - (9)].regno), 8, 4); FE ((yyvsp[(3) - (9)].exp), 13, 3); DSP ((yyvsp[(5) - (9)].exp), 6, BSIZE); } + break; + + case 86: +#line 592 "rx-parse.y" + { B2 (0xf4, 0x00); F ((yyvsp[(7) - (9)].regno), 8, 4); FE ((yyvsp[(3) - (9)].exp), 13, 3); DSP ((yyvsp[(5) - (9)].exp), 6, BSIZE); } + break; + + case 87: +#line 597 "rx-parse.y" + { B2 (0xf4, 0x08); F ((yyvsp[(2) - (6)].regno), 14, 2); F ((yyvsp[(5) - (6)].regno), 8, 4); DSP ((yyvsp[(3) - (6)].exp), 6, (yyvsp[(2) - (6)].regno)); } + break; + + case 88: +#line 601 "rx-parse.y" + { sub_op = 0; } + break; + + case 90: +#line 602 "rx-parse.y" + { sub_op = 1; sub_op2 = 1; } + break; + + case 92: +#line 603 "rx-parse.y" + { sub_op = 2; } + break; + + case 94: +#line 604 "rx-parse.y" + { sub_op = 3; sub_op2 = 2; } + break; + + case 96: +#line 605 "rx-parse.y" + { sub_op = 4; } + break; + + case 98: +#line 606 "rx-parse.y" + { sub_op = 5; } + break; + + case 100: +#line 607 "rx-parse.y" + { sub_op = 6; } + break; + + case 102: +#line 608 "rx-parse.y" + { sub_op = 7; } + break; + + case 104: +#line 609 "rx-parse.y" + { sub_op = 8; } + break; + + case 106: +#line 610 "rx-parse.y" + { sub_op = 9; } + break; + + case 108: +#line 611 "rx-parse.y" + { sub_op = 12; } + break; + + case 110: +#line 612 "rx-parse.y" + { sub_op = 13; } + break; + + case 112: +#line 613 "rx-parse.y" + { sub_op = 14; sub_op2 = 0; } + break; + + case 114: +#line 614 "rx-parse.y" + { sub_op = 14; } + break; + + case 116: +#line 615 "rx-parse.y" + { sub_op = 15; } + break; + + case 118: +#line 619 "rx-parse.y" + { sub_op = 6; } + break; + + case 120: +#line 620 "rx-parse.y" + { sub_op = 7; } + break; + + case 122: +#line 621 "rx-parse.y" + { sub_op = 16; } + break; + + case 124: +#line 622 "rx-parse.y" + { sub_op = 17; } + break; + + case 126: +#line 627 "rx-parse.y" + { id24 (1, 0x63, 0x00); F ((yyvsp[(4) - (4)].regno), 16, 4); F ((yyvsp[(2) - (4)].regno), 20, 4); } + break; + + case 127: +#line 629 "rx-parse.y" + { id24 (1, 0x67, 0x00); F ((yyvsp[(4) - (4)].regno), 16, 4); F ((yyvsp[(2) - (4)].regno), 20, 4); } + break; + + case 128: +#line 631 "rx-parse.y" + { id24 (1, 0x6b, 0x00); F ((yyvsp[(4) - (4)].regno), 16, 4); F ((yyvsp[(2) - (4)].regno), 20, 4); } + break; + + case 129: +#line 633 "rx-parse.y" + { id24 (1, 0x6f, 0x00); F ((yyvsp[(4) - (4)].regno), 16, 4); F ((yyvsp[(2) - (4)].regno), 20, 4); } + break; + + case 130: +#line 636 "rx-parse.y" + { id24 (1, 0x60, 0x00); F ((yyvsp[(6) - (8)].regno), 16, 4); F ((yyvsp[(2) - (8)].regno), 20, 4); DSP ((yyvsp[(4) - (8)].exp), 14, BSIZE); } + break; + + case 131: +#line 638 "rx-parse.y" + { id24 (1, 0x64, 0x00); F ((yyvsp[(6) - (8)].regno), 16, 4); F ((yyvsp[(2) - (8)].regno), 20, 4); DSP ((yyvsp[(4) - (8)].exp), 14, BSIZE); } + break; + + case 132: +#line 640 "rx-parse.y" + { id24 (1, 0x68, 0x00); F ((yyvsp[(6) - (8)].regno), 16, 4); F ((yyvsp[(2) - (8)].regno), 20, 4); DSP ((yyvsp[(4) - (8)].exp), 14, BSIZE); } + break; + + case 133: +#line 642 "rx-parse.y" + { id24 (1, 0x6c, 0x00); F ((yyvsp[(6) - (8)].regno), 16, 4); F ((yyvsp[(2) - (8)].regno), 20, 4); DSP ((yyvsp[(4) - (8)].exp), 14, BSIZE); } + break; + + case 134: +#line 646 "rx-parse.y" + { sub_op = 0; } + break; + + case 136: +#line 647 "rx-parse.y" + { sub_op = 1; } + break; + + case 138: +#line 648 "rx-parse.y" + { sub_op = 2; } + break; + + case 140: +#line 649 "rx-parse.y" + { sub_op = 3; } + break; + + case 142: +#line 650 "rx-parse.y" + { sub_op = 4; } + break; + + case 144: +#line 651 "rx-parse.y" + { sub_op = 5; } + break; + + case 146: +#line 652 "rx-parse.y" + { sub_op = 6; } + break; + + case 148: +#line 657 "rx-parse.y" + { id24 (1, 0xdb, 0x00); F ((yyvsp[(1) - (3)].regno), 20, 4); F ((yyvsp[(3) - (3)].regno), 16, 4); } + break; + + case 149: +#line 659 "rx-parse.y" + { id24 (1, 0xd0, 0x00); F ((yyvsp[(1) - (6)].regno), 20, 4); F ((yyvsp[(2) - (6)].regno), 12, 2); F ((yyvsp[(5) - (6)].regno), 16, 4); DSP ((yyvsp[(3) - (6)].exp), 14, (yyvsp[(2) - (6)].regno)); } + break; + + case 150: +#line 664 "rx-parse.y" + { id24 (1, 0xe0, 0x00); F ((yyvsp[(1) - (9)].regno), 20, 4); FE ((yyvsp[(3) - (9)].exp), 11, 3); + F ((yyvsp[(7) - (9)].regno), 16, 4); DSP ((yyvsp[(5) - (9)].exp), 14, BSIZE); } + break; + + case 151: +#line 670 "rx-parse.y" + { id24 (1, 0xe0, 0x0f); FE ((yyvsp[(3) - (9)].exp), 11, 3); F ((yyvsp[(7) - (9)].regno), 16, 4); + DSP ((yyvsp[(5) - (9)].exp), 14, BSIZE); } + break; + + case 152: +#line 676 "rx-parse.y" + { id24 (2, 0x00, 0x00); F ((yyvsp[(2) - (4)].regno), 16, 4); F ((yyvsp[(4) - (4)].regno), 20, 4); } + break; + + case 153: +#line 678 "rx-parse.y" + { id24 (2, 0x01, 0x00); F ((yyvsp[(2) - (4)].regno), 16, 4); F ((yyvsp[(4) - (4)].regno), 20, 4); } + break; + + case 154: +#line 680 "rx-parse.y" + { id24 (2, 0x04, 0x00); F ((yyvsp[(2) - (4)].regno), 16, 4); F ((yyvsp[(4) - (4)].regno), 20, 4); } + break; + + case 155: +#line 682 "rx-parse.y" + { id24 (2, 0x05, 0x00); F ((yyvsp[(2) - (4)].regno), 16, 4); F ((yyvsp[(4) - (4)].regno), 20, 4); } + break; + + case 156: +#line 688 "rx-parse.y" + { id24 (2, 0x17, 0x00); F ((yyvsp[(2) - (2)].regno), 20, 4); } + break; + + case 157: +#line 690 "rx-parse.y" + { id24 (2, 0x17, 0x10); F ((yyvsp[(2) - (2)].regno), 20, 4); } + break; + + case 158: +#line 692 "rx-parse.y" + { id24 (2, 0x1f, 0x00); F ((yyvsp[(2) - (2)].regno), 20, 4); } + break; + + case 159: +#line 694 "rx-parse.y" + { id24 (2, 0x1f, 0x20); F ((yyvsp[(2) - (2)].regno), 20, 4); } + break; + + case 160: +#line 696 "rx-parse.y" + { id24 (2, 0x1f, 0x10); F ((yyvsp[(2) - (2)].regno), 20, 4); } + break; + + case 161: +#line 699 "rx-parse.y" + { id24 (2, 0x18, 0x00); + if (rx_uintop ((yyvsp[(3) - (3)].exp), 4) && (yyvsp[(3) - (3)].exp).X_add_number == 1) + ; + else if (rx_uintop ((yyvsp[(3) - (3)].exp), 4) && (yyvsp[(3) - (3)].exp).X_add_number == 2) + F (1, 19, 1); + else + as_bad (_("RACW expects #1 or #2"));} + break; + + case 162: +#line 710 "rx-parse.y" + { id24 (2, 0x20, 0); F ((yyvsp[(2) - (8)].regno), 14, 2); F ((yyvsp[(6) - (8)].regno), 16, 4); F ((yyvsp[(3) - (8)].regno), 20, 4); } + break; + + case 163: +#line 712 "rx-parse.y" + { id24 (2, 0x24, 0); F ((yyvsp[(2) - (8)].regno), 14, 2); F ((yyvsp[(7) - (8)].regno), 16, 4); F ((yyvsp[(3) - (8)].regno), 20, 4); } + break; + + case 164: +#line 717 "rx-parse.y" + { id24 (2, 0x28, 0); F ((yyvsp[(2) - (8)].regno), 14, 2); F ((yyvsp[(4) - (8)].regno), 16, 4); F ((yyvsp[(8) - (8)].regno), 20, 4); } + break; + + case 165: +#line 719 "rx-parse.y" + { id24 (2, 0x2c, 0); F ((yyvsp[(2) - (8)].regno), 14, 2); F ((yyvsp[(5) - (8)].regno), 16, 4); F ((yyvsp[(8) - (8)].regno), 20, 4); } + break; + + case 166: +#line 724 "rx-parse.y" + { id24 (2, 0x38, 0); F ((yyvsp[(2) - (8)].regno), 15, 1); F ((yyvsp[(4) - (8)].regno), 16, 4); F ((yyvsp[(8) - (8)].regno), 20, 4); } + break; + + case 167: +#line 726 "rx-parse.y" + { id24 (2, 0x3c, 0); F ((yyvsp[(2) - (8)].regno), 15, 1); F ((yyvsp[(5) - (8)].regno), 16, 4); F ((yyvsp[(8) - (8)].regno), 20, 4); } + break; + + case 168: +#line 730 "rx-parse.y" + { sub_op = 6; } + break; + + case 170: +#line 731 "rx-parse.y" + { sub_op = 4; } + break; + + case 172: +#line 732 "rx-parse.y" + { sub_op = 5; } + break; + + case 174: +#line 733 "rx-parse.y" + { sub_op = 7; } + break; + + case 176: +#line 738 "rx-parse.y" + { id24 (2, 0x68, 0x00); F ((yyvsp[(4) - (4)].regno) % 16, 20, 4); F ((yyvsp[(4) - (4)].regno) / 16, 15, 1); + F ((yyvsp[(2) - (4)].regno), 16, 4); } + break; + + case 177: +#line 744 "rx-parse.y" + { id24 (2, 0x6a, 0); F ((yyvsp[(2) - (4)].regno), 15, 5); F ((yyvsp[(4) - (4)].regno), 20, 4); } + break; + + case 178: +#line 749 "rx-parse.y" + { id24 (2, 0x6e, 0); FE ((yyvsp[(3) - (5)].exp), 15, 5); F ((yyvsp[(5) - (5)].regno), 20, 4); } + break; + + case 179: +#line 751 "rx-parse.y" + { id24 (2, 0x6c, 0); FE ((yyvsp[(3) - (5)].exp), 15, 5); F ((yyvsp[(5) - (5)].regno), 20, 4); } + break; + + case 180: +#line 756 "rx-parse.y" + { id24 (2, 0x73, 0x00); F ((yyvsp[(5) - (5)].regno), 19, 5); IMM ((yyvsp[(3) - (5)].exp), 12); } + break; + + case 181: +#line 761 "rx-parse.y" + { id24 (2, 0xe0, 0x00); F ((yyvsp[(1) - (5)].regno), 16, 4); FE ((yyvsp[(3) - (5)].exp), 11, 5); + F ((yyvsp[(5) - (5)].regno), 20, 4); } + break; + + case 182: +#line 767 "rx-parse.y" + { id24 (2, 0xe0, 0xf0); FE ((yyvsp[(3) - (5)].exp), 11, 5); F ((yyvsp[(5) - (5)].regno), 20, 4); } + break; + + case 183: +#line 772 "rx-parse.y" + { id24 (3, 0x00, 0); F ((yyvsp[(2) - (9)].regno), 10, 2); F ((yyvsp[(6) - (9)].regno), 12, 4); F ((yyvsp[(8) - (9)].regno), 16, 4); F ((yyvsp[(3) - (9)].regno), 20, 4); } + break; + + case 184: +#line 775 "rx-parse.y" + { id24 (3, 0x40, 0); F ((yyvsp[(2) - (9)].regno), 10, 2); F ((yyvsp[(4) - (9)].regno), 12, 4); F ((yyvsp[(6) - (9)].regno), 16, 4); F ((yyvsp[(9) - (9)].regno), 20, 4); } + break; + + case 185: +#line 778 "rx-parse.y" + { id24 (3, 0xc0, 0); F ((yyvsp[(2) - (9)].regno), 10, 2); F ((yyvsp[(4) - (9)].regno), 12, 4); F ((yyvsp[(6) - (9)].regno), 16, 4); F ((yyvsp[(9) - (9)].regno), 20, 4); } + break; + + case 186: +#line 782 "rx-parse.y" + { sub_op = 0; } + break; + + case 188: +#line 783 "rx-parse.y" + { sub_op = 2; } + break; + + case 190: +#line 784 "rx-parse.y" + { sub_op = 3; } + break; + + case 192: +#line 785 "rx-parse.y" + { sub_op = 4; } + break; + + case 194: +#line 786 "rx-parse.y" + { sub_op = 5; } + break; + + case 196: +#line 792 "rx-parse.y" + { id24 (2, 0x70, 0x20); F ((yyvsp[(5) - (5)].regno), 20, 4); NBIMM ((yyvsp[(3) - (5)].exp), 12); } + break; + + case 197: +#line 802 "rx-parse.y" + { B2 (0x43 + (sub_op<<2), 0); F ((yyvsp[(1) - (3)].regno), 8, 4); F ((yyvsp[(3) - (3)].regno), 12, 4); } + break; + + case 198: +#line 804 "rx-parse.y" + { B2 (0x40 + (sub_op<<2), 0); F ((yyvsp[(3) - (7)].regno), 8, 4); F ((yyvsp[(7) - (7)].regno), 12, 4); DSP ((yyvsp[(1) - (7)].exp), 6, BSIZE); } + break; + + case 199: +#line 806 "rx-parse.y" + { B3 (MEMEX, sub_op<<2, 0); F ((yyvsp[(5) - (7)].regno), 8, 2); F ((yyvsp[(3) - (7)].regno), 16, 4); F ((yyvsp[(7) - (7)].regno), 20, 4); DSP ((yyvsp[(1) - (7)].exp), 14, sizemap[(yyvsp[(5) - (7)].regno)]); } + break; + + case 200: +#line 808 "rx-parse.y" + { id24 (4, sub_op<<4, 0), F ((yyvsp[(5) - (5)].regno), 12, 4), F ((yyvsp[(1) - (5)].regno), 16, 4), F ((yyvsp[(3) - (5)].regno), 20, 4); } + break; + + case 201: +#line 815 "rx-parse.y" + { id24 (1, 0x03 + (sub_op<<2), 0x00); F ((yyvsp[(1) - (3)].regno), 16, 4); F ((yyvsp[(3) - (3)].regno), 20, 4); } + break; + + case 202: +#line 817 "rx-parse.y" + { id24 (1, 0x00 + (sub_op<<2), 0x00); F ((yyvsp[(3) - (7)].regno), 16, 4); F ((yyvsp[(7) - (7)].regno), 20, 4); DSP ((yyvsp[(1) - (7)].exp), 14, BSIZE); } + break; + + case 203: +#line 819 "rx-parse.y" + { B4 (MEMEX, 0x20 + ((yyvsp[(5) - (7)].regno) << 6), 0x00 + sub_op, 0x00); + F ((yyvsp[(3) - (7)].regno), 24, 4); F ((yyvsp[(7) - (7)].regno), 28, 4); DSP ((yyvsp[(1) - (7)].exp), 14, sizemap[(yyvsp[(5) - (7)].regno)]); } + break; + + case 204: +#line 825 "rx-parse.y" + { id24 (2, 0x70, sub_op<<4); F ((yyvsp[(4) - (4)].regno), 20, 4); IMM ((yyvsp[(2) - (4)].exp), 12); } + break; + + case 208: +#line 836 "rx-parse.y" + { B2 (0x7e, sub_op2 << 4); F ((yyvsp[(1) - (1)].regno), 12, 4); } + break; + + case 209: +#line 842 "rx-parse.y" + { id24 (1, 0x03 + (sub_op<<2), 0); F ((yyvsp[(1) - (3)].regno), 16, 4); F ((yyvsp[(3) - (3)].regno), 20, 4); } + break; + + case 210: +#line 844 "rx-parse.y" + { id24 (1, 0x00 + (sub_op<<2), 0); F ((yyvsp[(3) - (7)].regno), 16, 4); F ((yyvsp[(7) - (7)].regno), 20, 4); DSP ((yyvsp[(1) - (7)].exp), 14, BSIZE); } + break; + + case 211: +#line 846 "rx-parse.y" + { B4 (MEMEX, 0x20, 0x00 + sub_op, 0); F ((yyvsp[(5) - (7)].regno), 8, 2); F ((yyvsp[(3) - (7)].regno), 24, 4); F ((yyvsp[(7) - (7)].regno), 28, 4); + DSP ((yyvsp[(1) - (7)].exp), 14, sizemap[(yyvsp[(5) - (7)].regno)]); } + break; + + case 212: +#line 853 "rx-parse.y" + { id24 (2, 0x60 + sub_op, 0); F ((yyvsp[(1) - (3)].regno), 16, 4); F ((yyvsp[(3) - (3)].regno), 20, 4); } + break; + + case 213: +#line 857 "rx-parse.y" + { B2 (0x68 + (sub_op<<1), 0); FE ((yyvsp[(2) - (4)].exp), 7, 5); F ((yyvsp[(4) - (4)].regno), 12, 4); } + break; + + case 214: +#line 859 "rx-parse.y" + { id24 (2, 0x80 + (sub_op << 5), 0); FE ((yyvsp[(2) - (6)].exp), 11, 5); F ((yyvsp[(4) - (6)].regno), 16, 4); F ((yyvsp[(6) - (6)].regno), 20, 4); } + break; + + case 216: +#line 867 "rx-parse.y" + { id24 (2, 0x72, sub_op << 4); F ((yyvsp[(4) - (4)].regno), 20, 4); O4 ((yyvsp[(2) - (4)].exp)); } + break; + + case 218: +#line 872 "rx-parse.y" + { id24 (1, 0x83 + (sub_op << 2), 0); F ((yyvsp[(1) - (3)].regno), 16, 4); F ((yyvsp[(3) - (3)].regno), 20, 4); } + break; + + case 219: +#line 874 "rx-parse.y" + { id24 (1, 0x80 + (sub_op << 2), 0); F ((yyvsp[(3) - (7)].regno), 16, 4); F ((yyvsp[(7) - (7)].regno), 20, 4); DSP ((yyvsp[(1) - (7)].exp), 14, LSIZE); } + break; + + case 220: +#line 879 "rx-parse.y" + { (yyval.exp) = zero_expr (); } + break; + + case 221: +#line 880 "rx-parse.y" + { (yyval.exp) = (yyvsp[(1) - (1)].exp); } + break; + + case 222: +#line 883 "rx-parse.y" + { need_flag = 1; } + break; + + case 223: +#line 883 "rx-parse.y" + { need_flag = 0; (yyval.regno) = (yyvsp[(2) - (2)].regno); } + break; + + case 224: +#line 888 "rx-parse.y" + { (yyval.regno) = 0; } + break; + + case 225: +#line 889 "rx-parse.y" + { (yyval.regno) = 1; } + break; + + case 226: +#line 890 "rx-parse.y" + { (yyval.regno) = 2; } + break; + + case 227: +#line 891 "rx-parse.y" + { (yyval.regno) = 2; } + break; + + case 228: +#line 892 "rx-parse.y" + { (yyval.regno) = 3; } + break; + + case 229: +#line 895 "rx-parse.y" + { (yyval.regno) = LSIZE; } + break; + + case 230: +#line 896 "rx-parse.y" + { (yyval.regno) = BSIZE; } + break; + + case 231: +#line 897 "rx-parse.y" + { (yyval.regno) = WSIZE; } + break; + + case 232: +#line 898 "rx-parse.y" + { (yyval.regno) = LSIZE; } + break; + + case 233: +#line 901 "rx-parse.y" + { (yyval.regno) = 1; } + break; + + case 234: +#line 902 "rx-parse.y" + { (yyval.regno) = 0; } + break; + + case 235: +#line 903 "rx-parse.y" + { (yyval.regno) = 1; } + break; + + case 236: +#line 906 "rx-parse.y" + {} + break; + + case 237: +#line 907 "rx-parse.y" + {} + break; + + +/* Line 1267 of yacc.c. */ +#line 3269 "rx-parse.c" + default: break; + } + YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); + + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + + *++yyvsp = yyval; + + + /* Now `shift' the result of the reduction. Determine what state + that goes to, based on the state we popped back to and the rule + number reduced by. */ + + yyn = yyr1[yyn]; + + yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; + if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yytable[yystate]; + else + yystate = yydefgoto[yyn - YYNTOKENS]; + + goto yynewstate; + + +/*------------------------------------. +| yyerrlab -- here on detecting error | +`------------------------------------*/ +yyerrlab: + /* If not already recovering from an error, report this error. */ + if (!yyerrstatus) + { + ++yynerrs; +#if ! YYERROR_VERBOSE + yyerror (YY_("syntax error")); +#else + { + YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); + if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) + { + YYSIZE_T yyalloc = 2 * yysize; + if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) + yyalloc = YYSTACK_ALLOC_MAXIMUM; + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); + yymsg = (char *) YYSTACK_ALLOC (yyalloc); + if (yymsg) + yymsg_alloc = yyalloc; + else + { + yymsg = yymsgbuf; + yymsg_alloc = sizeof yymsgbuf; + } + } + + if (0 < yysize && yysize <= yymsg_alloc) + { + (void) yysyntax_error (yymsg, yystate, yychar); + yyerror (yymsg); + } + else + { + yyerror (YY_("syntax error")); + if (yysize != 0) + goto yyexhaustedlab; + } + } +#endif + } + + + + if (yyerrstatus == 3) + { + /* If just tried and failed to reuse look-ahead token after an + error, discard it. */ + + if (yychar <= YYEOF) + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } + else + { + yydestruct ("Error: discarding", + yytoken, &yylval); + yychar = YYEMPTY; + } + } + + /* Else will try to reuse look-ahead token after shifting the error + token. */ + goto yyerrlab1; + + +/*---------------------------------------------------. +| yyerrorlab -- error raised explicitly by YYERROR. | +`---------------------------------------------------*/ +yyerrorlab: + + /* Pacify compilers like GCC when the user code never invokes + YYERROR and the label yyerrorlab therefore never appears in user + code. */ + if (/*CONSTCOND*/ 0) + goto yyerrorlab; + + /* Do not reclaim the symbols of the rule which action triggered + this YYERROR. */ + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + yystate = *yyssp; + goto yyerrlab1; + + +/*-------------------------------------------------------------. +| yyerrlab1 -- common code for both syntax error and YYERROR. | +`-------------------------------------------------------------*/ +yyerrlab1: + yyerrstatus = 3; /* Each real token shifted decrements this. */ + + for (;;) + { + yyn = yypact[yystate]; + if (yyn != YYPACT_NINF) + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } + + /* Pop the current state because it cannot handle the error token. */ + if (yyssp == yyss) + YYABORT; + + + yydestruct ("Error: popping", + yystos[yystate], yyvsp); + YYPOPSTACK (1); + yystate = *yyssp; + YY_STACK_PRINT (yyss, yyssp); + } + + if (yyn == YYFINAL) + YYACCEPT; + + *++yyvsp = yylval; + + + /* Shift the error token. */ + YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); + + yystate = yyn; + goto yynewstate; + + +/*-------------------------------------. +| yyacceptlab -- YYACCEPT comes here. | +`-------------------------------------*/ +yyacceptlab: + yyresult = 0; + goto yyreturn; + +/*-----------------------------------. +| yyabortlab -- YYABORT comes here. | +`-----------------------------------*/ +yyabortlab: + yyresult = 1; + goto yyreturn; + +#ifndef yyoverflow +/*-------------------------------------------------. +| yyexhaustedlab -- memory exhaustion comes here. | +`-------------------------------------------------*/ +yyexhaustedlab: + yyerror (YY_("memory exhausted")); + yyresult = 2; + /* Fall through. */ +#endif + +yyreturn: + if (yychar != YYEOF && yychar != YYEMPTY) + yydestruct ("Cleanup: discarding lookahead", + yytoken, &yylval); + /* Do not reclaim the symbols of the rule which action triggered + this YYABORT or YYACCEPT. */ + YYPOPSTACK (yylen); + YY_STACK_PRINT (yyss, yyssp); + while (yyssp != yyss) + { + yydestruct ("Cleanup: popping", + yystos[*yyssp], yyvsp); + YYPOPSTACK (1); + } +#ifndef yyoverflow + if (yyss != yyssa) + YYSTACK_FREE (yyss); +#endif +#if YYERROR_VERBOSE + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); +#endif + /* Make sure YYID is used. */ + return YYID (yyresult); +} + + +#line 910 "rx-parse.y" + +/* ====================================================================== */ + +static struct +{ + const char * string; + int token; + int val; +} +token_table[] = +{ + { "r0", REG, 0 }, + { "r1", REG, 1 }, + { "r2", REG, 2 }, + { "r3", REG, 3 }, + { "r4", REG, 4 }, + { "r5", REG, 5 }, + { "r6", REG, 6 }, + { "r7", REG, 7 }, + { "r8", REG, 8 }, + { "r9", REG, 9 }, + { "r10", REG, 10 }, + { "r11", REG, 11 }, + { "r12", REG, 12 }, + { "r13", REG, 13 }, + { "r14", REG, 14 }, + { "r15", REG, 15 }, + + { "psw", CREG, 0 }, + { "pc", CREG, 1 }, + { "usp", CREG, 2 }, + { "fpsw", CREG, 3 }, + /* reserved */ + /* reserved */ + /* reserved */ + { "wr", CREG, 7 }, + + { "bpsw", CREG, 8 }, + { "bpc", CREG, 9 }, + { "isp", CREG, 10 }, + { "fintv", CREG, 11 }, + { "intb", CREG, 12 }, + + { "pbp", CREG, 16 }, + { "pben", CREG, 17 }, + + { "bbpsw", CREG, 24 }, + { "bbpc", CREG, 25 }, + + { ".s", DOT_S, 0 }, + { ".b", DOT_B, 0 }, + { ".w", DOT_W, 0 }, + { ".l", DOT_L, 0 }, + { ".a", DOT_A , 0}, + { ".ub", DOT_UB, 0 }, + { ".uw", DOT_UW , 0}, + + { "c", FLAG, 0 }, + { "z", FLAG, 1 }, + { "s", FLAG, 2 }, + { "o", FLAG, 3 }, + { "i", FLAG, 8 }, + { "u", FLAG, 9 }, + +#define OPC(x) { #x, x, IS_OPCODE } + OPC(ABS), + OPC(ADC), + OPC(ADD), + { "and", AND_, IS_OPCODE }, + OPC(BCLR), + OPC(BCND), + OPC(BMCND), + OPC(BNOT), + OPC(BRA), + OPC(BRK), + OPC(BSET), + OPC(BSR), + OPC(BTST), + OPC(CLRPSW), + OPC(CMP), + OPC(DBT), + OPC(DIV), + OPC(DIVU), + OPC(EDIV), + OPC(EDIVU), + OPC(EMUL), + OPC(EMULU), + OPC(FADD), + OPC(FCMP), + OPC(FDIV), + OPC(FMUL), + OPC(FREIT), + OPC(FSUB), + OPC(FTOI), + OPC(INT), + OPC(ITOF), + OPC(JMP), + OPC(JSR), + OPC(MVFACHI), + OPC(MVFACMI), + OPC(MVFACLO), + OPC(MVFC), + OPC(MVTACHI), + OPC(MVTACLO), + OPC(MVTC), + OPC(MVTIPL), + OPC(MACHI), + OPC(MACLO), + OPC(MAX), + OPC(MIN), + OPC(MOV), + OPC(MOVU), + OPC(MUL), + OPC(MULHI), + OPC(MULLO), + OPC(MULU), + OPC(NEG), + OPC(NOP), + OPC(NOT), + OPC(OR), + OPC(POP), + OPC(POPC), + OPC(POPM), + OPC(PUSH), + OPC(PUSHA), + OPC(PUSHC), + OPC(PUSHM), + OPC(RACW), + OPC(REIT), + OPC(REVL), + OPC(REVW), + OPC(RMPA), + OPC(ROLC), + OPC(RORC), + OPC(ROTL), + OPC(ROTR), + OPC(ROUND), + OPC(RTE), + OPC(RTFI), + OPC(RTS), + OPC(RTSD), + OPC(SAT), + OPC(SATR), + OPC(SBB), + OPC(SCCND), + OPC(SCMPU), + OPC(SETPSW), + OPC(SHAR), + OPC(SHLL), + OPC(SHLR), + OPC(SMOVB), + OPC(SMOVF), + OPC(SMOVU), + OPC(SSTR), + OPC(STNZ), + OPC(STOP), + OPC(STZ), + OPC(SUB), + OPC(SUNTIL), + OPC(SWHILE), + OPC(TST), + OPC(WAIT), + OPC(XCHG), + OPC(XOR), +}; + +#define NUM_TOKENS (sizeof (token_table) / sizeof (token_table[0])) + +static struct +{ + char * string; + int token; +} +condition_opcode_table[] = +{ + { "b", BCND }, + { "bm", BMCND }, + { "sc", SCCND }, +}; + +#define NUM_CONDITION_OPCODES (sizeof (condition_opcode_table) / sizeof (condition_opcode_table[0])) + +static struct +{ + char * string; + int val; +} +condition_table[] = +{ + { "z", 0 }, + { "eq", 0 }, + { "geu", 2 }, + { "c", 2 }, + { "gtu", 4 }, + { "pz", 6 }, + { "ge", 8 }, + { "gt", 10 }, + { "o", 12}, + /* always = 14 */ + { "nz", 1 }, + { "ne", 1 }, + { "ltu", 3 }, + { "nc", 3 }, + { "leu", 5 }, + { "n", 7 }, + { "lt", 9 }, + { "le", 11 }, + { "no", 13 } + /* never = 15 */ +}; + +#define NUM_CONDITIONS (sizeof (condition_table) / sizeof (condition_table[0])) + +void +rx_lex_init (char * beginning, char * ending) +{ + rx_init_start = beginning; + rx_lex_start = beginning; + rx_lex_end = ending; + rx_in_brackets = 0; + rx_last_token = 0; + + setbuf (stdout, 0); +} + +static int +check_condition (char * base) +{ + char * cp; + unsigned int i; + + if ((unsigned) (rx_lex_end - rx_lex_start) < strlen (base) + 1) + return 0; + if (memcmp (rx_lex_start, base, strlen (base))) + return 0; + cp = rx_lex_start + strlen (base); + for (i = 0; i < NUM_CONDITIONS; i ++) + { + if (strcasecmp (cp, condition_table[i].string) == 0) + { + rx_lval.regno = condition_table[i].val; + return 1; + } + } + return 0; +} + +static int +rx_lex (void) +{ + unsigned int ci; + char * save_input_pointer; + + while (ISSPACE (*rx_lex_start) + && rx_lex_start != rx_lex_end) + rx_lex_start ++; + + rx_last_exp_start = rx_lex_start; + + if (rx_lex_start == rx_lex_end) + return 0; + + if (ISALPHA (*rx_lex_start) + || (*rx_lex_start == '.' && ISALPHA (rx_lex_start[1]))) + { + unsigned int i; + char * e; + char save; + + for (e = rx_lex_start + 1; + e < rx_lex_end && ISALNUM (*e); + e ++) + ; + save = *e; + *e = 0; + + if (rx_last_token == 0) + for (ci = 0; ci < NUM_CONDITION_OPCODES; ci ++) + if (check_condition (condition_opcode_table[ci].string)) + { + *e = save; + rx_lex_start = e; + rx_last_token = condition_opcode_table[ci].token; + return condition_opcode_table[ci].token; + } + + for (i = 0; i < NUM_TOKENS; i++) + if (strcasecmp (rx_lex_start, token_table[i].string) == 0 + && !(token_table[i].val == IS_OPCODE && rx_last_token != 0) + && !(token_table[i].token == FLAG && !need_flag)) + { + rx_lval.regno = token_table[i].val; + *e = save; + rx_lex_start = e; + rx_last_token = token_table[i].token; + return token_table[i].token; + } + *e = save; + } + + if (rx_last_token == 0) + { + rx_last_token = UNKNOWN_OPCODE; + return UNKNOWN_OPCODE; + } + + if (rx_last_token == UNKNOWN_OPCODE) + return 0; + + if (*rx_lex_start == '[') + rx_in_brackets = 1; + if (*rx_lex_start == ']') + rx_in_brackets = 0; + + if (rx_in_brackets + || rx_last_token == REG + || strchr ("[],#", *rx_lex_start)) + { + rx_last_token = *rx_lex_start; + return *rx_lex_start ++; + } + + save_input_pointer = input_line_pointer; + input_line_pointer = rx_lex_start; + rx_lval.exp.X_md = 0; + expression (&rx_lval.exp); + + /* We parse but ignore any : modifier on expressions. */ + if (*input_line_pointer == ':') + { + char *cp; + + for (cp = input_line_pointer + 1; *cp && cp < rx_lex_end; cp++) + if (!ISDIGIT (*cp)) + break; + if (cp > input_line_pointer+1) + input_line_pointer = cp; + } + + rx_lex_start = input_line_pointer; + input_line_pointer = save_input_pointer; + rx_last_token = EXPR; + return EXPR; +} + +int +rx_error (char * str) +{ + int len; + + len = rx_last_exp_start - rx_init_start; + + as_bad ("%s", rx_init_start); + as_bad ("%*s^ %s", len, "", str); + return 0; +} + +static int +rx_intop (expressionS exp, int nbits) +{ + long v; + + if (exp.X_op == O_big && nbits == 32) + return 1; + if (exp.X_op != O_constant) + return 0; + v = exp.X_add_number; + + switch (nbits) + { + case 4: + return -0x8 <= v && v <= 0x7; + case 5: + return -0x10 <= v && v <= 0x17; + case 8: + return -0x80 <= v && v <= 0x7f; + case 16: + return -0x8000 <= v && v <= 0x7fff; + case 24: + return -0x800000 <= v && v <= 0x7fffff; + case 32: + return 1; + default: + printf ("rx_intop passed %d\n", nbits); + abort (); + } + return 1; +} + +static int +rx_uintop (expressionS exp, int nbits) +{ + unsigned long v; + + if (exp.X_op != O_constant) + return 0; + v = exp.X_add_number; + + switch (nbits) + { + case 4: + return v <= 0xf; + case 8: + return v <= 0xff; + case 16: + return v <= 0xffff; + case 24: + return v <= 0xffffff; + default: + printf ("rx_uintop passed %d\n", nbits); + abort (); + } + return 1; +} + +static int +rx_disp3op (expressionS exp) +{ + unsigned long v; + + if (exp.X_op != O_constant) + return 0; + v = exp.X_add_number; + if (v < 3 || v > 10) + return 0; + return 1; +} + +static int +rx_disp5op (expressionS * exp, int msize) +{ + long v; + + if (exp->X_op != O_constant) + return 0; + v = exp->X_add_number; + + switch (msize) + { + case BSIZE: + if (0 < v && v <= 31) + return 1; + break; + case WSIZE: + if (v & 1) + return 0; + if (0 < v && v <= 63) + { + exp->X_add_number >>= 1; + return 1; + } + break; + case LSIZE: + if (v & 3) + return 0; + if (0 < v && v <= 127) + { + exp->X_add_number >>= 2; + return 1; + } + break; + } + return 0; +} + +/* Just like the above, but allows a zero displacement. */ + +static int +rx_disp5op0 (expressionS * exp, int msize) +{ + if (exp->X_op != O_constant) + return 0; + if (exp->X_add_number == 0) + return 1; + return rx_disp5op (exp, msize); +} + +static int +exp_val (expressionS exp) +{ + if (exp.X_op != O_constant) + { + rx_error (_("constant expected")); + return 0; + } + return exp.X_add_number; +} + +static expressionS +zero_expr (void) +{ + /* Static, so program load sets it to all zeros, which is what we want. */ + static expressionS zero; + zero.X_op = O_constant; + return zero; +} + +static int +immediate (expressionS exp, int type, int pos) +{ + /* We will emit constants ourself here, so negate them. */ + if (type == RXREL_NEGATIVE && exp.X_op == O_constant) + exp.X_add_number = - exp.X_add_number; + if (type == RXREL_NEGATIVE_BORROW) + { + if (exp.X_op == O_constant) + exp.X_add_number = - exp.X_add_number - 1; + else + rx_error (_("sbb cannot use symbolic immediates")); + } + + if (rx_intop (exp, 8)) + { + rx_op (exp, 1, type); + return 1; + } + else if (rx_intop (exp, 16)) + { + rx_op (exp, 2, type); + return 2; + } + else if (rx_intop (exp, 24)) + { + rx_op (exp, 3, type); + return 3; + } + else if (rx_intop (exp, 32)) + { + rx_op (exp, 4, type); + return 0; + } + else if (type == RXREL_SIGNED) + { + /* This is a symbolic immediate, we will relax it later. */ + rx_relax (RX_RELAX_IMM, pos); + rx_op (exp, linkrelax ? 4 : 1, type); + return 1; + } + else + { + /* Let the linker deal with it. */ + rx_op (exp, 4, type); + return 0; + } +} + +static int +displacement (expressionS exp, int msize) +{ + int val; + int vshift = 0; + + if (exp.X_op == O_symbol + && exp.X_md) + { + switch (exp.X_md) + { + case BFD_RELOC_GPREL16: + switch (msize) + { + case BSIZE: + exp.X_md = BFD_RELOC_RX_GPRELB; + break; + case WSIZE: + exp.X_md = BFD_RELOC_RX_GPRELW; + break; + case LSIZE: + exp.X_md = BFD_RELOC_RX_GPRELL; + break; + } + O2 (exp); + return 2; + } + } + + if (exp.X_op != O_constant) + { + rx_error (_("displacements must be constants")); + return -1; + } + val = exp.X_add_number; + + if (val == 0) + return 0; + + switch (msize) + { + case BSIZE: + break; + case WSIZE: + if (val & 1) + rx_error (_("word displacement not word-aligned")); + vshift = 1; + break; + case LSIZE: + if (val & 3) + rx_error (_("long displacement not long-aligned")); + vshift = 2; + break; + default: + as_bad (_("displacement with unknown size (internal bug?)\n")); + break; + } + + val >>= vshift; + exp.X_add_number = val; + + if (0 <= val && val <= 255 ) + { + O1 (exp); + return 1; + } + + if (0 <= val && val <= 65535) + { + O2 (exp); + return 2; + } + if (val < 0) + rx_error (_("negative displacements not allowed")); + else + rx_error (_("displacement too large")); + return -1; +} + +static void +rtsd_immediate (expressionS exp) +{ + int val; + + if (exp.X_op != O_constant) + { + rx_error (_("rtsd size must be constant")); + return; + } + val = exp.X_add_number; + if (val & 3) + rx_error (_("rtsd size must be multiple of 4")); + + if (val < 0 || val > 1020) + rx_error (_("rtsd size must be 0..1020")); + + val >>= 2; + exp.X_add_number = val; + O1 (exp); +} + diff --git a/gas/rx-parse.h b/gas/rx-parse.h new file mode 100644 index 0000000..b57b1d4 --- /dev/null +++ b/gas/rx-parse.h @@ -0,0 +1,289 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton interface for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + REG = 258, + FLAG = 259, + CREG = 260, + EXPR = 261, + UNKNOWN_OPCODE = 262, + IS_OPCODE = 263, + DOT_S = 264, + DOT_B = 265, + DOT_W = 266, + DOT_L = 267, + DOT_A = 268, + DOT_UB = 269, + DOT_UW = 270, + ABS = 271, + ADC = 272, + ADD = 273, + AND_ = 274, + BCLR = 275, + BCND = 276, + BMCND = 277, + BNOT = 278, + BRA = 279, + BRK = 280, + BSET = 281, + BSR = 282, + BTST = 283, + CLRPSW = 284, + CMP = 285, + DBT = 286, + DIV = 287, + DIVU = 288, + EDIV = 289, + EDIVU = 290, + EMUL = 291, + EMULU = 292, + FADD = 293, + FCMP = 294, + FDIV = 295, + FMUL = 296, + FREIT = 297, + FSUB = 298, + FTOI = 299, + INT = 300, + ITOF = 301, + JMP = 302, + JSR = 303, + MACHI = 304, + MACLO = 305, + MAX = 306, + MIN = 307, + MOV = 308, + MOVU = 309, + MUL = 310, + MULHI = 311, + MULLO = 312, + MULU = 313, + MVFACHI = 314, + MVFACMI = 315, + MVFACLO = 316, + MVFC = 317, + MVTACHI = 318, + MVTACLO = 319, + MVTC = 320, + MVTIPL = 321, + NEG = 322, + NOP = 323, + NOT = 324, + OR = 325, + POP = 326, + POPC = 327, + POPM = 328, + PUSH = 329, + PUSHA = 330, + PUSHC = 331, + PUSHM = 332, + RACW = 333, + REIT = 334, + REVL = 335, + REVW = 336, + RMPA = 337, + ROLC = 338, + RORC = 339, + ROTL = 340, + ROTR = 341, + ROUND = 342, + RTE = 343, + RTFI = 344, + RTS = 345, + RTSD = 346, + SAT = 347, + SATR = 348, + SBB = 349, + SCCND = 350, + SCMPU = 351, + SETPSW = 352, + SHAR = 353, + SHLL = 354, + SHLR = 355, + SMOVB = 356, + SMOVF = 357, + SMOVU = 358, + SSTR = 359, + STNZ = 360, + STOP = 361, + STZ = 362, + SUB = 363, + SUNTIL = 364, + SWHILE = 365, + TST = 366, + WAIT = 367, + XCHG = 368, + XOR = 369 + }; +#endif +/* Tokens. */ +#define REG 258 +#define FLAG 259 +#define CREG 260 +#define EXPR 261 +#define UNKNOWN_OPCODE 262 +#define IS_OPCODE 263 +#define DOT_S 264 +#define DOT_B 265 +#define DOT_W 266 +#define DOT_L 267 +#define DOT_A 268 +#define DOT_UB 269 +#define DOT_UW 270 +#define ABS 271 +#define ADC 272 +#define ADD 273 +#define AND_ 274 +#define BCLR 275 +#define BCND 276 +#define BMCND 277 +#define BNOT 278 +#define BRA 279 +#define BRK 280 +#define BSET 281 +#define BSR 282 +#define BTST 283 +#define CLRPSW 284 +#define CMP 285 +#define DBT 286 +#define DIV 287 +#define DIVU 288 +#define EDIV 289 +#define EDIVU 290 +#define EMUL 291 +#define EMULU 292 +#define FADD 293 +#define FCMP 294 +#define FDIV 295 +#define FMUL 296 +#define FREIT 297 +#define FSUB 298 +#define FTOI 299 +#define INT 300 +#define ITOF 301 +#define JMP 302 +#define JSR 303 +#define MACHI 304 +#define MACLO 305 +#define MAX 306 +#define MIN 307 +#define MOV 308 +#define MOVU 309 +#define MUL 310 +#define MULHI 311 +#define MULLO 312 +#define MULU 313 +#define MVFACHI 314 +#define MVFACMI 315 +#define MVFACLO 316 +#define MVFC 317 +#define MVTACHI 318 +#define MVTACLO 319 +#define MVTC 320 +#define MVTIPL 321 +#define NEG 322 +#define NOP 323 +#define NOT 324 +#define OR 325 +#define POP 326 +#define POPC 327 +#define POPM 328 +#define PUSH 329 +#define PUSHA 330 +#define PUSHC 331 +#define PUSHM 332 +#define RACW 333 +#define REIT 334 +#define REVL 335 +#define REVW 336 +#define RMPA 337 +#define ROLC 338 +#define RORC 339 +#define ROTL 340 +#define ROTR 341 +#define ROUND 342 +#define RTE 343 +#define RTFI 344 +#define RTS 345 +#define RTSD 346 +#define SAT 347 +#define SATR 348 +#define SBB 349 +#define SCCND 350 +#define SCMPU 351 +#define SETPSW 352 +#define SHAR 353 +#define SHLL 354 +#define SHLR 355 +#define SMOVB 356 +#define SMOVF 357 +#define SMOVU 358 +#define SSTR 359 +#define STNZ 360 +#define STOP 361 +#define STZ 362 +#define SUB 363 +#define SUNTIL 364 +#define SWHILE 365 +#define TST 366 +#define WAIT 367 +#define XCHG 368 +#define XOR 369 + + + + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 130 "rx-parse.y" +{ + int regno; + expressionS exp; +} +/* Line 1529 of yacc.c. */ +#line 282 "rx-parse.h" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + +extern YYSTYPE rx_lval; + diff --git a/gas/symbols.c b/gas/symbols.c index 91d0cdb..086e01d 100644 --- a/gas/symbols.c +++ b/gas/symbols.c @@ -23,11 +23,9 @@ /* #define DEBUG_SYMS / * to debug symbol list maintenance. */ #include "as.h" - #include "safe-ctype.h" #include "obstack.h" /* For "symbols.h" */ #include "subsegs.h" - #include "struc-symbol.h" /* This is non-zero if symbols are case sensitive, which is the @@ -59,6 +57,10 @@ symbolS dot_symbol; #define DOLLAR_LABEL_CHAR '\001' #define LOCAL_LABEL_CHAR '\002' +#ifndef TC_LABEL_IS_LOCAL +#define TC_LABEL_IS_LOCAL(name) 0 +#endif + struct obstack notes; #ifdef TE_PE /* The name of an external symbol which is @@ -187,7 +189,7 @@ static unsigned long local_symbol_conversion_count; /* Create a local symbol and insert it into the local hash table. */ -static struct local_symbol * +struct local_symbol * local_symbol_make (const char *name, segT section, valueT val, fragS *frag) { char *name_copy; @@ -250,9 +252,6 @@ static void define_sym_at_dot (symbolS *symbolP) { symbolP->sy_frag = frag_now; -#ifdef OBJ_VMS - S_SET_OTHER (symbolP, const_flag); -#endif S_SET_VALUE (symbolP, (valueT) frag_now_fix ()); S_SET_SEGMENT (symbolP, now_seg); } @@ -447,9 +446,6 @@ colon (/* Just seen "x:" - rattle symbols & frags. */ { symbolP = symbol_new (sym_name, now_seg, (valueT) frag_now_fix (), frag_now); -#ifdef OBJ_VMS - S_SET_OTHER (symbolP, const_flag); -#endif /* OBJ_VMS */ symbol_table_insert (symbolP); } @@ -2126,6 +2122,7 @@ S_IS_LOCAL (symbolS *s) && ! S_IS_DEBUG (s) && (strchr (name, DOLLAR_LABEL_CHAR) || strchr (name, LOCAL_LABEL_CHAR) + || TC_LABEL_IS_LOCAL (name) || (! flag_keep_locals && (bfd_is_local_label (stdoutput, s->bsym) || (flag_mri @@ -2140,6 +2137,16 @@ S_IS_STABD (symbolS *s) } int +S_CAN_BE_REDEFINED (const symbolS *s) +{ + if (LOCAL_SYMBOL_CHECK (s)) + return (local_symbol_get_frag ((struct local_symbol *) s) + == &predefined_address_frag); + /* Permit register names to be redefined. */ + return s->bsym->section == reg_section; +} + +int S_IS_VOLATILE (const symbolS *s) { if (LOCAL_SYMBOL_CHECK (s)) diff --git a/gas/symbols.h b/gas/symbols.h index 1d5b2a3..a3a31f7 100644 --- a/gas/symbols.h +++ b/gas/symbols.h @@ -50,6 +50,8 @@ symbolS *symbol_new (const char *name, segT segment, valueT value, fragS * frag); symbolS *symbol_create (const char *name, segT segment, valueT value, fragS * frag); +struct local_symbol *local_symbol_make (const char *name, segT section, + valueT val, fragS *frag); symbolS *symbol_clone (symbolS *, int); #undef symbol_clone_if_forward_ref symbolS *symbol_clone_if_forward_ref (symbolS *, int); @@ -98,6 +100,7 @@ extern int S_FORCE_RELOC (symbolS *, int); extern int S_IS_DEBUG (symbolS *); extern int S_IS_LOCAL (symbolS *); extern int S_IS_STABD (symbolS *); +extern int S_CAN_BE_REDEFINED (const symbolS *); extern int S_IS_VOLATILE (const symbolS *); extern int S_IS_FORWARD_REF (const symbolS *); extern const char *S_GET_NAME (symbolS *); diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 6e93dfc..0631572 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,698 @@ +2011-11-14 Maciej W. Rozycki + + Apply mainline patches + 2011-11-14 Maciej W. Rozycki + * gas/mips/relax-swap3.d: New test. + * gas/mips/mips16@relax-swap3.d: Likewise. + * gas/mips/micromips@relax-swap3.d: Likewise. + * gas/mips/relax-swap3.s: New test source. + * gas/mips/mips.exp: Run the new tests. + +2011-10-25 Alan Modra + + Apply mainline patches + 2011-09-28 Jan Beulich + * gas/ppc/476.s: Fix lswi first operand. + * gas/ppc/476.d: Adjust expected output. + * gas/ppc/a2.s: Fix lswi first operand. + * gas/ppc/a2.d: Adjust expected output. + * gas/ppc/power6.s: Fix lfdpx first operand. + * gas/ppc/power6.d: Adjust expected output. + +2011-09-21 David S. Miller + + * gas/sparc/hpcvis3.s: Update for fixed fchksum16 mnemonic. + * gas/sparc/hpcvis3.d: Likewise. + + * gas/sparc/imm-plus-rreg.d: Fix address regex for 64-bit. + * gas/sparc/save-args.d: Likewise. + * gas/sparc/ticc-imm-reg.d: Likewise, add -32 to options. + * gas/sparc/v8-movwr-imm.d: Likewise. + + * gas/sparc/hpcvis3.d: Pass '-Av9v'. + +2011-09-08 Mark Fortescue + + * gas/sparc/imm-plus-rreg.[sd]: New test. + * gas/sparc/sparc.exp: Run new test. + + * gas/sparc/ticc-imm-reg.[sd]: New test. + * gas/sparc/v8-movwr-imm.[sd]: New test. + * gas/sparc/sparc.exp: Run new tests. + + * gas/sparc/save-args.[sd]: New test. + * gas/sparc/sparc.exp: Run new test. + +2011-09-08 David S. Miller + + * gas/sparc/hpcvis3.s: Correct pdistn test. + * gas/sparc/hpcvis3.d: Likewise. + +2011-09-08 Richard Sandiford + + PR gas/13167 + * gas/ia64/pr13167.d, gas/ia64/pr13167.s: New test. + * gas/ia64/ia64.exp: Run it. + +2011-09-07 Andreas Schwab + + PR gas/13145 + * gas/m68k/all.exp: Run "mode5" test also with -mcpu=5200. + * gas/m68k/mode5.s: Add moveml testcases. + * gas/m68k/mode5.d: Update. + +2011-09-05 Richard Sandiford + + * gas/mips/loc-swap-2.s, gas/mips/loc-swap-2.d, + gas/mips/micromips@loc-swap-2.d, + gas/mips/mips16@loc-swap-2.d: New test. + * gas/mips/mips.exp: Run it. + +2011-08-19 Sergey A. Guriev + + * gas/i386/avx-gather-intel.d: Added missing vpgather tests. + * gas/i386/avx-gather.d: Likewise. + * gas/i386/x86-64-avx-gather-intel.d: Likewise. + * gas/i386/x86-64-avx-gather.d: Likewise. + + * gas/i386/avx-intel.d: Added missing vpinsrd and removed + duplicated vpinsrb instructions. + * gas/i386/avx.d: Likewise. + * gas/i386/avx.s: Likewise. + * gas/i386/ilp32/x86-64-avx-intel.d: Likewise. + * gas/i386/ilp32/x86-64-avx.d: Likewise. + * gas/i386/x86-64-avx-intel.d: Likewise. + * gas/i386/x86-64-avx.d: Likewise. + * gas/i386/x86-64-avx.s: Likewise. + +2011-08-10 Maciej W. Rozycki + + * gas/mips/micromips@mips5.d: Rename to... + * gas/mips/micromips@mips5-fp.d: ... this. + * gas/mips/mips5.d: Rename to... + * gas/mips/mips5-fp.d: ... this. + * gas/mips/mips5.l: Rename to... + * gas/mips/mips5-fp.l: ... this. + * gas/mips/mips5.s: Rename to... + * gas/mips/mips5-fp.s: ... this. + * gas/mips/mips.exp: Update accordingly. + +2011-08-10 Maciej W. Rozycki + + * gas/mips/mips.exp: Define new "fpisa3", "fpisa4" and "fpisa5" + architecture properties adding them to "mips3", "mips4", "mips5" + and "mips32r2" architectures. Use the new properties for the + "24k-triple-stores-1", "24k-triple-stores-3", "mips4-fp", + "mips5" and "alnv_ps-swap" tests. + +2011-08-09 Maciej W. Rozycki + Chao-ying Fu + + * gas/mips/micromips@mcu.d: New test. + * gas/mips/mcu.d: Likewise. + * gas/mips/mcu.s: New test source. + * gas/mips/mips.exp: Run the new tests. + +2011-08-09 Maciej W. Rozycki + + * gas/mips/micromips.d: Update according to changes to enable + microMIPS branch swapping. + * gas/mips/micromips-trap.d: Likewise. + * gas/mips/micromips@jal-svr4pic.d: Likewise. + * gas/mips/micromips@loc-swap.d: Likewise. + * gas/mips/micromips@loc-swap-dis.d: Likewise. + +2011-08-05 David S. Miller + + * gas/sparc/hpcvis3.d: New test. + * gas/sparc/hpcvis3.s: New test source. + * gas/sparc/sparc.exp: Run new test. + +2011-08-05 H.J. Lu + + * gas/i386/x86-64-branch.d: Pass -dw to objdump and support + win64. + +2011-08-04 H.J. Lu + + * gas/elf/bad-group.d: New. + * gas/elf/bad-group.err: Likewise. + * gas/elf/bad-group.s: Likewise. + + * gas/elf/elf.exp: Run bad-group. + +2011-08-03 James Greenhalgh + + * gas/arm/strex-bad-t.d: New testcase. + * gas/arm/strex-bad-t.s: Likewise. + * gas/arm/strex-bad-t.l: Likewise. + * gas/arm/strex-t.s: Likewise. + * gas/arm/strex-t.d: Likewise. + +2011-08-01 H.J. Lu + + PR ld/13048 + * gas/i386/ilp32/ilp32.exp: Don't run inval. + + * gas/i386/ilp32/inval.l: Removed. + * gas/i386/ilp32/inval.s: Likewise. + + * gas/i386/ilp32/quad.d: Expect R_X86_64_64 instead of + R_X86_64_32. + + * gas/i386/ilp32/x86-64-pcrel.s: Add tests for movabs. + * gas/i386/ilp32/x86-64-pcrel.d: Updated. + +2011-08-01 H.J. Lu + + PR gas/13046 + * gas/i386/x86-64-branch.s: Add tests for direct branch. + * gas/i386/x86-64-branch.d: Updated. + * gas/i386/ilp32/x86-64-branch.d: Likewise. + +2011-07-29 Nick Clifton + + * gas/elf/warn-2.s: Add other types of NOP insn. + +2011-07-27 Nathan Sidwell + + * gas/elf/warn-2.s: New. + * gas/elf/elf.exp: Run the new test. + +2011-07-26 Kazuhiro Inaoka + + * gas/rx/r-bcc.d: Update expected disassembly of synthetic beq.a + instruction. + +2011-07-24 Maciej W. Rozycki + Chao-ying Fu + Richard Sandiford + + * gas/mips/micromips.d: New test. + * gas/mips/micromips-branch-delay.d: Likewise. + * gas/mips/micromips-branch-relax.d: Likewise. + * gas/mips/micromips-branch-relax-pic.d: Likewise. + * gas/mips/micromips-size-1.d: Likewise. + * gas/mips/micromips-trap.d: Likewise. + * gas/mips/micromips.l: New stderr output. + * gas/mips/micromips-branch-delay.l: Likewise. + * gas/mips/micromips-branch-relax.l: Likewise. + * gas/mips/micromips-branch-relax-pic.l: Likewise. + * gas/mips/micromips-size-0.l: New list test. + * gas/mips/micromips-size-1.l: New stderr output. + * gas/mips/micromips.s: New test source. + * gas/mips/micromips-branch-delay.s: Likewise. + * gas/mips/micromips-branch-relax.s: Likewise. + * gas/mips/micromips-size-0.s: Likewise. + * gas/mips/micromips-size-1.s: Likewise. + * gas/mips/mips.exp: Run the new tests. + + * gas/mips/dli.s: Use .p2align. + * gas/mips/elf_ase_micromips.d: New test. + * gas/mips/elf_ase_micromips-2.d: Likewise. + * gas/mips/micromips@abs.d: Likewise. + * gas/mips/micromips@add.d: Likewise. + * gas/mips/micromips@alnv_ps-swap.d: Likewise. + * gas/mips/micromips@and.d: Likewise. + * gas/mips/micromips@beq.d: Likewise. + * gas/mips/micromips@bge.d: Likewise. + * gas/mips/micromips@bgeu.d: Likewise. + * gas/mips/micromips@blt.d: Likewise. + * gas/mips/micromips@bltu.d: Likewise. + * gas/mips/micromips@branch-likely.d: Likewise. + * gas/mips/micromips@branch-misc-1.d: Likewise. + * gas/mips/micromips@branch-misc-2-64.d: Likewise. + * gas/mips/micromips@branch-misc-2.d: Likewise. + * gas/mips/micromips@branch-misc-2pic-64.d: Likewise. + * gas/mips/micromips@branch-misc-2pic.d: Likewise. + * gas/mips/micromips@branch-misc-4-64.d: Likewise. + * gas/mips/micromips@branch-misc-4.d: Likewise. + * gas/mips/micromips@branch-self.d: Likewise. + * gas/mips/micromips@cache.d: Likewise. + * gas/mips/micromips@daddi.d: Likewise. + * gas/mips/micromips@dli.d: Likewise. + * gas/mips/micromips@elf-jal.d: Likewise. + * gas/mips/micromips@elf-rel2.d: Likewise. + * gas/mips/micromips@elfel-rel2.d: Likewise. + * gas/mips/micromips@elf-rel4.d: Likewise. + * gas/mips/micromips@jal-svr4pic.d: Likewise. + * gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise. + * gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise. + * gas/mips/micromips@li.d: Likewise. + * gas/mips/micromips@loc-swap-dis.d: Likewise. + * gas/mips/micromips@loc-swap.d: Likewise. + * gas/mips/micromips@mips1-fp.d: Likewise. + * gas/mips/micromips@mips32-cp2.d: Likewise. + * gas/mips/micromips@mips32-imm.d: Likewise. + * gas/mips/micromips@mips32-sf32.d: Likewise. + * gas/mips/micromips@mips32.d: Likewise. + * gas/mips/micromips@mips32r2-cp2.d: Likewise. + * gas/mips/micromips@mips32r2-fp32.d: Likewise. + * gas/mips/micromips@mips32r2-sync.d: Likewise. + * gas/mips/micromips@mips32r2.d: Likewise. + * gas/mips/micromips@mips4-branch-likely.d: Likewise. + * gas/mips/micromips@mips4-fp.d: Likewise. + * gas/mips/micromips@mips4.d: Likewise. + * gas/mips/micromips@mips5.d: Likewise. + * gas/mips/micromips@mips64-cp2.d: Likewise. + * gas/mips/micromips@mips64.d: Likewise. + * gas/mips/micromips@mips64r2.d: Likewise. + * gas/mips/micromips@pref.d: Likewise. + * gas/mips/micromips@relax-at.d: Likewise. + * gas/mips/micromips@relax.d: Likewise. + * gas/mips/micromips@rol-hw.d: Likewise. + * gas/mips/micromips@uld2-eb.d: Likewise. + * gas/mips/micromips@uld2-el.d: Likewise. + * gas/mips/micromips@ulh2-eb.d: Likewise. + * gas/mips/micromips@ulh2-el.d: Likewise. + * gas/mips/micromips@ulw2-eb-ilocks.d: Likewise. + * gas/mips/micromips@ulw2-el-ilocks.d: Likewise. + * gas/mips/cache.d: Likewise. + * gas/mips/daddi.d: Likewise. + * gas/mips/mips32-imm.d: Likewise. + * gas/mips/pref.d: Likewise. + * gas/mips/elf-rel27.d: Handle microMIPS ASE. + * gas/mips/l_d.d: Likewise. + * gas/mips/l_d-n32.d: Likewise. + * gas/mips/l_d-n64.d: Likewise. + * gas/mips/ld.d: Likewise. + * gas/mips/ld-n32.d: Likewise. + * gas/mips/ld-n64.d: Likewise. + * gas/mips/s_d.d: Likewise. + * gas/mips/s_d-n32.d: Likewise. + * gas/mips/s_d-n64.d: Likewise. + * gas/mips/sd.d: Likewise. + * gas/mips/sd-n32.d: Likewise. + * gas/mips/sd-n64.d: Likewise. + * gas/mips/mips32.d: Update immediates. + * gas/mips/micromips@mips32-cp2.s: New test source. + * gas/mips/micromips@mips32-imm.s: Likewise. + * gas/mips/micromips@mips32r2-cp2.s: Likewise. + * gas/mips/micromips@mips64-cp2.s: Likewise. + * gas/mips/cache.s: Likewise. + * gas/mips/daddi.s: Likewise. + * gas/mips/mips32-imm.s: Likewise. + * gas/mips/elf-rel4.s: Handle microMIPS ASE. + * gas/mips/lb-pic.s: Likewise. + * gas/mips/ld.s: Likewise. + * gas/mips/mips32.s: Likewise. + * gas/mips/mips.exp: Add the micromips arch. Exclude mips16e + from micromips. Run mips32-imm. + + * gas/mips/jal-mask-11.d: New test. + * gas/mips/jal-mask-12.d: Likewise. + * gas/mips/micromips@jal-mask-11.d: Likewise. + * gas/mips/jal-mask-1.s: Source for the new tests. + * gas/mips/jal-mask-21.d: New test. + * gas/mips/jal-mask-22.d: Likewise. + * gas/mips/micromips@jal-mask-12.d: Likewise. + * gas/mips/jal-mask-2.s: Source for the new tests. + * gas/mips/mips.exp: Run the new tests. + + * gas/mips/mips16-e.d: Add --special-syms to `objdump'. + * gas/mips/tmips16-e.d: Likewise. + * gas/mips/mipsel16-e.d: Likewise. + * gas/mips/tmipsel16-e.d: Likewise. + + * gas/mips/and.s: Adjust padding. + * gas/mips/beq.s: Likewise. + * gas/mips/bge.s: Likewise. + * gas/mips/bgeu.s: Likewise. + * gas/mips/blt.s: Likewise. + * gas/mips/bltu.s: Likewise. + * gas/mips/branch-misc-2.s: Likewise. + * gas/mips/jal.s: Likewise. + * gas/mips/li.s: Likewise. + * gas/mips/mips4.s: Likewise. + * gas/mips/mips4-fp.s: Likewise. + * gas/mips/relax.s: Likewise. + * gas/mips/and.d: Update accordingly. + * gas/mips/elf-jal.d: Likewise. + * gas/mips/jal.d: Likewise. + * gas/mips/li.d: Likewise. + * gas/mips/relax-at.d: Likewise. + * gas/mips/relax.d: Likewise. + +2011-07-22 H.J. Lu + + * gas/i386/k1om.d: New. + * gas/i386/k1om-inval.l: Likewise. + * gas/i386/k1om-inval.s: Likewise. + + * gas/i386/i386.exp: Run k1om-inval and k1om. + +2011-07-04 Maciej W. Rozycki + + * gas/mips/loc-swap.d: New test case for DWARF-2 location with + branch swapping. + * gas/mips/loc-swap-dis.d: Likewise. + * gas/mips/mips16@loc-swap.d: Likewise, MIPS16 version. + * gas/mips/mips16@loc-swap-dis.d: Likewise. + * gas/mips/loc-swap.s: Source for the new tests. + * gas/mips/mips.exp: Run the new tests. + +2011-06-30 H.J. Lu + + AVX Programming Reference (June, 2011) + * gas/i386/bmi2.s: Correct rorx tests. + * gas/i386/x86-64-bmi2.s: Likewise. + + * gas/i386/bmi2-intel.d: Updated. + * gas/i386/bmi2.d: Likewise. + * gas/i386/x86-64-bmi2-intel.d: Likewise. + * gas/i386/x86-64-bmi2.d: Likewise. + +2011-06-30 Paul Carroll + + * gas/arm/addthumb2err.s: New test file. + * gas/arm/addthumb2err.d: Test control file. + * gas/arm/addthumb2err.l: Expected error messages. + +2011-06-30 Nick Clifton + + PR gas/12931 + * gas/arm/blx-bad.d: Add exrta nop at end of disassembly. + * gas/arm/inst-po-be.d: Add exrta nop at end of disassembly. + * gas/arm/inst-po.d: Add exrta nop at end of disassembly. + +2011-06-30 Nick Clifton + + PR gas/12848 + * gas/arm/thumb-b-bad.s: New test. + * gas/arm/thumb-b-bad.d: Test control file. + * gas/arm/thumb-b-bad.l: Expected error output. + +2011-06-29 Richard Sandiford + + * gas/mips/mips16-e.d, gas/mips/mips16-f.d, + gas/mips/mipsel16-e.d, gas/mips/mipsel16-f.d, + gas/mips/tmips16-e.d, gas/mips/tmips16-f.d, + gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Fix GPR mask. + * gas/mips/reginfo-1.s, gas/mips/reginfo-1a.d, + gas/mips/reginfo-1b.d: New tests. + * gas/mips/mips.exp: Run them. + +2011-06-29 Richard Sandiford + + * gas/mips/24k-triple-stores-9.d: Add -z to dump options and + explicitly match one nop. + * gas/mips/24k-triple-stores-10.d: Likewise. + * gas/mips/24k-triple-stores-11.d: Likewise. + * gas/mips/lifloat.d: Likewise. + * gas/mips/trunc.d: Likewise 1 extra nop. + * gas/mips/vr4111.d: Likewise 2 nops. + +2011-06-26 Richard Sandiford + + * gas/mips/24k-branch-delay-1.d: Do not allow stores to be put + into delay slots. + * gas/mips/24k-triple-stores-1.d: Put the first nop after the + second store, rather than the first. + * gas/mips/24k-triple-stores-2.d: Likewise. + * gas/mips/24k-triple-stores-4.d: Likewise. + * gas/mips/24k-triple-stores-8.d: Likewise. + * gas/mips/24k-triple-stores-3.d: Remove first nop. + * gas/mips/24k-triple-stores-5.d: Likewise. + * gas/mips/24k-triple-stores-6.d: Likewise. + * gas/mips/24k-triple-stores-7.d: Likewise. + * gas/mips/24k-triple-stores-9.d: Add a nop after the second store. + Expect a nop at the end. + * gas/mips/24k-triple-stores-10.d: Put the first nop after the + second store, rather than the first. Expect a nop at the end. + +2011-06-25 Richard Sandiford + + * gas/mips/vr4130.s: Add some more ".set noreorder" tests. + * gas/mips/vr4130.d: Update accordingly. + +2011-06-23 Richard Sandiford + + * gas/mips/pr12915.s, gas/mips/pr12915.d: New test. + * gas/mips/mips.exp: Run it. + +2011-06-21 Sameera Deshpande + + * gas/arm/vcvt-bad.d: New test. + * gas/arm/vcvt-bad.l: Likewise. + * gas/arm/vcvt-bad.s: Likewise. + * gas/arm/vcvt.d: Likewise. + * gas/arm/vcvt.s: Likewise. + +2011-06-14 Tristan Gingold + + * gas/ppc/test1xcoff32.d: Adjust for csect anchor. + +2011-06-13 Walter Lee + + * gas/tilepro/t_constants.s: New file. + * gas/tilepro/t_constants.d: Likewise. + * gas/tilepro/t_insns.s: Likewise. + * gas/tilepro/tilepro.exp: Likewise. + * gas/tilepro/t_insns.d: Likewise. + * gas/tilegx/tilegx.exp: Likewise. + * gas/tilegx/t_insns.d: Likewise. + * gas/tilegx/t_insns.s: Likewise. + +2011-06-13 Nick Clifton + + PR gas/12854 + * gas/arm/shift-bad.s: New test. + * gas/arm/shift-bad.l: Expcted error output. + * gas/arm/shift-bad.s: New control file. + +2011-06-12 H.J. Lu + + * gas/i386/arch-10-lzcnt.d: Updated. + * gas/i386/x86-64-arch-2-lzcnt.d: Likewise. + +2011-06-10 H.J. Lu + + AVX Programming Reference (June, 2011) + * gas/i386/arch-10-1.l: Updated. + * gas/i386/arch-10-2.l: Likewise. + * gas/i386/arch-10-3.l: Likewise. + * gas/i386/arch-10-4.l: Likewise. + + * gas/i386/arch-10.s: Add LZCNT to comments. + * gas/i386/x86-64-arch-2.s: Likewise. + + * gas/i386/arch-10-lzcnt.d: New. + * gas/i386/avx-gather-intel.d: Likewise. + * gas/i386/avx-gather.d: Likewise. + * gas/i386/avx-gather.s: Likewise. + * gas/i386/avx2-intel.d: Likewise. + * gas/i386/avx2.d: Likewise. + * gas/i386/avx2.s: Likewise + * gas/i386/avx256int-intel.d: Likewise. + * gas/i386/avx256int.d: Likewise. + * gas/i386/avx256int.s: Likewise. + * gas/i386/bmi2-intel.d: Likewise. + * gas/i386/bmi2.d: Likewise. + * gas/i386/bmi2.s: Likewise. + * gas/i386/inval-invpcid.l:Likewise. + * gas/i386/inval-invpcid.s: Likewise. + * gas/i386/invpcid-intel.d: Likewise. + * gas/i386/invpcid.d: Likewise. + * gas/i386/invpcid.s: Likewise. + * gas/i386/x86-64-arch-2-lzcnt.d: Likewise. + * gas/i386/x86-64-avx-gather-intel.d: Likewise. + * gas/i386/x86-64-avx-gather.d: Likewise. + * gas/i386/x86-64-avx-gather.s: Likewise. + * gas/i386/x86-64-avx2-intel.d: Likewise. + * gas/i386/x86-64-avx2.d: Likewise. + * gas/i386/x86-64-avx2.s: Likewise. + * gas/i386/x86-64-avx256int-intel.d: Likewise. + * gas/i386/x86-64-avx256int.d: Likewise. + * gas/i386/x86-64-avx256int.s: Likewise. + * gas/i386/x86-64-bmi2-intel.d: Likewise. + * gas/i386/x86-64-bmi2.d: Likewise. + * gas/i386/x86-64-bmi2.s: Likewise. + * gas/i386/x86-64-inval-invpcid.l: Likewise. + * gas/i386/x86-64-inval-invpcid.s: Likewise. + * gas/i386/x86-64-invpcid-intel.d: Likewise. + * gas/i386/x86-64-invpcid.d: Likewise. + * gas/i386/x86-64-invpcid.s: Likewise. + +2011-06-09 James Greenhalgh + + * gas/arm/ldrd-unpredicatble.d: New testcase. + * gas/arm/ldrd-unpredicatble.s: Likewise. + * gas/arm/ldrd-unpredicatble.l: Likewise. + +2011-06-02 Jie Zhang + Nathan Sidwell + + * gas/arm/inst.d: Adjust for signed zero offsets. + * gas/arm/ldst-offset0.d: New test. + * gas/arm/ldst-offset0.s: New test. + * gas/arm/offset-1.d: New test. + * gas/arm/offset-1.s: New test. + +2011-05-31 Paul Brook + + * gas/arm/arm-idiv-bad.d: New test. + * gas/arm/arm-idiv-bad.s: New test. + * gas/arm/arm-idiv-bad.l: New test. + * gas/arm/arm-idiv.d: New test. + * gas/arm/arm-idiv.s: New test. + +2011-05-31 Paul Brook + + * gas/arm/ldr-global.d: New test. + * gas/arm/ldr-global.s: New test. + +2011-05-31 Paul Brook + + * arm/t2-branch-global.d: New test. + * arm/t2-branch-global.s: New test. + +2011-05-24 Andreas Krebbel + + * gas/s390/esa-g5.d: Fix fp register pair operands. + * gas/s390/esa-g5.s: Likewise. + * gas/s390/zarch-z196.d: Likewise. + * gas/s390/zarch-z196.s: Likewise. + * gas/s390/zarch-z9-109.d: Likewise. + * gas/s390/zarch-z9-109.s: Likewise. + * gas/s390/zarch-z9-ec.d: Likewise. + * gas/s390/zarch-z9-ec.s: Likewise. + +2011-05-24 Andreas Krebbel + + * gas/s390/esa-g5.d: Fix register pair operands. + * gas/s390/esa-g5.s: Likewise. + * gas/s390/esa-z9-109.d: Likewise. + * gas/s390/esa-z9-109.s: Likewise. + * gas/s390/zarch-z196.d: Likewise. + * gas/s390/zarch-z196.s: Likewise. + * gas/s390/zarch-z9-109.d: Likewise. + * gas/s390/zarch-z9-109.s: Likewise. + * gas/s390/zarch-z900.d: Likewise. + * gas/s390/zarch-z900.s: Likewise. + * gas/s390/zarch-z990.d: Likewise. + * gas/s390/zarch-z990.s: Likewise. + +2011-05-20 Bernd Schmidt + + * gas/tic6x/pcr-relocs.d: New test. + * gas/tic6x/pcr-relocs.s: New test. + * gas/tic6x/pcr-relocs-undef.d: New test. + * gas/tic6x/pcr-relocs-undef.s: New test. + * gas/tic6x/reloc-bad-2.s: Update for pcr_offset. + * gas/tic6x/reloc-bad-2.l: Update for pcr_offset. + +2011-05-18 Nick Clifton + + * gas/arm/req.l: Updated expected warning message. + +2011-05-18 Tristan Gingold + + * gas/ppc/xcoff-dwsect-1-32.d: New test. + * gas/ppc/xcoff-dwsect-1-64.d: Ditto. + * gas/ppc/xcoff-dwsect-1.s: New file. + * gas/ppc/aix.exp (do_align_test): Add tests. + +2011-05-16 Hans-Peter Nilsson + + * gas/cris/rd-brokw-pic-1.d, gas/cris/rd-brokw-pic-2.d, + gas/cris/rd-fragtest-pic.d: Gate on targets cris-*-*elf* and + cris-*-linux-gnu. + * gas/cris/pic-err-2.s, gas/cris/pic-err-3.s: New tests. + +2011-05-14 Alan Modra + + * gas/all/gas.exp: Fix typo last change. + +2011-05-13 Alan Modra + + * gas/all/gas.exp: Remove some xfails on redef2 and redef3 tests. + Update comments. + * gas/hppa/unsorted/unsorted.exp: Run globalbug test on appropriate + targets rather than xfailing. + +2011-05-12 Matthew Gretton-Dann + + PR gas/12715 + * gas/arm/neon-const.s: Add testcase for 64-bit Neon constants. + * gas/arm/neon-const.d: Likewise. + +2011-05-11 Richard Sandiford + + * gas/mips/24k-branch-delay-1.d: Allow 64-bit addresses. Stub out + function names. + * gas/mips/24k-triple-stores-1.d: Likewise. + * gas/mips/24k-triple-stores-2.d: Likewise. + * gas/mips/24k-triple-stores-3.d: Likewise. + * gas/mips/24k-triple-stores-4.d: Likewise. + * gas/mips/24k-triple-stores-5.d: Likewise. + * gas/mips/24k-triple-stores-7.d: Likewise. + * gas/mips/24k-triple-stores-8.d: Likewise. + * gas/mips/24k-triple-stores-9.d: Likewise. + * gas/mips/24k-triple-stores-10.d: Likewise. + * gas/mips/24k-triple-stores-11.d: Likewise. + * gas/mips/24k-triple-stores-6.d: Likewise. Add -EB. + * gas/mips/mips.exp: Only run 24k-triple-stores-11.d on ELF targets. + +2011-05-11 Richard Sandiford + + * gas/mips/24k-branch-delay-1.d: Add -32 to assembler options. + * gas/mips/24k-triple-stores-1.d: Likewise. + * gas/mips/24k-triple-stores-2.d: Likewise. + * gas/mips/24k-triple-stores-3.d: Likewise. + * gas/mips/24k-triple-stores-4.d: Likewise. + * gas/mips/24k-triple-stores-5.d: Likewise. + * gas/mips/24k-triple-stores-6.d: Likewise. + * gas/mips/24k-triple-stores-7.d: Likewise. + * gas/mips/24k-triple-stores-8.d: Likewise. + * gas/mips/24k-triple-stores-9.d: Likewise. + * gas/mips/24k-triple-stores-10.d: Likewise. + * gas/mips/24k-triple-stores-11.d: Likewise. + +2011-05-11 Tejas Belagod + + * gas/arm/ld-sp-warn-cortex-m3.d: New test. + * gas/arm/ld-sp-warn-cortex-m3.l: New test. + * gas/arm/ld-sp-warn-cortex-m4.d: New test. + * gas/arm/ld-sp-warn-cortex-m4.l: New test. + * gas/arm/ld-sp-warn-v7.d: New test. + * gas/arm/ld-sp-warn-v7.l: New test. + * gas/arm/ld-sp-warn-v7a.d: New test. + * gas/arm/ld-sp-warn-v7a.l: New test. + * gas/arm/ld-sp-warn-v7e-m.l: New test. + * gas/arm/ld-sp-warn-v7em.d: New test. + * gas/arm/ld-sp-warn-v7m.d: New test. + * gas/arm/ld-sp-warn-v7m.l: New test. + * gas/arm/ld-sp-warn-v7r.d: New test. + * gas/arm/ld-sp-warn-v7r.l: New test. + * gas/arm/ld-sp-warn.s: New test. + +2010-05-10 Quentin Neill + + * gas/i386/i386.exp: Add new bdver2 test cases. + * gas/i386/nops-1-bdver2.d: New. + * gas/i386/x86-64-nops-1-bdver2.d: New. + +2011-05-09 Paul Brook + + * gas/tic6x/unwind-1.d: New test. + * gas/tic6x/unwind-1.s: New test. + * gas/tic6x/unwind-2.d: New test. + * gas/tic6x/unwind-2.s: New test. + * gas/tic6x/unwind-3.d: New test. + * gas/tic6x/unwind-3.s: New test. + * gas/tic6x/unwind-bad-1.d: New test. + * gas/tic6x/unwind-bad-1.s: New test. + * gas/tic6x/unwind-bad-1.l: New test. + * gas/tic6x/unwind-bad-2.d: New test. + * gas/tic6x/unwind-bad-2.s: New test. + * gas/tic6x/unwind-bad-2.l: New test. + +2011-04-29 Hans-Peter Nilsson + + * gas/elf/dwarf2-1.d, gas/elf/dwarf2-2.d: Adjust for change in + output format. + * gas/i386/dw2-compress-1.d: Ditto. + 2011-04-20 Catherine Moore David Ung @@ -485,7 +1180,7 @@ 2011-01-06 Paul Koning * gas/pdp11/pdp11.exp: Add run of absreloc. - + 2011-01-06 Paul Koning * gas/pdp11/absreloc.s: New. diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp index c7cc452..5bcefcf 100644 --- a/gas/testsuite/gas/all/gas.exp +++ b/gas/testsuite/gas/all/gas.exp @@ -130,20 +130,22 @@ case $target_triplet in { { z80-*-* } { } default { run_dump_test redef - # The next two tests can fail if the target does not convert fixups - # against ordinary symbols into relocations against section symbols. - # This is usually revealed by the error message: - # symbol `sym' required but not present - setup_xfail "*arm*-*-*aout*" "*arm*-*-*coff" \ - "*arm*-*-pe" "m68hc*-*-*" \ - "rx-*-*" "vax*-*-*" "z8k-*-*" + # These targets fail redef2 because they disallow redefined + # symbols on relocs. + setup_xfail "m68hc*-*-*" "rx-*-*" "vax*-*-*" "z8k-*-*" run_dump_test redef2 - setup_xfail "*-*-aix*" "bfin-*-*" "hppa*-*-hpux*" \ - "i\[3-7\]86-*-*coff" "i\[3-7\]86-*-*pe" "i\[3-7\]86-*-go32*" \ - "i\[3-7\]86-*-cygwin*" "i\[3-7\]86-*-mingw*" \ - "x86_64-*-*coff" "x86_64-*-*pe" \ - "x86_64-*-cygwin*" "x86_64-*-mingw*" \ - "m68hc*-*-*" "or32-*-*" "rx-*-*" "vax*-*-*" "z8k-*-*" + setup_xfail "m68hc*-*-*" "rx-*-*" "vax*-*-*" "z8k-*-*" + # rs6000-aix disallows redefinition via .comm. + setup_xfail "*-*-aix*" + # SOM uses a different syntax for .comm + setup_xfail "hppa*-*-hpux*" + # These targets fail redef3 because section contents for the + # word referencing the .comm sym is not zero and/or its reloc + # has a non-zero addend. Relaxing the test would hide real + # failures such as or32-elf. + setup_xfail "bfin-*-*" "i\[3-7\]86-*-*coff" \ + "i\[3-7\]86-*-*pe" "i\[3-7\]86-*-go32*" \ + "i\[3-7\]86-*-cygwin*" "i\[3-7\]86-*-mingw*" "x86_64-*-mingw*" run_dump_test redef3 gas_test_error "redef4.s" "" ".set for symbol already used as label" gas_test_error "redef5.s" "" ".set for symbol already defined through .comm" diff --git a/gas/testsuite/gas/arm/addthumb2err.d b/gas/testsuite/gas/arm/addthumb2err.d new file mode 100644 index 0000000..46532f3 --- /dev/null +++ b/gas/testsuite/gas/arm/addthumb2err.d @@ -0,0 +1,7 @@ +#name: bad Thumb2 Add{S} and Sub{S} instructions +#as: -march=armv7-a +#error-output: addthumb2err.l + +# Test some Thumb2 instructions: + +.*: +file format .*arm.* diff --git a/gas/testsuite/gas/arm/addthumb2err.l b/gas/testsuite/gas/arm/addthumb2err.l new file mode 100644 index 0000000..c77d551 --- /dev/null +++ b/gas/testsuite/gas/arm/addthumb2err.l @@ -0,0 +1,21 @@ +[^:]*: Assembler messages: +[^:]*:9: Error: shift value over 3 not allowed in thumb mode -- `add sp,sp,r0,LSL#4' +[^:]*:10: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,LSR#3' +[^:]*:11: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ASR#3' +[^:]*:12: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ROR#3' +[^:]*:13: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,RRX' +[^:]*:14: Error: shift value over 3 not allowed in thumb mode -- `adds sp,sp,r0,LSL#4' +[^:]*:15: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,LSR#3' +[^:]*:16: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ASR#3' +[^:]*:17: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ROR#3' +[^:]*:18: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,RRX' +[^:]*:19: Error: shift value over 3 not allowed in thumb mode -- `sub sp,sp,r0,LSL#4' +[^:]*:20: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,LSR#3' +[^:]*:21: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ASR#3' +[^:]*:22: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ROR#3' +[^:]*:23: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,RRX' +[^:]*:24: Error: shift value over 3 not allowed in thumb mode -- `subs sp,sp,r0,LSL#4' +[^:]*:25: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,LSR#3' +[^:]*:26: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ASR#3' +[^:]*:27: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ROR#3' +[^:]*:28: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,RRX' diff --git a/gas/testsuite/gas/arm/addthumb2err.s b/gas/testsuite/gas/arm/addthumb2err.s new file mode 100644 index 0000000..139c195 --- /dev/null +++ b/gas/testsuite/gas/arm/addthumb2err.s @@ -0,0 +1,28 @@ + .syntax unified + .text + .align 2 + .thumb + + # Test of invalid operands for ADD{S} and SUB{S} instructions + # in Thumb2 mode. The instruction form being testing + # involves having the first 2 operands be SP. + add sp, sp, r0, LSL #4 + add sp, sp, r0, LSR #3 + add sp, sp, r0, ASR #3 + add sp, sp, r0, ROR #3 + add sp, sp, r0, RRX + adds sp, sp, r0, LSL #4 + adds sp, sp, r0, LSR #3 + adds sp, sp, r0, ASR #3 + adds sp, sp, r0, ROR #3 + adds sp, sp, r0, RRX + sub sp, sp, r0, LSL #4 + sub sp, sp, r0, LSR #3 + sub sp, sp, r0, ASR #3 + sub sp, sp, r0, ROR #3 + sub sp, sp, r0, RRX + subs sp, sp, r0, LSL #4 + subs sp, sp, r0, LSR #3 + subs sp, sp, r0, ASR #3 + subs sp, sp, r0, ROR #3 + subs sp, sp, r0, RRX diff --git a/gas/testsuite/gas/arm/arm-idiv-bad.d b/gas/testsuite/gas/arm/arm-idiv-bad.d new file mode 100644 index 0000000..c3d7394 --- /dev/null +++ b/gas/testsuite/gas/arm/arm-idiv-bad.d @@ -0,0 +1,4 @@ +#name: Invalid V7 ARM DIV instructions +#as: -march=armv7-a +#error-output: arm-idiv-bad.l + diff --git a/gas/testsuite/gas/arm/arm-idiv-bad.l b/gas/testsuite/gas/arm/arm-idiv-bad.l new file mode 100644 index 0000000..6662cc7 --- /dev/null +++ b/gas/testsuite/gas/arm/arm-idiv-bad.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +[^:]*:4: Error: selected processor does not support ARM mode `sdiv r0,r0,r0' diff --git a/gas/testsuite/gas/arm/arm-idiv-bad.s b/gas/testsuite/gas/arm/arm-idiv-bad.s new file mode 100644 index 0000000..45e846e --- /dev/null +++ b/gas/testsuite/gas/arm/arm-idiv-bad.s @@ -0,0 +1,4 @@ + .text + .arm +label: + sdiv r0, r0, r0 diff --git a/gas/testsuite/gas/arm/arm-idiv.d b/gas/testsuite/gas/arm/arm-idiv.d new file mode 100644 index 0000000..a886d02 --- /dev/null +++ b/gas/testsuite/gas/arm/arm-idiv.d @@ -0,0 +1,9 @@ +#name: ARM Integer division instructions +#objdump: -dr --prefix-addresses --show-raw-insn + +.*: +file format .*arm.* + +Disassembly of section .text: +0+000 <[^>]*> e735f819 udiv r5, r9, r8 +0+004 <[^>]*> e739f715 udiv r9, r5, r7 +0+008 <[^>]*> e710f010 sdiv r0, r0, r0 diff --git a/gas/testsuite/gas/arm/arm-idiv.s b/gas/testsuite/gas/arm/arm-idiv.s new file mode 100644 index 0000000..626a67d --- /dev/null +++ b/gas/testsuite/gas/arm/arm-idiv.s @@ -0,0 +1,8 @@ +.arch armv7-a +.arch_extension idiv +.arm +udiv r5, r9, r8 +.cpu cortex-a15 +udiv r9, r5, r7 +.cpu cortex-r5 +sdiv r0, r0, r0 diff --git a/gas/testsuite/gas/arm/blx-bad.d b/gas/testsuite/gas/arm/blx-bad.d index 4a9fa85..9e52d5b 100644 --- a/gas/testsuite/gas/arm/blx-bad.d +++ b/gas/testsuite/gas/arm/blx-bad.d @@ -21,3 +21,4 @@ Disassembly of section .text: 18: 46c0 nop ; \(mov r8, r8\) 1a: f7ff eff1 ; instruction: 0xf7ffeff1 1e: f7ff eff0 blx 0 + 22: 46c0 nop ; \(mov r8, r8\) diff --git a/gas/testsuite/gas/arm/inst-po-be.d b/gas/testsuite/gas/arm/inst-po-be.d index e74c585..2a6fb40 100644 --- a/gas/testsuite/gas/arm/inst-po-be.d +++ b/gas/testsuite/gas/arm/inst-po-be.d @@ -19,3 +19,4 @@ Disassembly of section .text: 00000014 <.text\+0x14> 4649 mov r1, r9 00000016 <.text\+0x16> ea4f 0109 mov.w r1, r9 0000001a <.text\+0x1a> ea4f 0109 mov.w r1, r9 +0000001e <.text\+0x1e> bf00 nop diff --git a/gas/testsuite/gas/arm/inst-po.d b/gas/testsuite/gas/arm/inst-po.d index 79d21ce..be912c8 100644 --- a/gas/testsuite/gas/arm/inst-po.d +++ b/gas/testsuite/gas/arm/inst-po.d @@ -17,3 +17,4 @@ Disassembly of section .text: 00000014 <.text\+0x14> 4649 mov r1, r9 00000016 <.text\+0x16> ea4f 0109 mov.w r1, r9 0000001a <.text\+0x1a> ea4f 0109 mov.w r1, r9 +0000001e <.text\+0x1e> bf00 nop diff --git a/gas/testsuite/gas/arm/inst.d b/gas/testsuite/gas/arm/inst.d index e61bbfd..d9bd700 100644 --- a/gas/testsuite/gas/arm/inst.d +++ b/gas/testsuite/gas/arm/inst.d @@ -130,7 +130,7 @@ Disassembly of section .text: 0+1d8 <[^>]*> e6942425 ? ldr r2, \[r4\], r5, lsr #8 0+1dc <[^>]*> e51f0008 ? ldr r0, \[pc, #-8\] ; 0+1dc <[^>]*> 0+1e0 <[^>]*> e5d43000 ? ldrb r3, \[r4\] -0+1e4 <[^>]*> 14f85000 ? ldrbtne r5, \[r8\] +0+1e4 <[^>]*> 14f85000 ? ldrbtne r5, \[r8\], #0 0+1e8 <[^>]*> e5810000 ? str r0, \[r1\] 0+1ec <[^>]*> e7811002 ? str r1, \[r1, r2\] 0+1f0 <[^>]*> e7a43003 ? str r3, \[r4, r3\]! @@ -142,7 +142,7 @@ Disassembly of section .text: 0+208 <[^>]*> e6a42425 ? strt r2, \[r4\], r5, lsr #8 0+20c <[^>]*> e50f1004 ? str r1, \[pc, #-4\] ; 0+210 <[^>]*> 0+210 <[^>]*> e5c71000 ? strb r1, \[r7\] -0+214 <[^>]*> e4e02000 ? strbt r2, \[r0\] +0+214 <[^>]*> e4e02000 ? strbt r2, \[r0\], #0 0+218 <[^>]*> e8900002 ? ldm r0, {r1} 0+21c <[^>]*> 09920038 ? ldmibeq r2, {r3, r4, r5} 0+220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^ diff --git a/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.d b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.d new file mode 100644 index 0000000..c1f89b4 --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.d @@ -0,0 +1,4 @@ +# name: Erratum 752419: Warn Loads with writebacks to SP (cortex m3) +# as: -mcpu=cortex-m3 +# source: ld-sp-warn.s +# error-output: ld-sp-warn-cortex-m3.l diff --git a/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.l b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.l new file mode 100644 index 0000000..48ac57f --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.l @@ -0,0 +1,5 @@ +[^:]*: Assembler messages: +[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!' +[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!' diff --git a/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.d b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.d new file mode 100644 index 0000000..0ae6d98 --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.d @@ -0,0 +1,4 @@ +# name: Erratum 752419: Warn Loads with writebacks to SP (cortex m4) +# as: -mcpu=cortex-m4 +# source: ld-sp-warn.s +# error-output: ld-sp-warn-cortex-m4.l diff --git a/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.l b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.l new file mode 100644 index 0000000..48ac57f --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.l @@ -0,0 +1,5 @@ +[^:]*: Assembler messages: +[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!' +[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!' diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7.d b/gas/testsuite/gas/arm/ld-sp-warn-v7.d new file mode 100644 index 0000000..4d3b0a5 --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-v7.d @@ -0,0 +1,4 @@ +# name: Erratum 752419: Warn Loads with writebacks to SP (v7) +# as: -march=armv7 +# source: ld-sp-warn.s +# error-output: ld-sp-warn-v7.l diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7.l b/gas/testsuite/gas/arm/ld-sp-warn-v7.l new file mode 100644 index 0000000..48ac57f --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-v7.l @@ -0,0 +1,5 @@ +[^:]*: Assembler messages: +[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!' +[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!' diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7a.d b/gas/testsuite/gas/arm/ld-sp-warn-v7a.d new file mode 100644 index 0000000..2f7dc8d --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-v7a.d @@ -0,0 +1,4 @@ +# name: Erratum 752419: Warn Loads with writebacks to SP (v7a) +# as: -march=armv7-a +# source: ld-sp-warn.s +# error-output: ld-sp-warn-v7a.l diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7a.l b/gas/testsuite/gas/arm/ld-sp-warn-v7a.l new file mode 100644 index 0000000..40f0999 --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-v7a.l @@ -0,0 +1,3 @@ +[^:]*: Assembler messages: +[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!' +[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!' diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7e-m.l b/gas/testsuite/gas/arm/ld-sp-warn-v7e-m.l new file mode 100644 index 0000000..48ac57f --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-v7e-m.l @@ -0,0 +1,5 @@ +[^:]*: Assembler messages: +[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!' +[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!' diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7em.d b/gas/testsuite/gas/arm/ld-sp-warn-v7em.d new file mode 100644 index 0000000..d69368e --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-v7em.d @@ -0,0 +1,4 @@ +# name: Erratum 752419: Warn Loads with writebacks to SP (v7em) +# as: -march=armv7e-m +# source: ld-sp-warn.s +# error-output: ld-sp-warn-v7e-m.l diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7m.d b/gas/testsuite/gas/arm/ld-sp-warn-v7m.d new file mode 100644 index 0000000..f268357 --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-v7m.d @@ -0,0 +1,4 @@ +# name: Erratum 752419: Warn Loads with writebacks to SP (v7m) +# as: -march=armv7m +# source: ld-sp-warn.s +# error-output: ld-sp-warn-v7m.l diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7m.l b/gas/testsuite/gas/arm/ld-sp-warn-v7m.l new file mode 100644 index 0000000..48ac57f --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-v7m.l @@ -0,0 +1,5 @@ +[^:]*: Assembler messages: +[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!' +[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!' diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7r.d b/gas/testsuite/gas/arm/ld-sp-warn-v7r.d new file mode 100644 index 0000000..59a5db4 --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-v7r.d @@ -0,0 +1,4 @@ +# name: Erratum 752419: Warn Loads with writebacks to SP (v7r) +# as: -march=armv7-r +# source: ld-sp-warn.s +# error-output: ld-sp-warn-v7r.l diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7r.l b/gas/testsuite/gas/arm/ld-sp-warn-v7r.l new file mode 100644 index 0000000..40f0999 --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn-v7r.l @@ -0,0 +1,3 @@ +[^:]*: Assembler messages: +[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!' +[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!' diff --git a/gas/testsuite/gas/arm/ld-sp-warn.d b/gas/testsuite/gas/arm/ld-sp-warn.d new file mode 100644 index 0000000..dcbbdd2 --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn.d @@ -0,0 +1,3 @@ +# name: Erratum 752419: Warn Loads with writebacks to SP +# source: ld-sp-warn.s +# error-output: ld-sp-warn.l diff --git a/gas/testsuite/gas/arm/ld-sp-warn.l b/gas/testsuite/gas/arm/ld-sp-warn.l new file mode 100644 index 0000000..48ac57f --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn.l @@ -0,0 +1,5 @@ +[^:]*: Assembler messages: +[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled. +[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!' +[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!' diff --git a/gas/testsuite/gas/arm/ld-sp-warn.s b/gas/testsuite/gas/arm/ld-sp-warn.s new file mode 100644 index 0000000..87e3e95 --- /dev/null +++ b/gas/testsuite/gas/arm/ld-sp-warn.s @@ -0,0 +1,8 @@ +.syntax unified +.thumb +ldr sp, [r0, #16]! +ldr sp, [r1], #8 +ldr sp, [r0, #16] +ldr r1, [r0, #16] +ldr r1, [r0, r1]! +ldrsb sp, [r2, #16]! diff --git a/gas/testsuite/gas/arm/ldr-global.d b/gas/testsuite/gas/arm/ldr-global.d new file mode 100644 index 0000000..3528d4e --- /dev/null +++ b/gas/testsuite/gas/arm/ldr-global.d @@ -0,0 +1,14 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: PC-relative LDR from global + +.*: +file format .*arm.* + +Disassembly of section .text: +0+00 <[^>]*> e59f0010 ? ldr r0, \[pc, #16\] ; 0+18 <[^>]*> +0+04 <[^>]*> e1df00fc ? ldrsh r0, \[pc, #12\] ; 0+18 <[^>]*> +0+08 <[^>]*> ed9f0a02 ? vldr s0, \[pc, #8\] ; 0+18 <[^>]*> +0+0c <[^>]*> 4802 ? ldr r0, \[pc, #8\] ; \(0+18 <[^>]*>\) +0+0e <[^>]*> 4802 ? ldr r0, \[pc, #8\] ; \(0+18 <[^>]*>\) +0+10 <[^>]*> ed9f 0a01 ? vldr s0, \[pc, #4\] ; 0+18 <[^>]*> +0+14 <[^>]*> f8df 0000 ? ldr\.w r0, \[pc\] ; 0+18 <[^>]*> +#... diff --git a/gas/testsuite/gas/arm/ldr-global.s b/gas/testsuite/gas/arm/ldr-global.s new file mode 100644 index 0000000..ef3960c --- /dev/null +++ b/gas/testsuite/gas/arm/ldr-global.s @@ -0,0 +1,22 @@ +@ Test pc-relative loads from global objects defined in the same text segment. +@ See tc-arm.c:arm_force_relocation. +.arch armv7-a +.fpu vfp +.syntax unified +.text +foo_arm: + ldr r0, bar + ldrsh r0, bar + vldr s0, bar +.thumb +foo_thumb: + ldr r0, bar + ldr.n r0, bar + vldr s0, bar + ldr.w r0, bar + +.align 2 +.globl bar +bar: + .word 42 + diff --git a/gas/testsuite/gas/arm/ldrd-unpredictable.d b/gas/testsuite/gas/arm/ldrd-unpredictable.d new file mode 100644 index 0000000..10561b8 --- /dev/null +++ b/gas/testsuite/gas/arm/ldrd-unpredictable.d @@ -0,0 +1,2 @@ +# name: Unpredictable LDRD and STRD instructions. - ARM +# error-output: ldrd-unpredictable.l diff --git a/gas/testsuite/gas/arm/ldrd-unpredictable.l b/gas/testsuite/gas/arm/ldrd-unpredictable.l new file mode 100644 index 0000000..3271714 --- /dev/null +++ b/gas/testsuite/gas/arm/ldrd-unpredictable.l @@ -0,0 +1,7 @@ +[^:]*: Assembler messages: +[^:]*:6: Warning: index register overlaps transfer register +[^:]*:7: Warning: index register overlaps transfer register +[^:]*:8: Warning: source register same as write-back base +[^:]*:9: Warning: base register written back, and overlaps second transfer register +[^:]*:13: Warning: source register same as write-back base +[^:]*:14: Warning: base register written back, and overlaps second transfer register diff --git a/gas/testsuite/gas/arm/ldrd-unpredictable.s b/gas/testsuite/gas/arm/ldrd-unpredictable.s new file mode 100644 index 0000000..9bc2075 --- /dev/null +++ b/gas/testsuite/gas/arm/ldrd-unpredictable.s @@ -0,0 +1,14 @@ +.syntax unified + +.arm + +@ LDRD +ldrd r0,r1,[r0,r1] @ unpredictable +ldrd r0,r1,[r1,r0] @ ditto +ldrd r0,r1,[r0,r2]! @ ditto +ldrd r0,r1,[r1,r2]! @ ditto + +@ STRD + +strd r0,r1,[r0,r2]! @ ditto +strd r0,r1,[r1,r2]! @ ditto diff --git a/gas/testsuite/gas/arm/ldst-offset0.d b/gas/testsuite/gas/arm/ldst-offset0.d new file mode 100644 index 0000000..5c1f88b --- /dev/null +++ b/gas/testsuite/gas/arm/ldst-offset0.d @@ -0,0 +1,51 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: ARM load/store with 0 offset +#as: + +# Test the standard ARM instructions: + +.*: +file format .*arm.* + +Disassembly of section .text: +0+000 <[^>]*> e5121000 ldr r1, \[r2, #-0\] +0+004 <[^>]*> e5121000 ldr r1, \[r2, #-0\] +0+008 <[^>]*> e5921000 ldr r1, \[r2\] +0+00c <[^>]*> e5921000 ldr r1, \[r2\] +0+010 <[^>]*> e5321000 ldr r1, \[r2, #-0\]! +0+014 <[^>]*> e5321000 ldr r1, \[r2, #-0\]! +0+018 <[^>]*> e5b21000 ldr r1, \[r2, #0\]! +0+01c <[^>]*> e5b21000 ldr r1, \[r2, #0\]! +0+020 <[^>]*> e4121000 ldr r1, \[r2\], #-0 +0+024 <[^>]*> e4121000 ldr r1, \[r2\], #-0 +0+028 <[^>]*> e4921000 ldr r1, \[r2\], #0 +0+02c <[^>]*> e4921000 ldr r1, \[r2\], #0 +0+030 <[^>]*> e5b21000 ldr r1, \[r2, #0\]! +0+034 <[^>]*> e5921000 ldr r1, \[r2\] +0+038 <[^>]*> e4f21000 ldrbt r1, \[r2\], #0 +0+03c <[^>]*> e4721000 ldrbt r1, \[r2\], #-0 +0+040 <[^>]*> e4f21000 ldrbt r1, \[r2\], #0 +0+044 <[^>]*> 5d565300 ldclpl 3, cr5, \[r6, #-0\] +0+048 <[^>]*> 5dd65300 ldclpl 3, cr5, \[r6\] +0+04c <[^>]*> e5021000 str r1, \[r2, #-0\] +0+050 <[^>]*> e5021000 str r1, \[r2, #-0\] +0+054 <[^>]*> e5821000 str r1, \[r2\] +0+058 <[^>]*> e5821000 str r1, \[r2\] +0+05c <[^>]*> e5221000 str r1, \[r2, #-0\]! +0+060 <[^>]*> e5221000 str r1, \[r2, #-0\]! +0+064 <[^>]*> e5a21000 str r1, \[r2, #0\]! +0+068 <[^>]*> e5a21000 str r1, \[r2, #0\]! +0+06c <[^>]*> e4021000 str r1, \[r2\], #-0 +0+070 <[^>]*> e4021000 str r1, \[r2\], #-0 +0+074 <[^>]*> e4821000 str r1, \[r2\], #0 +0+078 <[^>]*> e4821000 str r1, \[r2\], #0 +0+07c <[^>]*> e5a21000 str r1, \[r2, #0\]! +0+080 <[^>]*> e5821000 str r1, \[r2\] +0+084 <[^>]*> e4e21000 strbt r1, \[r2\], #0 +0+088 <[^>]*> e4621000 strbt r1, \[r2\], #-0 +0+08c <[^>]*> e4e21000 strbt r1, \[r2\], #0 +0+090 <[^>]*> 5d465300 stclpl 3, cr5, \[r6, #-0\] +0+094 <[^>]*> 5dc65300 stclpl 3, cr5, \[r6\] +0+098 <[^>]*> e59f0004 ldr r0, \[pc, #4\] ; .* +0+09c <[^>]*> e59f0000 ldr r0, \[pc\] ; .* +0+0a0 <[^>]*> e51f0004 ldr r0, \[pc, #-4\] ; .* +0+0a4 <[^>]*> 00000000 .word 0x00000000 diff --git a/gas/testsuite/gas/arm/ldst-offset0.s b/gas/testsuite/gas/arm/ldst-offset0.s new file mode 100644 index 0000000..9b0900f --- /dev/null +++ b/gas/testsuite/gas/arm/ldst-offset0.s @@ -0,0 +1,66 @@ +@ Test file for ARM load/store instructions with 0 offset + + .text + .syntax unified + ldr r1, [r2, #-0] + ldr r1, [r2, #-1+1] + + ldr r1, [r2, #1-1] + ldr r1, [r2, #0] + + ldr r1, [r2, #-0]! + ldr r1, [r2, #-1+1]! + + ldr r1, [r2, #1-1]! + ldr r1, [r2, #0]! + + ldr r1, [r2], #-0 + ldr r1, [r2], #-1+1 + + ldr r1, [r2], #1-1 + ldr r1, [r2], #0 + + ldr r1, [r2]! + ldr r1, [r2] + + ldrbt r1, [r2], #0 + ldrbt r1, [r2], #-0 + + ldrbt r1, [r2] + + ldclpl p3, c5, [r6, #-0] + ldclpl p3, c5, [r6, #0] + + str r1, [r2, #-0] + str r1, [r2, #-1+1] + + str r1, [r2, #1-1] + str r1, [r2, #0] + + str r1, [r2, #-0]! + str r1, [r2, #-1+1]! + + str r1, [r2, #1-1]! + str r1, [r2, #0]! + + str r1, [r2], #-0 + str r1, [r2], #-1+1 + + str r1, [r2], #1-1 + str r1, [r2], #0 + + str r1, [r2]! + str r1, [r2] + + strbt r1, [r2], #0 + strbt r1, [r2], #-0 + + strbt r1, [r2] + + stclpl p3, c5, [r6, #-0] + stclpl p3, c5, [r6, #0] + + ldr r0,1f + ldr r0,1f + ldr r0,1f +1: .word 0 diff --git a/gas/testsuite/gas/arm/neon-const.d b/gas/testsuite/gas/arm/neon-const.d index a1bc97c..6c46930 100644 --- a/gas/testsuite/gas/arm/neon-const.d +++ b/gas/testsuite/gas/arm/neon-const.d @@ -263,3 +263,4 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> f3850f5f vmov\.f32 q0, #-0\.484375 ; 0xbef80000 0[0-9a-f]+ <[^>]+> f3860f5f vmov\.f32 q0, #-0\.96875 ; 0xbf780000 0[0-9a-f]+ <[^>]+> f3870f5f vmov\.f32 q0, #-1\.9375 ; 0xbff80000 +0[0-9a-f]+ <[^>]+> f3879e3f vmov\.i64 d9, #0xffffffffffffffff diff --git a/gas/testsuite/gas/arm/neon-const.s b/gas/testsuite/gas/arm/neon-const.s index a6fb550..aaaf144 100644 --- a/gas/testsuite/gas/arm/neon-const.s +++ b/gas/testsuite/gas/arm/neon-const.s @@ -295,3 +295,5 @@ vmov.f32 q0, -0.484375 vmov.f32 q0, -0.96875 vmov.f32 q0, -1.9375 + + vmov.i64 d9, #0xffffffffffffffff diff --git a/gas/testsuite/gas/arm/offset-1.d b/gas/testsuite/gas/arm/offset-1.d new file mode 100644 index 0000000..bec9386 --- /dev/null +++ b/gas/testsuite/gas/arm/offset-1.d @@ -0,0 +1,23 @@ +# name: MINUS ZERO OFFSET +# as: +# objdump: -dr --prefix-addresses --show-raw-insn + +.*: +file format .*arm.* + +Disassembly of section .text: +0+00 <[^>]+> e51f0000 ? ldr r0, \[pc, #-0\] ; 0+8 <[^>]+> +0+04 <[^>]+> e59f0000 ? ldr r0, \[pc\] ; 0+c <[^>]+> +0+08 <[^>]+> e5110000 ? ldr r0, \[r1, #-0\] +0+0c <[^>]+> e5910000 ? ldr r0, \[r1\] +0+10 <[^>]+> e4110000 ? ldr r0, \[r1\], #-0 +0+14 <[^>]+> e4910000 ? ldr r0, \[r1\], #0 +0+18 <[^>]+> e15f00b0 ? ldrh r0, \[pc, #-0\] ; 0+20 <[^>]+> +0+1c <[^>]+> e1df00b0 ? ldrh r0, \[pc\] ; 0+24 <[^>]+> +0+20 <[^>]+> e15100b0 ? ldrh r0, \[r1, #-0\] +0+24 <[^>]+> e1d100b0 ? ldrh r0, \[r1\] +0+28 <[^>]+> e05100b0 ? ldrh r0, \[r1\], #-0 +0+2c <[^>]+> e0d100b0 ? ldrh r0, \[r1\], #0 +0+30 <[^>]+> e5310000 ? ldr r0, \[r1, #-0\]! +0+34 <[^>]+> e5b10000 ? ldr r0, \[r1, #0\]! +0+38 <[^>]+> e17100b0 ? ldrh r0, \[r1, #-0\]! +0+3c <[^>]+> e1f100b0 ? ldrh r0, \[r1, #0\]! diff --git a/gas/testsuite/gas/arm/offset-1.s b/gas/testsuite/gas/arm/offset-1.s new file mode 100644 index 0000000..3e99317 --- /dev/null +++ b/gas/testsuite/gas/arm/offset-1.s @@ -0,0 +1,16 @@ + ldr r0, [pc, #-0] + ldr r0, [pc, #0] + ldr r0, [r1, #-0] + ldr r0, [r1, #0] + ldr r0, [r1], #-0 + ldr r0, [r1], #0 + ldrh r0, [pc, #-0] + ldrh r0, [pc, #0] + ldrh r0, [r1, #-0] + ldrh r0, [r1, #0] + ldrh r0, [r1], #-0 + ldrh r0, [r1], #0 + ldr r0, [r1, #-0]! + ldr r0, [r1, #0]! + ldrh r0, [r1, #-0]! + ldrh r0, [r1, #0]! diff --git a/gas/testsuite/gas/arm/req.l b/gas/testsuite/gas/arm/req.l index 293db4d..7e76764 100644 --- a/gas/testsuite/gas/arm/req.l +++ b/gas/testsuite/gas/arm/req.l @@ -1,4 +1,4 @@ [^:]*: Assembler messages: [^:]*:18: Error: ARM register expected -- `add foo,foo,foo' -[^:]*:21: Warning: ignoring attempt to undefine built-in register 'r0' +[^:]*:21: Warning: ignoring attempt to use .unreq on fixed register name: 'r0' [^:]*:41: Warning: ignoring redefinition of register alias 'FOO' diff --git a/gas/testsuite/gas/arm/shift-bad.d b/gas/testsuite/gas/arm/shift-bad.d new file mode 100644 index 0000000..7d4cac1 --- /dev/null +++ b/gas/testsuite/gas/arm/shift-bad.d @@ -0,0 +1,3 @@ +# name: PR 12854: Extraneous shifts +# as: +# error-output: shift-bad.l diff --git a/gas/testsuite/gas/arm/shift-bad.l b/gas/testsuite/gas/arm/shift-bad.l new file mode 100644 index 0000000..3c9fb6e --- /dev/null +++ b/gas/testsuite/gas/arm/shift-bad.l @@ -0,0 +1,9 @@ +.*shift-bad.s: Assembler messages: +.*shift-bad.s:2: Error: extraneous shift as part of operand to shift insn -- `asr r0,r1,r2,ror#5' +.*shift-bad.s:3: Error: extraneous shift as part of operand to shift insn -- `ror r0,r1,r2,lsl r3' +.*shift-bad.s:7: Error: extraneous shift as part of operand to shift insn -- `ror r0,r0,r2,lsl#1' +.*shift-bad.s:8: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,lsl#1' +.*shift-bad.s:9: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,asr r0' +.*shift-bad.s:13: Error: extraneous shift as part of operand to shift insn -- `ror r0,r1,r2,lsl#1' +.*shift-bad.s:14: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,lsl#1' +.*shift-bad.s:15: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,asr r0' diff --git a/gas/testsuite/gas/arm/shift-bad.s b/gas/testsuite/gas/arm/shift-bad.s new file mode 100644 index 0000000..6ee069b --- /dev/null +++ b/gas/testsuite/gas/arm/shift-bad.s @@ -0,0 +1,15 @@ + + asr r0, r1, r2, ror #5 + ror r0, r1, r2, lsl r3 + + .thumb_func +foo: + ror r0, r0, r2, lsl #1 + lsl r0, r0, r2, lsl #1 + lsl r0, r0, r2, asr r0 + + .syntax unified + + ror r0, r1, r2, lsl #1 + lsl r0, r1, r2, lsl #1 + lsl r0, r1, r2, asr r0 diff --git a/gas/testsuite/gas/arm/strex-bad-t.d b/gas/testsuite/gas/arm/strex-bad-t.d new file mode 100644 index 0000000..f5ec4c5 --- /dev/null +++ b/gas/testsuite/gas/arm/strex-bad-t.d @@ -0,0 +1,3 @@ +# name: Bad addressing modes STREXH/STREXB. - THUMB +# error-output: strex-bad-t.l + diff --git a/gas/testsuite/gas/arm/strex-bad-t.l b/gas/testsuite/gas/arm/strex-bad-t.l new file mode 100644 index 0000000..a490096 --- /dev/null +++ b/gas/testsuite/gas/arm/strex-bad-t.l @@ -0,0 +1,24 @@ +[^:]*: Assembler messages: +[^:]*:7: Error: r15 not allowed here -- `strexh r0,r1,#0x04' +[^:]*:8: Error: instruction does not accept this addressing mode -- `strexh r0,r1,\[r2\],#0x04' +[^:]*:9: Error: instruction does not accept this addressing mode -- `strexh r0,r1,\[r2,#\+0x00\]!' +[^:]*:10: Error: instruction does not accept this addressing mode -- `strexh r0,r1,\[r2,r3\]' +[^:]*:11: Error: registers may not be the same -- `strexh r0,r0,\[r1]' +[^:]*:12: Error: instruction does not accept this addressing mode -- `strexh r0,r1,\[r2,#-0x04\]' +[^:]*:13: Error: r15 not allowed here -- `strexh r0,r1,\[r15\]' +[^:]*:14: Error: r13 not allowed here -- `strexh r0,r13,\[r1\]' +[^:]*:15: Error: r15 not allowed here -- `strexh r0,r15,\[r1\]' +[^:]*:16: Error: r13 not allowed here -- `strexh r13,r0,\[r1\]' +[^:]*:17: Error: r15 not allowed here -- `strexh r15,r0,\[r1\]' +[^:]*:21: Error: r15 not allowed here -- `strexb r0,r1,#0x04' +[^:]*:22: Error: instruction does not accept this addressing mode -- `strexb r0,r1,\[r2\],#0x04' +[^:]*:23: Error: instruction does not accept this addressing mode -- `strexb r0,r1,\[r2,#\+0x00\]!' +[^:]*:24: Error: instruction does not accept this addressing mode -- `strexb r0,r1,\[r2,r3\]' +[^:]*:25: Error: registers may not be the same -- `strexb r0,r0,\[r1]' +[^:]*:26: Error: instruction does not accept this addressing mode -- `strexb r0,r1,\[r2,#-0x04\]' +[^:]*:27: Error: r15 not allowed here -- `strexb r0,r1,\[r15\]' +[^:]*:28: Error: r13 not allowed here -- `strexb r0,r13,\[r1\]' +[^:]*:29: Error: r15 not allowed here -- `strexb r0,r15,\[r1\]' +[^:]*:30: Error: r13 not allowed here -- `strexb r13,r0,\[r1\]' +[^:]*:31: Error: r15 not allowed here -- `strexb r15,r0,\[r1\]' + diff --git a/gas/testsuite/gas/arm/strex-bad-t.s b/gas/testsuite/gas/arm/strex-bad-t.s new file mode 100644 index 0000000..1466ca5 --- /dev/null +++ b/gas/testsuite/gas/arm/strex-bad-t.s @@ -0,0 +1,32 @@ +.syntax unified + +.thumb + +@ strexh + +strexh r0, r1, #0x04 +strexh r0, r1, [r2], #0x04 +strexh r0, r1, [r2, #+0x00]! +strexh r0, r1, [r2, r3] +strexh r0, r0, [r1] +strexh r0, r1, [r2, #-0x04] +strexh r0, r1, [r15] +strexh r0, r13, [r1] +strexh r0, r15, [r1] +strexh r13, r0, [r1] +strexh r15, r0, [r1] + +@ strexb + +strexb r0, r1, #0x04 +strexb r0, r1, [r2], #0x04 +strexb r0, r1, [r2, #+0x00]! +strexb r0, r1, [r2, r3] +strexb r0, r0, [r1] +strexb r0, r1, [r2, #-0x04] +strexb r0, r1, [r15] +strexb r0, r13, [r1] +strexb r0, r15, [r1] +strexb r13, r0, [r1] +strexb r15, r0, [r1] + diff --git a/gas/testsuite/gas/arm/strex-t.d b/gas/testsuite/gas/arm/strex-t.d new file mode 100644 index 0000000..c38eda6 --- /dev/null +++ b/gas/testsuite/gas/arm/strex-t.d @@ -0,0 +1,14 @@ +# name: STREXH/STREXB. - Thumb +# objdump: -dr --prefix-address --show-raw-insn +# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd + +.*: +file format .*arm.* + +Disassembly of section \.text: +0+00 <[^>]+> e8c2 1f50 strexh r0, r1, \[r2\] +0+04 <[^>]+> e8c2 1f50 strexh r0, r1, \[r2\] +0+08 <[^>]+> e8cd 1f50 strexh r0, r1, \[sp\] +0+0c <[^>]+> e8c2 1f40 strexb r0, r1, \[r2\] +0+10 <[^>]+> e8c2 1f40 strexb r0, r1, \[r2\] +0+14 <[^>]+> e8cd 1f40 strexb r0, r1, \[sp\] + diff --git a/gas/testsuite/gas/arm/strex-t.s b/gas/testsuite/gas/arm/strex-t.s new file mode 100644 index 0000000..d8cddfc --- /dev/null +++ b/gas/testsuite/gas/arm/strex-t.s @@ -0,0 +1,10 @@ +.syntax unified +.thumb + strexh r0, r1, [r2] + strexh r0, r1, [r2, #+0x00] + strexh r0, r1, [r13] + + strexb r0, r1, [r2] + strexb r0, r1, [r2, #+0x00] + strexb r0, r1, [r13] + diff --git a/gas/testsuite/gas/arm/t2-branch-global.d b/gas/testsuite/gas/arm/t2-branch-global.d new file mode 100644 index 0000000..5850d6b --- /dev/null +++ b/gas/testsuite/gas/arm/t2-branch-global.d @@ -0,0 +1,14 @@ +#name: Thumb-2 branch to constant address +#This test is only valid on ELF based ports. +#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* +#objdump: -rd + + +.*: +file format.*arm.* + + +Disassembly of section .text: + +00000000 : + 0: f... b... b\.w .* + 0: R_ARM_THM_JUMP24 \*ABS\*.* diff --git a/gas/testsuite/gas/arm/t2-branch-global.s b/gas/testsuite/gas/arm/t2-branch-global.s new file mode 100644 index 0000000..223d924 --- /dev/null +++ b/gas/testsuite/gas/arm/t2-branch-global.s @@ -0,0 +1,5 @@ +.thumb +.arch armv7 +.syntax unified +foo: + b 0x10 @ Assembler must not relax this diff --git a/gas/testsuite/gas/arm/thumb-b-bad.d b/gas/testsuite/gas/arm/thumb-b-bad.d new file mode 100644 index 0000000..958773d --- /dev/null +++ b/gas/testsuite/gas/arm/thumb-b-bad.d @@ -0,0 +1,4 @@ +#name: Out of range Thumb branches (PR 12848) +#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* +#as: -mthumb +#error-output: thumb-b-bad.l diff --git a/gas/testsuite/gas/arm/thumb-b-bad.l b/gas/testsuite/gas/arm/thumb-b-bad.l new file mode 100644 index 0000000..0c76b4d --- /dev/null +++ b/gas/testsuite/gas/arm/thumb-b-bad.l @@ -0,0 +1,6 @@ +[^:]*: Assembler messages: +[^:]*:9: Error: branch out of range +[^:]*:5: Error: branch out of range +[^:]*:8: Error: branch out of range +[^:]*:11: Error: branch out of range +[^:]*:15: Error: branch out of range diff --git a/gas/testsuite/gas/arm/thumb-b-bad.s b/gas/testsuite/gas/arm/thumb-b-bad.s new file mode 100644 index 0000000..7306b79 --- /dev/null +++ b/gas/testsuite/gas/arm/thumb-b-bad.s @@ -0,0 +1,17 @@ +.syntax unified + +.type f, %function +e: + b . - 0xfffffe @ gas mis-assembles as a forward branch + b . - 0xfffffc + b . + 0x1000002 + b . + 0x1000004 @ gas mis-assembles as a backward branch + b.w . + 0x2000002 @ gas mis-assembles as a backward branch + +f: b g @ gas mis-assembles as a backward branch + + .space 0x1fffff0 + +g: b f @ gas mis-assembles as a forward branch + + diff --git a/gas/testsuite/gas/arm/vcvt-bad.d b/gas/testsuite/gas/arm/vcvt-bad.d new file mode 100644 index 0000000..20b7798 --- /dev/null +++ b/gas/testsuite/gas/arm/vcvt-bad.d @@ -0,0 +1,4 @@ +#name: Invalid Immediate field for VCVT (between floating-point and fixed-point, VFP) +#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd +#error-output: vcvt-bad.l +#as: -mcpu=cortex-a8 -mfpu=vfpv3 diff --git a/gas/testsuite/gas/arm/vcvt-bad.l b/gas/testsuite/gas/arm/vcvt-bad.l new file mode 100644 index 0000000..0c4f542 --- /dev/null +++ b/gas/testsuite/gas/arm/vcvt-bad.l @@ -0,0 +1,41 @@ +[^:]*: Assembler messages: +[^:]*:3: Error: immediate value out of range -- `vcvt.f64.u16 d1,d1,#-1' +[^:]*:4: Error: immediate value out of range -- `vcvt.f64.u16 d1,d1,#65535' +[^:]*:5: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.f64.u16 d1,d1,#17' +[^:]*:6: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.f64.u32 d1,d1,#0' +[^:]*:7: Error: immediate value out of range -- `vcvt.f64.u32 d1,d1,#33' +[^:]*:9: Error: immediate value out of range -- `vcvt.f32.u16 s1,s1,#-1' +[^:]*:10: Error: immediate value out of range -- `vcvt.f32.u16 s1,s1,#65535' +[^:]*:11: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.f32.u16 s1,s1,#17' +[^:]*:12: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.f32.u32 s1,s1,#0' +[^:]*:13: Error: immediate value out of range -- `vcvt.f32.u32 s1,s1,#33' +[^:]*:15: Error: immediate value out of range -- `vcvt.u16.f64 d1,d1,#-1' +[^:]*:16: Error: immediate value out of range -- `vcvt.u16.f64 d1,d1,#65535' +[^:]*:17: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.u16.f64 d1,d1,#17' +[^:]*:18: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.u32.f64 d1,d1,#0' +[^:]*:19: Error: immediate value out of range -- `vcvt.u32.f64 d1,d1,#33' +[^:]*:21: Error: immediate value out of range -- `vcvt.u16.f32 s1,s1,#-1' +[^:]*:22: Error: immediate value out of range -- `vcvt.u16.f32 s1,s1,#65535' +[^:]*:23: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.u16.f32 s1,s1,#17' +[^:]*:24: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.u32.f32 s1,s1,#0' +[^:]*:25: Error: immediate value out of range -- `vcvt.u32.f32 s1,s1,#33' +[^:]*:27: Error: immediate value out of range -- `vcvt.f64.s16 d1,d1,#-1' +[^:]*:28: Error: immediate value out of range -- `vcvt.f64.s16 d1,d1,#65535' +[^:]*:29: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.f64.s16 d1,d1,#17' +[^:]*:30: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.f64.s32 d1,d1,#0' +[^:]*:31: Error: immediate value out of range -- `vcvt.f64.s32 d1,d1,#33' +[^:]*:33: Error: immediate value out of range -- `vcvt.f32.s16 s1,s1,#-1' +[^:]*:34: Error: immediate value out of range -- `vcvt.f32.s16 s1,s1,#65535' +[^:]*:35: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.f32.s16 s1,s1,#17' +[^:]*:36: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.f32.s32 s1,s1,#0' +[^:]*:37: Error: immediate value out of range -- `vcvt.f32.s32 s1,s1,#33' +[^:]*:39: Error: immediate value out of range -- `vcvt.s16.f64 d1,d1,#-1' +[^:]*:40: Error: immediate value out of range -- `vcvt.s16.f64 d1,d1,#65535' +[^:]*:41: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.s16.f64 d1,d1,#17' +[^:]*:42: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.s32.f64 d1,d1,#0' +[^:]*:43: Error: immediate value out of range -- `vcvt.s32.f64 d1,d1,#33' +[^:]*:45: Error: immediate value out of range -- `vcvt.s16.f32 s1,s1,#-1' +[^:]*:46: Error: immediate value out of range -- `vcvt.s16.f32 s1,s1,#65535' +[^:]*:47: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.s16.f32 s1,s1,#17' +[^:]*:48: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.s32.f32 s1,s1,#0' +[^:]*:49: Error: immediate value out of range -- `vcvt.s32.f32 s1,s1,#33' diff --git a/gas/testsuite/gas/arm/vcvt-bad.s b/gas/testsuite/gas/arm/vcvt-bad.s new file mode 100644 index 0000000..273bbc6 --- /dev/null +++ b/gas/testsuite/gas/arm/vcvt-bad.s @@ -0,0 +1,51 @@ +.text +.syntax unified +VCVT.F64.U16 d1,d1,#-1 +VCVT.F64.U16 d1,d1,#65535 +VCVT.F64.U16 d1,d1,#17 +VCVT.F64.U32 d1,d1,#0 +VCVT.F64.U32 d1,d1,#33 + +VCVT.F32.U16 s1,s1,#-1 +VCVT.F32.U16 s1,s1,#65535 +VCVT.F32.U16 s1,s1,#17 +VCVT.F32.U32 s1,s1,#0 +VCVT.F32.U32 s1,s1,#33 + +VCVT.U16.F64 d1,d1,#-1 +VCVT.U16.F64 d1,d1,#65535 +VCVT.U16.F64 d1,d1,#17 +VCVT.U32.F64 d1,d1,#0 +VCVT.U32.F64 d1,d1,#33 + +VCVT.U16.F32 s1,s1,#-1 +VCVT.U16.F32 s1,s1,#65535 +VCVT.U16.F32 s1,s1,#17 +VCVT.U32.F32 s1,s1,#0 +VCVT.U32.F32 s1,s1,#33 + +VCVT.F64.S16 d1,d1,#-1 +VCVT.F64.S16 d1,d1,#65535 +VCVT.F64.S16 d1,d1,#17 +VCVT.F64.S32 d1,d1,#0 +VCVT.F64.S32 d1,d1,#33 + +VCVT.F32.S16 s1,s1,#-1 +VCVT.F32.S16 s1,s1,#65535 +VCVT.F32.S16 s1,s1,#17 +VCVT.F32.S32 s1,s1,#0 +VCVT.F32.S32 s1,s1,#33 + +VCVT.S16.F64 d1,d1,#-1 +VCVT.S16.F64 d1,d1,#65535 +VCVT.S16.F64 d1,d1,#17 +VCVT.S32.F64 d1,d1,#0 +VCVT.S32.F64 d1,d1,#33 + +VCVT.S16.F32 s1,s1,#-1 +VCVT.S16.F32 s1,s1,#65535 +VCVT.S16.F32 s1,s1,#17 +VCVT.S32.F32 s1,s1,#0 +VCVT.S32.F32 s1,s1,#33 + +.end diff --git a/gas/testsuite/gas/arm/vcvt.d b/gas/testsuite/gas/arm/vcvt.d new file mode 100644 index 0000000..9c92b13 --- /dev/null +++ b/gas/testsuite/gas/arm/vcvt.d @@ -0,0 +1,33 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: VCVT +#as: -mcpu=cortex-a8 -mfpu=vfpv3 + +# Test the `VCVT' op + +.*: +file format .*arm.* + +Disassembly of section .text: +0+000 <[^>]*> eebb1b48 vcvt.f64.u16 d1, d1, #0 +0+004 <[^>]*> eebb1b40 vcvt.f64.u16 d1, d1, #16 +0+008 <[^>]*> eebb1b44 vcvt.f64.u16 d1, d1, #8 +0+00c <[^>]*> eebb1bef vcvt.f64.u32 d1, d1, #1 +0+010 <[^>]*> eebb1bc0 vcvt.f64.u32 d1, d1, #32 +0+014 <[^>]*> eebb1be7 vcvt.f64.u32 d1, d1, #17 +0+018 <[^>]*> eefb0a48 vcvt.f32.u16 s1, s1, #0 +0+01c <[^>]*> eefb0a40 vcvt.f32.u16 s1, s1, #16 +0+020 <[^>]*> eefb0a60 vcvt.f32.u16 s1, s1, #15 +0+024 <[^>]*> eefb0aef vcvt.f32.u32 s1, s1, #1 +0+028 <[^>]*> eefb0ac0 vcvt.f32.u32 s1, s1, #32 +0+02c <[^>]*> eefb0ac8 vcvt.f32.u32 s1, s1, #16 +0+030 <[^>]*> eebf1b48 vcvt.u16.f64 d1, d1, #0 +0+034 <[^>]*> eebf1b40 vcvt.u16.f64 d1, d1, #16 +0+038 <[^>]*> eebf1b60 vcvt.u16.f64 d1, d1, #15 +0+03c <[^>]*> eebf1bef vcvt.u32.f64 d1, d1, #1 +0+040 <[^>]*> eebf1bc0 vcvt.u32.f64 d1, d1, #32 +0+044 <[^>]*> eebf1bc8 vcvt.u32.f64 d1, d1, #16 +0+048 <[^>]*> eeff0a48 vcvt.u16.f32 s1, s1, #0 +0+04c <[^>]*> eeff0a40 vcvt.u16.f32 s1, s1, #16 +0+050 <[^>]*> eeff0a44 vcvt.u16.f32 s1, s1, #8 +0+054 <[^>]*> eeff0aef vcvt.u32.f32 s1, s1, #1 +0+058 <[^>]*> eeff0ac0 vcvt.u32.f32 s1, s1, #32 +0+05c <[^>]*> eeff0ae7 vcvt.u32.f32 s1, s1, #17 diff --git a/gas/testsuite/gas/arm/vcvt.s b/gas/testsuite/gas/arm/vcvt.s new file mode 100644 index 0000000..1321250 --- /dev/null +++ b/gas/testsuite/gas/arm/vcvt.s @@ -0,0 +1,31 @@ +.text +.syntax unified +VCVT.F64.U16 d1,d1,#0 +VCVT.F64.U16 d1,d1,#16 +VCVT.F64.U16 d1,d1,#8 +VCVT.F64.U32 d1,d1,#1 +VCVT.F64.U32 d1,d1,#32 +VCVT.F64.U32 d1,d1,#17 + +VCVT.F32.U16 s1,s1,#0 +VCVT.F32.U16 s1,s1,#16 +VCVT.F32.U16 s1,s1,#15 +VCVT.F32.U32 s1,s1,#1 +VCVT.F32.U32 s1,s1,#32 +VCVT.F32.U32 s1,s1,#16 + +VCVT.U16.F64 d1,d1,#0 +VCVT.U16.F64 d1,d1,#16 +VCVT.U16.F64 d1,d1,#15 +VCVT.U32.F64 d1,d1,#1 +VCVT.U32.F64 d1,d1,#32 +VCVT.U32.F64 d1,d1,#16 + +VCVT.U16.F32 s1,s1,#0 +VCVT.U16.F32 s1,s1,#16 +VCVT.U16.F32 s1,s1,#8 +VCVT.U32.F32 s1,s1,#1 +VCVT.U32.F32 s1,s1,#32 +VCVT.U32.F32 s1,s1,#17 + +.end diff --git a/gas/testsuite/gas/cris/pic-err-2.s b/gas/testsuite/gas/cris/pic-err-2.s new file mode 100644 index 0000000..1720054 --- /dev/null +++ b/gas/testsuite/gas/cris/pic-err-2.s @@ -0,0 +1,6 @@ +; Check that --pic isn't recognized for a.out files, specified by emulation. + +; { dg-do assemble { target cris-*-* } } +; { dg-options "--pic --em=crisaout" } +; { dg-error ".* --pic is invalid" "" { target cris-*-* } 0 } + nop diff --git a/gas/testsuite/gas/cris/pic-err-3.s b/gas/testsuite/gas/cris/pic-err-3.s new file mode 100644 index 0000000..eca76e8 --- /dev/null +++ b/gas/testsuite/gas/cris/pic-err-3.s @@ -0,0 +1,6 @@ +; Check that --pic isn't recognized for a.out files, with a.out the default. + +; { dg-do assemble { target cris-*-*aout* } } +; { dg-options "--pic" } +; { dg-error ".* --pic is invalid" "" { target cris-*-* } 0 } + nop diff --git a/gas/testsuite/gas/cris/rd-brokw-pic-1.d b/gas/testsuite/gas/cris/rd-brokw-pic-1.d index 5027968..b0574c3 100644 --- a/gas/testsuite/gas/cris/rd-brokw-pic-1.d +++ b/gas/testsuite/gas/cris/rd-brokw-pic-1.d @@ -1,5 +1,6 @@ #objdump: -dr #as: --pic +#target: cris-*-*elf* cris-*-linux-gnu #source: brokw-1.s .*: file format .*-cris diff --git a/gas/testsuite/gas/cris/rd-brokw-pic-2.d b/gas/testsuite/gas/cris/rd-brokw-pic-2.d index 30ca1f5..3ce0af6 100644 --- a/gas/testsuite/gas/cris/rd-brokw-pic-2.d +++ b/gas/testsuite/gas/cris/rd-brokw-pic-2.d @@ -1,5 +1,6 @@ #objdump: -dr #as: --pic +#target: cris-*-*elf* cris-*-linux-gnu #source: brokw-2.s .*: file format .*-cris diff --git a/gas/testsuite/gas/cris/rd-fragtest-pic.d b/gas/testsuite/gas/cris/rd-fragtest-pic.d index 0e4c2f1..7a13409 100644 --- a/gas/testsuite/gas/cris/rd-fragtest-pic.d +++ b/gas/testsuite/gas/cris/rd-fragtest-pic.d @@ -1,5 +1,6 @@ #objdump: -dr #as: --pic +#target: cris-*-*elf* cris-*-linux-gnu #source: fragtest.s .*: file format .*-cris diff --git a/gas/testsuite/gas/elf/bad-group.d b/gas/testsuite/gas/elf/bad-group.d new file mode 100644 index 0000000..ba3de04 --- /dev/null +++ b/gas/testsuite/gas/elf/bad-group.d @@ -0,0 +1,2 @@ +#name: Check bad group +#error-output: bad-group.err diff --git a/gas/testsuite/gas/elf/bad-group.err b/gas/testsuite/gas/elf/bad-group.err new file mode 100644 index 0000000..4b650d4 --- /dev/null +++ b/gas/testsuite/gas/elf/bad-group.err @@ -0,0 +1,2 @@ +.*bad-group\.s: Assembler messages: +.*bad-group\.s:.* Error: .* diff --git a/gas/testsuite/gas/elf/bad-group.s b/gas/testsuite/gas/elf/bad-group.s new file mode 100644 index 0000000..69710c7 --- /dev/null +++ b/gas/testsuite/gas/elf/bad-group.s @@ -0,0 +1,11 @@ + .section .text.startup,"ax",%progbits + .globl main +main: + .type main, @function +.LFB0: + .section .text.unlikely +.L5: + .globl __gxx_personality_v0 + .section .gcc_except_table,"a",%progbits + .uleb128 .L5-.LFB0 + .section .data.foo,"awG",%progbits,foo,comdat diff --git a/gas/testsuite/gas/elf/dwarf2-1.d b/gas/testsuite/gas/elf/dwarf2-1.d index 2cc17ac..8decc1c 100644 --- a/gas/testsuite/gas/elf/dwarf2-1.d +++ b/gas/testsuite/gas/elf/dwarf2-1.d @@ -11,7 +11,7 @@ Contents of the .[z]?debug_info section: Abbrev Offset: 0 Pointer Size: 4 <0>: Abbrev Number: 1 \(DW_TAG_compile_unit\) - < c> DW_AT_stmt_list : 0x0 + DW_AT_stmt_list : 0x0 <10> DW_AT_high_pc : 0x. <14> DW_AT_low_pc : 0x. <18> DW_AT_name : file1.txt diff --git a/gas/testsuite/gas/elf/dwarf2-2.d b/gas/testsuite/gas/elf/dwarf2-2.d index 9825ee4..030adb8 100644 --- a/gas/testsuite/gas/elf/dwarf2-2.d +++ b/gas/testsuite/gas/elf/dwarf2-2.d @@ -11,7 +11,7 @@ Contents of the .[z]?debug_info section: Abbrev Offset: 0 Pointer Size: 4 <0>: Abbrev Number: 1 \(DW_TAG_compile_unit\) - < c> DW_AT_stmt_list : 0x0 + DW_AT_stmt_list : 0x0 <10> DW_AT_high_pc : 0x. <14> DW_AT_low_pc : 0x. <18> DW_AT_name : file1.txt diff --git a/gas/testsuite/gas/elf/elf.exp b/gas/testsuite/gas/elf/elf.exp index 6eff0dd..b6b1f0a 100644 --- a/gas/testsuite/gas/elf/elf.exp +++ b/gas/testsuite/gas/elf/elf.exp @@ -181,4 +181,11 @@ if { ([istarget "*-*-*elf*"] run_dump_test "dwarf2-4" run_dump_test "bad-section-flag" run_dump_test "bad-size" + run_dump_test "bad-group" + +load_lib gas-dg.exp +dg-init +dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/err-*.s $srcdir/$subdir/warn-*.s]] "" "" +dg-finish + } diff --git a/gas/testsuite/gas/elf/warn-2.s b/gas/testsuite/gas/elf/warn-2.s new file mode 100644 index 0000000..12b7139 --- /dev/null +++ b/gas/testsuite/gas/elf/warn-2.s @@ -0,0 +1,23 @@ +;# { dg-do assemble } +;# { dg-options "--gdwarf2 --defsym nop_type=0" } +;# { dg-options "--gdwarf2 --defsym nop_type=1" { target ia64-*-* } } +;# { dg-options "--gdwarf2 --defsym nop_type=2" { target or32-*-* openrisc-*-* } } +;# { dg-options "--gdwarf2 --defsym nop_type=3" { target i370-*-* } } + + .offset 40 + +.ifeq nop_type - 1 + nop 0 +.else +.ifeq nop_type - 2 + l.nop 0 +.else +.ifeq nop_type - 3 + nopr 1 +.else + nop +.endif +.endif +.endif + +;# { dg-warning "Warning: dwarf line number information for .* ignored" "" { xfail i370-*-* mcore-*-* mn10200-*-* moxie-*-* openrisc-*-* or32-*-* v850-*-* } 0 } diff --git a/gas/testsuite/gas/hppa/unsorted/unsorted.exp b/gas/testsuite/gas/hppa/unsorted/unsorted.exp index 83edeca..92b3e58 100644 --- a/gas/testsuite/gas/hppa/unsorted/unsorted.exp +++ b/gas/testsuite/gas/hppa/unsorted/unsorted.exp @@ -245,11 +245,13 @@ if [istarget hppa*-*-*] then { # Test bug where switching between subspaces creates bogus alignments do_align4_test - # Test a problem where $global$ is defined, then used within the - # same source file. - setup_xfail hppa*-*-* - gas_test "globalbug.s" "" "" "Use \$global\$ in file which defines it" - + if { ([istarget *-*-osf*] || [istarget *-*-hpux*] || [istarget *-*-bsd*] + || [istarget *-*-mpeix*] || [istarget *-*-hiux*]) + && ![istarget hppa*64*-*-hpux11*] } { + # Test a problem where $global$ is defined, then used within the + # same source file. + gas_test "globalbug.s" "" "" "Use \$global\$ in file which defines it" + } # Test that importing a defined symbol doesn't screw up the symbol's # space/subspace. do_import_test diff --git a/gas/testsuite/gas/i386/arch-10-1.l b/gas/testsuite/gas/i386/arch-10-1.l index 578252d..bc66b92 100644 --- a/gas/testsuite/gas/i386/arch-10-1.l +++ b/gas/testsuite/gas/i386/arch-10-1.l @@ -94,7 +94,7 @@ GAS LISTING .* GAS LISTING .* -[ ]*57[ ]+\# ABM +[ ]*57[ ]+\# ABM/LZCNT [ ]*58[ ]+lzcnt %ecx,%ebx [ ]*59[ ]+\# PadLock [ ]*60[ ]+xstorerng diff --git a/gas/testsuite/gas/i386/arch-10-2.l b/gas/testsuite/gas/i386/arch-10-2.l index ae91ef1..a4a51cc 100644 --- a/gas/testsuite/gas/i386/arch-10-2.l +++ b/gas/testsuite/gas/i386/arch-10-2.l @@ -93,7 +93,7 @@ GAS LISTING .* GAS LISTING .* -[ ]*57[ ]+\# ABM +[ ]*57[ ]+\# ABM/LZCNT [ ]*58[ ]+lzcnt %ecx,%ebx [ ]*59[ ]+\# PadLock [ ]*60[ ]+xstorerng diff --git a/gas/testsuite/gas/i386/arch-10-3.l b/gas/testsuite/gas/i386/arch-10-3.l index b15788e..82b2c26 100644 --- a/gas/testsuite/gas/i386/arch-10-3.l +++ b/gas/testsuite/gas/i386/arch-10-3.l @@ -89,7 +89,7 @@ GAS LISTING .* [ ]*54[ ]+insertq %xmm2,%xmm1 [ ]*55[ ]+\# SVME [ ]*56[ ]+vmload -[ ]*57[ ]+\# ABM +[ ]*57[ ]+\# ABM/LZCNT [ ]*58[ ]+lzcnt %ecx,%ebx [ ]*59[ ]+\# PadLock [ ]*60[ ]+xstorerng diff --git a/gas/testsuite/gas/i386/arch-10-4.l b/gas/testsuite/gas/i386/arch-10-4.l index f59185d..af527de 100644 --- a/gas/testsuite/gas/i386/arch-10-4.l +++ b/gas/testsuite/gas/i386/arch-10-4.l @@ -87,7 +87,7 @@ GAS LISTING .* [ ]*54[ ]+insertq %xmm2,%xmm1 [ ]*55[ ]+\# SVME [ ]*56[ ]+vmload -[ ]*57[ ]+\# ABM +[ ]*57[ ]+\# ABM/LZCNT [ ]*58[ ]+lzcnt %ecx,%ebx [ ]*59[ ]+\# PadLock [ ]*60[ ]+xstorerng diff --git a/gas/testsuite/gas/i386/arch-10-lzcnt.d b/gas/testsuite/gas/i386/arch-10-lzcnt.d new file mode 100644 index 0000000..896a215 --- /dev/null +++ b/gas/testsuite/gas/i386/arch-10-lzcnt.d @@ -0,0 +1,43 @@ +#source: arch-10.s +#as: -march=i686+nop+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm +#objdump: -dw +#name: i386 arch 10 (lzcnt) + +.*: file format .* + +Disassembly of section .text: + +0+ <.text>: +[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx +[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\) +[ ]*[a-f0-9]+: 0f 05 syscall +[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3 +[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3 +[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3 +[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3 +[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3 +[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3 +[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx +[ ]*[a-f0-9]+: c5 fc 77 vzeroall +[ ]*[a-f0-9]+: 0f 01 c4 vmxoff +[ ]*[a-f0-9]+: 0f 37 getsec +[ ]*[a-f0-9]+: 0f 01 d0 xgetbv +[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\) +[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0 +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0 +[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2 +[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx +[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx +[ ]*[a-f0-9]+: 0f 01 f9 rdtscp +[ ]*[a-f0-9]+: 0f 0f dc b7 pmulhrw %mm4,%mm3 +[ ]*[a-f0-9]+: 0f 0f dc bb pswapd %mm4,%mm3 +[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1 +[ ]*[a-f0-9]+: 0f 01 da vmload +[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx +[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng +[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\) +[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx +[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx +#pass diff --git a/gas/testsuite/gas/i386/arch-10.s b/gas/testsuite/gas/i386/arch-10.s index 0e72a76..76da840 100644 --- a/gas/testsuite/gas/i386/arch-10.s +++ b/gas/testsuite/gas/i386/arch-10.s @@ -54,7 +54,7 @@ pswapd %mm4,%mm3 insertq %xmm2,%xmm1 # SVME vmload -# ABM +# ABM/LZCNT lzcnt %ecx,%ebx # PadLock xstorerng diff --git a/gas/testsuite/gas/i386/avx-gather-intel.d b/gas/testsuite/gas/i386/avx-gather-intel.d new file mode 100644 index 0000000..7493d52 --- /dev/null +++ b/gas/testsuite/gas/i386/avx-gather-intel.d @@ -0,0 +1,108 @@ +#as: +#objdump: -dwMintel +#name: i386 AVX GATHER insns (Intel disassembly) +#source: avx-gather.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd ymm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd ymm1,QWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps ymm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd ymm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq ymm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq ymm1,QWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd ymm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd ymm1,QWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps ymm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd ymm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq ymm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq ymm1,QWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5 +#pass diff --git a/gas/testsuite/gas/i386/avx-gather.d b/gas/testsuite/gas/i386/avx-gather.d new file mode 100644 index 0000000..8ad267f --- /dev/null +++ b/gas/testsuite/gas/i386/avx-gather.d @@ -0,0 +1,107 @@ +#as: +#objdump: -dw +#name: i386 AVX GATHER insns + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd %ymm2,0x0\(%ebp,%xmm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps %xmm2,0x0\(%ebp,%ymm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%ebp,%ymm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq %ymm2,0x0\(%ebp,%xmm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd %ymm2,0x0\(%ebp,%xmm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps %xmm2,0x0\(%ebp,%ymm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%ebp,%ymm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq %ymm2,0x0\(%ebp,%xmm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,8\),%ymm6 +#pass diff --git a/gas/testsuite/gas/i386/avx-gather.s b/gas/testsuite/gas/i386/avx-gather.s new file mode 100644 index 0000000..932a7d1 --- /dev/null +++ b/gas/testsuite/gas/i386/avx-gather.s @@ -0,0 +1,109 @@ +# Check 32bit AVX gather instructions + + .text +_start: + vgatherdpd %xmm2, (%ebp, %xmm7, 2),%xmm1 + vgatherqpd %xmm2, (%ebp, %xmm7, 2),%xmm1 + vgatherdpd %ymm2, (%ebp, %xmm7, 2),%ymm1 + vgatherqpd %ymm2, (%ebp, %ymm7, 2),%ymm1 + + vgatherdpd %ymm5,0x8(,%xmm4,1),%ymm6 + vgatherdpd %ymm5,-0x8(,%xmm4,1),%ymm6 + vgatherdpd %ymm5,(,%xmm4,1),%ymm6 + vgatherdpd %ymm5,0x298(,%xmm4,1),%ymm6 + vgatherdpd %ymm5,0x8(,%xmm4,8),%ymm6 + vgatherdpd %ymm5,-0x8(,%xmm4,8),%ymm6 + vgatherdpd %ymm5,(,%xmm4,8),%ymm6 + vgatherdpd %ymm5,0x298(,%xmm4,8),%ymm6 + + vgatherdps %xmm2, (%ebp, %xmm7, 2),%xmm1 + vgatherqps %xmm2, (%ebp, %xmm7, 2),%xmm1 + vgatherdps %ymm2, (%ebp, %ymm7, 2),%ymm1 + vgatherqps %xmm2, (%ebp, %ymm7, 2),%xmm1 + + vgatherdps %xmm5,0x8(,%xmm4,1),%xmm6 + vgatherdps %xmm5,-0x8(,%xmm4,1),%xmm6 + vgatherdps %xmm5,(,%xmm4,1),%xmm6 + vgatherdps %xmm5,0x298(,%xmm4,1),%xmm6 + vgatherdps %xmm5,0x8(,%xmm4,8),%xmm6 + vgatherdps %xmm5,-0x8(,%xmm4,8),%xmm6 + vgatherdps %xmm5,(,%xmm4,8),%xmm6 + vgatherdps %xmm5,0x298(,%xmm4,8),%xmm6 + + vpgatherdd %xmm2, (%ebp, %xmm7, 2),%xmm1 + vpgatherqd %xmm2, (%ebp, %xmm7, 2),%xmm1 + vpgatherdd %ymm2, (%ebp, %ymm7, 2),%ymm1 + vpgatherqd %xmm2, (%ebp, %ymm7, 2),%xmm1 + + vpgatherdd %xmm5,0x8(,%xmm4,1),%xmm6 + vpgatherdd %xmm5,-0x8(,%xmm4,1),%xmm6 + vpgatherdd %xmm5,(,%xmm4,1),%xmm6 + vpgatherdd %xmm5,0x298(,%xmm4,1),%xmm6 + vpgatherdd %xmm5,0x8(,%xmm4,8),%xmm6 + vpgatherdd %xmm5,-0x8(,%xmm4,8),%xmm6 + vpgatherdd %xmm5,(,%xmm4,8),%xmm6 + vpgatherdd %xmm5,0x298(,%xmm4,8),%xmm6 + + vpgatherdq %xmm2, (%ebp, %xmm7, 2),%xmm1 + vpgatherqq %xmm2, (%ebp, %xmm7, 2),%xmm1 + vpgatherdq %ymm2, (%ebp, %xmm7, 2),%ymm1 + vpgatherqq %ymm2, (%ebp, %ymm7, 2),%ymm1 + + vpgatherdq %ymm5,0x8(,%xmm4,1),%ymm6 + vpgatherdq %ymm5,-0x8(,%xmm4,1),%ymm6 + vpgatherdq %ymm5,(,%xmm4,1),%ymm6 + vpgatherdq %ymm5,0x298(,%xmm4,1),%ymm6 + vpgatherdq %ymm5,0x8(,%xmm4,8),%ymm6 + vpgatherdq %ymm5,-0x8(,%xmm4,8),%ymm6 + vpgatherdq %ymm5,(,%xmm4,8),%ymm6 + vpgatherdq %ymm5,0x298(,%xmm4,8),%ymm6 + + .intel_syntax noprefix +vgatherdpd xmm1,QWORD PTR [ebp+xmm7*2+0x0],xmm2 +vgatherqpd xmm1,QWORD PTR [ebp+xmm7*2+0x0],xmm2 +vgatherdpd ymm1,QWORD PTR [ebp+xmm7*2+0x0],ymm2 +vgatherqpd ymm1,QWORD PTR [ebp+ymm7*2+0x0],ymm2 +vgatherdpd ymm6,QWORD PTR [xmm4*1+0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*1-0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*1+0x0],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*1+0x298],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*8+0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*8-0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*8+0x0],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*8+0x298],ymm5 +vgatherdps xmm1,DWORD PTR [ebp+xmm7*2+0x0],xmm2 +vgatherqps xmm1,DWORD PTR [ebp+xmm7*2+0x0],xmm2 +vgatherdps ymm1,DWORD PTR [ebp+ymm7*2+0x0],ymm2 +vgatherqps xmm1,DWORD PTR [ebp+ymm7*2+0x0],xmm2 +vgatherdps xmm6,DWORD PTR [xmm4*1+0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*1-0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*1+0x0],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*1+0x298],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*8+0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*8-0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*8+0x0],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*8+0x298],xmm5 +vpgatherdd xmm1,DWORD PTR [ebp+xmm7*2+0x0],xmm2 +vpgatherqd xmm1,DWORD PTR [ebp+xmm7*2+0x0],xmm2 +vpgatherdd ymm1,DWORD PTR [ebp+ymm7*2+0x0],ymm2 +vpgatherqd xmm1,DWORD PTR [ebp+ymm7*2+0x0],xmm2 +vpgatherdd xmm6,DWORD PTR [xmm4*1+0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*1-0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*1+0x0],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*1+0x298],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*8+0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*8-0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*8+0x0],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*8+0x298],xmm5 +vpgatherdq xmm1,QWORD PTR [ebp+xmm7*2+0x0],xmm2 +vpgatherqq xmm1,QWORD PTR [ebp+xmm7*2+0x0],xmm2 +vpgatherdq ymm1,QWORD PTR [ebp+xmm7*2+0x0],ymm2 +vpgatherqq ymm1,QWORD PTR [ebp+ymm7*2+0x0],ymm2 +vpgatherdq ymm6,QWORD PTR [xmm4*1+0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*1-0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*1+0x0],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*1+0x298],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*8+0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*8-0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*8+0x0],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*8+0x298],ymm5 diff --git a/gas/testsuite/gas/i386/avx-intel.d b/gas/testsuite/gas/i386/avx-intel.d index 624d39e..2295df9 100644 --- a/gas/testsuite/gas/i386/avx-intel.d +++ b/gas/testsuite/gas/i386/avx-intel.d @@ -1041,6 +1041,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd DWORD PTR \[ecx\],xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[ecx\],xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[ecx\],0x7 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\] [ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss xmm6,xmm4,ecx @@ -1065,8 +1067,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7 [ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7 [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[ecx\],xmm4,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4 @@ -2891,6 +2891,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[ecx\],xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[ecx\],xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[ecx\],0x7 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\] [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\] @@ -2928,9 +2931,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7 [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[ecx\],xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[ecx\],xmm4,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4 diff --git a/gas/testsuite/gas/i386/avx.d b/gas/testsuite/gas/i386/avx.d index 5faffbc..5f24dce 100644 --- a/gas/testsuite/gas/i386/avx.d +++ b/gas/testsuite/gas/i386/avx.d @@ -1040,6 +1040,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd \$0x7,%xmm4,\(%ecx\) [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%ecx\) +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%ecx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%ecx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss %ecx,%xmm4,%xmm6 @@ -1064,8 +1066,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6 [ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%ecx\) -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx @@ -2890,6 +2890,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%ecx\) [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%ecx\) +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%ecx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%ecx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%ecx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%ecx\),%xmm4,%xmm6 @@ -2927,9 +2930,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%ecx\) [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%ecx\) -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx diff --git a/gas/testsuite/gas/i386/avx.s b/gas/testsuite/gas/i386/avx.s index 3580bfa..0393d86 100644 --- a/gas/testsuite/gas/i386/avx.s +++ b/gas/testsuite/gas/i386/avx.s @@ -1130,6 +1130,10 @@ _start: vextractps $7,%xmm4,%ecx vextractps $7,%xmm4,(%ecx) +# Tests for op imm8, regl/mem32, xmm, xmm + vpinsrd $7,%ecx,%xmm4,%xmm6 + vpinsrd $7,(%ecx),%xmm4,%xmm6 + # Tests for op regl/mem32, xmm, xmm vcvtsi2sd %ecx,%xmm4,%xmm6 vcvtsi2sd (%ecx),%xmm4,%xmm6 @@ -1172,10 +1176,6 @@ _start: # Tests for op imm8, xmm, regq/mem8 vpextrb $7,%xmm4,(%ecx) -# Tests for op imm8, regl/mem8, xmm, xmm - vpinsrb $7,%ecx,%xmm4,%xmm6 - vpinsrb $7,(%ecx),%xmm4,%xmm6 - # Tests for op xmm, xmm vmaskmovdqu %xmm4,%xmm6 vmovq %xmm4,%xmm6 @@ -3110,6 +3110,11 @@ _start: vextractps DWORD PTR [ecx],xmm4,7 vextractps [ecx],xmm4,7 +# Tests for op imm8, regl/mem32, xmm, xmm + vpinsrd xmm6,xmm4,ecx,7 + vpinsrd xmm6,xmm4,DWORD PTR [ecx],7 + vpinsrd xmm6,xmm4,[ecx],7 + # Tests for op regl/mem32, xmm, xmm vcvtsi2sd xmm6,xmm4,ecx vcvtsi2sd xmm6,xmm4,DWORD PTR [ecx] @@ -3165,11 +3170,6 @@ _start: vpextrb BYTE PTR [ecx],xmm4,7 vpextrb [ecx],xmm4,7 -# Tests for op imm8, regl/mem8, xmm, xmm - vpinsrb xmm6,xmm4,ecx,7 - vpinsrb xmm6,xmm4,BYTE PTR [ecx],7 - vpinsrb xmm6,xmm4,[ecx],7 - # Tests for op xmm, xmm vmaskmovdqu xmm6,xmm4 vmovq xmm6,xmm4 diff --git a/gas/testsuite/gas/i386/avx2-intel.d b/gas/testsuite/gas/i386/avx2-intel.d new file mode 100644 index 0000000..6f1df73 --- /dev/null +++ b/gas/testsuite/gas/i386/avx2-intel.d @@ -0,0 +1,182 @@ +#objdump: -dwMintel +#name: i386 AVX2 insns (Intel disassembly) +#source: avx2.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd ymm6,ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd YMMWORD PTR \[ecx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq ymm6,ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq YMMWORD PTR \[ecx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 16 d4 vpermps ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 47 d4 vpsllvd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 cd 47 d4 vpsllvq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 46 d4 vpsravd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 45 d4 vpsrlvd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 cd 45 d4 vpsrlvq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 19 f4 vbroadcastsd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 18 f4 vbroadcastss ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 ymm6,ymm4,xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 ymm6,ymm4,XMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 49 47 d4 vpsllvd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 c9 47 d4 vpsllvq xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 49 46 d4 vpsravd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 49 45 d4 vpsrlvd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 c9 45 d4 vpsrlvq xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd xmm6,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq xmm6,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e3 7d 39 e6 07 vextracti128 xmm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 XMMWORD PTR \[ecx\],ymm4,0x7 +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd XMMWORD PTR \[ecx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq XMMWORD PTR \[ecx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e3 49 02 d4 07 vpblendd xmm2,xmm6,xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd xmm2,xmm6,XMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e2 79 59 f4 vpbroadcastq xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq xmm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 59 f4 vpbroadcastq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 58 e4 vpbroadcastd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd ymm4,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 58 f4 vpbroadcastd xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd xmm4,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 79 f4 vpbroadcastw xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw xmm4,WORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 79 f4 vpbroadcastw ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw ymm4,WORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 78 f4 vpbroadcastb xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb xmm4,BYTE PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 78 f4 vpbroadcastb ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb ymm4,BYTE PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 18 f4 vbroadcastss xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd ymm6,ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd YMMWORD PTR \[ecx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd ymm6,ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd YMMWORD PTR \[ecx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq ymm6,ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq YMMWORD PTR \[ecx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq ymm6,ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq YMMWORD PTR \[ecx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 16 d4 vpermps ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 47 d4 vpsllvd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 cd 47 d4 vpsllvq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 46 d4 vpsravd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 45 d4 vpsrlvd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 cd 45 d4 vpsrlvq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 19 f4 vbroadcastsd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 18 f4 vbroadcastss ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 ymm6,ymm4,xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 ymm6,ymm4,XMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 ymm6,ymm4,XMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 49 47 d4 vpsllvd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 c9 47 d4 vpsllvq xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 49 46 d4 vpsravd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 49 45 d4 vpsrlvd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 c9 45 d4 vpsrlvq xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq xmm7,xmm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd xmm6,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd xmm6,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq xmm6,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq xmm6,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e3 7d 39 e6 07 vextracti128 xmm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 XMMWORD PTR \[ecx\],ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 XMMWORD PTR \[ecx\],ymm4,0x7 +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd XMMWORD PTR \[ecx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd XMMWORD PTR \[ecx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq XMMWORD PTR \[ecx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq XMMWORD PTR \[ecx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e3 49 02 d4 07 vpblendd xmm2,xmm6,xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd xmm2,xmm6,XMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd xmm2,xmm6,XMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e2 79 59 f4 vpbroadcastq xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq xmm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq xmm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 59 f4 vpbroadcastq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 58 e4 vpbroadcastd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd ymm4,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd ymm4,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 58 f4 vpbroadcastd xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd xmm4,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd xmm4,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 79 f4 vpbroadcastw xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw xmm4,WORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw xmm4,WORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 79 f4 vpbroadcastw ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw ymm4,WORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw ymm4,WORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 78 f4 vpbroadcastb xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb xmm4,BYTE PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb xmm4,BYTE PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 78 f4 vpbroadcastb ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb ymm4,BYTE PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb ymm4,BYTE PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 79 18 f4 vbroadcastss xmm6,xmm4 +#pass diff --git a/gas/testsuite/gas/i386/avx2.d b/gas/testsuite/gas/i386/avx2.d new file mode 100644 index 0000000..fc6517e --- /dev/null +++ b/gas/testsuite/gas/i386/avx2.d @@ -0,0 +1,181 @@ +#objdump: -dw +#name: i386 AVX2 insns + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd \(%ecx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd %ymm4,%ymm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq \(%ecx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq %ymm4,%ymm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 16 d4 vpermps %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 47 d4 vpsllvd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 47 d4 vpsllvq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 46 d4 vpsravd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 45 d4 vpsrlvd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 45 d4 vpsrlvq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 19 f4 vbroadcastsd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 18 f4 vbroadcastss %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 \$0x7,%xmm4,%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 \$0x7,\(%ecx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 49 47 d4 vpsllvd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 47 d4 vpsllvq %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 46 d4 vpsravd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 45 d4 vpsrlvd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 45 d4 vpsrlvq %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd \(%ecx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq \(%ecx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 7d 39 e6 07 vextracti128 \$0x7,%ymm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 \$0x7,%ymm4,\(%ecx\) +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd %xmm4,%xmm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq %xmm4,%xmm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e3 49 02 d4 07 vpblendd \$0x7,%xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd \$0x7,\(%ecx\),%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 79 59 f4 vpbroadcastq %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 59 f4 vpbroadcastq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 e4 vpbroadcastd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 58 f4 vpbroadcastd %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 79 f4 vpbroadcastw %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 79 f4 vpbroadcastw %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 78 f4 vpbroadcastb %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 78 f4 vpbroadcastb %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 18 f4 vbroadcastss %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd \(%ecx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd %ymm4,%ymm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd \(%ecx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd %ymm4,%ymm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq \(%ecx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq %ymm4,%ymm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq \(%ecx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq %ymm4,%ymm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 16 d4 vpermps %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 47 d4 vpsllvd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 47 d4 vpsllvq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 46 d4 vpsravd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 45 d4 vpsrlvd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 45 d4 vpsrlvq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 19 f4 vbroadcastsd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 18 f4 vbroadcastss %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 \$0x7,%xmm4,%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 \$0x7,\(%ecx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 \$0x7,\(%ecx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 49 47 d4 vpsllvd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 47 d4 vpsllvq %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 46 d4 vpsravd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 45 d4 vpsrlvd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 45 d4 vpsrlvq %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq \(%ecx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd \(%ecx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd \(%ecx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq \(%ecx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq \(%ecx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 7d 39 e6 07 vextracti128 \$0x7,%ymm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 \$0x7,%ymm4,\(%ecx\) +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 \$0x7,%ymm4,\(%ecx\) +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd %xmm4,%xmm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd %xmm4,%xmm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq %xmm4,%xmm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq %xmm4,%xmm6,\(%ecx\) +[ ]*[a-f0-9]+: c4 e3 49 02 d4 07 vpblendd \$0x7,%xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd \$0x7,\(%ecx\),%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd \$0x7,\(%ecx\),%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 79 59 f4 vpbroadcastq %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 59 f4 vpbroadcastq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 e4 vpbroadcastd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 58 f4 vpbroadcastd %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 79 f4 vpbroadcastw %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 79 f4 vpbroadcastw %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 78 f4 vpbroadcastb %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb \(%ecx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 78 f4 vpbroadcastb %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 18 f4 vbroadcastss %xmm4,%xmm6 +#pass diff --git a/gas/testsuite/gas/i386/avx2.s b/gas/testsuite/gas/i386/avx2.s new file mode 100644 index 0000000..9c883a8 --- /dev/null +++ b/gas/testsuite/gas/i386/avx2.s @@ -0,0 +1,268 @@ +# Check i386 AVX2 instructions + + .allow_index_reg + .text +_start: + +# Tests for op mem256, mask, ymm +# Tests for op ymm, mask, mem256 + vpmaskmovd (%ecx),%ymm4,%ymm6 + vpmaskmovd %ymm4,%ymm6,(%ecx) + vpmaskmovq (%ecx),%ymm4,%ymm6 + vpmaskmovq %ymm4,%ymm6,(%ecx) + +# Tests for op imm8, ymm/mem256, ymm + vpermpd $7,%ymm6,%ymm2 + vpermpd $7,(%ecx),%ymm6 + vpermq $7,%ymm6,%ymm2 + vpermq $7,(%ecx),%ymm6 + +# Tests for op ymm/mem256, ymm, ymm + vpermd %ymm4,%ymm6,%ymm2 + vpermd (%ecx),%ymm6,%ymm2 + vpermps %ymm4,%ymm6,%ymm2 + vpermps (%ecx),%ymm6,%ymm2 + vpsllvd %ymm4,%ymm6,%ymm2 + vpsllvd (%ecx),%ymm6,%ymm2 + vpsllvq %ymm4,%ymm6,%ymm2 + vpsllvq (%ecx),%ymm6,%ymm2 + vpsravd %ymm4,%ymm6,%ymm2 + vpsravd (%ecx),%ymm6,%ymm2 + vpsrlvd %ymm4,%ymm6,%ymm2 + vpsrlvd (%ecx),%ymm6,%ymm2 + vpsrlvq %ymm4,%ymm6,%ymm2 + vpsrlvq (%ecx),%ymm6,%ymm2 + +# Tests for op mem256, ymm + vmovntdqa (%ecx),%ymm4 + +# Tests for op ymm, xmm + vbroadcastsd %xmm4,%ymm6 + vbroadcastss %xmm4,%ymm6 + +# Tests for op imm8, ymm/mem256, ymm, ymm + vpblendd $7,%ymm4,%ymm6,%ymm2 + vpblendd $7,(%ecx),%ymm6,%ymm2 + vperm2i128 $7,%ymm4,%ymm6,%ymm2 + vperm2i128 $7,(%ecx),%ymm6,%ymm2 + +# Tests for op imm8, xmm/mem128, ymm, ymm + vinserti128 $7,%xmm4,%ymm4,%ymm6 + vinserti128 $7,(%ecx),%ymm4,%ymm6 + +# Tests for op mem128, ymm + vbroadcasti128 (%ecx),%ymm4 + +# Tests for op xmm/mem128, xmm, xmm + vpsllvd %xmm4,%xmm6,%xmm2 + vpsllvd (%ecx),%xmm6,%xmm7 + vpsllvq %xmm4,%xmm6,%xmm2 + vpsllvq (%ecx),%xmm6,%xmm7 + vpsravd %xmm4,%xmm6,%xmm2 + vpsravd (%ecx),%xmm6,%xmm7 + vpsrlvd %xmm4,%xmm6,%xmm2 + vpsrlvd (%ecx),%xmm6,%xmm7 + vpsrlvq %xmm4,%xmm6,%xmm2 + vpsrlvq (%ecx),%xmm6,%xmm7 + +# Tests for op mem128, xmm, xmm + vpmaskmovd (%ecx),%xmm4,%xmm6 + vpmaskmovq (%ecx),%xmm4,%xmm6 + +# Tests for op imm8, ymm, xmm128/mem + vextracti128 $7,%ymm4,%xmm6 + vextracti128 $7,%ymm4,(%ecx) + +# Tests for op xmm, xmm, mem128 + vpmaskmovd %xmm4,%xmm6,(%ecx) + vpmaskmovq %xmm4,%xmm6,(%ecx) + +# Tests for op imm8, xmm/mem128, xmm, xmm + vpblendd $7,%xmm4,%xmm6,%xmm2 + vpblendd $7,(%ecx),%xmm6,%xmm2 + +# Tests for op xmm/mem64, xmm + vpbroadcastq %xmm4,%xmm6 + vpbroadcastq (%ecx),%xmm4 + +# Tests for op xmm/mem64, ymm + vpbroadcastq %xmm4,%ymm6 + vpbroadcastq (%ecx),%ymm4 + +# Tests for op xmm/mem32, ymm + vpbroadcastd %xmm4,%ymm4 + vpbroadcastd (%ecx),%ymm4 + +# Tests for op xmm/mem32, xmm + vpbroadcastd %xmm4,%xmm6 + vpbroadcastd (%ecx),%xmm4 + +# Tests for op xmm/m16, xmm + vpbroadcastw %xmm4,%xmm6 + vpbroadcastw (%ecx),%xmm4 + +# Tests for op xmm/m16, ymm + vpbroadcastw %xmm4,%ymm6 + vpbroadcastw (%ecx),%ymm4 + +# Tests for op xmm/m8, xmm + vpbroadcastb %xmm4,%xmm6 + vpbroadcastb (%ecx),%xmm4 + +# Tests for op xmm/m8, ymm + vpbroadcastb %xmm4,%ymm6 + vpbroadcastb (%ecx),%ymm4 + +# Tests for op xmm, xmm + vbroadcastss %xmm4,%xmm6 + + .intel_syntax noprefix + +# Tests for op mem256, mask, ymm +# Tests for op ymm, mask, mem256 + vpmaskmovd ymm6,ymm4,YMMWORD PTR [ecx] + vpmaskmovd YMMWORD PTR [ecx],ymm6,ymm4 + vpmaskmovd ymm6,ymm4,[ecx] + vpmaskmovd [ecx],ymm6,ymm4 + vpmaskmovq ymm6,ymm4,YMMWORD PTR [ecx] + vpmaskmovq YMMWORD PTR [ecx],ymm6,ymm4 + vpmaskmovq ymm6,ymm4,[ecx] + vpmaskmovq [ecx],ymm6,ymm4 + +# Tests for op imm8, ymm/mem256, ymm + vpermpd ymm2,ymm6,7 + vpermpd ymm6,YMMWORD PTR [ecx],7 + vpermpd ymm6,[ecx],7 + vpermq ymm2,ymm6,7 + vpermq ymm6,YMMWORD PTR [ecx],7 + vpermq ymm6,[ecx],7 + +# Tests for op ymm/mem256, ymm, ymm + vpermd ymm2,ymm6,ymm4 + vpermd ymm2,ymm6,YMMWORD PTR [ecx] + vpermd ymm2,ymm6,[ecx] + vpermps ymm2,ymm6,ymm4 + vpermps ymm2,ymm6,YMMWORD PTR [ecx] + vpermps ymm2,ymm6,[ecx] + vpsllvd ymm2,ymm6,ymm4 + vpsllvd ymm2,ymm6,YMMWORD PTR [ecx] + vpsllvd ymm2,ymm6,[ecx] + vpsllvq ymm2,ymm6,ymm4 + vpsllvq ymm2,ymm6,YMMWORD PTR [ecx] + vpsllvq ymm2,ymm6,[ecx] + vpsravd ymm2,ymm6,ymm4 + vpsravd ymm2,ymm6,YMMWORD PTR [ecx] + vpsravd ymm2,ymm6,[ecx] + vpsrlvd ymm2,ymm6,ymm4 + vpsrlvd ymm2,ymm6,YMMWORD PTR [ecx] + vpsrlvd ymm2,ymm6,[ecx] + vpsrlvq ymm2,ymm6,ymm4 + vpsrlvq ymm2,ymm6,YMMWORD PTR [ecx] + vpsrlvq ymm2,ymm6,[ecx] + +# Tests for op mem256, ymm + vmovntdqa ymm4,YMMWORD PTR [ecx] + vmovntdqa ymm4,[ecx] + +# Tests for op ymm, xmm + vbroadcastsd ymm6,xmm4 + vbroadcastss ymm6,xmm4 + +# Tests for op imm8, ymm/mem256, ymm, ymm + vpblendd ymm2,ymm6,ymm4,7 + vpblendd ymm2,ymm6,YMMWORD PTR [ecx],7 + vpblendd ymm2,ymm6,[ecx],7 + vperm2i128 ymm2,ymm6,ymm4,7 + vperm2i128 ymm2,ymm6,YMMWORD PTR [ecx],7 + vperm2i128 ymm2,ymm6,[ecx],7 + +# Tests for op imm8, xmm/mem128, ymm, ymm + vinserti128 ymm6,ymm4,xmm4,7 + vinserti128 ymm6,ymm4,XMMWORD PTR [ecx],7 + vinserti128 ymm6,ymm4,[ecx],7 + +# Tests for op mem128, ymm + vbroadcasti128 ymm4,XMMWORD PTR [ecx] + vbroadcasti128 ymm4,[ecx] + +# Tests for op xmm/mem128, xmm, xmm + vpsllvd xmm2,xmm6,xmm4 + vpsllvd xmm7,xmm6,XMMWORD PTR [ecx] + vpsllvd xmm7,xmm6,[ecx] + vpsllvq xmm2,xmm6,xmm4 + vpsllvq xmm7,xmm6,XMMWORD PTR [ecx] + vpsllvq xmm7,xmm6,[ecx] + vpsravd xmm2,xmm6,xmm4 + vpsravd xmm7,xmm6,XMMWORD PTR [ecx] + vpsravd xmm7,xmm6,[ecx] + vpsrlvd xmm2,xmm6,xmm4 + vpsrlvd xmm7,xmm6,XMMWORD PTR [ecx] + vpsrlvd xmm7,xmm6,[ecx] + vpsrlvq xmm2,xmm6,xmm4 + vpsrlvq xmm7,xmm6,XMMWORD PTR [ecx] + vpsrlvq xmm7,xmm6,[ecx] + +# Tests for op mem128, xmm, xmm + vpmaskmovd xmm6,xmm4,XMMWORD PTR [ecx] + vpmaskmovd xmm6,xmm4,[ecx] + vpmaskmovq xmm6,xmm4,XMMWORD PTR [ecx] + vpmaskmovq xmm6,xmm4,[ecx] + +# Tests for op imm8, ymm, xmm128/mem + vextracti128 xmm6,ymm4,7 + vextracti128 XMMWORD PTR [ecx],ymm4,7 + vextracti128 [ecx],ymm4,7 + +# Tests for op xmm, xmm, mem128 + vpmaskmovd XMMWORD PTR [ecx],xmm6,xmm4 + vpmaskmovd [ecx],xmm6,xmm4 + vpmaskmovq XMMWORD PTR [ecx],xmm6,xmm4 + vpmaskmovq [ecx],xmm6,xmm4 + +# Tests for op imm8, xmm/mem128, xmm, xmm + vpblendd xmm2,xmm6,xmm4,7 + vpblendd xmm2,xmm6,XMMWORD PTR [ecx],7 + vpblendd xmm2,xmm6,[ecx],7 + +# Tests for op xmm/mem64, xmm + vpbroadcastq xmm6,xmm4 + vpbroadcastq xmm4,QWORD PTR [ecx] + vpbroadcastq xmm4,[ecx] + +# Tests for op xmm/mem64, ymm + vpbroadcastq ymm6,xmm4 + vpbroadcastq ymm4,QWORD PTR [ecx] + vpbroadcastq ymm4,[ecx] + +# Tests for op xmm/mem32, ymm + vpbroadcastd ymm4,xmm4 + vpbroadcastd ymm4,DWORD PTR [ecx] + vpbroadcastd ymm4,[ecx] + +# Tests for op xmm/mem32, xmm + vpbroadcastd xmm6,xmm4 + vpbroadcastd xmm4,DWORD PTR [ecx] + vpbroadcastd xmm4,[ecx] + +# Tests for op xmm/m16, xmm + vpbroadcastw xmm6,xmm4 + vpbroadcastw xmm4,WORD PTR [ecx] + vpbroadcastw xmm4,[ecx] + +# Tests for op xmm/m16, ymm + vpbroadcastw ymm6,xmm4 + vpbroadcastw ymm4,WORD PTR [ecx] + vpbroadcastw ymm4,[ecx] + +# Tests for op xmm/m8, xmm + vpbroadcastb xmm6,xmm4 + vpbroadcastb xmm4,BYTE PTR [ecx] + vpbroadcastb xmm4,[ecx] + +# Tests for op xmm/m8, ymm + vpbroadcastb ymm6,xmm4 + vpbroadcastb ymm4,BYTE PTR [ecx] + vpbroadcastb ymm4,[ecx] + +# Tests for op xmm, xmm + vbroadcastss xmm6,xmm4 diff --git a/gas/testsuite/gas/i386/avx256int-intel.d b/gas/testsuite/gas/i386/avx256int-intel.d new file mode 100644 index 0000000..bcc93c4 --- /dev/null +++ b/gas/testsuite/gas/i386/avx256int-intel.d @@ -0,0 +1,553 @@ +#objdump: -dwMintel +#name: i386 256bit integer AVX insns (Intel disassembly) +#source: avx256int.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb ecx,ymm4 +[ ]*[a-f0-9]+: c5 ed 72 f6 07 vpslld ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 fe 07 vpslldq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 f6 07 vpsllq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 f6 07 vpsllw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 72 e6 07 vpsrad ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 e6 07 vpsraw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 72 d6 07 vpsrld ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 de 07 vpsrldq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 d6 07 vpsrlq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 d6 07 vpsrlw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fd 70 d6 07 vpshufd ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c5 fe 70 d6 07 vpshufhw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c5 ff 70 d6 07 vpshuflw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c5 cd 6b d4 vpackssdw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 63 d4 vpacksswb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 2b d4 vpackusdw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 67 d4 vpackuswb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fc d4 vpaddb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fd d4 vpaddw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fe d4 vpaddd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d4 d4 vpaddq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ec d4 vpaddsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ed d4 vpaddsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd dc d4 vpaddusb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd dd d4 vpaddusw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd db d4 vpand ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd db 11 vpand ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd df d4 vpandn ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd df 11 vpandn ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e0 d4 vpavgb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e3 d4 vpavgw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 74 d4 vpcmpeqb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 75 d4 vpcmpeqw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 76 d4 vpcmpeqd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 29 d4 vpcmpeqq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 64 d4 vpcmpgtb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 65 d4 vpcmpgtw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 66 d4 vpcmpgtd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 37 d4 vpcmpgtq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 01 d4 vphaddw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 02 d4 vphaddd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 03 d4 vphaddsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 05 d4 vphsubw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 06 d4 vphsubd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 07 d4 vphsubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f5 d4 vpmaddwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 04 d4 vpmaddubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3c d4 vpmaxsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ee d4 vpmaxsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3d d4 vpmaxsd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd de d4 vpmaxub ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3e d4 vpmaxuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3f d4 vpmaxud ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 38 d4 vpminsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ea d4 vpminsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 39 d4 vpminsd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd da d4 vpminub ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd da 11 vpminub ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3a d4 vpminuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3b d4 vpminud ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e4 d4 vpmulhuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 0b d4 vpmulhrsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e5 d4 vpmulhw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d5 d4 vpmullw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 40 d4 vpmulld ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f4 d4 vpmuludq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 28 d4 vpmuldq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd eb d4 vpor ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd eb 11 vpor ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f6 d4 vpsadbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 00 d4 vpshufb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 08 d4 vpsignb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 09 d4 vpsignw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 0a d4 vpsignd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f8 d4 vpsubb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f9 d4 vpsubw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fa d4 vpsubd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fb d4 vpsubq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e8 d4 vpsubsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e9 d4 vpsubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d8 d4 vpsubusb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d9 d4 vpsubusw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 68 d4 vpunpckhbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 69 d4 vpunpckhwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 6a d4 vpunpckhdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 6d d4 vpunpckhqdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 60 d4 vpunpcklbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 61 d4 vpunpcklwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 62 d4 vpunpckldq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 6c d4 vpunpcklqdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ef d4 vpxor ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 1c f4 vpabsb ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 1d f4 vpabsw ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 1e f4 vpabsd ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e3 4d 42 d4 07 vmpsadbw ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0f d4 07 vpalignr ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0e d4 07 vpblendw ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 6d 4c fe 40 vpblendvb ymm7,ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4 +[ ]*[a-f0-9]+: c5 cd f1 d4 vpsllw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f2 d4 vpslld ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f3 d4 vpsllq ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e1 d4 vpsraw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e2 d4 vpsrad ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d1 d4 vpsrlw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d2 d4 vpsrld ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d3 d4 vpsrlq ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 20 e4 vpmovsxbw ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 23 e4 vpmovsxwd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 25 e4 vpmovsxdq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 30 e4 vpmovzxbw ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 33 e4 vpmovzxwd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 35 e4 vpmovzxdq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 21 f4 vpmovsxbd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 24 f4 vpmovsxwq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 31 f4 vpmovzxbd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 34 f4 vpmovzxwq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 22 e4 vpmovsxbq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq ymm4,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 32 e4 vpmovzxbq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq ymm4,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb ecx,ymm4 +[ ]*[a-f0-9]+: c5 ed 72 f6 07 vpslld ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 fe 07 vpslldq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 f6 07 vpsllq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 f6 07 vpsllw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 72 e6 07 vpsrad ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 e6 07 vpsraw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 72 d6 07 vpsrld ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 de 07 vpsrldq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 d6 07 vpsrlq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 d6 07 vpsrlw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fd 70 d6 07 vpshufd ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c5 fe 70 d6 07 vpshufhw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c5 ff 70 d6 07 vpshuflw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c5 cd 6b d4 vpackssdw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 63 d4 vpacksswb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 2b d4 vpackusdw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 67 d4 vpackuswb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fc d4 vpaddb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fd d4 vpaddw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fe d4 vpaddd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d4 d4 vpaddq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ec d4 vpaddsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ed d4 vpaddsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd dc d4 vpaddusb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd dd d4 vpaddusw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd db d4 vpand ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd db 11 vpand ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd db 11 vpand ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd df d4 vpandn ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd df 11 vpandn ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd df 11 vpandn ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e0 d4 vpavgb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e3 d4 vpavgw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 74 d4 vpcmpeqb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 75 d4 vpcmpeqw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 76 d4 vpcmpeqd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 29 d4 vpcmpeqq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 64 d4 vpcmpgtb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 65 d4 vpcmpgtw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 66 d4 vpcmpgtd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 37 d4 vpcmpgtq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 01 d4 vphaddw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 02 d4 vphaddd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 03 d4 vphaddsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 05 d4 vphsubw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 06 d4 vphsubd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 07 d4 vphsubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f5 d4 vpmaddwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 04 d4 vpmaddubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3c d4 vpmaxsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ee d4 vpmaxsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3d d4 vpmaxsd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd de d4 vpmaxub ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3e d4 vpmaxuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3f d4 vpmaxud ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 38 d4 vpminsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ea d4 vpminsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 39 d4 vpminsd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd da d4 vpminub ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd da 11 vpminub ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd da 11 vpminub ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3a d4 vpminuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3b d4 vpminud ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e4 d4 vpmulhuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 0b d4 vpmulhrsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e5 d4 vpmulhw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d5 d4 vpmullw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 40 d4 vpmulld ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f4 d4 vpmuludq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 28 d4 vpmuldq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd eb d4 vpor ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd eb 11 vpor ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd eb 11 vpor ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f6 d4 vpsadbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 00 d4 vpshufb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 08 d4 vpsignb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 09 d4 vpsignw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 0a d4 vpsignd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f8 d4 vpsubb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f9 d4 vpsubw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fa d4 vpsubd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fb d4 vpsubq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e8 d4 vpsubsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e9 d4 vpsubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d8 d4 vpsubusb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d9 d4 vpsubusw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 68 d4 vpunpckhbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 69 d4 vpunpckhwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 6a d4 vpunpckhdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 6d d4 vpunpckhqdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 60 d4 vpunpcklbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 61 d4 vpunpcklwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 62 d4 vpunpckldq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 6c d4 vpunpcklqdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ef d4 vpxor ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor ymm2,ymm6,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 1c f4 vpabsb ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 1d f4 vpabsw ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 1e f4 vpabsd ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd ymm4,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e3 4d 42 d4 07 vmpsadbw ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0f d4 07 vpalignr ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0e d4 07 vpblendw ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw ymm2,ymm6,YMMWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 6d 4c fe 40 vpblendvb ymm7,ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4 +[ ]*[a-f0-9]+: c5 cd f1 d4 vpsllw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f2 d4 vpslld ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f3 d4 vpsllq ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e1 d4 vpsraw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e2 d4 vpsrad ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d1 d4 vpsrlw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d2 d4 vpsrld ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d3 d4 vpsrlq ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq ymm2,ymm6,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 20 e4 vpmovsxbw ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 23 e4 vpmovsxwd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 25 e4 vpmovsxdq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 30 e4 vpmovzxbw ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 33 e4 vpmovzxwd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 35 e4 vpmovzxdq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 21 f4 vpmovsxbd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 24 f4 vpmovsxwq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 31 f4 vpmovzxbd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 34 f4 vpmovzxwq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq ymm4,QWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 22 e4 vpmovsxbq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq ymm4,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq ymm4,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 32 e4 vpmovzxbq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq ymm4,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq ymm4,DWORD PTR \[ecx\] +#pass diff --git a/gas/testsuite/gas/i386/avx256int.d b/gas/testsuite/gas/i386/avx256int.d new file mode 100644 index 0000000..dcb34bb --- /dev/null +++ b/gas/testsuite/gas/i386/avx256int.d @@ -0,0 +1,552 @@ +#objdump: -dw +#name: i386 256bit integer AVX insns + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb %ymm4,%ecx +[ ]*[a-f0-9]+: c5 ed 72 f6 07 vpslld \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 fe 07 vpslldq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 f6 07 vpsllq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 f6 07 vpsllw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 72 e6 07 vpsrad \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 e6 07 vpsraw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 72 d6 07 vpsrld \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 de 07 vpsrldq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 d6 07 vpsrlq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 d6 07 vpsrlw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fd 70 d6 07 vpshufd \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c5 fe 70 d6 07 vpshufhw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c5 ff 70 d6 07 vpshuflw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c5 cd 6b d4 vpackssdw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 63 d4 vpacksswb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 2b d4 vpackusdw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 67 d4 vpackuswb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fc d4 vpaddb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fd d4 vpaddw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fe d4 vpaddd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d4 d4 vpaddq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ec d4 vpaddsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ed d4 vpaddsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dc d4 vpaddusb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dd d4 vpaddusw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd db d4 vpand %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd db 11 vpand \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd df d4 vpandn %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd df 11 vpandn \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e0 d4 vpavgb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e3 d4 vpavgw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 74 d4 vpcmpeqb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 75 d4 vpcmpeqw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 76 d4 vpcmpeqd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 29 d4 vpcmpeqq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 64 d4 vpcmpgtb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 65 d4 vpcmpgtw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 66 d4 vpcmpgtd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 37 d4 vpcmpgtq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 01 d4 vphaddw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 02 d4 vphaddd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 03 d4 vphaddsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 05 d4 vphsubw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 06 d4 vphsubd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 07 d4 vphsubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f5 d4 vpmaddwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 04 d4 vpmaddubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3c d4 vpmaxsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ee d4 vpmaxsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3d d4 vpmaxsd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd de d4 vpmaxub %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3e d4 vpmaxuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3f d4 vpmaxud %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 38 d4 vpminsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ea d4 vpminsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 39 d4 vpminsd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd da d4 vpminub %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd da 11 vpminub \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3a d4 vpminuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3b d4 vpminud %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e4 d4 vpmulhuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0b d4 vpmulhrsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e5 d4 vpmulhw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d5 d4 vpmullw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 40 d4 vpmulld %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f4 d4 vpmuludq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 28 d4 vpmuldq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd eb d4 vpor %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd eb 11 vpor \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f6 d4 vpsadbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 00 d4 vpshufb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 08 d4 vpsignb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 09 d4 vpsignw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0a d4 vpsignd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f8 d4 vpsubb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f9 d4 vpsubw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fa d4 vpsubd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fb d4 vpsubq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e8 d4 vpsubsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e9 d4 vpsubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d8 d4 vpsubusb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d9 d4 vpsubusw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 68 d4 vpunpckhbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 69 d4 vpunpckhwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6a d4 vpunpckhdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6d d4 vpunpckhqdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 60 d4 vpunpcklbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 61 d4 vpunpcklwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 62 d4 vpunpckldq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6c d4 vpunpcklqdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ef d4 vpxor %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 1c f4 vpabsb %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1d f4 vpabsw %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1e f4 vpabsd %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e3 4d 42 d4 07 vmpsadbw \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0f d4 07 vpalignr \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0e d4 07 vpblendw \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 6d 4c fe 40 vpblendvb %ymm4,%ymm6,%ymm2,%ymm7 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb %ymm4,\(%ecx\),%ymm2,%ymm7 +[ ]*[a-f0-9]+: c5 cd f1 d4 vpsllw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f2 d4 vpslld %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f3 d4 vpsllq %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e1 d4 vpsraw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e2 d4 vpsrad %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d1 d4 vpsrlw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d2 d4 vpsrld %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d3 d4 vpsrlq %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 20 e4 vpmovsxbw %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 e4 vpmovsxwd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 e4 vpmovsxdq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 e4 vpmovzxbw %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 e4 vpmovzxwd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 e4 vpmovzxdq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 21 f4 vpmovsxbd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 24 f4 vpmovsxwq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 31 f4 vpmovzxbd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 34 f4 vpmovzxwq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 e4 vpmovsxbq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 e4 vpmovzxbq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb %ymm4,%ecx +[ ]*[a-f0-9]+: c5 ed 72 f6 07 vpslld \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 fe 07 vpslldq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 f6 07 vpsllq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 f6 07 vpsllw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 72 e6 07 vpsrad \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 e6 07 vpsraw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 72 d6 07 vpsrld \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 de 07 vpsrldq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 d6 07 vpsrlq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 d6 07 vpsrlw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fd 70 d6 07 vpshufd \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c5 fe 70 d6 07 vpshufhw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c5 ff 70 d6 07 vpshuflw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw \$0x7,\(%ecx\),%ymm6 +[ ]*[a-f0-9]+: c5 cd 6b d4 vpackssdw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 63 d4 vpacksswb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 2b d4 vpackusdw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 67 d4 vpackuswb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fc d4 vpaddb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fd d4 vpaddw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fe d4 vpaddd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d4 d4 vpaddq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ec d4 vpaddsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ed d4 vpaddsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dc d4 vpaddusb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dd d4 vpaddusw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd db d4 vpand %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd db 11 vpand \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd db 11 vpand \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd df d4 vpandn %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd df 11 vpandn \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd df 11 vpandn \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e0 d4 vpavgb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e3 d4 vpavgw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 74 d4 vpcmpeqb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 75 d4 vpcmpeqw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 76 d4 vpcmpeqd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 29 d4 vpcmpeqq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 64 d4 vpcmpgtb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 65 d4 vpcmpgtw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 66 d4 vpcmpgtd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 37 d4 vpcmpgtq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 01 d4 vphaddw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 02 d4 vphaddd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 03 d4 vphaddsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 05 d4 vphsubw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 06 d4 vphsubd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 07 d4 vphsubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f5 d4 vpmaddwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 04 d4 vpmaddubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3c d4 vpmaxsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ee d4 vpmaxsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3d d4 vpmaxsd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd de d4 vpmaxub %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3e d4 vpmaxuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3f d4 vpmaxud %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 38 d4 vpminsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ea d4 vpminsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 39 d4 vpminsd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd da d4 vpminub %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd da 11 vpminub \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd da 11 vpminub \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3a d4 vpminuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3b d4 vpminud %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e4 d4 vpmulhuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0b d4 vpmulhrsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e5 d4 vpmulhw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d5 d4 vpmullw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 40 d4 vpmulld %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f4 d4 vpmuludq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 28 d4 vpmuldq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd eb d4 vpor %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd eb 11 vpor \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd eb 11 vpor \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f6 d4 vpsadbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 00 d4 vpshufb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 08 d4 vpsignb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 09 d4 vpsignw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0a d4 vpsignd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f8 d4 vpsubb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f9 d4 vpsubw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fa d4 vpsubd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fb d4 vpsubq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e8 d4 vpsubsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e9 d4 vpsubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d8 d4 vpsubusb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d9 d4 vpsubusw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 68 d4 vpunpckhbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 69 d4 vpunpckhwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6a d4 vpunpckhdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6d d4 vpunpckhqdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 60 d4 vpunpcklbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 61 d4 vpunpcklwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 62 d4 vpunpckldq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6c d4 vpunpcklqdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ef d4 vpxor %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 1c f4 vpabsb %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1d f4 vpabsw %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1e f4 vpabsd %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e3 4d 42 d4 07 vmpsadbw \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0f d4 07 vpalignr \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0e d4 07 vpblendw \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw \$0x7,\(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 6d 4c fe 40 vpblendvb %ymm4,%ymm6,%ymm2,%ymm7 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb %ymm4,\(%ecx\),%ymm2,%ymm7 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb %ymm4,\(%ecx\),%ymm2,%ymm7 +[ ]*[a-f0-9]+: c5 cd f1 d4 vpsllw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f2 d4 vpslld %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f3 d4 vpsllq %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e1 d4 vpsraw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e2 d4 vpsrad %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d1 d4 vpsrlw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d2 d4 vpsrld %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d3 d4 vpsrlq %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq \(%ecx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 20 e4 vpmovsxbw %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 e4 vpmovsxwd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 e4 vpmovsxdq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 e4 vpmovzxbw %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 e4 vpmovzxwd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 e4 vpmovzxdq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 21 f4 vpmovsxbd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 24 f4 vpmovsxwq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 31 f4 vpmovzxbd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 34 f4 vpmovzxwq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 e4 vpmovsxbq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 e4 vpmovzxbq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq \(%ecx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq \(%ecx\),%ymm4 +#pass diff --git a/gas/testsuite/gas/i386/avx256int.s b/gas/testsuite/gas/i386/avx256int.s new file mode 100644 index 0000000..4d3d13b --- /dev/null +++ b/gas/testsuite/gas/i386/avx256int.s @@ -0,0 +1,593 @@ +# Check i386 256bit integer AVX instructions + + .allow_index_reg + .text +_start: + +# Tests for op ymm, regl + vpmovmskb %ymm4,%ecx + +# Tests for op imm8, ymm, ymm + vpslld $7,%ymm6,%ymm2 + vpslldq $7,%ymm6,%ymm2 + vpsllq $7,%ymm6,%ymm2 + vpsllw $7,%ymm6,%ymm2 + vpsrad $7,%ymm6,%ymm2 + vpsraw $7,%ymm6,%ymm2 + vpsrld $7,%ymm6,%ymm2 + vpsrldq $7,%ymm6,%ymm2 + vpsrlq $7,%ymm6,%ymm2 + vpsrlw $7,%ymm6,%ymm2 + +# Tests for op imm8, ymm/mem256, ymm + vpshufd $7,%ymm6,%ymm2 + vpshufd $7,(%ecx),%ymm6 + vpshufhw $7,%ymm6,%ymm2 + vpshufhw $7,(%ecx),%ymm6 + vpshuflw $7,%ymm6,%ymm2 + vpshuflw $7,(%ecx),%ymm6 + +# Tests for op ymm/mem256, ymm, ymm + vpackssdw %ymm4,%ymm6,%ymm2 + vpackssdw (%ecx),%ymm6,%ymm2 + vpacksswb %ymm4,%ymm6,%ymm2 + vpacksswb (%ecx),%ymm6,%ymm2 + vpackusdw %ymm4,%ymm6,%ymm2 + vpackusdw (%ecx),%ymm6,%ymm2 + vpackuswb %ymm4,%ymm6,%ymm2 + vpackuswb (%ecx),%ymm6,%ymm2 + vpaddb %ymm4,%ymm6,%ymm2 + vpaddb (%ecx),%ymm6,%ymm2 + vpaddw %ymm4,%ymm6,%ymm2 + vpaddw (%ecx),%ymm6,%ymm2 + vpaddd %ymm4,%ymm6,%ymm2 + vpaddd (%ecx),%ymm6,%ymm2 + vpaddq %ymm4,%ymm6,%ymm2 + vpaddq (%ecx),%ymm6,%ymm2 + vpaddsb %ymm4,%ymm6,%ymm2 + vpaddsb (%ecx),%ymm6,%ymm2 + vpaddsw %ymm4,%ymm6,%ymm2 + vpaddsw (%ecx),%ymm6,%ymm2 + vpaddusb %ymm4,%ymm6,%ymm2 + vpaddusb (%ecx),%ymm6,%ymm2 + vpaddusw %ymm4,%ymm6,%ymm2 + vpaddusw (%ecx),%ymm6,%ymm2 + vpand %ymm4,%ymm6,%ymm2 + vpand (%ecx),%ymm6,%ymm2 + vpandn %ymm4,%ymm6,%ymm2 + vpandn (%ecx),%ymm6,%ymm2 + vpavgb %ymm4,%ymm6,%ymm2 + vpavgb (%ecx),%ymm6,%ymm2 + vpavgw %ymm4,%ymm6,%ymm2 + vpavgw (%ecx),%ymm6,%ymm2 + vpcmpeqb %ymm4,%ymm6,%ymm2 + vpcmpeqb (%ecx),%ymm6,%ymm2 + vpcmpeqw %ymm4,%ymm6,%ymm2 + vpcmpeqw (%ecx),%ymm6,%ymm2 + vpcmpeqd %ymm4,%ymm6,%ymm2 + vpcmpeqd (%ecx),%ymm6,%ymm2 + vpcmpeqq %ymm4,%ymm6,%ymm2 + vpcmpeqq (%ecx),%ymm6,%ymm2 + vpcmpgtb %ymm4,%ymm6,%ymm2 + vpcmpgtb (%ecx),%ymm6,%ymm2 + vpcmpgtw %ymm4,%ymm6,%ymm2 + vpcmpgtw (%ecx),%ymm6,%ymm2 + vpcmpgtd %ymm4,%ymm6,%ymm2 + vpcmpgtd (%ecx),%ymm6,%ymm2 + vpcmpgtq %ymm4,%ymm6,%ymm2 + vpcmpgtq (%ecx),%ymm6,%ymm2 + vphaddw %ymm4,%ymm6,%ymm2 + vphaddw (%ecx),%ymm6,%ymm2 + vphaddd %ymm4,%ymm6,%ymm2 + vphaddd (%ecx),%ymm6,%ymm2 + vphaddsw %ymm4,%ymm6,%ymm2 + vphaddsw (%ecx),%ymm6,%ymm2 + vphsubw %ymm4,%ymm6,%ymm2 + vphsubw (%ecx),%ymm6,%ymm2 + vphsubd %ymm4,%ymm6,%ymm2 + vphsubd (%ecx),%ymm6,%ymm2 + vphsubsw %ymm4,%ymm6,%ymm2 + vphsubsw (%ecx),%ymm6,%ymm2 + vpmaddwd %ymm4,%ymm6,%ymm2 + vpmaddwd (%ecx),%ymm6,%ymm2 + vpmaddubsw %ymm4,%ymm6,%ymm2 + vpmaddubsw (%ecx),%ymm6,%ymm2 + vpmaxsb %ymm4,%ymm6,%ymm2 + vpmaxsb (%ecx),%ymm6,%ymm2 + vpmaxsw %ymm4,%ymm6,%ymm2 + vpmaxsw (%ecx),%ymm6,%ymm2 + vpmaxsd %ymm4,%ymm6,%ymm2 + vpmaxsd (%ecx),%ymm6,%ymm2 + vpmaxub %ymm4,%ymm6,%ymm2 + vpmaxub (%ecx),%ymm6,%ymm2 + vpmaxuw %ymm4,%ymm6,%ymm2 + vpmaxuw (%ecx),%ymm6,%ymm2 + vpmaxud %ymm4,%ymm6,%ymm2 + vpmaxud (%ecx),%ymm6,%ymm2 + vpminsb %ymm4,%ymm6,%ymm2 + vpminsb (%ecx),%ymm6,%ymm2 + vpminsw %ymm4,%ymm6,%ymm2 + vpminsw (%ecx),%ymm6,%ymm2 + vpminsd %ymm4,%ymm6,%ymm2 + vpminsd (%ecx),%ymm6,%ymm2 + vpminub %ymm4,%ymm6,%ymm2 + vpminub (%ecx),%ymm6,%ymm2 + vpminuw %ymm4,%ymm6,%ymm2 + vpminuw (%ecx),%ymm6,%ymm2 + vpminud %ymm4,%ymm6,%ymm2 + vpminud (%ecx),%ymm6,%ymm2 + vpmulhuw %ymm4,%ymm6,%ymm2 + vpmulhuw (%ecx),%ymm6,%ymm2 + vpmulhrsw %ymm4,%ymm6,%ymm2 + vpmulhrsw (%ecx),%ymm6,%ymm2 + vpmulhw %ymm4,%ymm6,%ymm2 + vpmulhw (%ecx),%ymm6,%ymm2 + vpmullw %ymm4,%ymm6,%ymm2 + vpmullw (%ecx),%ymm6,%ymm2 + vpmulld %ymm4,%ymm6,%ymm2 + vpmulld (%ecx),%ymm6,%ymm2 + vpmuludq %ymm4,%ymm6,%ymm2 + vpmuludq (%ecx),%ymm6,%ymm2 + vpmuldq %ymm4,%ymm6,%ymm2 + vpmuldq (%ecx),%ymm6,%ymm2 + vpor %ymm4,%ymm6,%ymm2 + vpor (%ecx),%ymm6,%ymm2 + vpsadbw %ymm4,%ymm6,%ymm2 + vpsadbw (%ecx),%ymm6,%ymm2 + vpshufb %ymm4,%ymm6,%ymm2 + vpshufb (%ecx),%ymm6,%ymm2 + vpsignb %ymm4,%ymm6,%ymm2 + vpsignb (%ecx),%ymm6,%ymm2 + vpsignw %ymm4,%ymm6,%ymm2 + vpsignw (%ecx),%ymm6,%ymm2 + vpsignd %ymm4,%ymm6,%ymm2 + vpsignd (%ecx),%ymm6,%ymm2 + vpsubb %ymm4,%ymm6,%ymm2 + vpsubb (%ecx),%ymm6,%ymm2 + vpsubw %ymm4,%ymm6,%ymm2 + vpsubw (%ecx),%ymm6,%ymm2 + vpsubd %ymm4,%ymm6,%ymm2 + vpsubd (%ecx),%ymm6,%ymm2 + vpsubq %ymm4,%ymm6,%ymm2 + vpsubq (%ecx),%ymm6,%ymm2 + vpsubsb %ymm4,%ymm6,%ymm2 + vpsubsb (%ecx),%ymm6,%ymm2 + vpsubsw %ymm4,%ymm6,%ymm2 + vpsubsw (%ecx),%ymm6,%ymm2 + vpsubusb %ymm4,%ymm6,%ymm2 + vpsubusb (%ecx),%ymm6,%ymm2 + vpsubusw %ymm4,%ymm6,%ymm2 + vpsubusw (%ecx),%ymm6,%ymm2 + vpunpckhbw %ymm4,%ymm6,%ymm2 + vpunpckhbw (%ecx),%ymm6,%ymm2 + vpunpckhwd %ymm4,%ymm6,%ymm2 + vpunpckhwd (%ecx),%ymm6,%ymm2 + vpunpckhdq %ymm4,%ymm6,%ymm2 + vpunpckhdq (%ecx),%ymm6,%ymm2 + vpunpckhqdq %ymm4,%ymm6,%ymm2 + vpunpckhqdq (%ecx),%ymm6,%ymm2 + vpunpcklbw %ymm4,%ymm6,%ymm2 + vpunpcklbw (%ecx),%ymm6,%ymm2 + vpunpcklwd %ymm4,%ymm6,%ymm2 + vpunpcklwd (%ecx),%ymm6,%ymm2 + vpunpckldq %ymm4,%ymm6,%ymm2 + vpunpckldq (%ecx),%ymm6,%ymm2 + vpunpcklqdq %ymm4,%ymm6,%ymm2 + vpunpcklqdq (%ecx),%ymm6,%ymm2 + vpxor %ymm4,%ymm6,%ymm2 + vpxor (%ecx),%ymm6,%ymm2 + +# Tests for op ymm/mem256, ymm + vpabsb %ymm4,%ymm6 + vpabsb (%ecx),%ymm4 + vpabsw %ymm4,%ymm6 + vpabsw (%ecx),%ymm4 + vpabsd %ymm4,%ymm6 + vpabsd (%ecx),%ymm4 + +# Tests for op imm8, ymm/mem256, ymm, ymm + vmpsadbw $7,%ymm4,%ymm6,%ymm2 + vmpsadbw $7,(%ecx),%ymm6,%ymm2 + vpalignr $7,%ymm4,%ymm6,%ymm2 + vpalignr $7,(%ecx),%ymm6,%ymm2 + vpblendw $7,%ymm4,%ymm6,%ymm2 + vpblendw $7,(%ecx),%ymm6,%ymm2 + +# Tests for op ymm, ymm/mem256, ymm, ymm + vpblendvb %ymm4,%ymm6,%ymm2,%ymm7 + vpblendvb %ymm4,(%ecx),%ymm2,%ymm7 + +# Tests for op xmm/mem128, ymm, ymm + vpsllw %xmm4,%ymm6,%ymm2 + vpsllw (%ecx),%ymm6,%ymm2 + vpslld %xmm4,%ymm6,%ymm2 + vpslld (%ecx),%ymm6,%ymm2 + vpsllq %xmm4,%ymm6,%ymm2 + vpsllq (%ecx),%ymm6,%ymm2 + vpsraw %xmm4,%ymm6,%ymm2 + vpsraw (%ecx),%ymm6,%ymm2 + vpsrad %xmm4,%ymm6,%ymm2 + vpsrad (%ecx),%ymm6,%ymm2 + vpsrlw %xmm4,%ymm6,%ymm2 + vpsrlw (%ecx),%ymm6,%ymm2 + vpsrld %xmm4,%ymm6,%ymm2 + vpsrld (%ecx),%ymm6,%ymm2 + vpsrlq %xmm4,%ymm6,%ymm2 + vpsrlq (%ecx),%ymm6,%ymm2 + +# Tests for op xmm/mem128, ymm + vpmovsxbw %xmm4,%ymm4 + vpmovsxbw (%ecx),%ymm4 + vpmovsxwd %xmm4,%ymm4 + vpmovsxwd (%ecx),%ymm4 + vpmovsxdq %xmm4,%ymm4 + vpmovsxdq (%ecx),%ymm4 + vpmovzxbw %xmm4,%ymm4 + vpmovzxbw (%ecx),%ymm4 + vpmovzxwd %xmm4,%ymm4 + vpmovzxwd (%ecx),%ymm4 + vpmovzxdq %xmm4,%ymm4 + vpmovzxdq (%ecx),%ymm4 + +# Tests for op xmm/mem64, ymm + vpmovsxbd %xmm4,%ymm6 + vpmovsxbd (%ecx),%ymm4 + vpmovsxwq %xmm4,%ymm6 + vpmovsxwq (%ecx),%ymm4 + vpmovzxbd %xmm4,%ymm6 + vpmovzxbd (%ecx),%ymm4 + vpmovzxwq %xmm4,%ymm6 + vpmovzxwq (%ecx),%ymm4 + +# Tests for op xmm/mem32, ymm + vpmovsxbq %xmm4,%ymm4 + vpmovsxbq (%ecx),%ymm4 + vpmovzxbq %xmm4,%ymm4 + vpmovzxbq (%ecx),%ymm4 + + .intel_syntax noprefix + +# Tests for op ymm, regl + vpmovmskb ecx,ymm4 + +# Tests for op imm8, ymm, ymm + vpslld ymm2,ymm6,7 + vpslldq ymm2,ymm6,7 + vpsllq ymm2,ymm6,7 + vpsllw ymm2,ymm6,7 + vpsrad ymm2,ymm6,7 + vpsraw ymm2,ymm6,7 + vpsrld ymm2,ymm6,7 + vpsrldq ymm2,ymm6,7 + vpsrlq ymm2,ymm6,7 + vpsrlw ymm2,ymm6,7 + +# Tests for op imm8, ymm/mem256, ymm + vpshufd ymm2,ymm6,7 + vpshufd ymm6,YMMWORD PTR [ecx],7 + vpshufd ymm6,[ecx],7 + vpshufhw ymm2,ymm6,7 + vpshufhw ymm6,YMMWORD PTR [ecx],7 + vpshufhw ymm6,[ecx],7 + vpshuflw ymm2,ymm6,7 + vpshuflw ymm6,YMMWORD PTR [ecx],7 + vpshuflw ymm6,[ecx],7 + +# Tests for op ymm/mem256, ymm, ymm + vpackssdw ymm2,ymm6,ymm4 + vpackssdw ymm2,ymm6,YMMWORD PTR [ecx] + vpackssdw ymm2,ymm6,[ecx] + vpacksswb ymm2,ymm6,ymm4 + vpacksswb ymm2,ymm6,YMMWORD PTR [ecx] + vpacksswb ymm2,ymm6,[ecx] + vpackusdw ymm2,ymm6,ymm4 + vpackusdw ymm2,ymm6,YMMWORD PTR [ecx] + vpackusdw ymm2,ymm6,[ecx] + vpackuswb ymm2,ymm6,ymm4 + vpackuswb ymm2,ymm6,YMMWORD PTR [ecx] + vpackuswb ymm2,ymm6,[ecx] + vpaddb ymm2,ymm6,ymm4 + vpaddb ymm2,ymm6,YMMWORD PTR [ecx] + vpaddb ymm2,ymm6,[ecx] + vpaddw ymm2,ymm6,ymm4 + vpaddw ymm2,ymm6,YMMWORD PTR [ecx] + vpaddw ymm2,ymm6,[ecx] + vpaddd ymm2,ymm6,ymm4 + vpaddd ymm2,ymm6,YMMWORD PTR [ecx] + vpaddd ymm2,ymm6,[ecx] + vpaddq ymm2,ymm6,ymm4 + vpaddq ymm2,ymm6,YMMWORD PTR [ecx] + vpaddq ymm2,ymm6,[ecx] + vpaddsb ymm2,ymm6,ymm4 + vpaddsb ymm2,ymm6,YMMWORD PTR [ecx] + vpaddsb ymm2,ymm6,[ecx] + vpaddsw ymm2,ymm6,ymm4 + vpaddsw ymm2,ymm6,YMMWORD PTR [ecx] + vpaddsw ymm2,ymm6,[ecx] + vpaddusb ymm2,ymm6,ymm4 + vpaddusb ymm2,ymm6,YMMWORD PTR [ecx] + vpaddusb ymm2,ymm6,[ecx] + vpaddusw ymm2,ymm6,ymm4 + vpaddusw ymm2,ymm6,YMMWORD PTR [ecx] + vpaddusw ymm2,ymm6,[ecx] + vpand ymm2,ymm6,ymm4 + vpand ymm2,ymm6,YMMWORD PTR [ecx] + vpand ymm2,ymm6,[ecx] + vpandn ymm2,ymm6,ymm4 + vpandn ymm2,ymm6,YMMWORD PTR [ecx] + vpandn ymm2,ymm6,[ecx] + vpavgb ymm2,ymm6,ymm4 + vpavgb ymm2,ymm6,YMMWORD PTR [ecx] + vpavgb ymm2,ymm6,[ecx] + vpavgw ymm2,ymm6,ymm4 + vpavgw ymm2,ymm6,YMMWORD PTR [ecx] + vpavgw ymm2,ymm6,[ecx] + vpcmpeqb ymm2,ymm6,ymm4 + vpcmpeqb ymm2,ymm6,YMMWORD PTR [ecx] + vpcmpeqb ymm2,ymm6,[ecx] + vpcmpeqw ymm2,ymm6,ymm4 + vpcmpeqw ymm2,ymm6,YMMWORD PTR [ecx] + vpcmpeqw ymm2,ymm6,[ecx] + vpcmpeqd ymm2,ymm6,ymm4 + vpcmpeqd ymm2,ymm6,YMMWORD PTR [ecx] + vpcmpeqd ymm2,ymm6,[ecx] + vpcmpeqq ymm2,ymm6,ymm4 + vpcmpeqq ymm2,ymm6,YMMWORD PTR [ecx] + vpcmpeqq ymm2,ymm6,[ecx] + vpcmpgtb ymm2,ymm6,ymm4 + vpcmpgtb ymm2,ymm6,YMMWORD PTR [ecx] + vpcmpgtb ymm2,ymm6,[ecx] + vpcmpgtw ymm2,ymm6,ymm4 + vpcmpgtw ymm2,ymm6,YMMWORD PTR [ecx] + vpcmpgtw ymm2,ymm6,[ecx] + vpcmpgtd ymm2,ymm6,ymm4 + vpcmpgtd ymm2,ymm6,YMMWORD PTR [ecx] + vpcmpgtd ymm2,ymm6,[ecx] + vpcmpgtq ymm2,ymm6,ymm4 + vpcmpgtq ymm2,ymm6,YMMWORD PTR [ecx] + vpcmpgtq ymm2,ymm6,[ecx] + vphaddw ymm2,ymm6,ymm4 + vphaddw ymm2,ymm6,YMMWORD PTR [ecx] + vphaddw ymm2,ymm6,[ecx] + vphaddd ymm2,ymm6,ymm4 + vphaddd ymm2,ymm6,YMMWORD PTR [ecx] + vphaddd ymm2,ymm6,[ecx] + vphaddsw ymm2,ymm6,ymm4 + vphaddsw ymm2,ymm6,YMMWORD PTR [ecx] + vphaddsw ymm2,ymm6,[ecx] + vphsubw ymm2,ymm6,ymm4 + vphsubw ymm2,ymm6,YMMWORD PTR [ecx] + vphsubw ymm2,ymm6,[ecx] + vphsubd ymm2,ymm6,ymm4 + vphsubd ymm2,ymm6,YMMWORD PTR [ecx] + vphsubd ymm2,ymm6,[ecx] + vphsubsw ymm2,ymm6,ymm4 + vphsubsw ymm2,ymm6,YMMWORD PTR [ecx] + vphsubsw ymm2,ymm6,[ecx] + vpmaddwd ymm2,ymm6,ymm4 + vpmaddwd ymm2,ymm6,YMMWORD PTR [ecx] + vpmaddwd ymm2,ymm6,[ecx] + vpmaddubsw ymm2,ymm6,ymm4 + vpmaddubsw ymm2,ymm6,YMMWORD PTR [ecx] + vpmaddubsw ymm2,ymm6,[ecx] + vpmaxsb ymm2,ymm6,ymm4 + vpmaxsb ymm2,ymm6,YMMWORD PTR [ecx] + vpmaxsb ymm2,ymm6,[ecx] + vpmaxsw ymm2,ymm6,ymm4 + vpmaxsw ymm2,ymm6,YMMWORD PTR [ecx] + vpmaxsw ymm2,ymm6,[ecx] + vpmaxsd ymm2,ymm6,ymm4 + vpmaxsd ymm2,ymm6,YMMWORD PTR [ecx] + vpmaxsd ymm2,ymm6,[ecx] + vpmaxub ymm2,ymm6,ymm4 + vpmaxub ymm2,ymm6,YMMWORD PTR [ecx] + vpmaxub ymm2,ymm6,[ecx] + vpmaxuw ymm2,ymm6,ymm4 + vpmaxuw ymm2,ymm6,YMMWORD PTR [ecx] + vpmaxuw ymm2,ymm6,[ecx] + vpmaxud ymm2,ymm6,ymm4 + vpmaxud ymm2,ymm6,YMMWORD PTR [ecx] + vpmaxud ymm2,ymm6,[ecx] + vpminsb ymm2,ymm6,ymm4 + vpminsb ymm2,ymm6,YMMWORD PTR [ecx] + vpminsb ymm2,ymm6,[ecx] + vpminsw ymm2,ymm6,ymm4 + vpminsw ymm2,ymm6,YMMWORD PTR [ecx] + vpminsw ymm2,ymm6,[ecx] + vpminsd ymm2,ymm6,ymm4 + vpminsd ymm2,ymm6,YMMWORD PTR [ecx] + vpminsd ymm2,ymm6,[ecx] + vpminub ymm2,ymm6,ymm4 + vpminub ymm2,ymm6,YMMWORD PTR [ecx] + vpminub ymm2,ymm6,[ecx] + vpminuw ymm2,ymm6,ymm4 + vpminuw ymm2,ymm6,YMMWORD PTR [ecx] + vpminuw ymm2,ymm6,[ecx] + vpminud ymm2,ymm6,ymm4 + vpminud ymm2,ymm6,YMMWORD PTR [ecx] + vpminud ymm2,ymm6,[ecx] + vpmulhuw ymm2,ymm6,ymm4 + vpmulhuw ymm2,ymm6,YMMWORD PTR [ecx] + vpmulhuw ymm2,ymm6,[ecx] + vpmulhrsw ymm2,ymm6,ymm4 + vpmulhrsw ymm2,ymm6,YMMWORD PTR [ecx] + vpmulhrsw ymm2,ymm6,[ecx] + vpmulhw ymm2,ymm6,ymm4 + vpmulhw ymm2,ymm6,YMMWORD PTR [ecx] + vpmulhw ymm2,ymm6,[ecx] + vpmullw ymm2,ymm6,ymm4 + vpmullw ymm2,ymm6,YMMWORD PTR [ecx] + vpmullw ymm2,ymm6,[ecx] + vpmulld ymm2,ymm6,ymm4 + vpmulld ymm2,ymm6,YMMWORD PTR [ecx] + vpmulld ymm2,ymm6,[ecx] + vpmuludq ymm2,ymm6,ymm4 + vpmuludq ymm2,ymm6,YMMWORD PTR [ecx] + vpmuludq ymm2,ymm6,[ecx] + vpmuldq ymm2,ymm6,ymm4 + vpmuldq ymm2,ymm6,YMMWORD PTR [ecx] + vpmuldq ymm2,ymm6,[ecx] + vpor ymm2,ymm6,ymm4 + vpor ymm2,ymm6,YMMWORD PTR [ecx] + vpor ymm2,ymm6,[ecx] + vpsadbw ymm2,ymm6,ymm4 + vpsadbw ymm2,ymm6,YMMWORD PTR [ecx] + vpsadbw ymm2,ymm6,[ecx] + vpshufb ymm2,ymm6,ymm4 + vpshufb ymm2,ymm6,YMMWORD PTR [ecx] + vpshufb ymm2,ymm6,[ecx] + vpsignb ymm2,ymm6,ymm4 + vpsignb ymm2,ymm6,YMMWORD PTR [ecx] + vpsignb ymm2,ymm6,[ecx] + vpsignw ymm2,ymm6,ymm4 + vpsignw ymm2,ymm6,YMMWORD PTR [ecx] + vpsignw ymm2,ymm6,[ecx] + vpsignd ymm2,ymm6,ymm4 + vpsignd ymm2,ymm6,YMMWORD PTR [ecx] + vpsignd ymm2,ymm6,[ecx] + vpsubb ymm2,ymm6,ymm4 + vpsubb ymm2,ymm6,YMMWORD PTR [ecx] + vpsubb ymm2,ymm6,[ecx] + vpsubw ymm2,ymm6,ymm4 + vpsubw ymm2,ymm6,YMMWORD PTR [ecx] + vpsubw ymm2,ymm6,[ecx] + vpsubd ymm2,ymm6,ymm4 + vpsubd ymm2,ymm6,YMMWORD PTR [ecx] + vpsubd ymm2,ymm6,[ecx] + vpsubq ymm2,ymm6,ymm4 + vpsubq ymm2,ymm6,YMMWORD PTR [ecx] + vpsubq ymm2,ymm6,[ecx] + vpsubsb ymm2,ymm6,ymm4 + vpsubsb ymm2,ymm6,YMMWORD PTR [ecx] + vpsubsb ymm2,ymm6,[ecx] + vpsubsw ymm2,ymm6,ymm4 + vpsubsw ymm2,ymm6,YMMWORD PTR [ecx] + vpsubsw ymm2,ymm6,[ecx] + vpsubusb ymm2,ymm6,ymm4 + vpsubusb ymm2,ymm6,YMMWORD PTR [ecx] + vpsubusb ymm2,ymm6,[ecx] + vpsubusw ymm2,ymm6,ymm4 + vpsubusw ymm2,ymm6,YMMWORD PTR [ecx] + vpsubusw ymm2,ymm6,[ecx] + vpunpckhbw ymm2,ymm6,ymm4 + vpunpckhbw ymm2,ymm6,YMMWORD PTR [ecx] + vpunpckhbw ymm2,ymm6,[ecx] + vpunpckhwd ymm2,ymm6,ymm4 + vpunpckhwd ymm2,ymm6,YMMWORD PTR [ecx] + vpunpckhwd ymm2,ymm6,[ecx] + vpunpckhdq ymm2,ymm6,ymm4 + vpunpckhdq ymm2,ymm6,YMMWORD PTR [ecx] + vpunpckhdq ymm2,ymm6,[ecx] + vpunpckhqdq ymm2,ymm6,ymm4 + vpunpckhqdq ymm2,ymm6,YMMWORD PTR [ecx] + vpunpckhqdq ymm2,ymm6,[ecx] + vpunpcklbw ymm2,ymm6,ymm4 + vpunpcklbw ymm2,ymm6,YMMWORD PTR [ecx] + vpunpcklbw ymm2,ymm6,[ecx] + vpunpcklwd ymm2,ymm6,ymm4 + vpunpcklwd ymm2,ymm6,YMMWORD PTR [ecx] + vpunpcklwd ymm2,ymm6,[ecx] + vpunpckldq ymm2,ymm6,ymm4 + vpunpckldq ymm2,ymm6,YMMWORD PTR [ecx] + vpunpckldq ymm2,ymm6,[ecx] + vpunpcklqdq ymm2,ymm6,ymm4 + vpunpcklqdq ymm2,ymm6,YMMWORD PTR [ecx] + vpunpcklqdq ymm2,ymm6,[ecx] + vpxor ymm2,ymm6,ymm4 + vpxor ymm2,ymm6,YMMWORD PTR [ecx] + vpxor ymm2,ymm6,[ecx] + +# Tests for op ymm/mem256, ymm + vpabsb ymm6,ymm4 + vpabsb ymm4,YMMWORD PTR [ecx] + vpabsb ymm4,[ecx] + vpabsw ymm6,ymm4 + vpabsw ymm4,YMMWORD PTR [ecx] + vpabsw ymm4,[ecx] + vpabsd ymm6,ymm4 + vpabsd ymm4,YMMWORD PTR [ecx] + vpabsd ymm4,[ecx] + +# Tests for op imm8, ymm/mem256, ymm, ymm + vmpsadbw ymm2,ymm6,ymm4,7 + vmpsadbw ymm2,ymm6,YMMWORD PTR [ecx],7 + vmpsadbw ymm2,ymm6,[ecx],7 + vpalignr ymm2,ymm6,ymm4,7 + vpalignr ymm2,ymm6,YMMWORD PTR [ecx],7 + vpalignr ymm2,ymm6,[ecx],7 + vpblendw ymm2,ymm6,ymm4,7 + vpblendw ymm2,ymm6,YMMWORD PTR [ecx],7 + vpblendw ymm2,ymm6,[ecx],7 + +# Tests for op ymm, ymm/mem256, ymm, ymm + vpblendvb ymm7,ymm2,ymm6,ymm4 + vpblendvb ymm7,ymm2,YMMWORD PTR [ecx],ymm4 + vpblendvb ymm7,ymm2,[ecx],ymm4 + +# Tests for op xmm/mem128, ymm, ymm + vpsllw ymm2,ymm6,xmm4 + vpsllw ymm2,ymm6,XMMWORD PTR [ecx] + vpsllw ymm2,ymm6,[ecx] + vpslld ymm2,ymm6,xmm4 + vpslld ymm2,ymm6,XMMWORD PTR [ecx] + vpslld ymm2,ymm6,[ecx] + vpsllq ymm2,ymm6,xmm4 + vpsllq ymm2,ymm6,XMMWORD PTR [ecx] + vpsllq ymm2,ymm6,[ecx] + vpsraw ymm2,ymm6,xmm4 + vpsraw ymm2,ymm6,XMMWORD PTR [ecx] + vpsraw ymm2,ymm6,[ecx] + vpsrad ymm2,ymm6,xmm4 + vpsrad ymm2,ymm6,XMMWORD PTR [ecx] + vpsrad ymm2,ymm6,[ecx] + vpsrlw ymm2,ymm6,xmm4 + vpsrlw ymm2,ymm6,XMMWORD PTR [ecx] + vpsrlw ymm2,ymm6,[ecx] + vpsrld ymm2,ymm6,xmm4 + vpsrld ymm2,ymm6,XMMWORD PTR [ecx] + vpsrld ymm2,ymm6,[ecx] + vpsrlq ymm2,ymm6,xmm4 + vpsrlq ymm2,ymm6,XMMWORD PTR [ecx] + vpsrlq ymm2,ymm6,[ecx] + +# Tests for op xmm/mem128, ymm + vpmovsxbw ymm4,xmm4 + vpmovsxbw ymm4,XMMWORD PTR [ecx] + vpmovsxbw ymm4,[ecx] + vpmovsxwd ymm4,xmm4 + vpmovsxwd ymm4,XMMWORD PTR [ecx] + vpmovsxwd ymm4,[ecx] + vpmovsxdq ymm4,xmm4 + vpmovsxdq ymm4,XMMWORD PTR [ecx] + vpmovsxdq ymm4,[ecx] + vpmovzxbw ymm4,xmm4 + vpmovzxbw ymm4,XMMWORD PTR [ecx] + vpmovzxbw ymm4,[ecx] + vpmovzxwd ymm4,xmm4 + vpmovzxwd ymm4,XMMWORD PTR [ecx] + vpmovzxwd ymm4,[ecx] + vpmovzxdq ymm4,xmm4 + vpmovzxdq ymm4,XMMWORD PTR [ecx] + vpmovzxdq ymm4,[ecx] + +# Tests for op xmm/mem64, ymm + vpmovsxbd ymm6,xmm4 + vpmovsxbd ymm4,QWORD PTR [ecx] + vpmovsxbd ymm4,[ecx] + vpmovsxwq ymm6,xmm4 + vpmovsxwq ymm4,QWORD PTR [ecx] + vpmovsxwq ymm4,[ecx] + vpmovzxbd ymm6,xmm4 + vpmovzxbd ymm4,QWORD PTR [ecx] + vpmovzxbd ymm4,[ecx] + vpmovzxwq ymm6,xmm4 + vpmovzxwq ymm4,QWORD PTR [ecx] + vpmovzxwq ymm4,[ecx] + +# Tests for op xmm/mem32, ymm + vpmovsxbq ymm4,xmm4 + vpmovsxbq ymm4,DWORD PTR [ecx] + vpmovsxbq ymm4,[ecx] + vpmovzxbq ymm4,xmm4 + vpmovzxbq ymm4,DWORD PTR [ecx] + vpmovzxbq ymm4,[ecx] diff --git a/gas/testsuite/gas/i386/bmi2-intel.d b/gas/testsuite/gas/i386/bmi2-intel.d new file mode 100644 index 0000000..fa12a0c --- /dev/null +++ b/gas/testsuite/gas/i386/bmi2-intel.d @@ -0,0 +1,52 @@ +#as: +#objdump: -dwMintel +#name: i386 BMI2 insns (Intel disassembly) +#source: bmi2.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx ebx,eax,0x7 +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx esi,ebx,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 63 f5 f0 pdep esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep esi,ebx,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 62 f5 f0 pext esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext esi,ebx,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 78 f5 f3 bzhi esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi esi,DWORD PTR \[ecx\],ebx +[ ]*[a-f0-9]+: c4 e2 7a f7 f3 sarx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx esi,DWORD PTR \[ecx\],ebx +[ ]*[a-f0-9]+: c4 e2 79 f7 f3 shlx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx esi,DWORD PTR \[ecx\],ebx +[ ]*[a-f0-9]+: c4 e2 7b f7 f3 shrx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx esi,DWORD PTR \[ecx\],ebx +[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx ebx,eax,0x7 +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[ecx\],0x7 +[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx esi,ebx,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx esi,ebx,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 63 f5 f0 pdep esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep esi,ebx,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep esi,ebx,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 62 f5 f0 pext esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext esi,ebx,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext esi,ebx,DWORD PTR \[ecx\] +[ ]*[a-f0-9]+: c4 e2 78 f5 f3 bzhi esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi esi,DWORD PTR \[ecx\],ebx +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi esi,DWORD PTR \[ecx\],ebx +[ ]*[a-f0-9]+: c4 e2 7a f7 f3 sarx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx esi,DWORD PTR \[ecx\],ebx +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx esi,DWORD PTR \[ecx\],ebx +[ ]*[a-f0-9]+: c4 e2 79 f7 f3 shlx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx esi,DWORD PTR \[ecx\],ebx +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx esi,DWORD PTR \[ecx\],ebx +[ ]*[a-f0-9]+: c4 e2 7b f7 f3 shrx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx esi,DWORD PTR \[ecx\],ebx +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx esi,DWORD PTR \[ecx\],ebx +#pass diff --git a/gas/testsuite/gas/i386/bmi2.d b/gas/testsuite/gas/i386/bmi2.d new file mode 100644 index 0000000..d52e4d1 --- /dev/null +++ b/gas/testsuite/gas/i386/bmi2.d @@ -0,0 +1,51 @@ +#as: +#objdump: -dw +#name: i386 BMI2 insns + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx \$0x7,%eax,%ebx +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%ecx\),%ebx +[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx \(%ecx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f5 f0 pdep %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep \(%ecx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f5 f0 pext %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext \(%ecx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 78 f5 f3 bzhi %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi %ebx,\(%ecx\),%esi +[ ]*[a-f0-9]+: c4 e2 7a f7 f3 sarx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx %ebx,\(%ecx\),%esi +[ ]*[a-f0-9]+: c4 e2 79 f7 f3 shlx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx %ebx,\(%ecx\),%esi +[ ]*[a-f0-9]+: c4 e2 7b f7 f3 shrx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx %ebx,\(%ecx\),%esi +[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx \$0x7,%eax,%ebx +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%ecx\),%ebx +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%ecx\),%ebx +[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx \(%ecx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx \(%ecx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f5 f0 pdep %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep \(%ecx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep \(%ecx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f5 f0 pext %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext \(%ecx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext \(%ecx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 78 f5 f3 bzhi %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi %ebx,\(%ecx\),%esi +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi %ebx,\(%ecx\),%esi +[ ]*[a-f0-9]+: c4 e2 7a f7 f3 sarx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx %ebx,\(%ecx\),%esi +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx %ebx,\(%ecx\),%esi +[ ]*[a-f0-9]+: c4 e2 79 f7 f3 shlx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx %ebx,\(%ecx\),%esi +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx %ebx,\(%ecx\),%esi +[ ]*[a-f0-9]+: c4 e2 7b f7 f3 shrx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx %ebx,\(%ecx\),%esi +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx %ebx,\(%ecx\),%esi +#pass diff --git a/gas/testsuite/gas/i386/bmi2.s b/gas/testsuite/gas/i386/bmi2.s new file mode 100644 index 0000000..415994c --- /dev/null +++ b/gas/testsuite/gas/i386/bmi2.s @@ -0,0 +1,59 @@ +# Check 32bit BMI2 instructions + + .allow_index_reg + .text +_start: + +# Test for op r32, r/m32, imm8 + rorx $7,%eax,%ebx + rorx $7,(%ecx),%ebx + +# Test for op r32, r32, r/m32 + mulx %eax,%ebx,%esi + mulx (%ecx),%ebx,%esi + pdep %eax,%ebx,%esi + pdep (%ecx),%ebx,%esi + pext %eax,%ebx,%esi + pext (%ecx),%ebx,%esi + +# Test for op r32, r/m32, r32 + bzhi %eax,%ebx,%esi + bzhi %ebx,(%ecx),%esi + sarx %eax,%ebx,%esi + sarx %ebx,(%ecx),%esi + shlx %eax,%ebx,%esi + shlx %ebx,(%ecx),%esi + shrx %eax,%ebx,%esi + shrx %ebx,(%ecx),%esi + + .intel_syntax noprefix + +# Test for op r32, r/m32, imm8 + rorx ebx,eax,7 + rorx ebx,DWORD PTR [ecx],7 + rorx ebx,[ecx],7 + +# Test for op r32, r32, r/m32 + mulx esi,ebx,eax + mulx esi,ebx,DWORD PTR [ecx] + mulx esi,ebx,[ecx] + pdep esi,ebx,eax + pdep esi,ebx,DWORD PTR [ecx] + pdep esi,ebx,[ecx] + pext esi,ebx,eax + pext esi,ebx,DWORD PTR [ecx] + pext esi,ebx,[ecx] + +# Test for op r32, r/m32, r32 + bzhi esi,ebx,eax + bzhi esi,DWORD PTR [ecx],ebx + bzhi esi,[ecx],ebx + sarx esi,ebx,eax + sarx esi,DWORD PTR [ecx],ebx + sarx esi,[ecx],ebx + shlx esi,ebx,eax + shlx esi,DWORD PTR [ecx],ebx + shlx esi,[ecx],ebx + shrx esi,ebx,eax + shrx esi,DWORD PTR [ecx],ebx + shrx esi,[ecx],ebx diff --git a/gas/testsuite/gas/i386/dw2-compress-1.d b/gas/testsuite/gas/i386/dw2-compress-1.d index 71c9c70..f47e58c 100644 --- a/gas/testsuite/gas/i386/dw2-compress-1.d +++ b/gas/testsuite/gas/i386/dw2-compress-1.d @@ -10,7 +10,7 @@ Contents of the .zdebug_info section: Abbrev Offset: 0 Pointer Size: 4 <0>: Abbrev Number: 1 \(DW_TAG_compile_unit\) - < c> DW_AT_stmt_list : 0x0 + DW_AT_stmt_list : 0x0 <10> DW_AT_high_pc : 0x4 <14> DW_AT_low_pc : 0x0 <18> DW_AT_name : file1.txt diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 0eb151f..e38cd27 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -82,6 +82,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "nops-1-k8" run_dump_test "nops-1-core2" run_dump_test "nops-1-bdver1" + run_dump_test "nops-1-bdver2" run_dump_test "nops-2" run_dump_test "nops-2-i386" run_dump_test "nops-2-core2" @@ -123,6 +124,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "arch-7" run_dump_test "arch-9" run_dump_test "arch-10" + run_dump_test "arch-10-lzcnt" run_list_test "arch-10-1" "-march=generic32 -I${srcdir}/$subdir -al" run_list_test "arch-10-2" "-march=i686 -I${srcdir}/$subdir -al" run_list_test "arch-10-3" "-march=i686+sse4.2 -I${srcdir}/$subdir -al" @@ -144,6 +146,12 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "avx-intel" run_dump_test "avx-scalar" run_dump_test "avx-scalar-intel" + run_dump_test "avx256int" + run_dump_test "avx256int-intel" + run_dump_test "avx2" + run_dump_test "avx2-intel" + run_dump_test "avx-gather" + run_dump_test "avx-gather-intel" run_dump_test "sse2avx" run_list_test "inval-avx" "-al" run_dump_test "sse-check" @@ -157,6 +165,9 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "ept" run_dump_test "ept-intel" run_list_test "inval-ept" "-al" + run_dump_test "invpcid" + run_dump_test "invpcid-intel" + run_list_test "inval-invpcid" "-al" run_dump_test "arch-avx-1" run_list_test "arch-avx-1-1" "-march=generic32+avx -I${srcdir}/$subdir -al" run_list_test "arch-avx-1-2" "-march=generic32+aes -I${srcdir}/$subdir -al" @@ -168,6 +179,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "opts-intel" run_dump_test "sse2avx-opts" run_dump_test "sse2avx-opts-intel" + run_dump_test "bmi2" + run_dump_test "bmi2-intel" run_dump_test "fma" run_dump_test "fma-intel" run_dump_test "fma-scalar" @@ -224,6 +237,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_list_test "ifunc-2" run_dump_test "ifunc-3" run_list_test "l1om-inval" "-march=l1om --32" + run_list_test "k1om-inval" "-march=k1om --32" run_dump_test "localpic" run_dump_test "debug1" @@ -316,6 +330,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-nops-1-core2" run_dump_test "x86-64-nops-1-pentium" run_dump_test "x86-64-nops-1-bdver1" + run_dump_test "x86-64-nops-1-bdver2" run_dump_test "x86-64-nops-2" run_dump_test "x86-64-nops-3" run_dump_test "x86-64-nops-4" @@ -347,6 +362,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-fxsave-intel" run_dump_test "x86-64-arch-1" run_dump_test "x86-64-arch-2" + run_dump_test "x86-64-arch-2-lzcnt" run_dump_test "x86-64-xsave" run_dump_test "x86-64-xsave-intel" run_dump_test "x86-64-aes" @@ -357,6 +373,12 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-avx-intel" run_dump_test "x86-64-avx-scalar" run_dump_test "x86-64-avx-scalar-intel" + run_dump_test "x86-64-avx256int" + run_dump_test "x86-64-avx256int-intel" + run_dump_test "x86-64-avx2" + run_dump_test "x86-64-avx2-intel" + run_dump_test "x86-64-avx-gather" + run_dump_test "x86-64-avx-gather-intel" run_dump_test "x86-64-sse2avx" run_list_test "x86-64-inval-avx" "-al" run_dump_test "x86-64-sse-check" @@ -370,12 +392,17 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-ept" run_dump_test "x86-64-ept-intel" run_list_test "x86-64-inval-ept" "-al" + run_dump_test "x86-64-invpcid" + run_dump_test "x86-64-invpcid-intel" + run_list_test "x86-64-inval-invpcid" "-al" run_dump_test "x86-64-opts" run_dump_test "x86-64-opts-intel" run_dump_test "x86-64-sse2avx-opts" run_dump_test "x86-64-sse2avx-opts-intel" run_dump_test "x86-64-avx-swap" run_dump_test "x86-64-avx-swap-intel" + run_dump_test "x86-64-bmi2" + run_dump_test "x86-64-bmi2-intel" run_dump_test "x86-64-fma" run_dump_test "x86-64-fma-intel" run_dump_test "x86-64-fma-scalar" @@ -422,6 +449,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-opcode-inval-intel" run_dump_test "intel-got64" run_dump_test "l1om" + run_dump_test "k1om" run_dump_test "x86-64-localpic" run_dump_test "debug1" diff --git a/gas/testsuite/gas/i386/ilp32/ilp32.exp b/gas/testsuite/gas/i386/ilp32/ilp32.exp index 7145fad..de43bf2 100644 --- a/gas/testsuite/gas/i386/ilp32/ilp32.exp +++ b/gas/testsuite/gas/i386/ilp32/ilp32.exp @@ -25,7 +25,6 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check] && } } - run_list_test "inval" "-al" run_list_test "reloc64" "--defsym _bad_=1" set ASFLAGS "$old_ASFLAGS" diff --git a/gas/testsuite/gas/i386/ilp32/inval.l b/gas/testsuite/gas/i386/ilp32/inval.l deleted file mode 100644 index d037bae..0000000 --- a/gas/testsuite/gas/i386/ilp32/inval.l +++ /dev/null @@ -1,23 +0,0 @@ -.*: Assembler messages: -.*:3: Error: .* -.*:4: Error: .* -.*:5: Error: .* -.*:6: Error: .* -GAS LISTING .* - - -[ ]*1[ ]+\.text -[ ]*2[ ]+\# All the following should be illegal for x32 -[ ]*3[ ]+\?\?\?\? 48A10000 movabs xxx,%rax -[ ]*3[ ]+00000000 -[ ]*3[ ]+0000 -[ ]*4[ ]+\?\?\?\? 48A10000 movabs foo,%rax -[ ]*4[ ]+00000000 -[ ]*4[ ]+0000 -[ ]*5[ ]+\?\?\?\? 48A10000 movabsq xxx,%rax -[ ]*5[ ]+00000000 -[ ]*5[ ]+0000 -[ ]*6[ ]+\?\?\?\? 48A10000 movabsq foo,%rax -\*\*\*\* Error:cannot represent relocation type BFD_RELOC_[ ]*64[ ]+in x32 mode -[ ]*6[ ]+00000000 -[ ]*6[ ]+0000 diff --git a/gas/testsuite/gas/i386/ilp32/inval.s b/gas/testsuite/gas/i386/ilp32/inval.s deleted file mode 100644 index f117ca0..0000000 --- a/gas/testsuite/gas/i386/ilp32/inval.s +++ /dev/null @@ -1,6 +0,0 @@ - .text -# All the following should be illegal for x32 - movabs xxx,%rax - movabs foo,%rax - movabsq xxx,%rax - movabsq foo,%rax diff --git a/gas/testsuite/gas/i386/ilp32/quad.d b/gas/testsuite/gas/i386/ilp32/quad.d index 6f8a6c6..f337bae 100644 --- a/gas/testsuite/gas/i386/ilp32/quad.d +++ b/gas/testsuite/gas/i386/ilp32/quad.d @@ -1,14 +1,14 @@ #objdump: -sr -#name: xquad +#name: x86-64 (ILP32) quad .*: +file format .* RELOCATION RECORDS FOR \[.data\]: OFFSET +TYPE +VALUE -0+ R_X86_64_32 +foo -0+10 R_X86_64_32 +bar -0+20 R_X86_64_32 +foo -0+30 R_X86_64_32 +bar +0+ R_X86_64_64 +foo +0+10 R_X86_64_64 +bar +0+20 R_X86_64_64 +foo +0+30 R_X86_64_64 +bar Contents of section .data: diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-avx-intel.d b/gas/testsuite/gas/i386/ilp32/x86-64-avx-intel.d index c3fcfc5..b6fbd3a 100644 --- a/gas/testsuite/gas/i386/ilp32/x86-64-avx-intel.d +++ b/gas/testsuite/gas/i386/ilp32/x86-64-avx-intel.d @@ -1065,6 +1065,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd DWORD PTR \[rcx\],xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\] [ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss xmm6,xmm4,ecx @@ -1094,8 +1096,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c5 f9 c5 cc 07 vpextrw ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4 @@ -3083,6 +3083,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\] [ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss xmm6,xmm4,ecx @@ -3124,9 +3127,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4 diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-avx.d b/gas/testsuite/gas/i386/ilp32/x86-64-avx.d index 39912e6..4182c13 100644 --- a/gas/testsuite/gas/i386/ilp32/x86-64-avx.d +++ b/gas/testsuite/gas/i386/ilp32/x86-64-avx.d @@ -1065,6 +1065,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd \$0x7,%xmm4,\(%rcx\) [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\) +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss %ecx,%xmm4,%xmm6 @@ -1094,8 +1096,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c5 f9 c5 cc 07 vpextrw \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\) -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx @@ -3083,6 +3083,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\) [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\) +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss %ecx,%xmm4,%xmm6 @@ -3124,9 +3127,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\) [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\) -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-branch.d b/gas/testsuite/gas/i386/ilp32/x86-64-branch.d index cb33840..9118db1 100644 --- a/gas/testsuite/gas/i386/ilp32/x86-64-branch.d +++ b/gas/testsuite/gas/i386/ilp32/x86-64-branch.d @@ -18,6 +18,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\) +[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x1f 1b: R_X86_64_PC32 \*ABS\*\+0x10003c +[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x24 20: R_X86_64_PC32 \*ABS\*\+0x10003c [ ]*[a-f0-9]+: ff d0 callq \*%rax [ ]*[a-f0-9]+: ff d0 callq \*%rax [ ]*[a-f0-9]+: 66 ff d0 callw \*%ax @@ -28,4 +30,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\) +[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x43 3f: R_X86_64_PC32 \*ABS\*\+0x10003c +[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x48 44: R_X86_64_PC32 \*ABS\*\+0x10003c #pass diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-pcrel.d b/gas/testsuite/gas/i386/ilp32/x86-64-pcrel.d index decbf58..6d11381 100644 --- a/gas/testsuite/gas/i386/ilp32/x86-64-pcrel.d +++ b/gas/testsuite/gas/i386/ilp32/x86-64-pcrel.d @@ -5,13 +5,15 @@ Disassembly of section .text: -0+000 <_start>: -[ ]*[0-9a-f]+:[ ]+b0 00[ ]+movb?[ ]+\$(0x)?0,%al[ ]*[0-9a-f]+:[ ]+R_X86_64_PC8[ ]+xtrn\+(0x)?1 -[ ]*[0-9a-f]+:[ ]+66 b8 00 00[ ]+movw?[ ]+\$(0x)?0,%ax[ ]*[0-9a-f]+:[ ]+R_X86_64_PC16[ ]+xtrn\+(0x)?2 -[ ]*[0-9a-f]+:[ ]+b8( 00){4}[ ]+movl?[ ]+\$(0x)?0,%eax[ ]*[0-9a-f]+:[ ]+R_X86_64_PC32[ ]+xtrn\+(0x)?1 -[ ]*[0-9a-f]+:[ ]+48 c7 c0( 00){4}[ ]+movq?[ ]+\$(0x)?0,%rax[ ]*[0-9a-f]+:[ ]+R_X86_64_PC32[ ]+xtrn\+(0x)?3 -[ ]*[0-9a-f]+:[ ]+b0 00[ ]+movb?[ ]+\$(0x)?0,%al[ ]*[0-9a-f]+:[ ]+R_X86_64_8[ ]+xtrn -[ ]*[0-9a-f]+:[ ]+66 b8 00 00[ ]+movw?[ ]+\$(0x)?0,%ax[ ]*[0-9a-f]+:[ ]+R_X86_64_16[ ]+xtrn -[ ]*[0-9a-f]+:[ ]+b8( 00){4}[ ]+movl?[ ]+\$(0x)?0,%eax[ ]*[0-9a-f]+:[ ]+R_X86_64_32[ ]+xtrn -[ ]*[0-9a-f]+:[ ]+48 c7 c0( 00){4}[ ]+movq?[ ]+\$(0x)?0,%rax[ ]*[0-9a-f]+:[ ]+R_X86_64_32S[ ]+xtrn +0+ <_start>: +[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al 1: R_X86_64_PC8 xtrn\+0x1 +[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax 4: R_X86_64_PC16 xtrn\+0x2 +[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax 7: R_X86_64_PC32 xtrn\+0x1 +[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax e: R_X86_64_PC32 xtrn\+0x3 +[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al 13: R_X86_64_8 xtrn +[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax 16: R_X86_64_16 xtrn +[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax 19: R_X86_64_32 xtrn +[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax 20: R_X86_64_32S xtrn +[ ]*[a-f0-9]+: 48 b8 00 00 00 00 00 00 00 00 movabs \$0x0,%rax 26: R_X86_64_64 xtrn +[ ]*[a-f0-9]+: 48 a1 00 00 00 00 00 00 00 00 movabs 0x0,%rax 30: R_X86_64_64 xtrn #pass diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-pcrel.s b/gas/testsuite/gas/i386/ilp32/x86-64-pcrel.s index 0fbee46..f8392ee 100644 --- a/gas/testsuite/gas/i386/ilp32/x86-64-pcrel.s +++ b/gas/testsuite/gas/i386/ilp32/x86-64-pcrel.s @@ -9,3 +9,5 @@ _start: movw $xtrn, %ax movl $xtrn, %eax movq $xtrn, %rax + movabs $xtrn, %rax + movabsq xtrn, %rax diff --git a/gas/testsuite/gas/i386/inval-invpcid.l b/gas/testsuite/gas/i386/inval-invpcid.l new file mode 100644 index 0000000..27c7f7c --- /dev/null +++ b/gas/testsuite/gas/i386/inval-invpcid.l @@ -0,0 +1,21 @@ +.*: Assembler messages: +.*:4: Error: .* +.*:5: Error: .* +.*:6: Error: .* +.*:9: Error: .* +.*:10: Error: .* +.*:11: Error: .* +GAS LISTING .* + + +[ ]*1[ ]+\# Check illegal INVPCID instructions +[ ]*2[ ]+\.text +[ ]*3[ ]+foo: +[ ]*4[ ]+invpcid \(%ecx\), %bx +[ ]*5[ ]+invpcid %ebx, \(%ecx\) +[ ]*6[ ]+invpcid %ebx, %ecx +[ ]*7[ ]+ +[ ]*8[ ]+\.intel_syntax noprefix +[ ]*9[ ]+invpcid bx, \[ecx\] +[ ]*10[ ]+invpcid \[ecx\], ebx +[ ]*11[ ]+invpcid ecx, ebx diff --git a/gas/testsuite/gas/i386/inval-invpcid.s b/gas/testsuite/gas/i386/inval-invpcid.s new file mode 100644 index 0000000..483d5f7 --- /dev/null +++ b/gas/testsuite/gas/i386/inval-invpcid.s @@ -0,0 +1,11 @@ +# Check illegal INVPCID instructions + .text +foo: + invpcid (%ecx), %bx + invpcid %ebx, (%ecx) + invpcid %ebx, %ecx + + .intel_syntax noprefix + invpcid bx, [ecx] + invpcid [ecx], ebx + invpcid ecx, ebx diff --git a/gas/testsuite/gas/i386/invpcid-intel.d b/gas/testsuite/gas/i386/invpcid-intel.d new file mode 100644 index 0000000..f0b4dc9 --- /dev/null +++ b/gas/testsuite/gas/i386/invpcid-intel.d @@ -0,0 +1,14 @@ +#as: +#objdump: -dwMintel +#name: i386 INVPCID insns (Intel disassembly) +#source: invpcid.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ : +[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid edx,\[eax\] +[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid edx,\[eax\] +#pass diff --git a/gas/testsuite/gas/i386/invpcid.d b/gas/testsuite/gas/i386/invpcid.d new file mode 100644 index 0000000..3ebd202 --- /dev/null +++ b/gas/testsuite/gas/i386/invpcid.d @@ -0,0 +1,13 @@ +#as: +#objdump: -dw +#name: i386 INVPCID insns + +.*: +file format .* + + +Disassembly of section .text: + +0+ : +[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid \(%eax\),%edx +[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid \(%eax\),%edx +#pass diff --git a/gas/testsuite/gas/i386/invpcid.s b/gas/testsuite/gas/i386/invpcid.s new file mode 100644 index 0000000..9f12731 --- /dev/null +++ b/gas/testsuite/gas/i386/invpcid.s @@ -0,0 +1,8 @@ +# Check INVPCID instruction + + .text +foo: + invpcid (%eax), %edx + + .intel_syntax noprefix + invpcid edx,[eax] diff --git a/gas/testsuite/gas/i386/k1om-inval.l b/gas/testsuite/gas/i386/k1om-inval.l new file mode 100644 index 0000000..607bc62 --- /dev/null +++ b/gas/testsuite/gas/i386/k1om-inval.l @@ -0,0 +1,2 @@ +Assembler messages: +Fatal error: Intel K1OM is 64bit only diff --git a/gas/testsuite/gas/i386/k1om-inval.s b/gas/testsuite/gas/i386/k1om-inval.s new file mode 100644 index 0000000..1ff7c29 --- /dev/null +++ b/gas/testsuite/gas/i386/k1om-inval.s @@ -0,0 +1,2 @@ + .text + nop diff --git a/gas/testsuite/gas/i386/k1om.d b/gas/testsuite/gas/i386/k1om.d new file mode 100644 index 0000000..0682444 --- /dev/null +++ b/gas/testsuite/gas/i386/k1om.d @@ -0,0 +1,259 @@ +#source: x86_64.s +#as: -J -march=k1om +#objdump: -dw +#name: k1om + +.*: +file format elf64-k1om.* + +Disassembly of section .text: + +0+ <.*>: +[ ]*[a-f0-9]+: 01 ca add %ecx,%edx +[ ]*[a-f0-9]+: 44 01 ca add %r9d,%edx +[ ]*[a-f0-9]+: 41 01 ca add %ecx,%r10d +[ ]*[a-f0-9]+: 48 01 ca add %rcx,%rdx +[ ]*[a-f0-9]+: 4d 01 ca add %r9,%r10 +[ ]*[a-f0-9]+: 41 01 c0 add %eax,%r8d +[ ]*[a-f0-9]+: 66 41 01 c0 add %ax,%r8w +[ ]*[a-f0-9]+: 49 01 c0 add %rax,%r8 +[ ]*[a-f0-9]+: 05 11 22 33 44 add \$0x44332211,%eax +[ ]*[a-f0-9]+: 48 05 11 22 33 f4 add \$0xfffffffff4332211,%rax +[ ]*[a-f0-9]+: 66 05 33 44 add \$0x4433,%ax +[ ]*[a-f0-9]+: 48 05 11 22 33 44 add \$0x44332211,%rax +[ ]*[a-f0-9]+: 00 ca add %cl,%dl +[ ]*[a-f0-9]+: 00 f7 add %dh,%bh +[ ]*[a-f0-9]+: 40 00 f7 add %sil,%dil +[ ]*[a-f0-9]+: 41 00 f7 add %sil,%r15b +[ ]*[a-f0-9]+: 44 00 f7 add %r14b,%dil +[ ]*[a-f0-9]+: 45 00 f7 add %r14b,%r15b +[ ]*[a-f0-9]+: 50 push %rax +[ ]*[a-f0-9]+: 41 50 push %r8 +[ ]*[a-f0-9]+: 41 59 pop %r9 +[ ]*[a-f0-9]+: 04 11 add \$0x11,%al +[ ]*[a-f0-9]+: 80 c4 11 add \$0x11,%ah +[ ]*[a-f0-9]+: 40 80 c4 11 add \$0x11,%spl +[ ]*[a-f0-9]+: 41 80 c0 11 add \$0x11,%r8b +[ ]*[a-f0-9]+: 41 80 c4 11 add \$0x11,%r12b +[ ]*[a-f0-9]+: 0f 20 c0 mov %cr0,%rax +[ ]*[a-f0-9]+: 41 0f 20 c0 mov %cr0,%r8 +[ ]*[a-f0-9]+: 44 0f 20 c0 mov %cr8,%rax +[ ]*[a-f0-9]+: 44 0f 22 c0 mov %rax,%cr8 +[ ]*[a-f0-9]+: f3 48 a5 rep movsq %ds:\(%rsi\),%es:\(%rdi\) +[ ]*[a-f0-9]+: 66 f3 a5 rep movsw %ds:\(%rsi\),%es:\(%rdi\) +[ ]*[a-f0-9]+: f3 48 a5 rep movsq %ds:\(%rsi\),%es:\(%rdi\) +[ ]*[a-f0-9]+: b0 11 mov \$0x11,%al +[ ]*[a-f0-9]+: b4 11 mov \$0x11,%ah +[ ]*[a-f0-9]+: 40 b4 11 mov \$0x11,%spl +[ ]*[a-f0-9]+: 41 b4 11 mov \$0x11,%r12b +[ ]*[a-f0-9]+: b8 44 33 22 11 mov \$0x11223344,%eax +[ ]*[a-f0-9]+: 41 b8 44 33 22 11 mov \$0x11223344,%r8d +[ ]*[a-f0-9]+: 48 b8 88 77 66 55 44 33 22 11 movabs \$0x1122334455667788,%rax +[ ]*[a-f0-9]+: 49 b8 88 77 66 55 44 33 22 11 movabs \$0x1122334455667788,%r8 +[ ]*[a-f0-9]+: 03 00 add \(%rax\),%eax +[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax +[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d +[ ]*[a-f0-9]+: 49 03 00 add \(%r8\),%rax +[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 222222c7 +[ ]*[a-f0-9]+: 03 45 00 add 0x0\(%rbp\),%eax +[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add 0x22222222,%eax +[ ]*[a-f0-9]+: 41 03 45 00 add 0x0\(%r13\),%eax +[ ]*[a-f0-9]+: 03 04 80 add \(%rax,%rax,4\),%eax +[ ]*[a-f0-9]+: 41 03 04 80 add \(%r8,%rax,4\),%eax +[ ]*[a-f0-9]+: 45 03 04 80 add \(%r8,%rax,4\),%r8d +[ ]*[a-f0-9]+: 43 03 04 80 add \(%r8,%r8,4\),%eax +[ ]*[a-f0-9]+: 46 01 04 81 add %r8d,\(%rcx,%r8,4\) +[ ]*[a-f0-9]+: 03 14 c0 add \(%rax,%rax,8\),%edx +[ ]*[a-f0-9]+: 03 14 c8 add \(%rax,%rcx,8\),%edx +[ ]*[a-f0-9]+: 03 14 d0 add \(%rax,%rdx,8\),%edx +[ ]*[a-f0-9]+: 03 14 d8 add \(%rax,%rbx,8\),%edx +[ ]*[a-f0-9]+: 03 10 add \(%rax\),%edx +[ ]*[a-f0-9]+: 03 14 e8 add \(%rax,%rbp,8\),%edx +[ ]*[a-f0-9]+: 03 14 f0 add \(%rax,%rsi,8\),%edx +[ ]*[a-f0-9]+: 03 14 f8 add \(%rax,%rdi,8\),%edx +[ ]*[a-f0-9]+: 42 03 14 c0 add \(%rax,%r8,8\),%edx +[ ]*[a-f0-9]+: 42 03 14 c8 add \(%rax,%r9,8\),%edx +[ ]*[a-f0-9]+: 42 03 14 d0 add \(%rax,%r10,8\),%edx +[ ]*[a-f0-9]+: 42 03 14 d8 add \(%rax,%r11,8\),%edx +[ ]*[a-f0-9]+: 42 03 14 e0 add \(%rax,%r12,8\),%edx +[ ]*[a-f0-9]+: 42 03 14 e8 add \(%rax,%r13,8\),%edx +[ ]*[a-f0-9]+: 42 03 14 f0 add \(%rax,%r14,8\),%edx +[ ]*[a-f0-9]+: 42 03 14 f8 add \(%rax,%r15,8\),%edx +[ ]*[a-f0-9]+: 83 c1 11 add \$0x11,%ecx +[ ]*[a-f0-9]+: 83 00 11 addl \$0x11,\(%rax\) +[ ]*[a-f0-9]+: 48 83 00 11 addq \$0x11,\(%rax\) +[ ]*[a-f0-9]+: 41 83 00 11 addl \$0x11,\(%r8\) +[ ]*[a-f0-9]+: 83 04 81 11 addl \$0x11,\(%rcx,%rax,4\) +[ ]*[a-f0-9]+: 41 83 04 81 11 addl \$0x11,\(%r9,%rax,4\) +[ ]*[a-f0-9]+: 42 83 04 81 11 addl \$0x11,\(%rcx,%r8,4\) +[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 22222342 +[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222234a +[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 22222354 +[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222235f +[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 addl \$0x33,0x22222222\(,%rax,8\) +[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\) +[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\) +[ ]*[a-f0-9]+: 41 83 04 e8 33 addl \$0x33,\(%r8,%rbp,8\) +[ ]*[a-f0-9]+: 83 04 25 22 22 22 22 33 addl \$0x33,0x22222222 +[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al +[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax +[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211 +[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211 +[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax +[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211 +[ ]*[a-f0-9]+: 48 99 cqto +[ ]*[a-f0-9]+: 48 98 cltq +[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax +[ ]*[a-f0-9]+: 48 0f bf c0 movswq %ax,%rax +[ ]*[a-f0-9]+: 48 0f be c0 movsbq %al,%rax + +0+1a7 : +[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al +[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax +[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax +[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax +[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax +[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax +[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax +[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1d5 +[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al +[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax +[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax +[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax +[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax +[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax +[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax +[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 203 + +0+203 : +[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al +[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax +[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax +[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax +[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211 +[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 movabs %ax,0x8877665544332211 +[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211 +[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211 +[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al +[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax +[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax +[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax +[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211 +[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 movabs %ax,0x8877665544332211 +[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211 +[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211 +[ ]*[a-f0-9]+: 8a 04 25 11 22 33 ff mov 0xffffffffff332211,%al +[ ]*[a-f0-9]+: 66 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%ax +[ ]*[a-f0-9]+: 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%eax +[ ]*[a-f0-9]+: 48 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%rax +[ ]*[a-f0-9]+: 88 04 25 11 22 33 ff mov %al,0xffffffffff332211 +[ ]*[a-f0-9]+: 66 89 04 25 11 22 33 ff mov %ax,0xffffffffff332211 +[ ]*[a-f0-9]+: 89 04 25 11 22 33 ff mov %eax,0xffffffffff332211 +[ ]*[a-f0-9]+: 48 89 04 25 11 22 33 ff mov %rax,0xffffffffff332211 +[ ]*[a-f0-9]+: 8a 04 25 11 22 33 ff mov 0xffffffffff332211,%al +[ ]*[a-f0-9]+: 66 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%ax +[ ]*[a-f0-9]+: 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%eax +[ ]*[a-f0-9]+: 48 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%rax +[ ]*[a-f0-9]+: 88 04 25 11 22 33 ff mov %al,0xffffffffff332211 +[ ]*[a-f0-9]+: 66 89 04 25 11 22 33 ff mov %ax,0xffffffffff332211 +[ ]*[a-f0-9]+: 89 04 25 11 22 33 ff mov %eax,0xffffffffff332211 +[ ]*[a-f0-9]+: 48 89 04 25 11 22 33 ff mov %rax,0xffffffffff332211 +[ ]*[a-f0-9]+: 48 0f c7 08 cmpxchg16b \(%rax\) +[ ]*[a-f0-9]+: 48 0f c7 08 cmpxchg16b \(%rax\) +[ ]*[a-f0-9]+: 66 0f be f0 movsbw %al,%si +[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi +[ ]*[a-f0-9]+: 48 0f be f0 movsbq %al,%rsi +[ ]*[a-f0-9]+: 0f bf f0 movswl %ax,%esi +[ ]*[a-f0-9]+: 48 0f bf f0 movswq %ax,%rsi +[ ]*[a-f0-9]+: 48 63 f0 movslq %eax,%rsi +[ ]*[a-f0-9]+: 0f be 10 movsbl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f be 10 movsbq \(%rax\),%rdx +[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx +[ ]*[a-f0-9]+: 0f be 10 movsbl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f be 10 movsbq \(%rax\),%rdx +[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx +[ ]*[a-f0-9]+: 0f bf 10 movswl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f bf 10 movswq \(%rax\),%rdx +[ ]*[a-f0-9]+: 66 0f b6 f0 movzbw %al,%si +[ ]*[a-f0-9]+: 0f b6 f0 movzbl %al,%esi +[ ]*[a-f0-9]+: 48 0f b6 f0 movzbq %al,%rsi +[ ]*[a-f0-9]+: 0f b7 f0 movzwl %ax,%esi +[ ]*[a-f0-9]+: 48 0f b7 f0 movzwq %ax,%rsi +[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx +[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx +[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx +[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx +[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx +[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx +[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f b7 10 movzwq \(%rax\),%rdx +[ ]*[a-f0-9]+: 66 0f be f0 movsbw %al,%si +[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi +[ ]*[a-f0-9]+: 48 0f be f0 movsbq %al,%rsi +[ ]*[a-f0-9]+: 0f bf f0 movswl %ax,%esi +[ ]*[a-f0-9]+: 48 0f bf f0 movswq %ax,%rsi +[ ]*[a-f0-9]+: 48 63 f0 movslq %eax,%rsi +[ ]*[a-f0-9]+: 0f be 10 movsbl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f be 10 movsbq \(%rax\),%rdx +[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx +[ ]*[a-f0-9]+: 0f bf 10 movswl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f bf 10 movswq \(%rax\),%rdx +[ ]*[a-f0-9]+: 66 0f b6 f0 movzbw %al,%si +[ ]*[a-f0-9]+: 0f b6 f0 movzbl %al,%esi +[ ]*[a-f0-9]+: 48 0f b6 f0 movzbq %al,%rsi +[ ]*[a-f0-9]+: 0f b7 f0 movzwl %ax,%esi +[ ]*[a-f0-9]+: 48 0f b7 f0 movzwq %ax,%rsi +[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx +[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx +[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f b7 10 movzwq \(%rax\),%rdx +[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%rsp\),%xmm1 +[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%rsp\),%xmm1 +[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%rsp\) +[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%rsp\) +[ ]*[a-f0-9]+: df e0 fnstsw %ax +[ ]*[a-f0-9]+: df e0 fnstsw %ax +[ ]*[a-f0-9]+: 9b df e0 fstsw %ax +[ ]*[a-f0-9]+: 9b df e0 fstsw %ax +[ ]*[a-f0-9]+: df e0 fnstsw %ax +[ ]*[a-f0-9]+: df e0 fnstsw %ax +[ ]*[a-f0-9]+: 9b df e0 fstsw %ax +[ ]*[a-f0-9]+: 9b df e0 fstsw %ax +[ ]*[a-f0-9]+: 66 0f be 00 movsbw \(%rax\),%ax +[ ]*[a-f0-9]+: 0f be 00 movsbl \(%rax\),%eax +[ ]*[a-f0-9]+: 48 0f be 00 movsbq \(%rax\),%rax +[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx +[ ]*[a-f0-9]+: 0f be 10 movsbl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f be 10 movsbq \(%rax\),%rdx +[ ]*[a-f0-9]+: 0f bf 10 movswl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f bf 10 movswq \(%rax\),%rdx +[ ]*[a-f0-9]+: 48 63 10 movslq \(%rax\),%rdx +[ ]*[a-f0-9]+: 48 63 00 movslq \(%rax\),%rax +[ ]*[a-f0-9]+: 66 0f b6 00 movzbw \(%rax\),%ax +[ ]*[a-f0-9]+: 0f b6 00 movzbl \(%rax\),%eax +[ ]*[a-f0-9]+: 48 0f b6 00 movzbq \(%rax\),%rax +[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx +[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx +[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%rax\),%edx +[ ]*[a-f0-9]+: 48 0f b7 10 movzwq \(%rax\),%rdx +[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\) +[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\) +[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\) +[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\) +[ ]*[a-f0-9]+: 66 0f be 00 movsbw \(%rax\),%ax +[ ]*[a-f0-9]+: 0f be 00 movsbl \(%rax\),%eax +[ ]*[a-f0-9]+: 0f bf 00 movswl \(%rax\),%eax +[ ]*[a-f0-9]+: 48 0f bf 00 movswq \(%rax\),%rax +[ ]*[a-f0-9]+: 48 63 00 movslq \(%rax\),%rax +[ ]*[a-f0-9]+: 48 63 00 movslq \(%rax\),%rax +[ ]*[a-f0-9]+: 66 0f b6 00 movzbw \(%rax\),%ax +[ ]*[a-f0-9]+: 0f b6 00 movzbl \(%rax\),%eax +[ ]*[a-f0-9]+: 0f b7 00 movzwl \(%rax\),%eax +[ ]*[a-f0-9]+: 48 0f b7 00 movzwq \(%rax\),%rax +[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\) +[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\) +#pass diff --git a/gas/testsuite/gas/i386/nops-1-bdver2.d b/gas/testsuite/gas/i386/nops-1-bdver2.d new file mode 100644 index 0000000..d33d6b7 --- /dev/null +++ b/gas/testsuite/gas/i386/nops-1-bdver2.d @@ -0,0 +1,162 @@ +#as: -mtune=bdver2 +#source: nops-1.s +#objdump: -drw +#name: i386 -mtune=bdver2 nops 1 + +.*: +file format .* + + +Disassembly of section .text: + +0+ : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\) +[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\) + +0+10 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\) +[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\) + +0+20 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\) +[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\) + +0+30 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\) +[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\) + +0+40 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\) +[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\) + +0+50 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\) + +0+60 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%eax,%eax,1\) + +0+70 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\) + +0+80 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\) + +0+90 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\) + +0+a0 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\) + +0+b0 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\) + +0+c0 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\) + +0+d0 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax +#pass diff --git a/gas/testsuite/gas/i386/x86-64-arch-2-lzcnt.d b/gas/testsuite/gas/i386/x86-64-arch-2-lzcnt.d new file mode 100644 index 0000000..34fd645 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-arch-2-lzcnt.d @@ -0,0 +1,42 @@ +#source: x86-64-arch-2.s +#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm +#objdump: -dw +#name: x86-64 arch 2 (lzcnt) + +.*: file format .* + +Disassembly of section .text: + +0+ <.text>: +[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx +[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\) +[ ]*[a-f0-9]+: 0f 05 syscall +[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3 +[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3 +[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3 +[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3 +[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3 +[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3 +[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx +[ ]*[a-f0-9]+: c5 fc 77 vzeroall +[ ]*[a-f0-9]+: 0f 01 c4 vmxoff +[ ]*[a-f0-9]+: 0f 37 getsec +[ ]*[a-f0-9]+: 0f 01 d0 xgetbv +[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\) +[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0 +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0 +[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2 +[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx +[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx +[ ]*[a-f0-9]+: 0f 01 f9 rdtscp +[ ]*[a-f0-9]+: 0f 0f dc b7 pmulhrw %mm4,%mm3 +[ ]*[a-f0-9]+: 0f 0f dc bb pswapd %mm4,%mm3 +[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1 +[ ]*[a-f0-9]+: 0f 01 da vmload +[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx +[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng +[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx +[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx +#pass diff --git a/gas/testsuite/gas/i386/x86-64-arch-2.s b/gas/testsuite/gas/i386/x86-64-arch-2.s index 5da17f6..8da9b0b 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-2.s +++ b/gas/testsuite/gas/i386/x86-64-arch-2.s @@ -54,7 +54,7 @@ pswapd %mm4,%mm3 insertq %xmm2,%xmm1 # SVME vmload -# ABM +# ABM/LZCNT lzcnt %ecx,%ebx # PadLock xstorerng diff --git a/gas/testsuite/gas/i386/x86-64-avx-gather-intel.d b/gas/testsuite/gas/i386/x86-64-avx-gather-intel.d new file mode 100644 index 0000000..936338c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx-gather-intel.d @@ -0,0 +1,204 @@ +#as: +#objdump: -dwMintel +#name: x86-64 AVX GATHER insns (Intel disassembly) +#source: x86-64-avx-gather.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd ymm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd ymm1,QWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 02 99 92 5c 75 00 vgatherdpd xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 99 93 5c 75 00 vgatherqpd xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 9d 92 5c 75 00 vgatherdpd ymm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 02 9d 93 5c 75 00 vgatherqpd ymm11,QWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm14\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm14\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*8\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps ymm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 02 19 92 5c 75 00 vgatherdps xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 19 93 5c 75 00 vgatherqps xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 1d 92 5c 75 00 vgatherdps ymm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 02 1d 93 5c 75 00 vgatherqps xmm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm14\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm14\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd ymm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 02 19 90 5c 75 00 vpgatherdd xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 19 91 5c 75 00 vpgatherqd xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 1d 90 5c 75 00 vpgatherdd ymm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 02 1d 91 5c 75 00 vpgatherqd xmm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm14\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm14\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq ymm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq ymm1,QWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 02 99 90 5c 75 00 vpgatherdq xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 99 91 5c 75 00 vpgatherqq xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 9d 90 5c 75 00 vpgatherdq ymm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 02 9d 91 5c 75 00 vpgatherqq ymm11,QWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm14\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm14\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*8\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd ymm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd ymm1,QWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 02 99 92 5c 75 00 vgatherdpd xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 99 93 5c 75 00 vgatherqpd xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 9d 92 5c 75 00 vgatherdpd ymm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 02 9d 93 5c 75 00 vgatherqpd ymm11,QWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm14\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm14\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*8\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps ymm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 02 19 92 5c 75 00 vgatherdps xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 19 93 5c 75 00 vgatherqps xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 1d 92 5c 75 00 vgatherdps ymm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 02 1d 93 5c 75 00 vgatherqps xmm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm14\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm14\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd ymm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 02 19 90 5c 75 00 vpgatherdd xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 19 91 5c 75 00 vpgatherqd xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 1d 90 5c 75 00 vpgatherdd ymm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 02 1d 91 5c 75 00 vpgatherqd xmm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*1\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm14\*1-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*1\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*1\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*8\+0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm14\*8-0x8\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*8\+0x0\],xmm5 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*8\+0x298\],xmm5 +[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2 +[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq ymm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq ymm1,QWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2 +[ ]*[a-f0-9]+: c4 02 99 90 5c 75 00 vpgatherdq xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 99 91 5c 75 00 vpgatherqq xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12 +[ ]*[a-f0-9]+: c4 02 9d 90 5c 75 00 vpgatherdq ymm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 02 9d 91 5c 75 00 vpgatherqq ymm11,QWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*1\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm14\*1-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*1\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*1\+0x298\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*8\+0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm14\*8-0x8\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*8\+0x0\],ymm5 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*8\+0x298\],ymm5 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx-gather.d b/gas/testsuite/gas/i386/x86-64-avx-gather.d new file mode 100644 index 0000000..2298275 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx-gather.d @@ -0,0 +1,203 @@ +#as: +#objdump: -dw +#name: x86-64 AVX GATHER insns + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd %ymm2,0x0\(%rbp,%xmm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 02 99 92 5c 75 00 vgatherdpd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 99 93 5c 75 00 vgatherqpd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 9d 92 5c 75 00 vgatherdpd %ymm12,0x0\(%r13,%xmm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 02 9d 93 5c 75 00 vgatherqpd %ymm12,0x0\(%r13,%ymm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps %xmm2,0x0\(%rbp,%ymm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 02 19 92 5c 75 00 vgatherdps %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 19 93 5c 75 00 vgatherqps %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 1d 92 5c 75 00 vgatherdps %ymm12,0x0\(%r13,%ymm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 02 1d 93 5c 75 00 vgatherqps %xmm12,0x0\(%r13,%ymm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%rbp,%ymm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 02 19 90 5c 75 00 vpgatherdd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 19 91 5c 75 00 vpgatherqd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 1d 90 5c 75 00 vpgatherdd %ymm12,0x0\(%r13,%ymm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 02 1d 91 5c 75 00 vpgatherqd %xmm12,0x0\(%r13,%ymm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq %ymm2,0x0\(%rbp,%xmm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 02 99 90 5c 75 00 vpgatherdq %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 99 91 5c 75 00 vpgatherqq %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 9d 90 5c 75 00 vpgatherdq %ymm12,0x0\(%r13,%xmm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 02 9d 91 5c 75 00 vpgatherqq %ymm12,0x0\(%r13,%ymm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd %ymm2,0x0\(%rbp,%xmm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 02 99 92 5c 75 00 vgatherdpd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 99 93 5c 75 00 vgatherqpd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 9d 92 5c 75 00 vgatherdpd %ymm12,0x0\(%r13,%xmm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 02 9d 93 5c 75 00 vgatherqpd %ymm12,0x0\(%r13,%ymm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps %xmm2,0x0\(%rbp,%ymm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 02 19 92 5c 75 00 vgatherdps %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 19 93 5c 75 00 vgatherqps %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 1d 92 5c 75 00 vgatherdps %ymm12,0x0\(%r13,%ymm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 02 1d 93 5c 75 00 vgatherqps %xmm12,0x0\(%r13,%ymm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 35 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%rbp,%ymm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 02 19 90 5c 75 00 vpgatherdd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 19 91 5c 75 00 vpgatherqd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 1d 90 5c 75 00 vpgatherdd %ymm12,0x0\(%r13,%ymm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 02 1d 91 5c 75 00 vpgatherqd %xmm12,0x0\(%r13,%ymm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,1\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 35 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm14,1\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm14,8\),%xmm6 +[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1 +[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq %ymm2,0x0\(%rbp,%xmm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1 +[ ]*[a-f0-9]+: c4 02 99 90 5c 75 00 vpgatherdq %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 99 91 5c 75 00 vpgatherqq %xmm12,0x0\(%r13,%xmm14,2\),%xmm11 +[ ]*[a-f0-9]+: c4 02 9d 90 5c 75 00 vpgatherdq %ymm12,0x0\(%r13,%xmm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 02 9d 91 5c 75 00 vpgatherqq %ymm12,0x0\(%r13,%ymm14,2\),%ymm11 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,1\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm14,1\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm14,8\),%ymm6 +[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm14,8\),%ymm6 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx-gather.s b/gas/testsuite/gas/i386/x86-64-avx-gather.s new file mode 100644 index 0000000..b4f8a29 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx-gather.s @@ -0,0 +1,213 @@ +# Check 64bit AVX gather instructions + + .text +_start: + vgatherdpd %xmm2, (%rbp, %xmm7, 2),%xmm1 + vgatherqpd %xmm2, (%rbp, %xmm7, 2),%xmm1 + vgatherdpd %ymm2, (%rbp, %xmm7, 2),%ymm1 + vgatherqpd %ymm2, (%rbp, %ymm7, 2),%ymm1 + + vgatherdpd %xmm12, (%r13, %xmm14, 2),%xmm11 + vgatherqpd %xmm12, (%r13, %xmm14, 2),%xmm11 + vgatherdpd %ymm12, (%r13, %xmm14, 2),%ymm11 + vgatherqpd %ymm12, (%r13, %ymm14, 2),%ymm11 + + vgatherdpd %ymm5,0x8(,%xmm4,1),%ymm6 + vgatherdpd %ymm5,-0x8(,%xmm4,1),%ymm6 + vgatherdpd %ymm5,(,%xmm4,1),%ymm6 + vgatherdpd %ymm5,0x298(,%xmm4,1),%ymm6 + vgatherdpd %ymm5,0x8(,%xmm4,8),%ymm6 + vgatherdpd %ymm5,-0x8(,%xmm4,8),%ymm6 + vgatherdpd %ymm5,(,%xmm4,8),%ymm6 + vgatherdpd %ymm5,0x298(,%xmm4,8),%ymm6 + + vgatherdpd %ymm5,0x8(,%xmm14,1),%ymm6 + vgatherdpd %ymm5,-0x8(,%xmm14,1),%ymm6 + vgatherdpd %ymm5,(,%xmm14,1),%ymm6 + vgatherdpd %ymm5,0x298(,%xmm14,1),%ymm6 + vgatherdpd %ymm5,0x8(,%xmm14,8),%ymm6 + vgatherdpd %ymm5,-0x8(,%xmm14,8),%ymm6 + vgatherdpd %ymm5,(,%xmm14,8),%ymm6 + vgatherdpd %ymm5,0x298(,%xmm14,8),%ymm6 + + vgatherdps %xmm2, (%rbp, %xmm7, 2),%xmm1 + vgatherqps %xmm2, (%rbp, %xmm7, 2),%xmm1 + vgatherdps %ymm2, (%rbp, %ymm7, 2),%ymm1 + vgatherqps %xmm2, (%rbp, %ymm7, 2),%xmm1 + + vgatherdps %xmm12, (%r13, %xmm14, 2),%xmm11 + vgatherqps %xmm12, (%r13, %xmm14, 2),%xmm11 + vgatherdps %ymm12, (%r13, %ymm14, 2),%ymm11 + vgatherqps %xmm12, (%r13, %ymm14, 2),%xmm11 + + vgatherdps %xmm5,0x8(,%xmm4,1),%xmm6 + vgatherdps %xmm5,-0x8(,%xmm4,1),%xmm6 + vgatherdps %xmm5,(,%xmm4,1),%xmm6 + vgatherdps %xmm5,0x298(,%xmm4,1),%xmm6 + vgatherdps %xmm5,0x8(,%xmm4,8),%xmm6 + vgatherdps %xmm5,-0x8(,%xmm4,8),%xmm6 + vgatherdps %xmm5,(,%xmm4,8),%xmm6 + vgatherdps %xmm5,0x298(,%xmm4,8),%xmm6 + + vgatherdps %xmm5,0x8(,%xmm14,1),%xmm6 + vgatherdps %xmm5,-0x8(,%xmm14,1),%xmm6 + vgatherdps %xmm5,(,%xmm14,1),%xmm6 + vgatherdps %xmm5,0x298(,%xmm14,1),%xmm6 + vgatherdps %xmm5,0x8(,%xmm14,8),%xmm6 + vgatherdps %xmm5,-0x8(,%xmm14,8),%xmm6 + vgatherdps %xmm5,(,%xmm14,8),%xmm6 + vgatherdps %xmm5,0x298(,%xmm14,8),%xmm6 + + vpgatherdd %xmm2, (%rbp, %xmm7, 2),%xmm1 + vpgatherqd %xmm2, (%rbp, %xmm7, 2),%xmm1 + vpgatherdd %ymm2, (%rbp, %ymm7, 2),%ymm1 + vpgatherqd %xmm2, (%rbp, %ymm7, 2),%xmm1 + + vpgatherdd %xmm12, (%r13, %xmm14, 2),%xmm11 + vpgatherqd %xmm12, (%r13, %xmm14, 2),%xmm11 + vpgatherdd %ymm12, (%r13, %ymm14, 2),%ymm11 + vpgatherqd %xmm12, (%r13, %ymm14, 2),%xmm11 + + vpgatherdd %xmm5,0x8(,%xmm4,1),%xmm6 + vpgatherdd %xmm5,-0x8(,%xmm4,1),%xmm6 + vpgatherdd %xmm5,(,%xmm4,1),%xmm6 + vpgatherdd %xmm5,0x298(,%xmm4,1),%xmm6 + vpgatherdd %xmm5,0x8(,%xmm4,8),%xmm6 + vpgatherdd %xmm5,-0x8(,%xmm4,8),%xmm6 + vpgatherdd %xmm5,(,%xmm4,8),%xmm6 + vpgatherdd %xmm5,0x298(,%xmm4,8),%xmm6 + + vpgatherdd %xmm5,0x8(,%xmm14,1),%xmm6 + vpgatherdd %xmm5,-0x8(,%xmm14,1),%xmm6 + vpgatherdd %xmm5,(,%xmm14,1),%xmm6 + vpgatherdd %xmm5,0x298(,%xmm14,1),%xmm6 + vpgatherdd %xmm5,0x8(,%xmm14,8),%xmm6 + vpgatherdd %xmm5,-0x8(,%xmm14,8),%xmm6 + vpgatherdd %xmm5,(,%xmm14,8),%xmm6 + vpgatherdd %xmm5,0x298(,%xmm14,8),%xmm6 + + vpgatherdq %xmm2, (%rbp, %xmm7, 2),%xmm1 + vpgatherqq %xmm2, (%rbp, %xmm7, 2),%xmm1 + vpgatherdq %ymm2, (%rbp, %xmm7, 2),%ymm1 + vpgatherqq %ymm2, (%rbp, %ymm7, 2),%ymm1 + + vpgatherdq %xmm12, (%r13, %xmm14, 2),%xmm11 + vpgatherqq %xmm12, (%r13, %xmm14, 2),%xmm11 + vpgatherdq %ymm12, (%r13, %xmm14, 2),%ymm11 + vpgatherqq %ymm12, (%r13, %ymm14, 2),%ymm11 + + vpgatherdq %ymm5,0x8(,%xmm4,1),%ymm6 + vpgatherdq %ymm5,-0x8(,%xmm4,1),%ymm6 + vpgatherdq %ymm5,(,%xmm4,1),%ymm6 + vpgatherdq %ymm5,0x298(,%xmm4,1),%ymm6 + vpgatherdq %ymm5,0x8(,%xmm4,8),%ymm6 + vpgatherdq %ymm5,-0x8(,%xmm4,8),%ymm6 + vpgatherdq %ymm5,(,%xmm4,8),%ymm6 + vpgatherdq %ymm5,0x298(,%xmm4,8),%ymm6 + + vpgatherdq %ymm5,0x8(,%xmm14,1),%ymm6 + vpgatherdq %ymm5,-0x8(,%xmm14,1),%ymm6 + vpgatherdq %ymm5,(,%xmm14,1),%ymm6 + vpgatherdq %ymm5,0x298(,%xmm14,1),%ymm6 + vpgatherdq %ymm5,0x8(,%xmm14,8),%ymm6 + vpgatherdq %ymm5,-0x8(,%xmm14,8),%ymm6 + vpgatherdq %ymm5,(,%xmm14,8),%ymm6 + vpgatherdq %ymm5,0x298(,%xmm14,8),%ymm6 + + .intel_syntax noprefix +vgatherdpd xmm1,QWORD PTR [rbp+xmm7*2+0x0],xmm2 +vgatherqpd xmm1,QWORD PTR [rbp+xmm7*2+0x0],xmm2 +vgatherdpd ymm1,QWORD PTR [rbp+xmm7*2+0x0],ymm2 +vgatherqpd ymm1,QWORD PTR [rbp+ymm7*2+0x0],ymm2 +vgatherdpd xmm11,QWORD PTR [r13+xmm14*2+0x0],xmm12 +vgatherqpd xmm11,QWORD PTR [r13+xmm14*2+0x0],xmm12 +vgatherdpd ymm11,QWORD PTR [r13+xmm14*2+0x0],ymm12 +vgatherqpd ymm11,QWORD PTR [r13+ymm14*2+0x0],ymm12 +vgatherdpd ymm6,QWORD PTR [xmm4*1+0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*1-0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*1+0x0],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*1+0x298],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*8+0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*8-0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*8+0x0],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm4*8+0x298],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm14*1+0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm14*1-0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm14*1+0x0],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm14*1+0x298],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm14*8+0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm14*8-0x8],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm14*8+0x0],ymm5 +vgatherdpd ymm6,QWORD PTR [xmm14*8+0x298],ymm5 +vgatherdps xmm1,DWORD PTR [rbp+xmm7*2+0x0],xmm2 +vgatherqps xmm1,DWORD PTR [rbp+xmm7*2+0x0],xmm2 +vgatherdps ymm1,DWORD PTR [rbp+ymm7*2+0x0],ymm2 +vgatherqps xmm1,DWORD PTR [rbp+ymm7*2+0x0],xmm2 +vgatherdps xmm11,DWORD PTR [r13+xmm14*2+0x0],xmm12 +vgatherqps xmm11,DWORD PTR [r13+xmm14*2+0x0],xmm12 +vgatherdps ymm11,DWORD PTR [r13+ymm14*2+0x0],ymm12 +vgatherqps xmm11,DWORD PTR [r13+ymm14*2+0x0],xmm12 +vgatherdps xmm6,DWORD PTR [xmm4*1+0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*1-0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*1+0x0],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*1+0x298],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*8+0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*8-0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*8+0x0],xmm5 +vgatherdps xmm6,DWORD PTR [xmm4*8+0x298],xmm5 +vgatherdps xmm6,DWORD PTR [xmm14*1+0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm14*1-0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm14*1+0x0],xmm5 +vgatherdps xmm6,DWORD PTR [xmm14*1+0x298],xmm5 +vgatherdps xmm6,DWORD PTR [xmm14*8+0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm14*8-0x8],xmm5 +vgatherdps xmm6,DWORD PTR [xmm14*8+0x0],xmm5 +vgatherdps xmm6,DWORD PTR [xmm14*8+0x298],xmm5 +vpgatherdd xmm1,DWORD PTR [rbp+xmm7*2+0x0],xmm2 +vpgatherqd xmm1,DWORD PTR [rbp+xmm7*2+0x0],xmm2 +vpgatherdd ymm1,DWORD PTR [rbp+ymm7*2+0x0],ymm2 +vpgatherqd xmm1,DWORD PTR [rbp+ymm7*2+0x0],xmm2 +vpgatherdd xmm11,DWORD PTR [r13+xmm14*2+0x0],xmm12 +vpgatherqd xmm11,DWORD PTR [r13+xmm14*2+0x0],xmm12 +vpgatherdd ymm11,DWORD PTR [r13+ymm14*2+0x0],ymm12 +vpgatherqd xmm11,DWORD PTR [r13+ymm14*2+0x0],xmm12 +vpgatherdd xmm6,DWORD PTR [xmm4*1+0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*1-0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*1+0x0],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*1+0x298],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*8+0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*8-0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*8+0x0],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm4*8+0x298],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm14*1+0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm14*1-0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm14*1+0x0],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm14*1+0x298],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm14*8+0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm14*8-0x8],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm14*8+0x0],xmm5 +vpgatherdd xmm6,DWORD PTR [xmm14*8+0x298],xmm5 +vpgatherdq xmm1,QWORD PTR [rbp+xmm7*2+0x0],xmm2 +vpgatherqq xmm1,QWORD PTR [rbp+xmm7*2+0x0],xmm2 +vpgatherdq ymm1,QWORD PTR [rbp+xmm7*2+0x0],ymm2 +vpgatherqq ymm1,QWORD PTR [rbp+ymm7*2+0x0],ymm2 +vpgatherdq xmm11,QWORD PTR [r13+xmm14*2+0x0],xmm12 +vpgatherqq xmm11,QWORD PTR [r13+xmm14*2+0x0],xmm12 +vpgatherdq ymm11,QWORD PTR [r13+xmm14*2+0x0],ymm12 +vpgatherqq ymm11,QWORD PTR [r13+ymm14*2+0x0],ymm12 +vpgatherdq ymm6,QWORD PTR [xmm4*1+0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*1-0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*1+0x0],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*1+0x298],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*8+0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*8-0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*8+0x0],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm4*8+0x298],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm14*1+0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm14*1-0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm14*1+0x0],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm14*1+0x298],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm14*8+0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm14*8-0x8],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm14*8+0x0],ymm5 +vpgatherdq ymm6,QWORD PTR [xmm14*8+0x298],ymm5 diff --git a/gas/testsuite/gas/i386/x86-64-avx-intel.d b/gas/testsuite/gas/i386/x86-64-avx-intel.d index 75f7df8..1d2b2a6 100644 --- a/gas/testsuite/gas/i386/x86-64-avx-intel.d +++ b/gas/testsuite/gas/i386/x86-64-avx-intel.d @@ -1065,6 +1065,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd DWORD PTR \[rcx\],xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\] [ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss xmm6,xmm4,ecx @@ -1094,8 +1096,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c5 f9 c5 cc 07 vpextrw ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4 @@ -3083,6 +3083,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\] [ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss xmm6,xmm4,ecx @@ -3124,9 +3127,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb ecx,xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7 [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4 diff --git a/gas/testsuite/gas/i386/x86-64-avx.d b/gas/testsuite/gas/i386/x86-64-avx.d index 389b2a4..66f9d1d 100644 --- a/gas/testsuite/gas/i386/x86-64-avx.d +++ b/gas/testsuite/gas/i386/x86-64-avx.d @@ -1064,6 +1064,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd \$0x7,%xmm4,\(%rcx\) [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\) +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss %ecx,%xmm4,%xmm6 @@ -1093,8 +1095,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c5 f9 c5 cc 07 vpextrw \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\) -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx @@ -3082,6 +3082,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\) [ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\) +[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss %ecx,%xmm4,%xmm6 @@ -3123,9 +3126,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb \$0x7,%xmm4,%ecx [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\) [ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\) -[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6 -[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6 [ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx diff --git a/gas/testsuite/gas/i386/x86-64-avx.s b/gas/testsuite/gas/i386/x86-64-avx.s index a8e0447..e3a87b9 100644 --- a/gas/testsuite/gas/i386/x86-64-avx.s +++ b/gas/testsuite/gas/i386/x86-64-avx.s @@ -1166,6 +1166,10 @@ _start: vextractps $7,%xmm4,%ecx vextractps $7,%xmm4,(%rcx) +# Tests for op imm8, regl/mem32, xmm, xmm + vpinsrd $7,%ecx,%xmm4,%xmm6 + vpinsrd $7,(%rcx),%xmm4,%xmm6 + # Tests for op regl/mem32, xmm, xmm vcvtsi2sd %ecx,%xmm4,%xmm6 vcvtsi2sd (%rcx),%xmm4,%xmm6 @@ -1217,10 +1221,6 @@ _start: vpextrb $7,%xmm4,%rcx vpextrb $7,%xmm4,(%rcx) -# Tests for op imm8, regl/mem8, xmm, xmm - vpinsrb $7,%ecx,%xmm4,%xmm6 - vpinsrb $7,(%rcx),%xmm4,%xmm6 - # Tests for op xmm, xmm vmaskmovdqu %xmm4,%xmm6 vmovq %xmm4,%xmm6 @@ -3333,6 +3333,11 @@ _start: vextractps DWORD PTR [rcx],xmm4,7 vextractps [rcx],xmm4,7 +# Tests for op imm8, regl/mem32, xmm, xmm + vpinsrd xmm6,xmm4,ecx,7 + vpinsrd xmm6,xmm4,DWORD PTR [rcx],7 + vpinsrd xmm6,xmm4,[rcx],7 + # Tests for op regl/mem32, xmm, xmm vcvtsi2sd xmm6,xmm4,ecx vcvtsi2sd xmm6,xmm4,DWORD PTR [rcx] @@ -3396,11 +3401,6 @@ _start: vpextrb BYTE PTR [rcx],xmm4,7 vpextrb [rcx],xmm4,7 -# Tests for op imm8, regl/mem8, xmm, xmm - vpinsrb xmm6,xmm4,ecx,7 - vpinsrb xmm6,xmm4,BYTE PTR [rcx],7 - vpinsrb xmm6,xmm4,[rcx],7 - # Tests for op xmm, xmm vmaskmovdqu xmm6,xmm4 vmovq xmm6,xmm4 diff --git a/gas/testsuite/gas/i386/x86-64-avx2-intel.d b/gas/testsuite/gas/i386/x86-64-avx2-intel.d new file mode 100644 index 0000000..d35f894 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx2-intel.d @@ -0,0 +1,182 @@ +#objdump: -dwMintel +#name: x86-64 AVX2 insns (Intel disassembly) +#source: x86-64-avx2.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd ymm6,ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd YMMWORD PTR \[rcx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq ymm6,ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq YMMWORD PTR \[rcx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 16 d4 vpermps ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 47 d4 vpsllvd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 cd 47 d4 vpsllvq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 46 d4 vpsravd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 45 d4 vpsrlvd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 cd 45 d4 vpsrlvq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 19 f4 vbroadcastsd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 18 f4 vbroadcastss ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 ymm6,ymm4,xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 ymm6,ymm4,XMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 49 47 d4 vpsllvd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 c9 47 d4 vpsllvq xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 49 46 d4 vpsravd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 49 45 d4 vpsrlvd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 c9 45 d4 vpsrlvq xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd xmm6,xmm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq xmm6,xmm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e3 7d 39 e6 07 vextracti128 xmm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 XMMWORD PTR \[rcx\],ymm4,0x7 +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd XMMWORD PTR \[rcx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq XMMWORD PTR \[rcx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e3 49 02 d4 07 vpblendd xmm2,xmm6,xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd xmm2,xmm6,XMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e2 79 59 f4 vpbroadcastq xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq xmm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 59 f4 vpbroadcastq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 58 e4 vpbroadcastd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd ymm4,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 58 f4 vpbroadcastd xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd xmm4,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 79 f4 vpbroadcastw xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw xmm4,WORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 79 f4 vpbroadcastw ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw ymm4,WORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 78 f4 vpbroadcastb xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb xmm4,BYTE PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 78 f4 vpbroadcastb ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb ymm4,BYTE PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 18 f4 vbroadcastss xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd ymm6,ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd YMMWORD PTR \[rcx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd ymm6,ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd YMMWORD PTR \[rcx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq ymm6,ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq YMMWORD PTR \[rcx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq ymm6,ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq YMMWORD PTR \[rcx\],ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 16 d4 vpermps ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 47 d4 vpsllvd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 cd 47 d4 vpsllvq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 46 d4 vpsravd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 45 d4 vpsrlvd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 cd 45 d4 vpsrlvq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 19 f4 vbroadcastsd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 18 f4 vbroadcastss ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 ymm6,ymm4,xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 ymm6,ymm4,XMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 ymm6,ymm4,XMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 49 47 d4 vpsllvd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 c9 47 d4 vpsllvq xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 49 46 d4 vpsravd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 49 45 d4 vpsrlvd xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 c9 45 d4 vpsrlvq xmm2,xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq xmm7,xmm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd xmm6,xmm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd xmm6,xmm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq xmm6,xmm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq xmm6,xmm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e3 7d 39 e6 07 vextracti128 xmm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 XMMWORD PTR \[rcx\],ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 XMMWORD PTR \[rcx\],ymm4,0x7 +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd XMMWORD PTR \[rcx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd XMMWORD PTR \[rcx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq XMMWORD PTR \[rcx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq XMMWORD PTR \[rcx\],xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e3 49 02 d4 07 vpblendd xmm2,xmm6,xmm4,0x7 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd xmm2,xmm6,XMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd xmm2,xmm6,XMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e2 79 59 f4 vpbroadcastq xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq xmm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq xmm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 59 f4 vpbroadcastq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 58 e4 vpbroadcastd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd ymm4,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd ymm4,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 58 f4 vpbroadcastd xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd xmm4,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd xmm4,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 79 f4 vpbroadcastw xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw xmm4,WORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw xmm4,WORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 79 f4 vpbroadcastw ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw ymm4,WORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw ymm4,WORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 78 f4 vpbroadcastb xmm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb xmm4,BYTE PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb xmm4,BYTE PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 78 f4 vpbroadcastb ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb ymm4,BYTE PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb ymm4,BYTE PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 79 18 f4 vbroadcastss xmm6,xmm4 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx2.d b/gas/testsuite/gas/i386/x86-64-avx2.d new file mode 100644 index 0000000..7f2005f --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx2.d @@ -0,0 +1,181 @@ +#objdump: -dw +#name: x86-64 AVX2 insns + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd \(%rcx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd %ymm4,%ymm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq \(%rcx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq %ymm4,%ymm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 16 d4 vpermps %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 47 d4 vpsllvd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 47 d4 vpsllvq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 46 d4 vpsravd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 45 d4 vpsrlvd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 45 d4 vpsrlvq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 19 f4 vbroadcastsd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 18 f4 vbroadcastss %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 \$0x7,%xmm4,%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 \$0x7,\(%rcx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 49 47 d4 vpsllvd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 47 d4 vpsllvq %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 46 d4 vpsravd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 45 d4 vpsrlvd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 45 d4 vpsrlvq %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd \(%rcx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq \(%rcx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 7d 39 e6 07 vextracti128 \$0x7,%ymm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 \$0x7,%ymm4,\(%rcx\) +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd %xmm4,%xmm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq %xmm4,%xmm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e3 49 02 d4 07 vpblendd \$0x7,%xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd \$0x7,\(%rcx\),%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 79 59 f4 vpbroadcastq %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 59 f4 vpbroadcastq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 e4 vpbroadcastd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 58 f4 vpbroadcastd %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 79 f4 vpbroadcastw %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 79 f4 vpbroadcastw %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 78 f4 vpbroadcastb %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 78 f4 vpbroadcastb %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 18 f4 vbroadcastss %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd \(%rcx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd %ymm4,%ymm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd \(%rcx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd %ymm4,%ymm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq \(%rcx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq %ymm4,%ymm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq \(%rcx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq %ymm4,%ymm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 16 d4 vpermps %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 16 11 vpermps \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 47 d4 vpsllvd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 47 11 vpsllvd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 47 d4 vpsllvq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 47 11 vpsllvq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 46 d4 vpsravd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 46 11 vpsravd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 45 d4 vpsrlvd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 45 11 vpsrlvd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 45 d4 vpsrlvq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 cd 45 11 vpsrlvq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 2a 21 vmovntdqa \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 19 f4 vbroadcastsd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 18 f4 vbroadcastss %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 \$0x7,%xmm4,%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 \$0x7,\(%rcx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 \$0x7,\(%rcx\),%ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 5a 21 vbroadcasti128 \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 49 47 d4 vpsllvd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 47 39 vpsllvd \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 47 d4 vpsllvq %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 47 39 vpsllvq \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 46 d4 vpsravd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 46 39 vpsravd \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 45 d4 vpsrlvd %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 49 45 39 vpsrlvd \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 45 d4 vpsrlvq %xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 c9 45 39 vpsrlvq \(%rcx\),%xmm6,%xmm7 +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd \(%rcx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 59 8c 31 vpmaskmovd \(%rcx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq \(%rcx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 d9 8c 31 vpmaskmovq \(%rcx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 7d 39 e6 07 vextracti128 \$0x7,%ymm4,%xmm6 +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 \$0x7,%ymm4,\(%rcx\) +[ ]*[a-f0-9]+: c4 e3 7d 39 21 07 vextracti128 \$0x7,%ymm4,\(%rcx\) +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd %xmm4,%xmm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e2 49 8e 21 vpmaskmovd %xmm4,%xmm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq %xmm4,%xmm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e2 c9 8e 21 vpmaskmovq %xmm4,%xmm6,\(%rcx\) +[ ]*[a-f0-9]+: c4 e3 49 02 d4 07 vpblendd \$0x7,%xmm4,%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd \$0x7,\(%rcx\),%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e3 49 02 11 07 vpblendd \$0x7,\(%rcx\),%xmm6,%xmm2 +[ ]*[a-f0-9]+: c4 e2 79 59 f4 vpbroadcastq %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 59 21 vpbroadcastq \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 59 f4 vpbroadcastq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 59 21 vpbroadcastq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 e4 vpbroadcastd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 58 21 vpbroadcastd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 58 f4 vpbroadcastd %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 58 21 vpbroadcastd \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 79 f4 vpbroadcastw %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 79 21 vpbroadcastw \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 79 f4 vpbroadcastw %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 79 21 vpbroadcastw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 78 f4 vpbroadcastb %xmm4,%xmm6 +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 79 78 21 vpbroadcastb \(%rcx\),%xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 78 f4 vpbroadcastb %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 78 21 vpbroadcastb \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 79 18 f4 vbroadcastss %xmm4,%xmm6 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx2.s b/gas/testsuite/gas/i386/x86-64-avx2.s new file mode 100644 index 0000000..0a84482 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx2.s @@ -0,0 +1,268 @@ +# Check x86-64 AVX2 instructions + + .allow_index_reg + .text +_start: + +# Tests for op mem256, mask, ymm +# Tests for op ymm, mask, mem256 + vpmaskmovd (%rcx),%ymm4,%ymm6 + vpmaskmovd %ymm4,%ymm6,(%rcx) + vpmaskmovq (%rcx),%ymm4,%ymm6 + vpmaskmovq %ymm4,%ymm6,(%rcx) + +# Tests for op imm8, ymm/mem256, ymm + vpermpd $7,%ymm6,%ymm2 + vpermpd $7,(%rcx),%ymm6 + vpermq $7,%ymm6,%ymm2 + vpermq $7,(%rcx),%ymm6 + +# Tests for op ymm/mem256, ymm, ymm + vpermd %ymm4,%ymm6,%ymm2 + vpermd (%rcx),%ymm6,%ymm2 + vpermps %ymm4,%ymm6,%ymm2 + vpermps (%rcx),%ymm6,%ymm2 + vpsllvd %ymm4,%ymm6,%ymm2 + vpsllvd (%rcx),%ymm6,%ymm2 + vpsllvq %ymm4,%ymm6,%ymm2 + vpsllvq (%rcx),%ymm6,%ymm2 + vpsravd %ymm4,%ymm6,%ymm2 + vpsravd (%rcx),%ymm6,%ymm2 + vpsrlvd %ymm4,%ymm6,%ymm2 + vpsrlvd (%rcx),%ymm6,%ymm2 + vpsrlvq %ymm4,%ymm6,%ymm2 + vpsrlvq (%rcx),%ymm6,%ymm2 + +# Tests for op mem256, ymm + vmovntdqa (%rcx),%ymm4 + +# Tests for op ymm, xmm + vbroadcastsd %xmm4,%ymm6 + vbroadcastss %xmm4,%ymm6 + +# Tests for op imm8, ymm/mem256, ymm, ymm + vpblendd $7,%ymm4,%ymm6,%ymm2 + vpblendd $7,(%rcx),%ymm6,%ymm2 + vperm2i128 $7,%ymm4,%ymm6,%ymm2 + vperm2i128 $7,(%rcx),%ymm6,%ymm2 + +# Tests for op imm8, xmm/mem128, ymm, ymm + vinserti128 $7,%xmm4,%ymm4,%ymm6 + vinserti128 $7,(%rcx),%ymm4,%ymm6 + +# Tests for op mem128, ymm + vbroadcasti128 (%rcx),%ymm4 + +# Tests for op xmm/mem128, xmm, xmm + vpsllvd %xmm4,%xmm6,%xmm2 + vpsllvd (%rcx),%xmm6,%xmm7 + vpsllvq %xmm4,%xmm6,%xmm2 + vpsllvq (%rcx),%xmm6,%xmm7 + vpsravd %xmm4,%xmm6,%xmm2 + vpsravd (%rcx),%xmm6,%xmm7 + vpsrlvd %xmm4,%xmm6,%xmm2 + vpsrlvd (%rcx),%xmm6,%xmm7 + vpsrlvq %xmm4,%xmm6,%xmm2 + vpsrlvq (%rcx),%xmm6,%xmm7 + +# Tests for op mem128, xmm, xmm + vpmaskmovd (%rcx),%xmm4,%xmm6 + vpmaskmovq (%rcx),%xmm4,%xmm6 + +# Tests for op imm8, ymm, xmm128/mem + vextracti128 $7,%ymm4,%xmm6 + vextracti128 $7,%ymm4,(%rcx) + +# Tests for op xmm, xmm, mem128 + vpmaskmovd %xmm4,%xmm6,(%rcx) + vpmaskmovq %xmm4,%xmm6,(%rcx) + +# Tests for op imm8, xmm/mem128, xmm, xmm + vpblendd $7,%xmm4,%xmm6,%xmm2 + vpblendd $7,(%rcx),%xmm6,%xmm2 + +# Tests for op xmm/mem64, xmm + vpbroadcastq %xmm4,%xmm6 + vpbroadcastq (%rcx),%xmm4 + +# Tests for op xmm/mem64, ymm + vpbroadcastq %xmm4,%ymm6 + vpbroadcastq (%rcx),%ymm4 + +# Tests for op xmm/mem32, ymm + vpbroadcastd %xmm4,%ymm4 + vpbroadcastd (%rcx),%ymm4 + +# Tests for op xmm/mem32, xmm + vpbroadcastd %xmm4,%xmm6 + vpbroadcastd (%rcx),%xmm4 + +# Tests for op xmm/m16, xmm + vpbroadcastw %xmm4,%xmm6 + vpbroadcastw (%rcx),%xmm4 + +# Tests for op xmm/m16, ymm + vpbroadcastw %xmm4,%ymm6 + vpbroadcastw (%rcx),%ymm4 + +# Tests for op xmm/m8, xmm + vpbroadcastb %xmm4,%xmm6 + vpbroadcastb (%rcx),%xmm4 + +# Tests for op xmm/m8, ymm + vpbroadcastb %xmm4,%ymm6 + vpbroadcastb (%rcx),%ymm4 + +# Tests for op xmm, xmm + vbroadcastss %xmm4,%xmm6 + + .intel_syntax noprefix + +# Tests for op mem256, mask, ymm +# Tests for op ymm, mask, mem256 + vpmaskmovd ymm6,ymm4,YMMWORD PTR [rcx] + vpmaskmovd YMMWORD PTR [rcx],ymm6,ymm4 + vpmaskmovd ymm6,ymm4,[rcx] + vpmaskmovd [rcx],ymm6,ymm4 + vpmaskmovq ymm6,ymm4,YMMWORD PTR [rcx] + vpmaskmovq YMMWORD PTR [rcx],ymm6,ymm4 + vpmaskmovq ymm6,ymm4,[rcx] + vpmaskmovq [rcx],ymm6,ymm4 + +# Tests for op imm8, ymm/mem256, ymm + vpermpd ymm2,ymm6,7 + vpermpd ymm6,YMMWORD PTR [rcx],7 + vpermpd ymm6,[rcx],7 + vpermq ymm2,ymm6,7 + vpermq ymm6,YMMWORD PTR [rcx],7 + vpermq ymm6,[rcx],7 + +# Tests for op ymm/mem256, ymm, ymm + vpermd ymm2,ymm6,ymm4 + vpermd ymm2,ymm6,YMMWORD PTR [rcx] + vpermd ymm2,ymm6,[rcx] + vpermps ymm2,ymm6,ymm4 + vpermps ymm2,ymm6,YMMWORD PTR [rcx] + vpermps ymm2,ymm6,[rcx] + vpsllvd ymm2,ymm6,ymm4 + vpsllvd ymm2,ymm6,YMMWORD PTR [rcx] + vpsllvd ymm2,ymm6,[rcx] + vpsllvq ymm2,ymm6,ymm4 + vpsllvq ymm2,ymm6,YMMWORD PTR [rcx] + vpsllvq ymm2,ymm6,[rcx] + vpsravd ymm2,ymm6,ymm4 + vpsravd ymm2,ymm6,YMMWORD PTR [rcx] + vpsravd ymm2,ymm6,[rcx] + vpsrlvd ymm2,ymm6,ymm4 + vpsrlvd ymm2,ymm6,YMMWORD PTR [rcx] + vpsrlvd ymm2,ymm6,[rcx] + vpsrlvq ymm2,ymm6,ymm4 + vpsrlvq ymm2,ymm6,YMMWORD PTR [rcx] + vpsrlvq ymm2,ymm6,[rcx] + +# Tests for op mem256, ymm + vmovntdqa ymm4,YMMWORD PTR [rcx] + vmovntdqa ymm4,[rcx] + +# Tests for op ymm, xmm + vbroadcastsd ymm6,xmm4 + vbroadcastss ymm6,xmm4 + +# Tests for op imm8, ymm/mem256, ymm, ymm + vpblendd ymm2,ymm6,ymm4,7 + vpblendd ymm2,ymm6,YMMWORD PTR [rcx],7 + vpblendd ymm2,ymm6,[rcx],7 + vperm2i128 ymm2,ymm6,ymm4,7 + vperm2i128 ymm2,ymm6,YMMWORD PTR [rcx],7 + vperm2i128 ymm2,ymm6,[rcx],7 + +# Tests for op imm8, xmm/mem128, ymm, ymm + vinserti128 ymm6,ymm4,xmm4,7 + vinserti128 ymm6,ymm4,XMMWORD PTR [rcx],7 + vinserti128 ymm6,ymm4,[rcx],7 + +# Tests for op mem128, ymm + vbroadcasti128 ymm4,XMMWORD PTR [rcx] + vbroadcasti128 ymm4,[rcx] + +# Tests for op xmm/mem128, xmm, xmm + vpsllvd xmm2,xmm6,xmm4 + vpsllvd xmm7,xmm6,XMMWORD PTR [rcx] + vpsllvd xmm7,xmm6,[rcx] + vpsllvq xmm2,xmm6,xmm4 + vpsllvq xmm7,xmm6,XMMWORD PTR [rcx] + vpsllvq xmm7,xmm6,[rcx] + vpsravd xmm2,xmm6,xmm4 + vpsravd xmm7,xmm6,XMMWORD PTR [rcx] + vpsravd xmm7,xmm6,[rcx] + vpsrlvd xmm2,xmm6,xmm4 + vpsrlvd xmm7,xmm6,XMMWORD PTR [rcx] + vpsrlvd xmm7,xmm6,[rcx] + vpsrlvq xmm2,xmm6,xmm4 + vpsrlvq xmm7,xmm6,XMMWORD PTR [rcx] + vpsrlvq xmm7,xmm6,[rcx] + +# Tests for op mem128, xmm, xmm + vpmaskmovd xmm6,xmm4,XMMWORD PTR [rcx] + vpmaskmovd xmm6,xmm4,[rcx] + vpmaskmovq xmm6,xmm4,XMMWORD PTR [rcx] + vpmaskmovq xmm6,xmm4,[rcx] + +# Tests for op imm8, ymm, xmm128/mem + vextracti128 xmm6,ymm4,7 + vextracti128 XMMWORD PTR [rcx],ymm4,7 + vextracti128 [rcx],ymm4,7 + +# Tests for op xmm, xmm, mem128 + vpmaskmovd XMMWORD PTR [rcx],xmm6,xmm4 + vpmaskmovd [rcx],xmm6,xmm4 + vpmaskmovq XMMWORD PTR [rcx],xmm6,xmm4 + vpmaskmovq [rcx],xmm6,xmm4 + +# Tests for op imm8, xmm/mem128, xmm, xmm + vpblendd xmm2,xmm6,xmm4,7 + vpblendd xmm2,xmm6,XMMWORD PTR [rcx],7 + vpblendd xmm2,xmm6,[rcx],7 + +# Tests for op xmm/mem64, xmm + vpbroadcastq xmm6,xmm4 + vpbroadcastq xmm4,QWORD PTR [rcx] + vpbroadcastq xmm4,[rcx] + +# Tests for op xmm/mem64, ymm + vpbroadcastq ymm6,xmm4 + vpbroadcastq ymm4,QWORD PTR [rcx] + vpbroadcastq ymm4,[rcx] + +# Tests for op xmm/mem32, ymm + vpbroadcastd ymm4,xmm4 + vpbroadcastd ymm4,DWORD PTR [rcx] + vpbroadcastd ymm4,[rcx] + +# Tests for op xmm/mem32, xmm + vpbroadcastd xmm6,xmm4 + vpbroadcastd xmm4,DWORD PTR [rcx] + vpbroadcastd xmm4,[rcx] + +# Tests for op xmm/m16, xmm + vpbroadcastw xmm6,xmm4 + vpbroadcastw xmm4,WORD PTR [rcx] + vpbroadcastw xmm4,[rcx] + +# Tests for op xmm/m16, ymm + vpbroadcastw ymm6,xmm4 + vpbroadcastw ymm4,WORD PTR [rcx] + vpbroadcastw ymm4,[rcx] + +# Tests for op xmm/m8, xmm + vpbroadcastb xmm6,xmm4 + vpbroadcastb xmm4,BYTE PTR [rcx] + vpbroadcastb xmm4,[rcx] + +# Tests for op xmm/m8, ymm + vpbroadcastb ymm6,xmm4 + vpbroadcastb ymm4,BYTE PTR [rcx] + vpbroadcastb ymm4,[rcx] + +# Tests for op xmm, xmm + vbroadcastss xmm6,xmm4 diff --git a/gas/testsuite/gas/i386/x86-64-avx256int-intel.d b/gas/testsuite/gas/i386/x86-64-avx256int-intel.d new file mode 100644 index 0000000..5f7e0ec --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx256int-intel.d @@ -0,0 +1,555 @@ +#objdump: -dwMintel +#name: x86-64 256bit integer AVX insns (Intel disassembly) +#source: x86-64-avx256int.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb ecx,ymm4 +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb ecx,ymm4 +[ ]*[a-f0-9]+: c5 ed 72 f6 07 vpslld ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 fe 07 vpslldq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 f6 07 vpsllq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 f6 07 vpsllw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 72 e6 07 vpsrad ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 e6 07 vpsraw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 72 d6 07 vpsrld ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 de 07 vpsrldq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 d6 07 vpsrlq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 d6 07 vpsrlw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fd 70 d6 07 vpshufd ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c5 fe 70 d6 07 vpshufhw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c5 ff 70 d6 07 vpshuflw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c5 cd 6b d4 vpackssdw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 63 d4 vpacksswb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 2b d4 vpackusdw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 67 d4 vpackuswb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fc d4 vpaddb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fd d4 vpaddw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fe d4 vpaddd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d4 d4 vpaddq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ec d4 vpaddsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ed d4 vpaddsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd dc d4 vpaddusb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd dd d4 vpaddusw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd db d4 vpand ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd db 11 vpand ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd df d4 vpandn ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd df 11 vpandn ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e0 d4 vpavgb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e3 d4 vpavgw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 74 d4 vpcmpeqb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 75 d4 vpcmpeqw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 76 d4 vpcmpeqd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 29 d4 vpcmpeqq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 64 d4 vpcmpgtb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 65 d4 vpcmpgtw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 66 d4 vpcmpgtd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 37 d4 vpcmpgtq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 01 d4 vphaddw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 02 d4 vphaddd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 03 d4 vphaddsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 05 d4 vphsubw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 06 d4 vphsubd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 07 d4 vphsubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f5 d4 vpmaddwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 04 d4 vpmaddubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3c d4 vpmaxsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ee d4 vpmaxsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3d d4 vpmaxsd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd de d4 vpmaxub ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3e d4 vpmaxuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3f d4 vpmaxud ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 38 d4 vpminsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ea d4 vpminsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 39 d4 vpminsd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd da d4 vpminub ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd da 11 vpminub ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3a d4 vpminuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3b d4 vpminud ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e4 d4 vpmulhuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 0b d4 vpmulhrsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e5 d4 vpmulhw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d5 d4 vpmullw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 40 d4 vpmulld ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f4 d4 vpmuludq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 28 d4 vpmuldq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd eb d4 vpor ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd eb 11 vpor ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f6 d4 vpsadbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 00 d4 vpshufb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 08 d4 vpsignb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 09 d4 vpsignw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 0a d4 vpsignd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f8 d4 vpsubb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f9 d4 vpsubw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fa d4 vpsubd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fb d4 vpsubq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e8 d4 vpsubsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e9 d4 vpsubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d8 d4 vpsubusb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d9 d4 vpsubusw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 68 d4 vpunpckhbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 69 d4 vpunpckhwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 6a d4 vpunpckhdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 6d d4 vpunpckhqdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 60 d4 vpunpcklbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 61 d4 vpunpcklwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 62 d4 vpunpckldq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 6c d4 vpunpcklqdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ef d4 vpxor ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 1c f4 vpabsb ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 1d f4 vpabsw ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 1e f4 vpabsd ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e3 4d 42 d4 07 vmpsadbw ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0f d4 07 vpalignr ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0e d4 07 vpblendw ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 6d 4c fe 40 vpblendvb ymm7,ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4 +[ ]*[a-f0-9]+: c5 cd f1 d4 vpsllw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f2 d4 vpslld ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f3 d4 vpsllq ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e1 d4 vpsraw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e2 d4 vpsrad ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d1 d4 vpsrlw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d2 d4 vpsrld ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d3 d4 vpsrlq ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 20 e4 vpmovsxbw ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 23 e4 vpmovsxwd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 25 e4 vpmovsxdq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 30 e4 vpmovzxbw ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 33 e4 vpmovzxwd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 35 e4 vpmovzxdq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 21 f4 vpmovsxbd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 24 f4 vpmovsxwq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 31 f4 vpmovzxbd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 34 f4 vpmovzxwq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 22 e4 vpmovsxbq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq ymm4,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 32 e4 vpmovzxbq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq ymm4,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb ecx,ymm4 +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb ecx,ymm4 +[ ]*[a-f0-9]+: c5 ed 72 f6 07 vpslld ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 fe 07 vpslldq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 f6 07 vpsllq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 f6 07 vpsllw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 72 e6 07 vpsrad ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 e6 07 vpsraw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 72 d6 07 vpsrld ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 de 07 vpsrldq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 73 d6 07 vpsrlq ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ed 71 d6 07 vpsrlw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fd 70 d6 07 vpshufd ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c5 fe 70 d6 07 vpshufhw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c5 ff 70 d6 07 vpshuflw ymm2,ymm6,0x7 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c5 cd 6b d4 vpackssdw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 63 d4 vpacksswb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 2b d4 vpackusdw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 67 d4 vpackuswb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fc d4 vpaddb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fd d4 vpaddw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fe d4 vpaddd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d4 d4 vpaddq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ec d4 vpaddsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ed d4 vpaddsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd dc d4 vpaddusb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd dd d4 vpaddusw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd db d4 vpand ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd db 11 vpand ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd db 11 vpand ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd df d4 vpandn ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd df 11 vpandn ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd df 11 vpandn ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e0 d4 vpavgb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e3 d4 vpavgw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 74 d4 vpcmpeqb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 75 d4 vpcmpeqw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 76 d4 vpcmpeqd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 29 d4 vpcmpeqq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 64 d4 vpcmpgtb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 65 d4 vpcmpgtw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 66 d4 vpcmpgtd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 37 d4 vpcmpgtq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 01 d4 vphaddw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 02 d4 vphaddd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 03 d4 vphaddsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 05 d4 vphsubw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 06 d4 vphsubd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 07 d4 vphsubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f5 d4 vpmaddwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 04 d4 vpmaddubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3c d4 vpmaxsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ee d4 vpmaxsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3d d4 vpmaxsd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd de d4 vpmaxub ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3e d4 vpmaxuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3f d4 vpmaxud ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 38 d4 vpminsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ea d4 vpminsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 39 d4 vpminsd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd da d4 vpminub ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd da 11 vpminub ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd da 11 vpminub ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3a d4 vpminuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3b d4 vpminud ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e4 d4 vpmulhuw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 0b d4 vpmulhrsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e5 d4 vpmulhw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d5 d4 vpmullw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 40 d4 vpmulld ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f4 d4 vpmuludq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 28 d4 vpmuldq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd eb d4 vpor ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd eb 11 vpor ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd eb 11 vpor ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f6 d4 vpsadbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 00 d4 vpshufb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 08 d4 vpsignb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 09 d4 vpsignw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 0a d4 vpsignd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f8 d4 vpsubb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f9 d4 vpsubw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fa d4 vpsubd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fb d4 vpsubq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e8 d4 vpsubsb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e9 d4 vpsubsw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d8 d4 vpsubusb ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d9 d4 vpsubusw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 68 d4 vpunpckhbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 69 d4 vpunpckhwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 6a d4 vpunpckhdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 6d d4 vpunpckhqdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 60 d4 vpunpcklbw ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 61 d4 vpunpcklwd ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 62 d4 vpunpckldq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 6c d4 vpunpcklqdq ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ef d4 vpxor ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor ymm2,ymm6,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 1c f4 vpabsb ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 1d f4 vpabsw ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 1e f4 vpabsd ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd ymm4,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e3 4d 42 d4 07 vmpsadbw ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0f d4 07 vpalignr ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0e d4 07 vpblendw ymm2,ymm6,ymm4,0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw ymm2,ymm6,YMMWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 6d 4c fe 40 vpblendvb ymm7,ymm2,ymm6,ymm4 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4 +[ ]*[a-f0-9]+: c5 cd f1 d4 vpsllw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f2 d4 vpslld ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f3 d4 vpsllq ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e1 d4 vpsraw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e2 d4 vpsrad ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d1 d4 vpsrlw ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d2 d4 vpsrld ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d3 d4 vpsrlq ymm2,ymm6,xmm4 +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq ymm2,ymm6,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 20 e4 vpmovsxbw ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 23 e4 vpmovsxwd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 25 e4 vpmovsxdq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 30 e4 vpmovzxbw ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 33 e4 vpmovzxwd ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 35 e4 vpmovzxdq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq ymm4,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 21 f4 vpmovsxbd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 24 f4 vpmovsxwq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 31 f4 vpmovzxbd ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 34 f4 vpmovzxwq ymm6,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq ymm4,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 22 e4 vpmovsxbq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq ymm4,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq ymm4,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 32 e4 vpmovzxbq ymm4,xmm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq ymm4,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq ymm4,DWORD PTR \[rcx\] +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx256int.d b/gas/testsuite/gas/i386/x86-64-avx256int.d new file mode 100644 index 0000000..3a42f67 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx256int.d @@ -0,0 +1,554 @@ +#objdump: -dw +#name: x86-64 256bit integer AVX insns + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb %ymm4,%ecx +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb %ymm4,%ecx +[ ]*[a-f0-9]+: c5 ed 72 f6 07 vpslld \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 fe 07 vpslldq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 f6 07 vpsllq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 f6 07 vpsllw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 72 e6 07 vpsrad \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 e6 07 vpsraw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 72 d6 07 vpsrld \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 de 07 vpsrldq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 d6 07 vpsrlq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 d6 07 vpsrlw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fd 70 d6 07 vpshufd \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c5 fe 70 d6 07 vpshufhw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c5 ff 70 d6 07 vpshuflw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c5 cd 6b d4 vpackssdw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 63 d4 vpacksswb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 2b d4 vpackusdw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 67 d4 vpackuswb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fc d4 vpaddb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fd d4 vpaddw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fe d4 vpaddd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d4 d4 vpaddq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ec d4 vpaddsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ed d4 vpaddsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dc d4 vpaddusb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dd d4 vpaddusw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd db d4 vpand %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd db 11 vpand \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd df d4 vpandn %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd df 11 vpandn \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e0 d4 vpavgb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e3 d4 vpavgw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 74 d4 vpcmpeqb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 75 d4 vpcmpeqw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 76 d4 vpcmpeqd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 29 d4 vpcmpeqq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 64 d4 vpcmpgtb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 65 d4 vpcmpgtw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 66 d4 vpcmpgtd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 37 d4 vpcmpgtq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 01 d4 vphaddw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 02 d4 vphaddd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 03 d4 vphaddsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 05 d4 vphsubw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 06 d4 vphsubd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 07 d4 vphsubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f5 d4 vpmaddwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 04 d4 vpmaddubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3c d4 vpmaxsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ee d4 vpmaxsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3d d4 vpmaxsd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd de d4 vpmaxub %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3e d4 vpmaxuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3f d4 vpmaxud %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 38 d4 vpminsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ea d4 vpminsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 39 d4 vpminsd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd da d4 vpminub %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd da 11 vpminub \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3a d4 vpminuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3b d4 vpminud %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e4 d4 vpmulhuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0b d4 vpmulhrsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e5 d4 vpmulhw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d5 d4 vpmullw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 40 d4 vpmulld %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f4 d4 vpmuludq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 28 d4 vpmuldq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd eb d4 vpor %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd eb 11 vpor \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f6 d4 vpsadbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 00 d4 vpshufb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 08 d4 vpsignb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 09 d4 vpsignw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0a d4 vpsignd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f8 d4 vpsubb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f9 d4 vpsubw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fa d4 vpsubd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fb d4 vpsubq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e8 d4 vpsubsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e9 d4 vpsubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d8 d4 vpsubusb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d9 d4 vpsubusw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 68 d4 vpunpckhbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 69 d4 vpunpckhwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6a d4 vpunpckhdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6d d4 vpunpckhqdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 60 d4 vpunpcklbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 61 d4 vpunpcklwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 62 d4 vpunpckldq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6c d4 vpunpcklqdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ef d4 vpxor %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 1c f4 vpabsb %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1d f4 vpabsw %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1e f4 vpabsd %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e3 4d 42 d4 07 vmpsadbw \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0f d4 07 vpalignr \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0e d4 07 vpblendw \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 6d 4c fe 40 vpblendvb %ymm4,%ymm6,%ymm2,%ymm7 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb %ymm4,\(%rcx\),%ymm2,%ymm7 +[ ]*[a-f0-9]+: c5 cd f1 d4 vpsllw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f2 d4 vpslld %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f3 d4 vpsllq %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e1 d4 vpsraw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e2 d4 vpsrad %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d1 d4 vpsrlw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d2 d4 vpsrld %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d3 d4 vpsrlq %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 20 e4 vpmovsxbw %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 e4 vpmovsxwd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 e4 vpmovsxdq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 e4 vpmovzxbw %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 e4 vpmovzxwd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 e4 vpmovzxdq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 21 f4 vpmovsxbd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 24 f4 vpmovsxwq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 31 f4 vpmovzxbd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 34 f4 vpmovzxwq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 e4 vpmovsxbq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 e4 vpmovzxbq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb %ymm4,%ecx +[ ]*[a-f0-9]+: c5 fd d7 cc vpmovmskb %ymm4,%ecx +[ ]*[a-f0-9]+: c5 ed 72 f6 07 vpslld \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 fe 07 vpslldq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 f6 07 vpsllq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 f6 07 vpsllw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 72 e6 07 vpsrad \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 e6 07 vpsraw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 72 d6 07 vpsrld \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 de 07 vpsrldq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 73 d6 07 vpsrlq \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ed 71 d6 07 vpsrlw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fd 70 d6 07 vpshufd \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c5 fd 70 31 07 vpshufd \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c5 fe 70 d6 07 vpshufhw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c5 fe 70 31 07 vpshufhw \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c5 ff 70 d6 07 vpshuflw \$0x7,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c5 ff 70 31 07 vpshuflw \$0x7,\(%rcx\),%ymm6 +[ ]*[a-f0-9]+: c5 cd 6b d4 vpackssdw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6b 11 vpackssdw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 63 d4 vpacksswb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 63 11 vpacksswb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 2b d4 vpackusdw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 2b 11 vpackusdw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 67 d4 vpackuswb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 67 11 vpackuswb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fc d4 vpaddb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fc 11 vpaddb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fd d4 vpaddw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fd 11 vpaddw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fe d4 vpaddd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fe 11 vpaddd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d4 d4 vpaddq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d4 11 vpaddq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ec d4 vpaddsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ec 11 vpaddsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ed d4 vpaddsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ed 11 vpaddsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dc d4 vpaddusb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dc 11 vpaddusb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dd d4 vpaddusw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd dd 11 vpaddusw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd db d4 vpand %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd db 11 vpand \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd db 11 vpand \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd df d4 vpandn %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd df 11 vpandn \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd df 11 vpandn \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e0 d4 vpavgb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e0 11 vpavgb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e3 d4 vpavgw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e3 11 vpavgw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 74 d4 vpcmpeqb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 74 11 vpcmpeqb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 75 d4 vpcmpeqw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 75 11 vpcmpeqw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 76 d4 vpcmpeqd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 76 11 vpcmpeqd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 29 d4 vpcmpeqq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 29 11 vpcmpeqq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 64 d4 vpcmpgtb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 64 11 vpcmpgtb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 65 d4 vpcmpgtw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 65 11 vpcmpgtw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 66 d4 vpcmpgtd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 66 11 vpcmpgtd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 37 d4 vpcmpgtq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 37 11 vpcmpgtq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 01 d4 vphaddw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 01 11 vphaddw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 02 d4 vphaddd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 02 11 vphaddd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 03 d4 vphaddsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 03 11 vphaddsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 05 d4 vphsubw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 05 11 vphsubw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 06 d4 vphsubd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 06 11 vphsubd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 07 d4 vphsubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 07 11 vphsubsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f5 d4 vpmaddwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f5 11 vpmaddwd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 04 d4 vpmaddubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 04 11 vpmaddubsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3c d4 vpmaxsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3c 11 vpmaxsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ee d4 vpmaxsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ee 11 vpmaxsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3d d4 vpmaxsd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3d 11 vpmaxsd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd de d4 vpmaxub %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd de 11 vpmaxub \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3e d4 vpmaxuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3e 11 vpmaxuw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3f d4 vpmaxud %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3f 11 vpmaxud \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 38 d4 vpminsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 38 11 vpminsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ea d4 vpminsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ea 11 vpminsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 39 d4 vpminsd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 39 11 vpminsd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd da d4 vpminub %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd da 11 vpminub \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd da 11 vpminub \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3a d4 vpminuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3a 11 vpminuw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3b d4 vpminud %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 3b 11 vpminud \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e4 d4 vpmulhuw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e4 11 vpmulhuw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0b d4 vpmulhrsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0b 11 vpmulhrsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e5 d4 vpmulhw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e5 11 vpmulhw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d5 d4 vpmullw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d5 11 vpmullw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 40 d4 vpmulld %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 40 11 vpmulld \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f4 d4 vpmuludq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f4 11 vpmuludq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 28 d4 vpmuldq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 28 11 vpmuldq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd eb d4 vpor %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd eb 11 vpor \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd eb 11 vpor \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f6 d4 vpsadbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f6 11 vpsadbw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 00 d4 vpshufb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 00 11 vpshufb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 08 d4 vpsignb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 08 11 vpsignb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 09 d4 vpsignw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 09 11 vpsignw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0a d4 vpsignd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 4d 0a 11 vpsignd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f8 d4 vpsubb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f8 11 vpsubb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f9 d4 vpsubw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f9 11 vpsubw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fa d4 vpsubd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fa 11 vpsubd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fb d4 vpsubq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd fb 11 vpsubq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e8 d4 vpsubsb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e8 11 vpsubsb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e9 d4 vpsubsw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e9 11 vpsubsw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d8 d4 vpsubusb %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d8 11 vpsubusb \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d9 d4 vpsubusw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d9 11 vpsubusw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 68 d4 vpunpckhbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 68 11 vpunpckhbw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 69 d4 vpunpckhwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 69 11 vpunpckhwd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6a d4 vpunpckhdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6a 11 vpunpckhdq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6d d4 vpunpckhqdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6d 11 vpunpckhqdq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 60 d4 vpunpcklbw %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 60 11 vpunpcklbw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 61 d4 vpunpcklwd %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 61 11 vpunpcklwd \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 62 d4 vpunpckldq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 62 11 vpunpckldq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6c d4 vpunpcklqdq %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd 6c 11 vpunpcklqdq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ef d4 vpxor %ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd ef 11 vpxor \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 1c f4 vpabsb %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1c 21 vpabsb \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1d f4 vpabsw %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1d 21 vpabsw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1e f4 vpabsd %ymm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 1e 21 vpabsd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e3 4d 42 d4 07 vmpsadbw \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 42 11 07 vmpsadbw \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0f d4 07 vpalignr \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0f 11 07 vpalignr \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0e d4 07 vpblendw \$0x7,%ymm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 4d 0e 11 07 vpblendw \$0x7,\(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e3 6d 4c fe 40 vpblendvb %ymm4,%ymm6,%ymm2,%ymm7 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb %ymm4,\(%rcx\),%ymm2,%ymm7 +[ ]*[a-f0-9]+: c4 e3 6d 4c 39 40 vpblendvb %ymm4,\(%rcx\),%ymm2,%ymm7 +[ ]*[a-f0-9]+: c5 cd f1 d4 vpsllw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f1 11 vpsllw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f2 d4 vpslld %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f2 11 vpslld \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f3 d4 vpsllq %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd f3 11 vpsllq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e1 d4 vpsraw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e1 11 vpsraw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e2 d4 vpsrad %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd e2 11 vpsrad \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d1 d4 vpsrlw %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d1 11 vpsrlw \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d2 d4 vpsrld %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d2 11 vpsrld \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d3 d4 vpsrlq %xmm4,%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c5 cd d3 11 vpsrlq \(%rcx\),%ymm6,%ymm2 +[ ]*[a-f0-9]+: c4 e2 7d 20 e4 vpmovsxbw %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 20 21 vpmovsxbw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 e4 vpmovsxwd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 23 21 vpmovsxwd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 e4 vpmovsxdq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 25 21 vpmovsxdq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 e4 vpmovzxbw %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 30 21 vpmovzxbw \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 e4 vpmovzxwd %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 33 21 vpmovzxwd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 e4 vpmovzxdq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 35 21 vpmovzxdq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 21 f4 vpmovsxbd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 21 21 vpmovsxbd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 24 f4 vpmovsxwq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 24 21 vpmovsxwq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 31 f4 vpmovzxbd %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 31 21 vpmovzxbd \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 34 f4 vpmovzxwq %xmm4,%ymm6 +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 34 21 vpmovzxwq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 e4 vpmovsxbq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 22 21 vpmovsxbq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 e4 vpmovzxbq %xmm4,%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq \(%rcx\),%ymm4 +[ ]*[a-f0-9]+: c4 e2 7d 32 21 vpmovzxbq \(%rcx\),%ymm4 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx256int.s b/gas/testsuite/gas/i386/x86-64-avx256int.s new file mode 100644 index 0000000..86d0b60 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx256int.s @@ -0,0 +1,599 @@ +# Check x86-64 256it integer AVX instructions + + .allow_index_reg + .text +_start: + +# Tests for op ymm, regl + vpmovmskb %ymm4,%ecx + +# Tests for op ymm, regq + vpmovmskb %ymm4,%rcx + +# Tests for op imm8, ymm, ymm + vpslld $7,%ymm6,%ymm2 + vpslldq $7,%ymm6,%ymm2 + vpsllq $7,%ymm6,%ymm2 + vpsllw $7,%ymm6,%ymm2 + vpsrad $7,%ymm6,%ymm2 + vpsraw $7,%ymm6,%ymm2 + vpsrld $7,%ymm6,%ymm2 + vpsrldq $7,%ymm6,%ymm2 + vpsrlq $7,%ymm6,%ymm2 + vpsrlw $7,%ymm6,%ymm2 + +# Tests for op imm8, ymm/mem256, ymm + vpshufd $7,%ymm6,%ymm2 + vpshufd $7,(%rcx),%ymm6 + vpshufhw $7,%ymm6,%ymm2 + vpshufhw $7,(%rcx),%ymm6 + vpshuflw $7,%ymm6,%ymm2 + vpshuflw $7,(%rcx),%ymm6 + +# Tests for op ymm/mem256, ymm, ymm + vpackssdw %ymm4,%ymm6,%ymm2 + vpackssdw (%rcx),%ymm6,%ymm2 + vpacksswb %ymm4,%ymm6,%ymm2 + vpacksswb (%rcx),%ymm6,%ymm2 + vpackusdw %ymm4,%ymm6,%ymm2 + vpackusdw (%rcx),%ymm6,%ymm2 + vpackuswb %ymm4,%ymm6,%ymm2 + vpackuswb (%rcx),%ymm6,%ymm2 + vpaddb %ymm4,%ymm6,%ymm2 + vpaddb (%rcx),%ymm6,%ymm2 + vpaddw %ymm4,%ymm6,%ymm2 + vpaddw (%rcx),%ymm6,%ymm2 + vpaddd %ymm4,%ymm6,%ymm2 + vpaddd (%rcx),%ymm6,%ymm2 + vpaddq %ymm4,%ymm6,%ymm2 + vpaddq (%rcx),%ymm6,%ymm2 + vpaddsb %ymm4,%ymm6,%ymm2 + vpaddsb (%rcx),%ymm6,%ymm2 + vpaddsw %ymm4,%ymm6,%ymm2 + vpaddsw (%rcx),%ymm6,%ymm2 + vpaddusb %ymm4,%ymm6,%ymm2 + vpaddusb (%rcx),%ymm6,%ymm2 + vpaddusw %ymm4,%ymm6,%ymm2 + vpaddusw (%rcx),%ymm6,%ymm2 + vpand %ymm4,%ymm6,%ymm2 + vpand (%rcx),%ymm6,%ymm2 + vpandn %ymm4,%ymm6,%ymm2 + vpandn (%rcx),%ymm6,%ymm2 + vpavgb %ymm4,%ymm6,%ymm2 + vpavgb (%rcx),%ymm6,%ymm2 + vpavgw %ymm4,%ymm6,%ymm2 + vpavgw (%rcx),%ymm6,%ymm2 + vpcmpeqb %ymm4,%ymm6,%ymm2 + vpcmpeqb (%rcx),%ymm6,%ymm2 + vpcmpeqw %ymm4,%ymm6,%ymm2 + vpcmpeqw (%rcx),%ymm6,%ymm2 + vpcmpeqd %ymm4,%ymm6,%ymm2 + vpcmpeqd (%rcx),%ymm6,%ymm2 + vpcmpeqq %ymm4,%ymm6,%ymm2 + vpcmpeqq (%rcx),%ymm6,%ymm2 + vpcmpgtb %ymm4,%ymm6,%ymm2 + vpcmpgtb (%rcx),%ymm6,%ymm2 + vpcmpgtw %ymm4,%ymm6,%ymm2 + vpcmpgtw (%rcx),%ymm6,%ymm2 + vpcmpgtd %ymm4,%ymm6,%ymm2 + vpcmpgtd (%rcx),%ymm6,%ymm2 + vpcmpgtq %ymm4,%ymm6,%ymm2 + vpcmpgtq (%rcx),%ymm6,%ymm2 + vphaddw %ymm4,%ymm6,%ymm2 + vphaddw (%rcx),%ymm6,%ymm2 + vphaddd %ymm4,%ymm6,%ymm2 + vphaddd (%rcx),%ymm6,%ymm2 + vphaddsw %ymm4,%ymm6,%ymm2 + vphaddsw (%rcx),%ymm6,%ymm2 + vphsubw %ymm4,%ymm6,%ymm2 + vphsubw (%rcx),%ymm6,%ymm2 + vphsubd %ymm4,%ymm6,%ymm2 + vphsubd (%rcx),%ymm6,%ymm2 + vphsubsw %ymm4,%ymm6,%ymm2 + vphsubsw (%rcx),%ymm6,%ymm2 + vpmaddwd %ymm4,%ymm6,%ymm2 + vpmaddwd (%rcx),%ymm6,%ymm2 + vpmaddubsw %ymm4,%ymm6,%ymm2 + vpmaddubsw (%rcx),%ymm6,%ymm2 + vpmaxsb %ymm4,%ymm6,%ymm2 + vpmaxsb (%rcx),%ymm6,%ymm2 + vpmaxsw %ymm4,%ymm6,%ymm2 + vpmaxsw (%rcx),%ymm6,%ymm2 + vpmaxsd %ymm4,%ymm6,%ymm2 + vpmaxsd (%rcx),%ymm6,%ymm2 + vpmaxub %ymm4,%ymm6,%ymm2 + vpmaxub (%rcx),%ymm6,%ymm2 + vpmaxuw %ymm4,%ymm6,%ymm2 + vpmaxuw (%rcx),%ymm6,%ymm2 + vpmaxud %ymm4,%ymm6,%ymm2 + vpmaxud (%rcx),%ymm6,%ymm2 + vpminsb %ymm4,%ymm6,%ymm2 + vpminsb (%rcx),%ymm6,%ymm2 + vpminsw %ymm4,%ymm6,%ymm2 + vpminsw (%rcx),%ymm6,%ymm2 + vpminsd %ymm4,%ymm6,%ymm2 + vpminsd (%rcx),%ymm6,%ymm2 + vpminub %ymm4,%ymm6,%ymm2 + vpminub (%rcx),%ymm6,%ymm2 + vpminuw %ymm4,%ymm6,%ymm2 + vpminuw (%rcx),%ymm6,%ymm2 + vpminud %ymm4,%ymm6,%ymm2 + vpminud (%rcx),%ymm6,%ymm2 + vpmulhuw %ymm4,%ymm6,%ymm2 + vpmulhuw (%rcx),%ymm6,%ymm2 + vpmulhrsw %ymm4,%ymm6,%ymm2 + vpmulhrsw (%rcx),%ymm6,%ymm2 + vpmulhw %ymm4,%ymm6,%ymm2 + vpmulhw (%rcx),%ymm6,%ymm2 + vpmullw %ymm4,%ymm6,%ymm2 + vpmullw (%rcx),%ymm6,%ymm2 + vpmulld %ymm4,%ymm6,%ymm2 + vpmulld (%rcx),%ymm6,%ymm2 + vpmuludq %ymm4,%ymm6,%ymm2 + vpmuludq (%rcx),%ymm6,%ymm2 + vpmuldq %ymm4,%ymm6,%ymm2 + vpmuldq (%rcx),%ymm6,%ymm2 + vpor %ymm4,%ymm6,%ymm2 + vpor (%rcx),%ymm6,%ymm2 + vpsadbw %ymm4,%ymm6,%ymm2 + vpsadbw (%rcx),%ymm6,%ymm2 + vpshufb %ymm4,%ymm6,%ymm2 + vpshufb (%rcx),%ymm6,%ymm2 + vpsignb %ymm4,%ymm6,%ymm2 + vpsignb (%rcx),%ymm6,%ymm2 + vpsignw %ymm4,%ymm6,%ymm2 + vpsignw (%rcx),%ymm6,%ymm2 + vpsignd %ymm4,%ymm6,%ymm2 + vpsignd (%rcx),%ymm6,%ymm2 + vpsubb %ymm4,%ymm6,%ymm2 + vpsubb (%rcx),%ymm6,%ymm2 + vpsubw %ymm4,%ymm6,%ymm2 + vpsubw (%rcx),%ymm6,%ymm2 + vpsubd %ymm4,%ymm6,%ymm2 + vpsubd (%rcx),%ymm6,%ymm2 + vpsubq %ymm4,%ymm6,%ymm2 + vpsubq (%rcx),%ymm6,%ymm2 + vpsubsb %ymm4,%ymm6,%ymm2 + vpsubsb (%rcx),%ymm6,%ymm2 + vpsubsw %ymm4,%ymm6,%ymm2 + vpsubsw (%rcx),%ymm6,%ymm2 + vpsubusb %ymm4,%ymm6,%ymm2 + vpsubusb (%rcx),%ymm6,%ymm2 + vpsubusw %ymm4,%ymm6,%ymm2 + vpsubusw (%rcx),%ymm6,%ymm2 + vpunpckhbw %ymm4,%ymm6,%ymm2 + vpunpckhbw (%rcx),%ymm6,%ymm2 + vpunpckhwd %ymm4,%ymm6,%ymm2 + vpunpckhwd (%rcx),%ymm6,%ymm2 + vpunpckhdq %ymm4,%ymm6,%ymm2 + vpunpckhdq (%rcx),%ymm6,%ymm2 + vpunpckhqdq %ymm4,%ymm6,%ymm2 + vpunpckhqdq (%rcx),%ymm6,%ymm2 + vpunpcklbw %ymm4,%ymm6,%ymm2 + vpunpcklbw (%rcx),%ymm6,%ymm2 + vpunpcklwd %ymm4,%ymm6,%ymm2 + vpunpcklwd (%rcx),%ymm6,%ymm2 + vpunpckldq %ymm4,%ymm6,%ymm2 + vpunpckldq (%rcx),%ymm6,%ymm2 + vpunpcklqdq %ymm4,%ymm6,%ymm2 + vpunpcklqdq (%rcx),%ymm6,%ymm2 + vpxor %ymm4,%ymm6,%ymm2 + vpxor (%rcx),%ymm6,%ymm2 + +# Tests for op ymm/mem256, ymm + vpabsb %ymm4,%ymm6 + vpabsb (%rcx),%ymm4 + vpabsw %ymm4,%ymm6 + vpabsw (%rcx),%ymm4 + vpabsd %ymm4,%ymm6 + vpabsd (%rcx),%ymm4 + +# Tests for op imm8, ymm/mem256, ymm, ymm + vmpsadbw $7,%ymm4,%ymm6,%ymm2 + vmpsadbw $7,(%rcx),%ymm6,%ymm2 + vpalignr $7,%ymm4,%ymm6,%ymm2 + vpalignr $7,(%rcx),%ymm6,%ymm2 + vpblendw $7,%ymm4,%ymm6,%ymm2 + vpblendw $7,(%rcx),%ymm6,%ymm2 + +# Tests for op ymm, ymm/mem256, ymm, ymm + vpblendvb %ymm4,%ymm6,%ymm2,%ymm7 + vpblendvb %ymm4,(%rcx),%ymm2,%ymm7 + +# Tests for op xmm/mem128, ymm, ymm + vpsllw %xmm4,%ymm6,%ymm2 + vpsllw (%rcx),%ymm6,%ymm2 + vpslld %xmm4,%ymm6,%ymm2 + vpslld (%rcx),%ymm6,%ymm2 + vpsllq %xmm4,%ymm6,%ymm2 + vpsllq (%rcx),%ymm6,%ymm2 + vpsraw %xmm4,%ymm6,%ymm2 + vpsraw (%rcx),%ymm6,%ymm2 + vpsrad %xmm4,%ymm6,%ymm2 + vpsrad (%rcx),%ymm6,%ymm2 + vpsrlw %xmm4,%ymm6,%ymm2 + vpsrlw (%rcx),%ymm6,%ymm2 + vpsrld %xmm4,%ymm6,%ymm2 + vpsrld (%rcx),%ymm6,%ymm2 + vpsrlq %xmm4,%ymm6,%ymm2 + vpsrlq (%rcx),%ymm6,%ymm2 + +# Tests for op xmm/mem128, ymm + vpmovsxbw %xmm4,%ymm4 + vpmovsxbw (%rcx),%ymm4 + vpmovsxwd %xmm4,%ymm4 + vpmovsxwd (%rcx),%ymm4 + vpmovsxdq %xmm4,%ymm4 + vpmovsxdq (%rcx),%ymm4 + vpmovzxbw %xmm4,%ymm4 + vpmovzxbw (%rcx),%ymm4 + vpmovzxwd %xmm4,%ymm4 + vpmovzxwd (%rcx),%ymm4 + vpmovzxdq %xmm4,%ymm4 + vpmovzxdq (%rcx),%ymm4 + +# Tests for op xmm/mem64, ymm + vpmovsxbd %xmm4,%ymm6 + vpmovsxbd (%rcx),%ymm4 + vpmovsxwq %xmm4,%ymm6 + vpmovsxwq (%rcx),%ymm4 + vpmovzxbd %xmm4,%ymm6 + vpmovzxbd (%rcx),%ymm4 + vpmovzxwq %xmm4,%ymm6 + vpmovzxwq (%rcx),%ymm4 + +# Tests for op xmm/mem32, ymm + vpmovsxbq %xmm4,%ymm4 + vpmovsxbq (%rcx),%ymm4 + vpmovzxbq %xmm4,%ymm4 + vpmovzxbq (%rcx),%ymm4 + + .intel_syntax noprefix + +# Tests for op ymm, regl + vpmovmskb ecx,ymm4 + +# Tests for op ymm, regq + vpmovmskb rcx,ymm4 + +# Tests for op imm8, ymm, ymm + vpslld ymm2,ymm6,7 + vpslldq ymm2,ymm6,7 + vpsllq ymm2,ymm6,7 + vpsllw ymm2,ymm6,7 + vpsrad ymm2,ymm6,7 + vpsraw ymm2,ymm6,7 + vpsrld ymm2,ymm6,7 + vpsrldq ymm2,ymm6,7 + vpsrlq ymm2,ymm6,7 + vpsrlw ymm2,ymm6,7 + +# Tests for op imm8, ymm/mem256, ymm + vpshufd ymm2,ymm6,7 + vpshufd ymm6,YMMWORD PTR [rcx],7 + vpshufd ymm6,[rcx],7 + vpshufhw ymm2,ymm6,7 + vpshufhw ymm6,YMMWORD PTR [rcx],7 + vpshufhw ymm6,[rcx],7 + vpshuflw ymm2,ymm6,7 + vpshuflw ymm6,YMMWORD PTR [rcx],7 + vpshuflw ymm6,[rcx],7 + +# Tests for op ymm/mem256, ymm, ymm + vpackssdw ymm2,ymm6,ymm4 + vpackssdw ymm2,ymm6,YMMWORD PTR [rcx] + vpackssdw ymm2,ymm6,[rcx] + vpacksswb ymm2,ymm6,ymm4 + vpacksswb ymm2,ymm6,YMMWORD PTR [rcx] + vpacksswb ymm2,ymm6,[rcx] + vpackusdw ymm2,ymm6,ymm4 + vpackusdw ymm2,ymm6,YMMWORD PTR [rcx] + vpackusdw ymm2,ymm6,[rcx] + vpackuswb ymm2,ymm6,ymm4 + vpackuswb ymm2,ymm6,YMMWORD PTR [rcx] + vpackuswb ymm2,ymm6,[rcx] + vpaddb ymm2,ymm6,ymm4 + vpaddb ymm2,ymm6,YMMWORD PTR [rcx] + vpaddb ymm2,ymm6,[rcx] + vpaddw ymm2,ymm6,ymm4 + vpaddw ymm2,ymm6,YMMWORD PTR [rcx] + vpaddw ymm2,ymm6,[rcx] + vpaddd ymm2,ymm6,ymm4 + vpaddd ymm2,ymm6,YMMWORD PTR [rcx] + vpaddd ymm2,ymm6,[rcx] + vpaddq ymm2,ymm6,ymm4 + vpaddq ymm2,ymm6,YMMWORD PTR [rcx] + vpaddq ymm2,ymm6,[rcx] + vpaddsb ymm2,ymm6,ymm4 + vpaddsb ymm2,ymm6,YMMWORD PTR [rcx] + vpaddsb ymm2,ymm6,[rcx] + vpaddsw ymm2,ymm6,ymm4 + vpaddsw ymm2,ymm6,YMMWORD PTR [rcx] + vpaddsw ymm2,ymm6,[rcx] + vpaddusb ymm2,ymm6,ymm4 + vpaddusb ymm2,ymm6,YMMWORD PTR [rcx] + vpaddusb ymm2,ymm6,[rcx] + vpaddusw ymm2,ymm6,ymm4 + vpaddusw ymm2,ymm6,YMMWORD PTR [rcx] + vpaddusw ymm2,ymm6,[rcx] + vpand ymm2,ymm6,ymm4 + vpand ymm2,ymm6,YMMWORD PTR [rcx] + vpand ymm2,ymm6,[rcx] + vpandn ymm2,ymm6,ymm4 + vpandn ymm2,ymm6,YMMWORD PTR [rcx] + vpandn ymm2,ymm6,[rcx] + vpavgb ymm2,ymm6,ymm4 + vpavgb ymm2,ymm6,YMMWORD PTR [rcx] + vpavgb ymm2,ymm6,[rcx] + vpavgw ymm2,ymm6,ymm4 + vpavgw ymm2,ymm6,YMMWORD PTR [rcx] + vpavgw ymm2,ymm6,[rcx] + vpcmpeqb ymm2,ymm6,ymm4 + vpcmpeqb ymm2,ymm6,YMMWORD PTR [rcx] + vpcmpeqb ymm2,ymm6,[rcx] + vpcmpeqw ymm2,ymm6,ymm4 + vpcmpeqw ymm2,ymm6,YMMWORD PTR [rcx] + vpcmpeqw ymm2,ymm6,[rcx] + vpcmpeqd ymm2,ymm6,ymm4 + vpcmpeqd ymm2,ymm6,YMMWORD PTR [rcx] + vpcmpeqd ymm2,ymm6,[rcx] + vpcmpeqq ymm2,ymm6,ymm4 + vpcmpeqq ymm2,ymm6,YMMWORD PTR [rcx] + vpcmpeqq ymm2,ymm6,[rcx] + vpcmpgtb ymm2,ymm6,ymm4 + vpcmpgtb ymm2,ymm6,YMMWORD PTR [rcx] + vpcmpgtb ymm2,ymm6,[rcx] + vpcmpgtw ymm2,ymm6,ymm4 + vpcmpgtw ymm2,ymm6,YMMWORD PTR [rcx] + vpcmpgtw ymm2,ymm6,[rcx] + vpcmpgtd ymm2,ymm6,ymm4 + vpcmpgtd ymm2,ymm6,YMMWORD PTR [rcx] + vpcmpgtd ymm2,ymm6,[rcx] + vpcmpgtq ymm2,ymm6,ymm4 + vpcmpgtq ymm2,ymm6,YMMWORD PTR [rcx] + vpcmpgtq ymm2,ymm6,[rcx] + vphaddw ymm2,ymm6,ymm4 + vphaddw ymm2,ymm6,YMMWORD PTR [rcx] + vphaddw ymm2,ymm6,[rcx] + vphaddd ymm2,ymm6,ymm4 + vphaddd ymm2,ymm6,YMMWORD PTR [rcx] + vphaddd ymm2,ymm6,[rcx] + vphaddsw ymm2,ymm6,ymm4 + vphaddsw ymm2,ymm6,YMMWORD PTR [rcx] + vphaddsw ymm2,ymm6,[rcx] + vphsubw ymm2,ymm6,ymm4 + vphsubw ymm2,ymm6,YMMWORD PTR [rcx] + vphsubw ymm2,ymm6,[rcx] + vphsubd ymm2,ymm6,ymm4 + vphsubd ymm2,ymm6,YMMWORD PTR [rcx] + vphsubd ymm2,ymm6,[rcx] + vphsubsw ymm2,ymm6,ymm4 + vphsubsw ymm2,ymm6,YMMWORD PTR [rcx] + vphsubsw ymm2,ymm6,[rcx] + vpmaddwd ymm2,ymm6,ymm4 + vpmaddwd ymm2,ymm6,YMMWORD PTR [rcx] + vpmaddwd ymm2,ymm6,[rcx] + vpmaddubsw ymm2,ymm6,ymm4 + vpmaddubsw ymm2,ymm6,YMMWORD PTR [rcx] + vpmaddubsw ymm2,ymm6,[rcx] + vpmaxsb ymm2,ymm6,ymm4 + vpmaxsb ymm2,ymm6,YMMWORD PTR [rcx] + vpmaxsb ymm2,ymm6,[rcx] + vpmaxsw ymm2,ymm6,ymm4 + vpmaxsw ymm2,ymm6,YMMWORD PTR [rcx] + vpmaxsw ymm2,ymm6,[rcx] + vpmaxsd ymm2,ymm6,ymm4 + vpmaxsd ymm2,ymm6,YMMWORD PTR [rcx] + vpmaxsd ymm2,ymm6,[rcx] + vpmaxub ymm2,ymm6,ymm4 + vpmaxub ymm2,ymm6,YMMWORD PTR [rcx] + vpmaxub ymm2,ymm6,[rcx] + vpmaxuw ymm2,ymm6,ymm4 + vpmaxuw ymm2,ymm6,YMMWORD PTR [rcx] + vpmaxuw ymm2,ymm6,[rcx] + vpmaxud ymm2,ymm6,ymm4 + vpmaxud ymm2,ymm6,YMMWORD PTR [rcx] + vpmaxud ymm2,ymm6,[rcx] + vpminsb ymm2,ymm6,ymm4 + vpminsb ymm2,ymm6,YMMWORD PTR [rcx] + vpminsb ymm2,ymm6,[rcx] + vpminsw ymm2,ymm6,ymm4 + vpminsw ymm2,ymm6,YMMWORD PTR [rcx] + vpminsw ymm2,ymm6,[rcx] + vpminsd ymm2,ymm6,ymm4 + vpminsd ymm2,ymm6,YMMWORD PTR [rcx] + vpminsd ymm2,ymm6,[rcx] + vpminub ymm2,ymm6,ymm4 + vpminub ymm2,ymm6,YMMWORD PTR [rcx] + vpminub ymm2,ymm6,[rcx] + vpminuw ymm2,ymm6,ymm4 + vpminuw ymm2,ymm6,YMMWORD PTR [rcx] + vpminuw ymm2,ymm6,[rcx] + vpminud ymm2,ymm6,ymm4 + vpminud ymm2,ymm6,YMMWORD PTR [rcx] + vpminud ymm2,ymm6,[rcx] + vpmulhuw ymm2,ymm6,ymm4 + vpmulhuw ymm2,ymm6,YMMWORD PTR [rcx] + vpmulhuw ymm2,ymm6,[rcx] + vpmulhrsw ymm2,ymm6,ymm4 + vpmulhrsw ymm2,ymm6,YMMWORD PTR [rcx] + vpmulhrsw ymm2,ymm6,[rcx] + vpmulhw ymm2,ymm6,ymm4 + vpmulhw ymm2,ymm6,YMMWORD PTR [rcx] + vpmulhw ymm2,ymm6,[rcx] + vpmullw ymm2,ymm6,ymm4 + vpmullw ymm2,ymm6,YMMWORD PTR [rcx] + vpmullw ymm2,ymm6,[rcx] + vpmulld ymm2,ymm6,ymm4 + vpmulld ymm2,ymm6,YMMWORD PTR [rcx] + vpmulld ymm2,ymm6,[rcx] + vpmuludq ymm2,ymm6,ymm4 + vpmuludq ymm2,ymm6,YMMWORD PTR [rcx] + vpmuludq ymm2,ymm6,[rcx] + vpmuldq ymm2,ymm6,ymm4 + vpmuldq ymm2,ymm6,YMMWORD PTR [rcx] + vpmuldq ymm2,ymm6,[rcx] + vpor ymm2,ymm6,ymm4 + vpor ymm2,ymm6,YMMWORD PTR [rcx] + vpor ymm2,ymm6,[rcx] + vpsadbw ymm2,ymm6,ymm4 + vpsadbw ymm2,ymm6,YMMWORD PTR [rcx] + vpsadbw ymm2,ymm6,[rcx] + vpshufb ymm2,ymm6,ymm4 + vpshufb ymm2,ymm6,YMMWORD PTR [rcx] + vpshufb ymm2,ymm6,[rcx] + vpsignb ymm2,ymm6,ymm4 + vpsignb ymm2,ymm6,YMMWORD PTR [rcx] + vpsignb ymm2,ymm6,[rcx] + vpsignw ymm2,ymm6,ymm4 + vpsignw ymm2,ymm6,YMMWORD PTR [rcx] + vpsignw ymm2,ymm6,[rcx] + vpsignd ymm2,ymm6,ymm4 + vpsignd ymm2,ymm6,YMMWORD PTR [rcx] + vpsignd ymm2,ymm6,[rcx] + vpsubb ymm2,ymm6,ymm4 + vpsubb ymm2,ymm6,YMMWORD PTR [rcx] + vpsubb ymm2,ymm6,[rcx] + vpsubw ymm2,ymm6,ymm4 + vpsubw ymm2,ymm6,YMMWORD PTR [rcx] + vpsubw ymm2,ymm6,[rcx] + vpsubd ymm2,ymm6,ymm4 + vpsubd ymm2,ymm6,YMMWORD PTR [rcx] + vpsubd ymm2,ymm6,[rcx] + vpsubq ymm2,ymm6,ymm4 + vpsubq ymm2,ymm6,YMMWORD PTR [rcx] + vpsubq ymm2,ymm6,[rcx] + vpsubsb ymm2,ymm6,ymm4 + vpsubsb ymm2,ymm6,YMMWORD PTR [rcx] + vpsubsb ymm2,ymm6,[rcx] + vpsubsw ymm2,ymm6,ymm4 + vpsubsw ymm2,ymm6,YMMWORD PTR [rcx] + vpsubsw ymm2,ymm6,[rcx] + vpsubusb ymm2,ymm6,ymm4 + vpsubusb ymm2,ymm6,YMMWORD PTR [rcx] + vpsubusb ymm2,ymm6,[rcx] + vpsubusw ymm2,ymm6,ymm4 + vpsubusw ymm2,ymm6,YMMWORD PTR [rcx] + vpsubusw ymm2,ymm6,[rcx] + vpunpckhbw ymm2,ymm6,ymm4 + vpunpckhbw ymm2,ymm6,YMMWORD PTR [rcx] + vpunpckhbw ymm2,ymm6,[rcx] + vpunpckhwd ymm2,ymm6,ymm4 + vpunpckhwd ymm2,ymm6,YMMWORD PTR [rcx] + vpunpckhwd ymm2,ymm6,[rcx] + vpunpckhdq ymm2,ymm6,ymm4 + vpunpckhdq ymm2,ymm6,YMMWORD PTR [rcx] + vpunpckhdq ymm2,ymm6,[rcx] + vpunpckhqdq ymm2,ymm6,ymm4 + vpunpckhqdq ymm2,ymm6,YMMWORD PTR [rcx] + vpunpckhqdq ymm2,ymm6,[rcx] + vpunpcklbw ymm2,ymm6,ymm4 + vpunpcklbw ymm2,ymm6,YMMWORD PTR [rcx] + vpunpcklbw ymm2,ymm6,[rcx] + vpunpcklwd ymm2,ymm6,ymm4 + vpunpcklwd ymm2,ymm6,YMMWORD PTR [rcx] + vpunpcklwd ymm2,ymm6,[rcx] + vpunpckldq ymm2,ymm6,ymm4 + vpunpckldq ymm2,ymm6,YMMWORD PTR [rcx] + vpunpckldq ymm2,ymm6,[rcx] + vpunpcklqdq ymm2,ymm6,ymm4 + vpunpcklqdq ymm2,ymm6,YMMWORD PTR [rcx] + vpunpcklqdq ymm2,ymm6,[rcx] + vpxor ymm2,ymm6,ymm4 + vpxor ymm2,ymm6,YMMWORD PTR [rcx] + vpxor ymm2,ymm6,[rcx] + +# Tests for op ymm/mem256, ymm + vpabsb ymm6,ymm4 + vpabsb ymm4,YMMWORD PTR [rcx] + vpabsb ymm4,[rcx] + vpabsw ymm6,ymm4 + vpabsw ymm4,YMMWORD PTR [rcx] + vpabsw ymm4,[rcx] + vpabsd ymm6,ymm4 + vpabsd ymm4,YMMWORD PTR [rcx] + vpabsd ymm4,[rcx] + +# Tests for op imm8, ymm/mem256, ymm, ymm + vmpsadbw ymm2,ymm6,ymm4,7 + vmpsadbw ymm2,ymm6,YMMWORD PTR [rcx],7 + vmpsadbw ymm2,ymm6,[rcx],7 + vpalignr ymm2,ymm6,ymm4,7 + vpalignr ymm2,ymm6,YMMWORD PTR [rcx],7 + vpalignr ymm2,ymm6,[rcx],7 + vpblendw ymm2,ymm6,ymm4,7 + vpblendw ymm2,ymm6,YMMWORD PTR [rcx],7 + vpblendw ymm2,ymm6,[rcx],7 + +# Tests for op ymm, ymm/mem256, ymm, ymm + vpblendvb ymm7,ymm2,ymm6,ymm4 + vpblendvb ymm7,ymm2,YMMWORD PTR [rcx],ymm4 + vpblendvb ymm7,ymm2,[rcx],ymm4 + +# Tests for op xmm/mem128, ymm, ymm + vpsllw ymm2,ymm6,xmm4 + vpsllw ymm2,ymm6,XMMWORD PTR [rcx] + vpsllw ymm2,ymm6,[rcx] + vpslld ymm2,ymm6,xmm4 + vpslld ymm2,ymm6,XMMWORD PTR [rcx] + vpslld ymm2,ymm6,[rcx] + vpsllq ymm2,ymm6,xmm4 + vpsllq ymm2,ymm6,XMMWORD PTR [rcx] + vpsllq ymm2,ymm6,[rcx] + vpsraw ymm2,ymm6,xmm4 + vpsraw ymm2,ymm6,XMMWORD PTR [rcx] + vpsraw ymm2,ymm6,[rcx] + vpsrad ymm2,ymm6,xmm4 + vpsrad ymm2,ymm6,XMMWORD PTR [rcx] + vpsrad ymm2,ymm6,[rcx] + vpsrlw ymm2,ymm6,xmm4 + vpsrlw ymm2,ymm6,XMMWORD PTR [rcx] + vpsrlw ymm2,ymm6,[rcx] + vpsrld ymm2,ymm6,xmm4 + vpsrld ymm2,ymm6,XMMWORD PTR [rcx] + vpsrld ymm2,ymm6,[rcx] + vpsrlq ymm2,ymm6,xmm4 + vpsrlq ymm2,ymm6,XMMWORD PTR [rcx] + vpsrlq ymm2,ymm6,[rcx] + +# Tests for op xmm/mem128, ymm + vpmovsxbw ymm4,xmm4 + vpmovsxbw ymm4,XMMWORD PTR [rcx] + vpmovsxbw ymm4,[rcx] + vpmovsxwd ymm4,xmm4 + vpmovsxwd ymm4,XMMWORD PTR [rcx] + vpmovsxwd ymm4,[rcx] + vpmovsxdq ymm4,xmm4 + vpmovsxdq ymm4,XMMWORD PTR [rcx] + vpmovsxdq ymm4,[rcx] + vpmovzxbw ymm4,xmm4 + vpmovzxbw ymm4,XMMWORD PTR [rcx] + vpmovzxbw ymm4,[rcx] + vpmovzxwd ymm4,xmm4 + vpmovzxwd ymm4,XMMWORD PTR [rcx] + vpmovzxwd ymm4,[rcx] + vpmovzxdq ymm4,xmm4 + vpmovzxdq ymm4,XMMWORD PTR [rcx] + vpmovzxdq ymm4,[rcx] + +# Tests for op xmm/mem64, ymm + vpmovsxbd ymm6,xmm4 + vpmovsxbd ymm4,QWORD PTR [rcx] + vpmovsxbd ymm4,[rcx] + vpmovsxwq ymm6,xmm4 + vpmovsxwq ymm4,QWORD PTR [rcx] + vpmovsxwq ymm4,[rcx] + vpmovzxbd ymm6,xmm4 + vpmovzxbd ymm4,QWORD PTR [rcx] + vpmovzxbd ymm4,[rcx] + vpmovzxwq ymm6,xmm4 + vpmovzxwq ymm4,QWORD PTR [rcx] + vpmovzxwq ymm4,[rcx] + +# Tests for op xmm/mem32, ymm + vpmovsxbq ymm4,xmm4 + vpmovsxbq ymm4,DWORD PTR [rcx] + vpmovsxbq ymm4,[rcx] + vpmovzxbq ymm4,xmm4 + vpmovzxbq ymm4,DWORD PTR [rcx] + vpmovzxbq ymm4,[rcx] diff --git a/gas/testsuite/gas/i386/x86-64-bmi2-intel.d b/gas/testsuite/gas/i386/x86-64-bmi2-intel.d new file mode 100644 index 0000000..b692c1d --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-bmi2-intel.d @@ -0,0 +1,156 @@ +#as: +#objdump: -dwMintel +#name: x86-64 BMI2 insns (Intel disassembly) +#source: x86-64-bmi2.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx ebx,eax,0x7 +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 43 7b f0 f9 07 rorx r15d,r9d,0x7 +[ ]*[a-f0-9]+: c4 63 7b f0 39 07 rorx r15d,DWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx esi,ebx,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 03 f6 d1 mulx r10d,r15d,r9d +[ ]*[a-f0-9]+: c4 62 03 f6 11 mulx r10d,r15d,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 63 f5 f0 pdep esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep esi,ebx,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 03 f5 d1 pdep r10d,r15d,r9d +[ ]*[a-f0-9]+: c4 62 03 f5 11 pdep r10d,r15d,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 62 f5 f0 pext esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext esi,ebx,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 02 f5 d1 pext r10d,r15d,r9d +[ ]*[a-f0-9]+: c4 62 02 f5 11 pext r10d,r15d,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 78 f5 f3 bzhi esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 42 30 f5 d7 bzhi r10d,r15d,r9d +[ ]*[a-f0-9]+: c4 62 30 f5 11 bzhi r10d,DWORD PTR \[rcx\],r9d +[ ]*[a-f0-9]+: c4 e2 7a f7 f3 sarx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 42 32 f7 d7 sarx r10d,r15d,r9d +[ ]*[a-f0-9]+: c4 62 32 f7 11 sarx r10d,DWORD PTR \[rcx\],r9d +[ ]*[a-f0-9]+: c4 e2 79 f7 f3 shlx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 42 31 f7 d7 shlx r10d,r15d,r9d +[ ]*[a-f0-9]+: c4 62 31 f7 11 shlx r10d,DWORD PTR \[rcx\],r9d +[ ]*[a-f0-9]+: c4 e2 7b f7 f3 shrx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 42 33 f7 d7 shrx r10d,r15d,r9d +[ ]*[a-f0-9]+: c4 62 33 f7 11 shrx r10d,DWORD PTR \[rcx\],r9d +[ ]*[a-f0-9]+: c4 e3 fb f0 d8 07 rorx rbx,rax,0x7 +[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx rbx,QWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 43 fb f0 f9 07 rorx r15,r9,0x7 +[ ]*[a-f0-9]+: c4 63 fb f0 39 07 rorx r15,QWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e2 e3 f6 f0 mulx rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 e3 f6 31 mulx rsi,rbx,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 83 f6 d1 mulx r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 83 f6 11 mulx r10,r15,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 e3 f5 f0 pdep rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 e3 f5 31 pdep rsi,rbx,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 83 f5 d1 pdep r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 83 f5 11 pdep r10,r15,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 e2 f5 f0 pext rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 e2 f5 31 pext rsi,rbx,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 82 f5 d1 pext r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 82 f5 11 pext r10,r15,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 f8 f5 f3 bzhi rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 f8 f5 31 bzhi rsi,QWORD PTR \[rcx\],rax +[ ]*[a-f0-9]+: c4 42 b0 f5 d7 bzhi r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 b0 f5 11 bzhi r10,QWORD PTR \[rcx\],r9 +[ ]*[a-f0-9]+: c4 e2 fa f7 f3 sarx rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 fa f7 31 sarx rsi,QWORD PTR \[rcx\],rax +[ ]*[a-f0-9]+: c4 42 b2 f7 d7 sarx r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 b2 f7 11 sarx r10,QWORD PTR \[rcx\],r9 +[ ]*[a-f0-9]+: c4 e2 f9 f7 f3 shlx rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 f9 f7 31 shlx rsi,QWORD PTR \[rcx\],rax +[ ]*[a-f0-9]+: c4 42 b1 f7 d7 shlx r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 b1 f7 11 shlx r10,QWORD PTR \[rcx\],r9 +[ ]*[a-f0-9]+: c4 e2 fb f7 f3 shrx rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 fb f7 31 shrx rsi,QWORD PTR \[rcx\],rax +[ ]*[a-f0-9]+: c4 42 b3 f7 d7 shrx r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 b3 f7 11 shrx r10,QWORD PTR \[rcx\],r9 +[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx ebx,eax,0x7 +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 43 7b f0 d1 07 rorx r10d,r9d,0x7 +[ ]*[a-f0-9]+: c4 63 7b f0 11 07 rorx r10d,DWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx esi,ebx,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 2b f6 f9 mulx r15d,r10d,r9d +[ ]*[a-f0-9]+: c4 62 2b f6 39 mulx r15d,r10d,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx esi,ebx,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 63 f5 f0 pdep esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep esi,ebx,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 2b f5 f9 pdep r15d,r10d,r9d +[ ]*[a-f0-9]+: c4 62 2b f5 39 pdep r15d,r10d,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep esi,ebx,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 62 f5 f0 pext esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext esi,ebx,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 2a f5 f9 pext r15d,r10d,r9d +[ ]*[a-f0-9]+: c4 62 2a f5 39 pext r15d,r10d,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext esi,ebx,DWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 78 f5 f3 bzhi esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 42 30 f5 fa bzhi r15d,r10d,r9d +[ ]*[a-f0-9]+: c4 62 30 f5 39 bzhi r15d,DWORD PTR \[rcx\],r9d +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 e2 7a f7 f3 sarx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 42 32 f7 fa sarx r15d,r10d,r9d +[ ]*[a-f0-9]+: c4 62 32 f7 39 sarx r15d,DWORD PTR \[rcx\],r9d +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 e2 79 f7 f3 shlx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 42 31 f7 fa shlx r15d,r10d,r9d +[ ]*[a-f0-9]+: c4 62 31 f7 39 shlx r15d,DWORD PTR \[rcx\],r9d +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 e2 7b f7 f3 shrx esi,ebx,eax +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 42 33 f7 fa shrx r15d,r10d,r9d +[ ]*[a-f0-9]+: c4 62 33 f7 39 shrx r15d,DWORD PTR \[rcx\],r9d +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx esi,DWORD PTR \[rcx\],ebx +[ ]*[a-f0-9]+: c4 e3 fb f0 d8 07 rorx rbx,rax,0x7 +[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx rbx,QWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 43 fb f0 f9 07 rorx r15,r9,0x7 +[ ]*[a-f0-9]+: c4 63 fb f0 39 07 rorx r15,QWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx rbx,QWORD PTR \[rcx\],0x7 +[ ]*[a-f0-9]+: c4 e2 e3 f6 f0 mulx rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 e3 f6 31 mulx rsi,rbx,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 83 f6 d1 mulx r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 83 f6 11 mulx r10,r15,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 e3 f6 31 mulx rsi,rbx,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 e3 f5 f0 pdep rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 e3 f5 31 pdep rsi,rbx,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 83 f5 d1 pdep r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 83 f5 11 pdep r10,r15,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 e3 f5 31 pdep rsi,rbx,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 e2 f5 f0 pext rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 e2 f5 31 pext rsi,rbx,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 42 82 f5 d1 pext r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 82 f5 11 pext r10,r15,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 e2 f5 31 pext rsi,rbx,QWORD PTR \[rcx\] +[ ]*[a-f0-9]+: c4 e2 f8 f5 f3 bzhi rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 f8 f5 31 bzhi rsi,QWORD PTR \[rcx\],rax +[ ]*[a-f0-9]+: c4 42 b0 f5 d7 bzhi r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 b0 f5 11 bzhi r10,QWORD PTR \[rcx\],r9 +[ ]*[a-f0-9]+: c4 e2 f8 f5 31 bzhi rsi,QWORD PTR \[rcx\],rax +[ ]*[a-f0-9]+: c4 e2 fa f7 f3 sarx rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 fa f7 31 sarx rsi,QWORD PTR \[rcx\],rax +[ ]*[a-f0-9]+: c4 42 b2 f7 d7 sarx r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 b2 f7 11 sarx r10,QWORD PTR \[rcx\],r9 +[ ]*[a-f0-9]+: c4 e2 fa f7 31 sarx rsi,QWORD PTR \[rcx\],rax +[ ]*[a-f0-9]+: c4 e2 f9 f7 f3 shlx rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 f9 f7 31 shlx rsi,QWORD PTR \[rcx\],rax +[ ]*[a-f0-9]+: c4 42 b1 f7 d7 shlx r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 b1 f7 11 shlx r10,QWORD PTR \[rcx\],r9 +[ ]*[a-f0-9]+: c4 e2 f9 f7 31 shlx rsi,QWORD PTR \[rcx\],rax +[ ]*[a-f0-9]+: c4 e2 fb f7 f3 shrx rsi,rbx,rax +[ ]*[a-f0-9]+: c4 e2 fb f7 31 shrx rsi,QWORD PTR \[rcx\],rax +[ ]*[a-f0-9]+: c4 42 b3 f7 d7 shrx r10,r15,r9 +[ ]*[a-f0-9]+: c4 62 b3 f7 11 shrx r10,QWORD PTR \[rcx\],r9 +[ ]*[a-f0-9]+: c4 e2 fb f7 31 shrx rsi,QWORD PTR \[rcx\],rax +#pass diff --git a/gas/testsuite/gas/i386/x86-64-bmi2.d b/gas/testsuite/gas/i386/x86-64-bmi2.d new file mode 100644 index 0000000..0bcdb28 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-bmi2.d @@ -0,0 +1,155 @@ +#as: +#objdump: -dw +#name: x86-64 BMI2 insns + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx \$0x7,%eax,%ebx +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%rcx\),%ebx +[ ]*[a-f0-9]+: c4 43 7b f0 f9 07 rorx \$0x7,%r9d,%r15d +[ ]*[a-f0-9]+: c4 63 7b f0 39 07 rorx \$0x7,\(%rcx\),%r15d +[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx \(%rcx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 42 03 f6 d1 mulx %r9d,%r15d,%r10d +[ ]*[a-f0-9]+: c4 62 03 f6 11 mulx \(%rcx\),%r15d,%r10d +[ ]*[a-f0-9]+: c4 e2 63 f5 f0 pdep %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep \(%rcx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 42 03 f5 d1 pdep %r9d,%r15d,%r10d +[ ]*[a-f0-9]+: c4 62 03 f5 11 pdep \(%rcx\),%r15d,%r10d +[ ]*[a-f0-9]+: c4 e2 62 f5 f0 pext %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext \(%rcx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 42 02 f5 d1 pext %r9d,%r15d,%r10d +[ ]*[a-f0-9]+: c4 62 02 f5 11 pext \(%rcx\),%r15d,%r10d +[ ]*[a-f0-9]+: c4 e2 78 f5 f3 bzhi %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 42 30 f5 d7 bzhi %r9d,%r15d,%r10d +[ ]*[a-f0-9]+: c4 62 30 f5 11 bzhi %r9d,\(%rcx\),%r10d +[ ]*[a-f0-9]+: c4 e2 7a f7 f3 sarx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 42 32 f7 d7 sarx %r9d,%r15d,%r10d +[ ]*[a-f0-9]+: c4 62 32 f7 11 sarx %r9d,\(%rcx\),%r10d +[ ]*[a-f0-9]+: c4 e2 79 f7 f3 shlx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 42 31 f7 d7 shlx %r9d,%r15d,%r10d +[ ]*[a-f0-9]+: c4 62 31 f7 11 shlx %r9d,\(%rcx\),%r10d +[ ]*[a-f0-9]+: c4 e2 7b f7 f3 shrx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 42 33 f7 d7 shrx %r9d,%r15d,%r10d +[ ]*[a-f0-9]+: c4 62 33 f7 11 shrx %r9d,\(%rcx\),%r10d +[ ]*[a-f0-9]+: c4 e3 fb f0 d8 07 rorx \$0x7,%rax,%rbx +[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx \$0x7,\(%rcx\),%rbx +[ ]*[a-f0-9]+: c4 43 fb f0 f9 07 rorx \$0x7,%r9,%r15 +[ ]*[a-f0-9]+: c4 63 fb f0 39 07 rorx \$0x7,\(%rcx\),%r15 +[ ]*[a-f0-9]+: c4 e2 e3 f6 f0 mulx %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 e3 f6 31 mulx \(%rcx\),%rbx,%rsi +[ ]*[a-f0-9]+: c4 42 83 f6 d1 mulx %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 83 f6 11 mulx \(%rcx\),%r15,%r10 +[ ]*[a-f0-9]+: c4 e2 e3 f5 f0 pdep %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 e3 f5 31 pdep \(%rcx\),%rbx,%rsi +[ ]*[a-f0-9]+: c4 42 83 f5 d1 pdep %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 83 f5 11 pdep \(%rcx\),%r15,%r10 +[ ]*[a-f0-9]+: c4 e2 e2 f5 f0 pext %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 e2 f5 31 pext \(%rcx\),%rbx,%rsi +[ ]*[a-f0-9]+: c4 42 82 f5 d1 pext %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 82 f5 11 pext \(%rcx\),%r15,%r10 +[ ]*[a-f0-9]+: c4 e2 f8 f5 f3 bzhi %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 f8 f5 31 bzhi %rax,\(%rcx\),%rsi +[ ]*[a-f0-9]+: c4 42 b0 f5 d7 bzhi %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 b0 f5 11 bzhi %r9,\(%rcx\),%r10 +[ ]*[a-f0-9]+: c4 e2 fa f7 f3 sarx %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 fa f7 31 sarx %rax,\(%rcx\),%rsi +[ ]*[a-f0-9]+: c4 42 b2 f7 d7 sarx %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 b2 f7 11 sarx %r9,\(%rcx\),%r10 +[ ]*[a-f0-9]+: c4 e2 f9 f7 f3 shlx %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 f9 f7 31 shlx %rax,\(%rcx\),%rsi +[ ]*[a-f0-9]+: c4 42 b1 f7 d7 shlx %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 b1 f7 11 shlx %r9,\(%rcx\),%r10 +[ ]*[a-f0-9]+: c4 e2 fb f7 f3 shrx %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 fb f7 31 shrx %rax,\(%rcx\),%rsi +[ ]*[a-f0-9]+: c4 42 b3 f7 d7 shrx %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 b3 f7 11 shrx %r9,\(%rcx\),%r10 +[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx \$0x7,%eax,%ebx +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%rcx\),%ebx +[ ]*[a-f0-9]+: c4 43 7b f0 d1 07 rorx \$0x7,%r9d,%r10d +[ ]*[a-f0-9]+: c4 63 7b f0 11 07 rorx \$0x7,\(%rcx\),%r10d +[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%rcx\),%ebx +[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx \(%rcx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 42 2b f6 f9 mulx %r9d,%r10d,%r15d +[ ]*[a-f0-9]+: c4 62 2b f6 39 mulx \(%rcx\),%r10d,%r15d +[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx \(%rcx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f5 f0 pdep %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep \(%rcx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 42 2b f5 f9 pdep %r9d,%r10d,%r15d +[ ]*[a-f0-9]+: c4 62 2b f5 39 pdep \(%rcx\),%r10d,%r15d +[ ]*[a-f0-9]+: c4 e2 63 f5 31 pdep \(%rcx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f5 f0 pext %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext \(%rcx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 42 2a f5 f9 pext %r9d,%r10d,%r15d +[ ]*[a-f0-9]+: c4 62 2a f5 39 pext \(%rcx\),%r10d,%r15d +[ ]*[a-f0-9]+: c4 e2 62 f5 31 pext \(%rcx\),%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 78 f5 f3 bzhi %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 42 30 f5 fa bzhi %r9d,%r10d,%r15d +[ ]*[a-f0-9]+: c4 62 30 f5 39 bzhi %r9d,\(%rcx\),%r15d +[ ]*[a-f0-9]+: c4 e2 60 f5 31 bzhi %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 e2 7a f7 f3 sarx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 42 32 f7 fa sarx %r9d,%r10d,%r15d +[ ]*[a-f0-9]+: c4 62 32 f7 39 sarx %r9d,\(%rcx\),%r15d +[ ]*[a-f0-9]+: c4 e2 62 f7 31 sarx %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 e2 79 f7 f3 shlx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 42 31 f7 fa shlx %r9d,%r10d,%r15d +[ ]*[a-f0-9]+: c4 62 31 f7 39 shlx %r9d,\(%rcx\),%r15d +[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 e2 7b f7 f3 shrx %eax,%ebx,%esi +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 42 33 f7 fa shrx %r9d,%r10d,%r15d +[ ]*[a-f0-9]+: c4 62 33 f7 39 shrx %r9d,\(%rcx\),%r15d +[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx %ebx,\(%rcx\),%esi +[ ]*[a-f0-9]+: c4 e3 fb f0 d8 07 rorx \$0x7,%rax,%rbx +[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx \$0x7,\(%rcx\),%rbx +[ ]*[a-f0-9]+: c4 43 fb f0 f9 07 rorx \$0x7,%r9,%r15 +[ ]*[a-f0-9]+: c4 63 fb f0 39 07 rorx \$0x7,\(%rcx\),%r15 +[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx \$0x7,\(%rcx\),%rbx +[ ]*[a-f0-9]+: c4 e2 e3 f6 f0 mulx %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 e3 f6 31 mulx \(%rcx\),%rbx,%rsi +[ ]*[a-f0-9]+: c4 42 83 f6 d1 mulx %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 83 f6 11 mulx \(%rcx\),%r15,%r10 +[ ]*[a-f0-9]+: c4 e2 e3 f6 31 mulx \(%rcx\),%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 e3 f5 f0 pdep %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 e3 f5 31 pdep \(%rcx\),%rbx,%rsi +[ ]*[a-f0-9]+: c4 42 83 f5 d1 pdep %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 83 f5 11 pdep \(%rcx\),%r15,%r10 +[ ]*[a-f0-9]+: c4 e2 e3 f5 31 pdep \(%rcx\),%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 e2 f5 f0 pext %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 e2 f5 31 pext \(%rcx\),%rbx,%rsi +[ ]*[a-f0-9]+: c4 42 82 f5 d1 pext %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 82 f5 11 pext \(%rcx\),%r15,%r10 +[ ]*[a-f0-9]+: c4 e2 e2 f5 31 pext \(%rcx\),%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 f8 f5 f3 bzhi %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 f8 f5 31 bzhi %rax,\(%rcx\),%rsi +[ ]*[a-f0-9]+: c4 42 b0 f5 d7 bzhi %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 b0 f5 11 bzhi %r9,\(%rcx\),%r10 +[ ]*[a-f0-9]+: c4 e2 f8 f5 31 bzhi %rax,\(%rcx\),%rsi +[ ]*[a-f0-9]+: c4 e2 fa f7 f3 sarx %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 fa f7 31 sarx %rax,\(%rcx\),%rsi +[ ]*[a-f0-9]+: c4 42 b2 f7 d7 sarx %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 b2 f7 11 sarx %r9,\(%rcx\),%r10 +[ ]*[a-f0-9]+: c4 e2 fa f7 31 sarx %rax,\(%rcx\),%rsi +[ ]*[a-f0-9]+: c4 e2 f9 f7 f3 shlx %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 f9 f7 31 shlx %rax,\(%rcx\),%rsi +[ ]*[a-f0-9]+: c4 42 b1 f7 d7 shlx %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 b1 f7 11 shlx %r9,\(%rcx\),%r10 +[ ]*[a-f0-9]+: c4 e2 f9 f7 31 shlx %rax,\(%rcx\),%rsi +[ ]*[a-f0-9]+: c4 e2 fb f7 f3 shrx %rax,%rbx,%rsi +[ ]*[a-f0-9]+: c4 e2 fb f7 31 shrx %rax,\(%rcx\),%rsi +[ ]*[a-f0-9]+: c4 42 b3 f7 d7 shrx %r9,%r15,%r10 +[ ]*[a-f0-9]+: c4 62 b3 f7 11 shrx %r9,\(%rcx\),%r10 +[ ]*[a-f0-9]+: c4 e2 fb f7 31 shrx %rax,\(%rcx\),%rsi +#pass diff --git a/gas/testsuite/gas/i386/x86-64-bmi2.s b/gas/testsuite/gas/i386/x86-64-bmi2.s new file mode 100644 index 0000000..677421f --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-bmi2.s @@ -0,0 +1,175 @@ +# Check 64bit BMI2 instructions + + .allow_index_reg + .text +_start: + +# Test for op r32, r/m32, imm8 + rorx $7,%eax,%ebx + rorx $7,(%rcx),%ebx + rorx $7,%r9d,%r15d + rorx $7,(%rcx),%r15d + +# Test for op r32, r32, r/m32 + mulx %eax,%ebx,%esi + mulx (%rcx),%ebx,%esi + mulx %r9d,%r15d,%r10d + mulx (%rcx),%r15d,%r10d + pdep %eax,%ebx,%esi + pdep (%rcx),%ebx,%esi + pdep %r9d,%r15d,%r10d + pdep (%rcx),%r15d,%r10d + pext %eax,%ebx,%esi + pext (%rcx),%ebx,%esi + pext %r9d,%r15d,%r10d + pext (%rcx),%r15d,%r10d + +# Test for op r32, r/m32, r32 + bzhi %eax,%ebx,%esi + bzhi %ebx,(%rcx),%esi + bzhi %r9d,%r15d,%r10d + bzhi %r9d,(%rcx),%r10d + sarx %eax,%ebx,%esi + sarx %ebx,(%rcx),%esi + sarx %r9d,%r15d,%r10d + sarx %r9d,(%rcx),%r10d + shlx %eax,%ebx,%esi + shlx %ebx,(%rcx),%esi + shlx %r9d,%r15d,%r10d + shlx %r9d,(%rcx),%r10d + shrx %eax,%ebx,%esi + shrx %ebx,(%rcx),%esi + shrx %r9d,%r15d,%r10d + shrx %r9d,(%rcx),%r10d + +# Test for op r64, r/m64, imm8 + rorx $7,%rax,%rbx + rorx $7,(%rcx),%rbx + rorx $7,%r9,%r15 + rorx $7,(%rcx),%r15 + +# Test for op r64, r64, r/m64 + mulx %rax,%rbx,%rsi + mulx (%rcx),%rbx,%rsi + mulx %r9,%r15,%r10 + mulx (%rcx),%r15,%r10 + pdep %rax,%rbx,%rsi + pdep (%rcx),%rbx,%rsi + pdep %r9,%r15,%r10 + pdep (%rcx),%r15,%r10 + pext %rax,%rbx,%rsi + pext (%rcx),%rbx,%rsi + pext %r9,%r15,%r10 + pext (%rcx),%r15,%r10 + +# Test for op r64, r/m64, r64 + bzhi %rax,%rbx,%rsi + bzhi %rax,(%rcx),%rsi + bzhi %r9,%r15,%r10 + bzhi %r9,(%rcx),%r10 + sarx %rax,%rbx,%rsi + sarx %rax,(%rcx),%rsi + sarx %r9,%r15,%r10 + sarx %r9,(%rcx),%r10 + shlx %rax,%rbx,%rsi + shlx %rax,(%rcx),%rsi + shlx %r9,%r15,%r10 + shlx %r9,(%rcx),%r10 + shrx %rax,%rbx,%rsi + shrx %rax,(%rcx),%rsi + shrx %r9,%r15,%r10 + shrx %r9,(%rcx),%r10 + + .intel_syntax noprefix + +# Test for op r32, r/m32, imm8 + rorx ebx,eax,7 + rorx ebx,DWORD PTR [rcx],7 + rorx r10d,r9d,7 + rorx r10d,DWORD PTR [rcx],7 + rorx ebx,[rcx],7 + +# Test for op r32, r32, r/m32 + mulx esi,ebx,eax + mulx esi,ebx,DWORD PTR [rcx] + mulx r15d,r10d,r9d + mulx r15d,r10d,DWORD PTR [rcx] + mulx esi,ebx,[rcx] + pdep esi,ebx,eax + pdep esi,ebx,DWORD PTR [rcx] + pdep r15d,r10d,r9d + pdep r15d,r10d,DWORD PTR [rcx] + pdep esi,ebx,[rcx] + pext esi,ebx,eax + pext esi,ebx,DWORD PTR [rcx] + pext r15d,r10d,r9d + pext r15d,r10d,DWORD PTR [rcx] + pext esi,ebx,[rcx] + +# Test for op r32, r/m32, r32 + bzhi esi,ebx,eax + bzhi esi,DWORD PTR [rcx],ebx + bzhi r15d,r10d,r9d + bzhi r15d,DWORD PTR [rcx],r9d + bzhi esi,[rcx],ebx + sarx esi,ebx,eax + sarx esi,DWORD PTR [rcx],ebx + sarx r15d,r10d,r9d + sarx r15d,DWORD PTR [rcx],r9d + sarx esi,[rcx],ebx + shlx esi,ebx,eax + shlx esi,DWORD PTR [rcx],ebx + shlx r15d,r10d,r9d + shlx r15d,DWORD PTR [rcx],r9d + shlx esi,[rcx],ebx + shrx esi,ebx,eax + shrx esi,DWORD PTR [rcx],ebx + shrx r15d,r10d,r9d + shrx r15d,DWORD PTR [rcx],r9d + shrx esi,[rcx],ebx + +# Test for op r64, r/m64, imm8 + rorx rbx,rax,7 + rorx rbx,QWORD PTR [rcx],7 + rorx r15,r9,7 + rorx r15,QWORD PTR [rcx],7 + rorx rbx,[rcx],7 + +# Test for op r64, r64, r/m64 + mulx rsi,rbx,rax + mulx rsi,rbx,QWORD PTR [rcx] + mulx r10,r15,r9 + mulx r10,r15,QWORD PTR [rcx] + mulx rsi,rbx,[rcx] + pdep rsi,rbx,rax + pdep rsi,rbx,QWORD PTR [rcx] + pdep r10,r15,r9 + pdep r10,r15,QWORD PTR [rcx] + pdep rsi,rbx,[rcx] + pext rsi,rbx,rax + pext rsi,rbx,QWORD PTR [rcx] + pext r10,r15,r9 + pext r10,r15,QWORD PTR [rcx] + pext rsi,rbx,[rcx] + +# Test for op r64, r/m64, r64 + bzhi rsi,rbx,rax + bzhi rsi,QWORD PTR [rcx],rax + bzhi r10,r15,r9 + bzhi r10,QWORD PTR [rcx],r9 + bzhi rsi,[rcx],rax + sarx rsi,rbx,rax + sarx rsi,QWORD PTR [rcx],rax + sarx r10,r15,r9 + sarx r10,QWORD PTR [rcx],r9 + sarx rsi,[rcx],rax + shlx rsi,rbx,rax + shlx rsi,QWORD PTR [rcx],rax + shlx r10,r15,r9 + shlx r10,QWORD PTR [rcx],r9 + shlx rsi,[rcx],rax + shrx rsi,rbx,rax + shrx rsi,QWORD PTR [rcx],rax + shrx r10,r15,r9 + shrx r10,QWORD PTR [rcx],r9 + shrx rsi,[rcx],rax diff --git a/gas/testsuite/gas/i386/x86-64-branch.d b/gas/testsuite/gas/i386/x86-64-branch.d index cc3d3a9..fee2099 100644 --- a/gas/testsuite/gas/i386/x86-64-branch.d +++ b/gas/testsuite/gas/i386/x86-64-branch.d @@ -1,5 +1,5 @@ #as: -J -#objdump: -drw +#objdump: -dw #name: x86-64 indirect branch .*: +file format .* @@ -17,6 +17,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\) +[ ]*[a-f0-9]+: e8 (00|5b) 00 (00|10) 00 callq (0x1f|10007a <.text\+0x10007a>) +[ ]*[a-f0-9]+: e9 (00|60) 00 (00|10) 00 jmpq (0x24|100084 <.text\+0x100084>) [ ]*[a-f0-9]+: ff d0 callq \*%rax [ ]*[a-f0-9]+: ff d0 callq \*%rax [ ]*[a-f0-9]+: 66 ff d0 callw \*%ax @@ -27,4 +29,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\) +[ ]*[a-f0-9]+: e8 (00|7f) 00 (00|10) 00 callq (0x43|1000c2 <.text\+0x1000c2>) +[ ]*[a-f0-9]+: e9 (00|84) 00 (00|10) 00 jmpq (0x48|1000cc <.text\+0x1000cc>) #pass diff --git a/gas/testsuite/gas/i386/x86-64-branch.s b/gas/testsuite/gas/i386/x86-64-branch.s index 10fdd81..4c1861f 100644 --- a/gas/testsuite/gas/i386/x86-64-branch.s +++ b/gas/testsuite/gas/i386/x86-64-branch.s @@ -9,6 +9,8 @@ jmp *%ax jmpw *%ax jmpw *(%rax) + call 0x100040 + jmp 0x100040 .intel_syntax noprefix call rax @@ -21,3 +23,5 @@ jmp ax jmpw ax jmpw [rax] + call 0x100040 + jmp 0x100040 diff --git a/gas/testsuite/gas/i386/x86-64-inval-invpcid.l b/gas/testsuite/gas/i386/x86-64-inval-invpcid.l new file mode 100644 index 0000000..936ec35 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-inval-invpcid.l @@ -0,0 +1,25 @@ +.*: Assembler messages: +.*:4: Error: .* +.*:5: Error: .* +.*:6: Error: .* +.*:7: Error: .* +.*:10: Error: .* +.*:11: Error: .* +.*:12: Error: .* +.*:13: Error: .* +GAS LISTING .* + + +[ ]*1[ ]+\# Check illegal 64bit INVPCID instructions +[ ]*2[ ]+\.text +[ ]*3[ ]+_start: +[ ]*4[ ]+invvpid \(%rcx\), %bx +[ ]*5[ ]+invvpid \(%rcx\), %ebx +[ ]*6[ ]+invvpid %rbx, \(%rcx\) +[ ]*7[ ]+invvpid %rbx, %rcx +[ ]*8[ ]+ +[ ]*9[ ]+\.intel_syntax noprefix +[ ]*10[ ]+invvpid bx, \[rcx\] +[ ]*11[ ]+invvpid ebx, \[rcx\] +[ ]*12[ ]+invvpid \[rcx\], rbx +[ ]*13[ ]+invvpid rcx, rbx diff --git a/gas/testsuite/gas/i386/x86-64-inval-invpcid.s b/gas/testsuite/gas/i386/x86-64-inval-invpcid.s new file mode 100644 index 0000000..013270c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-inval-invpcid.s @@ -0,0 +1,13 @@ +# Check illegal 64bit INVPCID instructions + .text +_start: + invvpid (%rcx), %bx + invvpid (%rcx), %ebx + invvpid %rbx, (%rcx) + invvpid %rbx, %rcx + + .intel_syntax noprefix + invvpid bx, [rcx] + invvpid ebx, [rcx] + invvpid [rcx], rbx + invvpid rcx, rbx diff --git a/gas/testsuite/gas/i386/x86-64-invpcid-intel.d b/gas/testsuite/gas/i386/x86-64-invpcid-intel.d new file mode 100644 index 0000000..35dc9e9 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-invpcid-intel.d @@ -0,0 +1,14 @@ +#as: +#objdump: -dwMintel +#name: x86-64 INVPCID insns (Intel disassembly) +#source: x86-64-invpcid.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ : +[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid rdx,\[rax\] +[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid rdx,\[rax\] +#pass diff --git a/gas/testsuite/gas/i386/x86-64-invpcid.d b/gas/testsuite/gas/i386/x86-64-invpcid.d new file mode 100644 index 0000000..af0fc4a --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-invpcid.d @@ -0,0 +1,13 @@ +#as: +#objdump: -dw +#name: x86-64 INVPCID insns + +.*: +file format .* + + +Disassembly of section .text: + +0+ : +[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid \(%rax\),%rdx +[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid \(%rax\),%rdx +#pass diff --git a/gas/testsuite/gas/i386/x86-64-invpcid.s b/gas/testsuite/gas/i386/x86-64-invpcid.s new file mode 100644 index 0000000..89dd211 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-invpcid.s @@ -0,0 +1,8 @@ +# Check 64bit INVPCID instruction + + .text +foo: + invpcid (%rax), %rdx + + .intel_syntax noprefix + invpcid rdx,[rax] diff --git a/gas/testsuite/gas/i386/x86-64-nops-1-bdver2.d b/gas/testsuite/gas/i386/x86-64-nops-1-bdver2.d new file mode 100644 index 0000000..99c3213 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-nops-1-bdver2.d @@ -0,0 +1,162 @@ +#as: -mtune=bdver2 +#source: nops-1.s +#objdump: -drw +#name: x86-64 -mtune=bdver2 nops 1 + +.*: +file format .* + + +Disassembly of section .text: + +0+ : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\) +[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\) + +0+10 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\) +[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\) + +0+20 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\) +[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\) + +0+30 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\) +[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\) + +0+40 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) +[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\) + +0+50 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\) + +0+60 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%rax,%rax,1\) + +0+70 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\) + +0+80 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\) + +0+90 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\) + +0+a0 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) + +0+b0 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\) + +0+c0 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\) + +0+d0 : +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 90 nop +[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax +#pass diff --git a/gas/testsuite/gas/ia64/ia64.exp b/gas/testsuite/gas/ia64/ia64.exp index 221b8d4..669a112 100644 --- a/gas/testsuite/gas/ia64/ia64.exp +++ b/gas/testsuite/gas/ia64/ia64.exp @@ -94,4 +94,7 @@ if [istarget "ia64-*"] then { run_dump_test "slotcount" } + if { [istarget "ia64-*-elf*"] || [istarget "ia64-*-linux*"] } { + run_dump_test "pr13167" + } } diff --git a/gas/testsuite/gas/ia64/pr13167.d b/gas/testsuite/gas/ia64/pr13167.d new file mode 100644 index 0000000..d75c7e9 --- /dev/null +++ b/gas/testsuite/gas/ia64/pr13167.d @@ -0,0 +1,43 @@ +#readelf: -wl + +Raw dump of debug contents of section \.debug_line: + + Offset: 0x0 + Length: 51 + DWARF Version: 2 + Prologue Length: 26 + Minimum Instruction Length: 1 + Initial value of 'is_stmt': 1 + Line Base: -5 + Line Range: 14 + Opcode Base: 13 + + Opcodes: + Opcode 1 has 0 args + Opcode 2 has 1 args + Opcode 3 has 1 args + Opcode 4 has 1 args + Opcode 5 has 1 args + Opcode 6 has 0 args + Opcode 7 has 0 args + Opcode 8 has 0 args + Opcode 9 has 1 args + Opcode 10 has 0 args + Opcode 11 has 0 args + Opcode 12 has 1 args + + The Directory Table is empty\. + + The File Name Table: + Entry Dir Time Size Name + 1 0 0 0 x\.c + + Line Number Statements: + Extended opcode 2: set Address to 0x1 + Special opcode 8: advance Address by 0 to 0x1 and Line by 3 to 4 + Special opcode 216: advance Address by 15 to 0x10 and Line by 1 to 5 + Special opcode 228: advance Address by 16 to 0x20 and Line by -1 to 4 + Advance PC by 16 to 0x30 + Extended opcode 1: End of Sequence + + diff --git a/gas/testsuite/gas/ia64/pr13167.s b/gas/testsuite/gas/ia64/pr13167.s new file mode 100644 index 0000000..920f11f --- /dev/null +++ b/gas/testsuite/gas/ia64/pr13167.s @@ -0,0 +1,9 @@ + .file 1 "x.c" + mov r1 = r35 + .loc 1 4 0 + nop 0 + mov r36 = r8 + br.call.sptk.many b0 = _U_Qfcnvff_quad_to_sgl# + .loc 1 5 0 + .loc 1 4 0 + mov r1 = r35 diff --git a/gas/testsuite/gas/m68k/all.exp b/gas/testsuite/gas/m68k/all.exp index b3db085..bf06d4e 100644 --- a/gas/testsuite/gas/m68k/all.exp +++ b/gas/testsuite/gas/m68k/all.exp @@ -51,6 +51,7 @@ if { [istarget m68*-*-*] || [istarget fido*-*-*] } then { run_dump_test mcf-mov3q run_dump_test mcf-movsr run_dump_test mode5 + run_dump_test mode5 "{name {cf}} {as {-mcpu=5200}}" run_dump_test mcf-mac run_dump_test mcf-emac run_dump_test mcf-coproc diff --git a/gas/testsuite/gas/m68k/mode5.d b/gas/testsuite/gas/m68k/mode5.d index b51346b..2de2c6a 100644 --- a/gas/testsuite/gas/m68k/mode5.d +++ b/gas/testsuite/gas/m68k/mode5.d @@ -10,4 +10,6 @@ Disassembly of section .text: 0: 2213 movel %a3@,%d1 2: 2882 movel %d2,%a4@ 4: 2295 movel %a5@,%a1@ + 6: 4cd6 00ff moveml %fp@,%d0-%d7 + a: 48d6 00ff moveml %d0-%d7,%fp@ ... diff --git a/gas/testsuite/gas/m68k/mode5.s b/gas/testsuite/gas/m68k/mode5.s index 27c95d9..6a08f1b 100644 --- a/gas/testsuite/gas/m68k/mode5.s +++ b/gas/testsuite/gas/m68k/mode5.s @@ -4,4 +4,6 @@ move.l 0(%a3),%d1 move.l %d2,0(%a4) move.l 0(%a5),0(%a1) + movem.l 0(%a6),%d0-%d7 + movem.l %d0-%d7,0(%a6) .p2align 4 diff --git a/gas/testsuite/gas/mips/24k-branch-delay-1.d b/gas/testsuite/gas/mips/24k-branch-delay-1.d index d6c86b3..509f087 100644 --- a/gas/testsuite/gas/mips/24k-branch-delay-1.d +++ b/gas/testsuite/gas/mips/24k-branch-delay-1.d @@ -1,18 +1,19 @@ #objdump: -dr -#as: -mfix-24k +#as: -mfix-24k -32 #name: 24K: Delay slot filling .*: +file format .*mips.* Disassembly of section .text: -00000000 : +0+ <.*>: 0: 24620005 addiu v0,v1,5 4: 8c440000 lw a0,0\(v0\) 8: ac430000 sw v1,0\(v0\) c: ac430008 sw v1,8\(v0\) 10: 00000000 nop - 14: 10600002 beqz v1,20 - 18: ac430010 sw v1,16\(v0\) - 1c: 8c430008 lw v1,8\(v0\) - 20: 8c450010 lw a1,16\(v0\) + 14: ac430010 sw v1,16\(v0\) + 18: 10600002 beqz v1,24 <.*> + 1c: 00000000 nop + 20: 8c430008 lw v1,8\(v0\) + 24: 8c450010 lw a1,16\(v0\) ... diff --git a/gas/testsuite/gas/mips/24k-triple-stores-1.d b/gas/testsuite/gas/mips/24k-triple-stores-1.d index d97c688..0898bcf 100644 --- a/gas/testsuite/gas/mips/24k-triple-stores-1.d +++ b/gas/testsuite/gas/mips/24k-triple-stores-1.d @@ -1,17 +1,17 @@ #objdump: -dr -#as: -mfix-24k +#as: -mfix-24k -32 #name: 24K: Triple Store (Opcode Check) .*: +file format .*mips.* Disassembly of section .text: -00000000 <.text>: +0+ <.*>: 0: a3a20000 sb v0,0\(sp\) - 4: 00000000 nop - 8: a3a30008 sb v1,8\(sp\) + 4: a3a30008 sb v1,8\(sp\) + 8: 00000000 nop c: a3a40010 sb a0,16\(sp\) - 10: 00000000 nop - 14: a3a50018 sb a1,24\(sp\) + 10: a3a50018 sb a1,24\(sp\) + 14: 00000000 nop 18: a3a60020 sb a2,32\(sp\) 1c: a7a20000 sh v0,0\(sp\) 20: a7a30008 sh v1,8\(sp\) diff --git a/gas/testsuite/gas/mips/24k-triple-stores-10.d b/gas/testsuite/gas/mips/24k-triple-stores-10.d index a17c355..fd0024c 100644 --- a/gas/testsuite/gas/mips/24k-triple-stores-10.d +++ b/gas/testsuite/gas/mips/24k-triple-stores-10.d @@ -1,12 +1,14 @@ -#objdump: -dr -#as: -mfix-24k +#objdump: -dr -z +#as: -mfix-24k -32 #name: 24K: Triple Store (Intervening data #2) .*: +file format .*mips.* Disassembly of section .text: -00000000 <.text>: +0+ <.*>: 0: a1020000 sb v0,0\(t0\) - 4: 00000000 nop - 8: a1030008 sb v1,8\(t0\) + 4: a1030008 sb v1,8\(t0\) + 8: 00000000 nop c: a1040010 sb a0,16\(t0\) + 10: 00000000 nop +#pass diff --git a/gas/testsuite/gas/mips/24k-triple-stores-11.d b/gas/testsuite/gas/mips/24k-triple-stores-11.d index cd2d327..f92913a 100644 --- a/gas/testsuite/gas/mips/24k-triple-stores-11.d +++ b/gas/testsuite/gas/mips/24k-triple-stores-11.d @@ -1,11 +1,11 @@ -#objdump: -d -#as: -mfix-24k +#objdump: -dz +#as: -mfix-24k -32 #name: 24K: Triple Store (gprel relocs) .*: +file format .*mips.* Disassembly of section .text: -00000000 <.text>: +0+ <.*>: 0: 00842020 add a0,a0,a0 4: 00842020 add a0,a0,a0 8: 00842020 add a0,a0,a0 @@ -14,4 +14,5 @@ Disassembly of section .text: 14: af830000 sw v1,0\(gp\) 18: 00000000 nop 1c: af840000 sw a0,0\(gp\) - + 20: 00000000 nop +#pass diff --git a/gas/testsuite/gas/mips/24k-triple-stores-2.d b/gas/testsuite/gas/mips/24k-triple-stores-2.d index 1ab9217..bcb2ff1 100644 --- a/gas/testsuite/gas/mips/24k-triple-stores-2.d +++ b/gas/testsuite/gas/mips/24k-triple-stores-2.d @@ -1,14 +1,14 @@ #objdump: -dr -#as: -mfix-24k +#as: -mfix-24k -32 #name: 24K: Triple Store (Range Check) .*: +file format .*mips.* Disassembly of section .text: -00000000 <.text>: +0+ <.*>: 0: a3a20000 sb v0,0\(sp\) - 4: 00000000 nop - 8: a3a3000a sb v1,10\(sp\) + 4: a3a3000a sb v1,10\(sp\) + 8: 00000000 nop c: a3a4001f sb a0,31\(sp\) 10: 0000000d break 14: a7a20000 sh v0,0\(sp\) diff --git a/gas/testsuite/gas/mips/24k-triple-stores-3.d b/gas/testsuite/gas/mips/24k-triple-stores-3.d index f6bf5ce..5e0025c 100644 --- a/gas/testsuite/gas/mips/24k-triple-stores-3.d +++ b/gas/testsuite/gas/mips/24k-triple-stores-3.d @@ -1,87 +1,86 @@ #objdump: -dr -#as: -mfix-24k +#as: -mfix-24k -32 #name: 24K: Triple Store (Double-word Check) .*: +file format .*mips.* Disassembly of section .text: -00000000 <.text>: +0+ <.*>: 0: a3a2000b sb v0,11\(sp\) - 4: 00000000 nop - 8: a3a3000b sb v1,11\(sp\) - c: a3a40004 sb a0,4\(sp\) - 10: 0000000d break - 14: a3a20000 sb v0,0\(sp\) - 18: a3a3000b sb v1,11\(sp\) - 1c: a3a40005 sb a0,5\(sp\) - 20: 0000000d break - 24: a3a20007 sb v0,7\(sp\) - 28: a3a3000b sb v1,11\(sp\) - 2c: 00000000 nop - 30: a3a40010 sb a0,16\(sp\) - 34: 0000000d break - 38: a1020000 sb v0,0\(t0\) - 3c: a1030008 sb v1,8\(t0\) - 40: 00000000 nop - 44: a1040009 sb a0,9\(t0\) - 48: 0000000d break - 4c: a7a20000 sh v0,0\(sp\) - 50: a7a3ffe1 sh v1,-31\(sp\) - 54: a7a4ffe2 sh a0,-30\(sp\) - 58: 0000000d break - 5c: a7a20006 sh v0,6\(sp\) - 60: a7a30008 sh v1,8\(sp\) - 64: 00000000 nop - 68: a7a40010 sh a0,16\(sp\) - 6c: 0000000d break - 70: a5020001 sh v0,1\(t0\) - 74: a5030003 sh v1,3\(t0\) - 78: 00000000 nop - 7c: a504000b sh a0,11\(t0\) - 80: 0000000d break - 84: afa20008 sw v0,8\(sp\) - 88: afa3fff8 sw v1,-8\(sp\) - 8c: afa40008 sw a0,8\(sp\) - 90: 0000000d break - 94: afa20004 sw v0,4\(sp\) - 98: afa30008 sw v1,8\(sp\) - 9c: 00000000 nop - a0: afa40010 sw a0,16\(sp\) - a4: 0000000d break - a8: ad020003 sw v0,3\(t0\) - ac: ad030007 sw v1,7\(t0\) - b0: 00000000 nop - b4: ad04000f sw a0,15\(t0\) - b8: 0000000d break - bc: aba20004 swl v0,4\(sp\) - c0: aba3000a swl v1,10\(sp\) - c4: 00000000 nop - c8: aba40011 swl a0,17\(sp\) - cc: 0000000d break - d0: aba20007 swl v0,7\(sp\) - d4: aba3000c swl v1,12\(sp\) - d8: 00000000 nop - dc: aba40010 swl a0,16\(sp\) - e0: 0000000d break - e4: aba20000 swl v0,0\(sp\) - e8: aba3000c swl v1,12\(sp\) - ec: 00000000 nop - f0: aba40017 swl a0,23\(sp\) - f4: 0000000d break - f8: a9020003 swl v0,3\(t0\) - fc: a9030008 swl v1,8\(t0\) - 100: 00000000 nop - 104: a904000c swl a0,12\(t0\) - 108: 0000000d break - 10c: aba20000 swl v0,0\(sp\) - 110: aba3000c swl v1,12\(sp\) - 114: 00000000 nop - 118: bba40017 swr a0,23\(sp\) - 11c: 0000000d break - 120: a9020005 swl v0,5\(t0\) - 124: a9030011 swl v1,17\(t0\) - 128: 00000000 nop - 12c: b904001c swr a0,28\(t0\) - 130: 0000000d break + 4: a3a3000b sb v1,11\(sp\) + 8: a3a40004 sb a0,4\(sp\) + c: 0000000d break + 10: a3a20000 sb v0,0\(sp\) + 14: a3a3000b sb v1,11\(sp\) + 18: a3a40005 sb a0,5\(sp\) + 1c: 0000000d break + 20: a3a20007 sb v0,7\(sp\) + 24: a3a3000b sb v1,11\(sp\) + 28: 00000000 nop + 2c: a3a40010 sb a0,16\(sp\) + 30: 0000000d break + 34: a1020000 sb v0,0\(t0\) + 38: a1030008 sb v1,8\(t0\) + 3c: 00000000 nop + 40: a1040009 sb a0,9\(t0\) + 44: 0000000d break + 48: a7a20000 sh v0,0\(sp\) + 4c: a7a3ffe1 sh v1,-31\(sp\) + 50: a7a4ffe2 sh a0,-30\(sp\) + 54: 0000000d break + 58: a7a20006 sh v0,6\(sp\) + 5c: a7a30008 sh v1,8\(sp\) + 60: 00000000 nop + 64: a7a40010 sh a0,16\(sp\) + 68: 0000000d break + 6c: a5020001 sh v0,1\(t0\) + 70: a5030003 sh v1,3\(t0\) + 74: 00000000 nop + 78: a504000b sh a0,11\(t0\) + 7c: 0000000d break + 80: afa20008 sw v0,8\(sp\) + 84: afa3fff8 sw v1,-8\(sp\) + 88: afa40008 sw a0,8\(sp\) + 8c: 0000000d break + 90: afa20004 sw v0,4\(sp\) + 94: afa30008 sw v1,8\(sp\) + 98: 00000000 nop + 9c: afa40010 sw a0,16\(sp\) + a0: 0000000d break + a4: ad020003 sw v0,3\(t0\) + a8: ad030007 sw v1,7\(t0\) + ac: 00000000 nop + b0: ad04000f sw a0,15\(t0\) + b4: 0000000d break + b8: aba20004 swl v0,4\(sp\) + bc: aba3000a swl v1,10\(sp\) + c0: 00000000 nop + c4: aba40011 swl a0,17\(sp\) + c8: 0000000d break + cc: aba20007 swl v0,7\(sp\) + d0: aba3000c swl v1,12\(sp\) + d4: 00000000 nop + d8: aba40010 swl a0,16\(sp\) + dc: 0000000d break + e0: aba20000 swl v0,0\(sp\) + e4: aba3000c swl v1,12\(sp\) + e8: 00000000 nop + ec: aba40017 swl a0,23\(sp\) + f0: 0000000d break + f4: a9020003 swl v0,3\(t0\) + f8: a9030008 swl v1,8\(t0\) + fc: 00000000 nop + 100: a904000c swl a0,12\(t0\) + 104: 0000000d break + 108: aba20000 swl v0,0\(sp\) + 10c: aba3000c swl v1,12\(sp\) + 110: 00000000 nop + 114: bba40017 swr a0,23\(sp\) + 118: 0000000d break + 11c: a9020005 swl v0,5\(t0\) + 120: a9030011 swl v1,17\(t0\) + 124: 00000000 nop + 128: b904001c swr a0,28\(t0\) + 12c: 0000000d break \.\.\. diff --git a/gas/testsuite/gas/mips/24k-triple-stores-4.d b/gas/testsuite/gas/mips/24k-triple-stores-4.d index ba88ac8..b36fb90 100644 --- a/gas/testsuite/gas/mips/24k-triple-stores-4.d +++ b/gas/testsuite/gas/mips/24k-triple-stores-4.d @@ -1,14 +1,14 @@ #objdump: -dr -#as: -mfix-24k +#as: -mfix-24k -32 #name: 24K: Triple Store (Range Check >= 32) .*: +file format .*mips.* Disassembly of section .text: -00000000 <.text>: +0+ <.*>: 0: a113000a sb s3,10\(t0\) - 4: 00000000 nop - 8: a5130001 sh s3,1\(t0\) + 4: a5130001 sh s3,1\(t0\) + 8: 00000000 nop c: a1130020 sb s3,32\(t0\) 10: 0000000d break 14: a113000a sb s3,10\(t0\) diff --git a/gas/testsuite/gas/mips/24k-triple-stores-5.d b/gas/testsuite/gas/mips/24k-triple-stores-5.d index 9749003..0785d65 100644 --- a/gas/testsuite/gas/mips/24k-triple-stores-5.d +++ b/gas/testsuite/gas/mips/24k-triple-stores-5.d @@ -1,37 +1,36 @@ #objdump: -dr -#as: -mfix-24k +#as: -mfix-24k -32 #name: 24K: Triple Store (Mix byte/half/word size check) .*: +file format .*mips.* Disassembly of section .text: -00000000 <.text>: +0+ <.*>: 0: a5020007 sh v0,7\(t0\) - 4: 00000000 nop - 8: a1030000 sb v1,0\(t0\) - c: ad040001 sw a0,1\(t0\) - 10: 0000000d break - 14: a5020016 sh v0,22\(t0\) - 18: a103000f sb v1,15\(t0\) - 1c: 00000000 nop - 20: ad040018 sw a0,24\(t0\) - 24: 0000000d break - 28: a5020000 sh v0,0\(t0\) - 2c: a1030009 sb v1,9\(t0\) - 30: ad040002 sw a0,2\(t0\) - 34: 0000000d break - 38: a5020006 sh v0,6\(t0\) - 3c: a1030010 sb v1,16\(t0\) - 40: 00000000 nop - 44: ad04000c sw a0,12\(t0\) - 48: 0000000d break - 4c: a502000a sh v0,10\(t0\) - 50: a103000f sb v1,15\(t0\) - 54: ad040004 sw a0,4\(t0\) - 58: 0000000d break - 5c: a502000a sh v0,10\(t0\) - 60: a1030010 sb v1,16\(t0\) - 64: 00000000 nop - 68: ad040004 sw a0,4\(t0\) - 6c: 0000000d break + 4: a1030000 sb v1,0\(t0\) + 8: ad040001 sw a0,1\(t0\) + c: 0000000d break + 10: a5020016 sh v0,22\(t0\) + 14: a103000f sb v1,15\(t0\) + 18: 00000000 nop + 1c: ad040018 sw a0,24\(t0\) + 20: 0000000d break + 24: a5020000 sh v0,0\(t0\) + 28: a1030009 sb v1,9\(t0\) + 2c: ad040002 sw a0,2\(t0\) + 30: 0000000d break + 34: a5020006 sh v0,6\(t0\) + 38: a1030010 sb v1,16\(t0\) + 3c: 00000000 nop + 40: ad04000c sw a0,12\(t0\) + 44: 0000000d break + 48: a502000a sh v0,10\(t0\) + 4c: a103000f sb v1,15\(t0\) + 50: ad040004 sw a0,4\(t0\) + 54: 0000000d break + 58: a502000a sh v0,10\(t0\) + 5c: a1030010 sb v1,16\(t0\) + 60: 00000000 nop + 64: ad040004 sw a0,4\(t0\) + 68: 0000000d break \.\.\. diff --git a/gas/testsuite/gas/mips/24k-triple-stores-6.d b/gas/testsuite/gas/mips/24k-triple-stores-6.d index 195a8b4..260bc76 100644 --- a/gas/testsuite/gas/mips/24k-triple-stores-6.d +++ b/gas/testsuite/gas/mips/24k-triple-stores-6.d @@ -1,37 +1,36 @@ #objdump: -dr -#as: -mfix-24k +#as: -mfix-24k -32 -EB #name: 24K: Triple Store (Store Macro Check) .*: +file format .*mips.* Disassembly of section .text: -00000000 <.text>: +0+ <.*>: 0: abbf0050 swl ra,80\(sp\) - 4: 00000000 nop - 8: bbbf0053 swr ra,83\(sp\) - c: abb30058 swl s3,88\(sp\) - 10: bbb3005b swr s3,91\(sp\) - 14: abbe0060 swl s8,96\(sp\) - 18: bbbe0063 swr s8,99\(sp\) - 1c: 0000000d break - 20: a3bf0051 sb ra,81\(sp\) - 24: 001f0a02 srl at,ra,0x8 - 28: a3a10050 sb at,80\(sp\) - 2c: a3b30059 sb s3,89\(sp\) - 30: 00130a02 srl at,s3,0x8 - 34: a3a10058 sb at,88\(sp\) - 38: a3be0061 sb s8,97\(sp\) - 3c: 001e0a02 srl at,s8,0x8 - 40: a3a10060 sb at,96\(sp\) - 44: 0000000d break - 48: e7a00050 swc1 \$f0,80\(sp\) - 4c: e7a20058 swc1 \$f2,88\(sp\) - 50: 00000000 nop - 54: e7a40060 swc1 \$f4,96\(sp\) - 58: 0000000d break - 5c: f7a00050 sdc1 \$f0,80\(sp\) - 60: f7a20058 sdc1 \$f2,88\(sp\) - 64: 00000000 nop - 68: f7a40060 sdc1 \$f4,96\(sp\) - 6c: 0000000d break + 4: bbbf0053 swr ra,83\(sp\) + 8: abb30058 swl s3,88\(sp\) + c: bbb3005b swr s3,91\(sp\) + 10: abbe0060 swl s8,96\(sp\) + 14: bbbe0063 swr s8,99\(sp\) + 18: 0000000d break + 1c: a3bf0051 sb ra,81\(sp\) + 20: 001f0a02 srl at,ra,0x8 + 24: a3a10050 sb at,80\(sp\) + 28: a3b30059 sb s3,89\(sp\) + 2c: 00130a02 srl at,s3,0x8 + 30: a3a10058 sb at,88\(sp\) + 34: a3be0061 sb s8,97\(sp\) + 38: 001e0a02 srl at,s8,0x8 + 3c: a3a10060 sb at,96\(sp\) + 40: 0000000d break + 44: e7a00050 swc1 \$f0,80\(sp\) + 48: e7a20058 swc1 \$f2,88\(sp\) + 4c: 00000000 nop + 50: e7a40060 swc1 \$f4,96\(sp\) + 54: 0000000d break + 58: f7a00050 sdc1 \$f0,80\(sp\) + 5c: f7a20058 sdc1 \$f2,88\(sp\) + 60: 00000000 nop + 64: f7a40060 sdc1 \$f4,96\(sp\) + 68: 0000000d break \.\.\. diff --git a/gas/testsuite/gas/mips/24k-triple-stores-7.d b/gas/testsuite/gas/mips/24k-triple-stores-7.d index 84c22e8..147d004 100644 --- a/gas/testsuite/gas/mips/24k-triple-stores-7.d +++ b/gas/testsuite/gas/mips/24k-triple-stores-7.d @@ -1,81 +1,80 @@ #objdump: -dr -#as: -mfix-24k +#as: -mfix-24k -32 #name: 24K: Triple Store (Extended Range Check) .*: +file format .*mips.* Disassembly of section .text: -00000000 <.text>: +0+ <.*>: 0: a1130004 sb s3,4\(t0\) - 4: 00000000 nop - 8: ad130008 sw s3,8\(t0\) - c: a113000f sb s3,15\(t0\) - 10: 0000000d break - 14: a1130003 sb s3,3\(t0\) - 18: ad130008 sw s3,8\(t0\) - 1c: 00000000 nop - 20: a113000f sb s3,15\(t0\) - 24: 0000000d break - 28: ad13001c sw s3,28\(t0\) - 2c: ad130008 sw s3,8\(t0\) - 30: a113001f sb s3,31\(t0\) - 34: 0000000d break - 38: a1130005 sb s3,5\(t0\) - 3c: ad130009 sw s3,9\(t0\) - 40: a1130010 sb s3,16\(t0\) - 44: 0000000d break - 48: a1130004 sb s3,4\(t0\) - 4c: ad130009 sw s3,9\(t0\) - 50: 00000000 nop - 54: a1130010 sb s3,16\(t0\) - 58: 0000000d break - 5c: a1130006 sb s3,6\(t0\) - 60: a5130008 sh s3,8\(t0\) - 64: a113000f sb s3,15\(t0\) - 68: 0000000d break - 6c: a1130005 sb s3,5\(t0\) - 70: a5130008 sh s3,8\(t0\) - 74: 00000000 nop - 78: a113000f sb s3,15\(t0\) - 7c: 0000000d break - 80: a513001e sh s3,30\(t0\) - 84: a5130008 sh s3,8\(t0\) - 88: a113001f sb s3,31\(t0\) - 8c: 0000000d break - 90: a1130007 sb s3,7\(t0\) - 94: a5130009 sh s3,9\(t0\) - 98: a1130010 sb s3,16\(t0\) - 9c: 0000000d break - a0: a1130006 sb s3,6\(t0\) - a4: a5130009 sh s3,9\(t0\) - a8: 00000000 nop - ac: a1130010 sb s3,16\(t0\) - b0: 0000000d break - b4: a1130007 sb s3,7\(t0\) - b8: f5000008 sdc1 \$f0,8\(t0\) - bc: a113000f sb s3,15\(t0\) - c0: 0000000d break - c4: a1130007 sb s3,7\(t0\) - c8: f5000008 sdc1 \$f0,8\(t0\) - cc: 00000000 nop - d0: a1130010 sb s3,16\(t0\) - d4: 0000000d break - d8: a1130010 sb s3,16\(t0\) - dc: f5000008 sdc1 \$f0,8\(t0\) - e0: a1130017 sb s3,23\(t0\) - e4: 0000000d break - e8: a1130010 sb s3,16\(t0\) - ec: f5000008 sdc1 \$f0,8\(t0\) - f0: 00000000 nop - f4: a1130018 sb s3,24\(t0\) - f8: 0000000d break - fc: a1130008 sb s3,8\(t0\) - 100: f5000009 sdc1 \$f0,9\(t0\) - 104: a1130010 sb s3,16\(t0\) - 108: 0000000d break - 10c: a113fffd sb s3,-3\(t0\) - 110: f500fffe sdc1 \$f0,-2\(t0\) - 114: 00000000 nop - 118: a1130006 sb s3,6\(t0\) - 11c: 0000000d break + 4: ad130008 sw s3,8\(t0\) + 8: a113000f sb s3,15\(t0\) + c: 0000000d break + 10: a1130003 sb s3,3\(t0\) + 14: ad130008 sw s3,8\(t0\) + 18: 00000000 nop + 1c: a113000f sb s3,15\(t0\) + 20: 0000000d break + 24: ad13001c sw s3,28\(t0\) + 28: ad130008 sw s3,8\(t0\) + 2c: a113001f sb s3,31\(t0\) + 30: 0000000d break + 34: a1130005 sb s3,5\(t0\) + 38: ad130009 sw s3,9\(t0\) + 3c: a1130010 sb s3,16\(t0\) + 40: 0000000d break + 44: a1130004 sb s3,4\(t0\) + 48: ad130009 sw s3,9\(t0\) + 4c: 00000000 nop + 50: a1130010 sb s3,16\(t0\) + 54: 0000000d break + 58: a1130006 sb s3,6\(t0\) + 5c: a5130008 sh s3,8\(t0\) + 60: a113000f sb s3,15\(t0\) + 64: 0000000d break + 68: a1130005 sb s3,5\(t0\) + 6c: a5130008 sh s3,8\(t0\) + 70: 00000000 nop + 74: a113000f sb s3,15\(t0\) + 78: 0000000d break + 7c: a513001e sh s3,30\(t0\) + 80: a5130008 sh s3,8\(t0\) + 84: a113001f sb s3,31\(t0\) + 88: 0000000d break + 8c: a1130007 sb s3,7\(t0\) + 90: a5130009 sh s3,9\(t0\) + 94: a1130010 sb s3,16\(t0\) + 98: 0000000d break + 9c: a1130006 sb s3,6\(t0\) + a0: a5130009 sh s3,9\(t0\) + a4: 00000000 nop + a8: a1130010 sb s3,16\(t0\) + ac: 0000000d break + b0: a1130007 sb s3,7\(t0\) + b4: f5000008 sdc1 \$f0,8\(t0\) + b8: a113000f sb s3,15\(t0\) + bc: 0000000d break + c0: a1130007 sb s3,7\(t0\) + c4: f5000008 sdc1 \$f0,8\(t0\) + c8: 00000000 nop + cc: a1130010 sb s3,16\(t0\) + d0: 0000000d break + d4: a1130010 sb s3,16\(t0\) + d8: f5000008 sdc1 \$f0,8\(t0\) + dc: a1130017 sb s3,23\(t0\) + e0: 0000000d break + e4: a1130010 sb s3,16\(t0\) + e8: f5000008 sdc1 \$f0,8\(t0\) + ec: 00000000 nop + f0: a1130018 sb s3,24\(t0\) + f4: 0000000d break + f8: a1130008 sb s3,8\(t0\) + fc: f5000009 sdc1 \$f0,9\(t0\) + 100: a1130010 sb s3,16\(t0\) + 104: 0000000d break + 108: a113fffd sb s3,-3\(t0\) + 10c: f500fffe sdc1 \$f0,-2\(t0\) + 110: 00000000 nop + 114: a1130006 sb s3,6\(t0\) + 118: 0000000d break ... diff --git a/gas/testsuite/gas/mips/24k-triple-stores-8.d b/gas/testsuite/gas/mips/24k-triple-stores-8.d index cea15bf..bd10c7a 100644 --- a/gas/testsuite/gas/mips/24k-triple-stores-8.d +++ b/gas/testsuite/gas/mips/24k-triple-stores-8.d @@ -1,14 +1,14 @@ #objdump: -dr -#as: -mfix-24k +#as: -mfix-24k -32 #name: 24K: Triple Store (Range Check >= 24) .*: +file format .*mips.* Disassembly of section .text: -00000000 <.text>: +0+ <.*>: 0: a1130000 sb s3,0\(t0\) - 4: 00000000 nop - 8: a1130001 sb s3,1\(t0\) + 4: a1130001 sb s3,1\(t0\) + 8: 00000000 nop c: a1130018 sb s3,24\(t0\) 10: 0000000d break 14: a1130000 sb s3,0\(t0\) diff --git a/gas/testsuite/gas/mips/24k-triple-stores-9.d b/gas/testsuite/gas/mips/24k-triple-stores-9.d index 7768da0..1a500c0 100644 --- a/gas/testsuite/gas/mips/24k-triple-stores-9.d +++ b/gas/testsuite/gas/mips/24k-triple-stores-9.d @@ -1,13 +1,16 @@ -#objdump: -dr -#as: -mfix-24k +#objdump: -drz +#as: -mfix-24k -32 #name: 24K: Triple store (Intervening data #1) .*: +file format .*mips.* Disassembly of section .text: -00000000 <.text>: +0+ <.*>: 0: a1020000 sb v0,0\(t0\) 4: 00000000 nop 8: a1030008 sb v1,8\(t0\) - c: a1040010 sb a0,16\(t0\) + c: 00000000 nop + 10: a1040010 sb a0,16\(t0\) + 14: 00000000 nop +#pass diff --git a/gas/testsuite/gas/mips/and.d b/gas/testsuite/gas/mips/and.d index 414ea2f..c33e6eb 100644 --- a/gas/testsuite/gas/mips/and.d +++ b/gas/testsuite/gas/mips/and.d @@ -32,4 +32,4 @@ Disassembly of section .text: 0+0058 <[^>]*> nor a0,a1,at 0+005c <[^>]*> ori a0,a1,0x0 0+0060 <[^>]*> xori a0,a1,0x0 - ... + \.\.\. diff --git a/gas/testsuite/gas/mips/and.s b/gas/testsuite/gas/mips/and.s index 4dfc57e..ac64dd1 100644 --- a/gas/testsuite/gas/mips/and.s +++ b/gas/testsuite/gas/mips/and.s @@ -22,7 +22,6 @@ foo: xor $4,$5,0 - # Round to a 16 byte boundary, for ease in testing multiple targets. - nop - nop - nop +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/beq.s b/gas/testsuite/gas/mips/beq.s index b3205f9..d9e4c60 100644 --- a/gas/testsuite/gas/mips/beq.s +++ b/gas/testsuite/gas/mips/beq.s @@ -22,4 +22,5 @@ text_label: # bal external_label # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 .space 8 diff --git a/gas/testsuite/gas/mips/bge.s b/gas/testsuite/gas/mips/bge.s index 6dc0ce1..c3c86e9 100644 --- a/gas/testsuite/gas/mips/bge.s +++ b/gas/testsuite/gas/mips/bge.s @@ -23,8 +23,6 @@ text_label: bge $4,$5,external_label bgt $4,$5,external_label -# Round to a 16 byte boundary, for ease in testing multiple targets. - nop - nop - nop - nop +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/bgeu.s b/gas/testsuite/gas/mips/bgeu.s index dcfbfdb..dc0a93a 100644 --- a/gas/testsuite/gas/mips/bgeu.s +++ b/gas/testsuite/gas/mips/bgeu.s @@ -21,6 +21,6 @@ text_label: bgeu $4,$5,external_label bgtu $4,$5,external_label -# Round to a 16 byte boundary, for ease in testing multiple targets. - nop - nop +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/blt.s b/gas/testsuite/gas/mips/blt.s index 2efebfa..4bcfc84 100644 --- a/gas/testsuite/gas/mips/blt.s +++ b/gas/testsuite/gas/mips/blt.s @@ -23,8 +23,6 @@ text_label: blt $4,$5,external_label ble $4,$5,external_label -# Round to a 16 byte boundary, for ease in testing multiple targets. - nop - nop - nop - nop +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/bltu.s b/gas/testsuite/gas/mips/bltu.s index dd0d3a2..8340e31 100644 --- a/gas/testsuite/gas/mips/bltu.s +++ b/gas/testsuite/gas/mips/bltu.s @@ -21,6 +21,6 @@ text_label: bltu $4,$5,external_label bleu $4,$5,external_label -# Round to a 16 byte boundary, for ease in testing multiple targets. - nop - nop +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/branch-misc-2.s b/gas/testsuite/gas/mips/branch-misc-2.s index 3167289..abf43c5 100644 --- a/gas/testsuite/gas/mips/branch-misc-2.s +++ b/gas/testsuite/gas/mips/branch-misc-2.s @@ -37,6 +37,7 @@ g6: b .Ldata # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 .space 8 .data diff --git a/gas/testsuite/gas/mips/cache.d b/gas/testsuite/gas/mips/cache.d new file mode 100644 index 0000000..30620dc --- /dev/null +++ b/gas/testsuite/gas/mips/cache.d @@ -0,0 +1,28 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS CACHE instruction +#as: -32 + +# Check MIPS CACHE instruction assembly. + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> bc4507ff cache 0x5,2047\(v0\) +[0-9a-f]+ <[^>]*> bc65f800 cache 0x5,-2048\(v1\) +[0-9a-f]+ <[^>]*> bc850800 cache 0x5,2048\(a0\) +[0-9a-f]+ <[^>]*> bca5f7ff cache 0x5,-2049\(a1\) +[0-9a-f]+ <[^>]*> bcc57fff cache 0x5,32767\(a2\) +[0-9a-f]+ <[^>]*> bce58000 cache 0x5,-32768\(a3\) +[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1 +[0-9a-f]+ <[^>]*> 00280821 addu at,at,t0 +[0-9a-f]+ <[^>]*> bc258000 cache 0x5,-32768\(at\) +[0-9a-f]+ <[^>]*> 3c01ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 00290821 addu at,at,t1 +[0-9a-f]+ <[^>]*> bc257fff cache 0x5,32767\(at\) +[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1 +[0-9a-f]+ <[^>]*> 002a0821 addu at,at,t2 +[0-9a-f]+ <[^>]*> bc259000 cache 0x5,-28672\(at\) +[0-9a-f]+ <[^>]*> 3c01ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 002b0821 addu at,at,t3 +[0-9a-f]+ <[^>]*> bc256fff cache 0x5,28671\(at\) + \.\.\. diff --git a/gas/testsuite/gas/mips/cache.s b/gas/testsuite/gas/mips/cache.s new file mode 100644 index 0000000..5f66c4d --- /dev/null +++ b/gas/testsuite/gas/mips/cache.s @@ -0,0 +1,41 @@ +# Source file to test offsets used with the CACHE and PREF instruction. + +# By default test CACHE. + +# If defined, test PREF. + .ifdef tpref + .macro cache ops:vararg + pref \ops + .endm + .endif + + .set noreorder + .set noat + + .text +text_label: + + cache 5, 2047($2) + cache 5, -2048($3) + + # 12 bits accepted for microMIPS code. + .ifdef micromips + .set at + .endif + cache 5, 2048($4) + cache 5, -2049($5) + cache 5, 32767($6) + cache 5, -32768($7) + + # 16 bits accepted for standard MIPS code. + .ifndef micromips + .set at + .endif + cache 5, 32768($8) + cache 5, -32769($9) + cache 5, 36864($10) + cache 5, -36865($11) + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/daddi.d b/gas/testsuite/gas/mips/daddi.d new file mode 100644 index 0000000..d7509e6 --- /dev/null +++ b/gas/testsuite/gas/mips/daddi.d @@ -0,0 +1,26 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS DADDI instruction +#as: -32 + +# Check MIPS DADDI instruction assembly. + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 604301ff daddi v1,v0,511 +[0-9a-f]+ <[^>]*> 6085fe00 daddi a1,a0,-512 +[0-9a-f]+ <[^>]*> 60c70200 daddi a3,a2,512 +[0-9a-f]+ <[^>]*> 6109fdff daddi t1,t0,-513 +[0-9a-f]+ <[^>]*> 614b7fff daddi t3,t2,32767 +[0-9a-f]+ <[^>]*> 618d8000 daddi t5,t4,-32768 +[0-9a-f]+ <[^>]*> 34018000 li at,0x8000 +[0-9a-f]+ <[^>]*> 01c1782c dadd t7,t6,at +[0-9a-f]+ <[^>]*> 3c01ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 34217fff ori at,at,0x7fff +[0-9a-f]+ <[^>]*> 0201882c dadd s1,s0,at +[0-9a-f]+ <[^>]*> 34018200 li at,0x8200 +[0-9a-f]+ <[^>]*> 0241982c dadd s3,s2,at +[0-9a-f]+ <[^>]*> 3c01ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 34217dff ori at,at,0x7dff +[0-9a-f]+ <[^>]*> 0281a82c dadd s5,s4,at + \.\.\. diff --git a/gas/testsuite/gas/mips/daddi.s b/gas/testsuite/gas/mips/daddi.s new file mode 100644 index 0000000..b06dbee --- /dev/null +++ b/gas/testsuite/gas/mips/daddi.s @@ -0,0 +1,32 @@ +# Source file to test immediates used with the DADDI instruction. + + .set noreorder + .set noat + + .text +text_label: + + daddi $3, $2, 511 + daddi $5, $4, -512 + + # 10 bits accepted for microMIPS code. + .ifdef micromips + .set at + .endif + daddi $7, $6, 512 + daddi $9, $8, -513 + daddi $11, $10, 32767 + daddi $13, $12, -32768 + + # 16 bits accepted for standard MIPS code. + .ifndef micromips + .set at + .endif + dadd $15, $14, 32768 + dadd $17, $16, -32769 + dadd $19, $18, 33280 + dadd $21, $20, -33281 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/dli.s b/gas/testsuite/gas/mips/dli.s index 6579528..41bf846 100644 --- a/gas/testsuite/gas/mips/dli.s +++ b/gas/testsuite/gas/mips/dli.s @@ -62,6 +62,4 @@ foo: dli $4,0x003ffc03ffffc000 # Round to a 16 byte boundary, for ease in testing multiple targets. - nop - nop - nop + .p2align 4 diff --git a/gas/testsuite/gas/mips/elf-jal.d b/gas/testsuite/gas/mips/elf-jal.d index 40cd28b..4c7535b 100644 --- a/gas/testsuite/gas/mips/elf-jal.d +++ b/gas/testsuite/gas/mips/elf-jal.d @@ -24,3 +24,4 @@ Disassembly of section .text: 0+0028 <[^>]*> j 0+ [ ]*28: (MIPS_JMP|JMPADDR|R_MIPS_26) external_text_label 0+002c <[^>]*> nop + \.\.\. diff --git a/gas/testsuite/gas/mips/elf-rel27.d b/gas/testsuite/gas/mips/elf-rel27.d index be81e4e..b3a0648 100644 --- a/gas/testsuite/gas/mips/elf-rel27.d +++ b/gas/testsuite/gas/mips/elf-rel27.d @@ -5,6 +5,10 @@ Relocation section '\.rel\.text' at offset .* contains [34] entries: *Offset * Info * Type * Sym\. Value * Symbol's Name -[0-9a-f]+ * [0-9a-f]+ R_(MIPS|MIPS16)_HI16 * [0-9a-f]+ * (\.text|\.L0) -[0-9a-f]+ * [0-9a-f]+ R_(MIPS|MIPS16)_HI16 * [0-9a-f]+ * (\.text|\.L0) -[0-9a-f]+ * [0-9a-f]+ R_(MIPS|MIPS16)_LO16 * [0-9a-f]+ * (\.text|\.L0) +[0-9a-f]+ * [0-9a-f]+ R_(MIPS|MIPS16|MICROMIPS)_HI16 * [0-9a-f]+ * (\.text|\.L0) +[0-9a-f]+ * [0-9a-f]+ R_(MIPS|MIPS16|MICROMIPS)_HI16 * [0-9a-f]+ * (\.text|\.L0) +[0-9a-f]+ * [0-9a-f]+ R_(MIPS|MIPS16|MICROMIPS)_LO16 * [0-9a-f]+ * (\.text|\.L0) +# There's an extra R_MICROMIPS_PC10_S1 relocation here for microMIPS +# assembly. We don't care about it and the entry count regexp above +# catches other possible discrepancies, hence: +#pass diff --git a/gas/testsuite/gas/mips/elf-rel4.s b/gas/testsuite/gas/mips/elf-rel4.s index 085cb23..3fb237a 100644 --- a/gas/testsuite/gas/mips/elf-rel4.s +++ b/gas/testsuite/gas/mips/elf-rel4.s @@ -5,7 +5,7 @@ a: .4byte 2 .section .text - la $4,a +b: la $4,a la $4,a+4 la $4,a+8 la $4,a+12 diff --git a/gas/testsuite/gas/mips/elf_ase_micromips-2.d b/gas/testsuite/gas/mips/elf_ase_micromips-2.d new file mode 100644 index 0000000..28b7f81 --- /dev/null +++ b/gas/testsuite/gas/mips/elf_ase_micromips-2.d @@ -0,0 +1,8 @@ +# name: ELF microMIPS ASE markings 2 +# source: nop.s +# objdump: -p +# as: -32 -mmicromips + +.*:.*file format.*mips.* +private flags = [0-9a-f]*[2367abef]......: .*[[,]micromips[],].* + diff --git a/gas/testsuite/gas/mips/elf_ase_micromips.d b/gas/testsuite/gas/mips/elf_ase_micromips.d new file mode 100644 index 0000000..c748dfb --- /dev/null +++ b/gas/testsuite/gas/mips/elf_ase_micromips.d @@ -0,0 +1,8 @@ +# name: ELF microMIPS ASE markings +# source: empty.s +# objdump: -p +# as: -32 -mmicromips + +.*:.*file format.*mips.* +!private flags = .*micromips.* + diff --git a/gas/testsuite/gas/mips/jal-mask-1.s b/gas/testsuite/gas/mips/jal-mask-1.s new file mode 100644 index 0000000..4cb0b03 --- /dev/null +++ b/gas/testsuite/gas/mips/jal-mask-1.s @@ -0,0 +1,13 @@ + .text +foo: + j 0x0000000 + j 0xaaaaaa4 + j 0x5555558 + j 0xffffffc + jal 0x0000000 + jal 0xaaaaaa4 + jal 0x5555558 + jal 0xffffffc + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff --git a/gas/testsuite/gas/mips/jal-mask-11.d b/gas/testsuite/gas/mips/jal-mask-11.d new file mode 100644 index 0000000..4af7cc1 --- /dev/null +++ b/gas/testsuite/gas/mips/jal-mask-11.d @@ -0,0 +1,27 @@ +#objdump: -dr --prefix-addresses --show-raw-insn --adjust-vma=0x55555550 +#name: MIPS jal mask 1.1 +#as: -32 +#source: jal-mask-1.s + +# Check address masks for JAL/J instructions. + +.*: +file format .*mips.* + +Disassembly of section \.text: +55555550 <[^>]*> 08000000 j 50000000 <[^>]*> +55555554 <[^>]*> 00000000 nop +55555558 <[^>]*> 0aaaaaa9 j 5aaaaaa4 <[^>]*> +5555555c <[^>]*> 00000000 nop +55555560 <[^>]*> 09555556 j 55555558 <[^>]*> +55555564 <[^>]*> 00000000 nop +55555568 <[^>]*> 0bffffff j 5ffffffc <[^>]*> +5555556c <[^>]*> 00000000 nop +55555570 <[^>]*> 0c000000 jal 50000000 <[^>]*> +55555574 <[^>]*> 00000000 nop +55555578 <[^>]*> 0eaaaaa9 jal 5aaaaaa4 <[^>]*> +5555557c <[^>]*> 00000000 nop +55555580 <[^>]*> 0d555556 jal 55555558 <[^>]*> +55555584 <[^>]*> 00000000 nop +55555588 <[^>]*> 0fffffff jal 5ffffffc <[^>]*> +5555558c <[^>]*> 00000000 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/jal-mask-12.d b/gas/testsuite/gas/mips/jal-mask-12.d new file mode 100644 index 0000000..854178e --- /dev/null +++ b/gas/testsuite/gas/mips/jal-mask-12.d @@ -0,0 +1,27 @@ +#objdump: -dr --prefix-addresses --show-raw-insn --adjust-vma=0xaaaaaaa0 +#name: MIPS jal mask 1.2 +#as: -32 +#source: jal-mask-1.s + +# Check address masks for JAL/J instructions. + +.*: +file format .*mips.* + +Disassembly of section \.text: +aaaaaaa0 <[^>]*> 08000000 j a0000000 <[^>]*> +aaaaaaa4 <[^>]*> 00000000 nop +aaaaaaa8 <[^>]*> 0aaaaaa9 j aaaaaaa4 <[^>]*> +aaaaaaac <[^>]*> 00000000 nop +aaaaaab0 <[^>]*> 09555556 j a5555558 <[^>]*> +aaaaaab4 <[^>]*> 00000000 nop +aaaaaab8 <[^>]*> 0bffffff j affffffc <[^>]*> +aaaaaabc <[^>]*> 00000000 nop +aaaaaac0 <[^>]*> 0c000000 jal a0000000 <[^>]*> +aaaaaac4 <[^>]*> 00000000 nop +aaaaaac8 <[^>]*> 0eaaaaa9 jal aaaaaaa4 <[^>]*> +aaaaaacc <[^>]*> 00000000 nop +aaaaaad0 <[^>]*> 0d555556 jal a5555558 <[^>]*> +aaaaaad4 <[^>]*> 00000000 nop +aaaaaad8 <[^>]*> 0fffffff jal affffffc <[^>]*> +aaaaaadc <[^>]*> 00000000 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/jal-mask-2.s b/gas/testsuite/gas/mips/jal-mask-2.s new file mode 100644 index 0000000..9be8b14 --- /dev/null +++ b/gas/testsuite/gas/mips/jal-mask-2.s @@ -0,0 +1,17 @@ + .text +foo: + j 0x0000000 + j 0xaaaaaa2 + j 0x5555554 + j 0xffffff6 + jal 0x0000008 + jal 0xaaaaaaa + jal 0x555555c + jal 0xffffffe + jals 0x0000002 + jals 0xaaaaaa6 + jals 0x555555a + jals 0xffffffe + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff --git a/gas/testsuite/gas/mips/jal-mask-21.d b/gas/testsuite/gas/mips/jal-mask-21.d new file mode 100644 index 0000000..73703ee --- /dev/null +++ b/gas/testsuite/gas/mips/jal-mask-21.d @@ -0,0 +1,35 @@ +#objdump: -dr --prefix-addresses --show-raw-insn --adjust-vma=0x55555550 +#name: MIPS jal mask 2.1 +#as: -32 +#source: jal-mask-2.s + +# Check address masks for JAL/J instructions. + +.*: +file format .*mips.* + +Disassembly of section \.text: +55555550 <[^>]*> d400 0000 j 50000000 <[^>]*> +55555554 <[^>]*> 0c00 nop +55555556 <[^>]*> d555 5551 j 52aaaaa2 <[^>]*> +5555555a <[^>]*> 0c00 nop +5555555c <[^>]*> d6aa aaaa j 55555554 <[^>]*> +55555560 <[^>]*> 0c00 nop +55555562 <[^>]*> d7ff fffb j 57fffff6 <[^>]*> +55555566 <[^>]*> 0c00 nop +55555568 <[^>]*> f400 0004 jal 50000008 <[^>]*> +5555556c <[^>]*> 0000 0000 nop +55555570 <[^>]*> f555 5555 jal 52aaaaaa <[^>]*> +55555574 <[^>]*> 0000 0000 nop +55555578 <[^>]*> f6aa aaae jal 5555555c <[^>]*> +5555557c <[^>]*> 0000 0000 nop +55555580 <[^>]*> f7ff ffff jal 57fffffe <[^>]*> +55555584 <[^>]*> 0000 0000 nop +55555588 <[^>]*> 7400 0001 jals 50000002 <[^>]*> +5555558c <[^>]*> 0c00 nop +5555558e <[^>]*> 7555 5553 jals 52aaaaa6 <[^>]*> +55555592 <[^>]*> 0c00 nop +55555594 <[^>]*> 76aa aaad jals 5555555a <[^>]*> +55555598 <[^>]*> 0c00 nop +5555559a <[^>]*> 77ff ffff jals 57fffffe <[^>]*> +5555559e <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/jal-mask-22.d b/gas/testsuite/gas/mips/jal-mask-22.d new file mode 100644 index 0000000..88c1fa6 --- /dev/null +++ b/gas/testsuite/gas/mips/jal-mask-22.d @@ -0,0 +1,35 @@ +#objdump: -dr --prefix-addresses --show-raw-insn --adjust-vma=0xaaaaaaa0 +#name: MIPS jal mask 2.2 +#as: -32 +#source: jal-mask-2.s + +# Check address masks for JAL/J instructions. + +.*: +file format .*mips.* + +Disassembly of section \.text: +aaaaaaa0 <[^>]*> d400 0000 j a8000000 <[^>]*> +aaaaaaa4 <[^>]*> 0c00 nop +aaaaaaa6 <[^>]*> d555 5551 j aaaaaaa2 <[^>]*> +aaaaaaaa <[^>]*> 0c00 nop +aaaaaaac <[^>]*> d6aa aaaa j ad555554 <[^>]*> +aaaaaab0 <[^>]*> 0c00 nop +aaaaaab2 <[^>]*> d7ff fffb j affffff6 <[^>]*> +aaaaaab6 <[^>]*> 0c00 nop +aaaaaab8 <[^>]*> f400 0004 jal a8000008 <[^>]*> +aaaaaabc <[^>]*> 0000 0000 nop +aaaaaac0 <[^>]*> f555 5555 jal aaaaaaaa <[^>]*> +aaaaaac4 <[^>]*> 0000 0000 nop +aaaaaac8 <[^>]*> f6aa aaae jal ad55555c <[^>]*> +aaaaaacc <[^>]*> 0000 0000 nop +aaaaaad0 <[^>]*> f7ff ffff jal affffffe <[^>]*> +aaaaaad4 <[^>]*> 0000 0000 nop +aaaaaad8 <[^>]*> 7400 0001 jals a8000002 <[^>]*> +aaaaaadc <[^>]*> 0c00 nop +aaaaaade <[^>]*> 7555 5553 jals aaaaaaa6 <[^>]*> +aaaaaae2 <[^>]*> 0c00 nop +aaaaaae4 <[^>]*> 76aa aaad jals ad55555a <[^>]*> +aaaaaae8 <[^>]*> 0c00 nop +aaaaaaea <[^>]*> 77ff ffff jals affffffe <[^>]*> +aaaaaaee <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/jal.d b/gas/testsuite/gas/mips/jal.d index 1657630..107f2fe 100644 --- a/gas/testsuite/gas/mips/jal.d +++ b/gas/testsuite/gas/mips/jal.d @@ -23,3 +23,4 @@ Disassembly of section .text: 0+0028 <[^>]*> j 0+ [ ]*28: (MIPS_JMP|JMPADDR|R_MIPS_26) external_text_label 0+002c <[^>]*> nop + \.\.\. diff --git a/gas/testsuite/gas/mips/jal.s b/gas/testsuite/gas/mips/jal.s index 379be95..96ec7c9 100644 --- a/gas/testsuite/gas/mips/jal.s +++ b/gas/testsuite/gas/mips/jal.s @@ -9,3 +9,7 @@ text_label: # Test j as well j text_label j external_text_label + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/l_d-n32.d b/gas/testsuite/gas/mips/l_d-n32.d index 7718781..d474362 100644 --- a/gas/testsuite/gas/mips/l_d-n32.d +++ b/gas/testsuite/gas/mips/l_d-n32.d @@ -30,357 +30,357 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\) [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 \.\.\. diff --git a/gas/testsuite/gas/mips/l_d-n64.d b/gas/testsuite/gas/mips/l_d-n64.d index a26ae1d..3096443 100644 --- a/gas/testsuite/gas/mips/l_d-n64.d +++ b/gas/testsuite/gas/mips/l_d-n64.d @@ -30,1389 +30,1389 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\) [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 \.\.\. diff --git a/gas/testsuite/gas/mips/l_d.d b/gas/testsuite/gas/mips/l_d.d index ac3cfef..788c61e 100644 --- a/gas/testsuite/gas/mips/l_d.d +++ b/gas/testsuite/gas/mips/l_d.d @@ -30,357 +30,357 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\) [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|-16384)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,(1|4097)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,(1|8193)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,(1|-16383)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|14939)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|-16384)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,(1|4097)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,(1|8193)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> ldc1 \$f4,(1|-16383)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|14939)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? \.\.\. diff --git a/gas/testsuite/gas/mips/lb-pic.s b/gas/testsuite/gas/mips/lb-pic.s index f2cfdf9..87b513a 100644 --- a/gas/testsuite/gas/mips/lb-pic.s +++ b/gas/testsuite/gas/mips/lb-pic.s @@ -10,6 +10,7 @@ data_label: .lcomm small_local_common,1 .text +text_label: lb $4,0 lb $4,1 lb $4,0x8000 diff --git a/gas/testsuite/gas/mips/ld-n32.d b/gas/testsuite/gas/mips/ld-n32.d index 6416c83..405ce35 100644 --- a/gas/testsuite/gas/mips/ld-n32.d +++ b/gas/testsuite/gas/mips/ld-n32.d @@ -30,357 +30,357 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,-23131\(a0\) [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [0-9a-f]+ <[^>]*> addu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [0-9a-f]+ <[^>]*> addu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [0-9a-f]+ <[^>]*> addu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> addu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> addu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [0-9a-f]+ <[^>]*> addu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 \.\.\. diff --git a/gas/testsuite/gas/mips/ld-n64.d b/gas/testsuite/gas/mips/ld-n64.d index 1ad12d3..485298d 100644 --- a/gas/testsuite/gas/mips/ld-n64.d +++ b/gas/testsuite/gas/mips/ld-n64.d @@ -30,1389 +30,1389 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> daddu a0,a0,a1 [0-9a-f]+ <[^>]*> ld a0,-23131\(a0\) [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> ld a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu a0,a1,gp [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui a0,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu a0,a0,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0 [0-9a-f]+ <[^>]*> daddu a0,a0,at [0-9a-f]+ <[^>]*> ld a0,0\(a0\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 \.\.\. diff --git a/gas/testsuite/gas/mips/ld.d b/gas/testsuite/gas/mips/ld.d index 4d6dc12..bf2bd8d 100644 --- a/gas/testsuite/gas/mips/ld.d +++ b/gas/testsuite/gas/mips/ld.d @@ -42,525 +42,525 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> lw a0,-23131\(at\) [0-9a-f]+ <[^>]*> lw a1,-23127\(at\) [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a0,0\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,4\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a0,0\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lw a1,4\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a0,(0|-16384)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lw a1,(4|-16380)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a0,(1|4097)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,(5|4101)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> lw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a0,1\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,5\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> lw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a0,1\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lw a1,5\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a0,(1|8193)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,(5|8197)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a0,(1|-16383)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lw a1,(5|-16379)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> lw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> lw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> lw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> lw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a0,-(23131|14939)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,-(23127|14935)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> lw a0,(0|-16384)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lw a1,(4|-16380)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,(1|4097)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,(5|4101)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> lw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> lw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,(1|8193)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,(5|8197)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> lw a0,(1|-16383)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lw a1,(5|-16379)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-(23131|14939)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lw a1,-(23127|14935)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? \.\.\. diff --git a/gas/testsuite/gas/mips/ld.s b/gas/testsuite/gas/mips/ld.s index e2754e0..135b42d 100644 --- a/gas/testsuite/gas/mips/ld.s +++ b/gas/testsuite/gas/mips/ld.s @@ -61,6 +61,7 @@ data_label: .text .align 12 +text_label: ld r4,0 ld r4,1 ld r4,0x8000 diff --git a/gas/testsuite/gas/mips/li.d b/gas/testsuite/gas/mips/li.d index 4beed9b..b0b18a1 100644 --- a/gas/testsuite/gas/mips/li.d +++ b/gas/testsuite/gas/mips/li.d @@ -14,4 +14,4 @@ Disassembly of section .text: 0+0010 <[^>]*> lui a0,0x1 0+0014 <[^>]*> lui a0,0x1 0+0018 <[^>]*> ori a0,a0,0xa5a5 -0+001c <[^>]*> nop + \.\.\. diff --git a/gas/testsuite/gas/mips/li.s b/gas/testsuite/gas/mips/li.s index 9c3a601..3e69f73 100644 --- a/gas/testsuite/gas/mips/li.s +++ b/gas/testsuite/gas/mips/li.s @@ -8,5 +8,6 @@ foo: li $4,0x10000 li $4,0x1a5a5 -# Round to a 16 byte boundary, for ease in testing multiple targets. - nop +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/lifloat.d b/gas/testsuite/gas/mips/lifloat.d index 3f0c161..bd389bf 100644 --- a/gas/testsuite/gas/mips/lifloat.d +++ b/gas/testsuite/gas/mips/lifloat.d @@ -1,4 +1,4 @@ -#objdump: -dr --prefix-addresses -mmips:3000 +#objdump: -drz --prefix-addresses -mmips:3000 #name: MIPS lifloat #as: -32 -mips1 @@ -21,3 +21,5 @@ Disassembly of section .text: 0+0018 <[^>]*> ori a0,a0,0xcd36 0+001c <[^>]*> lwc1 \$f4,[-0-9]+\(gp\) [ ]*1c: [A-Z0-9_]*LITERAL[A-Z0-9_]* .lit4.* +0+0020 <[^>]*> nop +#pass diff --git a/gas/testsuite/gas/mips/loc-swap-2.d b/gas/testsuite/gas/mips/loc-swap-2.d new file mode 100644 index 0000000..b573445 --- /dev/null +++ b/gas/testsuite/gas/mips/loc-swap-2.d @@ -0,0 +1,49 @@ +#PROG: readelf +#readelf: -wl +#name: MIPS DWARF-2 location information with branch swapping (2) +#as: -32 +#source: loc-swap-2.s + +Raw dump of debug contents of section .debug_line: + + Offset: 0x0 + Length: 60 + DWARF Version: 2 + Prologue Length: 35 + Minimum Instruction Length: 1 + Initial value of 'is_stmt': 1 + Line Base: -5 + Line Range: 14 + Opcode Base: 13 + + Opcodes: + Opcode 1 has 0 args + Opcode 2 has 1 args + Opcode 3 has 1 args + Opcode 4 has 1 args + Opcode 5 has 1 args + Opcode 6 has 0 args + Opcode 7 has 0 args + Opcode 8 has 0 args + Opcode 9 has 1 args + Opcode 10 has 0 args + Opcode 11 has 0 args + Opcode 12 has 1 args + + The Directory Table is empty. + + The File Name Table: + Entry Dir Time Size Name + 1 0 0 0 loc-swap-2.s + + Line Number Statements: + Extended opcode 2: set Address to 0x0 + Special opcode 11: advance Address by 0 to 0x0 and Line by 6 to 7 + Special opcode 7: advance Address by 0 to 0x0 and Line by 2 to 9 + Special opcode 6: advance Address by 0 to 0x0 and Line by 1 to 10 + Special opcode 120: advance Address by 8 to 0x8 and Line by 3 to 13 + Special opcode 62: advance Address by 4 to 0xc and Line by 1 to 14 + Special opcode 6: advance Address by 0 to 0xc and Line by 1 to 15 + Special opcode 119: advance Address by 8 to 0x14 and Line by 2 to 17 + Advance PC by 4 to 0x18 + Extended opcode 1: End of Sequence diff --git a/gas/testsuite/gas/mips/loc-swap-2.s b/gas/testsuite/gas/mips/loc-swap-2.s new file mode 100644 index 0000000..03314e9 --- /dev/null +++ b/gas/testsuite/gas/mips/loc-swap-2.s @@ -0,0 +1,21 @@ + .file 1 "loc-swap-2.s" + .cfi_startproc + .ent foo + .type foo,@function +foo: + .loc 1 7 + move $5,$6 + .loc 1 9 + .loc 1 10 + jr $4 + + .loc 1 13 + move $4,$7 + .loc 1 14 + .loc 1 15 + bnez $4,foo + + .loc 1 17 + li $5,1 + .end foo + .cfi_endproc diff --git a/gas/testsuite/gas/mips/loc-swap-dis.d b/gas/testsuite/gas/mips/loc-swap-dis.d new file mode 100644 index 0000000..c4601b9 --- /dev/null +++ b/gas/testsuite/gas/mips/loc-swap-dis.d @@ -0,0 +1,34 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS DWARF-2 location information with branch swapping disassembly +#as: -32 +#source: loc-swap.s + +# Check branch swapping with DWARF-2 location information. + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 02002021 move a0,s0 +[0-9a-f]+ <[^>]*> 00800008 jr a0 +[0-9a-f]+ <[^>]*> 00000000 nop +[0-9a-f]+ <[^>]*> 00800008 jr a0 +[0-9a-f]+ <[^>]*> 0200f821 move ra,s0 +[0-9a-f]+ <[^>]*> 03e00008 jr ra +[0-9a-f]+ <[^>]*> 02002021 move a0,s0 +[0-9a-f]+ <[^>]*> 0200f821 move ra,s0 +[0-9a-f]+ <[^>]*> 03e00008 jr ra +[0-9a-f]+ <[^>]*> 00000000 nop +[0-9a-f]+ <[^>]*> 02002021 move a0,s0 +[0-9a-f]+ <[^>]*> 0080f809 jalr a0 +[0-9a-f]+ <[^>]*> 00000000 nop +[0-9a-f]+ <[^>]*> 0200f821 move ra,s0 +[0-9a-f]+ <[^>]*> 0080f809 jalr a0 +[0-9a-f]+ <[^>]*> 00000000 nop +[0-9a-f]+ <[^>]*> 0c000000 jal 0+0000 +[ ]*[0-9a-f]+: R_MIPS_26 bar +[0-9a-f]+ <[^>]*> 02002021 move a0,s0 +[0-9a-f]+ <[^>]*> 0200f821 move ra,s0 +[0-9a-f]+ <[^>]*> 0c000000 jal 0+0000 +[ ]*[0-9a-f]+: R_MIPS_26 bar +[0-9a-f]+ <[^>]*> 00000000 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/loc-swap.d b/gas/testsuite/gas/mips/loc-swap.d new file mode 100644 index 0000000..36fc814 --- /dev/null +++ b/gas/testsuite/gas/mips/loc-swap.d @@ -0,0 +1,61 @@ +#PROG: readelf +#readelf: -wl +#name: MIPS DWARF-2 location information with branch swapping +#as: -32 +#source: loc-swap.s + +# Verify that DWARF-2 location information for instructions reordered +# into a branch delay slot is updated to point to the branch instead. + +Raw dump of debug contents of section \.debug_line: + + Offset: 0x0 + Length: 67 + DWARF Version: 2 + Prologue Length: 33 + Minimum Instruction Length: 1 + Initial value of 'is_stmt': 1 + Line Base: -5 + Line Range: 14 + Opcode Base: 13 + + Opcodes: + Opcode 1 has 0 args + Opcode 2 has 1 args + Opcode 3 has 1 args + Opcode 4 has 1 args + Opcode 5 has 1 args + Opcode 6 has 0 args + Opcode 7 has 0 args + Opcode 8 has 0 args + Opcode 9 has 1 args + Opcode 10 has 0 args + Opcode 11 has 0 args + Opcode 12 has 1 args + + The Directory Table is empty\. + + The File Name Table: + Entry Dir Time Size Name + 1 0 0 0 loc-swap\.s + + Line Number Statements: + Extended opcode 2: set Address to 0x0 + Special opcode 11: advance Address by 0 to 0x0 and Line by 6 to 7 + Special opcode 63: advance Address by 4 to 0x4 and Line by 2 to 9 + Special opcode 120: advance Address by 8 to 0xc and Line by 3 to 12 + Special opcode 7: advance Address by 0 to 0xc and Line by 2 to 14 + Special opcode 120: advance Address by 8 to 0x14 and Line by 3 to 17 + Special opcode 7: advance Address by 0 to 0x14 and Line by 2 to 19 + Special opcode 120: advance Address by 8 to 0x1c and Line by 3 to 22 + Special opcode 63: advance Address by 4 to 0x20 and Line by 2 to 24 + Special opcode 120: advance Address by 8 to 0x28 and Line by 3 to 27 + Special opcode 63: advance Address by 4 to 0x2c and Line by 2 to 29 + Special opcode 120: advance Address by 8 to 0x34 and Line by 3 to 32 + Special opcode 63: advance Address by 4 to 0x38 and Line by 2 to 34 + Special opcode 120: advance Address by 8 to 0x40 and Line by 3 to 37 + Special opcode 7: advance Address by 0 to 0x40 and Line by 2 to 39 + Special opcode 120: advance Address by 8 to 0x48 and Line by 3 to 42 + Special opcode 63: advance Address by 4 to 0x4c and Line by 2 to 44 + Advance PC by 24 to 0x64 + Extended opcode 1: End of Sequence diff --git a/gas/testsuite/gas/mips/loc-swap.s b/gas/testsuite/gas/mips/loc-swap.s new file mode 100644 index 0000000..a70acf2 --- /dev/null +++ b/gas/testsuite/gas/mips/loc-swap.s @@ -0,0 +1,48 @@ +# Source file to test DWARF-2 location information with branch swapping. + + .file 1 "loc-swap.s" + .text +foo: + .loc 1 7 + move $4, $16 + .loc 1 9 + jr $4 + + .loc 1 12 + move $31, $16 + .loc 1 14 + jr $4 + + .loc 1 17 + move $4, $16 + .loc 1 19 + jr $31 + + .loc 1 22 + move $31, $16 + .loc 1 24 + jr $31 + + .loc 1 27 + move $4, $16 + .loc 1 29 + jalr $4 + + .loc 1 32 + move $31, $16 + .loc 1 34 + jalr $4 + + .loc 1 37 + move $4, $16 + .loc 1 39 + jal bar + + .loc 1 42 + move $31, $16 + .loc 1 44 + jal bar + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 16 diff --git a/gas/testsuite/gas/mips/mcu.d b/gas/testsuite/gas/mips/mcu.d new file mode 100644 index 0000000..06e5bae --- /dev/null +++ b/gas/testsuite/gas/mips/mcu.d @@ -0,0 +1,122 @@ +#objdump: -dr --show-raw-insn +#name: MCU for MIPS32r2 +#as: -32 +#source: mcu.s + +.*: +file format .*mips.* + +Disassembly of section \.text: + +[0-9a-f]+ : +[ 0-9a-f]+: 42000038 iret +[ 0-9a-f]+: 04070000 aclr 0x0,0\(zero\) +[ 0-9a-f]+: 04070000 aclr 0x0,0\(zero\) +[ 0-9a-f]+: 04070000 aclr 0x0,0\(zero\) +[ 0-9a-f]+: 04071000 aclr 0x1,0\(zero\) +[ 0-9a-f]+: 04072000 aclr 0x2,0\(zero\) +[ 0-9a-f]+: 04073000 aclr 0x3,0\(zero\) +[ 0-9a-f]+: 04074000 aclr 0x4,0\(zero\) +[ 0-9a-f]+: 04075000 aclr 0x5,0\(zero\) +[ 0-9a-f]+: 04076000 aclr 0x6,0\(zero\) +[ 0-9a-f]+: 04077000 aclr 0x7,0\(zero\) +[ 0-9a-f]+: 04477000 aclr 0x7,0\(v0\) +[ 0-9a-f]+: 07e77000 aclr 0x7,0\(ra\) +[ 0-9a-f]+: 07e777ff aclr 0x7,2047\(ra\) +[ 0-9a-f]+: 07e77800 aclr 0x7,-2048\(ra\) +[ 0-9a-f]+: 24011000 li at,4096 +[ 0-9a-f]+: 003f0821 addu at,at,ra +[ 0-9a-f]+: 04277800 aclr 0x7,-2048\(at\) +[ 0-9a-f]+: 2401f000 li at,-4096 +[ 0-9a-f]+: 003f0821 addu at,at,ra +[ 0-9a-f]+: 042777ff aclr 0x7,2047\(at\) +[ 0-9a-f]+: 34018000 li at,0x8000 +[ 0-9a-f]+: 003f0821 addu at,at,ra +[ 0-9a-f]+: 04277fff aclr 0x7,-1\(at\) +[ 0-9a-f]+: 24018000 li at,-32768 +[ 0-9a-f]+: 003f0821 addu at,at,ra +[ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 3c010001 lui at,0x1 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 04277fff aclr 0x7,-1\(at\) +[ 0-9a-f]+: 3c010001 lui at,0x1 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 3c01ffff lui at,0xffff +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 24018000 li at,-32768 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 3c01ffff lui at,0xffff +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 04277001 aclr 0x7,1\(at\) +[ 0-9a-f]+: 24018000 li at,-32768 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 04277001 aclr 0x7,1\(at\) +[ 0-9a-f]+: 3c01f000 lui at,0xf000 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 04877fff aclr 0x7,-1\(a0\) +[ 0-9a-f]+: 3c011234 lui at,0x1234 +[ 0-9a-f]+: 34215000 ori at,at,0x5000 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 04277678 aclr 0x7,1656\(at\) +[ 0-9a-f]+: 24610000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MIPS_LO16 foo +[ 0-9a-f]+: 04271000 aclr 0x1,0\(at\) +[ 0-9a-f]+: 24610000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MIPS_LO16 foo +[ 0-9a-f]+: 04279000 aset 0x1,0\(at\) +[ 0-9a-f]+: 04078000 aset 0x0,0\(zero\) +[ 0-9a-f]+: 04078000 aset 0x0,0\(zero\) +[ 0-9a-f]+: 04078000 aset 0x0,0\(zero\) +[ 0-9a-f]+: 04079000 aset 0x1,0\(zero\) +[ 0-9a-f]+: 0407a000 aset 0x2,0\(zero\) +[ 0-9a-f]+: 0407b000 aset 0x3,0\(zero\) +[ 0-9a-f]+: 0407c000 aset 0x4,0\(zero\) +[ 0-9a-f]+: 0407d000 aset 0x5,0\(zero\) +[ 0-9a-f]+: 0407e000 aset 0x6,0\(zero\) +[ 0-9a-f]+: 0407f000 aset 0x7,0\(zero\) +[ 0-9a-f]+: 0447f000 aset 0x7,0\(v0\) +[ 0-9a-f]+: 07e7f000 aset 0x7,0\(ra\) +[ 0-9a-f]+: 07e7f7ff aset 0x7,2047\(ra\) +[ 0-9a-f]+: 07e7f800 aset 0x7,-2048\(ra\) +[ 0-9a-f]+: 24011000 li at,4096 +[ 0-9a-f]+: 003f0821 addu at,at,ra +[ 0-9a-f]+: 0427f800 aset 0x7,-2048\(at\) +[ 0-9a-f]+: 2401f000 li at,-4096 +[ 0-9a-f]+: 003f0821 addu at,at,ra +[ 0-9a-f]+: 0427f7ff aset 0x7,2047\(at\) +[ 0-9a-f]+: 34018000 li at,0x8000 +[ 0-9a-f]+: 003f0821 addu at,at,ra +[ 0-9a-f]+: 0427ffff aset 0x7,-1\(at\) +[ 0-9a-f]+: 24018000 li at,-32768 +[ 0-9a-f]+: 003f0821 addu at,at,ra +[ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) +[ 0-9a-f]+: 3c010001 lui at,0x1 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 0427ffff aset 0x7,-1\(at\) +[ 0-9a-f]+: 3c010001 lui at,0x1 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) +[ 0-9a-f]+: 3c01ffff lui at,0xffff +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) +[ 0-9a-f]+: 24018000 li at,-32768 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) +[ 0-9a-f]+: 3c01ffff lui at,0xffff +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 0427f001 aset 0x7,1\(at\) +[ 0-9a-f]+: 24018000 li at,-32768 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 0427f001 aset 0x7,1\(at\) +[ 0-9a-f]+: 3c01f000 lui at,0xf000 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) +[ 0-9a-f]+: 0487ffff aset 0x7,-1\(a0\) +[ 0-9a-f]+: 3c011234 lui at,0x1234 +[ 0-9a-f]+: 34215000 ori at,at,0x5000 +[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 0427f678 aset 0x7,1656\(at\) + \.\.\. diff --git a/gas/testsuite/gas/mips/mcu.s b/gas/testsuite/gas/mips/mcu.s new file mode 100644 index 0000000..182008a --- /dev/null +++ b/gas/testsuite/gas/mips/mcu.s @@ -0,0 +1,70 @@ + .text + .set mcu + .ent foo + .globl foo +foo: + iret + + aclr 0, 0 + aclr 0, ($0) + aclr 0, 0($0) + aclr 1, 0($0) + aclr 2, 0($0) + aclr 3, 0($0) + aclr 4, 0($0) + aclr 5, 0($0) + aclr 6, 0($0) + aclr 7, 0($0) + aclr 7, 0($2) + aclr 7, 0($31) + aclr 7, 2047($31) + aclr 7, -2048($31) + aclr 7, 2048($31) + aclr 7, -2049($31) + aclr 7, 32767($31) + aclr 7, -32768($31) + aclr 7, 65535($4) + aclr 7, 65536($4) + aclr 7, 0xffff0000($4) + aclr 7, 0xffff8000($4) + aclr 7, 0xffff0001($4) + aclr 7, 0xffff8001($4) + aclr 7, 0xf0000000($4) + aclr 7, 0xffffffff($4) + aclr 7, 0x12345678($4) + + aclr 1, %lo(foo)($3) + aset 1, %lo(foo)($3) + + aset 0, 0 + aset 0, ($0) + aset 0, 0($0) + aset 1, 0($0) + aset 2, 0($0) + aset 3, 0($0) + aset 4, 0($0) + aset 5, 0($0) + aset 6, 0($0) + aset 7, 0($0) + aset 7, 0($2) + aset 7, 0($31) + aset 7, 2047($31) + aset 7, -2048($31) + aset 7, 2048($31) + aset 7, -2049($31) + aset 7, 32767($31) + aset 7, -32768($31) + aset 7, 65535($4) + aset 7, 65536($4) + aset 7, 0xffff0000($4) + aset 7, 0xffff8000($4) + aset 7, 0xffff0001($4) + aset 7, 0xffff8001($4) + aset 7, 0xf0000000($4) + aset 7, 0xffffffff($4) + aset 7, 0x12345678($4) + .end foo + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/micromips-branch-delay.d b/gas/testsuite/gas/mips/micromips-branch-delay.d new file mode 100644 index 0000000..5509934 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-branch-delay.d @@ -0,0 +1,283 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -mmips:micromips +#name: microMIPS branch delay +#as: -32 -march=mips64 -mmicromips +#source: micromips-branch-delay.s +#stderr: micromips-branch-delay.l + +# Test microMIPS branch delay slots. + +.*: +file format .*mips.* + +Disassembly of section \.text: +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 3040 ffff li v0,-1 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 3040 7fff li v0,32767 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 5040 ffff li v0,0xffff +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 41a2 0001 lui v0,0x1 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> ed7f li v0,-1 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 3040 7fff li v0,32767 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 5040 ffff li v0,0xffff +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 41a2 0001 lui v0,0x1 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 3040 ffff li v0,-1 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 3040 7fff li v0,32767 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 5040 ffff li v0,0xffff +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 41a2 0001 lui v0,0x1 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d ffff addiu v0,sp,-1 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 0008 addiu v0,sp,8 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 0100 addiu v0,sp,256 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 7fff addiu v0,sp,32767 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d ffff addiu v0,sp,-1 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 6d05 addiu v0,sp,8 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 0100 addiu v0,sp,256 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 7fff addiu v0,sp,32767 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d ffff addiu v0,sp,-1 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 0008 addiu v0,sp,8 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 0100 addiu v0,sp,256 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 7fff addiu v0,sp,32767 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd ffff addiu sp,sp,-1 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 0008 addiu sp,sp,8 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 0100 addiu sp,sp,256 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 7fff addiu sp,sp,32767 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 4fbe addiu sp,sp,-1 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 4c05 addiu sp,sp,8 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 4c81 addiu sp,sp,256 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 7fff addiu sp,sp,32767 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd ffff addiu sp,sp,-1 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 0008 addiu sp,sp,8 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 0100 addiu sp,sp,256 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 7fff addiu sp,sp,32767 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d ffff addiu v0,sp,-1 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 0008 addiu v0,sp,8 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 0100 addiu v0,sp,256 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 7fff addiu v0,sp,32767 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 41a1 0001 lui at,0x1 +([0-9a-f]+) <[^>]*> 003d 1150 addu v0,sp,at +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d ffff addiu v0,sp,-1 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 0008 addiu v0,sp,8 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 0100 addiu v0,sp,256 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 7fff addiu v0,sp,32767 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 41a1 0001 lui at,0x1 +([0-9a-f]+) <[^>]*> 003d 1150 addu v0,sp,at +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d ffff addiu v0,sp,-1 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 0008 addiu v0,sp,8 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 0100 addiu v0,sp,256 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 305d 7fff addiu v0,sp,32767 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 41a1 0001 lui at,0x1 +([0-9a-f]+) <[^>]*> 003d 1150 addu v0,sp,at +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd ffff addiu sp,sp,-1 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 0008 addiu sp,sp,8 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 0100 addiu sp,sp,256 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 7fff addiu sp,sp,32767 +([0-9a-f]+) <[^>]*> 4022 fffe bltzal v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 41a1 0001 lui at,0x1 +([0-9a-f]+) <[^>]*> 003d e950 addu sp,sp,at +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd ffff addiu sp,sp,-1 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 0008 addiu sp,sp,8 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 0100 addiu sp,sp,256 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 7fff addiu sp,sp,32767 +([0-9a-f]+) <[^>]*> 4222 fffe bltzals v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 41a1 0001 lui at,0x1 +([0-9a-f]+) <[^>]*> 003d e950 addu sp,sp,at +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd ffff addiu sp,sp,-1 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 0008 addiu sp,sp,8 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 0100 addiu sp,sp,256 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 33bd 7fff addiu sp,sp,32767 +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +([0-9a-f]+) <[^>]*> 41a1 0001 lui at,0x1 +([0-9a-f]+) <[^>]*> 003d e950 addu sp,sp,at +([0-9a-f]+) <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips-branch-delay.l b/gas/testsuite/gas/mips/micromips-branch-delay.l new file mode 100644 index 0000000..5ec081f --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-branch-delay.l @@ -0,0 +1,24 @@ +.*: Assembler messages: +.*:17: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:19: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:21: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:40: Warning: Wrong size instruction in a 16-bit branch delay slot +.*:44: Warning: Wrong size instruction in a 16-bit branch delay slot +.*:46: Warning: Wrong size instruction in a 16-bit branch delay slot +.*:71: Warning: Wrong size instruction in a 16-bit branch delay slot +.*:90: Warning: Macro instruction expanded into multiple instructions in a branch delay slot +.*:92: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:94: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:96: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:98: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:100: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:100: Warning: Macro instruction expanded into multiple instructions in a branch delay slot +.*:110: Warning: Macro instruction expanded into multiple instructions in a branch delay slot +.*:121: Warning: Macro instruction expanded into multiple instructions in a branch delay slot +.*:123: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:125: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:127: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:129: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:131: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:131: Warning: Macro instruction expanded into multiple instructions in a branch delay slot +.*:141: Warning: Macro instruction expanded into multiple instructions in a branch delay slot diff --git a/gas/testsuite/gas/mips/micromips-branch-delay.s b/gas/testsuite/gas/mips/micromips-branch-delay.s new file mode 100644 index 0000000..6f61582 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-branch-delay.s @@ -0,0 +1,146 @@ +# Source file used to test microMIPS branch delay slots. + + .text +foo: + .set noreorder + bltzal $2, . + li $2, -1 + bltzal $2, . + li $2, 0x7fff + bltzal $2, . + li $2, 0xffff + bltzal $2, . + li $2, 0x10000 + bltzals $2, . + li $2, -1 + bltzals $2, . + li $2, 0x7fff + bltzals $2, . + li $2, 0xffff + bltzals $2, . + li $2, 0x10000 + bltzall $2, . + li $2, -1 + bltzall $2, . + li $2, 0x7fff + bltzall $2, . + li $2, 0xffff + bltzall $2, . + li $2, 0x10000 + + bltzal $2, . + addiu $2, $29, -1 + bltzal $2, . + addiu $2, $29, 8 + bltzal $2, . + addiu $2, $29, 256 + bltzal $2, . + addiu $2, $29, 0x7fff + bltzals $2, . + addiu $2, $29, -1 + bltzals $2, . + addiu $2, $29, 8 + bltzals $2, . + addiu $2, $29, 256 + bltzals $2, . + addiu $2, $29, 0x7fff + bltzall $2, . + addiu $2, $29, -1 + bltzall $2, . + addiu $2, $29, 8 + bltzall $2, . + addiu $2, $29, 256 + bltzall $2, . + addiu $2, $29, 0x7fff + + bltzal $2, . + addiu $29, $29, -1 + bltzal $2, . + addiu $29, $29, 8 + bltzal $2, . + addiu $29, $29, 256 + bltzal $2, . + addiu $29, $29, 0x7fff + bltzals $2, . + addiu $29, $29, -1 + bltzals $2, . + addiu $29, $29, 8 + bltzals $2, . + addiu $29, $29, 256 + bltzals $2, . + addiu $29, $29, 0x7fff + bltzall $2, . + addiu $29, $29, -1 + bltzall $2, . + addiu $29, $29, 8 + bltzall $2, . + addiu $29, $29, 256 + bltzall $2, . + addiu $29, $29, 0x7fff + + bltzal $2, . + addu $2, $29, -1 + bltzal $2, . + addu $2, $29, 8 + bltzal $2, . + addu $2, $29, 256 + bltzal $2, . + addu $2, $29, 0x7fff + bltzal $2, . + addu $2, $29, 0x10000 + bltzals $2, . + addu $2, $29, -1 + bltzals $2, . + addu $2, $29, 8 + bltzals $2, . + addu $2, $29, 256 + bltzals $2, . + addu $2, $29, 0x7fff + bltzals $2, . + addu $2, $29, 0x10000 + bltzall $2, . + addu $2, $29, -1 + bltzall $2, . + addu $2, $29, 8 + bltzall $2, . + addu $2, $29, 256 + bltzall $2, . + addu $2, $29, 0x7fff + bltzall $2, . + addu $2, $29, 0x10000 + + bltzal $2, . + addu $29, $29, -1 + bltzal $2, . + addu $29, $29, 8 + bltzal $2, . + addu $29, $29, 256 + bltzal $2, . + addu $29, $29, 0x7fff + bltzal $2, . + addu $29, $29, 0x10000 + bltzals $2, . + addu $29, $29, -1 + bltzals $2, . + addu $29, $29, 8 + bltzals $2, . + addu $29, $29, 256 + bltzals $2, . + addu $29, $29, 0x7fff + bltzals $2, . + addu $29, $29, 0x10000 + bltzall $2, . + addu $29, $29, -1 + bltzall $2, . + addu $29, $29, 8 + bltzall $2, . + addu $29, $29, 256 + bltzall $2, . + addu $29, $29, 0x7fff + bltzall $2, . + addu $29, $29, 0x10000 + .set reorder + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/micromips-branch-relax-pic.d b/gas/testsuite/gas/mips/micromips-branch-relax-pic.d new file mode 100644 index 0000000..5ccf7d9 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-branch-relax-pic.d @@ -0,0 +1,625 @@ +#objdump: -dr --show-raw-insn +#name: Relax microMIPS branches (pic) +#as: -mips32r2 -32 -relax-branch -KPIC +#stderr: micromips-branch-relax-pic.l +#source: micromips-branch-relax.s + +.*: +file format .*mips.* + +Disassembly of section \.text: + +[0-9a-f]+ : +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: cfff b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40e0 fffe bc [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 4260 fffe bals [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: cfff b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40e0 fffe bc [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 4260 fffe bals [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: cfff b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40e0 fffe bc [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 4260 fffe bals [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: ff3c 0001 lw t9,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3339 045d addiu t9,t9,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 03f9 0f3c jalr t9 +[ ]*[0-9a-f]+: R_MICROMIPS_JALR test3 +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 45a1 jrc at +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 45c1 jalr at +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 45e1 jalrs at +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b483 fffe bne v1,a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9483 fffe beq v1,a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40d4 fffe bgtz s4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4094 fffe blez s4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40a3 fffe bnezc v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 45a1 jrc at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40e3 fffe beqzc v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 45a1 jrc at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 401e fffe bltz s8,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 45c1 jalr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 405e fffe bgez s8,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 45c1 jalr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 401e fffe bltz s8,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 45e1 jalrs at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 405e fffe bgez s8,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 45e1 jalrs at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 43a0 fffe bc1t [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 42a0 fffe bc2t [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4280 fffe bc2f [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b483 fffe bne v1,a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0083 0b50 slt at,v1,a0 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0083 0b50 slt at,v1,a0 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0083 0b90 sltu at,v1,a0 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0083 0b90 sltu at,v1,a0 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 45c1 jalr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0064 0b50 slt at,a0,v1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0064 0b50 slt at,a0,v1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0064 0b90 sltu at,a0,v1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0064 0b90 sltu at,a0,v1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4083 fffe blez v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0064 0b50 slt at,a0,v1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0064 0b50 slt at,a0,v1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0064 0b90 sltu at,a0,v1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0064 0b90 sltu at,a0,v1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40c3 fffe bgtz v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0083 0b50 slt at,v1,a0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0083 0b50 slt at,v1,a0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0083 0b90 sltu at,v1,a0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0083 0b90 sltu at,v1,a0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 45c1 jalr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9483 fffe beq v1,a0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: fc3c 0001 lw at,1\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[ 0-9a-f]+: 3021 045d addiu at,at,1117 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[ 0-9a-f]+: 4581 jr at +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: + \.\.\. + +[0-9a-f]+ : + \.\.\. + +[0-9a-f]+ : +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips-branch-relax-pic.l b/gas/testsuite/gas/mips/micromips-branch-relax-pic.l new file mode 100644 index 0000000..ca3bdce --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-branch-relax-pic.l @@ -0,0 +1,50 @@ +.*: Assembler messages: +.*:61: Warning: No .cprestore pseudo-op used in PIC code +.*:59: Warning: Relaxed out-of-range branch into a jump +.*:63: Warning: Relaxed out-of-range branch into a jump +.*:65: Warning: Relaxed out-of-range branch into a jump +.*:67: Warning: Relaxed out-of-range branch into a jump +.*:69: Warning: Relaxed out-of-range branch into a jump +.*:71: Warning: Relaxed out-of-range branch into a jump +.*:73: Warning: Relaxed out-of-range branch into a jump +.*:75: Warning: Relaxed out-of-range branch into a jump +.*:77: Warning: Relaxed out-of-range branch into a jump +.*:79: Warning: Relaxed out-of-range branch into a jump +.*:81: Warning: Relaxed out-of-range branch into a jump +.*:83: Warning: Relaxed out-of-range branch into a jump +.*:85: Warning: Relaxed out-of-range branch into a jump +.*:87: Warning: Relaxed out-of-range branch into a jump +.*:89: Warning: Relaxed out-of-range branch into a jump +.*:91: Warning: Relaxed out-of-range branch into a jump +.*:93: Warning: Relaxed out-of-range branch into a jump +.*:95: Warning: Relaxed out-of-range branch into a jump +.*:97: Warning: Relaxed out-of-range branch into a jump +.*:99: Warning: Relaxed out-of-range branch into a jump +.*:101: Warning: Relaxed out-of-range branch into a jump +.*:103: Warning: Relaxed out-of-range branch into a jump +.*:105: Warning: Relaxed out-of-range branch into a jump +.*:107: Warning: Relaxed out-of-range branch into a jump +.*:109: Warning: Relaxed out-of-range branch into a jump +.*:111: Warning: Relaxed out-of-range branch into a jump +.*:113: Warning: Relaxed out-of-range branch into a jump +.*:115: Warning: Relaxed out-of-range branch into a jump +.*:117: Warning: Relaxed out-of-range branch into a jump +.*:119: Warning: Relaxed out-of-range branch into a jump +.*:121: Warning: Relaxed out-of-range branch into a jump +.*:123: Warning: Relaxed out-of-range branch into a jump +.*:125: Warning: Relaxed out-of-range branch into a jump +.*:127: Warning: Relaxed out-of-range branch into a jump +.*:129: Warning: Relaxed out-of-range branch into a jump +.*:131: Warning: Relaxed out-of-range branch into a jump +.*:133: Warning: Relaxed out-of-range branch into a jump +.*:135: Warning: Relaxed out-of-range branch into a jump +.*:137: Warning: Relaxed out-of-range branch into a jump +.*:139: Warning: Relaxed out-of-range branch into a jump +.*:141: Warning: Relaxed out-of-range branch into a jump +.*:143: Warning: Relaxed out-of-range branch into a jump +.*:145: Warning: Relaxed out-of-range branch into a jump +.*:147: Warning: Relaxed out-of-range branch into a jump +.*:149: Warning: Relaxed out-of-range branch into a jump +.*:151: Warning: Relaxed out-of-range branch into a jump +.*:153: Warning: Relaxed out-of-range branch into a jump +.*:155: Warning: Relaxed out-of-range branch into a jump diff --git a/gas/testsuite/gas/mips/micromips-branch-relax.d b/gas/testsuite/gas/mips/micromips-branch-relax.d new file mode 100644 index 0000000..66cc9ab --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-branch-relax.d @@ -0,0 +1,479 @@ +#objdump: -dr --show-raw-insn +#name: Relax microMIPS branches +#as: -mips32r2 -32 -relax-branch +#stderr: micromips-branch-relax.l +#source: micromips-branch-relax.s + +.*: +file format .*mips.* + +Disassembly of section \.text: + +[0-9a-f]+ : +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: cfff b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40e0 fffe bc [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 4260 fffe bals [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: cfff b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40e0 fffe bc [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 4260 fffe bals [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: cfff b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40e0 fffe bc [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 4260 fffe bals [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: f400 0000 jal 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: f400 0000 jal 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 7400 0000 jals 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b483 fffe bne v1,a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9483 fffe beq v1,a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40d4 fffe bgtz s4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4094 fffe blez s4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40a3 fffe bnezc v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 0c00 nop + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40e3 fffe beqzc v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 0c00 nop + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 401e fffe bltz s8,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: f400 0000 jal 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 405e fffe bgez s8,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: f400 0000 jal 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 401e fffe bltz s8,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 7400 0000 jals 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 405e fffe bgez s8,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 7400 0000 jals 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 43a0 fffe bc1t [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 42a0 fffe bc2t [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4280 fffe bc2f [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b483 fffe bne v1,a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0083 0b50 slt at,v1,a0 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0083 0b50 slt at,v1,a0 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0083 0b90 sltu at,v1,a0 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0083 0b90 sltu at,v1,a0 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: f400 0000 jal 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0064 0b50 slt at,a0,v1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0064 0b50 slt at,a0,v1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0064 0b90 sltu at,a0,v1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0064 0b90 sltu at,a0,v1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4083 fffe blez v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0064 0b50 slt at,a0,v1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0064 0b50 slt at,a0,v1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0064 0b90 sltu at,a0,v1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0064 0b90 sltu at,a0,v1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40c3 fffe bgtz v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0083 0b50 slt at,v1,a0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0083 0b50 slt at,v1,a0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0083 0b90 sltu at,v1,a0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 0083 0b90 sltu at,v1,a0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: f400 0000 jal 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9483 fffe beq v1,a0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 +[ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: d400 0000 j 0 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test3 +[ 0-9a-f]+: 00a4 1b10 xor v1,a0,a1 + +[0-9a-f]+ <.*>: + \.\.\. + +[0-9a-f]+ : + \.\.\. + +[0-9a-f]+ : +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips-branch-relax.l b/gas/testsuite/gas/mips/micromips-branch-relax.l new file mode 100644 index 0000000..bb7599e --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-branch-relax.l @@ -0,0 +1,48 @@ +.*: Assembler messages: +.*:63: Warning: Relaxed out-of-range branch into a jump +.*:65: Warning: Relaxed out-of-range branch into a jump +.*:67: Warning: Relaxed out-of-range branch into a jump +.*:69: Warning: Relaxed out-of-range branch into a jump +.*:71: Warning: Relaxed out-of-range branch into a jump +.*:73: Warning: Relaxed out-of-range branch into a jump +.*:75: Warning: Relaxed out-of-range branch into a jump +.*:77: Warning: Relaxed out-of-range branch into a jump +.*:79: Warning: Relaxed out-of-range branch into a jump +.*:81: Warning: Relaxed out-of-range branch into a jump +.*:83: Warning: Relaxed out-of-range branch into a jump +.*:85: Warning: Relaxed out-of-range branch into a jump +.*:87: Warning: Relaxed out-of-range branch into a jump +.*:89: Warning: Relaxed out-of-range branch into a jump +.*:91: Warning: Relaxed out-of-range branch into a jump +.*:93: Warning: Relaxed out-of-range branch into a jump +.*:95: Warning: Relaxed out-of-range branch into a jump +.*:97: Warning: Relaxed out-of-range branch into a jump +.*:99: Warning: Relaxed out-of-range branch into a jump +.*:101: Warning: Relaxed out-of-range branch into a jump +.*:103: Warning: Relaxed out-of-range branch into a jump +.*:105: Warning: Relaxed out-of-range branch into a jump +.*:107: Warning: Relaxed out-of-range branch into a jump +.*:109: Warning: Relaxed out-of-range branch into a jump +.*:111: Warning: Relaxed out-of-range branch into a jump +.*:113: Warning: Relaxed out-of-range branch into a jump +.*:115: Warning: Relaxed out-of-range branch into a jump +.*:117: Warning: Relaxed out-of-range branch into a jump +.*:119: Warning: Relaxed out-of-range branch into a jump +.*:121: Warning: Relaxed out-of-range branch into a jump +.*:123: Warning: Relaxed out-of-range branch into a jump +.*:125: Warning: Relaxed out-of-range branch into a jump +.*:127: Warning: Relaxed out-of-range branch into a jump +.*:129: Warning: Relaxed out-of-range branch into a jump +.*:131: Warning: Relaxed out-of-range branch into a jump +.*:133: Warning: Relaxed out-of-range branch into a jump +.*:135: Warning: Relaxed out-of-range branch into a jump +.*:137: Warning: Relaxed out-of-range branch into a jump +.*:139: Warning: Relaxed out-of-range branch into a jump +.*:141: Warning: Relaxed out-of-range branch into a jump +.*:143: Warning: Relaxed out-of-range branch into a jump +.*:145: Warning: Relaxed out-of-range branch into a jump +.*:147: Warning: Relaxed out-of-range branch into a jump +.*:149: Warning: Relaxed out-of-range branch into a jump +.*:151: Warning: Relaxed out-of-range branch into a jump +.*:153: Warning: Relaxed out-of-range branch into a jump +.*:155: Warning: Relaxed out-of-range branch into a jump diff --git a/gas/testsuite/gas/mips/micromips-branch-relax.s b/gas/testsuite/gas/mips/micromips-branch-relax.s new file mode 100644 index 0000000..321bd20 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-branch-relax.s @@ -0,0 +1,167 @@ + .text + .set micromips + .set noreorder +test: + b32 test + addu $3, $4, $5 + beqz32 $3, test + addu $3, $4, $5 + bnez32 $3, test + addu $3, $4, $5 + b test + addu $3, $4, $5 + bc test + addu $3, $4, $5 + bal test + addu $3, $4, $5 + bals test + addu $3, $4, $5 + beqz $3, test + addu $3, $4, $5 + bnez $3, test + addu $3, $4, $5 + b16 test2 + addu $3, $4, $5 + beqz16 $3, test2 + addu $3, $4, $5 + bnez16 $3, test2 + addu $3, $4, $5 + b test2 + addu $3, $4, $5 + bc test2 + addu $3, $4, $5 + bal test2 + addu $3, $4, $5 + bals test2 + addu $3, $4, $5 + beqz $3, test2 + addu $3, $4, $5 + bnez $3, test2 + addu $3, $4, $5 + b16 test3 + addu $3, $4, $5 + beqz16 $3, test3 + addu $3, $4, $5 + bnez16 $3, test3 + addu $3, $4, $5 + b32 test2 + addu $3, $4, $5 + bc32 test2 + addu $3, $4, $5 + bal32 test2 + addu $3, $4, $5 + bals32 test2 + addu $3, $4, $5 + beqz32 $3, test2 + addu $3, $4, $5 + bnez32 $3, test2 + addu $3, $4, $5 + j test3 + addu $3, $4, $5 + jal test3 + addu $3, $4, $5 + b test3 + addu $3, $4, $5 + bc test3 + addu $3, $4, $5 + bal test3 + addu $3, $4, $5 + bals test3 + addu $3, $4, $5 + beq $3, $4, test3 + addu $3, $4, $5 + bne $3, $4, test3 + addu $3, $4, $5 + bltz $3, test3 + addu $3, $4, $5 + bgez $3, test3 + addu $3, $4, $5 + blez $20, test3 + addu $3, $4, $5 + bgtz $20, test3 + addu $3, $4, $5 + beqzc $3, test3 + addu $3, $4, $5 + bnezc $3, test3 + addu $3, $4, $5 + bgezal $30, test3 + addu $3, $4, $5 + bltzal $30, test3 + addu $3, $4, $5 + bgezals $30, test3 + addu $3, $4, $5 + bltzals $30, test3 + addu $3, $4, $5 + bc1f test3 + addu $3, $4, $5 + bc1t test3 + addu $3, $4, $5 + bc2f test3 + addu $3, $4, $5 + bc2t test3 + addu $3, $4, $5 + beql $3, $4, test3 + addu $3, $4, $5 + beqz $3, test3 + xor $3, $4, $5 + bge $3, $4, test3 + xor $3, $4, $5 + bgel $3, $4, test3 + xor $3, $4, $5 + bgeu $3, $4, test3 + xor $3, $4, $5 + bgeul $3, $4, test3 + xor $3, $4, $5 + bgezall $3, test3 + xor $3, $4, $5 + bgezl $3, test3 + xor $3, $4, $5 + bgt $3, $4, test3 + xor $3, $4, $5 + bgtl $3, $4, test3 + xor $3, $4, $5 + bgtu $3, $4, test3 + xor $3, $4, $5 + bgtul $3, $4, test3 + xor $3, $4, $5 + bgtzl $3, test3 + xor $3, $4, $5 + ble $3, $4, test3 + xor $3, $4, $5 + blel $3, $4, test3 + xor $3, $4, $5 + bleu $3, $4, test3 + xor $3, $4, $5 + bleul $3, $4, test3 + xor $3, $4, $5 + blezl $3, test3 + xor $3, $4, $5 + blt $3, $4, test3 + xor $3, $4, $5 + bltl $3, $4, test3 + xor $3, $4, $5 + bltu $3, $4, test3 + xor $3, $4, $5 + bltul $3, $4, test3 + xor $3, $4, $5 + bltzall $3, test3 + xor $3, $4, $5 + bltzl $3, test3 + xor $3, $4, $5 + bnel $3, $4, test3 + xor $3, $4, $5 + bnez $3, test3 + xor $3, $4, $5 + bnezl $3, test3 + xor $3, $4, $5 + + .skip 511 << 1 +test2: + + .skip (32767 - 511) << 1 +test3: + addu $3, $4, $5 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/micromips-size-0.l b/gas/testsuite/gas/mips/micromips-size-0.l new file mode 100644 index 0000000..e7238b0 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-size-0.l @@ -0,0 +1,36 @@ +.*: Assembler messages: +.*:15: Error: Illegal operands `addu16 \$12,\$14' +.*:18: Error: Unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4' +.*:22: Error: Unrecognized 32-bit version of microMIPS opcode `addiusp32 256' +.*:25: Error: Unrecognized opcode `jar \$23' +.*:26: Error: Unrecognized opcode `jar16 \$23' +.*:27: Error: Unrecognized opcode `jar32 \$23' +.*:41: Error: Illegal operands `jalr16 \$30,\$26' +.*:50: Error: Illegal operands `beqz16 \$27,bar' +.*:58: Warning: Wrong size instruction in a 32-bit branch delay slot +.*:66: Warning: Wrong size instruction in a 16-bit branch delay slot +.*:70: Error: Unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4' +.*:74: Warning: Wrong size instruction in a 16-bit branch delay slot +.*:76: Error: Unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4' +.*:77: Warning: Wrong size instruction in a 16-bit branch delay slot +.*:78: Warning: Wrong size instruction in a 16-bit branch delay slot +.*:80: Warning: Wrong size instruction in a 32-bit branch delay slot +.*:82: Warning: Wrong size instruction in a 32-bit branch delay slot +.*:84: Error: Unrecognized 32-bit version of microMIPS opcode `addiusp32 256' +.*:90: Error: Unrecognized 32-bit version of microMIPS opcode `addiusp32 256' +.*:95: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot +.*:95: Warning: Macro instruction expanded into multiple instructions in a branch delay slot +.*:98: Warning: Wrong size instruction in a 32-bit branch delay slot +.*:104: Error: Unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4' +.*:105: Warning: Macro instruction expanded into multiple instructions in a branch delay slot +.*:108: Warning: Wrong size instruction in a 32-bit branch delay slot +.*:110: Warning: Wrong size instruction in a 32-bit branch delay slot +.*:112: Error: Unrecognized 32-bit version of microMIPS opcode `addiusp32 256' +.*:120: Error: Illegal operands `sll16 \$2,\$3,13' +.*:123: Error: Illegal operands `sll16 \$10,\$11,5' +.*:128: Error: Unrecognized 16-bit version of microMIPS opcode `dsll16 \$2,\$3,5' +.*:130: Error: Unrecognized 16-bit version of microMIPS opcode `dsll3216 \$2,\$3,5' +.*:133: Error: Unrecognized 16-bit version of microMIPS opcode `dsll16 \$2,\$3,13' +.*:135: Error: Unrecognized 16-bit version of microMIPS opcode `dsll3216 \$2,\$3,13' +.*:138: Error: Unrecognized 16-bit version of microMIPS opcode `dsll16 \$10,\$11,5' +.*:140: Error: Unrecognized 16-bit version of microMIPS opcode `dsll3216 \$10,\$11,5' diff --git a/gas/testsuite/gas/mips/micromips-size-0.s b/gas/testsuite/gas/mips/micromips-size-0.s new file mode 100644 index 0000000..c58e543 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-size-0.s @@ -0,0 +1,145 @@ +# Source file used to test the microMIPS instruction size overrides (#0). + + .text +foo: +# Smoke-test a trivial case. + nop + nop16 + nop32 + +# Test ALU operations. + addu $2, $4 + addu16 $2, $4 + addu32 $2, $4 + addu $12, $14 + addu16 $12, $14 + addu32 $12, $14 + add.ps $f2, $f4 + add16.ps $f2, $f4 + add32.ps $f2, $f4 + addiusp 256 + addiusp16 256 + addiusp32 256 + +# Test jumps and branches. + jar $23 + jar16 $23 + jar32 $23 + jalr $4 + jalr16 $4 + jalr32 $4 + jalr $24 + jalr16 $24 + jalr32 $24 + jalr $31,$5 + jalr16 $31,$5 + jalr32 $31,$5 + jalr $31,$25 + jalr16 $31,$25 + jalr32 $31,$25 + jalr $30,$26 + jalr16 $30,$26 + jalr32 $30,$26 + b bar + b16 bar + b32 bar + beqz $7, bar + beqz16 $7, bar + beqz32 $7, bar + beqz $27, bar + beqz16 $27, bar + beqz32 $27, bar + +# Test branch delay slots. + .set noreorder + bltzal $2, bar + addu $16, $17 + bltzal $2, bar + addu16 $16, $17 + bltzal $2, bar + addu32 $16, $17 + bltzals $2, bar + addu $16, $17 + bltzals $2, bar + addu16 $16, $17 + bltzals $2, bar + addu32 $16, $17 + bltzal $2, bar + add.ps $f2, $f4 + bltzal $2, bar + add16.ps $f2, $f4 + bltzal $2, bar + add32.ps $f2, $f4 + bltzals $2, bar + add.ps $f2, $f4 + bltzals $2, bar + add16.ps $f2, $f4 + bltzals $2, bar + add32.ps $f2, $f4 + bltzal $2, bar + addiusp 256 + bltzal $2, bar + addiusp16 256 + bltzal $2, bar + addiusp32 256 + bltzals $2, bar + addiusp 256 + bltzals $2, bar + addiusp16 256 + bltzals $2, bar + addiusp32 256 + .set reorder + +# Test macro delay slots. + .set noreorder + bltzall $2, bar + addu $16, $17 + bltzall $2, bar + addu16 $16, $17 + bltzall $2, bar + addu32 $16, $17 + bltzall $2, bar + add.ps $f2, $f4 + bltzall $2, bar + add16.ps $f2, $f4 + bltzall $2, bar + add32.ps $f2, $f4 + bltzall $2, bar + addiusp 256 + bltzall $2, bar + addiusp16 256 + bltzall $2, bar + addiusp32 256 + .set reorder + +# Test shift instructions to complement 64-bit tests. + sll $2, $3, 5 + sll16 $2, $3, 5 + sll32 $2, $3, 5 + sll $2, $3, 13 + sll16 $2, $3, 13 + sll32 $2, $3, 13 + sll $10, $11, 5 + sll16 $10, $11, 5 + sll32 $10, $11, 5 + +# Test 64-bit instructions. + dsll $2, $3, 5 + dsll16 $2, $3, 5 + dsll32 $2, $3, 5 # No way to force 32-bit DSLL. + dsll3216 $2, $3, 5 + dsll3232 $2, $3, 5 + dsll $2, $3, 13 + dsll16 $2, $3, 13 + dsll32 $2, $3, 13 # No way to force 32-bit DSLL. + dsll3216 $2, $3, 13 + dsll3232 $2, $3, 13 + dsll $10, $11, 5 + dsll16 $10, $11, 5 + dsll32 $10, $11, 5 # No way to force 32-bit DSLL. + dsll3216 $10, $11, 5 + dsll3232 $10, $11, 5 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/micromips-size-1.d b/gas/testsuite/gas/mips/micromips-size-1.d new file mode 100644 index 0000000..1fd93be --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-size-1.d @@ -0,0 +1,177 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -mmips:micromips +#name: microMIPS instruction size 1 +#as: -32 -march=mips64 -mmicromips +#source: micromips-size-1.s +#stderr: micromips-size-1.l + +# Test microMIPS instruction size overrides (#1). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 0544 addu v0,v0,a0 +[0-9a-f]+ <[^>]*> 0544 addu v0,v0,a0 +[0-9a-f]+ <[^>]*> 0082 1150 addu v0,v0,a0 +[0-9a-f]+ <[^>]*> 01cc 6150 addu t4,t4,t6 +[0-9a-f]+ <[^>]*> 01cc 6150 addu t4,t4,t6 +[0-9a-f]+ <[^>]*> 5482 1230 add\.ps \$f2,\$f2,\$f4 +[0-9a-f]+ <[^>]*> 5482 1230 add\.ps \$f2,\$f2,\$f4 +[0-9a-f]+ <[^>]*> 4c81 addiu sp,sp,256 +[0-9a-f]+ <[^>]*> 4c81 addiu sp,sp,256 +[0-9a-f]+ <[^>]*> 45c4 jalr a0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 45c4 jalr a0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 03e4 0f3c jalr a0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 45d8 jalr t8 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 45d8 jalr t8 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 03f8 0f3c jalr t8 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 45c5 jalr a1 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 45c5 jalr a1 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 03e5 0f3c jalr a1 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 45d9 jalr t9 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 45d9 jalr t9 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 03f9 0f3c jalr t9 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 03da 0f3c jalr s8,k0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 03da 0f3c jalr s8,k0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 9400 fffe b 0+0084 <.*\+0x84> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> cfff b 0+008a <.*\+0x8a> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 fffe b 0+008e <.*\+0x8e> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9407 fffe beqz a3,0+0094 <.*\+0x94> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 8fff beqz a3,0+009a <.*\+0x9a> + 9a: R_MICROMIPS_PC7_S1 bar +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9407 fffe beqz a3,0+009e <.*\+0x9e> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 941b fffe beqz k1,0+00a4 <.*\+0xa4> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 941b fffe beqz k1,0+00aa <.*\+0xaa> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4022 fffe bltzal v0,0+00b0 <.*\+0xb0> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0230 8150 addu s0,s0,s1 +[0-9a-f]+ <[^>]*> 4022 fffe bltzal v0,0+00b8 <.*\+0xb8> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0410 addu s0,s0,s1 +[0-9a-f]+ <[^>]*> 4022 fffe bltzal v0,0+00be <.*\+0xbe> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0230 8150 addu s0,s0,s1 +[0-9a-f]+ <[^>]*> 4222 fffe bltzals v0,0+00c6 <.*\+0xc6> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0410 addu s0,s0,s1 +[0-9a-f]+ <[^>]*> 4222 fffe bltzals v0,0+00cc <.*\+0xcc> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0410 addu s0,s0,s1 +[0-9a-f]+ <[^>]*> 4222 fffe bltzals v0,0+00d2 <.*\+0xd2> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0230 8150 addu s0,s0,s1 +[0-9a-f]+ <[^>]*> 4022 fffe bltzal v0,0+00da <.*\+0xda> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 5482 1230 add\.ps \$f2,\$f2,\$f4 +[0-9a-f]+ <[^>]*> 4022 fffe bltzal v0,0+00e2 <.*\+0xe2> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 5482 1230 add\.ps \$f2,\$f2,\$f4 +[0-9a-f]+ <[^>]*> 4222 fffe bltzals v0,0+00ea <.*\+0xea> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 5482 1230 add\.ps \$f2,\$f2,\$f4 +[0-9a-f]+ <[^>]*> 4222 fffe bltzals v0,0+00f2 <.*\+0xf2> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 5482 1230 add\.ps \$f2,\$f2,\$f4 +[0-9a-f]+ <[^>]*> 4022 fffe bltzal v0,0+00fa <.*\+0xfa> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 4c81 addiu sp,sp,256 +[0-9a-f]+ <[^>]*> 4022 fffe bltzal v0,0+0100 <.*\+0x100> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 4c81 addiu sp,sp,256 +[0-9a-f]+ <[^>]*> 4222 fffe bltzals v0,0+0106 <.*\+0x106> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 4c81 addiu sp,sp,256 +[0-9a-f]+ <[^>]*> 4222 fffe bltzals v0,0+010c <.*\+0x10c> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 4c81 addiu sp,sp,256 +[0-9a-f]+ <[^>]*> 4042 fffe bgez v0,0+0112 <.*\+0x112> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0118 <.*\+0x118> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0230 8150 addu s0,s0,s1 +[0-9a-f]+ <[^>]*> 4042 fffe bgez v0,0+0120 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0126 <.*\+0x6> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0410 addu s0,s0,s1 +[0-9a-f]+ <[^>]*> 4042 fffe bgez v0,0+012c <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0132 <.*\+0x6> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0230 8150 addu s0,s0,s1 +[0-9a-f]+ <[^>]*> 4042 fffe bgez v0,0+013a <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0140 <.*\+0x6> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 5482 1230 add\.ps \$f2,\$f2,\$f4 +[0-9a-f]+ <[^>]*> 4042 fffe bgez v0,0+0148 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+014e <.*\+0x6> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 5482 1230 add\.ps \$f2,\$f2,\$f4 +[0-9a-f]+ <[^>]*> 4042 fffe bgez v0,0+0156 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+015c <.*\+0x6> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 4c81 addiu sp,sp,256 +[0-9a-f]+ <[^>]*> 4042 fffe bgez v0,0+0162 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0168 <.*\+0x6> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 4c81 addiu sp,sp,256 +[0-9a-f]+ <[^>]*> 253a sll v0,v1,5 +[0-9a-f]+ <[^>]*> 253a sll v0,v1,5 +[0-9a-f]+ <[^>]*> 0043 2800 sll v0,v1,0x5 +[0-9a-f]+ <[^>]*> 0043 6800 sll v0,v1,0xd +[0-9a-f]+ <[^>]*> 0043 6800 sll v0,v1,0xd +[0-9a-f]+ <[^>]*> 014b 2800 sll t2,t3,0x5 +[0-9a-f]+ <[^>]*> 014b 2800 sll t2,t3,0x5 +[0-9a-f]+ <[^>]*> 5843 2800 dsll v0,v1,0x5 +[0-9a-f]+ <[^>]*> 5843 2808 dsll32 v0,v1,0x5 +[0-9a-f]+ <[^>]*> 5843 2808 dsll32 v0,v1,0x5 +[0-9a-f]+ <[^>]*> 5843 6800 dsll v0,v1,0xd +[0-9a-f]+ <[^>]*> 5843 6808 dsll32 v0,v1,0xd +[0-9a-f]+ <[^>]*> 5843 6808 dsll32 v0,v1,0xd +[0-9a-f]+ <[^>]*> 594b 2800 dsll t2,t3,0x5 +[0-9a-f]+ <[^>]*> 594b 2808 dsll32 t2,t3,0x5 +[0-9a-f]+ <[^>]*> 594b 2808 dsll32 t2,t3,0x5 +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips-size-1.l b/gas/testsuite/gas/mips/micromips-size-1.l new file mode 100644 index 0000000..1552094 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-size-1.l @@ -0,0 +1,10 @@ +.*: Assembler messages: +.*:50: Warning: Wrong size instruction in a 32-bit branch delay slot +.*:58: Warning: Wrong size instruction in a 16-bit branch delay slot +.*:64: Warning: Wrong size instruction in a 16-bit branch delay slot +.*:66: Warning: Wrong size instruction in a 16-bit branch delay slot +.*:68: Warning: Wrong size instruction in a 32-bit branch delay slot +.*:70: Warning: Wrong size instruction in a 32-bit branch delay slot +.*:82: Warning: Wrong size instruction in a 32-bit branch delay slot +.*:90: Warning: Wrong size instruction in a 32-bit branch delay slot +.*:92: Warning: Wrong size instruction in a 32-bit branch delay slot diff --git a/gas/testsuite/gas/mips/micromips-size-1.s b/gas/testsuite/gas/mips/micromips-size-1.s new file mode 100644 index 0000000..790adc0 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-size-1.s @@ -0,0 +1,117 @@ +# Source file used to test microMIPS instruction size overrides (#1). + + .text +foo: +# Smoke-test a trivial case. + nop + nop16 + nop32 + +# Test ALU operations. + addu $2, $4 + addu16 $2, $4 + addu32 $2, $4 + addu $12, $14 + addu32 $12, $14 + add.ps $f2, $f4 + add32.ps $f2, $f4 + addiusp 256 + addiusp16 256 + +# Test jumps and branches. + jalr $4 + jalr16 $4 + jalr32 $4 + jalr $24 + jalr16 $24 + jalr32 $24 + jalr $31,$5 + jalr16 $31,$5 + jalr32 $31,$5 + jalr $31,$25 + jalr16 $31,$25 + jalr32 $31,$25 + jalr $30,$26 + jalr32 $30,$26 + b bar + b16 bar + b32 bar + beqz $7, bar + beqz16 $7, bar + beqz32 $7, bar + beqz $27, bar + beqz32 $27, bar + +# Test branch delay slots. + .set noreorder + bltzal $2, bar + addu $16, $17 + bltzal $2, bar + addu16 $16, $17 + bltzal $2, bar + addu32 $16, $17 + bltzals $2, bar + addu $16, $17 + bltzals $2, bar + addu16 $16, $17 + bltzals $2, bar + addu32 $16, $17 + bltzal $2, bar + add.ps $f2, $f4 + bltzal $2, bar + add32.ps $f2, $f4 + bltzals $2, bar + add.ps $f2, $f4 + bltzals $2, bar + add32.ps $f2, $f4 + bltzal $2, bar + addiusp 256 + bltzal $2, bar + addiusp16 256 + bltzals $2, bar + addiusp 256 + bltzals $2, bar + addiusp16 256 + .set reorder + +# Test macro delay slots. + .set noreorder + bltzall $2, bar + addu $16, $17 + bltzall $2, bar + addu16 $16, $17 + bltzall $2, bar + addu32 $16, $17 + bltzall $2, bar + add.ps $f2, $f4 + bltzall $2, bar + add32.ps $f2, $f4 + bltzall $2, bar + addiusp 256 + bltzall $2, bar + addiusp16 256 + .set reorder + +# Test shift instructions to complement 64-bit tests. + sll $2, $3, 5 + sll16 $2, $3, 5 + sll32 $2, $3, 5 + sll $2, $3, 13 + sll32 $2, $3, 13 + sll $10, $11, 5 + sll32 $10, $11, 5 + +# Test 64-bit instructions. + dsll $2, $3, 5 + dsll32 $2, $3, 5 # No way to force 32-bit DSLL. + dsll3232 $2, $3, 5 + dsll $2, $3, 13 + dsll32 $2, $3, 13 # No way to force 32-bit DSLL. + dsll3232 $2, $3, 13 + dsll $10, $11, 5 + dsll32 $10, $11, 5 # No way to force 32-bit DSLL. + dsll3232 $10, $11, 5 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/micromips-trap.d b/gas/testsuite/gas/mips/micromips-trap.d new file mode 100644 index 0000000..461f23b --- /dev/null +++ b/gas/testsuite/gas/mips/micromips-trap.d @@ -0,0 +1,7817 @@ +#objdump: -dr --show-raw-insn +#name: microMIPS for MIPS32r2 (w/traps) +#as: -mips32r2 -32 -trap -mfp64 -EB +#stderr: micromips.l +#source: micromips.s + +.*: +file format .*mips.* + +Disassembly of section \.text: + +[0-9a-f]+ : +[ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) +[ 0-9a-f]+: 6000 27ff pref 0x0,2047\(zero\) +[ 0-9a-f]+: 6000 2800 pref 0x0,-2048\(zero\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 6001 2800 pref 0x0,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 6001 27ff pref 0x0,2047\(at\) +[ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) +[ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) +[ 0-9a-f]+: 6020 2000 pref 0x1,0\(zero\) +[ 0-9a-f]+: 6040 2000 pref 0x2,0\(zero\) +[ 0-9a-f]+: 6060 2000 pref 0x3,0\(zero\) +[ 0-9a-f]+: 6080 2000 pref 0x4,0\(zero\) +[ 0-9a-f]+: 60a0 2000 pref 0x5,0\(zero\) +[ 0-9a-f]+: 60c0 2000 pref 0x6,0\(zero\) +[ 0-9a-f]+: 60e0 2000 pref 0x7,0\(zero\) +[ 0-9a-f]+: 60e0 21ff pref 0x7,511\(zero\) +[ 0-9a-f]+: 60e0 2e00 pref 0x7,-512\(zero\) +[ 0-9a-f]+: 63e0 27ff pref 0x1f,2047\(zero\) +[ 0-9a-f]+: 63e0 2800 pref 0x1f,-2048\(zero\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) +[ 0-9a-f]+: 63e2 27ff pref 0x1f,2047\(v0\) +[ 0-9a-f]+: 63e2 2800 pref 0x1f,-2048\(v0\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0000 0800 ssnop +[ 0-9a-f]+: 0000 1800 ehb +[ 0-9a-f]+: 0000 2800 pause +[ 0-9a-f]+: ed7f li v0,-1 +[ 0-9a-f]+: edff li v1,-1 +[ 0-9a-f]+: ee7f li a0,-1 +[ 0-9a-f]+: eeff li a1,-1 +[ 0-9a-f]+: ef7f li a2,-1 +[ 0-9a-f]+: efff li a3,-1 +[ 0-9a-f]+: ec7f li s0,-1 +[ 0-9a-f]+: ecff li s1,-1 +[ 0-9a-f]+: ec80 li s1,0 +[ 0-9a-f]+: ecfd li s1,125 +[ 0-9a-f]+: ecfe li s1,126 +[ 0-9a-f]+: 3220 007f li s1,127 +[ 0-9a-f]+: 3040 0000 li v0,0 +[ 0-9a-f]+: 3040 0001 li v0,1 +[ 0-9a-f]+: 3040 7fff li v0,32767 +[ 0-9a-f]+: 3040 8000 li v0,-32768 +[ 0-9a-f]+: 5040 ffff li v0,0xffff +[ 0-9a-f]+: 41a2 0001 lui v0,0x1 +[ 0-9a-f]+: 3040 8000 li v0,-32768 +[ 0-9a-f]+: 3040 8001 li v0,-32767 +[ 0-9a-f]+: 3040 ffff li v0,-1 +[ 0-9a-f]+: 41a2 1234 lui v0,0x1234 +[ 0-9a-f]+: 5042 5678 ori v0,v0,0x5678 +[ 0-9a-f]+: 0c16 move zero,s6 +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0c76 move v1,s6 +[ 0-9a-f]+: 0c96 move a0,s6 +[ 0-9a-f]+: 0cb6 move a1,s6 +[ 0-9a-f]+: 0cd6 move a2,s6 +[ 0-9a-f]+: 0cf6 move a3,s6 +[ 0-9a-f]+: 0d16 move t0,s6 +[ 0-9a-f]+: 0d36 move t1,s6 +[ 0-9a-f]+: 0d56 move t2,s6 +[ 0-9a-f]+: 0fd6 move s8,s6 +[ 0-9a-f]+: 0ff6 move ra,s6 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0c02 move zero,v0 +[ 0-9a-f]+: 0c03 move zero,v1 +[ 0-9a-f]+: 0c04 move zero,a0 +[ 0-9a-f]+: 0c05 move zero,a1 +[ 0-9a-f]+: 0c06 move zero,a2 +[ 0-9a-f]+: 0c07 move zero,a3 +[ 0-9a-f]+: 0c08 move zero,t0 +[ 0-9a-f]+: 0c09 move zero,t1 +[ 0-9a-f]+: 0c0a move zero,t2 +[ 0-9a-f]+: 0c1e move zero,s8 +[ 0-9a-f]+: 0c1f move zero,ra +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 0016 1150 move v0,s6 +[ 0-9a-f]+: cfff b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 test +[ 0-9a-f]+: 0002 b150 move s6,v0 +[ 0-9a-f]+: cfff b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: cfff b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: cfff b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: cfff b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: cfff b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c43 move v0,v1 +[ 0-9a-f]+: 0060 1190 neg v0,v1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4044 fffe bgez a0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c44 move v0,a0 +[ 0-9a-f]+: 0080 1190 neg v0,a0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0040 1190 neg v0,v0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0040 1190 neg v0,v0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0083 1110 add v0,v1,a0 +[ 0-9a-f]+: 03fe e910 add sp,s8,ra +[ 0-9a-f]+: 0082 1110 add v0,v0,a0 +[ 0-9a-f]+: 0082 1110 add v0,v0,a0 +[ 0-9a-f]+: 1042 0000 addi v0,v0,0 +[ 0-9a-f]+: 1042 0001 addi v0,v0,1 +[ 0-9a-f]+: 1042 7fff addi v0,v0,32767 +[ 0-9a-f]+: 1042 8000 addi v0,v0,-32768 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 1110 add v0,v0,at +[ 0-9a-f]+: 1064 8000 addi v1,a0,-32768 +[ 0-9a-f]+: 1064 0000 addi v1,a0,0 +[ 0-9a-f]+: 1064 7fff addi v1,a0,32767 +[ 0-9a-f]+: 1064 ffff addi v1,a0,-1 +[ 0-9a-f]+: 1063 ffff addi v1,v1,-1 +[ 0-9a-f]+: 1063 ffff addi v1,v1,-1 +[ 0-9a-f]+: 4c10 addiu zero,zero,-8 +[ 0-9a-f]+: 4c50 addiu v0,v0,-8 +[ 0-9a-f]+: 4c70 addiu v1,v1,-8 +[ 0-9a-f]+: 4c90 addiu a0,a0,-8 +[ 0-9a-f]+: 4cb0 addiu a1,a1,-8 +[ 0-9a-f]+: 4cd0 addiu a2,a2,-8 +[ 0-9a-f]+: 4cf0 addiu a3,a3,-8 +[ 0-9a-f]+: 4d10 addiu t0,t0,-8 +[ 0-9a-f]+: 4d30 addiu t1,t1,-8 +[ 0-9a-f]+: 4d50 addiu t2,t2,-8 +[ 0-9a-f]+: 4fd0 addiu s8,s8,-8 +[ 0-9a-f]+: 4ff0 addiu ra,ra,-8 +[ 0-9a-f]+: 4ff2 addiu ra,ra,-7 +[ 0-9a-f]+: 4fe0 addiu ra,ra,0 +[ 0-9a-f]+: 4fe2 addiu ra,ra,1 +[ 0-9a-f]+: 4fec addiu ra,ra,6 +[ 0-9a-f]+: 4fee addiu ra,ra,7 +[ 0-9a-f]+: 33ff 0008 addiu ra,ra,8 +[ 0-9a-f]+: 4ffd addiu sp,sp,-1032 +[ 0-9a-f]+: 4fff addiu sp,sp,-1028 +[ 0-9a-f]+: 4e01 addiu sp,sp,-1024 +[ 0-9a-f]+: 4dff addiu sp,sp,1020 +[ 0-9a-f]+: 4c01 addiu sp,sp,1024 +[ 0-9a-f]+: 4c03 addiu sp,sp,1028 +[ 0-9a-f]+: 4c03 addiu sp,sp,1028 +[ 0-9a-f]+: 33bd 0408 addiu sp,sp,1032 +[ 0-9a-f]+: 6d2e addiu v0,v0,-1 +[ 0-9a-f]+: 6d3e addiu v0,v1,-1 +[ 0-9a-f]+: 6d4e addiu v0,a0,-1 +[ 0-9a-f]+: 6d5e addiu v0,a1,-1 +[ 0-9a-f]+: 6d6e addiu v0,a2,-1 +[ 0-9a-f]+: 6d7e addiu v0,a3,-1 +[ 0-9a-f]+: 6d0e addiu v0,s0,-1 +[ 0-9a-f]+: 6d1e addiu v0,s1,-1 +[ 0-9a-f]+: 6d10 addiu v0,s1,1 +[ 0-9a-f]+: 6d12 addiu v0,s1,4 +[ 0-9a-f]+: 6d14 addiu v0,s1,8 +[ 0-9a-f]+: 6d16 addiu v0,s1,12 +[ 0-9a-f]+: 6d18 addiu v0,s1,16 +[ 0-9a-f]+: 6d1a addiu v0,s1,20 +[ 0-9a-f]+: 6d1c addiu v0,s1,24 +[ 0-9a-f]+: 6d9c addiu v1,s1,24 +[ 0-9a-f]+: 6e1c addiu a0,s1,24 +[ 0-9a-f]+: 6e9c addiu a1,s1,24 +[ 0-9a-f]+: 6f1c addiu a2,s1,24 +[ 0-9a-f]+: 6f9c addiu a3,s1,24 +[ 0-9a-f]+: 6c1c addiu s0,s1,24 +[ 0-9a-f]+: 6c9c addiu s1,s1,24 +[ 0-9a-f]+: 0c5d move v0,sp +[ 0-9a-f]+: 6d03 addiu v0,sp,4 +[ 0-9a-f]+: 6d7d addiu v0,sp,248 +[ 0-9a-f]+: 6d7f addiu v0,sp,252 +[ 0-9a-f]+: 305d 0100 addiu v0,sp,256 +[ 0-9a-f]+: 6d7f addiu v0,sp,252 +[ 0-9a-f]+: 6dff addiu v1,sp,252 +[ 0-9a-f]+: 6e7f addiu a0,sp,252 +[ 0-9a-f]+: 6eff addiu a1,sp,252 +[ 0-9a-f]+: 6f7f addiu a2,sp,252 +[ 0-9a-f]+: 6fff addiu a3,sp,252 +[ 0-9a-f]+: 6c7f addiu s0,sp,252 +[ 0-9a-f]+: 6cff addiu s1,sp,252 +[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768 +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 3064 7fff addiu v1,a0,32767 +[ 0-9a-f]+: 3064 ffff addiu v1,a0,-1 +[ 0-9a-f]+: 3063 ffff addiu v1,v1,-1 +[ 0-9a-f]+: 3063 ffff addiu v1,v1,-1 +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 0526 addu v0,v1,v0 +[ 0-9a-f]+: 0536 addu v0,v1,v1 +[ 0-9a-f]+: 0546 addu v0,v1,a0 +[ 0-9a-f]+: 0556 addu v0,v1,a1 +[ 0-9a-f]+: 0566 addu v0,v1,a2 +[ 0-9a-f]+: 0576 addu v0,v1,a3 +[ 0-9a-f]+: 0506 addu v0,v1,s0 +[ 0-9a-f]+: 0516 addu v0,v1,s1 +[ 0-9a-f]+: 0514 addu v0,v0,s1 +[ 0-9a-f]+: 0516 addu v0,v1,s1 +[ 0-9a-f]+: 0518 addu v0,a0,s1 +[ 0-9a-f]+: 051a addu v0,a1,s1 +[ 0-9a-f]+: 051c addu v0,a2,s1 +[ 0-9a-f]+: 051e addu v0,a3,s1 +[ 0-9a-f]+: 0510 addu v0,s0,s1 +[ 0-9a-f]+: 0512 addu v0,s1,s1 +[ 0-9a-f]+: 0514 addu v0,v0,s1 +[ 0-9a-f]+: 0594 addu v1,v0,s1 +[ 0-9a-f]+: 0614 addu a0,v0,s1 +[ 0-9a-f]+: 0694 addu a1,v0,s1 +[ 0-9a-f]+: 0714 addu a2,v0,s1 +[ 0-9a-f]+: 0794 addu a3,v0,s1 +[ 0-9a-f]+: 0414 addu s0,v0,s1 +[ 0-9a-f]+: 0494 addu s1,v0,s1 +[ 0-9a-f]+: 07ae addu a3,a3,v0 +[ 0-9a-f]+: 07ae addu a3,a3,v0 +[ 0-9a-f]+: 07f4 addu a3,v0,a3 +[ 0-9a-f]+: 03fe e950 addu sp,s8,ra +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ 0-9a-f]+: 3042 0001 addiu v0,v0,1 +[ 0-9a-f]+: 3042 7fff addiu v0,v0,32767 +[ 0-9a-f]+: 3042 8000 addiu v0,v0,-32768 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 1150 addu v0,v0,at +[ 0-9a-f]+: 4492 and v0,v0,v0 +[ 0-9a-f]+: 4493 and v0,v0,v1 +[ 0-9a-f]+: 4494 and v0,v0,a0 +[ 0-9a-f]+: 4495 and v0,v0,a1 +[ 0-9a-f]+: 4496 and v0,v0,a2 +[ 0-9a-f]+: 4497 and v0,v0,a3 +[ 0-9a-f]+: 4490 and v0,v0,s0 +[ 0-9a-f]+: 4491 and v0,v0,s1 +[ 0-9a-f]+: 449a and v1,v1,v0 +[ 0-9a-f]+: 44a2 and a0,a0,v0 +[ 0-9a-f]+: 44aa and a1,a1,v0 +[ 0-9a-f]+: 44b2 and a2,a2,v0 +[ 0-9a-f]+: 44ba and a3,a3,v0 +[ 0-9a-f]+: 4482 and s0,s0,v0 +[ 0-9a-f]+: 448a and s1,s1,v0 +[ 0-9a-f]+: 4493 and v0,v0,v1 +[ 0-9a-f]+: 4493 and v0,v0,v1 +[ 0-9a-f]+: 4493 and v0,v0,v1 +[ 0-9a-f]+: 4493 and v0,v0,v1 +[ 0-9a-f]+: 0062 1250 and v0,v0,v1 +[ 0-9a-f]+: 2d21 andi v0,v0,0x1 +[ 0-9a-f]+: 2d22 andi v0,v0,0x2 +[ 0-9a-f]+: 2d23 andi v0,v0,0x3 +[ 0-9a-f]+: 2d24 andi v0,v0,0x4 +[ 0-9a-f]+: 2d25 andi v0,v0,0x7 +[ 0-9a-f]+: 2d26 andi v0,v0,0x8 +[ 0-9a-f]+: 2d27 andi v0,v0,0xf +[ 0-9a-f]+: 2d28 andi v0,v0,0x10 +[ 0-9a-f]+: 2d29 andi v0,v0,0x1f +[ 0-9a-f]+: 2d2a andi v0,v0,0x20 +[ 0-9a-f]+: 2d2b andi v0,v0,0x3f +[ 0-9a-f]+: 2d2c andi v0,v0,0x40 +[ 0-9a-f]+: 2d20 andi v0,v0,0x80 +[ 0-9a-f]+: 2d2d andi v0,v0,0xff +[ 0-9a-f]+: 2d2e andi v0,v0,0x8000 +[ 0-9a-f]+: 2d2f andi v0,v0,0xffff +[ 0-9a-f]+: 2d3f andi v0,v1,0xffff +[ 0-9a-f]+: 2d4f andi v0,a0,0xffff +[ 0-9a-f]+: 2d5f andi v0,a1,0xffff +[ 0-9a-f]+: 2d6f andi v0,a2,0xffff +[ 0-9a-f]+: 2d7f andi v0,a3,0xffff +[ 0-9a-f]+: 2d0f andi v0,s0,0xffff +[ 0-9a-f]+: 2d1f andi v0,s1,0xffff +[ 0-9a-f]+: 2d9f andi v1,s1,0xffff +[ 0-9a-f]+: 2e1f andi a0,s1,0xffff +[ 0-9a-f]+: 2e9f andi a1,s1,0xffff +[ 0-9a-f]+: 2f1f andi a2,s1,0xffff +[ 0-9a-f]+: 2f9f andi a3,s1,0xffff +[ 0-9a-f]+: 2c1f andi s0,s1,0xffff +[ 0-9a-f]+: 2c9f andi s1,s1,0xffff +[ 0-9a-f]+: 2fff andi a3,a3,0xffff +[ 0-9a-f]+: 2fff andi a3,a3,0xffff +[ 0-9a-f]+: 2fff andi a3,a3,0xffff +[ 0-9a-f]+: d0e7 ffff andi a3,a3,0xffff +[ 0-9a-f]+: 0083 1250 and v0,v1,a0 +[ 0-9a-f]+: 0082 1250 and v0,v0,a0 +[ 0-9a-f]+: 0082 1250 and v0,v0,a0 +[ 0-9a-f]+: d043 0000 andi v0,v1,0x0 +[ 0-9a-f]+: d043 ffff andi v0,v1,0xffff +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1250 and v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 4280 fffe bc2f [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0023 1250 and v0,v1,at +[ 0-9a-f]+: 4280 fffe bc2f [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4284 fffe bc2f \$cc1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4288 fffe bc2f \$cc2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 428c fffe bc2f \$cc3,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4290 fffe bc2f \$cc4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4294 fffe bc2f \$cc5,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4298 fffe bc2f \$cc6,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 429c fffe bc2f \$cc7,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42a0 fffe bc2t [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42a0 fffe bc2t [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42a4 fffe bc2t \$cc1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42a8 fffe bc2t \$cc2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42ac fffe bc2t \$cc3,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42b0 fffe bc2t \$cc4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42b4 fffe bc2t \$cc5,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42b8 fffe bc2t \$cc6,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42bc fffe bc2t \$cc7,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42a4 fffe bc2t \$cc1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4288 fffe bc2f \$cc2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0107 3150 addu a2,a3,t0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 428c fffe bc2f \$cc3,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 42b0 fffe bc2t \$cc4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0107 3150 addu a2,a3,t0 + +[0-9a-f]+ : +[ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8e7f beqz a0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8eff beqz a1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8f7f beqz a2,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8fff beqz a3,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8cff beqz s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8e7f beqz a0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8eff beqz a1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8f7f beqz a2,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8fff beqz a3,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8cff beqz s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8e7f beqz a0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8eff beqz a1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8f7f beqz a2,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8fff beqz a3,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8cff beqz s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9410 fffe beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8cff beqz s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9411 fffe beqz s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 40f1 fffe beqzc s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 9410 fffe beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 3020 000a li at,10 +[ 0-9a-f]+: 9430 fffe beq s0,at,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 9430 fffe beq s0,at,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 9430 fffe beq s0,at,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 000a li at,10 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 000a li at,10 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 000a li at,10 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 000a li at,10 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9630 fffe beq s0,s1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9411 fffe beqz s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ad7f bnez v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ae7f bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: aeff bnez a1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: af7f bnez a2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: afff bnez a3,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ac7f bnez s0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: acff bnez s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ad7f bnez v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ae7f bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: aeff bnez a1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: af7f bnez a2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: afff bnez a3,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ac7f bnez s0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: acff bnez s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ad7f bnez v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ae7f bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: aeff bnez a1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: af7f bnez a2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: afff bnez a3,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ac7f bnez s0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: acff bnez s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ac7f bnez s0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: b411 fffe bnez s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: b411 fffe bnez s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop + +[0-9a-f]+ : +[ 0-9a-f]+: 40b1 fffe bnezc s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 4680 break +[ 0-9a-f]+: 4680 break +[ 0-9a-f]+: 4681 break 0x1 +[ 0-9a-f]+: 4682 break 0x2 +[ 0-9a-f]+: 4683 break 0x3 +[ 0-9a-f]+: 4684 break 0x4 +[ 0-9a-f]+: 4685 break 0x5 +[ 0-9a-f]+: 4686 break 0x6 +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: 4688 break 0x8 +[ 0-9a-f]+: 4689 break 0x9 +[ 0-9a-f]+: 468a break 0xa +[ 0-9a-f]+: 468b break 0xb +[ 0-9a-f]+: 468c break 0xc +[ 0-9a-f]+: 468d break 0xd +[ 0-9a-f]+: 468e break 0xe +[ 0-9a-f]+: 468f break 0xf +[ 0-9a-f]+: 003f 0007 break 0x3f +[ 0-9a-f]+: 0040 0007 break 0x40 +[ 0-9a-f]+: 03ff 0007 break 0x3ff +[ 0-9a-f]+: 03ff ffc7 break 0x3ff,0x3ff +[ 0-9a-f]+: 0000 0007 break +[ 0-9a-f]+: 0000 0007 break +[ 0-9a-f]+: 0001 0007 break 0x1 +[ 0-9a-f]+: 0002 0007 break 0x2 +[ 0-9a-f]+: 000f 0007 break 0xf +[ 0-9a-f]+: 003f 0007 break 0x3f +[ 0-9a-f]+: 0040 0007 break 0x40 +[ 0-9a-f]+: 03ff 0007 break 0x3ff +[ 0-9a-f]+: 03ff ffc7 break 0x3ff,0x3ff +[ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) +[ 0-9a-f]+: 2000 6800 cache 0x0,-2048\(zero\) +[ 0-9a-f]+: 2000 67ff cache 0x0,2047\(zero\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 2002 6000 cache 0x0,0\(v0\) +[ 0-9a-f]+: 2002 6800 cache 0x0,-2048\(v0\) +[ 0-9a-f]+: 2002 67ff cache 0x0,2047\(v0\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) +[ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) +[ 0-9a-f]+: 2020 6000 cache 0x1,0\(zero\) +[ 0-9a-f]+: 2040 6000 cache 0x2,0\(zero\) +[ 0-9a-f]+: 2060 6000 cache 0x3,0\(zero\) +[ 0-9a-f]+: 2080 6000 cache 0x4,0\(zero\) +[ 0-9a-f]+: 20a0 6000 cache 0x5,0\(zero\) +[ 0-9a-f]+: 20c0 6000 cache 0x6,0\(zero\) +[ 0-9a-f]+: 23e0 6000 cache 0x1f,0\(zero\) +[ 0-9a-f]+: 23e0 67ff cache 0x1f,2047\(zero\) +[ 0-9a-f]+: 23e0 6800 cache 0x1f,-2048\(zero\) +[ 0-9a-f]+: 2000 67ff cache 0x0,2047\(zero\) +[ 0-9a-f]+: 2000 6800 cache 0x0,-2048\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) +[ 0-9a-f]+: 23e3 6fff cache 0x1f,-1\(v1\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6fff cache 0x1f,-1\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) +[ 0-9a-f]+: 23e0 6fff cache 0x1f,-1\(zero\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 23e1 6fff cache 0x1f,-1\(at\) +[ 0-9a-f]+: 0043 4b3c clo v0,v1 +[ 0-9a-f]+: 0062 4b3c clo v1,v0 +[ 0-9a-f]+: 0043 5b3c clz v0,v1 +[ 0-9a-f]+: 0062 5b3c clz v1,v0 +[ 0-9a-f]+: 0000 e37c deret +[ 0-9a-f]+: 0000 477c di +[ 0-9a-f]+: 0000 477c di +[ 0-9a-f]+: 0002 477c di v0 +[ 0-9a-f]+: 0003 477c di v1 +[ 0-9a-f]+: 001e 477c di s8 +[ 0-9a-f]+: 001f 477c di ra +[ 0-9a-f]+: 0062 ab3c div zero,v0,v1 +[ 0-9a-f]+: 03fe ab3c div zero,s8,ra +[ 0-9a-f]+: 0060 ab3c div zero,zero,v1 +[ 0-9a-f]+: 03e0 ab3c div zero,zero,ra +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0004 703c teq a0,zero,0x7 +[ 0-9a-f]+: 0083 ab3c div zero,v1,a0 +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b424 fffe bne a0,at,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: 0023 603c teq v1,at,0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 0080 1990 neg v1,a0 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 0024 ab3c div zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 0062 bb3c divu zero,v0,v1 +[ 0-9a-f]+: 03fe bb3c divu zero,s8,ra +[ 0-9a-f]+: 0060 bb3c divu zero,zero,v1 +[ 0-9a-f]+: 03e0 bb3c divu zero,zero,ra +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0003 bb3c divu zero,v1,zero +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0004 703c teq a0,zero,0x7 +[ 0-9a-f]+: 0083 bb3c divu zero,v1,a0 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0024 bb3c divu zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 0024 bb3c divu zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 0000 577c ei +[ 0-9a-f]+: 0000 577c ei +[ 0-9a-f]+: 0002 577c ei v0 +[ 0-9a-f]+: 0003 577c ei v1 +[ 0-9a-f]+: 001e 577c ei s8 +[ 0-9a-f]+: 001f 577c ei ra +[ 0-9a-f]+: 0000 f37c eret +[ 0-9a-f]+: 0043 716c ext v0,v1,0x5,0xf +[ 0-9a-f]+: 0043 f82c ext v0,v1,0x0,0x20 +[ 0-9a-f]+: 0043 07ec ext v0,v1,0x1f,0x1 +[ 0-9a-f]+: 03fe 07ec ext ra,s8,0x1f,0x1 +[ 0-9a-f]+: 0043 994c ins v0,v1,0x5,0xf +[ 0-9a-f]+: 0043 f80c ins v0,v1,0x0,0x20 +[ 0-9a-f]+: 0043 ffcc ins v0,v1,0x1f,0x1 +[ 0-9a-f]+: 4580 jr zero +[ 0-9a-f]+: 03fe ffcc ins ra,s8,0x1f,0x1 +[ 0-9a-f]+: 4582 jr v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4583 jr v1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4584 jr a0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4585 jr a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4586 jr a2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4587 jr a3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4588 jr t0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 459e jr s8 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 459f jr ra +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0000 0f3c jr zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0002 0f3c jr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0003 0f3c jr v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0004 0f3c jr a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0005 0f3c jr a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0006 0f3c jr a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0007 0f3c jr a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0008 0f3c jr t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 001e 0f3c jr s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 001f 0f3c jr ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45a0 jrc zero +[ 0-9a-f]+: 45a2 jrc v0 +[ 0-9a-f]+: 45a3 jrc v1 +[ 0-9a-f]+: 45a4 jrc a0 +[ 0-9a-f]+: 45a5 jrc a1 +[ 0-9a-f]+: 45a6 jrc a2 +[ 0-9a-f]+: 45a7 jrc a3 +[ 0-9a-f]+: 45a8 jrc t0 +[ 0-9a-f]+: 45be jrc s8 +[ 0-9a-f]+: 45bf jrc ra +[ 0-9a-f]+: 0000 1f3c jr\.hb zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0002 1f3c jr\.hb v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0003 1f3c jr\.hb v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0004 1f3c jr\.hb a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0005 1f3c jr\.hb a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0006 1f3c jr\.hb a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0007 1f3c jr\.hb a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0008 1f3c jr\.hb t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 001e 1f3c jr\.hb s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 001f 1f3c jr\.hb ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4580 jr zero +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4582 jr v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4583 jr v1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4584 jr a0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4585 jr a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4586 jr a2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4587 jr a3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4588 jr t0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 459e jr s8 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 459f jr ra +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 45c0 jalr zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c2 jalr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c3 jalr v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c4 jalr a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c5 jalr a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c6 jalr a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c7 jalr a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c8 jalr t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45de jalr s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e0 0f3c jalr zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e2 0f3c jalr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e3 0f3c jalr v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e4 0f3c jalr a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e5 0f3c jalr a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e6 0f3c jalr a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e7 0f3c jalr a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e8 0f3c jalr t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03fe 0f3c jalr s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c0 jalr zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c2 jalr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c3 jalr v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c4 jalr a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c5 jalr a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c6 jalr a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c7 jalr a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c8 jalr t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45de jalr s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03df 0f3c jalr s8,ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0040 0f3c jalr v0,zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0062 0f3c jalr v1,v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0043 0f3c jalr v0,v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0044 0f3c jalr v0,a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0045 0f3c jalr v0,a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0046 0f3c jalr v0,a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0047 0f3c jalr v0,a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0048 0f3c jalr v0,t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 005e 0f3c jalr v0,s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 005f 0f3c jalr v0,ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e0 1f3c jalr\.hb zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e2 1f3c jalr\.hb v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e3 1f3c jalr\.hb v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e4 1f3c jalr\.hb a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e5 1f3c jalr\.hb a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e6 1f3c jalr\.hb a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e7 1f3c jalr\.hb a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e8 1f3c jalr\.hb t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03fe 1f3c jalr\.hb s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e0 1f3c jalr\.hb zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e2 1f3c jalr\.hb v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e3 1f3c jalr\.hb v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e4 1f3c jalr\.hb a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e5 1f3c jalr\.hb a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e6 1f3c jalr\.hb a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e7 1f3c jalr\.hb a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e8 1f3c jalr\.hb t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03fe 1f3c jalr\.hb s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03df 1f3c jalr\.hb s8,ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0040 1f3c jalr\.hb v0,zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0062 1f3c jalr\.hb v1,v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0043 1f3c jalr\.hb v0,v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0044 1f3c jalr\.hb v0,a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0045 1f3c jalr\.hb v0,a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0046 1f3c jalr\.hb v0,a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0047 1f3c jalr\.hb v0,a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0048 1f3c jalr\.hb v0,t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 005e 1f3c jalr\.hb v0,s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 005f 1f3c jalr\.hb v0,ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0043 0f3c jalr v0,v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03df 0f3c jalr s8,ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c3 jalr v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45df jalr ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: f400 0000 jal [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: f400 0000 jal [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: f000 0000 jalx [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: f000 0000 jalx [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 41a2 0000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 test +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 41a2 0000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 test +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 1c60 0000 lb v1,0\(zero\) +[ 0-9a-f]+: 1c60 0004 lb v1,4\(zero\) +[ 0-9a-f]+: 1c60 0000 lb v1,0\(zero\) +[ 0-9a-f]+: 1c60 0004 lb v1,4\(zero\) +[ 0-9a-f]+: 1c60 7fff lb v1,32767\(zero\) +[ 0-9a-f]+: 1c60 8000 lb v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 1c63 ffff lb v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\) +[ 0-9a-f]+: 1c60 8000 lb v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 1c63 0001 lb v1,1\(v1\) +[ 0-9a-f]+: 1c60 8001 lb v1,-32767\(zero\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\) +[ 0-9a-f]+: 1c60 ffff lb v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 1c63 5678 lb v1,22136\(v1\) +[ 0-9a-f]+: 1c64 0000 lb v1,0\(a0\) +[ 0-9a-f]+: 1c64 0000 lb v1,0\(a0\) +[ 0-9a-f]+: 1c64 0004 lb v1,4\(a0\) +[ 0-9a-f]+: 1c64 7fff lb v1,32767\(a0\) +[ 0-9a-f]+: 1c64 8000 lb v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1c63 ffff lb v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\) +[ 0-9a-f]+: 1c64 8000 lb v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1c63 0001 lb v1,1\(v1\) +[ 0-9a-f]+: 1c64 8001 lb v1,-32767\(a0\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\) +[ 0-9a-f]+: 1c64 ffff lb v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1c63 5678 lb v1,22136\(v1\) +[ 0-9a-f]+: 093f lbu v0,-1\(v1\) +[ 0-9a-f]+: 0930 lbu v0,0\(v1\) +[ 0-9a-f]+: 0930 lbu v0,0\(v1\) +[ 0-9a-f]+: 0931 lbu v0,1\(v1\) +[ 0-9a-f]+: 0932 lbu v0,2\(v1\) +[ 0-9a-f]+: 0933 lbu v0,3\(v1\) +[ 0-9a-f]+: 0934 lbu v0,4\(v1\) +[ 0-9a-f]+: 0935 lbu v0,5\(v1\) +[ 0-9a-f]+: 0936 lbu v0,6\(v1\) +[ 0-9a-f]+: 0937 lbu v0,7\(v1\) +[ 0-9a-f]+: 0938 lbu v0,8\(v1\) +[ 0-9a-f]+: 0939 lbu v0,9\(v1\) +[ 0-9a-f]+: 093a lbu v0,10\(v1\) +[ 0-9a-f]+: 093b lbu v0,11\(v1\) +[ 0-9a-f]+: 093c lbu v0,12\(v1\) +[ 0-9a-f]+: 093d lbu v0,13\(v1\) +[ 0-9a-f]+: 093e lbu v0,14\(v1\) +[ 0-9a-f]+: 092e lbu v0,14\(v0\) +[ 0-9a-f]+: 094e lbu v0,14\(a0\) +[ 0-9a-f]+: 095e lbu v0,14\(a1\) +[ 0-9a-f]+: 096e lbu v0,14\(a2\) +[ 0-9a-f]+: 097e lbu v0,14\(a3\) +[ 0-9a-f]+: 090e lbu v0,14\(s0\) +[ 0-9a-f]+: 091e lbu v0,14\(s1\) +[ 0-9a-f]+: 099e lbu v1,14\(s1\) +[ 0-9a-f]+: 0a1e lbu a0,14\(s1\) +[ 0-9a-f]+: 0a9e lbu a1,14\(s1\) +[ 0-9a-f]+: 0b1e lbu a2,14\(s1\) +[ 0-9a-f]+: 0b9e lbu a3,14\(s1\) +[ 0-9a-f]+: 081e lbu s0,14\(s1\) +[ 0-9a-f]+: 089e lbu s1,14\(s1\) +[ 0-9a-f]+: 1460 0000 lbu v1,0\(zero\) +[ 0-9a-f]+: 1460 0004 lbu v1,4\(zero\) +[ 0-9a-f]+: 1460 0000 lbu v1,0\(zero\) +[ 0-9a-f]+: 1460 0004 lbu v1,4\(zero\) +[ 0-9a-f]+: 1460 7fff lbu v1,32767\(zero\) +[ 0-9a-f]+: 1460 8000 lbu v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 1463 ffff lbu v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\) +[ 0-9a-f]+: 1460 8000 lbu v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 1463 0001 lbu v1,1\(v1\) +[ 0-9a-f]+: 1460 8001 lbu v1,-32767\(zero\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\) +[ 0-9a-f]+: 1460 ffff lbu v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 1463 5678 lbu v1,22136\(v1\) +[ 0-9a-f]+: 09c0 lbu v1,0\(a0\) +[ 0-9a-f]+: 09c0 lbu v1,0\(a0\) +[ 0-9a-f]+: 09c4 lbu v1,4\(a0\) +[ 0-9a-f]+: 1464 7fff lbu v1,32767\(a0\) +[ 0-9a-f]+: 1464 8000 lbu v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1463 ffff lbu v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\) +[ 0-9a-f]+: 1464 8000 lbu v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1463 0001 lbu v1,1\(v1\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\) +[ 0-9a-f]+: 1464 ffff lbu v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1463 5678 lbu v1,22136\(v1\) +[ 0-9a-f]+: 3c60 0000 lh v1,0\(zero\) +[ 0-9a-f]+: 3c60 0004 lh v1,4\(zero\) +[ 0-9a-f]+: 3c60 0000 lh v1,0\(zero\) +[ 0-9a-f]+: 3c60 0004 lh v1,4\(zero\) +[ 0-9a-f]+: 3c60 7fff lh v1,32767\(zero\) +[ 0-9a-f]+: 3c60 8000 lh v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 3c63 ffff lh v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\) +[ 0-9a-f]+: 3c60 8000 lh v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 3c63 0001 lh v1,1\(v1\) +[ 0-9a-f]+: 3c60 8001 lh v1,-32767\(zero\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\) +[ 0-9a-f]+: 3c60 ffff lh v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 3c63 5678 lh v1,22136\(v1\) +[ 0-9a-f]+: 3c64 0000 lh v1,0\(a0\) +[ 0-9a-f]+: 3c64 0000 lh v1,0\(a0\) +[ 0-9a-f]+: 3c64 0004 lh v1,4\(a0\) +[ 0-9a-f]+: 3c64 7fff lh v1,32767\(a0\) +[ 0-9a-f]+: 3c64 8000 lh v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3c63 ffff lh v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\) +[ 0-9a-f]+: 3c64 8000 lh v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3c63 0001 lh v1,1\(v1\) +[ 0-9a-f]+: 3c64 8001 lh v1,-32767\(a0\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\) +[ 0-9a-f]+: 3c64 ffff lh v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3c63 5678 lh v1,22136\(v1\) +[ 0-9a-f]+: 2930 lhu v0,0\(v1\) +[ 0-9a-f]+: 2930 lhu v0,0\(v1\) +[ 0-9a-f]+: 2931 lhu v0,2\(v1\) +[ 0-9a-f]+: 2932 lhu v0,4\(v1\) +[ 0-9a-f]+: 2933 lhu v0,6\(v1\) +[ 0-9a-f]+: 2934 lhu v0,8\(v1\) +[ 0-9a-f]+: 2935 lhu v0,10\(v1\) +[ 0-9a-f]+: 2936 lhu v0,12\(v1\) +[ 0-9a-f]+: 2937 lhu v0,14\(v1\) +[ 0-9a-f]+: 2938 lhu v0,16\(v1\) +[ 0-9a-f]+: 2939 lhu v0,18\(v1\) +[ 0-9a-f]+: 293a lhu v0,20\(v1\) +[ 0-9a-f]+: 293b lhu v0,22\(v1\) +[ 0-9a-f]+: 293c lhu v0,24\(v1\) +[ 0-9a-f]+: 293d lhu v0,26\(v1\) +[ 0-9a-f]+: 293e lhu v0,28\(v1\) +[ 0-9a-f]+: 293f lhu v0,30\(v1\) +[ 0-9a-f]+: 294f lhu v0,30\(a0\) +[ 0-9a-f]+: 295f lhu v0,30\(a1\) +[ 0-9a-f]+: 296f lhu v0,30\(a2\) +[ 0-9a-f]+: 297f lhu v0,30\(a3\) +[ 0-9a-f]+: 292f lhu v0,30\(v0\) +[ 0-9a-f]+: 290f lhu v0,30\(s0\) +[ 0-9a-f]+: 291f lhu v0,30\(s1\) +[ 0-9a-f]+: 299f lhu v1,30\(s1\) +[ 0-9a-f]+: 2a1f lhu a0,30\(s1\) +[ 0-9a-f]+: 2a9f lhu a1,30\(s1\) +[ 0-9a-f]+: 2b1f lhu a2,30\(s1\) +[ 0-9a-f]+: 2b9f lhu a3,30\(s1\) +[ 0-9a-f]+: 281f lhu s0,30\(s1\) +[ 0-9a-f]+: 289f lhu s1,30\(s1\) +[ 0-9a-f]+: 3460 0000 lhu v1,0\(zero\) +[ 0-9a-f]+: 3460 0004 lhu v1,4\(zero\) +[ 0-9a-f]+: 3460 0000 lhu v1,0\(zero\) +[ 0-9a-f]+: 3460 0004 lhu v1,4\(zero\) +[ 0-9a-f]+: 3460 7fff lhu v1,32767\(zero\) +[ 0-9a-f]+: 3460 8000 lhu v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 3463 ffff lhu v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\) +[ 0-9a-f]+: 3460 8000 lhu v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 3463 0001 lhu v1,1\(v1\) +[ 0-9a-f]+: 3460 8001 lhu v1,-32767\(zero\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\) +[ 0-9a-f]+: 3460 ffff lhu v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 3463 5678 lhu v1,22136\(v1\) +[ 0-9a-f]+: 29c0 lhu v1,0\(a0\) +[ 0-9a-f]+: 29c0 lhu v1,0\(a0\) +[ 0-9a-f]+: 29c2 lhu v1,4\(a0\) +[ 0-9a-f]+: 3464 7fff lhu v1,32767\(a0\) +[ 0-9a-f]+: 3464 8000 lhu v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3463 ffff lhu v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\) +[ 0-9a-f]+: 3464 8000 lhu v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3463 0001 lhu v1,1\(v1\) +[ 0-9a-f]+: 3464 8001 lhu v1,-32767\(a0\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\) +[ 0-9a-f]+: 3464 ffff lhu v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3463 5678 lhu v1,22136\(v1\) +[ 0-9a-f]+: 6060 3000 ll v1,0\(zero\) +[ 0-9a-f]+: 6060 3000 ll v1,0\(zero\) +[ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) +[ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) +[ 0-9a-f]+: 5060 8000 li v1,0x8000 +[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 6060 3fff ll v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 5063 5000 ori v1,v1,0x5000 +[ 0-9a-f]+: 6063 3678 ll v1,1656\(v1\) +[ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) +[ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) +[ 0-9a-f]+: 6064 3004 ll v1,4\(a0\) +[ 0-9a-f]+: 5060 8000 li v1,0x8000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 6064 3fff ll v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 5063 5000 ori v1,v1,0x5000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3678 ll v1,1656\(v1\) +[ 0-9a-f]+: 41a3 0000 lui v1,0x0 +[ 0-9a-f]+: 41a3 7fff lui v1,0x7fff +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 6940 lw v0,0\(a0\) +[ 0-9a-f]+: 6940 lw v0,0\(a0\) +[ 0-9a-f]+: 6941 lw v0,4\(a0\) +[ 0-9a-f]+: 6942 lw v0,8\(a0\) +[ 0-9a-f]+: 6943 lw v0,12\(a0\) +[ 0-9a-f]+: 6944 lw v0,16\(a0\) +[ 0-9a-f]+: 6945 lw v0,20\(a0\) +[ 0-9a-f]+: 6946 lw v0,24\(a0\) +[ 0-9a-f]+: 6947 lw v0,28\(a0\) +[ 0-9a-f]+: 6948 lw v0,32\(a0\) +[ 0-9a-f]+: 6949 lw v0,36\(a0\) +[ 0-9a-f]+: 694a lw v0,40\(a0\) +[ 0-9a-f]+: 694b lw v0,44\(a0\) +[ 0-9a-f]+: 694c lw v0,48\(a0\) +[ 0-9a-f]+: 694d lw v0,52\(a0\) +[ 0-9a-f]+: 694e lw v0,56\(a0\) +[ 0-9a-f]+: 694f lw v0,60\(a0\) +[ 0-9a-f]+: 695f lw v0,60\(a1\) +[ 0-9a-f]+: 696f lw v0,60\(a2\) +[ 0-9a-f]+: 697f lw v0,60\(a3\) +[ 0-9a-f]+: 692f lw v0,60\(v0\) +[ 0-9a-f]+: 693f lw v0,60\(v1\) +[ 0-9a-f]+: 690f lw v0,60\(s0\) +[ 0-9a-f]+: 691f lw v0,60\(s1\) +[ 0-9a-f]+: 699f lw v1,60\(s1\) +[ 0-9a-f]+: 6a1f lw a0,60\(s1\) +[ 0-9a-f]+: 6a9f lw a1,60\(s1\) +[ 0-9a-f]+: 6b1f lw a2,60\(s1\) +[ 0-9a-f]+: 6b9f lw a3,60\(s1\) +[ 0-9a-f]+: 681f lw s0,60\(s1\) +[ 0-9a-f]+: 689f lw s1,60\(s1\) +[ 0-9a-f]+: 4880 lw a0,0\(sp\) +[ 0-9a-f]+: 4880 lw a0,0\(sp\) +[ 0-9a-f]+: 4881 lw a0,4\(sp\) +[ 0-9a-f]+: 4882 lw a0,8\(sp\) +[ 0-9a-f]+: 4883 lw a0,12\(sp\) +[ 0-9a-f]+: 4884 lw a0,16\(sp\) +[ 0-9a-f]+: 4885 lw a0,20\(sp\) +[ 0-9a-f]+: 489f lw a0,124\(sp\) +[ 0-9a-f]+: 485f lw v0,124\(sp\) +[ 0-9a-f]+: 485f lw v0,124\(sp\) +[ 0-9a-f]+: 487f lw v1,124\(sp\) +[ 0-9a-f]+: 489f lw a0,124\(sp\) +[ 0-9a-f]+: 48bf lw a1,124\(sp\) +[ 0-9a-f]+: 48df lw a2,124\(sp\) +[ 0-9a-f]+: 48ff lw a3,124\(sp\) +[ 0-9a-f]+: 491f lw t0,124\(sp\) +[ 0-9a-f]+: 493f lw t1,124\(sp\) +[ 0-9a-f]+: 495f lw t2,124\(sp\) +[ 0-9a-f]+: 4bdf lw s8,124\(sp\) +[ 0-9a-f]+: 4bff lw ra,124\(sp\) +[ 0-9a-f]+: fc9d 01f8 lw a0,504\(sp\) +[ 0-9a-f]+: fc9d 01fc lw a0,508\(sp\) +[ 0-9a-f]+: fe1d 01fc lw s0,508\(sp\) +[ 0-9a-f]+: fe3d 01fc lw s1,508\(sp\) +[ 0-9a-f]+: fe5d 01fc lw s2,508\(sp\) +[ 0-9a-f]+: fe7d 01fc lw s3,508\(sp\) +[ 0-9a-f]+: fe9d 01fc lw s4,508\(sp\) +[ 0-9a-f]+: febd 01fc lw s5,508\(sp\) +[ 0-9a-f]+: fffd 01fc lw ra,508\(sp\) +[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\) +[ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) +[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\) +[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\) +[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\) +[ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) +[ 0-9a-f]+: fc60 7fff lw v1,32767\(zero\) +[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: fc63 ffff lw v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\) +[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: fc63 0001 lw v1,1\(v1\) +[ 0-9a-f]+: fc60 8001 lw v1,-32767\(zero\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\) +[ 0-9a-f]+: fc60 ffff lw v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: fc63 5678 lw v1,22136\(v1\) +[ 0-9a-f]+: 69c0 lw v1,0\(a0\) +[ 0-9a-f]+: 69c0 lw v1,0\(a0\) +[ 0-9a-f]+: 69c1 lw v1,4\(a0\) +[ 0-9a-f]+: fc64 7fff lw v1,32767\(a0\) +[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: fc63 ffff lw v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\) +[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: fc63 0001 lw v1,1\(v1\) +[ 0-9a-f]+: fc64 8001 lw v1,-32767\(a0\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\) +[ 0-9a-f]+: fc64 ffff lw v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: fc63 5678 lw v1,22136\(v1\) +[ 0-9a-f]+: 450c lwm s0,ra,48\(sp\) +[ 0-9a-f]+: 451c lwm s0-s1,ra,48\(sp\) +[ 0-9a-f]+: 451c lwm s0-s1,ra,48\(sp\) +[ 0-9a-f]+: 452c lwm s0-s2,ra,48\(sp\) +[ 0-9a-f]+: 452c lwm s0-s2,ra,48\(sp\) +[ 0-9a-f]+: 453c lwm s0-s3,ra,48\(sp\) +[ 0-9a-f]+: 453c lwm s0-s3,ra,48\(sp\) +[ 0-9a-f]+: 4500 lwm s0,ra,0\(sp\) +[ 0-9a-f]+: 4500 lwm s0,ra,0\(sp\) +[ 0-9a-f]+: 4501 lwm s0,ra,4\(sp\) +[ 0-9a-f]+: 4502 lwm s0,ra,8\(sp\) +[ 0-9a-f]+: 4503 lwm s0,ra,12\(sp\) +[ 0-9a-f]+: 4504 lwm s0,ra,16\(sp\) +[ 0-9a-f]+: 4505 lwm s0,ra,20\(sp\) +[ 0-9a-f]+: 4506 lwm s0,ra,24\(sp\) +[ 0-9a-f]+: 4507 lwm s0,ra,28\(sp\) +[ 0-9a-f]+: 4508 lwm s0,ra,32\(sp\) +[ 0-9a-f]+: 4509 lwm s0,ra,36\(sp\) +[ 0-9a-f]+: 450a lwm s0,ra,40\(sp\) +[ 0-9a-f]+: 450b lwm s0,ra,44\(sp\) +[ 0-9a-f]+: 450c lwm s0,ra,48\(sp\) +[ 0-9a-f]+: 450d lwm s0,ra,52\(sp\) +[ 0-9a-f]+: 450e lwm s0,ra,56\(sp\) +[ 0-9a-f]+: 450f lwm s0,ra,60\(sp\) +[ 0-9a-f]+: 2020 5000 lwm s0,0\(zero\) +[ 0-9a-f]+: 2020 5004 lwm s0,4\(zero\) +[ 0-9a-f]+: 2025 5000 lwm s0,0\(a1\) +[ 0-9a-f]+: 2025 57ff lwm s0,2047\(a1\) +[ 0-9a-f]+: 2045 57ff lwm s0-s1,2047\(a1\) +[ 0-9a-f]+: 2065 57ff lwm s0-s2,2047\(a1\) +[ 0-9a-f]+: 2085 57ff lwm s0-s3,2047\(a1\) +[ 0-9a-f]+: 20a5 57ff lwm s0-s4,2047\(a1\) +[ 0-9a-f]+: 20c5 57ff lwm s0-s5,2047\(a1\) +[ 0-9a-f]+: 20e5 57ff lwm s0-s6,2047\(a1\) +[ 0-9a-f]+: 2105 57ff lwm s0-s7,2047\(a1\) +[ 0-9a-f]+: 2125 57ff lwm s0-s7,s8,2047\(a1\) +[ 0-9a-f]+: 2205 57ff lwm ra,2047\(a1\) +[ 0-9a-f]+: 2225 5000 lwm s0,ra,0\(a1\) +[ 0-9a-f]+: 2245 5000 lwm s0-s1,ra,0\(a1\) +[ 0-9a-f]+: 2265 5000 lwm s0-s2,ra,0\(a1\) +[ 0-9a-f]+: 2285 5000 lwm s0-s3,ra,0\(a1\) +[ 0-9a-f]+: 22a5 5000 lwm s0-s4,ra,0\(a1\) +[ 0-9a-f]+: 22c5 5000 lwm s0-s5,ra,0\(a1\) +[ 0-9a-f]+: 22e5 5000 lwm s0-s6,ra,0\(a1\) +[ 0-9a-f]+: 2305 5000 lwm s0-s7,ra,0\(a1\) +[ 0-9a-f]+: 2325 5000 lwm s0-s7,s8,ra,0\(a1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 2020 5000 lwm s0,0\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 203d 5000 lwm s0,0\(sp\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 2040 1000 lwp v0,0\(zero\) +[ 0-9a-f]+: 2040 1004 lwp v0,4\(zero\) +[ 0-9a-f]+: 205d 1000 lwp v0,0\(sp\) +[ 0-9a-f]+: 205d 1000 lwp v0,0\(sp\) +[ 0-9a-f]+: 2043 1800 lwp v0,-2048\(v1\) +[ 0-9a-f]+: 2043 17ff lwp v0,2047\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) +[ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) +[ 0-9a-f]+: 5060 8000 li v1,0x8000 +[ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) +[ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 0678 lwl v1,1656\(at\) +[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) +[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) +[ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) +[ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6064 0fff lwl v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0678 lwl v1,1656\(at\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) +[ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 0678 lwl v1,1656\(at\) +[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) +[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) +[ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) +[ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6064 0fff lwl v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0678 lwl v1,1656\(at\) +[ 0-9a-f]+: 6060 1004 lwr v1,4\(zero\) +[ 0-9a-f]+: 6060 1004 lwr v1,4\(zero\) +[ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) +[ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) +[ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) +[ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 1678 lwr v1,1656\(at\) +[ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) +[ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) +[ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) +[ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 6064 1fff lwr v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1678 lwr v1,1656\(at\) +[ 0-9a-f]+: 6060 1004 lwr v1,4\(zero\) +[ 0-9a-f]+: 6060 1004 lwr v1,4\(zero\) +[ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) +[ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) +[ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) +[ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 1678 lwr v1,1656\(at\) +[ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) +[ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) +[ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) +[ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 6064 1fff lwr v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1678 lwr v1,1656\(at\) +[ 0-9a-f]+: 0085 1918 lwxs v1,a0\(a1\) +[ 0-9a-f]+: 00a4 cb3c madd a0,a1 +[ 0-9a-f]+: 00a4 db3c maddu a0,a1 +[ 0-9a-f]+: 0040 00fc mfc0 v0,c0_index +[ 0-9a-f]+: 0041 00fc mfc0 v0,c0_random +[ 0-9a-f]+: 0042 00fc mfc0 v0,c0_entrylo0 +[ 0-9a-f]+: 0043 00fc mfc0 v0,c0_entrylo1 +[ 0-9a-f]+: 0044 00fc mfc0 v0,c0_context +[ 0-9a-f]+: 0045 00fc mfc0 v0,c0_pagemask +[ 0-9a-f]+: 0046 00fc mfc0 v0,c0_wired +[ 0-9a-f]+: 0047 00fc mfc0 v0,c0_hwrena +[ 0-9a-f]+: 0048 00fc mfc0 v0,c0_badvaddr +[ 0-9a-f]+: 0049 00fc mfc0 v0,c0_count +[ 0-9a-f]+: 004a 00fc mfc0 v0,c0_entryhi +[ 0-9a-f]+: 004b 00fc mfc0 v0,c0_compare +[ 0-9a-f]+: 004c 00fc mfc0 v0,c0_status +[ 0-9a-f]+: 004d 00fc mfc0 v0,c0_cause +[ 0-9a-f]+: 004e 00fc mfc0 v0,c0_epc +[ 0-9a-f]+: 004f 00fc mfc0 v0,c0_prid +[ 0-9a-f]+: 0050 00fc mfc0 v0,c0_config +[ 0-9a-f]+: 0051 00fc mfc0 v0,c0_lladdr +[ 0-9a-f]+: 0052 00fc mfc0 v0,c0_watchlo +[ 0-9a-f]+: 0053 00fc mfc0 v0,c0_watchhi +[ 0-9a-f]+: 0054 00fc mfc0 v0,c0_xcontext +[ 0-9a-f]+: 0055 00fc mfc0 v0,\$21 +[ 0-9a-f]+: 0056 00fc mfc0 v0,\$22 +[ 0-9a-f]+: 0057 00fc mfc0 v0,c0_debug +[ 0-9a-f]+: 0058 00fc mfc0 v0,c0_depc +[ 0-9a-f]+: 0059 00fc mfc0 v0,c0_perfcnt +[ 0-9a-f]+: 005a 00fc mfc0 v0,c0_errctl +[ 0-9a-f]+: 005b 00fc mfc0 v0,c0_cacheerr +[ 0-9a-f]+: 005c 00fc mfc0 v0,c0_taglo +[ 0-9a-f]+: 005d 00fc mfc0 v0,c0_taghi +[ 0-9a-f]+: 005e 00fc mfc0 v0,c0_errorepc +[ 0-9a-f]+: 005f 00fc mfc0 v0,c0_desave +[ 0-9a-f]+: 0040 00fc mfc0 v0,c0_index +[ 0-9a-f]+: 0040 08fc mfc0 v0,c0_mvpcontrol +[ 0-9a-f]+: 0040 10fc mfc0 v0,c0_mvpconf0 +[ 0-9a-f]+: 0040 18fc mfc0 v0,c0_mvpconf1 +[ 0-9a-f]+: 0040 20fc mfc0 v0,\$0,4 +[ 0-9a-f]+: 0040 28fc mfc0 v0,\$0,5 +[ 0-9a-f]+: 0040 30fc mfc0 v0,\$0,6 +[ 0-9a-f]+: 0040 38fc mfc0 v0,\$0,7 +[ 0-9a-f]+: 0041 00fc mfc0 v0,c0_random +[ 0-9a-f]+: 0041 08fc mfc0 v0,c0_vpecontrol +[ 0-9a-f]+: 0041 10fc mfc0 v0,c0_vpeconf0 +[ 0-9a-f]+: 0041 18fc mfc0 v0,c0_vpeconf1 +[ 0-9a-f]+: 0041 20fc mfc0 v0,c0_yqmask +[ 0-9a-f]+: 0041 28fc mfc0 v0,c0_vpeschedule +[ 0-9a-f]+: 0041 30fc mfc0 v0,c0_vpeschefback +[ 0-9a-f]+: 0041 38fc mfc0 v0,\$1,7 +[ 0-9a-f]+: 0042 00fc mfc0 v0,c0_entrylo0 +[ 0-9a-f]+: 0042 08fc mfc0 v0,c0_tcstatus +[ 0-9a-f]+: 0042 10fc mfc0 v0,c0_tcbind +[ 0-9a-f]+: 0042 18fc mfc0 v0,c0_tcrestart +[ 0-9a-f]+: 0042 20fc mfc0 v0,c0_tchalt +[ 0-9a-f]+: 0042 28fc mfc0 v0,c0_tccontext +[ 0-9a-f]+: 0042 30fc mfc0 v0,c0_tcschedule +[ 0-9a-f]+: 0042 38fc mfc0 v0,c0_tcschefback +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 4602 mfhi v0 +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 4604 mfhi a0 +[ 0-9a-f]+: 461d mfhi sp +[ 0-9a-f]+: 461e mfhi s8 +[ 0-9a-f]+: 461f mfhi ra +[ 0-9a-f]+: 0000 0d7c mfhi zero +[ 0-9a-f]+: 0002 0d7c mfhi v0 +[ 0-9a-f]+: 0003 0d7c mfhi v1 +[ 0-9a-f]+: 0004 0d7c mfhi a0 +[ 0-9a-f]+: 001d 0d7c mfhi sp +[ 0-9a-f]+: 001e 0d7c mfhi s8 +[ 0-9a-f]+: 001f 0d7c mfhi ra +[ 0-9a-f]+: 4640 mflo zero +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 4644 mflo a0 +[ 0-9a-f]+: 465d mflo sp +[ 0-9a-f]+: 465e mflo s8 +[ 0-9a-f]+: 465f mflo ra +[ 0-9a-f]+: 0000 1d7c mflo zero +[ 0-9a-f]+: 0002 1d7c mflo v0 +[ 0-9a-f]+: 0003 1d7c mflo v1 +[ 0-9a-f]+: 0004 1d7c mflo a0 +[ 0-9a-f]+: 001d 1d7c mflo sp +[ 0-9a-f]+: 001e 1d7c mflo s8 +[ 0-9a-f]+: 001f 1d7c mflo ra +[ 0-9a-f]+: 0062 1018 movn v0,v0,v1 +[ 0-9a-f]+: 0062 1018 movn v0,v0,v1 +[ 0-9a-f]+: 0083 1018 movn v0,v1,a0 +[ 0-9a-f]+: 0062 1058 movz v0,v0,v1 +[ 0-9a-f]+: 0062 1058 movz v0,v0,v1 +[ 0-9a-f]+: 0083 1058 movz v0,v1,a0 +[ 0-9a-f]+: 00a4 eb3c msub a0,a1 +[ 0-9a-f]+: 00a4 fb3c msubu a0,a1 +[ 0-9a-f]+: 0040 02fc mtc0 v0,c0_index +[ 0-9a-f]+: 0041 02fc mtc0 v0,c0_random +[ 0-9a-f]+: 0042 02fc mtc0 v0,c0_entrylo0 +[ 0-9a-f]+: 0043 02fc mtc0 v0,c0_entrylo1 +[ 0-9a-f]+: 0044 02fc mtc0 v0,c0_context +[ 0-9a-f]+: 0045 02fc mtc0 v0,c0_pagemask +[ 0-9a-f]+: 0046 02fc mtc0 v0,c0_wired +[ 0-9a-f]+: 0047 02fc mtc0 v0,c0_hwrena +[ 0-9a-f]+: 0048 02fc mtc0 v0,c0_badvaddr +[ 0-9a-f]+: 0049 02fc mtc0 v0,c0_count +[ 0-9a-f]+: 004a 02fc mtc0 v0,c0_entryhi +[ 0-9a-f]+: 004b 02fc mtc0 v0,c0_compare +[ 0-9a-f]+: 004c 02fc mtc0 v0,c0_status +[ 0-9a-f]+: 004d 02fc mtc0 v0,c0_cause +[ 0-9a-f]+: 004e 02fc mtc0 v0,c0_epc +[ 0-9a-f]+: 004f 02fc mtc0 v0,c0_prid +[ 0-9a-f]+: 0050 02fc mtc0 v0,c0_config +[ 0-9a-f]+: 0051 02fc mtc0 v0,c0_lladdr +[ 0-9a-f]+: 0052 02fc mtc0 v0,c0_watchlo +[ 0-9a-f]+: 0053 02fc mtc0 v0,c0_watchhi +[ 0-9a-f]+: 0054 02fc mtc0 v0,c0_xcontext +[ 0-9a-f]+: 0055 02fc mtc0 v0,\$21 +[ 0-9a-f]+: 0056 02fc mtc0 v0,\$22 +[ 0-9a-f]+: 0057 02fc mtc0 v0,c0_debug +[ 0-9a-f]+: 0058 02fc mtc0 v0,c0_depc +[ 0-9a-f]+: 0059 02fc mtc0 v0,c0_perfcnt +[ 0-9a-f]+: 005a 02fc mtc0 v0,c0_errctl +[ 0-9a-f]+: 005b 02fc mtc0 v0,c0_cacheerr +[ 0-9a-f]+: 005c 02fc mtc0 v0,c0_taglo +[ 0-9a-f]+: 005d 02fc mtc0 v0,c0_taghi +[ 0-9a-f]+: 005e 02fc mtc0 v0,c0_errorepc +[ 0-9a-f]+: 005f 02fc mtc0 v0,c0_desave +[ 0-9a-f]+: 0040 02fc mtc0 v0,c0_index +[ 0-9a-f]+: 0040 0afc mtc0 v0,c0_mvpcontrol +[ 0-9a-f]+: 0040 12fc mtc0 v0,c0_mvpconf0 +[ 0-9a-f]+: 0040 1afc mtc0 v0,c0_mvpconf1 +[ 0-9a-f]+: 0040 22fc mtc0 v0,\$0,4 +[ 0-9a-f]+: 0040 2afc mtc0 v0,\$0,5 +[ 0-9a-f]+: 0040 32fc mtc0 v0,\$0,6 +[ 0-9a-f]+: 0040 3afc mtc0 v0,\$0,7 +[ 0-9a-f]+: 0041 02fc mtc0 v0,c0_random +[ 0-9a-f]+: 0041 0afc mtc0 v0,c0_vpecontrol +[ 0-9a-f]+: 0041 12fc mtc0 v0,c0_vpeconf0 +[ 0-9a-f]+: 0041 1afc mtc0 v0,c0_vpeconf1 +[ 0-9a-f]+: 0041 22fc mtc0 v0,c0_yqmask +[ 0-9a-f]+: 0041 2afc mtc0 v0,c0_vpeschedule +[ 0-9a-f]+: 0041 32fc mtc0 v0,c0_vpeschefback +[ 0-9a-f]+: 0041 3afc mtc0 v0,\$1,7 +[ 0-9a-f]+: 0042 02fc mtc0 v0,c0_entrylo0 +[ 0-9a-f]+: 0042 0afc mtc0 v0,c0_tcstatus +[ 0-9a-f]+: 0042 12fc mtc0 v0,c0_tcbind +[ 0-9a-f]+: 0042 1afc mtc0 v0,c0_tcrestart +[ 0-9a-f]+: 0042 22fc mtc0 v0,c0_tchalt +[ 0-9a-f]+: 0042 2afc mtc0 v0,c0_tccontext +[ 0-9a-f]+: 0042 32fc mtc0 v0,c0_tcschedule +[ 0-9a-f]+: 0042 3afc mtc0 v0,c0_tcschefback +[ 0-9a-f]+: 0000 2d7c mthi zero +[ 0-9a-f]+: 0002 2d7c mthi v0 +[ 0-9a-f]+: 0003 2d7c mthi v1 +[ 0-9a-f]+: 0004 2d7c mthi a0 +[ 0-9a-f]+: 001d 2d7c mthi sp +[ 0-9a-f]+: 001e 2d7c mthi s8 +[ 0-9a-f]+: 001f 2d7c mthi ra +[ 0-9a-f]+: 0000 3d7c mtlo zero +[ 0-9a-f]+: 0002 3d7c mtlo v0 +[ 0-9a-f]+: 0003 3d7c mtlo v1 +[ 0-9a-f]+: 0004 3d7c mtlo a0 +[ 0-9a-f]+: 001d 3d7c mtlo sp +[ 0-9a-f]+: 001e 3d7c mtlo s8 +[ 0-9a-f]+: 001f 3d7c mtlo ra +[ 0-9a-f]+: 0083 1210 mul v0,v1,a0 +[ 0-9a-f]+: 03fe ea10 mul sp,s8,ra +[ 0-9a-f]+: 0082 1210 mul v0,v0,a0 +[ 0-9a-f]+: 0082 1210 mul v0,v0,a0 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0022 8b3c mult v0,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 0022 8b3c mult v0,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 0022 8b3c mult v0,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0022 8b3c mult v0,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 8b3c mult v0,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0083 8b3c mult v1,a0 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0042 f880 sra v0,v0,0x1f +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 0022 6c3c tne v0,at,0x6 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 3020 0004 li at,4 +[ 0-9a-f]+: 0023 8b3c mult v1,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0042 f880 sra v0,v0,0x1f +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 0022 6c3c tne v0,at,0x6 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0083 9b3c multu v1,a0 +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0001 6c3c tne at,zero,0x6 +[ 0-9a-f]+: 3020 0004 li at,4 +[ 0-9a-f]+: 0023 9b3c multu v1,at +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0001 6c3c tne at,zero,0x6 +[ 0-9a-f]+: 0062 8b3c mult v0,v1 +[ 0-9a-f]+: 0062 9b3c multu v0,v1 +[ 0-9a-f]+: 0060 1190 neg v0,v1 +[ 0-9a-f]+: 0040 1190 neg v0,v0 +[ 0-9a-f]+: 0040 1190 neg v0,v0 +[ 0-9a-f]+: 0060 11d0 negu v0,v1 +[ 0-9a-f]+: 0040 11d0 negu v0,v0 +[ 0-9a-f]+: 0040 11d0 negu v0,v0 +[ 0-9a-f]+: 0060 11d0 negu v0,v1 +[ 0-9a-f]+: 0040 11d0 negu v0,v0 +[ 0-9a-f]+: 0040 11d0 negu v0,v0 +[ 0-9a-f]+: 4412 not v0,v0 +[ 0-9a-f]+: 4412 not v0,v0 +[ 0-9a-f]+: 4413 not v0,v1 +[ 0-9a-f]+: 4414 not v0,a0 +[ 0-9a-f]+: 4415 not v0,a1 +[ 0-9a-f]+: 4416 not v0,a2 +[ 0-9a-f]+: 4417 not v0,a3 +[ 0-9a-f]+: 4410 not v0,s0 +[ 0-9a-f]+: 4411 not v0,s1 +[ 0-9a-f]+: 4419 not v1,s1 +[ 0-9a-f]+: 4421 not a0,s1 +[ 0-9a-f]+: 4429 not a1,s1 +[ 0-9a-f]+: 4431 not a2,s1 +[ 0-9a-f]+: 4439 not a3,s1 +[ 0-9a-f]+: 4401 not s0,s1 +[ 0-9a-f]+: 4409 not s1,s1 +[ 0-9a-f]+: 4417 not v0,a3 +[ 0-9a-f]+: 4417 not v0,a3 +[ 0-9a-f]+: 0083 12d0 nor v0,v1,a0 +[ 0-9a-f]+: 03fe ead0 nor sp,s8,ra +[ 0-9a-f]+: 0082 12d0 nor v0,v0,a0 +[ 0-9a-f]+: 0082 12d0 nor v0,v0,a0 +[ 0-9a-f]+: 5043 8000 ori v0,v1,0x8000 +[ 0-9a-f]+: 0002 12d0 not v0,v0 +[ 0-9a-f]+: 5043 ffff ori v0,v1,0xffff +[ 0-9a-f]+: 0002 12d0 not v0,v0 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 12d0 nor v0,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0023 12d0 nor v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 12d0 nor v0,v1,at +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 44d2 or v0,v0,v0 +[ 0-9a-f]+: 44d3 or v0,v0,v1 +[ 0-9a-f]+: 44d4 or v0,v0,a0 +[ 0-9a-f]+: 44d5 or v0,v0,a1 +[ 0-9a-f]+: 44d6 or v0,v0,a2 +[ 0-9a-f]+: 44d7 or v0,v0,a3 +[ 0-9a-f]+: 44d0 or v0,v0,s0 +[ 0-9a-f]+: 44d1 or v0,v0,s1 +[ 0-9a-f]+: 44da or v1,v1,v0 +[ 0-9a-f]+: 44e2 or a0,a0,v0 +[ 0-9a-f]+: 44ea or a1,a1,v0 +[ 0-9a-f]+: 44f2 or a2,a2,v0 +[ 0-9a-f]+: 44fa or a3,a3,v0 +[ 0-9a-f]+: 44c2 or s0,s0,v0 +[ 0-9a-f]+: 44ca or s1,s1,v0 +[ 0-9a-f]+: 44d2 or v0,v0,v0 +[ 0-9a-f]+: 44d3 or v0,v0,v1 +[ 0-9a-f]+: 44d3 or v0,v0,v1 +[ 0-9a-f]+: 0083 1290 or v0,v1,a0 +[ 0-9a-f]+: 03fe ea90 or sp,s8,ra +[ 0-9a-f]+: 0082 1290 or v0,v0,a0 +[ 0-9a-f]+: 0082 1290 or v0,v0,a0 +[ 0-9a-f]+: 5043 8000 ori v0,v1,0x8000 +[ 0-9a-f]+: 5043 ffff ori v0,v1,0xffff +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1290 or v0,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0023 1290 or v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1290 or v0,v1,at +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 5064 7fff ori v1,a0,0x7fff +[ 0-9a-f]+: 5064 ffff ori v1,a0,0xffff +[ 0-9a-f]+: 5063 ffff ori v1,v1,0xffff +[ 0-9a-f]+: 5063 ffff ori v1,v1,0xffff +[ 0-9a-f]+: 0040 6b3c rdhwr v0,hwr_cpunum +[ 0-9a-f]+: 0041 6b3c rdhwr v0,hwr_synci_step +[ 0-9a-f]+: 0042 6b3c rdhwr v0,hwr_cc +[ 0-9a-f]+: 0043 6b3c rdhwr v0,hwr_ccres +[ 0-9a-f]+: 0044 6b3c rdhwr v0,\$4 +[ 0-9a-f]+: 0045 6b3c rdhwr v0,\$5 +[ 0-9a-f]+: 0046 6b3c rdhwr v0,\$6 +[ 0-9a-f]+: 0047 6b3c rdhwr v0,\$7 +[ 0-9a-f]+: 0048 6b3c rdhwr v0,\$8 +[ 0-9a-f]+: 0049 6b3c rdhwr v0,\$9 +[ 0-9a-f]+: 004a 6b3c rdhwr v0,\$10 +[ 0-9a-f]+: 0043 e17c rdpgpr v0,v1 +[ 0-9a-f]+: 0042 e17c rdpgpr v0,v0 +[ 0-9a-f]+: 0042 e17c rdpgpr v0,v0 +[ 0-9a-f]+: 0062 ab3c div zero,v0,v1 +[ 0-9a-f]+: 03fe ab3c div zero,s8,ra +[ 0-9a-f]+: 0003 703c teq v1,zero,0x7 +[ 0-9a-f]+: 0060 ab3c div zero,zero,v1 +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b423 fffe bne v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: 0020 603c teq zero,at,0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 001f 703c teq ra,zero,0x7 +[ 0-9a-f]+: 03e0 ab3c div zero,zero,ra +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b43f fffe bne ra,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: 0020 603c teq zero,at,0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0004 703c teq a0,zero,0x7 +[ 0-9a-f]+: 0083 ab3c div zero,v1,a0 +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b424 fffe bne a0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: 0023 603c teq v1,at,0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4602 mfhi v0 +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 0024 ab3c div zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 0062 bb3c divu zero,v0,v1 +[ 0-9a-f]+: 03fe bb3c divu zero,s8,ra +[ 0-9a-f]+: 0003 703c teq v1,zero,0x7 +[ 0-9a-f]+: 0060 bb3c divu zero,zero,v1 +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 001f 703c teq ra,zero,0x7 +[ 0-9a-f]+: 03e0 bb3c divu zero,zero,ra +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0003 bb3c divu zero,v1,zero +[ 0-9a-f]+: 4602 mfhi v0 +[ 0-9a-f]+: 0004 703c teq a0,zero,0x7 +[ 0-9a-f]+: 0083 bb3c divu zero,v1,a0 +[ 0-9a-f]+: 4602 mfhi v0 +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0024 bb3c divu zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 0024 bb3c divu zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 0080 11d0 negu v0,a0 +[ 0-9a-f]+: 0062 10d0 rorv v0,v1,v0 +[ 0-9a-f]+: 0080 09d0 negu at,a0 +[ 0-9a-f]+: 0041 10d0 rorv v0,v0,at +[ 0-9a-f]+: 0060 11d0 negu v0,v1 +[ 0-9a-f]+: 0062 10d0 rorv v0,v1,v0 +[ 0-9a-f]+: 0040 11d0 negu v0,v0 +[ 0-9a-f]+: 0062 10d0 rorv v0,v1,v0 +[ 0-9a-f]+: 0043 00c0 ror v0,v1,0x0 +[ 0-9a-f]+: 0043 f8c0 ror v0,v1,0x1f +[ 0-9a-f]+: 0043 08c0 ror v0,v1,0x1 +[ 0-9a-f]+: 0042 08c0 ror v0,v0,0x1 +[ 0-9a-f]+: 0042 08c0 ror v0,v0,0x1 +[ 0-9a-f]+: 0043 00c0 ror v0,v1,0x0 +[ 0-9a-f]+: 0043 08c0 ror v0,v1,0x1 +[ 0-9a-f]+: 0043 f8c0 ror v0,v1,0x1f +[ 0-9a-f]+: 0042 f8c0 ror v0,v0,0x1f +[ 0-9a-f]+: 0042 f8c0 ror v0,v0,0x1f +[ 0-9a-f]+: 0064 10d0 rorv v0,v1,a0 +[ 0-9a-f]+: 0044 10d0 rorv v0,v0,a0 +[ 0-9a-f]+: 0064 10d0 rorv v0,v1,a0 +[ 0-9a-f]+: 0044 10d0 rorv v0,v0,a0 +[ 0-9a-f]+: 0064 10d0 rorv v0,v1,a0 +[ 0-9a-f]+: 0044 10d0 rorv v0,v0,a0 +[ 0-9a-f]+: 0064 10d0 rorv v0,v1,a0 +[ 0-9a-f]+: 0044 10d0 rorv v0,v0,a0 +[ 0-9a-f]+: 8830 sb zero,0\(v1\) +[ 0-9a-f]+: 8830 sb zero,0\(v1\) +[ 0-9a-f]+: 8831 sb zero,1\(v1\) +[ 0-9a-f]+: 8832 sb zero,2\(v1\) +[ 0-9a-f]+: 8833 sb zero,3\(v1\) +[ 0-9a-f]+: 8834 sb zero,4\(v1\) +[ 0-9a-f]+: 8835 sb zero,5\(v1\) +[ 0-9a-f]+: 8836 sb zero,6\(v1\) +[ 0-9a-f]+: 8837 sb zero,7\(v1\) +[ 0-9a-f]+: 8838 sb zero,8\(v1\) +[ 0-9a-f]+: 8839 sb zero,9\(v1\) +[ 0-9a-f]+: 883a sb zero,10\(v1\) +[ 0-9a-f]+: 883b sb zero,11\(v1\) +[ 0-9a-f]+: 883c sb zero,12\(v1\) +[ 0-9a-f]+: 883d sb zero,13\(v1\) +[ 0-9a-f]+: 883e sb zero,14\(v1\) +[ 0-9a-f]+: 883f sb zero,15\(v1\) +[ 0-9a-f]+: 893f sb v0,15\(v1\) +[ 0-9a-f]+: 89bf sb v1,15\(v1\) +[ 0-9a-f]+: 8a3f sb a0,15\(v1\) +[ 0-9a-f]+: 8abf sb a1,15\(v1\) +[ 0-9a-f]+: 8b3f sb a2,15\(v1\) +[ 0-9a-f]+: 8bbf sb a3,15\(v1\) +[ 0-9a-f]+: 88bf sb s1,15\(v1\) +[ 0-9a-f]+: 88cf sb s1,15\(a0\) +[ 0-9a-f]+: 88df sb s1,15\(a1\) +[ 0-9a-f]+: 88ef sb s1,15\(a2\) +[ 0-9a-f]+: 88ff sb s1,15\(a3\) +[ 0-9a-f]+: 88af sb s1,15\(v0\) +[ 0-9a-f]+: 888f sb s1,15\(s0\) +[ 0-9a-f]+: 889f sb s1,15\(s1\) +[ 0-9a-f]+: 1860 0004 sb v1,4\(zero\) +[ 0-9a-f]+: 1860 0004 sb v1,4\(zero\) +[ 0-9a-f]+: 1860 7fff sb v1,32767\(zero\) +[ 0-9a-f]+: 1860 8000 sb v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 1861 ffff sb v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1860 8000 sb v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 1860 8001 sb v1,-32767\(zero\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1860 ffff sb v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 1861 5678 sb v1,22136\(at\) +[ 0-9a-f]+: 1864 0000 sb v1,0\(a0\) +[ 0-9a-f]+: 1864 0000 sb v1,0\(a0\) +[ 0-9a-f]+: 1864 7fff sb v1,32767\(a0\) +[ 0-9a-f]+: 1864 8000 sb v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 ffff sb v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1864 8000 sb v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 1864 8001 sb v1,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1864 ffff sb v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 5678 sb v1,22136\(at\) +[ 0-9a-f]+: 6060 b004 sc v1,4\(zero\) +[ 0-9a-f]+: 6060 b004 sc v1,4\(zero\) +[ 0-9a-f]+: 6060 b7ff sc v1,2047\(zero\) +[ 0-9a-f]+: 6060 b800 sc v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 6060 bfff sc v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 b678 sc v1,1656\(at\) +[ 0-9a-f]+: 6064 b000 sc v1,0\(a0\) +[ 0-9a-f]+: 6064 b000 sc v1,0\(a0\) +[ 0-9a-f]+: 6064 b7ff sc v1,2047\(a0\) +[ 0-9a-f]+: 6064 b800 sc v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 6064 bfff sc v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b678 sc v1,1656\(at\) +[ 0-9a-f]+: 46c0 sdbbp +[ 0-9a-f]+: 46c0 sdbbp +[ 0-9a-f]+: 46c1 sdbbp 0x1 +[ 0-9a-f]+: 46c2 sdbbp 0x2 +[ 0-9a-f]+: 46c3 sdbbp 0x3 +[ 0-9a-f]+: 46c4 sdbbp 0x4 +[ 0-9a-f]+: 46c5 sdbbp 0x5 +[ 0-9a-f]+: 46c6 sdbbp 0x6 +[ 0-9a-f]+: 46c7 sdbbp 0x7 +[ 0-9a-f]+: 46c8 sdbbp 0x8 +[ 0-9a-f]+: 46c9 sdbbp 0x9 +[ 0-9a-f]+: 46ca sdbbp 0xa +[ 0-9a-f]+: 46cb sdbbp 0xb +[ 0-9a-f]+: 46cc sdbbp 0xc +[ 0-9a-f]+: 46cd sdbbp 0xd +[ 0-9a-f]+: 46ce sdbbp 0xe +[ 0-9a-f]+: 46cf sdbbp 0xf +[ 0-9a-f]+: 0000 db7c sdbbp +[ 0-9a-f]+: 0000 db7c sdbbp +[ 0-9a-f]+: 0001 db7c sdbbp 0x1 +[ 0-9a-f]+: 0002 db7c sdbbp 0x2 +[ 0-9a-f]+: 00ff db7c sdbbp 0xff +[ 0-9a-f]+: 0043 2b3c seb v0,v1 +[ 0-9a-f]+: 0042 2b3c seb v0,v0 +[ 0-9a-f]+: 0042 2b3c seb v0,v0 +[ 0-9a-f]+: 0043 3b3c seh v0,v1 +[ 0-9a-f]+: 0042 3b3c seh v0,v0 +[ 0-9a-f]+: 0042 3b3c seh v0,v0 +[ 0-9a-f]+: 0083 1310 xor v0,v1,a0 +[ 0-9a-f]+: b042 0001 sltiu v0,v0,1 +[ 0-9a-f]+: b043 0001 sltiu v0,v1,1 +[ 0-9a-f]+: b044 0001 sltiu v0,a0,1 +[ 0-9a-f]+: b043 0001 sltiu v0,v1,1 +[ 0-9a-f]+: 7043 0001 xori v0,v1,0x1 +[ 0-9a-f]+: b042 0001 sltiu v0,v0,1 +[ 0-9a-f]+: 3043 0001 addiu v0,v1,1 +[ 0-9a-f]+: b042 0001 sltiu v0,v0,1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1310 xor v0,v1,at +[ 0-9a-f]+: b042 0001 sltiu v0,v0,1 +[ 0-9a-f]+: 0083 1350 slt v0,v1,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0082 1350 slt v0,v0,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0082 1350 slt v0,v0,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 9043 0000 slti v0,v1,0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 9043 8000 slti v0,v1,-32768 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 9043 0000 slti v0,v1,0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 9043 7fff slti v0,v1,32767 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0083 1390 sltu v0,v1,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0082 1390 sltu v0,v0,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0082 1390 sltu v0,v0,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: b043 0000 sltiu v0,v1,0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: b043 8000 sltiu v0,v1,-32768 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: b043 0000 sltiu v0,v1,0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: b043 7fff sltiu v0,v1,32767 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0064 1350 slt v0,a0,v1 +[ 0-9a-f]+: 0044 1350 slt v0,a0,v0 +[ 0-9a-f]+: 0044 1350 slt v0,a0,v0 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 0064 1390 sltu v0,a0,v1 +[ 0-9a-f]+: 0044 1390 sltu v0,a0,v0 +[ 0-9a-f]+: 0044 1390 sltu v0,a0,v0 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: a930 sh v0,0\(v1\) +[ 0-9a-f]+: a930 sh v0,0\(v1\) +[ 0-9a-f]+: a931 sh v0,2\(v1\) +[ 0-9a-f]+: a932 sh v0,4\(v1\) +[ 0-9a-f]+: a933 sh v0,6\(v1\) +[ 0-9a-f]+: a934 sh v0,8\(v1\) +[ 0-9a-f]+: a935 sh v0,10\(v1\) +[ 0-9a-f]+: a936 sh v0,12\(v1\) +[ 0-9a-f]+: a937 sh v0,14\(v1\) +[ 0-9a-f]+: a938 sh v0,16\(v1\) +[ 0-9a-f]+: a939 sh v0,18\(v1\) +[ 0-9a-f]+: a93a sh v0,20\(v1\) +[ 0-9a-f]+: a93b sh v0,22\(v1\) +[ 0-9a-f]+: a93c sh v0,24\(v1\) +[ 0-9a-f]+: a93d sh v0,26\(v1\) +[ 0-9a-f]+: a93e sh v0,28\(v1\) +[ 0-9a-f]+: a93f sh v0,30\(v1\) +[ 0-9a-f]+: a94f sh v0,30\(a0\) +[ 0-9a-f]+: a95f sh v0,30\(a1\) +[ 0-9a-f]+: a96f sh v0,30\(a2\) +[ 0-9a-f]+: a97f sh v0,30\(a3\) +[ 0-9a-f]+: a92f sh v0,30\(v0\) +[ 0-9a-f]+: a90f sh v0,30\(s0\) +[ 0-9a-f]+: a91f sh v0,30\(s1\) +[ 0-9a-f]+: a99f sh v1,30\(s1\) +[ 0-9a-f]+: aa1f sh a0,30\(s1\) +[ 0-9a-f]+: aa9f sh a1,30\(s1\) +[ 0-9a-f]+: ab1f sh a2,30\(s1\) +[ 0-9a-f]+: ab9f sh a3,30\(s1\) +[ 0-9a-f]+: a89f sh s1,30\(s1\) +[ 0-9a-f]+: a81f sh zero,30\(s1\) +[ 0-9a-f]+: 3860 0004 sh v1,4\(zero\) +[ 0-9a-f]+: 3860 0004 sh v1,4\(zero\) +[ 0-9a-f]+: 3860 7fff sh v1,32767\(zero\) +[ 0-9a-f]+: 3860 8000 sh v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 3861 ffff sh v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 3861 0000 sh v1,0\(at\) +[ 0-9a-f]+: 3860 8000 sh v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 3861 0001 sh v1,1\(at\) +[ 0-9a-f]+: 3860 8001 sh v1,-32767\(zero\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 3861 0000 sh v1,0\(at\) +[ 0-9a-f]+: 3860 ffff sh v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 3861 5678 sh v1,22136\(at\) +[ 0-9a-f]+: 3864 0000 sh v1,0\(a0\) +[ 0-9a-f]+: 3864 0000 sh v1,0\(a0\) +[ 0-9a-f]+: 3864 7fff sh v1,32767\(a0\) +[ 0-9a-f]+: 3864 8000 sh v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3861 ffff sh v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3861 0000 sh v1,0\(at\) +[ 0-9a-f]+: 3864 8000 sh v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3861 0001 sh v1,1\(at\) +[ 0-9a-f]+: 3864 8001 sh v1,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3861 0000 sh v1,0\(at\) +[ 0-9a-f]+: 3864 ffff sh v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3861 5678 sh v1,22136\(at\) +[ 0-9a-f]+: 0064 1350 slt v0,a0,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0044 1350 slt v0,a0,v0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0044 1350 slt v0,a0,v0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0064 1390 sltu v0,a0,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0044 1390 sltu v0,a0,v0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0044 1390 sltu v0,a0,v0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 2522 sll v0,v0,1 +[ 0-9a-f]+: 2524 sll v0,v0,2 +[ 0-9a-f]+: 2526 sll v0,v0,3 +[ 0-9a-f]+: 2528 sll v0,v0,4 +[ 0-9a-f]+: 252a sll v0,v0,5 +[ 0-9a-f]+: 252c sll v0,v0,6 +[ 0-9a-f]+: 252e sll v0,v0,7 +[ 0-9a-f]+: 2520 sll v0,v0,8 +[ 0-9a-f]+: 2530 sll v0,v1,8 +[ 0-9a-f]+: 2540 sll v0,a0,8 +[ 0-9a-f]+: 2550 sll v0,a1,8 +[ 0-9a-f]+: 2560 sll v0,a2,8 +[ 0-9a-f]+: 2570 sll v0,a3,8 +[ 0-9a-f]+: 2500 sll v0,s0,8 +[ 0-9a-f]+: 2510 sll v0,s1,8 +[ 0-9a-f]+: 25a0 sll v1,v0,8 +[ 0-9a-f]+: 2620 sll a0,v0,8 +[ 0-9a-f]+: 26a0 sll a1,v0,8 +[ 0-9a-f]+: 2720 sll a2,v0,8 +[ 0-9a-f]+: 27a0 sll a3,v0,8 +[ 0-9a-f]+: 2420 sll s0,v0,8 +[ 0-9a-f]+: 24a0 sll s1,v0,8 +[ 0-9a-f]+: 2522 sll v0,v0,1 +[ 0-9a-f]+: 25b2 sll v1,v1,1 +[ 0-9a-f]+: 0064 1010 sllv v0,v1,a0 +[ 0-9a-f]+: 0044 1010 sllv v0,v0,a0 +[ 0-9a-f]+: 0044 1010 sllv v0,v0,a0 +[ 0-9a-f]+: 0044 1010 sllv v0,v0,a0 +[ 0-9a-f]+: 0044 0000 sll v0,a0,0x0 +[ 0-9a-f]+: 0044 0800 sll v0,a0,0x1 +[ 0-9a-f]+: 0044 f800 sll v0,a0,0x1f +[ 0-9a-f]+: 0042 f800 sll v0,v0,0x1f +[ 0-9a-f]+: 0042 f800 sll v0,v0,0x1f +[ 0-9a-f]+: 0083 1350 slt v0,v1,a0 +[ 0-9a-f]+: 0082 1350 slt v0,v0,a0 +[ 0-9a-f]+: 0082 1350 slt v0,v0,a0 +[ 0-9a-f]+: 9043 0000 slti v0,v1,0 +[ 0-9a-f]+: 9043 8000 slti v0,v1,-32768 +[ 0-9a-f]+: 9043 0000 slti v0,v1,0 +[ 0-9a-f]+: 9043 7fff slti v0,v1,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 9064 8000 slti v1,a0,-32768 +[ 0-9a-f]+: 9064 0000 slti v1,a0,0 +[ 0-9a-f]+: 9064 7fff slti v1,a0,32767 +[ 0-9a-f]+: 9064 ffff slti v1,a0,-1 +[ 0-9a-f]+: 9063 ffff slti v1,v1,-1 +[ 0-9a-f]+: 9063 ffff slti v1,v1,-1 +[ 0-9a-f]+: b064 8000 sltiu v1,a0,-32768 +[ 0-9a-f]+: b064 0000 sltiu v1,a0,0 +[ 0-9a-f]+: b064 7fff sltiu v1,a0,32767 +[ 0-9a-f]+: b064 ffff sltiu v1,a0,-1 +[ 0-9a-f]+: b063 ffff sltiu v1,v1,-1 +[ 0-9a-f]+: b063 ffff sltiu v1,v1,-1 +[ 0-9a-f]+: 0083 1390 sltu v0,v1,a0 +[ 0-9a-f]+: 0082 1390 sltu v0,v0,a0 +[ 0-9a-f]+: 0082 1390 sltu v0,v0,a0 +[ 0-9a-f]+: b043 0000 sltiu v0,v1,0 +[ 0-9a-f]+: b043 8000 sltiu v0,v1,-32768 +[ 0-9a-f]+: b043 0000 sltiu v0,v1,0 +[ 0-9a-f]+: b043 7fff sltiu v0,v1,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 0083 1310 xor v0,v1,a0 +[ 0-9a-f]+: 0040 1390 sltu v0,zero,v0 +[ 0-9a-f]+: 0080 1390 sltu v0,zero,a0 +[ 0-9a-f]+: 0060 1390 sltu v0,zero,v1 +[ 0-9a-f]+: 0060 1390 sltu v0,zero,v1 +[ 0-9a-f]+: 7043 0001 xori v0,v1,0x1 +[ 0-9a-f]+: 0040 1390 sltu v0,zero,v0 +[ 0-9a-f]+: 3043 0001 addiu v0,v1,1 +[ 0-9a-f]+: 0040 1390 sltu v0,zero,v0 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1310 xor v0,v1,at +[ 0-9a-f]+: 0040 1390 sltu v0,zero,v0 +[ 0-9a-f]+: 0064 1090 srav v0,v1,a0 +[ 0-9a-f]+: 0044 1090 srav v0,v0,a0 +[ 0-9a-f]+: 0044 1090 srav v0,v0,a0 +[ 0-9a-f]+: 0044 1090 srav v0,v0,a0 +[ 0-9a-f]+: 0044 0080 sra v0,a0,0x0 +[ 0-9a-f]+: 0044 0880 sra v0,a0,0x1 +[ 0-9a-f]+: 0044 f880 sra v0,a0,0x1f +[ 0-9a-f]+: 0042 f880 sra v0,v0,0x1f +[ 0-9a-f]+: 0042 f880 sra v0,v0,0x1f +[ 0-9a-f]+: 0064 1050 srlv v0,v1,a0 +[ 0-9a-f]+: 0044 1050 srlv v0,v0,a0 +[ 0-9a-f]+: 0044 1050 srlv v0,v0,a0 +[ 0-9a-f]+: 0044 1050 srlv v0,v0,a0 +[ 0-9a-f]+: 0044 0040 srl v0,a0,0x0 +[ 0-9a-f]+: 2543 srl v0,a0,1 +[ 0-9a-f]+: 0044 f840 srl v0,a0,0x1f +[ 0-9a-f]+: 0042 f840 srl v0,v0,0x1f +[ 0-9a-f]+: 0042 f840 srl v0,v0,0x1f +[ 0-9a-f]+: 2523 srl v0,v0,1 +[ 0-9a-f]+: 2525 srl v0,v0,2 +[ 0-9a-f]+: 2527 srl v0,v0,3 +[ 0-9a-f]+: 2529 srl v0,v0,4 +[ 0-9a-f]+: 252b srl v0,v0,5 +[ 0-9a-f]+: 252d srl v0,v0,6 +[ 0-9a-f]+: 252f srl v0,v0,7 +[ 0-9a-f]+: 2521 srl v0,v0,8 +[ 0-9a-f]+: 2531 srl v0,v1,8 +[ 0-9a-f]+: 2541 srl v0,a0,8 +[ 0-9a-f]+: 2551 srl v0,a1,8 +[ 0-9a-f]+: 2561 srl v0,a2,8 +[ 0-9a-f]+: 2571 srl v0,a3,8 +[ 0-9a-f]+: 2501 srl v0,s0,8 +[ 0-9a-f]+: 2511 srl v0,s1,8 +[ 0-9a-f]+: 2521 srl v0,v0,8 +[ 0-9a-f]+: 25a1 srl v1,v0,8 +[ 0-9a-f]+: 2621 srl a0,v0,8 +[ 0-9a-f]+: 26a1 srl a1,v0,8 +[ 0-9a-f]+: 2721 srl a2,v0,8 +[ 0-9a-f]+: 27a1 srl a3,v0,8 +[ 0-9a-f]+: 2421 srl s0,v0,8 +[ 0-9a-f]+: 24a1 srl s1,v0,8 +[ 0-9a-f]+: 25b3 srl v1,v1,1 +[ 0-9a-f]+: 25b3 srl v1,v1,1 +[ 0-9a-f]+: 0083 1190 sub v0,v1,a0 +[ 0-9a-f]+: 03fe e990 sub sp,s8,ra +[ 0-9a-f]+: 0082 1190 sub v0,v0,a0 +[ 0-9a-f]+: 0082 1190 sub v0,v0,a0 +[ 0-9a-f]+: 1042 0000 addi v0,v0,0 +[ 0-9a-f]+: 1042 ffff addi v0,v0,-1 +[ 0-9a-f]+: 1042 8001 addi v0,v0,-32767 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0022 1190 sub v0,v0,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 1190 sub v0,v0,at +[ 0-9a-f]+: 0527 subu v0,v1,v0 +[ 0-9a-f]+: 0537 subu v0,v1,v1 +[ 0-9a-f]+: 0547 subu v0,v1,a0 +[ 0-9a-f]+: 0557 subu v0,v1,a1 +[ 0-9a-f]+: 0567 subu v0,v1,a2 +[ 0-9a-f]+: 0577 subu v0,v1,a3 +[ 0-9a-f]+: 0507 subu v0,v1,s0 +[ 0-9a-f]+: 0517 subu v0,v1,s1 +[ 0-9a-f]+: 0515 subu v0,v0,s1 +[ 0-9a-f]+: 0519 subu v0,a0,s1 +[ 0-9a-f]+: 051b subu v0,a1,s1 +[ 0-9a-f]+: 051d subu v0,a2,s1 +[ 0-9a-f]+: 051f subu v0,a3,s1 +[ 0-9a-f]+: 0511 subu v0,s0,s1 +[ 0-9a-f]+: 0513 subu v0,s1,s1 +[ 0-9a-f]+: 0515 subu v0,v0,s1 +[ 0-9a-f]+: 0595 subu v1,v0,s1 +[ 0-9a-f]+: 0615 subu a0,v0,s1 +[ 0-9a-f]+: 0695 subu a1,v0,s1 +[ 0-9a-f]+: 0715 subu a2,v0,s1 +[ 0-9a-f]+: 0795 subu a3,v0,s1 +[ 0-9a-f]+: 0415 subu s0,v0,s1 +[ 0-9a-f]+: 0495 subu s1,v0,s1 +[ 0-9a-f]+: 07af subu a3,a3,v0 +[ 0-9a-f]+: 07af subu a3,a3,v0 +[ 0-9a-f]+: 0083 11d0 subu v0,v1,a0 +[ 0-9a-f]+: 03fe e9d0 subu sp,s8,ra +[ 0-9a-f]+: 0082 11d0 subu v0,v0,a0 +[ 0-9a-f]+: 0082 11d0 subu v0,v0,a0 +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ 0-9a-f]+: 3042 ffff addiu v0,v0,-1 +[ 0-9a-f]+: 3042 8001 addiu v0,v0,-32767 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0022 11d0 subu v0,v0,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 11d0 subu v0,v0,at +[ 0-9a-f]+: e940 sw v0,0\(a0\) +[ 0-9a-f]+: e940 sw v0,0\(a0\) +[ 0-9a-f]+: e941 sw v0,4\(a0\) +[ 0-9a-f]+: e942 sw v0,8\(a0\) +[ 0-9a-f]+: e943 sw v0,12\(a0\) +[ 0-9a-f]+: e944 sw v0,16\(a0\) +[ 0-9a-f]+: e945 sw v0,20\(a0\) +[ 0-9a-f]+: e946 sw v0,24\(a0\) +[ 0-9a-f]+: e947 sw v0,28\(a0\) +[ 0-9a-f]+: e948 sw v0,32\(a0\) +[ 0-9a-f]+: e949 sw v0,36\(a0\) +[ 0-9a-f]+: e94a sw v0,40\(a0\) +[ 0-9a-f]+: e94b sw v0,44\(a0\) +[ 0-9a-f]+: e94c sw v0,48\(a0\) +[ 0-9a-f]+: e94d sw v0,52\(a0\) +[ 0-9a-f]+: e94e sw v0,56\(a0\) +[ 0-9a-f]+: e94f sw v0,60\(a0\) +[ 0-9a-f]+: e95f sw v0,60\(a1\) +[ 0-9a-f]+: e96f sw v0,60\(a2\) +[ 0-9a-f]+: e97f sw v0,60\(a3\) +[ 0-9a-f]+: e90f sw v0,60\(s0\) +[ 0-9a-f]+: e91f sw v0,60\(s1\) +[ 0-9a-f]+: e92f sw v0,60\(v0\) +[ 0-9a-f]+: e93f sw v0,60\(v1\) +[ 0-9a-f]+: e9bf sw v1,60\(v1\) +[ 0-9a-f]+: ea3f sw a0,60\(v1\) +[ 0-9a-f]+: eabf sw a1,60\(v1\) +[ 0-9a-f]+: eb3f sw a2,60\(v1\) +[ 0-9a-f]+: ebbf sw a3,60\(v1\) +[ 0-9a-f]+: e8bf sw s1,60\(v1\) +[ 0-9a-f]+: e83f sw zero,60\(v1\) +[ 0-9a-f]+: c800 sw zero,0\(sp\) +[ 0-9a-f]+: c800 sw zero,0\(sp\) +[ 0-9a-f]+: c801 sw zero,4\(sp\) +[ 0-9a-f]+: c802 sw zero,8\(sp\) +[ 0-9a-f]+: c803 sw zero,12\(sp\) +[ 0-9a-f]+: c804 sw zero,16\(sp\) +[ 0-9a-f]+: c805 sw zero,20\(sp\) +[ 0-9a-f]+: c81e sw zero,120\(sp\) +[ 0-9a-f]+: c81f sw zero,124\(sp\) +[ 0-9a-f]+: c85f sw v0,124\(sp\) +[ 0-9a-f]+: ca3f sw s1,124\(sp\) +[ 0-9a-f]+: c87f sw v1,124\(sp\) +[ 0-9a-f]+: c89f sw a0,124\(sp\) +[ 0-9a-f]+: c8bf sw a1,124\(sp\) +[ 0-9a-f]+: c8df sw a2,124\(sp\) +[ 0-9a-f]+: c8ff sw a3,124\(sp\) +[ 0-9a-f]+: cbff sw ra,124\(sp\) +[ 0-9a-f]+: f860 0004 sw v1,4\(zero\) +[ 0-9a-f]+: f860 0004 sw v1,4\(zero\) +[ 0-9a-f]+: f860 7fff sw v1,32767\(zero\) +[ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: f861 0001 sw v1,1\(at\) +[ 0-9a-f]+: f860 8001 sw v1,-32767\(zero\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f860 ffff sw v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: f861 5678 sw v1,22136\(at\) +[ 0-9a-f]+: f864 0000 sw v1,0\(a0\) +[ 0-9a-f]+: f864 0000 sw v1,0\(a0\) +[ 0-9a-f]+: f864 7fff sw v1,32767\(a0\) +[ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: f861 0001 sw v1,1\(at\) +[ 0-9a-f]+: f864 8001 sw v1,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f864 ffff sw v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: f861 5678 sw v1,22136\(at\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) +[ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 8678 swl v1,1656\(at\) +[ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) +[ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) +[ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) +[ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6064 8fff swl v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8678 swl v1,1656\(at\) +[ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) +[ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) +[ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) +[ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 9678 swr v1,1656\(at\) +[ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) +[ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) +[ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) +[ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 6064 9fff swr v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9678 swr v1,1656\(at\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) +[ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 8678 swl v1,1656\(at\) +[ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) +[ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) +[ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) +[ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6064 8fff swl v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8678 swl v1,1656\(at\) +[ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) +[ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) +[ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) +[ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 9678 swr v1,1656\(at\) +[ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) +[ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) +[ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) +[ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 6064 9fff swr v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9678 swr v1,1656\(at\) +[ 0-9a-f]+: 454c swm s0,ra,48\(sp\) +[ 0-9a-f]+: 455c swm s0-s1,ra,48\(sp\) +[ 0-9a-f]+: 455c swm s0-s1,ra,48\(sp\) +[ 0-9a-f]+: 456c swm s0-s2,ra,48\(sp\) +[ 0-9a-f]+: 456c swm s0-s2,ra,48\(sp\) +[ 0-9a-f]+: 457c swm s0-s3,ra,48\(sp\) +[ 0-9a-f]+: 457c swm s0-s3,ra,48\(sp\) +[ 0-9a-f]+: 4540 swm s0,ra,0\(sp\) +[ 0-9a-f]+: 4540 swm s0,ra,0\(sp\) +[ 0-9a-f]+: 4541 swm s0,ra,4\(sp\) +[ 0-9a-f]+: 4542 swm s0,ra,8\(sp\) +[ 0-9a-f]+: 4543 swm s0,ra,12\(sp\) +[ 0-9a-f]+: 4544 swm s0,ra,16\(sp\) +[ 0-9a-f]+: 4545 swm s0,ra,20\(sp\) +[ 0-9a-f]+: 4546 swm s0,ra,24\(sp\) +[ 0-9a-f]+: 4547 swm s0,ra,28\(sp\) +[ 0-9a-f]+: 4548 swm s0,ra,32\(sp\) +[ 0-9a-f]+: 4549 swm s0,ra,36\(sp\) +[ 0-9a-f]+: 454a swm s0,ra,40\(sp\) +[ 0-9a-f]+: 454b swm s0,ra,44\(sp\) +[ 0-9a-f]+: 454c swm s0,ra,48\(sp\) +[ 0-9a-f]+: 454d swm s0,ra,52\(sp\) +[ 0-9a-f]+: 454e swm s0,ra,56\(sp\) +[ 0-9a-f]+: 454f swm s0,ra,60\(sp\) +[ 0-9a-f]+: 2020 d000 swm s0,0\(zero\) +[ 0-9a-f]+: 2020 d004 swm s0,4\(zero\) +[ 0-9a-f]+: 2020 d7ff swm s0,2047\(zero\) +[ 0-9a-f]+: 2020 d800 swm s0,-2048\(zero\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 2025 d000 swm s0,0\(a1\) +[ 0-9a-f]+: 2025 d7ff swm s0,2047\(a1\) +[ 0-9a-f]+: 2025 d800 swm s0,-2048\(a1\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 00a1 0950 addu at,at,a1 +[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 00a1 0950 addu at,at,a1 +[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 2045 d7ff swm s0-s1,2047\(a1\) +[ 0-9a-f]+: 2065 d7ff swm s0-s2,2047\(a1\) +[ 0-9a-f]+: 2085 d7ff swm s0-s3,2047\(a1\) +[ 0-9a-f]+: 20a5 d7ff swm s0-s4,2047\(a1\) +[ 0-9a-f]+: 20c5 d7ff swm s0-s5,2047\(a1\) +[ 0-9a-f]+: 20e5 d7ff swm s0-s6,2047\(a1\) +[ 0-9a-f]+: 2105 d7ff swm s0-s7,2047\(a1\) +[ 0-9a-f]+: 2125 d7ff swm s0-s7,s8,2047\(a1\) +[ 0-9a-f]+: 2205 d7ff swm ra,2047\(a1\) +[ 0-9a-f]+: 2225 d000 swm s0,ra,0\(a1\) +[ 0-9a-f]+: 2245 d000 swm s0-s1,ra,0\(a1\) +[ 0-9a-f]+: 2265 d000 swm s0-s2,ra,0\(a1\) +[ 0-9a-f]+: 2285 d000 swm s0-s3,ra,0\(a1\) +[ 0-9a-f]+: 22a5 d000 swm s0-s4,ra,0\(a1\) +[ 0-9a-f]+: 22c5 d000 swm s0-s5,ra,0\(a1\) +[ 0-9a-f]+: 22e5 d000 swm s0-s6,ra,0\(a1\) +[ 0-9a-f]+: 2305 d000 swm s0-s7,ra,0\(a1\) +[ 0-9a-f]+: 2325 d000 swm s0-s7,s8,ra,0\(a1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 dfff swm s0,-1\(at\) +[ 0-9a-f]+: 203d d000 swm s0,0\(sp\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 dfff swm s0,-1\(at\) +[ 0-9a-f]+: 2040 9000 swp v0,0\(zero\) +[ 0-9a-f]+: 2040 9004 swp v0,4\(zero\) +[ 0-9a-f]+: 2040 97ff swp v0,2047\(zero\) +[ 0-9a-f]+: 2040 9800 swp v0,-2048\(zero\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) +[ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) +[ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) +[ 0-9a-f]+: 2043 97ff swp v0,2047\(v1\) +[ 0-9a-f]+: 2043 9800 swp v0,-2048\(v1\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 9fff swp v0,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 2043 9000 swp v0,0\(v1\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 9fff swp v0,-1\(at\) +[ 0-9a-f]+: 0000 6b7c sync +[ 0-9a-f]+: 0000 6b7c sync +[ 0-9a-f]+: 0001 6b7c sync 0x1 +[ 0-9a-f]+: 0002 6b7c sync 0x2 +[ 0-9a-f]+: 0003 6b7c sync 0x3 +[ 0-9a-f]+: 0004 6b7c sync_wmb +[ 0-9a-f]+: 001e 6b7c sync 0x1e +[ 0-9a-f]+: 001f 6b7c sync 0x1f +[ 0-9a-f]+: 4200 0000 synci 0\(zero\) +[ 0-9a-f]+: 4200 0000 synci 0\(zero\) +[ 0-9a-f]+: 4200 0000 synci 0\(zero\) +[ 0-9a-f]+: 4200 07ff synci 2047\(zero\) +[ 0-9a-f]+: 4200 f800 synci -2048\(zero\) +[ 0-9a-f]+: 4200 0800 synci 2048\(zero\) +[ 0-9a-f]+: 4200 f7ff synci -2049\(zero\) +[ 0-9a-f]+: 4200 7fff synci 32767\(zero\) +[ 0-9a-f]+: 4200 8000 synci -32768\(zero\) +[ 0-9a-f]+: 4202 0000 synci 0\(v0\) +[ 0-9a-f]+: 4203 0000 synci 0\(v1\) +[ 0-9a-f]+: 4203 07ff synci 2047\(v1\) +[ 0-9a-f]+: 4203 f800 synci -2048\(v1\) +[ 0-9a-f]+: 4203 0800 synci 2048\(v1\) +[ 0-9a-f]+: 4203 f7ff synci -2049\(v1\) +[ 0-9a-f]+: 4203 7fff synci 32767\(v1\) +[ 0-9a-f]+: 4203 8000 synci -32768\(v1\) +[ 0-9a-f]+: 0000 8b7c syscall +[ 0-9a-f]+: 0000 8b7c syscall +[ 0-9a-f]+: 0001 8b7c syscall 0x1 +[ 0-9a-f]+: 0002 8b7c syscall 0x2 +[ 0-9a-f]+: 00ff 8b7c syscall 0xff +[ 0-9a-f]+: 41c2 0000 teqi v0,0 +[ 0-9a-f]+: 41c2 8000 teqi v0,-32768 +[ 0-9a-f]+: 41c2 7fff teqi v0,32767 +[ 0-9a-f]+: 41c2 ffff teqi v0,-1 +[ 0-9a-f]+: 0062 003c teq v0,v1 +[ 0-9a-f]+: 0043 003c teq v1,v0 +[ 0-9a-f]+: 0062 003c teq v0,v1 +[ 0-9a-f]+: 0062 103c teq v0,v1,0x1 +[ 0-9a-f]+: 0062 f03c teq v0,v1,0xf +[ 0-9a-f]+: 41c2 0000 teqi v0,0 +[ 0-9a-f]+: 41c2 8000 teqi v0,-32768 +[ 0-9a-f]+: 41c2 7fff teqi v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 003c teq v0,at +[ 0-9a-f]+: 4122 0000 tgei v0,0 +[ 0-9a-f]+: 4122 8000 tgei v0,-32768 +[ 0-9a-f]+: 4122 7fff tgei v0,32767 +[ 0-9a-f]+: 4122 ffff tgei v0,-1 +[ 0-9a-f]+: 0062 023c tge v0,v1 +[ 0-9a-f]+: 0043 023c tge v1,v0 +[ 0-9a-f]+: 0062 023c tge v0,v1 +[ 0-9a-f]+: 0062 123c tge v0,v1,0x1 +[ 0-9a-f]+: 0062 f23c tge v0,v1,0xf +[ 0-9a-f]+: 4122 0000 tgei v0,0 +[ 0-9a-f]+: 4122 8000 tgei v0,-32768 +[ 0-9a-f]+: 4122 7fff tgei v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 023c tge v0,at +[ 0-9a-f]+: 4162 0000 tgeiu v0,0 +[ 0-9a-f]+: 4162 8000 tgeiu v0,-32768 +[ 0-9a-f]+: 4162 7fff tgeiu v0,32767 +[ 0-9a-f]+: 4162 ffff tgeiu v0,-1 +[ 0-9a-f]+: 0062 043c tgeu v0,v1 +[ 0-9a-f]+: 0043 043c tgeu v1,v0 +[ 0-9a-f]+: 0062 043c tgeu v0,v1 +[ 0-9a-f]+: 0062 143c tgeu v0,v1,0x1 +[ 0-9a-f]+: 0062 f43c tgeu v0,v1,0xf +[ 0-9a-f]+: 4162 0000 tgeiu v0,0 +[ 0-9a-f]+: 4162 8000 tgeiu v0,-32768 +[ 0-9a-f]+: 4162 7fff tgeiu v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 043c tgeu v0,at +[ 0-9a-f]+: 0000 037c tlbp +[ 0-9a-f]+: 0000 137c tlbr +[ 0-9a-f]+: 0000 237c tlbwi +[ 0-9a-f]+: 0000 337c tlbwr +[ 0-9a-f]+: 4102 0000 tlti v0,0 +[ 0-9a-f]+: 4102 8000 tlti v0,-32768 +[ 0-9a-f]+: 4102 7fff tlti v0,32767 +[ 0-9a-f]+: 4102 ffff tlti v0,-1 +[ 0-9a-f]+: 0062 083c tlt v0,v1 +[ 0-9a-f]+: 0043 083c tlt v1,v0 +[ 0-9a-f]+: 0062 083c tlt v0,v1 +[ 0-9a-f]+: 0062 183c tlt v0,v1,0x1 +[ 0-9a-f]+: 0062 f83c tlt v0,v1,0xf +[ 0-9a-f]+: 4102 0000 tlti v0,0 +[ 0-9a-f]+: 4102 8000 tlti v0,-32768 +[ 0-9a-f]+: 4102 7fff tlti v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 083c tlt v0,at +[ 0-9a-f]+: 4142 0000 tltiu v0,0 +[ 0-9a-f]+: 4142 8000 tltiu v0,-32768 +[ 0-9a-f]+: 4142 7fff tltiu v0,32767 +[ 0-9a-f]+: 4142 ffff tltiu v0,-1 +[ 0-9a-f]+: 0062 0a3c tltu v0,v1 +[ 0-9a-f]+: 0043 0a3c tltu v1,v0 +[ 0-9a-f]+: 0062 0a3c tltu v0,v1 +[ 0-9a-f]+: 0062 1a3c tltu v0,v1,0x1 +[ 0-9a-f]+: 0062 fa3c tltu v0,v1,0xf +[ 0-9a-f]+: 4142 0000 tltiu v0,0 +[ 0-9a-f]+: 4142 8000 tltiu v0,-32768 +[ 0-9a-f]+: 4142 7fff tltiu v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 0a3c tltu v0,at +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0022 0a3c tltu v0,at +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0022 0a3c tltu v0,at +[ 0-9a-f]+: 4182 0000 tnei v0,0 +[ 0-9a-f]+: 4182 8000 tnei v0,-32768 +[ 0-9a-f]+: 4182 7fff tnei v0,32767 +[ 0-9a-f]+: 4182 ffff tnei v0,-1 +[ 0-9a-f]+: 0062 0c3c tne v0,v1 +[ 0-9a-f]+: 0043 0c3c tne v1,v0 +[ 0-9a-f]+: 0062 0c3c tne v0,v1 +[ 0-9a-f]+: 0062 1c3c tne v0,v1,0x1 +[ 0-9a-f]+: 0062 fc3c tne v0,v1,0xf +[ 0-9a-f]+: 4182 0000 tnei v0,0 +[ 0-9a-f]+: 4182 8000 tnei v0,-32768 +[ 0-9a-f]+: 4182 7fff tnei v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 0c3c tne v0,at +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0022 0c3c tne v0,at +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0022 0c3c tne v0,at +[ 0-9a-f]+: 1c20 0004 lb at,4\(zero\) +[ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1c20 0004 lb at,4\(zero\) +[ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1c24 0000 lb at,0\(a0\) +[ 0-9a-f]+: 1464 0001 lbu v1,1\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1c24 0000 lb at,0\(a0\) +[ 0-9a-f]+: 1464 0001 lbu v1,1\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1c24 7ffb lb at,32763\(a0\) +[ 0-9a-f]+: 1464 7ffc lbu v1,32764\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1c24 8000 lb at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1420 0004 lbu at,4\(zero\) +[ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1420 0004 lbu at,4\(zero\) +[ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1424 0000 lbu at,0\(a0\) +[ 0-9a-f]+: 1464 0001 lbu v1,1\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1424 0000 lbu at,0\(a0\) +[ 0-9a-f]+: 1464 0001 lbu v1,1\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1424 7ffb lbu at,32763\(a0\) +[ 0-9a-f]+: 1464 7ffc lbu v1,32764\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1424 8000 lbu at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 1003 lwr v1,3\(zero\) +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 1003 lwr v1,3\(zero\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 1007 lwr v1,7\(zero\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 1007 lwr v1,7\(zero\) +[ 0-9a-f]+: 3020 07ff li at,2047 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) +[ 0-9a-f]+: 6060 1803 lwr v1,-2045\(zero\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 7ffb li at,32763 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) +[ 0-9a-f]+: 6064 1003 lwr v1,3\(a0\) +[ 0-9a-f]+: 6064 0004 lwl v1,4\(a0\) +[ 0-9a-f]+: 6064 1007 lwr v1,7\(a0\) +[ 0-9a-f]+: 3024 07ff addiu at,a0,2047 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) +[ 0-9a-f]+: 6064 1803 lwr v1,-2045\(a0\) +[ 0-9a-f]+: 3024 0800 addiu at,a0,2048 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3024 f7ff addiu at,a0,-2049 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3024 7ffb addiu at,a0,32763 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 1860 0005 sb v1,5\(zero\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1820 0004 sb at,4\(zero\) +[ 0-9a-f]+: 1860 0005 sb v1,5\(zero\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1820 0004 sb at,4\(zero\) +[ 0-9a-f]+: 1864 0001 sb v1,1\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 0000 sb at,0\(a0\) +[ 0-9a-f]+: 1864 0001 sb v1,1\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 0000 sb at,0\(a0\) +[ 0-9a-f]+: 1864 7ffc sb v1,32764\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 7ffb sb at,32763\(a0\) +[ 0-9a-f]+: 1864 8001 sb v1,-32767\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 8000 sb at,-32768\(a0\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) +[ 0-9a-f]+: 6060 9003 swr v1,3\(zero\) +[ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) +[ 0-9a-f]+: 6060 9003 swr v1,3\(zero\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 9007 swr v1,7\(zero\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 9007 swr v1,7\(zero\) +[ 0-9a-f]+: 3020 07ff li at,2047 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) +[ 0-9a-f]+: 6060 9803 swr v1,-2045\(zero\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 7ffb li at,32763 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) +[ 0-9a-f]+: 6064 9003 swr v1,3\(a0\) +[ 0-9a-f]+: 6064 8004 swl v1,4\(a0\) +[ 0-9a-f]+: 6064 9007 swr v1,7\(a0\) +[ 0-9a-f]+: 3024 07ff addiu at,a0,2047 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) +[ 0-9a-f]+: 6064 9803 swr v1,-2045\(a0\) +[ 0-9a-f]+: 3024 0800 addiu at,a0,2048 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3024 f7ff addiu at,a0,-2049 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3024 7ffb addiu at,a0,32763 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 0000 937c wait +[ 0-9a-f]+: 0000 937c wait +[ 0-9a-f]+: 0001 937c wait 0x1 +[ 0-9a-f]+: 00ff 937c wait 0xff +[ 0-9a-f]+: 0043 f17c wrpgpr v0,v1 +[ 0-9a-f]+: 0044 f17c wrpgpr v0,a0 +[ 0-9a-f]+: 0042 f17c wrpgpr v0,v0 +[ 0-9a-f]+: 0042 f17c wrpgpr v0,v0 +[ 0-9a-f]+: 0043 7b3c wsbh v0,v1 +[ 0-9a-f]+: 0044 7b3c wsbh v0,a0 +[ 0-9a-f]+: 0042 7b3c wsbh v0,v0 +[ 0-9a-f]+: 0042 7b3c wsbh v0,v0 +[ 0-9a-f]+: 4452 xor v0,v0,v0 +[ 0-9a-f]+: 4453 xor v0,v0,v1 +[ 0-9a-f]+: 4454 xor v0,v0,a0 +[ 0-9a-f]+: 4455 xor v0,v0,a1 +[ 0-9a-f]+: 4456 xor v0,v0,a2 +[ 0-9a-f]+: 4457 xor v0,v0,a3 +[ 0-9a-f]+: 4450 xor v0,v0,s0 +[ 0-9a-f]+: 4451 xor v0,v0,s1 +[ 0-9a-f]+: 4459 xor v1,v1,s1 +[ 0-9a-f]+: 4461 xor a0,a0,s1 +[ 0-9a-f]+: 4469 xor a1,a1,s1 +[ 0-9a-f]+: 4471 xor a2,a2,s1 +[ 0-9a-f]+: 4479 xor a3,a3,s1 +[ 0-9a-f]+: 4441 xor s0,s0,s1 +[ 0-9a-f]+: 4449 xor s1,s1,s1 +[ 0-9a-f]+: 4453 xor v0,v0,v1 +[ 0-9a-f]+: 4453 xor v0,v0,v1 +[ 0-9a-f]+: 4453 xor v0,v0,v1 +[ 0-9a-f]+: 0083 1310 xor v0,v1,a0 +[ 0-9a-f]+: 03fe eb10 xor sp,s8,ra +[ 0-9a-f]+: 0082 1310 xor v0,v0,a0 +[ 0-9a-f]+: 0082 1310 xor v0,v0,a0 +[ 0-9a-f]+: 7043 8000 xori v0,v1,0x8000 +[ 0-9a-f]+: 7043 ffff xori v0,v1,0xffff +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1310 xor v0,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0023 1310 xor v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1310 xor v0,v1,at +[ 0-9a-f]+: 7064 0000 xori v1,a0,0x0 +[ 0-9a-f]+: 7064 7fff xori v1,a0,0x7fff +[ 0-9a-f]+: 7064 ffff xori v1,a0,0xffff +[ 0-9a-f]+: 7063 ffff xori v1,v1,0xffff +[ 0-9a-f]+: 7063 ffff xori v1,v1,0xffff +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9549 fffe beq t1,t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 9429 fffe beq t1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 404a fffe bgez t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 404a fffe bgez t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 408a fffe blez t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 016a 0b50 slt at,t2,t3 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 404a fffe bgez t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40ca fffe bgtz t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 902a 0002 slti at,t2,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9440 fffe beq zero,v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0062 0b90 sltu at,v0,v1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b402 fffe bnez v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b022 0002 sltiu at,v0,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4062 fffe bgezal v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 40c2 fffe bgtz v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4002 fffe bltz v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 012a 0b50 slt at,t2,t1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0029 0b50 slt at,t1,at +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 012a 0b90 sltu at,t2,t1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 404a fffe bgez t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 012a 0b50 slt at,t2,t1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4009 fffe bltz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 012a 0b90 sltu at,t2,t1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4009 fffe bltz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40ca fffe bgtz t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0149 0b50 slt at,t1,t2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4009 fffe bltz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b540 fffe bne zero,t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0149 0b90 sltu at,t1,t2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4009 fffe bltz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4029 fffe bltzal t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b549 fffe bne t1,t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: b429 fffe bne t1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b549 fffe bne t1,t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: b429 fffe bne t1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 400a fffe bltz t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 400a fffe bltz t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40ca fffe bgtz t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 016a 0b50 slt at,t2,t3 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 400a fffe bltz t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 408a fffe blez t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 902a 0002 slti at,t2,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b440 fffe bne zero,v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0062 0b90 sltu at,v0,v1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9402 fffe beqz v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b022 0002 sltiu at,v0,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4002 fffe bltz v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4002 fffe bltz v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4082 fffe blez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 012a 0b50 slt at,t2,t1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4009 fffe bltz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0029 0b50 slt at,t1,at +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 012a 0b90 sltu at,t2,t1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 400a fffe bltz t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 012a 0b50 slt at,t2,t1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 012a 0b90 sltu at,t2,t1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 408a fffe blez t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0149 0b50 slt at,t1,t2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9540 fffe beq zero,t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0149 0b90 sltu at,t1,t2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9549 fffe beq t1,t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 9429 fffe beq t1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 6d01 addiu v0,sp,0 +[ 0-9a-f]+: 6d03 addiu v0,sp,4 +[ 0-9a-f]+: 6d05 addiu v0,sp,8 +[ 0-9a-f]+: 6d07 addiu v0,sp,12 +[ 0-9a-f]+: 6d09 addiu v0,sp,16 +[ 0-9a-f]+: 6d7f addiu v0,sp,252 +[ 0-9a-f]+: 6dff addiu v1,sp,252 +[ 0-9a-f]+: 6e7f addiu a0,sp,252 +[ 0-9a-f]+: 6eff addiu a1,sp,252 +[ 0-9a-f]+: 6f7f addiu a2,sp,252 +[ 0-9a-f]+: 6fff addiu a3,sp,252 +[ 0-9a-f]+: 6c7f addiu s0,sp,252 +[ 0-9a-f]+: 6cff addiu s1,sp,252 +[ 0-9a-f]+: 6d2e addiu v0,v0,-1 +[ 0-9a-f]+: 6d3e addiu v0,v1,-1 +[ 0-9a-f]+: 6d4e addiu v0,a0,-1 +[ 0-9a-f]+: 6d5e addiu v0,a1,-1 +[ 0-9a-f]+: 6d6e addiu v0,a2,-1 +[ 0-9a-f]+: 6d7e addiu v0,a3,-1 +[ 0-9a-f]+: 6d0e addiu v0,s0,-1 +[ 0-9a-f]+: 6d1e addiu v0,s1,-1 +[ 0-9a-f]+: 6d9e addiu v1,s1,-1 +[ 0-9a-f]+: 6e1e addiu a0,s1,-1 +[ 0-9a-f]+: 6e9e addiu a1,s1,-1 +[ 0-9a-f]+: 6f1e addiu a2,s1,-1 +[ 0-9a-f]+: 6f9e addiu a3,s1,-1 +[ 0-9a-f]+: 6c1e addiu s0,s1,-1 +[ 0-9a-f]+: 6c9e addiu s1,s1,-1 +[ 0-9a-f]+: 6c90 addiu s1,s1,1 +[ 0-9a-f]+: 6c92 addiu s1,s1,4 +[ 0-9a-f]+: 6c94 addiu s1,s1,8 +[ 0-9a-f]+: 6c96 addiu s1,s1,12 +[ 0-9a-f]+: 6c98 addiu s1,s1,16 +[ 0-9a-f]+: 6c9a addiu s1,s1,20 +[ 0-9a-f]+: 6c9c addiu s1,s1,24 +[ 0-9a-f]+: 4c05 addiu sp,sp,8 +[ 0-9a-f]+: 4c07 addiu sp,sp,12 +[ 0-9a-f]+: 4dfd addiu sp,sp,1016 +[ 0-9a-f]+: 4dff addiu sp,sp,1020 +[ 0-9a-f]+: 4c01 addiu sp,sp,1024 +[ 0-9a-f]+: 4c03 addiu sp,sp,1028 +[ 0-9a-f]+: 4ffb addiu sp,sp,-12 +[ 0-9a-f]+: 4ff9 addiu sp,sp,-16 +[ 0-9a-f]+: 4e03 addiu sp,sp,-1020 +[ 0-9a-f]+: 4e01 addiu sp,sp,-1024 +[ 0-9a-f]+: 4fff addiu sp,sp,-1028 +[ 0-9a-f]+: 4ffd addiu sp,sp,-1032 +[ 0-9a-f]+: 4c00 addiu zero,zero,0 +[ 0-9a-f]+: 4c40 addiu v0,v0,0 +[ 0-9a-f]+: 4c60 addiu v1,v1,0 +[ 0-9a-f]+: 4fc0 addiu s8,s8,0 +[ 0-9a-f]+: 4fe0 addiu ra,ra,0 +[ 0-9a-f]+: 4fe2 addiu ra,ra,1 +[ 0-9a-f]+: 4fe4 addiu ra,ra,2 +[ 0-9a-f]+: 4fe6 addiu ra,ra,3 +[ 0-9a-f]+: 4fee addiu ra,ra,7 +[ 0-9a-f]+: 4ff4 addiu ra,ra,-6 +[ 0-9a-f]+: 4ff2 addiu ra,ra,-7 +[ 0-9a-f]+: 4ff0 addiu ra,ra,-8 +[ 0-9a-f]+: f860 0004 sw v1,4\(zero\) +[ 0-9a-f]+: f880 0008 sw a0,8\(zero\) +[ 0-9a-f]+: f860 0004 sw v1,4\(zero\) +[ 0-9a-f]+: f880 0008 sw a0,8\(zero\) +[ 0-9a-f]+: f860 7fff sw v1,32767\(zero\) +[ 0-9a-f]+: f880 8003 sw a0,-32765\(zero\) +[ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) +[ 0-9a-f]+: f880 8004 sw a0,-32764\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) +[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: f861 0001 sw v1,1\(at\) +[ 0-9a-f]+: f881 0005 sw a0,5\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) +[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: f861 5678 sw v1,22136\(at\) +[ 0-9a-f]+: f881 567c sw a0,22140\(at\) +[ 0-9a-f]+: f864 0000 sw v1,0\(a0\) +[ 0-9a-f]+: f884 0004 sw a0,4\(a0\) +[ 0-9a-f]+: f864 0000 sw v1,0\(a0\) +[ 0-9a-f]+: f884 0004 sw a0,4\(a0\) +[ 0-9a-f]+: f864 7fff sw v1,32767\(a0\) +[ 0-9a-f]+: f884 8003 sw a0,-32765\(a0\) +[ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) +[ 0-9a-f]+: f884 8004 sw a0,-32764\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) +[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 0001 sw v1,1\(at\) +[ 0-9a-f]+: f881 0005 sw a0,5\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) +[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 5678 sw v1,22136\(at\) +[ 0-9a-f]+: f881 567c sw a0,22140\(at\) +[ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) +[ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) +[ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) +[ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) +[ 0-9a-f]+: fc60 7fff lw v1,32767\(zero\) +[ 0-9a-f]+: fc80 8003 lw a0,-32765\(zero\) +[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) +[ 0-9a-f]+: fc80 8004 lw a0,-32764\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) +[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) +[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: fc61 0001 lw v1,1\(at\) +[ 0-9a-f]+: fc81 0005 lw a0,5\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) +[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) +[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) +[ 0-9a-f]+: fc81 567c lw a0,22140\(at\) +[ 0-9a-f]+: fc64 0000 lw v1,0\(a0\) +[ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) +[ 0-9a-f]+: fc64 0000 lw v1,0\(a0\) +[ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) +[ 0-9a-f]+: fc64 7fff lw v1,32767\(a0\) +[ 0-9a-f]+: fc84 8003 lw a0,-32765\(a0\) +[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) +[ 0-9a-f]+: fc84 8004 lw a0,-32764\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) +[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) +[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 0001 lw v1,1\(at\) +[ 0-9a-f]+: fc81 0005 lw a0,5\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) +[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) +[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) +[ 0-9a-f]+: fc81 567c lw a0,22140\(at\) +[ 0-9a-f]+: 4700 jraddiusp 0 +[ 0-9a-f]+: 4701 jraddiusp 4 +[ 0-9a-f]+: 4702 jraddiusp 8 +[ 0-9a-f]+: 4703 jraddiusp 12 +[ 0-9a-f]+: 4704 jraddiusp 16 +[ 0-9a-f]+: 4705 jraddiusp 20 +[ 0-9a-f]+: 4706 jraddiusp 24 +[ 0-9a-f]+: 4707 jraddiusp 28 +[ 0-9a-f]+: 4708 jraddiusp 32 +[ 0-9a-f]+: 4709 jraddiusp 36 +[ 0-9a-f]+: 470a jraddiusp 40 +[ 0-9a-f]+: 471e jraddiusp 120 +[ 0-9a-f]+: 471f jraddiusp 124 +[ 0-9a-f]+: 2060 2000 ldc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 2000 ldc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 2004 ldc2 \$3,4\(zero\) +[ 0-9a-f]+: 2060 2004 ldc2 \$3,4\(zero\) +[ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) +[ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2fff ldc2 \$3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2fff ldc2 \$3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 2064 2fff ldc2 \$3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2678 ldc2 \$3,1656\(at\) +[ 0-9a-f]+: 2060 0000 lwc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 0000 lwc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 0004 lwc2 \$3,4\(zero\) +[ 0-9a-f]+: 2060 0004 lwc2 \$3,4\(zero\) +[ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) +[ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0fff lwc2 \$3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0fff lwc2 \$3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 2064 0fff lwc2 \$3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0678 lwc2 \$3,1656\(at\) +[ 0-9a-f]+: 00a0 4d3c mfc2 a1,\$0 +[ 0-9a-f]+: 00a1 4d3c mfc2 a1,\$1 +[ 0-9a-f]+: 00a2 4d3c mfc2 a1,\$2 +[ 0-9a-f]+: 00a3 4d3c mfc2 a1,\$3 +[ 0-9a-f]+: 00a4 4d3c mfc2 a1,\$4 +[ 0-9a-f]+: 00a5 4d3c mfc2 a1,\$5 +[ 0-9a-f]+: 00a6 4d3c mfc2 a1,\$6 +[ 0-9a-f]+: 00a7 4d3c mfc2 a1,\$7 +[ 0-9a-f]+: 00a8 4d3c mfc2 a1,\$8 +[ 0-9a-f]+: 00a9 4d3c mfc2 a1,\$9 +[ 0-9a-f]+: 00aa 4d3c mfc2 a1,\$10 +[ 0-9a-f]+: 00ab 4d3c mfc2 a1,\$11 +[ 0-9a-f]+: 00ac 4d3c mfc2 a1,\$12 +[ 0-9a-f]+: 00ad 4d3c mfc2 a1,\$13 +[ 0-9a-f]+: 00ae 4d3c mfc2 a1,\$14 +[ 0-9a-f]+: 00af 4d3c mfc2 a1,\$15 +[ 0-9a-f]+: 00b0 4d3c mfc2 a1,\$16 +[ 0-9a-f]+: 00b1 4d3c mfc2 a1,\$17 +[ 0-9a-f]+: 00b2 4d3c mfc2 a1,\$18 +[ 0-9a-f]+: 00b3 4d3c mfc2 a1,\$19 +[ 0-9a-f]+: 00b4 4d3c mfc2 a1,\$20 +[ 0-9a-f]+: 00b5 4d3c mfc2 a1,\$21 +[ 0-9a-f]+: 00b6 4d3c mfc2 a1,\$22 +[ 0-9a-f]+: 00b7 4d3c mfc2 a1,\$23 +[ 0-9a-f]+: 00b8 4d3c mfc2 a1,\$24 +[ 0-9a-f]+: 00b9 4d3c mfc2 a1,\$25 +[ 0-9a-f]+: 00ba 4d3c mfc2 a1,\$26 +[ 0-9a-f]+: 00bb 4d3c mfc2 a1,\$27 +[ 0-9a-f]+: 00bc 4d3c mfc2 a1,\$28 +[ 0-9a-f]+: 00bd 4d3c mfc2 a1,\$29 +[ 0-9a-f]+: 00be 4d3c mfc2 a1,\$30 +[ 0-9a-f]+: 00bf 4d3c mfc2 a1,\$31 +[ 0-9a-f]+: 00a0 8d3c mfhc2 a1,\$0 +[ 0-9a-f]+: 00a1 8d3c mfhc2 a1,\$1 +[ 0-9a-f]+: 00a2 8d3c mfhc2 a1,\$2 +[ 0-9a-f]+: 00a3 8d3c mfhc2 a1,\$3 +[ 0-9a-f]+: 00a4 8d3c mfhc2 a1,\$4 +[ 0-9a-f]+: 00a5 8d3c mfhc2 a1,\$5 +[ 0-9a-f]+: 00a6 8d3c mfhc2 a1,\$6 +[ 0-9a-f]+: 00a7 8d3c mfhc2 a1,\$7 +[ 0-9a-f]+: 00a8 8d3c mfhc2 a1,\$8 +[ 0-9a-f]+: 00a9 8d3c mfhc2 a1,\$9 +[ 0-9a-f]+: 00aa 8d3c mfhc2 a1,\$10 +[ 0-9a-f]+: 00ab 8d3c mfhc2 a1,\$11 +[ 0-9a-f]+: 00ac 8d3c mfhc2 a1,\$12 +[ 0-9a-f]+: 00ad 8d3c mfhc2 a1,\$13 +[ 0-9a-f]+: 00ae 8d3c mfhc2 a1,\$14 +[ 0-9a-f]+: 00af 8d3c mfhc2 a1,\$15 +[ 0-9a-f]+: 00b0 8d3c mfhc2 a1,\$16 +[ 0-9a-f]+: 00b1 8d3c mfhc2 a1,\$17 +[ 0-9a-f]+: 00b2 8d3c mfhc2 a1,\$18 +[ 0-9a-f]+: 00b3 8d3c mfhc2 a1,\$19 +[ 0-9a-f]+: 00b4 8d3c mfhc2 a1,\$20 +[ 0-9a-f]+: 00b5 8d3c mfhc2 a1,\$21 +[ 0-9a-f]+: 00b6 8d3c mfhc2 a1,\$22 +[ 0-9a-f]+: 00b7 8d3c mfhc2 a1,\$23 +[ 0-9a-f]+: 00b8 8d3c mfhc2 a1,\$24 +[ 0-9a-f]+: 00b9 8d3c mfhc2 a1,\$25 +[ 0-9a-f]+: 00ba 8d3c mfhc2 a1,\$26 +[ 0-9a-f]+: 00bb 8d3c mfhc2 a1,\$27 +[ 0-9a-f]+: 00bc 8d3c mfhc2 a1,\$28 +[ 0-9a-f]+: 00bd 8d3c mfhc2 a1,\$29 +[ 0-9a-f]+: 00be 8d3c mfhc2 a1,\$30 +[ 0-9a-f]+: 00bf 8d3c mfhc2 a1,\$31 +[ 0-9a-f]+: 00a0 5d3c mtc2 a1,\$0 +[ 0-9a-f]+: 00a1 5d3c mtc2 a1,\$1 +[ 0-9a-f]+: 00a2 5d3c mtc2 a1,\$2 +[ 0-9a-f]+: 00a3 5d3c mtc2 a1,\$3 +[ 0-9a-f]+: 00a4 5d3c mtc2 a1,\$4 +[ 0-9a-f]+: 00a5 5d3c mtc2 a1,\$5 +[ 0-9a-f]+: 00a6 5d3c mtc2 a1,\$6 +[ 0-9a-f]+: 00a7 5d3c mtc2 a1,\$7 +[ 0-9a-f]+: 00a8 5d3c mtc2 a1,\$8 +[ 0-9a-f]+: 00a9 5d3c mtc2 a1,\$9 +[ 0-9a-f]+: 00aa 5d3c mtc2 a1,\$10 +[ 0-9a-f]+: 00ab 5d3c mtc2 a1,\$11 +[ 0-9a-f]+: 00ac 5d3c mtc2 a1,\$12 +[ 0-9a-f]+: 00ad 5d3c mtc2 a1,\$13 +[ 0-9a-f]+: 00ae 5d3c mtc2 a1,\$14 +[ 0-9a-f]+: 00af 5d3c mtc2 a1,\$15 +[ 0-9a-f]+: 00b0 5d3c mtc2 a1,\$16 +[ 0-9a-f]+: 00b1 5d3c mtc2 a1,\$17 +[ 0-9a-f]+: 00b2 5d3c mtc2 a1,\$18 +[ 0-9a-f]+: 00b3 5d3c mtc2 a1,\$19 +[ 0-9a-f]+: 00b4 5d3c mtc2 a1,\$20 +[ 0-9a-f]+: 00b5 5d3c mtc2 a1,\$21 +[ 0-9a-f]+: 00b6 5d3c mtc2 a1,\$22 +[ 0-9a-f]+: 00b7 5d3c mtc2 a1,\$23 +[ 0-9a-f]+: 00b8 5d3c mtc2 a1,\$24 +[ 0-9a-f]+: 00b9 5d3c mtc2 a1,\$25 +[ 0-9a-f]+: 00ba 5d3c mtc2 a1,\$26 +[ 0-9a-f]+: 00bb 5d3c mtc2 a1,\$27 +[ 0-9a-f]+: 00bc 5d3c mtc2 a1,\$28 +[ 0-9a-f]+: 00bd 5d3c mtc2 a1,\$29 +[ 0-9a-f]+: 00be 5d3c mtc2 a1,\$30 +[ 0-9a-f]+: 00bf 5d3c mtc2 a1,\$31 +[ 0-9a-f]+: 00a0 9d3c mthc2 a1,\$0 +[ 0-9a-f]+: 00a1 9d3c mthc2 a1,\$1 +[ 0-9a-f]+: 00a2 9d3c mthc2 a1,\$2 +[ 0-9a-f]+: 00a3 9d3c mthc2 a1,\$3 +[ 0-9a-f]+: 00a4 9d3c mthc2 a1,\$4 +[ 0-9a-f]+: 00a5 9d3c mthc2 a1,\$5 +[ 0-9a-f]+: 00a6 9d3c mthc2 a1,\$6 +[ 0-9a-f]+: 00a7 9d3c mthc2 a1,\$7 +[ 0-9a-f]+: 00a8 9d3c mthc2 a1,\$8 +[ 0-9a-f]+: 00a9 9d3c mthc2 a1,\$9 +[ 0-9a-f]+: 00aa 9d3c mthc2 a1,\$10 +[ 0-9a-f]+: 00ab 9d3c mthc2 a1,\$11 +[ 0-9a-f]+: 00ac 9d3c mthc2 a1,\$12 +[ 0-9a-f]+: 00ad 9d3c mthc2 a1,\$13 +[ 0-9a-f]+: 00ae 9d3c mthc2 a1,\$14 +[ 0-9a-f]+: 00af 9d3c mthc2 a1,\$15 +[ 0-9a-f]+: 00b0 9d3c mthc2 a1,\$16 +[ 0-9a-f]+: 00b1 9d3c mthc2 a1,\$17 +[ 0-9a-f]+: 00b2 9d3c mthc2 a1,\$18 +[ 0-9a-f]+: 00b3 9d3c mthc2 a1,\$19 +[ 0-9a-f]+: 00b4 9d3c mthc2 a1,\$20 +[ 0-9a-f]+: 00b5 9d3c mthc2 a1,\$21 +[ 0-9a-f]+: 00b6 9d3c mthc2 a1,\$22 +[ 0-9a-f]+: 00b7 9d3c mthc2 a1,\$23 +[ 0-9a-f]+: 00b8 9d3c mthc2 a1,\$24 +[ 0-9a-f]+: 00b9 9d3c mthc2 a1,\$25 +[ 0-9a-f]+: 00ba 9d3c mthc2 a1,\$26 +[ 0-9a-f]+: 00bb 9d3c mthc2 a1,\$27 +[ 0-9a-f]+: 00bc 9d3c mthc2 a1,\$28 +[ 0-9a-f]+: 00bd 9d3c mthc2 a1,\$29 +[ 0-9a-f]+: 00be 9d3c mthc2 a1,\$30 +[ 0-9a-f]+: 00bf 9d3c mthc2 a1,\$31 +[ 0-9a-f]+: 2060 a000 sdc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 a000 sdc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 a004 sdc2 \$3,4\(zero\) +[ 0-9a-f]+: 2060 a004 sdc2 \$3,4\(zero\) +[ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) +[ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 afff sdc2 \$3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 afff sdc2 \$3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 2064 afff sdc2 \$3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a678 sdc2 \$3,1656\(at\) +[ 0-9a-f]+: 2060 8000 swc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 8000 swc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 8004 swc2 \$3,4\(zero\) +[ 0-9a-f]+: 2060 8004 swc2 \$3,4\(zero\) +[ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) +[ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8fff swc2 \$3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8fff swc2 \$3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 2064 8fff swc2 \$3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8678 swc2 \$3,1656\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3043 0000 addiu v0,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6042 3000 ll v0,0\(v0\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 b000 sc v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 0000 lwl v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 1000 lwr v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 8000 swl v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 9000 swr v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2201 0000 lwc2 \$16,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2201 8000 swc2 \$16,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 0000 lwl v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 1000 lwr v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 8000 swl v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 9000 swr v0,0\(at\) +[ 0-9a-f]+: 03ff db7c sdbbp 0x3ff +[ 0-9a-f]+: 03ff 937c wait 0x3ff +[ 0-9a-f]+: 03ff 8b7c syscall 0x3ff +[ 0-9a-f]+: 03ff fffa cop2 0x7fffff +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0000 0000 nop + +[0-9a-f]+ : +[ 0-9a-f]+: 5400 01a0 prefx 0x0,zero\(zero\) +[ 0-9a-f]+: 5402 01a0 prefx 0x0,zero\(v0\) +[ 0-9a-f]+: 541f 01a0 prefx 0x0,zero\(ra\) +[ 0-9a-f]+: 545f 01a0 prefx 0x0,v0\(ra\) +[ 0-9a-f]+: 57ff 01a0 prefx 0x0,ra\(ra\) +[ 0-9a-f]+: 57ff 09a0 prefx 0x1,ra\(ra\) +[ 0-9a-f]+: 57ff 11a0 prefx 0x2,ra\(ra\) +[ 0-9a-f]+: 57ff f9a0 prefx 0x1f,ra\(ra\) +[ 0-9a-f]+: 5401 037b abs\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 037b abs\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 037b abs\.s \$f2,\$f2 +[ 0-9a-f]+: 5442 037b abs\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 237b abs\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 237b abs\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 237b abs\.d \$f2,\$f2 +[ 0-9a-f]+: 5442 237b abs\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 437b abs\.ps \$f0,\$f1 +[ 0-9a-f]+: 57df 437b abs\.ps \$f30,\$f31 +[ 0-9a-f]+: 5442 437b abs\.ps \$f2,\$f2 +[ 0-9a-f]+: 5442 437b abs\.ps \$f2,\$f2 +[ 0-9a-f]+: 5441 0030 add\.s \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e830 add\.s \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e830 add\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e830 add\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0130 add\.d \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e930 add\.d \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e930 add\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e930 add\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0230 add\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe ea30 add\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd ea30 add\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd ea30 add\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0019 alnv\.ps \$f0,\$f1,\$f2,zero +[ 0-9a-f]+: 5441 0099 alnv\.ps \$f0,\$f1,\$f2,v0 +[ 0-9a-f]+: 5441 07d9 alnv\.ps \$f0,\$f1,\$f2,ra +[ 0-9a-f]+: 57fe efd9 alnv\.ps \$f29,\$f30,\$f31,ra +[ 0-9a-f]+: 57fd efd9 alnv\.ps \$f29,\$f29,\$f31,ra +[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4384 fffe bc1f \$fcc1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4388 fffe bc1f \$fcc2,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 438c fffe bc1f \$fcc3,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4390 fffe bc1f \$fcc4,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4394 fffe bc1f \$fcc5,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4398 fffe bc1f \$fcc6,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 439c fffe bc1f \$fcc7,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43a0 fffe bc1t [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43a0 fffe bc1t [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43a4 fffe bc1t \$fcc1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43a8 fffe bc1t \$fcc2,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43ac fffe bc1t \$fcc3,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43b0 fffe bc1t \$fcc4,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43b4 fffe bc1t \$fcc5,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43b8 fffe bc1t \$fcc6,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43bc fffe bc1t \$fcc7,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 5420 043c c\.f\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 043c c\.f\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 043c c\.f\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 243c c\.f\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e43c c\.f\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 003c c\.f\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 003c c\.f\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 003c c\.f\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 203c c\.f\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e03c c\.f\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 083c c\.f\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 083c c\.f\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 083c c\.f\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 483c c\.f\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c83c c\.f\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 047c c\.un\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 047c c\.un\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 047c c\.un\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 247c c\.un\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e47c c\.un\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 007c c\.un\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 007c c\.un\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 007c c\.un\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 207c c\.un\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e07c c\.un\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 087c c\.un\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 087c c\.un\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 087c c\.un\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 487c c\.un\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c87c c\.un\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 04bc c\.eq\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 04bc c\.eq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 04bc c\.eq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 24bc c\.eq\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e4bc c\.eq\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 00bc c\.eq\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 00bc c\.eq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 00bc c\.eq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 20bc c\.eq\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e0bc c\.eq\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 08bc c\.eq\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 08bc c\.eq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 08bc c\.eq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 48bc c\.eq\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c8bc c\.eq\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 04fc c\.ueq\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 04fc c\.ueq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 04fc c\.ueq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 24fc c\.ueq\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e4fc c\.ueq\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 00fc c\.ueq\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 00fc c\.ueq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 00fc c\.ueq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 20fc c\.ueq\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e0fc c\.ueq\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 08fc c\.ueq\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 08fc c\.ueq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 08fc c\.ueq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 48fc c\.ueq\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c8fc c\.ueq\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 053c c\.olt\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 053c c\.olt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 053c c\.olt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 253c c\.olt\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e53c c\.olt\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 013c c\.olt\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 013c c\.olt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 013c c\.olt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 213c c\.olt\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e13c c\.olt\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 093c c\.olt\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 093c c\.olt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 093c c\.olt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 493c c\.olt\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c93c c\.olt\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 057c c\.ult\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 057c c\.ult\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 057c c\.ult\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 257c c\.ult\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e57c c\.ult\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 017c c\.ult\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 017c c\.ult\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 017c c\.ult\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 217c c\.ult\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e17c c\.ult\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 097c c\.ult\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 097c c\.ult\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 097c c\.ult\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 497c c\.ult\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c97c c\.ult\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 05bc c\.ole\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 05bc c\.ole\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 05bc c\.ole\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 25bc c\.ole\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e5bc c\.ole\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 01bc c\.ole\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 01bc c\.ole\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 01bc c\.ole\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 21bc c\.ole\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e1bc c\.ole\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 09bc c\.ole\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 09bc c\.ole\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 09bc c\.ole\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 49bc c\.ole\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c9bc c\.ole\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 05fc c\.ule\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 05fc c\.ule\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 05fc c\.ule\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 25fc c\.ule\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e5fc c\.ule\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 01fc c\.ule\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 01fc c\.ule\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 01fc c\.ule\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 21fc c\.ule\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e1fc c\.ule\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 09fc c\.ule\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 09fc c\.ule\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 09fc c\.ule\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 49fc c\.ule\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c9fc c\.ule\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 063c c\.sf\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 063c c\.sf\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 063c c\.sf\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 263c c\.sf\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e63c c\.sf\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 023c c\.sf\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 023c c\.sf\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 023c c\.sf\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 223c c\.sf\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e23c c\.sf\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0a3c c\.sf\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0a3c c\.sf\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0a3c c\.sf\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4a3c c\.sf\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe ca3c c\.sf\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 067c c\.ngle\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 067c c\.ngle\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 067c c\.ngle\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 267c c\.ngle\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e67c c\.ngle\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 027c c\.ngle\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 027c c\.ngle\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 027c c\.ngle\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 227c c\.ngle\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e27c c\.ngle\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0a7c c\.ngle\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0a7c c\.ngle\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0a7c c\.ngle\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4a7c c\.ngle\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe ca7c c\.ngle\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 06bc c\.seq\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 06bc c\.seq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 06bc c\.seq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 26bc c\.seq\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e6bc c\.seq\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 02bc c\.seq\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 02bc c\.seq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 02bc c\.seq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 22bc c\.seq\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e2bc c\.seq\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0abc c\.seq\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0abc c\.seq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0abc c\.seq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4abc c\.seq\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cabc c\.seq\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 06fc c\.ngl\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 06fc c\.ngl\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 06fc c\.ngl\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 26fc c\.ngl\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e6fc c\.ngl\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 02fc c\.ngl\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 02fc c\.ngl\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 02fc c\.ngl\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 22fc c\.ngl\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e2fc c\.ngl\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0afc c\.ngl\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0afc c\.ngl\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0afc c\.ngl\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4afc c\.ngl\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cafc c\.ngl\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 073c c\.lt\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 073c c\.lt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 073c c\.lt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 273c c\.lt\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e73c c\.lt\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 033c c\.lt\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 033c c\.lt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 033c c\.lt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 233c c\.lt\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e33c c\.lt\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0b3c c\.lt\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0b3c c\.lt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0b3c c\.lt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4b3c c\.lt\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cb3c c\.lt\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 077c c\.nge\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 077c c\.nge\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 077c c\.nge\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 277c c\.nge\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e77c c\.nge\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 037c c\.nge\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 037c c\.nge\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 037c c\.nge\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 237c c\.nge\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e37c c\.nge\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0b7c c\.nge\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0b7c c\.nge\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0b7c c\.nge\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4b7c c\.nge\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cb7c c\.nge\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 07bc c\.le\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 07bc c\.le\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 07bc c\.le\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 27bc c\.le\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e7bc c\.le\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 03bc c\.le\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 03bc c\.le\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 03bc c\.le\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 23bc c\.le\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e3bc c\.le\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0bbc c\.le\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0bbc c\.le\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0bbc c\.le\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4bbc c\.le\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cbbc c\.le\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 07fc c\.ngt\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 07fc c\.ngt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 07fc c\.ngt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 27fc c\.ngt\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e7fc c\.ngt\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 03fc c\.ngt\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 03fc c\.ngt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 03fc c\.ngt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 23fc c\.ngt\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e3fc c\.ngt\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0bfc c\.ngt\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0bfc c\.ngt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0bfc c\.ngt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4bfc c\.ngt\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cbfc c\.ngt\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5401 533b ceil\.l\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 533b ceil\.l\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 533b ceil\.l\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 133b ceil\.l\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 133b ceil\.l\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 133b ceil\.l\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 5b3b ceil\.w\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 5b3b ceil\.w\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 5b3b ceil\.w\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 1b3b ceil\.w\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 1b3b ceil\.w\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 1b3b ceil\.w\.s \$f2,\$f2 +[ 0-9a-f]+: 54a0 103b cfc1 a1,\$0 +[ 0-9a-f]+: 54a1 103b cfc1 a1,\$1 +[ 0-9a-f]+: 54a2 103b cfc1 a1,\$2 +[ 0-9a-f]+: 54a3 103b cfc1 a1,\$3 +[ 0-9a-f]+: 54a4 103b cfc1 a1,\$4 +[ 0-9a-f]+: 54a5 103b cfc1 a1,\$5 +[ 0-9a-f]+: 54a6 103b cfc1 a1,\$6 +[ 0-9a-f]+: 54a7 103b cfc1 a1,\$7 +[ 0-9a-f]+: 54a8 103b cfc1 a1,\$8 +[ 0-9a-f]+: 54a9 103b cfc1 a1,\$9 +[ 0-9a-f]+: 54aa 103b cfc1 a1,\$10 +[ 0-9a-f]+: 54ab 103b cfc1 a1,\$11 +[ 0-9a-f]+: 54ac 103b cfc1 a1,\$12 +[ 0-9a-f]+: 54ad 103b cfc1 a1,\$13 +[ 0-9a-f]+: 54ae 103b cfc1 a1,\$14 +[ 0-9a-f]+: 54af 103b cfc1 a1,\$15 +[ 0-9a-f]+: 54b0 103b cfc1 a1,\$16 +[ 0-9a-f]+: 54b1 103b cfc1 a1,\$17 +[ 0-9a-f]+: 54b2 103b cfc1 a1,\$18 +[ 0-9a-f]+: 54b3 103b cfc1 a1,\$19 +[ 0-9a-f]+: 54b4 103b cfc1 a1,\$20 +[ 0-9a-f]+: 54b5 103b cfc1 a1,\$21 +[ 0-9a-f]+: 54b6 103b cfc1 a1,\$22 +[ 0-9a-f]+: 54b7 103b cfc1 a1,\$23 +[ 0-9a-f]+: 54b8 103b cfc1 a1,\$24 +[ 0-9a-f]+: 54b9 103b cfc1 a1,\$25 +[ 0-9a-f]+: 54ba 103b cfc1 a1,\$26 +[ 0-9a-f]+: 54bb 103b cfc1 a1,\$27 +[ 0-9a-f]+: 54bc 103b cfc1 a1,\$28 +[ 0-9a-f]+: 54bd 103b cfc1 a1,\$29 +[ 0-9a-f]+: 54be 103b cfc1 a1,\$30 +[ 0-9a-f]+: 54bf 103b cfc1 a1,\$31 +[ 0-9a-f]+: 54a0 103b cfc1 a1,\$0 +[ 0-9a-f]+: 54a1 103b cfc1 a1,\$1 +[ 0-9a-f]+: 54a2 103b cfc1 a1,\$2 +[ 0-9a-f]+: 54a3 103b cfc1 a1,\$3 +[ 0-9a-f]+: 54a4 103b cfc1 a1,\$4 +[ 0-9a-f]+: 54a5 103b cfc1 a1,\$5 +[ 0-9a-f]+: 54a6 103b cfc1 a1,\$6 +[ 0-9a-f]+: 54a7 103b cfc1 a1,\$7 +[ 0-9a-f]+: 54a8 103b cfc1 a1,\$8 +[ 0-9a-f]+: 54a9 103b cfc1 a1,\$9 +[ 0-9a-f]+: 54aa 103b cfc1 a1,\$10 +[ 0-9a-f]+: 54ab 103b cfc1 a1,\$11 +[ 0-9a-f]+: 54ac 103b cfc1 a1,\$12 +[ 0-9a-f]+: 54ad 103b cfc1 a1,\$13 +[ 0-9a-f]+: 54ae 103b cfc1 a1,\$14 +[ 0-9a-f]+: 54af 103b cfc1 a1,\$15 +[ 0-9a-f]+: 54b0 103b cfc1 a1,\$16 +[ 0-9a-f]+: 54b1 103b cfc1 a1,\$17 +[ 0-9a-f]+: 54b2 103b cfc1 a1,\$18 +[ 0-9a-f]+: 54b3 103b cfc1 a1,\$19 +[ 0-9a-f]+: 54b4 103b cfc1 a1,\$20 +[ 0-9a-f]+: 54b5 103b cfc1 a1,\$21 +[ 0-9a-f]+: 54b6 103b cfc1 a1,\$22 +[ 0-9a-f]+: 54b7 103b cfc1 a1,\$23 +[ 0-9a-f]+: 54b8 103b cfc1 a1,\$24 +[ 0-9a-f]+: 54b9 103b cfc1 a1,\$25 +[ 0-9a-f]+: 54ba 103b cfc1 a1,\$26 +[ 0-9a-f]+: 54bb 103b cfc1 a1,\$27 +[ 0-9a-f]+: 54bc 103b cfc1 a1,\$28 +[ 0-9a-f]+: 54bd 103b cfc1 a1,\$29 +[ 0-9a-f]+: 54be 103b cfc1 a1,\$30 +[ 0-9a-f]+: 54bf 103b cfc1 a1,\$31 +[ 0-9a-f]+: 00a0 cd3c cfc2 a1,\$0 +[ 0-9a-f]+: 00a1 cd3c cfc2 a1,\$1 +[ 0-9a-f]+: 00a2 cd3c cfc2 a1,\$2 +[ 0-9a-f]+: 00a3 cd3c cfc2 a1,\$3 +[ 0-9a-f]+: 00a4 cd3c cfc2 a1,\$4 +[ 0-9a-f]+: 00a5 cd3c cfc2 a1,\$5 +[ 0-9a-f]+: 00a6 cd3c cfc2 a1,\$6 +[ 0-9a-f]+: 00a7 cd3c cfc2 a1,\$7 +[ 0-9a-f]+: 00a8 cd3c cfc2 a1,\$8 +[ 0-9a-f]+: 00a9 cd3c cfc2 a1,\$9 +[ 0-9a-f]+: 00aa cd3c cfc2 a1,\$10 +[ 0-9a-f]+: 00ab cd3c cfc2 a1,\$11 +[ 0-9a-f]+: 00ac cd3c cfc2 a1,\$12 +[ 0-9a-f]+: 00ad cd3c cfc2 a1,\$13 +[ 0-9a-f]+: 00ae cd3c cfc2 a1,\$14 +[ 0-9a-f]+: 00af cd3c cfc2 a1,\$15 +[ 0-9a-f]+: 00b0 cd3c cfc2 a1,\$16 +[ 0-9a-f]+: 00b1 cd3c cfc2 a1,\$17 +[ 0-9a-f]+: 00b2 cd3c cfc2 a1,\$18 +[ 0-9a-f]+: 00b3 cd3c cfc2 a1,\$19 +[ 0-9a-f]+: 00b4 cd3c cfc2 a1,\$20 +[ 0-9a-f]+: 00b5 cd3c cfc2 a1,\$21 +[ 0-9a-f]+: 00b6 cd3c cfc2 a1,\$22 +[ 0-9a-f]+: 00b7 cd3c cfc2 a1,\$23 +[ 0-9a-f]+: 00b8 cd3c cfc2 a1,\$24 +[ 0-9a-f]+: 00b9 cd3c cfc2 a1,\$25 +[ 0-9a-f]+: 00ba cd3c cfc2 a1,\$26 +[ 0-9a-f]+: 00bb cd3c cfc2 a1,\$27 +[ 0-9a-f]+: 00bc cd3c cfc2 a1,\$28 +[ 0-9a-f]+: 00bd cd3c cfc2 a1,\$29 +[ 0-9a-f]+: 00be cd3c cfc2 a1,\$30 +[ 0-9a-f]+: 00bf cd3c cfc2 a1,\$31 +[ 0-9a-f]+: 54a0 183b ctc1 a1,\$0 +[ 0-9a-f]+: 54a1 183b ctc1 a1,\$1 +[ 0-9a-f]+: 54a2 183b ctc1 a1,\$2 +[ 0-9a-f]+: 54a3 183b ctc1 a1,\$3 +[ 0-9a-f]+: 54a4 183b ctc1 a1,\$4 +[ 0-9a-f]+: 54a5 183b ctc1 a1,\$5 +[ 0-9a-f]+: 54a6 183b ctc1 a1,\$6 +[ 0-9a-f]+: 54a7 183b ctc1 a1,\$7 +[ 0-9a-f]+: 54a8 183b ctc1 a1,\$8 +[ 0-9a-f]+: 54a9 183b ctc1 a1,\$9 +[ 0-9a-f]+: 54aa 183b ctc1 a1,\$10 +[ 0-9a-f]+: 54ab 183b ctc1 a1,\$11 +[ 0-9a-f]+: 54ac 183b ctc1 a1,\$12 +[ 0-9a-f]+: 54ad 183b ctc1 a1,\$13 +[ 0-9a-f]+: 54ae 183b ctc1 a1,\$14 +[ 0-9a-f]+: 54af 183b ctc1 a1,\$15 +[ 0-9a-f]+: 54b0 183b ctc1 a1,\$16 +[ 0-9a-f]+: 54b1 183b ctc1 a1,\$17 +[ 0-9a-f]+: 54b2 183b ctc1 a1,\$18 +[ 0-9a-f]+: 54b3 183b ctc1 a1,\$19 +[ 0-9a-f]+: 54b4 183b ctc1 a1,\$20 +[ 0-9a-f]+: 54b5 183b ctc1 a1,\$21 +[ 0-9a-f]+: 54b6 183b ctc1 a1,\$22 +[ 0-9a-f]+: 54b7 183b ctc1 a1,\$23 +[ 0-9a-f]+: 54b8 183b ctc1 a1,\$24 +[ 0-9a-f]+: 54b9 183b ctc1 a1,\$25 +[ 0-9a-f]+: 54ba 183b ctc1 a1,\$26 +[ 0-9a-f]+: 54bb 183b ctc1 a1,\$27 +[ 0-9a-f]+: 54bc 183b ctc1 a1,\$28 +[ 0-9a-f]+: 54bd 183b ctc1 a1,\$29 +[ 0-9a-f]+: 54be 183b ctc1 a1,\$30 +[ 0-9a-f]+: 54bf 183b ctc1 a1,\$31 +[ 0-9a-f]+: 54a0 183b ctc1 a1,\$0 +[ 0-9a-f]+: 54a1 183b ctc1 a1,\$1 +[ 0-9a-f]+: 54a2 183b ctc1 a1,\$2 +[ 0-9a-f]+: 54a3 183b ctc1 a1,\$3 +[ 0-9a-f]+: 54a4 183b ctc1 a1,\$4 +[ 0-9a-f]+: 54a5 183b ctc1 a1,\$5 +[ 0-9a-f]+: 54a6 183b ctc1 a1,\$6 +[ 0-9a-f]+: 54a7 183b ctc1 a1,\$7 +[ 0-9a-f]+: 54a8 183b ctc1 a1,\$8 +[ 0-9a-f]+: 54a9 183b ctc1 a1,\$9 +[ 0-9a-f]+: 54aa 183b ctc1 a1,\$10 +[ 0-9a-f]+: 54ab 183b ctc1 a1,\$11 +[ 0-9a-f]+: 54ac 183b ctc1 a1,\$12 +[ 0-9a-f]+: 54ad 183b ctc1 a1,\$13 +[ 0-9a-f]+: 54ae 183b ctc1 a1,\$14 +[ 0-9a-f]+: 54af 183b ctc1 a1,\$15 +[ 0-9a-f]+: 54b0 183b ctc1 a1,\$16 +[ 0-9a-f]+: 54b1 183b ctc1 a1,\$17 +[ 0-9a-f]+: 54b2 183b ctc1 a1,\$18 +[ 0-9a-f]+: 54b3 183b ctc1 a1,\$19 +[ 0-9a-f]+: 54b4 183b ctc1 a1,\$20 +[ 0-9a-f]+: 54b5 183b ctc1 a1,\$21 +[ 0-9a-f]+: 54b6 183b ctc1 a1,\$22 +[ 0-9a-f]+: 54b7 183b ctc1 a1,\$23 +[ 0-9a-f]+: 54b8 183b ctc1 a1,\$24 +[ 0-9a-f]+: 54b9 183b ctc1 a1,\$25 +[ 0-9a-f]+: 54ba 183b ctc1 a1,\$26 +[ 0-9a-f]+: 54bb 183b ctc1 a1,\$27 +[ 0-9a-f]+: 54bc 183b ctc1 a1,\$28 +[ 0-9a-f]+: 54bd 183b ctc1 a1,\$29 +[ 0-9a-f]+: 54be 183b ctc1 a1,\$30 +[ 0-9a-f]+: 54bf 183b ctc1 a1,\$31 +[ 0-9a-f]+: 00a0 dd3c ctc2 a1,\$0 +[ 0-9a-f]+: 00a1 dd3c ctc2 a1,\$1 +[ 0-9a-f]+: 00a2 dd3c ctc2 a1,\$2 +[ 0-9a-f]+: 00a3 dd3c ctc2 a1,\$3 +[ 0-9a-f]+: 00a4 dd3c ctc2 a1,\$4 +[ 0-9a-f]+: 00a5 dd3c ctc2 a1,\$5 +[ 0-9a-f]+: 00a6 dd3c ctc2 a1,\$6 +[ 0-9a-f]+: 00a7 dd3c ctc2 a1,\$7 +[ 0-9a-f]+: 00a8 dd3c ctc2 a1,\$8 +[ 0-9a-f]+: 00a9 dd3c ctc2 a1,\$9 +[ 0-9a-f]+: 00aa dd3c ctc2 a1,\$10 +[ 0-9a-f]+: 00ab dd3c ctc2 a1,\$11 +[ 0-9a-f]+: 00ac dd3c ctc2 a1,\$12 +[ 0-9a-f]+: 00ad dd3c ctc2 a1,\$13 +[ 0-9a-f]+: 00ae dd3c ctc2 a1,\$14 +[ 0-9a-f]+: 00af dd3c ctc2 a1,\$15 +[ 0-9a-f]+: 00b0 dd3c ctc2 a1,\$16 +[ 0-9a-f]+: 00b1 dd3c ctc2 a1,\$17 +[ 0-9a-f]+: 00b2 dd3c ctc2 a1,\$18 +[ 0-9a-f]+: 00b3 dd3c ctc2 a1,\$19 +[ 0-9a-f]+: 00b4 dd3c ctc2 a1,\$20 +[ 0-9a-f]+: 00b5 dd3c ctc2 a1,\$21 +[ 0-9a-f]+: 00b6 dd3c ctc2 a1,\$22 +[ 0-9a-f]+: 00b7 dd3c ctc2 a1,\$23 +[ 0-9a-f]+: 00b8 dd3c ctc2 a1,\$24 +[ 0-9a-f]+: 00b9 dd3c ctc2 a1,\$25 +[ 0-9a-f]+: 00ba dd3c ctc2 a1,\$26 +[ 0-9a-f]+: 00bb dd3c ctc2 a1,\$27 +[ 0-9a-f]+: 00bc dd3c ctc2 a1,\$28 +[ 0-9a-f]+: 00bd dd3c ctc2 a1,\$29 +[ 0-9a-f]+: 00be dd3c ctc2 a1,\$30 +[ 0-9a-f]+: 00bf dd3c ctc2 a1,\$31 +[ 0-9a-f]+: 5401 537b cvt\.d\.l \$f0,\$f1 +[ 0-9a-f]+: 57df 537b cvt\.d\.l \$f30,\$f31 +[ 0-9a-f]+: 5442 537b cvt\.d\.l \$f2,\$f2 +[ 0-9a-f]+: 5401 137b cvt\.d\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 137b cvt\.d\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 137b cvt\.d\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 337b cvt\.d\.w \$f0,\$f1 +[ 0-9a-f]+: 57df 337b cvt\.d\.w \$f30,\$f31 +[ 0-9a-f]+: 5442 337b cvt\.d\.w \$f2,\$f2 +[ 0-9a-f]+: 5401 013b cvt\.l\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 013b cvt\.l\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 013b cvt\.l\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 413b cvt\.l\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 413b cvt\.l\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 413b cvt\.l\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 5b7b cvt\.s\.l \$f0,\$f1 +[ 0-9a-f]+: 57df 5b7b cvt\.s\.l \$f30,\$f31 +[ 0-9a-f]+: 5442 5b7b cvt\.s\.l \$f2,\$f2 +[ 0-9a-f]+: 5401 1b7b cvt\.s\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 1b7b cvt\.s\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 1b7b cvt\.s\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 3b7b cvt\.s\.w \$f0,\$f1 +[ 0-9a-f]+: 57df 3b7b cvt\.s\.w \$f30,\$f31 +[ 0-9a-f]+: 5442 3b7b cvt\.s\.w \$f2,\$f2 +[ 0-9a-f]+: 5401 213b cvt\.s\.pl \$f0,\$f1 +[ 0-9a-f]+: 57df 213b cvt\.s\.pl \$f30,\$f31 +[ 0-9a-f]+: 5442 213b cvt\.s\.pl \$f2,\$f2 +[ 0-9a-f]+: 5401 293b cvt\.s\.pu \$f0,\$f1 +[ 0-9a-f]+: 57df 293b cvt\.s\.pu \$f30,\$f31 +[ 0-9a-f]+: 5442 293b cvt\.s\.pu \$f2,\$f2 +[ 0-9a-f]+: 5401 093b cvt\.w\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 093b cvt\.w\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 093b cvt\.w\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 493b cvt\.w\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 493b cvt\.w\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 493b cvt\.w\.d \$f2,\$f2 +[ 0-9a-f]+: 5441 0180 cvt\.ps\.s \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e980 cvt\.ps\.s \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57fd e980 cvt\.ps\.s \$f29,\$f29,\$f31 +[ 0-9a-f]+: 57fd e980 cvt\.ps\.s \$f29,\$f29,\$f31 +[ 0-9a-f]+: 5441 01f0 div\.d \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e9f0 div\.d \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e9f0 div\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e9f0 div\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 00f0 div\.s \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e8f0 div\.s \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e8f0 div\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e8f0 div\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5401 433b floor\.l\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 433b floor\.l\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 433b floor\.l\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 033b floor\.l\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 033b floor\.l\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 033b floor\.l\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 4b3b floor\.w\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 4b3b floor\.w\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 4b3b floor\.w\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 0b3b floor\.w\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 0b3b floor\.w\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 0b3b floor\.w\.s \$f2,\$f2 +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 7fff ldc1 \$f3,32767\(a0\) +[ 0-9a-f]+: bc64 8000 ldc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 ffff ldc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0000 ldc1 \$f3,0\(at\) +[ 0-9a-f]+: bc64 8000 ldc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0001 ldc1 \$f3,1\(at\) +[ 0-9a-f]+: bc64 8001 ldc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0000 ldc1 \$f3,0\(at\) +[ 0-9a-f]+: bc64 ffff ldc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 5678 ldc1 \$f3,22136\(at\) +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 7fff ldc1 \$f3,32767\(a0\) +[ 0-9a-f]+: bc64 8000 ldc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 ffff ldc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0000 ldc1 \$f3,0\(at\) +[ 0-9a-f]+: bc64 8000 ldc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0001 ldc1 \$f3,1\(at\) +[ 0-9a-f]+: bc64 8001 ldc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0000 ldc1 \$f3,0\(at\) +[ 0-9a-f]+: bc64 ffff ldc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 5678 ldc1 \$f3,22136\(at\) +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 7fff ldc1 \$f3,32767\(a0\) +[ 0-9a-f]+: bc64 8000 ldc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 5400 00c8 ldxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 00c8 ldxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 00c8 ldxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 00c8 ldxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 00c8 ldxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 08c8 ldxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 10c8 ldxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f8c8 ldxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 5400 0148 luxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 0148 luxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 0148 luxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 0148 luxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 0148 luxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 0948 luxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 1148 luxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f948 luxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 7fff lwc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 ffff lwc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0001 lwc1 \$f3,1\(at\) +[ 0-9a-f]+: 9c64 8001 lwc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 ffff lwc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 5678 lwc1 \$f3,22136\(at\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 7fff lwc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 ffff lwc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0001 lwc1 \$f3,1\(at\) +[ 0-9a-f]+: 9c64 8001 lwc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 ffff lwc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 5678 lwc1 \$f3,22136\(at\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 7fff lwc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 ffff lwc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0001 lwc1 \$f3,1\(at\) +[ 0-9a-f]+: 9c64 8001 lwc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 ffff lwc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 5678 lwc1 \$f3,22136\(at\) +[ 0-9a-f]+: 5400 0048 lwxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 0048 lwxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 0048 lwxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 0048 lwxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 0048 lwxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 0848 lwxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 1048 lwxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f848 lwxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 5462 0049 madd\.d \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e749 madd\.d \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0041 madd\.s \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e741 madd\.s \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0051 madd\.ps \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e751 madd\.ps \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 54a0 203b mfc1 a1,\$f0 +[ 0-9a-f]+: 54a1 203b mfc1 a1,\$f1 +[ 0-9a-f]+: 54a2 203b mfc1 a1,\$f2 +[ 0-9a-f]+: 54a3 203b mfc1 a1,\$f3 +[ 0-9a-f]+: 54a4 203b mfc1 a1,\$f4 +[ 0-9a-f]+: 54a5 203b mfc1 a1,\$f5 +[ 0-9a-f]+: 54a6 203b mfc1 a1,\$f6 +[ 0-9a-f]+: 54a7 203b mfc1 a1,\$f7 +[ 0-9a-f]+: 54a8 203b mfc1 a1,\$f8 +[ 0-9a-f]+: 54a9 203b mfc1 a1,\$f9 +[ 0-9a-f]+: 54aa 203b mfc1 a1,\$f10 +[ 0-9a-f]+: 54ab 203b mfc1 a1,\$f11 +[ 0-9a-f]+: 54ac 203b mfc1 a1,\$f12 +[ 0-9a-f]+: 54ad 203b mfc1 a1,\$f13 +[ 0-9a-f]+: 54ae 203b mfc1 a1,\$f14 +[ 0-9a-f]+: 54af 203b mfc1 a1,\$f15 +[ 0-9a-f]+: 54b0 203b mfc1 a1,\$f16 +[ 0-9a-f]+: 54b1 203b mfc1 a1,\$f17 +[ 0-9a-f]+: 54b2 203b mfc1 a1,\$f18 +[ 0-9a-f]+: 54b3 203b mfc1 a1,\$f19 +[ 0-9a-f]+: 54b4 203b mfc1 a1,\$f20 +[ 0-9a-f]+: 54b5 203b mfc1 a1,\$f21 +[ 0-9a-f]+: 54b6 203b mfc1 a1,\$f22 +[ 0-9a-f]+: 54b7 203b mfc1 a1,\$f23 +[ 0-9a-f]+: 54b8 203b mfc1 a1,\$f24 +[ 0-9a-f]+: 54b9 203b mfc1 a1,\$f25 +[ 0-9a-f]+: 54ba 203b mfc1 a1,\$f26 +[ 0-9a-f]+: 54bb 203b mfc1 a1,\$f27 +[ 0-9a-f]+: 54bc 203b mfc1 a1,\$f28 +[ 0-9a-f]+: 54bd 203b mfc1 a1,\$f29 +[ 0-9a-f]+: 54be 203b mfc1 a1,\$f30 +[ 0-9a-f]+: 54bf 203b mfc1 a1,\$f31 +[ 0-9a-f]+: 54a0 203b mfc1 a1,\$f0 +[ 0-9a-f]+: 54a1 203b mfc1 a1,\$f1 +[ 0-9a-f]+: 54a2 203b mfc1 a1,\$f2 +[ 0-9a-f]+: 54a3 203b mfc1 a1,\$f3 +[ 0-9a-f]+: 54a4 203b mfc1 a1,\$f4 +[ 0-9a-f]+: 54a5 203b mfc1 a1,\$f5 +[ 0-9a-f]+: 54a6 203b mfc1 a1,\$f6 +[ 0-9a-f]+: 54a7 203b mfc1 a1,\$f7 +[ 0-9a-f]+: 54a8 203b mfc1 a1,\$f8 +[ 0-9a-f]+: 54a9 203b mfc1 a1,\$f9 +[ 0-9a-f]+: 54aa 203b mfc1 a1,\$f10 +[ 0-9a-f]+: 54ab 203b mfc1 a1,\$f11 +[ 0-9a-f]+: 54ac 203b mfc1 a1,\$f12 +[ 0-9a-f]+: 54ad 203b mfc1 a1,\$f13 +[ 0-9a-f]+: 54ae 203b mfc1 a1,\$f14 +[ 0-9a-f]+: 54af 203b mfc1 a1,\$f15 +[ 0-9a-f]+: 54b0 203b mfc1 a1,\$f16 +[ 0-9a-f]+: 54b1 203b mfc1 a1,\$f17 +[ 0-9a-f]+: 54b2 203b mfc1 a1,\$f18 +[ 0-9a-f]+: 54b3 203b mfc1 a1,\$f19 +[ 0-9a-f]+: 54b4 203b mfc1 a1,\$f20 +[ 0-9a-f]+: 54b5 203b mfc1 a1,\$f21 +[ 0-9a-f]+: 54b6 203b mfc1 a1,\$f22 +[ 0-9a-f]+: 54b7 203b mfc1 a1,\$f23 +[ 0-9a-f]+: 54b8 203b mfc1 a1,\$f24 +[ 0-9a-f]+: 54b9 203b mfc1 a1,\$f25 +[ 0-9a-f]+: 54ba 203b mfc1 a1,\$f26 +[ 0-9a-f]+: 54bb 203b mfc1 a1,\$f27 +[ 0-9a-f]+: 54bc 203b mfc1 a1,\$f28 +[ 0-9a-f]+: 54bd 203b mfc1 a1,\$f29 +[ 0-9a-f]+: 54be 203b mfc1 a1,\$f30 +[ 0-9a-f]+: 54bf 203b mfc1 a1,\$f31 +[ 0-9a-f]+: 54a0 303b mfhc1 a1,\$f0 +[ 0-9a-f]+: 54a1 303b mfhc1 a1,\$f1 +[ 0-9a-f]+: 54a2 303b mfhc1 a1,\$f2 +[ 0-9a-f]+: 54a3 303b mfhc1 a1,\$f3 +[ 0-9a-f]+: 54a4 303b mfhc1 a1,\$f4 +[ 0-9a-f]+: 54a5 303b mfhc1 a1,\$f5 +[ 0-9a-f]+: 54a6 303b mfhc1 a1,\$f6 +[ 0-9a-f]+: 54a7 303b mfhc1 a1,\$f7 +[ 0-9a-f]+: 54a8 303b mfhc1 a1,\$f8 +[ 0-9a-f]+: 54a9 303b mfhc1 a1,\$f9 +[ 0-9a-f]+: 54aa 303b mfhc1 a1,\$f10 +[ 0-9a-f]+: 54ab 303b mfhc1 a1,\$f11 +[ 0-9a-f]+: 54ac 303b mfhc1 a1,\$f12 +[ 0-9a-f]+: 54ad 303b mfhc1 a1,\$f13 +[ 0-9a-f]+: 54ae 303b mfhc1 a1,\$f14 +[ 0-9a-f]+: 54af 303b mfhc1 a1,\$f15 +[ 0-9a-f]+: 54b0 303b mfhc1 a1,\$f16 +[ 0-9a-f]+: 54b1 303b mfhc1 a1,\$f17 +[ 0-9a-f]+: 54b2 303b mfhc1 a1,\$f18 +[ 0-9a-f]+: 54b3 303b mfhc1 a1,\$f19 +[ 0-9a-f]+: 54b4 303b mfhc1 a1,\$f20 +[ 0-9a-f]+: 54b5 303b mfhc1 a1,\$f21 +[ 0-9a-f]+: 54b6 303b mfhc1 a1,\$f22 +[ 0-9a-f]+: 54b7 303b mfhc1 a1,\$f23 +[ 0-9a-f]+: 54b8 303b mfhc1 a1,\$f24 +[ 0-9a-f]+: 54b9 303b mfhc1 a1,\$f25 +[ 0-9a-f]+: 54ba 303b mfhc1 a1,\$f26 +[ 0-9a-f]+: 54bb 303b mfhc1 a1,\$f27 +[ 0-9a-f]+: 54bc 303b mfhc1 a1,\$f28 +[ 0-9a-f]+: 54bd 303b mfhc1 a1,\$f29 +[ 0-9a-f]+: 54be 303b mfhc1 a1,\$f30 +[ 0-9a-f]+: 54bf 303b mfhc1 a1,\$f31 +[ 0-9a-f]+: 54a0 303b mfhc1 a1,\$f0 +[ 0-9a-f]+: 54a1 303b mfhc1 a1,\$f1 +[ 0-9a-f]+: 54a2 303b mfhc1 a1,\$f2 +[ 0-9a-f]+: 54a3 303b mfhc1 a1,\$f3 +[ 0-9a-f]+: 54a4 303b mfhc1 a1,\$f4 +[ 0-9a-f]+: 54a5 303b mfhc1 a1,\$f5 +[ 0-9a-f]+: 54a6 303b mfhc1 a1,\$f6 +[ 0-9a-f]+: 54a7 303b mfhc1 a1,\$f7 +[ 0-9a-f]+: 54a8 303b mfhc1 a1,\$f8 +[ 0-9a-f]+: 54a9 303b mfhc1 a1,\$f9 +[ 0-9a-f]+: 54aa 303b mfhc1 a1,\$f10 +[ 0-9a-f]+: 54ab 303b mfhc1 a1,\$f11 +[ 0-9a-f]+: 54ac 303b mfhc1 a1,\$f12 +[ 0-9a-f]+: 54ad 303b mfhc1 a1,\$f13 +[ 0-9a-f]+: 54ae 303b mfhc1 a1,\$f14 +[ 0-9a-f]+: 54af 303b mfhc1 a1,\$f15 +[ 0-9a-f]+: 54b0 303b mfhc1 a1,\$f16 +[ 0-9a-f]+: 54b1 303b mfhc1 a1,\$f17 +[ 0-9a-f]+: 54b2 303b mfhc1 a1,\$f18 +[ 0-9a-f]+: 54b3 303b mfhc1 a1,\$f19 +[ 0-9a-f]+: 54b4 303b mfhc1 a1,\$f20 +[ 0-9a-f]+: 54b5 303b mfhc1 a1,\$f21 +[ 0-9a-f]+: 54b6 303b mfhc1 a1,\$f22 +[ 0-9a-f]+: 54b7 303b mfhc1 a1,\$f23 +[ 0-9a-f]+: 54b8 303b mfhc1 a1,\$f24 +[ 0-9a-f]+: 54b9 303b mfhc1 a1,\$f25 +[ 0-9a-f]+: 54ba 303b mfhc1 a1,\$f26 +[ 0-9a-f]+: 54bb 303b mfhc1 a1,\$f27 +[ 0-9a-f]+: 54bc 303b mfhc1 a1,\$f28 +[ 0-9a-f]+: 54bd 303b mfhc1 a1,\$f29 +[ 0-9a-f]+: 54be 303b mfhc1 a1,\$f30 +[ 0-9a-f]+: 54bf 303b mfhc1 a1,\$f31 +[ 0-9a-f]+: 5401 207b mov\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 207b mov\.d \$f30,\$f31 +[ 0-9a-f]+: 5401 007b mov\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 007b mov\.s \$f30,\$f31 +[ 0-9a-f]+: 5401 407b mov\.ps \$f0,\$f1 +[ 0-9a-f]+: 57df 407b mov\.ps \$f30,\$f31 +[ 0-9a-f]+: 5443 0220 movf\.d \$f2,\$f3,\$fcc0 +[ 0-9a-f]+: 5443 2220 movf\.d \$f2,\$f3,\$fcc1 +[ 0-9a-f]+: 5443 4220 movf\.d \$f2,\$f3,\$fcc2 +[ 0-9a-f]+: 5443 6220 movf\.d \$f2,\$f3,\$fcc3 +[ 0-9a-f]+: 5443 8220 movf\.d \$f2,\$f3,\$fcc4 +[ 0-9a-f]+: 5443 a220 movf\.d \$f2,\$f3,\$fcc5 +[ 0-9a-f]+: 5443 c220 movf\.d \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 5443 e220 movf\.d \$f2,\$f3,\$fcc7 +[ 0-9a-f]+: 57df e220 movf\.d \$f30,\$f31,\$fcc7 +[ 0-9a-f]+: 5443 0020 movf\.s \$f2,\$f3,\$fcc0 +[ 0-9a-f]+: 5443 2020 movf\.s \$f2,\$f3,\$fcc1 +[ 0-9a-f]+: 5443 4020 movf\.s \$f2,\$f3,\$fcc2 +[ 0-9a-f]+: 5443 6020 movf\.s \$f2,\$f3,\$fcc3 +[ 0-9a-f]+: 5443 8020 movf\.s \$f2,\$f3,\$fcc4 +[ 0-9a-f]+: 5443 a020 movf\.s \$f2,\$f3,\$fcc5 +[ 0-9a-f]+: 5443 c020 movf\.s \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 5443 e020 movf\.s \$f2,\$f3,\$fcc7 +[ 0-9a-f]+: 57df e020 movf\.s \$f30,\$f31,\$fcc7 +[ 0-9a-f]+: 5443 0420 movf\.ps \$f2,\$f3,\$fcc0 +[ 0-9a-f]+: 5443 4420 movf\.ps \$f2,\$f3,\$fcc2 +[ 0-9a-f]+: 5443 8420 movf\.ps \$f2,\$f3,\$fcc4 +[ 0-9a-f]+: 5443 c420 movf\.ps \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 5443 c420 movf\.ps \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 57df c420 movf\.ps \$f30,\$f31,\$fcc6 +[ 0-9a-f]+: 5403 1138 movn\.d \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1138 movn\.d \$f2,\$f3,ra +[ 0-9a-f]+: 5403 1038 movn\.s \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1038 movn\.s \$f2,\$f3,ra +[ 0-9a-f]+: 5403 1238 movn\.ps \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1238 movn\.ps \$f2,\$f3,ra +[ 0-9a-f]+: 5443 0460 movt\.ps \$f2,\$f3,\$fcc0 +[ 0-9a-f]+: 5443 4460 movt\.ps \$f2,\$f3,\$fcc2 +[ 0-9a-f]+: 5443 8460 movt\.ps \$f2,\$f3,\$fcc4 +[ 0-9a-f]+: 5443 c460 movt\.ps \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 5443 c460 movt\.ps \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 57df c460 movt\.ps \$f30,\$f31,\$fcc6 +[ 0-9a-f]+: 5403 1178 movz\.d \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1178 movz\.d \$f2,\$f3,ra +[ 0-9a-f]+: 5403 1078 movz\.s \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1078 movz\.s \$f2,\$f3,ra +[ 0-9a-f]+: 5403 1278 movz\.ps \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1278 movz\.ps \$f2,\$f3,ra +[ 0-9a-f]+: 5462 0069 msub\.d \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e769 msub\.d \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0061 msub\.s \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e761 msub\.s \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0071 msub\.ps \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e771 msub\.ps \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 54a0 283b mtc1 a1,\$f0 +[ 0-9a-f]+: 54a1 283b mtc1 a1,\$f1 +[ 0-9a-f]+: 54a2 283b mtc1 a1,\$f2 +[ 0-9a-f]+: 54a3 283b mtc1 a1,\$f3 +[ 0-9a-f]+: 54a4 283b mtc1 a1,\$f4 +[ 0-9a-f]+: 54a5 283b mtc1 a1,\$f5 +[ 0-9a-f]+: 54a6 283b mtc1 a1,\$f6 +[ 0-9a-f]+: 54a7 283b mtc1 a1,\$f7 +[ 0-9a-f]+: 54a8 283b mtc1 a1,\$f8 +[ 0-9a-f]+: 54a9 283b mtc1 a1,\$f9 +[ 0-9a-f]+: 54aa 283b mtc1 a1,\$f10 +[ 0-9a-f]+: 54ab 283b mtc1 a1,\$f11 +[ 0-9a-f]+: 54ac 283b mtc1 a1,\$f12 +[ 0-9a-f]+: 54ad 283b mtc1 a1,\$f13 +[ 0-9a-f]+: 54ae 283b mtc1 a1,\$f14 +[ 0-9a-f]+: 54af 283b mtc1 a1,\$f15 +[ 0-9a-f]+: 54b0 283b mtc1 a1,\$f16 +[ 0-9a-f]+: 54b1 283b mtc1 a1,\$f17 +[ 0-9a-f]+: 54b2 283b mtc1 a1,\$f18 +[ 0-9a-f]+: 54b3 283b mtc1 a1,\$f19 +[ 0-9a-f]+: 54b4 283b mtc1 a1,\$f20 +[ 0-9a-f]+: 54b5 283b mtc1 a1,\$f21 +[ 0-9a-f]+: 54b6 283b mtc1 a1,\$f22 +[ 0-9a-f]+: 54b7 283b mtc1 a1,\$f23 +[ 0-9a-f]+: 54b8 283b mtc1 a1,\$f24 +[ 0-9a-f]+: 54b9 283b mtc1 a1,\$f25 +[ 0-9a-f]+: 54ba 283b mtc1 a1,\$f26 +[ 0-9a-f]+: 54bb 283b mtc1 a1,\$f27 +[ 0-9a-f]+: 54bc 283b mtc1 a1,\$f28 +[ 0-9a-f]+: 54bd 283b mtc1 a1,\$f29 +[ 0-9a-f]+: 54be 283b mtc1 a1,\$f30 +[ 0-9a-f]+: 54bf 283b mtc1 a1,\$f31 +[ 0-9a-f]+: 54a0 283b mtc1 a1,\$f0 +[ 0-9a-f]+: 54a1 283b mtc1 a1,\$f1 +[ 0-9a-f]+: 54a2 283b mtc1 a1,\$f2 +[ 0-9a-f]+: 54a3 283b mtc1 a1,\$f3 +[ 0-9a-f]+: 54a4 283b mtc1 a1,\$f4 +[ 0-9a-f]+: 54a5 283b mtc1 a1,\$f5 +[ 0-9a-f]+: 54a6 283b mtc1 a1,\$f6 +[ 0-9a-f]+: 54a7 283b mtc1 a1,\$f7 +[ 0-9a-f]+: 54a8 283b mtc1 a1,\$f8 +[ 0-9a-f]+: 54a9 283b mtc1 a1,\$f9 +[ 0-9a-f]+: 54aa 283b mtc1 a1,\$f10 +[ 0-9a-f]+: 54ab 283b mtc1 a1,\$f11 +[ 0-9a-f]+: 54ac 283b mtc1 a1,\$f12 +[ 0-9a-f]+: 54ad 283b mtc1 a1,\$f13 +[ 0-9a-f]+: 54ae 283b mtc1 a1,\$f14 +[ 0-9a-f]+: 54af 283b mtc1 a1,\$f15 +[ 0-9a-f]+: 54b0 283b mtc1 a1,\$f16 +[ 0-9a-f]+: 54b1 283b mtc1 a1,\$f17 +[ 0-9a-f]+: 54b2 283b mtc1 a1,\$f18 +[ 0-9a-f]+: 54b3 283b mtc1 a1,\$f19 +[ 0-9a-f]+: 54b4 283b mtc1 a1,\$f20 +[ 0-9a-f]+: 54b5 283b mtc1 a1,\$f21 +[ 0-9a-f]+: 54b6 283b mtc1 a1,\$f22 +[ 0-9a-f]+: 54b7 283b mtc1 a1,\$f23 +[ 0-9a-f]+: 54b8 283b mtc1 a1,\$f24 +[ 0-9a-f]+: 54b9 283b mtc1 a1,\$f25 +[ 0-9a-f]+: 54ba 283b mtc1 a1,\$f26 +[ 0-9a-f]+: 54bb 283b mtc1 a1,\$f27 +[ 0-9a-f]+: 54bc 283b mtc1 a1,\$f28 +[ 0-9a-f]+: 54bd 283b mtc1 a1,\$f29 +[ 0-9a-f]+: 54be 283b mtc1 a1,\$f30 +[ 0-9a-f]+: 54bf 283b mtc1 a1,\$f31 +[ 0-9a-f]+: 54a0 383b mthc1 a1,\$f0 +[ 0-9a-f]+: 54a1 383b mthc1 a1,\$f1 +[ 0-9a-f]+: 54a2 383b mthc1 a1,\$f2 +[ 0-9a-f]+: 54a3 383b mthc1 a1,\$f3 +[ 0-9a-f]+: 54a4 383b mthc1 a1,\$f4 +[ 0-9a-f]+: 54a5 383b mthc1 a1,\$f5 +[ 0-9a-f]+: 54a6 383b mthc1 a1,\$f6 +[ 0-9a-f]+: 54a7 383b mthc1 a1,\$f7 +[ 0-9a-f]+: 54a8 383b mthc1 a1,\$f8 +[ 0-9a-f]+: 54a9 383b mthc1 a1,\$f9 +[ 0-9a-f]+: 54aa 383b mthc1 a1,\$f10 +[ 0-9a-f]+: 54ab 383b mthc1 a1,\$f11 +[ 0-9a-f]+: 54ac 383b mthc1 a1,\$f12 +[ 0-9a-f]+: 54ad 383b mthc1 a1,\$f13 +[ 0-9a-f]+: 54ae 383b mthc1 a1,\$f14 +[ 0-9a-f]+: 54af 383b mthc1 a1,\$f15 +[ 0-9a-f]+: 54b0 383b mthc1 a1,\$f16 +[ 0-9a-f]+: 54b1 383b mthc1 a1,\$f17 +[ 0-9a-f]+: 54b2 383b mthc1 a1,\$f18 +[ 0-9a-f]+: 54b3 383b mthc1 a1,\$f19 +[ 0-9a-f]+: 54b4 383b mthc1 a1,\$f20 +[ 0-9a-f]+: 54b5 383b mthc1 a1,\$f21 +[ 0-9a-f]+: 54b6 383b mthc1 a1,\$f22 +[ 0-9a-f]+: 54b7 383b mthc1 a1,\$f23 +[ 0-9a-f]+: 54b8 383b mthc1 a1,\$f24 +[ 0-9a-f]+: 54b9 383b mthc1 a1,\$f25 +[ 0-9a-f]+: 54ba 383b mthc1 a1,\$f26 +[ 0-9a-f]+: 54bb 383b mthc1 a1,\$f27 +[ 0-9a-f]+: 54bc 383b mthc1 a1,\$f28 +[ 0-9a-f]+: 54bd 383b mthc1 a1,\$f29 +[ 0-9a-f]+: 54be 383b mthc1 a1,\$f30 +[ 0-9a-f]+: 54bf 383b mthc1 a1,\$f31 +[ 0-9a-f]+: 54a0 383b mthc1 a1,\$f0 +[ 0-9a-f]+: 54a1 383b mthc1 a1,\$f1 +[ 0-9a-f]+: 54a2 383b mthc1 a1,\$f2 +[ 0-9a-f]+: 54a3 383b mthc1 a1,\$f3 +[ 0-9a-f]+: 54a4 383b mthc1 a1,\$f4 +[ 0-9a-f]+: 54a5 383b mthc1 a1,\$f5 +[ 0-9a-f]+: 54a6 383b mthc1 a1,\$f6 +[ 0-9a-f]+: 54a7 383b mthc1 a1,\$f7 +[ 0-9a-f]+: 54a8 383b mthc1 a1,\$f8 +[ 0-9a-f]+: 54a9 383b mthc1 a1,\$f9 +[ 0-9a-f]+: 54aa 383b mthc1 a1,\$f10 +[ 0-9a-f]+: 54ab 383b mthc1 a1,\$f11 +[ 0-9a-f]+: 54ac 383b mthc1 a1,\$f12 +[ 0-9a-f]+: 54ad 383b mthc1 a1,\$f13 +[ 0-9a-f]+: 54ae 383b mthc1 a1,\$f14 +[ 0-9a-f]+: 54af 383b mthc1 a1,\$f15 +[ 0-9a-f]+: 54b0 383b mthc1 a1,\$f16 +[ 0-9a-f]+: 54b1 383b mthc1 a1,\$f17 +[ 0-9a-f]+: 54b2 383b mthc1 a1,\$f18 +[ 0-9a-f]+: 54b3 383b mthc1 a1,\$f19 +[ 0-9a-f]+: 54b4 383b mthc1 a1,\$f20 +[ 0-9a-f]+: 54b5 383b mthc1 a1,\$f21 +[ 0-9a-f]+: 54b6 383b mthc1 a1,\$f22 +[ 0-9a-f]+: 54b7 383b mthc1 a1,\$f23 +[ 0-9a-f]+: 54b8 383b mthc1 a1,\$f24 +[ 0-9a-f]+: 54b9 383b mthc1 a1,\$f25 +[ 0-9a-f]+: 54ba 383b mthc1 a1,\$f26 +[ 0-9a-f]+: 54bb 383b mthc1 a1,\$f27 +[ 0-9a-f]+: 54bc 383b mthc1 a1,\$f28 +[ 0-9a-f]+: 54bd 383b mthc1 a1,\$f29 +[ 0-9a-f]+: 54be 383b mthc1 a1,\$f30 +[ 0-9a-f]+: 54bf 383b mthc1 a1,\$f31 +[ 0-9a-f]+: 5441 00b0 mul\.s \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e8b0 mul\.s \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e8b0 mul\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e8b0 mul\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 01b0 mul\.d \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e9b0 mul\.d \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e9b0 mul\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e9b0 mul\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 02b0 mul\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe eab0 mul\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd eab0 mul\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd eab0 mul\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5401 0b7b neg\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 0b7b neg\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 0b7b neg\.s \$f2,\$f2 +[ 0-9a-f]+: 5442 0b7b neg\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 2b7b neg\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 2b7b neg\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 2b7b neg\.d \$f2,\$f2 +[ 0-9a-f]+: 5442 2b7b neg\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 4b7b neg\.ps \$f0,\$f1 +[ 0-9a-f]+: 57df 4b7b neg\.ps \$f30,\$f31 +[ 0-9a-f]+: 5442 4b7b neg\.ps \$f2,\$f2 +[ 0-9a-f]+: 5442 4b7b neg\.ps \$f2,\$f2 +[ 0-9a-f]+: 5462 004a nmadd\.d \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e74a nmadd\.d \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0042 nmadd\.s \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e742 nmadd\.s \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0052 nmadd\.ps \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e752 nmadd\.ps \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 006a nmsub\.d \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e76a nmsub\.d \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0062 nmsub\.s \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e762 nmsub\.s \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0072 nmsub\.ps \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e772 nmsub\.ps \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5441 0080 pll\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e880 pll\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e880 pll\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e880 pll\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 00c0 plu\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e8c0 plu\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e8c0 plu\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e8c0 plu\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0100 pul\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e900 pul\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e900 pul\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e900 pul\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0140 puu\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e940 puu\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e940 puu\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e940 puu\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5401 123b recip\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 123b recip\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 123b recip\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 523b recip\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 523b recip\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 523b recip\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 333b round\.l\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 333b round\.l\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 333b round\.l\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 733b round\.l\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 733b round\.l\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 733b round\.l\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 3b3b round\.w\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 3b3b round\.w\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 3b3b round\.w\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 7b3b round\.w\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 7b3b round\.w\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 7b3b round\.w\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 023b rsqrt\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 023b rsqrt\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 023b rsqrt\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 423b rsqrt\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 423b rsqrt\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 423b rsqrt\.d \$f2,\$f2 +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 7fff sdc1 \$f3,32767\(a0\) +[ 0-9a-f]+: b864 8000 sdc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 ffff sdc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0000 sdc1 \$f3,0\(at\) +[ 0-9a-f]+: b864 8000 sdc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0001 sdc1 \$f3,1\(at\) +[ 0-9a-f]+: b864 8001 sdc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0000 sdc1 \$f3,0\(at\) +[ 0-9a-f]+: b864 ffff sdc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 5678 sdc1 \$f3,22136\(at\) +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 7fff sdc1 \$f3,32767\(a0\) +[ 0-9a-f]+: b864 8000 sdc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 ffff sdc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0000 sdc1 \$f3,0\(at\) +[ 0-9a-f]+: b864 8000 sdc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0001 sdc1 \$f3,1\(at\) +[ 0-9a-f]+: b864 8001 sdc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0000 sdc1 \$f3,0\(at\) +[ 0-9a-f]+: b864 ffff sdc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 5678 sdc1 \$f3,22136\(at\) +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 7fff sdc1 \$f3,32767\(a0\) +[ 0-9a-f]+: b864 8000 sdc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 5400 0108 sdxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 0108 sdxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 0108 sdxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 0108 sdxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 0108 sdxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 0908 sdxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 1108 sdxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f908 sdxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 5401 0a3b sqrt\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 0a3b sqrt\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 0a3b sqrt\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 4a3b sqrt\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 4a3b sqrt\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 4a3b sqrt\.d \$f2,\$f2 +[ 0-9a-f]+: 5441 0070 sub\.s \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e870 sub\.s \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e870 sub\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e870 sub\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0170 sub\.d \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e970 sub\.d \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e970 sub\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e970 sub\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0270 sub\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe ea70 sub\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd ea70 sub\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd ea70 sub\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5400 0188 suxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 0188 suxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 0188 suxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 0188 suxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 0188 suxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 0988 suxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 1188 suxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f988 suxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 7fff swc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 ffff swc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0001 swc1 \$f3,1\(at\) +[ 0-9a-f]+: 9864 8001 swc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 ffff swc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 5678 swc1 \$f3,22136\(at\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 7fff swc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 ffff swc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0001 swc1 \$f3,1\(at\) +[ 0-9a-f]+: 9864 8001 swc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 ffff swc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 5678 swc1 \$f3,22136\(at\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 7fff swc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 ffff swc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0001 swc1 \$f3,1\(at\) +[ 0-9a-f]+: 9864 8001 swc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 ffff swc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 5678 swc1 \$f3,22136\(at\) +[ 0-9a-f]+: 5400 0048 lwxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 0048 lwxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 0048 lwxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 0048 lwxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 0048 lwxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 0848 lwxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 1048 lwxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f848 lwxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 5401 233b trunc\.l\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 233b trunc\.l\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 233b trunc\.l\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 633b trunc\.l\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 633b trunc\.l\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 633b trunc\.l\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 2b3b trunc\.w\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 2b3b trunc\.w\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 2b3b trunc\.w\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 6b3b trunc\.w\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 6b3b trunc\.w\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 6b3b trunc\.w\.d \$f2,\$f2 +[ 0-9a-f]+: 5443 017b movf v0,v1,\$fcc0 +[ 0-9a-f]+: 57df 017b movf s8,ra,\$fcc0 +[ 0-9a-f]+: 57df 217b movf s8,ra,\$fcc1 +[ 0-9a-f]+: 57df 417b movf s8,ra,\$fcc2 +[ 0-9a-f]+: 57df 617b movf s8,ra,\$fcc3 +[ 0-9a-f]+: 57df 817b movf s8,ra,\$fcc4 +[ 0-9a-f]+: 57df a17b movf s8,ra,\$fcc5 +[ 0-9a-f]+: 57df c17b movf s8,ra,\$fcc6 +[ 0-9a-f]+: 57df e17b movf s8,ra,\$fcc7 +[ 0-9a-f]+: 5443 097b movt v0,v1,\$fcc0 +[ 0-9a-f]+: 57df 097b movt s8,ra,\$fcc0 +[ 0-9a-f]+: 57df 297b movt s8,ra,\$fcc1 +[ 0-9a-f]+: 57df 497b movt s8,ra,\$fcc2 +[ 0-9a-f]+: 57df 697b movt s8,ra,\$fcc3 +[ 0-9a-f]+: 57df 897b movt s8,ra,\$fcc4 +[ 0-9a-f]+: 57df a97b movt s8,ra,\$fcc5 +[ 0-9a-f]+: 57df c97b movt s8,ra,\$fcc6 +[ 0-9a-f]+: 57df e97b movt s8,ra,\$fcc7 +[ 0-9a-f]+: 43a4 fffe bc1t \$fcc1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4388 fffe bc1f \$fcc2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0107 3150 addu a2,a3,t0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 438c fffe bc1f \$fcc3,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 43b0 fffe bc1t \$fcc4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0107 3150 addu a2,a3,t0 + +[0-9a-f]+ : +[ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c43 move v0,v1 +[ 0-9a-f]+: 5860 1190 dneg v0,v1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 5840 1190 dneg v0,v0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 5840 1190 dneg v0,v0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 5883 1110 dadd v0,v1,a0 +[ 0-9a-f]+: 5bfe e910 dadd sp,s8,ra +[ 0-9a-f]+: 5862 1110 dadd v0,v0,v1 +[ 0-9a-f]+: 5862 1110 dadd v0,v0,v1 +[ 0-9a-f]+: 5843 001c daddi v0,v1,0 +[ 0-9a-f]+: 5843 005c daddi v0,v1,1 +[ 0-9a-f]+: 5843 801c daddi v0,v1,-512 +[ 0-9a-f]+: 5843 7fdc daddi v0,v1,511 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5821 8000 dsll at,at,0x10 +[ 0-9a-f]+: 5021 8765 ori at,at,0x8765 +[ 0-9a-f]+: 5821 8000 dsll at,at,0x10 +[ 0-9a-f]+: 5021 4321 ori at,at,0x4321 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 5843 001c daddi v0,v1,0 +[ 0-9a-f]+: 5843 005c daddi v0,v1,1 +[ 0-9a-f]+: 5843 801c daddi v0,v1,-512 +[ 0-9a-f]+: 5843 7fdc daddi v0,v1,511 +[ 0-9a-f]+: 5842 7fdc daddi v0,v0,511 +[ 0-9a-f]+: 5842 7fdc daddi v0,v0,511 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 5c43 0000 daddiu v0,v1,0 +[ 0-9a-f]+: 5c43 8000 daddiu v0,v1,-32768 +[ 0-9a-f]+: 5c43 7fff daddiu v0,v1,32767 +[ 0-9a-f]+: 5c42 7fff daddiu v0,v0,32767 +[ 0-9a-f]+: 5c42 7fff daddiu v0,v0,32767 +[ 0-9a-f]+: 5883 1150 daddu v0,v1,a0 +[ 0-9a-f]+: 5bfe e950 daddu sp,s8,ra +[ 0-9a-f]+: 5862 1150 daddu v0,v0,v1 +[ 0-9a-f]+: 5862 1150 daddu v0,v0,v1 +[ 0-9a-f]+: 5803 1150 move v0,v1 +[ 0-9a-f]+: 5c43 0000 daddiu v0,v1,0 +[ 0-9a-f]+: 5c43 0001 daddiu v0,v1,1 +[ 0-9a-f]+: 5c43 7fff daddiu v0,v1,32767 +[ 0-9a-f]+: 5c43 8000 daddiu v0,v1,-32768 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 5823 1150 daddu v0,v1,at +[ 0-9a-f]+: 5843 4b3c dclo v0,v1 +[ 0-9a-f]+: 5862 4b3c dclo v1,v0 +[ 0-9a-f]+: 5843 5b3c dclz v0,v1 +[ 0-9a-f]+: 5862 5b3c dclz v1,v0 +[ 0-9a-f]+: 5862 ab3c ddiv zero,v0,v1 +[ 0-9a-f]+: 5bfe ab3c ddiv zero,s8,ra +[ 0-9a-f]+: 5860 ab3c ddiv zero,zero,v1 +[ 0-9a-f]+: 5be0 ab3c ddiv zero,zero,ra +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0004 703c teq a0,zero,0x7 +[ 0-9a-f]+: 5883 ab3c ddiv zero,v1,a0 +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b424 fffe bne a0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 5821 f808 dsll32 at,at,0x1f +[ 0-9a-f]+: 0023 603c teq v1,at,0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 5880 1990 dneg v1,a0 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 5824 ab3c ddiv zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 5862 bb3c ddivu zero,v0,v1 +[ 0-9a-f]+: 5bfe bb3c ddivu zero,s8,ra +[ 0-9a-f]+: 5860 bb3c ddivu zero,zero,v1 +[ 0-9a-f]+: 5be0 bb3c ddivu zero,zero,ra +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 5803 bb3c ddivu zero,v1,zero +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0004 703c teq a0,zero,0x7 +[ 0-9a-f]+: 5883 bb3c ddivu zero,v1,a0 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 5824 bb3c ddivu zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 5824 bb3c ddivu zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 5843 07ec dext v0,v1,0x1f,0x1 +[ 0-9a-f]+: 5843 f82c dext v0,v1,0x0,0x20 +[ 0-9a-f]+: 5843 07e4 dextm v0,v1,0x1f,0x21 +[ 0-9a-f]+: 5843 07e4 dextm v0,v1,0x1f,0x21 +[ 0-9a-f]+: 5843 4854 dextu v0,v1,0x21,0xa +[ 0-9a-f]+: 5843 4854 dextu v0,v1,0x21,0xa +[ 0-9a-f]+: 5843 ffcc dins v0,v1,0x1f,0x1 +[ 0-9a-f]+: 5843 f80c dins v0,v1,0x0,0x20 +[ 0-9a-f]+: 5843 ffc4 dinsm v0,v1,0x1f,0x21 +[ 0-9a-f]+: 5843 ffc4 dinsm v0,v1,0x1f,0x21 +[ 0-9a-f]+: 5843 5074 dinsu v0,v1,0x21,0xa +[ 0-9a-f]+: 5843 5074 dinsu v0,v1,0x21,0xa +[ 0-9a-f]+: 41a2 0000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 test +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 41a2 0000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 test +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 3040 8000 li v0,-32768 +[ 0-9a-f]+: 3040 7fff li v0,32767 +[ 0-9a-f]+: 5040 ffff li v0,0xffff +[ 0-9a-f]+: 41a2 1234 lui v0,0x1234 +[ 0-9a-f]+: 5042 5678 ori v0,v0,0x5678 +[ 0-9a-f]+: 5840 00fc dmfc0 v0,c0_index +[ 0-9a-f]+: 5841 00fc dmfc0 v0,c0_random +[ 0-9a-f]+: 5842 00fc dmfc0 v0,c0_entrylo0 +[ 0-9a-f]+: 5843 00fc dmfc0 v0,c0_entrylo1 +[ 0-9a-f]+: 5844 00fc dmfc0 v0,c0_context +[ 0-9a-f]+: 5845 00fc dmfc0 v0,c0_pagemask +[ 0-9a-f]+: 5846 00fc dmfc0 v0,c0_wired +[ 0-9a-f]+: 5847 00fc dmfc0 v0,c0_hwrena +[ 0-9a-f]+: 5848 00fc dmfc0 v0,c0_badvaddr +[ 0-9a-f]+: 5849 00fc dmfc0 v0,c0_count +[ 0-9a-f]+: 584a 00fc dmfc0 v0,c0_entryhi +[ 0-9a-f]+: 584b 00fc dmfc0 v0,c0_compare +[ 0-9a-f]+: 584c 00fc dmfc0 v0,c0_status +[ 0-9a-f]+: 584d 00fc dmfc0 v0,c0_cause +[ 0-9a-f]+: 584e 00fc dmfc0 v0,c0_epc +[ 0-9a-f]+: 584f 00fc dmfc0 v0,c0_prid +[ 0-9a-f]+: 5850 00fc dmfc0 v0,c0_config +[ 0-9a-f]+: 5851 00fc dmfc0 v0,c0_lladdr +[ 0-9a-f]+: 5852 00fc dmfc0 v0,c0_watchlo +[ 0-9a-f]+: 5853 00fc dmfc0 v0,c0_watchhi +[ 0-9a-f]+: 5854 00fc dmfc0 v0,c0_xcontext +[ 0-9a-f]+: 5855 00fc dmfc0 v0,\$21 +[ 0-9a-f]+: 5856 00fc dmfc0 v0,\$22 +[ 0-9a-f]+: 5857 00fc dmfc0 v0,c0_debug +[ 0-9a-f]+: 5858 00fc dmfc0 v0,c0_depc +[ 0-9a-f]+: 5859 00fc dmfc0 v0,c0_perfcnt +[ 0-9a-f]+: 585a 00fc dmfc0 v0,c0_errctl +[ 0-9a-f]+: 585b 00fc dmfc0 v0,c0_cacheerr +[ 0-9a-f]+: 585c 00fc dmfc0 v0,c0_taglo +[ 0-9a-f]+: 585d 00fc dmfc0 v0,c0_taghi +[ 0-9a-f]+: 585e 00fc dmfc0 v0,c0_errorepc +[ 0-9a-f]+: 585f 00fc dmfc0 v0,c0_desave +[ 0-9a-f]+: 5840 00fc dmfc0 v0,c0_index +[ 0-9a-f]+: 5840 08fc dmfc0 v0,c0_mvpcontrol +[ 0-9a-f]+: 5840 10fc dmfc0 v0,c0_mvpconf0 +[ 0-9a-f]+: 5840 18fc dmfc0 v0,c0_mvpconf1 +[ 0-9a-f]+: 5840 20fc dmfc0 v0,\$0,4 +[ 0-9a-f]+: 5840 28fc dmfc0 v0,\$0,5 +[ 0-9a-f]+: 5840 30fc dmfc0 v0,\$0,6 +[ 0-9a-f]+: 5840 38fc dmfc0 v0,\$0,7 +[ 0-9a-f]+: 5841 00fc dmfc0 v0,c0_random +[ 0-9a-f]+: 5841 08fc dmfc0 v0,c0_vpecontrol +[ 0-9a-f]+: 5841 10fc dmfc0 v0,c0_vpeconf0 +[ 0-9a-f]+: 5841 18fc dmfc0 v0,c0_vpeconf1 +[ 0-9a-f]+: 5841 20fc dmfc0 v0,c0_yqmask +[ 0-9a-f]+: 5841 28fc dmfc0 v0,c0_vpeschedule +[ 0-9a-f]+: 5841 30fc dmfc0 v0,c0_vpeschefback +[ 0-9a-f]+: 5841 38fc dmfc0 v0,\$1,7 +[ 0-9a-f]+: 5842 00fc dmfc0 v0,c0_entrylo0 +[ 0-9a-f]+: 5842 08fc dmfc0 v0,c0_tcstatus +[ 0-9a-f]+: 5842 10fc dmfc0 v0,c0_tcbind +[ 0-9a-f]+: 5842 18fc dmfc0 v0,c0_tcrestart +[ 0-9a-f]+: 5842 20fc dmfc0 v0,c0_tchalt +[ 0-9a-f]+: 5842 28fc dmfc0 v0,c0_tccontext +[ 0-9a-f]+: 5842 30fc dmfc0 v0,c0_tcschedule +[ 0-9a-f]+: 5842 38fc dmfc0 v0,c0_tcschefback +[ 0-9a-f]+: 5840 02fc dmtc0 v0,c0_index +[ 0-9a-f]+: 5841 02fc dmtc0 v0,c0_random +[ 0-9a-f]+: 5842 02fc dmtc0 v0,c0_entrylo0 +[ 0-9a-f]+: 5843 02fc dmtc0 v0,c0_entrylo1 +[ 0-9a-f]+: 5844 02fc dmtc0 v0,c0_context +[ 0-9a-f]+: 5845 02fc dmtc0 v0,c0_pagemask +[ 0-9a-f]+: 5846 02fc dmtc0 v0,c0_wired +[ 0-9a-f]+: 5847 02fc dmtc0 v0,c0_hwrena +[ 0-9a-f]+: 5848 02fc dmtc0 v0,c0_badvaddr +[ 0-9a-f]+: 5849 02fc dmtc0 v0,c0_count +[ 0-9a-f]+: 584a 02fc dmtc0 v0,c0_entryhi +[ 0-9a-f]+: 584b 02fc dmtc0 v0,c0_compare +[ 0-9a-f]+: 584c 02fc dmtc0 v0,c0_status +[ 0-9a-f]+: 584d 02fc dmtc0 v0,c0_cause +[ 0-9a-f]+: 584e 02fc dmtc0 v0,c0_epc +[ 0-9a-f]+: 584f 02fc dmtc0 v0,c0_prid +[ 0-9a-f]+: 5850 02fc dmtc0 v0,c0_config +[ 0-9a-f]+: 5851 02fc dmtc0 v0,c0_lladdr +[ 0-9a-f]+: 5852 02fc dmtc0 v0,c0_watchlo +[ 0-9a-f]+: 5853 02fc dmtc0 v0,c0_watchhi +[ 0-9a-f]+: 5854 02fc dmtc0 v0,c0_xcontext +[ 0-9a-f]+: 5855 02fc dmtc0 v0,\$21 +[ 0-9a-f]+: 5856 02fc dmtc0 v0,\$22 +[ 0-9a-f]+: 5857 02fc dmtc0 v0,c0_debug +[ 0-9a-f]+: 5858 02fc dmtc0 v0,c0_depc +[ 0-9a-f]+: 5859 02fc dmtc0 v0,c0_perfcnt +[ 0-9a-f]+: 585a 02fc dmtc0 v0,c0_errctl +[ 0-9a-f]+: 585b 02fc dmtc0 v0,c0_cacheerr +[ 0-9a-f]+: 585c 02fc dmtc0 v0,c0_taglo +[ 0-9a-f]+: 585d 02fc dmtc0 v0,c0_taghi +[ 0-9a-f]+: 585e 02fc dmtc0 v0,c0_errorepc +[ 0-9a-f]+: 585f 02fc dmtc0 v0,c0_desave +[ 0-9a-f]+: 5840 02fc dmtc0 v0,c0_index +[ 0-9a-f]+: 5840 0afc dmtc0 v0,c0_mvpcontrol +[ 0-9a-f]+: 5840 12fc dmtc0 v0,c0_mvpconf0 +[ 0-9a-f]+: 5840 1afc dmtc0 v0,c0_mvpconf1 +[ 0-9a-f]+: 5840 22fc dmtc0 v0,\$0,4 +[ 0-9a-f]+: 5840 2afc dmtc0 v0,\$0,5 +[ 0-9a-f]+: 5840 32fc dmtc0 v0,\$0,6 +[ 0-9a-f]+: 5840 3afc dmtc0 v0,\$0,7 +[ 0-9a-f]+: 5841 02fc dmtc0 v0,c0_random +[ 0-9a-f]+: 5841 0afc dmtc0 v0,c0_vpecontrol +[ 0-9a-f]+: 5841 12fc dmtc0 v0,c0_vpeconf0 +[ 0-9a-f]+: 5841 1afc dmtc0 v0,c0_vpeconf1 +[ 0-9a-f]+: 5841 22fc dmtc0 v0,c0_yqmask +[ 0-9a-f]+: 5841 2afc dmtc0 v0,c0_vpeschedule +[ 0-9a-f]+: 5841 32fc dmtc0 v0,c0_vpeschefback +[ 0-9a-f]+: 5841 3afc dmtc0 v0,\$1,7 +[ 0-9a-f]+: 5842 02fc dmtc0 v0,c0_entrylo0 +[ 0-9a-f]+: 5842 0afc dmtc0 v0,c0_tcstatus +[ 0-9a-f]+: 5842 12fc dmtc0 v0,c0_tcbind +[ 0-9a-f]+: 5842 1afc dmtc0 v0,c0_tcrestart +[ 0-9a-f]+: 5842 22fc dmtc0 v0,c0_tchalt +[ 0-9a-f]+: 5842 2afc dmtc0 v0,c0_tccontext +[ 0-9a-f]+: 5842 32fc dmtc0 v0,c0_tcschedule +[ 0-9a-f]+: 5842 3afc dmtc0 v0,c0_tcschefback +[ 0-9a-f]+: 54a0 243b dmfc1 a1,\$f0 +[ 0-9a-f]+: 54a1 243b dmfc1 a1,\$f1 +[ 0-9a-f]+: 54a2 243b dmfc1 a1,\$f2 +[ 0-9a-f]+: 54a3 243b dmfc1 a1,\$f3 +[ 0-9a-f]+: 54a4 243b dmfc1 a1,\$f4 +[ 0-9a-f]+: 54a5 243b dmfc1 a1,\$f5 +[ 0-9a-f]+: 54a6 243b dmfc1 a1,\$f6 +[ 0-9a-f]+: 54a7 243b dmfc1 a1,\$f7 +[ 0-9a-f]+: 54a8 243b dmfc1 a1,\$f8 +[ 0-9a-f]+: 54a9 243b dmfc1 a1,\$f9 +[ 0-9a-f]+: 54aa 243b dmfc1 a1,\$f10 +[ 0-9a-f]+: 54ab 243b dmfc1 a1,\$f11 +[ 0-9a-f]+: 54ac 243b dmfc1 a1,\$f12 +[ 0-9a-f]+: 54ad 243b dmfc1 a1,\$f13 +[ 0-9a-f]+: 54ae 243b dmfc1 a1,\$f14 +[ 0-9a-f]+: 54af 243b dmfc1 a1,\$f15 +[ 0-9a-f]+: 54b0 243b dmfc1 a1,\$f16 +[ 0-9a-f]+: 54b1 243b dmfc1 a1,\$f17 +[ 0-9a-f]+: 54b2 243b dmfc1 a1,\$f18 +[ 0-9a-f]+: 54b3 243b dmfc1 a1,\$f19 +[ 0-9a-f]+: 54b4 243b dmfc1 a1,\$f20 +[ 0-9a-f]+: 54b5 243b dmfc1 a1,\$f21 +[ 0-9a-f]+: 54b6 243b dmfc1 a1,\$f22 +[ 0-9a-f]+: 54b7 243b dmfc1 a1,\$f23 +[ 0-9a-f]+: 54b8 243b dmfc1 a1,\$f24 +[ 0-9a-f]+: 54b9 243b dmfc1 a1,\$f25 +[ 0-9a-f]+: 54ba 243b dmfc1 a1,\$f26 +[ 0-9a-f]+: 54bb 243b dmfc1 a1,\$f27 +[ 0-9a-f]+: 54bc 243b dmfc1 a1,\$f28 +[ 0-9a-f]+: 54bd 243b dmfc1 a1,\$f29 +[ 0-9a-f]+: 54be 243b dmfc1 a1,\$f30 +[ 0-9a-f]+: 54bf 243b dmfc1 a1,\$f31 +[ 0-9a-f]+: 54a0 243b dmfc1 a1,\$f0 +[ 0-9a-f]+: 54a1 243b dmfc1 a1,\$f1 +[ 0-9a-f]+: 54a2 243b dmfc1 a1,\$f2 +[ 0-9a-f]+: 54a3 243b dmfc1 a1,\$f3 +[ 0-9a-f]+: 54a4 243b dmfc1 a1,\$f4 +[ 0-9a-f]+: 54a5 243b dmfc1 a1,\$f5 +[ 0-9a-f]+: 54a6 243b dmfc1 a1,\$f6 +[ 0-9a-f]+: 54a7 243b dmfc1 a1,\$f7 +[ 0-9a-f]+: 54a8 243b dmfc1 a1,\$f8 +[ 0-9a-f]+: 54a9 243b dmfc1 a1,\$f9 +[ 0-9a-f]+: 54aa 243b dmfc1 a1,\$f10 +[ 0-9a-f]+: 54ab 243b dmfc1 a1,\$f11 +[ 0-9a-f]+: 54ac 243b dmfc1 a1,\$f12 +[ 0-9a-f]+: 54ad 243b dmfc1 a1,\$f13 +[ 0-9a-f]+: 54ae 243b dmfc1 a1,\$f14 +[ 0-9a-f]+: 54af 243b dmfc1 a1,\$f15 +[ 0-9a-f]+: 54b0 243b dmfc1 a1,\$f16 +[ 0-9a-f]+: 54b1 243b dmfc1 a1,\$f17 +[ 0-9a-f]+: 54b2 243b dmfc1 a1,\$f18 +[ 0-9a-f]+: 54b3 243b dmfc1 a1,\$f19 +[ 0-9a-f]+: 54b4 243b dmfc1 a1,\$f20 +[ 0-9a-f]+: 54b5 243b dmfc1 a1,\$f21 +[ 0-9a-f]+: 54b6 243b dmfc1 a1,\$f22 +[ 0-9a-f]+: 54b7 243b dmfc1 a1,\$f23 +[ 0-9a-f]+: 54b8 243b dmfc1 a1,\$f24 +[ 0-9a-f]+: 54b9 243b dmfc1 a1,\$f25 +[ 0-9a-f]+: 54ba 243b dmfc1 a1,\$f26 +[ 0-9a-f]+: 54bb 243b dmfc1 a1,\$f27 +[ 0-9a-f]+: 54bc 243b dmfc1 a1,\$f28 +[ 0-9a-f]+: 54bd 243b dmfc1 a1,\$f29 +[ 0-9a-f]+: 54be 243b dmfc1 a1,\$f30 +[ 0-9a-f]+: 54bf 243b dmfc1 a1,\$f31 +[ 0-9a-f]+: 54a0 2c3b dmtc1 a1,\$0 +[ 0-9a-f]+: 54a1 2c3b dmtc1 a1,\$1 +[ 0-9a-f]+: 54a2 2c3b dmtc1 a1,\$2 +[ 0-9a-f]+: 54a3 2c3b dmtc1 a1,\$3 +[ 0-9a-f]+: 54a4 2c3b dmtc1 a1,\$4 +[ 0-9a-f]+: 54a5 2c3b dmtc1 a1,\$5 +[ 0-9a-f]+: 54a6 2c3b dmtc1 a1,\$6 +[ 0-9a-f]+: 54a7 2c3b dmtc1 a1,\$7 +[ 0-9a-f]+: 54a8 2c3b dmtc1 a1,\$8 +[ 0-9a-f]+: 54a9 2c3b dmtc1 a1,\$9 +[ 0-9a-f]+: 54aa 2c3b dmtc1 a1,\$10 +[ 0-9a-f]+: 54ab 2c3b dmtc1 a1,\$11 +[ 0-9a-f]+: 54ac 2c3b dmtc1 a1,\$12 +[ 0-9a-f]+: 54ad 2c3b dmtc1 a1,\$13 +[ 0-9a-f]+: 54ae 2c3b dmtc1 a1,\$14 +[ 0-9a-f]+: 54af 2c3b dmtc1 a1,\$15 +[ 0-9a-f]+: 54b0 2c3b dmtc1 a1,\$16 +[ 0-9a-f]+: 54b1 2c3b dmtc1 a1,\$17 +[ 0-9a-f]+: 54b2 2c3b dmtc1 a1,\$18 +[ 0-9a-f]+: 54b3 2c3b dmtc1 a1,\$19 +[ 0-9a-f]+: 54b4 2c3b dmtc1 a1,\$20 +[ 0-9a-f]+: 54b5 2c3b dmtc1 a1,\$21 +[ 0-9a-f]+: 54b6 2c3b dmtc1 a1,\$22 +[ 0-9a-f]+: 54b7 2c3b dmtc1 a1,\$23 +[ 0-9a-f]+: 54b8 2c3b dmtc1 a1,\$24 +[ 0-9a-f]+: 54b9 2c3b dmtc1 a1,\$25 +[ 0-9a-f]+: 54ba 2c3b dmtc1 a1,\$26 +[ 0-9a-f]+: 54bb 2c3b dmtc1 a1,\$27 +[ 0-9a-f]+: 54bc 2c3b dmtc1 a1,\$28 +[ 0-9a-f]+: 54bd 2c3b dmtc1 a1,\$29 +[ 0-9a-f]+: 54be 2c3b dmtc1 a1,\$30 +[ 0-9a-f]+: 54bf 2c3b dmtc1 a1,\$31 +[ 0-9a-f]+: 54a0 2c3b dmtc1 a1,\$0 +[ 0-9a-f]+: 54a1 2c3b dmtc1 a1,\$1 +[ 0-9a-f]+: 54a2 2c3b dmtc1 a1,\$2 +[ 0-9a-f]+: 54a3 2c3b dmtc1 a1,\$3 +[ 0-9a-f]+: 54a4 2c3b dmtc1 a1,\$4 +[ 0-9a-f]+: 54a5 2c3b dmtc1 a1,\$5 +[ 0-9a-f]+: 54a6 2c3b dmtc1 a1,\$6 +[ 0-9a-f]+: 54a7 2c3b dmtc1 a1,\$7 +[ 0-9a-f]+: 54a8 2c3b dmtc1 a1,\$8 +[ 0-9a-f]+: 54a9 2c3b dmtc1 a1,\$9 +[ 0-9a-f]+: 54aa 2c3b dmtc1 a1,\$10 +[ 0-9a-f]+: 54ab 2c3b dmtc1 a1,\$11 +[ 0-9a-f]+: 54ac 2c3b dmtc1 a1,\$12 +[ 0-9a-f]+: 54ad 2c3b dmtc1 a1,\$13 +[ 0-9a-f]+: 54ae 2c3b dmtc1 a1,\$14 +[ 0-9a-f]+: 54af 2c3b dmtc1 a1,\$15 +[ 0-9a-f]+: 54b0 2c3b dmtc1 a1,\$16 +[ 0-9a-f]+: 54b1 2c3b dmtc1 a1,\$17 +[ 0-9a-f]+: 54b2 2c3b dmtc1 a1,\$18 +[ 0-9a-f]+: 54b3 2c3b dmtc1 a1,\$19 +[ 0-9a-f]+: 54b4 2c3b dmtc1 a1,\$20 +[ 0-9a-f]+: 54b5 2c3b dmtc1 a1,\$21 +[ 0-9a-f]+: 54b6 2c3b dmtc1 a1,\$22 +[ 0-9a-f]+: 54b7 2c3b dmtc1 a1,\$23 +[ 0-9a-f]+: 54b8 2c3b dmtc1 a1,\$24 +[ 0-9a-f]+: 54b9 2c3b dmtc1 a1,\$25 +[ 0-9a-f]+: 54ba 2c3b dmtc1 a1,\$26 +[ 0-9a-f]+: 54bb 2c3b dmtc1 a1,\$27 +[ 0-9a-f]+: 54bc 2c3b dmtc1 a1,\$28 +[ 0-9a-f]+: 54bd 2c3b dmtc1 a1,\$29 +[ 0-9a-f]+: 54be 2c3b dmtc1 a1,\$30 +[ 0-9a-f]+: 54bf 2c3b dmtc1 a1,\$31 +[ 0-9a-f]+: 0040 6d3c dmfc2 v0,\$0 +[ 0-9a-f]+: 0041 6d3c dmfc2 v0,\$1 +[ 0-9a-f]+: 0042 6d3c dmfc2 v0,\$2 +[ 0-9a-f]+: 0043 6d3c dmfc2 v0,\$3 +[ 0-9a-f]+: 0044 6d3c dmfc2 v0,\$4 +[ 0-9a-f]+: 0045 6d3c dmfc2 v0,\$5 +[ 0-9a-f]+: 0046 6d3c dmfc2 v0,\$6 +[ 0-9a-f]+: 0047 6d3c dmfc2 v0,\$7 +[ 0-9a-f]+: 0048 6d3c dmfc2 v0,\$8 +[ 0-9a-f]+: 0049 6d3c dmfc2 v0,\$9 +[ 0-9a-f]+: 004a 6d3c dmfc2 v0,\$10 +[ 0-9a-f]+: 004b 6d3c dmfc2 v0,\$11 +[ 0-9a-f]+: 004c 6d3c dmfc2 v0,\$12 +[ 0-9a-f]+: 004d 6d3c dmfc2 v0,\$13 +[ 0-9a-f]+: 004e 6d3c dmfc2 v0,\$14 +[ 0-9a-f]+: 004f 6d3c dmfc2 v0,\$15 +[ 0-9a-f]+: 0050 6d3c dmfc2 v0,\$16 +[ 0-9a-f]+: 0051 6d3c dmfc2 v0,\$17 +[ 0-9a-f]+: 0052 6d3c dmfc2 v0,\$18 +[ 0-9a-f]+: 0053 6d3c dmfc2 v0,\$19 +[ 0-9a-f]+: 0054 6d3c dmfc2 v0,\$20 +[ 0-9a-f]+: 0055 6d3c dmfc2 v0,\$21 +[ 0-9a-f]+: 0056 6d3c dmfc2 v0,\$22 +[ 0-9a-f]+: 0057 6d3c dmfc2 v0,\$23 +[ 0-9a-f]+: 0058 6d3c dmfc2 v0,\$24 +[ 0-9a-f]+: 0059 6d3c dmfc2 v0,\$25 +[ 0-9a-f]+: 005a 6d3c dmfc2 v0,\$26 +[ 0-9a-f]+: 005b 6d3c dmfc2 v0,\$27 +[ 0-9a-f]+: 005c 6d3c dmfc2 v0,\$28 +[ 0-9a-f]+: 005d 6d3c dmfc2 v0,\$29 +[ 0-9a-f]+: 005e 6d3c dmfc2 v0,\$30 +[ 0-9a-f]+: 005f 6d3c dmfc2 v0,\$31 +[ 0-9a-f]+: 0040 7d3c dmtc2 v0,\$0 +[ 0-9a-f]+: 0041 7d3c dmtc2 v0,\$1 +[ 0-9a-f]+: 0042 7d3c dmtc2 v0,\$2 +[ 0-9a-f]+: 0043 7d3c dmtc2 v0,\$3 +[ 0-9a-f]+: 0044 7d3c dmtc2 v0,\$4 +[ 0-9a-f]+: 0045 7d3c dmtc2 v0,\$5 +[ 0-9a-f]+: 0046 7d3c dmtc2 v0,\$6 +[ 0-9a-f]+: 0047 7d3c dmtc2 v0,\$7 +[ 0-9a-f]+: 0048 7d3c dmtc2 v0,\$8 +[ 0-9a-f]+: 0049 7d3c dmtc2 v0,\$9 +[ 0-9a-f]+: 004a 7d3c dmtc2 v0,\$10 +[ 0-9a-f]+: 004b 7d3c dmtc2 v0,\$11 +[ 0-9a-f]+: 004c 7d3c dmtc2 v0,\$12 +[ 0-9a-f]+: 004d 7d3c dmtc2 v0,\$13 +[ 0-9a-f]+: 004e 7d3c dmtc2 v0,\$14 +[ 0-9a-f]+: 004f 7d3c dmtc2 v0,\$15 +[ 0-9a-f]+: 0050 7d3c dmtc2 v0,\$16 +[ 0-9a-f]+: 0051 7d3c dmtc2 v0,\$17 +[ 0-9a-f]+: 0052 7d3c dmtc2 v0,\$18 +[ 0-9a-f]+: 0053 7d3c dmtc2 v0,\$19 +[ 0-9a-f]+: 0054 7d3c dmtc2 v0,\$20 +[ 0-9a-f]+: 0055 7d3c dmtc2 v0,\$21 +[ 0-9a-f]+: 0056 7d3c dmtc2 v0,\$22 +[ 0-9a-f]+: 0057 7d3c dmtc2 v0,\$23 +[ 0-9a-f]+: 0058 7d3c dmtc2 v0,\$24 +[ 0-9a-f]+: 0059 7d3c dmtc2 v0,\$25 +[ 0-9a-f]+: 005a 7d3c dmtc2 v0,\$26 +[ 0-9a-f]+: 005b 7d3c dmtc2 v0,\$27 +[ 0-9a-f]+: 005c 7d3c dmtc2 v0,\$28 +[ 0-9a-f]+: 005d 7d3c dmtc2 v0,\$29 +[ 0-9a-f]+: 005e 7d3c dmtc2 v0,\$30 +[ 0-9a-f]+: 005f 7d3c dmtc2 v0,\$31 +[ 0-9a-f]+: 5862 8b3c dmult v0,v1 +[ 0-9a-f]+: 5862 9b3c dmultu v0,v1 +[ 0-9a-f]+: 5883 9b3c dmultu v1,a0 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 8b3c dmult v1,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 5883 8b3c dmult v1,a0 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 5842 f888 dsra32 v0,v0,0x1f +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 0022 6c3c tne v0,at,0x6 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 3020 0004 li at,4 +[ 0-9a-f]+: 5823 8b3c dmult v1,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 5842 f888 dsra32 v0,v0,0x1f +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 0022 6c3c tne v0,at,0x6 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 5883 9b3c dmultu v1,a0 +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0001 6c3c tne at,zero,0x6 +[ 0-9a-f]+: 3020 0004 li at,4 +[ 0-9a-f]+: 5823 9b3c dmultu v1,at +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0001 6c3c tne at,zero,0x6 +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 5824 ab3c ddiv zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 5862 ab3c ddiv zero,v0,v1 +[ 0-9a-f]+: 5bfe ab3c ddiv zero,s8,ra +[ 0-9a-f]+: 0003 703c teq v1,zero,0x7 +[ 0-9a-f]+: 5860 ab3c ddiv zero,zero,v1 +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b423 fffe bne v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 5821 f808 dsll32 at,at,0x1f +[ 0-9a-f]+: 0020 603c teq zero,at,0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 001f 703c teq ra,zero,0x7 +[ 0-9a-f]+: 5be0 ab3c ddiv zero,zero,ra +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b43f fffe bne ra,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 5821 f808 dsll32 at,at,0x1f +[ 0-9a-f]+: 0020 603c teq zero,at,0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 5824 ab3c ddiv zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 5862 bb3c ddivu zero,v0,v1 +[ 0-9a-f]+: 5bfe bb3c ddivu zero,s8,ra +[ 0-9a-f]+: 0003 703c teq v1,zero,0x7 +[ 0-9a-f]+: 5860 bb3c ddivu zero,zero,v1 +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 001f 703c teq ra,zero,0x7 +[ 0-9a-f]+: 5be0 bb3c ddivu zero,zero,ra +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 0000 703c teq zero,zero,0x7 +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 5824 bb3c ddivu zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 5824 bb3c ddivu zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 5880 11d0 dnegu v0,a0 +[ 0-9a-f]+: 5862 10d0 drorv v0,v1,v0 +[ 0-9a-f]+: 5880 09d0 dnegu at,a0 +[ 0-9a-f]+: 5841 10d0 drorv v0,v0,at +[ 0-9a-f]+: 5843 e0c8 dror32 v0,v1,0x1c +[ 0-9a-f]+: 5864 10d0 drorv v0,v1,a0 +[ 0-9a-f]+: 5843 20c0 dror v0,v1,0x4 +[ 0-9a-f]+: 5843 20c8 dror32 v0,v1,0x4 +[ 0-9a-f]+: 5864 10d0 drorv v0,v1,a0 +[ 0-9a-f]+: 5843 20c8 dror32 v0,v1,0x4 +[ 0-9a-f]+: 5880 11d0 dnegu v0,a0 +[ 0-9a-f]+: 5862 10d0 drorv v0,v1,v0 +[ 0-9a-f]+: 5880 09d0 dnegu at,a0 +[ 0-9a-f]+: 5841 10d0 drorv v0,v0,at +[ 0-9a-f]+: 5843 e0c8 dror32 v0,v1,0x1c +[ 0-9a-f]+: 5864 10d0 drorv v0,v1,a0 +[ 0-9a-f]+: 5843 20c0 dror v0,v1,0x4 +[ 0-9a-f]+: 5843 20c8 dror32 v0,v1,0x4 +[ 0-9a-f]+: 5864 10d0 drorv v0,v1,a0 +[ 0-9a-f]+: 5843 20c8 dror32 v0,v1,0x4 +[ 0-9a-f]+: 5843 7b3c dsbh v0,v1 +[ 0-9a-f]+: 5842 7b3c dsbh v0,v0 +[ 0-9a-f]+: 5842 7b3c dsbh v0,v0 +[ 0-9a-f]+: 5843 fb3c dshd v0,v1 +[ 0-9a-f]+: 5842 fb3c dshd v0,v0 +[ 0-9a-f]+: 5842 fb3c dshd v0,v0 +[ 0-9a-f]+: 5864 1010 dsllv v0,v1,a0 +[ 0-9a-f]+: 5843 f808 dsll32 v0,v1,0x1f +[ 0-9a-f]+: 5864 1010 dsllv v0,v1,a0 +[ 0-9a-f]+: 5843 f808 dsll32 v0,v1,0x1f +[ 0-9a-f]+: 5843 f800 dsll v0,v1,0x1f +[ 0-9a-f]+: 5864 1090 dsrav v0,v1,a0 +[ 0-9a-f]+: 5843 2088 dsra32 v0,v1,0x4 +[ 0-9a-f]+: 5864 1090 dsrav v0,v1,a0 +[ 0-9a-f]+: 5843 2088 dsra32 v0,v1,0x4 +[ 0-9a-f]+: 5843 2080 dsra v0,v1,0x4 +[ 0-9a-f]+: 5864 1050 dsrlv v0,v1,a0 +[ 0-9a-f]+: 5843 f848 dsrl32 v0,v1,0x1f +[ 0-9a-f]+: 5864 1050 dsrlv v0,v1,a0 +[ 0-9a-f]+: 5843 2048 dsrl32 v0,v1,0x4 +[ 0-9a-f]+: 5843 2040 dsrl v0,v1,0x4 +[ 0-9a-f]+: 5883 1190 dsub v0,v1,a0 +[ 0-9a-f]+: 5bfe e990 dsub sp,s8,ra +[ 0-9a-f]+: 5862 1190 dsub v0,v0,v1 +[ 0-9a-f]+: 5862 1190 dsub v0,v0,v1 +[ 0-9a-f]+: 5883 11d0 dsubu v0,v1,a0 +[ 0-9a-f]+: 5bfe e9d0 dsubu sp,s8,ra +[ 0-9a-f]+: 5862 11d0 dsubu v0,v0,v1 +[ 0-9a-f]+: 5862 11d0 dsubu v0,v0,v1 +[ 0-9a-f]+: 5c43 edcc daddiu v0,v1,-4660 +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 11d0 dsubu v0,v1,at +[ 0-9a-f]+: 5843 001c daddi v0,v1,0 +[ 0-9a-f]+: 5843 ffdc daddi v0,v1,-1 +[ 0-9a-f]+: 5843 801c daddi v0,v1,-512 +[ 0-9a-f]+: 5843 7fdc daddi v0,v1,511 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 5823 1190 dsub v0,v1,at +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 5823 1190 dsub v0,v1,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 5823 1190 dsub v0,v1,at +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 1190 dsub v0,v1,at +[ 0-9a-f]+: 41a1 8888 lui at,0x8888 +[ 0-9a-f]+: 5021 1111 ori at,at,0x1111 +[ 0-9a-f]+: 5821 8000 dsll at,at,0x10 +[ 0-9a-f]+: 5021 1234 ori at,at,0x1234 +[ 0-9a-f]+: 5821 8000 dsll at,at,0x10 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 1190 dsub v0,v1,at +[ 0-9a-f]+: dc40 0000 ld v0,0\(zero\) +[ 0-9a-f]+: dc40 0004 ld v0,4\(zero\) +[ 0-9a-f]+: dc40 0000 ld v0,0\(zero\) +[ 0-9a-f]+: dc40 0000 ld v0,0\(zero\) +[ 0-9a-f]+: dc40 0004 ld v0,4\(zero\) +[ 0-9a-f]+: dc43 0004 ld v0,4\(v1\) +[ 0-9a-f]+: dc43 8000 ld v0,-32768\(v1\) +[ 0-9a-f]+: dc43 7fff ld v0,32767\(v1\) +[ 0-9a-f]+: 6040 4000 ldl v0,0\(zero\) +[ 0-9a-f]+: 6040 4004 ldl v0,4\(zero\) +[ 0-9a-f]+: 6040 4000 ldl v0,0\(zero\) +[ 0-9a-f]+: 6040 4000 ldl v0,0\(zero\) +[ 0-9a-f]+: 6040 4004 ldl v0,4\(zero\) +[ 0-9a-f]+: 6043 4004 ldl v0,4\(v1\) +[ 0-9a-f]+: 6043 4e00 ldl v0,-512\(v1\) +[ 0-9a-f]+: 6043 41ff ldl v0,511\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 4000 ldl v0,0\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 4678 ldl v0,1656\(at\) +[ 0-9a-f]+: 6040 5000 ldr v0,0\(zero\) +[ 0-9a-f]+: 6040 5004 ldr v0,4\(zero\) +[ 0-9a-f]+: 6040 5000 ldr v0,0\(zero\) +[ 0-9a-f]+: 6040 5000 ldr v0,0\(zero\) +[ 0-9a-f]+: 6040 5004 ldr v0,4\(zero\) +[ 0-9a-f]+: 6043 5004 ldr v0,4\(v1\) +[ 0-9a-f]+: 6043 5e00 ldr v0,-512\(v1\) +[ 0-9a-f]+: 6043 51ff ldr v0,511\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 5000 ldr v0,0\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 5678 ldr v0,1656\(at\) +[ 0-9a-f]+: 6040 7000 lld v0,0\(zero\) +[ 0-9a-f]+: 6040 7004 lld v0,4\(zero\) +[ 0-9a-f]+: 6040 7000 lld v0,0\(zero\) +[ 0-9a-f]+: 6040 7000 lld v0,0\(zero\) +[ 0-9a-f]+: 6040 7004 lld v0,4\(zero\) +[ 0-9a-f]+: 6043 7004 lld v0,4\(v1\) +[ 0-9a-f]+: 6043 7e00 lld v0,-512\(v1\) +[ 0-9a-f]+: 6043 71ff lld v0,511\(v1\) +[ 0-9a-f]+: 3040 8000 li v0,-32768 +[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 6042 7000 lld v0,0\(v0\) +[ 0-9a-f]+: 41a2 1234 lui v0,0x1234 +[ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 +[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 6042 7678 lld v0,1656\(v0\) +[ 0-9a-f]+: 6040 e000 lwu v0,0\(zero\) +[ 0-9a-f]+: 6040 e004 lwu v0,4\(zero\) +[ 0-9a-f]+: 6040 e000 lwu v0,0\(zero\) +[ 0-9a-f]+: 6040 e000 lwu v0,0\(zero\) +[ 0-9a-f]+: 6040 e004 lwu v0,4\(zero\) +[ 0-9a-f]+: 6043 e004 lwu v0,4\(v1\) +[ 0-9a-f]+: 6043 ee00 lwu v0,-512\(v1\) +[ 0-9a-f]+: 6043 e1ff lwu v0,511\(v1\) +[ 0-9a-f]+: 3040 8000 li v0,-32768 +[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 6042 e000 lwu v0,0\(v0\) +[ 0-9a-f]+: 41a2 1234 lui v0,0x1234 +[ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 +[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 6042 e678 lwu v0,1656\(v0\) +[ 0-9a-f]+: 6040 f000 scd v0,0\(zero\) +[ 0-9a-f]+: 6040 f004 scd v0,4\(zero\) +[ 0-9a-f]+: 6040 f000 scd v0,0\(zero\) +[ 0-9a-f]+: 6040 f000 scd v0,0\(zero\) +[ 0-9a-f]+: 6040 f004 scd v0,4\(zero\) +[ 0-9a-f]+: 6043 f004 scd v0,4\(v1\) +[ 0-9a-f]+: 6043 fe00 scd v0,-512\(v1\) +[ 0-9a-f]+: 6043 f1ff scd v0,511\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 f000 scd v0,0\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 f678 scd v0,1656\(at\) +[ 0-9a-f]+: d840 0000 sd v0,0\(zero\) +[ 0-9a-f]+: d840 0004 sd v0,4\(zero\) +[ 0-9a-f]+: d840 0000 sd v0,0\(zero\) +[ 0-9a-f]+: d840 0000 sd v0,0\(zero\) +[ 0-9a-f]+: d840 0004 sd v0,4\(zero\) +[ 0-9a-f]+: d843 0004 sd v0,4\(v1\) +[ 0-9a-f]+: d843 8000 sd v0,-32768\(v1\) +[ 0-9a-f]+: d843 7fff sd v0,32767\(v1\) +[ 0-9a-f]+: 6040 c000 sdl v0,0\(zero\) +[ 0-9a-f]+: 6040 c004 sdl v0,4\(zero\) +[ 0-9a-f]+: 6040 c000 sdl v0,0\(zero\) +[ 0-9a-f]+: 6040 c000 sdl v0,0\(zero\) +[ 0-9a-f]+: 6040 c004 sdl v0,4\(zero\) +[ 0-9a-f]+: 6043 c004 sdl v0,4\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 c000 sdl v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 cfff sdl v0,-1\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 c678 sdl v0,1656\(at\) +[ 0-9a-f]+: 6040 d000 sdr v0,0\(zero\) +[ 0-9a-f]+: 6040 d004 sdr v0,4\(zero\) +[ 0-9a-f]+: 6040 d000 sdr v0,0\(zero\) +[ 0-9a-f]+: 6040 d000 sdr v0,0\(zero\) +[ 0-9a-f]+: 6040 d004 sdr v0,4\(zero\) +[ 0-9a-f]+: 6043 d004 sdr v0,4\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 d000 sdr v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 dfff sdr v0,-1\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 d678 sdr v0,1656\(at\) +[ 0-9a-f]+: 2020 7000 ldm s0,0\(zero\) +[ 0-9a-f]+: 2020 7004 ldm s0,4\(zero\) +[ 0-9a-f]+: 2025 7000 ldm s0,0\(a1\) +[ 0-9a-f]+: 2025 77ff ldm s0,2047\(a1\) +[ 0-9a-f]+: 2045 77ff ldm s0-s1,2047\(a1\) +[ 0-9a-f]+: 2065 77ff ldm s0-s2,2047\(a1\) +[ 0-9a-f]+: 2085 77ff ldm s0-s3,2047\(a1\) +[ 0-9a-f]+: 20a5 77ff ldm s0-s4,2047\(a1\) +[ 0-9a-f]+: 20c5 77ff ldm s0-s5,2047\(a1\) +[ 0-9a-f]+: 20e5 77ff ldm s0-s6,2047\(a1\) +[ 0-9a-f]+: 2105 77ff ldm s0-s7,2047\(a1\) +[ 0-9a-f]+: 2125 77ff ldm s0-s7,s8,2047\(a1\) +[ 0-9a-f]+: 2205 77ff ldm ra,2047\(a1\) +[ 0-9a-f]+: 2225 7000 ldm s0,ra,0\(a1\) +[ 0-9a-f]+: 2245 7000 ldm s0-s1,ra,0\(a1\) +[ 0-9a-f]+: 2265 7000 ldm s0-s2,ra,0\(a1\) +[ 0-9a-f]+: 2285 7000 ldm s0-s3,ra,0\(a1\) +[ 0-9a-f]+: 22a5 7000 ldm s0-s4,ra,0\(a1\) +[ 0-9a-f]+: 22c5 7000 ldm s0-s5,ra,0\(a1\) +[ 0-9a-f]+: 22e5 7000 ldm s0-s6,ra,0\(a1\) +[ 0-9a-f]+: 2305 7000 ldm s0-s7,ra,0\(a1\) +[ 0-9a-f]+: 2325 7000 ldm s0-s7,s8,ra,0\(a1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 2020 7000 ldm s0,0\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 203d 7000 ldm s0,0\(sp\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 7678 ldm s0,1656\(at\) +[ 0-9a-f]+: 2040 4000 ldp v0,0\(zero\) +[ 0-9a-f]+: 2040 4004 ldp v0,4\(zero\) +[ 0-9a-f]+: 205d 4000 ldp v0,0\(sp\) +[ 0-9a-f]+: 205d 4000 ldp v0,0\(sp\) +[ 0-9a-f]+: 2043 4800 ldp v0,-2048\(v1\) +[ 0-9a-f]+: 2043 47ff ldp v0,2047\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 4000 ldp v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) +[ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) +[ 0-9a-f]+: 5060 8000 li v1,0x8000 +[ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 5063 5000 ori v1,v1,0x5000 +[ 0-9a-f]+: 2043 4678 ldp v0,1656\(v1\) +[ 0-9a-f]+: 2020 f000 sdm s0,0\(zero\) +[ 0-9a-f]+: 2020 f004 sdm s0,4\(zero\) +[ 0-9a-f]+: 2025 f000 sdm s0,0\(a1\) +[ 0-9a-f]+: 2025 f7ff sdm s0,2047\(a1\) +[ 0-9a-f]+: 2045 f7ff sdm s0-s1,2047\(a1\) +[ 0-9a-f]+: 2065 f7ff sdm s0-s2,2047\(a1\) +[ 0-9a-f]+: 2085 f7ff sdm s0-s3,2047\(a1\) +[ 0-9a-f]+: 20a5 f7ff sdm s0-s4,2047\(a1\) +[ 0-9a-f]+: 20c5 f7ff sdm s0-s5,2047\(a1\) +[ 0-9a-f]+: 20e5 f7ff sdm s0-s6,2047\(a1\) +[ 0-9a-f]+: 2105 f7ff sdm s0-s7,2047\(a1\) +[ 0-9a-f]+: 2125 f7ff sdm s0-s7,s8,2047\(a1\) +[ 0-9a-f]+: 2205 f7ff sdm ra,2047\(a1\) +[ 0-9a-f]+: 2225 f000 sdm s0,ra,0\(a1\) +[ 0-9a-f]+: 2245 f000 sdm s0-s1,ra,0\(a1\) +[ 0-9a-f]+: 2265 f000 sdm s0-s2,ra,0\(a1\) +[ 0-9a-f]+: 2285 f000 sdm s0-s3,ra,0\(a1\) +[ 0-9a-f]+: 22a5 f000 sdm s0-s4,ra,0\(a1\) +[ 0-9a-f]+: 22c5 f000 sdm s0-s5,ra,0\(a1\) +[ 0-9a-f]+: 22e5 f000 sdm s0-s6,ra,0\(a1\) +[ 0-9a-f]+: 2305 f000 sdm s0-s7,ra,0\(a1\) +[ 0-9a-f]+: 2325 f000 sdm s0-s7,s8,ra,0\(a1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 2020 f000 sdm s0,0\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 203d f000 sdm s0,0\(sp\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 f678 sdm s0,1656\(at\) +[ 0-9a-f]+: 2040 c000 sdp v0,0\(zero\) +[ 0-9a-f]+: 2040 c004 sdp v0,4\(zero\) +[ 0-9a-f]+: 205d c000 sdp v0,0\(sp\) +[ 0-9a-f]+: 205d c000 sdp v0,0\(sp\) +[ 0-9a-f]+: 2043 c800 sdp v0,-2048\(v1\) +[ 0-9a-f]+: 2043 c7ff sdp v0,2047\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 2043 c000 sdp v0,0\(v1\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 2041 c678 sdp v0,1656\(at\) +[ 0-9a-f]+: 6060 4000 ldl v1,0\(zero\) +[ 0-9a-f]+: 6060 5007 ldr v1,7\(zero\) +[ 0-9a-f]+: 6060 4000 ldl v1,0\(zero\) +[ 0-9a-f]+: 6060 5007 ldr v1,7\(zero\) +[ 0-9a-f]+: 6060 4004 ldl v1,4\(zero\) +[ 0-9a-f]+: 6060 500b ldr v1,11\(zero\) +[ 0-9a-f]+: 6060 4004 ldl v1,4\(zero\) +[ 0-9a-f]+: 6060 500b ldr v1,11\(zero\) +[ 0-9a-f]+: 3020 07ff li at,2047 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6060 4800 ldl v1,-2048\(zero\) +[ 0-9a-f]+: 6060 5807 ldr v1,-2041\(zero\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 7ff1 li at,32753 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6064 4000 ldl v1,0\(a0\) +[ 0-9a-f]+: 6064 5007 ldr v1,7\(a0\) +[ 0-9a-f]+: 6064 4004 ldl v1,4\(a0\) +[ 0-9a-f]+: 6064 500b ldr v1,11\(a0\) +[ 0-9a-f]+: 3024 07ff addiu at,a0,2047 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6064 4800 ldl v1,-2048\(a0\) +[ 0-9a-f]+: 6064 5807 ldr v1,-2041\(a0\) +[ 0-9a-f]+: 3024 0800 addiu at,a0,2048 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3024 f7ff addiu at,a0,-2049 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3024 7ff1 addiu at,a0,32753 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6060 c000 sdl v1,0\(zero\) +[ 0-9a-f]+: 6060 d007 sdr v1,7\(zero\) +[ 0-9a-f]+: 6060 c000 sdl v1,0\(zero\) +[ 0-9a-f]+: 6060 d007 sdr v1,7\(zero\) +[ 0-9a-f]+: 6060 c004 sdl v1,4\(zero\) +[ 0-9a-f]+: 6060 d00b sdr v1,11\(zero\) +[ 0-9a-f]+: 6060 c004 sdl v1,4\(zero\) +[ 0-9a-f]+: 6060 d00b sdr v1,11\(zero\) +[ 0-9a-f]+: 3020 07ff li at,2047 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6060 c800 sdl v1,-2048\(zero\) +[ 0-9a-f]+: 6060 d807 sdr v1,-2041\(zero\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 7ff1 li at,32753 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6064 c000 sdl v1,0\(a0\) +[ 0-9a-f]+: 6064 d007 sdr v1,7\(a0\) +[ 0-9a-f]+: 6064 c004 sdl v1,4\(a0\) +[ 0-9a-f]+: 6064 d00b sdr v1,11\(a0\) +[ 0-9a-f]+: 3024 07ff addiu at,a0,2047 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6064 c800 sdl v1,-2048\(a0\) +[ 0-9a-f]+: 6064 d807 sdr v1,-2041\(a0\) +[ 0-9a-f]+: 3024 0800 addiu at,a0,2048 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3024 f7ff addiu at,a0,-2049 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3024 7ff1 addiu at,a0,32753 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6201 4000 ldl s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6201 5000 ldr s0,0\(at\) +[ 0-9a-f]+: 3203 0000 addiu s0,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6210 7000 lld s0,0\(s0\) +[ 0-9a-f]+: 3203 0000 addiu s0,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6210 e000 lwu s0,0\(s0\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6201 f000 scd s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6201 c000 sdl s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6201 d000 sdr s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) +[ 0-9a-f]+: 3223 0000 addiu s1,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2211 4000 ldp s0,0\(s1\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2201 c000 sdp s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2201 2000 ldc2 \$16,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2201 a000 sdc2 \$16,0\(at\) + +[0-9a-f]+ : +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_delay_slot +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4063 fffe bgezal v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_delay_slot +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4023 fffe bltzal v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_delay_slot +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4263 fffe bgezals v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_delay_slot +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4223 fffe bltzals v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_delay_slot +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: f400 0000 jal [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test_delay_slot +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: f000 0000 jalx [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test_delay_slot +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c2 jalr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e2 0f3c jalr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4582 jr v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0002 0f3c jr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e2 1f3c jalr\.hb v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0002 1f3c jr\.hb v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 7400 0000 jals [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test_delay_slot +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 45e2 jalrs v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 03e2 4f3c jalrs v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0002 4f3c jrs v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 03e2 5f3c jalrs\.hb v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0002 5f3c jrs\.hb v0 +[ 0-9a-f]+: 0c00 nop + +[0-9a-f]+ : +[ 0-9a-f]+: 6540 lw v0,-256\(gp\) +[ 0-9a-f]+: 65c0 lw v1,-256\(gp\) +[ 0-9a-f]+: 6640 lw a0,-256\(gp\) +[ 0-9a-f]+: 66c0 lw a1,-256\(gp\) +[ 0-9a-f]+: 6740 lw a2,-256\(gp\) +[ 0-9a-f]+: 67c0 lw a3,-256\(gp\) +[ 0-9a-f]+: 6440 lw s0,-256\(gp\) +[ 0-9a-f]+: 64c0 lw s1,-256\(gp\) +[ 0-9a-f]+: 64c1 lw s1,-252\(gp\) +[ 0-9a-f]+: 64ff lw s1,-4\(gp\) +[ 0-9a-f]+: 6480 lw s1,0\(gp\) +[ 0-9a-f]+: 6481 lw s1,4\(gp\) +[ 0-9a-f]+: 64be lw s1,248\(gp\) +[ 0-9a-f]+: 64bf lw s1,252\(gp\) +[ 0-9a-f]+: fe3c 0100 lw s1,256\(gp\) +[ 0-9a-f]+: fe3c fefc lw s1,-260\(gp\) +[ 0-9a-f]+: fe3c 0001 lw s1,1\(gp\) +[ 0-9a-f]+: fe3c 0002 lw s1,2\(gp\) +[ 0-9a-f]+: fe3c 0003 lw s1,3\(gp\) +[ 0-9a-f]+: fe3c ffff lw s1,-1\(gp\) +[ 0-9a-f]+: fe3c fffe lw s1,-2\(gp\) +[ 0-9a-f]+: fe3c fffd lw s1,-3\(gp\) +[ 0-9a-f]+: fe3b 0000 lw s1,0\(k1\) +[ 0-9a-f]+: 7900 0000 addiu v0,\$pc,0 +[ 0-9a-f]+: 7980 0000 addiu v1,\$pc,0 +[ 0-9a-f]+: 7a00 0000 addiu a0,\$pc,0 +[ 0-9a-f]+: 7a80 0000 addiu a1,\$pc,0 +[ 0-9a-f]+: 7b00 0000 addiu a2,\$pc,0 +[ 0-9a-f]+: 7b80 0000 addiu a3,\$pc,0 +[ 0-9a-f]+: 7800 0000 addiu s0,\$pc,0 +[ 0-9a-f]+: 7880 0000 addiu s1,\$pc,0 +[ 0-9a-f]+: 78bf ffff addiu s1,\$pc,16777212 +[ 0-9a-f]+: 78c0 0000 addiu s1,\$pc,-16777216 +[ 0-9a-f]+: 7900 0000 addiu v0,\$pc,0 +[ 0-9a-f]+: 7980 0000 addiu v1,\$pc,0 +[ 0-9a-f]+: 7a00 0000 addiu a0,\$pc,0 +[ 0-9a-f]+: 7a80 0000 addiu a1,\$pc,0 +[ 0-9a-f]+: 7b00 0000 addiu a2,\$pc,0 +[ 0-9a-f]+: 7b80 0000 addiu a3,\$pc,0 +[ 0-9a-f]+: 7800 0000 addiu s0,\$pc,0 +[ 0-9a-f]+: 7880 0000 addiu s1,\$pc,0 +[ 0-9a-f]+: 78bf ffff addiu s1,\$pc,16777212 +[ 0-9a-f]+: 78c0 0000 addiu s1,\$pc,-16777216 + +[0-9a-f]+ : +[ 0-9a-f]+: 8400 movep a1,a2,zero,zero +[ 0-9a-f]+: 8480 movep a1,a3,zero,zero +[ 0-9a-f]+: 8500 movep a2,a3,zero,zero +[ 0-9a-f]+: 8580 movep a0,s5,zero,zero +[ 0-9a-f]+: 8600 movep a0,s6,zero,zero +[ 0-9a-f]+: 8680 movep a0,a1,zero,zero +[ 0-9a-f]+: 8700 movep a0,a2,zero,zero +[ 0-9a-f]+: 8780 movep a0,a3,zero,zero +[ 0-9a-f]+: 8782 movep a0,a3,s1,zero +[ 0-9a-f]+: 8784 movep a0,a3,v0,zero +[ 0-9a-f]+: 8786 movep a0,a3,v1,zero +[ 0-9a-f]+: 8788 movep a0,a3,s0,zero +[ 0-9a-f]+: 878a movep a0,a3,s2,zero +[ 0-9a-f]+: 878c movep a0,a3,s3,zero +[ 0-9a-f]+: 878e movep a0,a3,s4,zero +[ 0-9a-f]+: 879e movep a0,a3,s4,s1 +[ 0-9a-f]+: 87ae movep a0,a3,s4,v0 +[ 0-9a-f]+: 87be movep a0,a3,s4,v1 +[ 0-9a-f]+: 87ce movep a0,a3,s4,s0 +[ 0-9a-f]+: 87de movep a0,a3,s4,s2 +[ 0-9a-f]+: 87ee movep a0,a3,s4,s3 +[ 0-9a-f]+: 87fe movep a0,a3,s4,s4 +[ 0-9a-f]+: 4260 fffe bals [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4262 fffe bgezals v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4222 fffe bltzals v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4062 fffe bgezal v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4022 fffe bltzal v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0000 0000 nop +#pass diff --git a/gas/testsuite/gas/mips/micromips.d b/gas/testsuite/gas/mips/micromips.d new file mode 100644 index 0000000..1de9dab --- /dev/null +++ b/gas/testsuite/gas/mips/micromips.d @@ -0,0 +1,7946 @@ +#objdump: -dr --show-raw-insn +#name: microMIPS for MIPS32r2 +#as: -mips32r2 -32 -mfp64 -EB +#stderr: micromips.l +#source: micromips.s + +.*: +file format .*mips.* + +Disassembly of section \.text: + +[0-9a-f]+ : +[ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) +[ 0-9a-f]+: 6000 27ff pref 0x0,2047\(zero\) +[ 0-9a-f]+: 6000 2800 pref 0x0,-2048\(zero\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 6001 2800 pref 0x0,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 6001 27ff pref 0x0,2047\(at\) +[ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) +[ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) +[ 0-9a-f]+: 6020 2000 pref 0x1,0\(zero\) +[ 0-9a-f]+: 6040 2000 pref 0x2,0\(zero\) +[ 0-9a-f]+: 6060 2000 pref 0x3,0\(zero\) +[ 0-9a-f]+: 6080 2000 pref 0x4,0\(zero\) +[ 0-9a-f]+: 60a0 2000 pref 0x5,0\(zero\) +[ 0-9a-f]+: 60c0 2000 pref 0x6,0\(zero\) +[ 0-9a-f]+: 60e0 2000 pref 0x7,0\(zero\) +[ 0-9a-f]+: 60e0 21ff pref 0x7,511\(zero\) +[ 0-9a-f]+: 60e0 2e00 pref 0x7,-512\(zero\) +[ 0-9a-f]+: 63e0 27ff pref 0x1f,2047\(zero\) +[ 0-9a-f]+: 63e0 2800 pref 0x1f,-2048\(zero\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) +[ 0-9a-f]+: 63e2 27ff pref 0x1f,2047\(v0\) +[ 0-9a-f]+: 63e2 2800 pref 0x1f,-2048\(v0\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0000 0800 ssnop +[ 0-9a-f]+: 0000 1800 ehb +[ 0-9a-f]+: 0000 2800 pause +[ 0-9a-f]+: ed7f li v0,-1 +[ 0-9a-f]+: edff li v1,-1 +[ 0-9a-f]+: ee7f li a0,-1 +[ 0-9a-f]+: eeff li a1,-1 +[ 0-9a-f]+: ef7f li a2,-1 +[ 0-9a-f]+: efff li a3,-1 +[ 0-9a-f]+: ec7f li s0,-1 +[ 0-9a-f]+: ecff li s1,-1 +[ 0-9a-f]+: ec80 li s1,0 +[ 0-9a-f]+: ecfd li s1,125 +[ 0-9a-f]+: ecfe li s1,126 +[ 0-9a-f]+: 3220 007f li s1,127 +[ 0-9a-f]+: 3040 0000 li v0,0 +[ 0-9a-f]+: 3040 0001 li v0,1 +[ 0-9a-f]+: 3040 7fff li v0,32767 +[ 0-9a-f]+: 3040 8000 li v0,-32768 +[ 0-9a-f]+: 5040 ffff li v0,0xffff +[ 0-9a-f]+: 41a2 0001 lui v0,0x1 +[ 0-9a-f]+: 3040 8000 li v0,-32768 +[ 0-9a-f]+: 3040 8001 li v0,-32767 +[ 0-9a-f]+: 3040 ffff li v0,-1 +[ 0-9a-f]+: 41a2 1234 lui v0,0x1234 +[ 0-9a-f]+: 5042 5678 ori v0,v0,0x5678 +[ 0-9a-f]+: 0c16 move zero,s6 +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0c76 move v1,s6 +[ 0-9a-f]+: 0c96 move a0,s6 +[ 0-9a-f]+: 0cb6 move a1,s6 +[ 0-9a-f]+: 0cd6 move a2,s6 +[ 0-9a-f]+: 0cf6 move a3,s6 +[ 0-9a-f]+: 0d16 move t0,s6 +[ 0-9a-f]+: 0d36 move t1,s6 +[ 0-9a-f]+: 0d56 move t2,s6 +[ 0-9a-f]+: 0fd6 move s8,s6 +[ 0-9a-f]+: 0ff6 move ra,s6 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0c02 move zero,v0 +[ 0-9a-f]+: 0c03 move zero,v1 +[ 0-9a-f]+: 0c04 move zero,a0 +[ 0-9a-f]+: 0c05 move zero,a1 +[ 0-9a-f]+: 0c06 move zero,a2 +[ 0-9a-f]+: 0c07 move zero,a3 +[ 0-9a-f]+: 0c08 move zero,t0 +[ 0-9a-f]+: 0c09 move zero,t1 +[ 0-9a-f]+: 0c0a move zero,t2 +[ 0-9a-f]+: 0c1e move zero,s8 +[ 0-9a-f]+: 0c1f move zero,ra +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 0016 1150 move v0,s6 +[ 0-9a-f]+: cfff b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 test +[ 0-9a-f]+: 0002 b150 move s6,v0 +[ 0-9a-f]+: cfff b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: cfff b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: cfff b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: cfff b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: cfff b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c43 move v0,v1 +[ 0-9a-f]+: 0060 1190 neg v0,v1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4044 fffe bgez a0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c44 move v0,a0 +[ 0-9a-f]+: 0080 1190 neg v0,a0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0040 1190 neg v0,v0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0040 1190 neg v0,v0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0083 1110 add v0,v1,a0 +[ 0-9a-f]+: 03fe e910 add sp,s8,ra +[ 0-9a-f]+: 0082 1110 add v0,v0,a0 +[ 0-9a-f]+: 0082 1110 add v0,v0,a0 +[ 0-9a-f]+: 1042 0000 addi v0,v0,0 +[ 0-9a-f]+: 1042 0001 addi v0,v0,1 +[ 0-9a-f]+: 1042 7fff addi v0,v0,32767 +[ 0-9a-f]+: 1042 8000 addi v0,v0,-32768 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 1110 add v0,v0,at +[ 0-9a-f]+: 1064 8000 addi v1,a0,-32768 +[ 0-9a-f]+: 1064 0000 addi v1,a0,0 +[ 0-9a-f]+: 1064 7fff addi v1,a0,32767 +[ 0-9a-f]+: 1064 ffff addi v1,a0,-1 +[ 0-9a-f]+: 1063 ffff addi v1,v1,-1 +[ 0-9a-f]+: 1063 ffff addi v1,v1,-1 +[ 0-9a-f]+: 4c10 addiu zero,zero,-8 +[ 0-9a-f]+: 4c50 addiu v0,v0,-8 +[ 0-9a-f]+: 4c70 addiu v1,v1,-8 +[ 0-9a-f]+: 4c90 addiu a0,a0,-8 +[ 0-9a-f]+: 4cb0 addiu a1,a1,-8 +[ 0-9a-f]+: 4cd0 addiu a2,a2,-8 +[ 0-9a-f]+: 4cf0 addiu a3,a3,-8 +[ 0-9a-f]+: 4d10 addiu t0,t0,-8 +[ 0-9a-f]+: 4d30 addiu t1,t1,-8 +[ 0-9a-f]+: 4d50 addiu t2,t2,-8 +[ 0-9a-f]+: 4fd0 addiu s8,s8,-8 +[ 0-9a-f]+: 4ff0 addiu ra,ra,-8 +[ 0-9a-f]+: 4ff2 addiu ra,ra,-7 +[ 0-9a-f]+: 4fe0 addiu ra,ra,0 +[ 0-9a-f]+: 4fe2 addiu ra,ra,1 +[ 0-9a-f]+: 4fec addiu ra,ra,6 +[ 0-9a-f]+: 4fee addiu ra,ra,7 +[ 0-9a-f]+: 33ff 0008 addiu ra,ra,8 +[ 0-9a-f]+: 4ffd addiu sp,sp,-1032 +[ 0-9a-f]+: 4fff addiu sp,sp,-1028 +[ 0-9a-f]+: 4e01 addiu sp,sp,-1024 +[ 0-9a-f]+: 4dff addiu sp,sp,1020 +[ 0-9a-f]+: 4c01 addiu sp,sp,1024 +[ 0-9a-f]+: 4c03 addiu sp,sp,1028 +[ 0-9a-f]+: 4c03 addiu sp,sp,1028 +[ 0-9a-f]+: 33bd 0408 addiu sp,sp,1032 +[ 0-9a-f]+: 6d2e addiu v0,v0,-1 +[ 0-9a-f]+: 6d3e addiu v0,v1,-1 +[ 0-9a-f]+: 6d4e addiu v0,a0,-1 +[ 0-9a-f]+: 6d5e addiu v0,a1,-1 +[ 0-9a-f]+: 6d6e addiu v0,a2,-1 +[ 0-9a-f]+: 6d7e addiu v0,a3,-1 +[ 0-9a-f]+: 6d0e addiu v0,s0,-1 +[ 0-9a-f]+: 6d1e addiu v0,s1,-1 +[ 0-9a-f]+: 6d10 addiu v0,s1,1 +[ 0-9a-f]+: 6d12 addiu v0,s1,4 +[ 0-9a-f]+: 6d14 addiu v0,s1,8 +[ 0-9a-f]+: 6d16 addiu v0,s1,12 +[ 0-9a-f]+: 6d18 addiu v0,s1,16 +[ 0-9a-f]+: 6d1a addiu v0,s1,20 +[ 0-9a-f]+: 6d1c addiu v0,s1,24 +[ 0-9a-f]+: 6d9c addiu v1,s1,24 +[ 0-9a-f]+: 6e1c addiu a0,s1,24 +[ 0-9a-f]+: 6e9c addiu a1,s1,24 +[ 0-9a-f]+: 6f1c addiu a2,s1,24 +[ 0-9a-f]+: 6f9c addiu a3,s1,24 +[ 0-9a-f]+: 6c1c addiu s0,s1,24 +[ 0-9a-f]+: 6c9c addiu s1,s1,24 +[ 0-9a-f]+: 0c5d move v0,sp +[ 0-9a-f]+: 6d03 addiu v0,sp,4 +[ 0-9a-f]+: 6d7d addiu v0,sp,248 +[ 0-9a-f]+: 6d7f addiu v0,sp,252 +[ 0-9a-f]+: 305d 0100 addiu v0,sp,256 +[ 0-9a-f]+: 6d7f addiu v0,sp,252 +[ 0-9a-f]+: 6dff addiu v1,sp,252 +[ 0-9a-f]+: 6e7f addiu a0,sp,252 +[ 0-9a-f]+: 6eff addiu a1,sp,252 +[ 0-9a-f]+: 6f7f addiu a2,sp,252 +[ 0-9a-f]+: 6fff addiu a3,sp,252 +[ 0-9a-f]+: 6c7f addiu s0,sp,252 +[ 0-9a-f]+: 6cff addiu s1,sp,252 +[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768 +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 3064 7fff addiu v1,a0,32767 +[ 0-9a-f]+: 3064 ffff addiu v1,a0,-1 +[ 0-9a-f]+: 3063 ffff addiu v1,v1,-1 +[ 0-9a-f]+: 3063 ffff addiu v1,v1,-1 +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 0526 addu v0,v1,v0 +[ 0-9a-f]+: 0536 addu v0,v1,v1 +[ 0-9a-f]+: 0546 addu v0,v1,a0 +[ 0-9a-f]+: 0556 addu v0,v1,a1 +[ 0-9a-f]+: 0566 addu v0,v1,a2 +[ 0-9a-f]+: 0576 addu v0,v1,a3 +[ 0-9a-f]+: 0506 addu v0,v1,s0 +[ 0-9a-f]+: 0516 addu v0,v1,s1 +[ 0-9a-f]+: 0514 addu v0,v0,s1 +[ 0-9a-f]+: 0516 addu v0,v1,s1 +[ 0-9a-f]+: 0518 addu v0,a0,s1 +[ 0-9a-f]+: 051a addu v0,a1,s1 +[ 0-9a-f]+: 051c addu v0,a2,s1 +[ 0-9a-f]+: 051e addu v0,a3,s1 +[ 0-9a-f]+: 0510 addu v0,s0,s1 +[ 0-9a-f]+: 0512 addu v0,s1,s1 +[ 0-9a-f]+: 0514 addu v0,v0,s1 +[ 0-9a-f]+: 0594 addu v1,v0,s1 +[ 0-9a-f]+: 0614 addu a0,v0,s1 +[ 0-9a-f]+: 0694 addu a1,v0,s1 +[ 0-9a-f]+: 0714 addu a2,v0,s1 +[ 0-9a-f]+: 0794 addu a3,v0,s1 +[ 0-9a-f]+: 0414 addu s0,v0,s1 +[ 0-9a-f]+: 0494 addu s1,v0,s1 +[ 0-9a-f]+: 07ae addu a3,a3,v0 +[ 0-9a-f]+: 07ae addu a3,a3,v0 +[ 0-9a-f]+: 07f4 addu a3,v0,a3 +[ 0-9a-f]+: 03fe e950 addu sp,s8,ra +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ 0-9a-f]+: 3042 0001 addiu v0,v0,1 +[ 0-9a-f]+: 3042 7fff addiu v0,v0,32767 +[ 0-9a-f]+: 3042 8000 addiu v0,v0,-32768 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 1150 addu v0,v0,at +[ 0-9a-f]+: 4492 and v0,v0,v0 +[ 0-9a-f]+: 4493 and v0,v0,v1 +[ 0-9a-f]+: 4494 and v0,v0,a0 +[ 0-9a-f]+: 4495 and v0,v0,a1 +[ 0-9a-f]+: 4496 and v0,v0,a2 +[ 0-9a-f]+: 4497 and v0,v0,a3 +[ 0-9a-f]+: 4490 and v0,v0,s0 +[ 0-9a-f]+: 4491 and v0,v0,s1 +[ 0-9a-f]+: 449a and v1,v1,v0 +[ 0-9a-f]+: 44a2 and a0,a0,v0 +[ 0-9a-f]+: 44aa and a1,a1,v0 +[ 0-9a-f]+: 44b2 and a2,a2,v0 +[ 0-9a-f]+: 44ba and a3,a3,v0 +[ 0-9a-f]+: 4482 and s0,s0,v0 +[ 0-9a-f]+: 448a and s1,s1,v0 +[ 0-9a-f]+: 4493 and v0,v0,v1 +[ 0-9a-f]+: 4493 and v0,v0,v1 +[ 0-9a-f]+: 4493 and v0,v0,v1 +[ 0-9a-f]+: 4493 and v0,v0,v1 +[ 0-9a-f]+: 0062 1250 and v0,v0,v1 +[ 0-9a-f]+: 2d21 andi v0,v0,0x1 +[ 0-9a-f]+: 2d22 andi v0,v0,0x2 +[ 0-9a-f]+: 2d23 andi v0,v0,0x3 +[ 0-9a-f]+: 2d24 andi v0,v0,0x4 +[ 0-9a-f]+: 2d25 andi v0,v0,0x7 +[ 0-9a-f]+: 2d26 andi v0,v0,0x8 +[ 0-9a-f]+: 2d27 andi v0,v0,0xf +[ 0-9a-f]+: 2d28 andi v0,v0,0x10 +[ 0-9a-f]+: 2d29 andi v0,v0,0x1f +[ 0-9a-f]+: 2d2a andi v0,v0,0x20 +[ 0-9a-f]+: 2d2b andi v0,v0,0x3f +[ 0-9a-f]+: 2d2c andi v0,v0,0x40 +[ 0-9a-f]+: 2d20 andi v0,v0,0x80 +[ 0-9a-f]+: 2d2d andi v0,v0,0xff +[ 0-9a-f]+: 2d2e andi v0,v0,0x8000 +[ 0-9a-f]+: 2d2f andi v0,v0,0xffff +[ 0-9a-f]+: 2d3f andi v0,v1,0xffff +[ 0-9a-f]+: 2d4f andi v0,a0,0xffff +[ 0-9a-f]+: 2d5f andi v0,a1,0xffff +[ 0-9a-f]+: 2d6f andi v0,a2,0xffff +[ 0-9a-f]+: 2d7f andi v0,a3,0xffff +[ 0-9a-f]+: 2d0f andi v0,s0,0xffff +[ 0-9a-f]+: 2d1f andi v0,s1,0xffff +[ 0-9a-f]+: 2d9f andi v1,s1,0xffff +[ 0-9a-f]+: 2e1f andi a0,s1,0xffff +[ 0-9a-f]+: 2e9f andi a1,s1,0xffff +[ 0-9a-f]+: 2f1f andi a2,s1,0xffff +[ 0-9a-f]+: 2f9f andi a3,s1,0xffff +[ 0-9a-f]+: 2c1f andi s0,s1,0xffff +[ 0-9a-f]+: 2c9f andi s1,s1,0xffff +[ 0-9a-f]+: 2fff andi a3,a3,0xffff +[ 0-9a-f]+: 2fff andi a3,a3,0xffff +[ 0-9a-f]+: 2fff andi a3,a3,0xffff +[ 0-9a-f]+: d0e7 ffff andi a3,a3,0xffff +[ 0-9a-f]+: 0083 1250 and v0,v1,a0 +[ 0-9a-f]+: 0082 1250 and v0,v0,a0 +[ 0-9a-f]+: 0082 1250 and v0,v0,a0 +[ 0-9a-f]+: d043 0000 andi v0,v1,0x0 +[ 0-9a-f]+: d043 ffff andi v0,v1,0xffff +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1250 and v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 4280 fffe bc2f [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0023 1250 and v0,v1,at +[ 0-9a-f]+: 4280 fffe bc2f [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4284 fffe bc2f \$cc1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4288 fffe bc2f \$cc2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 428c fffe bc2f \$cc3,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4290 fffe bc2f \$cc4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4294 fffe bc2f \$cc5,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4298 fffe bc2f \$cc6,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 429c fffe bc2f \$cc7,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42a0 fffe bc2t [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42a0 fffe bc2t [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42a4 fffe bc2t \$cc1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42a8 fffe bc2t \$cc2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42ac fffe bc2t \$cc3,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42b0 fffe bc2t \$cc4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42b4 fffe bc2t \$cc5,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42b8 fffe bc2t \$cc6,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42bc fffe bc2t \$cc7,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 42a4 fffe bc2t \$cc1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4288 fffe bc2f \$cc2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0107 3150 addu a2,a3,t0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 428c fffe bc2f \$cc3,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 42b0 fffe bc2t \$cc4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0107 3150 addu a2,a3,t0 + +[0-9a-f]+ : +[ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8e7f beqz a0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8eff beqz a1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8f7f beqz a2,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8fff beqz a3,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8cff beqz s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8e7f beqz a0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8eff beqz a1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8f7f beqz a2,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8fff beqz a3,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8cff beqz s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8e7f beqz a0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8eff beqz a1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8f7f beqz a2,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8fff beqz a3,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8cff beqz s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9410 fffe beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 8cff beqz s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9411 fffe beqz s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 40f1 fffe beqzc s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 9410 fffe beqz s0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 3020 000a li at,10 +[ 0-9a-f]+: 9430 fffe beq s0,at,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 9430 fffe beq s0,at,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 9430 fffe beq s0,at,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 000a li at,10 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 000a li at,10 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 000a li at,10 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 000a li at,10 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9630 fffe beq s0,s1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9411 fffe beqz s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ad7f bnez v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ae7f bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: aeff bnez a1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: af7f bnez a2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: afff bnez a3,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ac7f bnez s0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: acff bnez s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ad7f bnez v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ae7f bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: aeff bnez a1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: af7f bnez a2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: afff bnez a3,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ac7f bnez s0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: acff bnez s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ad7f bnez v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: adff bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ae7f bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: aeff bnez a1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: af7f bnez a2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: afff bnez a3,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ac7f bnez s0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: acff bnez s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: ac7f bnez s0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: b411 fffe bnez s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: b411 fffe bnez s1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 0c00 nop + +[0-9a-f]+ : +[ 0-9a-f]+: 40b1 fffe bnezc s1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2 +[ 0-9a-f]+: 4680 break +[ 0-9a-f]+: 4680 break +[ 0-9a-f]+: 4681 break 0x1 +[ 0-9a-f]+: 4682 break 0x2 +[ 0-9a-f]+: 4683 break 0x3 +[ 0-9a-f]+: 4684 break 0x4 +[ 0-9a-f]+: 4685 break 0x5 +[ 0-9a-f]+: 4686 break 0x6 +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: 4688 break 0x8 +[ 0-9a-f]+: 4689 break 0x9 +[ 0-9a-f]+: 468a break 0xa +[ 0-9a-f]+: 468b break 0xb +[ 0-9a-f]+: 468c break 0xc +[ 0-9a-f]+: 468d break 0xd +[ 0-9a-f]+: 468e break 0xe +[ 0-9a-f]+: 468f break 0xf +[ 0-9a-f]+: 003f 0007 break 0x3f +[ 0-9a-f]+: 0040 0007 break 0x40 +[ 0-9a-f]+: 03ff 0007 break 0x3ff +[ 0-9a-f]+: 03ff ffc7 break 0x3ff,0x3ff +[ 0-9a-f]+: 0000 0007 break +[ 0-9a-f]+: 0000 0007 break +[ 0-9a-f]+: 0001 0007 break 0x1 +[ 0-9a-f]+: 0002 0007 break 0x2 +[ 0-9a-f]+: 000f 0007 break 0xf +[ 0-9a-f]+: 003f 0007 break 0x3f +[ 0-9a-f]+: 0040 0007 break 0x40 +[ 0-9a-f]+: 03ff 0007 break 0x3ff +[ 0-9a-f]+: 03ff ffc7 break 0x3ff,0x3ff +[ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) +[ 0-9a-f]+: 2000 6800 cache 0x0,-2048\(zero\) +[ 0-9a-f]+: 2000 67ff cache 0x0,2047\(zero\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 2002 6000 cache 0x0,0\(v0\) +[ 0-9a-f]+: 2002 6800 cache 0x0,-2048\(v0\) +[ 0-9a-f]+: 2002 67ff cache 0x0,2047\(v0\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) +[ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) +[ 0-9a-f]+: 2020 6000 cache 0x1,0\(zero\) +[ 0-9a-f]+: 2040 6000 cache 0x2,0\(zero\) +[ 0-9a-f]+: 2060 6000 cache 0x3,0\(zero\) +[ 0-9a-f]+: 2080 6000 cache 0x4,0\(zero\) +[ 0-9a-f]+: 20a0 6000 cache 0x5,0\(zero\) +[ 0-9a-f]+: 20c0 6000 cache 0x6,0\(zero\) +[ 0-9a-f]+: 23e0 6000 cache 0x1f,0\(zero\) +[ 0-9a-f]+: 23e0 67ff cache 0x1f,2047\(zero\) +[ 0-9a-f]+: 23e0 6800 cache 0x1f,-2048\(zero\) +[ 0-9a-f]+: 2000 67ff cache 0x0,2047\(zero\) +[ 0-9a-f]+: 2000 6800 cache 0x0,-2048\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) +[ 0-9a-f]+: 23e3 6fff cache 0x1f,-1\(v1\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 23e1 6fff cache 0x1f,-1\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) +[ 0-9a-f]+: 23e0 6fff cache 0x1f,-1\(zero\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 23e1 6fff cache 0x1f,-1\(at\) +[ 0-9a-f]+: 0043 4b3c clo v0,v1 +[ 0-9a-f]+: 0062 4b3c clo v1,v0 +[ 0-9a-f]+: 0043 5b3c clz v0,v1 +[ 0-9a-f]+: 0062 5b3c clz v1,v0 +[ 0-9a-f]+: 0000 e37c deret +[ 0-9a-f]+: 0000 477c di +[ 0-9a-f]+: 0000 477c di +[ 0-9a-f]+: 0002 477c di v0 +[ 0-9a-f]+: 0003 477c di v1 +[ 0-9a-f]+: 001e 477c di s8 +[ 0-9a-f]+: 001f 477c di ra +[ 0-9a-f]+: 0062 ab3c div zero,v0,v1 +[ 0-9a-f]+: 03fe ab3c div zero,s8,ra +[ 0-9a-f]+: 0060 ab3c div zero,zero,v1 +[ 0-9a-f]+: 03e0 ab3c div zero,zero,ra +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: b404 fffe bnez a0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0083 ab3c div zero,v1,a0 +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b424 fffe bne a0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: b423 fffe bne v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 0080 1990 neg v1,a0 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 0024 ab3c div zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 0062 bb3c divu zero,v0,v1 +[ 0-9a-f]+: 03fe bb3c divu zero,s8,ra +[ 0-9a-f]+: 0060 bb3c divu zero,zero,v1 +[ 0-9a-f]+: 03e0 bb3c divu zero,zero,ra +[ 0-9a-f]+: b400 fffe bnez zero,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0003 bb3c divu zero,v1,zero +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: b404 fffe bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0083 bb3c divu zero,v1,a0 +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0024 bb3c divu zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 0024 bb3c divu zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 0000 577c ei +[ 0-9a-f]+: 0000 577c ei +[ 0-9a-f]+: 0002 577c ei v0 +[ 0-9a-f]+: 0003 577c ei v1 +[ 0-9a-f]+: 001e 577c ei s8 +[ 0-9a-f]+: 001f 577c ei ra +[ 0-9a-f]+: 0000 f37c eret +[ 0-9a-f]+: 0043 716c ext v0,v1,0x5,0xf +[ 0-9a-f]+: 0043 f82c ext v0,v1,0x0,0x20 +[ 0-9a-f]+: 0043 07ec ext v0,v1,0x1f,0x1 +[ 0-9a-f]+: 03fe 07ec ext ra,s8,0x1f,0x1 +[ 0-9a-f]+: 0043 994c ins v0,v1,0x5,0xf +[ 0-9a-f]+: 0043 f80c ins v0,v1,0x0,0x20 +[ 0-9a-f]+: 0043 ffcc ins v0,v1,0x1f,0x1 +[ 0-9a-f]+: 4580 jr zero +[ 0-9a-f]+: 03fe ffcc ins ra,s8,0x1f,0x1 +[ 0-9a-f]+: 4582 jr v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4583 jr v1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4584 jr a0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4585 jr a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4586 jr a2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4587 jr a3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4588 jr t0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 459e jr s8 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 459f jr ra +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0000 0f3c jr zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0002 0f3c jr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0003 0f3c jr v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0004 0f3c jr a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0005 0f3c jr a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0006 0f3c jr a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0007 0f3c jr a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0008 0f3c jr t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 001e 0f3c jr s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 001f 0f3c jr ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45a0 jrc zero +[ 0-9a-f]+: 45a2 jrc v0 +[ 0-9a-f]+: 45a3 jrc v1 +[ 0-9a-f]+: 45a4 jrc a0 +[ 0-9a-f]+: 45a5 jrc a1 +[ 0-9a-f]+: 45a6 jrc a2 +[ 0-9a-f]+: 45a7 jrc a3 +[ 0-9a-f]+: 45a8 jrc t0 +[ 0-9a-f]+: 45be jrc s8 +[ 0-9a-f]+: 45bf jrc ra +[ 0-9a-f]+: 0000 1f3c jr\.hb zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0002 1f3c jr\.hb v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0003 1f3c jr\.hb v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0004 1f3c jr\.hb a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0005 1f3c jr\.hb a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0006 1f3c jr\.hb a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0007 1f3c jr\.hb a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0008 1f3c jr\.hb t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 001e 1f3c jr\.hb s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 001f 1f3c jr\.hb ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4580 jr zero +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4582 jr v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4583 jr v1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4584 jr a0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4585 jr a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4586 jr a2 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4587 jr a3 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4588 jr t0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 459e jr s8 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 459f jr ra +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 45c0 jalr zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c2 jalr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c3 jalr v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c4 jalr a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c5 jalr a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c6 jalr a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c7 jalr a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c8 jalr t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45de jalr s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e0 0f3c jalr zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e2 0f3c jalr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e3 0f3c jalr v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e4 0f3c jalr a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e5 0f3c jalr a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e6 0f3c jalr a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e7 0f3c jalr a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e8 0f3c jalr t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03fe 0f3c jalr s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c0 jalr zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c2 jalr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c3 jalr v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c4 jalr a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c5 jalr a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c6 jalr a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c7 jalr a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c8 jalr t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45de jalr s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03df 0f3c jalr s8,ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0040 0f3c jalr v0,zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0062 0f3c jalr v1,v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0043 0f3c jalr v0,v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0044 0f3c jalr v0,a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0045 0f3c jalr v0,a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0046 0f3c jalr v0,a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0047 0f3c jalr v0,a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0048 0f3c jalr v0,t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 005e 0f3c jalr v0,s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 005f 0f3c jalr v0,ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e0 1f3c jalr\.hb zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e2 1f3c jalr\.hb v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e3 1f3c jalr\.hb v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e4 1f3c jalr\.hb a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e5 1f3c jalr\.hb a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e6 1f3c jalr\.hb a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e7 1f3c jalr\.hb a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e8 1f3c jalr\.hb t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03fe 1f3c jalr\.hb s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e0 1f3c jalr\.hb zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e2 1f3c jalr\.hb v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e3 1f3c jalr\.hb v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e4 1f3c jalr\.hb a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e5 1f3c jalr\.hb a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e6 1f3c jalr\.hb a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e7 1f3c jalr\.hb a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e8 1f3c jalr\.hb t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03fe 1f3c jalr\.hb s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03df 1f3c jalr\.hb s8,ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0040 1f3c jalr\.hb v0,zero +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0062 1f3c jalr\.hb v1,v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0043 1f3c jalr\.hb v0,v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0044 1f3c jalr\.hb v0,a0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0045 1f3c jalr\.hb v0,a1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0046 1f3c jalr\.hb v0,a2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0047 1f3c jalr\.hb v0,a3 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0048 1f3c jalr\.hb v0,t0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 005e 1f3c jalr\.hb v0,s8 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 005f 1f3c jalr\.hb v0,ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0043 0f3c jalr v0,v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03df 0f3c jalr s8,ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c3 jalr v1 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45df jalr ra +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: f400 0000 jal [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: f400 0000 jal [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: f000 0000 jalx [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: f000 0000 jalx [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test2 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 41a2 0000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 test +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 41a2 0000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 test +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 1c60 0000 lb v1,0\(zero\) +[ 0-9a-f]+: 1c60 0004 lb v1,4\(zero\) +[ 0-9a-f]+: 1c60 0000 lb v1,0\(zero\) +[ 0-9a-f]+: 1c60 0004 lb v1,4\(zero\) +[ 0-9a-f]+: 1c60 7fff lb v1,32767\(zero\) +[ 0-9a-f]+: 1c60 8000 lb v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 1c63 ffff lb v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\) +[ 0-9a-f]+: 1c60 8000 lb v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 1c63 0001 lb v1,1\(v1\) +[ 0-9a-f]+: 1c60 8001 lb v1,-32767\(zero\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\) +[ 0-9a-f]+: 1c60 ffff lb v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 1c63 5678 lb v1,22136\(v1\) +[ 0-9a-f]+: 1c64 0000 lb v1,0\(a0\) +[ 0-9a-f]+: 1c64 0000 lb v1,0\(a0\) +[ 0-9a-f]+: 1c64 0004 lb v1,4\(a0\) +[ 0-9a-f]+: 1c64 7fff lb v1,32767\(a0\) +[ 0-9a-f]+: 1c64 8000 lb v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1c63 ffff lb v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\) +[ 0-9a-f]+: 1c64 8000 lb v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1c63 0001 lb v1,1\(v1\) +[ 0-9a-f]+: 1c64 8001 lb v1,-32767\(a0\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\) +[ 0-9a-f]+: 1c64 ffff lb v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1c63 5678 lb v1,22136\(v1\) +[ 0-9a-f]+: 093f lbu v0,-1\(v1\) +[ 0-9a-f]+: 0930 lbu v0,0\(v1\) +[ 0-9a-f]+: 0930 lbu v0,0\(v1\) +[ 0-9a-f]+: 0931 lbu v0,1\(v1\) +[ 0-9a-f]+: 0932 lbu v0,2\(v1\) +[ 0-9a-f]+: 0933 lbu v0,3\(v1\) +[ 0-9a-f]+: 0934 lbu v0,4\(v1\) +[ 0-9a-f]+: 0935 lbu v0,5\(v1\) +[ 0-9a-f]+: 0936 lbu v0,6\(v1\) +[ 0-9a-f]+: 0937 lbu v0,7\(v1\) +[ 0-9a-f]+: 0938 lbu v0,8\(v1\) +[ 0-9a-f]+: 0939 lbu v0,9\(v1\) +[ 0-9a-f]+: 093a lbu v0,10\(v1\) +[ 0-9a-f]+: 093b lbu v0,11\(v1\) +[ 0-9a-f]+: 093c lbu v0,12\(v1\) +[ 0-9a-f]+: 093d lbu v0,13\(v1\) +[ 0-9a-f]+: 093e lbu v0,14\(v1\) +[ 0-9a-f]+: 092e lbu v0,14\(v0\) +[ 0-9a-f]+: 094e lbu v0,14\(a0\) +[ 0-9a-f]+: 095e lbu v0,14\(a1\) +[ 0-9a-f]+: 096e lbu v0,14\(a2\) +[ 0-9a-f]+: 097e lbu v0,14\(a3\) +[ 0-9a-f]+: 090e lbu v0,14\(s0\) +[ 0-9a-f]+: 091e lbu v0,14\(s1\) +[ 0-9a-f]+: 099e lbu v1,14\(s1\) +[ 0-9a-f]+: 0a1e lbu a0,14\(s1\) +[ 0-9a-f]+: 0a9e lbu a1,14\(s1\) +[ 0-9a-f]+: 0b1e lbu a2,14\(s1\) +[ 0-9a-f]+: 0b9e lbu a3,14\(s1\) +[ 0-9a-f]+: 081e lbu s0,14\(s1\) +[ 0-9a-f]+: 089e lbu s1,14\(s1\) +[ 0-9a-f]+: 1460 0000 lbu v1,0\(zero\) +[ 0-9a-f]+: 1460 0004 lbu v1,4\(zero\) +[ 0-9a-f]+: 1460 0000 lbu v1,0\(zero\) +[ 0-9a-f]+: 1460 0004 lbu v1,4\(zero\) +[ 0-9a-f]+: 1460 7fff lbu v1,32767\(zero\) +[ 0-9a-f]+: 1460 8000 lbu v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 1463 ffff lbu v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\) +[ 0-9a-f]+: 1460 8000 lbu v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 1463 0001 lbu v1,1\(v1\) +[ 0-9a-f]+: 1460 8001 lbu v1,-32767\(zero\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\) +[ 0-9a-f]+: 1460 ffff lbu v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 1463 5678 lbu v1,22136\(v1\) +[ 0-9a-f]+: 09c0 lbu v1,0\(a0\) +[ 0-9a-f]+: 09c0 lbu v1,0\(a0\) +[ 0-9a-f]+: 09c4 lbu v1,4\(a0\) +[ 0-9a-f]+: 1464 7fff lbu v1,32767\(a0\) +[ 0-9a-f]+: 1464 8000 lbu v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1463 ffff lbu v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\) +[ 0-9a-f]+: 1464 8000 lbu v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1463 0001 lbu v1,1\(v1\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\) +[ 0-9a-f]+: 1464 ffff lbu v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 1463 5678 lbu v1,22136\(v1\) +[ 0-9a-f]+: 3c60 0000 lh v1,0\(zero\) +[ 0-9a-f]+: 3c60 0004 lh v1,4\(zero\) +[ 0-9a-f]+: 3c60 0000 lh v1,0\(zero\) +[ 0-9a-f]+: 3c60 0004 lh v1,4\(zero\) +[ 0-9a-f]+: 3c60 7fff lh v1,32767\(zero\) +[ 0-9a-f]+: 3c60 8000 lh v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 3c63 ffff lh v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\) +[ 0-9a-f]+: 3c60 8000 lh v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 3c63 0001 lh v1,1\(v1\) +[ 0-9a-f]+: 3c60 8001 lh v1,-32767\(zero\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\) +[ 0-9a-f]+: 3c60 ffff lh v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 3c63 5678 lh v1,22136\(v1\) +[ 0-9a-f]+: 3c64 0000 lh v1,0\(a0\) +[ 0-9a-f]+: 3c64 0000 lh v1,0\(a0\) +[ 0-9a-f]+: 3c64 0004 lh v1,4\(a0\) +[ 0-9a-f]+: 3c64 7fff lh v1,32767\(a0\) +[ 0-9a-f]+: 3c64 8000 lh v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3c63 ffff lh v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\) +[ 0-9a-f]+: 3c64 8000 lh v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3c63 0001 lh v1,1\(v1\) +[ 0-9a-f]+: 3c64 8001 lh v1,-32767\(a0\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\) +[ 0-9a-f]+: 3c64 ffff lh v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3c63 5678 lh v1,22136\(v1\) +[ 0-9a-f]+: 2930 lhu v0,0\(v1\) +[ 0-9a-f]+: 2930 lhu v0,0\(v1\) +[ 0-9a-f]+: 2931 lhu v0,2\(v1\) +[ 0-9a-f]+: 2932 lhu v0,4\(v1\) +[ 0-9a-f]+: 2933 lhu v0,6\(v1\) +[ 0-9a-f]+: 2934 lhu v0,8\(v1\) +[ 0-9a-f]+: 2935 lhu v0,10\(v1\) +[ 0-9a-f]+: 2936 lhu v0,12\(v1\) +[ 0-9a-f]+: 2937 lhu v0,14\(v1\) +[ 0-9a-f]+: 2938 lhu v0,16\(v1\) +[ 0-9a-f]+: 2939 lhu v0,18\(v1\) +[ 0-9a-f]+: 293a lhu v0,20\(v1\) +[ 0-9a-f]+: 293b lhu v0,22\(v1\) +[ 0-9a-f]+: 293c lhu v0,24\(v1\) +[ 0-9a-f]+: 293d lhu v0,26\(v1\) +[ 0-9a-f]+: 293e lhu v0,28\(v1\) +[ 0-9a-f]+: 293f lhu v0,30\(v1\) +[ 0-9a-f]+: 294f lhu v0,30\(a0\) +[ 0-9a-f]+: 295f lhu v0,30\(a1\) +[ 0-9a-f]+: 296f lhu v0,30\(a2\) +[ 0-9a-f]+: 297f lhu v0,30\(a3\) +[ 0-9a-f]+: 292f lhu v0,30\(v0\) +[ 0-9a-f]+: 290f lhu v0,30\(s0\) +[ 0-9a-f]+: 291f lhu v0,30\(s1\) +[ 0-9a-f]+: 299f lhu v1,30\(s1\) +[ 0-9a-f]+: 2a1f lhu a0,30\(s1\) +[ 0-9a-f]+: 2a9f lhu a1,30\(s1\) +[ 0-9a-f]+: 2b1f lhu a2,30\(s1\) +[ 0-9a-f]+: 2b9f lhu a3,30\(s1\) +[ 0-9a-f]+: 281f lhu s0,30\(s1\) +[ 0-9a-f]+: 289f lhu s1,30\(s1\) +[ 0-9a-f]+: 3460 0000 lhu v1,0\(zero\) +[ 0-9a-f]+: 3460 0004 lhu v1,4\(zero\) +[ 0-9a-f]+: 3460 0000 lhu v1,0\(zero\) +[ 0-9a-f]+: 3460 0004 lhu v1,4\(zero\) +[ 0-9a-f]+: 3460 7fff lhu v1,32767\(zero\) +[ 0-9a-f]+: 3460 8000 lhu v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 3463 ffff lhu v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\) +[ 0-9a-f]+: 3460 8000 lhu v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 3463 0001 lhu v1,1\(v1\) +[ 0-9a-f]+: 3460 8001 lhu v1,-32767\(zero\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\) +[ 0-9a-f]+: 3460 ffff lhu v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 3463 5678 lhu v1,22136\(v1\) +[ 0-9a-f]+: 29c0 lhu v1,0\(a0\) +[ 0-9a-f]+: 29c0 lhu v1,0\(a0\) +[ 0-9a-f]+: 29c2 lhu v1,4\(a0\) +[ 0-9a-f]+: 3464 7fff lhu v1,32767\(a0\) +[ 0-9a-f]+: 3464 8000 lhu v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3463 ffff lhu v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\) +[ 0-9a-f]+: 3464 8000 lhu v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3463 0001 lhu v1,1\(v1\) +[ 0-9a-f]+: 3464 8001 lhu v1,-32767\(a0\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\) +[ 0-9a-f]+: 3464 ffff lhu v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3463 5678 lhu v1,22136\(v1\) +[ 0-9a-f]+: 6060 3000 ll v1,0\(zero\) +[ 0-9a-f]+: 6060 3000 ll v1,0\(zero\) +[ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) +[ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) +[ 0-9a-f]+: 5060 8000 li v1,0x8000 +[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 6060 3fff ll v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 5063 5000 ori v1,v1,0x5000 +[ 0-9a-f]+: 6063 3678 ll v1,1656\(v1\) +[ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) +[ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) +[ 0-9a-f]+: 6064 3004 ll v1,4\(a0\) +[ 0-9a-f]+: 5060 8000 li v1,0x8000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 6064 3fff ll v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 5063 5000 ori v1,v1,0x5000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 6063 3678 ll v1,1656\(v1\) +[ 0-9a-f]+: 41a3 0000 lui v1,0x0 +[ 0-9a-f]+: 41a3 7fff lui v1,0x7fff +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 6940 lw v0,0\(a0\) +[ 0-9a-f]+: 6940 lw v0,0\(a0\) +[ 0-9a-f]+: 6941 lw v0,4\(a0\) +[ 0-9a-f]+: 6942 lw v0,8\(a0\) +[ 0-9a-f]+: 6943 lw v0,12\(a0\) +[ 0-9a-f]+: 6944 lw v0,16\(a0\) +[ 0-9a-f]+: 6945 lw v0,20\(a0\) +[ 0-9a-f]+: 6946 lw v0,24\(a0\) +[ 0-9a-f]+: 6947 lw v0,28\(a0\) +[ 0-9a-f]+: 6948 lw v0,32\(a0\) +[ 0-9a-f]+: 6949 lw v0,36\(a0\) +[ 0-9a-f]+: 694a lw v0,40\(a0\) +[ 0-9a-f]+: 694b lw v0,44\(a0\) +[ 0-9a-f]+: 694c lw v0,48\(a0\) +[ 0-9a-f]+: 694d lw v0,52\(a0\) +[ 0-9a-f]+: 694e lw v0,56\(a0\) +[ 0-9a-f]+: 694f lw v0,60\(a0\) +[ 0-9a-f]+: 695f lw v0,60\(a1\) +[ 0-9a-f]+: 696f lw v0,60\(a2\) +[ 0-9a-f]+: 697f lw v0,60\(a3\) +[ 0-9a-f]+: 692f lw v0,60\(v0\) +[ 0-9a-f]+: 693f lw v0,60\(v1\) +[ 0-9a-f]+: 690f lw v0,60\(s0\) +[ 0-9a-f]+: 691f lw v0,60\(s1\) +[ 0-9a-f]+: 699f lw v1,60\(s1\) +[ 0-9a-f]+: 6a1f lw a0,60\(s1\) +[ 0-9a-f]+: 6a9f lw a1,60\(s1\) +[ 0-9a-f]+: 6b1f lw a2,60\(s1\) +[ 0-9a-f]+: 6b9f lw a3,60\(s1\) +[ 0-9a-f]+: 681f lw s0,60\(s1\) +[ 0-9a-f]+: 689f lw s1,60\(s1\) +[ 0-9a-f]+: 4880 lw a0,0\(sp\) +[ 0-9a-f]+: 4880 lw a0,0\(sp\) +[ 0-9a-f]+: 4881 lw a0,4\(sp\) +[ 0-9a-f]+: 4882 lw a0,8\(sp\) +[ 0-9a-f]+: 4883 lw a0,12\(sp\) +[ 0-9a-f]+: 4884 lw a0,16\(sp\) +[ 0-9a-f]+: 4885 lw a0,20\(sp\) +[ 0-9a-f]+: 489f lw a0,124\(sp\) +[ 0-9a-f]+: 485f lw v0,124\(sp\) +[ 0-9a-f]+: 485f lw v0,124\(sp\) +[ 0-9a-f]+: 487f lw v1,124\(sp\) +[ 0-9a-f]+: 489f lw a0,124\(sp\) +[ 0-9a-f]+: 48bf lw a1,124\(sp\) +[ 0-9a-f]+: 48df lw a2,124\(sp\) +[ 0-9a-f]+: 48ff lw a3,124\(sp\) +[ 0-9a-f]+: 491f lw t0,124\(sp\) +[ 0-9a-f]+: 493f lw t1,124\(sp\) +[ 0-9a-f]+: 495f lw t2,124\(sp\) +[ 0-9a-f]+: 4bdf lw s8,124\(sp\) +[ 0-9a-f]+: 4bff lw ra,124\(sp\) +[ 0-9a-f]+: fc9d 01f8 lw a0,504\(sp\) +[ 0-9a-f]+: fc9d 01fc lw a0,508\(sp\) +[ 0-9a-f]+: fe1d 01fc lw s0,508\(sp\) +[ 0-9a-f]+: fe3d 01fc lw s1,508\(sp\) +[ 0-9a-f]+: fe5d 01fc lw s2,508\(sp\) +[ 0-9a-f]+: fe7d 01fc lw s3,508\(sp\) +[ 0-9a-f]+: fe9d 01fc lw s4,508\(sp\) +[ 0-9a-f]+: febd 01fc lw s5,508\(sp\) +[ 0-9a-f]+: fffd 01fc lw ra,508\(sp\) +[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\) +[ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) +[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\) +[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\) +[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\) +[ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) +[ 0-9a-f]+: fc60 7fff lw v1,32767\(zero\) +[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: fc63 ffff lw v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\) +[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: fc63 0001 lw v1,1\(v1\) +[ 0-9a-f]+: fc60 8001 lw v1,-32767\(zero\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\) +[ 0-9a-f]+: fc60 ffff lw v1,-1\(zero\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: fc63 5678 lw v1,22136\(v1\) +[ 0-9a-f]+: 69c0 lw v1,0\(a0\) +[ 0-9a-f]+: 69c0 lw v1,0\(a0\) +[ 0-9a-f]+: 69c1 lw v1,4\(a0\) +[ 0-9a-f]+: fc64 7fff lw v1,32767\(a0\) +[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: fc63 ffff lw v1,-1\(v1\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\) +[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) +[ 0-9a-f]+: 41a3 ffff lui v1,0xffff +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: fc63 0001 lw v1,1\(v1\) +[ 0-9a-f]+: fc64 8001 lw v1,-32767\(a0\) +[ 0-9a-f]+: 41a3 f000 lui v1,0xf000 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\) +[ 0-9a-f]+: fc64 ffff lw v1,-1\(a0\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: fc63 5678 lw v1,22136\(v1\) +[ 0-9a-f]+: 450c lwm s0,ra,48\(sp\) +[ 0-9a-f]+: 451c lwm s0-s1,ra,48\(sp\) +[ 0-9a-f]+: 451c lwm s0-s1,ra,48\(sp\) +[ 0-9a-f]+: 452c lwm s0-s2,ra,48\(sp\) +[ 0-9a-f]+: 452c lwm s0-s2,ra,48\(sp\) +[ 0-9a-f]+: 453c lwm s0-s3,ra,48\(sp\) +[ 0-9a-f]+: 453c lwm s0-s3,ra,48\(sp\) +[ 0-9a-f]+: 4500 lwm s0,ra,0\(sp\) +[ 0-9a-f]+: 4500 lwm s0,ra,0\(sp\) +[ 0-9a-f]+: 4501 lwm s0,ra,4\(sp\) +[ 0-9a-f]+: 4502 lwm s0,ra,8\(sp\) +[ 0-9a-f]+: 4503 lwm s0,ra,12\(sp\) +[ 0-9a-f]+: 4504 lwm s0,ra,16\(sp\) +[ 0-9a-f]+: 4505 lwm s0,ra,20\(sp\) +[ 0-9a-f]+: 4506 lwm s0,ra,24\(sp\) +[ 0-9a-f]+: 4507 lwm s0,ra,28\(sp\) +[ 0-9a-f]+: 4508 lwm s0,ra,32\(sp\) +[ 0-9a-f]+: 4509 lwm s0,ra,36\(sp\) +[ 0-9a-f]+: 450a lwm s0,ra,40\(sp\) +[ 0-9a-f]+: 450b lwm s0,ra,44\(sp\) +[ 0-9a-f]+: 450c lwm s0,ra,48\(sp\) +[ 0-9a-f]+: 450d lwm s0,ra,52\(sp\) +[ 0-9a-f]+: 450e lwm s0,ra,56\(sp\) +[ 0-9a-f]+: 450f lwm s0,ra,60\(sp\) +[ 0-9a-f]+: 2020 5000 lwm s0,0\(zero\) +[ 0-9a-f]+: 2020 5004 lwm s0,4\(zero\) +[ 0-9a-f]+: 2025 5000 lwm s0,0\(a1\) +[ 0-9a-f]+: 2025 57ff lwm s0,2047\(a1\) +[ 0-9a-f]+: 2045 57ff lwm s0-s1,2047\(a1\) +[ 0-9a-f]+: 2065 57ff lwm s0-s2,2047\(a1\) +[ 0-9a-f]+: 2085 57ff lwm s0-s3,2047\(a1\) +[ 0-9a-f]+: 20a5 57ff lwm s0-s4,2047\(a1\) +[ 0-9a-f]+: 20c5 57ff lwm s0-s5,2047\(a1\) +[ 0-9a-f]+: 20e5 57ff lwm s0-s6,2047\(a1\) +[ 0-9a-f]+: 2105 57ff lwm s0-s7,2047\(a1\) +[ 0-9a-f]+: 2125 57ff lwm s0-s7,s8,2047\(a1\) +[ 0-9a-f]+: 2205 57ff lwm ra,2047\(a1\) +[ 0-9a-f]+: 2225 5000 lwm s0,ra,0\(a1\) +[ 0-9a-f]+: 2245 5000 lwm s0-s1,ra,0\(a1\) +[ 0-9a-f]+: 2265 5000 lwm s0-s2,ra,0\(a1\) +[ 0-9a-f]+: 2285 5000 lwm s0-s3,ra,0\(a1\) +[ 0-9a-f]+: 22a5 5000 lwm s0-s4,ra,0\(a1\) +[ 0-9a-f]+: 22c5 5000 lwm s0-s5,ra,0\(a1\) +[ 0-9a-f]+: 22e5 5000 lwm s0-s6,ra,0\(a1\) +[ 0-9a-f]+: 2305 5000 lwm s0-s7,ra,0\(a1\) +[ 0-9a-f]+: 2325 5000 lwm s0-s7,s8,ra,0\(a1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 2020 5000 lwm s0,0\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 203d 5000 lwm s0,0\(sp\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 2040 1000 lwp v0,0\(zero\) +[ 0-9a-f]+: 2040 1004 lwp v0,4\(zero\) +[ 0-9a-f]+: 205d 1000 lwp v0,0\(sp\) +[ 0-9a-f]+: 205d 1000 lwp v0,0\(sp\) +[ 0-9a-f]+: 2043 1800 lwp v0,-2048\(v1\) +[ 0-9a-f]+: 2043 17ff lwp v0,2047\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) +[ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) +[ 0-9a-f]+: 5060 8000 li v1,0x8000 +[ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) +[ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 0678 lwl v1,1656\(at\) +[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) +[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) +[ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) +[ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6064 0fff lwl v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0678 lwl v1,1656\(at\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) +[ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 0678 lwl v1,1656\(at\) +[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) +[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) +[ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) +[ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6064 0fff lwl v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0678 lwl v1,1656\(at\) +[ 0-9a-f]+: 6060 1004 lwr v1,4\(zero\) +[ 0-9a-f]+: 6060 1004 lwr v1,4\(zero\) +[ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) +[ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) +[ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) +[ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 1678 lwr v1,1656\(at\) +[ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) +[ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) +[ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) +[ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 6064 1fff lwr v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1678 lwr v1,1656\(at\) +[ 0-9a-f]+: 6060 1004 lwr v1,4\(zero\) +[ 0-9a-f]+: 6060 1004 lwr v1,4\(zero\) +[ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) +[ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) +[ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) +[ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 1678 lwr v1,1656\(at\) +[ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) +[ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) +[ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) +[ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 6064 1fff lwr v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 1678 lwr v1,1656\(at\) +[ 0-9a-f]+: 0085 1918 lwxs v1,a0\(a1\) +[ 0-9a-f]+: 00a4 cb3c madd a0,a1 +[ 0-9a-f]+: 00a4 db3c maddu a0,a1 +[ 0-9a-f]+: 0040 00fc mfc0 v0,c0_index +[ 0-9a-f]+: 0041 00fc mfc0 v0,c0_random +[ 0-9a-f]+: 0042 00fc mfc0 v0,c0_entrylo0 +[ 0-9a-f]+: 0043 00fc mfc0 v0,c0_entrylo1 +[ 0-9a-f]+: 0044 00fc mfc0 v0,c0_context +[ 0-9a-f]+: 0045 00fc mfc0 v0,c0_pagemask +[ 0-9a-f]+: 0046 00fc mfc0 v0,c0_wired +[ 0-9a-f]+: 0047 00fc mfc0 v0,c0_hwrena +[ 0-9a-f]+: 0048 00fc mfc0 v0,c0_badvaddr +[ 0-9a-f]+: 0049 00fc mfc0 v0,c0_count +[ 0-9a-f]+: 004a 00fc mfc0 v0,c0_entryhi +[ 0-9a-f]+: 004b 00fc mfc0 v0,c0_compare +[ 0-9a-f]+: 004c 00fc mfc0 v0,c0_status +[ 0-9a-f]+: 004d 00fc mfc0 v0,c0_cause +[ 0-9a-f]+: 004e 00fc mfc0 v0,c0_epc +[ 0-9a-f]+: 004f 00fc mfc0 v0,c0_prid +[ 0-9a-f]+: 0050 00fc mfc0 v0,c0_config +[ 0-9a-f]+: 0051 00fc mfc0 v0,c0_lladdr +[ 0-9a-f]+: 0052 00fc mfc0 v0,c0_watchlo +[ 0-9a-f]+: 0053 00fc mfc0 v0,c0_watchhi +[ 0-9a-f]+: 0054 00fc mfc0 v0,c0_xcontext +[ 0-9a-f]+: 0055 00fc mfc0 v0,\$21 +[ 0-9a-f]+: 0056 00fc mfc0 v0,\$22 +[ 0-9a-f]+: 0057 00fc mfc0 v0,c0_debug +[ 0-9a-f]+: 0058 00fc mfc0 v0,c0_depc +[ 0-9a-f]+: 0059 00fc mfc0 v0,c0_perfcnt +[ 0-9a-f]+: 005a 00fc mfc0 v0,c0_errctl +[ 0-9a-f]+: 005b 00fc mfc0 v0,c0_cacheerr +[ 0-9a-f]+: 005c 00fc mfc0 v0,c0_taglo +[ 0-9a-f]+: 005d 00fc mfc0 v0,c0_taghi +[ 0-9a-f]+: 005e 00fc mfc0 v0,c0_errorepc +[ 0-9a-f]+: 005f 00fc mfc0 v0,c0_desave +[ 0-9a-f]+: 0040 00fc mfc0 v0,c0_index +[ 0-9a-f]+: 0040 08fc mfc0 v0,c0_mvpcontrol +[ 0-9a-f]+: 0040 10fc mfc0 v0,c0_mvpconf0 +[ 0-9a-f]+: 0040 18fc mfc0 v0,c0_mvpconf1 +[ 0-9a-f]+: 0040 20fc mfc0 v0,\$0,4 +[ 0-9a-f]+: 0040 28fc mfc0 v0,\$0,5 +[ 0-9a-f]+: 0040 30fc mfc0 v0,\$0,6 +[ 0-9a-f]+: 0040 38fc mfc0 v0,\$0,7 +[ 0-9a-f]+: 0041 00fc mfc0 v0,c0_random +[ 0-9a-f]+: 0041 08fc mfc0 v0,c0_vpecontrol +[ 0-9a-f]+: 0041 10fc mfc0 v0,c0_vpeconf0 +[ 0-9a-f]+: 0041 18fc mfc0 v0,c0_vpeconf1 +[ 0-9a-f]+: 0041 20fc mfc0 v0,c0_yqmask +[ 0-9a-f]+: 0041 28fc mfc0 v0,c0_vpeschedule +[ 0-9a-f]+: 0041 30fc mfc0 v0,c0_vpeschefback +[ 0-9a-f]+: 0041 38fc mfc0 v0,\$1,7 +[ 0-9a-f]+: 0042 00fc mfc0 v0,c0_entrylo0 +[ 0-9a-f]+: 0042 08fc mfc0 v0,c0_tcstatus +[ 0-9a-f]+: 0042 10fc mfc0 v0,c0_tcbind +[ 0-9a-f]+: 0042 18fc mfc0 v0,c0_tcrestart +[ 0-9a-f]+: 0042 20fc mfc0 v0,c0_tchalt +[ 0-9a-f]+: 0042 28fc mfc0 v0,c0_tccontext +[ 0-9a-f]+: 0042 30fc mfc0 v0,c0_tcschedule +[ 0-9a-f]+: 0042 38fc mfc0 v0,c0_tcschefback +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 4602 mfhi v0 +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 4604 mfhi a0 +[ 0-9a-f]+: 461d mfhi sp +[ 0-9a-f]+: 461e mfhi s8 +[ 0-9a-f]+: 461f mfhi ra +[ 0-9a-f]+: 0000 0d7c mfhi zero +[ 0-9a-f]+: 0002 0d7c mfhi v0 +[ 0-9a-f]+: 0003 0d7c mfhi v1 +[ 0-9a-f]+: 0004 0d7c mfhi a0 +[ 0-9a-f]+: 001d 0d7c mfhi sp +[ 0-9a-f]+: 001e 0d7c mfhi s8 +[ 0-9a-f]+: 001f 0d7c mfhi ra +[ 0-9a-f]+: 4640 mflo zero +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 4644 mflo a0 +[ 0-9a-f]+: 465d mflo sp +[ 0-9a-f]+: 465e mflo s8 +[ 0-9a-f]+: 465f mflo ra +[ 0-9a-f]+: 0000 1d7c mflo zero +[ 0-9a-f]+: 0002 1d7c mflo v0 +[ 0-9a-f]+: 0003 1d7c mflo v1 +[ 0-9a-f]+: 0004 1d7c mflo a0 +[ 0-9a-f]+: 001d 1d7c mflo sp +[ 0-9a-f]+: 001e 1d7c mflo s8 +[ 0-9a-f]+: 001f 1d7c mflo ra +[ 0-9a-f]+: 0062 1018 movn v0,v0,v1 +[ 0-9a-f]+: 0062 1018 movn v0,v0,v1 +[ 0-9a-f]+: 0083 1018 movn v0,v1,a0 +[ 0-9a-f]+: 0062 1058 movz v0,v0,v1 +[ 0-9a-f]+: 0062 1058 movz v0,v0,v1 +[ 0-9a-f]+: 0083 1058 movz v0,v1,a0 +[ 0-9a-f]+: 00a4 eb3c msub a0,a1 +[ 0-9a-f]+: 00a4 fb3c msubu a0,a1 +[ 0-9a-f]+: 0040 02fc mtc0 v0,c0_index +[ 0-9a-f]+: 0041 02fc mtc0 v0,c0_random +[ 0-9a-f]+: 0042 02fc mtc0 v0,c0_entrylo0 +[ 0-9a-f]+: 0043 02fc mtc0 v0,c0_entrylo1 +[ 0-9a-f]+: 0044 02fc mtc0 v0,c0_context +[ 0-9a-f]+: 0045 02fc mtc0 v0,c0_pagemask +[ 0-9a-f]+: 0046 02fc mtc0 v0,c0_wired +[ 0-9a-f]+: 0047 02fc mtc0 v0,c0_hwrena +[ 0-9a-f]+: 0048 02fc mtc0 v0,c0_badvaddr +[ 0-9a-f]+: 0049 02fc mtc0 v0,c0_count +[ 0-9a-f]+: 004a 02fc mtc0 v0,c0_entryhi +[ 0-9a-f]+: 004b 02fc mtc0 v0,c0_compare +[ 0-9a-f]+: 004c 02fc mtc0 v0,c0_status +[ 0-9a-f]+: 004d 02fc mtc0 v0,c0_cause +[ 0-9a-f]+: 004e 02fc mtc0 v0,c0_epc +[ 0-9a-f]+: 004f 02fc mtc0 v0,c0_prid +[ 0-9a-f]+: 0050 02fc mtc0 v0,c0_config +[ 0-9a-f]+: 0051 02fc mtc0 v0,c0_lladdr +[ 0-9a-f]+: 0052 02fc mtc0 v0,c0_watchlo +[ 0-9a-f]+: 0053 02fc mtc0 v0,c0_watchhi +[ 0-9a-f]+: 0054 02fc mtc0 v0,c0_xcontext +[ 0-9a-f]+: 0055 02fc mtc0 v0,\$21 +[ 0-9a-f]+: 0056 02fc mtc0 v0,\$22 +[ 0-9a-f]+: 0057 02fc mtc0 v0,c0_debug +[ 0-9a-f]+: 0058 02fc mtc0 v0,c0_depc +[ 0-9a-f]+: 0059 02fc mtc0 v0,c0_perfcnt +[ 0-9a-f]+: 005a 02fc mtc0 v0,c0_errctl +[ 0-9a-f]+: 005b 02fc mtc0 v0,c0_cacheerr +[ 0-9a-f]+: 005c 02fc mtc0 v0,c0_taglo +[ 0-9a-f]+: 005d 02fc mtc0 v0,c0_taghi +[ 0-9a-f]+: 005e 02fc mtc0 v0,c0_errorepc +[ 0-9a-f]+: 005f 02fc mtc0 v0,c0_desave +[ 0-9a-f]+: 0040 02fc mtc0 v0,c0_index +[ 0-9a-f]+: 0040 0afc mtc0 v0,c0_mvpcontrol +[ 0-9a-f]+: 0040 12fc mtc0 v0,c0_mvpconf0 +[ 0-9a-f]+: 0040 1afc mtc0 v0,c0_mvpconf1 +[ 0-9a-f]+: 0040 22fc mtc0 v0,\$0,4 +[ 0-9a-f]+: 0040 2afc mtc0 v0,\$0,5 +[ 0-9a-f]+: 0040 32fc mtc0 v0,\$0,6 +[ 0-9a-f]+: 0040 3afc mtc0 v0,\$0,7 +[ 0-9a-f]+: 0041 02fc mtc0 v0,c0_random +[ 0-9a-f]+: 0041 0afc mtc0 v0,c0_vpecontrol +[ 0-9a-f]+: 0041 12fc mtc0 v0,c0_vpeconf0 +[ 0-9a-f]+: 0041 1afc mtc0 v0,c0_vpeconf1 +[ 0-9a-f]+: 0041 22fc mtc0 v0,c0_yqmask +[ 0-9a-f]+: 0041 2afc mtc0 v0,c0_vpeschedule +[ 0-9a-f]+: 0041 32fc mtc0 v0,c0_vpeschefback +[ 0-9a-f]+: 0041 3afc mtc0 v0,\$1,7 +[ 0-9a-f]+: 0042 02fc mtc0 v0,c0_entrylo0 +[ 0-9a-f]+: 0042 0afc mtc0 v0,c0_tcstatus +[ 0-9a-f]+: 0042 12fc mtc0 v0,c0_tcbind +[ 0-9a-f]+: 0042 1afc mtc0 v0,c0_tcrestart +[ 0-9a-f]+: 0042 22fc mtc0 v0,c0_tchalt +[ 0-9a-f]+: 0042 2afc mtc0 v0,c0_tccontext +[ 0-9a-f]+: 0042 32fc mtc0 v0,c0_tcschedule +[ 0-9a-f]+: 0042 3afc mtc0 v0,c0_tcschefback +[ 0-9a-f]+: 0000 2d7c mthi zero +[ 0-9a-f]+: 0002 2d7c mthi v0 +[ 0-9a-f]+: 0003 2d7c mthi v1 +[ 0-9a-f]+: 0004 2d7c mthi a0 +[ 0-9a-f]+: 001d 2d7c mthi sp +[ 0-9a-f]+: 001e 2d7c mthi s8 +[ 0-9a-f]+: 001f 2d7c mthi ra +[ 0-9a-f]+: 0000 3d7c mtlo zero +[ 0-9a-f]+: 0002 3d7c mtlo v0 +[ 0-9a-f]+: 0003 3d7c mtlo v1 +[ 0-9a-f]+: 0004 3d7c mtlo a0 +[ 0-9a-f]+: 001d 3d7c mtlo sp +[ 0-9a-f]+: 001e 3d7c mtlo s8 +[ 0-9a-f]+: 001f 3d7c mtlo ra +[ 0-9a-f]+: 0083 1210 mul v0,v1,a0 +[ 0-9a-f]+: 03fe ea10 mul sp,s8,ra +[ 0-9a-f]+: 0082 1210 mul v0,v0,a0 +[ 0-9a-f]+: 0082 1210 mul v0,v0,a0 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0022 8b3c mult v0,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 0022 8b3c mult v0,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 0022 8b3c mult v0,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0022 8b3c mult v0,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 8b3c mult v0,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0083 8b3c mult v1,a0 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0042 f880 sra v0,v0,0x1f +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 9422 fffe beq v0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 3020 0004 li at,4 +[ 0-9a-f]+: 0023 8b3c mult v1,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0042 f880 sra v0,v0,0x1f +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 9422 fffe beq v0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 0083 9b3c multu v1,a0 +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 0004 li at,4 +[ 0-9a-f]+: 0023 9b3c multu v1,at +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0062 8b3c mult v0,v1 +[ 0-9a-f]+: 0062 9b3c multu v0,v1 +[ 0-9a-f]+: 0060 1190 neg v0,v1 +[ 0-9a-f]+: 0040 1190 neg v0,v0 +[ 0-9a-f]+: 0040 1190 neg v0,v0 +[ 0-9a-f]+: 0060 11d0 negu v0,v1 +[ 0-9a-f]+: 0040 11d0 negu v0,v0 +[ 0-9a-f]+: 0040 11d0 negu v0,v0 +[ 0-9a-f]+: 0060 11d0 negu v0,v1 +[ 0-9a-f]+: 0040 11d0 negu v0,v0 +[ 0-9a-f]+: 0040 11d0 negu v0,v0 +[ 0-9a-f]+: 4412 not v0,v0 +[ 0-9a-f]+: 4412 not v0,v0 +[ 0-9a-f]+: 4413 not v0,v1 +[ 0-9a-f]+: 4414 not v0,a0 +[ 0-9a-f]+: 4415 not v0,a1 +[ 0-9a-f]+: 4416 not v0,a2 +[ 0-9a-f]+: 4417 not v0,a3 +[ 0-9a-f]+: 4410 not v0,s0 +[ 0-9a-f]+: 4411 not v0,s1 +[ 0-9a-f]+: 4419 not v1,s1 +[ 0-9a-f]+: 4421 not a0,s1 +[ 0-9a-f]+: 4429 not a1,s1 +[ 0-9a-f]+: 4431 not a2,s1 +[ 0-9a-f]+: 4439 not a3,s1 +[ 0-9a-f]+: 4401 not s0,s1 +[ 0-9a-f]+: 4409 not s1,s1 +[ 0-9a-f]+: 4417 not v0,a3 +[ 0-9a-f]+: 4417 not v0,a3 +[ 0-9a-f]+: 0083 12d0 nor v0,v1,a0 +[ 0-9a-f]+: 03fe ead0 nor sp,s8,ra +[ 0-9a-f]+: 0082 12d0 nor v0,v0,a0 +[ 0-9a-f]+: 0082 12d0 nor v0,v0,a0 +[ 0-9a-f]+: 5043 8000 ori v0,v1,0x8000 +[ 0-9a-f]+: 0002 12d0 not v0,v0 +[ 0-9a-f]+: 5043 ffff ori v0,v1,0xffff +[ 0-9a-f]+: 0002 12d0 not v0,v0 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 12d0 nor v0,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0023 12d0 nor v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 12d0 nor v0,v1,at +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 0c56 move v0,s6 +[ 0-9a-f]+: 0ec2 move s6,v0 +[ 0-9a-f]+: 44d2 or v0,v0,v0 +[ 0-9a-f]+: 44d3 or v0,v0,v1 +[ 0-9a-f]+: 44d4 or v0,v0,a0 +[ 0-9a-f]+: 44d5 or v0,v0,a1 +[ 0-9a-f]+: 44d6 or v0,v0,a2 +[ 0-9a-f]+: 44d7 or v0,v0,a3 +[ 0-9a-f]+: 44d0 or v0,v0,s0 +[ 0-9a-f]+: 44d1 or v0,v0,s1 +[ 0-9a-f]+: 44da or v1,v1,v0 +[ 0-9a-f]+: 44e2 or a0,a0,v0 +[ 0-9a-f]+: 44ea or a1,a1,v0 +[ 0-9a-f]+: 44f2 or a2,a2,v0 +[ 0-9a-f]+: 44fa or a3,a3,v0 +[ 0-9a-f]+: 44c2 or s0,s0,v0 +[ 0-9a-f]+: 44ca or s1,s1,v0 +[ 0-9a-f]+: 44d2 or v0,v0,v0 +[ 0-9a-f]+: 44d3 or v0,v0,v1 +[ 0-9a-f]+: 44d3 or v0,v0,v1 +[ 0-9a-f]+: 0083 1290 or v0,v1,a0 +[ 0-9a-f]+: 03fe ea90 or sp,s8,ra +[ 0-9a-f]+: 0082 1290 or v0,v0,a0 +[ 0-9a-f]+: 0082 1290 or v0,v0,a0 +[ 0-9a-f]+: 5043 8000 ori v0,v1,0x8000 +[ 0-9a-f]+: 5043 ffff ori v0,v1,0xffff +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1290 or v0,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0023 1290 or v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1290 or v0,v1,at +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 5064 7fff ori v1,a0,0x7fff +[ 0-9a-f]+: 5064 ffff ori v1,a0,0xffff +[ 0-9a-f]+: 5063 ffff ori v1,v1,0xffff +[ 0-9a-f]+: 5063 ffff ori v1,v1,0xffff +[ 0-9a-f]+: 0040 6b3c rdhwr v0,hwr_cpunum +[ 0-9a-f]+: 0041 6b3c rdhwr v0,hwr_synci_step +[ 0-9a-f]+: 0042 6b3c rdhwr v0,hwr_cc +[ 0-9a-f]+: 0043 6b3c rdhwr v0,hwr_ccres +[ 0-9a-f]+: 0044 6b3c rdhwr v0,\$4 +[ 0-9a-f]+: 0045 6b3c rdhwr v0,\$5 +[ 0-9a-f]+: 0046 6b3c rdhwr v0,\$6 +[ 0-9a-f]+: 0047 6b3c rdhwr v0,\$7 +[ 0-9a-f]+: 0048 6b3c rdhwr v0,\$8 +[ 0-9a-f]+: 0049 6b3c rdhwr v0,\$9 +[ 0-9a-f]+: 004a 6b3c rdhwr v0,\$10 +[ 0-9a-f]+: 0043 e17c rdpgpr v0,v1 +[ 0-9a-f]+: 0042 e17c rdpgpr v0,v0 +[ 0-9a-f]+: 0042 e17c rdpgpr v0,v0 +[ 0-9a-f]+: 0062 ab3c div zero,v0,v1 +[ 0-9a-f]+: 03fe ab3c div zero,s8,ra +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0060 ab3c div zero,zero,v1 +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b423 fffe bne v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: b420 fffe bne zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: b41f fffe bnez ra,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03e0 ab3c div zero,zero,ra +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b43f fffe bne ra,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: b420 fffe bne zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: b404 fffe bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0083 ab3c div zero,v1,a0 +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b424 fffe bne a0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: b423 fffe bne v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4602 mfhi v0 +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 0024 ab3c div zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 0062 bb3c divu zero,v0,v1 +[ 0-9a-f]+: 03fe bb3c divu zero,s8,ra +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0060 bb3c divu zero,zero,v1 +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: b41f fffe bnez ra,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 03e0 bb3c divu zero,zero,ra +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: b400 fffe bnez zero,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0003 bb3c divu zero,v1,zero +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4602 mfhi v0 +[ 0-9a-f]+: b404 fffe bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0083 bb3c divu zero,v1,a0 +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4602 mfhi v0 +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0024 bb3c divu zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 0024 bb3c divu zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 0080 11d0 negu v0,a0 +[ 0-9a-f]+: 0062 10d0 rorv v0,v1,v0 +[ 0-9a-f]+: 0080 09d0 negu at,a0 +[ 0-9a-f]+: 0041 10d0 rorv v0,v0,at +[ 0-9a-f]+: 0060 11d0 negu v0,v1 +[ 0-9a-f]+: 0062 10d0 rorv v0,v1,v0 +[ 0-9a-f]+: 0040 11d0 negu v0,v0 +[ 0-9a-f]+: 0062 10d0 rorv v0,v1,v0 +[ 0-9a-f]+: 0043 00c0 ror v0,v1,0x0 +[ 0-9a-f]+: 0043 f8c0 ror v0,v1,0x1f +[ 0-9a-f]+: 0043 08c0 ror v0,v1,0x1 +[ 0-9a-f]+: 0042 08c0 ror v0,v0,0x1 +[ 0-9a-f]+: 0042 08c0 ror v0,v0,0x1 +[ 0-9a-f]+: 0043 00c0 ror v0,v1,0x0 +[ 0-9a-f]+: 0043 08c0 ror v0,v1,0x1 +[ 0-9a-f]+: 0043 f8c0 ror v0,v1,0x1f +[ 0-9a-f]+: 0042 f8c0 ror v0,v0,0x1f +[ 0-9a-f]+: 0042 f8c0 ror v0,v0,0x1f +[ 0-9a-f]+: 0064 10d0 rorv v0,v1,a0 +[ 0-9a-f]+: 0044 10d0 rorv v0,v0,a0 +[ 0-9a-f]+: 0064 10d0 rorv v0,v1,a0 +[ 0-9a-f]+: 0044 10d0 rorv v0,v0,a0 +[ 0-9a-f]+: 0064 10d0 rorv v0,v1,a0 +[ 0-9a-f]+: 0044 10d0 rorv v0,v0,a0 +[ 0-9a-f]+: 0064 10d0 rorv v0,v1,a0 +[ 0-9a-f]+: 0044 10d0 rorv v0,v0,a0 +[ 0-9a-f]+: 8830 sb zero,0\(v1\) +[ 0-9a-f]+: 8830 sb zero,0\(v1\) +[ 0-9a-f]+: 8831 sb zero,1\(v1\) +[ 0-9a-f]+: 8832 sb zero,2\(v1\) +[ 0-9a-f]+: 8833 sb zero,3\(v1\) +[ 0-9a-f]+: 8834 sb zero,4\(v1\) +[ 0-9a-f]+: 8835 sb zero,5\(v1\) +[ 0-9a-f]+: 8836 sb zero,6\(v1\) +[ 0-9a-f]+: 8837 sb zero,7\(v1\) +[ 0-9a-f]+: 8838 sb zero,8\(v1\) +[ 0-9a-f]+: 8839 sb zero,9\(v1\) +[ 0-9a-f]+: 883a sb zero,10\(v1\) +[ 0-9a-f]+: 883b sb zero,11\(v1\) +[ 0-9a-f]+: 883c sb zero,12\(v1\) +[ 0-9a-f]+: 883d sb zero,13\(v1\) +[ 0-9a-f]+: 883e sb zero,14\(v1\) +[ 0-9a-f]+: 883f sb zero,15\(v1\) +[ 0-9a-f]+: 893f sb v0,15\(v1\) +[ 0-9a-f]+: 89bf sb v1,15\(v1\) +[ 0-9a-f]+: 8a3f sb a0,15\(v1\) +[ 0-9a-f]+: 8abf sb a1,15\(v1\) +[ 0-9a-f]+: 8b3f sb a2,15\(v1\) +[ 0-9a-f]+: 8bbf sb a3,15\(v1\) +[ 0-9a-f]+: 88bf sb s1,15\(v1\) +[ 0-9a-f]+: 88cf sb s1,15\(a0\) +[ 0-9a-f]+: 88df sb s1,15\(a1\) +[ 0-9a-f]+: 88ef sb s1,15\(a2\) +[ 0-9a-f]+: 88ff sb s1,15\(a3\) +[ 0-9a-f]+: 88af sb s1,15\(v0\) +[ 0-9a-f]+: 888f sb s1,15\(s0\) +[ 0-9a-f]+: 889f sb s1,15\(s1\) +[ 0-9a-f]+: 1860 0004 sb v1,4\(zero\) +[ 0-9a-f]+: 1860 0004 sb v1,4\(zero\) +[ 0-9a-f]+: 1860 7fff sb v1,32767\(zero\) +[ 0-9a-f]+: 1860 8000 sb v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 1861 ffff sb v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1860 8000 sb v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 1860 8001 sb v1,-32767\(zero\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1860 ffff sb v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 1861 5678 sb v1,22136\(at\) +[ 0-9a-f]+: 1864 0000 sb v1,0\(a0\) +[ 0-9a-f]+: 1864 0000 sb v1,0\(a0\) +[ 0-9a-f]+: 1864 7fff sb v1,32767\(a0\) +[ 0-9a-f]+: 1864 8000 sb v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 ffff sb v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1864 8000 sb v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 1864 8001 sb v1,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1864 ffff sb v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 5678 sb v1,22136\(at\) +[ 0-9a-f]+: 6060 b004 sc v1,4\(zero\) +[ 0-9a-f]+: 6060 b004 sc v1,4\(zero\) +[ 0-9a-f]+: 6060 b7ff sc v1,2047\(zero\) +[ 0-9a-f]+: 6060 b800 sc v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 6060 bfff sc v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 b678 sc v1,1656\(at\) +[ 0-9a-f]+: 6064 b000 sc v1,0\(a0\) +[ 0-9a-f]+: 6064 b000 sc v1,0\(a0\) +[ 0-9a-f]+: 6064 b7ff sc v1,2047\(a0\) +[ 0-9a-f]+: 6064 b800 sc v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 6064 bfff sc v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 b678 sc v1,1656\(at\) +[ 0-9a-f]+: 46c0 sdbbp +[ 0-9a-f]+: 46c0 sdbbp +[ 0-9a-f]+: 46c1 sdbbp 0x1 +[ 0-9a-f]+: 46c2 sdbbp 0x2 +[ 0-9a-f]+: 46c3 sdbbp 0x3 +[ 0-9a-f]+: 46c4 sdbbp 0x4 +[ 0-9a-f]+: 46c5 sdbbp 0x5 +[ 0-9a-f]+: 46c6 sdbbp 0x6 +[ 0-9a-f]+: 46c7 sdbbp 0x7 +[ 0-9a-f]+: 46c8 sdbbp 0x8 +[ 0-9a-f]+: 46c9 sdbbp 0x9 +[ 0-9a-f]+: 46ca sdbbp 0xa +[ 0-9a-f]+: 46cb sdbbp 0xb +[ 0-9a-f]+: 46cc sdbbp 0xc +[ 0-9a-f]+: 46cd sdbbp 0xd +[ 0-9a-f]+: 46ce sdbbp 0xe +[ 0-9a-f]+: 46cf sdbbp 0xf +[ 0-9a-f]+: 0000 db7c sdbbp +[ 0-9a-f]+: 0000 db7c sdbbp +[ 0-9a-f]+: 0001 db7c sdbbp 0x1 +[ 0-9a-f]+: 0002 db7c sdbbp 0x2 +[ 0-9a-f]+: 00ff db7c sdbbp 0xff +[ 0-9a-f]+: 0043 2b3c seb v0,v1 +[ 0-9a-f]+: 0042 2b3c seb v0,v0 +[ 0-9a-f]+: 0042 2b3c seb v0,v0 +[ 0-9a-f]+: 0043 3b3c seh v0,v1 +[ 0-9a-f]+: 0042 3b3c seh v0,v0 +[ 0-9a-f]+: 0042 3b3c seh v0,v0 +[ 0-9a-f]+: 0083 1310 xor v0,v1,a0 +[ 0-9a-f]+: b042 0001 sltiu v0,v0,1 +[ 0-9a-f]+: b043 0001 sltiu v0,v1,1 +[ 0-9a-f]+: b044 0001 sltiu v0,a0,1 +[ 0-9a-f]+: b043 0001 sltiu v0,v1,1 +[ 0-9a-f]+: 7043 0001 xori v0,v1,0x1 +[ 0-9a-f]+: b042 0001 sltiu v0,v0,1 +[ 0-9a-f]+: 3043 0001 addiu v0,v1,1 +[ 0-9a-f]+: b042 0001 sltiu v0,v0,1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1310 xor v0,v1,at +[ 0-9a-f]+: b042 0001 sltiu v0,v0,1 +[ 0-9a-f]+: 0083 1350 slt v0,v1,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0082 1350 slt v0,v0,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0082 1350 slt v0,v0,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 9043 0000 slti v0,v1,0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 9043 8000 slti v0,v1,-32768 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 9043 0000 slti v0,v1,0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 9043 7fff slti v0,v1,32767 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0083 1390 sltu v0,v1,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0082 1390 sltu v0,v0,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0082 1390 sltu v0,v0,a0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: b043 0000 sltiu v0,v1,0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: b043 8000 sltiu v0,v1,-32768 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: b043 0000 sltiu v0,v1,0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: b043 7fff sltiu v0,v1,32767 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0064 1350 slt v0,a0,v1 +[ 0-9a-f]+: 0044 1350 slt v0,a0,v0 +[ 0-9a-f]+: 0044 1350 slt v0,a0,v0 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 0064 1390 sltu v0,a0,v1 +[ 0-9a-f]+: 0044 1390 sltu v0,a0,v0 +[ 0-9a-f]+: 0044 1390 sltu v0,a0,v0 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: a930 sh v0,0\(v1\) +[ 0-9a-f]+: a930 sh v0,0\(v1\) +[ 0-9a-f]+: a931 sh v0,2\(v1\) +[ 0-9a-f]+: a932 sh v0,4\(v1\) +[ 0-9a-f]+: a933 sh v0,6\(v1\) +[ 0-9a-f]+: a934 sh v0,8\(v1\) +[ 0-9a-f]+: a935 sh v0,10\(v1\) +[ 0-9a-f]+: a936 sh v0,12\(v1\) +[ 0-9a-f]+: a937 sh v0,14\(v1\) +[ 0-9a-f]+: a938 sh v0,16\(v1\) +[ 0-9a-f]+: a939 sh v0,18\(v1\) +[ 0-9a-f]+: a93a sh v0,20\(v1\) +[ 0-9a-f]+: a93b sh v0,22\(v1\) +[ 0-9a-f]+: a93c sh v0,24\(v1\) +[ 0-9a-f]+: a93d sh v0,26\(v1\) +[ 0-9a-f]+: a93e sh v0,28\(v1\) +[ 0-9a-f]+: a93f sh v0,30\(v1\) +[ 0-9a-f]+: a94f sh v0,30\(a0\) +[ 0-9a-f]+: a95f sh v0,30\(a1\) +[ 0-9a-f]+: a96f sh v0,30\(a2\) +[ 0-9a-f]+: a97f sh v0,30\(a3\) +[ 0-9a-f]+: a92f sh v0,30\(v0\) +[ 0-9a-f]+: a90f sh v0,30\(s0\) +[ 0-9a-f]+: a91f sh v0,30\(s1\) +[ 0-9a-f]+: a99f sh v1,30\(s1\) +[ 0-9a-f]+: aa1f sh a0,30\(s1\) +[ 0-9a-f]+: aa9f sh a1,30\(s1\) +[ 0-9a-f]+: ab1f sh a2,30\(s1\) +[ 0-9a-f]+: ab9f sh a3,30\(s1\) +[ 0-9a-f]+: a89f sh s1,30\(s1\) +[ 0-9a-f]+: a81f sh zero,30\(s1\) +[ 0-9a-f]+: 3860 0004 sh v1,4\(zero\) +[ 0-9a-f]+: 3860 0004 sh v1,4\(zero\) +[ 0-9a-f]+: 3860 7fff sh v1,32767\(zero\) +[ 0-9a-f]+: 3860 8000 sh v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 3861 ffff sh v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 3861 0000 sh v1,0\(at\) +[ 0-9a-f]+: 3860 8000 sh v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 3861 0001 sh v1,1\(at\) +[ 0-9a-f]+: 3860 8001 sh v1,-32767\(zero\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 3861 0000 sh v1,0\(at\) +[ 0-9a-f]+: 3860 ffff sh v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 3861 5678 sh v1,22136\(at\) +[ 0-9a-f]+: 3864 0000 sh v1,0\(a0\) +[ 0-9a-f]+: 3864 0000 sh v1,0\(a0\) +[ 0-9a-f]+: 3864 7fff sh v1,32767\(a0\) +[ 0-9a-f]+: 3864 8000 sh v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3861 ffff sh v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3861 0000 sh v1,0\(at\) +[ 0-9a-f]+: 3864 8000 sh v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3861 0001 sh v1,1\(at\) +[ 0-9a-f]+: 3864 8001 sh v1,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3861 0000 sh v1,0\(at\) +[ 0-9a-f]+: 3864 ffff sh v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3861 5678 sh v1,22136\(at\) +[ 0-9a-f]+: 0064 1350 slt v0,a0,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0044 1350 slt v0,a0,v0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0044 1350 slt v0,a0,v0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0061 1350 slt v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0064 1390 sltu v0,a0,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0044 1390 sltu v0,a0,v0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 0044 1390 sltu v0,a0,v0 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 0000 li at,0 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0061 1390 sltu v0,at,v1 +[ 0-9a-f]+: 7042 0001 xori v0,v0,0x1 +[ 0-9a-f]+: 2522 sll v0,v0,1 +[ 0-9a-f]+: 2524 sll v0,v0,2 +[ 0-9a-f]+: 2526 sll v0,v0,3 +[ 0-9a-f]+: 2528 sll v0,v0,4 +[ 0-9a-f]+: 252a sll v0,v0,5 +[ 0-9a-f]+: 252c sll v0,v0,6 +[ 0-9a-f]+: 252e sll v0,v0,7 +[ 0-9a-f]+: 2520 sll v0,v0,8 +[ 0-9a-f]+: 2530 sll v0,v1,8 +[ 0-9a-f]+: 2540 sll v0,a0,8 +[ 0-9a-f]+: 2550 sll v0,a1,8 +[ 0-9a-f]+: 2560 sll v0,a2,8 +[ 0-9a-f]+: 2570 sll v0,a3,8 +[ 0-9a-f]+: 2500 sll v0,s0,8 +[ 0-9a-f]+: 2510 sll v0,s1,8 +[ 0-9a-f]+: 25a0 sll v1,v0,8 +[ 0-9a-f]+: 2620 sll a0,v0,8 +[ 0-9a-f]+: 26a0 sll a1,v0,8 +[ 0-9a-f]+: 2720 sll a2,v0,8 +[ 0-9a-f]+: 27a0 sll a3,v0,8 +[ 0-9a-f]+: 2420 sll s0,v0,8 +[ 0-9a-f]+: 24a0 sll s1,v0,8 +[ 0-9a-f]+: 2522 sll v0,v0,1 +[ 0-9a-f]+: 25b2 sll v1,v1,1 +[ 0-9a-f]+: 0064 1010 sllv v0,v1,a0 +[ 0-9a-f]+: 0044 1010 sllv v0,v0,a0 +[ 0-9a-f]+: 0044 1010 sllv v0,v0,a0 +[ 0-9a-f]+: 0044 1010 sllv v0,v0,a0 +[ 0-9a-f]+: 0044 0000 sll v0,a0,0x0 +[ 0-9a-f]+: 0044 0800 sll v0,a0,0x1 +[ 0-9a-f]+: 0044 f800 sll v0,a0,0x1f +[ 0-9a-f]+: 0042 f800 sll v0,v0,0x1f +[ 0-9a-f]+: 0042 f800 sll v0,v0,0x1f +[ 0-9a-f]+: 0083 1350 slt v0,v1,a0 +[ 0-9a-f]+: 0082 1350 slt v0,v0,a0 +[ 0-9a-f]+: 0082 1350 slt v0,v0,a0 +[ 0-9a-f]+: 9043 0000 slti v0,v1,0 +[ 0-9a-f]+: 9043 8000 slti v0,v1,-32768 +[ 0-9a-f]+: 9043 0000 slti v0,v1,0 +[ 0-9a-f]+: 9043 7fff slti v0,v1,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1350 slt v0,v1,at +[ 0-9a-f]+: 9064 8000 slti v1,a0,-32768 +[ 0-9a-f]+: 9064 0000 slti v1,a0,0 +[ 0-9a-f]+: 9064 7fff slti v1,a0,32767 +[ 0-9a-f]+: 9064 ffff slti v1,a0,-1 +[ 0-9a-f]+: 9063 ffff slti v1,v1,-1 +[ 0-9a-f]+: 9063 ffff slti v1,v1,-1 +[ 0-9a-f]+: b064 8000 sltiu v1,a0,-32768 +[ 0-9a-f]+: b064 0000 sltiu v1,a0,0 +[ 0-9a-f]+: b064 7fff sltiu v1,a0,32767 +[ 0-9a-f]+: b064 ffff sltiu v1,a0,-1 +[ 0-9a-f]+: b063 ffff sltiu v1,v1,-1 +[ 0-9a-f]+: b063 ffff sltiu v1,v1,-1 +[ 0-9a-f]+: 0083 1390 sltu v0,v1,a0 +[ 0-9a-f]+: 0082 1390 sltu v0,v0,a0 +[ 0-9a-f]+: 0082 1390 sltu v0,v0,a0 +[ 0-9a-f]+: b043 0000 sltiu v0,v1,0 +[ 0-9a-f]+: b043 8000 sltiu v0,v1,-32768 +[ 0-9a-f]+: b043 0000 sltiu v0,v1,0 +[ 0-9a-f]+: b043 7fff sltiu v0,v1,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1390 sltu v0,v1,at +[ 0-9a-f]+: 0083 1310 xor v0,v1,a0 +[ 0-9a-f]+: 0040 1390 sltu v0,zero,v0 +[ 0-9a-f]+: 0080 1390 sltu v0,zero,a0 +[ 0-9a-f]+: 0060 1390 sltu v0,zero,v1 +[ 0-9a-f]+: 0060 1390 sltu v0,zero,v1 +[ 0-9a-f]+: 7043 0001 xori v0,v1,0x1 +[ 0-9a-f]+: 0040 1390 sltu v0,zero,v0 +[ 0-9a-f]+: 3043 0001 addiu v0,v1,1 +[ 0-9a-f]+: 0040 1390 sltu v0,zero,v0 +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1310 xor v0,v1,at +[ 0-9a-f]+: 0040 1390 sltu v0,zero,v0 +[ 0-9a-f]+: 0064 1090 srav v0,v1,a0 +[ 0-9a-f]+: 0044 1090 srav v0,v0,a0 +[ 0-9a-f]+: 0044 1090 srav v0,v0,a0 +[ 0-9a-f]+: 0044 1090 srav v0,v0,a0 +[ 0-9a-f]+: 0044 0080 sra v0,a0,0x0 +[ 0-9a-f]+: 0044 0880 sra v0,a0,0x1 +[ 0-9a-f]+: 0044 f880 sra v0,a0,0x1f +[ 0-9a-f]+: 0042 f880 sra v0,v0,0x1f +[ 0-9a-f]+: 0042 f880 sra v0,v0,0x1f +[ 0-9a-f]+: 0064 1050 srlv v0,v1,a0 +[ 0-9a-f]+: 0044 1050 srlv v0,v0,a0 +[ 0-9a-f]+: 0044 1050 srlv v0,v0,a0 +[ 0-9a-f]+: 0044 1050 srlv v0,v0,a0 +[ 0-9a-f]+: 0044 0040 srl v0,a0,0x0 +[ 0-9a-f]+: 2543 srl v0,a0,1 +[ 0-9a-f]+: 0044 f840 srl v0,a0,0x1f +[ 0-9a-f]+: 0042 f840 srl v0,v0,0x1f +[ 0-9a-f]+: 0042 f840 srl v0,v0,0x1f +[ 0-9a-f]+: 2523 srl v0,v0,1 +[ 0-9a-f]+: 2525 srl v0,v0,2 +[ 0-9a-f]+: 2527 srl v0,v0,3 +[ 0-9a-f]+: 2529 srl v0,v0,4 +[ 0-9a-f]+: 252b srl v0,v0,5 +[ 0-9a-f]+: 252d srl v0,v0,6 +[ 0-9a-f]+: 252f srl v0,v0,7 +[ 0-9a-f]+: 2521 srl v0,v0,8 +[ 0-9a-f]+: 2531 srl v0,v1,8 +[ 0-9a-f]+: 2541 srl v0,a0,8 +[ 0-9a-f]+: 2551 srl v0,a1,8 +[ 0-9a-f]+: 2561 srl v0,a2,8 +[ 0-9a-f]+: 2571 srl v0,a3,8 +[ 0-9a-f]+: 2501 srl v0,s0,8 +[ 0-9a-f]+: 2511 srl v0,s1,8 +[ 0-9a-f]+: 2521 srl v0,v0,8 +[ 0-9a-f]+: 25a1 srl v1,v0,8 +[ 0-9a-f]+: 2621 srl a0,v0,8 +[ 0-9a-f]+: 26a1 srl a1,v0,8 +[ 0-9a-f]+: 2721 srl a2,v0,8 +[ 0-9a-f]+: 27a1 srl a3,v0,8 +[ 0-9a-f]+: 2421 srl s0,v0,8 +[ 0-9a-f]+: 24a1 srl s1,v0,8 +[ 0-9a-f]+: 25b3 srl v1,v1,1 +[ 0-9a-f]+: 25b3 srl v1,v1,1 +[ 0-9a-f]+: 0083 1190 sub v0,v1,a0 +[ 0-9a-f]+: 03fe e990 sub sp,s8,ra +[ 0-9a-f]+: 0082 1190 sub v0,v0,a0 +[ 0-9a-f]+: 0082 1190 sub v0,v0,a0 +[ 0-9a-f]+: 1042 0000 addi v0,v0,0 +[ 0-9a-f]+: 1042 ffff addi v0,v0,-1 +[ 0-9a-f]+: 1042 8001 addi v0,v0,-32767 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0022 1190 sub v0,v0,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 1190 sub v0,v0,at +[ 0-9a-f]+: 0527 subu v0,v1,v0 +[ 0-9a-f]+: 0537 subu v0,v1,v1 +[ 0-9a-f]+: 0547 subu v0,v1,a0 +[ 0-9a-f]+: 0557 subu v0,v1,a1 +[ 0-9a-f]+: 0567 subu v0,v1,a2 +[ 0-9a-f]+: 0577 subu v0,v1,a3 +[ 0-9a-f]+: 0507 subu v0,v1,s0 +[ 0-9a-f]+: 0517 subu v0,v1,s1 +[ 0-9a-f]+: 0515 subu v0,v0,s1 +[ 0-9a-f]+: 0519 subu v0,a0,s1 +[ 0-9a-f]+: 051b subu v0,a1,s1 +[ 0-9a-f]+: 051d subu v0,a2,s1 +[ 0-9a-f]+: 051f subu v0,a3,s1 +[ 0-9a-f]+: 0511 subu v0,s0,s1 +[ 0-9a-f]+: 0513 subu v0,s1,s1 +[ 0-9a-f]+: 0515 subu v0,v0,s1 +[ 0-9a-f]+: 0595 subu v1,v0,s1 +[ 0-9a-f]+: 0615 subu a0,v0,s1 +[ 0-9a-f]+: 0695 subu a1,v0,s1 +[ 0-9a-f]+: 0715 subu a2,v0,s1 +[ 0-9a-f]+: 0795 subu a3,v0,s1 +[ 0-9a-f]+: 0415 subu s0,v0,s1 +[ 0-9a-f]+: 0495 subu s1,v0,s1 +[ 0-9a-f]+: 07af subu a3,a3,v0 +[ 0-9a-f]+: 07af subu a3,a3,v0 +[ 0-9a-f]+: 0083 11d0 subu v0,v1,a0 +[ 0-9a-f]+: 03fe e9d0 subu sp,s8,ra +[ 0-9a-f]+: 0082 11d0 subu v0,v0,a0 +[ 0-9a-f]+: 0082 11d0 subu v0,v0,a0 +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ 0-9a-f]+: 3042 ffff addiu v0,v0,-1 +[ 0-9a-f]+: 3042 8001 addiu v0,v0,-32767 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0022 11d0 subu v0,v0,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 11d0 subu v0,v0,at +[ 0-9a-f]+: e940 sw v0,0\(a0\) +[ 0-9a-f]+: e940 sw v0,0\(a0\) +[ 0-9a-f]+: e941 sw v0,4\(a0\) +[ 0-9a-f]+: e942 sw v0,8\(a0\) +[ 0-9a-f]+: e943 sw v0,12\(a0\) +[ 0-9a-f]+: e944 sw v0,16\(a0\) +[ 0-9a-f]+: e945 sw v0,20\(a0\) +[ 0-9a-f]+: e946 sw v0,24\(a0\) +[ 0-9a-f]+: e947 sw v0,28\(a0\) +[ 0-9a-f]+: e948 sw v0,32\(a0\) +[ 0-9a-f]+: e949 sw v0,36\(a0\) +[ 0-9a-f]+: e94a sw v0,40\(a0\) +[ 0-9a-f]+: e94b sw v0,44\(a0\) +[ 0-9a-f]+: e94c sw v0,48\(a0\) +[ 0-9a-f]+: e94d sw v0,52\(a0\) +[ 0-9a-f]+: e94e sw v0,56\(a0\) +[ 0-9a-f]+: e94f sw v0,60\(a0\) +[ 0-9a-f]+: e95f sw v0,60\(a1\) +[ 0-9a-f]+: e96f sw v0,60\(a2\) +[ 0-9a-f]+: e97f sw v0,60\(a3\) +[ 0-9a-f]+: e90f sw v0,60\(s0\) +[ 0-9a-f]+: e91f sw v0,60\(s1\) +[ 0-9a-f]+: e92f sw v0,60\(v0\) +[ 0-9a-f]+: e93f sw v0,60\(v1\) +[ 0-9a-f]+: e9bf sw v1,60\(v1\) +[ 0-9a-f]+: ea3f sw a0,60\(v1\) +[ 0-9a-f]+: eabf sw a1,60\(v1\) +[ 0-9a-f]+: eb3f sw a2,60\(v1\) +[ 0-9a-f]+: ebbf sw a3,60\(v1\) +[ 0-9a-f]+: e8bf sw s1,60\(v1\) +[ 0-9a-f]+: e83f sw zero,60\(v1\) +[ 0-9a-f]+: c800 sw zero,0\(sp\) +[ 0-9a-f]+: c800 sw zero,0\(sp\) +[ 0-9a-f]+: c801 sw zero,4\(sp\) +[ 0-9a-f]+: c802 sw zero,8\(sp\) +[ 0-9a-f]+: c803 sw zero,12\(sp\) +[ 0-9a-f]+: c804 sw zero,16\(sp\) +[ 0-9a-f]+: c805 sw zero,20\(sp\) +[ 0-9a-f]+: c81e sw zero,120\(sp\) +[ 0-9a-f]+: c81f sw zero,124\(sp\) +[ 0-9a-f]+: c85f sw v0,124\(sp\) +[ 0-9a-f]+: ca3f sw s1,124\(sp\) +[ 0-9a-f]+: c87f sw v1,124\(sp\) +[ 0-9a-f]+: c89f sw a0,124\(sp\) +[ 0-9a-f]+: c8bf sw a1,124\(sp\) +[ 0-9a-f]+: c8df sw a2,124\(sp\) +[ 0-9a-f]+: c8ff sw a3,124\(sp\) +[ 0-9a-f]+: cbff sw ra,124\(sp\) +[ 0-9a-f]+: f860 0004 sw v1,4\(zero\) +[ 0-9a-f]+: f860 0004 sw v1,4\(zero\) +[ 0-9a-f]+: f860 7fff sw v1,32767\(zero\) +[ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: f861 0001 sw v1,1\(at\) +[ 0-9a-f]+: f860 8001 sw v1,-32767\(zero\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f860 ffff sw v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: f861 5678 sw v1,22136\(at\) +[ 0-9a-f]+: f864 0000 sw v1,0\(a0\) +[ 0-9a-f]+: f864 0000 sw v1,0\(a0\) +[ 0-9a-f]+: f864 7fff sw v1,32767\(a0\) +[ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: f861 0001 sw v1,1\(at\) +[ 0-9a-f]+: f864 8001 sw v1,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f864 ffff sw v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: f861 5678 sw v1,22136\(at\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) +[ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 8678 swl v1,1656\(at\) +[ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) +[ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) +[ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) +[ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6064 8fff swl v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8678 swl v1,1656\(at\) +[ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) +[ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) +[ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) +[ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 9678 swr v1,1656\(at\) +[ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) +[ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) +[ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) +[ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 6064 9fff swr v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9678 swr v1,1656\(at\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) +[ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 8678 swl v1,1656\(at\) +[ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) +[ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) +[ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) +[ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6064 8fff swl v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8678 swl v1,1656\(at\) +[ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) +[ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) +[ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) +[ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 6061 9678 swr v1,1656\(at\) +[ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) +[ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) +[ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) +[ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 6064 9fff swr v1,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 9678 swr v1,1656\(at\) +[ 0-9a-f]+: 454c swm s0,ra,48\(sp\) +[ 0-9a-f]+: 455c swm s0-s1,ra,48\(sp\) +[ 0-9a-f]+: 455c swm s0-s1,ra,48\(sp\) +[ 0-9a-f]+: 456c swm s0-s2,ra,48\(sp\) +[ 0-9a-f]+: 456c swm s0-s2,ra,48\(sp\) +[ 0-9a-f]+: 457c swm s0-s3,ra,48\(sp\) +[ 0-9a-f]+: 457c swm s0-s3,ra,48\(sp\) +[ 0-9a-f]+: 4540 swm s0,ra,0\(sp\) +[ 0-9a-f]+: 4540 swm s0,ra,0\(sp\) +[ 0-9a-f]+: 4541 swm s0,ra,4\(sp\) +[ 0-9a-f]+: 4542 swm s0,ra,8\(sp\) +[ 0-9a-f]+: 4543 swm s0,ra,12\(sp\) +[ 0-9a-f]+: 4544 swm s0,ra,16\(sp\) +[ 0-9a-f]+: 4545 swm s0,ra,20\(sp\) +[ 0-9a-f]+: 4546 swm s0,ra,24\(sp\) +[ 0-9a-f]+: 4547 swm s0,ra,28\(sp\) +[ 0-9a-f]+: 4548 swm s0,ra,32\(sp\) +[ 0-9a-f]+: 4549 swm s0,ra,36\(sp\) +[ 0-9a-f]+: 454a swm s0,ra,40\(sp\) +[ 0-9a-f]+: 454b swm s0,ra,44\(sp\) +[ 0-9a-f]+: 454c swm s0,ra,48\(sp\) +[ 0-9a-f]+: 454d swm s0,ra,52\(sp\) +[ 0-9a-f]+: 454e swm s0,ra,56\(sp\) +[ 0-9a-f]+: 454f swm s0,ra,60\(sp\) +[ 0-9a-f]+: 2020 d000 swm s0,0\(zero\) +[ 0-9a-f]+: 2020 d004 swm s0,4\(zero\) +[ 0-9a-f]+: 2020 d7ff swm s0,2047\(zero\) +[ 0-9a-f]+: 2020 d800 swm s0,-2048\(zero\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 2025 d000 swm s0,0\(a1\) +[ 0-9a-f]+: 2025 d7ff swm s0,2047\(a1\) +[ 0-9a-f]+: 2025 d800 swm s0,-2048\(a1\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 00a1 0950 addu at,at,a1 +[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 00a1 0950 addu at,at,a1 +[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 2045 d7ff swm s0-s1,2047\(a1\) +[ 0-9a-f]+: 2065 d7ff swm s0-s2,2047\(a1\) +[ 0-9a-f]+: 2085 d7ff swm s0-s3,2047\(a1\) +[ 0-9a-f]+: 20a5 d7ff swm s0-s4,2047\(a1\) +[ 0-9a-f]+: 20c5 d7ff swm s0-s5,2047\(a1\) +[ 0-9a-f]+: 20e5 d7ff swm s0-s6,2047\(a1\) +[ 0-9a-f]+: 2105 d7ff swm s0-s7,2047\(a1\) +[ 0-9a-f]+: 2125 d7ff swm s0-s7,s8,2047\(a1\) +[ 0-9a-f]+: 2205 d7ff swm ra,2047\(a1\) +[ 0-9a-f]+: 2225 d000 swm s0,ra,0\(a1\) +[ 0-9a-f]+: 2245 d000 swm s0-s1,ra,0\(a1\) +[ 0-9a-f]+: 2265 d000 swm s0-s2,ra,0\(a1\) +[ 0-9a-f]+: 2285 d000 swm s0-s3,ra,0\(a1\) +[ 0-9a-f]+: 22a5 d000 swm s0-s4,ra,0\(a1\) +[ 0-9a-f]+: 22c5 d000 swm s0-s5,ra,0\(a1\) +[ 0-9a-f]+: 22e5 d000 swm s0-s6,ra,0\(a1\) +[ 0-9a-f]+: 2305 d000 swm s0-s7,ra,0\(a1\) +[ 0-9a-f]+: 2325 d000 swm s0-s7,s8,ra,0\(a1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 dfff swm s0,-1\(at\) +[ 0-9a-f]+: 203d d000 swm s0,0\(sp\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 dfff swm s0,-1\(at\) +[ 0-9a-f]+: 2040 9000 swp v0,0\(zero\) +[ 0-9a-f]+: 2040 9004 swp v0,4\(zero\) +[ 0-9a-f]+: 2040 97ff swp v0,2047\(zero\) +[ 0-9a-f]+: 2040 9800 swp v0,-2048\(zero\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) +[ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) +[ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) +[ 0-9a-f]+: 2043 97ff swp v0,2047\(v1\) +[ 0-9a-f]+: 2043 9800 swp v0,-2048\(v1\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 9fff swp v0,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 2043 9000 swp v0,0\(v1\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 9fff swp v0,-1\(at\) +[ 0-9a-f]+: 0000 6b7c sync +[ 0-9a-f]+: 0000 6b7c sync +[ 0-9a-f]+: 0001 6b7c sync 0x1 +[ 0-9a-f]+: 0002 6b7c sync 0x2 +[ 0-9a-f]+: 0003 6b7c sync 0x3 +[ 0-9a-f]+: 0004 6b7c sync_wmb +[ 0-9a-f]+: 001e 6b7c sync 0x1e +[ 0-9a-f]+: 001f 6b7c sync 0x1f +[ 0-9a-f]+: 4200 0000 synci 0\(zero\) +[ 0-9a-f]+: 4200 0000 synci 0\(zero\) +[ 0-9a-f]+: 4200 0000 synci 0\(zero\) +[ 0-9a-f]+: 4200 07ff synci 2047\(zero\) +[ 0-9a-f]+: 4200 f800 synci -2048\(zero\) +[ 0-9a-f]+: 4200 0800 synci 2048\(zero\) +[ 0-9a-f]+: 4200 f7ff synci -2049\(zero\) +[ 0-9a-f]+: 4200 7fff synci 32767\(zero\) +[ 0-9a-f]+: 4200 8000 synci -32768\(zero\) +[ 0-9a-f]+: 4202 0000 synci 0\(v0\) +[ 0-9a-f]+: 4203 0000 synci 0\(v1\) +[ 0-9a-f]+: 4203 07ff synci 2047\(v1\) +[ 0-9a-f]+: 4203 f800 synci -2048\(v1\) +[ 0-9a-f]+: 4203 0800 synci 2048\(v1\) +[ 0-9a-f]+: 4203 f7ff synci -2049\(v1\) +[ 0-9a-f]+: 4203 7fff synci 32767\(v1\) +[ 0-9a-f]+: 4203 8000 synci -32768\(v1\) +[ 0-9a-f]+: 0000 8b7c syscall +[ 0-9a-f]+: 0000 8b7c syscall +[ 0-9a-f]+: 0001 8b7c syscall 0x1 +[ 0-9a-f]+: 0002 8b7c syscall 0x2 +[ 0-9a-f]+: 00ff 8b7c syscall 0xff +[ 0-9a-f]+: 41c2 0000 teqi v0,0 +[ 0-9a-f]+: 41c2 8000 teqi v0,-32768 +[ 0-9a-f]+: 41c2 7fff teqi v0,32767 +[ 0-9a-f]+: 41c2 ffff teqi v0,-1 +[ 0-9a-f]+: 0062 003c teq v0,v1 +[ 0-9a-f]+: 0043 003c teq v1,v0 +[ 0-9a-f]+: 0062 003c teq v0,v1 +[ 0-9a-f]+: 0062 103c teq v0,v1,0x1 +[ 0-9a-f]+: 0062 f03c teq v0,v1,0xf +[ 0-9a-f]+: 41c2 0000 teqi v0,0 +[ 0-9a-f]+: 41c2 8000 teqi v0,-32768 +[ 0-9a-f]+: 41c2 7fff teqi v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 003c teq v0,at +[ 0-9a-f]+: 4122 0000 tgei v0,0 +[ 0-9a-f]+: 4122 8000 tgei v0,-32768 +[ 0-9a-f]+: 4122 7fff tgei v0,32767 +[ 0-9a-f]+: 4122 ffff tgei v0,-1 +[ 0-9a-f]+: 0062 023c tge v0,v1 +[ 0-9a-f]+: 0043 023c tge v1,v0 +[ 0-9a-f]+: 0062 023c tge v0,v1 +[ 0-9a-f]+: 0062 123c tge v0,v1,0x1 +[ 0-9a-f]+: 0062 f23c tge v0,v1,0xf +[ 0-9a-f]+: 4122 0000 tgei v0,0 +[ 0-9a-f]+: 4122 8000 tgei v0,-32768 +[ 0-9a-f]+: 4122 7fff tgei v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 023c tge v0,at +[ 0-9a-f]+: 4162 0000 tgeiu v0,0 +[ 0-9a-f]+: 4162 8000 tgeiu v0,-32768 +[ 0-9a-f]+: 4162 7fff tgeiu v0,32767 +[ 0-9a-f]+: 4162 ffff tgeiu v0,-1 +[ 0-9a-f]+: 0062 043c tgeu v0,v1 +[ 0-9a-f]+: 0043 043c tgeu v1,v0 +[ 0-9a-f]+: 0062 043c tgeu v0,v1 +[ 0-9a-f]+: 0062 143c tgeu v0,v1,0x1 +[ 0-9a-f]+: 0062 f43c tgeu v0,v1,0xf +[ 0-9a-f]+: 4162 0000 tgeiu v0,0 +[ 0-9a-f]+: 4162 8000 tgeiu v0,-32768 +[ 0-9a-f]+: 4162 7fff tgeiu v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 043c tgeu v0,at +[ 0-9a-f]+: 0000 037c tlbp +[ 0-9a-f]+: 0000 137c tlbr +[ 0-9a-f]+: 0000 237c tlbwi +[ 0-9a-f]+: 0000 337c tlbwr +[ 0-9a-f]+: 4102 0000 tlti v0,0 +[ 0-9a-f]+: 4102 8000 tlti v0,-32768 +[ 0-9a-f]+: 4102 7fff tlti v0,32767 +[ 0-9a-f]+: 4102 ffff tlti v0,-1 +[ 0-9a-f]+: 0062 083c tlt v0,v1 +[ 0-9a-f]+: 0043 083c tlt v1,v0 +[ 0-9a-f]+: 0062 083c tlt v0,v1 +[ 0-9a-f]+: 0062 183c tlt v0,v1,0x1 +[ 0-9a-f]+: 0062 f83c tlt v0,v1,0xf +[ 0-9a-f]+: 4102 0000 tlti v0,0 +[ 0-9a-f]+: 4102 8000 tlti v0,-32768 +[ 0-9a-f]+: 4102 7fff tlti v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 083c tlt v0,at +[ 0-9a-f]+: 4142 0000 tltiu v0,0 +[ 0-9a-f]+: 4142 8000 tltiu v0,-32768 +[ 0-9a-f]+: 4142 7fff tltiu v0,32767 +[ 0-9a-f]+: 4142 ffff tltiu v0,-1 +[ 0-9a-f]+: 0062 0a3c tltu v0,v1 +[ 0-9a-f]+: 0043 0a3c tltu v1,v0 +[ 0-9a-f]+: 0062 0a3c tltu v0,v1 +[ 0-9a-f]+: 0062 1a3c tltu v0,v1,0x1 +[ 0-9a-f]+: 0062 fa3c tltu v0,v1,0xf +[ 0-9a-f]+: 4142 0000 tltiu v0,0 +[ 0-9a-f]+: 4142 8000 tltiu v0,-32768 +[ 0-9a-f]+: 4142 7fff tltiu v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 0a3c tltu v0,at +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0022 0a3c tltu v0,at +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0022 0a3c tltu v0,at +[ 0-9a-f]+: 4182 0000 tnei v0,0 +[ 0-9a-f]+: 4182 8000 tnei v0,-32768 +[ 0-9a-f]+: 4182 7fff tnei v0,32767 +[ 0-9a-f]+: 4182 ffff tnei v0,-1 +[ 0-9a-f]+: 0062 0c3c tne v0,v1 +[ 0-9a-f]+: 0043 0c3c tne v1,v0 +[ 0-9a-f]+: 0062 0c3c tne v0,v1 +[ 0-9a-f]+: 0062 1c3c tne v0,v1,0x1 +[ 0-9a-f]+: 0062 fc3c tne v0,v1,0xf +[ 0-9a-f]+: 4182 0000 tnei v0,0 +[ 0-9a-f]+: 4182 8000 tnei v0,-32768 +[ 0-9a-f]+: 4182 7fff tnei v0,32767 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0022 0c3c tne v0,at +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0022 0c3c tne v0,at +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0022 0c3c tne v0,at +[ 0-9a-f]+: 1c20 0004 lb at,4\(zero\) +[ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1c20 0004 lb at,4\(zero\) +[ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1c24 0000 lb at,0\(a0\) +[ 0-9a-f]+: 1464 0001 lbu v1,1\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1c24 0000 lb at,0\(a0\) +[ 0-9a-f]+: 1464 0001 lbu v1,1\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1c24 7ffb lb at,32763\(a0\) +[ 0-9a-f]+: 1464 7ffc lbu v1,32764\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1c24 8000 lb at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1420 0004 lbu at,4\(zero\) +[ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1420 0004 lbu at,4\(zero\) +[ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1424 0000 lbu at,0\(a0\) +[ 0-9a-f]+: 1464 0001 lbu v1,1\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1424 0000 lbu at,0\(a0\) +[ 0-9a-f]+: 1464 0001 lbu v1,1\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1424 7ffb lbu at,32763\(a0\) +[ 0-9a-f]+: 1464 7ffc lbu v1,32764\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1424 8000 lbu at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 1003 lwr v1,3\(zero\) +[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) +[ 0-9a-f]+: 6060 1003 lwr v1,3\(zero\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 1007 lwr v1,7\(zero\) +[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) +[ 0-9a-f]+: 6060 1007 lwr v1,7\(zero\) +[ 0-9a-f]+: 3020 07ff li at,2047 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) +[ 0-9a-f]+: 6060 1803 lwr v1,-2045\(zero\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 7ffb li at,32763 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) +[ 0-9a-f]+: 6064 1003 lwr v1,3\(a0\) +[ 0-9a-f]+: 6064 0004 lwl v1,4\(a0\) +[ 0-9a-f]+: 6064 1007 lwr v1,7\(a0\) +[ 0-9a-f]+: 3024 07ff addiu at,a0,2047 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) +[ 0-9a-f]+: 6064 1803 lwr v1,-2045\(a0\) +[ 0-9a-f]+: 3024 0800 addiu at,a0,2048 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3024 f7ff addiu at,a0,-2049 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3024 7ffb addiu at,a0,32763 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 1860 0005 sb v1,5\(zero\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1820 0004 sb at,4\(zero\) +[ 0-9a-f]+: 1860 0005 sb v1,5\(zero\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1820 0004 sb at,4\(zero\) +[ 0-9a-f]+: 1864 0001 sb v1,1\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 0000 sb at,0\(a0\) +[ 0-9a-f]+: 1864 0001 sb v1,1\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 0000 sb at,0\(a0\) +[ 0-9a-f]+: 1864 7ffc sb v1,32764\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 7ffb sb at,32763\(a0\) +[ 0-9a-f]+: 1864 8001 sb v1,-32767\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 8000 sb at,-32768\(a0\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) +[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 +[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) +[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) +[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) +[ 0-9a-f]+: 6060 9003 swr v1,3\(zero\) +[ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) +[ 0-9a-f]+: 6060 9003 swr v1,3\(zero\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 9007 swr v1,7\(zero\) +[ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) +[ 0-9a-f]+: 6060 9007 swr v1,7\(zero\) +[ 0-9a-f]+: 3020 07ff li at,2047 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) +[ 0-9a-f]+: 6060 9803 swr v1,-2045\(zero\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 7ffb li at,32763 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) +[ 0-9a-f]+: 6064 9003 swr v1,3\(a0\) +[ 0-9a-f]+: 6064 8004 swl v1,4\(a0\) +[ 0-9a-f]+: 6064 9007 swr v1,7\(a0\) +[ 0-9a-f]+: 3024 07ff addiu at,a0,2047 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) +[ 0-9a-f]+: 6064 9803 swr v1,-2045\(a0\) +[ 0-9a-f]+: 3024 0800 addiu at,a0,2048 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3024 f7ff addiu at,a0,-2049 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3024 7ffb addiu at,a0,32763 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 0000 937c wait +[ 0-9a-f]+: 0000 937c wait +[ 0-9a-f]+: 0001 937c wait 0x1 +[ 0-9a-f]+: 00ff 937c wait 0xff +[ 0-9a-f]+: 0043 f17c wrpgpr v0,v1 +[ 0-9a-f]+: 0044 f17c wrpgpr v0,a0 +[ 0-9a-f]+: 0042 f17c wrpgpr v0,v0 +[ 0-9a-f]+: 0042 f17c wrpgpr v0,v0 +[ 0-9a-f]+: 0043 7b3c wsbh v0,v1 +[ 0-9a-f]+: 0044 7b3c wsbh v0,a0 +[ 0-9a-f]+: 0042 7b3c wsbh v0,v0 +[ 0-9a-f]+: 0042 7b3c wsbh v0,v0 +[ 0-9a-f]+: 4452 xor v0,v0,v0 +[ 0-9a-f]+: 4453 xor v0,v0,v1 +[ 0-9a-f]+: 4454 xor v0,v0,a0 +[ 0-9a-f]+: 4455 xor v0,v0,a1 +[ 0-9a-f]+: 4456 xor v0,v0,a2 +[ 0-9a-f]+: 4457 xor v0,v0,a3 +[ 0-9a-f]+: 4450 xor v0,v0,s0 +[ 0-9a-f]+: 4451 xor v0,v0,s1 +[ 0-9a-f]+: 4459 xor v1,v1,s1 +[ 0-9a-f]+: 4461 xor a0,a0,s1 +[ 0-9a-f]+: 4469 xor a1,a1,s1 +[ 0-9a-f]+: 4471 xor a2,a2,s1 +[ 0-9a-f]+: 4479 xor a3,a3,s1 +[ 0-9a-f]+: 4441 xor s0,s0,s1 +[ 0-9a-f]+: 4449 xor s1,s1,s1 +[ 0-9a-f]+: 4453 xor v0,v0,v1 +[ 0-9a-f]+: 4453 xor v0,v0,v1 +[ 0-9a-f]+: 4453 xor v0,v0,v1 +[ 0-9a-f]+: 0083 1310 xor v0,v1,a0 +[ 0-9a-f]+: 03fe eb10 xor sp,s8,ra +[ 0-9a-f]+: 0082 1310 xor v0,v0,a0 +[ 0-9a-f]+: 0082 1310 xor v0,v0,a0 +[ 0-9a-f]+: 7043 8000 xori v0,v1,0x8000 +[ 0-9a-f]+: 7043 ffff xori v0,v1,0xffff +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0023 1310 xor v0,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0023 1310 xor v0,v1,at +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 7fff ori at,at,0x7fff +[ 0-9a-f]+: 0023 1310 xor v0,v1,at +[ 0-9a-f]+: 7064 0000 xori v1,a0,0x0 +[ 0-9a-f]+: 7064 7fff xori v1,a0,0x7fff +[ 0-9a-f]+: 7064 ffff xori v1,a0,0xffff +[ 0-9a-f]+: 7063 ffff xori v1,v1,0xffff +[ 0-9a-f]+: 7063 ffff xori v1,v1,0xffff +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9549 fffe beq t1,t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 9429 fffe beq t1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 404a fffe bgez t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 404a fffe bgez t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 408a fffe blez t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 016a 0b50 slt at,t2,t3 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 404a fffe bgez t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40ca fffe bgtz t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 902a 0002 slti at,t2,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9440 fffe beq zero,v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0062 0b90 sltu at,v0,v1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b402 fffe bnez v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b022 0002 sltiu at,v0,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4062 fffe bgezal v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: 40c2 fffe bgtz v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4002 fffe bltz v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 012a 0b50 slt at,t2,t1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0029 0b50 slt at,t1,at +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 012a 0b90 sltu at,t2,t1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 404a fffe bgez t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 012a 0b50 slt at,t2,t1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4009 fffe bltz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 012a 0b90 sltu at,t2,t1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4009 fffe bltz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 40ca fffe bgtz t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0149 0b50 slt at,t1,t2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4009 fffe bltz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b540 fffe bne zero,t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0149 0b90 sltu at,t1,t2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4009 fffe bltz t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4029 fffe bltzal t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b549 fffe bne t1,t2,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: b429 fffe bne t1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b549 fffe bne t1,t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: b429 fffe bne t1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 400a fffe bltz t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 400a fffe bltz t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40ca fffe bgtz t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 016a 0b50 slt at,t2,t3 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 400a fffe bltz t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 408a fffe blez t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 902a 0002 slti at,t2,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b440 fffe bne zero,v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0062 0b90 sltu at,v0,v1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9402 fffe beqz v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b022 0002 sltiu at,v0,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4002 fffe bltz v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4002 fffe bltz v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4082 fffe blez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 012a 0b50 slt at,t2,t1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4009 fffe bltz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 41a1 8000 lui at,0x8000 +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0029 0b50 slt at,t1,at +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 012a 0b90 sltu at,t2,t1 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4089 fffe blez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 400a fffe bltz t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 012a 0b50 slt at,t2,t1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 012a 0b90 sltu at,t2,t1 +[ 0-9a-f]+: b401 fffe bnez at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 408a fffe blez t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0149 0b50 slt at,t1,t2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 40c9 fffe bgtz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9029 0002 slti at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9540 fffe beq zero,t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 0149 0b90 sltu at,t1,t2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b409 fffe bnez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: b029 0002 sltiu at,t1,2 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4049 fffe bgez t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 00a4 1950 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9549 fffe beq t1,t2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 9409 fffe beqz t1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 9429 fffe beq t1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 6d01 addiu v0,sp,0 +[ 0-9a-f]+: 6d03 addiu v0,sp,4 +[ 0-9a-f]+: 6d05 addiu v0,sp,8 +[ 0-9a-f]+: 6d07 addiu v0,sp,12 +[ 0-9a-f]+: 6d09 addiu v0,sp,16 +[ 0-9a-f]+: 6d7f addiu v0,sp,252 +[ 0-9a-f]+: 6dff addiu v1,sp,252 +[ 0-9a-f]+: 6e7f addiu a0,sp,252 +[ 0-9a-f]+: 6eff addiu a1,sp,252 +[ 0-9a-f]+: 6f7f addiu a2,sp,252 +[ 0-9a-f]+: 6fff addiu a3,sp,252 +[ 0-9a-f]+: 6c7f addiu s0,sp,252 +[ 0-9a-f]+: 6cff addiu s1,sp,252 +[ 0-9a-f]+: 6d2e addiu v0,v0,-1 +[ 0-9a-f]+: 6d3e addiu v0,v1,-1 +[ 0-9a-f]+: 6d4e addiu v0,a0,-1 +[ 0-9a-f]+: 6d5e addiu v0,a1,-1 +[ 0-9a-f]+: 6d6e addiu v0,a2,-1 +[ 0-9a-f]+: 6d7e addiu v0,a3,-1 +[ 0-9a-f]+: 6d0e addiu v0,s0,-1 +[ 0-9a-f]+: 6d1e addiu v0,s1,-1 +[ 0-9a-f]+: 6d9e addiu v1,s1,-1 +[ 0-9a-f]+: 6e1e addiu a0,s1,-1 +[ 0-9a-f]+: 6e9e addiu a1,s1,-1 +[ 0-9a-f]+: 6f1e addiu a2,s1,-1 +[ 0-9a-f]+: 6f9e addiu a3,s1,-1 +[ 0-9a-f]+: 6c1e addiu s0,s1,-1 +[ 0-9a-f]+: 6c9e addiu s1,s1,-1 +[ 0-9a-f]+: 6c90 addiu s1,s1,1 +[ 0-9a-f]+: 6c92 addiu s1,s1,4 +[ 0-9a-f]+: 6c94 addiu s1,s1,8 +[ 0-9a-f]+: 6c96 addiu s1,s1,12 +[ 0-9a-f]+: 6c98 addiu s1,s1,16 +[ 0-9a-f]+: 6c9a addiu s1,s1,20 +[ 0-9a-f]+: 6c9c addiu s1,s1,24 +[ 0-9a-f]+: 4c05 addiu sp,sp,8 +[ 0-9a-f]+: 4c07 addiu sp,sp,12 +[ 0-9a-f]+: 4dfd addiu sp,sp,1016 +[ 0-9a-f]+: 4dff addiu sp,sp,1020 +[ 0-9a-f]+: 4c01 addiu sp,sp,1024 +[ 0-9a-f]+: 4c03 addiu sp,sp,1028 +[ 0-9a-f]+: 4ffb addiu sp,sp,-12 +[ 0-9a-f]+: 4ff9 addiu sp,sp,-16 +[ 0-9a-f]+: 4e03 addiu sp,sp,-1020 +[ 0-9a-f]+: 4e01 addiu sp,sp,-1024 +[ 0-9a-f]+: 4fff addiu sp,sp,-1028 +[ 0-9a-f]+: 4ffd addiu sp,sp,-1032 +[ 0-9a-f]+: 4c00 addiu zero,zero,0 +[ 0-9a-f]+: 4c40 addiu v0,v0,0 +[ 0-9a-f]+: 4c60 addiu v1,v1,0 +[ 0-9a-f]+: 4fc0 addiu s8,s8,0 +[ 0-9a-f]+: 4fe0 addiu ra,ra,0 +[ 0-9a-f]+: 4fe2 addiu ra,ra,1 +[ 0-9a-f]+: 4fe4 addiu ra,ra,2 +[ 0-9a-f]+: 4fe6 addiu ra,ra,3 +[ 0-9a-f]+: 4fee addiu ra,ra,7 +[ 0-9a-f]+: 4ff4 addiu ra,ra,-6 +[ 0-9a-f]+: 4ff2 addiu ra,ra,-7 +[ 0-9a-f]+: 4ff0 addiu ra,ra,-8 +[ 0-9a-f]+: f860 0004 sw v1,4\(zero\) +[ 0-9a-f]+: f880 0008 sw a0,8\(zero\) +[ 0-9a-f]+: f860 0004 sw v1,4\(zero\) +[ 0-9a-f]+: f880 0008 sw a0,8\(zero\) +[ 0-9a-f]+: f860 7fff sw v1,32767\(zero\) +[ 0-9a-f]+: f880 8003 sw a0,-32765\(zero\) +[ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) +[ 0-9a-f]+: f880 8004 sw a0,-32764\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) +[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: f861 0001 sw v1,1\(at\) +[ 0-9a-f]+: f881 0005 sw a0,5\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) +[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: f861 5678 sw v1,22136\(at\) +[ 0-9a-f]+: f881 567c sw a0,22140\(at\) +[ 0-9a-f]+: f864 0000 sw v1,0\(a0\) +[ 0-9a-f]+: f884 0004 sw a0,4\(a0\) +[ 0-9a-f]+: f864 0000 sw v1,0\(a0\) +[ 0-9a-f]+: f884 0004 sw a0,4\(a0\) +[ 0-9a-f]+: f864 7fff sw v1,32767\(a0\) +[ 0-9a-f]+: f884 8003 sw a0,-32765\(a0\) +[ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) +[ 0-9a-f]+: f884 8004 sw a0,-32764\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) +[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 0001 sw v1,1\(at\) +[ 0-9a-f]+: f881 0005 sw a0,5\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) +[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) +[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: f861 5678 sw v1,22136\(at\) +[ 0-9a-f]+: f881 567c sw a0,22140\(at\) +[ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) +[ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) +[ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) +[ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) +[ 0-9a-f]+: fc60 7fff lw v1,32767\(zero\) +[ 0-9a-f]+: fc80 8003 lw a0,-32765\(zero\) +[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) +[ 0-9a-f]+: fc80 8004 lw a0,-32764\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) +[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) +[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: fc61 0001 lw v1,1\(at\) +[ 0-9a-f]+: fc81 0005 lw a0,5\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) +[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) +[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) +[ 0-9a-f]+: fc81 567c lw a0,22140\(at\) +[ 0-9a-f]+: fc64 0000 lw v1,0\(a0\) +[ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) +[ 0-9a-f]+: fc64 0000 lw v1,0\(a0\) +[ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) +[ 0-9a-f]+: fc64 7fff lw v1,32767\(a0\) +[ 0-9a-f]+: fc84 8003 lw a0,-32765\(a0\) +[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) +[ 0-9a-f]+: fc84 8004 lw a0,-32764\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) +[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) +[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 0001 lw v1,1\(at\) +[ 0-9a-f]+: fc81 0005 lw a0,5\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) +[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) +[ 0-9a-f]+: 41a1 0000 lui at,0x0 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) +[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0024 0950 addu at,a0,at +[ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) +[ 0-9a-f]+: fc81 567c lw a0,22140\(at\) +[ 0-9a-f]+: 4700 jraddiusp 0 +[ 0-9a-f]+: 4701 jraddiusp 4 +[ 0-9a-f]+: 4702 jraddiusp 8 +[ 0-9a-f]+: 4703 jraddiusp 12 +[ 0-9a-f]+: 4704 jraddiusp 16 +[ 0-9a-f]+: 4705 jraddiusp 20 +[ 0-9a-f]+: 4706 jraddiusp 24 +[ 0-9a-f]+: 4707 jraddiusp 28 +[ 0-9a-f]+: 4708 jraddiusp 32 +[ 0-9a-f]+: 4709 jraddiusp 36 +[ 0-9a-f]+: 470a jraddiusp 40 +[ 0-9a-f]+: 471e jraddiusp 120 +[ 0-9a-f]+: 471f jraddiusp 124 +[ 0-9a-f]+: 2060 2000 ldc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 2000 ldc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 2004 ldc2 \$3,4\(zero\) +[ 0-9a-f]+: 2060 2004 ldc2 \$3,4\(zero\) +[ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) +[ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2fff ldc2 \$3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2fff ldc2 \$3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 2064 2fff ldc2 \$3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 2678 ldc2 \$3,1656\(at\) +[ 0-9a-f]+: 2060 0000 lwc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 0000 lwc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 0004 lwc2 \$3,4\(zero\) +[ 0-9a-f]+: 2060 0004 lwc2 \$3,4\(zero\) +[ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) +[ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0fff lwc2 \$3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0fff lwc2 \$3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 2064 0fff lwc2 \$3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 0678 lwc2 \$3,1656\(at\) +[ 0-9a-f]+: 00a0 4d3c mfc2 a1,\$0 +[ 0-9a-f]+: 00a1 4d3c mfc2 a1,\$1 +[ 0-9a-f]+: 00a2 4d3c mfc2 a1,\$2 +[ 0-9a-f]+: 00a3 4d3c mfc2 a1,\$3 +[ 0-9a-f]+: 00a4 4d3c mfc2 a1,\$4 +[ 0-9a-f]+: 00a5 4d3c mfc2 a1,\$5 +[ 0-9a-f]+: 00a6 4d3c mfc2 a1,\$6 +[ 0-9a-f]+: 00a7 4d3c mfc2 a1,\$7 +[ 0-9a-f]+: 00a8 4d3c mfc2 a1,\$8 +[ 0-9a-f]+: 00a9 4d3c mfc2 a1,\$9 +[ 0-9a-f]+: 00aa 4d3c mfc2 a1,\$10 +[ 0-9a-f]+: 00ab 4d3c mfc2 a1,\$11 +[ 0-9a-f]+: 00ac 4d3c mfc2 a1,\$12 +[ 0-9a-f]+: 00ad 4d3c mfc2 a1,\$13 +[ 0-9a-f]+: 00ae 4d3c mfc2 a1,\$14 +[ 0-9a-f]+: 00af 4d3c mfc2 a1,\$15 +[ 0-9a-f]+: 00b0 4d3c mfc2 a1,\$16 +[ 0-9a-f]+: 00b1 4d3c mfc2 a1,\$17 +[ 0-9a-f]+: 00b2 4d3c mfc2 a1,\$18 +[ 0-9a-f]+: 00b3 4d3c mfc2 a1,\$19 +[ 0-9a-f]+: 00b4 4d3c mfc2 a1,\$20 +[ 0-9a-f]+: 00b5 4d3c mfc2 a1,\$21 +[ 0-9a-f]+: 00b6 4d3c mfc2 a1,\$22 +[ 0-9a-f]+: 00b7 4d3c mfc2 a1,\$23 +[ 0-9a-f]+: 00b8 4d3c mfc2 a1,\$24 +[ 0-9a-f]+: 00b9 4d3c mfc2 a1,\$25 +[ 0-9a-f]+: 00ba 4d3c mfc2 a1,\$26 +[ 0-9a-f]+: 00bb 4d3c mfc2 a1,\$27 +[ 0-9a-f]+: 00bc 4d3c mfc2 a1,\$28 +[ 0-9a-f]+: 00bd 4d3c mfc2 a1,\$29 +[ 0-9a-f]+: 00be 4d3c mfc2 a1,\$30 +[ 0-9a-f]+: 00bf 4d3c mfc2 a1,\$31 +[ 0-9a-f]+: 00a0 8d3c mfhc2 a1,\$0 +[ 0-9a-f]+: 00a1 8d3c mfhc2 a1,\$1 +[ 0-9a-f]+: 00a2 8d3c mfhc2 a1,\$2 +[ 0-9a-f]+: 00a3 8d3c mfhc2 a1,\$3 +[ 0-9a-f]+: 00a4 8d3c mfhc2 a1,\$4 +[ 0-9a-f]+: 00a5 8d3c mfhc2 a1,\$5 +[ 0-9a-f]+: 00a6 8d3c mfhc2 a1,\$6 +[ 0-9a-f]+: 00a7 8d3c mfhc2 a1,\$7 +[ 0-9a-f]+: 00a8 8d3c mfhc2 a1,\$8 +[ 0-9a-f]+: 00a9 8d3c mfhc2 a1,\$9 +[ 0-9a-f]+: 00aa 8d3c mfhc2 a1,\$10 +[ 0-9a-f]+: 00ab 8d3c mfhc2 a1,\$11 +[ 0-9a-f]+: 00ac 8d3c mfhc2 a1,\$12 +[ 0-9a-f]+: 00ad 8d3c mfhc2 a1,\$13 +[ 0-9a-f]+: 00ae 8d3c mfhc2 a1,\$14 +[ 0-9a-f]+: 00af 8d3c mfhc2 a1,\$15 +[ 0-9a-f]+: 00b0 8d3c mfhc2 a1,\$16 +[ 0-9a-f]+: 00b1 8d3c mfhc2 a1,\$17 +[ 0-9a-f]+: 00b2 8d3c mfhc2 a1,\$18 +[ 0-9a-f]+: 00b3 8d3c mfhc2 a1,\$19 +[ 0-9a-f]+: 00b4 8d3c mfhc2 a1,\$20 +[ 0-9a-f]+: 00b5 8d3c mfhc2 a1,\$21 +[ 0-9a-f]+: 00b6 8d3c mfhc2 a1,\$22 +[ 0-9a-f]+: 00b7 8d3c mfhc2 a1,\$23 +[ 0-9a-f]+: 00b8 8d3c mfhc2 a1,\$24 +[ 0-9a-f]+: 00b9 8d3c mfhc2 a1,\$25 +[ 0-9a-f]+: 00ba 8d3c mfhc2 a1,\$26 +[ 0-9a-f]+: 00bb 8d3c mfhc2 a1,\$27 +[ 0-9a-f]+: 00bc 8d3c mfhc2 a1,\$28 +[ 0-9a-f]+: 00bd 8d3c mfhc2 a1,\$29 +[ 0-9a-f]+: 00be 8d3c mfhc2 a1,\$30 +[ 0-9a-f]+: 00bf 8d3c mfhc2 a1,\$31 +[ 0-9a-f]+: 00a0 5d3c mtc2 a1,\$0 +[ 0-9a-f]+: 00a1 5d3c mtc2 a1,\$1 +[ 0-9a-f]+: 00a2 5d3c mtc2 a1,\$2 +[ 0-9a-f]+: 00a3 5d3c mtc2 a1,\$3 +[ 0-9a-f]+: 00a4 5d3c mtc2 a1,\$4 +[ 0-9a-f]+: 00a5 5d3c mtc2 a1,\$5 +[ 0-9a-f]+: 00a6 5d3c mtc2 a1,\$6 +[ 0-9a-f]+: 00a7 5d3c mtc2 a1,\$7 +[ 0-9a-f]+: 00a8 5d3c mtc2 a1,\$8 +[ 0-9a-f]+: 00a9 5d3c mtc2 a1,\$9 +[ 0-9a-f]+: 00aa 5d3c mtc2 a1,\$10 +[ 0-9a-f]+: 00ab 5d3c mtc2 a1,\$11 +[ 0-9a-f]+: 00ac 5d3c mtc2 a1,\$12 +[ 0-9a-f]+: 00ad 5d3c mtc2 a1,\$13 +[ 0-9a-f]+: 00ae 5d3c mtc2 a1,\$14 +[ 0-9a-f]+: 00af 5d3c mtc2 a1,\$15 +[ 0-9a-f]+: 00b0 5d3c mtc2 a1,\$16 +[ 0-9a-f]+: 00b1 5d3c mtc2 a1,\$17 +[ 0-9a-f]+: 00b2 5d3c mtc2 a1,\$18 +[ 0-9a-f]+: 00b3 5d3c mtc2 a1,\$19 +[ 0-9a-f]+: 00b4 5d3c mtc2 a1,\$20 +[ 0-9a-f]+: 00b5 5d3c mtc2 a1,\$21 +[ 0-9a-f]+: 00b6 5d3c mtc2 a1,\$22 +[ 0-9a-f]+: 00b7 5d3c mtc2 a1,\$23 +[ 0-9a-f]+: 00b8 5d3c mtc2 a1,\$24 +[ 0-9a-f]+: 00b9 5d3c mtc2 a1,\$25 +[ 0-9a-f]+: 00ba 5d3c mtc2 a1,\$26 +[ 0-9a-f]+: 00bb 5d3c mtc2 a1,\$27 +[ 0-9a-f]+: 00bc 5d3c mtc2 a1,\$28 +[ 0-9a-f]+: 00bd 5d3c mtc2 a1,\$29 +[ 0-9a-f]+: 00be 5d3c mtc2 a1,\$30 +[ 0-9a-f]+: 00bf 5d3c mtc2 a1,\$31 +[ 0-9a-f]+: 00a0 9d3c mthc2 a1,\$0 +[ 0-9a-f]+: 00a1 9d3c mthc2 a1,\$1 +[ 0-9a-f]+: 00a2 9d3c mthc2 a1,\$2 +[ 0-9a-f]+: 00a3 9d3c mthc2 a1,\$3 +[ 0-9a-f]+: 00a4 9d3c mthc2 a1,\$4 +[ 0-9a-f]+: 00a5 9d3c mthc2 a1,\$5 +[ 0-9a-f]+: 00a6 9d3c mthc2 a1,\$6 +[ 0-9a-f]+: 00a7 9d3c mthc2 a1,\$7 +[ 0-9a-f]+: 00a8 9d3c mthc2 a1,\$8 +[ 0-9a-f]+: 00a9 9d3c mthc2 a1,\$9 +[ 0-9a-f]+: 00aa 9d3c mthc2 a1,\$10 +[ 0-9a-f]+: 00ab 9d3c mthc2 a1,\$11 +[ 0-9a-f]+: 00ac 9d3c mthc2 a1,\$12 +[ 0-9a-f]+: 00ad 9d3c mthc2 a1,\$13 +[ 0-9a-f]+: 00ae 9d3c mthc2 a1,\$14 +[ 0-9a-f]+: 00af 9d3c mthc2 a1,\$15 +[ 0-9a-f]+: 00b0 9d3c mthc2 a1,\$16 +[ 0-9a-f]+: 00b1 9d3c mthc2 a1,\$17 +[ 0-9a-f]+: 00b2 9d3c mthc2 a1,\$18 +[ 0-9a-f]+: 00b3 9d3c mthc2 a1,\$19 +[ 0-9a-f]+: 00b4 9d3c mthc2 a1,\$20 +[ 0-9a-f]+: 00b5 9d3c mthc2 a1,\$21 +[ 0-9a-f]+: 00b6 9d3c mthc2 a1,\$22 +[ 0-9a-f]+: 00b7 9d3c mthc2 a1,\$23 +[ 0-9a-f]+: 00b8 9d3c mthc2 a1,\$24 +[ 0-9a-f]+: 00b9 9d3c mthc2 a1,\$25 +[ 0-9a-f]+: 00ba 9d3c mthc2 a1,\$26 +[ 0-9a-f]+: 00bb 9d3c mthc2 a1,\$27 +[ 0-9a-f]+: 00bc 9d3c mthc2 a1,\$28 +[ 0-9a-f]+: 00bd 9d3c mthc2 a1,\$29 +[ 0-9a-f]+: 00be 9d3c mthc2 a1,\$30 +[ 0-9a-f]+: 00bf 9d3c mthc2 a1,\$31 +[ 0-9a-f]+: 2060 a000 sdc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 a000 sdc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 a004 sdc2 \$3,4\(zero\) +[ 0-9a-f]+: 2060 a004 sdc2 \$3,4\(zero\) +[ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) +[ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 afff sdc2 \$3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 afff sdc2 \$3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 2064 afff sdc2 \$3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 a678 sdc2 \$3,1656\(at\) +[ 0-9a-f]+: 2060 8000 swc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 8000 swc2 \$3,0\(zero\) +[ 0-9a-f]+: 2060 8004 swc2 \$3,4\(zero\) +[ 0-9a-f]+: 2060 8004 swc2 \$3,4\(zero\) +[ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) +[ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8fff swc2 \$3,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8fff swc2 \$3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 2064 8fff swc2 \$3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 2061 8678 swc2 \$3,1656\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3043 0000 addiu v0,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6042 3000 ll v0,0\(v0\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 b000 sc v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 0000 lwl v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 1000 lwr v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 8000 swl v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 9000 swr v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2201 0000 lwc2 \$16,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2201 8000 swc2 \$16,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 0000 lwl v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 1000 lwr v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 8000 swl v0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6041 9000 swr v0,0\(at\) +[ 0-9a-f]+: 03ff db7c sdbbp 0x3ff +[ 0-9a-f]+: 03ff 937c wait 0x3ff +[ 0-9a-f]+: 03ff 8b7c syscall 0x3ff +[ 0-9a-f]+: 03ff fffa cop2 0x7fffff +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0000 0000 nop + +[0-9a-f]+ : +[ 0-9a-f]+: 5400 01a0 prefx 0x0,zero\(zero\) +[ 0-9a-f]+: 5402 01a0 prefx 0x0,zero\(v0\) +[ 0-9a-f]+: 541f 01a0 prefx 0x0,zero\(ra\) +[ 0-9a-f]+: 545f 01a0 prefx 0x0,v0\(ra\) +[ 0-9a-f]+: 57ff 01a0 prefx 0x0,ra\(ra\) +[ 0-9a-f]+: 57ff 09a0 prefx 0x1,ra\(ra\) +[ 0-9a-f]+: 57ff 11a0 prefx 0x2,ra\(ra\) +[ 0-9a-f]+: 57ff f9a0 prefx 0x1f,ra\(ra\) +[ 0-9a-f]+: 5401 037b abs\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 037b abs\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 037b abs\.s \$f2,\$f2 +[ 0-9a-f]+: 5442 037b abs\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 237b abs\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 237b abs\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 237b abs\.d \$f2,\$f2 +[ 0-9a-f]+: 5442 237b abs\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 437b abs\.ps \$f0,\$f1 +[ 0-9a-f]+: 57df 437b abs\.ps \$f30,\$f31 +[ 0-9a-f]+: 5442 437b abs\.ps \$f2,\$f2 +[ 0-9a-f]+: 5442 437b abs\.ps \$f2,\$f2 +[ 0-9a-f]+: 5441 0030 add\.s \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e830 add\.s \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e830 add\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e830 add\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0130 add\.d \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e930 add\.d \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e930 add\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e930 add\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0230 add\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe ea30 add\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd ea30 add\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd ea30 add\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0019 alnv\.ps \$f0,\$f1,\$f2,zero +[ 0-9a-f]+: 5441 0099 alnv\.ps \$f0,\$f1,\$f2,v0 +[ 0-9a-f]+: 5441 07d9 alnv\.ps \$f0,\$f1,\$f2,ra +[ 0-9a-f]+: 57fe efd9 alnv\.ps \$f29,\$f30,\$f31,ra +[ 0-9a-f]+: 57fd efd9 alnv\.ps \$f29,\$f29,\$f31,ra +[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4380 fffe bc1f [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4384 fffe bc1f \$fcc1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4388 fffe bc1f \$fcc2,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 438c fffe bc1f \$fcc3,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4390 fffe bc1f \$fcc4,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4394 fffe bc1f \$fcc5,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4398 fffe bc1f \$fcc6,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 439c fffe bc1f \$fcc7,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43a0 fffe bc1t [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43a0 fffe bc1t [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43a4 fffe bc1t \$fcc1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43a8 fffe bc1t \$fcc2,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43ac fffe bc1t \$fcc3,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43b0 fffe bc1t \$fcc4,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43b4 fffe bc1t \$fcc5,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43b8 fffe bc1t \$fcc6,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 43bc fffe bc1t \$fcc7,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 fp_test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 5420 043c c\.f\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 043c c\.f\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 043c c\.f\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 243c c\.f\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e43c c\.f\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 003c c\.f\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 003c c\.f\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 003c c\.f\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 203c c\.f\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e03c c\.f\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 083c c\.f\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 083c c\.f\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 083c c\.f\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 483c c\.f\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c83c c\.f\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 047c c\.un\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 047c c\.un\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 047c c\.un\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 247c c\.un\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e47c c\.un\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 007c c\.un\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 007c c\.un\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 007c c\.un\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 207c c\.un\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e07c c\.un\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 087c c\.un\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 087c c\.un\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 087c c\.un\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 487c c\.un\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c87c c\.un\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 04bc c\.eq\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 04bc c\.eq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 04bc c\.eq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 24bc c\.eq\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e4bc c\.eq\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 00bc c\.eq\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 00bc c\.eq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 00bc c\.eq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 20bc c\.eq\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e0bc c\.eq\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 08bc c\.eq\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 08bc c\.eq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 08bc c\.eq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 48bc c\.eq\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c8bc c\.eq\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 04fc c\.ueq\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 04fc c\.ueq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 04fc c\.ueq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 24fc c\.ueq\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e4fc c\.ueq\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 00fc c\.ueq\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 00fc c\.ueq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 00fc c\.ueq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 20fc c\.ueq\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e0fc c\.ueq\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 08fc c\.ueq\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 08fc c\.ueq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 08fc c\.ueq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 48fc c\.ueq\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c8fc c\.ueq\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 053c c\.olt\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 053c c\.olt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 053c c\.olt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 253c c\.olt\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e53c c\.olt\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 013c c\.olt\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 013c c\.olt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 013c c\.olt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 213c c\.olt\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e13c c\.olt\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 093c c\.olt\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 093c c\.olt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 093c c\.olt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 493c c\.olt\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c93c c\.olt\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 057c c\.ult\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 057c c\.ult\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 057c c\.ult\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 257c c\.ult\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e57c c\.ult\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 017c c\.ult\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 017c c\.ult\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 017c c\.ult\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 217c c\.ult\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e17c c\.ult\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 097c c\.ult\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 097c c\.ult\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 097c c\.ult\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 497c c\.ult\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c97c c\.ult\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 05bc c\.ole\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 05bc c\.ole\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 05bc c\.ole\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 25bc c\.ole\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e5bc c\.ole\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 01bc c\.ole\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 01bc c\.ole\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 01bc c\.ole\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 21bc c\.ole\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e1bc c\.ole\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 09bc c\.ole\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 09bc c\.ole\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 09bc c\.ole\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 49bc c\.ole\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c9bc c\.ole\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 05fc c\.ule\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 05fc c\.ule\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 05fc c\.ule\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 25fc c\.ule\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e5fc c\.ule\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 01fc c\.ule\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 01fc c\.ule\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 01fc c\.ule\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 21fc c\.ule\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e1fc c\.ule\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 09fc c\.ule\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 09fc c\.ule\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 09fc c\.ule\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 49fc c\.ule\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe c9fc c\.ule\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 063c c\.sf\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 063c c\.sf\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 063c c\.sf\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 263c c\.sf\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e63c c\.sf\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 023c c\.sf\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 023c c\.sf\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 023c c\.sf\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 223c c\.sf\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e23c c\.sf\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0a3c c\.sf\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0a3c c\.sf\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0a3c c\.sf\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4a3c c\.sf\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe ca3c c\.sf\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 067c c\.ngle\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 067c c\.ngle\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 067c c\.ngle\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 267c c\.ngle\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e67c c\.ngle\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 027c c\.ngle\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 027c c\.ngle\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 027c c\.ngle\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 227c c\.ngle\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e27c c\.ngle\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0a7c c\.ngle\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0a7c c\.ngle\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0a7c c\.ngle\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4a7c c\.ngle\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe ca7c c\.ngle\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 06bc c\.seq\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 06bc c\.seq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 06bc c\.seq\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 26bc c\.seq\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e6bc c\.seq\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 02bc c\.seq\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 02bc c\.seq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 02bc c\.seq\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 22bc c\.seq\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e2bc c\.seq\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0abc c\.seq\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0abc c\.seq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0abc c\.seq\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4abc c\.seq\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cabc c\.seq\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 06fc c\.ngl\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 06fc c\.ngl\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 06fc c\.ngl\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 26fc c\.ngl\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e6fc c\.ngl\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 02fc c\.ngl\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 02fc c\.ngl\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 02fc c\.ngl\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 22fc c\.ngl\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e2fc c\.ngl\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0afc c\.ngl\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0afc c\.ngl\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0afc c\.ngl\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4afc c\.ngl\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cafc c\.ngl\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 073c c\.lt\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 073c c\.lt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 073c c\.lt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 273c c\.lt\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e73c c\.lt\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 033c c\.lt\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 033c c\.lt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 033c c\.lt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 233c c\.lt\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e33c c\.lt\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0b3c c\.lt\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0b3c c\.lt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0b3c c\.lt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4b3c c\.lt\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cb3c c\.lt\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 077c c\.nge\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 077c c\.nge\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 077c c\.nge\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 277c c\.nge\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e77c c\.nge\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 037c c\.nge\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 037c c\.nge\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 037c c\.nge\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 237c c\.nge\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e37c c\.nge\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0b7c c\.nge\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0b7c c\.nge\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0b7c c\.nge\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4b7c c\.nge\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cb7c c\.nge\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 07bc c\.le\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 07bc c\.le\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 07bc c\.le\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 27bc c\.le\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e7bc c\.le\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 03bc c\.le\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 03bc c\.le\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 03bc c\.le\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 23bc c\.le\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e3bc c\.le\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0bbc c\.le\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0bbc c\.le\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0bbc c\.le\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4bbc c\.le\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cbbc c\.le\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5420 07fc c\.ngt\.d \$f0,\$f1 +[ 0-9a-f]+: 57fe 07fc c\.ngt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 07fc c\.ngt\.d \$f30,\$f31 +[ 0-9a-f]+: 57fe 27fc c\.ngt\.d \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e7fc c\.ngt\.d \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 03fc c\.ngt\.s \$f0,\$f1 +[ 0-9a-f]+: 57fe 03fc c\.ngt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 03fc c\.ngt\.s \$f30,\$f31 +[ 0-9a-f]+: 57fe 23fc c\.ngt\.s \$fcc1,\$f30,\$f31 +[ 0-9a-f]+: 57fe e3fc c\.ngt\.s \$fcc7,\$f30,\$f31 +[ 0-9a-f]+: 5420 0bfc c\.ngt\.ps \$f0,\$f1 +[ 0-9a-f]+: 57fe 0bfc c\.ngt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 0bfc c\.ngt\.ps \$f30,\$f31 +[ 0-9a-f]+: 57fe 4bfc c\.ngt\.ps \$fcc2,\$f30,\$f31 +[ 0-9a-f]+: 57fe cbfc c\.ngt\.ps \$fcc6,\$f30,\$f31 +[ 0-9a-f]+: 5401 533b ceil\.l\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 533b ceil\.l\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 533b ceil\.l\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 133b ceil\.l\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 133b ceil\.l\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 133b ceil\.l\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 5b3b ceil\.w\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 5b3b ceil\.w\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 5b3b ceil\.w\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 1b3b ceil\.w\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 1b3b ceil\.w\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 1b3b ceil\.w\.s \$f2,\$f2 +[ 0-9a-f]+: 54a0 103b cfc1 a1,\$0 +[ 0-9a-f]+: 54a1 103b cfc1 a1,\$1 +[ 0-9a-f]+: 54a2 103b cfc1 a1,\$2 +[ 0-9a-f]+: 54a3 103b cfc1 a1,\$3 +[ 0-9a-f]+: 54a4 103b cfc1 a1,\$4 +[ 0-9a-f]+: 54a5 103b cfc1 a1,\$5 +[ 0-9a-f]+: 54a6 103b cfc1 a1,\$6 +[ 0-9a-f]+: 54a7 103b cfc1 a1,\$7 +[ 0-9a-f]+: 54a8 103b cfc1 a1,\$8 +[ 0-9a-f]+: 54a9 103b cfc1 a1,\$9 +[ 0-9a-f]+: 54aa 103b cfc1 a1,\$10 +[ 0-9a-f]+: 54ab 103b cfc1 a1,\$11 +[ 0-9a-f]+: 54ac 103b cfc1 a1,\$12 +[ 0-9a-f]+: 54ad 103b cfc1 a1,\$13 +[ 0-9a-f]+: 54ae 103b cfc1 a1,\$14 +[ 0-9a-f]+: 54af 103b cfc1 a1,\$15 +[ 0-9a-f]+: 54b0 103b cfc1 a1,\$16 +[ 0-9a-f]+: 54b1 103b cfc1 a1,\$17 +[ 0-9a-f]+: 54b2 103b cfc1 a1,\$18 +[ 0-9a-f]+: 54b3 103b cfc1 a1,\$19 +[ 0-9a-f]+: 54b4 103b cfc1 a1,\$20 +[ 0-9a-f]+: 54b5 103b cfc1 a1,\$21 +[ 0-9a-f]+: 54b6 103b cfc1 a1,\$22 +[ 0-9a-f]+: 54b7 103b cfc1 a1,\$23 +[ 0-9a-f]+: 54b8 103b cfc1 a1,\$24 +[ 0-9a-f]+: 54b9 103b cfc1 a1,\$25 +[ 0-9a-f]+: 54ba 103b cfc1 a1,\$26 +[ 0-9a-f]+: 54bb 103b cfc1 a1,\$27 +[ 0-9a-f]+: 54bc 103b cfc1 a1,\$28 +[ 0-9a-f]+: 54bd 103b cfc1 a1,\$29 +[ 0-9a-f]+: 54be 103b cfc1 a1,\$30 +[ 0-9a-f]+: 54bf 103b cfc1 a1,\$31 +[ 0-9a-f]+: 54a0 103b cfc1 a1,\$0 +[ 0-9a-f]+: 54a1 103b cfc1 a1,\$1 +[ 0-9a-f]+: 54a2 103b cfc1 a1,\$2 +[ 0-9a-f]+: 54a3 103b cfc1 a1,\$3 +[ 0-9a-f]+: 54a4 103b cfc1 a1,\$4 +[ 0-9a-f]+: 54a5 103b cfc1 a1,\$5 +[ 0-9a-f]+: 54a6 103b cfc1 a1,\$6 +[ 0-9a-f]+: 54a7 103b cfc1 a1,\$7 +[ 0-9a-f]+: 54a8 103b cfc1 a1,\$8 +[ 0-9a-f]+: 54a9 103b cfc1 a1,\$9 +[ 0-9a-f]+: 54aa 103b cfc1 a1,\$10 +[ 0-9a-f]+: 54ab 103b cfc1 a1,\$11 +[ 0-9a-f]+: 54ac 103b cfc1 a1,\$12 +[ 0-9a-f]+: 54ad 103b cfc1 a1,\$13 +[ 0-9a-f]+: 54ae 103b cfc1 a1,\$14 +[ 0-9a-f]+: 54af 103b cfc1 a1,\$15 +[ 0-9a-f]+: 54b0 103b cfc1 a1,\$16 +[ 0-9a-f]+: 54b1 103b cfc1 a1,\$17 +[ 0-9a-f]+: 54b2 103b cfc1 a1,\$18 +[ 0-9a-f]+: 54b3 103b cfc1 a1,\$19 +[ 0-9a-f]+: 54b4 103b cfc1 a1,\$20 +[ 0-9a-f]+: 54b5 103b cfc1 a1,\$21 +[ 0-9a-f]+: 54b6 103b cfc1 a1,\$22 +[ 0-9a-f]+: 54b7 103b cfc1 a1,\$23 +[ 0-9a-f]+: 54b8 103b cfc1 a1,\$24 +[ 0-9a-f]+: 54b9 103b cfc1 a1,\$25 +[ 0-9a-f]+: 54ba 103b cfc1 a1,\$26 +[ 0-9a-f]+: 54bb 103b cfc1 a1,\$27 +[ 0-9a-f]+: 54bc 103b cfc1 a1,\$28 +[ 0-9a-f]+: 54bd 103b cfc1 a1,\$29 +[ 0-9a-f]+: 54be 103b cfc1 a1,\$30 +[ 0-9a-f]+: 54bf 103b cfc1 a1,\$31 +[ 0-9a-f]+: 00a0 cd3c cfc2 a1,\$0 +[ 0-9a-f]+: 00a1 cd3c cfc2 a1,\$1 +[ 0-9a-f]+: 00a2 cd3c cfc2 a1,\$2 +[ 0-9a-f]+: 00a3 cd3c cfc2 a1,\$3 +[ 0-9a-f]+: 00a4 cd3c cfc2 a1,\$4 +[ 0-9a-f]+: 00a5 cd3c cfc2 a1,\$5 +[ 0-9a-f]+: 00a6 cd3c cfc2 a1,\$6 +[ 0-9a-f]+: 00a7 cd3c cfc2 a1,\$7 +[ 0-9a-f]+: 00a8 cd3c cfc2 a1,\$8 +[ 0-9a-f]+: 00a9 cd3c cfc2 a1,\$9 +[ 0-9a-f]+: 00aa cd3c cfc2 a1,\$10 +[ 0-9a-f]+: 00ab cd3c cfc2 a1,\$11 +[ 0-9a-f]+: 00ac cd3c cfc2 a1,\$12 +[ 0-9a-f]+: 00ad cd3c cfc2 a1,\$13 +[ 0-9a-f]+: 00ae cd3c cfc2 a1,\$14 +[ 0-9a-f]+: 00af cd3c cfc2 a1,\$15 +[ 0-9a-f]+: 00b0 cd3c cfc2 a1,\$16 +[ 0-9a-f]+: 00b1 cd3c cfc2 a1,\$17 +[ 0-9a-f]+: 00b2 cd3c cfc2 a1,\$18 +[ 0-9a-f]+: 00b3 cd3c cfc2 a1,\$19 +[ 0-9a-f]+: 00b4 cd3c cfc2 a1,\$20 +[ 0-9a-f]+: 00b5 cd3c cfc2 a1,\$21 +[ 0-9a-f]+: 00b6 cd3c cfc2 a1,\$22 +[ 0-9a-f]+: 00b7 cd3c cfc2 a1,\$23 +[ 0-9a-f]+: 00b8 cd3c cfc2 a1,\$24 +[ 0-9a-f]+: 00b9 cd3c cfc2 a1,\$25 +[ 0-9a-f]+: 00ba cd3c cfc2 a1,\$26 +[ 0-9a-f]+: 00bb cd3c cfc2 a1,\$27 +[ 0-9a-f]+: 00bc cd3c cfc2 a1,\$28 +[ 0-9a-f]+: 00bd cd3c cfc2 a1,\$29 +[ 0-9a-f]+: 00be cd3c cfc2 a1,\$30 +[ 0-9a-f]+: 00bf cd3c cfc2 a1,\$31 +[ 0-9a-f]+: 54a0 183b ctc1 a1,\$0 +[ 0-9a-f]+: 54a1 183b ctc1 a1,\$1 +[ 0-9a-f]+: 54a2 183b ctc1 a1,\$2 +[ 0-9a-f]+: 54a3 183b ctc1 a1,\$3 +[ 0-9a-f]+: 54a4 183b ctc1 a1,\$4 +[ 0-9a-f]+: 54a5 183b ctc1 a1,\$5 +[ 0-9a-f]+: 54a6 183b ctc1 a1,\$6 +[ 0-9a-f]+: 54a7 183b ctc1 a1,\$7 +[ 0-9a-f]+: 54a8 183b ctc1 a1,\$8 +[ 0-9a-f]+: 54a9 183b ctc1 a1,\$9 +[ 0-9a-f]+: 54aa 183b ctc1 a1,\$10 +[ 0-9a-f]+: 54ab 183b ctc1 a1,\$11 +[ 0-9a-f]+: 54ac 183b ctc1 a1,\$12 +[ 0-9a-f]+: 54ad 183b ctc1 a1,\$13 +[ 0-9a-f]+: 54ae 183b ctc1 a1,\$14 +[ 0-9a-f]+: 54af 183b ctc1 a1,\$15 +[ 0-9a-f]+: 54b0 183b ctc1 a1,\$16 +[ 0-9a-f]+: 54b1 183b ctc1 a1,\$17 +[ 0-9a-f]+: 54b2 183b ctc1 a1,\$18 +[ 0-9a-f]+: 54b3 183b ctc1 a1,\$19 +[ 0-9a-f]+: 54b4 183b ctc1 a1,\$20 +[ 0-9a-f]+: 54b5 183b ctc1 a1,\$21 +[ 0-9a-f]+: 54b6 183b ctc1 a1,\$22 +[ 0-9a-f]+: 54b7 183b ctc1 a1,\$23 +[ 0-9a-f]+: 54b8 183b ctc1 a1,\$24 +[ 0-9a-f]+: 54b9 183b ctc1 a1,\$25 +[ 0-9a-f]+: 54ba 183b ctc1 a1,\$26 +[ 0-9a-f]+: 54bb 183b ctc1 a1,\$27 +[ 0-9a-f]+: 54bc 183b ctc1 a1,\$28 +[ 0-9a-f]+: 54bd 183b ctc1 a1,\$29 +[ 0-9a-f]+: 54be 183b ctc1 a1,\$30 +[ 0-9a-f]+: 54bf 183b ctc1 a1,\$31 +[ 0-9a-f]+: 54a0 183b ctc1 a1,\$0 +[ 0-9a-f]+: 54a1 183b ctc1 a1,\$1 +[ 0-9a-f]+: 54a2 183b ctc1 a1,\$2 +[ 0-9a-f]+: 54a3 183b ctc1 a1,\$3 +[ 0-9a-f]+: 54a4 183b ctc1 a1,\$4 +[ 0-9a-f]+: 54a5 183b ctc1 a1,\$5 +[ 0-9a-f]+: 54a6 183b ctc1 a1,\$6 +[ 0-9a-f]+: 54a7 183b ctc1 a1,\$7 +[ 0-9a-f]+: 54a8 183b ctc1 a1,\$8 +[ 0-9a-f]+: 54a9 183b ctc1 a1,\$9 +[ 0-9a-f]+: 54aa 183b ctc1 a1,\$10 +[ 0-9a-f]+: 54ab 183b ctc1 a1,\$11 +[ 0-9a-f]+: 54ac 183b ctc1 a1,\$12 +[ 0-9a-f]+: 54ad 183b ctc1 a1,\$13 +[ 0-9a-f]+: 54ae 183b ctc1 a1,\$14 +[ 0-9a-f]+: 54af 183b ctc1 a1,\$15 +[ 0-9a-f]+: 54b0 183b ctc1 a1,\$16 +[ 0-9a-f]+: 54b1 183b ctc1 a1,\$17 +[ 0-9a-f]+: 54b2 183b ctc1 a1,\$18 +[ 0-9a-f]+: 54b3 183b ctc1 a1,\$19 +[ 0-9a-f]+: 54b4 183b ctc1 a1,\$20 +[ 0-9a-f]+: 54b5 183b ctc1 a1,\$21 +[ 0-9a-f]+: 54b6 183b ctc1 a1,\$22 +[ 0-9a-f]+: 54b7 183b ctc1 a1,\$23 +[ 0-9a-f]+: 54b8 183b ctc1 a1,\$24 +[ 0-9a-f]+: 54b9 183b ctc1 a1,\$25 +[ 0-9a-f]+: 54ba 183b ctc1 a1,\$26 +[ 0-9a-f]+: 54bb 183b ctc1 a1,\$27 +[ 0-9a-f]+: 54bc 183b ctc1 a1,\$28 +[ 0-9a-f]+: 54bd 183b ctc1 a1,\$29 +[ 0-9a-f]+: 54be 183b ctc1 a1,\$30 +[ 0-9a-f]+: 54bf 183b ctc1 a1,\$31 +[ 0-9a-f]+: 00a0 dd3c ctc2 a1,\$0 +[ 0-9a-f]+: 00a1 dd3c ctc2 a1,\$1 +[ 0-9a-f]+: 00a2 dd3c ctc2 a1,\$2 +[ 0-9a-f]+: 00a3 dd3c ctc2 a1,\$3 +[ 0-9a-f]+: 00a4 dd3c ctc2 a1,\$4 +[ 0-9a-f]+: 00a5 dd3c ctc2 a1,\$5 +[ 0-9a-f]+: 00a6 dd3c ctc2 a1,\$6 +[ 0-9a-f]+: 00a7 dd3c ctc2 a1,\$7 +[ 0-9a-f]+: 00a8 dd3c ctc2 a1,\$8 +[ 0-9a-f]+: 00a9 dd3c ctc2 a1,\$9 +[ 0-9a-f]+: 00aa dd3c ctc2 a1,\$10 +[ 0-9a-f]+: 00ab dd3c ctc2 a1,\$11 +[ 0-9a-f]+: 00ac dd3c ctc2 a1,\$12 +[ 0-9a-f]+: 00ad dd3c ctc2 a1,\$13 +[ 0-9a-f]+: 00ae dd3c ctc2 a1,\$14 +[ 0-9a-f]+: 00af dd3c ctc2 a1,\$15 +[ 0-9a-f]+: 00b0 dd3c ctc2 a1,\$16 +[ 0-9a-f]+: 00b1 dd3c ctc2 a1,\$17 +[ 0-9a-f]+: 00b2 dd3c ctc2 a1,\$18 +[ 0-9a-f]+: 00b3 dd3c ctc2 a1,\$19 +[ 0-9a-f]+: 00b4 dd3c ctc2 a1,\$20 +[ 0-9a-f]+: 00b5 dd3c ctc2 a1,\$21 +[ 0-9a-f]+: 00b6 dd3c ctc2 a1,\$22 +[ 0-9a-f]+: 00b7 dd3c ctc2 a1,\$23 +[ 0-9a-f]+: 00b8 dd3c ctc2 a1,\$24 +[ 0-9a-f]+: 00b9 dd3c ctc2 a1,\$25 +[ 0-9a-f]+: 00ba dd3c ctc2 a1,\$26 +[ 0-9a-f]+: 00bb dd3c ctc2 a1,\$27 +[ 0-9a-f]+: 00bc dd3c ctc2 a1,\$28 +[ 0-9a-f]+: 00bd dd3c ctc2 a1,\$29 +[ 0-9a-f]+: 00be dd3c ctc2 a1,\$30 +[ 0-9a-f]+: 00bf dd3c ctc2 a1,\$31 +[ 0-9a-f]+: 5401 537b cvt\.d\.l \$f0,\$f1 +[ 0-9a-f]+: 57df 537b cvt\.d\.l \$f30,\$f31 +[ 0-9a-f]+: 5442 537b cvt\.d\.l \$f2,\$f2 +[ 0-9a-f]+: 5401 137b cvt\.d\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 137b cvt\.d\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 137b cvt\.d\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 337b cvt\.d\.w \$f0,\$f1 +[ 0-9a-f]+: 57df 337b cvt\.d\.w \$f30,\$f31 +[ 0-9a-f]+: 5442 337b cvt\.d\.w \$f2,\$f2 +[ 0-9a-f]+: 5401 013b cvt\.l\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 013b cvt\.l\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 013b cvt\.l\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 413b cvt\.l\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 413b cvt\.l\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 413b cvt\.l\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 5b7b cvt\.s\.l \$f0,\$f1 +[ 0-9a-f]+: 57df 5b7b cvt\.s\.l \$f30,\$f31 +[ 0-9a-f]+: 5442 5b7b cvt\.s\.l \$f2,\$f2 +[ 0-9a-f]+: 5401 1b7b cvt\.s\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 1b7b cvt\.s\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 1b7b cvt\.s\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 3b7b cvt\.s\.w \$f0,\$f1 +[ 0-9a-f]+: 57df 3b7b cvt\.s\.w \$f30,\$f31 +[ 0-9a-f]+: 5442 3b7b cvt\.s\.w \$f2,\$f2 +[ 0-9a-f]+: 5401 213b cvt\.s\.pl \$f0,\$f1 +[ 0-9a-f]+: 57df 213b cvt\.s\.pl \$f30,\$f31 +[ 0-9a-f]+: 5442 213b cvt\.s\.pl \$f2,\$f2 +[ 0-9a-f]+: 5401 293b cvt\.s\.pu \$f0,\$f1 +[ 0-9a-f]+: 57df 293b cvt\.s\.pu \$f30,\$f31 +[ 0-9a-f]+: 5442 293b cvt\.s\.pu \$f2,\$f2 +[ 0-9a-f]+: 5401 093b cvt\.w\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 093b cvt\.w\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 093b cvt\.w\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 493b cvt\.w\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 493b cvt\.w\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 493b cvt\.w\.d \$f2,\$f2 +[ 0-9a-f]+: 5441 0180 cvt\.ps\.s \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e980 cvt\.ps\.s \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57fd e980 cvt\.ps\.s \$f29,\$f29,\$f31 +[ 0-9a-f]+: 57fd e980 cvt\.ps\.s \$f29,\$f29,\$f31 +[ 0-9a-f]+: 5441 01f0 div\.d \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e9f0 div\.d \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e9f0 div\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e9f0 div\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 00f0 div\.s \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e8f0 div\.s \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e8f0 div\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e8f0 div\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5401 433b floor\.l\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 433b floor\.l\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 433b floor\.l\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 033b floor\.l\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 033b floor\.l\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 033b floor\.l\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 4b3b floor\.w\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 4b3b floor\.w\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 4b3b floor\.w\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 0b3b floor\.w\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 0b3b floor\.w\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 0b3b floor\.w\.s \$f2,\$f2 +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 7fff ldc1 \$f3,32767\(a0\) +[ 0-9a-f]+: bc64 8000 ldc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 ffff ldc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0000 ldc1 \$f3,0\(at\) +[ 0-9a-f]+: bc64 8000 ldc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0001 ldc1 \$f3,1\(at\) +[ 0-9a-f]+: bc64 8001 ldc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0000 ldc1 \$f3,0\(at\) +[ 0-9a-f]+: bc64 ffff ldc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 5678 ldc1 \$f3,22136\(at\) +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 7fff ldc1 \$f3,32767\(a0\) +[ 0-9a-f]+: bc64 8000 ldc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 ffff ldc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0000 ldc1 \$f3,0\(at\) +[ 0-9a-f]+: bc64 8000 ldc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0001 ldc1 \$f3,1\(at\) +[ 0-9a-f]+: bc64 8001 ldc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 0000 ldc1 \$f3,0\(at\) +[ 0-9a-f]+: bc64 ffff ldc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: bc61 5678 ldc1 \$f3,22136\(at\) +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0000 ldc1 \$f3,0\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc60 0004 ldc1 \$f3,4\(zero\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 0000 ldc1 \$f3,0\(a0\) +[ 0-9a-f]+: bc64 7fff ldc1 \$f3,32767\(a0\) +[ 0-9a-f]+: bc64 8000 ldc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 5400 00c8 ldxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 00c8 ldxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 00c8 ldxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 00c8 ldxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 00c8 ldxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 08c8 ldxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 10c8 ldxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f8c8 ldxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 5400 0148 luxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 0148 luxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 0148 luxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 0148 luxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 0148 luxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 0948 luxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 1148 luxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f948 luxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 7fff lwc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 ffff lwc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0001 lwc1 \$f3,1\(at\) +[ 0-9a-f]+: 9c64 8001 lwc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 ffff lwc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 5678 lwc1 \$f3,22136\(at\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 7fff lwc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 ffff lwc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0001 lwc1 \$f3,1\(at\) +[ 0-9a-f]+: 9c64 8001 lwc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 ffff lwc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 5678 lwc1 \$f3,22136\(at\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0000 lwc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c60 0004 lwc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 0000 lwc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9c64 7fff lwc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 ffff lwc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 8000 lwc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0001 lwc1 \$f3,1\(at\) +[ 0-9a-f]+: 9c64 8001 lwc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 0000 lwc1 \$f3,0\(at\) +[ 0-9a-f]+: 9c64 ffff lwc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9c61 5678 lwc1 \$f3,22136\(at\) +[ 0-9a-f]+: 5400 0048 lwxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 0048 lwxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 0048 lwxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 0048 lwxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 0048 lwxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 0848 lwxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 1048 lwxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f848 lwxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 5462 0049 madd\.d \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e749 madd\.d \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0041 madd\.s \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e741 madd\.s \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0051 madd\.ps \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e751 madd\.ps \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 54a0 203b mfc1 a1,\$f0 +[ 0-9a-f]+: 54a1 203b mfc1 a1,\$f1 +[ 0-9a-f]+: 54a2 203b mfc1 a1,\$f2 +[ 0-9a-f]+: 54a3 203b mfc1 a1,\$f3 +[ 0-9a-f]+: 54a4 203b mfc1 a1,\$f4 +[ 0-9a-f]+: 54a5 203b mfc1 a1,\$f5 +[ 0-9a-f]+: 54a6 203b mfc1 a1,\$f6 +[ 0-9a-f]+: 54a7 203b mfc1 a1,\$f7 +[ 0-9a-f]+: 54a8 203b mfc1 a1,\$f8 +[ 0-9a-f]+: 54a9 203b mfc1 a1,\$f9 +[ 0-9a-f]+: 54aa 203b mfc1 a1,\$f10 +[ 0-9a-f]+: 54ab 203b mfc1 a1,\$f11 +[ 0-9a-f]+: 54ac 203b mfc1 a1,\$f12 +[ 0-9a-f]+: 54ad 203b mfc1 a1,\$f13 +[ 0-9a-f]+: 54ae 203b mfc1 a1,\$f14 +[ 0-9a-f]+: 54af 203b mfc1 a1,\$f15 +[ 0-9a-f]+: 54b0 203b mfc1 a1,\$f16 +[ 0-9a-f]+: 54b1 203b mfc1 a1,\$f17 +[ 0-9a-f]+: 54b2 203b mfc1 a1,\$f18 +[ 0-9a-f]+: 54b3 203b mfc1 a1,\$f19 +[ 0-9a-f]+: 54b4 203b mfc1 a1,\$f20 +[ 0-9a-f]+: 54b5 203b mfc1 a1,\$f21 +[ 0-9a-f]+: 54b6 203b mfc1 a1,\$f22 +[ 0-9a-f]+: 54b7 203b mfc1 a1,\$f23 +[ 0-9a-f]+: 54b8 203b mfc1 a1,\$f24 +[ 0-9a-f]+: 54b9 203b mfc1 a1,\$f25 +[ 0-9a-f]+: 54ba 203b mfc1 a1,\$f26 +[ 0-9a-f]+: 54bb 203b mfc1 a1,\$f27 +[ 0-9a-f]+: 54bc 203b mfc1 a1,\$f28 +[ 0-9a-f]+: 54bd 203b mfc1 a1,\$f29 +[ 0-9a-f]+: 54be 203b mfc1 a1,\$f30 +[ 0-9a-f]+: 54bf 203b mfc1 a1,\$f31 +[ 0-9a-f]+: 54a0 203b mfc1 a1,\$f0 +[ 0-9a-f]+: 54a1 203b mfc1 a1,\$f1 +[ 0-9a-f]+: 54a2 203b mfc1 a1,\$f2 +[ 0-9a-f]+: 54a3 203b mfc1 a1,\$f3 +[ 0-9a-f]+: 54a4 203b mfc1 a1,\$f4 +[ 0-9a-f]+: 54a5 203b mfc1 a1,\$f5 +[ 0-9a-f]+: 54a6 203b mfc1 a1,\$f6 +[ 0-9a-f]+: 54a7 203b mfc1 a1,\$f7 +[ 0-9a-f]+: 54a8 203b mfc1 a1,\$f8 +[ 0-9a-f]+: 54a9 203b mfc1 a1,\$f9 +[ 0-9a-f]+: 54aa 203b mfc1 a1,\$f10 +[ 0-9a-f]+: 54ab 203b mfc1 a1,\$f11 +[ 0-9a-f]+: 54ac 203b mfc1 a1,\$f12 +[ 0-9a-f]+: 54ad 203b mfc1 a1,\$f13 +[ 0-9a-f]+: 54ae 203b mfc1 a1,\$f14 +[ 0-9a-f]+: 54af 203b mfc1 a1,\$f15 +[ 0-9a-f]+: 54b0 203b mfc1 a1,\$f16 +[ 0-9a-f]+: 54b1 203b mfc1 a1,\$f17 +[ 0-9a-f]+: 54b2 203b mfc1 a1,\$f18 +[ 0-9a-f]+: 54b3 203b mfc1 a1,\$f19 +[ 0-9a-f]+: 54b4 203b mfc1 a1,\$f20 +[ 0-9a-f]+: 54b5 203b mfc1 a1,\$f21 +[ 0-9a-f]+: 54b6 203b mfc1 a1,\$f22 +[ 0-9a-f]+: 54b7 203b mfc1 a1,\$f23 +[ 0-9a-f]+: 54b8 203b mfc1 a1,\$f24 +[ 0-9a-f]+: 54b9 203b mfc1 a1,\$f25 +[ 0-9a-f]+: 54ba 203b mfc1 a1,\$f26 +[ 0-9a-f]+: 54bb 203b mfc1 a1,\$f27 +[ 0-9a-f]+: 54bc 203b mfc1 a1,\$f28 +[ 0-9a-f]+: 54bd 203b mfc1 a1,\$f29 +[ 0-9a-f]+: 54be 203b mfc1 a1,\$f30 +[ 0-9a-f]+: 54bf 203b mfc1 a1,\$f31 +[ 0-9a-f]+: 54a0 303b mfhc1 a1,\$f0 +[ 0-9a-f]+: 54a1 303b mfhc1 a1,\$f1 +[ 0-9a-f]+: 54a2 303b mfhc1 a1,\$f2 +[ 0-9a-f]+: 54a3 303b mfhc1 a1,\$f3 +[ 0-9a-f]+: 54a4 303b mfhc1 a1,\$f4 +[ 0-9a-f]+: 54a5 303b mfhc1 a1,\$f5 +[ 0-9a-f]+: 54a6 303b mfhc1 a1,\$f6 +[ 0-9a-f]+: 54a7 303b mfhc1 a1,\$f7 +[ 0-9a-f]+: 54a8 303b mfhc1 a1,\$f8 +[ 0-9a-f]+: 54a9 303b mfhc1 a1,\$f9 +[ 0-9a-f]+: 54aa 303b mfhc1 a1,\$f10 +[ 0-9a-f]+: 54ab 303b mfhc1 a1,\$f11 +[ 0-9a-f]+: 54ac 303b mfhc1 a1,\$f12 +[ 0-9a-f]+: 54ad 303b mfhc1 a1,\$f13 +[ 0-9a-f]+: 54ae 303b mfhc1 a1,\$f14 +[ 0-9a-f]+: 54af 303b mfhc1 a1,\$f15 +[ 0-9a-f]+: 54b0 303b mfhc1 a1,\$f16 +[ 0-9a-f]+: 54b1 303b mfhc1 a1,\$f17 +[ 0-9a-f]+: 54b2 303b mfhc1 a1,\$f18 +[ 0-9a-f]+: 54b3 303b mfhc1 a1,\$f19 +[ 0-9a-f]+: 54b4 303b mfhc1 a1,\$f20 +[ 0-9a-f]+: 54b5 303b mfhc1 a1,\$f21 +[ 0-9a-f]+: 54b6 303b mfhc1 a1,\$f22 +[ 0-9a-f]+: 54b7 303b mfhc1 a1,\$f23 +[ 0-9a-f]+: 54b8 303b mfhc1 a1,\$f24 +[ 0-9a-f]+: 54b9 303b mfhc1 a1,\$f25 +[ 0-9a-f]+: 54ba 303b mfhc1 a1,\$f26 +[ 0-9a-f]+: 54bb 303b mfhc1 a1,\$f27 +[ 0-9a-f]+: 54bc 303b mfhc1 a1,\$f28 +[ 0-9a-f]+: 54bd 303b mfhc1 a1,\$f29 +[ 0-9a-f]+: 54be 303b mfhc1 a1,\$f30 +[ 0-9a-f]+: 54bf 303b mfhc1 a1,\$f31 +[ 0-9a-f]+: 54a0 303b mfhc1 a1,\$f0 +[ 0-9a-f]+: 54a1 303b mfhc1 a1,\$f1 +[ 0-9a-f]+: 54a2 303b mfhc1 a1,\$f2 +[ 0-9a-f]+: 54a3 303b mfhc1 a1,\$f3 +[ 0-9a-f]+: 54a4 303b mfhc1 a1,\$f4 +[ 0-9a-f]+: 54a5 303b mfhc1 a1,\$f5 +[ 0-9a-f]+: 54a6 303b mfhc1 a1,\$f6 +[ 0-9a-f]+: 54a7 303b mfhc1 a1,\$f7 +[ 0-9a-f]+: 54a8 303b mfhc1 a1,\$f8 +[ 0-9a-f]+: 54a9 303b mfhc1 a1,\$f9 +[ 0-9a-f]+: 54aa 303b mfhc1 a1,\$f10 +[ 0-9a-f]+: 54ab 303b mfhc1 a1,\$f11 +[ 0-9a-f]+: 54ac 303b mfhc1 a1,\$f12 +[ 0-9a-f]+: 54ad 303b mfhc1 a1,\$f13 +[ 0-9a-f]+: 54ae 303b mfhc1 a1,\$f14 +[ 0-9a-f]+: 54af 303b mfhc1 a1,\$f15 +[ 0-9a-f]+: 54b0 303b mfhc1 a1,\$f16 +[ 0-9a-f]+: 54b1 303b mfhc1 a1,\$f17 +[ 0-9a-f]+: 54b2 303b mfhc1 a1,\$f18 +[ 0-9a-f]+: 54b3 303b mfhc1 a1,\$f19 +[ 0-9a-f]+: 54b4 303b mfhc1 a1,\$f20 +[ 0-9a-f]+: 54b5 303b mfhc1 a1,\$f21 +[ 0-9a-f]+: 54b6 303b mfhc1 a1,\$f22 +[ 0-9a-f]+: 54b7 303b mfhc1 a1,\$f23 +[ 0-9a-f]+: 54b8 303b mfhc1 a1,\$f24 +[ 0-9a-f]+: 54b9 303b mfhc1 a1,\$f25 +[ 0-9a-f]+: 54ba 303b mfhc1 a1,\$f26 +[ 0-9a-f]+: 54bb 303b mfhc1 a1,\$f27 +[ 0-9a-f]+: 54bc 303b mfhc1 a1,\$f28 +[ 0-9a-f]+: 54bd 303b mfhc1 a1,\$f29 +[ 0-9a-f]+: 54be 303b mfhc1 a1,\$f30 +[ 0-9a-f]+: 54bf 303b mfhc1 a1,\$f31 +[ 0-9a-f]+: 5401 207b mov\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 207b mov\.d \$f30,\$f31 +[ 0-9a-f]+: 5401 007b mov\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 007b mov\.s \$f30,\$f31 +[ 0-9a-f]+: 5401 407b mov\.ps \$f0,\$f1 +[ 0-9a-f]+: 57df 407b mov\.ps \$f30,\$f31 +[ 0-9a-f]+: 5443 0220 movf\.d \$f2,\$f3,\$fcc0 +[ 0-9a-f]+: 5443 2220 movf\.d \$f2,\$f3,\$fcc1 +[ 0-9a-f]+: 5443 4220 movf\.d \$f2,\$f3,\$fcc2 +[ 0-9a-f]+: 5443 6220 movf\.d \$f2,\$f3,\$fcc3 +[ 0-9a-f]+: 5443 8220 movf\.d \$f2,\$f3,\$fcc4 +[ 0-9a-f]+: 5443 a220 movf\.d \$f2,\$f3,\$fcc5 +[ 0-9a-f]+: 5443 c220 movf\.d \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 5443 e220 movf\.d \$f2,\$f3,\$fcc7 +[ 0-9a-f]+: 57df e220 movf\.d \$f30,\$f31,\$fcc7 +[ 0-9a-f]+: 5443 0020 movf\.s \$f2,\$f3,\$fcc0 +[ 0-9a-f]+: 5443 2020 movf\.s \$f2,\$f3,\$fcc1 +[ 0-9a-f]+: 5443 4020 movf\.s \$f2,\$f3,\$fcc2 +[ 0-9a-f]+: 5443 6020 movf\.s \$f2,\$f3,\$fcc3 +[ 0-9a-f]+: 5443 8020 movf\.s \$f2,\$f3,\$fcc4 +[ 0-9a-f]+: 5443 a020 movf\.s \$f2,\$f3,\$fcc5 +[ 0-9a-f]+: 5443 c020 movf\.s \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 5443 e020 movf\.s \$f2,\$f3,\$fcc7 +[ 0-9a-f]+: 57df e020 movf\.s \$f30,\$f31,\$fcc7 +[ 0-9a-f]+: 5443 0420 movf\.ps \$f2,\$f3,\$fcc0 +[ 0-9a-f]+: 5443 4420 movf\.ps \$f2,\$f3,\$fcc2 +[ 0-9a-f]+: 5443 8420 movf\.ps \$f2,\$f3,\$fcc4 +[ 0-9a-f]+: 5443 c420 movf\.ps \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 5443 c420 movf\.ps \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 57df c420 movf\.ps \$f30,\$f31,\$fcc6 +[ 0-9a-f]+: 5403 1138 movn\.d \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1138 movn\.d \$f2,\$f3,ra +[ 0-9a-f]+: 5403 1038 movn\.s \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1038 movn\.s \$f2,\$f3,ra +[ 0-9a-f]+: 5403 1238 movn\.ps \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1238 movn\.ps \$f2,\$f3,ra +[ 0-9a-f]+: 5443 0460 movt\.ps \$f2,\$f3,\$fcc0 +[ 0-9a-f]+: 5443 4460 movt\.ps \$f2,\$f3,\$fcc2 +[ 0-9a-f]+: 5443 8460 movt\.ps \$f2,\$f3,\$fcc4 +[ 0-9a-f]+: 5443 c460 movt\.ps \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 5443 c460 movt\.ps \$f2,\$f3,\$fcc6 +[ 0-9a-f]+: 57df c460 movt\.ps \$f30,\$f31,\$fcc6 +[ 0-9a-f]+: 5403 1178 movz\.d \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1178 movz\.d \$f2,\$f3,ra +[ 0-9a-f]+: 5403 1078 movz\.s \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1078 movz\.s \$f2,\$f3,ra +[ 0-9a-f]+: 5403 1278 movz\.ps \$f2,\$f3,zero +[ 0-9a-f]+: 57e3 1278 movz\.ps \$f2,\$f3,ra +[ 0-9a-f]+: 5462 0069 msub\.d \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e769 msub\.d \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0061 msub\.s \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e761 msub\.s \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0071 msub\.ps \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e771 msub\.ps \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 54a0 283b mtc1 a1,\$f0 +[ 0-9a-f]+: 54a1 283b mtc1 a1,\$f1 +[ 0-9a-f]+: 54a2 283b mtc1 a1,\$f2 +[ 0-9a-f]+: 54a3 283b mtc1 a1,\$f3 +[ 0-9a-f]+: 54a4 283b mtc1 a1,\$f4 +[ 0-9a-f]+: 54a5 283b mtc1 a1,\$f5 +[ 0-9a-f]+: 54a6 283b mtc1 a1,\$f6 +[ 0-9a-f]+: 54a7 283b mtc1 a1,\$f7 +[ 0-9a-f]+: 54a8 283b mtc1 a1,\$f8 +[ 0-9a-f]+: 54a9 283b mtc1 a1,\$f9 +[ 0-9a-f]+: 54aa 283b mtc1 a1,\$f10 +[ 0-9a-f]+: 54ab 283b mtc1 a1,\$f11 +[ 0-9a-f]+: 54ac 283b mtc1 a1,\$f12 +[ 0-9a-f]+: 54ad 283b mtc1 a1,\$f13 +[ 0-9a-f]+: 54ae 283b mtc1 a1,\$f14 +[ 0-9a-f]+: 54af 283b mtc1 a1,\$f15 +[ 0-9a-f]+: 54b0 283b mtc1 a1,\$f16 +[ 0-9a-f]+: 54b1 283b mtc1 a1,\$f17 +[ 0-9a-f]+: 54b2 283b mtc1 a1,\$f18 +[ 0-9a-f]+: 54b3 283b mtc1 a1,\$f19 +[ 0-9a-f]+: 54b4 283b mtc1 a1,\$f20 +[ 0-9a-f]+: 54b5 283b mtc1 a1,\$f21 +[ 0-9a-f]+: 54b6 283b mtc1 a1,\$f22 +[ 0-9a-f]+: 54b7 283b mtc1 a1,\$f23 +[ 0-9a-f]+: 54b8 283b mtc1 a1,\$f24 +[ 0-9a-f]+: 54b9 283b mtc1 a1,\$f25 +[ 0-9a-f]+: 54ba 283b mtc1 a1,\$f26 +[ 0-9a-f]+: 54bb 283b mtc1 a1,\$f27 +[ 0-9a-f]+: 54bc 283b mtc1 a1,\$f28 +[ 0-9a-f]+: 54bd 283b mtc1 a1,\$f29 +[ 0-9a-f]+: 54be 283b mtc1 a1,\$f30 +[ 0-9a-f]+: 54bf 283b mtc1 a1,\$f31 +[ 0-9a-f]+: 54a0 283b mtc1 a1,\$f0 +[ 0-9a-f]+: 54a1 283b mtc1 a1,\$f1 +[ 0-9a-f]+: 54a2 283b mtc1 a1,\$f2 +[ 0-9a-f]+: 54a3 283b mtc1 a1,\$f3 +[ 0-9a-f]+: 54a4 283b mtc1 a1,\$f4 +[ 0-9a-f]+: 54a5 283b mtc1 a1,\$f5 +[ 0-9a-f]+: 54a6 283b mtc1 a1,\$f6 +[ 0-9a-f]+: 54a7 283b mtc1 a1,\$f7 +[ 0-9a-f]+: 54a8 283b mtc1 a1,\$f8 +[ 0-9a-f]+: 54a9 283b mtc1 a1,\$f9 +[ 0-9a-f]+: 54aa 283b mtc1 a1,\$f10 +[ 0-9a-f]+: 54ab 283b mtc1 a1,\$f11 +[ 0-9a-f]+: 54ac 283b mtc1 a1,\$f12 +[ 0-9a-f]+: 54ad 283b mtc1 a1,\$f13 +[ 0-9a-f]+: 54ae 283b mtc1 a1,\$f14 +[ 0-9a-f]+: 54af 283b mtc1 a1,\$f15 +[ 0-9a-f]+: 54b0 283b mtc1 a1,\$f16 +[ 0-9a-f]+: 54b1 283b mtc1 a1,\$f17 +[ 0-9a-f]+: 54b2 283b mtc1 a1,\$f18 +[ 0-9a-f]+: 54b3 283b mtc1 a1,\$f19 +[ 0-9a-f]+: 54b4 283b mtc1 a1,\$f20 +[ 0-9a-f]+: 54b5 283b mtc1 a1,\$f21 +[ 0-9a-f]+: 54b6 283b mtc1 a1,\$f22 +[ 0-9a-f]+: 54b7 283b mtc1 a1,\$f23 +[ 0-9a-f]+: 54b8 283b mtc1 a1,\$f24 +[ 0-9a-f]+: 54b9 283b mtc1 a1,\$f25 +[ 0-9a-f]+: 54ba 283b mtc1 a1,\$f26 +[ 0-9a-f]+: 54bb 283b mtc1 a1,\$f27 +[ 0-9a-f]+: 54bc 283b mtc1 a1,\$f28 +[ 0-9a-f]+: 54bd 283b mtc1 a1,\$f29 +[ 0-9a-f]+: 54be 283b mtc1 a1,\$f30 +[ 0-9a-f]+: 54bf 283b mtc1 a1,\$f31 +[ 0-9a-f]+: 54a0 383b mthc1 a1,\$f0 +[ 0-9a-f]+: 54a1 383b mthc1 a1,\$f1 +[ 0-9a-f]+: 54a2 383b mthc1 a1,\$f2 +[ 0-9a-f]+: 54a3 383b mthc1 a1,\$f3 +[ 0-9a-f]+: 54a4 383b mthc1 a1,\$f4 +[ 0-9a-f]+: 54a5 383b mthc1 a1,\$f5 +[ 0-9a-f]+: 54a6 383b mthc1 a1,\$f6 +[ 0-9a-f]+: 54a7 383b mthc1 a1,\$f7 +[ 0-9a-f]+: 54a8 383b mthc1 a1,\$f8 +[ 0-9a-f]+: 54a9 383b mthc1 a1,\$f9 +[ 0-9a-f]+: 54aa 383b mthc1 a1,\$f10 +[ 0-9a-f]+: 54ab 383b mthc1 a1,\$f11 +[ 0-9a-f]+: 54ac 383b mthc1 a1,\$f12 +[ 0-9a-f]+: 54ad 383b mthc1 a1,\$f13 +[ 0-9a-f]+: 54ae 383b mthc1 a1,\$f14 +[ 0-9a-f]+: 54af 383b mthc1 a1,\$f15 +[ 0-9a-f]+: 54b0 383b mthc1 a1,\$f16 +[ 0-9a-f]+: 54b1 383b mthc1 a1,\$f17 +[ 0-9a-f]+: 54b2 383b mthc1 a1,\$f18 +[ 0-9a-f]+: 54b3 383b mthc1 a1,\$f19 +[ 0-9a-f]+: 54b4 383b mthc1 a1,\$f20 +[ 0-9a-f]+: 54b5 383b mthc1 a1,\$f21 +[ 0-9a-f]+: 54b6 383b mthc1 a1,\$f22 +[ 0-9a-f]+: 54b7 383b mthc1 a1,\$f23 +[ 0-9a-f]+: 54b8 383b mthc1 a1,\$f24 +[ 0-9a-f]+: 54b9 383b mthc1 a1,\$f25 +[ 0-9a-f]+: 54ba 383b mthc1 a1,\$f26 +[ 0-9a-f]+: 54bb 383b mthc1 a1,\$f27 +[ 0-9a-f]+: 54bc 383b mthc1 a1,\$f28 +[ 0-9a-f]+: 54bd 383b mthc1 a1,\$f29 +[ 0-9a-f]+: 54be 383b mthc1 a1,\$f30 +[ 0-9a-f]+: 54bf 383b mthc1 a1,\$f31 +[ 0-9a-f]+: 54a0 383b mthc1 a1,\$f0 +[ 0-9a-f]+: 54a1 383b mthc1 a1,\$f1 +[ 0-9a-f]+: 54a2 383b mthc1 a1,\$f2 +[ 0-9a-f]+: 54a3 383b mthc1 a1,\$f3 +[ 0-9a-f]+: 54a4 383b mthc1 a1,\$f4 +[ 0-9a-f]+: 54a5 383b mthc1 a1,\$f5 +[ 0-9a-f]+: 54a6 383b mthc1 a1,\$f6 +[ 0-9a-f]+: 54a7 383b mthc1 a1,\$f7 +[ 0-9a-f]+: 54a8 383b mthc1 a1,\$f8 +[ 0-9a-f]+: 54a9 383b mthc1 a1,\$f9 +[ 0-9a-f]+: 54aa 383b mthc1 a1,\$f10 +[ 0-9a-f]+: 54ab 383b mthc1 a1,\$f11 +[ 0-9a-f]+: 54ac 383b mthc1 a1,\$f12 +[ 0-9a-f]+: 54ad 383b mthc1 a1,\$f13 +[ 0-9a-f]+: 54ae 383b mthc1 a1,\$f14 +[ 0-9a-f]+: 54af 383b mthc1 a1,\$f15 +[ 0-9a-f]+: 54b0 383b mthc1 a1,\$f16 +[ 0-9a-f]+: 54b1 383b mthc1 a1,\$f17 +[ 0-9a-f]+: 54b2 383b mthc1 a1,\$f18 +[ 0-9a-f]+: 54b3 383b mthc1 a1,\$f19 +[ 0-9a-f]+: 54b4 383b mthc1 a1,\$f20 +[ 0-9a-f]+: 54b5 383b mthc1 a1,\$f21 +[ 0-9a-f]+: 54b6 383b mthc1 a1,\$f22 +[ 0-9a-f]+: 54b7 383b mthc1 a1,\$f23 +[ 0-9a-f]+: 54b8 383b mthc1 a1,\$f24 +[ 0-9a-f]+: 54b9 383b mthc1 a1,\$f25 +[ 0-9a-f]+: 54ba 383b mthc1 a1,\$f26 +[ 0-9a-f]+: 54bb 383b mthc1 a1,\$f27 +[ 0-9a-f]+: 54bc 383b mthc1 a1,\$f28 +[ 0-9a-f]+: 54bd 383b mthc1 a1,\$f29 +[ 0-9a-f]+: 54be 383b mthc1 a1,\$f30 +[ 0-9a-f]+: 54bf 383b mthc1 a1,\$f31 +[ 0-9a-f]+: 5441 00b0 mul\.s \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e8b0 mul\.s \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e8b0 mul\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e8b0 mul\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 01b0 mul\.d \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e9b0 mul\.d \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e9b0 mul\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e9b0 mul\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 02b0 mul\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe eab0 mul\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd eab0 mul\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd eab0 mul\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5401 0b7b neg\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 0b7b neg\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 0b7b neg\.s \$f2,\$f2 +[ 0-9a-f]+: 5442 0b7b neg\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 2b7b neg\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 2b7b neg\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 2b7b neg\.d \$f2,\$f2 +[ 0-9a-f]+: 5442 2b7b neg\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 4b7b neg\.ps \$f0,\$f1 +[ 0-9a-f]+: 57df 4b7b neg\.ps \$f30,\$f31 +[ 0-9a-f]+: 5442 4b7b neg\.ps \$f2,\$f2 +[ 0-9a-f]+: 5442 4b7b neg\.ps \$f2,\$f2 +[ 0-9a-f]+: 5462 004a nmadd\.d \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e74a nmadd\.d \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0042 nmadd\.s \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e742 nmadd\.s \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0052 nmadd\.ps \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e752 nmadd\.ps \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 006a nmsub\.d \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e76a nmsub\.d \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0062 nmsub\.s \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e762 nmsub\.s \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5462 0072 nmsub\.ps \$f0,\$f1,\$f2,\$f3 +[ 0-9a-f]+: 57fe e772 nmsub\.ps \$f28,\$f29,\$f30,\$f31 +[ 0-9a-f]+: 5441 0080 pll\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e880 pll\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e880 pll\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e880 pll\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 00c0 plu\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e8c0 plu\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e8c0 plu\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e8c0 plu\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0100 pul\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e900 pul\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e900 pul\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e900 pul\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0140 puu\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e940 puu\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e940 puu\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e940 puu\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5401 123b recip\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 123b recip\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 123b recip\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 523b recip\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 523b recip\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 523b recip\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 333b round\.l\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 333b round\.l\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 333b round\.l\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 733b round\.l\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 733b round\.l\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 733b round\.l\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 3b3b round\.w\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 3b3b round\.w\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 3b3b round\.w\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 7b3b round\.w\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 7b3b round\.w\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 7b3b round\.w\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 023b rsqrt\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 023b rsqrt\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 023b rsqrt\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 423b rsqrt\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 423b rsqrt\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 423b rsqrt\.d \$f2,\$f2 +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 7fff sdc1 \$f3,32767\(a0\) +[ 0-9a-f]+: b864 8000 sdc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 ffff sdc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0000 sdc1 \$f3,0\(at\) +[ 0-9a-f]+: b864 8000 sdc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0001 sdc1 \$f3,1\(at\) +[ 0-9a-f]+: b864 8001 sdc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0000 sdc1 \$f3,0\(at\) +[ 0-9a-f]+: b864 ffff sdc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 5678 sdc1 \$f3,22136\(at\) +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 7fff sdc1 \$f3,32767\(a0\) +[ 0-9a-f]+: b864 8000 sdc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 ffff sdc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0000 sdc1 \$f3,0\(at\) +[ 0-9a-f]+: b864 8000 sdc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0001 sdc1 \$f3,1\(at\) +[ 0-9a-f]+: b864 8001 sdc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 0000 sdc1 \$f3,0\(at\) +[ 0-9a-f]+: b864 ffff sdc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: b861 5678 sdc1 \$f3,22136\(at\) +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0000 sdc1 \$f3,0\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b860 0004 sdc1 \$f3,4\(zero\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 0000 sdc1 \$f3,0\(a0\) +[ 0-9a-f]+: b864 7fff sdc1 \$f3,32767\(a0\) +[ 0-9a-f]+: b864 8000 sdc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 5400 0108 sdxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 0108 sdxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 0108 sdxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 0108 sdxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 0108 sdxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 0908 sdxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 1108 sdxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f908 sdxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 5401 0a3b sqrt\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 0a3b sqrt\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 0a3b sqrt\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 4a3b sqrt\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 4a3b sqrt\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 4a3b sqrt\.d \$f2,\$f2 +[ 0-9a-f]+: 5441 0070 sub\.s \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e870 sub\.s \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e870 sub\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e870 sub\.s \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0170 sub\.d \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe e970 sub\.d \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd e970 sub\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd e970 sub\.d \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5441 0270 sub\.ps \$f0,\$f1,\$f2 +[ 0-9a-f]+: 57fe ea70 sub\.ps \$f29,\$f30,\$f31 +[ 0-9a-f]+: 57dd ea70 sub\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 57dd ea70 sub\.ps \$f29,\$f29,\$f30 +[ 0-9a-f]+: 5400 0188 suxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 0188 suxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 0188 suxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 0188 suxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 0188 suxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 0988 suxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 1188 suxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f988 suxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 7fff swc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 ffff swc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0001 swc1 \$f3,1\(at\) +[ 0-9a-f]+: 9864 8001 swc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 ffff swc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 5678 swc1 \$f3,22136\(at\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 7fff swc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 ffff swc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0001 swc1 \$f3,1\(at\) +[ 0-9a-f]+: 9864 8001 swc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 ffff swc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 5678 swc1 \$f3,22136\(at\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0000 swc1 \$f3,0\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9860 0004 swc1 \$f3,4\(zero\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 0000 swc1 \$f3,0\(a0\) +[ 0-9a-f]+: 9864 7fff swc1 \$f3,32767\(a0\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 ffff swc1 \$f3,-1\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 8000 swc1 \$f3,-32768\(a0\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0001 swc1 \$f3,1\(at\) +[ 0-9a-f]+: 9864 8001 swc1 \$f3,-32767\(a0\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 0000 swc1 \$f3,0\(at\) +[ 0-9a-f]+: 9864 ffff swc1 \$f3,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 9861 5678 swc1 \$f3,22136\(at\) +[ 0-9a-f]+: 5400 0048 lwxc1 \$f0,zero\(zero\) +[ 0-9a-f]+: 5402 0048 lwxc1 \$f0,zero\(v0\) +[ 0-9a-f]+: 541f 0048 lwxc1 \$f0,zero\(ra\) +[ 0-9a-f]+: 545f 0048 lwxc1 \$f0,v0\(ra\) +[ 0-9a-f]+: 57ff 0048 lwxc1 \$f0,ra\(ra\) +[ 0-9a-f]+: 57ff 0848 lwxc1 \$f1,ra\(ra\) +[ 0-9a-f]+: 57ff 1048 lwxc1 \$f2,ra\(ra\) +[ 0-9a-f]+: 57ff f848 lwxc1 \$f31,ra\(ra\) +[ 0-9a-f]+: 5401 233b trunc\.l\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 233b trunc\.l\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 233b trunc\.l\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 633b trunc\.l\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 633b trunc\.l\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 633b trunc\.l\.d \$f2,\$f2 +[ 0-9a-f]+: 5401 2b3b trunc\.w\.s \$f0,\$f1 +[ 0-9a-f]+: 57df 2b3b trunc\.w\.s \$f30,\$f31 +[ 0-9a-f]+: 5442 2b3b trunc\.w\.s \$f2,\$f2 +[ 0-9a-f]+: 5401 6b3b trunc\.w\.d \$f0,\$f1 +[ 0-9a-f]+: 57df 6b3b trunc\.w\.d \$f30,\$f31 +[ 0-9a-f]+: 5442 6b3b trunc\.w\.d \$f2,\$f2 +[ 0-9a-f]+: 5443 017b movf v0,v1,\$fcc0 +[ 0-9a-f]+: 57df 017b movf s8,ra,\$fcc0 +[ 0-9a-f]+: 57df 217b movf s8,ra,\$fcc1 +[ 0-9a-f]+: 57df 417b movf s8,ra,\$fcc2 +[ 0-9a-f]+: 57df 617b movf s8,ra,\$fcc3 +[ 0-9a-f]+: 57df 817b movf s8,ra,\$fcc4 +[ 0-9a-f]+: 57df a17b movf s8,ra,\$fcc5 +[ 0-9a-f]+: 57df c17b movf s8,ra,\$fcc6 +[ 0-9a-f]+: 57df e17b movf s8,ra,\$fcc7 +[ 0-9a-f]+: 5443 097b movt v0,v1,\$fcc0 +[ 0-9a-f]+: 57df 097b movt s8,ra,\$fcc0 +[ 0-9a-f]+: 57df 297b movt s8,ra,\$fcc1 +[ 0-9a-f]+: 57df 497b movt s8,ra,\$fcc2 +[ 0-9a-f]+: 57df 697b movt s8,ra,\$fcc3 +[ 0-9a-f]+: 57df 897b movt s8,ra,\$fcc4 +[ 0-9a-f]+: 57df a97b movt s8,ra,\$fcc5 +[ 0-9a-f]+: 57df c97b movt s8,ra,\$fcc6 +[ 0-9a-f]+: 57df e97b movt s8,ra,\$fcc7 +[ 0-9a-f]+: 43a4 fffe bc1t \$fcc1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 05d8 addu v1,a0,a1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4388 fffe bc1f \$fcc2,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0107 3150 addu a2,a3,t0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 438c fffe bc1f \$fcc3,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 05d8 addu v1,a0,a1 +[ 0-9a-f]+: 43b0 fffe bc1t \$fcc4,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0107 3150 addu a2,a3,t0 + +[0-9a-f]+ : +[ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c43 move v0,v1 +[ 0-9a-f]+: 5860 1190 dneg v0,v1 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 5840 1190 dneg v0,v0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 5840 1190 dneg v0,v0 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 5883 1110 dadd v0,v1,a0 +[ 0-9a-f]+: 5bfe e910 dadd sp,s8,ra +[ 0-9a-f]+: 5862 1110 dadd v0,v0,v1 +[ 0-9a-f]+: 5862 1110 dadd v0,v0,v1 +[ 0-9a-f]+: 5843 001c daddi v0,v1,0 +[ 0-9a-f]+: 5843 005c daddi v0,v1,1 +[ 0-9a-f]+: 5843 801c daddi v0,v1,-512 +[ 0-9a-f]+: 5843 7fdc daddi v0,v1,511 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5821 8000 dsll at,at,0x10 +[ 0-9a-f]+: 5021 8765 ori at,at,0x8765 +[ 0-9a-f]+: 5821 8000 dsll at,at,0x10 +[ 0-9a-f]+: 5021 4321 ori at,at,0x4321 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 5843 001c daddi v0,v1,0 +[ 0-9a-f]+: 5843 005c daddi v0,v1,1 +[ 0-9a-f]+: 5843 801c daddi v0,v1,-512 +[ 0-9a-f]+: 5843 7fdc daddi v0,v1,511 +[ 0-9a-f]+: 5842 7fdc daddi v0,v0,511 +[ 0-9a-f]+: 5842 7fdc daddi v0,v0,511 +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 1110 dadd v0,v1,at +[ 0-9a-f]+: 5c43 0000 daddiu v0,v1,0 +[ 0-9a-f]+: 5c43 8000 daddiu v0,v1,-32768 +[ 0-9a-f]+: 5c43 7fff daddiu v0,v1,32767 +[ 0-9a-f]+: 5c42 7fff daddiu v0,v0,32767 +[ 0-9a-f]+: 5c42 7fff daddiu v0,v0,32767 +[ 0-9a-f]+: 5883 1150 daddu v0,v1,a0 +[ 0-9a-f]+: 5bfe e950 daddu sp,s8,ra +[ 0-9a-f]+: 5862 1150 daddu v0,v0,v1 +[ 0-9a-f]+: 5862 1150 daddu v0,v0,v1 +[ 0-9a-f]+: 5803 1150 move v0,v1 +[ 0-9a-f]+: 5c43 0000 daddiu v0,v1,0 +[ 0-9a-f]+: 5c43 0001 daddiu v0,v1,1 +[ 0-9a-f]+: 5c43 7fff daddiu v0,v1,32767 +[ 0-9a-f]+: 5c43 8000 daddiu v0,v1,-32768 +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 5823 1150 daddu v0,v1,at +[ 0-9a-f]+: 5843 4b3c dclo v0,v1 +[ 0-9a-f]+: 5862 4b3c dclo v1,v0 +[ 0-9a-f]+: 5843 5b3c dclz v0,v1 +[ 0-9a-f]+: 5862 5b3c dclz v1,v0 +[ 0-9a-f]+: 5862 ab3c ddiv zero,v0,v1 +[ 0-9a-f]+: 5bfe ab3c ddiv zero,s8,ra +[ 0-9a-f]+: 5860 ab3c ddiv zero,zero,v1 +[ 0-9a-f]+: 5be0 ab3c ddiv zero,zero,ra +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: b404 fffe bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 5883 ab3c ddiv zero,v1,a0 +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b424 fffe bne a0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 5821 f808 dsll32 at,at,0x1f +[ 0-9a-f]+: b423 fffe bne v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 5880 1990 dneg v1,a0 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 5824 ab3c ddiv zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 5862 bb3c ddivu zero,v0,v1 +[ 0-9a-f]+: 5bfe bb3c ddivu zero,s8,ra +[ 0-9a-f]+: 5860 bb3c ddivu zero,zero,v1 +[ 0-9a-f]+: 5be0 bb3c ddivu zero,zero,ra +[ 0-9a-f]+: b400 fffe bnez zero,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 5803 bb3c ddivu zero,v1,zero +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: b404 fffe bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 5883 bb3c ddivu zero,v1,a0 +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: 0c64 move v1,a0 +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 5824 bb3c ddivu zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 5824 bb3c ddivu zero,a0,at +[ 0-9a-f]+: 4643 mflo v1 +[ 0-9a-f]+: 5843 07ec dext v0,v1,0x1f,0x1 +[ 0-9a-f]+: 5843 f82c dext v0,v1,0x0,0x20 +[ 0-9a-f]+: 5843 07e4 dextm v0,v1,0x1f,0x21 +[ 0-9a-f]+: 5843 07e4 dextm v0,v1,0x1f,0x21 +[ 0-9a-f]+: 5843 4854 dextu v0,v1,0x21,0xa +[ 0-9a-f]+: 5843 4854 dextu v0,v1,0x21,0xa +[ 0-9a-f]+: 5843 ffcc dins v0,v1,0x1f,0x1 +[ 0-9a-f]+: 5843 f80c dins v0,v1,0x0,0x20 +[ 0-9a-f]+: 5843 ffc4 dinsm v0,v1,0x1f,0x21 +[ 0-9a-f]+: 5843 ffc4 dinsm v0,v1,0x1f,0x21 +[ 0-9a-f]+: 5843 5074 dinsu v0,v1,0x21,0xa +[ 0-9a-f]+: 5843 5074 dinsu v0,v1,0x21,0xa +[ 0-9a-f]+: 41a2 0000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 test +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 41a2 0000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 test +[ 0-9a-f]+: 3042 0000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 3040 8000 li v0,-32768 +[ 0-9a-f]+: 3040 7fff li v0,32767 +[ 0-9a-f]+: 5040 ffff li v0,0xffff +[ 0-9a-f]+: 41a2 1234 lui v0,0x1234 +[ 0-9a-f]+: 5042 5678 ori v0,v0,0x5678 +[ 0-9a-f]+: 5840 00fc dmfc0 v0,c0_index +[ 0-9a-f]+: 5841 00fc dmfc0 v0,c0_random +[ 0-9a-f]+: 5842 00fc dmfc0 v0,c0_entrylo0 +[ 0-9a-f]+: 5843 00fc dmfc0 v0,c0_entrylo1 +[ 0-9a-f]+: 5844 00fc dmfc0 v0,c0_context +[ 0-9a-f]+: 5845 00fc dmfc0 v0,c0_pagemask +[ 0-9a-f]+: 5846 00fc dmfc0 v0,c0_wired +[ 0-9a-f]+: 5847 00fc dmfc0 v0,c0_hwrena +[ 0-9a-f]+: 5848 00fc dmfc0 v0,c0_badvaddr +[ 0-9a-f]+: 5849 00fc dmfc0 v0,c0_count +[ 0-9a-f]+: 584a 00fc dmfc0 v0,c0_entryhi +[ 0-9a-f]+: 584b 00fc dmfc0 v0,c0_compare +[ 0-9a-f]+: 584c 00fc dmfc0 v0,c0_status +[ 0-9a-f]+: 584d 00fc dmfc0 v0,c0_cause +[ 0-9a-f]+: 584e 00fc dmfc0 v0,c0_epc +[ 0-9a-f]+: 584f 00fc dmfc0 v0,c0_prid +[ 0-9a-f]+: 5850 00fc dmfc0 v0,c0_config +[ 0-9a-f]+: 5851 00fc dmfc0 v0,c0_lladdr +[ 0-9a-f]+: 5852 00fc dmfc0 v0,c0_watchlo +[ 0-9a-f]+: 5853 00fc dmfc0 v0,c0_watchhi +[ 0-9a-f]+: 5854 00fc dmfc0 v0,c0_xcontext +[ 0-9a-f]+: 5855 00fc dmfc0 v0,\$21 +[ 0-9a-f]+: 5856 00fc dmfc0 v0,\$22 +[ 0-9a-f]+: 5857 00fc dmfc0 v0,c0_debug +[ 0-9a-f]+: 5858 00fc dmfc0 v0,c0_depc +[ 0-9a-f]+: 5859 00fc dmfc0 v0,c0_perfcnt +[ 0-9a-f]+: 585a 00fc dmfc0 v0,c0_errctl +[ 0-9a-f]+: 585b 00fc dmfc0 v0,c0_cacheerr +[ 0-9a-f]+: 585c 00fc dmfc0 v0,c0_taglo +[ 0-9a-f]+: 585d 00fc dmfc0 v0,c0_taghi +[ 0-9a-f]+: 585e 00fc dmfc0 v0,c0_errorepc +[ 0-9a-f]+: 585f 00fc dmfc0 v0,c0_desave +[ 0-9a-f]+: 5840 00fc dmfc0 v0,c0_index +[ 0-9a-f]+: 5840 08fc dmfc0 v0,c0_mvpcontrol +[ 0-9a-f]+: 5840 10fc dmfc0 v0,c0_mvpconf0 +[ 0-9a-f]+: 5840 18fc dmfc0 v0,c0_mvpconf1 +[ 0-9a-f]+: 5840 20fc dmfc0 v0,\$0,4 +[ 0-9a-f]+: 5840 28fc dmfc0 v0,\$0,5 +[ 0-9a-f]+: 5840 30fc dmfc0 v0,\$0,6 +[ 0-9a-f]+: 5840 38fc dmfc0 v0,\$0,7 +[ 0-9a-f]+: 5841 00fc dmfc0 v0,c0_random +[ 0-9a-f]+: 5841 08fc dmfc0 v0,c0_vpecontrol +[ 0-9a-f]+: 5841 10fc dmfc0 v0,c0_vpeconf0 +[ 0-9a-f]+: 5841 18fc dmfc0 v0,c0_vpeconf1 +[ 0-9a-f]+: 5841 20fc dmfc0 v0,c0_yqmask +[ 0-9a-f]+: 5841 28fc dmfc0 v0,c0_vpeschedule +[ 0-9a-f]+: 5841 30fc dmfc0 v0,c0_vpeschefback +[ 0-9a-f]+: 5841 38fc dmfc0 v0,\$1,7 +[ 0-9a-f]+: 5842 00fc dmfc0 v0,c0_entrylo0 +[ 0-9a-f]+: 5842 08fc dmfc0 v0,c0_tcstatus +[ 0-9a-f]+: 5842 10fc dmfc0 v0,c0_tcbind +[ 0-9a-f]+: 5842 18fc dmfc0 v0,c0_tcrestart +[ 0-9a-f]+: 5842 20fc dmfc0 v0,c0_tchalt +[ 0-9a-f]+: 5842 28fc dmfc0 v0,c0_tccontext +[ 0-9a-f]+: 5842 30fc dmfc0 v0,c0_tcschedule +[ 0-9a-f]+: 5842 38fc dmfc0 v0,c0_tcschefback +[ 0-9a-f]+: 5840 02fc dmtc0 v0,c0_index +[ 0-9a-f]+: 5841 02fc dmtc0 v0,c0_random +[ 0-9a-f]+: 5842 02fc dmtc0 v0,c0_entrylo0 +[ 0-9a-f]+: 5843 02fc dmtc0 v0,c0_entrylo1 +[ 0-9a-f]+: 5844 02fc dmtc0 v0,c0_context +[ 0-9a-f]+: 5845 02fc dmtc0 v0,c0_pagemask +[ 0-9a-f]+: 5846 02fc dmtc0 v0,c0_wired +[ 0-9a-f]+: 5847 02fc dmtc0 v0,c0_hwrena +[ 0-9a-f]+: 5848 02fc dmtc0 v0,c0_badvaddr +[ 0-9a-f]+: 5849 02fc dmtc0 v0,c0_count +[ 0-9a-f]+: 584a 02fc dmtc0 v0,c0_entryhi +[ 0-9a-f]+: 584b 02fc dmtc0 v0,c0_compare +[ 0-9a-f]+: 584c 02fc dmtc0 v0,c0_status +[ 0-9a-f]+: 584d 02fc dmtc0 v0,c0_cause +[ 0-9a-f]+: 584e 02fc dmtc0 v0,c0_epc +[ 0-9a-f]+: 584f 02fc dmtc0 v0,c0_prid +[ 0-9a-f]+: 5850 02fc dmtc0 v0,c0_config +[ 0-9a-f]+: 5851 02fc dmtc0 v0,c0_lladdr +[ 0-9a-f]+: 5852 02fc dmtc0 v0,c0_watchlo +[ 0-9a-f]+: 5853 02fc dmtc0 v0,c0_watchhi +[ 0-9a-f]+: 5854 02fc dmtc0 v0,c0_xcontext +[ 0-9a-f]+: 5855 02fc dmtc0 v0,\$21 +[ 0-9a-f]+: 5856 02fc dmtc0 v0,\$22 +[ 0-9a-f]+: 5857 02fc dmtc0 v0,c0_debug +[ 0-9a-f]+: 5858 02fc dmtc0 v0,c0_depc +[ 0-9a-f]+: 5859 02fc dmtc0 v0,c0_perfcnt +[ 0-9a-f]+: 585a 02fc dmtc0 v0,c0_errctl +[ 0-9a-f]+: 585b 02fc dmtc0 v0,c0_cacheerr +[ 0-9a-f]+: 585c 02fc dmtc0 v0,c0_taglo +[ 0-9a-f]+: 585d 02fc dmtc0 v0,c0_taghi +[ 0-9a-f]+: 585e 02fc dmtc0 v0,c0_errorepc +[ 0-9a-f]+: 585f 02fc dmtc0 v0,c0_desave +[ 0-9a-f]+: 5840 02fc dmtc0 v0,c0_index +[ 0-9a-f]+: 5840 0afc dmtc0 v0,c0_mvpcontrol +[ 0-9a-f]+: 5840 12fc dmtc0 v0,c0_mvpconf0 +[ 0-9a-f]+: 5840 1afc dmtc0 v0,c0_mvpconf1 +[ 0-9a-f]+: 5840 22fc dmtc0 v0,\$0,4 +[ 0-9a-f]+: 5840 2afc dmtc0 v0,\$0,5 +[ 0-9a-f]+: 5840 32fc dmtc0 v0,\$0,6 +[ 0-9a-f]+: 5840 3afc dmtc0 v0,\$0,7 +[ 0-9a-f]+: 5841 02fc dmtc0 v0,c0_random +[ 0-9a-f]+: 5841 0afc dmtc0 v0,c0_vpecontrol +[ 0-9a-f]+: 5841 12fc dmtc0 v0,c0_vpeconf0 +[ 0-9a-f]+: 5841 1afc dmtc0 v0,c0_vpeconf1 +[ 0-9a-f]+: 5841 22fc dmtc0 v0,c0_yqmask +[ 0-9a-f]+: 5841 2afc dmtc0 v0,c0_vpeschedule +[ 0-9a-f]+: 5841 32fc dmtc0 v0,c0_vpeschefback +[ 0-9a-f]+: 5841 3afc dmtc0 v0,\$1,7 +[ 0-9a-f]+: 5842 02fc dmtc0 v0,c0_entrylo0 +[ 0-9a-f]+: 5842 0afc dmtc0 v0,c0_tcstatus +[ 0-9a-f]+: 5842 12fc dmtc0 v0,c0_tcbind +[ 0-9a-f]+: 5842 1afc dmtc0 v0,c0_tcrestart +[ 0-9a-f]+: 5842 22fc dmtc0 v0,c0_tchalt +[ 0-9a-f]+: 5842 2afc dmtc0 v0,c0_tccontext +[ 0-9a-f]+: 5842 32fc dmtc0 v0,c0_tcschedule +[ 0-9a-f]+: 5842 3afc dmtc0 v0,c0_tcschefback +[ 0-9a-f]+: 54a0 243b dmfc1 a1,\$f0 +[ 0-9a-f]+: 54a1 243b dmfc1 a1,\$f1 +[ 0-9a-f]+: 54a2 243b dmfc1 a1,\$f2 +[ 0-9a-f]+: 54a3 243b dmfc1 a1,\$f3 +[ 0-9a-f]+: 54a4 243b dmfc1 a1,\$f4 +[ 0-9a-f]+: 54a5 243b dmfc1 a1,\$f5 +[ 0-9a-f]+: 54a6 243b dmfc1 a1,\$f6 +[ 0-9a-f]+: 54a7 243b dmfc1 a1,\$f7 +[ 0-9a-f]+: 54a8 243b dmfc1 a1,\$f8 +[ 0-9a-f]+: 54a9 243b dmfc1 a1,\$f9 +[ 0-9a-f]+: 54aa 243b dmfc1 a1,\$f10 +[ 0-9a-f]+: 54ab 243b dmfc1 a1,\$f11 +[ 0-9a-f]+: 54ac 243b dmfc1 a1,\$f12 +[ 0-9a-f]+: 54ad 243b dmfc1 a1,\$f13 +[ 0-9a-f]+: 54ae 243b dmfc1 a1,\$f14 +[ 0-9a-f]+: 54af 243b dmfc1 a1,\$f15 +[ 0-9a-f]+: 54b0 243b dmfc1 a1,\$f16 +[ 0-9a-f]+: 54b1 243b dmfc1 a1,\$f17 +[ 0-9a-f]+: 54b2 243b dmfc1 a1,\$f18 +[ 0-9a-f]+: 54b3 243b dmfc1 a1,\$f19 +[ 0-9a-f]+: 54b4 243b dmfc1 a1,\$f20 +[ 0-9a-f]+: 54b5 243b dmfc1 a1,\$f21 +[ 0-9a-f]+: 54b6 243b dmfc1 a1,\$f22 +[ 0-9a-f]+: 54b7 243b dmfc1 a1,\$f23 +[ 0-9a-f]+: 54b8 243b dmfc1 a1,\$f24 +[ 0-9a-f]+: 54b9 243b dmfc1 a1,\$f25 +[ 0-9a-f]+: 54ba 243b dmfc1 a1,\$f26 +[ 0-9a-f]+: 54bb 243b dmfc1 a1,\$f27 +[ 0-9a-f]+: 54bc 243b dmfc1 a1,\$f28 +[ 0-9a-f]+: 54bd 243b dmfc1 a1,\$f29 +[ 0-9a-f]+: 54be 243b dmfc1 a1,\$f30 +[ 0-9a-f]+: 54bf 243b dmfc1 a1,\$f31 +[ 0-9a-f]+: 54a0 243b dmfc1 a1,\$f0 +[ 0-9a-f]+: 54a1 243b dmfc1 a1,\$f1 +[ 0-9a-f]+: 54a2 243b dmfc1 a1,\$f2 +[ 0-9a-f]+: 54a3 243b dmfc1 a1,\$f3 +[ 0-9a-f]+: 54a4 243b dmfc1 a1,\$f4 +[ 0-9a-f]+: 54a5 243b dmfc1 a1,\$f5 +[ 0-9a-f]+: 54a6 243b dmfc1 a1,\$f6 +[ 0-9a-f]+: 54a7 243b dmfc1 a1,\$f7 +[ 0-9a-f]+: 54a8 243b dmfc1 a1,\$f8 +[ 0-9a-f]+: 54a9 243b dmfc1 a1,\$f9 +[ 0-9a-f]+: 54aa 243b dmfc1 a1,\$f10 +[ 0-9a-f]+: 54ab 243b dmfc1 a1,\$f11 +[ 0-9a-f]+: 54ac 243b dmfc1 a1,\$f12 +[ 0-9a-f]+: 54ad 243b dmfc1 a1,\$f13 +[ 0-9a-f]+: 54ae 243b dmfc1 a1,\$f14 +[ 0-9a-f]+: 54af 243b dmfc1 a1,\$f15 +[ 0-9a-f]+: 54b0 243b dmfc1 a1,\$f16 +[ 0-9a-f]+: 54b1 243b dmfc1 a1,\$f17 +[ 0-9a-f]+: 54b2 243b dmfc1 a1,\$f18 +[ 0-9a-f]+: 54b3 243b dmfc1 a1,\$f19 +[ 0-9a-f]+: 54b4 243b dmfc1 a1,\$f20 +[ 0-9a-f]+: 54b5 243b dmfc1 a1,\$f21 +[ 0-9a-f]+: 54b6 243b dmfc1 a1,\$f22 +[ 0-9a-f]+: 54b7 243b dmfc1 a1,\$f23 +[ 0-9a-f]+: 54b8 243b dmfc1 a1,\$f24 +[ 0-9a-f]+: 54b9 243b dmfc1 a1,\$f25 +[ 0-9a-f]+: 54ba 243b dmfc1 a1,\$f26 +[ 0-9a-f]+: 54bb 243b dmfc1 a1,\$f27 +[ 0-9a-f]+: 54bc 243b dmfc1 a1,\$f28 +[ 0-9a-f]+: 54bd 243b dmfc1 a1,\$f29 +[ 0-9a-f]+: 54be 243b dmfc1 a1,\$f30 +[ 0-9a-f]+: 54bf 243b dmfc1 a1,\$f31 +[ 0-9a-f]+: 54a0 2c3b dmtc1 a1,\$0 +[ 0-9a-f]+: 54a1 2c3b dmtc1 a1,\$1 +[ 0-9a-f]+: 54a2 2c3b dmtc1 a1,\$2 +[ 0-9a-f]+: 54a3 2c3b dmtc1 a1,\$3 +[ 0-9a-f]+: 54a4 2c3b dmtc1 a1,\$4 +[ 0-9a-f]+: 54a5 2c3b dmtc1 a1,\$5 +[ 0-9a-f]+: 54a6 2c3b dmtc1 a1,\$6 +[ 0-9a-f]+: 54a7 2c3b dmtc1 a1,\$7 +[ 0-9a-f]+: 54a8 2c3b dmtc1 a1,\$8 +[ 0-9a-f]+: 54a9 2c3b dmtc1 a1,\$9 +[ 0-9a-f]+: 54aa 2c3b dmtc1 a1,\$10 +[ 0-9a-f]+: 54ab 2c3b dmtc1 a1,\$11 +[ 0-9a-f]+: 54ac 2c3b dmtc1 a1,\$12 +[ 0-9a-f]+: 54ad 2c3b dmtc1 a1,\$13 +[ 0-9a-f]+: 54ae 2c3b dmtc1 a1,\$14 +[ 0-9a-f]+: 54af 2c3b dmtc1 a1,\$15 +[ 0-9a-f]+: 54b0 2c3b dmtc1 a1,\$16 +[ 0-9a-f]+: 54b1 2c3b dmtc1 a1,\$17 +[ 0-9a-f]+: 54b2 2c3b dmtc1 a1,\$18 +[ 0-9a-f]+: 54b3 2c3b dmtc1 a1,\$19 +[ 0-9a-f]+: 54b4 2c3b dmtc1 a1,\$20 +[ 0-9a-f]+: 54b5 2c3b dmtc1 a1,\$21 +[ 0-9a-f]+: 54b6 2c3b dmtc1 a1,\$22 +[ 0-9a-f]+: 54b7 2c3b dmtc1 a1,\$23 +[ 0-9a-f]+: 54b8 2c3b dmtc1 a1,\$24 +[ 0-9a-f]+: 54b9 2c3b dmtc1 a1,\$25 +[ 0-9a-f]+: 54ba 2c3b dmtc1 a1,\$26 +[ 0-9a-f]+: 54bb 2c3b dmtc1 a1,\$27 +[ 0-9a-f]+: 54bc 2c3b dmtc1 a1,\$28 +[ 0-9a-f]+: 54bd 2c3b dmtc1 a1,\$29 +[ 0-9a-f]+: 54be 2c3b dmtc1 a1,\$30 +[ 0-9a-f]+: 54bf 2c3b dmtc1 a1,\$31 +[ 0-9a-f]+: 54a0 2c3b dmtc1 a1,\$0 +[ 0-9a-f]+: 54a1 2c3b dmtc1 a1,\$1 +[ 0-9a-f]+: 54a2 2c3b dmtc1 a1,\$2 +[ 0-9a-f]+: 54a3 2c3b dmtc1 a1,\$3 +[ 0-9a-f]+: 54a4 2c3b dmtc1 a1,\$4 +[ 0-9a-f]+: 54a5 2c3b dmtc1 a1,\$5 +[ 0-9a-f]+: 54a6 2c3b dmtc1 a1,\$6 +[ 0-9a-f]+: 54a7 2c3b dmtc1 a1,\$7 +[ 0-9a-f]+: 54a8 2c3b dmtc1 a1,\$8 +[ 0-9a-f]+: 54a9 2c3b dmtc1 a1,\$9 +[ 0-9a-f]+: 54aa 2c3b dmtc1 a1,\$10 +[ 0-9a-f]+: 54ab 2c3b dmtc1 a1,\$11 +[ 0-9a-f]+: 54ac 2c3b dmtc1 a1,\$12 +[ 0-9a-f]+: 54ad 2c3b dmtc1 a1,\$13 +[ 0-9a-f]+: 54ae 2c3b dmtc1 a1,\$14 +[ 0-9a-f]+: 54af 2c3b dmtc1 a1,\$15 +[ 0-9a-f]+: 54b0 2c3b dmtc1 a1,\$16 +[ 0-9a-f]+: 54b1 2c3b dmtc1 a1,\$17 +[ 0-9a-f]+: 54b2 2c3b dmtc1 a1,\$18 +[ 0-9a-f]+: 54b3 2c3b dmtc1 a1,\$19 +[ 0-9a-f]+: 54b4 2c3b dmtc1 a1,\$20 +[ 0-9a-f]+: 54b5 2c3b dmtc1 a1,\$21 +[ 0-9a-f]+: 54b6 2c3b dmtc1 a1,\$22 +[ 0-9a-f]+: 54b7 2c3b dmtc1 a1,\$23 +[ 0-9a-f]+: 54b8 2c3b dmtc1 a1,\$24 +[ 0-9a-f]+: 54b9 2c3b dmtc1 a1,\$25 +[ 0-9a-f]+: 54ba 2c3b dmtc1 a1,\$26 +[ 0-9a-f]+: 54bb 2c3b dmtc1 a1,\$27 +[ 0-9a-f]+: 54bc 2c3b dmtc1 a1,\$28 +[ 0-9a-f]+: 54bd 2c3b dmtc1 a1,\$29 +[ 0-9a-f]+: 54be 2c3b dmtc1 a1,\$30 +[ 0-9a-f]+: 54bf 2c3b dmtc1 a1,\$31 +[ 0-9a-f]+: 0040 6d3c dmfc2 v0,\$0 +[ 0-9a-f]+: 0041 6d3c dmfc2 v0,\$1 +[ 0-9a-f]+: 0042 6d3c dmfc2 v0,\$2 +[ 0-9a-f]+: 0043 6d3c dmfc2 v0,\$3 +[ 0-9a-f]+: 0044 6d3c dmfc2 v0,\$4 +[ 0-9a-f]+: 0045 6d3c dmfc2 v0,\$5 +[ 0-9a-f]+: 0046 6d3c dmfc2 v0,\$6 +[ 0-9a-f]+: 0047 6d3c dmfc2 v0,\$7 +[ 0-9a-f]+: 0048 6d3c dmfc2 v0,\$8 +[ 0-9a-f]+: 0049 6d3c dmfc2 v0,\$9 +[ 0-9a-f]+: 004a 6d3c dmfc2 v0,\$10 +[ 0-9a-f]+: 004b 6d3c dmfc2 v0,\$11 +[ 0-9a-f]+: 004c 6d3c dmfc2 v0,\$12 +[ 0-9a-f]+: 004d 6d3c dmfc2 v0,\$13 +[ 0-9a-f]+: 004e 6d3c dmfc2 v0,\$14 +[ 0-9a-f]+: 004f 6d3c dmfc2 v0,\$15 +[ 0-9a-f]+: 0050 6d3c dmfc2 v0,\$16 +[ 0-9a-f]+: 0051 6d3c dmfc2 v0,\$17 +[ 0-9a-f]+: 0052 6d3c dmfc2 v0,\$18 +[ 0-9a-f]+: 0053 6d3c dmfc2 v0,\$19 +[ 0-9a-f]+: 0054 6d3c dmfc2 v0,\$20 +[ 0-9a-f]+: 0055 6d3c dmfc2 v0,\$21 +[ 0-9a-f]+: 0056 6d3c dmfc2 v0,\$22 +[ 0-9a-f]+: 0057 6d3c dmfc2 v0,\$23 +[ 0-9a-f]+: 0058 6d3c dmfc2 v0,\$24 +[ 0-9a-f]+: 0059 6d3c dmfc2 v0,\$25 +[ 0-9a-f]+: 005a 6d3c dmfc2 v0,\$26 +[ 0-9a-f]+: 005b 6d3c dmfc2 v0,\$27 +[ 0-9a-f]+: 005c 6d3c dmfc2 v0,\$28 +[ 0-9a-f]+: 005d 6d3c dmfc2 v0,\$29 +[ 0-9a-f]+: 005e 6d3c dmfc2 v0,\$30 +[ 0-9a-f]+: 005f 6d3c dmfc2 v0,\$31 +[ 0-9a-f]+: 0040 7d3c dmtc2 v0,\$0 +[ 0-9a-f]+: 0041 7d3c dmtc2 v0,\$1 +[ 0-9a-f]+: 0042 7d3c dmtc2 v0,\$2 +[ 0-9a-f]+: 0043 7d3c dmtc2 v0,\$3 +[ 0-9a-f]+: 0044 7d3c dmtc2 v0,\$4 +[ 0-9a-f]+: 0045 7d3c dmtc2 v0,\$5 +[ 0-9a-f]+: 0046 7d3c dmtc2 v0,\$6 +[ 0-9a-f]+: 0047 7d3c dmtc2 v0,\$7 +[ 0-9a-f]+: 0048 7d3c dmtc2 v0,\$8 +[ 0-9a-f]+: 0049 7d3c dmtc2 v0,\$9 +[ 0-9a-f]+: 004a 7d3c dmtc2 v0,\$10 +[ 0-9a-f]+: 004b 7d3c dmtc2 v0,\$11 +[ 0-9a-f]+: 004c 7d3c dmtc2 v0,\$12 +[ 0-9a-f]+: 004d 7d3c dmtc2 v0,\$13 +[ 0-9a-f]+: 004e 7d3c dmtc2 v0,\$14 +[ 0-9a-f]+: 004f 7d3c dmtc2 v0,\$15 +[ 0-9a-f]+: 0050 7d3c dmtc2 v0,\$16 +[ 0-9a-f]+: 0051 7d3c dmtc2 v0,\$17 +[ 0-9a-f]+: 0052 7d3c dmtc2 v0,\$18 +[ 0-9a-f]+: 0053 7d3c dmtc2 v0,\$19 +[ 0-9a-f]+: 0054 7d3c dmtc2 v0,\$20 +[ 0-9a-f]+: 0055 7d3c dmtc2 v0,\$21 +[ 0-9a-f]+: 0056 7d3c dmtc2 v0,\$22 +[ 0-9a-f]+: 0057 7d3c dmtc2 v0,\$23 +[ 0-9a-f]+: 0058 7d3c dmtc2 v0,\$24 +[ 0-9a-f]+: 0059 7d3c dmtc2 v0,\$25 +[ 0-9a-f]+: 005a 7d3c dmtc2 v0,\$26 +[ 0-9a-f]+: 005b 7d3c dmtc2 v0,\$27 +[ 0-9a-f]+: 005c 7d3c dmtc2 v0,\$28 +[ 0-9a-f]+: 005d 7d3c dmtc2 v0,\$29 +[ 0-9a-f]+: 005e 7d3c dmtc2 v0,\$30 +[ 0-9a-f]+: 005f 7d3c dmtc2 v0,\$31 +[ 0-9a-f]+: 5862 8b3c dmult v0,v1 +[ 0-9a-f]+: 5862 9b3c dmultu v0,v1 +[ 0-9a-f]+: 5883 9b3c dmultu v1,a0 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 8b3c dmult v1,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 5883 8b3c dmult v1,a0 +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 5842 f888 dsra32 v0,v0,0x1f +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 9422 fffe beq v0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 3020 0004 li at,4 +[ 0-9a-f]+: 5823 8b3c dmult v1,at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 5842 f888 dsra32 v0,v0,0x1f +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 9422 fffe beq v0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 5883 9b3c dmultu v1,a0 +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 0004 li at,4 +[ 0-9a-f]+: 5823 9b3c dmultu v1,at +[ 0-9a-f]+: 4601 mfhi at +[ 0-9a-f]+: 4642 mflo v0 +[ 0-9a-f]+: 9401 fffe beqz at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 5824 ab3c ddiv zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 5862 ab3c ddiv zero,v0,v1 +[ 0-9a-f]+: 5bfe ab3c ddiv zero,s8,ra +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 5860 ab3c ddiv zero,zero,v1 +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b423 fffe bne v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 5821 f808 dsll32 at,at,0x1f +[ 0-9a-f]+: b420 fffe bne zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: b41f fffe bnez ra,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 5be0 ab3c ddiv zero,zero,ra +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: b43f fffe bne ra,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 3020 0001 li at,1 +[ 0-9a-f]+: 5821 f808 dsll32 at,at,0x1f +[ 0-9a-f]+: b420 fffe bne zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4686 break 0x6 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 5824 ab3c ddiv zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 5862 bb3c ddivu zero,v0,v1 +[ 0-9a-f]+: 5bfe bb3c ddivu zero,s8,ra +[ 0-9a-f]+: b403 fffe bnez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 5860 bb3c ddivu zero,zero,v1 +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: b41f fffe bnez ra,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[ 0-9a-f]+: 5be0 bb3c ddivu zero,zero,ra +[ 0-9a-f]+: 4687 break 0x7 + +[0-9a-f]+ <.*>: +[ 0-9a-f]+: 4600 mfhi zero +[ 0-9a-f]+: 4687 break 0x7 +[ 0-9a-f]+: 0c60 move v1,zero +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 5824 bb3c ddivu zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 3020 0002 li at,2 +[ 0-9a-f]+: 5824 bb3c ddivu zero,a0,at +[ 0-9a-f]+: 4603 mfhi v1 +[ 0-9a-f]+: 5880 11d0 dnegu v0,a0 +[ 0-9a-f]+: 5862 10d0 drorv v0,v1,v0 +[ 0-9a-f]+: 5880 09d0 dnegu at,a0 +[ 0-9a-f]+: 5841 10d0 drorv v0,v0,at +[ 0-9a-f]+: 5843 e0c8 dror32 v0,v1,0x1c +[ 0-9a-f]+: 5864 10d0 drorv v0,v1,a0 +[ 0-9a-f]+: 5843 20c0 dror v0,v1,0x4 +[ 0-9a-f]+: 5843 20c8 dror32 v0,v1,0x4 +[ 0-9a-f]+: 5864 10d0 drorv v0,v1,a0 +[ 0-9a-f]+: 5843 20c8 dror32 v0,v1,0x4 +[ 0-9a-f]+: 5880 11d0 dnegu v0,a0 +[ 0-9a-f]+: 5862 10d0 drorv v0,v1,v0 +[ 0-9a-f]+: 5880 09d0 dnegu at,a0 +[ 0-9a-f]+: 5841 10d0 drorv v0,v0,at +[ 0-9a-f]+: 5843 e0c8 dror32 v0,v1,0x1c +[ 0-9a-f]+: 5864 10d0 drorv v0,v1,a0 +[ 0-9a-f]+: 5843 20c0 dror v0,v1,0x4 +[ 0-9a-f]+: 5843 20c8 dror32 v0,v1,0x4 +[ 0-9a-f]+: 5864 10d0 drorv v0,v1,a0 +[ 0-9a-f]+: 5843 20c8 dror32 v0,v1,0x4 +[ 0-9a-f]+: 5843 7b3c dsbh v0,v1 +[ 0-9a-f]+: 5842 7b3c dsbh v0,v0 +[ 0-9a-f]+: 5842 7b3c dsbh v0,v0 +[ 0-9a-f]+: 5843 fb3c dshd v0,v1 +[ 0-9a-f]+: 5842 fb3c dshd v0,v0 +[ 0-9a-f]+: 5842 fb3c dshd v0,v0 +[ 0-9a-f]+: 5864 1010 dsllv v0,v1,a0 +[ 0-9a-f]+: 5843 f808 dsll32 v0,v1,0x1f +[ 0-9a-f]+: 5864 1010 dsllv v0,v1,a0 +[ 0-9a-f]+: 5843 f808 dsll32 v0,v1,0x1f +[ 0-9a-f]+: 5843 f800 dsll v0,v1,0x1f +[ 0-9a-f]+: 5864 1090 dsrav v0,v1,a0 +[ 0-9a-f]+: 5843 2088 dsra32 v0,v1,0x4 +[ 0-9a-f]+: 5864 1090 dsrav v0,v1,a0 +[ 0-9a-f]+: 5843 2088 dsra32 v0,v1,0x4 +[ 0-9a-f]+: 5843 2080 dsra v0,v1,0x4 +[ 0-9a-f]+: 5864 1050 dsrlv v0,v1,a0 +[ 0-9a-f]+: 5843 f848 dsrl32 v0,v1,0x1f +[ 0-9a-f]+: 5864 1050 dsrlv v0,v1,a0 +[ 0-9a-f]+: 5843 2048 dsrl32 v0,v1,0x4 +[ 0-9a-f]+: 5843 2040 dsrl v0,v1,0x4 +[ 0-9a-f]+: 5883 1190 dsub v0,v1,a0 +[ 0-9a-f]+: 5bfe e990 dsub sp,s8,ra +[ 0-9a-f]+: 5862 1190 dsub v0,v0,v1 +[ 0-9a-f]+: 5862 1190 dsub v0,v0,v1 +[ 0-9a-f]+: 5883 11d0 dsubu v0,v1,a0 +[ 0-9a-f]+: 5bfe e9d0 dsubu sp,s8,ra +[ 0-9a-f]+: 5862 11d0 dsubu v0,v0,v1 +[ 0-9a-f]+: 5862 11d0 dsubu v0,v0,v1 +[ 0-9a-f]+: 5c43 edcc daddiu v0,v1,-4660 +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 11d0 dsubu v0,v1,at +[ 0-9a-f]+: 5843 001c daddi v0,v1,0 +[ 0-9a-f]+: 5843 ffdc daddi v0,v1,-1 +[ 0-9a-f]+: 5843 801c daddi v0,v1,-512 +[ 0-9a-f]+: 5843 7fdc daddi v0,v1,511 +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 5823 1190 dsub v0,v1,at +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 5823 1190 dsub v0,v1,at +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 5823 1190 dsub v0,v1,at +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 1190 dsub v0,v1,at +[ 0-9a-f]+: 41a1 8888 lui at,0x8888 +[ 0-9a-f]+: 5021 1111 ori at,at,0x1111 +[ 0-9a-f]+: 5821 8000 dsll at,at,0x10 +[ 0-9a-f]+: 5021 1234 ori at,at,0x1234 +[ 0-9a-f]+: 5821 8000 dsll at,at,0x10 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 5823 1190 dsub v0,v1,at +[ 0-9a-f]+: dc40 0000 ld v0,0\(zero\) +[ 0-9a-f]+: dc40 0004 ld v0,4\(zero\) +[ 0-9a-f]+: dc40 0000 ld v0,0\(zero\) +[ 0-9a-f]+: dc40 0000 ld v0,0\(zero\) +[ 0-9a-f]+: dc40 0004 ld v0,4\(zero\) +[ 0-9a-f]+: dc43 0004 ld v0,4\(v1\) +[ 0-9a-f]+: dc43 8000 ld v0,-32768\(v1\) +[ 0-9a-f]+: dc43 7fff ld v0,32767\(v1\) +[ 0-9a-f]+: 6040 4000 ldl v0,0\(zero\) +[ 0-9a-f]+: 6040 4004 ldl v0,4\(zero\) +[ 0-9a-f]+: 6040 4000 ldl v0,0\(zero\) +[ 0-9a-f]+: 6040 4000 ldl v0,0\(zero\) +[ 0-9a-f]+: 6040 4004 ldl v0,4\(zero\) +[ 0-9a-f]+: 6043 4004 ldl v0,4\(v1\) +[ 0-9a-f]+: 6043 4e00 ldl v0,-512\(v1\) +[ 0-9a-f]+: 6043 41ff ldl v0,511\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 4000 ldl v0,0\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 4678 ldl v0,1656\(at\) +[ 0-9a-f]+: 6040 5000 ldr v0,0\(zero\) +[ 0-9a-f]+: 6040 5004 ldr v0,4\(zero\) +[ 0-9a-f]+: 6040 5000 ldr v0,0\(zero\) +[ 0-9a-f]+: 6040 5000 ldr v0,0\(zero\) +[ 0-9a-f]+: 6040 5004 ldr v0,4\(zero\) +[ 0-9a-f]+: 6043 5004 ldr v0,4\(v1\) +[ 0-9a-f]+: 6043 5e00 ldr v0,-512\(v1\) +[ 0-9a-f]+: 6043 51ff ldr v0,511\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 5000 ldr v0,0\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 5678 ldr v0,1656\(at\) +[ 0-9a-f]+: 6040 7000 lld v0,0\(zero\) +[ 0-9a-f]+: 6040 7004 lld v0,4\(zero\) +[ 0-9a-f]+: 6040 7000 lld v0,0\(zero\) +[ 0-9a-f]+: 6040 7000 lld v0,0\(zero\) +[ 0-9a-f]+: 6040 7004 lld v0,4\(zero\) +[ 0-9a-f]+: 6043 7004 lld v0,4\(v1\) +[ 0-9a-f]+: 6043 7e00 lld v0,-512\(v1\) +[ 0-9a-f]+: 6043 71ff lld v0,511\(v1\) +[ 0-9a-f]+: 3040 8000 li v0,-32768 +[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 6042 7000 lld v0,0\(v0\) +[ 0-9a-f]+: 41a2 1234 lui v0,0x1234 +[ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 +[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 6042 7678 lld v0,1656\(v0\) +[ 0-9a-f]+: 6040 e000 lwu v0,0\(zero\) +[ 0-9a-f]+: 6040 e004 lwu v0,4\(zero\) +[ 0-9a-f]+: 6040 e000 lwu v0,0\(zero\) +[ 0-9a-f]+: 6040 e000 lwu v0,0\(zero\) +[ 0-9a-f]+: 6040 e004 lwu v0,4\(zero\) +[ 0-9a-f]+: 6043 e004 lwu v0,4\(v1\) +[ 0-9a-f]+: 6043 ee00 lwu v0,-512\(v1\) +[ 0-9a-f]+: 6043 e1ff lwu v0,511\(v1\) +[ 0-9a-f]+: 3040 8000 li v0,-32768 +[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 6042 e000 lwu v0,0\(v0\) +[ 0-9a-f]+: 41a2 1234 lui v0,0x1234 +[ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 +[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 6042 e678 lwu v0,1656\(v0\) +[ 0-9a-f]+: 6040 f000 scd v0,0\(zero\) +[ 0-9a-f]+: 6040 f004 scd v0,4\(zero\) +[ 0-9a-f]+: 6040 f000 scd v0,0\(zero\) +[ 0-9a-f]+: 6040 f000 scd v0,0\(zero\) +[ 0-9a-f]+: 6040 f004 scd v0,4\(zero\) +[ 0-9a-f]+: 6043 f004 scd v0,4\(v1\) +[ 0-9a-f]+: 6043 fe00 scd v0,-512\(v1\) +[ 0-9a-f]+: 6043 f1ff scd v0,511\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 f000 scd v0,0\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 f678 scd v0,1656\(at\) +[ 0-9a-f]+: d840 0000 sd v0,0\(zero\) +[ 0-9a-f]+: d840 0004 sd v0,4\(zero\) +[ 0-9a-f]+: d840 0000 sd v0,0\(zero\) +[ 0-9a-f]+: d840 0000 sd v0,0\(zero\) +[ 0-9a-f]+: d840 0004 sd v0,4\(zero\) +[ 0-9a-f]+: d843 0004 sd v0,4\(v1\) +[ 0-9a-f]+: d843 8000 sd v0,-32768\(v1\) +[ 0-9a-f]+: d843 7fff sd v0,32767\(v1\) +[ 0-9a-f]+: 6040 c000 sdl v0,0\(zero\) +[ 0-9a-f]+: 6040 c004 sdl v0,4\(zero\) +[ 0-9a-f]+: 6040 c000 sdl v0,0\(zero\) +[ 0-9a-f]+: 6040 c000 sdl v0,0\(zero\) +[ 0-9a-f]+: 6040 c004 sdl v0,4\(zero\) +[ 0-9a-f]+: 6043 c004 sdl v0,4\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 c000 sdl v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 cfff sdl v0,-1\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 c678 sdl v0,1656\(at\) +[ 0-9a-f]+: 6040 d000 sdr v0,0\(zero\) +[ 0-9a-f]+: 6040 d004 sdr v0,4\(zero\) +[ 0-9a-f]+: 6040 d000 sdr v0,0\(zero\) +[ 0-9a-f]+: 6040 d000 sdr v0,0\(zero\) +[ 0-9a-f]+: 6040 d004 sdr v0,4\(zero\) +[ 0-9a-f]+: 6043 d004 sdr v0,4\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 d000 sdr v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 dfff sdr v0,-1\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 6041 d678 sdr v0,1656\(at\) +[ 0-9a-f]+: 2020 7000 ldm s0,0\(zero\) +[ 0-9a-f]+: 2020 7004 ldm s0,4\(zero\) +[ 0-9a-f]+: 2025 7000 ldm s0,0\(a1\) +[ 0-9a-f]+: 2025 77ff ldm s0,2047\(a1\) +[ 0-9a-f]+: 2045 77ff ldm s0-s1,2047\(a1\) +[ 0-9a-f]+: 2065 77ff ldm s0-s2,2047\(a1\) +[ 0-9a-f]+: 2085 77ff ldm s0-s3,2047\(a1\) +[ 0-9a-f]+: 20a5 77ff ldm s0-s4,2047\(a1\) +[ 0-9a-f]+: 20c5 77ff ldm s0-s5,2047\(a1\) +[ 0-9a-f]+: 20e5 77ff ldm s0-s6,2047\(a1\) +[ 0-9a-f]+: 2105 77ff ldm s0-s7,2047\(a1\) +[ 0-9a-f]+: 2125 77ff ldm s0-s7,s8,2047\(a1\) +[ 0-9a-f]+: 2205 77ff ldm ra,2047\(a1\) +[ 0-9a-f]+: 2225 7000 ldm s0,ra,0\(a1\) +[ 0-9a-f]+: 2245 7000 ldm s0-s1,ra,0\(a1\) +[ 0-9a-f]+: 2265 7000 ldm s0-s2,ra,0\(a1\) +[ 0-9a-f]+: 2285 7000 ldm s0-s3,ra,0\(a1\) +[ 0-9a-f]+: 22a5 7000 ldm s0-s4,ra,0\(a1\) +[ 0-9a-f]+: 22c5 7000 ldm s0-s5,ra,0\(a1\) +[ 0-9a-f]+: 22e5 7000 ldm s0-s6,ra,0\(a1\) +[ 0-9a-f]+: 2305 7000 ldm s0-s7,ra,0\(a1\) +[ 0-9a-f]+: 2325 7000 ldm s0-s7,s8,ra,0\(a1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 2020 7000 ldm s0,0\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 203d 7000 ldm s0,0\(sp\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 7678 ldm s0,1656\(at\) +[ 0-9a-f]+: 2040 4000 ldp v0,0\(zero\) +[ 0-9a-f]+: 2040 4004 ldp v0,4\(zero\) +[ 0-9a-f]+: 205d 4000 ldp v0,0\(sp\) +[ 0-9a-f]+: 205d 4000 ldp v0,0\(sp\) +[ 0-9a-f]+: 2043 4800 ldp v0,-2048\(v1\) +[ 0-9a-f]+: 2043 47ff ldp v0,2047\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 4000 ldp v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) +[ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) +[ 0-9a-f]+: 3060 8000 li v1,-32768 +[ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) +[ 0-9a-f]+: 5060 8000 li v1,0x8000 +[ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) +[ 0-9a-f]+: 41a3 0001 lui v1,0x1 +[ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) +[ 0-9a-f]+: 41a3 1234 lui v1,0x1234 +[ 0-9a-f]+: 5063 5000 ori v1,v1,0x5000 +[ 0-9a-f]+: 2043 4678 ldp v0,1656\(v1\) +[ 0-9a-f]+: 2020 f000 sdm s0,0\(zero\) +[ 0-9a-f]+: 2020 f004 sdm s0,4\(zero\) +[ 0-9a-f]+: 2025 f000 sdm s0,0\(a1\) +[ 0-9a-f]+: 2025 f7ff sdm s0,2047\(a1\) +[ 0-9a-f]+: 2045 f7ff sdm s0-s1,2047\(a1\) +[ 0-9a-f]+: 2065 f7ff sdm s0-s2,2047\(a1\) +[ 0-9a-f]+: 2085 f7ff sdm s0-s3,2047\(a1\) +[ 0-9a-f]+: 20a5 f7ff sdm s0-s4,2047\(a1\) +[ 0-9a-f]+: 20c5 f7ff sdm s0-s5,2047\(a1\) +[ 0-9a-f]+: 20e5 f7ff sdm s0-s6,2047\(a1\) +[ 0-9a-f]+: 2105 f7ff sdm s0-s7,2047\(a1\) +[ 0-9a-f]+: 2125 f7ff sdm s0-s7,s8,2047\(a1\) +[ 0-9a-f]+: 2205 f7ff sdm ra,2047\(a1\) +[ 0-9a-f]+: 2225 f000 sdm s0,ra,0\(a1\) +[ 0-9a-f]+: 2245 f000 sdm s0-s1,ra,0\(a1\) +[ 0-9a-f]+: 2265 f000 sdm s0-s2,ra,0\(a1\) +[ 0-9a-f]+: 2285 f000 sdm s0-s3,ra,0\(a1\) +[ 0-9a-f]+: 22a5 f000 sdm s0-s4,ra,0\(a1\) +[ 0-9a-f]+: 22c5 f000 sdm s0-s5,ra,0\(a1\) +[ 0-9a-f]+: 22e5 f000 sdm s0-s6,ra,0\(a1\) +[ 0-9a-f]+: 2305 f000 sdm s0-s7,ra,0\(a1\) +[ 0-9a-f]+: 2325 f000 sdm s0-s7,s8,ra,0\(a1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 2020 f000 sdm s0,0\(zero\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 203d f000 sdm s0,0\(sp\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 2021 f678 sdm s0,1656\(at\) +[ 0-9a-f]+: 2040 c000 sdp v0,0\(zero\) +[ 0-9a-f]+: 2040 c004 sdp v0,4\(zero\) +[ 0-9a-f]+: 205d c000 sdp v0,0\(sp\) +[ 0-9a-f]+: 205d c000 sdp v0,0\(sp\) +[ 0-9a-f]+: 2043 c800 sdp v0,-2048\(v1\) +[ 0-9a-f]+: 2043 c7ff sdp v0,2047\(v1\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 2043 c000 sdp v0,0\(v1\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 2041 c678 sdp v0,1656\(at\) +[ 0-9a-f]+: 6060 4000 ldl v1,0\(zero\) +[ 0-9a-f]+: 6060 5007 ldr v1,7\(zero\) +[ 0-9a-f]+: 6060 4000 ldl v1,0\(zero\) +[ 0-9a-f]+: 6060 5007 ldr v1,7\(zero\) +[ 0-9a-f]+: 6060 4004 ldl v1,4\(zero\) +[ 0-9a-f]+: 6060 500b ldr v1,11\(zero\) +[ 0-9a-f]+: 6060 4004 ldl v1,4\(zero\) +[ 0-9a-f]+: 6060 500b ldr v1,11\(zero\) +[ 0-9a-f]+: 3020 07ff li at,2047 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6060 4800 ldl v1,-2048\(zero\) +[ 0-9a-f]+: 6060 5807 ldr v1,-2041\(zero\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 7ff1 li at,32753 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6064 4000 ldl v1,0\(a0\) +[ 0-9a-f]+: 6064 5007 ldr v1,7\(a0\) +[ 0-9a-f]+: 6064 4004 ldl v1,4\(a0\) +[ 0-9a-f]+: 6064 500b ldr v1,11\(a0\) +[ 0-9a-f]+: 3024 07ff addiu at,a0,2047 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6064 4800 ldl v1,-2048\(a0\) +[ 0-9a-f]+: 6064 5807 ldr v1,-2041\(a0\) +[ 0-9a-f]+: 3024 0800 addiu at,a0,2048 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3024 f7ff addiu at,a0,-2049 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3024 7ff1 addiu at,a0,32753 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) +[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6060 c000 sdl v1,0\(zero\) +[ 0-9a-f]+: 6060 d007 sdr v1,7\(zero\) +[ 0-9a-f]+: 6060 c000 sdl v1,0\(zero\) +[ 0-9a-f]+: 6060 d007 sdr v1,7\(zero\) +[ 0-9a-f]+: 6060 c004 sdl v1,4\(zero\) +[ 0-9a-f]+: 6060 d00b sdr v1,11\(zero\) +[ 0-9a-f]+: 6060 c004 sdl v1,4\(zero\) +[ 0-9a-f]+: 6060 d00b sdr v1,11\(zero\) +[ 0-9a-f]+: 3020 07ff li at,2047 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6060 c800 sdl v1,-2048\(zero\) +[ 0-9a-f]+: 6060 d807 sdr v1,-2041\(zero\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 7ff1 li at,32753 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6064 c000 sdl v1,0\(a0\) +[ 0-9a-f]+: 6064 d007 sdr v1,7\(a0\) +[ 0-9a-f]+: 6064 c004 sdl v1,4\(a0\) +[ 0-9a-f]+: 6064 d00b sdr v1,11\(a0\) +[ 0-9a-f]+: 3024 07ff addiu at,a0,2047 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6064 c800 sdl v1,-2048\(a0\) +[ 0-9a-f]+: 6064 d807 sdr v1,-2041\(a0\) +[ 0-9a-f]+: 3024 0800 addiu at,a0,2048 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3024 f7ff addiu at,a0,-2049 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3024 7ff1 addiu at,a0,32753 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 5020 ffff li at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 5021 0001 ori at,at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3020 ffff li at,-1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5678 ori at,at,0x5678 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) +[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6201 4000 ldl s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6201 5000 ldr s0,0\(at\) +[ 0-9a-f]+: 3203 0000 addiu s0,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6210 7000 lld s0,0\(s0\) +[ 0-9a-f]+: 3203 0000 addiu s0,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6210 e000 lwu s0,0\(s0\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6201 f000 scd s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6201 c000 sdl s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 6201 d000 sdr s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) +[ 0-9a-f]+: 3223 0000 addiu s1,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2211 4000 ldp s0,0\(s1\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2201 c000 sdp s0,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2201 2000 ldc2 \$16,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test +[ 0-9a-f]+: 2201 a000 sdc2 \$16,0\(at\) + +[0-9a-f]+ : +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_delay_slot +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4063 fffe bgezal v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_delay_slot +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4023 fffe bltzal v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_delay_slot +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4263 fffe bgezals v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_delay_slot +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4223 fffe bltzals v1,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_delay_slot +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: f400 0000 jal [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test_delay_slot +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: f000 0000 jalx [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test_delay_slot +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 45c2 jalr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e2 0f3c jalr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4582 jr v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0002 0f3c jr v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 03e2 1f3c jalr\.hb v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 0002 1f3c jr\.hb v0 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 7400 0000 jals [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test_delay_slot +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 45e2 jalrs v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 03e2 4f3c jalrs v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0002 4f3c jrs v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 03e2 5f3c jalrs\.hb v0 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0002 5f3c jrs\.hb v0 +[ 0-9a-f]+: 0c00 nop + +[0-9a-f]+ : +[ 0-9a-f]+: 6540 lw v0,-256\(gp\) +[ 0-9a-f]+: 65c0 lw v1,-256\(gp\) +[ 0-9a-f]+: 6640 lw a0,-256\(gp\) +[ 0-9a-f]+: 66c0 lw a1,-256\(gp\) +[ 0-9a-f]+: 6740 lw a2,-256\(gp\) +[ 0-9a-f]+: 67c0 lw a3,-256\(gp\) +[ 0-9a-f]+: 6440 lw s0,-256\(gp\) +[ 0-9a-f]+: 64c0 lw s1,-256\(gp\) +[ 0-9a-f]+: 64c1 lw s1,-252\(gp\) +[ 0-9a-f]+: 64ff lw s1,-4\(gp\) +[ 0-9a-f]+: 6480 lw s1,0\(gp\) +[ 0-9a-f]+: 6481 lw s1,4\(gp\) +[ 0-9a-f]+: 64be lw s1,248\(gp\) +[ 0-9a-f]+: 64bf lw s1,252\(gp\) +[ 0-9a-f]+: fe3c 0100 lw s1,256\(gp\) +[ 0-9a-f]+: fe3c fefc lw s1,-260\(gp\) +[ 0-9a-f]+: fe3c 0001 lw s1,1\(gp\) +[ 0-9a-f]+: fe3c 0002 lw s1,2\(gp\) +[ 0-9a-f]+: fe3c 0003 lw s1,3\(gp\) +[ 0-9a-f]+: fe3c ffff lw s1,-1\(gp\) +[ 0-9a-f]+: fe3c fffe lw s1,-2\(gp\) +[ 0-9a-f]+: fe3c fffd lw s1,-3\(gp\) +[ 0-9a-f]+: fe3b 0000 lw s1,0\(k1\) +[ 0-9a-f]+: 7900 0000 addiu v0,\$pc,0 +[ 0-9a-f]+: 7980 0000 addiu v1,\$pc,0 +[ 0-9a-f]+: 7a00 0000 addiu a0,\$pc,0 +[ 0-9a-f]+: 7a80 0000 addiu a1,\$pc,0 +[ 0-9a-f]+: 7b00 0000 addiu a2,\$pc,0 +[ 0-9a-f]+: 7b80 0000 addiu a3,\$pc,0 +[ 0-9a-f]+: 7800 0000 addiu s0,\$pc,0 +[ 0-9a-f]+: 7880 0000 addiu s1,\$pc,0 +[ 0-9a-f]+: 78bf ffff addiu s1,\$pc,16777212 +[ 0-9a-f]+: 78c0 0000 addiu s1,\$pc,-16777216 +[ 0-9a-f]+: 7900 0000 addiu v0,\$pc,0 +[ 0-9a-f]+: 7980 0000 addiu v1,\$pc,0 +[ 0-9a-f]+: 7a00 0000 addiu a0,\$pc,0 +[ 0-9a-f]+: 7a80 0000 addiu a1,\$pc,0 +[ 0-9a-f]+: 7b00 0000 addiu a2,\$pc,0 +[ 0-9a-f]+: 7b80 0000 addiu a3,\$pc,0 +[ 0-9a-f]+: 7800 0000 addiu s0,\$pc,0 +[ 0-9a-f]+: 7880 0000 addiu s1,\$pc,0 +[ 0-9a-f]+: 78bf ffff addiu s1,\$pc,16777212 +[ 0-9a-f]+: 78c0 0000 addiu s1,\$pc,-16777216 + +[0-9a-f]+ : +[ 0-9a-f]+: 8400 movep a1,a2,zero,zero +[ 0-9a-f]+: 8480 movep a1,a3,zero,zero +[ 0-9a-f]+: 8500 movep a2,a3,zero,zero +[ 0-9a-f]+: 8580 movep a0,s5,zero,zero +[ 0-9a-f]+: 8600 movep a0,s6,zero,zero +[ 0-9a-f]+: 8680 movep a0,a1,zero,zero +[ 0-9a-f]+: 8700 movep a0,a2,zero,zero +[ 0-9a-f]+: 8780 movep a0,a3,zero,zero +[ 0-9a-f]+: 8782 movep a0,a3,s1,zero +[ 0-9a-f]+: 8784 movep a0,a3,v0,zero +[ 0-9a-f]+: 8786 movep a0,a3,v1,zero +[ 0-9a-f]+: 8788 movep a0,a3,s0,zero +[ 0-9a-f]+: 878a movep a0,a3,s2,zero +[ 0-9a-f]+: 878c movep a0,a3,s3,zero +[ 0-9a-f]+: 878e movep a0,a3,s4,zero +[ 0-9a-f]+: 879e movep a0,a3,s4,s1 +[ 0-9a-f]+: 87ae movep a0,a3,s4,v0 +[ 0-9a-f]+: 87be movep a0,a3,s4,v1 +[ 0-9a-f]+: 87ce movep a0,a3,s4,s0 +[ 0-9a-f]+: 87de movep a0,a3,s4,s2 +[ 0-9a-f]+: 87ee movep a0,a3,s4,s3 +[ 0-9a-f]+: 87fe movep a0,a3,s4,s4 +[ 0-9a-f]+: 4260 fffe bals [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4262 fffe bgezals v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4222 fffe bltzals v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 4060 fffe bal [0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4062 fffe bgezal v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0000 0000 nop +[ 0-9a-f]+: 4022 fffe bltzal v0,[0-9a-f]+ <.*\+0x[0-9a-f]+> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test_spec107 +[ 0-9a-f]+: 0000 0000 nop +#pass diff --git a/gas/testsuite/gas/mips/micromips.l b/gas/testsuite/gas/mips/micromips.l new file mode 100644 index 0000000..d6c6b50 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips.l @@ -0,0 +1,27 @@ +.*: Assembler messages: +.*:560: Warning: Divide by zero. +.*:563: Warning: Divide by zero. +.*:576: Warning: Divide by zero. +.*:1541: Warning: Divide by zero. +.*:1544: Warning: Divide by zero. +.*:1557: Warning: Divide by zero. +.*:2604: Warning: Branch bge is always true +.*:2607: Warning: Branch bgeu is always true +.*:2616: Warning: Branch bgeu is always true +.*:2691: Warning: Branch ble is always true +.*:2706: Warning: Branch bleu is always true +.*:2712: Warning: Branch bleu is always true +.*:2715: Warning: Branch bleu is always true +.*:2814: Warning: Branch bgel is always true +.*:2817: Warning: Branch bgeul is always true +.*:2826: Warning: Branch bgeul is always true +.*:2901: Warning: Branch blel is always true +.*:2916: Warning: Branch bleul is always true +.*:2922: Warning: Branch bleul is always true +.*:2925: Warning: Branch bleul is always true +.*:4739: Warning: Divide by zero. +.*:4742: Warning: Divide by zero. +.*:4755: Warning: Divide by zero. +.*:5160: Warning: Divide by zero. +.*:5170: Warning: Divide by zero. +.*:5180: Warning: Divide by zero. diff --git a/gas/testsuite/gas/mips/micromips.s b/gas/testsuite/gas/mips/micromips.s new file mode 100644 index 0000000..a8144ad --- /dev/null +++ b/gas/testsuite/gas/mips/micromips.s @@ -0,0 +1,5651 @@ + .text + .align 3 + .set micromips + .ent test + .globl test +test: + pref 0, 0 + pref 0, 2047 + pref 0, -2048 + pref 0, 2048 + pref 0, -2049 + pref 0, ($0) + pref 0, 0($0) + pref 1, 0($0) + pref 2, 0($0) + pref 3, 0($0) + pref 4, 0($0) + pref 5, 0($0) + pref 6, 0($0) + pref 7, 0($0) + pref 7, 511($0) + pref 7, -512($0) + pref 31, 2047($0) + pref 31, -2048($0) + pref 31, 2048($0) + pref 31, -2049($0) + pref 3, 32767($0) + pref 3, -32768($0) + + pref 31, 2047($2) + pref 31, -2048($2) + pref 31, 2048($2) + pref 31, -2049($2) + pref 3, 32767($2) + pref 3, -32768($2) + + nop + nop16 + nop32 + ssnop + ehb + pause + + li $2, -1 + li $3, -1 + li $4, -1 + li $5, -1 + li $6, -1 + li $7, -1 + li $16, -1 + li $17, -1 + li $17, 0 + li $17, 125 + li $17, 126 + li $17, 127 + + li32 $2, 0 + li32 $2, 1 + li $2, 32767 + li $2, -32768 + li $2, 65535 + + li $2, 65536 + li $2, 0xffff8000 + li $2, 0xffff8001 + li $2, 0xffffffff + li $2, 0x12345678 + + move $0, $22 + move $2, $22 + move $3, $22 + move $4, $22 + move $5, $22 + move $6, $22 + move $7, $22 + move $8, $22 + move $9, $22 + move $10, $22 + move $30, $22 + move $31, $22 + move $0, $0 + move $0, $2 + move $0, $3 + move $0, $4 + move $0, $5 + move $0, $6 + move $0, $7 + move $0, $8 + move $0, $9 + move $0, $10 + move $0, $30 + move $0, $31 + + move $22, $2 + move16 $2, $22 + move16 $22, $2 + move32 $2, $22 + move32 $22, $2 + + b test + b16 test + b32 test + b 1f + b16 1f + b32 1f +1: + b 1b + b16 1b + b32 1b + + abs $2, $3 + abs $2, $4 + abs $2, $2 + abs $2 + + add $2, $3, $4 + add $29, $30, $31 + add $2, $2, $4 + add $2, $4 + add $2, $2, 0 + add $2, $2, 1 + add $2, $2, 32767 + add $2, $2, -32768 + add $2, $2, 65535 + + addi $3, $4, -32768 + addi $3, $4, 0 + addi $3, $4, 32767 + addi $3, $4, 65535 + addi $3, $3, 65535 + addi $3, 65535 + + addiu $0, -8 + addiu $2, -8 + addiu $3, -8 + addiu $4, -8 + addiu $5, -8 + addiu $6, -8 + addiu $7, -8 + addiu $8, -8 + addiu $9, -8 + addiu $10, -8 + addiu $30, -8 + addiu $31, -8 + addiu $31, -7 + addiu $31, 0 + addiu $31, 1 + addiu $31, 6 + addiu $31, 7 + addiu $31, 8 + addiu $29, -258 << 2 + addiu $29, -257 << 2 + addiu $29, -256 << 2 + addiu $29, 255 << 2 + addiu $29, 256 << 2 + addiu $29, 257 << 2 + addiu $29, $29, 257 << 2 + addiu $29, $29, 258 << 2 + + addiu $2, $2, -1 + addiu $2, $3, -1 + addiu $2, $4, -1 + addiu $2, $5, -1 + addiu $2, $6, -1 + addiu $2, $7, -1 + addiu $2, $16, -1 + addiu $2, $17, -1 + addiu $2, $17, 1 + addiu $2, $17, 4 + addiu $2, $17, 8 + addiu $2, $17, 12 + addiu $2, $17, 16 + addiu $2, $17, 20 + addiu $2, $17, 24 + addiu $3, $17, 24 + addiu $4, $17, 24 + addiu $5, $17, 24 + addiu $6, $17, 24 + addiu $7, $17, 24 + addiu $16, $17, 24 + addiu $17, $17, 24 + + addiu $2, $29, 0 << 2 + addiu $2, $29, 1 << 2 + addiu $2, $29, 62 << 2 + addiu $2, $29, 63 << 2 + addiu $2, $29, 64 << 2 + addiu $2, $29, 63 << 2 + addiu $3, $29, 63 << 2 + addiu $4, $29, 63 << 2 + addiu $5, $29, 63 << 2 + addiu $6, $29, 63 << 2 + addiu $7, $29, 63 << 2 + addiu $16, $29, 63 << 2 + addiu $17, $29, 63 << 2 + + addiu $3, $4, -32768 + addiu $3, $4, 0 + addiu $3, $4, 32767 + addiu $3, $4, 65535 + addiu $3, $3, 65535 + addiu $3, 65535 + + addu $2, $22, $0 + addu $22, $2, $0 + addu $2, $0, $22 + addu $22, $0, $2 + + addu $2, $3, $2 + addu $2, $3, $3 + addu $2, $3, $4 + addu $2, $3, $5 + addu $2, $3, $6 + addu $2, $3, $7 + addu $2, $3, $16 + addu $2, $3, $17 + + addu $2, $2, $17 + addu $2, $3, $17 + addu $2, $4, $17 + addu $2, $5, $17 + addu $2, $6, $17 + addu $2, $7, $17 + addu $2, $16, $17 + addu $2, $17, $17 + + addu $2, $2, $17 + addu $3, $2, $17 + addu $4, $2, $17 + addu $5, $2, $17 + addu $6, $2, $17 + addu $7, $2, $17 + addu $16, $2, $17 + addu $17, $2, $17 + + addu $7, $7, $2 + addu $7, $2 + addu $7, $2, $7 + + addu $29, $30, $31 + addu $2, $2, 0 + addu $2, $2, 1 + addu $2, $2, 32767 + addu $2, $2, -32768 + addu $2, $2, 65535 + + and $2, $2 + and $2, $3 + and $2, $4 + and $2, $5 + and $2, $6 + and $2, $7 + and $2, $16 + and $2, $17 + and $3, $2 + and $4, $2 + and $5, $2 + and $6, $2 + and $7, $2 + and $16, $2 + and $17, $2 + + and $2, $3 + and $2, $2, $3 + and $2, $3, $2 + and16 $2, $2, $3 + and32 $2, $2, $3 + + andi $2,$2,1 + andi $2,$2,2 + andi $2,$2,3 + andi $2,$2,4 + andi $2,$2,7 + andi $2,$2,8 + andi $2,$2,15 + andi $2,$2,16 + andi $2,$2,31 + andi $2,$2,32 + andi $2,$2,63 + andi $2,$2,64 + andi $2,$2,128 + andi $2,$2,255 + andi $2,$2,32768 + andi $2,$2,65535 + andi $2,$3,65535 + andi $2,$4,65535 + andi $2,$5,65535 + andi $2,$6,65535 + andi $2,$7,65535 + andi $2,$16,65535 + andi $2,$17,65535 + andi $3,$17,65535 + andi $4,$17,65535 + andi $5,$17,65535 + andi $6,$17,65535 + andi $7,$17,65535 + andi $16,$17,65535 + andi $17,$17,65535 + + andi $7,$7,65535 + andi $7,65535 + andi16 $7,65535 + andi32 $7,65535 + + and32 $2, $3, $4 + and32 $2, $2, $4 + and32 $2, $4 + and $2, $3, 0 + and $2, $3, 65535 + and $2, $3, 65536 + and $2, $3, 0xffff0001 + + bc2f test + bc2f $cc0, test + bc2f $cc1, test + bc2f $cc2, test + bc2f $cc3, test + bc2f $cc4, test + bc2f $cc5, test + bc2f $cc6, test + bc2f $cc7, test + + bc2t test + bc2t $cc0, test + bc2t $cc1, test + bc2t $cc2, test + bc2t $cc3, test + bc2t $cc4, test + bc2t $cc5, test + bc2t $cc6, test + bc2t $cc7, test + + .set noreorder + bc2fl $cc1, test + addu $3, $4, $5 + bc2tl $cc2, test + addu $6, $7, $8 + .set reorder + + bc2fl $cc3, test + addu $3, $4, $5 + bc2tl $cc4, test + addu $6, $7, $8 + + +test2: + beqz $2, test2 + beqz $3, test2 + beqz $4, test2 + beqz $5, test2 + beqz $6, test2 + beqz $7, test2 + beqz $16, test2 + beqz $17, test2 + beq $2, $0, test2 + beq $3, $0, test2 + beq $4, $0, test2 + beq $5, $0, test2 + beq $6, $0, test2 + beq $7, $0, test2 + beq $16, $0, test2 + beq $17, $0, test2 + beq $0, $2, test2 + beq $0, $3, test2 + beq $0, $4, test2 + beq $0, $5, test2 + beq $0, $6, test2 + beq $0, $7, test2 + beq $0, $16, test2 + beq $0, $17, test2 + + beqz16 $16, test2 + beqz32 $16, test2 + beqz $17, test2 + beqz32 $17, test2 + + beqzc $17, test2 + + beq $16, 0, test2 + beq $16, 10, test2 + beq $16, 32767, test2 + beq $16, 65536, test2 + + .set noreorder + beql $16, $17, test2 + addu $3, $4, $5 + beql $16, $17, 1f + addu $3, $4, $5 + beql $16, 0, test2 + addu $3, $4, $5 + beql $16, 0, 1f + addu $3, $4, $5 + beql $16, 10, test2 + addu $3, $4, $5 + beql $16, 10, 1f + addu $3, $4, $5 + beql $16, 32767, test2 + addu $3, $4, $5 + beql $16, 32767, 1f + addu $3, $4, $5 + beql $16, 65535, test2 + addu $3, $4, $5 + beql $16, 65535, 1f + addu $3, $4, $5 + + beql $16, $17, test2 + addu $3, $4, $29 + beql $16, $17, 1f + addu $3, $4, $29 + beql $16, 0, test2 + addu $3, $4, $29 + beql $16, 0, 1f + addu $3, $4, $29 + beql $16, 10, test2 + addu $3, $4, $29 + beql $16, 10, 1f + addu $3, $4, $29 + beql $16, 32767, test2 + addu $3, $4, $29 + beql $16, 32767, 1f + addu $3, $4, $29 + beql $16, 65535, test2 + addu $3, $4, $29 + beql $16, 65535, 1f + addu $3, $4, $29 +1: + .set reorder + + beql $16, $17, test2 + + beqzl $17, test2 + + bnez $2, test3 + bnez $3, test3 + bnez $4, test3 + bnez $5, test3 + bnez $6, test3 + bnez $7, test3 + bnez $16, test3 + bnez $17, test3 + bne $2, $0, test3 + bne $3, $0, test3 + bne $4, $0, test3 + bne $5, $0, test3 + bne $6, $0, test3 + bne $7, $0, test3 + bne $16, $0, test3 + bne $17, $0, test3 + bne $0, $2, test3 + bne $0, $3, test3 + bne $0, $4, test3 + bne $0, $5, test3 + bne $0, $6, test3 + bne $0, $7, test3 + bne $0, $16, test3 + bne $0, $17, test3 + + bnez16 $16, test3 + bnez32 $16, test3 + bnez $17, test2 + bnez32 $17, test2 +test3: + bnezc $17, test2 + + break + break 0 + break 1 + break 2 + break 3 + break 4 + break 5 + break 6 + break 7 + break 8 + break 9 + break 10 + break 11 + break 12 + break 13 + break 14 + break 15 + break 63 + break 64 + break 1023 + break 1023,1023 + + break32 + break32 0 + break32 1 + break32 2 + break32 15 + break32 63 + break32 64 + break32 1023 + break32 1023,1023 + + cache 0, 0 + cache 0, -2048 + cache 0, 2047 + cache 0, -2049 + cache 0, 2048 + cache 0, 0($2) + cache 0, -2048($2) + cache 0, 2047($2) + cache 0, -2049($2) + cache 0, 2048($2) + + cache 0, ($0) + cache 0, 0($0) + cache 1, 0($0) + cache 2, 0($0) + cache 3, 0($0) + cache 4, 0($0) + cache 5, 0($0) + cache 6, 0($0) + cache 31, 0($0) + cache 31, 2047($0) + cache 31, -2048($0) + cache 0, 2047($0) + cache 0, -2048($0) + + cache 31, 65536($3) + cache 31, 2048($3) + cache 31, -2049($3) + cache 31, 65537($3) + cache 31, 0xffffffff($3) + cache 31, 0xffff0000($3) + cache 31, 0xffff0001($3) + cache 31, 0xffff($3) + + cache 31, 65536($0) + cache 31, 2048($0) + cache 31, -2049($0) + cache 31, 65537($0) + cache 31, 0xffffffff($0) + cache 31, 0xffff0000($0) + cache 31, 0xffff0001($0) + cache 31, 0xffff($0) + + + clo $2, $3 + clo $3, $2 + clz $2, $3 + clz $3, $2 + + deret + + di + di $0 + di $2 + di $3 + di $30 + di $31 + + div $0, $2, $3 + div $0, $30, $31 + div $0, $3 + div $0, $31 + + div $2, $3, $0 + div $2, $3, $4 + + div $3, $4, 0 + div $3, $4, 1 + div $3, $4, -1 + div $3, $4, 2 + + divu $0, $2, $3 + divu $0, $30, $31 + divu $0, $3 + divu $0, $31 + + divu $2, $3, $0 + divu $2, $3, $4 + + divu $3, $4, 0 + divu $3, $4, 1 + divu $3, $4, -1 + divu $3, $4, 2 + + ei + ei $0 + ei $2 + ei $3 + ei $30 + ei $31 + + eret + + ext $2, $3, 5, 15 + ext $2, $3, 0, 32 + ext $2, $3, 31, 1 + ext $31, $30, 31, 1 + + ins $2, $3, 5, 15 + ins $2, $3, 0, 32 + ins $2, $3, 31, 1 + ins $31, $30, 31, 1 + + jr $0 + jr $2 + jr $3 + jr $4 + jr $5 + jr $6 + jr $7 + jr $8 + jr $30 + jr $31 + + jr32 $0 + jr32 $2 + jr32 $3 + jr32 $4 + jr32 $5 + jr32 $6 + jr32 $7 + jr32 $8 + jr32 $30 + jr32 $31 + + jrc $0 + jrc $2 + jrc $3 + jrc $4 + jrc $5 + jrc $6 + jrc $7 + jrc $8 + jrc $30 + jrc $31 + + jr.hb $0 + jr.hb $2 + jr.hb $3 + jr.hb $4 + jr.hb $5 + jr.hb $6 + jr.hb $7 + jr.hb $8 + jr.hb $30 + jr.hb $31 + + j $0 + j $2 + j $3 + j $4 + j $5 + j $6 + j $7 + j $8 + j $30 + j $31 + + jalr $31, $0 + jalr $2 + jalr $3 + jalr $4 + jalr $5 + jalr $6 + jalr $7 + jalr $8 + jalr $30 + + jalr32 $31, $0 + jalr32 $2 + jalr32 $3 + jalr32 $4 + jalr32 $5 + jalr32 $6 + jalr32 $7 + jalr32 $8 + jalr32 $30 + + jalr $31, $0 + jalr $31, $2 + jalr $31, $3 + jalr $31, $4 + jalr $31, $5 + jalr $31, $6 + jalr $31, $7 + jalr $31, $8 + jalr $31, $30 + jalr $30, $31 + + jalr $2, $0 + jalr $3, $2 + jalr $2, $3 + jalr $2, $4 + jalr $2, $5 + jalr $2, $6 + jalr $2, $7 + jalr $2, $8 + jalr $2, $30 + jalr $2, $31 + + jalr.hb $31, $0 + jalr.hb $2 + jalr.hb $3 + jalr.hb $4 + jalr.hb $5 + jalr.hb $6 + jalr.hb $7 + jalr.hb $8 + jalr.hb $30 + #jalr.hb $31 + + jalr.hb $31, $0 + jalr.hb $31, $2 + jalr.hb $31, $3 + jalr.hb $31, $4 + jalr.hb $31, $5 + jalr.hb $31, $6 + jalr.hb $31, $7 + jalr.hb $31, $8 + jalr.hb $31, $30 + jalr.hb $30, $31 + + jalr.hb $2, $0 + jalr.hb $3, $2 + jalr.hb $2, $3 + jalr.hb $2, $4 + jalr.hb $2, $5 + jalr.hb $2, $6 + jalr.hb $2, $7 + jalr.hb $2, $8 + jalr.hb $2, $30 + jalr.hb $2, $31 + + jal $2, $3 + jal $30, $31 + + jal $3 + jal $31 + + jal test + jal test2 + + jalx test + jalx test2 + + la $2, test + lca $2, test + + lb $3, 0 + lb $3, 4 + lb $3, 0($0) + lb $3, 4($0) + lb $3, 32767($0) + lb $3, -32768($0) + lb $3, 65535($0) + lb $3, 0xffff0000($0) + lb $3, 0xffff8000($0) + lb $3, 0xffff0001($0) + lb $3, 0xffff8001($0) + lb $3, 0xf0000000($0) + lb $3, 0xffffffff($0) + lb $3, 0x12345678($0) + lb $3, ($4) + lb $3, 0($4) + lb $3, 4($4) + lb $3, 32767($4) + lb $3, -32768($4) + lb $3, 65535($4) + lb $3, 0xffff0000($4) + lb $3, 0xffff8000($4) + lb $3, 0xffff0001($4) + lb $3, 0xffff8001($4) + lb $3, 0xf0000000($4) + lb $3, 0xffffffff($4) + lb $3, 0x12345678($4) + + lbu $2, -1($3) + lbu $2, 0($3) + lbu $2, ($3) + lbu $2, 1($3) + lbu $2, 2($3) + lbu $2, 3($3) + lbu $2, 4($3) + lbu $2, 5($3) + lbu $2, 6($3) + lbu $2, 7($3) + lbu $2, 8($3) + lbu $2, 9($3) + lbu $2, 10($3) + lbu $2, 11($3) + lbu $2, 12($3) + lbu $2, 13($3) + lbu $2, 14($3) + lbu $2, 14($2) + lbu $2, 14($4) + lbu $2, 14($5) + lbu $2, 14($6) + lbu $2, 14($7) + lbu $2, 14($16) + lbu $2, 14($17) + lbu $3, 14($17) + lbu $4, 14($17) + lbu $5, 14($17) + lbu $6, 14($17) + lbu $7, 14($17) + lbu $16, 14($17) + lbu $17, 14($17) + + lbu $3, 0 + lbu $3, 4 + lbu $3, 0($0) + lbu $3, 4($0) + lbu $3, 32767($0) + lbu $3, -32768($0) + lbu $3, 65535($0) + lbu $3, 0xffff0000($0) + lbu $3, 0xffff8000($0) + lbu $3, 0xffff0001($0) + lbu $3, 0xffff8001($0) + lbu $3, 0xf0000000($0) + lbu $3, 0xffffffff($0) + lbu $3, 0x12345678($0) + + lbu $3, ($4) + lbu $3, 0($4) + lbu $3, 4($4) + lbu $3, 32767($4) + lbu $3, -32768($4) + lbu $3, 65535($4) + lbu $3, 0xffff0000($4) + lbu $3, 0xffff8000($4) + lbu $3, 0xffff0001($4) + lbu $3, 0xffff8001($4) + lbu $3, 0xf0000000($4) + lbu $3, 0xffffffff($4) + lbu $3, 0x12345678($4) + + lh $3, 0 + lh $3, 4 + lh $3, 0($0) + lh $3, 4($0) + lh $3, 32767($0) + lh $3, -32768($0) + lh $3, 65535($0) + lh $3, 0xffff0000($0) + lh $3, 0xffff8000($0) + lh $3, 0xffff0001($0) + lh $3, 0xffff8001($0) + lh $3, 0xf0000000($0) + lh $3, 0xffffffff($0) + lh $3, 0x12345678($0) + lh $3, ($4) + lh $3, 0($4) + lh $3, 4($4) + lh $3, 32767($4) + lh $3, -32768($4) + lh $3, 65535($4) + lh $3, 0xffff0000($4) + lh $3, 0xffff8000($4) + lh $3, 0xffff0001($4) + lh $3, 0xffff8001($4) + lh $3, 0xf0000000($4) + lh $3, 0xffffffff($4) + lh $3, 0x12345678($4) + + lhu $2, ($3) + lhu $2, 0<<1($3) + lhu $2, 1<<1($3) + lhu $2, 2<<1($3) + lhu $2, 3<<1($3) + lhu $2, 4<<1($3) + lhu $2, 5<<1($3) + lhu $2, 6<<1($3) + lhu $2, 7<<1($3) + lhu $2, 8<<1($3) + lhu $2, 9<<1($3) + lhu $2, 10<<1($3) + lhu $2, 11<<1($3) + lhu $2, 12<<1($3) + lhu $2, 13<<1($3) + lhu $2, 14<<1($3) + lhu $2, 15<<1($3) + lhu $2, 15<<1($4) + lhu $2, 15<<1($5) + lhu $2, 15<<1($6) + lhu $2, 15<<1($7) + lhu $2, 15<<1($2) + lhu $2, 15<<1($16) + lhu $2, 15<<1($17) + lhu $3, 15<<1($17) + lhu $4, 15<<1($17) + lhu $5, 15<<1($17) + lhu $6, 15<<1($17) + lhu $7, 15<<1($17) + lhu $16, 15<<1($17) + lhu $17, 15<<1($17) + + lhu $3, 0 + lhu $3, 4 + lhu $3, 0($0) + lhu $3, 4($0) + lhu $3, 32767($0) + lhu $3, -32768($0) + lhu $3, 65535($0) + lhu $3, 0xffff0000($0) + lhu $3, 0xffff8000($0) + lhu $3, 0xffff0001($0) + lhu $3, 0xffff8001($0) + lhu $3, 0xf0000000($0) + lhu $3, 0xffffffff($0) + lhu $3, 0x12345678($0) + lhu $3, ($4) + lhu $3, 0($4) + lhu $3, 4($4) + lhu $3, 32767($4) + lhu $3, -32768($4) + lhu $3, 65535($4) + lhu $3, 0xffff0000($4) + lhu $3, 0xffff8000($4) + lhu $3, 0xffff0001($4) + lhu $3, 0xffff8001($4) + lhu $3, 0xf0000000($4) + lhu $3, 0xffffffff($4) + lhu $3, 0x12345678($4) + + ll $3, 0 + ll $3, 0($0) + ll $3, 4 + ll $3, 4($0) + ll $3, 32767($0) + ll $3, -32768($0) + ll $3, 65535($0) + ll $3, 0xffff0000($0) + ll $3, 0xffff8000($0) + ll $3, 0xffff0001($0) + ll $3, 0xffff8001($0) + ll $3, 0xf0000000($0) + ll $3, 0xffffffff($0) + ll $3, 0x12345678($0) + ll $3, ($4) + ll $3, 0($4) + ll $3, 4($4) + ll $3, 32767($4) + ll $3, -32768($4) + ll $3, 65535($4) + ll $3, 0xffff0000($4) + ll $3, 0xffff8000($4) + ll $3, 0xffff0001($4) + ll $3, 0xffff8001($4) + ll $3, 0xf0000000($4) + ll $3, 0xffffffff($4) + ll $3, 0x12345678($4) + + lui $3, 0 + lui $3, 32767 + lui $3, 65535 + + lw $2, ($4) + lw $2, 0($4) + lw $2, 1<<2($4) + lw $2, 2<<2($4) + lw $2, 3<<2($4) + lw $2, 4<<2($4) + lw $2, 5<<2($4) + lw $2, 6<<2($4) + lw $2, 7<<2($4) + lw $2, 8<<2($4) + lw $2, 9<<2($4) + lw $2, 10<<2($4) + lw $2, 11<<2($4) + lw $2, 12<<2($4) + lw $2, 13<<2($4) + lw $2, 14<<2($4) + lw $2, 15<<2($4) + lw $2, 15<<2($5) + lw $2, 15<<2($6) + lw $2, 15<<2($7) + lw $2, 15<<2($2) + lw $2, 15<<2($3) + lw $2, 15<<2($16) + lw $2, 15<<2($17) + lw $3, 15<<2($17) + lw $4, 15<<2($17) + lw $5, 15<<2($17) + lw $6, 15<<2($17) + lw $7, 15<<2($17) + lw $16, 15<<2($17) + lw $17, 15<<2($17) + + lw $4, ($29) + lw $4, 0($29) + lw $4, 1<<2($29) + lw $4, 2<<2($29) + lw $4, 3<<2($29) + lw $4, 4<<2($29) + lw $4, 5<<2($29) + lw $4, 31<<2($29) + lw $2, 31<<2($29) + lw $2, 31<<2($29) + lw $3, 31<<2($29) + lw $4, 31<<2($29) + lw $5, 31<<2($29) + lw $6, 31<<2($29) + lw $7, 31<<2($29) + lw $8, 31<<2($29) + lw $9, 31<<2($29) + lw $10, 31<<2($29) + lw $30, 31<<2($29) + lw $31, 31<<2($29) + + lw $4, 126<<2($29) + lw $4, 127<<2($29) + lw $16, 127<<2($29) + lw $17, 127<<2($29) + lw $18, 127<<2($29) + lw $19, 127<<2($29) + lw $20, 127<<2($29) + lw $21, 127<<2($29) + lw $31, 127<<2($29) + + lw $3, 0 + lw $3, 4 + lw $3, ($0) + lw $3, 0($0) + lw $3, 0($0) + lw $3, 4($0) + lw $3, 32767($0) + lw $3, -32768($0) + lw $3, 65535($0) + lw $3, 0xffff0000($0) + lw $3, 0xffff8000($0) + lw $3, 0xffff0001($0) + lw $3, 0xffff8001($0) + lw $3, 0xf0000000($0) + lw $3, 0xffffffff($0) + lw $3, 0x12345678($0) + lw $3, ($4) + lw $3, 0($4) + lw $3, 4($4) + lw $3, 32767($4) + lw $3, -32768($4) + lw $3, 65535($4) + lw $3, 0xffff0000($4) + lw $3, 0xffff8000($4) + lw $3, 0xffff0001($4) + lw $3, 0xffff8001($4) + lw $3, 0xf0000000($4) + lw $3, 0xffffffff($4) + lw $3, 0x12345678($4) + + lwm $s0, $ra, 12<<2($29) + lwm $s0, $s1, $ra, 12<<2($29) + lwm $s0-$s1, $ra, 12<<2($29) + lwm $s0, $s1, $s2, $ra, 12<<2($29) + lwm $s0-$s2, $ra, 12<<2($29) + lwm $s0, $s1, $s2, $s3, $ra, 12<<2($29) + lwm $s0-$s3, $ra, 12<<2($29) + lwm $s0, $ra, ($29) + lwm $s0, $ra, 0($29) + lwm $s0, $ra, 1<<2($29) + lwm $s0, $ra, 2<<2($29) + lwm $s0, $ra, 3<<2($29) + lwm $s0, $ra, 4<<2($29) + lwm $s0, $ra, 5<<2($29) + lwm $s0, $ra, 6<<2($29) + lwm $s0, $ra, 7<<2($29) + lwm $s0, $ra, 8<<2($29) + lwm $s0, $ra, 9<<2($29) + lwm $s0, $ra, 10<<2($29) + lwm $s0, $ra, 11<<2($29) + lwm $s0, $ra, 12<<2($29) + lwm $s0, $ra, 13<<2($29) + lwm $s0, $ra, 14<<2($29) + lwm $s0, $ra, 15<<2($29) + + lwm $s0, 0 + lwm $s0, 4 + lwm $s0, ($5) + lwm $s0, 2047($5) + lwm $s0-$s1, 2047($5) + lwm $s0-$s2, 2047($5) + lwm $s0-$s3, 2047($5) + lwm $s0-$s4, 2047($5) + lwm $s0-$s5, 2047($5) + lwm $s0-$s6, 2047($5) + lwm $s0-$s7, 2047($5) + lwm $s0-$s8, 2047($5) + lwm $ra, 2047($5) + lwm $s0,$ra, ($5) + lwm $s0-$s1,$ra, ($5) + lwm $s0-$s2,$ra, ($5) + lwm $s0-$s3,$ra, ($5) + lwm $s0-$s4,$ra, ($5) + lwm $s0-$s5,$ra, ($5) + lwm $s0-$s6,$ra, ($5) + lwm $s0-$s7,$ra, ($5) + lwm $s0-$s8,$ra, ($5) + lwm $s0, -32768($0) + lwm $s0, 32767($0) + lwm $s0, 0($0) + lwm $s0, 65535($0) + lwm $s0, -32768($29) + lwm $s0, 32767($29) + lwm $s0, 0($29) + lwm $s0, 65535($29) + + lwp $2, 0 + lwp $2, 4 + lwp $2, ($29) + lwp $2, 0($29) + lwp $2, -2048($3) + lwp $2, 2047($3) + lwp $2, -32768($3) + lwp $2, 32767($3) + lwp $2, 0($3) + lwp $2, 65535($3) + lwp $2, -32768($0) + lwp $2, 32767($0) + lwp $2, 65535($0) + + lwl $3, 4 + lwl $3, 4($0) + lwl $3, ($0) + lwl $3, 0($0) + lwl $3, 2047($0) + lwl $3, -2048($0) + lwl $3, 32767($0) + lwl $3, -32768($0) + lwl $3, 65535($0) + lwl $3, 0xffff0000($0) + lwl $3, 0xffff8000($0) + lwl $3, 0xffff0001($0) + lwl $3, 0xffff8001($0) + lwl $3, 0xf0000000($0) + lwl $3, 0xffffffff($0) + lwl $3, 0x12345678($0) + lwl $3, ($4) + lwl $3, 0($4) + lwl $3, 2047($4) + lwl $3, -2048($4) + lwl $3, 32767($4) + lwl $3, -32768($4) + lwl $3, 65535($4) + lwl $3, 0xffff0000($4) + lwl $3, 0xffff8000($4) + lwl $3, 0xffff0001($4) + lwl $3, 0xffff8001($4) + lwl $3, 0xf0000000($4) + lwl $3, 0xffffffff($4) + lwl $3, 0x12345678($4) + + lcache $3, 4 + lcache $3, 4($0) + lcache $3, ($0) + lcache $3, 0($0) + lcache $3, 2047($0) + lcache $3, -2048($0) + lcache $3, 32767($0) + lcache $3, -32768($0) + lcache $3, 65535($0) + lcache $3, 0xffff0000($0) + lcache $3, 0xffff8000($0) + lcache $3, 0xffff0001($0) + lcache $3, 0xffff8001($0) + lcache $3, 0xf0000000($0) + lcache $3, 0xffffffff($0) + lcache $3, 0x12345678($0) + lcache $3, ($4) + lcache $3, 0($4) + lcache $3, 2047($4) + lcache $3, -2048($4) + lcache $3, 32767($4) + lcache $3, -32768($4) + lcache $3, 65535($4) + lcache $3, 0xffff0000($4) + lcache $3, 0xffff8000($4) + lcache $3, 0xffff0001($4) + lcache $3, 0xffff8001($4) + lcache $3, 0xf0000000($4) + lcache $3, 0xffffffff($4) + lcache $3, 0x12345678($4) + + lwr $3, 4 + lwr $3, 4($0) + lwr $3, ($0) + lwr $3, 0($0) + lwr $3, 2047($0) + lwr $3, -2048($0) + lwr $3, 32767($0) + lwr $3, -32768($0) + lwr $3, 65535($0) + lwr $3, 0xffff0000($0) + lwr $3, 0xffff8000($0) + lwr $3, 0xffff0001($0) + lwr $3, 0xffff8001($0) + lwr $3, 0xf0000000($0) + lwr $3, 0xffffffff($0) + lwr $3, 0x12345678($0) + lwr $3, ($4) + lwr $3, 0($4) + lwr $3, 2047($4) + lwr $3, -2048($4) + lwr $3, 32767($4) + lwr $3, -32768($4) + lwr $3, 65535($4) + lwr $3, 0xffff0000($4) + lwr $3, 0xffff8000($4) + lwr $3, 0xffff0001($4) + lwr $3, 0xffff8001($4) + lwr $3, 0xf0000000($4) + lwr $3, 0xffffffff($4) + lwr $3, 0x12345678($4) + + flush $3, 4 + flush $3, 4($0) + flush $3, ($0) + flush $3, 0($0) + flush $3, 2047($0) + flush $3, -2048($0) + flush $3, 32767($0) + flush $3, -32768($0) + flush $3, 65535($0) + flush $3, 0xffff0000($0) + flush $3, 0xffff8000($0) + flush $3, 0xffff0001($0) + flush $3, 0xffff8001($0) + flush $3, 0xf0000000($0) + flush $3, 0xffffffff($0) + flush $3, 0x12345678($0) + flush $3, ($4) + flush $3, 0($4) + flush $3, 2047($4) + flush $3, -2048($4) + flush $3, 32767($4) + flush $3, -32768($4) + flush $3, 65535($4) + flush $3, 0xffff0000($4) + flush $3, 0xffff8000($4) + flush $3, 0xffff0001($4) + flush $3, 0xffff8001($4) + flush $3, 0xf0000000($4) + flush $3, 0xffffffff($4) + flush $3, 0x12345678($4) + + lwxs $3, $4($5) + madd $4,$5 + maddu $4,$5 + + mfc0 $2, $0 + mfc0 $2, $1 + mfc0 $2, $2 + mfc0 $2, $3 + mfc0 $2, $4 + mfc0 $2, $5 + mfc0 $2, $6 + mfc0 $2, $7 + mfc0 $2, $8 + mfc0 $2, $9 + mfc0 $2, $10 + mfc0 $2, $11 + mfc0 $2, $12 + mfc0 $2, $13 + mfc0 $2, $14 + mfc0 $2, $15 + mfc0 $2, $16 + mfc0 $2, $17 + mfc0 $2, $18 + mfc0 $2, $19 + mfc0 $2, $20 + mfc0 $2, $21 + mfc0 $2, $22 + mfc0 $2, $23 + mfc0 $2, $24 + mfc0 $2, $25 + mfc0 $2, $26 + mfc0 $2, $27 + mfc0 $2, $28 + mfc0 $2, $29 + mfc0 $2, $30 + mfc0 $2, $31 + + mfc0 $2, $0, 0 + mfc0 $2, $0, 1 + mfc0 $2, $0, 2 + mfc0 $2, $0, 3 + mfc0 $2, $0, 4 + mfc0 $2, $0, 5 + mfc0 $2, $0, 6 + mfc0 $2, $0, 7 + mfc0 $2, $1, 0 + mfc0 $2, $1, 1 + mfc0 $2, $1, 2 + mfc0 $2, $1, 3 + mfc0 $2, $1, 4 + mfc0 $2, $1, 5 + mfc0 $2, $1, 6 + mfc0 $2, $1, 7 + mfc0 $2, $2, 0 + mfc0 $2, $2, 1 + mfc0 $2, $2, 2 + mfc0 $2, $2, 3 + mfc0 $2, $2, 4 + mfc0 $2, $2, 5 + mfc0 $2, $2, 6 + mfc0 $2, $2, 7 + + mfhi $0 + mfhi $2 + mfhi $3 + mfhi $4 + mfhi $29 + mfhi $30 + mfhi $31 + + mfhi32 $0 + mfhi32 $2 + mfhi32 $3 + mfhi32 $4 + mfhi32 $29 + mfhi32 $30 + mfhi32 $31 + + mflo $0 + mflo $2 + mflo $3 + mflo $4 + mflo $29 + mflo $30 + mflo $31 + + mflo32 $0 + mflo32 $2 + mflo32 $3 + mflo32 $4 + mflo32 $29 + mflo32 $30 + mflo32 $31 + + movn $2, $3 + movn $2, $2, $3 + movn $2, $3, $4 + + movz $2, $3 + movz $2, $2, $3 + movz $2, $3, $4 + + msub $4,$5 + msubu $4,$5 + + mtc0 $2, $0 + mtc0 $2, $1 + mtc0 $2, $2 + mtc0 $2, $3 + mtc0 $2, $4 + mtc0 $2, $5 + mtc0 $2, $6 + mtc0 $2, $7 + mtc0 $2, $8 + mtc0 $2, $9 + mtc0 $2, $10 + mtc0 $2, $11 + mtc0 $2, $12 + mtc0 $2, $13 + mtc0 $2, $14 + mtc0 $2, $15 + mtc0 $2, $16 + mtc0 $2, $17 + mtc0 $2, $18 + mtc0 $2, $19 + mtc0 $2, $20 + mtc0 $2, $21 + mtc0 $2, $22 + mtc0 $2, $23 + mtc0 $2, $24 + mtc0 $2, $25 + mtc0 $2, $26 + mtc0 $2, $27 + mtc0 $2, $28 + mtc0 $2, $29 + mtc0 $2, $30 + mtc0 $2, $31 + + mtc0 $2, $0, 0 + mtc0 $2, $0, 1 + mtc0 $2, $0, 2 + mtc0 $2, $0, 3 + mtc0 $2, $0, 4 + mtc0 $2, $0, 5 + mtc0 $2, $0, 6 + mtc0 $2, $0, 7 + mtc0 $2, $1, 0 + mtc0 $2, $1, 1 + mtc0 $2, $1, 2 + mtc0 $2, $1, 3 + mtc0 $2, $1, 4 + mtc0 $2, $1, 5 + mtc0 $2, $1, 6 + mtc0 $2, $1, 7 + mtc0 $2, $2, 0 + mtc0 $2, $2, 1 + mtc0 $2, $2, 2 + mtc0 $2, $2, 3 + mtc0 $2, $2, 4 + mtc0 $2, $2, 5 + mtc0 $2, $2, 6 + mtc0 $2, $2, 7 + + mthi $0 + mthi $2 + mthi $3 + mthi $4 + mthi $29 + mthi $30 + mthi $31 + + mtlo $0 + mtlo $2 + mtlo $3 + mtlo $4 + mtlo $29 + mtlo $30 + mtlo $31 + + mul $2, $3, $4 + mul $29, $30, $31 + mul $2, $2, $4 + mul $2, $4 + mul $2, $2, 0 + mul $2, $2, 1 + mul $2, $2, 32767 + mul $2, $2, -32768 + mul $2, $2, 65535 + + mulo $2, $3, $4 + mulo $2, $3, 4 + mulou $2, $3, $4 + mulou $2, $3, 4 + + mult $2, $3 + multu $2, $3 + + neg $2, $3 + neg $2, $2 + neg $2 + negu $2, $3 + negu $2, $2 + negu $2 + negu32 $2, $3 + negu32 $2, $2 + negu32 $2 + + not $2, $2 + not $2, $2 + not $2, $3 + not $2, $4 + not $2, $5 + not $2, $6 + not $2, $7 + not $2, $16 + not $2, $17 + not $3, $17 + not $4, $17 + not $5, $17 + not $6, $17 + not $7, $17 + not $16, $17 + not $17, $17 + + nor $2, $7, $0 + nor $2, $0, $7 + + nor32 $2, $3, $4 + nor32 $29, $30, $31 + nor32 $2, $2, $4 + nor32 $2, $4 + + nor $2, $3, 32768 + nor $2, $3, 65535 + nor $2, $3, 65536 + nor $2, $3, -32768 + nor $2, $3, -32769 + + or $2, $22, $0 + or $22, $2, $0 + or $2, $0, $22 + or $22, $0, $2 + + or $2, $2 + or $2, $3 + or $2, $4 + or $2, $5 + or $2, $6 + or $2, $7 + or $2, $16 + or $2, $17 + or $3, $2 + or $4, $2 + or $5, $2 + or $6, $2 + or $7, $2 + or $16, $2 + or $17, $2 + or $2, $2 + or $2, $2, $3 + or $2, $3, $2 + + or32 $2, $3, $4 + or32 $29, $30, $31 + or32 $2, $2, $4 + or32 $2, $4 + + or $2, $3, 32768 + or $2, $3, 65535 + or $2, $3, 65536 + or $2, $3, -32768 + or $2, $3, -32769 + + ori $3, $4, 0 + ori $3, $4, 32767 + ori $3, $4, 65535 + ori $3, $3, 65535 + ori $3, 65535 + + rdhwr $2, $0 + rdhwr $2, $1 + rdhwr $2, $2 + rdhwr $2, $3 + rdhwr $2, $4 + rdhwr $2, $5 + rdhwr $2, $6 + rdhwr $2, $7 + rdhwr $2, $8 + rdhwr $2, $9 + rdhwr $2, $10 + + rdpgpr $2, $3 + rdpgpr $2, $2 + rdpgpr $2 + + rem $0, $2, $3 + rem $0, $30, $31 + rem $0, $3 + rem $0, $31 + + rem $2, $3, $0 + rem $2, $3, $4 + + rem $3, $4, 0 + rem $3, $4, 1 + rem $3, $4, -1 + rem $3, $4, 2 + + remu $0, $2, $3 + remu $0, $30, $31 + remu $0, $3 + remu $0, $31 + + remu $2, $3, $0 + remu $2, $3, $4 + + remu $3, $4, 0 + remu $3, $4, 1 + remu $3, $4, -1 + remu $3, $4, 2 + + rol $2, $3, $4 + rol $2, $2, $4 + rol $2, $3, $3 + rol $2, $3, $2 + + rol $2, $3, 0 + rol $2, $3, 1 + rol $2, $3, 31 + rol $2, $2, 31 + rol $2, 31 + + ror $2, $3, 0 + ror $2, $3, 1 + ror $2, $3, 31 + ror $2, $2, 31 + ror $2, 31 + + ror $2, $3, $4 + ror $2, $2, $4 + + rotr $2, $3, $4 + rotr $2, $2, $4 + + rorv $2, $3, $4 + rorv $2, $2, $4 + + rotrv $2, $3, $4 + rotrv $2, $2, $4 + + sb $0, ($3) + sb $0, 0($3) + sb $0, 1($3) + sb $0, 2($3) + sb $0, 3($3) + sb $0, 4($3) + sb $0, 5($3) + sb $0, 6($3) + sb $0, 7($3) + sb $0, 8($3) + sb $0, 9($3) + sb $0, 10($3) + sb $0, 11($3) + sb $0, 12($3) + sb $0, 13($3) + sb $0, 14($3) + sb $0, 15($3) + sb $2, 15($3) + sb $3, 15($3) + sb $4, 15($3) + sb $5, 15($3) + sb $6, 15($3) + sb $7, 15($3) + sb $17, 15($3) + sb $17, 15($4) + sb $17, 15($5) + sb $17, 15($6) + sb $17, 15($7) + sb $17, 15($2) + sb $17, 15($16) + sb $17, 15($17) + + sb32 $3, 4 + sb32 $3, 4($0) + sb32 $3, 32767($0) + sb32 $3, -32768($0) + sb $3, 65535($0) + sb $3, 0xffff0000($0) + sb $3, 0xffff8000($0) + sb $3, 0xffff0001($0) + sb $3, 0xffff8001($0) + sb $3, 0xf0000000($0) + sb $3, 0xffffffff($0) + sb $3, 0x12345678($0) + sb32 $3, ($4) + sb32 $3, 0($4) + sb32 $3, 32767($4) + sb32 $3, -32768($4) + sb $3, 65535($4) + sb $3, 0xffff0000($4) + sb $3, 0xffff8000($4) + sb $3, 0xffff0001($4) + sb $3, 0xffff8001($4) + sb $3, 0xf0000000($4) + sb $3, 0xffffffff($4) + sb $3, 0x12345678($4) + + sc $3, 4 + sc $3, 4($0) + sc $3, 2047($0) + sc $3, -2048($0) + sc $3, 32767($0) + sc $3, -32768($0) + sc $3, 65535($0) + sc $3, 0xffff0000($0) + sc $3, 0xffff8000($0) + sc $3, 0xffff0001($0) + sc $3, 0xffff8001($0) + sc $3, 0xf0000000($0) + sc $3, 0xffffffff($0) + sc $3, 0x12345678($0) + sc $3, ($4) + sc $3, 0($4) + sc $3, 2047($4) + sc $3, -2048($4) + sc $3, 32767($4) + sc $3, -32768($4) + sc $3, 65535($4) + sc $3, 0xffff0000($4) + sc $3, 0xffff8000($4) + sc $3, 0xffff0001($4) + sc $3, 0xffff8001($4) + sc $3, 0xf0000000($4) + sc $3, 0xffffffff($4) + sc $3, 0x12345678($4) + + sdbbp + sdbbp 0 + sdbbp 1 + sdbbp 2 + sdbbp 3 + sdbbp 4 + sdbbp 5 + sdbbp 6 + sdbbp 7 + sdbbp 8 + sdbbp 9 + sdbbp 10 + sdbbp 11 + sdbbp 12 + sdbbp 13 + sdbbp 14 + sdbbp 15 + + sdbbp32 + sdbbp32 0 + sdbbp32 1 + sdbbp32 2 + sdbbp32 255 + + seb $2, $3 + seb $2, $2 + seb $2 + + seh $2, $3 + seh $2, $2 + seh $2 + + seq $2, $3, $4 + seq $2, $3, $0 + seq $2, $0, $4 + + seq $2, $3, 0 + seq $2, $3, 1 + seq $2, $3, -1 + seq $2, $3, -32769 + + sge $2, $3, $4 + sge $2, $2, $4 + sge $2, $4 + sge $2, $3, 0 + sge $2, $3, -32768 + sge $2, $3, 0 + sge $2, $3, 32767 + sge $2, $3, 65535 + sge $2, $3, 65536 + sge $2, $3, -32769 + + sgeu $2, $3, $4 + sgeu $2, $2, $4 + sgeu $2, $4 + sgeu $2, $3, 0 + sgeu $2, $3, -32768 + sgeu $2, $3, 0 + sgeu $2, $3, 32767 + sgeu $2, $3, 65535 + sgeu $2, $3, 65536 + sgeu $2, $3, -32769 + + sgt $2, $3, $4 + sgt $2, $2, $4 + sgt $2, $4 + sgt $2, $3, 0 + sgt $2, $3, -32768 + sgt $2, $3, 0 + sgt $2, $3, 32767 + sgt $2, $3, 65535 + sgt $2, $3, 65536 + sgt $2, $3, -32769 + + sgtu $2, $3, $4 + sgtu $2, $2, $4 + sgtu $2, $4 + sgtu $2, $3, 0 + sgtu $2, $3, -32768 + sgtu $2, $3, 0 + sgtu $2, $3, 32767 + sgtu $2, $3, 65535 + sgtu $2, $3, 65536 + sgtu $2, $3, -32769 + + sh $2, ($3) + sh $2, 0<<1($3) + sh $2, 1<<1($3) + sh $2, 2<<1($3) + sh $2, 3<<1($3) + sh $2, 4<<1($3) + sh $2, 5<<1($3) + sh $2, 6<<1($3) + sh $2, 7<<1($3) + sh $2, 8<<1($3) + sh $2, 9<<1($3) + sh $2, 10<<1($3) + sh $2, 11<<1($3) + sh $2, 12<<1($3) + sh $2, 13<<1($3) + sh $2, 14<<1($3) + sh $2, 15<<1($3) + sh $2, 15<<1($4) + sh $2, 15<<1($5) + sh $2, 15<<1($6) + sh $2, 15<<1($7) + sh $2, 15<<1($2) + sh $2, 15<<1($16) + sh $2, 15<<1($17) + sh $3, 15<<1($17) + sh $4, 15<<1($17) + sh $5, 15<<1($17) + sh $6, 15<<1($17) + sh $7, 15<<1($17) + sh $17, 15<<1($17) + sh $0, 15<<1($17) + + sh32 $3, 4 + sh32 $3, 4($0) + sh32 $3, 32767($0) + sh32 $3, -32768($0) + sh $3, 65535($0) + sh $3, 0xffff0000($0) + sh $3, 0xffff8000($0) + sh $3, 0xffff0001($0) + sh $3, 0xffff8001($0) + sh $3, 0xf0000000($0) + sh $3, 0xffffffff($0) + sh $3, 0x12345678($0) + sh32 $3, ($4) + sh32 $3, 0($4) + sh32 $3, 32767($4) + sh32 $3, -32768($4) + sh $3, 65535($4) + sh $3, 0xffff0000($4) + sh $3, 0xffff8000($4) + sh $3, 0xffff0001($4) + sh $3, 0xffff8001($4) + sh $3, 0xf0000000($4) + sh $3, 0xffffffff($4) + sh $3, 0x12345678($4) + + sle $2, $3, $4 + sle $2, $2, $4 + sle $2, $4 + sle $2, $3, 0 + sle $2, $3, -32768 + sle $2, $3, 0 + sle $2, $3, 32767 + sle $2, $3, 65535 + sle $2, $3, 65536 + sle $2, $3, -32769 + + sleu $2, $3, $4 + sleu $2, $2, $4 + sleu $2, $4 + sleu $2, $3, 0 + sleu $2, $3, -32768 + sleu $2, $3, 0 + sleu $2, $3, 32767 + sleu $2, $3, 65535 + sleu $2, $3, 65536 + sleu $2, $3, -32769 + + sll $2, $2, 1 + sll $2, $2, 2 + sll $2, $2, 3 + sll $2, $2, 4 + sll $2, $2, 5 + sll $2, $2, 6 + sll $2, $2, 7 + sll $2, $2, 8 + sll $2, $3, 8 + sll $2, $4, 8 + sll $2, $5, 8 + sll $2, $6, 8 + sll $2, $7, 8 + sll $2, $16, 8 + sll $2, $17, 8 + sll $3, $2, 8 + sll $4, $2, 8 + sll $5, $2, 8 + sll $6, $2, 8 + sll $7, $2, 8 + sll $16, $2, 8 + sll $17, $2, 8 + sll $2, $2, 1 + sll $3, 1 + + sllv $2, $3, $4 + sllv $2, $2, $4 + sll $2, $2, $4 + sll $2, $4 + sll32 $2, $4, 0 + sll32 $2, $4, 1 + sll32 $2, $4, 31 + sll32 $2, $2, 31 + sll32 $2, 31 + + slt $2, $3, $4 + slt $2, $2, $4 + slt $2, $4 + slt $2, $3, 0 + slt $2, $3, -32768 + slt $2, $3, 0 + slt $2, $3, 32767 + slt $2, $3, 65535 + slt $2, $3, 65536 + slt $2, $3, -32769 + + slti $3, $4, -32768 + slti $3, $4, 0 + slti $3, $4, 32767 + slti $3, $4, 65535 + slti $3, $3, 65535 + slti $3, 65535 + + sltiu $3, $4, -32768 + sltiu $3, $4, 0 + sltiu $3, $4, 32767 + sltiu $3, $4, 65535 + sltiu $3, $3, 65535 + sltiu $3, 65535 + + sltu $2, $3, $4 + sltu $2, $2, $4 + sltu $2, $4 + sltu $2, $3, 0 + sltu $2, $3, -32768 + sltu $2, $3, 0 + sltu $2, $3, 32767 + sltu $2, $3, 65535 + sltu $2, $3, 65536 + sltu $2, $3, -32769 + + sne $2, $3, $4 + sne $2, $0, $4 + sne $2, $3, $0 + + sne $2, $3, 0 + sne $2, $3, 1 + sne $2, $3, -1 + sne $2, $3, -32769 + + srav $2, $3, $4 + srav $2, $2, $4 + sra $2, $2, $4 + sra $2, $4 + sra $2, $4, 0 + sra $2, $4, 1 + sra $2, $4, 31 + sra $2, $2, 31 + sra $2, 31 + + srlv $2, $3, $4 + srlv $2, $2, $4 + srl $2, $2, $4 + srl $2, $4 + srl $2, $4, 0 + srl $2, $4, 1 + srl $2, $4, 31 + srl $2, $2, 31 + srl $2, 31 + + srl $2, $2, 1 + srl $2, $2, 2 + srl $2, $2, 3 + srl $2, $2, 4 + srl $2, $2, 5 + srl $2, $2, 6 + srl $2, $2, 7 + srl $2, $2, 8 + srl $2, $3, 8 + srl $2, $4, 8 + srl $2, $5, 8 + srl $2, $6, 8 + srl $2, $7, 8 + srl $2, $16, 8 + srl $2, $17, 8 + srl $2, $2, 8 + srl $3, $2, 8 + srl $4, $2, 8 + srl $5, $2, 8 + srl $6, $2, 8 + srl $7, $2, 8 + srl $16, $2, 8 + srl $17, $2, 8 + srl $3, $3, 1 + srl $3, 1 + + sub $2, $3, $4 + sub $29, $30, $31 + sub $2, $2, $4 + sub $2, $4 + sub $2, $2, 0 + sub $2, $2, 1 + sub $2, $2, 32767 + sub $2, $2, -32768 + sub $2, $2, 65535 + + subu $2, $3, $2 + subu $2, $3, $3 + subu $2, $3, $4 + subu $2, $3, $5 + subu $2, $3, $6 + subu $2, $3, $7 + subu $2, $3, $16 + subu $2, $3, $17 + subu $2, $2, $17 + subu $2, $4, $17 + subu $2, $5, $17 + subu $2, $6, $17 + subu $2, $7, $17 + subu $2, $16, $17 + subu $2, $17, $17 + subu $2, $2, $17 + subu $3, $2, $17 + subu $4, $2, $17 + subu $5, $2, $17 + subu $6, $2, $17 + subu $7, $2, $17 + subu $16, $2, $17 + subu $17, $2, $17 + subu $7, $7, $2 + subu $7, $2 + + subu32 $2, $3, $4 + subu32 $29, $30, $31 + subu32 $2, $2, $4 + subu32 $2, $4 + subu $2, $2, 0 + subu $2, $2, 1 + subu $2, $2, 32767 + subu $2, $2, -32768 + subu $2, $2, 65535 + + sw $2, ($4) + sw $2, 0($4) + sw $2, 1<<2($4) + sw $2, 2<<2($4) + sw $2, 3<<2($4) + sw $2, 4<<2($4) + sw $2, 5<<2($4) + sw $2, 6<<2($4) + sw $2, 7<<2($4) + sw $2, 8<<2($4) + sw $2, 9<<2($4) + sw $2, 10<<2($4) + sw $2, 11<<2($4) + sw $2, 12<<2($4) + sw $2, 13<<2($4) + sw $2, 14<<2($4) + sw $2, 15<<2($4) + sw $2, 15<<2($5) + sw $2, 15<<2($6) + sw $2, 15<<2($7) + sw $2, 15<<2($16) + sw $2, 15<<2($17) + sw $2, 15<<2($2) + sw $2, 15<<2($3) + sw $3, 15<<2($3) + sw $4, 15<<2($3) + sw $5, 15<<2($3) + sw $6, 15<<2($3) + sw $7, 15<<2($3) + sw $17, 15<<2($3) + sw $0, 15<<2($3) + + sw $0, ($29) + sw $0, 0($29) + sw $0, 1<<2($29) + sw $0, 2<<2($29) + sw $0, 3<<2($29) + sw $0, 4<<2($29) + sw $0, 5<<2($29) + sw $0, 30<<2($29) + sw $0, 31<<2($29) + sw $2, 31<<2($29) + sw $17, 31<<2($29) + sw $3, 31<<2($29) + sw $4, 31<<2($29) + sw $5, 31<<2($29) + sw $6, 31<<2($29) + sw $7, 31<<2($29) + sw $31, 31<<2($29) + + sw32 $3, 4 + sw32 $3, 4($0) + sw32 $3, 32767($0) + sw32 $3, -32768($0) + sw $3, 65535($0) + sw $3, 0xffff0000($0) + sw $3, 0xffff8000($0) + sw $3, 0xffff0001($0) + sw $3, 0xffff8001($0) + sw $3, 0xf0000000($0) + sw $3, 0xffffffff($0) + sw $3, 0x12345678($0) + sw32 $3, ($4) + sw32 $3, 0($4) + sw32 $3, 32767($4) + sw32 $3, -32768($4) + sw $3, 65535($4) + sw $3, 0xffff0000($4) + sw $3, 0xffff8000($4) + sw $3, 0xffff0001($4) + sw $3, 0xffff8001($4) + sw $3, 0xf0000000($4) + sw $3, 0xffffffff($4) + sw $3, 0x12345678($4) + + swl $3, 4 + swl $3, 4($0) + swl $3, 2047($0) + swl $3, -2048($0) + swl $3, 32767($0) + swl $3, -32768($0) + swl $3, 65535($0) + swl $3, 0xffff0000($0) + swl $3, 0xffff8000($0) + swl $3, 0xffff0001($0) + swl $3, 0xffff8001($0) + swl $3, 0xf0000000($0) + swl $3, 0xffffffff($0) + swl $3, 0x12345678($0) + swl $3, ($4) + swl $3, 0($4) + swl $3, 2047($4) + swl $3, -2048($4) + swl $3, 32767($4) + swl $3, -32768($4) + swl $3, 65535($4) + swl $3, 0xffff0000($4) + swl $3, 0xffff8000($4) + swl $3, 0xffff0001($4) + swl $3, 0xffff8001($4) + swl $3, 0xf0000000($4) + swl $3, 0xffffffff($4) + swl $3, 0x12345678($4) + + swr $3, 4 + swr $3, 4($0) + swr $3, 2047($0) + swr $3, -2048($0) + swr $3, 32767($0) + swr $3, -32768($0) + swr $3, 65535($0) + swr $3, 0xffff0000($0) + swr $3, 0xffff8000($0) + swr $3, 0xffff0001($0) + swr $3, 0xffff8001($0) + swr $3, 0xf0000000($0) + swr $3, 0xffffffff($0) + swr $3, 0x12345678($0) + swr $3, ($4) + swr $3, 0($4) + swr $3, 2047($4) + swr $3, -2048($4) + swr $3, 32767($4) + swr $3, -32768($4) + swr $3, 65535($4) + swr $3, 0xffff0000($4) + swr $3, 0xffff8000($4) + swr $3, 0xffff0001($4) + swr $3, 0xffff8001($4) + swr $3, 0xf0000000($4) + swr $3, 0xffffffff($4) + swr $3, 0x12345678($4) + + scache $3, 4 + scache $3, 4($0) + scache $3, 2047($0) + scache $3, -2048($0) + scache $3, 32767($0) + scache $3, -32768($0) + scache $3, 65535($0) + scache $3, 0xffff0000($0) + scache $3, 0xffff8000($0) + scache $3, 0xffff0001($0) + scache $3, 0xffff8001($0) + scache $3, 0xf0000000($0) + scache $3, 0xffffffff($0) + scache $3, 0x12345678($0) + scache $3, ($4) + scache $3, 0($4) + scache $3, 2047($4) + scache $3, -2048($4) + scache $3, 32767($4) + scache $3, -32768($4) + scache $3, 65535($4) + scache $3, 0xffff0000($4) + scache $3, 0xffff8000($4) + scache $3, 0xffff0001($4) + scache $3, 0xffff8001($4) + scache $3, 0xf0000000($4) + scache $3, 0xffffffff($4) + scache $3, 0x12345678($4) + + invalidate $3, 4 + invalidate $3, 4($0) + invalidate $3, 2047($0) + invalidate $3, -2048($0) + invalidate $3, 32767($0) + invalidate $3, -32768($0) + invalidate $3, 65535($0) + invalidate $3, 0xffff0000($0) + invalidate $3, 0xffff8000($0) + invalidate $3, 0xffff0001($0) + invalidate $3, 0xffff8001($0) + invalidate $3, 0xf0000000($0) + invalidate $3, 0xffffffff($0) + invalidate $3, 0x12345678($0) + invalidate $3, ($4) + invalidate $3, 0($4) + invalidate $3, 2047($4) + invalidate $3, -2048($4) + invalidate $3, 32767($4) + invalidate $3, -32768($4) + invalidate $3, 65535($4) + invalidate $3, 0xffff0000($4) + invalidate $3, 0xffff8000($4) + invalidate $3, 0xffff0001($4) + invalidate $3, 0xffff8001($4) + invalidate $3, 0xf0000000($4) + invalidate $3, 0xffffffff($4) + invalidate $3, 0x12345678($4) + + swm $s0, $ra, 12<<2($29) + swm $s0, $s1, $ra, 12<<2($29) + swm $s0-$s1, $ra, 12<<2($29) + swm $s0, $s1, $s2, $ra, 12<<2($29) + swm $s0-$s2, $ra, 12<<2($29) + swm $s0, $s1, $s2, $s3, $ra, 12<<2($29) + swm $s0-$s3, $ra, 12<<2($29) + swm $s0, $ra, ($29) + swm $s0, $ra, 0($29) + swm $s0, $ra, 1<<2($29) + swm $s0, $ra, 2<<2($29) + swm $s0, $ra, 3<<2($29) + swm $s0, $ra, 4<<2($29) + swm $s0, $ra, 5<<2($29) + swm $s0, $ra, 6<<2($29) + swm $s0, $ra, 7<<2($29) + swm $s0, $ra, 8<<2($29) + swm $s0, $ra, 9<<2($29) + swm $s0, $ra, 10<<2($29) + swm $s0, $ra, 11<<2($29) + swm $s0, $ra, 12<<2($29) + swm $s0, $ra, 13<<2($29) + swm $s0, $ra, 14<<2($29) + swm $s0, $ra, 15<<2($29) + + swm $s0, 0 + swm $s0, 4 + swm $s0, 2047 + swm $s0, -2048 + swm $s0, 2048 + swm $s0, -2049 + swm $s0, ($5) + swm $s0, 2047($5) + swm $s0, -2048($5) + swm $s0, 2048($5) + swm $s0, -2049($5) + swm $s0-$s1, 2047($5) + swm $s0-$s2, 2047($5) + swm $s0-$s3, 2047($5) + swm $s0-$s4, 2047($5) + swm $s0-$s5, 2047($5) + swm $s0-$s6, 2047($5) + swm $s0-$s7, 2047($5) + swm $s0-$s8, 2047($5) + swm $ra, 2047($5) + swm $s0,$ra, ($5) + swm $s0-$s1,$ra, ($5) + swm $s0-$s2,$ra, ($5) + swm $s0-$s3,$ra, ($5) + swm $s0-$s4,$ra, ($5) + swm $s0-$s5,$ra, ($5) + swm $s0-$s6,$ra, ($5) + swm $s0-$s7,$ra, ($5) + swm $s0-$s8,$ra, ($5) + swm $s0, -32768($29) + swm $s0, 32767($29) + swm $s0, 0($29) + swm $s0, 65535($29) + + swp $2, 0 + swp $2, 4 + swp $2, 2047 + swp $2, -2048 + swp $2, 2048 + swp $2, -2049 + swp $2, ($29) + swp $2, 0($29) + swp $2, 2047($3) + swp $2, -2048($3) + swp $2, 2048($3) + swp $2, -2049($3) + swp $2, 32767($3) + swp $2, -32768($3) + swp $2, 0($3) + swp $2, 65535($3) + + sync + sync 0 + sync 1 + sync 2 + sync 3 + sync 4 + sync 30 + sync 31 + + synci 0 + synci ($0) + synci 0($0) + synci 2047($0) + synci -2048($0) + synci 2048($0) + synci -2049($0) + synci 32767($0) + synci -32768($0) + synci 0($2) + synci 0($3) + synci 2047($3) + synci -2048($3) + synci 2048($3) + synci -2049($3) + synci 32767($3) + synci -32768($3) + + syscall + syscall 0 + syscall 1 + syscall 2 + syscall 255 + + teqi $2, 0 + teqi $2, -32768 + teqi $2, 32767 + teqi $2, 65535 + teq $2, $3 + teq $3, $2 + teq $2, $3, 0 + teq $2, $3, 1 + teq $2, $3, 15 + teq $2, 0 + teq $2, -32768 + teq $2, 32767 + teq $2, 65535 + + tgei $2, 0 + tgei $2, -32768 + tgei $2, 32767 + tgei $2, 65535 + tge $2, $3 + tge $3, $2 + tge $2, $3, 0 + tge $2, $3, 1 + tge $2, $3, 15 + tge $2, 0 + tge $2, -32768 + tge $2, 32767 + tge $2, 65535 + + tgeiu $2, 0 + tgeiu $2, -32768 + tgeiu $2, 32767 + tgeiu $2, 65535 + tgeu $2, $3 + tgeu $3, $2 + tgeu $2, $3, 0 + tgeu $2, $3, 1 + tgeu $2, $3, 15 + tgeu $2, 0 + tgeu $2, -32768 + tgeu $2, 32767 + tgeu $2, 65535 + + tlbp + tlbr + tlbwi + tlbwr + + tlti $2, 0 + tlti $2, -32768 + tlti $2, 32767 + tlti $2, 65535 + tlt $2, $3 + tlt $3, $2 + tlt $2, $3, 0 + tlt $2, $3, 1 + tlt $2, $3, 15 + tlt $2, 0 + tlt $2, -32768 + tlt $2, 32767 + tlt $2, 65535 + + tltiu $2, 0 + tltiu $2, -32768 + tltiu $2, 32767 + tltiu $2, 65535 + tltu $2, $3 + tltu $3, $2 + tltu $2, $3, 0 + tltu $2, $3, 1 + tltu $2, $3, 15 + tltu $2, 0 + tltu $2, -32768 + tltu $2, 32767 + tltu $2, 65535 + tltu $2, 65536 + tltu $2, 0xffffffff + + tnei $2, 0 + tnei $2, -32768 + tnei $2, 32767 + tnei $2, 65535 + tne $2, $3 + tne $3, $2 + tne $2, $3, 0 + tne $2, $3, 1 + tne $2, $3, 15 + tne $2, 0 + tne $2, -32768 + tne $2, 32767 + tne $2, 65535 + tne $2, 65536 + tne $2, 0xffffffff + + ulh $3, 4 + ulh $3, 4($0) + ulh $3, ($4) + ulh $3, 0($4) + ulh $3, 32763($4) + ulh $3, -32768($4) + ulh $3, 65535($4) + ulh $3, 0xffff0000($4) + ulh $3, 0xffff8000($4) + ulh $3, 0xffff0001($4) + ulh $3, 0xffff8001($4) + ulh $3, 0xf0000000($4) + ulh $3, 0xffffffff($4) + + ulhu $3, 4 + ulhu $3, 4($0) + ulhu $3, ($4) + ulhu $3, 0($4) + ulhu $3, 32763($4) + ulhu $3, -32768($4) + ulhu $3, 65535($4) + ulhu $3, 0xffff0000($4) + ulhu $3, 0xffff8000($4) + ulhu $3, 0xffff0001($4) + ulhu $3, 0xffff8001($4) + ulhu $3, 0xf0000000($4) + ulhu $3, 0xffffffff($4) + + ulw $3, 0 + ulw $3, ($0) + ulw $3, 4 + ulw $3, 4($0) + ulw $3, 2047 + ulw $3, -2048 + ulw $3, 2048 + ulw $3, -2049 + ulw $3, 32763($0) + ulw $3, -32768($0) + ulw $3, 65535($0) + ulw $3, 0xffff0000($0) + ulw $3, 0xffff8000($0) + ulw $3, 0xffff0001($0) + ulw $3, 0xffff8001($0) + ulw $3, 0xf0000000($0) + ulw $3, 0xffffffff($0) + ulw $3, 0x12345678($0) + ulw $3, 0($4) + ulw $3, 4($4) + ulw $3, 2047($4) + ulw $3, -2048($4) + ulw $3, 2048($4) + ulw $3, -2049($4) + ulw $3, 32763($4) + ulw $3, -32768($4) + ulw $3, 65535($4) + ulw $3, 0xffff0000($4) + ulw $3, 0xffff8000($4) + ulw $3, 0xffff0001($4) + ulw $3, 0xffff8001($4) + ulw $3, 0xf0000000($4) + ulw $3, 0xffffffff($4) + ulw $3, 0x12345678($4) + + ush $3, 4 + ush $3, 4($0) + ush $3, ($4) + ush $3, 0($4) + ush $3, 32763($4) + ush $3, -32768($4) + ush $3, 65535($4) + ush $3, 0xffff0000($4) + ush $3, 0xffff8000($4) + ush $3, 0xffff0001($4) + ush $3, 0xffff8001($4) + ush $3, 0xf0000000($4) + ush $3, 0xffffffff($4) + + usw $3, 0 + usw $3, ($0) + usw $3, 4 + usw $3, 4($0) + usw $3, 2047 + usw $3, -2048 + usw $3, 2048 + usw $3, -2049 + usw $3, 32763($0) + usw $3, -32768($0) + usw $3, 65535($0) + usw $3, 0xffff0000($0) + usw $3, 0xffff8000($0) + usw $3, 0xffff0001($0) + usw $3, 0xffff8001($0) + usw $3, 0xf0000000($0) + usw $3, 0xffffffff($0) + usw $3, 0x12345678($0) + usw $3, 0($4) + usw $3, 4($4) + usw $3, 2047($4) + usw $3, -2048($4) + usw $3, 2048($4) + usw $3, -2049($4) + usw $3, 32763($4) + usw $3, -32768($4) + usw $3, 65535($4) + usw $3, 0xffff0000($4) + usw $3, 0xffff8000($4) + usw $3, 0xffff0001($4) + usw $3, 0xffff8001($4) + usw $3, 0xf0000000($4) + usw $3, 0xffffffff($4) + usw $3, 0x12345678($4) + + wait + wait 0 + wait 1 + wait 255 + + wrpgpr $2, $3 + wrpgpr $2, $4 + wrpgpr $2, $2 + wrpgpr $2 + + wsbh $2, $3 + wsbh $2, $4 + wsbh $2, $2 + wsbh $2 + + xor $2, $2 + xor $2, $3 + xor $2, $4 + xor $2, $5 + xor $2, $6 + xor $2, $7 + xor $2, $16 + xor $2, $17 + xor $3, $17 + xor $4, $17 + xor $5, $17 + xor $6, $17 + xor $7, $17 + xor $16, $17 + xor $17, $17 + xor $2, $3 + xor $2, $2, $3 + xor $2, $3, $2 + + xor32 $2, $3, $4 + xor32 $29, $30, $31 + xor32 $2, $2, $4 + xor32 $2, $4 + + xor $2, $3, 32768 + xor $2, $3, 65535 + xor $2, $3, 65536 + xor $2, $3, -32768 + xor $2, $3, -32769 + + xori $3, $4, 0 + xori $3, $4, 32767 + xori $3, $4, 65535 + xori $3, $3, 65535 + xori $3, 65535 + + .set noreorder + + beqz $9, test + addu $3, $4, $5 + + beq $9, $10, test + addu $3, $4, $5 + + beq $9, 0, test + addu $3, $4, $5 + + beq $9, 1, test + addu $3, $4, $5 + + bge $10, $0, test + addu $3, $4, $5 + + bge $10, $0, test + addu $3, $4, $5 + + bge $0, $10, test + addu $3, $4, $5 + + bge $10, $11, test + addu $3, $4, $5 + + bge $10, 0, test + addu $3, $4, $5 + + bge $10, 1, test + addu $3, $4, $5 + + bge $10, 2, test + addu $3, $4, $5 + + bge $10, 0x80000000, test + addu $3, $4, $5 + + bgeu $2, $0, test + addu $3, $4, $5 + + bgeu $0, $2, test + addu $3, $4, $5 + + bgeu $2, $3, test + addu $3, $4, $5 + + bgeu $2, 0, test + addu $3, $4, $5 + + bgeu $2, 1, test + addu $3, $4, $5 + + bgeu $2, 2, test + addu $3, $4, $5 + + bgez $2, test + addu $3, $4, $5 + + bgezal $2, test + addu $3, $4, $5 + + bgt $2, $0, test + addu $3, $4, $5 + + bgt $0, $2, test + addu $3, $4, $5 + + bgt $9, $10, test + addu $3, $4, $5 + + bgt $9, 0x7fffffff, test + addu $3, $4, $5 + + bgt $9, -1, test + addu $3, $4, $5 + + bgt $9, 0, test + addu $3, $4, $5 + + bgt $9, 1, test + addu $3, $4, $5 + + bgt $9, 0x80000000, test + addu $3, $4, $5 + + bgtu $9, $0, test + addu $3, $4, $5 + + bgtu $0, $9, test + addu $3, $4, $5 + + bgtu $9, $10, test + addu $3, $4, $5 + + bgtu $0, 0, test + addu $3, $4, $5 + + bgtu $9, 0xffffffff, test + addu $3, $4, $5 + + bgtu $9, -1, test + addu $3, $4, $5 + + bgtu $9, 0, test + addu $3, $4, $5 + + bgtu $9, 1, test + addu $3, $4, $5 + + bgtz $9, test + addu $3, $4, $5 + + ble $9, $0, test + addu $3, $4, $5 + + ble $0, $10, test + addu $3, $4, $5 + + ble $9, $10, test + addu $3, $4, $5 + + ble $9, 0x7fffffff, test + addu $3, $4, $5 + + ble $9, -1, test + addu $3, $4, $5 + + ble $9, 0, test + addu $3, $4, $5 + + ble $9, 1, test + addu $3, $4, $5 + + bleu $9, $0, test + addu $3, $4, $5 + + bleu $0, $10, test + addu $3, $4, $5 + + bleu $9, $10, test + addu $3, $4, $5 + + bleu $0, $10, test + addu $3, $4, $5 + + bleu $9, 0xffffffff, test + addu $3, $4, $5 + + bleu $9, 0, test + addu $3, $4, $5 + + bleu $9, 1, test + addu $3, $4, $5 + + blez $9, test + addu $3, $4, $5 + + blt $9, $0, test + addu $3, $4, $5 + + blt $0, $10, test + addu $3, $4, $5 + + blt $9, $10, test + addu $3, $4, $5 + + blt $9, 0, test + addu $3, $4, $5 + + blt $9, 1, test + addu $3, $4, $5 + + blt $9, 2, test + addu $3, $4, $5 + + bltu $9, $0, test + addu $3, $4, $5 + + bltu $0, $10, test + addu $3, $4, $5 + + bltu $9, $10, test + addu $3, $4, $5 + + bltu $9, 0, test + addu $3, $4, $5 + + bltu $9, 1, test + addu $3, $4, $5 + + bltu $9, 2, test + addu $3, $4, $5 + + bltz $9, test + addu $3, $4, $5 + + bltzal $9, test + addu $3, $4, $5 + + bnez $9, test + addu $3, $4, $5 + + bne $9, $10, test + addu $3, $4, $5 + + bne $9, 0, test + addu $3, $4, $5 + + bne $9, 1, test + addu $3, $4, $5 + + beqzl $9, test + addu $3, $4, $5 + + beql $9, $10, test + addu $3, $4, $5 + + beql $9, 0, test + addu $3, $4, $5 + + beql $9, 1, test + addu $3, $4, $5 + + bgel $10, $0, test + addu $3, $4, $5 + + bgel $10, $0, test + addu $3, $4, $5 + + bgel $0, $10, test + addu $3, $4, $5 + + bgel $10, $11, test + addu $3, $4, $5 + + bgel $10, 0, test + addu $3, $4, $5 + + bgel $10, 1, test + addu $3, $4, $5 + + bgel $10, 2, test + addu $3, $4, $5 + + bgel $10, 0x80000000, test + addu $3, $4, $5 + + bgeul $2, $0, test + addu $3, $4, $5 + + bgeul $0, $2, test + addu $3, $4, $5 + + bgeul $2, $3, test + addu $3, $4, $5 + + bgeul $2, 0, test + addu $3, $4, $5 + + bgeul $2, 1, test + addu $3, $4, $5 + + bgeul $2, 2, test + addu $3, $4, $5 + + bgezl $2, test + addu $3, $4, $5 + + bgezall $2, test + addu $3, $4, $5 + + bgtl $2, $0, test + addu $3, $4, $5 + + bgtl $0, $2, test + addu $3, $4, $5 + + bgtl $9, $10, test + addu $3, $4, $5 + + bgtl $9, 0x7fffffff, test + addu $3, $4, $5 + + bgtl $9, -1, test + addu $3, $4, $5 + + bgtl $9, 0, test + addu $3, $4, $5 + + bgtl $9, 1, test + addu $3, $4, $5 + + bgtl $9, 0x80000000, test + addu $3, $4, $5 + + bgtul $9, $0, test + addu $3, $4, $5 + + bgtul $0, $9, test + addu $3, $4, $5 + + bgtul $9, $10, test + addu $3, $4, $5 + + bgtul $0, 0, test + addu $3, $4, $5 + + bgtul $9, 0xffffffff, test + addu $3, $4, $5 + + bgtul $9, -1, test + addu $3, $4, $5 + + bgtul $9, 0, test + addu $3, $4, $5 + + bgtul $9, 1, test + addu $3, $4, $5 + + bgtzl $9, test + addu $3, $4, $5 + + blel $9, $0, test + addu $3, $4, $5 + + blel $0, $10, test + addu $3, $4, $5 + + blel $9, $10, test + addu $3, $4, $5 + + blel $9, 0x7fffffff, test + addu $3, $4, $5 + + blel $9, -1, test + addu $3, $4, $5 + + blel $9, 0, test + addu $3, $4, $5 + + blel $9, 1, test + addu $3, $4, $5 + + bleul $9, $0, test + addu $3, $4, $5 + + bleul $0, $10, test + addu $3, $4, $5 + + bleul $9, $10, test + addu $3, $4, $5 + + bleul $0, $10, test + addu $3, $4, $5 + + bleul $9, 0xffffffff, test + addu $3, $4, $5 + + bleul $9, 0, test + addu $3, $4, $5 + + bleul $9, 1, test + addu $3, $4, $5 + + blezl $9, test + addu $3, $4, $5 + + bltl $9, $0, test + addu $3, $4, $5 + + bltl $0, $10, test + addu $3, $4, $5 + + bltl $9, $10, test + addu $3, $4, $5 + + bltl $9, 0, test + addu $3, $4, $5 + + bltl $9, 1, test + addu $3, $4, $5 + + bltl $9, 2, test + addu $3, $4, $5 + + bltul $9, $0, test + addu $3, $4, $5 + + bltul $0, $10, test + addu $3, $4, $5 + + bltul $9, $10, test + addu $3, $4, $5 + + bltul $9, 0, test + addu $3, $4, $5 + + bltul $9, 1, test + addu $3, $4, $5 + + bltul $9, 2, test + addu $3, $4, $5 + + bltzl $9, test + addu $3, $4, $5 + + bltzall $9, test + addu $3, $4, $5 + + bnezl $9, test + addu $3, $4, $5 + + bnel $9, $10, test + addu $3, $4, $5 + + bnel $9, 0, test + addu $3, $4, $5 + + bnel $9, 1, test + addu $3, $4, $5 + + addiur1sp $2, 0 + addiur1sp $2, 1<<2 + addiur1sp $2, 2<<2 + addiur1sp $2, 3<<2 + addiur1sp $2, 4<<2 + addiur1sp $2, 63<<2 + addiur1sp $3, 63<<2 + addiur1sp $4, 63<<2 + addiur1sp $5, 63<<2 + addiur1sp $6, 63<<2 + addiur1sp $7, 63<<2 + addiur1sp $16, 63<<2 + addiur1sp $17, 63<<2 + + addiur2 $2, $2, -1 + addiur2 $2, $3, -1 + addiur2 $2, $4, -1 + addiur2 $2, $5, -1 + addiur2 $2, $6, -1 + addiur2 $2, $7, -1 + addiur2 $2, $16, -1 + addiur2 $2, $17, -1 + addiur2 $3, $17, -1 + addiur2 $4, $17, -1 + addiur2 $5, $17, -1 + addiur2 $6, $17, -1 + addiur2 $7, $17, -1 + addiur2 $16, $17, -1 + addiur2 $17, $17, -1 + addiur2 $17, $17, 1 + addiur2 $17, $17, 4 + addiur2 $17, $17, 8 + addiur2 $17, $17, 12 + addiur2 $17, $17, 16 + addiur2 $17, $17, 20 + addiur2 $17, $17, 24 + + addiusp 2 << 2 + addiusp 3 << 2 + addiusp 254 << 2 + addiusp 255 << 2 + addiusp 256 << 2 + addiusp 257 << 2 + addiusp -3 << 2 + addiusp -4 << 2 + addiusp -255 << 2 + addiusp -256 << 2 + addiusp -257 << 2 + addiusp -258 << 2 + + addius5 $0, 0 + addius5 $2, 0 + addius5 $3, 0 + addius5 $30, 0 + addius5 $31, 0 + addius5 $31, 1 + addius5 $31, 2 + addius5 $31, 3 + addius5 $31, 7 + addius5 $31, -6 + addius5 $31, -7 + addius5 $31, -8 + + sd $3, 4 + sd $3, 4($0) + sd $3, 32767($0) + sd $3, -32768($0) + sd $3, 65535($0) + sd $3, 0xffff0000($0) + sd $3, 0xffff8000($0) + sd $3, 0xffff0001($0) + sd $3, 0xffff8001($0) + sd $3, 0xf0000000($0) + sd $3, 0xffffffff($0) + sd $3, 0x12345678($0) + sd $3, ($4) + sd $3, 0($4) + sd $3, 32767($4) + sd $3, -32768($4) + sd $3, 65535($4) + sd $3, 0xffff0000($4) + sd $3, 0xffff8000($4) + sd $3, 0xffff0001($4) + sd $3, 0xffff8001($4) + sd $3, 0xf0000000($4) + sd $3, 0xffffffff($4) + sd $3, 0x12345678($4) + + ld $3, 4 + ld $3, 4($0) + ld $3, 32767($0) + ld $3, -32768($0) + ld $3, 65535($0) + ld $3, 0xffff0000($0) + ld $3, 0xffff8000($0) + ld $3, 0xffff0001($0) + ld $3, 0xffff8001($0) + ld $3, 0xf0000000($0) + ld $3, 0xffffffff($0) + ld $3, 0x12345678($0) + ld $3, ($4) + ld $3, 0($4) + ld $3, 32767($4) + ld $3, -32768($4) + ld $3, 65535($4) + ld $3, 0xffff0000($4) + ld $3, 0xffff8000($4) + ld $3, 0xffff0001($4) + ld $3, 0xffff8001($4) + ld $3, 0xf0000000($4) + ld $3, 0xffffffff($4) + ld $3, 0x12345678($4) + + jraddiusp 0 << 2 + jraddiusp 1 << 2 + jraddiusp 2 << 2 + jraddiusp 3 << 2 + jraddiusp 4 << 2 + jraddiusp 5 << 2 + jraddiusp 6 << 2 + jraddiusp 7 << 2 + jraddiusp 8 << 2 + jraddiusp 9 << 2 + jraddiusp 10 << 2 + jraddiusp 30 << 2 + jraddiusp 31 << 2 + + ldc2 $3, 0 + ldc2 $3, ($0) + ldc2 $3, 4 + ldc2 $3, 4($0) + ldc2 $3, ($4) + ldc2 $3, 0($4) + ldc2 $3, 32767($4) + ldc2 $3, -32768($4) + ldc2 $3, 65535($4) + ldc2 $3, 0xffff0000($4) + ldc2 $3, 0xffff8000($4) + ldc2 $3, 0xffff0001($4) + ldc2 $3, 0xffff8001($4) + ldc2 $3, 0xf0000000($4) + ldc2 $3, 0xffffffff($4) + ldc2 $3, 0x12345678($4) + + lwc2 $3, 0 + lwc2 $3, ($0) + lwc2 $3, 4 + lwc2 $3, 4($0) + lwc2 $3, ($4) + lwc2 $3, 0($4) + lwc2 $3, 32767($4) + lwc2 $3, -32768($4) + lwc2 $3, 65535($4) + lwc2 $3, 0xffff0000($4) + lwc2 $3, 0xffff8000($4) + lwc2 $3, 0xffff0001($4) + lwc2 $3, 0xffff8001($4) + lwc2 $3, 0xf0000000($4) + lwc2 $3, 0xffffffff($4) + lwc2 $3, 0x12345678($4) + + mfc2 $5, $0 + mfc2 $5, $1 + mfc2 $5, $2 + mfc2 $5, $3 + mfc2 $5, $4 + mfc2 $5, $5 + mfc2 $5, $6 + mfc2 $5, $7 + mfc2 $5, $8 + mfc2 $5, $9 + mfc2 $5, $10 + mfc2 $5, $11 + mfc2 $5, $12 + mfc2 $5, $13 + mfc2 $5, $14 + mfc2 $5, $15 + mfc2 $5, $16 + mfc2 $5, $17 + mfc2 $5, $18 + mfc2 $5, $19 + mfc2 $5, $20 + mfc2 $5, $21 + mfc2 $5, $22 + mfc2 $5, $23 + mfc2 $5, $24 + mfc2 $5, $25 + mfc2 $5, $26 + mfc2 $5, $27 + mfc2 $5, $28 + mfc2 $5, $29 + mfc2 $5, $30 + mfc2 $5, $31 + + mfhc2 $5, $0 + mfhc2 $5, $1 + mfhc2 $5, $2 + mfhc2 $5, $3 + mfhc2 $5, $4 + mfhc2 $5, $5 + mfhc2 $5, $6 + mfhc2 $5, $7 + mfhc2 $5, $8 + mfhc2 $5, $9 + mfhc2 $5, $10 + mfhc2 $5, $11 + mfhc2 $5, $12 + mfhc2 $5, $13 + mfhc2 $5, $14 + mfhc2 $5, $15 + mfhc2 $5, $16 + mfhc2 $5, $17 + mfhc2 $5, $18 + mfhc2 $5, $19 + mfhc2 $5, $20 + mfhc2 $5, $21 + mfhc2 $5, $22 + mfhc2 $5, $23 + mfhc2 $5, $24 + mfhc2 $5, $25 + mfhc2 $5, $26 + mfhc2 $5, $27 + mfhc2 $5, $28 + mfhc2 $5, $29 + mfhc2 $5, $30 + mfhc2 $5, $31 + + mtc2 $5, $0 + mtc2 $5, $1 + mtc2 $5, $2 + mtc2 $5, $3 + mtc2 $5, $4 + mtc2 $5, $5 + mtc2 $5, $6 + mtc2 $5, $7 + mtc2 $5, $8 + mtc2 $5, $9 + mtc2 $5, $10 + mtc2 $5, $11 + mtc2 $5, $12 + mtc2 $5, $13 + mtc2 $5, $14 + mtc2 $5, $15 + mtc2 $5, $16 + mtc2 $5, $17 + mtc2 $5, $18 + mtc2 $5, $19 + mtc2 $5, $20 + mtc2 $5, $21 + mtc2 $5, $22 + mtc2 $5, $23 + mtc2 $5, $24 + mtc2 $5, $25 + mtc2 $5, $26 + mtc2 $5, $27 + mtc2 $5, $28 + mtc2 $5, $29 + mtc2 $5, $30 + mtc2 $5, $31 + + mthc2 $5, $0 + mthc2 $5, $1 + mthc2 $5, $2 + mthc2 $5, $3 + mthc2 $5, $4 + mthc2 $5, $5 + mthc2 $5, $6 + mthc2 $5, $7 + mthc2 $5, $8 + mthc2 $5, $9 + mthc2 $5, $10 + mthc2 $5, $11 + mthc2 $5, $12 + mthc2 $5, $13 + mthc2 $5, $14 + mthc2 $5, $15 + mthc2 $5, $16 + mthc2 $5, $17 + mthc2 $5, $18 + mthc2 $5, $19 + mthc2 $5, $20 + mthc2 $5, $21 + mthc2 $5, $22 + mthc2 $5, $23 + mthc2 $5, $24 + mthc2 $5, $25 + mthc2 $5, $26 + mthc2 $5, $27 + mthc2 $5, $28 + mthc2 $5, $29 + mthc2 $5, $30 + mthc2 $5, $31 + + sdc2 $3, 0 + sdc2 $3, ($0) + sdc2 $3, 4 + sdc2 $3, 4($0) + sdc2 $3, ($4) + sdc2 $3, 0($4) + sdc2 $3, 32767($4) + sdc2 $3, -32768($4) + sdc2 $3, 65535($4) + sdc2 $3, 0xffff0000($4) + sdc2 $3, 0xffff8000($4) + sdc2 $3, 0xffff0001($4) + sdc2 $3, 0xffff8001($4) + sdc2 $3, 0xf0000000($4) + sdc2 $3, 0xffffffff($4) + sdc2 $3, 0x12345678($4) + + swc2 $3, 0 + swc2 $3, ($0) + swc2 $3, 4 + swc2 $3, 4($0) + swc2 $3, ($4) + swc2 $3, 0($4) + swc2 $3, 32767($4) + swc2 $3, -32768($4) + swc2 $3, 65535($4) + swc2 $3, 0xffff0000($4) + swc2 $3, 0xffff8000($4) + swc2 $3, 0xffff0001($4) + swc2 $3, 0xffff8001($4) + swc2 $3, 0xf0000000($4) + swc2 $3, 0xffffffff($4) + swc2 $3, 0x12345678($4) + + cache 0, %lo(test)($3) + lwp $2, %lo(test)($3) + swp $2, %lo(test)($3) + ll $2, %lo(test)($3) + sc $2, %lo(test)($3) + lwl $2, %lo(test)($3) + lwr $2, %lo(test)($3) + swl $2, %lo(test)($3) + swr $2, %lo(test)($3) + lwm $16, %lo(test)($3) + swm $16, %lo(test)($3) + lwc2 $16, %lo(test)($3) + swc2 $16, %lo(test)($3) + lcache $2, %lo(test)($3) + flush $2, %lo(test)($3) + scache $2, %lo(test)($3) + invalidate $2, %lo(test)($3) + + sdbbp 1023 + wait 1023 + syscall 1023 + cop2 0x7fffff + + .end test + .set reorder + + .align 3 + .set micromips + .ent fp_test + .globl fp_test +fp_test: + prefx 0, $0($0) + prefx 0, $0($2) + prefx 0, $0($31) + prefx 0, $2($31) + prefx 0, $31($31) + prefx 1, $31($31) + prefx 2, $31($31) + prefx 31, $31($31) + + abs.s $f0, $f1 + abs.s $f30, $f31 + abs.s $f2, $f2 + abs.s $f2 + abs.d $f0, $f1 + abs.d $f30, $f31 + abs.d $f2, $f2 + abs.d $f2 + abs.ps $f0, $f1 + abs.ps $f30, $f31 + abs.ps $f2, $f2 + abs.ps $f2 + + add.s $f0, $f1, $f2 + add.s $f29, $f30, $f31 + add.s $f29, $f29, $f30 + add.s $f29, $f30 + add.d $f0, $f1, $f2 + add.d $f29, $f30, $f31 + add.d $f29, $f29, $f30 + add.d $f29, $f30 + add.ps $f0, $f1, $f2 + add.ps $f29, $f30, $f31 + add.ps $f29, $f29, $f30 + add.ps $f29, $f30 + + alnv.ps $f0, $f1, $f2, $0 + alnv.ps $f0, $f1, $f2, $2 + alnv.ps $f0, $f1, $f2, $31 + alnv.ps $f29, $f30, $f31, $31 + alnv.ps $f29, $f29, $f31, $31 + + bc1f fp_test + bc1f $fcc0, fp_test + bc1f $fcc1, fp_test + bc1f $fcc2, fp_test + bc1f $fcc3, fp_test + bc1f $fcc4, fp_test + bc1f $fcc5, fp_test + bc1f $fcc6, fp_test + bc1f $fcc7, fp_test + + bc1t fp_test + bc1t $fcc0, fp_test + bc1t $fcc1, fp_test + bc1t $fcc2, fp_test + bc1t $fcc3, fp_test + bc1t $fcc4, fp_test + bc1t $fcc5, fp_test + bc1t $fcc6, fp_test + bc1t $fcc7, fp_test + + c.f.d $f0, $f1 + c.f.d $f30, $f31 + c.f.d $fcc0, $f30, $f31 + c.f.d $fcc1, $f30, $f31 + c.f.d $fcc7, $f30, $f31 + c.f.s $f0, $f1 + c.f.s $f30, $f31 + c.f.s $fcc0, $f30, $f31 + c.f.s $fcc1, $f30, $f31 + c.f.s $fcc7, $f30, $f31 + c.f.ps $f0, $f1 + c.f.ps $f30, $f31 + c.f.ps $fcc0, $f30, $f31 + c.f.ps $fcc2, $f30, $f31 + c.f.ps $fcc6, $f30, $f31 + + c.un.d $f0, $f1 + c.un.d $f30, $f31 + c.un.d $fcc0, $f30, $f31 + c.un.d $fcc1, $f30, $f31 + c.un.d $fcc7, $f30, $f31 + c.un.s $f0, $f1 + c.un.s $f30, $f31 + c.un.s $fcc0, $f30, $f31 + c.un.s $fcc1, $f30, $f31 + c.un.s $fcc7, $f30, $f31 + c.un.ps $f0, $f1 + c.un.ps $f30, $f31 + c.un.ps $fcc0, $f30, $f31 + c.un.ps $fcc2, $f30, $f31 + c.un.ps $fcc6, $f30, $f31 + + c.eq.d $f0, $f1 + c.eq.d $f30, $f31 + c.eq.d $fcc0, $f30, $f31 + c.eq.d $fcc1, $f30, $f31 + c.eq.d $fcc7, $f30, $f31 + c.eq.s $f0, $f1 + c.eq.s $f30, $f31 + c.eq.s $fcc0, $f30, $f31 + c.eq.s $fcc1, $f30, $f31 + c.eq.s $fcc7, $f30, $f31 + c.eq.ps $f0, $f1 + c.eq.ps $f30, $f31 + c.eq.ps $fcc0, $f30, $f31 + c.eq.ps $fcc2, $f30, $f31 + c.eq.ps $fcc6, $f30, $f31 + + c.ueq.d $f0, $f1 + c.ueq.d $f30, $f31 + c.ueq.d $fcc0, $f30, $f31 + c.ueq.d $fcc1, $f30, $f31 + c.ueq.d $fcc7, $f30, $f31 + c.ueq.s $f0, $f1 + c.ueq.s $f30, $f31 + c.ueq.s $fcc0, $f30, $f31 + c.ueq.s $fcc1, $f30, $f31 + c.ueq.s $fcc7, $f30, $f31 + c.ueq.ps $f0, $f1 + c.ueq.ps $f30, $f31 + c.ueq.ps $fcc0, $f30, $f31 + c.ueq.ps $fcc2, $f30, $f31 + c.ueq.ps $fcc6, $f30, $f31 + + c.olt.d $f0, $f1 + c.olt.d $f30, $f31 + c.olt.d $fcc0, $f30, $f31 + c.olt.d $fcc1, $f30, $f31 + c.olt.d $fcc7, $f30, $f31 + c.olt.s $f0, $f1 + c.olt.s $f30, $f31 + c.olt.s $fcc0, $f30, $f31 + c.olt.s $fcc1, $f30, $f31 + c.olt.s $fcc7, $f30, $f31 + c.olt.ps $f0, $f1 + c.olt.ps $f30, $f31 + c.olt.ps $fcc0, $f30, $f31 + c.olt.ps $fcc2, $f30, $f31 + c.olt.ps $fcc6, $f30, $f31 + + c.ult.d $f0, $f1 + c.ult.d $f30, $f31 + c.ult.d $fcc0, $f30, $f31 + c.ult.d $fcc1, $f30, $f31 + c.ult.d $fcc7, $f30, $f31 + c.ult.s $f0, $f1 + c.ult.s $f30, $f31 + c.ult.s $fcc0, $f30, $f31 + c.ult.s $fcc1, $f30, $f31 + c.ult.s $fcc7, $f30, $f31 + c.ult.ps $f0, $f1 + c.ult.ps $f30, $f31 + c.ult.ps $fcc0, $f30, $f31 + c.ult.ps $fcc2, $f30, $f31 + c.ult.ps $fcc6, $f30, $f31 + + c.ole.d $f0, $f1 + c.ole.d $f30, $f31 + c.ole.d $fcc0, $f30, $f31 + c.ole.d $fcc1, $f30, $f31 + c.ole.d $fcc7, $f30, $f31 + c.ole.s $f0, $f1 + c.ole.s $f30, $f31 + c.ole.s $fcc0, $f30, $f31 + c.ole.s $fcc1, $f30, $f31 + c.ole.s $fcc7, $f30, $f31 + c.ole.ps $f0, $f1 + c.ole.ps $f30, $f31 + c.ole.ps $fcc0, $f30, $f31 + c.ole.ps $fcc2, $f30, $f31 + c.ole.ps $fcc6, $f30, $f31 + + c.ule.d $f0, $f1 + c.ule.d $f30, $f31 + c.ule.d $fcc0, $f30, $f31 + c.ule.d $fcc1, $f30, $f31 + c.ule.d $fcc7, $f30, $f31 + c.ule.s $f0, $f1 + c.ule.s $f30, $f31 + c.ule.s $fcc0, $f30, $f31 + c.ule.s $fcc1, $f30, $f31 + c.ule.s $fcc7, $f30, $f31 + c.ule.ps $f0, $f1 + c.ule.ps $f30, $f31 + c.ule.ps $fcc0, $f30, $f31 + c.ule.ps $fcc2, $f30, $f31 + c.ule.ps $fcc6, $f30, $f31 + + c.sf.d $f0, $f1 + c.sf.d $f30, $f31 + c.sf.d $fcc0, $f30, $f31 + c.sf.d $fcc1, $f30, $f31 + c.sf.d $fcc7, $f30, $f31 + c.sf.s $f0, $f1 + c.sf.s $f30, $f31 + c.sf.s $fcc0, $f30, $f31 + c.sf.s $fcc1, $f30, $f31 + c.sf.s $fcc7, $f30, $f31 + c.sf.ps $f0, $f1 + c.sf.ps $f30, $f31 + c.sf.ps $fcc0, $f30, $f31 + c.sf.ps $fcc2, $f30, $f31 + c.sf.ps $fcc6, $f30, $f31 + + c.ngle.d $f0, $f1 + c.ngle.d $f30, $f31 + c.ngle.d $fcc0, $f30, $f31 + c.ngle.d $fcc1, $f30, $f31 + c.ngle.d $fcc7, $f30, $f31 + c.ngle.s $f0, $f1 + c.ngle.s $f30, $f31 + c.ngle.s $fcc0, $f30, $f31 + c.ngle.s $fcc1, $f30, $f31 + c.ngle.s $fcc7, $f30, $f31 + c.ngle.ps $f0, $f1 + c.ngle.ps $f30, $f31 + c.ngle.ps $fcc0, $f30, $f31 + c.ngle.ps $fcc2, $f30, $f31 + c.ngle.ps $fcc6, $f30, $f31 + + c.seq.d $f0, $f1 + c.seq.d $f30, $f31 + c.seq.d $fcc0, $f30, $f31 + c.seq.d $fcc1, $f30, $f31 + c.seq.d $fcc7, $f30, $f31 + c.seq.s $f0, $f1 + c.seq.s $f30, $f31 + c.seq.s $fcc0, $f30, $f31 + c.seq.s $fcc1, $f30, $f31 + c.seq.s $fcc7, $f30, $f31 + c.seq.ps $f0, $f1 + c.seq.ps $f30, $f31 + c.seq.ps $fcc0, $f30, $f31 + c.seq.ps $fcc2, $f30, $f31 + c.seq.ps $fcc6, $f30, $f31 + + c.ngl.d $f0, $f1 + c.ngl.d $f30, $f31 + c.ngl.d $fcc0, $f30, $f31 + c.ngl.d $fcc1, $f30, $f31 + c.ngl.d $fcc7, $f30, $f31 + c.ngl.s $f0, $f1 + c.ngl.s $f30, $f31 + c.ngl.s $fcc0, $f30, $f31 + c.ngl.s $fcc1, $f30, $f31 + c.ngl.s $fcc7, $f30, $f31 + c.ngl.ps $f0, $f1 + c.ngl.ps $f30, $f31 + c.ngl.ps $fcc0, $f30, $f31 + c.ngl.ps $fcc2, $f30, $f31 + c.ngl.ps $fcc6, $f30, $f31 + + c.lt.d $f0, $f1 + c.lt.d $f30, $f31 + c.lt.d $fcc0, $f30, $f31 + c.lt.d $fcc1, $f30, $f31 + c.lt.d $fcc7, $f30, $f31 + c.lt.s $f0, $f1 + c.lt.s $f30, $f31 + c.lt.s $fcc0, $f30, $f31 + c.lt.s $fcc1, $f30, $f31 + c.lt.s $fcc7, $f30, $f31 + c.lt.ps $f0, $f1 + c.lt.ps $f30, $f31 + c.lt.ps $fcc0, $f30, $f31 + c.lt.ps $fcc2, $f30, $f31 + c.lt.ps $fcc6, $f30, $f31 + + c.nge.d $f0, $f1 + c.nge.d $f30, $f31 + c.nge.d $fcc0, $f30, $f31 + c.nge.d $fcc1, $f30, $f31 + c.nge.d $fcc7, $f30, $f31 + c.nge.s $f0, $f1 + c.nge.s $f30, $f31 + c.nge.s $fcc0, $f30, $f31 + c.nge.s $fcc1, $f30, $f31 + c.nge.s $fcc7, $f30, $f31 + c.nge.ps $f0, $f1 + c.nge.ps $f30, $f31 + c.nge.ps $fcc0, $f30, $f31 + c.nge.ps $fcc2, $f30, $f31 + c.nge.ps $fcc6, $f30, $f31 + + c.le.d $f0, $f1 + c.le.d $f30, $f31 + c.le.d $fcc0, $f30, $f31 + c.le.d $fcc1, $f30, $f31 + c.le.d $fcc7, $f30, $f31 + c.le.s $f0, $f1 + c.le.s $f30, $f31 + c.le.s $fcc0, $f30, $f31 + c.le.s $fcc1, $f30, $f31 + c.le.s $fcc7, $f30, $f31 + c.le.ps $f0, $f1 + c.le.ps $f30, $f31 + c.le.ps $fcc0, $f30, $f31 + c.le.ps $fcc2, $f30, $f31 + c.le.ps $fcc6, $f30, $f31 + + c.ngt.d $f0, $f1 + c.ngt.d $f30, $f31 + c.ngt.d $fcc0, $f30, $f31 + c.ngt.d $fcc1, $f30, $f31 + c.ngt.d $fcc7, $f30, $f31 + c.ngt.s $f0, $f1 + c.ngt.s $f30, $f31 + c.ngt.s $fcc0, $f30, $f31 + c.ngt.s $fcc1, $f30, $f31 + c.ngt.s $fcc7, $f30, $f31 + c.ngt.ps $f0, $f1 + c.ngt.ps $f30, $f31 + c.ngt.ps $fcc0, $f30, $f31 + c.ngt.ps $fcc2, $f30, $f31 + c.ngt.ps $fcc6, $f30, $f31 + + ceil.l.d $f0, $f1 + ceil.l.d $f30, $f31 + ceil.l.d $f2, $f2 + + ceil.l.s $f0, $f1 + ceil.l.s $f30, $f31 + ceil.l.s $f2, $f2 + + ceil.w.d $f0, $f1 + ceil.w.d $f30, $f31 + ceil.w.d $f2, $f2 + + ceil.w.s $f0, $f1 + ceil.w.s $f30, $f31 + ceil.w.s $f2, $f2 + + cfc1 $5, $0 + cfc1 $5, $1 + cfc1 $5, $2 + cfc1 $5, $3 + cfc1 $5, $4 + cfc1 $5, $5 + cfc1 $5, $6 + cfc1 $5, $7 + cfc1 $5, $8 + cfc1 $5, $9 + cfc1 $5, $10 + cfc1 $5, $11 + cfc1 $5, $12 + cfc1 $5, $13 + cfc1 $5, $14 + cfc1 $5, $15 + cfc1 $5, $16 + cfc1 $5, $17 + cfc1 $5, $18 + cfc1 $5, $19 + cfc1 $5, $20 + cfc1 $5, $21 + cfc1 $5, $22 + cfc1 $5, $23 + cfc1 $5, $24 + cfc1 $5, $25 + cfc1 $5, $26 + cfc1 $5, $27 + cfc1 $5, $28 + cfc1 $5, $29 + cfc1 $5, $30 + cfc1 $5, $31 + cfc1 $5, $f0 + cfc1 $5, $f1 + cfc1 $5, $f2 + cfc1 $5, $f3 + cfc1 $5, $f4 + cfc1 $5, $f5 + cfc1 $5, $f6 + cfc1 $5, $f7 + cfc1 $5, $f8 + cfc1 $5, $f9 + cfc1 $5, $f10 + cfc1 $5, $f11 + cfc1 $5, $f12 + cfc1 $5, $f13 + cfc1 $5, $f14 + cfc1 $5, $f15 + cfc1 $5, $f16 + cfc1 $5, $f17 + cfc1 $5, $f18 + cfc1 $5, $f19 + cfc1 $5, $f20 + cfc1 $5, $f21 + cfc1 $5, $f22 + cfc1 $5, $f23 + cfc1 $5, $f24 + cfc1 $5, $f25 + cfc1 $5, $f26 + cfc1 $5, $f27 + cfc1 $5, $f28 + cfc1 $5, $f29 + cfc1 $5, $f30 + cfc1 $5, $f31 + + cfc2 $5, $0 + cfc2 $5, $1 + cfc2 $5, $2 + cfc2 $5, $3 + cfc2 $5, $4 + cfc2 $5, $5 + cfc2 $5, $6 + cfc2 $5, $7 + cfc2 $5, $8 + cfc2 $5, $9 + cfc2 $5, $10 + cfc2 $5, $11 + cfc2 $5, $12 + cfc2 $5, $13 + cfc2 $5, $14 + cfc2 $5, $15 + cfc2 $5, $16 + cfc2 $5, $17 + cfc2 $5, $18 + cfc2 $5, $19 + cfc2 $5, $20 + cfc2 $5, $21 + cfc2 $5, $22 + cfc2 $5, $23 + cfc2 $5, $24 + cfc2 $5, $25 + cfc2 $5, $26 + cfc2 $5, $27 + cfc2 $5, $28 + cfc2 $5, $29 + cfc2 $5, $30 + cfc2 $5, $31 + + ctc1 $5, $0 + ctc1 $5, $1 + ctc1 $5, $2 + ctc1 $5, $3 + ctc1 $5, $4 + ctc1 $5, $5 + ctc1 $5, $6 + ctc1 $5, $7 + ctc1 $5, $8 + ctc1 $5, $9 + ctc1 $5, $10 + ctc1 $5, $11 + ctc1 $5, $12 + ctc1 $5, $13 + ctc1 $5, $14 + ctc1 $5, $15 + ctc1 $5, $16 + ctc1 $5, $17 + ctc1 $5, $18 + ctc1 $5, $19 + ctc1 $5, $20 + ctc1 $5, $21 + ctc1 $5, $22 + ctc1 $5, $23 + ctc1 $5, $24 + ctc1 $5, $25 + ctc1 $5, $26 + ctc1 $5, $27 + ctc1 $5, $28 + ctc1 $5, $29 + ctc1 $5, $30 + ctc1 $5, $31 + ctc1 $5, $f0 + ctc1 $5, $f1 + ctc1 $5, $f2 + ctc1 $5, $f3 + ctc1 $5, $f4 + ctc1 $5, $f5 + ctc1 $5, $f6 + ctc1 $5, $f7 + ctc1 $5, $f8 + ctc1 $5, $f9 + ctc1 $5, $f10 + ctc1 $5, $f11 + ctc1 $5, $f12 + ctc1 $5, $f13 + ctc1 $5, $f14 + ctc1 $5, $f15 + ctc1 $5, $f16 + ctc1 $5, $f17 + ctc1 $5, $f18 + ctc1 $5, $f19 + ctc1 $5, $f20 + ctc1 $5, $f21 + ctc1 $5, $f22 + ctc1 $5, $f23 + ctc1 $5, $f24 + ctc1 $5, $f25 + ctc1 $5, $f26 + ctc1 $5, $f27 + ctc1 $5, $f28 + ctc1 $5, $f29 + ctc1 $5, $f30 + ctc1 $5, $f31 + + ctc2 $5, $0 + ctc2 $5, $1 + ctc2 $5, $2 + ctc2 $5, $3 + ctc2 $5, $4 + ctc2 $5, $5 + ctc2 $5, $6 + ctc2 $5, $7 + ctc2 $5, $8 + ctc2 $5, $9 + ctc2 $5, $10 + ctc2 $5, $11 + ctc2 $5, $12 + ctc2 $5, $13 + ctc2 $5, $14 + ctc2 $5, $15 + ctc2 $5, $16 + ctc2 $5, $17 + ctc2 $5, $18 + ctc2 $5, $19 + ctc2 $5, $20 + ctc2 $5, $21 + ctc2 $5, $22 + ctc2 $5, $23 + ctc2 $5, $24 + ctc2 $5, $25 + ctc2 $5, $26 + ctc2 $5, $27 + ctc2 $5, $28 + ctc2 $5, $29 + ctc2 $5, $30 + ctc2 $5, $31 + + cvt.d.l $f0, $f1 + cvt.d.l $f30, $f31 + cvt.d.l $f2, $f2 + + cvt.d.s $f0, $f1 + cvt.d.s $f30, $f31 + cvt.d.s $f2, $f2 + + cvt.d.w $f0, $f1 + cvt.d.w $f30, $f31 + cvt.d.w $f2, $f2 + + cvt.l.s $f0, $f1 + cvt.l.s $f30, $f31 + cvt.l.s $f2, $f2 + + cvt.l.d $f0, $f1 + cvt.l.d $f30, $f31 + cvt.l.d $f2, $f2 + + cvt.s.l $f0, $f1 + cvt.s.l $f30, $f31 + cvt.s.l $f2, $f2 + + cvt.s.d $f0, $f1 + cvt.s.d $f30, $f31 + cvt.s.d $f2, $f2 + + cvt.s.w $f0, $f1 + cvt.s.w $f30, $f31 + cvt.s.w $f2, $f2 + + cvt.s.pl $f0, $f1 + cvt.s.pl $f30, $f31 + cvt.s.pl $f2, $f2 + + cvt.s.pu $f0, $f1 + cvt.s.pu $f30, $f31 + cvt.s.pu $f2, $f2 + + cvt.w.s $f0, $f1 + cvt.w.s $f30, $f31 + cvt.w.s $f2, $f2 + + cvt.w.d $f0, $f1 + cvt.w.d $f30, $f31 + cvt.w.d $f2, $f2 + + cvt.ps.s $f0, $f1, $f2 + cvt.ps.s $f29, $f30, $f31 + cvt.ps.s $f29, $f29, $f31 + cvt.ps.s $f29, $f31 + + div.d $f0, $f1, $f2 + div.d $f29, $f30, $f31 + div.d $f29, $f29, $f30 + div.d $f29, $f30 + + div.s $f0, $f1, $f2 + div.s $f29, $f30, $f31 + div.s $f29, $f29, $f30 + div.s $f29, $f30 + + floor.l.d $f0, $f1 + floor.l.d $f30, $f31 + floor.l.d $f2, $f2 + + floor.l.s $f0, $f1 + floor.l.s $f30, $f31 + floor.l.s $f2, $f2 + + floor.w.d $f0, $f1 + floor.w.d $f30, $f31 + floor.w.d $f2, $f2 + + floor.w.s $f0, $f1 + floor.w.s $f30, $f31 + floor.w.s $f2, $f2 + + ldc1 $3, 0 + ldc1 $3, ($0) + ldc1 $3, 4 + ldc1 $3, 4($0) + ldc1 $3, ($4) + ldc1 $3, 0($4) + ldc1 $3, 32767($4) + ldc1 $3, -32768($4) + ldc1 $3, 65535($4) + ldc1 $3, 0xffff0000($4) + ldc1 $3, 0xffff8000($4) + ldc1 $3, 0xffff0001($4) + ldc1 $3, 0xffff8001($4) + ldc1 $3, 0xf0000000($4) + ldc1 $3, 0xffffffff($4) + ldc1 $3, 0x12345678($4) + ldc1 $f3, 0 + ldc1 $f3, ($0) + ldc1 $f3, 4 + ldc1 $f3, 4($0) + ldc1 $f3, ($4) + ldc1 $f3, 0($4) + ldc1 $f3, 32767($4) + ldc1 $f3, -32768($4) + ldc1 $f3, 65535($4) + ldc1 $f3, 0xffff0000($4) + ldc1 $f3, 0xffff8000($4) + ldc1 $f3, 0xffff0001($4) + ldc1 $f3, 0xffff8001($4) + ldc1 $f3, 0xf0000000($4) + ldc1 $f3, 0xffffffff($4) + ldc1 $f3, 0x12345678($4) + + l.d $f3, 0 + l.d $f3, ($0) + l.d $f3, 4 + l.d $f3, 4($0) + l.d $f3, ($4) + l.d $f3, 0($4) + l.d $f3, 32767($4) + l.d $f3, -32768($4) + + ldxc1 $f0, $0($0) + ldxc1 $f0, $0($2) + ldxc1 $f0, $0($31) + ldxc1 $f0, $2($31) + ldxc1 $f0, $31($31) + ldxc1 $f1, $31($31) + ldxc1 $f2, $31($31) + ldxc1 $f31, $31($31) + + luxc1 $f0, $0($0) + luxc1 $f0, $0($2) + luxc1 $f0, $0($31) + luxc1 $f0, $2($31) + luxc1 $f0, $31($31) + luxc1 $f1, $31($31) + luxc1 $f2, $31($31) + luxc1 $f31, $31($31) + + lwc1 $3, 0 + lwc1 $3, ($0) + lwc1 $3, 4 + lwc1 $3, 4($0) + lwc1 $3, ($4) + lwc1 $3, 0($4) + lwc1 $3, 32767($4) + lwc1 $3, -32768($4) + lwc1 $3, 65535($4) + lwc1 $3, 0xffff0000($4) + lwc1 $3, 0xffff8000($4) + lwc1 $3, 0xffff0001($4) + lwc1 $3, 0xffff8001($4) + lwc1 $3, 0xf0000000($4) + lwc1 $3, 0xffffffff($4) + lwc1 $3, 0x12345678($4) + lwc1 $f3, 0 + lwc1 $f3, ($0) + lwc1 $f3, 4 + lwc1 $f3, 4($0) + lwc1 $f3, ($4) + lwc1 $f3, 0($4) + lwc1 $f3, 32767($4) + lwc1 $f3, -32768($4) + lwc1 $f3, 65535($4) + lwc1 $f3, 0xffff0000($4) + lwc1 $f3, 0xffff8000($4) + lwc1 $f3, 0xffff0001($4) + lwc1 $f3, 0xffff8001($4) + lwc1 $f3, 0xf0000000($4) + lwc1 $f3, 0xffffffff($4) + lwc1 $f3, 0x12345678($4) + + l.s $f3, 0 + l.s $f3, ($0) + l.s $f3, 4 + l.s $f3, 4($0) + l.s $f3, ($4) + l.s $f3, 0($4) + l.s $f3, 32767($4) + l.s $f3, -32768($4) + l.s $f3, 65535($4) + l.s $f3, 0xffff0000($4) + l.s $f3, 0xffff8000($4) + l.s $f3, 0xffff0001($4) + l.s $f3, 0xffff8001($4) + l.s $f3, 0xf0000000($4) + l.s $f3, 0xffffffff($4) + l.s $f3, 0x12345678($4) + + lwxc1 $f0, $0($0) + lwxc1 $f0, $0($2) + lwxc1 $f0, $0($31) + lwxc1 $f0, $2($31) + lwxc1 $f0, $31($31) + lwxc1 $f1, $31($31) + lwxc1 $f2, $31($31) + lwxc1 $f31, $31($31) + + madd.d $f0, $f1, $f2, $f3 + madd.d $f28, $f29, $f30, $f31 + madd.s $f0, $f1, $f2, $f3 + madd.s $f28, $f29, $f30, $f31 + madd.ps $f0, $f1, $f2, $f3 + madd.ps $f28, $f29, $f30, $f31 + + mfc1 $5, $0 + mfc1 $5, $1 + mfc1 $5, $2 + mfc1 $5, $3 + mfc1 $5, $4 + mfc1 $5, $5 + mfc1 $5, $6 + mfc1 $5, $7 + mfc1 $5, $8 + mfc1 $5, $9 + mfc1 $5, $10 + mfc1 $5, $11 + mfc1 $5, $12 + mfc1 $5, $13 + mfc1 $5, $14 + mfc1 $5, $15 + mfc1 $5, $16 + mfc1 $5, $17 + mfc1 $5, $18 + mfc1 $5, $19 + mfc1 $5, $20 + mfc1 $5, $21 + mfc1 $5, $22 + mfc1 $5, $23 + mfc1 $5, $24 + mfc1 $5, $25 + mfc1 $5, $26 + mfc1 $5, $27 + mfc1 $5, $28 + mfc1 $5, $29 + mfc1 $5, $30 + mfc1 $5, $31 + mfc1 $5, $f0 + mfc1 $5, $f1 + mfc1 $5, $f2 + mfc1 $5, $f3 + mfc1 $5, $f4 + mfc1 $5, $f5 + mfc1 $5, $f6 + mfc1 $5, $f7 + mfc1 $5, $f8 + mfc1 $5, $f9 + mfc1 $5, $f10 + mfc1 $5, $f11 + mfc1 $5, $f12 + mfc1 $5, $f13 + mfc1 $5, $f14 + mfc1 $5, $f15 + mfc1 $5, $f16 + mfc1 $5, $f17 + mfc1 $5, $f18 + mfc1 $5, $f19 + mfc1 $5, $f20 + mfc1 $5, $f21 + mfc1 $5, $f22 + mfc1 $5, $f23 + mfc1 $5, $f24 + mfc1 $5, $f25 + mfc1 $5, $f26 + mfc1 $5, $f27 + mfc1 $5, $f28 + mfc1 $5, $f29 + mfc1 $5, $f30 + mfc1 $5, $f31 + + mfhc1 $5, $0 + mfhc1 $5, $1 + mfhc1 $5, $2 + mfhc1 $5, $3 + mfhc1 $5, $4 + mfhc1 $5, $5 + mfhc1 $5, $6 + mfhc1 $5, $7 + mfhc1 $5, $8 + mfhc1 $5, $9 + mfhc1 $5, $10 + mfhc1 $5, $11 + mfhc1 $5, $12 + mfhc1 $5, $13 + mfhc1 $5, $14 + mfhc1 $5, $15 + mfhc1 $5, $16 + mfhc1 $5, $17 + mfhc1 $5, $18 + mfhc1 $5, $19 + mfhc1 $5, $20 + mfhc1 $5, $21 + mfhc1 $5, $22 + mfhc1 $5, $23 + mfhc1 $5, $24 + mfhc1 $5, $25 + mfhc1 $5, $26 + mfhc1 $5, $27 + mfhc1 $5, $28 + mfhc1 $5, $29 + mfhc1 $5, $30 + mfhc1 $5, $31 + mfhc1 $5, $f0 + mfhc1 $5, $f1 + mfhc1 $5, $f2 + mfhc1 $5, $f3 + mfhc1 $5, $f4 + mfhc1 $5, $f5 + mfhc1 $5, $f6 + mfhc1 $5, $f7 + mfhc1 $5, $f8 + mfhc1 $5, $f9 + mfhc1 $5, $f10 + mfhc1 $5, $f11 + mfhc1 $5, $f12 + mfhc1 $5, $f13 + mfhc1 $5, $f14 + mfhc1 $5, $f15 + mfhc1 $5, $f16 + mfhc1 $5, $f17 + mfhc1 $5, $f18 + mfhc1 $5, $f19 + mfhc1 $5, $f20 + mfhc1 $5, $f21 + mfhc1 $5, $f22 + mfhc1 $5, $f23 + mfhc1 $5, $f24 + mfhc1 $5, $f25 + mfhc1 $5, $f26 + mfhc1 $5, $f27 + mfhc1 $5, $f28 + mfhc1 $5, $f29 + mfhc1 $5, $f30 + mfhc1 $5, $f31 + + mov.d $f0, $f1 + mov.d $f30, $f31 + mov.s $f0, $f1 + mov.s $f30, $f31 + mov.ps $f0, $f1 + mov.ps $f30, $f31 + + movf.d $f2, $f3, $fcc0 + movf.d $f2, $f3, $fcc1 + movf.d $f2, $f3, $fcc2 + movf.d $f2, $f3, $fcc3 + movf.d $f2, $f3, $fcc4 + movf.d $f2, $f3, $fcc5 + movf.d $f2, $f3, $fcc6 + movf.d $f2, $f3, $fcc7 + movf.d $f30, $f31, $fcc7 + + movf.s $f2, $f3, $fcc0 + movf.s $f2, $f3, $fcc1 + movf.s $f2, $f3, $fcc2 + movf.s $f2, $f3, $fcc3 + movf.s $f2, $f3, $fcc4 + movf.s $f2, $f3, $fcc5 + movf.s $f2, $f3, $fcc6 + movf.s $f2, $f3, $fcc7 + movf.s $f30, $f31, $fcc7 + + movf.ps $f2, $f3, $fcc0 + movf.ps $f2, $f3, $fcc2 + movf.ps $f2, $f3, $fcc4 + movf.ps $f2, $f3, $fcc6 + movf.ps $f2, $f3, $fcc6 + movf.ps $f30, $f31, $fcc6 + + movn.d $f2, $f3, $0 + movn.d $f2, $f3, $31 + movn.s $f2, $f3, $0 + movn.s $f2, $f3, $31 + movn.ps $f2, $f3, $0 + movn.ps $f2, $f3, $31 + + movt.ps $f2, $f3, $fcc0 + movt.ps $f2, $f3, $fcc2 + movt.ps $f2, $f3, $fcc4 + movt.ps $f2, $f3, $fcc6 + movt.ps $f2, $f3, $fcc6 + movt.ps $f30, $f31, $fcc6 + + movz.d $f2, $f3, $0 + movz.d $f2, $f3, $31 + movz.s $f2, $f3, $0 + movz.s $f2, $f3, $31 + movz.ps $f2, $f3, $0 + movz.ps $f2, $f3, $31 + + msub.d $f0, $f1, $f2, $f3 + msub.d $f28, $f29, $f30, $f31 + msub.s $f0, $f1, $f2, $f3 + msub.s $f28, $f29, $f30, $f31 + msub.ps $f0, $f1, $f2, $f3 + msub.ps $f28, $f29, $f30, $f31 + + mtc1 $5, $0 + mtc1 $5, $1 + mtc1 $5, $2 + mtc1 $5, $3 + mtc1 $5, $4 + mtc1 $5, $5 + mtc1 $5, $6 + mtc1 $5, $7 + mtc1 $5, $8 + mtc1 $5, $9 + mtc1 $5, $10 + mtc1 $5, $11 + mtc1 $5, $12 + mtc1 $5, $13 + mtc1 $5, $14 + mtc1 $5, $15 + mtc1 $5, $16 + mtc1 $5, $17 + mtc1 $5, $18 + mtc1 $5, $19 + mtc1 $5, $20 + mtc1 $5, $21 + mtc1 $5, $22 + mtc1 $5, $23 + mtc1 $5, $24 + mtc1 $5, $25 + mtc1 $5, $26 + mtc1 $5, $27 + mtc1 $5, $28 + mtc1 $5, $29 + mtc1 $5, $30 + mtc1 $5, $31 + mtc1 $5, $f0 + mtc1 $5, $f1 + mtc1 $5, $f2 + mtc1 $5, $f3 + mtc1 $5, $f4 + mtc1 $5, $f5 + mtc1 $5, $f6 + mtc1 $5, $f7 + mtc1 $5, $f8 + mtc1 $5, $f9 + mtc1 $5, $f10 + mtc1 $5, $f11 + mtc1 $5, $f12 + mtc1 $5, $f13 + mtc1 $5, $f14 + mtc1 $5, $f15 + mtc1 $5, $f16 + mtc1 $5, $f17 + mtc1 $5, $f18 + mtc1 $5, $f19 + mtc1 $5, $f20 + mtc1 $5, $f21 + mtc1 $5, $f22 + mtc1 $5, $f23 + mtc1 $5, $f24 + mtc1 $5, $f25 + mtc1 $5, $f26 + mtc1 $5, $f27 + mtc1 $5, $f28 + mtc1 $5, $f29 + mtc1 $5, $f30 + mtc1 $5, $f31 + + mthc1 $5, $0 + mthc1 $5, $1 + mthc1 $5, $2 + mthc1 $5, $3 + mthc1 $5, $4 + mthc1 $5, $5 + mthc1 $5, $6 + mthc1 $5, $7 + mthc1 $5, $8 + mthc1 $5, $9 + mthc1 $5, $10 + mthc1 $5, $11 + mthc1 $5, $12 + mthc1 $5, $13 + mthc1 $5, $14 + mthc1 $5, $15 + mthc1 $5, $16 + mthc1 $5, $17 + mthc1 $5, $18 + mthc1 $5, $19 + mthc1 $5, $20 + mthc1 $5, $21 + mthc1 $5, $22 + mthc1 $5, $23 + mthc1 $5, $24 + mthc1 $5, $25 + mthc1 $5, $26 + mthc1 $5, $27 + mthc1 $5, $28 + mthc1 $5, $29 + mthc1 $5, $30 + mthc1 $5, $31 + mthc1 $5, $f0 + mthc1 $5, $f1 + mthc1 $5, $f2 + mthc1 $5, $f3 + mthc1 $5, $f4 + mthc1 $5, $f5 + mthc1 $5, $f6 + mthc1 $5, $f7 + mthc1 $5, $f8 + mthc1 $5, $f9 + mthc1 $5, $f10 + mthc1 $5, $f11 + mthc1 $5, $f12 + mthc1 $5, $f13 + mthc1 $5, $f14 + mthc1 $5, $f15 + mthc1 $5, $f16 + mthc1 $5, $f17 + mthc1 $5, $f18 + mthc1 $5, $f19 + mthc1 $5, $f20 + mthc1 $5, $f21 + mthc1 $5, $f22 + mthc1 $5, $f23 + mthc1 $5, $f24 + mthc1 $5, $f25 + mthc1 $5, $f26 + mthc1 $5, $f27 + mthc1 $5, $f28 + mthc1 $5, $f29 + mthc1 $5, $f30 + mthc1 $5, $f31 + + mul.s $f0, $f1, $f2 + mul.s $f29, $f30, $f31 + mul.s $f29, $f29, $f30 + mul.s $f29, $f30 + mul.d $f0, $f1, $f2 + mul.d $f29, $f30, $f31 + mul.d $f29, $f29, $f30 + mul.d $f29, $f30 + mul.ps $f0, $f1, $f2 + mul.ps $f29, $f30, $f31 + mul.ps $f29, $f29, $f30 + mul.ps $f29, $f30 + + neg.s $f0, $f1 + neg.s $f30, $f31 + neg.s $f2, $f2 + neg.s $f2 + neg.d $f0, $f1 + neg.d $f30, $f31 + neg.d $f2, $f2 + neg.d $f2 + neg.ps $f0, $f1 + neg.ps $f30, $f31 + neg.ps $f2, $f2 + neg.ps $f2 + + nmadd.d $f0, $f1, $f2, $f3 + nmadd.d $f28, $f29, $f30, $f31 + nmadd.s $f0, $f1, $f2, $f3 + nmadd.s $f28, $f29, $f30, $f31 + nmadd.ps $f0, $f1, $f2, $f3 + nmadd.ps $f28, $f29, $f30, $f31 + + nmsub.d $f0, $f1, $f2, $f3 + nmsub.d $f28, $f29, $f30, $f31 + nmsub.s $f0, $f1, $f2, $f3 + nmsub.s $f28, $f29, $f30, $f31 + nmsub.ps $f0, $f1, $f2, $f3 + nmsub.ps $f28, $f29, $f30, $f31 + + pll.ps $f0, $f1, $f2 + pll.ps $f29, $f30, $f31 + pll.ps $f29, $f29, $f30 + pll.ps $f29, $f30 + plu.ps $f0, $f1, $f2 + plu.ps $f29, $f30, $f31 + plu.ps $f29, $f29, $f30 + plu.ps $f29, $f30 + pul.ps $f0, $f1, $f2 + pul.ps $f29, $f30, $f31 + pul.ps $f29, $f29, $f30 + pul.ps $f29, $f30 + puu.ps $f0, $f1, $f2 + puu.ps $f29, $f30, $f31 + puu.ps $f29, $f29, $f30 + puu.ps $f29, $f30 + + recip.s $f0, $f1 + recip.s $f30, $f31 + recip.s $f2, $f2 + recip.d $f0, $f1 + recip.d $f30, $f31 + recip.d $f2, $f2 + + round.l.s $f0, $f1 + round.l.s $f30, $f31 + round.l.s $f2, $f2 + round.l.d $f0, $f1 + round.l.d $f30, $f31 + round.l.d $f2, $f2 + + round.w.s $f0, $f1 + round.w.s $f30, $f31 + round.w.s $f2, $f2 + round.w.d $f0, $f1 + round.w.d $f30, $f31 + round.w.d $f2, $f2 + + rsqrt.s $f0, $f1 + rsqrt.s $f30, $f31 + rsqrt.s $f2, $f2 + rsqrt.d $f0, $f1 + rsqrt.d $f30, $f31 + rsqrt.d $f2, $f2 + + sdc1 $3, 0 + sdc1 $3, ($0) + sdc1 $3, 4 + sdc1 $3, 4($0) + sdc1 $3, ($4) + sdc1 $3, 0($4) + sdc1 $3, 32767($4) + sdc1 $3, -32768($4) + sdc1 $3, 65535($4) + sdc1 $3, 0xffff0000($4) + sdc1 $3, 0xffff8000($4) + sdc1 $3, 0xffff0001($4) + sdc1 $3, 0xffff8001($4) + sdc1 $3, 0xf0000000($4) + sdc1 $3, 0xffffffff($4) + sdc1 $3, 0x12345678($4) + sdc1 $f3, 0 + sdc1 $f3, ($0) + sdc1 $f3, 4 + sdc1 $f3, 4($0) + sdc1 $f3, ($4) + sdc1 $f3, 0($4) + sdc1 $f3, 32767($4) + sdc1 $f3, -32768($4) + sdc1 $f3, 65535($4) + sdc1 $f3, 0xffff0000($4) + sdc1 $f3, 0xffff8000($4) + sdc1 $f3, 0xffff0001($4) + sdc1 $f3, 0xffff8001($4) + sdc1 $f3, 0xf0000000($4) + sdc1 $f3, 0xffffffff($4) + sdc1 $f3, 0x12345678($4) + + s.d $f3, 0 + s.d $f3, ($0) + s.d $f3, 4 + s.d $f3, 4($0) + s.d $f3, ($4) + s.d $f3, 0($4) + s.d $f3, 32767($4) + s.d $f3, -32768($4) + + sdxc1 $f0, $0($0) + sdxc1 $f0, $0($2) + sdxc1 $f0, $0($31) + sdxc1 $f0, $2($31) + sdxc1 $f0, $31($31) + sdxc1 $f1, $31($31) + sdxc1 $f2, $31($31) + sdxc1 $f31, $31($31) + + sqrt.s $f0, $f1 + sqrt.s $f30, $f31 + sqrt.s $f2, $f2 + sqrt.d $f0, $f1 + sqrt.d $f30, $f31 + sqrt.d $f2, $f2 + + sub.s $f0, $f1, $f2 + sub.s $f29, $f30, $f31 + sub.s $f29, $f29, $f30 + sub.s $f29, $f30 + sub.d $f0, $f1, $f2 + sub.d $f29, $f30, $f31 + sub.d $f29, $f29, $f30 + sub.d $f29, $f30 + sub.ps $f0, $f1, $f2 + sub.ps $f29, $f30, $f31 + sub.ps $f29, $f29, $f30 + sub.ps $f29, $f30 + + suxc1 $f0, $0($0) + suxc1 $f0, $0($2) + suxc1 $f0, $0($31) + suxc1 $f0, $2($31) + suxc1 $f0, $31($31) + suxc1 $f1, $31($31) + suxc1 $f2, $31($31) + suxc1 $f31, $31($31) + + swc1 $3, 0 + swc1 $3, ($0) + swc1 $3, 4 + swc1 $3, 4($0) + swc1 $3, ($4) + swc1 $3, 0($4) + swc1 $3, 32767($4) + swc1 $3, -32768($4) + swc1 $3, 65535($4) + swc1 $3, 0xffff0000($4) + swc1 $3, 0xffff8000($4) + swc1 $3, 0xffff0001($4) + swc1 $3, 0xffff8001($4) + swc1 $3, 0xf0000000($4) + swc1 $3, 0xffffffff($4) + swc1 $3, 0x12345678($4) + swc1 $f3, 0 + swc1 $f3, ($0) + swc1 $f3, 4 + swc1 $f3, 4($0) + swc1 $f3, ($4) + swc1 $f3, 0($4) + swc1 $f3, 32767($4) + swc1 $f3, -32768($4) + swc1 $f3, 65535($4) + swc1 $f3, 0xffff0000($4) + swc1 $f3, 0xffff8000($4) + swc1 $f3, 0xffff0001($4) + swc1 $f3, 0xffff8001($4) + swc1 $f3, 0xf0000000($4) + swc1 $f3, 0xffffffff($4) + swc1 $f3, 0x12345678($4) + + s.s $f3, 0 + s.s $f3, ($0) + s.s $f3, 4 + s.s $f3, 4($0) + s.s $f3, ($4) + s.s $f3, 0($4) + s.s $f3, 32767($4) + s.s $f3, -32768($4) + s.s $f3, 65535($4) + s.s $f3, 0xffff0000($4) + s.s $f3, 0xffff8000($4) + s.s $f3, 0xffff0001($4) + s.s $f3, 0xffff8001($4) + s.s $f3, 0xf0000000($4) + s.s $f3, 0xffffffff($4) + s.s $f3, 0x12345678($4) + + swxc1 $f0, $0($0) + swxc1 $f0, $0($2) + swxc1 $f0, $0($31) + swxc1 $f0, $2($31) + swxc1 $f0, $31($31) + swxc1 $f1, $31($31) + swxc1 $f2, $31($31) + swxc1 $f31, $31($31) + + trunc.l.s $f0, $f1 + trunc.l.s $f30, $f31 + trunc.l.s $f2, $f2 + trunc.l.d $f0, $f1 + trunc.l.d $f30, $f31 + trunc.l.d $f2, $f2 + + trunc.w.s $f0, $f1 + trunc.w.s $f30, $f31 + trunc.w.s $f2, $f2 + trunc.w.d $f0, $f1 + trunc.w.d $f30, $f31 + trunc.w.d $f2, $f2 + + movf $2, $3, $fcc0 + movf $30, $31, $fcc0 + movf $30, $31, $fcc1 + movf $30, $31, $fcc2 + movf $30, $31, $fcc3 + movf $30, $31, $fcc4 + movf $30, $31, $fcc5 + movf $30, $31, $fcc6 + movf $30, $31, $fcc7 + + movt $2, $3, $fcc0 + movt $30, $31, $fcc0 + movt $30, $31, $fcc1 + movt $30, $31, $fcc2 + movt $30, $31, $fcc3 + movt $30, $31, $fcc4 + movt $30, $31, $fcc5 + movt $30, $31, $fcc6 + movt $30, $31, $fcc7 + + .set noreorder + bc1fl $fcc1, test + addu $3, $4, $5 + bc1tl $fcc2, test + addu $6, $7, $8 + .set reorder + + bc1fl $fcc3, test + addu $3, $4, $5 + bc1tl $fcc4, test + addu $6, $7, $8 + + .end fp_test + + .set mips64r2 + .globl test_mips64 + .ent test_mips64 + +test_mips64: + dabs $2, $3 + dabs $2, $2 + dabs $2 + + dadd $2, $3, $4 + dadd $29, $30, $31 + dadd $2, $2, $3 + dadd $2, $3 + + dadd $2, $3, 0 + dadd $2, $3, 1 + dadd $2, $3, -512 + dadd $2, $3, 511 + dadd $2, $3, 32767 + dadd $2, $3, -32768 + dadd $2, $3, 65535 + dadd $2, $3, 0x12345678 + dadd $2, $3, 0x1234567887654321 + + daddi $2, $3, 0 + daddi $2, $3, 1 + daddi $2, $3, -512 + daddi $2, $3, 511 + daddi $2, $2, 511 + daddi $2, 511 + daddi $2, $3, 32767 + daddi $2, $3, -32768 + daddi $2, $3, 65535 + daddi $2, $3, 0x12345678 + + daddiu $2, $3, 0 + daddiu $2, $3, -32768 + daddiu $2, $3, 32767 + daddiu $2, $2, 32767 + daddiu $2, 32767 + + daddu $2, $3, $4 + daddu $29, $30, $31 + daddu $2, $2, $3 + daddu $2, $3 + daddu $2, $3, $0 + daddu $2, $3, 0 + daddu $2, $3, 1 + daddu $2, $3, 32767 + daddu $2, $3, -32768 + daddu $2, $3, 65535 + + dclo $2, $3 + dclo $3, $2 + dclz $2, $3 + dclz $3, $2 + + ddiv $0, $2, $3 + ddiv $0, $30, $31 + ddiv $0, $3 + ddiv $0, $31 + + ddiv $2, $3, $0 + ddiv $2, $3, $4 + + ddiv $3, $4, 0 + ddiv $3, $4, 1 + ddiv $3, $4, -1 + ddiv $3, $4, 2 + + ddivu $0, $2, $3 + ddivu $0, $30, $31 + ddivu $0, $3 + ddivu $0, $31 + + ddivu $2, $3, $0 + ddivu $2, $3, $4 + + ddivu $3, $4, 0 + ddivu $3, $4, 1 + ddivu $3, $4, -1 + ddivu $3, $4, 2 + + dext $2, $3, 31, 1 + dext $2, $3, 0, 32 + + dext $2, $3, 31, 33 + dextm $2, $3, 31, 33 + + dext $2, $3, 33, 10 + dextu $2, $3, 33, 10 + + dins $2, $3, 31, 1 + dins $2, $3, 0, 32 + + dins $2, $3, 31, 33 + dinsm $2, $3, 31, 33 + + dins $2, $3, 33, 10 + dinsu $2, $3, 33, 10 + + dla $2, test + dlca $2, test + + dli $2, -32768 + dli $2, 32767 + dli $2, 65535 + dli $2, 0x12345678 + + dmfc0 $2, $0 + dmfc0 $2, $1 + dmfc0 $2, $2 + dmfc0 $2, $3 + dmfc0 $2, $4 + dmfc0 $2, $5 + dmfc0 $2, $6 + dmfc0 $2, $7 + dmfc0 $2, $8 + dmfc0 $2, $9 + dmfc0 $2, $10 + dmfc0 $2, $11 + dmfc0 $2, $12 + dmfc0 $2, $13 + dmfc0 $2, $14 + dmfc0 $2, $15 + dmfc0 $2, $16 + dmfc0 $2, $17 + dmfc0 $2, $18 + dmfc0 $2, $19 + dmfc0 $2, $20 + dmfc0 $2, $21 + dmfc0 $2, $22 + dmfc0 $2, $23 + dmfc0 $2, $24 + dmfc0 $2, $25 + dmfc0 $2, $26 + dmfc0 $2, $27 + dmfc0 $2, $28 + dmfc0 $2, $29 + dmfc0 $2, $30 + dmfc0 $2, $31 + dmfc0 $2, $0, 0 + dmfc0 $2, $0, 1 + dmfc0 $2, $0, 2 + dmfc0 $2, $0, 3 + dmfc0 $2, $0, 4 + dmfc0 $2, $0, 5 + dmfc0 $2, $0, 6 + dmfc0 $2, $0, 7 + dmfc0 $2, $1, 0 + dmfc0 $2, $1, 1 + dmfc0 $2, $1, 2 + dmfc0 $2, $1, 3 + dmfc0 $2, $1, 4 + dmfc0 $2, $1, 5 + dmfc0 $2, $1, 6 + dmfc0 $2, $1, 7 + dmfc0 $2, $2, 0 + dmfc0 $2, $2, 1 + dmfc0 $2, $2, 2 + dmfc0 $2, $2, 3 + dmfc0 $2, $2, 4 + dmfc0 $2, $2, 5 + dmfc0 $2, $2, 6 + dmfc0 $2, $2, 7 + + dmtc0 $2, $0 + dmtc0 $2, $1 + dmtc0 $2, $2 + dmtc0 $2, $3 + dmtc0 $2, $4 + dmtc0 $2, $5 + dmtc0 $2, $6 + dmtc0 $2, $7 + dmtc0 $2, $8 + dmtc0 $2, $9 + dmtc0 $2, $10 + dmtc0 $2, $11 + dmtc0 $2, $12 + dmtc0 $2, $13 + dmtc0 $2, $14 + dmtc0 $2, $15 + dmtc0 $2, $16 + dmtc0 $2, $17 + dmtc0 $2, $18 + dmtc0 $2, $19 + dmtc0 $2, $20 + dmtc0 $2, $21 + dmtc0 $2, $22 + dmtc0 $2, $23 + dmtc0 $2, $24 + dmtc0 $2, $25 + dmtc0 $2, $26 + dmtc0 $2, $27 + dmtc0 $2, $28 + dmtc0 $2, $29 + dmtc0 $2, $30 + dmtc0 $2, $31 + dmtc0 $2, $0, 0 + dmtc0 $2, $0, 1 + dmtc0 $2, $0, 2 + dmtc0 $2, $0, 3 + dmtc0 $2, $0, 4 + dmtc0 $2, $0, 5 + dmtc0 $2, $0, 6 + dmtc0 $2, $0, 7 + dmtc0 $2, $1, 0 + dmtc0 $2, $1, 1 + dmtc0 $2, $1, 2 + dmtc0 $2, $1, 3 + dmtc0 $2, $1, 4 + dmtc0 $2, $1, 5 + dmtc0 $2, $1, 6 + dmtc0 $2, $1, 7 + dmtc0 $2, $2, 0 + dmtc0 $2, $2, 1 + dmtc0 $2, $2, 2 + dmtc0 $2, $2, 3 + dmtc0 $2, $2, 4 + dmtc0 $2, $2, 5 + dmtc0 $2, $2, 6 + dmtc0 $2, $2, 7 + + dmfc1 $5, $0 + dmfc1 $5, $1 + dmfc1 $5, $2 + dmfc1 $5, $3 + dmfc1 $5, $4 + dmfc1 $5, $5 + dmfc1 $5, $6 + dmfc1 $5, $7 + dmfc1 $5, $8 + dmfc1 $5, $9 + dmfc1 $5, $10 + dmfc1 $5, $11 + dmfc1 $5, $12 + dmfc1 $5, $13 + dmfc1 $5, $14 + dmfc1 $5, $15 + dmfc1 $5, $16 + dmfc1 $5, $17 + dmfc1 $5, $18 + dmfc1 $5, $19 + dmfc1 $5, $20 + dmfc1 $5, $21 + dmfc1 $5, $22 + dmfc1 $5, $23 + dmfc1 $5, $24 + dmfc1 $5, $25 + dmfc1 $5, $26 + dmfc1 $5, $27 + dmfc1 $5, $28 + dmfc1 $5, $29 + dmfc1 $5, $30 + dmfc1 $5, $31 + dmfc1 $5, $f0 + dmfc1 $5, $f1 + dmfc1 $5, $f2 + dmfc1 $5, $f3 + dmfc1 $5, $f4 + dmfc1 $5, $f5 + dmfc1 $5, $f6 + dmfc1 $5, $f7 + dmfc1 $5, $f8 + dmfc1 $5, $f9 + dmfc1 $5, $f10 + dmfc1 $5, $f11 + dmfc1 $5, $f12 + dmfc1 $5, $f13 + dmfc1 $5, $f14 + dmfc1 $5, $f15 + dmfc1 $5, $f16 + dmfc1 $5, $f17 + dmfc1 $5, $f18 + dmfc1 $5, $f19 + dmfc1 $5, $f20 + dmfc1 $5, $f21 + dmfc1 $5, $f22 + dmfc1 $5, $f23 + dmfc1 $5, $f24 + dmfc1 $5, $f25 + dmfc1 $5, $f26 + dmfc1 $5, $f27 + dmfc1 $5, $f28 + dmfc1 $5, $f29 + dmfc1 $5, $f30 + dmfc1 $5, $f31 + + dmtc1 $5, $0 + dmtc1 $5, $1 + dmtc1 $5, $2 + dmtc1 $5, $3 + dmtc1 $5, $4 + dmtc1 $5, $5 + dmtc1 $5, $6 + dmtc1 $5, $7 + dmtc1 $5, $8 + dmtc1 $5, $9 + dmtc1 $5, $10 + dmtc1 $5, $11 + dmtc1 $5, $12 + dmtc1 $5, $13 + dmtc1 $5, $14 + dmtc1 $5, $15 + dmtc1 $5, $16 + dmtc1 $5, $17 + dmtc1 $5, $18 + dmtc1 $5, $19 + dmtc1 $5, $20 + dmtc1 $5, $21 + dmtc1 $5, $22 + dmtc1 $5, $23 + dmtc1 $5, $24 + dmtc1 $5, $25 + dmtc1 $5, $26 + dmtc1 $5, $27 + dmtc1 $5, $28 + dmtc1 $5, $29 + dmtc1 $5, $30 + dmtc1 $5, $31 + dmtc1 $5, $f0 + dmtc1 $5, $f1 + dmtc1 $5, $f2 + dmtc1 $5, $f3 + dmtc1 $5, $f4 + dmtc1 $5, $f5 + dmtc1 $5, $f6 + dmtc1 $5, $f7 + dmtc1 $5, $f8 + dmtc1 $5, $f9 + dmtc1 $5, $f10 + dmtc1 $5, $f11 + dmtc1 $5, $f12 + dmtc1 $5, $f13 + dmtc1 $5, $f14 + dmtc1 $5, $f15 + dmtc1 $5, $f16 + dmtc1 $5, $f17 + dmtc1 $5, $f18 + dmtc1 $5, $f19 + dmtc1 $5, $f20 + dmtc1 $5, $f21 + dmtc1 $5, $f22 + dmtc1 $5, $f23 + dmtc1 $5, $f24 + dmtc1 $5, $f25 + dmtc1 $5, $f26 + dmtc1 $5, $f27 + dmtc1 $5, $f28 + dmtc1 $5, $f29 + dmtc1 $5, $f30 + dmtc1 $5, $f31 + + dmfc2 $2, $0 + dmfc2 $2, $1 + dmfc2 $2, $2 + dmfc2 $2, $3 + dmfc2 $2, $4 + dmfc2 $2, $5 + dmfc2 $2, $6 + dmfc2 $2, $7 + dmfc2 $2, $8 + dmfc2 $2, $9 + dmfc2 $2, $10 + dmfc2 $2, $11 + dmfc2 $2, $12 + dmfc2 $2, $13 + dmfc2 $2, $14 + dmfc2 $2, $15 + dmfc2 $2, $16 + dmfc2 $2, $17 + dmfc2 $2, $18 + dmfc2 $2, $19 + dmfc2 $2, $20 + dmfc2 $2, $21 + dmfc2 $2, $22 + dmfc2 $2, $23 + dmfc2 $2, $24 + dmfc2 $2, $25 + dmfc2 $2, $26 + dmfc2 $2, $27 + dmfc2 $2, $28 + dmfc2 $2, $29 + dmfc2 $2, $30 + dmfc2 $2, $31 +/* + dmfc2 $2, $0, 0 + dmfc2 $2, $0, 1 + dmfc2 $2, $0, 2 + dmfc2 $2, $0, 3 + dmfc2 $2, $0, 4 + dmfc2 $2, $0, 5 + dmfc2 $2, $0, 6 + dmfc2 $2, $0, 7 + dmfc2 $2, $1, 0 + dmfc2 $2, $1, 1 + dmfc2 $2, $1, 2 + dmfc2 $2, $1, 3 + dmfc2 $2, $1, 4 + dmfc2 $2, $1, 5 + dmfc2 $2, $1, 6 + dmfc2 $2, $1, 7 + dmfc2 $2, $2, 0 + dmfc2 $2, $2, 1 + dmfc2 $2, $2, 2 + dmfc2 $2, $2, 3 + dmfc2 $2, $2, 4 + dmfc2 $2, $2, 5 + dmfc2 $2, $2, 6 + dmfc2 $2, $2, 7 +*/ + + dmtc2 $2, $0 + dmtc2 $2, $1 + dmtc2 $2, $2 + dmtc2 $2, $3 + dmtc2 $2, $4 + dmtc2 $2, $5 + dmtc2 $2, $6 + dmtc2 $2, $7 + dmtc2 $2, $8 + dmtc2 $2, $9 + dmtc2 $2, $10 + dmtc2 $2, $11 + dmtc2 $2, $12 + dmtc2 $2, $13 + dmtc2 $2, $14 + dmtc2 $2, $15 + dmtc2 $2, $16 + dmtc2 $2, $17 + dmtc2 $2, $18 + dmtc2 $2, $19 + dmtc2 $2, $20 + dmtc2 $2, $21 + dmtc2 $2, $22 + dmtc2 $2, $23 + dmtc2 $2, $24 + dmtc2 $2, $25 + dmtc2 $2, $26 + dmtc2 $2, $27 + dmtc2 $2, $28 + dmtc2 $2, $29 + dmtc2 $2, $30 + dmtc2 $2, $31 +/* + dmtc2 $2, $0, 0 + dmtc2 $2, $0, 1 + dmtc2 $2, $0, 2 + dmtc2 $2, $0, 3 + dmtc2 $2, $0, 4 + dmtc2 $2, $0, 5 + dmtc2 $2, $0, 6 + dmtc2 $2, $0, 7 + dmtc2 $2, $1, 0 + dmtc2 $2, $1, 1 + dmtc2 $2, $1, 2 + dmtc2 $2, $1, 3 + dmtc2 $2, $1, 4 + dmtc2 $2, $1, 5 + dmtc2 $2, $1, 6 + dmtc2 $2, $1, 7 + dmtc2 $2, $2, 0 + dmtc2 $2, $2, 1 + dmtc2 $2, $2, 2 + dmtc2 $2, $2, 3 + dmtc2 $2, $2, 4 + dmtc2 $2, $2, 5 + dmtc2 $2, $2, 6 + dmtc2 $2, $2, 7 +*/ + + dmult $2, $3 + dmultu $2, $3 + + dmul $2, $3, $4 + dmul $2, $3, 0x12345678 + + dmulo $2, $3, $4 + dmulo $2, $3, 4 + + dmulou $2, $3, $4 + dmulou $2, $3, 4 + + drem $3, $4, 0 + drem $3, $4, 1 + drem $3, $4, -1 + drem $3, $4, 2 + + drem $0, $2, $3 + drem $0, $30, $31 + drem $0, $3 + drem $0, $31 + + drem $3, $4, 0 + drem $3, $4, 1 + drem $3, $4, -1 + drem $3, $4, 2 + + dremu $0, $2, $3 + dremu $0, $30, $31 + dremu $0, $3 + dremu $0, $31 + + dremu $3, $4, 0 + dremu $3, $4, 1 + dremu $3, $4, -1 + dremu $3, $4, 2 + + drol $2, $3, $4 + drol $2, $2, $4 + drol $2, $3, 4 + + dror $2, $3, $4 + dror $2, $3, 4 + dror $2, $3, 36 + + drorv $2, $3, $4 + dror32 $2, $3, 4 + + drotl $2, $3, $4 + drotl $2, $2, $4 + drotl $2, $3, 4 + + drotr $2, $3, $4 + drotr $2, $3, 4 + drotr $2, $3, 36 + + drotrv $2, $3, $4 + drotr32 $2, $3, 4 + + dsbh $2, $3 + dsbh $2, $2 + dsbh $2 + + dshd $2, $3 + dshd $2, $2 + dshd $2 + + dsllv $2, $3, $4 + dsll32 $2, $3, 31 + dsll $2, $3, $4 + dsll $2, $3, 63 + dsll $2, $3, 31 + + dsrav $2, $3, $4 + dsra32 $2, $3, 4 + dsra $2, $3, $4 + dsra $2, $3, 36 + dsra $2, $3, 4 + + dsrlv $2, $3, $4 + dsrl32 $2, $3, 31 + dsrl $2, $3, $4 + dsrl $2, $3, 36 + dsrl $2, $3, 4 + + dsub $2, $3, $4 + dsub $29, $30, $31 + dsub $2, $2, $3 + dsub $2, $3 + + dsubu $2, $3, $4 + dsubu $29, $30, $31 + dsubu $2, $2, $3 + dsubu $2, $3 + + dsubu $2, $3, 0x1234 + dsubu $2, $3, 0x12345678 + + dsub $2, $3, 0 + dsub $2, $3, 1 + dsub $2, $3, 512 + dsub $2, $3, -511 + dsub $2, $3, -32768 + dsub $2, $3, 32767 + dsub $2, $3, 65535 + dsub $2, $3, 0x12345678 + dsub $2, $3, 0x8888111112345678 + + .set push + .set noreorder + .set nomacro + ld $2, 0 + ld $2, 4 + ld $2, ($0) + ld $2, 0($0) + ld $2, 4($0) + ld $2, 4($3) + ld $2, -32768($3) + ld $2, 32767($3) + .set pop + + ldl $2, 0 + ldl $2, 4 + ldl $2, ($0) + ldl $2, 0($0) + ldl $2, 4($0) + ldl $2, 4($3) + ldl $2, -512($3) + ldl $2, 511($3) + ldl $2, -32768($3) + ldl $2, 0x12345678($3) + + ldr $2, 0 + ldr $2, 4 + ldr $2, ($0) + ldr $2, 0($0) + ldr $2, 4($0) + ldr $2, 4($3) + ldr $2, -512($3) + ldr $2, 511($3) + ldr $2, -32768($3) + ldr $2, 0x12345678($3) + + lld $2, 0 + lld $2, 4 + lld $2, ($0) + lld $2, 0($0) + lld $2, 4($0) + lld $2, 4($3) + lld $2, -512($3) + lld $2, 511($3) + lld $2, -32768($3) + lld $2, 0x12345678($3) + + lwu $2, 0 + lwu $2, 4 + lwu $2, ($0) + lwu $2, 0($0) + lwu $2, 4($0) + lwu $2, 4($3) + lwu $2, -512($3) + lwu $2, 511($3) + lwu $2, -32768($3) + lwu $2, 0x12345678($3) + + scd $2, 0 + scd $2, 4 + scd $2, ($0) + scd $2, 0($0) + scd $2, 4($0) + scd $2, 4($3) + scd $2, -512($3) + scd $2, 511($3) + scd $2, -32768($3) + scd $2, 0x12345678($3) + + .set push + .set noreorder + .set nomacro + sd $2, 0 + sd $2, 4 + sd $2, ($0) + sd $2, 0($0) + sd $2, 4($0) + sd $2, 4($3) + sd $2, -32768($3) + sd $2, 32767($3) + .set pop + + sdl $2, 0 + sdl $2, 4 + sdl $2, ($0) + sdl $2, 0($0) + sdl $2, 4($0) + sdl $2, 4($3) + sdl $2, -32768($3) + sdl $2, 32767($3) + sdl $2, 0x12345678($3) + + sdr $2, 0 + sdr $2, 4 + sdr $2, ($0) + sdr $2, 0($0) + sdr $2, 4($0) + sdr $2, 4($3) + sdr $2, -32768($3) + sdr $2, 32767($3) + sdr $2, 0x12345678($3) + + ldm $s0, 0 + ldm $s0, 4 + ldm $s0, ($5) + ldm $s0, 2047($5) + ldm $s0-$s1, 2047($5) + ldm $s0-$s2, 2047($5) + ldm $s0-$s3, 2047($5) + ldm $s0-$s4, 2047($5) + ldm $s0-$s5, 2047($5) + ldm $s0-$s6, 2047($5) + ldm $s0-$s7, 2047($5) + ldm $s0-$s8, 2047($5) + ldm $ra, 2047($5) + ldm $s0,$ra, ($5) + ldm $s0-$s1,$ra, ($5) + ldm $s0-$s2,$ra, ($5) + ldm $s0-$s3,$ra, ($5) + ldm $s0-$s4,$ra, ($5) + ldm $s0-$s5,$ra, ($5) + ldm $s0-$s6,$ra, ($5) + ldm $s0-$s7,$ra, ($5) + ldm $s0-$s8,$ra, ($5) + ldm $s0, -32768($0) + ldm $s0, 32767($0) + ldm $s0, 0($0) + ldm $s0, 65535($0) + ldm $s0, -32768($29) + ldm $s0, 32767($29) + ldm $s0, 0($29) + ldm $s0, 65535($29) + ldm $s0, 0x12345678($29) + + ldp $2, 0 + ldp $2, 4 + ldp $2, ($29) + ldp $2, 0($29) + ldp $2, -2048($3) + ldp $2, 2047($3) + ldp $2, -32768($3) + ldp $2, 32767($3) + ldp $2, 0($3) + ldp $2, 65535($3) + ldp $2, -32768($0) + ldp $2, 32767($0) + ldp $2, 65535($0) + ldp $2, 0x12345678($0) + + sdm $s0, 0 + sdm $s0, 4 + sdm $s0, ($5) + sdm $s0, 2047($5) + sdm $s0-$s1, 2047($5) + sdm $s0-$s2, 2047($5) + sdm $s0-$s3, 2047($5) + sdm $s0-$s4, 2047($5) + sdm $s0-$s5, 2047($5) + sdm $s0-$s6, 2047($5) + sdm $s0-$s7, 2047($5) + sdm $s0-$s8, 2047($5) + sdm $ra, 2047($5) + sdm $s0,$ra, ($5) + sdm $s0-$s1,$ra, ($5) + sdm $s0-$s2,$ra, ($5) + sdm $s0-$s3,$ra, ($5) + sdm $s0-$s4,$ra, ($5) + sdm $s0-$s5,$ra, ($5) + sdm $s0-$s6,$ra, ($5) + sdm $s0-$s7,$ra, ($5) + sdm $s0-$s8,$ra, ($5) + sdm $s0, -32768($0) + sdm $s0, 32767($0) + sdm $s0, 0($0) + sdm $s0, 65535($0) + sdm $s0, -32768($29) + sdm $s0, 32767($29) + sdm $s0, 0($29) + sdm $s0, 65535($29) + sdm $s0, 0x12345678($29) + + sdp $2, 0 + sdp $2, 4 + sdp $2, ($29) + sdp $2, 0($29) + sdp $2, -2048($3) + sdp $2, 2047($3) + sdp $2, -32768($3) + sdp $2, 32767($3) + sdp $2, 0($3) + sdp $2, 65535($3) + sdp $2, -32768($0) + sdp $2, 32767($0) + sdp $2, 65535($0) + sdp $2, 0x12345678($0) + + uld $3, 0 + uld $3, ($0) + uld $3, 4 + uld $3, 4($0) + uld $3, 2047 + uld $3, -2048 + uld $3, 2048 + uld $3, -2049 + uld $3, 32753($0) + uld $3, -32768($0) + uld $3, 65535($0) + uld $3, 0xffff0000($0) + uld $3, 0xffff8000($0) + uld $3, 0xffff0001($0) + uld $3, 0xffff8001($0) + uld $3, 0xf0000000($0) + uld $3, 0xffffffff($0) + uld $3, 0x12345678($0) + uld $3, 0($4) + uld $3, 4($4) + uld $3, 2047($4) + uld $3, -2048($4) + uld $3, 2048($4) + uld $3, -2049($4) + uld $3, 32753($4) + uld $3, -32768($4) + uld $3, 65535($4) + uld $3, 0xffff0000($4) + uld $3, 0xffff8000($4) + uld $3, 0xffff0001($4) + uld $3, 0xffff8001($4) + uld $3, 0xf0000000($4) + uld $3, 0xffffffff($4) + uld $3, 0x12345678($4) + + usd $3, 0 + usd $3, ($0) + usd $3, 4 + usd $3, 4($0) + usd $3, 2047 + usd $3, -2048 + usd $3, 2048 + usd $3, -2049 + usd $3, 32753($0) + usd $3, -32768($0) + usd $3, 65535($0) + usd $3, 0xffff0000($0) + usd $3, 0xffff8000($0) + usd $3, 0xffff0001($0) + usd $3, 0xffff8001($0) + usd $3, 0xf0000000($0) + usd $3, 0xffffffff($0) + usd $3, 0x12345678($0) + usd $3, 0($4) + usd $3, 4($4) + usd $3, 2047($4) + usd $3, -2048($4) + usd $3, 2048($4) + usd $3, -2049($4) + usd $3, 32753($4) + usd $3, -32768($4) + usd $3, 65535($4) + usd $3, 0xffff0000($4) + usd $3, 0xffff8000($4) + usd $3, 0xffff0001($4) + usd $3, 0xffff8001($4) + usd $3, 0xf0000000($4) + usd $3, 0xffffffff($4) + usd $3, 0x12345678($4) + + ldl $16, %lo(test)($3) + ldr $16, %lo(test)($3) + lld $16, %lo(test)($3) + lwu $16, %lo(test)($3) + scd $16, %lo(test)($3) + sdl $16, %lo(test)($3) + sdr $16, %lo(test)($3) + ldm $16, %lo(test)($3) + ldp $16, %lo(test)($3) + sdm $16, %lo(test)($3) + sdp $16, %lo(test)($3) + ldc2 $16, %lo(test)($3) + sdc2 $16, %lo(test)($3) + + .end test_mips64 + + .set reorder + .ent test_delay_slot +test_delay_slot: + bal test_delay_slot + bgezal $3, test_delay_slot + bltzal $3, test_delay_slot + bgezall $3, test_delay_slot + bltzall $3, test_delay_slot + jal test_delay_slot + jalx test_delay_slot + jalr16 $2 + jalr32 $2 + jr16 $2 + jr32 $2 + jalr.hb $2 + jr.hb $2 + + jals test_delay_slot + jalrs16 $2 + jalrs32 $2 + jrs $2 + jalrs.hb $2 + jrs.hb $2 + + .end test_delay_slot + + .set noreorder + .ent test_spec102 +test_spec102: + lw $2, -64<<2 ($28) + lw $3, -64<<2 ($28) + lw $4, -64<<2 ($28) + lw $5, -64<<2 ($28) + lw $6, -64<<2 ($28) + lw $7, -64<<2 ($28) + lw $16, -64<<2 ($28) + lw $17, -64<<2 ($28) + lw $17, -63<<2 ($28) + lw $17, -1<<2 ($28) + lw $17, 0<<2 ($28) + lw $17, 1<<2 ($28) + lw $17, 62<<2 ($28) + lw $17, 63<<2 ($28) + lw $17, 64<<2 ($28) + lw $17, -65<<2 ($28) + lw $17, 1 ($28) + lw $17, 2 ($28) + lw $17, 3 ($28) + lw $17, -1 ($28) + lw $17, -2 ($28) + lw $17, -3 ($28) + lw $17, 0 ($27) + + addiu $2, $pc, 0 + addiu $3, $pc, 0 + addiu $4, $pc, 0 + addiu $5, $pc, 0 + addiu $6, $pc, 0 + addiu $7, $pc, 0 + addiu $16, $pc, 0 + addiu $17, $pc, 0 + addiu $17, $pc, 4194303 << 2 + addiu $17, $pc, -4194304 << 2 + addiupc $2, 0 + addiupc $3, 0 + addiupc $4, 0 + addiupc $5, 0 + addiupc $6, 0 + addiupc $7, 0 + addiupc $16, 0 + addiupc $17, 0 + addiupc $17, 4194303 << 2 + addiupc $17, -4194304 << 2 + + .end test_spec102 + + .set noreorder + .ent test_spec107 +test_spec107: + movep $5, $6, $0, $0 + movep $5, $7, $0, $0 + movep $6, $7, $0, $0 + movep $4, $21, $0, $0 + movep $4, $22, $0, $0 + movep $4, $5, $0, $0 + movep $4, $6, $0, $0 + movep $4, $7, $0, $0 + movep $4, $7, $17, $0 + movep $4, $7, $2, $0 + movep $4, $7, $3, $0 + movep $4, $7, $16, $0 + movep $4, $7, $18, $0 + movep $4, $7, $19, $0 + movep $4, $7, $20, $0 + movep $4, $7, $20, $17 + movep $4, $7, $20, $2 + movep $4, $7, $20, $3 + movep $4, $7, $20, $16 + movep $4, $7, $20, $18 + movep $4, $7, $20, $19 + movep $4, $7, $20, $20 + bals test_spec107 + nop + bgezals $2, test_spec107 + nop + bltzals $2, test_spec107 + nop + bal test_spec107 + nop + bgezal $2, test_spec107 + nop + bltzal $2, test_spec107 + nop + + .end test_spec107 diff --git a/gas/testsuite/gas/mips/micromips@abs.d b/gas/testsuite/gas/mips/micromips@abs.d new file mode 100644 index 0000000..de05e5b --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@abs.d @@ -0,0 +1,19 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS abs +#source: abs.s +#as: -32 + +# Test the abs macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 4044 fffe bgez a0,[0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0080 2190 neg a0,a0 +[0-9a-f]+ <[^>]*> 4045 fffe bgez a1,[0-9a-f]+ <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c85 move a0,a1 +[0-9a-f]+ <[^>]*> 00a0 2190 neg a0,a1 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@add.d b/gas/testsuite/gas/mips/micromips@add.d new file mode 100644 index 0000000..ea36af5 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@add.d @@ -0,0 +1,23 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS add +#source: add.s +#as: -32 + +# Test the add macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 1084 0000 addi a0,a0,0 +[0-9a-f]+ <[^>]*> 1084 0001 addi a0,a0,1 +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 0024 2110 add a0,a0,at +[0-9a-f]+ <[^>]*> 1084 8000 addi a0,a0,-32768 +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 0024 2110 add a0,a0,at +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 5021 a5a5 ori at,at,0xa5a5 +[0-9a-f]+ <[^>]*> 0024 2110 add a0,a0,at +[0-9a-f]+ <[^>]*> 3084 0001 addiu a0,a0,1 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c00 nop diff --git a/gas/testsuite/gas/mips/micromips@alnv_ps-swap.d b/gas/testsuite/gas/mips/micromips@alnv_ps-swap.d new file mode 100644 index 0000000..2fbe526 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@alnv_ps-swap.d @@ -0,0 +1,57 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ALNV.PS instruction branch swapping +#as: -32 +#source: alnv_ps-swap.s + +# Check that a register dependency between ALNV.PS and the following +# branch prevents from branch swapping (microMIPS). + +# Note that currently swapping of ALNV.PS in microMIPS code is disabled +# altogether. + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1 +([0-9a-f]+) <[^>]*> cfff b \1 +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 foo +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1 +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 foo +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1 +([0-9a-f]+) <[^>]*> 4023 fffe bltzal v1,\1 +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 foo +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1 +[0-9a-f]+ <[^>]*> 45c3 jalr v1 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1 +[0-9a-f]+ <[^>]*> 0083 0f3c jalr a0,v1 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 5402 20d9 alnv\.ps \$f4,\$f2,\$f0,v1 +[0-9a-f]+ <[^>]*> 007f 0f3c jalr v1,ra +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra +([0-9a-f]+) <[^>]*> cfff b \1 +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 foo +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra +([0-9a-f]+) <[^>]*> 4060 fffe bal \1 +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 foo +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra +([0-9a-f]+) <[^>]*> 4023 fffe bltzal v1,\1 +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 foo +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra +[0-9a-f]+ <[^>]*> 45c3 jalr v1 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra +[0-9a-f]+ <[^>]*> 0083 0f3c jalr a0,v1 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 5402 27d9 alnv\.ps \$f4,\$f2,\$f0,ra +[0-9a-f]+ <[^>]*> 007f 0f3c jalr v1,ra +[0-9a-f]+ <[^>]*> 0000 0000 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@and.d b/gas/testsuite/gas/mips/micromips@and.d new file mode 100644 index 0000000..98a83c7 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@and.d @@ -0,0 +1,36 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS and +#source: and.s +#as: -32 + +# Test the and macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> d084 0000 andi a0,a0,0x0 +[0-9a-f]+ <[^>]*> d084 0001 andi a0,a0,0x1 +[0-9a-f]+ <[^>]*> d084 8000 andi a0,a0,0x8000 +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 0024 2250 and a0,a0,at +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 0024 2250 and a0,a0,at +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 5021 a5a5 ori at,at,0xa5a5 +[0-9a-f]+ <[^>]*> 0024 2250 and a0,a0,at +[0-9a-f]+ <[^>]*> 5085 0000 ori a0,a1,0x0 +[0-9a-f]+ <[^>]*> 0004 22d0 not a0,a0 +[0-9a-f]+ <[^>]*> 5085 0001 ori a0,a1,0x1 +[0-9a-f]+ <[^>]*> 0004 22d0 not a0,a0 +[0-9a-f]+ <[^>]*> 5085 8000 ori a0,a1,0x8000 +[0-9a-f]+ <[^>]*> 0004 22d0 not a0,a0 +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 0025 22d0 nor a0,a1,at +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 0025 22d0 nor a0,a1,at +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 5021 a5a5 ori at,at,0xa5a5 +[0-9a-f]+ <[^>]*> 0025 22d0 nor a0,a1,at +[0-9a-f]+ <[^>]*> 5085 0000 ori a0,a1,0x0 +[0-9a-f]+ <[^>]*> 7085 0000 xori a0,a1,0x0 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@beq.d b/gas/testsuite/gas/mips/micromips@beq.d new file mode 100644 index 0000000..9f099e5 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@beq.d @@ -0,0 +1,49 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS beq +#source: beq.s +#as: -32 + +# Test the beq macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 94a4 fffe beq a0,a1,0+0000 + 0: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9404 fffe beqz a0,0+0006 + 6: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 3020 0001 li at,1 +[0-9a-f]+ <[^>]*> 9424 fffe beq a0,at,0+0010 + 10: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 9424 fffe beq a0,at,0+001a + 1a: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 9424 fffe beq a0,at,0+0024 + 24: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 9424 fffe beq a0,at,0+002e + 2e: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 5021 a5a5 ori at,at,0xa5a5 +[0-9a-f]+ <[^>]*> 9424 fffe beq a0,at,0+003c + 3c: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> b404 fffe bnez a0,0+0042 + 42: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. +[0-9a-f]+ <[^>]*> 9400 fffe b 00020048 + 20048: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0002004e + 2004e: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@bge.d b/gas/testsuite/gas/mips/micromips@bge.d new file mode 100644 index 0000000..ac8643f --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@bge.d @@ -0,0 +1,72 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS bge +#source: bge.s +#as: -32 + +# Test the bge macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 00a4 0b50 slt at,a0,a1 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0004 + 4: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4044 fffe bgez a0,0+000a + a: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4085 fffe blez a1,0+0010 + 10: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4044 fffe bgez a0,0+0016 + 16: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 40c4 fffe bgtz a0,0+001c + 1c: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9024 0002 slti at,a0,2 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0026 + 26: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 0024 0b50 slt at,a0,at +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0034 + 34: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9024 8000 slti at,a0,-32768 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+003e + 3e: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 0024 0b50 slt at,a0,at +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+004c + 4c: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 5021 a5a5 ori at,at,0xa5a5 +[0-9a-f]+ <[^>]*> 0024 0b50 slt at,a0,at +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+005e + 5e: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b50 slt at,a1,a0 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0068 + 68: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 40c4 fffe bgtz a0,0+006e + 6e: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4005 fffe bltz a1,0+0074 + 74: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 40c4 fffe bgtz a0,0+007a + 7a: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b50 slt at,a0,a1 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0084 + 84: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b50 slt at,a1,a0 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+008e + 8e: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@bgeu.d b/gas/testsuite/gas/mips/micromips@bgeu.d new file mode 100644 index 0000000..c8f08fe --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@bgeu.d @@ -0,0 +1,64 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS bgeu +#source: bgeu.s +#as: -32 + +# Test the bgeu macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 00a4 0b90 sltu at,a0,a1 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0004 + 4: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 94a0 fffe beq zero,a1,0+000a + a: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> b404 fffe bnez a0,0+0010 + 10: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> b024 0002 sltiu at,a0,2 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+001a + 1a: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 0024 0b90 sltu at,a0,at +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0028 + 28: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> b024 8000 sltiu at,a0,-32768 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0032 + 32: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 0024 0b90 sltu at,a0,at +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0040 + 40: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 5021 a5a5 ori at,at,0xa5a5 +[0-9a-f]+ <[^>]*> 0024 0b90 sltu at,a0,at +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0052 + 52: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b90 sltu at,a1,a0 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+005c + 5c: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> b404 fffe bnez a0,0+0062 + 62: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> b404 fffe bnez a0,0+0068 + 68: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b90 sltu at,a0,a1 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0072 + 72: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b90 sltu at,a1,a0 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+007c + 7c: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@blt.d b/gas/testsuite/gas/mips/micromips@blt.d new file mode 100644 index 0000000..7e5db7c --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@blt.d @@ -0,0 +1,72 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS blt +#source: blt.s +#as: -32 + +# Test the blt macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 00a4 0b50 slt at,a0,a1 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0004 + 4: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4004 fffe bltz a0,0+000a + a: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 40c5 fffe bgtz a1,0+0010 + 10: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4004 fffe bltz a0,0+0016 + 16: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4084 fffe blez a0,0+001c + 1c: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9024 0002 slti at,a0,2 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0026 + 26: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 0024 0b50 slt at,a0,at +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0034 + 34: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9024 8000 slti at,a0,-32768 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+003e + 3e: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 0024 0b50 slt at,a0,at +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+004c + 4c: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 5021 a5a5 ori at,at,0xa5a5 +[0-9a-f]+ <[^>]*> 0024 0b50 slt at,a0,at +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+005e + 5e: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b50 slt at,a1,a0 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0068 + 68: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4084 fffe blez a0,0+006e + 6e: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4045 fffe bgez a1,0+0074 + 74: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4084 fffe blez a0,0+007a + 7a: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b50 slt at,a0,a1 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0084 + 84: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b50 slt at,a1,a0 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+008e + 8e: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@bltu.d b/gas/testsuite/gas/mips/micromips@bltu.d new file mode 100644 index 0000000..45f5c24 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@bltu.d @@ -0,0 +1,64 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS bltu +#source: bltu.s +#as: -32 + +# Test the bltu macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 00a4 0b90 sltu at,a0,a1 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0004 + 4: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> b4a0 fffe bne zero,a1,0+000a + a: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9404 fffe beqz a0,0+0010 + 10: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> b024 0002 sltiu at,a0,2 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+001a + 1a: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 0024 0b90 sltu at,a0,at +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0028 + 28: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> b024 8000 sltiu at,a0,-32768 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0032 + 32: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 0024 0b90 sltu at,a0,at +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0040 + 40: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 5021 a5a5 ori at,at,0xa5a5 +[0-9a-f]+ <[^>]*> 0024 0b90 sltu at,a0,at +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0052 + 52: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b90 sltu at,a1,a0 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+005c + 5c: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9404 fffe beqz a0,0+0062 + 62: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9404 fffe beqz a0,0+0068 + 68: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b90 sltu at,a0,a1 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0072 + 72: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b90 sltu at,a1,a0 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+007c + 7c: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@branch-likely.d b/gas/testsuite/gas/mips/micromips@branch-likely.d new file mode 100644 index 0000000..1b668f1 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@branch-likely.d @@ -0,0 +1,87 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS branch-likely instructions +#source: branch-likely.s +#as: -32 + +# Check branch-likely instructions (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 9404 fffe beqz a0,0+0000 + 0: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> b404 fffe bnez a0,0+0006 + 6: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9404 fffe beqz a0,0+000c + c: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> b404 fffe bnez a0,0+0012 + 12: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b50 slt at,a0,a1 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+001c + 1c: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b50 slt at,a1,a0 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0026 + 26: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b50 slt at,a0,a1 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0030 + 30: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b50 slt at,a1,a0 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+003a + 3a: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b90 sltu at,a0,a1 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0044 + 44: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b90 sltu at,a1,a0 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+004e + 4e: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b90 sltu at,a0,a1 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0058 + 58: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b90 sltu at,a1,a0 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0062 + 62: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b50 slt at,a0,a1 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+006c + 6c: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b50 slt at,a1,a0 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+0076 + 76: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b50 slt at,a0,a1 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0080 + 80: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b50 slt at,a1,a0 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+008a + 8a: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b90 sltu at,a0,a1 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+0094 + 94: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b90 sltu at,a1,a0 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+009e + 9e: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 00a4 0b90 sltu at,a0,a1 +[0-9a-f]+ <[^>]*> b401 fffe bnez at,0+00a8 + a8: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0085 0b90 sltu at,a1,a0 +[0-9a-f]+ <[^>]*> 9401 fffe beqz at,0+00b2 + b2: R_MICROMIPS_PC16_S1 external_label +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@branch-misc-1.d b/gas/testsuite/gas/mips/micromips@branch-misc-1.d new file mode 100644 index 0000000..190e2d5 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@branch-misc-1.d @@ -0,0 +1,35 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS branch-misc-1 +#source: branch-misc-1.s +#as: -32 + +# Test the branches to local symbols in current file (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: + \.\.\. + \.\.\. + \.\.\. +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+003c + 3c: R_MICROMIPS_PC16_S1 l1 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0044 + 44: R_MICROMIPS_PC16_S1 l2 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+004c + 4c: R_MICROMIPS_PC16_S1 l3 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0054 + 54: R_MICROMIPS_PC16_S1 l4 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+005c + 5c: R_MICROMIPS_PC16_S1 l5 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0064 + 64: R_MICROMIPS_PC16_S1 l6 +[0-9a-f]+ <[^>]*> 0000 0000 nop + \.\.\. + \.\.\. + \.\.\. + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@branch-misc-2-64.d b/gas/testsuite/gas/mips/micromips@branch-misc-2-64.d new file mode 100644 index 0000000..3a265b1 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@branch-misc-2-64.d @@ -0,0 +1,63 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS branch-misc-2-64 +#source: branch-misc-2.s +#as: -64 -non_shared + +# Test the backward branches to global symbols in current file (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: + \.\.\. + \.\.\. + \.\.\. +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0040 + 3c: R_MICROMIPS_PC16_S1 g1\+0xf+fffc + 3c: R_MIPS_NONE \*ABS\*\+0xf+fffc + 3c: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0048 + 44: R_MICROMIPS_PC16_S1 g2\+0xf+fffc + 44: R_MIPS_NONE \*ABS\*\+0xf+fffc + 44: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0050 + 4c: R_MICROMIPS_PC16_S1 g3\+0xf+fffc + 4c: R_MIPS_NONE \*ABS\*\+0xf+fffc + 4c: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0058 + 54: R_MICROMIPS_PC16_S1 g4\+0xf+fffc + 54: R_MIPS_NONE \*ABS\*\+0xf+fffc + 54: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0060 + 5c: R_MICROMIPS_PC16_S1 g5\+0xf+fffc + 5c: R_MIPS_NONE \*ABS\*\+0xf+fffc + 5c: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0068 + 64: R_MICROMIPS_PC16_S1 g6\+0xf+fffc + 64: R_MIPS_NONE \*ABS\*\+0xf+fffc + 64: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop + \.\.\. + \.\.\. + \.\.\. +[0-9a-f]+ <[^>]*> 9400 0000 b 0+00ac + a8: R_MICROMIPS_PC16_S1 x1\+0xf+fffc + a8: R_MIPS_NONE \*ABS\*\+0xf+fffc + a8: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 0000 b 0+00b2 + ae: R_MICROMIPS_PC16_S1 x2\+0xf+fffc + ae: R_MIPS_NONE \*ABS\*\+0xf+fffc + ae: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 0000 b 0+00b8 + b4: R_MICROMIPS_PC16_S1 \.data\+0xf+fffc + b4: R_MIPS_NONE \*ABS\*\+0xf+fffc + b4: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@branch-misc-2.d b/gas/testsuite/gas/mips/micromips@branch-misc-2.d new file mode 100644 index 0000000..1dcc8db --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@branch-misc-2.d @@ -0,0 +1,45 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS branch-misc-2 +#source: branch-misc-2.s +#as: -32 -non_shared + +# Test the backward branches to global symbols in current file (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: + \.\.\. + \.\.\. + \.\.\. +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+003c + 3c: R_MICROMIPS_PC16_S1 g1 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0044 + 44: R_MICROMIPS_PC16_S1 g2 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+004c + 4c: R_MICROMIPS_PC16_S1 g3 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0054 + 54: R_MICROMIPS_PC16_S1 g4 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+005c + 5c: R_MICROMIPS_PC16_S1 g5 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0064 + 64: R_MICROMIPS_PC16_S1 g6 +[0-9a-f]+ <[^>]*> 0000 0000 nop + \.\.\. + \.\.\. + \.\.\. +[0-9a-f]+ <[^>]*> 9400 fffe b 0+00a8 + a8: R_MICROMIPS_PC16_S1 x1 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 fffe b 0+00ae + ae: R_MICROMIPS_PC16_S1 x2 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 fffe b 0+00b4 + b4: R_MICROMIPS_PC16_S1 \.Ldata +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@branch-misc-2pic-64.d b/gas/testsuite/gas/mips/micromips@branch-misc-2pic-64.d new file mode 100644 index 0000000..609daa4 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@branch-misc-2pic-64.d @@ -0,0 +1,63 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS branch-misc-2pic-64 +#source: branch-misc-2.s +#as: -64 -call_shared + +# Test the backward branches to global symbols in current file (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: + \.\.\. + \.\.\. + \.\.\. +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0040 + 3c: R_MICROMIPS_PC16_S1 g1\+0xf+fffc + 3c: R_MIPS_NONE \*ABS\*\+0xf+fffc + 3c: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0048 + 44: R_MICROMIPS_PC16_S1 g2\+0xf+fffc + 44: R_MIPS_NONE \*ABS\*\+0xf+fffc + 44: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0050 + 4c: R_MICROMIPS_PC16_S1 g3\+0xf+fffc + 4c: R_MIPS_NONE \*ABS\*\+0xf+fffc + 4c: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0058 + 54: R_MICROMIPS_PC16_S1 g4\+0xf+fffc + 54: R_MIPS_NONE \*ABS\*\+0xf+fffc + 54: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0060 + 5c: R_MICROMIPS_PC16_S1 g5\+0xf+fffc + 5c: R_MIPS_NONE \*ABS\*\+0xf+fffc + 5c: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0068 + 64: R_MICROMIPS_PC16_S1 g6\+0xf+fffc + 64: R_MIPS_NONE \*ABS\*\+0xf+fffc + 64: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0000 0000 nop + \.\.\. + \.\.\. + \.\.\. +[0-9a-f]+ <[^>]*> 9400 0000 b 0+00ac + a8: R_MICROMIPS_PC16_S1 x1\+0xf+fffc + a8: R_MIPS_NONE \*ABS\*\+0xf+fffc + a8: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 0000 b 0+00b2 + ae: R_MICROMIPS_PC16_S1 x2\+0xf+fffc + ae: R_MIPS_NONE \*ABS\*\+0xf+fffc + ae: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 0000 b 0+00b8 + b4: R_MICROMIPS_PC16_S1 \.data\+0xf+fffc + b4: R_MIPS_NONE \*ABS\*\+0xf+fffc + b4: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@branch-misc-2pic.d b/gas/testsuite/gas/mips/micromips@branch-misc-2pic.d new file mode 100644 index 0000000..f9ecd03 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@branch-misc-2pic.d @@ -0,0 +1,45 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS branch-misc-2pic +#source: branch-misc-2.s +#as: -32 -call_shared + +# Test the backward branches to global symbols in current file (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: + \.\.\. + \.\.\. + \.\.\. +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+003c + 3c: R_MICROMIPS_PC16_S1 g1 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0044 + 44: R_MICROMIPS_PC16_S1 g2 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+004c + 4c: R_MICROMIPS_PC16_S1 g3 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0054 + 54: R_MICROMIPS_PC16_S1 g4 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+005c + 5c: R_MICROMIPS_PC16_S1 g5 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 4060 fffe bal 0+0064 + 64: R_MICROMIPS_PC16_S1 g6 +[0-9a-f]+ <[^>]*> 0000 0000 nop + \.\.\. + \.\.\. + \.\.\. +[0-9a-f]+ <[^>]*> 9400 fffe b 0+00a8 + a8: R_MICROMIPS_PC16_S1 x1 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 fffe b 0+00ae + ae: R_MICROMIPS_PC16_S1 x2 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 fffe b 0+00b4 + b4: R_MICROMIPS_PC16_S1 \.Ldata +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@branch-misc-4-64.d b/gas/testsuite/gas/mips/micromips@branch-misc-4-64.d new file mode 100644 index 0000000..80cfce9 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@branch-misc-4-64.d @@ -0,0 +1,35 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS branch-misc-4-64 +#as: -64 +#source: branch-misc-4.s + +# Verify PC-relative relocations do not overflow (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: + \.\.\. +[0-9a-f]+ <[^>]*> 9400 0000 b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar\+0xf+fffc +[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc +[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 0000 b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \.init\+0x2 +[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2 +[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2 +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. + +Disassembly of section \.init: +[0-9a-f]+ <[^>]*> 9400 0000 b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 foo\+0xf+fffc +[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc +[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 0000 b [0-9a-f]+ +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \.text\+0x40002 +[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x40002 +[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x40002 +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@branch-misc-4.d b/gas/testsuite/gas/mips/micromips@branch-misc-4.d new file mode 100644 index 0000000..ecf5b98 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@branch-misc-4.d @@ -0,0 +1,27 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS branch-misc-4 +#as: -32 +#source: branch-misc-4.s + +# Verify PC-relative relocations do not overflow (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: + \.\.\. +([0-9a-f]+) <[^>]*> 9400 fffe b \1 +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 9400 fffe b \1 <\.Lfoo> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \.Lbar +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. + +Disassembly of section \.init: +([0-9a-f]+) <[^>]*> 9400 fffe b \1 +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 foo +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 9400 fffe b \1 <\.Lbar> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \.Lfoo +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@branch-self.d b/gas/testsuite/gas/mips/micromips@branch-self.d new file mode 100644 index 0000000..60751a3 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@branch-self.d @@ -0,0 +1,36 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS branches to self +#as: -32 +#source: branch-self.s + +# Test various ways to request a branch to self (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +([0-9a-f]+) <[^>]*> e930 sw v0,0\(v1\) +([0-9a-f]+) <[^>]*> cfff b \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> e930 sw v0,0\(v1\) +([0-9a-f]+) <[^>]*> cfff b \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> e930 sw v0,0\(v1\) +([0-9a-f]+) <[^>]*> cfff b \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> e930 sw v0,0\(v1\) +([0-9a-f]+) <[^>]*> cfff b \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> e930 sw v0,0\(v1\) +([0-9a-f]+) <[^>]*> cfff b \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> e930 sw v0,0\(v1\) +([0-9a-f]+) <[^>]*> cfff b \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .* +([0-9a-f]+) <[^>]*> 0c00 nop + \.\.\. + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@cache.d b/gas/testsuite/gas/mips/micromips@cache.d new file mode 100644 index 0000000..eb3964a --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@cache.d @@ -0,0 +1,38 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS CACHE instruction +#as: -32 --defsym micromips=1 +#source: cache.s + +# Check MIPS CACHE instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 20a2 67ff cache 0x5,2047\(v0\) +[0-9a-f]+ <[^>]*> 20a3 6800 cache 0x5,-2048\(v1\) +[0-9a-f]+ <[^>]*> 3020 1000 li at,4096 +[0-9a-f]+ <[^>]*> 0081 0950 addu at,at,a0 +[0-9a-f]+ <[^>]*> 20a1 6800 cache 0x5,-2048\(at\) +[0-9a-f]+ <[^>]*> 3020 f000 li at,-4096 +[0-9a-f]+ <[^>]*> 00a1 0950 addu at,at,a1 +[0-9a-f]+ <[^>]*> 20a1 67ff cache 0x5,2047\(at\) +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 00c1 0950 addu at,at,a2 +[0-9a-f]+ <[^>]*> 20a1 6fff cache 0x5,-1\(at\) +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 00e1 0950 addu at,at,a3 +[0-9a-f]+ <[^>]*> 20a1 6000 cache 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 0101 0950 addu at,at,t0 +[0-9a-f]+ <[^>]*> 20a1 6000 cache 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 0121 0950 addu at,at,t1 +[0-9a-f]+ <[^>]*> 20a1 6fff cache 0x5,-1\(at\) +[0-9a-f]+ <[^>]*> 5020 9000 li at,0x9000 +[0-9a-f]+ <[^>]*> 0141 0950 addu at,at,t2 +[0-9a-f]+ <[^>]*> 20a1 6000 cache 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 41a1 ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 5021 7000 ori at,at,0x7000 +[0-9a-f]+ <[^>]*> 0161 0950 addu at,at,t3 +[0-9a-f]+ <[^>]*> 20a1 6fff cache 0x5,-1\(at\) + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@daddi.d b/gas/testsuite/gas/mips/micromips@daddi.d new file mode 100644 index 0000000..c79bfab --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@daddi.d @@ -0,0 +1,31 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS DADDI instruction +#as: -32 --defsym micromips=1 +#source: daddi.s + +# Check MIPS DADDI instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 5862 7fdc daddi v1,v0,511 +[0-9a-f]+ <[^>]*> 58a4 801c daddi a1,a0,-512 +[0-9a-f]+ <[^>]*> 3020 0200 li at,512 +[0-9a-f]+ <[^>]*> 5826 3910 dadd a3,a2,at +[0-9a-f]+ <[^>]*> 3020 fdff li at,-513 +[0-9a-f]+ <[^>]*> 5828 4910 dadd t1,t0,at +[0-9a-f]+ <[^>]*> 3020 7fff li at,32767 +[0-9a-f]+ <[^>]*> 582a 5910 dadd t3,t2,at +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 582c 6910 dadd t5,t4,at +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 582e 7910 dadd t7,t6,at +[0-9a-f]+ <[^>]*> 41a1 ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 5021 7fff ori at,at,0x7fff +[0-9a-f]+ <[^>]*> 5830 8910 dadd s1,s0,at +[0-9a-f]+ <[^>]*> 5020 8200 li at,0x8200 +[0-9a-f]+ <[^>]*> 5832 9910 dadd s3,s2,at +[0-9a-f]+ <[^>]*> 41a1 ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 5021 7dff ori at,at,0x7dff +[0-9a-f]+ <[^>]*> 5834 a910 dadd s5,s4,at + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@dli.d b/gas/testsuite/gas/mips/micromips@dli.d new file mode 100644 index 0000000..e74e6b5 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@dli.d @@ -0,0 +1,116 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS dli +#source: dli.s +#as: -64 + +# Test the dli macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 3080 0000 li a0,0 +[0-9a-f]+ <[^>]*> 3080 0001 li a0,1 +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5080 8000 li a0,0x8000 +[0-9a-f]+ <[^>]*> 3080 8000 li a0,-32768 +[0-9a-f]+ <[^>]*> 41a4 0001 lui a0,0x1 +[0-9a-f]+ <[^>]*> 41a4 0001 lui a0,0x1 +[0-9a-f]+ <[^>]*> 5084 a5a5 ori a0,a0,0xa5a5 +[0-9a-f]+ <[^>]*> 5080 8000 li a0,0x8000 +[0-9a-f]+ <[^>]*> 5884 8000 dsll a0,a0,0x10 +[0-9a-f]+ <[^>]*> 5084 1234 ori a0,a0,0x1234 +[0-9a-f]+ <[^>]*> 41a4 ffff lui a0,0xffff +[0-9a-f]+ <[^>]*> 5884 0048 dsrl32 a0,a0,0x0 +[0-9a-f]+ <[^>]*> 41a4 ffff lui a0,0xffff +[0-9a-f]+ <[^>]*> 5884 0048 dsrl32 a0,a0,0x0 +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 6040 dsrl a0,a0,0xc +[0-9a-f]+ <[^>]*> 41a4 8000 lui a0,0x8000 +[0-9a-f]+ <[^>]*> 5084 1234 ori a0,a0,0x1234 +[0-9a-f]+ <[^>]*> 3080 8000 li a0,-32768 +[0-9a-f]+ <[^>]*> 5884 8000 dsll a0,a0,0x10 +[0-9a-f]+ <[^>]*> 5084 1234 ori a0,a0,0x1234 +[0-9a-f]+ <[^>]*> 5884 8000 dsll a0,a0,0x10 +[0-9a-f]+ <[^>]*> 5084 5678 ori a0,a0,0x5678 +[0-9a-f]+ <[^>]*> 41a4 8000 lui a0,0x8000 +[0-9a-f]+ <[^>]*> 5084 1234 ori a0,a0,0x1234 +[0-9a-f]+ <[^>]*> 5884 8000 dsll a0,a0,0x10 +[0-9a-f]+ <[^>]*> 5084 5678 ori a0,a0,0x5678 +[0-9a-f]+ <[^>]*> 5884 8000 dsll a0,a0,0x10 +[0-9a-f]+ <[^>]*> 3080 8765 li a0,-30875 +[0-9a-f]+ <[^>]*> 41a4 ffff lui a0,0xffff +[0-9a-f]+ <[^>]*> 5084 4321 ori a0,a0,0x4321 +[0-9a-f]+ <[^>]*> 3080 fff0 li a0,-16 +[0-9a-f]+ <[^>]*> 3080 ff00 li a0,-256 +[0-9a-f]+ <[^>]*> 3080 f000 li a0,-4096 +[0-9a-f]+ <[^>]*> 41a4 ffff lui a0,0xffff +[0-9a-f]+ <[^>]*> 41a4 fff0 lui a0,0xfff0 +[0-9a-f]+ <[^>]*> 41a4 ff00 lui a0,0xff00 +[0-9a-f]+ <[^>]*> 41a4 f000 lui a0,0xf000 +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 0008 dsll32 a0,a0,0x0 +[0-9a-f]+ <[^>]*> 3080 fff0 li a0,-16 +[0-9a-f]+ <[^>]*> 5884 0008 dsll32 a0,a0,0x0 +[0-9a-f]+ <[^>]*> 3080 ff00 li a0,-256 +[0-9a-f]+ <[^>]*> 5884 0008 dsll32 a0,a0,0x0 +[0-9a-f]+ <[^>]*> 3080 f000 li a0,-4096 +[0-9a-f]+ <[^>]*> 5884 0008 dsll32 a0,a0,0x0 +[0-9a-f]+ <[^>]*> 5080 ffff li a0,0xffff +[0-9a-f]+ <[^>]*> 5884 8008 dsll32 a0,a0,0x10 +[0-9a-f]+ <[^>]*> 5080 fff0 li a0,0xfff0 +[0-9a-f]+ <[^>]*> 5884 8008 dsll32 a0,a0,0x10 +[0-9a-f]+ <[^>]*> 5080 ff00 li a0,0xff00 +[0-9a-f]+ <[^>]*> 5884 8008 dsll32 a0,a0,0x10 +[0-9a-f]+ <[^>]*> 5080 f000 li a0,0xf000 +[0-9a-f]+ <[^>]*> 5884 8008 dsll32 a0,a0,0x10 +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 2040 dsrl a0,a0,0x4 +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 4040 dsrl a0,a0,0x8 +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 6040 dsrl a0,a0,0xc +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 8040 dsrl a0,a0,0x10 +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 a040 dsrl a0,a0,0x14 +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 c040 dsrl a0,a0,0x18 +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 e040 dsrl a0,a0,0x1c +[0-9a-f]+ <[^>]*> 41a4 ffff lui a0,0xffff +[0-9a-f]+ <[^>]*> 5884 0048 dsrl32 a0,a0,0x0 +[0-9a-f]+ <[^>]*> 41a4 0fff lui a0,0xfff +[0-9a-f]+ <[^>]*> 5084 ffff ori a0,a0,0xffff +[0-9a-f]+ <[^>]*> 41a4 00ff lui a0,0xff +[0-9a-f]+ <[^>]*> 5084 ffff ori a0,a0,0xffff +[0-9a-f]+ <[^>]*> 41a4 000f lui a0,0xf +[0-9a-f]+ <[^>]*> 5084 ffff ori a0,a0,0xffff +[0-9a-f]+ <[^>]*> 5080 ffff li a0,0xffff +[0-9a-f]+ <[^>]*> 3080 0fff li a0,4095 +[0-9a-f]+ <[^>]*> 3080 00ff li a0,255 +[0-9a-f]+ <[^>]*> 3080 000f li a0,15 +[0-9a-f]+ <[^>]*> 41a4 0003 lui a0,0x3 +[0-9a-f]+ <[^>]*> 5084 fffc ori a0,a0,0xfffc +[0-9a-f]+ <[^>]*> 5080 ffff li a0,0xffff +[0-9a-f]+ <[^>]*> 5884 f000 dsll a0,a0,0x1e +[0-9a-f]+ <[^>]*> 5080 ffff li a0,0xffff +[0-9a-f]+ <[^>]*> 5884 1008 dsll32 a0,a0,0x2 +[0-9a-f]+ <[^>]*> 5080 ffff li a0,0xffff +[0-9a-f]+ <[^>]*> 5884 3008 dsll32 a0,a0,0x6 +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 0008 dsll32 a0,a0,0x0 +[0-9a-f]+ <[^>]*> 5884 5040 dsrl a0,a0,0xa +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 e000 dsll a0,a0,0x1c +[0-9a-f]+ <[^>]*> 5884 5040 dsrl a0,a0,0xa +[0-9a-f]+ <[^>]*> 3080 ffff li a0,-1 +[0-9a-f]+ <[^>]*> 5884 c000 dsll a0,a0,0x18 +[0-9a-f]+ <[^>]*> 5884 5040 dsrl a0,a0,0xa +[0-9a-f]+ <[^>]*> 41a4 003f lui a0,0x3f +[0-9a-f]+ <[^>]*> 5084 fc03 ori a0,a0,0xfc03 +[0-9a-f]+ <[^>]*> 5884 8000 dsll a0,a0,0x10 +[0-9a-f]+ <[^>]*> 5084 ffff ori a0,a0,0xffff +[0-9a-f]+ <[^>]*> 5884 8000 dsll a0,a0,0x10 +[0-9a-f]+ <[^>]*> 5084 c000 ori a0,a0,0xc000 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@elf-jal.d b/gas/testsuite/gas/mips/micromips@elf-jal.d new file mode 100644 index 0000000..8a49996 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@elf-jal.d @@ -0,0 +1,28 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ELF jal +#source: jal.s +#as: -32 + +# Test the jal macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 45d9 jalr t9 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 0099 0f3c jalr a0,t9 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> f400 0000 jal 0+0000 + e: R_MICROMIPS_26_S1 text_label +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> f400 0000 jal 0+0000 + 16: R_MICROMIPS_26_S1 external_text_label +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> d400 0000 j 0+0000 + 1e: R_MICROMIPS_26_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> d400 0000 j 0+0000 + 24: R_MICROMIPS_26_S1 external_text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@elf-rel2.d b/gas/testsuite/gas/mips/micromips@elf-rel2.d new file mode 100644 index 0000000..da4dd69 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@elf-rel2.d @@ -0,0 +1,28 @@ +#objdump: -sr -j .text +#name: MIPS ELF reloc 2 +#source: elf-rel2.s +#as: -mabi=o64 + +# Test the GPREL and LITERAL generation (microMIPS). +# FIXME: really this should check that the contents of .sdata, .lit4, +# and .lit8 are correct too. + +.*: +file format .*mips.* + +RELOCATION RECORDS FOR \[\.text\]: +OFFSET [ ]+ TYPE VALUE +0+0000000 R_MICROMIPS_LITERAL \.lit8 +0+0000004 R_MICROMIPS_LITERAL \.lit8 +0+0000008 R_MICROMIPS_LITERAL \.lit8 +0+000000c R_MICROMIPS_LITERAL \.lit4 +0+0000010 R_MICROMIPS_LITERAL \.lit4 +0+0000014 R_MICROMIPS_LITERAL \.lit4 +0+0000018 R_MICROMIPS_GPREL16 \.sdata +0+000001c R_MICROMIPS_GPREL16 \.sdata +0+0000020 R_MICROMIPS_GPREL16 \.sdata + + +Contents of section \.text: + 0000 bc5c0000 bc5c0008 bc5c0010 9c5c0000 .* + 0010 9c5c0004 9c5c0008 fc5c0000 fc5c0004 .* + 0020 fc5c0008 .* diff --git a/gas/testsuite/gas/mips/micromips@elf-rel4.d b/gas/testsuite/gas/mips/micromips@elf-rel4.d new file mode 100644 index 0000000..f34ce4f --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@elf-rel4.d @@ -0,0 +1,16 @@ +#objdump: --prefix-addresses -dr --show-raw-insn +#name: MIPS ELF reloc 4 +#source: elf-rel4.s +#as: -32 + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 309c 0000 addiu a0,gp,0 +[ ]*[0-9a-f]+: R_MICROMIPS_GPREL16 a +[0-9a-f]+ <[^>]*> 309c 0004 addiu a0,gp,4 +[ ]*[0-9a-f]+: R_MICROMIPS_GPREL16 a +[0-9a-f]+ <[^>]*> 309c 0008 addiu a0,gp,8 +[ ]*[0-9a-f]+: R_MICROMIPS_GPREL16 a +[0-9a-f]+ <[^>]*> 309c 000c addiu a0,gp,12 +[ ]*[0-9a-f]+: R_MICROMIPS_GPREL16 a diff --git a/gas/testsuite/gas/mips/micromips@elfel-rel2.d b/gas/testsuite/gas/mips/micromips@elfel-rel2.d new file mode 100644 index 0000000..f771e79 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@elfel-rel2.d @@ -0,0 +1,28 @@ +#objdump: -sr -j .text +#name: MIPS ELF reloc 2 +#source: elf-rel2.s +#as: -mabi=o64 + +# Test the GPREL and LITERAL generation (microMIPS). +# FIXME: really this should check that the contents of .sdata, .lit4, +# and .lit8 are correct too. + +.*: +file format .*mips.* + +RELOCATION RECORDS FOR \[\.text\]: +OFFSET [ ]+ TYPE VALUE +0+0000000 R_MICROMIPS_LITERAL \.lit8 +0+0000004 R_MICROMIPS_LITERAL \.lit8 +0+0000008 R_MICROMIPS_LITERAL \.lit8 +0+000000c R_MICROMIPS_LITERAL \.lit4 +0+0000010 R_MICROMIPS_LITERAL \.lit4 +0+0000014 R_MICROMIPS_LITERAL \.lit4 +0+0000018 R_MICROMIPS_GPREL16 \.sdata +0+000001c R_MICROMIPS_GPREL16 \.sdata +0+0000020 R_MICROMIPS_GPREL16 \.sdata + + +Contents of section \.text: + 0000 5cbc0000 5cbc0800 5cbc1000 5c9c0000 .* + 0010 5c9c0400 5c9c0800 5cfc0000 5cfc0400 .* + 0020 5cfc0800 .* diff --git a/gas/testsuite/gas/mips/micromips@jal-mask-11.d b/gas/testsuite/gas/mips/micromips@jal-mask-11.d new file mode 100644 index 0000000..8845a79 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@jal-mask-11.d @@ -0,0 +1,27 @@ +#objdump: -dr --prefix-addresses --show-raw-insn --adjust-vma=0x55555550 +#name: MIPS jal mask 1.1 +#as: -32 +#source: jal-mask-1.s + +# Check address masks for JAL/J instructions. + +.*: +file format .*mips.* + +Disassembly of section \.text: +55555550 <[^>]*> d400 0000 j 50000000 <[^>]*> +55555554 <[^>]*> 0c00 nop +55555556 <[^>]*> d555 5552 j 52aaaaa4 <[^>]*> +5555555a <[^>]*> 0c00 nop +5555555c <[^>]*> d6aa aaac j 55555558 <[^>]*> +55555560 <[^>]*> 0c00 nop +55555562 <[^>]*> d7ff fffe j 57fffffc <[^>]*> +55555566 <[^>]*> 0c00 nop +55555568 <[^>]*> f400 0000 jal 50000000 <[^>]*> +5555556c <[^>]*> 0000 0000 nop +55555570 <[^>]*> f555 5552 jal 52aaaaa4 <[^>]*> +55555574 <[^>]*> 0000 0000 nop +55555578 <[^>]*> f6aa aaac jal 55555558 <[^>]*> +5555557c <[^>]*> 0000 0000 nop +55555580 <[^>]*> f7ff fffe jal 57fffffc <[^>]*> +55555584 <[^>]*> 0000 0000 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@jal-mask-12.d b/gas/testsuite/gas/mips/micromips@jal-mask-12.d new file mode 100644 index 0000000..5c7c8cf --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@jal-mask-12.d @@ -0,0 +1,27 @@ +#objdump: -dr --prefix-addresses --show-raw-insn --adjust-vma=0xaaaaaaa0 +#name: MIPS jal mask 1.2 +#as: -32 +#source: jal-mask-1.s + +# Check address masks for JAL/J instructions. + +.*: +file format .*mips.* + +Disassembly of section \.text: +aaaaaaa0 <[^>]*> d400 0000 j a8000000 <[^>]*> +aaaaaaa4 <[^>]*> 0c00 nop +aaaaaaa6 <[^>]*> d555 5552 j aaaaaaa4 <[^>]*> +aaaaaaaa <[^>]*> 0c00 nop +aaaaaaac <[^>]*> d6aa aaac j ad555558 <[^>]*> +aaaaaab0 <[^>]*> 0c00 nop +aaaaaab2 <[^>]*> d7ff fffe j affffffc <[^>]*> +aaaaaab6 <[^>]*> 0c00 nop +aaaaaab8 <[^>]*> f400 0000 jal a8000000 <[^>]*> +aaaaaabc <[^>]*> 0000 0000 nop +aaaaaac0 <[^>]*> f555 5552 jal aaaaaaa4 <[^>]*> +aaaaaac4 <[^>]*> 0000 0000 nop +aaaaaac8 <[^>]*> f6aa aaac jal ad555558 <[^>]*> +aaaaaacc <[^>]*> 0000 0000 nop +aaaaaad0 <[^>]*> f7ff fffe jal affffffc <[^>]*> +aaaaaad4 <[^>]*> 0000 0000 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@jal-svr4pic-noreorder.d b/gas/testsuite/gas/mips/micromips@jal-svr4pic-noreorder.d new file mode 100644 index 0000000..1a5a483 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@jal-svr4pic-noreorder.d @@ -0,0 +1,47 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS jal-svr4pic noreorder +#as: -32 -KPIC +#source: jal-svr4pic-noreorder.s + +# Test the jal macro with -KPIC and `.set noreorder' (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 41bc 0000 lui gp,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 _gp_disp +[0-9a-f]+ <[^>]*> 339c 0000 addiu gp,gp,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 _gp_disp +[0-9a-f]+ <[^>]*> 033c e150 addu gp,gp,t9 +[0-9a-f]+ <[^>]*> fb9d 0000 sw gp,0\(sp\) +[0-9a-f]+ <[^>]*> 45f9 jalrs t9 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff9d 0000 lw gp,0\(sp\) +[0-9a-f]+ <[^>]*> 0099 4f3c jalrs a0,t9 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff9d 0000 lw gp,0\(sp\) +[0-9a-f]+ <[^>]*> ff3c 0000 lw t9,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3339 0001 addiu t9,t9,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 03f9 4f3c jalrs t9 +[ ]*[0-9a-f]+: R_MICROMIPS_JALR text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff9d 0000 lw gp,0\(sp\) +[0-9a-f]+ <[^>]*> ff3c 0000 lw t9,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_CALL16 weak_text_label +[0-9a-f]+ <[^>]*> 03f9 4f3c jalrs t9 +[ ]*[0-9a-f]+: R_MICROMIPS_JALR weak_text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff9d 0000 lw gp,0\(sp\) +[0-9a-f]+ <[^>]*> ff3c 0000 lw t9,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_CALL16 external_text_label +[0-9a-f]+ <[^>]*> 03f9 4f3c jalrs t9 +[ ]*[0-9a-f]+: R_MICROMIPS_JALR external_text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff9d 0000 lw gp,0\(sp\) +([0-9a-f]+) <[^>]*> 9400 fffe b \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@jal-svr4pic.d b/gas/testsuite/gas/mips/micromips@jal-svr4pic.d new file mode 100644 index 0000000..75ae1fd --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@jal-svr4pic.d @@ -0,0 +1,45 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS jal-svr4pic +#as: -32 -KPIC +#source: jal-svr4pic.s + +# Test the jal macro with -KPIC (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 41bc 0000 lui gp,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 _gp_disp +[0-9a-f]+ <[^>]*> 339c 0000 addiu gp,gp,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 _gp_disp +[0-9a-f]+ <[^>]*> 033c e150 addu gp,gp,t9 +[0-9a-f]+ <[^>]*> fb9d 0000 sw gp,0\(sp\) +[0-9a-f]+ <[^>]*> 45f9 jalrs t9 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff9d 0000 lw gp,0\(sp\) +[0-9a-f]+ <[^>]*> 0099 4f3c jalrs a0,t9 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff9d 0000 lw gp,0\(sp\) +[0-9a-f]+ <[^>]*> ff3c 0000 lw t9,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3339 0001 addiu t9,t9,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 03f9 4f3c jalrs t9 +[ ]*[0-9a-f]+: R_MICROMIPS_JALR text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff9d 0000 lw gp,0\(sp\) +[0-9a-f]+ <[^>]*> ff3c 0000 lw t9,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_CALL16 weak_text_label +[0-9a-f]+ <[^>]*> 03f9 4f3c jalrs t9 +[ ]*[0-9a-f]+: R_MICROMIPS_JALR weak_text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff9d 0000 lw gp,0\(sp\) +[0-9a-f]+ <[^>]*> ff3c 0000 lw t9,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_CALL16 external_text_label +[0-9a-f]+ <[^>]*> 03f9 4f3c jalrs t9 +[ ]*[0-9a-f]+: R_MICROMIPS_JALR external_text_label +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 9400 fffe b \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> ff9d 0000 lw gp,0\(sp\) + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@lb-svr4pic-ilocks.d b/gas/testsuite/gas/mips/micromips@lb-svr4pic-ilocks.d new file mode 100644 index 0000000..45bf1e1 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@lb-svr4pic-ilocks.d @@ -0,0 +1,155 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS lb-svr4pic-ilocks +#source: lb-pic.s +#as: -32 -KPIC + +# Test the lb macro with -KPIC (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 1c80 0000 lb a0,0\(zero\) +[0-9a-f]+ <[^>]*> 1c80 0001 lb a0,1\(zero\) +[0-9a-f]+ <[^>]*> 41a4 0001 lui a0,0x1 +[0-9a-f]+ <[^>]*> 1c84 8000 lb a0,-32768\(a0\) +[0-9a-f]+ <[^>]*> 1c80 8000 lb a0,-32768\(zero\) +[0-9a-f]+ <[^>]*> 41a4 0001 lui a0,0x1 +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> 41a4 0002 lui a0,0x2 +[0-9a-f]+ <[^>]*> 1c84 a5a5 lb a0,-23131\(a0\) +[0-9a-f]+ <[^>]*> 1c85 0000 lb a0,0\(a1\) +[0-9a-f]+ <[^>]*> 1c85 0001 lb a0,1\(a1\) +[0-9a-f]+ <[^>]*> 41a4 0001 lui a0,0x1 +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 8000 lb a0,-32768\(a0\) +[0-9a-f]+ <[^>]*> 1c85 8000 lb a0,-32768\(a1\) +[0-9a-f]+ <[^>]*> 41a4 0001 lui a0,0x1 +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> 41a4 0002 lui a0,0x2 +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 a5a5 lb a0,-23131\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.data +[0-9a-f]+ <[^>]*> 3084 0000 addiu a0,a0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.data +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 big_external_data_label +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 small_external_data_label +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 big_external_common +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 small_external_common +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.bss +[0-9a-f]+ <[^>]*> 3084 0000 addiu a0,a0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.bss +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.bss +[0-9a-f]+ <[^>]*> 3084 03e8 addiu a0,a0,1000 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.bss +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.data +[0-9a-f]+ <[^>]*> 3084 0000 addiu a0,a0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.data +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 big_external_data_label +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 small_external_data_label +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 big_external_common +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 small_external_common +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.bss +[0-9a-f]+ <[^>]*> 3084 0000 addiu a0,a0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.bss +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.bss +[0-9a-f]+ <[^>]*> 3084 03e8 addiu a0,a0,1000 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.bss +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.data +[0-9a-f]+ <[^>]*> 3084 0000 addiu a0,a0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.data +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 big_external_data_label +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 small_external_data_label +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 big_external_common +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 small_external_common +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.bss +[0-9a-f]+ <[^>]*> 3084 0000 addiu a0,a0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.bss +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.bss +[0-9a-f]+ <[^>]*> 3084 03e8 addiu a0,a0,1000 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.bss +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0000 lb a0,0\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.data +[0-9a-f]+ <[^>]*> 3084 0000 addiu a0,a0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.data +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 big_external_data_label +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 small_external_data_label +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 big_external_common +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 small_external_common +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.bss +[0-9a-f]+ <[^>]*> 3084 0000 addiu a0,a0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.bss +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> fc9c 0000 lw a0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.bss +[0-9a-f]+ <[^>]*> 3084 03e8 addiu a0,a0,1000 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.bss +[0-9a-f]+ <[^>]*> 00a4 2150 addu a0,a0,a1 +[0-9a-f]+ <[^>]*> 1c84 0001 lb a0,1\(a0\) +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c00 nop diff --git a/gas/testsuite/gas/mips/micromips@li.d b/gas/testsuite/gas/mips/micromips@li.d new file mode 100644 index 0000000..fa809d2 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@li.d @@ -0,0 +1,18 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS li +#source: li.s +#as: -32 + +# Test the li macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> ee00 li a0,0 +[0-9a-f]+ <[^>]*> ee01 li a0,1 +[0-9a-f]+ <[^>]*> 5080 8000 li a0,0x8000 +[0-9a-f]+ <[^>]*> 3080 8000 li a0,-32768 +[0-9a-f]+ <[^>]*> 41a4 0001 lui a0,0x1 +[0-9a-f]+ <[^>]*> 41a4 0001 lui a0,0x1 +[0-9a-f]+ <[^>]*> 5084 a5a5 ori a0,a0,0xa5a5 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@loc-swap-2.d b/gas/testsuite/gas/mips/micromips@loc-swap-2.d new file mode 100644 index 0000000..79da514 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@loc-swap-2.d @@ -0,0 +1,49 @@ +#PROG: readelf +#readelf: -wl +#name: MIPS DWARF-2 location information with branch swapping (2) +#as: -32 +#source: loc-swap-2.s + +Raw dump of debug contents of section .debug_line: + + Offset: 0x0 + Length: 60 + DWARF Version: 2 + Prologue Length: 35 + Minimum Instruction Length: 1 + Initial value of 'is_stmt': 1 + Line Base: -5 + Line Range: 14 + Opcode Base: 13 + + Opcodes: + Opcode 1 has 0 args + Opcode 2 has 1 args + Opcode 3 has 1 args + Opcode 4 has 1 args + Opcode 5 has 1 args + Opcode 6 has 0 args + Opcode 7 has 0 args + Opcode 8 has 0 args + Opcode 9 has 1 args + Opcode 10 has 0 args + Opcode 11 has 0 args + Opcode 12 has 1 args + + The Directory Table is empty. + + The File Name Table: + Entry Dir Time Size Name + 1 0 0 0 loc-swap-2.s + + Line Number Statements: + Extended opcode 2: set Address to 0x1 + Special opcode 11: advance Address by 0 to 0x1 and Line by 6 to 7 + Special opcode 35: advance Address by 2 to 0x3 and Line by 2 to 9 + Special opcode 6: advance Address by 0 to 0x3 and Line by 1 to 10 + Special opcode 64: advance Address by 4 to 0x7 and Line by 3 to 13 + Special opcode 34: advance Address by 2 to 0x9 and Line by 1 to 14 + Special opcode 6: advance Address by 0 to 0x9 and Line by 1 to 15 + Special opcode 63: advance Address by 4 to 0xd and Line by 2 to 17 + Advance PC by 1 to 0xe + Extended opcode 1: End of Sequence diff --git a/gas/testsuite/gas/mips/micromips@loc-swap-dis.d b/gas/testsuite/gas/mips/micromips@loc-swap-dis.d new file mode 100644 index 0000000..c4c5458 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@loc-swap-dis.d @@ -0,0 +1,35 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS DWARF-2 location information with branch swapping disassembly +#as: -32 +#source: loc-swap.s + +# Check branch swapping with DWARF-2 location information (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 0c90 move a0,s0 +[0-9a-f]+ <[^>]*> 4584 jr a0 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4584 jr a0 +[0-9a-f]+ <[^>]*> 0ff0 move ra,s0 +[0-9a-f]+ <[^>]*> 459f jr ra +[0-9a-f]+ <[^>]*> 0c90 move a0,s0 +[0-9a-f]+ <[^>]*> 0ff0 move ra,s0 +[0-9a-f]+ <[^>]*> 459f jr ra +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0c90 move a0,s0 +[0-9a-f]+ <[^>]*> 45c4 jalr a0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 0ff0 move ra,s0 +[0-9a-f]+ <[^>]*> 45c4 jalr a0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 0c90 move a0,s0 +[0-9a-f]+ <[^>]*> f400 0000 jal 0+0000 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 bar +[0-9a-f]+ <[^>]*> 0000 0000 nop +[0-9a-f]+ <[^>]*> 0ff0 move ra,s0 +[0-9a-f]+ <[^>]*> f400 0000 jal 0+0000 +[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 bar +[0-9a-f]+ <[^>]*> 0000 0000 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@loc-swap.d b/gas/testsuite/gas/mips/micromips@loc-swap.d new file mode 100644 index 0000000..28fa77a --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@loc-swap.d @@ -0,0 +1,62 @@ +#PROG: readelf +#readelf: -wl +#name: MIPS DWARF-2 location information with branch swapping +#as: -32 +#source: loc-swap.s + +# Verify that DWARF-2 location information for instructions reordered +# into a branch delay slot is updated to point to the branch instead +# (microMIPS). + +Raw dump of debug contents of section \.debug_line: + + Offset: 0x0 + Length: 67 + DWARF Version: 2 + Prologue Length: 33 + Minimum Instruction Length: 1 + Initial value of 'is_stmt': 1 + Line Base: -5 + Line Range: 14 + Opcode Base: 13 + + Opcodes: + Opcode 1 has 0 args + Opcode 2 has 1 args + Opcode 3 has 1 args + Opcode 4 has 1 args + Opcode 5 has 1 args + Opcode 6 has 0 args + Opcode 7 has 0 args + Opcode 8 has 0 args + Opcode 9 has 1 args + Opcode 10 has 0 args + Opcode 11 has 0 args + Opcode 12 has 1 args + + The Directory Table is empty\. + + The File Name Table: + Entry Dir Time Size Name + 1 0 0 0 loc-swap\.s + + Line Number Statements: + Extended opcode 2: set Address to 0x1 + Special opcode 11: advance Address by 0 to 0x1 and Line by 6 to 7 + Special opcode 35: advance Address by 2 to 0x3 and Line by 2 to 9 + Special opcode 64: advance Address by 4 to 0x7 and Line by 3 to 12 + Special opcode 7: advance Address by 0 to 0x7 and Line by 2 to 14 + Special opcode 64: advance Address by 4 to 0xb and Line by 3 to 17 + Special opcode 7: advance Address by 0 to 0xb and Line by 2 to 19 + Special opcode 64: advance Address by 4 to 0xf and Line by 3 to 22 + Special opcode 35: advance Address by 2 to 0x11 and Line by 2 to 24 + Special opcode 64: advance Address by 4 to 0x15 and Line by 3 to 27 + Special opcode 35: advance Address by 2 to 0x17 and Line by 2 to 29 + Special opcode 92: advance Address by 6 to 0x1d and Line by 3 to 32 + Special opcode 35: advance Address by 2 to 0x1f and Line by 2 to 34 + Special opcode 92: advance Address by 6 to 0x25 and Line by 3 to 37 + Special opcode 35: advance Address by 2 to 0x27 and Line by 2 to 39 + Special opcode 120: advance Address by 8 to 0x2f and Line by 3 to 42 + Special opcode 35: advance Address by 2 to 0x31 and Line by 2 to 44 + Advance PC by 23 to 0x48 + Extended opcode 1: End of Sequence diff --git a/gas/testsuite/gas/mips/micromips@mcu.d b/gas/testsuite/gas/mips/micromips@mcu.d new file mode 100644 index 0000000..eec0ed7 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mcu.d @@ -0,0 +1,122 @@ +#objdump: -dr --show-raw-insn +#name: MCU for MIPS32r2 +#as: -32 +#source: mcu.s + +.*: +file format .*mips.* + +Disassembly of section \.text: + +[0-9a-f]+ : +[ 0-9a-f]+: 0000 d37c iret +[ 0-9a-f]+: 2000 b000 aclr 0x0,0\(zero\) +[ 0-9a-f]+: 2000 b000 aclr 0x0,0\(zero\) +[ 0-9a-f]+: 2000 b000 aclr 0x0,0\(zero\) +[ 0-9a-f]+: 2020 b000 aclr 0x1,0\(zero\) +[ 0-9a-f]+: 2040 b000 aclr 0x2,0\(zero\) +[ 0-9a-f]+: 2060 b000 aclr 0x3,0\(zero\) +[ 0-9a-f]+: 2080 b000 aclr 0x4,0\(zero\) +[ 0-9a-f]+: 20a0 b000 aclr 0x5,0\(zero\) +[ 0-9a-f]+: 20c0 b000 aclr 0x6,0\(zero\) +[ 0-9a-f]+: 20e0 b000 aclr 0x7,0\(zero\) +[ 0-9a-f]+: 20e2 b000 aclr 0x7,0\(v0\) +[ 0-9a-f]+: 20ff b000 aclr 0x7,0\(ra\) +[ 0-9a-f]+: 20ff b7ff aclr 0x7,2047\(ra\) +[ 0-9a-f]+: 20ff b800 aclr 0x7,-2048\(ra\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 03e1 0950 addu at,at,ra +[ 0-9a-f]+: 20e1 b800 aclr 0x7,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 03e1 0950 addu at,at,ra +[ 0-9a-f]+: 20e1 b7ff aclr 0x7,2047\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 03e1 0950 addu at,at,ra +[ 0-9a-f]+: 20e1 bfff aclr 0x7,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 03e1 0950 addu at,at,ra +[ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 bfff aclr 0x7,-1\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 b001 aclr 0x7,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 b001 aclr 0x7,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 20e4 bfff aclr 0x7,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 b678 aclr 0x7,1656\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 foo +[ 0-9a-f]+: 2021 b000 aclr 0x1,0\(at\) +[ 0-9a-f]+: 3023 0000 addiu at,v1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 foo +[ 0-9a-f]+: 2021 3000 aset 0x1,0\(at\) +[ 0-9a-f]+: 2000 3000 aset 0x0,0\(zero\) +[ 0-9a-f]+: 2000 3000 aset 0x0,0\(zero\) +[ 0-9a-f]+: 2000 3000 aset 0x0,0\(zero\) +[ 0-9a-f]+: 2020 3000 aset 0x1,0\(zero\) +[ 0-9a-f]+: 2040 3000 aset 0x2,0\(zero\) +[ 0-9a-f]+: 2060 3000 aset 0x3,0\(zero\) +[ 0-9a-f]+: 2080 3000 aset 0x4,0\(zero\) +[ 0-9a-f]+: 20a0 3000 aset 0x5,0\(zero\) +[ 0-9a-f]+: 20c0 3000 aset 0x6,0\(zero\) +[ 0-9a-f]+: 20e0 3000 aset 0x7,0\(zero\) +[ 0-9a-f]+: 20e2 3000 aset 0x7,0\(v0\) +[ 0-9a-f]+: 20ff 3000 aset 0x7,0\(ra\) +[ 0-9a-f]+: 20ff 37ff aset 0x7,2047\(ra\) +[ 0-9a-f]+: 20ff 3800 aset 0x7,-2048\(ra\) +[ 0-9a-f]+: 3020 1000 li at,4096 +[ 0-9a-f]+: 03e1 0950 addu at,at,ra +[ 0-9a-f]+: 20e1 3800 aset 0x7,-2048\(at\) +[ 0-9a-f]+: 3020 f000 li at,-4096 +[ 0-9a-f]+: 03e1 0950 addu at,at,ra +[ 0-9a-f]+: 20e1 37ff aset 0x7,2047\(at\) +[ 0-9a-f]+: 5020 8000 li at,0x8000 +[ 0-9a-f]+: 03e1 0950 addu at,at,ra +[ 0-9a-f]+: 20e1 3fff aset 0x7,-1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 03e1 0950 addu at,at,ra +[ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 3fff aset 0x7,-1\(at\) +[ 0-9a-f]+: 41a1 0001 lui at,0x1 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) +[ 0-9a-f]+: 41a1 ffff lui at,0xffff +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 3001 aset 0x7,1\(at\) +[ 0-9a-f]+: 3020 8000 li at,-32768 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 3001 aset 0x7,1\(at\) +[ 0-9a-f]+: 41a1 f000 lui at,0xf000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) +[ 0-9a-f]+: 20e4 3fff aset 0x7,-1\(a0\) +[ 0-9a-f]+: 41a1 1234 lui at,0x1234 +[ 0-9a-f]+: 5021 5000 ori at,at,0x5000 +[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 20e1 3678 aset 0x7,1656\(at\) + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips1-fp.d b/gas/testsuite/gas/mips/micromips@mips1-fp.d new file mode 100644 index 0000000..60e605f --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips1-fp.d @@ -0,0 +1,12 @@ +#objdump: -dr --show-raw-insn -M reg-names=numeric +#name: MIPS1 FP instructions +#source: mips1-fp.s +#as: -32 + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ : +[0-9a-f ]+: 5482 0030 add\.s \$f0,\$f2,\$f4 +[0-9a-f ]+: 5440 103b cfc1 \$2,\$0 +#pass diff --git a/gas/testsuite/gas/mips/micromips@mips32-cp2.d b/gas/testsuite/gas/mips/micromips@mips32-cp2.d new file mode 100644 index 0000000..7485d12 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips32-cp2.d @@ -0,0 +1,52 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS MIPS32 cop2 instructions +#source: micromips@mips32-cp2.s +#as: -32 + +# Check MIPS32 cop2 instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 4280 fffe bc2f 0+0000 + 0: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 42a0 fffe bc2t 0+0006 + 6: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 fffe b 0+000c + c: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 42a0 fffe bc2t 0+0012 <.*> + 12: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4280 fffe bc2f 0+0018 <.*\+0x6> + 18: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 fffe b 0+001e <.*\+0xc> + 1e: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 0022 cd3c cfc2 at,\$2 +[0-9a-f]+ <[^>]*> 0009 1a2a cop2 0x12345 +[0-9a-f]+ <[^>]*> 0043 dd3c ctc2 v0,\$3 +[0-9a-f]+ <[^>]*> 0064 4d3c mfc2 v1,\$4 +[0-9a-f]+ <[^>]*> 00c7 5d3c mtc2 a2,\$7 +[0-9a-f]+ <[^>]*> 4280 fffe bc2f 0+0038 <.*\+0x14> + 38: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 42a4 fffe bc2t \$cc1,0+003e <.*\+0x1a> + 3e: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 fffe b 0+0044 <.*\+0x20> + 44: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 42b8 fffe bc2t \$cc6,0+004a <.*> + 4a: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 429c fffe bc2f \$cc7,0+0050 <.*\+0x6> + 50: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 9400 fffe b 0+0056 <.*\+0xc> + 56: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips32-cp2.s b/gas/testsuite/gas/mips/micromips@mips32-cp2.s new file mode 100644 index 0000000..d52ce87 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips32-cp2.s @@ -0,0 +1,43 @@ +# Source file to test assembly of MIPS32-derived microMIPS cop2 instructions. + + .set noreorder + .set noat + + .text +text_label: + # Unprivileged coprocessor instructions. + # These tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes. + + bc2f text_label + nop + bc2fl text_label + nop + bc2t text_label + nop + bc2tl text_label + nop + # XXX other BCzCond encodings not currently expressable. + + cfc2 $1, $2 + # Different cop2 range for microMIPS. + cop2 0x12345 # disassembles as c2 ... + ctc2 $2, $3 + + # No sel with cp2 for microMIPS. + mfc2 $3, $4 + mtc2 $6, $7 + + + # Cop2 branches with cond code number, like bc1t/f. + bc2f $cc0,text_label + nop + bc2fl $cc1,text_label + nop + bc2t $cc6,text_label + nop + bc2tl $cc7,text_label + nop + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/micromips@mips32-imm.d b/gas/testsuite/gas/mips/micromips@mips32-imm.d new file mode 100644 index 0000000..24fad3a --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips32-imm.d @@ -0,0 +1,13 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS MIPS32 WAIT and SDBBP instructions +#source: micromips@mips32-imm.s +#as: -32 + +# Check MIPS32 WAIT and SDBBP instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section .text: +[0-9a-f]+ <[^>]*> 03c3 937c wait 0x3c3 +[0-9a-f]+ <[^>]*> 03c3 db7c sdbbp 0x3c3 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips32-imm.s b/gas/testsuite/gas/mips/micromips@mips32-imm.s new file mode 100644 index 0000000..3fcf6d8 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips32-imm.s @@ -0,0 +1,14 @@ +# Source file to test wide immediates with MIPS32 WAIT and SDBBP instructions + + .set noreorder + .set noat + + .text +text_label: + + # 10 bits accepted for microMIPS + wait 0x3c3 + sdbbp 0x3c3 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff --git a/gas/testsuite/gas/mips/micromips@mips32-sf32.d b/gas/testsuite/gas/mips/micromips@mips32-sf32.d new file mode 100644 index 0000000..e44e257 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips32-sf32.d @@ -0,0 +1,20 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: MIPS32 odd single-precision float registers +#source: mips32-sf32.s +#as: -32 + +# Check MIPS32 instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 41a1 3f80 lui \$1,0x3f80 +[0-9a-f]+ <[^>]*> 5421 283b mtc1 \$1,\$f1 +[0-9a-f]+ <[^>]*> 9c7c 0000 lwc1 \$f3,0\(\$28\) +[ ]*[0-9a-f]+: R_MICROMIPS_LITERAL \.lit4 +[0-9a-f]+ <[^>]*> 5461 2830 add\.s \$f5,\$f1,\$f3 +[0-9a-f]+ <[^>]*> 5507 137b cvt\.d\.s \$f8,\$f7 +[0-9a-f]+ <[^>]*> 5507 337b cvt\.d\.w \$f8,\$f7 +[0-9a-f]+ <[^>]*> 54e8 1b7b cvt\.s\.d \$f7,\$f8 +[0-9a-f]+ <[^>]*> 54e8 6b3b trunc\.w\.d \$f7,\$f8 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips32.d b/gas/testsuite/gas/mips/micromips@mips32.d new file mode 100644 index 0000000..e417d4b --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips32.d @@ -0,0 +1,50 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS MIPS32 instructions +#source: mips32.s +#as: -32 + +# Check MIPS32 instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 0022 4b3c clo at,v0 +[0-9a-f]+ <[^>]*> 0064 5b3c clz v1,a0 +[0-9a-f]+ <[^>]*> 00c5 cb3c madd a1,a2 +[0-9a-f]+ <[^>]*> 0107 db3c maddu a3,t0 +[0-9a-f]+ <[^>]*> 0149 eb3c msub t1,t2 +[0-9a-f]+ <[^>]*> 018b fb3c msubu t3,t4 +[0-9a-f]+ <[^>]*> 01ee 6a10 mul t5,t6,t7 +[0-9a-f]+ <[^>]*> 6090 2000 pref 0x4,0\(s0\) +[0-9a-f]+ <[^>]*> 6091 27ff pref 0x4,2047\(s1\) +[0-9a-f]+ <[^>]*> 6092 2800 pref 0x4,-2048\(s2\) +[0-9a-f]+ <[^>]*> 0000 0800 ssnop +[0-9a-f]+ <[^>]*> 20a1 6000 cache 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 20a2 67ff cache 0x5,2047\(v0\) +[0-9a-f]+ <[^>]*> 20a3 6800 cache 0x5,-2048\(v1\) +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 0081 0950 addu at,at,a0 +[0-9a-f]+ <[^>]*> 20a1 6000 cache 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 00a1 0950 addu at,at,a1 +[0-9a-f]+ <[^>]*> 20a1 6fff cache 0x5,-1\(at\) +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 20a1 6000 cache 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 20a1 6fff cache 0x5,-1\(at\) +[0-9a-f]+ <[^>]*> 0000 f37c eret +[0-9a-f]+ <[^>]*> 0000 037c tlbp +[0-9a-f]+ <[^>]*> 0000 137c tlbr +[0-9a-f]+ <[^>]*> 0000 237c tlbwi +[0-9a-f]+ <[^>]*> 0000 337c tlbwr +[0-9a-f]+ <[^>]*> 0000 937c wait +[0-9a-f]+ <[^>]*> 0000 937c wait +[0-9a-f]+ <[^>]*> 0345 937c wait 0x345 +[0-9a-f]+ <[^>]*> 4680 break +[0-9a-f]+ <[^>]*> 4680 break +[0-9a-f]+ <[^>]*> 0345 0007 break 0x345 +[0-9a-f]+ <[^>]*> 0048 d147 break 0x48,0x345 +[0-9a-f]+ <[^>]*> 46c0 sdbbp +[0-9a-f]+ <[^>]*> 46c0 sdbbp +[0-9a-f]+ <[^>]*> 0345 db7c sdbbp 0x345 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips32r2-cp2.d b/gas/testsuite/gas/mips/micromips@mips32r2-cp2.d new file mode 100644 index 0000000..221c0b1 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips32r2-cp2.d @@ -0,0 +1,12 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: MIPS MIPS32r2 cop2 instructions +#as: -32 + +# Check MIPS32 Release 2 (mips32r2) cop2 instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section .text: +[0-9a-f]+ <[^>]*> 022f 8d3c mfhc2 \$17,\$15 +[0-9a-f]+ <[^>]*> 022f 9d3c mthc2 \$17,\$15 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips32r2-cp2.s b/gas/testsuite/gas/mips/micromips@mips32r2-cp2.s new file mode 100644 index 0000000..c815e96 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips32r2-cp2.s @@ -0,0 +1,16 @@ +# Source file to test assembly of MIPS32r2-derived microMIPS cop2 instructions. + + .set noreorder + .set noat + + .text +text_label: + # cp2 instructions. + + # Only register syntax with cp2 for microMIPS (and no sel). + mfhc2 $17, $15 + mthc2 $17, $15 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/micromips@mips32r2-fp32.d b/gas/testsuite/gas/mips/micromips@mips32r2-fp32.d new file mode 100644 index 0000000..693d598 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips32r2-fp32.d @@ -0,0 +1,13 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: MIPS MIPS32r2 fp instructions +#source: mips32r2-fp32.s +#as: -32 + +# Check MIPS32 Release 2 (mips32r2) FP instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 5620 303b mfhc1 \$17,\$f0 +[0-9a-f]+ <[^>]*> 5620 383b mthc1 \$17,\$f0 +#pass diff --git a/gas/testsuite/gas/mips/micromips@mips32r2-sync.d b/gas/testsuite/gas/mips/micromips@mips32r2-sync.d new file mode 100644 index 0000000..64d0b52 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips32r2-sync.d @@ -0,0 +1,29 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS32r2 sync instructions +#as: -32 +#source: mips32r2-sync.s + +# Check MIPS32r2 sync instructions assembly and disassembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 0000 6b7c sync +[0-9a-f]+ <[^>]*> 0002 6b7c sync 0x2 +[0-9a-f]+ <[^>]*> 0004 6b7c sync_wmb +[0-9a-f]+ <[^>]*> 0008 6b7c sync 0x8 +[0-9a-f]+ <[^>]*> 0010 6b7c sync_mb +[0-9a-f]+ <[^>]*> 0011 6b7c sync_acquire +[0-9a-f]+ <[^>]*> 0012 6b7c sync_release +[0-9a-f]+ <[^>]*> 0013 6b7c sync_rmb +[0-9a-f]+ <[^>]*> 0018 6b7c sync 0x18 +[0-9a-f]+ <[^>]*> 0000 6b7c sync +[0-9a-f]+ <[^>]*> 0002 6b7c sync 0x2 +[0-9a-f]+ <[^>]*> 0004 6b7c sync_wmb +[0-9a-f]+ <[^>]*> 0008 6b7c sync 0x8 +[0-9a-f]+ <[^>]*> 0010 6b7c sync_mb +[0-9a-f]+ <[^>]*> 0011 6b7c sync_acquire +[0-9a-f]+ <[^>]*> 0012 6b7c sync_release +[0-9a-f]+ <[^>]*> 0013 6b7c sync_rmb +[0-9a-f]+ <[^>]*> 0018 6b7c sync 0x18 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips32r2.d b/gas/testsuite/gas/mips/micromips@mips32r2.d new file mode 100644 index 0000000..c898e58 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips32r2.d @@ -0,0 +1,44 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: MIPS MIPS32r2 non-fp instructions +#source: mips32r2.s +#as: -32 + +# Check MIPS32 Release 2 (mips32r2) *non-fp* instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 0000 1800 ehb +[0-9a-f]+ <[^>]*> 0085 39ac ext \$4,\$5,0x6,0x8 +[0-9a-f]+ <[^>]*> 0085 698c ins \$4,\$5,0x6,0x8 +[0-9a-f]+ <[^>]*> 03e8 1f3c jalr\.hb \$8 +[0-9a-f]+ <[^>]*> 0289 1f3c jalr\.hb \$20,\$9 +[0-9a-f]+ <[^>]*> 0008 1f3c jr\.hb \$8 +[0-9a-f]+ <[^>]*> 0140 6b3c rdhwr \$10,\$0 +[0-9a-f]+ <[^>]*> 0161 6b3c rdhwr \$11,\$1 +[0-9a-f]+ <[^>]*> 0182 6b3c rdhwr \$12,\$2 +[0-9a-f]+ <[^>]*> 01a3 6b3c rdhwr \$13,\$3 +[0-9a-f]+ <[^>]*> 01c4 6b3c rdhwr \$14,\$4 +[0-9a-f]+ <[^>]*> 01e5 6b3c rdhwr \$15,\$5 +[0-9a-f]+ <[^>]*> 032a e0c0 ror \$25,\$10,0x1c +[0-9a-f]+ <[^>]*> 032a 20c0 ror \$25,\$10,0x4 +[0-9a-f]+ <[^>]*> 0080 c9d0 negu \$25,\$4 +[0-9a-f]+ <[^>]*> 0159 c8d0 rorv \$25,\$10,\$25 +[0-9a-f]+ <[^>]*> 0144 c8d0 rorv \$25,\$10,\$4 +[0-9a-f]+ <[^>]*> 0144 c8d0 rorv \$25,\$10,\$4 +[0-9a-f]+ <[^>]*> 00e7 2b3c seb \$7,\$7 +[0-9a-f]+ <[^>]*> 010a 2b3c seb \$8,\$10 +[0-9a-f]+ <[^>]*> 00e7 3b3c seh \$7,\$7 +[0-9a-f]+ <[^>]*> 010a 3b3c seh \$8,\$10 +[0-9a-f]+ <[^>]*> 420a 5555 synci 21845\(\$10\) +[0-9a-f]+ <[^>]*> 00e7 7b3c wsbh \$7,\$7 +[0-9a-f]+ <[^>]*> 010a 7b3c wsbh \$8,\$10 +[0-9a-f]+ <[^>]*> 0000 477c di +[0-9a-f]+ <[^>]*> 0000 477c di +[0-9a-f]+ <[^>]*> 000a 477c di \$10 +[0-9a-f]+ <[^>]*> 0000 577c ei +[0-9a-f]+ <[^>]*> 0000 577c ei +[0-9a-f]+ <[^>]*> 000a 577c ei \$10 +[0-9a-f]+ <[^>]*> 0159 e17c rdpgpr \$10,\$25 +[0-9a-f]+ <[^>]*> 0159 f17c wrpgpr \$10,\$25 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips4-branch-likely.d b/gas/testsuite/gas/mips/micromips@mips4-branch-likely.d new file mode 100644 index 0000000..f35c829 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips4-branch-likely.d @@ -0,0 +1,17 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS mips4 branch-likely instructions +#source: mips4-branch-likely.s +#as: -32 + +# Test mips4 branch-likely instructions (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 4384 fffe bc1f \$fcc1,0+0000 + 0: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 43a8 fffe bc1t \$fcc2,0+0006 + 6: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips4-fp.d b/gas/testsuite/gas/mips/micromips@mips4-fp.d new file mode 100644 index 0000000..35131b9 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips4-fp.d @@ -0,0 +1,50 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS mips4 fp +#source: mips4-fp.s +#as: -32 + +# Test mips4 fp instructions (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 4380 fffe bc1f 0+0000 + 0: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4384 fffe bc1f \$fcc1,0+0006 + 6: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 43a4 fffe bc1t \$fcc1,0+000c + c: R_MICROMIPS_PC16_S1 text_label +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 54c4 043c c\.f\.d \$f4,\$f6 +[0-9a-f]+ <[^>]*> 54c4 243c c\.f\.d \$fcc1,\$f4,\$f6 +[0-9a-f]+ <[^>]*> 5485 10c8 ldxc1 \$f2,a0\(a1\) +[0-9a-f]+ <[^>]*> 5485 1048 lwxc1 \$f2,a0\(a1\) +[0-9a-f]+ <[^>]*> 54c4 0089 madd\.d \$f0,\$f2,\$f4,\$f6 +[0-9a-f]+ <[^>]*> 5402 5201 madd\.s \$f10,\$f8,\$f2,\$f0 +[0-9a-f]+ <[^>]*> 5485 817b movf a0,a1,\$fcc4 +[0-9a-f]+ <[^>]*> 5486 0220 movf\.d \$f4,\$f6,\$fcc0 +[0-9a-f]+ <[^>]*> 5486 0020 movf\.s \$f4,\$f6,\$fcc0 +[0-9a-f]+ <[^>]*> 54c6 2138 movn\.d \$f4,\$f6,a2 +[0-9a-f]+ <[^>]*> 54c6 2038 movn\.s \$f4,\$f6,a2 +[0-9a-f]+ <[^>]*> 5485 897b movt a0,a1,\$fcc4 +[0-9a-f]+ <[^>]*> 5486 0260 movt\.d \$f4,\$f6,\$fcc0 +[0-9a-f]+ <[^>]*> 5486 0060 movt\.s \$f4,\$f6,\$fcc0 +[0-9a-f]+ <[^>]*> 54c6 2178 movz\.d \$f4,\$f6,a2 +[0-9a-f]+ <[^>]*> 54c6 2078 movz\.s \$f4,\$f6,a2 +[0-9a-f]+ <[^>]*> 54c4 00a9 msub\.d \$f0,\$f2,\$f4,\$f6 +[0-9a-f]+ <[^>]*> 54c4 00a1 msub\.s \$f0,\$f2,\$f4,\$f6 +[0-9a-f]+ <[^>]*> 54c4 008a nmadd\.d \$f0,\$f2,\$f4,\$f6 +[0-9a-f]+ <[^>]*> 54c4 0082 nmadd\.s \$f0,\$f2,\$f4,\$f6 +[0-9a-f]+ <[^>]*> 54c4 00aa nmsub\.d \$f0,\$f2,\$f4,\$f6 +[0-9a-f]+ <[^>]*> 54c4 00a2 nmsub\.s \$f0,\$f2,\$f4,\$f6 +[0-9a-f]+ <[^>]*> 5485 21a0 prefx 0x4,a0\(a1\) +[0-9a-f]+ <[^>]*> 5486 523b recip\.d \$f4,\$f6 +[0-9a-f]+ <[^>]*> 5486 123b recip\.s \$f4,\$f6 +[0-9a-f]+ <[^>]*> 5486 423b rsqrt\.d \$f4,\$f6 +[0-9a-f]+ <[^>]*> 5486 023b rsqrt\.s \$f4,\$f6 +[0-9a-f]+ <[^>]*> 5485 2108 sdxc1 \$f4,a0\(a1\) +[0-9a-f]+ <[^>]*> 5485 2048 lwxc1 \$f4,a0\(a1\) +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips4.d b/gas/testsuite/gas/mips/micromips@mips4.d new file mode 100644 index 0000000..b5bc0ea --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips4.d @@ -0,0 +1,13 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS mips4 non-fp +#source: mips4.s + +# Test mips4 *non-fp* instructions (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 00c6 2018 movn a0,a2,a2 +[0-9a-f]+ <[^>]*> 00c6 2058 movz a0,a2,a2 +[0-9a-f]+ <[^>]*> 6084 2000 pref 0x4,0\(a0\) + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips5-fp.d b/gas/testsuite/gas/mips/micromips@mips5-fp.d new file mode 100644 index 0000000..f9afb62 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips5-fp.d @@ -0,0 +1,69 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: MIPS mips5 instructions +#source: mips5-fp.s +#stderr: mips5-fp.l + +# Check MIPS V instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 5402 437b abs\.ps \$f0,\$f2 +[0-9a-f]+ <[^>]*> 54c4 1230 add\.ps \$f2,\$f4,\$f6 +[0-9a-f]+ <[^>]*> 5548 30d9 alnv\.ps \$f6,\$f8,\$f10,\$3 +[0-9a-f]+ <[^>]*> 5548 08bc c\.eq\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 48bc c\.eq\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 083c c\.f\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 483c c\.f\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 0bbc c\.le\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 4bbc c\.le\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 0b3c c\.lt\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 4b3c c\.lt\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 0b7c c\.nge\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 4b7c c\.nge\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 0afc c\.ngl\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 4afc c\.ngl\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 0a7c c\.ngle\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 4a7c c\.ngle\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 0bfc c\.ngt\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 4bfc c\.ngt\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 09bc c\.ole\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 49bc c\.ole\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 093c c\.olt\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 493c c\.olt\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 0abc c\.seq\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 4abc c\.seq\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 0a3c c\.sf\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 4a3c c\.sf\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 08fc c\.ueq\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 48fc c\.ueq\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 09fc c\.ule\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 49fc c\.ule\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 097c c\.ult\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 497c c\.ult\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 5548 087c c\.un\.ps \$f8,\$f10 +[0-9a-f]+ <[^>]*> 558a 487c c\.un\.ps \$fcc2,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 560e 6180 cvt\.ps\.s \$f12,\$f14,\$f16 +[0-9a-f]+ <[^>]*> 5612 213b cvt\.s\.pl \$f16,\$f18 +[0-9a-f]+ <[^>]*> 5654 293b cvt\.s\.pu \$f18,\$f20 +[0-9a-f]+ <[^>]*> 5485 a148 luxc1 \$f20,\$4\(\$5\) +[0-9a-f]+ <[^>]*> 5758 a591 madd\.ps \$f20,\$f22,\$f24,\$f26 +[0-9a-f]+ <[^>]*> 571a 407b mov\.ps \$f24,\$f26 +[0-9a-f]+ <[^>]*> 575c 4420 movf\.ps \$f26,\$f28,\$fcc2 +[0-9a-f]+ <[^>]*> 547c d238 movn\.ps \$f26,\$f28,\$3 +[0-9a-f]+ <[^>]*> 579e 8460 movt\.ps \$f28,\$f30,\$fcc4 +[0-9a-f]+ <[^>]*> 54be e278 movz\.ps \$f28,\$f30,\$5 +[0-9a-f]+ <[^>]*> 5482 f031 msub\.ps \$f30,\$f0,\$f2,\$f4 +[0-9a-f]+ <[^>]*> 54c4 12b0 mul\.ps \$f2,\$f4,\$f6 +[0-9a-f]+ <[^>]*> 54c8 4b7b neg\.ps \$f6,\$f8 +[0-9a-f]+ <[^>]*> 558a 3212 nmadd\.ps \$f6,\$f8,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 558a 3232 nmsub\.ps \$f6,\$f8,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 55cc 5080 pll\.ps \$f10,\$f12,\$f14 +[0-9a-f]+ <[^>]*> 5650 70c0 plu\.ps \$f14,\$f16,\$f18 +[0-9a-f]+ <[^>]*> 5692 8100 pul\.ps \$f16,\$f18,\$f20 +[0-9a-f]+ <[^>]*> 5716 a140 puu\.ps \$f20,\$f22,\$f24 +[0-9a-f]+ <[^>]*> 5758 b270 sub\.ps \$f22,\$f24,\$f26 +[0-9a-f]+ <[^>]*> 54c7 d188 suxc1 \$f26,\$6\(\$7\) +[0-9a-f]+ <[^>]*> 558a 68bc c\.eq\.ps \$fcc3,\$f10,\$f12 +[0-9a-f]+ <[^>]*> 575c 6420 movf\.ps \$f26,\$f28,\$fcc3 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips64-cp2.d b/gas/testsuite/gas/mips/micromips@mips64-cp2.d new file mode 100644 index 0000000..a5d01da --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips64-cp2.d @@ -0,0 +1,13 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS MIPS64 cop2 instructions +#source: micromips@mips64-cp2.s +#as: -32 + +# Check MIPS64 cop2 instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section .text: +[0-9a-f]+ <[^>]*> 0064 6d3c dmfc2 v1,\$4 +[0-9a-f]+ <[^>]*> 00c7 7d3c dmtc2 a2,\$7 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@mips64-cp2.s b/gas/testsuite/gas/mips/micromips@mips64-cp2.s new file mode 100644 index 0000000..12e8e6d --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips64-cp2.s @@ -0,0 +1,18 @@ +# Source file to test assembly of MIPS64-derived microMIPS cop2 instructions + + .set noreorder + .set noat + + .globl text_label .text +text_label: + + # Unprivileged coprocessor instructions. + # These tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes. + + # No sel with cp2 for microMIPS. + dmfc2 $3, $4 + dmtc2 $6, $7 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/micromips@mips64.d b/gas/testsuite/gas/mips/micromips@mips64.d new file mode 100644 index 0000000..31936f3 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips64.d @@ -0,0 +1,13 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS MIPS64 instructions +#source: mips64.s +#as: -32 + +# Check MIPS64 instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 5822 4b3c dclo at,v0 +[0-9a-f]+ <[^>]*> 5864 5b3c dclz v1,a0 +#pass diff --git a/gas/testsuite/gas/mips/micromips@mips64r2.d b/gas/testsuite/gas/mips/micromips@mips64r2.d new file mode 100644 index 0000000..3bc759d --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@mips64r2.d @@ -0,0 +1,47 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: MIPS MIPS64r2 instructions +#source: mips64r2.s + +# Check MIPS64r2 instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 5843 002c dext \$2,\$3,0x0,0x1 +[0-9a-f]+ <[^>]*> 5843 f82c dext \$2,\$3,0x0,0x20 +[0-9a-f]+ <[^>]*> 5843 0024 dextm \$2,\$3,0x0,0x21 +[0-9a-f]+ <[^>]*> 5843 f824 dextm \$2,\$3,0x0,0x40 +[0-9a-f]+ <[^>]*> 5843 07ec dext \$2,\$3,0x1f,0x1 +[0-9a-f]+ <[^>]*> 5843 ffec dext \$2,\$3,0x1f,0x20 +[0-9a-f]+ <[^>]*> 5843 07e4 dextm \$2,\$3,0x1f,0x21 +[0-9a-f]+ <[^>]*> 5843 0014 dextu \$2,\$3,0x20,0x1 +[0-9a-f]+ <[^>]*> 5843 f814 dextu \$2,\$3,0x20,0x20 +[0-9a-f]+ <[^>]*> 5843 07d4 dextu \$2,\$3,0x3f,0x1 +[0-9a-f]+ <[^>]*> 5843 5aa4 dextm \$2,\$3,0xa,0x2c +[0-9a-f]+ <[^>]*> 5843 5a94 dextu \$2,\$3,0x2a,0xc +[0-9a-f]+ <[^>]*> 5843 000c dins \$2,\$3,0x0,0x1 +[0-9a-f]+ <[^>]*> 5843 f80c dins \$2,\$3,0x0,0x20 +[0-9a-f]+ <[^>]*> 5843 0004 dinsm \$2,\$3,0x0,0x21 +[0-9a-f]+ <[^>]*> 5843 f804 dinsm \$2,\$3,0x0,0x40 +[0-9a-f]+ <[^>]*> 5843 ffcc dins \$2,\$3,0x1f,0x1 +[0-9a-f]+ <[^>]*> 5843 07c4 dinsm \$2,\$3,0x1f,0x2 +[0-9a-f]+ <[^>]*> 5843 ffc4 dinsm \$2,\$3,0x1f,0x21 +[0-9a-f]+ <[^>]*> 5843 0034 dinsu \$2,\$3,0x20,0x1 +[0-9a-f]+ <[^>]*> 5843 f834 dinsu \$2,\$3,0x20,0x20 +[0-9a-f]+ <[^>]*> 5843 fff4 dinsu \$2,\$3,0x3f,0x1 +[0-9a-f]+ <[^>]*> 5843 aa84 dinsm \$2,\$3,0xa,0x2c +[0-9a-f]+ <[^>]*> 5843 aab4 dinsu \$2,\$3,0x2a,0xc +[0-9a-f]+ <[^>]*> 5b2a e0c8 dror32 \$25,\$10,0x1c +[0-9a-f]+ <[^>]*> 5b2a 20c0 dror \$25,\$10,0x4 +[0-9a-f]+ <[^>]*> 5b2a e0c0 dror \$25,\$10,0x1c +[0-9a-f]+ <[^>]*> 5b2a 20c8 dror32 \$25,\$10,0x4 +[0-9a-f]+ <[^>]*> 5880 c9d0 dnegu \$25,\$4 +[0-9a-f]+ <[^>]*> 5959 c8d0 drorv \$25,\$10,\$25 +[0-9a-f]+ <[^>]*> 5944 c8d0 drorv \$25,\$10,\$4 +[0-9a-f]+ <[^>]*> 5b2a 20c8 dror32 \$25,\$10,0x4 +[0-9a-f]+ <[^>]*> 5944 c8d0 drorv \$25,\$10,\$4 +[0-9a-f]+ <[^>]*> 58e7 7b3c dsbh \$7,\$7 +[0-9a-f]+ <[^>]*> 590a 7b3c dsbh \$8,\$10 +[0-9a-f]+ <[^>]*> 58e7 fb3c dshd \$7,\$7 +[0-9a-f]+ <[^>]*> 590a fb3c dshd \$8,\$10 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@pref.d b/gas/testsuite/gas/mips/micromips@pref.d new file mode 100644 index 0000000..578a797 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@pref.d @@ -0,0 +1,38 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS PREF instruction +#as: -32 --defsym micromips=1 --defsym tpref=1 +#source: cache.s + +# Check MIPS PREF instruction assembly (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 60a2 27ff pref 0x5,2047\(v0\) +[0-9a-f]+ <[^>]*> 60a3 2800 pref 0x5,-2048\(v1\) +[0-9a-f]+ <[^>]*> 3020 1000 li at,4096 +[0-9a-f]+ <[^>]*> 0081 0950 addu at,at,a0 +[0-9a-f]+ <[^>]*> 60a1 2800 pref 0x5,-2048\(at\) +[0-9a-f]+ <[^>]*> 3020 f000 li at,-4096 +[0-9a-f]+ <[^>]*> 00a1 0950 addu at,at,a1 +[0-9a-f]+ <[^>]*> 60a1 27ff pref 0x5,2047\(at\) +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 00c1 0950 addu at,at,a2 +[0-9a-f]+ <[^>]*> 60a1 2fff pref 0x5,-1\(at\) +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 00e1 0950 addu at,at,a3 +[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 0101 0950 addu at,at,t0 +[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 0121 0950 addu at,at,t1 +[0-9a-f]+ <[^>]*> 60a1 2fff pref 0x5,-1\(at\) +[0-9a-f]+ <[^>]*> 5020 9000 li at,0x9000 +[0-9a-f]+ <[^>]*> 0141 0950 addu at,at,t2 +[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 41a1 ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 5021 7000 ori at,at,0x7000 +[0-9a-f]+ <[^>]*> 0161 0950 addu at,at,t3 +[0-9a-f]+ <[^>]*> 60a1 2fff pref 0x5,-1\(at\) + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@relax-at.d b/gas/testsuite/gas/mips/micromips@relax-at.d new file mode 100644 index 0000000..cd92c53 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@relax-at.d @@ -0,0 +1,397 @@ +#as: -KPIC -32 -relax-branch --defsym atk0=1 +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS relax with .set at +#stderr: relax.l +#source: relax.s + +# Test relaxation with .set at (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45da jalr k0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> b462 fffe bne v0,v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 94a4 fffe beq a0,a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 40c2 fffe bgtz v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4083 fffe blez v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4044 fffe bgez a0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4005 fffe bltz a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 43a0 fffe bc1t \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45da jalr k0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> 4003 fffe bltz v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45da jalr k0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> b462 fffe bne v0,v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 94a4 fffe beq a0,a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 40c2 fffe bgtz v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4083 fffe blez v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4044 fffe bgez a0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4005 fffe bltz a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 43a0 fffe bc1t \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45fa jalrs k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4003 fffe bltz v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0002 lw k0,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0187 addiu k0,k0,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45fa jalrs k0 +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45da jalr k0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> b462 fffe bne v0,v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 94a4 fffe beq a0,a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 40c2 fffe bgtz v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4083 fffe blez v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4044 fffe bgez a0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4005 fffe bltz a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 43a0 fffe bc1t \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45da jalr k0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> 4003 fffe bltz v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45da jalr k0 +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> b462 fffe bne v0,v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 94a4 fffe beq a0,a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 40c2 fffe bgtz v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4083 fffe blez v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4044 fffe bgez a0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4005 fffe bltz a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 43a0 fffe bc1t \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 459a jr k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45fa jalrs k0 +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4003 fffe bltz v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> ff5c 0000 lw k0,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 335a 0001 addiu k0,k0,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45fa jalrs k0 +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@relax-swap3.d b/gas/testsuite/gas/mips/micromips@relax-swap3.d new file mode 100644 index 0000000..d84d386 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@relax-swap3.d @@ -0,0 +1,22 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS relaxed macro with branch swapping +#as: -32 +#source: relax-swap3.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 41a2 0000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 bar +[0-9a-f]+ <[^>]*> 3042 0000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 bar +[0-9a-f]+ <[^>]*> 4583 jr v1 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 41a2 0000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 bar +[0-9a-f]+ <[^>]*> 3042 0000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 bar +[0-9a-f]+ <[^>]*> 8dff beqz v1,[0-9a-f]+ <[^>]*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@relax.d b/gas/testsuite/gas/mips/micromips@relax.d new file mode 100644 index 0000000..937148e --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@relax.d @@ -0,0 +1,397 @@ +#as: -KPIC -32 -relax-branch +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS relax +#stderr: relax.l +#source: relax.s + +# Test relaxation (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45c1 jalr at +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> b462 fffe bne v0,v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 94a4 fffe beq a0,a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 40c2 fffe bgtz v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4083 fffe blez v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4044 fffe bgez a0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4005 fffe bltz a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 43a0 fffe bc1t \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45c1 jalr at +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> 4003 fffe bltz v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45c1 jalr at +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> b462 fffe bne v0,v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 94a4 fffe beq a0,a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 40c2 fffe bgtz v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4083 fffe blez v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4044 fffe bgez a0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4005 fffe bltz a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 43a0 fffe bc1t \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45e1 jalrs at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4003 fffe bltz v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0187 addiu at,at,391 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45e1 jalrs at +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45c1 jalr at +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> b462 fffe bne v0,v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 94a4 fffe beq a0,a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 40c2 fffe bgtz v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4083 fffe blez v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4044 fffe bgez a0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4005 fffe bltz a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 43a0 fffe bc1t \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45c1 jalr at +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> 4003 fffe bltz v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45c1 jalr at +[0-9a-f]+ <[^>]*> 0000 0000 nop +([0-9a-f]+) <[^>]*> b462 fffe bne v0,v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 94a4 fffe beq a0,a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 40c2 fffe bgtz v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4083 fffe blez v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4044 fffe bgez a0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4005 fffe bltz a1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 43a0 fffe bc1t \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 4581 jr at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4042 fffe bgez v0,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45e1 jalrs at +[0-9a-f]+ <[^>]*> 0c00 nop +([0-9a-f]+) <[^>]*> 4003 fffe bltz v1,\1 <.*> +[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> fc3c 0000 lw at,0\(gp\) +[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text +[0-9a-f]+ <[^>]*> 3021 0001 addiu at,at,1 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text +[0-9a-f]+ <[^>]*> 45e1 jalrs at +[0-9a-f]+ <[^>]*> 0c00 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@rol-hw.d b/gas/testsuite/gas/mips/micromips@rol-hw.d new file mode 100644 index 0000000..b4826e3 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@rol-hw.d @@ -0,0 +1,29 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS hardware rol/ror +#source: rol.s +#as: -32 + +# Test the rol and ror macros (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 00a0 09d0 negu at,a1 +[0-9a-f]+ <[^>]*> 0081 20d0 rorv a0,a0,at +[0-9a-f]+ <[^>]*> 00c0 21d0 negu a0,a2 +[0-9a-f]+ <[^>]*> 00a4 20d0 rorv a0,a1,a0 +[0-9a-f]+ <[^>]*> 0084 f8c0 ror a0,a0,0x1f +[0-9a-f]+ <[^>]*> 0085 f8c0 ror a0,a1,0x1f +[0-9a-f]+ <[^>]*> 0085 00c0 ror a0,a1,0x0 +[0-9a-f]+ <[^>]*> 0085 20d0 rorv a0,a0,a1 +[0-9a-f]+ <[^>]*> 00a6 20d0 rorv a0,a1,a2 +[0-9a-f]+ <[^>]*> 0084 08c0 ror a0,a0,0x1 +[0-9a-f]+ <[^>]*> 0085 08c0 ror a0,a1,0x1 +[0-9a-f]+ <[^>]*> 0085 00c0 ror a0,a1,0x0 +[0-9a-f]+ <[^>]*> 0085 00c0 ror a0,a1,0x0 +[0-9a-f]+ <[^>]*> 0085 f8c0 ror a0,a1,0x1f +[0-9a-f]+ <[^>]*> 0085 08c0 ror a0,a1,0x1 +[0-9a-f]+ <[^>]*> 0085 00c0 ror a0,a1,0x0 +[0-9a-f]+ <[^>]*> 0085 08c0 ror a0,a1,0x1 +[0-9a-f]+ <[^>]*> 0085 f8c0 ror a0,a1,0x1f + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@uld2-eb.d b/gas/testsuite/gas/mips/micromips@uld2-eb.d new file mode 100644 index 0000000..af3fdf9 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@uld2-eb.d @@ -0,0 +1,21 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: uld2 -EB +#source: uld2.s +#as: -EB + +# Further checks of uld macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 6085 4000 ldl \$4,0\(\$5\) +[0-9a-f]+ <[^>]*> 6085 5007 ldr \$4,7\(\$5\) +[0-9a-f]+ <[^>]*> 6085 4001 ldl \$4,1\(\$5\) +[0-9a-f]+ <[^>]*> 6085 5008 ldr \$4,8\(\$5\) +[0-9a-f]+ <[^>]*> 6025 4000 ldl \$1,0\(\$5\) +[0-9a-f]+ <[^>]*> 6025 5007 ldr \$1,7\(\$5\) +[0-9a-f]+ <[^>]*> 0ca1 move \$5,\$1 +[0-9a-f]+ <[^>]*> 6025 4001 ldl \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 6025 5008 ldr \$1,8\(\$5\) +[0-9a-f]+ <[^>]*> 0ca1 move \$5,\$1 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@uld2-el.d b/gas/testsuite/gas/mips/micromips@uld2-el.d new file mode 100644 index 0000000..c5901ff --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@uld2-el.d @@ -0,0 +1,21 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: uld2 -EL +#source: uld2.s +#as: -EL + +# Further checks of uld macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 6085 4007 ldl \$4,7\(\$5\) +[0-9a-f]+ <[^>]*> 6085 5000 ldr \$4,0\(\$5\) +[0-9a-f]+ <[^>]*> 6085 4008 ldl \$4,8\(\$5\) +[0-9a-f]+ <[^>]*> 6085 5001 ldr \$4,1\(\$5\) +[0-9a-f]+ <[^>]*> 6025 4007 ldl \$1,7\(\$5\) +[0-9a-f]+ <[^>]*> 6025 5000 ldr \$1,0\(\$5\) +[0-9a-f]+ <[^>]*> 0ca1 move \$5,\$1 +[0-9a-f]+ <[^>]*> 6025 4008 ldl \$1,8\(\$5\) +[0-9a-f]+ <[^>]*> 6025 5001 ldr \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 0ca1 move \$5,\$1 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@ulh2-eb.d b/gas/testsuite/gas/mips/micromips@ulh2-eb.d new file mode 100644 index 0000000..2e4d750 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@ulh2-eb.d @@ -0,0 +1,43 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: ulh2 -EB +#source: ulh2.s +#as: -EB -32 + +# Further checks of ulh/ulhu macros (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 1c25 0000 lb \$1,0\(\$5\) +[0-9a-f]+ <[^>]*> 1485 0001 lbu \$4,1\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0024 2290 or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> 1c25 0001 lb \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 1485 0002 lbu \$4,2\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0024 2290 or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> 1c25 0000 lb \$1,0\(\$5\) +[0-9a-f]+ <[^>]*> 14a5 0001 lbu \$5,1\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0025 2a90 or \$5,\$5,\$1 +[0-9a-f]+ <[^>]*> 1c25 0001 lb \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 14a5 0002 lbu \$5,2\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0025 2a90 or \$5,\$5,\$1 +[0-9a-f]+ <[^>]*> 1425 0000 lbu \$1,0\(\$5\) +[0-9a-f]+ <[^>]*> 1485 0001 lbu \$4,1\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0024 2290 or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> 1425 0001 lbu \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 1485 0002 lbu \$4,2\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0024 2290 or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> 1425 0000 lbu \$1,0\(\$5\) +[0-9a-f]+ <[^>]*> 14a5 0001 lbu \$5,1\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0025 2a90 or \$5,\$5,\$1 +[0-9a-f]+ <[^>]*> 1425 0001 lbu \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 14a5 0002 lbu \$5,2\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0025 2a90 or \$5,\$5,\$1 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@ulh2-el.d b/gas/testsuite/gas/mips/micromips@ulh2-el.d new file mode 100644 index 0000000..57a9ae3 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@ulh2-el.d @@ -0,0 +1,43 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: ulh2 -EL +#source: ulh2.s +#as: -EL -32 + +# Further checks of ulh/ulhu macros (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 1c25 0001 lb \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 1485 0000 lbu \$4,0\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0024 2290 or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> 1c25 0002 lb \$1,2\(\$5\) +[0-9a-f]+ <[^>]*> 1485 0001 lbu \$4,1\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0024 2290 or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> 1c25 0001 lb \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 14a5 0000 lbu \$5,0\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0025 2a90 or \$5,\$5,\$1 +[0-9a-f]+ <[^>]*> 1c25 0002 lb \$1,2\(\$5\) +[0-9a-f]+ <[^>]*> 14a5 0001 lbu \$5,1\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0025 2a90 or \$5,\$5,\$1 +[0-9a-f]+ <[^>]*> 1425 0001 lbu \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 1485 0000 lbu \$4,0\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0024 2290 or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> 1425 0002 lbu \$1,2\(\$5\) +[0-9a-f]+ <[^>]*> 1485 0001 lbu \$4,1\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0024 2290 or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> 1425 0001 lbu \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 14a5 0000 lbu \$5,0\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0025 2a90 or \$5,\$5,\$1 +[0-9a-f]+ <[^>]*> 1425 0002 lbu \$1,2\(\$5\) +[0-9a-f]+ <[^>]*> 14a5 0001 lbu \$5,1\(\$5\) +[0-9a-f]+ <[^>]*> 0021 4000 sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> 0025 2a90 or \$5,\$5,\$1 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@ulw2-eb-ilocks.d b/gas/testsuite/gas/mips/micromips@ulw2-eb-ilocks.d new file mode 100644 index 0000000..517a212 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@ulw2-eb-ilocks.d @@ -0,0 +1,21 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: ulw2 -EB interlocked +#source: ulw2.s +#as: -EB -32 + +# Further checks of ulw macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 6085 0000 lwl \$4,0\(\$5\) +[0-9a-f]+ <[^>]*> 6085 1003 lwr \$4,3\(\$5\) +[0-9a-f]+ <[^>]*> 6085 0001 lwl \$4,1\(\$5\) +[0-9a-f]+ <[^>]*> 6085 1004 lwr \$4,4\(\$5\) +[0-9a-f]+ <[^>]*> 6025 0000 lwl \$1,0\(\$5\) +[0-9a-f]+ <[^>]*> 6025 1003 lwr \$1,3\(\$5\) +[0-9a-f]+ <[^>]*> 0ca1 move \$5,\$1 +[0-9a-f]+ <[^>]*> 6025 0001 lwl \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 6025 1004 lwr \$1,4\(\$5\) +[0-9a-f]+ <[^>]*> 0ca1 move \$5,\$1 + \.\.\. diff --git a/gas/testsuite/gas/mips/micromips@ulw2-el-ilocks.d b/gas/testsuite/gas/mips/micromips@ulw2-el-ilocks.d new file mode 100644 index 0000000..a4f7cd8 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@ulw2-el-ilocks.d @@ -0,0 +1,21 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: ulw2 -EL interlocked +#source: ulw2.s +#as: -EL -32 + +# Further checks of ulw macro (microMIPS). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 6085 0003 lwl \$4,3\(\$5\) +[0-9a-f]+ <[^>]*> 6085 1000 lwr \$4,0\(\$5\) +[0-9a-f]+ <[^>]*> 6085 0004 lwl \$4,4\(\$5\) +[0-9a-f]+ <[^>]*> 6085 1001 lwr \$4,1\(\$5\) +[0-9a-f]+ <[^>]*> 6025 0003 lwl \$1,3\(\$5\) +[0-9a-f]+ <[^>]*> 6025 1000 lwr \$1,0\(\$5\) +[0-9a-f]+ <[^>]*> 0ca1 move \$5,\$1 +[0-9a-f]+ <[^>]*> 6025 0004 lwl \$1,4\(\$5\) +[0-9a-f]+ <[^>]*> 6025 1001 lwr \$1,1\(\$5\) +[0-9a-f]+ <[^>]*> 0ca1 move \$5,\$1 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 6e721bd..cbaaa70 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -55,6 +55,10 @@ # The architecture includes the instructions defined # by that MIPS ISA. # +# fpisa3, fpisa4, fpisa5 +# The architecture includes the floating-point +# instructions defined by that MIPS ISA. +# # gpr_ilocks # The architecture interlocks GPRs accesses. (That is, # there are no load delay slots.) @@ -369,16 +373,16 @@ mips_arch_create mips1 32 {} {} \ { -march=mips1 -mtune=mips1 } { -mmips:3000 } mips_arch_create mips2 32 mips1 { gpr_ilocks } \ { -march=mips2 -mtune=mips2 } { -mmips:6000 } -mips_arch_create mips3 64 mips2 {} \ +mips_arch_create mips3 64 mips2 { fpisa3 } \ { -march=mips3 -mtune=mips3 } { -mmips:4000 } -mips_arch_create mips4 64 mips3 {} \ +mips_arch_create mips4 64 mips3 { fpisa4 } \ { -march=mips4 -mtune=mips4 } { -mmips:8000 } -mips_arch_create mips5 64 mips4 {} \ +mips_arch_create mips5 64 mips4 { fpisa5 } \ { -march=mips5 -mtune=mips5 } { -mmips:mips5 } mips_arch_create mips32 32 mips2 {} \ { -march=mips32 -mtune=mips32 } { -mmips:isa32 } \ { mipsisa32-*-* mipsisa32el-*-* } -mips_arch_create mips32r2 32 mips32 { ror } \ +mips_arch_create mips32r2 32 mips32 { fpisa3 fpisa4 fpisa5 ror } \ { -march=mips32r2 -mtune=mips32r2 } \ { -mmips:isa32r2 } \ { mipsisa32r2-*-* mipsisa32r2el-*-* } @@ -391,6 +395,8 @@ mips_arch_create mips64r2 64 mips64 { mips32r2 ror } \ { mipsisa64r2-*-* mipsisa64r2el-*-* } mips_arch_create mips16 32 {} {} \ { -march=mips1 -mips16 } { -mmips:16 } +mips_arch_create micromips 64 mips64r2 {} \ + { -march=mips64 -mmicromips } {} mips_arch_create r3000 32 mips1 {} \ { -march=r3000 -mtune=r3000 } { -mmips:3000 } mips_arch_create r3900 32 mips1 { gpr_ilocks } \ @@ -425,6 +431,7 @@ if { [istarget mips*-*-vxworks*] } { set addr32 [expr [istarget mipstx39*-*-*] || [istarget mips-*-linux*] || [istarget mipsel-*-linux*] || [istarget mips*-*-ecoff]] set has_newabi [expr [istarget *-*-irix6*] || [istarget mips64*-*-linux*]] set no_mips16 [expr !$elf] + set no_micromips [expr !$elf] if { [istarget "mips*-*-*linux*"] || [istarget "mips*-sde-elf*"] } then { set tmips "t" @@ -439,6 +446,9 @@ if { [istarget mips*-*-vxworks*] } { if { $no_mips16 } { mips_arch_destroy mips16 } + if { $no_micromips } { + mips_arch_destroy micromips + } run_dump_test_arches "abs" [mips_arch_list_matching mips1] run_dump_test_arches "add" [mips_arch_list_matching mips1] @@ -476,22 +486,39 @@ if { [istarget mips*-*-vxworks*] } { } else { run_dump_test "jal" } + run_dump_test_arches "jal-mask-11" [mips_arch_list_matching mips1] + run_dump_test_arches "jal-mask-12" [mips_arch_list_matching mips1] + run_dump_test_arches "jal-mask-21" [mips_arch_list_matching micromips] + run_dump_test_arches "jal-mask-22" [mips_arch_list_matching micromips] run_dump_test "eret-1" run_dump_test "eret-2" run_dump_test "eret-3" - run_dump_test_arches "24k-branch-delay-1" [mips_arch_list_matching mips1] + run_dump_test_arches "24k-branch-delay-1" \ + [mips_arch_list_matching mips1 !micromips] run_dump_test_arches "24k-triple-stores-1" \ - [mips_arch_list_matching mips32r2 !octeon] - run_dump_test_arches "24k-triple-stores-2" [mips_arch_list_matching mips2] - run_dump_test_arches "24k-triple-stores-3" [mips_arch_list_matching mips3] - run_dump_test_arches "24k-triple-stores-4" [mips_arch_list_matching mips2] - run_dump_test_arches "24k-triple-stores-5" [mips_arch_list_matching mips1] - run_dump_test_arches "24k-triple-stores-6" [mips_arch_list_matching mips2] - run_dump_test_arches "24k-triple-stores-7" [mips_arch_list_matching mips2] - run_dump_test_arches "24k-triple-stores-8" [mips_arch_list_matching mips1] - run_dump_test_arches "24k-triple-stores-9" [mips_arch_list_matching mips1] - run_dump_test_arches "24k-triple-stores-10" [mips_arch_list_matching mips1] - run_dump_test_arches "24k-triple-stores-11" [mips_arch_list_matching mips1] + [mips_arch_list_matching fpisa5 !octeon !micromips] + run_dump_test_arches "24k-triple-stores-2" \ + [mips_arch_list_matching mips2 !micromips] + run_dump_test_arches "24k-triple-stores-3" \ + [mips_arch_list_matching mips2 !micromips] + run_dump_test_arches "24k-triple-stores-4" \ + [mips_arch_list_matching mips2 !micromips] + run_dump_test_arches "24k-triple-stores-5" \ + [mips_arch_list_matching mips1 !micromips] + run_dump_test_arches "24k-triple-stores-6" \ + [mips_arch_list_matching mips2 !micromips] + run_dump_test_arches "24k-triple-stores-7" \ + [mips_arch_list_matching mips2 !micromips] + run_dump_test_arches "24k-triple-stores-8" \ + [mips_arch_list_matching mips1 !micromips] + run_dump_test_arches "24k-triple-stores-9" \ + [mips_arch_list_matching mips1 !micromips] + run_dump_test_arches "24k-triple-stores-10" \ + [mips_arch_list_matching mips1 !micromips] + if $elf { + run_dump_test_arches "24k-triple-stores-11" \ + [mips_arch_list_matching mips1 !micromips] + } if $elf { run_dump_test_arches "jal-svr4pic" \ @@ -600,14 +627,14 @@ if { [istarget mips*-*-vxworks*] } { if $elf { run_dump_test "lif-svr4pic" } if $elf { run_dump_test "lif-xgot" } run_dump_test_arches "mips4" [mips_arch_list_matching mips4] - run_dump_test_arches "mips4-fp" [mips_arch_list_matching mips4] + run_dump_test_arches "mips4-fp" [mips_arch_list_matching fpisa4] run_list_test_arches "mips4-fp" "-32 -msoft-float" \ - [mips_arch_list_matching mips4] + [mips_arch_list_matching fpisa4] run_dump_test_arches "mips4-branch-likely" \ [mips_arch_list_matching mips4] run_list_test_arches "mips4-branch-likely" "-32 -msoft-float" \ [mips_arch_list_matching mips4] - run_dump_test_arches "mips5" [mips_arch_list_matching mips5] + run_dump_test_arches "mips5-fp" [mips_arch_list_matching fpisa5] run_dump_test "mul" run_dump_test_arches "rol" [mips_arch_list_matching mips1 !ror] @@ -646,7 +673,8 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "mips16" run_dump_test "mips16-64" # Check MIPS16e extensions - run_dump_test_arches "mips16e" [mips_arch_list_matching mips32] + run_dump_test_arches "mips16e" \ + [mips_arch_list_matching mips32 !micromips] # Check jalx handling run_dump_test "mips16-jalx" run_dump_test "mips-jalx" @@ -675,6 +703,7 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "sync" run_dump_test_arches "mips32" [mips_arch_list_matching mips32] + run_dump_test_arches "mips32-imm" [mips_arch_list_matching mips32] run_dump_test_arches "mips32-sf32" [mips_arch_list_matching mips32] run_list_test_arches "mips32-sf32" "-32 -msoft-float" \ @@ -720,8 +749,10 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "relax-swap1-mips1" run_dump_test "relax-swap1-mips2" run_dump_test "relax-swap2" + run_dump_test_arches "relax-swap3" [mips_arch_list_all] run_list_test_arches "relax-bposge" "-mdsp -relax-branch" \ - [mips_arch_list_matching mips64r2] + [mips_arch_list_matching mips64r2 \ + !micromips] run_list_test "illegal" "-32" run_list_test "baddata1" "-32" @@ -763,6 +794,10 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "elf_ase_mips16" run_dump_test "elf_ase_mips16-2" } + if { !$no_micromips } { + run_dump_test "elf_ase_micromips" + run_dump_test "elf_ase_micromips-2" + } run_dump_test "mips-gp32-fp32-pic" run_dump_test "mips-gp32-fp64-pic" @@ -851,6 +886,11 @@ if { [istarget mips*-*-vxworks*] } { [mips_arch_list_matching mips1] run_dump_test_arches "branch-misc-4-64" \ [mips_arch_list_matching mips3] + + run_dump_test_arches "loc-swap" [mips_arch_list_all] + run_dump_test_arches "loc-swap-dis" \ + [mips_arch_list_all] + run_dump_test_arches "loc-swap-2" [mips_arch_list_all] } if $has_newabi { @@ -992,9 +1032,32 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "mips32-sync" run_dump_test_arches "mips32r2-sync" \ [mips_arch_list_matching mips32r2] - run_dump_test_arches "alnv_ps-swap" [lsort -dictionary -unique [concat \ - [mips_arch_list_matching mips5] \ - [mips_arch_list_matching mips32r2] ] ] + run_dump_test_arches "alnv_ps-swap" [mips_arch_list_matching fpisa5] + run_dump_test_arches "cache" [lsort -dictionary -unique [concat \ + [mips_arch_list_matching mips3] \ + [mips_arch_list_matching mips32] ] ] + run_dump_test_arches "daddi" [mips_arch_list_matching mips3] + run_dump_test_arches "pref" [lsort -dictionary -unique [concat \ + [mips_arch_list_matching mips4] \ + [mips_arch_list_matching mips32] ] ] if $has_newabi { run_dump_test "cfi-n64-1" } + + run_dump_test "pr12915" + run_dump_test "reginfo-1a" + run_dump_test "reginfo-1b" + + if { !$no_micromips } { + run_dump_test "micromips" + run_dump_test "micromips-trap" + run_list_test "micromips-size-0" \ + "-32 -march=mips64 -mmicromips" "microMIPS instruction size 0" + run_dump_test "micromips-size-1" + run_dump_test "micromips-branch-relax" + run_dump_test "micromips-branch-relax-pic" + run_dump_test "micromips-branch-delay" + } + + run_dump_test_arches "mcu" [mips_arch_list_matching mips32r2 \ + !octeon] } diff --git a/gas/testsuite/gas/mips/mips16-e.d b/gas/testsuite/gas/mips/mips16-e.d index b8134dc..15e5587d 100644 --- a/gas/testsuite/gas/mips/mips16-e.d +++ b/gas/testsuite/gas/mips/mips16-e.d @@ -1,4 +1,4 @@ -#objdump: -rst -mips16 +#objdump: -rst --special-syms -mips16 #name: MIPS16 reloc #as: -32 -mips16 @@ -31,7 +31,7 @@ OFFSET [ ]+ TYPE VALUE Contents of section \.text: 0000 65006500 65006500 65006500 65006500 .* Contents of section \.reginfo: - 0000 00000001 00000000 00000000 00000000 .* + 0000 00010000 00000000 00000000 00000000 .* 0010 00000000 00000000 .* Contents of section foo: 0000 00000000 00000008 00000000 00000003 .* diff --git a/gas/testsuite/gas/mips/mips16-f.d b/gas/testsuite/gas/mips/mips16-f.d index 84deb36..9a2ce3b 100644 --- a/gas/testsuite/gas/mips/mips16-f.d +++ b/gas/testsuite/gas/mips/mips16-f.d @@ -24,7 +24,7 @@ OFFSET [ ]+ TYPE VALUE Contents of section \.text: 0000 65006500 65006500 65006500 65006500 .* Contents of section \.reginfo: - 0000 00000001 00000000 00000000 00000000 .* + 0000 00010000 00000000 00000000 00000000 .* 0010 00000000 00000000 .* Contents of section foo: 0000 00000003 00000000 00000000 00000000 .* diff --git a/gas/testsuite/gas/mips/mips16@loc-swap-2.d b/gas/testsuite/gas/mips/mips16@loc-swap-2.d new file mode 100644 index 0000000..b00736c --- /dev/null +++ b/gas/testsuite/gas/mips/mips16@loc-swap-2.d @@ -0,0 +1,49 @@ +#PROG: readelf +#readelf: -wl +#name: MIPS DWARF-2 location information with branch swapping (2) +#as: -32 +#source: loc-swap-2.s + +Raw dump of debug contents of section .debug_line: + + Offset: 0x0 + Length: 60 + DWARF Version: 2 + Prologue Length: 35 + Minimum Instruction Length: 1 + Initial value of 'is_stmt': 1 + Line Base: -5 + Line Range: 14 + Opcode Base: 13 + + Opcodes: + Opcode 1 has 0 args + Opcode 2 has 1 args + Opcode 3 has 1 args + Opcode 4 has 1 args + Opcode 5 has 1 args + Opcode 6 has 0 args + Opcode 7 has 0 args + Opcode 8 has 0 args + Opcode 9 has 1 args + Opcode 10 has 0 args + Opcode 11 has 0 args + Opcode 12 has 1 args + + The Directory Table is empty. + + The File Name Table: + Entry Dir Time Size Name + 1 0 0 0 loc-swap-2.s + + Line Number Statements: + Extended opcode 2: set Address to 0x1 + Special opcode 11: advance Address by 0 to 0x1 and Line by 6 to 7 + Special opcode 7: advance Address by 0 to 0x1 and Line by 2 to 9 + Special opcode 6: advance Address by 0 to 0x1 and Line by 1 to 10 + Special opcode 64: advance Address by 4 to 0x5 and Line by 3 to 13 + Special opcode 34: advance Address by 2 to 0x7 and Line by 1 to 14 + Special opcode 6: advance Address by 0 to 0x7 and Line by 1 to 15 + Special opcode 35: advance Address by 2 to 0x9 and Line by 2 to 17 + Advance PC by 1 to 0xa + Extended opcode 1: End of Sequence diff --git a/gas/testsuite/gas/mips/mips16@loc-swap-dis.d b/gas/testsuite/gas/mips/mips16@loc-swap-dis.d new file mode 100644 index 0000000..fd698ea --- /dev/null +++ b/gas/testsuite/gas/mips/mips16@loc-swap-dis.d @@ -0,0 +1,35 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS DWARF-2 location information with branch swapping disassembly +#as: -32 +#source: loc-swap.s + +# Check branch swapping with DWARF-2 location information (MIPS16). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 6790 move a0,s0 +[0-9a-f]+ <[^>]*> ec00 jr a0 +[0-9a-f]+ <[^>]*> 6500 nop +[0-9a-f]+ <[^>]*> ec00 jr a0 +[0-9a-f]+ <[^>]*> 65f8 move ra,s0 +[0-9a-f]+ <[^>]*> e820 jr ra +[0-9a-f]+ <[^>]*> 6790 move a0,s0 +[0-9a-f]+ <[^>]*> 65f8 move ra,s0 +[0-9a-f]+ <[^>]*> e820 jr ra +[0-9a-f]+ <[^>]*> 6500 nop +[0-9a-f]+ <[^>]*> 6790 move a0,s0 +[0-9a-f]+ <[^>]*> ec40 jalr a0 +[0-9a-f]+ <[^>]*> 6500 nop +[0-9a-f]+ <[^>]*> 65f8 move ra,s0 +[0-9a-f]+ <[^>]*> ec40 jalr a0 +[0-9a-f]+ <[^>]*> 6500 nop +[0-9a-f]+ <[^>]*> 1800 0000 jal 0+0000 +[ ]*[0-9a-f]+: R_MIPS16_26 bar +[0-9a-f]+ <[^>]*> 6790 move a0,s0 +[0-9a-f]+ <[^>]*> 65f8 move ra,s0 +[0-9a-f]+ <[^>]*> 1800 0000 jal 0+0000 +[ ]*[0-9a-f]+: R_MIPS16_26 bar +[0-9a-f]+ <[^>]*> 6500 nop +[0-9a-f]+ <[^>]*> 6500 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/mips16@loc-swap.d b/gas/testsuite/gas/mips/mips16@loc-swap.d new file mode 100644 index 0000000..fdae485 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16@loc-swap.d @@ -0,0 +1,61 @@ +#PROG: readelf +#readelf: -wl +#name: MIPS DWARF-2 location information with branch swapping +#as: -32 +#source: loc-swap.s + +# Verify that DWARF-2 location information for instructions reordered +# into a branch delay slot is updated to point to the branch instead. + +Raw dump of debug contents of section \.debug_line: + + Offset: 0x0 + Length: 67 + DWARF Version: 2 + Prologue Length: 33 + Minimum Instruction Length: 1 + Initial value of 'is_stmt': 1 + Line Base: -5 + Line Range: 14 + Opcode Base: 13 + + Opcodes: + Opcode 1 has 0 args + Opcode 2 has 1 args + Opcode 3 has 1 args + Opcode 4 has 1 args + Opcode 5 has 1 args + Opcode 6 has 0 args + Opcode 7 has 0 args + Opcode 8 has 0 args + Opcode 9 has 1 args + Opcode 10 has 0 args + Opcode 11 has 0 args + Opcode 12 has 1 args + + The Directory Table is empty\. + + The File Name Table: + Entry Dir Time Size Name + 1 0 0 0 loc-swap\.s + + Line Number Statements: + Extended opcode 2: set Address to 0x1 + Special opcode 11: advance Address by 0 to 0x1 and Line by 6 to 7 + Special opcode 35: advance Address by 2 to 0x3 and Line by 2 to 9 + Special opcode 64: advance Address by 4 to 0x7 and Line by 3 to 12 + Special opcode 7: advance Address by 0 to 0x7 and Line by 2 to 14 + Special opcode 64: advance Address by 4 to 0xb and Line by 3 to 17 + Special opcode 7: advance Address by 0 to 0xb and Line by 2 to 19 + Special opcode 64: advance Address by 4 to 0xf and Line by 3 to 22 + Special opcode 35: advance Address by 2 to 0x11 and Line by 2 to 24 + Special opcode 64: advance Address by 4 to 0x15 and Line by 3 to 27 + Special opcode 35: advance Address by 2 to 0x17 and Line by 2 to 29 + Special opcode 64: advance Address by 4 to 0x1b and Line by 3 to 32 + Special opcode 35: advance Address by 2 to 0x1d and Line by 2 to 34 + Special opcode 64: advance Address by 4 to 0x21 and Line by 3 to 37 + Special opcode 7: advance Address by 0 to 0x21 and Line by 2 to 39 + Special opcode 92: advance Address by 6 to 0x27 and Line by 3 to 42 + Special opcode 35: advance Address by 2 to 0x29 and Line by 2 to 44 + Advance PC by 23 to 0x40 + Extended opcode 1: End of Sequence diff --git a/gas/testsuite/gas/mips/mips16@relax-swap3.d b/gas/testsuite/gas/mips/mips16@relax-swap3.d new file mode 100644 index 0000000..49949b4 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16@relax-swap3.d @@ -0,0 +1,15 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS relaxed macro with branch swapping +#as: -32 +#source: relax-swap3.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 0a00 la v0,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> eb00 jr v1 +[0-9a-f]+ <[^>]*> 6500 nop +[0-9a-f]+ <[^>]*> f7ff 0a1c la v0,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 2300 beqz v1,[0-9a-f]+ <[^>]*> + \.\.\. +#pass diff --git a/gas/testsuite/gas/mips/mips32-imm.d b/gas/testsuite/gas/mips/mips32-imm.d new file mode 100644 index 0000000..8e2ea5f --- /dev/null +++ b/gas/testsuite/gas/mips/mips32-imm.d @@ -0,0 +1,12 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS MIPS32 WAIT and SDBBP instructions +#as: -32 + +# Check MIPS32 WAIT and SDBBP instruction assembly + +.*: +file format .*mips.* + +Disassembly of section .text: +[0-9a-f]+ <[^>]*> 4359e260 wait 0x56789 +[0-9a-f]+ <[^>]*> 7159e27f sdbbp 0x56789 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips32-imm.s b/gas/testsuite/gas/mips/mips32-imm.s new file mode 100644 index 0000000..047d9a5 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32-imm.s @@ -0,0 +1,14 @@ +# Source file to test wide immediates with MIPS32 WAIT and SDBBP instructions + + .set noreorder + .set noat + + .text +text_label: + + # 20 bits accepted for MIPS32 + wait 0x56789 + sdbbp 0x56789 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff --git a/gas/testsuite/gas/mips/mips32.d b/gas/testsuite/gas/mips/mips32.d index afcdfd4e..bc8c311 100644 --- a/gas/testsuite/gas/mips/mips32.d +++ b/gas/testsuite/gas/mips/mips32.d @@ -15,12 +15,12 @@ Disassembly of section .text: 0+0014 <[^>]*> 716c0005 msubu t3,t4 0+0018 <[^>]*> 71cf6802 mul t5,t6,t7 0+001c <[^>]*> ce040000 pref 0x4,0\(s0\) -0+0020 <[^>]*> ce247fff pref 0x4,32767\(s1\) -0+0024 <[^>]*> ce448000 pref 0x4,-32768\(s2\) +0+0020 <[^>]*> ce2407ff pref 0x4,2047\(s1\) +0+0024 <[^>]*> ce44f800 pref 0x4,-2048\(s2\) 0+0028 <[^>]*> 00000040 ssnop 0+002c <[^>]*> bc250000 cache 0x5,0\(at\) -0+0030 <[^>]*> bc457fff cache 0x5,32767\(v0\) -0+0034 <[^>]*> bc658000 cache 0x5,-32768\(v1\) +0+0030 <[^>]*> bc4507ff cache 0x5,2047\(v0\) +0+0034 <[^>]*> bc65f800 cache 0x5,-2048\(v1\) 0+0038 <[^>]*> 3c010001 lui at,0x1 0+003c <[^>]*> 00240821 addu at,at,a0 0+0040 <[^>]*> bc258000 cache 0x5,-32768\(at\) @@ -38,12 +38,12 @@ Disassembly of section .text: 0+0070 <[^>]*> 42000006 tlbwr 0+0074 <[^>]*> 42000020 wait 0+0078 <[^>]*> 42000020 wait -0+007c <[^>]*> 4359e260 wait 0x56789 +0+007c <[^>]*> 4200d160 wait 0x345 0+0080 <[^>]*> 0000000d break 0+0084 <[^>]*> 0000000d break 0+0088 <[^>]*> 0345000d break 0x345 0+008c <[^>]*> 0048d14d break 0x48,0x345 0+0090 <[^>]*> 7000003f sdbbp 0+0094 <[^>]*> 7000003f sdbbp -0+0098 <[^>]*> 7159e27f sdbbp 0x56789 +0+0098 <[^>]*> 7000d17f sdbbp 0x345 \.\.\. diff --git a/gas/testsuite/gas/mips/mips32.s b/gas/testsuite/gas/mips/mips32.s index 9b3e44c..5051d5a 100644 --- a/gas/testsuite/gas/mips/mips32.s +++ b/gas/testsuite/gas/mips/mips32.s @@ -16,16 +16,16 @@ text_label: msubu $11, $12 mul $13, $14, $15 pref 4, ($16) - pref 4, 32767($17) - pref 4, -32768($18) + pref 4, 2047($17) + pref 4, -2048($18) ssnop # privileged instructions cache 5, ($1) - cache 5, 32767($2) - cache 5, -32768($3) + cache 5, 2047($2) + cache 5, -2048($3) .set at cache 5, 32768($4) cache 5, -32769($5) @@ -39,7 +39,7 @@ text_label: tlbwr wait wait 0 # disassembles without code - wait 0x56789 + wait 0x345 # For a while break for the mips32 ISA interpreted a single argument # as a 20-bit code, placing it in the opcode differently to @@ -54,7 +54,7 @@ text_label: # different. sdbbp sdbbp 0 # disassembles without code - sdbbp 0x56789 + sdbbp 0x345 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... .space 8 diff --git a/gas/testsuite/gas/mips/mips4-fp.s b/gas/testsuite/gas/mips/mips4-fp.s index 5d28aea..d8331c4 100644 --- a/gas/testsuite/gas/mips/mips4-fp.s +++ b/gas/testsuite/gas/mips/mips4-fp.s @@ -36,7 +36,6 @@ text_label: sdxc1 $f4,$4($5) swxc1 $f4,$4($5) -# Round to a 16 byte boundary, for ease in testing multiple targets. - nop - nop - nop +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/mips4.s b/gas/testsuite/gas/mips/mips4.s index 9bc0551..7f5457c 100644 --- a/gas/testsuite/gas/mips/mips4.s +++ b/gas/testsuite/gas/mips/mips4.s @@ -6,7 +6,6 @@ text_label: # It used to be disabled due to a clash with lwc3. pref 4,0($4) -# Round to a 16 byte boundary, for ease in testing multiple targets. - nop - nop - nop +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/mips5.d b/gas/testsuite/gas/mips/mips5-fp.d similarity index 99% rename from gas/testsuite/gas/mips/mips5.d rename to gas/testsuite/gas/mips/mips5-fp.d index e313f56..a114a0b 100644 --- a/gas/testsuite/gas/mips/mips5.d +++ b/gas/testsuite/gas/mips/mips5-fp.d @@ -1,6 +1,6 @@ #objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric #name: MIPS mips5 instructions -#stderr: mips5.l +#stderr: mips5-fp.l # Check MIPS V instruction assembly diff --git a/gas/testsuite/gas/mips/mips5.l b/gas/testsuite/gas/mips/mips5-fp.l similarity index 100% rename from gas/testsuite/gas/mips/mips5.l rename to gas/testsuite/gas/mips/mips5-fp.l diff --git a/gas/testsuite/gas/mips/mips5.s b/gas/testsuite/gas/mips/mips5-fp.s similarity index 100% rename from gas/testsuite/gas/mips/mips5.s rename to gas/testsuite/gas/mips/mips5-fp.s diff --git a/gas/testsuite/gas/mips/mipsel16-e.d b/gas/testsuite/gas/mips/mipsel16-e.d index be84fe3..eaff6d8 100644 --- a/gas/testsuite/gas/mips/mipsel16-e.d +++ b/gas/testsuite/gas/mips/mipsel16-e.d @@ -1,4 +1,4 @@ -#objdump: -rst -mips16 +#objdump: -rst --special-syms -mips16 #name: MIPS16 reloc #as: -32 -mips16 #source: mips16-e.s @@ -32,7 +32,7 @@ OFFSET [ ]+ TYPE VALUE Contents of section \.text: 0000 00650065 00650065 00650065 00650065 .* Contents of section \.reginfo: - 0000 01000000 00000000 00000000 00000000 .* + 0000 00000100 00000000 00000000 00000000 .* 0010 00000000 00000000 .* Contents of section foo: 0000 00000000 08000000 00000000 03000000 .* diff --git a/gas/testsuite/gas/mips/mipsel16-f.d b/gas/testsuite/gas/mips/mipsel16-f.d index 9331f10..8c1e2ea 100644 --- a/gas/testsuite/gas/mips/mipsel16-f.d +++ b/gas/testsuite/gas/mips/mipsel16-f.d @@ -25,7 +25,7 @@ OFFSET [ ]+ TYPE VALUE Contents of section \.text: 0000 00650065 00650065 00650065 00650065 .* Contents of section \.reginfo: - 0000 01000000 00000000 00000000 00000000 .* + 0000 00000100 00000000 00000000 00000000 .* 0010 00000000 00000000 .* Contents of section foo: 0000 03000000 00000000 00000000 00000000 .* diff --git a/gas/testsuite/gas/mips/pr12915.d b/gas/testsuite/gas/mips/pr12915.d new file mode 100644 index 0000000..95e4e2d --- /dev/null +++ b/gas/testsuite/gas/mips/pr12915.d @@ -0,0 +1,15 @@ +#as: -32 -mips1 +#objdump: -dr + +.* + + +Disassembly of section \.text: + +00000000 <\.text>: + 0: 3c1b0000 lui k1,0x0 + 0: R_MIPS_HI16 kernelsp + 4: 8f7b0000 lw k1,0\(k1\) + 4: R_MIPS_LO16 kernelsp + 8: 401c7000 mfc0 gp,c0_epc + c: 279c0004 addiu gp,gp,4 diff --git a/gas/testsuite/gas/mips/pr12915.s b/gas/testsuite/gas/mips/pr12915.s new file mode 100644 index 0000000..6de26ca --- /dev/null +++ b/gas/testsuite/gas/mips/pr12915.s @@ -0,0 +1,5 @@ + lui $27, %hi(kernelsp) + lw $27, %lo(kernelsp)($27) + .set noreorder + mfc0 $28, $14 + addu $28, 4 diff --git a/gas/testsuite/gas/mips/pref.d b/gas/testsuite/gas/mips/pref.d new file mode 100644 index 0000000..2725fe7 --- /dev/null +++ b/gas/testsuite/gas/mips/pref.d @@ -0,0 +1,29 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS PREF instruction +#as: -32 --defsym tpref=1 +#source: cache.s + +# Check MIPS PREF instruction assembly. + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> cc4507ff pref 0x5,2047\(v0\) +[0-9a-f]+ <[^>]*> cc65f800 pref 0x5,-2048\(v1\) +[0-9a-f]+ <[^>]*> cc850800 pref 0x5,2048\(a0\) +[0-9a-f]+ <[^>]*> cca5f7ff pref 0x5,-2049\(a1\) +[0-9a-f]+ <[^>]*> ccc57fff pref 0x5,32767\(a2\) +[0-9a-f]+ <[^>]*> cce58000 pref 0x5,-32768\(a3\) +[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1 +[0-9a-f]+ <[^>]*> 00280821 addu at,at,t0 +[0-9a-f]+ <[^>]*> cc258000 pref 0x5,-32768\(at\) +[0-9a-f]+ <[^>]*> 3c01ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 00290821 addu at,at,t1 +[0-9a-f]+ <[^>]*> cc257fff pref 0x5,32767\(at\) +[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1 +[0-9a-f]+ <[^>]*> 002a0821 addu at,at,t2 +[0-9a-f]+ <[^>]*> cc259000 pref 0x5,-28672\(at\) +[0-9a-f]+ <[^>]*> 3c01ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 002b0821 addu at,at,t3 +[0-9a-f]+ <[^>]*> cc256fff pref 0x5,28671\(at\) + \.\.\. diff --git a/gas/testsuite/gas/mips/reginfo-1.s b/gas/testsuite/gas/mips/reginfo-1.s new file mode 100644 index 0000000..927c54d --- /dev/null +++ b/gas/testsuite/gas/mips/reginfo-1.s @@ -0,0 +1,3 @@ + ldc1 $f4,($4) + add.s $f10,$f10,$f10 + add.d $f16,$f16,$f16 diff --git a/gas/testsuite/gas/mips/reginfo-1a.d b/gas/testsuite/gas/mips/reginfo-1a.d new file mode 100644 index 0000000..792d51d --- /dev/null +++ b/gas/testsuite/gas/mips/reginfo-1a.d @@ -0,0 +1,9 @@ +#source: reginfo-1.s +#as: -32 -EL -mips4 +#objdump: -sj.reginfo + +.* + +Contents of section \.reginfo: + 0000 10000000 00000000 30040300 00000000 .* + 0010 00000000 00000000 .* diff --git a/gas/testsuite/gas/mips/reginfo-1b.d b/gas/testsuite/gas/mips/reginfo-1b.d new file mode 100644 index 0000000..b0d42c2 --- /dev/null +++ b/gas/testsuite/gas/mips/reginfo-1b.d @@ -0,0 +1,9 @@ +#source: reginfo-1.s +#as: -mabi=o64 -EB -mips4 +#objdump: -sj.reginfo + +.* + +Contents of section \.reginfo: + 0000 00000010 00000000 00010410 00000000 .* + 0010 00000000 00000000 .* diff --git a/gas/testsuite/gas/mips/relax-at.d b/gas/testsuite/gas/mips/relax-at.d index 907069e..fdb6ef5 100644 --- a/gas/testsuite/gas/mips/relax-at.d +++ b/gas/testsuite/gas/mips/relax-at.d @@ -394,3 +394,4 @@ Disassembly of section \.text: 20494: R_MIPS_LO16 \.text 00020498 jalr k0 0002049c nop + \.\.\. diff --git a/gas/testsuite/gas/mips/relax-swap3.d b/gas/testsuite/gas/mips/relax-swap3.d new file mode 100644 index 0000000..fcc509b --- /dev/null +++ b/gas/testsuite/gas/mips/relax-swap3.d @@ -0,0 +1,21 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS relaxed macro with branch swapping +#as: -32 +#source: relax-swap3.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 3c020000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MIPS_HI16 bar +[0-9a-f]+ <[^>]*> 24420000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MIPS_LO16 bar +[0-9a-f]+ <[^>]*> 00600008 jr v1 +[0-9a-f]+ <[^>]*> 00000000 nop +[0-9a-f]+ <[^>]*> 3c020000 lui v0,0x0 +[ ]*[0-9a-f]+: R_MIPS_HI16 bar +[0-9a-f]+ <[^>]*> 24420000 addiu v0,v0,0 +[ ]*[0-9a-f]+: R_MIPS_LO16 bar +[0-9a-f]+ <[^>]*> 10600001 beqz v1,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 00000000 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/relax-swap3.s b/gas/testsuite/gas/mips/relax-swap3.s new file mode 100644 index 0000000..497ecf8 --- /dev/null +++ b/gas/testsuite/gas/mips/relax-swap3.s @@ -0,0 +1,14 @@ +# Source file used to check the lack of branch swapping with a relaxed macro. + + .text +foo: + la $2, bar + jr $3 + + la $2, bar + beqz $3, 0f +0: + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/relax.d b/gas/testsuite/gas/mips/relax.d index 9d69c8a..d5e40eb 100644 --- a/gas/testsuite/gas/mips/relax.d +++ b/gas/testsuite/gas/mips/relax.d @@ -393,3 +393,4 @@ Disassembly of section \.text: 20494: R_MIPS_LO16 \.text 00020498 jalr at 0002049c nop + \.\.\. diff --git a/gas/testsuite/gas/mips/relax.s b/gas/testsuite/gas/mips/relax.s index e8fcc2a..6181d90 100644 --- a/gas/testsuite/gas/mips/relax.s +++ b/gas/testsuite/gas/mips/relax.s @@ -59,3 +59,7 @@ bar: bltzall $2, foo bgezall $3, foo + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/s_d-n32.d b/gas/testsuite/gas/mips/s_d-n32.d index 188b824..7848573 100644 --- a/gas/testsuite/gas/mips/s_d-n32.d +++ b/gas/testsuite/gas/mips/s_d-n32.d @@ -30,357 +30,357 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\) [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 \.\.\. diff --git a/gas/testsuite/gas/mips/s_d-n64.d b/gas/testsuite/gas/mips/s_d-n64.d index 09293fb..84c2550 100644 --- a/gas/testsuite/gas/mips/s_d-n64.d +++ b/gas/testsuite/gas/mips/s_d-n64.d @@ -30,1389 +30,1389 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\) [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 \.\.\. diff --git a/gas/testsuite/gas/mips/s_d.d b/gas/testsuite/gas/mips/s_d.d index 0015cc6..7395a1c 100644 --- a/gas/testsuite/gas/mips/s_d.d +++ b/gas/testsuite/gas/mips/s_d.d @@ -30,357 +30,357 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\) [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|-16384)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,(1|4097)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,(1|8193)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,(1|-16383)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|14939)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|-16384)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,(1|4097)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,(1|8193)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sdc1 \$f4,(1|-16383)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|14939)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? \.\.\. diff --git a/gas/testsuite/gas/mips/sd-n32.d b/gas/testsuite/gas/mips/sd-n32.d index 324f53c..9de0f0b 100644 --- a/gas/testsuite/gas/mips/sd-n32.d +++ b/gas/testsuite/gas/mips/sd-n32.d @@ -30,357 +30,357 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,-23131\(at\) [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [0-9a-f]+ <[^>]*> addu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 \.\.\. diff --git a/gas/testsuite/gas/mips/sd-n64.d b/gas/testsuite/gas/mips/sd-n64.d index aa970d7..600c8f2 100644 --- a/gas/testsuite/gas/mips/sd-n64.d +++ b/gas/testsuite/gas/mips/sd-n64.d @@ -30,1389 +30,1389 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,-23131\(at\) [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> sd a0,0\(gp\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_data_label\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_data_label\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 small_external_common\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 small_external_common\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> daddu at,a1,gp [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_GPREL16 \.sbss\+0x1 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_GPREL16 \.sbss\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0xffffffffffff8000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x10000 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.data\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_data_label\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 big_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 small_external_common\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.bss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: R_MIPS_HIGHEST \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HIGHER \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddiu at,at,0 -[ ]*[0-9a-f]+: R_MIPS_HI16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [0-9a-f]+ <[^>]*> dsll at,at,0x10 [0-9a-f]+ <[^>]*> daddu at,at,a1 [0-9a-f]+ <[^>]*> sd a0,0\(at\) -[ ]*[0-9a-f]+: R_MIPS_LO16 \.sbss\+0x1a5a5 +[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1a5a5 \.\.\. diff --git a/gas/testsuite/gas/mips/sd.d b/gas/testsuite/gas/mips/sd.d index b1cfd32..629ca96 100644 --- a/gas/testsuite/gas/mips/sd.d +++ b/gas/testsuite/gas/mips/sd.d @@ -42,525 +42,525 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> sw a0,-23131\(at\) [0-9a-f]+ <[^>]*> sw a1,-23127\(at\) [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a0,0\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,4\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a0,0\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> sw a1,4\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a0,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,(4|8196)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a0,(0|-16384)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> sw a1,(4|-16380)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a0,(1|4097)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,(5|4101)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a0,1\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,5\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a0,1\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> sw a1,5\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a0,(1|8193)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,(5|8197)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a0,(1|-16383)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> sw a1,(5|-16379)\(gp\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a0,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|24572)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a0,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|24572)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a0,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,(4|8196)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a0,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(23127|19031)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> sw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> sw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> sw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> sw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> sw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a0,-(23131|14939)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,-(23127|14935)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a0,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(23127|19031)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,(4|8196)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sw a0,(0|-16384)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> sw a1,(4|-16380)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,(1|4097)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,(5|4101)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sw a0,1\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> sw a1,5\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,(1|8193)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,(5|8197)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,gp [0-9a-f]+ <[^>]*> sw a0,(1|-16383)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> sw a1,(5|-16379)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|24572)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-32768\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> sw a1,-32764\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-(32768|24576)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|24572)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x0 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,0\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> sw a1,4\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,(0|8192)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,(4|8196)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x1 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(23127|19031)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> sw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_data_label [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> sw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_data_label +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> sw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) big_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) big_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) small_external_common [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-23131\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> sw a1,-23127\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-(23131|14939)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> sw a1,-(23127|14935)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)? [0-9a-f]+ <[^>]*> lui at,0x2 -[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> addu at,a1,at [0-9a-f]+ <[^>]*> sw a0,-(23131|19035)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? [0-9a-f]+ <[^>]*> sw a1,-(23127|19031)\(at\) -[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? +[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)? \.\.\. diff --git a/gas/testsuite/gas/mips/tmips16-e.d b/gas/testsuite/gas/mips/tmips16-e.d index a610dc7..ddd6aaa 100644 --- a/gas/testsuite/gas/mips/tmips16-e.d +++ b/gas/testsuite/gas/mips/tmips16-e.d @@ -1,4 +1,4 @@ -#objdump: -rst -mips16 +#objdump: -rst --special-syms -mips16 #name: MIPS16 reloc #as: -32 -mips16 #source: mips16-e.s @@ -32,7 +32,7 @@ OFFSET [ ]+ TYPE VALUE Contents of section \.text: 0000 65006500 65006500 65006500 65006500 .* Contents of section \.reginfo: - 0000 00000001 00000000 00000000 00000000 .* + 0000 00010000 00000000 00000000 00000000 .* 0010 00000000 00000000 .* Contents of section foo: 0000 00000000 00000008 00000000 00000003 .* diff --git a/gas/testsuite/gas/mips/tmips16-f.d b/gas/testsuite/gas/mips/tmips16-f.d index 8e3304c..f865d1d 100644 --- a/gas/testsuite/gas/mips/tmips16-f.d +++ b/gas/testsuite/gas/mips/tmips16-f.d @@ -25,7 +25,7 @@ OFFSET [ ]+ TYPE VALUE Contents of section \.text: 0000 65006500 65006500 65006500 65006500 .* Contents of section \.reginfo: - 0000 00000001 00000000 00000000 00000000 .* + 0000 00010000 00000000 00000000 00000000 .* 0010 00000000 00000000 .* Contents of section foo: 0000 00000003 00000000 00000000 00000000 .* diff --git a/gas/testsuite/gas/mips/tmipsel16-e.d b/gas/testsuite/gas/mips/tmipsel16-e.d index ecaa8bd..0af3793 100644 --- a/gas/testsuite/gas/mips/tmipsel16-e.d +++ b/gas/testsuite/gas/mips/tmipsel16-e.d @@ -1,4 +1,4 @@ -#objdump: -rst -mips16 +#objdump: -rst --special-syms -mips16 #name: MIPS16 reloc #as: -32 -mips16 #source: mips16-e.s @@ -32,7 +32,7 @@ OFFSET [ ]+ TYPE VALUE Contents of section \.text: 0000 00650065 00650065 00650065 00650065 .* Contents of section \.reginfo: - 0000 01000000 00000000 00000000 00000000 .* + 0000 00000100 00000000 00000000 00000000 .* 0010 00000000 00000000 .* Contents of section foo: 0000 00000000 08000000 00000000 03000000 .* diff --git a/gas/testsuite/gas/mips/tmipsel16-f.d b/gas/testsuite/gas/mips/tmipsel16-f.d index 3c21e2d..5daa593 100644 --- a/gas/testsuite/gas/mips/tmipsel16-f.d +++ b/gas/testsuite/gas/mips/tmipsel16-f.d @@ -25,7 +25,7 @@ OFFSET [ ]+ TYPE VALUE Contents of section \.text: 0000 00650065 00650065 00650065 00650065 .* Contents of section \.reginfo: - 0000 01000000 00000000 00000000 00000000 .* + 0000 00000100 00000000 00000000 00000000 .* 0010 00000000 00000000 .* Contents of section foo: 0000 03000000 00000000 00000000 00000000 .* diff --git a/gas/testsuite/gas/mips/trunc.d b/gas/testsuite/gas/mips/trunc.d index 64cc941..d714585 100644 --- a/gas/testsuite/gas/mips/trunc.d +++ b/gas/testsuite/gas/mips/trunc.d @@ -1,4 +1,4 @@ -#objdump: -dr --prefix-addresses -mmips:3000 +#objdump: -drz --prefix-addresses -mmips:3000 #name: MIPS trunc #as: -32 -mips1 -mtune=r3000 @@ -27,3 +27,5 @@ Disassembly of section .text: 0+0044 <[^>]*> cvt.w.s \$f4,\$f6 0+0048 <[^>]*> ctc1 a0,\$31 0+004c <[^>]*> nop +0+0050 <[^>]*> nop +#pass diff --git a/gas/testsuite/gas/mips/vr4111.d b/gas/testsuite/gas/mips/vr4111.d index 6c8d445..cef9eb2 100644 --- a/gas/testsuite/gas/mips/vr4111.d +++ b/gas/testsuite/gas/mips/vr4111.d @@ -1,4 +1,4 @@ -#objdump: -dr +#objdump: -drz #name: MIPS VR4111 #as: -march=vr4111 @@ -7,5 +7,9 @@ Disassembly of section \.text: 0+000 <\.text>: + 0: 00850029 dmadd16 a0,a1 - \.\.\. + + 4: 00000000 nop + + 8: 00000000 nop + c: 00a60028 madd16 a1,a2 + +10: 00000000 nop + +14: 00000000 nop +#pass diff --git a/gas/testsuite/gas/mips/vr4130.d b/gas/testsuite/gas/mips/vr4130.d index 9a6a491..c87f584 100644 --- a/gas/testsuite/gas/mips/vr4130.d +++ b/gas/testsuite/gas/mips/vr4130.d @@ -61,6 +61,41 @@ Disassembly.* .* addiu .* .* mult .* # +.* mfhi .* +.* nop +.* nop +.* nop +.* nop +.* mult .* +# +.* mfhi .* +.* nop +.* nop +.* nop +.* addiu .* +.* mult .* +# +.* mfhi .* +.* nop +.* nop +.* addiu .* +.* addiu .* +.* mult .* +# +.* mfhi .* +.* nop +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# +.* mfhi .* +.* addiu .* +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# # PART C # .* mfhi .* @@ -87,6 +122,30 @@ Disassembly.* .* addiu .* .* mult .* # +.* mfhi .* +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# +.* mfhi .* +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# +.* mfhi .* +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# +.* mfhi .* +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# # PART D # .* mfhi .* @@ -484,6 +543,41 @@ Disassembly.* .* addiu .* .* mult .* # +.* mfhi .* +.* nop +.* nop +.* nop +.* nop +.* mult .* +# +.* mfhi .* +.* nop +.* nop +.* nop +.* addiu .* +.* mult .* +# +.* mfhi .* +.* nop +.* nop +.* addiu .* +.* addiu .* +.* mult .* +# +.* mfhi .* +.* nop +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# +.* mfhi .* +.* addiu .* +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# # PART C # .* mfhi .* @@ -510,6 +604,30 @@ Disassembly.* .* addiu .* .* mult .* # +.* mfhi .* +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# +.* mfhi .* +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# +.* mfhi .* +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# +.* mfhi .* +.* addiu .* +.* addiu .* +.* addiu .* +.* mult .* +# # PART D # .* mfhi .* diff --git a/gas/testsuite/gas/mips/vr4130.s b/gas/testsuite/gas/mips/vr4130.s index 74a02bf..bb8d427 100644 --- a/gas/testsuite/gas/mips/vr4130.s +++ b/gas/testsuite/gas/mips/vr4130.s @@ -57,6 +57,41 @@ addiu $6,1 mult $7,$7 # 0 nops + mfhi $2 + .set noreorder + mult $3,$3 # 4 nops + .set reorder + + mfhi $2 + .set noreorder + addiu $3,1 + mult $4,$4 # 3 nops before noreorder + .set reorder + + mfhi $2 + .set noreorder + addiu $3,1 + addiu $4,1 + mult $5,$5 # 2 nops before noreorder + .set reorder + + mfhi $2 + .set noreorder + addiu $3,1 + addiu $4,1 + addiu $5,1 + mult $6,$6 # 1 nop before noreorder + .set reorder + + mfhi $2 + .set noreorder + addiu $3,1 + addiu $4,1 + addiu $5,1 + addiu $6,1 + mult $7,$7 # 0 nops + .set reorder + # PART C # # Check that no nops are inserted after the result has been read. @@ -85,6 +120,38 @@ addiu $5,1 mult $2,$2 + mfhi $2 + .set noreorder + addiu $2,1 + addiu $3,1 + addiu $4,1 + mult $5,$5 + .set reorder + + mfhi $2 + .set noreorder + addiu $3,1 + addiu $2,1 + addiu $4,1 + mult $5,$5 + .set reorder + + mfhi $2 + .set noreorder + addiu $3,1 + addiu $4,1 + addiu $2,1 + mult $5,$5 + .set reorder + + mfhi $2 + .set noreorder + addiu $3,1 + addiu $4,1 + addiu $5,1 + mult $2,$2 + .set reorder + # PART D # # Check that we still insert the usual interlocking nops in cases diff --git a/gas/testsuite/gas/ppc/476.d b/gas/testsuite/gas/ppc/476.d index 7d131f9..06ced90 100644 --- a/gas/testsuite/gas/ppc/476.d +++ b/gas/testsuite/gas/ppc/476.d @@ -234,7 +234,7 @@ Disassembly of section \.text: 380: 7e 96 c2 6e lhzux r20,r22,r24 384: 7e f8 ca 2e lhzx r23,r24,r25 388: b8 61 ff f0 lmw r3,-16\(r1\) - 38c: 7c 64 84 aa lswi r3,r4,16 + 38c: 7c a4 84 aa lswi r5,r4,16 390: 7c 64 2c 2a lswx r3,r4,r5 394: 7c 64 28 28 lwarx r3,r4,r5 398: 7c 64 28 28 lwarx r3,r4,r5 diff --git a/gas/testsuite/gas/ppc/476.s b/gas/testsuite/gas/ppc/476.s index bd61bd2..c075efb 100644 --- a/gas/testsuite/gas/ppc/476.s +++ b/gas/testsuite/gas/ppc/476.s @@ -227,7 +227,7 @@ ppc476: lhzux 20,22,24 lhzx 23,24,25 lmw 3,-16(1) - lswi 3,4,16 + lswi 5,4,16 lswx 3,4,5 lwarx 3,4,5 lwarx 3,4,5,0 diff --git a/gas/testsuite/gas/ppc/a2.d b/gas/testsuite/gas/ppc/a2.d index d4be915..89810dd 100644 --- a/gas/testsuite/gas/ppc/a2.d +++ b/gas/testsuite/gas/ppc/a2.d @@ -322,7 +322,7 @@ Disassembly of section \.text: 498: 7d 4b 62 2e lhzx r10,r11,r12 49c: ba 8a 00 10 lmw r20,16\(r10\) 4a0: 7d 4b 0c aa lswi r10,r11,1 - 4a4: 7d 4b 04 aa lswi r10,r11,32 + 4a4: 7d 8b 04 aa lswi r12,r11,32 4a8: 7d 4b 64 2a lswx r10,r11,r12 4ac: e9 4b ff fe lwa r10,-4\(r11\) 4b0: e9 4b 00 06 lwa r10,4\(r11\) diff --git a/gas/testsuite/gas/ppc/a2.s b/gas/testsuite/gas/ppc/a2.s index fcc2e4d..9ab0024 100644 --- a/gas/testsuite/gas/ppc/a2.s +++ b/gas/testsuite/gas/ppc/a2.s @@ -297,7 +297,7 @@ start: lhzx 10,11,12 lmw 20,16(10) lswi 10,11,1 - lswi 10,11,32 + lswi 12,11,32 lswx 10,11,12 lwa 10,-4(11) lwa 10,4(11) diff --git a/gas/testsuite/gas/ppc/aix.exp b/gas/testsuite/gas/ppc/aix.exp index 917f0d9..6dcfc4e 100644 --- a/gas/testsuite/gas/ppc/aix.exp +++ b/gas/testsuite/gas/ppc/aix.exp @@ -67,4 +67,7 @@ if [istarget powerpc-ibm-aix*] then { run_dump_test "xcoff-branch-1-64" run_list_test "xcoff-ref-1" + + run_dump_test "xcoff-dwsect-1-32" + run_dump_test "xcoff-dwsect-1-64" } diff --git a/gas/testsuite/gas/ppc/power6.d b/gas/testsuite/gas/ppc/power6.d index bf75982..76ed7c7 100644 --- a/gas/testsuite/gas/ppc/power6.d +++ b/gas/testsuite/gas/ppc/power6.d @@ -19,7 +19,7 @@ Disassembly of section \.text: 24: 7c c0 3c be mffgpr f6,r7 28: 7d 00 4d be mftgpr r8,f9 2c: 7d 4b 66 2a lwzcix r10,r11,r12 - 30: 7d ae 7e 2e lfdpx f13,r14,r15 + 30: 7d 8e 7e 2e lfdpx f12,r14,r15 34: ee 11 90 04 dadd f16,f17,f18 38: fe 96 c0 04 daddq f20,f22,f24 3c: 7c 60 06 6c dss 3 diff --git a/gas/testsuite/gas/ppc/power6.s b/gas/testsuite/gas/ppc/power6.s index 106468f..b84987d 100644 --- a/gas/testsuite/gas/ppc/power6.s +++ b/gas/testsuite/gas/ppc/power6.s @@ -14,7 +14,7 @@ start: mffgpr 6,7 mftgpr 8,9 lwzcix 10,11,12 - lfdpx 13,14,15 + lfdpx 12,14,15 dadd 16,17,18 daddq 20,22,24 dss 3 diff --git a/gas/testsuite/gas/ppc/test1xcoff32.d b/gas/testsuite/gas/ppc/test1xcoff32.d index 56de4d4..75e93a8 100644 --- a/gas/testsuite/gas/ppc/test1xcoff32.d +++ b/gas/testsuite/gas/ppc/test1xcoff32.d @@ -55,6 +55,8 @@ AUX val 4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0 AUX val 0 prmhsh 0 snhsh 0 typ 0 algn 0 clss 0 stb 0 snstb 0 \[ 36\]\(sec 0\)\(fl 0x00\)\(ty 0\)\(scl 2\) \(nx 1\) 0x00000000 esym1 AUX val 0 prmhsh 0 snhsh 0 typ 0 algn 0 clss 0 stb 0 snstb 0 +\[ 38\]\(sec 1\)\(fl 0x00\)\(ty 0\)\(scl 3\) \(nx 1\) 0x00000000 \.text +AUX scnlen 0x68 nreloc 7 nlnno 0 Disassembly of section \.text: @@ -67,7 +69,7 @@ Disassembly of section \.text: 8: 80 63 00 00 l r3,0\(r3\) c: 80 63 00 04 l r3,4\(r3\) 10: 80 63 00 04 l r3,4\(r3\) - 14: 80 63 00 00 l r3,0\(r3\) + 14: 80 63 00 08 l r3,8\(r3\) 0+0018 : 18: 80 63 00 00 l r3,0\(r3\) @@ -136,4 +138,4 @@ Disassembly of section \.data: 0+008c : 8c: 00 00 00 00 \.long 0x0 - 8c: R_POS \.crazy_table + 8c: R_POS \.text diff --git a/gas/testsuite/gas/ppc/xcoff-dwsect-1-32.d b/gas/testsuite/gas/ppc/xcoff-dwsect-1-32.d new file mode 100644 index 0000000..a03cf42 --- /dev/null +++ b/gas/testsuite/gas/ppc/xcoff-dwsect-1-32.d @@ -0,0 +1,9 @@ +#as: -a32 +#source: xcoff-dwsect-1.s +#objdump: -j .dwinfo -s +#name: XCOFF dwsect test 1 (32-bit) + +dump.o: file format aixcoff-rs6000 + +Contents of section \.dwinfo: + 0000 00000006 00020001 00040000 00020003 ................ diff --git a/gas/testsuite/gas/ppc/xcoff-dwsect-1-64.d b/gas/testsuite/gas/ppc/xcoff-dwsect-1-64.d new file mode 100644 index 0000000..e415a12 --- /dev/null +++ b/gas/testsuite/gas/ppc/xcoff-dwsect-1-64.d @@ -0,0 +1,10 @@ +#as: -a64 +#source: xcoff-dwsect-1.s +#objdump: -j .dwinfo -s +#name: XCOFF dwsect test 1 (64-bit) + +dump.o: file format aix.*coff64-rs6000 + +Contents of section \.dwinfo: + 0000 ffffffff 00000000 00000006 00020001 ................ + 0010 0004ffff ffff0000 00000000 00020003 ................ diff --git a/gas/testsuite/gas/ppc/xcoff-dwsect-1.s b/gas/testsuite/gas/ppc/xcoff-dwsect-1.s new file mode 100644 index 0000000..493f212 --- /dev/null +++ b/gas/testsuite/gas/ppc/xcoff-dwsect-1.s @@ -0,0 +1,8 @@ + .dwsect 0x10000,Ldwinfo_0 + .short 2 + .dwsect 0x10000,Ldwinfo_1 + .short 3 + .dwsect 0x10000,Ldwinfo_0 + .short 1 + .short 4 + diff --git a/gas/testsuite/gas/rx/r-bcc.d b/gas/testsuite/gas/rx/r-bcc.d index 672a52a..be79f39 100644 --- a/gas/testsuite/gas/rx/r-bcc.d +++ b/gas/testsuite/gas/rx/r-bcc.d @@ -8,7 +8,7 @@ Disassembly of section \.text: 00000000 : 0: 20 32 beq\.b 32 2: 3a 86 13 beq\.w 1388 - 5: 1e bne\.s b + 5: 1d bne\.s a 6: 04 1a a1 07 bra\.a 7a120 0000000a : diff --git a/gas/testsuite/gas/s390/esa-g5.d b/gas/testsuite/gas/s390/esa-g5.d index 0e0984a..ca77038 100644 --- a/gas/testsuite/gas/s390/esa-g5.d +++ b/gas/testsuite/gas/s390/esa-g5.d @@ -25,8 +25,8 @@ Disassembly of section .text: .*: 3e 69 [ ]*aur %f6,%f9 .*: 6e 65 af ff [ ]*aw %f6,4095\(%r5,%r10\) .*: 2e 69 [ ]*awr %f6,%f9 -.*: b3 4a 00 69 [ ]*axbr %f6,%f9 -.*: 36 69 [ ]*axr %f6,%f9 +.*: b3 4a 00 48 [ ]*axbr %f4,%f8 +.*: 36 48 [ ]*axr %f4,%f8 .*: 47 f5 af ff [ ]*b 4095\(%r5,%r10\) .*: b2 40 00 69 [ ]*bakr %r6,%r9 .*: 45 65 af ff [ ]*bal %r6,4095\(%r5,%r10\) @@ -96,7 +96,7 @@ Disassembly of section .text: .*: b3 95 00 69 [ ]*cdfbr %f6,%r9 .*: b3 b5 00 69 [ ]*cdfr %f6,%r9 .*: 29 69 [ ]*cdr %f6,%f9 -.*: bb 69 5f ff [ ]*cds %r6,%r9,4095\(%r5\) +.*: bb 68 5f ff [ ]*cds %r6,%r8,4095\(%r5\) .*: 79 65 af ff [ ]*ce %f6,4095\(%r5,%r10\) .*: ed 65 af ff 00 09 [ ]*ceb %f6,4095\(%r5,%r10\) .*: b3 09 00 69 [ ]*cebr %f6,%f9 @@ -106,10 +106,10 @@ Disassembly of section .text: .*: b2 1a 5f ff [ ]*cfc 4095\(%r5\) .*: b3 99 50 69 [ ]*cfdbr %r6,5,%f9 .*: b3 98 50 69 [ ]*cfebr %r6,5,%f9 -.*: b3 9a 50 69 [ ]*cfxbr %r6,5,%f9 +.*: b3 9a 50 58 [ ]*cfxbr %r5,5,%f8 .*: b3 b9 90 65 [ ]*cfdr %r6,9,%f5 .*: b3 b8 90 65 [ ]*cfer %r6,9,%f5 -.*: b3 ba 90 65 [ ]*cfxr %r6,9,%f5 +.*: b3 ba 90 54 [ ]*cfxr %r5,9,%f4 .*: 49 65 af ff [ ]*ch %r6,4095\(%r5,%r10\) .*: a7 6e 80 01 [ ]*chi %r6,-32767 .*: b2 41 00 69 [ ]*cksm %r6,%r9 @@ -128,15 +128,15 @@ Disassembly of section .text: .*: ba 69 5f ff [ ]*cs %r6,%r9,4095\(%r5\) .*: b2 30 00 00 [ ]*csch .*: b2 50 00 69 [ ]*csp %r6,%r9 -.*: b2 57 00 69 [ ]*cuse %r6,%r9 -.*: b2 a7 00 69 [ ]*cutfu %r6,%r9 -.*: b2 a6 00 69 [ ]*cuutf %r6,%r9 +.*: b2 57 00 68 [ ]*cuse %r6,%r8 +.*: b2 a7 00 68 [ ]*cutfu %r6,%r8 +.*: b2 a6 00 68 [ ]*cuutf %r6,%r8 .*: 4f 65 af ff [ ]*cvb %r6,4095\(%r5,%r10\) .*: 4e 65 af ff [ ]*cvd %r6,4095\(%r5,%r10\) -.*: b3 49 00 69 [ ]*cxbr %f6,%f9 -.*: b3 96 00 69 [ ]*cxfbr %f6,%r9 -.*: b3 b6 00 69 [ ]*cxfr %f6,%r9 -.*: b3 69 00 69 [ ]*cxr %f6,%f9 +.*: b3 49 00 58 [ ]*cxbr %f5,%f8 +.*: b3 96 00 59 [ ]*cxfbr %f5,%r9 +.*: b3 b6 00 59 [ ]*cxfr %f5,%r9 +.*: b3 69 00 59 [ ]*cxr %f5,%f9 .*: 5d 65 af ff [ ]*d %r6,4095\(%r5,%r10\) .*: 6d 65 af ff [ ]*dd %f6,4095\(%r5,%r10\) .*: ed 65 af ff 00 1d [ ]*ddb %f6,4095\(%r5,%r10\) @@ -151,8 +151,8 @@ Disassembly of section .text: .*: b3 53 9a 65 [ ]*diebr %f6,%f9,%f5,10 .*: fd 58 5f ff af ff [ ]*dp 4095\(6,%r5\),4095\(9,%r10\) .*: 1d 69 [ ]*dr %r6,%r9 -.*: b3 4d 00 69 [ ]*dxbr %f6,%f9 -.*: b2 2d 00 69 [ ]*dxr %f6,%f9 +.*: b3 4d 00 58 [ ]*dxbr %f5,%f8 +.*: b2 2d 00 58 [ ]*dxr %f5,%f8 .*: b2 4f 00 69 [ ]*ear %r6,%a9 .*: de ff 5f ff af ff [ ]*ed 4095\(256,%r5\),4095\(%r10\) .*: df ff 5f ff af ff [ ]*edmk 4095\(256,%r5\),4095\(%r10\) @@ -166,8 +166,8 @@ Disassembly of section .text: .*: b3 7f 00 69 [ ]*fidr %f6,%f9 .*: b3 57 50 69 [ ]*fiebr %f6,5,%f9 .*: b3 77 00 69 [ ]*fier %f6,%f9 -.*: b3 47 50 69 [ ]*fixbr %f6,5,%f9 -.*: b3 67 00 69 [ ]*fixr %f6,%f9 +.*: b3 47 50 58 [ ]*fixbr %f5,5,%f8 +.*: b3 67 00 58 [ ]*fixr %f5,%f8 .*: 24 69 [ ]*hdr %f6,%f9 .*: 34 69 [ ]*her %f6,%f9 .*: b2 31 00 00 [ ]*hsch @@ -216,22 +216,22 @@ Disassembly of section .text: .*: 33 69 [ ]*lcer %f6,%f9 .*: 13 69 [ ]*lcr %r6,%r9 .*: b7 69 5f ff [ ]*lctl %c6,%c9,4095\(%r5\) -.*: b3 43 00 69 [ ]*lcxbr %f6,%f9 -.*: b3 63 00 69 [ ]*lcxr %f6,%f9 +.*: b3 43 00 58 [ ]*lcxbr %f5,%f8 +.*: b3 63 00 58 [ ]*lcxr %f5,%f8 .*: 68 65 af ff [ ]*ld %f6,4095\(%r5,%r10\) .*: ed 65 af ff 00 24 [ ]*lde %f6,4095\(%r5,%r10\) .*: ed 65 af ff 00 04 [ ]*ldeb %f6,4095\(%r5,%r10\) .*: b3 04 00 69 [ ]*ldebr %f6,%f9 .*: b3 24 00 69 [ ]*lder %f6,%f9 .*: 28 69 [ ]*ldr %f6,%f9 -.*: b3 45 00 69 [ ]*ldxbr %f6,%f9 -.*: 25 69 [ ]*ldxr %f6,%f9 +.*: b3 45 00 58 [ ]*ldxbr %f5,%f8 +.*: 25 68 [ ]*ldxr %f6,%f8 .*: 78 65 af ff [ ]*le %f6,4095\(%r5,%r10\) .*: b3 44 00 69 [ ]*ledbr %f6,%f9 .*: 35 69 [ ]*ledr %f6,%f9 .*: 38 69 [ ]*ler %f6,%f9 -.*: b3 46 00 69 [ ]*lexbr %f6,%f9 -.*: b3 66 00 69 [ ]*lexr %f6,%f9 +.*: b3 46 00 58 [ ]*lexbr %f5,%f8 +.*: b3 66 00 68 [ ]*lexr %f6,%f8 .*: b2 9d 5f ff [ ]*lfpc 4095\(%r5\) .*: 48 65 af ff [ ]*lh %r6,4095\(%r5,%r10\) .*: a7 68 80 01 [ ]*lhi %r6,-32767 @@ -241,40 +241,40 @@ Disassembly of section .text: .*: b3 01 00 69 [ ]*lnebr %f6,%f9 .*: 31 69 [ ]*lner %f6,%f9 .*: 11 69 [ ]*lnr %r6,%r9 -.*: b3 41 00 69 [ ]*lnxbr %f6,%f9 -.*: b3 61 00 69 [ ]*lnxr %f6,%f9 +.*: b3 41 00 58 [ ]*lnxbr %f5,%f8 +.*: b3 61 00 58 [ ]*lnxr %f5,%f8 .*: b3 10 00 69 [ ]*lpdbr %f6,%f9 .*: 20 69 [ ]*lpdr %f6,%f9 .*: b3 00 00 69 [ ]*lpebr %f6,%f9 .*: 30 69 [ ]*lper %f6,%f9 .*: 10 69 [ ]*lpr %r6,%r9 .*: 82 00 5f ff [ ]*lpsw 4095\(%r5\) -.*: b3 40 00 69 [ ]*lpxbr %f6,%f9 -.*: b3 60 00 69 [ ]*lpxr %f6,%f9 +.*: b3 40 00 58 [ ]*lpxbr %f5,%f8 +.*: b3 60 00 58 [ ]*lpxr %f5,%f8 .*: 18 69 [ ]*lr %r6,%r9 .*: b1 65 af ff [ ]*lra %r6,4095\(%r5,%r10\) -.*: 25 69 [ ]*ldxr %f6,%f9 +.*: 25 78 [ ]*ldxr %f7,%f8 .*: 35 69 [ ]*ledr %f6,%f9 .*: b3 12 00 69 [ ]*ltdbr %f6,%f9 .*: 22 69 [ ]*ltdr %f6,%f9 .*: b3 02 00 69 [ ]*ltebr %f6,%f9 .*: 32 69 [ ]*lter %f6,%f9 .*: 12 69 [ ]*ltr %r6,%r9 -.*: b3 42 00 69 [ ]*ltxbr %f6,%f9 -.*: b3 62 00 69 [ ]*ltxr %f6,%f9 +.*: b3 42 00 58 [ ]*ltxbr %f5,%f8 +.*: b3 62 00 58 [ ]*ltxr %f5,%f8 .*: b2 4b 00 69 [ ]*lura %r6,%r9 -.*: ed 65 af ff 00 25 [ ]*lxd %f6,4095\(%r5,%r10\) -.*: ed 65 af ff 00 05 [ ]*lxdb %f6,4095\(%r5,%r10\) -.*: b3 05 00 69 [ ]*lxdbr %f6,%f9 -.*: b3 25 00 69 [ ]*lxdr %f6,%f9 -.*: ed 65 af ff 00 26 [ ]*lxe %f6,4095\(%r5,%r10\) -.*: ed 65 af ff 00 06 [ ]*lxeb %f6,4095\(%r5,%r10\) -.*: b3 06 00 69 [ ]*lxebr %f6,%f9 -.*: b3 26 00 69 [ ]*lxer %f6,%f9 -.*: b3 65 00 69 [ ]*lxr %f6,%f9 +.*: ed 55 af ff 00 25 [ ]*lxd %f5,4095\(%r5,%r10\) +.*: ed 55 af ff 00 05 [ ]*lxdb %f5,4095\(%r5,%r10\) +.*: b3 05 00 59 [ ]*lxdbr %f5,%f9 +.*: b3 25 00 59 [ ]*lxdr %f5,%f9 +.*: ed 55 af ff 00 26 [ ]*lxe %f5,4095\(%r5,%r10\) +.*: ed 55 af ff 00 06 [ ]*lxeb %f5,4095\(%r5,%r10\) +.*: b3 06 00 59 [ ]*lxebr %f5,%f9 +.*: b3 26 00 59 [ ]*lxer %f5,%f9 +.*: b3 65 00 58 [ ]*lxr %f5,%f8 .*: b3 75 00 60 [ ]*lzdr %f6 .*: b3 74 00 60 [ ]*lzer %f6 -.*: b3 76 00 60 [ ]*lzxr %f6 +.*: b3 76 00 50 [ ]*lzxr %f5 .*: 5c 65 af ff [ ]*m %r6,4095\(%r5,%r10\) .*: ed 95 af ff 60 1e [ ]*madb %f6,%f9,4095\(%r5,%r10\) .*: b3 1e 60 95 [ ]*madbr %f6,%f9,%f5 @@ -312,8 +312,8 @@ Disassembly of section .text: .*: e8 ff 5f ff af ff [ ]*mvcin 4095\(256,%r5\),4095\(%r10\) .*: d9 69 5f ff af ff [ ]*mvck 4095\(%r6,%r5\),4095\(%r10\),%r9 .*: 0e 69 [ ]*mvcl %r6,%r9 -.*: a8 69 5f ff [ ]*mvcle %r6,%r9,4095\(%r5\) -.*: eb 69 5f ff 00 8e [ ]*mvclu %r6,%r9,4095\(%r5\) +.*: a8 68 5f ff [ ]*mvcle %r6,%r8,4095\(%r5\) +.*: eb 68 5f ff 00 8e [ ]*mvclu %r6,%r8,4095\(%r5\) .*: da 69 5f ff af ff [ ]*mvcp 4095\(%r6,%r5\),4095\(%r10\),%r9 .*: db 69 5f ff af ff [ ]*mvcs 4095\(%r6,%r5\),4095\(%r10\),%r9 .*: e5 0e 5f ff af ff [ ]*mvcsk 4095\(%r5\),4095\(%r10\) @@ -323,12 +323,12 @@ Disassembly of section .text: .*: b2 54 00 69 [ ]*mvpg %r6,%r9 .*: b2 55 00 69 [ ]*mvst %r6,%r9 .*: d3 ff 5f ff af ff [ ]*mvz 4095\(256,%r5\),4095\(%r10\) -.*: b3 4c 00 69 [ ]*mxbr %f6,%f9 -.*: 67 65 af ff [ ]*mxd %f6,4095\(%r5,%r10\) -.*: ed 65 af ff 00 07 [ ]*mxdb %f6,4095\(%r5,%r10\) -.*: b3 07 00 69 [ ]*mxdbr %f6,%f9 -.*: 27 69 [ ]*mxdr %f6,%f9 -.*: 26 69 [ ]*mxr %f6,%f9 +.*: b3 4c 00 58 [ ]*mxbr %f5,%f8 +.*: 67 55 af ff [ ]*mxd %f5,4095\(%r5,%r10\) +.*: ed 55 af ff 00 07 [ ]*mxdb %f5,4095\(%r5,%r10\) +.*: b3 07 00 59 [ ]*mxdbr %f5,%f9 +.*: 27 59 [ ]*mxdr %f5,%f9 +.*: 26 58 [ ]*mxr %f5,%f8 .*: 54 65 af ff [ ]*n %r6,4095\(%r5,%r10\) .*: d4 ff 5f ff af ff [ ]*nc 4095\(256,%r5\),4095\(%r10\) .*: 94 ff 5f ff [ ]*ni 4095\(%r5\),255 @@ -395,8 +395,8 @@ Disassembly of section .text: .*: ed 65 af ff 00 14 [ ]*sqeb %f6,4095\(%r5,%r10\) .*: b3 14 00 69 [ ]*sqebr %f6,%f9 .*: b2 45 00 69 [ ]*sqer %f6,%f9 -.*: b3 16 00 69 [ ]*sqxbr %f6,%f9 -.*: b3 36 00 69 [ ]*sqxr %f6,%f9 +.*: b3 16 00 58 [ ]*sqxbr %f5,%f8 +.*: b3 36 00 58 [ ]*sqxr %f5,%f8 .*: 1b 69 [ ]*sr %r6,%r9 .*: 8a 60 5f ff [ ]*sra %r6,4095\(%r5\) .*: 8e 60 5f ff [ ]*srda %r6,4095\(%r5\) @@ -438,15 +438,15 @@ Disassembly of section .text: .*: 0a ff [ ]*svc 255 .*: 6f 65 af ff [ ]*sw %f6,4095\(%r5,%r10\) .*: 2f 69 [ ]*swr %f6,%f9 -.*: b3 4b 00 69 [ ]*sxbr %f6,%f9 -.*: 37 69 [ ]*sxr %f6,%f9 +.*: b3 4b 00 58 [ ]*sxbr %f5,%f8 +.*: 37 58 [ ]*sxr %f5,%f8 .*: b2 4c 00 69 [ ]*tar %a6,%r9 .*: b2 2c 00 06 [ ]*tb %r6 .*: b3 51 50 69 [ ]*tbdr %f6,5,%f9 .*: b3 50 50 69 [ ]*tbedr %f6,5,%f9 .*: ed 65 af ff 00 11 [ ]*tcdb %f6,4095\(%r5,%r10\) .*: ed 65 af ff 00 10 [ ]*tceb %f6,4095\(%r5,%r10\) -.*: ed 65 af ff 00 12 [ ]*tcxb %f6,4095\(%r5,%r10\) +.*: ed 55 af ff 00 12 [ ]*tcxb %f5,4095\(%r5,%r10\) .*: b3 58 00 69 [ ]*thder %f6,%f9 .*: b3 59 00 69 [ ]*thdr %f6,%f9 .*: 91 ff 5f ff [ ]*tm 4095\(%r5\),255 @@ -462,11 +462,11 @@ Disassembly of section .text: .*: 01 ff [ ]*trap2 .*: b2 ff 5f ff [ ]*trap4 4095\(%r5\) .*: b2 a5 00 69 [ ]*tre %r6,%r9 -.*: b9 93 00 69 [ ]*troo %r6,%r9 -.*: b9 92 00 69 [ ]*trot %r6,%r9 +.*: b9 93 00 68 [ ]*troo %r6,%r8 +.*: b9 92 00 68 [ ]*trot %r6,%r8 .*: dd ff 5f ff af ff [ ]*trt 4095\(256,%r5\),4095\(%r10\) -.*: b9 91 00 69 [ ]*trto %r6,%r9 -.*: b9 90 00 69 [ ]*trtt %r6,%r9 +.*: b9 91 00 68 [ ]*trto %r6,%r8 +.*: b9 90 00 68 [ ]*trtt %r6,%r8 .*: 93 00 5f ff [ ]*ts 4095\(%r5\) .*: b2 35 5f ff [ ]*tsch 4095\(%r5\) .*: f3 58 5f ff af ff [ ]*unpk 4095\(6,%r5\),4095\(9,%r10\) diff --git a/gas/testsuite/gas/s390/esa-g5.s b/gas/testsuite/gas/s390/esa-g5.s index b74140c..e34e4b3 100644 --- a/gas/testsuite/gas/s390/esa-g5.s +++ b/gas/testsuite/gas/s390/esa-g5.s @@ -19,8 +19,8 @@ foo: aur %f6,%f9 aw %f6,4095(%r5,%r10) awr %f6,%f9 - axbr %f6,%f9 - axr %f6,%f9 + axbr %f4,%f8 + axr %f4,%f8 b 4095(%r5,%r10) bakr %r6,%r9 bal %r6,4095(%r5,%r10) @@ -90,7 +90,7 @@ foo: cdfbr %f6,%r9 cdfr %f6,%r9 cdr %f6,%f9 - cds %r6,%r9,4095(%r5) + cds %r6,%r8,4095(%r5) ce %f6,4095(%r5,%r10) ceb %f6,4095(%r5,%r10) cebr %f6,%f9 @@ -100,10 +100,10 @@ foo: cfc 4095(%r5) cfdbr %r6,5,%f9 cfebr %r6,5,%f9 - cfxbr %r6,5,%f9 + cfxbr %r5,5,%f8 cfdr %r6,9,%f5 cfer %r6,9,%f5 - cfxr %r6,9,%f5 + cfxr %r5,9,%f4 ch %r6,4095(%r5,%r10) chi %r6,-32767 cksm %r6,%r9 @@ -122,15 +122,15 @@ foo: cs %r6,%r9,4095(%r5) csch csp %r6,%r9 - cuse %r6,%r9 - cutfu %r6,%r9 - cuutf %r6,%r9 + cuse %r6,%r8 + cutfu %r6,%r8 + cuutf %r6,%r8 cvb %r6,4095(%r5,%r10) cvd %r6,4095(%r5,%r10) - cxbr %f6,%f9 - cxfbr %f6,%r9 - cxfr %f6,%r9 - cxr %f6,%f9 + cxbr %f5,%f8 + cxfbr %f5,%r9 + cxfr %f5,%r9 + cxr %f5,%f9 d %r6,4095(%r5,%r10) dd %f6,4095(%r5,%r10) ddb %f6,4095(%r5,%r10) @@ -145,8 +145,8 @@ foo: diebr %f6,%r9,%r5,10 dp 4095(6,%r5),4095(9,%r10) dr %r6,%r9 - dxbr %f6,%f9 - dxr %f6,%f9 + dxbr %f5,%f8 + dxr %f5,%f8 ear %r6,%a9 ed 4095(256,%r5),4095(%r10) edmk 4095(256,%r5),4095(%r10) @@ -160,8 +160,8 @@ foo: fidr %f6,%f9 fiebr %f6,5,%f9 fier %f6,%f9 - fixbr %f6,5,%f9 - fixr %f6,%f9 + fixbr %f5,5,%f8 + fixr %f5,%f8 hdr %f6,%f9 her %f6,%f9 hsch @@ -210,22 +210,22 @@ foo: lcer %f6,%f9 lcr %r6,%r9 lctl %c6,%c9,4095(%r5) - lcxbr %f6,%f9 - lcxr %f6,%f9 + lcxbr %f5,%f8 + lcxr %f5,%f8 ld %f6,4095(%r5,%r10) lde %f6,4095(%r5,%r10) ldeb %f6,4095(%r5,%r10) ldebr %f6,%f9 lder %f6,%f9 ldr %f6,%f9 - ldxbr %f6,%f9 - ldxr %f6,%f9 + ldxbr %f5,%f8 + ldxr %f6,%f8 le %f6,4095(%r5,%r10) ledbr %f6,%f9 ledr %f6,%f9 ler %f6,%f9 - lexbr %f6,%f9 - lexr %f6,%f9 + lexbr %f5,%f8 + lexr %f6,%f8 lfpc 4095(%r5) lh %r6,4095(%r5,%r10) lhi %r6,-32767 @@ -235,40 +235,40 @@ foo: lnebr %f6,%f9 lner %f6,%f9 lnr %r6,%r9 - lnxbr %f6,%f9 - lnxr %f6,%f9 + lnxbr %f5,%f8 + lnxr %f5,%f8 lpdbr %f6,%f9 lpdr %f6,%f9 lpebr %f6,%f9 lper %f6,%f9 lpr %r6,%r9 lpsw 4095(%r5) - lpxbr %f6,%f9 - lpxr %f6,%f9 + lpxbr %f5,%f8 + lpxr %f5,%f8 lr %r6,%r9 lra %r6,4095(%r5,%r10) - lrdr %f6,%f9 + lrdr %f7,%f8 lrer %f6,%f9 ltdbr %f6,%f9 ltdr %f6,%f9 ltebr %f6,%f9 lter %f6,%f9 ltr %r6,%r9 - ltxbr %f6,%f9 - ltxr %f6,%f9 + ltxbr %f5,%f8 + ltxr %f5,%f8 lura %r6,%r9 - lxd %f6,4095(%r5,%r10) - lxdb %f6,4095(%r5,%r10) - lxdbr %f6,%f9 - lxdr %f6,%f9 - lxe %f6,4095(%r5,%r10) - lxeb %f6,4095(%r5,%r10) - lxebr %f6,%f9 - lxer %f6,%f9 - lxr %f6,%f9 + lxd %f5,4095(%r5,%r10) + lxdb %f5,4095(%r5,%r10) + lxdbr %f5,%f9 + lxdr %f5,%f9 + lxe %f5,4095(%r5,%r10) + lxeb %f5,4095(%r5,%r10) + lxebr %f5,%f9 + lxer %f5,%f9 + lxr %f5,%f8 lzdr %f6 lzer %f6 - lzxr %f6 + lzxr %f5 m %r6,4095(%r5,%r10) madb %f6,%f9,4095(%r5,%r10) madbr %f6,%f9,%f5 @@ -306,8 +306,8 @@ foo: mvcin 4095(256,%r5),4095(%r10) mvck 4095(%r6,%r5),4095(%r10),%r9 mvcl %r6,%r9 - mvcle %r6,%r9,4095(%r5) - mvclu %r6,%r9,4095(%r5) + mvcle %r6,%r8,4095(%r5) + mvclu %r6,%r8,4095(%r5) mvcp 4095(%r6,%r5),4095(%r10),%r9 mvcs 4095(%r6,%r5),4095(%r10),%r9 mvcsk 4095(%r5),4095(%r10) @@ -317,12 +317,12 @@ foo: mvpg %r6,%r9 mvst %r6,%r9 mvz 4095(256,%r5),4095(%r10) - mxbr %f6,%f9 - mxd %f6,4095(%r5,%r10) - mxdb %f6,4095(%r5,%r10) - mxdbr %f6,%f9 - mxdr %f6,%f9 - mxr %f6,%f9 + mxbr %f5,%f8 + mxd %f5,4095(%r5,%r10) + mxdb %f5,4095(%r5,%r10) + mxdbr %f5,%f9 + mxdr %f5,%f9 + mxr %f5,%f8 n %r6,4095(%r5,%r10) nc 4095(256,%r5),4095(%r10) ni 4095(%r5),255 @@ -389,8 +389,8 @@ foo: sqeb %f6,4095(%r5,%r10) sqebr %f6,%f9 sqer %f6,%f9 - sqxbr %f6,%f9 - sqxr %f6,%f9 + sqxbr %f5,%f8 + sqxr %f5,%f8 sr %r6,%r9 sra %r6,4095(%r5) srda %r6,4095(%r5) @@ -432,15 +432,15 @@ foo: svc 255 sw %f6,4095(%r5,%r10) swr %f6,%f9 - sxbr %f6,%f9 - sxr %f6,%f9 + sxbr %f5,%f8 + sxr %f5,%f8 tar %a6,%r9 tb %r6 tbdr %r6,5,%r9 tbedr %r6,5,%r9 tcdb %f6,4095(%r5,%r10) tceb %f6,4095(%r5,%r10) - tcxb %f6,4095(%r5,%r10) + tcxb %f5,4095(%r5,%r10) thder %f6,%f9 thdr %f6,%f9 tm 4095(%r5),255 @@ -456,11 +456,11 @@ foo: trap2 trap4 4095(%r5) tre %r6,%r9 - troo %r6,%r9 - trot %r6,%r9 + troo %r6,%r8 + trot %r6,%r8 trt 4095(256,%r5),4095(%r10) - trto %r6,%r9 - trtt %r6,%r9 + trto %r6,%r8 + trtt %r6,%r8 ts 4095(%r5) tsch 4095(%r5) unpk 4095(6,%r5),4095(9,%r10) diff --git a/gas/testsuite/gas/s390/esa-z9-109.d b/gas/testsuite/gas/s390/esa-z9-109.d index d037909..c379c46 100644 --- a/gas/testsuite/gas/s390/esa-z9-109.d +++ b/gas/testsuite/gas/s390/esa-z9-109.d @@ -6,8 +6,8 @@ Disassembly of section .text: .* : -.*: b9 93 f0 69 [ ]*troo %r6,%r9,15 -.*: b9 92 f0 69 [ ]*trot %r6,%r9,15 -.*: b9 91 f0 69 [ ]*trto %r6,%r9,15 -.*: b9 90 f0 69 [ ]*trtt %r6,%r9,15 +.*: b9 93 f0 68 [ ]*troo %r6,%r8,15 +.*: b9 92 f0 68 [ ]*trot %r6,%r8,15 +.*: b9 91 f0 68 [ ]*trto %r6,%r8,15 +.*: b9 90 f0 68 [ ]*trtt %r6,%r8,15 .*: b2 2b 00 69 [ ]*sske %r6,%r9 diff --git a/gas/testsuite/gas/s390/esa-z9-109.s b/gas/testsuite/gas/s390/esa-z9-109.s index 49ffaf6..438f76e 100644 --- a/gas/testsuite/gas/s390/esa-z9-109.s +++ b/gas/testsuite/gas/s390/esa-z9-109.s @@ -1,9 +1,9 @@ .text foo: - troo %r6,%r9,15 - trot %r6,%r9,15 - trto %r6,%r9,15 - trtt %r6,%r9,15 + troo %r6,%r8,15 + trot %r6,%r8,15 + trto %r6,%r8,15 + trtt %r6,%r8,15 # z9-109 z/Architecture mode extended sske with an additional parameter # make sure the old version still works for esa sske %r6,%r9 diff --git a/gas/testsuite/gas/s390/zarch-z196.d b/gas/testsuite/gas/s390/zarch-z196.d index 8225600..4e65ad5 100644 --- a/gas/testsuite/gas/s390/zarch-z196.d +++ b/gas/testsuite/gas/s390/zarch-z196.d @@ -212,24 +212,24 @@ Disassembly of section .text: .*: b3 a2 37 59 [ ]*cxlgbr %f5,3,%r9,7 .*: b3 98 37 59 [ ]*cfebra %r5,3,%f9,7 .*: b3 99 37 59 [ ]*cfdbra %r5,3,%f9,7 -.*: b3 9a 37 59 [ ]*cfxbra %r5,3,%f9,7 +.*: b3 9a 37 58 [ ]*cfxbra %r5,3,%f8,7 .*: b3 a8 37 59 [ ]*cgebra %r5,3,%f9,7 .*: b3 a9 37 59 [ ]*cgdbra %r5,3,%f9,7 -.*: b3 aa 37 59 [ ]*cgxbra %r5,3,%f9,7 +.*: b3 aa 37 58 [ ]*cgxbra %r5,3,%f8,7 .*: b3 9c 37 59 [ ]*clfebr %r5,3,%f9,7 .*: b3 9d 37 59 [ ]*clfdbr %r5,3,%f9,7 -.*: b3 9e 37 59 [ ]*clfxbr %r5,3,%f9,7 +.*: b3 9e 37 58 [ ]*clfxbr %r5,3,%f8,7 .*: b3 ac 37 59 [ ]*clgebr %r5,3,%f9,7 .*: b3 ad 37 59 [ ]*clgdbr %r5,3,%f9,7 -.*: b3 ae 37 59 [ ]*clgxbr %r5,3,%f9,7 +.*: b3 ae 37 58 [ ]*clgxbr %r5,3,%f8,7 .*: b3 57 37 59 [ ]*fiebra %f5,3,%f9,7 .*: b3 5f 37 59 [ ]*fidbra %f5,3,%f9,7 -.*: b3 47 37 59 [ ]*fixbra %f5,3,%f9,7 +.*: b3 47 37 58 [ ]*fixbra %f5,3,%f8,7 .*: b3 44 37 59 [ ]*ledbra %f5,3,%f9,7 -.*: b3 45 37 59 [ ]*ldxbra %f5,3,%f9,7 -.*: b3 46 37 59 [ ]*lexbra %f5,3,%f9,7 +.*: b3 45 37 58 [ ]*ldxbra %f5,3,%f8,7 +.*: b3 46 37 58 [ ]*lexbra %f5,3,%f8,7 .*: b3 d2 97 35 [ ]*adtra %f3,%f5,%f9,7 -.*: b3 da 97 35 [ ]*axtra %f3,%f5,%f9,7 +.*: b3 da 57 14 [ ]*axtra %f1,%f4,%f5,7 .*: b3 f1 37 59 [ ]*cdgtra %f5,3,%r9,7 .*: b9 51 37 59 [ ]*cdftr %f5,3,%r9,7 .*: b9 59 37 59 [ ]*cxftr %f5,3,%r9,7 @@ -239,17 +239,17 @@ Disassembly of section .text: .*: b9 53 37 59 [ ]*cdlftr %f5,3,%r9,7 .*: b9 5b 37 59 [ ]*cxlftr %f5,3,%r9,7 .*: b3 e1 37 59 [ ]*cgdtra %r5,3,%f9,7 -.*: b3 e9 37 59 [ ]*cgxtra %r5,3,%f9,7 +.*: b3 e9 37 58 [ ]*cgxtra %r5,3,%f8,7 .*: b9 41 37 59 [ ]*cfdtr %r5,3,%f9,7 .*: b9 49 37 59 [ ]*cfxtr %r5,3,%f9,7 .*: b9 42 37 59 [ ]*clgdtr %r5,3,%f9,7 -.*: b9 4a 37 59 [ ]*clgxtr %r5,3,%f9,7 +.*: b9 4a 37 58 [ ]*clgxtr %r5,3,%f8,7 .*: b9 43 37 59 [ ]*clfdtr %r5,3,%f9,7 -.*: b9 4b 37 59 [ ]*clfxtr %r5,3,%f9,7 +.*: b9 4b 37 58 [ ]*clfxtr %r5,3,%f8,7 .*: b3 d1 97 35 [ ]*ddtra %f3,%f5,%f9,7 -.*: b3 d9 97 35 [ ]*dxtra %f3,%f5,%f9,7 +.*: b3 d9 57 14 [ ]*dxtra %f1,%f4,%f5,7 .*: b3 d0 97 35 [ ]*mdtra %f3,%f5,%f9,7 -.*: b3 d8 97 35 [ ]*mxtra %f3,%f5,%f9,7 +.*: b3 d8 57 14 [ ]*mxtra %f1,%f4,%f5,7 .*: b3 d3 97 35 [ ]*sdtra %f3,%f5,%f9,7 -.*: b3 db 97 35 [ ]*sxtra %f3,%f5,%f9,7 +.*: b3 db 57 14 [ ]*sxtra %f1,%f4,%f5,7 .*: b2 b8 7f a0 [ ]*srnmb 4000\(%r7\) diff --git a/gas/testsuite/gas/s390/zarch-z196.s b/gas/testsuite/gas/s390/zarch-z196.s index 2b49c95..25fb489 100644 --- a/gas/testsuite/gas/s390/zarch-z196.s +++ b/gas/testsuite/gas/s390/zarch-z196.s @@ -214,24 +214,24 @@ foo: cxlgbr %f5,3,%r9,7 cfebra %r5,3,%f9,7 cfdbra %r5,3,%f9,7 - cfxbra %r5,3,%f9,7 + cfxbra %r5,3,%f8,7 cgebra %r5,3,%f9,7 cgdbra %r5,3,%f9,7 - cgxbra %r5,3,%f9,7 + cgxbra %r5,3,%f8,7 clfebr %r5,3,%f9,7 clfdbr %r5,3,%f9,7 - clfxbr %r5,3,%f9,7 + clfxbr %r5,3,%f8,7 clgebr %r5,3,%f9,7 clgdbr %r5,3,%f9,7 - clgxbr %r5,3,%f9,7 + clgxbr %r5,3,%f8,7 fiebra %f5,3,%f9,7 fidbra %f5,3,%f9,7 - fixbra %f5,3,%f9,7 + fixbra %f5,3,%f8,7 ledbra %f5,3,%f9,7 - ldxbra %f5,3,%f9,7 - lexbra %f5,3,%f9,7 + ldxbra %f5,3,%f8,7 + lexbra %f5,3,%f8,7 adtra %f3,%f5,%f9,7 - axtra %f3,%f5,%f9,7 + axtra %f1,%f4,%f5,7 cdgtra %f5,3,%r9,7 cdftr %f5,3,%r9,7 cxftr %f5,3,%r9,7 @@ -241,17 +241,17 @@ foo: cdlftr %f5,3,%r9,7 cxlftr %f5,3,%r9,7 cgdtra %r5,3,%f9,7 - cgxtra %r5,3,%f9,7 + cgxtra %r5,3,%f8,7 cfdtr %r5,3,%f9,7 cfxtr %r5,3,%f9,7 clgdtr %r5,3,%f9,7 - clgxtr %r5,3,%f9,7 + clgxtr %r5,3,%f8,7 clfdtr %r5,3,%f9,7 - clfxtr %r5,3,%f9,7 + clfxtr %r5,3,%f8,7 ddtra %f3,%f5,%f9,7 - dxtra %f3,%f5,%f9,7 + dxtra %f1,%f4,%f5,7 mdtra %f3,%f5,%f9,7 - mxtra %f3,%f5,%f9,7 + mxtra %f1,%f4,%f5,7 sdtra %f3,%f5,%f9,7 - sxtra %f3,%f5,%f9,7 + sxtra %f1,%f4,%f5,7 srnmb 4000(%r7) diff --git a/gas/testsuite/gas/s390/zarch-z9-109.d b/gas/testsuite/gas/s390/zarch-z9-109.d index 7c5797d..01edc0f 100644 --- a/gas/testsuite/gas/s390/zarch-z9-109.d +++ b/gas/testsuite/gas/s390/zarch-z9-109.d @@ -45,16 +45,16 @@ Disassembly of section .text: .*: c8 60 5f ff af ff [ ]*mvcos 4095\(%r5\),4095\(%r10\),%r6 .*: b9 aa 5f 69 [ ]*lptea %r6,%r9,%r5,15 .*: b2 2b f0 69 [ ]*sske %r6,%r9,15 -.*: b9 b1 f0 69 [ ]*cu24 %r6,%r9,15 -.*: b2 a6 f0 69 [ ]*cu21 %r6,%r9,15 -.*: b9 b3 00 69 [ ]*cu42 %r6,%r9 -.*: b9 b2 00 69 [ ]*cu41 %r6,%r9 -.*: b2 a7 f0 69 [ ]*cu12 %r6,%r9,15 -.*: b9 b0 f0 69 [ ]*cu14 %r6,%r9,15 +.*: b9 b1 f0 68 [ ]*cu24 %r6,%r8,15 +.*: b2 a6 f0 68 [ ]*cu21 %r6,%r8,15 +.*: b9 b3 00 68 [ ]*cu42 %r6,%r8 +.*: b9 b2 00 68 [ ]*cu41 %r6,%r8 +.*: b2 a7 f0 68 [ ]*cu12 %r6,%r8,15 +.*: b9 b0 f0 68 [ ]*cu14 %r6,%r8,15 .*: b3 3b 60 95 [ ]*myr %f6,%f9,%f5 .*: b3 3d 60 95 [ ]*myhr %f6,%f9,%f5 .*: b3 39 60 95 [ ]*mylr %f6,%f9,%f5 -.*: ed 95 af ff 60 3b [ ]*my %f6,%f9,4095\(%r5,%r10\) +.*: ed 95 af ff 50 3b [ ]*my %f5,%f9,4095\(%r5,%r10\) .*: ed 95 af ff 60 3d [ ]*myh %f6,%f9,4095\(%r5,%r10\) .*: ed 95 af ff 60 39 [ ]*myl %f6,%f9,4095\(%r5,%r10\) .*: b3 3a 60 95 [ ]*mayr %f6,%f9,%f5 diff --git a/gas/testsuite/gas/s390/zarch-z9-109.s b/gas/testsuite/gas/s390/zarch-z9-109.s index 35f1140..9a70d90 100644 --- a/gas/testsuite/gas/s390/zarch-z9-109.s +++ b/gas/testsuite/gas/s390/zarch-z9-109.s @@ -39,16 +39,16 @@ foo: mvcos 4095(%r5),4095(%r10),%r6 lptea %r6,%r9,%r5,15 sske %r6,%r9,15 - cu24 %r6,%r9,15 - cu21 %r6,%r9,15 - cu42 %r6,%r9 - cu41 %r6,%r9 - cu12 %r6,%r9,15 - cu14 %r6,%r9,15 + cu24 %r6,%r8,15 + cu21 %r6,%r8,15 + cu42 %r6,%r8 + cu41 %r6,%r8 + cu12 %r6,%r8,15 + cu14 %r6,%r8,15 myr %f6,%f9,%f5 myhr %f6,%f9,%f5 mylr %f6,%f9,%f5 - my %f6,%f9,4095(%r5,%r10) + my %f5,%f9,4095(%r5,%r10) myh %f6,%f9,4095(%r5,%r10) myl %f6,%f9,4095(%r5,%r10) mayr %f6,%f9,%f5 diff --git a/gas/testsuite/gas/s390/zarch-z9-ec.d b/gas/testsuite/gas/s390/zarch-z9-ec.d index 9d557c7..86ac192 100644 --- a/gas/testsuite/gas/s390/zarch-z9-ec.d +++ b/gas/testsuite/gas/s390/zarch-z9-ec.d @@ -13,62 +13,62 @@ Disassembly of section .text: .*: b3 c1 00 62 [ ]*ldgr %f6,%r2 .*: b3 cd 00 26 [ ]*lgdr %r2,%f6 .*: b3 d2 40 62 [ ]*adtr %f6,%f2,%f4 -.*: b3 da 40 62 [ ]*axtr %f6,%f2,%f4 +.*: b3 da 40 89 [ ]*axtr %f8,%f9,%f4 .*: b3 e4 00 62 [ ]*cdtr %f6,%f2 -.*: b3 ec 00 62 [ ]*cxtr %f6,%f2 +.*: b3 ec 00 10 [ ]*cxtr %f1,%f0 .*: b3 e0 00 62 [ ]*kdtr %f6,%f2 .*: b3 e8 00 62 [ ]*kxtr %f6,%f2 .*: b3 f4 00 62 [ ]*cedtr %f6,%f2 -.*: b3 fc 00 62 [ ]*cextr %f6,%f2 +.*: b3 fc 00 10 [ ]*cextr %f1,%f0 .*: b3 f1 00 62 [ ]*cdgtr %f6,%r2 -.*: b3 f9 00 62 [ ]*cxgtr %f6,%r2 +.*: b3 f9 00 12 [ ]*cxgtr %f1,%r2 .*: b3 f3 00 62 [ ]*cdstr %f6,%r2 .*: b3 fb 00 62 [ ]*cxstr %f6,%r2 .*: b3 f2 00 62 [ ]*cdutr %f6,%r2 -.*: b3 fa 00 62 [ ]*cxutr %f6,%r2 +.*: b3 fa 00 12 [ ]*cxutr %f1,%r2 .*: b3 e1 10 26 [ ]*cgdtr %r2,1,%f6 -.*: b3 e9 10 26 [ ]*cgxtr %r2,1,%f6 +.*: b3 e9 10 21 [ ]*cgxtr %r2,1,%f1 .*: b3 e3 00 26 [ ]*csdtr %r2,%f6 -.*: b3 eb 00 26 [ ]*csxtr %r2,%f6 +.*: b3 eb 00 21 [ ]*csxtr %r2,%f1 .*: b3 e2 00 26 [ ]*cudtr %r2,%f6 -.*: b3 ea 00 26 [ ]*cuxtr %r2,%f6 +.*: b3 ea 00 21 [ ]*cuxtr %r2,%f1 .*: b3 d1 40 62 [ ]*ddtr %f6,%f2,%f4 -.*: b3 d9 40 62 [ ]*dxtr %f6,%f2,%f4 +.*: b3 d9 40 10 [ ]*dxtr %f1,%f0,%f4 .*: b3 e5 00 26 [ ]*eedtr %r2,%f6 -.*: b3 ed 00 26 [ ]*eextr %r2,%f6 +.*: b3 ed 00 21 [ ]*eextr %r2,%f1 .*: b3 e7 00 26 [ ]*esdtr %r2,%f6 -.*: b3 ef 00 26 [ ]*esxtr %r2,%f6 +.*: b3 ef 00 21 [ ]*esxtr %r2,%f1 .*: b3 f6 20 64 [ ]*iedtr %f6,%f2,%r4 -.*: b3 fe 20 64 [ ]*iextr %f6,%f2,%r4 +.*: b3 fe 00 14 [ ]*iextr %f1,%f0,%r4 .*: b3 d6 00 62 [ ]*ltdtr %f6,%f2 -.*: b3 de 00 62 [ ]*ltxtr %f6,%f2 +.*: b3 de 00 54 [ ]*ltxtr %f5,%f4 .*: b3 d7 13 62 [ ]*fidtr %f6,1,%f2,3 -.*: b3 df 13 62 [ ]*fixtr %f6,1,%f2,3 +.*: b3 df 13 54 [ ]*fixtr %f5,1,%f4,3 .*: b2 bd 10 03 [ ]*lfas 3\(%r1\) .*: b3 d4 01 62 [ ]*ldetr %f6,%f2,1 -.*: b3 dc 01 62 [ ]*lxdtr %f6,%f2,1 +.*: b3 dc 01 42 [ ]*lxdtr %f4,%f2,1 .*: b3 d5 13 62 [ ]*ledtr %f6,1,%f2,3 -.*: b3 dd 13 62 [ ]*ldxtr %f6,1,%f2,3 +.*: b3 dd 13 64 [ ]*ldxtr %f6,1,%f4,3 .*: b3 d0 40 62 [ ]*mdtr %f6,%f2,%f4 -.*: b3 d8 40 62 [ ]*mxtr %f6,%f2,%f4 +.*: b3 d8 40 98 [ ]*mxtr %f9,%f8,%f4 .*: b3 f5 21 64 [ ]*qadtr %f6,%f2,%f4,1 -.*: b3 fd 21 64 [ ]*qaxtr %f6,%f2,%f4,1 +.*: b3 fd 81 94 [ ]*qaxtr %f9,%f8,%f4,1 .*: b3 f7 21 64 [ ]*rrdtr %f6,%f2,%r4,1 -.*: b3 ff 21 64 [ ]*rrxtr %f6,%f2,%r4,1 +.*: b3 ff 81 94 [ ]*rrxtr %f9,%f8,%r4,1 .*: b2 b9 10 03 [ ]*srnmt 3\(%r1\) .*: b3 85 00 20 [ ]*sfasr %r2 .*: ed 21 40 03 60 40 [ ]*sldt %f6,%f2,3\(%r1,%r4\) -.*: ed 21 40 03 60 48 [ ]*slxt %f6,%f2,3\(%r1,%r4\) +.*: ed 41 40 03 50 48 [ ]*slxt %f5,%f4,3\(%r1,%r4\) .*: ed 21 40 03 60 41 [ ]*srdt %f6,%f2,3\(%r1,%r4\) -.*: ed 21 40 03 60 49 [ ]*srxt %f6,%f2,3\(%r1,%r4\) +.*: ed 41 40 03 50 49 [ ]*srxt %f5,%f4,3\(%r1,%r4\) .*: b3 d3 40 62 [ ]*sdtr %f6,%f2,%f4 -.*: b3 db 40 62 [ ]*sxtr %f6,%f2,%f4 +.*: b3 db 40 51 [ ]*sxtr %f5,%f1,%f4 .*: ed 61 20 03 00 50 [ ]*tdcet %f6,3\(%r1,%r2\) .*: ed 61 20 03 00 54 [ ]*tdcdt %f6,3\(%r1,%r2\) -.*: ed 61 20 03 00 58 [ ]*tdcxt %f6,3\(%r1,%r2\) +.*: ed 51 20 03 00 58 [ ]*tdcxt %f5,3\(%r1,%r2\) .*: ed 61 20 03 00 51 [ ]*tdget %f6,3\(%r1,%r2\) .*: ed 61 20 03 00 55 [ ]*tdgdt %f6,3\(%r1,%r2\) -.*: ed 61 20 03 00 59 [ ]*tdgxt %f6,3\(%r1,%r2\) +.*: ed 51 20 03 00 59 [ ]*tdgxt %f5,3\(%r1,%r2\) .*: 01 0a [ ]*pfpo .*: c8 31 10 0a 20 14 [ ]*ectg 10\(%r1\),20\(%r2\),%r3 .*: c8 32 10 0a 20 14 [ ]*csst 10\(%r1\),20\(%r2\),%r3 diff --git a/gas/testsuite/gas/s390/zarch-z9-ec.s b/gas/testsuite/gas/s390/zarch-z9-ec.s index bf3dcaf..08ed821 100644 --- a/gas/testsuite/gas/s390/zarch-z9-ec.s +++ b/gas/testsuite/gas/s390/zarch-z9-ec.s @@ -7,62 +7,62 @@ foo: ldgr %f6,%r2 lgdr %r2,%f6 adtr %f6,%f2,%f4 - axtr %f6,%f2,%f4 + axtr %f8,%f9,%f4 cdtr %f6,%f2 - cxtr %f6,%f2 + cxtr %f1,%f0 kdtr %f6,%f2 kxtr %f6,%f2 cedtr %f6,%f2 - cextr %f6,%f2 + cextr %f1,%f0 cdgtr %f6,%r2 - cxgtr %f6,%r2 + cxgtr %f1,%r2 cdstr %f6,%r2 cxstr %f6,%r2 cdutr %f6,%r2 - cxutr %f6,%r2 + cxutr %f1,%r2 cgdtr %r2,1,%f6 - cgxtr %r2,1,%f6 + cgxtr %r2,1,%f1 csdtr %r2,%f6 - csxtr %r2,%f6 + csxtr %r2,%f1 cudtr %r2,%f6 - cuxtr %r2,%f6 + cuxtr %r2,%f1 ddtr %f6,%f2,%f4 - dxtr %f6,%f2,%f4 + dxtr %f1,%f0,%f4 eedtr %r2,%f6 - eextr %r2,%f6 + eextr %r2,%f1 esdtr %r2,%f6 - esxtr %r2,%f6 + esxtr %r2,%f1 iedtr %f6,%f2,%r4 - iextr %f6,%f2,%r4 + iextr %f1,%f0,%r4 ltdtr %f6,%f2 - ltxtr %f6,%f2 + ltxtr %f5,%f4 fidtr %f6,1,%f2,3 - fixtr %f6,1,%f2,3 + fixtr %f5,1,%f4,3 lfas 3(%r1) ldetr %f6,%f2,1 - lxdtr %f6,%f2,1 + lxdtr %f4,%f2,1 ledtr %f6,1,%f2,3 - ldxtr %f6,1,%f2,3 + ldxtr %f6,1,%f4,3 mdtr %f6,%f2,%f4 - mxtr %f6,%f2,%f4 + mxtr %f9,%f8,%f4 qadtr %f6,%f2,%f4,1 - qaxtr %f6,%f2,%f4,1 + qaxtr %f9,%f8,%f4,1 rrdtr %f6,%f2,%r4,1 - rrxtr %f6,%f2,%r4,1 + rrxtr %f9,%f8,%r4,1 srnmt 3(%r1) sfasr %r2 sldt %f6,%f2,3(%r1,%r4) - slxt %f6,%f2,3(%r1,%r4) + slxt %f5,%f4,3(%r1,%r4) srdt %f6,%f2,3(%r1,%r4) - srxt %f6,%f2,3(%r1,%r4) + srxt %f5,%f4,3(%r1,%r4) sdtr %f6,%f2,%f4 - sxtr %f6,%f2,%f4 + sxtr %f5,%f1,%f4 tdcet %f6,3(%r1,%r2) tdcdt %f6,3(%r1,%r2) - tdcxt %f6,3(%r1,%r2) + tdcxt %f5,3(%r1,%r2) tdget %f6,3(%r1,%r2) tdgdt %f6,3(%r1,%r2) - tdgxt %f6,3(%r1,%r2) + tdgxt %f5,3(%r1,%r2) pfpo ectg 10(%r1),20(%r2),%r3 csst 10(%r1),20(%r2),%r3 diff --git a/gas/testsuite/gas/s390/zarch-z900.d b/gas/testsuite/gas/s390/zarch-z900.d index 2cb352f..561fca6 100644 --- a/gas/testsuite/gas/s390/zarch-z900.d +++ b/gas/testsuite/gas/s390/zarch-z900.d @@ -26,7 +26,7 @@ Disassembly of section .text: .*: eb 96 5f ff 00 45 [ ]*bxleg %r9,%r6,4095\(%r5\) .*: b3 a5 00 96 [ ]*cdgbr %f9,%r6 .*: b3 c5 00 96 [ ]*cdgr %f9,%r6 -.*: eb 96 5f ff 00 3e [ ]*cdsg %r9,%r6,4095\(%r5\) +.*: eb 86 5f ff 00 3e [ ]*cdsg %r8,%r6,4095\(%r5\) .*: b3 a4 00 96 [ ]*cegbr %f9,%r6 .*: b3 c4 00 96 [ ]*cegr %f9,%r6 .*: e3 95 af ff 00 20 [ ]*cg %r9,4095\(%r5,%r10\) @@ -38,8 +38,8 @@ Disassembly of section .text: .*: b9 30 00 96 [ ]*cgfr %r9,%r6 .*: a7 9f 80 01 [ ]*cghi %r9,-32767 .*: b9 20 00 96 [ ]*cgr %r9,%r6 -.*: b3 aa f0 65 [ ]*cgxbr %r6,15,%f5 -.*: b3 ca f0 65 [ ]*cgxr %r6,15,%f5 +.*: b3 aa f0 64 [ ]*cgxbr %r6,15,%f4 +.*: b3 ca f0 64 [ ]*cgxr %r6,15,%f4 .*: e3 95 af ff 00 21 [ ]*clg %r9,4095\(%r5,%r10\) .*: e3 95 af ff 00 31 [ ]*clgf %r9,4095\(%r5,%r10\) .*: b9 31 00 96 [ ]*clgfr %r9,%r6 @@ -48,14 +48,14 @@ Disassembly of section .text: .*: eb 96 5f ff 00 30 [ ]*csg %r9,%r6,4095\(%r5\) .*: e3 95 af ff 00 0e [ ]*cvbg %r9,4095\(%r5,%r10\) .*: e3 95 af ff 00 2e [ ]*cvdg %r9,4095\(%r5,%r10\) -.*: b3 a6 00 96 [ ]*cxgbr %f9,%r6 -.*: b3 c6 00 96 [ ]*cxgr %f9,%r6 -.*: e3 95 af ff 00 87 [ ]*dlg %r9,4095\(%r5,%r10\) -.*: b9 87 00 96 [ ]*dlgr %r9,%r6 -.*: e3 95 af ff 00 0d [ ]*dsg %r9,4095\(%r5,%r10\) -.*: e3 95 af ff 00 1d [ ]*dsgf %r9,4095\(%r5,%r10\) -.*: b9 1d 00 96 [ ]*dsgfr %r9,%r6 -.*: b9 0d 00 96 [ ]*dsgr %r9,%r6 +.*: b3 a6 00 86 [ ]*cxgbr %f8,%r6 +.*: b3 c6 00 86 [ ]*cxgr %f8,%r6 +.*: e3 85 af ff 00 87 [ ]*dlg %r8,4095\(%r5,%r10\) +.*: b9 87 00 86 [ ]*dlgr %r8,%r6 +.*: e3 85 af ff 00 0d [ ]*dsg %r8,4095\(%r5,%r10\) +.*: e3 85 af ff 00 1d [ ]*dsgf %r8,4095\(%r5,%r10\) +.*: b9 1d 00 86 [ ]*dsgfr %r8,%r6 +.*: b9 0d 00 86 [ ]*dsgr %r8,%r6 .*: b9 0e 00 96 [ ]*eregg %r9,%r6 .*: b9 9d 00 90 [ ]*esea %r9 .*: eb 9a 5f ff 00 80 [ ]*icmh %r9,10,4095\(%r5\) @@ -89,7 +89,7 @@ Disassembly of section .text: .*: b9 01 00 96 [ ]*lngr %r9,%r6 .*: b9 10 00 96 [ ]*lpgfr %r9,%r6 .*: b9 00 00 96 [ ]*lpgr %r9,%r6 -.*: e3 95 af ff 00 8f [ ]*lpq %r9,4095\(%r5,%r10\) +.*: e3 85 af ff 00 8f [ ]*lpq %r8,4095\(%r5,%r10\) .*: b2 b2 5f ff [ ]*lpswe 4095\(%r5\) .*: e3 95 af ff 00 03 [ ]*lrag %r9,4095\(%r5,%r10\) .*: e3 95 af ff 00 0f [ ]*lrvg %r9,4095\(%r5,%r10\) @@ -98,8 +98,8 @@ Disassembly of section .text: .*: b9 02 00 96 [ ]*ltgr %r9,%r6 .*: b9 05 00 96 [ ]*lurag %r9,%r6 .*: a7 9d 80 01 [ ]*mghi %r9,-32767 -.*: e3 95 af ff 00 86 [ ]*mlg %r9,4095\(%r5,%r10\) -.*: b9 86 00 96 [ ]*mlgr %r9,%r6 +.*: e3 85 af ff 00 86 [ ]*mlg %r8,4095\(%r5,%r10\) +.*: b9 86 00 86 [ ]*mlgr %r8,%r6 .*: e3 95 af ff 00 0c [ ]*msg %r9,4095\(%r5,%r10\) .*: e3 95 af ff 00 1c [ ]*msgf %r9,4095\(%r5,%r10\) .*: b9 1c 00 96 [ ]*msgfr %r9,%r6 diff --git a/gas/testsuite/gas/s390/zarch-z900.s b/gas/testsuite/gas/s390/zarch-z900.s index 721244a..a175cca 100644 --- a/gas/testsuite/gas/s390/zarch-z900.s +++ b/gas/testsuite/gas/s390/zarch-z900.s @@ -20,7 +20,7 @@ foo: bxleg %r9,%r6,4095(%r5) cdgbr %f9,%r6 cdgr %f9,%r6 - cdsg %r9,%r6,4095(%r5) + cdsg %r8,%r6,4095(%r5) cegbr %f9,%r6 cegr %f9,%r6 cg %r9,4095(%r5,%r10) @@ -32,8 +32,8 @@ foo: cgfr %r9,%r6 cghi %r9,-32767 cgr %r9,%r6 - cgxbr %r6,15,%f5 - cgxr %r6,15,%f5 + cgxbr %r6,15,%f4 + cgxr %r6,15,%f4 clg %r9,4095(%r5,%r10) clgf %r9,4095(%r5,%r10) clgfr %r9,%r6 @@ -42,14 +42,14 @@ foo: csg %r9,%r6,4095(%r5) cvbg %r9,4095(%r5,%r10) cvdg %r9,4095(%r5,%r10) - cxgbr %f9,%r6 - cxgr %f9,%r6 - dlg %r9,4095(%r5,%r10) - dlgr %r9,%r6 - dsg %r9,4095(%r5,%r10) - dsgf %r9,4095(%r5,%r10) - dsgfr %r9,%r6 - dsgr %r9,%r6 + cxgbr %f8,%r6 + cxgr %f8,%r6 + dlg %r8,4095(%r5,%r10) + dlgr %r8,%r6 + dsg %r8,4095(%r5,%r10) + dsgf %r8,4095(%r5,%r10) + dsgfr %r8,%r6 + dsgr %r8,%r6 eregg %r9,%r6 esea %r9 icmh %r9,10,4095(%r5) @@ -83,7 +83,7 @@ foo: lngr %r9,%r6 lpgfr %r9,%r6 lpgr %r9,%r6 - lpq %r9,4095(%r5,%r10) + lpq %r8,4095(%r5,%r10) lpswe 4095(%r5) lrag %r9,4095(%r5,%r10) lrvg %r9,4095(%r5,%r10) @@ -92,8 +92,8 @@ foo: ltgr %r9,%r6 lurag %r9,%r6 mghi %r9,-32767 - mlg %r9,4095(%r5,%r10) - mlgr %r9,%r6 + mlg %r8,4095(%r5,%r10) + mlgr %r8,%r6 msg %r9,4095(%r5,%r10) msgf %r9,4095(%r5,%r10) msgfr %r9,%r6 diff --git a/gas/testsuite/gas/s390/zarch-z990.d b/gas/testsuite/gas/s390/zarch-z990.d index dede971..c31d04c 100644 --- a/gas/testsuite/gas/s390/zarch-z990.d +++ b/gas/testsuite/gas/s390/zarch-z990.d @@ -18,8 +18,8 @@ Disassembly of section .text: .*: e3 60 50 00 80 46 [ ]*bctg %r6,-524288\(%r5\) .*: eb 69 50 00 80 44 [ ]*bxhg %r6,%r9,-524288\(%r5\) .*: eb 69 50 00 80 45 [ ]*bxleg %r6,%r9,-524288\(%r5\) -.*: eb 69 50 00 80 3e [ ]*cdsg %r6,%r9,-524288\(%r5\) -.*: eb 69 50 00 80 31 [ ]*cdsy %r6,%r9,-524288\(%r5\) +.*: eb 68 50 00 80 3e [ ]*cdsg %r6,%r8,-524288\(%r5\) +.*: eb 68 50 00 80 31 [ ]*cdsy %r6,%r8,-524288\(%r5\) .*: e3 65 a0 00 80 20 [ ]*cg %r6,-524288\(%r5,%r10\) .*: e3 65 a0 00 80 30 [ ]*cgf %r6,-524288\(%r5,%r10\) .*: e3 65 a0 00 80 79 [ ]*chy %r6,-524288\(%r5,%r10\) @@ -83,7 +83,7 @@ Disassembly of section .text: .*: e3 65 a0 00 80 0c [ ]*msg %r6,-524288\(%r5,%r10\) .*: e3 65 a0 00 80 1c [ ]*msgf %r6,-524288\(%r5,%r10\) .*: e3 65 a0 00 80 51 [ ]*msy %r6,-524288\(%r5,%r10\) -.*: eb 69 50 00 80 8e [ ]*mvclu %r6,%r9,-524288\(%r5\) +.*: eb 68 50 00 80 8e [ ]*mvclu %r6,%r8,-524288\(%r5\) .*: eb ff 50 00 80 52 [ ]*mviy -524288\(%r5\),255 .*: e3 65 a0 00 80 80 [ ]*ng %r6,-524288\(%r5,%r10\) .*: eb ff 50 00 80 54 [ ]*niy -524288\(%r5\),255 diff --git a/gas/testsuite/gas/s390/zarch-z990.s b/gas/testsuite/gas/s390/zarch-z990.s index db2dece..1bea8f2 100644 --- a/gas/testsuite/gas/s390/zarch-z990.s +++ b/gas/testsuite/gas/s390/zarch-z990.s @@ -12,8 +12,8 @@ foo: bctg %r6,-524288(%r5) bxhg %r6,%r9,-524288(%r5) bxleg %r6,%r9,-524288(%r5) - cdsg %r6,%r9,-524288(%r5) - cdsy %r6,%r9,-524288(%r5) + cdsg %r6,%r8,-524288(%r5) + cdsy %r6,%r8,-524288(%r5) cg %r6,-524288(%r5,%r10) cgf %r6,-524288(%r5,%r10) chy %r6,-524288(%r5,%r10) @@ -77,7 +77,7 @@ foo: msg %r6,-524288(%r5,%r10) msgf %r6,-524288(%r5,%r10) msy %r6,-524288(%r5,%r10) - mvclu %r6,%r9,-524288(%r5) + mvclu %r6,%r8,-524288(%r5) mviy -524288(%r5),255 ng %r6,-524288(%r5,%r10) niy -524288(%r5),255 diff --git a/gas/testsuite/gas/sparc/hpcvis3.d b/gas/testsuite/gas/sparc/hpcvis3.d new file mode 100644 index 0000000..faa3137 --- /dev/null +++ b/gas/testsuite/gas/sparc/hpcvis3.d @@ -0,0 +1,89 @@ +#as: -Av9v +#objdump: -dr +#name: sparc HPC+VIS3 + +.*: +file format .*sparc.* + +Disassembly of section .text: + +0+ <.text>: + 0: 83 47 00 00 rd %cps, %g1 + 4: b9 80 a0 03 wr %g2, 3, %cps + 8: c7 08 c0 00 ldx \[ %g3 \], %efsr + c: 30 50 00 01 chkpt 0x10 + 10: bd f0 00 00 commit + 14: 87 a0 4a 22 fnadds %f1, %f2, %f3 + 18: 8d a0 8a 44 fnaddd %f2, %f4, %f6 + 1c: 8f a0 cb 25 fnmuls %f3, %f5, %f7 + 20: 95 a1 8b 48 fnmuld %f6, %f8, %f10 + 24: 97 a1 cc 29 fhadds %f7, %f9, %f11 + 28: 99 a2 0c 4a fhaddd %f8, %f10, %f12 + 2c: 9b a2 4c ab fhsubs %f9, %f11, %f13 + 30: 9d a2 8c cc fhsubd %f10, %f12, %f14 + 34: 9f a2 ce 2d fnhadds %f11, %f13, %f15 + 38: a1 a3 0e 4e fnhaddd %f12, %f14, %f16 + 3c: a1 a3 4f 2f fnsmuld %f13, %f15, %f16 + 40: ab bb e6 31 fmadds %f15, %f17, %f19, %f21 + 44: a9 bb a4 50 fmaddd %f14, %f16, %f18, %f20 + 48: af bc 6a b3 fmsubs %f17, %f19, %f21, %f23 + 4c: ad bc 28 d2 fmsubd %f16, %f18, %f20, %f22 + 50: b3 bc ef 35 fnmsubs %f19, %f21, %f23, %f25 + 54: b1 bc ad 54 fnmsubd %f18, %f20, %f22, %f24 + 58: b7 bd 73 b7 fnmadds %f21, %f23, %f25, %f27 + 5c: b5 bd 31 d6 fnmaddd %f20, %f22, %f24, %f26 + 60: bb fd f6 39 fumadds %f23, %f25, %f27, %f29 + 64: b9 fd b4 58 fumaddd %f22, %f24, %f26, %f28 + 68: bf fe 7a bb fumsubs %f25, %f27, %f29, %f31 + 6c: bd fe 38 da fumsubd %f24, %f26, %f28, %f30 + 70: 8f f8 4b 23 fnumsubs %f1, %f3, %f5, %f7 + 74: 91 f8 8d 44 fnumsubd %f2, %f4, %f6, %f8 + 78: 93 f8 cf a5 fnumadds %f3, %f5, %f7, %f9 + 7c: 95 f9 11 c6 fnumaddd %f4, %f6, %f8, %f10 + 80: 8f b1 42 26 addxc %g5, %g6, %g7 + 84: 97 b2 42 6a addxccc %o1, %o2, %o3 + 88: 99 b0 02 a0 random %o4 + 8c: 9f b3 42 ce umulxhi %o5, %sp, %o7 + 90: b5 b0 02 f9 lzd %i1, %i2 + 94: 81 b0 03 7b cmask8 %i3 + 98: 81 b0 03 bc cmask16 %i4 + 9c: 81 b0 03 fd cmask32 %i5 + a0: 8b b0 44 23 fsll16 %f32, %f34, %f36 + a4: 8f b0 c4 65 fsrl16 %f34, %f36, %f38 + a8: 93 b1 44 a7 fsll32 %f36, %f38, %f40 + ac: 97 b1 c4 e9 fsrl32 %f38, %f40, %f42 + b0: 9b b2 45 2b fslas16 %f40, %f42, %f44 + b4: 9f b2 c5 6d fsra16 %f42, %f44, %f46 + b8: a3 b3 45 af fslas32 %f44, %f46, %f48 + bc: a7 b3 c5 f1 fsra32 %f46, %f48, %f50 + c0: 83 b4 47 f3 pdistn %f48, %f50, %g1 + c4: af b4 c8 15 fmean16 %f50, %f52, %f54 + c8: b3 b5 48 57 fpadd64 %f52, %f54, %f56 + cc: b7 b5 c8 99 fchksm16 %f54, %f56, %f58 + d0: bb b6 48 db fpsub64 %f56, %f58, %f60 + d4: bf b6 cb 1d fpadds16 %f58, %f60, %f62 + d8: 8d b0 8b 24 fpadds16s %f2, %f4, %f6 + dc: 91 b1 0b 46 fpadds32 %f4, %f6, %f8 + e0: 95 b1 8b 68 fpadds32s %f6, %f8, %f10 + e4: 99 b2 0b 8a fpsubs16 %f8, %f10, %f12 + e8: 9d b2 8b ac fpsubs16s %f10, %f12, %f14 + ec: a1 b3 0b ce fpsubs32 %f12, %f14, %f16 + f0: a5 b3 8b f0 fpsubs32s %f14, %f16, %f18 + f4: 83 b0 22 14 movdtox %f20, %g1 + f8: 85 b0 22 35 movstouw %f21, %g2 + fc: 87 b0 22 77 movstosw %f23, %g3 + 100: ad b0 23 04 movxtod %g4, %f22 + 104: af b0 23 25 movwtos %g5, %f23 + 108: 97 b2 62 aa xmulx %o1, %o2, %o3 + 10c: 9d b3 22 cd xmulxhi %o4, %o5, %sp + 110: 83 b4 24 12 fucmple8 %f16, %f18, %g1 + 114: 85 b4 a4 54 fucmpne8 %f18, %f20, %g2 + 118: 87 b5 25 16 fucmpgt8 %f20, %f22, %g3 + 11c: 89 b5 a5 58 fucmpeq8 %f22, %f24, %g4 + 120: 81 b0 6a 23 flcmps %fcc0, %f1, %f3 + 124: 83 b0 ea 25 flcmps %fcc1, %f3, %f5 + 128: 85 b1 6a 27 flcmps %fcc2, %f5, %f7 + 12c: 87 b1 ea 29 flcmps %fcc3, %f7, %f9 + 130: 81 b3 2a 4e flcmpd %fcc0, %f12, %f14 + 134: 83 b3 aa 50 flcmpd %fcc1, %f14, %f16 + 138: 85 b4 2a 52 flcmpd %fcc2, %f16, %f18 + 13c: 87 b4 aa 54 flcmpd %fcc3, %f18, %f20 diff --git a/gas/testsuite/gas/sparc/hpcvis3.s b/gas/testsuite/gas/sparc/hpcvis3.s new file mode 100644 index 0000000..8da08f4 --- /dev/null +++ b/gas/testsuite/gas/sparc/hpcvis3.s @@ -0,0 +1,82 @@ +# Test HPC/VIS3 instructions + .text + rd %cps, %g1 + wr %g2, 0x3, %cps + ldx [%g3], %efsr + chkpt 1f +1: commit + fnadds %f1, %f2, %f3 + fnaddd %f2, %f4, %f6 + fnmuls %f3, %f5, %f7 + fnmuld %f6, %f8, %f10 + fhadds %f7, %f9, %f11 + fhaddd %f8, %f10, %f12 + fhsubs %f9, %f11, %f13 + fhsubd %f10, %f12, %f14 + fnhadds %f11, %f13, %f15 + fnhaddd %f12, %f14, %f16 + fnsmuld %f13, %f15, %f16 + fmadds %f15, %f17, %f19, %f21 + fmaddd %f14, %f16, %f18, %f20 + fmsubs %f17, %f19, %f21, %f23 + fmsubd %f16, %f18, %f20, %f22 + fnmsubs %f19, %f21, %f23, %f25 + fnmsubd %f18, %f20, %f22, %f24 + fnmadds %f21, %f23, %f25, %f27 + fnmaddd %f20, %f22, %f24, %f26 + fumadds %f23, %f25, %f27, %f29 + fumaddd %f22, %f24, %f26, %f28 + fumsubs %f25, %f27, %f29, %f31 + fumsubd %f24, %f26, %f28, %f30 + fnumsubs %f1, %f3, %f5, %f7 + fnumsubd %f2, %f4, %f6, %f8 + fnumadds %f3, %f5, %f7, %f9 + fnumaddd %f4, %f6, %f8, %f10 + addxc %g5, %g6, %g7 + addxccc %o1, %o2, %o3 + random %o4 + umulxhi %o5, %o6, %o7 + lzd %i1, %i2 + cmask8 %i3 + cmask16 %i4 + cmask32 %i5 + fsll16 %f32, %f34, %f36 + fsrl16 %f34, %f36, %f38 + fsll32 %f36, %f38, %f40 + fsrl32 %f38, %f40, %f42 + fslas16 %f40, %f42, %f44 + fsra16 %f42, %f44, %f46 + fslas32 %f44, %f46, %f48 + fsra32 %f46, %f48, %f50 + pdistn %f48, %f50, %g1 + fmean16 %f50, %f52, %f54 + fpadd64 %f52, %f54, %f56 + fchksm16 %f54, %f56, %f58 + fpsub64 %f56, %f58, %f60 + fpadds16 %f58, %f60, %f62 + fpadds16s %f2, %f4, %f6 + fpadds32 %f4, %f6, %f8 + fpadds32s %f6, %f8, %f10 + fpsubs16 %f8, %f10, %f12 + fpsubs16s %f10, %f12, %f14 + fpsubs32 %f12, %f14, %f16 + fpsubs32s %f14, %f16, %f18 + movdtox %f20, %g1 + movstouw %f21, %g2 + movstosw %f23, %g3 + movxtod %g4, %f22 + movwtos %g5, %f23 + xmulx %o1, %o2, %o3 + xmulxhi %o4, %o5, %o6 + fucmple8 %f16, %f18, %g1 + fucmpne8 %f18, %f20, %g2 + fucmpgt8 %f20, %f22, %g3 + fucmpeq8 %f22, %f24, %g4 + flcmps %fcc0, %f1, %f3 + flcmps %fcc1, %f3, %f5 + flcmps %fcc2, %f5, %f7 + flcmps %fcc3, %f7, %f9 + flcmpd %fcc0, %f12, %f14 + flcmpd %fcc1, %f14, %f16 + flcmpd %fcc2, %f16, %f18 + flcmpd %fcc3, %f18, %f20 diff --git a/gas/testsuite/gas/sparc/imm-plus-rreg.d b/gas/testsuite/gas/sparc/imm-plus-rreg.d new file mode 100644 index 0000000..4af1f18 --- /dev/null +++ b/gas/testsuite/gas/sparc/imm-plus-rreg.d @@ -0,0 +1,13 @@ +#as: -Av8 +#objdump: -dr +#name: address: simm13 + rreg + +.*: +file format .* + +Disassembly of section .text: + +0+ : + 0: c2 02 20 0a ld \[ %o0 \+ 0xa \], %g1 + 4: c4 04 a0 0a ld \[ %l2 \+ 0xa \], %g2 + 8: c4 22 20 0a st %g2, \[ %o0 \+ 0xa \] + c: c2 24 a0 0a st %g1, \[ %l2 \+ 0xa \] diff --git a/gas/testsuite/gas/sparc/imm-plus-rreg.s b/gas/testsuite/gas/sparc/imm-plus-rreg.s new file mode 100644 index 0000000..c84e3e8 --- /dev/null +++ b/gas/testsuite/gas/sparc/imm-plus-rreg.s @@ -0,0 +1,7 @@ +! simm13 + regrs1 address using r<0..31> instead of [goli]<0..7> + .text +foo: + ld [10+%r8], %r1 + ld [10+%r18], %r2 + st %r2, [10+%r8] + st %r1, [10+%r18] diff --git a/gas/testsuite/gas/sparc/save-args.d b/gas/testsuite/gas/sparc/save-args.d new file mode 100644 index 0000000..19e6d72 --- /dev/null +++ b/gas/testsuite/gas/sparc/save-args.d @@ -0,0 +1,12 @@ +#as: -Av8 +#objdump: -dr +#name: software traps + +.*: +file format .* + +Disassembly of section .text: + +0+ : + 0: 81 e0 00 00 save + 4: 9d e3 bf a0 save %sp, -96, %sp + 8: 9d e3 bf a0 save %sp, -96, %sp diff --git a/gas/testsuite/gas/sparc/save-args.s b/gas/testsuite/gas/sparc/save-args.s new file mode 100644 index 0000000..acaa311 --- /dev/null +++ b/gas/testsuite/gas/sparc/save-args.s @@ -0,0 +1,6 @@ +! Test several forms of save argument + .text +foo: + save + save %sp, -96, %sp + save -96, %sp, %sp diff --git a/gas/testsuite/gas/sparc/sparc.exp b/gas/testsuite/gas/sparc/sparc.exp index dfb6249..faba8e4 100644 --- a/gas/testsuite/gas/sparc/sparc.exp +++ b/gas/testsuite/gas/sparc/sparc.exp @@ -50,12 +50,17 @@ if [istarget sparc*-*-*] { run_dump_test "plt64" run_dump_test "gotop64" } + run_dump_test "imm-plus-rreg" + run_dump_test "ticc-imm-reg" + run_dump_test "v8-movwr-imm" + run_dump_test "save-args" run_dump_test "v9branch1" run_dump_test "v9branch2" run_dump_test "v9branch3" run_dump_test "v9branch4" run_dump_test "v9branch5" run_dump_test "pc2210" + run_dump_test "hpcvis3" run_list_test "pr4587" "" } diff --git a/gas/testsuite/gas/sparc/ticc-imm-reg.d b/gas/testsuite/gas/sparc/ticc-imm-reg.d new file mode 100644 index 0000000..dddefaf --- /dev/null +++ b/gas/testsuite/gas/sparc/ticc-imm-reg.d @@ -0,0 +1,18 @@ +#as: -32 -Av8 +#objdump: -dr +#name: software traps + +.*: +file format .* + +Disassembly of section .text: + +0+ : + 0: 91 d2 00 00 ta %o0 + 4: 91 d2 00 0a ta %o0 \+ %o2 + 8: 91 d4 20 0a ta %l0 \+ 0xa + c: 91 d4 3f f6 ta %l0 \+ -10 + 10: 91 d4 3f f6 ta %l0 \+ -10 + 14: 91 d4 20 0a ta %l0 \+ 0xa + 18: 91 d0 20 7f ta 0x7f + 1c: 91 d6 20 0a ta %i0 \+ 0xa + 20: 91 d6 3f f6 ta %i0 \+ -10 diff --git a/gas/testsuite/gas/sparc/ticc-imm-reg.s b/gas/testsuite/gas/sparc/ticc-imm-reg.s new file mode 100644 index 0000000..27dcd43 --- /dev/null +++ b/gas/testsuite/gas/sparc/ticc-imm-reg.s @@ -0,0 +1,12 @@ +! Make ticc aliases operate as per V8 SPARC Architecture Manual + .text +foo: + ta %o0 + ta %o0 + %o2 + ta %l0 + 10 + ta %l0 + -10 + ta %l0 - 10 + ta %l0 - -10 + ta 127 + ta 10 + %i0 + ta -10 + %i0 diff --git a/gas/testsuite/gas/sparc/v8-movwr-imm.d b/gas/testsuite/gas/sparc/v8-movwr-imm.d new file mode 100644 index 0000000..e0c1a00 --- /dev/null +++ b/gas/testsuite/gas/sparc/v8-movwr-imm.d @@ -0,0 +1,49 @@ +#as: -32 -Av8 +#objdump: -dr +#name: V8 mov/wr aliases + +.*: +file format .* + +Disassembly of section .text: + +0+ : + 0: 83 80 00 10 mov %l0, %asr1 + 4: 81 80 00 10 mov %l0, %y + 8: 81 88 00 10 mov %l0, %psr + c: 81 90 00 10 mov %l0, %wim + 10: 81 98 00 10 mov %l0, %tbr + 14: 83 80 00 00 mov %g0, %asr1 + 18: 81 80 00 00 mov %g0, %y + 1c: 81 88 00 00 mov %g0, %psr + 20: 81 90 00 00 mov %g0, %wim + 24: 81 98 00 00 mov %g0, %tbr + 28: 83 80 20 00 mov %g0, %asr1 + 2c: 81 80 20 00 mov %g0, %y + 30: 81 88 20 00 mov %g0, %psr + 34: 81 90 20 00 mov %g0, %wim + 38: 81 98 20 00 mov %g0, %tbr + 3c: 83 80 3f ff mov -1, %asr1 + 40: 81 80 3f ff mov -1, %y + 44: 81 88 3f ff mov -1, %psr + 48: 81 90 3f ff mov -1, %wim + 4c: 81 98 3f ff mov -1, %tbr + 50: 83 80 00 10 mov %l0, %asr1 + 54: 81 80 00 10 mov %l0, %y + 58: 81 88 00 10 mov %l0, %psr + 5c: 81 90 00 10 mov %l0, %wim + 60: 81 98 00 10 mov %l0, %tbr + 64: 83 80 00 00 mov %g0, %asr1 + 68: 81 80 00 00 mov %g0, %y + 6c: 81 88 00 00 mov %g0, %psr + 70: 81 90 00 00 mov %g0, %wim + 74: 81 98 00 00 mov %g0, %tbr + 78: 83 80 20 00 mov %g0, %asr1 + 7c: 81 80 20 00 mov %g0, %y + 80: 81 88 20 00 mov %g0, %psr + 84: 81 90 20 00 mov %g0, %wim + 88: 81 98 20 00 mov %g0, %tbr + 8c: 83 80 3f ff mov -1, %asr1 + 90: 81 80 3f ff mov -1, %y + 94: 81 88 3f ff mov -1, %psr + 98: 81 90 3f ff mov -1, %wim + 9c: 81 98 3f ff mov -1, %tbr diff --git a/gas/testsuite/gas/sparc/v8-movwr-imm.s b/gas/testsuite/gas/sparc/v8-movwr-imm.s new file mode 100644 index 0000000..26a46bb --- /dev/null +++ b/gas/testsuite/gas/sparc/v8-movwr-imm.s @@ -0,0 +1,45 @@ +! Make 'mov' and 'wr' aliases operate as per V8 SPARC Architecture Manual + .text +foo: + ! wr Aliases + wr %l0,%asr1 + wr %l0,%y + wr %l0,%psr + wr %l0,%wim + wr %l0,%tbr + wr %g0,%asr1 + wr %g0,%y + wr %g0,%psr + wr %g0,%wim + wr %g0,%tbr + wr 0,%asr1 + wr 0,%y + wr 0,%psr + wr 0,%wim + wr 0,%tbr + wr -1,%asr1 + wr -1,%y + wr -1,%psr + wr -1,%wim + wr -1,%tbr + ! mov Aliases + mov %l0,%asr1 + mov %l0,%y + mov %l0,%psr + mov %l0,%wim + mov %l0,%tbr + mov %g0,%asr1 + mov %g0,%y + mov %g0,%psr + mov %g0,%wim + mov %g0,%tbr + mov 0,%asr1 + mov 0,%y + mov 0,%psr + mov 0,%wim + mov 0,%tbr + mov -1,%asr1 + mov -1,%y + mov -1,%psr + mov -1,%wim + mov -1,%tbr diff --git a/gas/testsuite/gas/tic6x/pcr-relocs-undef.d b/gas/testsuite/gas/tic6x/pcr-relocs-undef.d new file mode 100644 index 0000000..26358aa --- /dev/null +++ b/gas/testsuite/gas/tic6x/pcr-relocs-undef.d @@ -0,0 +1,4 @@ +#name: C6X PCR relocs against undefined symbol +#as: +#source: pcr-relocs-undef.s +#error: undefined symbol diff --git a/gas/testsuite/gas/tic6x/pcr-relocs-undef.s b/gas/testsuite/gas/tic6x/pcr-relocs-undef.s new file mode 100644 index 0000000..bb08e7a --- /dev/null +++ b/gas/testsuite/gas/tic6x/pcr-relocs-undef.s @@ -0,0 +1,3 @@ + .text + .align 5 + mvk .s2 $PCR_OFFSET (S0,L1), b2 diff --git a/gas/testsuite/gas/tic6x/pcr-relocs.d b/gas/testsuite/gas/tic6x/pcr-relocs.d new file mode 100644 index 0000000..893def2 --- /dev/null +++ b/gas/testsuite/gas/tic6x/pcr-relocs.d @@ -0,0 +1,31 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: C6X PCR H16/L16 relocs +#as: -mlittle-endian + +.*: *file format elf32-tic6x-le + +Disassembly of section \.text: +0+00 <[^>]*> 00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1 +0+04 <[^>]*> 00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1 +0+08 <[^>]*> 00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1 +0+0c <[^>]*> 004003e2[ \t]+mvc \.S2 pce1,b0 +0+10 <[^>]*> 01000264[ \t]+ldw \.D1T1 \*\+a0\(0\),a2 +0+14 <[^>]*> 0100002a[ \t]+mvk \.S2 0,b2 +[ \t]+14: R_C6000_PCR_L16 S0\+0xfffffff4 +0+18 <[^>]*> 0100006a[ \t]+mvkh \.S2 0,b2 +[ \t]+18: R_C6000_PCR_H16 S0\+0xfffffff4 +0+1c <[^>]*> 0100002a[ \t]+mvk \.S2 0,b2 +[ \t]+1c: R_C6000_PCR_L16 S0\+0xffffffc8 +0+20 <[^>]*> 0100006a[ \t]+mvkh \.S2 0,b2 +[ \t]+20: R_C6000_PCR_H16 S0\+0xffffffe8 +0+24 <[^>]*> 0100002a[ \t]+mvk \.S2 0,b2 +[ \t]+24: R_C6000_PCR_L16 S1\+0x14 +0+28 <[^>]*> 0100006a[ \t]+mvkh \.S2 0,b2 +[ \t]+28: R_C6000_PCR_H16 S1\+0x14 +0+2c <[^>]*> 0100002a[ \t]+mvk \.S2 0,b2 +[ \t]+2c: R_C6000_PCR_L16 S1\+0xffffffe8 +0+30 <[^>]*> 0100006a[ \t]+mvkh \.S2 0,b2 +[ \t]+30: R_C6000_PCR_H16 S1\+0xffffffe8 +0+34 <[^>]*> 00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1 +0+38 <[^>]*> 004003e2[ \t]+mvc \.S2 pce1,b0 +0+3c <[^>]*> 00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1 diff --git a/gas/testsuite/gas/tic6x/pcr-relocs.s b/gas/testsuite/gas/tic6x/pcr-relocs.s new file mode 100644 index 0000000..d4e1019 --- /dev/null +++ b/gas/testsuite/gas/tic6x/pcr-relocs.s @@ -0,0 +1,25 @@ + .text + .align 5 +L0: + ldw .d1t1 *a0,a1 + ldw .d1t1 *a0,a1 + ldw .d1t1 *a0,a1 +L1: + MVC .s2 PCE1, b0 + ldw .d1t1 *a0,a2 + mvk .s2 $PCR_OFFSET (S0,L1), b2 + mvkh .s2 $PCR_OFFSET (S0,L1), b2 + mvk .s2 $PCR_OFFSET (S0,L2), b2 + mvkh .s2 $PCR_OFFSET (S0,L2), b2 + mvkl .s2 $PCR_OFFSET (S1,L1), b2 + mvkh .s2 $PCR_OFFSET (S1,L1), b2 + mvkl .s2 $PCR_OFFSET (S1,L2), b2 + mvkh .s2 $PCR_OFFSET (S1,L2), b2 + +S0: + ldw .d1t1 *a0,a1 +L2: + MVC .s2 PCE1, b0 + +S1: + ldw .d1t1 *a0,a1 diff --git a/gas/testsuite/gas/tic6x/reloc-bad-2.l b/gas/testsuite/gas/tic6x/reloc-bad-2.l index bfb2548..765912f 100644 --- a/gas/testsuite/gas/tic6x/reloc-bad-2.l +++ b/gas/testsuite/gas/tic6x/reloc-bad-2.l @@ -5,145 +5,168 @@ [^:]*:9: Error: \$DPR_BYTE not supported in this context [^:]*:10: Error: \$DPR_HWORD not supported in this context [^:]*:11: Error: \$DPR_WORD not supported in this context -[^:]*:16: Error: \$DSBT_INDEX not supported in this context -[^:]*:17: Error: \$GOT not supported in this context -[^:]*:18: Error: \$DPR_GOT not supported in this context -[^:]*:19: Error: \$DPR_BYTE not supported in this context -[^:]*:20: Error: \$DPR_HWORD not supported in this context -[^:]*:21: Error: \$DPR_WORD not supported in this context -[^:]*:22: Error: \$DSBT_INDEX not supported in this context -[^:]*:23: Error: \$GOT not supported in this context -[^:]*:24: Error: \$DPR_GOT not supported in this context -[^:]*:25: Error: \$DPR_BYTE not supported in this context -[^:]*:26: Error: \$DPR_HWORD not supported in this context -[^:]*:27: Error: \$DPR_WORD not supported in this context -[^:]*:28: Error: \$DPR_GOT not supported in this context -[^:]*:29: Error: \$DPR_BYTE not supported in this context -[^:]*:30: Error: \$DPR_HWORD not supported in this context -[^:]*:31: Error: \$DPR_WORD not supported in this context -[^:]*:32: Error: \$DSBT_INDEX not supported in this context -[^:]*:33: Error: \$GOT not supported in this context -[^:]*:34: Error: \$DPR_GOT not supported in this context -[^:]*:35: Error: \$DPR_HWORD not supported in this context -[^:]*:36: Error: \$DPR_WORD not supported in this context -[^:]*:37: Error: \$DSBT_INDEX not supported in this context -[^:]*:38: Error: \$GOT not supported in this context -[^:]*:39: Error: \$DPR_GOT not supported in this context -[^:]*:40: Error: \$DPR_HWORD not supported in this context -[^:]*:41: Error: \$DPR_WORD not supported in this context +[^:]*:12: Error: \$PCR_OFFSET not supported in this context +[^:]*:17: Error: \$DSBT_INDEX not supported in this context +[^:]*:18: Error: \$GOT not supported in this context +[^:]*:19: Error: \$DPR_GOT not supported in this context +[^:]*:20: Error: \$DPR_BYTE not supported in this context +[^:]*:21: Error: \$DPR_HWORD not supported in this context +[^:]*:22: Error: \$DPR_WORD not supported in this context +[^:]*:23: Error: \$PCR_OFFSET not supported in this context +[^:]*:24: Error: \$DSBT_INDEX not supported in this context +[^:]*:25: Error: \$GOT not supported in this context +[^:]*:26: Error: \$DPR_GOT not supported in this context +[^:]*:27: Error: \$DPR_BYTE not supported in this context +[^:]*:28: Error: \$DPR_HWORD not supported in this context +[^:]*:29: Error: \$DPR_WORD not supported in this context +[^:]*:30: Error: \$PCR_OFFSET not supported in this context +[^:]*:31: Error: \$DPR_GOT not supported in this context +[^:]*:32: Error: \$DPR_BYTE not supported in this context +[^:]*:33: Error: \$DPR_HWORD not supported in this context +[^:]*:34: Error: \$DPR_WORD not supported in this context +[^:]*:35: Error: \$PCR_OFFSET not supported in this context +[^:]*:36: Error: \$DSBT_INDEX not supported in this context +[^:]*:37: Error: \$GOT not supported in this context +[^:]*:38: Error: \$DPR_GOT not supported in this context +[^:]*:39: Error: \$DPR_HWORD not supported in this context +[^:]*:40: Error: \$DPR_WORD not supported in this context [^:]*:42: Error: \$DSBT_INDEX not supported in this context [^:]*:43: Error: \$GOT not supported in this context -[^:]*:44: Error: \$DSBT_INDEX not supported in this context -[^:]*:45: Error: \$GOT not supported in this context -[^:]*:46: Error: \$DSBT_INDEX not supported in this context -[^:]*:47: Error: \$GOT not supported in this context -[^:]*:48: Error: \$DSBT_INDEX not supported in this context -[^:]*:49: Error: \$GOT not supported in this context -[^:]*:50: Error: \$DPR_GOT not supported in this context -[^:]*:51: Error: \$DPR_BYTE not supported in this context -[^:]*:52: Error: \$DPR_HWORD not supported in this context -[^:]*:53: Error: \$DPR_WORD not supported in this context -[^:]*:54: Error: \$DSBT_INDEX not supported in this context -[^:]*:55: Error: \$GOT not supported in this context -[^:]*:56: Error: \$DPR_GOT not supported in this context -[^:]*:57: Error: \$DPR_BYTE not supported in this context -[^:]*:58: Error: \$DPR_HWORD not supported in this context -[^:]*:59: Error: \$DPR_WORD not supported in this context +[^:]*:44: Error: \$DPR_GOT not supported in this context +[^:]*:45: Error: \$DPR_HWORD not supported in this context +[^:]*:46: Error: \$DPR_WORD not supported in this context +[^:]*:47: Error: \$DSBT_INDEX not supported in this context +[^:]*:48: Error: \$GOT not supported in this context +[^:]*:49: Error: \$DSBT_INDEX not supported in this context +[^:]*:50: Error: \$GOT not supported in this context +[^:]*:51: Error: \$DSBT_INDEX not supported in this context +[^:]*:52: Error: \$GOT not supported in this context +[^:]*:53: Error: \$DSBT_INDEX not supported in this context +[^:]*:54: Error: \$GOT not supported in this context +[^:]*:55: Error: \$DPR_GOT not supported in this context +[^:]*:56: Error: \$DPR_BYTE not supported in this context +[^:]*:57: Error: \$DPR_HWORD not supported in this context +[^:]*:58: Error: \$DPR_WORD not supported in this context +[^:]*:59: Error: \$PCR_OFFSET not supported in this context [^:]*:60: Error: \$DSBT_INDEX not supported in this context [^:]*:61: Error: \$GOT not supported in this context [^:]*:62: Error: \$DPR_GOT not supported in this context [^:]*:63: Error: \$DPR_BYTE not supported in this context [^:]*:64: Error: \$DPR_HWORD not supported in this context [^:]*:65: Error: \$DPR_WORD not supported in this context -[^:]*:66: Error: \$DSBT_INDEX not supported in this context -[^:]*:67: Error: \$GOT not supported in this context -[^:]*:68: Error: \$DPR_GOT not supported in this context -[^:]*:69: Error: \$DPR_BYTE not supported in this context -[^:]*:70: Error: \$DPR_HWORD not supported in this context -[^:]*:71: Error: \$DPR_WORD not supported in this context -[^:]*:72: Error: \$DSBT_INDEX not supported in this context -[^:]*:73: Error: \$GOT not supported in this context -[^:]*:74: Error: \$DPR_GOT not supported in this context -[^:]*:75: Error: \$DPR_BYTE not supported in this context -[^:]*:76: Error: \$DPR_HWORD not supported in this context -[^:]*:77: Error: \$DPR_WORD not supported in this context -[^:]*:78: Error: \$DSBT_INDEX not supported in this context -[^:]*:79: Error: \$GOT not supported in this context -[^:]*:80: Error: \$DPR_GOT not supported in this context -[^:]*:81: Error: \$DPR_BYTE not supported in this context -[^:]*:82: Error: \$DPR_HWORD not supported in this context -[^:]*:83: Error: \$DPR_WORD not supported in this context -[^:]*:84: Error: \$DSBT_INDEX not supported in this context -[^:]*:85: Error: \$GOT not supported in this context -[^:]*:86: Error: \$DPR_GOT not supported in this context -[^:]*:87: Error: \$DPR_BYTE not supported in this context -[^:]*:88: Error: \$DPR_HWORD not supported in this context -[^:]*:89: Error: \$DPR_WORD not supported in this context -[^:]*:90: Error: \$DSBT_INDEX not supported in this context -[^:]*:91: Error: \$GOT not supported in this context -[^:]*:92: Error: \$DPR_GOT not supported in this context -[^:]*:93: Error: \$DPR_BYTE not supported in this context -[^:]*:94: Error: \$DPR_HWORD not supported in this context -[^:]*:95: Error: \$DPR_WORD not supported in this context -[^:]*:96: Error: \$DSBT_INDEX not supported in this context -[^:]*:97: Error: \$GOT not supported in this context -[^:]*:98: Error: \$DPR_GOT not supported in this context -[^:]*:99: Error: \$DPR_BYTE not supported in this context -[^:]*:100: Error: \$DPR_HWORD not supported in this context -[^:]*:101: Error: \$DPR_WORD not supported in this context +[^:]*:66: Error: \$PCR_OFFSET not supported in this context +[^:]*:67: Error: \$DSBT_INDEX not supported in this context +[^:]*:68: Error: \$GOT not supported in this context +[^:]*:69: Error: \$DPR_GOT not supported in this context +[^:]*:70: Error: \$DPR_BYTE not supported in this context +[^:]*:71: Error: \$DPR_HWORD not supported in this context +[^:]*:72: Error: \$DPR_WORD not supported in this context +[^:]*:73: Error: \$PCR_OFFSET not supported in this context +[^:]*:74: Error: \$DSBT_INDEX not supported in this context +[^:]*:75: Error: \$GOT not supported in this context +[^:]*:76: Error: \$DPR_GOT not supported in this context +[^:]*:77: Error: \$DPR_BYTE not supported in this context +[^:]*:78: Error: \$DPR_HWORD not supported in this context +[^:]*:79: Error: \$DPR_WORD not supported in this context +[^:]*:80: Error: \$PCR_OFFSET not supported in this context +[^:]*:81: Error: \$DSBT_INDEX not supported in this context +[^:]*:82: Error: \$GOT not supported in this context +[^:]*:83: Error: \$DPR_GOT not supported in this context +[^:]*:84: Error: \$DPR_BYTE not supported in this context +[^:]*:85: Error: \$DPR_HWORD not supported in this context +[^:]*:86: Error: \$DPR_WORD not supported in this context +[^:]*:87: Error: \$PCR_OFFSET not supported in this context +[^:]*:88: Error: \$DSBT_INDEX not supported in this context +[^:]*:89: Error: \$GOT not supported in this context +[^:]*:90: Error: \$DPR_GOT not supported in this context +[^:]*:91: Error: \$DPR_BYTE not supported in this context +[^:]*:92: Error: \$DPR_HWORD not supported in this context +[^:]*:93: Error: \$DPR_WORD not supported in this context +[^:]*:94: Error: \$PCR_OFFSET not supported in this context +[^:]*:95: Error: \$DSBT_INDEX not supported in this context +[^:]*:96: Error: \$GOT not supported in this context +[^:]*:97: Error: \$DPR_GOT not supported in this context +[^:]*:98: Error: \$DPR_BYTE not supported in this context +[^:]*:99: Error: \$DPR_HWORD not supported in this context +[^:]*:100: Error: \$DPR_WORD not supported in this context +[^:]*:101: Error: \$PCR_OFFSET not supported in this context [^:]*:102: Error: \$DSBT_INDEX not supported in this context [^:]*:103: Error: \$GOT not supported in this context [^:]*:104: Error: \$DPR_GOT not supported in this context [^:]*:105: Error: \$DPR_BYTE not supported in this context [^:]*:106: Error: \$DPR_HWORD not supported in this context [^:]*:107: Error: \$DPR_WORD not supported in this context -[^:]*:108: Error: \$DSBT_INDEX not supported in this context -[^:]*:109: Error: \$GOT not supported in this context -[^:]*:110: Error: \$DPR_GOT not supported in this context -[^:]*:111: Error: \$DPR_BYTE not supported in this context -[^:]*:112: Error: \$DPR_HWORD not supported in this context -[^:]*:113: Error: \$DPR_WORD not supported in this context -[^:]*:114: Error: \$DSBT_INDEX not supported in this context -[^:]*:115: Error: \$GOT not supported in this context -[^:]*:116: Error: \$DPR_GOT not supported in this context -[^:]*:117: Error: \$DPR_BYTE not supported in this context -[^:]*:118: Error: \$DPR_HWORD not supported in this context -[^:]*:119: Error: \$DPR_WORD not supported in this context -[^:]*:120: Error: \$DSBT_INDEX not supported in this context -[^:]*:121: Error: \$GOT not supported in this context -[^:]*:122: Error: \$DPR_GOT not supported in this context -[^:]*:123: Error: \$DPR_BYTE not supported in this context -[^:]*:124: Error: \$DPR_HWORD not supported in this context -[^:]*:125: Error: \$DPR_WORD not supported in this context -[^:]*:126: Error: \$DSBT_INDEX not supported in this context -[^:]*:127: Error: \$GOT not supported in this context -[^:]*:128: Error: \$DPR_GOT not supported in this context -[^:]*:129: Error: \$DPR_BYTE not supported in this context -[^:]*:130: Error: \$DPR_HWORD not supported in this context -[^:]*:131: Error: \$DPR_WORD not supported in this context -[^:]*:132: Error: \$DSBT_INDEX not supported in this context -[^:]*:133: Error: \$GOT not supported in this context -[^:]*:134: Error: \$DPR_GOT not supported in this context -[^:]*:135: Error: \$DPR_BYTE not supported in this context -[^:]*:136: Error: \$DPR_HWORD not supported in this context -[^:]*:137: Error: \$DPR_WORD not supported in this context -[^:]*:138: Error: \$DPR_GOT not supported in this context -[^:]*:139: Error: \$DPR_BYTE not supported in this context -[^:]*:140: Error: \$DPR_HWORD not supported in this context -[^:]*:141: Error: \$DPR_WORD not supported in this context -[^:]*:142: Error: \$DSBT_INDEX not supported in this context -[^:]*:143: Error: \$GOT not supported in this context -[^:]*:144: Error: \$DPR_GOT not supported in this context -[^:]*:145: Error: \$DPR_BYTE not supported in this context -[^:]*:146: Error: \$DPR_HWORD not supported in this context -[^:]*:147: Error: \$DPR_WORD not supported in this context -[^:]*:148: Error: \$DSBT_INDEX not supported in this context -[^:]*:149: Error: \$GOT not supported in this context -[^:]*:150: Error: \$DPR_GOT not supported in this context -[^:]*:151: Error: \$DPR_BYTE not supported in this context -[^:]*:152: Error: \$DPR_HWORD not supported in this context -[^:]*:153: Error: \$DPR_WORD not supported in this context -[^:]*:154: Error: \$DPR_GOT not supported in this context -[^:]*:155: Error: \$DPR_BYTE not supported in this context -[^:]*:156: Error: \$DPR_HWORD not supported in this context -[^:]*:157: Error: \$DPR_WORD not supported in this context +[^:]*:108: Error: \$PCR_OFFSET not supported in this context +[^:]*:109: Error: \$DSBT_INDEX not supported in this context +[^:]*:110: Error: \$GOT not supported in this context +[^:]*:111: Error: \$DPR_GOT not supported in this context +[^:]*:112: Error: \$DPR_BYTE not supported in this context +[^:]*:113: Error: \$DPR_HWORD not supported in this context +[^:]*:114: Error: \$DPR_WORD not supported in this context +[^:]*:115: Error: \$PCR_OFFSET not supported in this context +[^:]*:116: Error: \$DSBT_INDEX not supported in this context +[^:]*:117: Error: \$GOT not supported in this context +[^:]*:118: Error: \$DPR_GOT not supported in this context +[^:]*:119: Error: \$DPR_BYTE not supported in this context +[^:]*:120: Error: \$DPR_HWORD not supported in this context +[^:]*:121: Error: \$DPR_WORD not supported in this context +[^:]*:122: Error: \$PCR_OFFSET not supported in this context +[^:]*:123: Error: \$DSBT_INDEX not supported in this context +[^:]*:124: Error: \$GOT not supported in this context +[^:]*:125: Error: \$DPR_GOT not supported in this context +[^:]*:126: Error: \$DPR_BYTE not supported in this context +[^:]*:127: Error: \$DPR_HWORD not supported in this context +[^:]*:128: Error: \$DPR_WORD not supported in this context +[^:]*:129: Error: \$PCR_OFFSET not supported in this context +[^:]*:130: Error: \$DSBT_INDEX not supported in this context +[^:]*:131: Error: \$GOT not supported in this context +[^:]*:132: Error: \$DPR_GOT not supported in this context +[^:]*:133: Error: \$DPR_BYTE not supported in this context +[^:]*:134: Error: \$DPR_HWORD not supported in this context +[^:]*:135: Error: \$DPR_WORD not supported in this context +[^:]*:136: Error: \$PCR_OFFSET not supported in this context +[^:]*:137: Error: \$DSBT_INDEX not supported in this context +[^:]*:138: Error: \$GOT not supported in this context +[^:]*:139: Error: \$DPR_GOT not supported in this context +[^:]*:140: Error: \$DPR_BYTE not supported in this context +[^:]*:141: Error: \$DPR_HWORD not supported in this context +[^:]*:142: Error: \$DPR_WORD not supported in this context +[^:]*:143: Error: \$PCR_OFFSET not supported in this context +[^:]*:144: Error: \$DSBT_INDEX not supported in this context +[^:]*:145: Error: \$GOT not supported in this context +[^:]*:146: Error: \$DPR_GOT not supported in this context +[^:]*:147: Error: \$DPR_BYTE not supported in this context +[^:]*:148: Error: \$DPR_HWORD not supported in this context +[^:]*:149: Error: \$DPR_WORD not supported in this context +[^:]*:150: Error: \$PCR_OFFSET not supported in this context +[^:]*:151: Error: \$DSBT_INDEX not supported in this context +[^:]*:152: Error: \$GOT not supported in this context +[^:]*:153: Error: \$DPR_GOT not supported in this context +[^:]*:154: Error: \$DPR_BYTE not supported in this context +[^:]*:155: Error: \$DPR_HWORD not supported in this context +[^:]*:156: Error: \$DPR_WORD not supported in this context +[^:]*:157: Error: \$PCR_OFFSET not supported in this context +[^:]*:158: Error: \$DPR_GOT not supported in this context +[^:]*:159: Error: \$DPR_BYTE not supported in this context +[^:]*:160: Error: \$DPR_HWORD not supported in this context +[^:]*:161: Error: \$DPR_WORD not supported in this context +[^:]*:162: Error: \$PCR_OFFSET not supported in this context +[^:]*:163: Error: \$DSBT_INDEX not supported in this context +[^:]*:164: Error: \$GOT not supported in this context +[^:]*:165: Error: \$DPR_GOT not supported in this context +[^:]*:166: Error: \$DPR_BYTE not supported in this context +[^:]*:167: Error: \$DPR_HWORD not supported in this context +[^:]*:168: Error: \$DPR_WORD not supported in this context +[^:]*:169: Error: \$PCR_OFFSET not supported in this context +[^:]*:170: Error: \$DSBT_INDEX not supported in this context +[^:]*:171: Error: \$GOT not supported in this context +[^:]*:172: Error: \$DPR_GOT not supported in this context +[^:]*:173: Error: \$DPR_BYTE not supported in this context +[^:]*:174: Error: \$DPR_HWORD not supported in this context +[^:]*:175: Error: \$DPR_WORD not supported in this context +[^:]*:176: Error: \$PCR_OFFSET not supported in this context +[^:]*:177: Error: \$DPR_GOT not supported in this context +[^:]*:178: Error: \$DPR_BYTE not supported in this context +[^:]*:179: Error: \$DPR_HWORD not supported in this context +[^:]*:180: Error: \$DPR_WORD not supported in this context +[^:]*:181: Error: \$PCR_OFFSET not supported in this context diff --git a/gas/testsuite/gas/tic6x/reloc-bad-2.s b/gas/testsuite/gas/tic6x/reloc-bad-2.s index c0b4eb3..5a1774d 100644 --- a/gas/testsuite/gas/tic6x/reloc-bad-2.s +++ b/gas/testsuite/gas/tic6x/reloc-bad-2.s @@ -9,6 +9,7 @@ d: .word $dpr_byte(b) .word $dpr_hword(a) .word $dpr_word(b) + .word $pcr_offset(b,f) .text .nocmp .globl f @@ -19,21 +20,25 @@ f: addab .D1X b14,$DPR_BYTE(b),a5 addab .D1X b14,$DPR_HWORD(b),a5 addab .D1X b14,$DPR_WORD(b),a5 + addab .D1X b14,$PCR_OFFSET(b,f),a5 addah .D1X b14,$dsbt_index(__c6xabi_DSBT_BASE),a5 addah .D1X b14,$GOT(b),a5 addah .D1X b14,$DPR_GOT(b),a5 addah .D1X b14,$DPR_BYTE(b),a5 addah .D1X b14,$DPR_HWORD(b),a5 addah .D1X b14,$DPR_WORD(b),a5 + addah .D1X b14,$PCR_OFFSET(b,f),a5 addaw .D1X b14,$DPR_GOT(b),a5 addaw .D1X b14,$DPR_BYTE(b),a5 addaw .D1X b14,$DPR_HWORD(b),a5 addaw .D1X b14,$DPR_WORD(b),a5 + addaw .D1X b14,$PCR_OFFSET(b,f),a5 addk .S1 $dsbt_index(__c6xabi_DSBT_BASE),a7 addk .S1 $got(b),a7 addk .S1 $dpr_got(b),a7 addk .S1 $dpr_hword(b),a7 addk .S1 $dpr_word(b),a7 + addk .S1 $pcr_offset(b,f),a7 mvk .S1 $dsbt_index(__c6xabi_DSBT_BASE),a7 mvk .S1 $got(b),a7 mvk .S1 $dpr_got(b),a7 @@ -51,107 +56,126 @@ f: addkpc .S2 $DPR_BYTE(b),b3,0 addkpc .S2 $DPR_HWORD(b),b3,0 addkpc .S2 $DPR_WORD(b),b3,0 + addkpc .S2 $PCR_OFFSET(b,f),b3,0 b .S1 $dsbt_index(__c6xabi_DSBT_BASE) b .S1 $GOT(b) b .S1 $DPR_GOT(b) b .S1 $DPR_BYTE(b) b .S1 $DPR_HWORD(b) b .S1 $DPR_WORD(b) + b .S1 $PCR_OFFSET(b,f) call .S1 $dsbt_index(__c6xabi_DSBT_BASE) call .S1 $GOT(b) call .S1 $DPR_GOT(b) call .S1 $DPR_BYTE(b) call .S1 $DPR_HWORD(b) call .S1 $DPR_WORD(b) + call .S1 $PCR_OFFSET(b,f) bdec .S1 $dsbt_index(__c6xabi_DSBT_BASE),a1 bdec .S1 $GOT(b),a1 bdec .S1 $DPR_GOT(b),a1 bdec .S1 $DPR_BYTE(b),a1 bdec .S1 $DPR_HWORD(b),a1 bdec .S1 $DPR_WORD(b),a1 + bdec .S1 $PCR_OFFSET(b,f),a1 bpos .S2 $dsbt_index(__c6xabi_DSBT_BASE),b1 bpos .S2 $GOT(b),b1 bpos .S2 $DPR_GOT(b),b1 bpos .S2 $DPR_BYTE(b),b1 bpos .S2 $DPR_HWORD(b),b1 bpos .S2 $DPR_WORD(b),b1 + bpos .S2 $PCR_OFFSET(b,f),b1 bnop .S1 $dsbt_index(__c6xabi_DSBT_BASE),1 bnop .S1 $GOT(b),1 bnop .S1 $DPR_GOT(b),1 bnop .S1 $DPR_BYTE(b),1 bnop .S1 $DPR_HWORD(b),1 bnop .S1 $DPR_WORD(b),1 + bnop .S1 $PCR_OFFSET(b,f),1 callnop $dsbt_index(__c6xabi_DSBT_BASE),1 callnop $GOT(b),1 callnop $DPR_GOT(b),1 callnop $DPR_BYTE(b),1 callnop $DPR_HWORD(b),1 callnop $DPR_WORD(b),1 + callnop $PCR_OFFSET(b,f),1 callp .S1 $dsbt_index(__c6xabi_DSBT_BASE),a3 callp .S1 $GOT(b),a3 callp .S1 $DPR_GOT(b),a3 callp .S1 $DPR_BYTE(b),a3 callp .S1 $DPR_HWORD(b),a3 callp .S1 $DPR_WORD(b),a3 + callp .S1 $PCR_OFFSET(b,f),a3 callret .S1 $dsbt_index(__c6xabi_DSBT_BASE) callret .S1 $GOT(b) callret .S1 $DPR_GOT(b) callret .S1 $DPR_BYTE(b) callret .S1 $DPR_HWORD(b) callret .S1 $DPR_WORD(b) + callret .S1 $PCR_OFFSET(b,f) ret .S1 $dsbt_index(__c6xabi_DSBT_BASE) ret .S1 $GOT(b) ret .S1 $DPR_GOT(b) ret .S1 $DPR_BYTE(b) ret .S1 $DPR_HWORD(b) ret .S1 $DPR_WORD(b) + ret .S1 $PCR_OFFSET(b,f) retp .S1 $dsbt_index(__c6xabi_DSBT_BASE),a3 retp .S1 $GOT(b),a3 retp .S1 $DPR_GOT(b),a3 retp .S1 $DPR_BYTE(b),a3 retp .S1 $DPR_HWORD(b),a3 retp .S1 $DPR_WORD(b),a3 + retp .S1 $PCR_OFFSET(b,f),a3 ldb .D2T2 *+b14($dsbt_index(__c6xabi_DSBT_BASE)),b1 ldb .D2T2 *+b14($GOT(b)),b1 ldb .D2T2 *+b14($DPR_GOT(b)),b1 ldb .D2T2 *+b14($DPR_BYTE(b)),b1 ldb .D2T2 *+b14($DPR_HWORD(b)),b1 ldb .D2T2 *+b14($DPR_WORD(b)),b1 + ldb .D2T2 *+b14($PCR_OFFSET(b,f)),b1 ldbu .D2T2 *+b14($dsbt_index(__c6xabi_DSBT_BASE)),b1 ldbu .D2T2 *+b14($GOT(b)),b1 ldbu .D2T2 *+b14($DPR_GOT(b)),b1 ldbu .D2T2 *+b14($DPR_BYTE(b)),b1 ldbu .D2T2 *+b14($DPR_HWORD(b)),b1 ldbu .D2T2 *+b14($DPR_WORD(b)),b1 + ldbu .D2T2 *+b14($PCR_OFFSET(b,f)),b1 ldh .D2T2 *+b14($dsbt_index(__c6xabi_DSBT_BASE)),b1 ldh .D2T2 *+b14($GOT(b)),b1 ldh .D2T2 *+b14($DPR_GOT(b)),b1 ldh .D2T2 *+b14($DPR_BYTE(b)),b1 ldh .D2T2 *+b14($DPR_HWORD(b)),b1 ldh .D2T2 *+b14($DPR_WORD(b)),b1 + ldh .D2T2 *+b14($PCR_OFFSET(b,f)),b1 ldhu .D2T2 *+b14($dsbt_index(__c6xabi_DSBT_BASE)),b1 ldhu .D2T2 *+b14($GOT(b)),b1 ldhu .D2T2 *+b14($DPR_GOT(b)),b1 ldhu .D2T2 *+b14($DPR_BYTE(b)),b1 ldhu .D2T2 *+b14($DPR_HWORD(b)),b1 ldhu .D2T2 *+b14($DPR_WORD(b)),b1 + ldhu .D2T2 *+b14($PCR_OFFSET(b,f)),b1 ldw .D2T2 *+b14($DPR_GOT(b)),b1 ldw .D2T2 *+b14($DPR_BYTE(b)),b1 ldw .D2T2 *+b14($DPR_HWORD(b)),b1 ldw .D2T2 *+b14($DPR_WORD(b)),b1 + ldw .D2T2 *+b14($PCR_OFFSET(b,f)),b1 stb .D2T2 b1,*+b14($dsbt_index(__c6xabi_DSBT_BASE)) stb .D2T2 b1,*+b14($GOT(b)) stb .D2T2 b1,*+b14($DPR_GOT(b)) stb .D2T2 b1,*+b14($DPR_BYTE(b)) stb .D2T2 b1,*+b14($DPR_HWORD(b)) stb .D2T2 b1,*+b14($DPR_WORD(b)) + stb .D2T2 b1,*+b14($PCR_OFFSET(b,f)) sth .D2T2 b1,*+b14($dsbt_index(__c6xabi_DSBT_BASE)) sth .D2T2 b1,*+b14($GOT(b)) sth .D2T2 b1,*+b14($DPR_GOT(b)) sth .D2T2 b1,*+b14($DPR_BYTE(b)) sth .D2T2 b1,*+b14($DPR_HWORD(b)) sth .D2T2 b1,*+b14($DPR_WORD(b)) + sth .D2T2 b1,*+b14($PCR_OFFSET(b,f)) stw .D2T2 b1,*+b14($DPR_GOT(b)) stw .D2T2 b1,*+b14($DPR_BYTE(b)) stw .D2T2 b1,*+b14($DPR_HWORD(b)) stw .D2T2 b1,*+b14($DPR_WORD(b)) + stw .D2T2 b1,*+b14($PCR_OFFSET(b,f)) diff --git a/gas/testsuite/gas/tic6x/unwind-1.d b/gas/testsuite/gas/tic6x/unwind-1.d new file mode 100644 index 0000000..1b240f9 --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-1.d @@ -0,0 +1,100 @@ +#readelf: -u +#name: C6X unwinding directives 1 (little endian) +#as: -mlittle-endian +#source: unwind-1.s + +Unwind table index '.c6xabi.exidx' .* + +0x0: 0x83020227 + Compact model 3 + Stack increment 8 + Registers restored: A11, B3 + Return register: B3 + +0x100: 0x808003e7 + Compact model 0 + 0x80 0x03 pop {A10, A11} + 0xe7 RETURN + +0x200: 0x81008863 + Compact model 1 + 0x88 0x63 pop {A10, A11, B3, B10, B15} + +0x300: 0x83020227 + Compact model 3 + Stack increment 8 + Registers restored: A11, B3 + Return register: B3 + +0x400: 0x84000227 + Compact model 4 + Stack increment 0 + Registers restored: \(compact\) A11, B3 + Return register: B3 + +0x500: 0x80a022e7 + Compact model 0 + 0xa0 0x22 pop compact {A11, B3} + 0xe7 RETURN + +0x600: 0x84000227 + Compact model 4 + Stack increment 0 + Registers restored: \(compact\) A11, B3 + Return register: B3 + +0x700: 0x84000637 + Compact model 4 + Stack increment 0 + Registers restored: \(compact\) A10, A11, B3, B10 + Return register: B3 + +0x800: 0x840002d7 + Compact model 4 + Stack increment 0 + Registers restored: \(compact\) A10, A12, A13, B3 + Return register: B3 + +0x900: 0x84000c07 + Compact model 4 + Stack increment 0 + Registers restored: \(compact\) B10, B11 + Return register: B3 + +0xa00: 0x83ff0027 + Compact model 3 + Restore stack from frame pointer + Registers restored: A11, A15 + Return register: B3 + +0xb00: 0x84ff0027 + Compact model 4 + Restore stack from frame pointer + Registers restored: \(compact\) A11, A15 + Return register: B3 + +0xc00: 0x8001c1f7 + Compact model 0 + 0x01 sp = sp \+ 16 + 0xc1 0xf7 pop frame {B3, \[pad\]} + +0xd00: @0x.* + Compact model 1 + 0x01 sp = sp \+ 16 + 0xc2 0xf7 0xbf pop frame {\[pad\], A11, B3, \[pad\]} + 0xe7 RETURN + 0xe7 RETURN + +0xe00: @0x.* + Compact model 1 + 0x01 sp = sp \+ 16 + 0xc2 0xf7 0xfb pop frame {A11, \[pad\], B3, \[pad\]} + 0xe7 RETURN + 0xe7 RETURN + +0xf00: @0x.* + Compact model 1 + 0x02 sp = sp \+ 24 + 0xc2 0x7f 0xff 0xfb pop frame {A11, \[pad\], \[pad\], \[pad\], \[pad\], B3} + 0xe7 RETURN + diff --git a/gas/testsuite/gas/tic6x/unwind-1.s b/gas/testsuite/gas/tic6x/unwind-1.s new file mode 100644 index 0000000..3fbc888 --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-1.s @@ -0,0 +1,242 @@ +.cfi_sections .c6xabi.exidx + +# standard layout +.p2align 8 +f0: +.cfi_startproc +stw .d2t2 B3, *B15--(16) +.cfi_def_cfa_offset 16 +.cfi_offset 19, 0 +stw .d2t1 A11, *+B15(12) +.cfi_offset 11, -4 +nop 4 +.cfi_endproc +.endp + +# standard layout (pr0) +.p2align 8 +f1: +.cfi_startproc +.cfi_def_cfa_offset 8 +stw .d2t1 A11, *+B15(8) +.cfi_offset 11, -0 +stw .d2t1 A10, *+B15(4) +.cfi_offset 10, -4 +nop 4 +.cfi_endproc +.personalityindex 0 +.endp + +# standard layout (pr1) +.p2align 8 +f2: +.cfi_startproc +stw .d2t2 B15, *B15--(24) +.cfi_def_cfa_offset 24 +.cfi_offset 31, 0 +stw .d2t2 B10, *+B15(20) +.cfi_offset 26, -4 +stw .d2t2 B3, *+B15(16) +.cfi_offset 19, -8 +stdw .d2t1 A11:A10, *+B15(8) +.cfi_offset 11, -12 +.cfi_offset 10, -16 +nop 4 +.cfi_endproc +.personalityindex 1 +.endp + +# standard layout (pr3) +.p2align 8 +f3: +.cfi_startproc +stw .d2t2 B3, *B15--(16) +.cfi_def_cfa_offset 16 +.cfi_offset 19, 0 +stw .d2t1 A11, *+B15(12) +.cfi_offset 11, -4 +nop 4 +.cfi_endproc +.personalityindex 3 +.endp + +# compact layout +.p2align 8 +f4: +.cfi_startproc +stw .d2t2 B3, *B15--(8) +.cfi_offset 19, 0 +.cfi_def_cfa_offset 8 +stw .d2t1 A11, *B15--(8) +.cfi_offset 11, -8 +.cfi_def_cfa_offset 16 +nop 4 +.cfi_endproc +.endp + +# compact layout (pr0) +.p2align 8 +f5: +.cfi_startproc +stw .d2t2 B3, *B15--(8) +.cfi_offset 19, 0 +.cfi_def_cfa_offset 8 +stw .d2t1 A11, *B15--(8) +.cfi_offset 11, -8 +.cfi_def_cfa_offset 16 +nop 4 +.cfi_endproc +.personalityindex 0 +.endp + +# compact layout (pr4) +.p2align 8 +f6: +.cfi_startproc +stw .d2t2 B3, *B15--(8) +.cfi_offset 19, 0 +.cfi_def_cfa_offset 8 +stw .d2t1 A11, *B15--(8) +.cfi_offset 11, -8 +.cfi_def_cfa_offset 16 +nop 4 +.cfi_endproc +.personalityindex 4 +.endp + +# compact layout (aligned pair) +.p2align 8 +f7: +.cfi_startproc +stw .d2t2 B10, *B15--(8) +.cfi_offset 26, 0 +.cfi_def_cfa_offset 8 +stw .d2t2 B3, *B15--(8) +.cfi_offset 19, -8 +.cfi_def_cfa_offset 8 +stdw .d2t1 A11:A10, *B15--(8) +.cfi_offset 11, -12 +.cfi_offset 10, -16 +.cfi_def_cfa_offset 24 +nop 4 +.cfi_endproc +.endp + +# compact layout (aligned pair + 1) +.p2align 8 +f8: +.cfi_startproc +stw .d2t2 B3, *B15--(8) +.cfi_offset 19, 0 +.cfi_def_cfa_offset 8 +stdw .d2t1 A13:A12, *B15--(8) +.cfi_offset 13, -4 +.cfi_offset 12, -8 +.cfi_def_cfa_offset 16 +stw .d2t1 A10, *B15--(8) +.cfi_offset 10, -16 +.cfi_def_cfa_offset 24 +nop 4 +.cfi_endproc +.endp + +# compact layout (misaligned pair) +.p2align 8 +f9: +.cfi_startproc +stw .d2t2 B11, *B15--(8) +.cfi_offset 27, 0 +.cfi_def_cfa_offset 8 +stw .d2t2 B10, *B15--(8) +.cfi_offset 26, -8 +.cfi_def_cfa_offset 16 +nop 4 +.cfi_endproc +.endp + +# standard frame pointer +.p2align 8 +fa: +.cfi_startproc +stw .d2t1 A15, *B15--(16) +.cfi_def_cfa_offset 8 +.cfi_offset 15, 0 +mv .s1x B15, A15 +addk .s1 16, A15 +.cfi_def_cfa 15, 0 +stw .d2t1 A11, *+B15(12) +.cfi_offset 11, -4 +nop 4 +.cfi_endproc +.endp + +# compact frame pointer +.p2align 8 +fb: +.cfi_startproc +stw .d2t1 A15, *B15--(8) +.cfi_def_cfa_offset 8 +.cfi_offset 15, 0 +mv .s1x B15, A15 +addk .s1 16, A15 +.cfi_def_cfa 15, 0 +stw .d2t1 A11, *B15--(8) +.cfi_offset 11, -8 +nop 4 +.cfi_endproc +.endp + +# custom layout +.p2align 8 +fc: +.cfi_startproc +sub .s2 B15, 16, B15 +stw .d2t2 B3, *+B15(12) +.cfi_def_cfa_offset 16 +.cfi_offset 19, -4 +nop 4 +.cfi_endproc +.endp + +# custom layout +.p2align 8 +fd: +.cfi_startproc +sub .s2 B15, 16, B15 +stw .d2t2 B3, *+B15(12) +.cfi_def_cfa_offset 16 +.cfi_offset 19, -4 +stw .d2t1 A11, *+B15(8) +.cfi_offset 11, -8 +nop 4 +.cfi_endproc +.endp + +# custom layout +.p2align 8 +fe: +.cfi_startproc +sub .s2 B15, 16, B15 +stw .d2t2 B3, *+B15(12) +.cfi_def_cfa_offset 16 +.cfi_offset 19, -4 +stw .d2t1 A11, *+B15(4) +.cfi_offset 11, -12 +nop 4 +.cfi_endproc +.endp + +# custom layout +.p2align 8 +ff: +.cfi_startproc +addk .s2 -24, B15 +stw .d2t2 B3, *+B15(24) +.cfi_def_cfa_offset 24 +.cfi_offset 19, 0 +stw .d2t1 A11, *+B15(4) +.cfi_offset 11, -20 +nop 4 +.cfi_endproc +.endp + diff --git a/gas/testsuite/gas/tic6x/unwind-2.d b/gas/testsuite/gas/tic6x/unwind-2.d new file mode 100644 index 0000000..c022ec4 --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-2.d @@ -0,0 +1,100 @@ +#readelf: -u +#name: C6X unwinding directives 2 (big endian) +#as: -mbig-endian +#source: unwind-2.s + +Unwind table index '.c6xabi.exidx' .* + +0x0: 0x83020227 + Compact model 3 + Stack increment 8 + Registers restored: A11, B3 + Return register: B3 + +0x100: 0x808003e7 + Compact model 0 + 0x80 0x03 pop {A10, A11} + 0xe7 RETURN + +0x200: 0x81008863 + Compact model 1 + 0x88 0x63 pop {A10, A11, B3, B10, B15} + +0x300: 0x83020227 + Compact model 3 + Stack increment 8 + Registers restored: A11, B3 + Return register: B3 + +0x400: 0x84000227 + Compact model 4 + Stack increment 0 + Registers restored: \(compact\) A11, B3 + Return register: B3 + +0x500: 0x80a022e7 + Compact model 0 + 0xa0 0x22 pop compact {A11, B3} + 0xe7 RETURN + +0x600: 0x84000227 + Compact model 4 + Stack increment 0 + Registers restored: \(compact\) A11, B3 + Return register: B3 + +0x700: 0x84000637 + Compact model 4 + Stack increment 0 + Registers restored: \(compact\) A10, A11, B3, B10 + Return register: B3 + +0x800: 0x840002d7 + Compact model 4 + Stack increment 0 + Registers restored: \(compact\) A10, A12, A13, B3 + Return register: B3 + +0x900: 0x84000c07 + Compact model 4 + Stack increment 0 + Registers restored: \(compact\) B10, B11 + Return register: B3 + +0xa00: 0x83ff0027 + Compact model 3 + Restore stack from frame pointer + Registers restored: A11, A15 + Return register: B3 + +0xb00: 0x84ff0027 + Compact model 4 + Restore stack from frame pointer + Registers restored: \(compact\) A11, A15 + Return register: B3 + +0xc00: 0x8001c1f7 + Compact model 0 + 0x01 sp = sp \+ 16 + 0xc1 0xf7 pop frame {B3, \[pad\]} + +0xd00: @0x.* + Compact model 1 + 0x01 sp = sp \+ 16 + 0xc2 0xf7 0xbf pop frame {\[pad\], A11, B3, \[pad\]} + 0xe7 RETURN + 0xe7 RETURN + +0xe00: @0x.* + Compact model 1 + 0x01 sp = sp \+ 16 + 0xc2 0xf7 0xfb pop frame {A11, \[pad\], B3, \[pad\]} + 0xe7 RETURN + 0xe7 RETURN + +0xf00: @0x.* + Compact model 1 + 0x02 sp = sp \+ 24 + 0xc2 0x7f 0xff 0xfb pop frame {A11, \[pad\], \[pad\], \[pad\], \[pad\], B3} + 0xe7 RETURN + diff --git a/gas/testsuite/gas/tic6x/unwind-2.s b/gas/testsuite/gas/tic6x/unwind-2.s new file mode 100644 index 0000000..1ab4d67 --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-2.s @@ -0,0 +1,242 @@ +.cfi_sections .c6xabi.exidx + +# standard layout +.p2align 8 +f0: +.cfi_startproc +stw .d2t2 B3, *B15--(16) +.cfi_def_cfa_offset 16 +.cfi_offset 19, 0 +stw .d2t1 A11, *+B15(12) +.cfi_offset 11, -4 +nop 4 +.cfi_endproc +.endp + +# standard layout (pr0) +.p2align 8 +f1: +.cfi_startproc +.cfi_def_cfa_offset 8 +stw .d2t1 A11, *+B15(8) +.cfi_offset 11, -0 +stw .d2t1 A10, *+B15(4) +.cfi_offset 10, -4 +nop 4 +.cfi_endproc +.personalityindex 0 +.endp + +# standard layout (pr1) +.p2align 8 +f2: +.cfi_startproc +stw .d2t2 B15, *B15--(24) +.cfi_def_cfa_offset 24 +.cfi_offset 31, 0 +stw .d2t2 B10, *+B15(20) +.cfi_offset 26, -4 +stw .d2t2 B3, *+B15(16) +.cfi_offset 19, -8 +stdw .d2t1 A11:A10, *+B15(8) +.cfi_offset 11, -16 +.cfi_offset 10, -12 +nop 4 +.cfi_endproc +.personalityindex 1 +.endp + +# standard layout (pr3) +.p2align 8 +f3: +.cfi_startproc +stw .d2t2 B3, *B15--(16) +.cfi_def_cfa_offset 16 +.cfi_offset 19, 0 +stw .d2t1 A11, *+B15(12) +.cfi_offset 11, -4 +nop 4 +.cfi_endproc +.personalityindex 3 +.endp + +# compact layout +.p2align 8 +f4: +.cfi_startproc +stw .d2t2 B3, *B15--(8) +.cfi_offset 19, 0 +.cfi_def_cfa_offset 8 +stw .d2t1 A11, *B15--(8) +.cfi_offset 11, -8 +.cfi_def_cfa_offset 16 +nop 4 +.cfi_endproc +.endp + +# compact layout (pr0) +.p2align 8 +f5: +.cfi_startproc +stw .d2t2 B3, *B15--(8) +.cfi_offset 19, 0 +.cfi_def_cfa_offset 8 +stw .d2t1 A11, *B15--(8) +.cfi_offset 11, -8 +.cfi_def_cfa_offset 16 +nop 4 +.cfi_endproc +.personalityindex 0 +.endp + +# compact layout (pr4) +.p2align 8 +f6: +.cfi_startproc +stw .d2t2 B3, *B15--(8) +.cfi_offset 19, 0 +.cfi_def_cfa_offset 8 +stw .d2t1 A11, *B15--(8) +.cfi_offset 11, -8 +.cfi_def_cfa_offset 16 +nop 4 +.cfi_endproc +.personalityindex 4 +.endp + +# compact layout (aligned pair) +.p2align 8 +f7: +.cfi_startproc +stw .d2t2 B10, *B15--(8) +.cfi_offset 26, 0 +.cfi_def_cfa_offset 8 +stw .d2t2 B3, *B15--(8) +.cfi_offset 19, -8 +.cfi_def_cfa_offset 8 +stdw .d2t1 A11:A10, *B15--(8) +.cfi_offset 11, -16 +.cfi_offset 10, -12 +.cfi_def_cfa_offset 24 +nop 4 +.cfi_endproc +.endp + +# compact layout (aligned pair + 1) +.p2align 8 +f8: +.cfi_startproc +stw .d2t2 B3, *B15--(8) +.cfi_offset 19, 0 +.cfi_def_cfa_offset 8 +stdw .d2t1 A13:A12, *B15--(8) +.cfi_offset 13, -8 +.cfi_offset 12, -4 +.cfi_def_cfa_offset 16 +stw .d2t1 A10, *B15--(8) +.cfi_offset 10, -16 +.cfi_def_cfa_offset 24 +nop 4 +.cfi_endproc +.endp + +# compact layout (misaligned pair) +.p2align 8 +f9: +.cfi_startproc +stw .d2t2 B11, *B15--(8) +.cfi_offset 27, 0 +.cfi_def_cfa_offset 8 +stw .d2t2 B10, *B15--(8) +.cfi_offset 26, -8 +.cfi_def_cfa_offset 16 +nop 4 +.cfi_endproc +.endp + +# standard frame pointer +.p2align 8 +fa: +.cfi_startproc +stw .d2t1 A15, *B15--(16) +.cfi_def_cfa_offset 8 +.cfi_offset 15, 0 +mv .s1x B15, A15 +addk .s1 16, A15 +.cfi_def_cfa 15, 0 +stw .d2t1 A11, *+B15(12) +.cfi_offset 11, -4 +nop 4 +.cfi_endproc +.endp + +# compact frame pointer +.p2align 8 +fb: +.cfi_startproc +stw .d2t1 A15, *B15--(8) +.cfi_def_cfa_offset 8 +.cfi_offset 15, 0 +mv .s1x B15, A15 +addk .s1 16, A15 +.cfi_def_cfa 15, 0 +stw .d2t1 A11, *B15--(8) +.cfi_offset 11, -8 +nop 4 +.cfi_endproc +.endp + +# custom layout +.p2align 8 +fc: +.cfi_startproc +sub .s2 B15, 16, B15 +stw .d2t2 B3, *+B15(12) +.cfi_def_cfa_offset 16 +.cfi_offset 19, -4 +nop 4 +.cfi_endproc +.endp + +# custom layout +.p2align 8 +fd: +.cfi_startproc +sub .s2 B15, 16, B15 +stw .d2t2 B3, *+B15(12) +.cfi_def_cfa_offset 16 +.cfi_offset 19, -4 +stw .d2t1 A11, *+B15(8) +.cfi_offset 11, -8 +nop 4 +.cfi_endproc +.endp + +# custom layout +.p2align 8 +fe: +.cfi_startproc +sub .s2 B15, 16, B15 +stw .d2t2 B3, *+B15(12) +.cfi_def_cfa_offset 16 +.cfi_offset 19, -4 +stw .d2t1 A11, *+B15(4) +.cfi_offset 11, -12 +nop 4 +.cfi_endproc +.endp + +# custom layout +.p2align 8 +ff: +.cfi_startproc +addk .s2 -24, B15 +stw .d2t2 B3, *+B15(24) +.cfi_def_cfa_offset 24 +.cfi_offset 19, 0 +stw .d2t1 A11, *+B15(4) +.cfi_offset 11, -20 +nop 4 +.cfi_endproc +.endp + diff --git a/gas/testsuite/gas/tic6x/unwind-3.d b/gas/testsuite/gas/tic6x/unwind-3.d new file mode 100644 index 0000000..d03243d --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-3.d @@ -0,0 +1,18 @@ +#readelf: -u +#name: C6X unwinding directives 3 (segment change) +#source: unwind-3.s + +Unwind table index '.c6xabi.exidx.text.bar' .* + +0x0: 0x830e2807 + Compact model 3 + Stack increment 56 + Registers restored: B11, B13 + Return register: B3 + +Unwind table index '.c6xabi.exidx' .* + +0x0: 0x80008021 + Compact model 0 + 0x00 sp = sp \+ 8 + 0x80 0x21 pop {A10, B3} diff --git a/gas/testsuite/gas/tic6x/unwind-3.s b/gas/testsuite/gas/tic6x/unwind-3.s new file mode 100644 index 0000000..0239e23 --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-3.s @@ -0,0 +1,33 @@ +.cfi_sections .c6xabi.exidx + +.text +# standard layout +.p2align 8 +foo: +.cfi_startproc +.personalityindex 0 +stw .d2t2 B3, *B15--(16) +.cfi_def_cfa_offset 16 +.cfi_offset B3, 0 + + +.section .text.bar, "ax" + +bar: +.cfi_startproc +stw .d2t2 B13, *B15--(16) +.cfi_def_cfa_offset 64 +.cfi_offset B13, 0 +stw .d2t2 B13, *+B15(12) +.cfi_offset B11, -4 +nop 4 +.cfi_endproc +.endp + +.text + +stw .d2t1 A10, *+B15(12) +.cfi_offset A10, -4 +nop 4 +.cfi_endproc +.endp diff --git a/gas/testsuite/gas/tic6x/unwind-bad-1.d b/gas/testsuite/gas/tic6x/unwind-bad-1.d new file mode 100644 index 0000000..077062d --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-bad-1.d @@ -0,0 +1,3 @@ +#name: C6X unwinding directive errors +#error-output: unwind-bad-1.l + diff --git a/gas/testsuite/gas/tic6x/unwind-bad-1.l b/gas/testsuite/gas/tic6x/unwind-bad-1.l new file mode 100644 index 0000000..523dac1 --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-bad-1.l @@ -0,0 +1,12 @@ +[^:]*: Assembler messages: +[^:]*:4: Error: unexpected \.handlerdata directive +[^:]*:9: Error: duplicate \.personalityindex directive +[^:]*:11: Error: personality routine specified for cantunwind frame +[^:]*:19: Error: personality routine specified for cantunwind frame +[^:]*:29: Error: duplicate \.personality directive +[^:]*:32: Error: unexpected \.cantunwind directive +[^:]*:34: Error: duplicate \.handlerdata directive +[^:]*:41: Error: personality routine required before \.handlerdata directive +[^:]*:48: Error: bad personality routine number +[^:]*:50: Error: bad personality routine number +[^:]*:59: Error: missing \.endp before \.cfi_startproc diff --git a/gas/testsuite/gas/tic6x/unwind-bad-1.s b/gas/testsuite/gas/tic6x/unwind-bad-1.s new file mode 100644 index 0000000..b68df50 --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-bad-1.s @@ -0,0 +1,62 @@ +.cfi_sections .c6xabi.exidx + +# unexpected .handlerdata directive +.handlerdata + +.cfi_startproc +.personalityindex 0 +# duplicate .personalityindex directive +.personalityindex 1 +# personality routine specified for cantunwind frame +.cantunwind +nop +.cfi_endproc +.endp + +.cfi_startproc +.personality foo +# personality routine specified for cantunwind frame +.cantunwind +nop +.cfi_endproc +.endp + +.cfi_startproc +nop +.cfi_endproc +.personality foo +# duplicate .personality directive +.personality bar +.handlerdata +# unexpected .cantunwind directive +.cantunwind +# duplicate .handlerdata directive +.handlerdata +.endp + +.cfi_startproc +nop +.cfi_endproc +# personality routine required before .handlerdata directive +.handlerdata +.endp + +.cfi_startproc +nop +.cfi_endproc +# bad personality routine number +.personalityindex 16 +# bad personality routine number +.personalityindex -1 +.endp + +.cfi_startproc +nop +.cfi_endproc +.personalityindex 1 +.handlerdata +# missing .endp before .cfi_startproc +.cfi_startproc +.cfi_endproc +.endp + diff --git a/gas/testsuite/gas/tic6x/unwind-bad-2.d b/gas/testsuite/gas/tic6x/unwind-bad-2.d new file mode 100644 index 0000000..5f8899e --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-bad-2.d @@ -0,0 +1,3 @@ +#name: C6X unwinding bad frame layouts +#error-output: unwind-bad-2.l + diff --git a/gas/testsuite/gas/tic6x/unwind-bad-2.l b/gas/testsuite/gas/tic6x/unwind-bad-2.l new file mode 100644 index 0000000..bf171dc --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-bad-2.l @@ -0,0 +1,14 @@ +[^:]*: Assembler messages: +[^:]*:8: Error: stack pointer offset too large for personality routine +[^:]*:20: Error: stack frame layout does not match personality routine +[^:]*:33: Error: stack frame layout does not match personality routine +[^:]*:39: Error: unable to generate unwinding opcode for reg 20 +[^:]*:46: Error: unable to generate unwinding opcode for reg 20 +[^:]*:53: Error: unable to generate unwinding opcode for reg 20 +[^:]*:63: Error: unable to restore return address from previously restored reg +[^:]*:70: Error: unhandled CFA insn for unwinding \(259\) +[^:]*:77: Error: unable to generate unwinding opcode for frame pointer reg 14 +[^:]*:84: Error: unable to generate unwinding opcode for frame pointer offset +[^:]*:91: Error: unwound stack pointer not doubleword aligned +[^:]*:100: Error: stack frame layout too complex for unwinder +[^:]*:110: Error: unwound frame has negative size diff --git a/gas/testsuite/gas/tic6x/unwind-bad-2.s b/gas/testsuite/gas/tic6x/unwind-bad-2.s new file mode 100644 index 0000000..9373bbd --- /dev/null +++ b/gas/testsuite/gas/tic6x/unwind-bad-2.s @@ -0,0 +1,113 @@ +.cfi_sections .c6xabi.exidx + +.cfi_startproc +# stack pointer offset too large for personality routine +.cfi_def_cfa_offset 0x3f8 +.cfi_endproc +.personalityindex 3 +.endp + +.cfi_startproc +.cfi_def_cfa_offset 8 +stw .d2t1 A11, *+B15(8) +.cfi_offset 11, -0 +stw .d2t1 A10, *+B15(4) +.cfi_offset 10, -4 +nop 4 +.cfi_endproc +# stack frame layout does not match personality routine +.personalityindex 4 +.endp + +.cfi_startproc +stw .d2t2 B3, *B15--(8) +.cfi_offset 19, 0 +.cfi_def_cfa_offset 8 +stw .d2t1 A11, *B15--(8) +.cfi_offset 11, -8 +.cfi_def_cfa_offset 16 +nop 4 +.cfi_endproc +# stack frame layout does not match personality routine +.personalityindex 3 +.endp + +.cfi_startproc +stw .d2t2 B4, *B15--(8) +# unable to generate unwinding opcode for reg 20 +.cfi_offset 20, 0 +.cfi_endproc +.endp + +.cfi_startproc +mv .s2 B3, B4 +# unable to generate unwinding opcode for reg 20 +.cfi_register 19, 20 +.cfi_endproc +.endp + +.cfi_startproc +mv .s2 B4, B3 +# unable to generate unwinding opcode for reg 20 +.cfi_register 20, 19 +.cfi_endproc +.endp + +.cfi_startproc +stw .d2t2 B10, *B15--(8) +# unable to generate unwinding opcode for reg 20 +.cfi_offset 26, 0 +mv .s2 B3, B10 +# unable to restore return address from previously restored reg +.cfi_register 19, 26 +.cfi_endproc +.endp + +.cfi_startproc +nop +# unhandled CFA insn for unwinding (259) +.cfi_escape 42 +.cfi_endproc +.endp + +.cfi_startproc +nop +# unable to generate unwinding opcode for frame pointer reg 14 +.cfi_def_cfa_register 14 +.cfi_endproc +.endp + +.cfi_startproc +nop +# unable to generate unwinding opcode for frame pointer offset +.cfi_def_cfa 15, 8 +.cfi_endproc +.endp + +.cfi_startproc +nop +# unwound stack pointer not doubleword aligned +.cfi_def_cfa_offset 12 +.cfi_endproc +.endp + +.cfi_startproc +nop +.cfi_offset 10, 0 +# stack frame layout too complex for unwinder +.cfi_offset 11, -0x808 +.cfi_def_cfa_offset 0x10000 +.cfi_endproc +.endp + +.cfi_startproc +nop +.cfi_offset 12, -0 +.cfi_offset 11, -4 +.cfi_offset 10, -8 +.cfi_def_cfa_offset 8 +# unwound frame has negative size +.cfi_endproc +.endp + + diff --git a/gas/testsuite/gas/tilegx/t_insns.d b/gas/testsuite/gas/tilegx/t_insns.d new file mode 100644 index 0000000..4fe3279 --- /dev/null +++ b/gas/testsuite/gas/tilegx/t_insns.d @@ -0,0 +1,10405 @@ +#as: +#objdump: -dr + +.*: file format .* + + +Disassembly of section .text: + +0000000000000000 : + 0: [0-9a-f]* { nop } + 8: [0-9a-f]* { nop } + 10: [0-9a-f]* { nop } + 18: [0-9a-f]* { nop } + 20: [0-9a-f]* { nop } + 28: [0-9a-f]* { nop } + 30: [0-9a-f]* { nop } + 38: [0-9a-f]* { nop } + 40: [0-9a-f]* { nop } + 48: [0-9a-f]* { nop } + 50: [0-9a-f]* { nop } + 58: [0-9a-f]* { nop } + 60: [0-9a-f]* { nop } + 68: [0-9a-f]* { nop } + 70: [0-9a-f]* { nop } + 78: [0-9a-f]* { nop } + 80: [0-9a-f]* { nop } + 88: [0-9a-f]* { nop } + 90: [0-9a-f]* { nop } + 98: [0-9a-f]* { nop } + a0: [0-9a-f]* { nop } + a8: [0-9a-f]* { nop } + b0: [0-9a-f]* { nop } + b8: [0-9a-f]* { nop } + c0: [0-9a-f]* { nop } + c8: [0-9a-f]* { nop } + d0: [0-9a-f]* { nop } + d8: [0-9a-f]* { nop } + e0: [0-9a-f]* { nop } + e8: [0-9a-f]* { nop } + f0: [0-9a-f]* { nop } + f8: [0-9a-f]* { nop } + 100: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; bnezt r15, 0 } + 108: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; bnez r15, 0 } + 110: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; bnez r15, 0 } + 118: [0-9a-f]* { fdouble_pack1 r5, r6, r7 ; bnez r15, 0 } + 120: [0-9a-f]* { fsingle_pack2 r5, r6, r7 ; bnez r15, 0 } + 128: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; blez r15, 0 } + 130: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; bgtzt r15, 0 } + 138: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; bgtzt r15, 0 } + 140: [0-9a-f]* { addli r5, r6, 4660 ; bgtzt r15, 0 } + 148: [0-9a-f]* { fsingle_pack1 r5, r6 ; beqzt r15, 0 } + 150: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; beqzt r15, 0 } + 158: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; beqzt r15, 0 } + 160: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; beqz r15, 0 } + 168: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; beqz r15, 0 } + 170: [0-9a-f]* { addli r5, r6, 4660 ; beqz r15, 0 } + 178: [0-9a-f]* { dblalign2 r5, r6, r7 ; beqz r15, 0 } + 180: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; blbs r15, 0 } + 188: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; blbs r15, 0 } + 190: [0-9a-f]* { shl1addx r5, r6, r7 ; blbst r15, 0 } + 198: [0-9a-f]* { v1cmpleu r5, r6, r7 ; blbst r15, 0 } + 1a0: [0-9a-f]* { v1ddotpu r5, r6, r7 ; blbst r15, 0 } + 1a8: [0-9a-f]* { v1dotpusa r5, r6, r7 ; blbs r15, 0 } + 1b0: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; blbst r15, 0 } + 1b8: [0-9a-f]* { v4packsc r5, r6, r7 ; blbst r15, 0 } + 1c0: [0-9a-f]* { cmovnez r5, r6, r7 ; blbst r15, 0 } + 1c8: [0-9a-f]* { shl1addx r5, r6, r7 ; bgtz r15, 0 } + 1d0: [0-9a-f]* { v1adduc r5, r6, r7 ; bgtzt r15, 0 } + 1d8: [0-9a-f]* { v1cmpleu r5, r6, r7 ; bgtz r15, 0 } + 1e0: [0-9a-f]* { v1cmpne r5, r6, r7 ; bgtzt r15, 0 } + 1e8: [0-9a-f]* { v1dotpus r5, r6, r7 ; bgtz r15, 0 } + 1f0: [0-9a-f]* { v1sadau r5, r6, r7 ; bgtzt r15, 0 } + 1f8: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; bgtzt r15, 0 } + 200: [0-9a-f]* { v2cmpltu r5, r6, r7 ; bgtz r15, 0 } + 208: [0-9a-f]* { v2int_l r5, r6, r7 ; bgtzt r15, 0 } + 210: [0-9a-f]* { v2packuc r5, r6, r7 ; bgtz r15, 0 } + 218: [0-9a-f]* { v4addsc r5, r6, r7 ; bgtzt r15, 0 } + 220: [0-9a-f]* { v4subsc r5, r6, r7 ; bgtzt r15, 0 } + 228: [0-9a-f]* { cmples r5, r6, r7 ; bgtzt r15, 0 } + 230: [0-9a-f]* { cmpltui r5, r6, 5 ; bgtzt r15, 0 } + 238: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; j 0 } + 240: [0-9a-f]* { subxsc r5, r6, r7 ; bltzt r15, 0 } + 248: [0-9a-f]* { v1cmpne r5, r6, r7 ; bltz r15, 0 } + 250: [0-9a-f]* { v1int_l r5, r6, r7 ; bltz r15, 0 } + 258: [0-9a-f]* { v1multu r5, r6, r7 ; bltz r15, 0 } + 260: [0-9a-f]* { v1shrs r5, r6, r7 ; bltzt r15, 0 } + 268: [0-9a-f]* { v2addsc r5, r6, r7 ; bltz r15, 0 } + 270: [0-9a-f]* { v2dotp r5, r6, r7 ; bltzt r15, 0 } + 278: [0-9a-f]* { v2maxsi r5, r6, 5 ; bltzt r15, 0 } + 280: [0-9a-f]* { v2packh r5, r6, r7 ; bltz r15, 0 } + 288: [0-9a-f]* { v2sadu r5, r6, r7 ; bltzt r15, 0 } + 290: [0-9a-f]* { v2shrui r5, r6, 5 ; bltzt r15, 0 } + 298: [0-9a-f]* { v4shlsc r5, r6, r7 ; bltz r15, 0 } + 2a0: [0-9a-f]* { cmpeq r5, r6, r7 ; bltzt r15, 0 } + 2a8: [0-9a-f]* { cmpltsi r5, r6, 5 ; bltz r15, 0 } + 2b0: [0-9a-f]* { cmulaf r5, r6, r7 ; bltz r15, 0 } + 2b8: [0-9a-f]* { moveli r5, 4660 ; bgez r15, 0 } + 2c0: [0-9a-f]* { subxsc r5, r6, r7 ; bnez r15, 0 } + 2c8: [0-9a-f]* { v1maxu r5, r6, r7 ; bnez r15, 0 } + 2d0: [0-9a-f]* { v1mulu r5, r6, r7 ; bnez r15, 0 } + 2d8: [0-9a-f]* { v1shrsi r5, r6, 5 ; bnez r15, 0 } + 2e0: [0-9a-f]* { v2addi r5, r6, 5 ; bnezt r15, 0 } + 2e8: [0-9a-f]* { v2mins r5, r6, r7 ; bnez r15, 0 } + 2f0: [0-9a-f]* { v2sadu r5, r6, r7 ; bnez r15, 0 } + 2f8: [0-9a-f]* { v2shru r5, r6, r7 ; bnez r15, 0 } + 300: [0-9a-f]* { v4shrs r5, r6, r7 ; bnez r15, 0 } + 308: [0-9a-f]* { cmpeq r5, r6, r7 ; bnez r15, 0 } + 310: [0-9a-f]* { cmulf r5, r6, r7 ; bnez r15, 0 } + 318: [0-9a-f]* { revbytes r5, r6 ; blbst r15, 0 } + 320: [0-9a-f]* { shrs r5, r6, r7 ; blbst r15, 0 } + 328: [0-9a-f]* { shruxi r5, r6, 5 ; blbs r15, 0 } + 330: [0-9a-f]* { tblidxb3 r5, r6 ; blbst r15, 0 } + 338: [0-9a-f]* { v1shl r5, r6, r7 ; blbs r15, 0 } + 340: [0-9a-f]* { v2mnz r5, r6, r7 ; blbs r15, 0 } + 348: [0-9a-f]* { v4add r5, r6, r7 ; blbs r15, 0 } + 350: [0-9a-f]* { addx r5, r6, r7 ; blbs r15, 0 } + 358: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; j 0 } + 360: [0-9a-f]* { nor r5, r6, r7 ; blezt r15, 0 } + 368: [0-9a-f]* { shl r5, r6, r7 ; blezt r15, 0 } + 370: [0-9a-f]* { shrsi r5, r6, 5 ; blez r15, 0 } + 378: [0-9a-f]* { tblidxb0 r5, r6 ; blbs r15, 0 } + 380: [0-9a-f]* { v2mz r5, r6, r7 ; blbc r15, 0 } + 388: [0-9a-f]* { and r5, r6, r7 ; bgtz r15, 0 } + 390: [0-9a-f]* { mz r5, r6, r7 ; blbst r15, 0 } + 398: [0-9a-f]* { shl r5, r6, r7 ; blbs r15, 0 } + 3a0: [0-9a-f]* { bfexts r5, r6, 5, 7 ; jal 0 } + 3a8: [0-9a-f]* { ori r5, r6, 5 ; bgtz r15, 0 } + 3b0: [0-9a-f]* { infol 4660 ; bgez r15, 0 } + 3b8: [0-9a-f]* { pcnt r5, r6 ; bnezt r15, 0 } + 3c0: [0-9a-f]* { bfextu r5, r6, 5, 7 ; j 0 } + 3c8: [0-9a-f]* { movei r5, 5 ; blbs r15, 0 } + 3d0: [0-9a-f]* { v2avgs r5, r6, r7 ; jal 0 } + 3d8: [0-9a-f]* { cmulh r5, r6, r7 ; jal 0 } + 3e0: [0-9a-f]* { v2dotpa r5, r6, r7 ; j 0 } + 3e8: [0-9a-f]* { rotli r5, r6, 5 ; jal 0 } + 3f0: [0-9a-f]* { v4shrs r5, r6, r7 ; j 0 } + 3f8: [0-9a-f]* { v2sub r5, r6, r7 ; j 0 } + 400: [0-9a-f]* { and r5, r6, r7 ; j 0 } + 408: [0-9a-f]* { nop ; blbst r15, 0 } + 410: [0-9a-f]* { cmpltu r5, r6, r7 ; beqzt r15, 0 } + 418: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; beqzt r15, 0 } + 420: [0-9a-f]* { shli r5, r6, 5 ; beqzt r15, 0 } + 428: [0-9a-f]* { v1dotpusa r5, r6, r7 ; beqzt r15, 0 } + 430: [0-9a-f]* { v2maxs r5, r6, r7 ; beqzt r15, 0 } + 438: [0-9a-f]* { addli r5, r6, 4660 ; bgezt r15, 0 } + 440: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; bgezt r15, 0 } + 448: [0-9a-f]* { mulx r5, r6, r7 ; bgezt r15, 0 } + 450: [0-9a-f]* { v1avgu r5, r6, r7 ; bgezt r15, 0 } + 458: [0-9a-f]* { v1subuc r5, r6, r7 ; bgezt r15, 0 } + 460: [0-9a-f]* { v2shru r5, r6, r7 ; bgezt r15, 0 } + 468: [0-9a-f]* { cmpne r5, r6, r7 ; bgtzt r15, 0 } + 470: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; bgtzt r15, 0 } + 478: [0-9a-f]* { shlxi r5, r6, 5 ; bgtzt r15, 0 } + 480: [0-9a-f]* { v1int_l r5, r6, r7 ; bgtzt r15, 0 } + 488: [0-9a-f]* { v2mins r5, r6, r7 ; bgtzt r15, 0 } + 490: [0-9a-f]* { addxi r5, r6, 5 ; blbct r15, 0 } + 498: [0-9a-f]* { fdouble_unpack_max r5, r6, r7 ; blbct r15, 0 } + 4a0: [0-9a-f]* { nop ; blbct r15, 0 } + 4a8: [0-9a-f]* { v1cmpeqi r5, r6, 5 ; blbct r15, 0 } + 4b0: [0-9a-f]* { v2addi r5, r6, 5 ; blbct r15, 0 } + 4b8: [0-9a-f]* { v2sub r5, r6, r7 ; blbct r15, 0 } + 4c0: [0-9a-f]* { cmula r5, r6, r7 ; blbst r15, 0 } + 4c8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; blbst r15, 0 } + 4d0: [0-9a-f]* { shrsi r5, r6, 5 ; blbst r15, 0 } + 4d8: [0-9a-f]* { v1maxui r5, r6, 5 ; blbst r15, 0 } + 4e0: [0-9a-f]* { v2mnz r5, r6, r7 ; blbst r15, 0 } + 4e8: [0-9a-f]* { addxsc r5, r6, r7 ; blezt r15, 0 } + 4f0: [0-9a-f]* { blezt r15, 0 } + 4f8: [0-9a-f]* { or r5, r6, r7 ; blezt r15, 0 } + 500: [0-9a-f]* { v1cmpleu r5, r6, r7 ; blezt r15, 0 } + 508: [0-9a-f]* { v2adiffs r5, r6, r7 ; blezt r15, 0 } + 510: [0-9a-f]* { v4add r5, r6, r7 ; blezt r15, 0 } + 518: [0-9a-f]* { cmulf r5, r6, r7 ; bltzt r15, 0 } + 520: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; bltzt r15, 0 } + 528: [0-9a-f]* { shrui r5, r6, 5 ; bltzt r15, 0 } + 530: [0-9a-f]* { v1minui r5, r6, 5 ; bltzt r15, 0 } + 538: [0-9a-f]* { v2muls r5, r6, r7 ; bltzt r15, 0 } + 540: [0-9a-f]* { andi r5, r6, 5 ; bnezt r15, 0 } + 548: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; bnezt r15, 0 } + 550: [0-9a-f]* { pcnt r5, r6 ; bnezt r15, 0 } + 558: [0-9a-f]* { v1cmpltsi r5, r6, 5 ; bnezt r15, 0 } + 560: [0-9a-f]* { v2cmpeq r5, r6, r7 ; bnezt r15, 0 } + 568: [0-9a-f]* { v4int_h r5, r6, r7 ; bnezt r15, 0 } + 570: [0-9a-f]* { cmulfr r5, r6, r7 ; beqz r15, 0 } + 578: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; beqz r15, 0 } + 580: [0-9a-f]* { shrux r5, r6, r7 ; beqz r15, 0 } + 588: [0-9a-f]* { v1mnz r5, r6, r7 ; beqz r15, 0 } + 590: [0-9a-f]* { v2mults r5, r6, r7 ; beqz r15, 0 } + 598: [0-9a-f]* { bfexts r5, r6, 5, 7 ; bgez r15, 0 } + 5a0: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; bgez r15, 0 } + 5a8: [0-9a-f]* { revbits r5, r6 ; bgez r15, 0 } + 5b0: [0-9a-f]* { v1cmpltu r5, r6, r7 ; bgez r15, 0 } + 5b8: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; bgez r15, 0 } + 5c0: [0-9a-f]* { v4int_l r5, r6, r7 ; bgez r15, 0 } + 5c8: [0-9a-f]* { cmulhr r5, r6, r7 ; bgtz r15, 0 } + 5d0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; bgtz r15, 0 } + 5d8: [0-9a-f]* { shufflebytes r5, r6, r7 ; bgtz r15, 0 } + 5e0: [0-9a-f]* { v1mulu r5, r6, r7 ; bgtz r15, 0 } + 5e8: [0-9a-f]* { v2packh r5, r6, r7 ; bgtz r15, 0 } + 5f0: [0-9a-f]* { bfins r5, r6, 5, 7 ; blbc r15, 0 } + 5f8: [0-9a-f]* { fsingle_pack1 r5, r6 ; blbc r15, 0 } + 600: [0-9a-f]* { rotl r5, r6, r7 ; blbc r15, 0 } + 608: [0-9a-f]* { v1cmpne r5, r6, r7 ; blbc r15, 0 } + 610: [0-9a-f]* { v2cmpleu r5, r6, r7 ; blbc r15, 0 } + 618: [0-9a-f]* { v4shl r5, r6, r7 ; blbc r15, 0 } + 620: [0-9a-f]* { crc32_8 r5, r6, r7 ; blbs r15, 0 } + 628: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; blbs r15, 0 } + 630: [0-9a-f]* { subx r5, r6, r7 ; blbs r15, 0 } + 638: [0-9a-f]* { v1mz r5, r6, r7 ; blbs r15, 0 } + 640: [0-9a-f]* { v2packuc r5, r6, r7 ; blbs r15, 0 } + 648: [0-9a-f]* { cmoveqz r5, r6, r7 ; blez r15, 0 } + 650: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; blez r15, 0 } + 658: [0-9a-f]* { shl r5, r6, r7 ; blez r15, 0 } + 660: [0-9a-f]* { v1ddotpua r5, r6, r7 ; blez r15, 0 } + 668: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; blez r15, 0 } + 670: [0-9a-f]* { v4shrs r5, r6, r7 ; blez r15, 0 } + 678: [0-9a-f]* { dblalign r5, r6, r7 ; bltz r15, 0 } + 680: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; bltz r15, 0 } + 688: [0-9a-f]* { tblidxb0 r5, r6 ; bltz r15, 0 } + 690: [0-9a-f]* { v1sadu r5, r6, r7 ; bltz r15, 0 } + 698: [0-9a-f]* { v2sadau r5, r6, r7 ; bltz r15, 0 } + 6a0: [0-9a-f]* { cmpeq r5, r6, r7 ; bnez r15, 0 } + 6a8: [0-9a-f]* { infol 4660 ; bnez r15, 0 } + 6b0: [0-9a-f]* { shl1add r5, r6, r7 ; bnez r15, 0 } + 6b8: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; bnez r15, 0 } + 6c0: [0-9a-f]* { v2cmpltui r5, r6, 5 ; bnez r15, 0 } + 6c8: [0-9a-f]* { v4sub r5, r6, r7 ; bnez r15, 0 } + 6d0: [0-9a-f]* { cmples r5, r6, r7 ; jal 0 } + 6d8: [0-9a-f]* { mnz r5, r6, r7 ; jal 0 } + 6e0: [0-9a-f]* { shl2add r5, r6, r7 ; jal 0 } + 6e8: [0-9a-f]* { v1dotpa r5, r6, r7 ; jal 0 } + 6f0: [0-9a-f]* { v2dotp r5, r6, r7 ; jal 0 } + 6f8: [0-9a-f]* { xor r5, r6, r7 ; jal 0 } + 700: [0-9a-f]* { dblalign6 r5, r6, r7 ; j 0 } + 708: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; j 0 } + 710: [0-9a-f]* { tblidxb3 r5, r6 ; j 0 } + 718: [0-9a-f]* { v1shrs r5, r6, r7 ; j 0 } + 720: [0-9a-f]* { v2shl r5, r6, r7 ; j 0 } + 728: [0-9a-f]* { cmpeqi r5, r6, 5 } + 730: [0-9a-f]* { fetchand r5, r6, r7 } + 738: [0-9a-f]* { ldna_add r5, r6, 5 } + 740: [0-9a-f]* { mula_hu_lu r5, r6, r7 } + 748: [0-9a-f]* { shlx r5, r6, r7 } + 750: [0-9a-f]* { v1avgu r5, r6, r7 } + 758: [0-9a-f]* { v1subuc r5, r6, r7 } + 760: [0-9a-f]* { v2shru r5, r6, r7 } + 768: [0-9a-f]* { add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + 770: [0-9a-f]* { add r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 } + 778: [0-9a-f]* { add r15, r16, r17 ; andi r5, r6, 5 ; ld2u r25, r26 } + 780: [0-9a-f]* { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 } + 788: [0-9a-f]* { add r15, r16, r17 ; cmpeq r5, r6, r7 ; ld4s r25, r26 } + 790: [0-9a-f]* { add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch r25 } + 798: [0-9a-f]* { add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 } + 7a0: [0-9a-f]* { add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 } + 7a8: [0-9a-f]* { ctz r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 } + 7b0: [0-9a-f]* { add r15, r16, r17 ; prefetch_l3 r25 } + 7b8: [0-9a-f]* { add r15, r16, r17 ; info 19 ; prefetch r25 } + 7c0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 } + 7c8: [0-9a-f]* { add r15, r16, r17 ; andi r5, r6, 5 ; ld1s r25, r26 } + 7d0: [0-9a-f]* { add r15, r16, r17 ; shl1addx r5, r6, r7 ; ld1s r25, r26 } + 7d8: [0-9a-f]* { add r15, r16, r17 ; move r5, r6 ; ld1u r25, r26 } + 7e0: [0-9a-f]* { add r15, r16, r17 ; ld1u r25, r26 } + 7e8: [0-9a-f]* { revbits r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 } + 7f0: [0-9a-f]* { add r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 } + 7f8: [0-9a-f]* { add r15, r16, r17 ; subx r5, r6, r7 ; ld2u r25, r26 } + 800: [0-9a-f]* { mulx r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } + 808: [0-9a-f]* { add r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 } + 810: [0-9a-f]* { add r15, r16, r17 ; shli r5, r6, 5 ; ld4u r25, r26 } + 818: [0-9a-f]* { add r15, r16, r17 ; move r5, r6 ; prefetch r25 } + 820: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } + 828: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } + 830: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + 838: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 } + 840: [0-9a-f]* { mulax r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 } + 848: [0-9a-f]* { add r15, r16, r17 ; mz r5, r6, r7 ; ld4u r25, r26 } + 850: [0-9a-f]* { add r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 } + 858: [0-9a-f]* { pcnt r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 } + 860: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } + 868: [0-9a-f]* { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } + 870: [0-9a-f]* { add r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } + 878: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 } + 880: [0-9a-f]* { add r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l2 r25 } + 888: [0-9a-f]* { add r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l2 r25 } + 890: [0-9a-f]* { add r15, r16, r17 ; prefetch_l2_fault r25 } + 898: [0-9a-f]* { tblidxb1 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 } + 8a0: [0-9a-f]* { add r15, r16, r17 ; nop ; prefetch_l3 r25 } + 8a8: [0-9a-f]* { add r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l3_fault r25 } + 8b0: [0-9a-f]* { add r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l3_fault r25 } + 8b8: [0-9a-f]* { revbytes r5, r6 ; add r15, r16, r17 ; prefetch_l2 r25 } + 8c0: [0-9a-f]* { add r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l3 r25 } + 8c8: [0-9a-f]* { add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 } + 8d0: [0-9a-f]* { add r15, r16, r17 ; shl2add r5, r6, r7 ; st1 r25, r26 } + 8d8: [0-9a-f]* { add r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 } + 8e0: [0-9a-f]* { add r15, r16, r17 ; shlx r5, r6, r7 } + 8e8: [0-9a-f]* { add r15, r16, r17 ; shru r5, r6, r7 ; ld r25, r26 } + 8f0: [0-9a-f]* { shufflebytes r5, r6, r7 ; add r15, r16, r17 } + 8f8: [0-9a-f]* { revbits r5, r6 ; add r15, r16, r17 ; st r25, r26 } + 900: [0-9a-f]* { add r15, r16, r17 ; cmpne r5, r6, r7 ; st1 r25, r26 } + 908: [0-9a-f]* { add r15, r16, r17 ; subx r5, r6, r7 ; st1 r25, r26 } + 910: [0-9a-f]* { mulx r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 } + 918: [0-9a-f]* { add r15, r16, r17 ; cmpeqi r5, r6, 5 ; st4 r25, r26 } + 920: [0-9a-f]* { add r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 } + 928: [0-9a-f]* { add r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 } + 930: [0-9a-f]* { tblidxb1 r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 } + 938: [0-9a-f]* { tblidxb3 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 } + 940: [0-9a-f]* { v1mulu r5, r6, r7 ; add r15, r16, r17 } + 948: [0-9a-f]* { add r15, r16, r17 ; v2packh r5, r6, r7 } + 950: [0-9a-f]* { add r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } + 958: [0-9a-f]* { add r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 } + 960: [0-9a-f]* { add r5, r6, r7 ; addxi r15, r16, 5 ; st1 r25, r26 } + 968: [0-9a-f]* { add r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 } + 970: [0-9a-f]* { add r5, r6, r7 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } + 978: [0-9a-f]* { add r5, r6, r7 ; cmpleu r15, r16, r17 ; st4 r25, r26 } + 980: [0-9a-f]* { add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 } + 988: [0-9a-f]* { add r5, r6, r7 ; dblalign4 r15, r16, r17 } + 990: [0-9a-f]* { add r5, r6, r7 ; ill ; ld2u r25, r26 } + 998: [0-9a-f]* { add r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } + 9a0: [0-9a-f]* { add r5, r6, r7 ; jr r15 ; ld4s r25, r26 } + 9a8: [0-9a-f]* { add r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 } + 9b0: [0-9a-f]* { add r5, r6, r7 ; ld r25, r26 } + 9b8: [0-9a-f]* { add r5, r6, r7 ; shli r15, r16, 5 ; ld1s r25, r26 } + 9c0: [0-9a-f]* { add r5, r6, r7 ; rotl r15, r16, r17 ; ld1u r25, r26 } + 9c8: [0-9a-f]* { add r5, r6, r7 ; jrp r15 ; ld2s r25, r26 } + 9d0: [0-9a-f]* { add r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 } + 9d8: [0-9a-f]* { add r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 } + 9e0: [0-9a-f]* { add r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 } + 9e8: [0-9a-f]* { add r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4u r25, r26 } + 9f0: [0-9a-f]* { add r5, r6, r7 ; lnk r15 ; prefetch r25 } + 9f8: [0-9a-f]* { add r5, r6, r7 ; move r15, r16 ; prefetch r25 } + a00: [0-9a-f]* { add r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + a08: [0-9a-f]* { add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 } + a10: [0-9a-f]* { add r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + a18: [0-9a-f]* { add r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + a20: [0-9a-f]* { add r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 } + a28: [0-9a-f]* { add r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 } + a30: [0-9a-f]* { add r5, r6, r7 ; jrp r15 ; prefetch_l2 r25 } + a38: [0-9a-f]* { add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 } + a40: [0-9a-f]* { add r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 } + a48: [0-9a-f]* { add r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 } + a50: [0-9a-f]* { add r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 } + a58: [0-9a-f]* { add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + a60: [0-9a-f]* { add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } + a68: [0-9a-f]* { add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3 r25 } + a70: [0-9a-f]* { add r5, r6, r7 ; shl3add r15, r16, r17 ; st r25, r26 } + a78: [0-9a-f]* { add r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 } + a80: [0-9a-f]* { add r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 } + a88: [0-9a-f]* { add r5, r6, r7 ; shrui r15, r16, 5 } + a90: [0-9a-f]* { add r5, r6, r7 ; shl3add r15, r16, r17 ; st r25, r26 } + a98: [0-9a-f]* { add r5, r6, r7 ; or r15, r16, r17 ; st1 r25, r26 } + aa0: [0-9a-f]* { add r5, r6, r7 ; jr r15 ; st2 r25, r26 } + aa8: [0-9a-f]* { add r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 } + ab0: [0-9a-f]* { add r5, r6, r7 ; stnt1 r15, r16 } + ab8: [0-9a-f]* { add r5, r6, r7 ; subx r15, r16, r17 ; st r25, r26 } + ac0: [0-9a-f]* { add r5, r6, r7 ; v2cmpleu r15, r16, r17 } + ac8: [0-9a-f]* { add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 } + ad0: [0-9a-f]* { addi r15, r16, 5 ; addi r5, r6, 5 ; ld2s r25, r26 } + ad8: [0-9a-f]* { addi r15, r16, 5 ; addxi r5, r6, 5 ; ld2u r25, r26 } + ae0: [0-9a-f]* { addi r15, r16, 5 ; andi r5, r6, 5 ; ld2u r25, r26 } + ae8: [0-9a-f]* { cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 } + af0: [0-9a-f]* { addi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld4s r25, r26 } + af8: [0-9a-f]* { addi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch r25 } + b00: [0-9a-f]* { addi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 } + b08: [0-9a-f]* { addi r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 } + b10: [0-9a-f]* { ctz r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 } + b18: [0-9a-f]* { addi r15, r16, 5 ; prefetch_l3 r25 } + b20: [0-9a-f]* { addi r15, r16, 5 ; info 19 ; prefetch r25 } + b28: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 } + b30: [0-9a-f]* { addi r15, r16, 5 ; andi r5, r6, 5 ; ld1s r25, r26 } + b38: [0-9a-f]* { addi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld1s r25, r26 } + b40: [0-9a-f]* { addi r15, r16, 5 ; move r5, r6 ; ld1u r25, r26 } + b48: [0-9a-f]* { addi r15, r16, 5 ; ld1u r25, r26 } + b50: [0-9a-f]* { revbits r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 } + b58: [0-9a-f]* { addi r15, r16, 5 ; cmpne r5, r6, r7 ; ld2u r25, r26 } + b60: [0-9a-f]* { addi r15, r16, 5 ; subx r5, r6, r7 ; ld2u r25, r26 } + b68: [0-9a-f]* { mulx r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 } + b70: [0-9a-f]* { addi r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 } + b78: [0-9a-f]* { addi r15, r16, 5 ; shli r5, r6, 5 ; ld4u r25, r26 } + b80: [0-9a-f]* { addi r15, r16, 5 ; move r5, r6 ; prefetch r25 } + b88: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + b90: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 } + b98: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld4u r25, r26 } + ba0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 } + ba8: [0-9a-f]* { mulax r5, r6, r7 ; addi r15, r16, 5 ; ld2u r25, r26 } + bb0: [0-9a-f]* { addi r15, r16, 5 ; mz r5, r6, r7 ; ld4u r25, r26 } + bb8: [0-9a-f]* { addi r15, r16, 5 ; nor r5, r6, r7 ; prefetch r25 } + bc0: [0-9a-f]* { pcnt r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } + bc8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + bd0: [0-9a-f]* { cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + bd8: [0-9a-f]* { addi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch r25 } + be0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } + be8: [0-9a-f]* { addi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l2 r25 } + bf0: [0-9a-f]* { addi r15, r16, 5 ; rotl r5, r6, r7 ; prefetch_l2 r25 } + bf8: [0-9a-f]* { addi r15, r16, 5 ; prefetch_l2_fault r25 } + c00: [0-9a-f]* { tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 } + c08: [0-9a-f]* { addi r15, r16, 5 ; nop ; prefetch_l3 r25 } + c10: [0-9a-f]* { addi r15, r16, 5 ; cmpleu r5, r6, r7 ; prefetch_l3_fault r25 } + c18: [0-9a-f]* { addi r15, r16, 5 ; shrsi r5, r6, 5 ; prefetch_l3_fault r25 } + c20: [0-9a-f]* { revbytes r5, r6 ; addi r15, r16, 5 ; prefetch_l2 r25 } + c28: [0-9a-f]* { addi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l3 r25 } + c30: [0-9a-f]* { addi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 } + c38: [0-9a-f]* { addi r15, r16, 5 ; shl2add r5, r6, r7 ; st1 r25, r26 } + c40: [0-9a-f]* { addi r15, r16, 5 ; shl3add r5, r6, r7 ; st4 r25, r26 } + c48: [0-9a-f]* { addi r15, r16, 5 ; shlx r5, r6, r7 } + c50: [0-9a-f]* { addi r15, r16, 5 ; shru r5, r6, r7 ; ld r25, r26 } + c58: [0-9a-f]* { shufflebytes r5, r6, r7 ; addi r15, r16, 5 } + c60: [0-9a-f]* { revbits r5, r6 ; addi r15, r16, 5 ; st r25, r26 } + c68: [0-9a-f]* { addi r15, r16, 5 ; cmpne r5, r6, r7 ; st1 r25, r26 } + c70: [0-9a-f]* { addi r15, r16, 5 ; subx r5, r6, r7 ; st1 r25, r26 } + c78: [0-9a-f]* { mulx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + c80: [0-9a-f]* { addi r15, r16, 5 ; cmpeqi r5, r6, 5 ; st4 r25, r26 } + c88: [0-9a-f]* { addi r15, r16, 5 ; shli r5, r6, 5 ; st4 r25, r26 } + c90: [0-9a-f]* { addi r15, r16, 5 ; subx r5, r6, r7 ; prefetch r25 } + c98: [0-9a-f]* { tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } + ca0: [0-9a-f]* { tblidxb3 r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 } + ca8: [0-9a-f]* { v1mulu r5, r6, r7 ; addi r15, r16, 5 } + cb0: [0-9a-f]* { addi r15, r16, 5 ; v2packh r5, r6, r7 } + cb8: [0-9a-f]* { addi r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } + cc0: [0-9a-f]* { addi r5, r6, 5 ; addi r15, r16, 5 ; st r25, r26 } + cc8: [0-9a-f]* { addi r5, r6, 5 ; addxi r15, r16, 5 ; st1 r25, r26 } + cd0: [0-9a-f]* { addi r5, r6, 5 ; andi r15, r16, 5 ; st1 r25, r26 } + cd8: [0-9a-f]* { addi r5, r6, 5 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } + ce0: [0-9a-f]* { addi r5, r6, 5 ; cmpleu r15, r16, r17 ; st4 r25, r26 } + ce8: [0-9a-f]* { addi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld r25, r26 } + cf0: [0-9a-f]* { addi r5, r6, 5 ; dblalign4 r15, r16, r17 } + cf8: [0-9a-f]* { addi r5, r6, 5 ; ill ; ld2u r25, r26 } + d00: [0-9a-f]* { addi r5, r6, 5 ; jalr r15 ; ld2s r25, r26 } + d08: [0-9a-f]* { addi r5, r6, 5 ; jr r15 ; ld4s r25, r26 } + d10: [0-9a-f]* { addi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld r25, r26 } + d18: [0-9a-f]* { addi r5, r6, 5 ; ld r25, r26 } + d20: [0-9a-f]* { addi r5, r6, 5 ; shli r15, r16, 5 ; ld1s r25, r26 } + d28: [0-9a-f]* { addi r5, r6, 5 ; rotl r15, r16, r17 ; ld1u r25, r26 } + d30: [0-9a-f]* { addi r5, r6, 5 ; jrp r15 ; ld2s r25, r26 } + d38: [0-9a-f]* { addi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 } + d40: [0-9a-f]* { addi r5, r6, 5 ; addx r15, r16, r17 ; ld4s r25, r26 } + d48: [0-9a-f]* { addi r5, r6, 5 ; shrui r15, r16, 5 ; ld4s r25, r26 } + d50: [0-9a-f]* { addi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 } + d58: [0-9a-f]* { addi r5, r6, 5 ; lnk r15 ; prefetch r25 } + d60: [0-9a-f]* { addi r5, r6, 5 ; move r15, r16 ; prefetch r25 } + d68: [0-9a-f]* { addi r5, r6, 5 ; mz r15, r16, r17 ; prefetch r25 } + d70: [0-9a-f]* { addi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l2 r25 } + d78: [0-9a-f]* { addi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 } + d80: [0-9a-f]* { addi r5, r6, 5 ; prefetch_add_l2_fault r15, 5 } + d88: [0-9a-f]* { addi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch r25 } + d90: [0-9a-f]* { addi r5, r6, 5 ; or r15, r16, r17 ; prefetch_l1_fault r25 } + d98: [0-9a-f]* { addi r5, r6, 5 ; jrp r15 ; prefetch_l2 r25 } + da0: [0-9a-f]* { addi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 } + da8: [0-9a-f]* { addi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l3 r25 } + db0: [0-9a-f]* { addi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l3 r25 } + db8: [0-9a-f]* { addi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 } + dc0: [0-9a-f]* { addi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + dc8: [0-9a-f]* { addi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } + dd0: [0-9a-f]* { addi r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l3 r25 } + dd8: [0-9a-f]* { addi r5, r6, 5 ; shl3add r15, r16, r17 ; st r25, r26 } + de0: [0-9a-f]* { addi r5, r6, 5 ; shli r15, r16, 5 ; st2 r25, r26 } + de8: [0-9a-f]* { addi r5, r6, 5 ; shrsi r15, r16, 5 ; st2 r25, r26 } + df0: [0-9a-f]* { addi r5, r6, 5 ; shrui r15, r16, 5 } + df8: [0-9a-f]* { addi r5, r6, 5 ; shl3add r15, r16, r17 ; st r25, r26 } + e00: [0-9a-f]* { addi r5, r6, 5 ; or r15, r16, r17 ; st1 r25, r26 } + e08: [0-9a-f]* { addi r5, r6, 5 ; jr r15 ; st2 r25, r26 } + e10: [0-9a-f]* { addi r5, r6, 5 ; cmplts r15, r16, r17 ; st4 r25, r26 } + e18: [0-9a-f]* { addi r5, r6, 5 ; stnt1 r15, r16 } + e20: [0-9a-f]* { addi r5, r6, 5 ; subx r15, r16, r17 ; st r25, r26 } + e28: [0-9a-f]* { addi r5, r6, 5 ; v2cmpleu r15, r16, r17 } + e30: [0-9a-f]* { addi r5, r6, 5 ; xor r15, r16, r17 ; ld1u r25, r26 } + e38: [0-9a-f]* { addli r15, r16, 4660 ; cmpltui r5, r6, 5 } + e40: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; addli r15, r16, 4660 } + e48: [0-9a-f]* { addli r15, r16, 4660 ; shlx r5, r6, r7 } + e50: [0-9a-f]* { addli r15, r16, 4660 ; v1int_h r5, r6, r7 } + e58: [0-9a-f]* { addli r15, r16, 4660 ; v2maxsi r5, r6, 5 } + e60: [0-9a-f]* { addli r5, r6, 4660 ; addx r15, r16, r17 } + e68: [0-9a-f]* { addli r5, r6, 4660 ; iret } + e70: [0-9a-f]* { addli r5, r6, 4660 ; movei r15, 5 } + e78: [0-9a-f]* { addli r5, r6, 4660 ; shruxi r15, r16, 5 } + e80: [0-9a-f]* { addli r5, r6, 4660 ; v1shl r15, r16, r17 } + e88: [0-9a-f]* { addli r5, r6, 4660 ; v4add r15, r16, r17 } + e90: [0-9a-f]* { addx r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 } + e98: [0-9a-f]* { addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 } + ea0: [0-9a-f]* { addx r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 } + ea8: [0-9a-f]* { cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + eb0: [0-9a-f]* { addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 } + eb8: [0-9a-f]* { addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 } + ec0: [0-9a-f]* { addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 } + ec8: [0-9a-f]* { addx r15, r16, r17 ; cmpltu r5, r6, r7 ; st1 r25, r26 } + ed0: [0-9a-f]* { ctz r5, r6 ; addx r15, r16, r17 ; prefetch r25 } + ed8: [0-9a-f]* { addx r15, r16, r17 ; st2 r25, r26 } + ee0: [0-9a-f]* { addx r15, r16, r17 ; info 19 ; prefetch_l3 r25 } + ee8: [0-9a-f]* { mulax r5, r6, r7 ; addx r15, r16, r17 ; ld r25, r26 } + ef0: [0-9a-f]* { addx r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1s r25, r26 } + ef8: [0-9a-f]* { addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1s r25, r26 } + f00: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 } + f08: [0-9a-f]* { addx r15, r16, r17 ; addxi r5, r6, 5 ; ld2s r25, r26 } + f10: [0-9a-f]* { addx r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 } + f18: [0-9a-f]* { addx r15, r16, r17 ; info 19 ; ld2u r25, r26 } + f20: [0-9a-f]* { tblidxb3 r5, r6 ; addx r15, r16, r17 ; ld2u r25, r26 } + f28: [0-9a-f]* { addx r15, r16, r17 ; or r5, r6, r7 ; ld4s r25, r26 } + f30: [0-9a-f]* { addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld4u r25, r26 } + f38: [0-9a-f]* { addx r15, r16, r17 ; shrui r5, r6, 5 ; ld4u r25, r26 } + f40: [0-9a-f]* { addx r15, r16, r17 ; move r5, r6 ; prefetch_l2_fault r25 } + f48: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 } + f50: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 } + f58: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2 r25 } + f60: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + f68: [0-9a-f]* { mulax r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + f70: [0-9a-f]* { addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l2 r25 } + f78: [0-9a-f]* { addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l3 r25 } + f80: [0-9a-f]* { pcnt r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 } + f88: [0-9a-f]* { addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + f90: [0-9a-f]* { addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch r25 } + f98: [0-9a-f]* { addx r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } + fa0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 } + fa8: [0-9a-f]* { addx r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l2 r25 } + fb0: [0-9a-f]* { addx r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2 r25 } + fb8: [0-9a-f]* { addx r15, r16, r17 ; move r5, r6 ; prefetch_l2_fault r25 } + fc0: [0-9a-f]* { addx r15, r16, r17 ; prefetch_l2_fault r25 } + fc8: [0-9a-f]* { revbits r5, r6 ; addx r15, r16, r17 ; prefetch_l3 r25 } + fd0: [0-9a-f]* { addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 } + fd8: [0-9a-f]* { addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3_fault r25 } + fe0: [0-9a-f]* { revbytes r5, r6 ; addx r15, r16, r17 ; st r25, r26 } + fe8: [0-9a-f]* { addx r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 } + ff0: [0-9a-f]* { addx r15, r16, r17 ; shl1add r5, r6, r7 ; st4 r25, r26 } + ff8: [0-9a-f]* { addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld r25, r26 } + 1000: [0-9a-f]* { addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 } + 1008: [0-9a-f]* { addx r15, r16, r17 ; shrs r5, r6, r7 ; ld1u r25, r26 } + 1010: [0-9a-f]* { addx r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 } + 1018: [0-9a-f]* { addx r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 } + 1020: [0-9a-f]* { addx r15, r16, r17 ; shl r5, r6, r7 ; st r25, r26 } + 1028: [0-9a-f]* { addx r15, r16, r17 ; info 19 ; st1 r25, r26 } + 1030: [0-9a-f]* { tblidxb3 r5, r6 ; addx r15, r16, r17 ; st1 r25, r26 } + 1038: [0-9a-f]* { addx r15, r16, r17 ; or r5, r6, r7 ; st2 r25, r26 } + 1040: [0-9a-f]* { addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; st4 r25, r26 } + 1048: [0-9a-f]* { addx r15, r16, r17 ; shrui r5, r6, 5 ; st4 r25, r26 } + 1050: [0-9a-f]* { addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3 r25 } + 1058: [0-9a-f]* { tblidxb1 r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 } + 1060: [0-9a-f]* { tblidxb3 r5, r6 ; addx r15, r16, r17 ; st1 r25, r26 } + 1068: [0-9a-f]* { v1sadu r5, r6, r7 ; addx r15, r16, r17 } + 1070: [0-9a-f]* { v2sadau r5, r6, r7 ; addx r15, r16, r17 } + 1078: [0-9a-f]* { addx r15, r16, r17 ; xor r5, r6, r7 ; st4 r25, r26 } + 1080: [0-9a-f]* { addx r5, r6, r7 ; addi r15, r16, 5 } + 1088: [0-9a-f]* { addx r5, r6, r7 ; addxli r15, r16, 4660 } + 1090: [0-9a-f]* { addx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 } + 1098: [0-9a-f]* { addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 } + 10a0: [0-9a-f]* { addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 } + 10a8: [0-9a-f]* { addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2u r25, r26 } + 10b0: [0-9a-f]* { addx r5, r6, r7 ; exch4 r15, r16, r17 } + 10b8: [0-9a-f]* { addx r5, r6, r7 ; ill ; prefetch r25 } + 10c0: [0-9a-f]* { addx r5, r6, r7 ; jalr r15 ; prefetch r25 } + 10c8: [0-9a-f]* { addx r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 } + 10d0: [0-9a-f]* { addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + 10d8: [0-9a-f]* { addx r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 } + 10e0: [0-9a-f]* { addx r5, r6, r7 ; shrui r15, r16, 5 ; ld1s r25, r26 } + 10e8: [0-9a-f]* { addx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } + 10f0: [0-9a-f]* { addx r5, r6, r7 ; movei r15, 5 ; ld2s r25, r26 } + 10f8: [0-9a-f]* { addx r5, r6, r7 ; ill ; ld2u r25, r26 } + 1100: [0-9a-f]* { addx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + 1108: [0-9a-f]* { addx r5, r6, r7 ; ld4s r25, r26 } + 1110: [0-9a-f]* { addx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } + 1118: [0-9a-f]* { addx r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 } + 1120: [0-9a-f]* { addx r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 } + 1128: [0-9a-f]* { addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 } + 1130: [0-9a-f]* { addx r5, r6, r7 ; nor r15, r16, r17 ; st r25, r26 } + 1138: [0-9a-f]* { addx r5, r6, r7 ; prefetch r25 } + 1140: [0-9a-f]* { addx r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } + 1148: [0-9a-f]* { addx r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch r25 } + 1150: [0-9a-f]* { addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 } + 1158: [0-9a-f]* { addx r5, r6, r7 ; movei r15, 5 ; prefetch_l2 r25 } + 1160: [0-9a-f]* { addx r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 } + 1168: [0-9a-f]* { addx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3 r25 } + 1170: [0-9a-f]* { addx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3_fault r25 } + 1178: [0-9a-f]* { addx r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 } + 1180: [0-9a-f]* { addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 } + 1188: [0-9a-f]* { addx r5, r6, r7 ; shl1add r15, r16, r17 ; st r25, r26 } + 1190: [0-9a-f]* { addx r5, r6, r7 ; shl2add r15, r16, r17 ; st2 r25, r26 } + 1198: [0-9a-f]* { addx r5, r6, r7 ; shl3add r15, r16, r17 } + 11a0: [0-9a-f]* { addx r5, r6, r7 ; shlxi r15, r16, 5 } + 11a8: [0-9a-f]* { addx r5, r6, r7 ; shru r15, r16, r17 ; ld1s r25, r26 } + 11b0: [0-9a-f]* { addx r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 } + 11b8: [0-9a-f]* { addx r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 } + 11c0: [0-9a-f]* { addx r5, r6, r7 ; shl1add r15, r16, r17 ; st1 r25, r26 } + 11c8: [0-9a-f]* { addx r5, r6, r7 ; move r15, r16 ; st2 r25, r26 } + 11d0: [0-9a-f]* { addx r5, r6, r7 ; st4 r25, r26 } + 11d8: [0-9a-f]* { addx r5, r6, r7 ; stnt4 r15, r16 } + 11e0: [0-9a-f]* { addx r5, r6, r7 ; subx r15, r16, r17 } + 11e8: [0-9a-f]* { addx r5, r6, r7 ; v2cmpltui r15, r16, 5 } + 11f0: [0-9a-f]* { addx r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 } + 11f8: [0-9a-f]* { addxi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 } + 1200: [0-9a-f]* { addxi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch r25 } + 1208: [0-9a-f]* { addxi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 } + 1210: [0-9a-f]* { cmoveqz r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } + 1218: [0-9a-f]* { addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 } + 1220: [0-9a-f]* { addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 } + 1228: [0-9a-f]* { addxi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 } + 1230: [0-9a-f]* { addxi r15, r16, 5 ; cmpltu r5, r6, r7 ; st1 r25, r26 } + 1238: [0-9a-f]* { ctz r5, r6 ; addxi r15, r16, 5 ; prefetch r25 } + 1240: [0-9a-f]* { addxi r15, r16, 5 ; st2 r25, r26 } + 1248: [0-9a-f]* { addxi r15, r16, 5 ; info 19 ; prefetch_l3 r25 } + 1250: [0-9a-f]* { mulax r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 } + 1258: [0-9a-f]* { addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld1s r25, r26 } + 1260: [0-9a-f]* { addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld1s r25, r26 } + 1268: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; ld1u r25, r26 } + 1270: [0-9a-f]* { addxi r15, r16, 5 ; addxi r5, r6, 5 ; ld2s r25, r26 } + 1278: [0-9a-f]* { addxi r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 } + 1280: [0-9a-f]* { addxi r15, r16, 5 ; info 19 ; ld2u r25, r26 } + 1288: [0-9a-f]* { tblidxb3 r5, r6 ; addxi r15, r16, 5 ; ld2u r25, r26 } + 1290: [0-9a-f]* { addxi r15, r16, 5 ; or r5, r6, r7 ; ld4s r25, r26 } + 1298: [0-9a-f]* { addxi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4u r25, r26 } + 12a0: [0-9a-f]* { addxi r15, r16, 5 ; shrui r5, r6, 5 ; ld4u r25, r26 } + 12a8: [0-9a-f]* { addxi r15, r16, 5 ; move r5, r6 ; prefetch_l2_fault r25 } + 12b0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3 r25 } + 12b8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 } + 12c0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l2 r25 } + 12c8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } + 12d0: [0-9a-f]* { mulax r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } + 12d8: [0-9a-f]* { addxi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l2 r25 } + 12e0: [0-9a-f]* { addxi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l3 r25 } + 12e8: [0-9a-f]* { pcnt r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + 12f0: [0-9a-f]* { addxi r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 } + 12f8: [0-9a-f]* { addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch r25 } + 1300: [0-9a-f]* { addxi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 } + 1308: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 } + 1310: [0-9a-f]* { addxi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l2 r25 } + 1318: [0-9a-f]* { addxi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l2 r25 } + 1320: [0-9a-f]* { addxi r15, r16, 5 ; move r5, r6 ; prefetch_l2_fault r25 } + 1328: [0-9a-f]* { addxi r15, r16, 5 ; prefetch_l2_fault r25 } + 1330: [0-9a-f]* { revbits r5, r6 ; addxi r15, r16, 5 ; prefetch_l3 r25 } + 1338: [0-9a-f]* { addxi r15, r16, 5 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 } + 1340: [0-9a-f]* { addxi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l3_fault r25 } + 1348: [0-9a-f]* { revbytes r5, r6 ; addxi r15, r16, 5 ; st r25, r26 } + 1350: [0-9a-f]* { addxi r15, r16, 5 ; rotli r5, r6, 5 ; st2 r25, r26 } + 1358: [0-9a-f]* { addxi r15, r16, 5 ; shl1add r5, r6, r7 ; st4 r25, r26 } + 1360: [0-9a-f]* { addxi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 } + 1368: [0-9a-f]* { addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld1u r25, r26 } + 1370: [0-9a-f]* { addxi r15, r16, 5 ; shrs r5, r6, r7 ; ld1u r25, r26 } + 1378: [0-9a-f]* { addxi r15, r16, 5 ; shru r5, r6, r7 ; ld2u r25, r26 } + 1380: [0-9a-f]* { addxi r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 } + 1388: [0-9a-f]* { addxi r15, r16, 5 ; shl r5, r6, r7 ; st r25, r26 } + 1390: [0-9a-f]* { addxi r15, r16, 5 ; info 19 ; st1 r25, r26 } + 1398: [0-9a-f]* { tblidxb3 r5, r6 ; addxi r15, r16, 5 ; st1 r25, r26 } + 13a0: [0-9a-f]* { addxi r15, r16, 5 ; or r5, r6, r7 ; st2 r25, r26 } + 13a8: [0-9a-f]* { addxi r15, r16, 5 ; cmpltsi r5, r6, 5 ; st4 r25, r26 } + 13b0: [0-9a-f]* { addxi r15, r16, 5 ; shrui r5, r6, 5 ; st4 r25, r26 } + 13b8: [0-9a-f]* { addxi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l3 r25 } + 13c0: [0-9a-f]* { tblidxb1 r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + 13c8: [0-9a-f]* { tblidxb3 r5, r6 ; addxi r15, r16, 5 ; st1 r25, r26 } + 13d0: [0-9a-f]* { v1sadu r5, r6, r7 ; addxi r15, r16, 5 } + 13d8: [0-9a-f]* { v2sadau r5, r6, r7 ; addxi r15, r16, 5 } + 13e0: [0-9a-f]* { addxi r15, r16, 5 ; xor r5, r6, r7 ; st4 r25, r26 } + 13e8: [0-9a-f]* { addxi r5, r6, 5 ; addi r15, r16, 5 } + 13f0: [0-9a-f]* { addxi r5, r6, 5 ; addxli r15, r16, 4660 } + 13f8: [0-9a-f]* { addxi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld r25, r26 } + 1400: [0-9a-f]* { addxi r5, r6, 5 ; cmples r15, r16, r17 ; ld r25, r26 } + 1408: [0-9a-f]* { addxi r5, r6, 5 ; cmplts r15, r16, r17 ; ld1u r25, r26 } + 1410: [0-9a-f]* { addxi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld2u r25, r26 } + 1418: [0-9a-f]* { addxi r5, r6, 5 ; exch4 r15, r16, r17 } + 1420: [0-9a-f]* { addxi r5, r6, 5 ; ill ; prefetch r25 } + 1428: [0-9a-f]* { addxi r5, r6, 5 ; jalr r15 ; prefetch r25 } + 1430: [0-9a-f]* { addxi r5, r6, 5 ; jr r15 ; prefetch_l1_fault r25 } + 1438: [0-9a-f]* { addxi r5, r6, 5 ; cmplts r15, r16, r17 ; ld r25, r26 } + 1440: [0-9a-f]* { addxi r5, r6, 5 ; addx r15, r16, r17 ; ld1s r25, r26 } + 1448: [0-9a-f]* { addxi r5, r6, 5 ; shrui r15, r16, 5 ; ld1s r25, r26 } + 1450: [0-9a-f]* { addxi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } + 1458: [0-9a-f]* { addxi r5, r6, 5 ; movei r15, 5 ; ld2s r25, r26 } + 1460: [0-9a-f]* { addxi r5, r6, 5 ; ill ; ld2u r25, r26 } + 1468: [0-9a-f]* { addxi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + 1470: [0-9a-f]* { addxi r5, r6, 5 ; ld4s r25, r26 } + 1478: [0-9a-f]* { addxi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } + 1480: [0-9a-f]* { addxi r5, r6, 5 ; lnk r15 ; prefetch_l3 r25 } + 1488: [0-9a-f]* { addxi r5, r6, 5 ; move r15, r16 ; prefetch_l3 r25 } + 1490: [0-9a-f]* { addxi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l3 r25 } + 1498: [0-9a-f]* { addxi r5, r6, 5 ; nor r15, r16, r17 ; st r25, r26 } + 14a0: [0-9a-f]* { addxi r5, r6, 5 ; prefetch r25 } + 14a8: [0-9a-f]* { addxi r5, r6, 5 ; add r15, r16, r17 ; prefetch r25 } + 14b0: [0-9a-f]* { addxi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch r25 } + 14b8: [0-9a-f]* { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 } + 14c0: [0-9a-f]* { addxi r5, r6, 5 ; movei r15, 5 ; prefetch_l2 r25 } + 14c8: [0-9a-f]* { addxi r5, r6, 5 ; info 19 ; prefetch_l2_fault r25 } + 14d0: [0-9a-f]* { addxi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3 r25 } + 14d8: [0-9a-f]* { addxi r5, r6, 5 ; add r15, r16, r17 ; prefetch_l3_fault r25 } + 14e0: [0-9a-f]* { addxi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 } + 14e8: [0-9a-f]* { addxi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 } + 14f0: [0-9a-f]* { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st r25, r26 } + 14f8: [0-9a-f]* { addxi r5, r6, 5 ; shl2add r15, r16, r17 ; st2 r25, r26 } + 1500: [0-9a-f]* { addxi r5, r6, 5 ; shl3add r15, r16, r17 } + 1508: [0-9a-f]* { addxi r5, r6, 5 ; shlxi r15, r16, 5 } + 1510: [0-9a-f]* { addxi r5, r6, 5 ; shru r15, r16, r17 ; ld1s r25, r26 } + 1518: [0-9a-f]* { addxi r5, r6, 5 ; add r15, r16, r17 ; st r25, r26 } + 1520: [0-9a-f]* { addxi r5, r6, 5 ; shrsi r15, r16, 5 ; st r25, r26 } + 1528: [0-9a-f]* { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st1 r25, r26 } + 1530: [0-9a-f]* { addxi r5, r6, 5 ; move r15, r16 ; st2 r25, r26 } + 1538: [0-9a-f]* { addxi r5, r6, 5 ; st4 r25, r26 } + 1540: [0-9a-f]* { addxi r5, r6, 5 ; stnt4 r15, r16 } + 1548: [0-9a-f]* { addxi r5, r6, 5 ; subx r15, r16, r17 } + 1550: [0-9a-f]* { addxi r5, r6, 5 ; v2cmpltui r15, r16, 5 } + 1558: [0-9a-f]* { addxi r5, r6, 5 ; xor r15, r16, r17 ; ld4u r25, r26 } + 1560: [0-9a-f]* { cmulaf r5, r6, r7 ; addxli r15, r16, 4660 } + 1568: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; addxli r15, r16, 4660 } + 1570: [0-9a-f]* { addxli r15, r16, 4660 ; shru r5, r6, r7 } + 1578: [0-9a-f]* { addxli r15, r16, 4660 ; v1minu r5, r6, r7 } + 1580: [0-9a-f]* { v2mulfsc r5, r6, r7 ; addxli r15, r16, 4660 } + 1588: [0-9a-f]* { addxli r5, r6, 4660 ; and r15, r16, r17 } + 1590: [0-9a-f]* { addxli r5, r6, 4660 ; jrp r15 } + 1598: [0-9a-f]* { addxli r5, r6, 4660 ; nop } + 15a0: [0-9a-f]* { addxli r5, r6, 4660 ; st2 r15, r16 } + 15a8: [0-9a-f]* { addxli r5, r6, 4660 ; v1shru r15, r16, r17 } + 15b0: [0-9a-f]* { addxli r5, r6, 4660 ; v4packsc r15, r16, r17 } + 15b8: [0-9a-f]* { cmulhr r5, r6, r7 ; addxsc r15, r16, r17 } + 15c0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; addxsc r15, r16, r17 } + 15c8: [0-9a-f]* { shufflebytes r5, r6, r7 ; addxsc r15, r16, r17 } + 15d0: [0-9a-f]* { v1mulu r5, r6, r7 ; addxsc r15, r16, r17 } + 15d8: [0-9a-f]* { addxsc r15, r16, r17 ; v2packh r5, r6, r7 } + 15e0: [0-9a-f]* { addxsc r5, r6, r7 ; cmpexch r15, r16, r17 } + 15e8: [0-9a-f]* { addxsc r5, r6, r7 ; ld1u r15, r16 } + 15f0: [0-9a-f]* { addxsc r5, r6, r7 ; prefetch r15 } + 15f8: [0-9a-f]* { addxsc r5, r6, r7 ; st_add r15, r16, 5 } + 1600: [0-9a-f]* { addxsc r5, r6, r7 ; v2add r15, r16, r17 } + 1608: [0-9a-f]* { addxsc r5, r6, r7 ; v4shru r15, r16, r17 } + 1610: [0-9a-f]* { and r15, r16, r17 ; addi r5, r6, 5 ; st1 r25, r26 } + 1618: [0-9a-f]* { and r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 } + 1620: [0-9a-f]* { and r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 } + 1628: [0-9a-f]* { cmoveqz r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 } + 1630: [0-9a-f]* { and r15, r16, r17 ; cmpeq r5, r6, r7 ; st4 r25, r26 } + 1638: [0-9a-f]* { and r15, r16, r17 ; cmpleu r5, r6, r7 ; ld r25, r26 } + 1640: [0-9a-f]* { and r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 } + 1648: [0-9a-f]* { and r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 } + 1650: [0-9a-f]* { ctz r5, r6 ; and r15, r16, r17 ; st1 r25, r26 } + 1658: [0-9a-f]* { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 } + 1660: [0-9a-f]* { and r15, r16, r17 ; add r5, r6, r7 ; ld r25, r26 } + 1668: [0-9a-f]* { revbytes r5, r6 ; and r15, r16, r17 ; ld r25, r26 } + 1670: [0-9a-f]* { ctz r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 } + 1678: [0-9a-f]* { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 } + 1680: [0-9a-f]* { and r15, r16, r17 ; mz r5, r6, r7 ; ld1u r25, r26 } + 1688: [0-9a-f]* { and r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 } + 1690: [0-9a-f]* { and r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 } + 1698: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 } + 16a0: [0-9a-f]* { and r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 } + 16a8: [0-9a-f]* { and r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 } + 16b0: [0-9a-f]* { and r15, r16, r17 ; move r5, r6 ; ld4u r25, r26 } + 16b8: [0-9a-f]* { and r15, r16, r17 ; ld4u r25, r26 } + 16c0: [0-9a-f]* { and r15, r16, r17 ; movei r5, 5 ; ld r25, r26 } + 16c8: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; and r15, r16, r17 } + 16d0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 } + 16d8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 } + 16e0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 } + 16e8: [0-9a-f]* { mulax r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 } + 16f0: [0-9a-f]* { and r15, r16, r17 ; mz r5, r6, r7 } + 16f8: [0-9a-f]* { and r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 } + 1700: [0-9a-f]* { and r15, r16, r17 ; addx r5, r6, r7 ; prefetch r25 } + 1708: [0-9a-f]* { and r15, r16, r17 ; rotli r5, r6, 5 ; prefetch r25 } + 1710: [0-9a-f]* { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; prefetch r25 } + 1718: [0-9a-f]* { tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch r25 } + 1720: [0-9a-f]* { and r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 } + 1728: [0-9a-f]* { and r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2 r25 } + 1730: [0-9a-f]* { and r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 } + 1738: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + 1740: [0-9a-f]* { cmoveqz r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 } + 1748: [0-9a-f]* { and r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3 r25 } + 1750: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 } + 1758: [0-9a-f]* { revbits r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 } + 1760: [0-9a-f]* { and r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + 1768: [0-9a-f]* { and r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 } + 1770: [0-9a-f]* { and r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4u r25, r26 } + 1778: [0-9a-f]* { and r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } + 1780: [0-9a-f]* { and r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 } + 1788: [0-9a-f]* { and r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 } + 1790: [0-9a-f]* { and r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3 r25 } + 1798: [0-9a-f]* { and r15, r16, r17 ; cmples r5, r6, r7 ; st r25, r26 } + 17a0: [0-9a-f]* { and r15, r16, r17 ; shrs r5, r6, r7 ; st r25, r26 } + 17a8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 } + 17b0: [0-9a-f]* { and r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 } + 17b8: [0-9a-f]* { and r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 } + 17c0: [0-9a-f]* { and r15, r16, r17 ; move r5, r6 ; st4 r25, r26 } + 17c8: [0-9a-f]* { and r15, r16, r17 ; st4 r25, r26 } + 17d0: [0-9a-f]* { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld r25, r26 } + 17d8: [0-9a-f]* { tblidxb2 r5, r6 ; and r15, r16, r17 ; ld1u r25, r26 } + 17e0: [0-9a-f]* { v1avgu r5, r6, r7 ; and r15, r16, r17 } + 17e8: [0-9a-f]* { and r15, r16, r17 ; v1subuc r5, r6, r7 } + 17f0: [0-9a-f]* { and r15, r16, r17 ; v2shru r5, r6, r7 } + 17f8: [0-9a-f]* { and r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } + 1800: [0-9a-f]* { and r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 } + 1808: [0-9a-f]* { and r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 } + 1810: [0-9a-f]* { and r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } + 1818: [0-9a-f]* { and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + 1820: [0-9a-f]* { and r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } + 1828: [0-9a-f]* { and r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + 1830: [0-9a-f]* { and r5, r6, r7 ; fetchor4 r15, r16, r17 } + 1838: [0-9a-f]* { and r5, r6, r7 ; ill ; st2 r25, r26 } + 1840: [0-9a-f]* { and r5, r6, r7 ; jalr r15 ; st1 r25, r26 } + 1848: [0-9a-f]* { and r5, r6, r7 ; jr r15 ; st4 r25, r26 } + 1850: [0-9a-f]* { and r5, r6, r7 ; jalrp r15 ; ld r25, r26 } + 1858: [0-9a-f]* { and r5, r6, r7 ; cmplts r15, r16, r17 ; ld1s r25, r26 } + 1860: [0-9a-f]* { and r5, r6, r7 ; addi r15, r16, 5 ; ld1u r25, r26 } + 1868: [0-9a-f]* { and r5, r6, r7 ; shru r15, r16, r17 ; ld1u r25, r26 } + 1870: [0-9a-f]* { and r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 } + 1878: [0-9a-f]* { and r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 } + 1880: [0-9a-f]* { and r5, r6, r7 ; ld4s r25, r26 } + 1888: [0-9a-f]* { and r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 } + 1890: [0-9a-f]* { and r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 } + 1898: [0-9a-f]* { and r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 18a0: [0-9a-f]* { and r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } + 18a8: [0-9a-f]* { and r5, r6, r7 ; nop ; ld1s r25, r26 } + 18b0: [0-9a-f]* { and r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 } + 18b8: [0-9a-f]* { and r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + 18c0: [0-9a-f]* { and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + 18c8: [0-9a-f]* { and r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 } + 18d0: [0-9a-f]* { and r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 } + 18d8: [0-9a-f]* { and r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } + 18e0: [0-9a-f]* { and r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 } + 18e8: [0-9a-f]* { and r5, r6, r7 ; info 19 ; prefetch_l3 r25 } + 18f0: [0-9a-f]* { and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + 18f8: [0-9a-f]* { and r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 } + 1900: [0-9a-f]* { and r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + 1908: [0-9a-f]* { and r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + 1910: [0-9a-f]* { and r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + 1918: [0-9a-f]* { and r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } + 1920: [0-9a-f]* { and r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 } + 1928: [0-9a-f]* { and r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + 1930: [0-9a-f]* { and r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 } + 1938: [0-9a-f]* { and r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 } + 1940: [0-9a-f]* { and r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 } + 1948: [0-9a-f]* { and r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 } + 1950: [0-9a-f]* { and r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 } + 1958: [0-9a-f]* { and r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 } + 1960: [0-9a-f]* { and r5, r6, r7 ; v1cmpleu r15, r16, r17 } + 1968: [0-9a-f]* { and r5, r6, r7 ; v2mnz r15, r16, r17 } + 1970: [0-9a-f]* { and r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 } + 1978: [0-9a-f]* { andi r15, r16, 5 ; addi r5, r6, 5 ; st1 r25, r26 } + 1980: [0-9a-f]* { andi r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 } + 1988: [0-9a-f]* { andi r15, r16, 5 ; andi r5, r6, 5 ; st2 r25, r26 } + 1990: [0-9a-f]* { cmoveqz r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 } + 1998: [0-9a-f]* { andi r15, r16, 5 ; cmpeq r5, r6, r7 ; st4 r25, r26 } + 19a0: [0-9a-f]* { andi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld r25, r26 } + 19a8: [0-9a-f]* { andi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 } + 19b0: [0-9a-f]* { andi r15, r16, 5 ; cmpne r5, r6, r7 ; ld2s r25, r26 } + 19b8: [0-9a-f]* { ctz r5, r6 ; andi r15, r16, 5 ; st1 r25, r26 } + 19c0: [0-9a-f]* { fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 } + 19c8: [0-9a-f]* { andi r15, r16, 5 ; add r5, r6, r7 ; ld r25, r26 } + 19d0: [0-9a-f]* { revbytes r5, r6 ; andi r15, r16, 5 ; ld r25, r26 } + 19d8: [0-9a-f]* { ctz r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 } + 19e0: [0-9a-f]* { tblidxb0 r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 } + 19e8: [0-9a-f]* { andi r15, r16, 5 ; mz r5, r6, r7 ; ld1u r25, r26 } + 19f0: [0-9a-f]* { andi r15, r16, 5 ; cmples r5, r6, r7 ; ld2s r25, r26 } + 19f8: [0-9a-f]* { andi r15, r16, 5 ; shrs r5, r6, r7 ; ld2s r25, r26 } + 1a00: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld2u r25, r26 } + 1a08: [0-9a-f]* { andi r15, r16, 5 ; andi r5, r6, 5 ; ld4s r25, r26 } + 1a10: [0-9a-f]* { andi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld4s r25, r26 } + 1a18: [0-9a-f]* { andi r15, r16, 5 ; move r5, r6 ; ld4u r25, r26 } + 1a20: [0-9a-f]* { andi r15, r16, 5 ; ld4u r25, r26 } + 1a28: [0-9a-f]* { andi r15, r16, 5 ; movei r5, 5 ; ld r25, r26 } + 1a30: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; andi r15, r16, 5 } + 1a38: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + 1a40: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 } + 1a48: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 } + 1a50: [0-9a-f]* { mulax r5, r6, r7 ; andi r15, r16, 5 ; st2 r25, r26 } + 1a58: [0-9a-f]* { andi r15, r16, 5 ; mz r5, r6, r7 } + 1a60: [0-9a-f]* { andi r15, r16, 5 ; or r5, r6, r7 ; ld1s r25, r26 } + 1a68: [0-9a-f]* { andi r15, r16, 5 ; addx r5, r6, r7 ; prefetch r25 } + 1a70: [0-9a-f]* { andi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch r25 } + 1a78: [0-9a-f]* { fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; prefetch r25 } + 1a80: [0-9a-f]* { tblidxb2 r5, r6 ; andi r15, r16, 5 ; prefetch r25 } + 1a88: [0-9a-f]* { andi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l1_fault r25 } + 1a90: [0-9a-f]* { andi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l2 r25 } + 1a98: [0-9a-f]* { andi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 } + 1aa0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2_fault r25 } + 1aa8: [0-9a-f]* { cmoveqz r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3 r25 } + 1ab0: [0-9a-f]* { andi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l3 r25 } + 1ab8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + 1ac0: [0-9a-f]* { revbits r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 } + 1ac8: [0-9a-f]* { andi r15, r16, 5 ; rotl r5, r6, r7 ; ld2s r25, r26 } + 1ad0: [0-9a-f]* { andi r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 } + 1ad8: [0-9a-f]* { andi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld4u r25, r26 } + 1ae0: [0-9a-f]* { andi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch r25 } + 1ae8: [0-9a-f]* { andi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 } + 1af0: [0-9a-f]* { andi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 } + 1af8: [0-9a-f]* { andi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l3 r25 } + 1b00: [0-9a-f]* { andi r15, r16, 5 ; cmples r5, r6, r7 ; st r25, r26 } + 1b08: [0-9a-f]* { andi r15, r16, 5 ; shrs r5, r6, r7 ; st r25, r26 } + 1b10: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 } + 1b18: [0-9a-f]* { andi r15, r16, 5 ; andi r5, r6, 5 ; st2 r25, r26 } + 1b20: [0-9a-f]* { andi r15, r16, 5 ; shl1addx r5, r6, r7 ; st2 r25, r26 } + 1b28: [0-9a-f]* { andi r15, r16, 5 ; move r5, r6 ; st4 r25, r26 } + 1b30: [0-9a-f]* { andi r15, r16, 5 ; st4 r25, r26 } + 1b38: [0-9a-f]* { tblidxb0 r5, r6 ; andi r15, r16, 5 ; ld r25, r26 } + 1b40: [0-9a-f]* { tblidxb2 r5, r6 ; andi r15, r16, 5 ; ld1u r25, r26 } + 1b48: [0-9a-f]* { v1avgu r5, r6, r7 ; andi r15, r16, 5 } + 1b50: [0-9a-f]* { andi r15, r16, 5 ; v1subuc r5, r6, r7 } + 1b58: [0-9a-f]* { andi r15, r16, 5 ; v2shru r5, r6, r7 } + 1b60: [0-9a-f]* { andi r5, r6, 5 ; add r15, r16, r17 ; ld4s r25, r26 } + 1b68: [0-9a-f]* { andi r5, r6, 5 ; addx r15, r16, r17 ; ld4u r25, r26 } + 1b70: [0-9a-f]* { andi r5, r6, 5 ; and r15, r16, r17 ; ld4u r25, r26 } + 1b78: [0-9a-f]* { andi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch r25 } + 1b80: [0-9a-f]* { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch r25 } + 1b88: [0-9a-f]* { andi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } + 1b90: [0-9a-f]* { andi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + 1b98: [0-9a-f]* { andi r5, r6, 5 ; fetchor4 r15, r16, r17 } + 1ba0: [0-9a-f]* { andi r5, r6, 5 ; ill ; st2 r25, r26 } + 1ba8: [0-9a-f]* { andi r5, r6, 5 ; jalr r15 ; st1 r25, r26 } + 1bb0: [0-9a-f]* { andi r5, r6, 5 ; jr r15 ; st4 r25, r26 } + 1bb8: [0-9a-f]* { andi r5, r6, 5 ; jalrp r15 ; ld r25, r26 } + 1bc0: [0-9a-f]* { andi r5, r6, 5 ; cmplts r15, r16, r17 ; ld1s r25, r26 } + 1bc8: [0-9a-f]* { andi r5, r6, 5 ; addi r15, r16, 5 ; ld1u r25, r26 } + 1bd0: [0-9a-f]* { andi r5, r6, 5 ; shru r15, r16, r17 ; ld1u r25, r26 } + 1bd8: [0-9a-f]* { andi r5, r6, 5 ; shl1add r15, r16, r17 ; ld2s r25, r26 } + 1be0: [0-9a-f]* { andi r5, r6, 5 ; move r15, r16 ; ld2u r25, r26 } + 1be8: [0-9a-f]* { andi r5, r6, 5 ; ld4s r25, r26 } + 1bf0: [0-9a-f]* { andi r5, r6, 5 ; andi r15, r16, 5 ; ld4u r25, r26 } + 1bf8: [0-9a-f]* { andi r5, r6, 5 ; xor r15, r16, r17 ; ld4u r25, r26 } + 1c00: [0-9a-f]* { andi r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 1c08: [0-9a-f]* { andi r5, r6, 5 ; movei r15, 5 ; ld1s r25, r26 } + 1c10: [0-9a-f]* { andi r5, r6, 5 ; nop ; ld1s r25, r26 } + 1c18: [0-9a-f]* { andi r5, r6, 5 ; or r15, r16, r17 ; ld2s r25, r26 } + 1c20: [0-9a-f]* { andi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 } + 1c28: [0-9a-f]* { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch r25 } + 1c30: [0-9a-f]* { andi r5, r6, 5 ; add r15, r16, r17 ; prefetch_l1_fault r25 } + 1c38: [0-9a-f]* { andi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 } + 1c40: [0-9a-f]* { andi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } + 1c48: [0-9a-f]* { andi r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 } + 1c50: [0-9a-f]* { andi r5, r6, 5 ; info 19 ; prefetch_l3 r25 } + 1c58: [0-9a-f]* { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + 1c60: [0-9a-f]* { andi r5, r6, 5 ; rotl r15, r16, r17 ; ld r25, r26 } + 1c68: [0-9a-f]* { andi r5, r6, 5 ; shl r15, r16, r17 ; ld1u r25, r26 } + 1c70: [0-9a-f]* { andi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + 1c78: [0-9a-f]* { andi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + 1c80: [0-9a-f]* { andi r5, r6, 5 ; shl3addx r15, r16, r17 ; prefetch r25 } + 1c88: [0-9a-f]* { andi r5, r6, 5 ; shrs r15, r16, r17 ; prefetch r25 } + 1c90: [0-9a-f]* { andi r5, r6, 5 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + 1c98: [0-9a-f]* { andi r5, r6, 5 ; cmples r15, r16, r17 ; st r25, r26 } + 1ca0: [0-9a-f]* { andi r5, r6, 5 ; add r15, r16, r17 ; st1 r25, r26 } + 1ca8: [0-9a-f]* { andi r5, r6, 5 ; shrsi r15, r16, 5 ; st1 r25, r26 } + 1cb0: [0-9a-f]* { andi r5, r6, 5 ; shl r15, r16, r17 ; st2 r25, r26 } + 1cb8: [0-9a-f]* { andi r5, r6, 5 ; mnz r15, r16, r17 ; st4 r25, r26 } + 1cc0: [0-9a-f]* { andi r5, r6, 5 ; sub r15, r16, r17 ; ld4s r25, r26 } + 1cc8: [0-9a-f]* { andi r5, r6, 5 ; v1cmpleu r15, r16, r17 } + 1cd0: [0-9a-f]* { andi r5, r6, 5 ; v2mnz r15, r16, r17 } + 1cd8: [0-9a-f]* { andi r5, r6, 5 ; xor r15, r16, r17 ; st r25, r26 } + 1ce0: [0-9a-f]* { bfexts r5, r6, 5, 7 ; finv r15 } + 1ce8: [0-9a-f]* { bfexts r5, r6, 5, 7 ; ldnt4s_add r15, r16, 5 } + 1cf0: [0-9a-f]* { bfexts r5, r6, 5, 7 ; shl3addx r15, r16, r17 } + 1cf8: [0-9a-f]* { bfexts r5, r6, 5, 7 ; v1cmpne r15, r16, r17 } + 1d00: [0-9a-f]* { bfexts r5, r6, 5, 7 ; v2shl r15, r16, r17 } + 1d08: [0-9a-f]* { bfextu r5, r6, 5, 7 ; cmpltu r15, r16, r17 } + 1d10: [0-9a-f]* { bfextu r5, r6, 5, 7 ; ld4s r15, r16 } + 1d18: [0-9a-f]* { bfextu r5, r6, 5, 7 ; prefetch_add_l3_fault r15, 5 } + 1d20: [0-9a-f]* { bfextu r5, r6, 5, 7 ; stnt4 r15, r16 } + 1d28: [0-9a-f]* { bfextu r5, r6, 5, 7 ; v2cmpleu r15, r16, r17 } + 1d30: [0-9a-f]* { bfins r5, r6, 5, 7 ; add r15, r16, r17 } + 1d38: [0-9a-f]* { bfins r5, r6, 5, 7 ; info 19 } + 1d40: [0-9a-f]* { bfins r5, r6, 5, 7 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 1d48: [0-9a-f]* { bfins r5, r6, 5, 7 ; shru r15, r16, r17 } + 1d50: [0-9a-f]* { bfins r5, r6, 5, 7 ; v1minui r15, r16, 5 } + 1d58: [0-9a-f]* { bfins r5, r6, 5, 7 ; v2shrui r15, r16, 5 } + 1d60: [0-9a-f]* { clz r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 } + 1d68: [0-9a-f]* { clz r5, r6 ; addxi r15, r16, 5 ; ld2u r25, r26 } + 1d70: [0-9a-f]* { clz r5, r6 ; andi r15, r16, 5 ; ld2u r25, r26 } + 1d78: [0-9a-f]* { clz r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 } + 1d80: [0-9a-f]* { clz r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 } + 1d88: [0-9a-f]* { clz r5, r6 ; cmpltsi r15, r16, 5 ; prefetch r25 } + 1d90: [0-9a-f]* { clz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 } + 1d98: [0-9a-f]* { clz r5, r6 ; prefetch_l3_fault r25 } + 1da0: [0-9a-f]* { clz r5, r6 ; info 19 ; st r25, r26 } + 1da8: [0-9a-f]* { clz r5, r6 ; jalrp r15 ; prefetch_l3_fault r25 } + 1db0: [0-9a-f]* { clz r5, r6 ; jrp r15 ; st1 r25, r26 } + 1db8: [0-9a-f]* { clz r5, r6 ; shl2addx r15, r16, r17 ; ld r25, r26 } + 1dc0: [0-9a-f]* { clz r5, r6 ; nor r15, r16, r17 ; ld1s r25, r26 } + 1dc8: [0-9a-f]* { clz r5, r6 ; jalrp r15 ; ld1u r25, r26 } + 1dd0: [0-9a-f]* { clz r5, r6 ; cmpleu r15, r16, r17 ; ld2s r25, r26 } + 1dd8: [0-9a-f]* { clz r5, r6 ; add r15, r16, r17 ; ld2u r25, r26 } + 1de0: [0-9a-f]* { clz r5, r6 ; shrsi r15, r16, 5 ; ld2u r25, r26 } + 1de8: [0-9a-f]* { clz r5, r6 ; shl r15, r16, r17 ; ld4s r25, r26 } + 1df0: [0-9a-f]* { clz r5, r6 ; mnz r15, r16, r17 ; ld4u r25, r26 } + 1df8: [0-9a-f]* { clz r5, r6 ; ldnt4u r15, r16 } + 1e00: [0-9a-f]* { clz r5, r6 ; mnz r15, r16, r17 ; st2 r25, r26 } + 1e08: [0-9a-f]* { clz r5, r6 ; movei r15, 5 } + 1e10: [0-9a-f]* { clz r5, r6 ; nop } + 1e18: [0-9a-f]* { clz r5, r6 ; prefetch r15 } + 1e20: [0-9a-f]* { clz r5, r6 ; shrs r15, r16, r17 ; prefetch r25 } + 1e28: [0-9a-f]* { clz r5, r6 ; mz r15, r16, r17 ; prefetch r25 } + 1e30: [0-9a-f]* { clz r5, r6 ; jalr r15 ; prefetch_l1_fault r25 } + 1e38: [0-9a-f]* { clz r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 } + 1e40: [0-9a-f]* { clz r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 } + 1e48: [0-9a-f]* { clz r5, r6 ; shru r15, r16, r17 ; prefetch_l2_fault r25 } + 1e50: [0-9a-f]* { clz r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 } + 1e58: [0-9a-f]* { clz r5, r6 ; mz r15, r16, r17 ; prefetch_l3_fault r25 } + 1e60: [0-9a-f]* { clz r5, r6 ; rotl r15, r16, r17 ; st4 r25, r26 } + 1e68: [0-9a-f]* { clz r5, r6 ; shl16insli r15, r16, 4660 } + 1e70: [0-9a-f]* { clz r5, r6 ; shl2add r15, r16, r17 ; ld1s r25, r26 } + 1e78: [0-9a-f]* { clz r5, r6 ; shl3add r15, r16, r17 ; ld2s r25, r26 } + 1e80: [0-9a-f]* { clz r5, r6 ; shli r15, r16, 5 ; ld4s r25, r26 } + 1e88: [0-9a-f]* { clz r5, r6 ; shrsi r15, r16, 5 ; ld4s r25, r26 } + 1e90: [0-9a-f]* { clz r5, r6 ; shrui r15, r16, 5 ; prefetch r25 } + 1e98: [0-9a-f]* { clz r5, r6 ; mz r15, r16, r17 ; st r25, r26 } + 1ea0: [0-9a-f]* { clz r5, r6 ; jalr r15 ; st1 r25, r26 } + 1ea8: [0-9a-f]* { clz r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 } + 1eb0: [0-9a-f]* { clz r5, r6 ; st4 r15, r16 } + 1eb8: [0-9a-f]* { clz r5, r6 ; shrs r15, r16, r17 ; st4 r25, r26 } + 1ec0: [0-9a-f]* { clz r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 } + 1ec8: [0-9a-f]* { clz r5, r6 ; v1shrsi r15, r16, 5 } + 1ed0: [0-9a-f]* { clz r5, r6 ; v4int_l r15, r16, r17 } + 1ed8: [0-9a-f]* { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2_fault r25 } + 1ee0: [0-9a-f]* { cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 } + 1ee8: [0-9a-f]* { cmoveqz r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 } + 1ef0: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 } + 1ef8: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 } + 1f00: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 } + 1f08: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 } + 1f10: [0-9a-f]* { cmoveqz r5, r6, r7 ; ld1u r25, r26 } + 1f18: [0-9a-f]* { cmoveqz r5, r6, r7 ; info 19 ; ld2s r25, r26 } + 1f20: [0-9a-f]* { cmoveqz r5, r6, r7 ; jalrp r15 ; ld1u r25, r26 } + 1f28: [0-9a-f]* { cmoveqz r5, r6, r7 ; jrp r15 ; ld2u r25, r26 } + 1f30: [0-9a-f]* { cmoveqz r5, r6, r7 ; movei r15, 5 ; ld r25, r26 } + 1f38: [0-9a-f]* { cmoveqz r5, r6, r7 ; info 19 ; ld1s r25, r26 } + 1f40: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 } + 1f48: [0-9a-f]* { cmoveqz r5, r6, r7 ; ld1u_add r15, r16, 5 } + 1f50: [0-9a-f]* { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 } + 1f58: [0-9a-f]* { cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld2u r25, r26 } + 1f60: [0-9a-f]* { cmoveqz r5, r6, r7 ; jrp r15 ; ld4s r25, r26 } + 1f68: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 } + 1f70: [0-9a-f]* { cmoveqz r5, r6, r7 ; ldnt r15, r16 } + 1f78: [0-9a-f]* { cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 } + 1f80: [0-9a-f]* { cmoveqz r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + 1f88: [0-9a-f]* { cmoveqz r5, r6, r7 ; nop ; prefetch r25 } + 1f90: [0-9a-f]* { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 } + 1f98: [0-9a-f]* { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } + 1fa0: [0-9a-f]* { cmoveqz r5, r6, r7 ; prefetch r25 } + 1fa8: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + 1fb0: [0-9a-f]* { cmoveqz r5, r6, r7 ; prefetch_l1_fault r25 } + 1fb8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 } + 1fc0: [0-9a-f]* { cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + 1fc8: [0-9a-f]* { cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3 r25 } + 1fd0: [0-9a-f]* { cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 } + 1fd8: [0-9a-f]* { cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 } + 1fe0: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + 1fe8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 } + 1ff0: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 } + 1ff8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 } + 2000: [0-9a-f]* { cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 } + 2008: [0-9a-f]* { cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 } + 2010: [0-9a-f]* { cmoveqz r5, r6, r7 ; st r25, r26 } + 2018: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 } + 2020: [0-9a-f]* { cmoveqz r5, r6, r7 ; st1 r25, r26 } + 2028: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; st2 r25, r26 } + 2030: [0-9a-f]* { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 } + 2038: [0-9a-f]* { cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2_fault r25 } + 2040: [0-9a-f]* { cmoveqz r5, r6, r7 ; v1int_h r15, r16, r17 } + 2048: [0-9a-f]* { cmoveqz r5, r6, r7 ; v2shli r15, r16, 5 } + 2050: [0-9a-f]* { cmovnez r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 } + 2058: [0-9a-f]* { cmovnez r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 } + 2060: [0-9a-f]* { cmovnez r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 } + 2068: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } + 2070: [0-9a-f]* { cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 } + 2078: [0-9a-f]* { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 } + 2080: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + 2088: [0-9a-f]* { cmovnez r5, r6, r7 ; fetchaddgez r15, r16, r17 } + 2090: [0-9a-f]* { cmovnez r5, r6, r7 ; ill ; prefetch_l2_fault r25 } + 2098: [0-9a-f]* { cmovnez r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 } + 20a0: [0-9a-f]* { cmovnez r5, r6, r7 ; jr r15 ; prefetch_l3 r25 } + 20a8: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 } + 20b0: [0-9a-f]* { cmovnez r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 } + 20b8: [0-9a-f]* { cmovnez r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 } + 20c0: [0-9a-f]* { cmovnez r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 } + 20c8: [0-9a-f]* { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 } + 20d0: [0-9a-f]* { cmovnez r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 } + 20d8: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 } + 20e0: [0-9a-f]* { cmovnez r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + 20e8: [0-9a-f]* { cmovnez r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 } + 20f0: [0-9a-f]* { cmovnez r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + 20f8: [0-9a-f]* { cmovnez r5, r6, r7 ; move r15, r16 ; st1 r25, r26 } + 2100: [0-9a-f]* { cmovnez r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 } + 2108: [0-9a-f]* { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 } + 2110: [0-9a-f]* { cmovnez r5, r6, r7 ; jalr r15 ; prefetch r25 } + 2118: [0-9a-f]* { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } + 2120: [0-9a-f]* { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + 2128: [0-9a-f]* { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 } + 2130: [0-9a-f]* { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 } + 2138: [0-9a-f]* { cmovnez r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 } + 2140: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } + 2148: [0-9a-f]* { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + 2150: [0-9a-f]* { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + 2158: [0-9a-f]* { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 } + 2160: [0-9a-f]* { cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 } + 2168: [0-9a-f]* { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 } + 2170: [0-9a-f]* { cmovnez r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + 2178: [0-9a-f]* { cmovnez r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 } + 2180: [0-9a-f]* { cmovnez r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 } + 2188: [0-9a-f]* { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; st r25, r26 } + 2190: [0-9a-f]* { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 } + 2198: [0-9a-f]* { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 } + 21a0: [0-9a-f]* { cmovnez r5, r6, r7 ; nop ; st2 r25, r26 } + 21a8: [0-9a-f]* { cmovnez r5, r6, r7 ; jalr r15 ; st4 r25, r26 } + 21b0: [0-9a-f]* { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } + 21b8: [0-9a-f]* { cmovnez r5, r6, r7 ; v1addi r15, r16, 5 } + 21c0: [0-9a-f]* { cmovnez r5, r6, r7 ; v2int_l r15, r16, r17 } + 21c8: [0-9a-f]* { cmovnez r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + 21d0: [0-9a-f]* { cmpeq r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l2 r25 } + 21d8: [0-9a-f]* { cmpeq r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 } + 21e0: [0-9a-f]* { cmpeq r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l2_fault r25 } + 21e8: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 } + 21f0: [0-9a-f]* { cmpeq r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 } + 21f8: [0-9a-f]* { cmpeq r15, r16, r17 ; cmples r5, r6, r7 ; st r25, r26 } + 2200: [0-9a-f]* { cmpeq r15, r16, r17 ; cmplts r5, r6, r7 ; st2 r25, r26 } + 2208: [0-9a-f]* { cmpeq r15, r16, r17 ; cmpltu r5, r6, r7 } + 2210: [0-9a-f]* { ctz r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 } + 2218: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; cmpeq r15, r16, r17 } + 2220: [0-9a-f]* { cmpeq r15, r16, r17 ; info 19 ; st1 r25, r26 } + 2228: [0-9a-f]* { cmpeq r15, r16, r17 ; nop ; ld r25, r26 } + 2230: [0-9a-f]* { cmpeq r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 } + 2238: [0-9a-f]* { cmpeq r15, r16, r17 ; shrsi r5, r6, 5 ; ld1s r25, r26 } + 2240: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } + 2248: [0-9a-f]* { clz r5, r6 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } + 2250: [0-9a-f]* { cmpeq r15, r16, r17 ; shl2add r5, r6, r7 ; ld2s r25, r26 } + 2258: [0-9a-f]* { cmpeq r15, r16, r17 ; movei r5, 5 ; ld2u r25, r26 } + 2260: [0-9a-f]* { cmpeq r15, r16, r17 ; add r5, r6, r7 ; ld4s r25, r26 } + 2268: [0-9a-f]* { revbytes r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + 2270: [0-9a-f]* { ctz r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + 2278: [0-9a-f]* { tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + 2280: [0-9a-f]* { cmpeq r15, r16, r17 ; move r5, r6 ; st r25, r26 } + 2288: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 } + 2290: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + 2298: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + 22a0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 } + 22a8: [0-9a-f]* { mulax r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 } + 22b0: [0-9a-f]* { cmpeq r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l3_fault r25 } + 22b8: [0-9a-f]* { cmpeq r15, r16, r17 ; nor r5, r6, r7 ; st1 r25, r26 } + 22c0: [0-9a-f]* { pcnt r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 } + 22c8: [0-9a-f]* { cmpeq r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 } + 22d0: [0-9a-f]* { cmpeq r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 } + 22d8: [0-9a-f]* { cmpeq r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 } + 22e0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + 22e8: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 } + 22f0: [0-9a-f]* { cmpeq r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2 r25 } + 22f8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 } + 2300: [0-9a-f]* { cmpeq r15, r16, r17 ; addx r5, r6, r7 ; prefetch_l3 r25 } + 2308: [0-9a-f]* { cmpeq r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l3 r25 } + 2310: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + 2318: [0-9a-f]* { tblidxb2 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + 2320: [0-9a-f]* { revbytes r5, r6 ; cmpeq r15, r16, r17 ; st4 r25, r26 } + 2328: [0-9a-f]* { cmpeq r15, r16, r17 ; shl r5, r6, r7 ; ld r25, r26 } + 2330: [0-9a-f]* { cmpeq r15, r16, r17 ; shl1addx r5, r6, r7 ; ld1s r25, r26 } + 2338: [0-9a-f]* { cmpeq r15, r16, r17 ; shl2addx r5, r6, r7 ; ld2s r25, r26 } + 2340: [0-9a-f]* { cmpeq r15, r16, r17 ; shl3addx r5, r6, r7 ; ld4s r25, r26 } + 2348: [0-9a-f]* { cmpeq r15, r16, r17 ; shrs r5, r6, r7 ; ld4s r25, r26 } + 2350: [0-9a-f]* { cmpeq r15, r16, r17 ; shru r5, r6, r7 ; prefetch r25 } + 2358: [0-9a-f]* { clz r5, r6 ; cmpeq r15, r16, r17 ; st r25, r26 } + 2360: [0-9a-f]* { cmpeq r15, r16, r17 ; shl2add r5, r6, r7 ; st r25, r26 } + 2368: [0-9a-f]* { cmpeq r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 } + 2370: [0-9a-f]* { cmpeq r15, r16, r17 ; add r5, r6, r7 ; st2 r25, r26 } + 2378: [0-9a-f]* { revbytes r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 } + 2380: [0-9a-f]* { ctz r5, r6 ; cmpeq r15, r16, r17 ; st4 r25, r26 } + 2388: [0-9a-f]* { tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; st4 r25, r26 } + 2390: [0-9a-f]* { cmpeq r15, r16, r17 ; subx r5, r6, r7 ; st1 r25, r26 } + 2398: [0-9a-f]* { tblidxb1 r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 } + 23a0: [0-9a-f]* { tblidxb3 r5, r6 ; cmpeq r15, r16, r17 } + 23a8: [0-9a-f]* { cmpeq r15, r16, r17 ; v1shrs r5, r6, r7 } + 23b0: [0-9a-f]* { cmpeq r15, r16, r17 ; v2shl r5, r6, r7 } + 23b8: [0-9a-f]* { cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 } + 23c0: [0-9a-f]* { cmpeq r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 } + 23c8: [0-9a-f]* { cmpeq r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 } + 23d0: [0-9a-f]* { cmpeq r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } + 23d8: [0-9a-f]* { cmpeq r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 } + 23e0: [0-9a-f]* { cmpeq r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 } + 23e8: [0-9a-f]* { cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + 23f0: [0-9a-f]* { cmpeq r5, r6, r7 ; fetchaddgez r15, r16, r17 } + 23f8: [0-9a-f]* { cmpeq r5, r6, r7 ; ill ; prefetch_l2_fault r25 } + 2400: [0-9a-f]* { cmpeq r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 } + 2408: [0-9a-f]* { cmpeq r5, r6, r7 ; jr r15 ; prefetch_l3 r25 } + 2410: [0-9a-f]* { cmpeq r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 } + 2418: [0-9a-f]* { cmpeq r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 } + 2420: [0-9a-f]* { cmpeq r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 } + 2428: [0-9a-f]* { cmpeq r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 } + 2430: [0-9a-f]* { cmpeq r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 } + 2438: [0-9a-f]* { cmpeq r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 } + 2440: [0-9a-f]* { cmpeq r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 } + 2448: [0-9a-f]* { cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + 2450: [0-9a-f]* { cmpeq r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 } + 2458: [0-9a-f]* { cmpeq r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + 2460: [0-9a-f]* { cmpeq r5, r6, r7 ; move r15, r16 ; st1 r25, r26 } + 2468: [0-9a-f]* { cmpeq r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 } + 2470: [0-9a-f]* { cmpeq r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 } + 2478: [0-9a-f]* { cmpeq r5, r6, r7 ; jalr r15 ; prefetch r25 } + 2480: [0-9a-f]* { cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } + 2488: [0-9a-f]* { cmpeq r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + 2490: [0-9a-f]* { cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 } + 2498: [0-9a-f]* { cmpeq r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 } + 24a0: [0-9a-f]* { cmpeq r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 } + 24a8: [0-9a-f]* { cmpeq r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } + 24b0: [0-9a-f]* { cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + 24b8: [0-9a-f]* { cmpeq r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + 24c0: [0-9a-f]* { cmpeq r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 } + 24c8: [0-9a-f]* { cmpeq r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 } + 24d0: [0-9a-f]* { cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 } + 24d8: [0-9a-f]* { cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + 24e0: [0-9a-f]* { cmpeq r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 } + 24e8: [0-9a-f]* { cmpeq r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 } + 24f0: [0-9a-f]* { cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; st r25, r26 } + 24f8: [0-9a-f]* { cmpeq r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 } + 2500: [0-9a-f]* { cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 } + 2508: [0-9a-f]* { cmpeq r5, r6, r7 ; nop ; st2 r25, r26 } + 2510: [0-9a-f]* { cmpeq r5, r6, r7 ; jalr r15 ; st4 r25, r26 } + 2518: [0-9a-f]* { cmpeq r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } + 2520: [0-9a-f]* { cmpeq r5, r6, r7 ; v1addi r15, r16, 5 } + 2528: [0-9a-f]* { cmpeq r5, r6, r7 ; v2int_l r15, r16, r17 } + 2530: [0-9a-f]* { cmpeq r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + 2538: [0-9a-f]* { cmpeqi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l2 r25 } + 2540: [0-9a-f]* { cmpeqi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 } + 2548: [0-9a-f]* { cmpeqi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l2_fault r25 } + 2550: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 } + 2558: [0-9a-f]* { cmpeqi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 } + 2560: [0-9a-f]* { cmpeqi r15, r16, 5 ; cmples r5, r6, r7 ; st r25, r26 } + 2568: [0-9a-f]* { cmpeqi r15, r16, 5 ; cmplts r5, r6, r7 ; st2 r25, r26 } + 2570: [0-9a-f]* { cmpeqi r15, r16, 5 ; cmpltu r5, r6, r7 } + 2578: [0-9a-f]* { ctz r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 } + 2580: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; cmpeqi r15, r16, 5 } + 2588: [0-9a-f]* { cmpeqi r15, r16, 5 ; info 19 ; st1 r25, r26 } + 2590: [0-9a-f]* { cmpeqi r15, r16, 5 ; nop ; ld r25, r26 } + 2598: [0-9a-f]* { cmpeqi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld1s r25, r26 } + 25a0: [0-9a-f]* { cmpeqi r15, r16, 5 ; shrsi r5, r6, 5 ; ld1s r25, r26 } + 25a8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 } + 25b0: [0-9a-f]* { clz r5, r6 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 } + 25b8: [0-9a-f]* { cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 ; ld2s r25, r26 } + 25c0: [0-9a-f]* { cmpeqi r15, r16, 5 ; movei r5, 5 ; ld2u r25, r26 } + 25c8: [0-9a-f]* { cmpeqi r15, r16, 5 ; add r5, r6, r7 ; ld4s r25, r26 } + 25d0: [0-9a-f]* { revbytes r5, r6 ; cmpeqi r15, r16, 5 ; ld4s r25, r26 } + 25d8: [0-9a-f]* { ctz r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 } + 25e0: [0-9a-f]* { tblidxb0 r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 } + 25e8: [0-9a-f]* { cmpeqi r15, r16, 5 ; move r5, r6 ; st r25, r26 } + 25f0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 } + 25f8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 } + 2600: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 } + 2608: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 } + 2610: [0-9a-f]* { mulax r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 } + 2618: [0-9a-f]* { cmpeqi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l3_fault r25 } + 2620: [0-9a-f]* { cmpeqi r15, r16, 5 ; nor r5, r6, r7 ; st1 r25, r26 } + 2628: [0-9a-f]* { pcnt r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 } + 2630: [0-9a-f]* { cmpeqi r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 } + 2638: [0-9a-f]* { cmpeqi r15, r16, 5 ; cmpltsi r5, r6, 5 ; prefetch r25 } + 2640: [0-9a-f]* { cmpeqi r15, r16, 5 ; shrui r5, r6, 5 ; prefetch r25 } + 2648: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 } + 2650: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 } + 2658: [0-9a-f]* { cmpeqi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l2 r25 } + 2660: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 } + 2668: [0-9a-f]* { cmpeqi r15, r16, 5 ; addx r5, r6, r7 ; prefetch_l3 r25 } + 2670: [0-9a-f]* { cmpeqi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l3 r25 } + 2678: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 } + 2680: [0-9a-f]* { tblidxb2 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 } + 2688: [0-9a-f]* { revbytes r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } + 2690: [0-9a-f]* { cmpeqi r15, r16, 5 ; shl r5, r6, r7 ; ld r25, r26 } + 2698: [0-9a-f]* { cmpeqi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld1s r25, r26 } + 26a0: [0-9a-f]* { cmpeqi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld2s r25, r26 } + 26a8: [0-9a-f]* { cmpeqi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld4s r25, r26 } + 26b0: [0-9a-f]* { cmpeqi r15, r16, 5 ; shrs r5, r6, r7 ; ld4s r25, r26 } + 26b8: [0-9a-f]* { cmpeqi r15, r16, 5 ; shru r5, r6, r7 ; prefetch r25 } + 26c0: [0-9a-f]* { clz r5, r6 ; cmpeqi r15, r16, 5 ; st r25, r26 } + 26c8: [0-9a-f]* { cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 ; st r25, r26 } + 26d0: [0-9a-f]* { cmpeqi r15, r16, 5 ; movei r5, 5 ; st1 r25, r26 } + 26d8: [0-9a-f]* { cmpeqi r15, r16, 5 ; add r5, r6, r7 ; st2 r25, r26 } + 26e0: [0-9a-f]* { revbytes r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 } + 26e8: [0-9a-f]* { ctz r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } + 26f0: [0-9a-f]* { tblidxb0 r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } + 26f8: [0-9a-f]* { cmpeqi r15, r16, 5 ; subx r5, r6, r7 ; st1 r25, r26 } + 2700: [0-9a-f]* { tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 } + 2708: [0-9a-f]* { tblidxb3 r5, r6 ; cmpeqi r15, r16, 5 } + 2710: [0-9a-f]* { cmpeqi r15, r16, 5 ; v1shrs r5, r6, r7 } + 2718: [0-9a-f]* { cmpeqi r15, r16, 5 ; v2shl r5, r6, r7 } + 2720: [0-9a-f]* { cmpeqi r5, r6, 5 ; add r15, r16, r17 ; ld r25, r26 } + 2728: [0-9a-f]* { cmpeqi r5, r6, 5 ; addx r15, r16, r17 ; ld1s r25, r26 } + 2730: [0-9a-f]* { cmpeqi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 } + 2738: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } + 2740: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 } + 2748: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmplts r15, r16, r17 ; ld4s r25, r26 } + 2750: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch r25 } + 2758: [0-9a-f]* { cmpeqi r5, r6, 5 ; fetchaddgez r15, r16, r17 } + 2760: [0-9a-f]* { cmpeqi r5, r6, 5 ; ill ; prefetch_l2_fault r25 } + 2768: [0-9a-f]* { cmpeqi r5, r6, 5 ; jalr r15 ; prefetch_l2 r25 } + 2770: [0-9a-f]* { cmpeqi r5, r6, 5 ; jr r15 ; prefetch_l3 r25 } + 2778: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmpne r15, r16, r17 ; ld r25, r26 } + 2780: [0-9a-f]* { cmpeqi r5, r6, 5 ; andi r15, r16, 5 ; ld1s r25, r26 } + 2788: [0-9a-f]* { cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; ld1s r25, r26 } + 2790: [0-9a-f]* { cmpeqi r5, r6, 5 ; shl3add r15, r16, r17 ; ld1u r25, r26 } + 2798: [0-9a-f]* { cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 } + 27a0: [0-9a-f]* { cmpeqi r5, r6, 5 ; jalrp r15 ; ld2u r25, r26 } + 27a8: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld4s r25, r26 } + 27b0: [0-9a-f]* { cmpeqi r5, r6, 5 ; add r15, r16, r17 ; ld4u r25, r26 } + 27b8: [0-9a-f]* { cmpeqi r5, r6, 5 ; shrsi r15, r16, 5 ; ld4u r25, r26 } + 27c0: [0-9a-f]* { cmpeqi r5, r6, 5 ; lnk r15 ; st1 r25, r26 } + 27c8: [0-9a-f]* { cmpeqi r5, r6, 5 ; move r15, r16 ; st1 r25, r26 } + 27d0: [0-9a-f]* { cmpeqi r5, r6, 5 ; mz r15, r16, r17 ; st1 r25, r26 } + 27d8: [0-9a-f]* { cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; st4 r25, r26 } + 27e0: [0-9a-f]* { cmpeqi r5, r6, 5 ; jalr r15 ; prefetch r25 } + 27e8: [0-9a-f]* { cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch r25 } + 27f0: [0-9a-f]* { cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; prefetch r25 } + 27f8: [0-9a-f]* { cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 } + 2800: [0-9a-f]* { cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l2 r25 } + 2808: [0-9a-f]* { cmpeqi r5, r6, 5 ; jr r15 ; prefetch_l2_fault r25 } + 2810: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } + 2818: [0-9a-f]* { cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + 2820: [0-9a-f]* { cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + 2828: [0-9a-f]* { cmpeqi r5, r6, 5 ; rotli r15, r16, 5 ; st2 r25, r26 } + 2830: [0-9a-f]* { cmpeqi r5, r6, 5 ; shl1add r15, r16, r17 ; st4 r25, r26 } + 2838: [0-9a-f]* { cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld r25, r26 } + 2840: [0-9a-f]* { cmpeqi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + 2848: [0-9a-f]* { cmpeqi r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 } + 2850: [0-9a-f]* { cmpeqi r5, r6, 5 ; shru r15, r16, r17 ; ld2u r25, r26 } + 2858: [0-9a-f]* { cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; st r25, r26 } + 2860: [0-9a-f]* { cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; st r25, r26 } + 2868: [0-9a-f]* { cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; st1 r25, r26 } + 2870: [0-9a-f]* { cmpeqi r5, r6, 5 ; nop ; st2 r25, r26 } + 2878: [0-9a-f]* { cmpeqi r5, r6, 5 ; jalr r15 ; st4 r25, r26 } + 2880: [0-9a-f]* { cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; ld r25, r26 } + 2888: [0-9a-f]* { cmpeqi r5, r6, 5 ; v1addi r15, r16, 5 } + 2890: [0-9a-f]* { cmpeqi r5, r6, 5 ; v2int_l r15, r16, r17 } + 2898: [0-9a-f]* { cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + 28a0: [0-9a-f]* { cmulh r5, r6, r7 ; cmpexch r15, r16, r17 } + 28a8: [0-9a-f]* { mul_ls_lu r5, r6, r7 ; cmpexch r15, r16, r17 } + 28b0: [0-9a-f]* { shruxi r5, r6, 5 ; cmpexch r15, r16, r17 } + 28b8: [0-9a-f]* { v1multu r5, r6, r7 ; cmpexch r15, r16, r17 } + 28c0: [0-9a-f]* { v2mz r5, r6, r7 ; cmpexch r15, r16, r17 } + 28c8: [0-9a-f]* { bfextu r5, r6, 5, 7 ; cmpexch4 r15, r16, r17 } + 28d0: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; cmpexch4 r15, r16, r17 } + 28d8: [0-9a-f]* { revbytes r5, r6 ; cmpexch4 r15, r16, r17 } + 28e0: [0-9a-f]* { v1cmpltui r5, r6, 5 ; cmpexch4 r15, r16, r17 } + 28e8: [0-9a-f]* { v2cmples r5, r6, r7 ; cmpexch4 r15, r16, r17 } + 28f0: [0-9a-f]* { v4packsc r5, r6, r7 ; cmpexch4 r15, r16, r17 } + 28f8: [0-9a-f]* { cmples r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 } + 2900: [0-9a-f]* { cmples r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 } + 2908: [0-9a-f]* { cmples r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 } + 2910: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3 r25 } + 2918: [0-9a-f]* { cmples r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 } + 2920: [0-9a-f]* { cmples r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 } + 2928: [0-9a-f]* { cmples r15, r16, r17 ; cmplts r5, r6, r7 } + 2930: [0-9a-f]* { cmples r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 } + 2938: [0-9a-f]* { ctz r5, r6 ; cmples r15, r16, r17 ; prefetch_l3 r25 } + 2940: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; cmples r15, r16, r17 } + 2948: [0-9a-f]* { cmples r15, r16, r17 ; info 19 ; st4 r25, r26 } + 2950: [0-9a-f]* { cmples r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 } + 2958: [0-9a-f]* { cmples r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 } + 2960: [0-9a-f]* { cmples r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 } + 2968: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; ld1u r25, r26 } + 2970: [0-9a-f]* { cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 } + 2978: [0-9a-f]* { cmples r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 } + 2980: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; ld2u r25, r26 } + 2988: [0-9a-f]* { cmples r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 } + 2990: [0-9a-f]* { cmples r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 } + 2998: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; ld4u r25, r26 } + 29a0: [0-9a-f]* { tblidxb2 r5, r6 ; cmples r15, r16, r17 ; ld4u r25, r26 } + 29a8: [0-9a-f]* { cmples r15, r16, r17 ; move r5, r6 ; st2 r25, r26 } + 29b0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 } + 29b8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 } + 29c0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 } + 29c8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3 r25 } + 29d0: [0-9a-f]* { mulax r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + 29d8: [0-9a-f]* { cmples r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 } + 29e0: [0-9a-f]* { cmples r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 } + 29e8: [0-9a-f]* { pcnt r5, r6 ; cmples r15, r16, r17 } + 29f0: [0-9a-f]* { revbits r5, r6 ; cmples r15, r16, r17 ; prefetch r25 } + 29f8: [0-9a-f]* { cmples r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 } + 2a00: [0-9a-f]* { cmples r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 } + 2a08: [0-9a-f]* { mulx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + 2a10: [0-9a-f]* { cmples r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 } + 2a18: [0-9a-f]* { cmples r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 } + 2a20: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l2_fault r25 } + 2a28: [0-9a-f]* { cmples r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 } + 2a30: [0-9a-f]* { cmples r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 } + 2a38: [0-9a-f]* { cmples r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 } + 2a40: [0-9a-f]* { cmples r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } + 2a48: [0-9a-f]* { cmples r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 } + 2a50: [0-9a-f]* { cmples r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 } + 2a58: [0-9a-f]* { cmples r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 } + 2a60: [0-9a-f]* { cmples r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 } + 2a68: [0-9a-f]* { cmples r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + 2a70: [0-9a-f]* { cmples r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } + 2a78: [0-9a-f]* { cmples r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 } + 2a80: [0-9a-f]* { cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 } + 2a88: [0-9a-f]* { cmples r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 } + 2a90: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 } + 2a98: [0-9a-f]* { cmples r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 } + 2aa0: [0-9a-f]* { cmples r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 } + 2aa8: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; st4 r25, r26 } + 2ab0: [0-9a-f]* { tblidxb2 r5, r6 ; cmples r15, r16, r17 ; st4 r25, r26 } + 2ab8: [0-9a-f]* { cmples r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 } + 2ac0: [0-9a-f]* { tblidxb1 r5, r6 ; cmples r15, r16, r17 } + 2ac8: [0-9a-f]* { cmples r15, r16, r17 ; v1addi r5, r6, 5 } + 2ad0: [0-9a-f]* { cmples r15, r16, r17 ; v1shru r5, r6, r7 } + 2ad8: [0-9a-f]* { cmples r15, r16, r17 ; v2shlsc r5, r6, r7 } + 2ae0: [0-9a-f]* { cmples r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 } + 2ae8: [0-9a-f]* { cmples r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 } + 2af0: [0-9a-f]* { cmples r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 } + 2af8: [0-9a-f]* { cmples r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + 2b00: [0-9a-f]* { cmples r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 } + 2b08: [0-9a-f]* { cmples r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + 2b10: [0-9a-f]* { cmples r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + 2b18: [0-9a-f]* { cmples r5, r6, r7 ; fetchand r15, r16, r17 } + 2b20: [0-9a-f]* { cmples r5, r6, r7 ; ill ; prefetch_l3_fault r25 } + 2b28: [0-9a-f]* { cmples r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + 2b30: [0-9a-f]* { cmples r5, r6, r7 ; jr r15 ; st r25, r26 } + 2b38: [0-9a-f]* { cmples r5, r6, r7 ; ill ; ld r25, r26 } + 2b40: [0-9a-f]* { cmples r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 } + 2b48: [0-9a-f]* { cmples r5, r6, r7 ; ld1s_add r15, r16, 5 } + 2b50: [0-9a-f]* { cmples r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 } + 2b58: [0-9a-f]* { cmples r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 } + 2b60: [0-9a-f]* { cmples r5, r6, r7 ; jrp r15 ; ld2u r25, r26 } + 2b68: [0-9a-f]* { cmples r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 2b70: [0-9a-f]* { cmples r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 } + 2b78: [0-9a-f]* { cmples r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 } + 2b80: [0-9a-f]* { cmples r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + 2b88: [0-9a-f]* { cmples r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + 2b90: [0-9a-f]* { cmples r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + 2b98: [0-9a-f]* { cmples r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 } + 2ba0: [0-9a-f]* { cmples r5, r6, r7 ; jr r15 ; prefetch r25 } + 2ba8: [0-9a-f]* { cmples r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 2bb0: [0-9a-f]* { cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 2bb8: [0-9a-f]* { cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 } + 2bc0: [0-9a-f]* { cmples r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 } + 2bc8: [0-9a-f]* { cmples r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 } + 2bd0: [0-9a-f]* { cmples r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 } + 2bd8: [0-9a-f]* { cmples r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + 2be0: [0-9a-f]* { cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + 2be8: [0-9a-f]* { cmples r5, r6, r7 ; rotli r15, r16, 5 } + 2bf0: [0-9a-f]* { cmples r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + 2bf8: [0-9a-f]* { cmples r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 2c00: [0-9a-f]* { cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + 2c08: [0-9a-f]* { cmples r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + 2c10: [0-9a-f]* { cmples r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 } + 2c18: [0-9a-f]* { cmples r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 } + 2c20: [0-9a-f]* { cmples r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 } + 2c28: [0-9a-f]* { cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + 2c30: [0-9a-f]* { cmples r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 } + 2c38: [0-9a-f]* { cmples r5, r6, r7 ; jr r15 ; st4 r25, r26 } + 2c40: [0-9a-f]* { cmples r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 } + 2c48: [0-9a-f]* { cmples r5, r6, r7 ; v1cmpeq r15, r16, r17 } + 2c50: [0-9a-f]* { cmples r5, r6, r7 ; v2maxsi r15, r16, 5 } + 2c58: [0-9a-f]* { cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + 2c60: [0-9a-f]* { cmpleu r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 } + 2c68: [0-9a-f]* { cmpleu r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 } + 2c70: [0-9a-f]* { cmpleu r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 } + 2c78: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 } + 2c80: [0-9a-f]* { cmpleu r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 } + 2c88: [0-9a-f]* { cmpleu r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 } + 2c90: [0-9a-f]* { cmpleu r15, r16, r17 ; cmplts r5, r6, r7 } + 2c98: [0-9a-f]* { cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 } + 2ca0: [0-9a-f]* { ctz r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 } + 2ca8: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; cmpleu r15, r16, r17 } + 2cb0: [0-9a-f]* { cmpleu r15, r16, r17 ; info 19 ; st4 r25, r26 } + 2cb8: [0-9a-f]* { cmpleu r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 } + 2cc0: [0-9a-f]* { cmpleu r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 } + 2cc8: [0-9a-f]* { cmpleu r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 } + 2cd0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1u r25, r26 } + 2cd8: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2s r25, r26 } + 2ce0: [0-9a-f]* { cmpleu r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 } + 2ce8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 } + 2cf0: [0-9a-f]* { cmpleu r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 } + 2cf8: [0-9a-f]* { cmpleu r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 } + 2d00: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 } + 2d08: [0-9a-f]* { tblidxb2 r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 } + 2d10: [0-9a-f]* { cmpleu r15, r16, r17 ; move r5, r6 ; st2 r25, r26 } + 2d18: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; st4 r25, r26 } + 2d20: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 } + 2d28: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 } + 2d30: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 } + 2d38: [0-9a-f]* { mulax r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 } + 2d40: [0-9a-f]* { cmpleu r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 } + 2d48: [0-9a-f]* { cmpleu r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 } + 2d50: [0-9a-f]* { pcnt r5, r6 ; cmpleu r15, r16, r17 } + 2d58: [0-9a-f]* { revbits r5, r6 ; cmpleu r15, r16, r17 ; prefetch r25 } + 2d60: [0-9a-f]* { cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 } + 2d68: [0-9a-f]* { cmpleu r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 } + 2d70: [0-9a-f]* { mulx r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 } + 2d78: [0-9a-f]* { cmpleu r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 } + 2d80: [0-9a-f]* { cmpleu r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 } + 2d88: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 } + 2d90: [0-9a-f]* { cmpleu r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 } + 2d98: [0-9a-f]* { cmpleu r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 } + 2da0: [0-9a-f]* { cmpleu r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 } + 2da8: [0-9a-f]* { cmpleu r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } + 2db0: [0-9a-f]* { cmpleu r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 } + 2db8: [0-9a-f]* { cmpleu r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 } + 2dc0: [0-9a-f]* { cmpleu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 } + 2dc8: [0-9a-f]* { cmpleu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 } + 2dd0: [0-9a-f]* { cmpleu r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + 2dd8: [0-9a-f]* { cmpleu r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } + 2de0: [0-9a-f]* { cmpleu r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 } + 2de8: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 } + 2df0: [0-9a-f]* { cmpleu r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 } + 2df8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 } + 2e00: [0-9a-f]* { cmpleu r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 } + 2e08: [0-9a-f]* { cmpleu r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 } + 2e10: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 } + 2e18: [0-9a-f]* { tblidxb2 r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 } + 2e20: [0-9a-f]* { cmpleu r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 } + 2e28: [0-9a-f]* { tblidxb1 r5, r6 ; cmpleu r15, r16, r17 } + 2e30: [0-9a-f]* { cmpleu r15, r16, r17 ; v1addi r5, r6, 5 } + 2e38: [0-9a-f]* { cmpleu r15, r16, r17 ; v1shru r5, r6, r7 } + 2e40: [0-9a-f]* { cmpleu r15, r16, r17 ; v2shlsc r5, r6, r7 } + 2e48: [0-9a-f]* { cmpleu r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 } + 2e50: [0-9a-f]* { cmpleu r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 } + 2e58: [0-9a-f]* { cmpleu r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 } + 2e60: [0-9a-f]* { cmpleu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + 2e68: [0-9a-f]* { cmpleu r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 } + 2e70: [0-9a-f]* { cmpleu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + 2e78: [0-9a-f]* { cmpleu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + 2e80: [0-9a-f]* { cmpleu r5, r6, r7 ; fetchand r15, r16, r17 } + 2e88: [0-9a-f]* { cmpleu r5, r6, r7 ; ill ; prefetch_l3_fault r25 } + 2e90: [0-9a-f]* { cmpleu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + 2e98: [0-9a-f]* { cmpleu r5, r6, r7 ; jr r15 ; st r25, r26 } + 2ea0: [0-9a-f]* { cmpleu r5, r6, r7 ; ill ; ld r25, r26 } + 2ea8: [0-9a-f]* { cmpleu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 } + 2eb0: [0-9a-f]* { cmpleu r5, r6, r7 ; ld1s_add r15, r16, 5 } + 2eb8: [0-9a-f]* { cmpleu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 } + 2ec0: [0-9a-f]* { cmpleu r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 } + 2ec8: [0-9a-f]* { cmpleu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 } + 2ed0: [0-9a-f]* { cmpleu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 2ed8: [0-9a-f]* { cmpleu r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 } + 2ee0: [0-9a-f]* { cmpleu r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 } + 2ee8: [0-9a-f]* { cmpleu r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + 2ef0: [0-9a-f]* { cmpleu r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + 2ef8: [0-9a-f]* { cmpleu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + 2f00: [0-9a-f]* { cmpleu r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 } + 2f08: [0-9a-f]* { cmpleu r5, r6, r7 ; jr r15 ; prefetch r25 } + 2f10: [0-9a-f]* { cmpleu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 2f18: [0-9a-f]* { cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 2f20: [0-9a-f]* { cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 } + 2f28: [0-9a-f]* { cmpleu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 } + 2f30: [0-9a-f]* { cmpleu r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 } + 2f38: [0-9a-f]* { cmpleu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 } + 2f40: [0-9a-f]* { cmpleu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + 2f48: [0-9a-f]* { cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + 2f50: [0-9a-f]* { cmpleu r5, r6, r7 ; rotli r15, r16, 5 } + 2f58: [0-9a-f]* { cmpleu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + 2f60: [0-9a-f]* { cmpleu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 2f68: [0-9a-f]* { cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + 2f70: [0-9a-f]* { cmpleu r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + 2f78: [0-9a-f]* { cmpleu r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 } + 2f80: [0-9a-f]* { cmpleu r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 } + 2f88: [0-9a-f]* { cmpleu r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 } + 2f90: [0-9a-f]* { cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + 2f98: [0-9a-f]* { cmpleu r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 } + 2fa0: [0-9a-f]* { cmpleu r5, r6, r7 ; jr r15 ; st4 r25, r26 } + 2fa8: [0-9a-f]* { cmpleu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 } + 2fb0: [0-9a-f]* { cmpleu r5, r6, r7 ; v1cmpeq r15, r16, r17 } + 2fb8: [0-9a-f]* { cmpleu r5, r6, r7 ; v2maxsi r15, r16, 5 } + 2fc0: [0-9a-f]* { cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + 2fc8: [0-9a-f]* { cmplts r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 } + 2fd0: [0-9a-f]* { cmplts r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 } + 2fd8: [0-9a-f]* { cmplts r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 } + 2fe0: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l3 r25 } + 2fe8: [0-9a-f]* { cmplts r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 } + 2ff0: [0-9a-f]* { cmplts r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 } + 2ff8: [0-9a-f]* { cmplts r15, r16, r17 ; cmplts r5, r6, r7 } + 3000: [0-9a-f]* { cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 } + 3008: [0-9a-f]* { ctz r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 } + 3010: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; cmplts r15, r16, r17 } + 3018: [0-9a-f]* { cmplts r15, r16, r17 ; info 19 ; st4 r25, r26 } + 3020: [0-9a-f]* { cmplts r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 } + 3028: [0-9a-f]* { cmplts r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 } + 3030: [0-9a-f]* { cmplts r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 } + 3038: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 } + 3040: [0-9a-f]* { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; ld2s r25, r26 } + 3048: [0-9a-f]* { cmplts r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 } + 3050: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld2u r25, r26 } + 3058: [0-9a-f]* { cmplts r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 } + 3060: [0-9a-f]* { cmplts r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 } + 3068: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; ld4u r25, r26 } + 3070: [0-9a-f]* { tblidxb2 r5, r6 ; cmplts r15, r16, r17 ; ld4u r25, r26 } + 3078: [0-9a-f]* { cmplts r15, r16, r17 ; move r5, r6 ; st2 r25, r26 } + 3080: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 } + 3088: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 } + 3090: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 3098: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l3 r25 } + 30a0: [0-9a-f]* { mulax r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l3_fault r25 } + 30a8: [0-9a-f]* { cmplts r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 } + 30b0: [0-9a-f]* { cmplts r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 } + 30b8: [0-9a-f]* { pcnt r5, r6 ; cmplts r15, r16, r17 } + 30c0: [0-9a-f]* { revbits r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 } + 30c8: [0-9a-f]* { cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 } + 30d0: [0-9a-f]* { cmplts r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 } + 30d8: [0-9a-f]* { mulx r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 } + 30e0: [0-9a-f]* { cmplts r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 } + 30e8: [0-9a-f]* { cmplts r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 } + 30f0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + 30f8: [0-9a-f]* { cmplts r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 } + 3100: [0-9a-f]* { cmplts r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 } + 3108: [0-9a-f]* { cmplts r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 } + 3110: [0-9a-f]* { cmplts r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } + 3118: [0-9a-f]* { cmplts r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 } + 3120: [0-9a-f]* { cmplts r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 } + 3128: [0-9a-f]* { cmplts r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 } + 3130: [0-9a-f]* { cmplts r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 } + 3138: [0-9a-f]* { cmplts r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + 3140: [0-9a-f]* { cmplts r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } + 3148: [0-9a-f]* { cmplts r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 } + 3150: [0-9a-f]* { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 } + 3158: [0-9a-f]* { cmplts r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 } + 3160: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 3168: [0-9a-f]* { cmplts r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 } + 3170: [0-9a-f]* { cmplts r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 } + 3178: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; st4 r25, r26 } + 3180: [0-9a-f]* { tblidxb2 r5, r6 ; cmplts r15, r16, r17 ; st4 r25, r26 } + 3188: [0-9a-f]* { cmplts r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 } + 3190: [0-9a-f]* { tblidxb1 r5, r6 ; cmplts r15, r16, r17 } + 3198: [0-9a-f]* { cmplts r15, r16, r17 ; v1addi r5, r6, 5 } + 31a0: [0-9a-f]* { cmplts r15, r16, r17 ; v1shru r5, r6, r7 } + 31a8: [0-9a-f]* { cmplts r15, r16, r17 ; v2shlsc r5, r6, r7 } + 31b0: [0-9a-f]* { cmplts r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 } + 31b8: [0-9a-f]* { cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 } + 31c0: [0-9a-f]* { cmplts r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 } + 31c8: [0-9a-f]* { cmplts r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + 31d0: [0-9a-f]* { cmplts r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 } + 31d8: [0-9a-f]* { cmplts r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + 31e0: [0-9a-f]* { cmplts r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + 31e8: [0-9a-f]* { cmplts r5, r6, r7 ; fetchand r15, r16, r17 } + 31f0: [0-9a-f]* { cmplts r5, r6, r7 ; ill ; prefetch_l3_fault r25 } + 31f8: [0-9a-f]* { cmplts r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + 3200: [0-9a-f]* { cmplts r5, r6, r7 ; jr r15 ; st r25, r26 } + 3208: [0-9a-f]* { cmplts r5, r6, r7 ; ill ; ld r25, r26 } + 3210: [0-9a-f]* { cmplts r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 } + 3218: [0-9a-f]* { cmplts r5, r6, r7 ; ld1s_add r15, r16, 5 } + 3220: [0-9a-f]* { cmplts r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 } + 3228: [0-9a-f]* { cmplts r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 } + 3230: [0-9a-f]* { cmplts r5, r6, r7 ; jrp r15 ; ld2u r25, r26 } + 3238: [0-9a-f]* { cmplts r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 3240: [0-9a-f]* { cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 } + 3248: [0-9a-f]* { cmplts r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 } + 3250: [0-9a-f]* { cmplts r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + 3258: [0-9a-f]* { cmplts r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + 3260: [0-9a-f]* { cmplts r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + 3268: [0-9a-f]* { cmplts r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 } + 3270: [0-9a-f]* { cmplts r5, r6, r7 ; jr r15 ; prefetch r25 } + 3278: [0-9a-f]* { cmplts r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 3280: [0-9a-f]* { cmplts r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 3288: [0-9a-f]* { cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 } + 3290: [0-9a-f]* { cmplts r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 } + 3298: [0-9a-f]* { cmplts r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 } + 32a0: [0-9a-f]* { cmplts r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 } + 32a8: [0-9a-f]* { cmplts r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + 32b0: [0-9a-f]* { cmplts r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + 32b8: [0-9a-f]* { cmplts r5, r6, r7 ; rotli r15, r16, 5 } + 32c0: [0-9a-f]* { cmplts r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + 32c8: [0-9a-f]* { cmplts r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 32d0: [0-9a-f]* { cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + 32d8: [0-9a-f]* { cmplts r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + 32e0: [0-9a-f]* { cmplts r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 } + 32e8: [0-9a-f]* { cmplts r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 } + 32f0: [0-9a-f]* { cmplts r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 } + 32f8: [0-9a-f]* { cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + 3300: [0-9a-f]* { cmplts r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 } + 3308: [0-9a-f]* { cmplts r5, r6, r7 ; jr r15 ; st4 r25, r26 } + 3310: [0-9a-f]* { cmplts r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 } + 3318: [0-9a-f]* { cmplts r5, r6, r7 ; v1cmpeq r15, r16, r17 } + 3320: [0-9a-f]* { cmplts r5, r6, r7 ; v2maxsi r15, r16, 5 } + 3328: [0-9a-f]* { cmplts r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + 3330: [0-9a-f]* { cmpltsi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3 r25 } + 3338: [0-9a-f]* { cmpltsi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 } + 3340: [0-9a-f]* { cmpltsi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l3_fault r25 } + 3348: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } + 3350: [0-9a-f]* { cmpltsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st r25, r26 } + 3358: [0-9a-f]* { cmpltsi r15, r16, 5 ; cmples r5, r6, r7 ; st2 r25, r26 } + 3360: [0-9a-f]* { cmpltsi r15, r16, 5 ; cmplts r5, r6, r7 } + 3368: [0-9a-f]* { cmpltsi r15, r16, 5 ; cmpne r5, r6, r7 ; ld r25, r26 } + 3370: [0-9a-f]* { ctz r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } + 3378: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; cmpltsi r15, r16, 5 } + 3380: [0-9a-f]* { cmpltsi r15, r16, 5 ; info 19 ; st4 r25, r26 } + 3388: [0-9a-f]* { cmpltsi r15, r16, 5 ; or r5, r6, r7 ; ld r25, r26 } + 3390: [0-9a-f]* { cmpltsi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 } + 3398: [0-9a-f]* { cmpltsi r15, r16, 5 ; shrui r5, r6, 5 ; ld1s r25, r26 } + 33a0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1u r25, r26 } + 33a8: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2s r25, r26 } + 33b0: [0-9a-f]* { cmpltsi r15, r16, 5 ; shl3add r5, r6, r7 ; ld2s r25, r26 } + 33b8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 } + 33c0: [0-9a-f]* { cmpltsi r15, r16, 5 ; addx r5, r6, r7 ; ld4s r25, r26 } + 33c8: [0-9a-f]* { cmpltsi r15, r16, 5 ; rotli r5, r6, 5 ; ld4s r25, r26 } + 33d0: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 } + 33d8: [0-9a-f]* { tblidxb2 r5, r6 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 } + 33e0: [0-9a-f]* { cmpltsi r15, r16, 5 ; move r5, r6 ; st2 r25, r26 } + 33e8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + 33f0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; st r25, r26 } + 33f8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; st1 r25, r26 } + 3400: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } + 3408: [0-9a-f]* { mulax r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 } + 3410: [0-9a-f]* { cmpltsi r15, r16, 5 ; mz r5, r6, r7 ; st1 r25, r26 } + 3418: [0-9a-f]* { cmpltsi r15, r16, 5 ; nor r5, r6, r7 ; st4 r25, r26 } + 3420: [0-9a-f]* { pcnt r5, r6 ; cmpltsi r15, r16, 5 } + 3428: [0-9a-f]* { revbits r5, r6 ; cmpltsi r15, r16, 5 ; prefetch r25 } + 3430: [0-9a-f]* { cmpltsi r15, r16, 5 ; cmpne r5, r6, r7 ; prefetch r25 } + 3438: [0-9a-f]* { cmpltsi r15, r16, 5 ; subx r5, r6, r7 ; prefetch r25 } + 3440: [0-9a-f]* { mulx r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l1_fault r25 } + 3448: [0-9a-f]* { cmpltsi r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 } + 3450: [0-9a-f]* { cmpltsi r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l2 r25 } + 3458: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 } + 3460: [0-9a-f]* { cmpltsi r15, r16, 5 ; and r5, r6, r7 ; prefetch_l3 r25 } + 3468: [0-9a-f]* { cmpltsi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l3 r25 } + 3470: [0-9a-f]* { cmpltsi r15, r16, 5 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 } + 3478: [0-9a-f]* { cmpltsi r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } + 3480: [0-9a-f]* { cmpltsi r15, r16, 5 ; rotl r5, r6, r7 ; ld r25, r26 } + 3488: [0-9a-f]* { cmpltsi r15, r16, 5 ; shl r5, r6, r7 ; ld1u r25, r26 } + 3490: [0-9a-f]* { cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2s r25, r26 } + 3498: [0-9a-f]* { cmpltsi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4s r25, r26 } + 34a0: [0-9a-f]* { cmpltsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 } + 34a8: [0-9a-f]* { cmpltsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 } + 34b0: [0-9a-f]* { cmpltsi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l1_fault r25 } + 34b8: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpltsi r15, r16, 5 ; st r25, r26 } + 34c0: [0-9a-f]* { cmpltsi r15, r16, 5 ; shl3add r5, r6, r7 ; st r25, r26 } + 34c8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; st1 r25, r26 } + 34d0: [0-9a-f]* { cmpltsi r15, r16, 5 ; addx r5, r6, r7 ; st2 r25, r26 } + 34d8: [0-9a-f]* { cmpltsi r15, r16, 5 ; rotli r5, r6, 5 ; st2 r25, r26 } + 34e0: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + 34e8: [0-9a-f]* { tblidxb2 r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + 34f0: [0-9a-f]* { cmpltsi r15, r16, 5 ; subx r5, r6, r7 ; st4 r25, r26 } + 34f8: [0-9a-f]* { tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 } + 3500: [0-9a-f]* { cmpltsi r15, r16, 5 ; v1addi r5, r6, 5 } + 3508: [0-9a-f]* { cmpltsi r15, r16, 5 ; v1shru r5, r6, r7 } + 3510: [0-9a-f]* { cmpltsi r15, r16, 5 ; v2shlsc r5, r6, r7 } + 3518: [0-9a-f]* { cmpltsi r5, r6, 5 ; add r15, r16, r17 ; ld1u r25, r26 } + 3520: [0-9a-f]* { cmpltsi r5, r6, 5 ; addx r15, r16, r17 ; ld2s r25, r26 } + 3528: [0-9a-f]* { cmpltsi r5, r6, 5 ; and r15, r16, r17 ; ld2s r25, r26 } + 3530: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + 3538: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmples r15, r16, r17 ; ld4s r25, r26 } + 3540: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 } + 3548: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + 3550: [0-9a-f]* { cmpltsi r5, r6, 5 ; fetchand r15, r16, r17 } + 3558: [0-9a-f]* { cmpltsi r5, r6, 5 ; ill ; prefetch_l3_fault r25 } + 3560: [0-9a-f]* { cmpltsi r5, r6, 5 ; jalr r15 ; prefetch_l3 r25 } + 3568: [0-9a-f]* { cmpltsi r5, r6, 5 ; jr r15 ; st r25, r26 } + 3570: [0-9a-f]* { cmpltsi r5, r6, 5 ; ill ; ld r25, r26 } + 3578: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 } + 3580: [0-9a-f]* { cmpltsi r5, r6, 5 ; ld1s_add r15, r16, 5 } + 3588: [0-9a-f]* { cmpltsi r5, r6, 5 ; shli r15, r16, 5 ; ld1u r25, r26 } + 3590: [0-9a-f]* { cmpltsi r5, r6, 5 ; rotl r15, r16, r17 ; ld2s r25, r26 } + 3598: [0-9a-f]* { cmpltsi r5, r6, 5 ; jrp r15 ; ld2u r25, r26 } + 35a0: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 35a8: [0-9a-f]* { cmpltsi r5, r6, 5 ; addx r15, r16, r17 ; ld4u r25, r26 } + 35b0: [0-9a-f]* { cmpltsi r5, r6, 5 ; shrui r15, r16, 5 ; ld4u r25, r26 } + 35b8: [0-9a-f]* { cmpltsi r5, r6, 5 ; lnk r15 ; st4 r25, r26 } + 35c0: [0-9a-f]* { cmpltsi r5, r6, 5 ; move r15, r16 ; st4 r25, r26 } + 35c8: [0-9a-f]* { cmpltsi r5, r6, 5 ; mz r15, r16, r17 ; st4 r25, r26 } + 35d0: [0-9a-f]* { cmpltsi r5, r6, 5 ; or r15, r16, r17 ; ld r25, r26 } + 35d8: [0-9a-f]* { cmpltsi r5, r6, 5 ; jr r15 ; prefetch r25 } + 35e0: [0-9a-f]* { cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; prefetch r25 } + 35e8: [0-9a-f]* { cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch r25 } + 35f0: [0-9a-f]* { cmpltsi r5, r6, 5 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 } + 35f8: [0-9a-f]* { cmpltsi r5, r6, 5 ; rotl r15, r16, r17 ; prefetch_l2 r25 } + 3600: [0-9a-f]* { cmpltsi r5, r6, 5 ; lnk r15 ; prefetch_l2_fault r25 } + 3608: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmpne r15, r16, r17 ; prefetch_l3 r25 } + 3610: [0-9a-f]* { cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + 3618: [0-9a-f]* { cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + 3620: [0-9a-f]* { cmpltsi r5, r6, 5 ; rotli r15, r16, 5 } + 3628: [0-9a-f]* { cmpltsi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld r25, r26 } + 3630: [0-9a-f]* { cmpltsi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 3638: [0-9a-f]* { cmpltsi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + 3640: [0-9a-f]* { cmpltsi r5, r6, 5 ; shrs r15, r16, r17 ; ld2u r25, r26 } + 3648: [0-9a-f]* { cmpltsi r5, r6, 5 ; shru r15, r16, r17 ; ld4u r25, r26 } + 3650: [0-9a-f]* { cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; st r25, r26 } + 3658: [0-9a-f]* { cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; st r25, r26 } + 3660: [0-9a-f]* { cmpltsi r5, r6, 5 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + 3668: [0-9a-f]* { cmpltsi r5, r6, 5 ; or r15, r16, r17 ; st2 r25, r26 } + 3670: [0-9a-f]* { cmpltsi r5, r6, 5 ; jr r15 ; st4 r25, r26 } + 3678: [0-9a-f]* { cmpltsi r5, r6, 5 ; sub r15, r16, r17 ; ld1u r25, r26 } + 3680: [0-9a-f]* { cmpltsi r5, r6, 5 ; v1cmpeq r15, r16, r17 } + 3688: [0-9a-f]* { cmpltsi r5, r6, 5 ; v2maxsi r15, r16, 5 } + 3690: [0-9a-f]* { cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + 3698: [0-9a-f]* { cmpltu r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 } + 36a0: [0-9a-f]* { cmpltu r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 } + 36a8: [0-9a-f]* { cmpltu r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 } + 36b0: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + 36b8: [0-9a-f]* { cmpltu r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 } + 36c0: [0-9a-f]* { cmpltu r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 } + 36c8: [0-9a-f]* { cmpltu r15, r16, r17 ; cmplts r5, r6, r7 } + 36d0: [0-9a-f]* { cmpltu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 } + 36d8: [0-9a-f]* { ctz r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + 36e0: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; cmpltu r15, r16, r17 } + 36e8: [0-9a-f]* { cmpltu r15, r16, r17 ; info 19 ; st4 r25, r26 } + 36f0: [0-9a-f]* { cmpltu r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 } + 36f8: [0-9a-f]* { cmpltu r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 } + 3700: [0-9a-f]* { cmpltu r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 } + 3708: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + 3710: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2s r25, r26 } + 3718: [0-9a-f]* { cmpltu r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 } + 3720: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2u r25, r26 } + 3728: [0-9a-f]* { cmpltu r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 } + 3730: [0-9a-f]* { cmpltu r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 } + 3738: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 } + 3740: [0-9a-f]* { tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 } + 3748: [0-9a-f]* { cmpltu r15, r16, r17 ; move r5, r6 ; st2 r25, r26 } + 3750: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + 3758: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; st r25, r26 } + 3760: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; st1 r25, r26 } + 3768: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + 3770: [0-9a-f]* { mulax r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 } + 3778: [0-9a-f]* { cmpltu r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 } + 3780: [0-9a-f]* { cmpltu r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 } + 3788: [0-9a-f]* { pcnt r5, r6 ; cmpltu r15, r16, r17 } + 3790: [0-9a-f]* { revbits r5, r6 ; cmpltu r15, r16, r17 ; prefetch r25 } + 3798: [0-9a-f]* { cmpltu r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 } + 37a0: [0-9a-f]* { cmpltu r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 } + 37a8: [0-9a-f]* { mulx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + 37b0: [0-9a-f]* { cmpltu r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 } + 37b8: [0-9a-f]* { cmpltu r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 } + 37c0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 } + 37c8: [0-9a-f]* { cmpltu r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 } + 37d0: [0-9a-f]* { cmpltu r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 } + 37d8: [0-9a-f]* { cmpltu r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 } + 37e0: [0-9a-f]* { cmpltu r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } + 37e8: [0-9a-f]* { cmpltu r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 } + 37f0: [0-9a-f]* { cmpltu r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 } + 37f8: [0-9a-f]* { cmpltu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 } + 3800: [0-9a-f]* { cmpltu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 } + 3808: [0-9a-f]* { cmpltu r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + 3810: [0-9a-f]* { cmpltu r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } + 3818: [0-9a-f]* { cmpltu r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 } + 3820: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; st r25, r26 } + 3828: [0-9a-f]* { cmpltu r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 } + 3830: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; st1 r25, r26 } + 3838: [0-9a-f]* { cmpltu r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 } + 3840: [0-9a-f]* { cmpltu r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 } + 3848: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + 3850: [0-9a-f]* { tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + 3858: [0-9a-f]* { cmpltu r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 } + 3860: [0-9a-f]* { tblidxb1 r5, r6 ; cmpltu r15, r16, r17 } + 3868: [0-9a-f]* { cmpltu r15, r16, r17 ; v1addi r5, r6, 5 } + 3870: [0-9a-f]* { cmpltu r15, r16, r17 ; v1shru r5, r6, r7 } + 3878: [0-9a-f]* { cmpltu r15, r16, r17 ; v2shlsc r5, r6, r7 } + 3880: [0-9a-f]* { cmpltu r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 } + 3888: [0-9a-f]* { cmpltu r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 } + 3890: [0-9a-f]* { cmpltu r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 } + 3898: [0-9a-f]* { cmpltu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + 38a0: [0-9a-f]* { cmpltu r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 } + 38a8: [0-9a-f]* { cmpltu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + 38b0: [0-9a-f]* { cmpltu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + 38b8: [0-9a-f]* { cmpltu r5, r6, r7 ; fetchand r15, r16, r17 } + 38c0: [0-9a-f]* { cmpltu r5, r6, r7 ; ill ; prefetch_l3_fault r25 } + 38c8: [0-9a-f]* { cmpltu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + 38d0: [0-9a-f]* { cmpltu r5, r6, r7 ; jr r15 ; st r25, r26 } + 38d8: [0-9a-f]* { cmpltu r5, r6, r7 ; ill ; ld r25, r26 } + 38e0: [0-9a-f]* { cmpltu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 } + 38e8: [0-9a-f]* { cmpltu r5, r6, r7 ; ld1s_add r15, r16, 5 } + 38f0: [0-9a-f]* { cmpltu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 } + 38f8: [0-9a-f]* { cmpltu r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 } + 3900: [0-9a-f]* { cmpltu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 } + 3908: [0-9a-f]* { cmpltu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 3910: [0-9a-f]* { cmpltu r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 } + 3918: [0-9a-f]* { cmpltu r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 } + 3920: [0-9a-f]* { cmpltu r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + 3928: [0-9a-f]* { cmpltu r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + 3930: [0-9a-f]* { cmpltu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + 3938: [0-9a-f]* { cmpltu r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 } + 3940: [0-9a-f]* { cmpltu r5, r6, r7 ; jr r15 ; prefetch r25 } + 3948: [0-9a-f]* { cmpltu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 3950: [0-9a-f]* { cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 3958: [0-9a-f]* { cmpltu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 } + 3960: [0-9a-f]* { cmpltu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 } + 3968: [0-9a-f]* { cmpltu r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 } + 3970: [0-9a-f]* { cmpltu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 } + 3978: [0-9a-f]* { cmpltu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + 3980: [0-9a-f]* { cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + 3988: [0-9a-f]* { cmpltu r5, r6, r7 ; rotli r15, r16, 5 } + 3990: [0-9a-f]* { cmpltu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + 3998: [0-9a-f]* { cmpltu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 39a0: [0-9a-f]* { cmpltu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + 39a8: [0-9a-f]* { cmpltu r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + 39b0: [0-9a-f]* { cmpltu r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 } + 39b8: [0-9a-f]* { cmpltu r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 } + 39c0: [0-9a-f]* { cmpltu r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 } + 39c8: [0-9a-f]* { cmpltu r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + 39d0: [0-9a-f]* { cmpltu r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 } + 39d8: [0-9a-f]* { cmpltu r5, r6, r7 ; jr r15 ; st4 r25, r26 } + 39e0: [0-9a-f]* { cmpltu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 } + 39e8: [0-9a-f]* { cmpltu r5, r6, r7 ; v1cmpeq r15, r16, r17 } + 39f0: [0-9a-f]* { cmpltu r5, r6, r7 ; v2maxsi r15, r16, 5 } + 39f8: [0-9a-f]* { cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + 3a00: [0-9a-f]* { crc32_32 r5, r6, r7 ; cmpltui r15, r16, 5 } + 3a08: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpltui r15, r16, 5 } + 3a10: [0-9a-f]* { cmpltui r15, r16, 5 ; sub r5, r6, r7 } + 3a18: [0-9a-f]* { v1mulus r5, r6, r7 ; cmpltui r15, r16, 5 } + 3a20: [0-9a-f]* { cmpltui r15, r16, 5 ; v2packl r5, r6, r7 } + 3a28: [0-9a-f]* { cmpltui r5, r6, 5 ; cmpexch4 r15, r16, r17 } + 3a30: [0-9a-f]* { cmpltui r5, r6, 5 ; ld1u_add r15, r16, 5 } + 3a38: [0-9a-f]* { cmpltui r5, r6, 5 ; prefetch_add_l1 r15, 5 } + 3a40: [0-9a-f]* { cmpltui r5, r6, 5 ; stnt r15, r16 } + 3a48: [0-9a-f]* { cmpltui r5, r6, 5 ; v2addi r15, r16, 5 } + 3a50: [0-9a-f]* { cmpltui r5, r6, 5 ; v4sub r15, r16, r17 } + 3a58: [0-9a-f]* { cmpne r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 } + 3a60: [0-9a-f]* { cmpne r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 } + 3a68: [0-9a-f]* { cmpne r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 } + 3a70: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpne r15, r16, r17 ; st2 r25, r26 } + 3a78: [0-9a-f]* { cmpne r15, r16, r17 ; cmpeq r5, r6, r7 } + 3a80: [0-9a-f]* { cmpne r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 } + 3a88: [0-9a-f]* { cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 } + 3a90: [0-9a-f]* { cmpne r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 } + 3a98: [0-9a-f]* { ctz r5, r6 ; cmpne r15, r16, r17 ; st2 r25, r26 } + 3aa0: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpne r15, r16, r17 ; ld1u r25, r26 } + 3aa8: [0-9a-f]* { cmpne r15, r16, r17 ; addi r5, r6, 5 ; ld r25, r26 } + 3ab0: [0-9a-f]* { cmpne r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 } + 3ab8: [0-9a-f]* { cmpne r15, r16, r17 ; ld1s r25, r26 } + 3ac0: [0-9a-f]* { tblidxb1 r5, r6 ; cmpne r15, r16, r17 ; ld1s r25, r26 } + 3ac8: [0-9a-f]* { cmpne r15, r16, r17 ; nop ; ld1u r25, r26 } + 3ad0: [0-9a-f]* { cmpne r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 } + 3ad8: [0-9a-f]* { cmpne r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 } + 3ae0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 } + 3ae8: [0-9a-f]* { clz r5, r6 ; cmpne r15, r16, r17 ; ld4s r25, r26 } + 3af0: [0-9a-f]* { cmpne r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 } + 3af8: [0-9a-f]* { cmpne r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 } + 3b00: [0-9a-f]* { mm r5, r6, 5, 7 ; cmpne r15, r16, r17 } + 3b08: [0-9a-f]* { cmpne r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 } + 3b10: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; cmpne r15, r16, r17 } + 3b18: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 } + 3b20: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; cmpne r15, r16, r17 } + 3b28: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; st2 r25, r26 } + 3b30: [0-9a-f]* { mulax r5, r6, r7 ; cmpne r15, r16, r17 ; st4 r25, r26 } + 3b38: [0-9a-f]* { cmpne r15, r16, r17 ; nop ; ld r25, r26 } + 3b40: [0-9a-f]* { cmpne r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 } + 3b48: [0-9a-f]* { cmpne r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 } + 3b50: [0-9a-f]* { cmpne r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 } + 3b58: [0-9a-f]* { cmpne r15, r16, r17 ; info 19 ; prefetch r25 } + 3b60: [0-9a-f]* { tblidxb3 r5, r6 ; cmpne r15, r16, r17 ; prefetch r25 } + 3b68: [0-9a-f]* { cmpne r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 } + 3b70: [0-9a-f]* { cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 } + 3b78: [0-9a-f]* { cmpne r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2 r25 } + 3b80: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2_fault r25 } + 3b88: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 } + 3b90: [0-9a-f]* { cmpne r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 } + 3b98: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 } + 3ba0: [0-9a-f]* { revbits r5, r6 ; cmpne r15, r16, r17 ; ld1u r25, r26 } + 3ba8: [0-9a-f]* { cmpne r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 } + 3bb0: [0-9a-f]* { cmpne r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 } + 3bb8: [0-9a-f]* { cmpne r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 } + 3bc0: [0-9a-f]* { cmpne r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 } + 3bc8: [0-9a-f]* { cmpne r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 } + 3bd0: [0-9a-f]* { cmpne r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 } + 3bd8: [0-9a-f]* { cmpne r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 } + 3be0: [0-9a-f]* { cmpne r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 } + 3be8: [0-9a-f]* { cmpne r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 } + 3bf0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; st1 r25, r26 } + 3bf8: [0-9a-f]* { clz r5, r6 ; cmpne r15, r16, r17 ; st2 r25, r26 } + 3c00: [0-9a-f]* { cmpne r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 } + 3c08: [0-9a-f]* { cmpne r15, r16, r17 ; movei r5, 5 ; st4 r25, r26 } + 3c10: [0-9a-f]* { cmpne r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 } + 3c18: [0-9a-f]* { tblidxb0 r5, r6 ; cmpne r15, r16, r17 ; ld1s r25, r26 } + 3c20: [0-9a-f]* { tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; ld2s r25, r26 } + 3c28: [0-9a-f]* { cmpne r15, r16, r17 ; v1cmpeq r5, r6, r7 } + 3c30: [0-9a-f]* { cmpne r15, r16, r17 ; v2add r5, r6, r7 } + 3c38: [0-9a-f]* { cmpne r15, r16, r17 ; v2shrui r5, r6, 5 } + 3c40: [0-9a-f]* { cmpne r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + 3c48: [0-9a-f]* { cmpne r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + 3c50: [0-9a-f]* { cmpne r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + 3c58: [0-9a-f]* { cmpne r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + 3c60: [0-9a-f]* { cmpne r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + 3c68: [0-9a-f]* { cmpne r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + 3c70: [0-9a-f]* { cmpne r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 } + 3c78: [0-9a-f]* { cmpne r5, r6, r7 ; finv r15 } + 3c80: [0-9a-f]* { cmpne r5, r6, r7 ; ill ; st4 r25, r26 } + 3c88: [0-9a-f]* { cmpne r5, r6, r7 ; jalr r15 ; st2 r25, r26 } + 3c90: [0-9a-f]* { cmpne r5, r6, r7 ; jr r15 } + 3c98: [0-9a-f]* { cmpne r5, r6, r7 ; jr r15 ; ld r25, r26 } + 3ca0: [0-9a-f]* { cmpne r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 } + 3ca8: [0-9a-f]* { cmpne r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 } + 3cb0: [0-9a-f]* { cmpne r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 } + 3cb8: [0-9a-f]* { cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + 3cc0: [0-9a-f]* { cmpne r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 } + 3cc8: [0-9a-f]* { cmpne r5, r6, r7 ; ill ; ld4s r25, r26 } + 3cd0: [0-9a-f]* { cmpne r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + 3cd8: [0-9a-f]* { cmpne r5, r6, r7 ; ld4u r25, r26 } + 3ce0: [0-9a-f]* { cmpne r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + 3ce8: [0-9a-f]* { cmpne r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 } + 3cf0: [0-9a-f]* { cmpne r5, r6, r7 ; nop ; ld1u r25, r26 } + 3cf8: [0-9a-f]* { cmpne r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 } + 3d00: [0-9a-f]* { cmpne r5, r6, r7 ; move r15, r16 ; prefetch r25 } + 3d08: [0-9a-f]* { cmpne r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 } + 3d10: [0-9a-f]* { cmpne r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } + 3d18: [0-9a-f]* { cmpne r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + 3d20: [0-9a-f]* { cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 } + 3d28: [0-9a-f]* { cmpne r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 } + 3d30: [0-9a-f]* { cmpne r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + 3d38: [0-9a-f]* { cmpne r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 } + 3d40: [0-9a-f]* { cmpne r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 } + 3d48: [0-9a-f]* { cmpne r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 } + 3d50: [0-9a-f]* { cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 } + 3d58: [0-9a-f]* { cmpne r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + 3d60: [0-9a-f]* { cmpne r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } + 3d68: [0-9a-f]* { cmpne r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 } + 3d70: [0-9a-f]* { cmpne r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 } + 3d78: [0-9a-f]* { cmpne r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 } + 3d80: [0-9a-f]* { cmpne r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 } + 3d88: [0-9a-f]* { cmpne r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 } + 3d90: [0-9a-f]* { cmpne r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 } + 3d98: [0-9a-f]* { cmpne r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + 3da0: [0-9a-f]* { cmpne r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + 3da8: [0-9a-f]* { cmpne r5, r6, r7 ; v1cmplts r15, r16, r17 } + 3db0: [0-9a-f]* { cmpne r5, r6, r7 ; v2mz r15, r16, r17 } + 3db8: [0-9a-f]* { cmpne r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 } + 3dc0: [0-9a-f]* { cmul r5, r6, r7 ; flush r15 } + 3dc8: [0-9a-f]* { cmul r5, r6, r7 ; ldnt4u r15, r16 } + 3dd0: [0-9a-f]* { cmul r5, r6, r7 ; shli r15, r16, 5 } + 3dd8: [0-9a-f]* { cmul r5, r6, r7 ; v1int_h r15, r16, r17 } + 3de0: [0-9a-f]* { cmul r5, r6, r7 ; v2shli r15, r16, 5 } + 3de8: [0-9a-f]* { cmula r5, r6, r7 ; cmpltui r15, r16, 5 } + 3df0: [0-9a-f]* { cmula r5, r6, r7 ; ld4s_add r15, r16, 5 } + 3df8: [0-9a-f]* { cmula r5, r6, r7 ; prefetch r15 } + 3e00: [0-9a-f]* { cmula r5, r6, r7 ; stnt4_add r15, r16, 5 } + 3e08: [0-9a-f]* { cmula r5, r6, r7 ; v2cmplts r15, r16, r17 } + 3e10: [0-9a-f]* { cmulaf r5, r6, r7 ; addi r15, r16, 5 } + 3e18: [0-9a-f]* { cmulaf r5, r6, r7 ; infol 4660 } + 3e20: [0-9a-f]* { cmulaf r5, r6, r7 ; mnz r15, r16, r17 } + 3e28: [0-9a-f]* { cmulaf r5, r6, r7 ; shrui r15, r16, 5 } + 3e30: [0-9a-f]* { cmulaf r5, r6, r7 ; v1mnz r15, r16, r17 } + 3e38: [0-9a-f]* { cmulaf r5, r6, r7 ; v2sub r15, r16, r17 } + 3e40: [0-9a-f]* { cmulf r5, r6, r7 ; exch r15, r16, r17 } + 3e48: [0-9a-f]* { cmulf r5, r6, r7 ; ldnt r15, r16 } + 3e50: [0-9a-f]* { cmulf r5, r6, r7 ; raise } + 3e58: [0-9a-f]* { cmulf r5, r6, r7 ; v1addi r15, r16, 5 } + 3e60: [0-9a-f]* { cmulf r5, r6, r7 ; v2int_l r15, r16, r17 } + 3e68: [0-9a-f]* { cmulfr r5, r6, r7 ; and r15, r16, r17 } + 3e70: [0-9a-f]* { cmulfr r5, r6, r7 ; jrp r15 } + 3e78: [0-9a-f]* { cmulfr r5, r6, r7 ; nop } + 3e80: [0-9a-f]* { cmulfr r5, r6, r7 ; st2 r15, r16 } + 3e88: [0-9a-f]* { cmulfr r5, r6, r7 ; v1shru r15, r16, r17 } + 3e90: [0-9a-f]* { cmulfr r5, r6, r7 ; v4packsc r15, r16, r17 } + 3e98: [0-9a-f]* { cmulh r5, r6, r7 ; fetchand r15, r16, r17 } + 3ea0: [0-9a-f]* { cmulh r5, r6, r7 ; ldnt2s_add r15, r16, 5 } + 3ea8: [0-9a-f]* { cmulh r5, r6, r7 ; shl1addx r15, r16, r17 } + 3eb0: [0-9a-f]* { cmulh r5, r6, r7 ; v1cmplts r15, r16, r17 } + 3eb8: [0-9a-f]* { cmulh r5, r6, r7 ; v2mz r15, r16, r17 } + 3ec0: [0-9a-f]* { cmulhr r5, r6, r7 ; cmples r15, r16, r17 } + 3ec8: [0-9a-f]* { cmulhr r5, r6, r7 ; ld2s r15, r16 } + 3ed0: [0-9a-f]* { cmulhr r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + 3ed8: [0-9a-f]* { cmulhr r5, r6, r7 ; stnt1 r15, r16 } + 3ee0: [0-9a-f]* { cmulhr r5, r6, r7 ; v2addsc r15, r16, r17 } + 3ee8: [0-9a-f]* { cmulhr r5, r6, r7 ; v4subsc r15, r16, r17 } + 3ef0: [0-9a-f]* { crc32_32 r5, r6, r7 ; flushwb } + 3ef8: [0-9a-f]* { crc32_32 r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + 3f00: [0-9a-f]* { crc32_32 r5, r6, r7 ; shlx r15, r16, r17 } + 3f08: [0-9a-f]* { crc32_32 r5, r6, r7 ; v1int_l r15, r16, r17 } + 3f10: [0-9a-f]* { crc32_32 r5, r6, r7 ; v2shlsc r15, r16, r17 } + 3f18: [0-9a-f]* { crc32_8 r5, r6, r7 ; cmpne r15, r16, r17 } + 3f20: [0-9a-f]* { crc32_8 r5, r6, r7 ; ld4u r15, r16 } + 3f28: [0-9a-f]* { crc32_8 r5, r6, r7 ; prefetch_l1_fault r15 } + 3f30: [0-9a-f]* { crc32_8 r5, r6, r7 ; stnt_add r15, r16, 5 } + 3f38: [0-9a-f]* { crc32_8 r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + 3f40: [0-9a-f]* { ctz r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 } + 3f48: [0-9a-f]* { ctz r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 } + 3f50: [0-9a-f]* { ctz r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 } + 3f58: [0-9a-f]* { ctz r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + 3f60: [0-9a-f]* { ctz r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 } + 3f68: [0-9a-f]* { ctz r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 } + 3f70: [0-9a-f]* { ctz r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + 3f78: [0-9a-f]* { ctz r5, r6 ; fetchand r15, r16, r17 } + 3f80: [0-9a-f]* { ctz r5, r6 ; ill ; prefetch_l3_fault r25 } + 3f88: [0-9a-f]* { ctz r5, r6 ; jalr r15 ; prefetch_l3 r25 } + 3f90: [0-9a-f]* { ctz r5, r6 ; jr r15 ; st r25, r26 } + 3f98: [0-9a-f]* { ctz r5, r6 ; ill ; ld r25, r26 } + 3fa0: [0-9a-f]* { ctz r5, r6 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 } + 3fa8: [0-9a-f]* { ctz r5, r6 ; ld1s_add r15, r16, 5 } + 3fb0: [0-9a-f]* { ctz r5, r6 ; shli r15, r16, 5 ; ld1u r25, r26 } + 3fb8: [0-9a-f]* { ctz r5, r6 ; rotl r15, r16, r17 ; ld2s r25, r26 } + 3fc0: [0-9a-f]* { ctz r5, r6 ; jrp r15 ; ld2u r25, r26 } + 3fc8: [0-9a-f]* { ctz r5, r6 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 3fd0: [0-9a-f]* { ctz r5, r6 ; addx r15, r16, r17 ; ld4u r25, r26 } + 3fd8: [0-9a-f]* { ctz r5, r6 ; shrui r15, r16, 5 ; ld4u r25, r26 } + 3fe0: [0-9a-f]* { ctz r5, r6 ; lnk r15 ; st4 r25, r26 } + 3fe8: [0-9a-f]* { ctz r5, r6 ; move r15, r16 ; st4 r25, r26 } + 3ff0: [0-9a-f]* { ctz r5, r6 ; mz r15, r16, r17 ; st4 r25, r26 } + 3ff8: [0-9a-f]* { ctz r5, r6 ; or r15, r16, r17 ; ld r25, r26 } + 4000: [0-9a-f]* { ctz r5, r6 ; jr r15 ; prefetch r25 } + 4008: [0-9a-f]* { ctz r5, r6 ; andi r15, r16, 5 ; prefetch r25 } + 4010: [0-9a-f]* { ctz r5, r6 ; xor r15, r16, r17 ; prefetch r25 } + 4018: [0-9a-f]* { ctz r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 } + 4020: [0-9a-f]* { ctz r5, r6 ; rotl r15, r16, r17 ; prefetch_l2 r25 } + 4028: [0-9a-f]* { ctz r5, r6 ; lnk r15 ; prefetch_l2_fault r25 } + 4030: [0-9a-f]* { ctz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l3 r25 } + 4038: [0-9a-f]* { ctz r5, r6 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + 4040: [0-9a-f]* { ctz r5, r6 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + 4048: [0-9a-f]* { ctz r5, r6 ; rotli r15, r16, 5 } + 4050: [0-9a-f]* { ctz r5, r6 ; shl1addx r15, r16, r17 ; ld r25, r26 } + 4058: [0-9a-f]* { ctz r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 4060: [0-9a-f]* { ctz r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + 4068: [0-9a-f]* { ctz r5, r6 ; shrs r15, r16, r17 ; ld2u r25, r26 } + 4070: [0-9a-f]* { ctz r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 } + 4078: [0-9a-f]* { ctz r5, r6 ; andi r15, r16, 5 ; st r25, r26 } + 4080: [0-9a-f]* { ctz r5, r6 ; xor r15, r16, r17 ; st r25, r26 } + 4088: [0-9a-f]* { ctz r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + 4090: [0-9a-f]* { ctz r5, r6 ; or r15, r16, r17 ; st2 r25, r26 } + 4098: [0-9a-f]* { ctz r5, r6 ; jr r15 ; st4 r25, r26 } + 40a0: [0-9a-f]* { ctz r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 } + 40a8: [0-9a-f]* { ctz r5, r6 ; v1cmpeq r15, r16, r17 } + 40b0: [0-9a-f]* { ctz r5, r6 ; v2maxsi r15, r16, 5 } + 40b8: [0-9a-f]* { ctz r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + 40c0: [0-9a-f]* { dblalign r5, r6, r7 ; fetchand4 r15, r16, r17 } + 40c8: [0-9a-f]* { dblalign r5, r6, r7 ; ldnt2u r15, r16 } + 40d0: [0-9a-f]* { dblalign r5, r6, r7 ; shl2add r15, r16, r17 } + 40d8: [0-9a-f]* { dblalign r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + 40e0: [0-9a-f]* { dblalign r5, r6, r7 ; v2packh r15, r16, r17 } + 40e8: [0-9a-f]* { cmovnez r5, r6, r7 ; dblalign2 r15, r16, r17 } + 40f0: [0-9a-f]* { dblalign2 r15, r16, r17 ; info 19 } + 40f8: [0-9a-f]* { dblalign2 r15, r16, r17 ; shl16insli r5, r6, 4660 } + 4100: [0-9a-f]* { v1ddotpus r5, r6, r7 ; dblalign2 r15, r16, r17 } + 4108: [0-9a-f]* { dblalign2 r15, r16, r17 ; v2cmpltu r5, r6, r7 } + 4110: [0-9a-f]* { dblalign2 r15, r16, r17 ; v4shru r5, r6, r7 } + 4118: [0-9a-f]* { dblalign2 r5, r6, r7 ; flush r15 } + 4120: [0-9a-f]* { dblalign2 r5, r6, r7 ; ldnt4u r15, r16 } + 4128: [0-9a-f]* { dblalign2 r5, r6, r7 ; shli r15, r16, 5 } + 4130: [0-9a-f]* { dblalign2 r5, r6, r7 ; v1int_h r15, r16, r17 } + 4138: [0-9a-f]* { dblalign2 r5, r6, r7 ; v2shli r15, r16, 5 } + 4140: [0-9a-f]* { dblalign4 r15, r16, r17 ; cmpleu r5, r6, r7 } + 4148: [0-9a-f]* { dblalign4 r15, r16, r17 ; move r5, r6 } + 4150: [0-9a-f]* { dblalign4 r15, r16, r17 ; shl2addx r5, r6, r7 } + 4158: [0-9a-f]* { v1dotpu r5, r6, r7 ; dblalign4 r15, r16, r17 } + 4160: [0-9a-f]* { v2dotpa r5, r6, r7 ; dblalign4 r15, r16, r17 } + 4168: [0-9a-f]* { dblalign4 r15, r16, r17 ; xori r5, r6, 5 } + 4170: [0-9a-f]* { dblalign4 r5, r6, r7 ; ill } + 4178: [0-9a-f]* { dblalign4 r5, r6, r7 ; mf } + 4180: [0-9a-f]* { dblalign4 r5, r6, r7 ; shrsi r15, r16, 5 } + 4188: [0-9a-f]* { dblalign4 r5, r6, r7 ; v1minu r15, r16, r17 } + 4190: [0-9a-f]* { dblalign4 r5, r6, r7 ; v2shru r15, r16, r17 } + 4198: [0-9a-f]* { dblalign6 r15, r16, r17 ; cmpltui r5, r6, 5 } + 41a0: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; dblalign6 r15, r16, r17 } + 41a8: [0-9a-f]* { dblalign6 r15, r16, r17 ; shlx r5, r6, r7 } + 41b0: [0-9a-f]* { dblalign6 r15, r16, r17 ; v1int_h r5, r6, r7 } + 41b8: [0-9a-f]* { dblalign6 r15, r16, r17 ; v2maxsi r5, r6, 5 } + 41c0: [0-9a-f]* { dblalign6 r5, r6, r7 ; addx r15, r16, r17 } + 41c8: [0-9a-f]* { dblalign6 r5, r6, r7 ; iret } + 41d0: [0-9a-f]* { dblalign6 r5, r6, r7 ; movei r15, 5 } + 41d8: [0-9a-f]* { dblalign6 r5, r6, r7 ; shruxi r15, r16, 5 } + 41e0: [0-9a-f]* { dblalign6 r5, r6, r7 ; v1shl r15, r16, r17 } + 41e8: [0-9a-f]* { dblalign6 r5, r6, r7 ; v4add r15, r16, r17 } + 41f0: [0-9a-f]* { cmula r5, r6, r7 ; dtlbpr r15 } + 41f8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; dtlbpr r15 } + 4200: [0-9a-f]* { shrsi r5, r6, 5 ; dtlbpr r15 } + 4208: [0-9a-f]* { v1maxui r5, r6, 5 ; dtlbpr r15 } + 4210: [0-9a-f]* { v2mnz r5, r6, r7 ; dtlbpr r15 } + 4218: [0-9a-f]* { addxsc r5, r6, r7 ; exch r15, r16, r17 } + 4220: [0-9a-f]* { exch r15, r16, r17 } + 4228: [0-9a-f]* { or r5, r6, r7 ; exch r15, r16, r17 } + 4230: [0-9a-f]* { v1cmpleu r5, r6, r7 ; exch r15, r16, r17 } + 4238: [0-9a-f]* { v2adiffs r5, r6, r7 ; exch r15, r16, r17 } + 4240: [0-9a-f]* { v4add r5, r6, r7 ; exch r15, r16, r17 } + 4248: [0-9a-f]* { cmulf r5, r6, r7 ; exch4 r15, r16, r17 } + 4250: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; exch4 r15, r16, r17 } + 4258: [0-9a-f]* { shrui r5, r6, 5 ; exch4 r15, r16, r17 } + 4260: [0-9a-f]* { v1minui r5, r6, 5 ; exch4 r15, r16, r17 } + 4268: [0-9a-f]* { v2muls r5, r6, r7 ; exch4 r15, r16, r17 } + 4270: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; andi r15, r16, 5 } + 4278: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; ld r15, r16 } + 4280: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; nor r15, r16, r17 } + 4288: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; st2_add r15, r16, 5 } + 4290: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; v1shrui r15, r16, 5 } + 4298: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; v4shl r15, r16, r17 } + 42a0: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; fetchand4 r15, r16, r17 } + 42a8: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; ldnt2u r15, r16 } + 42b0: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; shl2add r15, r16, r17 } + 42b8: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + 42c0: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; v2packh r15, r16, r17 } + 42c8: [0-9a-f]* { fdouble_mul_flags r5, r6, r7 ; cmpleu r15, r16, r17 } + 42d0: [0-9a-f]* { fdouble_mul_flags r5, r6, r7 ; ld2s_add r15, r16, 5 } + 42d8: [0-9a-f]* { fdouble_mul_flags r5, r6, r7 ; prefetch_add_l2 r15, 5 } + 42e0: [0-9a-f]* { fdouble_mul_flags r5, r6, r7 ; stnt1_add r15, r16, 5 } + 42e8: [0-9a-f]* { fdouble_mul_flags r5, r6, r7 ; v2cmpeq r15, r16, r17 } + 42f0: [0-9a-f]* { fdouble_mul_flags r5, r6, r7 ; wh64 r15 } + 42f8: [0-9a-f]* { fdouble_pack1 r5, r6, r7 } + 4300: [0-9a-f]* { fdouble_pack1 r5, r6, r7 ; ldnt_add r15, r16, 5 } + 4308: [0-9a-f]* { fdouble_pack1 r5, r6, r7 ; shlxi r15, r16, 5 } + 4310: [0-9a-f]* { fdouble_pack1 r5, r6, r7 ; v1maxu r15, r16, r17 } + 4318: [0-9a-f]* { fdouble_pack1 r5, r6, r7 ; v2shrs r15, r16, r17 } + 4320: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; dblalign2 r15, r16, r17 } + 4328: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; ld4u_add r15, r16, 5 } + 4330: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; prefetch_l2 r15 } + 4338: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; sub r15, r16, r17 } + 4340: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; v2cmpltu r15, r16, r17 } + 4348: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; addx r15, r16, r17 } + 4350: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; iret } + 4358: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; movei r15, 5 } + 4360: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; shruxi r15, r16, 5 } + 4368: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; v1shl r15, r16, r17 } + 4370: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; v4add r15, r16, r17 } + 4378: [0-9a-f]* { fdouble_unpack_max r5, r6, r7 ; fetchadd r15, r16, r17 } + 4380: [0-9a-f]* { fdouble_unpack_max r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + 4388: [0-9a-f]* { fdouble_unpack_max r5, r6, r7 ; rotli r15, r16, 5 } + 4390: [0-9a-f]* { fdouble_unpack_max r5, r6, r7 ; v1cmpeq r15, r16, r17 } + 4398: [0-9a-f]* { fdouble_unpack_max r5, r6, r7 ; v2maxsi r15, r16, 5 } + 43a0: [0-9a-f]* { fdouble_unpack_min r5, r6, r7 ; cmpeq r15, r16, r17 } + 43a8: [0-9a-f]* { fdouble_unpack_min r5, r6, r7 ; ld1s r15, r16 } + 43b0: [0-9a-f]* { fdouble_unpack_min r5, r6, r7 ; or r15, r16, r17 } + 43b8: [0-9a-f]* { fdouble_unpack_min r5, r6, r7 ; st4 r15, r16 } + 43c0: [0-9a-f]* { fdouble_unpack_min r5, r6, r7 ; v1sub r15, r16, r17 } + 43c8: [0-9a-f]* { fdouble_unpack_min r5, r6, r7 ; v4shlsc r15, r16, r17 } + 43d0: [0-9a-f]* { crc32_8 r5, r6, r7 ; fetchadd r15, r16, r17 } + 43d8: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; fetchadd r15, r16, r17 } + 43e0: [0-9a-f]* { subx r5, r6, r7 ; fetchadd r15, r16, r17 } + 43e8: [0-9a-f]* { v1mz r5, r6, r7 ; fetchadd r15, r16, r17 } + 43f0: [0-9a-f]* { v2packuc r5, r6, r7 ; fetchadd r15, r16, r17 } + 43f8: [0-9a-f]* { cmoveqz r5, r6, r7 ; fetchadd4 r15, r16, r17 } + 4400: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; fetchadd4 r15, r16, r17 } + 4408: [0-9a-f]* { shl r5, r6, r7 ; fetchadd4 r15, r16, r17 } + 4410: [0-9a-f]* { v1ddotpua r5, r6, r7 ; fetchadd4 r15, r16, r17 } + 4418: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; fetchadd4 r15, r16, r17 } + 4420: [0-9a-f]* { v4shrs r5, r6, r7 ; fetchadd4 r15, r16, r17 } + 4428: [0-9a-f]* { dblalign r5, r6, r7 ; fetchaddgez r15, r16, r17 } + 4430: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; fetchaddgez r15, r16, r17 } + 4438: [0-9a-f]* { tblidxb0 r5, r6 ; fetchaddgez r15, r16, r17 } + 4440: [0-9a-f]* { v1sadu r5, r6, r7 ; fetchaddgez r15, r16, r17 } + 4448: [0-9a-f]* { v2sadau r5, r6, r7 ; fetchaddgez r15, r16, r17 } + 4450: [0-9a-f]* { cmpeq r5, r6, r7 ; fetchaddgez4 r15, r16, r17 } + 4458: [0-9a-f]* { infol 4660 ; fetchaddgez4 r15, r16, r17 } + 4460: [0-9a-f]* { shl1add r5, r6, r7 ; fetchaddgez4 r15, r16, r17 } + 4468: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; fetchaddgez4 r15, r16, r17 } + 4470: [0-9a-f]* { v2cmpltui r5, r6, 5 ; fetchaddgez4 r15, r16, r17 } + 4478: [0-9a-f]* { v4sub r5, r6, r7 ; fetchaddgez4 r15, r16, r17 } + 4480: [0-9a-f]* { dblalign4 r5, r6, r7 ; fetchand r15, r16, r17 } + 4488: [0-9a-f]* { mula_hu_ls r5, r6, r7 ; fetchand r15, r16, r17 } + 4490: [0-9a-f]* { tblidxb2 r5, r6 ; fetchand r15, r16, r17 } + 4498: [0-9a-f]* { v1shli r5, r6, 5 ; fetchand r15, r16, r17 } + 44a0: [0-9a-f]* { v2sadu r5, r6, r7 ; fetchand r15, r16, r17 } + 44a8: [0-9a-f]* { cmples r5, r6, r7 ; fetchand4 r15, r16, r17 } + 44b0: [0-9a-f]* { mnz r5, r6, r7 ; fetchand4 r15, r16, r17 } + 44b8: [0-9a-f]* { shl2add r5, r6, r7 ; fetchand4 r15, r16, r17 } + 44c0: [0-9a-f]* { v1dotpa r5, r6, r7 ; fetchand4 r15, r16, r17 } + 44c8: [0-9a-f]* { v2dotp r5, r6, r7 ; fetchand4 r15, r16, r17 } + 44d0: [0-9a-f]* { xor r5, r6, r7 ; fetchand4 r15, r16, r17 } + 44d8: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; fetchor r15, r16, r17 } + 44e0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; fetchor r15, r16, r17 } + 44e8: [0-9a-f]* { v1add r5, r6, r7 ; fetchor r15, r16, r17 } + 44f0: [0-9a-f]* { v1shrsi r5, r6, 5 ; fetchor r15, r16, r17 } + 44f8: [0-9a-f]* { v2shli r5, r6, 5 ; fetchor r15, r16, r17 } + 4500: [0-9a-f]* { cmplts r5, r6, r7 ; fetchor4 r15, r16, r17 } + 4508: [0-9a-f]* { movei r5, 5 ; fetchor4 r15, r16, r17 } + 4510: [0-9a-f]* { shl3add r5, r6, r7 ; fetchor4 r15, r16, r17 } + 4518: [0-9a-f]* { v1dotpua r5, r6, r7 ; fetchor4 r15, r16, r17 } + 4520: [0-9a-f]* { v2int_h r5, r6, r7 ; fetchor4 r15, r16, r17 } + 4528: [0-9a-f]* { add r5, r6, r7 ; finv r15 } + 4530: [0-9a-f]* { fdouble_mul_flags r5, r6, r7 ; finv r15 } + 4538: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; finv r15 } + 4540: [0-9a-f]* { v1adduc r5, r6, r7 ; finv r15 } + 4548: [0-9a-f]* { v1shrui r5, r6, 5 ; finv r15 } + 4550: [0-9a-f]* { v2shrs r5, r6, r7 ; finv r15 } + 4558: [0-9a-f]* { cmpltu r5, r6, r7 ; flush r15 } + 4560: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; flush r15 } + 4568: [0-9a-f]* { shli r5, r6, 5 ; flush r15 } + 4570: [0-9a-f]* { v1dotpusa r5, r6, r7 ; flush r15 } + 4578: [0-9a-f]* { v2maxs r5, r6, r7 ; flush r15 } + 4580: [0-9a-f]* { addli r5, r6, 4660 ; flushwb } + 4588: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; flushwb } + 4590: [0-9a-f]* { mulx r5, r6, r7 ; flushwb } + 4598: [0-9a-f]* { v1avgu r5, r6, r7 ; flushwb } + 45a0: [0-9a-f]* { v1subuc r5, r6, r7 ; flushwb } + 45a8: [0-9a-f]* { v2shru r5, r6, r7 ; flushwb } + 45b0: [0-9a-f]* { add r5, r6, r7 ; ld2u r25, r26 } + 45b8: [0-9a-f]* { addi r5, r6, 5 ; ld4u r25, r26 } + 45c0: [0-9a-f]* { addx r5, r6, r7 ; ld4u r25, r26 } + 45c8: [0-9a-f]* { addxi r5, r6, 5 ; prefetch r25 } + 45d0: [0-9a-f]* { and r5, r6, r7 ; ld4u r25, r26 } + 45d8: [0-9a-f]* { andi r5, r6, 5 ; prefetch r25 } + 45e0: [0-9a-f]* { cmoveqz r5, r6, r7 ; prefetch r25 } + 45e8: [0-9a-f]* { cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + 45f0: [0-9a-f]* { cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 } + 45f8: [0-9a-f]* { cmples r15, r16, r17 ; prefetch_l2_fault r25 } + 4600: [0-9a-f]* { cmpleu r15, r16, r17 ; prefetch_l3_fault r25 } + 4608: [0-9a-f]* { cmplts r15, r16, r17 ; st1 r25, r26 } + 4610: [0-9a-f]* { cmpltsi r15, r16, 5 ; st4 r25, r26 } + 4618: [0-9a-f]* { cmpltu r5, r6, r7 ; ld r25, r26 } + 4620: [0-9a-f]* { cmpne r5, r6, r7 ; ld r25, r26 } + 4628: [0-9a-f]* { ctz r5, r6 ; prefetch_l3 r25 } + 4630: [0-9a-f]* { ld2u r25, r26 } + 4638: [0-9a-f]* { icoh r15 } + 4640: [0-9a-f]* { inv r15 } + 4648: [0-9a-f]* { jr r15 ; ld r25, r26 } + 4650: [0-9a-f]* { add r5, r6, r7 ; ld r25, r26 } + 4658: [0-9a-f]* { mnz r15, r16, r17 ; ld r25, r26 } + 4660: [0-9a-f]* { shl3add r15, r16, r17 ; ld r25, r26 } + 4668: [0-9a-f]* { cmovnez r5, r6, r7 ; ld1s r25, r26 } + 4670: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; ld1s r25, r26 } + 4678: [0-9a-f]* { shrui r5, r6, 5 ; ld1s r25, r26 } + 4680: [0-9a-f]* { cmpltsi r5, r6, 5 ; ld1u r25, r26 } + 4688: [0-9a-f]* { revbytes r5, r6 ; ld1u r25, r26 } + 4690: [0-9a-f]* { ld1u_add r15, r16, 5 } + 4698: [0-9a-f]* { jr r15 ; ld2s r25, r26 } + 46a0: [0-9a-f]* { shl2add r5, r6, r7 ; ld2s r25, r26 } + 46a8: [0-9a-f]* { andi r15, r16, 5 ; ld2u r25, r26 } + 46b0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; ld2u r25, r26 } + 46b8: [0-9a-f]* { shrsi r5, r6, 5 ; ld2u r25, r26 } + 46c0: [0-9a-f]* { cmpleu r5, r6, r7 ; ld4s r25, r26 } + 46c8: [0-9a-f]* { or r15, r16, r17 ; ld4s r25, r26 } + 46d0: [0-9a-f]* { tblidxb3 r5, r6 ; ld4s r25, r26 } + 46d8: [0-9a-f]* { ill ; ld4u r25, r26 } + 46e0: [0-9a-f]* { shl1add r5, r6, r7 ; ld4u r25, r26 } + 46e8: [0-9a-f]* { ldnt1u_add r15, r16, 5 } + 46f0: [0-9a-f]* { mnz r15, r16, r17 ; prefetch r25 } + 46f8: [0-9a-f]* { move r15, r16 ; prefetch_l2 r25 } + 4700: [0-9a-f]* { movei r15, 5 ; prefetch_l3 r25 } + 4708: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 } + 4710: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; prefetch r25 } + 4718: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 } + 4720: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; ld4u r25, r26 } + 4728: [0-9a-f]* { mulax r5, r6, r7 ; prefetch r25 } + 4730: [0-9a-f]* { mz r15, r16, r17 ; prefetch_l1_fault r25 } + 4738: [0-9a-f]* { nop ; prefetch_l2_fault r25 } + 4740: [0-9a-f]* { nor r5, r6, r7 ; prefetch_l3_fault r25 } + 4748: [0-9a-f]* { or r5, r6, r7 ; st1 r25, r26 } + 4750: [0-9a-f]* { cmovnez r5, r6, r7 ; prefetch r25 } + 4758: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; prefetch r25 } + 4760: [0-9a-f]* { shrui r5, r6, 5 ; prefetch r25 } + 4768: [0-9a-f]* { cmpleu r15, r16, r17 ; prefetch r25 } + 4770: [0-9a-f]* { nor r5, r6, r7 ; prefetch r25 } + 4778: [0-9a-f]* { tblidxb2 r5, r6 ; prefetch r25 } + 4780: [0-9a-f]* { ill ; prefetch_l1_fault r25 } + 4788: [0-9a-f]* { shl1add r5, r6, r7 ; prefetch_l1_fault r25 } + 4790: [0-9a-f]* { addxi r5, r6, 5 ; prefetch_l2 r25 } + 4798: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + 47a0: [0-9a-f]* { shrs r15, r16, r17 ; prefetch_l2 r25 } + 47a8: [0-9a-f]* { cmples r5, r6, r7 ; prefetch_l2_fault r25 } + 47b0: [0-9a-f]* { nor r15, r16, r17 ; prefetch_l2_fault r25 } + 47b8: [0-9a-f]* { tblidxb1 r5, r6 ; prefetch_l2_fault r25 } + 47c0: [0-9a-f]* { fsingle_pack1 r5, r6 ; prefetch_l3 r25 } + 47c8: [0-9a-f]* { shl1add r15, r16, r17 ; prefetch_l3 r25 } + 47d0: [0-9a-f]* { addxi r15, r16, 5 ; prefetch_l3_fault r25 } + 47d8: [0-9a-f]* { movei r5, 5 ; prefetch_l3_fault r25 } + 47e0: [0-9a-f]* { shli r5, r6, 5 ; prefetch_l3_fault r25 } + 47e8: [0-9a-f]* { revbytes r5, r6 ; ld r25, r26 } + 47f0: [0-9a-f]* { rotl r5, r6, r7 ; ld1u r25, r26 } + 47f8: [0-9a-f]* { rotli r5, r6, 5 ; ld2u r25, r26 } + 4800: [0-9a-f]* { shl r5, r6, r7 ; ld4u r25, r26 } + 4808: [0-9a-f]* { shl1add r5, r6, r7 ; ld4u r25, r26 } + 4810: [0-9a-f]* { shl1addx r5, r6, r7 ; prefetch r25 } + 4818: [0-9a-f]* { shl2add r5, r6, r7 ; prefetch_l2 r25 } + 4820: [0-9a-f]* { shl2addx r5, r6, r7 ; prefetch_l3 r25 } + 4828: [0-9a-f]* { shl3add r5, r6, r7 ; st r25, r26 } + 4830: [0-9a-f]* { shl3addx r5, r6, r7 ; st2 r25, r26 } + 4838: [0-9a-f]* { shli r5, r6, 5 } + 4840: [0-9a-f]* { shrs r5, r6, r7 ; st2 r25, r26 } + 4848: [0-9a-f]* { shrsi r5, r6, 5 } + 4850: [0-9a-f]* { shrui r15, r16, 5 ; ld1s r25, r26 } + 4858: [0-9a-f]* { shruxi r5, r6, 5 } + 4860: [0-9a-f]* { jalrp r15 ; st r25, r26 } + 4868: [0-9a-f]* { shl2add r15, r16, r17 ; st r25, r26 } + 4870: [0-9a-f]* { andi r15, r16, 5 ; st1 r25, r26 } + 4878: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; st1 r25, r26 } + 4880: [0-9a-f]* { shrsi r5, r6, 5 ; st1 r25, r26 } + 4888: [0-9a-f]* { cmpleu r5, r6, r7 ; st2 r25, r26 } + 4890: [0-9a-f]* { or r15, r16, r17 ; st2 r25, r26 } + 4898: [0-9a-f]* { tblidxb3 r5, r6 ; st2 r25, r26 } + 48a0: [0-9a-f]* { ill ; st4 r25, r26 } + 48a8: [0-9a-f]* { shl1add r5, r6, r7 ; st4 r25, r26 } + 48b0: [0-9a-f]* { stnt4_add r15, r16, 5 } + 48b8: [0-9a-f]* { subx r15, r16, r17 ; ld r25, r26 } + 48c0: [0-9a-f]* { tblidxb0 r5, r6 ; ld r25, r26 } + 48c8: [0-9a-f]* { tblidxb2 r5, r6 ; ld1u r25, r26 } + 48d0: [0-9a-f]* { v1adduc r15, r16, r17 } + 48d8: [0-9a-f]* { v1minu r15, r16, r17 } + 48e0: [0-9a-f]* { v2cmpeqi r5, r6, 5 } + 48e8: [0-9a-f]* { v2packuc r15, r16, r17 } + 48f0: [0-9a-f]* { v4shru r15, r16, r17 } + 48f8: [0-9a-f]* { xor r5, r6, r7 ; st r25, r26 } + 4900: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; fetchor4 r15, r16, r17 } + 4908: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; ldnt4s r15, r16 } + 4910: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; shl3add r15, r16, r17 } + 4918: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; v1cmpltui r15, r16, 5 } + 4920: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; v2packuc r15, r16, r17 } + 4928: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; cmpltsi r15, r16, 5 } + 4930: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; ld2u_add r15, r16, 5 } + 4938: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; prefetch_add_l3 r15, 5 } + 4940: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; stnt2_add r15, r16, 5 } + 4948: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; v2cmples r15, r16, r17 } + 4950: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; xori r15, r16, 5 } + 4958: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; ill } + 4960: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; mf } + 4968: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; shrsi r15, r16, 5 } + 4970: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; v1minu r15, r16, r17 } + 4978: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; v2shru r15, r16, r17 } + 4980: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; dblalign6 r15, r16, r17 } + 4988: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; ldna r15, r16 } + 4990: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; prefetch_l3 r15 } + 4998: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; subxsc r15, r16, r17 } + 49a0: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; v2cmpne r15, r16, r17 } + 49a8: [0-9a-f]* { fsingle_pack1 r5, r6 ; add r15, r16, r17 ; ld4s r25, r26 } + 49b0: [0-9a-f]* { fsingle_pack1 r5, r6 ; addx r15, r16, r17 ; ld4u r25, r26 } + 49b8: [0-9a-f]* { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; ld4u r25, r26 } + 49c0: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch r25 } + 49c8: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch r25 } + 49d0: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } + 49d8: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + 49e0: [0-9a-f]* { fsingle_pack1 r5, r6 ; fetchor4 r15, r16, r17 } + 49e8: [0-9a-f]* { fsingle_pack1 r5, r6 ; ill ; st2 r25, r26 } + 49f0: [0-9a-f]* { fsingle_pack1 r5, r6 ; jalr r15 ; st1 r25, r26 } + 49f8: [0-9a-f]* { fsingle_pack1 r5, r6 ; jr r15 ; st4 r25, r26 } + 4a00: [0-9a-f]* { fsingle_pack1 r5, r6 ; jalrp r15 ; ld r25, r26 } + 4a08: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 } + 4a10: [0-9a-f]* { fsingle_pack1 r5, r6 ; addi r15, r16, 5 ; ld1u r25, r26 } + 4a18: [0-9a-f]* { fsingle_pack1 r5, r6 ; shru r15, r16, r17 ; ld1u r25, r26 } + 4a20: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl1add r15, r16, r17 ; ld2s r25, r26 } + 4a28: [0-9a-f]* { fsingle_pack1 r5, r6 ; move r15, r16 ; ld2u r25, r26 } + 4a30: [0-9a-f]* { fsingle_pack1 r5, r6 ; ld4s r25, r26 } + 4a38: [0-9a-f]* { fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; ld4u r25, r26 } + 4a40: [0-9a-f]* { fsingle_pack1 r5, r6 ; xor r15, r16, r17 ; ld4u r25, r26 } + 4a48: [0-9a-f]* { fsingle_pack1 r5, r6 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 4a50: [0-9a-f]* { fsingle_pack1 r5, r6 ; movei r15, 5 ; ld1s r25, r26 } + 4a58: [0-9a-f]* { fsingle_pack1 r5, r6 ; nop ; ld1s r25, r26 } + 4a60: [0-9a-f]* { fsingle_pack1 r5, r6 ; or r15, r16, r17 ; ld2s r25, r26 } + 4a68: [0-9a-f]* { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; prefetch r25 } + 4a70: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch r25 } + 4a78: [0-9a-f]* { fsingle_pack1 r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 } + 4a80: [0-9a-f]* { fsingle_pack1 r5, r6 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 } + 4a88: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } + 4a90: [0-9a-f]* { fsingle_pack1 r5, r6 ; movei r15, 5 ; prefetch_l2_fault r25 } + 4a98: [0-9a-f]* { fsingle_pack1 r5, r6 ; info 19 ; prefetch_l3 r25 } + 4aa0: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + 4aa8: [0-9a-f]* { fsingle_pack1 r5, r6 ; rotl r15, r16, r17 ; ld r25, r26 } + 4ab0: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 } + 4ab8: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + 4ac0: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + 4ac8: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl3addx r15, r16, r17 ; prefetch r25 } + 4ad0: [0-9a-f]* { fsingle_pack1 r5, r6 ; shrs r15, r16, r17 ; prefetch r25 } + 4ad8: [0-9a-f]* { fsingle_pack1 r5, r6 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + 4ae0: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; st r25, r26 } + 4ae8: [0-9a-f]* { fsingle_pack1 r5, r6 ; add r15, r16, r17 ; st1 r25, r26 } + 4af0: [0-9a-f]* { fsingle_pack1 r5, r6 ; shrsi r15, r16, 5 ; st1 r25, r26 } + 4af8: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; st2 r25, r26 } + 4b00: [0-9a-f]* { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; st4 r25, r26 } + 4b08: [0-9a-f]* { fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; ld4s r25, r26 } + 4b10: [0-9a-f]* { fsingle_pack1 r5, r6 ; v1cmpleu r15, r16, r17 } + 4b18: [0-9a-f]* { fsingle_pack1 r5, r6 ; v2mnz r15, r16, r17 } + 4b20: [0-9a-f]* { fsingle_pack1 r5, r6 ; xor r15, r16, r17 ; st r25, r26 } + 4b28: [0-9a-f]* { fsingle_pack2 r5, r6, r7 ; finv r15 } + 4b30: [0-9a-f]* { fsingle_pack2 r5, r6, r7 ; ldnt4s_add r15, r16, 5 } + 4b38: [0-9a-f]* { fsingle_pack2 r5, r6, r7 ; shl3addx r15, r16, r17 } + 4b40: [0-9a-f]* { fsingle_pack2 r5, r6, r7 ; v1cmpne r15, r16, r17 } + 4b48: [0-9a-f]* { fsingle_pack2 r5, r6, r7 ; v2shl r15, r16, r17 } + 4b50: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; cmpltu r15, r16, r17 } + 4b58: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; ld4s r15, r16 } + 4b60: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + 4b68: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; stnt4 r15, r16 } + 4b70: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; v2cmpleu r15, r16, r17 } + 4b78: [0-9a-f]* { add r5, r6, r7 ; icoh r15 } + 4b80: [0-9a-f]* { fdouble_mul_flags r5, r6, r7 ; icoh r15 } + 4b88: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; icoh r15 } + 4b90: [0-9a-f]* { v1adduc r5, r6, r7 ; icoh r15 } + 4b98: [0-9a-f]* { v1shrui r5, r6, 5 ; icoh r15 } + 4ba0: [0-9a-f]* { v2shrs r5, r6, r7 ; icoh r15 } + 4ba8: [0-9a-f]* { addi r5, r6, 5 ; ill ; ld1u r25, r26 } + 4bb0: [0-9a-f]* { addxi r5, r6, 5 ; ill ; ld2s r25, r26 } + 4bb8: [0-9a-f]* { andi r5, r6, 5 ; ill ; ld2s r25, r26 } + 4bc0: [0-9a-f]* { cmoveqz r5, r6, r7 ; ill ; ld1u r25, r26 } + 4bc8: [0-9a-f]* { cmpeq r5, r6, r7 ; ill ; ld2u r25, r26 } + 4bd0: [0-9a-f]* { cmples r5, r6, r7 ; ill ; ld4u r25, r26 } + 4bd8: [0-9a-f]* { cmplts r5, r6, r7 ; ill ; prefetch r25 } + 4be0: [0-9a-f]* { cmpltu r5, r6, r7 ; ill ; prefetch_l2 r25 } + 4be8: [0-9a-f]* { ctz r5, r6 ; ill ; ld1u r25, r26 } + 4bf0: [0-9a-f]* { ill ; prefetch_l2_fault r25 } + 4bf8: [0-9a-f]* { info 19 ; ill ; prefetch r25 } + 4c00: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; ill ; ld r25, r26 } + 4c08: [0-9a-f]* { and r5, r6, r7 ; ill ; ld1s r25, r26 } + 4c10: [0-9a-f]* { shl1add r5, r6, r7 ; ill ; ld1s r25, r26 } + 4c18: [0-9a-f]* { mnz r5, r6, r7 ; ill ; ld1u r25, r26 } + 4c20: [0-9a-f]* { xor r5, r6, r7 ; ill ; ld1u r25, r26 } + 4c28: [0-9a-f]* { pcnt r5, r6 ; ill ; ld2s r25, r26 } + 4c30: [0-9a-f]* { cmpltu r5, r6, r7 ; ill ; ld2u r25, r26 } + 4c38: [0-9a-f]* { sub r5, r6, r7 ; ill ; ld2u r25, r26 } + 4c40: [0-9a-f]* { mulax r5, r6, r7 ; ill ; ld4s r25, r26 } + 4c48: [0-9a-f]* { cmpeq r5, r6, r7 ; ill ; ld4u r25, r26 } + 4c50: [0-9a-f]* { shl3addx r5, r6, r7 ; ill ; ld4u r25, r26 } + 4c58: [0-9a-f]* { move r5, r6 ; ill ; ld4u r25, r26 } + 4c60: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; ill ; prefetch r25 } + 4c68: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; ill ; ld2u r25, r26 } + 4c70: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; ill ; ld4s r25, r26 } + 4c78: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; ill ; ld1u r25, r26 } + 4c80: [0-9a-f]* { mulax r5, r6, r7 ; ill ; ld2s r25, r26 } + 4c88: [0-9a-f]* { mz r5, r6, r7 ; ill ; ld4s r25, r26 } + 4c90: [0-9a-f]* { nor r5, r6, r7 ; ill ; prefetch r25 } + 4c98: [0-9a-f]* { pcnt r5, r6 ; ill ; prefetch r25 } + 4ca0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; ill ; prefetch r25 } + 4ca8: [0-9a-f]* { clz r5, r6 ; ill ; prefetch r25 } + 4cb0: [0-9a-f]* { shl2add r5, r6, r7 ; ill ; prefetch r25 } + 4cb8: [0-9a-f]* { movei r5, 5 ; ill ; prefetch_l1_fault r25 } + 4cc0: [0-9a-f]* { add r5, r6, r7 ; ill ; prefetch_l2 r25 } + 4cc8: [0-9a-f]* { revbytes r5, r6 ; ill ; prefetch_l2 r25 } + 4cd0: [0-9a-f]* { ctz r5, r6 ; ill ; prefetch_l2_fault r25 } + 4cd8: [0-9a-f]* { tblidxb0 r5, r6 ; ill ; prefetch_l2_fault r25 } + 4ce0: [0-9a-f]* { mz r5, r6, r7 ; ill ; prefetch_l3 r25 } + 4ce8: [0-9a-f]* { cmples r5, r6, r7 ; ill ; prefetch_l3_fault r25 } + 4cf0: [0-9a-f]* { shrs r5, r6, r7 ; ill ; prefetch_l3_fault r25 } + 4cf8: [0-9a-f]* { revbytes r5, r6 ; ill ; prefetch_l1_fault r25 } + 4d00: [0-9a-f]* { rotli r5, r6, 5 ; ill ; prefetch_l2_fault r25 } + 4d08: [0-9a-f]* { shl1add r5, r6, r7 ; ill ; prefetch_l3 r25 } + 4d10: [0-9a-f]* { shl2add r5, r6, r7 ; ill ; st r25, r26 } + 4d18: [0-9a-f]* { shl3add r5, r6, r7 ; ill ; st2 r25, r26 } + 4d20: [0-9a-f]* { shli r5, r6, 5 ; ill } + 4d28: [0-9a-f]* { shrsi r5, r6, 5 ; ill } + 4d30: [0-9a-f]* { shruxi r5, r6, 5 ; ill } + 4d38: [0-9a-f]* { pcnt r5, r6 ; ill ; st r25, r26 } + 4d40: [0-9a-f]* { cmpltu r5, r6, r7 ; ill ; st1 r25, r26 } + 4d48: [0-9a-f]* { sub r5, r6, r7 ; ill ; st1 r25, r26 } + 4d50: [0-9a-f]* { mulax r5, r6, r7 ; ill ; st2 r25, r26 } + 4d58: [0-9a-f]* { cmpeq r5, r6, r7 ; ill ; st4 r25, r26 } + 4d60: [0-9a-f]* { shl3addx r5, r6, r7 ; ill ; st4 r25, r26 } + 4d68: [0-9a-f]* { subx r5, r6, r7 ; ill ; prefetch r25 } + 4d70: [0-9a-f]* { tblidxb1 r5, r6 ; ill ; prefetch r25 } + 4d78: [0-9a-f]* { tblidxb3 r5, r6 ; ill ; prefetch_l2 r25 } + 4d80: [0-9a-f]* { v1multu r5, r6, r7 ; ill } + 4d88: [0-9a-f]* { v2mz r5, r6, r7 ; ill } + 4d90: [0-9a-f]* { xor r5, r6, r7 ; ill ; prefetch_l3 r25 } + 4d98: [0-9a-f]* { info 19 ; add r5, r6, r7 ; prefetch_l3_fault r25 } + 4da0: [0-9a-f]* { info 19 ; addi r5, r6, 5 ; st1 r25, r26 } + 4da8: [0-9a-f]* { info 19 ; addx r5, r6, r7 ; st1 r25, r26 } + 4db0: [0-9a-f]* { info 19 ; addxi r5, r6, 5 ; st4 r25, r26 } + 4db8: [0-9a-f]* { info 19 ; and r5, r6, r7 ; st1 r25, r26 } + 4dc0: [0-9a-f]* { info 19 ; andi r5, r6, 5 ; st4 r25, r26 } + 4dc8: [0-9a-f]* { cmoveqz r5, r6, r7 ; info 19 ; st2 r25, r26 } + 4dd0: [0-9a-f]* { info 19 ; cmpeq r15, r16, r17 } + 4dd8: [0-9a-f]* { info 19 ; cmpeqi r5, r6, 5 ; ld1s r25, r26 } + 4de0: [0-9a-f]* { info 19 ; cmples r5, r6, r7 ; ld1s r25, r26 } + 4de8: [0-9a-f]* { info 19 ; cmpleu r5, r6, r7 ; ld2s r25, r26 } + 4df0: [0-9a-f]* { info 19 ; cmplts r5, r6, r7 ; ld4s r25, r26 } + 4df8: [0-9a-f]* { info 19 ; cmpltsi r5, r6, 5 ; prefetch r25 } + 4e00: [0-9a-f]* { info 19 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + 4e08: [0-9a-f]* { info 19 ; cmpne r5, r6, r7 ; prefetch_l1_fault r25 } + 4e10: [0-9a-f]* { info 19 ; dblalign2 r5, r6, r7 } + 4e18: [0-9a-f]* { info 19 ; prefetch_l3_fault r25 } + 4e20: [0-9a-f]* { info 19 ; ill ; prefetch r25 } + 4e28: [0-9a-f]* { info 19 ; jalr r15 ; prefetch r25 } + 4e30: [0-9a-f]* { info 19 ; jr r15 ; prefetch_l1_fault r25 } + 4e38: [0-9a-f]* { info 19 ; andi r15, r16, 5 ; ld r25, r26 } + 4e40: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; info 19 ; ld r25, r26 } + 4e48: [0-9a-f]* { info 19 ; shrsi r5, r6, 5 ; ld r25, r26 } + 4e50: [0-9a-f]* { info 19 ; cmplts r15, r16, r17 ; ld1s r25, r26 } + 4e58: [0-9a-f]* { info 19 ; or r5, r6, r7 ; ld1s r25, r26 } + 4e60: [0-9a-f]* { info 19 ; xor r15, r16, r17 ; ld1s r25, r26 } + 4e68: [0-9a-f]* { info 19 ; info 19 ; ld1u r25, r26 } + 4e70: [0-9a-f]* { info 19 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } + 4e78: [0-9a-f]* { info 19 ; addxi r5, r6, 5 ; ld2s r25, r26 } + 4e80: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; info 19 ; ld2s r25, r26 } + 4e88: [0-9a-f]* { info 19 ; shrs r15, r16, r17 ; ld2s r25, r26 } + 4e90: [0-9a-f]* { info 19 ; cmples r15, r16, r17 ; ld2u r25, r26 } + 4e98: [0-9a-f]* { info 19 ; nop ; ld2u r25, r26 } + 4ea0: [0-9a-f]* { tblidxb0 r5, r6 ; info 19 ; ld2u r25, r26 } + 4ea8: [0-9a-f]* { ctz r5, r6 ; info 19 ; ld4s r25, r26 } + 4eb0: [0-9a-f]* { info 19 ; shl r15, r16, r17 ; ld4s r25, r26 } + 4eb8: [0-9a-f]* { info 19 ; addi r5, r6, 5 ; ld4u r25, r26 } + 4ec0: [0-9a-f]* { info 19 ; move r15, r16 ; ld4u r25, r26 } + 4ec8: [0-9a-f]* { info 19 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } + 4ed0: [0-9a-f]* { info 19 ; ldnt_add r15, r16, 5 } + 4ed8: [0-9a-f]* { info 19 ; mnz r15, r16, r17 ; st4 r25, r26 } + 4ee0: [0-9a-f]* { info 19 ; move r5, r6 ; ld r25, r26 } + 4ee8: [0-9a-f]* { info 19 ; movei r5, 5 ; ld1u r25, r26 } + 4ef0: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; info 19 } + 4ef8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; info 19 ; st4 r25, r26 } + 4f00: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; info 19 } + 4f08: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; info 19 ; st1 r25, r26 } + 4f10: [0-9a-f]* { mulax r5, r6, r7 ; info 19 ; st2 r25, r26 } + 4f18: [0-9a-f]* { info 19 ; mz r15, r16, r17 } + 4f20: [0-9a-f]* { info 19 ; nor r15, r16, r17 ; ld1s r25, r26 } + 4f28: [0-9a-f]* { info 19 ; or r15, r16, r17 ; ld2s r25, r26 } + 4f30: [0-9a-f]* { pcnt r5, r6 ; info 19 ; ld2s r25, r26 } + 4f38: [0-9a-f]* { info 19 ; cmplts r15, r16, r17 ; prefetch r25 } + 4f40: [0-9a-f]* { info 19 ; or r5, r6, r7 ; prefetch r25 } + 4f48: [0-9a-f]* { info 19 ; xor r15, r16, r17 ; prefetch r25 } + 4f50: [0-9a-f]* { info 19 ; cmpne r5, r6, r7 ; prefetch r25 } + 4f58: [0-9a-f]* { info 19 ; rotli r5, r6, 5 ; prefetch r25 } + 4f60: [0-9a-f]* { info 19 ; addi r5, r6, 5 ; prefetch_l1_fault r25 } + 4f68: [0-9a-f]* { info 19 ; move r15, r16 ; prefetch_l1_fault r25 } + 4f70: [0-9a-f]* { info 19 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 } + 4f78: [0-9a-f]* { info 19 ; cmpeq r5, r6, r7 ; prefetch_l2 r25 } + 4f80: [0-9a-f]* { mulx r5, r6, r7 ; info 19 ; prefetch_l2 r25 } + 4f88: [0-9a-f]* { info 19 ; sub r5, r6, r7 ; prefetch_l2 r25 } + 4f90: [0-9a-f]* { info 19 ; cmpne r15, r16, r17 ; prefetch_l2_fault r25 } + 4f98: [0-9a-f]* { info 19 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + 4fa0: [0-9a-f]* { info 19 ; addi r15, r16, 5 ; prefetch_l3 r25 } + 4fa8: [0-9a-f]* { info 19 ; mnz r5, r6, r7 ; prefetch_l3 r25 } + 4fb0: [0-9a-f]* { info 19 ; shl3add r5, r6, r7 ; prefetch_l3 r25 } + 4fb8: [0-9a-f]* { info 19 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + 4fc0: [0-9a-f]* { mulax r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 } + 4fc8: [0-9a-f]* { info 19 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + 4fd0: [0-9a-f]* { revbytes r5, r6 ; info 19 ; prefetch_l1_fault r25 } + 4fd8: [0-9a-f]* { info 19 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 } + 4fe0: [0-9a-f]* { info 19 ; rotli r5, r6, 5 ; prefetch_l3_fault r25 } + 4fe8: [0-9a-f]* { info 19 ; shl r5, r6, r7 ; st1 r25, r26 } + 4ff0: [0-9a-f]* { info 19 ; shl1add r5, r6, r7 ; st1 r25, r26 } + 4ff8: [0-9a-f]* { info 19 ; shl1addx r5, r6, r7 ; st4 r25, r26 } + 5000: [0-9a-f]* { info 19 ; shl2addx r15, r16, r17 ; ld r25, r26 } + 5008: [0-9a-f]* { info 19 ; shl3add r15, r16, r17 ; ld1u r25, r26 } + 5010: [0-9a-f]* { info 19 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + 5018: [0-9a-f]* { info 19 ; shli r15, r16, 5 ; ld4u r25, r26 } + 5020: [0-9a-f]* { info 19 ; shrs r15, r16, r17 ; ld2u r25, r26 } + 5028: [0-9a-f]* { info 19 ; shrsi r15, r16, 5 ; ld4u r25, r26 } + 5030: [0-9a-f]* { info 19 ; shru r15, r16, r17 ; prefetch r25 } + 5038: [0-9a-f]* { info 19 ; shrui r15, r16, 5 ; prefetch_l2 r25 } + 5040: [0-9a-f]* { info 19 ; addxi r15, r16, 5 ; st r25, r26 } + 5048: [0-9a-f]* { info 19 ; movei r5, 5 ; st r25, r26 } + 5050: [0-9a-f]* { info 19 ; shli r5, r6, 5 ; st r25, r26 } + 5058: [0-9a-f]* { info 19 ; cmples r15, r16, r17 ; st1 r25, r26 } + 5060: [0-9a-f]* { info 19 ; nop ; st1 r25, r26 } + 5068: [0-9a-f]* { tblidxb0 r5, r6 ; info 19 ; st1 r25, r26 } + 5070: [0-9a-f]* { ctz r5, r6 ; info 19 ; st2 r25, r26 } + 5078: [0-9a-f]* { info 19 ; shl r15, r16, r17 ; st2 r25, r26 } + 5080: [0-9a-f]* { info 19 ; addi r5, r6, 5 ; st4 r25, r26 } + 5088: [0-9a-f]* { info 19 ; move r15, r16 ; st4 r25, r26 } + 5090: [0-9a-f]* { info 19 ; shl3addx r15, r16, r17 ; st4 r25, r26 } + 5098: [0-9a-f]* { info 19 ; sub r15, r16, r17 ; prefetch r25 } + 50a0: [0-9a-f]* { info 19 ; subx r15, r16, r17 ; prefetch_l1_fault r25 } + 50a8: [0-9a-f]* { tblidxb0 r5, r6 ; info 19 ; prefetch_l1_fault r25 } + 50b0: [0-9a-f]* { tblidxb2 r5, r6 ; info 19 ; prefetch_l2_fault r25 } + 50b8: [0-9a-f]* { info 19 ; v1cmples r5, r6, r7 } + 50c0: [0-9a-f]* { info 19 ; v1mz r15, r16, r17 } + 50c8: [0-9a-f]* { info 19 ; v2cmpltu r15, r16, r17 } + 50d0: [0-9a-f]* { info 19 ; v2shli r5, r6, 5 } + 50d8: [0-9a-f]* { info 19 ; xor r15, r16, r17 ; ld1u r25, r26 } + 50e0: [0-9a-f]* { infol 4660 ; addi r15, r16, 5 } + 50e8: [0-9a-f]* { infol 4660 ; cmpne r15, r16, r17 } + 50f0: [0-9a-f]* { infol 4660 ; flushwb } + 50f8: [0-9a-f]* { infol 4660 ; ldnt2s r15, r16 } + 5100: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; infol 4660 } + 5108: [0-9a-f]* { infol 4660 ; shl1addx r15, r16, r17 } + 5110: [0-9a-f]* { infol 4660 ; stnt2 r15, r16 } + 5118: [0-9a-f]* { infol 4660 ; v1cmpne r5, r6, r7 } + 5120: [0-9a-f]* { infol 4660 ; v1shru r15, r16, r17 } + 5128: [0-9a-f]* { infol 4660 ; v2maxs r15, r16, r17 } + 5130: [0-9a-f]* { infol 4660 ; v2sub r5, r6, r7 } + 5138: [0-9a-f]* { bfextu r5, r6, 5, 7 ; inv r15 } + 5140: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; inv r15 } + 5148: [0-9a-f]* { revbytes r5, r6 ; inv r15 } + 5150: [0-9a-f]* { v1cmpltui r5, r6, 5 ; inv r15 } + 5158: [0-9a-f]* { v2cmples r5, r6, r7 ; inv r15 } + 5160: [0-9a-f]* { v4packsc r5, r6, r7 ; inv r15 } + 5168: [0-9a-f]* { crc32_32 r5, r6, r7 ; iret } + 5170: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; iret } + 5178: [0-9a-f]* { sub r5, r6, r7 ; iret } + 5180: [0-9a-f]* { v1mulus r5, r6, r7 ; iret } + 5188: [0-9a-f]* { v2packl r5, r6, r7 ; iret } + 5190: [0-9a-f]* { add r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + 5198: [0-9a-f]* { addx r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + 51a0: [0-9a-f]* { and r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + 51a8: [0-9a-f]* { clz r5, r6 ; jalr r15 ; prefetch_l3 r25 } + 51b0: [0-9a-f]* { cmovnez r5, r6, r7 ; jalr r15 ; st r25, r26 } + 51b8: [0-9a-f]* { cmpeqi r5, r6, 5 ; jalr r15 ; st2 r25, r26 } + 51c0: [0-9a-f]* { cmpleu r5, r6, r7 ; jalr r15 } + 51c8: [0-9a-f]* { cmpltu r5, r6, r7 ; jalr r15 ; ld1s r25, r26 } + 51d0: [0-9a-f]* { cmulaf r5, r6, r7 ; jalr r15 } + 51d8: [0-9a-f]* { jalr r15 ; ld1u r25, r26 } + 51e0: [0-9a-f]* { fsingle_pack2 r5, r6, r7 ; jalr r15 } + 51e8: [0-9a-f]* { jalr r15 ; ld r25, r26 } + 51f0: [0-9a-f]* { tblidxb1 r5, r6 ; jalr r15 ; ld r25, r26 } + 51f8: [0-9a-f]* { nop ; jalr r15 ; ld1s r25, r26 } + 5200: [0-9a-f]* { cmpleu r5, r6, r7 ; jalr r15 ; ld1u r25, r26 } + 5208: [0-9a-f]* { shrsi r5, r6, 5 ; jalr r15 ; ld1u r25, r26 } + 5210: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } + 5218: [0-9a-f]* { clz r5, r6 ; jalr r15 ; ld2u r25, r26 } + 5220: [0-9a-f]* { shl2add r5, r6, r7 ; jalr r15 ; ld2u r25, r26 } + 5228: [0-9a-f]* { movei r5, 5 ; jalr r15 ; ld4s r25, r26 } + 5230: [0-9a-f]* { add r5, r6, r7 ; jalr r15 ; ld4u r25, r26 } + 5238: [0-9a-f]* { revbytes r5, r6 ; jalr r15 ; ld4u r25, r26 } + 5240: [0-9a-f]* { mnz r5, r6, r7 ; jalr r15 ; st2 r25, r26 } + 5248: [0-9a-f]* { movei r5, 5 ; jalr r15 } + 5250: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; jalr r15 ; st2 r25, r26 } + 5258: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; jalr r15 ; st1 r25, r26 } + 5260: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jalr r15 ; st r25, r26 } + 5268: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + 5270: [0-9a-f]* { mulx r5, r6, r7 ; jalr r15 ; st1 r25, r26 } + 5278: [0-9a-f]* { nop ; jalr r15 ; st4 r25, r26 } + 5280: [0-9a-f]* { ori r5, r6, 5 ; jalr r15 } + 5288: [0-9a-f]* { info 19 ; jalr r15 ; prefetch r25 } + 5290: [0-9a-f]* { tblidxb3 r5, r6 ; jalr r15 ; prefetch r25 } + 5298: [0-9a-f]* { or r5, r6, r7 ; jalr r15 ; prefetch r25 } + 52a0: [0-9a-f]* { cmpltsi r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 } + 52a8: [0-9a-f]* { shrui r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 } + 52b0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 } + 52b8: [0-9a-f]* { cmovnez r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 } + 52c0: [0-9a-f]* { shl3add r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 } + 52c8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + 52d0: [0-9a-f]* { addx r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + 52d8: [0-9a-f]* { rotli r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 } + 52e0: [0-9a-f]* { revbytes r5, r6 ; jalr r15 ; ld r25, r26 } + 52e8: [0-9a-f]* { rotli r5, r6, 5 ; jalr r15 ; ld1u r25, r26 } + 52f0: [0-9a-f]* { shl1add r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } + 52f8: [0-9a-f]* { shl2add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + 5300: [0-9a-f]* { shl3add r5, r6, r7 ; jalr r15 ; prefetch r25 } + 5308: [0-9a-f]* { shli r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 } + 5310: [0-9a-f]* { shrsi r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 } + 5318: [0-9a-f]* { shrui r5, r6, 5 ; jalr r15 ; prefetch_l2_fault r25 } + 5320: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jalr r15 ; st r25, r26 } + 5328: [0-9a-f]* { clz r5, r6 ; jalr r15 ; st1 r25, r26 } + 5330: [0-9a-f]* { shl2add r5, r6, r7 ; jalr r15 ; st1 r25, r26 } + 5338: [0-9a-f]* { movei r5, 5 ; jalr r15 ; st2 r25, r26 } + 5340: [0-9a-f]* { add r5, r6, r7 ; jalr r15 ; st4 r25, r26 } + 5348: [0-9a-f]* { revbytes r5, r6 ; jalr r15 ; st4 r25, r26 } + 5350: [0-9a-f]* { sub r5, r6, r7 ; jalr r15 ; st4 r25, r26 } + 5358: [0-9a-f]* { tblidxb0 r5, r6 ; jalr r15 } + 5360: [0-9a-f]* { tblidxb3 r5, r6 ; jalr r15 ; ld1s r25, r26 } + 5368: [0-9a-f]* { v1dotpus r5, r6, r7 ; jalr r15 } + 5370: [0-9a-f]* { v2int_l r5, r6, r7 ; jalr r15 } + 5378: [0-9a-f]* { xor r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } + 5380: [0-9a-f]* { addi r5, r6, 5 ; jalrp r15 ; ld2u r25, r26 } + 5388: [0-9a-f]* { addxi r5, r6, 5 ; jalrp r15 ; ld4s r25, r26 } + 5390: [0-9a-f]* { andi r5, r6, 5 ; jalrp r15 ; ld4s r25, r26 } + 5398: [0-9a-f]* { cmoveqz r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 } + 53a0: [0-9a-f]* { cmpeq r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 } + 53a8: [0-9a-f]* { cmples r5, r6, r7 ; jalrp r15 ; prefetch r25 } + 53b0: [0-9a-f]* { cmplts r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 } + 53b8: [0-9a-f]* { cmpltu r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 } + 53c0: [0-9a-f]* { ctz r5, r6 ; jalrp r15 ; ld2u r25, r26 } + 53c8: [0-9a-f]* { jalrp r15 ; prefetch_l3_fault r25 } + 53d0: [0-9a-f]* { info 19 ; jalrp r15 ; prefetch_l1_fault r25 } + 53d8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jalrp r15 ; ld r25, r26 } + 53e0: [0-9a-f]* { clz r5, r6 ; jalrp r15 ; ld1s r25, r26 } + 53e8: [0-9a-f]* { shl2add r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 } + 53f0: [0-9a-f]* { movei r5, 5 ; jalrp r15 ; ld1u r25, r26 } + 53f8: [0-9a-f]* { add r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 } + 5400: [0-9a-f]* { revbytes r5, r6 ; jalrp r15 ; ld2s r25, r26 } + 5408: [0-9a-f]* { ctz r5, r6 ; jalrp r15 ; ld2u r25, r26 } + 5410: [0-9a-f]* { tblidxb0 r5, r6 ; jalrp r15 ; ld2u r25, r26 } + 5418: [0-9a-f]* { mz r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 } + 5420: [0-9a-f]* { cmples r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 } + 5428: [0-9a-f]* { shrs r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 } + 5430: [0-9a-f]* { move r5, r6 ; jalrp r15 ; prefetch r25 } + 5438: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 } + 5440: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 } + 5448: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch r25 } + 5450: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 } + 5458: [0-9a-f]* { mulax r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 } + 5460: [0-9a-f]* { mz r5, r6, r7 ; jalrp r15 ; prefetch r25 } + 5468: [0-9a-f]* { nor r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 } + 5470: [0-9a-f]* { pcnt r5, r6 ; jalrp r15 ; prefetch_l2 r25 } + 5478: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; jalrp r15 ; prefetch r25 } + 5480: [0-9a-f]* { cmovnez r5, r6, r7 ; jalrp r15 ; prefetch r25 } + 5488: [0-9a-f]* { shl3add r5, r6, r7 ; jalrp r15 ; prefetch r25 } + 5490: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 } + 5498: [0-9a-f]* { addx r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 } + 54a0: [0-9a-f]* { rotli r5, r6, 5 ; jalrp r15 ; prefetch_l2 r25 } + 54a8: [0-9a-f]* { fsingle_pack1 r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 } + 54b0: [0-9a-f]* { tblidxb2 r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 } + 54b8: [0-9a-f]* { nor r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 } + 54c0: [0-9a-f]* { cmplts r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 } + 54c8: [0-9a-f]* { shru r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 } + 54d0: [0-9a-f]* { revbytes r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 } + 54d8: [0-9a-f]* { rotli r5, r6, 5 ; jalrp r15 ; prefetch_l3_fault r25 } + 54e0: [0-9a-f]* { shl1add r5, r6, r7 ; jalrp r15 ; st r25, r26 } + 54e8: [0-9a-f]* { shl2add r5, r6, r7 ; jalrp r15 ; st2 r25, r26 } + 54f0: [0-9a-f]* { shl3add r5, r6, r7 ; jalrp r15 } + 54f8: [0-9a-f]* { shlxi r5, r6, 5 ; jalrp r15 } + 5500: [0-9a-f]* { shru r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 } + 5508: [0-9a-f]* { add r5, r6, r7 ; jalrp r15 ; st r25, r26 } + 5510: [0-9a-f]* { revbytes r5, r6 ; jalrp r15 ; st r25, r26 } + 5518: [0-9a-f]* { ctz r5, r6 ; jalrp r15 ; st1 r25, r26 } + 5520: [0-9a-f]* { tblidxb0 r5, r6 ; jalrp r15 ; st1 r25, r26 } + 5528: [0-9a-f]* { mz r5, r6, r7 ; jalrp r15 ; st2 r25, r26 } + 5530: [0-9a-f]* { cmples r5, r6, r7 ; jalrp r15 ; st4 r25, r26 } + 5538: [0-9a-f]* { shrs r5, r6, r7 ; jalrp r15 ; st4 r25, r26 } + 5540: [0-9a-f]* { subx r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 } + 5548: [0-9a-f]* { tblidxb1 r5, r6 ; jalrp r15 ; prefetch_l2 r25 } + 5550: [0-9a-f]* { tblidxb3 r5, r6 ; jalrp r15 ; prefetch_l3 r25 } + 5558: [0-9a-f]* { v1mulus r5, r6, r7 ; jalrp r15 } + 5560: [0-9a-f]* { v2packl r5, r6, r7 ; jalrp r15 } + 5568: [0-9a-f]* { xor r5, r6, r7 ; jalrp r15 ; st r25, r26 } + 5570: [0-9a-f]* { addi r5, r6, 5 ; jr r15 ; st1 r25, r26 } + 5578: [0-9a-f]* { addxi r5, r6, 5 ; jr r15 ; st2 r25, r26 } + 5580: [0-9a-f]* { andi r5, r6, 5 ; jr r15 ; st2 r25, r26 } + 5588: [0-9a-f]* { cmoveqz r5, r6, r7 ; jr r15 ; st1 r25, r26 } + 5590: [0-9a-f]* { cmpeq r5, r6, r7 ; jr r15 ; st4 r25, r26 } + 5598: [0-9a-f]* { cmpleu r5, r6, r7 ; jr r15 ; ld r25, r26 } + 55a0: [0-9a-f]* { cmpltsi r5, r6, 5 ; jr r15 ; ld1u r25, r26 } + 55a8: [0-9a-f]* { cmpne r5, r6, r7 ; jr r15 ; ld2s r25, r26 } + 55b0: [0-9a-f]* { ctz r5, r6 ; jr r15 ; st1 r25, r26 } + 55b8: [0-9a-f]* { fsingle_pack1 r5, r6 ; jr r15 ; ld1s r25, r26 } + 55c0: [0-9a-f]* { add r5, r6, r7 ; jr r15 ; ld r25, r26 } + 55c8: [0-9a-f]* { revbytes r5, r6 ; jr r15 ; ld r25, r26 } + 55d0: [0-9a-f]* { ctz r5, r6 ; jr r15 ; ld1s r25, r26 } + 55d8: [0-9a-f]* { tblidxb0 r5, r6 ; jr r15 ; ld1s r25, r26 } + 55e0: [0-9a-f]* { mz r5, r6, r7 ; jr r15 ; ld1u r25, r26 } + 55e8: [0-9a-f]* { cmples r5, r6, r7 ; jr r15 ; ld2s r25, r26 } + 55f0: [0-9a-f]* { shrs r5, r6, r7 ; jr r15 ; ld2s r25, r26 } + 55f8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jr r15 ; ld2u r25, r26 } + 5600: [0-9a-f]* { andi r5, r6, 5 ; jr r15 ; ld4s r25, r26 } + 5608: [0-9a-f]* { shl1addx r5, r6, r7 ; jr r15 ; ld4s r25, r26 } + 5610: [0-9a-f]* { move r5, r6 ; jr r15 ; ld4u r25, r26 } + 5618: [0-9a-f]* { jr r15 ; ld4u r25, r26 } + 5620: [0-9a-f]* { movei r5, 5 ; jr r15 ; ld r25, r26 } + 5628: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; jr r15 } + 5630: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jr r15 ; st4 r25, r26 } + 5638: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jr r15 } + 5640: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jr r15 ; st1 r25, r26 } + 5648: [0-9a-f]* { mulax r5, r6, r7 ; jr r15 ; st2 r25, r26 } + 5650: [0-9a-f]* { mz r5, r6, r7 ; jr r15 } + 5658: [0-9a-f]* { or r5, r6, r7 ; jr r15 ; ld1s r25, r26 } + 5660: [0-9a-f]* { addx r5, r6, r7 ; jr r15 ; prefetch r25 } + 5668: [0-9a-f]* { rotli r5, r6, 5 ; jr r15 ; prefetch r25 } + 5670: [0-9a-f]* { fsingle_pack1 r5, r6 ; jr r15 ; prefetch r25 } + 5678: [0-9a-f]* { tblidxb2 r5, r6 ; jr r15 ; prefetch r25 } + 5680: [0-9a-f]* { nor r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 } + 5688: [0-9a-f]* { cmplts r5, r6, r7 ; jr r15 ; prefetch_l2 r25 } + 5690: [0-9a-f]* { shru r5, r6, r7 ; jr r15 ; prefetch_l2 r25 } + 5698: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 } + 56a0: [0-9a-f]* { cmoveqz r5, r6, r7 ; jr r15 ; prefetch_l3 r25 } + 56a8: [0-9a-f]* { shl2addx r5, r6, r7 ; jr r15 ; prefetch_l3 r25 } + 56b0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; jr r15 ; prefetch_l3_fault r25 } + 56b8: [0-9a-f]* { revbits r5, r6 ; jr r15 ; ld1s r25, r26 } + 56c0: [0-9a-f]* { rotl r5, r6, r7 ; jr r15 ; ld2s r25, r26 } + 56c8: [0-9a-f]* { shl r5, r6, r7 ; jr r15 ; ld4s r25, r26 } + 56d0: [0-9a-f]* { shl1addx r5, r6, r7 ; jr r15 ; ld4u r25, r26 } + 56d8: [0-9a-f]* { shl2addx r5, r6, r7 ; jr r15 ; prefetch r25 } + 56e0: [0-9a-f]* { shl3addx r5, r6, r7 ; jr r15 ; prefetch_l2 r25 } + 56e8: [0-9a-f]* { shrs r5, r6, r7 ; jr r15 ; prefetch_l2 r25 } + 56f0: [0-9a-f]* { shru r5, r6, r7 ; jr r15 ; prefetch_l3 r25 } + 56f8: [0-9a-f]* { cmples r5, r6, r7 ; jr r15 ; st r25, r26 } + 5700: [0-9a-f]* { shrs r5, r6, r7 ; jr r15 ; st r25, r26 } + 5708: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jr r15 ; st1 r25, r26 } + 5710: [0-9a-f]* { andi r5, r6, 5 ; jr r15 ; st2 r25, r26 } + 5718: [0-9a-f]* { shl1addx r5, r6, r7 ; jr r15 ; st2 r25, r26 } + 5720: [0-9a-f]* { move r5, r6 ; jr r15 ; st4 r25, r26 } + 5728: [0-9a-f]* { jr r15 ; st4 r25, r26 } + 5730: [0-9a-f]* { tblidxb0 r5, r6 ; jr r15 ; ld r25, r26 } + 5738: [0-9a-f]* { tblidxb2 r5, r6 ; jr r15 ; ld1u r25, r26 } + 5740: [0-9a-f]* { v1avgu r5, r6, r7 ; jr r15 } + 5748: [0-9a-f]* { v1subuc r5, r6, r7 ; jr r15 } + 5750: [0-9a-f]* { v2shru r5, r6, r7 ; jr r15 } + 5758: [0-9a-f]* { add r5, r6, r7 ; jrp r15 ; ld4s r25, r26 } + 5760: [0-9a-f]* { addx r5, r6, r7 ; jrp r15 ; ld4u r25, r26 } + 5768: [0-9a-f]* { and r5, r6, r7 ; jrp r15 ; ld4u r25, r26 } + 5770: [0-9a-f]* { clz r5, r6 ; jrp r15 ; ld4s r25, r26 } + 5778: [0-9a-f]* { cmovnez r5, r6, r7 ; jrp r15 ; prefetch r25 } + 5780: [0-9a-f]* { cmpeqi r5, r6, 5 ; jrp r15 ; prefetch_l1_fault r25 } + 5788: [0-9a-f]* { cmpleu r5, r6, r7 ; jrp r15 ; prefetch_l2_fault r25 } + 5790: [0-9a-f]* { cmpltsi r5, r6, 5 ; jrp r15 ; prefetch_l3_fault r25 } + 5798: [0-9a-f]* { cmpne r5, r6, r7 ; jrp r15 ; st r25, r26 } + 57a0: [0-9a-f]* { fdouble_pack1 r5, r6, r7 ; jrp r15 } + 57a8: [0-9a-f]* { fsingle_pack1 r5, r6 ; jrp r15 ; prefetch_l3 r25 } + 57b0: [0-9a-f]* { cmples r5, r6, r7 ; jrp r15 ; ld r25, r26 } + 57b8: [0-9a-f]* { shrs r5, r6, r7 ; jrp r15 ; ld r25, r26 } + 57c0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jrp r15 ; ld1s r25, r26 } + 57c8: [0-9a-f]* { andi r5, r6, 5 ; jrp r15 ; ld1u r25, r26 } + 57d0: [0-9a-f]* { shl1addx r5, r6, r7 ; jrp r15 ; ld1u r25, r26 } + 57d8: [0-9a-f]* { move r5, r6 ; jrp r15 ; ld2s r25, r26 } + 57e0: [0-9a-f]* { jrp r15 ; ld2s r25, r26 } + 57e8: [0-9a-f]* { revbits r5, r6 ; jrp r15 ; ld2u r25, r26 } + 57f0: [0-9a-f]* { cmpne r5, r6, r7 ; jrp r15 ; ld4s r25, r26 } + 57f8: [0-9a-f]* { subx r5, r6, r7 ; jrp r15 ; ld4s r25, r26 } + 5800: [0-9a-f]* { mulx r5, r6, r7 ; jrp r15 ; ld4u r25, r26 } + 5808: [0-9a-f]* { mnz r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 } + 5810: [0-9a-f]* { movei r5, 5 ; jrp r15 ; prefetch_l2_fault r25 } + 5818: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 } + 5820: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; jrp r15 ; prefetch r25 } + 5828: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jrp r15 ; prefetch r25 } + 5830: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; jrp r15 ; ld4u r25, r26 } + 5838: [0-9a-f]* { mulx r5, r6, r7 ; jrp r15 ; prefetch r25 } + 5840: [0-9a-f]* { nop ; jrp r15 ; prefetch_l2 r25 } + 5848: [0-9a-f]* { or r5, r6, r7 ; jrp r15 ; prefetch_l3 r25 } + 5850: [0-9a-f]* { cmplts r5, r6, r7 ; jrp r15 ; prefetch r25 } + 5858: [0-9a-f]* { shru r5, r6, r7 ; jrp r15 ; prefetch r25 } + 5860: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jrp r15 ; prefetch r25 } + 5868: [0-9a-f]* { cmoveqz r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 } + 5870: [0-9a-f]* { shl2addx r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 } + 5878: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; jrp r15 ; prefetch_l2 r25 } + 5880: [0-9a-f]* { addi r5, r6, 5 ; jrp r15 ; prefetch_l2_fault r25 } + 5888: [0-9a-f]* { rotl r5, r6, r7 ; jrp r15 ; prefetch_l2_fault r25 } + 5890: [0-9a-f]* { jrp r15 ; prefetch_l3 r25 } + 5898: [0-9a-f]* { tblidxb1 r5, r6 ; jrp r15 ; prefetch_l3 r25 } + 58a0: [0-9a-f]* { nop ; jrp r15 ; prefetch_l3_fault r25 } + 58a8: [0-9a-f]* { revbits r5, r6 ; jrp r15 ; prefetch_l3 r25 } + 58b0: [0-9a-f]* { rotl r5, r6, r7 ; jrp r15 ; st r25, r26 } + 58b8: [0-9a-f]* { shl r5, r6, r7 ; jrp r15 ; st2 r25, r26 } + 58c0: [0-9a-f]* { shl1addx r5, r6, r7 ; jrp r15 ; st4 r25, r26 } + 58c8: [0-9a-f]* { shl3add r5, r6, r7 ; jrp r15 ; ld r25, r26 } + 58d0: [0-9a-f]* { shli r5, r6, 5 ; jrp r15 ; ld1u r25, r26 } + 58d8: [0-9a-f]* { shrsi r5, r6, 5 ; jrp r15 ; ld1u r25, r26 } + 58e0: [0-9a-f]* { shrui r5, r6, 5 ; jrp r15 ; ld2u r25, r26 } + 58e8: [0-9a-f]* { move r5, r6 ; jrp r15 ; st r25, r26 } + 58f0: [0-9a-f]* { jrp r15 ; st r25, r26 } + 58f8: [0-9a-f]* { revbits r5, r6 ; jrp r15 ; st1 r25, r26 } + 5900: [0-9a-f]* { cmpne r5, r6, r7 ; jrp r15 ; st2 r25, r26 } + 5908: [0-9a-f]* { subx r5, r6, r7 ; jrp r15 ; st2 r25, r26 } + 5910: [0-9a-f]* { mulx r5, r6, r7 ; jrp r15 ; st4 r25, r26 } + 5918: [0-9a-f]* { sub r5, r6, r7 ; jrp r15 ; prefetch_l2 r25 } + 5920: [0-9a-f]* { tblidxb0 r5, r6 ; jrp r15 ; prefetch_l2_fault r25 } + 5928: [0-9a-f]* { tblidxb2 r5, r6 ; jrp r15 ; prefetch_l3_fault r25 } + 5930: [0-9a-f]* { v1ddotpua r5, r6, r7 ; jrp r15 } + 5938: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; jrp r15 } + 5940: [0-9a-f]* { v4shrs r5, r6, r7 ; jrp r15 } + 5948: [0-9a-f]* { cmpeqi r5, r6, 5 ; ld r15, r16 } + 5950: [0-9a-f]* { mm r5, r6, 5, 7 ; ld r15, r16 } + 5958: [0-9a-f]* { shl1addx r5, r6, r7 ; ld r15, r16 } + 5960: [0-9a-f]* { v1dotp r5, r6, r7 ; ld r15, r16 } + 5968: [0-9a-f]* { v2cmpne r5, r6, r7 ; ld r15, r16 } + 5970: [0-9a-f]* { v4subsc r5, r6, r7 ; ld r15, r16 } + 5978: [0-9a-f]* { add r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 } + 5980: [0-9a-f]* { add r5, r6, r7 ; ld r25, r26 } + 5988: [0-9a-f]* { cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 } + 5990: [0-9a-f]* { addi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 } + 5998: [0-9a-f]* { addi r5, r6, 5 ; movei r15, 5 ; ld r25, r26 } + 59a0: [0-9a-f]* { ctz r5, r6 ; addx r15, r16, r17 ; ld r25, r26 } + 59a8: [0-9a-f]* { tblidxb0 r5, r6 ; addx r15, r16, r17 ; ld r25, r26 } + 59b0: [0-9a-f]* { addx r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 } + 59b8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 } + 59c0: [0-9a-f]* { addxi r5, r6, 5 ; and r15, r16, r17 ; ld r25, r26 } + 59c8: [0-9a-f]* { addxi r5, r6, 5 ; subx r15, r16, r17 ; ld r25, r26 } + 59d0: [0-9a-f]* { and r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 } + 59d8: [0-9a-f]* { and r5, r6, r7 ; ld r25, r26 } + 59e0: [0-9a-f]* { cmoveqz r5, r6, r7 ; andi r15, r16, 5 ; ld r25, r26 } + 59e8: [0-9a-f]* { andi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 } + 59f0: [0-9a-f]* { andi r5, r6, 5 ; movei r15, 5 ; ld r25, r26 } + 59f8: [0-9a-f]* { clz r5, r6 ; jalr r15 ; ld r25, r26 } + 5a00: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + 5a08: [0-9a-f]* { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 } + 5a10: [0-9a-f]* { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } + 5a18: [0-9a-f]* { cmpeq r15, r16, r17 ; nor r5, r6, r7 ; ld r25, r26 } + 5a20: [0-9a-f]* { cmpeq r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 } + 5a28: [0-9a-f]* { clz r5, r6 ; cmpeqi r15, r16, 5 ; ld r25, r26 } + 5a30: [0-9a-f]* { cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 ; ld r25, r26 } + 5a38: [0-9a-f]* { cmpeqi r5, r6, 5 ; move r15, r16 ; ld r25, r26 } + 5a40: [0-9a-f]* { cmples r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 } + 5a48: [0-9a-f]* { cmples r15, r16, r17 ; subx r5, r6, r7 ; ld r25, r26 } + 5a50: [0-9a-f]* { cmples r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + 5a58: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; ld r25, r26 } + 5a60: [0-9a-f]* { cmpleu r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 } + 5a68: [0-9a-f]* { cmpleu r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } + 5a70: [0-9a-f]* { cmplts r15, r16, r17 ; nor r5, r6, r7 ; ld r25, r26 } + 5a78: [0-9a-f]* { cmplts r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 } + 5a80: [0-9a-f]* { clz r5, r6 ; cmpltsi r15, r16, 5 ; ld r25, r26 } + 5a88: [0-9a-f]* { cmpltsi r15, r16, 5 ; shl2add r5, r6, r7 ; ld r25, r26 } + 5a90: [0-9a-f]* { cmpltsi r5, r6, 5 ; move r15, r16 ; ld r25, r26 } + 5a98: [0-9a-f]* { cmpltu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 } + 5aa0: [0-9a-f]* { cmpltu r15, r16, r17 ; subx r5, r6, r7 ; ld r25, r26 } + 5aa8: [0-9a-f]* { cmpltu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + 5ab0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 } + 5ab8: [0-9a-f]* { cmpne r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 } + 5ac0: [0-9a-f]* { cmpne r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } + 5ac8: [0-9a-f]* { ctz r5, r6 ; shl3add r15, r16, r17 ; ld r25, r26 } + 5ad0: [0-9a-f]* { cmpne r15, r16, r17 ; ld r25, r26 } + 5ad8: [0-9a-f]* { rotli r15, r16, 5 ; ld r25, r26 } + 5ae0: [0-9a-f]* { fsingle_pack1 r5, r6 ; addxi r15, r16, 5 ; ld r25, r26 } + 5ae8: [0-9a-f]* { fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; ld r25, r26 } + 5af0: [0-9a-f]* { nor r5, r6, r7 ; ill ; ld r25, r26 } + 5af8: [0-9a-f]* { cmoveqz r5, r6, r7 ; info 19 ; ld r25, r26 } + 5b00: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; info 19 ; ld r25, r26 } + 5b08: [0-9a-f]* { info 19 ; shrui r15, r16, 5 ; ld r25, r26 } + 5b10: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; jalr r15 ; ld r25, r26 } + 5b18: [0-9a-f]* { and r5, r6, r7 ; jalrp r15 ; ld r25, r26 } + 5b20: [0-9a-f]* { shl1add r5, r6, r7 ; jalrp r15 ; ld r25, r26 } + 5b28: [0-9a-f]* { mnz r5, r6, r7 ; jr r15 ; ld r25, r26 } + 5b30: [0-9a-f]* { xor r5, r6, r7 ; jr r15 ; ld r25, r26 } + 5b38: [0-9a-f]* { pcnt r5, r6 ; jrp r15 ; ld r25, r26 } + 5b40: [0-9a-f]* { cmpltu r5, r6, r7 ; lnk r15 ; ld r25, r26 } + 5b48: [0-9a-f]* { sub r5, r6, r7 ; lnk r15 ; ld r25, r26 } + 5b50: [0-9a-f]* { mulax r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + 5b58: [0-9a-f]* { mnz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld r25, r26 } + 5b60: [0-9a-f]* { move r15, r16 ; addx r5, r6, r7 ; ld r25, r26 } + 5b68: [0-9a-f]* { move r15, r16 ; rotli r5, r6, 5 ; ld r25, r26 } + 5b70: [0-9a-f]* { move r5, r6 ; jr r15 ; ld r25, r26 } + 5b78: [0-9a-f]* { movei r15, 5 ; cmpleu r5, r6, r7 ; ld r25, r26 } + 5b80: [0-9a-f]* { movei r15, 5 ; shrsi r5, r6, 5 ; ld r25, r26 } + 5b88: [0-9a-f]* { movei r5, 5 ; rotl r15, r16, r17 ; ld r25, r26 } + 5b90: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + 5b98: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; ill ; ld r25, r26 } + 5ba0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 } + 5ba8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 } + 5bb0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; ld r25, r26 } + 5bb8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 } + 5bc0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; ld r25, r26 } + 5bc8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jrp r15 ; ld r25, r26 } + 5bd0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 } + 5bd8: [0-9a-f]* { mulax r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 } + 5be0: [0-9a-f]* { mulax r5, r6, r7 ; ld r25, r26 } + 5be8: [0-9a-f]* { mulx r5, r6, r7 ; shrs r15, r16, r17 ; ld r25, r26 } + 5bf0: [0-9a-f]* { mulax r5, r6, r7 ; mz r15, r16, r17 ; ld r25, r26 } + 5bf8: [0-9a-f]* { mz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld r25, r26 } + 5c00: [0-9a-f]* { nop ; addi r15, r16, 5 ; ld r25, r26 } + 5c08: [0-9a-f]* { nop ; mnz r5, r6, r7 ; ld r25, r26 } + 5c10: [0-9a-f]* { nop ; shl3add r5, r6, r7 ; ld r25, r26 } + 5c18: [0-9a-f]* { nor r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 } + 5c20: [0-9a-f]* { nor r15, r16, r17 ; subx r5, r6, r7 ; ld r25, r26 } + 5c28: [0-9a-f]* { nor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + 5c30: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 } + 5c38: [0-9a-f]* { or r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 } + 5c40: [0-9a-f]* { or r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } + 5c48: [0-9a-f]* { pcnt r5, r6 ; shl3add r15, r16, r17 ; ld r25, r26 } + 5c50: [0-9a-f]* { revbits r5, r6 ; rotl r15, r16, r17 ; ld r25, r26 } + 5c58: [0-9a-f]* { revbytes r5, r6 ; mnz r15, r16, r17 ; ld r25, r26 } + 5c60: [0-9a-f]* { rotl r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 } + 5c68: [0-9a-f]* { rotl r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 } + 5c70: [0-9a-f]* { rotl r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 } + 5c78: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; rotli r15, r16, 5 ; ld r25, r26 } + 5c80: [0-9a-f]* { rotli r5, r6, 5 ; addx r15, r16, r17 ; ld r25, r26 } + 5c88: [0-9a-f]* { rotli r5, r6, 5 ; shrui r15, r16, 5 ; ld r25, r26 } + 5c90: [0-9a-f]* { shl r15, r16, r17 ; nop ; ld r25, r26 } + 5c98: [0-9a-f]* { shl r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 } + 5ca0: [0-9a-f]* { shl1add r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 } + 5ca8: [0-9a-f]* { shl1add r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 } + 5cb0: [0-9a-f]* { shl1add r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + 5cb8: [0-9a-f]* { shl1addx r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 } + 5cc0: [0-9a-f]* { shl1addx r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 } + 5cc8: [0-9a-f]* { shl1addx r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 } + 5cd0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 } + 5cd8: [0-9a-f]* { shl2add r5, r6, r7 ; addx r15, r16, r17 ; ld r25, r26 } + 5ce0: [0-9a-f]* { shl2add r5, r6, r7 ; shrui r15, r16, 5 ; ld r25, r26 } + 5ce8: [0-9a-f]* { shl2addx r15, r16, r17 ; nop ; ld r25, r26 } + 5cf0: [0-9a-f]* { shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 } + 5cf8: [0-9a-f]* { shl3add r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 } + 5d00: [0-9a-f]* { shl3add r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 } + 5d08: [0-9a-f]* { shl3add r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + 5d10: [0-9a-f]* { shl3addx r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 } + 5d18: [0-9a-f]* { shl3addx r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 } + 5d20: [0-9a-f]* { shl3addx r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 } + 5d28: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; ld r25, r26 } + 5d30: [0-9a-f]* { shli r5, r6, 5 ; addx r15, r16, r17 ; ld r25, r26 } + 5d38: [0-9a-f]* { shli r5, r6, 5 ; shrui r15, r16, 5 ; ld r25, r26 } + 5d40: [0-9a-f]* { shrs r15, r16, r17 ; nop ; ld r25, r26 } + 5d48: [0-9a-f]* { shrs r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 } + 5d50: [0-9a-f]* { shrsi r15, r16, 5 ; andi r5, r6, 5 ; ld r25, r26 } + 5d58: [0-9a-f]* { shrsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld r25, r26 } + 5d60: [0-9a-f]* { shrsi r5, r6, 5 ; mnz r15, r16, r17 ; ld r25, r26 } + 5d68: [0-9a-f]* { shru r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 } + 5d70: [0-9a-f]* { shru r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 } + 5d78: [0-9a-f]* { shru r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 } + 5d80: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shrui r15, r16, 5 ; ld r25, r26 } + 5d88: [0-9a-f]* { shrui r5, r6, 5 ; addx r15, r16, r17 ; ld r25, r26 } + 5d90: [0-9a-f]* { shrui r5, r6, 5 ; shrui r15, r16, 5 ; ld r25, r26 } + 5d98: [0-9a-f]* { sub r15, r16, r17 ; nop ; ld r25, r26 } + 5da0: [0-9a-f]* { sub r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 } + 5da8: [0-9a-f]* { subx r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 } + 5db0: [0-9a-f]* { subx r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 } + 5db8: [0-9a-f]* { subx r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + 5dc0: [0-9a-f]* { tblidxb0 r5, r6 ; ill ; ld r25, r26 } + 5dc8: [0-9a-f]* { tblidxb1 r5, r6 ; cmples r15, r16, r17 ; ld r25, r26 } + 5dd0: [0-9a-f]* { tblidxb2 r5, r6 ; addi r15, r16, 5 ; ld r25, r26 } + 5dd8: [0-9a-f]* { tblidxb2 r5, r6 ; shru r15, r16, r17 ; ld r25, r26 } + 5de0: [0-9a-f]* { tblidxb3 r5, r6 ; shl2add r15, r16, r17 ; ld r25, r26 } + 5de8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 } + 5df0: [0-9a-f]* { xor r5, r6, r7 ; and r15, r16, r17 ; ld r25, r26 } + 5df8: [0-9a-f]* { xor r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 } + 5e00: [0-9a-f]* { dblalign6 r5, r6, r7 ; ld1s r15, r16 } + 5e08: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; ld1s r15, r16 } + 5e10: [0-9a-f]* { tblidxb3 r5, r6 ; ld1s r15, r16 } + 5e18: [0-9a-f]* { v1shrs r5, r6, r7 ; ld1s r15, r16 } + 5e20: [0-9a-f]* { v2shl r5, r6, r7 ; ld1s r15, r16 } + 5e28: [0-9a-f]* { add r15, r16, r17 ; ld1s r25, r26 } + 5e30: [0-9a-f]* { tblidxb1 r5, r6 ; add r15, r16, r17 ; ld1s r25, r26 } + 5e38: [0-9a-f]* { add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 } + 5e40: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld1s r25, r26 } + 5e48: [0-9a-f]* { addi r5, r6, 5 ; andi r15, r16, 5 ; ld1s r25, r26 } + 5e50: [0-9a-f]* { addi r5, r6, 5 ; xor r15, r16, r17 ; ld1s r25, r26 } + 5e58: [0-9a-f]* { pcnt r5, r6 ; addx r15, r16, r17 ; ld1s r25, r26 } + 5e60: [0-9a-f]* { addx r5, r6, r7 ; ill ; ld1s r25, r26 } + 5e68: [0-9a-f]* { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 } + 5e70: [0-9a-f]* { addxi r15, r16, 5 ; shl3add r5, r6, r7 ; ld1s r25, r26 } + 5e78: [0-9a-f]* { addxi r5, r6, 5 ; mz r15, r16, r17 ; ld1s r25, r26 } + 5e80: [0-9a-f]* { and r15, r16, r17 ; ld1s r25, r26 } + 5e88: [0-9a-f]* { tblidxb1 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 } + 5e90: [0-9a-f]* { and r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 } + 5e98: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 } + 5ea0: [0-9a-f]* { andi r5, r6, 5 ; andi r15, r16, 5 ; ld1s r25, r26 } + 5ea8: [0-9a-f]* { andi r5, r6, 5 ; xor r15, r16, r17 ; ld1s r25, r26 } + 5eb0: [0-9a-f]* { clz r5, r6 ; shli r15, r16, 5 ; ld1s r25, r26 } + 5eb8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 } + 5ec0: [0-9a-f]* { cmovnez r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } + 5ec8: [0-9a-f]* { ctz r5, r6 ; cmpeq r15, r16, r17 ; ld1s r25, r26 } + 5ed0: [0-9a-f]* { tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld1s r25, r26 } + 5ed8: [0-9a-f]* { cmpeq r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 } + 5ee0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 } + 5ee8: [0-9a-f]* { cmpeqi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 } + 5ef0: [0-9a-f]* { cmpeqi r5, r6, 5 ; subx r15, r16, r17 ; ld1s r25, r26 } + 5ef8: [0-9a-f]* { cmples r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 } + 5f00: [0-9a-f]* { cmples r5, r6, r7 ; ld1s r25, r26 } + 5f08: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1s r25, r26 } + 5f10: [0-9a-f]* { cmpleu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 } + 5f18: [0-9a-f]* { cmpleu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } + 5f20: [0-9a-f]* { ctz r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 } + 5f28: [0-9a-f]* { tblidxb0 r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 } + 5f30: [0-9a-f]* { cmplts r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 } + 5f38: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 } + 5f40: [0-9a-f]* { cmpltsi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 } + 5f48: [0-9a-f]* { cmpltsi r5, r6, 5 ; subx r15, r16, r17 ; ld1s r25, r26 } + 5f50: [0-9a-f]* { cmpltu r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 } + 5f58: [0-9a-f]* { cmpltu r5, r6, r7 ; ld1s r25, r26 } + 5f60: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 } + 5f68: [0-9a-f]* { cmpne r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 } + 5f70: [0-9a-f]* { cmpne r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } + 5f78: [0-9a-f]* { ctz r5, r6 ; jalr r15 ; ld1s r25, r26 } + 5f80: [0-9a-f]* { andi r15, r16, 5 ; ld1s r25, r26 } + 5f88: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; ld1s r25, r26 } + 5f90: [0-9a-f]* { shrsi r5, r6, 5 ; ld1s r25, r26 } + 5f98: [0-9a-f]* { fsingle_pack1 r5, r6 ; movei r15, 5 ; ld1s r25, r26 } + 5fa0: [0-9a-f]* { ctz r5, r6 ; ill ; ld1s r25, r26 } + 5fa8: [0-9a-f]* { tblidxb0 r5, r6 ; ill ; ld1s r25, r26 } + 5fb0: [0-9a-f]* { info 19 ; ill ; ld1s r25, r26 } + 5fb8: [0-9a-f]* { info 19 ; shl1add r5, r6, r7 ; ld1s r25, r26 } + 5fc0: [0-9a-f]* { cmovnez r5, r6, r7 ; jalr r15 ; ld1s r25, r26 } + 5fc8: [0-9a-f]* { shl3add r5, r6, r7 ; jalr r15 ; ld1s r25, r26 } + 5fd0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 } + 5fd8: [0-9a-f]* { addx r5, r6, r7 ; jr r15 ; ld1s r25, r26 } + 5fe0: [0-9a-f]* { rotli r5, r6, 5 ; jr r15 ; ld1s r25, r26 } + 5fe8: [0-9a-f]* { fsingle_pack1 r5, r6 ; jrp r15 ; ld1s r25, r26 } + 5ff0: [0-9a-f]* { tblidxb2 r5, r6 ; jrp r15 ; ld1s r25, r26 } + 5ff8: [0-9a-f]* { nor r5, r6, r7 ; lnk r15 ; ld1s r25, r26 } + 6000: [0-9a-f]* { mnz r15, r16, r17 ; cmplts r5, r6, r7 ; ld1s r25, r26 } + 6008: [0-9a-f]* { mnz r15, r16, r17 ; shru r5, r6, r7 ; ld1s r25, r26 } + 6010: [0-9a-f]* { mnz r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 } + 6018: [0-9a-f]* { move r15, r16 ; movei r5, 5 ; ld1s r25, r26 } + 6020: [0-9a-f]* { move r5, r6 ; add r15, r16, r17 ; ld1s r25, r26 } + 6028: [0-9a-f]* { move r5, r6 ; shrsi r15, r16, 5 ; ld1s r25, r26 } + 6030: [0-9a-f]* { mulx r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } + 6038: [0-9a-f]* { movei r5, 5 ; cmplts r15, r16, r17 ; ld1s r25, r26 } + 6040: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 } + 6048: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 } + 6050: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 } + 6058: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 } + 6060: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld1s r25, r26 } + 6068: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; ill ; ld1s r25, r26 } + 6070: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; ld1s r25, r26 } + 6078: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld1s r25, r26 } + 6080: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld1s r25, r26 } + 6088: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 } + 6090: [0-9a-f]* { mulax r5, r6, r7 ; nor r15, r16, r17 ; ld1s r25, r26 } + 6098: [0-9a-f]* { mulx r5, r6, r7 ; jrp r15 ; ld1s r25, r26 } + 60a0: [0-9a-f]* { mz r15, r16, r17 ; cmplts r5, r6, r7 ; ld1s r25, r26 } + 60a8: [0-9a-f]* { mz r15, r16, r17 ; shru r5, r6, r7 ; ld1s r25, r26 } + 60b0: [0-9a-f]* { mz r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 } + 60b8: [0-9a-f]* { nop ; cmplts r15, r16, r17 ; ld1s r25, r26 } + 60c0: [0-9a-f]* { nop ; or r5, r6, r7 ; ld1s r25, r26 } + 60c8: [0-9a-f]* { nop ; xor r15, r16, r17 ; ld1s r25, r26 } + 60d0: [0-9a-f]* { nor r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 } + 60d8: [0-9a-f]* { nor r5, r6, r7 ; ld1s r25, r26 } + 60e0: [0-9a-f]* { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 } + 60e8: [0-9a-f]* { or r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 } + 60f0: [0-9a-f]* { or r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } + 60f8: [0-9a-f]* { pcnt r5, r6 ; jalr r15 ; ld1s r25, r26 } + 6100: [0-9a-f]* { revbits r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 } + 6108: [0-9a-f]* { revbytes r5, r6 ; addxi r15, r16, 5 ; ld1s r25, r26 } + 6110: [0-9a-f]* { revbytes r5, r6 ; sub r15, r16, r17 ; ld1s r25, r26 } + 6118: [0-9a-f]* { rotl r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 } + 6120: [0-9a-f]* { rotl r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 } + 6128: [0-9a-f]* { clz r5, r6 ; rotli r15, r16, 5 ; ld1s r25, r26 } + 6130: [0-9a-f]* { rotli r15, r16, 5 ; shl2add r5, r6, r7 ; ld1s r25, r26 } + 6138: [0-9a-f]* { rotli r5, r6, 5 ; move r15, r16 ; ld1s r25, r26 } + 6140: [0-9a-f]* { shl r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + 6148: [0-9a-f]* { shl r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 } + 6150: [0-9a-f]* { shl r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + 6158: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld1s r25, r26 } + 6160: [0-9a-f]* { shl1add r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 } + 6168: [0-9a-f]* { shl1add r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 } + 6170: [0-9a-f]* { shl1addx r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 } + 6178: [0-9a-f]* { shl1addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 } + 6180: [0-9a-f]* { clz r5, r6 ; shl2add r15, r16, r17 ; ld1s r25, r26 } + 6188: [0-9a-f]* { shl2add r15, r16, r17 ; shl2add r5, r6, r7 ; ld1s r25, r26 } + 6190: [0-9a-f]* { shl2add r5, r6, r7 ; move r15, r16 ; ld1s r25, r26 } + 6198: [0-9a-f]* { shl2addx r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + 61a0: [0-9a-f]* { shl2addx r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 } + 61a8: [0-9a-f]* { shl2addx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + 61b0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 } + 61b8: [0-9a-f]* { shl3add r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 } + 61c0: [0-9a-f]* { shl3add r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 } + 61c8: [0-9a-f]* { shl3addx r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 } + 61d0: [0-9a-f]* { shl3addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 } + 61d8: [0-9a-f]* { clz r5, r6 ; shli r15, r16, 5 ; ld1s r25, r26 } + 61e0: [0-9a-f]* { shli r15, r16, 5 ; shl2add r5, r6, r7 ; ld1s r25, r26 } + 61e8: [0-9a-f]* { shli r5, r6, 5 ; move r15, r16 ; ld1s r25, r26 } + 61f0: [0-9a-f]* { shrs r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + 61f8: [0-9a-f]* { shrs r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 } + 6200: [0-9a-f]* { shrs r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + 6208: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 } + 6210: [0-9a-f]* { shrsi r5, r6, 5 ; addxi r15, r16, 5 ; ld1s r25, r26 } + 6218: [0-9a-f]* { shrsi r5, r6, 5 ; sub r15, r16, r17 ; ld1s r25, r26 } + 6220: [0-9a-f]* { shru r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 } + 6228: [0-9a-f]* { shru r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 } + 6230: [0-9a-f]* { clz r5, r6 ; shrui r15, r16, 5 ; ld1s r25, r26 } + 6238: [0-9a-f]* { shrui r15, r16, 5 ; shl2add r5, r6, r7 ; ld1s r25, r26 } + 6240: [0-9a-f]* { shrui r5, r6, 5 ; move r15, r16 ; ld1s r25, r26 } + 6248: [0-9a-f]* { sub r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + 6250: [0-9a-f]* { sub r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 } + 6258: [0-9a-f]* { sub r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + 6260: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; subx r15, r16, r17 ; ld1s r25, r26 } + 6268: [0-9a-f]* { subx r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 } + 6270: [0-9a-f]* { subx r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 } + 6278: [0-9a-f]* { tblidxb0 r5, r6 ; shl3add r15, r16, r17 ; ld1s r25, r26 } + 6280: [0-9a-f]* { tblidxb1 r5, r6 ; rotl r15, r16, r17 ; ld1s r25, r26 } + 6288: [0-9a-f]* { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld1s r25, r26 } + 6290: [0-9a-f]* { tblidxb3 r5, r6 ; ill ; ld1s r25, r26 } + 6298: [0-9a-f]* { cmovnez r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 } + 62a0: [0-9a-f]* { xor r15, r16, r17 ; shl3add r5, r6, r7 ; ld1s r25, r26 } + 62a8: [0-9a-f]* { xor r5, r6, r7 ; mz r15, r16, r17 ; ld1s r25, r26 } + 62b0: [0-9a-f]* { cmpleu r5, r6, r7 ; ld1s_add r15, r16, 5 } + 62b8: [0-9a-f]* { move r5, r6 ; ld1s_add r15, r16, 5 } + 62c0: [0-9a-f]* { shl2addx r5, r6, r7 ; ld1s_add r15, r16, 5 } + 62c8: [0-9a-f]* { v1dotpu r5, r6, r7 ; ld1s_add r15, r16, 5 } + 62d0: [0-9a-f]* { v2dotpa r5, r6, r7 ; ld1s_add r15, r16, 5 } + 62d8: [0-9a-f]* { xori r5, r6, 5 ; ld1s_add r15, r16, 5 } + 62e0: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; ld1u r15, r16 } + 62e8: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; ld1u r15, r16 } + 62f0: [0-9a-f]* { v1addi r5, r6, 5 ; ld1u r15, r16 } + 62f8: [0-9a-f]* { v1shru r5, r6, r7 ; ld1u r15, r16 } + 6300: [0-9a-f]* { v2shlsc r5, r6, r7 ; ld1u r15, r16 } + 6308: [0-9a-f]* { add r15, r16, r17 ; info 19 ; ld1u r25, r26 } + 6310: [0-9a-f]* { tblidxb3 r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 } + 6318: [0-9a-f]* { add r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + 6320: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld1u r25, r26 } + 6328: [0-9a-f]* { addi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 } + 6330: [0-9a-f]* { addx r15, r16, r17 ; add r5, r6, r7 ; ld1u r25, r26 } + 6338: [0-9a-f]* { revbytes r5, r6 ; addx r15, r16, r17 ; ld1u r25, r26 } + 6340: [0-9a-f]* { addx r5, r6, r7 ; jalr r15 ; ld1u r25, r26 } + 6348: [0-9a-f]* { addxi r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld1u r25, r26 } + 6350: [0-9a-f]* { addxi r15, r16, 5 ; shli r5, r6, 5 ; ld1u r25, r26 } + 6358: [0-9a-f]* { addxi r5, r6, 5 ; nor r15, r16, r17 ; ld1u r25, r26 } + 6360: [0-9a-f]* { and r15, r16, r17 ; info 19 ; ld1u r25, r26 } + 6368: [0-9a-f]* { tblidxb3 r5, r6 ; and r15, r16, r17 ; ld1u r25, r26 } + 6370: [0-9a-f]* { and r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + 6378: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 } + 6380: [0-9a-f]* { andi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 } + 6388: [0-9a-f]* { clz r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 } + 6390: [0-9a-f]* { clz r5, r6 ; shrsi r15, r16, 5 ; ld1u r25, r26 } + 6398: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } + 63a0: [0-9a-f]* { cmovnez r5, r6, r7 ; nop ; ld1u r25, r26 } + 63a8: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } + 63b0: [0-9a-f]* { tblidxb2 r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } + 63b8: [0-9a-f]* { cmpeq r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 } + 63c0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 } + 63c8: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } + 63d0: [0-9a-f]* { cmpeqi r5, r6, 5 ; ld1u r25, r26 } + 63d8: [0-9a-f]* { revbits r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 } + 63e0: [0-9a-f]* { cmples r5, r6, r7 ; info 19 ; ld1u r25, r26 } + 63e8: [0-9a-f]* { cmpleu r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1u r25, r26 } + 63f0: [0-9a-f]* { cmpleu r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 } + 63f8: [0-9a-f]* { cmpleu r5, r6, r7 ; nop ; ld1u r25, r26 } + 6400: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; ld1u r25, r26 } + 6408: [0-9a-f]* { tblidxb2 r5, r6 ; cmplts r15, r16, r17 ; ld1u r25, r26 } + 6410: [0-9a-f]* { cmplts r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 } + 6418: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1u r25, r26 } + 6420: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } + 6428: [0-9a-f]* { cmpltsi r5, r6, 5 ; ld1u r25, r26 } + 6430: [0-9a-f]* { revbits r5, r6 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + 6438: [0-9a-f]* { cmpltu r5, r6, r7 ; info 19 ; ld1u r25, r26 } + 6440: [0-9a-f]* { cmpne r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1u r25, r26 } + 6448: [0-9a-f]* { cmpne r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 } + 6450: [0-9a-f]* { cmpne r5, r6, r7 ; nop ; ld1u r25, r26 } + 6458: [0-9a-f]* { ctz r5, r6 ; jr r15 ; ld1u r25, r26 } + 6460: [0-9a-f]* { clz r5, r6 ; ld1u r25, r26 } + 6468: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; ld1u r25, r26 } + 6470: [0-9a-f]* { shru r5, r6, r7 ; ld1u r25, r26 } + 6478: [0-9a-f]* { fsingle_pack1 r5, r6 ; nop ; ld1u r25, r26 } + 6480: [0-9a-f]* { fsingle_pack1 r5, r6 ; ill ; ld1u r25, r26 } + 6488: [0-9a-f]* { tblidxb2 r5, r6 ; ill ; ld1u r25, r26 } + 6490: [0-9a-f]* { info 19 ; jalr r15 ; ld1u r25, r26 } + 6498: [0-9a-f]* { info 19 ; shl1addx r5, r6, r7 ; ld1u r25, r26 } + 64a0: [0-9a-f]* { cmpeqi r5, r6, 5 ; jalr r15 ; ld1u r25, r26 } + 64a8: [0-9a-f]* { shli r5, r6, 5 ; jalr r15 ; ld1u r25, r26 } + 64b0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; jalrp r15 ; ld1u r25, r26 } + 64b8: [0-9a-f]* { and r5, r6, r7 ; jr r15 ; ld1u r25, r26 } + 64c0: [0-9a-f]* { shl1add r5, r6, r7 ; jr r15 ; ld1u r25, r26 } + 64c8: [0-9a-f]* { mnz r5, r6, r7 ; jrp r15 ; ld1u r25, r26 } + 64d0: [0-9a-f]* { xor r5, r6, r7 ; jrp r15 ; ld1u r25, r26 } + 64d8: [0-9a-f]* { pcnt r5, r6 ; lnk r15 ; ld1u r25, r26 } + 64e0: [0-9a-f]* { mnz r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1u r25, r26 } + 64e8: [0-9a-f]* { mnz r15, r16, r17 ; sub r5, r6, r7 ; ld1u r25, r26 } + 64f0: [0-9a-f]* { mnz r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 } + 64f8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld1u r25, r26 } + 6500: [0-9a-f]* { move r5, r6 ; addx r15, r16, r17 ; ld1u r25, r26 } + 6508: [0-9a-f]* { move r5, r6 ; shrui r15, r16, 5 ; ld1u r25, r26 } + 6510: [0-9a-f]* { movei r15, 5 ; nop ; ld1u r25, r26 } + 6518: [0-9a-f]* { movei r5, 5 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + 6520: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 } + 6528: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 } + 6530: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 } + 6538: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + 6540: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 } + 6548: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jalr r15 ; ld1u r25, r26 } + 6550: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 } + 6558: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; ld1u r25, r26 } + 6560: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 } + 6568: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 } + 6570: [0-9a-f]* { mulax r5, r6, r7 ; rotl r15, r16, r17 ; ld1u r25, r26 } + 6578: [0-9a-f]* { mulx r5, r6, r7 ; mnz r15, r16, r17 ; ld1u r25, r26 } + 6580: [0-9a-f]* { mz r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1u r25, r26 } + 6588: [0-9a-f]* { mz r15, r16, r17 ; sub r5, r6, r7 ; ld1u r25, r26 } + 6590: [0-9a-f]* { mz r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 } + 6598: [0-9a-f]* { nop ; cmpltsi r15, r16, 5 ; ld1u r25, r26 } + 65a0: [0-9a-f]* { revbits r5, r6 ; nop ; ld1u r25, r26 } + 65a8: [0-9a-f]* { nop ; ld1u r25, r26 } + 65b0: [0-9a-f]* { revbits r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 } + 65b8: [0-9a-f]* { nor r5, r6, r7 ; info 19 ; ld1u r25, r26 } + 65c0: [0-9a-f]* { or r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1u r25, r26 } + 65c8: [0-9a-f]* { or r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 } + 65d0: [0-9a-f]* { or r5, r6, r7 ; nop ; ld1u r25, r26 } + 65d8: [0-9a-f]* { pcnt r5, r6 ; jr r15 ; ld1u r25, r26 } + 65e0: [0-9a-f]* { revbits r5, r6 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + 65e8: [0-9a-f]* { revbytes r5, r6 ; andi r15, r16, 5 ; ld1u r25, r26 } + 65f0: [0-9a-f]* { revbytes r5, r6 ; xor r15, r16, r17 ; ld1u r25, r26 } + 65f8: [0-9a-f]* { pcnt r5, r6 ; rotl r15, r16, r17 ; ld1u r25, r26 } + 6600: [0-9a-f]* { rotl r5, r6, r7 ; ill ; ld1u r25, r26 } + 6608: [0-9a-f]* { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; ld1u r25, r26 } + 6610: [0-9a-f]* { rotli r15, r16, 5 ; shl3add r5, r6, r7 ; ld1u r25, r26 } + 6618: [0-9a-f]* { rotli r5, r6, 5 ; mz r15, r16, r17 ; ld1u r25, r26 } + 6620: [0-9a-f]* { shl r15, r16, r17 ; ld1u r25, r26 } + 6628: [0-9a-f]* { tblidxb1 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 } + 6630: [0-9a-f]* { shl r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 6638: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 } + 6640: [0-9a-f]* { shl1add r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 } + 6648: [0-9a-f]* { shl1add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 } + 6650: [0-9a-f]* { pcnt r5, r6 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } + 6658: [0-9a-f]* { shl1addx r5, r6, r7 ; ill ; ld1u r25, r26 } + 6660: [0-9a-f]* { cmovnez r5, r6, r7 ; shl2add r15, r16, r17 ; ld1u r25, r26 } + 6668: [0-9a-f]* { shl2add r15, r16, r17 ; shl3add r5, r6, r7 ; ld1u r25, r26 } + 6670: [0-9a-f]* { shl2add r5, r6, r7 ; mz r15, r16, r17 ; ld1u r25, r26 } + 6678: [0-9a-f]* { shl2addx r15, r16, r17 ; ld1u r25, r26 } + 6680: [0-9a-f]* { tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 6688: [0-9a-f]* { shl2addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 6690: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 } + 6698: [0-9a-f]* { shl3add r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 } + 66a0: [0-9a-f]* { shl3add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 } + 66a8: [0-9a-f]* { pcnt r5, r6 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + 66b0: [0-9a-f]* { shl3addx r5, r6, r7 ; ill ; ld1u r25, r26 } + 66b8: [0-9a-f]* { cmovnez r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 } + 66c0: [0-9a-f]* { shli r15, r16, 5 ; shl3add r5, r6, r7 ; ld1u r25, r26 } + 66c8: [0-9a-f]* { shli r5, r6, 5 ; mz r15, r16, r17 ; ld1u r25, r26 } + 66d0: [0-9a-f]* { shrs r15, r16, r17 ; ld1u r25, r26 } + 66d8: [0-9a-f]* { tblidxb1 r5, r6 ; shrs r15, r16, r17 ; ld1u r25, r26 } + 66e0: [0-9a-f]* { shrs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 66e8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 } + 66f0: [0-9a-f]* { shrsi r5, r6, 5 ; andi r15, r16, 5 ; ld1u r25, r26 } + 66f8: [0-9a-f]* { shrsi r5, r6, 5 ; xor r15, r16, r17 ; ld1u r25, r26 } + 6700: [0-9a-f]* { pcnt r5, r6 ; shru r15, r16, r17 ; ld1u r25, r26 } + 6708: [0-9a-f]* { shru r5, r6, r7 ; ill ; ld1u r25, r26 } + 6710: [0-9a-f]* { cmovnez r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 } + 6718: [0-9a-f]* { shrui r15, r16, 5 ; shl3add r5, r6, r7 ; ld1u r25, r26 } + 6720: [0-9a-f]* { shrui r5, r6, 5 ; mz r15, r16, r17 ; ld1u r25, r26 } + 6728: [0-9a-f]* { sub r15, r16, r17 ; ld1u r25, r26 } + 6730: [0-9a-f]* { tblidxb1 r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 } + 6738: [0-9a-f]* { sub r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 6740: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; ld1u r25, r26 } + 6748: [0-9a-f]* { subx r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 } + 6750: [0-9a-f]* { subx r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 } + 6758: [0-9a-f]* { tblidxb0 r5, r6 ; shli r15, r16, 5 ; ld1u r25, r26 } + 6760: [0-9a-f]* { tblidxb1 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 } + 6768: [0-9a-f]* { tblidxb2 r5, r6 ; movei r15, 5 ; ld1u r25, r26 } + 6770: [0-9a-f]* { tblidxb3 r5, r6 ; jalr r15 ; ld1u r25, r26 } + 6778: [0-9a-f]* { xor r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld1u r25, r26 } + 6780: [0-9a-f]* { xor r15, r16, r17 ; shli r5, r6, 5 ; ld1u r25, r26 } + 6788: [0-9a-f]* { xor r5, r6, r7 ; nor r15, r16, r17 ; ld1u r25, r26 } + 6790: [0-9a-f]* { cmpltsi r5, r6, 5 ; ld1u_add r15, r16, 5 } + 6798: [0-9a-f]* { moveli r5, 4660 ; ld1u_add r15, r16, 5 } + 67a0: [0-9a-f]* { shl3addx r5, r6, r7 ; ld1u_add r15, r16, 5 } + 67a8: [0-9a-f]* { v1dotpus r5, r6, r7 ; ld1u_add r15, r16, 5 } + 67b0: [0-9a-f]* { v2int_l r5, r6, r7 ; ld1u_add r15, r16, 5 } + 67b8: [0-9a-f]* { addi r5, r6, 5 ; ld2s r15, r16 } + 67c0: [0-9a-f]* { fdouble_pack1 r5, r6, r7 ; ld2s r15, r16 } + 67c8: [0-9a-f]* { mulax r5, r6, r7 ; ld2s r15, r16 } + 67d0: [0-9a-f]* { v1adiffu r5, r6, r7 ; ld2s r15, r16 } + 67d8: [0-9a-f]* { v1sub r5, r6, r7 ; ld2s r15, r16 } + 67e0: [0-9a-f]* { v2shrsi r5, r6, 5 ; ld2s r15, r16 } + 67e8: [0-9a-f]* { add r15, r16, r17 ; move r5, r6 ; ld2s r25, r26 } + 67f0: [0-9a-f]* { add r15, r16, r17 ; ld2s r25, r26 } + 67f8: [0-9a-f]* { add r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 } + 6800: [0-9a-f]* { mulax r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 } + 6808: [0-9a-f]* { addi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2s r25, r26 } + 6810: [0-9a-f]* { addx r15, r16, r17 ; addx r5, r6, r7 ; ld2s r25, r26 } + 6818: [0-9a-f]* { addx r15, r16, r17 ; rotli r5, r6, 5 ; ld2s r25, r26 } + 6820: [0-9a-f]* { addx r5, r6, r7 ; jr r15 ; ld2s r25, r26 } + 6828: [0-9a-f]* { addxi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2s r25, r26 } + 6830: [0-9a-f]* { addxi r15, r16, 5 ; shrsi r5, r6, 5 ; ld2s r25, r26 } + 6838: [0-9a-f]* { addxi r5, r6, 5 ; rotl r15, r16, r17 ; ld2s r25, r26 } + 6840: [0-9a-f]* { and r15, r16, r17 ; move r5, r6 ; ld2s r25, r26 } + 6848: [0-9a-f]* { and r15, r16, r17 ; ld2s r25, r26 } + 6850: [0-9a-f]* { and r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 } + 6858: [0-9a-f]* { mulax r5, r6, r7 ; andi r15, r16, 5 ; ld2s r25, r26 } + 6860: [0-9a-f]* { andi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2s r25, r26 } + 6868: [0-9a-f]* { clz r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 } + 6870: [0-9a-f]* { clz r5, r6 ; shrui r15, r16, 5 ; ld2s r25, r26 } + 6878: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 } + 6880: [0-9a-f]* { cmovnez r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 } + 6888: [0-9a-f]* { cmpeq r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 } + 6890: [0-9a-f]* { cmpeq r15, r16, r17 ; xor r5, r6, r7 ; ld2s r25, r26 } + 6898: [0-9a-f]* { cmpeq r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 } + 68a0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 } + 68a8: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 } + 68b0: [0-9a-f]* { cmples r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + 68b8: [0-9a-f]* { cmples r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + 68c0: [0-9a-f]* { cmples r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 } + 68c8: [0-9a-f]* { cmpleu r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 } + 68d0: [0-9a-f]* { cmpleu r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 } + 68d8: [0-9a-f]* { cmpleu r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 } + 68e0: [0-9a-f]* { cmplts r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 } + 68e8: [0-9a-f]* { cmplts r15, r16, r17 ; xor r5, r6, r7 ; ld2s r25, r26 } + 68f0: [0-9a-f]* { cmplts r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 } + 68f8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2s r25, r26 } + 6900: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 } + 6908: [0-9a-f]* { cmpltu r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + 6910: [0-9a-f]* { cmpltu r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + 6918: [0-9a-f]* { cmpltu r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 } + 6920: [0-9a-f]* { cmpne r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 } + 6928: [0-9a-f]* { cmpne r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 } + 6930: [0-9a-f]* { cmpne r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 } + 6938: [0-9a-f]* { ctz r5, r6 ; lnk r15 ; ld2s r25, r26 } + 6940: [0-9a-f]* { cmovnez r5, r6, r7 ; ld2s r25, r26 } + 6948: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; ld2s r25, r26 } + 6950: [0-9a-f]* { shrui r5, r6, 5 ; ld2s r25, r26 } + 6958: [0-9a-f]* { fsingle_pack1 r5, r6 ; or r15, r16, r17 ; ld2s r25, r26 } + 6960: [0-9a-f]* { mnz r5, r6, r7 ; ill ; ld2s r25, r26 } + 6968: [0-9a-f]* { xor r5, r6, r7 ; ill ; ld2s r25, r26 } + 6970: [0-9a-f]* { info 19 ; jr r15 ; ld2s r25, r26 } + 6978: [0-9a-f]* { info 19 ; shl2add r5, r6, r7 ; ld2s r25, r26 } + 6980: [0-9a-f]* { cmpleu r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } + 6988: [0-9a-f]* { shrsi r5, r6, 5 ; jalr r15 ; ld2s r25, r26 } + 6990: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 } + 6998: [0-9a-f]* { clz r5, r6 ; jr r15 ; ld2s r25, r26 } + 69a0: [0-9a-f]* { shl2add r5, r6, r7 ; jr r15 ; ld2s r25, r26 } + 69a8: [0-9a-f]* { movei r5, 5 ; jrp r15 ; ld2s r25, r26 } + 69b0: [0-9a-f]* { add r5, r6, r7 ; lnk r15 ; ld2s r25, r26 } + 69b8: [0-9a-f]* { revbytes r5, r6 ; lnk r15 ; ld2s r25, r26 } + 69c0: [0-9a-f]* { ctz r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 } + 69c8: [0-9a-f]* { tblidxb0 r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 } + 69d0: [0-9a-f]* { mnz r5, r6, r7 ; shl2add r15, r16, r17 ; ld2s r25, r26 } + 69d8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; move r15, r16 ; ld2s r25, r26 } + 69e0: [0-9a-f]* { move r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 } + 69e8: [0-9a-f]* { move r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 } + 69f0: [0-9a-f]* { movei r15, 5 ; or r5, r6, r7 ; ld2s r25, r26 } + 69f8: [0-9a-f]* { movei r5, 5 ; ld2s r25, r26 } + 6a00: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 } + 6a08: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 } + 6a10: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; ld2s r25, r26 } + 6a18: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + 6a20: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; nop ; ld2s r25, r26 } + 6a28: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jr r15 ; ld2s r25, r26 } + 6a30: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2s r25, r26 } + 6a38: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; ld2s r25, r26 } + 6a40: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld2s r25, r26 } + 6a48: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 } + 6a50: [0-9a-f]* { mulax r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 } + 6a58: [0-9a-f]* { mulx r5, r6, r7 ; movei r15, 5 ; ld2s r25, r26 } + 6a60: [0-9a-f]* { ctz r5, r6 ; mz r15, r16, r17 ; ld2s r25, r26 } + 6a68: [0-9a-f]* { tblidxb0 r5, r6 ; mz r15, r16, r17 ; ld2s r25, r26 } + 6a70: [0-9a-f]* { mz r5, r6, r7 ; shl2add r15, r16, r17 ; ld2s r25, r26 } + 6a78: [0-9a-f]* { nop ; cmpltu r15, r16, r17 ; ld2s r25, r26 } + 6a80: [0-9a-f]* { nop ; rotl r15, r16, r17 ; ld2s r25, r26 } + 6a88: [0-9a-f]* { nor r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + 6a90: [0-9a-f]* { nor r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + 6a98: [0-9a-f]* { nor r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 } + 6aa0: [0-9a-f]* { or r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 } + 6aa8: [0-9a-f]* { or r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 } + 6ab0: [0-9a-f]* { or r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 } + 6ab8: [0-9a-f]* { pcnt r5, r6 ; lnk r15 ; ld2s r25, r26 } + 6ac0: [0-9a-f]* { revbits r5, r6 ; ld2s r25, r26 } + 6ac8: [0-9a-f]* { revbytes r5, r6 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 } + 6ad0: [0-9a-f]* { rotl r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 } + 6ad8: [0-9a-f]* { revbytes r5, r6 ; rotl r15, r16, r17 ; ld2s r25, r26 } + 6ae0: [0-9a-f]* { rotl r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } + 6ae8: [0-9a-f]* { rotli r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 } + 6af0: [0-9a-f]* { rotli r15, r16, 5 ; shli r5, r6, 5 ; ld2s r25, r26 } + 6af8: [0-9a-f]* { rotli r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 } + 6b00: [0-9a-f]* { shl r15, r16, r17 ; info 19 ; ld2s r25, r26 } + 6b08: [0-9a-f]* { tblidxb3 r5, r6 ; shl r15, r16, r17 ; ld2s r25, r26 } + 6b10: [0-9a-f]* { shl r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 } + 6b18: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 } + 6b20: [0-9a-f]* { shl1add r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 } + 6b28: [0-9a-f]* { shl1addx r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 } + 6b30: [0-9a-f]* { revbytes r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + 6b38: [0-9a-f]* { shl1addx r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } + 6b40: [0-9a-f]* { shl2add r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 } + 6b48: [0-9a-f]* { shl2add r15, r16, r17 ; shli r5, r6, 5 ; ld2s r25, r26 } + 6b50: [0-9a-f]* { shl2add r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 } + 6b58: [0-9a-f]* { shl2addx r15, r16, r17 ; info 19 ; ld2s r25, r26 } + 6b60: [0-9a-f]* { tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; ld2s r25, r26 } + 6b68: [0-9a-f]* { shl2addx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 } + 6b70: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld2s r25, r26 } + 6b78: [0-9a-f]* { shl3add r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 } + 6b80: [0-9a-f]* { shl3addx r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 } + 6b88: [0-9a-f]* { revbytes r5, r6 ; shl3addx r15, r16, r17 ; ld2s r25, r26 } + 6b90: [0-9a-f]* { shl3addx r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } + 6b98: [0-9a-f]* { shli r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 } + 6ba0: [0-9a-f]* { shli r15, r16, 5 ; shli r5, r6, 5 ; ld2s r25, r26 } + 6ba8: [0-9a-f]* { shli r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 } + 6bb0: [0-9a-f]* { shrs r15, r16, r17 ; info 19 ; ld2s r25, r26 } + 6bb8: [0-9a-f]* { tblidxb3 r5, r6 ; shrs r15, r16, r17 ; ld2s r25, r26 } + 6bc0: [0-9a-f]* { shrs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 } + 6bc8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld2s r25, r26 } + 6bd0: [0-9a-f]* { shrsi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 } + 6bd8: [0-9a-f]* { shru r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 } + 6be0: [0-9a-f]* { revbytes r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 } + 6be8: [0-9a-f]* { shru r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } + 6bf0: [0-9a-f]* { shrui r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 } + 6bf8: [0-9a-f]* { shrui r15, r16, 5 ; shli r5, r6, 5 ; ld2s r25, r26 } + 6c00: [0-9a-f]* { shrui r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 } + 6c08: [0-9a-f]* { sub r15, r16, r17 ; info 19 ; ld2s r25, r26 } + 6c10: [0-9a-f]* { tblidxb3 r5, r6 ; sub r15, r16, r17 ; ld2s r25, r26 } + 6c18: [0-9a-f]* { sub r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 } + 6c20: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; subx r15, r16, r17 ; ld2s r25, r26 } + 6c28: [0-9a-f]* { subx r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 } + 6c30: [0-9a-f]* { tblidxb0 r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 } + 6c38: [0-9a-f]* { tblidxb0 r5, r6 ; shrsi r15, r16, 5 ; ld2s r25, r26 } + 6c40: [0-9a-f]* { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + 6c48: [0-9a-f]* { tblidxb2 r5, r6 ; nop ; ld2s r25, r26 } + 6c50: [0-9a-f]* { tblidxb3 r5, r6 ; jr r15 ; ld2s r25, r26 } + 6c58: [0-9a-f]* { xor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 } + 6c60: [0-9a-f]* { xor r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 } + 6c68: [0-9a-f]* { xor r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 } + 6c70: [0-9a-f]* { cmpltui r5, r6, 5 ; ld2s_add r15, r16, 5 } + 6c78: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; ld2s_add r15, r16, 5 } + 6c80: [0-9a-f]* { shlx r5, r6, r7 ; ld2s_add r15, r16, 5 } + 6c88: [0-9a-f]* { v1int_h r5, r6, r7 ; ld2s_add r15, r16, 5 } + 6c90: [0-9a-f]* { v2maxsi r5, r6, 5 ; ld2s_add r15, r16, 5 } + 6c98: [0-9a-f]* { addx r5, r6, r7 ; ld2u r15, r16 } + 6ca0: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; ld2u r15, r16 } + 6ca8: [0-9a-f]* { mz r5, r6, r7 ; ld2u r15, r16 } + 6cb0: [0-9a-f]* { v1cmpeq r5, r6, r7 ; ld2u r15, r16 } + 6cb8: [0-9a-f]* { v2add r5, r6, r7 ; ld2u r15, r16 } + 6cc0: [0-9a-f]* { v2shrui r5, r6, 5 ; ld2u r15, r16 } + 6cc8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 } + 6cd0: [0-9a-f]* { add r5, r6, r7 ; addi r15, r16, 5 ; ld2u r25, r26 } + 6cd8: [0-9a-f]* { add r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 } + 6ce0: [0-9a-f]* { addi r15, r16, 5 ; mz r5, r6, r7 ; ld2u r25, r26 } + 6ce8: [0-9a-f]* { addi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 } + 6cf0: [0-9a-f]* { addx r15, r16, r17 ; and r5, r6, r7 ; ld2u r25, r26 } + 6cf8: [0-9a-f]* { addx r15, r16, r17 ; shl1add r5, r6, r7 ; ld2u r25, r26 } + 6d00: [0-9a-f]* { addx r5, r6, r7 ; lnk r15 ; ld2u r25, r26 } + 6d08: [0-9a-f]* { addxi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 } + 6d10: [0-9a-f]* { addxi r15, r16, 5 ; shrui r5, r6, 5 ; ld2u r25, r26 } + 6d18: [0-9a-f]* { addxi r5, r6, 5 ; shl r15, r16, r17 ; ld2u r25, r26 } + 6d20: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 } + 6d28: [0-9a-f]* { and r5, r6, r7 ; addi r15, r16, 5 ; ld2u r25, r26 } + 6d30: [0-9a-f]* { and r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 } + 6d38: [0-9a-f]* { andi r15, r16, 5 ; mz r5, r6, r7 ; ld2u r25, r26 } + 6d40: [0-9a-f]* { andi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 } + 6d48: [0-9a-f]* { clz r5, r6 ; and r15, r16, r17 ; ld2u r25, r26 } + 6d50: [0-9a-f]* { clz r5, r6 ; subx r15, r16, r17 ; ld2u r25, r26 } + 6d58: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + 6d60: [0-9a-f]* { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 } + 6d68: [0-9a-f]* { cmpeq r15, r16, r17 ; movei r5, 5 ; ld2u r25, r26 } + 6d70: [0-9a-f]* { cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 } + 6d78: [0-9a-f]* { cmpeq r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 } + 6d80: [0-9a-f]* { mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2u r25, r26 } + 6d88: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmplts r15, r16, r17 ; ld2u r25, r26 } + 6d90: [0-9a-f]* { cmples r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 } + 6d98: [0-9a-f]* { cmples r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 } + 6da0: [0-9a-f]* { cmples r5, r6, r7 ; jrp r15 ; ld2u r25, r26 } + 6da8: [0-9a-f]* { cmpleu r15, r16, r17 ; cmplts r5, r6, r7 ; ld2u r25, r26 } + 6db0: [0-9a-f]* { cmpleu r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 } + 6db8: [0-9a-f]* { cmpleu r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 } + 6dc0: [0-9a-f]* { cmplts r15, r16, r17 ; movei r5, 5 ; ld2u r25, r26 } + 6dc8: [0-9a-f]* { cmplts r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 } + 6dd0: [0-9a-f]* { cmplts r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 } + 6dd8: [0-9a-f]* { mulx r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 } + 6de0: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmplts r15, r16, r17 ; ld2u r25, r26 } + 6de8: [0-9a-f]* { cmpltu r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 } + 6df0: [0-9a-f]* { cmpltu r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 } + 6df8: [0-9a-f]* { cmpltu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 } + 6e00: [0-9a-f]* { cmpne r15, r16, r17 ; cmplts r5, r6, r7 ; ld2u r25, r26 } + 6e08: [0-9a-f]* { cmpne r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 } + 6e10: [0-9a-f]* { cmpne r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 } + 6e18: [0-9a-f]* { ctz r5, r6 ; move r15, r16 ; ld2u r25, r26 } + 6e20: [0-9a-f]* { cmpeq r5, r6, r7 ; ld2u r25, r26 } + 6e28: [0-9a-f]* { mulx r5, r6, r7 ; ld2u r25, r26 } + 6e30: [0-9a-f]* { sub r5, r6, r7 ; ld2u r25, r26 } + 6e38: [0-9a-f]* { fsingle_pack1 r5, r6 ; rotli r15, r16, 5 ; ld2u r25, r26 } + 6e40: [0-9a-f]* { movei r5, 5 ; ill ; ld2u r25, r26 } + 6e48: [0-9a-f]* { info 19 ; add r15, r16, r17 ; ld2u r25, r26 } + 6e50: [0-9a-f]* { info 19 ; lnk r15 ; ld2u r25, r26 } + 6e58: [0-9a-f]* { info 19 ; shl2addx r5, r6, r7 ; ld2u r25, r26 } + 6e60: [0-9a-f]* { cmpltsi r5, r6, 5 ; jalr r15 ; ld2u r25, r26 } + 6e68: [0-9a-f]* { shrui r5, r6, 5 ; jalr r15 ; ld2u r25, r26 } + 6e70: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 } + 6e78: [0-9a-f]* { cmovnez r5, r6, r7 ; jr r15 ; ld2u r25, r26 } + 6e80: [0-9a-f]* { shl3add r5, r6, r7 ; jr r15 ; ld2u r25, r26 } + 6e88: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 } + 6e90: [0-9a-f]* { addx r5, r6, r7 ; lnk r15 ; ld2u r25, r26 } + 6e98: [0-9a-f]* { rotli r5, r6, 5 ; lnk r15 ; ld2u r25, r26 } + 6ea0: [0-9a-f]* { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; ld2u r25, r26 } + 6ea8: [0-9a-f]* { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld2u r25, r26 } + 6eb0: [0-9a-f]* { mnz r5, r6, r7 ; shl3add r15, r16, r17 ; ld2u r25, r26 } + 6eb8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 } + 6ec0: [0-9a-f]* { move r5, r6 ; cmpeq r15, r16, r17 ; ld2u r25, r26 } + 6ec8: [0-9a-f]* { move r5, r6 ; ld2u r25, r26 } + 6ed0: [0-9a-f]* { revbits r5, r6 ; movei r15, 5 ; ld2u r25, r26 } + 6ed8: [0-9a-f]* { movei r5, 5 ; info 19 ; ld2u r25, r26 } + 6ee0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 } + 6ee8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 } + 6ef0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shrui r15, r16, 5 ; ld2u r25, r26 } + 6ef8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 } + 6f00: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 } + 6f08: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; lnk r15 ; ld2u r25, r26 } + 6f10: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; ld2u r25, r26 } + 6f18: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2u r25, r26 } + 6f20: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 } + 6f28: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 } + 6f30: [0-9a-f]* { mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 } + 6f38: [0-9a-f]* { mulx r5, r6, r7 ; nop ; ld2u r25, r26 } + 6f40: [0-9a-f]* { fsingle_pack1 r5, r6 ; mz r15, r16, r17 ; ld2u r25, r26 } + 6f48: [0-9a-f]* { tblidxb2 r5, r6 ; mz r15, r16, r17 ; ld2u r25, r26 } + 6f50: [0-9a-f]* { mz r5, r6, r7 ; shl3add r15, r16, r17 ; ld2u r25, r26 } + 6f58: [0-9a-f]* { nop ; cmpne r15, r16, r17 ; ld2u r25, r26 } + 6f60: [0-9a-f]* { nop ; rotli r15, r16, 5 ; ld2u r25, r26 } + 6f68: [0-9a-f]* { nor r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 } + 6f70: [0-9a-f]* { nor r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 } + 6f78: [0-9a-f]* { nor r5, r6, r7 ; jrp r15 ; ld2u r25, r26 } + 6f80: [0-9a-f]* { or r15, r16, r17 ; cmplts r5, r6, r7 ; ld2u r25, r26 } + 6f88: [0-9a-f]* { or r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 } + 6f90: [0-9a-f]* { or r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 } + 6f98: [0-9a-f]* { pcnt r5, r6 ; move r15, r16 ; ld2u r25, r26 } + 6fa0: [0-9a-f]* { revbits r5, r6 ; info 19 ; ld2u r25, r26 } + 6fa8: [0-9a-f]* { revbytes r5, r6 ; cmpleu r15, r16, r17 ; ld2u r25, r26 } + 6fb0: [0-9a-f]* { rotl r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 } + 6fb8: [0-9a-f]* { rotl r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 } + 6fc0: [0-9a-f]* { rotl r5, r6, r7 ; jr r15 ; ld2u r25, r26 } + 6fc8: [0-9a-f]* { rotli r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2u r25, r26 } + 6fd0: [0-9a-f]* { rotli r15, r16, 5 ; shrsi r5, r6, 5 ; ld2u r25, r26 } + 6fd8: [0-9a-f]* { rotli r5, r6, 5 ; rotl r15, r16, r17 ; ld2u r25, r26 } + 6fe0: [0-9a-f]* { shl r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 } + 6fe8: [0-9a-f]* { shl r15, r16, r17 ; ld2u r25, r26 } + 6ff0: [0-9a-f]* { shl r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + 6ff8: [0-9a-f]* { mulax r5, r6, r7 ; shl1add r15, r16, r17 ; ld2u r25, r26 } + 7000: [0-9a-f]* { shl1add r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 } + 7008: [0-9a-f]* { shl1addx r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 } + 7010: [0-9a-f]* { shl1addx r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 } + 7018: [0-9a-f]* { shl1addx r5, r6, r7 ; jr r15 ; ld2u r25, r26 } + 7020: [0-9a-f]* { shl2add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2u r25, r26 } + 7028: [0-9a-f]* { shl2add r15, r16, r17 ; shrsi r5, r6, 5 ; ld2u r25, r26 } + 7030: [0-9a-f]* { shl2add r5, r6, r7 ; rotl r15, r16, r17 ; ld2u r25, r26 } + 7038: [0-9a-f]* { shl2addx r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 } + 7040: [0-9a-f]* { shl2addx r15, r16, r17 ; ld2u r25, r26 } + 7048: [0-9a-f]* { shl2addx r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + 7050: [0-9a-f]* { mulax r5, r6, r7 ; shl3add r15, r16, r17 ; ld2u r25, r26 } + 7058: [0-9a-f]* { shl3add r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 } + 7060: [0-9a-f]* { shl3addx r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 } + 7068: [0-9a-f]* { shl3addx r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 } + 7070: [0-9a-f]* { shl3addx r5, r6, r7 ; jr r15 ; ld2u r25, r26 } + 7078: [0-9a-f]* { shli r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2u r25, r26 } + 7080: [0-9a-f]* { shli r15, r16, 5 ; shrsi r5, r6, 5 ; ld2u r25, r26 } + 7088: [0-9a-f]* { shli r5, r6, 5 ; rotl r15, r16, r17 ; ld2u r25, r26 } + 7090: [0-9a-f]* { shrs r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 } + 7098: [0-9a-f]* { shrs r15, r16, r17 ; ld2u r25, r26 } + 70a0: [0-9a-f]* { shrs r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + 70a8: [0-9a-f]* { mulax r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 } + 70b0: [0-9a-f]* { shrsi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2u r25, r26 } + 70b8: [0-9a-f]* { shru r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 } + 70c0: [0-9a-f]* { shru r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 } + 70c8: [0-9a-f]* { shru r5, r6, r7 ; jr r15 ; ld2u r25, r26 } + 70d0: [0-9a-f]* { shrui r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2u r25, r26 } + 70d8: [0-9a-f]* { shrui r15, r16, 5 ; shrsi r5, r6, 5 ; ld2u r25, r26 } + 70e0: [0-9a-f]* { shrui r5, r6, 5 ; rotl r15, r16, r17 ; ld2u r25, r26 } + 70e8: [0-9a-f]* { sub r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 } + 70f0: [0-9a-f]* { sub r15, r16, r17 ; ld2u r25, r26 } + 70f8: [0-9a-f]* { sub r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + 7100: [0-9a-f]* { mulax r5, r6, r7 ; subx r15, r16, r17 ; ld2u r25, r26 } + 7108: [0-9a-f]* { subx r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 } + 7110: [0-9a-f]* { tblidxb0 r5, r6 ; addx r15, r16, r17 ; ld2u r25, r26 } + 7118: [0-9a-f]* { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; ld2u r25, r26 } + 7120: [0-9a-f]* { tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; ld2u r25, r26 } + 7128: [0-9a-f]* { tblidxb2 r5, r6 ; or r15, r16, r17 ; ld2u r25, r26 } + 7130: [0-9a-f]* { tblidxb3 r5, r6 ; lnk r15 ; ld2u r25, r26 } + 7138: [0-9a-f]* { xor r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 } + 7140: [0-9a-f]* { xor r15, r16, r17 ; shrui r5, r6, 5 ; ld2u r25, r26 } + 7148: [0-9a-f]* { xor r5, r6, r7 ; shl r15, r16, r17 ; ld2u r25, r26 } + 7150: [0-9a-f]* { cmul r5, r6, r7 ; ld2u_add r15, r16, 5 } + 7158: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; ld2u_add r15, r16, 5 } + 7160: [0-9a-f]* { shrs r5, r6, r7 ; ld2u_add r15, r16, 5 } + 7168: [0-9a-f]* { v1maxu r5, r6, r7 ; ld2u_add r15, r16, 5 } + 7170: [0-9a-f]* { v2minsi r5, r6, 5 ; ld2u_add r15, r16, 5 } + 7178: [0-9a-f]* { addxli r5, r6, 4660 ; ld4s r15, r16 } + 7180: [0-9a-f]* { fdouble_unpack_min r5, r6, r7 ; ld4s r15, r16 } + 7188: [0-9a-f]* { nor r5, r6, r7 ; ld4s r15, r16 } + 7190: [0-9a-f]* { v1cmples r5, r6, r7 ; ld4s r15, r16 } + 7198: [0-9a-f]* { v2addsc r5, r6, r7 ; ld4s r15, r16 } + 71a0: [0-9a-f]* { v2subsc r5, r6, r7 ; ld4s r15, r16 } + 71a8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } + 71b0: [0-9a-f]* { add r5, r6, r7 ; addxi r15, r16, 5 ; ld4s r25, r26 } + 71b8: [0-9a-f]* { add r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 } + 71c0: [0-9a-f]* { addi r15, r16, 5 ; nor r5, r6, r7 ; ld4s r25, r26 } + 71c8: [0-9a-f]* { addi r5, r6, 5 ; cmpne r15, r16, r17 ; ld4s r25, r26 } + 71d0: [0-9a-f]* { clz r5, r6 ; addx r15, r16, r17 ; ld4s r25, r26 } + 71d8: [0-9a-f]* { addx r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 } + 71e0: [0-9a-f]* { addx r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 } + 71e8: [0-9a-f]* { addxi r15, r16, 5 ; cmpne r5, r6, r7 ; ld4s r25, r26 } + 71f0: [0-9a-f]* { addxi r15, r16, 5 ; subx r5, r6, r7 ; ld4s r25, r26 } + 71f8: [0-9a-f]* { addxi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4s r25, r26 } + 7200: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + 7208: [0-9a-f]* { and r5, r6, r7 ; addxi r15, r16, 5 ; ld4s r25, r26 } + 7210: [0-9a-f]* { and r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 } + 7218: [0-9a-f]* { andi r15, r16, 5 ; nor r5, r6, r7 ; ld4s r25, r26 } + 7220: [0-9a-f]* { andi r5, r6, 5 ; cmpne r15, r16, r17 ; ld4s r25, r26 } + 7228: [0-9a-f]* { clz r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + 7230: [0-9a-f]* { clz r5, r6 ; ld4s r25, r26 } + 7238: [0-9a-f]* { cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 } + 7240: [0-9a-f]* { cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 } + 7248: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + 7250: [0-9a-f]* { cmpeq r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 } + 7258: [0-9a-f]* { cmpeq r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 } + 7260: [0-9a-f]* { cmpeqi r15, r16, 5 ; nop ; ld4s r25, r26 } + 7268: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 } + 7270: [0-9a-f]* { cmples r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 } + 7278: [0-9a-f]* { cmples r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 } + 7280: [0-9a-f]* { cmples r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 } + 7288: [0-9a-f]* { cmpleu r15, r16, r17 ; cmpltu r5, r6, r7 ; ld4s r25, r26 } + 7290: [0-9a-f]* { cmpleu r15, r16, r17 ; sub r5, r6, r7 ; ld4s r25, r26 } + 7298: [0-9a-f]* { cmpleu r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 } + 72a0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 } + 72a8: [0-9a-f]* { cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 } + 72b0: [0-9a-f]* { cmplts r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 } + 72b8: [0-9a-f]* { cmpltsi r15, r16, 5 ; nop ; ld4s r25, r26 } + 72c0: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 } + 72c8: [0-9a-f]* { cmpltu r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 } + 72d0: [0-9a-f]* { cmpltu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 } + 72d8: [0-9a-f]* { cmpltu r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 } + 72e0: [0-9a-f]* { cmpne r15, r16, r17 ; cmpltu r5, r6, r7 ; ld4s r25, r26 } + 72e8: [0-9a-f]* { cmpne r15, r16, r17 ; sub r5, r6, r7 ; ld4s r25, r26 } + 72f0: [0-9a-f]* { cmpne r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 } + 72f8: [0-9a-f]* { ctz r5, r6 ; mz r15, r16, r17 ; ld4s r25, r26 } + 7300: [0-9a-f]* { cmpeqi r5, r6, 5 ; ld4s r25, r26 } + 7308: [0-9a-f]* { mz r5, r6, r7 ; ld4s r25, r26 } + 7310: [0-9a-f]* { subx r5, r6, r7 ; ld4s r25, r26 } + 7318: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl1add r15, r16, r17 ; ld4s r25, r26 } + 7320: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; ill ; ld4s r25, r26 } + 7328: [0-9a-f]* { info 19 ; addi r15, r16, 5 ; ld4s r25, r26 } + 7330: [0-9a-f]* { info 19 ; mnz r5, r6, r7 ; ld4s r25, r26 } + 7338: [0-9a-f]* { info 19 ; shl3add r5, r6, r7 ; ld4s r25, r26 } + 7340: [0-9a-f]* { cmpne r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + 7348: [0-9a-f]* { subx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + 7350: [0-9a-f]* { mulx r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 } + 7358: [0-9a-f]* { cmpeqi r5, r6, 5 ; jr r15 ; ld4s r25, r26 } + 7360: [0-9a-f]* { shli r5, r6, 5 ; jr r15 ; ld4s r25, r26 } + 7368: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; jrp r15 ; ld4s r25, r26 } + 7370: [0-9a-f]* { and r5, r6, r7 ; lnk r15 ; ld4s r25, r26 } + 7378: [0-9a-f]* { shl1add r5, r6, r7 ; lnk r15 ; ld4s r25, r26 } + 7380: [0-9a-f]* { mnz r15, r16, r17 ; mnz r5, r6, r7 ; ld4s r25, r26 } + 7388: [0-9a-f]* { mnz r15, r16, r17 ; xor r5, r6, r7 ; ld4s r25, r26 } + 7390: [0-9a-f]* { mnz r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 } + 7398: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 } + 73a0: [0-9a-f]* { move r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 } + 73a8: [0-9a-f]* { movei r15, 5 ; addi r5, r6, 5 ; ld4s r25, r26 } + 73b0: [0-9a-f]* { movei r15, 5 ; rotl r5, r6, r7 ; ld4s r25, r26 } + 73b8: [0-9a-f]* { movei r5, 5 ; jalrp r15 ; ld4s r25, r26 } + 73c0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 73c8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + 73d0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 } + 73d8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + 73e0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld4s r25, r26 } + 73e8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 } + 73f0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; info 19 ; ld4s r25, r26 } + 73f8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 } + 7400: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 } + 7408: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 } + 7410: [0-9a-f]* { mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + 7418: [0-9a-f]* { mulx r5, r6, r7 ; or r15, r16, r17 ; ld4s r25, r26 } + 7420: [0-9a-f]* { mz r15, r16, r17 ; mnz r5, r6, r7 ; ld4s r25, r26 } + 7428: [0-9a-f]* { mz r15, r16, r17 ; xor r5, r6, r7 ; ld4s r25, r26 } + 7430: [0-9a-f]* { mz r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 } + 7438: [0-9a-f]* { ctz r5, r6 ; nop ; ld4s r25, r26 } + 7440: [0-9a-f]* { nop ; shl r15, r16, r17 ; ld4s r25, r26 } + 7448: [0-9a-f]* { nor r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 } + 7450: [0-9a-f]* { nor r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 } + 7458: [0-9a-f]* { nor r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 } + 7460: [0-9a-f]* { or r15, r16, r17 ; cmpltu r5, r6, r7 ; ld4s r25, r26 } + 7468: [0-9a-f]* { or r15, r16, r17 ; sub r5, r6, r7 ; ld4s r25, r26 } + 7470: [0-9a-f]* { or r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 } + 7478: [0-9a-f]* { pcnt r5, r6 ; mz r15, r16, r17 ; ld4s r25, r26 } + 7480: [0-9a-f]* { revbits r5, r6 ; jalrp r15 ; ld4s r25, r26 } + 7488: [0-9a-f]* { revbytes r5, r6 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 7490: [0-9a-f]* { rotl r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 } + 7498: [0-9a-f]* { rotl r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 } + 74a0: [0-9a-f]* { rotl r5, r6, r7 ; lnk r15 ; ld4s r25, r26 } + 74a8: [0-9a-f]* { rotli r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 } + 74b0: [0-9a-f]* { rotli r15, r16, 5 ; shrui r5, r6, 5 ; ld4s r25, r26 } + 74b8: [0-9a-f]* { rotli r5, r6, 5 ; shl r15, r16, r17 ; ld4s r25, r26 } + 74c0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; ld4s r25, r26 } + 74c8: [0-9a-f]* { shl r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 } + 74d0: [0-9a-f]* { shl r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 } + 74d8: [0-9a-f]* { shl1add r15, r16, r17 ; mz r5, r6, r7 ; ld4s r25, r26 } + 74e0: [0-9a-f]* { shl1add r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 74e8: [0-9a-f]* { shl1addx r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 } + 74f0: [0-9a-f]* { shl1addx r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 } + 74f8: [0-9a-f]* { shl1addx r5, r6, r7 ; lnk r15 ; ld4s r25, r26 } + 7500: [0-9a-f]* { shl2add r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 } + 7508: [0-9a-f]* { shl2add r15, r16, r17 ; shrui r5, r6, 5 ; ld4s r25, r26 } + 7510: [0-9a-f]* { shl2add r5, r6, r7 ; shl r15, r16, r17 ; ld4s r25, r26 } + 7518: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + 7520: [0-9a-f]* { shl2addx r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 } + 7528: [0-9a-f]* { shl2addx r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 } + 7530: [0-9a-f]* { shl3add r15, r16, r17 ; mz r5, r6, r7 ; ld4s r25, r26 } + 7538: [0-9a-f]* { shl3add r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 7540: [0-9a-f]* { shl3addx r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 } + 7548: [0-9a-f]* { shl3addx r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 } + 7550: [0-9a-f]* { shl3addx r5, r6, r7 ; lnk r15 ; ld4s r25, r26 } + 7558: [0-9a-f]* { shli r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 } + 7560: [0-9a-f]* { shli r15, r16, 5 ; shrui r5, r6, 5 ; ld4s r25, r26 } + 7568: [0-9a-f]* { shli r5, r6, 5 ; shl r15, r16, r17 ; ld4s r25, r26 } + 7570: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 } + 7578: [0-9a-f]* { shrs r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 } + 7580: [0-9a-f]* { shrs r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 } + 7588: [0-9a-f]* { shrsi r15, r16, 5 ; mz r5, r6, r7 ; ld4s r25, r26 } + 7590: [0-9a-f]* { shrsi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 7598: [0-9a-f]* { shru r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 } + 75a0: [0-9a-f]* { shru r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 } + 75a8: [0-9a-f]* { shru r5, r6, r7 ; lnk r15 ; ld4s r25, r26 } + 75b0: [0-9a-f]* { shrui r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 } + 75b8: [0-9a-f]* { shrui r15, r16, 5 ; shrui r5, r6, 5 ; ld4s r25, r26 } + 75c0: [0-9a-f]* { shrui r5, r6, 5 ; shl r15, r16, r17 ; ld4s r25, r26 } + 75c8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 } + 75d0: [0-9a-f]* { sub r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 } + 75d8: [0-9a-f]* { sub r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 } + 75e0: [0-9a-f]* { subx r15, r16, r17 ; mz r5, r6, r7 ; ld4s r25, r26 } + 75e8: [0-9a-f]* { subx r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 75f0: [0-9a-f]* { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld4s r25, r26 } + 75f8: [0-9a-f]* { tblidxb0 r5, r6 ; subx r15, r16, r17 ; ld4s r25, r26 } + 7600: [0-9a-f]* { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + 7608: [0-9a-f]* { tblidxb2 r5, r6 ; rotli r15, r16, 5 ; ld4s r25, r26 } + 7610: [0-9a-f]* { tblidxb3 r5, r6 ; move r15, r16 ; ld4s r25, r26 } + 7618: [0-9a-f]* { xor r15, r16, r17 ; cmpne r5, r6, r7 ; ld4s r25, r26 } + 7620: [0-9a-f]* { xor r15, r16, r17 ; subx r5, r6, r7 ; ld4s r25, r26 } + 7628: [0-9a-f]* { xor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4s r25, r26 } + 7630: [0-9a-f]* { cmulaf r5, r6, r7 ; ld4s_add r15, r16, 5 } + 7638: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; ld4s_add r15, r16, 5 } + 7640: [0-9a-f]* { shru r5, r6, r7 ; ld4s_add r15, r16, 5 } + 7648: [0-9a-f]* { v1minu r5, r6, r7 ; ld4s_add r15, r16, 5 } + 7650: [0-9a-f]* { v2mulfsc r5, r6, r7 ; ld4s_add r15, r16, 5 } + 7658: [0-9a-f]* { and r5, r6, r7 ; ld4u r15, r16 } + 7660: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; ld4u r15, r16 } + 7668: [0-9a-f]* { ori r5, r6, 5 ; ld4u r15, r16 } + 7670: [0-9a-f]* { v1cmplts r5, r6, r7 ; ld4u r15, r16 } + 7678: [0-9a-f]* { v2avgs r5, r6, r7 ; ld4u r15, r16 } + 7680: [0-9a-f]* { v4addsc r5, r6, r7 ; ld4u r15, r16 } + 7688: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + 7690: [0-9a-f]* { add r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 } + 7698: [0-9a-f]* { add r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 } + 76a0: [0-9a-f]* { pcnt r5, r6 ; addi r15, r16, 5 ; ld4u r25, r26 } + 76a8: [0-9a-f]* { addi r5, r6, 5 ; ill ; ld4u r25, r26 } + 76b0: [0-9a-f]* { cmovnez r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 } + 76b8: [0-9a-f]* { addx r15, r16, r17 ; shl3add r5, r6, r7 ; ld4u r25, r26 } + 76c0: [0-9a-f]* { addx r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 } + 76c8: [0-9a-f]* { addxi r15, r16, 5 ; ld4u r25, r26 } + 76d0: [0-9a-f]* { tblidxb1 r5, r6 ; addxi r15, r16, 5 ; ld4u r25, r26 } + 76d8: [0-9a-f]* { addxi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + 76e0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 } + 76e8: [0-9a-f]* { and r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 } + 76f0: [0-9a-f]* { and r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 } + 76f8: [0-9a-f]* { pcnt r5, r6 ; andi r15, r16, 5 ; ld4u r25, r26 } + 7700: [0-9a-f]* { andi r5, r6, 5 ; ill ; ld4u r25, r26 } + 7708: [0-9a-f]* { clz r5, r6 ; cmples r15, r16, r17 ; ld4u r25, r26 } + 7710: [0-9a-f]* { cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; ld4u r25, r26 } + 7718: [0-9a-f]* { cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 } + 7720: [0-9a-f]* { cmovnez r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 } + 7728: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + 7730: [0-9a-f]* { cmpeq r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 } + 7738: [0-9a-f]* { cmpeq r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 } + 7740: [0-9a-f]* { cmpeqi r15, r16, 5 ; or r5, r6, r7 ; ld4u r25, r26 } + 7748: [0-9a-f]* { cmpeqi r5, r6, 5 ; ld4u r25, r26 } + 7750: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 } + 7758: [0-9a-f]* { cmples r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 } + 7760: [0-9a-f]* { cmples r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 } + 7768: [0-9a-f]* { ctz r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 } + 7770: [0-9a-f]* { tblidxb0 r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 } + 7778: [0-9a-f]* { cmpleu r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 } + 7780: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 } + 7788: [0-9a-f]* { cmplts r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 } + 7790: [0-9a-f]* { cmplts r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 } + 7798: [0-9a-f]* { cmpltsi r15, r16, 5 ; or r5, r6, r7 ; ld4u r25, r26 } + 77a0: [0-9a-f]* { cmpltsi r5, r6, 5 ; ld4u r25, r26 } + 77a8: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4u r25, r26 } + 77b0: [0-9a-f]* { cmpltu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 } + 77b8: [0-9a-f]* { cmpltu r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 } + 77c0: [0-9a-f]* { ctz r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 77c8: [0-9a-f]* { tblidxb0 r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 77d0: [0-9a-f]* { cmpne r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 } + 77d8: [0-9a-f]* { ctz r5, r6 ; nor r15, r16, r17 ; ld4u r25, r26 } + 77e0: [0-9a-f]* { cmples r5, r6, r7 ; ld4u r25, r26 } + 77e8: [0-9a-f]* { nor r15, r16, r17 ; ld4u r25, r26 } + 77f0: [0-9a-f]* { tblidxb1 r5, r6 ; ld4u r25, r26 } + 77f8: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl2add r15, r16, r17 ; ld4u r25, r26 } + 7800: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; ill ; ld4u r25, r26 } + 7808: [0-9a-f]* { info 19 ; addx r15, r16, r17 ; ld4u r25, r26 } + 7810: [0-9a-f]* { info 19 ; move r5, r6 ; ld4u r25, r26 } + 7818: [0-9a-f]* { info 19 ; shl3addx r5, r6, r7 ; ld4u r25, r26 } + 7820: [0-9a-f]* { jalr r15 ; ld4u r25, r26 } + 7828: [0-9a-f]* { tblidxb1 r5, r6 ; jalr r15 ; ld4u r25, r26 } + 7830: [0-9a-f]* { nop ; jalrp r15 ; ld4u r25, r26 } + 7838: [0-9a-f]* { cmpleu r5, r6, r7 ; jr r15 ; ld4u r25, r26 } + 7840: [0-9a-f]* { shrsi r5, r6, 5 ; jr r15 ; ld4u r25, r26 } + 7848: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jrp r15 ; ld4u r25, r26 } + 7850: [0-9a-f]* { clz r5, r6 ; lnk r15 ; ld4u r25, r26 } + 7858: [0-9a-f]* { shl2add r5, r6, r7 ; lnk r15 ; ld4u r25, r26 } + 7860: [0-9a-f]* { mnz r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 } + 7868: [0-9a-f]* { mnz r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + 7870: [0-9a-f]* { mnz r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 } + 7878: [0-9a-f]* { mulx r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 } + 7880: [0-9a-f]* { move r5, r6 ; cmplts r15, r16, r17 ; ld4u r25, r26 } + 7888: [0-9a-f]* { movei r15, 5 ; addxi r5, r6, 5 ; ld4u r25, r26 } + 7890: [0-9a-f]* { movei r15, 5 ; shl r5, r6, r7 ; ld4u r25, r26 } + 7898: [0-9a-f]* { movei r5, 5 ; jrp r15 ; ld4u r25, r26 } + 78a0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 78a8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + 78b0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; ld4u r25, r26 } + 78b8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 } + 78c0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 ; ld4u r25, r26 } + 78c8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 } + 78d0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 } + 78d8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 } + 78e0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 } + 78e8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 } + 78f0: [0-9a-f]* { mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } + 78f8: [0-9a-f]* { mulx r5, r6, r7 ; rotli r15, r16, 5 ; ld4u r25, r26 } + 7900: [0-9a-f]* { mz r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 } + 7908: [0-9a-f]* { mz r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + 7910: [0-9a-f]* { mz r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 } + 7918: [0-9a-f]* { fsingle_pack1 r5, r6 ; nop ; ld4u r25, r26 } + 7920: [0-9a-f]* { nop ; shl1add r15, r16, r17 ; ld4u r25, r26 } + 7928: [0-9a-f]* { cmoveqz r5, r6, r7 ; nor r15, r16, r17 ; ld4u r25, r26 } + 7930: [0-9a-f]* { nor r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 } + 7938: [0-9a-f]* { nor r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 } + 7940: [0-9a-f]* { ctz r5, r6 ; or r15, r16, r17 ; ld4u r25, r26 } + 7948: [0-9a-f]* { tblidxb0 r5, r6 ; or r15, r16, r17 ; ld4u r25, r26 } + 7950: [0-9a-f]* { or r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 } + 7958: [0-9a-f]* { pcnt r5, r6 ; nor r15, r16, r17 ; ld4u r25, r26 } + 7960: [0-9a-f]* { revbits r5, r6 ; jrp r15 ; ld4u r25, r26 } + 7968: [0-9a-f]* { revbytes r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 7970: [0-9a-f]* { clz r5, r6 ; rotl r15, r16, r17 ; ld4u r25, r26 } + 7978: [0-9a-f]* { rotl r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 } + 7980: [0-9a-f]* { rotl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 } + 7988: [0-9a-f]* { rotli r15, r16, 5 ; cmpne r5, r6, r7 ; ld4u r25, r26 } + 7990: [0-9a-f]* { rotli r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 } + 7998: [0-9a-f]* { rotli r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 } + 79a0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 } + 79a8: [0-9a-f]* { shl r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 } + 79b0: [0-9a-f]* { shl r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + 79b8: [0-9a-f]* { shl1add r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 } + 79c0: [0-9a-f]* { shl1add r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 79c8: [0-9a-f]* { clz r5, r6 ; shl1addx r15, r16, r17 ; ld4u r25, r26 } + 79d0: [0-9a-f]* { shl1addx r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 } + 79d8: [0-9a-f]* { shl1addx r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 } + 79e0: [0-9a-f]* { shl2add r15, r16, r17 ; cmpne r5, r6, r7 ; ld4u r25, r26 } + 79e8: [0-9a-f]* { shl2add r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 } + 79f0: [0-9a-f]* { shl2add r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4u r25, r26 } + 79f8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + 7a00: [0-9a-f]* { shl2addx r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 } + 7a08: [0-9a-f]* { shl2addx r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + 7a10: [0-9a-f]* { shl3add r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 } + 7a18: [0-9a-f]* { shl3add r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 7a20: [0-9a-f]* { clz r5, r6 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } + 7a28: [0-9a-f]* { shl3addx r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 } + 7a30: [0-9a-f]* { shl3addx r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 } + 7a38: [0-9a-f]* { shli r15, r16, 5 ; cmpne r5, r6, r7 ; ld4u r25, r26 } + 7a40: [0-9a-f]* { shli r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 } + 7a48: [0-9a-f]* { shli r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 } + 7a50: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 } + 7a58: [0-9a-f]* { shrs r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 } + 7a60: [0-9a-f]* { shrs r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + 7a68: [0-9a-f]* { shrsi r15, r16, 5 ; nor r5, r6, r7 ; ld4u r25, r26 } + 7a70: [0-9a-f]* { shrsi r5, r6, 5 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 7a78: [0-9a-f]* { clz r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 } + 7a80: [0-9a-f]* { shru r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 } + 7a88: [0-9a-f]* { shru r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 } + 7a90: [0-9a-f]* { shrui r15, r16, 5 ; cmpne r5, r6, r7 ; ld4u r25, r26 } + 7a98: [0-9a-f]* { shrui r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 } + 7aa0: [0-9a-f]* { shrui r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 } + 7aa8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + 7ab0: [0-9a-f]* { sub r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 } + 7ab8: [0-9a-f]* { sub r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + 7ac0: [0-9a-f]* { subx r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 } + 7ac8: [0-9a-f]* { subx r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 7ad0: [0-9a-f]* { tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + 7ad8: [0-9a-f]* { tblidxb0 r5, r6 ; ld4u r25, r26 } + 7ae0: [0-9a-f]* { tblidxb1 r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 } + 7ae8: [0-9a-f]* { tblidxb2 r5, r6 ; shl1add r15, r16, r17 ; ld4u r25, r26 } + 7af0: [0-9a-f]* { tblidxb3 r5, r6 ; mz r15, r16, r17 ; ld4u r25, r26 } + 7af8: [0-9a-f]* { xor r15, r16, r17 ; ld4u r25, r26 } + 7b00: [0-9a-f]* { tblidxb1 r5, r6 ; xor r15, r16, r17 ; ld4u r25, r26 } + 7b08: [0-9a-f]* { xor r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + 7b10: [0-9a-f]* { cmulfr r5, r6, r7 ; ld4u_add r15, r16, 5 } + 7b18: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; ld4u_add r15, r16, 5 } + 7b20: [0-9a-f]* { shrux r5, r6, r7 ; ld4u_add r15, r16, 5 } + 7b28: [0-9a-f]* { v1mnz r5, r6, r7 ; ld4u_add r15, r16, 5 } + 7b30: [0-9a-f]* { v2mults r5, r6, r7 ; ld4u_add r15, r16, 5 } + 7b38: [0-9a-f]* { bfexts r5, r6, 5, 7 ; ld_add r15, r16, 5 } + 7b40: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; ld_add r15, r16, 5 } + 7b48: [0-9a-f]* { revbits r5, r6 ; ld_add r15, r16, 5 } + 7b50: [0-9a-f]* { v1cmpltu r5, r6, r7 ; ld_add r15, r16, 5 } + 7b58: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; ld_add r15, r16, 5 } + 7b60: [0-9a-f]* { v4int_l r5, r6, r7 ; ld_add r15, r16, 5 } + 7b68: [0-9a-f]* { cmulhr r5, r6, r7 ; ldna r15, r16 } + 7b70: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; ldna r15, r16 } + 7b78: [0-9a-f]* { shufflebytes r5, r6, r7 ; ldna r15, r16 } + 7b80: [0-9a-f]* { v1mulu r5, r6, r7 ; ldna r15, r16 } + 7b88: [0-9a-f]* { v2packh r5, r6, r7 ; ldna r15, r16 } + 7b90: [0-9a-f]* { bfins r5, r6, 5, 7 ; ldna_add r15, r16, 5 } + 7b98: [0-9a-f]* { fsingle_pack1 r5, r6 ; ldna_add r15, r16, 5 } + 7ba0: [0-9a-f]* { rotl r5, r6, r7 ; ldna_add r15, r16, 5 } + 7ba8: [0-9a-f]* { v1cmpne r5, r6, r7 ; ldna_add r15, r16, 5 } + 7bb0: [0-9a-f]* { v2cmpleu r5, r6, r7 ; ldna_add r15, r16, 5 } + 7bb8: [0-9a-f]* { v4shl r5, r6, r7 ; ldna_add r15, r16, 5 } + 7bc0: [0-9a-f]* { crc32_8 r5, r6, r7 ; ldnt r15, r16 } + 7bc8: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; ldnt r15, r16 } + 7bd0: [0-9a-f]* { subx r5, r6, r7 ; ldnt r15, r16 } + 7bd8: [0-9a-f]* { v1mz r5, r6, r7 ; ldnt r15, r16 } + 7be0: [0-9a-f]* { v2packuc r5, r6, r7 ; ldnt r15, r16 } + 7be8: [0-9a-f]* { cmoveqz r5, r6, r7 ; ldnt1s r15, r16 } + 7bf0: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; ldnt1s r15, r16 } + 7bf8: [0-9a-f]* { shl r5, r6, r7 ; ldnt1s r15, r16 } + 7c00: [0-9a-f]* { v1ddotpua r5, r6, r7 ; ldnt1s r15, r16 } + 7c08: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; ldnt1s r15, r16 } + 7c10: [0-9a-f]* { v4shrs r5, r6, r7 ; ldnt1s r15, r16 } + 7c18: [0-9a-f]* { dblalign r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + 7c20: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + 7c28: [0-9a-f]* { tblidxb0 r5, r6 ; ldnt1s_add r15, r16, 5 } + 7c30: [0-9a-f]* { v1sadu r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + 7c38: [0-9a-f]* { v2sadau r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + 7c40: [0-9a-f]* { cmpeq r5, r6, r7 ; ldnt1u r15, r16 } + 7c48: [0-9a-f]* { infol 4660 ; ldnt1u r15, r16 } + 7c50: [0-9a-f]* { shl1add r5, r6, r7 ; ldnt1u r15, r16 } + 7c58: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; ldnt1u r15, r16 } + 7c60: [0-9a-f]* { v2cmpltui r5, r6, 5 ; ldnt1u r15, r16 } + 7c68: [0-9a-f]* { v4sub r5, r6, r7 ; ldnt1u r15, r16 } + 7c70: [0-9a-f]* { dblalign4 r5, r6, r7 ; ldnt1u_add r15, r16, 5 } + 7c78: [0-9a-f]* { mula_hu_ls r5, r6, r7 ; ldnt1u_add r15, r16, 5 } + 7c80: [0-9a-f]* { tblidxb2 r5, r6 ; ldnt1u_add r15, r16, 5 } + 7c88: [0-9a-f]* { v1shli r5, r6, 5 ; ldnt1u_add r15, r16, 5 } + 7c90: [0-9a-f]* { v2sadu r5, r6, r7 ; ldnt1u_add r15, r16, 5 } + 7c98: [0-9a-f]* { cmples r5, r6, r7 ; ldnt2s r15, r16 } + 7ca0: [0-9a-f]* { mnz r5, r6, r7 ; ldnt2s r15, r16 } + 7ca8: [0-9a-f]* { shl2add r5, r6, r7 ; ldnt2s r15, r16 } + 7cb0: [0-9a-f]* { v1dotpa r5, r6, r7 ; ldnt2s r15, r16 } + 7cb8: [0-9a-f]* { v2dotp r5, r6, r7 ; ldnt2s r15, r16 } + 7cc0: [0-9a-f]* { xor r5, r6, r7 ; ldnt2s r15, r16 } + 7cc8: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; ldnt2s_add r15, r16, 5 } + 7cd0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; ldnt2s_add r15, r16, 5 } + 7cd8: [0-9a-f]* { v1add r5, r6, r7 ; ldnt2s_add r15, r16, 5 } + 7ce0: [0-9a-f]* { v1shrsi r5, r6, 5 ; ldnt2s_add r15, r16, 5 } + 7ce8: [0-9a-f]* { v2shli r5, r6, 5 ; ldnt2s_add r15, r16, 5 } + 7cf0: [0-9a-f]* { cmplts r5, r6, r7 ; ldnt2u r15, r16 } + 7cf8: [0-9a-f]* { movei r5, 5 ; ldnt2u r15, r16 } + 7d00: [0-9a-f]* { shl3add r5, r6, r7 ; ldnt2u r15, r16 } + 7d08: [0-9a-f]* { v1dotpua r5, r6, r7 ; ldnt2u r15, r16 } + 7d10: [0-9a-f]* { v2int_h r5, r6, r7 ; ldnt2u r15, r16 } + 7d18: [0-9a-f]* { add r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + 7d20: [0-9a-f]* { fdouble_mul_flags r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + 7d28: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + 7d30: [0-9a-f]* { v1adduc r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + 7d38: [0-9a-f]* { v1shrui r5, r6, 5 ; ldnt2u_add r15, r16, 5 } + 7d40: [0-9a-f]* { v2shrs r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + 7d48: [0-9a-f]* { cmpltu r5, r6, r7 ; ldnt4s r15, r16 } + 7d50: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; ldnt4s r15, r16 } + 7d58: [0-9a-f]* { shli r5, r6, 5 ; ldnt4s r15, r16 } + 7d60: [0-9a-f]* { v1dotpusa r5, r6, r7 ; ldnt4s r15, r16 } + 7d68: [0-9a-f]* { v2maxs r5, r6, r7 ; ldnt4s r15, r16 } + 7d70: [0-9a-f]* { addli r5, r6, 4660 ; ldnt4s_add r15, r16, 5 } + 7d78: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; ldnt4s_add r15, r16, 5 } + 7d80: [0-9a-f]* { mulx r5, r6, r7 ; ldnt4s_add r15, r16, 5 } + 7d88: [0-9a-f]* { v1avgu r5, r6, r7 ; ldnt4s_add r15, r16, 5 } + 7d90: [0-9a-f]* { v1subuc r5, r6, r7 ; ldnt4s_add r15, r16, 5 } + 7d98: [0-9a-f]* { v2shru r5, r6, r7 ; ldnt4s_add r15, r16, 5 } + 7da0: [0-9a-f]* { cmpne r5, r6, r7 ; ldnt4u r15, r16 } + 7da8: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; ldnt4u r15, r16 } + 7db0: [0-9a-f]* { shlxi r5, r6, 5 ; ldnt4u r15, r16 } + 7db8: [0-9a-f]* { v1int_l r5, r6, r7 ; ldnt4u r15, r16 } + 7dc0: [0-9a-f]* { v2mins r5, r6, r7 ; ldnt4u r15, r16 } + 7dc8: [0-9a-f]* { addxi r5, r6, 5 ; ldnt4u_add r15, r16, 5 } + 7dd0: [0-9a-f]* { fdouble_unpack_max r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + 7dd8: [0-9a-f]* { nop ; ldnt4u_add r15, r16, 5 } + 7de0: [0-9a-f]* { v1cmpeqi r5, r6, 5 ; ldnt4u_add r15, r16, 5 } + 7de8: [0-9a-f]* { v2addi r5, r6, 5 ; ldnt4u_add r15, r16, 5 } + 7df0: [0-9a-f]* { v2sub r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + 7df8: [0-9a-f]* { cmula r5, r6, r7 ; ldnt_add r15, r16, 5 } + 7e00: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; ldnt_add r15, r16, 5 } + 7e08: [0-9a-f]* { shrsi r5, r6, 5 ; ldnt_add r15, r16, 5 } + 7e10: [0-9a-f]* { v1maxui r5, r6, 5 ; ldnt_add r15, r16, 5 } + 7e18: [0-9a-f]* { v2mnz r5, r6, r7 ; ldnt_add r15, r16, 5 } + 7e20: [0-9a-f]* { add r5, r6, r7 ; lnk r15 ; ld4u r25, r26 } + 7e28: [0-9a-f]* { addx r5, r6, r7 ; lnk r15 ; prefetch r25 } + 7e30: [0-9a-f]* { and r5, r6, r7 ; lnk r15 ; prefetch r25 } + 7e38: [0-9a-f]* { clz r5, r6 ; lnk r15 ; ld4u r25, r26 } + 7e40: [0-9a-f]* { cmovnez r5, r6, r7 ; lnk r15 ; prefetch r25 } + 7e48: [0-9a-f]* { cmpeqi r5, r6, 5 ; lnk r15 ; prefetch_l2 r25 } + 7e50: [0-9a-f]* { cmpleu r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 } + 7e58: [0-9a-f]* { cmpltsi r5, r6, 5 ; lnk r15 ; st r25, r26 } + 7e60: [0-9a-f]* { cmpne r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + 7e68: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; lnk r15 } + 7e70: [0-9a-f]* { fsingle_pack1 r5, r6 ; lnk r15 ; prefetch_l3_fault r25 } + 7e78: [0-9a-f]* { cmpleu r5, r6, r7 ; lnk r15 ; ld r25, r26 } + 7e80: [0-9a-f]* { shrsi r5, r6, 5 ; lnk r15 ; ld r25, r26 } + 7e88: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; lnk r15 ; ld1s r25, r26 } + 7e90: [0-9a-f]* { clz r5, r6 ; lnk r15 ; ld1u r25, r26 } + 7e98: [0-9a-f]* { shl2add r5, r6, r7 ; lnk r15 ; ld1u r25, r26 } + 7ea0: [0-9a-f]* { movei r5, 5 ; lnk r15 ; ld2s r25, r26 } + 7ea8: [0-9a-f]* { add r5, r6, r7 ; lnk r15 ; ld2u r25, r26 } + 7eb0: [0-9a-f]* { revbytes r5, r6 ; lnk r15 ; ld2u r25, r26 } + 7eb8: [0-9a-f]* { ctz r5, r6 ; lnk r15 ; ld4s r25, r26 } + 7ec0: [0-9a-f]* { tblidxb0 r5, r6 ; lnk r15 ; ld4s r25, r26 } + 7ec8: [0-9a-f]* { mz r5, r6, r7 ; lnk r15 ; ld4u r25, r26 } + 7ed0: [0-9a-f]* { mnz r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + 7ed8: [0-9a-f]* { movei r5, 5 ; lnk r15 ; prefetch_l3 r25 } + 7ee0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + 7ee8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 } + 7ef0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; lnk r15 ; prefetch r25 } + 7ef8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; lnk r15 ; prefetch r25 } + 7f00: [0-9a-f]* { mulx r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 } + 7f08: [0-9a-f]* { nop ; lnk r15 ; prefetch_l2_fault r25 } + 7f10: [0-9a-f]* { or r5, r6, r7 ; lnk r15 ; prefetch_l3_fault r25 } + 7f18: [0-9a-f]* { cmpltsi r5, r6, 5 ; lnk r15 ; prefetch r25 } + 7f20: [0-9a-f]* { shrui r5, r6, 5 ; lnk r15 ; prefetch r25 } + 7f28: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; lnk r15 ; prefetch r25 } + 7f30: [0-9a-f]* { cmovnez r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 } + 7f38: [0-9a-f]* { shl3add r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 } + 7f40: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + 7f48: [0-9a-f]* { addx r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 } + 7f50: [0-9a-f]* { rotli r5, r6, 5 ; lnk r15 ; prefetch_l2_fault r25 } + 7f58: [0-9a-f]* { fsingle_pack1 r5, r6 ; lnk r15 ; prefetch_l3 r25 } + 7f60: [0-9a-f]* { tblidxb2 r5, r6 ; lnk r15 ; prefetch_l3 r25 } + 7f68: [0-9a-f]* { nor r5, r6, r7 ; lnk r15 ; prefetch_l3_fault r25 } + 7f70: [0-9a-f]* { revbits r5, r6 ; lnk r15 ; prefetch_l3_fault r25 } + 7f78: [0-9a-f]* { rotl r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + 7f80: [0-9a-f]* { shl r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + 7f88: [0-9a-f]* { shl1addx r5, r6, r7 ; lnk r15 } + 7f90: [0-9a-f]* { shl3add r5, r6, r7 ; lnk r15 ; ld1s r25, r26 } + 7f98: [0-9a-f]* { shli r5, r6, 5 ; lnk r15 ; ld2s r25, r26 } + 7fa0: [0-9a-f]* { shrsi r5, r6, 5 ; lnk r15 ; ld2s r25, r26 } + 7fa8: [0-9a-f]* { shrui r5, r6, 5 ; lnk r15 ; ld4s r25, r26 } + 7fb0: [0-9a-f]* { movei r5, 5 ; lnk r15 ; st r25, r26 } + 7fb8: [0-9a-f]* { add r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + 7fc0: [0-9a-f]* { revbytes r5, r6 ; lnk r15 ; st1 r25, r26 } + 7fc8: [0-9a-f]* { ctz r5, r6 ; lnk r15 ; st2 r25, r26 } + 7fd0: [0-9a-f]* { tblidxb0 r5, r6 ; lnk r15 ; st2 r25, r26 } + 7fd8: [0-9a-f]* { mz r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + 7fe0: [0-9a-f]* { sub r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 } + 7fe8: [0-9a-f]* { tblidxb0 r5, r6 ; lnk r15 ; prefetch_l3 r25 } + 7ff0: [0-9a-f]* { tblidxb2 r5, r6 ; lnk r15 ; st r25, r26 } + 7ff8: [0-9a-f]* { v1ddotpus r5, r6, r7 ; lnk r15 } + 8000: [0-9a-f]* { v2cmpltu r5, r6, r7 ; lnk r15 } + 8008: [0-9a-f]* { v4shru r5, r6, r7 ; lnk r15 } + 8010: [0-9a-f]* { cmples r5, r6, r7 ; mf } + 8018: [0-9a-f]* { mnz r5, r6, r7 ; mf } + 8020: [0-9a-f]* { shl2add r5, r6, r7 ; mf } + 8028: [0-9a-f]* { v1dotpa r5, r6, r7 ; mf } + 8030: [0-9a-f]* { v2dotp r5, r6, r7 ; mf } + 8038: [0-9a-f]* { xor r5, r6, r7 ; mf } + 8040: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 8048: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 8050: [0-9a-f]* { v1add r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 8058: [0-9a-f]* { v1shrsi r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 8060: [0-9a-f]* { v2shli r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 8068: [0-9a-f]* { mm r5, r6, 5, 7 ; cmpne r15, r16, r17 } + 8070: [0-9a-f]* { mm r5, r6, 5, 7 ; ld4u r15, r16 } + 8078: [0-9a-f]* { mm r5, r6, 5, 7 ; prefetch_l1_fault r15 } + 8080: [0-9a-f]* { mm r5, r6, 5, 7 ; stnt_add r15, r16, 5 } + 8088: [0-9a-f]* { mm r5, r6, 5, 7 ; v2cmpltsi r15, r16, 5 } + 8090: [0-9a-f]* { mnz r15, r16, r17 ; add r5, r6, r7 ; ld1u r25, r26 } + 8098: [0-9a-f]* { mnz r15, r16, r17 ; addx r5, r6, r7 ; ld2s r25, r26 } + 80a0: [0-9a-f]* { mnz r15, r16, r17 ; and r5, r6, r7 ; ld2s r25, r26 } + 80a8: [0-9a-f]* { clz r5, r6 ; mnz r15, r16, r17 ; ld1u r25, r26 } + 80b0: [0-9a-f]* { cmovnez r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 } + 80b8: [0-9a-f]* { mnz r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 } + 80c0: [0-9a-f]* { mnz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch r25 } + 80c8: [0-9a-f]* { mnz r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 } + 80d0: [0-9a-f]* { mnz r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 } + 80d8: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; mnz r15, r16, r17 } + 80e0: [0-9a-f]* { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 } + 80e8: [0-9a-f]* { cmovnez r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + 80f0: [0-9a-f]* { mnz r15, r16, r17 ; shl3add r5, r6, r7 ; ld r25, r26 } + 80f8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; ld1s r25, r26 } + 8100: [0-9a-f]* { mnz r15, r16, r17 ; addx r5, r6, r7 ; ld1u r25, r26 } + 8108: [0-9a-f]* { mnz r15, r16, r17 ; rotli r5, r6, 5 ; ld1u r25, r26 } + 8110: [0-9a-f]* { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 } + 8118: [0-9a-f]* { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 } + 8120: [0-9a-f]* { mnz r15, r16, r17 ; nor r5, r6, r7 ; ld2u r25, r26 } + 8128: [0-9a-f]* { mnz r15, r16, r17 ; cmplts r5, r6, r7 ; ld4s r25, r26 } + 8130: [0-9a-f]* { mnz r15, r16, r17 ; shru r5, r6, r7 ; ld4s r25, r26 } + 8138: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; mnz r15, r16, r17 ; ld4u r25, r26 } + 8140: [0-9a-f]* { mnz r15, r16, r17 ; mnz r5, r6, r7 ; ld4u r25, r26 } + 8148: [0-9a-f]* { mnz r15, r16, r17 ; movei r5, 5 ; prefetch r25 } + 8150: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; ld4u r25, r26 } + 8158: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 } + 8160: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 } + 8168: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 } + 8170: [0-9a-f]* { mulx r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 } + 8178: [0-9a-f]* { mnz r15, r16, r17 ; nop ; prefetch r25 } + 8180: [0-9a-f]* { mnz r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 } + 8188: [0-9a-f]* { mnz r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch r25 } + 8190: [0-9a-f]* { mnz r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + 8198: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + 81a0: [0-9a-f]* { mnz r15, r16, r17 ; and r5, r6, r7 ; prefetch_l1_fault r25 } + 81a8: [0-9a-f]* { mnz r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l1_fault r25 } + 81b0: [0-9a-f]* { mnz r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l2 r25 } + 81b8: [0-9a-f]* { mnz r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2 r25 } + 81c0: [0-9a-f]* { pcnt r5, r6 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 } + 81c8: [0-9a-f]* { mnz r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 } + 81d0: [0-9a-f]* { mnz r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l3 r25 } + 81d8: [0-9a-f]* { mulax r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3_fault r25 } + 81e0: [0-9a-f]* { revbits r5, r6 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 } + 81e8: [0-9a-f]* { mnz r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 } + 81f0: [0-9a-f]* { mnz r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l3_fault r25 } + 81f8: [0-9a-f]* { mnz r15, r16, r17 ; shl1addx r5, r6, r7 ; st r25, r26 } + 8200: [0-9a-f]* { mnz r15, r16, r17 ; shl2addx r5, r6, r7 ; st2 r25, r26 } + 8208: [0-9a-f]* { mnz r15, r16, r17 ; shl3addx r5, r6, r7 } + 8210: [0-9a-f]* { mnz r15, r16, r17 ; shrs r5, r6, r7 } + 8218: [0-9a-f]* { mnz r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 } + 8220: [0-9a-f]* { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; st r25, r26 } + 8228: [0-9a-f]* { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; st r25, r26 } + 8230: [0-9a-f]* { mnz r15, r16, r17 ; nor r5, r6, r7 ; st1 r25, r26 } + 8238: [0-9a-f]* { mnz r15, r16, r17 ; cmplts r5, r6, r7 ; st2 r25, r26 } + 8240: [0-9a-f]* { mnz r15, r16, r17 ; shru r5, r6, r7 ; st2 r25, r26 } + 8248: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 } + 8250: [0-9a-f]* { mnz r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 } + 8258: [0-9a-f]* { tblidxb0 r5, r6 ; mnz r15, r16, r17 ; prefetch r25 } + 8260: [0-9a-f]* { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; prefetch_l2 r25 } + 8268: [0-9a-f]* { mnz r15, r16, r17 ; v1cmpltui r5, r6, 5 } + 8270: [0-9a-f]* { mnz r15, r16, r17 ; v2cmples r5, r6, r7 } + 8278: [0-9a-f]* { mnz r15, r16, r17 ; v4packsc r5, r6, r7 } + 8280: [0-9a-f]* { mnz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3_fault r25 } + 8288: [0-9a-f]* { mnz r5, r6, r7 ; addx r15, r16, r17 ; st r25, r26 } + 8290: [0-9a-f]* { mnz r5, r6, r7 ; and r15, r16, r17 ; st r25, r26 } + 8298: [0-9a-f]* { mnz r5, r6, r7 ; cmpeq r15, r16, r17 ; st2 r25, r26 } + 82a0: [0-9a-f]* { mnz r5, r6, r7 ; cmples r15, r16, r17 ; st2 r25, r26 } + 82a8: [0-9a-f]* { mnz r5, r6, r7 ; cmplts r15, r16, r17 } + 82b0: [0-9a-f]* { mnz r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 } + 82b8: [0-9a-f]* { mnz r5, r6, r7 ; ld2u r25, r26 } + 82c0: [0-9a-f]* { mnz r5, r6, r7 ; info 19 ; ld4s r25, r26 } + 82c8: [0-9a-f]* { mnz r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 } + 82d0: [0-9a-f]* { mnz r5, r6, r7 ; jrp r15 ; ld4u r25, r26 } + 82d8: [0-9a-f]* { mnz r5, r6, r7 ; nop ; ld r25, r26 } + 82e0: [0-9a-f]* { mnz r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 } + 82e8: [0-9a-f]* { mnz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1u r25, r26 } + 82f0: [0-9a-f]* { mnz r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 } + 82f8: [0-9a-f]* { mnz r5, r6, r7 ; shrsi r15, r16, 5 ; ld2s r25, r26 } + 8300: [0-9a-f]* { mnz r5, r6, r7 ; shl r15, r16, r17 ; ld2u r25, r26 } + 8308: [0-9a-f]* { mnz r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 } + 8310: [0-9a-f]* { mnz r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 8318: [0-9a-f]* { mnz r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + 8320: [0-9a-f]* { mnz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + 8328: [0-9a-f]* { mnz r5, r6, r7 ; movei r15, 5 ; prefetch_l1_fault r25 } + 8330: [0-9a-f]* { mnz r5, r6, r7 ; nop ; prefetch_l1_fault r25 } + 8338: [0-9a-f]* { mnz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 } + 8340: [0-9a-f]* { mnz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 } + 8348: [0-9a-f]* { mnz r5, r6, r7 ; info 19 ; prefetch r25 } + 8350: [0-9a-f]* { mnz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + 8358: [0-9a-f]* { mnz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 } + 8360: [0-9a-f]* { mnz r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2 r25 } + 8368: [0-9a-f]* { mnz r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 } + 8370: [0-9a-f]* { mnz r5, r6, r7 ; movei r15, 5 ; prefetch_l3 r25 } + 8378: [0-9a-f]* { mnz r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 } + 8380: [0-9a-f]* { mnz r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 } + 8388: [0-9a-f]* { mnz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2 r25 } + 8390: [0-9a-f]* { mnz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 } + 8398: [0-9a-f]* { mnz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 } + 83a0: [0-9a-f]* { mnz r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + 83a8: [0-9a-f]* { mnz r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 } + 83b0: [0-9a-f]* { mnz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 } + 83b8: [0-9a-f]* { mnz r5, r6, r7 ; info 19 ; st r25, r26 } + 83c0: [0-9a-f]* { mnz r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 } + 83c8: [0-9a-f]* { mnz r5, r6, r7 ; st2 r15, r16 } + 83d0: [0-9a-f]* { mnz r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 } + 83d8: [0-9a-f]* { mnz r5, r6, r7 ; rotli r15, r16, 5 ; st4 r25, r26 } + 83e0: [0-9a-f]* { mnz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + 83e8: [0-9a-f]* { mnz r5, r6, r7 ; v1maxu r15, r16, r17 } + 83f0: [0-9a-f]* { mnz r5, r6, r7 ; v2shrs r15, r16, r17 } + 83f8: [0-9a-f]* { move r15, r16 ; add r5, r6, r7 ; ld1u r25, r26 } + 8400: [0-9a-f]* { move r15, r16 ; addx r5, r6, r7 ; ld2s r25, r26 } + 8408: [0-9a-f]* { move r15, r16 ; and r5, r6, r7 ; ld2s r25, r26 } + 8410: [0-9a-f]* { clz r5, r6 ; move r15, r16 ; ld1u r25, r26 } + 8418: [0-9a-f]* { cmovnez r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 } + 8420: [0-9a-f]* { move r15, r16 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 } + 8428: [0-9a-f]* { move r15, r16 ; cmpleu r5, r6, r7 ; prefetch r25 } + 8430: [0-9a-f]* { move r15, r16 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 } + 8438: [0-9a-f]* { move r15, r16 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 } + 8440: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; move r15, r16 } + 8448: [0-9a-f]* { fsingle_pack1 r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 } + 8450: [0-9a-f]* { cmovnez r5, r6, r7 ; move r15, r16 ; ld r25, r26 } + 8458: [0-9a-f]* { move r15, r16 ; shl3add r5, r6, r7 ; ld r25, r26 } + 8460: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld1s r25, r26 } + 8468: [0-9a-f]* { move r15, r16 ; addx r5, r6, r7 ; ld1u r25, r26 } + 8470: [0-9a-f]* { move r15, r16 ; rotli r5, r6, 5 ; ld1u r25, r26 } + 8478: [0-9a-f]* { fsingle_pack1 r5, r6 ; move r15, r16 ; ld2s r25, r26 } + 8480: [0-9a-f]* { tblidxb2 r5, r6 ; move r15, r16 ; ld2s r25, r26 } + 8488: [0-9a-f]* { move r15, r16 ; nor r5, r6, r7 ; ld2u r25, r26 } + 8490: [0-9a-f]* { move r15, r16 ; cmplts r5, r6, r7 ; ld4s r25, r26 } + 8498: [0-9a-f]* { move r15, r16 ; shru r5, r6, r7 ; ld4s r25, r26 } + 84a0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 } + 84a8: [0-9a-f]* { move r15, r16 ; mnz r5, r6, r7 ; ld4u r25, r26 } + 84b0: [0-9a-f]* { move r15, r16 ; movei r5, 5 ; prefetch r25 } + 84b8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 } + 84c0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 } + 84c8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 } + 84d0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; move r15, r16 ; ld2s r25, r26 } + 84d8: [0-9a-f]* { mulx r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 } + 84e0: [0-9a-f]* { move r15, r16 ; nop ; prefetch r25 } + 84e8: [0-9a-f]* { move r15, r16 ; or r5, r6, r7 ; prefetch_l1_fault r25 } + 84f0: [0-9a-f]* { move r15, r16 ; cmpeqi r5, r6, 5 ; prefetch r25 } + 84f8: [0-9a-f]* { move r15, r16 ; shli r5, r6, 5 ; prefetch r25 } + 8500: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; move r15, r16 ; prefetch r25 } + 8508: [0-9a-f]* { move r15, r16 ; and r5, r6, r7 ; prefetch_l1_fault r25 } + 8510: [0-9a-f]* { move r15, r16 ; shl1add r5, r6, r7 ; prefetch_l1_fault r25 } + 8518: [0-9a-f]* { move r15, r16 ; mnz r5, r6, r7 ; prefetch_l2 r25 } + 8520: [0-9a-f]* { move r15, r16 ; xor r5, r6, r7 ; prefetch_l2 r25 } + 8528: [0-9a-f]* { pcnt r5, r6 ; move r15, r16 ; prefetch_l2_fault r25 } + 8530: [0-9a-f]* { move r15, r16 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 } + 8538: [0-9a-f]* { move r15, r16 ; sub r5, r6, r7 ; prefetch_l3 r25 } + 8540: [0-9a-f]* { mulax r5, r6, r7 ; move r15, r16 ; prefetch_l3_fault r25 } + 8548: [0-9a-f]* { revbits r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 } + 8550: [0-9a-f]* { move r15, r16 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 } + 8558: [0-9a-f]* { move r15, r16 ; shl r5, r6, r7 ; prefetch_l3_fault r25 } + 8560: [0-9a-f]* { move r15, r16 ; shl1addx r5, r6, r7 ; st r25, r26 } + 8568: [0-9a-f]* { move r15, r16 ; shl2addx r5, r6, r7 ; st2 r25, r26 } + 8570: [0-9a-f]* { move r15, r16 ; shl3addx r5, r6, r7 } + 8578: [0-9a-f]* { move r15, r16 ; shrs r5, r6, r7 } + 8580: [0-9a-f]* { move r15, r16 ; shrui r5, r6, 5 ; ld1s r25, r26 } + 8588: [0-9a-f]* { fsingle_pack1 r5, r6 ; move r15, r16 ; st r25, r26 } + 8590: [0-9a-f]* { tblidxb2 r5, r6 ; move r15, r16 ; st r25, r26 } + 8598: [0-9a-f]* { move r15, r16 ; nor r5, r6, r7 ; st1 r25, r26 } + 85a0: [0-9a-f]* { move r15, r16 ; cmplts r5, r6, r7 ; st2 r25, r26 } + 85a8: [0-9a-f]* { move r15, r16 ; shru r5, r6, r7 ; st2 r25, r26 } + 85b0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + 85b8: [0-9a-f]* { move r15, r16 ; sub r5, r6, r7 ; prefetch r25 } + 85c0: [0-9a-f]* { tblidxb0 r5, r6 ; move r15, r16 ; prefetch r25 } + 85c8: [0-9a-f]* { tblidxb2 r5, r6 ; move r15, r16 ; prefetch_l2 r25 } + 85d0: [0-9a-f]* { move r15, r16 ; v1cmpltui r5, r6, 5 } + 85d8: [0-9a-f]* { move r15, r16 ; v2cmples r5, r6, r7 } + 85e0: [0-9a-f]* { move r15, r16 ; v4packsc r5, r6, r7 } + 85e8: [0-9a-f]* { move r5, r6 ; add r15, r16, r17 ; prefetch_l3_fault r25 } + 85f0: [0-9a-f]* { move r5, r6 ; addx r15, r16, r17 ; st r25, r26 } + 85f8: [0-9a-f]* { move r5, r6 ; and r15, r16, r17 ; st r25, r26 } + 8600: [0-9a-f]* { move r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 } + 8608: [0-9a-f]* { move r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 } + 8610: [0-9a-f]* { move r5, r6 ; cmplts r15, r16, r17 } + 8618: [0-9a-f]* { move r5, r6 ; cmpne r15, r16, r17 ; ld r25, r26 } + 8620: [0-9a-f]* { move r5, r6 ; ld2u r25, r26 } + 8628: [0-9a-f]* { move r5, r6 ; info 19 ; ld4s r25, r26 } + 8630: [0-9a-f]* { move r5, r6 ; jalrp r15 ; ld2u r25, r26 } + 8638: [0-9a-f]* { move r5, r6 ; jrp r15 ; ld4u r25, r26 } + 8640: [0-9a-f]* { move r5, r6 ; nop ; ld r25, r26 } + 8648: [0-9a-f]* { move r5, r6 ; jalrp r15 ; ld1s r25, r26 } + 8650: [0-9a-f]* { move r5, r6 ; cmpleu r15, r16, r17 ; ld1u r25, r26 } + 8658: [0-9a-f]* { move r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 } + 8660: [0-9a-f]* { move r5, r6 ; shrsi r15, r16, 5 ; ld2s r25, r26 } + 8668: [0-9a-f]* { move r5, r6 ; shl r15, r16, r17 ; ld2u r25, r26 } + 8670: [0-9a-f]* { move r5, r6 ; mnz r15, r16, r17 ; ld4s r25, r26 } + 8678: [0-9a-f]* { move r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 8680: [0-9a-f]* { move r5, r6 ; ldnt1s_add r15, r16, 5 } + 8688: [0-9a-f]* { move r5, r6 ; mnz r15, r16, r17 ; prefetch r25 } + 8690: [0-9a-f]* { move r5, r6 ; movei r15, 5 ; prefetch_l1_fault r25 } + 8698: [0-9a-f]* { move r5, r6 ; nop ; prefetch_l1_fault r25 } + 86a0: [0-9a-f]* { move r5, r6 ; or r15, r16, r17 ; prefetch_l2_fault r25 } + 86a8: [0-9a-f]* { move r5, r6 ; rotli r15, r16, 5 ; prefetch r25 } + 86b0: [0-9a-f]* { move r5, r6 ; info 19 ; prefetch r25 } + 86b8: [0-9a-f]* { move r5, r6 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + 86c0: [0-9a-f]* { move r5, r6 ; add r15, r16, r17 ; prefetch_l2 r25 } + 86c8: [0-9a-f]* { move r5, r6 ; shrsi r15, r16, 5 ; prefetch_l2 r25 } + 86d0: [0-9a-f]* { move r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 } + 86d8: [0-9a-f]* { move r5, r6 ; movei r15, 5 ; prefetch_l3 r25 } + 86e0: [0-9a-f]* { move r5, r6 ; info 19 ; prefetch_l3_fault r25 } + 86e8: [0-9a-f]* { move r5, r6 ; rotl r15, r16, r17 ; prefetch r25 } + 86f0: [0-9a-f]* { move r5, r6 ; shl r15, r16, r17 ; prefetch_l2 r25 } + 86f8: [0-9a-f]* { move r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 } + 8700: [0-9a-f]* { move r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 } + 8708: [0-9a-f]* { move r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + 8710: [0-9a-f]* { move r5, r6 ; shrs r15, r16, r17 ; st1 r25, r26 } + 8718: [0-9a-f]* { move r5, r6 ; shru r15, r16, r17 ; st4 r25, r26 } + 8720: [0-9a-f]* { move r5, r6 ; info 19 ; st r25, r26 } + 8728: [0-9a-f]* { move r5, r6 ; cmples r15, r16, r17 ; st1 r25, r26 } + 8730: [0-9a-f]* { move r5, r6 ; st2 r15, r16 } + 8738: [0-9a-f]* { move r5, r6 ; shrs r15, r16, r17 ; st2 r25, r26 } + 8740: [0-9a-f]* { move r5, r6 ; rotli r15, r16, 5 ; st4 r25, r26 } + 8748: [0-9a-f]* { move r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + 8750: [0-9a-f]* { move r5, r6 ; v1maxu r15, r16, r17 } + 8758: [0-9a-f]* { move r5, r6 ; v2shrs r15, r16, r17 } + 8760: [0-9a-f]* { movei r15, 5 ; add r5, r6, r7 ; ld1u r25, r26 } + 8768: [0-9a-f]* { movei r15, 5 ; addx r5, r6, r7 ; ld2s r25, r26 } + 8770: [0-9a-f]* { movei r15, 5 ; and r5, r6, r7 ; ld2s r25, r26 } + 8778: [0-9a-f]* { clz r5, r6 ; movei r15, 5 ; ld1u r25, r26 } + 8780: [0-9a-f]* { cmovnez r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 } + 8788: [0-9a-f]* { movei r15, 5 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 } + 8790: [0-9a-f]* { movei r15, 5 ; cmpleu r5, r6, r7 ; prefetch r25 } + 8798: [0-9a-f]* { movei r15, 5 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 } + 87a0: [0-9a-f]* { movei r15, 5 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 } + 87a8: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; movei r15, 5 } + 87b0: [0-9a-f]* { fsingle_pack1 r5, r6 ; movei r15, 5 ; prefetch_l1_fault r25 } + 87b8: [0-9a-f]* { cmovnez r5, r6, r7 ; movei r15, 5 ; ld r25, r26 } + 87c0: [0-9a-f]* { movei r15, 5 ; shl3add r5, r6, r7 ; ld r25, r26 } + 87c8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } + 87d0: [0-9a-f]* { movei r15, 5 ; addx r5, r6, r7 ; ld1u r25, r26 } + 87d8: [0-9a-f]* { movei r15, 5 ; rotli r5, r6, 5 ; ld1u r25, r26 } + 87e0: [0-9a-f]* { fsingle_pack1 r5, r6 ; movei r15, 5 ; ld2s r25, r26 } + 87e8: [0-9a-f]* { tblidxb2 r5, r6 ; movei r15, 5 ; ld2s r25, r26 } + 87f0: [0-9a-f]* { movei r15, 5 ; nor r5, r6, r7 ; ld2u r25, r26 } + 87f8: [0-9a-f]* { movei r15, 5 ; cmplts r5, r6, r7 ; ld4s r25, r26 } + 8800: [0-9a-f]* { movei r15, 5 ; shru r5, r6, r7 ; ld4s r25, r26 } + 8808: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 } + 8810: [0-9a-f]* { movei r15, 5 ; mnz r5, r6, r7 ; ld4u r25, r26 } + 8818: [0-9a-f]* { movei r15, 5 ; movei r5, 5 ; prefetch r25 } + 8820: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 } + 8828: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; movei r15, 5 ; ld4s r25, r26 } + 8830: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 } + 8838: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; movei r15, 5 ; ld2s r25, r26 } + 8840: [0-9a-f]* { mulx r5, r6, r7 ; movei r15, 5 ; ld4s r25, r26 } + 8848: [0-9a-f]* { movei r15, 5 ; nop ; prefetch r25 } + 8850: [0-9a-f]* { movei r15, 5 ; or r5, r6, r7 ; prefetch_l1_fault r25 } + 8858: [0-9a-f]* { movei r15, 5 ; cmpeqi r5, r6, 5 ; prefetch r25 } + 8860: [0-9a-f]* { movei r15, 5 ; shli r5, r6, 5 ; prefetch r25 } + 8868: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + 8870: [0-9a-f]* { movei r15, 5 ; and r5, r6, r7 ; prefetch_l1_fault r25 } + 8878: [0-9a-f]* { movei r15, 5 ; shl1add r5, r6, r7 ; prefetch_l1_fault r25 } + 8880: [0-9a-f]* { movei r15, 5 ; mnz r5, r6, r7 ; prefetch_l2 r25 } + 8888: [0-9a-f]* { movei r15, 5 ; xor r5, r6, r7 ; prefetch_l2 r25 } + 8890: [0-9a-f]* { pcnt r5, r6 ; movei r15, 5 ; prefetch_l2_fault r25 } + 8898: [0-9a-f]* { movei r15, 5 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 } + 88a0: [0-9a-f]* { movei r15, 5 ; sub r5, r6, r7 ; prefetch_l3 r25 } + 88a8: [0-9a-f]* { mulax r5, r6, r7 ; movei r15, 5 ; prefetch_l3_fault r25 } + 88b0: [0-9a-f]* { revbits r5, r6 ; movei r15, 5 ; prefetch_l1_fault r25 } + 88b8: [0-9a-f]* { movei r15, 5 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 } + 88c0: [0-9a-f]* { movei r15, 5 ; shl r5, r6, r7 ; prefetch_l3_fault r25 } + 88c8: [0-9a-f]* { movei r15, 5 ; shl1addx r5, r6, r7 ; st r25, r26 } + 88d0: [0-9a-f]* { movei r15, 5 ; shl2addx r5, r6, r7 ; st2 r25, r26 } + 88d8: [0-9a-f]* { movei r15, 5 ; shl3addx r5, r6, r7 } + 88e0: [0-9a-f]* { movei r15, 5 ; shrs r5, r6, r7 } + 88e8: [0-9a-f]* { movei r15, 5 ; shrui r5, r6, 5 ; ld1s r25, r26 } + 88f0: [0-9a-f]* { fsingle_pack1 r5, r6 ; movei r15, 5 ; st r25, r26 } + 88f8: [0-9a-f]* { tblidxb2 r5, r6 ; movei r15, 5 ; st r25, r26 } + 8900: [0-9a-f]* { movei r15, 5 ; nor r5, r6, r7 ; st1 r25, r26 } + 8908: [0-9a-f]* { movei r15, 5 ; cmplts r5, r6, r7 ; st2 r25, r26 } + 8910: [0-9a-f]* { movei r15, 5 ; shru r5, r6, r7 ; st2 r25, r26 } + 8918: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 } + 8920: [0-9a-f]* { movei r15, 5 ; sub r5, r6, r7 ; prefetch r25 } + 8928: [0-9a-f]* { tblidxb0 r5, r6 ; movei r15, 5 ; prefetch r25 } + 8930: [0-9a-f]* { tblidxb2 r5, r6 ; movei r15, 5 ; prefetch_l2 r25 } + 8938: [0-9a-f]* { movei r15, 5 ; v1cmpltui r5, r6, 5 } + 8940: [0-9a-f]* { movei r15, 5 ; v2cmples r5, r6, r7 } + 8948: [0-9a-f]* { movei r15, 5 ; v4packsc r5, r6, r7 } + 8950: [0-9a-f]* { movei r5, 5 ; add r15, r16, r17 ; prefetch_l3_fault r25 } + 8958: [0-9a-f]* { movei r5, 5 ; addx r15, r16, r17 ; st r25, r26 } + 8960: [0-9a-f]* { movei r5, 5 ; and r15, r16, r17 ; st r25, r26 } + 8968: [0-9a-f]* { movei r5, 5 ; cmpeq r15, r16, r17 ; st2 r25, r26 } + 8970: [0-9a-f]* { movei r5, 5 ; cmples r15, r16, r17 ; st2 r25, r26 } + 8978: [0-9a-f]* { movei r5, 5 ; cmplts r15, r16, r17 } + 8980: [0-9a-f]* { movei r5, 5 ; cmpne r15, r16, r17 ; ld r25, r26 } + 8988: [0-9a-f]* { movei r5, 5 ; ld2u r25, r26 } + 8990: [0-9a-f]* { movei r5, 5 ; info 19 ; ld4s r25, r26 } + 8998: [0-9a-f]* { movei r5, 5 ; jalrp r15 ; ld2u r25, r26 } + 89a0: [0-9a-f]* { movei r5, 5 ; jrp r15 ; ld4u r25, r26 } + 89a8: [0-9a-f]* { movei r5, 5 ; nop ; ld r25, r26 } + 89b0: [0-9a-f]* { movei r5, 5 ; jalrp r15 ; ld1s r25, r26 } + 89b8: [0-9a-f]* { movei r5, 5 ; cmpleu r15, r16, r17 ; ld1u r25, r26 } + 89c0: [0-9a-f]* { movei r5, 5 ; add r15, r16, r17 ; ld2s r25, r26 } + 89c8: [0-9a-f]* { movei r5, 5 ; shrsi r15, r16, 5 ; ld2s r25, r26 } + 89d0: [0-9a-f]* { movei r5, 5 ; shl r15, r16, r17 ; ld2u r25, r26 } + 89d8: [0-9a-f]* { movei r5, 5 ; mnz r15, r16, r17 ; ld4s r25, r26 } + 89e0: [0-9a-f]* { movei r5, 5 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 89e8: [0-9a-f]* { movei r5, 5 ; ldnt1s_add r15, r16, 5 } + 89f0: [0-9a-f]* { movei r5, 5 ; mnz r15, r16, r17 ; prefetch r25 } + 89f8: [0-9a-f]* { movei r5, 5 ; movei r15, 5 ; prefetch_l1_fault r25 } + 8a00: [0-9a-f]* { movei r5, 5 ; nop ; prefetch_l1_fault r25 } + 8a08: [0-9a-f]* { movei r5, 5 ; or r15, r16, r17 ; prefetch_l2_fault r25 } + 8a10: [0-9a-f]* { movei r5, 5 ; rotli r15, r16, 5 ; prefetch r25 } + 8a18: [0-9a-f]* { movei r5, 5 ; info 19 ; prefetch r25 } + 8a20: [0-9a-f]* { movei r5, 5 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + 8a28: [0-9a-f]* { movei r5, 5 ; add r15, r16, r17 ; prefetch_l2 r25 } + 8a30: [0-9a-f]* { movei r5, 5 ; shrsi r15, r16, 5 ; prefetch_l2 r25 } + 8a38: [0-9a-f]* { movei r5, 5 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 } + 8a40: [0-9a-f]* { movei r5, 5 ; movei r15, 5 ; prefetch_l3 r25 } + 8a48: [0-9a-f]* { movei r5, 5 ; info 19 ; prefetch_l3_fault r25 } + 8a50: [0-9a-f]* { movei r5, 5 ; rotl r15, r16, r17 ; prefetch r25 } + 8a58: [0-9a-f]* { movei r5, 5 ; shl r15, r16, r17 ; prefetch_l2 r25 } + 8a60: [0-9a-f]* { movei r5, 5 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 } + 8a68: [0-9a-f]* { movei r5, 5 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 } + 8a70: [0-9a-f]* { movei r5, 5 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + 8a78: [0-9a-f]* { movei r5, 5 ; shrs r15, r16, r17 ; st1 r25, r26 } + 8a80: [0-9a-f]* { movei r5, 5 ; shru r15, r16, r17 ; st4 r25, r26 } + 8a88: [0-9a-f]* { movei r5, 5 ; info 19 ; st r25, r26 } + 8a90: [0-9a-f]* { movei r5, 5 ; cmples r15, r16, r17 ; st1 r25, r26 } + 8a98: [0-9a-f]* { movei r5, 5 ; st2 r15, r16 } + 8aa0: [0-9a-f]* { movei r5, 5 ; shrs r15, r16, r17 ; st2 r25, r26 } + 8aa8: [0-9a-f]* { movei r5, 5 ; rotli r15, r16, 5 ; st4 r25, r26 } + 8ab0: [0-9a-f]* { movei r5, 5 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + 8ab8: [0-9a-f]* { movei r5, 5 ; v1maxu r15, r16, r17 } + 8ac0: [0-9a-f]* { movei r5, 5 ; v2shrs r15, r16, r17 } + 8ac8: [0-9a-f]* { moveli r15, 4660 ; addli r5, r6, 4660 } + 8ad0: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; moveli r15, 4660 } + 8ad8: [0-9a-f]* { mulx r5, r6, r7 ; moveli r15, 4660 } + 8ae0: [0-9a-f]* { v1avgu r5, r6, r7 ; moveli r15, 4660 } + 8ae8: [0-9a-f]* { moveli r15, 4660 ; v1subuc r5, r6, r7 } + 8af0: [0-9a-f]* { moveli r15, 4660 ; v2shru r5, r6, r7 } + 8af8: [0-9a-f]* { moveli r5, 4660 ; dtlbpr r15 } + 8b00: [0-9a-f]* { moveli r5, 4660 ; ldna_add r15, r16, 5 } + 8b08: [0-9a-f]* { moveli r5, 4660 ; prefetch_l3_fault r15 } + 8b10: [0-9a-f]* { moveli r5, 4660 ; v1add r15, r16, r17 } + 8b18: [0-9a-f]* { moveli r5, 4660 ; v2int_h r15, r16, r17 } + 8b20: [0-9a-f]* { addxsc r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 } + 8b28: [0-9a-f]* { mtspr MEM_ERROR_CBOX_ADDR, r16 } + 8b30: [0-9a-f]* { or r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 } + 8b38: [0-9a-f]* { v1cmpleu r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 } + 8b40: [0-9a-f]* { v2adiffs r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 } + 8b48: [0-9a-f]* { v4add r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 } + 8b50: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + 8b58: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 } + 8b60: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 } + 8b68: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 } + 8b70: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 } + 8b78: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 } + 8b80: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 } + 8b88: [0-9a-f]* { mul_hs_hs r5, r6, r7 } + 8b90: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; infol 4660 } + 8b98: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; jalrp r15 } + 8ba0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 } + 8ba8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; ld r25, r26 } + 8bb0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld1s r25, r26 } + 8bb8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; move r15, r16 ; ld1u r25, r26 } + 8bc0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; ld2s r25, r26 } + 8bc8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld2u r25, r26 } + 8bd0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + 8bd8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; ld4s r25, r26 } + 8be0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; ld4u r25, r26 } + 8be8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; lnk r15 ; ld1u r25, r26 } + 8bf0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; move r15, r16 ; ld1u r25, r26 } + 8bf8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; ld1u r25, r26 } + 8c00: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; ld2u r25, r26 } + 8c08: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + 8c10: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 } + 8c18: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 } + 8c20: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 } + 8c28: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + 8c30: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 } + 8c38: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 } + 8c40: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3 r25 } + 8c48: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 } + 8c50: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 } + 8c58: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld2u r25, r26 } + 8c60: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 } + 8c68: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 } + 8c70: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 } + 8c78: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2 r25 } + 8c80: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 } + 8c88: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; st r25, r26 } + 8c90: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; st1 r25, r26 } + 8c98: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 ; st2 r25, r26 } + 8ca0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 } + 8ca8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 } + 8cb0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 } + 8cb8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; v2add r15, r16, r17 } + 8cc0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; v4shru r15, r16, r17 } + 8cc8: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; cmpltsi r15, r16, 5 } + 8cd0: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; ld2u_add r15, r16, 5 } + 8cd8: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; prefetch_add_l3 r15, 5 } + 8ce0: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; stnt2_add r15, r16, 5 } + 8ce8: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; v2cmples r15, r16, r17 } + 8cf0: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; xori r15, r16, 5 } + 8cf8: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; ill } + 8d00: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; mf } + 8d08: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; shrsi r15, r16, 5 } + 8d10: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; v1minu r15, r16, r17 } + 8d18: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; v2shru r15, r16, r17 } + 8d20: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; dblalign6 r15, r16, r17 } + 8d28: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; ldna r15, r16 } + 8d30: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; prefetch_l3 r15 } + 8d38: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; subxsc r15, r16, r17 } + 8d40: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; v2cmpne r15, r16, r17 } + 8d48: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } + 8d50: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 } + 8d58: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 } + 8d60: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } + 8d68: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + 8d70: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } + 8d78: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + 8d80: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; fetchor4 r15, r16, r17 } + 8d88: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; ill ; st2 r25, r26 } + 8d90: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; jalr r15 ; st1 r25, r26 } + 8d98: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; jr r15 ; st4 r25, r26 } + 8da0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; jalrp r15 ; ld r25, r26 } + 8da8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld1s r25, r26 } + 8db0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; addi r15, r16, 5 ; ld1u r25, r26 } + 8db8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shru r15, r16, r17 ; ld1u r25, r26 } + 8dc0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 } + 8dc8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 } + 8dd0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; ld4s r25, r26 } + 8dd8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 } + 8de0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 } + 8de8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 8df0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } + 8df8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; nop ; ld1s r25, r26 } + 8e00: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 } + 8e08: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + 8e10: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + 8e18: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 } + 8e20: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 } + 8e28: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } + 8e30: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 } + 8e38: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; info 19 ; prefetch_l3 r25 } + 8e40: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + 8e48: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 } + 8e50: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + 8e58: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + 8e60: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + 8e68: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } + 8e70: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 } + 8e78: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + 8e80: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 } + 8e88: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 } + 8e90: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 } + 8e98: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 } + 8ea0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 } + 8ea8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 } + 8eb0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; v1cmpleu r15, r16, r17 } + 8eb8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; v2mnz r15, r16, r17 } + 8ec0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 } + 8ec8: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; finv r15 } + 8ed0: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; ldnt4s_add r15, r16, 5 } + 8ed8: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; shl3addx r15, r16, r17 } + 8ee0: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; v1cmpne r15, r16, r17 } + 8ee8: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; v2shl r15, r16, r17 } + 8ef0: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; cmpltu r15, r16, r17 } + 8ef8: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; ld4s r15, r16 } + 8f00: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + 8f08: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; stnt4 r15, r16 } + 8f10: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; v2cmpleu r15, r16, r17 } + 8f18: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 } + 8f20: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 } + 8f28: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 } + 8f30: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } + 8f38: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 } + 8f40: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 } + 8f48: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + 8f50: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; fetchaddgez r15, r16, r17 } + 8f58: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; ill ; prefetch_l2_fault r25 } + 8f60: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 } + 8f68: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jr r15 ; prefetch_l3 r25 } + 8f70: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 } + 8f78: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 } + 8f80: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 } + 8f88: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 } + 8f90: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 } + 8f98: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 } + 8fa0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 } + 8fa8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + 8fb0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 } + 8fb8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + 8fc0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; move r15, r16 ; st1 r25, r26 } + 8fc8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 } + 8fd0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 } + 8fd8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jalr r15 ; prefetch r25 } + 8fe0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } + 8fe8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + 8ff0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 } + 8ff8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 } + 9000: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 } + 9008: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } + 9010: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + 9018: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + 9020: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 } + 9028: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 } + 9030: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 } + 9038: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + 9040: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 } + 9048: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 } + 9050: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; st r25, r26 } + 9058: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 } + 9060: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 } + 9068: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; nop ; st2 r25, r26 } + 9070: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jalr r15 ; st4 r25, r26 } + 9078: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } + 9080: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; v1addi r15, r16, 5 } + 9088: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; v2int_l r15, r16, r17 } + 9090: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + 9098: [0-9a-f]* { mul_ls_lu r5, r6, r7 ; fetchaddgez4 r15, r16, r17 } + 90a0: [0-9a-f]* { mul_ls_lu r5, r6, r7 ; ldnt2s r15, r16 } + 90a8: [0-9a-f]* { mul_ls_lu r5, r6, r7 ; shl1add r15, r16, r17 } + 90b0: [0-9a-f]* { mul_ls_lu r5, r6, r7 ; v1cmpleu r15, r16, r17 } + 90b8: [0-9a-f]* { mul_ls_lu r5, r6, r7 ; v2mnz r15, r16, r17 } + 90c0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3 r25 } + 90c8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3_fault r25 } + 90d0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 } + 90d8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 } + 90e0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 } + 90e8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 } + 90f0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpltui r15, r16, 5 } + 90f8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; ld2s r25, r26 } + 9100: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; info 19 ; ld2u r25, r26 } + 9108: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 } + 9110: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; jrp r15 ; ld4s r25, r26 } + 9118: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; ld r25, r26 } + 9120: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; jalr r15 ; ld1s r25, r26 } + 9128: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; ld1u r25, r26 } + 9130: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; ld2s r15, r16 } + 9138: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 } + 9140: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 } + 9148: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; lnk r15 ; ld4s r25, r26 } + 9150: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4u r25, r26 } + 9158: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; ldnt1s r15, r16 } + 9160: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld4u r25, r26 } + 9168: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + 9170: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; nop ; prefetch r25 } + 9178: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 } + 9180: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 } + 9188: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; ill ; prefetch r25 } + 9190: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 } + 9198: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; prefetch_l2 r15 } + 91a0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l2 r25 } + 91a8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 } + 91b0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 } + 91b8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; ill ; prefetch_l3_fault r25 } + 91c0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 } + 91c8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l1_fault r25 } + 91d0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 } + 91d8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 } + 91e0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; st r25, r26 } + 91e8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 } + 91f0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; st2 r25, r26 } + 91f8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; ill ; st r25, r26 } + 9200: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 } + 9208: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; st1_add r15, r16, 5 } + 9210: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 } + 9218: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st4 r25, r26 } + 9220: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3 r25 } + 9228: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; v1int_l r15, r16, r17 } + 9230: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; v2shlsc r15, r16, r17 } + 9238: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 } + 9240: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 } + 9248: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld1u r25, r26 } + 9250: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2u r25, r26 } + 9258: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; ld2u r25, r26 } + 9260: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 } + 9268: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + 9270: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; fetchaddgez4 r15, r16, r17 } + 9278: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; ill ; prefetch_l3 r25 } + 9280: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 } + 9288: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jr r15 ; prefetch_l3_fault r25 } + 9290: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; ld r25, r26 } + 9298: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1s r25, r26 } + 92a0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; ld1s r25, r26 } + 92a8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + 92b0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 } + 92b8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jr r15 ; ld2u r25, r26 } + 92c0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 } + 92c8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld4u r25, r26 } + 92d0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 } + 92d8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; lnk r15 ; st2 r25, r26 } + 92e0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; move r15, r16 ; st2 r25, r26 } + 92e8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; st2 r25, r26 } + 92f0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; nor r15, r16, r17 } + 92f8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch r25 } + 9300: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + 9308: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 } + 9310: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 } + 9318: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 } + 9320: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jrp r15 ; prefetch_l2_fault r25 } + 9328: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + 9330: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 } + 9338: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 } + 9340: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; st4 r25, r26 } + 9348: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 } + 9350: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 } + 9358: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 } + 9360: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 } + 9368: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 } + 9370: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; st r25, r26 } + 9378: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; st r25, r26 } + 9380: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; st1 r25, r26 } + 9388: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; st2 r25, r26 } + 9390: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jalrp r15 ; st4 r25, r26 } + 9398: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 } + 93a0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; v1adduc r15, r16, r17 } + 93a8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; v2maxs r15, r16, r17 } + 93b0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 } + 93b8: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; fetchand r15, r16, r17 } + 93c0: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; ldnt2s_add r15, r16, 5 } + 93c8: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; shl1addx r15, r16, r17 } + 93d0: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; v1cmplts r15, r16, r17 } + 93d8: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; v2mz r15, r16, r17 } + 93e0: [0-9a-f]* { mula_hs_ls r5, r6, r7 ; cmples r15, r16, r17 } + 93e8: [0-9a-f]* { mula_hs_ls r5, r6, r7 ; ld2s r15, r16 } + 93f0: [0-9a-f]* { mula_hs_ls r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + 93f8: [0-9a-f]* { mula_hs_ls r5, r6, r7 ; stnt1 r15, r16 } + 9400: [0-9a-f]* { mula_hs_ls r5, r6, r7 ; v2addsc r15, r16, r17 } + 9408: [0-9a-f]* { mula_hs_ls r5, r6, r7 ; v4subsc r15, r16, r17 } + 9410: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; flushwb } + 9418: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + 9420: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; shlx r15, r16, r17 } + 9428: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; v1int_l r15, r16, r17 } + 9430: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; v2shlsc r15, r16, r17 } + 9438: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 } + 9440: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 } + 9448: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 } + 9450: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 } + 9458: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2s r25, r26 } + 9460: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + 9468: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + 9470: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; prefetch_l2 r25 } + 9478: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 } + 9480: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 } + 9488: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jrp r15 ; prefetch_l3 r25 } + 9490: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 } + 9498: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } + 94a0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; ill ; ld1u r25, r26 } + 94a8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } + 94b0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; ld2s r25, r26 } + 94b8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + 94c0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; ld4s r25, r26 } + 94c8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jr r15 ; ld4u r25, r26 } + 94d0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + 94d8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3_fault r25 } + 94e0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; movei r15, 5 ; st1 r25, r26 } + 94e8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; nop ; st1 r25, r26 } + 94f0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 } + 94f8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 } + 9500: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + 9508: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; prefetch_l1_fault r25 } + 9510: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 } + 9518: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; prefetch_l2 r25 } + 9520: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2_fault r25 } + 9528: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 } + 9530: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3_fault r25 } + 9538: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 } + 9540: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 } + 9548: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shl1addx r15, r16, r17 ; st4 r25, r26 } + 9550: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; ld r25, r26 } + 9558: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 } + 9560: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 } + 9568: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shrui r15, r16, 5 ; ld2u r25, r26 } + 9570: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; st r25, r26 } + 9578: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; st1 r25, r26 } + 9580: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; st2 r25, r26 } + 9588: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; st2 r25, r26 } + 9590: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; st4 r25, r26 } + 9598: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 } + 95a0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; v1shl r15, r16, r17 } + 95a8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; v4add r15, r16, r17 } + 95b0: [0-9a-f]* { mula_hu_ls r5, r6, r7 ; andi r15, r16, 5 } + 95b8: [0-9a-f]* { mula_hu_ls r5, r6, r7 ; ld r15, r16 } + 95c0: [0-9a-f]* { mula_hu_ls r5, r6, r7 ; nor r15, r16, r17 } + 95c8: [0-9a-f]* { mula_hu_ls r5, r6, r7 ; st2_add r15, r16, 5 } + 95d0: [0-9a-f]* { mula_hu_ls r5, r6, r7 ; v1shrui r15, r16, 5 } + 95d8: [0-9a-f]* { mula_hu_ls r5, r6, r7 ; v4shl r15, r16, r17 } + 95e0: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; fetchand4 r15, r16, r17 } + 95e8: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; ldnt2u r15, r16 } + 95f0: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; shl2add r15, r16, r17 } + 95f8: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + 9600: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; v2packh r15, r16, r17 } + 9608: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 } + 9610: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; st1 r25, r26 } + 9618: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 } + 9620: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 } + 9628: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 } + 9630: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld r25, r26 } + 9638: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 } + 9640: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; ld4s r25, r26 } + 9648: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; info 19 ; ld4u r25, r26 } + 9650: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 } + 9658: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jrp r15 ; prefetch r25 } + 9660: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; ld r25, r26 } + 9668: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jr r15 ; ld1s r25, r26 } + 9670: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 } + 9678: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 } + 9680: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld2s r25, r26 } + 9688: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld2u r25, r26 } + 9690: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 } + 9698: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; ld4u r25, r26 } + 96a0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; ldnt1u r15, r16 } + 96a8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + 96b0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; movei r15, 5 ; prefetch_l2 r25 } + 96b8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; nop ; prefetch_l2 r25 } + 96c0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3 r25 } + 96c8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + 96d0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jalr r15 ; prefetch r25 } + 96d8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 } + 96e0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l2 r25 } + 96e8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 } + 96f0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 } + 96f8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 } + 9700: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + 9708: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 } + 9710: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 } + 9718: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 } + 9720: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; st r25, r26 } + 9728: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; st2 r25, r26 } + 9730: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 } + 9738: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 } + 9740: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jalr r15 ; st r25, r26 } + 9748: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 } + 9750: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 } + 9758: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 } + 9760: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 } + 9768: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 } + 9770: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; v1maxui r15, r16, 5 } + 9778: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; v2shrsi r15, r16, 5 } + 9780: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; addx r15, r16, r17 } + 9788: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; iret } + 9790: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; movei r15, 5 } + 9798: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; shruxi r15, r16, 5 } + 97a0: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; v1shl r15, r16, r17 } + 97a8: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; v4add r15, r16, r17 } + 97b0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + 97b8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } + 97c0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 97c8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 } + 97d0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 } + 97d8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } + 97e0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 } + 97e8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; st4 r25, r26 } + 97f0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; info 19 } + 97f8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; jalrp r15 ; st4 r25, r26 } + 9800: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; ld r15, r16 } + 9808: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; ld r25, r26 } + 9810: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 } + 9818: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld1u r25, r26 } + 9820: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; ld2s r25, r26 } + 9828: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 } + 9830: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld2u r25, r26 } + 9838: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + 9840: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; nop ; ld4u r25, r26 } + 9848: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; lnk r15 ; ld1s r25, r26 } + 9850: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; move r15, r16 ; ld1s r25, r26 } + 9858: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; ld1s r25, r26 } + 9860: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 } + 9868: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } + 9870: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + 9878: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 } + 9880: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 } + 9888: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 } + 9890: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2_fault r25 } + 9898: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + 98a0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 } + 98a8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l3_fault r25 } + 98b0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld1u r25, r26 } + 98b8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 } + 98c0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl2add r15, r16, r17 ; ld4s r25, r26 } + 98c8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 } + 98d0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 } + 98d8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 } + 98e0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 } + 98e8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 } + 98f0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + 98f8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 } + 9900: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + 9908: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st4 r25, r26 } + 9910: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 } + 9918: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; v1subuc r15, r16, r17 } + 9920: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; v4shrs r15, r16, r17 } + 9928: [0-9a-f]* { mulax r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 } + 9930: [0-9a-f]* { mulax r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 } + 9938: [0-9a-f]* { mulax r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 } + 9940: [0-9a-f]* { mulax r5, r6, r7 ; cmpeq r15, r16, r17 } + 9948: [0-9a-f]* { mulax r5, r6, r7 ; cmples r15, r16, r17 } + 9950: [0-9a-f]* { mulax r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 } + 9958: [0-9a-f]* { mulax r5, r6, r7 ; cmpne r15, r16, r17 ; ld1u r25, r26 } + 9960: [0-9a-f]* { mulax r5, r6, r7 ; ld4u r25, r26 } + 9968: [0-9a-f]* { mulax r5, r6, r7 ; info 19 ; prefetch r25 } + 9970: [0-9a-f]* { mulax r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 } + 9978: [0-9a-f]* { mulax r5, r6, r7 ; jrp r15 ; prefetch r25 } + 9980: [0-9a-f]* { mulax r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 } + 9988: [0-9a-f]* { mulax r5, r6, r7 ; jrp r15 ; ld1s r25, r26 } + 9990: [0-9a-f]* { mulax r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1u r25, r26 } + 9998: [0-9a-f]* { mulax r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 } + 99a0: [0-9a-f]* { mulax r5, r6, r7 ; shrui r15, r16, 5 ; ld2s r25, r26 } + 99a8: [0-9a-f]* { mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 } + 99b0: [0-9a-f]* { mulax r5, r6, r7 ; movei r15, 5 ; ld4s r25, r26 } + 99b8: [0-9a-f]* { mulax r5, r6, r7 ; ill ; ld4u r25, r26 } + 99c0: [0-9a-f]* { mulax r5, r6, r7 ; ldnt1u_add r15, r16, 5 } + 99c8: [0-9a-f]* { mulax r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 } + 99d0: [0-9a-f]* { mulax r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 } + 99d8: [0-9a-f]* { mulax r5, r6, r7 ; nop ; prefetch_l2_fault r25 } + 99e0: [0-9a-f]* { mulax r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3_fault r25 } + 99e8: [0-9a-f]* { mulax r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 } + 99f0: [0-9a-f]* { mulax r5, r6, r7 ; jalrp r15 ; prefetch r25 } + 99f8: [0-9a-f]* { mulax r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 } + 9a00: [0-9a-f]* { mulax r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2 r25 } + 9a08: [0-9a-f]* { mulax r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2 r25 } + 9a10: [0-9a-f]* { mulax r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 } + 9a18: [0-9a-f]* { mulax r5, r6, r7 ; nop ; prefetch_l3 r25 } + 9a20: [0-9a-f]* { mulax r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 } + 9a28: [0-9a-f]* { mulax r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 } + 9a30: [0-9a-f]* { mulax r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l3 r25 } + 9a38: [0-9a-f]* { mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 } + 9a40: [0-9a-f]* { mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 } + 9a48: [0-9a-f]* { mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; st4 r25, r26 } + 9a50: [0-9a-f]* { mulax r5, r6, r7 ; shrs r15, r16, r17 ; st4 r25, r26 } + 9a58: [0-9a-f]* { mulax r5, r6, r7 ; shrui r15, r16, 5 ; ld r25, r26 } + 9a60: [0-9a-f]* { mulax r5, r6, r7 ; jalrp r15 ; st r25, r26 } + 9a68: [0-9a-f]* { mulax r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 9a70: [0-9a-f]* { mulax r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + 9a78: [0-9a-f]* { mulax r5, r6, r7 ; shru r15, r16, r17 ; st2 r25, r26 } + 9a80: [0-9a-f]* { mulax r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 } + 9a88: [0-9a-f]* { mulax r5, r6, r7 ; sub r15, r16, r17 ; st1 r25, r26 } + 9a90: [0-9a-f]* { mulax r5, r6, r7 ; v1minu r15, r16, r17 } + 9a98: [0-9a-f]* { mulax r5, r6, r7 ; v2shru r15, r16, r17 } + 9aa0: [0-9a-f]* { mulx r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 } + 9aa8: [0-9a-f]* { mulx r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 } + 9ab0: [0-9a-f]* { mulx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + 9ab8: [0-9a-f]* { mulx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } + 9ac0: [0-9a-f]* { mulx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + 9ac8: [0-9a-f]* { mulx r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 } + 9ad0: [0-9a-f]* { mulx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 } + 9ad8: [0-9a-f]* { mulx r5, r6, r7 ; fetchor r15, r16, r17 } + 9ae0: [0-9a-f]* { mulx r5, r6, r7 ; ill ; st1 r25, r26 } + 9ae8: [0-9a-f]* { mulx r5, r6, r7 ; jalr r15 ; st r25, r26 } + 9af0: [0-9a-f]* { mulx r5, r6, r7 ; jr r15 ; st2 r25, r26 } + 9af8: [0-9a-f]* { mulx r5, r6, r7 ; jalr r15 ; ld r25, r26 } + 9b00: [0-9a-f]* { mulx r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1s r25, r26 } + 9b08: [0-9a-f]* { mulx r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 } + 9b10: [0-9a-f]* { mulx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 } + 9b18: [0-9a-f]* { mulx r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 } + 9b20: [0-9a-f]* { mulx r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 } + 9b28: [0-9a-f]* { mulx r5, r6, r7 ; cmpne r15, r16, r17 ; ld4s r25, r26 } + 9b30: [0-9a-f]* { mulx r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 } + 9b38: [0-9a-f]* { mulx r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 } + 9b40: [0-9a-f]* { mulx r5, r6, r7 ; mf } + 9b48: [0-9a-f]* { mulx r5, r6, r7 ; movei r15, 5 ; ld r25, r26 } + 9b50: [0-9a-f]* { mulx r5, r6, r7 ; nop ; ld r25, r26 } + 9b58: [0-9a-f]* { mulx r5, r6, r7 ; or r15, r16, r17 ; ld1u r25, r26 } + 9b60: [0-9a-f]* { mulx r5, r6, r7 ; lnk r15 ; prefetch r25 } + 9b68: [0-9a-f]* { mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch r25 } + 9b70: [0-9a-f]* { mulx r5, r6, r7 ; prefetch_l1_fault r15 } + 9b78: [0-9a-f]* { mulx r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1_fault r25 } + 9b80: [0-9a-f]* { mulx r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2 r25 } + 9b88: [0-9a-f]* { mulx r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 } + 9b90: [0-9a-f]* { mulx r5, r6, r7 ; ill ; prefetch_l3 r25 } + 9b98: [0-9a-f]* { mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 } + 9ba0: [0-9a-f]* { mulx r5, r6, r7 ; raise } + 9ba8: [0-9a-f]* { mulx r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 } + 9bb0: [0-9a-f]* { mulx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } + 9bb8: [0-9a-f]* { mulx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 } + 9bc0: [0-9a-f]* { mulx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } + 9bc8: [0-9a-f]* { mulx r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 } + 9bd0: [0-9a-f]* { mulx r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 } + 9bd8: [0-9a-f]* { mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; st r25, r26 } + 9be0: [0-9a-f]* { mulx r5, r6, r7 ; st1 r15, r16 } + 9be8: [0-9a-f]* { mulx r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 } + 9bf0: [0-9a-f]* { mulx r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 } + 9bf8: [0-9a-f]* { mulx r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + 9c00: [0-9a-f]* { mulx r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 } + 9c08: [0-9a-f]* { mulx r5, r6, r7 ; v1cmples r15, r16, r17 } + 9c10: [0-9a-f]* { mulx r5, r6, r7 ; v2minsi r15, r16, 5 } + 9c18: [0-9a-f]* { mulx r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + 9c20: [0-9a-f]* { mz r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 } + 9c28: [0-9a-f]* { mz r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 } + 9c30: [0-9a-f]* { mz r15, r16, r17 ; andi r5, r6, 5 ; st1 r25, r26 } + 9c38: [0-9a-f]* { cmoveqz r5, r6, r7 ; mz r15, r16, r17 ; st r25, r26 } + 9c40: [0-9a-f]* { mz r15, r16, r17 ; cmpeq r5, r6, r7 ; st2 r25, r26 } + 9c48: [0-9a-f]* { mz r15, r16, r17 ; cmples r5, r6, r7 } + 9c50: [0-9a-f]* { mz r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 } + 9c58: [0-9a-f]* { mz r15, r16, r17 ; cmpne r5, r6, r7 ; ld1u r25, r26 } + 9c60: [0-9a-f]* { ctz r5, r6 ; mz r15, r16, r17 ; st r25, r26 } + 9c68: [0-9a-f]* { fsingle_pack1 r5, r6 ; mz r15, r16, r17 ; ld r25, r26 } + 9c70: [0-9a-f]* { mz r15, r16, r17 ; infol 4660 } + 9c78: [0-9a-f]* { revbits r5, r6 ; mz r15, r16, r17 ; ld r25, r26 } + 9c80: [0-9a-f]* { mz r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + 9c88: [0-9a-f]* { mz r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 } + 9c90: [0-9a-f]* { mulx r5, r6, r7 ; mz r15, r16, r17 ; ld1u r25, r26 } + 9c98: [0-9a-f]* { mz r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 } + 9ca0: [0-9a-f]* { mz r15, r16, r17 ; shli r5, r6, 5 ; ld2s r25, r26 } + 9ca8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; ld2u r25, r26 } + 9cb0: [0-9a-f]* { mz r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 } + 9cb8: [0-9a-f]* { mz r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 } + 9cc0: [0-9a-f]* { mz r15, r16, r17 ; mnz r5, r6, r7 ; ld4u r25, r26 } + 9cc8: [0-9a-f]* { mz r15, r16, r17 ; xor r5, r6, r7 ; ld4u r25, r26 } + 9cd0: [0-9a-f]* { mz r15, r16, r17 ; move r5, r6 } + 9cd8: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; mz r15, r16, r17 } + 9ce0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; st2 r25, r26 } + 9ce8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + 9cf0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; st r25, r26 } + 9cf8: [0-9a-f]* { mulax r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 } + 9d00: [0-9a-f]* { mz r15, r16, r17 ; mz r5, r6, r7 ; st4 r25, r26 } + 9d08: [0-9a-f]* { mz r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 } + 9d10: [0-9a-f]* { mz r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 } + 9d18: [0-9a-f]* { mz r15, r16, r17 ; rotl r5, r6, r7 ; prefetch r25 } + 9d20: [0-9a-f]* { mz r15, r16, r17 ; prefetch r25 } + 9d28: [0-9a-f]* { tblidxb1 r5, r6 ; mz r15, r16, r17 ; prefetch r25 } + 9d30: [0-9a-f]* { mz r15, r16, r17 ; nop ; prefetch_l1_fault r25 } + 9d38: [0-9a-f]* { mz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l2 r25 } + 9d40: [0-9a-f]* { mz r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l2 r25 } + 9d48: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 } + 9d50: [0-9a-f]* { clz r5, r6 ; mz r15, r16, r17 ; prefetch_l3 r25 } + 9d58: [0-9a-f]* { mz r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3 r25 } + 9d60: [0-9a-f]* { mz r15, r16, r17 ; movei r5, 5 ; prefetch_l3_fault r25 } + 9d68: [0-9a-f]* { revbits r5, r6 ; mz r15, r16, r17 ; ld r25, r26 } + 9d70: [0-9a-f]* { mz r15, r16, r17 ; rotl r5, r6, r7 ; ld1u r25, r26 } + 9d78: [0-9a-f]* { mz r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 } + 9d80: [0-9a-f]* { mz r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 } + 9d88: [0-9a-f]* { mz r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } + 9d90: [0-9a-f]* { mz r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l1_fault r25 } + 9d98: [0-9a-f]* { mz r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l1_fault r25 } + 9da0: [0-9a-f]* { mz r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2_fault r25 } + 9da8: [0-9a-f]* { mz r15, r16, r17 ; cmpeqi r5, r6, 5 ; st r25, r26 } + 9db0: [0-9a-f]* { mz r15, r16, r17 ; shli r5, r6, 5 ; st r25, r26 } + 9db8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 } + 9dc0: [0-9a-f]* { mz r15, r16, r17 ; and r5, r6, r7 ; st2 r25, r26 } + 9dc8: [0-9a-f]* { mz r15, r16, r17 ; shl1add r5, r6, r7 ; st2 r25, r26 } + 9dd0: [0-9a-f]* { mz r15, r16, r17 ; mnz r5, r6, r7 ; st4 r25, r26 } + 9dd8: [0-9a-f]* { mz r15, r16, r17 ; xor r5, r6, r7 ; st4 r25, r26 } + 9de0: [0-9a-f]* { mz r15, r16, r17 ; subxsc r5, r6, r7 } + 9de8: [0-9a-f]* { tblidxb2 r5, r6 ; mz r15, r16, r17 ; ld1s r25, r26 } + 9df0: [0-9a-f]* { v1adiffu r5, r6, r7 ; mz r15, r16, r17 } + 9df8: [0-9a-f]* { mz r15, r16, r17 ; v1sub r5, r6, r7 } + 9e00: [0-9a-f]* { mz r15, r16, r17 ; v2shrsi r5, r6, 5 } + 9e08: [0-9a-f]* { mz r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 } + 9e10: [0-9a-f]* { mz r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 } + 9e18: [0-9a-f]* { mz r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + 9e20: [0-9a-f]* { mz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } + 9e28: [0-9a-f]* { mz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + 9e30: [0-9a-f]* { mz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 } + 9e38: [0-9a-f]* { mz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 } + 9e40: [0-9a-f]* { mz r5, r6, r7 ; fetchor r15, r16, r17 } + 9e48: [0-9a-f]* { mz r5, r6, r7 ; ill ; st1 r25, r26 } + 9e50: [0-9a-f]* { mz r5, r6, r7 ; jalr r15 ; st r25, r26 } + 9e58: [0-9a-f]* { mz r5, r6, r7 ; jr r15 ; st2 r25, r26 } + 9e60: [0-9a-f]* { mz r5, r6, r7 ; jalr r15 ; ld r25, r26 } + 9e68: [0-9a-f]* { mz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1s r25, r26 } + 9e70: [0-9a-f]* { mz r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 } + 9e78: [0-9a-f]* { mz r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 } + 9e80: [0-9a-f]* { mz r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 } + 9e88: [0-9a-f]* { mz r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 } + 9e90: [0-9a-f]* { mz r5, r6, r7 ; cmpne r15, r16, r17 ; ld4s r25, r26 } + 9e98: [0-9a-f]* { mz r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 } + 9ea0: [0-9a-f]* { mz r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 } + 9ea8: [0-9a-f]* { mz r5, r6, r7 ; mf } + 9eb0: [0-9a-f]* { mz r5, r6, r7 ; movei r15, 5 ; ld r25, r26 } + 9eb8: [0-9a-f]* { mz r5, r6, r7 ; nop ; ld r25, r26 } + 9ec0: [0-9a-f]* { mz r5, r6, r7 ; or r15, r16, r17 ; ld1u r25, r26 } + 9ec8: [0-9a-f]* { mz r5, r6, r7 ; lnk r15 ; prefetch r25 } + 9ed0: [0-9a-f]* { mz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch r25 } + 9ed8: [0-9a-f]* { mz r5, r6, r7 ; prefetch_l1_fault r15 } + 9ee0: [0-9a-f]* { mz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1_fault r25 } + 9ee8: [0-9a-f]* { mz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2 r25 } + 9ef0: [0-9a-f]* { mz r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 } + 9ef8: [0-9a-f]* { mz r5, r6, r7 ; ill ; prefetch_l3 r25 } + 9f00: [0-9a-f]* { mz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 } + 9f08: [0-9a-f]* { mz r5, r6, r7 ; raise } + 9f10: [0-9a-f]* { mz r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 } + 9f18: [0-9a-f]* { mz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } + 9f20: [0-9a-f]* { mz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 } + 9f28: [0-9a-f]* { mz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } + 9f30: [0-9a-f]* { mz r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 } + 9f38: [0-9a-f]* { mz r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 } + 9f40: [0-9a-f]* { mz r5, r6, r7 ; cmpeqi r15, r16, 5 ; st r25, r26 } + 9f48: [0-9a-f]* { mz r5, r6, r7 ; st1 r15, r16 } + 9f50: [0-9a-f]* { mz r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 } + 9f58: [0-9a-f]* { mz r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 } + 9f60: [0-9a-f]* { mz r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + 9f68: [0-9a-f]* { mz r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 } + 9f70: [0-9a-f]* { mz r5, r6, r7 ; v1cmples r15, r16, r17 } + 9f78: [0-9a-f]* { mz r5, r6, r7 ; v2minsi r15, r16, 5 } + 9f80: [0-9a-f]* { mz r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + 9f88: [0-9a-f]* { nop ; add r5, r6, r7 ; prefetch_l3_fault r25 } + 9f90: [0-9a-f]* { nop ; addi r5, r6, 5 ; st1 r25, r26 } + 9f98: [0-9a-f]* { nop ; addx r5, r6, r7 ; st1 r25, r26 } + 9fa0: [0-9a-f]* { nop ; addxi r5, r6, 5 ; st4 r25, r26 } + 9fa8: [0-9a-f]* { nop ; and r5, r6, r7 ; st1 r25, r26 } + 9fb0: [0-9a-f]* { nop ; andi r5, r6, 5 ; st4 r25, r26 } + 9fb8: [0-9a-f]* { cmoveqz r5, r6, r7 ; nop ; st1 r25, r26 } + 9fc0: [0-9a-f]* { nop ; cmpeq r15, r16, r17 ; st4 r25, r26 } + 9fc8: [0-9a-f]* { nop ; cmpeqi r5, r6, 5 ; ld r25, r26 } + 9fd0: [0-9a-f]* { nop ; cmples r5, r6, r7 ; ld r25, r26 } + 9fd8: [0-9a-f]* { nop ; cmpleu r5, r6, r7 ; ld1u r25, r26 } + 9fe0: [0-9a-f]* { nop ; cmplts r5, r6, r7 ; ld2u r25, r26 } + 9fe8: [0-9a-f]* { nop ; cmpltsi r5, r6, 5 ; ld4u r25, r26 } + 9ff0: [0-9a-f]* { nop ; cmpltu r5, r6, r7 ; prefetch r25 } + 9ff8: [0-9a-f]* { nop ; cmpne r5, r6, r7 ; prefetch r25 } + a000: [0-9a-f]* { nop ; dblalign2 r15, r16, r17 } + a008: [0-9a-f]* { nop ; prefetch_l2_fault r25 } + a010: [0-9a-f]* { nop ; ill ; ld4u r25, r26 } + a018: [0-9a-f]* { nop ; jalr r15 ; ld4s r25, r26 } + a020: [0-9a-f]* { nop ; jr r15 ; prefetch r25 } + a028: [0-9a-f]* { nop ; and r15, r16, r17 ; ld r25, r26 } + a030: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; nop ; ld r25, r26 } + a038: [0-9a-f]* { nop ; shrs r5, r6, r7 ; ld r25, r26 } + a040: [0-9a-f]* { nop ; cmpleu r15, r16, r17 ; ld1s r25, r26 } + a048: [0-9a-f]* { nop ; nor r5, r6, r7 ; ld1s r25, r26 } + a050: [0-9a-f]* { tblidxb2 r5, r6 ; nop ; ld1s r25, r26 } + a058: [0-9a-f]* { fsingle_pack1 r5, r6 ; nop ; ld1u r25, r26 } + a060: [0-9a-f]* { nop ; shl1add r15, r16, r17 ; ld1u r25, r26 } + a068: [0-9a-f]* { nop ; addx r5, r6, r7 ; ld2s r25, r26 } + a070: [0-9a-f]* { nop ; movei r15, 5 ; ld2s r25, r26 } + a078: [0-9a-f]* { nop ; shli r15, r16, 5 ; ld2s r25, r26 } + a080: [0-9a-f]* { nop ; cmpeqi r15, r16, 5 ; ld2u r25, r26 } + a088: [0-9a-f]* { nop ; mz r15, r16, r17 ; ld2u r25, r26 } + a090: [0-9a-f]* { nop ; subx r15, r16, r17 ; ld2u r25, r26 } + a098: [0-9a-f]* { nop ; cmpne r15, r16, r17 ; ld4s r25, r26 } + a0a0: [0-9a-f]* { nop ; rotli r15, r16, 5 ; ld4s r25, r26 } + a0a8: [0-9a-f]* { nop ; add r5, r6, r7 ; ld4u r25, r26 } + a0b0: [0-9a-f]* { nop ; mnz r15, r16, r17 ; ld4u r25, r26 } + a0b8: [0-9a-f]* { nop ; shl3add r15, r16, r17 ; ld4u r25, r26 } + a0c0: [0-9a-f]* { nop ; ldnt4u r15, r16 } + a0c8: [0-9a-f]* { nop ; mnz r15, r16, r17 ; st1 r25, r26 } + a0d0: [0-9a-f]* { nop ; move r15, r16 ; st4 r25, r26 } + a0d8: [0-9a-f]* { nop ; movei r5, 5 ; ld r25, r26 } + a0e0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; nop } + a0e8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; nop ; st1 r25, r26 } + a0f0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; nop ; st2 r25, r26 } + a0f8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; nop ; prefetch_l3_fault r25 } + a100: [0-9a-f]* { mulax r5, r6, r7 ; nop ; st r25, r26 } + a108: [0-9a-f]* { nop ; mz r15, r16, r17 ; st2 r25, r26 } + a110: [0-9a-f]* { nop ; nop ; st4 r25, r26 } + a118: [0-9a-f]* { nop ; or r15, r16, r17 ; ld r25, r26 } + a120: [0-9a-f]* { pcnt r5, r6 ; nop ; ld r25, r26 } + a128: [0-9a-f]* { nop ; cmples r5, r6, r7 ; prefetch r25 } + a130: [0-9a-f]* { nop ; nor r15, r16, r17 ; prefetch r25 } + a138: [0-9a-f]* { tblidxb1 r5, r6 ; nop ; prefetch r25 } + a140: [0-9a-f]* { nop ; cmpltu r15, r16, r17 ; prefetch r25 } + a148: [0-9a-f]* { nop ; rotl r15, r16, r17 ; prefetch r25 } + a150: [0-9a-f]* { nop ; add r15, r16, r17 ; prefetch_l1_fault r25 } + a158: [0-9a-f]* { nop ; lnk r15 ; prefetch_l1_fault r25 } + a160: [0-9a-f]* { nop ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 } + a168: [0-9a-f]* { cmoveqz r5, r6, r7 ; nop ; prefetch_l2 r25 } + a170: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; nop ; prefetch_l2 r25 } + a178: [0-9a-f]* { nop ; shrui r15, r16, 5 ; prefetch_l2 r25 } + a180: [0-9a-f]* { nop ; cmpltsi r5, r6, 5 ; prefetch_l2_fault r25 } + a188: [0-9a-f]* { revbytes r5, r6 ; nop ; prefetch_l2_fault r25 } + a190: [0-9a-f]* { nop ; prefetch_l3 r15 } + a198: [0-9a-f]* { nop ; jrp r15 ; prefetch_l3 r25 } + a1a0: [0-9a-f]* { nop ; shl2addx r15, r16, r17 ; prefetch_l3 r25 } + a1a8: [0-9a-f]* { clz r5, r6 ; nop ; prefetch_l3_fault r25 } + a1b0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; nop ; prefetch_l3_fault r25 } + a1b8: [0-9a-f]* { nop ; shru r5, r6, r7 ; prefetch_l3_fault r25 } + a1c0: [0-9a-f]* { revbytes r5, r6 ; nop ; ld4u r25, r26 } + a1c8: [0-9a-f]* { nop ; rotl r5, r6, r7 ; prefetch r25 } + a1d0: [0-9a-f]* { nop ; rotli r5, r6, 5 ; prefetch_l2 r25 } + a1d8: [0-9a-f]* { nop ; shl r5, r6, r7 ; prefetch_l3 r25 } + a1e0: [0-9a-f]* { nop ; shl1add r5, r6, r7 ; prefetch_l3 r25 } + a1e8: [0-9a-f]* { nop ; shl1addx r5, r6, r7 ; st r25, r26 } + a1f0: [0-9a-f]* { nop ; shl2add r5, r6, r7 ; st2 r25, r26 } + a1f8: [0-9a-f]* { nop ; shl2addx r5, r6, r7 } + a200: [0-9a-f]* { nop ; shl3addx r15, r16, r17 ; ld1s r25, r26 } + a208: [0-9a-f]* { nop ; shli r15, r16, 5 ; ld2s r25, r26 } + a210: [0-9a-f]* { nop ; shrs r15, r16, r17 ; ld1s r25, r26 } + a218: [0-9a-f]* { nop ; shrsi r15, r16, 5 ; ld2s r25, r26 } + a220: [0-9a-f]* { nop ; shru r15, r16, r17 ; ld4s r25, r26 } + a228: [0-9a-f]* { nop ; shrui r15, r16, 5 ; prefetch r25 } + a230: [0-9a-f]* { nop ; addi r5, r6, 5 ; st r25, r26 } + a238: [0-9a-f]* { nop ; move r15, r16 ; st r25, r26 } + a240: [0-9a-f]* { nop ; shl3addx r15, r16, r17 ; st r25, r26 } + a248: [0-9a-f]* { nop ; cmpeq r5, r6, r7 ; st1 r25, r26 } + a250: [0-9a-f]* { mulx r5, r6, r7 ; nop ; st1 r25, r26 } + a258: [0-9a-f]* { nop ; sub r5, r6, r7 ; st1 r25, r26 } + a260: [0-9a-f]* { nop ; cmpltu r5, r6, r7 ; st2 r25, r26 } + a268: [0-9a-f]* { nop ; rotl r5, r6, r7 ; st2 r25, r26 } + a270: [0-9a-f]* { nop ; add r15, r16, r17 ; st4 r25, r26 } + a278: [0-9a-f]* { nop ; lnk r15 ; st4 r25, r26 } + a280: [0-9a-f]* { nop ; shl2addx r5, r6, r7 ; st4 r25, r26 } + a288: [0-9a-f]* { nop ; sub r15, r16, r17 ; ld2u r25, r26 } + a290: [0-9a-f]* { nop ; subx r15, r16, r17 ; ld4u r25, r26 } + a298: [0-9a-f]* { tblidxb0 r5, r6 ; nop ; ld1u r25, r26 } + a2a0: [0-9a-f]* { tblidxb2 r5, r6 ; nop ; ld2u r25, r26 } + a2a8: [0-9a-f]* { v1adiffu r5, r6, r7 ; nop } + a2b0: [0-9a-f]* { nop ; v1minui r15, r16, 5 } + a2b8: [0-9a-f]* { nop ; v2cmples r5, r6, r7 } + a2c0: [0-9a-f]* { v2sadas r5, r6, r7 ; nop } + a2c8: [0-9a-f]* { nop ; v4sub r15, r16, r17 } + a2d0: [0-9a-f]* { nop ; xor r5, r6, r7 ; st2 r25, r26 } + a2d8: [0-9a-f]* { nor r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 } + a2e0: [0-9a-f]* { nor r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 } + a2e8: [0-9a-f]* { nor r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 } + a2f0: [0-9a-f]* { cmoveqz r5, r6, r7 ; nor r15, r16, r17 ; st2 r25, r26 } + a2f8: [0-9a-f]* { nor r15, r16, r17 ; cmpeq r5, r6, r7 } + a300: [0-9a-f]* { nor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 } + a308: [0-9a-f]* { nor r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 } + a310: [0-9a-f]* { nor r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 } + a318: [0-9a-f]* { ctz r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 } + a320: [0-9a-f]* { fsingle_pack1 r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 } + a328: [0-9a-f]* { nor r15, r16, r17 ; addi r5, r6, 5 ; ld r25, r26 } + a330: [0-9a-f]* { nor r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 } + a338: [0-9a-f]* { nor r15, r16, r17 ; ld1s r25, r26 } + a340: [0-9a-f]* { tblidxb1 r5, r6 ; nor r15, r16, r17 ; ld1s r25, r26 } + a348: [0-9a-f]* { nor r15, r16, r17 ; nop ; ld1u r25, r26 } + a350: [0-9a-f]* { nor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 } + a358: [0-9a-f]* { nor r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 } + a360: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; ld2u r25, r26 } + a368: [0-9a-f]* { clz r5, r6 ; nor r15, r16, r17 ; ld4s r25, r26 } + a370: [0-9a-f]* { nor r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 } + a378: [0-9a-f]* { nor r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 } + a380: [0-9a-f]* { mm r5, r6, 5, 7 ; nor r15, r16, r17 } + a388: [0-9a-f]* { nor r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 } + a390: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; nor r15, r16, r17 } + a398: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 } + a3a0: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; nor r15, r16, r17 } + a3a8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; st2 r25, r26 } + a3b0: [0-9a-f]* { mulax r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 } + a3b8: [0-9a-f]* { nor r15, r16, r17 ; nop ; ld r25, r26 } + a3c0: [0-9a-f]* { nor r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 } + a3c8: [0-9a-f]* { nor r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 } + a3d0: [0-9a-f]* { nor r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 } + a3d8: [0-9a-f]* { nor r15, r16, r17 ; info 19 ; prefetch r25 } + a3e0: [0-9a-f]* { tblidxb3 r5, r6 ; nor r15, r16, r17 ; prefetch r25 } + a3e8: [0-9a-f]* { nor r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 } + a3f0: [0-9a-f]* { nor r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 } + a3f8: [0-9a-f]* { nor r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2 r25 } + a400: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2_fault r25 } + a408: [0-9a-f]* { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + a410: [0-9a-f]* { nor r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 } + a418: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 } + a420: [0-9a-f]* { revbits r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 } + a428: [0-9a-f]* { nor r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 } + a430: [0-9a-f]* { nor r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 } + a438: [0-9a-f]* { nor r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 } + a440: [0-9a-f]* { nor r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 } + a448: [0-9a-f]* { nor r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 } + a450: [0-9a-f]* { nor r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 } + a458: [0-9a-f]* { nor r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 } + a460: [0-9a-f]* { nor r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 } + a468: [0-9a-f]* { nor r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 } + a470: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; st1 r25, r26 } + a478: [0-9a-f]* { clz r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 } + a480: [0-9a-f]* { nor r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 } + a488: [0-9a-f]* { nor r15, r16, r17 ; movei r5, 5 ; st4 r25, r26 } + a490: [0-9a-f]* { nor r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 } + a498: [0-9a-f]* { tblidxb0 r5, r6 ; nor r15, r16, r17 ; ld1s r25, r26 } + a4a0: [0-9a-f]* { tblidxb2 r5, r6 ; nor r15, r16, r17 ; ld2s r25, r26 } + a4a8: [0-9a-f]* { nor r15, r16, r17 ; v1cmpeq r5, r6, r7 } + a4b0: [0-9a-f]* { nor r15, r16, r17 ; v2add r5, r6, r7 } + a4b8: [0-9a-f]* { nor r15, r16, r17 ; v2shrui r5, r6, 5 } + a4c0: [0-9a-f]* { nor r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + a4c8: [0-9a-f]* { nor r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + a4d0: [0-9a-f]* { nor r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + a4d8: [0-9a-f]* { nor r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + a4e0: [0-9a-f]* { nor r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + a4e8: [0-9a-f]* { nor r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + a4f0: [0-9a-f]* { nor r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 } + a4f8: [0-9a-f]* { nor r5, r6, r7 ; finv r15 } + a500: [0-9a-f]* { nor r5, r6, r7 ; ill ; st4 r25, r26 } + a508: [0-9a-f]* { nor r5, r6, r7 ; jalr r15 ; st2 r25, r26 } + a510: [0-9a-f]* { nor r5, r6, r7 ; jr r15 } + a518: [0-9a-f]* { nor r5, r6, r7 ; jr r15 ; ld r25, r26 } + a520: [0-9a-f]* { nor r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 } + a528: [0-9a-f]* { nor r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 } + a530: [0-9a-f]* { nor r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 } + a538: [0-9a-f]* { nor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + a540: [0-9a-f]* { nor r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 } + a548: [0-9a-f]* { nor r5, r6, r7 ; ill ; ld4s r25, r26 } + a550: [0-9a-f]* { nor r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + a558: [0-9a-f]* { nor r5, r6, r7 ; ld4u r25, r26 } + a560: [0-9a-f]* { nor r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + a568: [0-9a-f]* { nor r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 } + a570: [0-9a-f]* { nor r5, r6, r7 ; nop ; ld1u r25, r26 } + a578: [0-9a-f]* { nor r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 } + a580: [0-9a-f]* { nor r5, r6, r7 ; move r15, r16 ; prefetch r25 } + a588: [0-9a-f]* { nor r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 } + a590: [0-9a-f]* { nor r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } + a598: [0-9a-f]* { nor r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + a5a0: [0-9a-f]* { nor r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 } + a5a8: [0-9a-f]* { nor r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 } + a5b0: [0-9a-f]* { nor r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + a5b8: [0-9a-f]* { nor r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 } + a5c0: [0-9a-f]* { nor r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 } + a5c8: [0-9a-f]* { nor r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 } + a5d0: [0-9a-f]* { nor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 } + a5d8: [0-9a-f]* { nor r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + a5e0: [0-9a-f]* { nor r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } + a5e8: [0-9a-f]* { nor r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 } + a5f0: [0-9a-f]* { nor r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 } + a5f8: [0-9a-f]* { nor r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 } + a600: [0-9a-f]* { nor r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 } + a608: [0-9a-f]* { nor r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 } + a610: [0-9a-f]* { nor r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 } + a618: [0-9a-f]* { nor r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + a620: [0-9a-f]* { nor r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + a628: [0-9a-f]* { nor r5, r6, r7 ; v1cmplts r15, r16, r17 } + a630: [0-9a-f]* { nor r5, r6, r7 ; v2mz r15, r16, r17 } + a638: [0-9a-f]* { nor r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 } + a640: [0-9a-f]* { or r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 } + a648: [0-9a-f]* { or r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 } + a650: [0-9a-f]* { or r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 } + a658: [0-9a-f]* { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 } + a660: [0-9a-f]* { or r15, r16, r17 ; cmpeq r5, r6, r7 } + a668: [0-9a-f]* { or r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 } + a670: [0-9a-f]* { or r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 } + a678: [0-9a-f]* { or r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 } + a680: [0-9a-f]* { ctz r5, r6 ; or r15, r16, r17 ; st2 r25, r26 } + a688: [0-9a-f]* { fsingle_pack1 r5, r6 ; or r15, r16, r17 ; ld1u r25, r26 } + a690: [0-9a-f]* { or r15, r16, r17 ; addi r5, r6, 5 ; ld r25, r26 } + a698: [0-9a-f]* { or r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 } + a6a0: [0-9a-f]* { or r15, r16, r17 ; ld1s r25, r26 } + a6a8: [0-9a-f]* { tblidxb1 r5, r6 ; or r15, r16, r17 ; ld1s r25, r26 } + a6b0: [0-9a-f]* { or r15, r16, r17 ; nop ; ld1u r25, r26 } + a6b8: [0-9a-f]* { or r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 } + a6c0: [0-9a-f]* { or r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 } + a6c8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 } + a6d0: [0-9a-f]* { clz r5, r6 ; or r15, r16, r17 ; ld4s r25, r26 } + a6d8: [0-9a-f]* { or r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 } + a6e0: [0-9a-f]* { or r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 } + a6e8: [0-9a-f]* { mm r5, r6, 5, 7 ; or r15, r16, r17 } + a6f0: [0-9a-f]* { or r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 } + a6f8: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; or r15, r16, r17 } + a700: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; or r15, r16, r17 } + a708: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; or r15, r16, r17 } + a710: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 } + a718: [0-9a-f]* { mulax r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 } + a720: [0-9a-f]* { or r15, r16, r17 ; nop ; ld r25, r26 } + a728: [0-9a-f]* { or r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 } + a730: [0-9a-f]* { or r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 } + a738: [0-9a-f]* { or r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 } + a740: [0-9a-f]* { or r15, r16, r17 ; info 19 ; prefetch r25 } + a748: [0-9a-f]* { tblidxb3 r5, r6 ; or r15, r16, r17 ; prefetch r25 } + a750: [0-9a-f]* { or r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 } + a758: [0-9a-f]* { or r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 } + a760: [0-9a-f]* { or r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2 r25 } + a768: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 } + a770: [0-9a-f]* { cmovnez r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3 r25 } + a778: [0-9a-f]* { or r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 } + a780: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3_fault r25 } + a788: [0-9a-f]* { revbits r5, r6 ; or r15, r16, r17 ; ld1u r25, r26 } + a790: [0-9a-f]* { or r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 } + a798: [0-9a-f]* { or r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 } + a7a0: [0-9a-f]* { or r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 } + a7a8: [0-9a-f]* { or r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 } + a7b0: [0-9a-f]* { or r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 } + a7b8: [0-9a-f]* { or r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 } + a7c0: [0-9a-f]* { or r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 } + a7c8: [0-9a-f]* { or r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 } + a7d0: [0-9a-f]* { or r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 } + a7d8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; st1 r25, r26 } + a7e0: [0-9a-f]* { clz r5, r6 ; or r15, r16, r17 ; st2 r25, r26 } + a7e8: [0-9a-f]* { or r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 } + a7f0: [0-9a-f]* { or r15, r16, r17 ; movei r5, 5 ; st4 r25, r26 } + a7f8: [0-9a-f]* { or r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 } + a800: [0-9a-f]* { tblidxb0 r5, r6 ; or r15, r16, r17 ; ld1s r25, r26 } + a808: [0-9a-f]* { tblidxb2 r5, r6 ; or r15, r16, r17 ; ld2s r25, r26 } + a810: [0-9a-f]* { or r15, r16, r17 ; v1cmpeq r5, r6, r7 } + a818: [0-9a-f]* { or r15, r16, r17 ; v2add r5, r6, r7 } + a820: [0-9a-f]* { or r15, r16, r17 ; v2shrui r5, r6, 5 } + a828: [0-9a-f]* { or r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + a830: [0-9a-f]* { or r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + a838: [0-9a-f]* { or r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + a840: [0-9a-f]* { or r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + a848: [0-9a-f]* { or r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + a850: [0-9a-f]* { or r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + a858: [0-9a-f]* { or r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 } + a860: [0-9a-f]* { or r5, r6, r7 ; finv r15 } + a868: [0-9a-f]* { or r5, r6, r7 ; ill ; st4 r25, r26 } + a870: [0-9a-f]* { or r5, r6, r7 ; jalr r15 ; st2 r25, r26 } + a878: [0-9a-f]* { or r5, r6, r7 ; jr r15 } + a880: [0-9a-f]* { or r5, r6, r7 ; jr r15 ; ld r25, r26 } + a888: [0-9a-f]* { or r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 } + a890: [0-9a-f]* { or r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 } + a898: [0-9a-f]* { or r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 } + a8a0: [0-9a-f]* { or r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + a8a8: [0-9a-f]* { or r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 } + a8b0: [0-9a-f]* { or r5, r6, r7 ; ill ; ld4s r25, r26 } + a8b8: [0-9a-f]* { or r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + a8c0: [0-9a-f]* { or r5, r6, r7 ; ld4u r25, r26 } + a8c8: [0-9a-f]* { or r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + a8d0: [0-9a-f]* { or r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 } + a8d8: [0-9a-f]* { or r5, r6, r7 ; nop ; ld1u r25, r26 } + a8e0: [0-9a-f]* { or r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 } + a8e8: [0-9a-f]* { or r5, r6, r7 ; move r15, r16 ; prefetch r25 } + a8f0: [0-9a-f]* { or r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 } + a8f8: [0-9a-f]* { or r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } + a900: [0-9a-f]* { or r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + a908: [0-9a-f]* { or r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 } + a910: [0-9a-f]* { or r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 } + a918: [0-9a-f]* { or r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + a920: [0-9a-f]* { or r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 } + a928: [0-9a-f]* { or r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 } + a930: [0-9a-f]* { or r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 } + a938: [0-9a-f]* { or r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 } + a940: [0-9a-f]* { or r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + a948: [0-9a-f]* { or r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } + a950: [0-9a-f]* { or r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 } + a958: [0-9a-f]* { or r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 } + a960: [0-9a-f]* { or r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 } + a968: [0-9a-f]* { or r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 } + a970: [0-9a-f]* { or r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 } + a978: [0-9a-f]* { or r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 } + a980: [0-9a-f]* { or r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + a988: [0-9a-f]* { or r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + a990: [0-9a-f]* { or r5, r6, r7 ; v1cmplts r15, r16, r17 } + a998: [0-9a-f]* { or r5, r6, r7 ; v2mz r15, r16, r17 } + a9a0: [0-9a-f]* { or r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 } + a9a8: [0-9a-f]* { ori r15, r16, 5 ; dblalign2 r5, r6, r7 } + a9b0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; ori r15, r16, 5 } + a9b8: [0-9a-f]* { tblidxb1 r5, r6 ; ori r15, r16, 5 } + a9c0: [0-9a-f]* { ori r15, r16, 5 ; v1shl r5, r6, r7 } + a9c8: [0-9a-f]* { v2sads r5, r6, r7 ; ori r15, r16, 5 } + a9d0: [0-9a-f]* { ori r5, r6, 5 ; cmpltsi r15, r16, 5 } + a9d8: [0-9a-f]* { ori r5, r6, 5 ; ld2u_add r15, r16, 5 } + a9e0: [0-9a-f]* { ori r5, r6, 5 ; prefetch_add_l3 r15, 5 } + a9e8: [0-9a-f]* { ori r5, r6, 5 ; stnt2_add r15, r16, 5 } + a9f0: [0-9a-f]* { ori r5, r6, 5 ; v2cmples r15, r16, r17 } + a9f8: [0-9a-f]* { ori r5, r6, 5 ; xori r15, r16, 5 } + aa00: [0-9a-f]* { pcnt r5, r6 ; addx r15, r16, r17 ; ld r25, r26 } + aa08: [0-9a-f]* { pcnt r5, r6 ; and r15, r16, r17 ; ld r25, r26 } + aa10: [0-9a-f]* { pcnt r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } + aa18: [0-9a-f]* { pcnt r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 } + aa20: [0-9a-f]* { pcnt r5, r6 ; cmplts r15, r16, r17 ; ld2u r25, r26 } + aa28: [0-9a-f]* { pcnt r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 } + aa30: [0-9a-f]* { pcnt r5, r6 ; fetchadd4 r15, r16, r17 } + aa38: [0-9a-f]* { pcnt r5, r6 ; ill ; prefetch_l2 r25 } + aa40: [0-9a-f]* { pcnt r5, r6 ; jalr r15 ; prefetch_l1_fault r25 } + aa48: [0-9a-f]* { pcnt r5, r6 ; jr r15 ; prefetch_l2_fault r25 } + aa50: [0-9a-f]* { pcnt r5, r6 ; cmpltu r15, r16, r17 ; ld r25, r26 } + aa58: [0-9a-f]* { pcnt r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 } + aa60: [0-9a-f]* { pcnt r5, r6 ; subx r15, r16, r17 ; ld1s r25, r26 } + aa68: [0-9a-f]* { pcnt r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + aa70: [0-9a-f]* { pcnt r5, r6 ; nop ; ld2s r25, r26 } + aa78: [0-9a-f]* { pcnt r5, r6 ; jalr r15 ; ld2u r25, r26 } + aa80: [0-9a-f]* { pcnt r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 } + aa88: [0-9a-f]* { pcnt r5, r6 ; ld4u r15, r16 } + aa90: [0-9a-f]* { pcnt r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 } + aa98: [0-9a-f]* { pcnt r5, r6 ; lnk r15 ; st r25, r26 } + aaa0: [0-9a-f]* { pcnt r5, r6 ; move r15, r16 ; st r25, r26 } + aaa8: [0-9a-f]* { pcnt r5, r6 ; mz r15, r16, r17 ; st r25, r26 } + aab0: [0-9a-f]* { pcnt r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 } + aab8: [0-9a-f]* { pcnt r5, r6 ; info 19 ; prefetch r25 } + aac0: [0-9a-f]* { pcnt r5, r6 ; addx r15, r16, r17 ; prefetch r25 } + aac8: [0-9a-f]* { pcnt r5, r6 ; shrui r15, r16, 5 ; prefetch r25 } + aad0: [0-9a-f]* { pcnt r5, r6 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 } + aad8: [0-9a-f]* { pcnt r5, r6 ; nop ; prefetch_l2 r25 } + aae0: [0-9a-f]* { pcnt r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 } + aae8: [0-9a-f]* { pcnt r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 } + aaf0: [0-9a-f]* { pcnt r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 } + aaf8: [0-9a-f]* { pcnt r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 } + ab00: [0-9a-f]* { pcnt r5, r6 ; rotli r15, r16, 5 ; st1 r25, r26 } + ab08: [0-9a-f]* { pcnt r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 } + ab10: [0-9a-f]* { pcnt r5, r6 ; shl2add r15, r16, r17 } + ab18: [0-9a-f]* { pcnt r5, r6 ; shl3addx r15, r16, r17 ; ld1s r25, r26 } + ab20: [0-9a-f]* { pcnt r5, r6 ; shrs r15, r16, r17 ; ld1s r25, r26 } + ab28: [0-9a-f]* { pcnt r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 } + ab30: [0-9a-f]* { pcnt r5, r6 ; addx r15, r16, r17 ; st r25, r26 } + ab38: [0-9a-f]* { pcnt r5, r6 ; shrui r15, r16, 5 ; st r25, r26 } + ab40: [0-9a-f]* { pcnt r5, r6 ; shl2add r15, r16, r17 ; st1 r25, r26 } + ab48: [0-9a-f]* { pcnt r5, r6 ; mz r15, r16, r17 ; st2 r25, r26 } + ab50: [0-9a-f]* { pcnt r5, r6 ; info 19 ; st4 r25, r26 } + ab58: [0-9a-f]* { pcnt r5, r6 ; stnt_add r15, r16, 5 } + ab60: [0-9a-f]* { pcnt r5, r6 ; v1add r15, r16, r17 } + ab68: [0-9a-f]* { pcnt r5, r6 ; v2int_h r15, r16, r17 } + ab70: [0-9a-f]* { pcnt r5, r6 ; xor r15, r16, r17 ; prefetch r25 } + ab78: [0-9a-f]* { cmulfr r5, r6, r7 ; prefetch r15 } + ab80: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; prefetch r15 } + ab88: [0-9a-f]* { shrux r5, r6, r7 ; prefetch r15 } + ab90: [0-9a-f]* { v1mnz r5, r6, r7 ; prefetch r15 } + ab98: [0-9a-f]* { v2mults r5, r6, r7 ; prefetch r15 } + aba0: [0-9a-f]* { add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + aba8: [0-9a-f]* { add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + abb0: [0-9a-f]* { add r5, r6, r7 ; nop ; prefetch r25 } + abb8: [0-9a-f]* { fsingle_pack1 r5, r6 ; addi r15, r16, 5 ; prefetch r25 } + abc0: [0-9a-f]* { tblidxb2 r5, r6 ; addi r15, r16, 5 ; prefetch r25 } + abc8: [0-9a-f]* { addi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch r25 } + abd0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + abd8: [0-9a-f]* { addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } + abe0: [0-9a-f]* { addx r5, r6, r7 ; prefetch r25 } + abe8: [0-9a-f]* { revbits r5, r6 ; addxi r15, r16, 5 ; prefetch r25 } + abf0: [0-9a-f]* { addxi r5, r6, 5 ; info 19 ; prefetch r25 } + abf8: [0-9a-f]* { and r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + ac00: [0-9a-f]* { and r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + ac08: [0-9a-f]* { and r5, r6, r7 ; nop ; prefetch r25 } + ac10: [0-9a-f]* { fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; prefetch r25 } + ac18: [0-9a-f]* { tblidxb2 r5, r6 ; andi r15, r16, 5 ; prefetch r25 } + ac20: [0-9a-f]* { andi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch r25 } + ac28: [0-9a-f]* { clz r5, r6 ; rotl r15, r16, r17 ; prefetch r25 } + ac30: [0-9a-f]* { cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + ac38: [0-9a-f]* { cmovnez r5, r6, r7 ; ill ; prefetch r25 } + ac40: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } + ac48: [0-9a-f]* { cmpeq r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch r25 } + ac50: [0-9a-f]* { cmpeq r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + ac58: [0-9a-f]* { cmpeqi r15, r16, 5 ; prefetch r25 } + ac60: [0-9a-f]* { tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch r25 } + ac68: [0-9a-f]* { cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; prefetch r25 } + ac70: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + ac78: [0-9a-f]* { cmples r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + ac80: [0-9a-f]* { cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + ac88: [0-9a-f]* { pcnt r5, r6 ; cmpleu r15, r16, r17 ; prefetch r25 } + ac90: [0-9a-f]* { cmpleu r5, r6, r7 ; ill ; prefetch r25 } + ac98: [0-9a-f]* { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + aca0: [0-9a-f]* { cmplts r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch r25 } + aca8: [0-9a-f]* { cmplts r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + acb0: [0-9a-f]* { cmpltsi r15, r16, 5 ; prefetch r25 } + acb8: [0-9a-f]* { tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 ; prefetch r25 } + acc0: [0-9a-f]* { cmpltsi r5, r6, 5 ; shl2addx r15, r16, r17 ; prefetch r25 } + acc8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + acd0: [0-9a-f]* { cmpltu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + acd8: [0-9a-f]* { cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + ace0: [0-9a-f]* { pcnt r5, r6 ; cmpne r15, r16, r17 ; prefetch r25 } + ace8: [0-9a-f]* { cmpne r5, r6, r7 ; ill ; prefetch r25 } + acf0: [0-9a-f]* { ctz r5, r6 ; cmples r15, r16, r17 ; prefetch r25 } + acf8: [0-9a-f]* { add r5, r6, r7 ; prefetch r25 } + ad00: [0-9a-f]* { mnz r15, r16, r17 ; prefetch r25 } + ad08: [0-9a-f]* { shl3add r15, r16, r17 ; prefetch r25 } + ad10: [0-9a-f]* { fsingle_pack1 r5, r6 ; ill ; prefetch r25 } + ad18: [0-9a-f]* { cmovnez r5, r6, r7 ; ill ; prefetch r25 } + ad20: [0-9a-f]* { shl3add r5, r6, r7 ; ill ; prefetch r25 } + ad28: [0-9a-f]* { info 19 ; cmpltsi r15, r16, 5 ; prefetch r25 } + ad30: [0-9a-f]* { revbits r5, r6 ; info 19 ; prefetch r25 } + ad38: [0-9a-f]* { info 19 ; prefetch r25 } + ad40: [0-9a-f]* { revbits r5, r6 ; jalr r15 ; prefetch r25 } + ad48: [0-9a-f]* { cmpne r5, r6, r7 ; jalrp r15 ; prefetch r25 } + ad50: [0-9a-f]* { subx r5, r6, r7 ; jalrp r15 ; prefetch r25 } + ad58: [0-9a-f]* { mulx r5, r6, r7 ; jr r15 ; prefetch r25 } + ad60: [0-9a-f]* { cmpeqi r5, r6, 5 ; jrp r15 ; prefetch r25 } + ad68: [0-9a-f]* { shli r5, r6, 5 ; jrp r15 ; prefetch r25 } + ad70: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; lnk r15 ; prefetch r25 } + ad78: [0-9a-f]* { mnz r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 } + ad80: [0-9a-f]* { mnz r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 } + ad88: [0-9a-f]* { mnz r5, r6, r7 ; lnk r15 ; prefetch r25 } + ad90: [0-9a-f]* { move r15, r16 ; cmpltsi r5, r6, 5 ; prefetch r25 } + ad98: [0-9a-f]* { move r15, r16 ; shrui r5, r6, 5 ; prefetch r25 } + ada0: [0-9a-f]* { move r5, r6 ; shl r15, r16, r17 ; prefetch r25 } + ada8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + adb0: [0-9a-f]* { movei r5, 5 ; addi r15, r16, 5 ; prefetch r25 } + adb8: [0-9a-f]* { movei r5, 5 ; shru r15, r16, r17 ; prefetch r25 } + adc0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 } + adc8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + add0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jrp r15 ; prefetch r25 } + add8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 } + ade0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } + ade8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; prefetch r25 } + adf0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 } + adf8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 } + ae00: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + ae08: [0-9a-f]* { mulax r5, r6, r7 ; jalrp r15 ; prefetch r25 } + ae10: [0-9a-f]* { mulx r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 } + ae18: [0-9a-f]* { mz r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 } + ae20: [0-9a-f]* { mz r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 } + ae28: [0-9a-f]* { mz r5, r6, r7 ; lnk r15 ; prefetch r25 } + ae30: [0-9a-f]* { cmovnez r5, r6, r7 ; nop ; prefetch r25 } + ae38: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; nop ; prefetch r25 } + ae40: [0-9a-f]* { nop ; shrui r5, r6, 5 ; prefetch r25 } + ae48: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + ae50: [0-9a-f]* { nor r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + ae58: [0-9a-f]* { nor r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + ae60: [0-9a-f]* { pcnt r5, r6 ; or r15, r16, r17 ; prefetch r25 } + ae68: [0-9a-f]* { or r5, r6, r7 ; ill ; prefetch r25 } + ae70: [0-9a-f]* { pcnt r5, r6 ; cmples r15, r16, r17 ; prefetch r25 } + ae78: [0-9a-f]* { revbits r5, r6 ; addi r15, r16, 5 ; prefetch r25 } + ae80: [0-9a-f]* { revbits r5, r6 ; shru r15, r16, r17 ; prefetch r25 } + ae88: [0-9a-f]* { revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 } + ae90: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 } + ae98: [0-9a-f]* { rotl r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + aea0: [0-9a-f]* { rotl r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 } + aea8: [0-9a-f]* { rotli r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 } + aeb0: [0-9a-f]* { rotli r5, r6, 5 ; prefetch r25 } + aeb8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + aec0: [0-9a-f]* { shl r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } + aec8: [0-9a-f]* { shl r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + aed0: [0-9a-f]* { ctz r5, r6 ; shl1add r15, r16, r17 ; prefetch r25 } + aed8: [0-9a-f]* { tblidxb0 r5, r6 ; shl1add r15, r16, r17 ; prefetch r25 } + aee0: [0-9a-f]* { shl1add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 } + aee8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 } + aef0: [0-9a-f]* { shl1addx r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + aef8: [0-9a-f]* { shl1addx r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 } + af00: [0-9a-f]* { shl2add r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 } + af08: [0-9a-f]* { shl2add r5, r6, r7 ; prefetch r25 } + af10: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 } + af18: [0-9a-f]* { shl2addx r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } + af20: [0-9a-f]* { shl2addx r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + af28: [0-9a-f]* { ctz r5, r6 ; shl3add r15, r16, r17 ; prefetch r25 } + af30: [0-9a-f]* { tblidxb0 r5, r6 ; shl3add r15, r16, r17 ; prefetch r25 } + af38: [0-9a-f]* { shl3add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 } + af40: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } + af48: [0-9a-f]* { shl3addx r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + af50: [0-9a-f]* { shl3addx r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 } + af58: [0-9a-f]* { shli r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 } + af60: [0-9a-f]* { shli r5, r6, 5 ; prefetch r25 } + af68: [0-9a-f]* { cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 } + af70: [0-9a-f]* { shrs r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } + af78: [0-9a-f]* { shrs r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + af80: [0-9a-f]* { ctz r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 } + af88: [0-9a-f]* { tblidxb0 r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 } + af90: [0-9a-f]* { shrsi r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch r25 } + af98: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 } + afa0: [0-9a-f]* { shru r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + afa8: [0-9a-f]* { shru r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 } + afb0: [0-9a-f]* { shrui r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 } + afb8: [0-9a-f]* { shrui r5, r6, 5 ; prefetch r25 } + afc0: [0-9a-f]* { cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + afc8: [0-9a-f]* { sub r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } + afd0: [0-9a-f]* { sub r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + afd8: [0-9a-f]* { ctz r5, r6 ; subx r15, r16, r17 ; prefetch r25 } + afe0: [0-9a-f]* { tblidxb0 r5, r6 ; subx r15, r16, r17 ; prefetch r25 } + afe8: [0-9a-f]* { subx r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 } + aff0: [0-9a-f]* { tblidxb0 r5, r6 ; nor r15, r16, r17 ; prefetch r25 } + aff8: [0-9a-f]* { tblidxb1 r5, r6 ; jrp r15 ; prefetch r25 } + b000: [0-9a-f]* { tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; prefetch r25 } + b008: [0-9a-f]* { tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; prefetch r25 } + b010: [0-9a-f]* { tblidxb3 r5, r6 ; prefetch r25 } + b018: [0-9a-f]* { revbits r5, r6 ; xor r15, r16, r17 ; prefetch r25 } + b020: [0-9a-f]* { xor r5, r6, r7 ; info 19 ; prefetch r25 } + b028: [0-9a-f]* { bfexts r5, r6, 5, 7 ; prefetch_add_l1 r15, 5 } + b030: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; prefetch_add_l1 r15, 5 } + b038: [0-9a-f]* { revbits r5, r6 ; prefetch_add_l1 r15, 5 } + b040: [0-9a-f]* { v1cmpltu r5, r6, r7 ; prefetch_add_l1 r15, 5 } + b048: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; prefetch_add_l1 r15, 5 } + b050: [0-9a-f]* { v4int_l r5, r6, r7 ; prefetch_add_l1 r15, 5 } + b058: [0-9a-f]* { cmulhr r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + b060: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + b068: [0-9a-f]* { shufflebytes r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + b070: [0-9a-f]* { v1mulu r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + b078: [0-9a-f]* { v2packh r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + b080: [0-9a-f]* { bfins r5, r6, 5, 7 ; prefetch_add_l2 r15, 5 } + b088: [0-9a-f]* { fsingle_pack1 r5, r6 ; prefetch_add_l2 r15, 5 } + b090: [0-9a-f]* { rotl r5, r6, r7 ; prefetch_add_l2 r15, 5 } + b098: [0-9a-f]* { v1cmpne r5, r6, r7 ; prefetch_add_l2 r15, 5 } + b0a0: [0-9a-f]* { v2cmpleu r5, r6, r7 ; prefetch_add_l2 r15, 5 } + b0a8: [0-9a-f]* { v4shl r5, r6, r7 ; prefetch_add_l2 r15, 5 } + b0b0: [0-9a-f]* { crc32_8 r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + b0b8: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + b0c0: [0-9a-f]* { subx r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + b0c8: [0-9a-f]* { v1mz r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + b0d0: [0-9a-f]* { v2packuc r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + b0d8: [0-9a-f]* { cmoveqz r5, r6, r7 ; prefetch_add_l3 r15, 5 } + b0e0: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; prefetch_add_l3 r15, 5 } + b0e8: [0-9a-f]* { shl r5, r6, r7 ; prefetch_add_l3 r15, 5 } + b0f0: [0-9a-f]* { v1ddotpua r5, r6, r7 ; prefetch_add_l3 r15, 5 } + b0f8: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; prefetch_add_l3 r15, 5 } + b100: [0-9a-f]* { v4shrs r5, r6, r7 ; prefetch_add_l3 r15, 5 } + b108: [0-9a-f]* { dblalign r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + b110: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + b118: [0-9a-f]* { tblidxb0 r5, r6 ; prefetch_add_l3_fault r15, 5 } + b120: [0-9a-f]* { v1sadu r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + b128: [0-9a-f]* { v2sadau r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + b130: [0-9a-f]* { cmpeq r5, r6, r7 ; prefetch r15 } + b138: [0-9a-f]* { infol 4660 ; prefetch r15 } + b140: [0-9a-f]* { shl1add r5, r6, r7 ; prefetch r15 } + b148: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; prefetch r15 } + b150: [0-9a-f]* { v2cmpltui r5, r6, 5 ; prefetch r15 } + b158: [0-9a-f]* { v4sub r5, r6, r7 ; prefetch r15 } + b160: [0-9a-f]* { add r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 } + b168: [0-9a-f]* { add r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 } + b170: [0-9a-f]* { clz r5, r6 ; addi r15, r16, 5 ; prefetch r25 } + b178: [0-9a-f]* { addi r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch r25 } + b180: [0-9a-f]* { addi r5, r6, 5 ; move r15, r16 ; prefetch r25 } + b188: [0-9a-f]* { addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 } + b190: [0-9a-f]* { addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 } + b198: [0-9a-f]* { addx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 } + b1a0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } + b1a8: [0-9a-f]* { addxi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch r25 } + b1b0: [0-9a-f]* { addxi r5, r6, 5 ; sub r15, r16, r17 ; prefetch r25 } + b1b8: [0-9a-f]* { and r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 } + b1c0: [0-9a-f]* { and r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 } + b1c8: [0-9a-f]* { clz r5, r6 ; andi r15, r16, 5 ; prefetch r25 } + b1d0: [0-9a-f]* { andi r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch r25 } + b1d8: [0-9a-f]* { andi r5, r6, 5 ; move r15, r16 ; prefetch r25 } + b1e0: [0-9a-f]* { clz r5, r6 ; info 19 ; prefetch r25 } + b1e8: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 } + b1f0: [0-9a-f]* { cmovnez r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + b1f8: [0-9a-f]* { cmovnez r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 } + b200: [0-9a-f]* { cmpeq r15, r16, r17 ; nop ; prefetch r25 } + b208: [0-9a-f]* { cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + b210: [0-9a-f]* { cmpeqi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 } + b218: [0-9a-f]* { cmpeqi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch r25 } + b220: [0-9a-f]* { cmpeqi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 } + b228: [0-9a-f]* { cmples r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch r25 } + b230: [0-9a-f]* { cmples r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 } + b238: [0-9a-f]* { cmples r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 } + b240: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 } + b248: [0-9a-f]* { cmpleu r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + b250: [0-9a-f]* { cmpleu r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 } + b258: [0-9a-f]* { cmplts r15, r16, r17 ; nop ; prefetch r25 } + b260: [0-9a-f]* { cmplts r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + b268: [0-9a-f]* { cmpltsi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 } + b270: [0-9a-f]* { cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch r25 } + b278: [0-9a-f]* { cmpltsi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 } + b280: [0-9a-f]* { cmpltu r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch r25 } + b288: [0-9a-f]* { cmpltu r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 } + b290: [0-9a-f]* { cmpltu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 } + b298: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 } + b2a0: [0-9a-f]* { cmpne r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + b2a8: [0-9a-f]* { cmpne r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 } + b2b0: [0-9a-f]* { ctz r5, r6 ; shl2addx r15, r16, r17 ; prefetch r25 } + b2b8: [0-9a-f]* { cmpltu r5, r6, r7 ; prefetch r25 } + b2c0: [0-9a-f]* { rotl r5, r6, r7 ; prefetch r25 } + b2c8: [0-9a-f]* { fsingle_pack1 r5, r6 ; addx r15, r16, r17 ; prefetch r25 } + b2d0: [0-9a-f]* { fsingle_pack1 r5, r6 ; shrui r15, r16, 5 ; prefetch r25 } + b2d8: [0-9a-f]* { nop ; ill ; prefetch r25 } + b2e0: [0-9a-f]* { clz r5, r6 ; info 19 ; prefetch r25 } + b2e8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; info 19 ; prefetch r25 } + b2f0: [0-9a-f]* { info 19 ; shru r5, r6, r7 ; prefetch r25 } + b2f8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jalr r15 ; prefetch r25 } + b300: [0-9a-f]* { addxi r5, r6, 5 ; jalrp r15 ; prefetch r25 } + b308: [0-9a-f]* { shl r5, r6, r7 ; jalrp r15 ; prefetch r25 } + b310: [0-9a-f]* { info 19 ; jr r15 ; prefetch r25 } + b318: [0-9a-f]* { tblidxb3 r5, r6 ; jr r15 ; prefetch r25 } + b320: [0-9a-f]* { or r5, r6, r7 ; jrp r15 ; prefetch r25 } + b328: [0-9a-f]* { cmpltsi r5, r6, 5 ; lnk r15 ; prefetch r25 } + b330: [0-9a-f]* { shrui r5, r6, 5 ; lnk r15 ; prefetch r25 } + b338: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + b340: [0-9a-f]* { mnz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + b348: [0-9a-f]* { move r15, r16 ; addi r5, r6, 5 ; prefetch r25 } + b350: [0-9a-f]* { move r15, r16 ; rotl r5, r6, r7 ; prefetch r25 } + b358: [0-9a-f]* { move r5, r6 ; jalrp r15 ; prefetch r25 } + b360: [0-9a-f]* { movei r15, 5 ; cmples r5, r6, r7 ; prefetch r25 } + b368: [0-9a-f]* { movei r15, 5 ; shrs r5, r6, r7 ; prefetch r25 } + b370: [0-9a-f]* { movei r5, 5 ; or r15, r16, r17 ; prefetch r25 } + b378: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; lnk r15 ; prefetch r25 } + b380: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; prefetch r25 } + b388: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch r25 } + b390: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } + b398: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch r25 } + b3a0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 } + b3a8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; nop ; prefetch r25 } + b3b0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jr r15 ; prefetch r25 } + b3b8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + b3c0: [0-9a-f]* { mulax r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + b3c8: [0-9a-f]* { mulax r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + b3d0: [0-9a-f]* { mulx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + b3d8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + b3e0: [0-9a-f]* { mz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + b3e8: [0-9a-f]* { nop ; add r5, r6, r7 ; prefetch r25 } + b3f0: [0-9a-f]* { nop ; mnz r15, r16, r17 ; prefetch r25 } + b3f8: [0-9a-f]* { nop ; shl3add r15, r16, r17 ; prefetch r25 } + b400: [0-9a-f]* { nor r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch r25 } + b408: [0-9a-f]* { nor r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 } + b410: [0-9a-f]* { nor r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 } + b418: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } + b420: [0-9a-f]* { or r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + b428: [0-9a-f]* { or r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 } + b430: [0-9a-f]* { pcnt r5, r6 ; shl2addx r15, r16, r17 ; prefetch r25 } + b438: [0-9a-f]* { revbits r5, r6 ; or r15, r16, r17 ; prefetch r25 } + b440: [0-9a-f]* { revbytes r5, r6 ; lnk r15 ; prefetch r25 } + b448: [0-9a-f]* { rotl r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 } + b450: [0-9a-f]* { rotl r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 } + b458: [0-9a-f]* { rotl r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + b460: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 } + b468: [0-9a-f]* { rotli r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 } + b470: [0-9a-f]* { rotli r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 } + b478: [0-9a-f]* { shl r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + b480: [0-9a-f]* { shl r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 } + b488: [0-9a-f]* { shl1add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 } + b490: [0-9a-f]* { shl1add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 } + b498: [0-9a-f]* { shl1add r5, r6, r7 ; lnk r15 ; prefetch r25 } + b4a0: [0-9a-f]* { shl1addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 } + b4a8: [0-9a-f]* { shl1addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 } + b4b0: [0-9a-f]* { shl1addx r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + b4b8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 } + b4c0: [0-9a-f]* { shl2add r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + b4c8: [0-9a-f]* { shl2add r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 } + b4d0: [0-9a-f]* { shl2addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + b4d8: [0-9a-f]* { shl2addx r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 } + b4e0: [0-9a-f]* { shl3add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 } + b4e8: [0-9a-f]* { shl3add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 } + b4f0: [0-9a-f]* { shl3add r5, r6, r7 ; lnk r15 ; prefetch r25 } + b4f8: [0-9a-f]* { shl3addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 } + b500: [0-9a-f]* { shl3addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 } + b508: [0-9a-f]* { shl3addx r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + b510: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + b518: [0-9a-f]* { shli r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 } + b520: [0-9a-f]* { shli r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 } + b528: [0-9a-f]* { shrs r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + b530: [0-9a-f]* { shrs r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 } + b538: [0-9a-f]* { shrsi r15, r16, 5 ; and r5, r6, r7 ; prefetch r25 } + b540: [0-9a-f]* { shrsi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch r25 } + b548: [0-9a-f]* { shrsi r5, r6, 5 ; lnk r15 ; prefetch r25 } + b550: [0-9a-f]* { shru r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 } + b558: [0-9a-f]* { shru r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 } + b560: [0-9a-f]* { shru r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + b568: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 } + b570: [0-9a-f]* { shrui r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 } + b578: [0-9a-f]* { shrui r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 } + b580: [0-9a-f]* { sub r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + b588: [0-9a-f]* { sub r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 } + b590: [0-9a-f]* { subx r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 } + b598: [0-9a-f]* { subx r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 } + b5a0: [0-9a-f]* { subx r5, r6, r7 ; lnk r15 ; prefetch r25 } + b5a8: [0-9a-f]* { tblidxb0 r5, r6 ; prefetch r25 } + b5b0: [0-9a-f]* { tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch r25 } + b5b8: [0-9a-f]* { tblidxb2 r5, r6 ; add r15, r16, r17 ; prefetch r25 } + b5c0: [0-9a-f]* { tblidxb2 r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 } + b5c8: [0-9a-f]* { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch r25 } + b5d0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + b5d8: [0-9a-f]* { xor r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } + b5e0: [0-9a-f]* { xor r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + b5e8: [0-9a-f]* { dblalign4 r5, r6, r7 ; prefetch_l1_fault r15 } + b5f0: [0-9a-f]* { mula_hu_ls r5, r6, r7 ; prefetch_l1_fault r15 } + b5f8: [0-9a-f]* { tblidxb2 r5, r6 ; prefetch_l1_fault r15 } + b600: [0-9a-f]* { v1shli r5, r6, 5 ; prefetch_l1_fault r15 } + b608: [0-9a-f]* { v2sadu r5, r6, r7 ; prefetch_l1_fault r15 } + b610: [0-9a-f]* { ctz r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 } + b618: [0-9a-f]* { tblidxb0 r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 } + b620: [0-9a-f]* { add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 } + b628: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } + b630: [0-9a-f]* { addi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l1_fault r25 } + b638: [0-9a-f]* { addi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l1_fault r25 } + b640: [0-9a-f]* { addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 } + b648: [0-9a-f]* { addx r5, r6, r7 ; prefetch_l1_fault r25 } + b650: [0-9a-f]* { cmoveqz r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 } + b658: [0-9a-f]* { addxi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 } + b660: [0-9a-f]* { addxi r5, r6, 5 ; movei r15, 5 ; prefetch_l1_fault r25 } + b668: [0-9a-f]* { ctz r5, r6 ; and r15, r16, r17 ; prefetch_l1_fault r25 } + b670: [0-9a-f]* { tblidxb0 r5, r6 ; and r15, r16, r17 ; prefetch_l1_fault r25 } + b678: [0-9a-f]* { and r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 } + b680: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 } + b688: [0-9a-f]* { andi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l1_fault r25 } + b690: [0-9a-f]* { andi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l1_fault r25 } + b698: [0-9a-f]* { clz r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 } + b6a0: [0-9a-f]* { cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + b6a8: [0-9a-f]* { cmovnez r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 } + b6b0: [0-9a-f]* { cmpeq r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l1_fault r25 } + b6b8: [0-9a-f]* { cmpeq r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l1_fault r25 } + b6c0: [0-9a-f]* { cmpeq r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 } + b6c8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 } + b6d0: [0-9a-f]* { cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 } + b6d8: [0-9a-f]* { cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l1_fault r25 } + b6e0: [0-9a-f]* { cmples r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 } + b6e8: [0-9a-f]* { cmples r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 } + b6f0: [0-9a-f]* { clz r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 } + b6f8: [0-9a-f]* { cmpleu r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l1_fault r25 } + b700: [0-9a-f]* { cmpleu r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 } + b708: [0-9a-f]* { cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l1_fault r25 } + b710: [0-9a-f]* { cmplts r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l1_fault r25 } + b718: [0-9a-f]* { cmplts r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 } + b720: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l1_fault r25 } + b728: [0-9a-f]* { cmpltsi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 } + b730: [0-9a-f]* { cmpltsi r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l1_fault r25 } + b738: [0-9a-f]* { cmpltu r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 } + b740: [0-9a-f]* { cmpltu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 } + b748: [0-9a-f]* { clz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 } + b750: [0-9a-f]* { cmpne r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l1_fault r25 } + b758: [0-9a-f]* { cmpne r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 } + b760: [0-9a-f]* { ctz r5, r6 ; info 19 ; prefetch_l1_fault r25 } + b768: [0-9a-f]* { and r5, r6, r7 ; prefetch_l1_fault r25 } + b770: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 } + b778: [0-9a-f]* { shrsi r15, r16, 5 ; prefetch_l1_fault r25 } + b780: [0-9a-f]* { fsingle_pack1 r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 } + b788: [0-9a-f]* { cmpne r5, r6, r7 ; ill ; prefetch_l1_fault r25 } + b790: [0-9a-f]* { subx r5, r6, r7 ; ill ; prefetch_l1_fault r25 } + b798: [0-9a-f]* { fsingle_pack1 r5, r6 ; info 19 ; prefetch_l1_fault r25 } + b7a0: [0-9a-f]* { info 19 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 } + b7a8: [0-9a-f]* { cmoveqz r5, r6, r7 ; jalr r15 ; prefetch_l1_fault r25 } + b7b0: [0-9a-f]* { shl2addx r5, r6, r7 ; jalr r15 ; prefetch_l1_fault r25 } + b7b8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 } + b7c0: [0-9a-f]* { addi r5, r6, 5 ; jr r15 ; prefetch_l1_fault r25 } + b7c8: [0-9a-f]* { rotl r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 } + b7d0: [0-9a-f]* { jrp r15 ; prefetch_l1_fault r25 } + b7d8: [0-9a-f]* { tblidxb1 r5, r6 ; jrp r15 ; prefetch_l1_fault r25 } + b7e0: [0-9a-f]* { nop ; lnk r15 ; prefetch_l1_fault r25 } + b7e8: [0-9a-f]* { mnz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l1_fault r25 } + b7f0: [0-9a-f]* { mnz r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l1_fault r25 } + b7f8: [0-9a-f]* { mnz r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 } + b800: [0-9a-f]* { move r15, r16 ; move r5, r6 ; prefetch_l1_fault r25 } + b808: [0-9a-f]* { move r15, r16 ; prefetch_l1_fault r25 } + b810: [0-9a-f]* { move r5, r6 ; shrs r15, r16, r17 ; prefetch_l1_fault r25 } + b818: [0-9a-f]* { mulax r5, r6, r7 ; movei r15, 5 ; prefetch_l1_fault r25 } + b820: [0-9a-f]* { movei r5, 5 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 } + b828: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 } + b830: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 } + b838: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 } + b840: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 } + b848: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 } + b850: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 } + b858: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 } + b860: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 } + b868: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 } + b870: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 } + b878: [0-9a-f]* { mulax r5, r6, r7 ; nop ; prefetch_l1_fault r25 } + b880: [0-9a-f]* { mulx r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 } + b888: [0-9a-f]* { mz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l1_fault r25 } + b890: [0-9a-f]* { mz r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l1_fault r25 } + b898: [0-9a-f]* { mz r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 } + b8a0: [0-9a-f]* { nop ; cmpleu r5, r6, r7 ; prefetch_l1_fault r25 } + b8a8: [0-9a-f]* { nop ; or r15, r16, r17 ; prefetch_l1_fault r25 } + b8b0: [0-9a-f]* { tblidxb3 r5, r6 ; nop ; prefetch_l1_fault r25 } + b8b8: [0-9a-f]* { nor r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 } + b8c0: [0-9a-f]* { nor r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 } + b8c8: [0-9a-f]* { clz r5, r6 ; or r15, r16, r17 ; prefetch_l1_fault r25 } + b8d0: [0-9a-f]* { or r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l1_fault r25 } + b8d8: [0-9a-f]* { or r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 } + b8e0: [0-9a-f]* { pcnt r5, r6 ; info 19 ; prefetch_l1_fault r25 } + b8e8: [0-9a-f]* { revbits r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 } + b8f0: [0-9a-f]* { revbytes r5, r6 ; addx r15, r16, r17 ; prefetch_l1_fault r25 } + b8f8: [0-9a-f]* { revbytes r5, r6 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 } + b900: [0-9a-f]* { rotl r15, r16, r17 ; nop ; prefetch_l1_fault r25 } + b908: [0-9a-f]* { rotl r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + b910: [0-9a-f]* { rotli r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1_fault r25 } + b918: [0-9a-f]* { rotli r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 } + b920: [0-9a-f]* { rotli r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 } + b928: [0-9a-f]* { shl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + b930: [0-9a-f]* { shl r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 } + b938: [0-9a-f]* { shl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 } + b940: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 } + b948: [0-9a-f]* { shl1add r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 } + b950: [0-9a-f]* { shl1add r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 } + b958: [0-9a-f]* { shl1addx r15, r16, r17 ; nop ; prefetch_l1_fault r25 } + b960: [0-9a-f]* { shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + b968: [0-9a-f]* { shl2add r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l1_fault r25 } + b970: [0-9a-f]* { shl2add r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 } + b978: [0-9a-f]* { shl2add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 } + b980: [0-9a-f]* { shl2addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + b988: [0-9a-f]* { shl2addx r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 } + b990: [0-9a-f]* { shl2addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 } + b998: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 } + b9a0: [0-9a-f]* { shl3add r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 } + b9a8: [0-9a-f]* { shl3add r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 } + b9b0: [0-9a-f]* { shl3addx r15, r16, r17 ; nop ; prefetch_l1_fault r25 } + b9b8: [0-9a-f]* { shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + b9c0: [0-9a-f]* { shli r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1_fault r25 } + b9c8: [0-9a-f]* { shli r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 } + b9d0: [0-9a-f]* { shli r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 } + b9d8: [0-9a-f]* { shrs r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + b9e0: [0-9a-f]* { shrs r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 } + b9e8: [0-9a-f]* { shrs r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 } + b9f0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 } + b9f8: [0-9a-f]* { shrsi r5, r6, 5 ; addx r15, r16, r17 ; prefetch_l1_fault r25 } + ba00: [0-9a-f]* { shrsi r5, r6, 5 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 } + ba08: [0-9a-f]* { shru r15, r16, r17 ; nop ; prefetch_l1_fault r25 } + ba10: [0-9a-f]* { shru r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + ba18: [0-9a-f]* { shrui r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1_fault r25 } + ba20: [0-9a-f]* { shrui r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 } + ba28: [0-9a-f]* { shrui r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 } + ba30: [0-9a-f]* { sub r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + ba38: [0-9a-f]* { sub r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 } + ba40: [0-9a-f]* { sub r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 } + ba48: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l1_fault r25 } + ba50: [0-9a-f]* { subx r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 } + ba58: [0-9a-f]* { subx r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 } + ba60: [0-9a-f]* { tblidxb0 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 } + ba68: [0-9a-f]* { tblidxb1 r5, r6 ; or r15, r16, r17 ; prefetch_l1_fault r25 } + ba70: [0-9a-f]* { tblidxb2 r5, r6 ; lnk r15 ; prefetch_l1_fault r25 } + ba78: [0-9a-f]* { tblidxb3 r5, r6 ; prefetch_l1_fault r25 } + ba80: [0-9a-f]* { cmoveqz r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + ba88: [0-9a-f]* { xor r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 } + ba90: [0-9a-f]* { xor r5, r6, r7 ; movei r15, 5 ; prefetch_l1_fault r25 } + ba98: [0-9a-f]* { cmples r5, r6, r7 ; prefetch_l2 r15 } + baa0: [0-9a-f]* { mnz r5, r6, r7 ; prefetch_l2 r15 } + baa8: [0-9a-f]* { shl2add r5, r6, r7 ; prefetch_l2 r15 } + bab0: [0-9a-f]* { v1dotpa r5, r6, r7 ; prefetch_l2 r15 } + bab8: [0-9a-f]* { v2dotp r5, r6, r7 ; prefetch_l2 r15 } + bac0: [0-9a-f]* { xor r5, r6, r7 ; prefetch_l2 r15 } + bac8: [0-9a-f]* { pcnt r5, r6 ; add r15, r16, r17 ; prefetch_l2 r25 } + bad0: [0-9a-f]* { add r5, r6, r7 ; ill ; prefetch_l2 r25 } + bad8: [0-9a-f]* { cmovnez r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l2 r25 } + bae0: [0-9a-f]* { addi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l2 r25 } + bae8: [0-9a-f]* { addi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l2 r25 } + baf0: [0-9a-f]* { addx r15, r16, r17 ; prefetch_l2 r25 } + baf8: [0-9a-f]* { tblidxb1 r5, r6 ; addx r15, r16, r17 ; prefetch_l2 r25 } + bb00: [0-9a-f]* { addx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 } + bb08: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l2 r25 } + bb10: [0-9a-f]* { addxi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l2 r25 } + bb18: [0-9a-f]* { addxi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2 r25 } + bb20: [0-9a-f]* { pcnt r5, r6 ; and r15, r16, r17 ; prefetch_l2 r25 } + bb28: [0-9a-f]* { and r5, r6, r7 ; ill ; prefetch_l2 r25 } + bb30: [0-9a-f]* { cmovnez r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2 r25 } + bb38: [0-9a-f]* { andi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l2 r25 } + bb40: [0-9a-f]* { andi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l2 r25 } + bb48: [0-9a-f]* { clz r5, r6 ; jalrp r15 ; prefetch_l2 r25 } + bb50: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2 r25 } + bb58: [0-9a-f]* { cmovnez r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 } + bb60: [0-9a-f]* { cmovnez r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 } + bb68: [0-9a-f]* { cmpeq r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2 r25 } + bb70: [0-9a-f]* { cmpeq r5, r6, r7 ; prefetch_l2 r25 } + bb78: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 } + bb80: [0-9a-f]* { cmpeqi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2 r25 } + bb88: [0-9a-f]* { cmpeqi r5, r6, 5 ; movei r15, 5 ; prefetch_l2 r25 } + bb90: [0-9a-f]* { ctz r5, r6 ; cmples r15, r16, r17 ; prefetch_l2 r25 } + bb98: [0-9a-f]* { tblidxb0 r5, r6 ; cmples r15, r16, r17 ; prefetch_l2 r25 } + bba0: [0-9a-f]* { cmples r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + bba8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 } + bbb0: [0-9a-f]* { cmpleu r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 } + bbb8: [0-9a-f]* { cmpleu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 } + bbc0: [0-9a-f]* { cmplts r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2 r25 } + bbc8: [0-9a-f]* { cmplts r5, r6, r7 ; prefetch_l2 r25 } + bbd0: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2 r25 } + bbd8: [0-9a-f]* { cmpltsi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2 r25 } + bbe0: [0-9a-f]* { cmpltsi r5, r6, 5 ; movei r15, 5 ; prefetch_l2 r25 } + bbe8: [0-9a-f]* { ctz r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 } + bbf0: [0-9a-f]* { tblidxb0 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 } + bbf8: [0-9a-f]* { cmpltu r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + bc00: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 } + bc08: [0-9a-f]* { cmpne r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 } + bc10: [0-9a-f]* { cmpne r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 } + bc18: [0-9a-f]* { ctz r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 } + bc20: [0-9a-f]* { cmpne r5, r6, r7 ; prefetch_l2 r25 } + bc28: [0-9a-f]* { rotli r5, r6, 5 ; prefetch_l2 r25 } + bc30: [0-9a-f]* { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; prefetch_l2 r25 } + bc38: [0-9a-f]* { fsingle_pack1 r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 } + bc40: [0-9a-f]* { or r5, r6, r7 ; ill ; prefetch_l2 r25 } + bc48: [0-9a-f]* { cmovnez r5, r6, r7 ; info 19 ; prefetch_l2 r25 } + bc50: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; info 19 ; prefetch_l2 r25 } + bc58: [0-9a-f]* { info 19 ; shrui r5, r6, 5 ; prefetch_l2 r25 } + bc60: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 } + bc68: [0-9a-f]* { andi r5, r6, 5 ; jalrp r15 ; prefetch_l2 r25 } + bc70: [0-9a-f]* { shl1addx r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 } + bc78: [0-9a-f]* { move r5, r6 ; jr r15 ; prefetch_l2 r25 } + bc80: [0-9a-f]* { jr r15 ; prefetch_l2 r25 } + bc88: [0-9a-f]* { revbits r5, r6 ; jrp r15 ; prefetch_l2 r25 } + bc90: [0-9a-f]* { cmpne r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + bc98: [0-9a-f]* { subx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + bca0: [0-9a-f]* { mulx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 } + bca8: [0-9a-f]* { mnz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } + bcb0: [0-9a-f]* { move r15, r16 ; addxi r5, r6, 5 ; prefetch_l2 r25 } + bcb8: [0-9a-f]* { move r15, r16 ; shl r5, r6, r7 ; prefetch_l2 r25 } + bcc0: [0-9a-f]* { move r5, r6 ; jrp r15 ; prefetch_l2 r25 } + bcc8: [0-9a-f]* { movei r15, 5 ; cmplts r5, r6, r7 ; prefetch_l2 r25 } + bcd0: [0-9a-f]* { movei r15, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 } + bcd8: [0-9a-f]* { movei r5, 5 ; rotli r15, r16, 5 ; prefetch_l2 r25 } + bce0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + bce8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; info 19 ; prefetch_l2 r25 } + bcf0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 } + bcf8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2 r25 } + bd00: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2 r25 } + bd08: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 } + bd10: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 } + bd18: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + bd20: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; prefetch_l2 r25 } + bd28: [0-9a-f]* { mulax r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 } + bd30: [0-9a-f]* { mulx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 } + bd38: [0-9a-f]* { mulx r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2 r25 } + bd40: [0-9a-f]* { mulx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + bd48: [0-9a-f]* { mz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } + bd50: [0-9a-f]* { nop ; addi r5, r6, 5 ; prefetch_l2 r25 } + bd58: [0-9a-f]* { nop ; move r15, r16 ; prefetch_l2 r25 } + bd60: [0-9a-f]* { nop ; shl3addx r15, r16, r17 ; prefetch_l2 r25 } + bd68: [0-9a-f]* { ctz r5, r6 ; nor r15, r16, r17 ; prefetch_l2 r25 } + bd70: [0-9a-f]* { tblidxb0 r5, r6 ; nor r15, r16, r17 ; prefetch_l2 r25 } + bd78: [0-9a-f]* { nor r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + bd80: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 } + bd88: [0-9a-f]* { or r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 } + bd90: [0-9a-f]* { or r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 } + bd98: [0-9a-f]* { pcnt r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 } + bda0: [0-9a-f]* { revbits r5, r6 ; rotli r15, r16, 5 ; prefetch_l2 r25 } + bda8: [0-9a-f]* { revbytes r5, r6 ; move r15, r16 ; prefetch_l2 r25 } + bdb0: [0-9a-f]* { rotl r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 } + bdb8: [0-9a-f]* { rotl r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + bdc0: [0-9a-f]* { rotl r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 } + bdc8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2 r25 } + bdd0: [0-9a-f]* { rotli r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l2 r25 } + bdd8: [0-9a-f]* { rotli r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l2 r25 } + bde0: [0-9a-f]* { shl r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + bde8: [0-9a-f]* { shl r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 } + bdf0: [0-9a-f]* { clz r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } + bdf8: [0-9a-f]* { shl1add r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l2 r25 } + be00: [0-9a-f]* { shl1add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + be08: [0-9a-f]* { shl1addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 } + be10: [0-9a-f]* { shl1addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + be18: [0-9a-f]* { shl1addx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 } + be20: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + be28: [0-9a-f]* { shl2add r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l2 r25 } + be30: [0-9a-f]* { shl2add r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 } + be38: [0-9a-f]* { shl2addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + be40: [0-9a-f]* { shl2addx r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 } + be48: [0-9a-f]* { clz r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2 r25 } + be50: [0-9a-f]* { shl3add r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l2 r25 } + be58: [0-9a-f]* { shl3add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + be60: [0-9a-f]* { shl3addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 } + be68: [0-9a-f]* { shl3addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + be70: [0-9a-f]* { shl3addx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 } + be78: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 } + be80: [0-9a-f]* { shli r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l2 r25 } + be88: [0-9a-f]* { shli r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l2 r25 } + be90: [0-9a-f]* { shrs r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + be98: [0-9a-f]* { shrs r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 } + bea0: [0-9a-f]* { clz r5, r6 ; shrsi r15, r16, 5 ; prefetch_l2 r25 } + bea8: [0-9a-f]* { shrsi r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch_l2 r25 } + beb0: [0-9a-f]* { shrsi r5, r6, 5 ; move r15, r16 ; prefetch_l2 r25 } + beb8: [0-9a-f]* { shru r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 } + bec0: [0-9a-f]* { shru r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + bec8: [0-9a-f]* { shru r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 } + bed0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2 r25 } + bed8: [0-9a-f]* { shrui r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l2 r25 } + bee0: [0-9a-f]* { shrui r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l2 r25 } + bee8: [0-9a-f]* { sub r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + bef0: [0-9a-f]* { sub r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 } + bef8: [0-9a-f]* { clz r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 } + bf00: [0-9a-f]* { subx r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l2 r25 } + bf08: [0-9a-f]* { subx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + bf10: [0-9a-f]* { tblidxb0 r5, r6 ; info 19 ; prefetch_l2 r25 } + bf18: [0-9a-f]* { tblidxb1 r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 } + bf20: [0-9a-f]* { tblidxb2 r5, r6 ; addx r15, r16, r17 ; prefetch_l2 r25 } + bf28: [0-9a-f]* { tblidxb2 r5, r6 ; shrui r15, r16, 5 ; prefetch_l2 r25 } + bf30: [0-9a-f]* { tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 } + bf38: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 } + bf40: [0-9a-f]* { xor r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2 r25 } + bf48: [0-9a-f]* { xor r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 } + bf50: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; prefetch_l2_fault r15 } + bf58: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; prefetch_l2_fault r15 } + bf60: [0-9a-f]* { v1add r5, r6, r7 ; prefetch_l2_fault r15 } + bf68: [0-9a-f]* { v1shrsi r5, r6, 5 ; prefetch_l2_fault r15 } + bf70: [0-9a-f]* { v2shli r5, r6, 5 ; prefetch_l2_fault r15 } + bf78: [0-9a-f]* { fsingle_pack1 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 } + bf80: [0-9a-f]* { tblidxb2 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 } + bf88: [0-9a-f]* { add r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 } + bf90: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l2_fault r25 } + bf98: [0-9a-f]* { addi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 } + bfa0: [0-9a-f]* { addi r5, r6, 5 ; prefetch_l2_fault r25 } + bfa8: [0-9a-f]* { revbits r5, r6 ; addx r15, r16, r17 ; prefetch_l2_fault r25 } + bfb0: [0-9a-f]* { addx r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 } + bfb8: [0-9a-f]* { addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l2_fault r25 } + bfc0: [0-9a-f]* { addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 } + bfc8: [0-9a-f]* { addxi r5, r6, 5 ; nop ; prefetch_l2_fault r25 } + bfd0: [0-9a-f]* { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + bfd8: [0-9a-f]* { tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + bfe0: [0-9a-f]* { and r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 } + bfe8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2_fault r25 } + bff0: [0-9a-f]* { andi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 } + bff8: [0-9a-f]* { andi r5, r6, 5 ; prefetch_l2_fault r25 } + c000: [0-9a-f]* { clz r5, r6 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 } + c008: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 } + c010: [0-9a-f]* { cmovnez r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 } + c018: [0-9a-f]* { cmpeq r15, r16, r17 ; prefetch_l2_fault r25 } + c020: [0-9a-f]* { tblidxb1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 } + c028: [0-9a-f]* { cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 } + c030: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 } + c038: [0-9a-f]* { cmpeqi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l2_fault r25 } + c040: [0-9a-f]* { cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + c048: [0-9a-f]* { pcnt r5, r6 ; cmples r15, r16, r17 ; prefetch_l2_fault r25 } + c050: [0-9a-f]* { cmples r5, r6, r7 ; ill ; prefetch_l2_fault r25 } + c058: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 } + c060: [0-9a-f]* { cmpleu r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2_fault r25 } + c068: [0-9a-f]* { cmpleu r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 } + c070: [0-9a-f]* { cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + c078: [0-9a-f]* { tblidxb1 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + c080: [0-9a-f]* { cmplts r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 } + c088: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 } + c090: [0-9a-f]* { cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l2_fault r25 } + c098: [0-9a-f]* { cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + c0a0: [0-9a-f]* { pcnt r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 } + c0a8: [0-9a-f]* { cmpltu r5, r6, r7 ; ill ; prefetch_l2_fault r25 } + c0b0: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2_fault r25 } + c0b8: [0-9a-f]* { cmpne r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2_fault r25 } + c0c0: [0-9a-f]* { cmpne r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 } + c0c8: [0-9a-f]* { ctz r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 } + c0d0: [0-9a-f]* { andi r5, r6, 5 ; prefetch_l2_fault r25 } + c0d8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 } + c0e0: [0-9a-f]* { shru r15, r16, r17 ; prefetch_l2_fault r25 } + c0e8: [0-9a-f]* { fsingle_pack1 r5, r6 ; mz r15, r16, r17 ; prefetch_l2_fault r25 } + c0f0: [0-9a-f]* { ill ; prefetch_l2_fault r25 } + c0f8: [0-9a-f]* { tblidxb1 r5, r6 ; ill ; prefetch_l2_fault r25 } + c100: [0-9a-f]* { info 19 ; info 19 ; prefetch_l2_fault r25 } + c108: [0-9a-f]* { info 19 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 } + c110: [0-9a-f]* { cmpeq r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 } + c118: [0-9a-f]* { shl3addx r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 } + c120: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jalrp r15 ; prefetch_l2_fault r25 } + c128: [0-9a-f]* { addxi r5, r6, 5 ; jr r15 ; prefetch_l2_fault r25 } + c130: [0-9a-f]* { shl r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 } + c138: [0-9a-f]* { info 19 ; jrp r15 ; prefetch_l2_fault r25 } + c140: [0-9a-f]* { tblidxb3 r5, r6 ; jrp r15 ; prefetch_l2_fault r25 } + c148: [0-9a-f]* { or r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 } + c150: [0-9a-f]* { mnz r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2_fault r25 } + c158: [0-9a-f]* { mnz r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2_fault r25 } + c160: [0-9a-f]* { mnz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 } + c168: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 } + c170: [0-9a-f]* { move r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 } + c178: [0-9a-f]* { move r5, r6 ; shru r15, r16, r17 ; prefetch_l2_fault r25 } + c180: [0-9a-f]* { movei r15, 5 ; mz r5, r6, r7 ; prefetch_l2_fault r25 } + c188: [0-9a-f]* { movei r5, 5 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 } + c190: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + c198: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 } + c1a0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 } + c1a8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + c1b0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 } + c1b8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 } + c1c0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 } + c1c8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 } + c1d0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 } + c1d8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 } + c1e0: [0-9a-f]* { mulax r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 } + c1e8: [0-9a-f]* { mulx r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 } + c1f0: [0-9a-f]* { mz r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2_fault r25 } + c1f8: [0-9a-f]* { mz r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2_fault r25 } + c200: [0-9a-f]* { mz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 } + c208: [0-9a-f]* { nop ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + c210: [0-9a-f]* { pcnt r5, r6 ; nop ; prefetch_l2_fault r25 } + c218: [0-9a-f]* { nop ; xor r5, r6, r7 ; prefetch_l2_fault r25 } + c220: [0-9a-f]* { pcnt r5, r6 ; nor r15, r16, r17 ; prefetch_l2_fault r25 } + c228: [0-9a-f]* { nor r5, r6, r7 ; ill ; prefetch_l2_fault r25 } + c230: [0-9a-f]* { cmovnez r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 } + c238: [0-9a-f]* { or r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2_fault r25 } + c240: [0-9a-f]* { or r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 } + c248: [0-9a-f]* { pcnt r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 } + c250: [0-9a-f]* { revbits r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 } + c258: [0-9a-f]* { revbytes r5, r6 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + c260: [0-9a-f]* { revbytes r5, r6 ; subx r15, r16, r17 ; prefetch_l2_fault r25 } + c268: [0-9a-f]* { rotl r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 } + c270: [0-9a-f]* { rotl r5, r6, r7 ; prefetch_l2_fault r25 } + c278: [0-9a-f]* { cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + c280: [0-9a-f]* { rotli r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 } + c288: [0-9a-f]* { rotli r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 } + c290: [0-9a-f]* { ctz r5, r6 ; shl r15, r16, r17 ; prefetch_l2_fault r25 } + c298: [0-9a-f]* { tblidxb0 r5, r6 ; shl r15, r16, r17 ; prefetch_l2_fault r25 } + c2a0: [0-9a-f]* { shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 } + c2a8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 } + c2b0: [0-9a-f]* { shl1add r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + c2b8: [0-9a-f]* { shl1add r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 } + c2c0: [0-9a-f]* { shl1addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 } + c2c8: [0-9a-f]* { shl1addx r5, r6, r7 ; prefetch_l2_fault r25 } + c2d0: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 } + c2d8: [0-9a-f]* { shl2add r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 } + c2e0: [0-9a-f]* { shl2add r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 } + c2e8: [0-9a-f]* { ctz r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 } + c2f0: [0-9a-f]* { tblidxb0 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 } + c2f8: [0-9a-f]* { shl2addx r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 } + c300: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 } + c308: [0-9a-f]* { shl3add r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + c310: [0-9a-f]* { shl3add r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 } + c318: [0-9a-f]* { shl3addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 } + c320: [0-9a-f]* { shl3addx r5, r6, r7 ; prefetch_l2_fault r25 } + c328: [0-9a-f]* { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2_fault r25 } + c330: [0-9a-f]* { shli r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 } + c338: [0-9a-f]* { shli r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 } + c340: [0-9a-f]* { ctz r5, r6 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 } + c348: [0-9a-f]* { tblidxb0 r5, r6 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 } + c350: [0-9a-f]* { shrs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 } + c358: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2_fault r25 } + c360: [0-9a-f]* { shrsi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + c368: [0-9a-f]* { shrsi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l2_fault r25 } + c370: [0-9a-f]* { shru r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 } + c378: [0-9a-f]* { shru r5, r6, r7 ; prefetch_l2_fault r25 } + c380: [0-9a-f]* { cmoveqz r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 } + c388: [0-9a-f]* { shrui r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 } + c390: [0-9a-f]* { shrui r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 } + c398: [0-9a-f]* { ctz r5, r6 ; sub r15, r16, r17 ; prefetch_l2_fault r25 } + c3a0: [0-9a-f]* { tblidxb0 r5, r6 ; sub r15, r16, r17 ; prefetch_l2_fault r25 } + c3a8: [0-9a-f]* { sub r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 } + c3b0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 } + c3b8: [0-9a-f]* { subx r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + c3c0: [0-9a-f]* { subx r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 } + c3c8: [0-9a-f]* { tblidxb0 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 } + c3d0: [0-9a-f]* { tblidxb1 r5, r6 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + c3d8: [0-9a-f]* { tblidxb2 r5, r6 ; move r15, r16 ; prefetch_l2_fault r25 } + c3e0: [0-9a-f]* { tblidxb3 r5, r6 ; info 19 ; prefetch_l2_fault r25 } + c3e8: [0-9a-f]* { xor r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l2_fault r25 } + c3f0: [0-9a-f]* { xor r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 } + c3f8: [0-9a-f]* { xor r5, r6, r7 ; nop ; prefetch_l2_fault r25 } + c400: [0-9a-f]* { cmplts r5, r6, r7 ; prefetch_l3 r15 } + c408: [0-9a-f]* { movei r5, 5 ; prefetch_l3 r15 } + c410: [0-9a-f]* { shl3add r5, r6, r7 ; prefetch_l3 r15 } + c418: [0-9a-f]* { v1dotpua r5, r6, r7 ; prefetch_l3 r15 } + c420: [0-9a-f]* { v2int_h r5, r6, r7 ; prefetch_l3 r15 } + c428: [0-9a-f]* { add r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3 r25 } + c430: [0-9a-f]* { revbytes r5, r6 ; add r15, r16, r17 ; prefetch_l3 r25 } + c438: [0-9a-f]* { add r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + c440: [0-9a-f]* { addi r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l3 r25 } + c448: [0-9a-f]* { addi r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l3 r25 } + c450: [0-9a-f]* { addi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l3 r25 } + c458: [0-9a-f]* { addx r15, r16, r17 ; info 19 ; prefetch_l3 r25 } + c460: [0-9a-f]* { tblidxb3 r5, r6 ; addx r15, r16, r17 ; prefetch_l3 r25 } + c468: [0-9a-f]* { addx r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 } + c470: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3 r25 } + c478: [0-9a-f]* { addxi r5, r6, 5 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 } + c480: [0-9a-f]* { and r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3 r25 } + c488: [0-9a-f]* { revbytes r5, r6 ; and r15, r16, r17 ; prefetch_l3 r25 } + c490: [0-9a-f]* { and r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + c498: [0-9a-f]* { andi r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l3 r25 } + c4a0: [0-9a-f]* { andi r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l3 r25 } + c4a8: [0-9a-f]* { andi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l3 r25 } + c4b0: [0-9a-f]* { clz r5, r6 ; jrp r15 ; prefetch_l3 r25 } + c4b8: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 } + c4c0: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + c4c8: [0-9a-f]* { cmovnez r5, r6, r7 ; prefetch_l3 r25 } + c4d0: [0-9a-f]* { revbits r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + c4d8: [0-9a-f]* { cmpeq r5, r6, r7 ; info 19 ; prefetch_l3 r25 } + c4e0: [0-9a-f]* { cmpeqi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 } + c4e8: [0-9a-f]* { cmpeqi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3 r25 } + c4f0: [0-9a-f]* { cmpeqi r5, r6, 5 ; nop ; prefetch_l3 r25 } + c4f8: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch_l3 r25 } + c500: [0-9a-f]* { tblidxb2 r5, r6 ; cmples r15, r16, r17 ; prefetch_l3 r25 } + c508: [0-9a-f]* { cmples r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + c510: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 } + c518: [0-9a-f]* { cmpleu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + c520: [0-9a-f]* { cmpleu r5, r6, r7 ; prefetch_l3 r25 } + c528: [0-9a-f]* { revbits r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 } + c530: [0-9a-f]* { cmplts r5, r6, r7 ; info 19 ; prefetch_l3 r25 } + c538: [0-9a-f]* { cmpltsi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 } + c540: [0-9a-f]* { cmpltsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3 r25 } + c548: [0-9a-f]* { cmpltsi r5, r6, 5 ; nop ; prefetch_l3 r25 } + c550: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + c558: [0-9a-f]* { tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + c560: [0-9a-f]* { cmpltu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + c568: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 } + c570: [0-9a-f]* { cmpne r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + c578: [0-9a-f]* { cmpne r5, r6, r7 ; prefetch_l3 r25 } + c580: [0-9a-f]* { ctz r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 } + c588: [0-9a-f]* { prefetch_l3 r25 } + c590: [0-9a-f]* { shl r5, r6, r7 ; prefetch_l3 r25 } + c598: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + c5a0: [0-9a-f]* { fsingle_pack1 r5, r6 ; prefetch_l3 r25 } + c5a8: [0-9a-f]* { revbits r5, r6 ; ill ; prefetch_l3 r25 } + c5b0: [0-9a-f]* { info 19 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 } + c5b8: [0-9a-f]* { mulx r5, r6, r7 ; info 19 ; prefetch_l3 r25 } + c5c0: [0-9a-f]* { info 19 ; sub r5, r6, r7 ; prefetch_l3 r25 } + c5c8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + c5d0: [0-9a-f]* { cmoveqz r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 } + c5d8: [0-9a-f]* { shl2addx r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 } + c5e0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; jr r15 ; prefetch_l3 r25 } + c5e8: [0-9a-f]* { addi r5, r6, 5 ; jrp r15 ; prefetch_l3 r25 } + c5f0: [0-9a-f]* { rotl r5, r6, r7 ; jrp r15 ; prefetch_l3 r25 } + c5f8: [0-9a-f]* { lnk r15 ; prefetch_l3 r25 } + c600: [0-9a-f]* { tblidxb1 r5, r6 ; lnk r15 ; prefetch_l3 r25 } + c608: [0-9a-f]* { mnz r15, r16, r17 ; nop ; prefetch_l3 r25 } + c610: [0-9a-f]* { mnz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + c618: [0-9a-f]* { move r15, r16 ; andi r5, r6, 5 ; prefetch_l3 r25 } + c620: [0-9a-f]* { move r15, r16 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 } + c628: [0-9a-f]* { move r5, r6 ; mnz r15, r16, r17 ; prefetch_l3 r25 } + c630: [0-9a-f]* { movei r15, 5 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 } + c638: [0-9a-f]* { movei r15, 5 ; sub r5, r6, r7 ; prefetch_l3 r25 } + c640: [0-9a-f]* { movei r5, 5 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + c648: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 } + c650: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 } + c658: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } + c660: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 } + c668: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 } + c670: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 } + c678: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 } + c680: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 } + c688: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; info 19 ; prefetch_l3 r25 } + c690: [0-9a-f]* { mulax r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 } + c698: [0-9a-f]* { mulx r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 } + c6a0: [0-9a-f]* { mulx r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 } + c6a8: [0-9a-f]* { mz r15, r16, r17 ; nop ; prefetch_l3 r25 } + c6b0: [0-9a-f]* { mz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + c6b8: [0-9a-f]* { nop ; addx r5, r6, r7 ; prefetch_l3 r25 } + c6c0: [0-9a-f]* { nop ; movei r15, 5 ; prefetch_l3 r25 } + c6c8: [0-9a-f]* { nop ; shli r15, r16, 5 ; prefetch_l3 r25 } + c6d0: [0-9a-f]* { fsingle_pack1 r5, r6 ; nor r15, r16, r17 ; prefetch_l3 r25 } + c6d8: [0-9a-f]* { tblidxb2 r5, r6 ; nor r15, r16, r17 ; prefetch_l3 r25 } + c6e0: [0-9a-f]* { nor r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + c6e8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3 r25 } + c6f0: [0-9a-f]* { or r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + c6f8: [0-9a-f]* { or r5, r6, r7 ; prefetch_l3 r25 } + c700: [0-9a-f]* { pcnt r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 } + c708: [0-9a-f]* { revbits r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + c710: [0-9a-f]* { revbytes r5, r6 ; mz r15, r16, r17 ; prefetch_l3 r25 } + c718: [0-9a-f]* { rotl r15, r16, r17 ; prefetch_l3 r25 } + c720: [0-9a-f]* { tblidxb1 r5, r6 ; rotl r15, r16, r17 ; prefetch_l3 r25 } + c728: [0-9a-f]* { rotl r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 } + c730: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 } + c738: [0-9a-f]* { rotli r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3 r25 } + c740: [0-9a-f]* { rotli r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 } + c748: [0-9a-f]* { pcnt r5, r6 ; shl r15, r16, r17 ; prefetch_l3 r25 } + c750: [0-9a-f]* { shl r5, r6, r7 ; ill ; prefetch_l3 r25 } + c758: [0-9a-f]* { cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + c760: [0-9a-f]* { shl1add r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 } + c768: [0-9a-f]* { shl1add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 } + c770: [0-9a-f]* { shl1addx r15, r16, r17 ; prefetch_l3 r25 } + c778: [0-9a-f]* { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 } + c780: [0-9a-f]* { shl1addx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 } + c788: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3 r25 } + c790: [0-9a-f]* { shl2add r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3 r25 } + c798: [0-9a-f]* { shl2add r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 } + c7a0: [0-9a-f]* { pcnt r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 } + c7a8: [0-9a-f]* { shl2addx r5, r6, r7 ; ill ; prefetch_l3 r25 } + c7b0: [0-9a-f]* { cmovnez r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + c7b8: [0-9a-f]* { shl3add r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 } + c7c0: [0-9a-f]* { shl3add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 } + c7c8: [0-9a-f]* { shl3addx r15, r16, r17 ; prefetch_l3 r25 } + c7d0: [0-9a-f]* { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 } + c7d8: [0-9a-f]* { shl3addx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 } + c7e0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3 r25 } + c7e8: [0-9a-f]* { shli r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3 r25 } + c7f0: [0-9a-f]* { shli r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 } + c7f8: [0-9a-f]* { pcnt r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 } + c800: [0-9a-f]* { shrs r5, r6, r7 ; ill ; prefetch_l3 r25 } + c808: [0-9a-f]* { cmovnez r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3 r25 } + c810: [0-9a-f]* { shrsi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l3 r25 } + c818: [0-9a-f]* { shrsi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l3 r25 } + c820: [0-9a-f]* { shru r15, r16, r17 ; prefetch_l3 r25 } + c828: [0-9a-f]* { tblidxb1 r5, r6 ; shru r15, r16, r17 ; prefetch_l3 r25 } + c830: [0-9a-f]* { shru r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 } + c838: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 } + c840: [0-9a-f]* { shrui r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3 r25 } + c848: [0-9a-f]* { shrui r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 } + c850: [0-9a-f]* { pcnt r5, r6 ; sub r15, r16, r17 ; prefetch_l3 r25 } + c858: [0-9a-f]* { sub r5, r6, r7 ; ill ; prefetch_l3 r25 } + c860: [0-9a-f]* { cmovnez r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 } + c868: [0-9a-f]* { subx r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 } + c870: [0-9a-f]* { subx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 } + c878: [0-9a-f]* { tblidxb0 r5, r6 ; jalrp r15 ; prefetch_l3 r25 } + c880: [0-9a-f]* { tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } + c888: [0-9a-f]* { tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch_l3 r25 } + c890: [0-9a-f]* { tblidxb2 r5, r6 ; subx r15, r16, r17 ; prefetch_l3 r25 } + c898: [0-9a-f]* { tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 } + c8a0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 } + c8a8: [0-9a-f]* { xor r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 } + c8b0: [0-9a-f]* { add r5, r6, r7 ; prefetch_l3_fault r15 } + c8b8: [0-9a-f]* { fdouble_mul_flags r5, r6, r7 ; prefetch_l3_fault r15 } + c8c0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; prefetch_l3_fault r15 } + c8c8: [0-9a-f]* { v1adduc r5, r6, r7 ; prefetch_l3_fault r15 } + c8d0: [0-9a-f]* { v1shrui r5, r6, 5 ; prefetch_l3_fault r15 } + c8d8: [0-9a-f]* { v2shrs r5, r6, r7 ; prefetch_l3_fault r15 } + c8e0: [0-9a-f]* { add r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 } + c8e8: [0-9a-f]* { add r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } + c8f0: [0-9a-f]* { add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 } + c8f8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3_fault r25 } + c900: [0-9a-f]* { addi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + c908: [0-9a-f]* { addx r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 } + c910: [0-9a-f]* { addx r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l3_fault r25 } + c918: [0-9a-f]* { addx r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 } + c920: [0-9a-f]* { addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l3_fault r25 } + c928: [0-9a-f]* { addxi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l3_fault r25 } + c930: [0-9a-f]* { addxi r5, r6, 5 ; or r15, r16, r17 ; prefetch_l3_fault r25 } + c938: [0-9a-f]* { and r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 } + c940: [0-9a-f]* { and r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } + c948: [0-9a-f]* { and r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 } + c950: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + c958: [0-9a-f]* { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + c960: [0-9a-f]* { clz r5, r6 ; addi r15, r16, 5 ; prefetch_l3_fault r25 } + c968: [0-9a-f]* { clz r5, r6 ; shru r15, r16, r17 ; prefetch_l3_fault r25 } + c970: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 } + c978: [0-9a-f]* { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 } + c980: [0-9a-f]* { cmpeq r15, r16, r17 ; info 19 ; prefetch_l3_fault r25 } + c988: [0-9a-f]* { tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + c990: [0-9a-f]* { cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 } + c998: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 } + c9a0: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 } + c9a8: [0-9a-f]* { cmples r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3_fault r25 } + c9b0: [0-9a-f]* { revbytes r5, r6 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + c9b8: [0-9a-f]* { cmples r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + c9c0: [0-9a-f]* { cmpleu r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 } + c9c8: [0-9a-f]* { cmpleu r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 } + c9d0: [0-9a-f]* { cmpleu r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 } + c9d8: [0-9a-f]* { cmplts r15, r16, r17 ; info 19 ; prefetch_l3_fault r25 } + c9e0: [0-9a-f]* { tblidxb3 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3_fault r25 } + c9e8: [0-9a-f]* { cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 } + c9f0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 } + c9f8: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 } + ca00: [0-9a-f]* { cmpltu r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3_fault r25 } + ca08: [0-9a-f]* { revbytes r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 } + ca10: [0-9a-f]* { cmpltu r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + ca18: [0-9a-f]* { cmpne r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 } + ca20: [0-9a-f]* { cmpne r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 } + ca28: [0-9a-f]* { cmpne r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 } + ca30: [0-9a-f]* { ctz r5, r6 ; jrp r15 ; prefetch_l3_fault r25 } + ca38: [0-9a-f]* { cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 } + ca40: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 } + ca48: [0-9a-f]* { shrui r15, r16, 5 ; prefetch_l3_fault r25 } + ca50: [0-9a-f]* { fsingle_pack1 r5, r6 ; nor r15, r16, r17 ; prefetch_l3_fault r25 } + ca58: [0-9a-f]* { info 19 ; ill ; prefetch_l3_fault r25 } + ca60: [0-9a-f]* { tblidxb3 r5, r6 ; ill ; prefetch_l3_fault r25 } + ca68: [0-9a-f]* { info 19 ; jalrp r15 ; prefetch_l3_fault r25 } + ca70: [0-9a-f]* { info 19 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 } + ca78: [0-9a-f]* { cmples r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + ca80: [0-9a-f]* { shrs r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + ca88: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 } + ca90: [0-9a-f]* { andi r5, r6, 5 ; jr r15 ; prefetch_l3_fault r25 } + ca98: [0-9a-f]* { shl1addx r5, r6, r7 ; jr r15 ; prefetch_l3_fault r25 } + caa0: [0-9a-f]* { move r5, r6 ; jrp r15 ; prefetch_l3_fault r25 } + caa8: [0-9a-f]* { jrp r15 ; prefetch_l3_fault r25 } + cab0: [0-9a-f]* { revbits r5, r6 ; lnk r15 ; prefetch_l3_fault r25 } + cab8: [0-9a-f]* { mnz r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 } + cac0: [0-9a-f]* { mnz r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3_fault r25 } + cac8: [0-9a-f]* { mnz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 } + cad0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; move r15, r16 ; prefetch_l3_fault r25 } + cad8: [0-9a-f]* { move r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + cae0: [0-9a-f]* { move r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + cae8: [0-9a-f]* { movei r15, 5 ; nor r5, r6, r7 ; prefetch_l3_fault r25 } + caf0: [0-9a-f]* { movei r5, 5 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 } + caf8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + cb00: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 } + cb08: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 } + cb10: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 } + cb18: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3_fault r25 } + cb20: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 } + cb28: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 } + cb30: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 } + cb38: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 } + cb40: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 } + cb48: [0-9a-f]* { mulax r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 } + cb50: [0-9a-f]* { mulx r5, r6, r7 ; move r15, r16 ; prefetch_l3_fault r25 } + cb58: [0-9a-f]* { mz r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 } + cb60: [0-9a-f]* { mz r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3_fault r25 } + cb68: [0-9a-f]* { mz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 } + cb70: [0-9a-f]* { nop ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 } + cb78: [0-9a-f]* { revbytes r5, r6 ; nop ; prefetch_l3_fault r25 } + cb80: [0-9a-f]* { nor r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3_fault r25 } + cb88: [0-9a-f]* { revbytes r5, r6 ; nor r15, r16, r17 ; prefetch_l3_fault r25 } + cb90: [0-9a-f]* { nor r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + cb98: [0-9a-f]* { or r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 } + cba0: [0-9a-f]* { or r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 } + cba8: [0-9a-f]* { or r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 } + cbb0: [0-9a-f]* { pcnt r5, r6 ; jrp r15 ; prefetch_l3_fault r25 } + cbb8: [0-9a-f]* { revbits r5, r6 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 } + cbc0: [0-9a-f]* { revbytes r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + cbc8: [0-9a-f]* { revbytes r5, r6 ; prefetch_l3_fault r25 } + cbd0: [0-9a-f]* { revbits r5, r6 ; rotl r15, r16, r17 ; prefetch_l3_fault r25 } + cbd8: [0-9a-f]* { rotl r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 } + cbe0: [0-9a-f]* { rotli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 } + cbe8: [0-9a-f]* { rotli r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 } + cbf0: [0-9a-f]* { rotli r5, r6, 5 ; nop ; prefetch_l3_fault r25 } + cbf8: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; prefetch_l3_fault r25 } + cc00: [0-9a-f]* { tblidxb2 r5, r6 ; shl r15, r16, r17 ; prefetch_l3_fault r25 } + cc08: [0-9a-f]* { shl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 } + cc10: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 } + cc18: [0-9a-f]* { shl1add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + cc20: [0-9a-f]* { shl1add r5, r6, r7 ; prefetch_l3_fault r25 } + cc28: [0-9a-f]* { revbits r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 } + cc30: [0-9a-f]* { shl1addx r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 } + cc38: [0-9a-f]* { shl2add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 } + cc40: [0-9a-f]* { shl2add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 } + cc48: [0-9a-f]* { shl2add r5, r6, r7 ; nop ; prefetch_l3_fault r25 } + cc50: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 } + cc58: [0-9a-f]* { tblidxb2 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 } + cc60: [0-9a-f]* { shl2addx r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 } + cc68: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 } + cc70: [0-9a-f]* { shl3add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + cc78: [0-9a-f]* { shl3add r5, r6, r7 ; prefetch_l3_fault r25 } + cc80: [0-9a-f]* { revbits r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 } + cc88: [0-9a-f]* { shl3addx r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 } + cc90: [0-9a-f]* { shli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 } + cc98: [0-9a-f]* { shli r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 } + cca0: [0-9a-f]* { shli r5, r6, 5 ; nop ; prefetch_l3_fault r25 } + cca8: [0-9a-f]* { fsingle_pack1 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 } + ccb0: [0-9a-f]* { tblidxb2 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 } + ccb8: [0-9a-f]* { shrs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 } + ccc0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 } + ccc8: [0-9a-f]* { shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + ccd0: [0-9a-f]* { shrsi r5, r6, 5 ; prefetch_l3_fault r25 } + ccd8: [0-9a-f]* { revbits r5, r6 ; shru r15, r16, r17 ; prefetch_l3_fault r25 } + cce0: [0-9a-f]* { shru r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 } + cce8: [0-9a-f]* { shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 } + ccf0: [0-9a-f]* { shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 } + ccf8: [0-9a-f]* { shrui r5, r6, 5 ; nop ; prefetch_l3_fault r25 } + cd00: [0-9a-f]* { fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + cd08: [0-9a-f]* { tblidxb2 r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + cd10: [0-9a-f]* { sub r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 } + cd18: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 } + cd20: [0-9a-f]* { subx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + cd28: [0-9a-f]* { subx r5, r6, r7 ; prefetch_l3_fault r25 } + cd30: [0-9a-f]* { tblidxb0 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 } + cd38: [0-9a-f]* { tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 } + cd40: [0-9a-f]* { tblidxb2 r5, r6 ; mz r15, r16, r17 ; prefetch_l3_fault r25 } + cd48: [0-9a-f]* { tblidxb3 r5, r6 ; jalrp r15 ; prefetch_l3_fault r25 } + cd50: [0-9a-f]* { xor r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l3_fault r25 } + cd58: [0-9a-f]* { xor r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l3_fault r25 } + cd60: [0-9a-f]* { xor r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3_fault r25 } + cd68: [0-9a-f]* { cmpltu r5, r6, r7 ; raise } + cd70: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; raise } + cd78: [0-9a-f]* { shli r5, r6, 5 ; raise } + cd80: [0-9a-f]* { v1dotpusa r5, r6, r7 ; raise } + cd88: [0-9a-f]* { v2maxs r5, r6, r7 ; raise } + cd90: [0-9a-f]* { revbits r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 } + cd98: [0-9a-f]* { revbits r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 } + cda0: [0-9a-f]* { revbits r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 } + cda8: [0-9a-f]* { revbits r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + cdb0: [0-9a-f]* { revbits r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 } + cdb8: [0-9a-f]* { revbits r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 } + cdc0: [0-9a-f]* { revbits r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + cdc8: [0-9a-f]* { revbits r5, r6 ; fetchand r15, r16, r17 } + cdd0: [0-9a-f]* { revbits r5, r6 ; ill ; prefetch_l3_fault r25 } + cdd8: [0-9a-f]* { revbits r5, r6 ; jalr r15 ; prefetch_l3 r25 } + cde0: [0-9a-f]* { revbits r5, r6 ; jr r15 ; st r25, r26 } + cde8: [0-9a-f]* { revbits r5, r6 ; ill ; ld r25, r26 } + cdf0: [0-9a-f]* { revbits r5, r6 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 } + cdf8: [0-9a-f]* { revbits r5, r6 ; ld1s_add r15, r16, 5 } + ce00: [0-9a-f]* { revbits r5, r6 ; shli r15, r16, 5 ; ld1u r25, r26 } + ce08: [0-9a-f]* { revbits r5, r6 ; rotl r15, r16, r17 ; ld2s r25, r26 } + ce10: [0-9a-f]* { revbits r5, r6 ; jrp r15 ; ld2u r25, r26 } + ce18: [0-9a-f]* { revbits r5, r6 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + ce20: [0-9a-f]* { revbits r5, r6 ; addx r15, r16, r17 ; ld4u r25, r26 } + ce28: [0-9a-f]* { revbits r5, r6 ; shrui r15, r16, 5 ; ld4u r25, r26 } + ce30: [0-9a-f]* { revbits r5, r6 ; lnk r15 ; st4 r25, r26 } + ce38: [0-9a-f]* { revbits r5, r6 ; move r15, r16 ; st4 r25, r26 } + ce40: [0-9a-f]* { revbits r5, r6 ; mz r15, r16, r17 ; st4 r25, r26 } + ce48: [0-9a-f]* { revbits r5, r6 ; or r15, r16, r17 ; ld r25, r26 } + ce50: [0-9a-f]* { revbits r5, r6 ; jr r15 ; prefetch r25 } + ce58: [0-9a-f]* { revbits r5, r6 ; andi r15, r16, 5 ; prefetch r25 } + ce60: [0-9a-f]* { revbits r5, r6 ; xor r15, r16, r17 ; prefetch r25 } + ce68: [0-9a-f]* { revbits r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 } + ce70: [0-9a-f]* { revbits r5, r6 ; rotl r15, r16, r17 ; prefetch_l2 r25 } + ce78: [0-9a-f]* { revbits r5, r6 ; lnk r15 ; prefetch_l2_fault r25 } + ce80: [0-9a-f]* { revbits r5, r6 ; cmpne r15, r16, r17 ; prefetch_l3 r25 } + ce88: [0-9a-f]* { revbits r5, r6 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + ce90: [0-9a-f]* { revbits r5, r6 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + ce98: [0-9a-f]* { revbits r5, r6 ; rotli r15, r16, 5 } + cea0: [0-9a-f]* { revbits r5, r6 ; shl1addx r15, r16, r17 ; ld r25, r26 } + cea8: [0-9a-f]* { revbits r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + ceb0: [0-9a-f]* { revbits r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + ceb8: [0-9a-f]* { revbits r5, r6 ; shrs r15, r16, r17 ; ld2u r25, r26 } + cec0: [0-9a-f]* { revbits r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 } + cec8: [0-9a-f]* { revbits r5, r6 ; andi r15, r16, 5 ; st r25, r26 } + ced0: [0-9a-f]* { revbits r5, r6 ; xor r15, r16, r17 ; st r25, r26 } + ced8: [0-9a-f]* { revbits r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + cee0: [0-9a-f]* { revbits r5, r6 ; or r15, r16, r17 ; st2 r25, r26 } + cee8: [0-9a-f]* { revbits r5, r6 ; jr r15 ; st4 r25, r26 } + cef0: [0-9a-f]* { revbits r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 } + cef8: [0-9a-f]* { revbits r5, r6 ; v1cmpeq r15, r16, r17 } + cf00: [0-9a-f]* { revbits r5, r6 ; v2maxsi r15, r16, 5 } + cf08: [0-9a-f]* { revbits r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + cf10: [0-9a-f]* { revbytes r5, r6 ; addi r15, r16, 5 ; prefetch_l3 r25 } + cf18: [0-9a-f]* { revbytes r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + cf20: [0-9a-f]* { revbytes r5, r6 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + cf28: [0-9a-f]* { revbytes r5, r6 ; cmpeqi r15, r16, 5 ; st1 r25, r26 } + cf30: [0-9a-f]* { revbytes r5, r6 ; cmpleu r15, r16, r17 ; st1 r25, r26 } + cf38: [0-9a-f]* { revbytes r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + cf40: [0-9a-f]* { revbytes r5, r6 ; cmpne r15, r16, r17 } + cf48: [0-9a-f]* { revbytes r5, r6 ; ill ; ld1u r25, r26 } + cf50: [0-9a-f]* { revbytes r5, r6 ; jalr r15 ; ld1s r25, r26 } + cf58: [0-9a-f]* { revbytes r5, r6 ; jr r15 ; ld2s r25, r26 } + cf60: [0-9a-f]* { revbytes r5, r6 ; and r15, r16, r17 ; ld r25, r26 } + cf68: [0-9a-f]* { revbytes r5, r6 ; subx r15, r16, r17 ; ld r25, r26 } + cf70: [0-9a-f]* { revbytes r5, r6 ; shl3add r15, r16, r17 ; ld1s r25, r26 } + cf78: [0-9a-f]* { revbytes r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 } + cf80: [0-9a-f]* { revbytes r5, r6 ; jalrp r15 ; ld2s r25, r26 } + cf88: [0-9a-f]* { revbytes r5, r6 ; cmpleu r15, r16, r17 ; ld2u r25, r26 } + cf90: [0-9a-f]* { revbytes r5, r6 ; add r15, r16, r17 ; ld4s r25, r26 } + cf98: [0-9a-f]* { revbytes r5, r6 ; shrsi r15, r16, 5 ; ld4s r25, r26 } + cfa0: [0-9a-f]* { revbytes r5, r6 ; shl r15, r16, r17 ; ld4u r25, r26 } + cfa8: [0-9a-f]* { revbytes r5, r6 ; lnk r15 ; ld4u r25, r26 } + cfb0: [0-9a-f]* { revbytes r5, r6 ; move r15, r16 ; ld4u r25, r26 } + cfb8: [0-9a-f]* { revbytes r5, r6 ; mz r15, r16, r17 ; ld4u r25, r26 } + cfc0: [0-9a-f]* { revbytes r5, r6 ; nor r15, r16, r17 ; prefetch r25 } + cfc8: [0-9a-f]* { revbytes r5, r6 ; cmples r15, r16, r17 ; prefetch r25 } + cfd0: [0-9a-f]* { revbytes r5, r6 ; prefetch_add_l1_fault r15, 5 } + cfd8: [0-9a-f]* { revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 } + cfe0: [0-9a-f]* { revbytes r5, r6 ; nop ; prefetch_l1_fault r25 } + cfe8: [0-9a-f]* { revbytes r5, r6 ; jalrp r15 ; prefetch_l2 r25 } + cff0: [0-9a-f]* { revbytes r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + cff8: [0-9a-f]* { revbytes r5, r6 ; addx r15, r16, r17 ; prefetch_l3 r25 } + d000: [0-9a-f]* { revbytes r5, r6 ; shrui r15, r16, 5 ; prefetch_l3 r25 } + d008: [0-9a-f]* { revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 } + d010: [0-9a-f]* { revbytes r5, r6 ; rotli r15, r16, 5 ; prefetch r25 } + d018: [0-9a-f]* { revbytes r5, r6 ; shl1add r15, r16, r17 ; prefetch r25 } + d020: [0-9a-f]* { revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + d028: [0-9a-f]* { revbytes r5, r6 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + d030: [0-9a-f]* { revbytes r5, r6 ; shli r15, r16, 5 ; st r25, r26 } + d038: [0-9a-f]* { revbytes r5, r6 ; shrsi r15, r16, 5 ; st r25, r26 } + d040: [0-9a-f]* { revbytes r5, r6 ; shrui r15, r16, 5 ; st2 r25, r26 } + d048: [0-9a-f]* { revbytes r5, r6 ; shl2add r15, r16, r17 ; st r25, r26 } + d050: [0-9a-f]* { revbytes r5, r6 ; nop ; st1 r25, r26 } + d058: [0-9a-f]* { revbytes r5, r6 ; jalr r15 ; st2 r25, r26 } + d060: [0-9a-f]* { revbytes r5, r6 ; cmples r15, r16, r17 ; st4 r25, r26 } + d068: [0-9a-f]* { revbytes r5, r6 ; st_add r15, r16, 5 } + d070: [0-9a-f]* { revbytes r5, r6 ; subx r15, r16, r17 ; prefetch_l3 r25 } + d078: [0-9a-f]* { revbytes r5, r6 ; v2cmpeqi r15, r16, 5 } + d080: [0-9a-f]* { revbytes r5, r6 ; xor r15, r16, r17 ; ld r25, r26 } + d088: [0-9a-f]* { rotl r15, r16, r17 ; addi r5, r6, 5 ; ld1s r25, r26 } + d090: [0-9a-f]* { rotl r15, r16, r17 ; addxi r5, r6, 5 ; ld1u r25, r26 } + d098: [0-9a-f]* { rotl r15, r16, r17 ; andi r5, r6, 5 ; ld1u r25, r26 } + d0a0: [0-9a-f]* { cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 } + d0a8: [0-9a-f]* { rotl r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 } + d0b0: [0-9a-f]* { rotl r15, r16, r17 ; cmples r5, r6, r7 ; ld4s r25, r26 } + d0b8: [0-9a-f]* { rotl r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch r25 } + d0c0: [0-9a-f]* { rotl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + d0c8: [0-9a-f]* { ctz r5, r6 ; rotl r15, r16, r17 ; ld1s r25, r26 } + d0d0: [0-9a-f]* { rotl r15, r16, r17 ; prefetch_l2 r25 } + d0d8: [0-9a-f]* { rotl r15, r16, r17 ; info 19 ; ld4u r25, r26 } + d0e0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 } + d0e8: [0-9a-f]* { rotl r15, r16, r17 ; addxi r5, r6, 5 ; ld1s r25, r26 } + d0f0: [0-9a-f]* { rotl r15, r16, r17 ; shl r5, r6, r7 ; ld1s r25, r26 } + d0f8: [0-9a-f]* { rotl r15, r16, r17 ; info 19 ; ld1u r25, r26 } + d100: [0-9a-f]* { tblidxb3 r5, r6 ; rotl r15, r16, r17 ; ld1u r25, r26 } + d108: [0-9a-f]* { rotl r15, r16, r17 ; or r5, r6, r7 ; ld2s r25, r26 } + d110: [0-9a-f]* { rotl r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 } + d118: [0-9a-f]* { rotl r15, r16, r17 ; shrui r5, r6, 5 ; ld2u r25, r26 } + d120: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 } + d128: [0-9a-f]* { cmovnez r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 } + d130: [0-9a-f]* { rotl r15, r16, r17 ; shl3add r5, r6, r7 ; ld4u r25, r26 } + d138: [0-9a-f]* { rotl r15, r16, r17 ; move r5, r6 ; ld4s r25, r26 } + d140: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 } + d148: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 } + d150: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; ld2u r25, r26 } + d158: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 } + d160: [0-9a-f]* { mulax r5, r6, r7 ; rotl r15, r16, r17 ; ld1u r25, r26 } + d168: [0-9a-f]* { rotl r15, r16, r17 ; mz r5, r6, r7 ; ld2u r25, r26 } + d170: [0-9a-f]* { rotl r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 } + d178: [0-9a-f]* { pcnt r5, r6 ; rotl r15, r16, r17 ; prefetch r25 } + d180: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 } + d188: [0-9a-f]* { rotl r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 } + d190: [0-9a-f]* { rotl r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 } + d198: [0-9a-f]* { rotl r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + d1a0: [0-9a-f]* { rotl r15, r16, r17 ; prefetch_l1_fault r25 } + d1a8: [0-9a-f]* { revbits r5, r6 ; rotl r15, r16, r17 ; prefetch_l2 r25 } + d1b0: [0-9a-f]* { rotl r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 } + d1b8: [0-9a-f]* { rotl r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2_fault r25 } + d1c0: [0-9a-f]* { mulx r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l3 r25 } + d1c8: [0-9a-f]* { rotl r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 } + d1d0: [0-9a-f]* { rotl r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 } + d1d8: [0-9a-f]* { revbytes r5, r6 ; rotl r15, r16, r17 ; prefetch r25 } + d1e0: [0-9a-f]* { rotl r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l2 r25 } + d1e8: [0-9a-f]* { rotl r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 } + d1f0: [0-9a-f]* { rotl r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 } + d1f8: [0-9a-f]* { rotl r15, r16, r17 ; shl3add r5, r6, r7 ; st1 r25, r26 } + d200: [0-9a-f]* { rotl r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 } + d208: [0-9a-f]* { rotl r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 } + d210: [0-9a-f]* { rotl r15, r16, r17 ; shrux r5, r6, r7 } + d218: [0-9a-f]* { rotl r15, r16, r17 ; or r5, r6, r7 ; st r25, r26 } + d220: [0-9a-f]* { rotl r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 } + d228: [0-9a-f]* { rotl r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 } + d230: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 } + d238: [0-9a-f]* { cmovnez r5, r6, r7 ; rotl r15, r16, r17 ; st4 r25, r26 } + d240: [0-9a-f]* { rotl r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 } + d248: [0-9a-f]* { rotl r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 } + d250: [0-9a-f]* { tblidxb1 r5, r6 ; rotl r15, r16, r17 ; prefetch r25 } + d258: [0-9a-f]* { tblidxb3 r5, r6 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 } + d260: [0-9a-f]* { rotl r15, r16, r17 ; v1mnz r5, r6, r7 } + d268: [0-9a-f]* { v2mults r5, r6, r7 ; rotl r15, r16, r17 } + d270: [0-9a-f]* { rotl r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2_fault r25 } + d278: [0-9a-f]* { rotl r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3 r25 } + d280: [0-9a-f]* { rotl r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + d288: [0-9a-f]* { rotl r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + d290: [0-9a-f]* { rotl r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 } + d298: [0-9a-f]* { rotl r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 } + d2a0: [0-9a-f]* { rotl r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + d2a8: [0-9a-f]* { rotl r5, r6, r7 ; cmpne r15, r16, r17 } + d2b0: [0-9a-f]* { rotl r5, r6, r7 ; ill ; ld1u r25, r26 } + d2b8: [0-9a-f]* { rotl r5, r6, r7 ; jalr r15 ; ld1s r25, r26 } + d2c0: [0-9a-f]* { rotl r5, r6, r7 ; jr r15 ; ld2s r25, r26 } + d2c8: [0-9a-f]* { rotl r5, r6, r7 ; and r15, r16, r17 ; ld r25, r26 } + d2d0: [0-9a-f]* { rotl r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 } + d2d8: [0-9a-f]* { rotl r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 } + d2e0: [0-9a-f]* { rotl r5, r6, r7 ; nor r15, r16, r17 ; ld1u r25, r26 } + d2e8: [0-9a-f]* { rotl r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 } + d2f0: [0-9a-f]* { rotl r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 } + d2f8: [0-9a-f]* { rotl r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } + d300: [0-9a-f]* { rotl r5, r6, r7 ; shrsi r15, r16, 5 ; ld4s r25, r26 } + d308: [0-9a-f]* { rotl r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 } + d310: [0-9a-f]* { rotl r5, r6, r7 ; lnk r15 ; ld4u r25, r26 } + d318: [0-9a-f]* { rotl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 } + d320: [0-9a-f]* { rotl r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 } + d328: [0-9a-f]* { rotl r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + d330: [0-9a-f]* { rotl r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + d338: [0-9a-f]* { rotl r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + d340: [0-9a-f]* { rotl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 } + d348: [0-9a-f]* { rotl r5, r6, r7 ; nop ; prefetch_l1_fault r25 } + d350: [0-9a-f]* { rotl r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 } + d358: [0-9a-f]* { rotl r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + d360: [0-9a-f]* { rotl r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 } + d368: [0-9a-f]* { rotl r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 } + d370: [0-9a-f]* { rotl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 } + d378: [0-9a-f]* { rotl r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 } + d380: [0-9a-f]* { rotl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 } + d388: [0-9a-f]* { rotl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + d390: [0-9a-f]* { rotl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + d398: [0-9a-f]* { rotl r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + d3a0: [0-9a-f]* { rotl r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 } + d3a8: [0-9a-f]* { rotl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 } + d3b0: [0-9a-f]* { rotl r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + d3b8: [0-9a-f]* { rotl r5, r6, r7 ; nop ; st1 r25, r26 } + d3c0: [0-9a-f]* { rotl r5, r6, r7 ; jalr r15 ; st2 r25, r26 } + d3c8: [0-9a-f]* { rotl r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 } + d3d0: [0-9a-f]* { rotl r5, r6, r7 ; st_add r15, r16, 5 } + d3d8: [0-9a-f]* { rotl r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 } + d3e0: [0-9a-f]* { rotl r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + d3e8: [0-9a-f]* { rotl r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 } + d3f0: [0-9a-f]* { rotli r15, r16, 5 ; addi r5, r6, 5 ; ld1s r25, r26 } + d3f8: [0-9a-f]* { rotli r15, r16, 5 ; addxi r5, r6, 5 ; ld1u r25, r26 } + d400: [0-9a-f]* { rotli r15, r16, 5 ; andi r5, r6, 5 ; ld1u r25, r26 } + d408: [0-9a-f]* { cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 } + d410: [0-9a-f]* { rotli r15, r16, 5 ; cmpeq r5, r6, r7 ; ld2s r25, r26 } + d418: [0-9a-f]* { rotli r15, r16, 5 ; cmples r5, r6, r7 ; ld4s r25, r26 } + d420: [0-9a-f]* { rotli r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch r25 } + d428: [0-9a-f]* { rotli r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + d430: [0-9a-f]* { ctz r5, r6 ; rotli r15, r16, 5 ; ld1s r25, r26 } + d438: [0-9a-f]* { rotli r15, r16, 5 ; prefetch_l2 r25 } + d440: [0-9a-f]* { rotli r15, r16, 5 ; info 19 ; ld4u r25, r26 } + d448: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; ld r25, r26 } + d450: [0-9a-f]* { rotli r15, r16, 5 ; addxi r5, r6, 5 ; ld1s r25, r26 } + d458: [0-9a-f]* { rotli r15, r16, 5 ; shl r5, r6, r7 ; ld1s r25, r26 } + d460: [0-9a-f]* { rotli r15, r16, 5 ; info 19 ; ld1u r25, r26 } + d468: [0-9a-f]* { tblidxb3 r5, r6 ; rotli r15, r16, 5 ; ld1u r25, r26 } + d470: [0-9a-f]* { rotli r15, r16, 5 ; or r5, r6, r7 ; ld2s r25, r26 } + d478: [0-9a-f]* { rotli r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 } + d480: [0-9a-f]* { rotli r15, r16, 5 ; shrui r5, r6, 5 ; ld2u r25, r26 } + d488: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld4s r25, r26 } + d490: [0-9a-f]* { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; ld4u r25, r26 } + d498: [0-9a-f]* { rotli r15, r16, 5 ; shl3add r5, r6, r7 ; ld4u r25, r26 } + d4a0: [0-9a-f]* { rotli r15, r16, 5 ; move r5, r6 ; ld4s r25, r26 } + d4a8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; ld4u r25, r26 } + d4b0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 } + d4b8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 } + d4c0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 } + d4c8: [0-9a-f]* { mulax r5, r6, r7 ; rotli r15, r16, 5 ; ld1u r25, r26 } + d4d0: [0-9a-f]* { rotli r15, r16, 5 ; mz r5, r6, r7 ; ld2u r25, r26 } + d4d8: [0-9a-f]* { rotli r15, r16, 5 ; nor r5, r6, r7 ; ld4u r25, r26 } + d4e0: [0-9a-f]* { pcnt r5, r6 ; rotli r15, r16, 5 ; prefetch r25 } + d4e8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 } + d4f0: [0-9a-f]* { rotli r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 } + d4f8: [0-9a-f]* { rotli r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch r25 } + d500: [0-9a-f]* { rotli r15, r16, 5 ; move r5, r6 ; prefetch_l1_fault r25 } + d508: [0-9a-f]* { rotli r15, r16, 5 ; prefetch_l1_fault r25 } + d510: [0-9a-f]* { revbits r5, r6 ; rotli r15, r16, 5 ; prefetch_l2 r25 } + d518: [0-9a-f]* { rotli r15, r16, 5 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 } + d520: [0-9a-f]* { rotli r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l2_fault r25 } + d528: [0-9a-f]* { mulx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 } + d530: [0-9a-f]* { rotli r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 } + d538: [0-9a-f]* { rotli r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l3_fault r25 } + d540: [0-9a-f]* { revbytes r5, r6 ; rotli r15, r16, 5 ; prefetch r25 } + d548: [0-9a-f]* { rotli r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l2 r25 } + d550: [0-9a-f]* { rotli r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 } + d558: [0-9a-f]* { rotli r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 } + d560: [0-9a-f]* { rotli r15, r16, 5 ; shl3add r5, r6, r7 ; st1 r25, r26 } + d568: [0-9a-f]* { rotli r15, r16, 5 ; shli r5, r6, 5 ; st4 r25, r26 } + d570: [0-9a-f]* { rotli r15, r16, 5 ; shrsi r5, r6, 5 ; st4 r25, r26 } + d578: [0-9a-f]* { rotli r15, r16, 5 ; shrux r5, r6, r7 } + d580: [0-9a-f]* { rotli r15, r16, 5 ; or r5, r6, r7 ; st r25, r26 } + d588: [0-9a-f]* { rotli r15, r16, 5 ; cmpltsi r5, r6, 5 ; st1 r25, r26 } + d590: [0-9a-f]* { rotli r15, r16, 5 ; shrui r5, r6, 5 ; st1 r25, r26 } + d598: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 } + d5a0: [0-9a-f]* { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; st4 r25, r26 } + d5a8: [0-9a-f]* { rotli r15, r16, 5 ; shl3add r5, r6, r7 ; st4 r25, r26 } + d5b0: [0-9a-f]* { rotli r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 } + d5b8: [0-9a-f]* { tblidxb1 r5, r6 ; rotli r15, r16, 5 ; prefetch r25 } + d5c0: [0-9a-f]* { tblidxb3 r5, r6 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + d5c8: [0-9a-f]* { rotli r15, r16, 5 ; v1mnz r5, r6, r7 } + d5d0: [0-9a-f]* { v2mults r5, r6, r7 ; rotli r15, r16, 5 } + d5d8: [0-9a-f]* { rotli r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l2_fault r25 } + d5e0: [0-9a-f]* { rotli r5, r6, 5 ; addi r15, r16, 5 ; prefetch_l3 r25 } + d5e8: [0-9a-f]* { rotli r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + d5f0: [0-9a-f]* { rotli r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + d5f8: [0-9a-f]* { rotli r5, r6, 5 ; cmpeqi r15, r16, 5 ; st1 r25, r26 } + d600: [0-9a-f]* { rotli r5, r6, 5 ; cmpleu r15, r16, r17 ; st1 r25, r26 } + d608: [0-9a-f]* { rotli r5, r6, 5 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + d610: [0-9a-f]* { rotli r5, r6, 5 ; cmpne r15, r16, r17 } + d618: [0-9a-f]* { rotli r5, r6, 5 ; ill ; ld1u r25, r26 } + d620: [0-9a-f]* { rotli r5, r6, 5 ; jalr r15 ; ld1s r25, r26 } + d628: [0-9a-f]* { rotli r5, r6, 5 ; jr r15 ; ld2s r25, r26 } + d630: [0-9a-f]* { rotli r5, r6, 5 ; and r15, r16, r17 ; ld r25, r26 } + d638: [0-9a-f]* { rotli r5, r6, 5 ; subx r15, r16, r17 ; ld r25, r26 } + d640: [0-9a-f]* { rotli r5, r6, 5 ; shl3add r15, r16, r17 ; ld1s r25, r26 } + d648: [0-9a-f]* { rotli r5, r6, 5 ; nor r15, r16, r17 ; ld1u r25, r26 } + d650: [0-9a-f]* { rotli r5, r6, 5 ; jalrp r15 ; ld2s r25, r26 } + d658: [0-9a-f]* { rotli r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2u r25, r26 } + d660: [0-9a-f]* { rotli r5, r6, 5 ; add r15, r16, r17 ; ld4s r25, r26 } + d668: [0-9a-f]* { rotli r5, r6, 5 ; shrsi r15, r16, 5 ; ld4s r25, r26 } + d670: [0-9a-f]* { rotli r5, r6, 5 ; shl r15, r16, r17 ; ld4u r25, r26 } + d678: [0-9a-f]* { rotli r5, r6, 5 ; lnk r15 ; ld4u r25, r26 } + d680: [0-9a-f]* { rotli r5, r6, 5 ; move r15, r16 ; ld4u r25, r26 } + d688: [0-9a-f]* { rotli r5, r6, 5 ; mz r15, r16, r17 ; ld4u r25, r26 } + d690: [0-9a-f]* { rotli r5, r6, 5 ; nor r15, r16, r17 ; prefetch r25 } + d698: [0-9a-f]* { rotli r5, r6, 5 ; cmples r15, r16, r17 ; prefetch r25 } + d6a0: [0-9a-f]* { rotli r5, r6, 5 ; prefetch_add_l1_fault r15, 5 } + d6a8: [0-9a-f]* { rotli r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch r25 } + d6b0: [0-9a-f]* { rotli r5, r6, 5 ; nop ; prefetch_l1_fault r25 } + d6b8: [0-9a-f]* { rotli r5, r6, 5 ; jalrp r15 ; prefetch_l2 r25 } + d6c0: [0-9a-f]* { rotli r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + d6c8: [0-9a-f]* { rotli r5, r6, 5 ; addx r15, r16, r17 ; prefetch_l3 r25 } + d6d0: [0-9a-f]* { rotli r5, r6, 5 ; shrui r15, r16, 5 ; prefetch_l3 r25 } + d6d8: [0-9a-f]* { rotli r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 } + d6e0: [0-9a-f]* { rotli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch r25 } + d6e8: [0-9a-f]* { rotli r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch r25 } + d6f0: [0-9a-f]* { rotli r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + d6f8: [0-9a-f]* { rotli r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + d700: [0-9a-f]* { rotli r5, r6, 5 ; shli r15, r16, 5 ; st r25, r26 } + d708: [0-9a-f]* { rotli r5, r6, 5 ; shrsi r15, r16, 5 ; st r25, r26 } + d710: [0-9a-f]* { rotli r5, r6, 5 ; shrui r15, r16, 5 ; st2 r25, r26 } + d718: [0-9a-f]* { rotli r5, r6, 5 ; shl2add r15, r16, r17 ; st r25, r26 } + d720: [0-9a-f]* { rotli r5, r6, 5 ; nop ; st1 r25, r26 } + d728: [0-9a-f]* { rotli r5, r6, 5 ; jalr r15 ; st2 r25, r26 } + d730: [0-9a-f]* { rotli r5, r6, 5 ; cmples r15, r16, r17 ; st4 r25, r26 } + d738: [0-9a-f]* { rotli r5, r6, 5 ; st_add r15, r16, 5 } + d740: [0-9a-f]* { rotli r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l3 r25 } + d748: [0-9a-f]* { rotli r5, r6, 5 ; v2cmpeqi r15, r16, 5 } + d750: [0-9a-f]* { rotli r5, r6, 5 ; xor r15, r16, r17 ; ld r25, r26 } + d758: [0-9a-f]* { shl r15, r16, r17 ; addi r5, r6, 5 ; ld1s r25, r26 } + d760: [0-9a-f]* { shl r15, r16, r17 ; addxi r5, r6, 5 ; ld1u r25, r26 } + d768: [0-9a-f]* { shl r15, r16, r17 ; andi r5, r6, 5 ; ld1u r25, r26 } + d770: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 } + d778: [0-9a-f]* { shl r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 } + d780: [0-9a-f]* { shl r15, r16, r17 ; cmples r5, r6, r7 ; ld4s r25, r26 } + d788: [0-9a-f]* { shl r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch r25 } + d790: [0-9a-f]* { shl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + d798: [0-9a-f]* { ctz r5, r6 ; shl r15, r16, r17 ; ld1s r25, r26 } + d7a0: [0-9a-f]* { shl r15, r16, r17 ; prefetch_l2 r25 } + d7a8: [0-9a-f]* { shl r15, r16, r17 ; info 19 ; ld4u r25, r26 } + d7b0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 } + d7b8: [0-9a-f]* { shl r15, r16, r17 ; addxi r5, r6, 5 ; ld1s r25, r26 } + d7c0: [0-9a-f]* { shl r15, r16, r17 ; shl r5, r6, r7 ; ld1s r25, r26 } + d7c8: [0-9a-f]* { shl r15, r16, r17 ; info 19 ; ld1u r25, r26 } + d7d0: [0-9a-f]* { tblidxb3 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 } + d7d8: [0-9a-f]* { shl r15, r16, r17 ; or r5, r6, r7 ; ld2s r25, r26 } + d7e0: [0-9a-f]* { shl r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 } + d7e8: [0-9a-f]* { shl r15, r16, r17 ; shrui r5, r6, 5 ; ld2u r25, r26 } + d7f0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; ld4s r25, r26 } + d7f8: [0-9a-f]* { cmovnez r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 } + d800: [0-9a-f]* { shl r15, r16, r17 ; shl3add r5, r6, r7 ; ld4u r25, r26 } + d808: [0-9a-f]* { shl r15, r16, r17 ; move r5, r6 ; ld4s r25, r26 } + d810: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 } + d818: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 } + d820: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; ld2u r25, r26 } + d828: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 } + d830: [0-9a-f]* { mulax r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + d838: [0-9a-f]* { shl r15, r16, r17 ; mz r5, r6, r7 ; ld2u r25, r26 } + d840: [0-9a-f]* { shl r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 } + d848: [0-9a-f]* { pcnt r5, r6 ; shl r15, r16, r17 ; prefetch r25 } + d850: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + d858: [0-9a-f]* { shl r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 } + d860: [0-9a-f]* { shl r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 } + d868: [0-9a-f]* { shl r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + d870: [0-9a-f]* { shl r15, r16, r17 ; prefetch_l1_fault r25 } + d878: [0-9a-f]* { revbits r5, r6 ; shl r15, r16, r17 ; prefetch_l2 r25 } + d880: [0-9a-f]* { shl r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 } + d888: [0-9a-f]* { shl r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2_fault r25 } + d890: [0-9a-f]* { mulx r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l3 r25 } + d898: [0-9a-f]* { shl r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 } + d8a0: [0-9a-f]* { shl r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 } + d8a8: [0-9a-f]* { revbytes r5, r6 ; shl r15, r16, r17 ; prefetch r25 } + d8b0: [0-9a-f]* { shl r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l2 r25 } + d8b8: [0-9a-f]* { shl r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 } + d8c0: [0-9a-f]* { shl r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 } + d8c8: [0-9a-f]* { shl r15, r16, r17 ; shl3add r5, r6, r7 ; st1 r25, r26 } + d8d0: [0-9a-f]* { shl r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 } + d8d8: [0-9a-f]* { shl r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 } + d8e0: [0-9a-f]* { shl r15, r16, r17 ; shrux r5, r6, r7 } + d8e8: [0-9a-f]* { shl r15, r16, r17 ; or r5, r6, r7 ; st r25, r26 } + d8f0: [0-9a-f]* { shl r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 } + d8f8: [0-9a-f]* { shl r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 } + d900: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 } + d908: [0-9a-f]* { cmovnez r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 } + d910: [0-9a-f]* { shl r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 } + d918: [0-9a-f]* { shl r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 } + d920: [0-9a-f]* { tblidxb1 r5, r6 ; shl r15, r16, r17 ; prefetch r25 } + d928: [0-9a-f]* { tblidxb3 r5, r6 ; shl r15, r16, r17 ; prefetch_l1_fault r25 } + d930: [0-9a-f]* { shl r15, r16, r17 ; v1mnz r5, r6, r7 } + d938: [0-9a-f]* { v2mults r5, r6, r7 ; shl r15, r16, r17 } + d940: [0-9a-f]* { shl r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2_fault r25 } + d948: [0-9a-f]* { shl r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3 r25 } + d950: [0-9a-f]* { shl r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + d958: [0-9a-f]* { shl r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + d960: [0-9a-f]* { shl r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 } + d968: [0-9a-f]* { shl r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 } + d970: [0-9a-f]* { shl r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + d978: [0-9a-f]* { shl r5, r6, r7 ; cmpne r15, r16, r17 } + d980: [0-9a-f]* { shl r5, r6, r7 ; ill ; ld1u r25, r26 } + d988: [0-9a-f]* { shl r5, r6, r7 ; jalr r15 ; ld1s r25, r26 } + d990: [0-9a-f]* { shl r5, r6, r7 ; jr r15 ; ld2s r25, r26 } + d998: [0-9a-f]* { shl r5, r6, r7 ; and r15, r16, r17 ; ld r25, r26 } + d9a0: [0-9a-f]* { shl r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 } + d9a8: [0-9a-f]* { shl r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 } + d9b0: [0-9a-f]* { shl r5, r6, r7 ; nor r15, r16, r17 ; ld1u r25, r26 } + d9b8: [0-9a-f]* { shl r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 } + d9c0: [0-9a-f]* { shl r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 } + d9c8: [0-9a-f]* { shl r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } + d9d0: [0-9a-f]* { shl r5, r6, r7 ; shrsi r15, r16, 5 ; ld4s r25, r26 } + d9d8: [0-9a-f]* { shl r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 } + d9e0: [0-9a-f]* { shl r5, r6, r7 ; lnk r15 ; ld4u r25, r26 } + d9e8: [0-9a-f]* { shl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 } + d9f0: [0-9a-f]* { shl r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 } + d9f8: [0-9a-f]* { shl r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + da00: [0-9a-f]* { shl r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + da08: [0-9a-f]* { shl r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + da10: [0-9a-f]* { shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 } + da18: [0-9a-f]* { shl r5, r6, r7 ; nop ; prefetch_l1_fault r25 } + da20: [0-9a-f]* { shl r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 } + da28: [0-9a-f]* { shl r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + da30: [0-9a-f]* { shl r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 } + da38: [0-9a-f]* { shl r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 } + da40: [0-9a-f]* { shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 } + da48: [0-9a-f]* { shl r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 } + da50: [0-9a-f]* { shl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 } + da58: [0-9a-f]* { shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + da60: [0-9a-f]* { shl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + da68: [0-9a-f]* { shl r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + da70: [0-9a-f]* { shl r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 } + da78: [0-9a-f]* { shl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 } + da80: [0-9a-f]* { shl r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + da88: [0-9a-f]* { shl r5, r6, r7 ; nop ; st1 r25, r26 } + da90: [0-9a-f]* { shl r5, r6, r7 ; jalr r15 ; st2 r25, r26 } + da98: [0-9a-f]* { shl r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 } + daa0: [0-9a-f]* { shl r5, r6, r7 ; st_add r15, r16, 5 } + daa8: [0-9a-f]* { shl r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 } + dab0: [0-9a-f]* { shl r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + dab8: [0-9a-f]* { shl r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 } + dac0: [0-9a-f]* { shl16insli r15, r16, 4660 ; cmpltsi r5, r6, 5 } + dac8: [0-9a-f]* { shl16insli r15, r16, 4660 ; moveli r5, 4660 } + dad0: [0-9a-f]* { shl16insli r15, r16, 4660 ; shl3addx r5, r6, r7 } + dad8: [0-9a-f]* { v1dotpus r5, r6, r7 ; shl16insli r15, r16, 4660 } + dae0: [0-9a-f]* { shl16insli r15, r16, 4660 ; v2int_l r5, r6, r7 } + dae8: [0-9a-f]* { shl16insli r5, r6, 4660 ; addi r15, r16, 5 } + daf0: [0-9a-f]* { shl16insli r5, r6, 4660 ; infol 4660 } + daf8: [0-9a-f]* { shl16insli r5, r6, 4660 ; mnz r15, r16, r17 } + db00: [0-9a-f]* { shl16insli r5, r6, 4660 ; shrui r15, r16, 5 } + db08: [0-9a-f]* { shl16insli r5, r6, 4660 ; v1mnz r15, r16, r17 } + db10: [0-9a-f]* { shl16insli r5, r6, 4660 ; v2sub r15, r16, r17 } + db18: [0-9a-f]* { shl1add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + db20: [0-9a-f]* { shl1add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + db28: [0-9a-f]* { shl1add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + db30: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 } + db38: [0-9a-f]* { shl1add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + db40: [0-9a-f]* { shl1add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + db48: [0-9a-f]* { shl1add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + db50: [0-9a-f]* { shl1add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + db58: [0-9a-f]* { ctz r5, r6 ; shl1add r15, r16, r17 ; ld4s r25, r26 } + db60: [0-9a-f]* { shl1add r15, r16, r17 ; st r25, r26 } + db68: [0-9a-f]* { shl1add r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + db70: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 } + db78: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl1add r15, r16, r17 ; ld1s r25, r26 } + db80: [0-9a-f]* { shl1add r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 } + db88: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 } + db90: [0-9a-f]* { shl1add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + db98: [0-9a-f]* { shl1add r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + dba0: [0-9a-f]* { shl1add r15, r16, r17 ; ld2u r25, r26 } + dba8: [0-9a-f]* { tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; ld2u r25, r26 } + dbb0: [0-9a-f]* { shl1add r15, r16, r17 ; nop ; ld4s r25, r26 } + dbb8: [0-9a-f]* { shl1add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 } + dbc0: [0-9a-f]* { shl1add r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 } + dbc8: [0-9a-f]* { shl1add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + dbd0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } + dbd8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 } + dbe0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 } + dbe8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 } + dbf0: [0-9a-f]* { mulax r5, r6, r7 ; shl1add r15, r16, r17 ; ld4u r25, r26 } + dbf8: [0-9a-f]* { shl1add r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + dc00: [0-9a-f]* { shl1add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + dc08: [0-9a-f]* { pcnt r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 } + dc10: [0-9a-f]* { mulax r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 } + dc18: [0-9a-f]* { shl1add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + dc20: [0-9a-f]* { shl1add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + dc28: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 } + dc30: [0-9a-f]* { shl1add r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 } + dc38: [0-9a-f]* { shl1add r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 } + dc40: [0-9a-f]* { shl1add r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 } + dc48: [0-9a-f]* { tblidxb3 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 } + dc50: [0-9a-f]* { shl1add r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 } + dc58: [0-9a-f]* { shl1add r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 } + dc60: [0-9a-f]* { shl1add r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 } + dc68: [0-9a-f]* { revbytes r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + dc70: [0-9a-f]* { shl1add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + dc78: [0-9a-f]* { shl1add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + dc80: [0-9a-f]* { shl1add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + dc88: [0-9a-f]* { shl1add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + dc90: [0-9a-f]* { shl1add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + dc98: [0-9a-f]* { shl1add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + dca0: [0-9a-f]* { shl1add r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 } + dca8: [0-9a-f]* { shl1add r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 } + dcb0: [0-9a-f]* { shl1add r15, r16, r17 ; st1 r25, r26 } + dcb8: [0-9a-f]* { tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; st1 r25, r26 } + dcc0: [0-9a-f]* { shl1add r15, r16, r17 ; nop ; st2 r25, r26 } + dcc8: [0-9a-f]* { shl1add r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 } + dcd0: [0-9a-f]* { shl1add r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 } + dcd8: [0-9a-f]* { shl1add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + dce0: [0-9a-f]* { tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 } + dce8: [0-9a-f]* { tblidxb3 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 } + dcf0: [0-9a-f]* { shl1add r15, r16, r17 ; v1mz r5, r6, r7 } + dcf8: [0-9a-f]* { shl1add r15, r16, r17 ; v2packuc r5, r6, r7 } + dd00: [0-9a-f]* { shl1add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + dd08: [0-9a-f]* { shl1add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + dd10: [0-9a-f]* { shl1add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + dd18: [0-9a-f]* { shl1add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + dd20: [0-9a-f]* { shl1add r5, r6, r7 ; cmpexch r15, r16, r17 } + dd28: [0-9a-f]* { shl1add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + dd30: [0-9a-f]* { shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + dd38: [0-9a-f]* { shl1add r5, r6, r7 ; dtlbpr r15 } + dd40: [0-9a-f]* { shl1add r5, r6, r7 ; ill ; ld4u r25, r26 } + dd48: [0-9a-f]* { shl1add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + dd50: [0-9a-f]* { shl1add r5, r6, r7 ; jr r15 ; prefetch r25 } + dd58: [0-9a-f]* { shl1add r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 } + dd60: [0-9a-f]* { shl1add r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 } + dd68: [0-9a-f]* { shl1add r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 } + dd70: [0-9a-f]* { shl1add r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + dd78: [0-9a-f]* { shl1add r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 } + dd80: [0-9a-f]* { shl1add r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 } + dd88: [0-9a-f]* { shl1add r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + dd90: [0-9a-f]* { shl1add r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 } + dd98: [0-9a-f]* { shl1add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + dda0: [0-9a-f]* { shl1add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + dda8: [0-9a-f]* { shl1add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + ddb0: [0-9a-f]* { shl1add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + ddb8: [0-9a-f]* { shl1add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + ddc0: [0-9a-f]* { shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + ddc8: [0-9a-f]* { shl1add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + ddd0: [0-9a-f]* { shl1add r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + ddd8: [0-9a-f]* { shl1add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + dde0: [0-9a-f]* { shl1add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 } + dde8: [0-9a-f]* { shl1add r5, r6, r7 ; prefetch_l2_fault r25 } + ddf0: [0-9a-f]* { shl1add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + ddf8: [0-9a-f]* { shl1add r5, r6, r7 ; prefetch_l3 r25 } + de00: [0-9a-f]* { shl1add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 } + de08: [0-9a-f]* { shl1add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + de10: [0-9a-f]* { shl1add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + de18: [0-9a-f]* { shl1add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + de20: [0-9a-f]* { shl1add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + de28: [0-9a-f]* { shl1add r5, r6, r7 ; shli r15, r16, 5 } + de30: [0-9a-f]* { shl1add r5, r6, r7 ; shrsi r15, r16, 5 } + de38: [0-9a-f]* { shl1add r5, r6, r7 ; shruxi r15, r16, 5 } + de40: [0-9a-f]* { shl1add r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + de48: [0-9a-f]* { shl1add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 } + de50: [0-9a-f]* { shl1add r5, r6, r7 ; lnk r15 ; st2 r25, r26 } + de58: [0-9a-f]* { shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + de60: [0-9a-f]* { shl1add r5, r6, r7 ; stnt2 r15, r16 } + de68: [0-9a-f]* { shl1add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + de70: [0-9a-f]* { shl1add r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + de78: [0-9a-f]* { shl1add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + de80: [0-9a-f]* { shl1addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + de88: [0-9a-f]* { shl1addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + de90: [0-9a-f]* { shl1addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + de98: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4s r25, r26 } + dea0: [0-9a-f]* { shl1addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + dea8: [0-9a-f]* { shl1addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + deb0: [0-9a-f]* { shl1addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + deb8: [0-9a-f]* { shl1addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + dec0: [0-9a-f]* { ctz r5, r6 ; shl1addx r15, r16, r17 ; ld4s r25, r26 } + dec8: [0-9a-f]* { shl1addx r15, r16, r17 ; st r25, r26 } + ded0: [0-9a-f]* { shl1addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + ded8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + dee0: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + dee8: [0-9a-f]* { shl1addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 } + def0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } + def8: [0-9a-f]* { shl1addx r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + df00: [0-9a-f]* { shl1addx r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + df08: [0-9a-f]* { shl1addx r15, r16, r17 ; ld2u r25, r26 } + df10: [0-9a-f]* { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; ld2u r25, r26 } + df18: [0-9a-f]* { shl1addx r15, r16, r17 ; nop ; ld4s r25, r26 } + df20: [0-9a-f]* { shl1addx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 } + df28: [0-9a-f]* { shl1addx r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 } + df30: [0-9a-f]* { shl1addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + df38: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 } + df40: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 } + df48: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 } + df50: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4s r25, r26 } + df58: [0-9a-f]* { mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4u r25, r26 } + df60: [0-9a-f]* { shl1addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + df68: [0-9a-f]* { shl1addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + df70: [0-9a-f]* { pcnt r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 } + df78: [0-9a-f]* { mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 } + df80: [0-9a-f]* { shl1addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + df88: [0-9a-f]* { shl1addx r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + df90: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 } + df98: [0-9a-f]* { shl1addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 } + dfa0: [0-9a-f]* { shl1addx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 } + dfa8: [0-9a-f]* { shl1addx r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 } + dfb0: [0-9a-f]* { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 } + dfb8: [0-9a-f]* { shl1addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 } + dfc0: [0-9a-f]* { shl1addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 } + dfc8: [0-9a-f]* { shl1addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 } + dfd0: [0-9a-f]* { revbytes r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 } + dfd8: [0-9a-f]* { shl1addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + dfe0: [0-9a-f]* { shl1addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + dfe8: [0-9a-f]* { shl1addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + dff0: [0-9a-f]* { shl1addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + dff8: [0-9a-f]* { shl1addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + e000: [0-9a-f]* { shl1addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + e008: [0-9a-f]* { shl1addx r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 } + e010: [0-9a-f]* { shl1addx r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 } + e018: [0-9a-f]* { shl1addx r15, r16, r17 ; st1 r25, r26 } + e020: [0-9a-f]* { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; st1 r25, r26 } + e028: [0-9a-f]* { shl1addx r15, r16, r17 ; nop ; st2 r25, r26 } + e030: [0-9a-f]* { shl1addx r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 } + e038: [0-9a-f]* { shl1addx r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 } + e040: [0-9a-f]* { shl1addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + e048: [0-9a-f]* { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 } + e050: [0-9a-f]* { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 } + e058: [0-9a-f]* { shl1addx r15, r16, r17 ; v1mz r5, r6, r7 } + e060: [0-9a-f]* { shl1addx r15, r16, r17 ; v2packuc r5, r6, r7 } + e068: [0-9a-f]* { shl1addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + e070: [0-9a-f]* { shl1addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + e078: [0-9a-f]* { shl1addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + e080: [0-9a-f]* { shl1addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + e088: [0-9a-f]* { shl1addx r5, r6, r7 ; cmpexch r15, r16, r17 } + e090: [0-9a-f]* { shl1addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + e098: [0-9a-f]* { shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + e0a0: [0-9a-f]* { shl1addx r5, r6, r7 ; dtlbpr r15 } + e0a8: [0-9a-f]* { shl1addx r5, r6, r7 ; ill ; ld4u r25, r26 } + e0b0: [0-9a-f]* { shl1addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + e0b8: [0-9a-f]* { shl1addx r5, r6, r7 ; jr r15 ; prefetch r25 } + e0c0: [0-9a-f]* { shl1addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 } + e0c8: [0-9a-f]* { shl1addx r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 } + e0d0: [0-9a-f]* { shl1addx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 } + e0d8: [0-9a-f]* { shl1addx r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + e0e0: [0-9a-f]* { shl1addx r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 } + e0e8: [0-9a-f]* { shl1addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 } + e0f0: [0-9a-f]* { shl1addx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + e0f8: [0-9a-f]* { shl1addx r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 } + e100: [0-9a-f]* { shl1addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + e108: [0-9a-f]* { shl1addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + e110: [0-9a-f]* { shl1addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + e118: [0-9a-f]* { shl1addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + e120: [0-9a-f]* { shl1addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + e128: [0-9a-f]* { shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + e130: [0-9a-f]* { shl1addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + e138: [0-9a-f]* { shl1addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + e140: [0-9a-f]* { shl1addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + e148: [0-9a-f]* { shl1addx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 } + e150: [0-9a-f]* { shl1addx r5, r6, r7 ; prefetch_l2_fault r25 } + e158: [0-9a-f]* { shl1addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + e160: [0-9a-f]* { shl1addx r5, r6, r7 ; prefetch_l3 r25 } + e168: [0-9a-f]* { shl1addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 } + e170: [0-9a-f]* { shl1addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + e178: [0-9a-f]* { shl1addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + e180: [0-9a-f]* { shl1addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + e188: [0-9a-f]* { shl1addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + e190: [0-9a-f]* { shl1addx r5, r6, r7 ; shli r15, r16, 5 } + e198: [0-9a-f]* { shl1addx r5, r6, r7 ; shrsi r15, r16, 5 } + e1a0: [0-9a-f]* { shl1addx r5, r6, r7 ; shruxi r15, r16, 5 } + e1a8: [0-9a-f]* { shl1addx r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + e1b0: [0-9a-f]* { shl1addx r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 } + e1b8: [0-9a-f]* { shl1addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 } + e1c0: [0-9a-f]* { shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + e1c8: [0-9a-f]* { shl1addx r5, r6, r7 ; stnt2 r15, r16 } + e1d0: [0-9a-f]* { shl1addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + e1d8: [0-9a-f]* { shl1addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + e1e0: [0-9a-f]* { shl1addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + e1e8: [0-9a-f]* { shl2add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + e1f0: [0-9a-f]* { shl2add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + e1f8: [0-9a-f]* { shl2add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + e200: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; ld4s r25, r26 } + e208: [0-9a-f]* { shl2add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + e210: [0-9a-f]* { shl2add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + e218: [0-9a-f]* { shl2add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + e220: [0-9a-f]* { shl2add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + e228: [0-9a-f]* { ctz r5, r6 ; shl2add r15, r16, r17 ; ld4s r25, r26 } + e230: [0-9a-f]* { shl2add r15, r16, r17 ; st r25, r26 } + e238: [0-9a-f]* { shl2add r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + e240: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 } + e248: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 } + e250: [0-9a-f]* { shl2add r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 } + e258: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; ld1u r25, r26 } + e260: [0-9a-f]* { shl2add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + e268: [0-9a-f]* { shl2add r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + e270: [0-9a-f]* { shl2add r15, r16, r17 ; ld2u r25, r26 } + e278: [0-9a-f]* { tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; ld2u r25, r26 } + e280: [0-9a-f]* { shl2add r15, r16, r17 ; nop ; ld4s r25, r26 } + e288: [0-9a-f]* { shl2add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 } + e290: [0-9a-f]* { shl2add r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 } + e298: [0-9a-f]* { shl2add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + e2a0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + e2a8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 } + e2b0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 } + e2b8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; ld4s r25, r26 } + e2c0: [0-9a-f]* { mulax r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 } + e2c8: [0-9a-f]* { shl2add r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + e2d0: [0-9a-f]* { shl2add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + e2d8: [0-9a-f]* { pcnt r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 } + e2e0: [0-9a-f]* { mulax r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 } + e2e8: [0-9a-f]* { shl2add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + e2f0: [0-9a-f]* { shl2add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + e2f8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 } + e300: [0-9a-f]* { shl2add r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 } + e308: [0-9a-f]* { shl2add r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 } + e310: [0-9a-f]* { shl2add r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 } + e318: [0-9a-f]* { tblidxb3 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 } + e320: [0-9a-f]* { shl2add r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 } + e328: [0-9a-f]* { shl2add r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 } + e330: [0-9a-f]* { shl2add r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 } + e338: [0-9a-f]* { revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch_l3 r25 } + e340: [0-9a-f]* { shl2add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + e348: [0-9a-f]* { shl2add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + e350: [0-9a-f]* { shl2add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + e358: [0-9a-f]* { shl2add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + e360: [0-9a-f]* { shl2add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + e368: [0-9a-f]* { shl2add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + e370: [0-9a-f]* { shl2add r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 } + e378: [0-9a-f]* { shl2add r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 } + e380: [0-9a-f]* { shl2add r15, r16, r17 ; st1 r25, r26 } + e388: [0-9a-f]* { tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; st1 r25, r26 } + e390: [0-9a-f]* { shl2add r15, r16, r17 ; nop ; st2 r25, r26 } + e398: [0-9a-f]* { shl2add r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 } + e3a0: [0-9a-f]* { shl2add r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 } + e3a8: [0-9a-f]* { shl2add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + e3b0: [0-9a-f]* { tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 } + e3b8: [0-9a-f]* { tblidxb3 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 } + e3c0: [0-9a-f]* { shl2add r15, r16, r17 ; v1mz r5, r6, r7 } + e3c8: [0-9a-f]* { shl2add r15, r16, r17 ; v2packuc r5, r6, r7 } + e3d0: [0-9a-f]* { shl2add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + e3d8: [0-9a-f]* { shl2add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + e3e0: [0-9a-f]* { shl2add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + e3e8: [0-9a-f]* { shl2add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + e3f0: [0-9a-f]* { shl2add r5, r6, r7 ; cmpexch r15, r16, r17 } + e3f8: [0-9a-f]* { shl2add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + e400: [0-9a-f]* { shl2add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + e408: [0-9a-f]* { shl2add r5, r6, r7 ; dtlbpr r15 } + e410: [0-9a-f]* { shl2add r5, r6, r7 ; ill ; ld4u r25, r26 } + e418: [0-9a-f]* { shl2add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + e420: [0-9a-f]* { shl2add r5, r6, r7 ; jr r15 ; prefetch r25 } + e428: [0-9a-f]* { shl2add r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 } + e430: [0-9a-f]* { shl2add r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 } + e438: [0-9a-f]* { shl2add r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 } + e440: [0-9a-f]* { shl2add r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + e448: [0-9a-f]* { shl2add r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 } + e450: [0-9a-f]* { shl2add r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 } + e458: [0-9a-f]* { shl2add r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + e460: [0-9a-f]* { shl2add r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 } + e468: [0-9a-f]* { shl2add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + e470: [0-9a-f]* { shl2add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + e478: [0-9a-f]* { shl2add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + e480: [0-9a-f]* { shl2add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + e488: [0-9a-f]* { shl2add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + e490: [0-9a-f]* { shl2add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + e498: [0-9a-f]* { shl2add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + e4a0: [0-9a-f]* { shl2add r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + e4a8: [0-9a-f]* { shl2add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + e4b0: [0-9a-f]* { shl2add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 } + e4b8: [0-9a-f]* { shl2add r5, r6, r7 ; prefetch_l2_fault r25 } + e4c0: [0-9a-f]* { shl2add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + e4c8: [0-9a-f]* { shl2add r5, r6, r7 ; prefetch_l3 r25 } + e4d0: [0-9a-f]* { shl2add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 } + e4d8: [0-9a-f]* { shl2add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + e4e0: [0-9a-f]* { shl2add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + e4e8: [0-9a-f]* { shl2add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + e4f0: [0-9a-f]* { shl2add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + e4f8: [0-9a-f]* { shl2add r5, r6, r7 ; shli r15, r16, 5 } + e500: [0-9a-f]* { shl2add r5, r6, r7 ; shrsi r15, r16, 5 } + e508: [0-9a-f]* { shl2add r5, r6, r7 ; shruxi r15, r16, 5 } + e510: [0-9a-f]* { shl2add r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + e518: [0-9a-f]* { shl2add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 } + e520: [0-9a-f]* { shl2add r5, r6, r7 ; lnk r15 ; st2 r25, r26 } + e528: [0-9a-f]* { shl2add r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + e530: [0-9a-f]* { shl2add r5, r6, r7 ; stnt2 r15, r16 } + e538: [0-9a-f]* { shl2add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + e540: [0-9a-f]* { shl2add r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + e548: [0-9a-f]* { shl2add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + e550: [0-9a-f]* { shl2addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + e558: [0-9a-f]* { shl2addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + e560: [0-9a-f]* { shl2addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + e568: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + e570: [0-9a-f]* { shl2addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + e578: [0-9a-f]* { shl2addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + e580: [0-9a-f]* { shl2addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + e588: [0-9a-f]* { shl2addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + e590: [0-9a-f]* { ctz r5, r6 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + e598: [0-9a-f]* { shl2addx r15, r16, r17 ; st r25, r26 } + e5a0: [0-9a-f]* { shl2addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + e5a8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 } + e5b0: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 } + e5b8: [0-9a-f]* { shl2addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 } + e5c0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + e5c8: [0-9a-f]* { shl2addx r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + e5d0: [0-9a-f]* { shl2addx r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + e5d8: [0-9a-f]* { shl2addx r15, r16, r17 ; ld2u r25, r26 } + e5e0: [0-9a-f]* { tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; ld2u r25, r26 } + e5e8: [0-9a-f]* { shl2addx r15, r16, r17 ; nop ; ld4s r25, r26 } + e5f0: [0-9a-f]* { shl2addx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 } + e5f8: [0-9a-f]* { shl2addx r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 } + e600: [0-9a-f]* { shl2addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + e608: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 } + e610: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 } + e618: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 } + e620: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + e628: [0-9a-f]* { mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + e630: [0-9a-f]* { shl2addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + e638: [0-9a-f]* { shl2addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + e640: [0-9a-f]* { pcnt r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 } + e648: [0-9a-f]* { mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 } + e650: [0-9a-f]* { shl2addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + e658: [0-9a-f]* { shl2addx r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + e660: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 } + e668: [0-9a-f]* { shl2addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 } + e670: [0-9a-f]* { shl2addx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 } + e678: [0-9a-f]* { shl2addx r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 } + e680: [0-9a-f]* { tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 } + e688: [0-9a-f]* { shl2addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 } + e690: [0-9a-f]* { shl2addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 } + e698: [0-9a-f]* { shl2addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 } + e6a0: [0-9a-f]* { revbytes r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 } + e6a8: [0-9a-f]* { shl2addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + e6b0: [0-9a-f]* { shl2addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + e6b8: [0-9a-f]* { shl2addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + e6c0: [0-9a-f]* { shl2addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + e6c8: [0-9a-f]* { shl2addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + e6d0: [0-9a-f]* { shl2addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + e6d8: [0-9a-f]* { shl2addx r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 } + e6e0: [0-9a-f]* { shl2addx r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 } + e6e8: [0-9a-f]* { shl2addx r15, r16, r17 ; st1 r25, r26 } + e6f0: [0-9a-f]* { tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; st1 r25, r26 } + e6f8: [0-9a-f]* { shl2addx r15, r16, r17 ; nop ; st2 r25, r26 } + e700: [0-9a-f]* { shl2addx r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 } + e708: [0-9a-f]* { shl2addx r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 } + e710: [0-9a-f]* { shl2addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + e718: [0-9a-f]* { tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 } + e720: [0-9a-f]* { tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 } + e728: [0-9a-f]* { shl2addx r15, r16, r17 ; v1mz r5, r6, r7 } + e730: [0-9a-f]* { shl2addx r15, r16, r17 ; v2packuc r5, r6, r7 } + e738: [0-9a-f]* { shl2addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + e740: [0-9a-f]* { shl2addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + e748: [0-9a-f]* { shl2addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + e750: [0-9a-f]* { shl2addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + e758: [0-9a-f]* { shl2addx r5, r6, r7 ; cmpexch r15, r16, r17 } + e760: [0-9a-f]* { shl2addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + e768: [0-9a-f]* { shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + e770: [0-9a-f]* { shl2addx r5, r6, r7 ; dtlbpr r15 } + e778: [0-9a-f]* { shl2addx r5, r6, r7 ; ill ; ld4u r25, r26 } + e780: [0-9a-f]* { shl2addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + e788: [0-9a-f]* { shl2addx r5, r6, r7 ; jr r15 ; prefetch r25 } + e790: [0-9a-f]* { shl2addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 } + e798: [0-9a-f]* { shl2addx r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 } + e7a0: [0-9a-f]* { shl2addx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 } + e7a8: [0-9a-f]* { shl2addx r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + e7b0: [0-9a-f]* { shl2addx r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 } + e7b8: [0-9a-f]* { shl2addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 } + e7c0: [0-9a-f]* { shl2addx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + e7c8: [0-9a-f]* { shl2addx r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 } + e7d0: [0-9a-f]* { shl2addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + e7d8: [0-9a-f]* { shl2addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + e7e0: [0-9a-f]* { shl2addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + e7e8: [0-9a-f]* { shl2addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + e7f0: [0-9a-f]* { shl2addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + e7f8: [0-9a-f]* { shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + e800: [0-9a-f]* { shl2addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + e808: [0-9a-f]* { shl2addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + e810: [0-9a-f]* { shl2addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + e818: [0-9a-f]* { shl2addx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 } + e820: [0-9a-f]* { shl2addx r5, r6, r7 ; prefetch_l2_fault r25 } + e828: [0-9a-f]* { shl2addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + e830: [0-9a-f]* { shl2addx r5, r6, r7 ; prefetch_l3 r25 } + e838: [0-9a-f]* { shl2addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 } + e840: [0-9a-f]* { shl2addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + e848: [0-9a-f]* { shl2addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + e850: [0-9a-f]* { shl2addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + e858: [0-9a-f]* { shl2addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + e860: [0-9a-f]* { shl2addx r5, r6, r7 ; shli r15, r16, 5 } + e868: [0-9a-f]* { shl2addx r5, r6, r7 ; shrsi r15, r16, 5 } + e870: [0-9a-f]* { shl2addx r5, r6, r7 ; shruxi r15, r16, 5 } + e878: [0-9a-f]* { shl2addx r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + e880: [0-9a-f]* { shl2addx r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 } + e888: [0-9a-f]* { shl2addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 } + e890: [0-9a-f]* { shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + e898: [0-9a-f]* { shl2addx r5, r6, r7 ; stnt2 r15, r16 } + e8a0: [0-9a-f]* { shl2addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + e8a8: [0-9a-f]* { shl2addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + e8b0: [0-9a-f]* { shl2addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + e8b8: [0-9a-f]* { shl3add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + e8c0: [0-9a-f]* { shl3add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + e8c8: [0-9a-f]* { shl3add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + e8d0: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl3add r15, r16, r17 ; ld4s r25, r26 } + e8d8: [0-9a-f]* { shl3add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + e8e0: [0-9a-f]* { shl3add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + e8e8: [0-9a-f]* { shl3add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + e8f0: [0-9a-f]* { shl3add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + e8f8: [0-9a-f]* { ctz r5, r6 ; shl3add r15, r16, r17 ; ld4s r25, r26 } + e900: [0-9a-f]* { shl3add r15, r16, r17 ; st r25, r26 } + e908: [0-9a-f]* { shl3add r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + e910: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld r25, r26 } + e918: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 } + e920: [0-9a-f]* { shl3add r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 } + e928: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 } + e930: [0-9a-f]* { shl3add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + e938: [0-9a-f]* { shl3add r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + e940: [0-9a-f]* { shl3add r15, r16, r17 ; ld2u r25, r26 } + e948: [0-9a-f]* { tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; ld2u r25, r26 } + e950: [0-9a-f]* { shl3add r15, r16, r17 ; nop ; ld4s r25, r26 } + e958: [0-9a-f]* { shl3add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 } + e960: [0-9a-f]* { shl3add r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 } + e968: [0-9a-f]* { shl3add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + e970: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2 r25 } + e978: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 } + e980: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 } + e988: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld4s r25, r26 } + e990: [0-9a-f]* { mulax r5, r6, r7 ; shl3add r15, r16, r17 ; ld4u r25, r26 } + e998: [0-9a-f]* { shl3add r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + e9a0: [0-9a-f]* { shl3add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + e9a8: [0-9a-f]* { pcnt r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 } + e9b0: [0-9a-f]* { mulax r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 } + e9b8: [0-9a-f]* { shl3add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + e9c0: [0-9a-f]* { shl3add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + e9c8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 } + e9d0: [0-9a-f]* { shl3add r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 } + e9d8: [0-9a-f]* { shl3add r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 } + e9e0: [0-9a-f]* { shl3add r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 } + e9e8: [0-9a-f]* { tblidxb3 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 } + e9f0: [0-9a-f]* { shl3add r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 } + e9f8: [0-9a-f]* { shl3add r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 } + ea00: [0-9a-f]* { shl3add r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 } + ea08: [0-9a-f]* { revbytes r5, r6 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + ea10: [0-9a-f]* { shl3add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + ea18: [0-9a-f]* { shl3add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + ea20: [0-9a-f]* { shl3add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + ea28: [0-9a-f]* { shl3add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + ea30: [0-9a-f]* { shl3add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + ea38: [0-9a-f]* { shl3add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + ea40: [0-9a-f]* { shl3add r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 } + ea48: [0-9a-f]* { shl3add r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 } + ea50: [0-9a-f]* { shl3add r15, r16, r17 ; st1 r25, r26 } + ea58: [0-9a-f]* { tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; st1 r25, r26 } + ea60: [0-9a-f]* { shl3add r15, r16, r17 ; nop ; st2 r25, r26 } + ea68: [0-9a-f]* { shl3add r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 } + ea70: [0-9a-f]* { shl3add r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 } + ea78: [0-9a-f]* { shl3add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + ea80: [0-9a-f]* { tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 } + ea88: [0-9a-f]* { tblidxb3 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 } + ea90: [0-9a-f]* { shl3add r15, r16, r17 ; v1mz r5, r6, r7 } + ea98: [0-9a-f]* { shl3add r15, r16, r17 ; v2packuc r5, r6, r7 } + eaa0: [0-9a-f]* { shl3add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + eaa8: [0-9a-f]* { shl3add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + eab0: [0-9a-f]* { shl3add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + eab8: [0-9a-f]* { shl3add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + eac0: [0-9a-f]* { shl3add r5, r6, r7 ; cmpexch r15, r16, r17 } + eac8: [0-9a-f]* { shl3add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + ead0: [0-9a-f]* { shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + ead8: [0-9a-f]* { shl3add r5, r6, r7 ; dtlbpr r15 } + eae0: [0-9a-f]* { shl3add r5, r6, r7 ; ill ; ld4u r25, r26 } + eae8: [0-9a-f]* { shl3add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + eaf0: [0-9a-f]* { shl3add r5, r6, r7 ; jr r15 ; prefetch r25 } + eaf8: [0-9a-f]* { shl3add r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 } + eb00: [0-9a-f]* { shl3add r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 } + eb08: [0-9a-f]* { shl3add r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 } + eb10: [0-9a-f]* { shl3add r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + eb18: [0-9a-f]* { shl3add r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 } + eb20: [0-9a-f]* { shl3add r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 } + eb28: [0-9a-f]* { shl3add r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + eb30: [0-9a-f]* { shl3add r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 } + eb38: [0-9a-f]* { shl3add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + eb40: [0-9a-f]* { shl3add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + eb48: [0-9a-f]* { shl3add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + eb50: [0-9a-f]* { shl3add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + eb58: [0-9a-f]* { shl3add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + eb60: [0-9a-f]* { shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + eb68: [0-9a-f]* { shl3add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + eb70: [0-9a-f]* { shl3add r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + eb78: [0-9a-f]* { shl3add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + eb80: [0-9a-f]* { shl3add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 } + eb88: [0-9a-f]* { shl3add r5, r6, r7 ; prefetch_l2_fault r25 } + eb90: [0-9a-f]* { shl3add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + eb98: [0-9a-f]* { shl3add r5, r6, r7 ; prefetch_l3 r25 } + eba0: [0-9a-f]* { shl3add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 } + eba8: [0-9a-f]* { shl3add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + ebb0: [0-9a-f]* { shl3add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + ebb8: [0-9a-f]* { shl3add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + ebc0: [0-9a-f]* { shl3add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + ebc8: [0-9a-f]* { shl3add r5, r6, r7 ; shli r15, r16, 5 } + ebd0: [0-9a-f]* { shl3add r5, r6, r7 ; shrsi r15, r16, 5 } + ebd8: [0-9a-f]* { shl3add r5, r6, r7 ; shruxi r15, r16, 5 } + ebe0: [0-9a-f]* { shl3add r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + ebe8: [0-9a-f]* { shl3add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 } + ebf0: [0-9a-f]* { shl3add r5, r6, r7 ; lnk r15 ; st2 r25, r26 } + ebf8: [0-9a-f]* { shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + ec00: [0-9a-f]* { shl3add r5, r6, r7 ; stnt2 r15, r16 } + ec08: [0-9a-f]* { shl3add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + ec10: [0-9a-f]* { shl3add r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + ec18: [0-9a-f]* { shl3add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + ec20: [0-9a-f]* { shl3addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + ec28: [0-9a-f]* { shl3addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + ec30: [0-9a-f]* { shl3addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + ec38: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + ec40: [0-9a-f]* { shl3addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + ec48: [0-9a-f]* { shl3addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + ec50: [0-9a-f]* { shl3addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + ec58: [0-9a-f]* { shl3addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + ec60: [0-9a-f]* { ctz r5, r6 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + ec68: [0-9a-f]* { shl3addx r15, r16, r17 ; st r25, r26 } + ec70: [0-9a-f]* { shl3addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + ec78: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld r25, r26 } + ec80: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1s r25, r26 } + ec88: [0-9a-f]* { shl3addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 } + ec90: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + ec98: [0-9a-f]* { shl3addx r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + eca0: [0-9a-f]* { shl3addx r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + eca8: [0-9a-f]* { shl3addx r15, r16, r17 ; ld2u r25, r26 } + ecb0: [0-9a-f]* { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + ecb8: [0-9a-f]* { shl3addx r15, r16, r17 ; nop ; ld4s r25, r26 } + ecc0: [0-9a-f]* { shl3addx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 } + ecc8: [0-9a-f]* { shl3addx r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 } + ecd0: [0-9a-f]* { shl3addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + ecd8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 } + ece0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } + ece8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } + ecf0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + ecf8: [0-9a-f]* { mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } + ed00: [0-9a-f]* { shl3addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + ed08: [0-9a-f]* { shl3addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + ed10: [0-9a-f]* { pcnt r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 } + ed18: [0-9a-f]* { mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } + ed20: [0-9a-f]* { shl3addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + ed28: [0-9a-f]* { shl3addx r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + ed30: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 } + ed38: [0-9a-f]* { shl3addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 } + ed40: [0-9a-f]* { shl3addx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 } + ed48: [0-9a-f]* { shl3addx r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 } + ed50: [0-9a-f]* { tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 } + ed58: [0-9a-f]* { shl3addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 } + ed60: [0-9a-f]* { shl3addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 } + ed68: [0-9a-f]* { shl3addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 } + ed70: [0-9a-f]* { revbytes r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 } + ed78: [0-9a-f]* { shl3addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + ed80: [0-9a-f]* { shl3addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + ed88: [0-9a-f]* { shl3addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + ed90: [0-9a-f]* { shl3addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + ed98: [0-9a-f]* { shl3addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + eda0: [0-9a-f]* { shl3addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + eda8: [0-9a-f]* { shl3addx r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 } + edb0: [0-9a-f]* { shl3addx r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 } + edb8: [0-9a-f]* { shl3addx r15, r16, r17 ; st1 r25, r26 } + edc0: [0-9a-f]* { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + edc8: [0-9a-f]* { shl3addx r15, r16, r17 ; nop ; st2 r25, r26 } + edd0: [0-9a-f]* { shl3addx r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 } + edd8: [0-9a-f]* { shl3addx r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 } + ede0: [0-9a-f]* { shl3addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + ede8: [0-9a-f]* { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 } + edf0: [0-9a-f]* { tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 } + edf8: [0-9a-f]* { shl3addx r15, r16, r17 ; v1mz r5, r6, r7 } + ee00: [0-9a-f]* { shl3addx r15, r16, r17 ; v2packuc r5, r6, r7 } + ee08: [0-9a-f]* { shl3addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + ee10: [0-9a-f]* { shl3addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + ee18: [0-9a-f]* { shl3addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + ee20: [0-9a-f]* { shl3addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + ee28: [0-9a-f]* { shl3addx r5, r6, r7 ; cmpexch r15, r16, r17 } + ee30: [0-9a-f]* { shl3addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + ee38: [0-9a-f]* { shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + ee40: [0-9a-f]* { shl3addx r5, r6, r7 ; dtlbpr r15 } + ee48: [0-9a-f]* { shl3addx r5, r6, r7 ; ill ; ld4u r25, r26 } + ee50: [0-9a-f]* { shl3addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + ee58: [0-9a-f]* { shl3addx r5, r6, r7 ; jr r15 ; prefetch r25 } + ee60: [0-9a-f]* { shl3addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 } + ee68: [0-9a-f]* { shl3addx r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 } + ee70: [0-9a-f]* { shl3addx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 } + ee78: [0-9a-f]* { shl3addx r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + ee80: [0-9a-f]* { shl3addx r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 } + ee88: [0-9a-f]* { shl3addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 } + ee90: [0-9a-f]* { shl3addx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + ee98: [0-9a-f]* { shl3addx r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 } + eea0: [0-9a-f]* { shl3addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + eea8: [0-9a-f]* { shl3addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + eeb0: [0-9a-f]* { shl3addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + eeb8: [0-9a-f]* { shl3addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + eec0: [0-9a-f]* { shl3addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + eec8: [0-9a-f]* { shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + eed0: [0-9a-f]* { shl3addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + eed8: [0-9a-f]* { shl3addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + eee0: [0-9a-f]* { shl3addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + eee8: [0-9a-f]* { shl3addx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 } + eef0: [0-9a-f]* { shl3addx r5, r6, r7 ; prefetch_l2_fault r25 } + eef8: [0-9a-f]* { shl3addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + ef00: [0-9a-f]* { shl3addx r5, r6, r7 ; prefetch_l3 r25 } + ef08: [0-9a-f]* { shl3addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 } + ef10: [0-9a-f]* { shl3addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + ef18: [0-9a-f]* { shl3addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + ef20: [0-9a-f]* { shl3addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + ef28: [0-9a-f]* { shl3addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + ef30: [0-9a-f]* { shl3addx r5, r6, r7 ; shli r15, r16, 5 } + ef38: [0-9a-f]* { shl3addx r5, r6, r7 ; shrsi r15, r16, 5 } + ef40: [0-9a-f]* { shl3addx r5, r6, r7 ; shruxi r15, r16, 5 } + ef48: [0-9a-f]* { shl3addx r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + ef50: [0-9a-f]* { shl3addx r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 } + ef58: [0-9a-f]* { shl3addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 } + ef60: [0-9a-f]* { shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + ef68: [0-9a-f]* { shl3addx r5, r6, r7 ; stnt2 r15, r16 } + ef70: [0-9a-f]* { shl3addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + ef78: [0-9a-f]* { shl3addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + ef80: [0-9a-f]* { shl3addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + ef88: [0-9a-f]* { shli r15, r16, 5 ; addi r5, r6, 5 ; ld4s r25, r26 } + ef90: [0-9a-f]* { shli r15, r16, 5 ; addxi r5, r6, 5 ; ld4u r25, r26 } + ef98: [0-9a-f]* { shli r15, r16, 5 ; andi r5, r6, 5 ; ld4u r25, r26 } + efa0: [0-9a-f]* { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 } + efa8: [0-9a-f]* { shli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch r25 } + efb0: [0-9a-f]* { shli r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + efb8: [0-9a-f]* { shli r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + efc0: [0-9a-f]* { shli r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + efc8: [0-9a-f]* { ctz r5, r6 ; shli r15, r16, 5 ; ld4s r25, r26 } + efd0: [0-9a-f]* { shli r15, r16, 5 ; st r25, r26 } + efd8: [0-9a-f]* { shli r15, r16, 5 ; info 19 ; prefetch_l2 r25 } + efe0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; ld r25, r26 } + efe8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; ld1s r25, r26 } + eff0: [0-9a-f]* { shli r15, r16, 5 ; shl2addx r5, r6, r7 ; ld1s r25, r26 } + eff8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 } + f000: [0-9a-f]* { shli r15, r16, 5 ; addi r5, r6, 5 ; ld2s r25, r26 } + f008: [0-9a-f]* { shli r15, r16, 5 ; rotl r5, r6, r7 ; ld2s r25, r26 } + f010: [0-9a-f]* { shli r15, r16, 5 ; ld2u r25, r26 } + f018: [0-9a-f]* { tblidxb1 r5, r6 ; shli r15, r16, 5 ; ld2u r25, r26 } + f020: [0-9a-f]* { shli r15, r16, 5 ; nop ; ld4s r25, r26 } + f028: [0-9a-f]* { shli r15, r16, 5 ; cmpleu r5, r6, r7 ; ld4u r25, r26 } + f030: [0-9a-f]* { shli r15, r16, 5 ; shrsi r5, r6, 5 ; ld4u r25, r26 } + f038: [0-9a-f]* { shli r15, r16, 5 ; move r5, r6 ; prefetch_l1_fault r25 } + f040: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 } + f048: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + f050: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + f058: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 } + f060: [0-9a-f]* { mulax r5, r6, r7 ; shli r15, r16, 5 ; ld4u r25, r26 } + f068: [0-9a-f]* { shli r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 } + f070: [0-9a-f]* { shli r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l2 r25 } + f078: [0-9a-f]* { pcnt r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 } + f080: [0-9a-f]* { mulax r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + f088: [0-9a-f]* { shli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch r25 } + f090: [0-9a-f]* { shli r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 } + f098: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 } + f0a0: [0-9a-f]* { shli r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l2 r25 } + f0a8: [0-9a-f]* { shli r15, r16, 5 ; shl r5, r6, r7 ; prefetch_l2 r25 } + f0b0: [0-9a-f]* { shli r15, r16, 5 ; info 19 ; prefetch_l2_fault r25 } + f0b8: [0-9a-f]* { tblidxb3 r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 } + f0c0: [0-9a-f]* { shli r15, r16, 5 ; or r5, r6, r7 ; prefetch_l3 r25 } + f0c8: [0-9a-f]* { shli r15, r16, 5 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 } + f0d0: [0-9a-f]* { shli r15, r16, 5 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 } + f0d8: [0-9a-f]* { revbytes r5, r6 ; shli r15, r16, 5 ; prefetch_l3 r25 } + f0e0: [0-9a-f]* { shli r15, r16, 5 ; rotli r5, r6, 5 ; st r25, r26 } + f0e8: [0-9a-f]* { shli r15, r16, 5 ; shl1add r5, r6, r7 ; st1 r25, r26 } + f0f0: [0-9a-f]* { shli r15, r16, 5 ; shl2add r5, r6, r7 ; st4 r25, r26 } + f0f8: [0-9a-f]* { shli r15, r16, 5 ; shl3addx r5, r6, r7 ; ld r25, r26 } + f100: [0-9a-f]* { shli r15, r16, 5 ; shrs r5, r6, r7 ; ld r25, r26 } + f108: [0-9a-f]* { shli r15, r16, 5 ; shru r5, r6, r7 ; ld1u r25, r26 } + f110: [0-9a-f]* { shli r15, r16, 5 ; addi r5, r6, 5 ; st r25, r26 } + f118: [0-9a-f]* { shli r15, r16, 5 ; rotl r5, r6, r7 ; st r25, r26 } + f120: [0-9a-f]* { shli r15, r16, 5 ; st1 r25, r26 } + f128: [0-9a-f]* { tblidxb1 r5, r6 ; shli r15, r16, 5 ; st1 r25, r26 } + f130: [0-9a-f]* { shli r15, r16, 5 ; nop ; st2 r25, r26 } + f138: [0-9a-f]* { shli r15, r16, 5 ; cmpleu r5, r6, r7 ; st4 r25, r26 } + f140: [0-9a-f]* { shli r15, r16, 5 ; shrsi r5, r6, 5 ; st4 r25, r26 } + f148: [0-9a-f]* { shli r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l2 r25 } + f150: [0-9a-f]* { tblidxb1 r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 } + f158: [0-9a-f]* { tblidxb3 r5, r6 ; shli r15, r16, 5 ; prefetch_l3_fault r25 } + f160: [0-9a-f]* { shli r15, r16, 5 ; v1mz r5, r6, r7 } + f168: [0-9a-f]* { shli r15, r16, 5 ; v2packuc r5, r6, r7 } + f170: [0-9a-f]* { shli r15, r16, 5 ; xor r5, r6, r7 ; st1 r25, r26 } + f178: [0-9a-f]* { shli r5, r6, 5 ; addi r15, r16, 5 ; st2 r25, r26 } + f180: [0-9a-f]* { shli r5, r6, 5 ; addxi r15, r16, 5 ; st4 r25, r26 } + f188: [0-9a-f]* { shli r5, r6, 5 ; andi r15, r16, 5 ; st4 r25, r26 } + f190: [0-9a-f]* { shli r5, r6, 5 ; cmpexch r15, r16, r17 } + f198: [0-9a-f]* { shli r5, r6, 5 ; cmplts r15, r16, r17 ; ld r25, r26 } + f1a0: [0-9a-f]* { shli r5, r6, 5 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + f1a8: [0-9a-f]* { shli r5, r6, 5 ; dtlbpr r15 } + f1b0: [0-9a-f]* { shli r5, r6, 5 ; ill ; ld4u r25, r26 } + f1b8: [0-9a-f]* { shli r5, r6, 5 ; jalr r15 ; ld4s r25, r26 } + f1c0: [0-9a-f]* { shli r5, r6, 5 ; jr r15 ; prefetch r25 } + f1c8: [0-9a-f]* { shli r5, r6, 5 ; cmples r15, r16, r17 ; ld r25, r26 } + f1d0: [0-9a-f]* { shli r5, r6, 5 ; add r15, r16, r17 ; ld1s r25, r26 } + f1d8: [0-9a-f]* { shli r5, r6, 5 ; shrsi r15, r16, 5 ; ld1s r25, r26 } + f1e0: [0-9a-f]* { shli r5, r6, 5 ; shl r15, r16, r17 ; ld1u r25, r26 } + f1e8: [0-9a-f]* { shli r5, r6, 5 ; mnz r15, r16, r17 ; ld2s r25, r26 } + f1f0: [0-9a-f]* { shli r5, r6, 5 ; cmpne r15, r16, r17 ; ld2u r25, r26 } + f1f8: [0-9a-f]* { shli r5, r6, 5 ; and r15, r16, r17 ; ld4s r25, r26 } + f200: [0-9a-f]* { shli r5, r6, 5 ; subx r15, r16, r17 ; ld4s r25, r26 } + f208: [0-9a-f]* { shli r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + f210: [0-9a-f]* { shli r5, r6, 5 ; lnk r15 ; prefetch_l2 r25 } + f218: [0-9a-f]* { shli r5, r6, 5 ; move r15, r16 ; prefetch_l2 r25 } + f220: [0-9a-f]* { shli r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l2 r25 } + f228: [0-9a-f]* { shli r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l3 r25 } + f230: [0-9a-f]* { shli r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch r25 } + f238: [0-9a-f]* { shli r5, r6, 5 ; prefetch_add_l3_fault r15, 5 } + f240: [0-9a-f]* { shli r5, r6, 5 ; shli r15, r16, 5 ; prefetch r25 } + f248: [0-9a-f]* { shli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + f250: [0-9a-f]* { shli r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l2 r25 } + f258: [0-9a-f]* { shli r5, r6, 5 ; prefetch_l2_fault r25 } + f260: [0-9a-f]* { shli r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + f268: [0-9a-f]* { shli r5, r6, 5 ; prefetch_l3 r25 } + f270: [0-9a-f]* { shli r5, r6, 5 ; shli r15, r16, 5 ; prefetch_l3_fault r25 } + f278: [0-9a-f]* { shli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + f280: [0-9a-f]* { shli r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + f288: [0-9a-f]* { shli r5, r6, 5 ; shl2add r15, r16, r17 ; st r25, r26 } + f290: [0-9a-f]* { shli r5, r6, 5 ; shl3add r15, r16, r17 ; st2 r25, r26 } + f298: [0-9a-f]* { shli r5, r6, 5 ; shli r15, r16, 5 } + f2a0: [0-9a-f]* { shli r5, r6, 5 ; shrsi r15, r16, 5 } + f2a8: [0-9a-f]* { shli r5, r6, 5 ; shruxi r15, r16, 5 } + f2b0: [0-9a-f]* { shli r5, r6, 5 ; shli r15, r16, 5 ; st r25, r26 } + f2b8: [0-9a-f]* { shli r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 } + f2c0: [0-9a-f]* { shli r5, r6, 5 ; lnk r15 ; st2 r25, r26 } + f2c8: [0-9a-f]* { shli r5, r6, 5 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + f2d0: [0-9a-f]* { shli r5, r6, 5 ; stnt2 r15, r16 } + f2d8: [0-9a-f]* { shli r5, r6, 5 ; subx r15, r16, r17 ; st2 r25, r26 } + f2e0: [0-9a-f]* { shli r5, r6, 5 ; v2cmpltsi r15, r16, 5 } + f2e8: [0-9a-f]* { shli r5, r6, 5 ; xor r15, r16, r17 ; ld2u r25, r26 } + f2f0: [0-9a-f]* { cmul r5, r6, r7 ; shlx r15, r16, r17 } + f2f8: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; shlx r15, r16, r17 } + f300: [0-9a-f]* { shlx r15, r16, r17 ; shrs r5, r6, r7 } + f308: [0-9a-f]* { shlx r15, r16, r17 ; v1maxu r5, r6, r7 } + f310: [0-9a-f]* { shlx r15, r16, r17 ; v2minsi r5, r6, 5 } + f318: [0-9a-f]* { shlx r5, r6, r7 ; addxli r15, r16, 4660 } + f320: [0-9a-f]* { shlx r5, r6, r7 ; jalrp r15 } + f328: [0-9a-f]* { shlx r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 } + f330: [0-9a-f]* { shlx r5, r6, r7 ; st1 r15, r16 } + f338: [0-9a-f]* { shlx r5, r6, r7 ; v1shrs r15, r16, r17 } + f340: [0-9a-f]* { shlx r5, r6, r7 ; v4int_h r15, r16, r17 } + f348: [0-9a-f]* { cmulfr r5, r6, r7 ; shlxi r15, r16, 5 } + f350: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shlxi r15, r16, 5 } + f358: [0-9a-f]* { shlxi r15, r16, 5 ; shrux r5, r6, r7 } + f360: [0-9a-f]* { shlxi r15, r16, 5 ; v1mnz r5, r6, r7 } + f368: [0-9a-f]* { v2mults r5, r6, r7 ; shlxi r15, r16, 5 } + f370: [0-9a-f]* { shlxi r5, r6, 5 ; cmpeq r15, r16, r17 } + f378: [0-9a-f]* { shlxi r5, r6, 5 ; ld1s r15, r16 } + f380: [0-9a-f]* { shlxi r5, r6, 5 ; or r15, r16, r17 } + f388: [0-9a-f]* { shlxi r5, r6, 5 ; st4 r15, r16 } + f390: [0-9a-f]* { shlxi r5, r6, 5 ; v1sub r15, r16, r17 } + f398: [0-9a-f]* { shlxi r5, r6, 5 ; v4shlsc r15, r16, r17 } + f3a0: [0-9a-f]* { shrs r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 } + f3a8: [0-9a-f]* { shrs r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 } + f3b0: [0-9a-f]* { shrs r15, r16, r17 ; andi r5, r6, 5 ; st r25, r26 } + f3b8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 } + f3c0: [0-9a-f]* { shrs r15, r16, r17 ; cmpeq r5, r6, r7 ; st1 r25, r26 } + f3c8: [0-9a-f]* { shrs r15, r16, r17 ; cmples r5, r6, r7 ; st4 r25, r26 } + f3d0: [0-9a-f]* { shrs r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld r25, r26 } + f3d8: [0-9a-f]* { shrs r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + f3e0: [0-9a-f]* { ctz r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 } + f3e8: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; shrs r15, r16, r17 } + f3f0: [0-9a-f]* { shrs r15, r16, r17 ; info 19 } + f3f8: [0-9a-f]* { pcnt r5, r6 ; shrs r15, r16, r17 ; ld r25, r26 } + f400: [0-9a-f]* { shrs r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1s r25, r26 } + f408: [0-9a-f]* { shrs r15, r16, r17 ; sub r5, r6, r7 ; ld1s r25, r26 } + f410: [0-9a-f]* { mulax r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 } + f418: [0-9a-f]* { shrs r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 } + f420: [0-9a-f]* { shrs r15, r16, r17 ; shl3addx r5, r6, r7 ; ld2s r25, r26 } + f428: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + f430: [0-9a-f]* { shrs r15, r16, r17 ; addxi r5, r6, 5 ; ld4s r25, r26 } + f438: [0-9a-f]* { shrs r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 } + f440: [0-9a-f]* { shrs r15, r16, r17 ; info 19 ; ld4u r25, r26 } + f448: [0-9a-f]* { tblidxb3 r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 } + f450: [0-9a-f]* { shrs r15, r16, r17 ; move r5, r6 ; st4 r25, r26 } + f458: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shrs r15, r16, r17 } + f460: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 } + f468: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 } + f470: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 } + f478: [0-9a-f]* { mulax r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 } + f480: [0-9a-f]* { shrs r15, r16, r17 ; mz r5, r6, r7 ; st2 r25, r26 } + f488: [0-9a-f]* { shrs r15, r16, r17 ; nor r5, r6, r7 } + f490: [0-9a-f]* { shrs r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 } + f498: [0-9a-f]* { revbytes r5, r6 ; shrs r15, r16, r17 ; prefetch r25 } + f4a0: [0-9a-f]* { ctz r5, r6 ; shrs r15, r16, r17 ; prefetch r25 } + f4a8: [0-9a-f]* { tblidxb0 r5, r6 ; shrs r15, r16, r17 ; prefetch r25 } + f4b0: [0-9a-f]* { shrs r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1_fault r25 } + f4b8: [0-9a-f]* { shrs r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2 r25 } + f4c0: [0-9a-f]* { shrs r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 } + f4c8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 } + f4d0: [0-9a-f]* { shrs r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3 r25 } + f4d8: [0-9a-f]* { shrs r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 } + f4e0: [0-9a-f]* { shrs r15, r16, r17 ; move r5, r6 ; prefetch_l3_fault r25 } + f4e8: [0-9a-f]* { shrs r15, r16, r17 ; prefetch_l3_fault r25 } + f4f0: [0-9a-f]* { shrs r15, r16, r17 ; rotl r5, r6, r7 ; ld1s r25, r26 } + f4f8: [0-9a-f]* { shrs r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 } + f500: [0-9a-f]* { shrs r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2u r25, r26 } + f508: [0-9a-f]* { shrs r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 } + f510: [0-9a-f]* { shrs r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + f518: [0-9a-f]* { shrs r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } + f520: [0-9a-f]* { shrs r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 } + f528: [0-9a-f]* { shrs r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 } + f530: [0-9a-f]* { shrs r15, r16, r17 ; shl3addx r5, r6, r7 ; st r25, r26 } + f538: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 } + f540: [0-9a-f]* { shrs r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 } + f548: [0-9a-f]* { shrs r15, r16, r17 ; shl r5, r6, r7 ; st2 r25, r26 } + f550: [0-9a-f]* { shrs r15, r16, r17 ; info 19 ; st4 r25, r26 } + f558: [0-9a-f]* { tblidxb3 r5, r6 ; shrs r15, r16, r17 ; st4 r25, r26 } + f560: [0-9a-f]* { shrs r15, r16, r17 ; subx r5, r6, r7 } + f568: [0-9a-f]* { tblidxb2 r5, r6 ; shrs r15, r16, r17 ; ld r25, r26 } + f570: [0-9a-f]* { shrs r15, r16, r17 ; v1adduc r5, r6, r7 } + f578: [0-9a-f]* { shrs r15, r16, r17 ; v1shrui r5, r6, 5 } + f580: [0-9a-f]* { shrs r15, r16, r17 ; v2shrs r5, r6, r7 } + f588: [0-9a-f]* { shrs r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 } + f590: [0-9a-f]* { shrs r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 } + f598: [0-9a-f]* { shrs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 } + f5a0: [0-9a-f]* { shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + f5a8: [0-9a-f]* { shrs r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 } + f5b0: [0-9a-f]* { shrs r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + f5b8: [0-9a-f]* { shrs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 } + f5c0: [0-9a-f]* { shrs r5, r6, r7 ; fetchand4 r15, r16, r17 } + f5c8: [0-9a-f]* { shrs r5, r6, r7 ; ill ; st r25, r26 } + f5d0: [0-9a-f]* { shrs r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + f5d8: [0-9a-f]* { shrs r5, r6, r7 ; jr r15 ; st1 r25, r26 } + f5e0: [0-9a-f]* { shrs r5, r6, r7 ; info 19 ; ld r25, r26 } + f5e8: [0-9a-f]* { shrs r5, r6, r7 ; cmples r15, r16, r17 ; ld1s r25, r26 } + f5f0: [0-9a-f]* { shrs r5, r6, r7 ; ld1u r15, r16 } + f5f8: [0-9a-f]* { shrs r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 } + f600: [0-9a-f]* { shrs r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 } + f608: [0-9a-f]* { shrs r5, r6, r7 ; lnk r15 ; ld2u r25, r26 } + f610: [0-9a-f]* { shrs r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4s r25, r26 } + f618: [0-9a-f]* { shrs r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 } + f620: [0-9a-f]* { shrs r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + f628: [0-9a-f]* { shrs r5, r6, r7 ; lnk r15 } + f630: [0-9a-f]* { shrs r5, r6, r7 ; move r15, r16 } + f638: [0-9a-f]* { shrs r5, r6, r7 ; mz r15, r16, r17 } + f640: [0-9a-f]* { shrs r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 } + f648: [0-9a-f]* { shrs r5, r6, r7 ; jrp r15 ; prefetch r25 } + f650: [0-9a-f]* { shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } + f658: [0-9a-f]* { shrs r5, r6, r7 ; prefetch r25 } + f660: [0-9a-f]* { shrs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 } + f668: [0-9a-f]* { shrs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2 r25 } + f670: [0-9a-f]* { shrs r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 } + f678: [0-9a-f]* { shrs r5, r6, r7 ; prefetch_l3 r25 } + f680: [0-9a-f]* { shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + f688: [0-9a-f]* { shrs r5, r6, r7 ; prefetch_l3_fault r25 } + f690: [0-9a-f]* { shrs r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 } + f698: [0-9a-f]* { shrs r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + f6a0: [0-9a-f]* { shrs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 } + f6a8: [0-9a-f]* { shrs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + f6b0: [0-9a-f]* { shrs r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 } + f6b8: [0-9a-f]* { shrs r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 } + f6c0: [0-9a-f]* { shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 } + f6c8: [0-9a-f]* { shrs r5, r6, r7 ; st r25, r26 } + f6d0: [0-9a-f]* { shrs r5, r6, r7 ; shli r15, r16, 5 ; st1 r25, r26 } + f6d8: [0-9a-f]* { shrs r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 } + f6e0: [0-9a-f]* { shrs r5, r6, r7 ; jrp r15 ; st4 r25, r26 } + f6e8: [0-9a-f]* { shrs r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 } + f6f0: [0-9a-f]* { shrs r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + f6f8: [0-9a-f]* { shrs r5, r6, r7 ; v2mins r15, r16, r17 } + f700: [0-9a-f]* { shrs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 } + f708: [0-9a-f]* { shrsi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3_fault r25 } + f710: [0-9a-f]* { shrsi r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 } + f718: [0-9a-f]* { shrsi r15, r16, 5 ; andi r5, r6, 5 ; st r25, r26 } + f720: [0-9a-f]* { cmoveqz r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 } + f728: [0-9a-f]* { shrsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st1 r25, r26 } + f730: [0-9a-f]* { shrsi r15, r16, 5 ; cmples r5, r6, r7 ; st4 r25, r26 } + f738: [0-9a-f]* { shrsi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld r25, r26 } + f740: [0-9a-f]* { shrsi r15, r16, 5 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + f748: [0-9a-f]* { ctz r5, r6 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 } + f750: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; shrsi r15, r16, 5 } + f758: [0-9a-f]* { shrsi r15, r16, 5 ; info 19 } + f760: [0-9a-f]* { pcnt r5, r6 ; shrsi r15, r16, 5 ; ld r25, r26 } + f768: [0-9a-f]* { shrsi r15, r16, 5 ; cmpltu r5, r6, r7 ; ld1s r25, r26 } + f770: [0-9a-f]* { shrsi r15, r16, 5 ; sub r5, r6, r7 ; ld1s r25, r26 } + f778: [0-9a-f]* { mulax r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 } + f780: [0-9a-f]* { shrsi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld2s r25, r26 } + f788: [0-9a-f]* { shrsi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld2s r25, r26 } + f790: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 } + f798: [0-9a-f]* { shrsi r15, r16, 5 ; addxi r5, r6, 5 ; ld4s r25, r26 } + f7a0: [0-9a-f]* { shrsi r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 } + f7a8: [0-9a-f]* { shrsi r15, r16, 5 ; info 19 ; ld4u r25, r26 } + f7b0: [0-9a-f]* { tblidxb3 r5, r6 ; shrsi r15, r16, 5 ; ld4u r25, r26 } + f7b8: [0-9a-f]* { shrsi r15, r16, 5 ; move r5, r6 ; st4 r25, r26 } + f7c0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 } + f7c8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 } + f7d0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 } + f7d8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 } + f7e0: [0-9a-f]* { mulax r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 } + f7e8: [0-9a-f]* { shrsi r15, r16, 5 ; mz r5, r6, r7 ; st2 r25, r26 } + f7f0: [0-9a-f]* { shrsi r15, r16, 5 ; nor r5, r6, r7 } + f7f8: [0-9a-f]* { shrsi r15, r16, 5 ; add r5, r6, r7 ; prefetch r25 } + f800: [0-9a-f]* { revbytes r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 } + f808: [0-9a-f]* { ctz r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 } + f810: [0-9a-f]* { tblidxb0 r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 } + f818: [0-9a-f]* { shrsi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l1_fault r25 } + f820: [0-9a-f]* { shrsi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2 r25 } + f828: [0-9a-f]* { shrsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 } + f830: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2_fault r25 } + f838: [0-9a-f]* { shrsi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l3 r25 } + f840: [0-9a-f]* { shrsi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 } + f848: [0-9a-f]* { shrsi r15, r16, 5 ; move r5, r6 ; prefetch_l3_fault r25 } + f850: [0-9a-f]* { shrsi r15, r16, 5 ; prefetch_l3_fault r25 } + f858: [0-9a-f]* { shrsi r15, r16, 5 ; rotl r5, r6, r7 ; ld1s r25, r26 } + f860: [0-9a-f]* { shrsi r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 } + f868: [0-9a-f]* { shrsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2u r25, r26 } + f870: [0-9a-f]* { shrsi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4u r25, r26 } + f878: [0-9a-f]* { shrsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 } + f880: [0-9a-f]* { shrsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 } + f888: [0-9a-f]* { shrsi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 } + f890: [0-9a-f]* { shrsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st r25, r26 } + f898: [0-9a-f]* { shrsi r15, r16, 5 ; shl3addx r5, r6, r7 ; st r25, r26 } + f8a0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 } + f8a8: [0-9a-f]* { shrsi r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 } + f8b0: [0-9a-f]* { shrsi r15, r16, 5 ; shl r5, r6, r7 ; st2 r25, r26 } + f8b8: [0-9a-f]* { shrsi r15, r16, 5 ; info 19 ; st4 r25, r26 } + f8c0: [0-9a-f]* { tblidxb3 r5, r6 ; shrsi r15, r16, 5 ; st4 r25, r26 } + f8c8: [0-9a-f]* { shrsi r15, r16, 5 ; subx r5, r6, r7 } + f8d0: [0-9a-f]* { tblidxb2 r5, r6 ; shrsi r15, r16, 5 ; ld r25, r26 } + f8d8: [0-9a-f]* { shrsi r15, r16, 5 ; v1adduc r5, r6, r7 } + f8e0: [0-9a-f]* { shrsi r15, r16, 5 ; v1shrui r5, r6, 5 } + f8e8: [0-9a-f]* { shrsi r15, r16, 5 ; v2shrs r5, r6, r7 } + f8f0: [0-9a-f]* { shrsi r5, r6, 5 ; add r15, r16, r17 ; ld2s r25, r26 } + f8f8: [0-9a-f]* { shrsi r5, r6, 5 ; addx r15, r16, r17 ; ld2u r25, r26 } + f900: [0-9a-f]* { shrsi r5, r6, 5 ; and r15, r16, r17 ; ld2u r25, r26 } + f908: [0-9a-f]* { shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + f910: [0-9a-f]* { shrsi r5, r6, 5 ; cmples r15, r16, r17 ; ld4u r25, r26 } + f918: [0-9a-f]* { shrsi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 } + f920: [0-9a-f]* { shrsi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 } + f928: [0-9a-f]* { shrsi r5, r6, 5 ; fetchand4 r15, r16, r17 } + f930: [0-9a-f]* { shrsi r5, r6, 5 ; ill ; st r25, r26 } + f938: [0-9a-f]* { shrsi r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 } + f940: [0-9a-f]* { shrsi r5, r6, 5 ; jr r15 ; st1 r25, r26 } + f948: [0-9a-f]* { shrsi r5, r6, 5 ; info 19 ; ld r25, r26 } + f950: [0-9a-f]* { shrsi r5, r6, 5 ; cmples r15, r16, r17 ; ld1s r25, r26 } + f958: [0-9a-f]* { shrsi r5, r6, 5 ; ld1u r15, r16 } + f960: [0-9a-f]* { shrsi r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 } + f968: [0-9a-f]* { shrsi r5, r6, 5 ; rotli r15, r16, 5 ; ld2s r25, r26 } + f970: [0-9a-f]* { shrsi r5, r6, 5 ; lnk r15 ; ld2u r25, r26 } + f978: [0-9a-f]* { shrsi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 } + f980: [0-9a-f]* { shrsi r5, r6, 5 ; addxi r15, r16, 5 ; ld4u r25, r26 } + f988: [0-9a-f]* { shrsi r5, r6, 5 ; sub r15, r16, r17 ; ld4u r25, r26 } + f990: [0-9a-f]* { shrsi r5, r6, 5 ; lnk r15 } + f998: [0-9a-f]* { shrsi r5, r6, 5 ; move r15, r16 } + f9a0: [0-9a-f]* { shrsi r5, r6, 5 ; mz r15, r16, r17 } + f9a8: [0-9a-f]* { shrsi r5, r6, 5 ; or r15, r16, r17 ; ld1s r25, r26 } + f9b0: [0-9a-f]* { shrsi r5, r6, 5 ; jrp r15 ; prefetch r25 } + f9b8: [0-9a-f]* { shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch r25 } + f9c0: [0-9a-f]* { shrsi r5, r6, 5 ; prefetch r25 } + f9c8: [0-9a-f]* { shrsi r5, r6, 5 ; shli r15, r16, 5 ; prefetch_l1_fault r25 } + f9d0: [0-9a-f]* { shrsi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l2 r25 } + f9d8: [0-9a-f]* { shrsi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 } + f9e0: [0-9a-f]* { shrsi r5, r6, 5 ; prefetch_l3 r25 } + f9e8: [0-9a-f]* { shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + f9f0: [0-9a-f]* { shrsi r5, r6, 5 ; prefetch_l3_fault r25 } + f9f8: [0-9a-f]* { shrsi r5, r6, 5 ; shl r15, r16, r17 ; ld r25, r26 } + fa00: [0-9a-f]* { shrsi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + fa08: [0-9a-f]* { shrsi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld2s r25, r26 } + fa10: [0-9a-f]* { shrsi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + fa18: [0-9a-f]* { shrsi r5, r6, 5 ; shrs r15, r16, r17 ; ld4s r25, r26 } + fa20: [0-9a-f]* { shrsi r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 } + fa28: [0-9a-f]* { shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; st r25, r26 } + fa30: [0-9a-f]* { shrsi r5, r6, 5 ; st r25, r26 } + fa38: [0-9a-f]* { shrsi r5, r6, 5 ; shli r15, r16, 5 ; st1 r25, r26 } + fa40: [0-9a-f]* { shrsi r5, r6, 5 ; rotl r15, r16, r17 ; st2 r25, r26 } + fa48: [0-9a-f]* { shrsi r5, r6, 5 ; jrp r15 ; st4 r25, r26 } + fa50: [0-9a-f]* { shrsi r5, r6, 5 ; sub r15, r16, r17 ; ld2s r25, r26 } + fa58: [0-9a-f]* { shrsi r5, r6, 5 ; v1cmpeqi r15, r16, 5 } + fa60: [0-9a-f]* { shrsi r5, r6, 5 ; v2mins r15, r16, r17 } + fa68: [0-9a-f]* { shrsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 } + fa70: [0-9a-f]* { shru r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 } + fa78: [0-9a-f]* { shru r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 } + fa80: [0-9a-f]* { shru r15, r16, r17 ; andi r5, r6, 5 ; st r25, r26 } + fa88: [0-9a-f]* { cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l3_fault r25 } + fa90: [0-9a-f]* { shru r15, r16, r17 ; cmpeq r5, r6, r7 ; st1 r25, r26 } + fa98: [0-9a-f]* { shru r15, r16, r17 ; cmples r5, r6, r7 ; st4 r25, r26 } + faa0: [0-9a-f]* { shru r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld r25, r26 } + faa8: [0-9a-f]* { shru r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + fab0: [0-9a-f]* { ctz r5, r6 ; shru r15, r16, r17 ; prefetch_l3_fault r25 } + fab8: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; shru r15, r16, r17 } + fac0: [0-9a-f]* { shru r15, r16, r17 ; info 19 } + fac8: [0-9a-f]* { pcnt r5, r6 ; shru r15, r16, r17 ; ld r25, r26 } + fad0: [0-9a-f]* { shru r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1s r25, r26 } + fad8: [0-9a-f]* { shru r15, r16, r17 ; sub r5, r6, r7 ; ld1s r25, r26 } + fae0: [0-9a-f]* { mulax r5, r6, r7 ; shru r15, r16, r17 ; ld1u r25, r26 } + fae8: [0-9a-f]* { shru r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 } + faf0: [0-9a-f]* { shru r15, r16, r17 ; shl3addx r5, r6, r7 ; ld2s r25, r26 } + faf8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 } + fb00: [0-9a-f]* { shru r15, r16, r17 ; addxi r5, r6, 5 ; ld4s r25, r26 } + fb08: [0-9a-f]* { shru r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 } + fb10: [0-9a-f]* { shru r15, r16, r17 ; info 19 ; ld4u r25, r26 } + fb18: [0-9a-f]* { tblidxb3 r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 } + fb20: [0-9a-f]* { shru r15, r16, r17 ; move r5, r6 ; st4 r25, r26 } + fb28: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shru r15, r16, r17 } + fb30: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 } + fb38: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; st2 r25, r26 } + fb40: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l3_fault r25 } + fb48: [0-9a-f]* { mulax r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 } + fb50: [0-9a-f]* { shru r15, r16, r17 ; mz r5, r6, r7 ; st2 r25, r26 } + fb58: [0-9a-f]* { shru r15, r16, r17 ; nor r5, r6, r7 } + fb60: [0-9a-f]* { shru r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 } + fb68: [0-9a-f]* { revbytes r5, r6 ; shru r15, r16, r17 ; prefetch r25 } + fb70: [0-9a-f]* { ctz r5, r6 ; shru r15, r16, r17 ; prefetch r25 } + fb78: [0-9a-f]* { tblidxb0 r5, r6 ; shru r15, r16, r17 ; prefetch r25 } + fb80: [0-9a-f]* { shru r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1_fault r25 } + fb88: [0-9a-f]* { shru r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2 r25 } + fb90: [0-9a-f]* { shru r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 } + fb98: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2_fault r25 } + fba0: [0-9a-f]* { shru r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3 r25 } + fba8: [0-9a-f]* { shru r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 } + fbb0: [0-9a-f]* { shru r15, r16, r17 ; move r5, r6 ; prefetch_l3_fault r25 } + fbb8: [0-9a-f]* { shru r15, r16, r17 ; prefetch_l3_fault r25 } + fbc0: [0-9a-f]* { shru r15, r16, r17 ; rotl r5, r6, r7 ; ld1s r25, r26 } + fbc8: [0-9a-f]* { shru r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 } + fbd0: [0-9a-f]* { shru r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2u r25, r26 } + fbd8: [0-9a-f]* { shru r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 } + fbe0: [0-9a-f]* { shru r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + fbe8: [0-9a-f]* { shru r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } + fbf0: [0-9a-f]* { shru r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 } + fbf8: [0-9a-f]* { shru r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 } + fc00: [0-9a-f]* { shru r15, r16, r17 ; shl3addx r5, r6, r7 ; st r25, r26 } + fc08: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 } + fc10: [0-9a-f]* { shru r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 } + fc18: [0-9a-f]* { shru r15, r16, r17 ; shl r5, r6, r7 ; st2 r25, r26 } + fc20: [0-9a-f]* { shru r15, r16, r17 ; info 19 ; st4 r25, r26 } + fc28: [0-9a-f]* { tblidxb3 r5, r6 ; shru r15, r16, r17 ; st4 r25, r26 } + fc30: [0-9a-f]* { shru r15, r16, r17 ; subx r5, r6, r7 } + fc38: [0-9a-f]* { tblidxb2 r5, r6 ; shru r15, r16, r17 ; ld r25, r26 } + fc40: [0-9a-f]* { shru r15, r16, r17 ; v1adduc r5, r6, r7 } + fc48: [0-9a-f]* { shru r15, r16, r17 ; v1shrui r5, r6, 5 } + fc50: [0-9a-f]* { shru r15, r16, r17 ; v2shrs r5, r6, r7 } + fc58: [0-9a-f]* { shru r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 } + fc60: [0-9a-f]* { shru r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 } + fc68: [0-9a-f]* { shru r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 } + fc70: [0-9a-f]* { shru r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + fc78: [0-9a-f]* { shru r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 } + fc80: [0-9a-f]* { shru r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + fc88: [0-9a-f]* { shru r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 } + fc90: [0-9a-f]* { shru r5, r6, r7 ; fetchand4 r15, r16, r17 } + fc98: [0-9a-f]* { shru r5, r6, r7 ; ill ; st r25, r26 } + fca0: [0-9a-f]* { shru r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + fca8: [0-9a-f]* { shru r5, r6, r7 ; jr r15 ; st1 r25, r26 } + fcb0: [0-9a-f]* { shru r5, r6, r7 ; info 19 ; ld r25, r26 } + fcb8: [0-9a-f]* { shru r5, r6, r7 ; cmples r15, r16, r17 ; ld1s r25, r26 } + fcc0: [0-9a-f]* { shru r5, r6, r7 ; ld1u r15, r16 } + fcc8: [0-9a-f]* { shru r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 } + fcd0: [0-9a-f]* { shru r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 } + fcd8: [0-9a-f]* { shru r5, r6, r7 ; lnk r15 ; ld2u r25, r26 } + fce0: [0-9a-f]* { shru r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4s r25, r26 } + fce8: [0-9a-f]* { shru r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 } + fcf0: [0-9a-f]* { shru r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + fcf8: [0-9a-f]* { shru r5, r6, r7 ; lnk r15 } + fd00: [0-9a-f]* { shru r5, r6, r7 ; move r15, r16 } + fd08: [0-9a-f]* { shru r5, r6, r7 ; mz r15, r16, r17 } + fd10: [0-9a-f]* { shru r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 } + fd18: [0-9a-f]* { shru r5, r6, r7 ; jrp r15 ; prefetch r25 } + fd20: [0-9a-f]* { shru r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } + fd28: [0-9a-f]* { shru r5, r6, r7 ; prefetch r25 } + fd30: [0-9a-f]* { shru r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 } + fd38: [0-9a-f]* { shru r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2 r25 } + fd40: [0-9a-f]* { shru r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 } + fd48: [0-9a-f]* { shru r5, r6, r7 ; prefetch_l3 r25 } + fd50: [0-9a-f]* { shru r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + fd58: [0-9a-f]* { shru r5, r6, r7 ; prefetch_l3_fault r25 } + fd60: [0-9a-f]* { shru r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 } + fd68: [0-9a-f]* { shru r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + fd70: [0-9a-f]* { shru r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 } + fd78: [0-9a-f]* { shru r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + fd80: [0-9a-f]* { shru r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 } + fd88: [0-9a-f]* { shru r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 } + fd90: [0-9a-f]* { shru r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 } + fd98: [0-9a-f]* { shru r5, r6, r7 ; st r25, r26 } + fda0: [0-9a-f]* { shru r5, r6, r7 ; shli r15, r16, 5 ; st1 r25, r26 } + fda8: [0-9a-f]* { shru r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 } + fdb0: [0-9a-f]* { shru r5, r6, r7 ; jrp r15 ; st4 r25, r26 } + fdb8: [0-9a-f]* { shru r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 } + fdc0: [0-9a-f]* { shru r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + fdc8: [0-9a-f]* { shru r5, r6, r7 ; v2mins r15, r16, r17 } + fdd0: [0-9a-f]* { shru r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 } + fdd8: [0-9a-f]* { shrui r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3_fault r25 } + fde0: [0-9a-f]* { shrui r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 } + fde8: [0-9a-f]* { shrui r15, r16, 5 ; andi r5, r6, 5 ; st r25, r26 } + fdf0: [0-9a-f]* { cmoveqz r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 } + fdf8: [0-9a-f]* { shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; st1 r25, r26 } + fe00: [0-9a-f]* { shrui r15, r16, 5 ; cmples r5, r6, r7 ; st4 r25, r26 } + fe08: [0-9a-f]* { shrui r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld r25, r26 } + fe10: [0-9a-f]* { shrui r15, r16, 5 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + fe18: [0-9a-f]* { ctz r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 } + fe20: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; shrui r15, r16, 5 } + fe28: [0-9a-f]* { shrui r15, r16, 5 ; info 19 } + fe30: [0-9a-f]* { pcnt r5, r6 ; shrui r15, r16, 5 ; ld r25, r26 } + fe38: [0-9a-f]* { shrui r15, r16, 5 ; cmpltu r5, r6, r7 ; ld1s r25, r26 } + fe40: [0-9a-f]* { shrui r15, r16, 5 ; sub r5, r6, r7 ; ld1s r25, r26 } + fe48: [0-9a-f]* { mulax r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 } + fe50: [0-9a-f]* { shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; ld2s r25, r26 } + fe58: [0-9a-f]* { shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; ld2s r25, r26 } + fe60: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; ld2u r25, r26 } + fe68: [0-9a-f]* { shrui r15, r16, 5 ; addxi r5, r6, 5 ; ld4s r25, r26 } + fe70: [0-9a-f]* { shrui r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 } + fe78: [0-9a-f]* { shrui r15, r16, 5 ; info 19 ; ld4u r25, r26 } + fe80: [0-9a-f]* { tblidxb3 r5, r6 ; shrui r15, r16, 5 ; ld4u r25, r26 } + fe88: [0-9a-f]* { shrui r15, r16, 5 ; move r5, r6 ; st4 r25, r26 } + fe90: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 } + fe98: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 } + fea0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 } + fea8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 } + feb0: [0-9a-f]* { mulax r5, r6, r7 ; shrui r15, r16, 5 ; st r25, r26 } + feb8: [0-9a-f]* { shrui r15, r16, 5 ; mz r5, r6, r7 ; st2 r25, r26 } + fec0: [0-9a-f]* { shrui r15, r16, 5 ; nor r5, r6, r7 } + fec8: [0-9a-f]* { shrui r15, r16, 5 ; add r5, r6, r7 ; prefetch r25 } + fed0: [0-9a-f]* { revbytes r5, r6 ; shrui r15, r16, 5 ; prefetch r25 } + fed8: [0-9a-f]* { ctz r5, r6 ; shrui r15, r16, 5 ; prefetch r25 } + fee0: [0-9a-f]* { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; prefetch r25 } + fee8: [0-9a-f]* { shrui r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l1_fault r25 } + fef0: [0-9a-f]* { shrui r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2 r25 } + fef8: [0-9a-f]* { shrui r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 } + ff00: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 } + ff08: [0-9a-f]* { shrui r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l3 r25 } + ff10: [0-9a-f]* { shrui r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 } + ff18: [0-9a-f]* { shrui r15, r16, 5 ; move r5, r6 ; prefetch_l3_fault r25 } + ff20: [0-9a-f]* { shrui r15, r16, 5 ; prefetch_l3_fault r25 } + ff28: [0-9a-f]* { shrui r15, r16, 5 ; rotl r5, r6, r7 ; ld1s r25, r26 } + ff30: [0-9a-f]* { shrui r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 } + ff38: [0-9a-f]* { shrui r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2u r25, r26 } + ff40: [0-9a-f]* { shrui r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4u r25, r26 } + ff48: [0-9a-f]* { shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 } + ff50: [0-9a-f]* { shrui r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 } + ff58: [0-9a-f]* { shrui r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 } + ff60: [0-9a-f]* { shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; st r25, r26 } + ff68: [0-9a-f]* { shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; st r25, r26 } + ff70: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 } + ff78: [0-9a-f]* { shrui r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 } + ff80: [0-9a-f]* { shrui r15, r16, 5 ; shl r5, r6, r7 ; st2 r25, r26 } + ff88: [0-9a-f]* { shrui r15, r16, 5 ; info 19 ; st4 r25, r26 } + ff90: [0-9a-f]* { tblidxb3 r5, r6 ; shrui r15, r16, 5 ; st4 r25, r26 } + ff98: [0-9a-f]* { shrui r15, r16, 5 ; subx r5, r6, r7 } + ffa0: [0-9a-f]* { tblidxb2 r5, r6 ; shrui r15, r16, 5 ; ld r25, r26 } + ffa8: [0-9a-f]* { shrui r15, r16, 5 ; v1adduc r5, r6, r7 } + ffb0: [0-9a-f]* { shrui r15, r16, 5 ; v1shrui r5, r6, 5 } + ffb8: [0-9a-f]* { shrui r15, r16, 5 ; v2shrs r5, r6, r7 } + ffc0: [0-9a-f]* { shrui r5, r6, 5 ; add r15, r16, r17 ; ld2s r25, r26 } + ffc8: [0-9a-f]* { shrui r5, r6, 5 ; addx r15, r16, r17 ; ld2u r25, r26 } + ffd0: [0-9a-f]* { shrui r5, r6, 5 ; and r15, r16, r17 ; ld2u r25, r26 } + ffd8: [0-9a-f]* { shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + ffe0: [0-9a-f]* { shrui r5, r6, 5 ; cmples r15, r16, r17 ; ld4u r25, r26 } + ffe8: [0-9a-f]* { shrui r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 } + fff0: [0-9a-f]* { shrui r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 } + fff8: [0-9a-f]* { shrui r5, r6, 5 ; fetchand4 r15, r16, r17 } + 10000: [0-9a-f]* { shrui r5, r6, 5 ; ill ; st r25, r26 } + 10008: [0-9a-f]* { shrui r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 } + 10010: [0-9a-f]* { shrui r5, r6, 5 ; jr r15 ; st1 r25, r26 } + 10018: [0-9a-f]* { shrui r5, r6, 5 ; info 19 ; ld r25, r26 } + 10020: [0-9a-f]* { shrui r5, r6, 5 ; cmples r15, r16, r17 ; ld1s r25, r26 } + 10028: [0-9a-f]* { shrui r5, r6, 5 ; ld1u r15, r16 } + 10030: [0-9a-f]* { shrui r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 } + 10038: [0-9a-f]* { shrui r5, r6, 5 ; rotli r15, r16, 5 ; ld2s r25, r26 } + 10040: [0-9a-f]* { shrui r5, r6, 5 ; lnk r15 ; ld2u r25, r26 } + 10048: [0-9a-f]* { shrui r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 } + 10050: [0-9a-f]* { shrui r5, r6, 5 ; addxi r15, r16, 5 ; ld4u r25, r26 } + 10058: [0-9a-f]* { shrui r5, r6, 5 ; sub r15, r16, r17 ; ld4u r25, r26 } + 10060: [0-9a-f]* { shrui r5, r6, 5 ; lnk r15 } + 10068: [0-9a-f]* { shrui r5, r6, 5 ; move r15, r16 } + 10070: [0-9a-f]* { shrui r5, r6, 5 ; mz r15, r16, r17 } + 10078: [0-9a-f]* { shrui r5, r6, 5 ; or r15, r16, r17 ; ld1s r25, r26 } + 10080: [0-9a-f]* { shrui r5, r6, 5 ; jrp r15 ; prefetch r25 } + 10088: [0-9a-f]* { shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch r25 } + 10090: [0-9a-f]* { shrui r5, r6, 5 ; prefetch r25 } + 10098: [0-9a-f]* { shrui r5, r6, 5 ; shli r15, r16, 5 ; prefetch_l1_fault r25 } + 100a0: [0-9a-f]* { shrui r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l2 r25 } + 100a8: [0-9a-f]* { shrui r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 } + 100b0: [0-9a-f]* { shrui r5, r6, 5 ; prefetch_l3 r25 } + 100b8: [0-9a-f]* { shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + 100c0: [0-9a-f]* { shrui r5, r6, 5 ; prefetch_l3_fault r25 } + 100c8: [0-9a-f]* { shrui r5, r6, 5 ; shl r15, r16, r17 ; ld r25, r26 } + 100d0: [0-9a-f]* { shrui r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + 100d8: [0-9a-f]* { shrui r5, r6, 5 ; shl2addx r15, r16, r17 ; ld2s r25, r26 } + 100e0: [0-9a-f]* { shrui r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + 100e8: [0-9a-f]* { shrui r5, r6, 5 ; shrs r15, r16, r17 ; ld4s r25, r26 } + 100f0: [0-9a-f]* { shrui r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 } + 100f8: [0-9a-f]* { shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; st r25, r26 } + 10100: [0-9a-f]* { shrui r5, r6, 5 ; st r25, r26 } + 10108: [0-9a-f]* { shrui r5, r6, 5 ; shli r15, r16, 5 ; st1 r25, r26 } + 10110: [0-9a-f]* { shrui r5, r6, 5 ; rotl r15, r16, r17 ; st2 r25, r26 } + 10118: [0-9a-f]* { shrui r5, r6, 5 ; jrp r15 ; st4 r25, r26 } + 10120: [0-9a-f]* { shrui r5, r6, 5 ; sub r15, r16, r17 ; ld2s r25, r26 } + 10128: [0-9a-f]* { shrui r5, r6, 5 ; v1cmpeqi r15, r16, 5 } + 10130: [0-9a-f]* { shrui r5, r6, 5 ; v2mins r15, r16, r17 } + 10138: [0-9a-f]* { shrui r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 } + 10140: [0-9a-f]* { crc32_8 r5, r6, r7 ; shrux r15, r16, r17 } + 10148: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; shrux r15, r16, r17 } + 10150: [0-9a-f]* { shrux r15, r16, r17 ; subx r5, r6, r7 } + 10158: [0-9a-f]* { shrux r15, r16, r17 ; v1mz r5, r6, r7 } + 10160: [0-9a-f]* { shrux r15, r16, r17 ; v2packuc r5, r6, r7 } + 10168: [0-9a-f]* { shrux r5, r6, r7 ; cmples r15, r16, r17 } + 10170: [0-9a-f]* { shrux r5, r6, r7 ; ld2s r15, r16 } + 10178: [0-9a-f]* { shrux r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + 10180: [0-9a-f]* { shrux r5, r6, r7 ; stnt1 r15, r16 } + 10188: [0-9a-f]* { shrux r5, r6, r7 ; v2addsc r15, r16, r17 } + 10190: [0-9a-f]* { shrux r5, r6, r7 ; v4subsc r15, r16, r17 } + 10198: [0-9a-f]* { shruxi r15, r16, 5 ; dblalign4 r5, r6, r7 } + 101a0: [0-9a-f]* { mula_hu_ls r5, r6, r7 ; shruxi r15, r16, 5 } + 101a8: [0-9a-f]* { tblidxb2 r5, r6 ; shruxi r15, r16, 5 } + 101b0: [0-9a-f]* { shruxi r15, r16, 5 ; v1shli r5, r6, 5 } + 101b8: [0-9a-f]* { v2sadu r5, r6, r7 ; shruxi r15, r16, 5 } + 101c0: [0-9a-f]* { shruxi r5, r6, 5 ; cmpltu r15, r16, r17 } + 101c8: [0-9a-f]* { shruxi r5, r6, 5 ; ld4s r15, r16 } + 101d0: [0-9a-f]* { shruxi r5, r6, 5 ; prefetch_add_l3_fault r15, 5 } + 101d8: [0-9a-f]* { shruxi r5, r6, 5 ; stnt4 r15, r16 } + 101e0: [0-9a-f]* { shruxi r5, r6, 5 ; v2cmpleu r15, r16, r17 } + 101e8: [0-9a-f]* { shufflebytes r5, r6, r7 ; add r15, r16, r17 } + 101f0: [0-9a-f]* { shufflebytes r5, r6, r7 ; info 19 } + 101f8: [0-9a-f]* { shufflebytes r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 10200: [0-9a-f]* { shufflebytes r5, r6, r7 ; shru r15, r16, r17 } + 10208: [0-9a-f]* { shufflebytes r5, r6, r7 ; v1minui r15, r16, 5 } + 10210: [0-9a-f]* { shufflebytes r5, r6, r7 ; v2shrui r15, r16, 5 } + 10218: [0-9a-f]* { cmpne r5, r6, r7 ; st r15, r16 } + 10220: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; st r15, r16 } + 10228: [0-9a-f]* { shlxi r5, r6, 5 ; st r15, r16 } + 10230: [0-9a-f]* { v1int_l r5, r6, r7 ; st r15, r16 } + 10238: [0-9a-f]* { v2mins r5, r6, r7 ; st r15, r16 } + 10240: [0-9a-f]* { add r15, r16, r17 ; and r5, r6, r7 ; st r25, r26 } + 10248: [0-9a-f]* { add r15, r16, r17 ; shl1add r5, r6, r7 ; st r25, r26 } + 10250: [0-9a-f]* { add r5, r6, r7 ; lnk r15 ; st r25, r26 } + 10258: [0-9a-f]* { addi r15, r16, 5 ; cmpltsi r5, r6, 5 ; st r25, r26 } + 10260: [0-9a-f]* { addi r15, r16, 5 ; shrui r5, r6, 5 ; st r25, r26 } + 10268: [0-9a-f]* { addi r5, r6, 5 ; shl r15, r16, r17 ; st r25, r26 } + 10270: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; st r25, r26 } + 10278: [0-9a-f]* { addx r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 } + 10280: [0-9a-f]* { addx r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 } + 10288: [0-9a-f]* { addxi r15, r16, 5 ; mz r5, r6, r7 ; st r25, r26 } + 10290: [0-9a-f]* { addxi r5, r6, 5 ; cmpltsi r15, r16, 5 ; st r25, r26 } + 10298: [0-9a-f]* { and r15, r16, r17 ; and r5, r6, r7 ; st r25, r26 } + 102a0: [0-9a-f]* { and r15, r16, r17 ; shl1add r5, r6, r7 ; st r25, r26 } + 102a8: [0-9a-f]* { and r5, r6, r7 ; lnk r15 ; st r25, r26 } + 102b0: [0-9a-f]* { andi r15, r16, 5 ; cmpltsi r5, r6, 5 ; st r25, r26 } + 102b8: [0-9a-f]* { andi r15, r16, 5 ; shrui r5, r6, 5 ; st r25, r26 } + 102c0: [0-9a-f]* { andi r5, r6, 5 ; shl r15, r16, r17 ; st r25, r26 } + 102c8: [0-9a-f]* { clz r5, r6 ; movei r15, 5 ; st r25, r26 } + 102d0: [0-9a-f]* { cmoveqz r5, r6, r7 ; jalr r15 ; st r25, r26 } + 102d8: [0-9a-f]* { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 } + 102e0: [0-9a-f]* { cmpeq r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 } + 102e8: [0-9a-f]* { cmpeq r15, r16, r17 ; shl r5, r6, r7 ; st r25, r26 } + 102f0: [0-9a-f]* { cmpeq r5, r6, r7 ; jrp r15 ; st r25, r26 } + 102f8: [0-9a-f]* { cmpeqi r15, r16, 5 ; cmplts r5, r6, r7 ; st r25, r26 } + 10300: [0-9a-f]* { cmpeqi r15, r16, 5 ; shru r5, r6, r7 ; st r25, r26 } + 10308: [0-9a-f]* { cmpeqi r5, r6, 5 ; rotli r15, r16, 5 ; st r25, r26 } + 10310: [0-9a-f]* { cmples r15, r16, r17 ; movei r5, 5 ; st r25, r26 } + 10318: [0-9a-f]* { cmples r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 } + 10320: [0-9a-f]* { cmples r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 } + 10328: [0-9a-f]* { mulx r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 } + 10330: [0-9a-f]* { cmpleu r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 } + 10338: [0-9a-f]* { cmplts r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 } + 10340: [0-9a-f]* { cmplts r15, r16, r17 ; shl r5, r6, r7 ; st r25, r26 } + 10348: [0-9a-f]* { cmplts r5, r6, r7 ; jrp r15 ; st r25, r26 } + 10350: [0-9a-f]* { cmpltsi r15, r16, 5 ; cmplts r5, r6, r7 ; st r25, r26 } + 10358: [0-9a-f]* { cmpltsi r15, r16, 5 ; shru r5, r6, r7 ; st r25, r26 } + 10360: [0-9a-f]* { cmpltsi r5, r6, 5 ; rotli r15, r16, 5 ; st r25, r26 } + 10368: [0-9a-f]* { cmpltu r15, r16, r17 ; movei r5, 5 ; st r25, r26 } + 10370: [0-9a-f]* { cmpltu r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 } + 10378: [0-9a-f]* { cmpltu r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 } + 10380: [0-9a-f]* { mulx r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 } + 10388: [0-9a-f]* { cmpne r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 } + 10390: [0-9a-f]* { ctz r5, r6 ; addxi r15, r16, 5 ; st r25, r26 } + 10398: [0-9a-f]* { ctz r5, r6 ; sub r15, r16, r17 ; st r25, r26 } + 103a0: [0-9a-f]* { jalr r15 ; st r25, r26 } + 103a8: [0-9a-f]* { shl1addx r5, r6, r7 ; st r25, r26 } + 103b0: [0-9a-f]* { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; st r25, r26 } + 103b8: [0-9a-f]* { addxi r5, r6, 5 ; ill ; st r25, r26 } + 103c0: [0-9a-f]* { shl r5, r6, r7 ; ill ; st r25, r26 } + 103c8: [0-9a-f]* { info 19 ; cmples r5, r6, r7 ; st r25, r26 } + 103d0: [0-9a-f]* { info 19 ; nor r15, r16, r17 ; st r25, r26 } + 103d8: [0-9a-f]* { tblidxb1 r5, r6 ; info 19 ; st r25, r26 } + 103e0: [0-9a-f]* { mz r5, r6, r7 ; jalr r15 ; st r25, r26 } + 103e8: [0-9a-f]* { cmples r5, r6, r7 ; jalrp r15 ; st r25, r26 } + 103f0: [0-9a-f]* { shrs r5, r6, r7 ; jalrp r15 ; st r25, r26 } + 103f8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jr r15 ; st r25, r26 } + 10400: [0-9a-f]* { andi r5, r6, 5 ; jrp r15 ; st r25, r26 } + 10408: [0-9a-f]* { shl1addx r5, r6, r7 ; jrp r15 ; st r25, r26 } + 10410: [0-9a-f]* { move r5, r6 ; lnk r15 ; st r25, r26 } + 10418: [0-9a-f]* { lnk r15 ; st r25, r26 } + 10420: [0-9a-f]* { revbits r5, r6 ; mnz r15, r16, r17 ; st r25, r26 } + 10428: [0-9a-f]* { mnz r5, r6, r7 ; info 19 ; st r25, r26 } + 10430: [0-9a-f]* { move r15, r16 ; cmpeq r5, r6, r7 ; st r25, r26 } + 10438: [0-9a-f]* { move r15, r16 ; shl3addx r5, r6, r7 ; st r25, r26 } + 10440: [0-9a-f]* { move r5, r6 ; nop ; st r25, r26 } + 10448: [0-9a-f]* { fsingle_pack1 r5, r6 ; movei r15, 5 ; st r25, r26 } + 10450: [0-9a-f]* { tblidxb2 r5, r6 ; movei r15, 5 ; st r25, r26 } + 10458: [0-9a-f]* { movei r5, 5 ; shl3add r15, r16, r17 ; st r25, r26 } + 10460: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 } + 10468: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; st r25, r26 } + 10470: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; ill ; st r25, r26 } + 10478: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 } + 10480: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 } + 10488: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 } + 10490: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + 10498: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; st r25, r26 } + 104a0: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; jrp r15 ; st r25, r26 } + 104a8: [0-9a-f]* { mulax r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 } + 104b0: [0-9a-f]* { mulx r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 } + 104b8: [0-9a-f]* { mulx r5, r6, r7 ; st r25, r26 } + 104c0: [0-9a-f]* { revbits r5, r6 ; mz r15, r16, r17 ; st r25, r26 } + 104c8: [0-9a-f]* { mz r5, r6, r7 ; info 19 ; st r25, r26 } + 104d0: [0-9a-f]* { nop ; and r5, r6, r7 ; st r25, r26 } + 104d8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; nop ; st r25, r26 } + 104e0: [0-9a-f]* { nop ; shrsi r15, r16, 5 ; st r25, r26 } + 104e8: [0-9a-f]* { nor r15, r16, r17 ; movei r5, 5 ; st r25, r26 } + 104f0: [0-9a-f]* { nor r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 } + 104f8: [0-9a-f]* { nor r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 } + 10500: [0-9a-f]* { mulx r5, r6, r7 ; or r15, r16, r17 ; st r25, r26 } + 10508: [0-9a-f]* { or r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 } + 10510: [0-9a-f]* { pcnt r5, r6 ; addxi r15, r16, 5 ; st r25, r26 } + 10518: [0-9a-f]* { pcnt r5, r6 ; sub r15, r16, r17 ; st r25, r26 } + 10520: [0-9a-f]* { revbits r5, r6 ; shl3add r15, r16, r17 ; st r25, r26 } + 10528: [0-9a-f]* { revbytes r5, r6 ; rotl r15, r16, r17 ; st r25, r26 } + 10530: [0-9a-f]* { rotl r15, r16, r17 ; move r5, r6 ; st r25, r26 } + 10538: [0-9a-f]* { rotl r15, r16, r17 ; st r25, r26 } + 10540: [0-9a-f]* { rotl r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 } + 10548: [0-9a-f]* { mulax r5, r6, r7 ; rotli r15, r16, 5 ; st r25, r26 } + 10550: [0-9a-f]* { rotli r5, r6, 5 ; cmpleu r15, r16, r17 ; st r25, r26 } + 10558: [0-9a-f]* { shl r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 } + 10560: [0-9a-f]* { shl r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + 10568: [0-9a-f]* { shl r5, r6, r7 ; jr r15 ; st r25, r26 } + 10570: [0-9a-f]* { shl1add r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 } + 10578: [0-9a-f]* { shl1add r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 } + 10580: [0-9a-f]* { shl1add r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 } + 10588: [0-9a-f]* { shl1addx r15, r16, r17 ; move r5, r6 ; st r25, r26 } + 10590: [0-9a-f]* { shl1addx r15, r16, r17 ; st r25, r26 } + 10598: [0-9a-f]* { shl1addx r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 } + 105a0: [0-9a-f]* { mulax r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + 105a8: [0-9a-f]* { shl2add r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 } + 105b0: [0-9a-f]* { shl2addx r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 } + 105b8: [0-9a-f]* { shl2addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + 105c0: [0-9a-f]* { shl2addx r5, r6, r7 ; jr r15 ; st r25, r26 } + 105c8: [0-9a-f]* { shl3add r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 } + 105d0: [0-9a-f]* { shl3add r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 } + 105d8: [0-9a-f]* { shl3add r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 } + 105e0: [0-9a-f]* { shl3addx r15, r16, r17 ; move r5, r6 ; st r25, r26 } + 105e8: [0-9a-f]* { shl3addx r15, r16, r17 ; st r25, r26 } + 105f0: [0-9a-f]* { shl3addx r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 } + 105f8: [0-9a-f]* { mulax r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + 10600: [0-9a-f]* { shli r5, r6, 5 ; cmpleu r15, r16, r17 ; st r25, r26 } + 10608: [0-9a-f]* { shrs r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 } + 10610: [0-9a-f]* { shrs r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + 10618: [0-9a-f]* { shrs r5, r6, r7 ; jr r15 ; st r25, r26 } + 10620: [0-9a-f]* { shrsi r15, r16, 5 ; cmpleu r5, r6, r7 ; st r25, r26 } + 10628: [0-9a-f]* { shrsi r15, r16, 5 ; shrsi r5, r6, 5 ; st r25, r26 } + 10630: [0-9a-f]* { shrsi r5, r6, 5 ; rotl r15, r16, r17 ; st r25, r26 } + 10638: [0-9a-f]* { shru r15, r16, r17 ; move r5, r6 ; st r25, r26 } + 10640: [0-9a-f]* { shru r15, r16, r17 ; st r25, r26 } + 10648: [0-9a-f]* { shru r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 } + 10650: [0-9a-f]* { mulax r5, r6, r7 ; shrui r15, r16, 5 ; st r25, r26 } + 10658: [0-9a-f]* { shrui r5, r6, 5 ; cmpleu r15, r16, r17 ; st r25, r26 } + 10660: [0-9a-f]* { sub r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 } + 10668: [0-9a-f]* { sub r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + 10670: [0-9a-f]* { sub r5, r6, r7 ; jr r15 ; st r25, r26 } + 10678: [0-9a-f]* { subx r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 } + 10680: [0-9a-f]* { subx r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 } + 10688: [0-9a-f]* { subx r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 } + 10690: [0-9a-f]* { tblidxb0 r5, r6 ; mnz r15, r16, r17 ; st r25, r26 } + 10698: [0-9a-f]* { tblidxb1 r5, r6 ; ill ; st r25, r26 } + 106a0: [0-9a-f]* { tblidxb2 r5, r6 ; cmples r15, r16, r17 ; st r25, r26 } + 106a8: [0-9a-f]* { tblidxb3 r5, r6 ; addi r15, r16, 5 ; st r25, r26 } + 106b0: [0-9a-f]* { tblidxb3 r5, r6 ; shru r15, r16, r17 ; st r25, r26 } + 106b8: [0-9a-f]* { xor r15, r16, r17 ; mz r5, r6, r7 ; st r25, r26 } + 106c0: [0-9a-f]* { xor r5, r6, r7 ; cmpltsi r15, r16, 5 ; st r25, r26 } + 106c8: [0-9a-f]* { addxi r5, r6, 5 ; st1 r15, r16 } + 106d0: [0-9a-f]* { fdouble_unpack_max r5, r6, r7 ; st1 r15, r16 } + 106d8: [0-9a-f]* { nop ; st1 r15, r16 } + 106e0: [0-9a-f]* { v1cmpeqi r5, r6, 5 ; st1 r15, r16 } + 106e8: [0-9a-f]* { v2addi r5, r6, 5 ; st1 r15, r16 } + 106f0: [0-9a-f]* { v2sub r5, r6, r7 ; st1 r15, r16 } + 106f8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 } + 10700: [0-9a-f]* { add r5, r6, r7 ; addx r15, r16, r17 ; st1 r25, r26 } + 10708: [0-9a-f]* { add r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 } + 10710: [0-9a-f]* { addi r15, r16, 5 ; nop ; st1 r25, r26 } + 10718: [0-9a-f]* { addi r5, r6, 5 ; cmpltu r15, r16, r17 ; st1 r25, r26 } + 10720: [0-9a-f]* { addx r15, r16, r17 ; andi r5, r6, 5 ; st1 r25, r26 } + 10728: [0-9a-f]* { addx r15, r16, r17 ; shl1addx r5, r6, r7 ; st1 r25, r26 } + 10730: [0-9a-f]* { addx r5, r6, r7 ; mnz r15, r16, r17 ; st1 r25, r26 } + 10738: [0-9a-f]* { addxi r15, r16, 5 ; cmpltu r5, r6, r7 ; st1 r25, r26 } + 10740: [0-9a-f]* { addxi r15, r16, 5 ; sub r5, r6, r7 ; st1 r25, r26 } + 10748: [0-9a-f]* { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st1 r25, r26 } + 10750: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 } + 10758: [0-9a-f]* { and r5, r6, r7 ; addx r15, r16, r17 ; st1 r25, r26 } + 10760: [0-9a-f]* { and r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 } + 10768: [0-9a-f]* { andi r15, r16, 5 ; nop ; st1 r25, r26 } + 10770: [0-9a-f]* { andi r5, r6, 5 ; cmpltu r15, r16, r17 ; st1 r25, r26 } + 10778: [0-9a-f]* { clz r5, r6 ; andi r15, r16, 5 ; st1 r25, r26 } + 10780: [0-9a-f]* { clz r5, r6 ; xor r15, r16, r17 ; st1 r25, r26 } + 10788: [0-9a-f]* { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; st1 r25, r26 } + 10790: [0-9a-f]* { cmovnez r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 } + 10798: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 } + 107a0: [0-9a-f]* { cmpeq r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 } + 107a8: [0-9a-f]* { cmpeq r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 } + 107b0: [0-9a-f]* { cmpeqi r15, r16, 5 ; mz r5, r6, r7 ; st1 r25, r26 } + 107b8: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmpltsi r15, r16, 5 ; st1 r25, r26 } + 107c0: [0-9a-f]* { cmples r15, r16, r17 ; and r5, r6, r7 ; st1 r25, r26 } + 107c8: [0-9a-f]* { cmples r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + 107d0: [0-9a-f]* { cmples r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + 107d8: [0-9a-f]* { cmpleu r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 } + 107e0: [0-9a-f]* { cmpleu r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 } + 107e8: [0-9a-f]* { cmpleu r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 } + 107f0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 107f8: [0-9a-f]* { cmplts r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 } + 10800: [0-9a-f]* { cmplts r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 } + 10808: [0-9a-f]* { cmpltsi r15, r16, 5 ; mz r5, r6, r7 ; st1 r25, r26 } + 10810: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmpltsi r15, r16, 5 ; st1 r25, r26 } + 10818: [0-9a-f]* { cmpltu r15, r16, r17 ; and r5, r6, r7 ; st1 r25, r26 } + 10820: [0-9a-f]* { cmpltu r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + 10828: [0-9a-f]* { cmpltu r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + 10830: [0-9a-f]* { cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 } + 10838: [0-9a-f]* { cmpne r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 } + 10840: [0-9a-f]* { cmpne r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 } + 10848: [0-9a-f]* { ctz r5, r6 ; movei r15, 5 ; st1 r25, r26 } + 10850: [0-9a-f]* { cmpeqi r15, r16, 5 ; st1 r25, r26 } + 10858: [0-9a-f]* { mz r15, r16, r17 ; st1 r25, r26 } + 10860: [0-9a-f]* { subx r15, r16, r17 ; st1 r25, r26 } + 10868: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; st1 r25, r26 } + 10870: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; ill ; st1 r25, r26 } + 10878: [0-9a-f]* { info 19 ; add r5, r6, r7 ; st1 r25, r26 } + 10880: [0-9a-f]* { info 19 ; mnz r15, r16, r17 ; st1 r25, r26 } + 10888: [0-9a-f]* { info 19 ; shl3add r15, r16, r17 ; st1 r25, r26 } + 10890: [0-9a-f]* { cmpltu r5, r6, r7 ; jalr r15 ; st1 r25, r26 } + 10898: [0-9a-f]* { sub r5, r6, r7 ; jalr r15 ; st1 r25, r26 } + 108a0: [0-9a-f]* { mulax r5, r6, r7 ; jalrp r15 ; st1 r25, r26 } + 108a8: [0-9a-f]* { cmpeq r5, r6, r7 ; jr r15 ; st1 r25, r26 } + 108b0: [0-9a-f]* { shl3addx r5, r6, r7 ; jr r15 ; st1 r25, r26 } + 108b8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; jrp r15 ; st1 r25, r26 } + 108c0: [0-9a-f]* { addxi r5, r6, 5 ; lnk r15 ; st1 r25, r26 } + 108c8: [0-9a-f]* { shl r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + 108d0: [0-9a-f]* { mnz r15, r16, r17 ; info 19 ; st1 r25, r26 } + 108d8: [0-9a-f]* { tblidxb3 r5, r6 ; mnz r15, r16, r17 ; st1 r25, r26 } + 108e0: [0-9a-f]* { mnz r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + 108e8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; move r15, r16 ; st1 r25, r26 } + 108f0: [0-9a-f]* { move r5, r6 ; cmpeqi r15, r16, 5 ; st1 r25, r26 } + 108f8: [0-9a-f]* { movei r15, 5 ; add r5, r6, r7 ; st1 r25, r26 } + 10900: [0-9a-f]* { revbytes r5, r6 ; movei r15, 5 ; st1 r25, r26 } + 10908: [0-9a-f]* { movei r5, 5 ; jalr r15 ; st1 r25, r26 } + 10910: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 10918: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; addxi r15, r16, 5 ; st1 r25, r26 } + 10920: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; st1 r25, r26 } + 10928: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; st1 r25, r26 } + 10930: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st1 r25, r26 } + 10938: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; st1 r25, r26 } + 10940: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; ill ; st1 r25, r26 } + 10948: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 } + 10950: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 } + 10958: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 } + 10960: [0-9a-f]* { mulax r5, r6, r7 ; shl2add r15, r16, r17 ; st1 r25, r26 } + 10968: [0-9a-f]* { mulx r5, r6, r7 ; nor r15, r16, r17 ; st1 r25, r26 } + 10970: [0-9a-f]* { mz r15, r16, r17 ; info 19 ; st1 r25, r26 } + 10978: [0-9a-f]* { tblidxb3 r5, r6 ; mz r15, r16, r17 ; st1 r25, r26 } + 10980: [0-9a-f]* { mz r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + 10988: [0-9a-f]* { nop ; cmpne r5, r6, r7 ; st1 r25, r26 } + 10990: [0-9a-f]* { nop ; rotli r5, r6, 5 ; st1 r25, r26 } + 10998: [0-9a-f]* { nor r15, r16, r17 ; and r5, r6, r7 ; st1 r25, r26 } + 109a0: [0-9a-f]* { nor r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + 109a8: [0-9a-f]* { nor r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + 109b0: [0-9a-f]* { or r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 } + 109b8: [0-9a-f]* { or r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 } + 109c0: [0-9a-f]* { or r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 } + 109c8: [0-9a-f]* { pcnt r5, r6 ; movei r15, 5 ; st1 r25, r26 } + 109d0: [0-9a-f]* { revbits r5, r6 ; jalr r15 ; st1 r25, r26 } + 109d8: [0-9a-f]* { revbytes r5, r6 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 109e0: [0-9a-f]* { rotl r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 } + 109e8: [0-9a-f]* { rotl r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 } + 109f0: [0-9a-f]* { rotl r5, r6, r7 ; jrp r15 ; st1 r25, r26 } + 109f8: [0-9a-f]* { rotli r15, r16, 5 ; cmplts r5, r6, r7 ; st1 r25, r26 } + 10a00: [0-9a-f]* { rotli r15, r16, 5 ; shru r5, r6, r7 ; st1 r25, r26 } + 10a08: [0-9a-f]* { rotli r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 } + 10a10: [0-9a-f]* { shl r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 } + 10a18: [0-9a-f]* { shl r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 } + 10a20: [0-9a-f]* { shl r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 } + 10a28: [0-9a-f]* { mulx r5, r6, r7 ; shl1add r15, r16, r17 ; st1 r25, r26 } + 10a30: [0-9a-f]* { shl1add r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 10a38: [0-9a-f]* { shl1addx r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 } + 10a40: [0-9a-f]* { shl1addx r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 } + 10a48: [0-9a-f]* { shl1addx r5, r6, r7 ; jrp r15 ; st1 r25, r26 } + 10a50: [0-9a-f]* { shl2add r15, r16, r17 ; cmplts r5, r6, r7 ; st1 r25, r26 } + 10a58: [0-9a-f]* { shl2add r15, r16, r17 ; shru r5, r6, r7 ; st1 r25, r26 } + 10a60: [0-9a-f]* { shl2add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 } + 10a68: [0-9a-f]* { shl2addx r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 } + 10a70: [0-9a-f]* { shl2addx r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 } + 10a78: [0-9a-f]* { shl2addx r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 } + 10a80: [0-9a-f]* { mulx r5, r6, r7 ; shl3add r15, r16, r17 ; st1 r25, r26 } + 10a88: [0-9a-f]* { shl3add r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 10a90: [0-9a-f]* { shl3addx r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 } + 10a98: [0-9a-f]* { shl3addx r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 } + 10aa0: [0-9a-f]* { shl3addx r5, r6, r7 ; jrp r15 ; st1 r25, r26 } + 10aa8: [0-9a-f]* { shli r15, r16, 5 ; cmplts r5, r6, r7 ; st1 r25, r26 } + 10ab0: [0-9a-f]* { shli r15, r16, 5 ; shru r5, r6, r7 ; st1 r25, r26 } + 10ab8: [0-9a-f]* { shli r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 } + 10ac0: [0-9a-f]* { shrs r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 } + 10ac8: [0-9a-f]* { shrs r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 } + 10ad0: [0-9a-f]* { shrs r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 } + 10ad8: [0-9a-f]* { mulx r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 } + 10ae0: [0-9a-f]* { shrsi r5, r6, 5 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 10ae8: [0-9a-f]* { shru r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 } + 10af0: [0-9a-f]* { shru r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 } + 10af8: [0-9a-f]* { shru r5, r6, r7 ; jrp r15 ; st1 r25, r26 } + 10b00: [0-9a-f]* { shrui r15, r16, 5 ; cmplts r5, r6, r7 ; st1 r25, r26 } + 10b08: [0-9a-f]* { shrui r15, r16, 5 ; shru r5, r6, r7 ; st1 r25, r26 } + 10b10: [0-9a-f]* { shrui r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 } + 10b18: [0-9a-f]* { sub r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 } + 10b20: [0-9a-f]* { sub r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 } + 10b28: [0-9a-f]* { sub r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 } + 10b30: [0-9a-f]* { mulx r5, r6, r7 ; subx r15, r16, r17 ; st1 r25, r26 } + 10b38: [0-9a-f]* { subx r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 10b40: [0-9a-f]* { tblidxb0 r5, r6 ; addxi r15, r16, 5 ; st1 r25, r26 } + 10b48: [0-9a-f]* { tblidxb0 r5, r6 ; sub r15, r16, r17 ; st1 r25, r26 } + 10b50: [0-9a-f]* { tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; st1 r25, r26 } + 10b58: [0-9a-f]* { tblidxb2 r5, r6 ; rotl r15, r16, r17 ; st1 r25, r26 } + 10b60: [0-9a-f]* { tblidxb3 r5, r6 ; mnz r15, r16, r17 ; st1 r25, r26 } + 10b68: [0-9a-f]* { xor r15, r16, r17 ; cmpltu r5, r6, r7 ; st1 r25, r26 } + 10b70: [0-9a-f]* { xor r15, r16, r17 ; sub r5, r6, r7 ; st1 r25, r26 } + 10b78: [0-9a-f]* { xor r5, r6, r7 ; shl1add r15, r16, r17 ; st1 r25, r26 } + 10b80: [0-9a-f]* { cmula r5, r6, r7 ; st1_add r15, r16, 5 } + 10b88: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; st1_add r15, r16, 5 } + 10b90: [0-9a-f]* { shrsi r5, r6, 5 ; st1_add r15, r16, 5 } + 10b98: [0-9a-f]* { v1maxui r5, r6, 5 ; st1_add r15, r16, 5 } + 10ba0: [0-9a-f]* { v2mnz r5, r6, r7 ; st1_add r15, r16, 5 } + 10ba8: [0-9a-f]* { addxsc r5, r6, r7 ; st2 r15, r16 } + 10bb0: [0-9a-f]* { st2 r15, r16 } + 10bb8: [0-9a-f]* { or r5, r6, r7 ; st2 r15, r16 } + 10bc0: [0-9a-f]* { v1cmpleu r5, r6, r7 ; st2 r15, r16 } + 10bc8: [0-9a-f]* { v2adiffs r5, r6, r7 ; st2 r15, r16 } + 10bd0: [0-9a-f]* { v4add r5, r6, r7 ; st2 r15, r16 } + 10bd8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 } + 10be0: [0-9a-f]* { add r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 } + 10be8: [0-9a-f]* { add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + 10bf0: [0-9a-f]* { addi r15, r16, 5 ; or r5, r6, r7 ; st2 r25, r26 } + 10bf8: [0-9a-f]* { addi r5, r6, 5 ; st2 r25, r26 } + 10c00: [0-9a-f]* { cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 } + 10c08: [0-9a-f]* { addx r15, r16, r17 ; shl2addx r5, r6, r7 ; st2 r25, r26 } + 10c10: [0-9a-f]* { addx r5, r6, r7 ; movei r15, 5 ; st2 r25, r26 } + 10c18: [0-9a-f]* { ctz r5, r6 ; addxi r15, r16, 5 ; st2 r25, r26 } + 10c20: [0-9a-f]* { tblidxb0 r5, r6 ; addxi r15, r16, 5 ; st2 r25, r26 } + 10c28: [0-9a-f]* { addxi r5, r6, 5 ; shl2add r15, r16, r17 ; st2 r25, r26 } + 10c30: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 } + 10c38: [0-9a-f]* { and r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 } + 10c40: [0-9a-f]* { and r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + 10c48: [0-9a-f]* { andi r15, r16, 5 ; or r5, r6, r7 ; st2 r25, r26 } + 10c50: [0-9a-f]* { andi r5, r6, 5 ; st2 r25, r26 } + 10c58: [0-9a-f]* { clz r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 } + 10c60: [0-9a-f]* { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 } + 10c68: [0-9a-f]* { cmoveqz r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 } + 10c70: [0-9a-f]* { cmovnez r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 } + 10c78: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; st2 r25, r26 } + 10c80: [0-9a-f]* { cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; st2 r25, r26 } + 10c88: [0-9a-f]* { cmpeq r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 } + 10c90: [0-9a-f]* { cmpeqi r15, r16, 5 ; nor r5, r6, r7 ; st2 r25, r26 } + 10c98: [0-9a-f]* { cmpeqi r5, r6, 5 ; cmpne r15, r16, r17 ; st2 r25, r26 } + 10ca0: [0-9a-f]* { clz r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 } + 10ca8: [0-9a-f]* { cmples r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 } + 10cb0: [0-9a-f]* { cmples r5, r6, r7 ; move r15, r16 ; st2 r25, r26 } + 10cb8: [0-9a-f]* { cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; st2 r25, r26 } + 10cc0: [0-9a-f]* { cmpleu r15, r16, r17 ; subx r5, r6, r7 ; st2 r25, r26 } + 10cc8: [0-9a-f]* { cmpleu r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 } + 10cd0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 } + 10cd8: [0-9a-f]* { cmplts r5, r6, r7 ; addxi r15, r16, 5 ; st2 r25, r26 } + 10ce0: [0-9a-f]* { cmplts r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 } + 10ce8: [0-9a-f]* { cmpltsi r15, r16, 5 ; nor r5, r6, r7 ; st2 r25, r26 } + 10cf0: [0-9a-f]* { cmpltsi r5, r6, 5 ; cmpne r15, r16, r17 ; st2 r25, r26 } + 10cf8: [0-9a-f]* { clz r5, r6 ; cmpltu r15, r16, r17 ; st2 r25, r26 } + 10d00: [0-9a-f]* { cmpltu r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 } + 10d08: [0-9a-f]* { cmpltu r5, r6, r7 ; move r15, r16 ; st2 r25, r26 } + 10d10: [0-9a-f]* { cmpne r15, r16, r17 ; cmpne r5, r6, r7 ; st2 r25, r26 } + 10d18: [0-9a-f]* { cmpne r15, r16, r17 ; subx r5, r6, r7 ; st2 r25, r26 } + 10d20: [0-9a-f]* { cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 } + 10d28: [0-9a-f]* { ctz r5, r6 ; nop ; st2 r25, r26 } + 10d30: [0-9a-f]* { cmples r15, r16, r17 ; st2 r25, r26 } + 10d38: [0-9a-f]* { nop ; st2 r25, r26 } + 10d40: [0-9a-f]* { tblidxb0 r5, r6 ; st2 r25, r26 } + 10d48: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl1addx r15, r16, r17 ; st2 r25, r26 } + 10d50: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; ill ; st2 r25, r26 } + 10d58: [0-9a-f]* { info 19 ; addi r5, r6, 5 ; st2 r25, r26 } + 10d60: [0-9a-f]* { info 19 ; move r15, r16 ; st2 r25, r26 } + 10d68: [0-9a-f]* { info 19 ; shl3addx r15, r16, r17 ; st2 r25, r26 } + 10d70: [0-9a-f]* { ctz r5, r6 ; jalr r15 ; st2 r25, r26 } + 10d78: [0-9a-f]* { tblidxb0 r5, r6 ; jalr r15 ; st2 r25, r26 } + 10d80: [0-9a-f]* { mz r5, r6, r7 ; jalrp r15 ; st2 r25, r26 } + 10d88: [0-9a-f]* { cmples r5, r6, r7 ; jr r15 ; st2 r25, r26 } + 10d90: [0-9a-f]* { shrs r5, r6, r7 ; jr r15 ; st2 r25, r26 } + 10d98: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; jrp r15 ; st2 r25, r26 } + 10da0: [0-9a-f]* { andi r5, r6, 5 ; lnk r15 ; st2 r25, r26 } + 10da8: [0-9a-f]* { shl1addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 } + 10db0: [0-9a-f]* { mnz r15, r16, r17 ; move r5, r6 ; st2 r25, r26 } + 10db8: [0-9a-f]* { mnz r15, r16, r17 ; st2 r25, r26 } + 10dc0: [0-9a-f]* { mnz r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 } + 10dc8: [0-9a-f]* { mulax r5, r6, r7 ; move r15, r16 ; st2 r25, r26 } + 10dd0: [0-9a-f]* { move r5, r6 ; cmpleu r15, r16, r17 ; st2 r25, r26 } + 10dd8: [0-9a-f]* { movei r15, 5 ; addx r5, r6, r7 ; st2 r25, r26 } + 10de0: [0-9a-f]* { movei r15, 5 ; rotli r5, r6, 5 ; st2 r25, r26 } + 10de8: [0-9a-f]* { movei r5, 5 ; jr r15 ; st2 r25, r26 } + 10df0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 } + 10df8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; st2 r25, r26 } + 10e00: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; st2 r25, r26 } + 10e08: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 } + 10e10: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 } + 10e18: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; movei r15, 5 ; st2 r25, r26 } + 10e20: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jalr r15 ; st2 r25, r26 } + 10e28: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 } + 10e30: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; st2 r25, r26 } + 10e38: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 } + 10e40: [0-9a-f]* { mulax r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + 10e48: [0-9a-f]* { mulx r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 } + 10e50: [0-9a-f]* { mz r15, r16, r17 ; move r5, r6 ; st2 r25, r26 } + 10e58: [0-9a-f]* { mz r15, r16, r17 ; st2 r25, r26 } + 10e60: [0-9a-f]* { mz r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 } + 10e68: [0-9a-f]* { nop ; st2 r25, r26 } + 10e70: [0-9a-f]* { nop ; shl r5, r6, r7 ; st2 r25, r26 } + 10e78: [0-9a-f]* { clz r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 } + 10e80: [0-9a-f]* { nor r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 } + 10e88: [0-9a-f]* { nor r5, r6, r7 ; move r15, r16 ; st2 r25, r26 } + 10e90: [0-9a-f]* { or r15, r16, r17 ; cmpne r5, r6, r7 ; st2 r25, r26 } + 10e98: [0-9a-f]* { or r15, r16, r17 ; subx r5, r6, r7 ; st2 r25, r26 } + 10ea0: [0-9a-f]* { or r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 } + 10ea8: [0-9a-f]* { pcnt r5, r6 ; nop ; st2 r25, r26 } + 10eb0: [0-9a-f]* { revbits r5, r6 ; jr r15 ; st2 r25, r26 } + 10eb8: [0-9a-f]* { revbytes r5, r6 ; cmpltu r15, r16, r17 ; st2 r25, r26 } + 10ec0: [0-9a-f]* { rotl r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 } + 10ec8: [0-9a-f]* { rotl r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 } + 10ed0: [0-9a-f]* { rotl r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 } + 10ed8: [0-9a-f]* { rotli r15, r16, 5 ; cmpltu r5, r6, r7 ; st2 r25, r26 } + 10ee0: [0-9a-f]* { rotli r15, r16, 5 ; sub r5, r6, r7 ; st2 r25, r26 } + 10ee8: [0-9a-f]* { rotli r5, r6, 5 ; shl1add r15, r16, r17 ; st2 r25, r26 } + 10ef0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 } + 10ef8: [0-9a-f]* { shl r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 } + 10f00: [0-9a-f]* { shl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 } + 10f08: [0-9a-f]* { shl1add r15, r16, r17 ; nop ; st2 r25, r26 } + 10f10: [0-9a-f]* { shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 } + 10f18: [0-9a-f]* { shl1addx r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 } + 10f20: [0-9a-f]* { shl1addx r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 } + 10f28: [0-9a-f]* { shl1addx r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 } + 10f30: [0-9a-f]* { shl2add r15, r16, r17 ; cmpltu r5, r6, r7 ; st2 r25, r26 } + 10f38: [0-9a-f]* { shl2add r15, r16, r17 ; sub r5, r6, r7 ; st2 r25, r26 } + 10f40: [0-9a-f]* { shl2add r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 } + 10f48: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 ; st2 r25, r26 } + 10f50: [0-9a-f]* { shl2addx r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 } + 10f58: [0-9a-f]* { shl2addx r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 } + 10f60: [0-9a-f]* { shl3add r15, r16, r17 ; nop ; st2 r25, r26 } + 10f68: [0-9a-f]* { shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 } + 10f70: [0-9a-f]* { shl3addx r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 } + 10f78: [0-9a-f]* { shl3addx r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 } + 10f80: [0-9a-f]* { shl3addx r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 } + 10f88: [0-9a-f]* { shli r15, r16, 5 ; cmpltu r5, r6, r7 ; st2 r25, r26 } + 10f90: [0-9a-f]* { shli r15, r16, 5 ; sub r5, r6, r7 ; st2 r25, r26 } + 10f98: [0-9a-f]* { shli r5, r6, 5 ; shl1add r15, r16, r17 ; st2 r25, r26 } + 10fa0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 } + 10fa8: [0-9a-f]* { shrs r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 } + 10fb0: [0-9a-f]* { shrs r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 } + 10fb8: [0-9a-f]* { shrsi r15, r16, 5 ; nop ; st2 r25, r26 } + 10fc0: [0-9a-f]* { shrsi r5, r6, 5 ; cmpltu r15, r16, r17 ; st2 r25, r26 } + 10fc8: [0-9a-f]* { shru r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 } + 10fd0: [0-9a-f]* { shru r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 } + 10fd8: [0-9a-f]* { shru r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 } + 10fe0: [0-9a-f]* { shrui r15, r16, 5 ; cmpltu r5, r6, r7 ; st2 r25, r26 } + 10fe8: [0-9a-f]* { shrui r15, r16, 5 ; sub r5, r6, r7 ; st2 r25, r26 } + 10ff0: [0-9a-f]* { shrui r5, r6, 5 ; shl1add r15, r16, r17 ; st2 r25, r26 } + 10ff8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 } + 11000: [0-9a-f]* { sub r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 } + 11008: [0-9a-f]* { sub r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 } + 11010: [0-9a-f]* { subx r15, r16, r17 ; nop ; st2 r25, r26 } + 11018: [0-9a-f]* { subx r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 } + 11020: [0-9a-f]* { tblidxb0 r5, r6 ; andi r15, r16, 5 ; st2 r25, r26 } + 11028: [0-9a-f]* { tblidxb0 r5, r6 ; xor r15, r16, r17 ; st2 r25, r26 } + 11030: [0-9a-f]* { tblidxb1 r5, r6 ; shli r15, r16, 5 ; st2 r25, r26 } + 11038: [0-9a-f]* { tblidxb2 r5, r6 ; shl r15, r16, r17 ; st2 r25, r26 } + 11040: [0-9a-f]* { tblidxb3 r5, r6 ; movei r15, 5 ; st2 r25, r26 } + 11048: [0-9a-f]* { ctz r5, r6 ; xor r15, r16, r17 ; st2 r25, r26 } + 11050: [0-9a-f]* { tblidxb0 r5, r6 ; xor r15, r16, r17 ; st2 r25, r26 } + 11058: [0-9a-f]* { xor r5, r6, r7 ; shl2add r15, r16, r17 ; st2 r25, r26 } + 11060: [0-9a-f]* { cmulf r5, r6, r7 ; st2_add r15, r16, 5 } + 11068: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; st2_add r15, r16, 5 } + 11070: [0-9a-f]* { shrui r5, r6, 5 ; st2_add r15, r16, 5 } + 11078: [0-9a-f]* { v1minui r5, r6, 5 ; st2_add r15, r16, 5 } + 11080: [0-9a-f]* { v2muls r5, r6, r7 ; st2_add r15, r16, 5 } + 11088: [0-9a-f]* { andi r5, r6, 5 ; st4 r15, r16 } + 11090: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; st4 r15, r16 } + 11098: [0-9a-f]* { pcnt r5, r6 ; st4 r15, r16 } + 110a0: [0-9a-f]* { v1cmpltsi r5, r6, 5 ; st4 r15, r16 } + 110a8: [0-9a-f]* { v2cmpeq r5, r6, r7 ; st4 r15, r16 } + 110b0: [0-9a-f]* { v4int_h r5, r6, r7 ; st4 r15, r16 } + 110b8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; add r15, r16, r17 ; st4 r25, r26 } + 110c0: [0-9a-f]* { add r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 } + 110c8: [0-9a-f]* { add r5, r6, r7 ; st4 r25, r26 } + 110d0: [0-9a-f]* { revbits r5, r6 ; addi r15, r16, 5 ; st4 r25, r26 } + 110d8: [0-9a-f]* { addi r5, r6, 5 ; info 19 ; st4 r25, r26 } + 110e0: [0-9a-f]* { addx r15, r16, r17 ; cmpeq r5, r6, r7 ; st4 r25, r26 } + 110e8: [0-9a-f]* { addx r15, r16, r17 ; shl3addx r5, r6, r7 ; st4 r25, r26 } + 110f0: [0-9a-f]* { addx r5, r6, r7 ; nop ; st4 r25, r26 } + 110f8: [0-9a-f]* { fsingle_pack1 r5, r6 ; addxi r15, r16, 5 ; st4 r25, r26 } + 11100: [0-9a-f]* { tblidxb2 r5, r6 ; addxi r15, r16, 5 ; st4 r25, r26 } + 11108: [0-9a-f]* { addxi r5, r6, 5 ; shl3add r15, r16, r17 ; st4 r25, r26 } + 11110: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 } + 11118: [0-9a-f]* { and r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 } + 11120: [0-9a-f]* { and r5, r6, r7 ; st4 r25, r26 } + 11128: [0-9a-f]* { revbits r5, r6 ; andi r15, r16, 5 ; st4 r25, r26 } + 11130: [0-9a-f]* { andi r5, r6, 5 ; info 19 ; st4 r25, r26 } + 11138: [0-9a-f]* { clz r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 } + 11140: [0-9a-f]* { cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; st4 r25, r26 } + 11148: [0-9a-f]* { cmoveqz r5, r6, r7 ; shrui r15, r16, 5 ; st4 r25, r26 } + 11150: [0-9a-f]* { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 } + 11158: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 } + 11160: [0-9a-f]* { cmpeq r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + 11168: [0-9a-f]* { cmpeq r5, r6, r7 ; xor r15, r16, r17 ; st4 r25, r26 } + 11170: [0-9a-f]* { pcnt r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } + 11178: [0-9a-f]* { cmpeqi r5, r6, 5 ; ill ; st4 r25, r26 } + 11180: [0-9a-f]* { cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 } + 11188: [0-9a-f]* { cmples r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 } + 11190: [0-9a-f]* { cmples r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + 11198: [0-9a-f]* { cmpleu r15, r16, r17 ; st4 r25, r26 } + 111a0: [0-9a-f]* { tblidxb1 r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 } + 111a8: [0-9a-f]* { cmpleu r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 } + 111b0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 } + 111b8: [0-9a-f]* { cmplts r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + 111c0: [0-9a-f]* { cmplts r5, r6, r7 ; xor r15, r16, r17 ; st4 r25, r26 } + 111c8: [0-9a-f]* { pcnt r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + 111d0: [0-9a-f]* { cmpltsi r5, r6, 5 ; ill ; st4 r25, r26 } + 111d8: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + 111e0: [0-9a-f]* { cmpltu r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 } + 111e8: [0-9a-f]* { cmpltu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + 111f0: [0-9a-f]* { cmpne r15, r16, r17 ; st4 r25, r26 } + 111f8: [0-9a-f]* { tblidxb1 r5, r6 ; cmpne r15, r16, r17 ; st4 r25, r26 } + 11200: [0-9a-f]* { cmpne r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 } + 11208: [0-9a-f]* { ctz r5, r6 ; or r15, r16, r17 ; st4 r25, r26 } + 11210: [0-9a-f]* { cmpleu r15, r16, r17 ; st4 r25, r26 } + 11218: [0-9a-f]* { nor r5, r6, r7 ; st4 r25, r26 } + 11220: [0-9a-f]* { tblidxb2 r5, r6 ; st4 r25, r26 } + 11228: [0-9a-f]* { fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 ; st4 r25, r26 } + 11230: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; ill ; st4 r25, r26 } + 11238: [0-9a-f]* { info 19 ; addx r5, r6, r7 ; st4 r25, r26 } + 11240: [0-9a-f]* { info 19 ; movei r15, 5 ; st4 r25, r26 } + 11248: [0-9a-f]* { info 19 ; shli r15, r16, 5 ; st4 r25, r26 } + 11250: [0-9a-f]* { fsingle_pack1 r5, r6 ; jalr r15 ; st4 r25, r26 } + 11258: [0-9a-f]* { tblidxb2 r5, r6 ; jalr r15 ; st4 r25, r26 } + 11260: [0-9a-f]* { nor r5, r6, r7 ; jalrp r15 ; st4 r25, r26 } + 11268: [0-9a-f]* { cmplts r5, r6, r7 ; jr r15 ; st4 r25, r26 } + 11270: [0-9a-f]* { shru r5, r6, r7 ; jr r15 ; st4 r25, r26 } + 11278: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; jrp r15 ; st4 r25, r26 } + 11280: [0-9a-f]* { cmoveqz r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + 11288: [0-9a-f]* { shl2addx r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + 11290: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 } + 11298: [0-9a-f]* { mnz r5, r6, r7 ; addi r15, r16, 5 ; st4 r25, r26 } + 112a0: [0-9a-f]* { mnz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 } + 112a8: [0-9a-f]* { move r15, r16 ; mz r5, r6, r7 ; st4 r25, r26 } + 112b0: [0-9a-f]* { move r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + 112b8: [0-9a-f]* { movei r15, 5 ; and r5, r6, r7 ; st4 r25, r26 } + 112c0: [0-9a-f]* { movei r15, 5 ; shl1add r5, r6, r7 ; st4 r25, r26 } + 112c8: [0-9a-f]* { movei r5, 5 ; lnk r15 ; st4 r25, r26 } + 112d0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; st4 r25, r26 } + 112d8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } + 112e0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; st4 r25, r26 } + 112e8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st4 r25, r26 } + 112f0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; st4 r25, r26 } + 112f8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; nop ; st4 r25, r26 } + 11300: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; jr r15 ; st4 r25, r26 } + 11308: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + 11310: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + 11318: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; xor r15, r16, r17 ; st4 r25, r26 } + 11320: [0-9a-f]* { mulax r5, r6, r7 ; shli r15, r16, 5 ; st4 r25, r26 } + 11328: [0-9a-f]* { mulx r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 } + 11330: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + 11338: [0-9a-f]* { mz r5, r6, r7 ; addi r15, r16, 5 ; st4 r25, r26 } + 11340: [0-9a-f]* { mz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 } + 11348: [0-9a-f]* { nop ; ill ; st4 r25, r26 } + 11350: [0-9a-f]* { nop ; shl1add r5, r6, r7 ; st4 r25, r26 } + 11358: [0-9a-f]* { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 } + 11360: [0-9a-f]* { nor r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 } + 11368: [0-9a-f]* { nor r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + 11370: [0-9a-f]* { or r15, r16, r17 ; st4 r25, r26 } + 11378: [0-9a-f]* { tblidxb1 r5, r6 ; or r15, r16, r17 ; st4 r25, r26 } + 11380: [0-9a-f]* { or r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 } + 11388: [0-9a-f]* { pcnt r5, r6 ; or r15, r16, r17 ; st4 r25, r26 } + 11390: [0-9a-f]* { revbits r5, r6 ; lnk r15 ; st4 r25, r26 } + 11398: [0-9a-f]* { revbytes r5, r6 ; st4 r25, r26 } + 113a0: [0-9a-f]* { cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; st4 r25, r26 } + 113a8: [0-9a-f]* { rotl r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 } + 113b0: [0-9a-f]* { rotl r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 } + 113b8: [0-9a-f]* { ctz r5, r6 ; rotli r15, r16, 5 ; st4 r25, r26 } + 113c0: [0-9a-f]* { tblidxb0 r5, r6 ; rotli r15, r16, 5 ; st4 r25, r26 } + 113c8: [0-9a-f]* { rotli r5, r6, 5 ; shl2add r15, r16, r17 ; st4 r25, r26 } + 113d0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 } + 113d8: [0-9a-f]* { shl r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 } + 113e0: [0-9a-f]* { shl r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 } + 113e8: [0-9a-f]* { shl1add r15, r16, r17 ; or r5, r6, r7 ; st4 r25, r26 } + 113f0: [0-9a-f]* { shl1add r5, r6, r7 ; st4 r25, r26 } + 113f8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; st4 r25, r26 } + 11400: [0-9a-f]* { shl1addx r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 } + 11408: [0-9a-f]* { shl1addx r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 } + 11410: [0-9a-f]* { ctz r5, r6 ; shl2add r15, r16, r17 ; st4 r25, r26 } + 11418: [0-9a-f]* { tblidxb0 r5, r6 ; shl2add r15, r16, r17 ; st4 r25, r26 } + 11420: [0-9a-f]* { shl2add r5, r6, r7 ; shl2add r15, r16, r17 ; st4 r25, r26 } + 11428: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 } + 11430: [0-9a-f]* { shl2addx r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 } + 11438: [0-9a-f]* { shl2addx r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 } + 11440: [0-9a-f]* { shl3add r15, r16, r17 ; or r5, r6, r7 ; st4 r25, r26 } + 11448: [0-9a-f]* { shl3add r5, r6, r7 ; st4 r25, r26 } + 11450: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; st4 r25, r26 } + 11458: [0-9a-f]* { shl3addx r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 } + 11460: [0-9a-f]* { shl3addx r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 } + 11468: [0-9a-f]* { ctz r5, r6 ; shli r15, r16, 5 ; st4 r25, r26 } + 11470: [0-9a-f]* { tblidxb0 r5, r6 ; shli r15, r16, 5 ; st4 r25, r26 } + 11478: [0-9a-f]* { shli r5, r6, 5 ; shl2add r15, r16, r17 ; st4 r25, r26 } + 11480: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; st4 r25, r26 } + 11488: [0-9a-f]* { shrs r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 } + 11490: [0-9a-f]* { shrs r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 } + 11498: [0-9a-f]* { shrsi r15, r16, 5 ; or r5, r6, r7 ; st4 r25, r26 } + 114a0: [0-9a-f]* { shrsi r5, r6, 5 ; st4 r25, r26 } + 114a8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 } + 114b0: [0-9a-f]* { shru r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 } + 114b8: [0-9a-f]* { shru r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 } + 114c0: [0-9a-f]* { ctz r5, r6 ; shrui r15, r16, 5 ; st4 r25, r26 } + 114c8: [0-9a-f]* { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; st4 r25, r26 } + 114d0: [0-9a-f]* { shrui r5, r6, 5 ; shl2add r15, r16, r17 ; st4 r25, r26 } + 114d8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st4 r25, r26 } + 114e0: [0-9a-f]* { sub r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 } + 114e8: [0-9a-f]* { sub r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 } + 114f0: [0-9a-f]* { subx r15, r16, r17 ; or r5, r6, r7 ; st4 r25, r26 } + 114f8: [0-9a-f]* { subx r5, r6, r7 ; st4 r25, r26 } + 11500: [0-9a-f]* { tblidxb0 r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } + 11508: [0-9a-f]* { tblidxb1 r5, r6 ; add r15, r16, r17 ; st4 r25, r26 } + 11510: [0-9a-f]* { tblidxb1 r5, r6 ; shrsi r15, r16, 5 ; st4 r25, r26 } + 11518: [0-9a-f]* { tblidxb2 r5, r6 ; shl1addx r15, r16, r17 ; st4 r25, r26 } + 11520: [0-9a-f]* { tblidxb3 r5, r6 ; nop ; st4 r25, r26 } + 11528: [0-9a-f]* { fsingle_pack1 r5, r6 ; xor r15, r16, r17 ; st4 r25, r26 } + 11530: [0-9a-f]* { tblidxb2 r5, r6 ; xor r15, r16, r17 ; st4 r25, r26 } + 11538: [0-9a-f]* { xor r5, r6, r7 ; shl3add r15, r16, r17 ; st4 r25, r26 } + 11540: [0-9a-f]* { cmulh r5, r6, r7 ; st4_add r15, r16, 5 } + 11548: [0-9a-f]* { mul_ls_lu r5, r6, r7 ; st4_add r15, r16, 5 } + 11550: [0-9a-f]* { shruxi r5, r6, 5 ; st4_add r15, r16, 5 } + 11558: [0-9a-f]* { v1multu r5, r6, r7 ; st4_add r15, r16, 5 } + 11560: [0-9a-f]* { v2mz r5, r6, r7 ; st4_add r15, r16, 5 } + 11568: [0-9a-f]* { bfextu r5, r6, 5, 7 ; st_add r15, r16, 5 } + 11570: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; st_add r15, r16, 5 } + 11578: [0-9a-f]* { revbytes r5, r6 ; st_add r15, r16, 5 } + 11580: [0-9a-f]* { v1cmpltui r5, r6, 5 ; st_add r15, r16, 5 } + 11588: [0-9a-f]* { v2cmples r5, r6, r7 ; st_add r15, r16, 5 } + 11590: [0-9a-f]* { v4packsc r5, r6, r7 ; st_add r15, r16, 5 } + 11598: [0-9a-f]* { crc32_32 r5, r6, r7 ; stnt r15, r16 } + 115a0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; stnt r15, r16 } + 115a8: [0-9a-f]* { sub r5, r6, r7 ; stnt r15, r16 } + 115b0: [0-9a-f]* { v1mulus r5, r6, r7 ; stnt r15, r16 } + 115b8: [0-9a-f]* { v2packl r5, r6, r7 ; stnt r15, r16 } + 115c0: [0-9a-f]* { clz r5, r6 ; stnt1 r15, r16 } + 115c8: [0-9a-f]* { fsingle_pack2 r5, r6, r7 ; stnt1 r15, r16 } + 115d0: [0-9a-f]* { rotli r5, r6, 5 ; stnt1 r15, r16 } + 115d8: [0-9a-f]* { v1ddotpu r5, r6, r7 ; stnt1 r15, r16 } + 115e0: [0-9a-f]* { v2cmplts r5, r6, r7 ; stnt1 r15, r16 } + 115e8: [0-9a-f]* { v4shlsc r5, r6, r7 ; stnt1 r15, r16 } + 115f0: [0-9a-f]* { ctz r5, r6 ; stnt1_add r15, r16, 5 } + 115f8: [0-9a-f]* { mula_hs_ls r5, r6, r7 ; stnt1_add r15, r16, 5 } + 11600: [0-9a-f]* { subxsc r5, r6, r7 ; stnt1_add r15, r16, 5 } + 11608: [0-9a-f]* { v1sadau r5, r6, r7 ; stnt1_add r15, r16, 5 } + 11610: [0-9a-f]* { v2sadas r5, r6, r7 ; stnt1_add r15, r16, 5 } + 11618: [0-9a-f]* { cmovnez r5, r6, r7 ; stnt2 r15, r16 } + 11620: [0-9a-f]* { info 19 ; stnt2 r15, r16 } + 11628: [0-9a-f]* { shl16insli r5, r6, 4660 ; stnt2 r15, r16 } + 11630: [0-9a-f]* { v1ddotpus r5, r6, r7 ; stnt2 r15, r16 } + 11638: [0-9a-f]* { v2cmpltu r5, r6, r7 ; stnt2 r15, r16 } + 11640: [0-9a-f]* { v4shru r5, r6, r7 ; stnt2 r15, r16 } + 11648: [0-9a-f]* { dblalign2 r5, r6, r7 ; stnt2_add r15, r16, 5 } + 11650: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; stnt2_add r15, r16, 5 } + 11658: [0-9a-f]* { tblidxb1 r5, r6 ; stnt2_add r15, r16, 5 } + 11660: [0-9a-f]* { v1shl r5, r6, r7 ; stnt2_add r15, r16, 5 } + 11668: [0-9a-f]* { v2sads r5, r6, r7 ; stnt2_add r15, r16, 5 } + 11670: [0-9a-f]* { cmpeqi r5, r6, 5 ; stnt4 r15, r16 } + 11678: [0-9a-f]* { mm r5, r6, 5, 7 ; stnt4 r15, r16 } + 11680: [0-9a-f]* { shl1addx r5, r6, r7 ; stnt4 r15, r16 } + 11688: [0-9a-f]* { v1dotp r5, r6, r7 ; stnt4 r15, r16 } + 11690: [0-9a-f]* { v2cmpne r5, r6, r7 ; stnt4 r15, r16 } + 11698: [0-9a-f]* { v4subsc r5, r6, r7 ; stnt4 r15, r16 } + 116a0: [0-9a-f]* { dblalign6 r5, r6, r7 ; stnt4_add r15, r16, 5 } + 116a8: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; stnt4_add r15, r16, 5 } + 116b0: [0-9a-f]* { tblidxb3 r5, r6 ; stnt4_add r15, r16, 5 } + 116b8: [0-9a-f]* { v1shrs r5, r6, r7 ; stnt4_add r15, r16, 5 } + 116c0: [0-9a-f]* { v2shl r5, r6, r7 ; stnt4_add r15, r16, 5 } + 116c8: [0-9a-f]* { cmpleu r5, r6, r7 ; stnt_add r15, r16, 5 } + 116d0: [0-9a-f]* { move r5, r6 ; stnt_add r15, r16, 5 } + 116d8: [0-9a-f]* { shl2addx r5, r6, r7 ; stnt_add r15, r16, 5 } + 116e0: [0-9a-f]* { v1dotpu r5, r6, r7 ; stnt_add r15, r16, 5 } + 116e8: [0-9a-f]* { v2dotpa r5, r6, r7 ; stnt_add r15, r16, 5 } + 116f0: [0-9a-f]* { xori r5, r6, 5 ; stnt_add r15, r16, 5 } + 116f8: [0-9a-f]* { sub r15, r16, r17 ; addx r5, r6, r7 ; ld r25, r26 } + 11700: [0-9a-f]* { sub r15, r16, r17 ; and r5, r6, r7 ; ld r25, r26 } + 11708: [0-9a-f]* { bfins r5, r6, 5, 7 ; sub r15, r16, r17 } + 11710: [0-9a-f]* { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 } + 11718: [0-9a-f]* { sub r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 } + 11720: [0-9a-f]* { sub r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4s r25, r26 } + 11728: [0-9a-f]* { sub r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 } + 11730: [0-9a-f]* { sub r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 } + 11738: [0-9a-f]* { sub r15, r16, r17 ; dblalign2 r5, r6, r7 } + 11740: [0-9a-f]* { fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; ld4u r25, r26 } + 11748: [0-9a-f]* { sub r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 } + 11750: [0-9a-f]* { sub r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 } + 11758: [0-9a-f]* { sub r15, r16, r17 ; move r5, r6 ; ld1s r25, r26 } + 11760: [0-9a-f]* { sub r15, r16, r17 ; ld1s r25, r26 } + 11768: [0-9a-f]* { revbits r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 } + 11770: [0-9a-f]* { sub r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 } + 11778: [0-9a-f]* { sub r15, r16, r17 ; subx r5, r6, r7 ; ld2s r25, r26 } + 11780: [0-9a-f]* { mulx r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 } + 11788: [0-9a-f]* { sub r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4s r25, r26 } + 11790: [0-9a-f]* { sub r15, r16, r17 ; shli r5, r6, 5 ; ld4s r25, r26 } + 11798: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + 117a0: [0-9a-f]* { sub r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 } + 117a8: [0-9a-f]* { sub r15, r16, r17 ; movei r5, 5 ; ld4s r25, r26 } + 117b0: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 } + 117b8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 } + 117c0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 } + 117c8: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } + 117d0: [0-9a-f]* { mulx r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 } + 117d8: [0-9a-f]* { sub r15, r16, r17 ; nop ; ld2u r25, r26 } + 117e0: [0-9a-f]* { sub r15, r16, r17 ; or r5, r6, r7 ; ld4u r25, r26 } + 117e8: [0-9a-f]* { cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + 117f0: [0-9a-f]* { sub r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } + 117f8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + 11800: [0-9a-f]* { sub r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l1_fault r25 } + 11808: [0-9a-f]* { sub r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l1_fault r25 } + 11810: [0-9a-f]* { sub r15, r16, r17 ; prefetch_l2 r25 } + 11818: [0-9a-f]* { tblidxb1 r5, r6 ; sub r15, r16, r17 ; prefetch_l2 r25 } + 11820: [0-9a-f]* { sub r15, r16, r17 ; nop ; prefetch_l2_fault r25 } + 11828: [0-9a-f]* { sub r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l3 r25 } + 11830: [0-9a-f]* { sub r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l3 r25 } + 11838: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + 11840: [0-9a-f]* { revbits r5, r6 ; sub r15, r16, r17 ; ld4u r25, r26 } + 11848: [0-9a-f]* { sub r15, r16, r17 ; rotl r5, r6, r7 ; prefetch r25 } + 11850: [0-9a-f]* { sub r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 } + 11858: [0-9a-f]* { sub r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2_fault r25 } + 11860: [0-9a-f]* { sub r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3_fault r25 } + 11868: [0-9a-f]* { sub r15, r16, r17 ; shl3addx r5, r6, r7 ; st1 r25, r26 } + 11870: [0-9a-f]* { sub r15, r16, r17 ; shrs r5, r6, r7 ; st1 r25, r26 } + 11878: [0-9a-f]* { sub r15, r16, r17 ; shru r5, r6, r7 ; st4 r25, r26 } + 11880: [0-9a-f]* { sub r15, r16, r17 ; cmpne r5, r6, r7 ; st r25, r26 } + 11888: [0-9a-f]* { sub r15, r16, r17 ; subx r5, r6, r7 ; st r25, r26 } + 11890: [0-9a-f]* { mulx r5, r6, r7 ; sub r15, r16, r17 ; st1 r25, r26 } + 11898: [0-9a-f]* { sub r15, r16, r17 ; cmpeqi r5, r6, 5 ; st2 r25, r26 } + 118a0: [0-9a-f]* { sub r15, r16, r17 ; shli r5, r6, 5 ; st2 r25, r26 } + 118a8: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st4 r25, r26 } + 118b0: [0-9a-f]* { sub r15, r16, r17 ; sub r5, r6, r7 ; ld2u r25, r26 } + 118b8: [0-9a-f]* { tblidxb0 r5, r6 ; sub r15, r16, r17 ; ld4s r25, r26 } + 118c0: [0-9a-f]* { tblidxb2 r5, r6 ; sub r15, r16, r17 ; prefetch r25 } + 118c8: [0-9a-f]* { sub r15, r16, r17 ; v1cmplts r5, r6, r7 } + 118d0: [0-9a-f]* { v2avgs r5, r6, r7 ; sub r15, r16, r17 } + 118d8: [0-9a-f]* { sub r15, r16, r17 ; v4addsc r5, r6, r7 } + 118e0: [0-9a-f]* { sub r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 } + 118e8: [0-9a-f]* { sub r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 } + 118f0: [0-9a-f]* { sub r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + 118f8: [0-9a-f]* { sub r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + 11900: [0-9a-f]* { sub r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + 11908: [0-9a-f]* { sub r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 11910: [0-9a-f]* { sub r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + 11918: [0-9a-f]* { sub r5, r6, r7 ; ld1s r25, r26 } + 11920: [0-9a-f]* { sub r5, r6, r7 ; info 19 ; ld1u r25, r26 } + 11928: [0-9a-f]* { sub r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 } + 11930: [0-9a-f]* { sub r5, r6, r7 ; jrp r15 ; ld2s r25, r26 } + 11938: [0-9a-f]* { sub r5, r6, r7 ; move r15, r16 ; ld r25, r26 } + 11940: [0-9a-f]* { sub r5, r6, r7 ; ill ; ld1s r25, r26 } + 11948: [0-9a-f]* { sub r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } + 11950: [0-9a-f]* { sub r5, r6, r7 ; ld1u r25, r26 } + 11958: [0-9a-f]* { sub r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 } + 11960: [0-9a-f]* { sub r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 } + 11968: [0-9a-f]* { sub r5, r6, r7 ; jr r15 ; ld4s r25, r26 } + 11970: [0-9a-f]* { sub r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 } + 11978: [0-9a-f]* { sub r5, r6, r7 ; ldna_add r15, r16, 5 } + 11980: [0-9a-f]* { sub r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 } + 11988: [0-9a-f]* { sub r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 } + 11990: [0-9a-f]* { sub r5, r6, r7 ; nop ; ld4u r25, r26 } + 11998: [0-9a-f]* { sub r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } + 119a0: [0-9a-f]* { sub r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + 119a8: [0-9a-f]* { sub r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 } + 119b0: [0-9a-f]* { sub r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 } + 119b8: [0-9a-f]* { sub r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + 119c0: [0-9a-f]* { sub r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 } + 119c8: [0-9a-f]* { sub r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2_fault r25 } + 119d0: [0-9a-f]* { sub r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 } + 119d8: [0-9a-f]* { sub r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 } + 119e0: [0-9a-f]* { sub r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 } + 119e8: [0-9a-f]* { sub r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + 119f0: [0-9a-f]* { sub r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 } + 119f8: [0-9a-f]* { sub r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 } + 11a00: [0-9a-f]* { sub r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 } + 11a08: [0-9a-f]* { sub r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3 r25 } + 11a10: [0-9a-f]* { sub r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 } + 11a18: [0-9a-f]* { sub r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 } + 11a20: [0-9a-f]* { sub r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 } + 11a28: [0-9a-f]* { sub r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 } + 11a30: [0-9a-f]* { sub r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + 11a38: [0-9a-f]* { sub r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 } + 11a40: [0-9a-f]* { sub r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 } + 11a48: [0-9a-f]* { sub r5, r6, r7 ; v1cmpne r15, r16, r17 } + 11a50: [0-9a-f]* { sub r5, r6, r7 ; v2shl r15, r16, r17 } + 11a58: [0-9a-f]* { sub r5, r6, r7 ; xori r15, r16, 5 } + 11a60: [0-9a-f]* { subx r15, r16, r17 ; addx r5, r6, r7 ; ld r25, r26 } + 11a68: [0-9a-f]* { subx r15, r16, r17 ; and r5, r6, r7 ; ld r25, r26 } + 11a70: [0-9a-f]* { bfins r5, r6, 5, 7 ; subx r15, r16, r17 } + 11a78: [0-9a-f]* { cmovnez r5, r6, r7 ; subx r15, r16, r17 ; ld1s r25, r26 } + 11a80: [0-9a-f]* { subx r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 } + 11a88: [0-9a-f]* { subx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4s r25, r26 } + 11a90: [0-9a-f]* { subx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 } + 11a98: [0-9a-f]* { subx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 } + 11aa0: [0-9a-f]* { subx r15, r16, r17 ; dblalign2 r5, r6, r7 } + 11aa8: [0-9a-f]* { fsingle_pack1 r5, r6 ; subx r15, r16, r17 ; ld4u r25, r26 } + 11ab0: [0-9a-f]* { subx r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 } + 11ab8: [0-9a-f]* { subx r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 } + 11ac0: [0-9a-f]* { subx r15, r16, r17 ; move r5, r6 ; ld1s r25, r26 } + 11ac8: [0-9a-f]* { subx r15, r16, r17 ; ld1s r25, r26 } + 11ad0: [0-9a-f]* { revbits r5, r6 ; subx r15, r16, r17 ; ld1u r25, r26 } + 11ad8: [0-9a-f]* { subx r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 } + 11ae0: [0-9a-f]* { subx r15, r16, r17 ; subx r5, r6, r7 ; ld2s r25, r26 } + 11ae8: [0-9a-f]* { mulx r5, r6, r7 ; subx r15, r16, r17 ; ld2u r25, r26 } + 11af0: [0-9a-f]* { subx r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4s r25, r26 } + 11af8: [0-9a-f]* { subx r15, r16, r17 ; shli r5, r6, 5 ; ld4s r25, r26 } + 11b00: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 } + 11b08: [0-9a-f]* { subx r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 } + 11b10: [0-9a-f]* { subx r15, r16, r17 ; movei r5, 5 ; ld4s r25, r26 } + 11b18: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld2s r25, r26 } + 11b20: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld1u r25, r26 } + 11b28: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld1s r25, r26 } + 11b30: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 } + 11b38: [0-9a-f]* { mulx r5, r6, r7 ; subx r15, r16, r17 ; ld1u r25, r26 } + 11b40: [0-9a-f]* { subx r15, r16, r17 ; nop ; ld2u r25, r26 } + 11b48: [0-9a-f]* { subx r15, r16, r17 ; or r5, r6, r7 ; ld4u r25, r26 } + 11b50: [0-9a-f]* { cmoveqz r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 } + 11b58: [0-9a-f]* { subx r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } + 11b60: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 } + 11b68: [0-9a-f]* { subx r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l1_fault r25 } + 11b70: [0-9a-f]* { subx r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l1_fault r25 } + 11b78: [0-9a-f]* { subx r15, r16, r17 ; prefetch_l2 r25 } + 11b80: [0-9a-f]* { tblidxb1 r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 } + 11b88: [0-9a-f]* { subx r15, r16, r17 ; nop ; prefetch_l2_fault r25 } + 11b90: [0-9a-f]* { subx r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l3 r25 } + 11b98: [0-9a-f]* { subx r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l3 r25 } + 11ba0: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 } + 11ba8: [0-9a-f]* { revbits r5, r6 ; subx r15, r16, r17 ; ld4u r25, r26 } + 11bb0: [0-9a-f]* { subx r15, r16, r17 ; rotl r5, r6, r7 ; prefetch r25 } + 11bb8: [0-9a-f]* { subx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 } + 11bc0: [0-9a-f]* { subx r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2_fault r25 } + 11bc8: [0-9a-f]* { subx r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3_fault r25 } + 11bd0: [0-9a-f]* { subx r15, r16, r17 ; shl3addx r5, r6, r7 ; st1 r25, r26 } + 11bd8: [0-9a-f]* { subx r15, r16, r17 ; shrs r5, r6, r7 ; st1 r25, r26 } + 11be0: [0-9a-f]* { subx r15, r16, r17 ; shru r5, r6, r7 ; st4 r25, r26 } + 11be8: [0-9a-f]* { subx r15, r16, r17 ; cmpne r5, r6, r7 ; st r25, r26 } + 11bf0: [0-9a-f]* { subx r15, r16, r17 ; subx r5, r6, r7 ; st r25, r26 } + 11bf8: [0-9a-f]* { mulx r5, r6, r7 ; subx r15, r16, r17 ; st1 r25, r26 } + 11c00: [0-9a-f]* { subx r15, r16, r17 ; cmpeqi r5, r6, 5 ; st2 r25, r26 } + 11c08: [0-9a-f]* { subx r15, r16, r17 ; shli r5, r6, 5 ; st2 r25, r26 } + 11c10: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 } + 11c18: [0-9a-f]* { subx r15, r16, r17 ; sub r5, r6, r7 ; ld2u r25, r26 } + 11c20: [0-9a-f]* { tblidxb0 r5, r6 ; subx r15, r16, r17 ; ld4s r25, r26 } + 11c28: [0-9a-f]* { tblidxb2 r5, r6 ; subx r15, r16, r17 ; prefetch r25 } + 11c30: [0-9a-f]* { subx r15, r16, r17 ; v1cmplts r5, r6, r7 } + 11c38: [0-9a-f]* { v2avgs r5, r6, r7 ; subx r15, r16, r17 } + 11c40: [0-9a-f]* { subx r15, r16, r17 ; v4addsc r5, r6, r7 } + 11c48: [0-9a-f]* { subx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 } + 11c50: [0-9a-f]* { subx r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 } + 11c58: [0-9a-f]* { subx r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + 11c60: [0-9a-f]* { subx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + 11c68: [0-9a-f]* { subx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + 11c70: [0-9a-f]* { subx r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + 11c78: [0-9a-f]* { subx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + 11c80: [0-9a-f]* { subx r5, r6, r7 ; ld1s r25, r26 } + 11c88: [0-9a-f]* { subx r5, r6, r7 ; info 19 ; ld1u r25, r26 } + 11c90: [0-9a-f]* { subx r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 } + 11c98: [0-9a-f]* { subx r5, r6, r7 ; jrp r15 ; ld2s r25, r26 } + 11ca0: [0-9a-f]* { subx r5, r6, r7 ; move r15, r16 ; ld r25, r26 } + 11ca8: [0-9a-f]* { subx r5, r6, r7 ; ill ; ld1s r25, r26 } + 11cb0: [0-9a-f]* { subx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } + 11cb8: [0-9a-f]* { subx r5, r6, r7 ; ld1u r25, r26 } + 11cc0: [0-9a-f]* { subx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 } + 11cc8: [0-9a-f]* { subx r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 } + 11cd0: [0-9a-f]* { subx r5, r6, r7 ; jr r15 ; ld4s r25, r26 } + 11cd8: [0-9a-f]* { subx r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 } + 11ce0: [0-9a-f]* { subx r5, r6, r7 ; ldna_add r15, r16, 5 } + 11ce8: [0-9a-f]* { subx r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 } + 11cf0: [0-9a-f]* { subx r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 } + 11cf8: [0-9a-f]* { subx r5, r6, r7 ; nop ; ld4u r25, r26 } + 11d00: [0-9a-f]* { subx r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } + 11d08: [0-9a-f]* { subx r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + 11d10: [0-9a-f]* { subx r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 } + 11d18: [0-9a-f]* { subx r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 } + 11d20: [0-9a-f]* { subx r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + 11d28: [0-9a-f]* { subx r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 } + 11d30: [0-9a-f]* { subx r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2_fault r25 } + 11d38: [0-9a-f]* { subx r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 } + 11d40: [0-9a-f]* { subx r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 } + 11d48: [0-9a-f]* { subx r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 } + 11d50: [0-9a-f]* { subx r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + 11d58: [0-9a-f]* { subx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 } + 11d60: [0-9a-f]* { subx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 } + 11d68: [0-9a-f]* { subx r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 } + 11d70: [0-9a-f]* { subx r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3 r25 } + 11d78: [0-9a-f]* { subx r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 } + 11d80: [0-9a-f]* { subx r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 } + 11d88: [0-9a-f]* { subx r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 } + 11d90: [0-9a-f]* { subx r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 } + 11d98: [0-9a-f]* { subx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + 11da0: [0-9a-f]* { subx r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 } + 11da8: [0-9a-f]* { subx r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 } + 11db0: [0-9a-f]* { subx r5, r6, r7 ; v1cmpne r15, r16, r17 } + 11db8: [0-9a-f]* { subx r5, r6, r7 ; v2shl r15, r16, r17 } + 11dc0: [0-9a-f]* { subx r5, r6, r7 ; xori r15, r16, 5 } + 11dc8: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; subxsc r15, r16, r17 } + 11dd0: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; subxsc r15, r16, r17 } + 11dd8: [0-9a-f]* { subxsc r15, r16, r17 ; v1addi r5, r6, 5 } + 11de0: [0-9a-f]* { subxsc r15, r16, r17 ; v1shru r5, r6, r7 } + 11de8: [0-9a-f]* { subxsc r15, r16, r17 ; v2shlsc r5, r6, r7 } + 11df0: [0-9a-f]* { subxsc r5, r6, r7 ; dblalign2 r15, r16, r17 } + 11df8: [0-9a-f]* { subxsc r5, r6, r7 ; ld4u_add r15, r16, 5 } + 11e00: [0-9a-f]* { subxsc r5, r6, r7 ; prefetch_l2 r15 } + 11e08: [0-9a-f]* { subxsc r5, r6, r7 ; sub r15, r16, r17 } + 11e10: [0-9a-f]* { subxsc r5, r6, r7 ; v2cmpltu r15, r16, r17 } + 11e18: [0-9a-f]* { swint3 } + 11e20: [0-9a-f]* { tblidxb0 r5, r6 ; addx r15, r16, r17 ; ld r25, r26 } + 11e28: [0-9a-f]* { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld r25, r26 } + 11e30: [0-9a-f]* { tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } + 11e38: [0-9a-f]* { tblidxb0 r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 } + 11e40: [0-9a-f]* { tblidxb0 r5, r6 ; cmplts r15, r16, r17 ; ld2u r25, r26 } + 11e48: [0-9a-f]* { tblidxb0 r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 } + 11e50: [0-9a-f]* { tblidxb0 r5, r6 ; fetchadd4 r15, r16, r17 } + 11e58: [0-9a-f]* { tblidxb0 r5, r6 ; ill ; prefetch_l2 r25 } + 11e60: [0-9a-f]* { tblidxb0 r5, r6 ; jalr r15 ; prefetch_l1_fault r25 } + 11e68: [0-9a-f]* { tblidxb0 r5, r6 ; jr r15 ; prefetch_l2_fault r25 } + 11e70: [0-9a-f]* { tblidxb0 r5, r6 ; cmpltu r15, r16, r17 ; ld r25, r26 } + 11e78: [0-9a-f]* { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 } + 11e80: [0-9a-f]* { tblidxb0 r5, r6 ; subx r15, r16, r17 ; ld1s r25, r26 } + 11e88: [0-9a-f]* { tblidxb0 r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + 11e90: [0-9a-f]* { tblidxb0 r5, r6 ; nop ; ld2s r25, r26 } + 11e98: [0-9a-f]* { tblidxb0 r5, r6 ; jalr r15 ; ld2u r25, r26 } + 11ea0: [0-9a-f]* { tblidxb0 r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 } + 11ea8: [0-9a-f]* { tblidxb0 r5, r6 ; ld4u r15, r16 } + 11eb0: [0-9a-f]* { tblidxb0 r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 } + 11eb8: [0-9a-f]* { tblidxb0 r5, r6 ; lnk r15 ; st r25, r26 } + 11ec0: [0-9a-f]* { tblidxb0 r5, r6 ; move r15, r16 ; st r25, r26 } + 11ec8: [0-9a-f]* { tblidxb0 r5, r6 ; mz r15, r16, r17 ; st r25, r26 } + 11ed0: [0-9a-f]* { tblidxb0 r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 } + 11ed8: [0-9a-f]* { tblidxb0 r5, r6 ; info 19 ; prefetch r25 } + 11ee0: [0-9a-f]* { tblidxb0 r5, r6 ; addx r15, r16, r17 ; prefetch r25 } + 11ee8: [0-9a-f]* { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; prefetch r25 } + 11ef0: [0-9a-f]* { tblidxb0 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 } + 11ef8: [0-9a-f]* { tblidxb0 r5, r6 ; nop ; prefetch_l2 r25 } + 11f00: [0-9a-f]* { tblidxb0 r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 } + 11f08: [0-9a-f]* { tblidxb0 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 } + 11f10: [0-9a-f]* { tblidxb0 r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 } + 11f18: [0-9a-f]* { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 } + 11f20: [0-9a-f]* { tblidxb0 r5, r6 ; rotli r15, r16, 5 ; st1 r25, r26 } + 11f28: [0-9a-f]* { tblidxb0 r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 } + 11f30: [0-9a-f]* { tblidxb0 r5, r6 ; shl2add r15, r16, r17 } + 11f38: [0-9a-f]* { tblidxb0 r5, r6 ; shl3addx r15, r16, r17 ; ld1s r25, r26 } + 11f40: [0-9a-f]* { tblidxb0 r5, r6 ; shrs r15, r16, r17 ; ld1s r25, r26 } + 11f48: [0-9a-f]* { tblidxb0 r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 } + 11f50: [0-9a-f]* { tblidxb0 r5, r6 ; addx r15, r16, r17 ; st r25, r26 } + 11f58: [0-9a-f]* { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; st r25, r26 } + 11f60: [0-9a-f]* { tblidxb0 r5, r6 ; shl2add r15, r16, r17 ; st1 r25, r26 } + 11f68: [0-9a-f]* { tblidxb0 r5, r6 ; mz r15, r16, r17 ; st2 r25, r26 } + 11f70: [0-9a-f]* { tblidxb0 r5, r6 ; info 19 ; st4 r25, r26 } + 11f78: [0-9a-f]* { tblidxb0 r5, r6 ; stnt_add r15, r16, 5 } + 11f80: [0-9a-f]* { tblidxb0 r5, r6 ; v1add r15, r16, r17 } + 11f88: [0-9a-f]* { tblidxb0 r5, r6 ; v2int_h r15, r16, r17 } + 11f90: [0-9a-f]* { tblidxb0 r5, r6 ; xor r15, r16, r17 ; prefetch r25 } + 11f98: [0-9a-f]* { tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } + 11fa0: [0-9a-f]* { tblidxb1 r5, r6 ; addxi r15, r16, 5 ; prefetch_l2 r25 } + 11fa8: [0-9a-f]* { tblidxb1 r5, r6 ; andi r15, r16, 5 ; prefetch_l2 r25 } + 11fb0: [0-9a-f]* { tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 } + 11fb8: [0-9a-f]* { tblidxb1 r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 } + 11fc0: [0-9a-f]* { tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 ; st r25, r26 } + 11fc8: [0-9a-f]* { tblidxb1 r5, r6 ; cmpne r15, r16, r17 ; st1 r25, r26 } + 11fd0: [0-9a-f]* { tblidxb1 r5, r6 ; icoh r15 } + 11fd8: [0-9a-f]* { tblidxb1 r5, r6 ; inv r15 } + 11fe0: [0-9a-f]* { tblidxb1 r5, r6 ; jr r15 ; ld r25, r26 } + 11fe8: [0-9a-f]* { tblidxb1 r5, r6 ; addi r15, r16, 5 ; ld r25, r26 } + 11ff0: [0-9a-f]* { tblidxb1 r5, r6 ; shru r15, r16, r17 ; ld r25, r26 } + 11ff8: [0-9a-f]* { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + 12000: [0-9a-f]* { tblidxb1 r5, r6 ; movei r15, 5 ; ld1u r25, r26 } + 12008: [0-9a-f]* { tblidxb1 r5, r6 ; ill ; ld2s r25, r26 } + 12010: [0-9a-f]* { tblidxb1 r5, r6 ; cmpeq r15, r16, r17 ; ld2u r25, r26 } + 12018: [0-9a-f]* { tblidxb1 r5, r6 ; ld2u r25, r26 } + 12020: [0-9a-f]* { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + 12028: [0-9a-f]* { tblidxb1 r5, r6 ; or r15, r16, r17 ; ld4u r25, r26 } + 12030: [0-9a-f]* { tblidxb1 r5, r6 ; lnk r15 ; ld2s r25, r26 } + 12038: [0-9a-f]* { tblidxb1 r5, r6 ; move r15, r16 ; ld2s r25, r26 } + 12040: [0-9a-f]* { tblidxb1 r5, r6 ; mz r15, r16, r17 ; ld2s r25, r26 } + 12048: [0-9a-f]* { tblidxb1 r5, r6 ; nor r15, r16, r17 ; ld4s r25, r26 } + 12050: [0-9a-f]* { tblidxb1 r5, r6 ; andi r15, r16, 5 ; prefetch r25 } + 12058: [0-9a-f]* { tblidxb1 r5, r6 ; xor r15, r16, r17 ; prefetch r25 } + 12060: [0-9a-f]* { tblidxb1 r5, r6 ; shl r15, r16, r17 ; prefetch r25 } + 12068: [0-9a-f]* { tblidxb1 r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 } + 12070: [0-9a-f]* { tblidxb1 r5, r6 ; ill ; prefetch_l2 r25 } + 12078: [0-9a-f]* { tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 } + 12080: [0-9a-f]* { tblidxb1 r5, r6 ; prefetch_l3 r15 } + 12088: [0-9a-f]* { tblidxb1 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 } + 12090: [0-9a-f]* { tblidxb1 r5, r6 ; shl r15, r16, r17 ; prefetch_l3_fault r25 } + 12098: [0-9a-f]* { tblidxb1 r5, r6 ; rotli r15, r16, 5 ; ld2u r25, r26 } + 120a0: [0-9a-f]* { tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; ld4s r25, r26 } + 120a8: [0-9a-f]* { tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 } + 120b0: [0-9a-f]* { tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 } + 120b8: [0-9a-f]* { tblidxb1 r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 } + 120c0: [0-9a-f]* { tblidxb1 r5, r6 ; shrsi r15, r16, 5 ; prefetch_l2_fault r25 } + 120c8: [0-9a-f]* { tblidxb1 r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 } + 120d0: [0-9a-f]* { tblidxb1 r5, r6 ; shl r15, r16, r17 ; st r25, r26 } + 120d8: [0-9a-f]* { tblidxb1 r5, r6 ; move r15, r16 ; st1 r25, r26 } + 120e0: [0-9a-f]* { tblidxb1 r5, r6 ; st2 r25, r26 } + 120e8: [0-9a-f]* { tblidxb1 r5, r6 ; andi r15, r16, 5 ; st4 r25, r26 } + 120f0: [0-9a-f]* { tblidxb1 r5, r6 ; xor r15, r16, r17 ; st4 r25, r26 } + 120f8: [0-9a-f]* { tblidxb1 r5, r6 ; subx r15, r16, r17 ; prefetch_l1_fault r25 } + 12100: [0-9a-f]* { tblidxb1 r5, r6 ; v2addi r15, r16, 5 } + 12108: [0-9a-f]* { tblidxb1 r5, r6 ; v4sub r15, r16, r17 } + 12110: [0-9a-f]* { tblidxb2 r5, r6 ; add r15, r16, r17 ; st4 r25, r26 } + 12118: [0-9a-f]* { tblidxb2 r5, r6 ; addx r15, r16, r17 } + 12120: [0-9a-f]* { tblidxb2 r5, r6 ; and r15, r16, r17 } + 12128: [0-9a-f]* { tblidxb2 r5, r6 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 } + 12130: [0-9a-f]* { tblidxb2 r5, r6 ; cmpleu r15, r16, r17 ; ld1s r25, r26 } + 12138: [0-9a-f]* { tblidxb2 r5, r6 ; cmpltsi r15, r16, 5 ; ld2s r25, r26 } + 12140: [0-9a-f]* { tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; ld2u r25, r26 } + 12148: [0-9a-f]* { tblidxb2 r5, r6 ; prefetch r25 } + 12150: [0-9a-f]* { tblidxb2 r5, r6 ; info 19 ; prefetch_l1_fault r25 } + 12158: [0-9a-f]* { tblidxb2 r5, r6 ; jalrp r15 ; prefetch r25 } + 12160: [0-9a-f]* { tblidxb2 r5, r6 ; jrp r15 ; prefetch_l2 r25 } + 12168: [0-9a-f]* { tblidxb2 r5, r6 ; rotli r15, r16, 5 ; ld r25, r26 } + 12170: [0-9a-f]* { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld1s r25, r26 } + 12178: [0-9a-f]* { tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; ld1u r25, r26 } + 12180: [0-9a-f]* { tblidxb2 r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 } + 12188: [0-9a-f]* { tblidxb2 r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 } + 12190: [0-9a-f]* { tblidxb2 r5, r6 ; shl2addx r15, r16, r17 ; ld2u r25, r26 } + 12198: [0-9a-f]* { tblidxb2 r5, r6 ; nop ; ld4s r25, r26 } + 121a0: [0-9a-f]* { tblidxb2 r5, r6 ; jalr r15 ; ld4u r25, r26 } + 121a8: [0-9a-f]* { tblidxb2 r5, r6 ; ldnt2s_add r15, r16, 5 } + 121b0: [0-9a-f]* { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 } + 121b8: [0-9a-f]* { tblidxb2 r5, r6 ; movei r15, 5 ; prefetch_l3_fault r25 } + 121c0: [0-9a-f]* { tblidxb2 r5, r6 ; nop ; prefetch_l3_fault r25 } + 121c8: [0-9a-f]* { tblidxb2 r5, r6 ; or r15, r16, r17 ; st1 r25, r26 } + 121d0: [0-9a-f]* { tblidxb2 r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 } + 121d8: [0-9a-f]* { tblidxb2 r5, r6 ; jrp r15 ; prefetch r25 } + 121e0: [0-9a-f]* { tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + 121e8: [0-9a-f]* { tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch_l2 r25 } + 121f0: [0-9a-f]* { tblidxb2 r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 } + 121f8: [0-9a-f]* { tblidxb2 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 } + 12200: [0-9a-f]* { tblidxb2 r5, r6 ; or r15, r16, r17 ; prefetch_l3 r25 } + 12208: [0-9a-f]* { tblidxb2 r5, r6 ; jrp r15 ; prefetch_l3_fault r25 } + 12210: [0-9a-f]* { tblidxb2 r5, r6 ; rotl r15, r16, r17 ; prefetch_l3 r25 } + 12218: [0-9a-f]* { tblidxb2 r5, r6 ; shl r15, r16, r17 ; st r25, r26 } + 12220: [0-9a-f]* { tblidxb2 r5, r6 ; shl1addx r15, r16, r17 ; st1 r25, r26 } + 12228: [0-9a-f]* { tblidxb2 r5, r6 ; shl2addx r15, r16, r17 ; st4 r25, r26 } + 12230: [0-9a-f]* { tblidxb2 r5, r6 ; shli r15, r16, 5 ; ld r25, r26 } + 12238: [0-9a-f]* { tblidxb2 r5, r6 ; shrsi r15, r16, 5 ; ld r25, r26 } + 12240: [0-9a-f]* { tblidxb2 r5, r6 ; shrui r15, r16, 5 ; ld1u r25, r26 } + 12248: [0-9a-f]* { tblidxb2 r5, r6 ; jrp r15 ; st r25, r26 } + 12250: [0-9a-f]* { tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; st1 r25, r26 } + 12258: [0-9a-f]* { tblidxb2 r5, r6 ; addxi r15, r16, 5 ; st2 r25, r26 } + 12260: [0-9a-f]* { tblidxb2 r5, r6 ; sub r15, r16, r17 ; st2 r25, r26 } + 12268: [0-9a-f]* { tblidxb2 r5, r6 ; shl2add r15, r16, r17 ; st4 r25, r26 } + 12270: [0-9a-f]* { tblidxb2 r5, r6 ; sub r15, r16, r17 ; st4 r25, r26 } + 12278: [0-9a-f]* { tblidxb2 r5, r6 ; v1mnz r15, r16, r17 } + 12280: [0-9a-f]* { tblidxb2 r5, r6 ; v2sub r15, r16, r17 } + 12288: [0-9a-f]* { tblidxb3 r5, r6 ; add r15, r16, r17 ; ld4u r25, r26 } + 12290: [0-9a-f]* { tblidxb3 r5, r6 ; addx r15, r16, r17 ; prefetch r25 } + 12298: [0-9a-f]* { tblidxb3 r5, r6 ; and r15, r16, r17 ; prefetch r25 } + 122a0: [0-9a-f]* { tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + 122a8: [0-9a-f]* { tblidxb3 r5, r6 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + 122b0: [0-9a-f]* { tblidxb3 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + 122b8: [0-9a-f]* { tblidxb3 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 } + 122c0: [0-9a-f]* { tblidxb3 r5, r6 ; finv r15 } + 122c8: [0-9a-f]* { tblidxb3 r5, r6 ; ill ; st4 r25, r26 } + 122d0: [0-9a-f]* { tblidxb3 r5, r6 ; jalr r15 ; st2 r25, r26 } + 122d8: [0-9a-f]* { tblidxb3 r5, r6 ; jr r15 } + 122e0: [0-9a-f]* { tblidxb3 r5, r6 ; jr r15 ; ld r25, r26 } + 122e8: [0-9a-f]* { tblidxb3 r5, r6 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 } + 122f0: [0-9a-f]* { tblidxb3 r5, r6 ; addx r15, r16, r17 ; ld1u r25, r26 } + 122f8: [0-9a-f]* { tblidxb3 r5, r6 ; shrui r15, r16, 5 ; ld1u r25, r26 } + 12300: [0-9a-f]* { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + 12308: [0-9a-f]* { tblidxb3 r5, r6 ; movei r15, 5 ; ld2u r25, r26 } + 12310: [0-9a-f]* { tblidxb3 r5, r6 ; ill ; ld4s r25, r26 } + 12318: [0-9a-f]* { tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + 12320: [0-9a-f]* { tblidxb3 r5, r6 ; ld4u r25, r26 } + 12328: [0-9a-f]* { tblidxb3 r5, r6 ; mnz r15, r16, r17 ; ld r25, r26 } + 12330: [0-9a-f]* { tblidxb3 r5, r6 ; movei r15, 5 ; ld1u r25, r26 } + 12338: [0-9a-f]* { tblidxb3 r5, r6 ; nop ; ld1u r25, r26 } + 12340: [0-9a-f]* { tblidxb3 r5, r6 ; or r15, r16, r17 ; ld2u r25, r26 } + 12348: [0-9a-f]* { tblidxb3 r5, r6 ; move r15, r16 ; prefetch r25 } + 12350: [0-9a-f]* { tblidxb3 r5, r6 ; cmpleu r15, r16, r17 ; prefetch r25 } + 12358: [0-9a-f]* { tblidxb3 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } + 12360: [0-9a-f]* { tblidxb3 r5, r6 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + 12368: [0-9a-f]* { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 } + 12370: [0-9a-f]* { tblidxb3 r5, r6 ; mz r15, r16, r17 ; prefetch_l2_fault r25 } + 12378: [0-9a-f]* { tblidxb3 r5, r6 ; jalr r15 ; prefetch_l3 r25 } + 12380: [0-9a-f]* { tblidxb3 r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 } + 12388: [0-9a-f]* { tblidxb3 r5, r6 ; rotl r15, r16, r17 ; ld1s r25, r26 } + 12390: [0-9a-f]* { tblidxb3 r5, r6 ; shl r15, r16, r17 ; ld2s r25, r26 } + 12398: [0-9a-f]* { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; ld2u r25, r26 } + 123a0: [0-9a-f]* { tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + 123a8: [0-9a-f]* { tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch r25 } + 123b0: [0-9a-f]* { tblidxb3 r5, r6 ; shrs r15, r16, r17 ; prefetch r25 } + 123b8: [0-9a-f]* { tblidxb3 r5, r6 ; shru r15, r16, r17 ; prefetch_l2 r25 } + 123c0: [0-9a-f]* { tblidxb3 r5, r6 ; cmpleu r15, r16, r17 ; st r25, r26 } + 123c8: [0-9a-f]* { tblidxb3 r5, r6 ; addi r15, r16, 5 ; st1 r25, r26 } + 123d0: [0-9a-f]* { tblidxb3 r5, r6 ; shru r15, r16, r17 ; st1 r25, r26 } + 123d8: [0-9a-f]* { tblidxb3 r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 } + 123e0: [0-9a-f]* { tblidxb3 r5, r6 ; move r15, r16 ; st4 r25, r26 } + 123e8: [0-9a-f]* { tblidxb3 r5, r6 ; sub r15, r16, r17 ; ld4u r25, r26 } + 123f0: [0-9a-f]* { tblidxb3 r5, r6 ; v1cmplts r15, r16, r17 } + 123f8: [0-9a-f]* { tblidxb3 r5, r6 ; v2mz r15, r16, r17 } + 12400: [0-9a-f]* { tblidxb3 r5, r6 ; xor r15, r16, r17 ; st1 r25, r26 } + 12408: [0-9a-f]* { v1add r15, r16, r17 ; dblalign2 r5, r6, r7 } + 12410: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; v1add r15, r16, r17 } + 12418: [0-9a-f]* { tblidxb1 r5, r6 ; v1add r15, r16, r17 } + 12420: [0-9a-f]* { v1add r15, r16, r17 ; v1shl r5, r6, r7 } + 12428: [0-9a-f]* { v2sads r5, r6, r7 ; v1add r15, r16, r17 } + 12430: [0-9a-f]* { v1add r5, r6, r7 ; cmpltsi r15, r16, 5 } + 12438: [0-9a-f]* { v1add r5, r6, r7 ; ld2u_add r15, r16, 5 } + 12440: [0-9a-f]* { v1add r5, r6, r7 ; prefetch_add_l3 r15, 5 } + 12448: [0-9a-f]* { v1add r5, r6, r7 ; stnt2_add r15, r16, 5 } + 12450: [0-9a-f]* { v1add r5, r6, r7 ; v2cmples r15, r16, r17 } + 12458: [0-9a-f]* { v1add r5, r6, r7 ; xori r15, r16, 5 } + 12460: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; v1addi r15, r16, 5 } + 12468: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; v1addi r15, r16, 5 } + 12470: [0-9a-f]* { v1addi r15, r16, 5 ; v1addi r5, r6, 5 } + 12478: [0-9a-f]* { v1addi r15, r16, 5 ; v1shru r5, r6, r7 } + 12480: [0-9a-f]* { v1addi r15, r16, 5 ; v2shlsc r5, r6, r7 } + 12488: [0-9a-f]* { v1addi r5, r6, 5 ; dblalign2 r15, r16, r17 } + 12490: [0-9a-f]* { v1addi r5, r6, 5 ; ld4u_add r15, r16, 5 } + 12498: [0-9a-f]* { v1addi r5, r6, 5 ; prefetch_l2 r15 } + 124a0: [0-9a-f]* { v1addi r5, r6, 5 ; sub r15, r16, r17 } + 124a8: [0-9a-f]* { v1addi r5, r6, 5 ; v2cmpltu r15, r16, r17 } + 124b0: [0-9a-f]* { v1adduc r15, r16, r17 ; addx r5, r6, r7 } + 124b8: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; v1adduc r15, r16, r17 } + 124c0: [0-9a-f]* { v1adduc r15, r16, r17 ; mz r5, r6, r7 } + 124c8: [0-9a-f]* { v1adduc r15, r16, r17 ; v1cmpeq r5, r6, r7 } + 124d0: [0-9a-f]* { v1adduc r15, r16, r17 ; v2add r5, r6, r7 } + 124d8: [0-9a-f]* { v1adduc r15, r16, r17 ; v2shrui r5, r6, 5 } + 124e0: [0-9a-f]* { v1adduc r5, r6, r7 ; exch r15, r16, r17 } + 124e8: [0-9a-f]* { v1adduc r5, r6, r7 ; ldnt r15, r16 } + 124f0: [0-9a-f]* { v1adduc r5, r6, r7 ; raise } + 124f8: [0-9a-f]* { v1adduc r5, r6, r7 ; v1addi r15, r16, 5 } + 12500: [0-9a-f]* { v1adduc r5, r6, r7 ; v2int_l r15, r16, r17 } + 12508: [0-9a-f]* { v1adiffu r5, r6, r7 ; and r15, r16, r17 } + 12510: [0-9a-f]* { v1adiffu r5, r6, r7 ; jrp r15 } + 12518: [0-9a-f]* { v1adiffu r5, r6, r7 ; nop } + 12520: [0-9a-f]* { v1adiffu r5, r6, r7 ; st2 r15, r16 } + 12528: [0-9a-f]* { v1adiffu r5, r6, r7 ; v1shru r15, r16, r17 } + 12530: [0-9a-f]* { v1adiffu r5, r6, r7 ; v4packsc r15, r16, r17 } + 12538: [0-9a-f]* { v1avgu r5, r6, r7 ; fetchand r15, r16, r17 } + 12540: [0-9a-f]* { v1avgu r5, r6, r7 ; ldnt2s_add r15, r16, 5 } + 12548: [0-9a-f]* { v1avgu r5, r6, r7 ; shl1addx r15, r16, r17 } + 12550: [0-9a-f]* { v1avgu r5, r6, r7 ; v1cmplts r15, r16, r17 } + 12558: [0-9a-f]* { v1avgu r5, r6, r7 ; v2mz r15, r16, r17 } + 12560: [0-9a-f]* { cmoveqz r5, r6, r7 ; v1cmpeq r15, r16, r17 } + 12568: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; v1cmpeq r15, r16, r17 } + 12570: [0-9a-f]* { v1cmpeq r15, r16, r17 ; shl r5, r6, r7 } + 12578: [0-9a-f]* { v1ddotpua r5, r6, r7 ; v1cmpeq r15, r16, r17 } + 12580: [0-9a-f]* { v1cmpeq r15, r16, r17 ; v2cmpltsi r5, r6, 5 } + 12588: [0-9a-f]* { v1cmpeq r15, r16, r17 ; v4shrs r5, r6, r7 } + 12590: [0-9a-f]* { v1cmpeq r5, r6, r7 ; finv r15 } + 12598: [0-9a-f]* { v1cmpeq r5, r6, r7 ; ldnt4s_add r15, r16, 5 } + 125a0: [0-9a-f]* { v1cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 } + 125a8: [0-9a-f]* { v1cmpeq r5, r6, r7 ; v1cmpne r15, r16, r17 } + 125b0: [0-9a-f]* { v1cmpeq r5, r6, r7 ; v2shl r15, r16, r17 } + 125b8: [0-9a-f]* { v1cmpeqi r15, r16, 5 ; cmples r5, r6, r7 } + 125c0: [0-9a-f]* { v1cmpeqi r15, r16, 5 ; mnz r5, r6, r7 } + 125c8: [0-9a-f]* { v1cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 } + 125d0: [0-9a-f]* { v1dotpa r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + 125d8: [0-9a-f]* { v2dotp r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + 125e0: [0-9a-f]* { v1cmpeqi r15, r16, 5 ; xor r5, r6, r7 } + 125e8: [0-9a-f]* { v1cmpeqi r5, r6, 5 ; icoh r15 } + 125f0: [0-9a-f]* { v1cmpeqi r5, r6, 5 ; lnk r15 } + 125f8: [0-9a-f]* { v1cmpeqi r5, r6, 5 ; shrs r15, r16, r17 } + 12600: [0-9a-f]* { v1cmpeqi r5, r6, 5 ; v1maxui r15, r16, 5 } + 12608: [0-9a-f]* { v1cmpeqi r5, r6, 5 ; v2shrsi r15, r16, 5 } + 12610: [0-9a-f]* { v1cmples r15, r16, r17 ; cmpltu r5, r6, r7 } + 12618: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; v1cmples r15, r16, r17 } + 12620: [0-9a-f]* { v1cmples r15, r16, r17 ; shli r5, r6, 5 } + 12628: [0-9a-f]* { v1dotpusa r5, r6, r7 ; v1cmples r15, r16, r17 } + 12630: [0-9a-f]* { v1cmples r15, r16, r17 ; v2maxs r5, r6, r7 } + 12638: [0-9a-f]* { v1cmples r5, r6, r7 ; addli r15, r16, 4660 } + 12640: [0-9a-f]* { v1cmples r5, r6, r7 ; inv r15 } + 12648: [0-9a-f]* { v1cmples r5, r6, r7 ; move r15, r16 } + 12650: [0-9a-f]* { v1cmples r5, r6, r7 ; shrux r15, r16, r17 } + 12658: [0-9a-f]* { v1cmples r5, r6, r7 ; v1mz r15, r16, r17 } + 12660: [0-9a-f]* { v1cmples r5, r6, r7 ; v2subsc r15, r16, r17 } + 12668: [0-9a-f]* { cmula r5, r6, r7 ; v1cmpleu r15, r16, r17 } + 12670: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; v1cmpleu r15, r16, r17 } + 12678: [0-9a-f]* { v1cmpleu r15, r16, r17 ; shrsi r5, r6, 5 } + 12680: [0-9a-f]* { v1cmpleu r15, r16, r17 ; v1maxui r5, r6, 5 } + 12688: [0-9a-f]* { v1cmpleu r15, r16, r17 ; v2mnz r5, r6, r7 } + 12690: [0-9a-f]* { v1cmpleu r5, r6, r7 ; addxsc r15, r16, r17 } + 12698: [0-9a-f]* { v1cmpleu r5, r6, r7 ; jr r15 } + 126a0: [0-9a-f]* { v1cmpleu r5, r6, r7 ; mz r15, r16, r17 } + 126a8: [0-9a-f]* { v1cmpleu r5, r6, r7 ; st1_add r15, r16, 5 } + 126b0: [0-9a-f]* { v1cmpleu r5, r6, r7 ; v1shrsi r15, r16, 5 } + 126b8: [0-9a-f]* { v1cmpleu r5, r6, r7 ; v4int_l r15, r16, r17 } + 126c0: [0-9a-f]* { cmulh r5, r6, r7 ; v1cmplts r15, r16, r17 } + 126c8: [0-9a-f]* { mul_ls_lu r5, r6, r7 ; v1cmplts r15, r16, r17 } + 126d0: [0-9a-f]* { v1cmplts r15, r16, r17 ; shruxi r5, r6, 5 } + 126d8: [0-9a-f]* { v1multu r5, r6, r7 ; v1cmplts r15, r16, r17 } + 126e0: [0-9a-f]* { v1cmplts r15, r16, r17 ; v2mz r5, r6, r7 } + 126e8: [0-9a-f]* { v1cmplts r5, r6, r7 ; cmpeqi r15, r16, 5 } + 126f0: [0-9a-f]* { v1cmplts r5, r6, r7 ; ld1s_add r15, r16, 5 } + 126f8: [0-9a-f]* { v1cmplts r5, r6, r7 ; ori r15, r16, 5 } + 12700: [0-9a-f]* { v1cmplts r5, r6, r7 ; st4_add r15, r16, 5 } + 12708: [0-9a-f]* { v1cmplts r5, r6, r7 ; v1subuc r15, r16, r17 } + 12710: [0-9a-f]* { v1cmplts r5, r6, r7 ; v4shrs r15, r16, r17 } + 12718: [0-9a-f]* { ctz r5, r6 ; v1cmpltsi r15, r16, 5 } + 12720: [0-9a-f]* { mula_hs_ls r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + 12728: [0-9a-f]* { v1cmpltsi r15, r16, 5 ; subxsc r5, r6, r7 } + 12730: [0-9a-f]* { v1sadau r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + 12738: [0-9a-f]* { v2sadas r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + 12740: [0-9a-f]* { v1cmpltsi r5, r6, 5 ; cmpleu r15, r16, r17 } + 12748: [0-9a-f]* { v1cmpltsi r5, r6, 5 ; ld2s_add r15, r16, 5 } + 12750: [0-9a-f]* { v1cmpltsi r5, r6, 5 ; prefetch_add_l2 r15, 5 } + 12758: [0-9a-f]* { v1cmpltsi r5, r6, 5 ; stnt1_add r15, r16, 5 } + 12760: [0-9a-f]* { v1cmpltsi r5, r6, 5 ; v2cmpeq r15, r16, r17 } + 12768: [0-9a-f]* { v1cmpltsi r5, r6, 5 ; wh64 r15 } + 12770: [0-9a-f]* { v1cmpltu r15, r16, r17 ; dblalign6 r5, r6, r7 } + 12778: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; v1cmpltu r15, r16, r17 } + 12780: [0-9a-f]* { tblidxb3 r5, r6 ; v1cmpltu r15, r16, r17 } + 12788: [0-9a-f]* { v1cmpltu r15, r16, r17 ; v1shrs r5, r6, r7 } + 12790: [0-9a-f]* { v1cmpltu r15, r16, r17 ; v2shl r5, r6, r7 } + 12798: [0-9a-f]* { v1cmpltu r5, r6, r7 ; cmpltui r15, r16, 5 } + 127a0: [0-9a-f]* { v1cmpltu r5, r6, r7 ; ld4s_add r15, r16, 5 } + 127a8: [0-9a-f]* { v1cmpltu r5, r6, r7 ; prefetch r15 } + 127b0: [0-9a-f]* { v1cmpltu r5, r6, r7 ; stnt4_add r15, r16, 5 } + 127b8: [0-9a-f]* { v1cmpltu r5, r6, r7 ; v2cmplts r15, r16, r17 } + 127c0: [0-9a-f]* { v1cmpltui r15, r16, 5 ; addi r5, r6, 5 } + 127c8: [0-9a-f]* { fdouble_pack1 r5, r6, r7 ; v1cmpltui r15, r16, 5 } + 127d0: [0-9a-f]* { mulax r5, r6, r7 ; v1cmpltui r15, r16, 5 } + 127d8: [0-9a-f]* { v1adiffu r5, r6, r7 ; v1cmpltui r15, r16, 5 } + 127e0: [0-9a-f]* { v1cmpltui r15, r16, 5 ; v1sub r5, r6, r7 } + 127e8: [0-9a-f]* { v1cmpltui r15, r16, 5 ; v2shrsi r5, r6, 5 } + 127f0: [0-9a-f]* { v1cmpltui r5, r6, 5 ; dblalign6 r15, r16, r17 } + 127f8: [0-9a-f]* { v1cmpltui r5, r6, 5 ; ldna r15, r16 } + 12800: [0-9a-f]* { v1cmpltui r5, r6, 5 ; prefetch_l3 r15 } + 12808: [0-9a-f]* { v1cmpltui r5, r6, 5 ; subxsc r15, r16, r17 } + 12810: [0-9a-f]* { v1cmpltui r5, r6, 5 ; v2cmpne r15, r16, r17 } + 12818: [0-9a-f]* { v1cmpne r15, r16, r17 ; addxli r5, r6, 4660 } + 12820: [0-9a-f]* { fdouble_unpack_min r5, r6, r7 ; v1cmpne r15, r16, r17 } + 12828: [0-9a-f]* { v1cmpne r15, r16, r17 ; nor r5, r6, r7 } + 12830: [0-9a-f]* { v1cmpne r15, r16, r17 ; v1cmples r5, r6, r7 } + 12838: [0-9a-f]* { v1cmpne r15, r16, r17 ; v2addsc r5, r6, r7 } + 12840: [0-9a-f]* { v1cmpne r15, r16, r17 ; v2subsc r5, r6, r7 } + 12848: [0-9a-f]* { v1cmpne r5, r6, r7 ; fetchadd r15, r16, r17 } + 12850: [0-9a-f]* { v1cmpne r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + 12858: [0-9a-f]* { v1cmpne r5, r6, r7 ; rotli r15, r16, 5 } + 12860: [0-9a-f]* { v1cmpne r5, r6, r7 ; v1cmpeq r15, r16, r17 } + 12868: [0-9a-f]* { v1cmpne r5, r6, r7 ; v2maxsi r15, r16, 5 } + 12870: [0-9a-f]* { v1ddotpu r5, r6, r7 ; cmpeq r15, r16, r17 } + 12878: [0-9a-f]* { v1ddotpu r5, r6, r7 ; ld1s r15, r16 } + 12880: [0-9a-f]* { v1ddotpu r5, r6, r7 ; or r15, r16, r17 } + 12888: [0-9a-f]* { v1ddotpu r5, r6, r7 ; st4 r15, r16 } + 12890: [0-9a-f]* { v1ddotpu r5, r6, r7 ; v1sub r15, r16, r17 } + 12898: [0-9a-f]* { v1ddotpu r5, r6, r7 ; v4shlsc r15, r16, r17 } + 128a0: [0-9a-f]* { v1ddotpua r5, r6, r7 ; fetchor r15, r16, r17 } + 128a8: [0-9a-f]* { v1ddotpua r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + 128b0: [0-9a-f]* { v1ddotpua r5, r6, r7 ; shl2addx r15, r16, r17 } + 128b8: [0-9a-f]* { v1ddotpua r5, r6, r7 ; v1cmpltu r15, r16, r17 } + 128c0: [0-9a-f]* { v1ddotpua r5, r6, r7 ; v2packl r15, r16, r17 } + 128c8: [0-9a-f]* { v1ddotpus r5, r6, r7 ; cmplts r15, r16, r17 } + 128d0: [0-9a-f]* { v1ddotpus r5, r6, r7 ; ld2u r15, r16 } + 128d8: [0-9a-f]* { v1ddotpus r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + 128e0: [0-9a-f]* { v1ddotpus r5, r6, r7 ; stnt2 r15, r16 } + 128e8: [0-9a-f]* { v1ddotpus r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + 128f0: [0-9a-f]* { v1ddotpus r5, r6, r7 ; xor r15, r16, r17 } + 128f8: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; icoh r15 } + 12900: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; lnk r15 } + 12908: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; shrs r15, r16, r17 } + 12910: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; v1maxui r15, r16, 5 } + 12918: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; v2shrsi r15, r16, 5 } + 12920: [0-9a-f]* { v1dotp r5, r6, r7 ; dblalign4 r15, r16, r17 } + 12928: [0-9a-f]* { v1dotp r5, r6, r7 ; ld_add r15, r16, 5 } + 12930: [0-9a-f]* { v1dotp r5, r6, r7 ; prefetch_l2_fault r15 } + 12938: [0-9a-f]* { v1dotp r5, r6, r7 ; subx r15, r16, r17 } + 12940: [0-9a-f]* { v1dotp r5, r6, r7 ; v2cmpltui r15, r16, 5 } + 12948: [0-9a-f]* { v1dotpa r5, r6, r7 ; addxi r15, r16, 5 } + 12950: [0-9a-f]* { v1dotpa r5, r6, r7 ; jalr r15 } + 12958: [0-9a-f]* { v1dotpa r5, r6, r7 ; moveli r15, 4660 } + 12960: [0-9a-f]* { v1dotpa r5, r6, r7 ; st r15, r16 } + 12968: [0-9a-f]* { v1dotpa r5, r6, r7 ; v1shli r15, r16, 5 } + 12970: [0-9a-f]* { v1dotpa r5, r6, r7 ; v4addsc r15, r16, r17 } + 12978: [0-9a-f]* { v1dotpu r5, r6, r7 ; fetchadd4 r15, r16, r17 } + 12980: [0-9a-f]* { v1dotpu r5, r6, r7 ; ldnt1u r15, r16 } + 12988: [0-9a-f]* { v1dotpu r5, r6, r7 ; shl r15, r16, r17 } + 12990: [0-9a-f]* { v1dotpu r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + 12998: [0-9a-f]* { v1dotpu r5, r6, r7 ; v2mins r15, r16, r17 } + 129a0: [0-9a-f]* { v1dotpua r5, r6, r7 ; cmpeqi r15, r16, 5 } + 129a8: [0-9a-f]* { v1dotpua r5, r6, r7 ; ld1s_add r15, r16, 5 } + 129b0: [0-9a-f]* { v1dotpua r5, r6, r7 ; ori r15, r16, 5 } + 129b8: [0-9a-f]* { v1dotpua r5, r6, r7 ; st4_add r15, r16, 5 } + 129c0: [0-9a-f]* { v1dotpua r5, r6, r7 ; v1subuc r15, r16, r17 } + 129c8: [0-9a-f]* { v1dotpua r5, r6, r7 ; v4shrs r15, r16, r17 } + 129d0: [0-9a-f]* { v1dotpus r5, r6, r7 ; fetchor4 r15, r16, r17 } + 129d8: [0-9a-f]* { v1dotpus r5, r6, r7 ; ldnt4s r15, r16 } + 129e0: [0-9a-f]* { v1dotpus r5, r6, r7 ; shl3add r15, r16, r17 } + 129e8: [0-9a-f]* { v1dotpus r5, r6, r7 ; v1cmpltui r15, r16, 5 } + 129f0: [0-9a-f]* { v1dotpus r5, r6, r7 ; v2packuc r15, r16, r17 } + 129f8: [0-9a-f]* { v1dotpusa r5, r6, r7 ; cmpltsi r15, r16, 5 } + 12a00: [0-9a-f]* { v1dotpusa r5, r6, r7 ; ld2u_add r15, r16, 5 } + 12a08: [0-9a-f]* { v1dotpusa r5, r6, r7 ; prefetch_add_l3 r15, 5 } + 12a10: [0-9a-f]* { v1dotpusa r5, r6, r7 ; stnt2_add r15, r16, 5 } + 12a18: [0-9a-f]* { v1dotpusa r5, r6, r7 ; v2cmples r15, r16, r17 } + 12a20: [0-9a-f]* { v1dotpusa r5, r6, r7 ; xori r15, r16, 5 } + 12a28: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; v1int_h r15, r16, r17 } + 12a30: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; v1int_h r15, r16, r17 } + 12a38: [0-9a-f]* { v1int_h r15, r16, r17 ; v1addi r5, r6, 5 } + 12a40: [0-9a-f]* { v1int_h r15, r16, r17 ; v1shru r5, r6, r7 } + 12a48: [0-9a-f]* { v1int_h r15, r16, r17 ; v2shlsc r5, r6, r7 } + 12a50: [0-9a-f]* { v1int_h r5, r6, r7 ; dblalign2 r15, r16, r17 } + 12a58: [0-9a-f]* { v1int_h r5, r6, r7 ; ld4u_add r15, r16, 5 } + 12a60: [0-9a-f]* { v1int_h r5, r6, r7 ; prefetch_l2 r15 } + 12a68: [0-9a-f]* { v1int_h r5, r6, r7 ; sub r15, r16, r17 } + 12a70: [0-9a-f]* { v1int_h r5, r6, r7 ; v2cmpltu r15, r16, r17 } + 12a78: [0-9a-f]* { v1int_l r15, r16, r17 ; addx r5, r6, r7 } + 12a80: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; v1int_l r15, r16, r17 } + 12a88: [0-9a-f]* { v1int_l r15, r16, r17 ; mz r5, r6, r7 } + 12a90: [0-9a-f]* { v1int_l r15, r16, r17 ; v1cmpeq r5, r6, r7 } + 12a98: [0-9a-f]* { v1int_l r15, r16, r17 ; v2add r5, r6, r7 } + 12aa0: [0-9a-f]* { v1int_l r15, r16, r17 ; v2shrui r5, r6, 5 } + 12aa8: [0-9a-f]* { v1int_l r5, r6, r7 ; exch r15, r16, r17 } + 12ab0: [0-9a-f]* { v1int_l r5, r6, r7 ; ldnt r15, r16 } + 12ab8: [0-9a-f]* { v1int_l r5, r6, r7 ; raise } + 12ac0: [0-9a-f]* { v1int_l r5, r6, r7 ; v1addi r15, r16, 5 } + 12ac8: [0-9a-f]* { v1int_l r5, r6, r7 ; v2int_l r15, r16, r17 } + 12ad0: [0-9a-f]* { v1maxu r15, r16, r17 ; and r5, r6, r7 } + 12ad8: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; v1maxu r15, r16, r17 } + 12ae0: [0-9a-f]* { v1maxu r15, r16, r17 ; ori r5, r6, 5 } + 12ae8: [0-9a-f]* { v1maxu r15, r16, r17 ; v1cmplts r5, r6, r7 } + 12af0: [0-9a-f]* { v2avgs r5, r6, r7 ; v1maxu r15, r16, r17 } + 12af8: [0-9a-f]* { v1maxu r15, r16, r17 ; v4addsc r5, r6, r7 } + 12b00: [0-9a-f]* { v1maxu r5, r6, r7 ; fetchaddgez r15, r16, r17 } + 12b08: [0-9a-f]* { v1maxu r5, r6, r7 ; ldnt1u_add r15, r16, 5 } + 12b10: [0-9a-f]* { v1maxu r5, r6, r7 ; shl16insli r15, r16, 4660 } + 12b18: [0-9a-f]* { v1maxu r5, r6, r7 ; v1cmples r15, r16, r17 } + 12b20: [0-9a-f]* { v1maxu r5, r6, r7 ; v2minsi r15, r16, 5 } + 12b28: [0-9a-f]* { bfins r5, r6, 5, 7 ; v1maxui r15, r16, 5 } + 12b30: [0-9a-f]* { fsingle_pack1 r5, r6 ; v1maxui r15, r16, 5 } + 12b38: [0-9a-f]* { v1maxui r15, r16, 5 ; rotl r5, r6, r7 } + 12b40: [0-9a-f]* { v1maxui r15, r16, 5 ; v1cmpne r5, r6, r7 } + 12b48: [0-9a-f]* { v1maxui r15, r16, 5 ; v2cmpleu r5, r6, r7 } + 12b50: [0-9a-f]* { v1maxui r15, r16, 5 ; v4shl r5, r6, r7 } + 12b58: [0-9a-f]* { v1maxui r5, r6, 5 ; fetchor r15, r16, r17 } + 12b60: [0-9a-f]* { v1maxui r5, r6, 5 ; ldnt2u_add r15, r16, 5 } + 12b68: [0-9a-f]* { v1maxui r5, r6, 5 ; shl2addx r15, r16, r17 } + 12b70: [0-9a-f]* { v1maxui r5, r6, 5 ; v1cmpltu r15, r16, r17 } + 12b78: [0-9a-f]* { v1maxui r5, r6, 5 ; v2packl r15, r16, r17 } + 12b80: [0-9a-f]* { v1minu r15, r16, r17 ; cmpeq r5, r6, r7 } + 12b88: [0-9a-f]* { v1minu r15, r16, r17 ; infol 4660 } + 12b90: [0-9a-f]* { v1minu r15, r16, r17 ; shl1add r5, r6, r7 } + 12b98: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; v1minu r15, r16, r17 } + 12ba0: [0-9a-f]* { v1minu r15, r16, r17 ; v2cmpltui r5, r6, 5 } + 12ba8: [0-9a-f]* { v1minu r15, r16, r17 ; v4sub r5, r6, r7 } + 12bb0: [0-9a-f]* { v1minu r5, r6, r7 ; flushwb } + 12bb8: [0-9a-f]* { v1minu r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + 12bc0: [0-9a-f]* { v1minu r5, r6, r7 ; shlx r15, r16, r17 } + 12bc8: [0-9a-f]* { v1minu r5, r6, r7 ; v1int_l r15, r16, r17 } + 12bd0: [0-9a-f]* { v1minu r5, r6, r7 ; v2shlsc r15, r16, r17 } + 12bd8: [0-9a-f]* { v1minui r15, r16, 5 ; cmplts r5, r6, r7 } + 12be0: [0-9a-f]* { v1minui r15, r16, 5 ; movei r5, 5 } + 12be8: [0-9a-f]* { v1minui r15, r16, 5 ; shl3add r5, r6, r7 } + 12bf0: [0-9a-f]* { v1dotpua r5, r6, r7 ; v1minui r15, r16, 5 } + 12bf8: [0-9a-f]* { v1minui r15, r16, 5 ; v2int_h r5, r6, r7 } + 12c00: [0-9a-f]* { v1minui r5, r6, 5 ; add r15, r16, r17 } + 12c08: [0-9a-f]* { v1minui r5, r6, 5 ; info 19 } + 12c10: [0-9a-f]* { v1minui r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 12c18: [0-9a-f]* { v1minui r5, r6, 5 ; shru r15, r16, r17 } + 12c20: [0-9a-f]* { v1minui r5, r6, 5 ; v1minui r15, r16, 5 } + 12c28: [0-9a-f]* { v1minui r5, r6, 5 ; v2shrui r15, r16, 5 } + 12c30: [0-9a-f]* { v1mnz r15, r16, r17 ; cmpne r5, r6, r7 } + 12c38: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; v1mnz r15, r16, r17 } + 12c40: [0-9a-f]* { v1mnz r15, r16, r17 ; shlxi r5, r6, 5 } + 12c48: [0-9a-f]* { v1mnz r15, r16, r17 ; v1int_l r5, r6, r7 } + 12c50: [0-9a-f]* { v1mnz r15, r16, r17 ; v2mins r5, r6, r7 } + 12c58: [0-9a-f]* { v1mnz r5, r6, r7 ; addxi r15, r16, 5 } + 12c60: [0-9a-f]* { v1mnz r5, r6, r7 ; jalr r15 } + 12c68: [0-9a-f]* { v1mnz r5, r6, r7 ; moveli r15, 4660 } + 12c70: [0-9a-f]* { v1mnz r5, r6, r7 ; st r15, r16 } + 12c78: [0-9a-f]* { v1mnz r5, r6, r7 ; v1shli r15, r16, 5 } + 12c80: [0-9a-f]* { v1mnz r5, r6, r7 ; v4addsc r15, r16, r17 } + 12c88: [0-9a-f]* { v1multu r5, r6, r7 ; fetchadd4 r15, r16, r17 } + 12c90: [0-9a-f]* { v1multu r5, r6, r7 ; ldnt1u r15, r16 } + 12c98: [0-9a-f]* { v1multu r5, r6, r7 ; shl r15, r16, r17 } + 12ca0: [0-9a-f]* { v1multu r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + 12ca8: [0-9a-f]* { v1multu r5, r6, r7 ; v2mins r15, r16, r17 } + 12cb0: [0-9a-f]* { v1mulu r5, r6, r7 ; cmpeqi r15, r16, 5 } + 12cb8: [0-9a-f]* { v1mulu r5, r6, r7 ; ld1s_add r15, r16, 5 } + 12cc0: [0-9a-f]* { v1mulu r5, r6, r7 ; ori r15, r16, 5 } + 12cc8: [0-9a-f]* { v1mulu r5, r6, r7 ; st4_add r15, r16, 5 } + 12cd0: [0-9a-f]* { v1mulu r5, r6, r7 ; v1subuc r15, r16, r17 } + 12cd8: [0-9a-f]* { v1mulu r5, r6, r7 ; v4shrs r15, r16, r17 } + 12ce0: [0-9a-f]* { v1mulus r5, r6, r7 ; fetchor4 r15, r16, r17 } + 12ce8: [0-9a-f]* { v1mulus r5, r6, r7 ; ldnt4s r15, r16 } + 12cf0: [0-9a-f]* { v1mulus r5, r6, r7 ; shl3add r15, r16, r17 } + 12cf8: [0-9a-f]* { v1mulus r5, r6, r7 ; v1cmpltui r15, r16, 5 } + 12d00: [0-9a-f]* { v1mulus r5, r6, r7 ; v2packuc r15, r16, r17 } + 12d08: [0-9a-f]* { v1mz r15, r16, r17 ; cmpeqi r5, r6, 5 } + 12d10: [0-9a-f]* { mm r5, r6, 5, 7 ; v1mz r15, r16, r17 } + 12d18: [0-9a-f]* { v1mz r15, r16, r17 ; shl1addx r5, r6, r7 } + 12d20: [0-9a-f]* { v1dotp r5, r6, r7 ; v1mz r15, r16, r17 } + 12d28: [0-9a-f]* { v1mz r15, r16, r17 ; v2cmpne r5, r6, r7 } + 12d30: [0-9a-f]* { v1mz r15, r16, r17 ; v4subsc r5, r6, r7 } + 12d38: [0-9a-f]* { v1mz r5, r6, r7 } + 12d40: [0-9a-f]* { v1mz r5, r6, r7 ; ldnt_add r15, r16, 5 } + 12d48: [0-9a-f]* { v1mz r5, r6, r7 ; shlxi r15, r16, 5 } + 12d50: [0-9a-f]* { v1mz r5, r6, r7 ; v1maxu r15, r16, r17 } + 12d58: [0-9a-f]* { v1mz r5, r6, r7 ; v2shrs r15, r16, r17 } + 12d60: [0-9a-f]* { v1sadau r5, r6, r7 ; dblalign2 r15, r16, r17 } + 12d68: [0-9a-f]* { v1sadau r5, r6, r7 ; ld4u_add r15, r16, 5 } + 12d70: [0-9a-f]* { v1sadau r5, r6, r7 ; prefetch_l2 r15 } + 12d78: [0-9a-f]* { v1sadau r5, r6, r7 ; sub r15, r16, r17 } + 12d80: [0-9a-f]* { v1sadau r5, r6, r7 ; v2cmpltu r15, r16, r17 } + 12d88: [0-9a-f]* { v1sadu r5, r6, r7 ; addx r15, r16, r17 } + 12d90: [0-9a-f]* { v1sadu r5, r6, r7 ; iret } + 12d98: [0-9a-f]* { v1sadu r5, r6, r7 ; movei r15, 5 } + 12da0: [0-9a-f]* { v1sadu r5, r6, r7 ; shruxi r15, r16, 5 } + 12da8: [0-9a-f]* { v1sadu r5, r6, r7 ; v1shl r15, r16, r17 } + 12db0: [0-9a-f]* { v1sadu r5, r6, r7 ; v4add r15, r16, r17 } + 12db8: [0-9a-f]* { cmulaf r5, r6, r7 ; v1shl r15, r16, r17 } + 12dc0: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; v1shl r15, r16, r17 } + 12dc8: [0-9a-f]* { v1shl r15, r16, r17 ; shru r5, r6, r7 } + 12dd0: [0-9a-f]* { v1shl r15, r16, r17 ; v1minu r5, r6, r7 } + 12dd8: [0-9a-f]* { v2mulfsc r5, r6, r7 ; v1shl r15, r16, r17 } + 12de0: [0-9a-f]* { v1shl r5, r6, r7 ; and r15, r16, r17 } + 12de8: [0-9a-f]* { v1shl r5, r6, r7 ; jrp r15 } + 12df0: [0-9a-f]* { v1shl r5, r6, r7 ; nop } + 12df8: [0-9a-f]* { v1shl r5, r6, r7 ; st2 r15, r16 } + 12e00: [0-9a-f]* { v1shl r5, r6, r7 ; v1shru r15, r16, r17 } + 12e08: [0-9a-f]* { v1shl r5, r6, r7 ; v4packsc r15, r16, r17 } + 12e10: [0-9a-f]* { cmulhr r5, r6, r7 ; v1shli r15, r16, 5 } + 12e18: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; v1shli r15, r16, 5 } + 12e20: [0-9a-f]* { shufflebytes r5, r6, r7 ; v1shli r15, r16, 5 } + 12e28: [0-9a-f]* { v1mulu r5, r6, r7 ; v1shli r15, r16, 5 } + 12e30: [0-9a-f]* { v1shli r15, r16, 5 ; v2packh r5, r6, r7 } + 12e38: [0-9a-f]* { v1shli r5, r6, 5 ; cmpexch r15, r16, r17 } + 12e40: [0-9a-f]* { v1shli r5, r6, 5 ; ld1u r15, r16 } + 12e48: [0-9a-f]* { v1shli r5, r6, 5 ; prefetch r15 } + 12e50: [0-9a-f]* { v1shli r5, r6, 5 ; st_add r15, r16, 5 } + 12e58: [0-9a-f]* { v1shli r5, r6, 5 ; v2add r15, r16, r17 } + 12e60: [0-9a-f]* { v1shli r5, r6, 5 ; v4shru r15, r16, r17 } + 12e68: [0-9a-f]* { dblalign r5, r6, r7 ; v1shrs r15, r16, r17 } + 12e70: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; v1shrs r15, r16, r17 } + 12e78: [0-9a-f]* { tblidxb0 r5, r6 ; v1shrs r15, r16, r17 } + 12e80: [0-9a-f]* { v1sadu r5, r6, r7 ; v1shrs r15, r16, r17 } + 12e88: [0-9a-f]* { v2sadau r5, r6, r7 ; v1shrs r15, r16, r17 } + 12e90: [0-9a-f]* { v1shrs r5, r6, r7 ; cmplts r15, r16, r17 } + 12e98: [0-9a-f]* { v1shrs r5, r6, r7 ; ld2u r15, r16 } + 12ea0: [0-9a-f]* { v1shrs r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + 12ea8: [0-9a-f]* { v1shrs r5, r6, r7 ; stnt2 r15, r16 } + 12eb0: [0-9a-f]* { v1shrs r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + 12eb8: [0-9a-f]* { v1shrs r5, r6, r7 ; xor r15, r16, r17 } + 12ec0: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; v1shrsi r15, r16, 5 } + 12ec8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; v1shrsi r15, r16, 5 } + 12ed0: [0-9a-f]* { v1shrsi r15, r16, 5 ; v1add r5, r6, r7 } + 12ed8: [0-9a-f]* { v1shrsi r15, r16, 5 ; v1shrsi r5, r6, 5 } + 12ee0: [0-9a-f]* { v1shrsi r15, r16, 5 ; v2shli r5, r6, 5 } + 12ee8: [0-9a-f]* { v1shrsi r5, r6, 5 ; cmpne r15, r16, r17 } + 12ef0: [0-9a-f]* { v1shrsi r5, r6, 5 ; ld4u r15, r16 } + 12ef8: [0-9a-f]* { v1shrsi r5, r6, 5 ; prefetch_l1_fault r15 } + 12f00: [0-9a-f]* { v1shrsi r5, r6, 5 ; stnt_add r15, r16, 5 } + 12f08: [0-9a-f]* { v1shrsi r5, r6, 5 ; v2cmpltsi r15, r16, 5 } + 12f10: [0-9a-f]* { v1shru r15, r16, r17 ; addli r5, r6, 4660 } + 12f18: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; v1shru r15, r16, r17 } + 12f20: [0-9a-f]* { mulx r5, r6, r7 ; v1shru r15, r16, r17 } + 12f28: [0-9a-f]* { v1avgu r5, r6, r7 ; v1shru r15, r16, r17 } + 12f30: [0-9a-f]* { v1shru r15, r16, r17 ; v1subuc r5, r6, r7 } + 12f38: [0-9a-f]* { v1shru r15, r16, r17 ; v2shru r5, r6, r7 } + 12f40: [0-9a-f]* { v1shru r5, r6, r7 ; dtlbpr r15 } + 12f48: [0-9a-f]* { v1shru r5, r6, r7 ; ldna_add r15, r16, 5 } + 12f50: [0-9a-f]* { v1shru r5, r6, r7 ; prefetch_l3_fault r15 } + 12f58: [0-9a-f]* { v1shru r5, r6, r7 ; v1add r15, r16, r17 } + 12f60: [0-9a-f]* { v1shru r5, r6, r7 ; v2int_h r15, r16, r17 } + 12f68: [0-9a-f]* { v1shrui r15, r16, 5 ; addxsc r5, r6, r7 } + 12f70: [0-9a-f]* { v1shrui r15, r16, 5 } + 12f78: [0-9a-f]* { v1shrui r15, r16, 5 ; or r5, r6, r7 } + 12f80: [0-9a-f]* { v1shrui r15, r16, 5 ; v1cmpleu r5, r6, r7 } + 12f88: [0-9a-f]* { v2adiffs r5, r6, r7 ; v1shrui r15, r16, 5 } + 12f90: [0-9a-f]* { v1shrui r15, r16, 5 ; v4add r5, r6, r7 } + 12f98: [0-9a-f]* { v1shrui r5, r6, 5 ; fetchadd4 r15, r16, r17 } + 12fa0: [0-9a-f]* { v1shrui r5, r6, 5 ; ldnt1u r15, r16 } + 12fa8: [0-9a-f]* { v1shrui r5, r6, 5 ; shl r15, r16, r17 } + 12fb0: [0-9a-f]* { v1shrui r5, r6, 5 ; v1cmpeqi r15, r16, 5 } + 12fb8: [0-9a-f]* { v1shrui r5, r6, 5 ; v2mins r15, r16, r17 } + 12fc0: [0-9a-f]* { bfextu r5, r6, 5, 7 ; v1sub r15, r16, r17 } + 12fc8: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; v1sub r15, r16, r17 } + 12fd0: [0-9a-f]* { revbytes r5, r6 ; v1sub r15, r16, r17 } + 12fd8: [0-9a-f]* { v1sub r15, r16, r17 ; v1cmpltui r5, r6, 5 } + 12fe0: [0-9a-f]* { v1sub r15, r16, r17 ; v2cmples r5, r6, r7 } + 12fe8: [0-9a-f]* { v1sub r15, r16, r17 ; v4packsc r5, r6, r7 } + 12ff0: [0-9a-f]* { v1sub r5, r6, r7 ; fetchand4 r15, r16, r17 } + 12ff8: [0-9a-f]* { v1sub r5, r6, r7 ; ldnt2u r15, r16 } + 13000: [0-9a-f]* { v1sub r5, r6, r7 ; shl2add r15, r16, r17 } + 13008: [0-9a-f]* { v1sub r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + 13010: [0-9a-f]* { v1sub r5, r6, r7 ; v2packh r15, r16, r17 } + 13018: [0-9a-f]* { cmovnez r5, r6, r7 ; v1subuc r15, r16, r17 } + 13020: [0-9a-f]* { v1subuc r15, r16, r17 ; info 19 } + 13028: [0-9a-f]* { v1subuc r15, r16, r17 ; shl16insli r5, r6, 4660 } + 13030: [0-9a-f]* { v1ddotpus r5, r6, r7 ; v1subuc r15, r16, r17 } + 13038: [0-9a-f]* { v1subuc r15, r16, r17 ; v2cmpltu r5, r6, r7 } + 13040: [0-9a-f]* { v1subuc r15, r16, r17 ; v4shru r5, r6, r7 } + 13048: [0-9a-f]* { v1subuc r5, r6, r7 ; flush r15 } + 13050: [0-9a-f]* { v1subuc r5, r6, r7 ; ldnt4u r15, r16 } + 13058: [0-9a-f]* { v1subuc r5, r6, r7 ; shli r15, r16, 5 } + 13060: [0-9a-f]* { v1subuc r5, r6, r7 ; v1int_h r15, r16, r17 } + 13068: [0-9a-f]* { v1subuc r5, r6, r7 ; v2shli r15, r16, 5 } + 13070: [0-9a-f]* { v2add r15, r16, r17 ; cmpleu r5, r6, r7 } + 13078: [0-9a-f]* { v2add r15, r16, r17 ; move r5, r6 } + 13080: [0-9a-f]* { v2add r15, r16, r17 ; shl2addx r5, r6, r7 } + 13088: [0-9a-f]* { v1dotpu r5, r6, r7 ; v2add r15, r16, r17 } + 13090: [0-9a-f]* { v2dotpa r5, r6, r7 ; v2add r15, r16, r17 } + 13098: [0-9a-f]* { v2add r15, r16, r17 ; xori r5, r6, 5 } + 130a0: [0-9a-f]* { v2add r5, r6, r7 ; ill } + 130a8: [0-9a-f]* { v2add r5, r6, r7 ; mf } + 130b0: [0-9a-f]* { v2add r5, r6, r7 ; shrsi r15, r16, 5 } + 130b8: [0-9a-f]* { v2add r5, r6, r7 ; v1minu r15, r16, r17 } + 130c0: [0-9a-f]* { v2add r5, r6, r7 ; v2shru r15, r16, r17 } + 130c8: [0-9a-f]* { v2addi r15, r16, 5 ; cmpltui r5, r6, 5 } + 130d0: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; v2addi r15, r16, 5 } + 130d8: [0-9a-f]* { v2addi r15, r16, 5 ; shlx r5, r6, r7 } + 130e0: [0-9a-f]* { v2addi r15, r16, 5 ; v1int_h r5, r6, r7 } + 130e8: [0-9a-f]* { v2addi r15, r16, 5 ; v2maxsi r5, r6, 5 } + 130f0: [0-9a-f]* { v2addi r5, r6, 5 ; addx r15, r16, r17 } + 130f8: [0-9a-f]* { v2addi r5, r6, 5 ; iret } + 13100: [0-9a-f]* { v2addi r5, r6, 5 ; movei r15, 5 } + 13108: [0-9a-f]* { v2addi r5, r6, 5 ; shruxi r15, r16, 5 } + 13110: [0-9a-f]* { v2addi r5, r6, 5 ; v1shl r15, r16, r17 } + 13118: [0-9a-f]* { v2addi r5, r6, 5 ; v4add r15, r16, r17 } + 13120: [0-9a-f]* { cmulaf r5, r6, r7 ; v2addsc r15, r16, r17 } + 13128: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; v2addsc r15, r16, r17 } + 13130: [0-9a-f]* { v2addsc r15, r16, r17 ; shru r5, r6, r7 } + 13138: [0-9a-f]* { v2addsc r15, r16, r17 ; v1minu r5, r6, r7 } + 13140: [0-9a-f]* { v2mulfsc r5, r6, r7 ; v2addsc r15, r16, r17 } + 13148: [0-9a-f]* { v2addsc r5, r6, r7 ; and r15, r16, r17 } + 13150: [0-9a-f]* { v2addsc r5, r6, r7 ; jrp r15 } + 13158: [0-9a-f]* { v2addsc r5, r6, r7 ; nop } + 13160: [0-9a-f]* { v2addsc r5, r6, r7 ; st2 r15, r16 } + 13168: [0-9a-f]* { v2addsc r5, r6, r7 ; v1shru r15, r16, r17 } + 13170: [0-9a-f]* { v2addsc r5, r6, r7 ; v4packsc r15, r16, r17 } + 13178: [0-9a-f]* { v2adiffs r5, r6, r7 ; fetchand r15, r16, r17 } + 13180: [0-9a-f]* { v2adiffs r5, r6, r7 ; ldnt2s_add r15, r16, 5 } + 13188: [0-9a-f]* { v2adiffs r5, r6, r7 ; shl1addx r15, r16, r17 } + 13190: [0-9a-f]* { v2adiffs r5, r6, r7 ; v1cmplts r15, r16, r17 } + 13198: [0-9a-f]* { v2adiffs r5, r6, r7 ; v2mz r15, r16, r17 } + 131a0: [0-9a-f]* { v2avgs r5, r6, r7 ; cmples r15, r16, r17 } + 131a8: [0-9a-f]* { v2avgs r5, r6, r7 ; ld2s r15, r16 } + 131b0: [0-9a-f]* { v2avgs r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + 131b8: [0-9a-f]* { v2avgs r5, r6, r7 ; stnt1 r15, r16 } + 131c0: [0-9a-f]* { v2avgs r5, r6, r7 ; v2addsc r15, r16, r17 } + 131c8: [0-9a-f]* { v2avgs r5, r6, r7 ; v4subsc r15, r16, r17 } + 131d0: [0-9a-f]* { v2cmpeq r15, r16, r17 ; dblalign4 r5, r6, r7 } + 131d8: [0-9a-f]* { mula_hu_ls r5, r6, r7 ; v2cmpeq r15, r16, r17 } + 131e0: [0-9a-f]* { tblidxb2 r5, r6 ; v2cmpeq r15, r16, r17 } + 131e8: [0-9a-f]* { v2cmpeq r15, r16, r17 ; v1shli r5, r6, 5 } + 131f0: [0-9a-f]* { v2sadu r5, r6, r7 ; v2cmpeq r15, r16, r17 } + 131f8: [0-9a-f]* { v2cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 } + 13200: [0-9a-f]* { v2cmpeq r5, r6, r7 ; ld4s r15, r16 } + 13208: [0-9a-f]* { v2cmpeq r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + 13210: [0-9a-f]* { v2cmpeq r5, r6, r7 ; stnt4 r15, r16 } + 13218: [0-9a-f]* { v2cmpeq r5, r6, r7 ; v2cmpleu r15, r16, r17 } + 13220: [0-9a-f]* { v2cmpeqi r15, r16, 5 ; add r5, r6, r7 } + 13228: [0-9a-f]* { fdouble_mul_flags r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + 13230: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + 13238: [0-9a-f]* { v2cmpeqi r15, r16, 5 ; v1adduc r5, r6, r7 } + 13240: [0-9a-f]* { v2cmpeqi r15, r16, 5 ; v1shrui r5, r6, 5 } + 13248: [0-9a-f]* { v2cmpeqi r15, r16, 5 ; v2shrs r5, r6, r7 } + 13250: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; dblalign4 r15, r16, r17 } + 13258: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; ld_add r15, r16, 5 } + 13260: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; prefetch_l2_fault r15 } + 13268: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; subx r15, r16, r17 } + 13270: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; v2cmpltui r15, r16, 5 } + 13278: [0-9a-f]* { v2cmples r15, r16, r17 ; addxi r5, r6, 5 } + 13280: [0-9a-f]* { fdouble_unpack_max r5, r6, r7 ; v2cmples r15, r16, r17 } + 13288: [0-9a-f]* { v2cmples r15, r16, r17 ; nop } + 13290: [0-9a-f]* { v2cmples r15, r16, r17 ; v1cmpeqi r5, r6, 5 } + 13298: [0-9a-f]* { v2cmples r15, r16, r17 ; v2addi r5, r6, 5 } + 132a0: [0-9a-f]* { v2cmples r15, r16, r17 ; v2sub r5, r6, r7 } + 132a8: [0-9a-f]* { v2cmples r5, r6, r7 ; exch4 r15, r16, r17 } + 132b0: [0-9a-f]* { v2cmples r5, r6, r7 ; ldnt1s r15, r16 } + 132b8: [0-9a-f]* { v2cmples r5, r6, r7 ; rotl r15, r16, r17 } + 132c0: [0-9a-f]* { v2cmples r5, r6, r7 ; v1adduc r15, r16, r17 } + 132c8: [0-9a-f]* { v2cmples r5, r6, r7 ; v2maxs r15, r16, r17 } + 132d0: [0-9a-f]* { v2cmpleu r15, r16, r17 ; andi r5, r6, 5 } + 132d8: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; v2cmpleu r15, r16, r17 } + 132e0: [0-9a-f]* { pcnt r5, r6 ; v2cmpleu r15, r16, r17 } + 132e8: [0-9a-f]* { v2cmpleu r15, r16, r17 ; v1cmpltsi r5, r6, 5 } + 132f0: [0-9a-f]* { v2cmpleu r15, r16, r17 ; v2cmpeq r5, r6, r7 } + 132f8: [0-9a-f]* { v2cmpleu r15, r16, r17 ; v4int_h r5, r6, r7 } + 13300: [0-9a-f]* { v2cmpleu r5, r6, r7 ; fetchaddgez4 r15, r16, r17 } + 13308: [0-9a-f]* { v2cmpleu r5, r6, r7 ; ldnt2s r15, r16 } + 13310: [0-9a-f]* { v2cmpleu r5, r6, r7 ; shl1add r15, r16, r17 } + 13318: [0-9a-f]* { v2cmpleu r5, r6, r7 ; v1cmpleu r15, r16, r17 } + 13320: [0-9a-f]* { v2cmpleu r5, r6, r7 ; v2mnz r15, r16, r17 } + 13328: [0-9a-f]* { clz r5, r6 ; v2cmplts r15, r16, r17 } + 13330: [0-9a-f]* { fsingle_pack2 r5, r6, r7 ; v2cmplts r15, r16, r17 } + 13338: [0-9a-f]* { v2cmplts r15, r16, r17 ; rotli r5, r6, 5 } + 13340: [0-9a-f]* { v1ddotpu r5, r6, r7 ; v2cmplts r15, r16, r17 } + 13348: [0-9a-f]* { v2cmplts r15, r16, r17 ; v2cmplts r5, r6, r7 } + 13350: [0-9a-f]* { v2cmplts r15, r16, r17 ; v4shlsc r5, r6, r7 } + 13358: [0-9a-f]* { v2cmplts r5, r6, r7 ; fetchor4 r15, r16, r17 } + 13360: [0-9a-f]* { v2cmplts r5, r6, r7 ; ldnt4s r15, r16 } + 13368: [0-9a-f]* { v2cmplts r5, r6, r7 ; shl3add r15, r16, r17 } + 13370: [0-9a-f]* { v2cmplts r5, r6, r7 ; v1cmpltui r15, r16, 5 } + 13378: [0-9a-f]* { v2cmplts r5, r6, r7 ; v2packuc r15, r16, r17 } + 13380: [0-9a-f]* { v2cmpltsi r15, r16, 5 ; cmpeqi r5, r6, 5 } + 13388: [0-9a-f]* { mm r5, r6, 5, 7 ; v2cmpltsi r15, r16, 5 } + 13390: [0-9a-f]* { v2cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 } + 13398: [0-9a-f]* { v1dotp r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + 133a0: [0-9a-f]* { v2cmpltsi r15, r16, 5 ; v2cmpne r5, r6, r7 } + 133a8: [0-9a-f]* { v2cmpltsi r15, r16, 5 ; v4subsc r5, r6, r7 } + 133b0: [0-9a-f]* { v2cmpltsi r5, r6, 5 } + 133b8: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; ldnt_add r15, r16, 5 } + 133c0: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; shlxi r15, r16, 5 } + 133c8: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; v1maxu r15, r16, r17 } + 133d0: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; v2shrs r15, r16, r17 } + 133d8: [0-9a-f]* { v2cmpltu r15, r16, r17 ; cmpltsi r5, r6, 5 } + 133e0: [0-9a-f]* { v2cmpltu r15, r16, r17 ; moveli r5, 4660 } + 133e8: [0-9a-f]* { v2cmpltu r15, r16, r17 ; shl3addx r5, r6, r7 } + 133f0: [0-9a-f]* { v1dotpus r5, r6, r7 ; v2cmpltu r15, r16, r17 } + 133f8: [0-9a-f]* { v2cmpltu r15, r16, r17 ; v2int_l r5, r6, r7 } + 13400: [0-9a-f]* { v2cmpltu r5, r6, r7 ; addi r15, r16, 5 } + 13408: [0-9a-f]* { v2cmpltu r5, r6, r7 ; infol 4660 } + 13410: [0-9a-f]* { v2cmpltu r5, r6, r7 ; mnz r15, r16, r17 } + 13418: [0-9a-f]* { v2cmpltu r5, r6, r7 ; shrui r15, r16, 5 } + 13420: [0-9a-f]* { v2cmpltu r5, r6, r7 ; v1mnz r15, r16, r17 } + 13428: [0-9a-f]* { v2cmpltu r5, r6, r7 ; v2sub r15, r16, r17 } + 13430: [0-9a-f]* { cmul r5, r6, r7 ; v2cmpltui r15, r16, 5 } + 13438: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; v2cmpltui r15, r16, 5 } + 13440: [0-9a-f]* { v2cmpltui r15, r16, 5 ; shrs r5, r6, r7 } + 13448: [0-9a-f]* { v2cmpltui r15, r16, 5 ; v1maxu r5, r6, r7 } + 13450: [0-9a-f]* { v2cmpltui r15, r16, 5 ; v2minsi r5, r6, 5 } + 13458: [0-9a-f]* { v2cmpltui r5, r6, 5 ; addxli r15, r16, 4660 } + 13460: [0-9a-f]* { v2cmpltui r5, r6, 5 ; jalrp r15 } + 13468: [0-9a-f]* { v2cmpltui r5, r6, 5 ; mtspr MEM_ERROR_CBOX_ADDR, r16 } + 13470: [0-9a-f]* { v2cmpltui r5, r6, 5 ; st1 r15, r16 } + 13478: [0-9a-f]* { v2cmpltui r5, r6, 5 ; v1shrs r15, r16, r17 } + 13480: [0-9a-f]* { v2cmpltui r5, r6, 5 ; v4int_h r15, r16, r17 } + 13488: [0-9a-f]* { cmulfr r5, r6, r7 ; v2cmpne r15, r16, r17 } + 13490: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; v2cmpne r15, r16, r17 } + 13498: [0-9a-f]* { v2cmpne r15, r16, r17 ; shrux r5, r6, r7 } + 134a0: [0-9a-f]* { v2cmpne r15, r16, r17 ; v1mnz r5, r6, r7 } + 134a8: [0-9a-f]* { v2mults r5, r6, r7 ; v2cmpne r15, r16, r17 } + 134b0: [0-9a-f]* { v2cmpne r5, r6, r7 ; cmpeq r15, r16, r17 } + 134b8: [0-9a-f]* { v2cmpne r5, r6, r7 ; ld1s r15, r16 } + 134c0: [0-9a-f]* { v2cmpne r5, r6, r7 ; or r15, r16, r17 } + 134c8: [0-9a-f]* { v2cmpne r5, r6, r7 ; st4 r15, r16 } + 134d0: [0-9a-f]* { v2cmpne r5, r6, r7 ; v1sub r15, r16, r17 } + 134d8: [0-9a-f]* { v2cmpne r5, r6, r7 ; v4shlsc r15, r16, r17 } + 134e0: [0-9a-f]* { v2dotp r5, r6, r7 ; fetchor r15, r16, r17 } + 134e8: [0-9a-f]* { v2dotp r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + 134f0: [0-9a-f]* { v2dotp r5, r6, r7 ; shl2addx r15, r16, r17 } + 134f8: [0-9a-f]* { v2dotp r5, r6, r7 ; v1cmpltu r15, r16, r17 } + 13500: [0-9a-f]* { v2dotp r5, r6, r7 ; v2packl r15, r16, r17 } + 13508: [0-9a-f]* { v2dotpa r5, r6, r7 ; cmplts r15, r16, r17 } + 13510: [0-9a-f]* { v2dotpa r5, r6, r7 ; ld2u r15, r16 } + 13518: [0-9a-f]* { v2dotpa r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + 13520: [0-9a-f]* { v2dotpa r5, r6, r7 ; stnt2 r15, r16 } + 13528: [0-9a-f]* { v2dotpa r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + 13530: [0-9a-f]* { v2dotpa r5, r6, r7 ; xor r15, r16, r17 } + 13538: [0-9a-f]* { fdouble_add_flags r5, r6, r7 ; v2int_h r15, r16, r17 } + 13540: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; v2int_h r15, r16, r17 } + 13548: [0-9a-f]* { v2int_h r15, r16, r17 ; v1add r5, r6, r7 } + 13550: [0-9a-f]* { v2int_h r15, r16, r17 ; v1shrsi r5, r6, 5 } + 13558: [0-9a-f]* { v2int_h r15, r16, r17 ; v2shli r5, r6, 5 } + 13560: [0-9a-f]* { v2int_h r5, r6, r7 ; cmpne r15, r16, r17 } + 13568: [0-9a-f]* { v2int_h r5, r6, r7 ; ld4u r15, r16 } + 13570: [0-9a-f]* { v2int_h r5, r6, r7 ; prefetch_l1_fault r15 } + 13578: [0-9a-f]* { v2int_h r5, r6, r7 ; stnt_add r15, r16, 5 } + 13580: [0-9a-f]* { v2int_h r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + 13588: [0-9a-f]* { v2int_l r15, r16, r17 ; addli r5, r6, 4660 } + 13590: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; v2int_l r15, r16, r17 } + 13598: [0-9a-f]* { mulx r5, r6, r7 ; v2int_l r15, r16, r17 } + 135a0: [0-9a-f]* { v1avgu r5, r6, r7 ; v2int_l r15, r16, r17 } + 135a8: [0-9a-f]* { v2int_l r15, r16, r17 ; v1subuc r5, r6, r7 } + 135b0: [0-9a-f]* { v2int_l r15, r16, r17 ; v2shru r5, r6, r7 } + 135b8: [0-9a-f]* { v2int_l r5, r6, r7 ; dtlbpr r15 } + 135c0: [0-9a-f]* { v2int_l r5, r6, r7 ; ldna_add r15, r16, 5 } + 135c8: [0-9a-f]* { v2int_l r5, r6, r7 ; prefetch_l3_fault r15 } + 135d0: [0-9a-f]* { v2int_l r5, r6, r7 ; v1add r15, r16, r17 } + 135d8: [0-9a-f]* { v2int_l r5, r6, r7 ; v2int_h r15, r16, r17 } + 135e0: [0-9a-f]* { v2maxs r15, r16, r17 ; addxsc r5, r6, r7 } + 135e8: [0-9a-f]* { v2maxs r15, r16, r17 } + 135f0: [0-9a-f]* { v2maxs r15, r16, r17 ; or r5, r6, r7 } + 135f8: [0-9a-f]* { v2maxs r15, r16, r17 ; v1cmpleu r5, r6, r7 } + 13600: [0-9a-f]* { v2adiffs r5, r6, r7 ; v2maxs r15, r16, r17 } + 13608: [0-9a-f]* { v2maxs r15, r16, r17 ; v4add r5, r6, r7 } + 13610: [0-9a-f]* { v2maxs r5, r6, r7 ; fetchadd4 r15, r16, r17 } + 13618: [0-9a-f]* { v2maxs r5, r6, r7 ; ldnt1u r15, r16 } + 13620: [0-9a-f]* { v2maxs r5, r6, r7 ; shl r15, r16, r17 } + 13628: [0-9a-f]* { v2maxs r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + 13630: [0-9a-f]* { v2maxs r5, r6, r7 ; v2mins r15, r16, r17 } + 13638: [0-9a-f]* { bfextu r5, r6, 5, 7 ; v2maxsi r15, r16, 5 } + 13640: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; v2maxsi r15, r16, 5 } + 13648: [0-9a-f]* { revbytes r5, r6 ; v2maxsi r15, r16, 5 } + 13650: [0-9a-f]* { v2maxsi r15, r16, 5 ; v1cmpltui r5, r6, 5 } + 13658: [0-9a-f]* { v2maxsi r15, r16, 5 ; v2cmples r5, r6, r7 } + 13660: [0-9a-f]* { v2maxsi r15, r16, 5 ; v4packsc r5, r6, r7 } + 13668: [0-9a-f]* { v2maxsi r5, r6, 5 ; fetchand4 r15, r16, r17 } + 13670: [0-9a-f]* { v2maxsi r5, r6, 5 ; ldnt2u r15, r16 } + 13678: [0-9a-f]* { v2maxsi r5, r6, 5 ; shl2add r15, r16, r17 } + 13680: [0-9a-f]* { v2maxsi r5, r6, 5 ; v1cmpltsi r15, r16, 5 } + 13688: [0-9a-f]* { v2maxsi r5, r6, 5 ; v2packh r15, r16, r17 } + 13690: [0-9a-f]* { cmovnez r5, r6, r7 ; v2mins r15, r16, r17 } + 13698: [0-9a-f]* { v2mins r15, r16, r17 ; info 19 } + 136a0: [0-9a-f]* { v2mins r15, r16, r17 ; shl16insli r5, r6, 4660 } + 136a8: [0-9a-f]* { v1ddotpus r5, r6, r7 ; v2mins r15, r16, r17 } + 136b0: [0-9a-f]* { v2mins r15, r16, r17 ; v2cmpltu r5, r6, r7 } + 136b8: [0-9a-f]* { v2mins r15, r16, r17 ; v4shru r5, r6, r7 } + 136c0: [0-9a-f]* { v2mins r5, r6, r7 ; flush r15 } + 136c8: [0-9a-f]* { v2mins r5, r6, r7 ; ldnt4u r15, r16 } + 136d0: [0-9a-f]* { v2mins r5, r6, r7 ; shli r15, r16, 5 } + 136d8: [0-9a-f]* { v2mins r5, r6, r7 ; v1int_h r15, r16, r17 } + 136e0: [0-9a-f]* { v2mins r5, r6, r7 ; v2shli r15, r16, 5 } + 136e8: [0-9a-f]* { v2minsi r15, r16, 5 ; cmpleu r5, r6, r7 } + 136f0: [0-9a-f]* { v2minsi r15, r16, 5 ; move r5, r6 } + 136f8: [0-9a-f]* { v2minsi r15, r16, 5 ; shl2addx r5, r6, r7 } + 13700: [0-9a-f]* { v1dotpu r5, r6, r7 ; v2minsi r15, r16, 5 } + 13708: [0-9a-f]* { v2dotpa r5, r6, r7 ; v2minsi r15, r16, 5 } + 13710: [0-9a-f]* { v2minsi r15, r16, 5 ; xori r5, r6, 5 } + 13718: [0-9a-f]* { v2minsi r5, r6, 5 ; ill } + 13720: [0-9a-f]* { v2minsi r5, r6, 5 ; mf } + 13728: [0-9a-f]* { v2minsi r5, r6, 5 ; shrsi r15, r16, 5 } + 13730: [0-9a-f]* { v2minsi r5, r6, 5 ; v1minu r15, r16, r17 } + 13738: [0-9a-f]* { v2minsi r5, r6, 5 ; v2shru r15, r16, r17 } + 13740: [0-9a-f]* { v2mnz r15, r16, r17 ; cmpltui r5, r6, 5 } + 13748: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; v2mnz r15, r16, r17 } + 13750: [0-9a-f]* { v2mnz r15, r16, r17 ; shlx r5, r6, r7 } + 13758: [0-9a-f]* { v2mnz r15, r16, r17 ; v1int_h r5, r6, r7 } + 13760: [0-9a-f]* { v2mnz r15, r16, r17 ; v2maxsi r5, r6, 5 } + 13768: [0-9a-f]* { v2mnz r5, r6, r7 ; addx r15, r16, r17 } + 13770: [0-9a-f]* { v2mnz r5, r6, r7 ; iret } + 13778: [0-9a-f]* { v2mnz r5, r6, r7 ; movei r15, 5 } + 13780: [0-9a-f]* { v2mnz r5, r6, r7 ; shruxi r15, r16, 5 } + 13788: [0-9a-f]* { v2mnz r5, r6, r7 ; v1shl r15, r16, r17 } + 13790: [0-9a-f]* { v2mnz r5, r6, r7 ; v4add r15, r16, r17 } + 13798: [0-9a-f]* { v2mulfsc r5, r6, r7 ; fetchadd r15, r16, r17 } + 137a0: [0-9a-f]* { v2mulfsc r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + 137a8: [0-9a-f]* { v2mulfsc r5, r6, r7 ; rotli r15, r16, 5 } + 137b0: [0-9a-f]* { v2mulfsc r5, r6, r7 ; v1cmpeq r15, r16, r17 } + 137b8: [0-9a-f]* { v2mulfsc r5, r6, r7 ; v2maxsi r15, r16, 5 } + 137c0: [0-9a-f]* { v2muls r5, r6, r7 ; cmpeq r15, r16, r17 } + 137c8: [0-9a-f]* { v2muls r5, r6, r7 ; ld1s r15, r16 } + 137d0: [0-9a-f]* { v2muls r5, r6, r7 ; or r15, r16, r17 } + 137d8: [0-9a-f]* { v2muls r5, r6, r7 ; st4 r15, r16 } + 137e0: [0-9a-f]* { v2muls r5, r6, r7 ; v1sub r15, r16, r17 } + 137e8: [0-9a-f]* { v2muls r5, r6, r7 ; v4shlsc r15, r16, r17 } + 137f0: [0-9a-f]* { v2mults r5, r6, r7 ; fetchor r15, r16, r17 } + 137f8: [0-9a-f]* { v2mults r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + 13800: [0-9a-f]* { v2mults r5, r6, r7 ; shl2addx r15, r16, r17 } + 13808: [0-9a-f]* { v2mults r5, r6, r7 ; v1cmpltu r15, r16, r17 } + 13810: [0-9a-f]* { v2mults r5, r6, r7 ; v2packl r15, r16, r17 } + 13818: [0-9a-f]* { v2mz r15, r16, r17 ; cmpeq r5, r6, r7 } + 13820: [0-9a-f]* { v2mz r15, r16, r17 ; infol 4660 } + 13828: [0-9a-f]* { v2mz r15, r16, r17 ; shl1add r5, r6, r7 } + 13830: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; v2mz r15, r16, r17 } + 13838: [0-9a-f]* { v2mz r15, r16, r17 ; v2cmpltui r5, r6, 5 } + 13840: [0-9a-f]* { v2mz r15, r16, r17 ; v4sub r5, r6, r7 } + 13848: [0-9a-f]* { v2mz r5, r6, r7 ; flushwb } + 13850: [0-9a-f]* { v2mz r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + 13858: [0-9a-f]* { v2mz r5, r6, r7 ; shlx r15, r16, r17 } + 13860: [0-9a-f]* { v2mz r5, r6, r7 ; v1int_l r15, r16, r17 } + 13868: [0-9a-f]* { v2mz r5, r6, r7 ; v2shlsc r15, r16, r17 } + 13870: [0-9a-f]* { v2packh r15, r16, r17 ; cmplts r5, r6, r7 } + 13878: [0-9a-f]* { v2packh r15, r16, r17 ; movei r5, 5 } + 13880: [0-9a-f]* { v2packh r15, r16, r17 ; shl3add r5, r6, r7 } + 13888: [0-9a-f]* { v1dotpua r5, r6, r7 ; v2packh r15, r16, r17 } + 13890: [0-9a-f]* { v2packh r15, r16, r17 ; v2int_h r5, r6, r7 } + 13898: [0-9a-f]* { v2packh r5, r6, r7 ; add r15, r16, r17 } + 138a0: [0-9a-f]* { v2packh r5, r6, r7 ; info 19 } + 138a8: [0-9a-f]* { v2packh r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 138b0: [0-9a-f]* { v2packh r5, r6, r7 ; shru r15, r16, r17 } + 138b8: [0-9a-f]* { v2packh r5, r6, r7 ; v1minui r15, r16, 5 } + 138c0: [0-9a-f]* { v2packh r5, r6, r7 ; v2shrui r15, r16, 5 } + 138c8: [0-9a-f]* { v2packl r15, r16, r17 ; cmpne r5, r6, r7 } + 138d0: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; v2packl r15, r16, r17 } + 138d8: [0-9a-f]* { v2packl r15, r16, r17 ; shlxi r5, r6, 5 } + 138e0: [0-9a-f]* { v2packl r15, r16, r17 ; v1int_l r5, r6, r7 } + 138e8: [0-9a-f]* { v2packl r15, r16, r17 ; v2mins r5, r6, r7 } + 138f0: [0-9a-f]* { v2packl r5, r6, r7 ; addxi r15, r16, 5 } + 138f8: [0-9a-f]* { v2packl r5, r6, r7 ; jalr r15 } + 13900: [0-9a-f]* { v2packl r5, r6, r7 ; moveli r15, 4660 } + 13908: [0-9a-f]* { v2packl r5, r6, r7 ; st r15, r16 } + 13910: [0-9a-f]* { v2packl r5, r6, r7 ; v1shli r15, r16, 5 } + 13918: [0-9a-f]* { v2packl r5, r6, r7 ; v4addsc r15, r16, r17 } + 13920: [0-9a-f]* { cmulf r5, r6, r7 ; v2packuc r15, r16, r17 } + 13928: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; v2packuc r15, r16, r17 } + 13930: [0-9a-f]* { v2packuc r15, r16, r17 ; shrui r5, r6, 5 } + 13938: [0-9a-f]* { v2packuc r15, r16, r17 ; v1minui r5, r6, 5 } + 13940: [0-9a-f]* { v2muls r5, r6, r7 ; v2packuc r15, r16, r17 } + 13948: [0-9a-f]* { v2packuc r5, r6, r7 ; andi r15, r16, 5 } + 13950: [0-9a-f]* { v2packuc r5, r6, r7 ; ld r15, r16 } + 13958: [0-9a-f]* { v2packuc r5, r6, r7 ; nor r15, r16, r17 } + 13960: [0-9a-f]* { v2packuc r5, r6, r7 ; st2_add r15, r16, 5 } + 13968: [0-9a-f]* { v2packuc r5, r6, r7 ; v1shrui r15, r16, 5 } + 13970: [0-9a-f]* { v2packuc r5, r6, r7 ; v4shl r15, r16, r17 } + 13978: [0-9a-f]* { v2sadas r5, r6, r7 ; fetchand4 r15, r16, r17 } + 13980: [0-9a-f]* { v2sadas r5, r6, r7 ; ldnt2u r15, r16 } + 13988: [0-9a-f]* { v2sadas r5, r6, r7 ; shl2add r15, r16, r17 } + 13990: [0-9a-f]* { v2sadas r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + 13998: [0-9a-f]* { v2sadas r5, r6, r7 ; v2packh r15, r16, r17 } + 139a0: [0-9a-f]* { v2sadau r5, r6, r7 ; cmpleu r15, r16, r17 } + 139a8: [0-9a-f]* { v2sadau r5, r6, r7 ; ld2s_add r15, r16, 5 } + 139b0: [0-9a-f]* { v2sadau r5, r6, r7 ; prefetch_add_l2 r15, 5 } + 139b8: [0-9a-f]* { v2sadau r5, r6, r7 ; stnt1_add r15, r16, 5 } + 139c0: [0-9a-f]* { v2sadau r5, r6, r7 ; v2cmpeq r15, r16, r17 } + 139c8: [0-9a-f]* { v2sadau r5, r6, r7 ; wh64 r15 } + 139d0: [0-9a-f]* { v2sads r5, r6, r7 } + 139d8: [0-9a-f]* { v2sads r5, r6, r7 ; ldnt_add r15, r16, 5 } + 139e0: [0-9a-f]* { v2sads r5, r6, r7 ; shlxi r15, r16, 5 } + 139e8: [0-9a-f]* { v2sads r5, r6, r7 ; v1maxu r15, r16, r17 } + 139f0: [0-9a-f]* { v2sads r5, r6, r7 ; v2shrs r15, r16, r17 } + 139f8: [0-9a-f]* { v2sadu r5, r6, r7 ; dblalign2 r15, r16, r17 } + 13a00: [0-9a-f]* { v2sadu r5, r6, r7 ; ld4u_add r15, r16, 5 } + 13a08: [0-9a-f]* { v2sadu r5, r6, r7 ; prefetch_l2 r15 } + 13a10: [0-9a-f]* { v2sadu r5, r6, r7 ; sub r15, r16, r17 } + 13a18: [0-9a-f]* { v2sadu r5, r6, r7 ; v2cmpltu r15, r16, r17 } + 13a20: [0-9a-f]* { v2shl r15, r16, r17 ; addx r5, r6, r7 } + 13a28: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; v2shl r15, r16, r17 } + 13a30: [0-9a-f]* { v2shl r15, r16, r17 ; mz r5, r6, r7 } + 13a38: [0-9a-f]* { v2shl r15, r16, r17 ; v1cmpeq r5, r6, r7 } + 13a40: [0-9a-f]* { v2shl r15, r16, r17 ; v2add r5, r6, r7 } + 13a48: [0-9a-f]* { v2shl r15, r16, r17 ; v2shrui r5, r6, 5 } + 13a50: [0-9a-f]* { v2shl r5, r6, r7 ; exch r15, r16, r17 } + 13a58: [0-9a-f]* { v2shl r5, r6, r7 ; ldnt r15, r16 } + 13a60: [0-9a-f]* { v2shl r5, r6, r7 ; raise } + 13a68: [0-9a-f]* { v2shl r5, r6, r7 ; v1addi r15, r16, 5 } + 13a70: [0-9a-f]* { v2shl r5, r6, r7 ; v2int_l r15, r16, r17 } + 13a78: [0-9a-f]* { v2shli r15, r16, 5 ; and r5, r6, r7 } + 13a80: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; v2shli r15, r16, 5 } + 13a88: [0-9a-f]* { v2shli r15, r16, 5 ; ori r5, r6, 5 } + 13a90: [0-9a-f]* { v2shli r15, r16, 5 ; v1cmplts r5, r6, r7 } + 13a98: [0-9a-f]* { v2avgs r5, r6, r7 ; v2shli r15, r16, 5 } + 13aa0: [0-9a-f]* { v2shli r15, r16, 5 ; v4addsc r5, r6, r7 } + 13aa8: [0-9a-f]* { v2shli r5, r6, 5 ; fetchaddgez r15, r16, r17 } + 13ab0: [0-9a-f]* { v2shli r5, r6, 5 ; ldnt1u_add r15, r16, 5 } + 13ab8: [0-9a-f]* { v2shli r5, r6, 5 ; shl16insli r15, r16, 4660 } + 13ac0: [0-9a-f]* { v2shli r5, r6, 5 ; v1cmples r15, r16, r17 } + 13ac8: [0-9a-f]* { v2shli r5, r6, 5 ; v2minsi r15, r16, 5 } + 13ad0: [0-9a-f]* { bfins r5, r6, 5, 7 ; v2shlsc r15, r16, r17 } + 13ad8: [0-9a-f]* { fsingle_pack1 r5, r6 ; v2shlsc r15, r16, r17 } + 13ae0: [0-9a-f]* { v2shlsc r15, r16, r17 ; rotl r5, r6, r7 } + 13ae8: [0-9a-f]* { v2shlsc r15, r16, r17 ; v1cmpne r5, r6, r7 } + 13af0: [0-9a-f]* { v2shlsc r15, r16, r17 ; v2cmpleu r5, r6, r7 } + 13af8: [0-9a-f]* { v2shlsc r15, r16, r17 ; v4shl r5, r6, r7 } + 13b00: [0-9a-f]* { v2shlsc r5, r6, r7 ; fetchor r15, r16, r17 } + 13b08: [0-9a-f]* { v2shlsc r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + 13b10: [0-9a-f]* { v2shlsc r5, r6, r7 ; shl2addx r15, r16, r17 } + 13b18: [0-9a-f]* { v2shlsc r5, r6, r7 ; v1cmpltu r15, r16, r17 } + 13b20: [0-9a-f]* { v2shlsc r5, r6, r7 ; v2packl r15, r16, r17 } + 13b28: [0-9a-f]* { v2shrs r15, r16, r17 ; cmpeq r5, r6, r7 } + 13b30: [0-9a-f]* { v2shrs r15, r16, r17 ; infol 4660 } + 13b38: [0-9a-f]* { v2shrs r15, r16, r17 ; shl1add r5, r6, r7 } + 13b40: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; v2shrs r15, r16, r17 } + 13b48: [0-9a-f]* { v2shrs r15, r16, r17 ; v2cmpltui r5, r6, 5 } + 13b50: [0-9a-f]* { v2shrs r15, r16, r17 ; v4sub r5, r6, r7 } + 13b58: [0-9a-f]* { v2shrs r5, r6, r7 ; flushwb } + 13b60: [0-9a-f]* { v2shrs r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + 13b68: [0-9a-f]* { v2shrs r5, r6, r7 ; shlx r15, r16, r17 } + 13b70: [0-9a-f]* { v2shrs r5, r6, r7 ; v1int_l r15, r16, r17 } + 13b78: [0-9a-f]* { v2shrs r5, r6, r7 ; v2shlsc r15, r16, r17 } + 13b80: [0-9a-f]* { v2shrsi r15, r16, 5 ; cmplts r5, r6, r7 } + 13b88: [0-9a-f]* { v2shrsi r15, r16, 5 ; movei r5, 5 } + 13b90: [0-9a-f]* { v2shrsi r15, r16, 5 ; shl3add r5, r6, r7 } + 13b98: [0-9a-f]* { v1dotpua r5, r6, r7 ; v2shrsi r15, r16, 5 } + 13ba0: [0-9a-f]* { v2shrsi r15, r16, 5 ; v2int_h r5, r6, r7 } + 13ba8: [0-9a-f]* { v2shrsi r5, r6, 5 ; add r15, r16, r17 } + 13bb0: [0-9a-f]* { v2shrsi r5, r6, 5 ; info 19 } + 13bb8: [0-9a-f]* { v2shrsi r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 13bc0: [0-9a-f]* { v2shrsi r5, r6, 5 ; shru r15, r16, r17 } + 13bc8: [0-9a-f]* { v2shrsi r5, r6, 5 ; v1minui r15, r16, 5 } + 13bd0: [0-9a-f]* { v2shrsi r5, r6, 5 ; v2shrui r15, r16, 5 } + 13bd8: [0-9a-f]* { v2shru r15, r16, r17 ; cmpne r5, r6, r7 } + 13be0: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; v2shru r15, r16, r17 } + 13be8: [0-9a-f]* { v2shru r15, r16, r17 ; shlxi r5, r6, 5 } + 13bf0: [0-9a-f]* { v2shru r15, r16, r17 ; v1int_l r5, r6, r7 } + 13bf8: [0-9a-f]* { v2shru r15, r16, r17 ; v2mins r5, r6, r7 } + 13c00: [0-9a-f]* { v2shru r5, r6, r7 ; addxi r15, r16, 5 } + 13c08: [0-9a-f]* { v2shru r5, r6, r7 ; jalr r15 } + 13c10: [0-9a-f]* { v2shru r5, r6, r7 ; moveli r15, 4660 } + 13c18: [0-9a-f]* { v2shru r5, r6, r7 ; st r15, r16 } + 13c20: [0-9a-f]* { v2shru r5, r6, r7 ; v1shli r15, r16, 5 } + 13c28: [0-9a-f]* { v2shru r5, r6, r7 ; v4addsc r15, r16, r17 } + 13c30: [0-9a-f]* { cmulf r5, r6, r7 ; v2shrui r15, r16, 5 } + 13c38: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; v2shrui r15, r16, 5 } + 13c40: [0-9a-f]* { v2shrui r15, r16, 5 ; shrui r5, r6, 5 } + 13c48: [0-9a-f]* { v2shrui r15, r16, 5 ; v1minui r5, r6, 5 } + 13c50: [0-9a-f]* { v2muls r5, r6, r7 ; v2shrui r15, r16, 5 } + 13c58: [0-9a-f]* { v2shrui r5, r6, 5 ; andi r15, r16, 5 } + 13c60: [0-9a-f]* { v2shrui r5, r6, 5 ; ld r15, r16 } + 13c68: [0-9a-f]* { v2shrui r5, r6, 5 ; nor r15, r16, r17 } + 13c70: [0-9a-f]* { v2shrui r5, r6, 5 ; st2_add r15, r16, 5 } + 13c78: [0-9a-f]* { v2shrui r5, r6, 5 ; v1shrui r15, r16, 5 } + 13c80: [0-9a-f]* { v2shrui r5, r6, 5 ; v4shl r15, r16, r17 } + 13c88: [0-9a-f]* { crc32_32 r5, r6, r7 ; v2sub r15, r16, r17 } + 13c90: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; v2sub r15, r16, r17 } + 13c98: [0-9a-f]* { v2sub r15, r16, r17 ; sub r5, r6, r7 } + 13ca0: [0-9a-f]* { v1mulus r5, r6, r7 ; v2sub r15, r16, r17 } + 13ca8: [0-9a-f]* { v2sub r15, r16, r17 ; v2packl r5, r6, r7 } + 13cb0: [0-9a-f]* { v2sub r5, r6, r7 ; cmpexch4 r15, r16, r17 } + 13cb8: [0-9a-f]* { v2sub r5, r6, r7 ; ld1u_add r15, r16, 5 } + 13cc0: [0-9a-f]* { v2sub r5, r6, r7 ; prefetch_add_l1 r15, 5 } + 13cc8: [0-9a-f]* { v2sub r5, r6, r7 ; stnt r15, r16 } + 13cd0: [0-9a-f]* { v2sub r5, r6, r7 ; v2addi r15, r16, 5 } + 13cd8: [0-9a-f]* { v2sub r5, r6, r7 ; v4sub r15, r16, r17 } + 13ce0: [0-9a-f]* { v2subsc r15, r16, r17 ; dblalign2 r5, r6, r7 } + 13ce8: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; v2subsc r15, r16, r17 } + 13cf0: [0-9a-f]* { tblidxb1 r5, r6 ; v2subsc r15, r16, r17 } + 13cf8: [0-9a-f]* { v2subsc r15, r16, r17 ; v1shl r5, r6, r7 } + 13d00: [0-9a-f]* { v2sads r5, r6, r7 ; v2subsc r15, r16, r17 } + 13d08: [0-9a-f]* { v2subsc r5, r6, r7 ; cmpltsi r15, r16, 5 } + 13d10: [0-9a-f]* { v2subsc r5, r6, r7 ; ld2u_add r15, r16, 5 } + 13d18: [0-9a-f]* { v2subsc r5, r6, r7 ; prefetch_add_l3 r15, 5 } + 13d20: [0-9a-f]* { v2subsc r5, r6, r7 ; stnt2_add r15, r16, 5 } + 13d28: [0-9a-f]* { v2subsc r5, r6, r7 ; v2cmples r15, r16, r17 } + 13d30: [0-9a-f]* { v2subsc r5, r6, r7 ; xori r15, r16, 5 } + 13d38: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; v4add r15, r16, r17 } + 13d40: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; v4add r15, r16, r17 } + 13d48: [0-9a-f]* { v4add r15, r16, r17 ; v1addi r5, r6, 5 } + 13d50: [0-9a-f]* { v4add r15, r16, r17 ; v1shru r5, r6, r7 } + 13d58: [0-9a-f]* { v4add r15, r16, r17 ; v2shlsc r5, r6, r7 } + 13d60: [0-9a-f]* { v4add r5, r6, r7 ; dblalign2 r15, r16, r17 } + 13d68: [0-9a-f]* { v4add r5, r6, r7 ; ld4u_add r15, r16, 5 } + 13d70: [0-9a-f]* { v4add r5, r6, r7 ; prefetch_l2 r15 } + 13d78: [0-9a-f]* { v4add r5, r6, r7 ; sub r15, r16, r17 } + 13d80: [0-9a-f]* { v4add r5, r6, r7 ; v2cmpltu r15, r16, r17 } + 13d88: [0-9a-f]* { v4addsc r15, r16, r17 ; addx r5, r6, r7 } + 13d90: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; v4addsc r15, r16, r17 } + 13d98: [0-9a-f]* { v4addsc r15, r16, r17 ; mz r5, r6, r7 } + 13da0: [0-9a-f]* { v4addsc r15, r16, r17 ; v1cmpeq r5, r6, r7 } + 13da8: [0-9a-f]* { v4addsc r15, r16, r17 ; v2add r5, r6, r7 } + 13db0: [0-9a-f]* { v4addsc r15, r16, r17 ; v2shrui r5, r6, 5 } + 13db8: [0-9a-f]* { v4addsc r5, r6, r7 ; exch r15, r16, r17 } + 13dc0: [0-9a-f]* { v4addsc r5, r6, r7 ; ldnt r15, r16 } + 13dc8: [0-9a-f]* { v4addsc r5, r6, r7 ; raise } + 13dd0: [0-9a-f]* { v4addsc r5, r6, r7 ; v1addi r15, r16, 5 } + 13dd8: [0-9a-f]* { v4addsc r5, r6, r7 ; v2int_l r15, r16, r17 } + 13de0: [0-9a-f]* { v4int_h r15, r16, r17 ; and r5, r6, r7 } + 13de8: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; v4int_h r15, r16, r17 } + 13df0: [0-9a-f]* { v4int_h r15, r16, r17 ; ori r5, r6, 5 } + 13df8: [0-9a-f]* { v4int_h r15, r16, r17 ; v1cmplts r5, r6, r7 } + 13e00: [0-9a-f]* { v2avgs r5, r6, r7 ; v4int_h r15, r16, r17 } + 13e08: [0-9a-f]* { v4int_h r15, r16, r17 ; v4addsc r5, r6, r7 } + 13e10: [0-9a-f]* { v4int_h r5, r6, r7 ; fetchaddgez r15, r16, r17 } + 13e18: [0-9a-f]* { v4int_h r5, r6, r7 ; ldnt1u_add r15, r16, 5 } + 13e20: [0-9a-f]* { v4int_h r5, r6, r7 ; shl16insli r15, r16, 4660 } + 13e28: [0-9a-f]* { v4int_h r5, r6, r7 ; v1cmples r15, r16, r17 } + 13e30: [0-9a-f]* { v4int_h r5, r6, r7 ; v2minsi r15, r16, 5 } + 13e38: [0-9a-f]* { bfins r5, r6, 5, 7 ; v4int_l r15, r16, r17 } + 13e40: [0-9a-f]* { fsingle_pack1 r5, r6 ; v4int_l r15, r16, r17 } + 13e48: [0-9a-f]* { v4int_l r15, r16, r17 ; rotl r5, r6, r7 } + 13e50: [0-9a-f]* { v4int_l r15, r16, r17 ; v1cmpne r5, r6, r7 } + 13e58: [0-9a-f]* { v4int_l r15, r16, r17 ; v2cmpleu r5, r6, r7 } + 13e60: [0-9a-f]* { v4int_l r15, r16, r17 ; v4shl r5, r6, r7 } + 13e68: [0-9a-f]* { v4int_l r5, r6, r7 ; fetchor r15, r16, r17 } + 13e70: [0-9a-f]* { v4int_l r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + 13e78: [0-9a-f]* { v4int_l r5, r6, r7 ; shl2addx r15, r16, r17 } + 13e80: [0-9a-f]* { v4int_l r5, r6, r7 ; v1cmpltu r15, r16, r17 } + 13e88: [0-9a-f]* { v4int_l r5, r6, r7 ; v2packl r15, r16, r17 } + 13e90: [0-9a-f]* { v4packsc r15, r16, r17 ; cmpeq r5, r6, r7 } + 13e98: [0-9a-f]* { v4packsc r15, r16, r17 ; infol 4660 } + 13ea0: [0-9a-f]* { v4packsc r15, r16, r17 ; shl1add r5, r6, r7 } + 13ea8: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; v4packsc r15, r16, r17 } + 13eb0: [0-9a-f]* { v4packsc r15, r16, r17 ; v2cmpltui r5, r6, 5 } + 13eb8: [0-9a-f]* { v4packsc r15, r16, r17 ; v4sub r5, r6, r7 } + 13ec0: [0-9a-f]* { v4packsc r5, r6, r7 ; flushwb } + 13ec8: [0-9a-f]* { v4packsc r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + 13ed0: [0-9a-f]* { v4packsc r5, r6, r7 ; shlx r15, r16, r17 } + 13ed8: [0-9a-f]* { v4packsc r5, r6, r7 ; v1int_l r15, r16, r17 } + 13ee0: [0-9a-f]* { v4packsc r5, r6, r7 ; v2shlsc r15, r16, r17 } + 13ee8: [0-9a-f]* { v4shl r15, r16, r17 ; cmplts r5, r6, r7 } + 13ef0: [0-9a-f]* { v4shl r15, r16, r17 ; movei r5, 5 } + 13ef8: [0-9a-f]* { v4shl r15, r16, r17 ; shl3add r5, r6, r7 } + 13f00: [0-9a-f]* { v1dotpua r5, r6, r7 ; v4shl r15, r16, r17 } + 13f08: [0-9a-f]* { v4shl r15, r16, r17 ; v2int_h r5, r6, r7 } + 13f10: [0-9a-f]* { v4shl r5, r6, r7 ; add r15, r16, r17 } + 13f18: [0-9a-f]* { v4shl r5, r6, r7 ; info 19 } + 13f20: [0-9a-f]* { v4shl r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR } + 13f28: [0-9a-f]* { v4shl r5, r6, r7 ; shru r15, r16, r17 } + 13f30: [0-9a-f]* { v4shl r5, r6, r7 ; v1minui r15, r16, 5 } + 13f38: [0-9a-f]* { v4shl r5, r6, r7 ; v2shrui r15, r16, 5 } + 13f40: [0-9a-f]* { v4shlsc r15, r16, r17 ; cmpne r5, r6, r7 } + 13f48: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; v4shlsc r15, r16, r17 } + 13f50: [0-9a-f]* { v4shlsc r15, r16, r17 ; shlxi r5, r6, 5 } + 13f58: [0-9a-f]* { v4shlsc r15, r16, r17 ; v1int_l r5, r6, r7 } + 13f60: [0-9a-f]* { v4shlsc r15, r16, r17 ; v2mins r5, r6, r7 } + 13f68: [0-9a-f]* { v4shlsc r5, r6, r7 ; addxi r15, r16, 5 } + 13f70: [0-9a-f]* { v4shlsc r5, r6, r7 ; jalr r15 } + 13f78: [0-9a-f]* { v4shlsc r5, r6, r7 ; moveli r15, 4660 } + 13f80: [0-9a-f]* { v4shlsc r5, r6, r7 ; st r15, r16 } + 13f88: [0-9a-f]* { v4shlsc r5, r6, r7 ; v1shli r15, r16, 5 } + 13f90: [0-9a-f]* { v4shlsc r5, r6, r7 ; v4addsc r15, r16, r17 } + 13f98: [0-9a-f]* { cmulf r5, r6, r7 ; v4shrs r15, r16, r17 } + 13fa0: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; v4shrs r15, r16, r17 } + 13fa8: [0-9a-f]* { v4shrs r15, r16, r17 ; shrui r5, r6, 5 } + 13fb0: [0-9a-f]* { v4shrs r15, r16, r17 ; v1minui r5, r6, 5 } + 13fb8: [0-9a-f]* { v2muls r5, r6, r7 ; v4shrs r15, r16, r17 } + 13fc0: [0-9a-f]* { v4shrs r5, r6, r7 ; andi r15, r16, 5 } + 13fc8: [0-9a-f]* { v4shrs r5, r6, r7 ; ld r15, r16 } + 13fd0: [0-9a-f]* { v4shrs r5, r6, r7 ; nor r15, r16, r17 } + 13fd8: [0-9a-f]* { v4shrs r5, r6, r7 ; st2_add r15, r16, 5 } + 13fe0: [0-9a-f]* { v4shrs r5, r6, r7 ; v1shrui r15, r16, 5 } + 13fe8: [0-9a-f]* { v4shrs r5, r6, r7 ; v4shl r15, r16, r17 } + 13ff0: [0-9a-f]* { crc32_32 r5, r6, r7 ; v4shru r15, r16, r17 } + 13ff8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; v4shru r15, r16, r17 } + 14000: [0-9a-f]* { v4shru r15, r16, r17 ; sub r5, r6, r7 } + 14008: [0-9a-f]* { v1mulus r5, r6, r7 ; v4shru r15, r16, r17 } + 14010: [0-9a-f]* { v4shru r15, r16, r17 ; v2packl r5, r6, r7 } + 14018: [0-9a-f]* { v4shru r5, r6, r7 ; cmpexch4 r15, r16, r17 } + 14020: [0-9a-f]* { v4shru r5, r6, r7 ; ld1u_add r15, r16, 5 } + 14028: [0-9a-f]* { v4shru r5, r6, r7 ; prefetch_add_l1 r15, 5 } + 14030: [0-9a-f]* { v4shru r5, r6, r7 ; stnt r15, r16 } + 14038: [0-9a-f]* { v4shru r5, r6, r7 ; v2addi r15, r16, 5 } + 14040: [0-9a-f]* { v4shru r5, r6, r7 ; v4sub r15, r16, r17 } + 14048: [0-9a-f]* { v4sub r15, r16, r17 ; dblalign2 r5, r6, r7 } + 14050: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; v4sub r15, r16, r17 } + 14058: [0-9a-f]* { tblidxb1 r5, r6 ; v4sub r15, r16, r17 } + 14060: [0-9a-f]* { v4sub r15, r16, r17 ; v1shl r5, r6, r7 } + 14068: [0-9a-f]* { v2sads r5, r6, r7 ; v4sub r15, r16, r17 } + 14070: [0-9a-f]* { v4sub r5, r6, r7 ; cmpltsi r15, r16, 5 } + 14078: [0-9a-f]* { v4sub r5, r6, r7 ; ld2u_add r15, r16, 5 } + 14080: [0-9a-f]* { v4sub r5, r6, r7 ; prefetch_add_l3 r15, 5 } + 14088: [0-9a-f]* { v4sub r5, r6, r7 ; stnt2_add r15, r16, 5 } + 14090: [0-9a-f]* { v4sub r5, r6, r7 ; v2cmples r15, r16, r17 } + 14098: [0-9a-f]* { v4sub r5, r6, r7 ; xori r15, r16, 5 } + 140a0: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; v4subsc r15, r16, r17 } + 140a8: [0-9a-f]* { mula_ls_lu r5, r6, r7 ; v4subsc r15, r16, r17 } + 140b0: [0-9a-f]* { v4subsc r15, r16, r17 ; v1addi r5, r6, 5 } + 140b8: [0-9a-f]* { v4subsc r15, r16, r17 ; v1shru r5, r6, r7 } + 140c0: [0-9a-f]* { v4subsc r15, r16, r17 ; v2shlsc r5, r6, r7 } + 140c8: [0-9a-f]* { v4subsc r5, r6, r7 ; dblalign2 r15, r16, r17 } + 140d0: [0-9a-f]* { v4subsc r5, r6, r7 ; ld4u_add r15, r16, 5 } + 140d8: [0-9a-f]* { v4subsc r5, r6, r7 ; prefetch_l2 r15 } + 140e0: [0-9a-f]* { v4subsc r5, r6, r7 ; sub r15, r16, r17 } + 140e8: [0-9a-f]* { v4subsc r5, r6, r7 ; v2cmpltu r15, r16, r17 } + 140f0: [0-9a-f]* { addx r5, r6, r7 ; wh64 r15 } + 140f8: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; wh64 r15 } + 14100: [0-9a-f]* { mz r5, r6, r7 ; wh64 r15 } + 14108: [0-9a-f]* { v1cmpeq r5, r6, r7 ; wh64 r15 } + 14110: [0-9a-f]* { v2add r5, r6, r7 ; wh64 r15 } + 14118: [0-9a-f]* { v2shrui r5, r6, 5 ; wh64 r15 } + 14120: [0-9a-f]* { xor r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + 14128: [0-9a-f]* { xor r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + 14130: [0-9a-f]* { xor r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + 14138: [0-9a-f]* { cmoveqz r5, r6, r7 ; xor r15, r16, r17 ; ld4s r25, r26 } + 14140: [0-9a-f]* { xor r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + 14148: [0-9a-f]* { xor r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + 14150: [0-9a-f]* { xor r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + 14158: [0-9a-f]* { xor r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + 14160: [0-9a-f]* { ctz r5, r6 ; xor r15, r16, r17 ; ld4s r25, r26 } + 14168: [0-9a-f]* { xor r15, r16, r17 ; st r25, r26 } + 14170: [0-9a-f]* { xor r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + 14178: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 } + 14180: [0-9a-f]* { cmoveqz r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 } + 14188: [0-9a-f]* { xor r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 } + 14190: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 } + 14198: [0-9a-f]* { xor r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + 141a0: [0-9a-f]* { xor r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + 141a8: [0-9a-f]* { xor r15, r16, r17 ; ld2u r25, r26 } + 141b0: [0-9a-f]* { tblidxb1 r5, r6 ; xor r15, r16, r17 ; ld2u r25, r26 } + 141b8: [0-9a-f]* { xor r15, r16, r17 ; nop ; ld4s r25, r26 } + 141c0: [0-9a-f]* { xor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 } + 141c8: [0-9a-f]* { xor r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 } + 141d0: [0-9a-f]* { xor r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + 141d8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 } + 141e0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 141e8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 141f0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld4s r25, r26 } + 141f8: [0-9a-f]* { mulax r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 } + 14200: [0-9a-f]* { xor r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + 14208: [0-9a-f]* { xor r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + 14210: [0-9a-f]* { pcnt r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + 14218: [0-9a-f]* { mulax r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 14220: [0-9a-f]* { xor r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + 14228: [0-9a-f]* { xor r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + 14230: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + 14238: [0-9a-f]* { xor r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 } + 14240: [0-9a-f]* { xor r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 } + 14248: [0-9a-f]* { xor r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 } + 14250: [0-9a-f]* { tblidxb3 r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + 14258: [0-9a-f]* { xor r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 } + 14260: [0-9a-f]* { xor r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 } + 14268: [0-9a-f]* { xor r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 } + 14270: [0-9a-f]* { revbytes r5, r6 ; xor r15, r16, r17 ; prefetch_l3 r25 } + 14278: [0-9a-f]* { xor r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + 14280: [0-9a-f]* { xor r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + 14288: [0-9a-f]* { xor r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + 14290: [0-9a-f]* { xor r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + 14298: [0-9a-f]* { xor r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + 142a0: [0-9a-f]* { xor r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + 142a8: [0-9a-f]* { xor r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 } + 142b0: [0-9a-f]* { xor r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 } + 142b8: [0-9a-f]* { xor r15, r16, r17 ; st1 r25, r26 } + 142c0: [0-9a-f]* { tblidxb1 r5, r6 ; xor r15, r16, r17 ; st1 r25, r26 } + 142c8: [0-9a-f]* { xor r15, r16, r17 ; nop ; st2 r25, r26 } + 142d0: [0-9a-f]* { xor r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 } + 142d8: [0-9a-f]* { xor r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 } + 142e0: [0-9a-f]* { xor r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + 142e8: [0-9a-f]* { tblidxb1 r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + 142f0: [0-9a-f]* { tblidxb3 r5, r6 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + 142f8: [0-9a-f]* { xor r15, r16, r17 ; v1mz r5, r6, r7 } + 14300: [0-9a-f]* { xor r15, r16, r17 ; v2packuc r5, r6, r7 } + 14308: [0-9a-f]* { xor r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + 14310: [0-9a-f]* { xor r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + 14318: [0-9a-f]* { xor r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + 14320: [0-9a-f]* { xor r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + 14328: [0-9a-f]* { xor r5, r6, r7 ; cmpexch r15, r16, r17 } + 14330: [0-9a-f]* { xor r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + 14338: [0-9a-f]* { xor r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + 14340: [0-9a-f]* { xor r5, r6, r7 ; dtlbpr r15 } + 14348: [0-9a-f]* { xor r5, r6, r7 ; ill ; ld4u r25, r26 } + 14350: [0-9a-f]* { xor r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + 14358: [0-9a-f]* { xor r5, r6, r7 ; jr r15 ; prefetch r25 } + 14360: [0-9a-f]* { xor r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 } + 14368: [0-9a-f]* { xor r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 } + 14370: [0-9a-f]* { xor r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 } + 14378: [0-9a-f]* { xor r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + 14380: [0-9a-f]* { xor r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 } + 14388: [0-9a-f]* { xor r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 } + 14390: [0-9a-f]* { xor r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + 14398: [0-9a-f]* { xor r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 } + 143a0: [0-9a-f]* { xor r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + 143a8: [0-9a-f]* { xor r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + 143b0: [0-9a-f]* { xor r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + 143b8: [0-9a-f]* { xor r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + 143c0: [0-9a-f]* { xor r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + 143c8: [0-9a-f]* { xor r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + 143d0: [0-9a-f]* { xor r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + 143d8: [0-9a-f]* { xor r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + 143e0: [0-9a-f]* { xor r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + 143e8: [0-9a-f]* { xor r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 } + 143f0: [0-9a-f]* { xor r5, r6, r7 ; prefetch_l2_fault r25 } + 143f8: [0-9a-f]* { xor r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 } + 14400: [0-9a-f]* { xor r5, r6, r7 ; prefetch_l3 r25 } + 14408: [0-9a-f]* { xor r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 } + 14410: [0-9a-f]* { xor r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + 14418: [0-9a-f]* { xor r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + 14420: [0-9a-f]* { xor r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + 14428: [0-9a-f]* { xor r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + 14430: [0-9a-f]* { xor r5, r6, r7 ; shli r15, r16, 5 } + 14438: [0-9a-f]* { xor r5, r6, r7 ; shrsi r15, r16, 5 } + 14440: [0-9a-f]* { xor r5, r6, r7 ; shruxi r15, r16, 5 } + 14448: [0-9a-f]* { xor r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + 14450: [0-9a-f]* { xor r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 } + 14458: [0-9a-f]* { xor r5, r6, r7 ; lnk r15 ; st2 r25, r26 } + 14460: [0-9a-f]* { xor r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + 14468: [0-9a-f]* { xor r5, r6, r7 ; stnt2 r15, r16 } + 14470: [0-9a-f]* { xor r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + 14478: [0-9a-f]* { xor r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + 14480: [0-9a-f]* { xor r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + 14488: [0-9a-f]* { cmul r5, r6, r7 ; xori r15, r16, 5 } + 14490: [0-9a-f]* { mul_hs_lu r5, r6, r7 ; xori r15, r16, 5 } + 14498: [0-9a-f]* { xori r15, r16, 5 ; shrs r5, r6, r7 } + 144a0: [0-9a-f]* { xori r15, r16, 5 ; v1maxu r5, r6, r7 } + 144a8: [0-9a-f]* { xori r15, r16, 5 ; v2minsi r5, r6, 5 } + 144b0: [0-9a-f]* { xori r5, r6, 5 ; addxli r15, r16, 4660 } + 144b8: [0-9a-f]* { xori r5, r6, 5 ; jalrp r15 } + 144c0: [0-9a-f]* { xori r5, r6, 5 ; mtspr MEM_ERROR_CBOX_ADDR, r16 } + 144c8: [0-9a-f]* { xori r5, r6, 5 ; st1 r15, r16 } + 144d0: [0-9a-f]* { xori r5, r6, 5 ; v1shrs r15, r16, r17 } + 144d8: [0-9a-f]* { xori r5, r6, 5 ; v4int_h r15, r16, r17 } diff --git a/gas/testsuite/gas/tilegx/t_insns.s b/gas/testsuite/gas/tilegx/t_insns.s new file mode 100644 index 0000000..c756049 --- /dev/null +++ b/gas/testsuite/gas/tilegx/t_insns.s @@ -0,0 +1,10430 @@ +target: + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + { fdouble_sub_flags r5, r6, r7 ; bnezt r15, target } + { fdouble_sub_flags r5, r6, r7 ; bnez r15, target } + { fdouble_addsub r5, r6, r7 ; bnez r15, target } + { fdouble_pack1 r5, r6, r7 ; bnez r15, target } + { fsingle_pack2 r5, r6, r7 ; bnez r15, target } + { fsingle_mul2 r5, r6, r7 ; blez r15, target } + { mula_hs_hu r5, r6, r7 ; bgtzt r15, target } + { mula_hu_lu r5, r6, r7 ; bgtzt r15, target } + { addli r5, r6, 0x1234 ; bgtzt r15, target } + { fsingle_pack1 r5, r6 ; beqzt r15, target } + { mul_hu_hu r5, r6, r7 ; beqzt r15, target } + { mul_lu_lu r5, r6, r7 ; beqzt r15, target } + { mula_hu_hu r5, r6, r7 ; beqz r15, target } + { mula_lu_lu r5, r6, r7 ; beqz r15, target } + { addli r5, r6, 0x1234 ; beqz r15, target } + { dblalign2 r5, r6, r7 ; beqz r15, target } + { mul_hs_hs r5, r6, r7 ; blbs r15, target } + { mul_hu_ls r5, r6, r7 ; blbs r15, target } + { shl1addx r5, r6, r7 ; blbst r15, target } + { v1cmpleu r5, r6, r7 ; blbst r15, target } + { v1ddotpu r5, r6, r7 ; blbst r15, target } + { v1dotpusa r5, r6, r7 ; blbs r15, target } + { v2cmpltsi r5, r6, 5 ; blbst r15, target } + { v4packsc r5, r6, r7 ; blbst r15, target } + { cmovnez r5, r6, r7 ; blbst r15, target } + { shl1addx r5, r6, r7 ; bgtz r15, target } + { v1adduc r5, r6, r7 ; bgtzt r15, target } + { v1cmpleu r5, r6, r7 ; bgtz r15, target } + { v1cmpne r5, r6, r7 ; bgtzt r15, target } + { v1dotpus r5, r6, r7 ; bgtz r15, target } + { v1sadau r5, r6, r7 ; bgtzt r15, target } + { v2cmpeqi r5, r6, 5 ; bgtzt r15, target } + { v2cmpltu r5, r6, r7 ; bgtz r15, target } + { v2int_l r5, r6, r7 ; bgtzt r15, target } + { v2packuc r5, r6, r7 ; bgtz r15, target } + { v4addsc r5, r6, r7 ; bgtzt r15, target } + { v4subsc r5, r6, r7 ; bgtzt r15, target } + { cmples r5, r6, r7 ; bgtzt r15, target } + { cmpltui r5, r6, 5 ; bgtzt r15, target } + { fsingle_addsub2 r5, r6, r7 ; j target } + { subxsc r5, r6, r7 ; bltzt r15, target } + { v1cmpne r5, r6, r7 ; bltz r15, target } + { v1int_l r5, r6, r7 ; bltz r15, target } + { v1multu r5, r6, r7 ; bltz r15, target } + { v1shrs r5, r6, r7 ; bltzt r15, target } + { v2addsc r5, r6, r7 ; bltz r15, target } + { v2dotp r5, r6, r7 ; bltzt r15, target } + { v2maxsi r5, r6, 5 ; bltzt r15, target } + { v2packh r5, r6, r7 ; bltz r15, target } + { v2sadu r5, r6, r7 ; bltzt r15, target } + { v2shrui r5, r6, 5 ; bltzt r15, target } + { v4shlsc r5, r6, r7 ; bltz r15, target } + { cmpeq r5, r6, r7 ; bltzt r15, target } + { cmpltsi r5, r6, 5 ; bltz r15, target } + { cmulaf r5, r6, r7 ; bltz r15, target } + { moveli r5, 0x1234 ; bgez r15, target } + { subxsc r5, r6, r7 ; bnez r15, target } + { v1maxu r5, r6, r7 ; bnez r15, target } + { v1mulu r5, r6, r7 ; bnez r15, target } + { v1shrsi r5, r6, 5 ; bnez r15, target } + { v2addi r5, r6, 5 ; bnezt r15, target } + { v2mins r5, r6, r7 ; bnez r15, target } + { v2sadu r5, r6, r7 ; bnez r15, target } + { v2shru r5, r6, r7 ; bnez r15, target } + { v4shrs r5, r6, r7 ; bnez r15, target } + { cmpeq r5, r6, r7 ; bnez r15, target } + { cmulf r5, r6, r7 ; bnez r15, target } + { revbytes r5, r6 ; blbst r15, target } + { shrs r5, r6, r7 ; blbst r15, target } + { shruxi r5, r6, 5 ; blbs r15, target } + { tblidxb3 r5, r6 ; blbst r15, target } + { v1shl r5, r6, r7 ; blbs r15, target } + { v2mnz r5, r6, r7 ; blbs r15, target } + { v4add r5, r6, r7 ; blbs r15, target } + { addx r5, r6, r7 ; blbs r15, target } + { fsingle_sub1 r5, r6, r7 ; j target } + { nor r5, r6, r7 ; blezt r15, target } + { shl r5, r6, r7 ; blezt r15, target } + { shrsi r5, r6, 5 ; blez r15, target } + { tblidxb0 r5, r6 ; blbs r15, target } + { v2mz r5, r6, r7 ; blbc r15, target } + { and r5, r6, r7 ; bgtz r15, target } + { mz r5, r6, r7 ; blbst r15, target } + { shl r5, r6, r7 ; blbs r15, target } + { bfexts r5, r6, 5, 7 ; jal target } + { ori r5, r6, 5 ; bgtz r15, target } + { infol 0x1234 ; bgez r15, target } + { pcnt r5, r6 ; bnezt r15, target } + { bfextu r5, r6, 5, 7 ; j target } + { movei r5, 5 ; blbs r15, target } + { v2avgs r5, r6, r7 ; jal target } + { cmulh r5, r6, r7 ; jal target } + { v2dotpa r5, r6, r7 ; j target } + { rotli r5, r6, 5 ; jal target } + { v4shrs r5, r6, r7 ; j target } + { v2sub r5, r6, r7 ; j target } + { and r5, r6, r7 ; j target } + { nop ; blbst r15, target } + { beqzt r15, target ; cmpltu r5, r6, r7 } + { beqzt r15, target ; mul_hs_hs r5, r6, r7 } + { beqzt r15, target ; shli r5, r6, 5 } + { beqzt r15, target ; v1dotpusa r5, r6, r7 } + { beqzt r15, target ; v2maxs r5, r6, r7 } + { bgezt r15, target ; addli r5, r6, 0x1234 } + { bgezt r15, target ; fdouble_pack2 r5, r6, r7 } + { bgezt r15, target ; mulx r5, r6, r7 } + { bgezt r15, target ; v1avgu r5, r6, r7 } + { bgezt r15, target ; v1subuc r5, r6, r7 } + { bgezt r15, target ; v2shru r5, r6, r7 } + { bgtzt r15, target ; cmpne r5, r6, r7 } + { bgtzt r15, target ; mul_hs_ls r5, r6, r7 } + { bgtzt r15, target ; shlxi r5, r6, 5 } + { bgtzt r15, target ; v1int_l r5, r6, r7 } + { bgtzt r15, target ; v2mins r5, r6, r7 } + { blbct r15, target ; addxi r5, r6, 5 } + { blbct r15, target ; fdouble_unpack_max r5, r6, r7 } + { blbct r15, target ; nop } + { blbct r15, target ; v1cmpeqi r5, r6, 5 } + { blbct r15, target ; v2addi r5, r6, 5 } + { blbct r15, target ; v2sub r5, r6, r7 } + { blbst r15, target ; cmula r5, r6, r7 } + { blbst r15, target ; mul_hu_hu r5, r6, r7 } + { blbst r15, target ; shrsi r5, r6, 5 } + { blbst r15, target ; v1maxui r5, r6, 5 } + { blbst r15, target ; v2mnz r5, r6, r7 } + { blezt r15, target ; addxsc r5, r6, r7 } + { blezt r15, target ; fnop } + { blezt r15, target ; or r5, r6, r7 } + { blezt r15, target ; v1cmpleu r5, r6, r7 } + { blezt r15, target ; v2adiffs r5, r6, r7 } + { blezt r15, target ; v4add r5, r6, r7 } + { bltzt r15, target ; cmulf r5, r6, r7 } + { bltzt r15, target ; mul_hu_lu r5, r6, r7 } + { bltzt r15, target ; shrui r5, r6, 5 } + { bltzt r15, target ; v1minui r5, r6, 5 } + { bltzt r15, target ; v2muls r5, r6, r7 } + { bnezt r15, target ; andi r5, r6, 5 } + { bnezt r15, target ; fsingle_addsub2 r5, r6, r7 } + { bnezt r15, target ; pcnt r5, r6 } + { bnezt r15, target ; v1cmpltsi r5, r6, 5 } + { bnezt r15, target ; v2cmpeq r5, r6, r7 } + { bnezt r15, target ; v4int_h r5, r6, r7 } + { beqz r15, target ; cmulfr r5, r6, r7 } + { beqz r15, target ; mul_ls_ls r5, r6, r7 } + { beqz r15, target ; shrux r5, r6, r7 } + { beqz r15, target ; v1mnz r5, r6, r7 } + { beqz r15, target ; v2mults r5, r6, r7 } + { bgez r15, target ; bfexts r5, r6, 5, 7 } + { bgez r15, target ; fsingle_mul1 r5, r6, r7 } + { bgez r15, target ; revbits r5, r6 } + { bgez r15, target ; v1cmpltu r5, r6, r7 } + { bgez r15, target ; v2cmpeqi r5, r6, 5 } + { bgez r15, target ; v4int_l r5, r6, r7 } + { bgtz r15, target ; cmulhr r5, r6, r7 } + { bgtz r15, target ; mul_lu_lu r5, r6, r7 } + { bgtz r15, target ; shufflebytes r5, r6, r7 } + { bgtz r15, target ; v1mulu r5, r6, r7 } + { bgtz r15, target ; v2packh r5, r6, r7 } + { blbc r15, target ; bfins r5, r6, 5, 7 } + { blbc r15, target ; fsingle_pack1 r5, r6 } + { blbc r15, target ; rotl r5, r6, r7 } + { blbc r15, target ; v1cmpne r5, r6, r7 } + { blbc r15, target ; v2cmpleu r5, r6, r7 } + { blbc r15, target ; v4shl r5, r6, r7 } + { blbs r15, target ; crc32_8 r5, r6, r7 } + { blbs r15, target ; mula_hs_hu r5, r6, r7 } + { blbs r15, target ; subx r5, r6, r7 } + { blbs r15, target ; v1mz r5, r6, r7 } + { blbs r15, target ; v2packuc r5, r6, r7 } + { blez r15, target ; cmoveqz r5, r6, r7 } + { blez r15, target ; fsingle_sub1 r5, r6, r7 } + { blez r15, target ; shl r5, r6, r7 } + { blez r15, target ; v1ddotpua r5, r6, r7 } + { blez r15, target ; v2cmpltsi r5, r6, 5 } + { blez r15, target ; v4shrs r5, r6, r7 } + { bltz r15, target ; dblalign r5, r6, r7 } + { bltz r15, target ; mula_hs_lu r5, r6, r7 } + { bltz r15, target ; tblidxb0 r5, r6 } + { bltz r15, target ; v1sadu r5, r6, r7 } + { bltz r15, target ; v2sadau r5, r6, r7 } + { bnez r15, target ; cmpeq r5, r6, r7 } + { bnez r15, target ; infol 0x1234 } + { bnez r15, target ; shl1add r5, r6, r7 } + { bnez r15, target ; v1ddotpusa r5, r6, r7 } + { bnez r15, target ; v2cmpltui r5, r6, 5 } + { bnez r15, target ; v4sub r5, r6, r7 } + { jal target ; cmples r5, r6, r7 } + { jal target ; mnz r5, r6, r7 } + { jal target ; shl2add r5, r6, r7 } + { jal target ; v1dotpa r5, r6, r7 } + { jal target ; v2dotp r5, r6, r7 } + { jal target ; xor r5, r6, r7 } + { j target ; dblalign6 r5, r6, r7 } + { j target ; mula_hu_lu r5, r6, r7 } + { j target ; tblidxb3 r5, r6 } + { j target ; v1shrs r5, r6, r7 } + { j target ; v2shl r5, r6, r7 } + cmpeqi r5, r6, 5 + fetchand r5, r6, r7 + ldna_add r5, r6, 5 + mula_hu_lu r5, r6, r7 + shlx r5, r6, r7 + v1avgu r5, r6, r7 + v1subuc r5, r6, r7 + v2shru r5, r6, r7 + { add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } + { add r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 } + { add r15, r16, r17 ; andi r5, r6, 5 ; ld2u r25, r26 } + { add r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld2s r25, r26 } + { add r15, r16, r17 ; cmpeq r5, r6, r7 ; ld4s r25, r26 } + { add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch r25 } + { add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 } + { add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 } + { add r15, r16, r17 ; ctz r5, r6 ; ld2s r25, r26 } + { add r15, r16, r17 ; fnop ; prefetch_l3 r25 } + { add r15, r16, r17 ; info 19 ; prefetch_l1 r25 } + { add r15, r16, r17 ; ld r25, r26 ; mula_hs_hs r5, r6, r7 } + { add r15, r16, r17 ; ld1s r25, r26 ; andi r5, r6, 5 } + { add r15, r16, r17 ; ld1s r25, r26 ; shl1addx r5, r6, r7 } + { add r15, r16, r17 ; ld1u r25, r26 ; move r5, r6 } + { add r15, r16, r17 ; ld1u r25, r26 } + { add r15, r16, r17 ; ld2s r25, r26 ; revbits r5, r6 } + { add r15, r16, r17 ; ld2u r25, r26 ; cmpne r5, r6, r7 } + { add r15, r16, r17 ; ld2u r25, r26 ; subx r5, r6, r7 } + { add r15, r16, r17 ; ld4s r25, r26 ; mulx r5, r6, r7 } + { add r15, r16, r17 ; ld4u r25, r26 ; cmpeqi r5, r6, 5 } + { add r15, r16, r17 ; ld4u r25, r26 ; shli r5, r6, 5 } + { add r15, r16, r17 ; move r5, r6 ; prefetch r25 } + { add r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l1 r25 } + { add r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; ld4s r25, r26 } + { add r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; ld4u r25, r26 } + { add r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld2s r25, r26 } + { add r15, r16, r17 ; mulax r5, r6, r7 ; ld2u r25, r26 } + { add r15, r16, r17 ; mz r5, r6, r7 ; ld4u r25, r26 } + { add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1 r25 } + { add r15, r16, r17 ; pcnt r5, r6 ; prefetch_l1_fault r25 } + { add r15, r16, r17 ; prefetch r25 ; mula_ls_ls r5, r6, r7 } + { add r15, r16, r17 ; prefetch_l1 r25 ; cmoveqz r5, r6, r7 } + { add r15, r16, r17 ; prefetch_l1 r25 ; shl2addx r5, r6, r7 } + { add r15, r16, r17 ; prefetch_l1_fault r25 ; mul_hs_hs r5, r6, r7 } + { add r15, r16, r17 ; prefetch_l2 r25 ; addi r5, r6, 5 } + { add r15, r16, r17 ; prefetch_l2 r25 ; rotl r5, r6, r7 } + { add r15, r16, r17 ; prefetch_l2_fault r25 ; fnop } + { add r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb1 r5, r6 } + { add r15, r16, r17 ; prefetch_l3 r25 ; nop } + { add r15, r16, r17 ; prefetch_l3_fault r25 ; cmpleu r5, r6, r7 } + { add r15, r16, r17 ; prefetch_l3_fault r25 ; shrsi r5, r6, 5 } + { add r15, r16, r17 ; revbytes r5, r6 ; prefetch_l2 r25 } + { add r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l3 r25 } + { add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 } + { add r15, r16, r17 ; shl2add r5, r6, r7 ; st1 r25, r26 } + { add r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 } + { add r15, r16, r17 ; shlx r5, r6, r7 } + { add r15, r16, r17 ; shru r5, r6, r7 ; ld r25, r26 } + { add r15, r16, r17 ; shufflebytes r5, r6, r7 } + { add r15, r16, r17 ; st r25, r26 ; revbits r5, r6 } + { add r15, r16, r17 ; st1 r25, r26 ; cmpne r5, r6, r7 } + { add r15, r16, r17 ; st1 r25, r26 ; subx r5, r6, r7 } + { add r15, r16, r17 ; st2 r25, r26 ; mulx r5, r6, r7 } + { add r15, r16, r17 ; st4 r25, r26 ; cmpeqi r5, r6, 5 } + { add r15, r16, r17 ; st4 r25, r26 ; shli r5, r6, 5 } + { add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l1 r25 } + { add r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l1_fault r25 } + { add r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l2_fault r25 } + { add r15, r16, r17 ; v1mulu r5, r6, r7 } + { add r15, r16, r17 ; v2packh r5, r6, r7 } + { add r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } + { add r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 } + { add r5, r6, r7 ; addxi r15, r16, 5 ; st1 r25, r26 } + { add r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 } + { add r5, r6, r7 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } + { add r5, r6, r7 ; cmpleu r15, r16, r17 ; st4 r25, r26 } + { add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 } + { add r5, r6, r7 ; dblalign4 r15, r16, r17 } + { add r5, r6, r7 ; ill ; ld2u r25, r26 } + { add r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } + { add r5, r6, r7 ; jr r15 ; ld4s r25, r26 } + { add r5, r6, r7 ; ld r25, r26 ; cmpeq r15, r16, r17 } + { add r5, r6, r7 ; ld r25, r26 } + { add r5, r6, r7 ; ld1s r25, r26 ; shli r15, r16, 5 } + { add r5, r6, r7 ; ld1u r25, r26 ; rotl r15, r16, r17 } + { add r5, r6, r7 ; ld2s r25, r26 ; jrp r15 } + { add r5, r6, r7 ; ld2u r25, r26 ; cmpltsi r15, r16, 5 } + { add r5, r6, r7 ; ld4s r25, r26 ; addx r15, r16, r17 } + { add r5, r6, r7 ; ld4s r25, r26 ; shrui r15, r16, 5 } + { add r5, r6, r7 ; ld4u r25, r26 ; shl1addx r15, r16, r17 } + { add r5, r6, r7 ; lnk r15 ; prefetch_l1 r25 } + { add r5, r6, r7 ; move r15, r16 ; prefetch_l1 r25 } + { add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l1 r25 } + { add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 } + { add r5, r6, r7 ; prefetch r25 ; cmplts r15, r16, r17 } + { add r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + { add r5, r6, r7 ; prefetch_l1 r25 ; shl3add r15, r16, r17 } + { add r5, r6, r7 ; prefetch_l1_fault r25 ; or r15, r16, r17 } + { add r5, r6, r7 ; prefetch_l2 r25 ; jrp r15 } + { add r5, r6, r7 ; prefetch_l2_fault r25 ; cmpltu r15, r16, r17 } + { add r5, r6, r7 ; prefetch_l3 r25 ; and r15, r16, r17 } + { add r5, r6, r7 ; prefetch_l3 r25 ; subx r15, r16, r17 } + { add r5, r6, r7 ; prefetch_l3_fault r25 ; shl3add r15, r16, r17 } + { add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + { add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } + { add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3 r25 } + { add r5, r6, r7 ; shl3add r15, r16, r17 ; st r25, r26 } + { add r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 } + { add r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 } + { add r5, r6, r7 ; shrui r15, r16, 5 } + { add r5, r6, r7 ; st r25, r26 ; shl3add r15, r16, r17 } + { add r5, r6, r7 ; st1 r25, r26 ; or r15, r16, r17 } + { add r5, r6, r7 ; st2 r25, r26 ; jr r15 } + { add r5, r6, r7 ; st4 r25, r26 ; cmplts r15, r16, r17 } + { add r5, r6, r7 ; stnt1 r15, r16 } + { add r5, r6, r7 ; subx r15, r16, r17 ; st r25, r26 } + { add r5, r6, r7 ; v2cmpleu r15, r16, r17 } + { add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 } + { addi r15, r16, 5 ; addi r5, r6, 5 ; ld2s r25, r26 } + { addi r15, r16, 5 ; addxi r5, r6, 5 ; ld2u r25, r26 } + { addi r15, r16, 5 ; andi r5, r6, 5 ; ld2u r25, r26 } + { addi r15, r16, 5 ; cmoveqz r5, r6, r7 ; ld2s r25, r26 } + { addi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld4s r25, r26 } + { addi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch r25 } + { addi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 } + { addi r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 } + { addi r15, r16, 5 ; ctz r5, r6 ; ld2s r25, r26 } + { addi r15, r16, 5 ; fnop ; prefetch_l3 r25 } + { addi r15, r16, 5 ; info 19 ; prefetch_l1 r25 } + { addi r15, r16, 5 ; ld r25, r26 ; mula_hs_hs r5, r6, r7 } + { addi r15, r16, 5 ; ld1s r25, r26 ; andi r5, r6, 5 } + { addi r15, r16, 5 ; ld1s r25, r26 ; shl1addx r5, r6, r7 } + { addi r15, r16, 5 ; ld1u r25, r26 ; move r5, r6 } + { addi r15, r16, 5 ; ld1u r25, r26 } + { addi r15, r16, 5 ; ld2s r25, r26 ; revbits r5, r6 } + { addi r15, r16, 5 ; ld2u r25, r26 ; cmpne r5, r6, r7 } + { addi r15, r16, 5 ; ld2u r25, r26 ; subx r5, r6, r7 } + { addi r15, r16, 5 ; ld4s r25, r26 ; mulx r5, r6, r7 } + { addi r15, r16, 5 ; ld4u r25, r26 ; cmpeqi r5, r6, 5 } + { addi r15, r16, 5 ; ld4u r25, r26 ; shli r5, r6, 5 } + { addi r15, r16, 5 ; move r5, r6 ; prefetch r25 } + { addi r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; prefetch_l1 r25 } + { addi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; ld4s r25, r26 } + { addi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; ld4u r25, r26 } + { addi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; ld2s r25, r26 } + { addi r15, r16, 5 ; mulax r5, r6, r7 ; ld2u r25, r26 } + { addi r15, r16, 5 ; mz r5, r6, r7 ; ld4u r25, r26 } + { addi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l1 r25 } + { addi r15, r16, 5 ; pcnt r5, r6 ; prefetch_l1_fault r25 } + { addi r15, r16, 5 ; prefetch r25 ; mula_ls_ls r5, r6, r7 } + { addi r15, r16, 5 ; prefetch_l1 r25 ; cmoveqz r5, r6, r7 } + { addi r15, r16, 5 ; prefetch_l1 r25 ; shl2addx r5, r6, r7 } + { addi r15, r16, 5 ; prefetch_l1_fault r25 ; mul_hs_hs r5, r6, r7 } + { addi r15, r16, 5 ; prefetch_l2 r25 ; addi r5, r6, 5 } + { addi r15, r16, 5 ; prefetch_l2 r25 ; rotl r5, r6, r7 } + { addi r15, r16, 5 ; prefetch_l2_fault r25 ; fnop } + { addi r15, r16, 5 ; prefetch_l2_fault r25 ; tblidxb1 r5, r6 } + { addi r15, r16, 5 ; prefetch_l3 r25 ; nop } + { addi r15, r16, 5 ; prefetch_l3_fault r25 ; cmpleu r5, r6, r7 } + { addi r15, r16, 5 ; prefetch_l3_fault r25 ; shrsi r5, r6, 5 } + { addi r15, r16, 5 ; revbytes r5, r6 ; prefetch_l2 r25 } + { addi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l3 r25 } + { addi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 } + { addi r15, r16, 5 ; shl2add r5, r6, r7 ; st1 r25, r26 } + { addi r15, r16, 5 ; shl3add r5, r6, r7 ; st4 r25, r26 } + { addi r15, r16, 5 ; shlx r5, r6, r7 } + { addi r15, r16, 5 ; shru r5, r6, r7 ; ld r25, r26 } + { addi r15, r16, 5 ; shufflebytes r5, r6, r7 } + { addi r15, r16, 5 ; st r25, r26 ; revbits r5, r6 } + { addi r15, r16, 5 ; st1 r25, r26 ; cmpne r5, r6, r7 } + { addi r15, r16, 5 ; st1 r25, r26 ; subx r5, r6, r7 } + { addi r15, r16, 5 ; st2 r25, r26 ; mulx r5, r6, r7 } + { addi r15, r16, 5 ; st4 r25, r26 ; cmpeqi r5, r6, 5 } + { addi r15, r16, 5 ; st4 r25, r26 ; shli r5, r6, 5 } + { addi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l1 r25 } + { addi r15, r16, 5 ; tblidxb1 r5, r6 ; prefetch_l1_fault r25 } + { addi r15, r16, 5 ; tblidxb3 r5, r6 ; prefetch_l2_fault r25 } + { addi r15, r16, 5 ; v1mulu r5, r6, r7 } + { addi r15, r16, 5 ; v2packh r5, r6, r7 } + { addi r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } + { addi r5, r6, 5 ; addi r15, r16, 5 ; st r25, r26 } + { addi r5, r6, 5 ; addxi r15, r16, 5 ; st1 r25, r26 } + { addi r5, r6, 5 ; andi r15, r16, 5 ; st1 r25, r26 } + { addi r5, r6, 5 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } + { addi r5, r6, 5 ; cmpleu r15, r16, r17 ; st4 r25, r26 } + { addi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld r25, r26 } + { addi r5, r6, 5 ; dblalign4 r15, r16, r17 } + { addi r5, r6, 5 ; ill ; ld2u r25, r26 } + { addi r5, r6, 5 ; jalr r15 ; ld2s r25, r26 } + { addi r5, r6, 5 ; jr r15 ; ld4s r25, r26 } + { addi r5, r6, 5 ; ld r25, r26 ; cmpeq r15, r16, r17 } + { addi r5, r6, 5 ; ld r25, r26 } + { addi r5, r6, 5 ; ld1s r25, r26 ; shli r15, r16, 5 } + { addi r5, r6, 5 ; ld1u r25, r26 ; rotl r15, r16, r17 } + { addi r5, r6, 5 ; ld2s r25, r26 ; jrp r15 } + { addi r5, r6, 5 ; ld2u r25, r26 ; cmpltsi r15, r16, 5 } + { addi r5, r6, 5 ; ld4s r25, r26 ; addx r15, r16, r17 } + { addi r5, r6, 5 ; ld4s r25, r26 ; shrui r15, r16, 5 } + { addi r5, r6, 5 ; ld4u r25, r26 ; shl1addx r15, r16, r17 } + { addi r5, r6, 5 ; lnk r15 ; prefetch_l1 r25 } + { addi r5, r6, 5 ; move r15, r16 ; prefetch_l1 r25 } + { addi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l1 r25 } + { addi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l2 r25 } + { addi r5, r6, 5 ; prefetch r25 ; cmplts r15, r16, r17 } + { addi r5, r6, 5 ; prefetch_add_l2_fault r15, 5 } + { addi r5, r6, 5 ; prefetch_l1 r25 ; shl3add r15, r16, r17 } + { addi r5, r6, 5 ; prefetch_l1_fault r25 ; or r15, r16, r17 } + { addi r5, r6, 5 ; prefetch_l2 r25 ; jrp r15 } + { addi r5, r6, 5 ; prefetch_l2_fault r25 ; cmpltu r15, r16, r17 } + { addi r5, r6, 5 ; prefetch_l3 r25 ; and r15, r16, r17 } + { addi r5, r6, 5 ; prefetch_l3 r25 ; subx r15, r16, r17 } + { addi r5, r6, 5 ; prefetch_l3_fault r25 ; shl3add r15, r16, r17 } + { addi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } + { addi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } + { addi r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l3 r25 } + { addi r5, r6, 5 ; shl3add r15, r16, r17 ; st r25, r26 } + { addi r5, r6, 5 ; shli r15, r16, 5 ; st2 r25, r26 } + { addi r5, r6, 5 ; shrsi r15, r16, 5 ; st2 r25, r26 } + { addi r5, r6, 5 ; shrui r15, r16, 5 } + { addi r5, r6, 5 ; st r25, r26 ; shl3add r15, r16, r17 } + { addi r5, r6, 5 ; st1 r25, r26 ; or r15, r16, r17 } + { addi r5, r6, 5 ; st2 r25, r26 ; jr r15 } + { addi r5, r6, 5 ; st4 r25, r26 ; cmplts r15, r16, r17 } + { addi r5, r6, 5 ; stnt1 r15, r16 } + { addi r5, r6, 5 ; subx r15, r16, r17 ; st r25, r26 } + { addi r5, r6, 5 ; v2cmpleu r15, r16, r17 } + { addi r5, r6, 5 ; xor r15, r16, r17 ; ld1u r25, r26 } + { addli r15, r16, 0x1234 ; cmpltui r5, r6, 5 } + { addli r15, r16, 0x1234 ; mul_hs_hu r5, r6, r7 } + { addli r15, r16, 0x1234 ; shlx r5, r6, r7 } + { addli r15, r16, 0x1234 ; v1int_h r5, r6, r7 } + { addli r15, r16, 0x1234 ; v2maxsi r5, r6, 5 } + { addli r5, r6, 0x1234 ; addx r15, r16, r17 } + { addli r5, r6, 0x1234 ; iret } + { addli r5, r6, 0x1234 ; movei r15, 5 } + { addli r5, r6, 0x1234 ; shruxi r15, r16, 5 } + { addli r5, r6, 0x1234 ; v1shl r15, r16, r17 } + { addli r5, r6, 0x1234 ; v4add r15, r16, r17 } + { addx r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 } + { addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l1 r25 } + { addx r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l1 r25 } + { addx r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch r25 } + { addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 } + { addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 } + { addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 } + { addx r15, r16, r17 ; cmpltu r5, r6, r7 ; st1 r25, r26 } + { addx r15, r16, r17 ; ctz r5, r6 ; prefetch r25 } + { addx r15, r16, r17 ; fnop ; st2 r25, r26 } + { addx r15, r16, r17 ; info 19 ; prefetch_l3 r25 } + { addx r15, r16, r17 ; ld r25, r26 ; mulax r5, r6, r7 } + { addx r15, r16, r17 ; ld1s r25, r26 ; cmpeq r5, r6, r7 } + { addx r15, r16, r17 ; ld1s r25, r26 ; shl3addx r5, r6, r7 } + { addx r15, r16, r17 ; ld1u r25, r26 ; mul_ls_ls r5, r6, r7 } + { addx r15, r16, r17 ; ld2s r25, r26 ; addxi r5, r6, 5 } + { addx r15, r16, r17 ; ld2s r25, r26 ; shl r5, r6, r7 } + { addx r15, r16, r17 ; ld2u r25, r26 ; info 19 } + { addx r15, r16, r17 ; ld2u r25, r26 ; tblidxb3 r5, r6 } + { addx r15, r16, r17 ; ld4s r25, r26 ; or r5, r6, r7 } + { addx r15, r16, r17 ; ld4u r25, r26 ; cmpltsi r5, r6, 5 } + { addx r15, r16, r17 ; ld4u r25, r26 ; shrui r5, r6, 5 } + { addx r15, r16, r17 ; move r5, r6 ; prefetch_l2_fault r25 } + { addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l3 r25 } + { addx r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 } + { addx r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + { addx r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch r25 } + { addx r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l1 r25 } + { addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l2 r25 } + { addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l3 r25 } + { addx r15, r16, r17 ; pcnt r5, r6 ; prefetch_l3_fault r25 } + { addx r15, r16, r17 ; prefetch r25 ; mz r5, r6, r7 } + { addx r15, r16, r17 ; prefetch_l1 r25 ; cmples r5, r6, r7 } + { addx r15, r16, r17 ; prefetch_l1 r25 ; shrs r5, r6, r7 } + { addx r15, r16, r17 ; prefetch_l1_fault r25 ; mula_hs_hs r5, r6, r7 } + { addx r15, r16, r17 ; prefetch_l2 r25 ; andi r5, r6, 5 } + { addx r15, r16, r17 ; prefetch_l2 r25 ; shl1addx r5, r6, r7 } + { addx r15, r16, r17 ; prefetch_l2_fault r25 ; move r5, r6 } + { addx r15, r16, r17 ; prefetch_l2_fault r25 } + { addx r15, r16, r17 ; prefetch_l3 r25 ; revbits r5, r6 } + { addx r15, r16, r17 ; prefetch_l3_fault r25 ; cmpne r5, r6, r7 } + { addx r15, r16, r17 ; prefetch_l3_fault r25 ; subx r5, r6, r7 } + { addx r15, r16, r17 ; revbytes r5, r6 ; st r25, r26 } + { addx r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 } + { addx r15, r16, r17 ; shl1add r5, r6, r7 ; st4 r25, r26 } + { addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld r25, r26 } + { addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 } + { addx r15, r16, r17 ; shrs r5, r6, r7 ; ld1u r25, r26 } + { addx r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 } + { addx r15, r16, r17 ; st r25, r26 ; addxi r5, r6, 5 } + { addx r15, r16, r17 ; st r25, r26 ; shl r5, r6, r7 } + { addx r15, r16, r17 ; st1 r25, r26 ; info 19 } + { addx r15, r16, r17 ; st1 r25, r26 ; tblidxb3 r5, r6 } + { addx r15, r16, r17 ; st2 r25, r26 ; or r5, r6, r7 } + { addx r15, r16, r17 ; st4 r25, r26 ; cmpltsi r5, r6, 5 } + { addx r15, r16, r17 ; st4 r25, r26 ; shrui r5, r6, 5 } + { addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3 r25 } + { addx r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l3_fault r25 } + { addx r15, r16, r17 ; tblidxb3 r5, r6 ; st1 r25, r26 } + { addx r15, r16, r17 ; v1sadu r5, r6, r7 } + { addx r15, r16, r17 ; v2sadau r5, r6, r7 } + { addx r15, r16, r17 ; xor r5, r6, r7 ; st4 r25, r26 } + { addx r5, r6, r7 ; addi r15, r16, 5 } + { addx r5, r6, r7 ; addxli r15, r16, 0x1234 } + { addx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 } + { addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 } + { addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 } + { addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2u r25, r26 } + { addx r5, r6, r7 ; exch4 r15, r16, r17 } + { addx r5, r6, r7 ; ill ; prefetch_l1 r25 } + { addx r5, r6, r7 ; jalr r15 ; prefetch r25 } + { addx r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 } + { addx r5, r6, r7 ; ld r25, r26 ; cmplts r15, r16, r17 } + { addx r5, r6, r7 ; ld1s r25, r26 ; addx r15, r16, r17 } + { addx r5, r6, r7 ; ld1s r25, r26 ; shrui r15, r16, 5 } + { addx r5, r6, r7 ; ld1u r25, r26 ; shl1addx r15, r16, r17 } + { addx r5, r6, r7 ; ld2s r25, r26 ; movei r15, 5 } + { addx r5, r6, r7 ; ld2u r25, r26 ; ill } + { addx r5, r6, r7 ; ld4s r25, r26 ; cmpeq r15, r16, r17 } + { addx r5, r6, r7 ; ld4s r25, r26 } + { addx r5, r6, r7 ; ld4u r25, r26 ; shl3addx r15, r16, r17 } + { addx r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 } + { addx r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 } + { addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 } + { addx r5, r6, r7 ; nor r15, r16, r17 ; st r25, r26 } + { addx r5, r6, r7 ; prefetch r25 ; fnop } + { addx r5, r6, r7 ; prefetch_l1 r25 ; add r15, r16, r17 } + { addx r5, r6, r7 ; prefetch_l1 r25 ; shrsi r15, r16, 5 } + { addx r5, r6, r7 ; prefetch_l1_fault r25 ; shl1add r15, r16, r17 } + { addx r5, r6, r7 ; prefetch_l2 r25 ; movei r15, 5 } + { addx r5, r6, r7 ; prefetch_l2_fault r25 ; info 19 } + { addx r5, r6, r7 ; prefetch_l3 r25 ; cmples r15, r16, r17 } + { addx r5, r6, r7 ; prefetch_l3_fault r25 ; add r15, r16, r17 } + { addx r5, r6, r7 ; prefetch_l3_fault r25 ; shrsi r15, r16, 5 } + { addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 } + { addx r5, r6, r7 ; shl1add r15, r16, r17 ; st r25, r26 } + { addx r5, r6, r7 ; shl2add r15, r16, r17 ; st2 r25, r26 } + { addx r5, r6, r7 ; shl3add r15, r16, r17 } + { addx r5, r6, r7 ; shlxi r15, r16, 5 } + { addx r5, r6, r7 ; shru r15, r16, r17 ; ld1s r25, r26 } + { addx r5, r6, r7 ; st r25, r26 ; add r15, r16, r17 } + { addx r5, r6, r7 ; st r25, r26 ; shrsi r15, r16, 5 } + { addx r5, r6, r7 ; st1 r25, r26 ; shl1add r15, r16, r17 } + { addx r5, r6, r7 ; st2 r25, r26 ; move r15, r16 } + { addx r5, r6, r7 ; st4 r25, r26 ; fnop } + { addx r5, r6, r7 ; stnt4 r15, r16 } + { addx r5, r6, r7 ; subx r15, r16, r17 } + { addx r5, r6, r7 ; v2cmpltui r15, r16, 5 } + { addx r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 } + { addxi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 } + { addxi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l1 r25 } + { addxi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1 r25 } + { addxi r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch r25 } + { addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 } + { addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 } + { addxi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 } + { addxi r15, r16, 5 ; cmpltu r5, r6, r7 ; st1 r25, r26 } + { addxi r15, r16, 5 ; ctz r5, r6 ; prefetch r25 } + { addxi r15, r16, 5 ; fnop ; st2 r25, r26 } + { addxi r15, r16, 5 ; info 19 ; prefetch_l3 r25 } + { addxi r15, r16, 5 ; ld r25, r26 ; mulax r5, r6, r7 } + { addxi r15, r16, 5 ; ld1s r25, r26 ; cmpeq r5, r6, r7 } + { addxi r15, r16, 5 ; ld1s r25, r26 ; shl3addx r5, r6, r7 } + { addxi r15, r16, 5 ; ld1u r25, r26 ; mul_ls_ls r5, r6, r7 } + { addxi r15, r16, 5 ; ld2s r25, r26 ; addxi r5, r6, 5 } + { addxi r15, r16, 5 ; ld2s r25, r26 ; shl r5, r6, r7 } + { addxi r15, r16, 5 ; ld2u r25, r26 ; info 19 } + { addxi r15, r16, 5 ; ld2u r25, r26 ; tblidxb3 r5, r6 } + { addxi r15, r16, 5 ; ld4s r25, r26 ; or r5, r6, r7 } + { addxi r15, r16, 5 ; ld4u r25, r26 ; cmpltsi r5, r6, 5 } + { addxi r15, r16, 5 ; ld4u r25, r26 ; shrui r5, r6, 5 } + { addxi r15, r16, 5 ; move r5, r6 ; prefetch_l2_fault r25 } + { addxi r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; prefetch_l3 r25 } + { addxi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 } + { addxi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + { addxi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch r25 } + { addxi r15, r16, 5 ; mulax r5, r6, r7 ; prefetch_l1 r25 } + { addxi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l2 r25 } + { addxi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l3 r25 } + { addxi r15, r16, 5 ; pcnt r5, r6 ; prefetch_l3_fault r25 } + { addxi r15, r16, 5 ; prefetch r25 ; mz r5, r6, r7 } + { addxi r15, r16, 5 ; prefetch_l1 r25 ; cmples r5, r6, r7 } + { addxi r15, r16, 5 ; prefetch_l1 r25 ; shrs r5, r6, r7 } + { addxi r15, r16, 5 ; prefetch_l1_fault r25 ; mula_hs_hs r5, r6, r7 } + { addxi r15, r16, 5 ; prefetch_l2 r25 ; andi r5, r6, 5 } + { addxi r15, r16, 5 ; prefetch_l2 r25 ; shl1addx r5, r6, r7 } + { addxi r15, r16, 5 ; prefetch_l2_fault r25 ; move r5, r6 } + { addxi r15, r16, 5 ; prefetch_l2_fault r25 } + { addxi r15, r16, 5 ; prefetch_l3 r25 ; revbits r5, r6 } + { addxi r15, r16, 5 ; prefetch_l3_fault r25 ; cmpne r5, r6, r7 } + { addxi r15, r16, 5 ; prefetch_l3_fault r25 ; subx r5, r6, r7 } + { addxi r15, r16, 5 ; revbytes r5, r6 ; st r25, r26 } + { addxi r15, r16, 5 ; rotli r5, r6, 5 ; st2 r25, r26 } + { addxi r15, r16, 5 ; shl1add r5, r6, r7 ; st4 r25, r26 } + { addxi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 } + { addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld1u r25, r26 } + { addxi r15, r16, 5 ; shrs r5, r6, r7 ; ld1u r25, r26 } + { addxi r15, r16, 5 ; shru r5, r6, r7 ; ld2u r25, r26 } + { addxi r15, r16, 5 ; st r25, r26 ; addxi r5, r6, 5 } + { addxi r15, r16, 5 ; st r25, r26 ; shl r5, r6, r7 } + { addxi r15, r16, 5 ; st1 r25, r26 ; info 19 } + { addxi r15, r16, 5 ; st1 r25, r26 ; tblidxb3 r5, r6 } + { addxi r15, r16, 5 ; st2 r25, r26 ; or r5, r6, r7 } + { addxi r15, r16, 5 ; st4 r25, r26 ; cmpltsi r5, r6, 5 } + { addxi r15, r16, 5 ; st4 r25, r26 ; shrui r5, r6, 5 } + { addxi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l3 r25 } + { addxi r15, r16, 5 ; tblidxb1 r5, r6 ; prefetch_l3_fault r25 } + { addxi r15, r16, 5 ; tblidxb3 r5, r6 ; st1 r25, r26 } + { addxi r15, r16, 5 ; v1sadu r5, r6, r7 } + { addxi r15, r16, 5 ; v2sadau r5, r6, r7 } + { addxi r15, r16, 5 ; xor r5, r6, r7 ; st4 r25, r26 } + { addxi r5, r6, 5 ; addi r15, r16, 5 } + { addxi r5, r6, 5 ; addxli r15, r16, 0x1234 } + { addxi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld r25, r26 } + { addxi r5, r6, 5 ; cmples r15, r16, r17 ; ld r25, r26 } + { addxi r5, r6, 5 ; cmplts r15, r16, r17 ; ld1u r25, r26 } + { addxi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld2u r25, r26 } + { addxi r5, r6, 5 ; exch4 r15, r16, r17 } + { addxi r5, r6, 5 ; ill ; prefetch_l1 r25 } + { addxi r5, r6, 5 ; jalr r15 ; prefetch r25 } + { addxi r5, r6, 5 ; jr r15 ; prefetch_l1_fault r25 } + { addxi r5, r6, 5 ; ld r25, r26 ; cmplts r15, r16, r17 } + { addxi r5, r6, 5 ; ld1s r25, r26 ; addx r15, r16, r17 } + { addxi r5, r6, 5 ; ld1s r25, r26 ; shrui r15, r16, 5 } + { addxi r5, r6, 5 ; ld1u r25, r26 ; shl1addx r15, r16, r17 } + { addxi r5, r6, 5 ; ld2s r25, r26 ; movei r15, 5 } + { addxi r5, r6, 5 ; ld2u r25, r26 ; ill } + { addxi r5, r6, 5 ; ld4s r25, r26 ; cmpeq r15, r16, r17 } + { addxi r5, r6, 5 ; ld4s r25, r26 } + { addxi r5, r6, 5 ; ld4u r25, r26 ; shl3addx r15, r16, r17 } + { addxi r5, r6, 5 ; lnk r15 ; prefetch_l3 r25 } + { addxi r5, r6, 5 ; move r15, r16 ; prefetch_l3 r25 } + { addxi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l3 r25 } + { addxi r5, r6, 5 ; nor r15, r16, r17 ; st r25, r26 } + { addxi r5, r6, 5 ; prefetch r25 ; fnop } + { addxi r5, r6, 5 ; prefetch_l1 r25 ; add r15, r16, r17 } + { addxi r5, r6, 5 ; prefetch_l1 r25 ; shrsi r15, r16, 5 } + { addxi r5, r6, 5 ; prefetch_l1_fault r25 ; shl1add r15, r16, r17 } + { addxi r5, r6, 5 ; prefetch_l2 r25 ; movei r15, 5 } + { addxi r5, r6, 5 ; prefetch_l2_fault r25 ; info 19 } + { addxi r5, r6, 5 ; prefetch_l3 r25 ; cmples r15, r16, r17 } + { addxi r5, r6, 5 ; prefetch_l3_fault r25 ; add r15, r16, r17 } + { addxi r5, r6, 5 ; prefetch_l3_fault r25 ; shrsi r15, r16, 5 } + { addxi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 } + { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st r25, r26 } + { addxi r5, r6, 5 ; shl2add r15, r16, r17 ; st2 r25, r26 } + { addxi r5, r6, 5 ; shl3add r15, r16, r17 } + { addxi r5, r6, 5 ; shlxi r15, r16, 5 } + { addxi r5, r6, 5 ; shru r15, r16, r17 ; ld1s r25, r26 } + { addxi r5, r6, 5 ; st r25, r26 ; add r15, r16, r17 } + { addxi r5, r6, 5 ; st r25, r26 ; shrsi r15, r16, 5 } + { addxi r5, r6, 5 ; st1 r25, r26 ; shl1add r15, r16, r17 } + { addxi r5, r6, 5 ; st2 r25, r26 ; move r15, r16 } + { addxi r5, r6, 5 ; st4 r25, r26 ; fnop } + { addxi r5, r6, 5 ; stnt4 r15, r16 } + { addxi r5, r6, 5 ; subx r15, r16, r17 } + { addxi r5, r6, 5 ; v2cmpltui r15, r16, 5 } + { addxi r5, r6, 5 ; xor r15, r16, r17 ; ld4u r25, r26 } + { addxli r15, r16, 0x1234 ; cmulaf r5, r6, r7 } + { addxli r15, r16, 0x1234 ; mul_hu_ls r5, r6, r7 } + { addxli r15, r16, 0x1234 ; shru r5, r6, r7 } + { addxli r15, r16, 0x1234 ; v1minu r5, r6, r7 } + { addxli r15, r16, 0x1234 ; v2mulfsc r5, r6, r7 } + { addxli r5, r6, 0x1234 ; and r15, r16, r17 } + { addxli r5, r6, 0x1234 ; jrp r15 } + { addxli r5, r6, 0x1234 ; nop } + { addxli r5, r6, 0x1234 ; st2 r15, r16 } + { addxli r5, r6, 0x1234 ; v1shru r15, r16, r17 } + { addxli r5, r6, 0x1234 ; v4packsc r15, r16, r17 } + { addxsc r15, r16, r17 ; cmulhr r5, r6, r7 } + { addxsc r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { addxsc r15, r16, r17 ; shufflebytes r5, r6, r7 } + { addxsc r15, r16, r17 ; v1mulu r5, r6, r7 } + { addxsc r15, r16, r17 ; v2packh r5, r6, r7 } + { addxsc r5, r6, r7 ; cmpexch r15, r16, r17 } + { addxsc r5, r6, r7 ; ld1u r15, r16 } + { addxsc r5, r6, r7 ; prefetch r15 } + { addxsc r5, r6, r7 ; st_add r15, r16, 5 } + { addxsc r5, r6, r7 ; v2add r15, r16, r17 } + { addxsc r5, r6, r7 ; v4shru r15, r16, r17 } + { and r15, r16, r17 ; addi r5, r6, 5 ; st1 r25, r26 } + { and r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 } + { and r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 } + { and r15, r16, r17 ; cmoveqz r5, r6, r7 ; st1 r25, r26 } + { and r15, r16, r17 ; cmpeq r5, r6, r7 ; st4 r25, r26 } + { and r15, r16, r17 ; cmpleu r5, r6, r7 ; ld r25, r26 } + { and r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 } + { and r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 } + { and r15, r16, r17 ; ctz r5, r6 ; st1 r25, r26 } + { and r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld1s r25, r26 } + { and r15, r16, r17 ; ld r25, r26 ; add r5, r6, r7 } + { and r15, r16, r17 ; ld r25, r26 ; revbytes r5, r6 } + { and r15, r16, r17 ; ld1s r25, r26 ; ctz r5, r6 } + { and r15, r16, r17 ; ld1s r25, r26 ; tblidxb0 r5, r6 } + { and r15, r16, r17 ; ld1u r25, r26 ; mz r5, r6, r7 } + { and r15, r16, r17 ; ld2s r25, r26 ; cmples r5, r6, r7 } + { and r15, r16, r17 ; ld2s r25, r26 ; shrs r5, r6, r7 } + { and r15, r16, r17 ; ld2u r25, r26 ; mula_hs_hs r5, r6, r7 } + { and r15, r16, r17 ; ld4s r25, r26 ; andi r5, r6, 5 } + { and r15, r16, r17 ; ld4s r25, r26 ; shl1addx r5, r6, r7 } + { and r15, r16, r17 ; ld4u r25, r26 ; move r5, r6 } + { and r15, r16, r17 ; ld4u r25, r26 } + { and r15, r16, r17 ; movei r5, 5 ; ld r25, r26 } + { and r15, r16, r17 ; mul_hs_ls r5, r6, r7 } + { and r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st4 r25, r26 } + { and r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { and r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; st1 r25, r26 } + { and r15, r16, r17 ; mulax r5, r6, r7 ; st2 r25, r26 } + { and r15, r16, r17 ; mz r5, r6, r7 } + { and r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 } + { and r15, r16, r17 ; prefetch r25 ; addx r5, r6, r7 } + { and r15, r16, r17 ; prefetch r25 ; rotli r5, r6, 5 } + { and r15, r16, r17 ; prefetch_l1 r25 ; fsingle_pack1 r5, r6 } + { and r15, r16, r17 ; prefetch_l1 r25 ; tblidxb2 r5, r6 } + { and r15, r16, r17 ; prefetch_l1_fault r25 ; nor r5, r6, r7 } + { and r15, r16, r17 ; prefetch_l2 r25 ; cmplts r5, r6, r7 } + { and r15, r16, r17 ; prefetch_l2 r25 ; shru r5, r6, r7 } + { and r15, r16, r17 ; prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 } + { and r15, r16, r17 ; prefetch_l3 r25 ; cmoveqz r5, r6, r7 } + { and r15, r16, r17 ; prefetch_l3 r25 ; shl2addx r5, r6, r7 } + { and r15, r16, r17 ; prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 } + { and r15, r16, r17 ; revbits r5, r6 ; ld1s r25, r26 } + { and r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } + { and r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 } + { and r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4u r25, r26 } + { and r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1 r25 } + { and r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 } + { and r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 } + { and r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3 r25 } + { and r15, r16, r17 ; st r25, r26 ; cmples r5, r6, r7 } + { and r15, r16, r17 ; st r25, r26 ; shrs r5, r6, r7 } + { and r15, r16, r17 ; st1 r25, r26 ; mula_hs_hs r5, r6, r7 } + { and r15, r16, r17 ; st2 r25, r26 ; andi r5, r6, 5 } + { and r15, r16, r17 ; st2 r25, r26 ; shl1addx r5, r6, r7 } + { and r15, r16, r17 ; st4 r25, r26 ; move r5, r6 } + { and r15, r16, r17 ; st4 r25, r26 } + { and r15, r16, r17 ; tblidxb0 r5, r6 ; ld r25, r26 } + { and r15, r16, r17 ; tblidxb2 r5, r6 ; ld1u r25, r26 } + { and r15, r16, r17 ; v1avgu r5, r6, r7 } + { and r15, r16, r17 ; v1subuc r5, r6, r7 } + { and r15, r16, r17 ; v2shru r5, r6, r7 } + { and r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } + { and r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 } + { and r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 } + { and r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1 r25 } + { and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1 r25 } + { and r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } + { and r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + { and r5, r6, r7 ; fetchor4 r15, r16, r17 } + { and r5, r6, r7 ; ill ; st2 r25, r26 } + { and r5, r6, r7 ; jalr r15 ; st1 r25, r26 } + { and r5, r6, r7 ; jr r15 ; st4 r25, r26 } + { and r5, r6, r7 ; ld r25, r26 ; jalrp r15 } + { and r5, r6, r7 ; ld1s r25, r26 ; cmplts r15, r16, r17 } + { and r5, r6, r7 ; ld1u r25, r26 ; addi r15, r16, 5 } + { and r5, r6, r7 ; ld1u r25, r26 ; shru r15, r16, r17 } + { and r5, r6, r7 ; ld2s r25, r26 ; shl1add r15, r16, r17 } + { and r5, r6, r7 ; ld2u r25, r26 ; move r15, r16 } + { and r5, r6, r7 ; ld4s r25, r26 ; fnop } + { and r5, r6, r7 ; ld4u r25, r26 ; andi r15, r16, 5 } + { and r5, r6, r7 ; ld4u r25, r26 ; xor r15, r16, r17 } + { and r5, r6, r7 ; mfspr r16, 0x5 } + { and r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } + { and r5, r6, r7 ; nop ; ld1s r25, r26 } + { and r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 } + { and r5, r6, r7 ; prefetch r25 ; mnz r15, r16, r17 } + { and r5, r6, r7 ; prefetch_l1 r25 ; cmples r15, r16, r17 } + { and r5, r6, r7 ; prefetch_l1_fault r25 ; add r15, r16, r17 } + { and r5, r6, r7 ; prefetch_l1_fault r25 ; shrsi r15, r16, 5 } + { and r5, r6, r7 ; prefetch_l2 r25 ; shl1add r15, r16, r17 } + { and r5, r6, r7 ; prefetch_l2_fault r25 ; movei r15, 5 } + { and r5, r6, r7 ; prefetch_l3 r25 ; info 19 } + { and r5, r6, r7 ; prefetch_l3_fault r25 ; cmples r15, r16, r17 } + { and r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 } + { and r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + { and r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + { and r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + { and r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } + { and r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 } + { and r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + { and r5, r6, r7 ; st r25, r26 ; cmples r15, r16, r17 } + { and r5, r6, r7 ; st1 r25, r26 ; add r15, r16, r17 } + { and r5, r6, r7 ; st1 r25, r26 ; shrsi r15, r16, 5 } + { and r5, r6, r7 ; st2 r25, r26 ; shl r15, r16, r17 } + { and r5, r6, r7 ; st4 r25, r26 ; mnz r15, r16, r17 } + { and r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 } + { and r5, r6, r7 ; v1cmpleu r15, r16, r17 } + { and r5, r6, r7 ; v2mnz r15, r16, r17 } + { and r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 } + { andi r15, r16, 5 ; addi r5, r6, 5 ; st1 r25, r26 } + { andi r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 } + { andi r15, r16, 5 ; andi r5, r6, 5 ; st2 r25, r26 } + { andi r15, r16, 5 ; cmoveqz r5, r6, r7 ; st1 r25, r26 } + { andi r15, r16, 5 ; cmpeq r5, r6, r7 ; st4 r25, r26 } + { andi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld r25, r26 } + { andi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 } + { andi r15, r16, 5 ; cmpne r5, r6, r7 ; ld2s r25, r26 } + { andi r15, r16, 5 ; ctz r5, r6 ; st1 r25, r26 } + { andi r15, r16, 5 ; fsingle_pack1 r5, r6 ; ld1s r25, r26 } + { andi r15, r16, 5 ; ld r25, r26 ; add r5, r6, r7 } + { andi r15, r16, 5 ; ld r25, r26 ; revbytes r5, r6 } + { andi r15, r16, 5 ; ld1s r25, r26 ; ctz r5, r6 } + { andi r15, r16, 5 ; ld1s r25, r26 ; tblidxb0 r5, r6 } + { andi r15, r16, 5 ; ld1u r25, r26 ; mz r5, r6, r7 } + { andi r15, r16, 5 ; ld2s r25, r26 ; cmples r5, r6, r7 } + { andi r15, r16, 5 ; ld2s r25, r26 ; shrs r5, r6, r7 } + { andi r15, r16, 5 ; ld2u r25, r26 ; mula_hs_hs r5, r6, r7 } + { andi r15, r16, 5 ; ld4s r25, r26 ; andi r5, r6, 5 } + { andi r15, r16, 5 ; ld4s r25, r26 ; shl1addx r5, r6, r7 } + { andi r15, r16, 5 ; ld4u r25, r26 ; move r5, r6 } + { andi r15, r16, 5 ; ld4u r25, r26 } + { andi r15, r16, 5 ; movei r5, 5 ; ld r25, r26 } + { andi r15, r16, 5 ; mul_hs_ls r5, r6, r7 } + { andi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; st4 r25, r26 } + { andi r15, r16, 5 ; mula_hs_hs r5, r6, r7 } + { andi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; st1 r25, r26 } + { andi r15, r16, 5 ; mulax r5, r6, r7 ; st2 r25, r26 } + { andi r15, r16, 5 ; mz r5, r6, r7 } + { andi r15, r16, 5 ; or r5, r6, r7 ; ld1s r25, r26 } + { andi r15, r16, 5 ; prefetch r25 ; addx r5, r6, r7 } + { andi r15, r16, 5 ; prefetch r25 ; rotli r5, r6, 5 } + { andi r15, r16, 5 ; prefetch_l1 r25 ; fsingle_pack1 r5, r6 } + { andi r15, r16, 5 ; prefetch_l1 r25 ; tblidxb2 r5, r6 } + { andi r15, r16, 5 ; prefetch_l1_fault r25 ; nor r5, r6, r7 } + { andi r15, r16, 5 ; prefetch_l2 r25 ; cmplts r5, r6, r7 } + { andi r15, r16, 5 ; prefetch_l2 r25 ; shru r5, r6, r7 } + { andi r15, r16, 5 ; prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 } + { andi r15, r16, 5 ; prefetch_l3 r25 ; cmoveqz r5, r6, r7 } + { andi r15, r16, 5 ; prefetch_l3 r25 ; shl2addx r5, r6, r7 } + { andi r15, r16, 5 ; prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 } + { andi r15, r16, 5 ; revbits r5, r6 ; ld1s r25, r26 } + { andi r15, r16, 5 ; rotl r5, r6, r7 ; ld2s r25, r26 } + { andi r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 } + { andi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld4u r25, r26 } + { andi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l1 r25 } + { andi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 } + { andi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 } + { andi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l3 r25 } + { andi r15, r16, 5 ; st r25, r26 ; cmples r5, r6, r7 } + { andi r15, r16, 5 ; st r25, r26 ; shrs r5, r6, r7 } + { andi r15, r16, 5 ; st1 r25, r26 ; mula_hs_hs r5, r6, r7 } + { andi r15, r16, 5 ; st2 r25, r26 ; andi r5, r6, 5 } + { andi r15, r16, 5 ; st2 r25, r26 ; shl1addx r5, r6, r7 } + { andi r15, r16, 5 ; st4 r25, r26 ; move r5, r6 } + { andi r15, r16, 5 ; st4 r25, r26 } + { andi r15, r16, 5 ; tblidxb0 r5, r6 ; ld r25, r26 } + { andi r15, r16, 5 ; tblidxb2 r5, r6 ; ld1u r25, r26 } + { andi r15, r16, 5 ; v1avgu r5, r6, r7 } + { andi r15, r16, 5 ; v1subuc r5, r6, r7 } + { andi r15, r16, 5 ; v2shru r5, r6, r7 } + { andi r5, r6, 5 ; add r15, r16, r17 ; ld4s r25, r26 } + { andi r5, r6, 5 ; addx r15, r16, r17 ; ld4u r25, r26 } + { andi r5, r6, 5 ; and r15, r16, r17 ; ld4u r25, r26 } + { andi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l1 r25 } + { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l1 r25 } + { andi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } + { andi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + { andi r5, r6, 5 ; fetchor4 r15, r16, r17 } + { andi r5, r6, 5 ; ill ; st2 r25, r26 } + { andi r5, r6, 5 ; jalr r15 ; st1 r25, r26 } + { andi r5, r6, 5 ; jr r15 ; st4 r25, r26 } + { andi r5, r6, 5 ; ld r25, r26 ; jalrp r15 } + { andi r5, r6, 5 ; ld1s r25, r26 ; cmplts r15, r16, r17 } + { andi r5, r6, 5 ; ld1u r25, r26 ; addi r15, r16, 5 } + { andi r5, r6, 5 ; ld1u r25, r26 ; shru r15, r16, r17 } + { andi r5, r6, 5 ; ld2s r25, r26 ; shl1add r15, r16, r17 } + { andi r5, r6, 5 ; ld2u r25, r26 ; move r15, r16 } + { andi r5, r6, 5 ; ld4s r25, r26 ; fnop } + { andi r5, r6, 5 ; ld4u r25, r26 ; andi r15, r16, 5 } + { andi r5, r6, 5 ; ld4u r25, r26 ; xor r15, r16, r17 } + { andi r5, r6, 5 ; mfspr r16, 0x5 } + { andi r5, r6, 5 ; movei r15, 5 ; ld1s r25, r26 } + { andi r5, r6, 5 ; nop ; ld1s r25, r26 } + { andi r5, r6, 5 ; or r15, r16, r17 ; ld2s r25, r26 } + { andi r5, r6, 5 ; prefetch r25 ; mnz r15, r16, r17 } + { andi r5, r6, 5 ; prefetch_l1 r25 ; cmples r15, r16, r17 } + { andi r5, r6, 5 ; prefetch_l1_fault r25 ; add r15, r16, r17 } + { andi r5, r6, 5 ; prefetch_l1_fault r25 ; shrsi r15, r16, 5 } + { andi r5, r6, 5 ; prefetch_l2 r25 ; shl1add r15, r16, r17 } + { andi r5, r6, 5 ; prefetch_l2_fault r25 ; movei r15, 5 } + { andi r5, r6, 5 ; prefetch_l3 r25 ; info 19 } + { andi r5, r6, 5 ; prefetch_l3_fault r25 ; cmples r15, r16, r17 } + { andi r5, r6, 5 ; rotl r15, r16, r17 ; ld r25, r26 } + { andi r5, r6, 5 ; shl r15, r16, r17 ; ld1u r25, r26 } + { andi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + { andi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + { andi r5, r6, 5 ; shl3addx r15, r16, r17 ; prefetch r25 } + { andi r5, r6, 5 ; shrs r15, r16, r17 ; prefetch r25 } + { andi r5, r6, 5 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + { andi r5, r6, 5 ; st r25, r26 ; cmples r15, r16, r17 } + { andi r5, r6, 5 ; st1 r25, r26 ; add r15, r16, r17 } + { andi r5, r6, 5 ; st1 r25, r26 ; shrsi r15, r16, 5 } + { andi r5, r6, 5 ; st2 r25, r26 ; shl r15, r16, r17 } + { andi r5, r6, 5 ; st4 r25, r26 ; mnz r15, r16, r17 } + { andi r5, r6, 5 ; sub r15, r16, r17 ; ld4s r25, r26 } + { andi r5, r6, 5 ; v1cmpleu r15, r16, r17 } + { andi r5, r6, 5 ; v2mnz r15, r16, r17 } + { andi r5, r6, 5 ; xor r15, r16, r17 ; st r25, r26 } + { bfexts r5, r6, 5, 7 ; finv r15 } + { bfexts r5, r6, 5, 7 ; ldnt4s_add r15, r16, 5 } + { bfexts r5, r6, 5, 7 ; shl3addx r15, r16, r17 } + { bfexts r5, r6, 5, 7 ; v1cmpne r15, r16, r17 } + { bfexts r5, r6, 5, 7 ; v2shl r15, r16, r17 } + { bfextu r5, r6, 5, 7 ; cmpltu r15, r16, r17 } + { bfextu r5, r6, 5, 7 ; ld4s r15, r16 } + { bfextu r5, r6, 5, 7 ; prefetch_add_l3_fault r15, 5 } + { bfextu r5, r6, 5, 7 ; stnt4 r15, r16 } + { bfextu r5, r6, 5, 7 ; v2cmpleu r15, r16, r17 } + { bfins r5, r6, 5, 7 ; add r15, r16, r17 } + { bfins r5, r6, 5, 7 ; info 19 } + { bfins r5, r6, 5, 7 ; mfspr r16, 0x5 } + { bfins r5, r6, 5, 7 ; shru r15, r16, r17 } + { bfins r5, r6, 5, 7 ; v1minui r15, r16, 5 } + { bfins r5, r6, 5, 7 ; v2shrui r15, r16, 5 } + { clz r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 } + { clz r5, r6 ; addxi r15, r16, 5 ; ld2u r25, r26 } + { clz r5, r6 ; andi r15, r16, 5 ; ld2u r25, r26 } + { clz r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 } + { clz r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 } + { clz r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l1 r25 } + { clz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 } + { clz r5, r6 ; fnop ; prefetch_l3_fault r25 } + { clz r5, r6 ; info 19 ; st r25, r26 } + { clz r5, r6 ; jalrp r15 ; prefetch_l3_fault r25 } + { clz r5, r6 ; jrp r15 ; st1 r25, r26 } + { clz r5, r6 ; ld r25, r26 ; shl2addx r15, r16, r17 } + { clz r5, r6 ; ld1s r25, r26 ; nor r15, r16, r17 } + { clz r5, r6 ; ld1u r25, r26 ; jalrp r15 } + { clz r5, r6 ; ld2s r25, r26 ; cmpleu r15, r16, r17 } + { clz r5, r6 ; ld2u r25, r26 ; add r15, r16, r17 } + { clz r5, r6 ; ld2u r25, r26 ; shrsi r15, r16, 5 } + { clz r5, r6 ; ld4s r25, r26 ; shl r15, r16, r17 } + { clz r5, r6 ; ld4u r25, r26 ; mnz r15, r16, r17 } + { clz r5, r6 ; ldnt4u r15, r16 } + { clz r5, r6 ; mnz r15, r16, r17 ; st2 r25, r26 } + { clz r5, r6 ; movei r15, 5 } + { clz r5, r6 ; nop } + { clz r5, r6 ; prefetch r15 } + { clz r5, r6 ; prefetch r25 ; shrs r15, r16, r17 } + { clz r5, r6 ; prefetch_l1 r25 ; mz r15, r16, r17 } + { clz r5, r6 ; prefetch_l1_fault r25 ; jalr r15 } + { clz r5, r6 ; prefetch_l2 r25 ; cmpleu r15, r16, r17 } + { clz r5, r6 ; prefetch_l2_fault r25 ; addi r15, r16, 5 } + { clz r5, r6 ; prefetch_l2_fault r25 ; shru r15, r16, r17 } + { clz r5, r6 ; prefetch_l3 r25 ; shl1addx r15, r16, r17 } + { clz r5, r6 ; prefetch_l3_fault r25 ; mz r15, r16, r17 } + { clz r5, r6 ; rotl r15, r16, r17 ; st4 r25, r26 } + { clz r5, r6 ; shl16insli r15, r16, 0x1234 } + { clz r5, r6 ; shl2add r15, r16, r17 ; ld1s r25, r26 } + { clz r5, r6 ; shl3add r15, r16, r17 ; ld2s r25, r26 } + { clz r5, r6 ; shli r15, r16, 5 ; ld4s r25, r26 } + { clz r5, r6 ; shrsi r15, r16, 5 ; ld4s r25, r26 } + { clz r5, r6 ; shrui r15, r16, 5 ; prefetch r25 } + { clz r5, r6 ; st r25, r26 ; mz r15, r16, r17 } + { clz r5, r6 ; st1 r25, r26 ; jalr r15 } + { clz r5, r6 ; st2 r25, r26 ; cmples r15, r16, r17 } + { clz r5, r6 ; st4 r15, r16 } + { clz r5, r6 ; st4 r25, r26 ; shrs r15, r16, r17 } + { clz r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 } + { clz r5, r6 ; v1shrsi r15, r16, 5 } + { clz r5, r6 ; v4int_l r15, r16, r17 } + { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2_fault r25 } + { cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 } + { cmoveqz r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 } + { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 } + { cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 } + { cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 } + { cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 } + { cmoveqz r5, r6, r7 ; fnop ; ld1u r25, r26 } + { cmoveqz r5, r6, r7 ; info 19 ; ld2s r25, r26 } + { cmoveqz r5, r6, r7 ; jalrp r15 ; ld1u r25, r26 } + { cmoveqz r5, r6, r7 ; jrp r15 ; ld2u r25, r26 } + { cmoveqz r5, r6, r7 ; ld r25, r26 ; movei r15, 5 } + { cmoveqz r5, r6, r7 ; ld1s r25, r26 ; info 19 } + { cmoveqz r5, r6, r7 ; ld1u r25, r26 ; cmpeqi r15, r16, 5 } + { cmoveqz r5, r6, r7 ; ld1u_add r15, r16, 5 } + { cmoveqz r5, r6, r7 ; ld2s r25, r26 ; shli r15, r16, 5 } + { cmoveqz r5, r6, r7 ; ld2u r25, r26 ; rotl r15, r16, r17 } + { cmoveqz r5, r6, r7 ; ld4s r25, r26 ; jrp r15 } + { cmoveqz r5, r6, r7 ; ld4u r25, r26 ; cmpltsi r15, r16, 5 } + { cmoveqz r5, r6, r7 ; ldnt r15, r16 } + { cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 } + { cmoveqz r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + { cmoveqz r5, r6, r7 ; nop ; prefetch r25 } + { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 } + { cmoveqz r5, r6, r7 ; prefetch r25 ; or r15, r16, r17 } + { cmoveqz r5, r6, r7 ; prefetch_l1 r25 ; fnop } + { cmoveqz r5, r6, r7 ; prefetch_l1_fault r25 ; cmpeq r15, r16, r17 } + { cmoveqz r5, r6, r7 ; prefetch_l1_fault r25 } + { cmoveqz r5, r6, r7 ; prefetch_l2 r25 ; shli r15, r16, 5 } + { cmoveqz r5, r6, r7 ; prefetch_l2_fault r25 ; rotli r15, r16, 5 } + { cmoveqz r5, r6, r7 ; prefetch_l3 r25 ; mnz r15, r16, r17 } + { cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 ; fnop } + { cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 } + { cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l1 r25 } + { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 } + { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 } + { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 } + { cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 } + { cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 } + { cmoveqz r5, r6, r7 ; st r25, r26 ; fnop } + { cmoveqz r5, r6, r7 ; st1 r25, r26 ; cmpeq r15, r16, r17 } + { cmoveqz r5, r6, r7 ; st1 r25, r26 } + { cmoveqz r5, r6, r7 ; st2 r25, r26 ; shl3addx r15, r16, r17 } + { cmoveqz r5, r6, r7 ; st4 r25, r26 ; or r15, r16, r17 } + { cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2_fault r25 } + { cmoveqz r5, r6, r7 ; v1int_h r15, r16, r17 } + { cmoveqz r5, r6, r7 ; v2shli r15, r16, 5 } + { cmovnez r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 } + { cmovnez r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 } + { cmovnez r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 } + { cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } + { cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 } + { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 } + { cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + { cmovnez r5, r6, r7 ; fetchaddgez r15, r16, r17 } + { cmovnez r5, r6, r7 ; ill ; prefetch_l2_fault r25 } + { cmovnez r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 } + { cmovnez r5, r6, r7 ; jr r15 ; prefetch_l3 r25 } + { cmovnez r5, r6, r7 ; ld r25, r26 ; cmpne r15, r16, r17 } + { cmovnez r5, r6, r7 ; ld1s r25, r26 ; andi r15, r16, 5 } + { cmovnez r5, r6, r7 ; ld1s r25, r26 ; xor r15, r16, r17 } + { cmovnez r5, r6, r7 ; ld1u r25, r26 ; shl3add r15, r16, r17 } + { cmovnez r5, r6, r7 ; ld2s r25, r26 ; nor r15, r16, r17 } + { cmovnez r5, r6, r7 ; ld2u r25, r26 ; jalrp r15 } + { cmovnez r5, r6, r7 ; ld4s r25, r26 ; cmpleu r15, r16, r17 } + { cmovnez r5, r6, r7 ; ld4u r25, r26 ; add r15, r16, r17 } + { cmovnez r5, r6, r7 ; ld4u r25, r26 ; shrsi r15, r16, 5 } + { cmovnez r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + { cmovnez r5, r6, r7 ; move r15, r16 ; st1 r25, r26 } + { cmovnez r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 } + { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 } + { cmovnez r5, r6, r7 ; prefetch r25 ; jalr r15 } + { cmovnez r5, r6, r7 ; prefetch_l1 r25 ; addxi r15, r16, 5 } + { cmovnez r5, r6, r7 ; prefetch_l1 r25 ; sub r15, r16, r17 } + { cmovnez r5, r6, r7 ; prefetch_l1_fault r25 ; shl2addx r15, r16, r17 } + { cmovnez r5, r6, r7 ; prefetch_l2 r25 ; nor r15, r16, r17 } + { cmovnez r5, r6, r7 ; prefetch_l2_fault r25 ; jr r15 } + { cmovnez r5, r6, r7 ; prefetch_l3 r25 ; cmpltsi r15, r16, 5 } + { cmovnez r5, r6, r7 ; prefetch_l3_fault r25 ; addxi r15, r16, 5 } + { cmovnez r5, r6, r7 ; prefetch_l3_fault r25 ; sub r15, r16, r17 } + { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 } + { cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 } + { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 } + { cmovnez r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + { cmovnez r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 } + { cmovnez r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 } + { cmovnez r5, r6, r7 ; st r25, r26 ; addxi r15, r16, 5 } + { cmovnez r5, r6, r7 ; st r25, r26 ; sub r15, r16, r17 } + { cmovnez r5, r6, r7 ; st1 r25, r26 ; shl2addx r15, r16, r17 } + { cmovnez r5, r6, r7 ; st2 r25, r26 ; nop } + { cmovnez r5, r6, r7 ; st4 r25, r26 ; jalr r15 } + { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } + { cmovnez r5, r6, r7 ; v1addi r15, r16, 5 } + { cmovnez r5, r6, r7 ; v2int_l r15, r16, r17 } + { cmovnez r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + { cmpeq r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l2 r25 } + { cmpeq r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 } + { cmpeq r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l2_fault r25 } + { cmpeq r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l2 r25 } + { cmpeq r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 } + { cmpeq r15, r16, r17 ; cmples r5, r6, r7 ; st r25, r26 } + { cmpeq r15, r16, r17 ; cmplts r5, r6, r7 ; st2 r25, r26 } + { cmpeq r15, r16, r17 ; cmpltu r5, r6, r7 } + { cmpeq r15, r16, r17 ; ctz r5, r6 ; prefetch_l2 r25 } + { cmpeq r15, r16, r17 ; fsingle_add1 r5, r6, r7 } + { cmpeq r15, r16, r17 ; info 19 ; st1 r25, r26 } + { cmpeq r15, r16, r17 ; ld r25, r26 ; nop } + { cmpeq r15, r16, r17 ; ld1s r25, r26 ; cmpleu r5, r6, r7 } + { cmpeq r15, r16, r17 ; ld1s r25, r26 ; shrsi r5, r6, 5 } + { cmpeq r15, r16, r17 ; ld1u r25, r26 ; mula_hu_hu r5, r6, r7 } + { cmpeq r15, r16, r17 ; ld2s r25, r26 ; clz r5, r6 } + { cmpeq r15, r16, r17 ; ld2s r25, r26 ; shl2add r5, r6, r7 } + { cmpeq r15, r16, r17 ; ld2u r25, r26 ; movei r5, 5 } + { cmpeq r15, r16, r17 ; ld4s r25, r26 ; add r5, r6, r7 } + { cmpeq r15, r16, r17 ; ld4s r25, r26 ; revbytes r5, r6 } + { cmpeq r15, r16, r17 ; ld4u r25, r26 ; ctz r5, r6 } + { cmpeq r15, r16, r17 ; ld4u r25, r26 ; tblidxb0 r5, r6 } + { cmpeq r15, r16, r17 ; move r5, r6 ; st r25, r26 } + { cmpeq r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st1 r25, r26 } + { cmpeq r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch_l3 r25 } + { cmpeq r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 } + { cmpeq r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l2 r25 } + { cmpeq r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l2_fault r25 } + { cmpeq r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l3_fault r25 } + { cmpeq r15, r16, r17 ; nor r5, r6, r7 ; st1 r25, r26 } + { cmpeq r15, r16, r17 ; pcnt r5, r6 ; st2 r25, r26 } + { cmpeq r15, r16, r17 ; prefetch r25 ; or r5, r6, r7 } + { cmpeq r15, r16, r17 ; prefetch_l1 r25 ; cmpltsi r5, r6, 5 } + { cmpeq r15, r16, r17 ; prefetch_l1 r25 ; shrui r5, r6, 5 } + { cmpeq r15, r16, r17 ; prefetch_l1_fault r25 ; mula_lu_lu r5, r6, r7 } + { cmpeq r15, r16, r17 ; prefetch_l2 r25 ; cmovnez r5, r6, r7 } + { cmpeq r15, r16, r17 ; prefetch_l2 r25 ; shl3add r5, r6, r7 } + { cmpeq r15, r16, r17 ; prefetch_l2_fault r25 ; mul_hu_hu r5, r6, r7 } + { cmpeq r15, r16, r17 ; prefetch_l3 r25 ; addx r5, r6, r7 } + { cmpeq r15, r16, r17 ; prefetch_l3 r25 ; rotli r5, r6, 5 } + { cmpeq r15, r16, r17 ; prefetch_l3_fault r25 ; fsingle_pack1 r5, r6 } + { cmpeq r15, r16, r17 ; prefetch_l3_fault r25 ; tblidxb2 r5, r6 } + { cmpeq r15, r16, r17 ; revbytes r5, r6 ; st4 r25, r26 } + { cmpeq r15, r16, r17 ; shl r5, r6, r7 ; ld r25, r26 } + { cmpeq r15, r16, r17 ; shl1addx r5, r6, r7 ; ld1s r25, r26 } + { cmpeq r15, r16, r17 ; shl2addx r5, r6, r7 ; ld2s r25, r26 } + { cmpeq r15, r16, r17 ; shl3addx r5, r6, r7 ; ld4s r25, r26 } + { cmpeq r15, r16, r17 ; shrs r5, r6, r7 ; ld4s r25, r26 } + { cmpeq r15, r16, r17 ; shru r5, r6, r7 ; prefetch r25 } + { cmpeq r15, r16, r17 ; st r25, r26 ; clz r5, r6 } + { cmpeq r15, r16, r17 ; st r25, r26 ; shl2add r5, r6, r7 } + { cmpeq r15, r16, r17 ; st1 r25, r26 ; movei r5, 5 } + { cmpeq r15, r16, r17 ; st2 r25, r26 ; add r5, r6, r7 } + { cmpeq r15, r16, r17 ; st2 r25, r26 ; revbytes r5, r6 } + { cmpeq r15, r16, r17 ; st4 r25, r26 ; ctz r5, r6 } + { cmpeq r15, r16, r17 ; st4 r25, r26 ; tblidxb0 r5, r6 } + { cmpeq r15, r16, r17 ; subx r5, r6, r7 ; st1 r25, r26 } + { cmpeq r15, r16, r17 ; tblidxb1 r5, r6 ; st2 r25, r26 } + { cmpeq r15, r16, r17 ; tblidxb3 r5, r6 } + { cmpeq r15, r16, r17 ; v1shrs r5, r6, r7 } + { cmpeq r15, r16, r17 ; v2shl r5, r6, r7 } + { cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 } + { cmpeq r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 } + { cmpeq r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 } + { cmpeq r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } + { cmpeq r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 } + { cmpeq r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 } + { cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + { cmpeq r5, r6, r7 ; fetchaddgez r15, r16, r17 } + { cmpeq r5, r6, r7 ; ill ; prefetch_l2_fault r25 } + { cmpeq r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 } + { cmpeq r5, r6, r7 ; jr r15 ; prefetch_l3 r25 } + { cmpeq r5, r6, r7 ; ld r25, r26 ; cmpne r15, r16, r17 } + { cmpeq r5, r6, r7 ; ld1s r25, r26 ; andi r15, r16, 5 } + { cmpeq r5, r6, r7 ; ld1s r25, r26 ; xor r15, r16, r17 } + { cmpeq r5, r6, r7 ; ld1u r25, r26 ; shl3add r15, r16, r17 } + { cmpeq r5, r6, r7 ; ld2s r25, r26 ; nor r15, r16, r17 } + { cmpeq r5, r6, r7 ; ld2u r25, r26 ; jalrp r15 } + { cmpeq r5, r6, r7 ; ld4s r25, r26 ; cmpleu r15, r16, r17 } + { cmpeq r5, r6, r7 ; ld4u r25, r26 ; add r15, r16, r17 } + { cmpeq r5, r6, r7 ; ld4u r25, r26 ; shrsi r15, r16, 5 } + { cmpeq r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + { cmpeq r5, r6, r7 ; move r15, r16 ; st1 r25, r26 } + { cmpeq r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 } + { cmpeq r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 } + { cmpeq r5, r6, r7 ; prefetch r25 ; jalr r15 } + { cmpeq r5, r6, r7 ; prefetch_l1 r25 ; addxi r15, r16, 5 } + { cmpeq r5, r6, r7 ; prefetch_l1 r25 ; sub r15, r16, r17 } + { cmpeq r5, r6, r7 ; prefetch_l1_fault r25 ; shl2addx r15, r16, r17 } + { cmpeq r5, r6, r7 ; prefetch_l2 r25 ; nor r15, r16, r17 } + { cmpeq r5, r6, r7 ; prefetch_l2_fault r25 ; jr r15 } + { cmpeq r5, r6, r7 ; prefetch_l3 r25 ; cmpltsi r15, r16, 5 } + { cmpeq r5, r6, r7 ; prefetch_l3_fault r25 ; addxi r15, r16, 5 } + { cmpeq r5, r6, r7 ; prefetch_l3_fault r25 ; sub r15, r16, r17 } + { cmpeq r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 } + { cmpeq r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 } + { cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 } + { cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + { cmpeq r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 } + { cmpeq r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 } + { cmpeq r5, r6, r7 ; st r25, r26 ; addxi r15, r16, 5 } + { cmpeq r5, r6, r7 ; st r25, r26 ; sub r15, r16, r17 } + { cmpeq r5, r6, r7 ; st1 r25, r26 ; shl2addx r15, r16, r17 } + { cmpeq r5, r6, r7 ; st2 r25, r26 ; nop } + { cmpeq r5, r6, r7 ; st4 r25, r26 ; jalr r15 } + { cmpeq r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } + { cmpeq r5, r6, r7 ; v1addi r15, r16, 5 } + { cmpeq r5, r6, r7 ; v2int_l r15, r16, r17 } + { cmpeq r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + { cmpeqi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l2 r25 } + { cmpeqi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 } + { cmpeqi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l2_fault r25 } + { cmpeqi r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch_l2 r25 } + { cmpeqi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 } + { cmpeqi r15, r16, 5 ; cmples r5, r6, r7 ; st r25, r26 } + { cmpeqi r15, r16, 5 ; cmplts r5, r6, r7 ; st2 r25, r26 } + { cmpeqi r15, r16, 5 ; cmpltu r5, r6, r7 } + { cmpeqi r15, r16, 5 ; ctz r5, r6 ; prefetch_l2 r25 } + { cmpeqi r15, r16, 5 ; fsingle_add1 r5, r6, r7 } + { cmpeqi r15, r16, 5 ; info 19 ; st1 r25, r26 } + { cmpeqi r15, r16, 5 ; ld r25, r26 ; nop } + { cmpeqi r15, r16, 5 ; ld1s r25, r26 ; cmpleu r5, r6, r7 } + { cmpeqi r15, r16, 5 ; ld1s r25, r26 ; shrsi r5, r6, 5 } + { cmpeqi r15, r16, 5 ; ld1u r25, r26 ; mula_hu_hu r5, r6, r7 } + { cmpeqi r15, r16, 5 ; ld2s r25, r26 ; clz r5, r6 } + { cmpeqi r15, r16, 5 ; ld2s r25, r26 ; shl2add r5, r6, r7 } + { cmpeqi r15, r16, 5 ; ld2u r25, r26 ; movei r5, 5 } + { cmpeqi r15, r16, 5 ; ld4s r25, r26 ; add r5, r6, r7 } + { cmpeqi r15, r16, 5 ; ld4s r25, r26 ; revbytes r5, r6 } + { cmpeqi r15, r16, 5 ; ld4u r25, r26 ; ctz r5, r6 } + { cmpeqi r15, r16, 5 ; ld4u r25, r26 ; tblidxb0 r5, r6 } + { cmpeqi r15, r16, 5 ; move r5, r6 ; st r25, r26 } + { cmpeqi r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; st1 r25, r26 } + { cmpeqi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; prefetch_l3 r25 } + { cmpeqi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 } + { cmpeqi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch_l2 r25 } + { cmpeqi r15, r16, 5 ; mulax r5, r6, r7 ; prefetch_l2_fault r25 } + { cmpeqi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l3_fault r25 } + { cmpeqi r15, r16, 5 ; nor r5, r6, r7 ; st1 r25, r26 } + { cmpeqi r15, r16, 5 ; pcnt r5, r6 ; st2 r25, r26 } + { cmpeqi r15, r16, 5 ; prefetch r25 ; or r5, r6, r7 } + { cmpeqi r15, r16, 5 ; prefetch_l1 r25 ; cmpltsi r5, r6, 5 } + { cmpeqi r15, r16, 5 ; prefetch_l1 r25 ; shrui r5, r6, 5 } + { cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 ; mula_lu_lu r5, r6, r7 } + { cmpeqi r15, r16, 5 ; prefetch_l2 r25 ; cmovnez r5, r6, r7 } + { cmpeqi r15, r16, 5 ; prefetch_l2 r25 ; shl3add r5, r6, r7 } + { cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 ; mul_hu_hu r5, r6, r7 } + { cmpeqi r15, r16, 5 ; prefetch_l3 r25 ; addx r5, r6, r7 } + { cmpeqi r15, r16, 5 ; prefetch_l3 r25 ; rotli r5, r6, 5 } + { cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 ; fsingle_pack1 r5, r6 } + { cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 ; tblidxb2 r5, r6 } + { cmpeqi r15, r16, 5 ; revbytes r5, r6 ; st4 r25, r26 } + { cmpeqi r15, r16, 5 ; shl r5, r6, r7 ; ld r25, r26 } + { cmpeqi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld1s r25, r26 } + { cmpeqi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld2s r25, r26 } + { cmpeqi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld4s r25, r26 } + { cmpeqi r15, r16, 5 ; shrs r5, r6, r7 ; ld4s r25, r26 } + { cmpeqi r15, r16, 5 ; shru r5, r6, r7 ; prefetch r25 } + { cmpeqi r15, r16, 5 ; st r25, r26 ; clz r5, r6 } + { cmpeqi r15, r16, 5 ; st r25, r26 ; shl2add r5, r6, r7 } + { cmpeqi r15, r16, 5 ; st1 r25, r26 ; movei r5, 5 } + { cmpeqi r15, r16, 5 ; st2 r25, r26 ; add r5, r6, r7 } + { cmpeqi r15, r16, 5 ; st2 r25, r26 ; revbytes r5, r6 } + { cmpeqi r15, r16, 5 ; st4 r25, r26 ; ctz r5, r6 } + { cmpeqi r15, r16, 5 ; st4 r25, r26 ; tblidxb0 r5, r6 } + { cmpeqi r15, r16, 5 ; subx r5, r6, r7 ; st1 r25, r26 } + { cmpeqi r15, r16, 5 ; tblidxb1 r5, r6 ; st2 r25, r26 } + { cmpeqi r15, r16, 5 ; tblidxb3 r5, r6 } + { cmpeqi r15, r16, 5 ; v1shrs r5, r6, r7 } + { cmpeqi r15, r16, 5 ; v2shl r5, r6, r7 } + { cmpeqi r5, r6, 5 ; add r15, r16, r17 ; ld r25, r26 } + { cmpeqi r5, r6, 5 ; addx r15, r16, r17 ; ld1s r25, r26 } + { cmpeqi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 } + { cmpeqi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } + { cmpeqi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 } + { cmpeqi r5, r6, 5 ; cmplts r15, r16, r17 ; ld4s r25, r26 } + { cmpeqi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch r25 } + { cmpeqi r5, r6, 5 ; fetchaddgez r15, r16, r17 } + { cmpeqi r5, r6, 5 ; ill ; prefetch_l2_fault r25 } + { cmpeqi r5, r6, 5 ; jalr r15 ; prefetch_l2 r25 } + { cmpeqi r5, r6, 5 ; jr r15 ; prefetch_l3 r25 } + { cmpeqi r5, r6, 5 ; ld r25, r26 ; cmpne r15, r16, r17 } + { cmpeqi r5, r6, 5 ; ld1s r25, r26 ; andi r15, r16, 5 } + { cmpeqi r5, r6, 5 ; ld1s r25, r26 ; xor r15, r16, r17 } + { cmpeqi r5, r6, 5 ; ld1u r25, r26 ; shl3add r15, r16, r17 } + { cmpeqi r5, r6, 5 ; ld2s r25, r26 ; nor r15, r16, r17 } + { cmpeqi r5, r6, 5 ; ld2u r25, r26 ; jalrp r15 } + { cmpeqi r5, r6, 5 ; ld4s r25, r26 ; cmpleu r15, r16, r17 } + { cmpeqi r5, r6, 5 ; ld4u r25, r26 ; add r15, r16, r17 } + { cmpeqi r5, r6, 5 ; ld4u r25, r26 ; shrsi r15, r16, 5 } + { cmpeqi r5, r6, 5 ; lnk r15 ; st1 r25, r26 } + { cmpeqi r5, r6, 5 ; move r15, r16 ; st1 r25, r26 } + { cmpeqi r5, r6, 5 ; mz r15, r16, r17 ; st1 r25, r26 } + { cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; st4 r25, r26 } + { cmpeqi r5, r6, 5 ; prefetch r25 ; jalr r15 } + { cmpeqi r5, r6, 5 ; prefetch_l1 r25 ; addxi r15, r16, 5 } + { cmpeqi r5, r6, 5 ; prefetch_l1 r25 ; sub r15, r16, r17 } + { cmpeqi r5, r6, 5 ; prefetch_l1_fault r25 ; shl2addx r15, r16, r17 } + { cmpeqi r5, r6, 5 ; prefetch_l2 r25 ; nor r15, r16, r17 } + { cmpeqi r5, r6, 5 ; prefetch_l2_fault r25 ; jr r15 } + { cmpeqi r5, r6, 5 ; prefetch_l3 r25 ; cmpltsi r15, r16, 5 } + { cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 ; addxi r15, r16, 5 } + { cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 ; sub r15, r16, r17 } + { cmpeqi r5, r6, 5 ; rotli r15, r16, 5 ; st2 r25, r26 } + { cmpeqi r5, r6, 5 ; shl1add r15, r16, r17 ; st4 r25, r26 } + { cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld r25, r26 } + { cmpeqi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + { cmpeqi r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 } + { cmpeqi r5, r6, 5 ; shru r15, r16, r17 ; ld2u r25, r26 } + { cmpeqi r5, r6, 5 ; st r25, r26 ; addxi r15, r16, 5 } + { cmpeqi r5, r6, 5 ; st r25, r26 ; sub r15, r16, r17 } + { cmpeqi r5, r6, 5 ; st1 r25, r26 ; shl2addx r15, r16, r17 } + { cmpeqi r5, r6, 5 ; st2 r25, r26 ; nop } + { cmpeqi r5, r6, 5 ; st4 r25, r26 ; jalr r15 } + { cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; ld r25, r26 } + { cmpeqi r5, r6, 5 ; v1addi r15, r16, 5 } + { cmpeqi r5, r6, 5 ; v2int_l r15, r16, r17 } + { cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + { cmpexch r15, r16, r17 ; cmulh r5, r6, r7 } + { cmpexch r15, r16, r17 ; mul_ls_lu r5, r6, r7 } + { cmpexch r15, r16, r17 ; shruxi r5, r6, 5 } + { cmpexch r15, r16, r17 ; v1multu r5, r6, r7 } + { cmpexch r15, r16, r17 ; v2mz r5, r6, r7 } + { cmpexch4 r15, r16, r17 ; bfextu r5, r6, 5, 7 } + { cmpexch4 r15, r16, r17 ; fsingle_mul2 r5, r6, r7 } + { cmpexch4 r15, r16, r17 ; revbytes r5, r6 } + { cmpexch4 r15, r16, r17 ; v1cmpltui r5, r6, 5 } + { cmpexch4 r15, r16, r17 ; v2cmples r5, r6, r7 } + { cmpexch4 r15, r16, r17 ; v4packsc r5, r6, r7 } + { cmples r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 } + { cmples r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 } + { cmples r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 } + { cmples r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 } + { cmples r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 } + { cmples r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 } + { cmples r15, r16, r17 ; cmplts r5, r6, r7 } + { cmples r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 } + { cmples r15, r16, r17 ; ctz r5, r6 ; prefetch_l3 r25 } + { cmples r15, r16, r17 ; fsingle_mul1 r5, r6, r7 } + { cmples r15, r16, r17 ; info 19 ; st4 r25, r26 } + { cmples r15, r16, r17 ; ld r25, r26 ; or r5, r6, r7 } + { cmples r15, r16, r17 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 } + { cmples r15, r16, r17 ; ld1s r25, r26 ; shrui r5, r6, 5 } + { cmples r15, r16, r17 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 } + { cmples r15, r16, r17 ; ld2s r25, r26 ; cmovnez r5, r6, r7 } + { cmples r15, r16, r17 ; ld2s r25, r26 ; shl3add r5, r6, r7 } + { cmples r15, r16, r17 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 } + { cmples r15, r16, r17 ; ld4s r25, r26 ; addx r5, r6, r7 } + { cmples r15, r16, r17 ; ld4s r25, r26 ; rotli r5, r6, 5 } + { cmples r15, r16, r17 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 } + { cmples r15, r16, r17 ; ld4u r25, r26 ; tblidxb2 r5, r6 } + { cmples r15, r16, r17 ; move r5, r6 ; st2 r25, r26 } + { cmples r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 } + { cmples r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st r25, r26 } + { cmples r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 } + { cmples r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 } + { cmples r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 } + { cmples r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 } + { cmples r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 } + { cmples r15, r16, r17 ; pcnt r5, r6 } + { cmples r15, r16, r17 ; prefetch r25 ; revbits r5, r6 } + { cmples r15, r16, r17 ; prefetch_l1 r25 ; cmpne r5, r6, r7 } + { cmples r15, r16, r17 ; prefetch_l1 r25 ; subx r5, r6, r7 } + { cmples r15, r16, r17 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 } + { cmples r15, r16, r17 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 } + { cmples r15, r16, r17 ; prefetch_l2 r25 ; shli r5, r6, 5 } + { cmples r15, r16, r17 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 } + { cmples r15, r16, r17 ; prefetch_l3 r25 ; and r5, r6, r7 } + { cmples r15, r16, r17 ; prefetch_l3 r25 ; shl1add r5, r6, r7 } + { cmples r15, r16, r17 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 } + { cmples r15, r16, r17 ; prefetch_l3_fault r25 ; xor r5, r6, r7 } + { cmples r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 } + { cmples r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 } + { cmples r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 } + { cmples r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 } + { cmples r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + { cmples r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } + { cmples r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 } + { cmples r15, r16, r17 ; st r25, r26 ; cmovnez r5, r6, r7 } + { cmples r15, r16, r17 ; st r25, r26 ; shl3add r5, r6, r7 } + { cmples r15, r16, r17 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 } + { cmples r15, r16, r17 ; st2 r25, r26 ; addx r5, r6, r7 } + { cmples r15, r16, r17 ; st2 r25, r26 ; rotli r5, r6, 5 } + { cmples r15, r16, r17 ; st4 r25, r26 ; fsingle_pack1 r5, r6 } + { cmples r15, r16, r17 ; st4 r25, r26 ; tblidxb2 r5, r6 } + { cmples r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 } + { cmples r15, r16, r17 ; tblidxb1 r5, r6 } + { cmples r15, r16, r17 ; v1addi r5, r6, 5 } + { cmples r15, r16, r17 ; v1shru r5, r6, r7 } + { cmples r15, r16, r17 ; v2shlsc r5, r6, r7 } + { cmples r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 } + { cmples r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 } + { cmples r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 } + { cmples r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + { cmples r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 } + { cmples r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + { cmples r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + { cmples r5, r6, r7 ; fetchand r15, r16, r17 } + { cmples r5, r6, r7 ; ill ; prefetch_l3_fault r25 } + { cmples r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + { cmples r5, r6, r7 ; jr r15 ; st r25, r26 } + { cmples r5, r6, r7 ; ld r25, r26 ; ill } + { cmples r5, r6, r7 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 } + { cmples r5, r6, r7 ; ld1s_add r15, r16, 5 } + { cmples r5, r6, r7 ; ld1u r25, r26 ; shli r15, r16, 5 } + { cmples r5, r6, r7 ; ld2s r25, r26 ; rotl r15, r16, r17 } + { cmples r5, r6, r7 ; ld2u r25, r26 ; jrp r15 } + { cmples r5, r6, r7 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 } + { cmples r5, r6, r7 ; ld4u r25, r26 ; addx r15, r16, r17 } + { cmples r5, r6, r7 ; ld4u r25, r26 ; shrui r15, r16, 5 } + { cmples r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + { cmples r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + { cmples r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + { cmples r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 } + { cmples r5, r6, r7 ; prefetch r25 ; jr r15 } + { cmples r5, r6, r7 ; prefetch_l1 r25 ; andi r15, r16, 5 } + { cmples r5, r6, r7 ; prefetch_l1 r25 ; xor r15, r16, r17 } + { cmples r5, r6, r7 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 } + { cmples r5, r6, r7 ; prefetch_l2 r25 ; rotl r15, r16, r17 } + { cmples r5, r6, r7 ; prefetch_l2_fault r25 ; lnk r15 } + { cmples r5, r6, r7 ; prefetch_l3 r25 ; cmpne r15, r16, r17 } + { cmples r5, r6, r7 ; prefetch_l3_fault r25 ; andi r15, r16, 5 } + { cmples r5, r6, r7 ; prefetch_l3_fault r25 ; xor r15, r16, r17 } + { cmples r5, r6, r7 ; rotli r15, r16, 5 } + { cmples r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + { cmples r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + { cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + { cmples r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + { cmples r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 } + { cmples r5, r6, r7 ; st r25, r26 ; andi r15, r16, 5 } + { cmples r5, r6, r7 ; st r25, r26 ; xor r15, r16, r17 } + { cmples r5, r6, r7 ; st1 r25, r26 ; shl3addx r15, r16, r17 } + { cmples r5, r6, r7 ; st2 r25, r26 ; or r15, r16, r17 } + { cmples r5, r6, r7 ; st4 r25, r26 ; jr r15 } + { cmples r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 } + { cmples r5, r6, r7 ; v1cmpeq r15, r16, r17 } + { cmples r5, r6, r7 ; v2maxsi r15, r16, 5 } + { cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + { cmpleu r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 } + { cmpleu r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 } + { cmpleu r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 } + { cmpleu r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 } + { cmpleu r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 } + { cmpleu r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 } + { cmpleu r15, r16, r17 ; cmplts r5, r6, r7 } + { cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 } + { cmpleu r15, r16, r17 ; ctz r5, r6 ; prefetch_l3 r25 } + { cmpleu r15, r16, r17 ; fsingle_mul1 r5, r6, r7 } + { cmpleu r15, r16, r17 ; info 19 ; st4 r25, r26 } + { cmpleu r15, r16, r17 ; ld r25, r26 ; or r5, r6, r7 } + { cmpleu r15, r16, r17 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 } + { cmpleu r15, r16, r17 ; ld1s r25, r26 ; shrui r5, r6, 5 } + { cmpleu r15, r16, r17 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 } + { cmpleu r15, r16, r17 ; ld2s r25, r26 ; cmovnez r5, r6, r7 } + { cmpleu r15, r16, r17 ; ld2s r25, r26 ; shl3add r5, r6, r7 } + { cmpleu r15, r16, r17 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 } + { cmpleu r15, r16, r17 ; ld4s r25, r26 ; addx r5, r6, r7 } + { cmpleu r15, r16, r17 ; ld4s r25, r26 ; rotli r5, r6, 5 } + { cmpleu r15, r16, r17 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 } + { cmpleu r15, r16, r17 ; ld4u r25, r26 ; tblidxb2 r5, r6 } + { cmpleu r15, r16, r17 ; move r5, r6 ; st2 r25, r26 } + { cmpleu r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 } + { cmpleu r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st r25, r26 } + { cmpleu r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 } + { cmpleu r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 } + { cmpleu r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 } + { cmpleu r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 } + { cmpleu r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 } + { cmpleu r15, r16, r17 ; pcnt r5, r6 } + { cmpleu r15, r16, r17 ; prefetch r25 ; revbits r5, r6 } + { cmpleu r15, r16, r17 ; prefetch_l1 r25 ; cmpne r5, r6, r7 } + { cmpleu r15, r16, r17 ; prefetch_l1 r25 ; subx r5, r6, r7 } + { cmpleu r15, r16, r17 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 } + { cmpleu r15, r16, r17 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 } + { cmpleu r15, r16, r17 ; prefetch_l2 r25 ; shli r5, r6, 5 } + { cmpleu r15, r16, r17 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 } + { cmpleu r15, r16, r17 ; prefetch_l3 r25 ; and r5, r6, r7 } + { cmpleu r15, r16, r17 ; prefetch_l3 r25 ; shl1add r5, r6, r7 } + { cmpleu r15, r16, r17 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 } + { cmpleu r15, r16, r17 ; prefetch_l3_fault r25 ; xor r5, r6, r7 } + { cmpleu r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 } + { cmpleu r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 } + { cmpleu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 } + { cmpleu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 } + { cmpleu r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + { cmpleu r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } + { cmpleu r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 } + { cmpleu r15, r16, r17 ; st r25, r26 ; cmovnez r5, r6, r7 } + { cmpleu r15, r16, r17 ; st r25, r26 ; shl3add r5, r6, r7 } + { cmpleu r15, r16, r17 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 } + { cmpleu r15, r16, r17 ; st2 r25, r26 ; addx r5, r6, r7 } + { cmpleu r15, r16, r17 ; st2 r25, r26 ; rotli r5, r6, 5 } + { cmpleu r15, r16, r17 ; st4 r25, r26 ; fsingle_pack1 r5, r6 } + { cmpleu r15, r16, r17 ; st4 r25, r26 ; tblidxb2 r5, r6 } + { cmpleu r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 } + { cmpleu r15, r16, r17 ; tblidxb1 r5, r6 } + { cmpleu r15, r16, r17 ; v1addi r5, r6, 5 } + { cmpleu r15, r16, r17 ; v1shru r5, r6, r7 } + { cmpleu r15, r16, r17 ; v2shlsc r5, r6, r7 } + { cmpleu r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 } + { cmpleu r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 } + { cmpleu r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 } + { cmpleu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + { cmpleu r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 } + { cmpleu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + { cmpleu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + { cmpleu r5, r6, r7 ; fetchand r15, r16, r17 } + { cmpleu r5, r6, r7 ; ill ; prefetch_l3_fault r25 } + { cmpleu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + { cmpleu r5, r6, r7 ; jr r15 ; st r25, r26 } + { cmpleu r5, r6, r7 ; ld r25, r26 ; ill } + { cmpleu r5, r6, r7 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 } + { cmpleu r5, r6, r7 ; ld1s_add r15, r16, 5 } + { cmpleu r5, r6, r7 ; ld1u r25, r26 ; shli r15, r16, 5 } + { cmpleu r5, r6, r7 ; ld2s r25, r26 ; rotl r15, r16, r17 } + { cmpleu r5, r6, r7 ; ld2u r25, r26 ; jrp r15 } + { cmpleu r5, r6, r7 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 } + { cmpleu r5, r6, r7 ; ld4u r25, r26 ; addx r15, r16, r17 } + { cmpleu r5, r6, r7 ; ld4u r25, r26 ; shrui r15, r16, 5 } + { cmpleu r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + { cmpleu r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + { cmpleu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + { cmpleu r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 } + { cmpleu r5, r6, r7 ; prefetch r25 ; jr r15 } + { cmpleu r5, r6, r7 ; prefetch_l1 r25 ; andi r15, r16, 5 } + { cmpleu r5, r6, r7 ; prefetch_l1 r25 ; xor r15, r16, r17 } + { cmpleu r5, r6, r7 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 } + { cmpleu r5, r6, r7 ; prefetch_l2 r25 ; rotl r15, r16, r17 } + { cmpleu r5, r6, r7 ; prefetch_l2_fault r25 ; lnk r15 } + { cmpleu r5, r6, r7 ; prefetch_l3 r25 ; cmpne r15, r16, r17 } + { cmpleu r5, r6, r7 ; prefetch_l3_fault r25 ; andi r15, r16, 5 } + { cmpleu r5, r6, r7 ; prefetch_l3_fault r25 ; xor r15, r16, r17 } + { cmpleu r5, r6, r7 ; rotli r15, r16, 5 } + { cmpleu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + { cmpleu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + { cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + { cmpleu r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + { cmpleu r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 } + { cmpleu r5, r6, r7 ; st r25, r26 ; andi r15, r16, 5 } + { cmpleu r5, r6, r7 ; st r25, r26 ; xor r15, r16, r17 } + { cmpleu r5, r6, r7 ; st1 r25, r26 ; shl3addx r15, r16, r17 } + { cmpleu r5, r6, r7 ; st2 r25, r26 ; or r15, r16, r17 } + { cmpleu r5, r6, r7 ; st4 r25, r26 ; jr r15 } + { cmpleu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 } + { cmpleu r5, r6, r7 ; v1cmpeq r15, r16, r17 } + { cmpleu r5, r6, r7 ; v2maxsi r15, r16, 5 } + { cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + { cmplts r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 } + { cmplts r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 } + { cmplts r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 } + { cmplts r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 } + { cmplts r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 } + { cmplts r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 } + { cmplts r15, r16, r17 ; cmplts r5, r6, r7 } + { cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 } + { cmplts r15, r16, r17 ; ctz r5, r6 ; prefetch_l3 r25 } + { cmplts r15, r16, r17 ; fsingle_mul1 r5, r6, r7 } + { cmplts r15, r16, r17 ; info 19 ; st4 r25, r26 } + { cmplts r15, r16, r17 ; ld r25, r26 ; or r5, r6, r7 } + { cmplts r15, r16, r17 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 } + { cmplts r15, r16, r17 ; ld1s r25, r26 ; shrui r5, r6, 5 } + { cmplts r15, r16, r17 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 } + { cmplts r15, r16, r17 ; ld2s r25, r26 ; cmovnez r5, r6, r7 } + { cmplts r15, r16, r17 ; ld2s r25, r26 ; shl3add r5, r6, r7 } + { cmplts r15, r16, r17 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 } + { cmplts r15, r16, r17 ; ld4s r25, r26 ; addx r5, r6, r7 } + { cmplts r15, r16, r17 ; ld4s r25, r26 ; rotli r5, r6, 5 } + { cmplts r15, r16, r17 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 } + { cmplts r15, r16, r17 ; ld4u r25, r26 ; tblidxb2 r5, r6 } + { cmplts r15, r16, r17 ; move r5, r6 ; st2 r25, r26 } + { cmplts r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 } + { cmplts r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st r25, r26 } + { cmplts r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 } + { cmplts r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 } + { cmplts r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 } + { cmplts r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 } + { cmplts r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 } + { cmplts r15, r16, r17 ; pcnt r5, r6 } + { cmplts r15, r16, r17 ; prefetch r25 ; revbits r5, r6 } + { cmplts r15, r16, r17 ; prefetch_l1 r25 ; cmpne r5, r6, r7 } + { cmplts r15, r16, r17 ; prefetch_l1 r25 ; subx r5, r6, r7 } + { cmplts r15, r16, r17 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 } + { cmplts r15, r16, r17 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 } + { cmplts r15, r16, r17 ; prefetch_l2 r25 ; shli r5, r6, 5 } + { cmplts r15, r16, r17 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 } + { cmplts r15, r16, r17 ; prefetch_l3 r25 ; and r5, r6, r7 } + { cmplts r15, r16, r17 ; prefetch_l3 r25 ; shl1add r5, r6, r7 } + { cmplts r15, r16, r17 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 } + { cmplts r15, r16, r17 ; prefetch_l3_fault r25 ; xor r5, r6, r7 } + { cmplts r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 } + { cmplts r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 } + { cmplts r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 } + { cmplts r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 } + { cmplts r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + { cmplts r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } + { cmplts r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 } + { cmplts r15, r16, r17 ; st r25, r26 ; cmovnez r5, r6, r7 } + { cmplts r15, r16, r17 ; st r25, r26 ; shl3add r5, r6, r7 } + { cmplts r15, r16, r17 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 } + { cmplts r15, r16, r17 ; st2 r25, r26 ; addx r5, r6, r7 } + { cmplts r15, r16, r17 ; st2 r25, r26 ; rotli r5, r6, 5 } + { cmplts r15, r16, r17 ; st4 r25, r26 ; fsingle_pack1 r5, r6 } + { cmplts r15, r16, r17 ; st4 r25, r26 ; tblidxb2 r5, r6 } + { cmplts r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 } + { cmplts r15, r16, r17 ; tblidxb1 r5, r6 } + { cmplts r15, r16, r17 ; v1addi r5, r6, 5 } + { cmplts r15, r16, r17 ; v1shru r5, r6, r7 } + { cmplts r15, r16, r17 ; v2shlsc r5, r6, r7 } + { cmplts r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 } + { cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 } + { cmplts r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 } + { cmplts r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + { cmplts r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 } + { cmplts r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + { cmplts r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + { cmplts r5, r6, r7 ; fetchand r15, r16, r17 } + { cmplts r5, r6, r7 ; ill ; prefetch_l3_fault r25 } + { cmplts r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + { cmplts r5, r6, r7 ; jr r15 ; st r25, r26 } + { cmplts r5, r6, r7 ; ld r25, r26 ; ill } + { cmplts r5, r6, r7 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 } + { cmplts r5, r6, r7 ; ld1s_add r15, r16, 5 } + { cmplts r5, r6, r7 ; ld1u r25, r26 ; shli r15, r16, 5 } + { cmplts r5, r6, r7 ; ld2s r25, r26 ; rotl r15, r16, r17 } + { cmplts r5, r6, r7 ; ld2u r25, r26 ; jrp r15 } + { cmplts r5, r6, r7 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 } + { cmplts r5, r6, r7 ; ld4u r25, r26 ; addx r15, r16, r17 } + { cmplts r5, r6, r7 ; ld4u r25, r26 ; shrui r15, r16, 5 } + { cmplts r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + { cmplts r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + { cmplts r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + { cmplts r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 } + { cmplts r5, r6, r7 ; prefetch r25 ; jr r15 } + { cmplts r5, r6, r7 ; prefetch_l1 r25 ; andi r15, r16, 5 } + { cmplts r5, r6, r7 ; prefetch_l1 r25 ; xor r15, r16, r17 } + { cmplts r5, r6, r7 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 } + { cmplts r5, r6, r7 ; prefetch_l2 r25 ; rotl r15, r16, r17 } + { cmplts r5, r6, r7 ; prefetch_l2_fault r25 ; lnk r15 } + { cmplts r5, r6, r7 ; prefetch_l3 r25 ; cmpne r15, r16, r17 } + { cmplts r5, r6, r7 ; prefetch_l3_fault r25 ; andi r15, r16, 5 } + { cmplts r5, r6, r7 ; prefetch_l3_fault r25 ; xor r15, r16, r17 } + { cmplts r5, r6, r7 ; rotli r15, r16, 5 } + { cmplts r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + { cmplts r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + { cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + { cmplts r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + { cmplts r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 } + { cmplts r5, r6, r7 ; st r25, r26 ; andi r15, r16, 5 } + { cmplts r5, r6, r7 ; st r25, r26 ; xor r15, r16, r17 } + { cmplts r5, r6, r7 ; st1 r25, r26 ; shl3addx r15, r16, r17 } + { cmplts r5, r6, r7 ; st2 r25, r26 ; or r15, r16, r17 } + { cmplts r5, r6, r7 ; st4 r25, r26 ; jr r15 } + { cmplts r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 } + { cmplts r5, r6, r7 ; v1cmpeq r15, r16, r17 } + { cmplts r5, r6, r7 ; v2maxsi r15, r16, 5 } + { cmplts r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + { cmpltsi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3 r25 } + { cmpltsi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 } + { cmpltsi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l3_fault r25 } + { cmpltsi r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 } + { cmpltsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st r25, r26 } + { cmpltsi r15, r16, 5 ; cmples r5, r6, r7 ; st2 r25, r26 } + { cmpltsi r15, r16, 5 ; cmplts r5, r6, r7 } + { cmpltsi r15, r16, 5 ; cmpne r5, r6, r7 ; ld r25, r26 } + { cmpltsi r15, r16, 5 ; ctz r5, r6 ; prefetch_l3 r25 } + { cmpltsi r15, r16, 5 ; fsingle_mul1 r5, r6, r7 } + { cmpltsi r15, r16, 5 ; info 19 ; st4 r25, r26 } + { cmpltsi r15, r16, 5 ; ld r25, r26 ; or r5, r6, r7 } + { cmpltsi r15, r16, 5 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 } + { cmpltsi r15, r16, 5 ; ld1s r25, r26 ; shrui r5, r6, 5 } + { cmpltsi r15, r16, 5 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 } + { cmpltsi r15, r16, 5 ; ld2s r25, r26 ; cmovnez r5, r6, r7 } + { cmpltsi r15, r16, 5 ; ld2s r25, r26 ; shl3add r5, r6, r7 } + { cmpltsi r15, r16, 5 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 } + { cmpltsi r15, r16, 5 ; ld4s r25, r26 ; addx r5, r6, r7 } + { cmpltsi r15, r16, 5 ; ld4s r25, r26 ; rotli r5, r6, 5 } + { cmpltsi r15, r16, 5 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 } + { cmpltsi r15, r16, 5 ; ld4u r25, r26 ; tblidxb2 r5, r6 } + { cmpltsi r15, r16, 5 ; move r5, r6 ; st2 r25, r26 } + { cmpltsi r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 } + { cmpltsi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; st r25, r26 } + { cmpltsi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 } + { cmpltsi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 } + { cmpltsi r15, r16, 5 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 } + { cmpltsi r15, r16, 5 ; mz r5, r6, r7 ; st1 r25, r26 } + { cmpltsi r15, r16, 5 ; nor r5, r6, r7 ; st4 r25, r26 } + { cmpltsi r15, r16, 5 ; pcnt r5, r6 } + { cmpltsi r15, r16, 5 ; prefetch r25 ; revbits r5, r6 } + { cmpltsi r15, r16, 5 ; prefetch_l1 r25 ; cmpne r5, r6, r7 } + { cmpltsi r15, r16, 5 ; prefetch_l1 r25 ; subx r5, r6, r7 } + { cmpltsi r15, r16, 5 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 } + { cmpltsi r15, r16, 5 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 } + { cmpltsi r15, r16, 5 ; prefetch_l2 r25 ; shli r5, r6, 5 } + { cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 } + { cmpltsi r15, r16, 5 ; prefetch_l3 r25 ; and r5, r6, r7 } + { cmpltsi r15, r16, 5 ; prefetch_l3 r25 ; shl1add r5, r6, r7 } + { cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 } + { cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 ; xor r5, r6, r7 } + { cmpltsi r15, r16, 5 ; rotl r5, r6, r7 ; ld r25, r26 } + { cmpltsi r15, r16, 5 ; shl r5, r6, r7 ; ld1u r25, r26 } + { cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2s r25, r26 } + { cmpltsi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4s r25, r26 } + { cmpltsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 } + { cmpltsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 } + { cmpltsi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l1_fault r25 } + { cmpltsi r15, r16, 5 ; st r25, r26 ; cmovnez r5, r6, r7 } + { cmpltsi r15, r16, 5 ; st r25, r26 ; shl3add r5, r6, r7 } + { cmpltsi r15, r16, 5 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 } + { cmpltsi r15, r16, 5 ; st2 r25, r26 ; addx r5, r6, r7 } + { cmpltsi r15, r16, 5 ; st2 r25, r26 ; rotli r5, r6, 5 } + { cmpltsi r15, r16, 5 ; st4 r25, r26 ; fsingle_pack1 r5, r6 } + { cmpltsi r15, r16, 5 ; st4 r25, r26 ; tblidxb2 r5, r6 } + { cmpltsi r15, r16, 5 ; subx r5, r6, r7 ; st4 r25, r26 } + { cmpltsi r15, r16, 5 ; tblidxb1 r5, r6 } + { cmpltsi r15, r16, 5 ; v1addi r5, r6, 5 } + { cmpltsi r15, r16, 5 ; v1shru r5, r6, r7 } + { cmpltsi r15, r16, 5 ; v2shlsc r5, r6, r7 } + { cmpltsi r5, r6, 5 ; add r15, r16, r17 ; ld1u r25, r26 } + { cmpltsi r5, r6, 5 ; addx r15, r16, r17 ; ld2s r25, r26 } + { cmpltsi r5, r6, 5 ; and r15, r16, r17 ; ld2s r25, r26 } + { cmpltsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + { cmpltsi r5, r6, 5 ; cmples r15, r16, r17 ; ld4s r25, r26 } + { cmpltsi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 } + { cmpltsi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + { cmpltsi r5, r6, 5 ; fetchand r15, r16, r17 } + { cmpltsi r5, r6, 5 ; ill ; prefetch_l3_fault r25 } + { cmpltsi r5, r6, 5 ; jalr r15 ; prefetch_l3 r25 } + { cmpltsi r5, r6, 5 ; jr r15 ; st r25, r26 } + { cmpltsi r5, r6, 5 ; ld r25, r26 ; ill } + { cmpltsi r5, r6, 5 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 } + { cmpltsi r5, r6, 5 ; ld1s_add r15, r16, 5 } + { cmpltsi r5, r6, 5 ; ld1u r25, r26 ; shli r15, r16, 5 } + { cmpltsi r5, r6, 5 ; ld2s r25, r26 ; rotl r15, r16, r17 } + { cmpltsi r5, r6, 5 ; ld2u r25, r26 ; jrp r15 } + { cmpltsi r5, r6, 5 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 } + { cmpltsi r5, r6, 5 ; ld4u r25, r26 ; addx r15, r16, r17 } + { cmpltsi r5, r6, 5 ; ld4u r25, r26 ; shrui r15, r16, 5 } + { cmpltsi r5, r6, 5 ; lnk r15 ; st4 r25, r26 } + { cmpltsi r5, r6, 5 ; move r15, r16 ; st4 r25, r26 } + { cmpltsi r5, r6, 5 ; mz r15, r16, r17 ; st4 r25, r26 } + { cmpltsi r5, r6, 5 ; or r15, r16, r17 ; ld r25, r26 } + { cmpltsi r5, r6, 5 ; prefetch r25 ; jr r15 } + { cmpltsi r5, r6, 5 ; prefetch_l1 r25 ; andi r15, r16, 5 } + { cmpltsi r5, r6, 5 ; prefetch_l1 r25 ; xor r15, r16, r17 } + { cmpltsi r5, r6, 5 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 } + { cmpltsi r5, r6, 5 ; prefetch_l2 r25 ; rotl r15, r16, r17 } + { cmpltsi r5, r6, 5 ; prefetch_l2_fault r25 ; lnk r15 } + { cmpltsi r5, r6, 5 ; prefetch_l3 r25 ; cmpne r15, r16, r17 } + { cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 ; andi r15, r16, 5 } + { cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 ; xor r15, r16, r17 } + { cmpltsi r5, r6, 5 ; rotli r15, r16, 5 } + { cmpltsi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld r25, r26 } + { cmpltsi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + { cmpltsi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + { cmpltsi r5, r6, 5 ; shrs r15, r16, r17 ; ld2u r25, r26 } + { cmpltsi r5, r6, 5 ; shru r15, r16, r17 ; ld4u r25, r26 } + { cmpltsi r5, r6, 5 ; st r25, r26 ; andi r15, r16, 5 } + { cmpltsi r5, r6, 5 ; st r25, r26 ; xor r15, r16, r17 } + { cmpltsi r5, r6, 5 ; st1 r25, r26 ; shl3addx r15, r16, r17 } + { cmpltsi r5, r6, 5 ; st2 r25, r26 ; or r15, r16, r17 } + { cmpltsi r5, r6, 5 ; st4 r25, r26 ; jr r15 } + { cmpltsi r5, r6, 5 ; sub r15, r16, r17 ; ld1u r25, r26 } + { cmpltsi r5, r6, 5 ; v1cmpeq r15, r16, r17 } + { cmpltsi r5, r6, 5 ; v2maxsi r15, r16, 5 } + { cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + { cmpltu r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 } + { cmpltu r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 } + { cmpltu r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 } + { cmpltu r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 } + { cmpltu r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 } + { cmpltu r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 } + { cmpltu r15, r16, r17 ; cmplts r5, r6, r7 } + { cmpltu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 } + { cmpltu r15, r16, r17 ; ctz r5, r6 ; prefetch_l3 r25 } + { cmpltu r15, r16, r17 ; fsingle_mul1 r5, r6, r7 } + { cmpltu r15, r16, r17 ; info 19 ; st4 r25, r26 } + { cmpltu r15, r16, r17 ; ld r25, r26 ; or r5, r6, r7 } + { cmpltu r15, r16, r17 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 } + { cmpltu r15, r16, r17 ; ld1s r25, r26 ; shrui r5, r6, 5 } + { cmpltu r15, r16, r17 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 } + { cmpltu r15, r16, r17 ; ld2s r25, r26 ; cmovnez r5, r6, r7 } + { cmpltu r15, r16, r17 ; ld2s r25, r26 ; shl3add r5, r6, r7 } + { cmpltu r15, r16, r17 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 } + { cmpltu r15, r16, r17 ; ld4s r25, r26 ; addx r5, r6, r7 } + { cmpltu r15, r16, r17 ; ld4s r25, r26 ; rotli r5, r6, 5 } + { cmpltu r15, r16, r17 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 } + { cmpltu r15, r16, r17 ; ld4u r25, r26 ; tblidxb2 r5, r6 } + { cmpltu r15, r16, r17 ; move r5, r6 ; st2 r25, r26 } + { cmpltu r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 } + { cmpltu r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st r25, r26 } + { cmpltu r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 } + { cmpltu r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 } + { cmpltu r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 } + { cmpltu r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 } + { cmpltu r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 } + { cmpltu r15, r16, r17 ; pcnt r5, r6 } + { cmpltu r15, r16, r17 ; prefetch r25 ; revbits r5, r6 } + { cmpltu r15, r16, r17 ; prefetch_l1 r25 ; cmpne r5, r6, r7 } + { cmpltu r15, r16, r17 ; prefetch_l1 r25 ; subx r5, r6, r7 } + { cmpltu r15, r16, r17 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 } + { cmpltu r15, r16, r17 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 } + { cmpltu r15, r16, r17 ; prefetch_l2 r25 ; shli r5, r6, 5 } + { cmpltu r15, r16, r17 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 } + { cmpltu r15, r16, r17 ; prefetch_l3 r25 ; and r5, r6, r7 } + { cmpltu r15, r16, r17 ; prefetch_l3 r25 ; shl1add r5, r6, r7 } + { cmpltu r15, r16, r17 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 } + { cmpltu r15, r16, r17 ; prefetch_l3_fault r25 ; xor r5, r6, r7 } + { cmpltu r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 } + { cmpltu r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 } + { cmpltu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 } + { cmpltu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 } + { cmpltu r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 } + { cmpltu r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } + { cmpltu r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 } + { cmpltu r15, r16, r17 ; st r25, r26 ; cmovnez r5, r6, r7 } + { cmpltu r15, r16, r17 ; st r25, r26 ; shl3add r5, r6, r7 } + { cmpltu r15, r16, r17 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 } + { cmpltu r15, r16, r17 ; st2 r25, r26 ; addx r5, r6, r7 } + { cmpltu r15, r16, r17 ; st2 r25, r26 ; rotli r5, r6, 5 } + { cmpltu r15, r16, r17 ; st4 r25, r26 ; fsingle_pack1 r5, r6 } + { cmpltu r15, r16, r17 ; st4 r25, r26 ; tblidxb2 r5, r6 } + { cmpltu r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 } + { cmpltu r15, r16, r17 ; tblidxb1 r5, r6 } + { cmpltu r15, r16, r17 ; v1addi r5, r6, 5 } + { cmpltu r15, r16, r17 ; v1shru r5, r6, r7 } + { cmpltu r15, r16, r17 ; v2shlsc r5, r6, r7 } + { cmpltu r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 } + { cmpltu r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 } + { cmpltu r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 } + { cmpltu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + { cmpltu r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 } + { cmpltu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } + { cmpltu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + { cmpltu r5, r6, r7 ; fetchand r15, r16, r17 } + { cmpltu r5, r6, r7 ; ill ; prefetch_l3_fault r25 } + { cmpltu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 } + { cmpltu r5, r6, r7 ; jr r15 ; st r25, r26 } + { cmpltu r5, r6, r7 ; ld r25, r26 ; ill } + { cmpltu r5, r6, r7 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 } + { cmpltu r5, r6, r7 ; ld1s_add r15, r16, 5 } + { cmpltu r5, r6, r7 ; ld1u r25, r26 ; shli r15, r16, 5 } + { cmpltu r5, r6, r7 ; ld2s r25, r26 ; rotl r15, r16, r17 } + { cmpltu r5, r6, r7 ; ld2u r25, r26 ; jrp r15 } + { cmpltu r5, r6, r7 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 } + { cmpltu r5, r6, r7 ; ld4u r25, r26 ; addx r15, r16, r17 } + { cmpltu r5, r6, r7 ; ld4u r25, r26 ; shrui r15, r16, 5 } + { cmpltu r5, r6, r7 ; lnk r15 ; st4 r25, r26 } + { cmpltu r5, r6, r7 ; move r15, r16 ; st4 r25, r26 } + { cmpltu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 } + { cmpltu r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 } + { cmpltu r5, r6, r7 ; prefetch r25 ; jr r15 } + { cmpltu r5, r6, r7 ; prefetch_l1 r25 ; andi r15, r16, 5 } + { cmpltu r5, r6, r7 ; prefetch_l1 r25 ; xor r15, r16, r17 } + { cmpltu r5, r6, r7 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 } + { cmpltu r5, r6, r7 ; prefetch_l2 r25 ; rotl r15, r16, r17 } + { cmpltu r5, r6, r7 ; prefetch_l2_fault r25 ; lnk r15 } + { cmpltu r5, r6, r7 ; prefetch_l3 r25 ; cmpne r15, r16, r17 } + { cmpltu r5, r6, r7 ; prefetch_l3_fault r25 ; andi r15, r16, 5 } + { cmpltu r5, r6, r7 ; prefetch_l3_fault r25 ; xor r15, r16, r17 } + { cmpltu r5, r6, r7 ; rotli r15, r16, 5 } + { cmpltu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 } + { cmpltu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + { cmpltu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + { cmpltu r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 } + { cmpltu r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 } + { cmpltu r5, r6, r7 ; st r25, r26 ; andi r15, r16, 5 } + { cmpltu r5, r6, r7 ; st r25, r26 ; xor r15, r16, r17 } + { cmpltu r5, r6, r7 ; st1 r25, r26 ; shl3addx r15, r16, r17 } + { cmpltu r5, r6, r7 ; st2 r25, r26 ; or r15, r16, r17 } + { cmpltu r5, r6, r7 ; st4 r25, r26 ; jr r15 } + { cmpltu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 } + { cmpltu r5, r6, r7 ; v1cmpeq r15, r16, r17 } + { cmpltu r5, r6, r7 ; v2maxsi r15, r16, 5 } + { cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + { cmpltui r15, r16, 5 ; crc32_32 r5, r6, r7 } + { cmpltui r15, r16, 5 ; mula_hs_hs r5, r6, r7 } + { cmpltui r15, r16, 5 ; sub r5, r6, r7 } + { cmpltui r15, r16, 5 ; v1mulus r5, r6, r7 } + { cmpltui r15, r16, 5 ; v2packl r5, r6, r7 } + { cmpltui r5, r6, 5 ; cmpexch4 r15, r16, r17 } + { cmpltui r5, r6, 5 ; ld1u_add r15, r16, 5 } + { cmpltui r5, r6, 5 ; prefetch_add_l1 r15, 5 } + { cmpltui r5, r6, 5 ; stnt r15, r16 } + { cmpltui r5, r6, 5 ; v2addi r15, r16, 5 } + { cmpltui r5, r6, 5 ; v4sub r15, r16, r17 } + { cmpne r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 } + { cmpne r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 } + { cmpne r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 } + { cmpne r15, r16, r17 ; cmoveqz r5, r6, r7 ; st2 r25, r26 } + { cmpne r15, r16, r17 ; cmpeq r5, r6, r7 } + { cmpne r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 } + { cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 } + { cmpne r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 } + { cmpne r15, r16, r17 ; ctz r5, r6 ; st2 r25, r26 } + { cmpne r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld1u r25, r26 } + { cmpne r15, r16, r17 ; ld r25, r26 ; addi r5, r6, 5 } + { cmpne r15, r16, r17 ; ld r25, r26 ; rotl r5, r6, r7 } + { cmpne r15, r16, r17 ; ld1s r25, r26 ; fnop } + { cmpne r15, r16, r17 ; ld1s r25, r26 ; tblidxb1 r5, r6 } + { cmpne r15, r16, r17 ; ld1u r25, r26 ; nop } + { cmpne r15, r16, r17 ; ld2s r25, r26 ; cmpleu r5, r6, r7 } + { cmpne r15, r16, r17 ; ld2s r25, r26 ; shrsi r5, r6, 5 } + { cmpne r15, r16, r17 ; ld2u r25, r26 ; mula_hu_hu r5, r6, r7 } + { cmpne r15, r16, r17 ; ld4s r25, r26 ; clz r5, r6 } + { cmpne r15, r16, r17 ; ld4s r25, r26 ; shl2add r5, r6, r7 } + { cmpne r15, r16, r17 ; ld4u r25, r26 ; movei r5, 5 } + { cmpne r15, r16, r17 ; mm r5, r6, 5, 7 } + { cmpne r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 } + { cmpne r15, r16, r17 ; mul_hs_lu r5, r6, r7 } + { cmpne r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { cmpne r15, r16, r17 ; mula_hs_hu r5, r6, r7 } + { cmpne r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; st2 r25, r26 } + { cmpne r15, r16, r17 ; mulax r5, r6, r7 ; st4 r25, r26 } + { cmpne r15, r16, r17 ; nop ; ld r25, r26 } + { cmpne r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 } + { cmpne r15, r16, r17 ; prefetch r25 ; addxi r5, r6, 5 } + { cmpne r15, r16, r17 ; prefetch r25 ; shl r5, r6, r7 } + { cmpne r15, r16, r17 ; prefetch_l1 r25 ; info 19 } + { cmpne r15, r16, r17 ; prefetch_l1 r25 ; tblidxb3 r5, r6 } + { cmpne r15, r16, r17 ; prefetch_l1_fault r25 ; or r5, r6, r7 } + { cmpne r15, r16, r17 ; prefetch_l2 r25 ; cmpltsi r5, r6, 5 } + { cmpne r15, r16, r17 ; prefetch_l2 r25 ; shrui r5, r6, 5 } + { cmpne r15, r16, r17 ; prefetch_l2_fault r25 ; mula_lu_lu r5, r6, r7 } + { cmpne r15, r16, r17 ; prefetch_l3 r25 ; cmovnez r5, r6, r7 } + { cmpne r15, r16, r17 ; prefetch_l3 r25 ; shl3add r5, r6, r7 } + { cmpne r15, r16, r17 ; prefetch_l3_fault r25 ; mul_hu_hu r5, r6, r7 } + { cmpne r15, r16, r17 ; revbits r5, r6 ; ld1u r25, r26 } + { cmpne r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 } + { cmpne r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 } + { cmpne r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 } + { cmpne r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 } + { cmpne r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 } + { cmpne r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 } + { cmpne r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 } + { cmpne r15, r16, r17 ; st r25, r26 ; cmpleu r5, r6, r7 } + { cmpne r15, r16, r17 ; st r25, r26 ; shrsi r5, r6, 5 } + { cmpne r15, r16, r17 ; st1 r25, r26 ; mula_hu_hu r5, r6, r7 } + { cmpne r15, r16, r17 ; st2 r25, r26 ; clz r5, r6 } + { cmpne r15, r16, r17 ; st2 r25, r26 ; shl2add r5, r6, r7 } + { cmpne r15, r16, r17 ; st4 r25, r26 ; movei r5, 5 } + { cmpne r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 } + { cmpne r15, r16, r17 ; tblidxb0 r5, r6 ; ld1s r25, r26 } + { cmpne r15, r16, r17 ; tblidxb2 r5, r6 ; ld2s r25, r26 } + { cmpne r15, r16, r17 ; v1cmpeq r5, r6, r7 } + { cmpne r15, r16, r17 ; v2add r5, r6, r7 } + { cmpne r15, r16, r17 ; v2shrui r5, r6, 5 } + { cmpne r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + { cmpne r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + { cmpne r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + { cmpne r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + { cmpne r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + { cmpne r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + { cmpne r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 } + { cmpne r5, r6, r7 ; finv r15 } + { cmpne r5, r6, r7 ; ill ; st4 r25, r26 } + { cmpne r5, r6, r7 ; jalr r15 ; st2 r25, r26 } + { cmpne r5, r6, r7 ; jr r15 } + { cmpne r5, r6, r7 ; ld r25, r26 ; jr r15 } + { cmpne r5, r6, r7 ; ld1s r25, r26 ; cmpltsi r15, r16, 5 } + { cmpne r5, r6, r7 ; ld1u r25, r26 ; addx r15, r16, r17 } + { cmpne r5, r6, r7 ; ld1u r25, r26 ; shrui r15, r16, 5 } + { cmpne r5, r6, r7 ; ld2s r25, r26 ; shl1addx r15, r16, r17 } + { cmpne r5, r6, r7 ; ld2u r25, r26 ; movei r15, 5 } + { cmpne r5, r6, r7 ; ld4s r25, r26 ; ill } + { cmpne r5, r6, r7 ; ld4u r25, r26 ; cmpeq r15, r16, r17 } + { cmpne r5, r6, r7 ; ld4u r25, r26 } + { cmpne r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + { cmpne r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 } + { cmpne r5, r6, r7 ; nop ; ld1u r25, r26 } + { cmpne r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 } + { cmpne r5, r6, r7 ; prefetch r25 ; move r15, r16 } + { cmpne r5, r6, r7 ; prefetch_l1 r25 ; cmpleu r15, r16, r17 } + { cmpne r5, r6, r7 ; prefetch_l1_fault r25 ; addi r15, r16, 5 } + { cmpne r5, r6, r7 ; prefetch_l1_fault r25 ; shru r15, r16, r17 } + { cmpne r5, r6, r7 ; prefetch_l2 r25 ; shl1addx r15, r16, r17 } + { cmpne r5, r6, r7 ; prefetch_l2_fault r25 ; mz r15, r16, r17 } + { cmpne r5, r6, r7 ; prefetch_l3 r25 ; jalr r15 } + { cmpne r5, r6, r7 ; prefetch_l3_fault r25 ; cmpleu r15, r16, r17 } + { cmpne r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 } + { cmpne r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 } + { cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 } + { cmpne r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + { cmpne r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1 r25 } + { cmpne r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1 r25 } + { cmpne r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 } + { cmpne r5, r6, r7 ; st r25, r26 ; cmpleu r15, r16, r17 } + { cmpne r5, r6, r7 ; st1 r25, r26 ; addi r15, r16, 5 } + { cmpne r5, r6, r7 ; st1 r25, r26 ; shru r15, r16, r17 } + { cmpne r5, r6, r7 ; st2 r25, r26 ; shl1add r15, r16, r17 } + { cmpne r5, r6, r7 ; st4 r25, r26 ; move r15, r16 } + { cmpne r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + { cmpne r5, r6, r7 ; v1cmplts r15, r16, r17 } + { cmpne r5, r6, r7 ; v2mz r15, r16, r17 } + { cmpne r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 } + { cmul r5, r6, r7 ; flush r15 } + { cmul r5, r6, r7 ; ldnt4u r15, r16 } + { cmul r5, r6, r7 ; shli r15, r16, 5 } + { cmul r5, r6, r7 ; v1int_h r15, r16, r17 } + { cmul r5, r6, r7 ; v2shli r15, r16, 5 } + { cmula r5, r6, r7 ; cmpltui r15, r16, 5 } + { cmula r5, r6, r7 ; ld4s_add r15, r16, 5 } + { cmula r5, r6, r7 ; prefetch_l1 r15 } + { cmula r5, r6, r7 ; stnt4_add r15, r16, 5 } + { cmula r5, r6, r7 ; v2cmplts r15, r16, r17 } + { cmulaf r5, r6, r7 ; addi r15, r16, 5 } + { cmulaf r5, r6, r7 ; infol 0x1234 } + { cmulaf r5, r6, r7 ; mnz r15, r16, r17 } + { cmulaf r5, r6, r7 ; shrui r15, r16, 5 } + { cmulaf r5, r6, r7 ; v1mnz r15, r16, r17 } + { cmulaf r5, r6, r7 ; v2sub r15, r16, r17 } + { cmulf r5, r6, r7 ; exch r15, r16, r17 } + { cmulf r5, r6, r7 ; ldnt r15, r16 } + { cmulf r5, r6, r7 ; raise } + { cmulf r5, r6, r7 ; v1addi r15, r16, 5 } + { cmulf r5, r6, r7 ; v2int_l r15, r16, r17 } + { cmulfr r5, r6, r7 ; and r15, r16, r17 } + { cmulfr r5, r6, r7 ; jrp r15 } + { cmulfr r5, r6, r7 ; nop } + { cmulfr r5, r6, r7 ; st2 r15, r16 } + { cmulfr r5, r6, r7 ; v1shru r15, r16, r17 } + { cmulfr r5, r6, r7 ; v4packsc r15, r16, r17 } + { cmulh r5, r6, r7 ; fetchand r15, r16, r17 } + { cmulh r5, r6, r7 ; ldnt2s_add r15, r16, 5 } + { cmulh r5, r6, r7 ; shl1addx r15, r16, r17 } + { cmulh r5, r6, r7 ; v1cmplts r15, r16, r17 } + { cmulh r5, r6, r7 ; v2mz r15, r16, r17 } + { cmulhr r5, r6, r7 ; cmples r15, r16, r17 } + { cmulhr r5, r6, r7 ; ld2s r15, r16 } + { cmulhr r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + { cmulhr r5, r6, r7 ; stnt1 r15, r16 } + { cmulhr r5, r6, r7 ; v2addsc r15, r16, r17 } + { cmulhr r5, r6, r7 ; v4subsc r15, r16, r17 } + { crc32_32 r5, r6, r7 ; flushwb } + { crc32_32 r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + { crc32_32 r5, r6, r7 ; shlx r15, r16, r17 } + { crc32_32 r5, r6, r7 ; v1int_l r15, r16, r17 } + { crc32_32 r5, r6, r7 ; v2shlsc r15, r16, r17 } + { crc32_8 r5, r6, r7 ; cmpne r15, r16, r17 } + { crc32_8 r5, r6, r7 ; ld4u r15, r16 } + { crc32_8 r5, r6, r7 ; prefetch_l1_fault r15 } + { crc32_8 r5, r6, r7 ; stnt_add r15, r16, 5 } + { crc32_8 r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + { ctz r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 } + { ctz r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 } + { ctz r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 } + { ctz r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + { ctz r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 } + { ctz r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 } + { ctz r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + { ctz r5, r6 ; fetchand r15, r16, r17 } + { ctz r5, r6 ; ill ; prefetch_l3_fault r25 } + { ctz r5, r6 ; jalr r15 ; prefetch_l3 r25 } + { ctz r5, r6 ; jr r15 ; st r25, r26 } + { ctz r5, r6 ; ld r25, r26 ; ill } + { ctz r5, r6 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 } + { ctz r5, r6 ; ld1s_add r15, r16, 5 } + { ctz r5, r6 ; ld1u r25, r26 ; shli r15, r16, 5 } + { ctz r5, r6 ; ld2s r25, r26 ; rotl r15, r16, r17 } + { ctz r5, r6 ; ld2u r25, r26 ; jrp r15 } + { ctz r5, r6 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 } + { ctz r5, r6 ; ld4u r25, r26 ; addx r15, r16, r17 } + { ctz r5, r6 ; ld4u r25, r26 ; shrui r15, r16, 5 } + { ctz r5, r6 ; lnk r15 ; st4 r25, r26 } + { ctz r5, r6 ; move r15, r16 ; st4 r25, r26 } + { ctz r5, r6 ; mz r15, r16, r17 ; st4 r25, r26 } + { ctz r5, r6 ; or r15, r16, r17 ; ld r25, r26 } + { ctz r5, r6 ; prefetch r25 ; jr r15 } + { ctz r5, r6 ; prefetch_l1 r25 ; andi r15, r16, 5 } + { ctz r5, r6 ; prefetch_l1 r25 ; xor r15, r16, r17 } + { ctz r5, r6 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 } + { ctz r5, r6 ; prefetch_l2 r25 ; rotl r15, r16, r17 } + { ctz r5, r6 ; prefetch_l2_fault r25 ; lnk r15 } + { ctz r5, r6 ; prefetch_l3 r25 ; cmpne r15, r16, r17 } + { ctz r5, r6 ; prefetch_l3_fault r25 ; andi r15, r16, 5 } + { ctz r5, r6 ; prefetch_l3_fault r25 ; xor r15, r16, r17 } + { ctz r5, r6 ; rotli r15, r16, 5 } + { ctz r5, r6 ; shl1addx r15, r16, r17 ; ld r25, r26 } + { ctz r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + { ctz r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + { ctz r5, r6 ; shrs r15, r16, r17 ; ld2u r25, r26 } + { ctz r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 } + { ctz r5, r6 ; st r25, r26 ; andi r15, r16, 5 } + { ctz r5, r6 ; st r25, r26 ; xor r15, r16, r17 } + { ctz r5, r6 ; st1 r25, r26 ; shl3addx r15, r16, r17 } + { ctz r5, r6 ; st2 r25, r26 ; or r15, r16, r17 } + { ctz r5, r6 ; st4 r25, r26 ; jr r15 } + { ctz r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 } + { ctz r5, r6 ; v1cmpeq r15, r16, r17 } + { ctz r5, r6 ; v2maxsi r15, r16, 5 } + { ctz r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + { dblalign r5, r6, r7 ; fetchand4 r15, r16, r17 } + { dblalign r5, r6, r7 ; ldnt2u r15, r16 } + { dblalign r5, r6, r7 ; shl2add r15, r16, r17 } + { dblalign r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + { dblalign r5, r6, r7 ; v2packh r15, r16, r17 } + { dblalign2 r15, r16, r17 ; cmovnez r5, r6, r7 } + { dblalign2 r15, r16, r17 ; info 19 } + { dblalign2 r15, r16, r17 ; shl16insli r5, r6, 0x1234 } + { dblalign2 r15, r16, r17 ; v1ddotpus r5, r6, r7 } + { dblalign2 r15, r16, r17 ; v2cmpltu r5, r6, r7 } + { dblalign2 r15, r16, r17 ; v4shru r5, r6, r7 } + { dblalign2 r5, r6, r7 ; flush r15 } + { dblalign2 r5, r6, r7 ; ldnt4u r15, r16 } + { dblalign2 r5, r6, r7 ; shli r15, r16, 5 } + { dblalign2 r5, r6, r7 ; v1int_h r15, r16, r17 } + { dblalign2 r5, r6, r7 ; v2shli r15, r16, 5 } + { dblalign4 r15, r16, r17 ; cmpleu r5, r6, r7 } + { dblalign4 r15, r16, r17 ; move r5, r6 } + { dblalign4 r15, r16, r17 ; shl2addx r5, r6, r7 } + { dblalign4 r15, r16, r17 ; v1dotpu r5, r6, r7 } + { dblalign4 r15, r16, r17 ; v2dotpa r5, r6, r7 } + { dblalign4 r15, r16, r17 ; xori r5, r6, 5 } + { dblalign4 r5, r6, r7 ; ill } + { dblalign4 r5, r6, r7 ; mf } + { dblalign4 r5, r6, r7 ; shrsi r15, r16, 5 } + { dblalign4 r5, r6, r7 ; v1minu r15, r16, r17 } + { dblalign4 r5, r6, r7 ; v2shru r15, r16, r17 } + { dblalign6 r15, r16, r17 ; cmpltui r5, r6, 5 } + { dblalign6 r15, r16, r17 ; mul_hs_hu r5, r6, r7 } + { dblalign6 r15, r16, r17 ; shlx r5, r6, r7 } + { dblalign6 r15, r16, r17 ; v1int_h r5, r6, r7 } + { dblalign6 r15, r16, r17 ; v2maxsi r5, r6, 5 } + { dblalign6 r5, r6, r7 ; addx r15, r16, r17 } + { dblalign6 r5, r6, r7 ; iret } + { dblalign6 r5, r6, r7 ; movei r15, 5 } + { dblalign6 r5, r6, r7 ; shruxi r15, r16, 5 } + { dblalign6 r5, r6, r7 ; v1shl r15, r16, r17 } + { dblalign6 r5, r6, r7 ; v4add r15, r16, r17 } + { dtlbpr r15 ; cmula r5, r6, r7 } + { dtlbpr r15 ; mul_hu_hu r5, r6, r7 } + { dtlbpr r15 ; shrsi r5, r6, 5 } + { dtlbpr r15 ; v1maxui r5, r6, 5 } + { dtlbpr r15 ; v2mnz r5, r6, r7 } + { exch r15, r16, r17 ; addxsc r5, r6, r7 } + { exch r15, r16, r17 ; fnop } + { exch r15, r16, r17 ; or r5, r6, r7 } + { exch r15, r16, r17 ; v1cmpleu r5, r6, r7 } + { exch r15, r16, r17 ; v2adiffs r5, r6, r7 } + { exch r15, r16, r17 ; v4add r5, r6, r7 } + { exch4 r15, r16, r17 ; cmulf r5, r6, r7 } + { exch4 r15, r16, r17 ; mul_hu_lu r5, r6, r7 } + { exch4 r15, r16, r17 ; shrui r5, r6, 5 } + { exch4 r15, r16, r17 ; v1minui r5, r6, 5 } + { exch4 r15, r16, r17 ; v2muls r5, r6, r7 } + { fdouble_add_flags r5, r6, r7 ; andi r15, r16, 5 } + { fdouble_add_flags r5, r6, r7 ; ld r15, r16 } + { fdouble_add_flags r5, r6, r7 ; nor r15, r16, r17 } + { fdouble_add_flags r5, r6, r7 ; st2_add r15, r16, 5 } + { fdouble_add_flags r5, r6, r7 ; v1shrui r15, r16, 5 } + { fdouble_add_flags r5, r6, r7 ; v4shl r15, r16, r17 } + { fdouble_addsub r5, r6, r7 ; fetchand4 r15, r16, r17 } + { fdouble_addsub r5, r6, r7 ; ldnt2u r15, r16 } + { fdouble_addsub r5, r6, r7 ; shl2add r15, r16, r17 } + { fdouble_addsub r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + { fdouble_addsub r5, r6, r7 ; v2packh r15, r16, r17 } + { fdouble_mul_flags r5, r6, r7 ; cmpleu r15, r16, r17 } + { fdouble_mul_flags r5, r6, r7 ; ld2s_add r15, r16, 5 } + { fdouble_mul_flags r5, r6, r7 ; prefetch_add_l2 r15, 5 } + { fdouble_mul_flags r5, r6, r7 ; stnt1_add r15, r16, 5 } + { fdouble_mul_flags r5, r6, r7 ; v2cmpeq r15, r16, r17 } + { fdouble_mul_flags r5, r6, r7 ; wh64 r15 } + { fdouble_pack1 r5, r6, r7 ; fnop } + { fdouble_pack1 r5, r6, r7 ; ldnt_add r15, r16, 5 } + { fdouble_pack1 r5, r6, r7 ; shlxi r15, r16, 5 } + { fdouble_pack1 r5, r6, r7 ; v1maxu r15, r16, r17 } + { fdouble_pack1 r5, r6, r7 ; v2shrs r15, r16, r17 } + { fdouble_pack2 r5, r6, r7 ; dblalign2 r15, r16, r17 } + { fdouble_pack2 r5, r6, r7 ; ld4u_add r15, r16, 5 } + { fdouble_pack2 r5, r6, r7 ; prefetch_l2 r15 } + { fdouble_pack2 r5, r6, r7 ; sub r15, r16, r17 } + { fdouble_pack2 r5, r6, r7 ; v2cmpltu r15, r16, r17 } + { fdouble_sub_flags r5, r6, r7 ; addx r15, r16, r17 } + { fdouble_sub_flags r5, r6, r7 ; iret } + { fdouble_sub_flags r5, r6, r7 ; movei r15, 5 } + { fdouble_sub_flags r5, r6, r7 ; shruxi r15, r16, 5 } + { fdouble_sub_flags r5, r6, r7 ; v1shl r15, r16, r17 } + { fdouble_sub_flags r5, r6, r7 ; v4add r15, r16, r17 } + { fdouble_unpack_max r5, r6, r7 ; fetchadd r15, r16, r17 } + { fdouble_unpack_max r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + { fdouble_unpack_max r5, r6, r7 ; rotli r15, r16, 5 } + { fdouble_unpack_max r5, r6, r7 ; v1cmpeq r15, r16, r17 } + { fdouble_unpack_max r5, r6, r7 ; v2maxsi r15, r16, 5 } + { fdouble_unpack_min r5, r6, r7 ; cmpeq r15, r16, r17 } + { fdouble_unpack_min r5, r6, r7 ; ld1s r15, r16 } + { fdouble_unpack_min r5, r6, r7 ; or r15, r16, r17 } + { fdouble_unpack_min r5, r6, r7 ; st4 r15, r16 } + { fdouble_unpack_min r5, r6, r7 ; v1sub r15, r16, r17 } + { fdouble_unpack_min r5, r6, r7 ; v4shlsc r15, r16, r17 } + { fetchadd r15, r16, r17 ; crc32_8 r5, r6, r7 } + { fetchadd r15, r16, r17 ; mula_hs_hu r5, r6, r7 } + { fetchadd r15, r16, r17 ; subx r5, r6, r7 } + { fetchadd r15, r16, r17 ; v1mz r5, r6, r7 } + { fetchadd r15, r16, r17 ; v2packuc r5, r6, r7 } + { fetchadd4 r15, r16, r17 ; cmoveqz r5, r6, r7 } + { fetchadd4 r15, r16, r17 ; fsingle_sub1 r5, r6, r7 } + { fetchadd4 r15, r16, r17 ; shl r5, r6, r7 } + { fetchadd4 r15, r16, r17 ; v1ddotpua r5, r6, r7 } + { fetchadd4 r15, r16, r17 ; v2cmpltsi r5, r6, 5 } + { fetchadd4 r15, r16, r17 ; v4shrs r5, r6, r7 } + { fetchaddgez r15, r16, r17 ; dblalign r5, r6, r7 } + { fetchaddgez r15, r16, r17 ; mula_hs_lu r5, r6, r7 } + { fetchaddgez r15, r16, r17 ; tblidxb0 r5, r6 } + { fetchaddgez r15, r16, r17 ; v1sadu r5, r6, r7 } + { fetchaddgez r15, r16, r17 ; v2sadau r5, r6, r7 } + { fetchaddgez4 r15, r16, r17 ; cmpeq r5, r6, r7 } + { fetchaddgez4 r15, r16, r17 ; infol 0x1234 } + { fetchaddgez4 r15, r16, r17 ; shl1add r5, r6, r7 } + { fetchaddgez4 r15, r16, r17 ; v1ddotpusa r5, r6, r7 } + { fetchaddgez4 r15, r16, r17 ; v2cmpltui r5, r6, 5 } + { fetchaddgez4 r15, r16, r17 ; v4sub r5, r6, r7 } + { fetchand r15, r16, r17 ; dblalign4 r5, r6, r7 } + { fetchand r15, r16, r17 ; mula_hu_ls r5, r6, r7 } + { fetchand r15, r16, r17 ; tblidxb2 r5, r6 } + { fetchand r15, r16, r17 ; v1shli r5, r6, 5 } + { fetchand r15, r16, r17 ; v2sadu r5, r6, r7 } + { fetchand4 r15, r16, r17 ; cmples r5, r6, r7 } + { fetchand4 r15, r16, r17 ; mnz r5, r6, r7 } + { fetchand4 r15, r16, r17 ; shl2add r5, r6, r7 } + { fetchand4 r15, r16, r17 ; v1dotpa r5, r6, r7 } + { fetchand4 r15, r16, r17 ; v2dotp r5, r6, r7 } + { fetchand4 r15, r16, r17 ; xor r5, r6, r7 } + { fetchor r15, r16, r17 ; fdouble_add_flags r5, r6, r7 } + { fetchor r15, r16, r17 ; mula_ls_ls r5, r6, r7 } + { fetchor r15, r16, r17 ; v1add r5, r6, r7 } + { fetchor r15, r16, r17 ; v1shrsi r5, r6, 5 } + { fetchor r15, r16, r17 ; v2shli r5, r6, 5 } + { fetchor4 r15, r16, r17 ; cmplts r5, r6, r7 } + { fetchor4 r15, r16, r17 ; movei r5, 5 } + { fetchor4 r15, r16, r17 ; shl3add r5, r6, r7 } + { fetchor4 r15, r16, r17 ; v1dotpua r5, r6, r7 } + { fetchor4 r15, r16, r17 ; v2int_h r5, r6, r7 } + { finv r15 ; add r5, r6, r7 } + { finv r15 ; fdouble_mul_flags r5, r6, r7 } + { finv r15 ; mula_lu_lu r5, r6, r7 } + { finv r15 ; v1adduc r5, r6, r7 } + { finv r15 ; v1shrui r5, r6, 5 } + { finv r15 ; v2shrs r5, r6, r7 } + { flush r15 ; cmpltu r5, r6, r7 } + { flush r15 ; mul_hs_hs r5, r6, r7 } + { flush r15 ; shli r5, r6, 5 } + { flush r15 ; v1dotpusa r5, r6, r7 } + { flush r15 ; v2maxs r5, r6, r7 } + { flushwb ; addli r5, r6, 0x1234 } + { flushwb ; fdouble_pack2 r5, r6, r7 } + { flushwb ; mulx r5, r6, r7 } + { flushwb ; v1avgu r5, r6, r7 } + { flushwb ; v1subuc r5, r6, r7 } + { flushwb ; v2shru r5, r6, r7 } + { fnop ; add r5, r6, r7 ; ld2u r25, r26 } + { fnop ; addi r5, r6, 5 ; ld4u r25, r26 } + { fnop ; addx r5, r6, r7 ; ld4u r25, r26 } + { fnop ; addxi r5, r6, 5 ; prefetch_l1 r25 } + { fnop ; and r5, r6, r7 ; ld4u r25, r26 } + { fnop ; andi r5, r6, 5 ; prefetch_l1 r25 } + { fnop ; cmoveqz r5, r6, r7 ; prefetch r25 } + { fnop ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + { fnop ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 } + { fnop ; cmples r15, r16, r17 ; prefetch_l2_fault r25 } + { fnop ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 } + { fnop ; cmplts r15, r16, r17 ; st1 r25, r26 } + { fnop ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + { fnop ; cmpltu r5, r6, r7 ; ld r25, r26 } + { fnop ; cmpne r5, r6, r7 ; ld r25, r26 } + { fnop ; ctz r5, r6 ; prefetch_l3 r25 } + { fnop ; fnop ; ld2u r25, r26 } + { fnop ; icoh r15 } + { fnop ; inv r15 } + { fnop ; jr r15 ; ld r25, r26 } + { fnop ; ld r25, r26 ; add r5, r6, r7 } + { fnop ; ld r25, r26 ; mnz r15, r16, r17 } + { fnop ; ld r25, r26 ; shl3add r15, r16, r17 } + { fnop ; ld1s r25, r26 ; cmovnez r5, r6, r7 } + { fnop ; ld1s r25, r26 ; mula_lu_lu r5, r6, r7 } + { fnop ; ld1s r25, r26 ; shrui r5, r6, 5 } + { fnop ; ld1u r25, r26 ; cmpltsi r5, r6, 5 } + { fnop ; ld1u r25, r26 ; revbytes r5, r6 } + { fnop ; ld1u_add r15, r16, 5 } + { fnop ; ld2s r25, r26 ; jr r15 } + { fnop ; ld2s r25, r26 ; shl2add r5, r6, r7 } + { fnop ; ld2u r25, r26 ; andi r15, r16, 5 } + { fnop ; ld2u r25, r26 ; mul_lu_lu r5, r6, r7 } + { fnop ; ld2u r25, r26 ; shrsi r5, r6, 5 } + { fnop ; ld4s r25, r26 ; cmpleu r5, r6, r7 } + { fnop ; ld4s r25, r26 ; or r15, r16, r17 } + { fnop ; ld4s r25, r26 ; tblidxb3 r5, r6 } + { fnop ; ld4u r25, r26 ; ill } + { fnop ; ld4u r25, r26 ; shl1add r5, r6, r7 } + { fnop ; ldnt1u_add r15, r16, 5 } + { fnop ; mnz r15, r16, r17 ; prefetch_l1 r25 } + { fnop ; move r15, r16 ; prefetch_l2 r25 } + { fnop ; movei r15, 5 ; prefetch_l3 r25 } + { fnop ; mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 } + { fnop ; mul_ls_ls r5, r6, r7 ; prefetch_l1 r25 } + { fnop ; mula_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 } + { fnop ; mula_ls_ls r5, r6, r7 ; ld4u r25, r26 } + { fnop ; mulax r5, r6, r7 ; prefetch r25 } + { fnop ; mz r15, r16, r17 ; prefetch_l1_fault r25 } + { fnop ; nop ; prefetch_l2_fault r25 } + { fnop ; nor r5, r6, r7 ; prefetch_l3_fault r25 } + { fnop ; or r5, r6, r7 ; st1 r25, r26 } + { fnop ; prefetch r25 ; cmovnez r5, r6, r7 } + { fnop ; prefetch r25 ; mula_lu_lu r5, r6, r7 } + { fnop ; prefetch r25 ; shrui r5, r6, 5 } + { fnop ; prefetch_l1 r25 ; cmpleu r15, r16, r17 } + { fnop ; prefetch_l1 r25 ; nor r5, r6, r7 } + { fnop ; prefetch_l1 r25 ; tblidxb2 r5, r6 } + { fnop ; prefetch_l1_fault r25 ; ill } + { fnop ; prefetch_l1_fault r25 ; shl1add r5, r6, r7 } + { fnop ; prefetch_l2 r25 ; addxi r5, r6, 5 } + { fnop ; prefetch_l2 r25 ; mul_hs_hs r5, r6, r7 } + { fnop ; prefetch_l2 r25 ; shrs r15, r16, r17 } + { fnop ; prefetch_l2_fault r25 ; cmples r5, r6, r7 } + { fnop ; prefetch_l2_fault r25 ; nor r15, r16, r17 } + { fnop ; prefetch_l2_fault r25 ; tblidxb1 r5, r6 } + { fnop ; prefetch_l3 r25 ; fsingle_pack1 r5, r6 } + { fnop ; prefetch_l3 r25 ; shl1add r15, r16, r17 } + { fnop ; prefetch_l3_fault r25 ; addxi r15, r16, 5 } + { fnop ; prefetch_l3_fault r25 ; movei r5, 5 } + { fnop ; prefetch_l3_fault r25 ; shli r5, r6, 5 } + { fnop ; revbytes r5, r6 ; ld r25, r26 } + { fnop ; rotl r5, r6, r7 ; ld1u r25, r26 } + { fnop ; rotli r5, r6, 5 ; ld2u r25, r26 } + { fnop ; shl r5, r6, r7 ; ld4u r25, r26 } + { fnop ; shl1add r5, r6, r7 ; ld4u r25, r26 } + { fnop ; shl1addx r5, r6, r7 ; prefetch_l1 r25 } + { fnop ; shl2add r5, r6, r7 ; prefetch_l2 r25 } + { fnop ; shl2addx r5, r6, r7 ; prefetch_l3 r25 } + { fnop ; shl3add r5, r6, r7 ; st r25, r26 } + { fnop ; shl3addx r5, r6, r7 ; st2 r25, r26 } + { fnop ; shli r5, r6, 5 } + { fnop ; shrs r5, r6, r7 ; st2 r25, r26 } + { fnop ; shrsi r5, r6, 5 } + { fnop ; shrui r15, r16, 5 ; ld1s r25, r26 } + { fnop ; shruxi r5, r6, 5 } + { fnop ; st r25, r26 ; jalrp r15 } + { fnop ; st r25, r26 ; shl2add r15, r16, r17 } + { fnop ; st1 r25, r26 ; andi r15, r16, 5 } + { fnop ; st1 r25, r26 ; mul_lu_lu r5, r6, r7 } + { fnop ; st1 r25, r26 ; shrsi r5, r6, 5 } + { fnop ; st2 r25, r26 ; cmpleu r5, r6, r7 } + { fnop ; st2 r25, r26 ; or r15, r16, r17 } + { fnop ; st2 r25, r26 ; tblidxb3 r5, r6 } + { fnop ; st4 r25, r26 ; ill } + { fnop ; st4 r25, r26 ; shl1add r5, r6, r7 } + { fnop ; stnt4_add r15, r16, 5 } + { fnop ; subx r15, r16, r17 ; ld r25, r26 } + { fnop ; tblidxb0 r5, r6 ; ld r25, r26 } + { fnop ; tblidxb2 r5, r6 ; ld1u r25, r26 } + { fnop ; v1adduc r15, r16, r17 } + { fnop ; v1minu r15, r16, r17 } + { fnop ; v2cmpeqi r5, r6, 5 } + { fnop ; v2packuc r15, r16, r17 } + { fnop ; v4shru r15, r16, r17 } + { fnop ; xor r5, r6, r7 ; st r25, r26 } + { fsingle_add1 r5, r6, r7 ; fetchor4 r15, r16, r17 } + { fsingle_add1 r5, r6, r7 ; ldnt4s r15, r16 } + { fsingle_add1 r5, r6, r7 ; shl3add r15, r16, r17 } + { fsingle_add1 r5, r6, r7 ; v1cmpltui r15, r16, 5 } + { fsingle_add1 r5, r6, r7 ; v2packuc r15, r16, r17 } + { fsingle_addsub2 r5, r6, r7 ; cmpltsi r15, r16, 5 } + { fsingle_addsub2 r5, r6, r7 ; ld2u_add r15, r16, 5 } + { fsingle_addsub2 r5, r6, r7 ; prefetch_add_l3 r15, 5 } + { fsingle_addsub2 r5, r6, r7 ; stnt2_add r15, r16, 5 } + { fsingle_addsub2 r5, r6, r7 ; v2cmples r15, r16, r17 } + { fsingle_addsub2 r5, r6, r7 ; xori r15, r16, 5 } + { fsingle_mul1 r5, r6, r7 ; ill } + { fsingle_mul1 r5, r6, r7 ; mf } + { fsingle_mul1 r5, r6, r7 ; shrsi r15, r16, 5 } + { fsingle_mul1 r5, r6, r7 ; v1minu r15, r16, r17 } + { fsingle_mul1 r5, r6, r7 ; v2shru r15, r16, r17 } + { fsingle_mul2 r5, r6, r7 ; dblalign6 r15, r16, r17 } + { fsingle_mul2 r5, r6, r7 ; ldna r15, r16 } + { fsingle_mul2 r5, r6, r7 ; prefetch_l3 r15 } + { fsingle_mul2 r5, r6, r7 ; subxsc r15, r16, r17 } + { fsingle_mul2 r5, r6, r7 ; v2cmpne r15, r16, r17 } + { fsingle_pack1 r5, r6 ; add r15, r16, r17 ; ld4s r25, r26 } + { fsingle_pack1 r5, r6 ; addx r15, r16, r17 ; ld4u r25, r26 } + { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; ld4u r25, r26 } + { fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l1 r25 } + { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch_l1 r25 } + { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } + { fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + { fsingle_pack1 r5, r6 ; fetchor4 r15, r16, r17 } + { fsingle_pack1 r5, r6 ; ill ; st2 r25, r26 } + { fsingle_pack1 r5, r6 ; jalr r15 ; st1 r25, r26 } + { fsingle_pack1 r5, r6 ; jr r15 ; st4 r25, r26 } + { fsingle_pack1 r5, r6 ; ld r25, r26 ; jalrp r15 } + { fsingle_pack1 r5, r6 ; ld1s r25, r26 ; cmplts r15, r16, r17 } + { fsingle_pack1 r5, r6 ; ld1u r25, r26 ; addi r15, r16, 5 } + { fsingle_pack1 r5, r6 ; ld1u r25, r26 ; shru r15, r16, r17 } + { fsingle_pack1 r5, r6 ; ld2s r25, r26 ; shl1add r15, r16, r17 } + { fsingle_pack1 r5, r6 ; ld2u r25, r26 ; move r15, r16 } + { fsingle_pack1 r5, r6 ; ld4s r25, r26 ; fnop } + { fsingle_pack1 r5, r6 ; ld4u r25, r26 ; andi r15, r16, 5 } + { fsingle_pack1 r5, r6 ; ld4u r25, r26 ; xor r15, r16, r17 } + { fsingle_pack1 r5, r6 ; mfspr r16, 0x5 } + { fsingle_pack1 r5, r6 ; movei r15, 5 ; ld1s r25, r26 } + { fsingle_pack1 r5, r6 ; nop ; ld1s r25, r26 } + { fsingle_pack1 r5, r6 ; or r15, r16, r17 ; ld2s r25, r26 } + { fsingle_pack1 r5, r6 ; prefetch r25 ; mnz r15, r16, r17 } + { fsingle_pack1 r5, r6 ; prefetch_l1 r25 ; cmples r15, r16, r17 } + { fsingle_pack1 r5, r6 ; prefetch_l1_fault r25 ; add r15, r16, r17 } + { fsingle_pack1 r5, r6 ; prefetch_l1_fault r25 ; shrsi r15, r16, 5 } + { fsingle_pack1 r5, r6 ; prefetch_l2 r25 ; shl1add r15, r16, r17 } + { fsingle_pack1 r5, r6 ; prefetch_l2_fault r25 ; movei r15, 5 } + { fsingle_pack1 r5, r6 ; prefetch_l3 r25 ; info 19 } + { fsingle_pack1 r5, r6 ; prefetch_l3_fault r25 ; cmples r15, r16, r17 } + { fsingle_pack1 r5, r6 ; rotl r15, r16, r17 ; ld r25, r26 } + { fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 } + { fsingle_pack1 r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + { fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + { fsingle_pack1 r5, r6 ; shl3addx r15, r16, r17 ; prefetch r25 } + { fsingle_pack1 r5, r6 ; shrs r15, r16, r17 ; prefetch r25 } + { fsingle_pack1 r5, r6 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + { fsingle_pack1 r5, r6 ; st r25, r26 ; cmples r15, r16, r17 } + { fsingle_pack1 r5, r6 ; st1 r25, r26 ; add r15, r16, r17 } + { fsingle_pack1 r5, r6 ; st1 r25, r26 ; shrsi r15, r16, 5 } + { fsingle_pack1 r5, r6 ; st2 r25, r26 ; shl r15, r16, r17 } + { fsingle_pack1 r5, r6 ; st4 r25, r26 ; mnz r15, r16, r17 } + { fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; ld4s r25, r26 } + { fsingle_pack1 r5, r6 ; v1cmpleu r15, r16, r17 } + { fsingle_pack1 r5, r6 ; v2mnz r15, r16, r17 } + { fsingle_pack1 r5, r6 ; xor r15, r16, r17 ; st r25, r26 } + { fsingle_pack2 r5, r6, r7 ; finv r15 } + { fsingle_pack2 r5, r6, r7 ; ldnt4s_add r15, r16, 5 } + { fsingle_pack2 r5, r6, r7 ; shl3addx r15, r16, r17 } + { fsingle_pack2 r5, r6, r7 ; v1cmpne r15, r16, r17 } + { fsingle_pack2 r5, r6, r7 ; v2shl r15, r16, r17 } + { fsingle_sub1 r5, r6, r7 ; cmpltu r15, r16, r17 } + { fsingle_sub1 r5, r6, r7 ; ld4s r15, r16 } + { fsingle_sub1 r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + { fsingle_sub1 r5, r6, r7 ; stnt4 r15, r16 } + { fsingle_sub1 r5, r6, r7 ; v2cmpleu r15, r16, r17 } + { icoh r15 ; add r5, r6, r7 } + { icoh r15 ; fdouble_mul_flags r5, r6, r7 } + { icoh r15 ; mula_lu_lu r5, r6, r7 } + { icoh r15 ; v1adduc r5, r6, r7 } + { icoh r15 ; v1shrui r5, r6, 5 } + { icoh r15 ; v2shrs r5, r6, r7 } + { ill ; addi r5, r6, 5 ; ld1u r25, r26 } + { ill ; addxi r5, r6, 5 ; ld2s r25, r26 } + { ill ; andi r5, r6, 5 ; ld2s r25, r26 } + { ill ; cmoveqz r5, r6, r7 ; ld1u r25, r26 } + { ill ; cmpeq r5, r6, r7 ; ld2u r25, r26 } + { ill ; cmples r5, r6, r7 ; ld4u r25, r26 } + { ill ; cmplts r5, r6, r7 ; prefetch_l1 r25 } + { ill ; cmpltu r5, r6, r7 ; prefetch_l2 r25 } + { ill ; ctz r5, r6 ; ld1u r25, r26 } + { ill ; fnop ; prefetch_l2_fault r25 } + { ill ; info 19 ; prefetch r25 } + { ill ; ld r25, r26 ; mul_lu_lu r5, r6, r7 } + { ill ; ld1s r25, r26 ; and r5, r6, r7 } + { ill ; ld1s r25, r26 ; shl1add r5, r6, r7 } + { ill ; ld1u r25, r26 ; mnz r5, r6, r7 } + { ill ; ld1u r25, r26 ; xor r5, r6, r7 } + { ill ; ld2s r25, r26 ; pcnt r5, r6 } + { ill ; ld2u r25, r26 ; cmpltu r5, r6, r7 } + { ill ; ld2u r25, r26 ; sub r5, r6, r7 } + { ill ; ld4s r25, r26 ; mulax r5, r6, r7 } + { ill ; ld4u r25, r26 ; cmpeq r5, r6, r7 } + { ill ; ld4u r25, r26 ; shl3addx r5, r6, r7 } + { ill ; move r5, r6 ; ld4u r25, r26 } + { ill ; mul_hs_hs r5, r6, r7 ; prefetch r25 } + { ill ; mul_ls_ls r5, r6, r7 ; ld2u r25, r26 } + { ill ; mula_hs_hs r5, r6, r7 ; ld4s r25, r26 } + { ill ; mula_ls_ls r5, r6, r7 ; ld1u r25, r26 } + { ill ; mulax r5, r6, r7 ; ld2s r25, r26 } + { ill ; mz r5, r6, r7 ; ld4s r25, r26 } + { ill ; nor r5, r6, r7 ; prefetch r25 } + { ill ; pcnt r5, r6 ; prefetch_l1 r25 } + { ill ; prefetch r25 ; mula_hu_hu r5, r6, r7 } + { ill ; prefetch_l1 r25 ; clz r5, r6 } + { ill ; prefetch_l1 r25 ; shl2add r5, r6, r7 } + { ill ; prefetch_l1_fault r25 ; movei r5, 5 } + { ill ; prefetch_l2 r25 ; add r5, r6, r7 } + { ill ; prefetch_l2 r25 ; revbytes r5, r6 } + { ill ; prefetch_l2_fault r25 ; ctz r5, r6 } + { ill ; prefetch_l2_fault r25 ; tblidxb0 r5, r6 } + { ill ; prefetch_l3 r25 ; mz r5, r6, r7 } + { ill ; prefetch_l3_fault r25 ; cmples r5, r6, r7 } + { ill ; prefetch_l3_fault r25 ; shrs r5, r6, r7 } + { ill ; revbytes r5, r6 ; prefetch_l1_fault r25 } + { ill ; rotli r5, r6, 5 ; prefetch_l2_fault r25 } + { ill ; shl1add r5, r6, r7 ; prefetch_l3 r25 } + { ill ; shl2add r5, r6, r7 ; st r25, r26 } + { ill ; shl3add r5, r6, r7 ; st2 r25, r26 } + { ill ; shli r5, r6, 5 } + { ill ; shrsi r5, r6, 5 } + { ill ; shruxi r5, r6, 5 } + { ill ; st r25, r26 ; pcnt r5, r6 } + { ill ; st1 r25, r26 ; cmpltu r5, r6, r7 } + { ill ; st1 r25, r26 ; sub r5, r6, r7 } + { ill ; st2 r25, r26 ; mulax r5, r6, r7 } + { ill ; st4 r25, r26 ; cmpeq r5, r6, r7 } + { ill ; st4 r25, r26 ; shl3addx r5, r6, r7 } + { ill ; subx r5, r6, r7 ; prefetch r25 } + { ill ; tblidxb1 r5, r6 ; prefetch_l1 r25 } + { ill ; tblidxb3 r5, r6 ; prefetch_l2 r25 } + { ill ; v1multu r5, r6, r7 } + { ill ; v2mz r5, r6, r7 } + { ill ; xor r5, r6, r7 ; prefetch_l3 r25 } + { info 19 ; add r5, r6, r7 ; prefetch_l3_fault r25 } + { info 19 ; addi r5, r6, 5 ; st1 r25, r26 } + { info 19 ; addx r5, r6, r7 ; st1 r25, r26 } + { info 19 ; addxi r5, r6, 5 ; st4 r25, r26 } + { info 19 ; and r5, r6, r7 ; st1 r25, r26 } + { info 19 ; andi r5, r6, 5 ; st4 r25, r26 } + { info 19 ; cmoveqz r5, r6, r7 ; st2 r25, r26 } + { info 19 ; cmpeq r15, r16, r17 } + { info 19 ; cmpeqi r5, r6, 5 ; ld1s r25, r26 } + { info 19 ; cmples r5, r6, r7 ; ld1s r25, r26 } + { info 19 ; cmpleu r5, r6, r7 ; ld2s r25, r26 } + { info 19 ; cmplts r5, r6, r7 ; ld4s r25, r26 } + { info 19 ; cmpltsi r5, r6, 5 ; prefetch r25 } + { info 19 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + { info 19 ; cmpne r5, r6, r7 ; prefetch_l1_fault r25 } + { info 19 ; dblalign2 r5, r6, r7 } + { info 19 ; fnop ; prefetch_l3_fault r25 } + { info 19 ; ill ; prefetch_l1 r25 } + { info 19 ; jalr r15 ; prefetch r25 } + { info 19 ; jr r15 ; prefetch_l1_fault r25 } + { info 19 ; ld r25, r26 ; andi r15, r16, 5 } + { info 19 ; ld r25, r26 ; mul_lu_lu r5, r6, r7 } + { info 19 ; ld r25, r26 ; shrsi r5, r6, 5 } + { info 19 ; ld1s r25, r26 ; cmplts r15, r16, r17 } + { info 19 ; ld1s r25, r26 ; or r5, r6, r7 } + { info 19 ; ld1s r25, r26 ; xor r15, r16, r17 } + { info 19 ; ld1u r25, r26 ; info 19 } + { info 19 ; ld1u r25, r26 ; shl1addx r15, r16, r17 } + { info 19 ; ld2s r25, r26 ; addxi r5, r6, 5 } + { info 19 ; ld2s r25, r26 ; mul_hs_hs r5, r6, r7 } + { info 19 ; ld2s r25, r26 ; shrs r15, r16, r17 } + { info 19 ; ld2u r25, r26 ; cmples r15, r16, r17 } + { info 19 ; ld2u r25, r26 ; nop } + { info 19 ; ld2u r25, r26 ; tblidxb0 r5, r6 } + { info 19 ; ld4s r25, r26 ; ctz r5, r6 } + { info 19 ; ld4s r25, r26 ; shl r15, r16, r17 } + { info 19 ; ld4u r25, r26 ; addi r5, r6, 5 } + { info 19 ; ld4u r25, r26 ; move r15, r16 } + { info 19 ; ld4u r25, r26 ; shl3addx r15, r16, r17 } + { info 19 ; ldnt_add r15, r16, 5 } + { info 19 ; mnz r15, r16, r17 ; st4 r25, r26 } + { info 19 ; move r5, r6 ; ld r25, r26 } + { info 19 ; movei r5, 5 ; ld1u r25, r26 } + { info 19 ; mul_hs_ls r5, r6, r7 } + { info 19 ; mul_ls_ls r5, r6, r7 ; st4 r25, r26 } + { info 19 ; mula_hs_hs r5, r6, r7 } + { info 19 ; mula_ls_ls r5, r6, r7 ; st1 r25, r26 } + { info 19 ; mulax r5, r6, r7 ; st2 r25, r26 } + { info 19 ; mz r15, r16, r17 } + { info 19 ; nor r15, r16, r17 ; ld1s r25, r26 } + { info 19 ; or r15, r16, r17 ; ld2s r25, r26 } + { info 19 ; pcnt r5, r6 ; ld2s r25, r26 } + { info 19 ; prefetch r25 ; cmplts r15, r16, r17 } + { info 19 ; prefetch r25 ; or r5, r6, r7 } + { info 19 ; prefetch r25 ; xor r15, r16, r17 } + { info 19 ; prefetch_l1 r25 ; cmpne r5, r6, r7 } + { info 19 ; prefetch_l1 r25 ; rotli r5, r6, 5 } + { info 19 ; prefetch_l1_fault r25 ; addi r5, r6, 5 } + { info 19 ; prefetch_l1_fault r25 ; move r15, r16 } + { info 19 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 } + { info 19 ; prefetch_l2 r25 ; cmpeq r5, r6, r7 } + { info 19 ; prefetch_l2 r25 ; mulx r5, r6, r7 } + { info 19 ; prefetch_l2 r25 ; sub r5, r6, r7 } + { info 19 ; prefetch_l2_fault r25 ; cmpne r15, r16, r17 } + { info 19 ; prefetch_l2_fault r25 ; rotli r15, r16, 5 } + { info 19 ; prefetch_l3 r25 ; addi r15, r16, 5 } + { info 19 ; prefetch_l3 r25 ; mnz r5, r6, r7 } + { info 19 ; prefetch_l3 r25 ; shl3add r5, r6, r7 } + { info 19 ; prefetch_l3_fault r25 ; cmpeq r15, r16, r17 } + { info 19 ; prefetch_l3_fault r25 ; mulax r5, r6, r7 } + { info 19 ; prefetch_l3_fault r25 ; sub r15, r16, r17 } + { info 19 ; revbytes r5, r6 ; prefetch_l1_fault r25 } + { info 19 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 } + { info 19 ; rotli r5, r6, 5 ; prefetch_l3_fault r25 } + { info 19 ; shl r5, r6, r7 ; st1 r25, r26 } + { info 19 ; shl1add r5, r6, r7 ; st1 r25, r26 } + { info 19 ; shl1addx r5, r6, r7 ; st4 r25, r26 } + { info 19 ; shl2addx r15, r16, r17 ; ld r25, r26 } + { info 19 ; shl3add r15, r16, r17 ; ld1u r25, r26 } + { info 19 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + { info 19 ; shli r15, r16, 5 ; ld4u r25, r26 } + { info 19 ; shrs r15, r16, r17 ; ld2u r25, r26 } + { info 19 ; shrsi r15, r16, 5 ; ld4u r25, r26 } + { info 19 ; shru r15, r16, r17 ; prefetch_l1 r25 } + { info 19 ; shrui r15, r16, 5 ; prefetch_l2 r25 } + { info 19 ; st r25, r26 ; addxi r15, r16, 5 } + { info 19 ; st r25, r26 ; movei r5, 5 } + { info 19 ; st r25, r26 ; shli r5, r6, 5 } + { info 19 ; st1 r25, r26 ; cmples r15, r16, r17 } + { info 19 ; st1 r25, r26 ; nop } + { info 19 ; st1 r25, r26 ; tblidxb0 r5, r6 } + { info 19 ; st2 r25, r26 ; ctz r5, r6 } + { info 19 ; st2 r25, r26 ; shl r15, r16, r17 } + { info 19 ; st4 r25, r26 ; addi r5, r6, 5 } + { info 19 ; st4 r25, r26 ; move r15, r16 } + { info 19 ; st4 r25, r26 ; shl3addx r15, r16, r17 } + { info 19 ; sub r15, r16, r17 ; prefetch r25 } + { info 19 ; subx r15, r16, r17 ; prefetch_l1_fault r25 } + { info 19 ; tblidxb0 r5, r6 ; prefetch_l1_fault r25 } + { info 19 ; tblidxb2 r5, r6 ; prefetch_l2_fault r25 } + { info 19 ; v1cmples r5, r6, r7 } + { info 19 ; v1mz r15, r16, r17 } + { info 19 ; v2cmpltu r15, r16, r17 } + { info 19 ; v2shli r5, r6, 5 } + { info 19 ; xor r15, r16, r17 ; ld1u r25, r26 } + { infol 0x1234 ; addi r15, r16, 5 } + { infol 0x1234 ; cmpne r15, r16, r17 } + { infol 0x1234 ; flushwb } + { infol 0x1234 ; ldnt2s r15, r16 } + { infol 0x1234 ; mula_ls_lu r5, r6, r7 } + { infol 0x1234 ; shl1addx r15, r16, r17 } + { infol 0x1234 ; stnt2 r15, r16 } + { infol 0x1234 ; v1cmpne r5, r6, r7 } + { infol 0x1234 ; v1shru r15, r16, r17 } + { infol 0x1234 ; v2maxs r15, r16, r17 } + { infol 0x1234 ; v2sub r5, r6, r7 } + { inv r15 ; bfextu r5, r6, 5, 7 } + { inv r15 ; fsingle_mul2 r5, r6, r7 } + { inv r15 ; revbytes r5, r6 } + { inv r15 ; v1cmpltui r5, r6, 5 } + { inv r15 ; v2cmples r5, r6, r7 } + { inv r15 ; v4packsc r5, r6, r7 } + { iret ; crc32_32 r5, r6, r7 } + { iret ; mula_hs_hs r5, r6, r7 } + { iret ; sub r5, r6, r7 } + { iret ; v1mulus r5, r6, r7 } + { iret ; v2packl r5, r6, r7 } + { jalr r15 ; add r5, r6, r7 ; prefetch_l3 r25 } + { jalr r15 ; addx r5, r6, r7 ; prefetch_l3_fault r25 } + { jalr r15 ; and r5, r6, r7 ; prefetch_l3_fault r25 } + { jalr r15 ; clz r5, r6 ; prefetch_l3 r25 } + { jalr r15 ; cmovnez r5, r6, r7 ; st r25, r26 } + { jalr r15 ; cmpeqi r5, r6, 5 ; st2 r25, r26 } + { jalr r15 ; cmpleu r5, r6, r7 } + { jalr r15 ; cmpltu r5, r6, r7 ; ld1s r25, r26 } + { jalr r15 ; cmulaf r5, r6, r7 } + { jalr r15 ; fnop ; ld1u r25, r26 } + { jalr r15 ; fsingle_pack2 r5, r6, r7 } + { jalr r15 ; ld r25, r26 ; fnop } + { jalr r15 ; ld r25, r26 ; tblidxb1 r5, r6 } + { jalr r15 ; ld1s r25, r26 ; nop } + { jalr r15 ; ld1u r25, r26 ; cmpleu r5, r6, r7 } + { jalr r15 ; ld1u r25, r26 ; shrsi r5, r6, 5 } + { jalr r15 ; ld2s r25, r26 ; mula_hu_hu r5, r6, r7 } + { jalr r15 ; ld2u r25, r26 ; clz r5, r6 } + { jalr r15 ; ld2u r25, r26 ; shl2add r5, r6, r7 } + { jalr r15 ; ld4s r25, r26 ; movei r5, 5 } + { jalr r15 ; ld4u r25, r26 ; add r5, r6, r7 } + { jalr r15 ; ld4u r25, r26 ; revbytes r5, r6 } + { jalr r15 ; mnz r5, r6, r7 ; st2 r25, r26 } + { jalr r15 ; movei r5, 5 } + { jalr r15 ; mul_hu_hu r5, r6, r7 ; st2 r25, r26 } + { jalr r15 ; mul_lu_lu r5, r6, r7 ; st1 r25, r26 } + { jalr r15 ; mula_hu_hu r5, r6, r7 ; st r25, r26 } + { jalr r15 ; mula_lu_lu r5, r6, r7 ; prefetch_l3_fault r25 } + { jalr r15 ; mulx r5, r6, r7 ; st1 r25, r26 } + { jalr r15 ; nop ; st4 r25, r26 } + { jalr r15 ; ori r5, r6, 5 } + { jalr r15 ; prefetch r25 ; info 19 } + { jalr r15 ; prefetch r25 ; tblidxb3 r5, r6 } + { jalr r15 ; prefetch_l1 r25 ; or r5, r6, r7 } + { jalr r15 ; prefetch_l1_fault r25 ; cmpltsi r5, r6, 5 } + { jalr r15 ; prefetch_l1_fault r25 ; shrui r5, r6, 5 } + { jalr r15 ; prefetch_l2 r25 ; mula_lu_lu r5, r6, r7 } + { jalr r15 ; prefetch_l2_fault r25 ; cmovnez r5, r6, r7 } + { jalr r15 ; prefetch_l2_fault r25 ; shl3add r5, r6, r7 } + { jalr r15 ; prefetch_l3 r25 ; mul_hu_hu r5, r6, r7 } + { jalr r15 ; prefetch_l3_fault r25 ; addx r5, r6, r7 } + { jalr r15 ; prefetch_l3_fault r25 ; rotli r5, r6, 5 } + { jalr r15 ; revbytes r5, r6 ; ld r25, r26 } + { jalr r15 ; rotli r5, r6, 5 ; ld1u r25, r26 } + { jalr r15 ; shl1add r5, r6, r7 ; ld2s r25, r26 } + { jalr r15 ; shl2add r5, r6, r7 ; ld4s r25, r26 } + { jalr r15 ; shl3add r5, r6, r7 ; prefetch r25 } + { jalr r15 ; shli r5, r6, 5 ; prefetch_l1_fault r25 } + { jalr r15 ; shrsi r5, r6, 5 ; prefetch_l1_fault r25 } + { jalr r15 ; shrui r5, r6, 5 ; prefetch_l2_fault r25 } + { jalr r15 ; st r25, r26 ; mula_hu_hu r5, r6, r7 } + { jalr r15 ; st1 r25, r26 ; clz r5, r6 } + { jalr r15 ; st1 r25, r26 ; shl2add r5, r6, r7 } + { jalr r15 ; st2 r25, r26 ; movei r5, 5 } + { jalr r15 ; st4 r25, r26 ; add r5, r6, r7 } + { jalr r15 ; st4 r25, r26 ; revbytes r5, r6 } + { jalr r15 ; sub r5, r6, r7 ; st4 r25, r26 } + { jalr r15 ; tblidxb0 r5, r6 } + { jalr r15 ; tblidxb3 r5, r6 ; ld1s r25, r26 } + { jalr r15 ; v1dotpus r5, r6, r7 } + { jalr r15 ; v2int_l r5, r6, r7 } + { jalr r15 ; xor r5, r6, r7 ; ld2s r25, r26 } + { jalrp r15 ; addi r5, r6, 5 ; ld2u r25, r26 } + { jalrp r15 ; addxi r5, r6, 5 ; ld4s r25, r26 } + { jalrp r15 ; andi r5, r6, 5 ; ld4s r25, r26 } + { jalrp r15 ; cmoveqz r5, r6, r7 ; ld2u r25, r26 } + { jalrp r15 ; cmpeq r5, r6, r7 ; ld4u r25, r26 } + { jalrp r15 ; cmples r5, r6, r7 ; prefetch_l1 r25 } + { jalrp r15 ; cmplts r5, r6, r7 ; prefetch_l2 r25 } + { jalrp r15 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 } + { jalrp r15 ; ctz r5, r6 ; ld2u r25, r26 } + { jalrp r15 ; fnop ; prefetch_l3_fault r25 } + { jalrp r15 ; info 19 ; prefetch_l1_fault r25 } + { jalrp r15 ; ld r25, r26 ; mula_hu_hu r5, r6, r7 } + { jalrp r15 ; ld1s r25, r26 ; clz r5, r6 } + { jalrp r15 ; ld1s r25, r26 ; shl2add r5, r6, r7 } + { jalrp r15 ; ld1u r25, r26 ; movei r5, 5 } + { jalrp r15 ; ld2s r25, r26 ; add r5, r6, r7 } + { jalrp r15 ; ld2s r25, r26 ; revbytes r5, r6 } + { jalrp r15 ; ld2u r25, r26 ; ctz r5, r6 } + { jalrp r15 ; ld2u r25, r26 ; tblidxb0 r5, r6 } + { jalrp r15 ; ld4s r25, r26 ; mz r5, r6, r7 } + { jalrp r15 ; ld4u r25, r26 ; cmples r5, r6, r7 } + { jalrp r15 ; ld4u r25, r26 ; shrs r5, r6, r7 } + { jalrp r15 ; move r5, r6 ; prefetch_l1 r25 } + { jalrp r15 ; mul_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 } + { jalrp r15 ; mul_ls_ls r5, r6, r7 ; ld4u r25, r26 } + { jalrp r15 ; mula_hs_hs r5, r6, r7 ; prefetch r25 } + { jalrp r15 ; mula_ls_ls r5, r6, r7 ; ld2u r25, r26 } + { jalrp r15 ; mulax r5, r6, r7 ; ld4s r25, r26 } + { jalrp r15 ; mz r5, r6, r7 ; prefetch r25 } + { jalrp r15 ; nor r5, r6, r7 ; prefetch_l1_fault r25 } + { jalrp r15 ; pcnt r5, r6 ; prefetch_l2 r25 } + { jalrp r15 ; prefetch r25 ; mula_lu_lu r5, r6, r7 } + { jalrp r15 ; prefetch_l1 r25 ; cmovnez r5, r6, r7 } + { jalrp r15 ; prefetch_l1 r25 ; shl3add r5, r6, r7 } + { jalrp r15 ; prefetch_l1_fault r25 ; mul_hu_hu r5, r6, r7 } + { jalrp r15 ; prefetch_l2 r25 ; addx r5, r6, r7 } + { jalrp r15 ; prefetch_l2 r25 ; rotli r5, r6, 5 } + { jalrp r15 ; prefetch_l2_fault r25 ; fsingle_pack1 r5, r6 } + { jalrp r15 ; prefetch_l2_fault r25 ; tblidxb2 r5, r6 } + { jalrp r15 ; prefetch_l3 r25 ; nor r5, r6, r7 } + { jalrp r15 ; prefetch_l3_fault r25 ; cmplts r5, r6, r7 } + { jalrp r15 ; prefetch_l3_fault r25 ; shru r5, r6, r7 } + { jalrp r15 ; revbytes r5, r6 ; prefetch_l2_fault r25 } + { jalrp r15 ; rotli r5, r6, 5 ; prefetch_l3_fault r25 } + { jalrp r15 ; shl1add r5, r6, r7 ; st r25, r26 } + { jalrp r15 ; shl2add r5, r6, r7 ; st2 r25, r26 } + { jalrp r15 ; shl3add r5, r6, r7 } + { jalrp r15 ; shlxi r5, r6, 5 } + { jalrp r15 ; shru r5, r6, r7 ; ld1s r25, r26 } + { jalrp r15 ; st r25, r26 ; add r5, r6, r7 } + { jalrp r15 ; st r25, r26 ; revbytes r5, r6 } + { jalrp r15 ; st1 r25, r26 ; ctz r5, r6 } + { jalrp r15 ; st1 r25, r26 ; tblidxb0 r5, r6 } + { jalrp r15 ; st2 r25, r26 ; mz r5, r6, r7 } + { jalrp r15 ; st4 r25, r26 ; cmples r5, r6, r7 } + { jalrp r15 ; st4 r25, r26 ; shrs r5, r6, r7 } + { jalrp r15 ; subx r5, r6, r7 ; prefetch_l1_fault r25 } + { jalrp r15 ; tblidxb1 r5, r6 ; prefetch_l2 r25 } + { jalrp r15 ; tblidxb3 r5, r6 ; prefetch_l3 r25 } + { jalrp r15 ; v1mulus r5, r6, r7 } + { jalrp r15 ; v2packl r5, r6, r7 } + { jalrp r15 ; xor r5, r6, r7 ; st r25, r26 } + { jr r15 ; addi r5, r6, 5 ; st1 r25, r26 } + { jr r15 ; addxi r5, r6, 5 ; st2 r25, r26 } + { jr r15 ; andi r5, r6, 5 ; st2 r25, r26 } + { jr r15 ; cmoveqz r5, r6, r7 ; st1 r25, r26 } + { jr r15 ; cmpeq r5, r6, r7 ; st4 r25, r26 } + { jr r15 ; cmpleu r5, r6, r7 ; ld r25, r26 } + { jr r15 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 } + { jr r15 ; cmpne r5, r6, r7 ; ld2s r25, r26 } + { jr r15 ; ctz r5, r6 ; st1 r25, r26 } + { jr r15 ; fsingle_pack1 r5, r6 ; ld1s r25, r26 } + { jr r15 ; ld r25, r26 ; add r5, r6, r7 } + { jr r15 ; ld r25, r26 ; revbytes r5, r6 } + { jr r15 ; ld1s r25, r26 ; ctz r5, r6 } + { jr r15 ; ld1s r25, r26 ; tblidxb0 r5, r6 } + { jr r15 ; ld1u r25, r26 ; mz r5, r6, r7 } + { jr r15 ; ld2s r25, r26 ; cmples r5, r6, r7 } + { jr r15 ; ld2s r25, r26 ; shrs r5, r6, r7 } + { jr r15 ; ld2u r25, r26 ; mula_hs_hs r5, r6, r7 } + { jr r15 ; ld4s r25, r26 ; andi r5, r6, 5 } + { jr r15 ; ld4s r25, r26 ; shl1addx r5, r6, r7 } + { jr r15 ; ld4u r25, r26 ; move r5, r6 } + { jr r15 ; ld4u r25, r26 } + { jr r15 ; movei r5, 5 ; ld r25, r26 } + { jr r15 ; mul_hs_ls r5, r6, r7 } + { jr r15 ; mul_ls_ls r5, r6, r7 ; st4 r25, r26 } + { jr r15 ; mula_hs_hs r5, r6, r7 } + { jr r15 ; mula_ls_ls r5, r6, r7 ; st1 r25, r26 } + { jr r15 ; mulax r5, r6, r7 ; st2 r25, r26 } + { jr r15 ; mz r5, r6, r7 } + { jr r15 ; or r5, r6, r7 ; ld1s r25, r26 } + { jr r15 ; prefetch r25 ; addx r5, r6, r7 } + { jr r15 ; prefetch r25 ; rotli r5, r6, 5 } + { jr r15 ; prefetch_l1 r25 ; fsingle_pack1 r5, r6 } + { jr r15 ; prefetch_l1 r25 ; tblidxb2 r5, r6 } + { jr r15 ; prefetch_l1_fault r25 ; nor r5, r6, r7 } + { jr r15 ; prefetch_l2 r25 ; cmplts r5, r6, r7 } + { jr r15 ; prefetch_l2 r25 ; shru r5, r6, r7 } + { jr r15 ; prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 } + { jr r15 ; prefetch_l3 r25 ; cmoveqz r5, r6, r7 } + { jr r15 ; prefetch_l3 r25 ; shl2addx r5, r6, r7 } + { jr r15 ; prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 } + { jr r15 ; revbits r5, r6 ; ld1s r25, r26 } + { jr r15 ; rotl r5, r6, r7 ; ld2s r25, r26 } + { jr r15 ; shl r5, r6, r7 ; ld4s r25, r26 } + { jr r15 ; shl1addx r5, r6, r7 ; ld4u r25, r26 } + { jr r15 ; shl2addx r5, r6, r7 ; prefetch_l1 r25 } + { jr r15 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 } + { jr r15 ; shrs r5, r6, r7 ; prefetch_l2 r25 } + { jr r15 ; shru r5, r6, r7 ; prefetch_l3 r25 } + { jr r15 ; st r25, r26 ; cmples r5, r6, r7 } + { jr r15 ; st r25, r26 ; shrs r5, r6, r7 } + { jr r15 ; st1 r25, r26 ; mula_hs_hs r5, r6, r7 } + { jr r15 ; st2 r25, r26 ; andi r5, r6, 5 } + { jr r15 ; st2 r25, r26 ; shl1addx r5, r6, r7 } + { jr r15 ; st4 r25, r26 ; move r5, r6 } + { jr r15 ; st4 r25, r26 } + { jr r15 ; tblidxb0 r5, r6 ; ld r25, r26 } + { jr r15 ; tblidxb2 r5, r6 ; ld1u r25, r26 } + { jr r15 ; v1avgu r5, r6, r7 } + { jr r15 ; v1subuc r5, r6, r7 } + { jr r15 ; v2shru r5, r6, r7 } + { jrp r15 ; add r5, r6, r7 ; ld4s r25, r26 } + { jrp r15 ; addx r5, r6, r7 ; ld4u r25, r26 } + { jrp r15 ; and r5, r6, r7 ; ld4u r25, r26 } + { jrp r15 ; clz r5, r6 ; ld4s r25, r26 } + { jrp r15 ; cmovnez r5, r6, r7 ; prefetch r25 } + { jrp r15 ; cmpeqi r5, r6, 5 ; prefetch_l1_fault r25 } + { jrp r15 ; cmpleu r5, r6, r7 ; prefetch_l2_fault r25 } + { jrp r15 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 } + { jrp r15 ; cmpne r5, r6, r7 ; st r25, r26 } + { jrp r15 ; fdouble_pack1 r5, r6, r7 } + { jrp r15 ; fsingle_pack1 r5, r6 ; prefetch_l3 r25 } + { jrp r15 ; ld r25, r26 ; cmples r5, r6, r7 } + { jrp r15 ; ld r25, r26 ; shrs r5, r6, r7 } + { jrp r15 ; ld1s r25, r26 ; mula_hs_hs r5, r6, r7 } + { jrp r15 ; ld1u r25, r26 ; andi r5, r6, 5 } + { jrp r15 ; ld1u r25, r26 ; shl1addx r5, r6, r7 } + { jrp r15 ; ld2s r25, r26 ; move r5, r6 } + { jrp r15 ; ld2s r25, r26 } + { jrp r15 ; ld2u r25, r26 ; revbits r5, r6 } + { jrp r15 ; ld4s r25, r26 ; cmpne r5, r6, r7 } + { jrp r15 ; ld4s r25, r26 ; subx r5, r6, r7 } + { jrp r15 ; ld4u r25, r26 ; mulx r5, r6, r7 } + { jrp r15 ; mnz r5, r6, r7 ; prefetch_l1_fault r25 } + { jrp r15 ; movei r5, 5 ; prefetch_l2_fault r25 } + { jrp r15 ; mul_hu_hu r5, r6, r7 ; prefetch_l1_fault r25 } + { jrp r15 ; mul_lu_lu r5, r6, r7 ; prefetch_l1 r25 } + { jrp r15 ; mula_hu_hu r5, r6, r7 ; prefetch r25 } + { jrp r15 ; mula_lu_lu r5, r6, r7 ; ld4u r25, r26 } + { jrp r15 ; mulx r5, r6, r7 ; prefetch_l1 r25 } + { jrp r15 ; nop ; prefetch_l2 r25 } + { jrp r15 ; or r5, r6, r7 ; prefetch_l3 r25 } + { jrp r15 ; prefetch r25 ; cmplts r5, r6, r7 } + { jrp r15 ; prefetch r25 ; shru r5, r6, r7 } + { jrp r15 ; prefetch_l1 r25 ; mula_ls_ls r5, r6, r7 } + { jrp r15 ; prefetch_l1_fault r25 ; cmoveqz r5, r6, r7 } + { jrp r15 ; prefetch_l1_fault r25 ; shl2addx r5, r6, r7 } + { jrp r15 ; prefetch_l2 r25 ; mul_hs_hs r5, r6, r7 } + { jrp r15 ; prefetch_l2_fault r25 ; addi r5, r6, 5 } + { jrp r15 ; prefetch_l2_fault r25 ; rotl r5, r6, r7 } + { jrp r15 ; prefetch_l3 r25 ; fnop } + { jrp r15 ; prefetch_l3 r25 ; tblidxb1 r5, r6 } + { jrp r15 ; prefetch_l3_fault r25 ; nop } + { jrp r15 ; revbits r5, r6 ; prefetch_l3 r25 } + { jrp r15 ; rotl r5, r6, r7 ; st r25, r26 } + { jrp r15 ; shl r5, r6, r7 ; st2 r25, r26 } + { jrp r15 ; shl1addx r5, r6, r7 ; st4 r25, r26 } + { jrp r15 ; shl3add r5, r6, r7 ; ld r25, r26 } + { jrp r15 ; shli r5, r6, 5 ; ld1u r25, r26 } + { jrp r15 ; shrsi r5, r6, 5 ; ld1u r25, r26 } + { jrp r15 ; shrui r5, r6, 5 ; ld2u r25, r26 } + { jrp r15 ; st r25, r26 ; move r5, r6 } + { jrp r15 ; st r25, r26 } + { jrp r15 ; st1 r25, r26 ; revbits r5, r6 } + { jrp r15 ; st2 r25, r26 ; cmpne r5, r6, r7 } + { jrp r15 ; st2 r25, r26 ; subx r5, r6, r7 } + { jrp r15 ; st4 r25, r26 ; mulx r5, r6, r7 } + { jrp r15 ; sub r5, r6, r7 ; prefetch_l2 r25 } + { jrp r15 ; tblidxb0 r5, r6 ; prefetch_l2_fault r25 } + { jrp r15 ; tblidxb2 r5, r6 ; prefetch_l3_fault r25 } + { jrp r15 ; v1ddotpua r5, r6, r7 } + { jrp r15 ; v2cmpltsi r5, r6, 5 } + { jrp r15 ; v4shrs r5, r6, r7 } + { ld r15, r16 ; cmpeqi r5, r6, 5 } + { ld r15, r16 ; mm r5, r6, 5, 7 } + { ld r15, r16 ; shl1addx r5, r6, r7 } + { ld r15, r16 ; v1dotp r5, r6, r7 } + { ld r15, r16 ; v2cmpne r5, r6, r7 } + { ld r15, r16 ; v4subsc r5, r6, r7 } + { ld r25, r26 ; add r15, r16, r17 ; or r5, r6, r7 } + { ld r25, r26 ; add r5, r6, r7 ; fnop } + { ld r25, r26 ; addi r15, r16, 5 ; cmoveqz r5, r6, r7 } + { ld r25, r26 ; addi r15, r16, 5 ; shl2addx r5, r6, r7 } + { ld r25, r26 ; addi r5, r6, 5 ; movei r15, 5 } + { ld r25, r26 ; addx r15, r16, r17 ; ctz r5, r6 } + { ld r25, r26 ; addx r15, r16, r17 ; tblidxb0 r5, r6 } + { ld r25, r26 ; addx r5, r6, r7 ; shl2add r15, r16, r17 } + { ld r25, r26 ; addxi r15, r16, 5 ; mul_lu_lu r5, r6, r7 } + { ld r25, r26 ; addxi r5, r6, 5 ; and r15, r16, r17 } + { ld r25, r26 ; addxi r5, r6, 5 ; subx r15, r16, r17 } + { ld r25, r26 ; and r15, r16, r17 ; or r5, r6, r7 } + { ld r25, r26 ; and r5, r6, r7 ; fnop } + { ld r25, r26 ; andi r15, r16, 5 ; cmoveqz r5, r6, r7 } + { ld r25, r26 ; andi r15, r16, 5 ; shl2addx r5, r6, r7 } + { ld r25, r26 ; andi r5, r6, 5 ; movei r15, 5 } + { ld r25, r26 ; clz r5, r6 ; jalr r15 } + { ld r25, r26 ; cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 } + { ld r25, r26 ; cmovnez r5, r6, r7 ; addxi r15, r16, 5 } + { ld r25, r26 ; cmovnez r5, r6, r7 ; sub r15, r16, r17 } + { ld r25, r26 ; cmpeq r15, r16, r17 ; nor r5, r6, r7 } + { ld r25, r26 ; cmpeq r5, r6, r7 ; cmpne r15, r16, r17 } + { ld r25, r26 ; cmpeqi r15, r16, 5 ; clz r5, r6 } + { ld r25, r26 ; cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 } + { ld r25, r26 ; cmpeqi r5, r6, 5 ; move r15, r16 } + { ld r25, r26 ; cmples r15, r16, r17 ; cmpne r5, r6, r7 } + { ld r25, r26 ; cmples r15, r16, r17 ; subx r5, r6, r7 } + { ld r25, r26 ; cmples r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld r25, r26 ; cmpleu r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld r25, r26 ; cmpleu r5, r6, r7 ; addxi r15, r16, 5 } + { ld r25, r26 ; cmpleu r5, r6, r7 ; sub r15, r16, r17 } + { ld r25, r26 ; cmplts r15, r16, r17 ; nor r5, r6, r7 } + { ld r25, r26 ; cmplts r5, r6, r7 ; cmpne r15, r16, r17 } + { ld r25, r26 ; cmpltsi r15, r16, 5 ; clz r5, r6 } + { ld r25, r26 ; cmpltsi r15, r16, 5 ; shl2add r5, r6, r7 } + { ld r25, r26 ; cmpltsi r5, r6, 5 ; move r15, r16 } + { ld r25, r26 ; cmpltu r15, r16, r17 ; cmpne r5, r6, r7 } + { ld r25, r26 ; cmpltu r15, r16, r17 ; subx r5, r6, r7 } + { ld r25, r26 ; cmpltu r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld r25, r26 ; cmpne r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld r25, r26 ; cmpne r5, r6, r7 ; addxi r15, r16, 5 } + { ld r25, r26 ; cmpne r5, r6, r7 ; sub r15, r16, r17 } + { ld r25, r26 ; ctz r5, r6 ; shl3add r15, r16, r17 } + { ld r25, r26 ; fnop ; cmpne r15, r16, r17 } + { ld r25, r26 ; fnop ; rotli r15, r16, 5 } + { ld r25, r26 ; fsingle_pack1 r5, r6 ; addxi r15, r16, 5 } + { ld r25, r26 ; fsingle_pack1 r5, r6 ; sub r15, r16, r17 } + { ld r25, r26 ; ill ; nor r5, r6, r7 } + { ld r25, r26 ; info 19 ; cmoveqz r5, r6, r7 } + { ld r25, r26 ; info 19 ; mula_ls_ls r5, r6, r7 } + { ld r25, r26 ; info 19 ; shrui r15, r16, 5 } + { ld r25, r26 ; jalr r15 ; mul_lu_lu r5, r6, r7 } + { ld r25, r26 ; jalrp r15 ; and r5, r6, r7 } + { ld r25, r26 ; jalrp r15 ; shl1add r5, r6, r7 } + { ld r25, r26 ; jr r15 ; mnz r5, r6, r7 } + { ld r25, r26 ; jr r15 ; xor r5, r6, r7 } + { ld r25, r26 ; jrp r15 ; pcnt r5, r6 } + { ld r25, r26 ; lnk r15 ; cmpltu r5, r6, r7 } + { ld r25, r26 ; lnk r15 ; sub r5, r6, r7 } + { ld r25, r26 ; mnz r15, r16, r17 ; mulax r5, r6, r7 } + { ld r25, r26 ; mnz r5, r6, r7 ; cmpleu r15, r16, r17 } + { ld r25, r26 ; move r15, r16 ; addx r5, r6, r7 } + { ld r25, r26 ; move r15, r16 ; rotli r5, r6, 5 } + { ld r25, r26 ; move r5, r6 ; jr r15 } + { ld r25, r26 ; movei r15, 5 ; cmpleu r5, r6, r7 } + { ld r25, r26 ; movei r15, 5 ; shrsi r5, r6, 5 } + { ld r25, r26 ; movei r5, 5 ; rotl r15, r16, r17 } + { ld r25, r26 ; mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 } + { ld r25, r26 ; mul_hu_hu r5, r6, r7 ; ill } + { ld r25, r26 ; mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 } + { ld r25, r26 ; mul_lu_lu r5, r6, r7 ; addi r15, r16, 5 } + { ld r25, r26 ; mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 } + { ld r25, r26 ; mula_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 } + { ld r25, r26 ; mula_hu_hu r5, r6, r7 ; nor r15, r16, r17 } + { ld r25, r26 ; mula_ls_ls r5, r6, r7 ; jrp r15 } + { ld r25, r26 ; mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 } + { ld r25, r26 ; mulax r5, r6, r7 ; cmpeq r15, r16, r17 } + { ld r25, r26 ; mulax r5, r6, r7 } + { ld r25, r26 ; mulx r5, r6, r7 ; shrs r15, r16, r17 } + { ld r25, r26 ; mz r15, r16, r17 ; mulax r5, r6, r7 } + { ld r25, r26 ; mz r5, r6, r7 ; cmpleu r15, r16, r17 } + { ld r25, r26 ; nop ; addi r15, r16, 5 } + { ld r25, r26 ; nop ; mnz r5, r6, r7 } + { ld r25, r26 ; nop ; shl3add r5, r6, r7 } + { ld r25, r26 ; nor r15, r16, r17 ; cmpne r5, r6, r7 } + { ld r25, r26 ; nor r15, r16, r17 ; subx r5, r6, r7 } + { ld r25, r26 ; nor r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld r25, r26 ; or r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld r25, r26 ; or r5, r6, r7 ; addxi r15, r16, 5 } + { ld r25, r26 ; or r5, r6, r7 ; sub r15, r16, r17 } + { ld r25, r26 ; pcnt r5, r6 ; shl3add r15, r16, r17 } + { ld r25, r26 ; revbits r5, r6 ; rotl r15, r16, r17 } + { ld r25, r26 ; revbytes r5, r6 ; mnz r15, r16, r17 } + { ld r25, r26 ; rotl r15, r16, r17 ; cmpltu r5, r6, r7 } + { ld r25, r26 ; rotl r15, r16, r17 ; sub r5, r6, r7 } + { ld r25, r26 ; rotl r5, r6, r7 ; shl1add r15, r16, r17 } + { ld r25, r26 ; rotli r15, r16, 5 ; mul_hu_hu r5, r6, r7 } + { ld r25, r26 ; rotli r5, r6, 5 ; addx r15, r16, r17 } + { ld r25, r26 ; rotli r5, r6, 5 ; shrui r15, r16, 5 } + { ld r25, r26 ; shl r15, r16, r17 ; nop } + { ld r25, r26 ; shl r5, r6, r7 ; cmpltu r15, r16, r17 } + { ld r25, r26 ; shl1add r15, r16, r17 ; andi r5, r6, 5 } + { ld r25, r26 ; shl1add r15, r16, r17 ; shl1addx r5, r6, r7 } + { ld r25, r26 ; shl1add r5, r6, r7 ; mnz r15, r16, r17 } + { ld r25, r26 ; shl1addx r15, r16, r17 ; cmpltu r5, r6, r7 } + { ld r25, r26 ; shl1addx r15, r16, r17 ; sub r5, r6, r7 } + { ld r25, r26 ; shl1addx r5, r6, r7 ; shl1add r15, r16, r17 } + { ld r25, r26 ; shl2add r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { ld r25, r26 ; shl2add r5, r6, r7 ; addx r15, r16, r17 } + { ld r25, r26 ; shl2add r5, r6, r7 ; shrui r15, r16, 5 } + { ld r25, r26 ; shl2addx r15, r16, r17 ; nop } + { ld r25, r26 ; shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 } + { ld r25, r26 ; shl3add r15, r16, r17 ; andi r5, r6, 5 } + { ld r25, r26 ; shl3add r15, r16, r17 ; shl1addx r5, r6, r7 } + { ld r25, r26 ; shl3add r5, r6, r7 ; mnz r15, r16, r17 } + { ld r25, r26 ; shl3addx r15, r16, r17 ; cmpltu r5, r6, r7 } + { ld r25, r26 ; shl3addx r15, r16, r17 ; sub r5, r6, r7 } + { ld r25, r26 ; shl3addx r5, r6, r7 ; shl1add r15, r16, r17 } + { ld r25, r26 ; shli r15, r16, 5 ; mul_hu_hu r5, r6, r7 } + { ld r25, r26 ; shli r5, r6, 5 ; addx r15, r16, r17 } + { ld r25, r26 ; shli r5, r6, 5 ; shrui r15, r16, 5 } + { ld r25, r26 ; shrs r15, r16, r17 ; nop } + { ld r25, r26 ; shrs r5, r6, r7 ; cmpltu r15, r16, r17 } + { ld r25, r26 ; shrsi r15, r16, 5 ; andi r5, r6, 5 } + { ld r25, r26 ; shrsi r15, r16, 5 ; shl1addx r5, r6, r7 } + { ld r25, r26 ; shrsi r5, r6, 5 ; mnz r15, r16, r17 } + { ld r25, r26 ; shru r15, r16, r17 ; cmpltu r5, r6, r7 } + { ld r25, r26 ; shru r15, r16, r17 ; sub r5, r6, r7 } + { ld r25, r26 ; shru r5, r6, r7 ; shl1add r15, r16, r17 } + { ld r25, r26 ; shrui r15, r16, 5 ; mul_hu_hu r5, r6, r7 } + { ld r25, r26 ; shrui r5, r6, 5 ; addx r15, r16, r17 } + { ld r25, r26 ; shrui r5, r6, 5 ; shrui r15, r16, 5 } + { ld r25, r26 ; sub r15, r16, r17 ; nop } + { ld r25, r26 ; sub r5, r6, r7 ; cmpltu r15, r16, r17 } + { ld r25, r26 ; subx r15, r16, r17 ; andi r5, r6, 5 } + { ld r25, r26 ; subx r15, r16, r17 ; shl1addx r5, r6, r7 } + { ld r25, r26 ; subx r5, r6, r7 ; mnz r15, r16, r17 } + { ld r25, r26 ; tblidxb0 r5, r6 ; ill } + { ld r25, r26 ; tblidxb1 r5, r6 ; cmples r15, r16, r17 } + { ld r25, r26 ; tblidxb2 r5, r6 ; addi r15, r16, 5 } + { ld r25, r26 ; tblidxb2 r5, r6 ; shru r15, r16, r17 } + { ld r25, r26 ; tblidxb3 r5, r6 ; shl2add r15, r16, r17 } + { ld r25, r26 ; xor r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { ld r25, r26 ; xor r5, r6, r7 ; and r15, r16, r17 } + { ld r25, r26 ; xor r5, r6, r7 ; subx r15, r16, r17 } + { ld1s r15, r16 ; dblalign6 r5, r6, r7 } + { ld1s r15, r16 ; mula_hu_lu r5, r6, r7 } + { ld1s r15, r16 ; tblidxb3 r5, r6 } + { ld1s r15, r16 ; v1shrs r5, r6, r7 } + { ld1s r15, r16 ; v2shl r5, r6, r7 } + { ld1s r25, r26 ; add r15, r16, r17 ; fnop } + { ld1s r25, r26 ; add r15, r16, r17 ; tblidxb1 r5, r6 } + { ld1s r25, r26 ; add r5, r6, r7 ; shl2addx r15, r16, r17 } + { ld1s r25, r26 ; addi r15, r16, 5 ; mula_hs_hs r5, r6, r7 } + { ld1s r25, r26 ; addi r5, r6, 5 ; andi r15, r16, 5 } + { ld1s r25, r26 ; addi r5, r6, 5 ; xor r15, r16, r17 } + { ld1s r25, r26 ; addx r15, r16, r17 ; pcnt r5, r6 } + { ld1s r25, r26 ; addx r5, r6, r7 ; ill } + { ld1s r25, r26 ; addxi r15, r16, 5 ; cmovnez r5, r6, r7 } + { ld1s r25, r26 ; addxi r15, r16, 5 ; shl3add r5, r6, r7 } + { ld1s r25, r26 ; addxi r5, r6, 5 ; mz r15, r16, r17 } + { ld1s r25, r26 ; and r15, r16, r17 ; fnop } + { ld1s r25, r26 ; and r15, r16, r17 ; tblidxb1 r5, r6 } + { ld1s r25, r26 ; and r5, r6, r7 ; shl2addx r15, r16, r17 } + { ld1s r25, r26 ; andi r15, r16, 5 ; mula_hs_hs r5, r6, r7 } + { ld1s r25, r26 ; andi r5, r6, 5 ; andi r15, r16, 5 } + { ld1s r25, r26 ; andi r5, r6, 5 ; xor r15, r16, r17 } + { ld1s r25, r26 ; clz r5, r6 ; shli r15, r16, 5 } + { ld1s r25, r26 ; cmoveqz r5, r6, r7 ; shl r15, r16, r17 } + { ld1s r25, r26 ; cmovnez r5, r6, r7 ; movei r15, 5 } + { ld1s r25, r26 ; cmpeq r15, r16, r17 ; ctz r5, r6 } + { ld1s r25, r26 ; cmpeq r15, r16, r17 ; tblidxb0 r5, r6 } + { ld1s r25, r26 ; cmpeq r5, r6, r7 ; shl2add r15, r16, r17 } + { ld1s r25, r26 ; cmpeqi r15, r16, 5 ; mul_lu_lu r5, r6, r7 } + { ld1s r25, r26 ; cmpeqi r5, r6, 5 ; and r15, r16, r17 } + { ld1s r25, r26 ; cmpeqi r5, r6, 5 ; subx r15, r16, r17 } + { ld1s r25, r26 ; cmples r15, r16, r17 ; or r5, r6, r7 } + { ld1s r25, r26 ; cmples r5, r6, r7 ; fnop } + { ld1s r25, r26 ; cmpleu r15, r16, r17 ; cmoveqz r5, r6, r7 } + { ld1s r25, r26 ; cmpleu r15, r16, r17 ; shl2addx r5, r6, r7 } + { ld1s r25, r26 ; cmpleu r5, r6, r7 ; movei r15, 5 } + { ld1s r25, r26 ; cmplts r15, r16, r17 ; ctz r5, r6 } + { ld1s r25, r26 ; cmplts r15, r16, r17 ; tblidxb0 r5, r6 } + { ld1s r25, r26 ; cmplts r5, r6, r7 ; shl2add r15, r16, r17 } + { ld1s r25, r26 ; cmpltsi r15, r16, 5 ; mul_lu_lu r5, r6, r7 } + { ld1s r25, r26 ; cmpltsi r5, r6, 5 ; and r15, r16, r17 } + { ld1s r25, r26 ; cmpltsi r5, r6, 5 ; subx r15, r16, r17 } + { ld1s r25, r26 ; cmpltu r15, r16, r17 ; or r5, r6, r7 } + { ld1s r25, r26 ; cmpltu r5, r6, r7 ; fnop } + { ld1s r25, r26 ; cmpne r15, r16, r17 ; cmoveqz r5, r6, r7 } + { ld1s r25, r26 ; cmpne r15, r16, r17 ; shl2addx r5, r6, r7 } + { ld1s r25, r26 ; cmpne r5, r6, r7 ; movei r15, 5 } + { ld1s r25, r26 ; ctz r5, r6 ; jalr r15 } + { ld1s r25, r26 ; fnop ; andi r15, r16, 5 } + { ld1s r25, r26 ; fnop ; mul_lu_lu r5, r6, r7 } + { ld1s r25, r26 ; fnop ; shrsi r5, r6, 5 } + { ld1s r25, r26 ; fsingle_pack1 r5, r6 ; movei r15, 5 } + { ld1s r25, r26 ; ill ; ctz r5, r6 } + { ld1s r25, r26 ; ill ; tblidxb0 r5, r6 } + { ld1s r25, r26 ; info 19 ; ill } + { ld1s r25, r26 ; info 19 ; shl1add r5, r6, r7 } + { ld1s r25, r26 ; jalr r15 ; cmovnez r5, r6, r7 } + { ld1s r25, r26 ; jalr r15 ; shl3add r5, r6, r7 } + { ld1s r25, r26 ; jalrp r15 ; mul_hu_hu r5, r6, r7 } + { ld1s r25, r26 ; jr r15 ; addx r5, r6, r7 } + { ld1s r25, r26 ; jr r15 ; rotli r5, r6, 5 } + { ld1s r25, r26 ; jrp r15 ; fsingle_pack1 r5, r6 } + { ld1s r25, r26 ; jrp r15 ; tblidxb2 r5, r6 } + { ld1s r25, r26 ; lnk r15 ; nor r5, r6, r7 } + { ld1s r25, r26 ; mnz r15, r16, r17 ; cmplts r5, r6, r7 } + { ld1s r25, r26 ; mnz r15, r16, r17 ; shru r5, r6, r7 } + { ld1s r25, r26 ; mnz r5, r6, r7 ; rotli r15, r16, 5 } + { ld1s r25, r26 ; move r15, r16 ; movei r5, 5 } + { ld1s r25, r26 ; move r5, r6 ; add r15, r16, r17 } + { ld1s r25, r26 ; move r5, r6 ; shrsi r15, r16, 5 } + { ld1s r25, r26 ; movei r15, 5 ; mulx r5, r6, r7 } + { ld1s r25, r26 ; movei r5, 5 ; cmplts r15, r16, r17 } + { ld1s r25, r26 ; mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 } + { ld1s r25, r26 ; mul_hs_hs r5, r6, r7 ; sub r15, r16, r17 } + { ld1s r25, r26 ; mul_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 } + { ld1s r25, r26 ; mul_ls_ls r5, r6, r7 ; rotl r15, r16, r17 } + { ld1s r25, r26 ; mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 } + { ld1s r25, r26 ; mula_hs_hs r5, r6, r7 ; ill } + { ld1s r25, r26 ; mula_hu_hu r5, r6, r7 ; cmples r15, r16, r17 } + { ld1s r25, r26 ; mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 } + { ld1s r25, r26 ; mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 } + { ld1s r25, r26 ; mula_lu_lu r5, r6, r7 ; shl2add r15, r16, r17 } + { ld1s r25, r26 ; mulax r5, r6, r7 ; nor r15, r16, r17 } + { ld1s r25, r26 ; mulx r5, r6, r7 ; jrp r15 } + { ld1s r25, r26 ; mz r15, r16, r17 ; cmplts r5, r6, r7 } + { ld1s r25, r26 ; mz r15, r16, r17 ; shru r5, r6, r7 } + { ld1s r25, r26 ; mz r5, r6, r7 ; rotli r15, r16, 5 } + { ld1s r25, r26 ; nop ; cmplts r15, r16, r17 } + { ld1s r25, r26 ; nop ; or r5, r6, r7 } + { ld1s r25, r26 ; nop ; xor r15, r16, r17 } + { ld1s r25, r26 ; nor r15, r16, r17 ; or r5, r6, r7 } + { ld1s r25, r26 ; nor r5, r6, r7 ; fnop } + { ld1s r25, r26 ; or r15, r16, r17 ; cmoveqz r5, r6, r7 } + { ld1s r25, r26 ; or r15, r16, r17 ; shl2addx r5, r6, r7 } + { ld1s r25, r26 ; or r5, r6, r7 ; movei r15, 5 } + { ld1s r25, r26 ; pcnt r5, r6 ; jalr r15 } + { ld1s r25, r26 ; revbits r5, r6 ; cmplts r15, r16, r17 } + { ld1s r25, r26 ; revbytes r5, r6 ; addxi r15, r16, 5 } + { ld1s r25, r26 ; revbytes r5, r6 ; sub r15, r16, r17 } + { ld1s r25, r26 ; rotl r15, r16, r17 ; nor r5, r6, r7 } + { ld1s r25, r26 ; rotl r5, r6, r7 ; cmpne r15, r16, r17 } + { ld1s r25, r26 ; rotli r15, r16, 5 ; clz r5, r6 } + { ld1s r25, r26 ; rotli r15, r16, 5 ; shl2add r5, r6, r7 } + { ld1s r25, r26 ; rotli r5, r6, 5 ; move r15, r16 } + { ld1s r25, r26 ; shl r15, r16, r17 ; cmpne r5, r6, r7 } + { ld1s r25, r26 ; shl r15, r16, r17 ; subx r5, r6, r7 } + { ld1s r25, r26 ; shl r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld1s r25, r26 ; shl1add r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld1s r25, r26 ; shl1add r5, r6, r7 ; addxi r15, r16, 5 } + { ld1s r25, r26 ; shl1add r5, r6, r7 ; sub r15, r16, r17 } + { ld1s r25, r26 ; shl1addx r15, r16, r17 ; nor r5, r6, r7 } + { ld1s r25, r26 ; shl1addx r5, r6, r7 ; cmpne r15, r16, r17 } + { ld1s r25, r26 ; shl2add r15, r16, r17 ; clz r5, r6 } + { ld1s r25, r26 ; shl2add r15, r16, r17 ; shl2add r5, r6, r7 } + { ld1s r25, r26 ; shl2add r5, r6, r7 ; move r15, r16 } + { ld1s r25, r26 ; shl2addx r15, r16, r17 ; cmpne r5, r6, r7 } + { ld1s r25, r26 ; shl2addx r15, r16, r17 ; subx r5, r6, r7 } + { ld1s r25, r26 ; shl2addx r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld1s r25, r26 ; shl3add r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld1s r25, r26 ; shl3add r5, r6, r7 ; addxi r15, r16, 5 } + { ld1s r25, r26 ; shl3add r5, r6, r7 ; sub r15, r16, r17 } + { ld1s r25, r26 ; shl3addx r15, r16, r17 ; nor r5, r6, r7 } + { ld1s r25, r26 ; shl3addx r5, r6, r7 ; cmpne r15, r16, r17 } + { ld1s r25, r26 ; shli r15, r16, 5 ; clz r5, r6 } + { ld1s r25, r26 ; shli r15, r16, 5 ; shl2add r5, r6, r7 } + { ld1s r25, r26 ; shli r5, r6, 5 ; move r15, r16 } + { ld1s r25, r26 ; shrs r15, r16, r17 ; cmpne r5, r6, r7 } + { ld1s r25, r26 ; shrs r15, r16, r17 ; subx r5, r6, r7 } + { ld1s r25, r26 ; shrs r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld1s r25, r26 ; shrsi r15, r16, 5 ; mul_ls_ls r5, r6, r7 } + { ld1s r25, r26 ; shrsi r5, r6, 5 ; addxi r15, r16, 5 } + { ld1s r25, r26 ; shrsi r5, r6, 5 ; sub r15, r16, r17 } + { ld1s r25, r26 ; shru r15, r16, r17 ; nor r5, r6, r7 } + { ld1s r25, r26 ; shru r5, r6, r7 ; cmpne r15, r16, r17 } + { ld1s r25, r26 ; shrui r15, r16, 5 ; clz r5, r6 } + { ld1s r25, r26 ; shrui r15, r16, 5 ; shl2add r5, r6, r7 } + { ld1s r25, r26 ; shrui r5, r6, 5 ; move r15, r16 } + { ld1s r25, r26 ; sub r15, r16, r17 ; cmpne r5, r6, r7 } + { ld1s r25, r26 ; sub r15, r16, r17 ; subx r5, r6, r7 } + { ld1s r25, r26 ; sub r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld1s r25, r26 ; subx r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld1s r25, r26 ; subx r5, r6, r7 ; addxi r15, r16, 5 } + { ld1s r25, r26 ; subx r5, r6, r7 ; sub r15, r16, r17 } + { ld1s r25, r26 ; tblidxb0 r5, r6 ; shl3add r15, r16, r17 } + { ld1s r25, r26 ; tblidxb1 r5, r6 ; rotl r15, r16, r17 } + { ld1s r25, r26 ; tblidxb2 r5, r6 ; mnz r15, r16, r17 } + { ld1s r25, r26 ; tblidxb3 r5, r6 ; ill } + { ld1s r25, r26 ; xor r15, r16, r17 ; cmovnez r5, r6, r7 } + { ld1s r25, r26 ; xor r15, r16, r17 ; shl3add r5, r6, r7 } + { ld1s r25, r26 ; xor r5, r6, r7 ; mz r15, r16, r17 } + { ld1s_add r15, r16, 5 ; cmpleu r5, r6, r7 } + { ld1s_add r15, r16, 5 ; move r5, r6 } + { ld1s_add r15, r16, 5 ; shl2addx r5, r6, r7 } + { ld1s_add r15, r16, 5 ; v1dotpu r5, r6, r7 } + { ld1s_add r15, r16, 5 ; v2dotpa r5, r6, r7 } + { ld1s_add r15, r16, 5 ; xori r5, r6, 5 } + { ld1u r15, r16 ; fdouble_addsub r5, r6, r7 } + { ld1u r15, r16 ; mula_ls_lu r5, r6, r7 } + { ld1u r15, r16 ; v1addi r5, r6, 5 } + { ld1u r15, r16 ; v1shru r5, r6, r7 } + { ld1u r15, r16 ; v2shlsc r5, r6, r7 } + { ld1u r25, r26 ; add r15, r16, r17 ; info 19 } + { ld1u r25, r26 ; add r15, r16, r17 ; tblidxb3 r5, r6 } + { ld1u r25, r26 ; add r5, r6, r7 ; shl3addx r15, r16, r17 } + { ld1u r25, r26 ; addi r15, r16, 5 ; mula_ls_ls r5, r6, r7 } + { ld1u r25, r26 ; addi r5, r6, 5 ; cmpeqi r15, r16, 5 } + { ld1u r25, r26 ; addx r15, r16, r17 ; add r5, r6, r7 } + { ld1u r25, r26 ; addx r15, r16, r17 ; revbytes r5, r6 } + { ld1u r25, r26 ; addx r5, r6, r7 ; jalr r15 } + { ld1u r25, r26 ; addxi r15, r16, 5 ; cmpeqi r5, r6, 5 } + { ld1u r25, r26 ; addxi r15, r16, 5 ; shli r5, r6, 5 } + { ld1u r25, r26 ; addxi r5, r6, 5 ; nor r15, r16, r17 } + { ld1u r25, r26 ; and r15, r16, r17 ; info 19 } + { ld1u r25, r26 ; and r15, r16, r17 ; tblidxb3 r5, r6 } + { ld1u r25, r26 ; and r5, r6, r7 ; shl3addx r15, r16, r17 } + { ld1u r25, r26 ; andi r15, r16, 5 ; mula_ls_ls r5, r6, r7 } + { ld1u r25, r26 ; andi r5, r6, 5 ; cmpeqi r15, r16, 5 } + { ld1u r25, r26 ; clz r5, r6 ; add r15, r16, r17 } + { ld1u r25, r26 ; clz r5, r6 ; shrsi r15, r16, 5 } + { ld1u r25, r26 ; cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld1u r25, r26 ; cmovnez r5, r6, r7 ; nop } + { ld1u r25, r26 ; cmpeq r15, r16, r17 ; fsingle_pack1 r5, r6 } + { ld1u r25, r26 ; cmpeq r15, r16, r17 ; tblidxb2 r5, r6 } + { ld1u r25, r26 ; cmpeq r5, r6, r7 ; shl3add r15, r16, r17 } + { ld1u r25, r26 ; cmpeqi r15, r16, 5 ; mula_hu_hu r5, r6, r7 } + { ld1u r25, r26 ; cmpeqi r5, r6, 5 ; cmpeq r15, r16, r17 } + { ld1u r25, r26 ; cmpeqi r5, r6, 5 } + { ld1u r25, r26 ; cmples r15, r16, r17 ; revbits r5, r6 } + { ld1u r25, r26 ; cmples r5, r6, r7 ; info 19 } + { ld1u r25, r26 ; cmpleu r15, r16, r17 ; cmpeq r5, r6, r7 } + { ld1u r25, r26 ; cmpleu r15, r16, r17 ; shl3addx r5, r6, r7 } + { ld1u r25, r26 ; cmpleu r5, r6, r7 ; nop } + { ld1u r25, r26 ; cmplts r15, r16, r17 ; fsingle_pack1 r5, r6 } + { ld1u r25, r26 ; cmplts r15, r16, r17 ; tblidxb2 r5, r6 } + { ld1u r25, r26 ; cmplts r5, r6, r7 ; shl3add r15, r16, r17 } + { ld1u r25, r26 ; cmpltsi r15, r16, 5 ; mula_hu_hu r5, r6, r7 } + { ld1u r25, r26 ; cmpltsi r5, r6, 5 ; cmpeq r15, r16, r17 } + { ld1u r25, r26 ; cmpltsi r5, r6, 5 } + { ld1u r25, r26 ; cmpltu r15, r16, r17 ; revbits r5, r6 } + { ld1u r25, r26 ; cmpltu r5, r6, r7 ; info 19 } + { ld1u r25, r26 ; cmpne r15, r16, r17 ; cmpeq r5, r6, r7 } + { ld1u r25, r26 ; cmpne r15, r16, r17 ; shl3addx r5, r6, r7 } + { ld1u r25, r26 ; cmpne r5, r6, r7 ; nop } + { ld1u r25, r26 ; ctz r5, r6 ; jr r15 } + { ld1u r25, r26 ; fnop ; clz r5, r6 } + { ld1u r25, r26 ; fnop ; mula_hu_hu r5, r6, r7 } + { ld1u r25, r26 ; fnop ; shru r5, r6, r7 } + { ld1u r25, r26 ; fsingle_pack1 r5, r6 ; nop } + { ld1u r25, r26 ; ill ; fsingle_pack1 r5, r6 } + { ld1u r25, r26 ; ill ; tblidxb2 r5, r6 } + { ld1u r25, r26 ; info 19 ; jalr r15 } + { ld1u r25, r26 ; info 19 ; shl1addx r5, r6, r7 } + { ld1u r25, r26 ; jalr r15 ; cmpeqi r5, r6, 5 } + { ld1u r25, r26 ; jalr r15 ; shli r5, r6, 5 } + { ld1u r25, r26 ; jalrp r15 ; mul_lu_lu r5, r6, r7 } + { ld1u r25, r26 ; jr r15 ; and r5, r6, r7 } + { ld1u r25, r26 ; jr r15 ; shl1add r5, r6, r7 } + { ld1u r25, r26 ; jrp r15 ; mnz r5, r6, r7 } + { ld1u r25, r26 ; jrp r15 ; xor r5, r6, r7 } + { ld1u r25, r26 ; lnk r15 ; pcnt r5, r6 } + { ld1u r25, r26 ; mnz r15, r16, r17 ; cmpltu r5, r6, r7 } + { ld1u r25, r26 ; mnz r15, r16, r17 ; sub r5, r6, r7 } + { ld1u r25, r26 ; mnz r5, r6, r7 ; shl1add r15, r16, r17 } + { ld1u r25, r26 ; move r15, r16 ; mul_hu_hu r5, r6, r7 } + { ld1u r25, r26 ; move r5, r6 ; addx r15, r16, r17 } + { ld1u r25, r26 ; move r5, r6 ; shrui r15, r16, 5 } + { ld1u r25, r26 ; movei r15, 5 ; nop } + { ld1u r25, r26 ; movei r5, 5 ; cmpltu r15, r16, r17 } + { ld1u r25, r26 ; mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 } + { ld1u r25, r26 ; mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 } + { ld1u r25, r26 ; mul_hu_hu r5, r6, r7 ; shli r15, r16, 5 } + { ld1u r25, r26 ; mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 } + { ld1u r25, r26 ; mul_lu_lu r5, r6, r7 ; movei r15, 5 } + { ld1u r25, r26 ; mula_hs_hs r5, r6, r7 ; jalr r15 } + { ld1u r25, r26 ; mula_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 } + { ld1u r25, r26 ; mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 } + { ld1u r25, r26 ; mula_ls_ls r5, r6, r7 ; sub r15, r16, r17 } + { ld1u r25, r26 ; mula_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 } + { ld1u r25, r26 ; mulax r5, r6, r7 ; rotl r15, r16, r17 } + { ld1u r25, r26 ; mulx r5, r6, r7 ; mnz r15, r16, r17 } + { ld1u r25, r26 ; mz r15, r16, r17 ; cmpltu r5, r6, r7 } + { ld1u r25, r26 ; mz r15, r16, r17 ; sub r5, r6, r7 } + { ld1u r25, r26 ; mz r5, r6, r7 ; shl1add r15, r16, r17 } + { ld1u r25, r26 ; nop ; cmpltsi r15, r16, 5 } + { ld1u r25, r26 ; nop ; revbits r5, r6 } + { ld1u r25, r26 ; nop } + { ld1u r25, r26 ; nor r15, r16, r17 ; revbits r5, r6 } + { ld1u r25, r26 ; nor r5, r6, r7 ; info 19 } + { ld1u r25, r26 ; or r15, r16, r17 ; cmpeq r5, r6, r7 } + { ld1u r25, r26 ; or r15, r16, r17 ; shl3addx r5, r6, r7 } + { ld1u r25, r26 ; or r5, r6, r7 ; nop } + { ld1u r25, r26 ; pcnt r5, r6 ; jr r15 } + { ld1u r25, r26 ; revbits r5, r6 ; cmpltu r15, r16, r17 } + { ld1u r25, r26 ; revbytes r5, r6 ; andi r15, r16, 5 } + { ld1u r25, r26 ; revbytes r5, r6 ; xor r15, r16, r17 } + { ld1u r25, r26 ; rotl r15, r16, r17 ; pcnt r5, r6 } + { ld1u r25, r26 ; rotl r5, r6, r7 ; ill } + { ld1u r25, r26 ; rotli r15, r16, 5 ; cmovnez r5, r6, r7 } + { ld1u r25, r26 ; rotli r15, r16, 5 ; shl3add r5, r6, r7 } + { ld1u r25, r26 ; rotli r5, r6, 5 ; mz r15, r16, r17 } + { ld1u r25, r26 ; shl r15, r16, r17 ; fnop } + { ld1u r25, r26 ; shl r15, r16, r17 ; tblidxb1 r5, r6 } + { ld1u r25, r26 ; shl r5, r6, r7 ; shl2addx r15, r16, r17 } + { ld1u r25, r26 ; shl1add r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { ld1u r25, r26 ; shl1add r5, r6, r7 ; andi r15, r16, 5 } + { ld1u r25, r26 ; shl1add r5, r6, r7 ; xor r15, r16, r17 } + { ld1u r25, r26 ; shl1addx r15, r16, r17 ; pcnt r5, r6 } + { ld1u r25, r26 ; shl1addx r5, r6, r7 ; ill } + { ld1u r25, r26 ; shl2add r15, r16, r17 ; cmovnez r5, r6, r7 } + { ld1u r25, r26 ; shl2add r15, r16, r17 ; shl3add r5, r6, r7 } + { ld1u r25, r26 ; shl2add r5, r6, r7 ; mz r15, r16, r17 } + { ld1u r25, r26 ; shl2addx r15, r16, r17 ; fnop } + { ld1u r25, r26 ; shl2addx r15, r16, r17 ; tblidxb1 r5, r6 } + { ld1u r25, r26 ; shl2addx r5, r6, r7 ; shl2addx r15, r16, r17 } + { ld1u r25, r26 ; shl3add r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { ld1u r25, r26 ; shl3add r5, r6, r7 ; andi r15, r16, 5 } + { ld1u r25, r26 ; shl3add r5, r6, r7 ; xor r15, r16, r17 } + { ld1u r25, r26 ; shl3addx r15, r16, r17 ; pcnt r5, r6 } + { ld1u r25, r26 ; shl3addx r5, r6, r7 ; ill } + { ld1u r25, r26 ; shli r15, r16, 5 ; cmovnez r5, r6, r7 } + { ld1u r25, r26 ; shli r15, r16, 5 ; shl3add r5, r6, r7 } + { ld1u r25, r26 ; shli r5, r6, 5 ; mz r15, r16, r17 } + { ld1u r25, r26 ; shrs r15, r16, r17 ; fnop } + { ld1u r25, r26 ; shrs r15, r16, r17 ; tblidxb1 r5, r6 } + { ld1u r25, r26 ; shrs r5, r6, r7 ; shl2addx r15, r16, r17 } + { ld1u r25, r26 ; shrsi r15, r16, 5 ; mula_hs_hs r5, r6, r7 } + { ld1u r25, r26 ; shrsi r5, r6, 5 ; andi r15, r16, 5 } + { ld1u r25, r26 ; shrsi r5, r6, 5 ; xor r15, r16, r17 } + { ld1u r25, r26 ; shru r15, r16, r17 ; pcnt r5, r6 } + { ld1u r25, r26 ; shru r5, r6, r7 ; ill } + { ld1u r25, r26 ; shrui r15, r16, 5 ; cmovnez r5, r6, r7 } + { ld1u r25, r26 ; shrui r15, r16, 5 ; shl3add r5, r6, r7 } + { ld1u r25, r26 ; shrui r5, r6, 5 ; mz r15, r16, r17 } + { ld1u r25, r26 ; sub r15, r16, r17 ; fnop } + { ld1u r25, r26 ; sub r15, r16, r17 ; tblidxb1 r5, r6 } + { ld1u r25, r26 ; sub r5, r6, r7 ; shl2addx r15, r16, r17 } + { ld1u r25, r26 ; subx r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { ld1u r25, r26 ; subx r5, r6, r7 ; andi r15, r16, 5 } + { ld1u r25, r26 ; subx r5, r6, r7 ; xor r15, r16, r17 } + { ld1u r25, r26 ; tblidxb0 r5, r6 ; shli r15, r16, 5 } + { ld1u r25, r26 ; tblidxb1 r5, r6 ; shl r15, r16, r17 } + { ld1u r25, r26 ; tblidxb2 r5, r6 ; movei r15, 5 } + { ld1u r25, r26 ; tblidxb3 r5, r6 ; jalr r15 } + { ld1u r25, r26 ; xor r15, r16, r17 ; cmpeqi r5, r6, 5 } + { ld1u r25, r26 ; xor r15, r16, r17 ; shli r5, r6, 5 } + { ld1u r25, r26 ; xor r5, r6, r7 ; nor r15, r16, r17 } + { ld1u_add r15, r16, 5 ; cmpltsi r5, r6, 5 } + { ld1u_add r15, r16, 5 ; moveli r5, 0x1234 } + { ld1u_add r15, r16, 5 ; shl3addx r5, r6, r7 } + { ld1u_add r15, r16, 5 ; v1dotpus r5, r6, r7 } + { ld1u_add r15, r16, 5 ; v2int_l r5, r6, r7 } + { ld2s r15, r16 ; addi r5, r6, 5 } + { ld2s r15, r16 ; fdouble_pack1 r5, r6, r7 } + { ld2s r15, r16 ; mulax r5, r6, r7 } + { ld2s r15, r16 ; v1adiffu r5, r6, r7 } + { ld2s r15, r16 ; v1sub r5, r6, r7 } + { ld2s r15, r16 ; v2shrsi r5, r6, 5 } + { ld2s r25, r26 ; add r15, r16, r17 ; move r5, r6 } + { ld2s r25, r26 ; add r15, r16, r17 } + { ld2s r25, r26 ; add r5, r6, r7 ; shrs r15, r16, r17 } + { ld2s r25, r26 ; addi r15, r16, 5 ; mulax r5, r6, r7 } + { ld2s r25, r26 ; addi r5, r6, 5 ; cmpleu r15, r16, r17 } + { ld2s r25, r26 ; addx r15, r16, r17 ; addx r5, r6, r7 } + { ld2s r25, r26 ; addx r15, r16, r17 ; rotli r5, r6, 5 } + { ld2s r25, r26 ; addx r5, r6, r7 ; jr r15 } + { ld2s r25, r26 ; addxi r15, r16, 5 ; cmpleu r5, r6, r7 } + { ld2s r25, r26 ; addxi r15, r16, 5 ; shrsi r5, r6, 5 } + { ld2s r25, r26 ; addxi r5, r6, 5 ; rotl r15, r16, r17 } + { ld2s r25, r26 ; and r15, r16, r17 ; move r5, r6 } + { ld2s r25, r26 ; and r15, r16, r17 } + { ld2s r25, r26 ; and r5, r6, r7 ; shrs r15, r16, r17 } + { ld2s r25, r26 ; andi r15, r16, 5 ; mulax r5, r6, r7 } + { ld2s r25, r26 ; andi r5, r6, 5 ; cmpleu r15, r16, r17 } + { ld2s r25, r26 ; clz r5, r6 ; addx r15, r16, r17 } + { ld2s r25, r26 ; clz r5, r6 ; shrui r15, r16, 5 } + { ld2s r25, r26 ; cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 } + { ld2s r25, r26 ; cmovnez r5, r6, r7 ; or r15, r16, r17 } + { ld2s r25, r26 ; cmpeq r15, r16, r17 ; mnz r5, r6, r7 } + { ld2s r25, r26 ; cmpeq r15, r16, r17 ; xor r5, r6, r7 } + { ld2s r25, r26 ; cmpeq r5, r6, r7 ; shli r15, r16, 5 } + { ld2s r25, r26 ; cmpeqi r15, r16, 5 ; mula_lu_lu r5, r6, r7 } + { ld2s r25, r26 ; cmpeqi r5, r6, 5 ; cmples r15, r16, r17 } + { ld2s r25, r26 ; cmples r15, r16, r17 ; addi r5, r6, 5 } + { ld2s r25, r26 ; cmples r15, r16, r17 ; rotl r5, r6, r7 } + { ld2s r25, r26 ; cmples r5, r6, r7 ; jalrp r15 } + { ld2s r25, r26 ; cmpleu r15, r16, r17 ; cmples r5, r6, r7 } + { ld2s r25, r26 ; cmpleu r15, r16, r17 ; shrs r5, r6, r7 } + { ld2s r25, r26 ; cmpleu r5, r6, r7 ; or r15, r16, r17 } + { ld2s r25, r26 ; cmplts r15, r16, r17 ; mnz r5, r6, r7 } + { ld2s r25, r26 ; cmplts r15, r16, r17 ; xor r5, r6, r7 } + { ld2s r25, r26 ; cmplts r5, r6, r7 ; shli r15, r16, 5 } + { ld2s r25, r26 ; cmpltsi r15, r16, 5 ; mula_lu_lu r5, r6, r7 } + { ld2s r25, r26 ; cmpltsi r5, r6, 5 ; cmples r15, r16, r17 } + { ld2s r25, r26 ; cmpltu r15, r16, r17 ; addi r5, r6, 5 } + { ld2s r25, r26 ; cmpltu r15, r16, r17 ; rotl r5, r6, r7 } + { ld2s r25, r26 ; cmpltu r5, r6, r7 ; jalrp r15 } + { ld2s r25, r26 ; cmpne r15, r16, r17 ; cmples r5, r6, r7 } + { ld2s r25, r26 ; cmpne r15, r16, r17 ; shrs r5, r6, r7 } + { ld2s r25, r26 ; cmpne r5, r6, r7 ; or r15, r16, r17 } + { ld2s r25, r26 ; ctz r5, r6 ; lnk r15 } + { ld2s r25, r26 ; fnop ; cmovnez r5, r6, r7 } + { ld2s r25, r26 ; fnop ; mula_lu_lu r5, r6, r7 } + { ld2s r25, r26 ; fnop ; shrui r5, r6, 5 } + { ld2s r25, r26 ; fsingle_pack1 r5, r6 ; or r15, r16, r17 } + { ld2s r25, r26 ; ill ; mnz r5, r6, r7 } + { ld2s r25, r26 ; ill ; xor r5, r6, r7 } + { ld2s r25, r26 ; info 19 ; jr r15 } + { ld2s r25, r26 ; info 19 ; shl2add r5, r6, r7 } + { ld2s r25, r26 ; jalr r15 ; cmpleu r5, r6, r7 } + { ld2s r25, r26 ; jalr r15 ; shrsi r5, r6, 5 } + { ld2s r25, r26 ; jalrp r15 ; mula_hu_hu r5, r6, r7 } + { ld2s r25, r26 ; jr r15 ; clz r5, r6 } + { ld2s r25, r26 ; jr r15 ; shl2add r5, r6, r7 } + { ld2s r25, r26 ; jrp r15 ; movei r5, 5 } + { ld2s r25, r26 ; lnk r15 ; add r5, r6, r7 } + { ld2s r25, r26 ; lnk r15 ; revbytes r5, r6 } + { ld2s r25, r26 ; mnz r15, r16, r17 ; ctz r5, r6 } + { ld2s r25, r26 ; mnz r15, r16, r17 ; tblidxb0 r5, r6 } + { ld2s r25, r26 ; mnz r5, r6, r7 ; shl2add r15, r16, r17 } + { ld2s r25, r26 ; move r15, r16 ; mul_lu_lu r5, r6, r7 } + { ld2s r25, r26 ; move r5, r6 ; and r15, r16, r17 } + { ld2s r25, r26 ; move r5, r6 ; subx r15, r16, r17 } + { ld2s r25, r26 ; movei r15, 5 ; or r5, r6, r7 } + { ld2s r25, r26 ; movei r5, 5 ; fnop } + { ld2s r25, r26 ; mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 } + { ld2s r25, r26 ; mul_hu_hu r5, r6, r7 ; add r15, r16, r17 } + { ld2s r25, r26 ; mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 } + { ld2s r25, r26 ; mul_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld2s r25, r26 ; mul_lu_lu r5, r6, r7 ; nop } + { ld2s r25, r26 ; mula_hs_hs r5, r6, r7 ; jr r15 } + { ld2s r25, r26 ; mula_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 } + { ld2s r25, r26 ; mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 } + { ld2s r25, r26 ; mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 } + { ld2s r25, r26 ; mula_lu_lu r5, r6, r7 ; shli r15, r16, 5 } + { ld2s r25, r26 ; mulax r5, r6, r7 ; shl r15, r16, r17 } + { ld2s r25, r26 ; mulx r5, r6, r7 ; movei r15, 5 } + { ld2s r25, r26 ; mz r15, r16, r17 ; ctz r5, r6 } + { ld2s r25, r26 ; mz r15, r16, r17 ; tblidxb0 r5, r6 } + { ld2s r25, r26 ; mz r5, r6, r7 ; shl2add r15, r16, r17 } + { ld2s r25, r26 ; nop ; cmpltu r15, r16, r17 } + { ld2s r25, r26 ; nop ; rotl r15, r16, r17 } + { ld2s r25, r26 ; nor r15, r16, r17 ; addi r5, r6, 5 } + { ld2s r25, r26 ; nor r15, r16, r17 ; rotl r5, r6, r7 } + { ld2s r25, r26 ; nor r5, r6, r7 ; jalrp r15 } + { ld2s r25, r26 ; or r15, r16, r17 ; cmples r5, r6, r7 } + { ld2s r25, r26 ; or r15, r16, r17 ; shrs r5, r6, r7 } + { ld2s r25, r26 ; or r5, r6, r7 ; or r15, r16, r17 } + { ld2s r25, r26 ; pcnt r5, r6 ; lnk r15 } + { ld2s r25, r26 ; revbits r5, r6 ; fnop } + { ld2s r25, r26 ; revbytes r5, r6 ; cmpeqi r15, r16, 5 } + { ld2s r25, r26 ; rotl r15, r16, r17 ; add r5, r6, r7 } + { ld2s r25, r26 ; rotl r15, r16, r17 ; revbytes r5, r6 } + { ld2s r25, r26 ; rotl r5, r6, r7 ; jalr r15 } + { ld2s r25, r26 ; rotli r15, r16, 5 ; cmpeqi r5, r6, 5 } + { ld2s r25, r26 ; rotli r15, r16, 5 ; shli r5, r6, 5 } + { ld2s r25, r26 ; rotli r5, r6, 5 ; nor r15, r16, r17 } + { ld2s r25, r26 ; shl r15, r16, r17 ; info 19 } + { ld2s r25, r26 ; shl r15, r16, r17 ; tblidxb3 r5, r6 } + { ld2s r25, r26 ; shl r5, r6, r7 ; shl3addx r15, r16, r17 } + { ld2s r25, r26 ; shl1add r15, r16, r17 ; mula_ls_ls r5, r6, r7 } + { ld2s r25, r26 ; shl1add r5, r6, r7 ; cmpeqi r15, r16, 5 } + { ld2s r25, r26 ; shl1addx r15, r16, r17 ; add r5, r6, r7 } + { ld2s r25, r26 ; shl1addx r15, r16, r17 ; revbytes r5, r6 } + { ld2s r25, r26 ; shl1addx r5, r6, r7 ; jalr r15 } + { ld2s r25, r26 ; shl2add r15, r16, r17 ; cmpeqi r5, r6, 5 } + { ld2s r25, r26 ; shl2add r15, r16, r17 ; shli r5, r6, 5 } + { ld2s r25, r26 ; shl2add r5, r6, r7 ; nor r15, r16, r17 } + { ld2s r25, r26 ; shl2addx r15, r16, r17 ; info 19 } + { ld2s r25, r26 ; shl2addx r15, r16, r17 ; tblidxb3 r5, r6 } + { ld2s r25, r26 ; shl2addx r5, r6, r7 ; shl3addx r15, r16, r17 } + { ld2s r25, r26 ; shl3add r15, r16, r17 ; mula_ls_ls r5, r6, r7 } + { ld2s r25, r26 ; shl3add r5, r6, r7 ; cmpeqi r15, r16, 5 } + { ld2s r25, r26 ; shl3addx r15, r16, r17 ; add r5, r6, r7 } + { ld2s r25, r26 ; shl3addx r15, r16, r17 ; revbytes r5, r6 } + { ld2s r25, r26 ; shl3addx r5, r6, r7 ; jalr r15 } + { ld2s r25, r26 ; shli r15, r16, 5 ; cmpeqi r5, r6, 5 } + { ld2s r25, r26 ; shli r15, r16, 5 ; shli r5, r6, 5 } + { ld2s r25, r26 ; shli r5, r6, 5 ; nor r15, r16, r17 } + { ld2s r25, r26 ; shrs r15, r16, r17 ; info 19 } + { ld2s r25, r26 ; shrs r15, r16, r17 ; tblidxb3 r5, r6 } + { ld2s r25, r26 ; shrs r5, r6, r7 ; shl3addx r15, r16, r17 } + { ld2s r25, r26 ; shrsi r15, r16, 5 ; mula_ls_ls r5, r6, r7 } + { ld2s r25, r26 ; shrsi r5, r6, 5 ; cmpeqi r15, r16, 5 } + { ld2s r25, r26 ; shru r15, r16, r17 ; add r5, r6, r7 } + { ld2s r25, r26 ; shru r15, r16, r17 ; revbytes r5, r6 } + { ld2s r25, r26 ; shru r5, r6, r7 ; jalr r15 } + { ld2s r25, r26 ; shrui r15, r16, 5 ; cmpeqi r5, r6, 5 } + { ld2s r25, r26 ; shrui r15, r16, 5 ; shli r5, r6, 5 } + { ld2s r25, r26 ; shrui r5, r6, 5 ; nor r15, r16, r17 } + { ld2s r25, r26 ; sub r15, r16, r17 ; info 19 } + { ld2s r25, r26 ; sub r15, r16, r17 ; tblidxb3 r5, r6 } + { ld2s r25, r26 ; sub r5, r6, r7 ; shl3addx r15, r16, r17 } + { ld2s r25, r26 ; subx r15, r16, r17 ; mula_ls_ls r5, r6, r7 } + { ld2s r25, r26 ; subx r5, r6, r7 ; cmpeqi r15, r16, 5 } + { ld2s r25, r26 ; tblidxb0 r5, r6 ; add r15, r16, r17 } + { ld2s r25, r26 ; tblidxb0 r5, r6 ; shrsi r15, r16, 5 } + { ld2s r25, r26 ; tblidxb1 r5, r6 ; shl1addx r15, r16, r17 } + { ld2s r25, r26 ; tblidxb2 r5, r6 ; nop } + { ld2s r25, r26 ; tblidxb3 r5, r6 ; jr r15 } + { ld2s r25, r26 ; xor r15, r16, r17 ; cmpleu r5, r6, r7 } + { ld2s r25, r26 ; xor r15, r16, r17 ; shrsi r5, r6, 5 } + { ld2s r25, r26 ; xor r5, r6, r7 ; rotl r15, r16, r17 } + { ld2s_add r15, r16, 5 ; cmpltui r5, r6, 5 } + { ld2s_add r15, r16, 5 ; mul_hs_hu r5, r6, r7 } + { ld2s_add r15, r16, 5 ; shlx r5, r6, r7 } + { ld2s_add r15, r16, 5 ; v1int_h r5, r6, r7 } + { ld2s_add r15, r16, 5 ; v2maxsi r5, r6, 5 } + { ld2u r15, r16 ; addx r5, r6, r7 } + { ld2u r15, r16 ; fdouble_sub_flags r5, r6, r7 } + { ld2u r15, r16 ; mz r5, r6, r7 } + { ld2u r15, r16 ; v1cmpeq r5, r6, r7 } + { ld2u r15, r16 ; v2add r5, r6, r7 } + { ld2u r15, r16 ; v2shrui r5, r6, 5 } + { ld2u r25, r26 ; add r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { ld2u r25, r26 ; add r5, r6, r7 ; addi r15, r16, 5 } + { ld2u r25, r26 ; add r5, r6, r7 ; shru r15, r16, r17 } + { ld2u r25, r26 ; addi r15, r16, 5 ; mz r5, r6, r7 } + { ld2u r25, r26 ; addi r5, r6, 5 ; cmpltsi r15, r16, 5 } + { ld2u r25, r26 ; addx r15, r16, r17 ; and r5, r6, r7 } + { ld2u r25, r26 ; addx r15, r16, r17 ; shl1add r5, r6, r7 } + { ld2u r25, r26 ; addx r5, r6, r7 ; lnk r15 } + { ld2u r25, r26 ; addxi r15, r16, 5 ; cmpltsi r5, r6, 5 } + { ld2u r25, r26 ; addxi r15, r16, 5 ; shrui r5, r6, 5 } + { ld2u r25, r26 ; addxi r5, r6, 5 ; shl r15, r16, r17 } + { ld2u r25, r26 ; and r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { ld2u r25, r26 ; and r5, r6, r7 ; addi r15, r16, 5 } + { ld2u r25, r26 ; and r5, r6, r7 ; shru r15, r16, r17 } + { ld2u r25, r26 ; andi r15, r16, 5 ; mz r5, r6, r7 } + { ld2u r25, r26 ; andi r5, r6, 5 ; cmpltsi r15, r16, 5 } + { ld2u r25, r26 ; clz r5, r6 ; and r15, r16, r17 } + { ld2u r25, r26 ; clz r5, r6 ; subx r15, r16, r17 } + { ld2u r25, r26 ; cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 } + { ld2u r25, r26 ; cmovnez r5, r6, r7 ; rotli r15, r16, 5 } + { ld2u r25, r26 ; cmpeq r15, r16, r17 ; movei r5, 5 } + { ld2u r25, r26 ; cmpeq r5, r6, r7 ; add r15, r16, r17 } + { ld2u r25, r26 ; cmpeq r5, r6, r7 ; shrsi r15, r16, 5 } + { ld2u r25, r26 ; cmpeqi r15, r16, 5 ; mulx r5, r6, r7 } + { ld2u r25, r26 ; cmpeqi r5, r6, 5 ; cmplts r15, r16, r17 } + { ld2u r25, r26 ; cmples r15, r16, r17 ; addxi r5, r6, 5 } + { ld2u r25, r26 ; cmples r15, r16, r17 ; shl r5, r6, r7 } + { ld2u r25, r26 ; cmples r5, r6, r7 ; jrp r15 } + { ld2u r25, r26 ; cmpleu r15, r16, r17 ; cmplts r5, r6, r7 } + { ld2u r25, r26 ; cmpleu r15, r16, r17 ; shru r5, r6, r7 } + { ld2u r25, r26 ; cmpleu r5, r6, r7 ; rotli r15, r16, 5 } + { ld2u r25, r26 ; cmplts r15, r16, r17 ; movei r5, 5 } + { ld2u r25, r26 ; cmplts r5, r6, r7 ; add r15, r16, r17 } + { ld2u r25, r26 ; cmplts r5, r6, r7 ; shrsi r15, r16, 5 } + { ld2u r25, r26 ; cmpltsi r15, r16, 5 ; mulx r5, r6, r7 } + { ld2u r25, r26 ; cmpltsi r5, r6, 5 ; cmplts r15, r16, r17 } + { ld2u r25, r26 ; cmpltu r15, r16, r17 ; addxi r5, r6, 5 } + { ld2u r25, r26 ; cmpltu r15, r16, r17 ; shl r5, r6, r7 } + { ld2u r25, r26 ; cmpltu r5, r6, r7 ; jrp r15 } + { ld2u r25, r26 ; cmpne r15, r16, r17 ; cmplts r5, r6, r7 } + { ld2u r25, r26 ; cmpne r15, r16, r17 ; shru r5, r6, r7 } + { ld2u r25, r26 ; cmpne r5, r6, r7 ; rotli r15, r16, 5 } + { ld2u r25, r26 ; ctz r5, r6 ; move r15, r16 } + { ld2u r25, r26 ; fnop ; cmpeq r5, r6, r7 } + { ld2u r25, r26 ; fnop ; mulx r5, r6, r7 } + { ld2u r25, r26 ; fnop ; sub r5, r6, r7 } + { ld2u r25, r26 ; fsingle_pack1 r5, r6 ; rotli r15, r16, 5 } + { ld2u r25, r26 ; ill ; movei r5, 5 } + { ld2u r25, r26 ; info 19 ; add r15, r16, r17 } + { ld2u r25, r26 ; info 19 ; lnk r15 } + { ld2u r25, r26 ; info 19 ; shl2addx r5, r6, r7 } + { ld2u r25, r26 ; jalr r15 ; cmpltsi r5, r6, 5 } + { ld2u r25, r26 ; jalr r15 ; shrui r5, r6, 5 } + { ld2u r25, r26 ; jalrp r15 ; mula_lu_lu r5, r6, r7 } + { ld2u r25, r26 ; jr r15 ; cmovnez r5, r6, r7 } + { ld2u r25, r26 ; jr r15 ; shl3add r5, r6, r7 } + { ld2u r25, r26 ; jrp r15 ; mul_hu_hu r5, r6, r7 } + { ld2u r25, r26 ; lnk r15 ; addx r5, r6, r7 } + { ld2u r25, r26 ; lnk r15 ; rotli r5, r6, 5 } + { ld2u r25, r26 ; mnz r15, r16, r17 ; fsingle_pack1 r5, r6 } + { ld2u r25, r26 ; mnz r15, r16, r17 ; tblidxb2 r5, r6 } + { ld2u r25, r26 ; mnz r5, r6, r7 ; shl3add r15, r16, r17 } + { ld2u r25, r26 ; move r15, r16 ; mula_hu_hu r5, r6, r7 } + { ld2u r25, r26 ; move r5, r6 ; cmpeq r15, r16, r17 } + { ld2u r25, r26 ; move r5, r6 } + { ld2u r25, r26 ; movei r15, 5 ; revbits r5, r6 } + { ld2u r25, r26 ; movei r5, 5 ; info 19 } + { ld2u r25, r26 ; mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 } + { ld2u r25, r26 ; mul_hu_hu r5, r6, r7 ; addx r15, r16, r17 } + { ld2u r25, r26 ; mul_hu_hu r5, r6, r7 ; shrui r15, r16, 5 } + { ld2u r25, r26 ; mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 } + { ld2u r25, r26 ; mul_lu_lu r5, r6, r7 ; or r15, r16, r17 } + { ld2u r25, r26 ; mula_hs_hs r5, r6, r7 ; lnk r15 } + { ld2u r25, r26 ; mula_hu_hu r5, r6, r7 ; fnop } + { ld2u r25, r26 ; mula_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 } + { ld2u r25, r26 ; mula_lu_lu r5, r6, r7 ; add r15, r16, r17 } + { ld2u r25, r26 ; mula_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 } + { ld2u r25, r26 ; mulax r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld2u r25, r26 ; mulx r5, r6, r7 ; nop } + { ld2u r25, r26 ; mz r15, r16, r17 ; fsingle_pack1 r5, r6 } + { ld2u r25, r26 ; mz r15, r16, r17 ; tblidxb2 r5, r6 } + { ld2u r25, r26 ; mz r5, r6, r7 ; shl3add r15, r16, r17 } + { ld2u r25, r26 ; nop ; cmpne r15, r16, r17 } + { ld2u r25, r26 ; nop ; rotli r15, r16, 5 } + { ld2u r25, r26 ; nor r15, r16, r17 ; addxi r5, r6, 5 } + { ld2u r25, r26 ; nor r15, r16, r17 ; shl r5, r6, r7 } + { ld2u r25, r26 ; nor r5, r6, r7 ; jrp r15 } + { ld2u r25, r26 ; or r15, r16, r17 ; cmplts r5, r6, r7 } + { ld2u r25, r26 ; or r15, r16, r17 ; shru r5, r6, r7 } + { ld2u r25, r26 ; or r5, r6, r7 ; rotli r15, r16, 5 } + { ld2u r25, r26 ; pcnt r5, r6 ; move r15, r16 } + { ld2u r25, r26 ; revbits r5, r6 ; info 19 } + { ld2u r25, r26 ; revbytes r5, r6 ; cmpleu r15, r16, r17 } + { ld2u r25, r26 ; rotl r15, r16, r17 ; addx r5, r6, r7 } + { ld2u r25, r26 ; rotl r15, r16, r17 ; rotli r5, r6, 5 } + { ld2u r25, r26 ; rotl r5, r6, r7 ; jr r15 } + { ld2u r25, r26 ; rotli r15, r16, 5 ; cmpleu r5, r6, r7 } + { ld2u r25, r26 ; rotli r15, r16, 5 ; shrsi r5, r6, 5 } + { ld2u r25, r26 ; rotli r5, r6, 5 ; rotl r15, r16, r17 } + { ld2u r25, r26 ; shl r15, r16, r17 ; move r5, r6 } + { ld2u r25, r26 ; shl r15, r16, r17 } + { ld2u r25, r26 ; shl r5, r6, r7 ; shrs r15, r16, r17 } + { ld2u r25, r26 ; shl1add r15, r16, r17 ; mulax r5, r6, r7 } + { ld2u r25, r26 ; shl1add r5, r6, r7 ; cmpleu r15, r16, r17 } + { ld2u r25, r26 ; shl1addx r15, r16, r17 ; addx r5, r6, r7 } + { ld2u r25, r26 ; shl1addx r15, r16, r17 ; rotli r5, r6, 5 } + { ld2u r25, r26 ; shl1addx r5, r6, r7 ; jr r15 } + { ld2u r25, r26 ; shl2add r15, r16, r17 ; cmpleu r5, r6, r7 } + { ld2u r25, r26 ; shl2add r15, r16, r17 ; shrsi r5, r6, 5 } + { ld2u r25, r26 ; shl2add r5, r6, r7 ; rotl r15, r16, r17 } + { ld2u r25, r26 ; shl2addx r15, r16, r17 ; move r5, r6 } + { ld2u r25, r26 ; shl2addx r15, r16, r17 } + { ld2u r25, r26 ; shl2addx r5, r6, r7 ; shrs r15, r16, r17 } + { ld2u r25, r26 ; shl3add r15, r16, r17 ; mulax r5, r6, r7 } + { ld2u r25, r26 ; shl3add r5, r6, r7 ; cmpleu r15, r16, r17 } + { ld2u r25, r26 ; shl3addx r15, r16, r17 ; addx r5, r6, r7 } + { ld2u r25, r26 ; shl3addx r15, r16, r17 ; rotli r5, r6, 5 } + { ld2u r25, r26 ; shl3addx r5, r6, r7 ; jr r15 } + { ld2u r25, r26 ; shli r15, r16, 5 ; cmpleu r5, r6, r7 } + { ld2u r25, r26 ; shli r15, r16, 5 ; shrsi r5, r6, 5 } + { ld2u r25, r26 ; shli r5, r6, 5 ; rotl r15, r16, r17 } + { ld2u r25, r26 ; shrs r15, r16, r17 ; move r5, r6 } + { ld2u r25, r26 ; shrs r15, r16, r17 } + { ld2u r25, r26 ; shrs r5, r6, r7 ; shrs r15, r16, r17 } + { ld2u r25, r26 ; shrsi r15, r16, 5 ; mulax r5, r6, r7 } + { ld2u r25, r26 ; shrsi r5, r6, 5 ; cmpleu r15, r16, r17 } + { ld2u r25, r26 ; shru r15, r16, r17 ; addx r5, r6, r7 } + { ld2u r25, r26 ; shru r15, r16, r17 ; rotli r5, r6, 5 } + { ld2u r25, r26 ; shru r5, r6, r7 ; jr r15 } + { ld2u r25, r26 ; shrui r15, r16, 5 ; cmpleu r5, r6, r7 } + { ld2u r25, r26 ; shrui r15, r16, 5 ; shrsi r5, r6, 5 } + { ld2u r25, r26 ; shrui r5, r6, 5 ; rotl r15, r16, r17 } + { ld2u r25, r26 ; sub r15, r16, r17 ; move r5, r6 } + { ld2u r25, r26 ; sub r15, r16, r17 } + { ld2u r25, r26 ; sub r5, r6, r7 ; shrs r15, r16, r17 } + { ld2u r25, r26 ; subx r15, r16, r17 ; mulax r5, r6, r7 } + { ld2u r25, r26 ; subx r5, r6, r7 ; cmpleu r15, r16, r17 } + { ld2u r25, r26 ; tblidxb0 r5, r6 ; addx r15, r16, r17 } + { ld2u r25, r26 ; tblidxb0 r5, r6 ; shrui r15, r16, 5 } + { ld2u r25, r26 ; tblidxb1 r5, r6 ; shl2addx r15, r16, r17 } + { ld2u r25, r26 ; tblidxb2 r5, r6 ; or r15, r16, r17 } + { ld2u r25, r26 ; tblidxb3 r5, r6 ; lnk r15 } + { ld2u r25, r26 ; xor r15, r16, r17 ; cmpltsi r5, r6, 5 } + { ld2u r25, r26 ; xor r15, r16, r17 ; shrui r5, r6, 5 } + { ld2u r25, r26 ; xor r5, r6, r7 ; shl r15, r16, r17 } + { ld2u_add r15, r16, 5 ; cmul r5, r6, r7 } + { ld2u_add r15, r16, 5 ; mul_hs_lu r5, r6, r7 } + { ld2u_add r15, r16, 5 ; shrs r5, r6, r7 } + { ld2u_add r15, r16, 5 ; v1maxu r5, r6, r7 } + { ld2u_add r15, r16, 5 ; v2minsi r5, r6, 5 } + { ld4s r15, r16 ; addxli r5, r6, 0x1234 } + { ld4s r15, r16 ; fdouble_unpack_min r5, r6, r7 } + { ld4s r15, r16 ; nor r5, r6, r7 } + { ld4s r15, r16 ; v1cmples r5, r6, r7 } + { ld4s r15, r16 ; v2addsc r5, r6, r7 } + { ld4s r15, r16 ; v2subsc r5, r6, r7 } + { ld4s r25, r26 ; add r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld4s r25, r26 ; add r5, r6, r7 ; addxi r15, r16, 5 } + { ld4s r25, r26 ; add r5, r6, r7 ; sub r15, r16, r17 } + { ld4s r25, r26 ; addi r15, r16, 5 ; nor r5, r6, r7 } + { ld4s r25, r26 ; addi r5, r6, 5 ; cmpne r15, r16, r17 } + { ld4s r25, r26 ; addx r15, r16, r17 ; clz r5, r6 } + { ld4s r25, r26 ; addx r15, r16, r17 ; shl2add r5, r6, r7 } + { ld4s r25, r26 ; addx r5, r6, r7 ; move r15, r16 } + { ld4s r25, r26 ; addxi r15, r16, 5 ; cmpne r5, r6, r7 } + { ld4s r25, r26 ; addxi r15, r16, 5 ; subx r5, r6, r7 } + { ld4s r25, r26 ; addxi r5, r6, 5 ; shl1addx r15, r16, r17 } + { ld4s r25, r26 ; and r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld4s r25, r26 ; and r5, r6, r7 ; addxi r15, r16, 5 } + { ld4s r25, r26 ; and r5, r6, r7 ; sub r15, r16, r17 } + { ld4s r25, r26 ; andi r15, r16, 5 ; nor r5, r6, r7 } + { ld4s r25, r26 ; andi r5, r6, 5 ; cmpne r15, r16, r17 } + { ld4s r25, r26 ; clz r5, r6 ; cmpeq r15, r16, r17 } + { ld4s r25, r26 ; clz r5, r6 } + { ld4s r25, r26 ; cmoveqz r5, r6, r7 ; shrs r15, r16, r17 } + { ld4s r25, r26 ; cmovnez r5, r6, r7 ; shl1add r15, r16, r17 } + { ld4s r25, r26 ; cmpeq r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { ld4s r25, r26 ; cmpeq r5, r6, r7 ; addx r15, r16, r17 } + { ld4s r25, r26 ; cmpeq r5, r6, r7 ; shrui r15, r16, 5 } + { ld4s r25, r26 ; cmpeqi r15, r16, 5 ; nop } + { ld4s r25, r26 ; cmpeqi r5, r6, 5 ; cmpltu r15, r16, r17 } + { ld4s r25, r26 ; cmples r15, r16, r17 ; andi r5, r6, 5 } + { ld4s r25, r26 ; cmples r15, r16, r17 ; shl1addx r5, r6, r7 } + { ld4s r25, r26 ; cmples r5, r6, r7 ; mnz r15, r16, r17 } + { ld4s r25, r26 ; cmpleu r15, r16, r17 ; cmpltu r5, r6, r7 } + { ld4s r25, r26 ; cmpleu r15, r16, r17 ; sub r5, r6, r7 } + { ld4s r25, r26 ; cmpleu r5, r6, r7 ; shl1add r15, r16, r17 } + { ld4s r25, r26 ; cmplts r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { ld4s r25, r26 ; cmplts r5, r6, r7 ; addx r15, r16, r17 } + { ld4s r25, r26 ; cmplts r5, r6, r7 ; shrui r15, r16, 5 } + { ld4s r25, r26 ; cmpltsi r15, r16, 5 ; nop } + { ld4s r25, r26 ; cmpltsi r5, r6, 5 ; cmpltu r15, r16, r17 } + { ld4s r25, r26 ; cmpltu r15, r16, r17 ; andi r5, r6, 5 } + { ld4s r25, r26 ; cmpltu r15, r16, r17 ; shl1addx r5, r6, r7 } + { ld4s r25, r26 ; cmpltu r5, r6, r7 ; mnz r15, r16, r17 } + { ld4s r25, r26 ; cmpne r15, r16, r17 ; cmpltu r5, r6, r7 } + { ld4s r25, r26 ; cmpne r15, r16, r17 ; sub r5, r6, r7 } + { ld4s r25, r26 ; cmpne r5, r6, r7 ; shl1add r15, r16, r17 } + { ld4s r25, r26 ; ctz r5, r6 ; mz r15, r16, r17 } + { ld4s r25, r26 ; fnop ; cmpeqi r5, r6, 5 } + { ld4s r25, r26 ; fnop ; mz r5, r6, r7 } + { ld4s r25, r26 ; fnop ; subx r5, r6, r7 } + { ld4s r25, r26 ; fsingle_pack1 r5, r6 ; shl1add r15, r16, r17 } + { ld4s r25, r26 ; ill ; mul_hu_hu r5, r6, r7 } + { ld4s r25, r26 ; info 19 ; addi r15, r16, 5 } + { ld4s r25, r26 ; info 19 ; mnz r5, r6, r7 } + { ld4s r25, r26 ; info 19 ; shl3add r5, r6, r7 } + { ld4s r25, r26 ; jalr r15 ; cmpne r5, r6, r7 } + { ld4s r25, r26 ; jalr r15 ; subx r5, r6, r7 } + { ld4s r25, r26 ; jalrp r15 ; mulx r5, r6, r7 } + { ld4s r25, r26 ; jr r15 ; cmpeqi r5, r6, 5 } + { ld4s r25, r26 ; jr r15 ; shli r5, r6, 5 } + { ld4s r25, r26 ; jrp r15 ; mul_lu_lu r5, r6, r7 } + { ld4s r25, r26 ; lnk r15 ; and r5, r6, r7 } + { ld4s r25, r26 ; lnk r15 ; shl1add r5, r6, r7 } + { ld4s r25, r26 ; mnz r15, r16, r17 ; mnz r5, r6, r7 } + { ld4s r25, r26 ; mnz r15, r16, r17 ; xor r5, r6, r7 } + { ld4s r25, r26 ; mnz r5, r6, r7 ; shli r15, r16, 5 } + { ld4s r25, r26 ; move r15, r16 ; mula_lu_lu r5, r6, r7 } + { ld4s r25, r26 ; move r5, r6 ; cmples r15, r16, r17 } + { ld4s r25, r26 ; movei r15, 5 ; addi r5, r6, 5 } + { ld4s r25, r26 ; movei r15, 5 ; rotl r5, r6, r7 } + { ld4s r25, r26 ; movei r5, 5 ; jalrp r15 } + { ld4s r25, r26 ; mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 } + { ld4s r25, r26 ; mul_hu_hu r5, r6, r7 ; and r15, r16, r17 } + { ld4s r25, r26 ; mul_hu_hu r5, r6, r7 ; subx r15, r16, r17 } + { ld4s r25, r26 ; mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 } + { ld4s r25, r26 ; mul_lu_lu r5, r6, r7 ; rotli r15, r16, 5 } + { ld4s r25, r26 ; mula_hs_hs r5, r6, r7 ; move r15, r16 } + { ld4s r25, r26 ; mula_hu_hu r5, r6, r7 ; info 19 } + { ld4s r25, r26 ; mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 } + { ld4s r25, r26 ; mula_lu_lu r5, r6, r7 ; addx r15, r16, r17 } + { ld4s r25, r26 ; mula_lu_lu r5, r6, r7 ; shrui r15, r16, 5 } + { ld4s r25, r26 ; mulax r5, r6, r7 ; shl2addx r15, r16, r17 } + { ld4s r25, r26 ; mulx r5, r6, r7 ; or r15, r16, r17 } + { ld4s r25, r26 ; mz r15, r16, r17 ; mnz r5, r6, r7 } + { ld4s r25, r26 ; mz r15, r16, r17 ; xor r5, r6, r7 } + { ld4s r25, r26 ; mz r5, r6, r7 ; shli r15, r16, 5 } + { ld4s r25, r26 ; nop ; ctz r5, r6 } + { ld4s r25, r26 ; nop ; shl r15, r16, r17 } + { ld4s r25, r26 ; nor r15, r16, r17 ; andi r5, r6, 5 } + { ld4s r25, r26 ; nor r15, r16, r17 ; shl1addx r5, r6, r7 } + { ld4s r25, r26 ; nor r5, r6, r7 ; mnz r15, r16, r17 } + { ld4s r25, r26 ; or r15, r16, r17 ; cmpltu r5, r6, r7 } + { ld4s r25, r26 ; or r15, r16, r17 ; sub r5, r6, r7 } + { ld4s r25, r26 ; or r5, r6, r7 ; shl1add r15, r16, r17 } + { ld4s r25, r26 ; pcnt r5, r6 ; mz r15, r16, r17 } + { ld4s r25, r26 ; revbits r5, r6 ; jalrp r15 } + { ld4s r25, r26 ; revbytes r5, r6 ; cmpltsi r15, r16, 5 } + { ld4s r25, r26 ; rotl r15, r16, r17 ; and r5, r6, r7 } + { ld4s r25, r26 ; rotl r15, r16, r17 ; shl1add r5, r6, r7 } + { ld4s r25, r26 ; rotl r5, r6, r7 ; lnk r15 } + { ld4s r25, r26 ; rotli r15, r16, 5 ; cmpltsi r5, r6, 5 } + { ld4s r25, r26 ; rotli r15, r16, 5 ; shrui r5, r6, 5 } + { ld4s r25, r26 ; rotli r5, r6, 5 ; shl r15, r16, r17 } + { ld4s r25, r26 ; shl r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { ld4s r25, r26 ; shl r5, r6, r7 ; addi r15, r16, 5 } + { ld4s r25, r26 ; shl r5, r6, r7 ; shru r15, r16, r17 } + { ld4s r25, r26 ; shl1add r15, r16, r17 ; mz r5, r6, r7 } + { ld4s r25, r26 ; shl1add r5, r6, r7 ; cmpltsi r15, r16, 5 } + { ld4s r25, r26 ; shl1addx r15, r16, r17 ; and r5, r6, r7 } + { ld4s r25, r26 ; shl1addx r15, r16, r17 ; shl1add r5, r6, r7 } + { ld4s r25, r26 ; shl1addx r5, r6, r7 ; lnk r15 } + { ld4s r25, r26 ; shl2add r15, r16, r17 ; cmpltsi r5, r6, 5 } + { ld4s r25, r26 ; shl2add r15, r16, r17 ; shrui r5, r6, 5 } + { ld4s r25, r26 ; shl2add r5, r6, r7 ; shl r15, r16, r17 } + { ld4s r25, r26 ; shl2addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { ld4s r25, r26 ; shl2addx r5, r6, r7 ; addi r15, r16, 5 } + { ld4s r25, r26 ; shl2addx r5, r6, r7 ; shru r15, r16, r17 } + { ld4s r25, r26 ; shl3add r15, r16, r17 ; mz r5, r6, r7 } + { ld4s r25, r26 ; shl3add r5, r6, r7 ; cmpltsi r15, r16, 5 } + { ld4s r25, r26 ; shl3addx r15, r16, r17 ; and r5, r6, r7 } + { ld4s r25, r26 ; shl3addx r15, r16, r17 ; shl1add r5, r6, r7 } + { ld4s r25, r26 ; shl3addx r5, r6, r7 ; lnk r15 } + { ld4s r25, r26 ; shli r15, r16, 5 ; cmpltsi r5, r6, 5 } + { ld4s r25, r26 ; shli r15, r16, 5 ; shrui r5, r6, 5 } + { ld4s r25, r26 ; shli r5, r6, 5 ; shl r15, r16, r17 } + { ld4s r25, r26 ; shrs r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { ld4s r25, r26 ; shrs r5, r6, r7 ; addi r15, r16, 5 } + { ld4s r25, r26 ; shrs r5, r6, r7 ; shru r15, r16, r17 } + { ld4s r25, r26 ; shrsi r15, r16, 5 ; mz r5, r6, r7 } + { ld4s r25, r26 ; shrsi r5, r6, 5 ; cmpltsi r15, r16, 5 } + { ld4s r25, r26 ; shru r15, r16, r17 ; and r5, r6, r7 } + { ld4s r25, r26 ; shru r15, r16, r17 ; shl1add r5, r6, r7 } + { ld4s r25, r26 ; shru r5, r6, r7 ; lnk r15 } + { ld4s r25, r26 ; shrui r15, r16, 5 ; cmpltsi r5, r6, 5 } + { ld4s r25, r26 ; shrui r15, r16, 5 ; shrui r5, r6, 5 } + { ld4s r25, r26 ; shrui r5, r6, 5 ; shl r15, r16, r17 } + { ld4s r25, r26 ; sub r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { ld4s r25, r26 ; sub r5, r6, r7 ; addi r15, r16, 5 } + { ld4s r25, r26 ; sub r5, r6, r7 ; shru r15, r16, r17 } + { ld4s r25, r26 ; subx r15, r16, r17 ; mz r5, r6, r7 } + { ld4s r25, r26 ; subx r5, r6, r7 ; cmpltsi r15, r16, 5 } + { ld4s r25, r26 ; tblidxb0 r5, r6 ; and r15, r16, r17 } + { ld4s r25, r26 ; tblidxb0 r5, r6 ; subx r15, r16, r17 } + { ld4s r25, r26 ; tblidxb1 r5, r6 ; shl3addx r15, r16, r17 } + { ld4s r25, r26 ; tblidxb2 r5, r6 ; rotli r15, r16, 5 } + { ld4s r25, r26 ; tblidxb3 r5, r6 ; move r15, r16 } + { ld4s r25, r26 ; xor r15, r16, r17 ; cmpne r5, r6, r7 } + { ld4s r25, r26 ; xor r15, r16, r17 ; subx r5, r6, r7 } + { ld4s r25, r26 ; xor r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld4s_add r15, r16, 5 ; cmulaf r5, r6, r7 } + { ld4s_add r15, r16, 5 ; mul_hu_ls r5, r6, r7 } + { ld4s_add r15, r16, 5 ; shru r5, r6, r7 } + { ld4s_add r15, r16, 5 ; v1minu r5, r6, r7 } + { ld4s_add r15, r16, 5 ; v2mulfsc r5, r6, r7 } + { ld4u r15, r16 ; and r5, r6, r7 } + { ld4u r15, r16 ; fsingle_add1 r5, r6, r7 } + { ld4u r15, r16 ; ori r5, r6, 5 } + { ld4u r15, r16 ; v1cmplts r5, r6, r7 } + { ld4u r15, r16 ; v2avgs r5, r6, r7 } + { ld4u r15, r16 ; v4addsc r5, r6, r7 } + { ld4u r25, r26 ; add r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { ld4u r25, r26 ; add r5, r6, r7 ; andi r15, r16, 5 } + { ld4u r25, r26 ; add r5, r6, r7 ; xor r15, r16, r17 } + { ld4u r25, r26 ; addi r15, r16, 5 ; pcnt r5, r6 } + { ld4u r25, r26 ; addi r5, r6, 5 ; ill } + { ld4u r25, r26 ; addx r15, r16, r17 ; cmovnez r5, r6, r7 } + { ld4u r25, r26 ; addx r15, r16, r17 ; shl3add r5, r6, r7 } + { ld4u r25, r26 ; addx r5, r6, r7 ; mz r15, r16, r17 } + { ld4u r25, r26 ; addxi r15, r16, 5 ; fnop } + { ld4u r25, r26 ; addxi r15, r16, 5 ; tblidxb1 r5, r6 } + { ld4u r25, r26 ; addxi r5, r6, 5 ; shl2addx r15, r16, r17 } + { ld4u r25, r26 ; and r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { ld4u r25, r26 ; and r5, r6, r7 ; andi r15, r16, 5 } + { ld4u r25, r26 ; and r5, r6, r7 ; xor r15, r16, r17 } + { ld4u r25, r26 ; andi r15, r16, 5 ; pcnt r5, r6 } + { ld4u r25, r26 ; andi r5, r6, 5 ; ill } + { ld4u r25, r26 ; clz r5, r6 ; cmples r15, r16, r17 } + { ld4u r25, r26 ; cmoveqz r5, r6, r7 ; addi r15, r16, 5 } + { ld4u r25, r26 ; cmoveqz r5, r6, r7 ; shru r15, r16, r17 } + { ld4u r25, r26 ; cmovnez r5, r6, r7 ; shl2add r15, r16, r17 } + { ld4u r25, r26 ; cmpeq r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { ld4u r25, r26 ; cmpeq r5, r6, r7 ; and r15, r16, r17 } + { ld4u r25, r26 ; cmpeq r5, r6, r7 ; subx r15, r16, r17 } + { ld4u r25, r26 ; cmpeqi r15, r16, 5 ; or r5, r6, r7 } + { ld4u r25, r26 ; cmpeqi r5, r6, 5 ; fnop } + { ld4u r25, r26 ; cmples r15, r16, r17 ; cmoveqz r5, r6, r7 } + { ld4u r25, r26 ; cmples r15, r16, r17 ; shl2addx r5, r6, r7 } + { ld4u r25, r26 ; cmples r5, r6, r7 ; movei r15, 5 } + { ld4u r25, r26 ; cmpleu r15, r16, r17 ; ctz r5, r6 } + { ld4u r25, r26 ; cmpleu r15, r16, r17 ; tblidxb0 r5, r6 } + { ld4u r25, r26 ; cmpleu r5, r6, r7 ; shl2add r15, r16, r17 } + { ld4u r25, r26 ; cmplts r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { ld4u r25, r26 ; cmplts r5, r6, r7 ; and r15, r16, r17 } + { ld4u r25, r26 ; cmplts r5, r6, r7 ; subx r15, r16, r17 } + { ld4u r25, r26 ; cmpltsi r15, r16, 5 ; or r5, r6, r7 } + { ld4u r25, r26 ; cmpltsi r5, r6, 5 ; fnop } + { ld4u r25, r26 ; cmpltu r15, r16, r17 ; cmoveqz r5, r6, r7 } + { ld4u r25, r26 ; cmpltu r15, r16, r17 ; shl2addx r5, r6, r7 } + { ld4u r25, r26 ; cmpltu r5, r6, r7 ; movei r15, 5 } + { ld4u r25, r26 ; cmpne r15, r16, r17 ; ctz r5, r6 } + { ld4u r25, r26 ; cmpne r15, r16, r17 ; tblidxb0 r5, r6 } + { ld4u r25, r26 ; cmpne r5, r6, r7 ; shl2add r15, r16, r17 } + { ld4u r25, r26 ; ctz r5, r6 ; nor r15, r16, r17 } + { ld4u r25, r26 ; fnop ; cmples r5, r6, r7 } + { ld4u r25, r26 ; fnop ; nor r15, r16, r17 } + { ld4u r25, r26 ; fnop ; tblidxb1 r5, r6 } + { ld4u r25, r26 ; fsingle_pack1 r5, r6 ; shl2add r15, r16, r17 } + { ld4u r25, r26 ; ill ; mul_lu_lu r5, r6, r7 } + { ld4u r25, r26 ; info 19 ; addx r15, r16, r17 } + { ld4u r25, r26 ; info 19 ; move r5, r6 } + { ld4u r25, r26 ; info 19 ; shl3addx r5, r6, r7 } + { ld4u r25, r26 ; jalr r15 ; fnop } + { ld4u r25, r26 ; jalr r15 ; tblidxb1 r5, r6 } + { ld4u r25, r26 ; jalrp r15 ; nop } + { ld4u r25, r26 ; jr r15 ; cmpleu r5, r6, r7 } + { ld4u r25, r26 ; jr r15 ; shrsi r5, r6, 5 } + { ld4u r25, r26 ; jrp r15 ; mula_hu_hu r5, r6, r7 } + { ld4u r25, r26 ; lnk r15 ; clz r5, r6 } + { ld4u r25, r26 ; lnk r15 ; shl2add r5, r6, r7 } + { ld4u r25, r26 ; mnz r15, r16, r17 ; movei r5, 5 } + { ld4u r25, r26 ; mnz r5, r6, r7 ; add r15, r16, r17 } + { ld4u r25, r26 ; mnz r5, r6, r7 ; shrsi r15, r16, 5 } + { ld4u r25, r26 ; move r15, r16 ; mulx r5, r6, r7 } + { ld4u r25, r26 ; move r5, r6 ; cmplts r15, r16, r17 } + { ld4u r25, r26 ; movei r15, 5 ; addxi r5, r6, 5 } + { ld4u r25, r26 ; movei r15, 5 ; shl r5, r6, r7 } + { ld4u r25, r26 ; movei r5, 5 ; jrp r15 } + { ld4u r25, r26 ; mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 } + { ld4u r25, r26 ; mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 } + { ld4u r25, r26 ; mul_hu_hu r5, r6, r7 } + { ld4u r25, r26 ; mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 } + { ld4u r25, r26 ; mul_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 } + { ld4u r25, r26 ; mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 } + { ld4u r25, r26 ; mula_hu_hu r5, r6, r7 ; jalrp r15 } + { ld4u r25, r26 ; mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 } + { ld4u r25, r26 ; mula_lu_lu r5, r6, r7 ; and r15, r16, r17 } + { ld4u r25, r26 ; mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 } + { ld4u r25, r26 ; mulax r5, r6, r7 ; shl3addx r15, r16, r17 } + { ld4u r25, r26 ; mulx r5, r6, r7 ; rotli r15, r16, 5 } + { ld4u r25, r26 ; mz r15, r16, r17 ; movei r5, 5 } + { ld4u r25, r26 ; mz r5, r6, r7 ; add r15, r16, r17 } + { ld4u r25, r26 ; mz r5, r6, r7 ; shrsi r15, r16, 5 } + { ld4u r25, r26 ; nop ; fsingle_pack1 r5, r6 } + { ld4u r25, r26 ; nop ; shl1add r15, r16, r17 } + { ld4u r25, r26 ; nor r15, r16, r17 ; cmoveqz r5, r6, r7 } + { ld4u r25, r26 ; nor r15, r16, r17 ; shl2addx r5, r6, r7 } + { ld4u r25, r26 ; nor r5, r6, r7 ; movei r15, 5 } + { ld4u r25, r26 ; or r15, r16, r17 ; ctz r5, r6 } + { ld4u r25, r26 ; or r15, r16, r17 ; tblidxb0 r5, r6 } + { ld4u r25, r26 ; or r5, r6, r7 ; shl2add r15, r16, r17 } + { ld4u r25, r26 ; pcnt r5, r6 ; nor r15, r16, r17 } + { ld4u r25, r26 ; revbits r5, r6 ; jrp r15 } + { ld4u r25, r26 ; revbytes r5, r6 ; cmpne r15, r16, r17 } + { ld4u r25, r26 ; rotl r15, r16, r17 ; clz r5, r6 } + { ld4u r25, r26 ; rotl r15, r16, r17 ; shl2add r5, r6, r7 } + { ld4u r25, r26 ; rotl r5, r6, r7 ; move r15, r16 } + { ld4u r25, r26 ; rotli r15, r16, 5 ; cmpne r5, r6, r7 } + { ld4u r25, r26 ; rotli r15, r16, 5 ; subx r5, r6, r7 } + { ld4u r25, r26 ; rotli r5, r6, 5 ; shl1addx r15, r16, r17 } + { ld4u r25, r26 ; shl r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld4u r25, r26 ; shl r5, r6, r7 ; addxi r15, r16, 5 } + { ld4u r25, r26 ; shl r5, r6, r7 ; sub r15, r16, r17 } + { ld4u r25, r26 ; shl1add r15, r16, r17 ; nor r5, r6, r7 } + { ld4u r25, r26 ; shl1add r5, r6, r7 ; cmpne r15, r16, r17 } + { ld4u r25, r26 ; shl1addx r15, r16, r17 ; clz r5, r6 } + { ld4u r25, r26 ; shl1addx r15, r16, r17 ; shl2add r5, r6, r7 } + { ld4u r25, r26 ; shl1addx r5, r6, r7 ; move r15, r16 } + { ld4u r25, r26 ; shl2add r15, r16, r17 ; cmpne r5, r6, r7 } + { ld4u r25, r26 ; shl2add r15, r16, r17 ; subx r5, r6, r7 } + { ld4u r25, r26 ; shl2add r5, r6, r7 ; shl1addx r15, r16, r17 } + { ld4u r25, r26 ; shl2addx r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld4u r25, r26 ; shl2addx r5, r6, r7 ; addxi r15, r16, 5 } + { ld4u r25, r26 ; shl2addx r5, r6, r7 ; sub r15, r16, r17 } + { ld4u r25, r26 ; shl3add r15, r16, r17 ; nor r5, r6, r7 } + { ld4u r25, r26 ; shl3add r5, r6, r7 ; cmpne r15, r16, r17 } + { ld4u r25, r26 ; shl3addx r15, r16, r17 ; clz r5, r6 } + { ld4u r25, r26 ; shl3addx r15, r16, r17 ; shl2add r5, r6, r7 } + { ld4u r25, r26 ; shl3addx r5, r6, r7 ; move r15, r16 } + { ld4u r25, r26 ; shli r15, r16, 5 ; cmpne r5, r6, r7 } + { ld4u r25, r26 ; shli r15, r16, 5 ; subx r5, r6, r7 } + { ld4u r25, r26 ; shli r5, r6, 5 ; shl1addx r15, r16, r17 } + { ld4u r25, r26 ; shrs r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld4u r25, r26 ; shrs r5, r6, r7 ; addxi r15, r16, 5 } + { ld4u r25, r26 ; shrs r5, r6, r7 ; sub r15, r16, r17 } + { ld4u r25, r26 ; shrsi r15, r16, 5 ; nor r5, r6, r7 } + { ld4u r25, r26 ; shrsi r5, r6, 5 ; cmpne r15, r16, r17 } + { ld4u r25, r26 ; shru r15, r16, r17 ; clz r5, r6 } + { ld4u r25, r26 ; shru r15, r16, r17 ; shl2add r5, r6, r7 } + { ld4u r25, r26 ; shru r5, r6, r7 ; move r15, r16 } + { ld4u r25, r26 ; shrui r15, r16, 5 ; cmpne r5, r6, r7 } + { ld4u r25, r26 ; shrui r15, r16, 5 ; subx r5, r6, r7 } + { ld4u r25, r26 ; shrui r5, r6, 5 ; shl1addx r15, r16, r17 } + { ld4u r25, r26 ; sub r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { ld4u r25, r26 ; sub r5, r6, r7 ; addxi r15, r16, 5 } + { ld4u r25, r26 ; sub r5, r6, r7 ; sub r15, r16, r17 } + { ld4u r25, r26 ; subx r15, r16, r17 ; nor r5, r6, r7 } + { ld4u r25, r26 ; subx r5, r6, r7 ; cmpne r15, r16, r17 } + { ld4u r25, r26 ; tblidxb0 r5, r6 ; cmpeq r15, r16, r17 } + { ld4u r25, r26 ; tblidxb0 r5, r6 } + { ld4u r25, r26 ; tblidxb1 r5, r6 ; shrs r15, r16, r17 } + { ld4u r25, r26 ; tblidxb2 r5, r6 ; shl1add r15, r16, r17 } + { ld4u r25, r26 ; tblidxb3 r5, r6 ; mz r15, r16, r17 } + { ld4u r25, r26 ; xor r15, r16, r17 ; fnop } + { ld4u r25, r26 ; xor r15, r16, r17 ; tblidxb1 r5, r6 } + { ld4u r25, r26 ; xor r5, r6, r7 ; shl2addx r15, r16, r17 } + { ld4u_add r15, r16, 5 ; cmulfr r5, r6, r7 } + { ld4u_add r15, r16, 5 ; mul_ls_ls r5, r6, r7 } + { ld4u_add r15, r16, 5 ; shrux r5, r6, r7 } + { ld4u_add r15, r16, 5 ; v1mnz r5, r6, r7 } + { ld4u_add r15, r16, 5 ; v2mults r5, r6, r7 } + { ld_add r15, r16, 5 ; bfexts r5, r6, 5, 7 } + { ld_add r15, r16, 5 ; fsingle_mul1 r5, r6, r7 } + { ld_add r15, r16, 5 ; revbits r5, r6 } + { ld_add r15, r16, 5 ; v1cmpltu r5, r6, r7 } + { ld_add r15, r16, 5 ; v2cmpeqi r5, r6, 5 } + { ld_add r15, r16, 5 ; v4int_l r5, r6, r7 } + { ldna r15, r16 ; cmulhr r5, r6, r7 } + { ldna r15, r16 ; mul_lu_lu r5, r6, r7 } + { ldna r15, r16 ; shufflebytes r5, r6, r7 } + { ldna r15, r16 ; v1mulu r5, r6, r7 } + { ldna r15, r16 ; v2packh r5, r6, r7 } + { ldna_add r15, r16, 5 ; bfins r5, r6, 5, 7 } + { ldna_add r15, r16, 5 ; fsingle_pack1 r5, r6 } + { ldna_add r15, r16, 5 ; rotl r5, r6, r7 } + { ldna_add r15, r16, 5 ; v1cmpne r5, r6, r7 } + { ldna_add r15, r16, 5 ; v2cmpleu r5, r6, r7 } + { ldna_add r15, r16, 5 ; v4shl r5, r6, r7 } + { ldnt r15, r16 ; crc32_8 r5, r6, r7 } + { ldnt r15, r16 ; mula_hs_hu r5, r6, r7 } + { ldnt r15, r16 ; subx r5, r6, r7 } + { ldnt r15, r16 ; v1mz r5, r6, r7 } + { ldnt r15, r16 ; v2packuc r5, r6, r7 } + { ldnt1s r15, r16 ; cmoveqz r5, r6, r7 } + { ldnt1s r15, r16 ; fsingle_sub1 r5, r6, r7 } + { ldnt1s r15, r16 ; shl r5, r6, r7 } + { ldnt1s r15, r16 ; v1ddotpua r5, r6, r7 } + { ldnt1s r15, r16 ; v2cmpltsi r5, r6, 5 } + { ldnt1s r15, r16 ; v4shrs r5, r6, r7 } + { ldnt1s_add r15, r16, 5 ; dblalign r5, r6, r7 } + { ldnt1s_add r15, r16, 5 ; mula_hs_lu r5, r6, r7 } + { ldnt1s_add r15, r16, 5 ; tblidxb0 r5, r6 } + { ldnt1s_add r15, r16, 5 ; v1sadu r5, r6, r7 } + { ldnt1s_add r15, r16, 5 ; v2sadau r5, r6, r7 } + { ldnt1u r15, r16 ; cmpeq r5, r6, r7 } + { ldnt1u r15, r16 ; infol 0x1234 } + { ldnt1u r15, r16 ; shl1add r5, r6, r7 } + { ldnt1u r15, r16 ; v1ddotpusa r5, r6, r7 } + { ldnt1u r15, r16 ; v2cmpltui r5, r6, 5 } + { ldnt1u r15, r16 ; v4sub r5, r6, r7 } + { ldnt1u_add r15, r16, 5 ; dblalign4 r5, r6, r7 } + { ldnt1u_add r15, r16, 5 ; mula_hu_ls r5, r6, r7 } + { ldnt1u_add r15, r16, 5 ; tblidxb2 r5, r6 } + { ldnt1u_add r15, r16, 5 ; v1shli r5, r6, 5 } + { ldnt1u_add r15, r16, 5 ; v2sadu r5, r6, r7 } + { ldnt2s r15, r16 ; cmples r5, r6, r7 } + { ldnt2s r15, r16 ; mnz r5, r6, r7 } + { ldnt2s r15, r16 ; shl2add r5, r6, r7 } + { ldnt2s r15, r16 ; v1dotpa r5, r6, r7 } + { ldnt2s r15, r16 ; v2dotp r5, r6, r7 } + { ldnt2s r15, r16 ; xor r5, r6, r7 } + { ldnt2s_add r15, r16, 5 ; fdouble_add_flags r5, r6, r7 } + { ldnt2s_add r15, r16, 5 ; mula_ls_ls r5, r6, r7 } + { ldnt2s_add r15, r16, 5 ; v1add r5, r6, r7 } + { ldnt2s_add r15, r16, 5 ; v1shrsi r5, r6, 5 } + { ldnt2s_add r15, r16, 5 ; v2shli r5, r6, 5 } + { ldnt2u r15, r16 ; cmplts r5, r6, r7 } + { ldnt2u r15, r16 ; movei r5, 5 } + { ldnt2u r15, r16 ; shl3add r5, r6, r7 } + { ldnt2u r15, r16 ; v1dotpua r5, r6, r7 } + { ldnt2u r15, r16 ; v2int_h r5, r6, r7 } + { ldnt2u_add r15, r16, 5 ; add r5, r6, r7 } + { ldnt2u_add r15, r16, 5 ; fdouble_mul_flags r5, r6, r7 } + { ldnt2u_add r15, r16, 5 ; mula_lu_lu r5, r6, r7 } + { ldnt2u_add r15, r16, 5 ; v1adduc r5, r6, r7 } + { ldnt2u_add r15, r16, 5 ; v1shrui r5, r6, 5 } + { ldnt2u_add r15, r16, 5 ; v2shrs r5, r6, r7 } + { ldnt4s r15, r16 ; cmpltu r5, r6, r7 } + { ldnt4s r15, r16 ; mul_hs_hs r5, r6, r7 } + { ldnt4s r15, r16 ; shli r5, r6, 5 } + { ldnt4s r15, r16 ; v1dotpusa r5, r6, r7 } + { ldnt4s r15, r16 ; v2maxs r5, r6, r7 } + { ldnt4s_add r15, r16, 5 ; addli r5, r6, 0x1234 } + { ldnt4s_add r15, r16, 5 ; fdouble_pack2 r5, r6, r7 } + { ldnt4s_add r15, r16, 5 ; mulx r5, r6, r7 } + { ldnt4s_add r15, r16, 5 ; v1avgu r5, r6, r7 } + { ldnt4s_add r15, r16, 5 ; v1subuc r5, r6, r7 } + { ldnt4s_add r15, r16, 5 ; v2shru r5, r6, r7 } + { ldnt4u r15, r16 ; cmpne r5, r6, r7 } + { ldnt4u r15, r16 ; mul_hs_ls r5, r6, r7 } + { ldnt4u r15, r16 ; shlxi r5, r6, 5 } + { ldnt4u r15, r16 ; v1int_l r5, r6, r7 } + { ldnt4u r15, r16 ; v2mins r5, r6, r7 } + { ldnt4u_add r15, r16, 5 ; addxi r5, r6, 5 } + { ldnt4u_add r15, r16, 5 ; fdouble_unpack_max r5, r6, r7 } + { ldnt4u_add r15, r16, 5 ; nop } + { ldnt4u_add r15, r16, 5 ; v1cmpeqi r5, r6, 5 } + { ldnt4u_add r15, r16, 5 ; v2addi r5, r6, 5 } + { ldnt4u_add r15, r16, 5 ; v2sub r5, r6, r7 } + { ldnt_add r15, r16, 5 ; cmula r5, r6, r7 } + { ldnt_add r15, r16, 5 ; mul_hu_hu r5, r6, r7 } + { ldnt_add r15, r16, 5 ; shrsi r5, r6, 5 } + { ldnt_add r15, r16, 5 ; v1maxui r5, r6, 5 } + { ldnt_add r15, r16, 5 ; v2mnz r5, r6, r7 } + { lnk r15 ; add r5, r6, r7 ; ld4u r25, r26 } + { lnk r15 ; addx r5, r6, r7 ; prefetch r25 } + { lnk r15 ; and r5, r6, r7 ; prefetch r25 } + { lnk r15 ; clz r5, r6 ; ld4u r25, r26 } + { lnk r15 ; cmovnez r5, r6, r7 ; prefetch_l1 r25 } + { lnk r15 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 } + { lnk r15 ; cmpleu r5, r6, r7 ; prefetch_l3 r25 } + { lnk r15 ; cmpltsi r5, r6, 5 ; st r25, r26 } + { lnk r15 ; cmpne r5, r6, r7 ; st1 r25, r26 } + { lnk r15 ; fdouble_pack2 r5, r6, r7 } + { lnk r15 ; fsingle_pack1 r5, r6 ; prefetch_l3_fault r25 } + { lnk r15 ; ld r25, r26 ; cmpleu r5, r6, r7 } + { lnk r15 ; ld r25, r26 ; shrsi r5, r6, 5 } + { lnk r15 ; ld1s r25, r26 ; mula_hu_hu r5, r6, r7 } + { lnk r15 ; ld1u r25, r26 ; clz r5, r6 } + { lnk r15 ; ld1u r25, r26 ; shl2add r5, r6, r7 } + { lnk r15 ; ld2s r25, r26 ; movei r5, 5 } + { lnk r15 ; ld2u r25, r26 ; add r5, r6, r7 } + { lnk r15 ; ld2u r25, r26 ; revbytes r5, r6 } + { lnk r15 ; ld4s r25, r26 ; ctz r5, r6 } + { lnk r15 ; ld4s r25, r26 ; tblidxb0 r5, r6 } + { lnk r15 ; ld4u r25, r26 ; mz r5, r6, r7 } + { lnk r15 ; mnz r5, r6, r7 ; prefetch_l2 r25 } + { lnk r15 ; movei r5, 5 ; prefetch_l3 r25 } + { lnk r15 ; mul_hu_hu r5, r6, r7 ; prefetch_l2 r25 } + { lnk r15 ; mul_lu_lu r5, r6, r7 ; prefetch_l1_fault r25 } + { lnk r15 ; mula_hu_hu r5, r6, r7 ; prefetch_l1 r25 } + { lnk r15 ; mula_lu_lu r5, r6, r7 ; prefetch r25 } + { lnk r15 ; mulx r5, r6, r7 ; prefetch_l1_fault r25 } + { lnk r15 ; nop ; prefetch_l2_fault r25 } + { lnk r15 ; or r5, r6, r7 ; prefetch_l3_fault r25 } + { lnk r15 ; prefetch r25 ; cmpltsi r5, r6, 5 } + { lnk r15 ; prefetch r25 ; shrui r5, r6, 5 } + { lnk r15 ; prefetch_l1 r25 ; mula_lu_lu r5, r6, r7 } + { lnk r15 ; prefetch_l1_fault r25 ; cmovnez r5, r6, r7 } + { lnk r15 ; prefetch_l1_fault r25 ; shl3add r5, r6, r7 } + { lnk r15 ; prefetch_l2 r25 ; mul_hu_hu r5, r6, r7 } + { lnk r15 ; prefetch_l2_fault r25 ; addx r5, r6, r7 } + { lnk r15 ; prefetch_l2_fault r25 ; rotli r5, r6, 5 } + { lnk r15 ; prefetch_l3 r25 ; fsingle_pack1 r5, r6 } + { lnk r15 ; prefetch_l3 r25 ; tblidxb2 r5, r6 } + { lnk r15 ; prefetch_l3_fault r25 ; nor r5, r6, r7 } + { lnk r15 ; revbits r5, r6 ; prefetch_l3_fault r25 } + { lnk r15 ; rotl r5, r6, r7 ; st1 r25, r26 } + { lnk r15 ; shl r5, r6, r7 ; st4 r25, r26 } + { lnk r15 ; shl1addx r5, r6, r7 } + { lnk r15 ; shl3add r5, r6, r7 ; ld1s r25, r26 } + { lnk r15 ; shli r5, r6, 5 ; ld2s r25, r26 } + { lnk r15 ; shrsi r5, r6, 5 ; ld2s r25, r26 } + { lnk r15 ; shrui r5, r6, 5 ; ld4s r25, r26 } + { lnk r15 ; st r25, r26 ; movei r5, 5 } + { lnk r15 ; st1 r25, r26 ; add r5, r6, r7 } + { lnk r15 ; st1 r25, r26 ; revbytes r5, r6 } + { lnk r15 ; st2 r25, r26 ; ctz r5, r6 } + { lnk r15 ; st2 r25, r26 ; tblidxb0 r5, r6 } + { lnk r15 ; st4 r25, r26 ; mz r5, r6, r7 } + { lnk r15 ; sub r5, r6, r7 ; prefetch_l2_fault r25 } + { lnk r15 ; tblidxb0 r5, r6 ; prefetch_l3 r25 } + { lnk r15 ; tblidxb2 r5, r6 ; st r25, r26 } + { lnk r15 ; v1ddotpus r5, r6, r7 } + { lnk r15 ; v2cmpltu r5, r6, r7 } + { lnk r15 ; v4shru r5, r6, r7 } + { mf ; cmples r5, r6, r7 } + { mf ; mnz r5, r6, r7 } + { mf ; shl2add r5, r6, r7 } + { mf ; v1dotpa r5, r6, r7 } + { mf ; v2dotp r5, r6, r7 } + { mf ; xor r5, r6, r7 } + { mfspr r16, 0x5 ; fdouble_add_flags r5, r6, r7 } + { mfspr r16, 0x5 ; mula_ls_ls r5, r6, r7 } + { mfspr r16, 0x5 ; v1add r5, r6, r7 } + { mfspr r16, 0x5 ; v1shrsi r5, r6, 5 } + { mfspr r16, 0x5 ; v2shli r5, r6, 5 } + { mm r5, r6, 5, 7 ; cmpne r15, r16, r17 } + { mm r5, r6, 5, 7 ; ld4u r15, r16 } + { mm r5, r6, 5, 7 ; prefetch_l1_fault r15 } + { mm r5, r6, 5, 7 ; stnt_add r15, r16, 5 } + { mm r5, r6, 5, 7 ; v2cmpltsi r15, r16, 5 } + { mnz r15, r16, r17 ; add r5, r6, r7 ; ld1u r25, r26 } + { mnz r15, r16, r17 ; addx r5, r6, r7 ; ld2s r25, r26 } + { mnz r15, r16, r17 ; and r5, r6, r7 ; ld2s r25, r26 } + { mnz r15, r16, r17 ; clz r5, r6 ; ld1u r25, r26 } + { mnz r15, r16, r17 ; cmovnez r5, r6, r7 ; ld2u r25, r26 } + { mnz r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 } + { mnz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l1 r25 } + { mnz r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 } + { mnz r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 } + { mnz r15, r16, r17 ; fdouble_add_flags r5, r6, r7 } + { mnz r15, r16, r17 ; fsingle_pack1 r5, r6 ; prefetch_l1_fault r25 } + { mnz r15, r16, r17 ; ld r25, r26 ; cmovnez r5, r6, r7 } + { mnz r15, r16, r17 ; ld r25, r26 ; shl3add r5, r6, r7 } + { mnz r15, r16, r17 ; ld1s r25, r26 ; mul_hu_hu r5, r6, r7 } + { mnz r15, r16, r17 ; ld1u r25, r26 ; addx r5, r6, r7 } + { mnz r15, r16, r17 ; ld1u r25, r26 ; rotli r5, r6, 5 } + { mnz r15, r16, r17 ; ld2s r25, r26 ; fsingle_pack1 r5, r6 } + { mnz r15, r16, r17 ; ld2s r25, r26 ; tblidxb2 r5, r6 } + { mnz r15, r16, r17 ; ld2u r25, r26 ; nor r5, r6, r7 } + { mnz r15, r16, r17 ; ld4s r25, r26 ; cmplts r5, r6, r7 } + { mnz r15, r16, r17 ; ld4s r25, r26 ; shru r5, r6, r7 } + { mnz r15, r16, r17 ; ld4u r25, r26 ; mula_ls_ls r5, r6, r7 } + { mnz r15, r16, r17 ; mnz r5, r6, r7 ; ld4u r25, r26 } + { mnz r15, r16, r17 ; movei r5, 5 ; prefetch_l1 r25 } + { mnz r15, r16, r17 ; mul_hu_hu r5, r6, r7 ; ld4u r25, r26 } + { mnz r15, r16, r17 ; mul_lu_lu r5, r6, r7 ; ld4s r25, r26 } + { mnz r15, r16, r17 ; mula_hu_hu r5, r6, r7 ; ld2u r25, r26 } + { mnz r15, r16, r17 ; mula_lu_lu r5, r6, r7 ; ld2s r25, r26 } + { mnz r15, r16, r17 ; mulx r5, r6, r7 ; ld4s r25, r26 } + { mnz r15, r16, r17 ; nop ; prefetch r25 } + { mnz r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 } + { mnz r15, r16, r17 ; prefetch r25 ; cmpeqi r5, r6, 5 } + { mnz r15, r16, r17 ; prefetch r25 ; shli r5, r6, 5 } + { mnz r15, r16, r17 ; prefetch_l1 r25 ; mul_lu_lu r5, r6, r7 } + { mnz r15, r16, r17 ; prefetch_l1_fault r25 ; and r5, r6, r7 } + { mnz r15, r16, r17 ; prefetch_l1_fault r25 ; shl1add r5, r6, r7 } + { mnz r15, r16, r17 ; prefetch_l2 r25 ; mnz r5, r6, r7 } + { mnz r15, r16, r17 ; prefetch_l2 r25 ; xor r5, r6, r7 } + { mnz r15, r16, r17 ; prefetch_l2_fault r25 ; pcnt r5, r6 } + { mnz r15, r16, r17 ; prefetch_l3 r25 ; cmpltu r5, r6, r7 } + { mnz r15, r16, r17 ; prefetch_l3 r25 ; sub r5, r6, r7 } + { mnz r15, r16, r17 ; prefetch_l3_fault r25 ; mulax r5, r6, r7 } + { mnz r15, r16, r17 ; revbits r5, r6 ; prefetch_l1_fault r25 } + { mnz r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 } + { mnz r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l3_fault r25 } + { mnz r15, r16, r17 ; shl1addx r5, r6, r7 ; st r25, r26 } + { mnz r15, r16, r17 ; shl2addx r5, r6, r7 ; st2 r25, r26 } + { mnz r15, r16, r17 ; shl3addx r5, r6, r7 } + { mnz r15, r16, r17 ; shrs r5, r6, r7 } + { mnz r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 } + { mnz r15, r16, r17 ; st r25, r26 ; fsingle_pack1 r5, r6 } + { mnz r15, r16, r17 ; st r25, r26 ; tblidxb2 r5, r6 } + { mnz r15, r16, r17 ; st1 r25, r26 ; nor r5, r6, r7 } + { mnz r15, r16, r17 ; st2 r25, r26 ; cmplts r5, r6, r7 } + { mnz r15, r16, r17 ; st2 r25, r26 ; shru r5, r6, r7 } + { mnz r15, r16, r17 ; st4 r25, r26 ; mula_ls_ls r5, r6, r7 } + { mnz r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 } + { mnz r15, r16, r17 ; tblidxb0 r5, r6 ; prefetch_l1 r25 } + { mnz r15, r16, r17 ; tblidxb2 r5, r6 ; prefetch_l2 r25 } + { mnz r15, r16, r17 ; v1cmpltui r5, r6, 5 } + { mnz r15, r16, r17 ; v2cmples r5, r6, r7 } + { mnz r15, r16, r17 ; v4packsc r5, r6, r7 } + { mnz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3_fault r25 } + { mnz r5, r6, r7 ; addx r15, r16, r17 ; st r25, r26 } + { mnz r5, r6, r7 ; and r15, r16, r17 ; st r25, r26 } + { mnz r5, r6, r7 ; cmpeq r15, r16, r17 ; st2 r25, r26 } + { mnz r5, r6, r7 ; cmples r15, r16, r17 ; st2 r25, r26 } + { mnz r5, r6, r7 ; cmplts r15, r16, r17 } + { mnz r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 } + { mnz r5, r6, r7 ; fnop ; ld2u r25, r26 } + { mnz r5, r6, r7 ; info 19 ; ld4s r25, r26 } + { mnz r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 } + { mnz r5, r6, r7 ; jrp r15 ; ld4u r25, r26 } + { mnz r5, r6, r7 ; ld r25, r26 ; nop } + { mnz r5, r6, r7 ; ld1s r25, r26 ; jalrp r15 } + { mnz r5, r6, r7 ; ld1u r25, r26 ; cmpleu r15, r16, r17 } + { mnz r5, r6, r7 ; ld2s r25, r26 ; add r15, r16, r17 } + { mnz r5, r6, r7 ; ld2s r25, r26 ; shrsi r15, r16, 5 } + { mnz r5, r6, r7 ; ld2u r25, r26 ; shl r15, r16, r17 } + { mnz r5, r6, r7 ; ld4s r25, r26 ; mnz r15, r16, r17 } + { mnz r5, r6, r7 ; ld4u r25, r26 ; cmpne r15, r16, r17 } + { mnz r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + { mnz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + { mnz r5, r6, r7 ; movei r15, 5 ; prefetch_l1_fault r25 } + { mnz r5, r6, r7 ; nop ; prefetch_l1_fault r25 } + { mnz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 } + { mnz r5, r6, r7 ; prefetch r25 ; rotli r15, r16, 5 } + { mnz r5, r6, r7 ; prefetch_l1 r25 ; info 19 } + { mnz r5, r6, r7 ; prefetch_l1_fault r25 ; cmples r15, r16, r17 } + { mnz r5, r6, r7 ; prefetch_l2 r25 ; add r15, r16, r17 } + { mnz r5, r6, r7 ; prefetch_l2 r25 ; shrsi r15, r16, 5 } + { mnz r5, r6, r7 ; prefetch_l2_fault r25 ; shl1add r15, r16, r17 } + { mnz r5, r6, r7 ; prefetch_l3 r25 ; movei r15, 5 } + { mnz r5, r6, r7 ; prefetch_l3_fault r25 ; info 19 } + { mnz r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1 r25 } + { mnz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2 r25 } + { mnz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 } + { mnz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 } + { mnz r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + { mnz r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 } + { mnz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 } + { mnz r5, r6, r7 ; st r25, r26 ; info 19 } + { mnz r5, r6, r7 ; st1 r25, r26 ; cmples r15, r16, r17 } + { mnz r5, r6, r7 ; st2 r15, r16 } + { mnz r5, r6, r7 ; st2 r25, r26 ; shrs r15, r16, r17 } + { mnz r5, r6, r7 ; st4 r25, r26 ; rotli r15, r16, 5 } + { mnz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + { mnz r5, r6, r7 ; v1maxu r15, r16, r17 } + { mnz r5, r6, r7 ; v2shrs r15, r16, r17 } + { move r15, r16 ; add r5, r6, r7 ; ld1u r25, r26 } + { move r15, r16 ; addx r5, r6, r7 ; ld2s r25, r26 } + { move r15, r16 ; and r5, r6, r7 ; ld2s r25, r26 } + { move r15, r16 ; clz r5, r6 ; ld1u r25, r26 } + { move r15, r16 ; cmovnez r5, r6, r7 ; ld2u r25, r26 } + { move r15, r16 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 } + { move r15, r16 ; cmpleu r5, r6, r7 ; prefetch_l1 r25 } + { move r15, r16 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 } + { move r15, r16 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 } + { move r15, r16 ; fdouble_add_flags r5, r6, r7 } + { move r15, r16 ; fsingle_pack1 r5, r6 ; prefetch_l1_fault r25 } + { move r15, r16 ; ld r25, r26 ; cmovnez r5, r6, r7 } + { move r15, r16 ; ld r25, r26 ; shl3add r5, r6, r7 } + { move r15, r16 ; ld1s r25, r26 ; mul_hu_hu r5, r6, r7 } + { move r15, r16 ; ld1u r25, r26 ; addx r5, r6, r7 } + { move r15, r16 ; ld1u r25, r26 ; rotli r5, r6, 5 } + { move r15, r16 ; ld2s r25, r26 ; fsingle_pack1 r5, r6 } + { move r15, r16 ; ld2s r25, r26 ; tblidxb2 r5, r6 } + { move r15, r16 ; ld2u r25, r26 ; nor r5, r6, r7 } + { move r15, r16 ; ld4s r25, r26 ; cmplts r5, r6, r7 } + { move r15, r16 ; ld4s r25, r26 ; shru r5, r6, r7 } + { move r15, r16 ; ld4u r25, r26 ; mula_ls_ls r5, r6, r7 } + { move r15, r16 ; mnz r5, r6, r7 ; ld4u r25, r26 } + { move r15, r16 ; movei r5, 5 ; prefetch_l1 r25 } + { move r15, r16 ; mul_hu_hu r5, r6, r7 ; ld4u r25, r26 } + { move r15, r16 ; mul_lu_lu r5, r6, r7 ; ld4s r25, r26 } + { move r15, r16 ; mula_hu_hu r5, r6, r7 ; ld2u r25, r26 } + { move r15, r16 ; mula_lu_lu r5, r6, r7 ; ld2s r25, r26 } + { move r15, r16 ; mulx r5, r6, r7 ; ld4s r25, r26 } + { move r15, r16 ; nop ; prefetch r25 } + { move r15, r16 ; or r5, r6, r7 ; prefetch_l1_fault r25 } + { move r15, r16 ; prefetch r25 ; cmpeqi r5, r6, 5 } + { move r15, r16 ; prefetch r25 ; shli r5, r6, 5 } + { move r15, r16 ; prefetch_l1 r25 ; mul_lu_lu r5, r6, r7 } + { move r15, r16 ; prefetch_l1_fault r25 ; and r5, r6, r7 } + { move r15, r16 ; prefetch_l1_fault r25 ; shl1add r5, r6, r7 } + { move r15, r16 ; prefetch_l2 r25 ; mnz r5, r6, r7 } + { move r15, r16 ; prefetch_l2 r25 ; xor r5, r6, r7 } + { move r15, r16 ; prefetch_l2_fault r25 ; pcnt r5, r6 } + { move r15, r16 ; prefetch_l3 r25 ; cmpltu r5, r6, r7 } + { move r15, r16 ; prefetch_l3 r25 ; sub r5, r6, r7 } + { move r15, r16 ; prefetch_l3_fault r25 ; mulax r5, r6, r7 } + { move r15, r16 ; revbits r5, r6 ; prefetch_l1_fault r25 } + { move r15, r16 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 } + { move r15, r16 ; shl r5, r6, r7 ; prefetch_l3_fault r25 } + { move r15, r16 ; shl1addx r5, r6, r7 ; st r25, r26 } + { move r15, r16 ; shl2addx r5, r6, r7 ; st2 r25, r26 } + { move r15, r16 ; shl3addx r5, r6, r7 } + { move r15, r16 ; shrs r5, r6, r7 } + { move r15, r16 ; shrui r5, r6, 5 ; ld1s r25, r26 } + { move r15, r16 ; st r25, r26 ; fsingle_pack1 r5, r6 } + { move r15, r16 ; st r25, r26 ; tblidxb2 r5, r6 } + { move r15, r16 ; st1 r25, r26 ; nor r5, r6, r7 } + { move r15, r16 ; st2 r25, r26 ; cmplts r5, r6, r7 } + { move r15, r16 ; st2 r25, r26 ; shru r5, r6, r7 } + { move r15, r16 ; st4 r25, r26 ; mula_ls_ls r5, r6, r7 } + { move r15, r16 ; sub r5, r6, r7 ; prefetch r25 } + { move r15, r16 ; tblidxb0 r5, r6 ; prefetch_l1 r25 } + { move r15, r16 ; tblidxb2 r5, r6 ; prefetch_l2 r25 } + { move r15, r16 ; v1cmpltui r5, r6, 5 } + { move r15, r16 ; v2cmples r5, r6, r7 } + { move r15, r16 ; v4packsc r5, r6, r7 } + { move r5, r6 ; add r15, r16, r17 ; prefetch_l3_fault r25 } + { move r5, r6 ; addx r15, r16, r17 ; st r25, r26 } + { move r5, r6 ; and r15, r16, r17 ; st r25, r26 } + { move r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 } + { move r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 } + { move r5, r6 ; cmplts r15, r16, r17 } + { move r5, r6 ; cmpne r15, r16, r17 ; ld r25, r26 } + { move r5, r6 ; fnop ; ld2u r25, r26 } + { move r5, r6 ; info 19 ; ld4s r25, r26 } + { move r5, r6 ; jalrp r15 ; ld2u r25, r26 } + { move r5, r6 ; jrp r15 ; ld4u r25, r26 } + { move r5, r6 ; ld r25, r26 ; nop } + { move r5, r6 ; ld1s r25, r26 ; jalrp r15 } + { move r5, r6 ; ld1u r25, r26 ; cmpleu r15, r16, r17 } + { move r5, r6 ; ld2s r25, r26 ; add r15, r16, r17 } + { move r5, r6 ; ld2s r25, r26 ; shrsi r15, r16, 5 } + { move r5, r6 ; ld2u r25, r26 ; shl r15, r16, r17 } + { move r5, r6 ; ld4s r25, r26 ; mnz r15, r16, r17 } + { move r5, r6 ; ld4u r25, r26 ; cmpne r15, r16, r17 } + { move r5, r6 ; ldnt1s_add r15, r16, 5 } + { move r5, r6 ; mnz r15, r16, r17 ; prefetch r25 } + { move r5, r6 ; movei r15, 5 ; prefetch_l1_fault r25 } + { move r5, r6 ; nop ; prefetch_l1_fault r25 } + { move r5, r6 ; or r15, r16, r17 ; prefetch_l2_fault r25 } + { move r5, r6 ; prefetch r25 ; rotli r15, r16, 5 } + { move r5, r6 ; prefetch_l1 r25 ; info 19 } + { move r5, r6 ; prefetch_l1_fault r25 ; cmples r15, r16, r17 } + { move r5, r6 ; prefetch_l2 r25 ; add r15, r16, r17 } + { move r5, r6 ; prefetch_l2 r25 ; shrsi r15, r16, 5 } + { move r5, r6 ; prefetch_l2_fault r25 ; shl1add r15, r16, r17 } + { move r5, r6 ; prefetch_l3 r25 ; movei r15, 5 } + { move r5, r6 ; prefetch_l3_fault r25 ; info 19 } + { move r5, r6 ; rotl r15, r16, r17 ; prefetch_l1 r25 } + { move r5, r6 ; shl r15, r16, r17 ; prefetch_l2 r25 } + { move r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 } + { move r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 } + { move r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + { move r5, r6 ; shrs r15, r16, r17 ; st1 r25, r26 } + { move r5, r6 ; shru r15, r16, r17 ; st4 r25, r26 } + { move r5, r6 ; st r25, r26 ; info 19 } + { move r5, r6 ; st1 r25, r26 ; cmples r15, r16, r17 } + { move r5, r6 ; st2 r15, r16 } + { move r5, r6 ; st2 r25, r26 ; shrs r15, r16, r17 } + { move r5, r6 ; st4 r25, r26 ; rotli r15, r16, 5 } + { move r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + { move r5, r6 ; v1maxu r15, r16, r17 } + { move r5, r6 ; v2shrs r15, r16, r17 } + { movei r15, 5 ; add r5, r6, r7 ; ld1u r25, r26 } + { movei r15, 5 ; addx r5, r6, r7 ; ld2s r25, r26 } + { movei r15, 5 ; and r5, r6, r7 ; ld2s r25, r26 } + { movei r15, 5 ; clz r5, r6 ; ld1u r25, r26 } + { movei r15, 5 ; cmovnez r5, r6, r7 ; ld2u r25, r26 } + { movei r15, 5 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 } + { movei r15, 5 ; cmpleu r5, r6, r7 ; prefetch_l1 r25 } + { movei r15, 5 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 } + { movei r15, 5 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 } + { movei r15, 5 ; fdouble_add_flags r5, r6, r7 } + { movei r15, 5 ; fsingle_pack1 r5, r6 ; prefetch_l1_fault r25 } + { movei r15, 5 ; ld r25, r26 ; cmovnez r5, r6, r7 } + { movei r15, 5 ; ld r25, r26 ; shl3add r5, r6, r7 } + { movei r15, 5 ; ld1s r25, r26 ; mul_hu_hu r5, r6, r7 } + { movei r15, 5 ; ld1u r25, r26 ; addx r5, r6, r7 } + { movei r15, 5 ; ld1u r25, r26 ; rotli r5, r6, 5 } + { movei r15, 5 ; ld2s r25, r26 ; fsingle_pack1 r5, r6 } + { movei r15, 5 ; ld2s r25, r26 ; tblidxb2 r5, r6 } + { movei r15, 5 ; ld2u r25, r26 ; nor r5, r6, r7 } + { movei r15, 5 ; ld4s r25, r26 ; cmplts r5, r6, r7 } + { movei r15, 5 ; ld4s r25, r26 ; shru r5, r6, r7 } + { movei r15, 5 ; ld4u r25, r26 ; mula_ls_ls r5, r6, r7 } + { movei r15, 5 ; mnz r5, r6, r7 ; ld4u r25, r26 } + { movei r15, 5 ; movei r5, 5 ; prefetch_l1 r25 } + { movei r15, 5 ; mul_hu_hu r5, r6, r7 ; ld4u r25, r26 } + { movei r15, 5 ; mul_lu_lu r5, r6, r7 ; ld4s r25, r26 } + { movei r15, 5 ; mula_hu_hu r5, r6, r7 ; ld2u r25, r26 } + { movei r15, 5 ; mula_lu_lu r5, r6, r7 ; ld2s r25, r26 } + { movei r15, 5 ; mulx r5, r6, r7 ; ld4s r25, r26 } + { movei r15, 5 ; nop ; prefetch r25 } + { movei r15, 5 ; or r5, r6, r7 ; prefetch_l1_fault r25 } + { movei r15, 5 ; prefetch r25 ; cmpeqi r5, r6, 5 } + { movei r15, 5 ; prefetch r25 ; shli r5, r6, 5 } + { movei r15, 5 ; prefetch_l1 r25 ; mul_lu_lu r5, r6, r7 } + { movei r15, 5 ; prefetch_l1_fault r25 ; and r5, r6, r7 } + { movei r15, 5 ; prefetch_l1_fault r25 ; shl1add r5, r6, r7 } + { movei r15, 5 ; prefetch_l2 r25 ; mnz r5, r6, r7 } + { movei r15, 5 ; prefetch_l2 r25 ; xor r5, r6, r7 } + { movei r15, 5 ; prefetch_l2_fault r25 ; pcnt r5, r6 } + { movei r15, 5 ; prefetch_l3 r25 ; cmpltu r5, r6, r7 } + { movei r15, 5 ; prefetch_l3 r25 ; sub r5, r6, r7 } + { movei r15, 5 ; prefetch_l3_fault r25 ; mulax r5, r6, r7 } + { movei r15, 5 ; revbits r5, r6 ; prefetch_l1_fault r25 } + { movei r15, 5 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 } + { movei r15, 5 ; shl r5, r6, r7 ; prefetch_l3_fault r25 } + { movei r15, 5 ; shl1addx r5, r6, r7 ; st r25, r26 } + { movei r15, 5 ; shl2addx r5, r6, r7 ; st2 r25, r26 } + { movei r15, 5 ; shl3addx r5, r6, r7 } + { movei r15, 5 ; shrs r5, r6, r7 } + { movei r15, 5 ; shrui r5, r6, 5 ; ld1s r25, r26 } + { movei r15, 5 ; st r25, r26 ; fsingle_pack1 r5, r6 } + { movei r15, 5 ; st r25, r26 ; tblidxb2 r5, r6 } + { movei r15, 5 ; st1 r25, r26 ; nor r5, r6, r7 } + { movei r15, 5 ; st2 r25, r26 ; cmplts r5, r6, r7 } + { movei r15, 5 ; st2 r25, r26 ; shru r5, r6, r7 } + { movei r15, 5 ; st4 r25, r26 ; mula_ls_ls r5, r6, r7 } + { movei r15, 5 ; sub r5, r6, r7 ; prefetch r25 } + { movei r15, 5 ; tblidxb0 r5, r6 ; prefetch_l1 r25 } + { movei r15, 5 ; tblidxb2 r5, r6 ; prefetch_l2 r25 } + { movei r15, 5 ; v1cmpltui r5, r6, 5 } + { movei r15, 5 ; v2cmples r5, r6, r7 } + { movei r15, 5 ; v4packsc r5, r6, r7 } + { movei r5, 5 ; add r15, r16, r17 ; prefetch_l3_fault r25 } + { movei r5, 5 ; addx r15, r16, r17 ; st r25, r26 } + { movei r5, 5 ; and r15, r16, r17 ; st r25, r26 } + { movei r5, 5 ; cmpeq r15, r16, r17 ; st2 r25, r26 } + { movei r5, 5 ; cmples r15, r16, r17 ; st2 r25, r26 } + { movei r5, 5 ; cmplts r15, r16, r17 } + { movei r5, 5 ; cmpne r15, r16, r17 ; ld r25, r26 } + { movei r5, 5 ; fnop ; ld2u r25, r26 } + { movei r5, 5 ; info 19 ; ld4s r25, r26 } + { movei r5, 5 ; jalrp r15 ; ld2u r25, r26 } + { movei r5, 5 ; jrp r15 ; ld4u r25, r26 } + { movei r5, 5 ; ld r25, r26 ; nop } + { movei r5, 5 ; ld1s r25, r26 ; jalrp r15 } + { movei r5, 5 ; ld1u r25, r26 ; cmpleu r15, r16, r17 } + { movei r5, 5 ; ld2s r25, r26 ; add r15, r16, r17 } + { movei r5, 5 ; ld2s r25, r26 ; shrsi r15, r16, 5 } + { movei r5, 5 ; ld2u r25, r26 ; shl r15, r16, r17 } + { movei r5, 5 ; ld4s r25, r26 ; mnz r15, r16, r17 } + { movei r5, 5 ; ld4u r25, r26 ; cmpne r15, r16, r17 } + { movei r5, 5 ; ldnt1s_add r15, r16, 5 } + { movei r5, 5 ; mnz r15, r16, r17 ; prefetch r25 } + { movei r5, 5 ; movei r15, 5 ; prefetch_l1_fault r25 } + { movei r5, 5 ; nop ; prefetch_l1_fault r25 } + { movei r5, 5 ; or r15, r16, r17 ; prefetch_l2_fault r25 } + { movei r5, 5 ; prefetch r25 ; rotli r15, r16, 5 } + { movei r5, 5 ; prefetch_l1 r25 ; info 19 } + { movei r5, 5 ; prefetch_l1_fault r25 ; cmples r15, r16, r17 } + { movei r5, 5 ; prefetch_l2 r25 ; add r15, r16, r17 } + { movei r5, 5 ; prefetch_l2 r25 ; shrsi r15, r16, 5 } + { movei r5, 5 ; prefetch_l2_fault r25 ; shl1add r15, r16, r17 } + { movei r5, 5 ; prefetch_l3 r25 ; movei r15, 5 } + { movei r5, 5 ; prefetch_l3_fault r25 ; info 19 } + { movei r5, 5 ; rotl r15, r16, r17 ; prefetch_l1 r25 } + { movei r5, 5 ; shl r15, r16, r17 ; prefetch_l2 r25 } + { movei r5, 5 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 } + { movei r5, 5 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 } + { movei r5, 5 ; shl3addx r15, r16, r17 ; st1 r25, r26 } + { movei r5, 5 ; shrs r15, r16, r17 ; st1 r25, r26 } + { movei r5, 5 ; shru r15, r16, r17 ; st4 r25, r26 } + { movei r5, 5 ; st r25, r26 ; info 19 } + { movei r5, 5 ; st1 r25, r26 ; cmples r15, r16, r17 } + { movei r5, 5 ; st2 r15, r16 } + { movei r5, 5 ; st2 r25, r26 ; shrs r15, r16, r17 } + { movei r5, 5 ; st4 r25, r26 ; rotli r15, r16, 5 } + { movei r5, 5 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } + { movei r5, 5 ; v1maxu r15, r16, r17 } + { movei r5, 5 ; v2shrs r15, r16, r17 } + { moveli r15, 0x1234 ; addli r5, r6, 0x1234 } + { moveli r15, 0x1234 ; fdouble_pack2 r5, r6, r7 } + { moveli r15, 0x1234 ; mulx r5, r6, r7 } + { moveli r15, 0x1234 ; v1avgu r5, r6, r7 } + { moveli r15, 0x1234 ; v1subuc r5, r6, r7 } + { moveli r15, 0x1234 ; v2shru r5, r6, r7 } + { moveli r5, 0x1234 ; dtlbpr r15 } + { moveli r5, 0x1234 ; ldna_add r15, r16, 5 } + { moveli r5, 0x1234 ; prefetch_l3_fault r15 } + { moveli r5, 0x1234 ; v1add r15, r16, r17 } + { moveli r5, 0x1234 ; v2int_h r15, r16, r17 } + { mtspr 0x5, r16 ; addxsc r5, r6, r7 } + { mtspr 0x5, r16 ; fnop } + { mtspr 0x5, r16 ; or r5, r6, r7 } + { mtspr 0x5, r16 ; v1cmpleu r5, r6, r7 } + { mtspr 0x5, r16 ; v2adiffs r5, r6, r7 } + { mtspr 0x5, r16 ; v4add r5, r6, r7 } + { mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1 r25 } + { mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 } + { mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 } + { mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 } + { mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 } + { mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 } + { mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 } + { mul_hs_hs r5, r6, r7 ; fnop } + { mul_hs_hs r5, r6, r7 ; infol 0x1234 } + { mul_hs_hs r5, r6, r7 ; jalrp r15 } + { mul_hs_hs r5, r6, r7 ; ld r25, r26 ; add r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; ld r25, r26 ; shrsi r15, r16, 5 } + { mul_hs_hs r5, r6, r7 ; ld1s r25, r26 ; shl1add r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; ld1u r25, r26 ; move r15, r16 } + { mul_hs_hs r5, r6, r7 ; ld2s r25, r26 ; fnop } + { mul_hs_hs r5, r6, r7 ; ld2u r25, r26 ; andi r15, r16, 5 } + { mul_hs_hs r5, r6, r7 ; ld2u r25, r26 ; xor r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; ld4s r25, r26 ; shl3add r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; ld4u r25, r26 ; nor r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; lnk r15 ; ld1u r25, r26 } + { mul_hs_hs r5, r6, r7 ; move r15, r16 ; ld1u r25, r26 } + { mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; ld1u r25, r26 } + { mul_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; ld2u r25, r26 } + { mul_hs_hs r5, r6, r7 ; prefetch r25 ; and r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; prefetch r25 ; subx r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; prefetch_l1 r25 ; rotli r15, r16, 5 } + { mul_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 ; mnz r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 ; fnop } + { mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 ; cmpeq r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 } + { mul_hs_hs r5, r6, r7 ; prefetch_l3 r25 ; shli r15, r16, 5 } + { mul_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 ; rotli r15, r16, 5 } + { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 } + { mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld2u r25, r26 } + { mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 } + { mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l1 r25 } + { mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 } + { mul_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2 r25 } + { mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 } + { mul_hs_hs r5, r6, r7 ; st r25, r26 ; rotli r15, r16, 5 } + { mul_hs_hs r5, r6, r7 ; st1 r25, r26 ; mnz r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; st2 r25, r26 ; cmpne r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; st4 r25, r26 ; and r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; st4 r25, r26 ; subx r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l1 r25 } + { mul_hs_hs r5, r6, r7 ; v2add r15, r16, r17 } + { mul_hs_hs r5, r6, r7 ; v4shru r15, r16, r17 } + { mul_hs_hu r5, r6, r7 ; cmpltsi r15, r16, 5 } + { mul_hs_hu r5, r6, r7 ; ld2u_add r15, r16, 5 } + { mul_hs_hu r5, r6, r7 ; prefetch_add_l3 r15, 5 } + { mul_hs_hu r5, r6, r7 ; stnt2_add r15, r16, 5 } + { mul_hs_hu r5, r6, r7 ; v2cmples r15, r16, r17 } + { mul_hs_hu r5, r6, r7 ; xori r15, r16, 5 } + { mul_hs_ls r5, r6, r7 ; ill } + { mul_hs_ls r5, r6, r7 ; mf } + { mul_hs_ls r5, r6, r7 ; shrsi r15, r16, 5 } + { mul_hs_ls r5, r6, r7 ; v1minu r15, r16, r17 } + { mul_hs_ls r5, r6, r7 ; v2shru r15, r16, r17 } + { mul_hs_lu r5, r6, r7 ; dblalign6 r15, r16, r17 } + { mul_hs_lu r5, r6, r7 ; ldna r15, r16 } + { mul_hs_lu r5, r6, r7 ; prefetch_l3 r15 } + { mul_hs_lu r5, r6, r7 ; subxsc r15, r16, r17 } + { mul_hs_lu r5, r6, r7 ; v2cmpne r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } + { mul_hu_hu r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 } + { mul_hu_hu r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 } + { mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1 r25 } + { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1 r25 } + { mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } + { mul_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } + { mul_hu_hu r5, r6, r7 ; fetchor4 r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; ill ; st2 r25, r26 } + { mul_hu_hu r5, r6, r7 ; jalr r15 ; st1 r25, r26 } + { mul_hu_hu r5, r6, r7 ; jr r15 ; st4 r25, r26 } + { mul_hu_hu r5, r6, r7 ; ld r25, r26 ; jalrp r15 } + { mul_hu_hu r5, r6, r7 ; ld1s r25, r26 ; cmplts r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; ld1u r25, r26 ; addi r15, r16, 5 } + { mul_hu_hu r5, r6, r7 ; ld1u r25, r26 ; shru r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; ld2s r25, r26 ; shl1add r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; ld2u r25, r26 ; move r15, r16 } + { mul_hu_hu r5, r6, r7 ; ld4s r25, r26 ; fnop } + { mul_hu_hu r5, r6, r7 ; ld4u r25, r26 ; andi r15, r16, 5 } + { mul_hu_hu r5, r6, r7 ; ld4u r25, r26 ; xor r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; mfspr r16, 0x5 } + { mul_hu_hu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } + { mul_hu_hu r5, r6, r7 ; nop ; ld1s r25, r26 } + { mul_hu_hu r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 } + { mul_hu_hu r5, r6, r7 ; prefetch r25 ; mnz r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; prefetch_l1 r25 ; cmples r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; prefetch_l1_fault r25 ; add r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; prefetch_l1_fault r25 ; shrsi r15, r16, 5 } + { mul_hu_hu r5, r6, r7 ; prefetch_l2 r25 ; shl1add r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; prefetch_l2_fault r25 ; movei r15, 5 } + { mul_hu_hu r5, r6, r7 ; prefetch_l3 r25 ; info 19 } + { mul_hu_hu r5, r6, r7 ; prefetch_l3_fault r25 ; cmples r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 } + { mul_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } + { mul_hu_hu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } + { mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } + { mul_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } + { mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 } + { mul_hu_hu r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } + { mul_hu_hu r5, r6, r7 ; st r25, r26 ; cmples r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; st1 r25, r26 ; add r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; st1 r25, r26 ; shrsi r15, r16, 5 } + { mul_hu_hu r5, r6, r7 ; st2 r25, r26 ; shl r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; st4 r25, r26 ; mnz r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 } + { mul_hu_hu r5, r6, r7 ; v1cmpleu r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; v2mnz r15, r16, r17 } + { mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 } + { mul_hu_ls r5, r6, r7 ; finv r15 } + { mul_hu_ls r5, r6, r7 ; ldnt4s_add r15, r16, 5 } + { mul_hu_ls r5, r6, r7 ; shl3addx r15, r16, r17 } + { mul_hu_ls r5, r6, r7 ; v1cmpne r15, r16, r17 } + { mul_hu_ls r5, r6, r7 ; v2shl r15, r16, r17 } + { mul_hu_lu r5, r6, r7 ; cmpltu r15, r16, r17 } + { mul_hu_lu r5, r6, r7 ; ld4s r15, r16 } + { mul_hu_lu r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + { mul_hu_lu r5, r6, r7 ; stnt4 r15, r16 } + { mul_hu_lu r5, r6, r7 ; v2cmpleu r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 } + { mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 } + { mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 } + { mul_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } + { mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 } + { mul_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 } + { mul_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } + { mul_ls_ls r5, r6, r7 ; fetchaddgez r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; ill ; prefetch_l2_fault r25 } + { mul_ls_ls r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 } + { mul_ls_ls r5, r6, r7 ; jr r15 ; prefetch_l3 r25 } + { mul_ls_ls r5, r6, r7 ; ld r25, r26 ; cmpne r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; ld1s r25, r26 ; andi r15, r16, 5 } + { mul_ls_ls r5, r6, r7 ; ld1s r25, r26 ; xor r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; ld1u r25, r26 ; shl3add r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; ld2s r25, r26 ; nor r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; ld2u r25, r26 ; jalrp r15 } + { mul_ls_ls r5, r6, r7 ; ld4s r25, r26 ; cmpleu r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; ld4u r25, r26 ; add r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; ld4u r25, r26 ; shrsi r15, r16, 5 } + { mul_ls_ls r5, r6, r7 ; lnk r15 ; st1 r25, r26 } + { mul_ls_ls r5, r6, r7 ; move r15, r16 ; st1 r25, r26 } + { mul_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 } + { mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 } + { mul_ls_ls r5, r6, r7 ; prefetch r25 ; jalr r15 } + { mul_ls_ls r5, r6, r7 ; prefetch_l1 r25 ; addxi r15, r16, 5 } + { mul_ls_ls r5, r6, r7 ; prefetch_l1 r25 ; sub r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 ; shl2addx r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; prefetch_l2 r25 ; nor r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; prefetch_l2_fault r25 ; jr r15 } + { mul_ls_ls r5, r6, r7 ; prefetch_l3 r25 ; cmpltsi r15, r16, 5 } + { mul_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 ; addxi r15, r16, 5 } + { mul_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 ; sub r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 } + { mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 } + { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 } + { mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } + { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 } + { mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 } + { mul_ls_ls r5, r6, r7 ; st r25, r26 ; addxi r15, r16, 5 } + { mul_ls_ls r5, r6, r7 ; st r25, r26 ; sub r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; st1 r25, r26 ; shl2addx r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; st2 r25, r26 ; nop } + { mul_ls_ls r5, r6, r7 ; st4 r25, r26 ; jalr r15 } + { mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } + { mul_ls_ls r5, r6, r7 ; v1addi r15, r16, 5 } + { mul_ls_ls r5, r6, r7 ; v2int_l r15, r16, r17 } + { mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } + { mul_ls_lu r5, r6, r7 ; fetchaddgez4 r15, r16, r17 } + { mul_ls_lu r5, r6, r7 ; ldnt2s r15, r16 } + { mul_ls_lu r5, r6, r7 ; shl1add r15, r16, r17 } + { mul_ls_lu r5, r6, r7 ; v1cmpleu r15, r16, r17 } + { mul_ls_lu r5, r6, r7 ; v2mnz r15, r16, r17 } + { mul_lu_lu r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3 r25 } + { mul_lu_lu r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3_fault r25 } + { mul_lu_lu r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 } + { mul_lu_lu r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 } + { mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 } + { mul_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 } + { mul_lu_lu r5, r6, r7 ; cmpltui r15, r16, 5 } + { mul_lu_lu r5, r6, r7 ; fnop ; ld2s r25, r26 } + { mul_lu_lu r5, r6, r7 ; info 19 ; ld2u r25, r26 } + { mul_lu_lu r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 } + { mul_lu_lu r5, r6, r7 ; jrp r15 ; ld4s r25, r26 } + { mul_lu_lu r5, r6, r7 ; ld r25, r26 ; mz r15, r16, r17 } + { mul_lu_lu r5, r6, r7 ; ld1s r25, r26 ; jalr r15 } + { mul_lu_lu r5, r6, r7 ; ld1u r25, r26 ; cmples r15, r16, r17 } + { mul_lu_lu r5, r6, r7 ; ld2s r15, r16 } + { mul_lu_lu r5, r6, r7 ; ld2s r25, r26 ; shrs r15, r16, r17 } + { mul_lu_lu r5, r6, r7 ; ld2u r25, r26 ; rotli r15, r16, 5 } + { mul_lu_lu r5, r6, r7 ; ld4s r25, r26 ; lnk r15 } + { mul_lu_lu r5, r6, r7 ; ld4u r25, r26 ; cmpltu r15, r16, r17 } + { mul_lu_lu r5, r6, r7 ; ldnt1s r15, r16 } + { mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld4u r25, r26 } + { mul_lu_lu r5, r6, r7 ; movei r15, 5 ; prefetch_l1 r25 } + { mul_lu_lu r5, r6, r7 ; nop ; prefetch_l1 r25 } + { mul_lu_lu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 } + { mul_lu_lu r5, r6, r7 ; prefetch r25 ; rotl r15, r16, r17 } + { mul_lu_lu r5, r6, r7 ; prefetch_l1 r25 ; ill } + { mul_lu_lu r5, r6, r7 ; prefetch_l1_fault r25 ; cmpeqi r15, r16, 5 } + { mul_lu_lu r5, r6, r7 ; prefetch_l2 r15 } + { mul_lu_lu r5, r6, r7 ; prefetch_l2 r25 ; shrs r15, r16, r17 } + { mul_lu_lu r5, r6, r7 ; prefetch_l2_fault r25 ; shl r15, r16, r17 } + { mul_lu_lu r5, r6, r7 ; prefetch_l3 r25 ; move r15, r16 } + { mul_lu_lu r5, r6, r7 ; prefetch_l3_fault r25 ; ill } + { mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 } + { mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l1_fault r25 } + { mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 } + { mul_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 } + { mul_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; st r25, r26 } + { mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 } + { mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; st2 r25, r26 } + { mul_lu_lu r5, r6, r7 ; st r25, r26 ; ill } + { mul_lu_lu r5, r6, r7 ; st1 r25, r26 ; cmpeqi r15, r16, 5 } + { mul_lu_lu r5, r6, r7 ; st1_add r15, r16, 5 } + { mul_lu_lu r5, r6, r7 ; st2 r25, r26 ; shli r15, r16, 5 } + { mul_lu_lu r5, r6, r7 ; st4 r25, r26 ; rotl r15, r16, r17 } + { mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3 r25 } + { mul_lu_lu r5, r6, r7 ; v1int_l r15, r16, r17 } + { mul_lu_lu r5, r6, r7 ; v2shlsc r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 } + { mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 } + { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld1u r25, r26 } + { mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2u r25, r26 } + { mula_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; ld2u r25, r26 } + { mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 } + { mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1 r25 } + { mula_hs_hs r5, r6, r7 ; fetchaddgez4 r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; ill ; prefetch_l3 r25 } + { mula_hs_hs r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 } + { mula_hs_hs r5, r6, r7 ; jr r15 ; prefetch_l3_fault r25 } + { mula_hs_hs r5, r6, r7 ; ld r25, r26 ; fnop } + { mula_hs_hs r5, r6, r7 ; ld1s r25, r26 ; cmpeq r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; ld1s r25, r26 } + { mula_hs_hs r5, r6, r7 ; ld1u r25, r26 ; shl3addx r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; ld2s r25, r26 ; or r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; ld2u r25, r26 ; jr r15 } + { mula_hs_hs r5, r6, r7 ; ld4s r25, r26 ; cmplts r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; ld4u r25, r26 ; addi r15, r16, 5 } + { mula_hs_hs r5, r6, r7 ; ld4u r25, r26 ; shru r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; lnk r15 ; st2 r25, r26 } + { mula_hs_hs r5, r6, r7 ; move r15, r16 ; st2 r25, r26 } + { mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; st2 r25, r26 } + { mula_hs_hs r5, r6, r7 ; nor r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; prefetch r25 ; jalrp r15 } + { mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 ; and r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 ; subx r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 ; shl3add r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; prefetch_l2 r25 ; or r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 ; jrp r15 } + { mula_hs_hs r5, r6, r7 ; prefetch_l3 r25 ; cmpltu r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 ; and r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 ; subx r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; st4 r25, r26 } + { mula_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 } + { mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 } + { mula_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 } + { mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 } + { mula_hs_hs r5, r6, r7 ; st r25, r26 ; and r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; st r25, r26 ; subx r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; st1 r25, r26 ; shl3add r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; st2 r25, r26 ; nor r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; st4 r25, r26 ; jalrp r15 } + { mula_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 } + { mula_hs_hs r5, r6, r7 ; v1adduc r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; v2maxs r15, r16, r17 } + { mula_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 } + { mula_hs_hu r5, r6, r7 ; fetchand r15, r16, r17 } + { mula_hs_hu r5, r6, r7 ; ldnt2s_add r15, r16, 5 } + { mula_hs_hu r5, r6, r7 ; shl1addx r15, r16, r17 } + { mula_hs_hu r5, r6, r7 ; v1cmplts r15, r16, r17 } + { mula_hs_hu r5, r6, r7 ; v2mz r15, r16, r17 } + { mula_hs_ls r5, r6, r7 ; cmples r15, r16, r17 } + { mula_hs_ls r5, r6, r7 ; ld2s r15, r16 } + { mula_hs_ls r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + { mula_hs_ls r5, r6, r7 ; stnt1 r15, r16 } + { mula_hs_ls r5, r6, r7 ; v2addsc r15, r16, r17 } + { mula_hs_ls r5, r6, r7 ; v4subsc r15, r16, r17 } + { mula_hs_lu r5, r6, r7 ; flushwb } + { mula_hs_lu r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + { mula_hs_lu r5, r6, r7 ; shlx r15, r16, r17 } + { mula_hs_lu r5, r6, r7 ; v1int_l r15, r16, r17 } + { mula_hs_lu r5, r6, r7 ; v2shlsc r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 } + { mula_hu_hu r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 } + { mula_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 } + { mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 } + { mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2s r25, r26 } + { mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 } + { mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 } + { mula_hu_hu r5, r6, r7 ; fnop ; prefetch_l2 r25 } + { mula_hu_hu r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 } + { mula_hu_hu r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 } + { mula_hu_hu r5, r6, r7 ; jrp r15 ; prefetch_l3 r25 } + { mula_hu_hu r5, r6, r7 ; ld r25, r26 ; shl1add r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; ld1s r25, r26 ; movei r15, 5 } + { mula_hu_hu r5, r6, r7 ; ld1u r25, r26 ; ill } + { mula_hu_hu r5, r6, r7 ; ld2s r25, r26 ; cmpeq r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; ld2s r25, r26 } + { mula_hu_hu r5, r6, r7 ; ld2u r25, r26 ; shl3addx r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; ld4s r25, r26 ; or r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; ld4u r25, r26 ; jr r15 } + { mula_hu_hu r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + { mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3_fault r25 } + { mula_hu_hu r5, r6, r7 ; movei r15, 5 ; st1 r25, r26 } + { mula_hu_hu r5, r6, r7 ; nop ; st1 r25, r26 } + { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 } + { mula_hu_hu r5, r6, r7 ; prefetch r25 ; shl3add r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; prefetch_l1 r25 ; mnz r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; prefetch_l1_fault r25 ; fnop } + { mula_hu_hu r5, r6, r7 ; prefetch_l2 r25 ; cmpeq r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; prefetch_l2 r25 } + { mula_hu_hu r5, r6, r7 ; prefetch_l2_fault r25 ; shli r15, r16, 5 } + { mula_hu_hu r5, r6, r7 ; prefetch_l3 r25 ; rotli r15, r16, 5 } + { mula_hu_hu r5, r6, r7 ; prefetch_l3_fault r25 ; mnz r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 } + { mula_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 } + { mula_hu_hu r5, r6, r7 ; shl1addx r15, r16, r17 ; st4 r25, r26 } + { mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; ld r25, r26 } + { mula_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 } + { mula_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 } + { mula_hu_hu r5, r6, r7 ; shrui r15, r16, 5 ; ld2u r25, r26 } + { mula_hu_hu r5, r6, r7 ; st r25, r26 ; mnz r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; st1 r25, r26 ; fnop } + { mula_hu_hu r5, r6, r7 ; st2 r25, r26 ; andi r15, r16, 5 } + { mula_hu_hu r5, r6, r7 ; st2 r25, r26 ; xor r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; st4 r25, r26 ; shl3add r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 } + { mula_hu_hu r5, r6, r7 ; v1shl r15, r16, r17 } + { mula_hu_hu r5, r6, r7 ; v4add r15, r16, r17 } + { mula_hu_ls r5, r6, r7 ; andi r15, r16, 5 } + { mula_hu_ls r5, r6, r7 ; ld r15, r16 } + { mula_hu_ls r5, r6, r7 ; nor r15, r16, r17 } + { mula_hu_ls r5, r6, r7 ; st2_add r15, r16, 5 } + { mula_hu_ls r5, r6, r7 ; v1shrui r15, r16, 5 } + { mula_hu_ls r5, r6, r7 ; v4shl r15, r16, r17 } + { mula_hu_lu r5, r6, r7 ; fetchand4 r15, r16, r17 } + { mula_hu_lu r5, r6, r7 ; ldnt2u r15, r16 } + { mula_hu_lu r5, r6, r7 ; shl2add r15, r16, r17 } + { mula_hu_lu r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + { mula_hu_lu r5, r6, r7 ; v2packh r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 } + { mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; st1 r25, r26 } + { mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 } + { mula_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 } + { mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 } + { mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld r25, r26 } + { mula_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 } + { mula_ls_ls r5, r6, r7 ; fnop ; ld4s r25, r26 } + { mula_ls_ls r5, r6, r7 ; info 19 ; ld4u r25, r26 } + { mula_ls_ls r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 } + { mula_ls_ls r5, r6, r7 ; jrp r15 ; prefetch r25 } + { mula_ls_ls r5, r6, r7 ; ld r25, r26 ; nor r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; ld1s r25, r26 ; jr r15 } + { mula_ls_ls r5, r6, r7 ; ld1u r25, r26 ; cmplts r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; ld2s r25, r26 ; addi r15, r16, 5 } + { mula_ls_ls r5, r6, r7 ; ld2s r25, r26 ; shru r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; ld2u r25, r26 ; shl1add r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; ld4s r25, r26 ; move r15, r16 } + { mula_ls_ls r5, r6, r7 ; ld4u r25, r26 ; fnop } + { mula_ls_ls r5, r6, r7 ; ldnt1u r15, r16 } + { mula_ls_ls r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1 r25 } + { mula_ls_ls r5, r6, r7 ; movei r15, 5 ; prefetch_l2 r25 } + { mula_ls_ls r5, r6, r7 ; nop ; prefetch_l2 r25 } + { mula_ls_ls r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3 r25 } + { mula_ls_ls r5, r6, r7 ; prefetch r25 ; shl r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; prefetch_l1 r25 ; jalr r15 } + { mula_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 ; cmpleu r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; prefetch_l2 r25 ; addi r15, r16, 5 } + { mula_ls_ls r5, r6, r7 ; prefetch_l2 r25 ; shru r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; prefetch_l2_fault r25 ; shl1addx r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 ; mz r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 ; jalr r15 } + { mula_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 } + { mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 } + { mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 } + { mula_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; st r25, r26 } + { mula_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; st2 r25, r26 } + { mula_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 } + { mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; st r25, r26 ; jalr r15 } + { mula_ls_ls r5, r6, r7 ; st1 r25, r26 ; cmpleu r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; st2 r25, r26 ; add r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; st2 r25, r26 ; shrsi r15, r16, 5 } + { mula_ls_ls r5, r6, r7 ; st4 r25, r26 ; shl r15, r16, r17 } + { mula_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 } + { mula_ls_ls r5, r6, r7 ; v1maxui r15, r16, 5 } + { mula_ls_ls r5, r6, r7 ; v2shrsi r15, r16, 5 } + { mula_ls_lu r5, r6, r7 ; addx r15, r16, r17 } + { mula_ls_lu r5, r6, r7 ; iret } + { mula_ls_lu r5, r6, r7 ; movei r15, 5 } + { mula_ls_lu r5, r6, r7 ; shruxi r15, r16, 5 } + { mula_ls_lu r5, r6, r7 ; v1shl r15, r16, r17 } + { mula_ls_lu r5, r6, r7 ; v4add r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + { mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1 r25 } + { mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1 r25 } + { mula_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 } + { mula_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 } + { mula_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } + { mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 } + { mula_lu_lu r5, r6, r7 ; fnop ; st4 r25, r26 } + { mula_lu_lu r5, r6, r7 ; info 19 } + { mula_lu_lu r5, r6, r7 ; jalrp r15 ; st4 r25, r26 } + { mula_lu_lu r5, r6, r7 ; ld r15, r16 } + { mula_lu_lu r5, r6, r7 ; ld r25, r26 ; shrs r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; ld1s r25, r26 ; shl r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; ld1u r25, r26 ; mnz r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; ld2s r25, r26 ; cmpne r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; ld2u r25, r26 ; and r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; ld2u r25, r26 ; subx r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; ld4s r25, r26 ; shl2addx r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; ld4u r25, r26 ; nop } + { mula_lu_lu r5, r6, r7 ; lnk r15 ; ld1s r25, r26 } + { mula_lu_lu r5, r6, r7 ; move r15, r16 ; ld1s r25, r26 } + { mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; ld1s r25, r26 } + { mula_lu_lu r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 } + { mula_lu_lu r5, r6, r7 ; prefetch r25 ; addxi r15, r16, 5 } + { mula_lu_lu r5, r6, r7 ; prefetch r25 ; sub r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; prefetch_l1 r25 ; rotl r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; prefetch_l1_fault r25 ; lnk r15 } + { mula_lu_lu r5, r6, r7 ; prefetch_l2 r25 ; cmpne r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; prefetch_l2_fault r25 ; andi r15, r16, 5 } + { mula_lu_lu r5, r6, r7 ; prefetch_l2_fault r25 ; xor r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; prefetch_l3 r25 ; shl3addx r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; prefetch_l3_fault r25 ; rotl r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld1u r25, r26 } + { mula_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 } + { mula_lu_lu r5, r6, r7 ; shl2add r15, r16, r17 ; ld4s r25, r26 } + { mula_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 } + { mula_lu_lu r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 } + { mula_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 } + { mula_lu_lu r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 } + { mula_lu_lu r5, r6, r7 ; st r25, r26 ; rotl r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; st1 r25, r26 ; lnk r15 } + { mula_lu_lu r5, r6, r7 ; st2 r25, r26 ; cmpltu r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; st4 r25, r26 ; addxi r15, r16, 5 } + { mula_lu_lu r5, r6, r7 ; st4 r25, r26 ; sub r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 } + { mula_lu_lu r5, r6, r7 ; v1subuc r15, r16, r17 } + { mula_lu_lu r5, r6, r7 ; v4shrs r15, r16, r17 } + { mulax r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 } + { mulax r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 } + { mulax r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 } + { mulax r5, r6, r7 ; cmpeq r15, r16, r17 } + { mulax r5, r6, r7 ; cmples r15, r16, r17 } + { mulax r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 } + { mulax r5, r6, r7 ; cmpne r15, r16, r17 ; ld1u r25, r26 } + { mulax r5, r6, r7 ; fnop ; ld4u r25, r26 } + { mulax r5, r6, r7 ; info 19 ; prefetch r25 } + { mulax r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 } + { mulax r5, r6, r7 ; jrp r15 ; prefetch_l1 r25 } + { mulax r5, r6, r7 ; ld r25, r26 ; or r15, r16, r17 } + { mulax r5, r6, r7 ; ld1s r25, r26 ; jrp r15 } + { mulax r5, r6, r7 ; ld1u r25, r26 ; cmpltsi r15, r16, 5 } + { mulax r5, r6, r7 ; ld2s r25, r26 ; addx r15, r16, r17 } + { mulax r5, r6, r7 ; ld2s r25, r26 ; shrui r15, r16, 5 } + { mulax r5, r6, r7 ; ld2u r25, r26 ; shl1addx r15, r16, r17 } + { mulax r5, r6, r7 ; ld4s r25, r26 ; movei r15, 5 } + { mulax r5, r6, r7 ; ld4u r25, r26 ; ill } + { mulax r5, r6, r7 ; ldnt1u_add r15, r16, 5 } + { mulax r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 } + { mulax r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 } + { mulax r5, r6, r7 ; nop ; prefetch_l2_fault r25 } + { mulax r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3_fault r25 } + { mulax r5, r6, r7 ; prefetch r25 ; shl1add r15, r16, r17 } + { mulax r5, r6, r7 ; prefetch_l1 r25 ; jalrp r15 } + { mulax r5, r6, r7 ; prefetch_l1_fault r25 ; cmplts r15, r16, r17 } + { mulax r5, r6, r7 ; prefetch_l2 r25 ; addx r15, r16, r17 } + { mulax r5, r6, r7 ; prefetch_l2 r25 ; shrui r15, r16, 5 } + { mulax r5, r6, r7 ; prefetch_l2_fault r25 ; shl2add r15, r16, r17 } + { mulax r5, r6, r7 ; prefetch_l3 r25 ; nop } + { mulax r5, r6, r7 ; prefetch_l3_fault r25 ; jalrp r15 } + { mulax r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 } + { mulax r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l3 r25 } + { mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 } + { mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 } + { mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; st4 r25, r26 } + { mulax r5, r6, r7 ; shrs r15, r16, r17 ; st4 r25, r26 } + { mulax r5, r6, r7 ; shrui r15, r16, 5 ; ld r25, r26 } + { mulax r5, r6, r7 ; st r25, r26 ; jalrp r15 } + { mulax r5, r6, r7 ; st1 r25, r26 ; cmplts r15, r16, r17 } + { mulax r5, r6, r7 ; st2 r25, r26 ; addi r15, r16, 5 } + { mulax r5, r6, r7 ; st2 r25, r26 ; shru r15, r16, r17 } + { mulax r5, r6, r7 ; st4 r25, r26 ; shl1add r15, r16, r17 } + { mulax r5, r6, r7 ; sub r15, r16, r17 ; st1 r25, r26 } + { mulax r5, r6, r7 ; v1minu r15, r16, r17 } + { mulax r5, r6, r7 ; v2shru r15, r16, r17 } + { mulx r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 } + { mulx r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 } + { mulx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + { mulx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } + { mulx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + { mulx r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 } + { mulx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 } + { mulx r5, r6, r7 ; fetchor r15, r16, r17 } + { mulx r5, r6, r7 ; ill ; st1 r25, r26 } + { mulx r5, r6, r7 ; jalr r15 ; st r25, r26 } + { mulx r5, r6, r7 ; jr r15 ; st2 r25, r26 } + { mulx r5, r6, r7 ; ld r25, r26 ; jalr r15 } + { mulx r5, r6, r7 ; ld1s r25, r26 ; cmpleu r15, r16, r17 } + { mulx r5, r6, r7 ; ld1u r25, r26 ; add r15, r16, r17 } + { mulx r5, r6, r7 ; ld1u r25, r26 ; shrsi r15, r16, 5 } + { mulx r5, r6, r7 ; ld2s r25, r26 ; shl r15, r16, r17 } + { mulx r5, r6, r7 ; ld2u r25, r26 ; mnz r15, r16, r17 } + { mulx r5, r6, r7 ; ld4s r25, r26 ; cmpne r15, r16, r17 } + { mulx r5, r6, r7 ; ld4u r25, r26 ; and r15, r16, r17 } + { mulx r5, r6, r7 ; ld4u r25, r26 ; subx r15, r16, r17 } + { mulx r5, r6, r7 ; mf } + { mulx r5, r6, r7 ; movei r15, 5 ; ld r25, r26 } + { mulx r5, r6, r7 ; nop ; ld r25, r26 } + { mulx r5, r6, r7 ; or r15, r16, r17 ; ld1u r25, r26 } + { mulx r5, r6, r7 ; prefetch r25 ; lnk r15 } + { mulx r5, r6, r7 ; prefetch_l1 r25 ; cmpeqi r15, r16, 5 } + { mulx r5, r6, r7 ; prefetch_l1_fault r15 } + { mulx r5, r6, r7 ; prefetch_l1_fault r25 ; shrs r15, r16, r17 } + { mulx r5, r6, r7 ; prefetch_l2 r25 ; shl r15, r16, r17 } + { mulx r5, r6, r7 ; prefetch_l2_fault r25 ; move r15, r16 } + { mulx r5, r6, r7 ; prefetch_l3 r25 ; ill } + { mulx r5, r6, r7 ; prefetch_l3_fault r25 ; cmpeqi r15, r16, 5 } + { mulx r5, r6, r7 ; raise } + { mulx r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 } + { mulx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } + { mulx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 } + { mulx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } + { mulx r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 } + { mulx r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1 r25 } + { mulx r5, r6, r7 ; st r25, r26 ; cmpeqi r15, r16, 5 } + { mulx r5, r6, r7 ; st1 r15, r16 } + { mulx r5, r6, r7 ; st1 r25, r26 ; shrs r15, r16, r17 } + { mulx r5, r6, r7 ; st2 r25, r26 ; rotli r15, r16, 5 } + { mulx r5, r6, r7 ; st4 r25, r26 ; lnk r15 } + { mulx r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 } + { mulx r5, r6, r7 ; v1cmples r15, r16, r17 } + { mulx r5, r6, r7 ; v2minsi r15, r16, 5 } + { mulx r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + { mz r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 } + { mz r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 } + { mz r15, r16, r17 ; andi r5, r6, 5 ; st1 r25, r26 } + { mz r15, r16, r17 ; cmoveqz r5, r6, r7 ; st r25, r26 } + { mz r15, r16, r17 ; cmpeq r5, r6, r7 ; st2 r25, r26 } + { mz r15, r16, r17 ; cmples r5, r6, r7 } + { mz r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 } + { mz r15, r16, r17 ; cmpne r5, r6, r7 ; ld1u r25, r26 } + { mz r15, r16, r17 ; ctz r5, r6 ; st r25, r26 } + { mz r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld r25, r26 } + { mz r15, r16, r17 ; infol 0x1234 } + { mz r15, r16, r17 ; ld r25, r26 ; revbits r5, r6 } + { mz r15, r16, r17 ; ld1s r25, r26 ; cmpne r5, r6, r7 } + { mz r15, r16, r17 ; ld1s r25, r26 ; subx r5, r6, r7 } + { mz r15, r16, r17 ; ld1u r25, r26 ; mulx r5, r6, r7 } + { mz r15, r16, r17 ; ld2s r25, r26 ; cmpeqi r5, r6, 5 } + { mz r15, r16, r17 ; ld2s r25, r26 ; shli r5, r6, 5 } + { mz r15, r16, r17 ; ld2u r25, r26 ; mul_lu_lu r5, r6, r7 } + { mz r15, r16, r17 ; ld4s r25, r26 ; and r5, r6, r7 } + { mz r15, r16, r17 ; ld4s r25, r26 ; shl1add r5, r6, r7 } + { mz r15, r16, r17 ; ld4u r25, r26 ; mnz r5, r6, r7 } + { mz r15, r16, r17 ; ld4u r25, r26 ; xor r5, r6, r7 } + { mz r15, r16, r17 ; move r5, r6 } + { mz r15, r16, r17 ; mul_hs_hu r5, r6, r7 } + { mz r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st2 r25, r26 } + { mz r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st4 r25, r26 } + { mz r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; st r25, r26 } + { mz r15, r16, r17 ; mulax r5, r6, r7 ; st1 r25, r26 } + { mz r15, r16, r17 ; mz r5, r6, r7 ; st4 r25, r26 } + { mz r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 } + { mz r15, r16, r17 ; prefetch r25 ; addi r5, r6, 5 } + { mz r15, r16, r17 ; prefetch r25 ; rotl r5, r6, r7 } + { mz r15, r16, r17 ; prefetch_l1 r25 ; fnop } + { mz r15, r16, r17 ; prefetch_l1 r25 ; tblidxb1 r5, r6 } + { mz r15, r16, r17 ; prefetch_l1_fault r25 ; nop } + { mz r15, r16, r17 ; prefetch_l2 r25 ; cmpleu r5, r6, r7 } + { mz r15, r16, r17 ; prefetch_l2 r25 ; shrsi r5, r6, 5 } + { mz r15, r16, r17 ; prefetch_l2_fault r25 ; mula_hu_hu r5, r6, r7 } + { mz r15, r16, r17 ; prefetch_l3 r25 ; clz r5, r6 } + { mz r15, r16, r17 ; prefetch_l3 r25 ; shl2add r5, r6, r7 } + { mz r15, r16, r17 ; prefetch_l3_fault r25 ; movei r5, 5 } + { mz r15, r16, r17 ; revbits r5, r6 ; ld r25, r26 } + { mz r15, r16, r17 ; rotl r5, r6, r7 ; ld1u r25, r26 } + { mz r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 } + { mz r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 } + { mz r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } + { mz r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l1_fault r25 } + { mz r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l1_fault r25 } + { mz r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2_fault r25 } + { mz r15, r16, r17 ; st r25, r26 ; cmpeqi r5, r6, 5 } + { mz r15, r16, r17 ; st r25, r26 ; shli r5, r6, 5 } + { mz r15, r16, r17 ; st1 r25, r26 ; mul_lu_lu r5, r6, r7 } + { mz r15, r16, r17 ; st2 r25, r26 ; and r5, r6, r7 } + { mz r15, r16, r17 ; st2 r25, r26 ; shl1add r5, r6, r7 } + { mz r15, r16, r17 ; st4 r25, r26 ; mnz r5, r6, r7 } + { mz r15, r16, r17 ; st4 r25, r26 ; xor r5, r6, r7 } + { mz r15, r16, r17 ; subxsc r5, r6, r7 } + { mz r15, r16, r17 ; tblidxb2 r5, r6 ; ld1s r25, r26 } + { mz r15, r16, r17 ; v1adiffu r5, r6, r7 } + { mz r15, r16, r17 ; v1sub r5, r6, r7 } + { mz r15, r16, r17 ; v2shrsi r5, r6, 5 } + { mz r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 } + { mz r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 } + { mz r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 } + { mz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } + { mz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } + { mz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 } + { mz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 } + { mz r5, r6, r7 ; fetchor r15, r16, r17 } + { mz r5, r6, r7 ; ill ; st1 r25, r26 } + { mz r5, r6, r7 ; jalr r15 ; st r25, r26 } + { mz r5, r6, r7 ; jr r15 ; st2 r25, r26 } + { mz r5, r6, r7 ; ld r25, r26 ; jalr r15 } + { mz r5, r6, r7 ; ld1s r25, r26 ; cmpleu r15, r16, r17 } + { mz r5, r6, r7 ; ld1u r25, r26 ; add r15, r16, r17 } + { mz r5, r6, r7 ; ld1u r25, r26 ; shrsi r15, r16, 5 } + { mz r5, r6, r7 ; ld2s r25, r26 ; shl r15, r16, r17 } + { mz r5, r6, r7 ; ld2u r25, r26 ; mnz r15, r16, r17 } + { mz r5, r6, r7 ; ld4s r25, r26 ; cmpne r15, r16, r17 } + { mz r5, r6, r7 ; ld4u r25, r26 ; and r15, r16, r17 } + { mz r5, r6, r7 ; ld4u r25, r26 ; subx r15, r16, r17 } + { mz r5, r6, r7 ; mf } + { mz r5, r6, r7 ; movei r15, 5 ; ld r25, r26 } + { mz r5, r6, r7 ; nop ; ld r25, r26 } + { mz r5, r6, r7 ; or r15, r16, r17 ; ld1u r25, r26 } + { mz r5, r6, r7 ; prefetch r25 ; lnk r15 } + { mz r5, r6, r7 ; prefetch_l1 r25 ; cmpeqi r15, r16, 5 } + { mz r5, r6, r7 ; prefetch_l1_fault r15 } + { mz r5, r6, r7 ; prefetch_l1_fault r25 ; shrs r15, r16, r17 } + { mz r5, r6, r7 ; prefetch_l2 r25 ; shl r15, r16, r17 } + { mz r5, r6, r7 ; prefetch_l2_fault r25 ; move r15, r16 } + { mz r5, r6, r7 ; prefetch_l3 r25 ; ill } + { mz r5, r6, r7 ; prefetch_l3_fault r25 ; cmpeqi r15, r16, 5 } + { mz r5, r6, r7 ; raise } + { mz r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 } + { mz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } + { mz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 } + { mz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } + { mz r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 } + { mz r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1 r25 } + { mz r5, r6, r7 ; st r25, r26 ; cmpeqi r15, r16, 5 } + { mz r5, r6, r7 ; st1 r15, r16 } + { mz r5, r6, r7 ; st1 r25, r26 ; shrs r15, r16, r17 } + { mz r5, r6, r7 ; st2 r25, r26 ; rotli r15, r16, 5 } + { mz r5, r6, r7 ; st4 r25, r26 ; lnk r15 } + { mz r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 } + { mz r5, r6, r7 ; v1cmples r15, r16, r17 } + { mz r5, r6, r7 ; v2minsi r15, r16, 5 } + { mz r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 } + { nop ; add r5, r6, r7 ; prefetch_l3_fault r25 } + { nop ; addi r5, r6, 5 ; st1 r25, r26 } + { nop ; addx r5, r6, r7 ; st1 r25, r26 } + { nop ; addxi r5, r6, 5 ; st4 r25, r26 } + { nop ; and r5, r6, r7 ; st1 r25, r26 } + { nop ; andi r5, r6, 5 ; st4 r25, r26 } + { nop ; cmoveqz r5, r6, r7 ; st1 r25, r26 } + { nop ; cmpeq r15, r16, r17 ; st4 r25, r26 } + { nop ; cmpeqi r5, r6, 5 ; ld r25, r26 } + { nop ; cmples r5, r6, r7 ; ld r25, r26 } + { nop ; cmpleu r5, r6, r7 ; ld1u r25, r26 } + { nop ; cmplts r5, r6, r7 ; ld2u r25, r26 } + { nop ; cmpltsi r5, r6, 5 ; ld4u r25, r26 } + { nop ; cmpltu r5, r6, r7 ; prefetch_l1 r25 } + { nop ; cmpne r5, r6, r7 ; prefetch_l1 r25 } + { nop ; dblalign2 r15, r16, r17 } + { nop ; fnop ; prefetch_l2_fault r25 } + { nop ; ill ; ld4u r25, r26 } + { nop ; jalr r15 ; ld4s r25, r26 } + { nop ; jr r15 ; prefetch r25 } + { nop ; ld r25, r26 ; and r15, r16, r17 } + { nop ; ld r25, r26 ; mul_hu_hu r5, r6, r7 } + { nop ; ld r25, r26 ; shrs r5, r6, r7 } + { nop ; ld1s r25, r26 ; cmpleu r15, r16, r17 } + { nop ; ld1s r25, r26 ; nor r5, r6, r7 } + { nop ; ld1s r25, r26 ; tblidxb2 r5, r6 } + { nop ; ld1u r25, r26 ; fsingle_pack1 r5, r6 } + { nop ; ld1u r25, r26 ; shl1add r15, r16, r17 } + { nop ; ld2s r25, r26 ; addx r5, r6, r7 } + { nop ; ld2s r25, r26 ; movei r15, 5 } + { nop ; ld2s r25, r26 ; shli r15, r16, 5 } + { nop ; ld2u r25, r26 ; cmpeqi r15, r16, 5 } + { nop ; ld2u r25, r26 ; mz r15, r16, r17 } + { nop ; ld2u r25, r26 ; subx r15, r16, r17 } + { nop ; ld4s r25, r26 ; cmpne r15, r16, r17 } + { nop ; ld4s r25, r26 ; rotli r15, r16, 5 } + { nop ; ld4u r25, r26 ; add r5, r6, r7 } + { nop ; ld4u r25, r26 ; mnz r15, r16, r17 } + { nop ; ld4u r25, r26 ; shl3add r15, r16, r17 } + { nop ; ldnt4u r15, r16 } + { nop ; mnz r15, r16, r17 ; st1 r25, r26 } + { nop ; move r15, r16 ; st4 r25, r26 } + { nop ; movei r5, 5 ; ld r25, r26 } + { nop ; mul_hs_hs r5, r6, r7 } + { nop ; mul_ls_ls r5, r6, r7 ; st1 r25, r26 } + { nop ; mula_hs_hs r5, r6, r7 ; st2 r25, r26 } + { nop ; mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 } + { nop ; mulax r5, r6, r7 ; st r25, r26 } + { nop ; mz r15, r16, r17 ; st2 r25, r26 } + { nop ; nop ; st4 r25, r26 } + { nop ; or r15, r16, r17 ; ld r25, r26 } + { nop ; pcnt r5, r6 ; ld r25, r26 } + { nop ; prefetch r25 ; cmples r5, r6, r7 } + { nop ; prefetch r25 ; nor r15, r16, r17 } + { nop ; prefetch r25 ; tblidxb1 r5, r6 } + { nop ; prefetch_l1 r25 ; cmpltu r15, r16, r17 } + { nop ; prefetch_l1 r25 ; rotl r15, r16, r17 } + { nop ; prefetch_l1_fault r25 ; add r15, r16, r17 } + { nop ; prefetch_l1_fault r25 ; lnk r15 } + { nop ; prefetch_l1_fault r25 ; shl2addx r5, r6, r7 } + { nop ; prefetch_l2 r25 ; cmoveqz r5, r6, r7 } + { nop ; prefetch_l2 r25 ; mula_ls_ls r5, r6, r7 } + { nop ; prefetch_l2 r25 ; shrui r15, r16, 5 } + { nop ; prefetch_l2_fault r25 ; cmpltsi r5, r6, 5 } + { nop ; prefetch_l2_fault r25 ; revbytes r5, r6 } + { nop ; prefetch_l3 r15 } + { nop ; prefetch_l3 r25 ; jrp r15 } + { nop ; prefetch_l3 r25 ; shl2addx r15, r16, r17 } + { nop ; prefetch_l3_fault r25 ; clz r5, r6 } + { nop ; prefetch_l3_fault r25 ; mula_hu_hu r5, r6, r7 } + { nop ; prefetch_l3_fault r25 ; shru r5, r6, r7 } + { nop ; revbytes r5, r6 ; ld4u r25, r26 } + { nop ; rotl r5, r6, r7 ; prefetch_l1 r25 } + { nop ; rotli r5, r6, 5 ; prefetch_l2 r25 } + { nop ; shl r5, r6, r7 ; prefetch_l3 r25 } + { nop ; shl1add r5, r6, r7 ; prefetch_l3 r25 } + { nop ; shl1addx r5, r6, r7 ; st r25, r26 } + { nop ; shl2add r5, r6, r7 ; st2 r25, r26 } + { nop ; shl2addx r5, r6, r7 } + { nop ; shl3addx r15, r16, r17 ; ld1s r25, r26 } + { nop ; shli r15, r16, 5 ; ld2s r25, r26 } + { nop ; shrs r15, r16, r17 ; ld1s r25, r26 } + { nop ; shrsi r15, r16, 5 ; ld2s r25, r26 } + { nop ; shru r15, r16, r17 ; ld4s r25, r26 } + { nop ; shrui r15, r16, 5 ; prefetch r25 } + { nop ; st r25, r26 ; addi r5, r6, 5 } + { nop ; st r25, r26 ; move r15, r16 } + { nop ; st r25, r26 ; shl3addx r15, r16, r17 } + { nop ; st1 r25, r26 ; cmpeq r5, r6, r7 } + { nop ; st1 r25, r26 ; mulx r5, r6, r7 } + { nop ; st1 r25, r26 ; sub r5, r6, r7 } + { nop ; st2 r25, r26 ; cmpltu r5, r6, r7 } + { nop ; st2 r25, r26 ; rotl r5, r6, r7 } + { nop ; st4 r25, r26 ; add r15, r16, r17 } + { nop ; st4 r25, r26 ; lnk r15 } + { nop ; st4 r25, r26 ; shl2addx r5, r6, r7 } + { nop ; sub r15, r16, r17 ; ld2u r25, r26 } + { nop ; subx r15, r16, r17 ; ld4u r25, r26 } + { nop ; tblidxb0 r5, r6 ; ld1u r25, r26 } + { nop ; tblidxb2 r5, r6 ; ld2u r25, r26 } + { nop ; v1adiffu r5, r6, r7 } + { nop ; v1minui r15, r16, 5 } + { nop ; v2cmples r5, r6, r7 } + { nop ; v2sadas r5, r6, r7 } + { nop ; v4sub r15, r16, r17 } + { nop ; xor r5, r6, r7 ; st2 r25, r26 } + { nor r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 } + { nor r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 } + { nor r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 } + { nor r15, r16, r17 ; cmoveqz r5, r6, r7 ; st2 r25, r26 } + { nor r15, r16, r17 ; cmpeq r5, r6, r7 } + { nor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 } + { nor r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 } + { nor r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 } + { nor r15, r16, r17 ; ctz r5, r6 ; st2 r25, r26 } + { nor r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld1u r25, r26 } + { nor r15, r16, r17 ; ld r25, r26 ; addi r5, r6, 5 } + { nor r15, r16, r17 ; ld r25, r26 ; rotl r5, r6, r7 } + { nor r15, r16, r17 ; ld1s r25, r26 ; fnop } + { nor r15, r16, r17 ; ld1s r25, r26 ; tblidxb1 r5, r6 } + { nor r15, r16, r17 ; ld1u r25, r26 ; nop } + { nor r15, r16, r17 ; ld2s r25, r26 ; cmpleu r5, r6, r7 } + { nor r15, r16, r17 ; ld2s r25, r26 ; shrsi r5, r6, 5 } + { nor r15, r16, r17 ; ld2u r25, r26 ; mula_hu_hu r5, r6, r7 } + { nor r15, r16, r17 ; ld4s r25, r26 ; clz r5, r6 } + { nor r15, r16, r17 ; ld4s r25, r26 ; shl2add r5, r6, r7 } + { nor r15, r16, r17 ; ld4u r25, r26 ; movei r5, 5 } + { nor r15, r16, r17 ; mm r5, r6, 5, 7 } + { nor r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 } + { nor r15, r16, r17 ; mul_hs_lu r5, r6, r7 } + { nor r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { nor r15, r16, r17 ; mula_hs_hu r5, r6, r7 } + { nor r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; st2 r25, r26 } + { nor r15, r16, r17 ; mulax r5, r6, r7 ; st4 r25, r26 } + { nor r15, r16, r17 ; nop ; ld r25, r26 } + { nor r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 } + { nor r15, r16, r17 ; prefetch r25 ; addxi r5, r6, 5 } + { nor r15, r16, r17 ; prefetch r25 ; shl r5, r6, r7 } + { nor r15, r16, r17 ; prefetch_l1 r25 ; info 19 } + { nor r15, r16, r17 ; prefetch_l1 r25 ; tblidxb3 r5, r6 } + { nor r15, r16, r17 ; prefetch_l1_fault r25 ; or r5, r6, r7 } + { nor r15, r16, r17 ; prefetch_l2 r25 ; cmpltsi r5, r6, 5 } + { nor r15, r16, r17 ; prefetch_l2 r25 ; shrui r5, r6, 5 } + { nor r15, r16, r17 ; prefetch_l2_fault r25 ; mula_lu_lu r5, r6, r7 } + { nor r15, r16, r17 ; prefetch_l3 r25 ; cmovnez r5, r6, r7 } + { nor r15, r16, r17 ; prefetch_l3 r25 ; shl3add r5, r6, r7 } + { nor r15, r16, r17 ; prefetch_l3_fault r25 ; mul_hu_hu r5, r6, r7 } + { nor r15, r16, r17 ; revbits r5, r6 ; ld1u r25, r26 } + { nor r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 } + { nor r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 } + { nor r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 } + { nor r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 } + { nor r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 } + { nor r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 } + { nor r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 } + { nor r15, r16, r17 ; st r25, r26 ; cmpleu r5, r6, r7 } + { nor r15, r16, r17 ; st r25, r26 ; shrsi r5, r6, 5 } + { nor r15, r16, r17 ; st1 r25, r26 ; mula_hu_hu r5, r6, r7 } + { nor r15, r16, r17 ; st2 r25, r26 ; clz r5, r6 } + { nor r15, r16, r17 ; st2 r25, r26 ; shl2add r5, r6, r7 } + { nor r15, r16, r17 ; st4 r25, r26 ; movei r5, 5 } + { nor r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 } + { nor r15, r16, r17 ; tblidxb0 r5, r6 ; ld1s r25, r26 } + { nor r15, r16, r17 ; tblidxb2 r5, r6 ; ld2s r25, r26 } + { nor r15, r16, r17 ; v1cmpeq r5, r6, r7 } + { nor r15, r16, r17 ; v2add r5, r6, r7 } + { nor r15, r16, r17 ; v2shrui r5, r6, 5 } + { nor r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + { nor r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + { nor r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + { nor r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + { nor r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + { nor r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + { nor r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 } + { nor r5, r6, r7 ; finv r15 } + { nor r5, r6, r7 ; ill ; st4 r25, r26 } + { nor r5, r6, r7 ; jalr r15 ; st2 r25, r26 } + { nor r5, r6, r7 ; jr r15 } + { nor r5, r6, r7 ; ld r25, r26 ; jr r15 } + { nor r5, r6, r7 ; ld1s r25, r26 ; cmpltsi r15, r16, 5 } + { nor r5, r6, r7 ; ld1u r25, r26 ; addx r15, r16, r17 } + { nor r5, r6, r7 ; ld1u r25, r26 ; shrui r15, r16, 5 } + { nor r5, r6, r7 ; ld2s r25, r26 ; shl1addx r15, r16, r17 } + { nor r5, r6, r7 ; ld2u r25, r26 ; movei r15, 5 } + { nor r5, r6, r7 ; ld4s r25, r26 ; ill } + { nor r5, r6, r7 ; ld4u r25, r26 ; cmpeq r15, r16, r17 } + { nor r5, r6, r7 ; ld4u r25, r26 } + { nor r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + { nor r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 } + { nor r5, r6, r7 ; nop ; ld1u r25, r26 } + { nor r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 } + { nor r5, r6, r7 ; prefetch r25 ; move r15, r16 } + { nor r5, r6, r7 ; prefetch_l1 r25 ; cmpleu r15, r16, r17 } + { nor r5, r6, r7 ; prefetch_l1_fault r25 ; addi r15, r16, 5 } + { nor r5, r6, r7 ; prefetch_l1_fault r25 ; shru r15, r16, r17 } + { nor r5, r6, r7 ; prefetch_l2 r25 ; shl1addx r15, r16, r17 } + { nor r5, r6, r7 ; prefetch_l2_fault r25 ; mz r15, r16, r17 } + { nor r5, r6, r7 ; prefetch_l3 r25 ; jalr r15 } + { nor r5, r6, r7 ; prefetch_l3_fault r25 ; cmpleu r15, r16, r17 } + { nor r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 } + { nor r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 } + { nor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 } + { nor r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + { nor r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1 r25 } + { nor r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1 r25 } + { nor r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 } + { nor r5, r6, r7 ; st r25, r26 ; cmpleu r15, r16, r17 } + { nor r5, r6, r7 ; st1 r25, r26 ; addi r15, r16, 5 } + { nor r5, r6, r7 ; st1 r25, r26 ; shru r15, r16, r17 } + { nor r5, r6, r7 ; st2 r25, r26 ; shl1add r15, r16, r17 } + { nor r5, r6, r7 ; st4 r25, r26 ; move r15, r16 } + { nor r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + { nor r5, r6, r7 ; v1cmplts r15, r16, r17 } + { nor r5, r6, r7 ; v2mz r15, r16, r17 } + { nor r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 } + { or r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 } + { or r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 } + { or r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 } + { or r15, r16, r17 ; cmoveqz r5, r6, r7 ; st2 r25, r26 } + { or r15, r16, r17 ; cmpeq r5, r6, r7 } + { or r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 } + { or r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 } + { or r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 } + { or r15, r16, r17 ; ctz r5, r6 ; st2 r25, r26 } + { or r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld1u r25, r26 } + { or r15, r16, r17 ; ld r25, r26 ; addi r5, r6, 5 } + { or r15, r16, r17 ; ld r25, r26 ; rotl r5, r6, r7 } + { or r15, r16, r17 ; ld1s r25, r26 ; fnop } + { or r15, r16, r17 ; ld1s r25, r26 ; tblidxb1 r5, r6 } + { or r15, r16, r17 ; ld1u r25, r26 ; nop } + { or r15, r16, r17 ; ld2s r25, r26 ; cmpleu r5, r6, r7 } + { or r15, r16, r17 ; ld2s r25, r26 ; shrsi r5, r6, 5 } + { or r15, r16, r17 ; ld2u r25, r26 ; mula_hu_hu r5, r6, r7 } + { or r15, r16, r17 ; ld4s r25, r26 ; clz r5, r6 } + { or r15, r16, r17 ; ld4s r25, r26 ; shl2add r5, r6, r7 } + { or r15, r16, r17 ; ld4u r25, r26 ; movei r5, 5 } + { or r15, r16, r17 ; mm r5, r6, 5, 7 } + { or r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 } + { or r15, r16, r17 ; mul_hs_lu r5, r6, r7 } + { or r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { or r15, r16, r17 ; mula_hs_hu r5, r6, r7 } + { or r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; st2 r25, r26 } + { or r15, r16, r17 ; mulax r5, r6, r7 ; st4 r25, r26 } + { or r15, r16, r17 ; nop ; ld r25, r26 } + { or r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 } + { or r15, r16, r17 ; prefetch r25 ; addxi r5, r6, 5 } + { or r15, r16, r17 ; prefetch r25 ; shl r5, r6, r7 } + { or r15, r16, r17 ; prefetch_l1 r25 ; info 19 } + { or r15, r16, r17 ; prefetch_l1 r25 ; tblidxb3 r5, r6 } + { or r15, r16, r17 ; prefetch_l1_fault r25 ; or r5, r6, r7 } + { or r15, r16, r17 ; prefetch_l2 r25 ; cmpltsi r5, r6, 5 } + { or r15, r16, r17 ; prefetch_l2 r25 ; shrui r5, r6, 5 } + { or r15, r16, r17 ; prefetch_l2_fault r25 ; mula_lu_lu r5, r6, r7 } + { or r15, r16, r17 ; prefetch_l3 r25 ; cmovnez r5, r6, r7 } + { or r15, r16, r17 ; prefetch_l3 r25 ; shl3add r5, r6, r7 } + { or r15, r16, r17 ; prefetch_l3_fault r25 ; mul_hu_hu r5, r6, r7 } + { or r15, r16, r17 ; revbits r5, r6 ; ld1u r25, r26 } + { or r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 } + { or r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 } + { or r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 } + { or r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 } + { or r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 } + { or r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 } + { or r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 } + { or r15, r16, r17 ; st r25, r26 ; cmpleu r5, r6, r7 } + { or r15, r16, r17 ; st r25, r26 ; shrsi r5, r6, 5 } + { or r15, r16, r17 ; st1 r25, r26 ; mula_hu_hu r5, r6, r7 } + { or r15, r16, r17 ; st2 r25, r26 ; clz r5, r6 } + { or r15, r16, r17 ; st2 r25, r26 ; shl2add r5, r6, r7 } + { or r15, r16, r17 ; st4 r25, r26 ; movei r5, 5 } + { or r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 } + { or r15, r16, r17 ; tblidxb0 r5, r6 ; ld1s r25, r26 } + { or r15, r16, r17 ; tblidxb2 r5, r6 ; ld2s r25, r26 } + { or r15, r16, r17 ; v1cmpeq r5, r6, r7 } + { or r15, r16, r17 ; v2add r5, r6, r7 } + { or r15, r16, r17 ; v2shrui r5, r6, 5 } + { or r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } + { or r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } + { or r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + { or r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + { or r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + { or r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + { or r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 } + { or r5, r6, r7 ; finv r15 } + { or r5, r6, r7 ; ill ; st4 r25, r26 } + { or r5, r6, r7 ; jalr r15 ; st2 r25, r26 } + { or r5, r6, r7 ; jr r15 } + { or r5, r6, r7 ; ld r25, r26 ; jr r15 } + { or r5, r6, r7 ; ld1s r25, r26 ; cmpltsi r15, r16, 5 } + { or r5, r6, r7 ; ld1u r25, r26 ; addx r15, r16, r17 } + { or r5, r6, r7 ; ld1u r25, r26 ; shrui r15, r16, 5 } + { or r5, r6, r7 ; ld2s r25, r26 ; shl1addx r15, r16, r17 } + { or r5, r6, r7 ; ld2u r25, r26 ; movei r15, 5 } + { or r5, r6, r7 ; ld4s r25, r26 ; ill } + { or r5, r6, r7 ; ld4u r25, r26 ; cmpeq r15, r16, r17 } + { or r5, r6, r7 ; ld4u r25, r26 } + { or r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 } + { or r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 } + { or r5, r6, r7 ; nop ; ld1u r25, r26 } + { or r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 } + { or r5, r6, r7 ; prefetch r25 ; move r15, r16 } + { or r5, r6, r7 ; prefetch_l1 r25 ; cmpleu r15, r16, r17 } + { or r5, r6, r7 ; prefetch_l1_fault r25 ; addi r15, r16, 5 } + { or r5, r6, r7 ; prefetch_l1_fault r25 ; shru r15, r16, r17 } + { or r5, r6, r7 ; prefetch_l2 r25 ; shl1addx r15, r16, r17 } + { or r5, r6, r7 ; prefetch_l2_fault r25 ; mz r15, r16, r17 } + { or r5, r6, r7 ; prefetch_l3 r25 ; jalr r15 } + { or r5, r6, r7 ; prefetch_l3_fault r25 ; cmpleu r15, r16, r17 } + { or r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 } + { or r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 } + { or r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 } + { or r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + { or r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1 r25 } + { or r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1 r25 } + { or r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 } + { or r5, r6, r7 ; st r25, r26 ; cmpleu r15, r16, r17 } + { or r5, r6, r7 ; st1 r25, r26 ; addi r15, r16, 5 } + { or r5, r6, r7 ; st1 r25, r26 ; shru r15, r16, r17 } + { or r5, r6, r7 ; st2 r25, r26 ; shl1add r15, r16, r17 } + { or r5, r6, r7 ; st4 r25, r26 ; move r15, r16 } + { or r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 } + { or r5, r6, r7 ; v1cmplts r15, r16, r17 } + { or r5, r6, r7 ; v2mz r15, r16, r17 } + { or r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 } + { ori r15, r16, 5 ; dblalign2 r5, r6, r7 } + { ori r15, r16, 5 ; mula_hu_hu r5, r6, r7 } + { ori r15, r16, 5 ; tblidxb1 r5, r6 } + { ori r15, r16, 5 ; v1shl r5, r6, r7 } + { ori r15, r16, 5 ; v2sads r5, r6, r7 } + { ori r5, r6, 5 ; cmpltsi r15, r16, 5 } + { ori r5, r6, 5 ; ld2u_add r15, r16, 5 } + { ori r5, r6, 5 ; prefetch_add_l3 r15, 5 } + { ori r5, r6, 5 ; stnt2_add r15, r16, 5 } + { ori r5, r6, 5 ; v2cmples r15, r16, r17 } + { ori r5, r6, 5 ; xori r15, r16, 5 } + { pcnt r5, r6 ; addx r15, r16, r17 ; ld r25, r26 } + { pcnt r5, r6 ; and r15, r16, r17 ; ld r25, r26 } + { pcnt r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } + { pcnt r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 } + { pcnt r5, r6 ; cmplts r15, r16, r17 ; ld2u r25, r26 } + { pcnt r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 } + { pcnt r5, r6 ; fetchadd4 r15, r16, r17 } + { pcnt r5, r6 ; ill ; prefetch_l2 r25 } + { pcnt r5, r6 ; jalr r15 ; prefetch_l1_fault r25 } + { pcnt r5, r6 ; jr r15 ; prefetch_l2_fault r25 } + { pcnt r5, r6 ; ld r25, r26 ; cmpltu r15, r16, r17 } + { pcnt r5, r6 ; ld1s r25, r26 ; and r15, r16, r17 } + { pcnt r5, r6 ; ld1s r25, r26 ; subx r15, r16, r17 } + { pcnt r5, r6 ; ld1u r25, r26 ; shl2addx r15, r16, r17 } + { pcnt r5, r6 ; ld2s r25, r26 ; nop } + { pcnt r5, r6 ; ld2u r25, r26 ; jalr r15 } + { pcnt r5, r6 ; ld4s r25, r26 ; cmples r15, r16, r17 } + { pcnt r5, r6 ; ld4u r15, r16 } + { pcnt r5, r6 ; ld4u r25, r26 ; shrs r15, r16, r17 } + { pcnt r5, r6 ; lnk r15 ; st r25, r26 } + { pcnt r5, r6 ; move r15, r16 ; st r25, r26 } + { pcnt r5, r6 ; mz r15, r16, r17 ; st r25, r26 } + { pcnt r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 } + { pcnt r5, r6 ; prefetch r25 ; info 19 } + { pcnt r5, r6 ; prefetch_l1 r25 ; addx r15, r16, r17 } + { pcnt r5, r6 ; prefetch_l1 r25 ; shrui r15, r16, 5 } + { pcnt r5, r6 ; prefetch_l1_fault r25 ; shl2add r15, r16, r17 } + { pcnt r5, r6 ; prefetch_l2 r25 ; nop } + { pcnt r5, r6 ; prefetch_l2_fault r25 ; jalrp r15 } + { pcnt r5, r6 ; prefetch_l3 r25 ; cmplts r15, r16, r17 } + { pcnt r5, r6 ; prefetch_l3_fault r25 ; addx r15, r16, r17 } + { pcnt r5, r6 ; prefetch_l3_fault r25 ; shrui r15, r16, 5 } + { pcnt r5, r6 ; rotli r15, r16, 5 ; st1 r25, r26 } + { pcnt r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 } + { pcnt r5, r6 ; shl2add r15, r16, r17 } + { pcnt r5, r6 ; shl3addx r15, r16, r17 ; ld1s r25, r26 } + { pcnt r5, r6 ; shrs r15, r16, r17 ; ld1s r25, r26 } + { pcnt r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 } + { pcnt r5, r6 ; st r25, r26 ; addx r15, r16, r17 } + { pcnt r5, r6 ; st r25, r26 ; shrui r15, r16, 5 } + { pcnt r5, r6 ; st1 r25, r26 ; shl2add r15, r16, r17 } + { pcnt r5, r6 ; st2 r25, r26 ; mz r15, r16, r17 } + { pcnt r5, r6 ; st4 r25, r26 ; info 19 } + { pcnt r5, r6 ; stnt_add r15, r16, 5 } + { pcnt r5, r6 ; v1add r15, r16, r17 } + { pcnt r5, r6 ; v2int_h r15, r16, r17 } + { pcnt r5, r6 ; xor r15, r16, r17 ; prefetch_l1 r25 } + { prefetch r15 ; cmulfr r5, r6, r7 } + { prefetch r15 ; mul_ls_ls r5, r6, r7 } + { prefetch r15 ; shrux r5, r6, r7 } + { prefetch r15 ; v1mnz r5, r6, r7 } + { prefetch r15 ; v2mults r5, r6, r7 } + { prefetch r25 ; add r15, r16, r17 ; cmpeq r5, r6, r7 } + { prefetch r25 ; add r15, r16, r17 ; shl3addx r5, r6, r7 } + { prefetch r25 ; add r5, r6, r7 ; nop } + { prefetch r25 ; addi r15, r16, 5 ; fsingle_pack1 r5, r6 } + { prefetch r25 ; addi r15, r16, 5 ; tblidxb2 r5, r6 } + { prefetch r25 ; addi r5, r6, 5 ; shl3add r15, r16, r17 } + { prefetch r25 ; addx r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { prefetch r25 ; addx r5, r6, r7 ; cmpeq r15, r16, r17 } + { prefetch r25 ; addx r5, r6, r7 } + { prefetch r25 ; addxi r15, r16, 5 ; revbits r5, r6 } + { prefetch r25 ; addxi r5, r6, 5 ; info 19 } + { prefetch r25 ; and r15, r16, r17 ; cmpeq r5, r6, r7 } + { prefetch r25 ; and r15, r16, r17 ; shl3addx r5, r6, r7 } + { prefetch r25 ; and r5, r6, r7 ; nop } + { prefetch r25 ; andi r15, r16, 5 ; fsingle_pack1 r5, r6 } + { prefetch r25 ; andi r15, r16, 5 ; tblidxb2 r5, r6 } + { prefetch r25 ; andi r5, r6, 5 ; shl3add r15, r16, r17 } + { prefetch r25 ; clz r5, r6 ; rotl r15, r16, r17 } + { prefetch r25 ; cmoveqz r5, r6, r7 ; mnz r15, r16, r17 } + { prefetch r25 ; cmovnez r5, r6, r7 ; ill } + { prefetch r25 ; cmpeq r15, r16, r17 ; cmovnez r5, r6, r7 } + { prefetch r25 ; cmpeq r15, r16, r17 ; shl3add r5, r6, r7 } + { prefetch r25 ; cmpeq r5, r6, r7 ; mz r15, r16, r17 } + { prefetch r25 ; cmpeqi r15, r16, 5 ; fnop } + { prefetch r25 ; cmpeqi r15, r16, 5 ; tblidxb1 r5, r6 } + { prefetch r25 ; cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 } + { prefetch r25 ; cmples r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { prefetch r25 ; cmples r5, r6, r7 ; andi r15, r16, 5 } + { prefetch r25 ; cmples r5, r6, r7 ; xor r15, r16, r17 } + { prefetch r25 ; cmpleu r15, r16, r17 ; pcnt r5, r6 } + { prefetch r25 ; cmpleu r5, r6, r7 ; ill } + { prefetch r25 ; cmplts r15, r16, r17 ; cmovnez r5, r6, r7 } + { prefetch r25 ; cmplts r15, r16, r17 ; shl3add r5, r6, r7 } + { prefetch r25 ; cmplts r5, r6, r7 ; mz r15, r16, r17 } + { prefetch r25 ; cmpltsi r15, r16, 5 ; fnop } + { prefetch r25 ; cmpltsi r15, r16, 5 ; tblidxb1 r5, r6 } + { prefetch r25 ; cmpltsi r5, r6, 5 ; shl2addx r15, r16, r17 } + { prefetch r25 ; cmpltu r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { prefetch r25 ; cmpltu r5, r6, r7 ; andi r15, r16, 5 } + { prefetch r25 ; cmpltu r5, r6, r7 ; xor r15, r16, r17 } + { prefetch r25 ; cmpne r15, r16, r17 ; pcnt r5, r6 } + { prefetch r25 ; cmpne r5, r6, r7 ; ill } + { prefetch r25 ; ctz r5, r6 ; cmples r15, r16, r17 } + { prefetch r25 ; fnop ; add r5, r6, r7 } + { prefetch r25 ; fnop ; mnz r15, r16, r17 } + { prefetch r25 ; fnop ; shl3add r15, r16, r17 } + { prefetch r25 ; fsingle_pack1 r5, r6 ; ill } + { prefetch r25 ; ill ; cmovnez r5, r6, r7 } + { prefetch r25 ; ill ; shl3add r5, r6, r7 } + { prefetch r25 ; info 19 ; cmpltsi r15, r16, 5 } + { prefetch r25 ; info 19 ; revbits r5, r6 } + { prefetch r25 ; info 19 } + { prefetch r25 ; jalr r15 ; revbits r5, r6 } + { prefetch r25 ; jalrp r15 ; cmpne r5, r6, r7 } + { prefetch r25 ; jalrp r15 ; subx r5, r6, r7 } + { prefetch r25 ; jr r15 ; mulx r5, r6, r7 } + { prefetch r25 ; jrp r15 ; cmpeqi r5, r6, 5 } + { prefetch r25 ; jrp r15 ; shli r5, r6, 5 } + { prefetch r25 ; lnk r15 ; mul_lu_lu r5, r6, r7 } + { prefetch r25 ; mnz r15, r16, r17 ; and r5, r6, r7 } + { prefetch r25 ; mnz r15, r16, r17 ; shl1add r5, r6, r7 } + { prefetch r25 ; mnz r5, r6, r7 ; lnk r15 } + { prefetch r25 ; move r15, r16 ; cmpltsi r5, r6, 5 } + { prefetch r25 ; move r15, r16 ; shrui r5, r6, 5 } + { prefetch r25 ; move r5, r6 ; shl r15, r16, r17 } + { prefetch r25 ; movei r15, 5 ; mul_hs_hs r5, r6, r7 } + { prefetch r25 ; movei r5, 5 ; addi r15, r16, 5 } + { prefetch r25 ; movei r5, 5 ; shru r15, r16, r17 } + { prefetch r25 ; mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch r25 ; mul_hu_hu r5, r6, r7 ; nor r15, r16, r17 } + { prefetch r25 ; mul_ls_ls r5, r6, r7 ; jrp r15 } + { prefetch r25 ; mul_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 } + { prefetch r25 ; mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 } + { prefetch r25 ; mula_hs_hs r5, r6, r7 } + { prefetch r25 ; mula_hu_hu r5, r6, r7 ; shrs r15, r16, r17 } + { prefetch r25 ; mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 } + { prefetch r25 ; mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 } + { prefetch r25 ; mulax r5, r6, r7 ; jalrp r15 } + { prefetch r25 ; mulx r5, r6, r7 ; cmpltsi r15, r16, 5 } + { prefetch r25 ; mz r15, r16, r17 ; and r5, r6, r7 } + { prefetch r25 ; mz r15, r16, r17 ; shl1add r5, r6, r7 } + { prefetch r25 ; mz r5, r6, r7 ; lnk r15 } + { prefetch r25 ; nop ; cmovnez r5, r6, r7 } + { prefetch r25 ; nop ; mula_lu_lu r5, r6, r7 } + { prefetch r25 ; nop ; shrui r5, r6, 5 } + { prefetch r25 ; nor r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { prefetch r25 ; nor r5, r6, r7 ; andi r15, r16, 5 } + { prefetch r25 ; nor r5, r6, r7 ; xor r15, r16, r17 } + { prefetch r25 ; or r15, r16, r17 ; pcnt r5, r6 } + { prefetch r25 ; or r5, r6, r7 ; ill } + { prefetch r25 ; pcnt r5, r6 ; cmples r15, r16, r17 } + { prefetch r25 ; revbits r5, r6 ; addi r15, r16, 5 } + { prefetch r25 ; revbits r5, r6 ; shru r15, r16, r17 } + { prefetch r25 ; revbytes r5, r6 ; shl2add r15, r16, r17 } + { prefetch r25 ; rotl r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { prefetch r25 ; rotl r5, r6, r7 ; and r15, r16, r17 } + { prefetch r25 ; rotl r5, r6, r7 ; subx r15, r16, r17 } + { prefetch r25 ; rotli r15, r16, 5 ; or r5, r6, r7 } + { prefetch r25 ; rotli r5, r6, 5 ; fnop } + { prefetch r25 ; shl r15, r16, r17 ; cmoveqz r5, r6, r7 } + { prefetch r25 ; shl r15, r16, r17 ; shl2addx r5, r6, r7 } + { prefetch r25 ; shl r5, r6, r7 ; movei r15, 5 } + { prefetch r25 ; shl1add r15, r16, r17 ; ctz r5, r6 } + { prefetch r25 ; shl1add r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch r25 ; shl1add r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch r25 ; shl1addx r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { prefetch r25 ; shl1addx r5, r6, r7 ; and r15, r16, r17 } + { prefetch r25 ; shl1addx r5, r6, r7 ; subx r15, r16, r17 } + { prefetch r25 ; shl2add r15, r16, r17 ; or r5, r6, r7 } + { prefetch r25 ; shl2add r5, r6, r7 ; fnop } + { prefetch r25 ; shl2addx r15, r16, r17 ; cmoveqz r5, r6, r7 } + { prefetch r25 ; shl2addx r15, r16, r17 ; shl2addx r5, r6, r7 } + { prefetch r25 ; shl2addx r5, r6, r7 ; movei r15, 5 } + { prefetch r25 ; shl3add r15, r16, r17 ; ctz r5, r6 } + { prefetch r25 ; shl3add r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch r25 ; shl3add r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch r25 ; shl3addx r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { prefetch r25 ; shl3addx r5, r6, r7 ; and r15, r16, r17 } + { prefetch r25 ; shl3addx r5, r6, r7 ; subx r15, r16, r17 } + { prefetch r25 ; shli r15, r16, 5 ; or r5, r6, r7 } + { prefetch r25 ; shli r5, r6, 5 ; fnop } + { prefetch r25 ; shrs r15, r16, r17 ; cmoveqz r5, r6, r7 } + { prefetch r25 ; shrs r15, r16, r17 ; shl2addx r5, r6, r7 } + { prefetch r25 ; shrs r5, r6, r7 ; movei r15, 5 } + { prefetch r25 ; shrsi r15, r16, 5 ; ctz r5, r6 } + { prefetch r25 ; shrsi r15, r16, 5 ; tblidxb0 r5, r6 } + { prefetch r25 ; shrsi r5, r6, 5 ; shl2add r15, r16, r17 } + { prefetch r25 ; shru r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { prefetch r25 ; shru r5, r6, r7 ; and r15, r16, r17 } + { prefetch r25 ; shru r5, r6, r7 ; subx r15, r16, r17 } + { prefetch r25 ; shrui r15, r16, 5 ; or r5, r6, r7 } + { prefetch r25 ; shrui r5, r6, 5 ; fnop } + { prefetch r25 ; sub r15, r16, r17 ; cmoveqz r5, r6, r7 } + { prefetch r25 ; sub r15, r16, r17 ; shl2addx r5, r6, r7 } + { prefetch r25 ; sub r5, r6, r7 ; movei r15, 5 } + { prefetch r25 ; subx r15, r16, r17 ; ctz r5, r6 } + { prefetch r25 ; subx r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch r25 ; subx r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch r25 ; tblidxb0 r5, r6 ; nor r15, r16, r17 } + { prefetch r25 ; tblidxb1 r5, r6 ; jrp r15 } + { prefetch r25 ; tblidxb2 r5, r6 ; cmpne r15, r16, r17 } + { prefetch r25 ; tblidxb3 r5, r6 ; cmpeq r15, r16, r17 } + { prefetch r25 ; tblidxb3 r5, r6 } + { prefetch r25 ; xor r15, r16, r17 ; revbits r5, r6 } + { prefetch r25 ; xor r5, r6, r7 ; info 19 } + { prefetch_add_l1 r15, 5 ; bfexts r5, r6, 5, 7 } + { prefetch_add_l1 r15, 5 ; fsingle_mul1 r5, r6, r7 } + { prefetch_add_l1 r15, 5 ; revbits r5, r6 } + { prefetch_add_l1 r15, 5 ; v1cmpltu r5, r6, r7 } + { prefetch_add_l1 r15, 5 ; v2cmpeqi r5, r6, 5 } + { prefetch_add_l1 r15, 5 ; v4int_l r5, r6, r7 } + { prefetch_add_l1_fault r15, 5 ; cmulhr r5, r6, r7 } + { prefetch_add_l1_fault r15, 5 ; mul_lu_lu r5, r6, r7 } + { prefetch_add_l1_fault r15, 5 ; shufflebytes r5, r6, r7 } + { prefetch_add_l1_fault r15, 5 ; v1mulu r5, r6, r7 } + { prefetch_add_l1_fault r15, 5 ; v2packh r5, r6, r7 } + { prefetch_add_l2 r15, 5 ; bfins r5, r6, 5, 7 } + { prefetch_add_l2 r15, 5 ; fsingle_pack1 r5, r6 } + { prefetch_add_l2 r15, 5 ; rotl r5, r6, r7 } + { prefetch_add_l2 r15, 5 ; v1cmpne r5, r6, r7 } + { prefetch_add_l2 r15, 5 ; v2cmpleu r5, r6, r7 } + { prefetch_add_l2 r15, 5 ; v4shl r5, r6, r7 } + { prefetch_add_l2_fault r15, 5 ; crc32_8 r5, r6, r7 } + { prefetch_add_l2_fault r15, 5 ; mula_hs_hu r5, r6, r7 } + { prefetch_add_l2_fault r15, 5 ; subx r5, r6, r7 } + { prefetch_add_l2_fault r15, 5 ; v1mz r5, r6, r7 } + { prefetch_add_l2_fault r15, 5 ; v2packuc r5, r6, r7 } + { prefetch_add_l3 r15, 5 ; cmoveqz r5, r6, r7 } + { prefetch_add_l3 r15, 5 ; fsingle_sub1 r5, r6, r7 } + { prefetch_add_l3 r15, 5 ; shl r5, r6, r7 } + { prefetch_add_l3 r15, 5 ; v1ddotpua r5, r6, r7 } + { prefetch_add_l3 r15, 5 ; v2cmpltsi r5, r6, 5 } + { prefetch_add_l3 r15, 5 ; v4shrs r5, r6, r7 } + { prefetch_add_l3_fault r15, 5 ; dblalign r5, r6, r7 } + { prefetch_add_l3_fault r15, 5 ; mula_hs_lu r5, r6, r7 } + { prefetch_add_l3_fault r15, 5 ; tblidxb0 r5, r6 } + { prefetch_add_l3_fault r15, 5 ; v1sadu r5, r6, r7 } + { prefetch_add_l3_fault r15, 5 ; v2sadau r5, r6, r7 } + { prefetch_l1 r15 ; cmpeq r5, r6, r7 } + { prefetch_l1 r15 ; infol 0x1234 } + { prefetch_l1 r15 ; shl1add r5, r6, r7 } + { prefetch_l1 r15 ; v1ddotpusa r5, r6, r7 } + { prefetch_l1 r15 ; v2cmpltui r5, r6, 5 } + { prefetch_l1 r15 ; v4sub r5, r6, r7 } + { prefetch_l1 r25 ; add r15, r16, r17 ; nor r5, r6, r7 } + { prefetch_l1 r25 ; add r5, r6, r7 ; cmpne r15, r16, r17 } + { prefetch_l1 r25 ; addi r15, r16, 5 ; clz r5, r6 } + { prefetch_l1 r25 ; addi r15, r16, 5 ; shl2add r5, r6, r7 } + { prefetch_l1 r25 ; addi r5, r6, 5 ; move r15, r16 } + { prefetch_l1 r25 ; addx r15, r16, r17 ; cmpne r5, r6, r7 } + { prefetch_l1 r25 ; addx r15, r16, r17 ; subx r5, r6, r7 } + { prefetch_l1 r25 ; addx r5, r6, r7 ; shl1addx r15, r16, r17 } + { prefetch_l1 r25 ; addxi r15, r16, 5 ; mul_ls_ls r5, r6, r7 } + { prefetch_l1 r25 ; addxi r5, r6, 5 ; addxi r15, r16, 5 } + { prefetch_l1 r25 ; addxi r5, r6, 5 ; sub r15, r16, r17 } + { prefetch_l1 r25 ; and r15, r16, r17 ; nor r5, r6, r7 } + { prefetch_l1 r25 ; and r5, r6, r7 ; cmpne r15, r16, r17 } + { prefetch_l1 r25 ; andi r15, r16, 5 ; clz r5, r6 } + { prefetch_l1 r25 ; andi r15, r16, 5 ; shl2add r5, r6, r7 } + { prefetch_l1 r25 ; andi r5, r6, 5 ; move r15, r16 } + { prefetch_l1 r25 ; clz r5, r6 ; info 19 } + { prefetch_l1 r25 ; cmoveqz r5, r6, r7 ; cmpleu r15, r16, r17 } + { prefetch_l1 r25 ; cmovnez r5, r6, r7 ; addx r15, r16, r17 } + { prefetch_l1 r25 ; cmovnez r5, r6, r7 ; shrui r15, r16, 5 } + { prefetch_l1 r25 ; cmpeq r15, r16, r17 ; nop } + { prefetch_l1 r25 ; cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 } + { prefetch_l1 r25 ; cmpeqi r15, r16, 5 ; andi r5, r6, 5 } + { prefetch_l1 r25 ; cmpeqi r15, r16, 5 ; shl1addx r5, r6, r7 } + { prefetch_l1 r25 ; cmpeqi r5, r6, 5 ; mnz r15, r16, r17 } + { prefetch_l1 r25 ; cmples r15, r16, r17 ; cmpltu r5, r6, r7 } + { prefetch_l1 r25 ; cmples r15, r16, r17 ; sub r5, r6, r7 } + { prefetch_l1 r25 ; cmples r5, r6, r7 ; shl1add r15, r16, r17 } + { prefetch_l1 r25 ; cmpleu r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { prefetch_l1 r25 ; cmpleu r5, r6, r7 ; addx r15, r16, r17 } + { prefetch_l1 r25 ; cmpleu r5, r6, r7 ; shrui r15, r16, 5 } + { prefetch_l1 r25 ; cmplts r15, r16, r17 ; nop } + { prefetch_l1 r25 ; cmplts r5, r6, r7 ; cmpltu r15, r16, r17 } + { prefetch_l1 r25 ; cmpltsi r15, r16, 5 ; andi r5, r6, 5 } + { prefetch_l1 r25 ; cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 } + { prefetch_l1 r25 ; cmpltsi r5, r6, 5 ; mnz r15, r16, r17 } + { prefetch_l1 r25 ; cmpltu r15, r16, r17 ; cmpltu r5, r6, r7 } + { prefetch_l1 r25 ; cmpltu r15, r16, r17 ; sub r5, r6, r7 } + { prefetch_l1 r25 ; cmpltu r5, r6, r7 ; shl1add r15, r16, r17 } + { prefetch_l1 r25 ; cmpne r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { prefetch_l1 r25 ; cmpne r5, r6, r7 ; addx r15, r16, r17 } + { prefetch_l1 r25 ; cmpne r5, r6, r7 ; shrui r15, r16, 5 } + { prefetch_l1 r25 ; ctz r5, r6 ; shl2addx r15, r16, r17 } + { prefetch_l1 r25 ; fnop ; cmpltu r5, r6, r7 } + { prefetch_l1 r25 ; fnop ; rotl r5, r6, r7 } + { prefetch_l1 r25 ; fsingle_pack1 r5, r6 ; addx r15, r16, r17 } + { prefetch_l1 r25 ; fsingle_pack1 r5, r6 ; shrui r15, r16, 5 } + { prefetch_l1 r25 ; ill ; nop } + { prefetch_l1 r25 ; info 19 ; clz r5, r6 } + { prefetch_l1 r25 ; info 19 ; mula_hu_hu r5, r6, r7 } + { prefetch_l1 r25 ; info 19 ; shru r5, r6, r7 } + { prefetch_l1 r25 ; jalr r15 ; mul_ls_ls r5, r6, r7 } + { prefetch_l1 r25 ; jalrp r15 ; addxi r5, r6, 5 } + { prefetch_l1 r25 ; jalrp r15 ; shl r5, r6, r7 } + { prefetch_l1 r25 ; jr r15 ; info 19 } + { prefetch_l1 r25 ; jr r15 ; tblidxb3 r5, r6 } + { prefetch_l1 r25 ; jrp r15 ; or r5, r6, r7 } + { prefetch_l1 r25 ; lnk r15 ; cmpltsi r5, r6, 5 } + { prefetch_l1 r25 ; lnk r15 ; shrui r5, r6, 5 } + { prefetch_l1 r25 ; mnz r15, r16, r17 ; mula_lu_lu r5, r6, r7 } + { prefetch_l1 r25 ; mnz r5, r6, r7 ; cmples r15, r16, r17 } + { prefetch_l1 r25 ; move r15, r16 ; addi r5, r6, 5 } + { prefetch_l1 r25 ; move r15, r16 ; rotl r5, r6, r7 } + { prefetch_l1 r25 ; move r5, r6 ; jalrp r15 } + { prefetch_l1 r25 ; movei r15, 5 ; cmples r5, r6, r7 } + { prefetch_l1 r25 ; movei r15, 5 ; shrs r5, r6, r7 } + { prefetch_l1 r25 ; movei r5, 5 ; or r15, r16, r17 } + { prefetch_l1 r25 ; mul_hs_hs r5, r6, r7 ; lnk r15 } + { prefetch_l1 r25 ; mul_hu_hu r5, r6, r7 ; fnop } + { prefetch_l1 r25 ; mul_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 } + { prefetch_l1 r25 ; mul_lu_lu r5, r6, r7 ; add r15, r16, r17 } + { prefetch_l1 r25 ; mul_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 } + { prefetch_l1 r25 ; mula_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 } + { prefetch_l1 r25 ; mula_hu_hu r5, r6, r7 ; nop } + { prefetch_l1 r25 ; mula_ls_ls r5, r6, r7 ; jr r15 } + { prefetch_l1 r25 ; mula_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 } + { prefetch_l1 r25 ; mulax r5, r6, r7 ; andi r15, r16, 5 } + { prefetch_l1 r25 ; mulax r5, r6, r7 ; xor r15, r16, r17 } + { prefetch_l1 r25 ; mulx r5, r6, r7 ; shli r15, r16, 5 } + { prefetch_l1 r25 ; mz r15, r16, r17 ; mula_lu_lu r5, r6, r7 } + { prefetch_l1 r25 ; mz r5, r6, r7 ; cmples r15, r16, r17 } + { prefetch_l1 r25 ; nop ; add r5, r6, r7 } + { prefetch_l1 r25 ; nop ; mnz r15, r16, r17 } + { prefetch_l1 r25 ; nop ; shl3add r15, r16, r17 } + { prefetch_l1 r25 ; nor r15, r16, r17 ; cmpltu r5, r6, r7 } + { prefetch_l1 r25 ; nor r15, r16, r17 ; sub r5, r6, r7 } + { prefetch_l1 r25 ; nor r5, r6, r7 ; shl1add r15, r16, r17 } + { prefetch_l1 r25 ; or r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { prefetch_l1 r25 ; or r5, r6, r7 ; addx r15, r16, r17 } + { prefetch_l1 r25 ; or r5, r6, r7 ; shrui r15, r16, 5 } + { prefetch_l1 r25 ; pcnt r5, r6 ; shl2addx r15, r16, r17 } + { prefetch_l1 r25 ; revbits r5, r6 ; or r15, r16, r17 } + { prefetch_l1 r25 ; revbytes r5, r6 ; lnk r15 } + { prefetch_l1 r25 ; rotl r15, r16, r17 ; cmpltsi r5, r6, 5 } + { prefetch_l1 r25 ; rotl r15, r16, r17 ; shrui r5, r6, 5 } + { prefetch_l1 r25 ; rotl r5, r6, r7 ; shl r15, r16, r17 } + { prefetch_l1 r25 ; rotli r15, r16, 5 ; mul_hs_hs r5, r6, r7 } + { prefetch_l1 r25 ; rotli r5, r6, 5 ; addi r15, r16, 5 } + { prefetch_l1 r25 ; rotli r5, r6, 5 ; shru r15, r16, r17 } + { prefetch_l1 r25 ; shl r15, r16, r17 ; mz r5, r6, r7 } + { prefetch_l1 r25 ; shl r5, r6, r7 ; cmpltsi r15, r16, 5 } + { prefetch_l1 r25 ; shl1add r15, r16, r17 ; and r5, r6, r7 } + { prefetch_l1 r25 ; shl1add r15, r16, r17 ; shl1add r5, r6, r7 } + { prefetch_l1 r25 ; shl1add r5, r6, r7 ; lnk r15 } + { prefetch_l1 r25 ; shl1addx r15, r16, r17 ; cmpltsi r5, r6, 5 } + { prefetch_l1 r25 ; shl1addx r15, r16, r17 ; shrui r5, r6, 5 } + { prefetch_l1 r25 ; shl1addx r5, r6, r7 ; shl r15, r16, r17 } + { prefetch_l1 r25 ; shl2add r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { prefetch_l1 r25 ; shl2add r5, r6, r7 ; addi r15, r16, 5 } + { prefetch_l1 r25 ; shl2add r5, r6, r7 ; shru r15, r16, r17 } + { prefetch_l1 r25 ; shl2addx r15, r16, r17 ; mz r5, r6, r7 } + { prefetch_l1 r25 ; shl2addx r5, r6, r7 ; cmpltsi r15, r16, 5 } + { prefetch_l1 r25 ; shl3add r15, r16, r17 ; and r5, r6, r7 } + { prefetch_l1 r25 ; shl3add r15, r16, r17 ; shl1add r5, r6, r7 } + { prefetch_l1 r25 ; shl3add r5, r6, r7 ; lnk r15 } + { prefetch_l1 r25 ; shl3addx r15, r16, r17 ; cmpltsi r5, r6, 5 } + { prefetch_l1 r25 ; shl3addx r15, r16, r17 ; shrui r5, r6, 5 } + { prefetch_l1 r25 ; shl3addx r5, r6, r7 ; shl r15, r16, r17 } + { prefetch_l1 r25 ; shli r15, r16, 5 ; mul_hs_hs r5, r6, r7 } + { prefetch_l1 r25 ; shli r5, r6, 5 ; addi r15, r16, 5 } + { prefetch_l1 r25 ; shli r5, r6, 5 ; shru r15, r16, r17 } + { prefetch_l1 r25 ; shrs r15, r16, r17 ; mz r5, r6, r7 } + { prefetch_l1 r25 ; shrs r5, r6, r7 ; cmpltsi r15, r16, 5 } + { prefetch_l1 r25 ; shrsi r15, r16, 5 ; and r5, r6, r7 } + { prefetch_l1 r25 ; shrsi r15, r16, 5 ; shl1add r5, r6, r7 } + { prefetch_l1 r25 ; shrsi r5, r6, 5 ; lnk r15 } + { prefetch_l1 r25 ; shru r15, r16, r17 ; cmpltsi r5, r6, 5 } + { prefetch_l1 r25 ; shru r15, r16, r17 ; shrui r5, r6, 5 } + { prefetch_l1 r25 ; shru r5, r6, r7 ; shl r15, r16, r17 } + { prefetch_l1 r25 ; shrui r15, r16, 5 ; mul_hs_hs r5, r6, r7 } + { prefetch_l1 r25 ; shrui r5, r6, 5 ; addi r15, r16, 5 } + { prefetch_l1 r25 ; shrui r5, r6, 5 ; shru r15, r16, r17 } + { prefetch_l1 r25 ; sub r15, r16, r17 ; mz r5, r6, r7 } + { prefetch_l1 r25 ; sub r5, r6, r7 ; cmpltsi r15, r16, 5 } + { prefetch_l1 r25 ; subx r15, r16, r17 ; and r5, r6, r7 } + { prefetch_l1 r25 ; subx r15, r16, r17 ; shl1add r5, r6, r7 } + { prefetch_l1 r25 ; subx r5, r6, r7 ; lnk r15 } + { prefetch_l1 r25 ; tblidxb0 r5, r6 ; fnop } + { prefetch_l1 r25 ; tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 } + { prefetch_l1 r25 ; tblidxb2 r5, r6 ; add r15, r16, r17 } + { prefetch_l1 r25 ; tblidxb2 r5, r6 ; shrsi r15, r16, 5 } + { prefetch_l1 r25 ; tblidxb3 r5, r6 ; shl1addx r15, r16, r17 } + { prefetch_l1 r25 ; xor r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { prefetch_l1 r25 ; xor r5, r6, r7 ; addxi r15, r16, 5 } + { prefetch_l1 r25 ; xor r5, r6, r7 ; sub r15, r16, r17 } + { prefetch_l1_fault r15 ; dblalign4 r5, r6, r7 } + { prefetch_l1_fault r15 ; mula_hu_ls r5, r6, r7 } + { prefetch_l1_fault r15 ; tblidxb2 r5, r6 } + { prefetch_l1_fault r15 ; v1shli r5, r6, 5 } + { prefetch_l1_fault r15 ; v2sadu r5, r6, r7 } + { prefetch_l1_fault r25 ; add r15, r16, r17 ; ctz r5, r6 } + { prefetch_l1_fault r25 ; add r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch_l1_fault r25 ; add r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch_l1_fault r25 ; addi r15, r16, 5 ; mul_lu_lu r5, r6, r7 } + { prefetch_l1_fault r25 ; addi r5, r6, 5 ; and r15, r16, r17 } + { prefetch_l1_fault r25 ; addi r5, r6, 5 ; subx r15, r16, r17 } + { prefetch_l1_fault r25 ; addx r15, r16, r17 ; or r5, r6, r7 } + { prefetch_l1_fault r25 ; addx r5, r6, r7 ; fnop } + { prefetch_l1_fault r25 ; addxi r15, r16, 5 ; cmoveqz r5, r6, r7 } + { prefetch_l1_fault r25 ; addxi r15, r16, 5 ; shl2addx r5, r6, r7 } + { prefetch_l1_fault r25 ; addxi r5, r6, 5 ; movei r15, 5 } + { prefetch_l1_fault r25 ; and r15, r16, r17 ; ctz r5, r6 } + { prefetch_l1_fault r25 ; and r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch_l1_fault r25 ; and r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch_l1_fault r25 ; andi r15, r16, 5 ; mul_lu_lu r5, r6, r7 } + { prefetch_l1_fault r25 ; andi r5, r6, 5 ; and r15, r16, r17 } + { prefetch_l1_fault r25 ; andi r5, r6, 5 ; subx r15, r16, r17 } + { prefetch_l1_fault r25 ; clz r5, r6 ; shl3addx r15, r16, r17 } + { prefetch_l1_fault r25 ; cmoveqz r5, r6, r7 ; rotli r15, r16, 5 } + { prefetch_l1_fault r25 ; cmovnez r5, r6, r7 ; move r15, r16 } + { prefetch_l1_fault r25 ; cmpeq r15, r16, r17 ; cmpne r5, r6, r7 } + { prefetch_l1_fault r25 ; cmpeq r15, r16, r17 ; subx r5, r6, r7 } + { prefetch_l1_fault r25 ; cmpeq r5, r6, r7 ; shl1addx r15, r16, r17 } + { prefetch_l1_fault r25 ; cmpeqi r15, r16, 5 ; mul_ls_ls r5, r6, r7 } + { prefetch_l1_fault r25 ; cmpeqi r5, r6, 5 ; addxi r15, r16, 5 } + { prefetch_l1_fault r25 ; cmpeqi r5, r6, 5 ; sub r15, r16, r17 } + { prefetch_l1_fault r25 ; cmples r15, r16, r17 ; nor r5, r6, r7 } + { prefetch_l1_fault r25 ; cmples r5, r6, r7 ; cmpne r15, r16, r17 } + { prefetch_l1_fault r25 ; cmpleu r15, r16, r17 ; clz r5, r6 } + { prefetch_l1_fault r25 ; cmpleu r15, r16, r17 ; shl2add r5, r6, r7 } + { prefetch_l1_fault r25 ; cmpleu r5, r6, r7 ; move r15, r16 } + { prefetch_l1_fault r25 ; cmplts r15, r16, r17 ; cmpne r5, r6, r7 } + { prefetch_l1_fault r25 ; cmplts r15, r16, r17 ; subx r5, r6, r7 } + { prefetch_l1_fault r25 ; cmplts r5, r6, r7 ; shl1addx r15, r16, r17 } + { prefetch_l1_fault r25 ; cmpltsi r15, r16, 5 ; mul_ls_ls r5, r6, r7 } + { prefetch_l1_fault r25 ; cmpltsi r5, r6, 5 ; addxi r15, r16, 5 } + { prefetch_l1_fault r25 ; cmpltsi r5, r6, 5 ; sub r15, r16, r17 } + { prefetch_l1_fault r25 ; cmpltu r15, r16, r17 ; nor r5, r6, r7 } + { prefetch_l1_fault r25 ; cmpltu r5, r6, r7 ; cmpne r15, r16, r17 } + { prefetch_l1_fault r25 ; cmpne r15, r16, r17 ; clz r5, r6 } + { prefetch_l1_fault r25 ; cmpne r15, r16, r17 ; shl2add r5, r6, r7 } + { prefetch_l1_fault r25 ; cmpne r5, r6, r7 ; move r15, r16 } + { prefetch_l1_fault r25 ; ctz r5, r6 ; info 19 } + { prefetch_l1_fault r25 ; fnop ; and r5, r6, r7 } + { prefetch_l1_fault r25 ; fnop ; mul_ls_ls r5, r6, r7 } + { prefetch_l1_fault r25 ; fnop ; shrsi r15, r16, 5 } + { prefetch_l1_fault r25 ; fsingle_pack1 r5, r6 ; move r15, r16 } + { prefetch_l1_fault r25 ; ill ; cmpne r5, r6, r7 } + { prefetch_l1_fault r25 ; ill ; subx r5, r6, r7 } + { prefetch_l1_fault r25 ; info 19 ; fsingle_pack1 r5, r6 } + { prefetch_l1_fault r25 ; info 19 ; shl1add r15, r16, r17 } + { prefetch_l1_fault r25 ; jalr r15 ; cmoveqz r5, r6, r7 } + { prefetch_l1_fault r25 ; jalr r15 ; shl2addx r5, r6, r7 } + { prefetch_l1_fault r25 ; jalrp r15 ; mul_hs_hs r5, r6, r7 } + { prefetch_l1_fault r25 ; jr r15 ; addi r5, r6, 5 } + { prefetch_l1_fault r25 ; jr r15 ; rotl r5, r6, r7 } + { prefetch_l1_fault r25 ; jrp r15 ; fnop } + { prefetch_l1_fault r25 ; jrp r15 ; tblidxb1 r5, r6 } + { prefetch_l1_fault r25 ; lnk r15 ; nop } + { prefetch_l1_fault r25 ; mnz r15, r16, r17 ; cmpleu r5, r6, r7 } + { prefetch_l1_fault r25 ; mnz r15, r16, r17 ; shrsi r5, r6, 5 } + { prefetch_l1_fault r25 ; mnz r5, r6, r7 ; rotl r15, r16, r17 } + { prefetch_l1_fault r25 ; move r15, r16 ; move r5, r6 } + { prefetch_l1_fault r25 ; move r15, r16 } + { prefetch_l1_fault r25 ; move r5, r6 ; shrs r15, r16, r17 } + { prefetch_l1_fault r25 ; movei r15, 5 ; mulax r5, r6, r7 } + { prefetch_l1_fault r25 ; movei r5, 5 ; cmpleu r15, r16, r17 } + { prefetch_l1_fault r25 ; mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 } + { prefetch_l1_fault r25 ; mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 } + { prefetch_l1_fault r25 ; mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 } + { prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 ; or r15, r16, r17 } + { prefetch_l1_fault r25 ; mul_lu_lu r5, r6, r7 ; lnk r15 } + { prefetch_l1_fault r25 ; mula_hs_hs r5, r6, r7 ; fnop } + { prefetch_l1_fault r25 ; mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 } + { prefetch_l1_fault r25 ; mula_ls_ls r5, r6, r7 ; add r15, r16, r17 } + { prefetch_l1_fault r25 ; mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 } + { prefetch_l1_fault r25 ; mula_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 } + { prefetch_l1_fault r25 ; mulax r5, r6, r7 ; nop } + { prefetch_l1_fault r25 ; mulx r5, r6, r7 ; jr r15 } + { prefetch_l1_fault r25 ; mz r15, r16, r17 ; cmpleu r5, r6, r7 } + { prefetch_l1_fault r25 ; mz r15, r16, r17 ; shrsi r5, r6, 5 } + { prefetch_l1_fault r25 ; mz r5, r6, r7 ; rotl r15, r16, r17 } + { prefetch_l1_fault r25 ; nop ; cmpleu r5, r6, r7 } + { prefetch_l1_fault r25 ; nop ; or r15, r16, r17 } + { prefetch_l1_fault r25 ; nop ; tblidxb3 r5, r6 } + { prefetch_l1_fault r25 ; nor r15, r16, r17 ; nor r5, r6, r7 } + { prefetch_l1_fault r25 ; nor r5, r6, r7 ; cmpne r15, r16, r17 } + { prefetch_l1_fault r25 ; or r15, r16, r17 ; clz r5, r6 } + { prefetch_l1_fault r25 ; or r15, r16, r17 ; shl2add r5, r6, r7 } + { prefetch_l1_fault r25 ; or r5, r6, r7 ; move r15, r16 } + { prefetch_l1_fault r25 ; pcnt r5, r6 ; info 19 } + { prefetch_l1_fault r25 ; revbits r5, r6 ; cmpleu r15, r16, r17 } + { prefetch_l1_fault r25 ; revbytes r5, r6 ; addx r15, r16, r17 } + { prefetch_l1_fault r25 ; revbytes r5, r6 ; shrui r15, r16, 5 } + { prefetch_l1_fault r25 ; rotl r15, r16, r17 ; nop } + { prefetch_l1_fault r25 ; rotl r5, r6, r7 ; cmpltu r15, r16, r17 } + { prefetch_l1_fault r25 ; rotli r15, r16, 5 ; andi r5, r6, 5 } + { prefetch_l1_fault r25 ; rotli r15, r16, 5 ; shl1addx r5, r6, r7 } + { prefetch_l1_fault r25 ; rotli r5, r6, 5 ; mnz r15, r16, r17 } + { prefetch_l1_fault r25 ; shl r15, r16, r17 ; cmpltu r5, r6, r7 } + { prefetch_l1_fault r25 ; shl r15, r16, r17 ; sub r5, r6, r7 } + { prefetch_l1_fault r25 ; shl r5, r6, r7 ; shl1add r15, r16, r17 } + { prefetch_l1_fault r25 ; shl1add r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { prefetch_l1_fault r25 ; shl1add r5, r6, r7 ; addx r15, r16, r17 } + { prefetch_l1_fault r25 ; shl1add r5, r6, r7 ; shrui r15, r16, 5 } + { prefetch_l1_fault r25 ; shl1addx r15, r16, r17 ; nop } + { prefetch_l1_fault r25 ; shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 } + { prefetch_l1_fault r25 ; shl2add r15, r16, r17 ; andi r5, r6, 5 } + { prefetch_l1_fault r25 ; shl2add r15, r16, r17 ; shl1addx r5, r6, r7 } + { prefetch_l1_fault r25 ; shl2add r5, r6, r7 ; mnz r15, r16, r17 } + { prefetch_l1_fault r25 ; shl2addx r15, r16, r17 ; cmpltu r5, r6, r7 } + { prefetch_l1_fault r25 ; shl2addx r15, r16, r17 ; sub r5, r6, r7 } + { prefetch_l1_fault r25 ; shl2addx r5, r6, r7 ; shl1add r15, r16, r17 } + { prefetch_l1_fault r25 ; shl3add r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { prefetch_l1_fault r25 ; shl3add r5, r6, r7 ; addx r15, r16, r17 } + { prefetch_l1_fault r25 ; shl3add r5, r6, r7 ; shrui r15, r16, 5 } + { prefetch_l1_fault r25 ; shl3addx r15, r16, r17 ; nop } + { prefetch_l1_fault r25 ; shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 } + { prefetch_l1_fault r25 ; shli r15, r16, 5 ; andi r5, r6, 5 } + { prefetch_l1_fault r25 ; shli r15, r16, 5 ; shl1addx r5, r6, r7 } + { prefetch_l1_fault r25 ; shli r5, r6, 5 ; mnz r15, r16, r17 } + { prefetch_l1_fault r25 ; shrs r15, r16, r17 ; cmpltu r5, r6, r7 } + { prefetch_l1_fault r25 ; shrs r15, r16, r17 ; sub r5, r6, r7 } + { prefetch_l1_fault r25 ; shrs r5, r6, r7 ; shl1add r15, r16, r17 } + { prefetch_l1_fault r25 ; shrsi r15, r16, 5 ; mul_hu_hu r5, r6, r7 } + { prefetch_l1_fault r25 ; shrsi r5, r6, 5 ; addx r15, r16, r17 } + { prefetch_l1_fault r25 ; shrsi r5, r6, 5 ; shrui r15, r16, 5 } + { prefetch_l1_fault r25 ; shru r15, r16, r17 ; nop } + { prefetch_l1_fault r25 ; shru r5, r6, r7 ; cmpltu r15, r16, r17 } + { prefetch_l1_fault r25 ; shrui r15, r16, 5 ; andi r5, r6, 5 } + { prefetch_l1_fault r25 ; shrui r15, r16, 5 ; shl1addx r5, r6, r7 } + { prefetch_l1_fault r25 ; shrui r5, r6, 5 ; mnz r15, r16, r17 } + { prefetch_l1_fault r25 ; sub r15, r16, r17 ; cmpltu r5, r6, r7 } + { prefetch_l1_fault r25 ; sub r15, r16, r17 ; sub r5, r6, r7 } + { prefetch_l1_fault r25 ; sub r5, r6, r7 ; shl1add r15, r16, r17 } + { prefetch_l1_fault r25 ; subx r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { prefetch_l1_fault r25 ; subx r5, r6, r7 ; addx r15, r16, r17 } + { prefetch_l1_fault r25 ; subx r5, r6, r7 ; shrui r15, r16, 5 } + { prefetch_l1_fault r25 ; tblidxb0 r5, r6 ; shl2addx r15, r16, r17 } + { prefetch_l1_fault r25 ; tblidxb1 r5, r6 ; or r15, r16, r17 } + { prefetch_l1_fault r25 ; tblidxb2 r5, r6 ; lnk r15 } + { prefetch_l1_fault r25 ; tblidxb3 r5, r6 ; fnop } + { prefetch_l1_fault r25 ; xor r15, r16, r17 ; cmoveqz r5, r6, r7 } + { prefetch_l1_fault r25 ; xor r15, r16, r17 ; shl2addx r5, r6, r7 } + { prefetch_l1_fault r25 ; xor r5, r6, r7 ; movei r15, 5 } + { prefetch_l2 r15 ; cmples r5, r6, r7 } + { prefetch_l2 r15 ; mnz r5, r6, r7 } + { prefetch_l2 r15 ; shl2add r5, r6, r7 } + { prefetch_l2 r15 ; v1dotpa r5, r6, r7 } + { prefetch_l2 r15 ; v2dotp r5, r6, r7 } + { prefetch_l2 r15 ; xor r5, r6, r7 } + { prefetch_l2 r25 ; add r15, r16, r17 ; pcnt r5, r6 } + { prefetch_l2 r25 ; add r5, r6, r7 ; ill } + { prefetch_l2 r25 ; addi r15, r16, 5 ; cmovnez r5, r6, r7 } + { prefetch_l2 r25 ; addi r15, r16, 5 ; shl3add r5, r6, r7 } + { prefetch_l2 r25 ; addi r5, r6, 5 ; mz r15, r16, r17 } + { prefetch_l2 r25 ; addx r15, r16, r17 ; fnop } + { prefetch_l2 r25 ; addx r15, r16, r17 ; tblidxb1 r5, r6 } + { prefetch_l2 r25 ; addx r5, r6, r7 ; shl2addx r15, r16, r17 } + { prefetch_l2 r25 ; addxi r15, r16, 5 ; mula_hs_hs r5, r6, r7 } + { prefetch_l2 r25 ; addxi r5, r6, 5 ; andi r15, r16, 5 } + { prefetch_l2 r25 ; addxi r5, r6, 5 ; xor r15, r16, r17 } + { prefetch_l2 r25 ; and r15, r16, r17 ; pcnt r5, r6 } + { prefetch_l2 r25 ; and r5, r6, r7 ; ill } + { prefetch_l2 r25 ; andi r15, r16, 5 ; cmovnez r5, r6, r7 } + { prefetch_l2 r25 ; andi r15, r16, 5 ; shl3add r5, r6, r7 } + { prefetch_l2 r25 ; andi r5, r6, 5 ; mz r15, r16, r17 } + { prefetch_l2 r25 ; clz r5, r6 ; jalrp r15 } + { prefetch_l2 r25 ; cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 } + { prefetch_l2 r25 ; cmovnez r5, r6, r7 ; and r15, r16, r17 } + { prefetch_l2 r25 ; cmovnez r5, r6, r7 ; subx r15, r16, r17 } + { prefetch_l2 r25 ; cmpeq r15, r16, r17 ; or r5, r6, r7 } + { prefetch_l2 r25 ; cmpeq r5, r6, r7 ; fnop } + { prefetch_l2 r25 ; cmpeqi r15, r16, 5 ; cmoveqz r5, r6, r7 } + { prefetch_l2 r25 ; cmpeqi r15, r16, 5 ; shl2addx r5, r6, r7 } + { prefetch_l2 r25 ; cmpeqi r5, r6, 5 ; movei r15, 5 } + { prefetch_l2 r25 ; cmples r15, r16, r17 ; ctz r5, r6 } + { prefetch_l2 r25 ; cmples r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch_l2 r25 ; cmples r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch_l2 r25 ; cmpleu r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { prefetch_l2 r25 ; cmpleu r5, r6, r7 ; and r15, r16, r17 } + { prefetch_l2 r25 ; cmpleu r5, r6, r7 ; subx r15, r16, r17 } + { prefetch_l2 r25 ; cmplts r15, r16, r17 ; or r5, r6, r7 } + { prefetch_l2 r25 ; cmplts r5, r6, r7 ; fnop } + { prefetch_l2 r25 ; cmpltsi r15, r16, 5 ; cmoveqz r5, r6, r7 } + { prefetch_l2 r25 ; cmpltsi r15, r16, 5 ; shl2addx r5, r6, r7 } + { prefetch_l2 r25 ; cmpltsi r5, r6, 5 ; movei r15, 5 } + { prefetch_l2 r25 ; cmpltu r15, r16, r17 ; ctz r5, r6 } + { prefetch_l2 r25 ; cmpltu r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch_l2 r25 ; cmpltu r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch_l2 r25 ; cmpne r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { prefetch_l2 r25 ; cmpne r5, r6, r7 ; and r15, r16, r17 } + { prefetch_l2 r25 ; cmpne r5, r6, r7 ; subx r15, r16, r17 } + { prefetch_l2 r25 ; ctz r5, r6 ; shl3addx r15, r16, r17 } + { prefetch_l2 r25 ; fnop ; cmpne r5, r6, r7 } + { prefetch_l2 r25 ; fnop ; rotli r5, r6, 5 } + { prefetch_l2 r25 ; fsingle_pack1 r5, r6 ; and r15, r16, r17 } + { prefetch_l2 r25 ; fsingle_pack1 r5, r6 ; subx r15, r16, r17 } + { prefetch_l2 r25 ; ill ; or r5, r6, r7 } + { prefetch_l2 r25 ; info 19 ; cmovnez r5, r6, r7 } + { prefetch_l2 r25 ; info 19 ; mula_lu_lu r5, r6, r7 } + { prefetch_l2 r25 ; info 19 ; shrui r5, r6, 5 } + { prefetch_l2 r25 ; jalr r15 ; mula_hs_hs r5, r6, r7 } + { prefetch_l2 r25 ; jalrp r15 ; andi r5, r6, 5 } + { prefetch_l2 r25 ; jalrp r15 ; shl1addx r5, r6, r7 } + { prefetch_l2 r25 ; jr r15 ; move r5, r6 } + { prefetch_l2 r25 ; jr r15 } + { prefetch_l2 r25 ; jrp r15 ; revbits r5, r6 } + { prefetch_l2 r25 ; lnk r15 ; cmpne r5, r6, r7 } + { prefetch_l2 r25 ; lnk r15 ; subx r5, r6, r7 } + { prefetch_l2 r25 ; mnz r15, r16, r17 ; mulx r5, r6, r7 } + { prefetch_l2 r25 ; mnz r5, r6, r7 ; cmplts r15, r16, r17 } + { prefetch_l2 r25 ; move r15, r16 ; addxi r5, r6, 5 } + { prefetch_l2 r25 ; move r15, r16 ; shl r5, r6, r7 } + { prefetch_l2 r25 ; move r5, r6 ; jrp r15 } + { prefetch_l2 r25 ; movei r15, 5 ; cmplts r5, r6, r7 } + { prefetch_l2 r25 ; movei r15, 5 ; shru r5, r6, r7 } + { prefetch_l2 r25 ; movei r5, 5 ; rotli r15, r16, 5 } + { prefetch_l2 r25 ; mul_hs_hs r5, r6, r7 ; move r15, r16 } + { prefetch_l2 r25 ; mul_hu_hu r5, r6, r7 ; info 19 } + { prefetch_l2 r25 ; mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 } + { prefetch_l2 r25 ; mul_lu_lu r5, r6, r7 ; addx r15, r16, r17 } + { prefetch_l2 r25 ; mul_lu_lu r5, r6, r7 ; shrui r15, r16, 5 } + { prefetch_l2 r25 ; mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 } + { prefetch_l2 r25 ; mula_hu_hu r5, r6, r7 ; or r15, r16, r17 } + { prefetch_l2 r25 ; mula_ls_ls r5, r6, r7 ; lnk r15 } + { prefetch_l2 r25 ; mula_lu_lu r5, r6, r7 ; fnop } + { prefetch_l2 r25 ; mulax r5, r6, r7 ; cmpeqi r15, r16, 5 } + { prefetch_l2 r25 ; mulx r5, r6, r7 ; add r15, r16, r17 } + { prefetch_l2 r25 ; mulx r5, r6, r7 ; shrsi r15, r16, 5 } + { prefetch_l2 r25 ; mz r15, r16, r17 ; mulx r5, r6, r7 } + { prefetch_l2 r25 ; mz r5, r6, r7 ; cmplts r15, r16, r17 } + { prefetch_l2 r25 ; nop ; addi r5, r6, 5 } + { prefetch_l2 r25 ; nop ; move r15, r16 } + { prefetch_l2 r25 ; nop ; shl3addx r15, r16, r17 } + { prefetch_l2 r25 ; nor r15, r16, r17 ; ctz r5, r6 } + { prefetch_l2 r25 ; nor r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch_l2 r25 ; nor r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch_l2 r25 ; or r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { prefetch_l2 r25 ; or r5, r6, r7 ; and r15, r16, r17 } + { prefetch_l2 r25 ; or r5, r6, r7 ; subx r15, r16, r17 } + { prefetch_l2 r25 ; pcnt r5, r6 ; shl3addx r15, r16, r17 } + { prefetch_l2 r25 ; revbits r5, r6 ; rotli r15, r16, 5 } + { prefetch_l2 r25 ; revbytes r5, r6 ; move r15, r16 } + { prefetch_l2 r25 ; rotl r15, r16, r17 ; cmpne r5, r6, r7 } + { prefetch_l2 r25 ; rotl r15, r16, r17 ; subx r5, r6, r7 } + { prefetch_l2 r25 ; rotl r5, r6, r7 ; shl1addx r15, r16, r17 } + { prefetch_l2 r25 ; rotli r15, r16, 5 ; mul_ls_ls r5, r6, r7 } + { prefetch_l2 r25 ; rotli r5, r6, 5 ; addxi r15, r16, 5 } + { prefetch_l2 r25 ; rotli r5, r6, 5 ; sub r15, r16, r17 } + { prefetch_l2 r25 ; shl r15, r16, r17 ; nor r5, r6, r7 } + { prefetch_l2 r25 ; shl r5, r6, r7 ; cmpne r15, r16, r17 } + { prefetch_l2 r25 ; shl1add r15, r16, r17 ; clz r5, r6 } + { prefetch_l2 r25 ; shl1add r15, r16, r17 ; shl2add r5, r6, r7 } + { prefetch_l2 r25 ; shl1add r5, r6, r7 ; move r15, r16 } + { prefetch_l2 r25 ; shl1addx r15, r16, r17 ; cmpne r5, r6, r7 } + { prefetch_l2 r25 ; shl1addx r15, r16, r17 ; subx r5, r6, r7 } + { prefetch_l2 r25 ; shl1addx r5, r6, r7 ; shl1addx r15, r16, r17 } + { prefetch_l2 r25 ; shl2add r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { prefetch_l2 r25 ; shl2add r5, r6, r7 ; addxi r15, r16, 5 } + { prefetch_l2 r25 ; shl2add r5, r6, r7 ; sub r15, r16, r17 } + { prefetch_l2 r25 ; shl2addx r15, r16, r17 ; nor r5, r6, r7 } + { prefetch_l2 r25 ; shl2addx r5, r6, r7 ; cmpne r15, r16, r17 } + { prefetch_l2 r25 ; shl3add r15, r16, r17 ; clz r5, r6 } + { prefetch_l2 r25 ; shl3add r15, r16, r17 ; shl2add r5, r6, r7 } + { prefetch_l2 r25 ; shl3add r5, r6, r7 ; move r15, r16 } + { prefetch_l2 r25 ; shl3addx r15, r16, r17 ; cmpne r5, r6, r7 } + { prefetch_l2 r25 ; shl3addx r15, r16, r17 ; subx r5, r6, r7 } + { prefetch_l2 r25 ; shl3addx r5, r6, r7 ; shl1addx r15, r16, r17 } + { prefetch_l2 r25 ; shli r15, r16, 5 ; mul_ls_ls r5, r6, r7 } + { prefetch_l2 r25 ; shli r5, r6, 5 ; addxi r15, r16, 5 } + { prefetch_l2 r25 ; shli r5, r6, 5 ; sub r15, r16, r17 } + { prefetch_l2 r25 ; shrs r15, r16, r17 ; nor r5, r6, r7 } + { prefetch_l2 r25 ; shrs r5, r6, r7 ; cmpne r15, r16, r17 } + { prefetch_l2 r25 ; shrsi r15, r16, 5 ; clz r5, r6 } + { prefetch_l2 r25 ; shrsi r15, r16, 5 ; shl2add r5, r6, r7 } + { prefetch_l2 r25 ; shrsi r5, r6, 5 ; move r15, r16 } + { prefetch_l2 r25 ; shru r15, r16, r17 ; cmpne r5, r6, r7 } + { prefetch_l2 r25 ; shru r15, r16, r17 ; subx r5, r6, r7 } + { prefetch_l2 r25 ; shru r5, r6, r7 ; shl1addx r15, r16, r17 } + { prefetch_l2 r25 ; shrui r15, r16, 5 ; mul_ls_ls r5, r6, r7 } + { prefetch_l2 r25 ; shrui r5, r6, 5 ; addxi r15, r16, 5 } + { prefetch_l2 r25 ; shrui r5, r6, 5 ; sub r15, r16, r17 } + { prefetch_l2 r25 ; sub r15, r16, r17 ; nor r5, r6, r7 } + { prefetch_l2 r25 ; sub r5, r6, r7 ; cmpne r15, r16, r17 } + { prefetch_l2 r25 ; subx r15, r16, r17 ; clz r5, r6 } + { prefetch_l2 r25 ; subx r15, r16, r17 ; shl2add r5, r6, r7 } + { prefetch_l2 r25 ; subx r5, r6, r7 ; move r15, r16 } + { prefetch_l2 r25 ; tblidxb0 r5, r6 ; info 19 } + { prefetch_l2 r25 ; tblidxb1 r5, r6 ; cmpleu r15, r16, r17 } + { prefetch_l2 r25 ; tblidxb2 r5, r6 ; addx r15, r16, r17 } + { prefetch_l2 r25 ; tblidxb2 r5, r6 ; shrui r15, r16, 5 } + { prefetch_l2 r25 ; tblidxb3 r5, r6 ; shl2addx r15, r16, r17 } + { prefetch_l2 r25 ; xor r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { prefetch_l2 r25 ; xor r5, r6, r7 ; andi r15, r16, 5 } + { prefetch_l2 r25 ; xor r5, r6, r7 ; xor r15, r16, r17 } + { prefetch_l2_fault r15 ; fdouble_add_flags r5, r6, r7 } + { prefetch_l2_fault r15 ; mula_ls_ls r5, r6, r7 } + { prefetch_l2_fault r15 ; v1add r5, r6, r7 } + { prefetch_l2_fault r15 ; v1shrsi r5, r6, 5 } + { prefetch_l2_fault r15 ; v2shli r5, r6, 5 } + { prefetch_l2_fault r25 ; add r15, r16, r17 ; fsingle_pack1 r5, r6 } + { prefetch_l2_fault r25 ; add r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch_l2_fault r25 ; add r5, r6, r7 ; shl3add r15, r16, r17 } + { prefetch_l2_fault r25 ; addi r15, r16, 5 ; mula_hu_hu r5, r6, r7 } + { prefetch_l2_fault r25 ; addi r5, r6, 5 ; cmpeq r15, r16, r17 } + { prefetch_l2_fault r25 ; addi r5, r6, 5 } + { prefetch_l2_fault r25 ; addx r15, r16, r17 ; revbits r5, r6 } + { prefetch_l2_fault r25 ; addx r5, r6, r7 ; info 19 } + { prefetch_l2_fault r25 ; addxi r15, r16, 5 ; cmpeq r5, r6, r7 } + { prefetch_l2_fault r25 ; addxi r15, r16, 5 ; shl3addx r5, r6, r7 } + { prefetch_l2_fault r25 ; addxi r5, r6, 5 ; nop } + { prefetch_l2_fault r25 ; and r15, r16, r17 ; fsingle_pack1 r5, r6 } + { prefetch_l2_fault r25 ; and r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch_l2_fault r25 ; and r5, r6, r7 ; shl3add r15, r16, r17 } + { prefetch_l2_fault r25 ; andi r15, r16, 5 ; mula_hu_hu r5, r6, r7 } + { prefetch_l2_fault r25 ; andi r5, r6, 5 ; cmpeq r15, r16, r17 } + { prefetch_l2_fault r25 ; andi r5, r6, 5 } + { prefetch_l2_fault r25 ; clz r5, r6 ; shrs r15, r16, r17 } + { prefetch_l2_fault r25 ; cmoveqz r5, r6, r7 ; shl1add r15, r16, r17 } + { prefetch_l2_fault r25 ; cmovnez r5, r6, r7 ; mz r15, r16, r17 } + { prefetch_l2_fault r25 ; cmpeq r15, r16, r17 ; fnop } + { prefetch_l2_fault r25 ; cmpeq r15, r16, r17 ; tblidxb1 r5, r6 } + { prefetch_l2_fault r25 ; cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 } + { prefetch_l2_fault r25 ; cmpeqi r15, r16, 5 ; mula_hs_hs r5, r6, r7 } + { prefetch_l2_fault r25 ; cmpeqi r5, r6, 5 ; andi r15, r16, 5 } + { prefetch_l2_fault r25 ; cmpeqi r5, r6, 5 ; xor r15, r16, r17 } + { prefetch_l2_fault r25 ; cmples r15, r16, r17 ; pcnt r5, r6 } + { prefetch_l2_fault r25 ; cmples r5, r6, r7 ; ill } + { prefetch_l2_fault r25 ; cmpleu r15, r16, r17 ; cmovnez r5, r6, r7 } + { prefetch_l2_fault r25 ; cmpleu r15, r16, r17 ; shl3add r5, r6, r7 } + { prefetch_l2_fault r25 ; cmpleu r5, r6, r7 ; mz r15, r16, r17 } + { prefetch_l2_fault r25 ; cmplts r15, r16, r17 ; fnop } + { prefetch_l2_fault r25 ; cmplts r15, r16, r17 ; tblidxb1 r5, r6 } + { prefetch_l2_fault r25 ; cmplts r5, r6, r7 ; shl2addx r15, r16, r17 } + { prefetch_l2_fault r25 ; cmpltsi r15, r16, 5 ; mula_hs_hs r5, r6, r7 } + { prefetch_l2_fault r25 ; cmpltsi r5, r6, 5 ; andi r15, r16, 5 } + { prefetch_l2_fault r25 ; cmpltsi r5, r6, 5 ; xor r15, r16, r17 } + { prefetch_l2_fault r25 ; cmpltu r15, r16, r17 ; pcnt r5, r6 } + { prefetch_l2_fault r25 ; cmpltu r5, r6, r7 ; ill } + { prefetch_l2_fault r25 ; cmpne r15, r16, r17 ; cmovnez r5, r6, r7 } + { prefetch_l2_fault r25 ; cmpne r15, r16, r17 ; shl3add r5, r6, r7 } + { prefetch_l2_fault r25 ; cmpne r5, r6, r7 ; mz r15, r16, r17 } + { prefetch_l2_fault r25 ; ctz r5, r6 ; jalrp r15 } + { prefetch_l2_fault r25 ; fnop ; andi r5, r6, 5 } + { prefetch_l2_fault r25 ; fnop ; mula_hs_hs r5, r6, r7 } + { prefetch_l2_fault r25 ; fnop ; shru r15, r16, r17 } + { prefetch_l2_fault r25 ; fsingle_pack1 r5, r6 ; mz r15, r16, r17 } + { prefetch_l2_fault r25 ; ill ; fnop } + { prefetch_l2_fault r25 ; ill ; tblidxb1 r5, r6 } + { prefetch_l2_fault r25 ; info 19 ; info 19 } + { prefetch_l2_fault r25 ; info 19 ; shl1addx r15, r16, r17 } + { prefetch_l2_fault r25 ; jalr r15 ; cmpeq r5, r6, r7 } + { prefetch_l2_fault r25 ; jalr r15 ; shl3addx r5, r6, r7 } + { prefetch_l2_fault r25 ; jalrp r15 ; mul_ls_ls r5, r6, r7 } + { prefetch_l2_fault r25 ; jr r15 ; addxi r5, r6, 5 } + { prefetch_l2_fault r25 ; jr r15 ; shl r5, r6, r7 } + { prefetch_l2_fault r25 ; jrp r15 ; info 19 } + { prefetch_l2_fault r25 ; jrp r15 ; tblidxb3 r5, r6 } + { prefetch_l2_fault r25 ; lnk r15 ; or r5, r6, r7 } + { prefetch_l2_fault r25 ; mnz r15, r16, r17 ; cmpltsi r5, r6, 5 } + { prefetch_l2_fault r25 ; mnz r15, r16, r17 ; shrui r5, r6, 5 } + { prefetch_l2_fault r25 ; mnz r5, r6, r7 ; shl r15, r16, r17 } + { prefetch_l2_fault r25 ; move r15, r16 ; mul_hs_hs r5, r6, r7 } + { prefetch_l2_fault r25 ; move r5, r6 ; addi r15, r16, 5 } + { prefetch_l2_fault r25 ; move r5, r6 ; shru r15, r16, r17 } + { prefetch_l2_fault r25 ; movei r15, 5 ; mz r5, r6, r7 } + { prefetch_l2_fault r25 ; movei r5, 5 ; cmpltsi r15, r16, 5 } + { prefetch_l2_fault r25 ; mul_hs_hs r5, r6, r7 ; and r15, r16, r17 } + { prefetch_l2_fault r25 ; mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 } + { prefetch_l2_fault r25 ; mul_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 } + { prefetch_l2_fault r25 ; mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 } + { prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 ; move r15, r16 } + { prefetch_l2_fault r25 ; mula_hs_hs r5, r6, r7 ; info 19 } + { prefetch_l2_fault r25 ; mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 } + { prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 } + { prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 ; shrui r15, r16, 5 } + { prefetch_l2_fault r25 ; mula_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 } + { prefetch_l2_fault r25 ; mulax r5, r6, r7 ; or r15, r16, r17 } + { prefetch_l2_fault r25 ; mulx r5, r6, r7 ; lnk r15 } + { prefetch_l2_fault r25 ; mz r15, r16, r17 ; cmpltsi r5, r6, 5 } + { prefetch_l2_fault r25 ; mz r15, r16, r17 ; shrui r5, r6, 5 } + { prefetch_l2_fault r25 ; mz r5, r6, r7 ; shl r15, r16, r17 } + { prefetch_l2_fault r25 ; nop ; cmplts r5, r6, r7 } + { prefetch_l2_fault r25 ; nop ; pcnt r5, r6 } + { prefetch_l2_fault r25 ; nop ; xor r5, r6, r7 } + { prefetch_l2_fault r25 ; nor r15, r16, r17 ; pcnt r5, r6 } + { prefetch_l2_fault r25 ; nor r5, r6, r7 ; ill } + { prefetch_l2_fault r25 ; or r15, r16, r17 ; cmovnez r5, r6, r7 } + { prefetch_l2_fault r25 ; or r15, r16, r17 ; shl3add r5, r6, r7 } + { prefetch_l2_fault r25 ; or r5, r6, r7 ; mz r15, r16, r17 } + { prefetch_l2_fault r25 ; pcnt r5, r6 ; jalrp r15 } + { prefetch_l2_fault r25 ; revbits r5, r6 ; cmpltsi r15, r16, 5 } + { prefetch_l2_fault r25 ; revbytes r5, r6 ; and r15, r16, r17 } + { prefetch_l2_fault r25 ; revbytes r5, r6 ; subx r15, r16, r17 } + { prefetch_l2_fault r25 ; rotl r15, r16, r17 ; or r5, r6, r7 } + { prefetch_l2_fault r25 ; rotl r5, r6, r7 ; fnop } + { prefetch_l2_fault r25 ; rotli r15, r16, 5 ; cmoveqz r5, r6, r7 } + { prefetch_l2_fault r25 ; rotli r15, r16, 5 ; shl2addx r5, r6, r7 } + { prefetch_l2_fault r25 ; rotli r5, r6, 5 ; movei r15, 5 } + { prefetch_l2_fault r25 ; shl r15, r16, r17 ; ctz r5, r6 } + { prefetch_l2_fault r25 ; shl r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch_l2_fault r25 ; shl r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch_l2_fault r25 ; shl1add r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { prefetch_l2_fault r25 ; shl1add r5, r6, r7 ; and r15, r16, r17 } + { prefetch_l2_fault r25 ; shl1add r5, r6, r7 ; subx r15, r16, r17 } + { prefetch_l2_fault r25 ; shl1addx r15, r16, r17 ; or r5, r6, r7 } + { prefetch_l2_fault r25 ; shl1addx r5, r6, r7 ; fnop } + { prefetch_l2_fault r25 ; shl2add r15, r16, r17 ; cmoveqz r5, r6, r7 } + { prefetch_l2_fault r25 ; shl2add r15, r16, r17 ; shl2addx r5, r6, r7 } + { prefetch_l2_fault r25 ; shl2add r5, r6, r7 ; movei r15, 5 } + { prefetch_l2_fault r25 ; shl2addx r15, r16, r17 ; ctz r5, r6 } + { prefetch_l2_fault r25 ; shl2addx r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch_l2_fault r25 ; shl2addx r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch_l2_fault r25 ; shl3add r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { prefetch_l2_fault r25 ; shl3add r5, r6, r7 ; and r15, r16, r17 } + { prefetch_l2_fault r25 ; shl3add r5, r6, r7 ; subx r15, r16, r17 } + { prefetch_l2_fault r25 ; shl3addx r15, r16, r17 ; or r5, r6, r7 } + { prefetch_l2_fault r25 ; shl3addx r5, r6, r7 ; fnop } + { prefetch_l2_fault r25 ; shli r15, r16, 5 ; cmoveqz r5, r6, r7 } + { prefetch_l2_fault r25 ; shli r15, r16, 5 ; shl2addx r5, r6, r7 } + { prefetch_l2_fault r25 ; shli r5, r6, 5 ; movei r15, 5 } + { prefetch_l2_fault r25 ; shrs r15, r16, r17 ; ctz r5, r6 } + { prefetch_l2_fault r25 ; shrs r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch_l2_fault r25 ; shrs r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch_l2_fault r25 ; shrsi r15, r16, 5 ; mul_lu_lu r5, r6, r7 } + { prefetch_l2_fault r25 ; shrsi r5, r6, 5 ; and r15, r16, r17 } + { prefetch_l2_fault r25 ; shrsi r5, r6, 5 ; subx r15, r16, r17 } + { prefetch_l2_fault r25 ; shru r15, r16, r17 ; or r5, r6, r7 } + { prefetch_l2_fault r25 ; shru r5, r6, r7 ; fnop } + { prefetch_l2_fault r25 ; shrui r15, r16, 5 ; cmoveqz r5, r6, r7 } + { prefetch_l2_fault r25 ; shrui r15, r16, 5 ; shl2addx r5, r6, r7 } + { prefetch_l2_fault r25 ; shrui r5, r6, 5 ; movei r15, 5 } + { prefetch_l2_fault r25 ; sub r15, r16, r17 ; ctz r5, r6 } + { prefetch_l2_fault r25 ; sub r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch_l2_fault r25 ; sub r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch_l2_fault r25 ; subx r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { prefetch_l2_fault r25 ; subx r5, r6, r7 ; and r15, r16, r17 } + { prefetch_l2_fault r25 ; subx r5, r6, r7 ; subx r15, r16, r17 } + { prefetch_l2_fault r25 ; tblidxb0 r5, r6 ; shl3addx r15, r16, r17 } + { prefetch_l2_fault r25 ; tblidxb1 r5, r6 ; rotli r15, r16, 5 } + { prefetch_l2_fault r25 ; tblidxb2 r5, r6 ; move r15, r16 } + { prefetch_l2_fault r25 ; tblidxb3 r5, r6 ; info 19 } + { prefetch_l2_fault r25 ; xor r15, r16, r17 ; cmpeq r5, r6, r7 } + { prefetch_l2_fault r25 ; xor r15, r16, r17 ; shl3addx r5, r6, r7 } + { prefetch_l2_fault r25 ; xor r5, r6, r7 ; nop } + { prefetch_l3 r15 ; cmplts r5, r6, r7 } + { prefetch_l3 r15 ; movei r5, 5 } + { prefetch_l3 r15 ; shl3add r5, r6, r7 } + { prefetch_l3 r15 ; v1dotpua r5, r6, r7 } + { prefetch_l3 r15 ; v2int_h r5, r6, r7 } + { prefetch_l3 r25 ; add r15, r16, r17 ; add r5, r6, r7 } + { prefetch_l3 r25 ; add r15, r16, r17 ; revbytes r5, r6 } + { prefetch_l3 r25 ; add r5, r6, r7 ; jalr r15 } + { prefetch_l3 r25 ; addi r15, r16, 5 ; cmpeqi r5, r6, 5 } + { prefetch_l3 r25 ; addi r15, r16, 5 ; shli r5, r6, 5 } + { prefetch_l3 r25 ; addi r5, r6, 5 ; nor r15, r16, r17 } + { prefetch_l3 r25 ; addx r15, r16, r17 ; info 19 } + { prefetch_l3 r25 ; addx r15, r16, r17 ; tblidxb3 r5, r6 } + { prefetch_l3 r25 ; addx r5, r6, r7 ; shl3addx r15, r16, r17 } + { prefetch_l3 r25 ; addxi r15, r16, 5 ; mula_ls_ls r5, r6, r7 } + { prefetch_l3 r25 ; addxi r5, r6, 5 ; cmpeqi r15, r16, 5 } + { prefetch_l3 r25 ; and r15, r16, r17 ; add r5, r6, r7 } + { prefetch_l3 r25 ; and r15, r16, r17 ; revbytes r5, r6 } + { prefetch_l3 r25 ; and r5, r6, r7 ; jalr r15 } + { prefetch_l3 r25 ; andi r15, r16, 5 ; cmpeqi r5, r6, 5 } + { prefetch_l3 r25 ; andi r15, r16, 5 ; shli r5, r6, 5 } + { prefetch_l3 r25 ; andi r5, r6, 5 ; nor r15, r16, r17 } + { prefetch_l3 r25 ; clz r5, r6 ; jrp r15 } + { prefetch_l3 r25 ; cmoveqz r5, r6, r7 ; cmpne r15, r16, r17 } + { prefetch_l3 r25 ; cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 } + { prefetch_l3 r25 ; cmovnez r5, r6, r7 } + { prefetch_l3 r25 ; cmpeq r15, r16, r17 ; revbits r5, r6 } + { prefetch_l3 r25 ; cmpeq r5, r6, r7 ; info 19 } + { prefetch_l3 r25 ; cmpeqi r15, r16, 5 ; cmpeq r5, r6, r7 } + { prefetch_l3 r25 ; cmpeqi r15, r16, 5 ; shl3addx r5, r6, r7 } + { prefetch_l3 r25 ; cmpeqi r5, r6, 5 ; nop } + { prefetch_l3 r25 ; cmples r15, r16, r17 ; fsingle_pack1 r5, r6 } + { prefetch_l3 r25 ; cmples r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch_l3 r25 ; cmples r5, r6, r7 ; shl3add r15, r16, r17 } + { prefetch_l3 r25 ; cmpleu r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { prefetch_l3 r25 ; cmpleu r5, r6, r7 ; cmpeq r15, r16, r17 } + { prefetch_l3 r25 ; cmpleu r5, r6, r7 } + { prefetch_l3 r25 ; cmplts r15, r16, r17 ; revbits r5, r6 } + { prefetch_l3 r25 ; cmplts r5, r6, r7 ; info 19 } + { prefetch_l3 r25 ; cmpltsi r15, r16, 5 ; cmpeq r5, r6, r7 } + { prefetch_l3 r25 ; cmpltsi r15, r16, 5 ; shl3addx r5, r6, r7 } + { prefetch_l3 r25 ; cmpltsi r5, r6, 5 ; nop } + { prefetch_l3 r25 ; cmpltu r15, r16, r17 ; fsingle_pack1 r5, r6 } + { prefetch_l3 r25 ; cmpltu r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch_l3 r25 ; cmpltu r5, r6, r7 ; shl3add r15, r16, r17 } + { prefetch_l3 r25 ; cmpne r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { prefetch_l3 r25 ; cmpne r5, r6, r7 ; cmpeq r15, r16, r17 } + { prefetch_l3 r25 ; cmpne r5, r6, r7 } + { prefetch_l3 r25 ; ctz r5, r6 ; shrs r15, r16, r17 } + { prefetch_l3 r25 ; fnop ; fnop } + { prefetch_l3 r25 ; fnop ; shl r5, r6, r7 } + { prefetch_l3 r25 ; fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 } + { prefetch_l3 r25 ; fsingle_pack1 r5, r6 } + { prefetch_l3 r25 ; ill ; revbits r5, r6 } + { prefetch_l3 r25 ; info 19 ; cmpeq r5, r6, r7 } + { prefetch_l3 r25 ; info 19 ; mulx r5, r6, r7 } + { prefetch_l3 r25 ; info 19 ; sub r5, r6, r7 } + { prefetch_l3 r25 ; jalr r15 ; mula_ls_ls r5, r6, r7 } + { prefetch_l3 r25 ; jalrp r15 ; cmoveqz r5, r6, r7 } + { prefetch_l3 r25 ; jalrp r15 ; shl2addx r5, r6, r7 } + { prefetch_l3 r25 ; jr r15 ; mul_hs_hs r5, r6, r7 } + { prefetch_l3 r25 ; jrp r15 ; addi r5, r6, 5 } + { prefetch_l3 r25 ; jrp r15 ; rotl r5, r6, r7 } + { prefetch_l3 r25 ; lnk r15 ; fnop } + { prefetch_l3 r25 ; lnk r15 ; tblidxb1 r5, r6 } + { prefetch_l3 r25 ; mnz r15, r16, r17 ; nop } + { prefetch_l3 r25 ; mnz r5, r6, r7 ; cmpltu r15, r16, r17 } + { prefetch_l3 r25 ; move r15, r16 ; andi r5, r6, 5 } + { prefetch_l3 r25 ; move r15, r16 ; shl1addx r5, r6, r7 } + { prefetch_l3 r25 ; move r5, r6 ; mnz r15, r16, r17 } + { prefetch_l3 r25 ; movei r15, 5 ; cmpltu r5, r6, r7 } + { prefetch_l3 r25 ; movei r15, 5 ; sub r5, r6, r7 } + { prefetch_l3 r25 ; movei r5, 5 ; shl1add r15, r16, r17 } + { prefetch_l3 r25 ; mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 } + { prefetch_l3 r25 ; mul_hu_hu r5, r6, r7 ; jalrp r15 } + { prefetch_l3 r25 ; mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 } + { prefetch_l3 r25 ; mul_lu_lu r5, r6, r7 ; and r15, r16, r17 } + { prefetch_l3 r25 ; mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 } + { prefetch_l3 r25 ; mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 } + { prefetch_l3 r25 ; mula_hu_hu r5, r6, r7 ; rotli r15, r16, 5 } + { prefetch_l3 r25 ; mula_ls_ls r5, r6, r7 ; move r15, r16 } + { prefetch_l3 r25 ; mula_lu_lu r5, r6, r7 ; info 19 } + { prefetch_l3 r25 ; mulax r5, r6, r7 ; cmpleu r15, r16, r17 } + { prefetch_l3 r25 ; mulx r5, r6, r7 ; addx r15, r16, r17 } + { prefetch_l3 r25 ; mulx r5, r6, r7 ; shrui r15, r16, 5 } + { prefetch_l3 r25 ; mz r15, r16, r17 ; nop } + { prefetch_l3 r25 ; mz r5, r6, r7 ; cmpltu r15, r16, r17 } + { prefetch_l3 r25 ; nop ; addx r5, r6, r7 } + { prefetch_l3 r25 ; nop ; movei r15, 5 } + { prefetch_l3 r25 ; nop ; shli r15, r16, 5 } + { prefetch_l3 r25 ; nor r15, r16, r17 ; fsingle_pack1 r5, r6 } + { prefetch_l3 r25 ; nor r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch_l3 r25 ; nor r5, r6, r7 ; shl3add r15, r16, r17 } + { prefetch_l3 r25 ; or r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { prefetch_l3 r25 ; or r5, r6, r7 ; cmpeq r15, r16, r17 } + { prefetch_l3 r25 ; or r5, r6, r7 } + { prefetch_l3 r25 ; pcnt r5, r6 ; shrs r15, r16, r17 } + { prefetch_l3 r25 ; revbits r5, r6 ; shl1add r15, r16, r17 } + { prefetch_l3 r25 ; revbytes r5, r6 ; mz r15, r16, r17 } + { prefetch_l3 r25 ; rotl r15, r16, r17 ; fnop } + { prefetch_l3 r25 ; rotl r15, r16, r17 ; tblidxb1 r5, r6 } + { prefetch_l3 r25 ; rotl r5, r6, r7 ; shl2addx r15, r16, r17 } + { prefetch_l3 r25 ; rotli r15, r16, 5 ; mula_hs_hs r5, r6, r7 } + { prefetch_l3 r25 ; rotli r5, r6, 5 ; andi r15, r16, 5 } + { prefetch_l3 r25 ; rotli r5, r6, 5 ; xor r15, r16, r17 } + { prefetch_l3 r25 ; shl r15, r16, r17 ; pcnt r5, r6 } + { prefetch_l3 r25 ; shl r5, r6, r7 ; ill } + { prefetch_l3 r25 ; shl1add r15, r16, r17 ; cmovnez r5, r6, r7 } + { prefetch_l3 r25 ; shl1add r15, r16, r17 ; shl3add r5, r6, r7 } + { prefetch_l3 r25 ; shl1add r5, r6, r7 ; mz r15, r16, r17 } + { prefetch_l3 r25 ; shl1addx r15, r16, r17 ; fnop } + { prefetch_l3 r25 ; shl1addx r15, r16, r17 ; tblidxb1 r5, r6 } + { prefetch_l3 r25 ; shl1addx r5, r6, r7 ; shl2addx r15, r16, r17 } + { prefetch_l3 r25 ; shl2add r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { prefetch_l3 r25 ; shl2add r5, r6, r7 ; andi r15, r16, 5 } + { prefetch_l3 r25 ; shl2add r5, r6, r7 ; xor r15, r16, r17 } + { prefetch_l3 r25 ; shl2addx r15, r16, r17 ; pcnt r5, r6 } + { prefetch_l3 r25 ; shl2addx r5, r6, r7 ; ill } + { prefetch_l3 r25 ; shl3add r15, r16, r17 ; cmovnez r5, r6, r7 } + { prefetch_l3 r25 ; shl3add r15, r16, r17 ; shl3add r5, r6, r7 } + { prefetch_l3 r25 ; shl3add r5, r6, r7 ; mz r15, r16, r17 } + { prefetch_l3 r25 ; shl3addx r15, r16, r17 ; fnop } + { prefetch_l3 r25 ; shl3addx r15, r16, r17 ; tblidxb1 r5, r6 } + { prefetch_l3 r25 ; shl3addx r5, r6, r7 ; shl2addx r15, r16, r17 } + { prefetch_l3 r25 ; shli r15, r16, 5 ; mula_hs_hs r5, r6, r7 } + { prefetch_l3 r25 ; shli r5, r6, 5 ; andi r15, r16, 5 } + { prefetch_l3 r25 ; shli r5, r6, 5 ; xor r15, r16, r17 } + { prefetch_l3 r25 ; shrs r15, r16, r17 ; pcnt r5, r6 } + { prefetch_l3 r25 ; shrs r5, r6, r7 ; ill } + { prefetch_l3 r25 ; shrsi r15, r16, 5 ; cmovnez r5, r6, r7 } + { prefetch_l3 r25 ; shrsi r15, r16, 5 ; shl3add r5, r6, r7 } + { prefetch_l3 r25 ; shrsi r5, r6, 5 ; mz r15, r16, r17 } + { prefetch_l3 r25 ; shru r15, r16, r17 ; fnop } + { prefetch_l3 r25 ; shru r15, r16, r17 ; tblidxb1 r5, r6 } + { prefetch_l3 r25 ; shru r5, r6, r7 ; shl2addx r15, r16, r17 } + { prefetch_l3 r25 ; shrui r15, r16, 5 ; mula_hs_hs r5, r6, r7 } + { prefetch_l3 r25 ; shrui r5, r6, 5 ; andi r15, r16, 5 } + { prefetch_l3 r25 ; shrui r5, r6, 5 ; xor r15, r16, r17 } + { prefetch_l3 r25 ; sub r15, r16, r17 ; pcnt r5, r6 } + { prefetch_l3 r25 ; sub r5, r6, r7 ; ill } + { prefetch_l3 r25 ; subx r15, r16, r17 ; cmovnez r5, r6, r7 } + { prefetch_l3 r25 ; subx r15, r16, r17 ; shl3add r5, r6, r7 } + { prefetch_l3 r25 ; subx r5, r6, r7 ; mz r15, r16, r17 } + { prefetch_l3 r25 ; tblidxb0 r5, r6 ; jalrp r15 } + { prefetch_l3 r25 ; tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 } + { prefetch_l3 r25 ; tblidxb2 r5, r6 ; and r15, r16, r17 } + { prefetch_l3 r25 ; tblidxb2 r5, r6 ; subx r15, r16, r17 } + { prefetch_l3 r25 ; tblidxb3 r5, r6 ; shl3addx r15, r16, r17 } + { prefetch_l3 r25 ; xor r15, r16, r17 ; mula_ls_ls r5, r6, r7 } + { prefetch_l3 r25 ; xor r5, r6, r7 ; cmpeqi r15, r16, 5 } + { prefetch_l3_fault r15 ; add r5, r6, r7 } + { prefetch_l3_fault r15 ; fdouble_mul_flags r5, r6, r7 } + { prefetch_l3_fault r15 ; mula_lu_lu r5, r6, r7 } + { prefetch_l3_fault r15 ; v1adduc r5, r6, r7 } + { prefetch_l3_fault r15 ; v1shrui r5, r6, 5 } + { prefetch_l3_fault r15 ; v2shrs r5, r6, r7 } + { prefetch_l3_fault r25 ; add r15, r16, r17 ; mnz r5, r6, r7 } + { prefetch_l3_fault r25 ; add r15, r16, r17 ; xor r5, r6, r7 } + { prefetch_l3_fault r25 ; add r5, r6, r7 ; shli r15, r16, 5 } + { prefetch_l3_fault r25 ; addi r15, r16, 5 ; mula_lu_lu r5, r6, r7 } + { prefetch_l3_fault r25 ; addi r5, r6, 5 ; cmples r15, r16, r17 } + { prefetch_l3_fault r25 ; addx r15, r16, r17 ; addi r5, r6, 5 } + { prefetch_l3_fault r25 ; addx r15, r16, r17 ; rotl r5, r6, r7 } + { prefetch_l3_fault r25 ; addx r5, r6, r7 ; jalrp r15 } + { prefetch_l3_fault r25 ; addxi r15, r16, 5 ; cmples r5, r6, r7 } + { prefetch_l3_fault r25 ; addxi r15, r16, 5 ; shrs r5, r6, r7 } + { prefetch_l3_fault r25 ; addxi r5, r6, 5 ; or r15, r16, r17 } + { prefetch_l3_fault r25 ; and r15, r16, r17 ; mnz r5, r6, r7 } + { prefetch_l3_fault r25 ; and r15, r16, r17 ; xor r5, r6, r7 } + { prefetch_l3_fault r25 ; and r5, r6, r7 ; shli r15, r16, 5 } + { prefetch_l3_fault r25 ; andi r15, r16, 5 ; mula_lu_lu r5, r6, r7 } + { prefetch_l3_fault r25 ; andi r5, r6, 5 ; cmples r15, r16, r17 } + { prefetch_l3_fault r25 ; clz r5, r6 ; addi r15, r16, 5 } + { prefetch_l3_fault r25 ; clz r5, r6 ; shru r15, r16, r17 } + { prefetch_l3_fault r25 ; cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 } + { prefetch_l3_fault r25 ; cmovnez r5, r6, r7 ; nor r15, r16, r17 } + { prefetch_l3_fault r25 ; cmpeq r15, r16, r17 ; info 19 } + { prefetch_l3_fault r25 ; cmpeq r15, r16, r17 ; tblidxb3 r5, r6 } + { prefetch_l3_fault r25 ; cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 } + { prefetch_l3_fault r25 ; cmpeqi r15, r16, 5 ; mula_ls_ls r5, r6, r7 } + { prefetch_l3_fault r25 ; cmpeqi r5, r6, 5 ; cmpeqi r15, r16, 5 } + { prefetch_l3_fault r25 ; cmples r15, r16, r17 ; add r5, r6, r7 } + { prefetch_l3_fault r25 ; cmples r15, r16, r17 ; revbytes r5, r6 } + { prefetch_l3_fault r25 ; cmples r5, r6, r7 ; jalr r15 } + { prefetch_l3_fault r25 ; cmpleu r15, r16, r17 ; cmpeqi r5, r6, 5 } + { prefetch_l3_fault r25 ; cmpleu r15, r16, r17 ; shli r5, r6, 5 } + { prefetch_l3_fault r25 ; cmpleu r5, r6, r7 ; nor r15, r16, r17 } + { prefetch_l3_fault r25 ; cmplts r15, r16, r17 ; info 19 } + { prefetch_l3_fault r25 ; cmplts r15, r16, r17 ; tblidxb3 r5, r6 } + { prefetch_l3_fault r25 ; cmplts r5, r6, r7 ; shl3addx r15, r16, r17 } + { prefetch_l3_fault r25 ; cmpltsi r15, r16, 5 ; mula_ls_ls r5, r6, r7 } + { prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 ; cmpeqi r15, r16, 5 } + { prefetch_l3_fault r25 ; cmpltu r15, r16, r17 ; add r5, r6, r7 } + { prefetch_l3_fault r25 ; cmpltu r15, r16, r17 ; revbytes r5, r6 } + { prefetch_l3_fault r25 ; cmpltu r5, r6, r7 ; jalr r15 } + { prefetch_l3_fault r25 ; cmpne r15, r16, r17 ; cmpeqi r5, r6, 5 } + { prefetch_l3_fault r25 ; cmpne r15, r16, r17 ; shli r5, r6, 5 } + { prefetch_l3_fault r25 ; cmpne r5, r6, r7 ; nor r15, r16, r17 } + { prefetch_l3_fault r25 ; ctz r5, r6 ; jrp r15 } + { prefetch_l3_fault r25 ; fnop ; cmoveqz r5, r6, r7 } + { prefetch_l3_fault r25 ; fnop ; mula_ls_ls r5, r6, r7 } + { prefetch_l3_fault r25 ; fnop ; shrui r15, r16, 5 } + { prefetch_l3_fault r25 ; fsingle_pack1 r5, r6 ; nor r15, r16, r17 } + { prefetch_l3_fault r25 ; ill ; info 19 } + { prefetch_l3_fault r25 ; ill ; tblidxb3 r5, r6 } + { prefetch_l3_fault r25 ; info 19 ; jalrp r15 } + { prefetch_l3_fault r25 ; info 19 ; shl2add r15, r16, r17 } + { prefetch_l3_fault r25 ; jalr r15 ; cmples r5, r6, r7 } + { prefetch_l3_fault r25 ; jalr r15 ; shrs r5, r6, r7 } + { prefetch_l3_fault r25 ; jalrp r15 ; mula_hs_hs r5, r6, r7 } + { prefetch_l3_fault r25 ; jr r15 ; andi r5, r6, 5 } + { prefetch_l3_fault r25 ; jr r15 ; shl1addx r5, r6, r7 } + { prefetch_l3_fault r25 ; jrp r15 ; move r5, r6 } + { prefetch_l3_fault r25 ; jrp r15 } + { prefetch_l3_fault r25 ; lnk r15 ; revbits r5, r6 } + { prefetch_l3_fault r25 ; mnz r15, r16, r17 ; cmpne r5, r6, r7 } + { prefetch_l3_fault r25 ; mnz r15, r16, r17 ; subx r5, r6, r7 } + { prefetch_l3_fault r25 ; mnz r5, r6, r7 ; shl1addx r15, r16, r17 } + { prefetch_l3_fault r25 ; move r15, r16 ; mul_ls_ls r5, r6, r7 } + { prefetch_l3_fault r25 ; move r5, r6 ; addxi r15, r16, 5 } + { prefetch_l3_fault r25 ; move r5, r6 ; sub r15, r16, r17 } + { prefetch_l3_fault r25 ; movei r15, 5 ; nor r5, r6, r7 } + { prefetch_l3_fault r25 ; movei r5, 5 ; cmpne r15, r16, r17 } + { prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 } + { prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 } + { prefetch_l3_fault r25 ; mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 } + { prefetch_l3_fault r25 ; mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 } + { prefetch_l3_fault r25 ; mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 } + { prefetch_l3_fault r25 ; mula_hs_hs r5, r6, r7 ; jalrp r15 } + { prefetch_l3_fault r25 ; mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 } + { prefetch_l3_fault r25 ; mula_ls_ls r5, r6, r7 ; and r15, r16, r17 } + { prefetch_l3_fault r25 ; mula_ls_ls r5, r6, r7 ; subx r15, r16, r17 } + { prefetch_l3_fault r25 ; mula_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 } + { prefetch_l3_fault r25 ; mulax r5, r6, r7 ; rotli r15, r16, 5 } + { prefetch_l3_fault r25 ; mulx r5, r6, r7 ; move r15, r16 } + { prefetch_l3_fault r25 ; mz r15, r16, r17 ; cmpne r5, r6, r7 } + { prefetch_l3_fault r25 ; mz r15, r16, r17 ; subx r5, r6, r7 } + { prefetch_l3_fault r25 ; mz r5, r6, r7 ; shl1addx r15, r16, r17 } + { prefetch_l3_fault r25 ; nop ; cmpltsi r5, r6, 5 } + { prefetch_l3_fault r25 ; nop ; revbytes r5, r6 } + { prefetch_l3_fault r25 ; nor r15, r16, r17 ; add r5, r6, r7 } + { prefetch_l3_fault r25 ; nor r15, r16, r17 ; revbytes r5, r6 } + { prefetch_l3_fault r25 ; nor r5, r6, r7 ; jalr r15 } + { prefetch_l3_fault r25 ; or r15, r16, r17 ; cmpeqi r5, r6, 5 } + { prefetch_l3_fault r25 ; or r15, r16, r17 ; shli r5, r6, 5 } + { prefetch_l3_fault r25 ; or r5, r6, r7 ; nor r15, r16, r17 } + { prefetch_l3_fault r25 ; pcnt r5, r6 ; jrp r15 } + { prefetch_l3_fault r25 ; revbits r5, r6 ; cmpne r15, r16, r17 } + { prefetch_l3_fault r25 ; revbytes r5, r6 ; cmpeq r15, r16, r17 } + { prefetch_l3_fault r25 ; revbytes r5, r6 } + { prefetch_l3_fault r25 ; rotl r15, r16, r17 ; revbits r5, r6 } + { prefetch_l3_fault r25 ; rotl r5, r6, r7 ; info 19 } + { prefetch_l3_fault r25 ; rotli r15, r16, 5 ; cmpeq r5, r6, r7 } + { prefetch_l3_fault r25 ; rotli r15, r16, 5 ; shl3addx r5, r6, r7 } + { prefetch_l3_fault r25 ; rotli r5, r6, 5 ; nop } + { prefetch_l3_fault r25 ; shl r15, r16, r17 ; fsingle_pack1 r5, r6 } + { prefetch_l3_fault r25 ; shl r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch_l3_fault r25 ; shl r5, r6, r7 ; shl3add r15, r16, r17 } + { prefetch_l3_fault r25 ; shl1add r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { prefetch_l3_fault r25 ; shl1add r5, r6, r7 ; cmpeq r15, r16, r17 } + { prefetch_l3_fault r25 ; shl1add r5, r6, r7 } + { prefetch_l3_fault r25 ; shl1addx r15, r16, r17 ; revbits r5, r6 } + { prefetch_l3_fault r25 ; shl1addx r5, r6, r7 ; info 19 } + { prefetch_l3_fault r25 ; shl2add r15, r16, r17 ; cmpeq r5, r6, r7 } + { prefetch_l3_fault r25 ; shl2add r15, r16, r17 ; shl3addx r5, r6, r7 } + { prefetch_l3_fault r25 ; shl2add r5, r6, r7 ; nop } + { prefetch_l3_fault r25 ; shl2addx r15, r16, r17 ; fsingle_pack1 r5, r6 } + { prefetch_l3_fault r25 ; shl2addx r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch_l3_fault r25 ; shl2addx r5, r6, r7 ; shl3add r15, r16, r17 } + { prefetch_l3_fault r25 ; shl3add r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { prefetch_l3_fault r25 ; shl3add r5, r6, r7 ; cmpeq r15, r16, r17 } + { prefetch_l3_fault r25 ; shl3add r5, r6, r7 } + { prefetch_l3_fault r25 ; shl3addx r15, r16, r17 ; revbits r5, r6 } + { prefetch_l3_fault r25 ; shl3addx r5, r6, r7 ; info 19 } + { prefetch_l3_fault r25 ; shli r15, r16, 5 ; cmpeq r5, r6, r7 } + { prefetch_l3_fault r25 ; shli r15, r16, 5 ; shl3addx r5, r6, r7 } + { prefetch_l3_fault r25 ; shli r5, r6, 5 ; nop } + { prefetch_l3_fault r25 ; shrs r15, r16, r17 ; fsingle_pack1 r5, r6 } + { prefetch_l3_fault r25 ; shrs r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch_l3_fault r25 ; shrs r5, r6, r7 ; shl3add r15, r16, r17 } + { prefetch_l3_fault r25 ; shrsi r15, r16, 5 ; mula_hu_hu r5, r6, r7 } + { prefetch_l3_fault r25 ; shrsi r5, r6, 5 ; cmpeq r15, r16, r17 } + { prefetch_l3_fault r25 ; shrsi r5, r6, 5 } + { prefetch_l3_fault r25 ; shru r15, r16, r17 ; revbits r5, r6 } + { prefetch_l3_fault r25 ; shru r5, r6, r7 ; info 19 } + { prefetch_l3_fault r25 ; shrui r15, r16, 5 ; cmpeq r5, r6, r7 } + { prefetch_l3_fault r25 ; shrui r15, r16, 5 ; shl3addx r5, r6, r7 } + { prefetch_l3_fault r25 ; shrui r5, r6, 5 ; nop } + { prefetch_l3_fault r25 ; sub r15, r16, r17 ; fsingle_pack1 r5, r6 } + { prefetch_l3_fault r25 ; sub r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch_l3_fault r25 ; sub r5, r6, r7 ; shl3add r15, r16, r17 } + { prefetch_l3_fault r25 ; subx r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { prefetch_l3_fault r25 ; subx r5, r6, r7 ; cmpeq r15, r16, r17 } + { prefetch_l3_fault r25 ; subx r5, r6, r7 } + { prefetch_l3_fault r25 ; tblidxb0 r5, r6 ; shrs r15, r16, r17 } + { prefetch_l3_fault r25 ; tblidxb1 r5, r6 ; shl1add r15, r16, r17 } + { prefetch_l3_fault r25 ; tblidxb2 r5, r6 ; mz r15, r16, r17 } + { prefetch_l3_fault r25 ; tblidxb3 r5, r6 ; jalrp r15 } + { prefetch_l3_fault r25 ; xor r15, r16, r17 ; cmples r5, r6, r7 } + { prefetch_l3_fault r25 ; xor r15, r16, r17 ; shrs r5, r6, r7 } + { prefetch_l3_fault r25 ; xor r5, r6, r7 ; or r15, r16, r17 } + { raise ; cmpltu r5, r6, r7 } + { raise ; mul_hs_hs r5, r6, r7 } + { raise ; shli r5, r6, 5 } + { raise ; v1dotpusa r5, r6, r7 } + { raise ; v2maxs r5, r6, r7 } + { revbits r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 } + { revbits r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 } + { revbits r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 } + { revbits r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } + { revbits r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 } + { revbits r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 } + { revbits r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 } + { revbits r5, r6 ; fetchand r15, r16, r17 } + { revbits r5, r6 ; ill ; prefetch_l3_fault r25 } + { revbits r5, r6 ; jalr r15 ; prefetch_l3 r25 } + { revbits r5, r6 ; jr r15 ; st r25, r26 } + { revbits r5, r6 ; ld r25, r26 ; ill } + { revbits r5, r6 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 } + { revbits r5, r6 ; ld1s_add r15, r16, 5 } + { revbits r5, r6 ; ld1u r25, r26 ; shli r15, r16, 5 } + { revbits r5, r6 ; ld2s r25, r26 ; rotl r15, r16, r17 } + { revbits r5, r6 ; ld2u r25, r26 ; jrp r15 } + { revbits r5, r6 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 } + { revbits r5, r6 ; ld4u r25, r26 ; addx r15, r16, r17 } + { revbits r5, r6 ; ld4u r25, r26 ; shrui r15, r16, 5 } + { revbits r5, r6 ; lnk r15 ; st4 r25, r26 } + { revbits r5, r6 ; move r15, r16 ; st4 r25, r26 } + { revbits r5, r6 ; mz r15, r16, r17 ; st4 r25, r26 } + { revbits r5, r6 ; or r15, r16, r17 ; ld r25, r26 } + { revbits r5, r6 ; prefetch r25 ; jr r15 } + { revbits r5, r6 ; prefetch_l1 r25 ; andi r15, r16, 5 } + { revbits r5, r6 ; prefetch_l1 r25 ; xor r15, r16, r17 } + { revbits r5, r6 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 } + { revbits r5, r6 ; prefetch_l2 r25 ; rotl r15, r16, r17 } + { revbits r5, r6 ; prefetch_l2_fault r25 ; lnk r15 } + { revbits r5, r6 ; prefetch_l3 r25 ; cmpne r15, r16, r17 } + { revbits r5, r6 ; prefetch_l3_fault r25 ; andi r15, r16, 5 } + { revbits r5, r6 ; prefetch_l3_fault r25 ; xor r15, r16, r17 } + { revbits r5, r6 ; rotli r15, r16, 5 } + { revbits r5, r6 ; shl1addx r15, r16, r17 ; ld r25, r26 } + { revbits r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 } + { revbits r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 } + { revbits r5, r6 ; shrs r15, r16, r17 ; ld2u r25, r26 } + { revbits r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 } + { revbits r5, r6 ; st r25, r26 ; andi r15, r16, 5 } + { revbits r5, r6 ; st r25, r26 ; xor r15, r16, r17 } + { revbits r5, r6 ; st1 r25, r26 ; shl3addx r15, r16, r17 } + { revbits r5, r6 ; st2 r25, r26 ; or r15, r16, r17 } + { revbits r5, r6 ; st4 r25, r26 ; jr r15 } + { revbits r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 } + { revbits r5, r6 ; v1cmpeq r15, r16, r17 } + { revbits r5, r6 ; v2maxsi r15, r16, 5 } + { revbits r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 } + { revbytes r5, r6 ; addi r15, r16, 5 ; prefetch_l3 r25 } + { revbytes r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + { revbytes r5, r6 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + { revbytes r5, r6 ; cmpeqi r15, r16, 5 ; st1 r25, r26 } + { revbytes r5, r6 ; cmpleu r15, r16, r17 ; st1 r25, r26 } + { revbytes r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + { revbytes r5, r6 ; cmpne r15, r16, r17 } + { revbytes r5, r6 ; ill ; ld1u r25, r26 } + { revbytes r5, r6 ; jalr r15 ; ld1s r25, r26 } + { revbytes r5, r6 ; jr r15 ; ld2s r25, r26 } + { revbytes r5, r6 ; ld r25, r26 ; and r15, r16, r17 } + { revbytes r5, r6 ; ld r25, r26 ; subx r15, r16, r17 } + { revbytes r5, r6 ; ld1s r25, r26 ; shl3add r15, r16, r17 } + { revbytes r5, r6 ; ld1u r25, r26 ; nor r15, r16, r17 } + { revbytes r5, r6 ; ld2s r25, r26 ; jalrp r15 } + { revbytes r5, r6 ; ld2u r25, r26 ; cmpleu r15, r16, r17 } + { revbytes r5, r6 ; ld4s r25, r26 ; add r15, r16, r17 } + { revbytes r5, r6 ; ld4s r25, r26 ; shrsi r15, r16, 5 } + { revbytes r5, r6 ; ld4u r25, r26 ; shl r15, r16, r17 } + { revbytes r5, r6 ; lnk r15 ; ld4u r25, r26 } + { revbytes r5, r6 ; move r15, r16 ; ld4u r25, r26 } + { revbytes r5, r6 ; mz r15, r16, r17 ; ld4u r25, r26 } + { revbytes r5, r6 ; nor r15, r16, r17 ; prefetch_l1 r25 } + { revbytes r5, r6 ; prefetch r25 ; cmples r15, r16, r17 } + { revbytes r5, r6 ; prefetch_add_l1_fault r15, 5 } + { revbytes r5, r6 ; prefetch_l1 r25 ; shl2add r15, r16, r17 } + { revbytes r5, r6 ; prefetch_l1_fault r25 ; nop } + { revbytes r5, r6 ; prefetch_l2 r25 ; jalrp r15 } + { revbytes r5, r6 ; prefetch_l2_fault r25 ; cmplts r15, r16, r17 } + { revbytes r5, r6 ; prefetch_l3 r25 ; addx r15, r16, r17 } + { revbytes r5, r6 ; prefetch_l3 r25 ; shrui r15, r16, 5 } + { revbytes r5, r6 ; prefetch_l3_fault r25 ; shl2add r15, r16, r17 } + { revbytes r5, r6 ; rotli r15, r16, 5 ; prefetch r25 } + { revbytes r5, r6 ; shl1add r15, r16, r17 ; prefetch_l1 r25 } + { revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + { revbytes r5, r6 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + { revbytes r5, r6 ; shli r15, r16, 5 ; st r25, r26 } + { revbytes r5, r6 ; shrsi r15, r16, 5 ; st r25, r26 } + { revbytes r5, r6 ; shrui r15, r16, 5 ; st2 r25, r26 } + { revbytes r5, r6 ; st r25, r26 ; shl2add r15, r16, r17 } + { revbytes r5, r6 ; st1 r25, r26 ; nop } + { revbytes r5, r6 ; st2 r25, r26 ; jalr r15 } + { revbytes r5, r6 ; st4 r25, r26 ; cmples r15, r16, r17 } + { revbytes r5, r6 ; st_add r15, r16, 5 } + { revbytes r5, r6 ; subx r15, r16, r17 ; prefetch_l3 r25 } + { revbytes r5, r6 ; v2cmpeqi r15, r16, 5 } + { revbytes r5, r6 ; xor r15, r16, r17 ; ld r25, r26 } + { rotl r15, r16, r17 ; addi r5, r6, 5 ; ld1s r25, r26 } + { rotl r15, r16, r17 ; addxi r5, r6, 5 ; ld1u r25, r26 } + { rotl r15, r16, r17 ; andi r5, r6, 5 ; ld1u r25, r26 } + { rotl r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld1s r25, r26 } + { rotl r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 } + { rotl r15, r16, r17 ; cmples r5, r6, r7 ; ld4s r25, r26 } + { rotl r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch r25 } + { rotl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + { rotl r15, r16, r17 ; ctz r5, r6 ; ld1s r25, r26 } + { rotl r15, r16, r17 ; fnop ; prefetch_l2 r25 } + { rotl r15, r16, r17 ; info 19 ; ld4u r25, r26 } + { rotl r15, r16, r17 ; ld r25, r26 ; mul_ls_ls r5, r6, r7 } + { rotl r15, r16, r17 ; ld1s r25, r26 ; addxi r5, r6, 5 } + { rotl r15, r16, r17 ; ld1s r25, r26 ; shl r5, r6, r7 } + { rotl r15, r16, r17 ; ld1u r25, r26 ; info 19 } + { rotl r15, r16, r17 ; ld1u r25, r26 ; tblidxb3 r5, r6 } + { rotl r15, r16, r17 ; ld2s r25, r26 ; or r5, r6, r7 } + { rotl r15, r16, r17 ; ld2u r25, r26 ; cmpltsi r5, r6, 5 } + { rotl r15, r16, r17 ; ld2u r25, r26 ; shrui r5, r6, 5 } + { rotl r15, r16, r17 ; ld4s r25, r26 ; mula_lu_lu r5, r6, r7 } + { rotl r15, r16, r17 ; ld4u r25, r26 ; cmovnez r5, r6, r7 } + { rotl r15, r16, r17 ; ld4u r25, r26 ; shl3add r5, r6, r7 } + { rotl r15, r16, r17 ; move r5, r6 ; ld4s r25, r26 } + { rotl r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; ld4u r25, r26 } + { rotl r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; ld2s r25, r26 } + { rotl r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; ld2u r25, r26 } + { rotl r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld1s r25, r26 } + { rotl r15, r16, r17 ; mulax r5, r6, r7 ; ld1u r25, r26 } + { rotl r15, r16, r17 ; mz r5, r6, r7 ; ld2u r25, r26 } + { rotl r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 } + { rotl r15, r16, r17 ; pcnt r5, r6 ; prefetch r25 } + { rotl r15, r16, r17 ; prefetch r25 ; mula_hs_hs r5, r6, r7 } + { rotl r15, r16, r17 ; prefetch_l1 r25 ; andi r5, r6, 5 } + { rotl r15, r16, r17 ; prefetch_l1 r25 ; shl1addx r5, r6, r7 } + { rotl r15, r16, r17 ; prefetch_l1_fault r25 ; move r5, r6 } + { rotl r15, r16, r17 ; prefetch_l1_fault r25 } + { rotl r15, r16, r17 ; prefetch_l2 r25 ; revbits r5, r6 } + { rotl r15, r16, r17 ; prefetch_l2_fault r25 ; cmpne r5, r6, r7 } + { rotl r15, r16, r17 ; prefetch_l2_fault r25 ; subx r5, r6, r7 } + { rotl r15, r16, r17 ; prefetch_l3 r25 ; mulx r5, r6, r7 } + { rotl r15, r16, r17 ; prefetch_l3_fault r25 ; cmpeqi r5, r6, 5 } + { rotl r15, r16, r17 ; prefetch_l3_fault r25 ; shli r5, r6, 5 } + { rotl r15, r16, r17 ; revbytes r5, r6 ; prefetch_l1 r25 } + { rotl r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l2 r25 } + { rotl r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 } + { rotl r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 } + { rotl r15, r16, r17 ; shl3add r5, r6, r7 ; st1 r25, r26 } + { rotl r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 } + { rotl r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 } + { rotl r15, r16, r17 ; shrux r5, r6, r7 } + { rotl r15, r16, r17 ; st r25, r26 ; or r5, r6, r7 } + { rotl r15, r16, r17 ; st1 r25, r26 ; cmpltsi r5, r6, 5 } + { rotl r15, r16, r17 ; st1 r25, r26 ; shrui r5, r6, 5 } + { rotl r15, r16, r17 ; st2 r25, r26 ; mula_lu_lu r5, r6, r7 } + { rotl r15, r16, r17 ; st4 r25, r26 ; cmovnez r5, r6, r7 } + { rotl r15, r16, r17 ; st4 r25, r26 ; shl3add r5, r6, r7 } + { rotl r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 } + { rotl r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch r25 } + { rotl r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l1_fault r25 } + { rotl r15, r16, r17 ; v1mnz r5, r6, r7 } + { rotl r15, r16, r17 ; v2mults r5, r6, r7 } + { rotl r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2_fault r25 } + { rotl r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3 r25 } + { rotl r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + { rotl r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + { rotl r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 } + { rotl r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 } + { rotl r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + { rotl r5, r6, r7 ; cmpne r15, r16, r17 } + { rotl r5, r6, r7 ; ill ; ld1u r25, r26 } + { rotl r5, r6, r7 ; jalr r15 ; ld1s r25, r26 } + { rotl r5, r6, r7 ; jr r15 ; ld2s r25, r26 } + { rotl r5, r6, r7 ; ld r25, r26 ; and r15, r16, r17 } + { rotl r5, r6, r7 ; ld r25, r26 ; subx r15, r16, r17 } + { rotl r5, r6, r7 ; ld1s r25, r26 ; shl3add r15, r16, r17 } + { rotl r5, r6, r7 ; ld1u r25, r26 ; nor r15, r16, r17 } + { rotl r5, r6, r7 ; ld2s r25, r26 ; jalrp r15 } + { rotl r5, r6, r7 ; ld2u r25, r26 ; cmpleu r15, r16, r17 } + { rotl r5, r6, r7 ; ld4s r25, r26 ; add r15, r16, r17 } + { rotl r5, r6, r7 ; ld4s r25, r26 ; shrsi r15, r16, 5 } + { rotl r5, r6, r7 ; ld4u r25, r26 ; shl r15, r16, r17 } + { rotl r5, r6, r7 ; lnk r15 ; ld4u r25, r26 } + { rotl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 } + { rotl r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 } + { rotl r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l1 r25 } + { rotl r5, r6, r7 ; prefetch r25 ; cmples r15, r16, r17 } + { rotl r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + { rotl r5, r6, r7 ; prefetch_l1 r25 ; shl2add r15, r16, r17 } + { rotl r5, r6, r7 ; prefetch_l1_fault r25 ; nop } + { rotl r5, r6, r7 ; prefetch_l2 r25 ; jalrp r15 } + { rotl r5, r6, r7 ; prefetch_l2_fault r25 ; cmplts r15, r16, r17 } + { rotl r5, r6, r7 ; prefetch_l3 r25 ; addx r15, r16, r17 } + { rotl r5, r6, r7 ; prefetch_l3 r25 ; shrui r15, r16, 5 } + { rotl r5, r6, r7 ; prefetch_l3_fault r25 ; shl2add r15, r16, r17 } + { rotl r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 } + { rotl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1 r25 } + { rotl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + { rotl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + { rotl r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + { rotl r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 } + { rotl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 } + { rotl r5, r6, r7 ; st r25, r26 ; shl2add r15, r16, r17 } + { rotl r5, r6, r7 ; st1 r25, r26 ; nop } + { rotl r5, r6, r7 ; st2 r25, r26 ; jalr r15 } + { rotl r5, r6, r7 ; st4 r25, r26 ; cmples r15, r16, r17 } + { rotl r5, r6, r7 ; st_add r15, r16, 5 } + { rotl r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 } + { rotl r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + { rotl r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 } + { rotli r15, r16, 5 ; addi r5, r6, 5 ; ld1s r25, r26 } + { rotli r15, r16, 5 ; addxi r5, r6, 5 ; ld1u r25, r26 } + { rotli r15, r16, 5 ; andi r5, r6, 5 ; ld1u r25, r26 } + { rotli r15, r16, 5 ; cmoveqz r5, r6, r7 ; ld1s r25, r26 } + { rotli r15, r16, 5 ; cmpeq r5, r6, r7 ; ld2s r25, r26 } + { rotli r15, r16, 5 ; cmples r5, r6, r7 ; ld4s r25, r26 } + { rotli r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch r25 } + { rotli r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + { rotli r15, r16, 5 ; ctz r5, r6 ; ld1s r25, r26 } + { rotli r15, r16, 5 ; fnop ; prefetch_l2 r25 } + { rotli r15, r16, 5 ; info 19 ; ld4u r25, r26 } + { rotli r15, r16, 5 ; ld r25, r26 ; mul_ls_ls r5, r6, r7 } + { rotli r15, r16, 5 ; ld1s r25, r26 ; addxi r5, r6, 5 } + { rotli r15, r16, 5 ; ld1s r25, r26 ; shl r5, r6, r7 } + { rotli r15, r16, 5 ; ld1u r25, r26 ; info 19 } + { rotli r15, r16, 5 ; ld1u r25, r26 ; tblidxb3 r5, r6 } + { rotli r15, r16, 5 ; ld2s r25, r26 ; or r5, r6, r7 } + { rotli r15, r16, 5 ; ld2u r25, r26 ; cmpltsi r5, r6, 5 } + { rotli r15, r16, 5 ; ld2u r25, r26 ; shrui r5, r6, 5 } + { rotli r15, r16, 5 ; ld4s r25, r26 ; mula_lu_lu r5, r6, r7 } + { rotli r15, r16, 5 ; ld4u r25, r26 ; cmovnez r5, r6, r7 } + { rotli r15, r16, 5 ; ld4u r25, r26 ; shl3add r5, r6, r7 } + { rotli r15, r16, 5 ; move r5, r6 ; ld4s r25, r26 } + { rotli r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; ld4u r25, r26 } + { rotli r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; ld2s r25, r26 } + { rotli r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; ld2u r25, r26 } + { rotli r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; ld1s r25, r26 } + { rotli r15, r16, 5 ; mulax r5, r6, r7 ; ld1u r25, r26 } + { rotli r15, r16, 5 ; mz r5, r6, r7 ; ld2u r25, r26 } + { rotli r15, r16, 5 ; nor r5, r6, r7 ; ld4u r25, r26 } + { rotli r15, r16, 5 ; pcnt r5, r6 ; prefetch r25 } + { rotli r15, r16, 5 ; prefetch r25 ; mula_hs_hs r5, r6, r7 } + { rotli r15, r16, 5 ; prefetch_l1 r25 ; andi r5, r6, 5 } + { rotli r15, r16, 5 ; prefetch_l1 r25 ; shl1addx r5, r6, r7 } + { rotli r15, r16, 5 ; prefetch_l1_fault r25 ; move r5, r6 } + { rotli r15, r16, 5 ; prefetch_l1_fault r25 } + { rotli r15, r16, 5 ; prefetch_l2 r25 ; revbits r5, r6 } + { rotli r15, r16, 5 ; prefetch_l2_fault r25 ; cmpne r5, r6, r7 } + { rotli r15, r16, 5 ; prefetch_l2_fault r25 ; subx r5, r6, r7 } + { rotli r15, r16, 5 ; prefetch_l3 r25 ; mulx r5, r6, r7 } + { rotli r15, r16, 5 ; prefetch_l3_fault r25 ; cmpeqi r5, r6, 5 } + { rotli r15, r16, 5 ; prefetch_l3_fault r25 ; shli r5, r6, 5 } + { rotli r15, r16, 5 ; revbytes r5, r6 ; prefetch_l1 r25 } + { rotli r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l2 r25 } + { rotli r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 } + { rotli r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 } + { rotli r15, r16, 5 ; shl3add r5, r6, r7 ; st1 r25, r26 } + { rotli r15, r16, 5 ; shli r5, r6, 5 ; st4 r25, r26 } + { rotli r15, r16, 5 ; shrsi r5, r6, 5 ; st4 r25, r26 } + { rotli r15, r16, 5 ; shrux r5, r6, r7 } + { rotli r15, r16, 5 ; st r25, r26 ; or r5, r6, r7 } + { rotli r15, r16, 5 ; st1 r25, r26 ; cmpltsi r5, r6, 5 } + { rotli r15, r16, 5 ; st1 r25, r26 ; shrui r5, r6, 5 } + { rotli r15, r16, 5 ; st2 r25, r26 ; mula_lu_lu r5, r6, r7 } + { rotli r15, r16, 5 ; st4 r25, r26 ; cmovnez r5, r6, r7 } + { rotli r15, r16, 5 ; st4 r25, r26 ; shl3add r5, r6, r7 } + { rotli r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 } + { rotli r15, r16, 5 ; tblidxb1 r5, r6 ; prefetch r25 } + { rotli r15, r16, 5 ; tblidxb3 r5, r6 ; prefetch_l1_fault r25 } + { rotli r15, r16, 5 ; v1mnz r5, r6, r7 } + { rotli r15, r16, 5 ; v2mults r5, r6, r7 } + { rotli r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l2_fault r25 } + { rotli r5, r6, 5 ; addi r15, r16, 5 ; prefetch_l3 r25 } + { rotli r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + { rotli r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + { rotli r5, r6, 5 ; cmpeqi r15, r16, 5 ; st1 r25, r26 } + { rotli r5, r6, 5 ; cmpleu r15, r16, r17 ; st1 r25, r26 } + { rotli r5, r6, 5 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + { rotli r5, r6, 5 ; cmpne r15, r16, r17 } + { rotli r5, r6, 5 ; ill ; ld1u r25, r26 } + { rotli r5, r6, 5 ; jalr r15 ; ld1s r25, r26 } + { rotli r5, r6, 5 ; jr r15 ; ld2s r25, r26 } + { rotli r5, r6, 5 ; ld r25, r26 ; and r15, r16, r17 } + { rotli r5, r6, 5 ; ld r25, r26 ; subx r15, r16, r17 } + { rotli r5, r6, 5 ; ld1s r25, r26 ; shl3add r15, r16, r17 } + { rotli r5, r6, 5 ; ld1u r25, r26 ; nor r15, r16, r17 } + { rotli r5, r6, 5 ; ld2s r25, r26 ; jalrp r15 } + { rotli r5, r6, 5 ; ld2u r25, r26 ; cmpleu r15, r16, r17 } + { rotli r5, r6, 5 ; ld4s r25, r26 ; add r15, r16, r17 } + { rotli r5, r6, 5 ; ld4s r25, r26 ; shrsi r15, r16, 5 } + { rotli r5, r6, 5 ; ld4u r25, r26 ; shl r15, r16, r17 } + { rotli r5, r6, 5 ; lnk r15 ; ld4u r25, r26 } + { rotli r5, r6, 5 ; move r15, r16 ; ld4u r25, r26 } + { rotli r5, r6, 5 ; mz r15, r16, r17 ; ld4u r25, r26 } + { rotli r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l1 r25 } + { rotli r5, r6, 5 ; prefetch r25 ; cmples r15, r16, r17 } + { rotli r5, r6, 5 ; prefetch_add_l1_fault r15, 5 } + { rotli r5, r6, 5 ; prefetch_l1 r25 ; shl2add r15, r16, r17 } + { rotli r5, r6, 5 ; prefetch_l1_fault r25 ; nop } + { rotli r5, r6, 5 ; prefetch_l2 r25 ; jalrp r15 } + { rotli r5, r6, 5 ; prefetch_l2_fault r25 ; cmplts r15, r16, r17 } + { rotli r5, r6, 5 ; prefetch_l3 r25 ; addx r15, r16, r17 } + { rotli r5, r6, 5 ; prefetch_l3 r25 ; shrui r15, r16, 5 } + { rotli r5, r6, 5 ; prefetch_l3_fault r25 ; shl2add r15, r16, r17 } + { rotli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch r25 } + { rotli r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l1 r25 } + { rotli r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + { rotli r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + { rotli r5, r6, 5 ; shli r15, r16, 5 ; st r25, r26 } + { rotli r5, r6, 5 ; shrsi r15, r16, 5 ; st r25, r26 } + { rotli r5, r6, 5 ; shrui r15, r16, 5 ; st2 r25, r26 } + { rotli r5, r6, 5 ; st r25, r26 ; shl2add r15, r16, r17 } + { rotli r5, r6, 5 ; st1 r25, r26 ; nop } + { rotli r5, r6, 5 ; st2 r25, r26 ; jalr r15 } + { rotli r5, r6, 5 ; st4 r25, r26 ; cmples r15, r16, r17 } + { rotli r5, r6, 5 ; st_add r15, r16, 5 } + { rotli r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l3 r25 } + { rotli r5, r6, 5 ; v2cmpeqi r15, r16, 5 } + { rotli r5, r6, 5 ; xor r15, r16, r17 ; ld r25, r26 } + { shl r15, r16, r17 ; addi r5, r6, 5 ; ld1s r25, r26 } + { shl r15, r16, r17 ; addxi r5, r6, 5 ; ld1u r25, r26 } + { shl r15, r16, r17 ; andi r5, r6, 5 ; ld1u r25, r26 } + { shl r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld1s r25, r26 } + { shl r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 } + { shl r15, r16, r17 ; cmples r5, r6, r7 ; ld4s r25, r26 } + { shl r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch r25 } + { shl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 } + { shl r15, r16, r17 ; ctz r5, r6 ; ld1s r25, r26 } + { shl r15, r16, r17 ; fnop ; prefetch_l2 r25 } + { shl r15, r16, r17 ; info 19 ; ld4u r25, r26 } + { shl r15, r16, r17 ; ld r25, r26 ; mul_ls_ls r5, r6, r7 } + { shl r15, r16, r17 ; ld1s r25, r26 ; addxi r5, r6, 5 } + { shl r15, r16, r17 ; ld1s r25, r26 ; shl r5, r6, r7 } + { shl r15, r16, r17 ; ld1u r25, r26 ; info 19 } + { shl r15, r16, r17 ; ld1u r25, r26 ; tblidxb3 r5, r6 } + { shl r15, r16, r17 ; ld2s r25, r26 ; or r5, r6, r7 } + { shl r15, r16, r17 ; ld2u r25, r26 ; cmpltsi r5, r6, 5 } + { shl r15, r16, r17 ; ld2u r25, r26 ; shrui r5, r6, 5 } + { shl r15, r16, r17 ; ld4s r25, r26 ; mula_lu_lu r5, r6, r7 } + { shl r15, r16, r17 ; ld4u r25, r26 ; cmovnez r5, r6, r7 } + { shl r15, r16, r17 ; ld4u r25, r26 ; shl3add r5, r6, r7 } + { shl r15, r16, r17 ; move r5, r6 ; ld4s r25, r26 } + { shl r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; ld4u r25, r26 } + { shl r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; ld2s r25, r26 } + { shl r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; ld2u r25, r26 } + { shl r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld1s r25, r26 } + { shl r15, r16, r17 ; mulax r5, r6, r7 ; ld1u r25, r26 } + { shl r15, r16, r17 ; mz r5, r6, r7 ; ld2u r25, r26 } + { shl r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 } + { shl r15, r16, r17 ; pcnt r5, r6 ; prefetch r25 } + { shl r15, r16, r17 ; prefetch r25 ; mula_hs_hs r5, r6, r7 } + { shl r15, r16, r17 ; prefetch_l1 r25 ; andi r5, r6, 5 } + { shl r15, r16, r17 ; prefetch_l1 r25 ; shl1addx r5, r6, r7 } + { shl r15, r16, r17 ; prefetch_l1_fault r25 ; move r5, r6 } + { shl r15, r16, r17 ; prefetch_l1_fault r25 } + { shl r15, r16, r17 ; prefetch_l2 r25 ; revbits r5, r6 } + { shl r15, r16, r17 ; prefetch_l2_fault r25 ; cmpne r5, r6, r7 } + { shl r15, r16, r17 ; prefetch_l2_fault r25 ; subx r5, r6, r7 } + { shl r15, r16, r17 ; prefetch_l3 r25 ; mulx r5, r6, r7 } + { shl r15, r16, r17 ; prefetch_l3_fault r25 ; cmpeqi r5, r6, 5 } + { shl r15, r16, r17 ; prefetch_l3_fault r25 ; shli r5, r6, 5 } + { shl r15, r16, r17 ; revbytes r5, r6 ; prefetch_l1 r25 } + { shl r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l2 r25 } + { shl r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 } + { shl r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 } + { shl r15, r16, r17 ; shl3add r5, r6, r7 ; st1 r25, r26 } + { shl r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 } + { shl r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 } + { shl r15, r16, r17 ; shrux r5, r6, r7 } + { shl r15, r16, r17 ; st r25, r26 ; or r5, r6, r7 } + { shl r15, r16, r17 ; st1 r25, r26 ; cmpltsi r5, r6, 5 } + { shl r15, r16, r17 ; st1 r25, r26 ; shrui r5, r6, 5 } + { shl r15, r16, r17 ; st2 r25, r26 ; mula_lu_lu r5, r6, r7 } + { shl r15, r16, r17 ; st4 r25, r26 ; cmovnez r5, r6, r7 } + { shl r15, r16, r17 ; st4 r25, r26 ; shl3add r5, r6, r7 } + { shl r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 } + { shl r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch r25 } + { shl r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l1_fault r25 } + { shl r15, r16, r17 ; v1mnz r5, r6, r7 } + { shl r15, r16, r17 ; v2mults r5, r6, r7 } + { shl r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2_fault r25 } + { shl r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3 r25 } + { shl r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } + { shl r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } + { shl r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 } + { shl r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 } + { shl r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 } + { shl r5, r6, r7 ; cmpne r15, r16, r17 } + { shl r5, r6, r7 ; ill ; ld1u r25, r26 } + { shl r5, r6, r7 ; jalr r15 ; ld1s r25, r26 } + { shl r5, r6, r7 ; jr r15 ; ld2s r25, r26 } + { shl r5, r6, r7 ; ld r25, r26 ; and r15, r16, r17 } + { shl r5, r6, r7 ; ld r25, r26 ; subx r15, r16, r17 } + { shl r5, r6, r7 ; ld1s r25, r26 ; shl3add r15, r16, r17 } + { shl r5, r6, r7 ; ld1u r25, r26 ; nor r15, r16, r17 } + { shl r5, r6, r7 ; ld2s r25, r26 ; jalrp r15 } + { shl r5, r6, r7 ; ld2u r25, r26 ; cmpleu r15, r16, r17 } + { shl r5, r6, r7 ; ld4s r25, r26 ; add r15, r16, r17 } + { shl r5, r6, r7 ; ld4s r25, r26 ; shrsi r15, r16, 5 } + { shl r5, r6, r7 ; ld4u r25, r26 ; shl r15, r16, r17 } + { shl r5, r6, r7 ; lnk r15 ; ld4u r25, r26 } + { shl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 } + { shl r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 } + { shl r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l1 r25 } + { shl r5, r6, r7 ; prefetch r25 ; cmples r15, r16, r17 } + { shl r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + { shl r5, r6, r7 ; prefetch_l1 r25 ; shl2add r15, r16, r17 } + { shl r5, r6, r7 ; prefetch_l1_fault r25 ; nop } + { shl r5, r6, r7 ; prefetch_l2 r25 ; jalrp r15 } + { shl r5, r6, r7 ; prefetch_l2_fault r25 ; cmplts r15, r16, r17 } + { shl r5, r6, r7 ; prefetch_l3 r25 ; addx r15, r16, r17 } + { shl r5, r6, r7 ; prefetch_l3 r25 ; shrui r15, r16, 5 } + { shl r5, r6, r7 ; prefetch_l3_fault r25 ; shl2add r15, r16, r17 } + { shl r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 } + { shl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1 r25 } + { shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 } + { shl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 } + { shl r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 } + { shl r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 } + { shl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 } + { shl r5, r6, r7 ; st r25, r26 ; shl2add r15, r16, r17 } + { shl r5, r6, r7 ; st1 r25, r26 ; nop } + { shl r5, r6, r7 ; st2 r25, r26 ; jalr r15 } + { shl r5, r6, r7 ; st4 r25, r26 ; cmples r15, r16, r17 } + { shl r5, r6, r7 ; st_add r15, r16, 5 } + { shl r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 } + { shl r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + { shl r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 } + { shl16insli r15, r16, 0x1234 ; cmpltsi r5, r6, 5 } + { shl16insli r15, r16, 0x1234 ; moveli r5, 0x1234 } + { shl16insli r15, r16, 0x1234 ; shl3addx r5, r6, r7 } + { shl16insli r15, r16, 0x1234 ; v1dotpus r5, r6, r7 } + { shl16insli r15, r16, 0x1234 ; v2int_l r5, r6, r7 } + { shl16insli r5, r6, 0x1234 ; addi r15, r16, 5 } + { shl16insli r5, r6, 0x1234 ; infol 0x1234 } + { shl16insli r5, r6, 0x1234 ; mnz r15, r16, r17 } + { shl16insli r5, r6, 0x1234 ; shrui r15, r16, 5 } + { shl16insli r5, r6, 0x1234 ; v1mnz r15, r16, r17 } + { shl16insli r5, r6, 0x1234 ; v2sub r15, r16, r17 } + { shl1add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + { shl1add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + { shl1add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + { shl1add r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 } + { shl1add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + { shl1add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + { shl1add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + { shl1add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + { shl1add r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 } + { shl1add r15, r16, r17 ; fnop ; st r25, r26 } + { shl1add r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + { shl1add r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 } + { shl1add r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 } + { shl1add r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 } + { shl1add r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 } + { shl1add r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 } + { shl1add r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 } + { shl1add r15, r16, r17 ; ld2u r25, r26 ; fnop } + { shl1add r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 } + { shl1add r15, r16, r17 ; ld4s r25, r26 ; nop } + { shl1add r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 } + { shl1add r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 } + { shl1add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + { shl1add r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + { shl1add r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 } + { shl1add r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 } + { shl1add r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 } + { shl1add r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 } + { shl1add r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 } + { shl1add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + { shl1add r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 } + { shl1add r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 } + { shl1add r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 } + { shl1add r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 } + { shl1add r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 } + { shl1add r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 } + { shl1add r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 } + { shl1add r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 } + { shl1add r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 } + { shl1add r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 } + { shl1add r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 } + { shl1add r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 } + { shl1add r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 } + { shl1add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + { shl1add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + { shl1add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + { shl1add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + { shl1add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + { shl1add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + { shl1add r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 } + { shl1add r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 } + { shl1add r15, r16, r17 ; st1 r25, r26 ; fnop } + { shl1add r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 } + { shl1add r15, r16, r17 ; st2 r25, r26 ; nop } + { shl1add r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 } + { shl1add r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 } + { shl1add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + { shl1add r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 } + { shl1add r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 } + { shl1add r15, r16, r17 ; v1mz r5, r6, r7 } + { shl1add r15, r16, r17 ; v2packuc r5, r6, r7 } + { shl1add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + { shl1add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + { shl1add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + { shl1add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + { shl1add r5, r6, r7 ; cmpexch r15, r16, r17 } + { shl1add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + { shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + { shl1add r5, r6, r7 ; dtlbpr r15 } + { shl1add r5, r6, r7 ; ill ; ld4u r25, r26 } + { shl1add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + { shl1add r5, r6, r7 ; jr r15 ; prefetch r25 } + { shl1add r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 } + { shl1add r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 } + { shl1add r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 } + { shl1add r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 } + { shl1add r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 } + { shl1add r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 } + { shl1add r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 } + { shl1add r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 } + { shl1add r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 } + { shl1add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + { shl1add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + { shl1add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + { shl1add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + { shl1add r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 } + { shl1add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + { shl1add r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 } + { shl1add r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 } + { shl1add r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 } + { shl1add r5, r6, r7 ; prefetch_l2_fault r25 ; fnop } + { shl1add r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 } + { shl1add r5, r6, r7 ; prefetch_l3 r25 } + { shl1add r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 } + { shl1add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + { shl1add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + { shl1add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + { shl1add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + { shl1add r5, r6, r7 ; shli r15, r16, 5 } + { shl1add r5, r6, r7 ; shrsi r15, r16, 5 } + { shl1add r5, r6, r7 ; shruxi r15, r16, 5 } + { shl1add r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 } + { shl1add r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 } + { shl1add r5, r6, r7 ; st2 r25, r26 ; lnk r15 } + { shl1add r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 } + { shl1add r5, r6, r7 ; stnt2 r15, r16 } + { shl1add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + { shl1add r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + { shl1add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + { shl1addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + { shl1addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + { shl1addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + { shl1addx r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 } + { shl1addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + { shl1addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + { shl1addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + { shl1addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + { shl1addx r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 } + { shl1addx r15, r16, r17 ; fnop ; st r25, r26 } + { shl1addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + { shl1addx r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 } + { shl1addx r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 } + { shl1addx r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 } + { shl1addx r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 } + { shl1addx r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 } + { shl1addx r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 } + { shl1addx r15, r16, r17 ; ld2u r25, r26 ; fnop } + { shl1addx r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 } + { shl1addx r15, r16, r17 ; ld4s r25, r26 ; nop } + { shl1addx r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 } + { shl1addx r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 } + { shl1addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + { shl1addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + { shl1addx r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 } + { shl1addx r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 } + { shl1addx r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 } + { shl1addx r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 } + { shl1addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 } + { shl1addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + { shl1addx r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 } + { shl1addx r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 } + { shl1addx r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 } + { shl1addx r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 } + { shl1addx r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 } + { shl1addx r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 } + { shl1addx r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 } + { shl1addx r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 } + { shl1addx r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 } + { shl1addx r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 } + { shl1addx r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 } + { shl1addx r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 } + { shl1addx r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 } + { shl1addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + { shl1addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + { shl1addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + { shl1addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + { shl1addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + { shl1addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + { shl1addx r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 } + { shl1addx r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 } + { shl1addx r15, r16, r17 ; st1 r25, r26 ; fnop } + { shl1addx r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 } + { shl1addx r15, r16, r17 ; st2 r25, r26 ; nop } + { shl1addx r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 } + { shl1addx r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 } + { shl1addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + { shl1addx r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 } + { shl1addx r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 } + { shl1addx r15, r16, r17 ; v1mz r5, r6, r7 } + { shl1addx r15, r16, r17 ; v2packuc r5, r6, r7 } + { shl1addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + { shl1addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + { shl1addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + { shl1addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + { shl1addx r5, r6, r7 ; cmpexch r15, r16, r17 } + { shl1addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + { shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + { shl1addx r5, r6, r7 ; dtlbpr r15 } + { shl1addx r5, r6, r7 ; ill ; ld4u r25, r26 } + { shl1addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + { shl1addx r5, r6, r7 ; jr r15 ; prefetch r25 } + { shl1addx r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 } + { shl1addx r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 } + { shl1addx r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 } + { shl1addx r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 } + { shl1addx r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 } + { shl1addx r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 } + { shl1addx r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 } + { shl1addx r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 } + { shl1addx r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 } + { shl1addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + { shl1addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + { shl1addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + { shl1addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + { shl1addx r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 } + { shl1addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + { shl1addx r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 } + { shl1addx r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 } + { shl1addx r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 } + { shl1addx r5, r6, r7 ; prefetch_l2_fault r25 ; fnop } + { shl1addx r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 } + { shl1addx r5, r6, r7 ; prefetch_l3 r25 } + { shl1addx r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 } + { shl1addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + { shl1addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + { shl1addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + { shl1addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + { shl1addx r5, r6, r7 ; shli r15, r16, 5 } + { shl1addx r5, r6, r7 ; shrsi r15, r16, 5 } + { shl1addx r5, r6, r7 ; shruxi r15, r16, 5 } + { shl1addx r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 } + { shl1addx r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 } + { shl1addx r5, r6, r7 ; st2 r25, r26 ; lnk r15 } + { shl1addx r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 } + { shl1addx r5, r6, r7 ; stnt2 r15, r16 } + { shl1addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + { shl1addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + { shl1addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + { shl2add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + { shl2add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + { shl2add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + { shl2add r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 } + { shl2add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + { shl2add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + { shl2add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + { shl2add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + { shl2add r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 } + { shl2add r15, r16, r17 ; fnop ; st r25, r26 } + { shl2add r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + { shl2add r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 } + { shl2add r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 } + { shl2add r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 } + { shl2add r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 } + { shl2add r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 } + { shl2add r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 } + { shl2add r15, r16, r17 ; ld2u r25, r26 ; fnop } + { shl2add r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 } + { shl2add r15, r16, r17 ; ld4s r25, r26 ; nop } + { shl2add r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 } + { shl2add r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 } + { shl2add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + { shl2add r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + { shl2add r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 } + { shl2add r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 } + { shl2add r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 } + { shl2add r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 } + { shl2add r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 } + { shl2add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + { shl2add r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 } + { shl2add r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 } + { shl2add r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 } + { shl2add r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 } + { shl2add r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 } + { shl2add r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 } + { shl2add r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 } + { shl2add r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 } + { shl2add r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 } + { shl2add r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 } + { shl2add r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 } + { shl2add r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 } + { shl2add r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 } + { shl2add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + { shl2add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + { shl2add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + { shl2add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + { shl2add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + { shl2add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + { shl2add r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 } + { shl2add r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 } + { shl2add r15, r16, r17 ; st1 r25, r26 ; fnop } + { shl2add r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 } + { shl2add r15, r16, r17 ; st2 r25, r26 ; nop } + { shl2add r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 } + { shl2add r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 } + { shl2add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + { shl2add r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 } + { shl2add r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 } + { shl2add r15, r16, r17 ; v1mz r5, r6, r7 } + { shl2add r15, r16, r17 ; v2packuc r5, r6, r7 } + { shl2add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + { shl2add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + { shl2add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + { shl2add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + { shl2add r5, r6, r7 ; cmpexch r15, r16, r17 } + { shl2add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + { shl2add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + { shl2add r5, r6, r7 ; dtlbpr r15 } + { shl2add r5, r6, r7 ; ill ; ld4u r25, r26 } + { shl2add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + { shl2add r5, r6, r7 ; jr r15 ; prefetch r25 } + { shl2add r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 } + { shl2add r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 } + { shl2add r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 } + { shl2add r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 } + { shl2add r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 } + { shl2add r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 } + { shl2add r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 } + { shl2add r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 } + { shl2add r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 } + { shl2add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + { shl2add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + { shl2add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + { shl2add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + { shl2add r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 } + { shl2add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + { shl2add r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 } + { shl2add r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 } + { shl2add r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 } + { shl2add r5, r6, r7 ; prefetch_l2_fault r25 ; fnop } + { shl2add r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 } + { shl2add r5, r6, r7 ; prefetch_l3 r25 } + { shl2add r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 } + { shl2add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + { shl2add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + { shl2add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + { shl2add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + { shl2add r5, r6, r7 ; shli r15, r16, 5 } + { shl2add r5, r6, r7 ; shrsi r15, r16, 5 } + { shl2add r5, r6, r7 ; shruxi r15, r16, 5 } + { shl2add r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 } + { shl2add r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 } + { shl2add r5, r6, r7 ; st2 r25, r26 ; lnk r15 } + { shl2add r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 } + { shl2add r5, r6, r7 ; stnt2 r15, r16 } + { shl2add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + { shl2add r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + { shl2add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + { shl2addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + { shl2addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + { shl2addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + { shl2addx r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 } + { shl2addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + { shl2addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + { shl2addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + { shl2addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + { shl2addx r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 } + { shl2addx r15, r16, r17 ; fnop ; st r25, r26 } + { shl2addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + { shl2addx r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 } + { shl2addx r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 } + { shl2addx r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 } + { shl2addx r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 } + { shl2addx r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 } + { shl2addx r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 } + { shl2addx r15, r16, r17 ; ld2u r25, r26 ; fnop } + { shl2addx r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 } + { shl2addx r15, r16, r17 ; ld4s r25, r26 ; nop } + { shl2addx r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 } + { shl2addx r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 } + { shl2addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + { shl2addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + { shl2addx r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 } + { shl2addx r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 } + { shl2addx r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 } + { shl2addx r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 } + { shl2addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 } + { shl2addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + { shl2addx r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 } + { shl2addx r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 } + { shl2addx r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 } + { shl2addx r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 } + { shl2addx r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 } + { shl2addx r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 } + { shl2addx r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 } + { shl2addx r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 } + { shl2addx r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 } + { shl2addx r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 } + { shl2addx r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 } + { shl2addx r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 } + { shl2addx r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 } + { shl2addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + { shl2addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + { shl2addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + { shl2addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + { shl2addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + { shl2addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + { shl2addx r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 } + { shl2addx r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 } + { shl2addx r15, r16, r17 ; st1 r25, r26 ; fnop } + { shl2addx r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 } + { shl2addx r15, r16, r17 ; st2 r25, r26 ; nop } + { shl2addx r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 } + { shl2addx r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 } + { shl2addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + { shl2addx r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 } + { shl2addx r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 } + { shl2addx r15, r16, r17 ; v1mz r5, r6, r7 } + { shl2addx r15, r16, r17 ; v2packuc r5, r6, r7 } + { shl2addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + { shl2addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + { shl2addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + { shl2addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + { shl2addx r5, r6, r7 ; cmpexch r15, r16, r17 } + { shl2addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + { shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + { shl2addx r5, r6, r7 ; dtlbpr r15 } + { shl2addx r5, r6, r7 ; ill ; ld4u r25, r26 } + { shl2addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + { shl2addx r5, r6, r7 ; jr r15 ; prefetch r25 } + { shl2addx r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 } + { shl2addx r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 } + { shl2addx r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 } + { shl2addx r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 } + { shl2addx r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 } + { shl2addx r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 } + { shl2addx r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 } + { shl2addx r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 } + { shl2addx r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 } + { shl2addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + { shl2addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + { shl2addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + { shl2addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + { shl2addx r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 } + { shl2addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + { shl2addx r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 } + { shl2addx r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 } + { shl2addx r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 } + { shl2addx r5, r6, r7 ; prefetch_l2_fault r25 ; fnop } + { shl2addx r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 } + { shl2addx r5, r6, r7 ; prefetch_l3 r25 } + { shl2addx r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 } + { shl2addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + { shl2addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + { shl2addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + { shl2addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + { shl2addx r5, r6, r7 ; shli r15, r16, 5 } + { shl2addx r5, r6, r7 ; shrsi r15, r16, 5 } + { shl2addx r5, r6, r7 ; shruxi r15, r16, 5 } + { shl2addx r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 } + { shl2addx r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 } + { shl2addx r5, r6, r7 ; st2 r25, r26 ; lnk r15 } + { shl2addx r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 } + { shl2addx r5, r6, r7 ; stnt2 r15, r16 } + { shl2addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + { shl2addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + { shl2addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + { shl3add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + { shl3add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + { shl3add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + { shl3add r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 } + { shl3add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + { shl3add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + { shl3add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + { shl3add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + { shl3add r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 } + { shl3add r15, r16, r17 ; fnop ; st r25, r26 } + { shl3add r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + { shl3add r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 } + { shl3add r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 } + { shl3add r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 } + { shl3add r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 } + { shl3add r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 } + { shl3add r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 } + { shl3add r15, r16, r17 ; ld2u r25, r26 ; fnop } + { shl3add r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 } + { shl3add r15, r16, r17 ; ld4s r25, r26 ; nop } + { shl3add r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 } + { shl3add r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 } + { shl3add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + { shl3add r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + { shl3add r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 } + { shl3add r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 } + { shl3add r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 } + { shl3add r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 } + { shl3add r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 } + { shl3add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + { shl3add r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 } + { shl3add r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 } + { shl3add r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 } + { shl3add r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 } + { shl3add r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 } + { shl3add r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 } + { shl3add r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 } + { shl3add r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 } + { shl3add r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 } + { shl3add r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 } + { shl3add r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 } + { shl3add r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 } + { shl3add r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 } + { shl3add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + { shl3add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + { shl3add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + { shl3add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + { shl3add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + { shl3add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + { shl3add r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 } + { shl3add r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 } + { shl3add r15, r16, r17 ; st1 r25, r26 ; fnop } + { shl3add r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 } + { shl3add r15, r16, r17 ; st2 r25, r26 ; nop } + { shl3add r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 } + { shl3add r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 } + { shl3add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + { shl3add r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 } + { shl3add r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 } + { shl3add r15, r16, r17 ; v1mz r5, r6, r7 } + { shl3add r15, r16, r17 ; v2packuc r5, r6, r7 } + { shl3add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + { shl3add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + { shl3add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + { shl3add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + { shl3add r5, r6, r7 ; cmpexch r15, r16, r17 } + { shl3add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + { shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + { shl3add r5, r6, r7 ; dtlbpr r15 } + { shl3add r5, r6, r7 ; ill ; ld4u r25, r26 } + { shl3add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + { shl3add r5, r6, r7 ; jr r15 ; prefetch r25 } + { shl3add r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 } + { shl3add r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 } + { shl3add r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 } + { shl3add r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 } + { shl3add r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 } + { shl3add r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 } + { shl3add r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 } + { shl3add r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 } + { shl3add r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 } + { shl3add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + { shl3add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + { shl3add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + { shl3add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + { shl3add r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 } + { shl3add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + { shl3add r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 } + { shl3add r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 } + { shl3add r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 } + { shl3add r5, r6, r7 ; prefetch_l2_fault r25 ; fnop } + { shl3add r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 } + { shl3add r5, r6, r7 ; prefetch_l3 r25 } + { shl3add r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 } + { shl3add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + { shl3add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + { shl3add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + { shl3add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + { shl3add r5, r6, r7 ; shli r15, r16, 5 } + { shl3add r5, r6, r7 ; shrsi r15, r16, 5 } + { shl3add r5, r6, r7 ; shruxi r15, r16, 5 } + { shl3add r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 } + { shl3add r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 } + { shl3add r5, r6, r7 ; st2 r25, r26 ; lnk r15 } + { shl3add r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 } + { shl3add r5, r6, r7 ; stnt2 r15, r16 } + { shl3add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + { shl3add r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + { shl3add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + { shl3addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + { shl3addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + { shl3addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + { shl3addx r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 } + { shl3addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + { shl3addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + { shl3addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + { shl3addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + { shl3addx r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 } + { shl3addx r15, r16, r17 ; fnop ; st r25, r26 } + { shl3addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + { shl3addx r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 } + { shl3addx r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 } + { shl3addx r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 } + { shl3addx r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 } + { shl3addx r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 } + { shl3addx r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 } + { shl3addx r15, r16, r17 ; ld2u r25, r26 ; fnop } + { shl3addx r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 } + { shl3addx r15, r16, r17 ; ld4s r25, r26 ; nop } + { shl3addx r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 } + { shl3addx r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 } + { shl3addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + { shl3addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + { shl3addx r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 } + { shl3addx r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 } + { shl3addx r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 } + { shl3addx r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 } + { shl3addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 } + { shl3addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + { shl3addx r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 } + { shl3addx r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 } + { shl3addx r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 } + { shl3addx r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 } + { shl3addx r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 } + { shl3addx r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 } + { shl3addx r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 } + { shl3addx r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 } + { shl3addx r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 } + { shl3addx r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 } + { shl3addx r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 } + { shl3addx r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 } + { shl3addx r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 } + { shl3addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + { shl3addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + { shl3addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + { shl3addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + { shl3addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + { shl3addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + { shl3addx r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 } + { shl3addx r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 } + { shl3addx r15, r16, r17 ; st1 r25, r26 ; fnop } + { shl3addx r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 } + { shl3addx r15, r16, r17 ; st2 r25, r26 ; nop } + { shl3addx r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 } + { shl3addx r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 } + { shl3addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + { shl3addx r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 } + { shl3addx r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 } + { shl3addx r15, r16, r17 ; v1mz r5, r6, r7 } + { shl3addx r15, r16, r17 ; v2packuc r5, r6, r7 } + { shl3addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + { shl3addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + { shl3addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + { shl3addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + { shl3addx r5, r6, r7 ; cmpexch r15, r16, r17 } + { shl3addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + { shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + { shl3addx r5, r6, r7 ; dtlbpr r15 } + { shl3addx r5, r6, r7 ; ill ; ld4u r25, r26 } + { shl3addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + { shl3addx r5, r6, r7 ; jr r15 ; prefetch r25 } + { shl3addx r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 } + { shl3addx r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 } + { shl3addx r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 } + { shl3addx r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 } + { shl3addx r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 } + { shl3addx r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 } + { shl3addx r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 } + { shl3addx r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 } + { shl3addx r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 } + { shl3addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + { shl3addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + { shl3addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + { shl3addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + { shl3addx r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 } + { shl3addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + { shl3addx r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 } + { shl3addx r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 } + { shl3addx r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 } + { shl3addx r5, r6, r7 ; prefetch_l2_fault r25 ; fnop } + { shl3addx r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 } + { shl3addx r5, r6, r7 ; prefetch_l3 r25 } + { shl3addx r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 } + { shl3addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + { shl3addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + { shl3addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + { shl3addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + { shl3addx r5, r6, r7 ; shli r15, r16, 5 } + { shl3addx r5, r6, r7 ; shrsi r15, r16, 5 } + { shl3addx r5, r6, r7 ; shruxi r15, r16, 5 } + { shl3addx r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 } + { shl3addx r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 } + { shl3addx r5, r6, r7 ; st2 r25, r26 ; lnk r15 } + { shl3addx r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 } + { shl3addx r5, r6, r7 ; stnt2 r15, r16 } + { shl3addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + { shl3addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + { shl3addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + { shli r15, r16, 5 ; addi r5, r6, 5 ; ld4s r25, r26 } + { shli r15, r16, 5 ; addxi r5, r6, 5 ; ld4u r25, r26 } + { shli r15, r16, 5 ; andi r5, r6, 5 ; ld4u r25, r26 } + { shli r15, r16, 5 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 } + { shli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch r25 } + { shli r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + { shli r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + { shli r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + { shli r15, r16, 5 ; ctz r5, r6 ; ld4s r25, r26 } + { shli r15, r16, 5 ; fnop ; st r25, r26 } + { shli r15, r16, 5 ; info 19 ; prefetch_l2 r25 } + { shli r15, r16, 5 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 } + { shli r15, r16, 5 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 } + { shli r15, r16, 5 ; ld1s r25, r26 ; shl2addx r5, r6, r7 } + { shli r15, r16, 5 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 } + { shli r15, r16, 5 ; ld2s r25, r26 ; addi r5, r6, 5 } + { shli r15, r16, 5 ; ld2s r25, r26 ; rotl r5, r6, r7 } + { shli r15, r16, 5 ; ld2u r25, r26 ; fnop } + { shli r15, r16, 5 ; ld2u r25, r26 ; tblidxb1 r5, r6 } + { shli r15, r16, 5 ; ld4s r25, r26 ; nop } + { shli r15, r16, 5 ; ld4u r25, r26 ; cmpleu r5, r6, r7 } + { shli r15, r16, 5 ; ld4u r25, r26 ; shrsi r5, r6, 5 } + { shli r15, r16, 5 ; move r5, r6 ; prefetch_l1_fault r25 } + { shli r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + { shli r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; prefetch r25 } + { shli r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 } + { shli r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 } + { shli r15, r16, 5 ; mulax r5, r6, r7 ; ld4u r25, r26 } + { shli r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l1 r25 } + { shli r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l2 r25 } + { shli r15, r16, 5 ; pcnt r5, r6 ; prefetch_l2_fault r25 } + { shli r15, r16, 5 ; prefetch r25 ; mulax r5, r6, r7 } + { shli r15, r16, 5 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 } + { shli r15, r16, 5 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 } + { shli r15, r16, 5 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 } + { shli r15, r16, 5 ; prefetch_l2 r25 ; addxi r5, r6, 5 } + { shli r15, r16, 5 ; prefetch_l2 r25 ; shl r5, r6, r7 } + { shli r15, r16, 5 ; prefetch_l2_fault r25 ; info 19 } + { shli r15, r16, 5 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 } + { shli r15, r16, 5 ; prefetch_l3 r25 ; or r5, r6, r7 } + { shli r15, r16, 5 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 } + { shli r15, r16, 5 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 } + { shli r15, r16, 5 ; revbytes r5, r6 ; prefetch_l3 r25 } + { shli r15, r16, 5 ; rotli r5, r6, 5 ; st r25, r26 } + { shli r15, r16, 5 ; shl1add r5, r6, r7 ; st1 r25, r26 } + { shli r15, r16, 5 ; shl2add r5, r6, r7 ; st4 r25, r26 } + { shli r15, r16, 5 ; shl3addx r5, r6, r7 ; ld r25, r26 } + { shli r15, r16, 5 ; shrs r5, r6, r7 ; ld r25, r26 } + { shli r15, r16, 5 ; shru r5, r6, r7 ; ld1u r25, r26 } + { shli r15, r16, 5 ; st r25, r26 ; addi r5, r6, 5 } + { shli r15, r16, 5 ; st r25, r26 ; rotl r5, r6, r7 } + { shli r15, r16, 5 ; st1 r25, r26 ; fnop } + { shli r15, r16, 5 ; st1 r25, r26 ; tblidxb1 r5, r6 } + { shli r15, r16, 5 ; st2 r25, r26 ; nop } + { shli r15, r16, 5 ; st4 r25, r26 ; cmpleu r5, r6, r7 } + { shli r15, r16, 5 ; st4 r25, r26 ; shrsi r5, r6, 5 } + { shli r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l2 r25 } + { shli r15, r16, 5 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 } + { shli r15, r16, 5 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 } + { shli r15, r16, 5 ; v1mz r5, r6, r7 } + { shli r15, r16, 5 ; v2packuc r5, r6, r7 } + { shli r15, r16, 5 ; xor r5, r6, r7 ; st1 r25, r26 } + { shli r5, r6, 5 ; addi r15, r16, 5 ; st2 r25, r26 } + { shli r5, r6, 5 ; addxi r15, r16, 5 ; st4 r25, r26 } + { shli r5, r6, 5 ; andi r15, r16, 5 ; st4 r25, r26 } + { shli r5, r6, 5 ; cmpexch r15, r16, r17 } + { shli r5, r6, 5 ; cmplts r15, r16, r17 ; ld r25, r26 } + { shli r5, r6, 5 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + { shli r5, r6, 5 ; dtlbpr r15 } + { shli r5, r6, 5 ; ill ; ld4u r25, r26 } + { shli r5, r6, 5 ; jalr r15 ; ld4s r25, r26 } + { shli r5, r6, 5 ; jr r15 ; prefetch r25 } + { shli r5, r6, 5 ; ld r25, r26 ; cmples r15, r16, r17 } + { shli r5, r6, 5 ; ld1s r25, r26 ; add r15, r16, r17 } + { shli r5, r6, 5 ; ld1s r25, r26 ; shrsi r15, r16, 5 } + { shli r5, r6, 5 ; ld1u r25, r26 ; shl r15, r16, r17 } + { shli r5, r6, 5 ; ld2s r25, r26 ; mnz r15, r16, r17 } + { shli r5, r6, 5 ; ld2u r25, r26 ; cmpne r15, r16, r17 } + { shli r5, r6, 5 ; ld4s r25, r26 ; and r15, r16, r17 } + { shli r5, r6, 5 ; ld4s r25, r26 ; subx r15, r16, r17 } + { shli r5, r6, 5 ; ld4u r25, r26 ; shl2addx r15, r16, r17 } + { shli r5, r6, 5 ; lnk r15 ; prefetch_l2 r25 } + { shli r5, r6, 5 ; move r15, r16 ; prefetch_l2 r25 } + { shli r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l2 r25 } + { shli r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l3 r25 } + { shli r5, r6, 5 ; prefetch r25 ; cmpltu r15, r16, r17 } + { shli r5, r6, 5 ; prefetch_add_l3_fault r15, 5 } + { shli r5, r6, 5 ; prefetch_l1 r25 ; shli r15, r16, 5 } + { shli r5, r6, 5 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 } + { shli r5, r6, 5 ; prefetch_l2 r25 ; mnz r15, r16, r17 } + { shli r5, r6, 5 ; prefetch_l2_fault r25 ; fnop } + { shli r5, r6, 5 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 } + { shli r5, r6, 5 ; prefetch_l3 r25 } + { shli r5, r6, 5 ; prefetch_l3_fault r25 ; shli r15, r16, 5 } + { shli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + { shli r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + { shli r5, r6, 5 ; shl2add r15, r16, r17 ; st r25, r26 } + { shli r5, r6, 5 ; shl3add r15, r16, r17 ; st2 r25, r26 } + { shli r5, r6, 5 ; shli r15, r16, 5 } + { shli r5, r6, 5 ; shrsi r15, r16, 5 } + { shli r5, r6, 5 ; shruxi r15, r16, 5 } + { shli r5, r6, 5 ; st r25, r26 ; shli r15, r16, 5 } + { shli r5, r6, 5 ; st1 r25, r26 ; rotli r15, r16, 5 } + { shli r5, r6, 5 ; st2 r25, r26 ; lnk r15 } + { shli r5, r6, 5 ; st4 r25, r26 ; cmpltu r15, r16, r17 } + { shli r5, r6, 5 ; stnt2 r15, r16 } + { shli r5, r6, 5 ; subx r15, r16, r17 ; st2 r25, r26 } + { shli r5, r6, 5 ; v2cmpltsi r15, r16, 5 } + { shli r5, r6, 5 ; xor r15, r16, r17 ; ld2u r25, r26 } + { shlx r15, r16, r17 ; cmul r5, r6, r7 } + { shlx r15, r16, r17 ; mul_hs_lu r5, r6, r7 } + { shlx r15, r16, r17 ; shrs r5, r6, r7 } + { shlx r15, r16, r17 ; v1maxu r5, r6, r7 } + { shlx r15, r16, r17 ; v2minsi r5, r6, 5 } + { shlx r5, r6, r7 ; addxli r15, r16, 0x1234 } + { shlx r5, r6, r7 ; jalrp r15 } + { shlx r5, r6, r7 ; mtspr 0x5, r16 } + { shlx r5, r6, r7 ; st1 r15, r16 } + { shlx r5, r6, r7 ; v1shrs r15, r16, r17 } + { shlx r5, r6, r7 ; v4int_h r15, r16, r17 } + { shlxi r15, r16, 5 ; cmulfr r5, r6, r7 } + { shlxi r15, r16, 5 ; mul_ls_ls r5, r6, r7 } + { shlxi r15, r16, 5 ; shrux r5, r6, r7 } + { shlxi r15, r16, 5 ; v1mnz r5, r6, r7 } + { shlxi r15, r16, 5 ; v2mults r5, r6, r7 } + { shlxi r5, r6, 5 ; cmpeq r15, r16, r17 } + { shlxi r5, r6, 5 ; ld1s r15, r16 } + { shlxi r5, r6, 5 ; or r15, r16, r17 } + { shlxi r5, r6, 5 ; st4 r15, r16 } + { shlxi r5, r6, 5 ; v1sub r15, r16, r17 } + { shlxi r5, r6, 5 ; v4shlsc r15, r16, r17 } + { shrs r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 } + { shrs r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 } + { shrs r15, r16, r17 ; andi r5, r6, 5 ; st r25, r26 } + { shrs r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 } + { shrs r15, r16, r17 ; cmpeq r5, r6, r7 ; st1 r25, r26 } + { shrs r15, r16, r17 ; cmples r5, r6, r7 ; st4 r25, r26 } + { shrs r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld r25, r26 } + { shrs r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + { shrs r15, r16, r17 ; ctz r5, r6 ; prefetch_l3_fault r25 } + { shrs r15, r16, r17 ; fsingle_mul2 r5, r6, r7 } + { shrs r15, r16, r17 ; info 19 } + { shrs r15, r16, r17 ; ld r25, r26 ; pcnt r5, r6 } + { shrs r15, r16, r17 ; ld1s r25, r26 ; cmpltu r5, r6, r7 } + { shrs r15, r16, r17 ; ld1s r25, r26 ; sub r5, r6, r7 } + { shrs r15, r16, r17 ; ld1u r25, r26 ; mulax r5, r6, r7 } + { shrs r15, r16, r17 ; ld2s r25, r26 ; cmpeq r5, r6, r7 } + { shrs r15, r16, r17 ; ld2s r25, r26 ; shl3addx r5, r6, r7 } + { shrs r15, r16, r17 ; ld2u r25, r26 ; mul_ls_ls r5, r6, r7 } + { shrs r15, r16, r17 ; ld4s r25, r26 ; addxi r5, r6, 5 } + { shrs r15, r16, r17 ; ld4s r25, r26 ; shl r5, r6, r7 } + { shrs r15, r16, r17 ; ld4u r25, r26 ; info 19 } + { shrs r15, r16, r17 ; ld4u r25, r26 ; tblidxb3 r5, r6 } + { shrs r15, r16, r17 ; move r5, r6 ; st4 r25, r26 } + { shrs r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { shrs r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st1 r25, r26 } + { shrs r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st2 r25, r26 } + { shrs r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 } + { shrs r15, r16, r17 ; mulax r5, r6, r7 ; st r25, r26 } + { shrs r15, r16, r17 ; mz r5, r6, r7 ; st2 r25, r26 } + { shrs r15, r16, r17 ; nor r5, r6, r7 } + { shrs r15, r16, r17 ; prefetch r25 ; add r5, r6, r7 } + { shrs r15, r16, r17 ; prefetch r25 ; revbytes r5, r6 } + { shrs r15, r16, r17 ; prefetch_l1 r25 ; ctz r5, r6 } + { shrs r15, r16, r17 ; prefetch_l1 r25 ; tblidxb0 r5, r6 } + { shrs r15, r16, r17 ; prefetch_l1_fault r25 ; mz r5, r6, r7 } + { shrs r15, r16, r17 ; prefetch_l2 r25 ; cmples r5, r6, r7 } + { shrs r15, r16, r17 ; prefetch_l2 r25 ; shrs r5, r6, r7 } + { shrs r15, r16, r17 ; prefetch_l2_fault r25 ; mula_hs_hs r5, r6, r7 } + { shrs r15, r16, r17 ; prefetch_l3 r25 ; andi r5, r6, 5 } + { shrs r15, r16, r17 ; prefetch_l3 r25 ; shl1addx r5, r6, r7 } + { shrs r15, r16, r17 ; prefetch_l3_fault r25 ; move r5, r6 } + { shrs r15, r16, r17 ; prefetch_l3_fault r25 } + { shrs r15, r16, r17 ; rotl r5, r6, r7 ; ld1s r25, r26 } + { shrs r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 } + { shrs r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2u r25, r26 } + { shrs r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 } + { shrs r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l1 r25 } + { shrs r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l1 r25 } + { shrs r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 } + { shrs r15, r16, r17 ; st r25, r26 ; cmpeq r5, r6, r7 } + { shrs r15, r16, r17 ; st r25, r26 ; shl3addx r5, r6, r7 } + { shrs r15, r16, r17 ; st1 r25, r26 ; mul_ls_ls r5, r6, r7 } + { shrs r15, r16, r17 ; st2 r25, r26 ; addxi r5, r6, 5 } + { shrs r15, r16, r17 ; st2 r25, r26 ; shl r5, r6, r7 } + { shrs r15, r16, r17 ; st4 r25, r26 ; info 19 } + { shrs r15, r16, r17 ; st4 r25, r26 ; tblidxb3 r5, r6 } + { shrs r15, r16, r17 ; subx r5, r6, r7 } + { shrs r15, r16, r17 ; tblidxb2 r5, r6 ; ld r25, r26 } + { shrs r15, r16, r17 ; v1adduc r5, r6, r7 } + { shrs r15, r16, r17 ; v1shrui r5, r6, 5 } + { shrs r15, r16, r17 ; v2shrs r5, r6, r7 } + { shrs r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 } + { shrs r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 } + { shrs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 } + { shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + { shrs r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 } + { shrs r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1 r25 } + { shrs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 } + { shrs r5, r6, r7 ; fetchand4 r15, r16, r17 } + { shrs r5, r6, r7 ; ill ; st r25, r26 } + { shrs r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + { shrs r5, r6, r7 ; jr r15 ; st1 r25, r26 } + { shrs r5, r6, r7 ; ld r25, r26 ; info 19 } + { shrs r5, r6, r7 ; ld1s r25, r26 ; cmples r15, r16, r17 } + { shrs r5, r6, r7 ; ld1u r15, r16 } + { shrs r5, r6, r7 ; ld1u r25, r26 ; shrs r15, r16, r17 } + { shrs r5, r6, r7 ; ld2s r25, r26 ; rotli r15, r16, 5 } + { shrs r5, r6, r7 ; ld2u r25, r26 ; lnk r15 } + { shrs r5, r6, r7 ; ld4s r25, r26 ; cmpltu r15, r16, r17 } + { shrs r5, r6, r7 ; ld4u r25, r26 ; addxi r15, r16, 5 } + { shrs r5, r6, r7 ; ld4u r25, r26 ; sub r15, r16, r17 } + { shrs r5, r6, r7 ; lnk r15 } + { shrs r5, r6, r7 ; move r15, r16 } + { shrs r5, r6, r7 ; mz r15, r16, r17 } + { shrs r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 } + { shrs r5, r6, r7 ; prefetch r25 ; jrp r15 } + { shrs r5, r6, r7 ; prefetch_l1 r25 ; cmpeq r15, r16, r17 } + { shrs r5, r6, r7 ; prefetch_l1 r25 } + { shrs r5, r6, r7 ; prefetch_l1_fault r25 ; shli r15, r16, 5 } + { shrs r5, r6, r7 ; prefetch_l2 r25 ; rotli r15, r16, 5 } + { shrs r5, r6, r7 ; prefetch_l2_fault r25 ; mnz r15, r16, r17 } + { shrs r5, r6, r7 ; prefetch_l3 r25 ; fnop } + { shrs r5, r6, r7 ; prefetch_l3_fault r25 ; cmpeq r15, r16, r17 } + { shrs r5, r6, r7 ; prefetch_l3_fault r25 } + { shrs r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 } + { shrs r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + { shrs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 } + { shrs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + { shrs r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 } + { shrs r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 } + { shrs r5, r6, r7 ; st r25, r26 ; cmpeq r15, r16, r17 } + { shrs r5, r6, r7 ; st r25, r26 } + { shrs r5, r6, r7 ; st1 r25, r26 ; shli r15, r16, 5 } + { shrs r5, r6, r7 ; st2 r25, r26 ; rotl r15, r16, r17 } + { shrs r5, r6, r7 ; st4 r25, r26 ; jrp r15 } + { shrs r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 } + { shrs r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + { shrs r5, r6, r7 ; v2mins r15, r16, r17 } + { shrs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 } + { shrsi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3_fault r25 } + { shrsi r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 } + { shrsi r15, r16, 5 ; andi r5, r6, 5 ; st r25, r26 } + { shrsi r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 } + { shrsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st1 r25, r26 } + { shrsi r15, r16, 5 ; cmples r5, r6, r7 ; st4 r25, r26 } + { shrsi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld r25, r26 } + { shrsi r15, r16, 5 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + { shrsi r15, r16, 5 ; ctz r5, r6 ; prefetch_l3_fault r25 } + { shrsi r15, r16, 5 ; fsingle_mul2 r5, r6, r7 } + { shrsi r15, r16, 5 ; info 19 } + { shrsi r15, r16, 5 ; ld r25, r26 ; pcnt r5, r6 } + { shrsi r15, r16, 5 ; ld1s r25, r26 ; cmpltu r5, r6, r7 } + { shrsi r15, r16, 5 ; ld1s r25, r26 ; sub r5, r6, r7 } + { shrsi r15, r16, 5 ; ld1u r25, r26 ; mulax r5, r6, r7 } + { shrsi r15, r16, 5 ; ld2s r25, r26 ; cmpeq r5, r6, r7 } + { shrsi r15, r16, 5 ; ld2s r25, r26 ; shl3addx r5, r6, r7 } + { shrsi r15, r16, 5 ; ld2u r25, r26 ; mul_ls_ls r5, r6, r7 } + { shrsi r15, r16, 5 ; ld4s r25, r26 ; addxi r5, r6, 5 } + { shrsi r15, r16, 5 ; ld4s r25, r26 ; shl r5, r6, r7 } + { shrsi r15, r16, 5 ; ld4u r25, r26 ; info 19 } + { shrsi r15, r16, 5 ; ld4u r25, r26 ; tblidxb3 r5, r6 } + { shrsi r15, r16, 5 ; move r5, r6 ; st4 r25, r26 } + { shrsi r15, r16, 5 ; mul_hs_hs r5, r6, r7 } + { shrsi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; st1 r25, r26 } + { shrsi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; st2 r25, r26 } + { shrsi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 } + { shrsi r15, r16, 5 ; mulax r5, r6, r7 ; st r25, r26 } + { shrsi r15, r16, 5 ; mz r5, r6, r7 ; st2 r25, r26 } + { shrsi r15, r16, 5 ; nor r5, r6, r7 } + { shrsi r15, r16, 5 ; prefetch r25 ; add r5, r6, r7 } + { shrsi r15, r16, 5 ; prefetch r25 ; revbytes r5, r6 } + { shrsi r15, r16, 5 ; prefetch_l1 r25 ; ctz r5, r6 } + { shrsi r15, r16, 5 ; prefetch_l1 r25 ; tblidxb0 r5, r6 } + { shrsi r15, r16, 5 ; prefetch_l1_fault r25 ; mz r5, r6, r7 } + { shrsi r15, r16, 5 ; prefetch_l2 r25 ; cmples r5, r6, r7 } + { shrsi r15, r16, 5 ; prefetch_l2 r25 ; shrs r5, r6, r7 } + { shrsi r15, r16, 5 ; prefetch_l2_fault r25 ; mula_hs_hs r5, r6, r7 } + { shrsi r15, r16, 5 ; prefetch_l3 r25 ; andi r5, r6, 5 } + { shrsi r15, r16, 5 ; prefetch_l3 r25 ; shl1addx r5, r6, r7 } + { shrsi r15, r16, 5 ; prefetch_l3_fault r25 ; move r5, r6 } + { shrsi r15, r16, 5 ; prefetch_l3_fault r25 } + { shrsi r15, r16, 5 ; rotl r5, r6, r7 ; ld1s r25, r26 } + { shrsi r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 } + { shrsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2u r25, r26 } + { shrsi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4u r25, r26 } + { shrsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l1 r25 } + { shrsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l1 r25 } + { shrsi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 } + { shrsi r15, r16, 5 ; st r25, r26 ; cmpeq r5, r6, r7 } + { shrsi r15, r16, 5 ; st r25, r26 ; shl3addx r5, r6, r7 } + { shrsi r15, r16, 5 ; st1 r25, r26 ; mul_ls_ls r5, r6, r7 } + { shrsi r15, r16, 5 ; st2 r25, r26 ; addxi r5, r6, 5 } + { shrsi r15, r16, 5 ; st2 r25, r26 ; shl r5, r6, r7 } + { shrsi r15, r16, 5 ; st4 r25, r26 ; info 19 } + { shrsi r15, r16, 5 ; st4 r25, r26 ; tblidxb3 r5, r6 } + { shrsi r15, r16, 5 ; subx r5, r6, r7 } + { shrsi r15, r16, 5 ; tblidxb2 r5, r6 ; ld r25, r26 } + { shrsi r15, r16, 5 ; v1adduc r5, r6, r7 } + { shrsi r15, r16, 5 ; v1shrui r5, r6, 5 } + { shrsi r15, r16, 5 ; v2shrs r5, r6, r7 } + { shrsi r5, r6, 5 ; add r15, r16, r17 ; ld2s r25, r26 } + { shrsi r5, r6, 5 ; addx r15, r16, r17 ; ld2u r25, r26 } + { shrsi r5, r6, 5 ; and r15, r16, r17 ; ld2u r25, r26 } + { shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + { shrsi r5, r6, 5 ; cmples r15, r16, r17 ; ld4u r25, r26 } + { shrsi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l1 r25 } + { shrsi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 } + { shrsi r5, r6, 5 ; fetchand4 r15, r16, r17 } + { shrsi r5, r6, 5 ; ill ; st r25, r26 } + { shrsi r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 } + { shrsi r5, r6, 5 ; jr r15 ; st1 r25, r26 } + { shrsi r5, r6, 5 ; ld r25, r26 ; info 19 } + { shrsi r5, r6, 5 ; ld1s r25, r26 ; cmples r15, r16, r17 } + { shrsi r5, r6, 5 ; ld1u r15, r16 } + { shrsi r5, r6, 5 ; ld1u r25, r26 ; shrs r15, r16, r17 } + { shrsi r5, r6, 5 ; ld2s r25, r26 ; rotli r15, r16, 5 } + { shrsi r5, r6, 5 ; ld2u r25, r26 ; lnk r15 } + { shrsi r5, r6, 5 ; ld4s r25, r26 ; cmpltu r15, r16, r17 } + { shrsi r5, r6, 5 ; ld4u r25, r26 ; addxi r15, r16, 5 } + { shrsi r5, r6, 5 ; ld4u r25, r26 ; sub r15, r16, r17 } + { shrsi r5, r6, 5 ; lnk r15 } + { shrsi r5, r6, 5 ; move r15, r16 } + { shrsi r5, r6, 5 ; mz r15, r16, r17 } + { shrsi r5, r6, 5 ; or r15, r16, r17 ; ld1s r25, r26 } + { shrsi r5, r6, 5 ; prefetch r25 ; jrp r15 } + { shrsi r5, r6, 5 ; prefetch_l1 r25 ; cmpeq r15, r16, r17 } + { shrsi r5, r6, 5 ; prefetch_l1 r25 } + { shrsi r5, r6, 5 ; prefetch_l1_fault r25 ; shli r15, r16, 5 } + { shrsi r5, r6, 5 ; prefetch_l2 r25 ; rotli r15, r16, 5 } + { shrsi r5, r6, 5 ; prefetch_l2_fault r25 ; mnz r15, r16, r17 } + { shrsi r5, r6, 5 ; prefetch_l3 r25 ; fnop } + { shrsi r5, r6, 5 ; prefetch_l3_fault r25 ; cmpeq r15, r16, r17 } + { shrsi r5, r6, 5 ; prefetch_l3_fault r25 } + { shrsi r5, r6, 5 ; shl r15, r16, r17 ; ld r25, r26 } + { shrsi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + { shrsi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld2s r25, r26 } + { shrsi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + { shrsi r5, r6, 5 ; shrs r15, r16, r17 ; ld4s r25, r26 } + { shrsi r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 } + { shrsi r5, r6, 5 ; st r25, r26 ; cmpeq r15, r16, r17 } + { shrsi r5, r6, 5 ; st r25, r26 } + { shrsi r5, r6, 5 ; st1 r25, r26 ; shli r15, r16, 5 } + { shrsi r5, r6, 5 ; st2 r25, r26 ; rotl r15, r16, r17 } + { shrsi r5, r6, 5 ; st4 r25, r26 ; jrp r15 } + { shrsi r5, r6, 5 ; sub r15, r16, r17 ; ld2s r25, r26 } + { shrsi r5, r6, 5 ; v1cmpeqi r15, r16, 5 } + { shrsi r5, r6, 5 ; v2mins r15, r16, r17 } + { shrsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 } + { shru r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 } + { shru r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 } + { shru r15, r16, r17 ; andi r5, r6, 5 ; st r25, r26 } + { shru r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 } + { shru r15, r16, r17 ; cmpeq r5, r6, r7 ; st1 r25, r26 } + { shru r15, r16, r17 ; cmples r5, r6, r7 ; st4 r25, r26 } + { shru r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld r25, r26 } + { shru r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + { shru r15, r16, r17 ; ctz r5, r6 ; prefetch_l3_fault r25 } + { shru r15, r16, r17 ; fsingle_mul2 r5, r6, r7 } + { shru r15, r16, r17 ; info 19 } + { shru r15, r16, r17 ; ld r25, r26 ; pcnt r5, r6 } + { shru r15, r16, r17 ; ld1s r25, r26 ; cmpltu r5, r6, r7 } + { shru r15, r16, r17 ; ld1s r25, r26 ; sub r5, r6, r7 } + { shru r15, r16, r17 ; ld1u r25, r26 ; mulax r5, r6, r7 } + { shru r15, r16, r17 ; ld2s r25, r26 ; cmpeq r5, r6, r7 } + { shru r15, r16, r17 ; ld2s r25, r26 ; shl3addx r5, r6, r7 } + { shru r15, r16, r17 ; ld2u r25, r26 ; mul_ls_ls r5, r6, r7 } + { shru r15, r16, r17 ; ld4s r25, r26 ; addxi r5, r6, 5 } + { shru r15, r16, r17 ; ld4s r25, r26 ; shl r5, r6, r7 } + { shru r15, r16, r17 ; ld4u r25, r26 ; info 19 } + { shru r15, r16, r17 ; ld4u r25, r26 ; tblidxb3 r5, r6 } + { shru r15, r16, r17 ; move r5, r6 ; st4 r25, r26 } + { shru r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { shru r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st1 r25, r26 } + { shru r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st2 r25, r26 } + { shru r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 } + { shru r15, r16, r17 ; mulax r5, r6, r7 ; st r25, r26 } + { shru r15, r16, r17 ; mz r5, r6, r7 ; st2 r25, r26 } + { shru r15, r16, r17 ; nor r5, r6, r7 } + { shru r15, r16, r17 ; prefetch r25 ; add r5, r6, r7 } + { shru r15, r16, r17 ; prefetch r25 ; revbytes r5, r6 } + { shru r15, r16, r17 ; prefetch_l1 r25 ; ctz r5, r6 } + { shru r15, r16, r17 ; prefetch_l1 r25 ; tblidxb0 r5, r6 } + { shru r15, r16, r17 ; prefetch_l1_fault r25 ; mz r5, r6, r7 } + { shru r15, r16, r17 ; prefetch_l2 r25 ; cmples r5, r6, r7 } + { shru r15, r16, r17 ; prefetch_l2 r25 ; shrs r5, r6, r7 } + { shru r15, r16, r17 ; prefetch_l2_fault r25 ; mula_hs_hs r5, r6, r7 } + { shru r15, r16, r17 ; prefetch_l3 r25 ; andi r5, r6, 5 } + { shru r15, r16, r17 ; prefetch_l3 r25 ; shl1addx r5, r6, r7 } + { shru r15, r16, r17 ; prefetch_l3_fault r25 ; move r5, r6 } + { shru r15, r16, r17 ; prefetch_l3_fault r25 } + { shru r15, r16, r17 ; rotl r5, r6, r7 ; ld1s r25, r26 } + { shru r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 } + { shru r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2u r25, r26 } + { shru r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 } + { shru r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l1 r25 } + { shru r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l1 r25 } + { shru r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 } + { shru r15, r16, r17 ; st r25, r26 ; cmpeq r5, r6, r7 } + { shru r15, r16, r17 ; st r25, r26 ; shl3addx r5, r6, r7 } + { shru r15, r16, r17 ; st1 r25, r26 ; mul_ls_ls r5, r6, r7 } + { shru r15, r16, r17 ; st2 r25, r26 ; addxi r5, r6, 5 } + { shru r15, r16, r17 ; st2 r25, r26 ; shl r5, r6, r7 } + { shru r15, r16, r17 ; st4 r25, r26 ; info 19 } + { shru r15, r16, r17 ; st4 r25, r26 ; tblidxb3 r5, r6 } + { shru r15, r16, r17 ; subx r5, r6, r7 } + { shru r15, r16, r17 ; tblidxb2 r5, r6 ; ld r25, r26 } + { shru r15, r16, r17 ; v1adduc r5, r6, r7 } + { shru r15, r16, r17 ; v1shrui r5, r6, 5 } + { shru r15, r16, r17 ; v2shrs r5, r6, r7 } + { shru r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 } + { shru r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 } + { shru r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 } + { shru r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + { shru r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 } + { shru r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1 r25 } + { shru r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 } + { shru r5, r6, r7 ; fetchand4 r15, r16, r17 } + { shru r5, r6, r7 ; ill ; st r25, r26 } + { shru r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 } + { shru r5, r6, r7 ; jr r15 ; st1 r25, r26 } + { shru r5, r6, r7 ; ld r25, r26 ; info 19 } + { shru r5, r6, r7 ; ld1s r25, r26 ; cmples r15, r16, r17 } + { shru r5, r6, r7 ; ld1u r15, r16 } + { shru r5, r6, r7 ; ld1u r25, r26 ; shrs r15, r16, r17 } + { shru r5, r6, r7 ; ld2s r25, r26 ; rotli r15, r16, 5 } + { shru r5, r6, r7 ; ld2u r25, r26 ; lnk r15 } + { shru r5, r6, r7 ; ld4s r25, r26 ; cmpltu r15, r16, r17 } + { shru r5, r6, r7 ; ld4u r25, r26 ; addxi r15, r16, 5 } + { shru r5, r6, r7 ; ld4u r25, r26 ; sub r15, r16, r17 } + { shru r5, r6, r7 ; lnk r15 } + { shru r5, r6, r7 ; move r15, r16 } + { shru r5, r6, r7 ; mz r15, r16, r17 } + { shru r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 } + { shru r5, r6, r7 ; prefetch r25 ; jrp r15 } + { shru r5, r6, r7 ; prefetch_l1 r25 ; cmpeq r15, r16, r17 } + { shru r5, r6, r7 ; prefetch_l1 r25 } + { shru r5, r6, r7 ; prefetch_l1_fault r25 ; shli r15, r16, 5 } + { shru r5, r6, r7 ; prefetch_l2 r25 ; rotli r15, r16, 5 } + { shru r5, r6, r7 ; prefetch_l2_fault r25 ; mnz r15, r16, r17 } + { shru r5, r6, r7 ; prefetch_l3 r25 ; fnop } + { shru r5, r6, r7 ; prefetch_l3_fault r25 ; cmpeq r15, r16, r17 } + { shru r5, r6, r7 ; prefetch_l3_fault r25 } + { shru r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 } + { shru r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + { shru r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 } + { shru r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + { shru r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 } + { shru r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 } + { shru r5, r6, r7 ; st r25, r26 ; cmpeq r15, r16, r17 } + { shru r5, r6, r7 ; st r25, r26 } + { shru r5, r6, r7 ; st1 r25, r26 ; shli r15, r16, 5 } + { shru r5, r6, r7 ; st2 r25, r26 ; rotl r15, r16, r17 } + { shru r5, r6, r7 ; st4 r25, r26 ; jrp r15 } + { shru r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 } + { shru r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + { shru r5, r6, r7 ; v2mins r15, r16, r17 } + { shru r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 } + { shrui r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3_fault r25 } + { shrui r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 } + { shrui r15, r16, 5 ; andi r5, r6, 5 ; st r25, r26 } + { shrui r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 } + { shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; st1 r25, r26 } + { shrui r15, r16, 5 ; cmples r5, r6, r7 ; st4 r25, r26 } + { shrui r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld r25, r26 } + { shrui r15, r16, 5 ; cmpne r5, r6, r7 ; ld1s r25, r26 } + { shrui r15, r16, 5 ; ctz r5, r6 ; prefetch_l3_fault r25 } + { shrui r15, r16, 5 ; fsingle_mul2 r5, r6, r7 } + { shrui r15, r16, 5 ; info 19 } + { shrui r15, r16, 5 ; ld r25, r26 ; pcnt r5, r6 } + { shrui r15, r16, 5 ; ld1s r25, r26 ; cmpltu r5, r6, r7 } + { shrui r15, r16, 5 ; ld1s r25, r26 ; sub r5, r6, r7 } + { shrui r15, r16, 5 ; ld1u r25, r26 ; mulax r5, r6, r7 } + { shrui r15, r16, 5 ; ld2s r25, r26 ; cmpeq r5, r6, r7 } + { shrui r15, r16, 5 ; ld2s r25, r26 ; shl3addx r5, r6, r7 } + { shrui r15, r16, 5 ; ld2u r25, r26 ; mul_ls_ls r5, r6, r7 } + { shrui r15, r16, 5 ; ld4s r25, r26 ; addxi r5, r6, 5 } + { shrui r15, r16, 5 ; ld4s r25, r26 ; shl r5, r6, r7 } + { shrui r15, r16, 5 ; ld4u r25, r26 ; info 19 } + { shrui r15, r16, 5 ; ld4u r25, r26 ; tblidxb3 r5, r6 } + { shrui r15, r16, 5 ; move r5, r6 ; st4 r25, r26 } + { shrui r15, r16, 5 ; mul_hs_hs r5, r6, r7 } + { shrui r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; st1 r25, r26 } + { shrui r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; st2 r25, r26 } + { shrui r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 } + { shrui r15, r16, 5 ; mulax r5, r6, r7 ; st r25, r26 } + { shrui r15, r16, 5 ; mz r5, r6, r7 ; st2 r25, r26 } + { shrui r15, r16, 5 ; nor r5, r6, r7 } + { shrui r15, r16, 5 ; prefetch r25 ; add r5, r6, r7 } + { shrui r15, r16, 5 ; prefetch r25 ; revbytes r5, r6 } + { shrui r15, r16, 5 ; prefetch_l1 r25 ; ctz r5, r6 } + { shrui r15, r16, 5 ; prefetch_l1 r25 ; tblidxb0 r5, r6 } + { shrui r15, r16, 5 ; prefetch_l1_fault r25 ; mz r5, r6, r7 } + { shrui r15, r16, 5 ; prefetch_l2 r25 ; cmples r5, r6, r7 } + { shrui r15, r16, 5 ; prefetch_l2 r25 ; shrs r5, r6, r7 } + { shrui r15, r16, 5 ; prefetch_l2_fault r25 ; mula_hs_hs r5, r6, r7 } + { shrui r15, r16, 5 ; prefetch_l3 r25 ; andi r5, r6, 5 } + { shrui r15, r16, 5 ; prefetch_l3 r25 ; shl1addx r5, r6, r7 } + { shrui r15, r16, 5 ; prefetch_l3_fault r25 ; move r5, r6 } + { shrui r15, r16, 5 ; prefetch_l3_fault r25 } + { shrui r15, r16, 5 ; rotl r5, r6, r7 ; ld1s r25, r26 } + { shrui r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 } + { shrui r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2u r25, r26 } + { shrui r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4u r25, r26 } + { shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l1 r25 } + { shrui r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l1 r25 } + { shrui r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 } + { shrui r15, r16, 5 ; st r25, r26 ; cmpeq r5, r6, r7 } + { shrui r15, r16, 5 ; st r25, r26 ; shl3addx r5, r6, r7 } + { shrui r15, r16, 5 ; st1 r25, r26 ; mul_ls_ls r5, r6, r7 } + { shrui r15, r16, 5 ; st2 r25, r26 ; addxi r5, r6, 5 } + { shrui r15, r16, 5 ; st2 r25, r26 ; shl r5, r6, r7 } + { shrui r15, r16, 5 ; st4 r25, r26 ; info 19 } + { shrui r15, r16, 5 ; st4 r25, r26 ; tblidxb3 r5, r6 } + { shrui r15, r16, 5 ; subx r5, r6, r7 } + { shrui r15, r16, 5 ; tblidxb2 r5, r6 ; ld r25, r26 } + { shrui r15, r16, 5 ; v1adduc r5, r6, r7 } + { shrui r15, r16, 5 ; v1shrui r5, r6, 5 } + { shrui r15, r16, 5 ; v2shrs r5, r6, r7 } + { shrui r5, r6, 5 ; add r15, r16, r17 ; ld2s r25, r26 } + { shrui r5, r6, 5 ; addx r15, r16, r17 ; ld2u r25, r26 } + { shrui r5, r6, 5 ; and r15, r16, r17 ; ld2u r25, r26 } + { shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4u r25, r26 } + { shrui r5, r6, 5 ; cmples r15, r16, r17 ; ld4u r25, r26 } + { shrui r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l1 r25 } + { shrui r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 } + { shrui r5, r6, 5 ; fetchand4 r15, r16, r17 } + { shrui r5, r6, 5 ; ill ; st r25, r26 } + { shrui r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 } + { shrui r5, r6, 5 ; jr r15 ; st1 r25, r26 } + { shrui r5, r6, 5 ; ld r25, r26 ; info 19 } + { shrui r5, r6, 5 ; ld1s r25, r26 ; cmples r15, r16, r17 } + { shrui r5, r6, 5 ; ld1u r15, r16 } + { shrui r5, r6, 5 ; ld1u r25, r26 ; shrs r15, r16, r17 } + { shrui r5, r6, 5 ; ld2s r25, r26 ; rotli r15, r16, 5 } + { shrui r5, r6, 5 ; ld2u r25, r26 ; lnk r15 } + { shrui r5, r6, 5 ; ld4s r25, r26 ; cmpltu r15, r16, r17 } + { shrui r5, r6, 5 ; ld4u r25, r26 ; addxi r15, r16, 5 } + { shrui r5, r6, 5 ; ld4u r25, r26 ; sub r15, r16, r17 } + { shrui r5, r6, 5 ; lnk r15 } + { shrui r5, r6, 5 ; move r15, r16 } + { shrui r5, r6, 5 ; mz r15, r16, r17 } + { shrui r5, r6, 5 ; or r15, r16, r17 ; ld1s r25, r26 } + { shrui r5, r6, 5 ; prefetch r25 ; jrp r15 } + { shrui r5, r6, 5 ; prefetch_l1 r25 ; cmpeq r15, r16, r17 } + { shrui r5, r6, 5 ; prefetch_l1 r25 } + { shrui r5, r6, 5 ; prefetch_l1_fault r25 ; shli r15, r16, 5 } + { shrui r5, r6, 5 ; prefetch_l2 r25 ; rotli r15, r16, 5 } + { shrui r5, r6, 5 ; prefetch_l2_fault r25 ; mnz r15, r16, r17 } + { shrui r5, r6, 5 ; prefetch_l3 r25 ; fnop } + { shrui r5, r6, 5 ; prefetch_l3_fault r25 ; cmpeq r15, r16, r17 } + { shrui r5, r6, 5 ; prefetch_l3_fault r25 } + { shrui r5, r6, 5 ; shl r15, r16, r17 ; ld r25, r26 } + { shrui r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1s r25, r26 } + { shrui r5, r6, 5 ; shl2addx r15, r16, r17 ; ld2s r25, r26 } + { shrui r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4s r25, r26 } + { shrui r5, r6, 5 ; shrs r15, r16, r17 ; ld4s r25, r26 } + { shrui r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 } + { shrui r5, r6, 5 ; st r25, r26 ; cmpeq r15, r16, r17 } + { shrui r5, r6, 5 ; st r25, r26 } + { shrui r5, r6, 5 ; st1 r25, r26 ; shli r15, r16, 5 } + { shrui r5, r6, 5 ; st2 r25, r26 ; rotl r15, r16, r17 } + { shrui r5, r6, 5 ; st4 r25, r26 ; jrp r15 } + { shrui r5, r6, 5 ; sub r15, r16, r17 ; ld2s r25, r26 } + { shrui r5, r6, 5 ; v1cmpeqi r15, r16, 5 } + { shrui r5, r6, 5 ; v2mins r15, r16, r17 } + { shrui r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 } + { shrux r15, r16, r17 ; crc32_8 r5, r6, r7 } + { shrux r15, r16, r17 ; mula_hs_hu r5, r6, r7 } + { shrux r15, r16, r17 ; subx r5, r6, r7 } + { shrux r15, r16, r17 ; v1mz r5, r6, r7 } + { shrux r15, r16, r17 ; v2packuc r5, r6, r7 } + { shrux r5, r6, r7 ; cmples r15, r16, r17 } + { shrux r5, r6, r7 ; ld2s r15, r16 } + { shrux r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + { shrux r5, r6, r7 ; stnt1 r15, r16 } + { shrux r5, r6, r7 ; v2addsc r15, r16, r17 } + { shrux r5, r6, r7 ; v4subsc r15, r16, r17 } + { shruxi r15, r16, 5 ; dblalign4 r5, r6, r7 } + { shruxi r15, r16, 5 ; mula_hu_ls r5, r6, r7 } + { shruxi r15, r16, 5 ; tblidxb2 r5, r6 } + { shruxi r15, r16, 5 ; v1shli r5, r6, 5 } + { shruxi r15, r16, 5 ; v2sadu r5, r6, r7 } + { shruxi r5, r6, 5 ; cmpltu r15, r16, r17 } + { shruxi r5, r6, 5 ; ld4s r15, r16 } + { shruxi r5, r6, 5 ; prefetch_add_l3_fault r15, 5 } + { shruxi r5, r6, 5 ; stnt4 r15, r16 } + { shruxi r5, r6, 5 ; v2cmpleu r15, r16, r17 } + { shufflebytes r5, r6, r7 ; add r15, r16, r17 } + { shufflebytes r5, r6, r7 ; info 19 } + { shufflebytes r5, r6, r7 ; mfspr r16, 0x5 } + { shufflebytes r5, r6, r7 ; shru r15, r16, r17 } + { shufflebytes r5, r6, r7 ; v1minui r15, r16, 5 } + { shufflebytes r5, r6, r7 ; v2shrui r15, r16, 5 } + { st r15, r16 ; cmpne r5, r6, r7 } + { st r15, r16 ; mul_hs_ls r5, r6, r7 } + { st r15, r16 ; shlxi r5, r6, 5 } + { st r15, r16 ; v1int_l r5, r6, r7 } + { st r15, r16 ; v2mins r5, r6, r7 } + { st r25, r26 ; add r15, r16, r17 ; and r5, r6, r7 } + { st r25, r26 ; add r15, r16, r17 ; shl1add r5, r6, r7 } + { st r25, r26 ; add r5, r6, r7 ; lnk r15 } + { st r25, r26 ; addi r15, r16, 5 ; cmpltsi r5, r6, 5 } + { st r25, r26 ; addi r15, r16, 5 ; shrui r5, r6, 5 } + { st r25, r26 ; addi r5, r6, 5 ; shl r15, r16, r17 } + { st r25, r26 ; addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { st r25, r26 ; addx r5, r6, r7 ; addi r15, r16, 5 } + { st r25, r26 ; addx r5, r6, r7 ; shru r15, r16, r17 } + { st r25, r26 ; addxi r15, r16, 5 ; mz r5, r6, r7 } + { st r25, r26 ; addxi r5, r6, 5 ; cmpltsi r15, r16, 5 } + { st r25, r26 ; and r15, r16, r17 ; and r5, r6, r7 } + { st r25, r26 ; and r15, r16, r17 ; shl1add r5, r6, r7 } + { st r25, r26 ; and r5, r6, r7 ; lnk r15 } + { st r25, r26 ; andi r15, r16, 5 ; cmpltsi r5, r6, 5 } + { st r25, r26 ; andi r15, r16, 5 ; shrui r5, r6, 5 } + { st r25, r26 ; andi r5, r6, 5 ; shl r15, r16, r17 } + { st r25, r26 ; clz r5, r6 ; movei r15, 5 } + { st r25, r26 ; cmoveqz r5, r6, r7 ; jalr r15 } + { st r25, r26 ; cmovnez r5, r6, r7 ; cmplts r15, r16, r17 } + { st r25, r26 ; cmpeq r15, r16, r17 ; addxi r5, r6, 5 } + { st r25, r26 ; cmpeq r15, r16, r17 ; shl r5, r6, r7 } + { st r25, r26 ; cmpeq r5, r6, r7 ; jrp r15 } + { st r25, r26 ; cmpeqi r15, r16, 5 ; cmplts r5, r6, r7 } + { st r25, r26 ; cmpeqi r15, r16, 5 ; shru r5, r6, r7 } + { st r25, r26 ; cmpeqi r5, r6, 5 ; rotli r15, r16, 5 } + { st r25, r26 ; cmples r15, r16, r17 ; movei r5, 5 } + { st r25, r26 ; cmples r5, r6, r7 ; add r15, r16, r17 } + { st r25, r26 ; cmples r5, r6, r7 ; shrsi r15, r16, 5 } + { st r25, r26 ; cmpleu r15, r16, r17 ; mulx r5, r6, r7 } + { st r25, r26 ; cmpleu r5, r6, r7 ; cmplts r15, r16, r17 } + { st r25, r26 ; cmplts r15, r16, r17 ; addxi r5, r6, 5 } + { st r25, r26 ; cmplts r15, r16, r17 ; shl r5, r6, r7 } + { st r25, r26 ; cmplts r5, r6, r7 ; jrp r15 } + { st r25, r26 ; cmpltsi r15, r16, 5 ; cmplts r5, r6, r7 } + { st r25, r26 ; cmpltsi r15, r16, 5 ; shru r5, r6, r7 } + { st r25, r26 ; cmpltsi r5, r6, 5 ; rotli r15, r16, 5 } + { st r25, r26 ; cmpltu r15, r16, r17 ; movei r5, 5 } + { st r25, r26 ; cmpltu r5, r6, r7 ; add r15, r16, r17 } + { st r25, r26 ; cmpltu r5, r6, r7 ; shrsi r15, r16, 5 } + { st r25, r26 ; cmpne r15, r16, r17 ; mulx r5, r6, r7 } + { st r25, r26 ; cmpne r5, r6, r7 ; cmplts r15, r16, r17 } + { st r25, r26 ; ctz r5, r6 ; addxi r15, r16, 5 } + { st r25, r26 ; ctz r5, r6 ; sub r15, r16, r17 } + { st r25, r26 ; fnop ; jalr r15 } + { st r25, r26 ; fnop ; shl1addx r5, r6, r7 } + { st r25, r26 ; fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 } + { st r25, r26 ; ill ; addxi r5, r6, 5 } + { st r25, r26 ; ill ; shl r5, r6, r7 } + { st r25, r26 ; info 19 ; cmples r5, r6, r7 } + { st r25, r26 ; info 19 ; nor r15, r16, r17 } + { st r25, r26 ; info 19 ; tblidxb1 r5, r6 } + { st r25, r26 ; jalr r15 ; mz r5, r6, r7 } + { st r25, r26 ; jalrp r15 ; cmples r5, r6, r7 } + { st r25, r26 ; jalrp r15 ; shrs r5, r6, r7 } + { st r25, r26 ; jr r15 ; mula_hs_hs r5, r6, r7 } + { st r25, r26 ; jrp r15 ; andi r5, r6, 5 } + { st r25, r26 ; jrp r15 ; shl1addx r5, r6, r7 } + { st r25, r26 ; lnk r15 ; move r5, r6 } + { st r25, r26 ; lnk r15 } + { st r25, r26 ; mnz r15, r16, r17 ; revbits r5, r6 } + { st r25, r26 ; mnz r5, r6, r7 ; info 19 } + { st r25, r26 ; move r15, r16 ; cmpeq r5, r6, r7 } + { st r25, r26 ; move r15, r16 ; shl3addx r5, r6, r7 } + { st r25, r26 ; move r5, r6 ; nop } + { st r25, r26 ; movei r15, 5 ; fsingle_pack1 r5, r6 } + { st r25, r26 ; movei r15, 5 ; tblidxb2 r5, r6 } + { st r25, r26 ; movei r5, 5 ; shl3add r15, r16, r17 } + { st r25, r26 ; mul_hs_hs r5, r6, r7 ; rotl r15, r16, r17 } + { st r25, r26 ; mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 } + { st r25, r26 ; mul_ls_ls r5, r6, r7 ; ill } + { st r25, r26 ; mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 } + { st r25, r26 ; mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 } + { st r25, r26 ; mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 } + { st r25, r26 ; mula_hu_hu r5, r6, r7 ; shl2add r15, r16, r17 } + { st r25, r26 ; mula_ls_ls r5, r6, r7 ; nor r15, r16, r17 } + { st r25, r26 ; mula_lu_lu r5, r6, r7 ; jrp r15 } + { st r25, r26 ; mulax r5, r6, r7 ; cmpne r15, r16, r17 } + { st r25, r26 ; mulx r5, r6, r7 ; cmpeq r15, r16, r17 } + { st r25, r26 ; mulx r5, r6, r7 } + { st r25, r26 ; mz r15, r16, r17 ; revbits r5, r6 } + { st r25, r26 ; mz r5, r6, r7 ; info 19 } + { st r25, r26 ; nop ; and r5, r6, r7 } + { st r25, r26 ; nop ; mul_ls_ls r5, r6, r7 } + { st r25, r26 ; nop ; shrsi r15, r16, 5 } + { st r25, r26 ; nor r15, r16, r17 ; movei r5, 5 } + { st r25, r26 ; nor r5, r6, r7 ; add r15, r16, r17 } + { st r25, r26 ; nor r5, r6, r7 ; shrsi r15, r16, 5 } + { st r25, r26 ; or r15, r16, r17 ; mulx r5, r6, r7 } + { st r25, r26 ; or r5, r6, r7 ; cmplts r15, r16, r17 } + { st r25, r26 ; pcnt r5, r6 ; addxi r15, r16, 5 } + { st r25, r26 ; pcnt r5, r6 ; sub r15, r16, r17 } + { st r25, r26 ; revbits r5, r6 ; shl3add r15, r16, r17 } + { st r25, r26 ; revbytes r5, r6 ; rotl r15, r16, r17 } + { st r25, r26 ; rotl r15, r16, r17 ; move r5, r6 } + { st r25, r26 ; rotl r15, r16, r17 } + { st r25, r26 ; rotl r5, r6, r7 ; shrs r15, r16, r17 } + { st r25, r26 ; rotli r15, r16, 5 ; mulax r5, r6, r7 } + { st r25, r26 ; rotli r5, r6, 5 ; cmpleu r15, r16, r17 } + { st r25, r26 ; shl r15, r16, r17 ; addx r5, r6, r7 } + { st r25, r26 ; shl r15, r16, r17 ; rotli r5, r6, 5 } + { st r25, r26 ; shl r5, r6, r7 ; jr r15 } + { st r25, r26 ; shl1add r15, r16, r17 ; cmpleu r5, r6, r7 } + { st r25, r26 ; shl1add r15, r16, r17 ; shrsi r5, r6, 5 } + { st r25, r26 ; shl1add r5, r6, r7 ; rotl r15, r16, r17 } + { st r25, r26 ; shl1addx r15, r16, r17 ; move r5, r6 } + { st r25, r26 ; shl1addx r15, r16, r17 } + { st r25, r26 ; shl1addx r5, r6, r7 ; shrs r15, r16, r17 } + { st r25, r26 ; shl2add r15, r16, r17 ; mulax r5, r6, r7 } + { st r25, r26 ; shl2add r5, r6, r7 ; cmpleu r15, r16, r17 } + { st r25, r26 ; shl2addx r15, r16, r17 ; addx r5, r6, r7 } + { st r25, r26 ; shl2addx r15, r16, r17 ; rotli r5, r6, 5 } + { st r25, r26 ; shl2addx r5, r6, r7 ; jr r15 } + { st r25, r26 ; shl3add r15, r16, r17 ; cmpleu r5, r6, r7 } + { st r25, r26 ; shl3add r15, r16, r17 ; shrsi r5, r6, 5 } + { st r25, r26 ; shl3add r5, r6, r7 ; rotl r15, r16, r17 } + { st r25, r26 ; shl3addx r15, r16, r17 ; move r5, r6 } + { st r25, r26 ; shl3addx r15, r16, r17 } + { st r25, r26 ; shl3addx r5, r6, r7 ; shrs r15, r16, r17 } + { st r25, r26 ; shli r15, r16, 5 ; mulax r5, r6, r7 } + { st r25, r26 ; shli r5, r6, 5 ; cmpleu r15, r16, r17 } + { st r25, r26 ; shrs r15, r16, r17 ; addx r5, r6, r7 } + { st r25, r26 ; shrs r15, r16, r17 ; rotli r5, r6, 5 } + { st r25, r26 ; shrs r5, r6, r7 ; jr r15 } + { st r25, r26 ; shrsi r15, r16, 5 ; cmpleu r5, r6, r7 } + { st r25, r26 ; shrsi r15, r16, 5 ; shrsi r5, r6, 5 } + { st r25, r26 ; shrsi r5, r6, 5 ; rotl r15, r16, r17 } + { st r25, r26 ; shru r15, r16, r17 ; move r5, r6 } + { st r25, r26 ; shru r15, r16, r17 } + { st r25, r26 ; shru r5, r6, r7 ; shrs r15, r16, r17 } + { st r25, r26 ; shrui r15, r16, 5 ; mulax r5, r6, r7 } + { st r25, r26 ; shrui r5, r6, 5 ; cmpleu r15, r16, r17 } + { st r25, r26 ; sub r15, r16, r17 ; addx r5, r6, r7 } + { st r25, r26 ; sub r15, r16, r17 ; rotli r5, r6, 5 } + { st r25, r26 ; sub r5, r6, r7 ; jr r15 } + { st r25, r26 ; subx r15, r16, r17 ; cmpleu r5, r6, r7 } + { st r25, r26 ; subx r15, r16, r17 ; shrsi r5, r6, 5 } + { st r25, r26 ; subx r5, r6, r7 ; rotl r15, r16, r17 } + { st r25, r26 ; tblidxb0 r5, r6 ; mnz r15, r16, r17 } + { st r25, r26 ; tblidxb1 r5, r6 ; ill } + { st r25, r26 ; tblidxb2 r5, r6 ; cmples r15, r16, r17 } + { st r25, r26 ; tblidxb3 r5, r6 ; addi r15, r16, 5 } + { st r25, r26 ; tblidxb3 r5, r6 ; shru r15, r16, r17 } + { st r25, r26 ; xor r15, r16, r17 ; mz r5, r6, r7 } + { st r25, r26 ; xor r5, r6, r7 ; cmpltsi r15, r16, 5 } + { st1 r15, r16 ; addxi r5, r6, 5 } + { st1 r15, r16 ; fdouble_unpack_max r5, r6, r7 } + { st1 r15, r16 ; nop } + { st1 r15, r16 ; v1cmpeqi r5, r6, 5 } + { st1 r15, r16 ; v2addi r5, r6, 5 } + { st1 r15, r16 ; v2sub r5, r6, r7 } + { st1 r25, r26 ; add r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { st1 r25, r26 ; add r5, r6, r7 ; addx r15, r16, r17 } + { st1 r25, r26 ; add r5, r6, r7 ; shrui r15, r16, 5 } + { st1 r25, r26 ; addi r15, r16, 5 ; nop } + { st1 r25, r26 ; addi r5, r6, 5 ; cmpltu r15, r16, r17 } + { st1 r25, r26 ; addx r15, r16, r17 ; andi r5, r6, 5 } + { st1 r25, r26 ; addx r15, r16, r17 ; shl1addx r5, r6, r7 } + { st1 r25, r26 ; addx r5, r6, r7 ; mnz r15, r16, r17 } + { st1 r25, r26 ; addxi r15, r16, 5 ; cmpltu r5, r6, r7 } + { st1 r25, r26 ; addxi r15, r16, 5 ; sub r5, r6, r7 } + { st1 r25, r26 ; addxi r5, r6, 5 ; shl1add r15, r16, r17 } + { st1 r25, r26 ; and r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { st1 r25, r26 ; and r5, r6, r7 ; addx r15, r16, r17 } + { st1 r25, r26 ; and r5, r6, r7 ; shrui r15, r16, 5 } + { st1 r25, r26 ; andi r15, r16, 5 ; nop } + { st1 r25, r26 ; andi r5, r6, 5 ; cmpltu r15, r16, r17 } + { st1 r25, r26 ; clz r5, r6 ; andi r15, r16, 5 } + { st1 r25, r26 ; clz r5, r6 ; xor r15, r16, r17 } + { st1 r25, r26 ; cmoveqz r5, r6, r7 ; shli r15, r16, 5 } + { st1 r25, r26 ; cmovnez r5, r6, r7 ; shl r15, r16, r17 } + { st1 r25, r26 ; cmpeq r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { st1 r25, r26 ; cmpeq r5, r6, r7 ; addi r15, r16, 5 } + { st1 r25, r26 ; cmpeq r5, r6, r7 ; shru r15, r16, r17 } + { st1 r25, r26 ; cmpeqi r15, r16, 5 ; mz r5, r6, r7 } + { st1 r25, r26 ; cmpeqi r5, r6, 5 ; cmpltsi r15, r16, 5 } + { st1 r25, r26 ; cmples r15, r16, r17 ; and r5, r6, r7 } + { st1 r25, r26 ; cmples r15, r16, r17 ; shl1add r5, r6, r7 } + { st1 r25, r26 ; cmples r5, r6, r7 ; lnk r15 } + { st1 r25, r26 ; cmpleu r15, r16, r17 ; cmpltsi r5, r6, 5 } + { st1 r25, r26 ; cmpleu r15, r16, r17 ; shrui r5, r6, 5 } + { st1 r25, r26 ; cmpleu r5, r6, r7 ; shl r15, r16, r17 } + { st1 r25, r26 ; cmplts r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { st1 r25, r26 ; cmplts r5, r6, r7 ; addi r15, r16, 5 } + { st1 r25, r26 ; cmplts r5, r6, r7 ; shru r15, r16, r17 } + { st1 r25, r26 ; cmpltsi r15, r16, 5 ; mz r5, r6, r7 } + { st1 r25, r26 ; cmpltsi r5, r6, 5 ; cmpltsi r15, r16, 5 } + { st1 r25, r26 ; cmpltu r15, r16, r17 ; and r5, r6, r7 } + { st1 r25, r26 ; cmpltu r15, r16, r17 ; shl1add r5, r6, r7 } + { st1 r25, r26 ; cmpltu r5, r6, r7 ; lnk r15 } + { st1 r25, r26 ; cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 } + { st1 r25, r26 ; cmpne r15, r16, r17 ; shrui r5, r6, 5 } + { st1 r25, r26 ; cmpne r5, r6, r7 ; shl r15, r16, r17 } + { st1 r25, r26 ; ctz r5, r6 ; movei r15, 5 } + { st1 r25, r26 ; fnop ; cmpeqi r15, r16, 5 } + { st1 r25, r26 ; fnop ; mz r15, r16, r17 } + { st1 r25, r26 ; fnop ; subx r15, r16, r17 } + { st1 r25, r26 ; fsingle_pack1 r5, r6 ; shl r15, r16, r17 } + { st1 r25, r26 ; ill ; mul_hs_hs r5, r6, r7 } + { st1 r25, r26 ; info 19 ; add r5, r6, r7 } + { st1 r25, r26 ; info 19 ; mnz r15, r16, r17 } + { st1 r25, r26 ; info 19 ; shl3add r15, r16, r17 } + { st1 r25, r26 ; jalr r15 ; cmpltu r5, r6, r7 } + { st1 r25, r26 ; jalr r15 ; sub r5, r6, r7 } + { st1 r25, r26 ; jalrp r15 ; mulax r5, r6, r7 } + { st1 r25, r26 ; jr r15 ; cmpeq r5, r6, r7 } + { st1 r25, r26 ; jr r15 ; shl3addx r5, r6, r7 } + { st1 r25, r26 ; jrp r15 ; mul_ls_ls r5, r6, r7 } + { st1 r25, r26 ; lnk r15 ; addxi r5, r6, 5 } + { st1 r25, r26 ; lnk r15 ; shl r5, r6, r7 } + { st1 r25, r26 ; mnz r15, r16, r17 ; info 19 } + { st1 r25, r26 ; mnz r15, r16, r17 ; tblidxb3 r5, r6 } + { st1 r25, r26 ; mnz r5, r6, r7 ; shl3addx r15, r16, r17 } + { st1 r25, r26 ; move r15, r16 ; mula_ls_ls r5, r6, r7 } + { st1 r25, r26 ; move r5, r6 ; cmpeqi r15, r16, 5 } + { st1 r25, r26 ; movei r15, 5 ; add r5, r6, r7 } + { st1 r25, r26 ; movei r15, 5 ; revbytes r5, r6 } + { st1 r25, r26 ; movei r5, 5 ; jalr r15 } + { st1 r25, r26 ; mul_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 } + { st1 r25, r26 ; mul_hu_hu r5, r6, r7 ; addxi r15, r16, 5 } + { st1 r25, r26 ; mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 } + { st1 r25, r26 ; mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 } + { st1 r25, r26 ; mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 } + { st1 r25, r26 ; mula_hs_hs r5, r6, r7 ; mnz r15, r16, r17 } + { st1 r25, r26 ; mula_hu_hu r5, r6, r7 ; ill } + { st1 r25, r26 ; mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 } + { st1 r25, r26 ; mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 } + { st1 r25, r26 ; mula_lu_lu r5, r6, r7 ; shru r15, r16, r17 } + { st1 r25, r26 ; mulax r5, r6, r7 ; shl2add r15, r16, r17 } + { st1 r25, r26 ; mulx r5, r6, r7 ; nor r15, r16, r17 } + { st1 r25, r26 ; mz r15, r16, r17 ; info 19 } + { st1 r25, r26 ; mz r15, r16, r17 ; tblidxb3 r5, r6 } + { st1 r25, r26 ; mz r5, r6, r7 ; shl3addx r15, r16, r17 } + { st1 r25, r26 ; nop ; cmpne r5, r6, r7 } + { st1 r25, r26 ; nop ; rotli r5, r6, 5 } + { st1 r25, r26 ; nor r15, r16, r17 ; and r5, r6, r7 } + { st1 r25, r26 ; nor r15, r16, r17 ; shl1add r5, r6, r7 } + { st1 r25, r26 ; nor r5, r6, r7 ; lnk r15 } + { st1 r25, r26 ; or r15, r16, r17 ; cmpltsi r5, r6, 5 } + { st1 r25, r26 ; or r15, r16, r17 ; shrui r5, r6, 5 } + { st1 r25, r26 ; or r5, r6, r7 ; shl r15, r16, r17 } + { st1 r25, r26 ; pcnt r5, r6 ; movei r15, 5 } + { st1 r25, r26 ; revbits r5, r6 ; jalr r15 } + { st1 r25, r26 ; revbytes r5, r6 ; cmplts r15, r16, r17 } + { st1 r25, r26 ; rotl r15, r16, r17 ; addxi r5, r6, 5 } + { st1 r25, r26 ; rotl r15, r16, r17 ; shl r5, r6, r7 } + { st1 r25, r26 ; rotl r5, r6, r7 ; jrp r15 } + { st1 r25, r26 ; rotli r15, r16, 5 ; cmplts r5, r6, r7 } + { st1 r25, r26 ; rotli r15, r16, 5 ; shru r5, r6, r7 } + { st1 r25, r26 ; rotli r5, r6, 5 ; rotli r15, r16, 5 } + { st1 r25, r26 ; shl r15, r16, r17 ; movei r5, 5 } + { st1 r25, r26 ; shl r5, r6, r7 ; add r15, r16, r17 } + { st1 r25, r26 ; shl r5, r6, r7 ; shrsi r15, r16, 5 } + { st1 r25, r26 ; shl1add r15, r16, r17 ; mulx r5, r6, r7 } + { st1 r25, r26 ; shl1add r5, r6, r7 ; cmplts r15, r16, r17 } + { st1 r25, r26 ; shl1addx r15, r16, r17 ; addxi r5, r6, 5 } + { st1 r25, r26 ; shl1addx r15, r16, r17 ; shl r5, r6, r7 } + { st1 r25, r26 ; shl1addx r5, r6, r7 ; jrp r15 } + { st1 r25, r26 ; shl2add r15, r16, r17 ; cmplts r5, r6, r7 } + { st1 r25, r26 ; shl2add r15, r16, r17 ; shru r5, r6, r7 } + { st1 r25, r26 ; shl2add r5, r6, r7 ; rotli r15, r16, 5 } + { st1 r25, r26 ; shl2addx r15, r16, r17 ; movei r5, 5 } + { st1 r25, r26 ; shl2addx r5, r6, r7 ; add r15, r16, r17 } + { st1 r25, r26 ; shl2addx r5, r6, r7 ; shrsi r15, r16, 5 } + { st1 r25, r26 ; shl3add r15, r16, r17 ; mulx r5, r6, r7 } + { st1 r25, r26 ; shl3add r5, r6, r7 ; cmplts r15, r16, r17 } + { st1 r25, r26 ; shl3addx r15, r16, r17 ; addxi r5, r6, 5 } + { st1 r25, r26 ; shl3addx r15, r16, r17 ; shl r5, r6, r7 } + { st1 r25, r26 ; shl3addx r5, r6, r7 ; jrp r15 } + { st1 r25, r26 ; shli r15, r16, 5 ; cmplts r5, r6, r7 } + { st1 r25, r26 ; shli r15, r16, 5 ; shru r5, r6, r7 } + { st1 r25, r26 ; shli r5, r6, 5 ; rotli r15, r16, 5 } + { st1 r25, r26 ; shrs r15, r16, r17 ; movei r5, 5 } + { st1 r25, r26 ; shrs r5, r6, r7 ; add r15, r16, r17 } + { st1 r25, r26 ; shrs r5, r6, r7 ; shrsi r15, r16, 5 } + { st1 r25, r26 ; shrsi r15, r16, 5 ; mulx r5, r6, r7 } + { st1 r25, r26 ; shrsi r5, r6, 5 ; cmplts r15, r16, r17 } + { st1 r25, r26 ; shru r15, r16, r17 ; addxi r5, r6, 5 } + { st1 r25, r26 ; shru r15, r16, r17 ; shl r5, r6, r7 } + { st1 r25, r26 ; shru r5, r6, r7 ; jrp r15 } + { st1 r25, r26 ; shrui r15, r16, 5 ; cmplts r5, r6, r7 } + { st1 r25, r26 ; shrui r15, r16, 5 ; shru r5, r6, r7 } + { st1 r25, r26 ; shrui r5, r6, 5 ; rotli r15, r16, 5 } + { st1 r25, r26 ; sub r15, r16, r17 ; movei r5, 5 } + { st1 r25, r26 ; sub r5, r6, r7 ; add r15, r16, r17 } + { st1 r25, r26 ; sub r5, r6, r7 ; shrsi r15, r16, 5 } + { st1 r25, r26 ; subx r15, r16, r17 ; mulx r5, r6, r7 } + { st1 r25, r26 ; subx r5, r6, r7 ; cmplts r15, r16, r17 } + { st1 r25, r26 ; tblidxb0 r5, r6 ; addxi r15, r16, 5 } + { st1 r25, r26 ; tblidxb0 r5, r6 ; sub r15, r16, r17 } + { st1 r25, r26 ; tblidxb1 r5, r6 ; shl3add r15, r16, r17 } + { st1 r25, r26 ; tblidxb2 r5, r6 ; rotl r15, r16, r17 } + { st1 r25, r26 ; tblidxb3 r5, r6 ; mnz r15, r16, r17 } + { st1 r25, r26 ; xor r15, r16, r17 ; cmpltu r5, r6, r7 } + { st1 r25, r26 ; xor r15, r16, r17 ; sub r5, r6, r7 } + { st1 r25, r26 ; xor r5, r6, r7 ; shl1add r15, r16, r17 } + { st1_add r15, r16, 5 ; cmula r5, r6, r7 } + { st1_add r15, r16, 5 ; mul_hu_hu r5, r6, r7 } + { st1_add r15, r16, 5 ; shrsi r5, r6, 5 } + { st1_add r15, r16, 5 ; v1maxui r5, r6, 5 } + { st1_add r15, r16, 5 ; v2mnz r5, r6, r7 } + { st2 r15, r16 ; addxsc r5, r6, r7 } + { st2 r15, r16 ; fnop } + { st2 r15, r16 ; or r5, r6, r7 } + { st2 r15, r16 ; v1cmpleu r5, r6, r7 } + { st2 r15, r16 ; v2adiffs r5, r6, r7 } + { st2 r15, r16 ; v4add r5, r6, r7 } + { st2 r25, r26 ; add r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { st2 r25, r26 ; add r5, r6, r7 ; and r15, r16, r17 } + { st2 r25, r26 ; add r5, r6, r7 ; subx r15, r16, r17 } + { st2 r25, r26 ; addi r15, r16, 5 ; or r5, r6, r7 } + { st2 r25, r26 ; addi r5, r6, 5 ; fnop } + { st2 r25, r26 ; addx r15, r16, r17 ; cmoveqz r5, r6, r7 } + { st2 r25, r26 ; addx r15, r16, r17 ; shl2addx r5, r6, r7 } + { st2 r25, r26 ; addx r5, r6, r7 ; movei r15, 5 } + { st2 r25, r26 ; addxi r15, r16, 5 ; ctz r5, r6 } + { st2 r25, r26 ; addxi r15, r16, 5 ; tblidxb0 r5, r6 } + { st2 r25, r26 ; addxi r5, r6, 5 ; shl2add r15, r16, r17 } + { st2 r25, r26 ; and r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { st2 r25, r26 ; and r5, r6, r7 ; and r15, r16, r17 } + { st2 r25, r26 ; and r5, r6, r7 ; subx r15, r16, r17 } + { st2 r25, r26 ; andi r15, r16, 5 ; or r5, r6, r7 } + { st2 r25, r26 ; andi r5, r6, 5 ; fnop } + { st2 r25, r26 ; clz r5, r6 ; cmpeqi r15, r16, 5 } + { st2 r25, r26 ; cmoveqz r5, r6, r7 ; add r15, r16, r17 } + { st2 r25, r26 ; cmoveqz r5, r6, r7 ; shrsi r15, r16, 5 } + { st2 r25, r26 ; cmovnez r5, r6, r7 ; shl1addx r15, r16, r17 } + { st2 r25, r26 ; cmpeq r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { st2 r25, r26 ; cmpeq r5, r6, r7 ; addxi r15, r16, 5 } + { st2 r25, r26 ; cmpeq r5, r6, r7 ; sub r15, r16, r17 } + { st2 r25, r26 ; cmpeqi r15, r16, 5 ; nor r5, r6, r7 } + { st2 r25, r26 ; cmpeqi r5, r6, 5 ; cmpne r15, r16, r17 } + { st2 r25, r26 ; cmples r15, r16, r17 ; clz r5, r6 } + { st2 r25, r26 ; cmples r15, r16, r17 ; shl2add r5, r6, r7 } + { st2 r25, r26 ; cmples r5, r6, r7 ; move r15, r16 } + { st2 r25, r26 ; cmpleu r15, r16, r17 ; cmpne r5, r6, r7 } + { st2 r25, r26 ; cmpleu r15, r16, r17 ; subx r5, r6, r7 } + { st2 r25, r26 ; cmpleu r5, r6, r7 ; shl1addx r15, r16, r17 } + { st2 r25, r26 ; cmplts r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { st2 r25, r26 ; cmplts r5, r6, r7 ; addxi r15, r16, 5 } + { st2 r25, r26 ; cmplts r5, r6, r7 ; sub r15, r16, r17 } + { st2 r25, r26 ; cmpltsi r15, r16, 5 ; nor r5, r6, r7 } + { st2 r25, r26 ; cmpltsi r5, r6, 5 ; cmpne r15, r16, r17 } + { st2 r25, r26 ; cmpltu r15, r16, r17 ; clz r5, r6 } + { st2 r25, r26 ; cmpltu r15, r16, r17 ; shl2add r5, r6, r7 } + { st2 r25, r26 ; cmpltu r5, r6, r7 ; move r15, r16 } + { st2 r25, r26 ; cmpne r15, r16, r17 ; cmpne r5, r6, r7 } + { st2 r25, r26 ; cmpne r15, r16, r17 ; subx r5, r6, r7 } + { st2 r25, r26 ; cmpne r5, r6, r7 ; shl1addx r15, r16, r17 } + { st2 r25, r26 ; ctz r5, r6 ; nop } + { st2 r25, r26 ; fnop ; cmples r15, r16, r17 } + { st2 r25, r26 ; fnop ; nop } + { st2 r25, r26 ; fnop ; tblidxb0 r5, r6 } + { st2 r25, r26 ; fsingle_pack1 r5, r6 ; shl1addx r15, r16, r17 } + { st2 r25, r26 ; ill ; mul_ls_ls r5, r6, r7 } + { st2 r25, r26 ; info 19 ; addi r5, r6, 5 } + { st2 r25, r26 ; info 19 ; move r15, r16 } + { st2 r25, r26 ; info 19 ; shl3addx r15, r16, r17 } + { st2 r25, r26 ; jalr r15 ; ctz r5, r6 } + { st2 r25, r26 ; jalr r15 ; tblidxb0 r5, r6 } + { st2 r25, r26 ; jalrp r15 ; mz r5, r6, r7 } + { st2 r25, r26 ; jr r15 ; cmples r5, r6, r7 } + { st2 r25, r26 ; jr r15 ; shrs r5, r6, r7 } + { st2 r25, r26 ; jrp r15 ; mula_hs_hs r5, r6, r7 } + { st2 r25, r26 ; lnk r15 ; andi r5, r6, 5 } + { st2 r25, r26 ; lnk r15 ; shl1addx r5, r6, r7 } + { st2 r25, r26 ; mnz r15, r16, r17 ; move r5, r6 } + { st2 r25, r26 ; mnz r15, r16, r17 } + { st2 r25, r26 ; mnz r5, r6, r7 ; shrs r15, r16, r17 } + { st2 r25, r26 ; move r15, r16 ; mulax r5, r6, r7 } + { st2 r25, r26 ; move r5, r6 ; cmpleu r15, r16, r17 } + { st2 r25, r26 ; movei r15, 5 ; addx r5, r6, r7 } + { st2 r25, r26 ; movei r15, 5 ; rotli r5, r6, 5 } + { st2 r25, r26 ; movei r5, 5 ; jr r15 } + { st2 r25, r26 ; mul_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 } + { st2 r25, r26 ; mul_hu_hu r5, r6, r7 ; andi r15, r16, 5 } + { st2 r25, r26 ; mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 } + { st2 r25, r26 ; mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 } + { st2 r25, r26 ; mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 } + { st2 r25, r26 ; mula_hs_hs r5, r6, r7 ; movei r15, 5 } + { st2 r25, r26 ; mula_hu_hu r5, r6, r7 ; jalr r15 } + { st2 r25, r26 ; mula_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 } + { st2 r25, r26 ; mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 } + { st2 r25, r26 ; mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 } + { st2 r25, r26 ; mulax r5, r6, r7 ; shl3add r15, r16, r17 } + { st2 r25, r26 ; mulx r5, r6, r7 ; rotl r15, r16, r17 } + { st2 r25, r26 ; mz r15, r16, r17 ; move r5, r6 } + { st2 r25, r26 ; mz r15, r16, r17 } + { st2 r25, r26 ; mz r5, r6, r7 ; shrs r15, r16, r17 } + { st2 r25, r26 ; nop ; fnop } + { st2 r25, r26 ; nop ; shl r5, r6, r7 } + { st2 r25, r26 ; nor r15, r16, r17 ; clz r5, r6 } + { st2 r25, r26 ; nor r15, r16, r17 ; shl2add r5, r6, r7 } + { st2 r25, r26 ; nor r5, r6, r7 ; move r15, r16 } + { st2 r25, r26 ; or r15, r16, r17 ; cmpne r5, r6, r7 } + { st2 r25, r26 ; or r15, r16, r17 ; subx r5, r6, r7 } + { st2 r25, r26 ; or r5, r6, r7 ; shl1addx r15, r16, r17 } + { st2 r25, r26 ; pcnt r5, r6 ; nop } + { st2 r25, r26 ; revbits r5, r6 ; jr r15 } + { st2 r25, r26 ; revbytes r5, r6 ; cmpltu r15, r16, r17 } + { st2 r25, r26 ; rotl r15, r16, r17 ; andi r5, r6, 5 } + { st2 r25, r26 ; rotl r15, r16, r17 ; shl1addx r5, r6, r7 } + { st2 r25, r26 ; rotl r5, r6, r7 ; mnz r15, r16, r17 } + { st2 r25, r26 ; rotli r15, r16, 5 ; cmpltu r5, r6, r7 } + { st2 r25, r26 ; rotli r15, r16, 5 ; sub r5, r6, r7 } + { st2 r25, r26 ; rotli r5, r6, 5 ; shl1add r15, r16, r17 } + { st2 r25, r26 ; shl r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { st2 r25, r26 ; shl r5, r6, r7 ; addx r15, r16, r17 } + { st2 r25, r26 ; shl r5, r6, r7 ; shrui r15, r16, 5 } + { st2 r25, r26 ; shl1add r15, r16, r17 ; nop } + { st2 r25, r26 ; shl1add r5, r6, r7 ; cmpltu r15, r16, r17 } + { st2 r25, r26 ; shl1addx r15, r16, r17 ; andi r5, r6, 5 } + { st2 r25, r26 ; shl1addx r15, r16, r17 ; shl1addx r5, r6, r7 } + { st2 r25, r26 ; shl1addx r5, r6, r7 ; mnz r15, r16, r17 } + { st2 r25, r26 ; shl2add r15, r16, r17 ; cmpltu r5, r6, r7 } + { st2 r25, r26 ; shl2add r15, r16, r17 ; sub r5, r6, r7 } + { st2 r25, r26 ; shl2add r5, r6, r7 ; shl1add r15, r16, r17 } + { st2 r25, r26 ; shl2addx r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { st2 r25, r26 ; shl2addx r5, r6, r7 ; addx r15, r16, r17 } + { st2 r25, r26 ; shl2addx r5, r6, r7 ; shrui r15, r16, 5 } + { st2 r25, r26 ; shl3add r15, r16, r17 ; nop } + { st2 r25, r26 ; shl3add r5, r6, r7 ; cmpltu r15, r16, r17 } + { st2 r25, r26 ; shl3addx r15, r16, r17 ; andi r5, r6, 5 } + { st2 r25, r26 ; shl3addx r15, r16, r17 ; shl1addx r5, r6, r7 } + { st2 r25, r26 ; shl3addx r5, r6, r7 ; mnz r15, r16, r17 } + { st2 r25, r26 ; shli r15, r16, 5 ; cmpltu r5, r6, r7 } + { st2 r25, r26 ; shli r15, r16, 5 ; sub r5, r6, r7 } + { st2 r25, r26 ; shli r5, r6, 5 ; shl1add r15, r16, r17 } + { st2 r25, r26 ; shrs r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { st2 r25, r26 ; shrs r5, r6, r7 ; addx r15, r16, r17 } + { st2 r25, r26 ; shrs r5, r6, r7 ; shrui r15, r16, 5 } + { st2 r25, r26 ; shrsi r15, r16, 5 ; nop } + { st2 r25, r26 ; shrsi r5, r6, 5 ; cmpltu r15, r16, r17 } + { st2 r25, r26 ; shru r15, r16, r17 ; andi r5, r6, 5 } + { st2 r25, r26 ; shru r15, r16, r17 ; shl1addx r5, r6, r7 } + { st2 r25, r26 ; shru r5, r6, r7 ; mnz r15, r16, r17 } + { st2 r25, r26 ; shrui r15, r16, 5 ; cmpltu r5, r6, r7 } + { st2 r25, r26 ; shrui r15, r16, 5 ; sub r5, r6, r7 } + { st2 r25, r26 ; shrui r5, r6, 5 ; shl1add r15, r16, r17 } + { st2 r25, r26 ; sub r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { st2 r25, r26 ; sub r5, r6, r7 ; addx r15, r16, r17 } + { st2 r25, r26 ; sub r5, r6, r7 ; shrui r15, r16, 5 } + { st2 r25, r26 ; subx r15, r16, r17 ; nop } + { st2 r25, r26 ; subx r5, r6, r7 ; cmpltu r15, r16, r17 } + { st2 r25, r26 ; tblidxb0 r5, r6 ; andi r15, r16, 5 } + { st2 r25, r26 ; tblidxb0 r5, r6 ; xor r15, r16, r17 } + { st2 r25, r26 ; tblidxb1 r5, r6 ; shli r15, r16, 5 } + { st2 r25, r26 ; tblidxb2 r5, r6 ; shl r15, r16, r17 } + { st2 r25, r26 ; tblidxb3 r5, r6 ; movei r15, 5 } + { st2 r25, r26 ; xor r15, r16, r17 ; ctz r5, r6 } + { st2 r25, r26 ; xor r15, r16, r17 ; tblidxb0 r5, r6 } + { st2 r25, r26 ; xor r5, r6, r7 ; shl2add r15, r16, r17 } + { st2_add r15, r16, 5 ; cmulf r5, r6, r7 } + { st2_add r15, r16, 5 ; mul_hu_lu r5, r6, r7 } + { st2_add r15, r16, 5 ; shrui r5, r6, 5 } + { st2_add r15, r16, 5 ; v1minui r5, r6, 5 } + { st2_add r15, r16, 5 ; v2muls r5, r6, r7 } + { st4 r15, r16 ; andi r5, r6, 5 } + { st4 r15, r16 ; fsingle_addsub2 r5, r6, r7 } + { st4 r15, r16 ; pcnt r5, r6 } + { st4 r15, r16 ; v1cmpltsi r5, r6, 5 } + { st4 r15, r16 ; v2cmpeq r5, r6, r7 } + { st4 r15, r16 ; v4int_h r5, r6, r7 } + { st4 r25, r26 ; add r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { st4 r25, r26 ; add r5, r6, r7 ; cmpeq r15, r16, r17 } + { st4 r25, r26 ; add r5, r6, r7 } + { st4 r25, r26 ; addi r15, r16, 5 ; revbits r5, r6 } + { st4 r25, r26 ; addi r5, r6, 5 ; info 19 } + { st4 r25, r26 ; addx r15, r16, r17 ; cmpeq r5, r6, r7 } + { st4 r25, r26 ; addx r15, r16, r17 ; shl3addx r5, r6, r7 } + { st4 r25, r26 ; addx r5, r6, r7 ; nop } + { st4 r25, r26 ; addxi r15, r16, 5 ; fsingle_pack1 r5, r6 } + { st4 r25, r26 ; addxi r15, r16, 5 ; tblidxb2 r5, r6 } + { st4 r25, r26 ; addxi r5, r6, 5 ; shl3add r15, r16, r17 } + { st4 r25, r26 ; and r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { st4 r25, r26 ; and r5, r6, r7 ; cmpeq r15, r16, r17 } + { st4 r25, r26 ; and r5, r6, r7 } + { st4 r25, r26 ; andi r15, r16, 5 ; revbits r5, r6 } + { st4 r25, r26 ; andi r5, r6, 5 ; info 19 } + { st4 r25, r26 ; clz r5, r6 ; cmpleu r15, r16, r17 } + { st4 r25, r26 ; cmoveqz r5, r6, r7 ; addx r15, r16, r17 } + { st4 r25, r26 ; cmoveqz r5, r6, r7 ; shrui r15, r16, 5 } + { st4 r25, r26 ; cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 } + { st4 r25, r26 ; cmpeq r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { st4 r25, r26 ; cmpeq r5, r6, r7 ; andi r15, r16, 5 } + { st4 r25, r26 ; cmpeq r5, r6, r7 ; xor r15, r16, r17 } + { st4 r25, r26 ; cmpeqi r15, r16, 5 ; pcnt r5, r6 } + { st4 r25, r26 ; cmpeqi r5, r6, 5 ; ill } + { st4 r25, r26 ; cmples r15, r16, r17 ; cmovnez r5, r6, r7 } + { st4 r25, r26 ; cmples r15, r16, r17 ; shl3add r5, r6, r7 } + { st4 r25, r26 ; cmples r5, r6, r7 ; mz r15, r16, r17 } + { st4 r25, r26 ; cmpleu r15, r16, r17 ; fnop } + { st4 r25, r26 ; cmpleu r15, r16, r17 ; tblidxb1 r5, r6 } + { st4 r25, r26 ; cmpleu r5, r6, r7 ; shl2addx r15, r16, r17 } + { st4 r25, r26 ; cmplts r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { st4 r25, r26 ; cmplts r5, r6, r7 ; andi r15, r16, 5 } + { st4 r25, r26 ; cmplts r5, r6, r7 ; xor r15, r16, r17 } + { st4 r25, r26 ; cmpltsi r15, r16, 5 ; pcnt r5, r6 } + { st4 r25, r26 ; cmpltsi r5, r6, 5 ; ill } + { st4 r25, r26 ; cmpltu r15, r16, r17 ; cmovnez r5, r6, r7 } + { st4 r25, r26 ; cmpltu r15, r16, r17 ; shl3add r5, r6, r7 } + { st4 r25, r26 ; cmpltu r5, r6, r7 ; mz r15, r16, r17 } + { st4 r25, r26 ; cmpne r15, r16, r17 ; fnop } + { st4 r25, r26 ; cmpne r15, r16, r17 ; tblidxb1 r5, r6 } + { st4 r25, r26 ; cmpne r5, r6, r7 ; shl2addx r15, r16, r17 } + { st4 r25, r26 ; ctz r5, r6 ; or r15, r16, r17 } + { st4 r25, r26 ; fnop ; cmpleu r15, r16, r17 } + { st4 r25, r26 ; fnop ; nor r5, r6, r7 } + { st4 r25, r26 ; fnop ; tblidxb2 r5, r6 } + { st4 r25, r26 ; fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 } + { st4 r25, r26 ; ill ; mula_hs_hs r5, r6, r7 } + { st4 r25, r26 ; info 19 ; addx r5, r6, r7 } + { st4 r25, r26 ; info 19 ; movei r15, 5 } + { st4 r25, r26 ; info 19 ; shli r15, r16, 5 } + { st4 r25, r26 ; jalr r15 ; fsingle_pack1 r5, r6 } + { st4 r25, r26 ; jalr r15 ; tblidxb2 r5, r6 } + { st4 r25, r26 ; jalrp r15 ; nor r5, r6, r7 } + { st4 r25, r26 ; jr r15 ; cmplts r5, r6, r7 } + { st4 r25, r26 ; jr r15 ; shru r5, r6, r7 } + { st4 r25, r26 ; jrp r15 ; mula_ls_ls r5, r6, r7 } + { st4 r25, r26 ; lnk r15 ; cmoveqz r5, r6, r7 } + { st4 r25, r26 ; lnk r15 ; shl2addx r5, r6, r7 } + { st4 r25, r26 ; mnz r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { st4 r25, r26 ; mnz r5, r6, r7 ; addi r15, r16, 5 } + { st4 r25, r26 ; mnz r5, r6, r7 ; shru r15, r16, r17 } + { st4 r25, r26 ; move r15, r16 ; mz r5, r6, r7 } + { st4 r25, r26 ; move r5, r6 ; cmpltsi r15, r16, 5 } + { st4 r25, r26 ; movei r15, 5 ; and r5, r6, r7 } + { st4 r25, r26 ; movei r15, 5 ; shl1add r5, r6, r7 } + { st4 r25, r26 ; movei r5, 5 ; lnk r15 } + { st4 r25, r26 ; mul_hs_hs r5, r6, r7 ; fnop } + { st4 r25, r26 ; mul_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 } + { st4 r25, r26 ; mul_ls_ls r5, r6, r7 ; add r15, r16, r17 } + { st4 r25, r26 ; mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 } + { st4 r25, r26 ; mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 } + { st4 r25, r26 ; mula_hs_hs r5, r6, r7 ; nop } + { st4 r25, r26 ; mula_hu_hu r5, r6, r7 ; jr r15 } + { st4 r25, r26 ; mula_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 } + { st4 r25, r26 ; mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 } + { st4 r25, r26 ; mula_lu_lu r5, r6, r7 ; xor r15, r16, r17 } + { st4 r25, r26 ; mulax r5, r6, r7 ; shli r15, r16, 5 } + { st4 r25, r26 ; mulx r5, r6, r7 ; shl r15, r16, r17 } + { st4 r25, r26 ; mz r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { st4 r25, r26 ; mz r5, r6, r7 ; addi r15, r16, 5 } + { st4 r25, r26 ; mz r5, r6, r7 ; shru r15, r16, r17 } + { st4 r25, r26 ; nop ; ill } + { st4 r25, r26 ; nop ; shl1add r5, r6, r7 } + { st4 r25, r26 ; nor r15, r16, r17 ; cmovnez r5, r6, r7 } + { st4 r25, r26 ; nor r15, r16, r17 ; shl3add r5, r6, r7 } + { st4 r25, r26 ; nor r5, r6, r7 ; mz r15, r16, r17 } + { st4 r25, r26 ; or r15, r16, r17 ; fnop } + { st4 r25, r26 ; or r15, r16, r17 ; tblidxb1 r5, r6 } + { st4 r25, r26 ; or r5, r6, r7 ; shl2addx r15, r16, r17 } + { st4 r25, r26 ; pcnt r5, r6 ; or r15, r16, r17 } + { st4 r25, r26 ; revbits r5, r6 ; lnk r15 } + { st4 r25, r26 ; revbytes r5, r6 ; fnop } + { st4 r25, r26 ; rotl r15, r16, r17 ; cmoveqz r5, r6, r7 } + { st4 r25, r26 ; rotl r15, r16, r17 ; shl2addx r5, r6, r7 } + { st4 r25, r26 ; rotl r5, r6, r7 ; movei r15, 5 } + { st4 r25, r26 ; rotli r15, r16, 5 ; ctz r5, r6 } + { st4 r25, r26 ; rotli r15, r16, 5 ; tblidxb0 r5, r6 } + { st4 r25, r26 ; rotli r5, r6, 5 ; shl2add r15, r16, r17 } + { st4 r25, r26 ; shl r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { st4 r25, r26 ; shl r5, r6, r7 ; and r15, r16, r17 } + { st4 r25, r26 ; shl r5, r6, r7 ; subx r15, r16, r17 } + { st4 r25, r26 ; shl1add r15, r16, r17 ; or r5, r6, r7 } + { st4 r25, r26 ; shl1add r5, r6, r7 ; fnop } + { st4 r25, r26 ; shl1addx r15, r16, r17 ; cmoveqz r5, r6, r7 } + { st4 r25, r26 ; shl1addx r15, r16, r17 ; shl2addx r5, r6, r7 } + { st4 r25, r26 ; shl1addx r5, r6, r7 ; movei r15, 5 } + { st4 r25, r26 ; shl2add r15, r16, r17 ; ctz r5, r6 } + { st4 r25, r26 ; shl2add r15, r16, r17 ; tblidxb0 r5, r6 } + { st4 r25, r26 ; shl2add r5, r6, r7 ; shl2add r15, r16, r17 } + { st4 r25, r26 ; shl2addx r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { st4 r25, r26 ; shl2addx r5, r6, r7 ; and r15, r16, r17 } + { st4 r25, r26 ; shl2addx r5, r6, r7 ; subx r15, r16, r17 } + { st4 r25, r26 ; shl3add r15, r16, r17 ; or r5, r6, r7 } + { st4 r25, r26 ; shl3add r5, r6, r7 ; fnop } + { st4 r25, r26 ; shl3addx r15, r16, r17 ; cmoveqz r5, r6, r7 } + { st4 r25, r26 ; shl3addx r15, r16, r17 ; shl2addx r5, r6, r7 } + { st4 r25, r26 ; shl3addx r5, r6, r7 ; movei r15, 5 } + { st4 r25, r26 ; shli r15, r16, 5 ; ctz r5, r6 } + { st4 r25, r26 ; shli r15, r16, 5 ; tblidxb0 r5, r6 } + { st4 r25, r26 ; shli r5, r6, 5 ; shl2add r15, r16, r17 } + { st4 r25, r26 ; shrs r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { st4 r25, r26 ; shrs r5, r6, r7 ; and r15, r16, r17 } + { st4 r25, r26 ; shrs r5, r6, r7 ; subx r15, r16, r17 } + { st4 r25, r26 ; shrsi r15, r16, 5 ; or r5, r6, r7 } + { st4 r25, r26 ; shrsi r5, r6, 5 ; fnop } + { st4 r25, r26 ; shru r15, r16, r17 ; cmoveqz r5, r6, r7 } + { st4 r25, r26 ; shru r15, r16, r17 ; shl2addx r5, r6, r7 } + { st4 r25, r26 ; shru r5, r6, r7 ; movei r15, 5 } + { st4 r25, r26 ; shrui r15, r16, 5 ; ctz r5, r6 } + { st4 r25, r26 ; shrui r15, r16, 5 ; tblidxb0 r5, r6 } + { st4 r25, r26 ; shrui r5, r6, 5 ; shl2add r15, r16, r17 } + { st4 r25, r26 ; sub r15, r16, r17 ; mul_lu_lu r5, r6, r7 } + { st4 r25, r26 ; sub r5, r6, r7 ; and r15, r16, r17 } + { st4 r25, r26 ; sub r5, r6, r7 ; subx r15, r16, r17 } + { st4 r25, r26 ; subx r15, r16, r17 ; or r5, r6, r7 } + { st4 r25, r26 ; subx r5, r6, r7 ; fnop } + { st4 r25, r26 ; tblidxb0 r5, r6 ; cmpeqi r15, r16, 5 } + { st4 r25, r26 ; tblidxb1 r5, r6 ; add r15, r16, r17 } + { st4 r25, r26 ; tblidxb1 r5, r6 ; shrsi r15, r16, 5 } + { st4 r25, r26 ; tblidxb2 r5, r6 ; shl1addx r15, r16, r17 } + { st4 r25, r26 ; tblidxb3 r5, r6 ; nop } + { st4 r25, r26 ; xor r15, r16, r17 ; fsingle_pack1 r5, r6 } + { st4 r25, r26 ; xor r15, r16, r17 ; tblidxb2 r5, r6 } + { st4 r25, r26 ; xor r5, r6, r7 ; shl3add r15, r16, r17 } + { st4_add r15, r16, 5 ; cmulh r5, r6, r7 } + { st4_add r15, r16, 5 ; mul_ls_lu r5, r6, r7 } + { st4_add r15, r16, 5 ; shruxi r5, r6, 5 } + { st4_add r15, r16, 5 ; v1multu r5, r6, r7 } + { st4_add r15, r16, 5 ; v2mz r5, r6, r7 } + { st_add r15, r16, 5 ; bfextu r5, r6, 5, 7 } + { st_add r15, r16, 5 ; fsingle_mul2 r5, r6, r7 } + { st_add r15, r16, 5 ; revbytes r5, r6 } + { st_add r15, r16, 5 ; v1cmpltui r5, r6, 5 } + { st_add r15, r16, 5 ; v2cmples r5, r6, r7 } + { st_add r15, r16, 5 ; v4packsc r5, r6, r7 } + { stnt r15, r16 ; crc32_32 r5, r6, r7 } + { stnt r15, r16 ; mula_hs_hs r5, r6, r7 } + { stnt r15, r16 ; sub r5, r6, r7 } + { stnt r15, r16 ; v1mulus r5, r6, r7 } + { stnt r15, r16 ; v2packl r5, r6, r7 } + { stnt1 r15, r16 ; clz r5, r6 } + { stnt1 r15, r16 ; fsingle_pack2 r5, r6, r7 } + { stnt1 r15, r16 ; rotli r5, r6, 5 } + { stnt1 r15, r16 ; v1ddotpu r5, r6, r7 } + { stnt1 r15, r16 ; v2cmplts r5, r6, r7 } + { stnt1 r15, r16 ; v4shlsc r5, r6, r7 } + { stnt1_add r15, r16, 5 ; ctz r5, r6 } + { stnt1_add r15, r16, 5 ; mula_hs_ls r5, r6, r7 } + { stnt1_add r15, r16, 5 ; subxsc r5, r6, r7 } + { stnt1_add r15, r16, 5 ; v1sadau r5, r6, r7 } + { stnt1_add r15, r16, 5 ; v2sadas r5, r6, r7 } + { stnt2 r15, r16 ; cmovnez r5, r6, r7 } + { stnt2 r15, r16 ; info 19 } + { stnt2 r15, r16 ; shl16insli r5, r6, 0x1234 } + { stnt2 r15, r16 ; v1ddotpus r5, r6, r7 } + { stnt2 r15, r16 ; v2cmpltu r5, r6, r7 } + { stnt2 r15, r16 ; v4shru r5, r6, r7 } + { stnt2_add r15, r16, 5 ; dblalign2 r5, r6, r7 } + { stnt2_add r15, r16, 5 ; mula_hu_hu r5, r6, r7 } + { stnt2_add r15, r16, 5 ; tblidxb1 r5, r6 } + { stnt2_add r15, r16, 5 ; v1shl r5, r6, r7 } + { stnt2_add r15, r16, 5 ; v2sads r5, r6, r7 } + { stnt4 r15, r16 ; cmpeqi r5, r6, 5 } + { stnt4 r15, r16 ; mm r5, r6, 5, 7 } + { stnt4 r15, r16 ; shl1addx r5, r6, r7 } + { stnt4 r15, r16 ; v1dotp r5, r6, r7 } + { stnt4 r15, r16 ; v2cmpne r5, r6, r7 } + { stnt4 r15, r16 ; v4subsc r5, r6, r7 } + { stnt4_add r15, r16, 5 ; dblalign6 r5, r6, r7 } + { stnt4_add r15, r16, 5 ; mula_hu_lu r5, r6, r7 } + { stnt4_add r15, r16, 5 ; tblidxb3 r5, r6 } + { stnt4_add r15, r16, 5 ; v1shrs r5, r6, r7 } + { stnt4_add r15, r16, 5 ; v2shl r5, r6, r7 } + { stnt_add r15, r16, 5 ; cmpleu r5, r6, r7 } + { stnt_add r15, r16, 5 ; move r5, r6 } + { stnt_add r15, r16, 5 ; shl2addx r5, r6, r7 } + { stnt_add r15, r16, 5 ; v1dotpu r5, r6, r7 } + { stnt_add r15, r16, 5 ; v2dotpa r5, r6, r7 } + { stnt_add r15, r16, 5 ; xori r5, r6, 5 } + { sub r15, r16, r17 ; addx r5, r6, r7 ; ld r25, r26 } + { sub r15, r16, r17 ; and r5, r6, r7 ; ld r25, r26 } + { sub r15, r16, r17 ; bfins r5, r6, 5, 7 } + { sub r15, r16, r17 ; cmovnez r5, r6, r7 ; ld1s r25, r26 } + { sub r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 } + { sub r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4s r25, r26 } + { sub r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 } + { sub r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l1 r25 } + { sub r15, r16, r17 ; dblalign2 r5, r6, r7 } + { sub r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld4u r25, r26 } + { sub r15, r16, r17 ; ld r25, r26 ; andi r5, r6, 5 } + { sub r15, r16, r17 ; ld r25, r26 ; shl1addx r5, r6, r7 } + { sub r15, r16, r17 ; ld1s r25, r26 ; move r5, r6 } + { sub r15, r16, r17 ; ld1s r25, r26 } + { sub r15, r16, r17 ; ld1u r25, r26 ; revbits r5, r6 } + { sub r15, r16, r17 ; ld2s r25, r26 ; cmpne r5, r6, r7 } + { sub r15, r16, r17 ; ld2s r25, r26 ; subx r5, r6, r7 } + { sub r15, r16, r17 ; ld2u r25, r26 ; mulx r5, r6, r7 } + { sub r15, r16, r17 ; ld4s r25, r26 ; cmpeqi r5, r6, 5 } + { sub r15, r16, r17 ; ld4s r25, r26 ; shli r5, r6, 5 } + { sub r15, r16, r17 ; ld4u r25, r26 ; mul_lu_lu r5, r6, r7 } + { sub r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 } + { sub r15, r16, r17 ; movei r5, 5 ; ld4s r25, r26 } + { sub r15, r16, r17 ; mul_hu_hu r5, r6, r7 ; ld2s r25, r26 } + { sub r15, r16, r17 ; mul_lu_lu r5, r6, r7 ; ld1u r25, r26 } + { sub r15, r16, r17 ; mula_hu_hu r5, r6, r7 ; ld1s r25, r26 } + { sub r15, r16, r17 ; mula_lu_lu r5, r6, r7 ; ld r25, r26 } + { sub r15, r16, r17 ; mulx r5, r6, r7 ; ld1u r25, r26 } + { sub r15, r16, r17 ; nop ; ld2u r25, r26 } + { sub r15, r16, r17 ; or r5, r6, r7 ; ld4u r25, r26 } + { sub r15, r16, r17 ; prefetch r25 ; cmoveqz r5, r6, r7 } + { sub r15, r16, r17 ; prefetch r25 ; shl2addx r5, r6, r7 } + { sub r15, r16, r17 ; prefetch_l1 r25 ; mul_hs_hs r5, r6, r7 } + { sub r15, r16, r17 ; prefetch_l1_fault r25 ; addi r5, r6, 5 } + { sub r15, r16, r17 ; prefetch_l1_fault r25 ; rotl r5, r6, r7 } + { sub r15, r16, r17 ; prefetch_l2 r25 ; fnop } + { sub r15, r16, r17 ; prefetch_l2 r25 ; tblidxb1 r5, r6 } + { sub r15, r16, r17 ; prefetch_l2_fault r25 ; nop } + { sub r15, r16, r17 ; prefetch_l3 r25 ; cmpleu r5, r6, r7 } + { sub r15, r16, r17 ; prefetch_l3 r25 ; shrsi r5, r6, 5 } + { sub r15, r16, r17 ; prefetch_l3_fault r25 ; mula_hu_hu r5, r6, r7 } + { sub r15, r16, r17 ; revbits r5, r6 ; ld4u r25, r26 } + { sub r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l1 r25 } + { sub r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 } + { sub r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2_fault r25 } + { sub r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3_fault r25 } + { sub r15, r16, r17 ; shl3addx r5, r6, r7 ; st1 r25, r26 } + { sub r15, r16, r17 ; shrs r5, r6, r7 ; st1 r25, r26 } + { sub r15, r16, r17 ; shru r5, r6, r7 ; st4 r25, r26 } + { sub r15, r16, r17 ; st r25, r26 ; cmpne r5, r6, r7 } + { sub r15, r16, r17 ; st r25, r26 ; subx r5, r6, r7 } + { sub r15, r16, r17 ; st1 r25, r26 ; mulx r5, r6, r7 } + { sub r15, r16, r17 ; st2 r25, r26 ; cmpeqi r5, r6, 5 } + { sub r15, r16, r17 ; st2 r25, r26 ; shli r5, r6, 5 } + { sub r15, r16, r17 ; st4 r25, r26 ; mul_lu_lu r5, r6, r7 } + { sub r15, r16, r17 ; sub r5, r6, r7 ; ld2u r25, r26 } + { sub r15, r16, r17 ; tblidxb0 r5, r6 ; ld4s r25, r26 } + { sub r15, r16, r17 ; tblidxb2 r5, r6 ; prefetch r25 } + { sub r15, r16, r17 ; v1cmplts r5, r6, r7 } + { sub r15, r16, r17 ; v2avgs r5, r6, r7 } + { sub r15, r16, r17 ; v4addsc r5, r6, r7 } + { sub r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 } + { sub r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 } + { sub r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + { sub r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + { sub r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + { sub r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + { sub r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + { sub r5, r6, r7 ; fnop ; ld1s r25, r26 } + { sub r5, r6, r7 ; info 19 ; ld1u r25, r26 } + { sub r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 } + { sub r5, r6, r7 ; jrp r15 ; ld2s r25, r26 } + { sub r5, r6, r7 ; ld r25, r26 ; move r15, r16 } + { sub r5, r6, r7 ; ld1s r25, r26 ; ill } + { sub r5, r6, r7 ; ld1u r25, r26 ; cmpeq r15, r16, r17 } + { sub r5, r6, r7 ; ld1u r25, r26 } + { sub r5, r6, r7 ; ld2s r25, r26 ; shl3addx r15, r16, r17 } + { sub r5, r6, r7 ; ld2u r25, r26 ; or r15, r16, r17 } + { sub r5, r6, r7 ; ld4s r25, r26 ; jr r15 } + { sub r5, r6, r7 ; ld4u r25, r26 ; cmplts r15, r16, r17 } + { sub r5, r6, r7 ; ldna_add r15, r16, 5 } + { sub r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 } + { sub r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 } + { sub r5, r6, r7 ; nop ; ld4u r25, r26 } + { sub r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1 r25 } + { sub r5, r6, r7 ; prefetch r25 ; nor r15, r16, r17 } + { sub r5, r6, r7 ; prefetch_l1 r25 ; cmpne r15, r16, r17 } + { sub r5, r6, r7 ; prefetch_l1_fault r25 ; andi r15, r16, 5 } + { sub r5, r6, r7 ; prefetch_l1_fault r25 ; xor r15, r16, r17 } + { sub r5, r6, r7 ; prefetch_l2 r25 ; shl3addx r15, r16, r17 } + { sub r5, r6, r7 ; prefetch_l2_fault r25 ; rotl r15, r16, r17 } + { sub r5, r6, r7 ; prefetch_l3 r25 ; lnk r15 } + { sub r5, r6, r7 ; prefetch_l3_fault r25 ; cmpne r15, r16, r17 } + { sub r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 } + { sub r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + { sub r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1 r25 } + { sub r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 } + { sub r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 } + { sub r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3 r25 } + { sub r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 } + { sub r5, r6, r7 ; st r25, r26 ; cmpne r15, r16, r17 } + { sub r5, r6, r7 ; st1 r25, r26 ; andi r15, r16, 5 } + { sub r5, r6, r7 ; st1 r25, r26 ; xor r15, r16, r17 } + { sub r5, r6, r7 ; st2 r25, r26 ; shl3add r15, r16, r17 } + { sub r5, r6, r7 ; st4 r25, r26 ; nor r15, r16, r17 } + { sub r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 } + { sub r5, r6, r7 ; v1cmpne r15, r16, r17 } + { sub r5, r6, r7 ; v2shl r15, r16, r17 } + { sub r5, r6, r7 ; xori r15, r16, 5 } + { subx r15, r16, r17 ; addx r5, r6, r7 ; ld r25, r26 } + { subx r15, r16, r17 ; and r5, r6, r7 ; ld r25, r26 } + { subx r15, r16, r17 ; bfins r5, r6, 5, 7 } + { subx r15, r16, r17 ; cmovnez r5, r6, r7 ; ld1s r25, r26 } + { subx r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 } + { subx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4s r25, r26 } + { subx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 } + { subx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l1 r25 } + { subx r15, r16, r17 ; dblalign2 r5, r6, r7 } + { subx r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld4u r25, r26 } + { subx r15, r16, r17 ; ld r25, r26 ; andi r5, r6, 5 } + { subx r15, r16, r17 ; ld r25, r26 ; shl1addx r5, r6, r7 } + { subx r15, r16, r17 ; ld1s r25, r26 ; move r5, r6 } + { subx r15, r16, r17 ; ld1s r25, r26 } + { subx r15, r16, r17 ; ld1u r25, r26 ; revbits r5, r6 } + { subx r15, r16, r17 ; ld2s r25, r26 ; cmpne r5, r6, r7 } + { subx r15, r16, r17 ; ld2s r25, r26 ; subx r5, r6, r7 } + { subx r15, r16, r17 ; ld2u r25, r26 ; mulx r5, r6, r7 } + { subx r15, r16, r17 ; ld4s r25, r26 ; cmpeqi r5, r6, 5 } + { subx r15, r16, r17 ; ld4s r25, r26 ; shli r5, r6, 5 } + { subx r15, r16, r17 ; ld4u r25, r26 ; mul_lu_lu r5, r6, r7 } + { subx r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 } + { subx r15, r16, r17 ; movei r5, 5 ; ld4s r25, r26 } + { subx r15, r16, r17 ; mul_hu_hu r5, r6, r7 ; ld2s r25, r26 } + { subx r15, r16, r17 ; mul_lu_lu r5, r6, r7 ; ld1u r25, r26 } + { subx r15, r16, r17 ; mula_hu_hu r5, r6, r7 ; ld1s r25, r26 } + { subx r15, r16, r17 ; mula_lu_lu r5, r6, r7 ; ld r25, r26 } + { subx r15, r16, r17 ; mulx r5, r6, r7 ; ld1u r25, r26 } + { subx r15, r16, r17 ; nop ; ld2u r25, r26 } + { subx r15, r16, r17 ; or r5, r6, r7 ; ld4u r25, r26 } + { subx r15, r16, r17 ; prefetch r25 ; cmoveqz r5, r6, r7 } + { subx r15, r16, r17 ; prefetch r25 ; shl2addx r5, r6, r7 } + { subx r15, r16, r17 ; prefetch_l1 r25 ; mul_hs_hs r5, r6, r7 } + { subx r15, r16, r17 ; prefetch_l1_fault r25 ; addi r5, r6, 5 } + { subx r15, r16, r17 ; prefetch_l1_fault r25 ; rotl r5, r6, r7 } + { subx r15, r16, r17 ; prefetch_l2 r25 ; fnop } + { subx r15, r16, r17 ; prefetch_l2 r25 ; tblidxb1 r5, r6 } + { subx r15, r16, r17 ; prefetch_l2_fault r25 ; nop } + { subx r15, r16, r17 ; prefetch_l3 r25 ; cmpleu r5, r6, r7 } + { subx r15, r16, r17 ; prefetch_l3 r25 ; shrsi r5, r6, 5 } + { subx r15, r16, r17 ; prefetch_l3_fault r25 ; mula_hu_hu r5, r6, r7 } + { subx r15, r16, r17 ; revbits r5, r6 ; ld4u r25, r26 } + { subx r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l1 r25 } + { subx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 } + { subx r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2_fault r25 } + { subx r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3_fault r25 } + { subx r15, r16, r17 ; shl3addx r5, r6, r7 ; st1 r25, r26 } + { subx r15, r16, r17 ; shrs r5, r6, r7 ; st1 r25, r26 } + { subx r15, r16, r17 ; shru r5, r6, r7 ; st4 r25, r26 } + { subx r15, r16, r17 ; st r25, r26 ; cmpne r5, r6, r7 } + { subx r15, r16, r17 ; st r25, r26 ; subx r5, r6, r7 } + { subx r15, r16, r17 ; st1 r25, r26 ; mulx r5, r6, r7 } + { subx r15, r16, r17 ; st2 r25, r26 ; cmpeqi r5, r6, 5 } + { subx r15, r16, r17 ; st2 r25, r26 ; shli r5, r6, 5 } + { subx r15, r16, r17 ; st4 r25, r26 ; mul_lu_lu r5, r6, r7 } + { subx r15, r16, r17 ; sub r5, r6, r7 ; ld2u r25, r26 } + { subx r15, r16, r17 ; tblidxb0 r5, r6 ; ld4s r25, r26 } + { subx r15, r16, r17 ; tblidxb2 r5, r6 ; prefetch r25 } + { subx r15, r16, r17 ; v1cmplts r5, r6, r7 } + { subx r15, r16, r17 ; v2avgs r5, r6, r7 } + { subx r15, r16, r17 ; v4addsc r5, r6, r7 } + { subx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 } + { subx r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 } + { subx r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 } + { subx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 } + { subx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } + { subx r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 } + { subx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 } + { subx r5, r6, r7 ; fnop ; ld1s r25, r26 } + { subx r5, r6, r7 ; info 19 ; ld1u r25, r26 } + { subx r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 } + { subx r5, r6, r7 ; jrp r15 ; ld2s r25, r26 } + { subx r5, r6, r7 ; ld r25, r26 ; move r15, r16 } + { subx r5, r6, r7 ; ld1s r25, r26 ; ill } + { subx r5, r6, r7 ; ld1u r25, r26 ; cmpeq r15, r16, r17 } + { subx r5, r6, r7 ; ld1u r25, r26 } + { subx r5, r6, r7 ; ld2s r25, r26 ; shl3addx r15, r16, r17 } + { subx r5, r6, r7 ; ld2u r25, r26 ; or r15, r16, r17 } + { subx r5, r6, r7 ; ld4s r25, r26 ; jr r15 } + { subx r5, r6, r7 ; ld4u r25, r26 ; cmplts r15, r16, r17 } + { subx r5, r6, r7 ; ldna_add r15, r16, 5 } + { subx r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 } + { subx r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 } + { subx r5, r6, r7 ; nop ; ld4u r25, r26 } + { subx r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1 r25 } + { subx r5, r6, r7 ; prefetch r25 ; nor r15, r16, r17 } + { subx r5, r6, r7 ; prefetch_l1 r25 ; cmpne r15, r16, r17 } + { subx r5, r6, r7 ; prefetch_l1_fault r25 ; andi r15, r16, 5 } + { subx r5, r6, r7 ; prefetch_l1_fault r25 ; xor r15, r16, r17 } + { subx r5, r6, r7 ; prefetch_l2 r25 ; shl3addx r15, r16, r17 } + { subx r5, r6, r7 ; prefetch_l2_fault r25 ; rotl r15, r16, r17 } + { subx r5, r6, r7 ; prefetch_l3 r25 ; lnk r15 } + { subx r5, r6, r7 ; prefetch_l3_fault r25 ; cmpne r15, r16, r17 } + { subx r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 } + { subx r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + { subx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1 r25 } + { subx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 } + { subx r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 } + { subx r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3 r25 } + { subx r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 } + { subx r5, r6, r7 ; st r25, r26 ; cmpne r15, r16, r17 } + { subx r5, r6, r7 ; st1 r25, r26 ; andi r15, r16, 5 } + { subx r5, r6, r7 ; st1 r25, r26 ; xor r15, r16, r17 } + { subx r5, r6, r7 ; st2 r25, r26 ; shl3add r15, r16, r17 } + { subx r5, r6, r7 ; st4 r25, r26 ; nor r15, r16, r17 } + { subx r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 } + { subx r5, r6, r7 ; v1cmpne r15, r16, r17 } + { subx r5, r6, r7 ; v2shl r15, r16, r17 } + { subx r5, r6, r7 ; xori r15, r16, 5 } + { subxsc r15, r16, r17 ; fdouble_addsub r5, r6, r7 } + { subxsc r15, r16, r17 ; mula_ls_lu r5, r6, r7 } + { subxsc r15, r16, r17 ; v1addi r5, r6, 5 } + { subxsc r15, r16, r17 ; v1shru r5, r6, r7 } + { subxsc r15, r16, r17 ; v2shlsc r5, r6, r7 } + { subxsc r5, r6, r7 ; dblalign2 r15, r16, r17 } + { subxsc r5, r6, r7 ; ld4u_add r15, r16, 5 } + { subxsc r5, r6, r7 ; prefetch_l2 r15 } + { subxsc r5, r6, r7 ; sub r15, r16, r17 } + { subxsc r5, r6, r7 ; v2cmpltu r15, r16, r17 } + { swint3 ; nop } + { tblidxb0 r5, r6 ; addx r15, r16, r17 ; ld r25, r26 } + { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld r25, r26 } + { tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } + { tblidxb0 r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 } + { tblidxb0 r5, r6 ; cmplts r15, r16, r17 ; ld2u r25, r26 } + { tblidxb0 r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 } + { tblidxb0 r5, r6 ; fetchadd4 r15, r16, r17 } + { tblidxb0 r5, r6 ; ill ; prefetch_l2 r25 } + { tblidxb0 r5, r6 ; jalr r15 ; prefetch_l1_fault r25 } + { tblidxb0 r5, r6 ; jr r15 ; prefetch_l2_fault r25 } + { tblidxb0 r5, r6 ; ld r25, r26 ; cmpltu r15, r16, r17 } + { tblidxb0 r5, r6 ; ld1s r25, r26 ; and r15, r16, r17 } + { tblidxb0 r5, r6 ; ld1s r25, r26 ; subx r15, r16, r17 } + { tblidxb0 r5, r6 ; ld1u r25, r26 ; shl2addx r15, r16, r17 } + { tblidxb0 r5, r6 ; ld2s r25, r26 ; nop } + { tblidxb0 r5, r6 ; ld2u r25, r26 ; jalr r15 } + { tblidxb0 r5, r6 ; ld4s r25, r26 ; cmples r15, r16, r17 } + { tblidxb0 r5, r6 ; ld4u r15, r16 } + { tblidxb0 r5, r6 ; ld4u r25, r26 ; shrs r15, r16, r17 } + { tblidxb0 r5, r6 ; lnk r15 ; st r25, r26 } + { tblidxb0 r5, r6 ; move r15, r16 ; st r25, r26 } + { tblidxb0 r5, r6 ; mz r15, r16, r17 ; st r25, r26 } + { tblidxb0 r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 } + { tblidxb0 r5, r6 ; prefetch r25 ; info 19 } + { tblidxb0 r5, r6 ; prefetch_l1 r25 ; addx r15, r16, r17 } + { tblidxb0 r5, r6 ; prefetch_l1 r25 ; shrui r15, r16, 5 } + { tblidxb0 r5, r6 ; prefetch_l1_fault r25 ; shl2add r15, r16, r17 } + { tblidxb0 r5, r6 ; prefetch_l2 r25 ; nop } + { tblidxb0 r5, r6 ; prefetch_l2_fault r25 ; jalrp r15 } + { tblidxb0 r5, r6 ; prefetch_l3 r25 ; cmplts r15, r16, r17 } + { tblidxb0 r5, r6 ; prefetch_l3_fault r25 ; addx r15, r16, r17 } + { tblidxb0 r5, r6 ; prefetch_l3_fault r25 ; shrui r15, r16, 5 } + { tblidxb0 r5, r6 ; rotli r15, r16, 5 ; st1 r25, r26 } + { tblidxb0 r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 } + { tblidxb0 r5, r6 ; shl2add r15, r16, r17 } + { tblidxb0 r5, r6 ; shl3addx r15, r16, r17 ; ld1s r25, r26 } + { tblidxb0 r5, r6 ; shrs r15, r16, r17 ; ld1s r25, r26 } + { tblidxb0 r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 } + { tblidxb0 r5, r6 ; st r25, r26 ; addx r15, r16, r17 } + { tblidxb0 r5, r6 ; st r25, r26 ; shrui r15, r16, 5 } + { tblidxb0 r5, r6 ; st1 r25, r26 ; shl2add r15, r16, r17 } + { tblidxb0 r5, r6 ; st2 r25, r26 ; mz r15, r16, r17 } + { tblidxb0 r5, r6 ; st4 r25, r26 ; info 19 } + { tblidxb0 r5, r6 ; stnt_add r15, r16, 5 } + { tblidxb0 r5, r6 ; v1add r15, r16, r17 } + { tblidxb0 r5, r6 ; v2int_h r15, r16, r17 } + { tblidxb0 r5, r6 ; xor r15, r16, r17 ; prefetch_l1 r25 } + { tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } + { tblidxb1 r5, r6 ; addxi r15, r16, 5 ; prefetch_l2 r25 } + { tblidxb1 r5, r6 ; andi r15, r16, 5 ; prefetch_l2 r25 } + { tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 } + { tblidxb1 r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 } + { tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 ; st r25, r26 } + { tblidxb1 r5, r6 ; cmpne r15, r16, r17 ; st1 r25, r26 } + { tblidxb1 r5, r6 ; icoh r15 } + { tblidxb1 r5, r6 ; inv r15 } + { tblidxb1 r5, r6 ; jr r15 ; ld r25, r26 } + { tblidxb1 r5, r6 ; ld r25, r26 ; addi r15, r16, 5 } + { tblidxb1 r5, r6 ; ld r25, r26 ; shru r15, r16, r17 } + { tblidxb1 r5, r6 ; ld1s r25, r26 ; shl1addx r15, r16, r17 } + { tblidxb1 r5, r6 ; ld1u r25, r26 ; movei r15, 5 } + { tblidxb1 r5, r6 ; ld2s r25, r26 ; ill } + { tblidxb1 r5, r6 ; ld2u r25, r26 ; cmpeq r15, r16, r17 } + { tblidxb1 r5, r6 ; ld2u r25, r26 } + { tblidxb1 r5, r6 ; ld4s r25, r26 ; shl3addx r15, r16, r17 } + { tblidxb1 r5, r6 ; ld4u r25, r26 ; or r15, r16, r17 } + { tblidxb1 r5, r6 ; lnk r15 ; ld2s r25, r26 } + { tblidxb1 r5, r6 ; move r15, r16 ; ld2s r25, r26 } + { tblidxb1 r5, r6 ; mz r15, r16, r17 ; ld2s r25, r26 } + { tblidxb1 r5, r6 ; nor r15, r16, r17 ; ld4s r25, r26 } + { tblidxb1 r5, r6 ; prefetch r25 ; andi r15, r16, 5 } + { tblidxb1 r5, r6 ; prefetch r25 ; xor r15, r16, r17 } + { tblidxb1 r5, r6 ; prefetch_l1 r25 ; shl r15, r16, r17 } + { tblidxb1 r5, r6 ; prefetch_l1_fault r25 ; move r15, r16 } + { tblidxb1 r5, r6 ; prefetch_l2 r25 ; ill } + { tblidxb1 r5, r6 ; prefetch_l2_fault r25 ; cmpeqi r15, r16, 5 } + { tblidxb1 r5, r6 ; prefetch_l3 r15 } + { tblidxb1 r5, r6 ; prefetch_l3 r25 ; shrs r15, r16, r17 } + { tblidxb1 r5, r6 ; prefetch_l3_fault r25 ; shl r15, r16, r17 } + { tblidxb1 r5, r6 ; rotli r15, r16, 5 ; ld2u r25, r26 } + { tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; ld4s r25, r26 } + { tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 } + { tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 } + { tblidxb1 r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 } + { tblidxb1 r5, r6 ; shrsi r15, r16, 5 ; prefetch_l2_fault r25 } + { tblidxb1 r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 } + { tblidxb1 r5, r6 ; st r25, r26 ; shl r15, r16, r17 } + { tblidxb1 r5, r6 ; st1 r25, r26 ; move r15, r16 } + { tblidxb1 r5, r6 ; st2 r25, r26 ; fnop } + { tblidxb1 r5, r6 ; st4 r25, r26 ; andi r15, r16, 5 } + { tblidxb1 r5, r6 ; st4 r25, r26 ; xor r15, r16, r17 } + { tblidxb1 r5, r6 ; subx r15, r16, r17 ; prefetch_l1_fault r25 } + { tblidxb1 r5, r6 ; v2addi r15, r16, 5 } + { tblidxb1 r5, r6 ; v4sub r15, r16, r17 } + { tblidxb2 r5, r6 ; add r15, r16, r17 ; st4 r25, r26 } + { tblidxb2 r5, r6 ; addx r15, r16, r17 } + { tblidxb2 r5, r6 ; and r15, r16, r17 } + { tblidxb2 r5, r6 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 } + { tblidxb2 r5, r6 ; cmpleu r15, r16, r17 ; ld1s r25, r26 } + { tblidxb2 r5, r6 ; cmpltsi r15, r16, 5 ; ld2s r25, r26 } + { tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; ld2u r25, r26 } + { tblidxb2 r5, r6 ; fnop ; prefetch_l1 r25 } + { tblidxb2 r5, r6 ; info 19 ; prefetch_l1_fault r25 } + { tblidxb2 r5, r6 ; jalrp r15 ; prefetch_l1 r25 } + { tblidxb2 r5, r6 ; jrp r15 ; prefetch_l2 r25 } + { tblidxb2 r5, r6 ; ld r25, r26 ; rotli r15, r16, 5 } + { tblidxb2 r5, r6 ; ld1s r25, r26 ; mnz r15, r16, r17 } + { tblidxb2 r5, r6 ; ld1u r25, r26 ; cmpne r15, r16, r17 } + { tblidxb2 r5, r6 ; ld2s r25, r26 ; and r15, r16, r17 } + { tblidxb2 r5, r6 ; ld2s r25, r26 ; subx r15, r16, r17 } + { tblidxb2 r5, r6 ; ld2u r25, r26 ; shl2addx r15, r16, r17 } + { tblidxb2 r5, r6 ; ld4s r25, r26 ; nop } + { tblidxb2 r5, r6 ; ld4u r25, r26 ; jalr r15 } + { tblidxb2 r5, r6 ; ldnt2s_add r15, r16, 5 } + { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 } + { tblidxb2 r5, r6 ; movei r15, 5 ; prefetch_l3_fault r25 } + { tblidxb2 r5, r6 ; nop ; prefetch_l3_fault r25 } + { tblidxb2 r5, r6 ; or r15, r16, r17 ; st1 r25, r26 } + { tblidxb2 r5, r6 ; prefetch r25 ; shl2add r15, r16, r17 } + { tblidxb2 r5, r6 ; prefetch_l1 r25 ; jrp r15 } + { tblidxb2 r5, r6 ; prefetch_l1_fault r25 ; cmpltu r15, r16, r17 } + { tblidxb2 r5, r6 ; prefetch_l2 r25 ; and r15, r16, r17 } + { tblidxb2 r5, r6 ; prefetch_l2 r25 ; subx r15, r16, r17 } + { tblidxb2 r5, r6 ; prefetch_l2_fault r25 ; shl3add r15, r16, r17 } + { tblidxb2 r5, r6 ; prefetch_l3 r25 ; or r15, r16, r17 } + { tblidxb2 r5, r6 ; prefetch_l3_fault r25 ; jrp r15 } + { tblidxb2 r5, r6 ; rotl r15, r16, r17 ; prefetch_l3 r25 } + { tblidxb2 r5, r6 ; shl r15, r16, r17 ; st r25, r26 } + { tblidxb2 r5, r6 ; shl1addx r15, r16, r17 ; st1 r25, r26 } + { tblidxb2 r5, r6 ; shl2addx r15, r16, r17 ; st4 r25, r26 } + { tblidxb2 r5, r6 ; shli r15, r16, 5 ; ld r25, r26 } + { tblidxb2 r5, r6 ; shrsi r15, r16, 5 ; ld r25, r26 } + { tblidxb2 r5, r6 ; shrui r15, r16, 5 ; ld1u r25, r26 } + { tblidxb2 r5, r6 ; st r25, r26 ; jrp r15 } + { tblidxb2 r5, r6 ; st1 r25, r26 ; cmpltu r15, r16, r17 } + { tblidxb2 r5, r6 ; st2 r25, r26 ; addxi r15, r16, 5 } + { tblidxb2 r5, r6 ; st2 r25, r26 ; sub r15, r16, r17 } + { tblidxb2 r5, r6 ; st4 r25, r26 ; shl2add r15, r16, r17 } + { tblidxb2 r5, r6 ; sub r15, r16, r17 ; st4 r25, r26 } + { tblidxb2 r5, r6 ; v1mnz r15, r16, r17 } + { tblidxb2 r5, r6 ; v2sub r15, r16, r17 } + { tblidxb3 r5, r6 ; add r15, r16, r17 ; ld4u r25, r26 } + { tblidxb3 r5, r6 ; addx r15, r16, r17 ; prefetch r25 } + { tblidxb3 r5, r6 ; and r15, r16, r17 ; prefetch r25 } + { tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } + { tblidxb3 r5, r6 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 } + { tblidxb3 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 } + { tblidxb3 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 } + { tblidxb3 r5, r6 ; finv r15 } + { tblidxb3 r5, r6 ; ill ; st4 r25, r26 } + { tblidxb3 r5, r6 ; jalr r15 ; st2 r25, r26 } + { tblidxb3 r5, r6 ; jr r15 } + { tblidxb3 r5, r6 ; ld r25, r26 ; jr r15 } + { tblidxb3 r5, r6 ; ld1s r25, r26 ; cmpltsi r15, r16, 5 } + { tblidxb3 r5, r6 ; ld1u r25, r26 ; addx r15, r16, r17 } + { tblidxb3 r5, r6 ; ld1u r25, r26 ; shrui r15, r16, 5 } + { tblidxb3 r5, r6 ; ld2s r25, r26 ; shl1addx r15, r16, r17 } + { tblidxb3 r5, r6 ; ld2u r25, r26 ; movei r15, 5 } + { tblidxb3 r5, r6 ; ld4s r25, r26 ; ill } + { tblidxb3 r5, r6 ; ld4u r25, r26 ; cmpeq r15, r16, r17 } + { tblidxb3 r5, r6 ; ld4u r25, r26 } + { tblidxb3 r5, r6 ; mnz r15, r16, r17 ; ld r25, r26 } + { tblidxb3 r5, r6 ; movei r15, 5 ; ld1u r25, r26 } + { tblidxb3 r5, r6 ; nop ; ld1u r25, r26 } + { tblidxb3 r5, r6 ; or r15, r16, r17 ; ld2u r25, r26 } + { tblidxb3 r5, r6 ; prefetch r25 ; move r15, r16 } + { tblidxb3 r5, r6 ; prefetch_l1 r25 ; cmpleu r15, r16, r17 } + { tblidxb3 r5, r6 ; prefetch_l1_fault r25 ; addi r15, r16, 5 } + { tblidxb3 r5, r6 ; prefetch_l1_fault r25 ; shru r15, r16, r17 } + { tblidxb3 r5, r6 ; prefetch_l2 r25 ; shl1addx r15, r16, r17 } + { tblidxb3 r5, r6 ; prefetch_l2_fault r25 ; mz r15, r16, r17 } + { tblidxb3 r5, r6 ; prefetch_l3 r25 ; jalr r15 } + { tblidxb3 r5, r6 ; prefetch_l3_fault r25 ; cmpleu r15, r16, r17 } + { tblidxb3 r5, r6 ; rotl r15, r16, r17 ; ld1s r25, r26 } + { tblidxb3 r5, r6 ; shl r15, r16, r17 ; ld2s r25, r26 } + { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; ld2u r25, r26 } + { tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; ld4u r25, r26 } + { tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l1 r25 } + { tblidxb3 r5, r6 ; shrs r15, r16, r17 ; prefetch_l1 r25 } + { tblidxb3 r5, r6 ; shru r15, r16, r17 ; prefetch_l2 r25 } + { tblidxb3 r5, r6 ; st r25, r26 ; cmpleu r15, r16, r17 } + { tblidxb3 r5, r6 ; st1 r25, r26 ; addi r15, r16, 5 } + { tblidxb3 r5, r6 ; st1 r25, r26 ; shru r15, r16, r17 } + { tblidxb3 r5, r6 ; st2 r25, r26 ; shl1add r15, r16, r17 } + { tblidxb3 r5, r6 ; st4 r25, r26 ; move r15, r16 } + { tblidxb3 r5, r6 ; sub r15, r16, r17 ; ld4u r25, r26 } + { tblidxb3 r5, r6 ; v1cmplts r15, r16, r17 } + { tblidxb3 r5, r6 ; v2mz r15, r16, r17 } + { tblidxb3 r5, r6 ; xor r15, r16, r17 ; st1 r25, r26 } + { v1add r15, r16, r17 ; dblalign2 r5, r6, r7 } + { v1add r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { v1add r15, r16, r17 ; tblidxb1 r5, r6 } + { v1add r15, r16, r17 ; v1shl r5, r6, r7 } + { v1add r15, r16, r17 ; v2sads r5, r6, r7 } + { v1add r5, r6, r7 ; cmpltsi r15, r16, 5 } + { v1add r5, r6, r7 ; ld2u_add r15, r16, 5 } + { v1add r5, r6, r7 ; prefetch_add_l3 r15, 5 } + { v1add r5, r6, r7 ; stnt2_add r15, r16, 5 } + { v1add r5, r6, r7 ; v2cmples r15, r16, r17 } + { v1add r5, r6, r7 ; xori r15, r16, 5 } + { v1addi r15, r16, 5 ; fdouble_addsub r5, r6, r7 } + { v1addi r15, r16, 5 ; mula_ls_lu r5, r6, r7 } + { v1addi r15, r16, 5 ; v1addi r5, r6, 5 } + { v1addi r15, r16, 5 ; v1shru r5, r6, r7 } + { v1addi r15, r16, 5 ; v2shlsc r5, r6, r7 } + { v1addi r5, r6, 5 ; dblalign2 r15, r16, r17 } + { v1addi r5, r6, 5 ; ld4u_add r15, r16, 5 } + { v1addi r5, r6, 5 ; prefetch_l2 r15 } + { v1addi r5, r6, 5 ; sub r15, r16, r17 } + { v1addi r5, r6, 5 ; v2cmpltu r15, r16, r17 } + { v1adduc r15, r16, r17 ; addx r5, r6, r7 } + { v1adduc r15, r16, r17 ; fdouble_sub_flags r5, r6, r7 } + { v1adduc r15, r16, r17 ; mz r5, r6, r7 } + { v1adduc r15, r16, r17 ; v1cmpeq r5, r6, r7 } + { v1adduc r15, r16, r17 ; v2add r5, r6, r7 } + { v1adduc r15, r16, r17 ; v2shrui r5, r6, 5 } + { v1adduc r5, r6, r7 ; exch r15, r16, r17 } + { v1adduc r5, r6, r7 ; ldnt r15, r16 } + { v1adduc r5, r6, r7 ; raise } + { v1adduc r5, r6, r7 ; v1addi r15, r16, 5 } + { v1adduc r5, r6, r7 ; v2int_l r15, r16, r17 } + { v1adiffu r5, r6, r7 ; and r15, r16, r17 } + { v1adiffu r5, r6, r7 ; jrp r15 } + { v1adiffu r5, r6, r7 ; nop } + { v1adiffu r5, r6, r7 ; st2 r15, r16 } + { v1adiffu r5, r6, r7 ; v1shru r15, r16, r17 } + { v1adiffu r5, r6, r7 ; v4packsc r15, r16, r17 } + { v1avgu r5, r6, r7 ; fetchand r15, r16, r17 } + { v1avgu r5, r6, r7 ; ldnt2s_add r15, r16, 5 } + { v1avgu r5, r6, r7 ; shl1addx r15, r16, r17 } + { v1avgu r5, r6, r7 ; v1cmplts r15, r16, r17 } + { v1avgu r5, r6, r7 ; v2mz r15, r16, r17 } + { v1cmpeq r15, r16, r17 ; cmoveqz r5, r6, r7 } + { v1cmpeq r15, r16, r17 ; fsingle_sub1 r5, r6, r7 } + { v1cmpeq r15, r16, r17 ; shl r5, r6, r7 } + { v1cmpeq r15, r16, r17 ; v1ddotpua r5, r6, r7 } + { v1cmpeq r15, r16, r17 ; v2cmpltsi r5, r6, 5 } + { v1cmpeq r15, r16, r17 ; v4shrs r5, r6, r7 } + { v1cmpeq r5, r6, r7 ; finv r15 } + { v1cmpeq r5, r6, r7 ; ldnt4s_add r15, r16, 5 } + { v1cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 } + { v1cmpeq r5, r6, r7 ; v1cmpne r15, r16, r17 } + { v1cmpeq r5, r6, r7 ; v2shl r15, r16, r17 } + { v1cmpeqi r15, r16, 5 ; cmples r5, r6, r7 } + { v1cmpeqi r15, r16, 5 ; mnz r5, r6, r7 } + { v1cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 } + { v1cmpeqi r15, r16, 5 ; v1dotpa r5, r6, r7 } + { v1cmpeqi r15, r16, 5 ; v2dotp r5, r6, r7 } + { v1cmpeqi r15, r16, 5 ; xor r5, r6, r7 } + { v1cmpeqi r5, r6, 5 ; icoh r15 } + { v1cmpeqi r5, r6, 5 ; lnk r15 } + { v1cmpeqi r5, r6, 5 ; shrs r15, r16, r17 } + { v1cmpeqi r5, r6, 5 ; v1maxui r15, r16, 5 } + { v1cmpeqi r5, r6, 5 ; v2shrsi r15, r16, 5 } + { v1cmples r15, r16, r17 ; cmpltu r5, r6, r7 } + { v1cmples r15, r16, r17 ; mul_hs_hs r5, r6, r7 } + { v1cmples r15, r16, r17 ; shli r5, r6, 5 } + { v1cmples r15, r16, r17 ; v1dotpusa r5, r6, r7 } + { v1cmples r15, r16, r17 ; v2maxs r5, r6, r7 } + { v1cmples r5, r6, r7 ; addli r15, r16, 0x1234 } + { v1cmples r5, r6, r7 ; inv r15 } + { v1cmples r5, r6, r7 ; move r15, r16 } + { v1cmples r5, r6, r7 ; shrux r15, r16, r17 } + { v1cmples r5, r6, r7 ; v1mz r15, r16, r17 } + { v1cmples r5, r6, r7 ; v2subsc r15, r16, r17 } + { v1cmpleu r15, r16, r17 ; cmula r5, r6, r7 } + { v1cmpleu r15, r16, r17 ; mul_hu_hu r5, r6, r7 } + { v1cmpleu r15, r16, r17 ; shrsi r5, r6, 5 } + { v1cmpleu r15, r16, r17 ; v1maxui r5, r6, 5 } + { v1cmpleu r15, r16, r17 ; v2mnz r5, r6, r7 } + { v1cmpleu r5, r6, r7 ; addxsc r15, r16, r17 } + { v1cmpleu r5, r6, r7 ; jr r15 } + { v1cmpleu r5, r6, r7 ; mz r15, r16, r17 } + { v1cmpleu r5, r6, r7 ; st1_add r15, r16, 5 } + { v1cmpleu r5, r6, r7 ; v1shrsi r15, r16, 5 } + { v1cmpleu r5, r6, r7 ; v4int_l r15, r16, r17 } + { v1cmplts r15, r16, r17 ; cmulh r5, r6, r7 } + { v1cmplts r15, r16, r17 ; mul_ls_lu r5, r6, r7 } + { v1cmplts r15, r16, r17 ; shruxi r5, r6, 5 } + { v1cmplts r15, r16, r17 ; v1multu r5, r6, r7 } + { v1cmplts r15, r16, r17 ; v2mz r5, r6, r7 } + { v1cmplts r5, r6, r7 ; cmpeqi r15, r16, 5 } + { v1cmplts r5, r6, r7 ; ld1s_add r15, r16, 5 } + { v1cmplts r5, r6, r7 ; ori r15, r16, 5 } + { v1cmplts r5, r6, r7 ; st4_add r15, r16, 5 } + { v1cmplts r5, r6, r7 ; v1subuc r15, r16, r17 } + { v1cmplts r5, r6, r7 ; v4shrs r15, r16, r17 } + { v1cmpltsi r15, r16, 5 ; ctz r5, r6 } + { v1cmpltsi r15, r16, 5 ; mula_hs_ls r5, r6, r7 } + { v1cmpltsi r15, r16, 5 ; subxsc r5, r6, r7 } + { v1cmpltsi r15, r16, 5 ; v1sadau r5, r6, r7 } + { v1cmpltsi r15, r16, 5 ; v2sadas r5, r6, r7 } + { v1cmpltsi r5, r6, 5 ; cmpleu r15, r16, r17 } + { v1cmpltsi r5, r6, 5 ; ld2s_add r15, r16, 5 } + { v1cmpltsi r5, r6, 5 ; prefetch_add_l2 r15, 5 } + { v1cmpltsi r5, r6, 5 ; stnt1_add r15, r16, 5 } + { v1cmpltsi r5, r6, 5 ; v2cmpeq r15, r16, r17 } + { v1cmpltsi r5, r6, 5 ; wh64 r15 } + { v1cmpltu r15, r16, r17 ; dblalign6 r5, r6, r7 } + { v1cmpltu r15, r16, r17 ; mula_hu_lu r5, r6, r7 } + { v1cmpltu r15, r16, r17 ; tblidxb3 r5, r6 } + { v1cmpltu r15, r16, r17 ; v1shrs r5, r6, r7 } + { v1cmpltu r15, r16, r17 ; v2shl r5, r6, r7 } + { v1cmpltu r5, r6, r7 ; cmpltui r15, r16, 5 } + { v1cmpltu r5, r6, r7 ; ld4s_add r15, r16, 5 } + { v1cmpltu r5, r6, r7 ; prefetch_l1 r15 } + { v1cmpltu r5, r6, r7 ; stnt4_add r15, r16, 5 } + { v1cmpltu r5, r6, r7 ; v2cmplts r15, r16, r17 } + { v1cmpltui r15, r16, 5 ; addi r5, r6, 5 } + { v1cmpltui r15, r16, 5 ; fdouble_pack1 r5, r6, r7 } + { v1cmpltui r15, r16, 5 ; mulax r5, r6, r7 } + { v1cmpltui r15, r16, 5 ; v1adiffu r5, r6, r7 } + { v1cmpltui r15, r16, 5 ; v1sub r5, r6, r7 } + { v1cmpltui r15, r16, 5 ; v2shrsi r5, r6, 5 } + { v1cmpltui r5, r6, 5 ; dblalign6 r15, r16, r17 } + { v1cmpltui r5, r6, 5 ; ldna r15, r16 } + { v1cmpltui r5, r6, 5 ; prefetch_l3 r15 } + { v1cmpltui r5, r6, 5 ; subxsc r15, r16, r17 } + { v1cmpltui r5, r6, 5 ; v2cmpne r15, r16, r17 } + { v1cmpne r15, r16, r17 ; addxli r5, r6, 0x1234 } + { v1cmpne r15, r16, r17 ; fdouble_unpack_min r5, r6, r7 } + { v1cmpne r15, r16, r17 ; nor r5, r6, r7 } + { v1cmpne r15, r16, r17 ; v1cmples r5, r6, r7 } + { v1cmpne r15, r16, r17 ; v2addsc r5, r6, r7 } + { v1cmpne r15, r16, r17 ; v2subsc r5, r6, r7 } + { v1cmpne r5, r6, r7 ; fetchadd r15, r16, r17 } + { v1cmpne r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + { v1cmpne r5, r6, r7 ; rotli r15, r16, 5 } + { v1cmpne r5, r6, r7 ; v1cmpeq r15, r16, r17 } + { v1cmpne r5, r6, r7 ; v2maxsi r15, r16, 5 } + { v1ddotpu r5, r6, r7 ; cmpeq r15, r16, r17 } + { v1ddotpu r5, r6, r7 ; ld1s r15, r16 } + { v1ddotpu r5, r6, r7 ; or r15, r16, r17 } + { v1ddotpu r5, r6, r7 ; st4 r15, r16 } + { v1ddotpu r5, r6, r7 ; v1sub r15, r16, r17 } + { v1ddotpu r5, r6, r7 ; v4shlsc r15, r16, r17 } + { v1ddotpua r5, r6, r7 ; fetchor r15, r16, r17 } + { v1ddotpua r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + { v1ddotpua r5, r6, r7 ; shl2addx r15, r16, r17 } + { v1ddotpua r5, r6, r7 ; v1cmpltu r15, r16, r17 } + { v1ddotpua r5, r6, r7 ; v2packl r15, r16, r17 } + { v1ddotpus r5, r6, r7 ; cmplts r15, r16, r17 } + { v1ddotpus r5, r6, r7 ; ld2u r15, r16 } + { v1ddotpus r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + { v1ddotpus r5, r6, r7 ; stnt2 r15, r16 } + { v1ddotpus r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + { v1ddotpus r5, r6, r7 ; xor r15, r16, r17 } + { v1ddotpusa r5, r6, r7 ; icoh r15 } + { v1ddotpusa r5, r6, r7 ; lnk r15 } + { v1ddotpusa r5, r6, r7 ; shrs r15, r16, r17 } + { v1ddotpusa r5, r6, r7 ; v1maxui r15, r16, 5 } + { v1ddotpusa r5, r6, r7 ; v2shrsi r15, r16, 5 } + { v1dotp r5, r6, r7 ; dblalign4 r15, r16, r17 } + { v1dotp r5, r6, r7 ; ld_add r15, r16, 5 } + { v1dotp r5, r6, r7 ; prefetch_l2_fault r15 } + { v1dotp r5, r6, r7 ; subx r15, r16, r17 } + { v1dotp r5, r6, r7 ; v2cmpltui r15, r16, 5 } + { v1dotpa r5, r6, r7 ; addxi r15, r16, 5 } + { v1dotpa r5, r6, r7 ; jalr r15 } + { v1dotpa r5, r6, r7 ; moveli r15, 0x1234 } + { v1dotpa r5, r6, r7 ; st r15, r16 } + { v1dotpa r5, r6, r7 ; v1shli r15, r16, 5 } + { v1dotpa r5, r6, r7 ; v4addsc r15, r16, r17 } + { v1dotpu r5, r6, r7 ; fetchadd4 r15, r16, r17 } + { v1dotpu r5, r6, r7 ; ldnt1u r15, r16 } + { v1dotpu r5, r6, r7 ; shl r15, r16, r17 } + { v1dotpu r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + { v1dotpu r5, r6, r7 ; v2mins r15, r16, r17 } + { v1dotpua r5, r6, r7 ; cmpeqi r15, r16, 5 } + { v1dotpua r5, r6, r7 ; ld1s_add r15, r16, 5 } + { v1dotpua r5, r6, r7 ; ori r15, r16, 5 } + { v1dotpua r5, r6, r7 ; st4_add r15, r16, 5 } + { v1dotpua r5, r6, r7 ; v1subuc r15, r16, r17 } + { v1dotpua r5, r6, r7 ; v4shrs r15, r16, r17 } + { v1dotpus r5, r6, r7 ; fetchor4 r15, r16, r17 } + { v1dotpus r5, r6, r7 ; ldnt4s r15, r16 } + { v1dotpus r5, r6, r7 ; shl3add r15, r16, r17 } + { v1dotpus r5, r6, r7 ; v1cmpltui r15, r16, 5 } + { v1dotpus r5, r6, r7 ; v2packuc r15, r16, r17 } + { v1dotpusa r5, r6, r7 ; cmpltsi r15, r16, 5 } + { v1dotpusa r5, r6, r7 ; ld2u_add r15, r16, 5 } + { v1dotpusa r5, r6, r7 ; prefetch_add_l3 r15, 5 } + { v1dotpusa r5, r6, r7 ; stnt2_add r15, r16, 5 } + { v1dotpusa r5, r6, r7 ; v2cmples r15, r16, r17 } + { v1dotpusa r5, r6, r7 ; xori r15, r16, 5 } + { v1int_h r15, r16, r17 ; fdouble_addsub r5, r6, r7 } + { v1int_h r15, r16, r17 ; mula_ls_lu r5, r6, r7 } + { v1int_h r15, r16, r17 ; v1addi r5, r6, 5 } + { v1int_h r15, r16, r17 ; v1shru r5, r6, r7 } + { v1int_h r15, r16, r17 ; v2shlsc r5, r6, r7 } + { v1int_h r5, r6, r7 ; dblalign2 r15, r16, r17 } + { v1int_h r5, r6, r7 ; ld4u_add r15, r16, 5 } + { v1int_h r5, r6, r7 ; prefetch_l2 r15 } + { v1int_h r5, r6, r7 ; sub r15, r16, r17 } + { v1int_h r5, r6, r7 ; v2cmpltu r15, r16, r17 } + { v1int_l r15, r16, r17 ; addx r5, r6, r7 } + { v1int_l r15, r16, r17 ; fdouble_sub_flags r5, r6, r7 } + { v1int_l r15, r16, r17 ; mz r5, r6, r7 } + { v1int_l r15, r16, r17 ; v1cmpeq r5, r6, r7 } + { v1int_l r15, r16, r17 ; v2add r5, r6, r7 } + { v1int_l r15, r16, r17 ; v2shrui r5, r6, 5 } + { v1int_l r5, r6, r7 ; exch r15, r16, r17 } + { v1int_l r5, r6, r7 ; ldnt r15, r16 } + { v1int_l r5, r6, r7 ; raise } + { v1int_l r5, r6, r7 ; v1addi r15, r16, 5 } + { v1int_l r5, r6, r7 ; v2int_l r15, r16, r17 } + { v1maxu r15, r16, r17 ; and r5, r6, r7 } + { v1maxu r15, r16, r17 ; fsingle_add1 r5, r6, r7 } + { v1maxu r15, r16, r17 ; ori r5, r6, 5 } + { v1maxu r15, r16, r17 ; v1cmplts r5, r6, r7 } + { v1maxu r15, r16, r17 ; v2avgs r5, r6, r7 } + { v1maxu r15, r16, r17 ; v4addsc r5, r6, r7 } + { v1maxu r5, r6, r7 ; fetchaddgez r15, r16, r17 } + { v1maxu r5, r6, r7 ; ldnt1u_add r15, r16, 5 } + { v1maxu r5, r6, r7 ; shl16insli r15, r16, 0x1234 } + { v1maxu r5, r6, r7 ; v1cmples r15, r16, r17 } + { v1maxu r5, r6, r7 ; v2minsi r15, r16, 5 } + { v1maxui r15, r16, 5 ; bfins r5, r6, 5, 7 } + { v1maxui r15, r16, 5 ; fsingle_pack1 r5, r6 } + { v1maxui r15, r16, 5 ; rotl r5, r6, r7 } + { v1maxui r15, r16, 5 ; v1cmpne r5, r6, r7 } + { v1maxui r15, r16, 5 ; v2cmpleu r5, r6, r7 } + { v1maxui r15, r16, 5 ; v4shl r5, r6, r7 } + { v1maxui r5, r6, 5 ; fetchor r15, r16, r17 } + { v1maxui r5, r6, 5 ; ldnt2u_add r15, r16, 5 } + { v1maxui r5, r6, 5 ; shl2addx r15, r16, r17 } + { v1maxui r5, r6, 5 ; v1cmpltu r15, r16, r17 } + { v1maxui r5, r6, 5 ; v2packl r15, r16, r17 } + { v1minu r15, r16, r17 ; cmpeq r5, r6, r7 } + { v1minu r15, r16, r17 ; infol 0x1234 } + { v1minu r15, r16, r17 ; shl1add r5, r6, r7 } + { v1minu r15, r16, r17 ; v1ddotpusa r5, r6, r7 } + { v1minu r15, r16, r17 ; v2cmpltui r5, r6, 5 } + { v1minu r15, r16, r17 ; v4sub r5, r6, r7 } + { v1minu r5, r6, r7 ; flushwb } + { v1minu r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + { v1minu r5, r6, r7 ; shlx r15, r16, r17 } + { v1minu r5, r6, r7 ; v1int_l r15, r16, r17 } + { v1minu r5, r6, r7 ; v2shlsc r15, r16, r17 } + { v1minui r15, r16, 5 ; cmplts r5, r6, r7 } + { v1minui r15, r16, 5 ; movei r5, 5 } + { v1minui r15, r16, 5 ; shl3add r5, r6, r7 } + { v1minui r15, r16, 5 ; v1dotpua r5, r6, r7 } + { v1minui r15, r16, 5 ; v2int_h r5, r6, r7 } + { v1minui r5, r6, 5 ; add r15, r16, r17 } + { v1minui r5, r6, 5 ; info 19 } + { v1minui r5, r6, 5 ; mfspr r16, 0x5 } + { v1minui r5, r6, 5 ; shru r15, r16, r17 } + { v1minui r5, r6, 5 ; v1minui r15, r16, 5 } + { v1minui r5, r6, 5 ; v2shrui r15, r16, 5 } + { v1mnz r15, r16, r17 ; cmpne r5, r6, r7 } + { v1mnz r15, r16, r17 ; mul_hs_ls r5, r6, r7 } + { v1mnz r15, r16, r17 ; shlxi r5, r6, 5 } + { v1mnz r15, r16, r17 ; v1int_l r5, r6, r7 } + { v1mnz r15, r16, r17 ; v2mins r5, r6, r7 } + { v1mnz r5, r6, r7 ; addxi r15, r16, 5 } + { v1mnz r5, r6, r7 ; jalr r15 } + { v1mnz r5, r6, r7 ; moveli r15, 0x1234 } + { v1mnz r5, r6, r7 ; st r15, r16 } + { v1mnz r5, r6, r7 ; v1shli r15, r16, 5 } + { v1mnz r5, r6, r7 ; v4addsc r15, r16, r17 } + { v1multu r5, r6, r7 ; fetchadd4 r15, r16, r17 } + { v1multu r5, r6, r7 ; ldnt1u r15, r16 } + { v1multu r5, r6, r7 ; shl r15, r16, r17 } + { v1multu r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + { v1multu r5, r6, r7 ; v2mins r15, r16, r17 } + { v1mulu r5, r6, r7 ; cmpeqi r15, r16, 5 } + { v1mulu r5, r6, r7 ; ld1s_add r15, r16, 5 } + { v1mulu r5, r6, r7 ; ori r15, r16, 5 } + { v1mulu r5, r6, r7 ; st4_add r15, r16, 5 } + { v1mulu r5, r6, r7 ; v1subuc r15, r16, r17 } + { v1mulu r5, r6, r7 ; v4shrs r15, r16, r17 } + { v1mulus r5, r6, r7 ; fetchor4 r15, r16, r17 } + { v1mulus r5, r6, r7 ; ldnt4s r15, r16 } + { v1mulus r5, r6, r7 ; shl3add r15, r16, r17 } + { v1mulus r5, r6, r7 ; v1cmpltui r15, r16, 5 } + { v1mulus r5, r6, r7 ; v2packuc r15, r16, r17 } + { v1mz r15, r16, r17 ; cmpeqi r5, r6, 5 } + { v1mz r15, r16, r17 ; mm r5, r6, 5, 7 } + { v1mz r15, r16, r17 ; shl1addx r5, r6, r7 } + { v1mz r15, r16, r17 ; v1dotp r5, r6, r7 } + { v1mz r15, r16, r17 ; v2cmpne r5, r6, r7 } + { v1mz r15, r16, r17 ; v4subsc r5, r6, r7 } + { v1mz r5, r6, r7 ; fnop } + { v1mz r5, r6, r7 ; ldnt_add r15, r16, 5 } + { v1mz r5, r6, r7 ; shlxi r15, r16, 5 } + { v1mz r5, r6, r7 ; v1maxu r15, r16, r17 } + { v1mz r5, r6, r7 ; v2shrs r15, r16, r17 } + { v1sadau r5, r6, r7 ; dblalign2 r15, r16, r17 } + { v1sadau r5, r6, r7 ; ld4u_add r15, r16, 5 } + { v1sadau r5, r6, r7 ; prefetch_l2 r15 } + { v1sadau r5, r6, r7 ; sub r15, r16, r17 } + { v1sadau r5, r6, r7 ; v2cmpltu r15, r16, r17 } + { v1sadu r5, r6, r7 ; addx r15, r16, r17 } + { v1sadu r5, r6, r7 ; iret } + { v1sadu r5, r6, r7 ; movei r15, 5 } + { v1sadu r5, r6, r7 ; shruxi r15, r16, 5 } + { v1sadu r5, r6, r7 ; v1shl r15, r16, r17 } + { v1sadu r5, r6, r7 ; v4add r15, r16, r17 } + { v1shl r15, r16, r17 ; cmulaf r5, r6, r7 } + { v1shl r15, r16, r17 ; mul_hu_ls r5, r6, r7 } + { v1shl r15, r16, r17 ; shru r5, r6, r7 } + { v1shl r15, r16, r17 ; v1minu r5, r6, r7 } + { v1shl r15, r16, r17 ; v2mulfsc r5, r6, r7 } + { v1shl r5, r6, r7 ; and r15, r16, r17 } + { v1shl r5, r6, r7 ; jrp r15 } + { v1shl r5, r6, r7 ; nop } + { v1shl r5, r6, r7 ; st2 r15, r16 } + { v1shl r5, r6, r7 ; v1shru r15, r16, r17 } + { v1shl r5, r6, r7 ; v4packsc r15, r16, r17 } + { v1shli r15, r16, 5 ; cmulhr r5, r6, r7 } + { v1shli r15, r16, 5 ; mul_lu_lu r5, r6, r7 } + { v1shli r15, r16, 5 ; shufflebytes r5, r6, r7 } + { v1shli r15, r16, 5 ; v1mulu r5, r6, r7 } + { v1shli r15, r16, 5 ; v2packh r5, r6, r7 } + { v1shli r5, r6, 5 ; cmpexch r15, r16, r17 } + { v1shli r5, r6, 5 ; ld1u r15, r16 } + { v1shli r5, r6, 5 ; prefetch r15 } + { v1shli r5, r6, 5 ; st_add r15, r16, 5 } + { v1shli r5, r6, 5 ; v2add r15, r16, r17 } + { v1shli r5, r6, 5 ; v4shru r15, r16, r17 } + { v1shrs r15, r16, r17 ; dblalign r5, r6, r7 } + { v1shrs r15, r16, r17 ; mula_hs_lu r5, r6, r7 } + { v1shrs r15, r16, r17 ; tblidxb0 r5, r6 } + { v1shrs r15, r16, r17 ; v1sadu r5, r6, r7 } + { v1shrs r15, r16, r17 ; v2sadau r5, r6, r7 } + { v1shrs r5, r6, r7 ; cmplts r15, r16, r17 } + { v1shrs r5, r6, r7 ; ld2u r15, r16 } + { v1shrs r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + { v1shrs r5, r6, r7 ; stnt2 r15, r16 } + { v1shrs r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + { v1shrs r5, r6, r7 ; xor r15, r16, r17 } + { v1shrsi r15, r16, 5 ; fdouble_add_flags r5, r6, r7 } + { v1shrsi r15, r16, 5 ; mula_ls_ls r5, r6, r7 } + { v1shrsi r15, r16, 5 ; v1add r5, r6, r7 } + { v1shrsi r15, r16, 5 ; v1shrsi r5, r6, 5 } + { v1shrsi r15, r16, 5 ; v2shli r5, r6, 5 } + { v1shrsi r5, r6, 5 ; cmpne r15, r16, r17 } + { v1shrsi r5, r6, 5 ; ld4u r15, r16 } + { v1shrsi r5, r6, 5 ; prefetch_l1_fault r15 } + { v1shrsi r5, r6, 5 ; stnt_add r15, r16, 5 } + { v1shrsi r5, r6, 5 ; v2cmpltsi r15, r16, 5 } + { v1shru r15, r16, r17 ; addli r5, r6, 0x1234 } + { v1shru r15, r16, r17 ; fdouble_pack2 r5, r6, r7 } + { v1shru r15, r16, r17 ; mulx r5, r6, r7 } + { v1shru r15, r16, r17 ; v1avgu r5, r6, r7 } + { v1shru r15, r16, r17 ; v1subuc r5, r6, r7 } + { v1shru r15, r16, r17 ; v2shru r5, r6, r7 } + { v1shru r5, r6, r7 ; dtlbpr r15 } + { v1shru r5, r6, r7 ; ldna_add r15, r16, 5 } + { v1shru r5, r6, r7 ; prefetch_l3_fault r15 } + { v1shru r5, r6, r7 ; v1add r15, r16, r17 } + { v1shru r5, r6, r7 ; v2int_h r15, r16, r17 } + { v1shrui r15, r16, 5 ; addxsc r5, r6, r7 } + { v1shrui r15, r16, 5 ; fnop } + { v1shrui r15, r16, 5 ; or r5, r6, r7 } + { v1shrui r15, r16, 5 ; v1cmpleu r5, r6, r7 } + { v1shrui r15, r16, 5 ; v2adiffs r5, r6, r7 } + { v1shrui r15, r16, 5 ; v4add r5, r6, r7 } + { v1shrui r5, r6, 5 ; fetchadd4 r15, r16, r17 } + { v1shrui r5, r6, 5 ; ldnt1u r15, r16 } + { v1shrui r5, r6, 5 ; shl r15, r16, r17 } + { v1shrui r5, r6, 5 ; v1cmpeqi r15, r16, 5 } + { v1shrui r5, r6, 5 ; v2mins r15, r16, r17 } + { v1sub r15, r16, r17 ; bfextu r5, r6, 5, 7 } + { v1sub r15, r16, r17 ; fsingle_mul2 r5, r6, r7 } + { v1sub r15, r16, r17 ; revbytes r5, r6 } + { v1sub r15, r16, r17 ; v1cmpltui r5, r6, 5 } + { v1sub r15, r16, r17 ; v2cmples r5, r6, r7 } + { v1sub r15, r16, r17 ; v4packsc r5, r6, r7 } + { v1sub r5, r6, r7 ; fetchand4 r15, r16, r17 } + { v1sub r5, r6, r7 ; ldnt2u r15, r16 } + { v1sub r5, r6, r7 ; shl2add r15, r16, r17 } + { v1sub r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + { v1sub r5, r6, r7 ; v2packh r15, r16, r17 } + { v1subuc r15, r16, r17 ; cmovnez r5, r6, r7 } + { v1subuc r15, r16, r17 ; info 19 } + { v1subuc r15, r16, r17 ; shl16insli r5, r6, 0x1234 } + { v1subuc r15, r16, r17 ; v1ddotpus r5, r6, r7 } + { v1subuc r15, r16, r17 ; v2cmpltu r5, r6, r7 } + { v1subuc r15, r16, r17 ; v4shru r5, r6, r7 } + { v1subuc r5, r6, r7 ; flush r15 } + { v1subuc r5, r6, r7 ; ldnt4u r15, r16 } + { v1subuc r5, r6, r7 ; shli r15, r16, 5 } + { v1subuc r5, r6, r7 ; v1int_h r15, r16, r17 } + { v1subuc r5, r6, r7 ; v2shli r15, r16, 5 } + { v2add r15, r16, r17 ; cmpleu r5, r6, r7 } + { v2add r15, r16, r17 ; move r5, r6 } + { v2add r15, r16, r17 ; shl2addx r5, r6, r7 } + { v2add r15, r16, r17 ; v1dotpu r5, r6, r7 } + { v2add r15, r16, r17 ; v2dotpa r5, r6, r7 } + { v2add r15, r16, r17 ; xori r5, r6, 5 } + { v2add r5, r6, r7 ; ill } + { v2add r5, r6, r7 ; mf } + { v2add r5, r6, r7 ; shrsi r15, r16, 5 } + { v2add r5, r6, r7 ; v1minu r15, r16, r17 } + { v2add r5, r6, r7 ; v2shru r15, r16, r17 } + { v2addi r15, r16, 5 ; cmpltui r5, r6, 5 } + { v2addi r15, r16, 5 ; mul_hs_hu r5, r6, r7 } + { v2addi r15, r16, 5 ; shlx r5, r6, r7 } + { v2addi r15, r16, 5 ; v1int_h r5, r6, r7 } + { v2addi r15, r16, 5 ; v2maxsi r5, r6, 5 } + { v2addi r5, r6, 5 ; addx r15, r16, r17 } + { v2addi r5, r6, 5 ; iret } + { v2addi r5, r6, 5 ; movei r15, 5 } + { v2addi r5, r6, 5 ; shruxi r15, r16, 5 } + { v2addi r5, r6, 5 ; v1shl r15, r16, r17 } + { v2addi r5, r6, 5 ; v4add r15, r16, r17 } + { v2addsc r15, r16, r17 ; cmulaf r5, r6, r7 } + { v2addsc r15, r16, r17 ; mul_hu_ls r5, r6, r7 } + { v2addsc r15, r16, r17 ; shru r5, r6, r7 } + { v2addsc r15, r16, r17 ; v1minu r5, r6, r7 } + { v2addsc r15, r16, r17 ; v2mulfsc r5, r6, r7 } + { v2addsc r5, r6, r7 ; and r15, r16, r17 } + { v2addsc r5, r6, r7 ; jrp r15 } + { v2addsc r5, r6, r7 ; nop } + { v2addsc r5, r6, r7 ; st2 r15, r16 } + { v2addsc r5, r6, r7 ; v1shru r15, r16, r17 } + { v2addsc r5, r6, r7 ; v4packsc r15, r16, r17 } + { v2adiffs r5, r6, r7 ; fetchand r15, r16, r17 } + { v2adiffs r5, r6, r7 ; ldnt2s_add r15, r16, 5 } + { v2adiffs r5, r6, r7 ; shl1addx r15, r16, r17 } + { v2adiffs r5, r6, r7 ; v1cmplts r15, r16, r17 } + { v2adiffs r5, r6, r7 ; v2mz r15, r16, r17 } + { v2avgs r5, r6, r7 ; cmples r15, r16, r17 } + { v2avgs r5, r6, r7 ; ld2s r15, r16 } + { v2avgs r5, r6, r7 ; prefetch_add_l1_fault r15, 5 } + { v2avgs r5, r6, r7 ; stnt1 r15, r16 } + { v2avgs r5, r6, r7 ; v2addsc r15, r16, r17 } + { v2avgs r5, r6, r7 ; v4subsc r15, r16, r17 } + { v2cmpeq r15, r16, r17 ; dblalign4 r5, r6, r7 } + { v2cmpeq r15, r16, r17 ; mula_hu_ls r5, r6, r7 } + { v2cmpeq r15, r16, r17 ; tblidxb2 r5, r6 } + { v2cmpeq r15, r16, r17 ; v1shli r5, r6, 5 } + { v2cmpeq r15, r16, r17 ; v2sadu r5, r6, r7 } + { v2cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 } + { v2cmpeq r5, r6, r7 ; ld4s r15, r16 } + { v2cmpeq r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + { v2cmpeq r5, r6, r7 ; stnt4 r15, r16 } + { v2cmpeq r5, r6, r7 ; v2cmpleu r15, r16, r17 } + { v2cmpeqi r15, r16, 5 ; add r5, r6, r7 } + { v2cmpeqi r15, r16, 5 ; fdouble_mul_flags r5, r6, r7 } + { v2cmpeqi r15, r16, 5 ; mula_lu_lu r5, r6, r7 } + { v2cmpeqi r15, r16, 5 ; v1adduc r5, r6, r7 } + { v2cmpeqi r15, r16, 5 ; v1shrui r5, r6, 5 } + { v2cmpeqi r15, r16, 5 ; v2shrs r5, r6, r7 } + { v2cmpeqi r5, r6, 5 ; dblalign4 r15, r16, r17 } + { v2cmpeqi r5, r6, 5 ; ld_add r15, r16, 5 } + { v2cmpeqi r5, r6, 5 ; prefetch_l2_fault r15 } + { v2cmpeqi r5, r6, 5 ; subx r15, r16, r17 } + { v2cmpeqi r5, r6, 5 ; v2cmpltui r15, r16, 5 } + { v2cmples r15, r16, r17 ; addxi r5, r6, 5 } + { v2cmples r15, r16, r17 ; fdouble_unpack_max r5, r6, r7 } + { v2cmples r15, r16, r17 ; nop } + { v2cmples r15, r16, r17 ; v1cmpeqi r5, r6, 5 } + { v2cmples r15, r16, r17 ; v2addi r5, r6, 5 } + { v2cmples r15, r16, r17 ; v2sub r5, r6, r7 } + { v2cmples r5, r6, r7 ; exch4 r15, r16, r17 } + { v2cmples r5, r6, r7 ; ldnt1s r15, r16 } + { v2cmples r5, r6, r7 ; rotl r15, r16, r17 } + { v2cmples r5, r6, r7 ; v1adduc r15, r16, r17 } + { v2cmples r5, r6, r7 ; v2maxs r15, r16, r17 } + { v2cmpleu r15, r16, r17 ; andi r5, r6, 5 } + { v2cmpleu r15, r16, r17 ; fsingle_addsub2 r5, r6, r7 } + { v2cmpleu r15, r16, r17 ; pcnt r5, r6 } + { v2cmpleu r15, r16, r17 ; v1cmpltsi r5, r6, 5 } + { v2cmpleu r15, r16, r17 ; v2cmpeq r5, r6, r7 } + { v2cmpleu r15, r16, r17 ; v4int_h r5, r6, r7 } + { v2cmpleu r5, r6, r7 ; fetchaddgez4 r15, r16, r17 } + { v2cmpleu r5, r6, r7 ; ldnt2s r15, r16 } + { v2cmpleu r5, r6, r7 ; shl1add r15, r16, r17 } + { v2cmpleu r5, r6, r7 ; v1cmpleu r15, r16, r17 } + { v2cmpleu r5, r6, r7 ; v2mnz r15, r16, r17 } + { v2cmplts r15, r16, r17 ; clz r5, r6 } + { v2cmplts r15, r16, r17 ; fsingle_pack2 r5, r6, r7 } + { v2cmplts r15, r16, r17 ; rotli r5, r6, 5 } + { v2cmplts r15, r16, r17 ; v1ddotpu r5, r6, r7 } + { v2cmplts r15, r16, r17 ; v2cmplts r5, r6, r7 } + { v2cmplts r15, r16, r17 ; v4shlsc r5, r6, r7 } + { v2cmplts r5, r6, r7 ; fetchor4 r15, r16, r17 } + { v2cmplts r5, r6, r7 ; ldnt4s r15, r16 } + { v2cmplts r5, r6, r7 ; shl3add r15, r16, r17 } + { v2cmplts r5, r6, r7 ; v1cmpltui r15, r16, 5 } + { v2cmplts r5, r6, r7 ; v2packuc r15, r16, r17 } + { v2cmpltsi r15, r16, 5 ; cmpeqi r5, r6, 5 } + { v2cmpltsi r15, r16, 5 ; mm r5, r6, 5, 7 } + { v2cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 } + { v2cmpltsi r15, r16, 5 ; v1dotp r5, r6, r7 } + { v2cmpltsi r15, r16, 5 ; v2cmpne r5, r6, r7 } + { v2cmpltsi r15, r16, 5 ; v4subsc r5, r6, r7 } + { v2cmpltsi r5, r6, 5 ; fnop } + { v2cmpltsi r5, r6, 5 ; ldnt_add r15, r16, 5 } + { v2cmpltsi r5, r6, 5 ; shlxi r15, r16, 5 } + { v2cmpltsi r5, r6, 5 ; v1maxu r15, r16, r17 } + { v2cmpltsi r5, r6, 5 ; v2shrs r15, r16, r17 } + { v2cmpltu r15, r16, r17 ; cmpltsi r5, r6, 5 } + { v2cmpltu r15, r16, r17 ; moveli r5, 0x1234 } + { v2cmpltu r15, r16, r17 ; shl3addx r5, r6, r7 } + { v2cmpltu r15, r16, r17 ; v1dotpus r5, r6, r7 } + { v2cmpltu r15, r16, r17 ; v2int_l r5, r6, r7 } + { v2cmpltu r5, r6, r7 ; addi r15, r16, 5 } + { v2cmpltu r5, r6, r7 ; infol 0x1234 } + { v2cmpltu r5, r6, r7 ; mnz r15, r16, r17 } + { v2cmpltu r5, r6, r7 ; shrui r15, r16, 5 } + { v2cmpltu r5, r6, r7 ; v1mnz r15, r16, r17 } + { v2cmpltu r5, r6, r7 ; v2sub r15, r16, r17 } + { v2cmpltui r15, r16, 5 ; cmul r5, r6, r7 } + { v2cmpltui r15, r16, 5 ; mul_hs_lu r5, r6, r7 } + { v2cmpltui r15, r16, 5 ; shrs r5, r6, r7 } + { v2cmpltui r15, r16, 5 ; v1maxu r5, r6, r7 } + { v2cmpltui r15, r16, 5 ; v2minsi r5, r6, 5 } + { v2cmpltui r5, r6, 5 ; addxli r15, r16, 0x1234 } + { v2cmpltui r5, r6, 5 ; jalrp r15 } + { v2cmpltui r5, r6, 5 ; mtspr 0x5, r16 } + { v2cmpltui r5, r6, 5 ; st1 r15, r16 } + { v2cmpltui r5, r6, 5 ; v1shrs r15, r16, r17 } + { v2cmpltui r5, r6, 5 ; v4int_h r15, r16, r17 } + { v2cmpne r15, r16, r17 ; cmulfr r5, r6, r7 } + { v2cmpne r15, r16, r17 ; mul_ls_ls r5, r6, r7 } + { v2cmpne r15, r16, r17 ; shrux r5, r6, r7 } + { v2cmpne r15, r16, r17 ; v1mnz r5, r6, r7 } + { v2cmpne r15, r16, r17 ; v2mults r5, r6, r7 } + { v2cmpne r5, r6, r7 ; cmpeq r15, r16, r17 } + { v2cmpne r5, r6, r7 ; ld1s r15, r16 } + { v2cmpne r5, r6, r7 ; or r15, r16, r17 } + { v2cmpne r5, r6, r7 ; st4 r15, r16 } + { v2cmpne r5, r6, r7 ; v1sub r15, r16, r17 } + { v2cmpne r5, r6, r7 ; v4shlsc r15, r16, r17 } + { v2dotp r5, r6, r7 ; fetchor r15, r16, r17 } + { v2dotp r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + { v2dotp r5, r6, r7 ; shl2addx r15, r16, r17 } + { v2dotp r5, r6, r7 ; v1cmpltu r15, r16, r17 } + { v2dotp r5, r6, r7 ; v2packl r15, r16, r17 } + { v2dotpa r5, r6, r7 ; cmplts r15, r16, r17 } + { v2dotpa r5, r6, r7 ; ld2u r15, r16 } + { v2dotpa r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } + { v2dotpa r5, r6, r7 ; stnt2 r15, r16 } + { v2dotpa r5, r6, r7 ; v2cmpeqi r15, r16, 5 } + { v2dotpa r5, r6, r7 ; xor r15, r16, r17 } + { v2int_h r15, r16, r17 ; fdouble_add_flags r5, r6, r7 } + { v2int_h r15, r16, r17 ; mula_ls_ls r5, r6, r7 } + { v2int_h r15, r16, r17 ; v1add r5, r6, r7 } + { v2int_h r15, r16, r17 ; v1shrsi r5, r6, 5 } + { v2int_h r15, r16, r17 ; v2shli r5, r6, 5 } + { v2int_h r5, r6, r7 ; cmpne r15, r16, r17 } + { v2int_h r5, r6, r7 ; ld4u r15, r16 } + { v2int_h r5, r6, r7 ; prefetch_l1_fault r15 } + { v2int_h r5, r6, r7 ; stnt_add r15, r16, 5 } + { v2int_h r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + { v2int_l r15, r16, r17 ; addli r5, r6, 0x1234 } + { v2int_l r15, r16, r17 ; fdouble_pack2 r5, r6, r7 } + { v2int_l r15, r16, r17 ; mulx r5, r6, r7 } + { v2int_l r15, r16, r17 ; v1avgu r5, r6, r7 } + { v2int_l r15, r16, r17 ; v1subuc r5, r6, r7 } + { v2int_l r15, r16, r17 ; v2shru r5, r6, r7 } + { v2int_l r5, r6, r7 ; dtlbpr r15 } + { v2int_l r5, r6, r7 ; ldna_add r15, r16, 5 } + { v2int_l r5, r6, r7 ; prefetch_l3_fault r15 } + { v2int_l r5, r6, r7 ; v1add r15, r16, r17 } + { v2int_l r5, r6, r7 ; v2int_h r15, r16, r17 } + { v2maxs r15, r16, r17 ; addxsc r5, r6, r7 } + { v2maxs r15, r16, r17 ; fnop } + { v2maxs r15, r16, r17 ; or r5, r6, r7 } + { v2maxs r15, r16, r17 ; v1cmpleu r5, r6, r7 } + { v2maxs r15, r16, r17 ; v2adiffs r5, r6, r7 } + { v2maxs r15, r16, r17 ; v4add r5, r6, r7 } + { v2maxs r5, r6, r7 ; fetchadd4 r15, r16, r17 } + { v2maxs r5, r6, r7 ; ldnt1u r15, r16 } + { v2maxs r5, r6, r7 ; shl r15, r16, r17 } + { v2maxs r5, r6, r7 ; v1cmpeqi r15, r16, 5 } + { v2maxs r5, r6, r7 ; v2mins r15, r16, r17 } + { v2maxsi r15, r16, 5 ; bfextu r5, r6, 5, 7 } + { v2maxsi r15, r16, 5 ; fsingle_mul2 r5, r6, r7 } + { v2maxsi r15, r16, 5 ; revbytes r5, r6 } + { v2maxsi r15, r16, 5 ; v1cmpltui r5, r6, 5 } + { v2maxsi r15, r16, 5 ; v2cmples r5, r6, r7 } + { v2maxsi r15, r16, 5 ; v4packsc r5, r6, r7 } + { v2maxsi r5, r6, 5 ; fetchand4 r15, r16, r17 } + { v2maxsi r5, r6, 5 ; ldnt2u r15, r16 } + { v2maxsi r5, r6, 5 ; shl2add r15, r16, r17 } + { v2maxsi r5, r6, 5 ; v1cmpltsi r15, r16, 5 } + { v2maxsi r5, r6, 5 ; v2packh r15, r16, r17 } + { v2mins r15, r16, r17 ; cmovnez r5, r6, r7 } + { v2mins r15, r16, r17 ; info 19 } + { v2mins r15, r16, r17 ; shl16insli r5, r6, 0x1234 } + { v2mins r15, r16, r17 ; v1ddotpus r5, r6, r7 } + { v2mins r15, r16, r17 ; v2cmpltu r5, r6, r7 } + { v2mins r15, r16, r17 ; v4shru r5, r6, r7 } + { v2mins r5, r6, r7 ; flush r15 } + { v2mins r5, r6, r7 ; ldnt4u r15, r16 } + { v2mins r5, r6, r7 ; shli r15, r16, 5 } + { v2mins r5, r6, r7 ; v1int_h r15, r16, r17 } + { v2mins r5, r6, r7 ; v2shli r15, r16, 5 } + { v2minsi r15, r16, 5 ; cmpleu r5, r6, r7 } + { v2minsi r15, r16, 5 ; move r5, r6 } + { v2minsi r15, r16, 5 ; shl2addx r5, r6, r7 } + { v2minsi r15, r16, 5 ; v1dotpu r5, r6, r7 } + { v2minsi r15, r16, 5 ; v2dotpa r5, r6, r7 } + { v2minsi r15, r16, 5 ; xori r5, r6, 5 } + { v2minsi r5, r6, 5 ; ill } + { v2minsi r5, r6, 5 ; mf } + { v2minsi r5, r6, 5 ; shrsi r15, r16, 5 } + { v2minsi r5, r6, 5 ; v1minu r15, r16, r17 } + { v2minsi r5, r6, 5 ; v2shru r15, r16, r17 } + { v2mnz r15, r16, r17 ; cmpltui r5, r6, 5 } + { v2mnz r15, r16, r17 ; mul_hs_hu r5, r6, r7 } + { v2mnz r15, r16, r17 ; shlx r5, r6, r7 } + { v2mnz r15, r16, r17 ; v1int_h r5, r6, r7 } + { v2mnz r15, r16, r17 ; v2maxsi r5, r6, 5 } + { v2mnz r5, r6, r7 ; addx r15, r16, r17 } + { v2mnz r5, r6, r7 ; iret } + { v2mnz r5, r6, r7 ; movei r15, 5 } + { v2mnz r5, r6, r7 ; shruxi r15, r16, 5 } + { v2mnz r5, r6, r7 ; v1shl r15, r16, r17 } + { v2mnz r5, r6, r7 ; v4add r15, r16, r17 } + { v2mulfsc r5, r6, r7 ; fetchadd r15, r16, r17 } + { v2mulfsc r5, r6, r7 ; ldnt1s_add r15, r16, 5 } + { v2mulfsc r5, r6, r7 ; rotli r15, r16, 5 } + { v2mulfsc r5, r6, r7 ; v1cmpeq r15, r16, r17 } + { v2mulfsc r5, r6, r7 ; v2maxsi r15, r16, 5 } + { v2muls r5, r6, r7 ; cmpeq r15, r16, r17 } + { v2muls r5, r6, r7 ; ld1s r15, r16 } + { v2muls r5, r6, r7 ; or r15, r16, r17 } + { v2muls r5, r6, r7 ; st4 r15, r16 } + { v2muls r5, r6, r7 ; v1sub r15, r16, r17 } + { v2muls r5, r6, r7 ; v4shlsc r15, r16, r17 } + { v2mults r5, r6, r7 ; fetchor r15, r16, r17 } + { v2mults r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + { v2mults r5, r6, r7 ; shl2addx r15, r16, r17 } + { v2mults r5, r6, r7 ; v1cmpltu r15, r16, r17 } + { v2mults r5, r6, r7 ; v2packl r15, r16, r17 } + { v2mz r15, r16, r17 ; cmpeq r5, r6, r7 } + { v2mz r15, r16, r17 ; infol 0x1234 } + { v2mz r15, r16, r17 ; shl1add r5, r6, r7 } + { v2mz r15, r16, r17 ; v1ddotpusa r5, r6, r7 } + { v2mz r15, r16, r17 ; v2cmpltui r5, r6, 5 } + { v2mz r15, r16, r17 ; v4sub r5, r6, r7 } + { v2mz r5, r6, r7 ; flushwb } + { v2mz r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + { v2mz r5, r6, r7 ; shlx r15, r16, r17 } + { v2mz r5, r6, r7 ; v1int_l r15, r16, r17 } + { v2mz r5, r6, r7 ; v2shlsc r15, r16, r17 } + { v2packh r15, r16, r17 ; cmplts r5, r6, r7 } + { v2packh r15, r16, r17 ; movei r5, 5 } + { v2packh r15, r16, r17 ; shl3add r5, r6, r7 } + { v2packh r15, r16, r17 ; v1dotpua r5, r6, r7 } + { v2packh r15, r16, r17 ; v2int_h r5, r6, r7 } + { v2packh r5, r6, r7 ; add r15, r16, r17 } + { v2packh r5, r6, r7 ; info 19 } + { v2packh r5, r6, r7 ; mfspr r16, 0x5 } + { v2packh r5, r6, r7 ; shru r15, r16, r17 } + { v2packh r5, r6, r7 ; v1minui r15, r16, 5 } + { v2packh r5, r6, r7 ; v2shrui r15, r16, 5 } + { v2packl r15, r16, r17 ; cmpne r5, r6, r7 } + { v2packl r15, r16, r17 ; mul_hs_ls r5, r6, r7 } + { v2packl r15, r16, r17 ; shlxi r5, r6, 5 } + { v2packl r15, r16, r17 ; v1int_l r5, r6, r7 } + { v2packl r15, r16, r17 ; v2mins r5, r6, r7 } + { v2packl r5, r6, r7 ; addxi r15, r16, 5 } + { v2packl r5, r6, r7 ; jalr r15 } + { v2packl r5, r6, r7 ; moveli r15, 0x1234 } + { v2packl r5, r6, r7 ; st r15, r16 } + { v2packl r5, r6, r7 ; v1shli r15, r16, 5 } + { v2packl r5, r6, r7 ; v4addsc r15, r16, r17 } + { v2packuc r15, r16, r17 ; cmulf r5, r6, r7 } + { v2packuc r15, r16, r17 ; mul_hu_lu r5, r6, r7 } + { v2packuc r15, r16, r17 ; shrui r5, r6, 5 } + { v2packuc r15, r16, r17 ; v1minui r5, r6, 5 } + { v2packuc r15, r16, r17 ; v2muls r5, r6, r7 } + { v2packuc r5, r6, r7 ; andi r15, r16, 5 } + { v2packuc r5, r6, r7 ; ld r15, r16 } + { v2packuc r5, r6, r7 ; nor r15, r16, r17 } + { v2packuc r5, r6, r7 ; st2_add r15, r16, 5 } + { v2packuc r5, r6, r7 ; v1shrui r15, r16, 5 } + { v2packuc r5, r6, r7 ; v4shl r15, r16, r17 } + { v2sadas r5, r6, r7 ; fetchand4 r15, r16, r17 } + { v2sadas r5, r6, r7 ; ldnt2u r15, r16 } + { v2sadas r5, r6, r7 ; shl2add r15, r16, r17 } + { v2sadas r5, r6, r7 ; v1cmpltsi r15, r16, 5 } + { v2sadas r5, r6, r7 ; v2packh r15, r16, r17 } + { v2sadau r5, r6, r7 ; cmpleu r15, r16, r17 } + { v2sadau r5, r6, r7 ; ld2s_add r15, r16, 5 } + { v2sadau r5, r6, r7 ; prefetch_add_l2 r15, 5 } + { v2sadau r5, r6, r7 ; stnt1_add r15, r16, 5 } + { v2sadau r5, r6, r7 ; v2cmpeq r15, r16, r17 } + { v2sadau r5, r6, r7 ; wh64 r15 } + { v2sads r5, r6, r7 ; fnop } + { v2sads r5, r6, r7 ; ldnt_add r15, r16, 5 } + { v2sads r5, r6, r7 ; shlxi r15, r16, 5 } + { v2sads r5, r6, r7 ; v1maxu r15, r16, r17 } + { v2sads r5, r6, r7 ; v2shrs r15, r16, r17 } + { v2sadu r5, r6, r7 ; dblalign2 r15, r16, r17 } + { v2sadu r5, r6, r7 ; ld4u_add r15, r16, 5 } + { v2sadu r5, r6, r7 ; prefetch_l2 r15 } + { v2sadu r5, r6, r7 ; sub r15, r16, r17 } + { v2sadu r5, r6, r7 ; v2cmpltu r15, r16, r17 } + { v2shl r15, r16, r17 ; addx r5, r6, r7 } + { v2shl r15, r16, r17 ; fdouble_sub_flags r5, r6, r7 } + { v2shl r15, r16, r17 ; mz r5, r6, r7 } + { v2shl r15, r16, r17 ; v1cmpeq r5, r6, r7 } + { v2shl r15, r16, r17 ; v2add r5, r6, r7 } + { v2shl r15, r16, r17 ; v2shrui r5, r6, 5 } + { v2shl r5, r6, r7 ; exch r15, r16, r17 } + { v2shl r5, r6, r7 ; ldnt r15, r16 } + { v2shl r5, r6, r7 ; raise } + { v2shl r5, r6, r7 ; v1addi r15, r16, 5 } + { v2shl r5, r6, r7 ; v2int_l r15, r16, r17 } + { v2shli r15, r16, 5 ; and r5, r6, r7 } + { v2shli r15, r16, 5 ; fsingle_add1 r5, r6, r7 } + { v2shli r15, r16, 5 ; ori r5, r6, 5 } + { v2shli r15, r16, 5 ; v1cmplts r5, r6, r7 } + { v2shli r15, r16, 5 ; v2avgs r5, r6, r7 } + { v2shli r15, r16, 5 ; v4addsc r5, r6, r7 } + { v2shli r5, r6, 5 ; fetchaddgez r15, r16, r17 } + { v2shli r5, r6, 5 ; ldnt1u_add r15, r16, 5 } + { v2shli r5, r6, 5 ; shl16insli r15, r16, 0x1234 } + { v2shli r5, r6, 5 ; v1cmples r15, r16, r17 } + { v2shli r5, r6, 5 ; v2minsi r15, r16, 5 } + { v2shlsc r15, r16, r17 ; bfins r5, r6, 5, 7 } + { v2shlsc r15, r16, r17 ; fsingle_pack1 r5, r6 } + { v2shlsc r15, r16, r17 ; rotl r5, r6, r7 } + { v2shlsc r15, r16, r17 ; v1cmpne r5, r6, r7 } + { v2shlsc r15, r16, r17 ; v2cmpleu r5, r6, r7 } + { v2shlsc r15, r16, r17 ; v4shl r5, r6, r7 } + { v2shlsc r5, r6, r7 ; fetchor r15, r16, r17 } + { v2shlsc r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + { v2shlsc r5, r6, r7 ; shl2addx r15, r16, r17 } + { v2shlsc r5, r6, r7 ; v1cmpltu r15, r16, r17 } + { v2shlsc r5, r6, r7 ; v2packl r15, r16, r17 } + { v2shrs r15, r16, r17 ; cmpeq r5, r6, r7 } + { v2shrs r15, r16, r17 ; infol 0x1234 } + { v2shrs r15, r16, r17 ; shl1add r5, r6, r7 } + { v2shrs r15, r16, r17 ; v1ddotpusa r5, r6, r7 } + { v2shrs r15, r16, r17 ; v2cmpltui r5, r6, 5 } + { v2shrs r15, r16, r17 ; v4sub r5, r6, r7 } + { v2shrs r5, r6, r7 ; flushwb } + { v2shrs r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + { v2shrs r5, r6, r7 ; shlx r15, r16, r17 } + { v2shrs r5, r6, r7 ; v1int_l r15, r16, r17 } + { v2shrs r5, r6, r7 ; v2shlsc r15, r16, r17 } + { v2shrsi r15, r16, 5 ; cmplts r5, r6, r7 } + { v2shrsi r15, r16, 5 ; movei r5, 5 } + { v2shrsi r15, r16, 5 ; shl3add r5, r6, r7 } + { v2shrsi r15, r16, 5 ; v1dotpua r5, r6, r7 } + { v2shrsi r15, r16, 5 ; v2int_h r5, r6, r7 } + { v2shrsi r5, r6, 5 ; add r15, r16, r17 } + { v2shrsi r5, r6, 5 ; info 19 } + { v2shrsi r5, r6, 5 ; mfspr r16, 0x5 } + { v2shrsi r5, r6, 5 ; shru r15, r16, r17 } + { v2shrsi r5, r6, 5 ; v1minui r15, r16, 5 } + { v2shrsi r5, r6, 5 ; v2shrui r15, r16, 5 } + { v2shru r15, r16, r17 ; cmpne r5, r6, r7 } + { v2shru r15, r16, r17 ; mul_hs_ls r5, r6, r7 } + { v2shru r15, r16, r17 ; shlxi r5, r6, 5 } + { v2shru r15, r16, r17 ; v1int_l r5, r6, r7 } + { v2shru r15, r16, r17 ; v2mins r5, r6, r7 } + { v2shru r5, r6, r7 ; addxi r15, r16, 5 } + { v2shru r5, r6, r7 ; jalr r15 } + { v2shru r5, r6, r7 ; moveli r15, 0x1234 } + { v2shru r5, r6, r7 ; st r15, r16 } + { v2shru r5, r6, r7 ; v1shli r15, r16, 5 } + { v2shru r5, r6, r7 ; v4addsc r15, r16, r17 } + { v2shrui r15, r16, 5 ; cmulf r5, r6, r7 } + { v2shrui r15, r16, 5 ; mul_hu_lu r5, r6, r7 } + { v2shrui r15, r16, 5 ; shrui r5, r6, 5 } + { v2shrui r15, r16, 5 ; v1minui r5, r6, 5 } + { v2shrui r15, r16, 5 ; v2muls r5, r6, r7 } + { v2shrui r5, r6, 5 ; andi r15, r16, 5 } + { v2shrui r5, r6, 5 ; ld r15, r16 } + { v2shrui r5, r6, 5 ; nor r15, r16, r17 } + { v2shrui r5, r6, 5 ; st2_add r15, r16, 5 } + { v2shrui r5, r6, 5 ; v1shrui r15, r16, 5 } + { v2shrui r5, r6, 5 ; v4shl r15, r16, r17 } + { v2sub r15, r16, r17 ; crc32_32 r5, r6, r7 } + { v2sub r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { v2sub r15, r16, r17 ; sub r5, r6, r7 } + { v2sub r15, r16, r17 ; v1mulus r5, r6, r7 } + { v2sub r15, r16, r17 ; v2packl r5, r6, r7 } + { v2sub r5, r6, r7 ; cmpexch4 r15, r16, r17 } + { v2sub r5, r6, r7 ; ld1u_add r15, r16, 5 } + { v2sub r5, r6, r7 ; prefetch_add_l1 r15, 5 } + { v2sub r5, r6, r7 ; stnt r15, r16 } + { v2sub r5, r6, r7 ; v2addi r15, r16, 5 } + { v2sub r5, r6, r7 ; v4sub r15, r16, r17 } + { v2subsc r15, r16, r17 ; dblalign2 r5, r6, r7 } + { v2subsc r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { v2subsc r15, r16, r17 ; tblidxb1 r5, r6 } + { v2subsc r15, r16, r17 ; v1shl r5, r6, r7 } + { v2subsc r15, r16, r17 ; v2sads r5, r6, r7 } + { v2subsc r5, r6, r7 ; cmpltsi r15, r16, 5 } + { v2subsc r5, r6, r7 ; ld2u_add r15, r16, 5 } + { v2subsc r5, r6, r7 ; prefetch_add_l3 r15, 5 } + { v2subsc r5, r6, r7 ; stnt2_add r15, r16, 5 } + { v2subsc r5, r6, r7 ; v2cmples r15, r16, r17 } + { v2subsc r5, r6, r7 ; xori r15, r16, 5 } + { v4add r15, r16, r17 ; fdouble_addsub r5, r6, r7 } + { v4add r15, r16, r17 ; mula_ls_lu r5, r6, r7 } + { v4add r15, r16, r17 ; v1addi r5, r6, 5 } + { v4add r15, r16, r17 ; v1shru r5, r6, r7 } + { v4add r15, r16, r17 ; v2shlsc r5, r6, r7 } + { v4add r5, r6, r7 ; dblalign2 r15, r16, r17 } + { v4add r5, r6, r7 ; ld4u_add r15, r16, 5 } + { v4add r5, r6, r7 ; prefetch_l2 r15 } + { v4add r5, r6, r7 ; sub r15, r16, r17 } + { v4add r5, r6, r7 ; v2cmpltu r15, r16, r17 } + { v4addsc r15, r16, r17 ; addx r5, r6, r7 } + { v4addsc r15, r16, r17 ; fdouble_sub_flags r5, r6, r7 } + { v4addsc r15, r16, r17 ; mz r5, r6, r7 } + { v4addsc r15, r16, r17 ; v1cmpeq r5, r6, r7 } + { v4addsc r15, r16, r17 ; v2add r5, r6, r7 } + { v4addsc r15, r16, r17 ; v2shrui r5, r6, 5 } + { v4addsc r5, r6, r7 ; exch r15, r16, r17 } + { v4addsc r5, r6, r7 ; ldnt r15, r16 } + { v4addsc r5, r6, r7 ; raise } + { v4addsc r5, r6, r7 ; v1addi r15, r16, 5 } + { v4addsc r5, r6, r7 ; v2int_l r15, r16, r17 } + { v4int_h r15, r16, r17 ; and r5, r6, r7 } + { v4int_h r15, r16, r17 ; fsingle_add1 r5, r6, r7 } + { v4int_h r15, r16, r17 ; ori r5, r6, 5 } + { v4int_h r15, r16, r17 ; v1cmplts r5, r6, r7 } + { v4int_h r15, r16, r17 ; v2avgs r5, r6, r7 } + { v4int_h r15, r16, r17 ; v4addsc r5, r6, r7 } + { v4int_h r5, r6, r7 ; fetchaddgez r15, r16, r17 } + { v4int_h r5, r6, r7 ; ldnt1u_add r15, r16, 5 } + { v4int_h r5, r6, r7 ; shl16insli r15, r16, 0x1234 } + { v4int_h r5, r6, r7 ; v1cmples r15, r16, r17 } + { v4int_h r5, r6, r7 ; v2minsi r15, r16, 5 } + { v4int_l r15, r16, r17 ; bfins r5, r6, 5, 7 } + { v4int_l r15, r16, r17 ; fsingle_pack1 r5, r6 } + { v4int_l r15, r16, r17 ; rotl r5, r6, r7 } + { v4int_l r15, r16, r17 ; v1cmpne r5, r6, r7 } + { v4int_l r15, r16, r17 ; v2cmpleu r5, r6, r7 } + { v4int_l r15, r16, r17 ; v4shl r5, r6, r7 } + { v4int_l r5, r6, r7 ; fetchor r15, r16, r17 } + { v4int_l r5, r6, r7 ; ldnt2u_add r15, r16, 5 } + { v4int_l r5, r6, r7 ; shl2addx r15, r16, r17 } + { v4int_l r5, r6, r7 ; v1cmpltu r15, r16, r17 } + { v4int_l r5, r6, r7 ; v2packl r15, r16, r17 } + { v4packsc r15, r16, r17 ; cmpeq r5, r6, r7 } + { v4packsc r15, r16, r17 ; infol 0x1234 } + { v4packsc r15, r16, r17 ; shl1add r5, r6, r7 } + { v4packsc r15, r16, r17 ; v1ddotpusa r5, r6, r7 } + { v4packsc r15, r16, r17 ; v2cmpltui r5, r6, 5 } + { v4packsc r15, r16, r17 ; v4sub r5, r6, r7 } + { v4packsc r5, r6, r7 ; flushwb } + { v4packsc r5, r6, r7 ; ldnt4u_add r15, r16, 5 } + { v4packsc r5, r6, r7 ; shlx r15, r16, r17 } + { v4packsc r5, r6, r7 ; v1int_l r15, r16, r17 } + { v4packsc r5, r6, r7 ; v2shlsc r15, r16, r17 } + { v4shl r15, r16, r17 ; cmplts r5, r6, r7 } + { v4shl r15, r16, r17 ; movei r5, 5 } + { v4shl r15, r16, r17 ; shl3add r5, r6, r7 } + { v4shl r15, r16, r17 ; v1dotpua r5, r6, r7 } + { v4shl r15, r16, r17 ; v2int_h r5, r6, r7 } + { v4shl r5, r6, r7 ; add r15, r16, r17 } + { v4shl r5, r6, r7 ; info 19 } + { v4shl r5, r6, r7 ; mfspr r16, 0x5 } + { v4shl r5, r6, r7 ; shru r15, r16, r17 } + { v4shl r5, r6, r7 ; v1minui r15, r16, 5 } + { v4shl r5, r6, r7 ; v2shrui r15, r16, 5 } + { v4shlsc r15, r16, r17 ; cmpne r5, r6, r7 } + { v4shlsc r15, r16, r17 ; mul_hs_ls r5, r6, r7 } + { v4shlsc r15, r16, r17 ; shlxi r5, r6, 5 } + { v4shlsc r15, r16, r17 ; v1int_l r5, r6, r7 } + { v4shlsc r15, r16, r17 ; v2mins r5, r6, r7 } + { v4shlsc r5, r6, r7 ; addxi r15, r16, 5 } + { v4shlsc r5, r6, r7 ; jalr r15 } + { v4shlsc r5, r6, r7 ; moveli r15, 0x1234 } + { v4shlsc r5, r6, r7 ; st r15, r16 } + { v4shlsc r5, r6, r7 ; v1shli r15, r16, 5 } + { v4shlsc r5, r6, r7 ; v4addsc r15, r16, r17 } + { v4shrs r15, r16, r17 ; cmulf r5, r6, r7 } + { v4shrs r15, r16, r17 ; mul_hu_lu r5, r6, r7 } + { v4shrs r15, r16, r17 ; shrui r5, r6, 5 } + { v4shrs r15, r16, r17 ; v1minui r5, r6, 5 } + { v4shrs r15, r16, r17 ; v2muls r5, r6, r7 } + { v4shrs r5, r6, r7 ; andi r15, r16, 5 } + { v4shrs r5, r6, r7 ; ld r15, r16 } + { v4shrs r5, r6, r7 ; nor r15, r16, r17 } + { v4shrs r5, r6, r7 ; st2_add r15, r16, 5 } + { v4shrs r5, r6, r7 ; v1shrui r15, r16, 5 } + { v4shrs r5, r6, r7 ; v4shl r15, r16, r17 } + { v4shru r15, r16, r17 ; crc32_32 r5, r6, r7 } + { v4shru r15, r16, r17 ; mula_hs_hs r5, r6, r7 } + { v4shru r15, r16, r17 ; sub r5, r6, r7 } + { v4shru r15, r16, r17 ; v1mulus r5, r6, r7 } + { v4shru r15, r16, r17 ; v2packl r5, r6, r7 } + { v4shru r5, r6, r7 ; cmpexch4 r15, r16, r17 } + { v4shru r5, r6, r7 ; ld1u_add r15, r16, 5 } + { v4shru r5, r6, r7 ; prefetch_add_l1 r15, 5 } + { v4shru r5, r6, r7 ; stnt r15, r16 } + { v4shru r5, r6, r7 ; v2addi r15, r16, 5 } + { v4shru r5, r6, r7 ; v4sub r15, r16, r17 } + { v4sub r15, r16, r17 ; dblalign2 r5, r6, r7 } + { v4sub r15, r16, r17 ; mula_hu_hu r5, r6, r7 } + { v4sub r15, r16, r17 ; tblidxb1 r5, r6 } + { v4sub r15, r16, r17 ; v1shl r5, r6, r7 } + { v4sub r15, r16, r17 ; v2sads r5, r6, r7 } + { v4sub r5, r6, r7 ; cmpltsi r15, r16, 5 } + { v4sub r5, r6, r7 ; ld2u_add r15, r16, 5 } + { v4sub r5, r6, r7 ; prefetch_add_l3 r15, 5 } + { v4sub r5, r6, r7 ; stnt2_add r15, r16, 5 } + { v4sub r5, r6, r7 ; v2cmples r15, r16, r17 } + { v4sub r5, r6, r7 ; xori r15, r16, 5 } + { v4subsc r15, r16, r17 ; fdouble_addsub r5, r6, r7 } + { v4subsc r15, r16, r17 ; mula_ls_lu r5, r6, r7 } + { v4subsc r15, r16, r17 ; v1addi r5, r6, 5 } + { v4subsc r15, r16, r17 ; v1shru r5, r6, r7 } + { v4subsc r15, r16, r17 ; v2shlsc r5, r6, r7 } + { v4subsc r5, r6, r7 ; dblalign2 r15, r16, r17 } + { v4subsc r5, r6, r7 ; ld4u_add r15, r16, 5 } + { v4subsc r5, r6, r7 ; prefetch_l2 r15 } + { v4subsc r5, r6, r7 ; sub r15, r16, r17 } + { v4subsc r5, r6, r7 ; v2cmpltu r15, r16, r17 } + { wh64 r15 ; addx r5, r6, r7 } + { wh64 r15 ; fdouble_sub_flags r5, r6, r7 } + { wh64 r15 ; mz r5, r6, r7 } + { wh64 r15 ; v1cmpeq r5, r6, r7 } + { wh64 r15 ; v2add r5, r6, r7 } + { wh64 r15 ; v2shrui r5, r6, 5 } + { xor r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 } + { xor r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 } + { xor r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 } + { xor r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 } + { xor r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 } + { xor r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 } + { xor r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 } + { xor r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 } + { xor r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 } + { xor r15, r16, r17 ; fnop ; st r25, r26 } + { xor r15, r16, r17 ; info 19 ; prefetch_l2 r25 } + { xor r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 } + { xor r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 } + { xor r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 } + { xor r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 } + { xor r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 } + { xor r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 } + { xor r15, r16, r17 ; ld2u r25, r26 ; fnop } + { xor r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 } + { xor r15, r16, r17 ; ld4s r25, r26 ; nop } + { xor r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 } + { xor r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 } + { xor r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 } + { xor r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 } + { xor r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 } + { xor r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 } + { xor r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 } + { xor r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 } + { xor r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 } + { xor r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 } + { xor r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 } + { xor r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 } + { xor r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 } + { xor r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 } + { xor r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 } + { xor r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 } + { xor r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 } + { xor r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 } + { xor r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 } + { xor r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 } + { xor r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 } + { xor r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 } + { xor r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 } + { xor r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 } + { xor r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 } + { xor r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 } + { xor r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 } + { xor r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 } + { xor r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 } + { xor r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 } + { xor r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 } + { xor r15, r16, r17 ; st1 r25, r26 ; fnop } + { xor r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 } + { xor r15, r16, r17 ; st2 r25, r26 ; nop } + { xor r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 } + { xor r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 } + { xor r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 } + { xor r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 } + { xor r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 } + { xor r15, r16, r17 ; v1mz r5, r6, r7 } + { xor r15, r16, r17 ; v2packuc r5, r6, r7 } + { xor r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 } + { xor r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } + { xor r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 } + { xor r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } + { xor r5, r6, r7 ; cmpexch r15, r16, r17 } + { xor r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } + { xor r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 } + { xor r5, r6, r7 ; dtlbpr r15 } + { xor r5, r6, r7 ; ill ; ld4u r25, r26 } + { xor r5, r6, r7 ; jalr r15 ; ld4s r25, r26 } + { xor r5, r6, r7 ; jr r15 ; prefetch r25 } + { xor r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 } + { xor r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 } + { xor r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 } + { xor r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 } + { xor r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 } + { xor r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 } + { xor r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 } + { xor r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 } + { xor r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 } + { xor r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 } + { xor r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 } + { xor r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 } + { xor r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 } + { xor r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 } + { xor r5, r6, r7 ; prefetch_add_l3_fault r15, 5 } + { xor r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 } + { xor r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 } + { xor r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 } + { xor r5, r6, r7 ; prefetch_l2_fault r25 ; fnop } + { xor r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 } + { xor r5, r6, r7 ; prefetch_l3 r25 } + { xor r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 } + { xor r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } + { xor r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 } + { xor r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 } + { xor r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 } + { xor r5, r6, r7 ; shli r15, r16, 5 } + { xor r5, r6, r7 ; shrsi r15, r16, 5 } + { xor r5, r6, r7 ; shruxi r15, r16, 5 } + { xor r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 } + { xor r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 } + { xor r5, r6, r7 ; st2 r25, r26 ; lnk r15 } + { xor r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 } + { xor r5, r6, r7 ; stnt2 r15, r16 } + { xor r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 } + { xor r5, r6, r7 ; v2cmpltsi r15, r16, 5 } + { xor r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 } + { xori r15, r16, 5 ; cmul r5, r6, r7 } + { xori r15, r16, 5 ; mul_hs_lu r5, r6, r7 } + { xori r15, r16, 5 ; shrs r5, r6, r7 } + { xori r15, r16, 5 ; v1maxu r5, r6, r7 } + { xori r15, r16, 5 ; v2minsi r5, r6, 5 } + { xori r5, r6, 5 ; addxli r15, r16, 0x1234 } + { xori r5, r6, 5 ; jalrp r15 } + { xori r5, r6, 5 ; mtspr 0x5, r16 } + { xori r5, r6, 5 ; st1 r15, r16 } + { xori r5, r6, 5 ; v1shrs r15, r16, r17 } + { xori r5, r6, 5 ; v4int_h r15, r16, r17 } diff --git a/gas/testsuite/gas/tilegx/tilegx.exp b/gas/testsuite/gas/tilegx/tilegx.exp new file mode 100644 index 0000000..1bf6b4e --- /dev/null +++ b/gas/testsuite/gas/tilegx/tilegx.exp @@ -0,0 +1,23 @@ +# Expect script for TILE-Gx assembler tests. +# Copyright 2011 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +if [istarget tilegx-*-*] { + run_dump_test "t_insns" +} diff --git a/gas/testsuite/gas/tilepro/t_constants.d b/gas/testsuite/gas/tilepro/t_constants.d new file mode 100644 index 0000000..c3ee25f --- /dev/null +++ b/gas/testsuite/gas/tilepro/t_constants.d @@ -0,0 +1,262 @@ +#as: +#objdump: --section .data -w -s -z + +.*: file format .* + +Contents of section .data: + 0000 37000000 00000000 3839c600 00010203 .* + 0010 04050607 08090a0b 0c0d0e0f 10111213 .* + 0020 14151617 18191a1b 1c1d1e1f 20212223 .* + 0030 24252627 28292a2b 2c2d2e2f 30313233 .* + 0040 34353637 38393a3b 3c3d3e3f 40414243 .* + 0050 44454647 48494a4b 4c4d4e4f 50515253 .* + 0060 54555657 58595a5b 5c5d5e5f 60616263 .* + 0070 64656667 68696a6b 6c6d6e6f 70717273 .* + 0080 74757677 78797a7b 7c7d7e7f 80818283 .* + 0090 84858687 88898a8b 8c8d8e8f 90919293 .* + 00a0 94959697 98999a9b 9c9d9e9f a0a1a2a3 .* + 00b0 a4a5a6a7 a8a9aaab acadaeaf b0b1b2b3 .* + 00c0 b4b5b6b7 b8b9babb bcbdbebf c0c1c2c3 .* + 00d0 c4c5c6c7 c8c9cacb cccdcecf d0d1d2d3 .* + 00e0 d4d5d6d7 d8d9dadb dcdddedf e0e1e2e3 .* + 00f0 e4e5e6e7 e8e9eaeb ecedeeef f0f1f2f3 .* + 0100 f4f5f6f7 f8f9fafb fcfdfeff 00001100 .* + 0110 22003300 44005500 ed07fe07 0f082008 .* + 0120 31084208 da0feb0f fc0f0d10 1e102f10 .* + 0130 c717d817 e917fa17 0b181c18 b41fc51f .* + 0140 d61fe71f f81f0920 a127b227 c327d427 .* + 0150 e527f627 8e2f9f2f b02fc12f d22fe32f .* + 0160 7b378c37 9d37ae37 bf37d037 683f793f .* + 0170 8a3f9b3f ac3fbd3f 55476647 77478847 .* + 0180 9947aa47 424f534f 644f754f 864f974f .* + 0190 2f574057 51576257 73578457 1c5f2d5f .* + 01a0 3e5f4f5f 605f715f 09671a67 2b673c67 .* + 01b0 4d675e67 f66e076f 186f296f 3a6f4b6f .* + 01c0 e376f476 05771677 27773877 d07ee17e .* + 01d0 f27e037f 147f257f bd86ce86 df86f086 .* + 01e0 01871287 aa8ebb8e cc8edd8e ee8eff8e .* + 01f0 9796a896 b996ca96 db96ec96 849e959e .* + 0200 a69eb79e c89ed99e 71a682a6 93a6a4a6 .* + 0210 b5a6c6a6 5eae6fae 80ae91ae a2aeb3ae .* + 0220 4bb65cb6 6db67eb6 8fb6a0b6 38be49be .* + 0230 5abe6bbe 7cbe8dbe 25c636c6 47c658c6 .* + 0240 69c67ac6 12ce23ce 34ce45ce 56ce67ce .* + 0250 ffd510d6 21d632d6 43d654d6 ecddfddd .* + 0260 0ede1fde 30de41de d9e5eae5 fbe50ce6 .* + 0270 1de62ee6 c6edd7ed e8edf9ed 0aee1bee .* + 0280 b3f5c4f5 d5f5e6f5 f7f508f6 78563412 .* + 0290 5d2e2612 42061812 27de0912 3bf85f19 .* + 02a0 c8d45119 55b14319 e28d3519 fe998b20 .* + 02b0 337b7d20 685c6f20 9d3d6120 c13bb727 .* + 02c0 9e21a927 7b079b27 58ed8c27 84dde22e .* + 02d0 09c8d42e 8eb2c62e 139db82e 477f0e36 .* + 02e0 746e0036 a15df235 ce4ce435 0a213a3d .* + 02f0 df142c3d b4081e3d 89fc0f3d cdc26544 .* + 0300 4abb5744 c7b34944 44ac3b44 9064914b .* + 0310 b561834b da5e754b ff5b674b 5306bd52 .* + 0320 2008af52 ed09a152 ba0b9352 16a8e859 .* + 0330 8baeda59 00b5cc59 75bbbe59 d9491461 .* + 0340 f6540661 1360f860 306bea60 9ceb3f68 .* + 0350 61fb3168 260b2468 eb1a1668 5f8d6b6f .* + 0360 cca15d6f 39b64f6f a6ca416f 222f9776 .* + 0370 37488976 4c617b76 617a6d76 e5d0c27d .* + 0380 a2eeb47d 5f0ca77d 1c2a997d a872ee84 .* + 0390 0d95e084 72b7d284 d7d9c484 6b141a8c .* + 03a0 783b0c8c 8562fe8b 9289f08b 2eb64593 .* + 03b0 e3e13793 980d2a93 4d391c93 f157719a .* + 03c0 4e88639a abb8559a 08e9479a b4f99ca1 .* + 03d0 b92e8fa1 be6381a1 c39873a1 779bc8a8 .* + 03e0 24d5baa8 d10eada8 7e489fa8 3a3df4af .* + 03f0 8f7be6af e4b9d8af 39f8caaf fdde1fb7 .* + 0400 fa2112b7 f76404b7 f4a7f6b6 c0804bbe .* + 0410 65c83dbe 0a1030be af5722be 832277c5 .* + 0420 d06e69c5 1dbb5bc5 6a074ec5 46c4a2cc .* + 0430 3b1595cc 306687cc 25b779cc 0966ced3 .* + 0440 a6bbc0d3 4311b3d3 e066a5d3 cc07fada .* + 0450 1162ecda 56bcdeda 9b16d1da 8fa925e2 .* + 0460 7c0818e2 69670ae2 56c6fce1 524b51e9 .* + 0470 e7ae43e9 7c1236e9 117628e9 15ed7cf0 .* + 0480 52556ff0 8fbd61f0 cc2554f0 00010203 .* + 0490 04050607 08090a0b 0c0d0e0f 10111213 .* + 04a0 14151617 18191a1b 1c1d1e1f 20212223 .* + 04b0 24252627 28292a2b 2c2d2e2f 30313233 .* + 04c0 34353637 38393a3b 3c3d3e3f 40414243 .* + 04d0 44454647 48494a4b 4c4d4e4f 50515253 .* + 04e0 54555657 58595a5b 5c5d5e5f 60616263 .* + 04f0 64656667 68696a6b 6c6d6e6f 70717273 .* + 0500 74757677 78797a7b 7c7d7e7f 80818283 .* + 0510 84858687 88898a8b 8c8d8e8f 90919293 .* + 0520 94959697 98999a9b 9c9d9e9f a0a1a2a3 .* + 0530 a4a5a6a7 a8a9aaab acadaeaf b0b1b2b3 .* + 0540 b4b5b6b7 b8b9babb bcbdbebf c0c1c2c3 .* + 0550 c4c5c6c7 c8c9cacb cccdcecf d0d1d2d3 .* + 0560 d4d5d6d7 d8d9dadb dcdddedf e0e1e2e3 .* + 0570 e4e5e6e7 e8e9eaeb ecedeeef f0f1f2f3 .* + 0580 f4f5f6f7 f8f9fafb fcfdfeff 00001100 .* + 0590 22003300 44005500 ed07fe07 0f082008 .* + 05a0 31084208 da0feb0f fc0f0d10 1e102f10 .* + 05b0 c717d817 e917fa17 0b181c18 b41fc51f .* + 05c0 d61fe71f f81f0920 a127b227 c327d427 .* + 05d0 e527f627 8e2f9f2f b02fc12f d22fe32f .* + 05e0 7b378c37 9d37ae37 bf37d037 683f793f .* + 05f0 8a3f9b3f ac3fbd3f 55476647 77478847 .* + 0600 9947aa47 424f534f 644f754f 864f974f .* + 0610 2f574057 51576257 73578457 1c5f2d5f .* + 0620 3e5f4f5f 605f715f 09671a67 2b673c67 .* + 0630 4d675e67 f66e076f 186f296f 3a6f4b6f .* + 0640 e376f476 05771677 27773877 d07ee17e .* + 0650 f27e037f 147f257f bd86ce86 df86f086 .* + 0660 01871287 aa8ebb8e cc8edd8e ee8eff8e .* + 0670 9796a896 b996ca96 db96ec96 849e959e .* + 0680 a69eb79e c89ed99e 71a682a6 93a6a4a6 .* + 0690 b5a6c6a6 5eae6fae 80ae91ae a2aeb3ae .* + 06a0 4bb65cb6 6db67eb6 8fb6a0b6 38be49be .* + 06b0 5abe6bbe 7cbe8dbe 25c636c6 47c658c6 .* + 06c0 69c67ac6 12ce23ce 34ce45ce 56ce67ce .* + 06d0 ffd510d6 21d632d6 43d654d6 ecddfddd .* + 06e0 0ede1fde 30de41de d9e5eae5 fbe50ce6 .* + 06f0 1de62ee6 c6edd7ed e8edf9ed 0aee1bee .* + 0700 b3f5c4f5 d5f5e6f5 f7f508f6 78563412 .* + 0710 5d2e2612 42061812 27de0912 eb7a223d .* + 0720 554e143d bf21063d 29f5f73c 5e9f1068 .* + 0730 4d6e0268 3c3df467 2b0ce667 d1c3fe92 .* + 0740 458ef092 b958e292 2d23d492 44e8ecbd .* + 0750 3daedebd 3674d0bd 2f3ac2bd b70cdbe8 .* + 0760 35cecce8 b38fbee8 3151b0e8 2a31c913 .* + 0770 2deeba13 30abac13 33689e13 9d55b73e .* + 0780 250ea93e adc69a3e 357f8c3e 107aa569 .* + 0790 1d2e9769 2ae28869 37967a69 839e9394 .* + 07a0 154e8594 a7fd7694 39ad6894 f6c281bf .* + 07b0 0d6e73bf 241965bf 3bc456bf 69e76fea .* + 07c0 058e61ea a13453ea 3ddb44ea dc0b5e15 .* + 07d0 fdad4f15 1e504115 3ff23215 4f304c40 .* + 07e0 f5cd3d40 9b6b2f40 41092140 c2543a6b .* + 07f0 eded2b6b 18871d6b 43200f6b 35792896 .* + 0800 e50d1a96 95a20b96 4537fd95 a89d16c1 .* + 0810 dd2d08c1 12bef9c0 474eebc0 1bc204ec .* + 0820 d54df6eb 8fd9e7eb 4965d9eb 8ee6f216 .* + 0830 cd6de416 0cf5d516 4b7cc716 010be141 .* + 0840 c58dd241 8910c441 4d93b541 742fcf6c .* + 0850 bdadc06c 062cb26c 4faaa36c e753bd97 .* + 0860 b5cdae97 8347a097 51c19197 5a78abc2 .* + 0870 aded9cc2 00638ec2 53d87fc2 cd9c99ed .* + 0880 a50d8bed 7d7e7ced 55ef6ded 40c18718 .* + 0890 9d2d7918 fa996a18 57065c18 b3e57543 .* + 08a0 954d6743 77b55843 591d4a43 260a646e .* + 08b0 8d6d556e f4d0466e 5b34386e 992e5299 .* + 08c0 858d4399 71ec3499 5d4b2699 0c5340c4 .* + 08d0 7dad31c4 ee0723c4 5f6214c4 7f772eef .* + 08e0 75cd1fef 6b2311ef 617902ef f29b1c1a .* + 08f0 6ded0d1a e83eff19 6390f019 65c00a45 .* + 0900 650dfc44 655aed44 65a7de44 2241fc05 .* + 0910 d0f22bfa d0f22bfa 761afb05 6da739d4 .* + 0920 6da739d4 caf3f905 0a5c47ae 0a5c47ae .* + 0930 1ecdf805 a7105588 a7105588 52fe700c .* + 0940 bbafcef4 bbafcef4 82b1110c fd3ea6ce .* + 0950 fd3ea6ce b264b20b 3fce7da8 3fce7da8 .* + 0960 e217530b 815d5582 815d5582 82bbe512 .* + 0970 a66c71ef a66c71ef 8e482812 8dd612c9 .* + 0980 8dd612c9 9ad56a11 7440b4a2 7440b4a2 .* + 0990 a662ad10 5baa557c 5baa557c b2785a19 .* + 09a0 912914ea 912914ea 9adf3e18 1d6e7fc3 .* + 09b0 1d6e7fc3 82462317 a9b2ea9c a9b2ea9c .* + 09c0 6aad0716 35f75576 35f75576 e235cf1f .* + 09d0 7ce6b6e4 7ce6b6e4 a676551e ad05ecbd .* + 09e0 ad05ecbd 6ab7db1c de242197 de242197 .* + 09f0 2ef8611b 0f445670 0f445670 12f34326 .* + 0a00 67a359df 67a359df b20d6c24 3d9d58b8 .* + 0a10 3d9d58b8 52289422 13975791 13975791 .* + 0a20 f242bc20 e990566a e990566a 42b0b82c .* + 0a30 5260fcd9 5260fcd9 bea4822a cd34c5b2 .* + 0a40 cd34c5b2 3a994c28 48098e8b 48098e8b .* + 0a50 b68d1626 c3dd5664 c3dd5664 726d2d33 .* + 0a60 3d1d9fd4 3d1d9fd4 ca3b9930 5dcc31ad .* + 0a70 5dcc31ad 220a052e 7d7bc485 7d7bc485 .* + 0a80 7ad8702b 9d2a575e 9d2a575e a22aa239 .* + 0a90 28da41cf 28da41cf d6d2af36 ed639ea7 .* + 0aa0 ed639ea7 0a7bbd33 b2edfa7f b2edfa7f .* + 0ab0 3e23cb30 77775758 77775758 d2e71640 .* + 0ac0 1397e4c9 1397e4c9 e269c63c 7dfb0aa2 .* + 0ad0 7dfb0aa2 f2eb7539 e75f317a e75f317a .* + 0ae0 026e2536 51c45752 51c45752 02a58b46 .* + 0af0 fe5387c4 fe5387c4 ee00dd42 0d93779c .* + 0b00 0d93779c da5c2e3f 1cd26774 1cd26774 .* + 0b10 c6b87f3b 2b11584c 2b11584c 3262004d .* + 0b20 e9102abf e9102abf fa97f348 9d2ae496 .* + 0b30 9d2ae496 c2cde644 51449e6e 51449e6e .* + 0b40 8a03da40 055e5846 055e5846 621f7553 .* + 0b50 d4cdccb9 d4cdccb9 062f0a4f 2dc25091 .* + 0b60 2dc25091 aa3e9f4a 86b6d468 86b6d468 .* + 0b70 4e4e3446 dfaa5840 dfaa5840 92dce959 .* + 0b80 bf8a6fb4 bf8a6fb4 12c62055 bd59bd8b .* + 0b90 bd59bd8b 92af5750 bb280b63 bb280b63 .* + 0ba0 12998e4b b9f7583a b9f7583a c2995e60 .* + 0bb0 aa4712af aa4712af 1e5d375b 4df12986 .* + 0bc0 4df12986 7a201056 f09a415d f09a415d .* + 0bd0 d6e3e850 93445934 93445934 f256d366 .* + 0be0 9504b5a9 9504b5a9 2af44d61 dd889680 .* + 0bf0 dd889680 6291c85b 250d7857 250d7857 .* + 0c00 9a2e4356 6d91592e 6d91592e 2214486d .* + 0c10 80c157a4 80c157a4 368b6467 6d20037b .* + 0c20 6d20037b 4a028161 5a7fae51 5a7fae51 .* + 0c30 5e799d5b 47de5928 47de5928 52d1bc73 .* + 0c40 6b7efa9e 6b7efa9e 42227b6d fdb76f75 .* + 0c50 fdb76f75 32733967 8ff1e44b 8ff1e44b .* + 0c60 22c4f760 212b5a22 212b5a22 828e317a .* + 0c70 563b9d99 563b9d99 4eb99173 8d4fdc6f .* + 0c80 8d4fdc6f 1ae4f16c c4631b46 c4631b46 .* + 0c90 e60e5266 fb775a1c fb775a1c b24ba680 .* + 0ca0 41f83f94 41f83f94 5a50a879 1de7486a .* + 0cb0 1de7486a 0255aa72 f9d55140 f9d55140 .* + 0cc0 aa59ac6b d5c45a16 d5c45a16 e2081b87 .* + 0cd0 2cb5e28e 2cb5e28e 66e7be7f ad7eb564 .* + 0ce0 ad7eb564 eac56278 2e48883a 2e48883a .* + 0cf0 6ea40671 af115b10 af115b10 12c68f8d .* + 0d00 17728589 17728589 727ed585 3d16225f .* + 0d10 3d16225f d2361b7e 63babe34 63babe34 .* + 0d20 32ef6076 895e5b0a 895e5b0a 42830494 .* + 0d30 022f2884 022f2884 7e15ec8b cdad8e59 .* + 0d40 cdad8e59 baa7d383 982cf52e 982cf52e .* + 0d50 f639bb7b 63ab5b04 63ab5b04 7240799a .* + 0d60 edebca7e edebca7e 8aac0292 5d45fb53 .* + 0d70 5d45fb53 a2188c89 cd9e2b29 cd9e2b29 .* + 0d80 ba841581 3df85bfe 3df85bfe a2fdeda0 .* + 0d90 d8a86d79 d8a86d79 96431998 eddc674e .* + 0da0 eddc674e 8a89448f 02116223 02116223 .* + 0db0 7ecf6f86 17455cf8 17455cf8 d2ba62a7 .* + 0dc0 c3651074 c3651074 a2da2f9e 7d74d448 .* + 0dd0 7d74d448 72fafc94 3783981d 3783981d .* + 0de0 421aca8b f1915cf2 f1915cf2 0278d7ad .* + 0df0 ae22b36e ae22b36e ae7146a4 0d0c4143 .* + 0e00 0d0c4143 5a6bb59a 6cf5ce17 6cf5ce17 .* + 0e10 06652491 cbde5cec cbde5cec 32354cb4 .* + 0e20 99df5569 99df5569 ba085daa 9da3ad3d .* + 0e30 9da3ad3d 42dc6da0 a1670512 a1670512 .* + 0e40 caaf7e96 a52b5de6 a52b5de6 62f2c0ba .* + 0e50 849cf863 849cf863 c69f73b0 2d3b1a38 .* + 0e60 2d3b1a38 2a4d26a6 d6d93b0c d6d93b0c .* + 0e70 8efad89b 7f785de0 7f785de0 92af35c1 .* + 0e80 6f599b5e 6f599b5e d2368ab6 bdd28632 .* + 0e90 bdd28632 12bedeab 0b4c7206 0b4c7206 .* + 0ea0 524533a1 59c55dda 59c55dda c26caac7 .* + 0eb0 5a163e59 5a163e59 decda0bc 4d6af32c .* + 0ec0 4d6af32c fa2e97b1 40bea800 40bea800 .* + 0ed0 16908da6 33125ed4 33125ed4 f2291fce .* + 0ee0 45d3e053 45d3e053 ea64b7c2 dd016027 .* + 0ef0 dd016027 e29f4fb7 7530dffa 7530dffa .* + 0f00 dadae7ab 0d5f5ece 0d5f5ece 00000000 .* + 0f10 00000000 00000000 00000000 00000000 .* + 0f20 00000000 00000000 00000000 00000000 .* + 0f30 00000000 00000000 00000000 00000000 .* + 0f40 00000000 00000000 00000000 00000000 .* + 0f50 00000000 00000000 00000000 00000000 .* + 0f60 00000000 00000000 00000000 00000000 .* + 0f70 00000000 00000000 00000000 00000000 .* + 0f80 00000000 00000000 00000000 00000000 .* + 0f90 00000000 00000000 00000000 00000000 .* + 0fa0 00000000 00000000 00000000 00000000 .* + 0fb0 00000000 00000000 00000000 00000000 .* + 0fc0 00000000 00000000 00000000 00000000 .* + 0fd0 00000000 00000000 00000000 00000000 .* + 0fe0 00000000 00000000 00000000 00000000 .* + 0ff0 00000000 00000000 00000000 00000000 .* diff --git a/gas/testsuite/gas/tilepro/t_constants.s b/gas/testsuite/gas/tilepro/t_constants.s new file mode 100644 index 0000000..bf36a25 --- /dev/null +++ b/gas/testsuite/gas/tilepro/t_constants.s @@ -0,0 +1,639 @@ + .text + .global _start +_start: + .data + .align 1024 +label_1: + .byte 0x37 + .align 8 + .byte 0x38 + .byte 0x39 + .byte -0x3A + .align 4 +label_2: + .byte 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 + .byte 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F + .byte 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17 + .byte 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F + .byte 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27 + .byte 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F + .byte 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37 + .byte 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F + .byte 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47 + .byte 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F + .byte 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57 + .byte 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F + .byte 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67 + .byte 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F + .byte 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77 + .byte 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F + .byte 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87 + .byte 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F + .byte 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97 + .byte 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F + .byte 0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7 + .byte 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF + .byte 0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7 + .byte 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF + .byte 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7 + .byte 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF + .byte 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7 + .byte 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF + .byte 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7 + .byte 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF + .byte 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7 + .byte 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF + + .short 0x0000, 0x0011, 0x0022, 0x0033, 0x0044, 0x0055 + .short 0x07ED, 0x07FE, 0x080F, 0x0820, 0x0831, 0x0842 + .short 0x0FDA, 0x0FEB, 0x0FFC, 0x100D, 0x101E, 0x102F + .short 0x17C7, 0x17D8, 0x17E9, 0x17FA, 0x180B, 0x181C + .short 0x1FB4, 0x1FC5, 0x1FD6, 0x1FE7, 0x1FF8, 0x2009 + .short 0x27A1, 0x27B2, 0x27C3, 0x27D4, 0x27E5, 0x27F6 + .short 0x2F8E, 0x2F9F, 0x2FB0, 0x2FC1, 0x2FD2, 0x2FE3 + .short 0x377B, 0x378C, 0x379D, 0x37AE, 0x37BF, 0x37D0 + .short 0x3F68, 0x3F79, 0x3F8A, 0x3F9B, 0x3FAC, 0x3FBD + .short 0x4755, 0x4766, 0x4777, 0x4788, 0x4799, 0x47AA + .short 0x4F42, 0x4F53, 0x4F64, 0x4F75, 0x4F86, 0x4F97 + .short 0x572F, 0x5740, 0x5751, 0x5762, 0x5773, 0x5784 + .short 0x5F1C, 0x5F2D, 0x5F3E, 0x5F4F, 0x5F60, 0x5F71 + .short 0x6709, 0x671A, 0x672B, 0x673C, 0x674D, 0x675E + .short 0x6EF6, 0x6F07, 0x6F18, 0x6F29, 0x6F3A, 0x6F4B + .short 0x76E3, 0x76F4, 0x7705, 0x7716, 0x7727, 0x7738 + .short 0x7ED0, 0x7EE1, 0x7EF2, 0x7F03, 0x7F14, 0x7F25 + .short 0x86BD, 0x86CE, 0x86DF, 0x86F0, 0x8701, 0x8712 + .short 0x8EAA, 0x8EBB, 0x8ECC, 0x8EDD, 0x8EEE, 0x8EFF + .short 0x9697, 0x96A8, 0x96B9, 0x96CA, 0x96DB, 0x96EC + .short 0x9E84, 0x9E95, 0x9EA6, 0x9EB7, 0x9EC8, 0x9ED9 + .short 0xA671, 0xA682, 0xA693, 0xA6A4, 0xA6B5, 0xA6C6 + .short 0xAE5E, 0xAE6F, 0xAE80, 0xAE91, 0xAEA2, 0xAEB3 + .short 0xB64B, 0xB65C, 0xB66D, 0xB67E, 0xB68F, 0xB6A0 + .short 0xBE38, 0xBE49, 0xBE5A, 0xBE6B, 0xBE7C, 0xBE8D + .short 0xC625, 0xC636, 0xC647, 0xC658, 0xC669, 0xC67A + .short 0xCE12, 0xCE23, 0xCE34, 0xCE45, 0xCE56, 0xCE67 + .short 0xD5FF, 0xD610, 0xD621, 0xD632, 0xD643, 0xD654 + .short 0xDDEC, 0xDDFD, 0xDE0E, 0xDE1F, 0xDE30, 0xDE41 + .short 0xE5D9, 0xE5EA, 0xE5FB, 0xE60C, 0xE61D, 0xE62E + .short 0xEDC6, 0xEDD7, 0xEDE8, 0xEDF9, 0xEE0A, 0xEE1B + .short 0xF5B3, 0xF5C4, 0xF5D5, 0xF5E6, 0xF5F7, 0xF608 + + .word 0x12345678, 0x12262E5D, 0x12180642, 0x1209DE27 + .word 0x195FF83B, 0x1951D4C8, 0x1943B155, 0x19358DE2 + .word 0x208B99FE, 0x207D7B33, 0x206F5C68, 0x20613D9D + .word 0x27B73BC1, 0x27A9219E, 0x279B077B, 0x278CED58 + .word 0x2EE2DD84, 0x2ED4C809, 0x2EC6B28E, 0x2EB89D13 + .word 0x360E7F47, 0x36006E74, 0x35F25DA1, 0x35E44CCE + .word 0x3D3A210A, 0x3D2C14DF, 0x3D1E08B4, 0x3D0FFC89 + .word 0x4465C2CD, 0x4457BB4A, 0x4449B3C7, 0x443BAC44 + .word 0x4B916490, 0x4B8361B5, 0x4B755EDA, 0x4B675BFF + .word 0x52BD0653, 0x52AF0820, 0x52A109ED, 0x52930BBA + .word 0x59E8A816, 0x59DAAE8B, 0x59CCB500, 0x59BEBB75 + .word 0x611449D9, 0x610654F6, 0x60F86013, 0x60EA6B30 + .word 0x683FEB9C, 0x6831FB61, 0x68240B26, 0x68161AEB + .word 0x6F6B8D5F, 0x6F5DA1CC, 0x6F4FB639, 0x6F41CAA6 + .word 0x76972F22, 0x76894837, 0x767B614C, 0x766D7A61 + .word 0x7DC2D0E5, 0x7DB4EEA2, 0x7DA70C5F, 0x7D992A1C + .word 0x84EE72A8, 0x84E0950D, 0x84D2B772, 0x84C4D9D7 + .word 0x8C1A146B, 0x8C0C3B78, 0x8BFE6285, 0x8BF08992 + .word 0x9345B62E, 0x9337E1E3, 0x932A0D98, 0x931C394D + .word 0x9A7157F1, 0x9A63884E, 0x9A55B8AB, 0x9A47E908 + .word 0xA19CF9B4, 0xA18F2EB9, 0xA18163BE, 0xA17398C3 + .word 0xA8C89B77, 0xA8BAD524, 0xA8AD0ED1, 0xA89F487E + .word 0xAFF43D3A, 0xAFE67B8F, 0xAFD8B9E4, 0xAFCAF839 + .word 0xB71FDEFD, 0xB71221FA, 0xB70464F7, 0xB6F6A7F4 + .word 0xBE4B80C0, 0xBE3DC865, 0xBE30100A, 0xBE2257AF + .word 0xC5772283, 0xC5696ED0, 0xC55BBB1D, 0xC54E076A + .word 0xCCA2C446, 0xCC95153B, 0xCC876630, 0xCC79B725 + .word 0xD3CE6609, 0xD3C0BBA6, 0xD3B31143, 0xD3A566E0 + .word 0xDAFA07CC, 0xDAEC6211, 0xDADEBC56, 0xDAD1169B + .word 0xE225A98F, 0xE218087C, 0xE20A6769, 0xE1FCC656 + .word 0xE9514B52, 0xE943AEE7, 0xE936127C, 0xE9287611 + .word 0xF07CED15, 0xF06F5552, 0xF061BD8F, 0xF05425CC + + .byte 0, 1, 2, 3, 4, 5, 6, 7 + .byte 8, 9, 10, 11, 12, 13, 14, 15 + .byte 16, 17, 18, 19, 20, 21, 22, 23 + .byte 24, 25, 26, 27, 28, 29, 30, 31 + .byte 32, 33, 34, 35, 36, 37, 38, 39 + .byte 40, 41, 42, 43, 44, 45, 46, 47 + .byte 48, 49, 50, 51, 52, 53, 54, 55 + .byte 56, 57, 58, 59, 60, 61, 62, 63 + .byte 64, 65, 66, 67, 68, 69, 70, 71 + .byte 72, 73, 74, 75, 76, 77, 78, 79 + .byte 80, 81, 82, 83, 84, 85, 86, 87 + .byte 88, 89, 90, 91, 92, 93, 94, 95 + .byte 96, 97, 98, 99, 100, 101, 102, 103 + .byte 104, 105, 106, 107, 108, 109, 110, 111 + .byte 112, 113, 114, 115, 116, 117, 118, 119 + .byte 120, 121, 122, 123, 124, 125, 126, 127 + .byte -128, -127, -126, -125, -124, -123, -122, -121 + .byte -120, -119, -118, -117, -116, -115, -114, -113 + .byte -112, -111, -110, -109, -108, -107, -106, -105 + .byte -104, -103, -102, -101, -100, -99, -98, -97 + .byte -96, -95, -94, -93, -92, -91, -90, -89 + .byte -88, -87, -86, -85, -84, -83, -82, -81 + .byte -80, -79, -78, -77, -76, -75, -74, -73 + .byte -72, -71, -70, -69, -68, -67, -66, -65 + .byte -64, -63, -62, -61, -60, -59, -58, -57 + .byte -56, -55, -54, -53, -52, -51, -50, -49 + .byte -48, -47, -46, -45, -44, -43, -42, -41 + .byte -40, -39, -38, -37, -36, -35, -34, -33 + .byte -32, -31, -30, -29, -28, -27, -26, -25 + .byte -24, -23, -22, -21, -20, -19, -18, -17 + .byte -16, -15, -14, -13, -12, -11, -10, -9 + .byte -8, -7, -6, -5, -4, -3, -2, -1 + + .short 0, 17, 34, 51, 68, 85 + .short 2029, 2046, 2063, 2080, 2097, 2114 + .short 4058, 4075, 4092, 4109, 4126, 4143 + .short 6087, 6104, 6121, 6138, 6155, 6172 + .short 8116, 8133, 8150, 8167, 8184, 8201 + .short 10145, 10162, 10179, 10196, 10213, 10230 + .short 12174, 12191, 12208, 12225, 12242, 12259 + .short 14203, 14220, 14237, 14254, 14271, 14288 + .short 16232, 16249, 16266, 16283, 16300, 16317 + .short 18261, 18278, 18295, 18312, 18329, 18346 + .short 20290, 20307, 20324, 20341, 20358, 20375 + .short 22319, 22336, 22353, 22370, 22387, 22404 + .short 24348, 24365, 24382, 24399, 24416, 24433 + .short 26377, 26394, 26411, 26428, 26445, 26462 + .short 28406, 28423, 28440, 28457, 28474, 28491 + .short 30435, 30452, 30469, 30486, 30503, 30520 + .short 32464, 32481, 32498, 32515, 32532, 32549 + .short -31043, -31026, -31009, -30992, -30975, -30958 + .short -29014, -28997, -28980, -28963, -28946, -28929 + .short -26985, -26968, -26951, -26934, -26917, -26900 + .short -24956, -24939, -24922, -24905, -24888, -24871 + .short -22927, -22910, -22893, -22876, -22859, -22842 + .short -20898, -20881, -20864, -20847, -20830, -20813 + .short -18869, -18852, -18835, -18818, -18801, -18784 + .short -16840, -16823, -16806, -16789, -16772, -16755 + .short -14811, -14794, -14777, -14760, -14743, -14726 + .short -12782, -12765, -12748, -12731, -12714, -12697 + .short -10753, -10736, -10719, -10702, -10685, -10668 + .short -8724, -8707, -8690, -8673, -8656, -8639 + .short -6695, -6678, -6661, -6644, -6627, -6610 + .short -4666, -4649, -4632, -4615, -4598, -4581 + .short -2637, -2620, -2603, -2586, -2569, -2552 + + .word 305419896, 304492125, 303564354, 302636583 + .word 1025669867, 1024740949, 1023812031, 1022883113 + .word 1745919838, 1744989773, 1744059708, 1743129643 + .word -1828797487, -1829728699, -1830659911, -1831591123 + .word -1108547516, -1109479875, -1110412234, -1111344593 + .word -388297545, -389231051, -390164557, -391098063 + .word 331952426, 331017773, 330083120, 329148467 + .word 1052202397, 1051266597, 1050330797, 1049394997 + .word 1772452368, 1771515421, 1770578474, 1769641527 + .word -1802264957, -1803203051, -1804141145, -1805079239 + .word -1082014986, -1082954227, -1083893468, -1084832709 + .word -361765015, -362705403, -363645791, -364586179 + .word 358484956, 357543421, 356601886, 355660351 + .word 1078734927, 1077792245, 1076849563, 1075906881 + .word 1798984898, 1798041069, 1797097240, 1796153411 + .word -1775732427, -1776677403, -1777622379, -1778567355 + .word -1055482456, -1056428579, -1057374702, -1058320825 + .word -335232485, -336179755, -337127025, -338074295 + .word 385017486, 384069069, 383120652, 382172235 + .word 1105267457, 1104317893, 1103368329, 1102418765 + .word 1825517428, 1824566717, 1823616006, 1822665295 + .word -1749199897, -1750151755, -1751103613, -1752055471 + .word -1028949926, -1029902931, -1030855936, -1031808941 + .word -308699955, -309654107, -310608259, -311562411 + .word 411550016, 410594717, 409639418, 408684119 + .word 1131799987, 1130843541, 1129887095, 1128930649 + .word 1852049958, 1851092365, 1850134772, 1849177179 + .word -1722667367, -1723626107, -1724584847, -1725543587 + .word -1002417396, -1003377283, -1004337170, -1005297057 + .word -282167425, -283128459, -284089493, -285050527 + .word 438082546, 437120365, 436158184, 435196003 + .word 1158332517, 1157369189, 1156405861, 1155442533 + .int 1254161 + 99163665 + .word 1254161 - 99163665 + 126416 + .word 126416 - (99163665 - 1254161) + .int 1206444 + 99135946 + .word 1206444 - 99135946 + -636489589 + .word -636489589 - (99135946 - 1206444) + .int 1158727 + 99108227 + .word 1158727 - 99108227 + -1273105594 + .word -1273105594 - (99108227 - 1158727) + .int 1111010 + 99080508 + .word 1111010 - 99080508 + -1909721599 + .word -1909721599 - (99080508 - 1111010) + + .int 10371432 + 198360298 + .word 10371432 - 198360298 + 207677 + .word 207677 - (198360298 - 10371432) + .int 10322568 + 192163578 + .word 10322568 - 192163578 + -646124689 + .word -646124689 - (192163578 - 10322568) + .int 10273704 + 185966858 + .word 10273704 - 185966858 + -1292457055 + .word -1292457055 - (185966858 - 10273704) + .int 10224840 + 179770138 + .word 10224840 - 179770138 + -1938789421 + .word -1938789421 - (179770138 - 10224840) + + .int 19488703 + 297556931 + .word 19488703 - 297556931 + 288938 + .word 288938 - (297556931 - 19488703) + .int 19438692 + 285191210 + .word 19438692 - 285191210 + -655759789 + .word -655759789 - (285191210 - 19438692) + .int 19388681 + 272825489 + .word 19388681 - 272825489 + -1311808516 + .word -1311808516 - (272825489 - 19388681) + .int 19338670 + 260459768 + .word 19338670 - 260459768 + -1967857243 + .word -1967857243 - (260459768 - 19338670) + + .int 28605974 + 396753564 + .word 28605974 - 396753564 + 370199 + .word 370199 - (396753564 - 28605974) + .int 28554816 + 378218842 + .word 28554816 - 378218842 + -665394889 + .word -665394889 - (378218842 - 28554816) + .int 28503658 + 359684120 + .word 28503658 - 359684120 + -1331159977 + .word -1331159977 - (359684120 - 28503658) + .int 28452500 + 341149398 + .word 28452500 - 341149398 + -1996925065 + .word -1996925065 - (341149398 - 28452500) + + .int 37723245 + 495950197 + .word 37723245 - 495950197 + 451460 + .word 451460 - (495950197 - 37723245) + .int 37670940 + 471246474 + .word 37670940 - 471246474 + -675029989 + .word -675029989 - (471246474 - 37670940) + .int 37618635 + 446542751 + .word 37618635 - 446542751 + -1350511438 + .word -1350511438 - (446542751 - 37618635) + .int 37566330 + 421839028 + .word 37566330 - 421839028 + -2025992887 + .word -2025992887 - (421839028 - 37566330) + + .int 46840516 + 595146830 + .word 46840516 - 595146830 + 532721 + .word 532721 - (595146830 - 46840516) + .int 46787064 + 564274106 + .word 46787064 - 564274106 + -684665089 + .word -684665089 - (564274106 - 46787064) + .int 46733612 + 533401382 + .word 46733612 - 533401382 + -1369862899 + .word -1369862899 - (533401382 - 46733612) + .int 46680160 + 502528658 + .word 46680160 - 502528658 + -2055060709 + .word -2055060709 - (502528658 - 46680160) + + .int 55957787 + 694343463 + .word 55957787 - 694343463 + 613982 + .word 613982 - (694343463 - 55957787) + .int 55903188 + 657301738 + .word 55903188 - 657301738 + -694300189 + .word -694300189 - (657301738 - 55903188) + .int 55848589 + 620260013 + .word 55848589 - 620260013 + -1389214360 + .word -1389214360 - (620260013 - 55848589) + .int 55793990 + 583218288 + .word 55793990 - 583218288 + -2084128531 + .word -2084128531 - (583218288 - 55793990) + + .int 65075058 + 793540096 + .word 65075058 - 793540096 + 695243 + .word 695243 - (793540096 - 65075058) + .int 65019312 + 750329370 + .word 65019312 - 750329370 + -703935289 + .word -703935289 - (750329370 - 65019312) + .int 64963566 + 707118644 + .word 64963566 - 707118644 + -1408565821 + .word -1408565821 - (707118644 - 64963566) + .int 64907820 + 663907918 + .word 64907820 - 663907918 + -2113196353 + .word -2113196353 - (663907918 - 64907820) + + .int 74192329 + 892736729 + .word 74192329 - 892736729 + 776504 + .word 776504 - (892736729 - 74192329) + .int 74135436 + 843357002 + .word 74135436 - 843357002 + -713570389 + .word -713570389 - (843357002 - 74135436) + .int 74078543 + 793977275 + .word 74078543 - 793977275 + -1427917282 + .word -1427917282 - (793977275 - 74078543) + .int 74021650 + 744597548 + .word 74021650 - 744597548 + -2142264175 + .word -2142264175 - (744597548 - 74021650) + + .int 83309600 + 991933362 + .word 83309600 - 991933362 + 857765 + .word 857765 - (991933362 - 83309600) + .int 83251560 + 936384634 + .word 83251560 - 936384634 + -723205489 + .word -723205489 - (936384634 - 83251560) + .int 83193520 + 880835906 + .word 83193520 - 880835906 + -1447268743 + .word -1447268743 - (880835906 - 83193520) + .int 83135480 + 825287178 + .word 83135480 - 825287178 + 2123635299 + .word 2123635299 - (825287178 - 83135480) + + .int 92426871 + 1091129995 + .word 92426871 - 1091129995 + 939026 + .word 939026 - (1091129995 - 92426871) + .int 92367684 + 1029412266 + .word 92367684 - 1029412266 + -732840589 + .word -732840589 - (1029412266 - 92367684) + .int 92308497 + 967694537 + .word 92308497 - 967694537 + -1466620204 + .word -1466620204 - (967694537 - 92308497) + .int 92249310 + 905976808 + .word 92249310 - 905976808 + 2094567477 + .word 2094567477 - (905976808 - 92249310) + + .int 101544142 + 1190326628 + .word 101544142 - 1190326628 + 1020287 + .word 1020287 - (1190326628 - 101544142) + .int 101483808 + 1122439898 + .word 101483808 - 1122439898 + -742475689 + .word -742475689 - (1122439898 - 101483808) + .int 101423474 + 1054553168 + .word 101423474 - 1054553168 + -1485971665 + .word -1485971665 - (1054553168 - 101423474) + .int 101363140 + 986666438 + .word 101363140 - 986666438 + 2065499655 + .word 2065499655 - (986666438 - 101363140) + + .int 110661413 + 1289523261 + .word 110661413 - 1289523261 + 1101548 + .word 1101548 - (1289523261 - 110661413) + .int 110599932 + 1215467530 + .word 110599932 - 1215467530 + -752110789 + .word -752110789 - (1215467530 - 110599932) + .int 110538451 + 1141411799 + .word 110538451 - 1141411799 + -1505323126 + .word -1505323126 - (1141411799 - 110538451) + .int 110476970 + 1067356068 + .word 110476970 - 1067356068 + 2036431833 + .word 2036431833 - (1067356068 - 110476970) + + .int 119778684 + 1388719894 + .word 119778684 - 1388719894 + 1182809 + .word 1182809 - (1388719894 - 119778684) + .int 119716056 + 1308495162 + .word 119716056 - 1308495162 + -761745889 + .word -761745889 - (1308495162 - 119716056) + .int 119653428 + 1228270430 + .word 119653428 - 1228270430 + -1524674587 + .word -1524674587 - (1228270430 - 119653428) + .int 119590800 + 1148045698 + .word 119590800 - 1148045698 + 2007364011 + .word 2007364011 - (1148045698 - 119590800) + + .int 128895955 + 1487916527 + .word 128895955 - 1487916527 + 1264070 + .word 1264070 - (1487916527 - 128895955) + .int 128832180 + 1401522794 + .word 128832180 - 1401522794 + -771380989 + .word -771380989 - (1401522794 - 128832180) + .int 128768405 + 1315129061 + .word 128768405 - 1315129061 + -1544026048 + .word -1544026048 - (1315129061 - 128768405) + .int 128704630 + 1228735328 + .word 128704630 - 1228735328 + 1978296189 + .word 1978296189 - (1228735328 - 128704630) + + .int 138013226 + 1587113160 + .word 138013226 - 1587113160 + 1345331 + .word 1345331 - (1587113160 - 138013226) + .int 137948304 + 1494550426 + .word 137948304 - 1494550426 + -781016089 + .word -781016089 - (1494550426 - 137948304) + .int 137883382 + 1401987692 + .word 137883382 - 1401987692 + -1563377509 + .word -1563377509 - (1401987692 - 137883382) + .int 137818460 + 1309424958 + .word 137818460 - 1309424958 + 1949228367 + .word 1949228367 - (1309424958 - 137818460) + + .int 147130497 + 1686309793 + .word 147130497 - 1686309793 + 1426592 + .word 1426592 - (1686309793 - 147130497) + .int 147064428 + 1587578058 + .word 147064428 - 1587578058 + -790651189 + .word -790651189 - (1587578058 - 147064428) + .int 146998359 + 1488846323 + .word 146998359 - 1488846323 + -1582728970 + .word -1582728970 - (1488846323 - 146998359) + .int 146932290 + 1390114588 + .word 146932290 - 1390114588 + 1920160545 + .word 1920160545 - (1390114588 - 146932290) + + .int 156247768 + 1785506426 + .word 156247768 - 1785506426 + 1507853 + .word 1507853 - (1785506426 - 156247768) + .int 156180552 + 1680605690 + .word 156180552 - 1680605690 + -800286289 + .word -800286289 - (1680605690 - 156180552) + .int 156113336 + 1575704954 + .word 156113336 - 1575704954 + -1602080431 + .word -1602080431 - (1575704954 - 156113336) + .int 156046120 + 1470804218 + .word 156046120 - 1470804218 + 1891092723 + .word 1891092723 - (1470804218 - 156046120) + + .int 165365039 + 1884703059 + .word 165365039 - 1884703059 + 1589114 + .word 1589114 - (1884703059 - 165365039) + .int 165296676 + 1773633322 + .word 165296676 - 1773633322 + -809921389 + .word -809921389 - (1773633322 - 165296676) + .int 165228313 + 1662563585 + .word 165228313 - 1662563585 + -1621431892 + .word -1621431892 - (1662563585 - 165228313) + .int 165159950 + 1551493848 + .word 165159950 - 1551493848 + 1862024901 + .word 1862024901 - (1551493848 - 165159950) + + .int 174482310 + 1983899692 + .word 174482310 - 1983899692 + 1670375 + .word 1670375 - (1983899692 - 174482310) + .int 174412800 + 1866660954 + .word 174412800 - 1866660954 + -819556489 + .word -819556489 - (1866660954 - 174412800) + .int 174343290 + 1749422216 + .word 174343290 - 1749422216 + -1640783353 + .word -1640783353 - (1749422216 - 174343290) + .int 174273780 + 1632183478 + .word 174273780 - 1632183478 + 1832957079 + .word 1832957079 - (1632183478 - 174273780) + + .int 183599581 + 2083096325 + .word 183599581 - 2083096325 + 1751636 + .word 1751636 - (2083096325 - 183599581) + .int 183528924 + 1959688586 + .word 183528924 - 1959688586 + -829191589 + .word -829191589 - (1959688586 - 183528924) + .int 183458267 + 1836280847 + .word 183458267 - 1836280847 + -1660134814 + .word -1660134814 - (1836280847 - 183458267) + .int 183387610 + 1712873108 + .word 183387610 - 1712873108 + 1803889257 + .word 1803889257 - (1712873108 - 183387610) + + .int 192716852 + -2112674338 + .word 192716852 - -2112674338 + 1832897 + .word 1832897 - (-2112674338 - 192716852) + .int 192645048 + 2052716218 + .word 192645048 - 2052716218 + -838826689 + .word -838826689 - (2052716218 - 192645048) + .int 192573244 + 1923139478 + .word 192573244 - 1923139478 + -1679486275 + .word -1679486275 - (1923139478 - 192573244) + .int 192501440 + 1793562738 + .word 192501440 - 1793562738 + 1774821435 + .word 1774821435 - (1793562738 - 192501440) + + .int 201834123 + -2013477705 + .word 201834123 - -2013477705 + 1914158 + .word 1914158 - (-2013477705 - 201834123) + .int 201761172 + 2145743850 + .word 201761172 - 2145743850 + -848461789 + .word -848461789 - (2145743850 - 201761172) + .int 201688221 + 2009998109 + .word 201688221 - 2009998109 + -1698837736 + .word -1698837736 - (2009998109 - 201688221) + .int 201615270 + 1874252368 + .word 201615270 - 1874252368 + 1745753613 + .word 1745753613 - (1874252368 - 201615270) + + .int 210951394 + -1914281072 + .word 210951394 - -1914281072 + 1995419 + .word 1995419 - (-1914281072 - 210951394) + .int 210877296 + -2056195814 + .word 210877296 - -2056195814 + -858096889 + .word -858096889 - (-2056195814 - 210877296) + .int 210803198 + 2096856740 + .word 210803198 - 2096856740 + -1718189197 + .word -1718189197 - (2096856740 - 210803198) + .int 210729100 + 1954941998 + .word 210729100 - 1954941998 + 1716685791 + .word 1716685791 - (1954941998 - 210729100) + + .int 220068665 + -1815084439 + .word 220068665 - -1815084439 + 2076680 + .word 2076680 - (-1815084439 - 220068665) + .int 219993420 + -1963168182 + .word 219993420 - -1963168182 + -867731989 + .word -867731989 - (-1963168182 - 219993420) + .int 219918175 + -2111251925 + .word 219918175 - -2111251925 + -1737540658 + .word -1737540658 - (-2111251925 - 219918175) + .int 219842930 + 2035631628 + .word 219842930 - 2035631628 + 1687617969 + .word 1687617969 - (2035631628 - 219842930) + + .int 229185936 + -1715887806 + .word 229185936 - -1715887806 + 2157941 + .word 2157941 - (-1715887806 - 229185936) + .int 229109544 + -1870140550 + .word 229109544 - -1870140550 + -877367089 + .word -877367089 - (-1870140550 - 229109544) + .int 229033152 + -2024393294 + .word 229033152 - -2024393294 + -1756892119 + .word -1756892119 - (-2024393294 - 229033152) + .int 228956760 + 2116321258 + .word 228956760 - 2116321258 + 1658550147 + .word 1658550147 - (2116321258 - 228956760) + + .int 238303207 + -1616691173 + .word 238303207 - -1616691173 + 2239202 + .word 2239202 - (-1616691173 - 238303207) + .int 238225668 + -1777112918 + .word 238225668 - -1777112918 + -887002189 + .word -887002189 - (-1777112918 - 238225668) + .int 238148129 + -1937534663 + .word 238148129 - -1937534663 + -1776243580 + .word -1776243580 - (-1937534663 - 238148129) + .int 238070590 + -2097956408 + .word 238070590 - -2097956408 + 1629482325 + .word 1629482325 - (-2097956408 - 238070590) + + .int 247420478 + -1517494540 + .word 247420478 - -1517494540 + 2320463 + .word 2320463 - (-1517494540 - 247420478) + .int 247341792 + -1684085286 + .word 247341792 - -1684085286 + -896637289 + .word -896637289 - (-1684085286 - 247341792) + .int 247263106 + -1850676032 + .word 247263106 - -1850676032 + -1795595041 + .word -1795595041 - (-1850676032 - 247263106) + .int 247184420 + -2017266778 + .word 247184420 - -2017266778 + 1600414503 + .word 1600414503 - (-2017266778 - 247184420) + + .int 256537749 + -1418297907 + .word 256537749 - -1418297907 + 2401724 + .word 2401724 - (-1418297907 - 256537749) + .int 256457916 + -1591057654 + .word 256457916 - -1591057654 + -906272389 + .word -906272389 - (-1591057654 - 256457916) + .int 256378083 + -1763817401 + .word 256378083 - -1763817401 + -1814946502 + .word -1814946502 - (-1763817401 - 256378083) + .int 256298250 + -1936577148 + .word 256298250 - -1936577148 + 1571346681 + .word 1571346681 - (-1936577148 - 256298250) + + .int 265655020 + -1319101274 + .word 265655020 - -1319101274 + 2482985 + .word 2482985 - (-1319101274 - 265655020) + .int 265574040 + -1498030022 + .word 265574040 - -1498030022 + -915907489 + .word -915907489 - (-1498030022 - 265574040) + .int 265493060 + -1676958770 + .word 265493060 - -1676958770 + -1834297963 + .word -1834297963 - (-1676958770 - 265493060) + .int 265412080 + -1855887518 + .word 265412080 - -1855887518 + 1542278859 + .word 1542278859 - (-1855887518 - 265412080) + + .int 274772291 + -1219904641 + .word 274772291 - -1219904641 + 2564246 + .word 2564246 - (-1219904641 - 274772291) + .int 274690164 + -1405002390 + .word 274690164 - -1405002390 + -925542589 + .word -925542589 - (-1405002390 - 274690164) + .int 274608037 + -1590100139 + .word 274608037 - -1590100139 + -1853649424 + .word -1853649424 - (-1590100139 - 274608037) + .int 274525910 + -1775197888 + .word 274525910 - -1775197888 + 1513211037 + .word 1513211037 - (-1775197888 - 274525910) + + .int 283889562 + -1120708008 + .word 283889562 - -1120708008 + 2645507 + .word 2645507 - (-1120708008 - 283889562) + .int 283806288 + -1311974758 + .word 283806288 - -1311974758 + -935177689 + .word -935177689 - (-1311974758 - 283806288) + .int 283723014 + -1503241508 + .word 283723014 - -1503241508 + -1873000885 + .word -1873000885 - (-1503241508 - 283723014) + .int 283639740 + -1694508258 + .word 283639740 - -1694508258 + 1484143215 + .word 1484143215 - (-1694508258 - 283639740) + + .word label_1, label_2, label_3 + .word label_1 - 37 + .word label_1 - label_2 + label_3 + .word label_3 - (label_1 - label_2 + 47) + .short lo16(label_1 - label_2) + .short lo16(label_3 + 0x12345678 - label_1) + .short hi16(label_3 + 0x12345678 - label_1) + .short ha16(label_1 - label_3) + .short ha16(label_3 - label_1) + .short ha16(0x8000) + .short ha16(0x7230000) + .short ha16(0x723FFFF) +label_3: diff --git a/gas/testsuite/gas/tilepro/t_insns.d b/gas/testsuite/gas/tilepro/t_insns.d new file mode 100644 index 0000000..8fe4f5f --- /dev/null +++ b/gas/testsuite/gas/tilepro/t_insns.d @@ -0,0 +1,8177 @@ +#as: +#objdump: -dr + +.*: file format .* + + +Disassembly of section .text: + +00000000 : + 0: [0-9a-f]* { nop } + 8: [0-9a-f]* { nop } + 10: [0-9a-f]* { nop } + 18: [0-9a-f]* { nop } + 20: [0-9a-f]* { nop } + 28: [0-9a-f]* { nop } + 30: [0-9a-f]* { nop } + 38: [0-9a-f]* { nop } + 40: [0-9a-f]* { nop } + 48: [0-9a-f]* { nop } + 50: [0-9a-f]* { nop } + 58: [0-9a-f]* { nop } + 60: [0-9a-f]* { nop } + 68: [0-9a-f]* { nop } + 70: [0-9a-f]* { nop } + 78: [0-9a-f]* { nop } + 80: [0-9a-f]* { nop } + 88: [0-9a-f]* { nop } + 90: [0-9a-f]* { nop } + 98: [0-9a-f]* { nop } + a0: [0-9a-f]* { nop } + a8: [0-9a-f]* { nop } + b0: [0-9a-f]* { nop } + b8: [0-9a-f]* { nop } + c0: [0-9a-f]* { nop } + c8: [0-9a-f]* { nop } + d0: [0-9a-f]* { nop } + d8: [0-9a-f]* { nop } + e0: [0-9a-f]* { nop } + e8: [0-9a-f]* { nop } + f0: [0-9a-f]* { nop } + f8: [0-9a-f]* { nop } + 100: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; bbnst r15, 0 } + 108: [0-9a-f]* { mulhha_ss r5, r6, r7 ; blezt r15, 0 } + 110: [0-9a-f]* { mulhla_us r5, r6, r7 ; bbnst r15, 0 } + 118: [0-9a-f]* { mullla_uu r5, r6, r7 ; bgezt r15, 0 } + 120: [0-9a-f]* { addli.sn r5, r6, 4660 ; bzt r15, 0 } + 128: [0-9a-f]* { mulhh_uu r5, r6, r7 ; bbnst r15, 0 } + 130: [0-9a-f]* { mulhha_uu r5, r6, r7 ; bgzt r15, 0 } + 138: [0-9a-f]* { mulhl_uu r5, r6, r7 ; blezt r15, 0 } + 140: [0-9a-f]* { mulhla_us r5, r6, r7 ; blzt r15, 0 } + 148: [0-9a-f]* { mulll_uu r5, r6, r7 ; bbnst r15, 0 } + 150: [0-9a-f]* { mullla_uu r5, r6, r7 ; bgzt r15, 0 } + 158: [0-9a-f]* { addli.sn r5, r6, 4660 ; bz r15, 0 } + 160: [0-9a-f]* { crc32_32 r5, r6, r7 ; blzt r15, 0 } + 168: [0-9a-f]* { mulhh_ss r5, r6, r7 ; blzt r15, 0 } + 170: [0-9a-f]* { mulhha_ss r5, r6, r7 ; bzt r15, 0 } + 178: [0-9a-f]* { mulhl_su r5, r6, r7 ; bbst r15, 0 } + 180: [0-9a-f]* { mulhla_ss r5, r6, r7 ; bbs r15, 0 } + 188: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; bz r15, 0 } + 190: [0-9a-f]* { mulll_uu r5, r6, r7 ; blzt r15, 0 } + 198: [0-9a-f]* { packbs_u r5, r6, r7 ; bgez r15, 0 } + 1a0: [0-9a-f]* { addbs_u r5, r6, r7 ; bbns r15, 0 } + 1a8: [0-9a-f]* { auli r5, r6, 4660 ; bzt r15, 0 } + 1b0: [0-9a-f]* { maxib_u r5, r6, 5 ; bgezt r15, 0 } + 1b8: [0-9a-f]* { moveli.sn r5, 4660 ; blez r15, 0 } + 1c0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; bz r15, 0 } + 1c8: [0-9a-f]* { mulhl_uu r5, r6, r7 ; bzt r15, 0 } + 1d0: [0-9a-f]* { mullla_ss r5, r6, r7 ; bz r15, 0 } + 1d8: [0-9a-f]* { sadab_u r5, r6, r7 ; bgzt r15, 0 } + 1e0: [0-9a-f]* { slte_u r5, r6, r7 ; bbnst r15, 0 } + 1e8: [0-9a-f]* { sltib_u r5, r6, 5 ; bbnst r15, 0 } + 1f0: [0-9a-f]* { addhs r5, r6, r7 ; blezt r15, 0 } + 1f8: [0-9a-f]* { crc32_8 r5, r6, r7 ; blz r15, 0 } + 200: [0-9a-f]* { maxb_u r5, r6, r7 ; blzt r15, 0 } + 208: [0-9a-f]* { minib_u r5, r6, 5 ; blez r15, 0 } + 210: [0-9a-f]* { mulhl_su r5, r6, r7 ; bz r15, 0 } + 218: [0-9a-f]* { packhs r5, r6, r7 ; bnzt r15, 0 } + 220: [0-9a-f]* { sadah_u r5, r6, r7 ; bzt r15, 0 } + 228: [0-9a-f]* { sltb_u r5, r6, r7 ; bgez r15, 0 } + 230: [0-9a-f]* { slteh r5, r6, r7 ; bbnst r15, 0 } + 238: [0-9a-f]* { sltib_u r5, r6, 5 ; bgez r15, 0 } + 240: [0-9a-f]* { addb r5, r6, r7 ; bbnst r15, 0 } + 248: [0-9a-f]* { adds r5, r6, r7 ; bbnst r15, 0 } + 250: [0-9a-f]* { inthb r5, r6, r7 ; bgez r15, 0 } + 258: [0-9a-f]* { intlh r5, r6, r7 ; bbst r15, 0 } + 260: [0-9a-f]* { maxih r5, r6, 5 ; bgezt r15, 0 } + 268: [0-9a-f]* { mnzb r5, r6, r7 ; blezt r15, 0 } + 270: [0-9a-f]* { packhs r5, r6, r7 ; blz r15, 0 } + 278: [0-9a-f]* { sadb_u r5, r6, r7 ; bnz r15, 0 } + 280: [0-9a-f]* { seqih r5, r6, 5 ; bgezt r15, 0 } + 288: [0-9a-f]* { shrib r5, r6, 5 ; bbnst r15, 0 } + 290: [0-9a-f]* { sltb_u r5, r6, r7 ; bzt r15, 0 } + 298: [0-9a-f]* { slteh r5, r6, r7 ; bgzt r15, 0 } + 2a0: [0-9a-f]* { sltib r5, r6, 5 ; bbnst r15, 0 } + 2a8: [0-9a-f]* { sneh r5, r6, r7 ; bgezt r15, 0 } + 2b0: [0-9a-f]* { subh r5, r6, r7 ; blezt r15, 0 } + 2b8: [0-9a-f]* { tblidxb3 r5, r6 ; bbnst r15, 0 } + 2c0: [0-9a-f]* { addhs r5, r6, r7 ; bbs r15, 0 } + 2c8: [0-9a-f]* { addih r5, r6, 5 ; blzt r15, 0 } + 2d0: [0-9a-f]* { avgh r5, r6, r7 ; bgez r15, 0 } + 2d8: [0-9a-f]* { intlh r5, r6, r7 ; bbs r15, 0 } + 2e0: [0-9a-f]* { maxih r5, r6, 5 ; bnzt r15, 0 } + 2e8: [0-9a-f]* { mnzb r5, r6, r7 ; bbns r15, 0 } + 2f0: [0-9a-f]* { mvnz r5, r6, r7 ; bgez r15, 0 } + 2f8: [0-9a-f]* { s1a r5, r6, r7 ; bbnst r15, 0 } + 300: [0-9a-f]* { sadh r5, r6, r7 ; blzt r15, 0 } + 308: [0-9a-f]* { seqi r5, r6, 5 ; bbnst r15, 0 } + 310: [0-9a-f]* { shlb r5, r6, r7 ; bbns r15, 0 } + 318: [0-9a-f]* { shlib r5, r6, 5 ; bgzt r15, 0 } + 320: [0-9a-f]* { shrb r5, r6, r7 ; bnzt r15, 0 } + 328: [0-9a-f]* { shrih r5, r6, 5 ; bgez r15, 0 } + 330: [0-9a-f]* { sltb_u r5, r6, r7 ; bz r15, 0 } + 338: [0-9a-f]* { slth r5, r6, r7 ; bbst r15, 0 } + 340: [0-9a-f]* { sltib r5, r6, 5 ; blzt r15, 0 } + 348: [0-9a-f]* { sneb r5, r6, r7 ; bnzt r15, 0 } + 350: [0-9a-f]* { srah r5, r6, r7 ; bgez r15, 0 } + 358: [0-9a-f]* { sraih r5, r6, 5 ; blzt r15, 0 } + 360: [0-9a-f]* { subhs r5, r6, r7 ; bgz r15, 0 } + 368: [0-9a-f]* { tblidxb1 r5, r6 ; bgez r15, 0 } + 370: [0-9a-f]* { xor r5, r6, r7 ; bgezt r15, 0 } + 378: [0-9a-f]* { addh r5, r6, r7 ; bnz r15, 0 } + 380: [0-9a-f]* { addli r5, r6, 4660 ; jal 0 } + 388: [0-9a-f]* { avgh r5, r6, r7 ; bbs r15, 0 } + 390: [0-9a-f]* { minh r5, r6, r7 ; bbs r15, 0 } + 398: [0-9a-f]* { mnzb r5, r6, r7 ; bnz r15, 0 } + 3a0: [0-9a-f]* { mvnz r5, r6, r7 ; bnz r15, 0 } + 3a8: [0-9a-f]* { mzh r5, r6, r7 ; bbst r15, 0 } + 3b0: [0-9a-f]* { rl r5, r6, r7 ; bgezt r15, 0 } + 3b8: [0-9a-f]* { s3a r5, r6, r7 ; bbst r15, 0 } + 3c0: [0-9a-f]* { seqb r5, r6, r7 ; bgz r15, 0 } + 3c8: [0-9a-f]* { seqib r5, r6, 5 ; bzt r15, 0 } + 3d0: [0-9a-f]* { shlh r5, r6, r7 ; blz r15, 0 } + 3d8: [0-9a-f]* { shr r5, r6, r7 ; bbns r15, 0 } + 3e0: [0-9a-f]* { shri r5, r6, 5 ; bgzt r15, 0 } + 3e8: [0-9a-f]* { slt r5, r6, r7 ; bnzt r15, 0 } + 3f0: [0-9a-f]* { slti r5, r6, 5 ; bbst r15, 0 } + 3f8: [0-9a-f]* { sne r5, r6, r7 ; bgzt r15, 0 } + 400: [0-9a-f]* { sra r5, r6, r7 ; bnzt r15, 0 } + 408: [0-9a-f]* { sraib r5, r6, 5 ; blz r15, 0 } + 410: [0-9a-f]* { subh r5, r6, r7 ; bbs r15, 0 } + 418: [0-9a-f]* { tblidxb1 r5, r6 ; bzt r15, 0 } + 420: [0-9a-f]* { xori r5, r6, 5 ; bgez r15, 0 } + 428: [0-9a-f]* { adds r5, r6, r7 ; bz r15, 0 } + 430: [0-9a-f]* { infol 4660 ; blezt r15, 0 } + 438: [0-9a-f]* { mulhl_uu r5, r6, r7 ; jal 0 } + 440: [0-9a-f]* { mzb r5, r6, r7 ; bgz r15, 0 } + 448: [0-9a-f]* { or r5, r6, r7 ; bnzt r15, 0 } + 450: [0-9a-f]* { rli r5, r6, 5 ; blez r15, 0 } + 458: [0-9a-f]* { seq r5, r6, r7 ; bgz r15, 0 } + 460: [0-9a-f]* { shli r5, r6, 5 ; bbs r15, 0 } + 468: [0-9a-f]* { shrih r5, r6, 5 ; bz r15, 0 } + 470: [0-9a-f]* { sne r5, r6, r7 ; bzt r15, 0 } + 478: [0-9a-f]* { sub r5, r6, r7 ; bnz r15, 0 } + 480: [0-9a-f]* { addbs_u r5, r6, r7 ; jal 0 } + 488: [0-9a-f]* { infol 4660 ; blez r15, 0 } + 490: [0-9a-f]* { mullla_uu r5, r6, r7 ; j 0 } + 498: [0-9a-f]* { pcnt r5, r6 ; bbnst r15, 0 } + 4a0: [0-9a-f]* { shl r5, r6, r7 ; bz r15, 0 } + 4a8: [0-9a-f]* { bitx r5, r6 ; bbst r15, 0 } + 4b0: [0-9a-f]* { infol 4660 ; blz r15, 0 } + 4b8: [0-9a-f]* { movei r5, 5 ; blzt r15, 0 } + 4c0: [0-9a-f]* { pcnt r5, r6 ; bbns r15, 0 } + 4c8: [0-9a-f]* { bitx r5, r6 ; blz r15, 0 } + 4d0: [0-9a-f]* { inthb r5, r6, r7 ; jal 0 } + 4d8: [0-9a-f]* { sadab_u r5, r6, r7 ; j 0 } + 4e0: [0-9a-f]* { clz r5, r6 ; bbs r15, 0 } + 4e8: [0-9a-f]* { move r5, r6 ; bz r15, 0 } + 4f0: [0-9a-f]* { shrh r5, r6, r7 ; jal 0 } + 4f8: [0-9a-f]* { subh r5, r6, r7 ; jal 0 } + 500: [0-9a-f]* { mnz r5, r6, r7 ; jal 0 } + 508: [0-9a-f]* { slti_u r5, r6, 5 ; j 0 } + 510: [0-9a-f]* { info 19 ; bnzt r15, 0 } + 518: [0-9a-f]* { shlib r5, r6, 5 ; j 0 } + 520: [0-9a-f]* { tblidxb0 r5, r6 ; j 0 } + 528: [0-9a-f]* { s1a r5, r6, r7 ; j 0 } + 530: [0-9a-f]* { blezt r15, 0 } + 538: [0-9a-f]* { infol 4660 ; j 0 } + 540: [0-9a-f]* { clz r5, r6 ; j 0 } + 548: [0-9a-f]* { addli.sn r5, r6, 4660 ; bbnst r15, 0 } + 550: [0-9a-f]* { inthh r5, r6, r7 ; bbnst r15, 0 } + 558: [0-9a-f]* { mulhh_su r5, r6, r7 ; bbnst r15, 0 } + 560: [0-9a-f]* { mullla_uu r5, r6, r7 ; bbnst r15, 0 } + 568: [0-9a-f]* { s3a r5, r6, r7 ; bbnst r15, 0 } + 570: [0-9a-f]* { shrb r5, r6, r7 ; bbnst r15, 0 } + 578: [0-9a-f]* { sltib_u r5, r6, 5 ; bbnst r15, 0 } + 580: [0-9a-f]* { tblidxb2 r5, r6 ; bbnst r15, 0 } + 588: [0-9a-f]* { avgb_u r5, r6, r7 ; bgezt r15, 0 } + 590: [0-9a-f]* { minb_u r5, r6, r7 ; bgezt r15, 0 } + 598: [0-9a-f]* { mulhl_su r5, r6, r7 ; bgezt r15, 0 } + 5a0: [0-9a-f]* { nop ; bgezt r15, 0 } + 5a8: [0-9a-f]* { seq r5, r6, r7 ; bgezt r15, 0 } + 5b0: [0-9a-f]* { sltb r5, r6, r7 ; bgezt r15, 0 } + 5b8: [0-9a-f]* { srab r5, r6, r7 ; bgezt r15, 0 } + 5c0: [0-9a-f]* { addh r5, r6, r7 ; blezt r15, 0 } + 5c8: [0-9a-f]* { ctz r5, r6 ; blezt r15, 0 } + 5d0: [0-9a-f]* { mnzh r5, r6, r7 ; blezt r15, 0 } + 5d8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; blezt r15, 0 } + 5e0: [0-9a-f]* { packlb r5, r6, r7 ; blezt r15, 0 } + 5e8: [0-9a-f]* { shlb r5, r6, r7 ; blezt r15, 0 } + 5f0: [0-9a-f]* { slteh_u r5, r6, r7 ; blezt r15, 0 } + 5f8: [0-9a-f]* { subbs_u r5, r6, r7 ; blezt r15, 0 } + 600: [0-9a-f]* { addli.sn r5, r6, 4660 ; bbns r15, 0 } + 608: [0-9a-f]* { inthh r5, r6, r7 ; bbns r15, 0 } + 610: [0-9a-f]* { mulhh_su r5, r6, r7 ; bbns r15, 0 } + 618: [0-9a-f]* { mullla_uu r5, r6, r7 ; bbns r15, 0 } + 620: [0-9a-f]* { s3a r5, r6, r7 ; bbns r15, 0 } + 628: [0-9a-f]* { shrb r5, r6, r7 ; bbns r15, 0 } + 630: [0-9a-f]* { sltib_u r5, r6, 5 ; bbns r15, 0 } + 638: [0-9a-f]* { tblidxb2 r5, r6 ; bbns r15, 0 } + 640: [0-9a-f]* { avgb_u r5, r6, r7 ; bbst r15, 0 } + 648: [0-9a-f]* { minb_u r5, r6, r7 ; bbst r15, 0 } + 650: [0-9a-f]* { mulhl_su r5, r6, r7 ; bbst r15, 0 } + 658: [0-9a-f]* { nop ; bbst r15, 0 } + 660: [0-9a-f]* { seq r5, r6, r7 ; bbst r15, 0 } + 668: [0-9a-f]* { sltb r5, r6, r7 ; bbst r15, 0 } + 670: [0-9a-f]* { srab r5, r6, r7 ; bbst r15, 0 } + 678: [0-9a-f]* { addh r5, r6, r7 ; bgez r15, 0 } + 680: [0-9a-f]* { ctz r5, r6 ; bgez r15, 0 } + 688: [0-9a-f]* { mnzh r5, r6, r7 ; bgez r15, 0 } + 690: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; bgez r15, 0 } + 698: [0-9a-f]* { packlb r5, r6, r7 ; bgez r15, 0 } + 6a0: [0-9a-f]* { shlb r5, r6, r7 ; bgez r15, 0 } + 6a8: [0-9a-f]* { slteh_u r5, r6, r7 ; bgez r15, 0 } + 6b0: [0-9a-f]* { subbs_u r5, r6, r7 ; bgez r15, 0 } + 6b8: [0-9a-f]* { adds r5, r6, r7 ; bgzt r15, 0 } + 6c0: [0-9a-f]* { intlb r5, r6, r7 ; bgzt r15, 0 } + 6c8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; bgzt r15, 0 } + 6d0: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; bgzt r15, 0 } + 6d8: [0-9a-f]* { sadab_u r5, r6, r7 ; bgzt r15, 0 } + 6e0: [0-9a-f]* { shrh r5, r6, r7 ; bgzt r15, 0 } + 6e8: [0-9a-f]* { sltih r5, r6, 5 ; bgzt r15, 0 } + 6f0: [0-9a-f]* { tblidxb3 r5, r6 ; bgzt r15, 0 } + 6f8: [0-9a-f]* { avgh r5, r6, r7 ; blez r15, 0 } + 700: [0-9a-f]* { minh r5, r6, r7 ; blez r15, 0 } + 708: [0-9a-f]* { mulhl_us r5, r6, r7 ; blez r15, 0 } + 710: [0-9a-f]* { nor r5, r6, r7 ; blez r15, 0 } + 718: [0-9a-f]* { seqb r5, r6, r7 ; blez r15, 0 } + 720: [0-9a-f]* { sltb_u r5, r6, r7 ; blez r15, 0 } + 728: [0-9a-f]* { srah r5, r6, r7 ; blez r15, 0 } + 730: [0-9a-f]* { addhs r5, r6, r7 ; blzt r15, 0 } + 738: [0-9a-f]* { dword_align r5, r6, r7 ; blzt r15, 0 } + 740: [0-9a-f]* { move r5, r6 ; blzt r15, 0 } + 748: [0-9a-f]* { mulll_ss r5, r6, r7 ; blzt r15, 0 } + 750: [0-9a-f]* { pcnt r5, r6 ; blzt r15, 0 } + 758: [0-9a-f]* { shlh r5, r6, r7 ; blzt r15, 0 } + 760: [0-9a-f]* { slth r5, r6, r7 ; blzt r15, 0 } + 768: [0-9a-f]* { subh r5, r6, r7 ; blzt r15, 0 } + 770: [0-9a-f]* { adiffb_u r5, r6, r7 ; bnzt r15, 0 } + 778: [0-9a-f]* { intlh r5, r6, r7 ; bnzt r15, 0 } + 780: [0-9a-f]* { mulhha_ss r5, r6, r7 ; bnzt r15, 0 } + 788: [0-9a-f]* { mvnz r5, r6, r7 ; bnzt r15, 0 } + 790: [0-9a-f]* { sadah r5, r6, r7 ; bnzt r15, 0 } + 798: [0-9a-f]* { shri r5, r6, 5 ; bnzt r15, 0 } + 7a0: [0-9a-f]* { sltih_u r5, r6, 5 ; bnzt r15, 0 } + 7a8: [0-9a-f]* { xor r5, r6, r7 ; bnzt r15, 0 } + 7b0: [0-9a-f]* { avgh r5, r6, r7 ; bbs r15, 0 } + 7b8: [0-9a-f]* { minh r5, r6, r7 ; bbs r15, 0 } + 7c0: [0-9a-f]* { mulhl_us r5, r6, r7 ; bbs r15, 0 } + 7c8: [0-9a-f]* { nor r5, r6, r7 ; bbs r15, 0 } + 7d0: [0-9a-f]* { seqb r5, r6, r7 ; bbs r15, 0 } + 7d8: [0-9a-f]* { sltb_u r5, r6, r7 ; bbs r15, 0 } + 7e0: [0-9a-f]* { srah r5, r6, r7 ; bbs r15, 0 } + 7e8: [0-9a-f]* { addhs r5, r6, r7 ; bgz r15, 0 } + 7f0: [0-9a-f]* { dword_align r5, r6, r7 ; bgz r15, 0 } + 7f8: [0-9a-f]* { move r5, r6 ; bgz r15, 0 } + 800: [0-9a-f]* { mulll_ss r5, r6, r7 ; bgz r15, 0 } + 808: [0-9a-f]* { pcnt r5, r6 ; bgz r15, 0 } + 810: [0-9a-f]* { shlh r5, r6, r7 ; bgz r15, 0 } + 818: [0-9a-f]* { slth r5, r6, r7 ; bgz r15, 0 } + 820: [0-9a-f]* { subh r5, r6, r7 ; bgz r15, 0 } + 828: [0-9a-f]* { adiffb_u r5, r6, r7 ; blz r15, 0 } + 830: [0-9a-f]* { intlh r5, r6, r7 ; blz r15, 0 } + 838: [0-9a-f]* { mulhha_ss r5, r6, r7 ; blz r15, 0 } + 840: [0-9a-f]* { mvnz r5, r6, r7 ; blz r15, 0 } + 848: [0-9a-f]* { sadah r5, r6, r7 ; blz r15, 0 } + 850: [0-9a-f]* { shri r5, r6, 5 ; blz r15, 0 } + 858: [0-9a-f]* { sltih_u r5, r6, 5 ; blz r15, 0 } + 860: [0-9a-f]* { xor r5, r6, r7 ; blz r15, 0 } + 868: [0-9a-f]* { bitx r5, r6 ; bnz r15, 0 } + 870: [0-9a-f]* { minib_u r5, r6, 5 ; bnz r15, 0 } + 878: [0-9a-f]* { mulhl_uu r5, r6, r7 ; bnz r15, 0 } + 880: [0-9a-f]* { or r5, r6, r7 ; bnz r15, 0 } + 888: [0-9a-f]* { seqh r5, r6, r7 ; bnz r15, 0 } + 890: [0-9a-f]* { slte r5, r6, r7 ; bnz r15, 0 } + 898: [0-9a-f]* { srai r5, r6, 5 ; bnz r15, 0 } + 8a0: [0-9a-f]* { addi r5, r6, 5 ; bzt r15, 0 } + 8a8: [0-9a-f]* { bzt r15, 0 } + 8b0: [0-9a-f]* { movei r5, 5 ; bzt r15, 0 } + 8b8: [0-9a-f]* { mulll_su r5, r6, r7 ; bzt r15, 0 } + 8c0: [0-9a-f]* { rl r5, r6, r7 ; bzt r15, 0 } + 8c8: [0-9a-f]* { shli r5, r6, 5 ; bzt r15, 0 } + 8d0: [0-9a-f]* { slth_u r5, r6, r7 ; bzt r15, 0 } + 8d8: [0-9a-f]* { subhs r5, r6, r7 ; bzt r15, 0 } + 8e0: [0-9a-f]* { addli r5, r6, 4660 ; bz r15, 0 } + 8e8: [0-9a-f]* { inthb r5, r6, r7 ; bz r15, 0 } + 8f0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; bz r15, 0 } + 8f8: [0-9a-f]* { mullla_su r5, r6, r7 ; bz r15, 0 } + 900: [0-9a-f]* { s2a r5, r6, r7 ; bz r15, 0 } + 908: [0-9a-f]* { shr r5, r6, r7 ; bz r15, 0 } + 910: [0-9a-f]* { sltib r5, r6, 5 ; bz r15, 0 } + 918: [0-9a-f]* { tblidxb1 r5, r6 ; bz r15, 0 } + 920: [0-9a-f]* { addb r5, r6, r7 ; jal 0 } + 928: [0-9a-f]* { crc32_32 r5, r6, r7 ; jal 0 } + 930: [0-9a-f]* { mnz r5, r6, r7 ; jal 0 } + 938: [0-9a-f]* { mulhla_us r5, r6, r7 ; jal 0 } + 940: [0-9a-f]* { packhb r5, r6, r7 ; jal 0 } + 948: [0-9a-f]* { seqih r5, r6, 5 ; jal 0 } + 950: [0-9a-f]* { slteb_u r5, r6, r7 ; jal 0 } + 958: [0-9a-f]* { sub r5, r6, r7 ; jal 0 } + 960: [0-9a-f]* { addih r5, r6, 5 ; j 0 } + 968: [0-9a-f]* { infol 4660 ; j 0 } + 970: [0-9a-f]* { moveli.sn r5, 4660 ; j 0 } + 978: [0-9a-f]* { mullla_ss r5, r6, r7 ; j 0 } + 980: [0-9a-f]* { s1a r5, r6, r7 ; j 0 } + 988: [0-9a-f]* { shlih r5, r6, 5 ; j 0 } + 990: [0-9a-f]* { slti_u r5, r6, 5 ; j 0 } + 998: [0-9a-f]* { tblidxb0 r5, r6 ; j 0 } + 9a0: [0-9a-f]* { and r5, r6, r7 } + 9a8: [0-9a-f]* { info 19 } + 9b0: [0-9a-f]* { lnk r5 } + 9b8: [0-9a-f]* { movei r5, 5 } + 9c0: [0-9a-f]* { mulll_ss r5, r6, r7 } + 9c8: [0-9a-f]* { packlb r5, r6, r7 } + 9d0: [0-9a-f]* { seqi r5, r6, 5 } + 9d8: [0-9a-f]* { sltb_u r5, r6, r7 } + 9e0: [0-9a-f]* { srah r5, r6, r7 } + 9e8: [0-9a-f]* { tns r5, r6 } + 9f0: [0-9a-f]* { add r15, r16, r17 ; addi r5, r6, 5 ; lh r25, r26 } + 9f8: [0-9a-f]* { add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 } + a00: [0-9a-f]* { bitx r5, r6 ; add r15, r16, r17 ; lh r25, r26 } + a08: [0-9a-f]* { clz r5, r6 ; add r15, r16, r17 ; lh r25, r26 } + a10: [0-9a-f]* { dword_align r5, r6, r7 ; add r15, r16, r17 } + a18: [0-9a-f]* { add r15, r16, r17 ; info 19 } + a20: [0-9a-f]* { mulhh_uu r5, r6, r7 ; add r15, r16, r17 ; lb r25, r26 } + a28: [0-9a-f]* { add r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 } + a30: [0-9a-f]* { tblidxb3 r5, r6 ; add r15, r16, r17 ; lb r25, r26 } + a38: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 } + a40: [0-9a-f]* { add r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 } + a48: [0-9a-f]* { add r15, r16, r17 ; add r5, r6, r7 ; lh r25, r26 } + a50: [0-9a-f]* { mullla_ss r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + a58: [0-9a-f]* { add r15, r16, r17 ; shri r5, r6, 5 ; lh r25, r26 } + a60: [0-9a-f]* { add r15, r16, r17 ; andi r5, r6, 5 ; lh_u r25, r26 } + a68: [0-9a-f]* { mvz r5, r6, r7 ; add r15, r16, r17 ; lh_u r25, r26 } + a70: [0-9a-f]* { add r15, r16, r17 ; slte r5, r6, r7 ; lh_u r25, r26 } + a78: [0-9a-f]* { clz r5, r6 ; add r15, r16, r17 ; lw r25, r26 } + a80: [0-9a-f]* { add r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 } + a88: [0-9a-f]* { add r15, r16, r17 ; slti_u r5, r6, 5 ; lw r25, r26 } + a90: [0-9a-f]* { add r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 } + a98: [0-9a-f]* { add r15, r16, r17 ; move r5, r6 ; sw r25, r26 } + aa0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 } + aa8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } + ab0: [0-9a-f]* { mulhl_uu r5, r6, r7 ; add r15, r16, r17 } + ab8: [0-9a-f]* { mulll_ss r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } + ac0: [0-9a-f]* { mullla_ss r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 } + ac8: [0-9a-f]* { mvnz r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + ad0: [0-9a-f]* { add r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 } + ad8: [0-9a-f]* { add r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 } + ae0: [0-9a-f]* { add r15, r16, r17 ; ori r5, r6, 5 ; lb r25, r26 } + ae8: [0-9a-f]* { pcnt r5, r6 ; add r15, r16, r17 ; sb r25, r26 } + af0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } + af8: [0-9a-f]* { add r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 } + b00: [0-9a-f]* { add r15, r16, r17 ; prefetch r25 } + b08: [0-9a-f]* { add r15, r16, r17 ; rli r5, r6, 5 } + b10: [0-9a-f]* { add r15, r16, r17 ; s2a r5, r6, r7 } + b18: [0-9a-f]* { add r15, r16, r17 ; andi r5, r6, 5 ; sb r25, r26 } + b20: [0-9a-f]* { mvz r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 } + b28: [0-9a-f]* { add r15, r16, r17 ; slte r5, r6, r7 ; sb r25, r26 } + b30: [0-9a-f]* { add r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 } + b38: [0-9a-f]* { add r15, r16, r17 ; and r5, r6, r7 ; sh r25, r26 } + b40: [0-9a-f]* { mvnz r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 } + b48: [0-9a-f]* { add r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 } + b50: [0-9a-f]* { add r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 } + b58: [0-9a-f]* { add r15, r16, r17 ; shr r5, r6, r7 ; lb_u r25, r26 } + b60: [0-9a-f]* { add r15, r16, r17 ; shri r5, r6, 5 } + b68: [0-9a-f]* { add r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 } + b70: [0-9a-f]* { add r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 } + b78: [0-9a-f]* { add r15, r16, r17 ; slti r5, r6, 5 } + b80: [0-9a-f]* { add r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 } + b88: [0-9a-f]* { add r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + b90: [0-9a-f]* { add r15, r16, r17 ; sub r5, r6, r7 } + b98: [0-9a-f]* { mulhh_uu r5, r6, r7 ; add r15, r16, r17 ; sw r25, r26 } + ba0: [0-9a-f]* { add r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 } + ba8: [0-9a-f]* { tblidxb3 r5, r6 ; add r15, r16, r17 ; sw r25, r26 } + bb0: [0-9a-f]* { tblidxb1 r5, r6 ; add r15, r16, r17 ; sh r25, r26 } + bb8: [0-9a-f]* { tblidxb3 r5, r6 ; add r15, r16, r17 ; sh r25, r26 } + bc0: [0-9a-f]* { add r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 } + bc8: [0-9a-f]* { add r5, r6, r7 ; addli r15, r16, 4660 } + bd0: [0-9a-f]* { add r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + bd8: [0-9a-f]* { add r5, r6, r7 ; ill ; lh r25, r26 } + be0: [0-9a-f]* { add r5, r6, r7 ; inthh r15, r16, r17 } + be8: [0-9a-f]* { add r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 } + bf0: [0-9a-f]* { add r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + bf8: [0-9a-f]* { add r5, r6, r7 ; nop ; lb_u r25, r26 } + c00: [0-9a-f]* { add r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 } + c08: [0-9a-f]* { add r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + c10: [0-9a-f]* { add r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 } + c18: [0-9a-f]* { add r5, r6, r7 ; nop ; lh_u r25, r26 } + c20: [0-9a-f]* { add r5, r6, r7 ; slti_u r15, r16, 5 ; lh_u r25, r26 } + c28: [0-9a-f]* { add r5, r6, r7 ; movei r15, 5 ; lw r25, r26 } + c30: [0-9a-f]* { add r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + c38: [0-9a-f]* { add r5, r6, r7 ; minib_u r15, r16, 5 } + c40: [0-9a-f]* { add r5, r6, r7 ; move r15, r16 ; prefetch r25 } + c48: [0-9a-f]* { add r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + c50: [0-9a-f]* { add r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 } + c58: [0-9a-f]* { add r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 } + c60: [0-9a-f]* { add r5, r6, r7 ; ill ; prefetch r25 } + c68: [0-9a-f]* { add r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 } + c70: [0-9a-f]* { add r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 } + c78: [0-9a-f]* { add r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 } + c80: [0-9a-f]* { add r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + c88: [0-9a-f]* { add r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 } + c90: [0-9a-f]* { add r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 } + c98: [0-9a-f]* { add r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + ca0: [0-9a-f]* { add r5, r6, r7 ; nop ; sh r25, r26 } + ca8: [0-9a-f]* { add r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 } + cb0: [0-9a-f]* { add r5, r6, r7 ; shli r15, r16, 5 ; lb r25, r26 } + cb8: [0-9a-f]* { add r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 } + cc0: [0-9a-f]* { add r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 } + cc8: [0-9a-f]* { add r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 } + cd0: [0-9a-f]* { add r5, r6, r7 ; slteh r15, r16, r17 } + cd8: [0-9a-f]* { add r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 } + ce0: [0-9a-f]* { add r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 } + ce8: [0-9a-f]* { add r5, r6, r7 ; srai r15, r16, 5 ; sw r25, r26 } + cf0: [0-9a-f]* { add r5, r6, r7 ; add r15, r16, r17 ; sw r25, r26 } + cf8: [0-9a-f]* { add r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + d00: [0-9a-f]* { add r5, r6, r7 ; wh64 r15 } + d08: [0-9a-f]* { addb r15, r16, r17 ; addli r5, r6, 4660 } + d10: [0-9a-f]* { addb r15, r16, r17 ; inthb r5, r6, r7 } + d18: [0-9a-f]* { mulhh_ss r5, r6, r7 ; addb r15, r16, r17 } + d20: [0-9a-f]* { mullla_su r5, r6, r7 ; addb r15, r16, r17 } + d28: [0-9a-f]* { addb r15, r16, r17 ; s2a r5, r6, r7 } + d30: [0-9a-f]* { addb r15, r16, r17 ; shr r5, r6, r7 } + d38: [0-9a-f]* { addb r15, r16, r17 ; sltib r5, r6, 5 } + d40: [0-9a-f]* { tblidxb1 r5, r6 ; addb r15, r16, r17 } + d48: [0-9a-f]* { addb r5, r6, r7 ; finv r15 } + d50: [0-9a-f]* { addb r5, r6, r7 ; lbadd_u r15, r16, 5 } + d58: [0-9a-f]* { addb r5, r6, r7 ; mm r15, r16, r17, 5, 7 } + d60: [0-9a-f]* { addb r5, r6, r7 ; prefetch r15 } + d68: [0-9a-f]* { addb r5, r6, r7 ; shli r15, r16, 5 } + d70: [0-9a-f]* { addb r5, r6, r7 ; slth_u r15, r16, r17 } + d78: [0-9a-f]* { addb r5, r6, r7 ; subhs r15, r16, r17 } + d80: [0-9a-f]* { adiffh r5, r6, r7 ; addbs_u r15, r16, r17 } + d88: [0-9a-f]* { addbs_u r15, r16, r17 ; maxb_u r5, r6, r7 } + d90: [0-9a-f]* { mulhha_su r5, r6, r7 ; addbs_u r15, r16, r17 } + d98: [0-9a-f]* { mvz r5, r6, r7 ; addbs_u r15, r16, r17 } + da0: [0-9a-f]* { sadah_u r5, r6, r7 ; addbs_u r15, r16, r17 } + da8: [0-9a-f]* { addbs_u r15, r16, r17 ; shrib r5, r6, 5 } + db0: [0-9a-f]* { addbs_u r15, r16, r17 ; sne r5, r6, r7 } + db8: [0-9a-f]* { addbs_u r15, r16, r17 ; xori r5, r6, 5 } + dc0: [0-9a-f]* { addbs_u r5, r6, r7 ; ill } + dc8: [0-9a-f]* { addbs_u r5, r6, r7 ; lhadd_u r15, r16, 5 } + dd0: [0-9a-f]* { addbs_u r5, r6, r7 ; move r15, r16 } + dd8: [0-9a-f]* { addbs_u r5, r6, r7 ; s1a r15, r16, r17 } + de0: [0-9a-f]* { addbs_u r5, r6, r7 ; shrb r15, r16, r17 } + de8: [0-9a-f]* { addbs_u r5, r6, r7 ; sltib_u r15, r16, 5 } + df0: [0-9a-f]* { addbs_u r5, r6, r7 ; tns r15, r16 } + df8: [0-9a-f]* { avgb_u r5, r6, r7 ; addh r15, r16, r17 } + e00: [0-9a-f]* { addh r15, r16, r17 ; minb_u r5, r6, r7 } + e08: [0-9a-f]* { mulhl_su r5, r6, r7 ; addh r15, r16, r17 } + e10: [0-9a-f]* { addh r15, r16, r17 ; nop } + e18: [0-9a-f]* { addh r15, r16, r17 ; seq r5, r6, r7 } + e20: [0-9a-f]* { addh r15, r16, r17 ; sltb r5, r6, r7 } + e28: [0-9a-f]* { addh r15, r16, r17 ; srab r5, r6, r7 } + e30: [0-9a-f]* { addh r5, r6, r7 ; addh r15, r16, r17 } + e38: [0-9a-f]* { addh r5, r6, r7 ; inthh r15, r16, r17 } + e40: [0-9a-f]* { addh r5, r6, r7 ; lwadd r15, r16, 5 } + e48: [0-9a-f]* { addh r5, r6, r7 ; mtspr 5, r16 } + e50: [0-9a-f]* { addh r5, r6, r7 ; sbadd r15, r16, 5 } + e58: [0-9a-f]* { addh r5, r6, r7 ; shrih r15, r16, 5 } + e60: [0-9a-f]* { addh r5, r6, r7 ; sneb r15, r16, r17 } + e68: [0-9a-f]* { addhs r15, r16, r17 ; add r5, r6, r7 } + e70: [0-9a-f]* { clz r5, r6 ; addhs r15, r16, r17 } + e78: [0-9a-f]* { addhs r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + e80: [0-9a-f]* { mulhla_su r5, r6, r7 ; addhs r15, r16, r17 } + e88: [0-9a-f]* { addhs r15, r16, r17 ; packbs_u r5, r6, r7 } + e90: [0-9a-f]* { addhs r15, r16, r17 ; seqib r5, r6, 5 } + e98: [0-9a-f]* { addhs r15, r16, r17 ; slteb r5, r6, r7 } + ea0: [0-9a-f]* { addhs r15, r16, r17 ; sraih r5, r6, 5 } + ea8: [0-9a-f]* { addhs r5, r6, r7 ; addih r15, r16, 5 } + eb0: [0-9a-f]* { addhs r5, r6, r7 ; iret } + eb8: [0-9a-f]* { addhs r5, r6, r7 ; maxib_u r15, r16, 5 } + ec0: [0-9a-f]* { addhs r5, r6, r7 ; nop } + ec8: [0-9a-f]* { addhs r5, r6, r7 ; seqi r15, r16, 5 } + ed0: [0-9a-f]* { addhs r5, r6, r7 ; sltb_u r15, r16, r17 } + ed8: [0-9a-f]* { addhs r5, r6, r7 ; srah r15, r16, r17 } + ee0: [0-9a-f]* { addi r15, r16, 5 ; add r5, r6, r7 ; lw r25, r26 } + ee8: [0-9a-f]* { addi r15, r16, 5 ; addib r5, r6, 5 } + ef0: [0-9a-f]* { addi r15, r16, 5 ; andi r5, r6, 5 ; lh_u r25, r26 } + ef8: [0-9a-f]* { bytex r5, r6 ; addi r15, r16, 5 ; lb r25, r26 } + f00: [0-9a-f]* { crc32_32 r5, r6, r7 ; addi r15, r16, 5 } + f08: [0-9a-f]* { addi r15, r16, 5 ; sh r25, r26 } + f10: [0-9a-f]* { addi r15, r16, 5 ; and r5, r6, r7 ; lb r25, r26 } + f18: [0-9a-f]* { mvnz r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 } + f20: [0-9a-f]* { addi r15, r16, 5 ; slt_u r5, r6, r7 ; lb r25, r26 } + f28: [0-9a-f]* { bytex r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 } + f30: [0-9a-f]* { addi r15, r16, 5 ; nop ; lb_u r25, r26 } + f38: [0-9a-f]* { addi r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 } + f40: [0-9a-f]* { addi r15, r16, 5 ; lh r25, r26 } + f48: [0-9a-f]* { addi r15, r16, 5 ; ori r5, r6, 5 ; lh r25, r26 } + f50: [0-9a-f]* { addi r15, r16, 5 ; sra r5, r6, r7 ; lh r25, r26 } + f58: [0-9a-f]* { addi r15, r16, 5 ; move r5, r6 ; lh_u r25, r26 } + f60: [0-9a-f]* { addi r15, r16, 5 ; rli r5, r6, 5 ; lh_u r25, r26 } + f68: [0-9a-f]* { tblidxb0 r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 } + f70: [0-9a-f]* { mulhh_uu r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + f78: [0-9a-f]* { addi r15, r16, 5 ; s3a r5, r6, r7 ; lw r25, r26 } + f80: [0-9a-f]* { tblidxb3 r5, r6 ; addi r15, r16, 5 ; lw r25, r26 } + f88: [0-9a-f]* { addi r15, r16, 5 ; mnz r5, r6, r7 ; sw r25, r26 } + f90: [0-9a-f]* { addi r15, r16, 5 ; movei r5, 5 ; sb r25, r26 } + f98: [0-9a-f]* { mulhh_uu r5, r6, r7 ; addi r15, r16, 5 ; lh_u r25, r26 } + fa0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; addi r15, r16, 5 ; lh r25, r26 } + fa8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; addi r15, r16, 5 ; lh_u r25, r26 } + fb0: [0-9a-f]* { mulll_uu r5, r6, r7 ; addi r15, r16, 5 ; lh r25, r26 } + fb8: [0-9a-f]* { mullla_uu r5, r6, r7 ; addi r15, r16, 5 ; lb_u r25, r26 } + fc0: [0-9a-f]* { mvz r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 } + fc8: [0-9a-f]* { addi r15, r16, 5 ; mzb r5, r6, r7 } + fd0: [0-9a-f]* { addi r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 } + fd8: [0-9a-f]* { addi r15, r16, 5 ; ori r5, r6, 5 ; sw r25, r26 } + fe0: [0-9a-f]* { bitx r5, r6 ; addi r15, r16, 5 ; prefetch r25 } + fe8: [0-9a-f]* { addi r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 } + ff0: [0-9a-f]* { addi r15, r16, 5 ; slte_u r5, r6, r7 ; prefetch r25 } + ff8: [0-9a-f]* { addi r15, r16, 5 ; rl r5, r6, r7 ; sh r25, r26 } + 1000: [0-9a-f]* { addi r15, r16, 5 ; s1a r5, r6, r7 ; sh r25, r26 } + 1008: [0-9a-f]* { addi r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 } + 1010: [0-9a-f]* { addi r15, r16, 5 ; move r5, r6 ; sb r25, r26 } + 1018: [0-9a-f]* { addi r15, r16, 5 ; rli r5, r6, 5 ; sb r25, r26 } + 1020: [0-9a-f]* { tblidxb0 r5, r6 ; addi r15, r16, 5 ; sb r25, r26 } + 1028: [0-9a-f]* { addi r15, r16, 5 ; seqi r5, r6, 5 ; lh r25, r26 } + 1030: [0-9a-f]* { addi r15, r16, 5 ; mnz r5, r6, r7 ; sh r25, r26 } + 1038: [0-9a-f]* { addi r15, r16, 5 ; rl r5, r6, r7 ; sh r25, r26 } + 1040: [0-9a-f]* { addi r15, r16, 5 ; sub r5, r6, r7 ; sh r25, r26 } + 1048: [0-9a-f]* { addi r15, r16, 5 ; shli r5, r6, 5 ; lb_u r25, r26 } + 1050: [0-9a-f]* { addi r15, r16, 5 ; shr r5, r6, r7 } + 1058: [0-9a-f]* { addi r15, r16, 5 ; slt r5, r6, r7 ; prefetch r25 } + 1060: [0-9a-f]* { addi r15, r16, 5 ; slte r5, r6, r7 ; lh_u r25, r26 } + 1068: [0-9a-f]* { addi r15, r16, 5 ; slteh_u r5, r6, r7 } + 1070: [0-9a-f]* { addi r15, r16, 5 ; slti_u r5, r6, 5 ; sh r25, r26 } + 1078: [0-9a-f]* { addi r15, r16, 5 ; sra r5, r6, r7 ; lb_u r25, r26 } + 1080: [0-9a-f]* { addi r15, r16, 5 ; srai r5, r6, 5 } + 1088: [0-9a-f]* { addi r15, r16, 5 ; and r5, r6, r7 ; sw r25, r26 } + 1090: [0-9a-f]* { mvnz r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 } + 1098: [0-9a-f]* { addi r15, r16, 5 ; slt_u r5, r6, r7 ; sw r25, r26 } + 10a0: [0-9a-f]* { tblidxb0 r5, r6 ; addi r15, r16, 5 ; prefetch r25 } + 10a8: [0-9a-f]* { tblidxb2 r5, r6 ; addi r15, r16, 5 ; prefetch r25 } + 10b0: [0-9a-f]* { addi r15, r16, 5 ; xor r5, r6, r7 ; prefetch r25 } + 10b8: [0-9a-f]* { addi r5, r6, 5 ; addi r15, r16, 5 ; lb r25, r26 } + 10c0: [0-9a-f]* { addi r5, r6, 5 ; and r15, r16, r17 ; prefetch r25 } + 10c8: [0-9a-f]* { addi r5, r6, 5 ; lb_u r25, r26 } + 10d0: [0-9a-f]* { addi r5, r6, 5 ; info 19 ; lb r25, r26 } + 10d8: [0-9a-f]* { addi r5, r6, 5 ; jrp r15 } + 10e0: [0-9a-f]* { addi r5, r6, 5 ; s2a r15, r16, r17 ; lb r25, r26 } + 10e8: [0-9a-f]* { addi r5, r6, 5 ; lb_u r15, r16 } + 10f0: [0-9a-f]* { addi r5, r6, 5 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 10f8: [0-9a-f]* { addi r5, r6, 5 ; lbadd_u r15, r16, 5 } + 1100: [0-9a-f]* { addi r5, r6, 5 ; s2a r15, r16, r17 ; lh r25, r26 } + 1108: [0-9a-f]* { addi r5, r6, 5 ; lh_u r15, r16 } + 1110: [0-9a-f]* { addi r5, r6, 5 ; s3a r15, r16, r17 ; lh_u r25, r26 } + 1118: [0-9a-f]* { addi r5, r6, 5 ; lhadd_u r15, r16, 5 } + 1120: [0-9a-f]* { addi r5, r6, 5 ; s1a r15, r16, r17 ; lw r25, r26 } + 1128: [0-9a-f]* { addi r5, r6, 5 ; lw r25, r26 } + 1130: [0-9a-f]* { addi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 } + 1138: [0-9a-f]* { addi r5, r6, 5 ; movei r15, 5 ; lh_u r25, r26 } + 1140: [0-9a-f]* { addi r5, r6, 5 ; mzb r15, r16, r17 } + 1148: [0-9a-f]* { addi r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 } + 1150: [0-9a-f]* { addi r5, r6, 5 ; ori r15, r16, 5 ; sw r25, r26 } + 1158: [0-9a-f]* { addi r5, r6, 5 ; or r15, r16, r17 ; prefetch r25 } + 1160: [0-9a-f]* { addi r5, r6, 5 ; sra r15, r16, r17 ; prefetch r25 } + 1168: [0-9a-f]* { addi r5, r6, 5 ; rli r15, r16, 5 ; lw r25, r26 } + 1170: [0-9a-f]* { addi r5, r6, 5 ; s2a r15, r16, r17 ; lw r25, r26 } + 1178: [0-9a-f]* { addi r5, r6, 5 ; andi r15, r16, 5 ; sb r25, r26 } + 1180: [0-9a-f]* { addi r5, r6, 5 ; shli r15, r16, 5 ; sb r25, r26 } + 1188: [0-9a-f]* { addi r5, r6, 5 ; seq r15, r16, r17 ; lw r25, r26 } + 1190: [0-9a-f]* { addi r5, r6, 5 ; sh r15, r16 } + 1198: [0-9a-f]* { addi r5, r6, 5 ; s3a r15, r16, r17 ; sh r25, r26 } + 11a0: [0-9a-f]* { addi r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 } + 11a8: [0-9a-f]* { addi r5, r6, 5 ; shli r15, r16, 5 ; sw r25, r26 } + 11b0: [0-9a-f]* { addi r5, r6, 5 ; shri r15, r16, 5 ; lw r25, r26 } + 11b8: [0-9a-f]* { addi r5, r6, 5 ; slt_u r15, r16, r17 ; lh r25, r26 } + 11c0: [0-9a-f]* { addi r5, r6, 5 ; slte_u r15, r16, r17 ; lb r25, r26 } + 11c8: [0-9a-f]* { addi r5, r6, 5 ; slti r15, r16, 5 ; lw r25, r26 } + 11d0: [0-9a-f]* { addi r5, r6, 5 ; sne r15, r16, r17 ; lb r25, r26 } + 11d8: [0-9a-f]* { addi r5, r6, 5 ; sra r15, r16, r17 ; sw r25, r26 } + 11e0: [0-9a-f]* { addi r5, r6, 5 ; sub r15, r16, r17 ; lw r25, r26 } + 11e8: [0-9a-f]* { addi r5, r6, 5 ; move r15, r16 ; sw r25, r26 } + 11f0: [0-9a-f]* { addi r5, r6, 5 ; slte r15, r16, r17 ; sw r25, r26 } + 11f8: [0-9a-f]* { addi r5, r6, 5 ; xor r15, r16, r17 ; sh r25, r26 } + 1200: [0-9a-f]* { avgb_u r5, r6, r7 ; addib r15, r16, 5 } + 1208: [0-9a-f]* { addib r15, r16, 5 ; minb_u r5, r6, r7 } + 1210: [0-9a-f]* { mulhl_su r5, r6, r7 ; addib r15, r16, 5 } + 1218: [0-9a-f]* { addib r15, r16, 5 ; nop } + 1220: [0-9a-f]* { addib r15, r16, 5 ; seq r5, r6, r7 } + 1228: [0-9a-f]* { addib r15, r16, 5 ; sltb r5, r6, r7 } + 1230: [0-9a-f]* { addib r15, r16, 5 ; srab r5, r6, r7 } + 1238: [0-9a-f]* { addib r5, r6, 5 ; addh r15, r16, r17 } + 1240: [0-9a-f]* { addib r5, r6, 5 ; inthh r15, r16, r17 } + 1248: [0-9a-f]* { addib r5, r6, 5 ; lwadd r15, r16, 5 } + 1250: [0-9a-f]* { addib r5, r6, 5 ; mtspr 5, r16 } + 1258: [0-9a-f]* { addib r5, r6, 5 ; sbadd r15, r16, 5 } + 1260: [0-9a-f]* { addib r5, r6, 5 ; shrih r15, r16, 5 } + 1268: [0-9a-f]* { addib r5, r6, 5 ; sneb r15, r16, r17 } + 1270: [0-9a-f]* { addih r15, r16, 5 ; add r5, r6, r7 } + 1278: [0-9a-f]* { clz r5, r6 ; addih r15, r16, 5 } + 1280: [0-9a-f]* { addih r15, r16, 5 ; mm r5, r6, r7, 5, 7 } + 1288: [0-9a-f]* { mulhla_su r5, r6, r7 ; addih r15, r16, 5 } + 1290: [0-9a-f]* { addih r15, r16, 5 ; packbs_u r5, r6, r7 } + 1298: [0-9a-f]* { addih r15, r16, 5 ; seqib r5, r6, 5 } + 12a0: [0-9a-f]* { addih r15, r16, 5 ; slteb r5, r6, r7 } + 12a8: [0-9a-f]* { addih r15, r16, 5 ; sraih r5, r6, 5 } + 12b0: [0-9a-f]* { addih r5, r6, 5 ; addih r15, r16, 5 } + 12b8: [0-9a-f]* { addih r5, r6, 5 ; iret } + 12c0: [0-9a-f]* { addih r5, r6, 5 ; maxib_u r15, r16, 5 } + 12c8: [0-9a-f]* { addih r5, r6, 5 ; nop } + 12d0: [0-9a-f]* { addih r5, r6, 5 ; seqi r15, r16, 5 } + 12d8: [0-9a-f]* { addih r5, r6, 5 ; sltb_u r15, r16, r17 } + 12e0: [0-9a-f]* { addih r5, r6, 5 ; srah r15, r16, r17 } + 12e8: [0-9a-f]* { addli r15, r16, 4660 ; addhs r5, r6, r7 } + 12f0: [0-9a-f]* { dword_align r5, r6, r7 ; addli r15, r16, 4660 } + 12f8: [0-9a-f]* { addli r15, r16, 4660 ; move r5, r6 } + 1300: [0-9a-f]* { mulll_ss r5, r6, r7 ; addli r15, r16, 4660 } + 1308: [0-9a-f]* { pcnt r5, r6 ; addli r15, r16, 4660 } + 1310: [0-9a-f]* { addli r15, r16, 4660 ; shlh r5, r6, r7 } + 1318: [0-9a-f]* { addli r15, r16, 4660 ; slth r5, r6, r7 } + 1320: [0-9a-f]* { addli r15, r16, 4660 ; subh r5, r6, r7 } + 1328: [0-9a-f]* { addli r5, r6, 4660 ; and r15, r16, r17 } + 1330: [0-9a-f]* { addli r5, r6, 4660 ; jrp r15 } + 1338: [0-9a-f]* { addli r5, r6, 4660 ; minb_u r15, r16, r17 } + 1340: [0-9a-f]* { addli r5, r6, 4660 ; packbs_u r15, r16, r17 } + 1348: [0-9a-f]* { addli r5, r6, 4660 ; shadd r15, r16, 5 } + 1350: [0-9a-f]* { addli r5, r6, 4660 ; slteb_u r15, r16, r17 } + 1358: [0-9a-f]* { addli r5, r6, 4660 ; sub r15, r16, r17 } + 1360: [0-9a-f]* { addli.sn r15, r16, 4660 ; addli r5, r6, 4660 } + 1368: [0-9a-f]* { addli.sn r15, r16, 4660 ; inthh r5, r6, r7 } + 1370: [0-9a-f]* { mulhh_uu r5, r6, r7 ; addli.sn r15, r16, 4660 } + 1378: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; addli.sn r15, r16, 4660 } + 1380: [0-9a-f]* { sadab_u r5, r6, r7 ; addli.sn r15, r16, 4660 } + 1388: [0-9a-f]* { addli.sn r15, r16, 4660 ; shrh r5, r6, r7 } + 1390: [0-9a-f]* { addli.sn r15, r16, 4660 ; sltih r5, r6, 5 } + 1398: [0-9a-f]* { tblidxb3 r5, r6 ; addli.sn r15, r16, 4660 } + 13a0: [0-9a-f]* { addli.sn r5, r6, 4660 ; icoh r15 } + 13a8: [0-9a-f]* { addli.sn r5, r6, 4660 ; lhadd r15, r16, 5 } + 13b0: [0-9a-f]* { addli.sn r5, r6, 4660 ; mnzh r15, r16, r17 } + 13b8: [0-9a-f]* { addli.sn r5, r6, 4660 ; s1a r15, r16, r17 } + 13c0: [0-9a-f]* { addli.sn r5, r6, 4660 ; shrb r15, r16, r17 } + 13c8: [0-9a-f]* { addli.sn r5, r6, 4660 ; sltib_u r15, r16, 5 } + 13d0: [0-9a-f]* { addli.sn r5, r6, 4660 ; tns r15, r16 } + 13d8: [0-9a-f]* { avgb_u r5, r6, r7 ; adds r15, r16, r17 } + 13e0: [0-9a-f]* { adds r15, r16, r17 ; minb_u r5, r6, r7 } + 13e8: [0-9a-f]* { mulhl_su r5, r6, r7 ; adds r15, r16, r17 } + 13f0: [0-9a-f]* { adds r15, r16, r17 ; nop } + 13f8: [0-9a-f]* { adds r15, r16, r17 ; seq r5, r6, r7 } + 1400: [0-9a-f]* { adds r15, r16, r17 ; sltb r5, r6, r7 } + 1408: [0-9a-f]* { adds r15, r16, r17 ; srab r5, r6, r7 } + 1410: [0-9a-f]* { adds r5, r6, r7 ; addh r15, r16, r17 } + 1418: [0-9a-f]* { adds r5, r6, r7 ; inthh r15, r16, r17 } + 1420: [0-9a-f]* { adds r5, r6, r7 ; lwadd r15, r16, 5 } + 1428: [0-9a-f]* { adds r5, r6, r7 ; mtspr 5, r16 } + 1430: [0-9a-f]* { adds r5, r6, r7 ; sbadd r15, r16, 5 } + 1438: [0-9a-f]* { adds r5, r6, r7 ; shrih r15, r16, 5 } + 1440: [0-9a-f]* { adds r5, r6, r7 ; sneb r15, r16, r17 } + 1448: [0-9a-f]* { adiffb_u r5, r6, r7 ; add r15, r16, r17 } + 1450: [0-9a-f]* { adiffb_u r5, r6, r7 ; info 19 } + 1458: [0-9a-f]* { adiffb_u r5, r6, r7 ; lnk r15 } + 1460: [0-9a-f]* { adiffb_u r5, r6, r7 ; movei r15, 5 } + 1468: [0-9a-f]* { adiffb_u r5, r6, r7 ; s2a r15, r16, r17 } + 1470: [0-9a-f]* { adiffb_u r5, r6, r7 ; shrh r15, r16, r17 } + 1478: [0-9a-f]* { adiffb_u r5, r6, r7 ; sltih r15, r16, 5 } + 1480: [0-9a-f]* { adiffb_u r5, r6, r7 ; wh64 r15 } + 1488: [0-9a-f]* { adiffh r5, r6, r7 } + 1490: [0-9a-f]* { adiffh r5, r6, r7 ; lh_u r15, r16 } + 1498: [0-9a-f]* { adiffh r5, r6, r7 ; mnzb r15, r16, r17 } + 14a0: [0-9a-f]* { adiffh r5, r6, r7 ; rl r15, r16, r17 } + 14a8: [0-9a-f]* { adiffh r5, r6, r7 ; shlih r15, r16, 5 } + 14b0: [0-9a-f]* { adiffh r5, r6, r7 ; slti_u r15, r16, 5 } + 14b8: [0-9a-f]* { adiffh r5, r6, r7 ; sw r15, r16 } + 14c0: [0-9a-f]* { and r15, r16, r17 ; addi r5, r6, 5 ; lb r25, r26 } + 14c8: [0-9a-f]* { and r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 } + 14d0: [0-9a-f]* { bitx r5, r6 ; and r15, r16, r17 ; lb r25, r26 } + 14d8: [0-9a-f]* { clz r5, r6 ; and r15, r16, r17 ; lb r25, r26 } + 14e0: [0-9a-f]* { ctz r5, r6 ; and r15, r16, r17 ; sw r25, r26 } + 14e8: [0-9a-f]* { and r15, r16, r17 ; info 19 ; sh r25, r26 } + 14f0: [0-9a-f]* { and r15, r16, r17 ; movei r5, 5 ; lb r25, r26 } + 14f8: [0-9a-f]* { and r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 } + 1500: [0-9a-f]* { tblidxb1 r5, r6 ; and r15, r16, r17 ; lb r25, r26 } + 1508: [0-9a-f]* { mulhha_ss r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + 1510: [0-9a-f]* { and r15, r16, r17 ; seq r5, r6, r7 ; lb_u r25, r26 } + 1518: [0-9a-f]* { and r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 } + 1520: [0-9a-f]* { mulll_ss r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + 1528: [0-9a-f]* { and r15, r16, r17 ; shli r5, r6, 5 ; lh r25, r26 } + 1530: [0-9a-f]* { and r15, r16, r17 ; addi r5, r6, 5 ; lh_u r25, r26 } + 1538: [0-9a-f]* { mullla_uu r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + 1540: [0-9a-f]* { and r15, r16, r17 ; slt r5, r6, r7 ; lh_u r25, r26 } + 1548: [0-9a-f]* { bitx r5, r6 ; and r15, r16, r17 ; lw r25, r26 } + 1550: [0-9a-f]* { and r15, r16, r17 ; mz r5, r6, r7 ; lw r25, r26 } + 1558: [0-9a-f]* { and r15, r16, r17 ; slte_u r5, r6, r7 ; lw r25, r26 } + 1560: [0-9a-f]* { and r15, r16, r17 ; minih r5, r6, 5 } + 1568: [0-9a-f]* { and r15, r16, r17 ; move r5, r6 ; sb r25, r26 } + 1570: [0-9a-f]* { mulhh_ss r5, r6, r7 ; and r15, r16, r17 ; lw r25, r26 } + 1578: [0-9a-f]* { mulhha_ss r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + 1580: [0-9a-f]* { mulhl_su r5, r6, r7 ; and r15, r16, r17 } + 1588: [0-9a-f]* { mulll_ss r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + 1590: [0-9a-f]* { mullla_ss r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + 1598: [0-9a-f]* { mvnz r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + 15a0: [0-9a-f]* { and r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 } + 15a8: [0-9a-f]* { and r15, r16, r17 ; nop ; sw r25, r26 } + 15b0: [0-9a-f]* { and r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 } + 15b8: [0-9a-f]* { pcnt r5, r6 ; and r15, r16, r17 ; lw r25, r26 } + 15c0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + 15c8: [0-9a-f]* { and r15, r16, r17 ; s3a r5, r6, r7 ; prefetch r25 } + 15d0: [0-9a-f]* { tblidxb3 r5, r6 ; and r15, r16, r17 ; prefetch r25 } + 15d8: [0-9a-f]* { and r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 } + 15e0: [0-9a-f]* { and r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 } + 15e8: [0-9a-f]* { and r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 } + 15f0: [0-9a-f]* { mullla_uu r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 } + 15f8: [0-9a-f]* { and r15, r16, r17 ; slt r5, r6, r7 ; sb r25, r26 } + 1600: [0-9a-f]* { and r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 } + 1608: [0-9a-f]* { and r15, r16, r17 ; add r5, r6, r7 ; sh r25, r26 } + 1610: [0-9a-f]* { mullla_ss r5, r6, r7 ; and r15, r16, r17 ; sh r25, r26 } + 1618: [0-9a-f]* { and r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 } + 1620: [0-9a-f]* { and r15, r16, r17 ; shl r5, r6, r7 ; lh_u r25, r26 } + 1628: [0-9a-f]* { and r15, r16, r17 ; shlih r5, r6, 5 } + 1630: [0-9a-f]* { and r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 } + 1638: [0-9a-f]* { and r15, r16, r17 ; slt_u r5, r6, r7 ; prefetch r25 } + 1640: [0-9a-f]* { and r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 } + 1648: [0-9a-f]* { and r15, r16, r17 ; slti r5, r6, 5 ; sh r25, r26 } + 1650: [0-9a-f]* { and r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 } + 1658: [0-9a-f]* { and r15, r16, r17 ; srah r5, r6, r7 } + 1660: [0-9a-f]* { and r15, r16, r17 ; sub r5, r6, r7 ; sh r25, r26 } + 1668: [0-9a-f]* { and r15, r16, r17 ; movei r5, 5 ; sw r25, r26 } + 1670: [0-9a-f]* { and r15, r16, r17 ; s1a r5, r6, r7 ; sw r25, r26 } + 1678: [0-9a-f]* { tblidxb1 r5, r6 ; and r15, r16, r17 ; sw r25, r26 } + 1680: [0-9a-f]* { tblidxb1 r5, r6 ; and r15, r16, r17 ; prefetch r25 } + 1688: [0-9a-f]* { tblidxb3 r5, r6 ; and r15, r16, r17 ; prefetch r25 } + 1690: [0-9a-f]* { and r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 } + 1698: [0-9a-f]* { and r5, r6, r7 ; addib r15, r16, 5 } + 16a0: [0-9a-f]* { and r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 16a8: [0-9a-f]* { and r5, r6, r7 ; ill ; lb r25, r26 } + 16b0: [0-9a-f]* { and r5, r6, r7 ; infol 4660 } + 16b8: [0-9a-f]* { and r5, r6, r7 ; move r15, r16 ; lb r25, r26 } + 16c0: [0-9a-f]* { and r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 } + 16c8: [0-9a-f]* { and r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + 16d0: [0-9a-f]* { and r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + 16d8: [0-9a-f]* { and r5, r6, r7 ; move r15, r16 ; lh r25, r26 } + 16e0: [0-9a-f]* { and r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 } + 16e8: [0-9a-f]* { and r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 } + 16f0: [0-9a-f]* { and r5, r6, r7 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + 16f8: [0-9a-f]* { and r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 } + 1700: [0-9a-f]* { and r5, r6, r7 ; slt_u r15, r16, r17 ; lw r25, r26 } + 1708: [0-9a-f]* { and r5, r6, r7 ; minb_u r15, r16, r17 } + 1710: [0-9a-f]* { and r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 } + 1718: [0-9a-f]* { and r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 } + 1720: [0-9a-f]* { and r5, r6, r7 ; nop ; sw r25, r26 } + 1728: [0-9a-f]* { and r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 } + 1730: [0-9a-f]* { and r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 1738: [0-9a-f]* { and r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + 1740: [0-9a-f]* { and r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + 1748: [0-9a-f]* { and r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 } + 1750: [0-9a-f]* { and r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 } + 1758: [0-9a-f]* { and r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 } + 1760: [0-9a-f]* { and r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 } + 1768: [0-9a-f]* { and r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 } + 1770: [0-9a-f]* { and r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + 1778: [0-9a-f]* { and r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 } + 1780: [0-9a-f]* { and r5, r6, r7 ; shlb r15, r16, r17 } + 1788: [0-9a-f]* { and r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 } + 1790: [0-9a-f]* { and r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 } + 1798: [0-9a-f]* { and r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 } + 17a0: [0-9a-f]* { and r5, r6, r7 ; slteb r15, r16, r17 } + 17a8: [0-9a-f]* { and r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 } + 17b0: [0-9a-f]* { and r5, r6, r7 ; sneb r15, r16, r17 } + 17b8: [0-9a-f]* { and r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 } + 17c0: [0-9a-f]* { and r5, r6, r7 ; subs r15, r16, r17 } + 17c8: [0-9a-f]* { and r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + 17d0: [0-9a-f]* { and r5, r6, r7 ; swadd r15, r16, 5 } + 17d8: [0-9a-f]* { andi r15, r16, 5 ; add r5, r6, r7 ; sb r25, r26 } + 17e0: [0-9a-f]* { andi r15, r16, 5 ; addli r5, r6, 4660 } + 17e8: [0-9a-f]* { andi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 } + 17f0: [0-9a-f]* { bytex r5, r6 ; andi r15, r16, 5 ; lh r25, r26 } + 17f8: [0-9a-f]* { ctz r5, r6 ; andi r15, r16, 5 ; lb r25, r26 } + 1800: [0-9a-f]* { andi r15, r16, 5 } + 1808: [0-9a-f]* { bitx r5, r6 ; andi r15, r16, 5 ; lb r25, r26 } + 1810: [0-9a-f]* { andi r15, r16, 5 ; mz r5, r6, r7 ; lb r25, r26 } + 1818: [0-9a-f]* { andi r15, r16, 5 ; slte_u r5, r6, r7 ; lb r25, r26 } + 1820: [0-9a-f]* { ctz r5, r6 ; andi r15, r16, 5 ; lb_u r25, r26 } + 1828: [0-9a-f]* { andi r15, r16, 5 ; or r5, r6, r7 ; lb_u r25, r26 } + 1830: [0-9a-f]* { andi r15, r16, 5 ; sne r5, r6, r7 ; lb_u r25, r26 } + 1838: [0-9a-f]* { andi r15, r16, 5 ; mnz r5, r6, r7 ; lh r25, r26 } + 1840: [0-9a-f]* { andi r15, r16, 5 ; rl r5, r6, r7 ; lh r25, r26 } + 1848: [0-9a-f]* { andi r15, r16, 5 ; sub r5, r6, r7 ; lh r25, r26 } + 1850: [0-9a-f]* { mulhh_ss r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + 1858: [0-9a-f]* { andi r15, r16, 5 ; s2a r5, r6, r7 ; lh_u r25, r26 } + 1860: [0-9a-f]* { tblidxb2 r5, r6 ; andi r15, r16, 5 ; lh_u r25, r26 } + 1868: [0-9a-f]* { mulhha_uu r5, r6, r7 ; andi r15, r16, 5 ; lw r25, r26 } + 1870: [0-9a-f]* { andi r15, r16, 5 ; seqi r5, r6, 5 ; lw r25, r26 } + 1878: [0-9a-f]* { andi r15, r16, 5 ; lw r25, r26 } + 1880: [0-9a-f]* { andi r15, r16, 5 ; mnzb r5, r6, r7 } + 1888: [0-9a-f]* { andi r15, r16, 5 ; movei r5, 5 ; sw r25, r26 } + 1890: [0-9a-f]* { mulhh_uu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 1898: [0-9a-f]* { mulhha_uu r5, r6, r7 ; andi r15, r16, 5 ; lw r25, r26 } + 18a0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 18a8: [0-9a-f]* { mulll_uu r5, r6, r7 ; andi r15, r16, 5 ; lw r25, r26 } + 18b0: [0-9a-f]* { mullla_uu r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + 18b8: [0-9a-f]* { mvz r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 } + 18c0: [0-9a-f]* { andi r15, r16, 5 ; nop ; lb r25, r26 } + 18c8: [0-9a-f]* { andi r15, r16, 5 ; or r5, r6, r7 ; lb r25, r26 } + 18d0: [0-9a-f]* { andi r15, r16, 5 ; packbs_u r5, r6, r7 } + 18d8: [0-9a-f]* { clz r5, r6 ; andi r15, r16, 5 ; prefetch r25 } + 18e0: [0-9a-f]* { andi r15, r16, 5 ; nor r5, r6, r7 ; prefetch r25 } + 18e8: [0-9a-f]* { andi r15, r16, 5 ; slti_u r5, r6, 5 ; prefetch r25 } + 18f0: [0-9a-f]* { andi r15, r16, 5 ; rl r5, r6, r7 } + 18f8: [0-9a-f]* { andi r15, r16, 5 ; s1a r5, r6, r7 } + 1900: [0-9a-f]* { andi r15, r16, 5 ; s3a r5, r6, r7 } + 1908: [0-9a-f]* { mulhh_ss r5, r6, r7 ; andi r15, r16, 5 ; sb r25, r26 } + 1910: [0-9a-f]* { andi r15, r16, 5 ; s2a r5, r6, r7 ; sb r25, r26 } + 1918: [0-9a-f]* { tblidxb2 r5, r6 ; andi r15, r16, 5 ; sb r25, r26 } + 1920: [0-9a-f]* { andi r15, r16, 5 ; seqi r5, r6, 5 ; lw r25, r26 } + 1928: [0-9a-f]* { andi r15, r16, 5 ; movei r5, 5 ; sh r25, r26 } + 1930: [0-9a-f]* { andi r15, r16, 5 ; s1a r5, r6, r7 ; sh r25, r26 } + 1938: [0-9a-f]* { tblidxb1 r5, r6 ; andi r15, r16, 5 ; sh r25, r26 } + 1940: [0-9a-f]* { andi r15, r16, 5 ; shli r5, r6, 5 ; lh_u r25, r26 } + 1948: [0-9a-f]* { andi r15, r16, 5 ; shrh r5, r6, r7 } + 1950: [0-9a-f]* { andi r15, r16, 5 ; slt r5, r6, r7 ; sh r25, r26 } + 1958: [0-9a-f]* { andi r15, r16, 5 ; slte r5, r6, r7 ; prefetch r25 } + 1960: [0-9a-f]* { andi r15, r16, 5 ; slth_u r5, r6, r7 } + 1968: [0-9a-f]* { andi r15, r16, 5 ; slti_u r5, r6, 5 } + 1970: [0-9a-f]* { andi r15, r16, 5 ; sra r5, r6, r7 ; lh_u r25, r26 } + 1978: [0-9a-f]* { andi r15, r16, 5 ; sraih r5, r6, 5 } + 1980: [0-9a-f]* { bitx r5, r6 ; andi r15, r16, 5 ; sw r25, r26 } + 1988: [0-9a-f]* { andi r15, r16, 5 ; mz r5, r6, r7 ; sw r25, r26 } + 1990: [0-9a-f]* { andi r15, r16, 5 ; slte_u r5, r6, r7 ; sw r25, r26 } + 1998: [0-9a-f]* { tblidxb0 r5, r6 ; andi r15, r16, 5 ; sh r25, r26 } + 19a0: [0-9a-f]* { tblidxb2 r5, r6 ; andi r15, r16, 5 ; sh r25, r26 } + 19a8: [0-9a-f]* { andi r15, r16, 5 ; xor r5, r6, r7 ; sh r25, r26 } + 19b0: [0-9a-f]* { andi r5, r6, 5 ; addi r15, r16, 5 ; lh r25, r26 } + 19b8: [0-9a-f]* { andi r5, r6, 5 ; and r15, r16, r17 ; sh r25, r26 } + 19c0: [0-9a-f]* { andi r5, r6, 5 ; lh_u r25, r26 } + 19c8: [0-9a-f]* { andi r5, r6, 5 ; info 19 ; lh r25, r26 } + 19d0: [0-9a-f]* { andi r5, r6, 5 ; add r15, r16, r17 ; lb r25, r26 } + 19d8: [0-9a-f]* { andi r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 } + 19e0: [0-9a-f]* { andi r5, r6, 5 ; addi r15, r16, 5 ; lb_u r25, r26 } + 19e8: [0-9a-f]* { andi r5, r6, 5 ; seqi r15, r16, 5 ; lb_u r25, r26 } + 19f0: [0-9a-f]* { andi r5, r6, 5 ; add r15, r16, r17 ; lh r25, r26 } + 19f8: [0-9a-f]* { andi r5, r6, 5 ; seq r15, r16, r17 ; lh r25, r26 } + 1a00: [0-9a-f]* { andi r5, r6, 5 ; addi r15, r16, 5 ; lh_u r25, r26 } + 1a08: [0-9a-f]* { andi r5, r6, 5 ; seqi r15, r16, 5 ; lh_u r25, r26 } + 1a10: [0-9a-f]* { andi r5, r6, 5 ; lw r15, r16 } + 1a18: [0-9a-f]* { andi r5, r6, 5 ; s3a r15, r16, r17 ; lw r25, r26 } + 1a20: [0-9a-f]* { andi r5, r6, 5 ; lwadd r15, r16, 5 } + 1a28: [0-9a-f]* { andi r5, r6, 5 ; mnz r15, r16, r17 ; sh r25, r26 } + 1a30: [0-9a-f]* { andi r5, r6, 5 ; movei r15, 5 ; prefetch r25 } + 1a38: [0-9a-f]* { andi r5, r6, 5 ; nop ; lb r25, r26 } + 1a40: [0-9a-f]* { andi r5, r6, 5 ; or r15, r16, r17 ; lb r25, r26 } + 1a48: [0-9a-f]* { andi r5, r6, 5 ; packbs_u r15, r16, r17 } + 1a50: [0-9a-f]* { andi r5, r6, 5 ; rl r15, r16, r17 ; prefetch r25 } + 1a58: [0-9a-f]* { andi r5, r6, 5 ; sub r15, r16, r17 ; prefetch r25 } + 1a60: [0-9a-f]* { andi r5, r6, 5 ; rli r15, r16, 5 ; sb r25, r26 } + 1a68: [0-9a-f]* { andi r5, r6, 5 ; s2a r15, r16, r17 ; sb r25, r26 } + 1a70: [0-9a-f]* { andi r5, r6, 5 ; ill ; sb r25, r26 } + 1a78: [0-9a-f]* { andi r5, r6, 5 ; shri r15, r16, 5 ; sb r25, r26 } + 1a80: [0-9a-f]* { andi r5, r6, 5 ; seq r15, r16, r17 ; sb r25, r26 } + 1a88: [0-9a-f]* { andi r5, r6, 5 ; addi r15, r16, 5 ; sh r25, r26 } + 1a90: [0-9a-f]* { andi r5, r6, 5 ; seqi r15, r16, 5 ; sh r25, r26 } + 1a98: [0-9a-f]* { andi r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 } + 1aa0: [0-9a-f]* { andi r5, r6, 5 ; shlib r15, r16, 5 } + 1aa8: [0-9a-f]* { andi r5, r6, 5 ; shri r15, r16, 5 ; sb r25, r26 } + 1ab0: [0-9a-f]* { andi r5, r6, 5 ; slt_u r15, r16, r17 ; lw r25, r26 } + 1ab8: [0-9a-f]* { andi r5, r6, 5 ; slte_u r15, r16, r17 ; lh r25, r26 } + 1ac0: [0-9a-f]* { andi r5, r6, 5 ; slti r15, r16, 5 ; sb r25, r26 } + 1ac8: [0-9a-f]* { andi r5, r6, 5 ; sne r15, r16, r17 ; lh r25, r26 } + 1ad0: [0-9a-f]* { andi r5, r6, 5 ; srab r15, r16, r17 } + 1ad8: [0-9a-f]* { andi r5, r6, 5 ; sub r15, r16, r17 ; sb r25, r26 } + 1ae0: [0-9a-f]* { andi r5, r6, 5 ; mz r15, r16, r17 ; sw r25, r26 } + 1ae8: [0-9a-f]* { andi r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 } + 1af0: [0-9a-f]* { andi r5, r6, 5 ; xor r15, r16, r17 } + 1af8: [0-9a-f]* { bitx r5, r6 ; auli r15, r16, 4660 } + 1b00: [0-9a-f]* { auli r15, r16, 4660 ; minib_u r5, r6, 5 } + 1b08: [0-9a-f]* { mulhl_uu r5, r6, r7 ; auli r15, r16, 4660 } + 1b10: [0-9a-f]* { auli r15, r16, 4660 ; or r5, r6, r7 } + 1b18: [0-9a-f]* { auli r15, r16, 4660 ; seqh r5, r6, r7 } + 1b20: [0-9a-f]* { auli r15, r16, 4660 ; slte r5, r6, r7 } + 1b28: [0-9a-f]* { auli r15, r16, 4660 ; srai r5, r6, 5 } + 1b30: [0-9a-f]* { auli r5, r6, 4660 ; addi r15, r16, 5 } + 1b38: [0-9a-f]* { auli r5, r6, 4660 ; intlh r15, r16, r17 } + 1b40: [0-9a-f]* { auli r5, r6, 4660 ; maxb_u r15, r16, r17 } + 1b48: [0-9a-f]* { auli r5, r6, 4660 ; mzb r15, r16, r17 } + 1b50: [0-9a-f]* { auli r5, r6, 4660 ; seqb r15, r16, r17 } + 1b58: [0-9a-f]* { auli r5, r6, 4660 ; slt_u r15, r16, r17 } + 1b60: [0-9a-f]* { auli r5, r6, 4660 ; sra r15, r16, r17 } + 1b68: [0-9a-f]* { avgb_u r5, r6, r7 ; addbs_u r15, r16, r17 } + 1b70: [0-9a-f]* { avgb_u r5, r6, r7 ; inthb r15, r16, r17 } + 1b78: [0-9a-f]* { avgb_u r5, r6, r7 ; lw_na r15, r16 } + 1b80: [0-9a-f]* { avgb_u r5, r6, r7 ; moveli.sn r15, 4660 } + 1b88: [0-9a-f]* { avgb_u r5, r6, r7 ; sb r15, r16 } + 1b90: [0-9a-f]* { avgb_u r5, r6, r7 ; shrib r15, r16, 5 } + 1b98: [0-9a-f]* { avgb_u r5, r6, r7 ; sne r15, r16, r17 } + 1ba0: [0-9a-f]* { avgb_u r5, r6, r7 ; xori r15, r16, 5 } + 1ba8: [0-9a-f]* { avgh r5, r6, r7 ; ill } + 1bb0: [0-9a-f]* { avgh r5, r6, r7 ; lhadd_u r15, r16, 5 } + 1bb8: [0-9a-f]* { avgh r5, r6, r7 ; move r15, r16 } + 1bc0: [0-9a-f]* { avgh r5, r6, r7 ; s1a r15, r16, r17 } + 1bc8: [0-9a-f]* { avgh r5, r6, r7 ; shrb r15, r16, r17 } + 1bd0: [0-9a-f]* { avgh r5, r6, r7 ; sltib_u r15, r16, 5 } + 1bd8: [0-9a-f]* { avgh r5, r6, r7 ; tns r15, r16 } + 1be0: [0-9a-f]* { bitx r5, r6 ; addi r15, r16, 5 ; lh r25, r26 } + 1be8: [0-9a-f]* { bitx r5, r6 ; and r15, r16, r17 ; sh r25, r26 } + 1bf0: [0-9a-f]* { bitx r5, r6 ; lh_u r25, r26 } + 1bf8: [0-9a-f]* { bitx r5, r6 ; info 19 ; lh r25, r26 } + 1c00: [0-9a-f]* { bitx r5, r6 ; add r15, r16, r17 ; lb r25, r26 } + 1c08: [0-9a-f]* { bitx r5, r6 ; seq r15, r16, r17 ; lb r25, r26 } + 1c10: [0-9a-f]* { bitx r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 } + 1c18: [0-9a-f]* { bitx r5, r6 ; seqi r15, r16, 5 ; lb_u r25, r26 } + 1c20: [0-9a-f]* { bitx r5, r6 ; add r15, r16, r17 ; lh r25, r26 } + 1c28: [0-9a-f]* { bitx r5, r6 ; seq r15, r16, r17 ; lh r25, r26 } + 1c30: [0-9a-f]* { bitx r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 } + 1c38: [0-9a-f]* { bitx r5, r6 ; seqi r15, r16, 5 ; lh_u r25, r26 } + 1c40: [0-9a-f]* { bitx r5, r6 ; lw r15, r16 } + 1c48: [0-9a-f]* { bitx r5, r6 ; s3a r15, r16, r17 ; lw r25, r26 } + 1c50: [0-9a-f]* { bitx r5, r6 ; lwadd r15, r16, 5 } + 1c58: [0-9a-f]* { bitx r5, r6 ; mnz r15, r16, r17 ; sh r25, r26 } + 1c60: [0-9a-f]* { bitx r5, r6 ; movei r15, 5 ; prefetch r25 } + 1c68: [0-9a-f]* { bitx r5, r6 ; nop ; lb r25, r26 } + 1c70: [0-9a-f]* { bitx r5, r6 ; or r15, r16, r17 ; lb r25, r26 } + 1c78: [0-9a-f]* { bitx r5, r6 ; packbs_u r15, r16, r17 } + 1c80: [0-9a-f]* { bitx r5, r6 ; rl r15, r16, r17 ; prefetch r25 } + 1c88: [0-9a-f]* { bitx r5, r6 ; sub r15, r16, r17 ; prefetch r25 } + 1c90: [0-9a-f]* { bitx r5, r6 ; rli r15, r16, 5 ; sb r25, r26 } + 1c98: [0-9a-f]* { bitx r5, r6 ; s2a r15, r16, r17 ; sb r25, r26 } + 1ca0: [0-9a-f]* { bitx r5, r6 ; ill ; sb r25, r26 } + 1ca8: [0-9a-f]* { bitx r5, r6 ; shri r15, r16, 5 ; sb r25, r26 } + 1cb0: [0-9a-f]* { bitx r5, r6 ; seq r15, r16, r17 ; sb r25, r26 } + 1cb8: [0-9a-f]* { bitx r5, r6 ; addi r15, r16, 5 ; sh r25, r26 } + 1cc0: [0-9a-f]* { bitx r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 } + 1cc8: [0-9a-f]* { bitx r5, r6 ; shl r15, r16, r17 ; lh r25, r26 } + 1cd0: [0-9a-f]* { bitx r5, r6 ; shlib r15, r16, 5 } + 1cd8: [0-9a-f]* { bitx r5, r6 ; shri r15, r16, 5 ; sb r25, r26 } + 1ce0: [0-9a-f]* { bitx r5, r6 ; slt_u r15, r16, r17 ; lw r25, r26 } + 1ce8: [0-9a-f]* { bitx r5, r6 ; slte_u r15, r16, r17 ; lh r25, r26 } + 1cf0: [0-9a-f]* { bitx r5, r6 ; slti r15, r16, 5 ; sb r25, r26 } + 1cf8: [0-9a-f]* { bitx r5, r6 ; sne r15, r16, r17 ; lh r25, r26 } + 1d00: [0-9a-f]* { bitx r5, r6 ; srab r15, r16, r17 } + 1d08: [0-9a-f]* { bitx r5, r6 ; sub r15, r16, r17 ; sb r25, r26 } + 1d10: [0-9a-f]* { bitx r5, r6 ; mz r15, r16, r17 ; sw r25, r26 } + 1d18: [0-9a-f]* { bitx r5, r6 ; slti r15, r16, 5 ; sw r25, r26 } + 1d20: [0-9a-f]* { bitx r5, r6 ; xor r15, r16, r17 } + 1d28: [0-9a-f]* { bytex r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 } + 1d30: [0-9a-f]* { bytex r5, r6 ; and r15, r16, r17 ; sw r25, r26 } + 1d38: [0-9a-f]* { bytex r5, r6 ; lw r25, r26 } + 1d40: [0-9a-f]* { bytex r5, r6 ; info 19 ; lh_u r25, r26 } + 1d48: [0-9a-f]* { bytex r5, r6 ; addi r15, r16, 5 ; lb r25, r26 } + 1d50: [0-9a-f]* { bytex r5, r6 ; seqi r15, r16, 5 ; lb r25, r26 } + 1d58: [0-9a-f]* { bytex r5, r6 ; and r15, r16, r17 ; lb_u r25, r26 } + 1d60: [0-9a-f]* { bytex r5, r6 ; shl r15, r16, r17 ; lb_u r25, r26 } + 1d68: [0-9a-f]* { bytex r5, r6 ; addi r15, r16, 5 ; lh r25, r26 } + 1d70: [0-9a-f]* { bytex r5, r6 ; seqi r15, r16, 5 ; lh r25, r26 } + 1d78: [0-9a-f]* { bytex r5, r6 ; and r15, r16, r17 ; lh_u r25, r26 } + 1d80: [0-9a-f]* { bytex r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 } + 1d88: [0-9a-f]* { bytex r5, r6 ; add r15, r16, r17 ; lw r25, r26 } + 1d90: [0-9a-f]* { bytex r5, r6 ; seq r15, r16, r17 ; lw r25, r26 } + 1d98: [0-9a-f]* { bytex r5, r6 ; lwadd_na r15, r16, 5 } + 1da0: [0-9a-f]* { bytex r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 } + 1da8: [0-9a-f]* { bytex r5, r6 ; movei r15, 5 ; sb r25, r26 } + 1db0: [0-9a-f]* { bytex r5, r6 ; nop ; lb_u r25, r26 } + 1db8: [0-9a-f]* { bytex r5, r6 ; or r15, r16, r17 ; lb_u r25, r26 } + 1dc0: [0-9a-f]* { bytex r5, r6 ; packhb r15, r16, r17 } + 1dc8: [0-9a-f]* { bytex r5, r6 ; rli r15, r16, 5 ; prefetch r25 } + 1dd0: [0-9a-f]* { bytex r5, r6 ; xor r15, r16, r17 ; prefetch r25 } + 1dd8: [0-9a-f]* { bytex r5, r6 ; rli r15, r16, 5 ; sh r25, r26 } + 1de0: [0-9a-f]* { bytex r5, r6 ; s2a r15, r16, r17 ; sh r25, r26 } + 1de8: [0-9a-f]* { bytex r5, r6 ; info 19 ; sb r25, r26 } + 1df0: [0-9a-f]* { bytex r5, r6 ; slt r15, r16, r17 ; sb r25, r26 } + 1df8: [0-9a-f]* { bytex r5, r6 ; seq r15, r16, r17 ; sh r25, r26 } + 1e00: [0-9a-f]* { bytex r5, r6 ; and r15, r16, r17 ; sh r25, r26 } + 1e08: [0-9a-f]* { bytex r5, r6 ; shl r15, r16, r17 ; sh r25, r26 } + 1e10: [0-9a-f]* { bytex r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 } + 1e18: [0-9a-f]* { bytex r5, r6 ; shlih r15, r16, 5 } + 1e20: [0-9a-f]* { bytex r5, r6 ; shri r15, r16, 5 ; sh r25, r26 } + 1e28: [0-9a-f]* { bytex r5, r6 ; slt_u r15, r16, r17 ; prefetch r25 } + 1e30: [0-9a-f]* { bytex r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + 1e38: [0-9a-f]* { bytex r5, r6 ; slti r15, r16, 5 ; sh r25, r26 } + 1e40: [0-9a-f]* { bytex r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 } + 1e48: [0-9a-f]* { bytex r5, r6 ; srah r15, r16, r17 } + 1e50: [0-9a-f]* { bytex r5, r6 ; sub r15, r16, r17 ; sh r25, r26 } + 1e58: [0-9a-f]* { bytex r5, r6 ; nop ; sw r25, r26 } + 1e60: [0-9a-f]* { bytex r5, r6 ; slti_u r15, r16, 5 ; sw r25, r26 } + 1e68: [0-9a-f]* { bytex r5, r6 ; xori r15, r16, 5 } + 1e70: [0-9a-f]* { clz r5, r6 ; addi r15, r16, 5 ; prefetch r25 } + 1e78: [0-9a-f]* { clz r5, r6 ; andi r15, r16, 5 ; lb r25, r26 } + 1e80: [0-9a-f]* { clz r5, r6 ; sb r25, r26 } + 1e88: [0-9a-f]* { clz r5, r6 ; info 19 ; prefetch r25 } + 1e90: [0-9a-f]* { clz r5, r6 ; andi r15, r16, 5 ; lb r25, r26 } + 1e98: [0-9a-f]* { clz r5, r6 ; shli r15, r16, 5 ; lb r25, r26 } + 1ea0: [0-9a-f]* { clz r5, r6 ; lb_u r25, r26 } + 1ea8: [0-9a-f]* { clz r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 } + 1eb0: [0-9a-f]* { clz r5, r6 ; andi r15, r16, 5 ; lh r25, r26 } + 1eb8: [0-9a-f]* { clz r5, r6 ; shli r15, r16, 5 ; lh r25, r26 } + 1ec0: [0-9a-f]* { clz r5, r6 ; lh_u r25, r26 } + 1ec8: [0-9a-f]* { clz r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 } + 1ed0: [0-9a-f]* { clz r5, r6 ; and r15, r16, r17 ; lw r25, r26 } + 1ed8: [0-9a-f]* { clz r5, r6 ; shl r15, r16, r17 ; lw r25, r26 } + 1ee0: [0-9a-f]* { clz r5, r6 ; maxh r15, r16, r17 } + 1ee8: [0-9a-f]* { clz r5, r6 ; mnzb r15, r16, r17 } + 1ef0: [0-9a-f]* { clz r5, r6 ; movei r15, 5 ; sw r25, r26 } + 1ef8: [0-9a-f]* { clz r5, r6 ; nop ; lh_u r25, r26 } + 1f00: [0-9a-f]* { clz r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 } + 1f08: [0-9a-f]* { clz r5, r6 ; packlb r15, r16, r17 } + 1f10: [0-9a-f]* { clz r5, r6 ; s2a r15, r16, r17 ; prefetch r25 } + 1f18: [0-9a-f]* { clz r5, r6 ; raise } + 1f20: [0-9a-f]* { clz r5, r6 ; rli r15, r16, 5 } + 1f28: [0-9a-f]* { clz r5, r6 ; s2a r15, r16, r17 } + 1f30: [0-9a-f]* { clz r5, r6 ; move r15, r16 ; sb r25, r26 } + 1f38: [0-9a-f]* { clz r5, r6 ; slte r15, r16, r17 ; sb r25, r26 } + 1f40: [0-9a-f]* { clz r5, r6 ; seq r15, r16, r17 } + 1f48: [0-9a-f]* { clz r5, r6 ; sh r25, r26 } + 1f50: [0-9a-f]* { clz r5, r6 ; shr r15, r16, r17 ; sh r25, r26 } + 1f58: [0-9a-f]* { clz r5, r6 ; shl r15, r16, r17 ; prefetch r25 } + 1f60: [0-9a-f]* { clz r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 } + 1f68: [0-9a-f]* { clz r5, r6 ; shri r15, r16, 5 } + 1f70: [0-9a-f]* { clz r5, r6 ; slt_u r15, r16, r17 ; sh r25, r26 } + 1f78: [0-9a-f]* { clz r5, r6 ; slte_u r15, r16, r17 ; prefetch r25 } + 1f80: [0-9a-f]* { clz r5, r6 ; slti r15, r16, 5 } + 1f88: [0-9a-f]* { clz r5, r6 ; sne r15, r16, r17 ; prefetch r25 } + 1f90: [0-9a-f]* { clz r5, r6 ; srai r15, r16, 5 ; lb_u r25, r26 } + 1f98: [0-9a-f]* { clz r5, r6 ; sub r15, r16, r17 } + 1fa0: [0-9a-f]* { clz r5, r6 ; or r15, r16, r17 ; sw r25, r26 } + 1fa8: [0-9a-f]* { clz r5, r6 ; sra r15, r16, r17 ; sw r25, r26 } + 1fb0: [0-9a-f]* { crc32_32 r5, r6, r7 ; addb r15, r16, r17 } + 1fb8: [0-9a-f]* { crc32_32 r5, r6, r7 ; infol 4660 } + 1fc0: [0-9a-f]* { crc32_32 r5, r6, r7 ; lw r15, r16 } + 1fc8: [0-9a-f]* { crc32_32 r5, r6, r7 ; moveli r15, 4660 } + 1fd0: [0-9a-f]* { crc32_32 r5, r6, r7 ; s3a r15, r16, r17 } + 1fd8: [0-9a-f]* { crc32_32 r5, r6, r7 ; shri r15, r16, 5 } + 1fe0: [0-9a-f]* { crc32_32 r5, r6, r7 ; sltih_u r15, r16, 5 } + 1fe8: [0-9a-f]* { crc32_32 r5, r6, r7 ; xor r15, r16, r17 } + 1ff0: [0-9a-f]* { crc32_8 r5, r6, r7 ; icoh r15 } + 1ff8: [0-9a-f]* { crc32_8 r5, r6, r7 ; lhadd r15, r16, 5 } + 2000: [0-9a-f]* { crc32_8 r5, r6, r7 ; mnzh r15, r16, r17 } + 2008: [0-9a-f]* { crc32_8 r5, r6, r7 ; rli r15, r16, 5 } + 2010: [0-9a-f]* { crc32_8 r5, r6, r7 ; shr r15, r16, r17 } + 2018: [0-9a-f]* { crc32_8 r5, r6, r7 ; sltib r15, r16, 5 } + 2020: [0-9a-f]* { crc32_8 r5, r6, r7 ; swadd r15, r16, 5 } + 2028: [0-9a-f]* { ctz r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 } + 2030: [0-9a-f]* { ctz r5, r6 ; and r15, r16, r17 ; sb r25, r26 } + 2038: [0-9a-f]* { ctz r5, r6 ; lh r25, r26 } + 2040: [0-9a-f]* { ctz r5, r6 ; info 19 ; lb_u r25, r26 } + 2048: [0-9a-f]* { ctz r5, r6 ; lb r15, r16 } + 2050: [0-9a-f]* { ctz r5, r6 ; s3a r15, r16, r17 ; lb r25, r26 } + 2058: [0-9a-f]* { ctz r5, r6 ; add r15, r16, r17 ; lb_u r25, r26 } + 2060: [0-9a-f]* { ctz r5, r6 ; seq r15, r16, r17 ; lb_u r25, r26 } + 2068: [0-9a-f]* { ctz r5, r6 ; lh r15, r16 } + 2070: [0-9a-f]* { ctz r5, r6 ; s3a r15, r16, r17 ; lh r25, r26 } + 2078: [0-9a-f]* { ctz r5, r6 ; add r15, r16, r17 ; lh_u r25, r26 } + 2080: [0-9a-f]* { ctz r5, r6 ; seq r15, r16, r17 ; lh_u r25, r26 } + 2088: [0-9a-f]* { ctz r5, r6 ; lnk r15 } + 2090: [0-9a-f]* { ctz r5, r6 ; s2a r15, r16, r17 ; lw r25, r26 } + 2098: [0-9a-f]* { ctz r5, r6 ; lw_na r15, r16 } + 20a0: [0-9a-f]* { ctz r5, r6 ; mnz r15, r16, r17 ; sb r25, r26 } + 20a8: [0-9a-f]* { ctz r5, r6 ; movei r15, 5 ; lw r25, r26 } + 20b0: [0-9a-f]* { ctz r5, r6 ; mzh r15, r16, r17 } + 20b8: [0-9a-f]* { ctz r5, r6 ; nor r15, r16, r17 } + 20c0: [0-9a-f]* { ctz r5, r6 ; ori r15, r16, 5 } + 20c8: [0-9a-f]* { ctz r5, r6 ; ori r15, r16, 5 ; prefetch r25 } + 20d0: [0-9a-f]* { ctz r5, r6 ; srai r15, r16, 5 ; prefetch r25 } + 20d8: [0-9a-f]* { ctz r5, r6 ; rli r15, r16, 5 ; prefetch r25 } + 20e0: [0-9a-f]* { ctz r5, r6 ; s2a r15, r16, r17 ; prefetch r25 } + 20e8: [0-9a-f]* { ctz r5, r6 ; sb r25, r26 } + 20f0: [0-9a-f]* { ctz r5, r6 ; shr r15, r16, r17 ; sb r25, r26 } + 20f8: [0-9a-f]* { ctz r5, r6 ; seq r15, r16, r17 ; prefetch r25 } + 2100: [0-9a-f]* { ctz r5, r6 ; add r15, r16, r17 ; sh r25, r26 } + 2108: [0-9a-f]* { ctz r5, r6 ; seq r15, r16, r17 ; sh r25, r26 } + 2110: [0-9a-f]* { ctz r5, r6 ; shl r15, r16, r17 ; lb_u r25, r26 } + 2118: [0-9a-f]* { ctz r5, r6 ; shli r15, r16, 5 } + 2120: [0-9a-f]* { ctz r5, r6 ; shri r15, r16, 5 ; prefetch r25 } + 2128: [0-9a-f]* { ctz r5, r6 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + 2130: [0-9a-f]* { ctz r5, r6 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + 2138: [0-9a-f]* { ctz r5, r6 ; slti r15, r16, 5 ; prefetch r25 } + 2140: [0-9a-f]* { ctz r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 } + 2148: [0-9a-f]* { ctz r5, r6 ; sra r15, r16, r17 } + 2150: [0-9a-f]* { ctz r5, r6 ; sub r15, r16, r17 ; prefetch r25 } + 2158: [0-9a-f]* { ctz r5, r6 ; movei r15, 5 ; sw r25, r26 } + 2160: [0-9a-f]* { ctz r5, r6 ; slte_u r15, r16, r17 ; sw r25, r26 } + 2168: [0-9a-f]* { ctz r5, r6 ; xor r15, r16, r17 ; sw r25, r26 } + 2170: [0-9a-f]* { avgb_u r5, r6, r7 ; dtlbpr r15 } + 2178: [0-9a-f]* { minb_u r5, r6, r7 ; dtlbpr r15 } + 2180: [0-9a-f]* { mulhl_su r5, r6, r7 ; dtlbpr r15 } + 2188: [0-9a-f]* { nop ; dtlbpr r15 } + 2190: [0-9a-f]* { seq r5, r6, r7 ; dtlbpr r15 } + 2198: [0-9a-f]* { sltb r5, r6, r7 ; dtlbpr r15 } + 21a0: [0-9a-f]* { srab r5, r6, r7 ; dtlbpr r15 } + 21a8: [0-9a-f]* { dword_align r5, r6, r7 ; addh r15, r16, r17 } + 21b0: [0-9a-f]* { dword_align r5, r6, r7 ; inthh r15, r16, r17 } + 21b8: [0-9a-f]* { dword_align r5, r6, r7 ; lwadd r15, r16, 5 } + 21c0: [0-9a-f]* { dword_align r5, r6, r7 ; mtspr 5, r16 } + 21c8: [0-9a-f]* { dword_align r5, r6, r7 ; sbadd r15, r16, 5 } + 21d0: [0-9a-f]* { dword_align r5, r6, r7 ; shrih r15, r16, 5 } + 21d8: [0-9a-f]* { dword_align r5, r6, r7 ; sneb r15, r16, r17 } + 21e0: [0-9a-f]* { add r5, r6, r7 ; finv r15 } + 21e8: [0-9a-f]* { clz r5, r6 ; finv r15 } + 21f0: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; finv r15 } + 21f8: [0-9a-f]* { mulhla_su r5, r6, r7 ; finv r15 } + 2200: [0-9a-f]* { packbs_u r5, r6, r7 ; finv r15 } + 2208: [0-9a-f]* { seqib r5, r6, 5 ; finv r15 } + 2210: [0-9a-f]* { slteb r5, r6, r7 ; finv r15 } + 2218: [0-9a-f]* { sraih r5, r6, 5 ; finv r15 } + 2220: [0-9a-f]* { addih r5, r6, 5 ; flush r15 } + 2228: [0-9a-f]* { infol 4660 ; flush r15 } + 2230: [0-9a-f]* { moveli.sn r5, 4660 ; flush r15 } + 2238: [0-9a-f]* { mullla_ss r5, r6, r7 ; flush r15 } + 2240: [0-9a-f]* { s1a r5, r6, r7 ; flush r15 } + 2248: [0-9a-f]* { shlih r5, r6, 5 ; flush r15 } + 2250: [0-9a-f]* { slti_u r5, r6, 5 ; flush r15 } + 2258: [0-9a-f]* { tblidxb0 r5, r6 ; flush r15 } + 2260: [0-9a-f]* { add r5, r6, r7 ; lw r25, r26 } + 2268: [0-9a-f]* { addi r15, r16, 5 ; sb r25, r26 } + 2270: [0-9a-f]* { addli.sn r15, r16, 4660 } + 2278: [0-9a-f]* { and r5, r6, r7 ; lw r25, r26 } + 2280: [0-9a-f]* { andi r5, r6, 5 ; lw r25, r26 } + 2288: [0-9a-f]* { bytex r5, r6 ; lb r25, r26 } + 2290: [0-9a-f]* { crc32_32 r5, r6, r7 } + 2298: [0-9a-f]* { lw r25, r26 } + 22a0: [0-9a-f]* { info 19 ; lh_u r25, r26 } + 22a8: [0-9a-f]* { jr r15 } + 22b0: [0-9a-f]* { move r15, r16 ; lb r25, r26 } + 22b8: [0-9a-f]* { or r15, r16, r17 ; lb r25, r26 } + 22c0: [0-9a-f]* { shl r5, r6, r7 ; lb r25, r26 } + 22c8: [0-9a-f]* { sne r5, r6, r7 ; lb r25, r26 } + 22d0: [0-9a-f]* { and r5, r6, r7 ; lb_u r25, r26 } + 22d8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; lb_u r25, r26 } + 22e0: [0-9a-f]* { rli r5, r6, 5 ; lb_u r25, r26 } + 22e8: [0-9a-f]* { slt r5, r6, r7 ; lb_u r25, r26 } + 22f0: [0-9a-f]* { tblidxb1 r5, r6 ; lb_u r25, r26 } + 22f8: [0-9a-f]* { ctz r5, r6 ; lh r25, r26 } + 2300: [0-9a-f]* { mvz r5, r6, r7 ; lh r25, r26 } + 2308: [0-9a-f]* { s3a r5, r6, r7 ; lh r25, r26 } + 2310: [0-9a-f]* { slte_u r5, r6, r7 ; lh r25, r26 } + 2318: [0-9a-f]* { lh_u r15, r16 } + 2320: [0-9a-f]* { movei r15, 5 ; lh_u r25, r26 } + 2328: [0-9a-f]* { ori r15, r16, 5 ; lh_u r25, r26 } + 2330: [0-9a-f]* { shli r5, r6, 5 ; lh_u r25, r26 } + 2338: [0-9a-f]* { sra r5, r6, r7 ; lh_u r25, r26 } + 2340: [0-9a-f]* { and r15, r16, r17 ; lw r25, r26 } + 2348: [0-9a-f]* { mulhha_uu r5, r6, r7 ; lw r25, r26 } + 2350: [0-9a-f]* { rli r15, r16, 5 ; lw r25, r26 } + 2358: [0-9a-f]* { slt r15, r16, r17 ; lw r25, r26 } + 2360: [0-9a-f]* { tblidxb0 r5, r6 ; lw r25, r26 } + 2368: [0-9a-f]* { minb_u r15, r16, r17 } + 2370: [0-9a-f]* { mnz r5, r6, r7 ; lb r25, r26 } + 2378: [0-9a-f]* { move r15, r16 ; sb r25, r26 } + 2380: [0-9a-f]* { movei r15, 5 ; sb r25, r26 } + 2388: [0-9a-f]* { mulhh_ss r5, r6, r7 ; lb_u r25, r26 } + 2390: [0-9a-f]* { mulhha_ss r5, r6, r7 ; lb r25, r26 } + 2398: [0-9a-f]* { mulhha_uu r5, r6, r7 } + 23a0: [0-9a-f]* { mulll_ss r5, r6, r7 ; lb r25, r26 } + 23a8: [0-9a-f]* { mulll_uu r5, r6, r7 } + 23b0: [0-9a-f]* { mullla_uu r5, r6, r7 ; sw r25, r26 } + 23b8: [0-9a-f]* { mvz r5, r6, r7 ; sh r25, r26 } + 23c0: [0-9a-f]* { mz r5, r6, r7 ; sh r25, r26 } + 23c8: [0-9a-f]* { nor r15, r16, r17 ; lh_u r25, r26 } + 23d0: [0-9a-f]* { or r15, r16, r17 ; lh_u r25, r26 } + 23d8: [0-9a-f]* { ori r15, r16, 5 ; lh_u r25, r26 } + 23e0: [0-9a-f]* { packhb r5, r6, r7 } + 23e8: [0-9a-f]* { and r15, r16, r17 ; prefetch r25 } + 23f0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; prefetch r25 } + 23f8: [0-9a-f]* { rli r15, r16, 5 ; prefetch r25 } + 2400: [0-9a-f]* { slt r15, r16, r17 ; prefetch r25 } + 2408: [0-9a-f]* { tblidxb0 r5, r6 ; prefetch r25 } + 2410: [0-9a-f]* { rl r5, r6, r7 ; lh r25, r26 } + 2418: [0-9a-f]* { rli r5, r6, 5 ; lh r25, r26 } + 2420: [0-9a-f]* { s1a r5, r6, r7 ; lh r25, r26 } + 2428: [0-9a-f]* { s2a r5, r6, r7 ; lh r25, r26 } + 2430: [0-9a-f]* { s3a r5, r6, r7 ; lh r25, r26 } + 2438: [0-9a-f]* { and r5, r6, r7 ; sb r25, r26 } + 2440: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sb r25, r26 } + 2448: [0-9a-f]* { rli r5, r6, 5 ; sb r25, r26 } + 2450: [0-9a-f]* { slt r5, r6, r7 ; sb r25, r26 } + 2458: [0-9a-f]* { tblidxb1 r5, r6 ; sb r25, r26 } + 2460: [0-9a-f]* { seq r5, r6, r7 ; lh_u r25, r26 } + 2468: [0-9a-f]* { seqi r15, r16, 5 } + 2470: [0-9a-f]* { and r15, r16, r17 ; sh r25, r26 } + 2478: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sh r25, r26 } + 2480: [0-9a-f]* { rli r15, r16, 5 ; sh r25, r26 } + 2488: [0-9a-f]* { slt r15, r16, r17 ; sh r25, r26 } + 2490: [0-9a-f]* { tblidxb0 r5, r6 ; sh r25, r26 } + 2498: [0-9a-f]* { shl r5, r6, r7 ; lh r25, r26 } + 24a0: [0-9a-f]* { shli r15, r16, 5 ; sw r25, r26 } + 24a8: [0-9a-f]* { shr r15, r16, r17 ; lw r25, r26 } + 24b0: [0-9a-f]* { shri r15, r16, 5 ; lb r25, r26 } + 24b8: [0-9a-f]* { shrib r15, r16, 5 } + 24c0: [0-9a-f]* { slt r5, r6, r7 ; sb r25, r26 } + 24c8: [0-9a-f]* { slt_u r5, r6, r7 ; sb r25, r26 } + 24d0: [0-9a-f]* { slte r5, r6, r7 ; lh r25, r26 } + 24d8: [0-9a-f]* { slte_u r5, r6, r7 ; lh r25, r26 } + 24e0: [0-9a-f]* { slti r15, r16, 5 ; lb r25, r26 } + 24e8: [0-9a-f]* { slti_u r15, r16, 5 ; lb r25, r26 } + 24f0: [0-9a-f]* { sltib r15, r16, 5 } + 24f8: [0-9a-f]* { sne r5, r6, r7 ; lh r25, r26 } + 2500: [0-9a-f]* { sra r15, r16, r17 ; sw r25, r26 } + 2508: [0-9a-f]* { srai r15, r16, 5 ; lw r25, r26 } + 2510: [0-9a-f]* { sub r15, r16, r17 ; lb r25, r26 } + 2518: [0-9a-f]* { subb r15, r16, r17 } + 2520: [0-9a-f]* { bytex r5, r6 ; sw r25, r26 } + 2528: [0-9a-f]* { mullla_uu r5, r6, r7 ; sw r25, r26 } + 2530: [0-9a-f]* { s2a r5, r6, r7 ; sw r25, r26 } + 2538: [0-9a-f]* { slte r5, r6, r7 ; sw r25, r26 } + 2540: [0-9a-f]* { xor r5, r6, r7 ; sw r25, r26 } + 2548: [0-9a-f]* { tblidxb1 r5, r6 ; sh r25, r26 } + 2550: [0-9a-f]* { tblidxb3 r5, r6 ; sh r25, r26 } + 2558: [0-9a-f]* { xor r5, r6, r7 ; prefetch r25 } + 2560: [0-9a-f]* { and r5, r6, r7 ; icoh r15 } + 2568: [0-9a-f]* { maxh r5, r6, r7 ; icoh r15 } + 2570: [0-9a-f]* { mulhha_uu r5, r6, r7 ; icoh r15 } + 2578: [0-9a-f]* { mz r5, r6, r7 ; icoh r15 } + 2580: [0-9a-f]* { sadb_u r5, r6, r7 ; icoh r15 } + 2588: [0-9a-f]* { shrih r5, r6, 5 ; icoh r15 } + 2590: [0-9a-f]* { sneb r5, r6, r7 ; icoh r15 } + 2598: [0-9a-f]* { add r5, r6, r7 ; ill ; lb r25, r26 } + 25a0: [0-9a-f]* { addi r5, r6, 5 ; ill ; sb r25, r26 } + 25a8: [0-9a-f]* { and r5, r6, r7 ; ill } + 25b0: [0-9a-f]* { bitx r5, r6 ; ill ; sb r25, r26 } + 25b8: [0-9a-f]* { clz r5, r6 ; ill ; sb r25, r26 } + 25c0: [0-9a-f]* { ill ; lh_u r25, r26 } + 25c8: [0-9a-f]* { intlb r5, r6, r7 ; ill } + 25d0: [0-9a-f]* { mulll_ss r5, r6, r7 ; ill ; lb r25, r26 } + 25d8: [0-9a-f]* { shli r5, r6, 5 ; ill ; lb r25, r26 } + 25e0: [0-9a-f]* { addi r5, r6, 5 ; ill ; lb_u r25, r26 } + 25e8: [0-9a-f]* { mullla_uu r5, r6, r7 ; ill ; lb_u r25, r26 } + 25f0: [0-9a-f]* { slt r5, r6, r7 ; ill ; lb_u r25, r26 } + 25f8: [0-9a-f]* { bitx r5, r6 ; ill ; lh r25, r26 } + 2600: [0-9a-f]* { mz r5, r6, r7 ; ill ; lh r25, r26 } + 2608: [0-9a-f]* { slte_u r5, r6, r7 ; ill ; lh r25, r26 } + 2610: [0-9a-f]* { ctz r5, r6 ; ill ; lh_u r25, r26 } + 2618: [0-9a-f]* { or r5, r6, r7 ; ill ; lh_u r25, r26 } + 2620: [0-9a-f]* { sne r5, r6, r7 ; ill ; lh_u r25, r26 } + 2628: [0-9a-f]* { mnz r5, r6, r7 ; ill ; lw r25, r26 } + 2630: [0-9a-f]* { rl r5, r6, r7 ; ill ; lw r25, r26 } + 2638: [0-9a-f]* { sub r5, r6, r7 ; ill ; lw r25, r26 } + 2640: [0-9a-f]* { mnz r5, r6, r7 ; ill ; lw r25, r26 } + 2648: [0-9a-f]* { movei r5, 5 ; ill ; lh r25, r26 } + 2650: [0-9a-f]* { mulhh_su r5, r6, r7 ; ill } + 2658: [0-9a-f]* { mulhha_ss r5, r6, r7 ; ill } + 2660: [0-9a-f]* { mulhla_uu r5, r6, r7 ; ill } + 2668: [0-9a-f]* { mulll_ss r5, r6, r7 ; ill } + 2670: [0-9a-f]* { mullla_ss r5, r6, r7 ; ill ; sw r25, r26 } + 2678: [0-9a-f]* { mvnz r5, r6, r7 ; ill ; sb r25, r26 } + 2680: [0-9a-f]* { mz r5, r6, r7 ; ill ; sb r25, r26 } + 2688: [0-9a-f]* { nor r5, r6, r7 ; ill ; lw r25, r26 } + 2690: [0-9a-f]* { ori r5, r6, 5 ; ill ; lw r25, r26 } + 2698: [0-9a-f]* { add r5, r6, r7 ; ill ; prefetch r25 } + 26a0: [0-9a-f]* { mullla_ss r5, r6, r7 ; ill ; prefetch r25 } + 26a8: [0-9a-f]* { shri r5, r6, 5 ; ill ; prefetch r25 } + 26b0: [0-9a-f]* { rl r5, r6, r7 ; ill ; lh_u r25, r26 } + 26b8: [0-9a-f]* { s1a r5, r6, r7 ; ill ; lh_u r25, r26 } + 26c0: [0-9a-f]* { s3a r5, r6, r7 ; ill ; lh_u r25, r26 } + 26c8: [0-9a-f]* { ctz r5, r6 ; ill ; sb r25, r26 } + 26d0: [0-9a-f]* { or r5, r6, r7 ; ill ; sb r25, r26 } + 26d8: [0-9a-f]* { sne r5, r6, r7 ; ill ; sb r25, r26 } + 26e0: [0-9a-f]* { seqb r5, r6, r7 ; ill } + 26e8: [0-9a-f]* { clz r5, r6 ; ill ; sh r25, r26 } + 26f0: [0-9a-f]* { nor r5, r6, r7 ; ill ; sh r25, r26 } + 26f8: [0-9a-f]* { slti_u r5, r6, 5 ; ill ; sh r25, r26 } + 2700: [0-9a-f]* { shl r5, r6, r7 ; ill } + 2708: [0-9a-f]* { shr r5, r6, r7 ; ill ; prefetch r25 } + 2710: [0-9a-f]* { slt r5, r6, r7 ; ill ; lb_u r25, r26 } + 2718: [0-9a-f]* { sltb_u r5, r6, r7 ; ill } + 2720: [0-9a-f]* { slte_u r5, r6, r7 ; ill } + 2728: [0-9a-f]* { slti_u r5, r6, 5 ; ill ; lh_u r25, r26 } + 2730: [0-9a-f]* { sne r5, r6, r7 ; ill } + 2738: [0-9a-f]* { srai r5, r6, 5 ; ill ; prefetch r25 } + 2740: [0-9a-f]* { subhs r5, r6, r7 ; ill } + 2748: [0-9a-f]* { mulll_ss r5, r6, r7 ; ill ; sw r25, r26 } + 2750: [0-9a-f]* { shli r5, r6, 5 ; ill ; sw r25, r26 } + 2758: [0-9a-f]* { tblidxb0 r5, r6 ; ill ; lb_u r25, r26 } + 2760: [0-9a-f]* { tblidxb2 r5, r6 ; ill ; lb_u r25, r26 } + 2768: [0-9a-f]* { xor r5, r6, r7 ; ill ; lb_u r25, r26 } + 2770: [0-9a-f]* { info 19 ; add r5, r6, r7 ; lb r25, r26 } + 2778: [0-9a-f]* { info 19 ; addi r15, r16, 5 ; lh r25, r26 } + 2780: [0-9a-f]* { info 19 ; addih r15, r16, 5 } + 2788: [0-9a-f]* { info 19 ; and r5, r6, r7 ; lb r25, r26 } + 2790: [0-9a-f]* { info 19 ; andi r5, r6, 5 ; lb r25, r26 } + 2798: [0-9a-f]* { bitx r5, r6 ; info 19 ; sb r25, r26 } + 27a0: [0-9a-f]* { clz r5, r6 ; info 19 ; sb r25, r26 } + 27a8: [0-9a-f]* { info 19 ; lb r25, r26 } + 27b0: [0-9a-f]* { info 19 ; ill } + 27b8: [0-9a-f]* { info 19 ; inv r15 } + 27c0: [0-9a-f]* { info 19 ; ill ; lb r25, r26 } + 27c8: [0-9a-f]* { info 19 ; mz r5, r6, r7 ; lb r25, r26 } + 27d0: [0-9a-f]* { info 19 ; seq r5, r6, r7 ; lb r25, r26 } + 27d8: [0-9a-f]* { info 19 ; slti r5, r6, 5 ; lb r25, r26 } + 27e0: [0-9a-f]* { info 19 ; add r5, r6, r7 ; lb_u r25, r26 } + 27e8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; info 19 ; lb_u r25, r26 } + 27f0: [0-9a-f]* { pcnt r5, r6 ; info 19 ; lb_u r25, r26 } + 27f8: [0-9a-f]* { info 19 ; shr r5, r6, r7 ; lb_u r25, r26 } + 2800: [0-9a-f]* { info 19 ; srai r5, r6, 5 ; lb_u r25, r26 } + 2808: [0-9a-f]* { info 19 ; andi r5, r6, 5 ; lh r25, r26 } + 2810: [0-9a-f]* { mulll_uu r5, r6, r7 ; info 19 ; lh r25, r26 } + 2818: [0-9a-f]* { info 19 ; s1a r5, r6, r7 ; lh r25, r26 } + 2820: [0-9a-f]* { info 19 ; slt_u r5, r6, r7 ; lh r25, r26 } + 2828: [0-9a-f]* { tblidxb3 r5, r6 ; info 19 ; lh r25, r26 } + 2830: [0-9a-f]* { info 19 ; mnz r15, r16, r17 ; lh_u r25, r26 } + 2838: [0-9a-f]* { info 19 ; nor r15, r16, r17 ; lh_u r25, r26 } + 2840: [0-9a-f]* { info 19 ; seqi r5, r6, 5 ; lh_u r25, r26 } + 2848: [0-9a-f]* { info 19 ; slti_u r5, r6, 5 ; lh_u r25, r26 } + 2850: [0-9a-f]* { info 19 ; add r15, r16, r17 ; lw r25, r26 } + 2858: [0-9a-f]* { info 19 ; movei r5, 5 ; lw r25, r26 } + 2860: [0-9a-f]* { info 19 ; ori r5, r6, 5 ; lw r25, r26 } + 2868: [0-9a-f]* { info 19 ; shr r15, r16, r17 ; lw r25, r26 } + 2870: [0-9a-f]* { info 19 ; srai r15, r16, 5 ; lw r25, r26 } + 2878: [0-9a-f]* { info 19 ; maxih r15, r16, 5 } + 2880: [0-9a-f]* { info 19 ; mnz r15, r16, r17 ; sb r25, r26 } + 2888: [0-9a-f]* { info 19 ; move r15, r16 ; lh r25, r26 } + 2890: [0-9a-f]* { info 19 ; movei r15, 5 ; lh r25, r26 } + 2898: [0-9a-f]* { info 19 ; moveli.sn r15, 4660 } + 28a0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; info 19 ; sb r25, r26 } + 28a8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; info 19 ; prefetch r25 } + 28b0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; info 19 ; sb r25, r26 } + 28b8: [0-9a-f]* { mulll_uu r5, r6, r7 ; info 19 ; prefetch r25 } + 28c0: [0-9a-f]* { mullla_uu r5, r6, r7 ; info 19 ; lw r25, r26 } + 28c8: [0-9a-f]* { mvz r5, r6, r7 ; info 19 ; lh_u r25, r26 } + 28d0: [0-9a-f]* { info 19 ; mz r5, r6, r7 ; lh_u r25, r26 } + 28d8: [0-9a-f]* { info 19 ; nop } + 28e0: [0-9a-f]* { info 19 ; nor r5, r6, r7 } + 28e8: [0-9a-f]* { info 19 ; or r5, r6, r7 } + 28f0: [0-9a-f]* { info 19 ; ori r5, r6, 5 } + 28f8: [0-9a-f]* { info 19 ; add r15, r16, r17 ; prefetch r25 } + 2900: [0-9a-f]* { info 19 ; movei r5, 5 ; prefetch r25 } + 2908: [0-9a-f]* { info 19 ; ori r5, r6, 5 ; prefetch r25 } + 2910: [0-9a-f]* { info 19 ; shr r15, r16, r17 ; prefetch r25 } + 2918: [0-9a-f]* { info 19 ; srai r15, r16, 5 ; prefetch r25 } + 2920: [0-9a-f]* { info 19 ; rl r15, r16, r17 ; sw r25, r26 } + 2928: [0-9a-f]* { info 19 ; rli r15, r16, 5 ; sw r25, r26 } + 2930: [0-9a-f]* { info 19 ; s1a r15, r16, r17 ; sw r25, r26 } + 2938: [0-9a-f]* { info 19 ; s2a r15, r16, r17 ; sw r25, r26 } + 2940: [0-9a-f]* { info 19 ; s3a r15, r16, r17 ; sw r25, r26 } + 2948: [0-9a-f]* { info 19 ; add r5, r6, r7 ; sb r25, r26 } + 2950: [0-9a-f]* { mulhh_ss r5, r6, r7 ; info 19 ; sb r25, r26 } + 2958: [0-9a-f]* { pcnt r5, r6 ; info 19 ; sb r25, r26 } + 2960: [0-9a-f]* { info 19 ; shr r5, r6, r7 ; sb r25, r26 } + 2968: [0-9a-f]* { info 19 ; srai r5, r6, 5 ; sb r25, r26 } + 2970: [0-9a-f]* { info 19 ; seq r15, r16, r17 } + 2978: [0-9a-f]* { info 19 ; seqi r15, r16, 5 ; prefetch r25 } + 2980: [0-9a-f]* { info 19 ; add r15, r16, r17 ; sh r25, r26 } + 2988: [0-9a-f]* { info 19 ; movei r5, 5 ; sh r25, r26 } + 2990: [0-9a-f]* { info 19 ; ori r5, r6, 5 ; sh r25, r26 } + 2998: [0-9a-f]* { info 19 ; shr r15, r16, r17 ; sh r25, r26 } + 29a0: [0-9a-f]* { info 19 ; srai r15, r16, 5 ; sh r25, r26 } + 29a8: [0-9a-f]* { info 19 ; shl r15, r16, r17 ; sw r25, r26 } + 29b0: [0-9a-f]* { info 19 ; shli r15, r16, 5 ; lw r25, r26 } + 29b8: [0-9a-f]* { info 19 ; shr r15, r16, r17 ; lb r25, r26 } + 29c0: [0-9a-f]* { info 19 ; shrb r15, r16, r17 } + 29c8: [0-9a-f]* { info 19 ; shri r5, r6, 5 ; sb r25, r26 } + 29d0: [0-9a-f]* { info 19 ; slt r5, r6, r7 ; lh r25, r26 } + 29d8: [0-9a-f]* { info 19 ; slt_u r5, r6, r7 ; lh r25, r26 } + 29e0: [0-9a-f]* { info 19 ; slte r15, r16, r17 ; sw r25, r26 } + 29e8: [0-9a-f]* { info 19 ; slte_u r15, r16, r17 ; sw r25, r26 } + 29f0: [0-9a-f]* { info 19 ; slth r15, r16, r17 } + 29f8: [0-9a-f]* { info 19 ; slti r5, r6, 5 ; sb r25, r26 } + 2a00: [0-9a-f]* { info 19 ; slti_u r5, r6, 5 ; sb r25, r26 } + 2a08: [0-9a-f]* { info 19 ; sne r15, r16, r17 ; sw r25, r26 } + 2a10: [0-9a-f]* { info 19 ; sra r15, r16, r17 ; lw r25, r26 } + 2a18: [0-9a-f]* { info 19 ; srai r15, r16, 5 ; lb r25, r26 } + 2a20: [0-9a-f]* { info 19 ; sraib r15, r16, 5 } + 2a28: [0-9a-f]* { info 19 ; sub r5, r6, r7 ; sb r25, r26 } + 2a30: [0-9a-f]* { info 19 ; and r5, r6, r7 ; sw r25, r26 } + 2a38: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; info 19 ; sw r25, r26 } + 2a40: [0-9a-f]* { info 19 ; rli r5, r6, 5 ; sw r25, r26 } + 2a48: [0-9a-f]* { info 19 ; slt r5, r6, r7 ; sw r25, r26 } + 2a50: [0-9a-f]* { tblidxb1 r5, r6 ; info 19 ; sw r25, r26 } + 2a58: [0-9a-f]* { tblidxb1 r5, r6 ; info 19 ; lh_u r25, r26 } + 2a60: [0-9a-f]* { tblidxb3 r5, r6 ; info 19 ; lh_u r25, r26 } + 2a68: [0-9a-f]* { info 19 ; xor r5, r6, r7 ; lb_u r25, r26 } + 2a70: [0-9a-f]* { infol 4660 ; addhs r5, r6, r7 } + 2a78: [0-9a-f]* { infol 4660 ; auli r5, r6, 4660 } + 2a80: [0-9a-f]* { infol 4660 ; inthh r15, r16, r17 } + 2a88: [0-9a-f]* { infol 4660 ; lnk r15 } + 2a90: [0-9a-f]* { infol 4660 ; minib_u r5, r6, 5 } + 2a98: [0-9a-f]* { mulhh_ss r5, r6, r7 ; infol 4660 } + 2aa0: [0-9a-f]* { mullla_su r5, r6, r7 ; infol 4660 } + 2aa8: [0-9a-f]* { infol 4660 ; packhb r15, r16, r17 } + 2ab0: [0-9a-f]* { sadah r5, r6, r7 ; infol 4660 } + 2ab8: [0-9a-f]* { infol 4660 ; shadd r15, r16, 5 } + 2ac0: [0-9a-f]* { infol 4660 ; shri r5, r6, 5 } + 2ac8: [0-9a-f]* { infol 4660 ; slteb_u r5, r6, r7 } + 2ad0: [0-9a-f]* { infol 4660 ; sltih_u r5, r6, 5 } + 2ad8: [0-9a-f]* { infol 4660 ; sub r5, r6, r7 } + 2ae0: [0-9a-f]* { infol 4660 ; xor r5, r6, r7 } + 2ae8: [0-9a-f]* { avgh r5, r6, r7 ; inthb r15, r16, r17 } + 2af0: [0-9a-f]* { inthb r15, r16, r17 ; minh r5, r6, r7 } + 2af8: [0-9a-f]* { mulhl_us r5, r6, r7 ; inthb r15, r16, r17 } + 2b00: [0-9a-f]* { inthb r15, r16, r17 ; nor r5, r6, r7 } + 2b08: [0-9a-f]* { inthb r15, r16, r17 ; seqb r5, r6, r7 } + 2b10: [0-9a-f]* { inthb r15, r16, r17 ; sltb_u r5, r6, r7 } + 2b18: [0-9a-f]* { inthb r15, r16, r17 ; srah r5, r6, r7 } + 2b20: [0-9a-f]* { inthb r5, r6, r7 ; addhs r15, r16, r17 } + 2b28: [0-9a-f]* { inthb r5, r6, r7 ; intlb r15, r16, r17 } + 2b30: [0-9a-f]* { inthb r5, r6, r7 ; lwadd_na r15, r16, 5 } + 2b38: [0-9a-f]* { inthb r5, r6, r7 ; mz r15, r16, r17 } + 2b40: [0-9a-f]* { inthb r5, r6, r7 ; seq r15, r16, r17 } + 2b48: [0-9a-f]* { inthb r5, r6, r7 ; slt r15, r16, r17 } + 2b50: [0-9a-f]* { inthb r5, r6, r7 ; sneh r15, r16, r17 } + 2b58: [0-9a-f]* { inthh r15, r16, r17 ; addb r5, r6, r7 } + 2b60: [0-9a-f]* { crc32_32 r5, r6, r7 ; inthh r15, r16, r17 } + 2b68: [0-9a-f]* { inthh r15, r16, r17 ; mnz r5, r6, r7 } + 2b70: [0-9a-f]* { mulhla_us r5, r6, r7 ; inthh r15, r16, r17 } + 2b78: [0-9a-f]* { inthh r15, r16, r17 ; packhb r5, r6, r7 } + 2b80: [0-9a-f]* { inthh r15, r16, r17 ; seqih r5, r6, 5 } + 2b88: [0-9a-f]* { inthh r15, r16, r17 ; slteb_u r5, r6, r7 } + 2b90: [0-9a-f]* { inthh r15, r16, r17 ; sub r5, r6, r7 } + 2b98: [0-9a-f]* { inthh r5, r6, r7 ; addli r15, r16, 4660 } + 2ba0: [0-9a-f]* { inthh r5, r6, r7 ; jalr r15 } + 2ba8: [0-9a-f]* { inthh r5, r6, r7 ; maxih r15, r16, 5 } + 2bb0: [0-9a-f]* { inthh r5, r6, r7 ; nor r15, r16, r17 } + 2bb8: [0-9a-f]* { inthh r5, r6, r7 ; seqib r15, r16, 5 } + 2bc0: [0-9a-f]* { inthh r5, r6, r7 ; slte r15, r16, r17 } + 2bc8: [0-9a-f]* { inthh r5, r6, r7 ; srai r15, r16, 5 } + 2bd0: [0-9a-f]* { intlb r15, r16, r17 ; addi r5, r6, 5 } + 2bd8: [0-9a-f]* { intlb r15, r16, r17 } + 2be0: [0-9a-f]* { intlb r15, r16, r17 ; movei r5, 5 } + 2be8: [0-9a-f]* { mulll_su r5, r6, r7 ; intlb r15, r16, r17 } + 2bf0: [0-9a-f]* { intlb r15, r16, r17 ; rl r5, r6, r7 } + 2bf8: [0-9a-f]* { intlb r15, r16, r17 ; shli r5, r6, 5 } + 2c00: [0-9a-f]* { intlb r15, r16, r17 ; slth_u r5, r6, r7 } + 2c08: [0-9a-f]* { intlb r15, r16, r17 ; subhs r5, r6, r7 } + 2c10: [0-9a-f]* { intlb r5, r6, r7 ; andi r15, r16, 5 } + 2c18: [0-9a-f]* { intlb r5, r6, r7 ; lb r15, r16 } + 2c20: [0-9a-f]* { intlb r5, r6, r7 ; minh r15, r16, r17 } + 2c28: [0-9a-f]* { intlb r5, r6, r7 ; packhb r15, r16, r17 } + 2c30: [0-9a-f]* { intlb r5, r6, r7 ; shl r15, r16, r17 } + 2c38: [0-9a-f]* { intlb r5, r6, r7 ; slteh r15, r16, r17 } + 2c40: [0-9a-f]* { intlb r5, r6, r7 ; subb r15, r16, r17 } + 2c48: [0-9a-f]* { intlh r15, r16, r17 ; addli.sn r5, r6, 4660 } + 2c50: [0-9a-f]* { intlh r15, r16, r17 ; inthh r5, r6, r7 } + 2c58: [0-9a-f]* { mulhh_su r5, r6, r7 ; intlh r15, r16, r17 } + 2c60: [0-9a-f]* { mullla_uu r5, r6, r7 ; intlh r15, r16, r17 } + 2c68: [0-9a-f]* { intlh r15, r16, r17 ; s3a r5, r6, r7 } + 2c70: [0-9a-f]* { intlh r15, r16, r17 ; shrb r5, r6, r7 } + 2c78: [0-9a-f]* { intlh r15, r16, r17 ; sltib_u r5, r6, 5 } + 2c80: [0-9a-f]* { tblidxb2 r5, r6 ; intlh r15, r16, r17 } + 2c88: [0-9a-f]* { intlh r5, r6, r7 ; flush r15 } + 2c90: [0-9a-f]* { intlh r5, r6, r7 ; lh r15, r16 } + 2c98: [0-9a-f]* { intlh r5, r6, r7 ; mnz r15, r16, r17 } + 2ca0: [0-9a-f]* { intlh r5, r6, r7 ; raise } + 2ca8: [0-9a-f]* { intlh r5, r6, r7 ; shlib r15, r16, 5 } + 2cb0: [0-9a-f]* { intlh r5, r6, r7 ; slti r15, r16, 5 } + 2cb8: [0-9a-f]* { intlh r5, r6, r7 ; subs r15, r16, r17 } + 2cc0: [0-9a-f]* { and r5, r6, r7 ; inv r15 } + 2cc8: [0-9a-f]* { maxh r5, r6, r7 ; inv r15 } + 2cd0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; inv r15 } + 2cd8: [0-9a-f]* { mz r5, r6, r7 ; inv r15 } + 2ce0: [0-9a-f]* { sadb_u r5, r6, r7 ; inv r15 } + 2ce8: [0-9a-f]* { shrih r5, r6, 5 ; inv r15 } + 2cf0: [0-9a-f]* { sneb r5, r6, r7 ; inv r15 } + 2cf8: [0-9a-f]* { add r5, r6, r7 ; iret } + 2d00: [0-9a-f]* { clz r5, r6 ; iret } + 2d08: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; iret } + 2d10: [0-9a-f]* { mulhla_su r5, r6, r7 ; iret } + 2d18: [0-9a-f]* { packbs_u r5, r6, r7 ; iret } + 2d20: [0-9a-f]* { seqib r5, r6, 5 ; iret } + 2d28: [0-9a-f]* { slteb r5, r6, r7 ; iret } + 2d30: [0-9a-f]* { sraih r5, r6, 5 ; iret } + 2d38: [0-9a-f]* { addih r5, r6, 5 ; jalr r15 } + 2d40: [0-9a-f]* { infol 4660 ; jalr r15 } + 2d48: [0-9a-f]* { moveli.sn r5, 4660 ; jalr r15 } + 2d50: [0-9a-f]* { mullla_ss r5, r6, r7 ; jalr r15 } + 2d58: [0-9a-f]* { s1a r5, r6, r7 ; jalr r15 } + 2d60: [0-9a-f]* { shlih r5, r6, 5 ; jalr r15 } + 2d68: [0-9a-f]* { slti_u r5, r6, 5 ; jalr r15 } + 2d70: [0-9a-f]* { tblidxb0 r5, r6 ; jalr r15 } + 2d78: [0-9a-f]* { andi r5, r6, 5 ; jalrp r15 } + 2d80: [0-9a-f]* { maxib_u r5, r6, 5 ; jalrp r15 } + 2d88: [0-9a-f]* { mulhhsa_uu r5, r6, r7 ; jalrp r15 } + 2d90: [0-9a-f]* { mzb r5, r6, r7 ; jalrp r15 } + 2d98: [0-9a-f]* { sadh r5, r6, r7 ; jalrp r15 } + 2da0: [0-9a-f]* { slt r5, r6, r7 ; jalrp r15 } + 2da8: [0-9a-f]* { sneh r5, r6, r7 ; jalrp r15 } + 2db0: [0-9a-f]* { addb r5, r6, r7 ; jr r15 } + 2db8: [0-9a-f]* { crc32_32 r5, r6, r7 ; jr r15 } + 2dc0: [0-9a-f]* { mnz r5, r6, r7 ; jr r15 } + 2dc8: [0-9a-f]* { mulhla_us r5, r6, r7 ; jr r15 } + 2dd0: [0-9a-f]* { packhb r5, r6, r7 ; jr r15 } + 2dd8: [0-9a-f]* { seqih r5, r6, 5 ; jr r15 } + 2de0: [0-9a-f]* { slteb_u r5, r6, r7 ; jr r15 } + 2de8: [0-9a-f]* { sub r5, r6, r7 ; jr r15 } + 2df0: [0-9a-f]* { addli r5, r6, 4660 ; jrp r15 } + 2df8: [0-9a-f]* { inthb r5, r6, r7 ; jrp r15 } + 2e00: [0-9a-f]* { mulhh_ss r5, r6, r7 ; jrp r15 } + 2e08: [0-9a-f]* { mullla_su r5, r6, r7 ; jrp r15 } + 2e10: [0-9a-f]* { s2a r5, r6, r7 ; jrp r15 } + 2e18: [0-9a-f]* { shr r5, r6, r7 ; jrp r15 } + 2e20: [0-9a-f]* { sltib r5, r6, 5 ; jrp r15 } + 2e28: [0-9a-f]* { tblidxb1 r5, r6 ; jrp r15 } + 2e30: [0-9a-f]* { auli r5, r6, 4660 ; lb r15, r16 } + 2e38: [0-9a-f]* { maxih r5, r6, 5 ; lb r15, r16 } + 2e40: [0-9a-f]* { mulhl_ss r5, r6, r7 ; lb r15, r16 } + 2e48: [0-9a-f]* { mzh r5, r6, r7 ; lb r15, r16 } + 2e50: [0-9a-f]* { sadh_u r5, r6, r7 ; lb r15, r16 } + 2e58: [0-9a-f]* { slt_u r5, r6, r7 ; lb r15, r16 } + 2e60: [0-9a-f]* { sra r5, r6, r7 ; lb r15, r16 } + 2e68: [0-9a-f]* { add r15, r16, r17 ; and r5, r6, r7 ; lb r25, r26 } + 2e70: [0-9a-f]* { mvnz r5, r6, r7 ; add r15, r16, r17 ; lb r25, r26 } + 2e78: [0-9a-f]* { add r15, r16, r17 ; slt_u r5, r6, r7 ; lb r25, r26 } + 2e80: [0-9a-f]* { add r5, r6, r7 ; ill ; lb r25, r26 } + 2e88: [0-9a-f]* { add r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 } + 2e90: [0-9a-f]* { ctz r5, r6 ; addi r15, r16, 5 ; lb r25, r26 } + 2e98: [0-9a-f]* { addi r15, r16, 5 ; or r5, r6, r7 ; lb r25, r26 } + 2ea0: [0-9a-f]* { addi r15, r16, 5 ; sne r5, r6, r7 ; lb r25, r26 } + 2ea8: [0-9a-f]* { addi r5, r6, 5 ; mz r15, r16, r17 ; lb r25, r26 } + 2eb0: [0-9a-f]* { addi r5, r6, 5 ; slti r15, r16, 5 ; lb r25, r26 } + 2eb8: [0-9a-f]* { and r15, r16, r17 ; movei r5, 5 ; lb r25, r26 } + 2ec0: [0-9a-f]* { and r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 } + 2ec8: [0-9a-f]* { tblidxb1 r5, r6 ; and r15, r16, r17 ; lb r25, r26 } + 2ed0: [0-9a-f]* { and r5, r6, r7 ; rl r15, r16, r17 ; lb r25, r26 } + 2ed8: [0-9a-f]* { and r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + 2ee0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; andi r15, r16, 5 ; lb r25, r26 } + 2ee8: [0-9a-f]* { andi r15, r16, 5 ; shl r5, r6, r7 ; lb r25, r26 } + 2ef0: [0-9a-f]* { andi r5, r6, 5 ; add r15, r16, r17 ; lb r25, r26 } + 2ef8: [0-9a-f]* { andi r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 } + 2f00: [0-9a-f]* { bitx r5, r6 ; and r15, r16, r17 ; lb r25, r26 } + 2f08: [0-9a-f]* { bitx r5, r6 ; shl r15, r16, r17 ; lb r25, r26 } + 2f10: [0-9a-f]* { bytex r5, r6 ; lb r25, r26 } + 2f18: [0-9a-f]* { bytex r5, r6 ; shr r15, r16, r17 ; lb r25, r26 } + 2f20: [0-9a-f]* { clz r5, r6 ; info 19 ; lb r25, r26 } + 2f28: [0-9a-f]* { clz r5, r6 ; slt r15, r16, r17 ; lb r25, r26 } + 2f30: [0-9a-f]* { ctz r5, r6 ; move r15, r16 ; lb r25, r26 } + 2f38: [0-9a-f]* { ctz r5, r6 ; slte r15, r16, r17 ; lb r25, r26 } + 2f40: [0-9a-f]* { clz r5, r6 ; lb r25, r26 } + 2f48: [0-9a-f]* { mvnz r5, r6, r7 ; lb r25, r26 } + 2f50: [0-9a-f]* { s3a r15, r16, r17 ; lb r25, r26 } + 2f58: [0-9a-f]* { slte_u r15, r16, r17 ; lb r25, r26 } + 2f60: [0-9a-f]* { lb r25, r26 } + 2f68: [0-9a-f]* { mulll_uu r5, r6, r7 ; ill ; lb r25, r26 } + 2f70: [0-9a-f]* { shr r5, r6, r7 ; ill ; lb r25, r26 } + 2f78: [0-9a-f]* { info 19 ; addi r15, r16, 5 ; lb r25, r26 } + 2f80: [0-9a-f]* { mulhh_uu r5, r6, r7 ; info 19 ; lb r25, r26 } + 2f88: [0-9a-f]* { info 19 ; rl r15, r16, r17 ; lb r25, r26 } + 2f90: [0-9a-f]* { info 19 ; shri r15, r16, 5 ; lb r25, r26 } + 2f98: [0-9a-f]* { info 19 ; sub r15, r16, r17 ; lb r25, r26 } + 2fa0: [0-9a-f]* { mnz r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + 2fa8: [0-9a-f]* { mnz r15, r16, r17 ; rli r5, r6, 5 ; lb r25, r26 } + 2fb0: [0-9a-f]* { tblidxb0 r5, r6 ; mnz r15, r16, r17 ; lb r25, r26 } + 2fb8: [0-9a-f]* { mnz r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 } + 2fc0: [0-9a-f]* { mnz r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + 2fc8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; move r15, r16 ; lb r25, r26 } + 2fd0: [0-9a-f]* { move r15, r16 ; seqi r5, r6, 5 ; lb r25, r26 } + 2fd8: [0-9a-f]* { move r15, r16 ; lb r25, r26 } + 2fe0: [0-9a-f]* { move r5, r6 ; s3a r15, r16, r17 ; lb r25, r26 } + 2fe8: [0-9a-f]* { movei r15, 5 ; addi r5, r6, 5 ; lb r25, r26 } + 2ff0: [0-9a-f]* { mullla_uu r5, r6, r7 ; movei r15, 5 ; lb r25, r26 } + 2ff8: [0-9a-f]* { movei r15, 5 ; slt r5, r6, r7 ; lb r25, r26 } + 3000: [0-9a-f]* { movei r5, 5 ; lb r25, r26 } + 3008: [0-9a-f]* { movei r5, 5 ; shr r15, r16, r17 ; lb r25, r26 } + 3010: [0-9a-f]* { mulhh_ss r5, r6, r7 ; info 19 ; lb r25, r26 } + 3018: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 } + 3020: [0-9a-f]* { mulhh_uu r5, r6, r7 ; move r15, r16 ; lb r25, r26 } + 3028: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 } + 3030: [0-9a-f]* { mulhha_ss r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 } + 3038: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + 3040: [0-9a-f]* { mulhha_uu r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 } + 3048: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 } + 3050: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 } + 3058: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + 3060: [0-9a-f]* { mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + 3068: [0-9a-f]* { mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lb r25, r26 } + 3070: [0-9a-f]* { mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + 3078: [0-9a-f]* { mullla_ss r5, r6, r7 ; add r15, r16, r17 ; lb r25, r26 } + 3080: [0-9a-f]* { mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 } + 3088: [0-9a-f]* { mullla_uu r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + 3090: [0-9a-f]* { mullla_uu r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + 3098: [0-9a-f]* { mvnz r5, r6, r7 ; lb r25, r26 } + 30a0: [0-9a-f]* { mvnz r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + 30a8: [0-9a-f]* { mvz r5, r6, r7 ; info 19 ; lb r25, r26 } + 30b0: [0-9a-f]* { mvz r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 } + 30b8: [0-9a-f]* { mz r15, r16, r17 ; lb r25, r26 } + 30c0: [0-9a-f]* { mz r15, r16, r17 ; ori r5, r6, 5 ; lb r25, r26 } + 30c8: [0-9a-f]* { mz r15, r16, r17 ; sra r5, r6, r7 ; lb r25, r26 } + 30d0: [0-9a-f]* { mz r5, r6, r7 ; nop ; lb r25, r26 } + 30d8: [0-9a-f]* { mz r5, r6, r7 ; slti_u r15, r16, 5 ; lb r25, r26 } + 30e0: [0-9a-f]* { nop ; ill ; lb r25, r26 } + 30e8: [0-9a-f]* { nop ; mz r5, r6, r7 ; lb r25, r26 } + 30f0: [0-9a-f]* { nop ; seq r5, r6, r7 ; lb r25, r26 } + 30f8: [0-9a-f]* { nop ; slti r5, r6, 5 ; lb r25, r26 } + 3100: [0-9a-f]* { nor r15, r16, r17 ; and r5, r6, r7 ; lb r25, r26 } + 3108: [0-9a-f]* { mvnz r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 } + 3110: [0-9a-f]* { nor r15, r16, r17 ; slt_u r5, r6, r7 ; lb r25, r26 } + 3118: [0-9a-f]* { nor r5, r6, r7 ; ill ; lb r25, r26 } + 3120: [0-9a-f]* { nor r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 } + 3128: [0-9a-f]* { ctz r5, r6 ; or r15, r16, r17 ; lb r25, r26 } + 3130: [0-9a-f]* { or r15, r16, r17 ; or r5, r6, r7 ; lb r25, r26 } + 3138: [0-9a-f]* { or r15, r16, r17 ; sne r5, r6, r7 ; lb r25, r26 } + 3140: [0-9a-f]* { or r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 } + 3148: [0-9a-f]* { or r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + 3150: [0-9a-f]* { ori r15, r16, 5 ; movei r5, 5 ; lb r25, r26 } + 3158: [0-9a-f]* { ori r15, r16, 5 ; s1a r5, r6, r7 ; lb r25, r26 } + 3160: [0-9a-f]* { tblidxb1 r5, r6 ; ori r15, r16, 5 ; lb r25, r26 } + 3168: [0-9a-f]* { ori r5, r6, 5 ; rl r15, r16, r17 ; lb r25, r26 } + 3170: [0-9a-f]* { ori r5, r6, 5 ; sub r15, r16, r17 ; lb r25, r26 } + 3178: [0-9a-f]* { pcnt r5, r6 ; s1a r15, r16, r17 ; lb r25, r26 } + 3180: [0-9a-f]* { pcnt r5, r6 ; lb r25, r26 } + 3188: [0-9a-f]* { mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; lb r25, r26 } + 3190: [0-9a-f]* { rl r15, r16, r17 ; shr r5, r6, r7 ; lb r25, r26 } + 3198: [0-9a-f]* { rl r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + 31a0: [0-9a-f]* { rl r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + 31a8: [0-9a-f]* { bitx r5, r6 ; rli r15, r16, 5 ; lb r25, r26 } + 31b0: [0-9a-f]* { rli r15, r16, 5 ; mz r5, r6, r7 ; lb r25, r26 } + 31b8: [0-9a-f]* { rli r15, r16, 5 ; slte_u r5, r6, r7 ; lb r25, r26 } + 31c0: [0-9a-f]* { rli r5, r6, 5 ; mnz r15, r16, r17 ; lb r25, r26 } + 31c8: [0-9a-f]* { rli r5, r6, 5 ; slt_u r15, r16, r17 ; lb r25, r26 } + 31d0: [0-9a-f]* { s1a r15, r16, r17 ; info 19 ; lb r25, r26 } + 31d8: [0-9a-f]* { pcnt r5, r6 ; s1a r15, r16, r17 ; lb r25, r26 } + 31e0: [0-9a-f]* { s1a r15, r16, r17 ; srai r5, r6, 5 ; lb r25, r26 } + 31e8: [0-9a-f]* { s1a r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 } + 31f0: [0-9a-f]* { s1a r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 } + 31f8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + 3200: [0-9a-f]* { s2a r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 } + 3208: [0-9a-f]* { tblidxb3 r5, r6 ; s2a r15, r16, r17 ; lb r25, r26 } + 3210: [0-9a-f]* { s2a r5, r6, r7 ; s1a r15, r16, r17 ; lb r25, r26 } + 3218: [0-9a-f]* { s2a r5, r6, r7 ; lb r25, r26 } + 3220: [0-9a-f]* { mulll_uu r5, r6, r7 ; s3a r15, r16, r17 ; lb r25, r26 } + 3228: [0-9a-f]* { s3a r15, r16, r17 ; shr r5, r6, r7 ; lb r25, r26 } + 3230: [0-9a-f]* { s3a r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + 3238: [0-9a-f]* { s3a r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + 3240: [0-9a-f]* { bitx r5, r6 ; seq r15, r16, r17 ; lb r25, r26 } + 3248: [0-9a-f]* { seq r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 } + 3250: [0-9a-f]* { seq r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 } + 3258: [0-9a-f]* { seq r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 } + 3260: [0-9a-f]* { seq r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 } + 3268: [0-9a-f]* { seqi r15, r16, 5 ; info 19 ; lb r25, r26 } + 3270: [0-9a-f]* { pcnt r5, r6 ; seqi r15, r16, 5 ; lb r25, r26 } + 3278: [0-9a-f]* { seqi r15, r16, 5 ; srai r5, r6, 5 ; lb r25, r26 } + 3280: [0-9a-f]* { seqi r5, r6, 5 ; nor r15, r16, r17 ; lb r25, r26 } + 3288: [0-9a-f]* { seqi r5, r6, 5 ; sne r15, r16, r17 ; lb r25, r26 } + 3290: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + 3298: [0-9a-f]* { shl r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 } + 32a0: [0-9a-f]* { tblidxb3 r5, r6 ; shl r15, r16, r17 ; lb r25, r26 } + 32a8: [0-9a-f]* { shl r5, r6, r7 ; s1a r15, r16, r17 ; lb r25, r26 } + 32b0: [0-9a-f]* { shl r5, r6, r7 ; lb r25, r26 } + 32b8: [0-9a-f]* { mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; lb r25, r26 } + 32c0: [0-9a-f]* { shli r15, r16, 5 ; shr r5, r6, r7 ; lb r25, r26 } + 32c8: [0-9a-f]* { shli r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 } + 32d0: [0-9a-f]* { shli r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 } + 32d8: [0-9a-f]* { bitx r5, r6 ; shr r15, r16, r17 ; lb r25, r26 } + 32e0: [0-9a-f]* { shr r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 } + 32e8: [0-9a-f]* { shr r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 } + 32f0: [0-9a-f]* { shr r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 } + 32f8: [0-9a-f]* { shr r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 } + 3300: [0-9a-f]* { shri r15, r16, 5 ; info 19 ; lb r25, r26 } + 3308: [0-9a-f]* { pcnt r5, r6 ; shri r15, r16, 5 ; lb r25, r26 } + 3310: [0-9a-f]* { shri r15, r16, 5 ; srai r5, r6, 5 ; lb r25, r26 } + 3318: [0-9a-f]* { shri r5, r6, 5 ; nor r15, r16, r17 ; lb r25, r26 } + 3320: [0-9a-f]* { shri r5, r6, 5 ; sne r15, r16, r17 ; lb r25, r26 } + 3328: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 } + 3330: [0-9a-f]* { slt r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 } + 3338: [0-9a-f]* { tblidxb3 r5, r6 ; slt r15, r16, r17 ; lb r25, r26 } + 3340: [0-9a-f]* { slt r5, r6, r7 ; s1a r15, r16, r17 ; lb r25, r26 } + 3348: [0-9a-f]* { slt r5, r6, r7 ; lb r25, r26 } + 3350: [0-9a-f]* { mulll_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 } + 3358: [0-9a-f]* { slt_u r15, r16, r17 ; shr r5, r6, r7 ; lb r25, r26 } + 3360: [0-9a-f]* { slt_u r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + 3368: [0-9a-f]* { slt_u r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + 3370: [0-9a-f]* { bitx r5, r6 ; slte r15, r16, r17 ; lb r25, r26 } + 3378: [0-9a-f]* { slte r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 } + 3380: [0-9a-f]* { slte r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 } + 3388: [0-9a-f]* { slte r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 } + 3390: [0-9a-f]* { slte r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 } + 3398: [0-9a-f]* { slte_u r15, r16, r17 ; info 19 ; lb r25, r26 } + 33a0: [0-9a-f]* { pcnt r5, r6 ; slte_u r15, r16, r17 ; lb r25, r26 } + 33a8: [0-9a-f]* { slte_u r15, r16, r17 ; srai r5, r6, 5 ; lb r25, r26 } + 33b0: [0-9a-f]* { slte_u r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 } + 33b8: [0-9a-f]* { slte_u r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 } + 33c0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + 33c8: [0-9a-f]* { slti r15, r16, 5 ; s3a r5, r6, r7 ; lb r25, r26 } + 33d0: [0-9a-f]* { tblidxb3 r5, r6 ; slti r15, r16, 5 ; lb r25, r26 } + 33d8: [0-9a-f]* { slti r5, r6, 5 ; s1a r15, r16, r17 ; lb r25, r26 } + 33e0: [0-9a-f]* { slti r5, r6, 5 ; lb r25, r26 } + 33e8: [0-9a-f]* { mulll_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lb r25, r26 } + 33f0: [0-9a-f]* { slti_u r15, r16, 5 ; shr r5, r6, r7 ; lb r25, r26 } + 33f8: [0-9a-f]* { slti_u r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 } + 3400: [0-9a-f]* { slti_u r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 } + 3408: [0-9a-f]* { bitx r5, r6 ; sne r15, r16, r17 ; lb r25, r26 } + 3410: [0-9a-f]* { sne r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 } + 3418: [0-9a-f]* { sne r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 } + 3420: [0-9a-f]* { sne r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 } + 3428: [0-9a-f]* { sne r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 } + 3430: [0-9a-f]* { sra r15, r16, r17 ; info 19 ; lb r25, r26 } + 3438: [0-9a-f]* { pcnt r5, r6 ; sra r15, r16, r17 ; lb r25, r26 } + 3440: [0-9a-f]* { sra r15, r16, r17 ; srai r5, r6, 5 ; lb r25, r26 } + 3448: [0-9a-f]* { sra r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 } + 3450: [0-9a-f]* { sra r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 } + 3458: [0-9a-f]* { mulhh_uu r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + 3460: [0-9a-f]* { srai r15, r16, 5 ; s3a r5, r6, r7 ; lb r25, r26 } + 3468: [0-9a-f]* { tblidxb3 r5, r6 ; srai r15, r16, 5 ; lb r25, r26 } + 3470: [0-9a-f]* { srai r5, r6, 5 ; s1a r15, r16, r17 ; lb r25, r26 } + 3478: [0-9a-f]* { srai r5, r6, 5 ; lb r25, r26 } + 3480: [0-9a-f]* { mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + 3488: [0-9a-f]* { sub r15, r16, r17 ; shr r5, r6, r7 ; lb r25, r26 } + 3490: [0-9a-f]* { sub r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + 3498: [0-9a-f]* { sub r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + 34a0: [0-9a-f]* { tblidxb0 r5, r6 ; lb r25, r26 } + 34a8: [0-9a-f]* { tblidxb0 r5, r6 ; shr r15, r16, r17 ; lb r25, r26 } + 34b0: [0-9a-f]* { tblidxb1 r5, r6 ; info 19 ; lb r25, r26 } + 34b8: [0-9a-f]* { tblidxb1 r5, r6 ; slt r15, r16, r17 ; lb r25, r26 } + 34c0: [0-9a-f]* { tblidxb2 r5, r6 ; move r15, r16 ; lb r25, r26 } + 34c8: [0-9a-f]* { tblidxb2 r5, r6 ; slte r15, r16, r17 ; lb r25, r26 } + 34d0: [0-9a-f]* { tblidxb3 r5, r6 ; mz r15, r16, r17 ; lb r25, r26 } + 34d8: [0-9a-f]* { tblidxb3 r5, r6 ; slti r15, r16, 5 ; lb r25, r26 } + 34e0: [0-9a-f]* { xor r15, r16, r17 ; movei r5, 5 ; lb r25, r26 } + 34e8: [0-9a-f]* { xor r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 } + 34f0: [0-9a-f]* { tblidxb1 r5, r6 ; xor r15, r16, r17 ; lb r25, r26 } + 34f8: [0-9a-f]* { xor r5, r6, r7 ; rl r15, r16, r17 ; lb r25, r26 } + 3500: [0-9a-f]* { xor r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + 3508: [0-9a-f]* { avgh r5, r6, r7 ; lb_u r15, r16 } + 3510: [0-9a-f]* { minh r5, r6, r7 ; lb_u r15, r16 } + 3518: [0-9a-f]* { mulhl_us r5, r6, r7 ; lb_u r15, r16 } + 3520: [0-9a-f]* { nor r5, r6, r7 ; lb_u r15, r16 } + 3528: [0-9a-f]* { seqb r5, r6, r7 ; lb_u r15, r16 } + 3530: [0-9a-f]* { sltb_u r5, r6, r7 ; lb_u r15, r16 } + 3538: [0-9a-f]* { srah r5, r6, r7 ; lb_u r15, r16 } + 3540: [0-9a-f]* { bitx r5, r6 ; add r15, r16, r17 ; lb_u r25, r26 } + 3548: [0-9a-f]* { add r15, r16, r17 ; mz r5, r6, r7 ; lb_u r25, r26 } + 3550: [0-9a-f]* { add r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 } + 3558: [0-9a-f]* { add r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + 3560: [0-9a-f]* { add r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + 3568: [0-9a-f]* { addi r15, r16, 5 ; info 19 ; lb_u r25, r26 } + 3570: [0-9a-f]* { pcnt r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 } + 3578: [0-9a-f]* { addi r15, r16, 5 ; srai r5, r6, 5 ; lb_u r25, r26 } + 3580: [0-9a-f]* { addi r5, r6, 5 ; nor r15, r16, r17 ; lb_u r25, r26 } + 3588: [0-9a-f]* { addi r5, r6, 5 ; sne r15, r16, r17 ; lb_u r25, r26 } + 3590: [0-9a-f]* { mulhh_uu r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + 3598: [0-9a-f]* { and r15, r16, r17 ; s3a r5, r6, r7 ; lb_u r25, r26 } + 35a0: [0-9a-f]* { tblidxb3 r5, r6 ; and r15, r16, r17 ; lb_u r25, r26 } + 35a8: [0-9a-f]* { and r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 35b0: [0-9a-f]* { and r5, r6, r7 ; lb_u r25, r26 } + 35b8: [0-9a-f]* { mulll_uu r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 } + 35c0: [0-9a-f]* { andi r15, r16, 5 ; shr r5, r6, r7 ; lb_u r25, r26 } + 35c8: [0-9a-f]* { andi r5, r6, 5 ; and r15, r16, r17 ; lb_u r25, r26 } + 35d0: [0-9a-f]* { andi r5, r6, 5 ; shl r15, r16, r17 ; lb_u r25, r26 } + 35d8: [0-9a-f]* { bitx r5, r6 ; lb_u r25, r26 } + 35e0: [0-9a-f]* { bitx r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 } + 35e8: [0-9a-f]* { bytex r5, r6 ; info 19 ; lb_u r25, r26 } + 35f0: [0-9a-f]* { bytex r5, r6 ; slt r15, r16, r17 ; lb_u r25, r26 } + 35f8: [0-9a-f]* { clz r5, r6 ; move r15, r16 ; lb_u r25, r26 } + 3600: [0-9a-f]* { clz r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 } + 3608: [0-9a-f]* { ctz r5, r6 ; mz r15, r16, r17 ; lb_u r25, r26 } + 3610: [0-9a-f]* { ctz r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 } + 3618: [0-9a-f]* { lb_u r25, r26 } + 3620: [0-9a-f]* { mz r15, r16, r17 ; lb_u r25, r26 } + 3628: [0-9a-f]* { seq r15, r16, r17 ; lb_u r25, r26 } + 3630: [0-9a-f]* { slti r15, r16, 5 ; lb_u r25, r26 } + 3638: [0-9a-f]* { addi r5, r6, 5 ; ill ; lb_u r25, r26 } + 3640: [0-9a-f]* { mullla_uu r5, r6, r7 ; ill ; lb_u r25, r26 } + 3648: [0-9a-f]* { slt r5, r6, r7 ; ill ; lb_u r25, r26 } + 3650: [0-9a-f]* { info 19 ; and r15, r16, r17 ; lb_u r25, r26 } + 3658: [0-9a-f]* { mulhha_uu r5, r6, r7 ; info 19 ; lb_u r25, r26 } + 3660: [0-9a-f]* { info 19 ; rli r15, r16, 5 ; lb_u r25, r26 } + 3668: [0-9a-f]* { info 19 ; slt r15, r16, r17 ; lb_u r25, r26 } + 3670: [0-9a-f]* { tblidxb0 r5, r6 ; info 19 ; lb_u r25, r26 } + 3678: [0-9a-f]* { mulhh_ss r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + 3680: [0-9a-f]* { mnz r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + 3688: [0-9a-f]* { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; lb_u r25, r26 } + 3690: [0-9a-f]* { mnz r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 } + 3698: [0-9a-f]* { mnz r5, r6, r7 ; xor r15, r16, r17 ; lb_u r25, r26 } + 36a0: [0-9a-f]* { mulll_ss r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 } + 36a8: [0-9a-f]* { move r15, r16 ; shli r5, r6, 5 ; lb_u r25, r26 } + 36b0: [0-9a-f]* { move r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 } + 36b8: [0-9a-f]* { move r5, r6 ; seqi r15, r16, 5 ; lb_u r25, r26 } + 36c0: [0-9a-f]* { movei r15, 5 ; andi r5, r6, 5 ; lb_u r25, r26 } + 36c8: [0-9a-f]* { mvz r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + 36d0: [0-9a-f]* { movei r15, 5 ; slte r5, r6, r7 ; lb_u r25, r26 } + 36d8: [0-9a-f]* { movei r5, 5 ; info 19 ; lb_u r25, r26 } + 36e0: [0-9a-f]* { movei r5, 5 ; slt r15, r16, r17 ; lb_u r25, r26 } + 36e8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 } + 36f0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slte r15, r16, r17 ; lb_u r25, r26 } + 36f8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; mz r15, r16, r17 ; lb_u r25, r26 } + 3700: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 } + 3708: [0-9a-f]* { mulhha_ss r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 } + 3710: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 } + 3718: [0-9a-f]* { mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 } + 3720: [0-9a-f]* { mulhha_uu r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 } + 3728: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 } + 3730: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; lb_u r25, r26 } + 3738: [0-9a-f]* { mulll_ss r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 } + 3740: [0-9a-f]* { mulll_uu r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 } + 3748: [0-9a-f]* { mulll_uu r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 } + 3750: [0-9a-f]* { mullla_ss r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + 3758: [0-9a-f]* { mullla_ss r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 } + 3760: [0-9a-f]* { mullla_uu r5, r6, r7 ; lb_u r25, r26 } + 3768: [0-9a-f]* { mullla_uu r5, r6, r7 ; shr r15, r16, r17 ; lb_u r25, r26 } + 3770: [0-9a-f]* { mvnz r5, r6, r7 ; info 19 ; lb_u r25, r26 } + 3778: [0-9a-f]* { mvnz r5, r6, r7 ; slt r15, r16, r17 ; lb_u r25, r26 } + 3780: [0-9a-f]* { mvz r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 } + 3788: [0-9a-f]* { mvz r5, r6, r7 ; slte r15, r16, r17 ; lb_u r25, r26 } + 3790: [0-9a-f]* { mz r15, r16, r17 ; mnz r5, r6, r7 ; lb_u r25, r26 } + 3798: [0-9a-f]* { mz r15, r16, r17 ; rl r5, r6, r7 ; lb_u r25, r26 } + 37a0: [0-9a-f]* { mz r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + 37a8: [0-9a-f]* { mz r5, r6, r7 ; or r15, r16, r17 ; lb_u r25, r26 } + 37b0: [0-9a-f]* { mz r5, r6, r7 ; sra r15, r16, r17 ; lb_u r25, r26 } + 37b8: [0-9a-f]* { nop ; mnz r15, r16, r17 ; lb_u r25, r26 } + 37c0: [0-9a-f]* { nop ; nor r15, r16, r17 ; lb_u r25, r26 } + 37c8: [0-9a-f]* { nop ; seqi r5, r6, 5 ; lb_u r25, r26 } + 37d0: [0-9a-f]* { nop ; slti_u r5, r6, 5 ; lb_u r25, r26 } + 37d8: [0-9a-f]* { bitx r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 } + 37e0: [0-9a-f]* { nor r15, r16, r17 ; mz r5, r6, r7 ; lb_u r25, r26 } + 37e8: [0-9a-f]* { nor r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 } + 37f0: [0-9a-f]* { nor r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + 37f8: [0-9a-f]* { nor r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + 3800: [0-9a-f]* { or r15, r16, r17 ; info 19 ; lb_u r25, r26 } + 3808: [0-9a-f]* { pcnt r5, r6 ; or r15, r16, r17 ; lb_u r25, r26 } + 3810: [0-9a-f]* { or r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + 3818: [0-9a-f]* { or r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 } + 3820: [0-9a-f]* { or r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 } + 3828: [0-9a-f]* { mulhh_uu r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 } + 3830: [0-9a-f]* { ori r15, r16, 5 ; s3a r5, r6, r7 ; lb_u r25, r26 } + 3838: [0-9a-f]* { tblidxb3 r5, r6 ; ori r15, r16, 5 ; lb_u r25, r26 } + 3840: [0-9a-f]* { ori r5, r6, 5 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 3848: [0-9a-f]* { ori r5, r6, 5 ; lb_u r25, r26 } + 3850: [0-9a-f]* { pcnt r5, r6 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 3858: [0-9a-f]* { rl r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 } + 3860: [0-9a-f]* { mullla_uu r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 } + 3868: [0-9a-f]* { rl r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 } + 3870: [0-9a-f]* { rl r5, r6, r7 ; lb_u r25, r26 } + 3878: [0-9a-f]* { rl r5, r6, r7 ; shr r15, r16, r17 ; lb_u r25, r26 } + 3880: [0-9a-f]* { clz r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 } + 3888: [0-9a-f]* { rli r15, r16, 5 ; nor r5, r6, r7 ; lb_u r25, r26 } + 3890: [0-9a-f]* { rli r15, r16, 5 ; slti_u r5, r6, 5 ; lb_u r25, r26 } + 3898: [0-9a-f]* { rli r5, r6, 5 ; movei r15, 5 ; lb_u r25, r26 } + 38a0: [0-9a-f]* { rli r5, r6, 5 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + 38a8: [0-9a-f]* { s1a r15, r16, r17 ; move r5, r6 ; lb_u r25, r26 } + 38b0: [0-9a-f]* { s1a r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + 38b8: [0-9a-f]* { tblidxb0 r5, r6 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 38c0: [0-9a-f]* { s1a r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 } + 38c8: [0-9a-f]* { s1a r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 } + 38d0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 } + 38d8: [0-9a-f]* { s2a r15, r16, r17 ; seqi r5, r6, 5 ; lb_u r25, r26 } + 38e0: [0-9a-f]* { s2a r15, r16, r17 ; lb_u r25, r26 } + 38e8: [0-9a-f]* { s2a r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 38f0: [0-9a-f]* { s3a r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 } + 38f8: [0-9a-f]* { mullla_uu r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 3900: [0-9a-f]* { s3a r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 } + 3908: [0-9a-f]* { s3a r5, r6, r7 ; lb_u r25, r26 } + 3910: [0-9a-f]* { s3a r5, r6, r7 ; shr r15, r16, r17 ; lb_u r25, r26 } + 3918: [0-9a-f]* { clz r5, r6 ; seq r15, r16, r17 ; lb_u r25, r26 } + 3920: [0-9a-f]* { seq r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 } + 3928: [0-9a-f]* { seq r15, r16, r17 ; slti_u r5, r6, 5 ; lb_u r25, r26 } + 3930: [0-9a-f]* { seq r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + 3938: [0-9a-f]* { seq r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + 3940: [0-9a-f]* { seqi r15, r16, 5 ; move r5, r6 ; lb_u r25, r26 } + 3948: [0-9a-f]* { seqi r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 } + 3950: [0-9a-f]* { tblidxb0 r5, r6 ; seqi r15, r16, 5 ; lb_u r25, r26 } + 3958: [0-9a-f]* { seqi r5, r6, 5 ; ori r15, r16, 5 ; lb_u r25, r26 } + 3960: [0-9a-f]* { seqi r5, r6, 5 ; srai r15, r16, 5 ; lb_u r25, r26 } + 3968: [0-9a-f]* { mulhha_uu r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 } + 3970: [0-9a-f]* { shl r15, r16, r17 ; seqi r5, r6, 5 ; lb_u r25, r26 } + 3978: [0-9a-f]* { shl r15, r16, r17 ; lb_u r25, r26 } + 3980: [0-9a-f]* { shl r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 3988: [0-9a-f]* { shli r15, r16, 5 ; addi r5, r6, 5 ; lb_u r25, r26 } + 3990: [0-9a-f]* { mullla_uu r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 } + 3998: [0-9a-f]* { shli r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 } + 39a0: [0-9a-f]* { shli r5, r6, 5 ; lb_u r25, r26 } + 39a8: [0-9a-f]* { shli r5, r6, 5 ; shr r15, r16, r17 ; lb_u r25, r26 } + 39b0: [0-9a-f]* { clz r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 } + 39b8: [0-9a-f]* { shr r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 } + 39c0: [0-9a-f]* { shr r15, r16, r17 ; slti_u r5, r6, 5 ; lb_u r25, r26 } + 39c8: [0-9a-f]* { shr r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + 39d0: [0-9a-f]* { shr r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + 39d8: [0-9a-f]* { shri r15, r16, 5 ; move r5, r6 ; lb_u r25, r26 } + 39e0: [0-9a-f]* { shri r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 } + 39e8: [0-9a-f]* { tblidxb0 r5, r6 ; shri r15, r16, 5 ; lb_u r25, r26 } + 39f0: [0-9a-f]* { shri r5, r6, 5 ; ori r15, r16, 5 ; lb_u r25, r26 } + 39f8: [0-9a-f]* { shri r5, r6, 5 ; srai r15, r16, 5 ; lb_u r25, r26 } + 3a00: [0-9a-f]* { mulhha_uu r5, r6, r7 ; slt r15, r16, r17 ; lb_u r25, r26 } + 3a08: [0-9a-f]* { slt r15, r16, r17 ; seqi r5, r6, 5 ; lb_u r25, r26 } + 3a10: [0-9a-f]* { slt r15, r16, r17 ; lb_u r25, r26 } + 3a18: [0-9a-f]* { slt r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 3a20: [0-9a-f]* { slt_u r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 } + 3a28: [0-9a-f]* { mullla_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + 3a30: [0-9a-f]* { slt_u r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 } + 3a38: [0-9a-f]* { slt_u r5, r6, r7 ; lb_u r25, r26 } + 3a40: [0-9a-f]* { slt_u r5, r6, r7 ; shr r15, r16, r17 ; lb_u r25, r26 } + 3a48: [0-9a-f]* { clz r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 } + 3a50: [0-9a-f]* { slte r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 } + 3a58: [0-9a-f]* { slte r15, r16, r17 ; slti_u r5, r6, 5 ; lb_u r25, r26 } + 3a60: [0-9a-f]* { slte r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + 3a68: [0-9a-f]* { slte r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + 3a70: [0-9a-f]* { slte_u r15, r16, r17 ; move r5, r6 ; lb_u r25, r26 } + 3a78: [0-9a-f]* { slte_u r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + 3a80: [0-9a-f]* { tblidxb0 r5, r6 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + 3a88: [0-9a-f]* { slte_u r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 } + 3a90: [0-9a-f]* { slte_u r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 } + 3a98: [0-9a-f]* { mulhha_uu r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 } + 3aa0: [0-9a-f]* { slti r15, r16, 5 ; seqi r5, r6, 5 ; lb_u r25, r26 } + 3aa8: [0-9a-f]* { slti r15, r16, 5 ; lb_u r25, r26 } + 3ab0: [0-9a-f]* { slti r5, r6, 5 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 3ab8: [0-9a-f]* { slti_u r15, r16, 5 ; addi r5, r6, 5 ; lb_u r25, r26 } + 3ac0: [0-9a-f]* { mullla_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 } + 3ac8: [0-9a-f]* { slti_u r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 } + 3ad0: [0-9a-f]* { slti_u r5, r6, 5 ; lb_u r25, r26 } + 3ad8: [0-9a-f]* { slti_u r5, r6, 5 ; shr r15, r16, r17 ; lb_u r25, r26 } + 3ae0: [0-9a-f]* { clz r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 } + 3ae8: [0-9a-f]* { sne r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 } + 3af0: [0-9a-f]* { sne r15, r16, r17 ; slti_u r5, r6, 5 ; lb_u r25, r26 } + 3af8: [0-9a-f]* { sne r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + 3b00: [0-9a-f]* { sne r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + 3b08: [0-9a-f]* { sra r15, r16, r17 ; move r5, r6 ; lb_u r25, r26 } + 3b10: [0-9a-f]* { sra r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + 3b18: [0-9a-f]* { tblidxb0 r5, r6 ; sra r15, r16, r17 ; lb_u r25, r26 } + 3b20: [0-9a-f]* { sra r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 } + 3b28: [0-9a-f]* { sra r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 } + 3b30: [0-9a-f]* { mulhha_uu r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 } + 3b38: [0-9a-f]* { srai r15, r16, 5 ; seqi r5, r6, 5 ; lb_u r25, r26 } + 3b40: [0-9a-f]* { srai r15, r16, 5 ; lb_u r25, r26 } + 3b48: [0-9a-f]* { srai r5, r6, 5 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 3b50: [0-9a-f]* { sub r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 } + 3b58: [0-9a-f]* { mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 } + 3b60: [0-9a-f]* { sub r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 } + 3b68: [0-9a-f]* { sub r5, r6, r7 ; lb_u r25, r26 } + 3b70: [0-9a-f]* { sub r5, r6, r7 ; shr r15, r16, r17 ; lb_u r25, r26 } + 3b78: [0-9a-f]* { tblidxb0 r5, r6 ; info 19 ; lb_u r25, r26 } + 3b80: [0-9a-f]* { tblidxb0 r5, r6 ; slt r15, r16, r17 ; lb_u r25, r26 } + 3b88: [0-9a-f]* { tblidxb1 r5, r6 ; move r15, r16 ; lb_u r25, r26 } + 3b90: [0-9a-f]* { tblidxb1 r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 } + 3b98: [0-9a-f]* { tblidxb2 r5, r6 ; mz r15, r16, r17 ; lb_u r25, r26 } + 3ba0: [0-9a-f]* { tblidxb2 r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 } + 3ba8: [0-9a-f]* { tblidxb3 r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 } + 3bb0: [0-9a-f]* { tblidxb3 r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 } + 3bb8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; lb_u r25, r26 } + 3bc0: [0-9a-f]* { xor r15, r16, r17 ; s3a r5, r6, r7 ; lb_u r25, r26 } + 3bc8: [0-9a-f]* { tblidxb3 r5, r6 ; xor r15, r16, r17 ; lb_u r25, r26 } + 3bd0: [0-9a-f]* { xor r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 3bd8: [0-9a-f]* { xor r5, r6, r7 ; lb_u r25, r26 } + 3be0: [0-9a-f]* { bytex r5, r6 ; lbadd r15, r16, 5 } + 3be8: [0-9a-f]* { minih r5, r6, 5 ; lbadd r15, r16, 5 } + 3bf0: [0-9a-f]* { mulhla_ss r5, r6, r7 ; lbadd r15, r16, 5 } + 3bf8: [0-9a-f]* { ori r5, r6, 5 ; lbadd r15, r16, 5 } + 3c00: [0-9a-f]* { seqi r5, r6, 5 ; lbadd r15, r16, 5 } + 3c08: [0-9a-f]* { slte_u r5, r6, r7 ; lbadd r15, r16, 5 } + 3c10: [0-9a-f]* { sraib r5, r6, 5 ; lbadd r15, r16, 5 } + 3c18: [0-9a-f]* { addib r5, r6, 5 ; lbadd_u r15, r16, 5 } + 3c20: [0-9a-f]* { info 19 ; lbadd_u r15, r16, 5 } + 3c28: [0-9a-f]* { moveli r5, 4660 ; lbadd_u r15, r16, 5 } + 3c30: [0-9a-f]* { mulll_uu r5, r6, r7 ; lbadd_u r15, r16, 5 } + 3c38: [0-9a-f]* { rli r5, r6, 5 ; lbadd_u r15, r16, 5 } + 3c40: [0-9a-f]* { shlib r5, r6, 5 ; lbadd_u r15, r16, 5 } + 3c48: [0-9a-f]* { slti r5, r6, 5 ; lbadd_u r15, r16, 5 } + 3c50: [0-9a-f]* { subs r5, r6, r7 ; lbadd_u r15, r16, 5 } + 3c58: [0-9a-f]* { and r5, r6, r7 ; lh r15, r16 } + 3c60: [0-9a-f]* { maxh r5, r6, r7 ; lh r15, r16 } + 3c68: [0-9a-f]* { mulhha_uu r5, r6, r7 ; lh r15, r16 } + 3c70: [0-9a-f]* { mz r5, r6, r7 ; lh r15, r16 } + 3c78: [0-9a-f]* { sadb_u r5, r6, r7 ; lh r15, r16 } + 3c80: [0-9a-f]* { shrih r5, r6, 5 ; lh r15, r16 } + 3c88: [0-9a-f]* { sneb r5, r6, r7 ; lh r15, r16 } + 3c90: [0-9a-f]* { add r15, r16, r17 ; add r5, r6, r7 ; lh r25, r26 } + 3c98: [0-9a-f]* { mullla_ss r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + 3ca0: [0-9a-f]* { add r15, r16, r17 ; shri r5, r6, 5 ; lh r25, r26 } + 3ca8: [0-9a-f]* { add r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 } + 3cb0: [0-9a-f]* { add r5, r6, r7 ; shli r15, r16, 5 ; lh r25, r26 } + 3cb8: [0-9a-f]* { bytex r5, r6 ; addi r15, r16, 5 ; lh r25, r26 } + 3cc0: [0-9a-f]* { addi r15, r16, 5 ; nop ; lh r25, r26 } + 3cc8: [0-9a-f]* { addi r15, r16, 5 ; slti r5, r6, 5 ; lh r25, r26 } + 3cd0: [0-9a-f]* { addi r5, r6, 5 ; move r15, r16 ; lh r25, r26 } + 3cd8: [0-9a-f]* { addi r5, r6, 5 ; slte r15, r16, r17 ; lh r25, r26 } + 3ce0: [0-9a-f]* { and r15, r16, r17 ; mnz r5, r6, r7 ; lh r25, r26 } + 3ce8: [0-9a-f]* { and r15, r16, r17 ; rl r5, r6, r7 ; lh r25, r26 } + 3cf0: [0-9a-f]* { and r15, r16, r17 ; sub r5, r6, r7 ; lh r25, r26 } + 3cf8: [0-9a-f]* { and r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + 3d00: [0-9a-f]* { and r5, r6, r7 ; sra r15, r16, r17 ; lh r25, r26 } + 3d08: [0-9a-f]* { mulhha_ss r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 } + 3d10: [0-9a-f]* { andi r15, r16, 5 ; seq r5, r6, r7 ; lh r25, r26 } + 3d18: [0-9a-f]* { andi r15, r16, 5 ; xor r5, r6, r7 ; lh r25, r26 } + 3d20: [0-9a-f]* { andi r5, r6, 5 ; s2a r15, r16, r17 ; lh r25, r26 } + 3d28: [0-9a-f]* { bitx r5, r6 ; add r15, r16, r17 ; lh r25, r26 } + 3d30: [0-9a-f]* { bitx r5, r6 ; seq r15, r16, r17 ; lh r25, r26 } + 3d38: [0-9a-f]* { bytex r5, r6 ; and r15, r16, r17 ; lh r25, r26 } + 3d40: [0-9a-f]* { bytex r5, r6 ; shl r15, r16, r17 ; lh r25, r26 } + 3d48: [0-9a-f]* { clz r5, r6 ; lh r25, r26 } + 3d50: [0-9a-f]* { clz r5, r6 ; shr r15, r16, r17 ; lh r25, r26 } + 3d58: [0-9a-f]* { ctz r5, r6 ; info 19 ; lh r25, r26 } + 3d60: [0-9a-f]* { ctz r5, r6 ; slt r15, r16, r17 ; lh r25, r26 } + 3d68: [0-9a-f]* { bitx r5, r6 ; lh r25, r26 } + 3d70: [0-9a-f]* { mullla_ss r5, r6, r7 ; lh r25, r26 } + 3d78: [0-9a-f]* { s2a r15, r16, r17 ; lh r25, r26 } + 3d80: [0-9a-f]* { slte r15, r16, r17 ; lh r25, r26 } + 3d88: [0-9a-f]* { xor r15, r16, r17 ; lh r25, r26 } + 3d90: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; ill ; lh r25, r26 } + 3d98: [0-9a-f]* { shl r5, r6, r7 ; ill ; lh r25, r26 } + 3da0: [0-9a-f]* { info 19 ; add r15, r16, r17 ; lh r25, r26 } + 3da8: [0-9a-f]* { info 19 ; movei r5, 5 ; lh r25, r26 } + 3db0: [0-9a-f]* { info 19 ; ori r5, r6, 5 ; lh r25, r26 } + 3db8: [0-9a-f]* { info 19 ; shr r15, r16, r17 ; lh r25, r26 } + 3dc0: [0-9a-f]* { info 19 ; srai r15, r16, 5 ; lh r25, r26 } + 3dc8: [0-9a-f]* { mnz r15, r16, r17 ; info 19 ; lh r25, r26 } + 3dd0: [0-9a-f]* { pcnt r5, r6 ; mnz r15, r16, r17 ; lh r25, r26 } + 3dd8: [0-9a-f]* { mnz r15, r16, r17 ; srai r5, r6, 5 ; lh r25, r26 } + 3de0: [0-9a-f]* { mnz r5, r6, r7 ; nor r15, r16, r17 ; lh r25, r26 } + 3de8: [0-9a-f]* { mnz r5, r6, r7 ; sne r15, r16, r17 ; lh r25, r26 } + 3df0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; move r15, r16 ; lh r25, r26 } + 3df8: [0-9a-f]* { move r15, r16 ; s3a r5, r6, r7 ; lh r25, r26 } + 3e00: [0-9a-f]* { tblidxb3 r5, r6 ; move r15, r16 ; lh r25, r26 } + 3e08: [0-9a-f]* { move r5, r6 ; s1a r15, r16, r17 ; lh r25, r26 } + 3e10: [0-9a-f]* { move r5, r6 ; lh r25, r26 } + 3e18: [0-9a-f]* { mulll_uu r5, r6, r7 ; movei r15, 5 ; lh r25, r26 } + 3e20: [0-9a-f]* { movei r15, 5 ; shr r5, r6, r7 ; lh r25, r26 } + 3e28: [0-9a-f]* { movei r5, 5 ; and r15, r16, r17 ; lh r25, r26 } + 3e30: [0-9a-f]* { movei r5, 5 ; shl r15, r16, r17 ; lh r25, r26 } + 3e38: [0-9a-f]* { mulhh_ss r5, r6, r7 ; lh r25, r26 } + 3e40: [0-9a-f]* { mulhh_ss r5, r6, r7 ; shr r15, r16, r17 ; lh r25, r26 } + 3e48: [0-9a-f]* { mulhh_uu r5, r6, r7 ; info 19 ; lh r25, r26 } + 3e50: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 } + 3e58: [0-9a-f]* { mulhha_ss r5, r6, r7 ; move r15, r16 ; lh r25, r26 } + 3e60: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 } + 3e68: [0-9a-f]* { mulhha_uu r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + 3e70: [0-9a-f]* { mulhha_uu r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 } + 3e78: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; lh r25, r26 } + 3e80: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sne r15, r16, r17 ; lh r25, r26 } + 3e88: [0-9a-f]* { mulll_ss r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 } + 3e90: [0-9a-f]* { mulll_ss r5, r6, r7 ; srai r15, r16, 5 ; lh r25, r26 } + 3e98: [0-9a-f]* { mulll_uu r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 } + 3ea0: [0-9a-f]* { mulll_uu r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 } + 3ea8: [0-9a-f]* { mullla_ss r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 } + 3eb0: [0-9a-f]* { mullla_uu r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + 3eb8: [0-9a-f]* { mullla_uu r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 } + 3ec0: [0-9a-f]* { mvnz r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + 3ec8: [0-9a-f]* { mvnz r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 } + 3ed0: [0-9a-f]* { mvz r5, r6, r7 ; lh r25, r26 } + 3ed8: [0-9a-f]* { mvz r5, r6, r7 ; shr r15, r16, r17 ; lh r25, r26 } + 3ee0: [0-9a-f]* { clz r5, r6 ; mz r15, r16, r17 ; lh r25, r26 } + 3ee8: [0-9a-f]* { mz r15, r16, r17 ; nor r5, r6, r7 ; lh r25, r26 } + 3ef0: [0-9a-f]* { mz r15, r16, r17 ; slti_u r5, r6, 5 ; lh r25, r26 } + 3ef8: [0-9a-f]* { mz r5, r6, r7 ; movei r15, 5 ; lh r25, r26 } + 3f00: [0-9a-f]* { mz r5, r6, r7 ; slte_u r15, r16, r17 ; lh r25, r26 } + 3f08: [0-9a-f]* { ctz r5, r6 ; nop ; lh r25, r26 } + 3f10: [0-9a-f]* { mvz r5, r6, r7 ; nop ; lh r25, r26 } + 3f18: [0-9a-f]* { nop ; s3a r5, r6, r7 ; lh r25, r26 } + 3f20: [0-9a-f]* { nop ; slte_u r5, r6, r7 ; lh r25, r26 } + 3f28: [0-9a-f]* { nor r15, r16, r17 ; add r5, r6, r7 ; lh r25, r26 } + 3f30: [0-9a-f]* { mullla_ss r5, r6, r7 ; nor r15, r16, r17 ; lh r25, r26 } + 3f38: [0-9a-f]* { nor r15, r16, r17 ; shri r5, r6, 5 ; lh r25, r26 } + 3f40: [0-9a-f]* { nor r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 } + 3f48: [0-9a-f]* { nor r5, r6, r7 ; shli r15, r16, 5 ; lh r25, r26 } + 3f50: [0-9a-f]* { bytex r5, r6 ; or r15, r16, r17 ; lh r25, r26 } + 3f58: [0-9a-f]* { or r15, r16, r17 ; nop ; lh r25, r26 } + 3f60: [0-9a-f]* { or r15, r16, r17 ; slti r5, r6, 5 ; lh r25, r26 } + 3f68: [0-9a-f]* { or r5, r6, r7 ; move r15, r16 ; lh r25, r26 } + 3f70: [0-9a-f]* { or r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 } + 3f78: [0-9a-f]* { ori r15, r16, 5 ; mnz r5, r6, r7 ; lh r25, r26 } + 3f80: [0-9a-f]* { ori r15, r16, 5 ; rl r5, r6, r7 ; lh r25, r26 } + 3f88: [0-9a-f]* { ori r15, r16, 5 ; sub r5, r6, r7 ; lh r25, r26 } + 3f90: [0-9a-f]* { ori r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 } + 3f98: [0-9a-f]* { ori r5, r6, 5 ; sra r15, r16, r17 ; lh r25, r26 } + 3fa0: [0-9a-f]* { pcnt r5, r6 ; rl r15, r16, r17 ; lh r25, r26 } + 3fa8: [0-9a-f]* { pcnt r5, r6 ; sub r15, r16, r17 ; lh r25, r26 } + 3fb0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 } + 3fb8: [0-9a-f]* { rl r15, r16, r17 ; shl r5, r6, r7 ; lh r25, r26 } + 3fc0: [0-9a-f]* { rl r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + 3fc8: [0-9a-f]* { rl r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 } + 3fd0: [0-9a-f]* { rli r15, r16, 5 ; and r5, r6, r7 ; lh r25, r26 } + 3fd8: [0-9a-f]* { mvnz r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 } + 3fe0: [0-9a-f]* { rli r15, r16, 5 ; slt_u r5, r6, r7 ; lh r25, r26 } + 3fe8: [0-9a-f]* { rli r5, r6, 5 ; ill ; lh r25, r26 } + 3ff0: [0-9a-f]* { rli r5, r6, 5 ; shri r15, r16, 5 ; lh r25, r26 } + 3ff8: [0-9a-f]* { ctz r5, r6 ; s1a r15, r16, r17 ; lh r25, r26 } + 4000: [0-9a-f]* { s1a r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + 4008: [0-9a-f]* { s1a r15, r16, r17 ; sne r5, r6, r7 ; lh r25, r26 } + 4010: [0-9a-f]* { s1a r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + 4018: [0-9a-f]* { s1a r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 } + 4020: [0-9a-f]* { s2a r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + 4028: [0-9a-f]* { s2a r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + 4030: [0-9a-f]* { tblidxb1 r5, r6 ; s2a r15, r16, r17 ; lh r25, r26 } + 4038: [0-9a-f]* { s2a r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 } + 4040: [0-9a-f]* { s2a r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 } + 4048: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 } + 4050: [0-9a-f]* { s3a r15, r16, r17 ; shl r5, r6, r7 ; lh r25, r26 } + 4058: [0-9a-f]* { s3a r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + 4060: [0-9a-f]* { s3a r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 } + 4068: [0-9a-f]* { seq r15, r16, r17 ; and r5, r6, r7 ; lh r25, r26 } + 4070: [0-9a-f]* { mvnz r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 } + 4078: [0-9a-f]* { seq r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 } + 4080: [0-9a-f]* { seq r5, r6, r7 ; ill ; lh r25, r26 } + 4088: [0-9a-f]* { seq r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 } + 4090: [0-9a-f]* { ctz r5, r6 ; seqi r15, r16, 5 ; lh r25, r26 } + 4098: [0-9a-f]* { seqi r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 } + 40a0: [0-9a-f]* { seqi r15, r16, 5 ; sne r5, r6, r7 ; lh r25, r26 } + 40a8: [0-9a-f]* { seqi r5, r6, 5 ; mz r15, r16, r17 ; lh r25, r26 } + 40b0: [0-9a-f]* { seqi r5, r6, 5 ; slti r15, r16, 5 ; lh r25, r26 } + 40b8: [0-9a-f]* { shl r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + 40c0: [0-9a-f]* { shl r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + 40c8: [0-9a-f]* { tblidxb1 r5, r6 ; shl r15, r16, r17 ; lh r25, r26 } + 40d0: [0-9a-f]* { shl r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 } + 40d8: [0-9a-f]* { shl r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 } + 40e0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; shli r15, r16, 5 ; lh r25, r26 } + 40e8: [0-9a-f]* { shli r15, r16, 5 ; shl r5, r6, r7 ; lh r25, r26 } + 40f0: [0-9a-f]* { shli r5, r6, 5 ; add r15, r16, r17 ; lh r25, r26 } + 40f8: [0-9a-f]* { shli r5, r6, 5 ; seq r15, r16, r17 ; lh r25, r26 } + 4100: [0-9a-f]* { shr r15, r16, r17 ; and r5, r6, r7 ; lh r25, r26 } + 4108: [0-9a-f]* { mvnz r5, r6, r7 ; shr r15, r16, r17 ; lh r25, r26 } + 4110: [0-9a-f]* { shr r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 } + 4118: [0-9a-f]* { shr r5, r6, r7 ; ill ; lh r25, r26 } + 4120: [0-9a-f]* { shr r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 } + 4128: [0-9a-f]* { ctz r5, r6 ; shri r15, r16, 5 ; lh r25, r26 } + 4130: [0-9a-f]* { shri r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 } + 4138: [0-9a-f]* { shri r15, r16, 5 ; sne r5, r6, r7 ; lh r25, r26 } + 4140: [0-9a-f]* { shri r5, r6, 5 ; mz r15, r16, r17 ; lh r25, r26 } + 4148: [0-9a-f]* { shri r5, r6, 5 ; slti r15, r16, 5 ; lh r25, r26 } + 4150: [0-9a-f]* { slt r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + 4158: [0-9a-f]* { slt r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + 4160: [0-9a-f]* { tblidxb1 r5, r6 ; slt r15, r16, r17 ; lh r25, r26 } + 4168: [0-9a-f]* { slt r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 } + 4170: [0-9a-f]* { slt r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 } + 4178: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 } + 4180: [0-9a-f]* { slt_u r15, r16, r17 ; shl r5, r6, r7 ; lh r25, r26 } + 4188: [0-9a-f]* { slt_u r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + 4190: [0-9a-f]* { slt_u r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 } + 4198: [0-9a-f]* { slte r15, r16, r17 ; and r5, r6, r7 ; lh r25, r26 } + 41a0: [0-9a-f]* { mvnz r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 } + 41a8: [0-9a-f]* { slte r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 } + 41b0: [0-9a-f]* { slte r5, r6, r7 ; ill ; lh r25, r26 } + 41b8: [0-9a-f]* { slte r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 } + 41c0: [0-9a-f]* { ctz r5, r6 ; slte_u r15, r16, r17 ; lh r25, r26 } + 41c8: [0-9a-f]* { slte_u r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + 41d0: [0-9a-f]* { slte_u r15, r16, r17 ; sne r5, r6, r7 ; lh r25, r26 } + 41d8: [0-9a-f]* { slte_u r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + 41e0: [0-9a-f]* { slte_u r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 } + 41e8: [0-9a-f]* { slti r15, r16, 5 ; movei r5, 5 ; lh r25, r26 } + 41f0: [0-9a-f]* { slti r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 } + 41f8: [0-9a-f]* { tblidxb1 r5, r6 ; slti r15, r16, 5 ; lh r25, r26 } + 4200: [0-9a-f]* { slti r5, r6, 5 ; rl r15, r16, r17 ; lh r25, r26 } + 4208: [0-9a-f]* { slti r5, r6, 5 ; sub r15, r16, r17 ; lh r25, r26 } + 4210: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 } + 4218: [0-9a-f]* { slti_u r15, r16, 5 ; shl r5, r6, r7 ; lh r25, r26 } + 4220: [0-9a-f]* { slti_u r5, r6, 5 ; add r15, r16, r17 ; lh r25, r26 } + 4228: [0-9a-f]* { slti_u r5, r6, 5 ; seq r15, r16, r17 ; lh r25, r26 } + 4230: [0-9a-f]* { sne r15, r16, r17 ; and r5, r6, r7 ; lh r25, r26 } + 4238: [0-9a-f]* { mvnz r5, r6, r7 ; sne r15, r16, r17 ; lh r25, r26 } + 4240: [0-9a-f]* { sne r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 } + 4248: [0-9a-f]* { sne r5, r6, r7 ; ill ; lh r25, r26 } + 4250: [0-9a-f]* { sne r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 } + 4258: [0-9a-f]* { ctz r5, r6 ; sra r15, r16, r17 ; lh r25, r26 } + 4260: [0-9a-f]* { sra r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + 4268: [0-9a-f]* { sra r15, r16, r17 ; sne r5, r6, r7 ; lh r25, r26 } + 4270: [0-9a-f]* { sra r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + 4278: [0-9a-f]* { sra r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 } + 4280: [0-9a-f]* { srai r15, r16, 5 ; movei r5, 5 ; lh r25, r26 } + 4288: [0-9a-f]* { srai r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 } + 4290: [0-9a-f]* { tblidxb1 r5, r6 ; srai r15, r16, 5 ; lh r25, r26 } + 4298: [0-9a-f]* { srai r5, r6, 5 ; rl r15, r16, r17 ; lh r25, r26 } + 42a0: [0-9a-f]* { srai r5, r6, 5 ; sub r15, r16, r17 ; lh r25, r26 } + 42a8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 } + 42b0: [0-9a-f]* { sub r15, r16, r17 ; shl r5, r6, r7 ; lh r25, r26 } + 42b8: [0-9a-f]* { sub r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + 42c0: [0-9a-f]* { sub r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 } + 42c8: [0-9a-f]* { tblidxb0 r5, r6 ; and r15, r16, r17 ; lh r25, r26 } + 42d0: [0-9a-f]* { tblidxb0 r5, r6 ; shl r15, r16, r17 ; lh r25, r26 } + 42d8: [0-9a-f]* { tblidxb1 r5, r6 ; lh r25, r26 } + 42e0: [0-9a-f]* { tblidxb1 r5, r6 ; shr r15, r16, r17 ; lh r25, r26 } + 42e8: [0-9a-f]* { tblidxb2 r5, r6 ; info 19 ; lh r25, r26 } + 42f0: [0-9a-f]* { tblidxb2 r5, r6 ; slt r15, r16, r17 ; lh r25, r26 } + 42f8: [0-9a-f]* { tblidxb3 r5, r6 ; move r15, r16 ; lh r25, r26 } + 4300: [0-9a-f]* { tblidxb3 r5, r6 ; slte r15, r16, r17 ; lh r25, r26 } + 4308: [0-9a-f]* { xor r15, r16, r17 ; mnz r5, r6, r7 ; lh r25, r26 } + 4310: [0-9a-f]* { xor r15, r16, r17 ; rl r5, r6, r7 ; lh r25, r26 } + 4318: [0-9a-f]* { xor r15, r16, r17 ; sub r5, r6, r7 ; lh r25, r26 } + 4320: [0-9a-f]* { xor r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + 4328: [0-9a-f]* { xor r5, r6, r7 ; sra r15, r16, r17 ; lh r25, r26 } + 4330: [0-9a-f]* { auli r5, r6, 4660 ; lh_u r15, r16 } + 4338: [0-9a-f]* { maxih r5, r6, 5 ; lh_u r15, r16 } + 4340: [0-9a-f]* { mulhl_ss r5, r6, r7 ; lh_u r15, r16 } + 4348: [0-9a-f]* { mzh r5, r6, r7 ; lh_u r15, r16 } + 4350: [0-9a-f]* { sadh_u r5, r6, r7 ; lh_u r15, r16 } + 4358: [0-9a-f]* { slt_u r5, r6, r7 ; lh_u r15, r16 } + 4360: [0-9a-f]* { sra r5, r6, r7 ; lh_u r15, r16 } + 4368: [0-9a-f]* { add r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 } + 4370: [0-9a-f]* { mvnz r5, r6, r7 ; add r15, r16, r17 ; lh_u r25, r26 } + 4378: [0-9a-f]* { add r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 } + 4380: [0-9a-f]* { add r5, r6, r7 ; ill ; lh_u r25, r26 } + 4388: [0-9a-f]* { add r5, r6, r7 ; shri r15, r16, 5 ; lh_u r25, r26 } + 4390: [0-9a-f]* { ctz r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 } + 4398: [0-9a-f]* { addi r15, r16, 5 ; or r5, r6, r7 ; lh_u r25, r26 } + 43a0: [0-9a-f]* { addi r15, r16, 5 ; sne r5, r6, r7 ; lh_u r25, r26 } + 43a8: [0-9a-f]* { addi r5, r6, 5 ; mz r15, r16, r17 ; lh_u r25, r26 } + 43b0: [0-9a-f]* { addi r5, r6, 5 ; slti r15, r16, 5 ; lh_u r25, r26 } + 43b8: [0-9a-f]* { and r15, r16, r17 ; movei r5, 5 ; lh_u r25, r26 } + 43c0: [0-9a-f]* { and r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 } + 43c8: [0-9a-f]* { tblidxb1 r5, r6 ; and r15, r16, r17 ; lh_u r25, r26 } + 43d0: [0-9a-f]* { and r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 } + 43d8: [0-9a-f]* { and r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 } + 43e0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + 43e8: [0-9a-f]* { andi r15, r16, 5 ; shl r5, r6, r7 ; lh_u r25, r26 } + 43f0: [0-9a-f]* { andi r5, r6, 5 ; add r15, r16, r17 ; lh_u r25, r26 } + 43f8: [0-9a-f]* { andi r5, r6, 5 ; seq r15, r16, r17 ; lh_u r25, r26 } + 4400: [0-9a-f]* { bitx r5, r6 ; and r15, r16, r17 ; lh_u r25, r26 } + 4408: [0-9a-f]* { bitx r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 } + 4410: [0-9a-f]* { bytex r5, r6 ; lh_u r25, r26 } + 4418: [0-9a-f]* { bytex r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 } + 4420: [0-9a-f]* { clz r5, r6 ; info 19 ; lh_u r25, r26 } + 4428: [0-9a-f]* { clz r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 } + 4430: [0-9a-f]* { ctz r5, r6 ; move r15, r16 ; lh_u r25, r26 } + 4438: [0-9a-f]* { ctz r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 } + 4440: [0-9a-f]* { clz r5, r6 ; lh_u r25, r26 } + 4448: [0-9a-f]* { mvnz r5, r6, r7 ; lh_u r25, r26 } + 4450: [0-9a-f]* { s3a r15, r16, r17 ; lh_u r25, r26 } + 4458: [0-9a-f]* { slte_u r15, r16, r17 ; lh_u r25, r26 } + 4460: [0-9a-f]* { lh_u r25, r26 } + 4468: [0-9a-f]* { mulll_uu r5, r6, r7 ; ill ; lh_u r25, r26 } + 4470: [0-9a-f]* { shr r5, r6, r7 ; ill ; lh_u r25, r26 } + 4478: [0-9a-f]* { info 19 ; addi r15, r16, 5 ; lh_u r25, r26 } + 4480: [0-9a-f]* { mulhh_uu r5, r6, r7 ; info 19 ; lh_u r25, r26 } + 4488: [0-9a-f]* { info 19 ; rl r15, r16, r17 ; lh_u r25, r26 } + 4490: [0-9a-f]* { info 19 ; shri r15, r16, 5 ; lh_u r25, r26 } + 4498: [0-9a-f]* { info 19 ; sub r15, r16, r17 ; lh_u r25, r26 } + 44a0: [0-9a-f]* { mnz r15, r16, r17 ; move r5, r6 ; lh_u r25, r26 } + 44a8: [0-9a-f]* { mnz r15, r16, r17 ; rli r5, r6, 5 ; lh_u r25, r26 } + 44b0: [0-9a-f]* { tblidxb0 r5, r6 ; mnz r15, r16, r17 ; lh_u r25, r26 } + 44b8: [0-9a-f]* { mnz r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 } + 44c0: [0-9a-f]* { mnz r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 } + 44c8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 } + 44d0: [0-9a-f]* { move r15, r16 ; seqi r5, r6, 5 ; lh_u r25, r26 } + 44d8: [0-9a-f]* { move r15, r16 ; lh_u r25, r26 } + 44e0: [0-9a-f]* { move r5, r6 ; s3a r15, r16, r17 ; lh_u r25, r26 } + 44e8: [0-9a-f]* { movei r15, 5 ; addi r5, r6, 5 ; lh_u r25, r26 } + 44f0: [0-9a-f]* { mullla_uu r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 } + 44f8: [0-9a-f]* { movei r15, 5 ; slt r5, r6, r7 ; lh_u r25, r26 } + 4500: [0-9a-f]* { movei r5, 5 ; lh_u r25, r26 } + 4508: [0-9a-f]* { movei r5, 5 ; shr r15, r16, r17 ; lh_u r25, r26 } + 4510: [0-9a-f]* { mulhh_ss r5, r6, r7 ; info 19 ; lh_u r25, r26 } + 4518: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slt r15, r16, r17 ; lh_u r25, r26 } + 4520: [0-9a-f]* { mulhh_uu r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 } + 4528: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slte r15, r16, r17 ; lh_u r25, r26 } + 4530: [0-9a-f]* { mulhha_ss r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 } + 4538: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 } + 4540: [0-9a-f]* { mulhha_uu r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + 4548: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 } + 4550: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 } + 4558: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 } + 4560: [0-9a-f]* { mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lh_u r25, r26 } + 4568: [0-9a-f]* { mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + 4570: [0-9a-f]* { mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 } + 4578: [0-9a-f]* { mullla_ss r5, r6, r7 ; add r15, r16, r17 ; lh_u r25, r26 } + 4580: [0-9a-f]* { mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; lh_u r25, r26 } + 4588: [0-9a-f]* { mullla_uu r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + 4590: [0-9a-f]* { mullla_uu r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 } + 4598: [0-9a-f]* { mvnz r5, r6, r7 ; lh_u r25, r26 } + 45a0: [0-9a-f]* { mvnz r5, r6, r7 ; shr r15, r16, r17 ; lh_u r25, r26 } + 45a8: [0-9a-f]* { mvz r5, r6, r7 ; info 19 ; lh_u r25, r26 } + 45b0: [0-9a-f]* { mvz r5, r6, r7 ; slt r15, r16, r17 ; lh_u r25, r26 } + 45b8: [0-9a-f]* { mz r15, r16, r17 ; lh_u r25, r26 } + 45c0: [0-9a-f]* { mz r15, r16, r17 ; ori r5, r6, 5 ; lh_u r25, r26 } + 45c8: [0-9a-f]* { mz r15, r16, r17 ; sra r5, r6, r7 ; lh_u r25, r26 } + 45d0: [0-9a-f]* { mz r5, r6, r7 ; nop ; lh_u r25, r26 } + 45d8: [0-9a-f]* { mz r5, r6, r7 ; slti_u r15, r16, 5 ; lh_u r25, r26 } + 45e0: [0-9a-f]* { nop ; ill ; lh_u r25, r26 } + 45e8: [0-9a-f]* { nop ; mz r5, r6, r7 ; lh_u r25, r26 } + 45f0: [0-9a-f]* { nop ; seq r5, r6, r7 ; lh_u r25, r26 } + 45f8: [0-9a-f]* { nop ; slti r5, r6, 5 ; lh_u r25, r26 } + 4600: [0-9a-f]* { nor r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 } + 4608: [0-9a-f]* { mvnz r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + 4610: [0-9a-f]* { nor r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 } + 4618: [0-9a-f]* { nor r5, r6, r7 ; ill ; lh_u r25, r26 } + 4620: [0-9a-f]* { nor r5, r6, r7 ; shri r15, r16, 5 ; lh_u r25, r26 } + 4628: [0-9a-f]* { ctz r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 } + 4630: [0-9a-f]* { or r15, r16, r17 ; or r5, r6, r7 ; lh_u r25, r26 } + 4638: [0-9a-f]* { or r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 } + 4640: [0-9a-f]* { or r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 } + 4648: [0-9a-f]* { or r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 } + 4650: [0-9a-f]* { ori r15, r16, 5 ; movei r5, 5 ; lh_u r25, r26 } + 4658: [0-9a-f]* { ori r15, r16, 5 ; s1a r5, r6, r7 ; lh_u r25, r26 } + 4660: [0-9a-f]* { tblidxb1 r5, r6 ; ori r15, r16, 5 ; lh_u r25, r26 } + 4668: [0-9a-f]* { ori r5, r6, 5 ; rl r15, r16, r17 ; lh_u r25, r26 } + 4670: [0-9a-f]* { ori r5, r6, 5 ; sub r15, r16, r17 ; lh_u r25, r26 } + 4678: [0-9a-f]* { pcnt r5, r6 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 4680: [0-9a-f]* { pcnt r5, r6 ; lh_u r25, r26 } + 4688: [0-9a-f]* { mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 } + 4690: [0-9a-f]* { rl r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 } + 4698: [0-9a-f]* { rl r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + 46a0: [0-9a-f]* { rl r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 } + 46a8: [0-9a-f]* { bitx r5, r6 ; rli r15, r16, 5 ; lh_u r25, r26 } + 46b0: [0-9a-f]* { rli r15, r16, 5 ; mz r5, r6, r7 ; lh_u r25, r26 } + 46b8: [0-9a-f]* { rli r15, r16, 5 ; slte_u r5, r6, r7 ; lh_u r25, r26 } + 46c0: [0-9a-f]* { rli r5, r6, 5 ; mnz r15, r16, r17 ; lh_u r25, r26 } + 46c8: [0-9a-f]* { rli r5, r6, 5 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + 46d0: [0-9a-f]* { s1a r15, r16, r17 ; info 19 ; lh_u r25, r26 } + 46d8: [0-9a-f]* { pcnt r5, r6 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 46e0: [0-9a-f]* { s1a r15, r16, r17 ; srai r5, r6, 5 ; lh_u r25, r26 } + 46e8: [0-9a-f]* { s1a r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + 46f0: [0-9a-f]* { s1a r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 } + 46f8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 } + 4700: [0-9a-f]* { s2a r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 } + 4708: [0-9a-f]* { tblidxb3 r5, r6 ; s2a r15, r16, r17 ; lh_u r25, r26 } + 4710: [0-9a-f]* { s2a r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 4718: [0-9a-f]* { s2a r5, r6, r7 ; lh_u r25, r26 } + 4720: [0-9a-f]* { mulll_uu r5, r6, r7 ; s3a r15, r16, r17 ; lh_u r25, r26 } + 4728: [0-9a-f]* { s3a r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 } + 4730: [0-9a-f]* { s3a r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + 4738: [0-9a-f]* { s3a r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 } + 4740: [0-9a-f]* { bitx r5, r6 ; seq r15, r16, r17 ; lh_u r25, r26 } + 4748: [0-9a-f]* { seq r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 } + 4750: [0-9a-f]* { seq r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 } + 4758: [0-9a-f]* { seq r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 } + 4760: [0-9a-f]* { seq r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + 4768: [0-9a-f]* { seqi r15, r16, 5 ; info 19 ; lh_u r25, r26 } + 4770: [0-9a-f]* { pcnt r5, r6 ; seqi r15, r16, 5 ; lh_u r25, r26 } + 4778: [0-9a-f]* { seqi r15, r16, 5 ; srai r5, r6, 5 ; lh_u r25, r26 } + 4780: [0-9a-f]* { seqi r5, r6, 5 ; nor r15, r16, r17 ; lh_u r25, r26 } + 4788: [0-9a-f]* { seqi r5, r6, 5 ; sne r15, r16, r17 ; lh_u r25, r26 } + 4790: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 } + 4798: [0-9a-f]* { shl r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 } + 47a0: [0-9a-f]* { tblidxb3 r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 } + 47a8: [0-9a-f]* { shl r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 47b0: [0-9a-f]* { shl r5, r6, r7 ; lh_u r25, r26 } + 47b8: [0-9a-f]* { mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + 47c0: [0-9a-f]* { shli r15, r16, 5 ; shr r5, r6, r7 ; lh_u r25, r26 } + 47c8: [0-9a-f]* { shli r5, r6, 5 ; and r15, r16, r17 ; lh_u r25, r26 } + 47d0: [0-9a-f]* { shli r5, r6, 5 ; shl r15, r16, r17 ; lh_u r25, r26 } + 47d8: [0-9a-f]* { bitx r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 } + 47e0: [0-9a-f]* { shr r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 } + 47e8: [0-9a-f]* { shr r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 } + 47f0: [0-9a-f]* { shr r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 } + 47f8: [0-9a-f]* { shr r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + 4800: [0-9a-f]* { shri r15, r16, 5 ; info 19 ; lh_u r25, r26 } + 4808: [0-9a-f]* { pcnt r5, r6 ; shri r15, r16, 5 ; lh_u r25, r26 } + 4810: [0-9a-f]* { shri r15, r16, 5 ; srai r5, r6, 5 ; lh_u r25, r26 } + 4818: [0-9a-f]* { shri r5, r6, 5 ; nor r15, r16, r17 ; lh_u r25, r26 } + 4820: [0-9a-f]* { shri r5, r6, 5 ; sne r15, r16, r17 ; lh_u r25, r26 } + 4828: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slt r15, r16, r17 ; lh_u r25, r26 } + 4830: [0-9a-f]* { slt r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 } + 4838: [0-9a-f]* { tblidxb3 r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 } + 4840: [0-9a-f]* { slt r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 4848: [0-9a-f]* { slt r5, r6, r7 ; lh_u r25, r26 } + 4850: [0-9a-f]* { mulll_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + 4858: [0-9a-f]* { slt_u r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 } + 4860: [0-9a-f]* { slt_u r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + 4868: [0-9a-f]* { slt_u r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 } + 4870: [0-9a-f]* { bitx r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 } + 4878: [0-9a-f]* { slte r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 } + 4880: [0-9a-f]* { slte r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 } + 4888: [0-9a-f]* { slte r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 } + 4890: [0-9a-f]* { slte r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + 4898: [0-9a-f]* { slte_u r15, r16, r17 ; info 19 ; lh_u r25, r26 } + 48a0: [0-9a-f]* { pcnt r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + 48a8: [0-9a-f]* { slte_u r15, r16, r17 ; srai r5, r6, 5 ; lh_u r25, r26 } + 48b0: [0-9a-f]* { slte_u r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + 48b8: [0-9a-f]* { slte_u r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 } + 48c0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 } + 48c8: [0-9a-f]* { slti r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 } + 48d0: [0-9a-f]* { tblidxb3 r5, r6 ; slti r15, r16, 5 ; lh_u r25, r26 } + 48d8: [0-9a-f]* { slti r5, r6, 5 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 48e0: [0-9a-f]* { slti r5, r6, 5 ; lh_u r25, r26 } + 48e8: [0-9a-f]* { mulll_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lh_u r25, r26 } + 48f0: [0-9a-f]* { slti_u r15, r16, 5 ; shr r5, r6, r7 ; lh_u r25, r26 } + 48f8: [0-9a-f]* { slti_u r5, r6, 5 ; and r15, r16, r17 ; lh_u r25, r26 } + 4900: [0-9a-f]* { slti_u r5, r6, 5 ; shl r15, r16, r17 ; lh_u r25, r26 } + 4908: [0-9a-f]* { bitx r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 } + 4910: [0-9a-f]* { sne r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 } + 4918: [0-9a-f]* { sne r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 } + 4920: [0-9a-f]* { sne r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 } + 4928: [0-9a-f]* { sne r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + 4930: [0-9a-f]* { sra r15, r16, r17 ; info 19 ; lh_u r25, r26 } + 4938: [0-9a-f]* { pcnt r5, r6 ; sra r15, r16, r17 ; lh_u r25, r26 } + 4940: [0-9a-f]* { sra r15, r16, r17 ; srai r5, r6, 5 ; lh_u r25, r26 } + 4948: [0-9a-f]* { sra r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + 4950: [0-9a-f]* { sra r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 } + 4958: [0-9a-f]* { mulhh_uu r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 } + 4960: [0-9a-f]* { srai r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 } + 4968: [0-9a-f]* { tblidxb3 r5, r6 ; srai r15, r16, 5 ; lh_u r25, r26 } + 4970: [0-9a-f]* { srai r5, r6, 5 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 4978: [0-9a-f]* { srai r5, r6, 5 ; lh_u r25, r26 } + 4980: [0-9a-f]* { mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 } + 4988: [0-9a-f]* { sub r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 } + 4990: [0-9a-f]* { sub r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + 4998: [0-9a-f]* { sub r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 } + 49a0: [0-9a-f]* { tblidxb0 r5, r6 ; lh_u r25, r26 } + 49a8: [0-9a-f]* { tblidxb0 r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 } + 49b0: [0-9a-f]* { tblidxb1 r5, r6 ; info 19 ; lh_u r25, r26 } + 49b8: [0-9a-f]* { tblidxb1 r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 } + 49c0: [0-9a-f]* { tblidxb2 r5, r6 ; move r15, r16 ; lh_u r25, r26 } + 49c8: [0-9a-f]* { tblidxb2 r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 } + 49d0: [0-9a-f]* { tblidxb3 r5, r6 ; mz r15, r16, r17 ; lh_u r25, r26 } + 49d8: [0-9a-f]* { tblidxb3 r5, r6 ; slti r15, r16, 5 ; lh_u r25, r26 } + 49e0: [0-9a-f]* { xor r15, r16, r17 ; movei r5, 5 ; lh_u r25, r26 } + 49e8: [0-9a-f]* { xor r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 } + 49f0: [0-9a-f]* { tblidxb1 r5, r6 ; xor r15, r16, r17 ; lh_u r25, r26 } + 49f8: [0-9a-f]* { xor r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 } + 4a00: [0-9a-f]* { xor r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 } + 4a08: [0-9a-f]* { avgh r5, r6, r7 ; lhadd r15, r16, 5 } + 4a10: [0-9a-f]* { minh r5, r6, r7 ; lhadd r15, r16, 5 } + 4a18: [0-9a-f]* { mulhl_us r5, r6, r7 ; lhadd r15, r16, 5 } + 4a20: [0-9a-f]* { nor r5, r6, r7 ; lhadd r15, r16, 5 } + 4a28: [0-9a-f]* { seqb r5, r6, r7 ; lhadd r15, r16, 5 } + 4a30: [0-9a-f]* { sltb_u r5, r6, r7 ; lhadd r15, r16, 5 } + 4a38: [0-9a-f]* { srah r5, r6, r7 ; lhadd r15, r16, 5 } + 4a40: [0-9a-f]* { addhs r5, r6, r7 ; lhadd_u r15, r16, 5 } + 4a48: [0-9a-f]* { dword_align r5, r6, r7 ; lhadd_u r15, r16, 5 } + 4a50: [0-9a-f]* { move r5, r6 ; lhadd_u r15, r16, 5 } + 4a58: [0-9a-f]* { mulll_ss r5, r6, r7 ; lhadd_u r15, r16, 5 } + 4a60: [0-9a-f]* { pcnt r5, r6 ; lhadd_u r15, r16, 5 } + 4a68: [0-9a-f]* { shlh r5, r6, r7 ; lhadd_u r15, r16, 5 } + 4a70: [0-9a-f]* { slth r5, r6, r7 ; lhadd_u r15, r16, 5 } + 4a78: [0-9a-f]* { subh r5, r6, r7 ; lhadd_u r15, r16, 5 } + 4a80: [0-9a-f]* { adiffb_u r5, r6, r7 ; lnk r15 } + 4a88: [0-9a-f]* { intlh r5, r6, r7 ; lnk r15 } + 4a90: [0-9a-f]* { mulhha_ss r5, r6, r7 ; lnk r15 } + 4a98: [0-9a-f]* { mvnz r5, r6, r7 ; lnk r15 } + 4aa0: [0-9a-f]* { sadah r5, r6, r7 ; lnk r15 } + 4aa8: [0-9a-f]* { shri r5, r6, 5 ; lnk r15 } + 4ab0: [0-9a-f]* { sltih_u r5, r6, 5 ; lnk r15 } + 4ab8: [0-9a-f]* { xor r5, r6, r7 ; lnk r15 } + 4ac0: [0-9a-f]* { bitx r5, r6 ; lw r15, r16 } + 4ac8: [0-9a-f]* { minib_u r5, r6, 5 ; lw r15, r16 } + 4ad0: [0-9a-f]* { mulhl_uu r5, r6, r7 ; lw r15, r16 } + 4ad8: [0-9a-f]* { or r5, r6, r7 ; lw r15, r16 } + 4ae0: [0-9a-f]* { seqh r5, r6, r7 ; lw r15, r16 } + 4ae8: [0-9a-f]* { slte r5, r6, r7 ; lw r15, r16 } + 4af0: [0-9a-f]* { srai r5, r6, 5 ; lw r15, r16 } + 4af8: [0-9a-f]* { bytex r5, r6 ; add r15, r16, r17 ; lw r25, r26 } + 4b00: [0-9a-f]* { add r15, r16, r17 ; nop ; lw r25, r26 } + 4b08: [0-9a-f]* { add r15, r16, r17 ; slti r5, r6, 5 ; lw r25, r26 } + 4b10: [0-9a-f]* { add r5, r6, r7 ; move r15, r16 ; lw r25, r26 } + 4b18: [0-9a-f]* { add r5, r6, r7 ; slte r15, r16, r17 ; lw r25, r26 } + 4b20: [0-9a-f]* { addi r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 } + 4b28: [0-9a-f]* { addi r15, r16, 5 ; rl r5, r6, r7 ; lw r25, r26 } + 4b30: [0-9a-f]* { addi r15, r16, 5 ; sub r5, r6, r7 ; lw r25, r26 } + 4b38: [0-9a-f]* { addi r5, r6, 5 ; or r15, r16, r17 ; lw r25, r26 } + 4b40: [0-9a-f]* { addi r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 } + 4b48: [0-9a-f]* { mulhha_ss r5, r6, r7 ; and r15, r16, r17 ; lw r25, r26 } + 4b50: [0-9a-f]* { and r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 } + 4b58: [0-9a-f]* { and r15, r16, r17 ; xor r5, r6, r7 ; lw r25, r26 } + 4b60: [0-9a-f]* { and r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + 4b68: [0-9a-f]* { andi r15, r16, 5 ; add r5, r6, r7 ; lw r25, r26 } + 4b70: [0-9a-f]* { mullla_ss r5, r6, r7 ; andi r15, r16, 5 ; lw r25, r26 } + 4b78: [0-9a-f]* { andi r15, r16, 5 ; shri r5, r6, 5 ; lw r25, r26 } + 4b80: [0-9a-f]* { andi r5, r6, 5 ; andi r15, r16, 5 ; lw r25, r26 } + 4b88: [0-9a-f]* { andi r5, r6, 5 ; shli r15, r16, 5 ; lw r25, r26 } + 4b90: [0-9a-f]* { bitx r5, r6 ; ill ; lw r25, r26 } + 4b98: [0-9a-f]* { bitx r5, r6 ; shri r15, r16, 5 ; lw r25, r26 } + 4ba0: [0-9a-f]* { bytex r5, r6 ; mnz r15, r16, r17 ; lw r25, r26 } + 4ba8: [0-9a-f]* { bytex r5, r6 ; slt_u r15, r16, r17 ; lw r25, r26 } + 4bb0: [0-9a-f]* { clz r5, r6 ; movei r15, 5 ; lw r25, r26 } + 4bb8: [0-9a-f]* { clz r5, r6 ; slte_u r15, r16, r17 ; lw r25, r26 } + 4bc0: [0-9a-f]* { ctz r5, r6 ; nop ; lw r25, r26 } + 4bc8: [0-9a-f]* { ctz r5, r6 ; slti_u r15, r16, 5 ; lw r25, r26 } + 4bd0: [0-9a-f]* { ill ; lw r25, r26 } + 4bd8: [0-9a-f]* { mz r5, r6, r7 ; lw r25, r26 } + 4be0: [0-9a-f]* { seq r5, r6, r7 ; lw r25, r26 } + 4be8: [0-9a-f]* { slti r5, r6, 5 ; lw r25, r26 } + 4bf0: [0-9a-f]* { and r5, r6, r7 ; ill ; lw r25, r26 } + 4bf8: [0-9a-f]* { mvnz r5, r6, r7 ; ill ; lw r25, r26 } + 4c00: [0-9a-f]* { slt_u r5, r6, r7 ; ill ; lw r25, r26 } + 4c08: [0-9a-f]* { info 19 ; and r5, r6, r7 ; lw r25, r26 } + 4c10: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; info 19 ; lw r25, r26 } + 4c18: [0-9a-f]* { info 19 ; rli r5, r6, 5 ; lw r25, r26 } + 4c20: [0-9a-f]* { info 19 ; slt r5, r6, r7 ; lw r25, r26 } + 4c28: [0-9a-f]* { tblidxb1 r5, r6 ; info 19 ; lw r25, r26 } + 4c30: [0-9a-f]* { mulhh_uu r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 } + 4c38: [0-9a-f]* { mnz r15, r16, r17 ; s3a r5, r6, r7 ; lw r25, r26 } + 4c40: [0-9a-f]* { tblidxb3 r5, r6 ; mnz r15, r16, r17 ; lw r25, r26 } + 4c48: [0-9a-f]* { mnz r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 } + 4c50: [0-9a-f]* { mnz r5, r6, r7 ; lw r25, r26 } + 4c58: [0-9a-f]* { mulll_uu r5, r6, r7 ; move r15, r16 ; lw r25, r26 } + 4c60: [0-9a-f]* { move r15, r16 ; shr r5, r6, r7 ; lw r25, r26 } + 4c68: [0-9a-f]* { move r5, r6 ; and r15, r16, r17 ; lw r25, r26 } + 4c70: [0-9a-f]* { move r5, r6 ; shl r15, r16, r17 ; lw r25, r26 } + 4c78: [0-9a-f]* { bitx r5, r6 ; movei r15, 5 ; lw r25, r26 } + 4c80: [0-9a-f]* { movei r15, 5 ; mz r5, r6, r7 ; lw r25, r26 } + 4c88: [0-9a-f]* { movei r15, 5 ; slte_u r5, r6, r7 ; lw r25, r26 } + 4c90: [0-9a-f]* { movei r5, 5 ; mnz r15, r16, r17 ; lw r25, r26 } + 4c98: [0-9a-f]* { movei r5, 5 ; slt_u r15, r16, r17 ; lw r25, r26 } + 4ca0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; movei r15, 5 ; lw r25, r26 } + 4ca8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + 4cb0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; nop ; lw r25, r26 } + 4cb8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 } + 4cc0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 } + 4cc8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + 4cd0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + 4cd8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + 4ce0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 } + 4ce8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; lw r25, r26 } + 4cf0: [0-9a-f]* { mulll_ss r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 } + 4cf8: [0-9a-f]* { mulll_uu r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + 4d00: [0-9a-f]* { mulll_uu r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + 4d08: [0-9a-f]* { mullla_ss r5, r6, r7 ; andi r15, r16, 5 ; lw r25, r26 } + 4d10: [0-9a-f]* { mullla_ss r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + 4d18: [0-9a-f]* { mullla_uu r5, r6, r7 ; ill ; lw r25, r26 } + 4d20: [0-9a-f]* { mullla_uu r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + 4d28: [0-9a-f]* { mvnz r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 } + 4d30: [0-9a-f]* { mvnz r5, r6, r7 ; slt_u r15, r16, r17 ; lw r25, r26 } + 4d38: [0-9a-f]* { mvz r5, r6, r7 ; movei r15, 5 ; lw r25, r26 } + 4d40: [0-9a-f]* { mvz r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + 4d48: [0-9a-f]* { mz r15, r16, r17 ; move r5, r6 ; lw r25, r26 } + 4d50: [0-9a-f]* { mz r15, r16, r17 ; rli r5, r6, 5 ; lw r25, r26 } + 4d58: [0-9a-f]* { tblidxb0 r5, r6 ; mz r15, r16, r17 ; lw r25, r26 } + 4d60: [0-9a-f]* { mz r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + 4d68: [0-9a-f]* { mz r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 } + 4d70: [0-9a-f]* { nop ; mnz r5, r6, r7 ; lw r25, r26 } + 4d78: [0-9a-f]* { nop ; nor r5, r6, r7 ; lw r25, r26 } + 4d80: [0-9a-f]* { nop ; shl r15, r16, r17 ; lw r25, r26 } + 4d88: [0-9a-f]* { nop ; sne r15, r16, r17 ; lw r25, r26 } + 4d90: [0-9a-f]* { bytex r5, r6 ; nor r15, r16, r17 ; lw r25, r26 } + 4d98: [0-9a-f]* { nor r15, r16, r17 ; nop ; lw r25, r26 } + 4da0: [0-9a-f]* { nor r15, r16, r17 ; slti r5, r6, 5 ; lw r25, r26 } + 4da8: [0-9a-f]* { nor r5, r6, r7 ; move r15, r16 ; lw r25, r26 } + 4db0: [0-9a-f]* { nor r5, r6, r7 ; slte r15, r16, r17 ; lw r25, r26 } + 4db8: [0-9a-f]* { or r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 } + 4dc0: [0-9a-f]* { or r15, r16, r17 ; rl r5, r6, r7 ; lw r25, r26 } + 4dc8: [0-9a-f]* { or r15, r16, r17 ; sub r5, r6, r7 ; lw r25, r26 } + 4dd0: [0-9a-f]* { or r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 } + 4dd8: [0-9a-f]* { or r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + 4de0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + 4de8: [0-9a-f]* { ori r15, r16, 5 ; seq r5, r6, r7 ; lw r25, r26 } + 4df0: [0-9a-f]* { ori r15, r16, 5 ; xor r5, r6, r7 ; lw r25, r26 } + 4df8: [0-9a-f]* { ori r5, r6, 5 ; s2a r15, r16, r17 ; lw r25, r26 } + 4e00: [0-9a-f]* { pcnt r5, r6 ; add r15, r16, r17 ; lw r25, r26 } + 4e08: [0-9a-f]* { pcnt r5, r6 ; seq r15, r16, r17 ; lw r25, r26 } + 4e10: [0-9a-f]* { rl r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 } + 4e18: [0-9a-f]* { mvnz r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + 4e20: [0-9a-f]* { rl r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 } + 4e28: [0-9a-f]* { rl r5, r6, r7 ; ill ; lw r25, r26 } + 4e30: [0-9a-f]* { rl r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + 4e38: [0-9a-f]* { ctz r5, r6 ; rli r15, r16, 5 ; lw r25, r26 } + 4e40: [0-9a-f]* { rli r15, r16, 5 ; or r5, r6, r7 ; lw r25, r26 } + 4e48: [0-9a-f]* { rli r15, r16, 5 ; sne r5, r6, r7 ; lw r25, r26 } + 4e50: [0-9a-f]* { rli r5, r6, 5 ; mz r15, r16, r17 ; lw r25, r26 } + 4e58: [0-9a-f]* { rli r5, r6, 5 ; slti r15, r16, 5 ; lw r25, r26 } + 4e60: [0-9a-f]* { s1a r15, r16, r17 ; movei r5, 5 ; lw r25, r26 } + 4e68: [0-9a-f]* { s1a r15, r16, r17 ; s1a r5, r6, r7 ; lw r25, r26 } + 4e70: [0-9a-f]* { tblidxb1 r5, r6 ; s1a r15, r16, r17 ; lw r25, r26 } + 4e78: [0-9a-f]* { s1a r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + 4e80: [0-9a-f]* { s1a r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + 4e88: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + 4e90: [0-9a-f]* { s2a r15, r16, r17 ; shl r5, r6, r7 ; lw r25, r26 } + 4e98: [0-9a-f]* { s2a r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 } + 4ea0: [0-9a-f]* { s2a r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 } + 4ea8: [0-9a-f]* { s3a r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 } + 4eb0: [0-9a-f]* { mvnz r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 } + 4eb8: [0-9a-f]* { s3a r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 } + 4ec0: [0-9a-f]* { s3a r5, r6, r7 ; ill ; lw r25, r26 } + 4ec8: [0-9a-f]* { s3a r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + 4ed0: [0-9a-f]* { ctz r5, r6 ; seq r15, r16, r17 ; lw r25, r26 } + 4ed8: [0-9a-f]* { seq r15, r16, r17 ; or r5, r6, r7 ; lw r25, r26 } + 4ee0: [0-9a-f]* { seq r15, r16, r17 ; sne r5, r6, r7 ; lw r25, r26 } + 4ee8: [0-9a-f]* { seq r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 } + 4ef0: [0-9a-f]* { seq r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + 4ef8: [0-9a-f]* { seqi r15, r16, 5 ; movei r5, 5 ; lw r25, r26 } + 4f00: [0-9a-f]* { seqi r15, r16, 5 ; s1a r5, r6, r7 ; lw r25, r26 } + 4f08: [0-9a-f]* { tblidxb1 r5, r6 ; seqi r15, r16, 5 ; lw r25, r26 } + 4f10: [0-9a-f]* { seqi r5, r6, 5 ; rl r15, r16, r17 ; lw r25, r26 } + 4f18: [0-9a-f]* { seqi r5, r6, 5 ; sub r15, r16, r17 ; lw r25, r26 } + 4f20: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + 4f28: [0-9a-f]* { shl r15, r16, r17 ; shl r5, r6, r7 ; lw r25, r26 } + 4f30: [0-9a-f]* { shl r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 } + 4f38: [0-9a-f]* { shl r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 } + 4f40: [0-9a-f]* { shli r15, r16, 5 ; and r5, r6, r7 ; lw r25, r26 } + 4f48: [0-9a-f]* { mvnz r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + 4f50: [0-9a-f]* { shli r15, r16, 5 ; slt_u r5, r6, r7 ; lw r25, r26 } + 4f58: [0-9a-f]* { shli r5, r6, 5 ; ill ; lw r25, r26 } + 4f60: [0-9a-f]* { shli r5, r6, 5 ; shri r15, r16, 5 ; lw r25, r26 } + 4f68: [0-9a-f]* { ctz r5, r6 ; shr r15, r16, r17 ; lw r25, r26 } + 4f70: [0-9a-f]* { shr r15, r16, r17 ; or r5, r6, r7 ; lw r25, r26 } + 4f78: [0-9a-f]* { shr r15, r16, r17 ; sne r5, r6, r7 ; lw r25, r26 } + 4f80: [0-9a-f]* { shr r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 } + 4f88: [0-9a-f]* { shr r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + 4f90: [0-9a-f]* { shri r15, r16, 5 ; movei r5, 5 ; lw r25, r26 } + 4f98: [0-9a-f]* { shri r15, r16, 5 ; s1a r5, r6, r7 ; lw r25, r26 } + 4fa0: [0-9a-f]* { tblidxb1 r5, r6 ; shri r15, r16, 5 ; lw r25, r26 } + 4fa8: [0-9a-f]* { shri r5, r6, 5 ; rl r15, r16, r17 ; lw r25, r26 } + 4fb0: [0-9a-f]* { shri r5, r6, 5 ; sub r15, r16, r17 ; lw r25, r26 } + 4fb8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 } + 4fc0: [0-9a-f]* { slt r15, r16, r17 ; shl r5, r6, r7 ; lw r25, r26 } + 4fc8: [0-9a-f]* { slt r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 } + 4fd0: [0-9a-f]* { slt r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 } + 4fd8: [0-9a-f]* { slt_u r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 } + 4fe0: [0-9a-f]* { mvnz r5, r6, r7 ; slt_u r15, r16, r17 ; lw r25, r26 } + 4fe8: [0-9a-f]* { slt_u r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 } + 4ff0: [0-9a-f]* { slt_u r5, r6, r7 ; ill ; lw r25, r26 } + 4ff8: [0-9a-f]* { slt_u r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + 5000: [0-9a-f]* { ctz r5, r6 ; slte r15, r16, r17 ; lw r25, r26 } + 5008: [0-9a-f]* { slte r15, r16, r17 ; or r5, r6, r7 ; lw r25, r26 } + 5010: [0-9a-f]* { slte r15, r16, r17 ; sne r5, r6, r7 ; lw r25, r26 } + 5018: [0-9a-f]* { slte r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 } + 5020: [0-9a-f]* { slte r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + 5028: [0-9a-f]* { slte_u r15, r16, r17 ; movei r5, 5 ; lw r25, r26 } + 5030: [0-9a-f]* { slte_u r15, r16, r17 ; s1a r5, r6, r7 ; lw r25, r26 } + 5038: [0-9a-f]* { tblidxb1 r5, r6 ; slte_u r15, r16, r17 ; lw r25, r26 } + 5040: [0-9a-f]* { slte_u r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + 5048: [0-9a-f]* { slte_u r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + 5050: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + 5058: [0-9a-f]* { slti r15, r16, 5 ; shl r5, r6, r7 ; lw r25, r26 } + 5060: [0-9a-f]* { slti r5, r6, 5 ; add r15, r16, r17 ; lw r25, r26 } + 5068: [0-9a-f]* { slti r5, r6, 5 ; seq r15, r16, r17 ; lw r25, r26 } + 5070: [0-9a-f]* { slti_u r15, r16, 5 ; and r5, r6, r7 ; lw r25, r26 } + 5078: [0-9a-f]* { mvnz r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 } + 5080: [0-9a-f]* { slti_u r15, r16, 5 ; slt_u r5, r6, r7 ; lw r25, r26 } + 5088: [0-9a-f]* { slti_u r5, r6, 5 ; ill ; lw r25, r26 } + 5090: [0-9a-f]* { slti_u r5, r6, 5 ; shri r15, r16, 5 ; lw r25, r26 } + 5098: [0-9a-f]* { ctz r5, r6 ; sne r15, r16, r17 ; lw r25, r26 } + 50a0: [0-9a-f]* { sne r15, r16, r17 ; or r5, r6, r7 ; lw r25, r26 } + 50a8: [0-9a-f]* { sne r15, r16, r17 ; sne r5, r6, r7 ; lw r25, r26 } + 50b0: [0-9a-f]* { sne r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 } + 50b8: [0-9a-f]* { sne r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + 50c0: [0-9a-f]* { sra r15, r16, r17 ; movei r5, 5 ; lw r25, r26 } + 50c8: [0-9a-f]* { sra r15, r16, r17 ; s1a r5, r6, r7 ; lw r25, r26 } + 50d0: [0-9a-f]* { tblidxb1 r5, r6 ; sra r15, r16, r17 ; lw r25, r26 } + 50d8: [0-9a-f]* { sra r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + 50e0: [0-9a-f]* { sra r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + 50e8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 } + 50f0: [0-9a-f]* { srai r15, r16, 5 ; shl r5, r6, r7 ; lw r25, r26 } + 50f8: [0-9a-f]* { srai r5, r6, 5 ; add r15, r16, r17 ; lw r25, r26 } + 5100: [0-9a-f]* { srai r5, r6, 5 ; seq r15, r16, r17 ; lw r25, r26 } + 5108: [0-9a-f]* { sub r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 } + 5110: [0-9a-f]* { mvnz r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + 5118: [0-9a-f]* { sub r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 } + 5120: [0-9a-f]* { sub r5, r6, r7 ; ill ; lw r25, r26 } + 5128: [0-9a-f]* { sub r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + 5130: [0-9a-f]* { tblidxb0 r5, r6 ; mnz r15, r16, r17 ; lw r25, r26 } + 5138: [0-9a-f]* { tblidxb0 r5, r6 ; slt_u r15, r16, r17 ; lw r25, r26 } + 5140: [0-9a-f]* { tblidxb1 r5, r6 ; movei r15, 5 ; lw r25, r26 } + 5148: [0-9a-f]* { tblidxb1 r5, r6 ; slte_u r15, r16, r17 ; lw r25, r26 } + 5150: [0-9a-f]* { tblidxb2 r5, r6 ; nop ; lw r25, r26 } + 5158: [0-9a-f]* { tblidxb2 r5, r6 ; slti_u r15, r16, 5 ; lw r25, r26 } + 5160: [0-9a-f]* { tblidxb3 r5, r6 ; or r15, r16, r17 ; lw r25, r26 } + 5168: [0-9a-f]* { tblidxb3 r5, r6 ; sra r15, r16, r17 ; lw r25, r26 } + 5170: [0-9a-f]* { mulhha_ss r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 } + 5178: [0-9a-f]* { xor r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 } + 5180: [0-9a-f]* { xor r15, r16, r17 ; xor r5, r6, r7 ; lw r25, r26 } + 5188: [0-9a-f]* { xor r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + 5190: [0-9a-f]* { add r5, r6, r7 ; lw_na r15, r16 } + 5198: [0-9a-f]* { clz r5, r6 ; lw_na r15, r16 } + 51a0: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; lw_na r15, r16 } + 51a8: [0-9a-f]* { mulhla_su r5, r6, r7 ; lw_na r15, r16 } + 51b0: [0-9a-f]* { packbs_u r5, r6, r7 ; lw_na r15, r16 } + 51b8: [0-9a-f]* { seqib r5, r6, 5 ; lw_na r15, r16 } + 51c0: [0-9a-f]* { slteb r5, r6, r7 ; lw_na r15, r16 } + 51c8: [0-9a-f]* { sraih r5, r6, 5 ; lw_na r15, r16 } + 51d0: [0-9a-f]* { addih r5, r6, 5 ; lwadd r15, r16, 5 } + 51d8: [0-9a-f]* { infol 4660 ; lwadd r15, r16, 5 } + 51e0: [0-9a-f]* { moveli.sn r5, 4660 ; lwadd r15, r16, 5 } + 51e8: [0-9a-f]* { mullla_ss r5, r6, r7 ; lwadd r15, r16, 5 } + 51f0: [0-9a-f]* { s1a r5, r6, r7 ; lwadd r15, r16, 5 } + 51f8: [0-9a-f]* { shlih r5, r6, 5 ; lwadd r15, r16, 5 } + 5200: [0-9a-f]* { slti_u r5, r6, 5 ; lwadd r15, r16, 5 } + 5208: [0-9a-f]* { tblidxb0 r5, r6 ; lwadd r15, r16, 5 } + 5210: [0-9a-f]* { andi r5, r6, 5 ; lwadd_na r15, r16, 5 } + 5218: [0-9a-f]* { maxib_u r5, r6, 5 ; lwadd_na r15, r16, 5 } + 5220: [0-9a-f]* { mulhhsa_uu r5, r6, r7 ; lwadd_na r15, r16, 5 } + 5228: [0-9a-f]* { mzb r5, r6, r7 ; lwadd_na r15, r16, 5 } + 5230: [0-9a-f]* { sadh r5, r6, r7 ; lwadd_na r15, r16, 5 } + 5238: [0-9a-f]* { slt r5, r6, r7 ; lwadd_na r15, r16, 5 } + 5240: [0-9a-f]* { sneh r5, r6, r7 ; lwadd_na r15, r16, 5 } + 5248: [0-9a-f]* { maxb_u r15, r16, r17 ; addb r5, r6, r7 } + 5250: [0-9a-f]* { crc32_32 r5, r6, r7 ; maxb_u r15, r16, r17 } + 5258: [0-9a-f]* { maxb_u r15, r16, r17 ; mnz r5, r6, r7 } + 5260: [0-9a-f]* { mulhla_us r5, r6, r7 ; maxb_u r15, r16, r17 } + 5268: [0-9a-f]* { maxb_u r15, r16, r17 ; packhb r5, r6, r7 } + 5270: [0-9a-f]* { maxb_u r15, r16, r17 ; seqih r5, r6, 5 } + 5278: [0-9a-f]* { maxb_u r15, r16, r17 ; slteb_u r5, r6, r7 } + 5280: [0-9a-f]* { maxb_u r15, r16, r17 ; sub r5, r6, r7 } + 5288: [0-9a-f]* { maxb_u r5, r6, r7 ; addli r15, r16, 4660 } + 5290: [0-9a-f]* { maxb_u r5, r6, r7 ; jalr r15 } + 5298: [0-9a-f]* { maxb_u r5, r6, r7 ; maxih r15, r16, 5 } + 52a0: [0-9a-f]* { maxb_u r5, r6, r7 ; nor r15, r16, r17 } + 52a8: [0-9a-f]* { maxb_u r5, r6, r7 ; seqib r15, r16, 5 } + 52b0: [0-9a-f]* { maxb_u r5, r6, r7 ; slte r15, r16, r17 } + 52b8: [0-9a-f]* { maxb_u r5, r6, r7 ; srai r15, r16, 5 } + 52c0: [0-9a-f]* { maxh r15, r16, r17 ; addi r5, r6, 5 } + 52c8: [0-9a-f]* { maxh r15, r16, r17 } + 52d0: [0-9a-f]* { maxh r15, r16, r17 ; movei r5, 5 } + 52d8: [0-9a-f]* { mulll_su r5, r6, r7 ; maxh r15, r16, r17 } + 52e0: [0-9a-f]* { maxh r15, r16, r17 ; rl r5, r6, r7 } + 52e8: [0-9a-f]* { maxh r15, r16, r17 ; shli r5, r6, 5 } + 52f0: [0-9a-f]* { maxh r15, r16, r17 ; slth_u r5, r6, r7 } + 52f8: [0-9a-f]* { maxh r15, r16, r17 ; subhs r5, r6, r7 } + 5300: [0-9a-f]* { maxh r5, r6, r7 ; andi r15, r16, 5 } + 5308: [0-9a-f]* { maxh r5, r6, r7 ; lb r15, r16 } + 5310: [0-9a-f]* { maxh r5, r6, r7 ; minh r15, r16, r17 } + 5318: [0-9a-f]* { maxh r5, r6, r7 ; packhb r15, r16, r17 } + 5320: [0-9a-f]* { maxh r5, r6, r7 ; shl r15, r16, r17 } + 5328: [0-9a-f]* { maxh r5, r6, r7 ; slteh r15, r16, r17 } + 5330: [0-9a-f]* { maxh r5, r6, r7 ; subb r15, r16, r17 } + 5338: [0-9a-f]* { maxib_u r15, r16, 5 ; addli.sn r5, r6, 4660 } + 5340: [0-9a-f]* { maxib_u r15, r16, 5 ; inthh r5, r6, r7 } + 5348: [0-9a-f]* { mulhh_su r5, r6, r7 ; maxib_u r15, r16, 5 } + 5350: [0-9a-f]* { mullla_uu r5, r6, r7 ; maxib_u r15, r16, 5 } + 5358: [0-9a-f]* { maxib_u r15, r16, 5 ; s3a r5, r6, r7 } + 5360: [0-9a-f]* { maxib_u r15, r16, 5 ; shrb r5, r6, r7 } + 5368: [0-9a-f]* { maxib_u r15, r16, 5 ; sltib_u r5, r6, 5 } + 5370: [0-9a-f]* { tblidxb2 r5, r6 ; maxib_u r15, r16, 5 } + 5378: [0-9a-f]* { maxib_u r5, r6, 5 ; flush r15 } + 5380: [0-9a-f]* { maxib_u r5, r6, 5 ; lh r15, r16 } + 5388: [0-9a-f]* { maxib_u r5, r6, 5 ; mnz r15, r16, r17 } + 5390: [0-9a-f]* { maxib_u r5, r6, 5 ; raise } + 5398: [0-9a-f]* { maxib_u r5, r6, 5 ; shlib r15, r16, 5 } + 53a0: [0-9a-f]* { maxib_u r5, r6, 5 ; slti r15, r16, 5 } + 53a8: [0-9a-f]* { maxib_u r5, r6, 5 ; subs r15, r16, r17 } + 53b0: [0-9a-f]* { maxih r15, r16, 5 ; and r5, r6, r7 } + 53b8: [0-9a-f]* { maxih r15, r16, 5 ; maxh r5, r6, r7 } + 53c0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; maxih r15, r16, 5 } + 53c8: [0-9a-f]* { maxih r15, r16, 5 ; mz r5, r6, r7 } + 53d0: [0-9a-f]* { sadb_u r5, r6, r7 ; maxih r15, r16, 5 } + 53d8: [0-9a-f]* { maxih r15, r16, 5 ; shrih r5, r6, 5 } + 53e0: [0-9a-f]* { maxih r15, r16, 5 ; sneb r5, r6, r7 } + 53e8: [0-9a-f]* { maxih r5, r6, 5 ; add r15, r16, r17 } + 53f0: [0-9a-f]* { maxih r5, r6, 5 ; info 19 } + 53f8: [0-9a-f]* { maxih r5, r6, 5 ; lnk r15 } + 5400: [0-9a-f]* { maxih r5, r6, 5 ; movei r15, 5 } + 5408: [0-9a-f]* { maxih r5, r6, 5 ; s2a r15, r16, r17 } + 5410: [0-9a-f]* { maxih r5, r6, 5 ; shrh r15, r16, r17 } + 5418: [0-9a-f]* { maxih r5, r6, 5 ; sltih r15, r16, 5 } + 5420: [0-9a-f]* { maxih r5, r6, 5 ; wh64 r15 } + 5428: [0-9a-f]* { avgh r5, r6, r7 ; mf } + 5430: [0-9a-f]* { minh r5, r6, r7 ; mf } + 5438: [0-9a-f]* { mulhl_us r5, r6, r7 ; mf } + 5440: [0-9a-f]* { nor r5, r6, r7 ; mf } + 5448: [0-9a-f]* { seqb r5, r6, r7 ; mf } + 5450: [0-9a-f]* { sltb_u r5, r6, r7 ; mf } + 5458: [0-9a-f]* { srah r5, r6, r7 ; mf } + 5460: [0-9a-f]* { addhs r5, r6, r7 ; mfspr r16, 5 } + 5468: [0-9a-f]* { dword_align r5, r6, r7 ; mfspr r16, 5 } + 5470: [0-9a-f]* { move r5, r6 ; mfspr r16, 5 } + 5478: [0-9a-f]* { mulll_ss r5, r6, r7 ; mfspr r16, 5 } + 5480: [0-9a-f]* { pcnt r5, r6 ; mfspr r16, 5 } + 5488: [0-9a-f]* { shlh r5, r6, r7 ; mfspr r16, 5 } + 5490: [0-9a-f]* { slth r5, r6, r7 ; mfspr r16, 5 } + 5498: [0-9a-f]* { subh r5, r6, r7 ; mfspr r16, 5 } + 54a0: [0-9a-f]* { adiffb_u r5, r6, r7 ; minb_u r15, r16, r17 } + 54a8: [0-9a-f]* { minb_u r15, r16, r17 ; intlh r5, r6, r7 } + 54b0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; minb_u r15, r16, r17 } + 54b8: [0-9a-f]* { mvnz r5, r6, r7 ; minb_u r15, r16, r17 } + 54c0: [0-9a-f]* { sadah r5, r6, r7 ; minb_u r15, r16, r17 } + 54c8: [0-9a-f]* { minb_u r15, r16, r17 ; shri r5, r6, 5 } + 54d0: [0-9a-f]* { minb_u r15, r16, r17 ; sltih_u r5, r6, 5 } + 54d8: [0-9a-f]* { minb_u r15, r16, r17 ; xor r5, r6, r7 } + 54e0: [0-9a-f]* { minb_u r5, r6, r7 ; icoh r15 } + 54e8: [0-9a-f]* { minb_u r5, r6, r7 ; lhadd r15, r16, 5 } + 54f0: [0-9a-f]* { minb_u r5, r6, r7 ; mnzh r15, r16, r17 } + 54f8: [0-9a-f]* { minb_u r5, r6, r7 ; rli r15, r16, 5 } + 5500: [0-9a-f]* { minb_u r5, r6, r7 ; shr r15, r16, r17 } + 5508: [0-9a-f]* { minb_u r5, r6, r7 ; sltib r15, r16, 5 } + 5510: [0-9a-f]* { minb_u r5, r6, r7 ; swadd r15, r16, 5 } + 5518: [0-9a-f]* { minh r15, r16, r17 ; auli r5, r6, 4660 } + 5520: [0-9a-f]* { minh r15, r16, r17 ; maxih r5, r6, 5 } + 5528: [0-9a-f]* { mulhl_ss r5, r6, r7 ; minh r15, r16, r17 } + 5530: [0-9a-f]* { minh r15, r16, r17 ; mzh r5, r6, r7 } + 5538: [0-9a-f]* { sadh_u r5, r6, r7 ; minh r15, r16, r17 } + 5540: [0-9a-f]* { minh r15, r16, r17 ; slt_u r5, r6, r7 } + 5548: [0-9a-f]* { minh r15, r16, r17 ; sra r5, r6, r7 } + 5550: [0-9a-f]* { minh r5, r6, r7 ; addbs_u r15, r16, r17 } + 5558: [0-9a-f]* { minh r5, r6, r7 ; inthb r15, r16, r17 } + 5560: [0-9a-f]* { minh r5, r6, r7 ; lw_na r15, r16 } + 5568: [0-9a-f]* { minh r5, r6, r7 ; moveli.sn r15, 4660 } + 5570: [0-9a-f]* { minh r5, r6, r7 ; sb r15, r16 } + 5578: [0-9a-f]* { minh r5, r6, r7 ; shrib r15, r16, 5 } + 5580: [0-9a-f]* { minh r5, r6, r7 ; sne r15, r16, r17 } + 5588: [0-9a-f]* { minh r5, r6, r7 ; xori r15, r16, 5 } + 5590: [0-9a-f]* { bytex r5, r6 ; minib_u r15, r16, 5 } + 5598: [0-9a-f]* { minib_u r15, r16, 5 ; minih r5, r6, 5 } + 55a0: [0-9a-f]* { mulhla_ss r5, r6, r7 ; minib_u r15, r16, 5 } + 55a8: [0-9a-f]* { minib_u r15, r16, 5 ; ori r5, r6, 5 } + 55b0: [0-9a-f]* { minib_u r15, r16, 5 ; seqi r5, r6, 5 } + 55b8: [0-9a-f]* { minib_u r15, r16, 5 ; slte_u r5, r6, r7 } + 55c0: [0-9a-f]* { minib_u r15, r16, 5 ; sraib r5, r6, 5 } + 55c8: [0-9a-f]* { minib_u r5, r6, 5 ; addib r15, r16, 5 } + 55d0: [0-9a-f]* { minib_u r5, r6, 5 ; inv r15 } + 55d8: [0-9a-f]* { minib_u r5, r6, 5 ; maxh r15, r16, r17 } + 55e0: [0-9a-f]* { minib_u r5, r6, 5 ; mzh r15, r16, r17 } + 55e8: [0-9a-f]* { minib_u r5, r6, 5 ; seqh r15, r16, r17 } + 55f0: [0-9a-f]* { minib_u r5, r6, 5 ; sltb r15, r16, r17 } + 55f8: [0-9a-f]* { minib_u r5, r6, 5 ; srab r15, r16, r17 } + 5600: [0-9a-f]* { minih r15, r16, 5 ; addh r5, r6, r7 } + 5608: [0-9a-f]* { ctz r5, r6 ; minih r15, r16, 5 } + 5610: [0-9a-f]* { minih r15, r16, 5 ; mnzh r5, r6, r7 } + 5618: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; minih r15, r16, 5 } + 5620: [0-9a-f]* { minih r15, r16, 5 ; packlb r5, r6, r7 } + 5628: [0-9a-f]* { minih r15, r16, 5 ; shlb r5, r6, r7 } + 5630: [0-9a-f]* { minih r15, r16, 5 ; slteh_u r5, r6, r7 } + 5638: [0-9a-f]* { minih r15, r16, 5 ; subbs_u r5, r6, r7 } + 5640: [0-9a-f]* { minih r5, r6, 5 ; adds r15, r16, r17 } + 5648: [0-9a-f]* { minih r5, r6, 5 ; jr r15 } + 5650: [0-9a-f]* { minih r5, r6, 5 ; mfspr r16, 5 } + 5658: [0-9a-f]* { minih r5, r6, 5 ; ori r15, r16, 5 } + 5660: [0-9a-f]* { minih r5, r6, 5 ; sh r15, r16 } + 5668: [0-9a-f]* { minih r5, r6, 5 ; slteb r15, r16, r17 } + 5670: [0-9a-f]* { minih r5, r6, 5 ; sraih r15, r16, 5 } + 5678: [0-9a-f]* { mm r15, r16, r17, 5, 7 ; addih r5, r6, 5 } + 5680: [0-9a-f]* { mm r15, r16, r17, 5, 7 ; infol 4660 } + 5688: [0-9a-f]* { mm r15, r16, r17, 5, 7 ; moveli.sn r5, 4660 } + 5690: [0-9a-f]* { mullla_ss r5, r6, r7 ; mm r15, r16, r17, 5, 7 } + 5698: [0-9a-f]* { mm r15, r16, r17, 5, 7 ; s1a r5, r6, r7 } + 56a0: [0-9a-f]* { mm r15, r16, r17, 5, 7 ; shlih r5, r6, 5 } + 56a8: [0-9a-f]* { mm r15, r16, r17, 5, 7 ; slti_u r5, r6, 5 } + 56b0: [0-9a-f]* { tblidxb0 r5, r6 ; mm r15, r16, r17, 5, 7 } + 56b8: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; dtlbpr r15 } + 56c0: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; lbadd r15, r16, 5 } + 56c8: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; minih r15, r16, 5 } + 56d0: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; packlb r15, r16, r17 } + 56d8: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; shlh r15, r16, r17 } + 56e0: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; slth r15, r16, r17 } + 56e8: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; subh r15, r16, r17 } + 56f0: [0-9a-f]* { mnz r15, r16, r17 ; addbs_u r5, r6, r7 } + 56f8: [0-9a-f]* { mnz r15, r16, r17 ; and r5, r6, r7 ; lb r25, r26 } + 5700: [0-9a-f]* { mnz r15, r16, r17 ; auli r5, r6, 4660 } + 5708: [0-9a-f]* { bytex r5, r6 ; mnz r15, r16, r17 ; sh r25, r26 } + 5710: [0-9a-f]* { ctz r5, r6 ; mnz r15, r16, r17 ; prefetch r25 } + 5718: [0-9a-f]* { mnz r15, r16, r17 ; info 19 ; lw r25, r26 } + 5720: [0-9a-f]* { mnz r15, r16, r17 ; info 19 ; lb r25, r26 } + 5728: [0-9a-f]* { pcnt r5, r6 ; mnz r15, r16, r17 ; lb r25, r26 } + 5730: [0-9a-f]* { mnz r15, r16, r17 ; srai r5, r6, 5 ; lb r25, r26 } + 5738: [0-9a-f]* { mnz r15, r16, r17 ; movei r5, 5 ; lb_u r25, r26 } + 5740: [0-9a-f]* { mnz r15, r16, r17 ; s1a r5, r6, r7 ; lb_u r25, r26 } + 5748: [0-9a-f]* { tblidxb1 r5, r6 ; mnz r15, r16, r17 ; lb_u r25, r26 } + 5750: [0-9a-f]* { mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh r25, r26 } + 5758: [0-9a-f]* { mnz r15, r16, r17 ; seq r5, r6, r7 ; lh r25, r26 } + 5760: [0-9a-f]* { mnz r15, r16, r17 ; xor r5, r6, r7 ; lh r25, r26 } + 5768: [0-9a-f]* { mulll_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 } + 5770: [0-9a-f]* { mnz r15, r16, r17 ; shli r5, r6, 5 ; lh_u r25, r26 } + 5778: [0-9a-f]* { mnz r15, r16, r17 ; addi r5, r6, 5 ; lw r25, r26 } + 5780: [0-9a-f]* { mullla_uu r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 } + 5788: [0-9a-f]* { mnz r15, r16, r17 ; slt r5, r6, r7 ; lw r25, r26 } + 5790: [0-9a-f]* { mnz r15, r16, r17 ; minb_u r5, r6, r7 } + 5798: [0-9a-f]* { mnz r15, r16, r17 ; move r5, r6 ; lh_u r25, r26 } + 57a0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + 57a8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 } + 57b0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 } + 57b8: [0-9a-f]* { mulll_ss r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 } + 57c0: [0-9a-f]* { mulll_uu r5, r6, r7 ; mnz r15, r16, r17 } + 57c8: [0-9a-f]* { mullla_uu r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 } + 57d0: [0-9a-f]* { mvz r5, r6, r7 ; mnz r15, r16, r17 ; sh r25, r26 } + 57d8: [0-9a-f]* { mnz r15, r16, r17 ; nop ; prefetch r25 } + 57e0: [0-9a-f]* { mnz r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 } + 57e8: [0-9a-f]* { pcnt r5, r6 ; mnz r15, r16, r17 ; lb_u r25, r26 } + 57f0: [0-9a-f]* { mnz r15, r16, r17 ; move r5, r6 ; prefetch r25 } + 57f8: [0-9a-f]* { mnz r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 } + 5800: [0-9a-f]* { tblidxb0 r5, r6 ; mnz r15, r16, r17 ; prefetch r25 } + 5808: [0-9a-f]* { mnz r15, r16, r17 ; rli r5, r6, 5 ; lw r25, r26 } + 5810: [0-9a-f]* { mnz r15, r16, r17 ; s2a r5, r6, r7 ; lw r25, r26 } + 5818: [0-9a-f]* { sadh r5, r6, r7 ; mnz r15, r16, r17 } + 5820: [0-9a-f]* { mulll_ss r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + 5828: [0-9a-f]* { mnz r15, r16, r17 ; shli r5, r6, 5 ; sb r25, r26 } + 5830: [0-9a-f]* { mnz r15, r16, r17 ; seq r5, r6, r7 ; lb_u r25, r26 } + 5838: [0-9a-f]* { mnz r15, r16, r17 ; seqi r5, r6, 5 } + 5840: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; mnz r15, r16, r17 ; sh r25, r26 } + 5848: [0-9a-f]* { mnz r15, r16, r17 ; shl r5, r6, r7 ; sh r25, r26 } + 5850: [0-9a-f]* { mnz r15, r16, r17 ; shl r5, r6, r7 ; lb r25, r26 } + 5858: [0-9a-f]* { mnz r15, r16, r17 ; shli r5, r6, 5 ; sw r25, r26 } + 5860: [0-9a-f]* { mnz r15, r16, r17 ; shri r5, r6, 5 ; lw r25, r26 } + 5868: [0-9a-f]* { mnz r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 } + 5870: [0-9a-f]* { mnz r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 } + 5878: [0-9a-f]* { mnz r15, r16, r17 ; slti r5, r6, 5 ; lw r25, r26 } + 5880: [0-9a-f]* { mnz r15, r16, r17 ; sne r5, r6, r7 ; lb r25, r26 } + 5888: [0-9a-f]* { mnz r15, r16, r17 ; sra r5, r6, r7 ; sw r25, r26 } + 5890: [0-9a-f]* { mnz r15, r16, r17 ; sub r5, r6, r7 ; lw r25, r26 } + 5898: [0-9a-f]* { mnz r15, r16, r17 ; info 19 ; sw r25, r26 } + 58a0: [0-9a-f]* { pcnt r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 } + 58a8: [0-9a-f]* { mnz r15, r16, r17 ; srai r5, r6, 5 ; sw r25, r26 } + 58b0: [0-9a-f]* { tblidxb1 r5, r6 ; mnz r15, r16, r17 ; lh r25, r26 } + 58b8: [0-9a-f]* { tblidxb3 r5, r6 ; mnz r15, r16, r17 ; lh r25, r26 } + 58c0: [0-9a-f]* { mnz r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 } + 58c8: [0-9a-f]* { mnz r5, r6, r7 ; addi r15, r16, 5 ; sh r25, r26 } + 58d0: [0-9a-f]* { mnz r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 } + 58d8: [0-9a-f]* { mnz r5, r6, r7 ; sw r25, r26 } + 58e0: [0-9a-f]* { mnz r5, r6, r7 ; info 19 ; sh r25, r26 } + 58e8: [0-9a-f]* { mnz r5, r6, r7 ; ill ; lb r25, r26 } + 58f0: [0-9a-f]* { mnz r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 } + 58f8: [0-9a-f]* { mnz r5, r6, r7 ; info 19 ; lb_u r25, r26 } + 5900: [0-9a-f]* { mnz r5, r6, r7 ; slt r15, r16, r17 ; lb_u r25, r26 } + 5908: [0-9a-f]* { mnz r5, r6, r7 ; ill ; lh r25, r26 } + 5910: [0-9a-f]* { mnz r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 } + 5918: [0-9a-f]* { mnz r5, r6, r7 ; info 19 ; lh_u r25, r26 } + 5920: [0-9a-f]* { mnz r5, r6, r7 ; slt r15, r16, r17 ; lh_u r25, r26 } + 5928: [0-9a-f]* { mnz r5, r6, r7 ; lw r25, r26 } + 5930: [0-9a-f]* { mnz r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 } + 5938: [0-9a-f]* { mnz r5, r6, r7 ; maxih r15, r16, 5 } + 5940: [0-9a-f]* { mnz r5, r6, r7 ; move r15, r16 ; lb r25, r26 } + 5948: [0-9a-f]* { mnz r5, r6, r7 ; moveli r15, 4660 } + 5950: [0-9a-f]* { mnz r5, r6, r7 ; nop ; prefetch r25 } + 5958: [0-9a-f]* { mnz r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } + 5960: [0-9a-f]* { mnz r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } + 5968: [0-9a-f]* { mnz r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 } + 5970: [0-9a-f]* { mnz r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 } + 5978: [0-9a-f]* { mnz r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 5980: [0-9a-f]* { mnz r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 5988: [0-9a-f]* { mnz r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + 5990: [0-9a-f]* { mnz r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 } + 5998: [0-9a-f]* { mnz r5, r6, r7 ; seqh r15, r16, r17 } + 59a0: [0-9a-f]* { mnz r5, r6, r7 ; info 19 ; sh r25, r26 } + 59a8: [0-9a-f]* { mnz r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + 59b0: [0-9a-f]* { mnz r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 } + 59b8: [0-9a-f]* { mnz r5, r6, r7 ; shr r15, r16, r17 ; lh_u r25, r26 } + 59c0: [0-9a-f]* { mnz r5, r6, r7 ; shrih r15, r16, 5 } + 59c8: [0-9a-f]* { mnz r5, r6, r7 ; slt_u r15, r16, r17 } + 59d0: [0-9a-f]* { mnz r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 } + 59d8: [0-9a-f]* { mnz r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 } + 59e0: [0-9a-f]* { mnz r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 } + 59e8: [0-9a-f]* { mnz r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 } + 59f0: [0-9a-f]* { mnz r5, r6, r7 ; subbs_u r15, r16, r17 } + 59f8: [0-9a-f]* { mnz r5, r6, r7 ; rl r15, r16, r17 ; sw r25, r26 } + 5a00: [0-9a-f]* { mnz r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + 5a08: [0-9a-f]* { mnzb r15, r16, r17 ; addh r5, r6, r7 } + 5a10: [0-9a-f]* { ctz r5, r6 ; mnzb r15, r16, r17 } + 5a18: [0-9a-f]* { mnzb r15, r16, r17 ; mnzh r5, r6, r7 } + 5a20: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; mnzb r15, r16, r17 } + 5a28: [0-9a-f]* { mnzb r15, r16, r17 ; packlb r5, r6, r7 } + 5a30: [0-9a-f]* { mnzb r15, r16, r17 ; shlb r5, r6, r7 } + 5a38: [0-9a-f]* { mnzb r15, r16, r17 ; slteh_u r5, r6, r7 } + 5a40: [0-9a-f]* { mnzb r15, r16, r17 ; subbs_u r5, r6, r7 } + 5a48: [0-9a-f]* { mnzb r5, r6, r7 ; adds r15, r16, r17 } + 5a50: [0-9a-f]* { mnzb r5, r6, r7 ; jr r15 } + 5a58: [0-9a-f]* { mnzb r5, r6, r7 ; mfspr r16, 5 } + 5a60: [0-9a-f]* { mnzb r5, r6, r7 ; ori r15, r16, 5 } + 5a68: [0-9a-f]* { mnzb r5, r6, r7 ; sh r15, r16 } + 5a70: [0-9a-f]* { mnzb r5, r6, r7 ; slteb r15, r16, r17 } + 5a78: [0-9a-f]* { mnzb r5, r6, r7 ; sraih r15, r16, 5 } + 5a80: [0-9a-f]* { mnzh r15, r16, r17 ; addih r5, r6, 5 } + 5a88: [0-9a-f]* { mnzh r15, r16, r17 ; infol 4660 } + 5a90: [0-9a-f]* { mnzh r15, r16, r17 ; moveli.sn r5, 4660 } + 5a98: [0-9a-f]* { mullla_ss r5, r6, r7 ; mnzh r15, r16, r17 } + 5aa0: [0-9a-f]* { mnzh r15, r16, r17 ; s1a r5, r6, r7 } + 5aa8: [0-9a-f]* { mnzh r15, r16, r17 ; shlih r5, r6, 5 } + 5ab0: [0-9a-f]* { mnzh r15, r16, r17 ; slti_u r5, r6, 5 } + 5ab8: [0-9a-f]* { tblidxb0 r5, r6 ; mnzh r15, r16, r17 } + 5ac0: [0-9a-f]* { mnzh r5, r6, r7 ; dtlbpr r15 } + 5ac8: [0-9a-f]* { mnzh r5, r6, r7 ; lbadd r15, r16, 5 } + 5ad0: [0-9a-f]* { mnzh r5, r6, r7 ; minih r15, r16, 5 } + 5ad8: [0-9a-f]* { mnzh r5, r6, r7 ; packlb r15, r16, r17 } + 5ae0: [0-9a-f]* { mnzh r5, r6, r7 ; shlh r15, r16, r17 } + 5ae8: [0-9a-f]* { mnzh r5, r6, r7 ; slth r15, r16, r17 } + 5af0: [0-9a-f]* { mnzh r5, r6, r7 ; subh r15, r16, r17 } + 5af8: [0-9a-f]* { move r15, r16 ; addbs_u r5, r6, r7 } + 5b00: [0-9a-f]* { move r15, r16 ; and r5, r6, r7 ; lb r25, r26 } + 5b08: [0-9a-f]* { move r15, r16 ; auli r5, r6, 4660 } + 5b10: [0-9a-f]* { bytex r5, r6 ; move r15, r16 ; sh r25, r26 } + 5b18: [0-9a-f]* { ctz r5, r6 ; move r15, r16 ; prefetch r25 } + 5b20: [0-9a-f]* { move r15, r16 ; info 19 ; lw r25, r26 } + 5b28: [0-9a-f]* { move r15, r16 ; info 19 ; lb r25, r26 } + 5b30: [0-9a-f]* { pcnt r5, r6 ; move r15, r16 ; lb r25, r26 } + 5b38: [0-9a-f]* { move r15, r16 ; srai r5, r6, 5 ; lb r25, r26 } + 5b40: [0-9a-f]* { move r15, r16 ; movei r5, 5 ; lb_u r25, r26 } + 5b48: [0-9a-f]* { move r15, r16 ; s1a r5, r6, r7 ; lb_u r25, r26 } + 5b50: [0-9a-f]* { tblidxb1 r5, r6 ; move r15, r16 ; lb_u r25, r26 } + 5b58: [0-9a-f]* { mulhha_ss r5, r6, r7 ; move r15, r16 ; lh r25, r26 } + 5b60: [0-9a-f]* { move r15, r16 ; seq r5, r6, r7 ; lh r25, r26 } + 5b68: [0-9a-f]* { move r15, r16 ; xor r5, r6, r7 ; lh r25, r26 } + 5b70: [0-9a-f]* { mulll_ss r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 } + 5b78: [0-9a-f]* { move r15, r16 ; shli r5, r6, 5 ; lh_u r25, r26 } + 5b80: [0-9a-f]* { move r15, r16 ; addi r5, r6, 5 ; lw r25, r26 } + 5b88: [0-9a-f]* { mullla_uu r5, r6, r7 ; move r15, r16 ; lw r25, r26 } + 5b90: [0-9a-f]* { move r15, r16 ; slt r5, r6, r7 ; lw r25, r26 } + 5b98: [0-9a-f]* { move r15, r16 ; minb_u r5, r6, r7 } + 5ba0: [0-9a-f]* { move r15, r16 ; move r5, r6 ; lh_u r25, r26 } + 5ba8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 } + 5bb0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; move r15, r16 ; lb r25, r26 } + 5bb8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; move r15, r16 } + 5bc0: [0-9a-f]* { mulll_ss r5, r6, r7 ; move r15, r16 ; lb r25, r26 } + 5bc8: [0-9a-f]* { mulll_uu r5, r6, r7 ; move r15, r16 } + 5bd0: [0-9a-f]* { mullla_uu r5, r6, r7 ; move r15, r16 ; sw r25, r26 } + 5bd8: [0-9a-f]* { mvz r5, r6, r7 ; move r15, r16 ; sh r25, r26 } + 5be0: [0-9a-f]* { move r15, r16 ; nop ; prefetch r25 } + 5be8: [0-9a-f]* { move r15, r16 ; or r5, r6, r7 ; prefetch r25 } + 5bf0: [0-9a-f]* { pcnt r5, r6 ; move r15, r16 ; lb_u r25, r26 } + 5bf8: [0-9a-f]* { move r15, r16 ; move r5, r6 ; prefetch r25 } + 5c00: [0-9a-f]* { move r15, r16 ; rli r5, r6, 5 ; prefetch r25 } + 5c08: [0-9a-f]* { tblidxb0 r5, r6 ; move r15, r16 ; prefetch r25 } + 5c10: [0-9a-f]* { move r15, r16 ; rli r5, r6, 5 ; lw r25, r26 } + 5c18: [0-9a-f]* { move r15, r16 ; s2a r5, r6, r7 ; lw r25, r26 } + 5c20: [0-9a-f]* { sadh r5, r6, r7 ; move r15, r16 } + 5c28: [0-9a-f]* { mulll_ss r5, r6, r7 ; move r15, r16 ; sb r25, r26 } + 5c30: [0-9a-f]* { move r15, r16 ; shli r5, r6, 5 ; sb r25, r26 } + 5c38: [0-9a-f]* { move r15, r16 ; seq r5, r6, r7 ; lb_u r25, r26 } + 5c40: [0-9a-f]* { move r15, r16 ; seqi r5, r6, 5 } + 5c48: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; move r15, r16 ; sh r25, r26 } + 5c50: [0-9a-f]* { move r15, r16 ; shl r5, r6, r7 ; sh r25, r26 } + 5c58: [0-9a-f]* { move r15, r16 ; shl r5, r6, r7 ; lb r25, r26 } + 5c60: [0-9a-f]* { move r15, r16 ; shli r5, r6, 5 ; sw r25, r26 } + 5c68: [0-9a-f]* { move r15, r16 ; shri r5, r6, 5 ; lw r25, r26 } + 5c70: [0-9a-f]* { move r15, r16 ; slt_u r5, r6, r7 ; lh r25, r26 } + 5c78: [0-9a-f]* { move r15, r16 ; slte_u r5, r6, r7 ; lb r25, r26 } + 5c80: [0-9a-f]* { move r15, r16 ; slti r5, r6, 5 ; lw r25, r26 } + 5c88: [0-9a-f]* { move r15, r16 ; sne r5, r6, r7 ; lb r25, r26 } + 5c90: [0-9a-f]* { move r15, r16 ; sra r5, r6, r7 ; sw r25, r26 } + 5c98: [0-9a-f]* { move r15, r16 ; sub r5, r6, r7 ; lw r25, r26 } + 5ca0: [0-9a-f]* { move r15, r16 ; info 19 ; sw r25, r26 } + 5ca8: [0-9a-f]* { pcnt r5, r6 ; move r15, r16 ; sw r25, r26 } + 5cb0: [0-9a-f]* { move r15, r16 ; srai r5, r6, 5 ; sw r25, r26 } + 5cb8: [0-9a-f]* { tblidxb1 r5, r6 ; move r15, r16 ; lh r25, r26 } + 5cc0: [0-9a-f]* { tblidxb3 r5, r6 ; move r15, r16 ; lh r25, r26 } + 5cc8: [0-9a-f]* { move r5, r6 ; add r15, r16, r17 ; lb_u r25, r26 } + 5cd0: [0-9a-f]* { move r5, r6 ; addi r15, r16, 5 ; sh r25, r26 } + 5cd8: [0-9a-f]* { move r5, r6 ; andi r15, r16, 5 ; lh r25, r26 } + 5ce0: [0-9a-f]* { move r5, r6 ; sw r25, r26 } + 5ce8: [0-9a-f]* { move r5, r6 ; info 19 ; sh r25, r26 } + 5cf0: [0-9a-f]* { move r5, r6 ; ill ; lb r25, r26 } + 5cf8: [0-9a-f]* { move r5, r6 ; shri r15, r16, 5 ; lb r25, r26 } + 5d00: [0-9a-f]* { move r5, r6 ; info 19 ; lb_u r25, r26 } + 5d08: [0-9a-f]* { move r5, r6 ; slt r15, r16, r17 ; lb_u r25, r26 } + 5d10: [0-9a-f]* { move r5, r6 ; ill ; lh r25, r26 } + 5d18: [0-9a-f]* { move r5, r6 ; shri r15, r16, 5 ; lh r25, r26 } + 5d20: [0-9a-f]* { move r5, r6 ; info 19 ; lh_u r25, r26 } + 5d28: [0-9a-f]* { move r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 } + 5d30: [0-9a-f]* { move r5, r6 ; lw r25, r26 } + 5d38: [0-9a-f]* { move r5, r6 ; shr r15, r16, r17 ; lw r25, r26 } + 5d40: [0-9a-f]* { move r5, r6 ; maxih r15, r16, 5 } + 5d48: [0-9a-f]* { move r5, r6 ; move r15, r16 ; lb r25, r26 } + 5d50: [0-9a-f]* { move r5, r6 ; moveli r15, 4660 } + 5d58: [0-9a-f]* { move r5, r6 ; nop ; prefetch r25 } + 5d60: [0-9a-f]* { move r5, r6 ; or r15, r16, r17 ; prefetch r25 } + 5d68: [0-9a-f]* { move r5, r6 ; add r15, r16, r17 ; prefetch r25 } + 5d70: [0-9a-f]* { move r5, r6 ; seq r15, r16, r17 ; prefetch r25 } + 5d78: [0-9a-f]* { move r5, r6 ; rl r15, r16, r17 ; lb_u r25, r26 } + 5d80: [0-9a-f]* { move r5, r6 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 5d88: [0-9a-f]* { move r5, r6 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 5d90: [0-9a-f]* { move r5, r6 ; mz r15, r16, r17 ; sb r25, r26 } + 5d98: [0-9a-f]* { move r5, r6 ; slti r15, r16, 5 ; sb r25, r26 } + 5da0: [0-9a-f]* { move r5, r6 ; seqh r15, r16, r17 } + 5da8: [0-9a-f]* { move r5, r6 ; info 19 ; sh r25, r26 } + 5db0: [0-9a-f]* { move r5, r6 ; slt r15, r16, r17 ; sh r25, r26 } + 5db8: [0-9a-f]* { move r5, r6 ; shl r15, r16, r17 ; sh r25, r26 } + 5dc0: [0-9a-f]* { move r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 } + 5dc8: [0-9a-f]* { move r5, r6 ; shrih r15, r16, 5 } + 5dd0: [0-9a-f]* { move r5, r6 ; slt_u r15, r16, r17 } + 5dd8: [0-9a-f]* { move r5, r6 ; slte_u r15, r16, r17 ; sh r25, r26 } + 5de0: [0-9a-f]* { move r5, r6 ; slti_u r15, r16, 5 ; lb_u r25, r26 } + 5de8: [0-9a-f]* { move r5, r6 ; sne r15, r16, r17 ; sh r25, r26 } + 5df0: [0-9a-f]* { move r5, r6 ; srai r15, r16, 5 ; lh_u r25, r26 } + 5df8: [0-9a-f]* { move r5, r6 ; subbs_u r15, r16, r17 } + 5e00: [0-9a-f]* { move r5, r6 ; rl r15, r16, r17 ; sw r25, r26 } + 5e08: [0-9a-f]* { move r5, r6 ; sub r15, r16, r17 ; sw r25, r26 } + 5e10: [0-9a-f]* { movei r15, 5 ; add r5, r6, r7 ; lh_u r25, r26 } + 5e18: [0-9a-f]* { movei r15, 5 ; addi r5, r6, 5 } + 5e20: [0-9a-f]* { movei r15, 5 ; andi r5, r6, 5 ; lh r25, r26 } + 5e28: [0-9a-f]* { bitx r5, r6 ; movei r15, 5 } + 5e30: [0-9a-f]* { clz r5, r6 ; movei r15, 5 } + 5e38: [0-9a-f]* { movei r15, 5 ; sb r25, r26 } + 5e40: [0-9a-f]* { movei r15, 5 ; addi r5, r6, 5 ; lb r25, r26 } + 5e48: [0-9a-f]* { mullla_uu r5, r6, r7 ; movei r15, 5 ; lb r25, r26 } + 5e50: [0-9a-f]* { movei r15, 5 ; slt r5, r6, r7 ; lb r25, r26 } + 5e58: [0-9a-f]* { bitx r5, r6 ; movei r15, 5 ; lb_u r25, r26 } + 5e60: [0-9a-f]* { movei r15, 5 ; mz r5, r6, r7 ; lb_u r25, r26 } + 5e68: [0-9a-f]* { movei r15, 5 ; slte_u r5, r6, r7 ; lb_u r25, r26 } + 5e70: [0-9a-f]* { ctz r5, r6 ; movei r15, 5 ; lh r25, r26 } + 5e78: [0-9a-f]* { movei r15, 5 ; or r5, r6, r7 ; lh r25, r26 } + 5e80: [0-9a-f]* { movei r15, 5 ; sne r5, r6, r7 ; lh r25, r26 } + 5e88: [0-9a-f]* { movei r15, 5 ; mnz r5, r6, r7 ; lh_u r25, r26 } + 5e90: [0-9a-f]* { movei r15, 5 ; rl r5, r6, r7 ; lh_u r25, r26 } + 5e98: [0-9a-f]* { movei r15, 5 ; sub r5, r6, r7 ; lh_u r25, r26 } + 5ea0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; movei r15, 5 ; lw r25, r26 } + 5ea8: [0-9a-f]* { movei r15, 5 ; s2a r5, r6, r7 ; lw r25, r26 } + 5eb0: [0-9a-f]* { tblidxb2 r5, r6 ; movei r15, 5 ; lw r25, r26 } + 5eb8: [0-9a-f]* { movei r15, 5 ; mnz r5, r6, r7 ; sh r25, r26 } + 5ec0: [0-9a-f]* { movei r15, 5 ; movei r5, 5 ; prefetch r25 } + 5ec8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; movei r15, 5 ; lh r25, r26 } + 5ed0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + 5ed8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; movei r15, 5 ; lh r25, r26 } + 5ee0: [0-9a-f]* { mulll_uu r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + 5ee8: [0-9a-f]* { mullla_uu r5, r6, r7 ; movei r15, 5 ; lb r25, r26 } + 5ef0: [0-9a-f]* { mvnz r5, r6, r7 ; movei r15, 5 } + 5ef8: [0-9a-f]* { movei r15, 5 ; mz r5, r6, r7 } + 5f00: [0-9a-f]* { movei r15, 5 ; nor r5, r6, r7 ; sh r25, r26 } + 5f08: [0-9a-f]* { movei r15, 5 ; ori r5, r6, 5 ; sh r25, r26 } + 5f10: [0-9a-f]* { movei r15, 5 ; andi r5, r6, 5 ; prefetch r25 } + 5f18: [0-9a-f]* { mvz r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + 5f20: [0-9a-f]* { movei r15, 5 ; slte r5, r6, r7 ; prefetch r25 } + 5f28: [0-9a-f]* { movei r15, 5 ; rl r5, r6, r7 ; sb r25, r26 } + 5f30: [0-9a-f]* { movei r15, 5 ; s1a r5, r6, r7 ; sb r25, r26 } + 5f38: [0-9a-f]* { movei r15, 5 ; s3a r5, r6, r7 ; sb r25, r26 } + 5f40: [0-9a-f]* { movei r15, 5 ; mnz r5, r6, r7 ; sb r25, r26 } + 5f48: [0-9a-f]* { movei r15, 5 ; rl r5, r6, r7 ; sb r25, r26 } + 5f50: [0-9a-f]* { movei r15, 5 ; sub r5, r6, r7 ; sb r25, r26 } + 5f58: [0-9a-f]* { movei r15, 5 ; seqi r5, r6, 5 ; lb_u r25, r26 } + 5f60: [0-9a-f]* { movei r15, 5 ; info 19 ; sh r25, r26 } + 5f68: [0-9a-f]* { pcnt r5, r6 ; movei r15, 5 ; sh r25, r26 } + 5f70: [0-9a-f]* { movei r15, 5 ; srai r5, r6, 5 ; sh r25, r26 } + 5f78: [0-9a-f]* { movei r15, 5 ; shli r5, r6, 5 ; lb r25, r26 } + 5f80: [0-9a-f]* { movei r15, 5 ; shr r5, r6, r7 ; sw r25, r26 } + 5f88: [0-9a-f]* { movei r15, 5 ; slt r5, r6, r7 ; lw r25, r26 } + 5f90: [0-9a-f]* { movei r15, 5 ; slte r5, r6, r7 ; lh r25, r26 } + 5f98: [0-9a-f]* { movei r15, 5 ; slteh r5, r6, r7 } + 5fa0: [0-9a-f]* { movei r15, 5 ; slti_u r5, r6, 5 ; sb r25, r26 } + 5fa8: [0-9a-f]* { movei r15, 5 ; sra r5, r6, r7 ; lb r25, r26 } + 5fb0: [0-9a-f]* { movei r15, 5 ; srai r5, r6, 5 ; sw r25, r26 } + 5fb8: [0-9a-f]* { movei r15, 5 ; addi r5, r6, 5 ; sw r25, r26 } + 5fc0: [0-9a-f]* { mullla_uu r5, r6, r7 ; movei r15, 5 ; sw r25, r26 } + 5fc8: [0-9a-f]* { movei r15, 5 ; slt r5, r6, r7 ; sw r25, r26 } + 5fd0: [0-9a-f]* { tblidxb0 r5, r6 ; movei r15, 5 ; lw r25, r26 } + 5fd8: [0-9a-f]* { tblidxb2 r5, r6 ; movei r15, 5 ; lw r25, r26 } + 5fe0: [0-9a-f]* { movei r15, 5 ; xor r5, r6, r7 ; lw r25, r26 } + 5fe8: [0-9a-f]* { movei r5, 5 ; addhs r15, r16, r17 } + 5ff0: [0-9a-f]* { movei r5, 5 ; and r15, r16, r17 ; lw r25, r26 } + 5ff8: [0-9a-f]* { movei r5, 5 ; lb r25, r26 } + 6000: [0-9a-f]* { movei r5, 5 ; ill } + 6008: [0-9a-f]* { movei r5, 5 ; jr r15 } + 6010: [0-9a-f]* { movei r5, 5 ; s1a r15, r16, r17 ; lb r25, r26 } + 6018: [0-9a-f]* { movei r5, 5 ; lb r25, r26 } + 6020: [0-9a-f]* { movei r5, 5 ; s2a r15, r16, r17 ; lb_u r25, r26 } + 6028: [0-9a-f]* { movei r5, 5 ; lbadd r15, r16, 5 } + 6030: [0-9a-f]* { movei r5, 5 ; s1a r15, r16, r17 ; lh r25, r26 } + 6038: [0-9a-f]* { movei r5, 5 ; lh r25, r26 } + 6040: [0-9a-f]* { movei r5, 5 ; s2a r15, r16, r17 ; lh_u r25, r26 } + 6048: [0-9a-f]* { movei r5, 5 ; lhadd r15, r16, 5 } + 6050: [0-9a-f]* { movei r5, 5 ; rli r15, r16, 5 ; lw r25, r26 } + 6058: [0-9a-f]* { movei r5, 5 ; xor r15, r16, r17 ; lw r25, r26 } + 6060: [0-9a-f]* { movei r5, 5 ; mnz r15, r16, r17 ; lw r25, r26 } + 6068: [0-9a-f]* { movei r5, 5 ; movei r15, 5 ; lh r25, r26 } + 6070: [0-9a-f]* { movei r5, 5 ; mz r15, r16, r17 } + 6078: [0-9a-f]* { movei r5, 5 ; nor r15, r16, r17 ; sh r25, r26 } + 6080: [0-9a-f]* { movei r5, 5 ; ori r15, r16, 5 ; sh r25, r26 } + 6088: [0-9a-f]* { movei r5, 5 ; nor r15, r16, r17 ; prefetch r25 } + 6090: [0-9a-f]* { movei r5, 5 ; sne r15, r16, r17 ; prefetch r25 } + 6098: [0-9a-f]* { movei r5, 5 ; rli r15, r16, 5 ; lh_u r25, r26 } + 60a0: [0-9a-f]* { movei r5, 5 ; s2a r15, r16, r17 ; lh_u r25, r26 } + 60a8: [0-9a-f]* { movei r5, 5 ; and r15, r16, r17 ; sb r25, r26 } + 60b0: [0-9a-f]* { movei r5, 5 ; shl r15, r16, r17 ; sb r25, r26 } + 60b8: [0-9a-f]* { movei r5, 5 ; seq r15, r16, r17 ; lh_u r25, r26 } + 60c0: [0-9a-f]* { movei r5, 5 ; seqih r15, r16, 5 } + 60c8: [0-9a-f]* { movei r5, 5 ; s2a r15, r16, r17 ; sh r25, r26 } + 60d0: [0-9a-f]* { movei r5, 5 ; shadd r15, r16, 5 } + 60d8: [0-9a-f]* { movei r5, 5 ; shli r15, r16, 5 ; sh r25, r26 } + 60e0: [0-9a-f]* { movei r5, 5 ; shri r15, r16, 5 ; lh_u r25, r26 } + 60e8: [0-9a-f]* { movei r5, 5 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + 60f0: [0-9a-f]* { movei r5, 5 ; slte r15, r16, r17 } + 60f8: [0-9a-f]* { movei r5, 5 ; slti r15, r16, 5 ; lh_u r25, r26 } + 6100: [0-9a-f]* { movei r5, 5 ; sltih_u r15, r16, 5 } + 6108: [0-9a-f]* { movei r5, 5 ; sra r15, r16, r17 ; sh r25, r26 } + 6110: [0-9a-f]* { movei r5, 5 ; sub r15, r16, r17 ; lh_u r25, r26 } + 6118: [0-9a-f]* { movei r5, 5 ; mnz r15, r16, r17 ; sw r25, r26 } + 6120: [0-9a-f]* { movei r5, 5 ; slt_u r15, r16, r17 ; sw r25, r26 } + 6128: [0-9a-f]* { movei r5, 5 ; xor r15, r16, r17 ; sb r25, r26 } + 6130: [0-9a-f]* { moveli r15, 4660 ; auli r5, r6, 4660 } + 6138: [0-9a-f]* { moveli r15, 4660 ; maxih r5, r6, 5 } + 6140: [0-9a-f]* { mulhl_ss r5, r6, r7 ; moveli r15, 4660 } + 6148: [0-9a-f]* { moveli r15, 4660 ; mzh r5, r6, r7 } + 6150: [0-9a-f]* { sadh_u r5, r6, r7 ; moveli r15, 4660 } + 6158: [0-9a-f]* { moveli r15, 4660 ; slt_u r5, r6, r7 } + 6160: [0-9a-f]* { moveli r15, 4660 ; sra r5, r6, r7 } + 6168: [0-9a-f]* { moveli r5, 4660 ; addbs_u r15, r16, r17 } + 6170: [0-9a-f]* { moveli r5, 4660 ; inthb r15, r16, r17 } + 6178: [0-9a-f]* { moveli r5, 4660 ; lw_na r15, r16 } + 6180: [0-9a-f]* { moveli r5, 4660 ; moveli.sn r15, 4660 } + 6188: [0-9a-f]* { moveli r5, 4660 ; sb r15, r16 } + 6190: [0-9a-f]* { moveli r5, 4660 ; shrib r15, r16, 5 } + 6198: [0-9a-f]* { moveli r5, 4660 ; sne r15, r16, r17 } + 61a0: [0-9a-f]* { moveli r5, 4660 ; xori r15, r16, 5 } + 61a8: [0-9a-f]* { clz r5, r6 ; moveli.sn r15, 4660 } + 61b0: [0-9a-f]* { moveli.sn r15, 4660 ; mm r5, r6, r7, 5, 7 } + 61b8: [0-9a-f]* { mulhla_us r5, r6, r7 ; moveli.sn r15, 4660 } + 61c0: [0-9a-f]* { moveli.sn r15, 4660 ; packhb r5, r6, r7 } + 61c8: [0-9a-f]* { moveli.sn r15, 4660 ; seqih r5, r6, 5 } + 61d0: [0-9a-f]* { moveli.sn r15, 4660 ; slteb_u r5, r6, r7 } + 61d8: [0-9a-f]* { moveli.sn r15, 4660 ; sub r5, r6, r7 } + 61e0: [0-9a-f]* { moveli.sn r5, 4660 ; addli r15, r16, 4660 } + 61e8: [0-9a-f]* { moveli.sn r5, 4660 ; jalrp r15 } + 61f0: [0-9a-f]* { moveli.sn r5, 4660 ; mf } + 61f8: [0-9a-f]* { moveli.sn r5, 4660 ; ori r15, r16, 5 } + 6200: [0-9a-f]* { moveli.sn r5, 4660 ; sh r15, r16 } + 6208: [0-9a-f]* { moveli.sn r5, 4660 ; slteb r15, r16, r17 } + 6210: [0-9a-f]* { moveli.sn r5, 4660 ; sraih r15, r16, 5 } + 6218: [0-9a-f]* { addih r5, r6, 5 ; mtspr 5, r16 } + 6220: [0-9a-f]* { infol 4660 ; mtspr 5, r16 } + 6228: [0-9a-f]* { moveli.sn r5, 4660 ; mtspr 5, r16 } + 6230: [0-9a-f]* { mullla_ss r5, r6, r7 ; mtspr 5, r16 } + 6238: [0-9a-f]* { s1a r5, r6, r7 ; mtspr 5, r16 } + 6240: [0-9a-f]* { shlih r5, r6, 5 ; mtspr 5, r16 } + 6248: [0-9a-f]* { slti_u r5, r6, 5 ; mtspr 5, r16 } + 6250: [0-9a-f]* { tblidxb0 r5, r6 ; mtspr 5, r16 } + 6258: [0-9a-f]* { mulhh_ss r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 } + 6260: [0-9a-f]* { mulhh_ss r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + 6268: [0-9a-f]* { mulhh_ss r5, r6, r7 ; lb_u r25, r26 } + 6270: [0-9a-f]* { mulhh_ss r5, r6, r7 ; info 19 ; lb r25, r26 } + 6278: [0-9a-f]* { mulhh_ss r5, r6, r7 ; jrp r15 } + 6280: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + 6288: [0-9a-f]* { mulhh_ss r5, r6, r7 ; lb_u r15, r16 } + 6290: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 6298: [0-9a-f]* { mulhh_ss r5, r6, r7 ; lbadd_u r15, r16, 5 } + 62a0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 } + 62a8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; lh_u r15, r16 } + 62b0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s3a r15, r16, r17 ; lh_u r25, r26 } + 62b8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; lhadd_u r15, r16, 5 } + 62c0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 } + 62c8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; lw r25, r26 } + 62d0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + 62d8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 } + 62e0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; mzb r15, r16, r17 } + 62e8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + 62f0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 } + 62f8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } + 6300: [0-9a-f]* { mulhh_ss r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 } + 6308: [0-9a-f]* { mulhh_ss r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 } + 6310: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + 6318: [0-9a-f]* { mulhh_ss r5, r6, r7 ; andi r15, r16, 5 ; sb r25, r26 } + 6320: [0-9a-f]* { mulhh_ss r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + 6328: [0-9a-f]* { mulhh_ss r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 } + 6330: [0-9a-f]* { mulhh_ss r5, r6, r7 ; sh r15, r16 } + 6338: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 } + 6340: [0-9a-f]* { mulhh_ss r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + 6348: [0-9a-f]* { mulhh_ss r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 } + 6350: [0-9a-f]* { mulhh_ss r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + 6358: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 } + 6360: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 } + 6368: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + 6370: [0-9a-f]* { mulhh_ss r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 } + 6378: [0-9a-f]* { mulhh_ss r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 } + 6380: [0-9a-f]* { mulhh_ss r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + 6388: [0-9a-f]* { mulhh_ss r5, r6, r7 ; move r15, r16 ; sw r25, r26 } + 6390: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 } + 6398: [0-9a-f]* { mulhh_ss r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + 63a0: [0-9a-f]* { mulhh_su r5, r6, r7 ; flush r15 } + 63a8: [0-9a-f]* { mulhh_su r5, r6, r7 ; lh r15, r16 } + 63b0: [0-9a-f]* { mulhh_su r5, r6, r7 ; mnz r15, r16, r17 } + 63b8: [0-9a-f]* { mulhh_su r5, r6, r7 ; raise } + 63c0: [0-9a-f]* { mulhh_su r5, r6, r7 ; shlib r15, r16, 5 } + 63c8: [0-9a-f]* { mulhh_su r5, r6, r7 ; slti r15, r16, 5 } + 63d0: [0-9a-f]* { mulhh_su r5, r6, r7 ; subs r15, r16, r17 } + 63d8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; addhs r15, r16, r17 } + 63e0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; and r15, r16, r17 ; lw r25, r26 } + 63e8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; lb r25, r26 } + 63f0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; ill } + 63f8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; jr r15 } + 6400: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s1a r15, r16, r17 ; lb r25, r26 } + 6408: [0-9a-f]* { mulhh_uu r5, r6, r7 ; lb r25, r26 } + 6410: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 } + 6418: [0-9a-f]* { mulhh_uu r5, r6, r7 ; lbadd r15, r16, 5 } + 6420: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 } + 6428: [0-9a-f]* { mulhh_uu r5, r6, r7 ; lh r25, r26 } + 6430: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 } + 6438: [0-9a-f]* { mulhh_uu r5, r6, r7 ; lhadd r15, r16, 5 } + 6440: [0-9a-f]* { mulhh_uu r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 } + 6448: [0-9a-f]* { mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 } + 6450: [0-9a-f]* { mulhh_uu r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 } + 6458: [0-9a-f]* { mulhh_uu r5, r6, r7 ; movei r15, 5 ; lh r25, r26 } + 6460: [0-9a-f]* { mulhh_uu r5, r6, r7 ; mz r15, r16, r17 } + 6468: [0-9a-f]* { mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; sh r25, r26 } + 6470: [0-9a-f]* { mulhh_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 } + 6478: [0-9a-f]* { mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + 6480: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sne r15, r16, r17 ; prefetch r25 } + 6488: [0-9a-f]* { mulhh_uu r5, r6, r7 ; rli r15, r16, 5 ; lh_u r25, r26 } + 6490: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 } + 6498: [0-9a-f]* { mulhh_uu r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 } + 64a0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 } + 64a8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; seq r15, r16, r17 ; lh_u r25, r26 } + 64b0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; seqih r15, r16, 5 } + 64b8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 } + 64c0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shadd r15, r16, 5 } + 64c8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + 64d0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shri r15, r16, 5 ; lh_u r25, r26 } + 64d8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + 64e0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slte r15, r16, r17 } + 64e8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 } + 64f0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sltih_u r15, r16, 5 } + 64f8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 } + 6500: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 } + 6508: [0-9a-f]* { mulhh_uu r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 } + 6510: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 } + 6518: [0-9a-f]* { mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 } + 6520: [0-9a-f]* { mulhha_ss r5, r6, r7 ; addi r15, r16, 5 ; lb_u r25, r26 } + 6528: [0-9a-f]* { mulhha_ss r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 } + 6530: [0-9a-f]* { mulhha_ss r5, r6, r7 ; lh r25, r26 } + 6538: [0-9a-f]* { mulhha_ss r5, r6, r7 ; info 19 ; lb_u r25, r26 } + 6540: [0-9a-f]* { mulhha_ss r5, r6, r7 ; lb r15, r16 } + 6548: [0-9a-f]* { mulhha_ss r5, r6, r7 ; s3a r15, r16, r17 ; lb r25, r26 } + 6550: [0-9a-f]* { mulhha_ss r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 } + 6558: [0-9a-f]* { mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 } + 6560: [0-9a-f]* { mulhha_ss r5, r6, r7 ; lh r15, r16 } + 6568: [0-9a-f]* { mulhha_ss r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 } + 6570: [0-9a-f]* { mulhha_ss r5, r6, r7 ; add r15, r16, r17 ; lh_u r25, r26 } + 6578: [0-9a-f]* { mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; lh_u r25, r26 } + 6580: [0-9a-f]* { mulhha_ss r5, r6, r7 ; lnk r15 } + 6588: [0-9a-f]* { mulhha_ss r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + 6590: [0-9a-f]* { mulhha_ss r5, r6, r7 ; lw_na r15, r16 } + 6598: [0-9a-f]* { mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + 65a0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; movei r15, 5 ; lw r25, r26 } + 65a8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; mzh r15, r16, r17 } + 65b0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; nor r15, r16, r17 } + 65b8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; ori r15, r16, 5 } + 65c0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 } + 65c8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 } + 65d0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 } + 65d8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 } + 65e0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sb r25, r26 } + 65e8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 } + 65f0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 } + 65f8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 } + 6600: [0-9a-f]* { mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 } + 6608: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 } + 6610: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shli r15, r16, 5 } + 6618: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 } + 6620: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + 6628: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + 6630: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 } + 6638: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 } + 6640: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sra r15, r16, r17 } + 6648: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + 6650: [0-9a-f]* { mulhha_ss r5, r6, r7 ; movei r15, 5 ; sw r25, r26 } + 6658: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 } + 6660: [0-9a-f]* { mulhha_ss r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 } + 6668: [0-9a-f]* { mulhha_su r5, r6, r7 } + 6670: [0-9a-f]* { mulhha_su r5, r6, r7 ; lh_u r15, r16 } + 6678: [0-9a-f]* { mulhha_su r5, r6, r7 ; mnzb r15, r16, r17 } + 6680: [0-9a-f]* { mulhha_su r5, r6, r7 ; rl r15, r16, r17 } + 6688: [0-9a-f]* { mulhha_su r5, r6, r7 ; shlih r15, r16, 5 } + 6690: [0-9a-f]* { mulhha_su r5, r6, r7 ; slti_u r15, r16, 5 } + 6698: [0-9a-f]* { mulhha_su r5, r6, r7 ; sw r15, r16 } + 66a0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 } + 66a8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + 66b0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; lb_u r25, r26 } + 66b8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; info 19 ; lb r25, r26 } + 66c0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; jrp r15 } + 66c8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + 66d0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; lb_u r15, r16 } + 66d8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 66e0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; lbadd_u r15, r16, 5 } + 66e8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 } + 66f0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; lh_u r15, r16 } + 66f8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s3a r15, r16, r17 ; lh_u r25, r26 } + 6700: [0-9a-f]* { mulhha_uu r5, r6, r7 ; lhadd_u r15, r16, 5 } + 6708: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 } + 6710: [0-9a-f]* { mulhha_uu r5, r6, r7 ; lw r25, r26 } + 6718: [0-9a-f]* { mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + 6720: [0-9a-f]* { mulhha_uu r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 } + 6728: [0-9a-f]* { mulhha_uu r5, r6, r7 ; mzb r15, r16, r17 } + 6730: [0-9a-f]* { mulhha_uu r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + 6738: [0-9a-f]* { mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 } + 6740: [0-9a-f]* { mulhha_uu r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } + 6748: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 } + 6750: [0-9a-f]* { mulhha_uu r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 } + 6758: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + 6760: [0-9a-f]* { mulhha_uu r5, r6, r7 ; andi r15, r16, 5 ; sb r25, r26 } + 6768: [0-9a-f]* { mulhha_uu r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + 6770: [0-9a-f]* { mulhha_uu r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 } + 6778: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sh r15, r16 } + 6780: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 } + 6788: [0-9a-f]* { mulhha_uu r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + 6790: [0-9a-f]* { mulhha_uu r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 } + 6798: [0-9a-f]* { mulhha_uu r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + 67a0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 } + 67a8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 } + 67b0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + 67b8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 } + 67c0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 } + 67c8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + 67d0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; move r15, r16 ; sw r25, r26 } + 67d8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 } + 67e0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + 67e8: [0-9a-f]* { mulhhsa_uu r5, r6, r7 ; flush r15 } + 67f0: [0-9a-f]* { mulhhsa_uu r5, r6, r7 ; lh r15, r16 } + 67f8: [0-9a-f]* { mulhhsa_uu r5, r6, r7 ; mnz r15, r16, r17 } + 6800: [0-9a-f]* { mulhhsa_uu r5, r6, r7 ; raise } + 6808: [0-9a-f]* { mulhhsa_uu r5, r6, r7 ; shlib r15, r16, 5 } + 6810: [0-9a-f]* { mulhhsa_uu r5, r6, r7 ; slti r15, r16, 5 } + 6818: [0-9a-f]* { mulhhsa_uu r5, r6, r7 ; subs r15, r16, r17 } + 6820: [0-9a-f]* { mulhl_ss r5, r6, r7 ; auli r15, r16, 4660 } + 6828: [0-9a-f]* { mulhl_ss r5, r6, r7 ; lb_u r15, r16 } + 6830: [0-9a-f]* { mulhl_ss r5, r6, r7 ; minib_u r15, r16, 5 } + 6838: [0-9a-f]* { mulhl_ss r5, r6, r7 ; packhs r15, r16, r17 } + 6840: [0-9a-f]* { mulhl_ss r5, r6, r7 ; shlb r15, r16, r17 } + 6848: [0-9a-f]* { mulhl_ss r5, r6, r7 ; slteh_u r15, r16, r17 } + 6850: [0-9a-f]* { mulhl_ss r5, r6, r7 ; subbs_u r15, r16, r17 } + 6858: [0-9a-f]* { mulhl_su r5, r6, r7 ; adds r15, r16, r17 } + 6860: [0-9a-f]* { mulhl_su r5, r6, r7 ; jr r15 } + 6868: [0-9a-f]* { mulhl_su r5, r6, r7 ; mfspr r16, 5 } + 6870: [0-9a-f]* { mulhl_su r5, r6, r7 ; ori r15, r16, 5 } + 6878: [0-9a-f]* { mulhl_su r5, r6, r7 ; sh r15, r16 } + 6880: [0-9a-f]* { mulhl_su r5, r6, r7 ; slteb r15, r16, r17 } + 6888: [0-9a-f]* { mulhl_su r5, r6, r7 ; sraih r15, r16, 5 } + 6890: [0-9a-f]* { mulhl_us r5, r6, r7 ; addih r15, r16, 5 } + 6898: [0-9a-f]* { mulhl_us r5, r6, r7 ; iret } + 68a0: [0-9a-f]* { mulhl_us r5, r6, r7 ; maxib_u r15, r16, 5 } + 68a8: [0-9a-f]* { mulhl_us r5, r6, r7 ; nop } + 68b0: [0-9a-f]* { mulhl_us r5, r6, r7 ; seqi r15, r16, 5 } + 68b8: [0-9a-f]* { mulhl_us r5, r6, r7 ; sltb_u r15, r16, r17 } + 68c0: [0-9a-f]* { mulhl_us r5, r6, r7 ; srah r15, r16, r17 } + 68c8: [0-9a-f]* { mulhl_uu r5, r6, r7 ; addhs r15, r16, r17 } + 68d0: [0-9a-f]* { mulhl_uu r5, r6, r7 ; intlb r15, r16, r17 } + 68d8: [0-9a-f]* { mulhl_uu r5, r6, r7 ; lwadd_na r15, r16, 5 } + 68e0: [0-9a-f]* { mulhl_uu r5, r6, r7 ; mz r15, r16, r17 } + 68e8: [0-9a-f]* { mulhl_uu r5, r6, r7 ; seq r15, r16, r17 } + 68f0: [0-9a-f]* { mulhl_uu r5, r6, r7 ; slt r15, r16, r17 } + 68f8: [0-9a-f]* { mulhl_uu r5, r6, r7 ; sneh r15, r16, r17 } + 6900: [0-9a-f]* { mulhla_ss r5, r6, r7 ; addb r15, r16, r17 } + 6908: [0-9a-f]* { mulhla_ss r5, r6, r7 ; infol 4660 } + 6910: [0-9a-f]* { mulhla_ss r5, r6, r7 ; lw r15, r16 } + 6918: [0-9a-f]* { mulhla_ss r5, r6, r7 ; moveli r15, 4660 } + 6920: [0-9a-f]* { mulhla_ss r5, r6, r7 ; s3a r15, r16, r17 } + 6928: [0-9a-f]* { mulhla_ss r5, r6, r7 ; shri r15, r16, 5 } + 6930: [0-9a-f]* { mulhla_ss r5, r6, r7 ; sltih_u r15, r16, 5 } + 6938: [0-9a-f]* { mulhla_ss r5, r6, r7 ; xor r15, r16, r17 } + 6940: [0-9a-f]* { mulhla_su r5, r6, r7 ; icoh r15 } + 6948: [0-9a-f]* { mulhla_su r5, r6, r7 ; lhadd r15, r16, 5 } + 6950: [0-9a-f]* { mulhla_su r5, r6, r7 ; mnzh r15, r16, r17 } + 6958: [0-9a-f]* { mulhla_su r5, r6, r7 ; rli r15, r16, 5 } + 6960: [0-9a-f]* { mulhla_su r5, r6, r7 ; shr r15, r16, r17 } + 6968: [0-9a-f]* { mulhla_su r5, r6, r7 ; sltib r15, r16, 5 } + 6970: [0-9a-f]* { mulhla_su r5, r6, r7 ; swadd r15, r16, 5 } + 6978: [0-9a-f]* { mulhla_us r5, r6, r7 ; finv r15 } + 6980: [0-9a-f]* { mulhla_us r5, r6, r7 ; lbadd_u r15, r16, 5 } + 6988: [0-9a-f]* { mulhla_us r5, r6, r7 ; mm r15, r16, r17, 5, 7 } + 6990: [0-9a-f]* { mulhla_us r5, r6, r7 ; prefetch r15 } + 6998: [0-9a-f]* { mulhla_us r5, r6, r7 ; shli r15, r16, 5 } + 69a0: [0-9a-f]* { mulhla_us r5, r6, r7 ; slth_u r15, r16, r17 } + 69a8: [0-9a-f]* { mulhla_us r5, r6, r7 ; subhs r15, r16, r17 } + 69b0: [0-9a-f]* { mulhla_uu r5, r6, r7 ; andi r15, r16, 5 } + 69b8: [0-9a-f]* { mulhla_uu r5, r6, r7 ; lb r15, r16 } + 69c0: [0-9a-f]* { mulhla_uu r5, r6, r7 ; minh r15, r16, r17 } + 69c8: [0-9a-f]* { mulhla_uu r5, r6, r7 ; packhb r15, r16, r17 } + 69d0: [0-9a-f]* { mulhla_uu r5, r6, r7 ; shl r15, r16, r17 } + 69d8: [0-9a-f]* { mulhla_uu r5, r6, r7 ; slteh r15, r16, r17 } + 69e0: [0-9a-f]* { mulhla_uu r5, r6, r7 ; subb r15, r16, r17 } + 69e8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; add r15, r16, r17 } + 69f0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + 69f8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; auli r15, r16, 4660 } + 6a00: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; ill ; prefetch r25 } + 6a08: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; inv r15 } + 6a10: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; or r15, r16, r17 ; lb r25, r26 } + 6a18: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 } + 6a20: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 } + 6a28: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 } + 6a30: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + 6a38: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sra r15, r16, r17 ; lh r25, r26 } + 6a40: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 } + 6a48: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 } + 6a50: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + 6a58: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + 6a60: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 } + 6a68: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; move r15, r16 ; sw r25, r26 } + 6a70: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + 6a78: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + 6a80: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 } + 6a88: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; move r15, r16 ; prefetch r25 } + 6a90: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 } + 6a98: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; rl r15, r16, r17 } + 6aa0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; s1a r15, r16, r17 } + 6aa8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 } + 6ab0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 ; sb r25, r26 } + 6ab8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sbadd r15, r16, 5 } + 6ac0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 } + 6ac8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 } + 6ad0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 } + 6ad8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + 6ae0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; shrh r15, r16, r17 } + 6ae8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + 6af0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 } + 6af8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slth_u r15, r16, r17 } + 6b00: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slti_u r15, r16, 5 } + 6b08: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sra r15, r16, r17 ; lh_u r25, r26 } + 6b10: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sraih r15, r16, 5 } + 6b18: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 } + 6b20: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 } + 6b28: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 } + 6b30: [0-9a-f]* { mulll_ss r5, r6, r7 ; addbs_u r15, r16, r17 } + 6b38: [0-9a-f]* { mulll_ss r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + 6b40: [0-9a-f]* { mulll_ss r5, r6, r7 ; finv r15 } + 6b48: [0-9a-f]* { mulll_ss r5, r6, r7 ; ill ; sh r25, r26 } + 6b50: [0-9a-f]* { mulll_ss r5, r6, r7 ; jalr r15 } + 6b58: [0-9a-f]* { mulll_ss r5, r6, r7 ; rl r15, r16, r17 ; lb r25, r26 } + 6b60: [0-9a-f]* { mulll_ss r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + 6b68: [0-9a-f]* { mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 } + 6b70: [0-9a-f]* { mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lb_u r25, r26 } + 6b78: [0-9a-f]* { mulll_ss r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 } + 6b80: [0-9a-f]* { mulll_ss r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 } + 6b88: [0-9a-f]* { mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lh_u r25, r26 } + 6b90: [0-9a-f]* { mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + 6b98: [0-9a-f]* { mulll_ss r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + 6ba0: [0-9a-f]* { mulll_ss r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 } + 6ba8: [0-9a-f]* { mulll_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh r25, r26 } + 6bb0: [0-9a-f]* { mulll_ss r5, r6, r7 ; movei r15, 5 ; lb r25, r26 } + 6bb8: [0-9a-f]* { mulll_ss r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 } + 6bc0: [0-9a-f]* { mulll_ss r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + 6bc8: [0-9a-f]* { mulll_ss r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 } + 6bd0: [0-9a-f]* { mulll_ss r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + 6bd8: [0-9a-f]* { mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 } + 6be0: [0-9a-f]* { mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 } + 6be8: [0-9a-f]* { mulll_ss r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 } + 6bf0: [0-9a-f]* { mulll_ss r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 } + 6bf8: [0-9a-f]* { mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; sb r25, r26 } + 6c00: [0-9a-f]* { mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 } + 6c08: [0-9a-f]* { mulll_ss r5, r6, r7 ; seqi r15, r16, 5 } + 6c10: [0-9a-f]* { mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 } + 6c18: [0-9a-f]* { mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + 6c20: [0-9a-f]* { mulll_ss r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + 6c28: [0-9a-f]* { mulll_ss r5, r6, r7 ; shri r15, r16, 5 ; lb_u r25, r26 } + 6c30: [0-9a-f]* { mulll_ss r5, r6, r7 ; slt r15, r16, r17 } + 6c38: [0-9a-f]* { mulll_ss r5, r6, r7 ; slte r15, r16, r17 ; sh r25, r26 } + 6c40: [0-9a-f]* { mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 } + 6c48: [0-9a-f]* { mulll_ss r5, r6, r7 ; sltib_u r15, r16, 5 } + 6c50: [0-9a-f]* { mulll_ss r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 } + 6c58: [0-9a-f]* { mulll_ss r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 } + 6c60: [0-9a-f]* { mulll_ss r5, r6, r7 ; ill ; sw r25, r26 } + 6c68: [0-9a-f]* { mulll_ss r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + 6c70: [0-9a-f]* { mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 } + 6c78: [0-9a-f]* { mulll_su r5, r6, r7 ; auli r15, r16, 4660 } + 6c80: [0-9a-f]* { mulll_su r5, r6, r7 ; lb_u r15, r16 } + 6c88: [0-9a-f]* { mulll_su r5, r6, r7 ; minib_u r15, r16, 5 } + 6c90: [0-9a-f]* { mulll_su r5, r6, r7 ; packhs r15, r16, r17 } + 6c98: [0-9a-f]* { mulll_su r5, r6, r7 ; shlb r15, r16, r17 } + 6ca0: [0-9a-f]* { mulll_su r5, r6, r7 ; slteh_u r15, r16, r17 } + 6ca8: [0-9a-f]* { mulll_su r5, r6, r7 ; subbs_u r15, r16, r17 } + 6cb0: [0-9a-f]* { mulll_uu r5, r6, r7 ; addb r15, r16, r17 } + 6cb8: [0-9a-f]* { mulll_uu r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + 6cc0: [0-9a-f]* { mulll_uu r5, r6, r7 ; dtlbpr r15 } + 6cc8: [0-9a-f]* { mulll_uu r5, r6, r7 ; ill ; sb r25, r26 } + 6cd0: [0-9a-f]* { mulll_uu r5, r6, r7 ; iret } + 6cd8: [0-9a-f]* { mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 } + 6ce0: [0-9a-f]* { mulll_uu r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + 6ce8: [0-9a-f]* { mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 } + 6cf0: [0-9a-f]* { mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 } + 6cf8: [0-9a-f]* { mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 } + 6d00: [0-9a-f]* { mulll_uu r5, r6, r7 ; srai r15, r16, 5 ; lh r25, r26 } + 6d08: [0-9a-f]* { mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 } + 6d10: [0-9a-f]* { mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 } + 6d18: [0-9a-f]* { mulll_uu r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 } + 6d20: [0-9a-f]* { mulll_uu r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + 6d28: [0-9a-f]* { mulll_uu r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + 6d30: [0-9a-f]* { mulll_uu r5, r6, r7 ; move r15, r16 } + 6d38: [0-9a-f]* { mulll_uu r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + 6d40: [0-9a-f]* { mulll_uu r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + 6d48: [0-9a-f]* { mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + 6d50: [0-9a-f]* { mulll_uu r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + 6d58: [0-9a-f]* { mulll_uu r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 } + 6d60: [0-9a-f]* { mulll_uu r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + 6d68: [0-9a-f]* { mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + 6d70: [0-9a-f]* { mulll_uu r5, r6, r7 ; sb r15, r16 } + 6d78: [0-9a-f]* { mulll_uu r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + 6d80: [0-9a-f]* { mulll_uu r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 } + 6d88: [0-9a-f]* { mulll_uu r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + 6d90: [0-9a-f]* { mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 } + 6d98: [0-9a-f]* { mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 } + 6da0: [0-9a-f]* { mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + 6da8: [0-9a-f]* { mulll_uu r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 } + 6db0: [0-9a-f]* { mulll_uu r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 } + 6db8: [0-9a-f]* { mulll_uu r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 } + 6dc0: [0-9a-f]* { mulll_uu r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + 6dc8: [0-9a-f]* { mulll_uu r5, r6, r7 ; sltib r15, r16, 5 } + 6dd0: [0-9a-f]* { mulll_uu r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + 6dd8: [0-9a-f]* { mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + 6de0: [0-9a-f]* { mulll_uu r5, r6, r7 ; sw r25, r26 } + 6de8: [0-9a-f]* { mulll_uu r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 } + 6df0: [0-9a-f]* { mulll_uu r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + 6df8: [0-9a-f]* { mullla_ss r5, r6, r7 ; addh r15, r16, r17 } + 6e00: [0-9a-f]* { mullla_ss r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + 6e08: [0-9a-f]* { mullla_ss r5, r6, r7 ; flush r15 } + 6e10: [0-9a-f]* { mullla_ss r5, r6, r7 ; ill ; sw r25, r26 } + 6e18: [0-9a-f]* { mullla_ss r5, r6, r7 ; jalrp r15 } + 6e20: [0-9a-f]* { mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + 6e28: [0-9a-f]* { mullla_ss r5, r6, r7 ; xor r15, r16, r17 ; lb r25, r26 } + 6e30: [0-9a-f]* { mullla_ss r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 6e38: [0-9a-f]* { mullla_ss r5, r6, r7 ; lb_u r25, r26 } + 6e40: [0-9a-f]* { mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 } + 6e48: [0-9a-f]* { mullla_ss r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 } + 6e50: [0-9a-f]* { mullla_ss r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 6e58: [0-9a-f]* { mullla_ss r5, r6, r7 ; lh_u r25, r26 } + 6e60: [0-9a-f]* { mullla_ss r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + 6e68: [0-9a-f]* { mullla_ss r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + 6e70: [0-9a-f]* { mullla_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 } + 6e78: [0-9a-f]* { mullla_ss r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + 6e80: [0-9a-f]* { mullla_ss r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 } + 6e88: [0-9a-f]* { mullla_ss r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 } + 6e90: [0-9a-f]* { mullla_ss r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 } + 6e98: [0-9a-f]* { mullla_ss r5, r6, r7 ; nop ; prefetch r25 } + 6ea0: [0-9a-f]* { mullla_ss r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 } + 6ea8: [0-9a-f]* { mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 } + 6eb0: [0-9a-f]* { mullla_ss r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 } + 6eb8: [0-9a-f]* { mullla_ss r5, r6, r7 ; addi r15, r16, 5 ; sb r25, r26 } + 6ec0: [0-9a-f]* { mullla_ss r5, r6, r7 ; seqi r15, r16, 5 ; sb r25, r26 } + 6ec8: [0-9a-f]* { mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 } + 6ed0: [0-9a-f]* { mullla_ss r5, r6, r7 ; seqib r15, r16, 5 } + 6ed8: [0-9a-f]* { mullla_ss r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 } + 6ee0: [0-9a-f]* { mullla_ss r5, r6, r7 ; sh r25, r26 } + 6ee8: [0-9a-f]* { mullla_ss r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + 6ef0: [0-9a-f]* { mullla_ss r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 } + 6ef8: [0-9a-f]* { mullla_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 } + 6f00: [0-9a-f]* { mullla_ss r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 } + 6f08: [0-9a-f]* { mullla_ss r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 } + 6f10: [0-9a-f]* { mullla_ss r5, r6, r7 ; sltih r15, r16, 5 } + 6f18: [0-9a-f]* { mullla_ss r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 } + 6f20: [0-9a-f]* { mullla_ss r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 } + 6f28: [0-9a-f]* { mullla_ss r5, r6, r7 ; info 19 ; sw r25, r26 } + 6f30: [0-9a-f]* { mullla_ss r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 } + 6f38: [0-9a-f]* { mullla_ss r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 6f40: [0-9a-f]* { mullla_su r5, r6, r7 ; dtlbpr r15 } + 6f48: [0-9a-f]* { mullla_su r5, r6, r7 ; lbadd r15, r16, 5 } + 6f50: [0-9a-f]* { mullla_su r5, r6, r7 ; minih r15, r16, 5 } + 6f58: [0-9a-f]* { mullla_su r5, r6, r7 ; packlb r15, r16, r17 } + 6f60: [0-9a-f]* { mullla_su r5, r6, r7 ; shlh r15, r16, r17 } + 6f68: [0-9a-f]* { mullla_su r5, r6, r7 ; slth r15, r16, r17 } + 6f70: [0-9a-f]* { mullla_su r5, r6, r7 ; subh r15, r16, r17 } + 6f78: [0-9a-f]* { mullla_uu r5, r6, r7 ; addbs_u r15, r16, r17 } + 6f80: [0-9a-f]* { mullla_uu r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + 6f88: [0-9a-f]* { mullla_uu r5, r6, r7 ; finv r15 } + 6f90: [0-9a-f]* { mullla_uu r5, r6, r7 ; ill ; sh r25, r26 } + 6f98: [0-9a-f]* { mullla_uu r5, r6, r7 ; jalr r15 } + 6fa0: [0-9a-f]* { mullla_uu r5, r6, r7 ; rl r15, r16, r17 ; lb r25, r26 } + 6fa8: [0-9a-f]* { mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + 6fb0: [0-9a-f]* { mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 } + 6fb8: [0-9a-f]* { mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; lb_u r25, r26 } + 6fc0: [0-9a-f]* { mullla_uu r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 } + 6fc8: [0-9a-f]* { mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 } + 6fd0: [0-9a-f]* { mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; lh_u r25, r26 } + 6fd8: [0-9a-f]* { mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + 6fe0: [0-9a-f]* { mullla_uu r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + 6fe8: [0-9a-f]* { mullla_uu r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 } + 6ff0: [0-9a-f]* { mullla_uu r5, r6, r7 ; mnz r15, r16, r17 ; lh r25, r26 } + 6ff8: [0-9a-f]* { mullla_uu r5, r6, r7 ; movei r15, 5 ; lb r25, r26 } + 7000: [0-9a-f]* { mullla_uu r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 } + 7008: [0-9a-f]* { mullla_uu r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + 7010: [0-9a-f]* { mullla_uu r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 } + 7018: [0-9a-f]* { mullla_uu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + 7020: [0-9a-f]* { mullla_uu r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 } + 7028: [0-9a-f]* { mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 } + 7030: [0-9a-f]* { mullla_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 } + 7038: [0-9a-f]* { mullla_uu r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 } + 7040: [0-9a-f]* { mullla_uu r5, r6, r7 ; seq r15, r16, r17 ; sb r25, r26 } + 7048: [0-9a-f]* { mullla_uu r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 } + 7050: [0-9a-f]* { mullla_uu r5, r6, r7 ; seqi r15, r16, 5 } + 7058: [0-9a-f]* { mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 } + 7060: [0-9a-f]* { mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + 7068: [0-9a-f]* { mullla_uu r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + 7070: [0-9a-f]* { mullla_uu r5, r6, r7 ; shri r15, r16, 5 ; lb_u r25, r26 } + 7078: [0-9a-f]* { mullla_uu r5, r6, r7 ; slt r15, r16, r17 } + 7080: [0-9a-f]* { mullla_uu r5, r6, r7 ; slte r15, r16, r17 ; sh r25, r26 } + 7088: [0-9a-f]* { mullla_uu r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 } + 7090: [0-9a-f]* { mullla_uu r5, r6, r7 ; sltib_u r15, r16, 5 } + 7098: [0-9a-f]* { mullla_uu r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 } + 70a0: [0-9a-f]* { mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 } + 70a8: [0-9a-f]* { mullla_uu r5, r6, r7 ; ill ; sw r25, r26 } + 70b0: [0-9a-f]* { mullla_uu r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + 70b8: [0-9a-f]* { mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 } + 70c0: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; auli r15, r16, 4660 } + 70c8: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; lb_u r15, r16 } + 70d0: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; minib_u r15, r16, 5 } + 70d8: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; packhs r15, r16, r17 } + 70e0: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; shlb r15, r16, r17 } + 70e8: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; slteh_u r15, r16, r17 } + 70f0: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; subbs_u r15, r16, r17 } + 70f8: [0-9a-f]* { mvnz r5, r6, r7 ; addb r15, r16, r17 } + 7100: [0-9a-f]* { mvnz r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + 7108: [0-9a-f]* { mvnz r5, r6, r7 ; dtlbpr r15 } + 7110: [0-9a-f]* { mvnz r5, r6, r7 ; ill ; sb r25, r26 } + 7118: [0-9a-f]* { mvnz r5, r6, r7 ; iret } + 7120: [0-9a-f]* { mvnz r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 } + 7128: [0-9a-f]* { mvnz r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + 7130: [0-9a-f]* { mvnz r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 } + 7138: [0-9a-f]* { mvnz r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 } + 7140: [0-9a-f]* { mvnz r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 } + 7148: [0-9a-f]* { mvnz r5, r6, r7 ; srai r15, r16, 5 ; lh r25, r26 } + 7150: [0-9a-f]* { mvnz r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 } + 7158: [0-9a-f]* { mvnz r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 } + 7160: [0-9a-f]* { mvnz r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 } + 7168: [0-9a-f]* { mvnz r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + 7170: [0-9a-f]* { mvnz r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + 7178: [0-9a-f]* { mvnz r5, r6, r7 ; move r15, r16 } + 7180: [0-9a-f]* { mvnz r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + 7188: [0-9a-f]* { mvnz r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + 7190: [0-9a-f]* { mvnz r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + 7198: [0-9a-f]* { mvnz r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + 71a0: [0-9a-f]* { mvnz r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 } + 71a8: [0-9a-f]* { mvnz r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + 71b0: [0-9a-f]* { mvnz r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + 71b8: [0-9a-f]* { mvnz r5, r6, r7 ; sb r15, r16 } + 71c0: [0-9a-f]* { mvnz r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + 71c8: [0-9a-f]* { mvnz r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 } + 71d0: [0-9a-f]* { mvnz r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + 71d8: [0-9a-f]* { mvnz r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 } + 71e0: [0-9a-f]* { mvnz r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 } + 71e8: [0-9a-f]* { mvnz r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + 71f0: [0-9a-f]* { mvnz r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 } + 71f8: [0-9a-f]* { mvnz r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 } + 7200: [0-9a-f]* { mvnz r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 } + 7208: [0-9a-f]* { mvnz r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + 7210: [0-9a-f]* { mvnz r5, r6, r7 ; sltib r15, r16, 5 } + 7218: [0-9a-f]* { mvnz r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + 7220: [0-9a-f]* { mvnz r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + 7228: [0-9a-f]* { mvnz r5, r6, r7 ; sw r25, r26 } + 7230: [0-9a-f]* { mvnz r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 } + 7238: [0-9a-f]* { mvnz r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + 7240: [0-9a-f]* { mvz r5, r6, r7 ; addh r15, r16, r17 } + 7248: [0-9a-f]* { mvz r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + 7250: [0-9a-f]* { mvz r5, r6, r7 ; flush r15 } + 7258: [0-9a-f]* { mvz r5, r6, r7 ; ill ; sw r25, r26 } + 7260: [0-9a-f]* { mvz r5, r6, r7 ; jalrp r15 } + 7268: [0-9a-f]* { mvz r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + 7270: [0-9a-f]* { mvz r5, r6, r7 ; xor r15, r16, r17 ; lb r25, r26 } + 7278: [0-9a-f]* { mvz r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 7280: [0-9a-f]* { mvz r5, r6, r7 ; lb_u r25, r26 } + 7288: [0-9a-f]* { mvz r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 } + 7290: [0-9a-f]* { mvz r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 } + 7298: [0-9a-f]* { mvz r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 72a0: [0-9a-f]* { mvz r5, r6, r7 ; lh_u r25, r26 } + 72a8: [0-9a-f]* { mvz r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + 72b0: [0-9a-f]* { mvz r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + 72b8: [0-9a-f]* { mvz r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 } + 72c0: [0-9a-f]* { mvz r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + 72c8: [0-9a-f]* { mvz r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 } + 72d0: [0-9a-f]* { mvz r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 } + 72d8: [0-9a-f]* { mvz r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 } + 72e0: [0-9a-f]* { mvz r5, r6, r7 ; nop ; prefetch r25 } + 72e8: [0-9a-f]* { mvz r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 } + 72f0: [0-9a-f]* { mvz r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 } + 72f8: [0-9a-f]* { mvz r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 } + 7300: [0-9a-f]* { mvz r5, r6, r7 ; addi r15, r16, 5 ; sb r25, r26 } + 7308: [0-9a-f]* { mvz r5, r6, r7 ; seqi r15, r16, 5 ; sb r25, r26 } + 7310: [0-9a-f]* { mvz r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 } + 7318: [0-9a-f]* { mvz r5, r6, r7 ; seqib r15, r16, 5 } + 7320: [0-9a-f]* { mvz r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 } + 7328: [0-9a-f]* { mvz r5, r6, r7 ; sh r25, r26 } + 7330: [0-9a-f]* { mvz r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + 7338: [0-9a-f]* { mvz r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 } + 7340: [0-9a-f]* { mvz r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 } + 7348: [0-9a-f]* { mvz r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 } + 7350: [0-9a-f]* { mvz r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 } + 7358: [0-9a-f]* { mvz r5, r6, r7 ; sltih r15, r16, 5 } + 7360: [0-9a-f]* { mvz r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 } + 7368: [0-9a-f]* { mvz r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 } + 7370: [0-9a-f]* { mvz r5, r6, r7 ; info 19 ; sw r25, r26 } + 7378: [0-9a-f]* { mvz r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 } + 7380: [0-9a-f]* { mvz r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 7388: [0-9a-f]* { mz r15, r16, r17 ; addi r5, r6, 5 ; lb r25, r26 } + 7390: [0-9a-f]* { mz r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 } + 7398: [0-9a-f]* { bitx r5, r6 ; mz r15, r16, r17 ; lb r25, r26 } + 73a0: [0-9a-f]* { clz r5, r6 ; mz r15, r16, r17 ; lb r25, r26 } + 73a8: [0-9a-f]* { ctz r5, r6 ; mz r15, r16, r17 ; sw r25, r26 } + 73b0: [0-9a-f]* { mz r15, r16, r17 ; info 19 ; sh r25, r26 } + 73b8: [0-9a-f]* { mz r15, r16, r17 ; movei r5, 5 ; lb r25, r26 } + 73c0: [0-9a-f]* { mz r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 } + 73c8: [0-9a-f]* { tblidxb1 r5, r6 ; mz r15, r16, r17 ; lb r25, r26 } + 73d0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; mz r15, r16, r17 ; lb_u r25, r26 } + 73d8: [0-9a-f]* { mz r15, r16, r17 ; seq r5, r6, r7 ; lb_u r25, r26 } + 73e0: [0-9a-f]* { mz r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 } + 73e8: [0-9a-f]* { mulll_ss r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + 73f0: [0-9a-f]* { mz r15, r16, r17 ; shli r5, r6, 5 ; lh r25, r26 } + 73f8: [0-9a-f]* { mz r15, r16, r17 ; addi r5, r6, 5 ; lh_u r25, r26 } + 7400: [0-9a-f]* { mullla_uu r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 } + 7408: [0-9a-f]* { mz r15, r16, r17 ; slt r5, r6, r7 ; lh_u r25, r26 } + 7410: [0-9a-f]* { bitx r5, r6 ; mz r15, r16, r17 ; lw r25, r26 } + 7418: [0-9a-f]* { mz r15, r16, r17 ; mz r5, r6, r7 ; lw r25, r26 } + 7420: [0-9a-f]* { mz r15, r16, r17 ; slte_u r5, r6, r7 ; lw r25, r26 } + 7428: [0-9a-f]* { mz r15, r16, r17 ; minih r5, r6, 5 } + 7430: [0-9a-f]* { mz r15, r16, r17 ; move r5, r6 ; sb r25, r26 } + 7438: [0-9a-f]* { mulhh_ss r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 } + 7440: [0-9a-f]* { mulhha_ss r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 } + 7448: [0-9a-f]* { mulhl_su r5, r6, r7 ; mz r15, r16, r17 } + 7450: [0-9a-f]* { mulll_ss r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 } + 7458: [0-9a-f]* { mullla_ss r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + 7460: [0-9a-f]* { mvnz r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 } + 7468: [0-9a-f]* { mz r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 } + 7470: [0-9a-f]* { mz r15, r16, r17 ; nop ; sw r25, r26 } + 7478: [0-9a-f]* { mz r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 } + 7480: [0-9a-f]* { pcnt r5, r6 ; mz r15, r16, r17 ; lw r25, r26 } + 7488: [0-9a-f]* { mulhh_uu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + 7490: [0-9a-f]* { mz r15, r16, r17 ; s3a r5, r6, r7 ; prefetch r25 } + 7498: [0-9a-f]* { tblidxb3 r5, r6 ; mz r15, r16, r17 ; prefetch r25 } + 74a0: [0-9a-f]* { mz r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 } + 74a8: [0-9a-f]* { mz r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 } + 74b0: [0-9a-f]* { mz r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 } + 74b8: [0-9a-f]* { mullla_uu r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + 74c0: [0-9a-f]* { mz r15, r16, r17 ; slt r5, r6, r7 ; sb r25, r26 } + 74c8: [0-9a-f]* { mz r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 } + 74d0: [0-9a-f]* { mz r15, r16, r17 ; add r5, r6, r7 ; sh r25, r26 } + 74d8: [0-9a-f]* { mullla_ss r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 } + 74e0: [0-9a-f]* { mz r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 } + 74e8: [0-9a-f]* { mz r15, r16, r17 ; shl r5, r6, r7 ; lh_u r25, r26 } + 74f0: [0-9a-f]* { mz r15, r16, r17 ; shlih r5, r6, 5 } + 74f8: [0-9a-f]* { mz r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 } + 7500: [0-9a-f]* { mz r15, r16, r17 ; slt_u r5, r6, r7 ; prefetch r25 } + 7508: [0-9a-f]* { mz r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 } + 7510: [0-9a-f]* { mz r15, r16, r17 ; slti r5, r6, 5 ; sh r25, r26 } + 7518: [0-9a-f]* { mz r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 } + 7520: [0-9a-f]* { mz r15, r16, r17 ; srah r5, r6, r7 } + 7528: [0-9a-f]* { mz r15, r16, r17 ; sub r5, r6, r7 ; sh r25, r26 } + 7530: [0-9a-f]* { mz r15, r16, r17 ; movei r5, 5 ; sw r25, r26 } + 7538: [0-9a-f]* { mz r15, r16, r17 ; s1a r5, r6, r7 ; sw r25, r26 } + 7540: [0-9a-f]* { tblidxb1 r5, r6 ; mz r15, r16, r17 ; sw r25, r26 } + 7548: [0-9a-f]* { tblidxb1 r5, r6 ; mz r15, r16, r17 ; prefetch r25 } + 7550: [0-9a-f]* { tblidxb3 r5, r6 ; mz r15, r16, r17 ; prefetch r25 } + 7558: [0-9a-f]* { mz r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 } + 7560: [0-9a-f]* { mz r5, r6, r7 ; addib r15, r16, 5 } + 7568: [0-9a-f]* { mz r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 7570: [0-9a-f]* { mz r5, r6, r7 ; ill ; lb r25, r26 } + 7578: [0-9a-f]* { mz r5, r6, r7 ; infol 4660 } + 7580: [0-9a-f]* { mz r5, r6, r7 ; move r15, r16 ; lb r25, r26 } + 7588: [0-9a-f]* { mz r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 } + 7590: [0-9a-f]* { mz r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + 7598: [0-9a-f]* { mz r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + 75a0: [0-9a-f]* { mz r5, r6, r7 ; move r15, r16 ; lh r25, r26 } + 75a8: [0-9a-f]* { mz r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 } + 75b0: [0-9a-f]* { mz r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 } + 75b8: [0-9a-f]* { mz r5, r6, r7 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + 75c0: [0-9a-f]* { mz r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 } + 75c8: [0-9a-f]* { mz r5, r6, r7 ; slt_u r15, r16, r17 ; lw r25, r26 } + 75d0: [0-9a-f]* { mz r5, r6, r7 ; minb_u r15, r16, r17 } + 75d8: [0-9a-f]* { mz r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 } + 75e0: [0-9a-f]* { mz r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 } + 75e8: [0-9a-f]* { mz r5, r6, r7 ; nop ; sw r25, r26 } + 75f0: [0-9a-f]* { mz r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 } + 75f8: [0-9a-f]* { mz r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 7600: [0-9a-f]* { mz r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + 7608: [0-9a-f]* { mz r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + 7610: [0-9a-f]* { mz r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 } + 7618: [0-9a-f]* { mz r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 } + 7620: [0-9a-f]* { mz r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 } + 7628: [0-9a-f]* { mz r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 } + 7630: [0-9a-f]* { mz r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 } + 7638: [0-9a-f]* { mz r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + 7640: [0-9a-f]* { mz r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 } + 7648: [0-9a-f]* { mz r5, r6, r7 ; shlb r15, r16, r17 } + 7650: [0-9a-f]* { mz r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 } + 7658: [0-9a-f]* { mz r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 } + 7660: [0-9a-f]* { mz r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 } + 7668: [0-9a-f]* { mz r5, r6, r7 ; slteb r15, r16, r17 } + 7670: [0-9a-f]* { mz r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 } + 7678: [0-9a-f]* { mz r5, r6, r7 ; sneb r15, r16, r17 } + 7680: [0-9a-f]* { mz r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 } + 7688: [0-9a-f]* { mz r5, r6, r7 ; subs r15, r16, r17 } + 7690: [0-9a-f]* { mz r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + 7698: [0-9a-f]* { mz r5, r6, r7 ; swadd r15, r16, 5 } + 76a0: [0-9a-f]* { mzb r15, r16, r17 ; addib r5, r6, 5 } + 76a8: [0-9a-f]* { mzb r15, r16, r17 ; info 19 } + 76b0: [0-9a-f]* { mzb r15, r16, r17 ; moveli r5, 4660 } + 76b8: [0-9a-f]* { mulll_uu r5, r6, r7 ; mzb r15, r16, r17 } + 76c0: [0-9a-f]* { mzb r15, r16, r17 ; rli r5, r6, 5 } + 76c8: [0-9a-f]* { mzb r15, r16, r17 ; shlib r5, r6, 5 } + 76d0: [0-9a-f]* { mzb r15, r16, r17 ; slti r5, r6, 5 } + 76d8: [0-9a-f]* { mzb r15, r16, r17 ; subs r5, r6, r7 } + 76e0: [0-9a-f]* { mzb r5, r6, r7 ; auli r15, r16, 4660 } + 76e8: [0-9a-f]* { mzb r5, r6, r7 ; lb_u r15, r16 } + 76f0: [0-9a-f]* { mzb r5, r6, r7 ; minib_u r15, r16, 5 } + 76f8: [0-9a-f]* { mzb r5, r6, r7 ; packhs r15, r16, r17 } + 7700: [0-9a-f]* { mzb r5, r6, r7 ; shlb r15, r16, r17 } + 7708: [0-9a-f]* { mzb r5, r6, r7 ; slteh_u r15, r16, r17 } + 7710: [0-9a-f]* { mzb r5, r6, r7 ; subbs_u r15, r16, r17 } + 7718: [0-9a-f]* { mzh r15, r16, r17 ; adds r5, r6, r7 } + 7720: [0-9a-f]* { mzh r15, r16, r17 ; intlb r5, r6, r7 } + 7728: [0-9a-f]* { mulhh_uu r5, r6, r7 ; mzh r15, r16, r17 } + 7730: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; mzh r15, r16, r17 } + 7738: [0-9a-f]* { sadab_u r5, r6, r7 ; mzh r15, r16, r17 } + 7740: [0-9a-f]* { mzh r15, r16, r17 ; shrh r5, r6, r7 } + 7748: [0-9a-f]* { mzh r15, r16, r17 ; sltih r5, r6, 5 } + 7750: [0-9a-f]* { tblidxb3 r5, r6 ; mzh r15, r16, r17 } + 7758: [0-9a-f]* { mzh r5, r6, r7 } + 7760: [0-9a-f]* { mzh r5, r6, r7 ; lh_u r15, r16 } + 7768: [0-9a-f]* { mzh r5, r6, r7 ; mnzb r15, r16, r17 } + 7770: [0-9a-f]* { mzh r5, r6, r7 ; rl r15, r16, r17 } + 7778: [0-9a-f]* { mzh r5, r6, r7 ; shlih r15, r16, 5 } + 7780: [0-9a-f]* { mzh r5, r6, r7 ; slti_u r15, r16, 5 } + 7788: [0-9a-f]* { mzh r5, r6, r7 ; sw r15, r16 } + 7790: [0-9a-f]* { nop ; add r5, r6, r7 ; lh_u r25, r26 } + 7798: [0-9a-f]* { nop ; addi r15, r16, 5 ; prefetch r25 } + 77a0: [0-9a-f]* { nop ; addli r5, r6, 4660 } + 77a8: [0-9a-f]* { nop ; and r5, r6, r7 ; lh_u r25, r26 } + 77b0: [0-9a-f]* { nop ; andi r5, r6, 5 ; lh_u r25, r26 } + 77b8: [0-9a-f]* { bitx r5, r6 ; nop } + 77c0: [0-9a-f]* { clz r5, r6 ; nop ; sw r25, r26 } + 77c8: [0-9a-f]* { nop ; lb_u r25, r26 } + 77d0: [0-9a-f]* { nop ; info 19 ; lb r25, r26 } + 77d8: [0-9a-f]* { nop ; iret } + 77e0: [0-9a-f]* { nop ; info 19 ; lb r25, r26 } + 77e8: [0-9a-f]* { nop ; nop ; lb r25, r26 } + 77f0: [0-9a-f]* { nop ; seqi r15, r16, 5 ; lb r25, r26 } + 77f8: [0-9a-f]* { nop ; slti_u r15, r16, 5 ; lb r25, r26 } + 7800: [0-9a-f]* { nop ; addi r15, r16, 5 ; lb_u r25, r26 } + 7808: [0-9a-f]* { mulhh_uu r5, r6, r7 ; nop ; lb_u r25, r26 } + 7810: [0-9a-f]* { nop ; rl r15, r16, r17 ; lb_u r25, r26 } + 7818: [0-9a-f]* { nop ; shri r15, r16, 5 ; lb_u r25, r26 } + 7820: [0-9a-f]* { nop ; sub r15, r16, r17 ; lb_u r25, r26 } + 7828: [0-9a-f]* { bitx r5, r6 ; nop ; lh r25, r26 } + 7830: [0-9a-f]* { mullla_ss r5, r6, r7 ; nop ; lh r25, r26 } + 7838: [0-9a-f]* { nop ; s2a r15, r16, r17 ; lh r25, r26 } + 7840: [0-9a-f]* { nop ; slte r15, r16, r17 ; lh r25, r26 } + 7848: [0-9a-f]* { nop ; xor r15, r16, r17 ; lh r25, r26 } + 7850: [0-9a-f]* { nop ; mnz r5, r6, r7 ; lh_u r25, r26 } + 7858: [0-9a-f]* { nop ; nor r5, r6, r7 ; lh_u r25, r26 } + 7860: [0-9a-f]* { nop ; shl r15, r16, r17 ; lh_u r25, r26 } + 7868: [0-9a-f]* { nop ; sne r15, r16, r17 ; lh_u r25, r26 } + 7870: [0-9a-f]* { nop ; add r5, r6, r7 ; lw r25, r26 } + 7878: [0-9a-f]* { mulhh_ss r5, r6, r7 ; nop ; lw r25, r26 } + 7880: [0-9a-f]* { pcnt r5, r6 ; nop ; lw r25, r26 } + 7888: [0-9a-f]* { nop ; shr r5, r6, r7 ; lw r25, r26 } + 7890: [0-9a-f]* { nop ; srai r5, r6, 5 ; lw r25, r26 } + 7898: [0-9a-f]* { nop ; maxih r5, r6, 5 } + 78a0: [0-9a-f]* { nop ; mnz r15, r16, r17 ; sh r25, r26 } + 78a8: [0-9a-f]* { nop ; move r15, r16 ; lh_u r25, r26 } + 78b0: [0-9a-f]* { nop ; movei r15, 5 ; lh_u r25, r26 } + 78b8: [0-9a-f]* { nop ; moveli.sn r5, 4660 } + 78c0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; nop ; sh r25, r26 } + 78c8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; nop ; sb r25, r26 } + 78d0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; nop ; sh r25, r26 } + 78d8: [0-9a-f]* { mulll_uu r5, r6, r7 ; nop ; sb r25, r26 } + 78e0: [0-9a-f]* { mullla_uu r5, r6, r7 ; nop ; prefetch r25 } + 78e8: [0-9a-f]* { mvz r5, r6, r7 ; nop ; lw r25, r26 } + 78f0: [0-9a-f]* { nop ; mz r5, r6, r7 ; lw r25, r26 } + 78f8: [0-9a-f]* { nop ; nop } + 7900: [0-9a-f]* { nop ; nor r5, r6, r7 } + 7908: [0-9a-f]* { nop ; or r5, r6, r7 } + 7910: [0-9a-f]* { nop ; ori r5, r6, 5 } + 7918: [0-9a-f]* { nop ; add r15, r16, r17 ; prefetch r25 } + 7920: [0-9a-f]* { nop ; movei r5, 5 ; prefetch r25 } + 7928: [0-9a-f]* { nop ; ori r5, r6, 5 ; prefetch r25 } + 7930: [0-9a-f]* { nop ; shr r15, r16, r17 ; prefetch r25 } + 7938: [0-9a-f]* { nop ; srai r15, r16, 5 ; prefetch r25 } + 7940: [0-9a-f]* { nop ; rl r15, r16, r17 ; sw r25, r26 } + 7948: [0-9a-f]* { nop ; rli r15, r16, 5 ; sw r25, r26 } + 7950: [0-9a-f]* { nop ; s1a r15, r16, r17 ; sw r25, r26 } + 7958: [0-9a-f]* { nop ; s2a r15, r16, r17 ; sw r25, r26 } + 7960: [0-9a-f]* { nop ; s3a r15, r16, r17 ; sw r25, r26 } + 7968: [0-9a-f]* { nop ; add r5, r6, r7 ; sb r25, r26 } + 7970: [0-9a-f]* { mulhh_ss r5, r6, r7 ; nop ; sb r25, r26 } + 7978: [0-9a-f]* { pcnt r5, r6 ; nop ; sb r25, r26 } + 7980: [0-9a-f]* { nop ; shr r5, r6, r7 ; sb r25, r26 } + 7988: [0-9a-f]* { nop ; srai r5, r6, 5 ; sb r25, r26 } + 7990: [0-9a-f]* { nop ; seq r15, r16, r17 } + 7998: [0-9a-f]* { nop ; seqi r15, r16, 5 ; prefetch r25 } + 79a0: [0-9a-f]* { nop ; add r15, r16, r17 ; sh r25, r26 } + 79a8: [0-9a-f]* { nop ; movei r5, 5 ; sh r25, r26 } + 79b0: [0-9a-f]* { nop ; ori r5, r6, 5 ; sh r25, r26 } + 79b8: [0-9a-f]* { nop ; shr r15, r16, r17 ; sh r25, r26 } + 79c0: [0-9a-f]* { nop ; srai r15, r16, 5 ; sh r25, r26 } + 79c8: [0-9a-f]* { nop ; shl r15, r16, r17 ; sw r25, r26 } + 79d0: [0-9a-f]* { nop ; shli r15, r16, 5 ; lw r25, r26 } + 79d8: [0-9a-f]* { nop ; shr r15, r16, r17 ; lb r25, r26 } + 79e0: [0-9a-f]* { nop ; shrb r15, r16, r17 } + 79e8: [0-9a-f]* { nop ; shri r5, r6, 5 ; sb r25, r26 } + 79f0: [0-9a-f]* { nop ; slt r5, r6, r7 ; lh r25, r26 } + 79f8: [0-9a-f]* { nop ; slt_u r5, r6, r7 ; lh r25, r26 } + 7a00: [0-9a-f]* { nop ; slte r15, r16, r17 ; sw r25, r26 } + 7a08: [0-9a-f]* { nop ; slte_u r15, r16, r17 ; sw r25, r26 } + 7a10: [0-9a-f]* { nop ; slth r15, r16, r17 } + 7a18: [0-9a-f]* { nop ; slti r5, r6, 5 ; sb r25, r26 } + 7a20: [0-9a-f]* { nop ; slti_u r5, r6, 5 ; sb r25, r26 } + 7a28: [0-9a-f]* { nop ; sne r15, r16, r17 ; sw r25, r26 } + 7a30: [0-9a-f]* { nop ; sra r15, r16, r17 ; lw r25, r26 } + 7a38: [0-9a-f]* { nop ; srai r15, r16, 5 ; lb r25, r26 } + 7a40: [0-9a-f]* { nop ; sraib r15, r16, 5 } + 7a48: [0-9a-f]* { nop ; sub r5, r6, r7 ; sb r25, r26 } + 7a50: [0-9a-f]* { nop ; and r5, r6, r7 ; sw r25, r26 } + 7a58: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; nop ; sw r25, r26 } + 7a60: [0-9a-f]* { nop ; rli r5, r6, 5 ; sw r25, r26 } + 7a68: [0-9a-f]* { nop ; slt r5, r6, r7 ; sw r25, r26 } + 7a70: [0-9a-f]* { tblidxb1 r5, r6 ; nop ; sw r25, r26 } + 7a78: [0-9a-f]* { tblidxb0 r5, r6 ; nop } + 7a80: [0-9a-f]* { tblidxb2 r5, r6 ; nop } + 7a88: [0-9a-f]* { nop ; xor r15, r16, r17 ; sh r25, r26 } + 7a90: [0-9a-f]* { nor r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 } + 7a98: [0-9a-f]* { nor r15, r16, r17 ; addih r5, r6, 5 } + 7aa0: [0-9a-f]* { nor r15, r16, r17 ; andi r5, r6, 5 ; lw r25, r26 } + 7aa8: [0-9a-f]* { bytex r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 } + 7ab0: [0-9a-f]* { crc32_8 r5, r6, r7 ; nor r15, r16, r17 } + 7ab8: [0-9a-f]* { nor r15, r16, r17 ; sw r25, r26 } + 7ac0: [0-9a-f]* { nor r15, r16, r17 ; andi r5, r6, 5 ; lb r25, r26 } + 7ac8: [0-9a-f]* { mvz r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 } + 7ad0: [0-9a-f]* { nor r15, r16, r17 ; slte r5, r6, r7 ; lb r25, r26 } + 7ad8: [0-9a-f]* { clz r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 } + 7ae0: [0-9a-f]* { nor r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 } + 7ae8: [0-9a-f]* { nor r15, r16, r17 ; slti_u r5, r6, 5 ; lb_u r25, r26 } + 7af0: [0-9a-f]* { nor r15, r16, r17 ; info 19 ; lh r25, r26 } + 7af8: [0-9a-f]* { pcnt r5, r6 ; nor r15, r16, r17 ; lh r25, r26 } + 7b00: [0-9a-f]* { nor r15, r16, r17 ; srai r5, r6, 5 ; lh r25, r26 } + 7b08: [0-9a-f]* { nor r15, r16, r17 ; movei r5, 5 ; lh_u r25, r26 } + 7b10: [0-9a-f]* { nor r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 } + 7b18: [0-9a-f]* { tblidxb1 r5, r6 ; nor r15, r16, r17 ; lh_u r25, r26 } + 7b20: [0-9a-f]* { mulhha_ss r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + 7b28: [0-9a-f]* { nor r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 } + 7b30: [0-9a-f]* { nor r15, r16, r17 ; xor r5, r6, r7 ; lw r25, r26 } + 7b38: [0-9a-f]* { nor r15, r16, r17 ; mnz r5, r6, r7 } + 7b40: [0-9a-f]* { nor r15, r16, r17 ; movei r5, 5 ; sh r25, r26 } + 7b48: [0-9a-f]* { mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + 7b50: [0-9a-f]* { mulhha_uu r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + 7b58: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + 7b60: [0-9a-f]* { mulll_uu r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + 7b68: [0-9a-f]* { mullla_uu r5, r6, r7 ; nor r15, r16, r17 ; lh r25, r26 } + 7b70: [0-9a-f]* { mvz r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 } + 7b78: [0-9a-f]* { nor r15, r16, r17 ; mzh r5, r6, r7 } + 7b80: [0-9a-f]* { nor r15, r16, r17 ; nor r5, r6, r7 } + 7b88: [0-9a-f]* { nor r15, r16, r17 ; ori r5, r6, 5 } + 7b90: [0-9a-f]* { bytex r5, r6 ; nor r15, r16, r17 ; prefetch r25 } + 7b98: [0-9a-f]* { nor r15, r16, r17 ; nop ; prefetch r25 } + 7ba0: [0-9a-f]* { nor r15, r16, r17 ; slti r5, r6, 5 ; prefetch r25 } + 7ba8: [0-9a-f]* { nor r15, r16, r17 ; rl r5, r6, r7 ; sw r25, r26 } + 7bb0: [0-9a-f]* { nor r15, r16, r17 ; s1a r5, r6, r7 ; sw r25, r26 } + 7bb8: [0-9a-f]* { nor r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 } + 7bc0: [0-9a-f]* { nor r15, r16, r17 ; movei r5, 5 ; sb r25, r26 } + 7bc8: [0-9a-f]* { nor r15, r16, r17 ; s1a r5, r6, r7 ; sb r25, r26 } + 7bd0: [0-9a-f]* { tblidxb1 r5, r6 ; nor r15, r16, r17 ; sb r25, r26 } + 7bd8: [0-9a-f]* { nor r15, r16, r17 ; seqi r5, r6, 5 ; lh_u r25, r26 } + 7be0: [0-9a-f]* { nor r15, r16, r17 ; move r5, r6 ; sh r25, r26 } + 7be8: [0-9a-f]* { nor r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 } + 7bf0: [0-9a-f]* { tblidxb0 r5, r6 ; nor r15, r16, r17 ; sh r25, r26 } + 7bf8: [0-9a-f]* { nor r15, r16, r17 ; shli r5, r6, 5 ; lh r25, r26 } + 7c00: [0-9a-f]* { nor r15, r16, r17 ; shrb r5, r6, r7 } + 7c08: [0-9a-f]* { nor r15, r16, r17 ; slt r5, r6, r7 ; sb r25, r26 } + 7c10: [0-9a-f]* { nor r15, r16, r17 ; slte r5, r6, r7 ; lw r25, r26 } + 7c18: [0-9a-f]* { nor r15, r16, r17 ; slth r5, r6, r7 } + 7c20: [0-9a-f]* { nor r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 } + 7c28: [0-9a-f]* { nor r15, r16, r17 ; sra r5, r6, r7 ; lh r25, r26 } + 7c30: [0-9a-f]* { nor r15, r16, r17 ; sraib r5, r6, 5 } + 7c38: [0-9a-f]* { nor r15, r16, r17 ; andi r5, r6, 5 ; sw r25, r26 } + 7c40: [0-9a-f]* { mvz r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + 7c48: [0-9a-f]* { nor r15, r16, r17 ; slte r5, r6, r7 ; sw r25, r26 } + 7c50: [0-9a-f]* { tblidxb0 r5, r6 ; nor r15, r16, r17 ; sb r25, r26 } + 7c58: [0-9a-f]* { tblidxb2 r5, r6 ; nor r15, r16, r17 ; sb r25, r26 } + 7c60: [0-9a-f]* { nor r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 } + 7c68: [0-9a-f]* { nor r5, r6, r7 ; addi r15, r16, 5 ; lb_u r25, r26 } + 7c70: [0-9a-f]* { nor r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 } + 7c78: [0-9a-f]* { nor r5, r6, r7 ; lh r25, r26 } + 7c80: [0-9a-f]* { nor r5, r6, r7 ; info 19 ; lb_u r25, r26 } + 7c88: [0-9a-f]* { nor r5, r6, r7 ; lb r15, r16 } + 7c90: [0-9a-f]* { nor r5, r6, r7 ; s3a r15, r16, r17 ; lb r25, r26 } + 7c98: [0-9a-f]* { nor r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 } + 7ca0: [0-9a-f]* { nor r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 } + 7ca8: [0-9a-f]* { nor r5, r6, r7 ; lh r15, r16 } + 7cb0: [0-9a-f]* { nor r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 } + 7cb8: [0-9a-f]* { nor r5, r6, r7 ; add r15, r16, r17 ; lh_u r25, r26 } + 7cc0: [0-9a-f]* { nor r5, r6, r7 ; seq r15, r16, r17 ; lh_u r25, r26 } + 7cc8: [0-9a-f]* { nor r5, r6, r7 ; lnk r15 } + 7cd0: [0-9a-f]* { nor r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + 7cd8: [0-9a-f]* { nor r5, r6, r7 ; lw_na r15, r16 } + 7ce0: [0-9a-f]* { nor r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + 7ce8: [0-9a-f]* { nor r5, r6, r7 ; movei r15, 5 ; lw r25, r26 } + 7cf0: [0-9a-f]* { nor r5, r6, r7 ; mzh r15, r16, r17 } + 7cf8: [0-9a-f]* { nor r5, r6, r7 ; nor r15, r16, r17 } + 7d00: [0-9a-f]* { nor r5, r6, r7 ; ori r15, r16, 5 } + 7d08: [0-9a-f]* { nor r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 } + 7d10: [0-9a-f]* { nor r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 } + 7d18: [0-9a-f]* { nor r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 } + 7d20: [0-9a-f]* { nor r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 } + 7d28: [0-9a-f]* { nor r5, r6, r7 ; sb r25, r26 } + 7d30: [0-9a-f]* { nor r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 } + 7d38: [0-9a-f]* { nor r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 } + 7d40: [0-9a-f]* { nor r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 } + 7d48: [0-9a-f]* { nor r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 } + 7d50: [0-9a-f]* { nor r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 } + 7d58: [0-9a-f]* { nor r5, r6, r7 ; shli r15, r16, 5 } + 7d60: [0-9a-f]* { nor r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 } + 7d68: [0-9a-f]* { nor r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + 7d70: [0-9a-f]* { nor r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + 7d78: [0-9a-f]* { nor r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 } + 7d80: [0-9a-f]* { nor r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 } + 7d88: [0-9a-f]* { nor r5, r6, r7 ; sra r15, r16, r17 } + 7d90: [0-9a-f]* { nor r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + 7d98: [0-9a-f]* { nor r5, r6, r7 ; movei r15, 5 ; sw r25, r26 } + 7da0: [0-9a-f]* { nor r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 } + 7da8: [0-9a-f]* { nor r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 } + 7db0: [0-9a-f]* { or r15, r16, r17 ; addi r5, r6, 5 ; lh_u r25, r26 } + 7db8: [0-9a-f]* { or r15, r16, r17 ; and r5, r6, r7 ; sb r25, r26 } + 7dc0: [0-9a-f]* { bitx r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 } + 7dc8: [0-9a-f]* { clz r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 } + 7dd0: [0-9a-f]* { or r15, r16, r17 ; lb r25, r26 } + 7dd8: [0-9a-f]* { or r15, r16, r17 ; infol 4660 } + 7de0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; or r15, r16, r17 ; lb r25, r26 } + 7de8: [0-9a-f]* { or r15, r16, r17 ; seq r5, r6, r7 ; lb r25, r26 } + 7df0: [0-9a-f]* { or r15, r16, r17 ; xor r5, r6, r7 ; lb r25, r26 } + 7df8: [0-9a-f]* { mulll_ss r5, r6, r7 ; or r15, r16, r17 ; lb_u r25, r26 } + 7e00: [0-9a-f]* { or r15, r16, r17 ; shli r5, r6, 5 ; lb_u r25, r26 } + 7e08: [0-9a-f]* { or r15, r16, r17 ; addi r5, r6, 5 ; lh r25, r26 } + 7e10: [0-9a-f]* { mullla_uu r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + 7e18: [0-9a-f]* { or r15, r16, r17 ; slt r5, r6, r7 ; lh r25, r26 } + 7e20: [0-9a-f]* { bitx r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 } + 7e28: [0-9a-f]* { or r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 } + 7e30: [0-9a-f]* { or r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 } + 7e38: [0-9a-f]* { ctz r5, r6 ; or r15, r16, r17 ; lw r25, r26 } + 7e40: [0-9a-f]* { or r15, r16, r17 ; or r5, r6, r7 ; lw r25, r26 } + 7e48: [0-9a-f]* { or r15, r16, r17 ; sne r5, r6, r7 ; lw r25, r26 } + 7e50: [0-9a-f]* { or r15, r16, r17 ; mnz r5, r6, r7 ; lb_u r25, r26 } + 7e58: [0-9a-f]* { or r15, r16, r17 ; move r5, r6 } + 7e60: [0-9a-f]* { mulhh_ss r5, r6, r7 ; or r15, r16, r17 ; sh r25, r26 } + 7e68: [0-9a-f]* { mulhha_ss r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 } + 7e70: [0-9a-f]* { mulhla_ss r5, r6, r7 ; or r15, r16, r17 } + 7e78: [0-9a-f]* { mulll_ss r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 } + 7e80: [0-9a-f]* { mullla_ss r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } + 7e88: [0-9a-f]* { mvnz r5, r6, r7 ; or r15, r16, r17 ; lh_u r25, r26 } + 7e90: [0-9a-f]* { or r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 } + 7e98: [0-9a-f]* { or r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 } + 7ea0: [0-9a-f]* { or r15, r16, r17 ; ori r5, r6, 5 ; lb_u r25, r26 } + 7ea8: [0-9a-f]* { pcnt r5, r6 ; or r15, r16, r17 ; sh r25, r26 } + 7eb0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } + 7eb8: [0-9a-f]* { or r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 } + 7ec0: [0-9a-f]* { or r15, r16, r17 ; rl r5, r6, r7 ; lb r25, r26 } + 7ec8: [0-9a-f]* { or r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 } + 7ed0: [0-9a-f]* { or r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 } + 7ed8: [0-9a-f]* { bitx r5, r6 ; or r15, r16, r17 ; sb r25, r26 } + 7ee0: [0-9a-f]* { or r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 } + 7ee8: [0-9a-f]* { or r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 } + 7ef0: [0-9a-f]* { or r15, r16, r17 ; seq r5, r6, r7 ; sh r25, r26 } + 7ef8: [0-9a-f]* { or r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + 7f00: [0-9a-f]* { mvz r5, r6, r7 ; or r15, r16, r17 ; sh r25, r26 } + 7f08: [0-9a-f]* { or r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + 7f10: [0-9a-f]* { or r15, r16, r17 ; shl r5, r6, r7 ; sb r25, r26 } + 7f18: [0-9a-f]* { or r15, r16, r17 ; shr r5, r6, r7 ; lh r25, r26 } + 7f20: [0-9a-f]* { or r15, r16, r17 ; shrib r5, r6, 5 } + 7f28: [0-9a-f]* { or r15, r16, r17 ; slt_u r5, r6, r7 ; sw r25, r26 } + 7f30: [0-9a-f]* { or r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 } + 7f38: [0-9a-f]* { or r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 } + 7f40: [0-9a-f]* { or r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 } + 7f48: [0-9a-f]* { or r15, r16, r17 ; srai r5, r6, 5 ; lh r25, r26 } + 7f50: [0-9a-f]* { or r15, r16, r17 ; subb r5, r6, r7 } + 7f58: [0-9a-f]* { mulhha_ss r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 } + 7f60: [0-9a-f]* { or r15, r16, r17 ; seq r5, r6, r7 ; sw r25, r26 } + 7f68: [0-9a-f]* { or r15, r16, r17 ; xor r5, r6, r7 ; sw r25, r26 } + 7f70: [0-9a-f]* { tblidxb1 r5, r6 ; or r15, r16, r17 ; sw r25, r26 } + 7f78: [0-9a-f]* { tblidxb3 r5, r6 ; or r15, r16, r17 ; sw r25, r26 } + 7f80: [0-9a-f]* { or r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 } + 7f88: [0-9a-f]* { or r5, r6, r7 ; addli.sn r15, r16, 4660 } + 7f90: [0-9a-f]* { or r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 } + 7f98: [0-9a-f]* { or r5, r6, r7 ; ill ; lh_u r25, r26 } + 7fa0: [0-9a-f]* { or r5, r6, r7 ; intlb r15, r16, r17 } + 7fa8: [0-9a-f]* { or r5, r6, r7 ; nop ; lb r25, r26 } + 7fb0: [0-9a-f]* { or r5, r6, r7 ; slti_u r15, r16, 5 ; lb r25, r26 } + 7fb8: [0-9a-f]* { or r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 } + 7fc0: [0-9a-f]* { or r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 } + 7fc8: [0-9a-f]* { or r5, r6, r7 ; nop ; lh r25, r26 } + 7fd0: [0-9a-f]* { or r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 } + 7fd8: [0-9a-f]* { or r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + 7fe0: [0-9a-f]* { or r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 } + 7fe8: [0-9a-f]* { or r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 } + 7ff0: [0-9a-f]* { or r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + 7ff8: [0-9a-f]* { or r5, r6, r7 ; minih r15, r16, 5 } + 8000: [0-9a-f]* { or r5, r6, r7 ; move r15, r16 ; sb r25, r26 } + 8008: [0-9a-f]* { or r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 } + 8010: [0-9a-f]* { or r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 } + 8018: [0-9a-f]* { or r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 } + 8020: [0-9a-f]* { or r5, r6, r7 ; info 19 ; prefetch r25 } + 8028: [0-9a-f]* { or r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 } + 8030: [0-9a-f]* { or r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 } + 8038: [0-9a-f]* { or r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 } + 8040: [0-9a-f]* { or r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 } + 8048: [0-9a-f]* { or r5, r6, r7 ; rli r15, r16, 5 ; sb r25, r26 } + 8050: [0-9a-f]* { or r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 } + 8058: [0-9a-f]* { or r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 } + 8060: [0-9a-f]* { or r5, r6, r7 ; nor r15, r16, r17 ; sh r25, r26 } + 8068: [0-9a-f]* { or r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 } + 8070: [0-9a-f]* { or r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 } + 8078: [0-9a-f]* { or r5, r6, r7 ; shr r15, r16, r17 } + 8080: [0-9a-f]* { or r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 } + 8088: [0-9a-f]* { or r5, r6, r7 ; slte r15, r16, r17 ; lh_u r25, r26 } + 8090: [0-9a-f]* { or r5, r6, r7 ; slteh_u r15, r16, r17 } + 8098: [0-9a-f]* { or r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 } + 80a0: [0-9a-f]* { or r5, r6, r7 ; sra r15, r16, r17 ; lb_u r25, r26 } + 80a8: [0-9a-f]* { or r5, r6, r7 ; srai r15, r16, 5 } + 80b0: [0-9a-f]* { or r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 } + 80b8: [0-9a-f]* { or r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + 80c0: [0-9a-f]* { or r5, r6, r7 ; xor r15, r16, r17 ; lb r25, r26 } + 80c8: [0-9a-f]* { ori r15, r16, 5 ; add r5, r6, r7 } + 80d0: [0-9a-f]* { adiffb_u r5, r6, r7 ; ori r15, r16, 5 } + 80d8: [0-9a-f]* { ori r15, r16, 5 ; andi r5, r6, 5 ; sw r25, r26 } + 80e0: [0-9a-f]* { bytex r5, r6 ; ori r15, r16, 5 ; prefetch r25 } + 80e8: [0-9a-f]* { ctz r5, r6 ; ori r15, r16, 5 ; lh_u r25, r26 } + 80f0: [0-9a-f]* { ori r15, r16, 5 ; info 19 ; lh r25, r26 } + 80f8: [0-9a-f]* { ctz r5, r6 ; ori r15, r16, 5 ; lb r25, r26 } + 8100: [0-9a-f]* { ori r15, r16, 5 ; or r5, r6, r7 ; lb r25, r26 } + 8108: [0-9a-f]* { ori r15, r16, 5 ; sne r5, r6, r7 ; lb r25, r26 } + 8110: [0-9a-f]* { ori r15, r16, 5 ; mnz r5, r6, r7 ; lb_u r25, r26 } + 8118: [0-9a-f]* { ori r15, r16, 5 ; rl r5, r6, r7 ; lb_u r25, r26 } + 8120: [0-9a-f]* { ori r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 } + 8128: [0-9a-f]* { mulhh_ss r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 } + 8130: [0-9a-f]* { ori r15, r16, 5 ; s2a r5, r6, r7 ; lh r25, r26 } + 8138: [0-9a-f]* { tblidxb2 r5, r6 ; ori r15, r16, 5 ; lh r25, r26 } + 8140: [0-9a-f]* { mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 } + 8148: [0-9a-f]* { ori r15, r16, 5 ; seqi r5, r6, 5 ; lh_u r25, r26 } + 8150: [0-9a-f]* { ori r15, r16, 5 ; lh_u r25, r26 } + 8158: [0-9a-f]* { mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + 8160: [0-9a-f]* { ori r15, r16, 5 ; shr r5, r6, r7 ; lw r25, r26 } + 8168: [0-9a-f]* { ori r15, r16, 5 ; maxib_u r5, r6, 5 } + 8170: [0-9a-f]* { ori r15, r16, 5 ; move r5, r6 ; lb_u r25, r26 } + 8178: [0-9a-f]* { ori r15, r16, 5 ; moveli.sn r5, 4660 } + 8180: [0-9a-f]* { mulhh_uu r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 } + 8188: [0-9a-f]* { mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 } + 8190: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 } + 8198: [0-9a-f]* { mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 } + 81a0: [0-9a-f]* { mullla_uu r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 } + 81a8: [0-9a-f]* { mvz r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 } + 81b0: [0-9a-f]* { ori r15, r16, 5 ; nop ; lh_u r25, r26 } + 81b8: [0-9a-f]* { ori r15, r16, 5 ; or r5, r6, r7 ; lh_u r25, r26 } + 81c0: [0-9a-f]* { ori r15, r16, 5 ; packlb r5, r6, r7 } + 81c8: [0-9a-f]* { ori r15, r16, 5 ; info 19 ; prefetch r25 } + 81d0: [0-9a-f]* { pcnt r5, r6 ; ori r15, r16, 5 ; prefetch r25 } + 81d8: [0-9a-f]* { ori r15, r16, 5 ; srai r5, r6, 5 ; prefetch r25 } + 81e0: [0-9a-f]* { ori r15, r16, 5 ; rli r5, r6, 5 ; lh r25, r26 } + 81e8: [0-9a-f]* { ori r15, r16, 5 ; s2a r5, r6, r7 ; lh r25, r26 } + 81f0: [0-9a-f]* { sadah_u r5, r6, r7 ; ori r15, r16, 5 } + 81f8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 } + 8200: [0-9a-f]* { ori r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 } + 8208: [0-9a-f]* { ori r15, r16, 5 ; sb r25, r26 } + 8210: [0-9a-f]* { ori r15, r16, 5 ; seqi r5, r6, 5 ; sh r25, r26 } + 8218: [0-9a-f]* { mulhha_ss r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 } + 8220: [0-9a-f]* { ori r15, r16, 5 ; seq r5, r6, r7 ; sh r25, r26 } + 8228: [0-9a-f]* { ori r15, r16, 5 ; xor r5, r6, r7 ; sh r25, r26 } + 8230: [0-9a-f]* { ori r15, r16, 5 ; shli r5, r6, 5 ; sb r25, r26 } + 8238: [0-9a-f]* { ori r15, r16, 5 ; shri r5, r6, 5 ; lh r25, r26 } + 8240: [0-9a-f]* { ori r15, r16, 5 ; slt_u r5, r6, r7 ; lb r25, r26 } + 8248: [0-9a-f]* { ori r15, r16, 5 ; slte r5, r6, r7 ; sw r25, r26 } + 8250: [0-9a-f]* { ori r15, r16, 5 ; slti r5, r6, 5 ; lh r25, r26 } + 8258: [0-9a-f]* { ori r15, r16, 5 ; sltih r5, r6, 5 } + 8260: [0-9a-f]* { ori r15, r16, 5 ; sra r5, r6, r7 ; sb r25, r26 } + 8268: [0-9a-f]* { ori r15, r16, 5 ; sub r5, r6, r7 ; lh r25, r26 } + 8270: [0-9a-f]* { ctz r5, r6 ; ori r15, r16, 5 ; sw r25, r26 } + 8278: [0-9a-f]* { ori r15, r16, 5 ; or r5, r6, r7 ; sw r25, r26 } + 8280: [0-9a-f]* { ori r15, r16, 5 ; sne r5, r6, r7 ; sw r25, r26 } + 8288: [0-9a-f]* { tblidxb1 r5, r6 ; ori r15, r16, 5 ; lb r25, r26 } + 8290: [0-9a-f]* { tblidxb3 r5, r6 ; ori r15, r16, 5 ; lb r25, r26 } + 8298: [0-9a-f]* { ori r15, r16, 5 ; xori r5, r6, 5 } + 82a0: [0-9a-f]* { ori r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 } + 82a8: [0-9a-f]* { ori r5, r6, 5 ; andi r15, r16, 5 ; lb r25, r26 } + 82b0: [0-9a-f]* { ori r5, r6, 5 ; sb r25, r26 } + 82b8: [0-9a-f]* { ori r5, r6, 5 ; info 19 ; prefetch r25 } + 82c0: [0-9a-f]* { ori r5, r6, 5 ; andi r15, r16, 5 ; lb r25, r26 } + 82c8: [0-9a-f]* { ori r5, r6, 5 ; shli r15, r16, 5 ; lb r25, r26 } + 82d0: [0-9a-f]* { ori r5, r6, 5 ; lb_u r25, r26 } + 82d8: [0-9a-f]* { ori r5, r6, 5 ; shr r15, r16, r17 ; lb_u r25, r26 } + 82e0: [0-9a-f]* { ori r5, r6, 5 ; andi r15, r16, 5 ; lh r25, r26 } + 82e8: [0-9a-f]* { ori r5, r6, 5 ; shli r15, r16, 5 ; lh r25, r26 } + 82f0: [0-9a-f]* { ori r5, r6, 5 ; lh_u r25, r26 } + 82f8: [0-9a-f]* { ori r5, r6, 5 ; shr r15, r16, r17 ; lh_u r25, r26 } + 8300: [0-9a-f]* { ori r5, r6, 5 ; and r15, r16, r17 ; lw r25, r26 } + 8308: [0-9a-f]* { ori r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 } + 8310: [0-9a-f]* { ori r5, r6, 5 ; maxh r15, r16, r17 } + 8318: [0-9a-f]* { ori r5, r6, 5 ; mnzb r15, r16, r17 } + 8320: [0-9a-f]* { ori r5, r6, 5 ; movei r15, 5 ; sw r25, r26 } + 8328: [0-9a-f]* { ori r5, r6, 5 ; nop ; lh_u r25, r26 } + 8330: [0-9a-f]* { ori r5, r6, 5 ; or r15, r16, r17 ; lh_u r25, r26 } + 8338: [0-9a-f]* { ori r5, r6, 5 ; packlb r15, r16, r17 } + 8340: [0-9a-f]* { ori r5, r6, 5 ; s2a r15, r16, r17 ; prefetch r25 } + 8348: [0-9a-f]* { ori r5, r6, 5 ; raise } + 8350: [0-9a-f]* { ori r5, r6, 5 ; rli r15, r16, 5 } + 8358: [0-9a-f]* { ori r5, r6, 5 ; s2a r15, r16, r17 } + 8360: [0-9a-f]* { ori r5, r6, 5 ; move r15, r16 ; sb r25, r26 } + 8368: [0-9a-f]* { ori r5, r6, 5 ; slte r15, r16, r17 ; sb r25, r26 } + 8370: [0-9a-f]* { ori r5, r6, 5 ; seq r15, r16, r17 } + 8378: [0-9a-f]* { ori r5, r6, 5 ; sh r25, r26 } + 8380: [0-9a-f]* { ori r5, r6, 5 ; shr r15, r16, r17 ; sh r25, r26 } + 8388: [0-9a-f]* { ori r5, r6, 5 ; shl r15, r16, r17 ; prefetch r25 } + 8390: [0-9a-f]* { ori r5, r6, 5 ; shr r15, r16, r17 ; lb_u r25, r26 } + 8398: [0-9a-f]* { ori r5, r6, 5 ; shri r15, r16, 5 } + 83a0: [0-9a-f]* { ori r5, r6, 5 ; slt_u r15, r16, r17 ; sh r25, r26 } + 83a8: [0-9a-f]* { ori r5, r6, 5 ; slte_u r15, r16, r17 ; prefetch r25 } + 83b0: [0-9a-f]* { ori r5, r6, 5 ; slti r15, r16, 5 } + 83b8: [0-9a-f]* { ori r5, r6, 5 ; sne r15, r16, r17 ; prefetch r25 } + 83c0: [0-9a-f]* { ori r5, r6, 5 ; srai r15, r16, 5 ; lb_u r25, r26 } + 83c8: [0-9a-f]* { ori r5, r6, 5 ; sub r15, r16, r17 } + 83d0: [0-9a-f]* { ori r5, r6, 5 ; or r15, r16, r17 ; sw r25, r26 } + 83d8: [0-9a-f]* { ori r5, r6, 5 ; sra r15, r16, r17 ; sw r25, r26 } + 83e0: [0-9a-f]* { packbs_u r15, r16, r17 ; addb r5, r6, r7 } + 83e8: [0-9a-f]* { crc32_32 r5, r6, r7 ; packbs_u r15, r16, r17 } + 83f0: [0-9a-f]* { packbs_u r15, r16, r17 ; mnz r5, r6, r7 } + 83f8: [0-9a-f]* { mulhla_us r5, r6, r7 ; packbs_u r15, r16, r17 } + 8400: [0-9a-f]* { packbs_u r15, r16, r17 ; packhb r5, r6, r7 } + 8408: [0-9a-f]* { packbs_u r15, r16, r17 ; seqih r5, r6, 5 } + 8410: [0-9a-f]* { packbs_u r15, r16, r17 ; slteb_u r5, r6, r7 } + 8418: [0-9a-f]* { packbs_u r15, r16, r17 ; sub r5, r6, r7 } + 8420: [0-9a-f]* { packbs_u r5, r6, r7 ; addli r15, r16, 4660 } + 8428: [0-9a-f]* { packbs_u r5, r6, r7 ; jalr r15 } + 8430: [0-9a-f]* { packbs_u r5, r6, r7 ; maxih r15, r16, 5 } + 8438: [0-9a-f]* { packbs_u r5, r6, r7 ; nor r15, r16, r17 } + 8440: [0-9a-f]* { packbs_u r5, r6, r7 ; seqib r15, r16, 5 } + 8448: [0-9a-f]* { packbs_u r5, r6, r7 ; slte r15, r16, r17 } + 8450: [0-9a-f]* { packbs_u r5, r6, r7 ; srai r15, r16, 5 } + 8458: [0-9a-f]* { packhb r15, r16, r17 ; addi r5, r6, 5 } + 8460: [0-9a-f]* { packhb r15, r16, r17 } + 8468: [0-9a-f]* { packhb r15, r16, r17 ; movei r5, 5 } + 8470: [0-9a-f]* { mulll_su r5, r6, r7 ; packhb r15, r16, r17 } + 8478: [0-9a-f]* { packhb r15, r16, r17 ; rl r5, r6, r7 } + 8480: [0-9a-f]* { packhb r15, r16, r17 ; shli r5, r6, 5 } + 8488: [0-9a-f]* { packhb r15, r16, r17 ; slth_u r5, r6, r7 } + 8490: [0-9a-f]* { packhb r15, r16, r17 ; subhs r5, r6, r7 } + 8498: [0-9a-f]* { packhb r5, r6, r7 ; andi r15, r16, 5 } + 84a0: [0-9a-f]* { packhb r5, r6, r7 ; lb r15, r16 } + 84a8: [0-9a-f]* { packhb r5, r6, r7 ; minh r15, r16, r17 } + 84b0: [0-9a-f]* { packhb r5, r6, r7 ; packhb r15, r16, r17 } + 84b8: [0-9a-f]* { packhb r5, r6, r7 ; shl r15, r16, r17 } + 84c0: [0-9a-f]* { packhb r5, r6, r7 ; slteh r15, r16, r17 } + 84c8: [0-9a-f]* { packhb r5, r6, r7 ; subb r15, r16, r17 } + 84d0: [0-9a-f]* { packhs r15, r16, r17 ; addli.sn r5, r6, 4660 } + 84d8: [0-9a-f]* { packhs r15, r16, r17 ; inthh r5, r6, r7 } + 84e0: [0-9a-f]* { mulhh_su r5, r6, r7 ; packhs r15, r16, r17 } + 84e8: [0-9a-f]* { mullla_uu r5, r6, r7 ; packhs r15, r16, r17 } + 84f0: [0-9a-f]* { packhs r15, r16, r17 ; s3a r5, r6, r7 } + 84f8: [0-9a-f]* { packhs r15, r16, r17 ; shrb r5, r6, r7 } + 8500: [0-9a-f]* { packhs r15, r16, r17 ; sltib_u r5, r6, 5 } + 8508: [0-9a-f]* { tblidxb2 r5, r6 ; packhs r15, r16, r17 } + 8510: [0-9a-f]* { packhs r5, r6, r7 ; flush r15 } + 8518: [0-9a-f]* { packhs r5, r6, r7 ; lh r15, r16 } + 8520: [0-9a-f]* { packhs r5, r6, r7 ; mnz r15, r16, r17 } + 8528: [0-9a-f]* { packhs r5, r6, r7 ; raise } + 8530: [0-9a-f]* { packhs r5, r6, r7 ; shlib r15, r16, 5 } + 8538: [0-9a-f]* { packhs r5, r6, r7 ; slti r15, r16, 5 } + 8540: [0-9a-f]* { packhs r5, r6, r7 ; subs r15, r16, r17 } + 8548: [0-9a-f]* { packlb r15, r16, r17 ; and r5, r6, r7 } + 8550: [0-9a-f]* { packlb r15, r16, r17 ; maxh r5, r6, r7 } + 8558: [0-9a-f]* { mulhha_uu r5, r6, r7 ; packlb r15, r16, r17 } + 8560: [0-9a-f]* { packlb r15, r16, r17 ; mz r5, r6, r7 } + 8568: [0-9a-f]* { sadb_u r5, r6, r7 ; packlb r15, r16, r17 } + 8570: [0-9a-f]* { packlb r15, r16, r17 ; shrih r5, r6, 5 } + 8578: [0-9a-f]* { packlb r15, r16, r17 ; sneb r5, r6, r7 } + 8580: [0-9a-f]* { packlb r5, r6, r7 ; add r15, r16, r17 } + 8588: [0-9a-f]* { packlb r5, r6, r7 ; info 19 } + 8590: [0-9a-f]* { packlb r5, r6, r7 ; lnk r15 } + 8598: [0-9a-f]* { packlb r5, r6, r7 ; movei r15, 5 } + 85a0: [0-9a-f]* { packlb r5, r6, r7 ; s2a r15, r16, r17 } + 85a8: [0-9a-f]* { packlb r5, r6, r7 ; shrh r15, r16, r17 } + 85b0: [0-9a-f]* { packlb r5, r6, r7 ; sltih r15, r16, 5 } + 85b8: [0-9a-f]* { packlb r5, r6, r7 ; wh64 r15 } + 85c0: [0-9a-f]* { pcnt r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 } + 85c8: [0-9a-f]* { pcnt r5, r6 ; and r15, r16, r17 ; sw r25, r26 } + 85d0: [0-9a-f]* { pcnt r5, r6 ; lw r25, r26 } + 85d8: [0-9a-f]* { pcnt r5, r6 ; info 19 ; lh_u r25, r26 } + 85e0: [0-9a-f]* { pcnt r5, r6 ; addi r15, r16, 5 ; lb r25, r26 } + 85e8: [0-9a-f]* { pcnt r5, r6 ; seqi r15, r16, 5 ; lb r25, r26 } + 85f0: [0-9a-f]* { pcnt r5, r6 ; and r15, r16, r17 ; lb_u r25, r26 } + 85f8: [0-9a-f]* { pcnt r5, r6 ; shl r15, r16, r17 ; lb_u r25, r26 } + 8600: [0-9a-f]* { pcnt r5, r6 ; addi r15, r16, 5 ; lh r25, r26 } + 8608: [0-9a-f]* { pcnt r5, r6 ; seqi r15, r16, 5 ; lh r25, r26 } + 8610: [0-9a-f]* { pcnt r5, r6 ; and r15, r16, r17 ; lh_u r25, r26 } + 8618: [0-9a-f]* { pcnt r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 } + 8620: [0-9a-f]* { pcnt r5, r6 ; add r15, r16, r17 ; lw r25, r26 } + 8628: [0-9a-f]* { pcnt r5, r6 ; seq r15, r16, r17 ; lw r25, r26 } + 8630: [0-9a-f]* { pcnt r5, r6 ; lwadd_na r15, r16, 5 } + 8638: [0-9a-f]* { pcnt r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 } + 8640: [0-9a-f]* { pcnt r5, r6 ; movei r15, 5 ; sb r25, r26 } + 8648: [0-9a-f]* { pcnt r5, r6 ; nop ; lb_u r25, r26 } + 8650: [0-9a-f]* { pcnt r5, r6 ; or r15, r16, r17 ; lb_u r25, r26 } + 8658: [0-9a-f]* { pcnt r5, r6 ; packhb r15, r16, r17 } + 8660: [0-9a-f]* { pcnt r5, r6 ; rli r15, r16, 5 ; prefetch r25 } + 8668: [0-9a-f]* { pcnt r5, r6 ; xor r15, r16, r17 ; prefetch r25 } + 8670: [0-9a-f]* { pcnt r5, r6 ; rli r15, r16, 5 ; sh r25, r26 } + 8678: [0-9a-f]* { pcnt r5, r6 ; s2a r15, r16, r17 ; sh r25, r26 } + 8680: [0-9a-f]* { pcnt r5, r6 ; info 19 ; sb r25, r26 } + 8688: [0-9a-f]* { pcnt r5, r6 ; slt r15, r16, r17 ; sb r25, r26 } + 8690: [0-9a-f]* { pcnt r5, r6 ; seq r15, r16, r17 ; sh r25, r26 } + 8698: [0-9a-f]* { pcnt r5, r6 ; and r15, r16, r17 ; sh r25, r26 } + 86a0: [0-9a-f]* { pcnt r5, r6 ; shl r15, r16, r17 ; sh r25, r26 } + 86a8: [0-9a-f]* { pcnt r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 } + 86b0: [0-9a-f]* { pcnt r5, r6 ; shlih r15, r16, 5 } + 86b8: [0-9a-f]* { pcnt r5, r6 ; shri r15, r16, 5 ; sh r25, r26 } + 86c0: [0-9a-f]* { pcnt r5, r6 ; slt_u r15, r16, r17 ; prefetch r25 } + 86c8: [0-9a-f]* { pcnt r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + 86d0: [0-9a-f]* { pcnt r5, r6 ; slti r15, r16, 5 ; sh r25, r26 } + 86d8: [0-9a-f]* { pcnt r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 } + 86e0: [0-9a-f]* { pcnt r5, r6 ; srah r15, r16, r17 } + 86e8: [0-9a-f]* { pcnt r5, r6 ; sub r15, r16, r17 ; sh r25, r26 } + 86f0: [0-9a-f]* { pcnt r5, r6 ; nop ; sw r25, r26 } + 86f8: [0-9a-f]* { pcnt r5, r6 ; slti_u r15, r16, 5 ; sw r25, r26 } + 8700: [0-9a-f]* { pcnt r5, r6 ; xori r15, r16, 5 } + 8708: [0-9a-f]* { bytex r5, r6 ; prefetch r15 } + 8710: [0-9a-f]* { minih r5, r6, 5 ; prefetch r15 } + 8718: [0-9a-f]* { mulhla_ss r5, r6, r7 ; prefetch r15 } + 8720: [0-9a-f]* { ori r5, r6, 5 ; prefetch r15 } + 8728: [0-9a-f]* { seqi r5, r6, 5 ; prefetch r15 } + 8730: [0-9a-f]* { slte_u r5, r6, r7 ; prefetch r15 } + 8738: [0-9a-f]* { sraib r5, r6, 5 ; prefetch r15 } + 8740: [0-9a-f]* { clz r5, r6 ; add r15, r16, r17 ; prefetch r25 } + 8748: [0-9a-f]* { add r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 } + 8750: [0-9a-f]* { add r15, r16, r17 ; slti_u r5, r6, 5 ; prefetch r25 } + 8758: [0-9a-f]* { add r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + 8760: [0-9a-f]* { add r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 } + 8768: [0-9a-f]* { addi r15, r16, 5 ; move r5, r6 ; prefetch r25 } + 8770: [0-9a-f]* { addi r15, r16, 5 ; rli r5, r6, 5 ; prefetch r25 } + 8778: [0-9a-f]* { tblidxb0 r5, r6 ; addi r15, r16, 5 ; prefetch r25 } + 8780: [0-9a-f]* { addi r5, r6, 5 ; ori r15, r16, 5 ; prefetch r25 } + 8788: [0-9a-f]* { addi r5, r6, 5 ; srai r15, r16, 5 ; prefetch r25 } + 8790: [0-9a-f]* { mulhha_uu r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + 8798: [0-9a-f]* { and r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 } + 87a0: [0-9a-f]* { and r15, r16, r17 ; prefetch r25 } + 87a8: [0-9a-f]* { and r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 } + 87b0: [0-9a-f]* { andi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 } + 87b8: [0-9a-f]* { mullla_uu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + 87c0: [0-9a-f]* { andi r15, r16, 5 ; slt r5, r6, r7 ; prefetch r25 } + 87c8: [0-9a-f]* { andi r5, r6, 5 ; prefetch r25 } + 87d0: [0-9a-f]* { andi r5, r6, 5 ; shr r15, r16, r17 ; prefetch r25 } + 87d8: [0-9a-f]* { bitx r5, r6 ; info 19 ; prefetch r25 } + 87e0: [0-9a-f]* { bitx r5, r6 ; slt r15, r16, r17 ; prefetch r25 } + 87e8: [0-9a-f]* { bytex r5, r6 ; move r15, r16 ; prefetch r25 } + 87f0: [0-9a-f]* { bytex r5, r6 ; slte r15, r16, r17 ; prefetch r25 } + 87f8: [0-9a-f]* { clz r5, r6 ; mz r15, r16, r17 ; prefetch r25 } + 8800: [0-9a-f]* { clz r5, r6 ; slti r15, r16, 5 ; prefetch r25 } + 8808: [0-9a-f]* { ctz r5, r6 ; nor r15, r16, r17 ; prefetch r25 } + 8810: [0-9a-f]* { ctz r5, r6 ; sne r15, r16, r17 ; prefetch r25 } + 8818: [0-9a-f]* { info 19 ; prefetch r25 } + 8820: [0-9a-f]* { nop ; prefetch r25 } + 8828: [0-9a-f]* { seqi r15, r16, 5 ; prefetch r25 } + 8830: [0-9a-f]* { slti_u r15, r16, 5 ; prefetch r25 } + 8838: [0-9a-f]* { andi r5, r6, 5 ; ill ; prefetch r25 } + 8840: [0-9a-f]* { mvz r5, r6, r7 ; ill ; prefetch r25 } + 8848: [0-9a-f]* { slte r5, r6, r7 ; ill ; prefetch r25 } + 8850: [0-9a-f]* { info 19 ; andi r15, r16, 5 ; prefetch r25 } + 8858: [0-9a-f]* { mulll_ss r5, r6, r7 ; info 19 ; prefetch r25 } + 8860: [0-9a-f]* { info 19 ; s1a r15, r16, r17 ; prefetch r25 } + 8868: [0-9a-f]* { info 19 ; slt_u r15, r16, r17 ; prefetch r25 } + 8870: [0-9a-f]* { tblidxb2 r5, r6 ; info 19 ; prefetch r25 } + 8878: [0-9a-f]* { mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + 8880: [0-9a-f]* { mnz r15, r16, r17 ; seq r5, r6, r7 ; prefetch r25 } + 8888: [0-9a-f]* { mnz r15, r16, r17 ; xor r5, r6, r7 ; prefetch r25 } + 8890: [0-9a-f]* { mnz r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 } + 8898: [0-9a-f]* { move r15, r16 ; add r5, r6, r7 ; prefetch r25 } + 88a0: [0-9a-f]* { mullla_ss r5, r6, r7 ; move r15, r16 ; prefetch r25 } + 88a8: [0-9a-f]* { move r15, r16 ; shri r5, r6, 5 ; prefetch r25 } + 88b0: [0-9a-f]* { move r5, r6 ; andi r15, r16, 5 ; prefetch r25 } + 88b8: [0-9a-f]* { move r5, r6 ; shli r15, r16, 5 ; prefetch r25 } + 88c0: [0-9a-f]* { bytex r5, r6 ; movei r15, 5 ; prefetch r25 } + 88c8: [0-9a-f]* { movei r15, 5 ; nop ; prefetch r25 } + 88d0: [0-9a-f]* { movei r15, 5 ; slti r5, r6, 5 ; prefetch r25 } + 88d8: [0-9a-f]* { movei r5, 5 ; move r15, r16 ; prefetch r25 } + 88e0: [0-9a-f]* { movei r5, 5 ; slte r15, r16, r17 ; prefetch r25 } + 88e8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + 88f0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 } + 88f8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + 8900: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sne r15, r16, r17 ; prefetch r25 } + 8908: [0-9a-f]* { mulhha_ss r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 } + 8910: [0-9a-f]* { mulhha_ss r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 } + 8918: [0-9a-f]* { mulhha_uu r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 } + 8920: [0-9a-f]* { mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 8928: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 } + 8930: [0-9a-f]* { mulll_ss r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } + 8938: [0-9a-f]* { mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 } + 8940: [0-9a-f]* { mulll_uu r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + 8948: [0-9a-f]* { mulll_uu r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + 8950: [0-9a-f]* { mullla_ss r5, r6, r7 ; prefetch r25 } + 8958: [0-9a-f]* { mullla_ss r5, r6, r7 ; shr r15, r16, r17 ; prefetch r25 } + 8960: [0-9a-f]* { mullla_uu r5, r6, r7 ; info 19 ; prefetch r25 } + 8968: [0-9a-f]* { mullla_uu r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 } + 8970: [0-9a-f]* { mvnz r5, r6, r7 ; move r15, r16 ; prefetch r25 } + 8978: [0-9a-f]* { mvnz r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 } + 8980: [0-9a-f]* { mvz r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + 8988: [0-9a-f]* { mvz r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 } + 8990: [0-9a-f]* { mz r15, r16, r17 ; movei r5, 5 ; prefetch r25 } + 8998: [0-9a-f]* { mz r15, r16, r17 ; s1a r5, r6, r7 ; prefetch r25 } + 89a0: [0-9a-f]* { tblidxb1 r5, r6 ; mz r15, r16, r17 ; prefetch r25 } + 89a8: [0-9a-f]* { mz r5, r6, r7 ; rl r15, r16, r17 ; prefetch r25 } + 89b0: [0-9a-f]* { mz r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + 89b8: [0-9a-f]* { nop ; move r15, r16 ; prefetch r25 } + 89c0: [0-9a-f]* { nop ; or r15, r16, r17 ; prefetch r25 } + 89c8: [0-9a-f]* { nop ; shl r5, r6, r7 ; prefetch r25 } + 89d0: [0-9a-f]* { nop ; sne r5, r6, r7 ; prefetch r25 } + 89d8: [0-9a-f]* { clz r5, r6 ; nor r15, r16, r17 ; prefetch r25 } + 89e0: [0-9a-f]* { nor r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 } + 89e8: [0-9a-f]* { nor r15, r16, r17 ; slti_u r5, r6, 5 ; prefetch r25 } + 89f0: [0-9a-f]* { nor r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + 89f8: [0-9a-f]* { nor r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 } + 8a00: [0-9a-f]* { or r15, r16, r17 ; move r5, r6 ; prefetch r25 } + 8a08: [0-9a-f]* { or r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 } + 8a10: [0-9a-f]* { tblidxb0 r5, r6 ; or r15, r16, r17 ; prefetch r25 } + 8a18: [0-9a-f]* { or r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 } + 8a20: [0-9a-f]* { or r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 } + 8a28: [0-9a-f]* { mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 } + 8a30: [0-9a-f]* { ori r15, r16, 5 ; seqi r5, r6, 5 ; prefetch r25 } + 8a38: [0-9a-f]* { ori r15, r16, 5 ; prefetch r25 } + 8a40: [0-9a-f]* { ori r5, r6, 5 ; s3a r15, r16, r17 ; prefetch r25 } + 8a48: [0-9a-f]* { pcnt r5, r6 ; addi r15, r16, 5 ; prefetch r25 } + 8a50: [0-9a-f]* { pcnt r5, r6 ; seqi r15, r16, 5 ; prefetch r25 } + 8a58: [0-9a-f]* { rl r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 } + 8a60: [0-9a-f]* { mvz r5, r6, r7 ; rl r15, r16, r17 ; prefetch r25 } + 8a68: [0-9a-f]* { rl r15, r16, r17 ; slte r5, r6, r7 ; prefetch r25 } + 8a70: [0-9a-f]* { rl r5, r6, r7 ; info 19 ; prefetch r25 } + 8a78: [0-9a-f]* { rl r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 } + 8a80: [0-9a-f]* { rli r15, r16, 5 ; prefetch r25 } + 8a88: [0-9a-f]* { rli r15, r16, 5 ; ori r5, r6, 5 ; prefetch r25 } + 8a90: [0-9a-f]* { rli r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + 8a98: [0-9a-f]* { rli r5, r6, 5 ; nop ; prefetch r25 } + 8aa0: [0-9a-f]* { rli r5, r6, 5 ; slti_u r15, r16, 5 ; prefetch r25 } + 8aa8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 } + 8ab0: [0-9a-f]* { s1a r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 } + 8ab8: [0-9a-f]* { tblidxb2 r5, r6 ; s1a r15, r16, r17 ; prefetch r25 } + 8ac0: [0-9a-f]* { s1a r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 } + 8ac8: [0-9a-f]* { s1a r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 8ad0: [0-9a-f]* { mulll_ss r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 } + 8ad8: [0-9a-f]* { s2a r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + 8ae0: [0-9a-f]* { s2a r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + 8ae8: [0-9a-f]* { s2a r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 } + 8af0: [0-9a-f]* { s3a r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 } + 8af8: [0-9a-f]* { mvz r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 } + 8b00: [0-9a-f]* { s3a r15, r16, r17 ; slte r5, r6, r7 ; prefetch r25 } + 8b08: [0-9a-f]* { s3a r5, r6, r7 ; info 19 ; prefetch r25 } + 8b10: [0-9a-f]* { s3a r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 } + 8b18: [0-9a-f]* { seq r15, r16, r17 ; prefetch r25 } + 8b20: [0-9a-f]* { seq r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 } + 8b28: [0-9a-f]* { seq r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + 8b30: [0-9a-f]* { seq r5, r6, r7 ; nop ; prefetch r25 } + 8b38: [0-9a-f]* { seq r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 } + 8b40: [0-9a-f]* { mulhh_ss r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 } + 8b48: [0-9a-f]* { seqi r15, r16, 5 ; s2a r5, r6, r7 ; prefetch r25 } + 8b50: [0-9a-f]* { tblidxb2 r5, r6 ; seqi r15, r16, 5 ; prefetch r25 } + 8b58: [0-9a-f]* { seqi r5, r6, 5 ; rli r15, r16, 5 ; prefetch r25 } + 8b60: [0-9a-f]* { seqi r5, r6, 5 ; xor r15, r16, r17 ; prefetch r25 } + 8b68: [0-9a-f]* { mulll_ss r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + 8b70: [0-9a-f]* { shl r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + 8b78: [0-9a-f]* { shl r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + 8b80: [0-9a-f]* { shl r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 } + 8b88: [0-9a-f]* { shli r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 } + 8b90: [0-9a-f]* { mvz r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + 8b98: [0-9a-f]* { shli r15, r16, 5 ; slte r5, r6, r7 ; prefetch r25 } + 8ba0: [0-9a-f]* { shli r5, r6, 5 ; info 19 ; prefetch r25 } + 8ba8: [0-9a-f]* { shli r5, r6, 5 ; slt r15, r16, r17 ; prefetch r25 } + 8bb0: [0-9a-f]* { shr r15, r16, r17 ; prefetch r25 } + 8bb8: [0-9a-f]* { shr r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 } + 8bc0: [0-9a-f]* { shr r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + 8bc8: [0-9a-f]* { shr r5, r6, r7 ; nop ; prefetch r25 } + 8bd0: [0-9a-f]* { shr r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 } + 8bd8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 } + 8be0: [0-9a-f]* { shri r15, r16, 5 ; s2a r5, r6, r7 ; prefetch r25 } + 8be8: [0-9a-f]* { tblidxb2 r5, r6 ; shri r15, r16, 5 ; prefetch r25 } + 8bf0: [0-9a-f]* { shri r5, r6, 5 ; rli r15, r16, 5 ; prefetch r25 } + 8bf8: [0-9a-f]* { shri r5, r6, 5 ; xor r15, r16, r17 ; prefetch r25 } + 8c00: [0-9a-f]* { mulll_ss r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 } + 8c08: [0-9a-f]* { slt r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + 8c10: [0-9a-f]* { slt r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + 8c18: [0-9a-f]* { slt r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 } + 8c20: [0-9a-f]* { slt_u r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 } + 8c28: [0-9a-f]* { mvz r5, r6, r7 ; slt_u r15, r16, r17 ; prefetch r25 } + 8c30: [0-9a-f]* { slt_u r15, r16, r17 ; slte r5, r6, r7 ; prefetch r25 } + 8c38: [0-9a-f]* { slt_u r5, r6, r7 ; info 19 ; prefetch r25 } + 8c40: [0-9a-f]* { slt_u r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 } + 8c48: [0-9a-f]* { slte r15, r16, r17 ; prefetch r25 } + 8c50: [0-9a-f]* { slte r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 } + 8c58: [0-9a-f]* { slte r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + 8c60: [0-9a-f]* { slte r5, r6, r7 ; nop ; prefetch r25 } + 8c68: [0-9a-f]* { slte r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 } + 8c70: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 } + 8c78: [0-9a-f]* { slte_u r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 } + 8c80: [0-9a-f]* { tblidxb2 r5, r6 ; slte_u r15, r16, r17 ; prefetch r25 } + 8c88: [0-9a-f]* { slte_u r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 } + 8c90: [0-9a-f]* { slte_u r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 8c98: [0-9a-f]* { mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 } + 8ca0: [0-9a-f]* { slti r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 } + 8ca8: [0-9a-f]* { slti r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 } + 8cb0: [0-9a-f]* { slti r5, r6, 5 ; seqi r15, r16, 5 ; prefetch r25 } + 8cb8: [0-9a-f]* { slti_u r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 } + 8cc0: [0-9a-f]* { mvz r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 } + 8cc8: [0-9a-f]* { slti_u r15, r16, 5 ; slte r5, r6, r7 ; prefetch r25 } + 8cd0: [0-9a-f]* { slti_u r5, r6, 5 ; info 19 ; prefetch r25 } + 8cd8: [0-9a-f]* { slti_u r5, r6, 5 ; slt r15, r16, r17 ; prefetch r25 } + 8ce0: [0-9a-f]* { sne r15, r16, r17 ; prefetch r25 } + 8ce8: [0-9a-f]* { sne r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 } + 8cf0: [0-9a-f]* { sne r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + 8cf8: [0-9a-f]* { sne r5, r6, r7 ; nop ; prefetch r25 } + 8d00: [0-9a-f]* { sne r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 } + 8d08: [0-9a-f]* { mulhh_ss r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 } + 8d10: [0-9a-f]* { sra r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 } + 8d18: [0-9a-f]* { tblidxb2 r5, r6 ; sra r15, r16, r17 ; prefetch r25 } + 8d20: [0-9a-f]* { sra r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 } + 8d28: [0-9a-f]* { sra r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 8d30: [0-9a-f]* { mulll_ss r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 } + 8d38: [0-9a-f]* { srai r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 } + 8d40: [0-9a-f]* { srai r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 } + 8d48: [0-9a-f]* { srai r5, r6, 5 ; seqi r15, r16, 5 ; prefetch r25 } + 8d50: [0-9a-f]* { sub r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 } + 8d58: [0-9a-f]* { mvz r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + 8d60: [0-9a-f]* { sub r15, r16, r17 ; slte r5, r6, r7 ; prefetch r25 } + 8d68: [0-9a-f]* { sub r5, r6, r7 ; info 19 ; prefetch r25 } + 8d70: [0-9a-f]* { sub r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 } + 8d78: [0-9a-f]* { tblidxb0 r5, r6 ; move r15, r16 ; prefetch r25 } + 8d80: [0-9a-f]* { tblidxb0 r5, r6 ; slte r15, r16, r17 ; prefetch r25 } + 8d88: [0-9a-f]* { tblidxb1 r5, r6 ; mz r15, r16, r17 ; prefetch r25 } + 8d90: [0-9a-f]* { tblidxb1 r5, r6 ; slti r15, r16, 5 ; prefetch r25 } + 8d98: [0-9a-f]* { tblidxb2 r5, r6 ; nor r15, r16, r17 ; prefetch r25 } + 8da0: [0-9a-f]* { tblidxb2 r5, r6 ; sne r15, r16, r17 ; prefetch r25 } + 8da8: [0-9a-f]* { tblidxb3 r5, r6 ; ori r15, r16, 5 ; prefetch r25 } + 8db0: [0-9a-f]* { tblidxb3 r5, r6 ; srai r15, r16, 5 ; prefetch r25 } + 8db8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + 8dc0: [0-9a-f]* { xor r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 } + 8dc8: [0-9a-f]* { xor r15, r16, r17 ; prefetch r25 } + 8dd0: [0-9a-f]* { xor r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 } + 8dd8: [0-9a-f]* { addb r5, r6, r7 ; raise } + 8de0: [0-9a-f]* { crc32_32 r5, r6, r7 ; raise } + 8de8: [0-9a-f]* { mnz r5, r6, r7 ; raise } + 8df0: [0-9a-f]* { mulhla_us r5, r6, r7 ; raise } + 8df8: [0-9a-f]* { packhb r5, r6, r7 ; raise } + 8e00: [0-9a-f]* { seqih r5, r6, 5 ; raise } + 8e08: [0-9a-f]* { slteb_u r5, r6, r7 ; raise } + 8e10: [0-9a-f]* { sub r5, r6, r7 ; raise } + 8e18: [0-9a-f]* { rl r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + 8e20: [0-9a-f]* { rl r15, r16, r17 ; adds r5, r6, r7 } + 8e28: [0-9a-f]* { rl r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + 8e30: [0-9a-f]* { bytex r5, r6 ; rl r15, r16, r17 ; lw r25, r26 } + 8e38: [0-9a-f]* { ctz r5, r6 ; rl r15, r16, r17 ; lh r25, r26 } + 8e40: [0-9a-f]* { rl r15, r16, r17 ; info 19 ; lb_u r25, r26 } + 8e48: [0-9a-f]* { clz r5, r6 ; rl r15, r16, r17 ; lb r25, r26 } + 8e50: [0-9a-f]* { rl r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 } + 8e58: [0-9a-f]* { rl r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 } + 8e60: [0-9a-f]* { rl r15, r16, r17 ; info 19 ; lb_u r25, r26 } + 8e68: [0-9a-f]* { pcnt r5, r6 ; rl r15, r16, r17 ; lb_u r25, r26 } + 8e70: [0-9a-f]* { rl r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + 8e78: [0-9a-f]* { rl r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + 8e80: [0-9a-f]* { rl r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + 8e88: [0-9a-f]* { tblidxb1 r5, r6 ; rl r15, r16, r17 ; lh r25, r26 } + 8e90: [0-9a-f]* { mulhha_ss r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 } + 8e98: [0-9a-f]* { rl r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 } + 8ea0: [0-9a-f]* { rl r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 } + 8ea8: [0-9a-f]* { mulll_ss r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + 8eb0: [0-9a-f]* { rl r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 } + 8eb8: [0-9a-f]* { rl r15, r16, r17 ; maxh r5, r6, r7 } + 8ec0: [0-9a-f]* { rl r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + 8ec8: [0-9a-f]* { rl r15, r16, r17 ; moveli r5, 4660 } + 8ed0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 } + 8ed8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 } + 8ee0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 } + 8ee8: [0-9a-f]* { mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 } + 8ef0: [0-9a-f]* { mullla_uu r5, r6, r7 ; rl r15, r16, r17 ; prefetch r25 } + 8ef8: [0-9a-f]* { mvz r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + 8f00: [0-9a-f]* { rl r15, r16, r17 ; nop ; lh r25, r26 } + 8f08: [0-9a-f]* { rl r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + 8f10: [0-9a-f]* { rl r15, r16, r17 ; packhs r5, r6, r7 } + 8f18: [0-9a-f]* { rl r15, r16, r17 ; prefetch r25 } + 8f20: [0-9a-f]* { rl r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 } + 8f28: [0-9a-f]* { rl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + 8f30: [0-9a-f]* { rl r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + 8f38: [0-9a-f]* { rl r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + 8f40: [0-9a-f]* { sadah r5, r6, r7 ; rl r15, r16, r17 } + 8f48: [0-9a-f]* { mulhha_ss r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 } + 8f50: [0-9a-f]* { rl r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 } + 8f58: [0-9a-f]* { rl r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 } + 8f60: [0-9a-f]* { rl r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + 8f68: [0-9a-f]* { mulhh_uu r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 } + 8f70: [0-9a-f]* { rl r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 } + 8f78: [0-9a-f]* { tblidxb3 r5, r6 ; rl r15, r16, r17 ; sh r25, r26 } + 8f80: [0-9a-f]* { rl r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + 8f88: [0-9a-f]* { rl r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + 8f90: [0-9a-f]* { rl r15, r16, r17 ; slt r5, r6, r7 } + 8f98: [0-9a-f]* { rl r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + 8fa0: [0-9a-f]* { rl r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + 8fa8: [0-9a-f]* { rl r15, r16, r17 ; sltib_u r5, r6, 5 } + 8fb0: [0-9a-f]* { rl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + 8fb8: [0-9a-f]* { rl r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + 8fc0: [0-9a-f]* { clz r5, r6 ; rl r15, r16, r17 ; sw r25, r26 } + 8fc8: [0-9a-f]* { rl r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 } + 8fd0: [0-9a-f]* { rl r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 } + 8fd8: [0-9a-f]* { tblidxb0 r5, r6 ; rl r15, r16, r17 } + 8fe0: [0-9a-f]* { tblidxb2 r5, r6 ; rl r15, r16, r17 } + 8fe8: [0-9a-f]* { rl r15, r16, r17 ; xor r5, r6, r7 } + 8ff0: [0-9a-f]* { rl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + 8ff8: [0-9a-f]* { rl r5, r6, r7 ; and r15, r16, r17 } + 9000: [0-9a-f]* { rl r5, r6, r7 ; prefetch r25 } + 9008: [0-9a-f]* { rl r5, r6, r7 ; info 19 ; lw r25, r26 } + 9010: [0-9a-f]* { rl r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + 9018: [0-9a-f]* { rl r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + 9020: [0-9a-f]* { rl r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 } + 9028: [0-9a-f]* { rl r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 } + 9030: [0-9a-f]* { rl r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + 9038: [0-9a-f]* { rl r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 } + 9040: [0-9a-f]* { rl r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + 9048: [0-9a-f]* { rl r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + 9050: [0-9a-f]* { rl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + 9058: [0-9a-f]* { rl r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + 9060: [0-9a-f]* { rl r5, r6, r7 ; maxb_u r15, r16, r17 } + 9068: [0-9a-f]* { rl r5, r6, r7 ; mnz r15, r16, r17 } + 9070: [0-9a-f]* { rl r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + 9078: [0-9a-f]* { rl r5, r6, r7 ; nop ; lh r25, r26 } + 9080: [0-9a-f]* { rl r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + 9088: [0-9a-f]* { rl r5, r6, r7 ; packhs r15, r16, r17 } + 9090: [0-9a-f]* { rl r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 } + 9098: [0-9a-f]* { rl r5, r6, r7 ; prefetch r25 } + 90a0: [0-9a-f]* { rl r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + 90a8: [0-9a-f]* { rl r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + 90b0: [0-9a-f]* { rl r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + 90b8: [0-9a-f]* { rl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + 90c0: [0-9a-f]* { rl r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + 90c8: [0-9a-f]* { rl r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + 90d0: [0-9a-f]* { rl r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + 90d8: [0-9a-f]* { rl r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + 90e0: [0-9a-f]* { rl r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + 90e8: [0-9a-f]* { rl r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + 90f0: [0-9a-f]* { rl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + 90f8: [0-9a-f]* { rl r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + 9100: [0-9a-f]* { rl r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + 9108: [0-9a-f]* { rl r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + 9110: [0-9a-f]* { rl r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + 9118: [0-9a-f]* { rl r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + 9120: [0-9a-f]* { rl r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + 9128: [0-9a-f]* { rl r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + 9130: [0-9a-f]* { rli r15, r16, 5 ; add r5, r6, r7 ; lb r25, r26 } + 9138: [0-9a-f]* { rli r15, r16, 5 ; addi r5, r6, 5 ; sb r25, r26 } + 9140: [0-9a-f]* { rli r15, r16, 5 ; and r5, r6, r7 } + 9148: [0-9a-f]* { bitx r5, r6 ; rli r15, r16, 5 ; sb r25, r26 } + 9150: [0-9a-f]* { clz r5, r6 ; rli r15, r16, 5 ; sb r25, r26 } + 9158: [0-9a-f]* { rli r15, r16, 5 ; lh_u r25, r26 } + 9160: [0-9a-f]* { rli r15, r16, 5 ; intlb r5, r6, r7 } + 9168: [0-9a-f]* { mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + 9170: [0-9a-f]* { rli r15, r16, 5 ; shli r5, r6, 5 ; lb r25, r26 } + 9178: [0-9a-f]* { rli r15, r16, 5 ; addi r5, r6, 5 ; lb_u r25, r26 } + 9180: [0-9a-f]* { mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 } + 9188: [0-9a-f]* { rli r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 } + 9190: [0-9a-f]* { bitx r5, r6 ; rli r15, r16, 5 ; lh r25, r26 } + 9198: [0-9a-f]* { rli r15, r16, 5 ; mz r5, r6, r7 ; lh r25, r26 } + 91a0: [0-9a-f]* { rli r15, r16, 5 ; slte_u r5, r6, r7 ; lh r25, r26 } + 91a8: [0-9a-f]* { ctz r5, r6 ; rli r15, r16, 5 ; lh_u r25, r26 } + 91b0: [0-9a-f]* { rli r15, r16, 5 ; or r5, r6, r7 ; lh_u r25, r26 } + 91b8: [0-9a-f]* { rli r15, r16, 5 ; sne r5, r6, r7 ; lh_u r25, r26 } + 91c0: [0-9a-f]* { rli r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 } + 91c8: [0-9a-f]* { rli r15, r16, 5 ; rl r5, r6, r7 ; lw r25, r26 } + 91d0: [0-9a-f]* { rli r15, r16, 5 ; sub r5, r6, r7 ; lw r25, r26 } + 91d8: [0-9a-f]* { rli r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 } + 91e0: [0-9a-f]* { rli r15, r16, 5 ; movei r5, 5 ; lh r25, r26 } + 91e8: [0-9a-f]* { mulhh_su r5, r6, r7 ; rli r15, r16, 5 } + 91f0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; rli r15, r16, 5 } + 91f8: [0-9a-f]* { mulhla_uu r5, r6, r7 ; rli r15, r16, 5 } + 9200: [0-9a-f]* { mulll_ss r5, r6, r7 ; rli r15, r16, 5 } + 9208: [0-9a-f]* { mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + 9210: [0-9a-f]* { mvnz r5, r6, r7 ; rli r15, r16, 5 ; sb r25, r26 } + 9218: [0-9a-f]* { rli r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 } + 9220: [0-9a-f]* { rli r15, r16, 5 ; nor r5, r6, r7 ; lw r25, r26 } + 9228: [0-9a-f]* { rli r15, r16, 5 ; ori r5, r6, 5 ; lw r25, r26 } + 9230: [0-9a-f]* { rli r15, r16, 5 ; add r5, r6, r7 ; prefetch r25 } + 9238: [0-9a-f]* { mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 } + 9240: [0-9a-f]* { rli r15, r16, 5 ; shri r5, r6, 5 ; prefetch r25 } + 9248: [0-9a-f]* { rli r15, r16, 5 ; rl r5, r6, r7 ; lh_u r25, r26 } + 9250: [0-9a-f]* { rli r15, r16, 5 ; s1a r5, r6, r7 ; lh_u r25, r26 } + 9258: [0-9a-f]* { rli r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 } + 9260: [0-9a-f]* { ctz r5, r6 ; rli r15, r16, 5 ; sb r25, r26 } + 9268: [0-9a-f]* { rli r15, r16, 5 ; or r5, r6, r7 ; sb r25, r26 } + 9270: [0-9a-f]* { rli r15, r16, 5 ; sne r5, r6, r7 ; sb r25, r26 } + 9278: [0-9a-f]* { rli r15, r16, 5 ; seqb r5, r6, r7 } + 9280: [0-9a-f]* { clz r5, r6 ; rli r15, r16, 5 ; sh r25, r26 } + 9288: [0-9a-f]* { rli r15, r16, 5 ; nor r5, r6, r7 ; sh r25, r26 } + 9290: [0-9a-f]* { rli r15, r16, 5 ; slti_u r5, r6, 5 ; sh r25, r26 } + 9298: [0-9a-f]* { rli r15, r16, 5 ; shl r5, r6, r7 } + 92a0: [0-9a-f]* { rli r15, r16, 5 ; shr r5, r6, r7 ; prefetch r25 } + 92a8: [0-9a-f]* { rli r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 } + 92b0: [0-9a-f]* { rli r15, r16, 5 ; sltb_u r5, r6, r7 } + 92b8: [0-9a-f]* { rli r15, r16, 5 ; slte_u r5, r6, r7 } + 92c0: [0-9a-f]* { rli r15, r16, 5 ; slti_u r5, r6, 5 ; lh_u r25, r26 } + 92c8: [0-9a-f]* { rli r15, r16, 5 ; sne r5, r6, r7 } + 92d0: [0-9a-f]* { rli r15, r16, 5 ; srai r5, r6, 5 ; prefetch r25 } + 92d8: [0-9a-f]* { rli r15, r16, 5 ; subhs r5, r6, r7 } + 92e0: [0-9a-f]* { mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + 92e8: [0-9a-f]* { rli r15, r16, 5 ; shli r5, r6, 5 ; sw r25, r26 } + 92f0: [0-9a-f]* { tblidxb0 r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 } + 92f8: [0-9a-f]* { tblidxb2 r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 } + 9300: [0-9a-f]* { rli r15, r16, 5 ; xor r5, r6, r7 ; lb_u r25, r26 } + 9308: [0-9a-f]* { rli r5, r6, 5 ; addb r15, r16, r17 } + 9310: [0-9a-f]* { rli r5, r6, 5 ; and r15, r16, r17 ; lb_u r25, r26 } + 9318: [0-9a-f]* { rli r5, r6, 5 ; dtlbpr r15 } + 9320: [0-9a-f]* { rli r5, r6, 5 ; ill ; sb r25, r26 } + 9328: [0-9a-f]* { rli r5, r6, 5 ; iret } + 9330: [0-9a-f]* { rli r5, r6, 5 ; ori r15, r16, 5 ; lb r25, r26 } + 9338: [0-9a-f]* { rli r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 } + 9340: [0-9a-f]* { rli r5, r6, 5 ; rl r15, r16, r17 ; lb_u r25, r26 } + 9348: [0-9a-f]* { rli r5, r6, 5 ; sub r15, r16, r17 ; lb_u r25, r26 } + 9350: [0-9a-f]* { rli r5, r6, 5 ; ori r15, r16, 5 ; lh r25, r26 } + 9358: [0-9a-f]* { rli r5, r6, 5 ; srai r15, r16, 5 ; lh r25, r26 } + 9360: [0-9a-f]* { rli r5, r6, 5 ; rl r15, r16, r17 ; lh_u r25, r26 } + 9368: [0-9a-f]* { rli r5, r6, 5 ; sub r15, r16, r17 ; lh_u r25, r26 } + 9370: [0-9a-f]* { rli r5, r6, 5 ; or r15, r16, r17 ; lw r25, r26 } + 9378: [0-9a-f]* { rli r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 } + 9380: [0-9a-f]* { rli r5, r6, 5 ; mnz r15, r16, r17 ; lb_u r25, r26 } + 9388: [0-9a-f]* { rli r5, r6, 5 ; move r15, r16 } + 9390: [0-9a-f]* { rli r5, r6, 5 ; mz r15, r16, r17 ; sb r25, r26 } + 9398: [0-9a-f]* { rli r5, r6, 5 ; nor r15, r16, r17 ; lw r25, r26 } + 93a0: [0-9a-f]* { rli r5, r6, 5 ; ori r15, r16, 5 ; lw r25, r26 } + 93a8: [0-9a-f]* { rli r5, r6, 5 ; movei r15, 5 ; prefetch r25 } + 93b0: [0-9a-f]* { rli r5, r6, 5 ; slte_u r15, r16, r17 ; prefetch r25 } + 93b8: [0-9a-f]* { rli r5, r6, 5 ; rli r15, r16, 5 ; lb r25, r26 } + 93c0: [0-9a-f]* { rli r5, r6, 5 ; s2a r15, r16, r17 ; lb r25, r26 } + 93c8: [0-9a-f]* { rli r5, r6, 5 ; sb r15, r16 } + 93d0: [0-9a-f]* { rli r5, r6, 5 ; s3a r15, r16, r17 ; sb r25, r26 } + 93d8: [0-9a-f]* { rli r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 } + 93e0: [0-9a-f]* { rli r5, r6, 5 ; seqi r15, r16, 5 ; sw r25, r26 } + 93e8: [0-9a-f]* { rli r5, r6, 5 ; rl r15, r16, r17 ; sh r25, r26 } + 93f0: [0-9a-f]* { rli r5, r6, 5 ; sub r15, r16, r17 ; sh r25, r26 } + 93f8: [0-9a-f]* { rli r5, r6, 5 ; shli r15, r16, 5 ; lw r25, r26 } + 9400: [0-9a-f]* { rli r5, r6, 5 ; shri r15, r16, 5 ; lb r25, r26 } + 9408: [0-9a-f]* { rli r5, r6, 5 ; slt r15, r16, r17 ; sw r25, r26 } + 9410: [0-9a-f]* { rli r5, r6, 5 ; slte r15, r16, r17 ; sb r25, r26 } + 9418: [0-9a-f]* { rli r5, r6, 5 ; slti r15, r16, 5 ; lb r25, r26 } + 9420: [0-9a-f]* { rli r5, r6, 5 ; sltib r15, r16, 5 } + 9428: [0-9a-f]* { rli r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 } + 9430: [0-9a-f]* { rli r5, r6, 5 ; sub r15, r16, r17 ; lb r25, r26 } + 9438: [0-9a-f]* { rli r5, r6, 5 ; sw r25, r26 } + 9440: [0-9a-f]* { rli r5, r6, 5 ; shr r15, r16, r17 ; sw r25, r26 } + 9448: [0-9a-f]* { rli r5, r6, 5 ; xor r15, r16, r17 ; lh_u r25, r26 } + 9450: [0-9a-f]* { s1a r15, r16, r17 ; addh r5, r6, r7 } + 9458: [0-9a-f]* { s1a r15, r16, r17 ; and r5, r6, r7 ; lb_u r25, r26 } + 9460: [0-9a-f]* { avgb_u r5, r6, r7 ; s1a r15, r16, r17 } + 9468: [0-9a-f]* { bytex r5, r6 ; s1a r15, r16, r17 ; sw r25, r26 } + 9470: [0-9a-f]* { ctz r5, r6 ; s1a r15, r16, r17 ; sb r25, r26 } + 9478: [0-9a-f]* { s1a r15, r16, r17 ; info 19 ; prefetch r25 } + 9480: [0-9a-f]* { s1a r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 } + 9488: [0-9a-f]* { s1a r15, r16, r17 ; rl r5, r6, r7 ; lb r25, r26 } + 9490: [0-9a-f]* { s1a r15, r16, r17 ; sub r5, r6, r7 ; lb r25, r26 } + 9498: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 94a0: [0-9a-f]* { s1a r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + 94a8: [0-9a-f]* { tblidxb2 r5, r6 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 94b0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 } + 94b8: [0-9a-f]* { s1a r15, r16, r17 ; seqi r5, r6, 5 ; lh r25, r26 } + 94c0: [0-9a-f]* { s1a r15, r16, r17 ; lh r25, r26 } + 94c8: [0-9a-f]* { mulll_uu r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 94d0: [0-9a-f]* { s1a r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 } + 94d8: [0-9a-f]* { s1a r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 } + 94e0: [0-9a-f]* { mvnz r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 } + 94e8: [0-9a-f]* { s1a r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 } + 94f0: [0-9a-f]* { s1a r15, r16, r17 ; minh r5, r6, r7 } + 94f8: [0-9a-f]* { s1a r15, r16, r17 ; move r5, r6 ; lw r25, r26 } + 9500: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 } + 9508: [0-9a-f]* { mulhha_ss r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 9510: [0-9a-f]* { mulhhsa_uu r5, r6, r7 ; s1a r15, r16, r17 } + 9518: [0-9a-f]* { mulll_ss r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 } + 9520: [0-9a-f]* { mullla_ss r5, r6, r7 ; s1a r15, r16, r17 ; lb r25, r26 } + 9528: [0-9a-f]* { mullla_uu r5, r6, r7 ; s1a r15, r16, r17 } + 9530: [0-9a-f]* { mvz r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 } + 9538: [0-9a-f]* { s1a r15, r16, r17 ; nop ; sb r25, r26 } + 9540: [0-9a-f]* { s1a r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 } + 9548: [0-9a-f]* { pcnt r5, r6 ; s1a r15, r16, r17 ; lh r25, r26 } + 9550: [0-9a-f]* { s1a r15, r16, r17 ; movei r5, 5 ; prefetch r25 } + 9558: [0-9a-f]* { s1a r15, r16, r17 ; s1a r5, r6, r7 ; prefetch r25 } + 9560: [0-9a-f]* { tblidxb1 r5, r6 ; s1a r15, r16, r17 ; prefetch r25 } + 9568: [0-9a-f]* { s1a r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 } + 9570: [0-9a-f]* { s1a r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 } + 9578: [0-9a-f]* { sadh_u r5, r6, r7 ; s1a r15, r16, r17 } + 9580: [0-9a-f]* { mulll_uu r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 } + 9588: [0-9a-f]* { s1a r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 } + 9590: [0-9a-f]* { s1a r15, r16, r17 ; seq r5, r6, r7 ; lh r25, r26 } + 9598: [0-9a-f]* { s1a r15, r16, r17 ; seqib r5, r6, 5 } + 95a0: [0-9a-f]* { mulll_ss r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 } + 95a8: [0-9a-f]* { s1a r15, r16, r17 ; shli r5, r6, 5 ; sh r25, r26 } + 95b0: [0-9a-f]* { s1a r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 } + 95b8: [0-9a-f]* { s1a r15, r16, r17 ; shli r5, r6, 5 } + 95c0: [0-9a-f]* { s1a r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 } + 95c8: [0-9a-f]* { s1a r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 } + 95d0: [0-9a-f]* { s1a r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 } + 95d8: [0-9a-f]* { s1a r15, r16, r17 ; slti r5, r6, 5 ; prefetch r25 } + 95e0: [0-9a-f]* { s1a r15, r16, r17 ; sne r5, r6, r7 ; lb_u r25, r26 } + 95e8: [0-9a-f]* { s1a r15, r16, r17 ; sra r5, r6, r7 } + 95f0: [0-9a-f]* { s1a r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 } + 95f8: [0-9a-f]* { s1a r15, r16, r17 ; mnz r5, r6, r7 ; sw r25, r26 } + 9600: [0-9a-f]* { s1a r15, r16, r17 ; rl r5, r6, r7 ; sw r25, r26 } + 9608: [0-9a-f]* { s1a r15, r16, r17 ; sub r5, r6, r7 ; sw r25, r26 } + 9610: [0-9a-f]* { tblidxb1 r5, r6 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 9618: [0-9a-f]* { tblidxb3 r5, r6 ; s1a r15, r16, r17 ; lh_u r25, r26 } + 9620: [0-9a-f]* { s1a r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + 9628: [0-9a-f]* { s1a r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 } + 9630: [0-9a-f]* { s1a r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + 9638: [0-9a-f]* { s1a r5, r6, r7 } + 9640: [0-9a-f]* { s1a r5, r6, r7 ; info 19 ; sw r25, r26 } + 9648: [0-9a-f]* { s1a r5, r6, r7 ; info 19 ; lb r25, r26 } + 9650: [0-9a-f]* { s1a r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 } + 9658: [0-9a-f]* { s1a r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + 9660: [0-9a-f]* { s1a r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + 9668: [0-9a-f]* { s1a r5, r6, r7 ; info 19 ; lh r25, r26 } + 9670: [0-9a-f]* { s1a r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 } + 9678: [0-9a-f]* { s1a r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 } + 9680: [0-9a-f]* { s1a r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + 9688: [0-9a-f]* { s1a r5, r6, r7 ; ill ; lw r25, r26 } + 9690: [0-9a-f]* { s1a r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + 9698: [0-9a-f]* { s1a r5, r6, r7 ; mf } + 96a0: [0-9a-f]* { s1a r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 } + 96a8: [0-9a-f]* { s1a r5, r6, r7 ; moveli.sn r15, 4660 } + 96b0: [0-9a-f]* { s1a r5, r6, r7 ; nop ; sb r25, r26 } + 96b8: [0-9a-f]* { s1a r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 } + 96c0: [0-9a-f]* { s1a r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + 96c8: [0-9a-f]* { s1a r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 } + 96d0: [0-9a-f]* { s1a r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 } + 96d8: [0-9a-f]* { s1a r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 } + 96e0: [0-9a-f]* { s1a r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 } + 96e8: [0-9a-f]* { s1a r5, r6, r7 ; nop ; sb r25, r26 } + 96f0: [0-9a-f]* { s1a r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 } + 96f8: [0-9a-f]* { s1a r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 } + 9700: [0-9a-f]* { s1a r5, r6, r7 ; mnz r15, r16, r17 ; sh r25, r26 } + 9708: [0-9a-f]* { s1a r5, r6, r7 ; slt_u r15, r16, r17 ; sh r25, r26 } + 9710: [0-9a-f]* { s1a r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 } + 9718: [0-9a-f]* { s1a r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 } + 9720: [0-9a-f]* { s1a r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 } + 9728: [0-9a-f]* { s1a r5, r6, r7 ; sltb r15, r16, r17 } + 9730: [0-9a-f]* { s1a r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 } + 9738: [0-9a-f]* { s1a r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 } + 9740: [0-9a-f]* { s1a r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + 9748: [0-9a-f]* { s1a r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 } + 9750: [0-9a-f]* { s1a r5, r6, r7 ; subh r15, r16, r17 } + 9758: [0-9a-f]* { s1a r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + 9760: [0-9a-f]* { s1a r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 } + 9768: [0-9a-f]* { s2a r15, r16, r17 ; add r5, r6, r7 ; lw r25, r26 } + 9770: [0-9a-f]* { s2a r15, r16, r17 ; addib r5, r6, 5 } + 9778: [0-9a-f]* { s2a r15, r16, r17 ; andi r5, r6, 5 ; lh_u r25, r26 } + 9780: [0-9a-f]* { bytex r5, r6 ; s2a r15, r16, r17 ; lb r25, r26 } + 9788: [0-9a-f]* { crc32_32 r5, r6, r7 ; s2a r15, r16, r17 } + 9790: [0-9a-f]* { s2a r15, r16, r17 ; sh r25, r26 } + 9798: [0-9a-f]* { s2a r15, r16, r17 ; and r5, r6, r7 ; lb r25, r26 } + 97a0: [0-9a-f]* { mvnz r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + 97a8: [0-9a-f]* { s2a r15, r16, r17 ; slt_u r5, r6, r7 ; lb r25, r26 } + 97b0: [0-9a-f]* { bytex r5, r6 ; s2a r15, r16, r17 ; lb_u r25, r26 } + 97b8: [0-9a-f]* { s2a r15, r16, r17 ; nop ; lb_u r25, r26 } + 97c0: [0-9a-f]* { s2a r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + 97c8: [0-9a-f]* { s2a r15, r16, r17 ; lh r25, r26 } + 97d0: [0-9a-f]* { s2a r15, r16, r17 ; ori r5, r6, 5 ; lh r25, r26 } + 97d8: [0-9a-f]* { s2a r15, r16, r17 ; sra r5, r6, r7 ; lh r25, r26 } + 97e0: [0-9a-f]* { s2a r15, r16, r17 ; move r5, r6 ; lh_u r25, r26 } + 97e8: [0-9a-f]* { s2a r15, r16, r17 ; rli r5, r6, 5 ; lh_u r25, r26 } + 97f0: [0-9a-f]* { tblidxb0 r5, r6 ; s2a r15, r16, r17 ; lh_u r25, r26 } + 97f8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + 9800: [0-9a-f]* { s2a r15, r16, r17 ; s3a r5, r6, r7 ; lw r25, r26 } + 9808: [0-9a-f]* { tblidxb3 r5, r6 ; s2a r15, r16, r17 ; lw r25, r26 } + 9810: [0-9a-f]* { s2a r15, r16, r17 ; mnz r5, r6, r7 ; sw r25, r26 } + 9818: [0-9a-f]* { s2a r15, r16, r17 ; movei r5, 5 ; sb r25, r26 } + 9820: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 } + 9828: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 } + 9830: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 } + 9838: [0-9a-f]* { mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 } + 9840: [0-9a-f]* { mullla_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 } + 9848: [0-9a-f]* { mvz r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + 9850: [0-9a-f]* { s2a r15, r16, r17 ; mzb r5, r6, r7 } + 9858: [0-9a-f]* { s2a r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 } + 9860: [0-9a-f]* { s2a r15, r16, r17 ; ori r5, r6, 5 ; sw r25, r26 } + 9868: [0-9a-f]* { bitx r5, r6 ; s2a r15, r16, r17 ; prefetch r25 } + 9870: [0-9a-f]* { s2a r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + 9878: [0-9a-f]* { s2a r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 } + 9880: [0-9a-f]* { s2a r15, r16, r17 ; rl r5, r6, r7 ; sh r25, r26 } + 9888: [0-9a-f]* { s2a r15, r16, r17 ; s1a r5, r6, r7 ; sh r25, r26 } + 9890: [0-9a-f]* { s2a r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 } + 9898: [0-9a-f]* { s2a r15, r16, r17 ; move r5, r6 ; sb r25, r26 } + 98a0: [0-9a-f]* { s2a r15, r16, r17 ; rli r5, r6, 5 ; sb r25, r26 } + 98a8: [0-9a-f]* { tblidxb0 r5, r6 ; s2a r15, r16, r17 ; sb r25, r26 } + 98b0: [0-9a-f]* { s2a r15, r16, r17 ; seqi r5, r6, 5 ; lh r25, r26 } + 98b8: [0-9a-f]* { s2a r15, r16, r17 ; mnz r5, r6, r7 ; sh r25, r26 } + 98c0: [0-9a-f]* { s2a r15, r16, r17 ; rl r5, r6, r7 ; sh r25, r26 } + 98c8: [0-9a-f]* { s2a r15, r16, r17 ; sub r5, r6, r7 ; sh r25, r26 } + 98d0: [0-9a-f]* { s2a r15, r16, r17 ; shli r5, r6, 5 ; lb_u r25, r26 } + 98d8: [0-9a-f]* { s2a r15, r16, r17 ; shr r5, r6, r7 } + 98e0: [0-9a-f]* { s2a r15, r16, r17 ; slt r5, r6, r7 ; prefetch r25 } + 98e8: [0-9a-f]* { s2a r15, r16, r17 ; slte r5, r6, r7 ; lh_u r25, r26 } + 98f0: [0-9a-f]* { s2a r15, r16, r17 ; slteh_u r5, r6, r7 } + 98f8: [0-9a-f]* { s2a r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 } + 9900: [0-9a-f]* { s2a r15, r16, r17 ; sra r5, r6, r7 ; lb_u r25, r26 } + 9908: [0-9a-f]* { s2a r15, r16, r17 ; srai r5, r6, 5 } + 9910: [0-9a-f]* { s2a r15, r16, r17 ; and r5, r6, r7 ; sw r25, r26 } + 9918: [0-9a-f]* { mvnz r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + 9920: [0-9a-f]* { s2a r15, r16, r17 ; slt_u r5, r6, r7 ; sw r25, r26 } + 9928: [0-9a-f]* { tblidxb0 r5, r6 ; s2a r15, r16, r17 ; prefetch r25 } + 9930: [0-9a-f]* { tblidxb2 r5, r6 ; s2a r15, r16, r17 ; prefetch r25 } + 9938: [0-9a-f]* { s2a r15, r16, r17 ; xor r5, r6, r7 ; prefetch r25 } + 9940: [0-9a-f]* { s2a r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 } + 9948: [0-9a-f]* { s2a r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + 9950: [0-9a-f]* { s2a r5, r6, r7 ; lb_u r25, r26 } + 9958: [0-9a-f]* { s2a r5, r6, r7 ; info 19 ; lb r25, r26 } + 9960: [0-9a-f]* { s2a r5, r6, r7 ; jrp r15 } + 9968: [0-9a-f]* { s2a r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + 9970: [0-9a-f]* { s2a r5, r6, r7 ; lb_u r15, r16 } + 9978: [0-9a-f]* { s2a r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 9980: [0-9a-f]* { s2a r5, r6, r7 ; lbadd_u r15, r16, 5 } + 9988: [0-9a-f]* { s2a r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 } + 9990: [0-9a-f]* { s2a r5, r6, r7 ; lh_u r15, r16 } + 9998: [0-9a-f]* { s2a r5, r6, r7 ; s3a r15, r16, r17 ; lh_u r25, r26 } + 99a0: [0-9a-f]* { s2a r5, r6, r7 ; lhadd_u r15, r16, 5 } + 99a8: [0-9a-f]* { s2a r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 } + 99b0: [0-9a-f]* { s2a r5, r6, r7 ; lw r25, r26 } + 99b8: [0-9a-f]* { s2a r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + 99c0: [0-9a-f]* { s2a r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 } + 99c8: [0-9a-f]* { s2a r5, r6, r7 ; mzb r15, r16, r17 } + 99d0: [0-9a-f]* { s2a r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + 99d8: [0-9a-f]* { s2a r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 } + 99e0: [0-9a-f]* { s2a r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } + 99e8: [0-9a-f]* { s2a r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 } + 99f0: [0-9a-f]* { s2a r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 } + 99f8: [0-9a-f]* { s2a r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + 9a00: [0-9a-f]* { s2a r5, r6, r7 ; andi r15, r16, 5 ; sb r25, r26 } + 9a08: [0-9a-f]* { s2a r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + 9a10: [0-9a-f]* { s2a r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 } + 9a18: [0-9a-f]* { s2a r5, r6, r7 ; sh r15, r16 } + 9a20: [0-9a-f]* { s2a r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 } + 9a28: [0-9a-f]* { s2a r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + 9a30: [0-9a-f]* { s2a r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 } + 9a38: [0-9a-f]* { s2a r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + 9a40: [0-9a-f]* { s2a r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 } + 9a48: [0-9a-f]* { s2a r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 } + 9a50: [0-9a-f]* { s2a r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + 9a58: [0-9a-f]* { s2a r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 } + 9a60: [0-9a-f]* { s2a r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 } + 9a68: [0-9a-f]* { s2a r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + 9a70: [0-9a-f]* { s2a r5, r6, r7 ; move r15, r16 ; sw r25, r26 } + 9a78: [0-9a-f]* { s2a r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 } + 9a80: [0-9a-f]* { s2a r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + 9a88: [0-9a-f]* { s3a r15, r16, r17 ; addi r5, r6, 5 ; lh r25, r26 } + 9a90: [0-9a-f]* { s3a r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 } + 9a98: [0-9a-f]* { bitx r5, r6 ; s3a r15, r16, r17 ; lh r25, r26 } + 9aa0: [0-9a-f]* { clz r5, r6 ; s3a r15, r16, r17 ; lh r25, r26 } + 9aa8: [0-9a-f]* { dword_align r5, r6, r7 ; s3a r15, r16, r17 } + 9ab0: [0-9a-f]* { s3a r15, r16, r17 ; info 19 } + 9ab8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s3a r15, r16, r17 ; lb r25, r26 } + 9ac0: [0-9a-f]* { s3a r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 } + 9ac8: [0-9a-f]* { tblidxb3 r5, r6 ; s3a r15, r16, r17 ; lb r25, r26 } + 9ad0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 } + 9ad8: [0-9a-f]* { s3a r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 } + 9ae0: [0-9a-f]* { s3a r15, r16, r17 ; add r5, r6, r7 ; lh r25, r26 } + 9ae8: [0-9a-f]* { mullla_ss r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 } + 9af0: [0-9a-f]* { s3a r15, r16, r17 ; shri r5, r6, 5 ; lh r25, r26 } + 9af8: [0-9a-f]* { s3a r15, r16, r17 ; andi r5, r6, 5 ; lh_u r25, r26 } + 9b00: [0-9a-f]* { mvz r5, r6, r7 ; s3a r15, r16, r17 ; lh_u r25, r26 } + 9b08: [0-9a-f]* { s3a r15, r16, r17 ; slte r5, r6, r7 ; lh_u r25, r26 } + 9b10: [0-9a-f]* { clz r5, r6 ; s3a r15, r16, r17 ; lw r25, r26 } + 9b18: [0-9a-f]* { s3a r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 } + 9b20: [0-9a-f]* { s3a r15, r16, r17 ; slti_u r5, r6, 5 ; lw r25, r26 } + 9b28: [0-9a-f]* { s3a r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 } + 9b30: [0-9a-f]* { s3a r15, r16, r17 ; move r5, r6 ; sw r25, r26 } + 9b38: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + 9b40: [0-9a-f]* { mulhha_ss r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 } + 9b48: [0-9a-f]* { mulhl_uu r5, r6, r7 ; s3a r15, r16, r17 } + 9b50: [0-9a-f]* { mulll_ss r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 } + 9b58: [0-9a-f]* { mullla_ss r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 } + 9b60: [0-9a-f]* { mvnz r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 } + 9b68: [0-9a-f]* { s3a r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 } + 9b70: [0-9a-f]* { s3a r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 } + 9b78: [0-9a-f]* { s3a r15, r16, r17 ; ori r5, r6, 5 ; lb r25, r26 } + 9b80: [0-9a-f]* { pcnt r5, r6 ; s3a r15, r16, r17 ; sb r25, r26 } + 9b88: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 } + 9b90: [0-9a-f]* { s3a r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 } + 9b98: [0-9a-f]* { s3a r15, r16, r17 ; prefetch r25 } + 9ba0: [0-9a-f]* { s3a r15, r16, r17 ; rli r5, r6, 5 } + 9ba8: [0-9a-f]* { s3a r15, r16, r17 ; s2a r5, r6, r7 } + 9bb0: [0-9a-f]* { s3a r15, r16, r17 ; andi r5, r6, 5 ; sb r25, r26 } + 9bb8: [0-9a-f]* { mvz r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + 9bc0: [0-9a-f]* { s3a r15, r16, r17 ; slte r5, r6, r7 ; sb r25, r26 } + 9bc8: [0-9a-f]* { s3a r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 } + 9bd0: [0-9a-f]* { s3a r15, r16, r17 ; and r5, r6, r7 ; sh r25, r26 } + 9bd8: [0-9a-f]* { mvnz r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 } + 9be0: [0-9a-f]* { s3a r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 } + 9be8: [0-9a-f]* { s3a r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 } + 9bf0: [0-9a-f]* { s3a r15, r16, r17 ; shr r5, r6, r7 ; lb_u r25, r26 } + 9bf8: [0-9a-f]* { s3a r15, r16, r17 ; shri r5, r6, 5 } + 9c00: [0-9a-f]* { s3a r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 } + 9c08: [0-9a-f]* { s3a r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 } + 9c10: [0-9a-f]* { s3a r15, r16, r17 ; slti r5, r6, 5 } + 9c18: [0-9a-f]* { s3a r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 } + 9c20: [0-9a-f]* { s3a r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + 9c28: [0-9a-f]* { s3a r15, r16, r17 ; sub r5, r6, r7 } + 9c30: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s3a r15, r16, r17 ; sw r25, r26 } + 9c38: [0-9a-f]* { s3a r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 } + 9c40: [0-9a-f]* { tblidxb3 r5, r6 ; s3a r15, r16, r17 ; sw r25, r26 } + 9c48: [0-9a-f]* { tblidxb1 r5, r6 ; s3a r15, r16, r17 ; sh r25, r26 } + 9c50: [0-9a-f]* { tblidxb3 r5, r6 ; s3a r15, r16, r17 ; sh r25, r26 } + 9c58: [0-9a-f]* { s3a r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 } + 9c60: [0-9a-f]* { s3a r5, r6, r7 ; addli r15, r16, 4660 } + 9c68: [0-9a-f]* { s3a r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + 9c70: [0-9a-f]* { s3a r5, r6, r7 ; ill ; lh r25, r26 } + 9c78: [0-9a-f]* { s3a r5, r6, r7 ; inthh r15, r16, r17 } + 9c80: [0-9a-f]* { s3a r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 } + 9c88: [0-9a-f]* { s3a r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + 9c90: [0-9a-f]* { s3a r5, r6, r7 ; nop ; lb_u r25, r26 } + 9c98: [0-9a-f]* { s3a r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 } + 9ca0: [0-9a-f]* { s3a r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + 9ca8: [0-9a-f]* { s3a r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 } + 9cb0: [0-9a-f]* { s3a r5, r6, r7 ; nop ; lh_u r25, r26 } + 9cb8: [0-9a-f]* { s3a r5, r6, r7 ; slti_u r15, r16, 5 ; lh_u r25, r26 } + 9cc0: [0-9a-f]* { s3a r5, r6, r7 ; movei r15, 5 ; lw r25, r26 } + 9cc8: [0-9a-f]* { s3a r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + 9cd0: [0-9a-f]* { s3a r5, r6, r7 ; minib_u r15, r16, 5 } + 9cd8: [0-9a-f]* { s3a r5, r6, r7 ; move r15, r16 ; prefetch r25 } + 9ce0: [0-9a-f]* { s3a r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + 9ce8: [0-9a-f]* { s3a r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 } + 9cf0: [0-9a-f]* { s3a r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 } + 9cf8: [0-9a-f]* { s3a r5, r6, r7 ; ill ; prefetch r25 } + 9d00: [0-9a-f]* { s3a r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 } + 9d08: [0-9a-f]* { s3a r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 } + 9d10: [0-9a-f]* { s3a r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 } + 9d18: [0-9a-f]* { s3a r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + 9d20: [0-9a-f]* { s3a r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 } + 9d28: [0-9a-f]* { s3a r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 } + 9d30: [0-9a-f]* { s3a r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + 9d38: [0-9a-f]* { s3a r5, r6, r7 ; nop ; sh r25, r26 } + 9d40: [0-9a-f]* { s3a r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 } + 9d48: [0-9a-f]* { s3a r5, r6, r7 ; shli r15, r16, 5 ; lb r25, r26 } + 9d50: [0-9a-f]* { s3a r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 } + 9d58: [0-9a-f]* { s3a r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 } + 9d60: [0-9a-f]* { s3a r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 } + 9d68: [0-9a-f]* { s3a r5, r6, r7 ; slteh r15, r16, r17 } + 9d70: [0-9a-f]* { s3a r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 } + 9d78: [0-9a-f]* { s3a r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 } + 9d80: [0-9a-f]* { s3a r5, r6, r7 ; srai r15, r16, 5 ; sw r25, r26 } + 9d88: [0-9a-f]* { s3a r5, r6, r7 ; add r15, r16, r17 ; sw r25, r26 } + 9d90: [0-9a-f]* { s3a r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + 9d98: [0-9a-f]* { s3a r5, r6, r7 ; wh64 r15 } + 9da0: [0-9a-f]* { sadab_u r5, r6, r7 ; addli r15, r16, 4660 } + 9da8: [0-9a-f]* { sadab_u r5, r6, r7 ; jalr r15 } + 9db0: [0-9a-f]* { sadab_u r5, r6, r7 ; maxih r15, r16, 5 } + 9db8: [0-9a-f]* { sadab_u r5, r6, r7 ; nor r15, r16, r17 } + 9dc0: [0-9a-f]* { sadab_u r5, r6, r7 ; seqib r15, r16, 5 } + 9dc8: [0-9a-f]* { sadab_u r5, r6, r7 ; slte r15, r16, r17 } + 9dd0: [0-9a-f]* { sadab_u r5, r6, r7 ; srai r15, r16, 5 } + 9dd8: [0-9a-f]* { sadah r5, r6, r7 ; addi r15, r16, 5 } + 9de0: [0-9a-f]* { sadah r5, r6, r7 ; intlh r15, r16, r17 } + 9de8: [0-9a-f]* { sadah r5, r6, r7 ; maxb_u r15, r16, r17 } + 9df0: [0-9a-f]* { sadah r5, r6, r7 ; mzb r15, r16, r17 } + 9df8: [0-9a-f]* { sadah r5, r6, r7 ; seqb r15, r16, r17 } + 9e00: [0-9a-f]* { sadah r5, r6, r7 ; slt_u r15, r16, r17 } + 9e08: [0-9a-f]* { sadah r5, r6, r7 ; sra r15, r16, r17 } + 9e10: [0-9a-f]* { sadah_u r5, r6, r7 ; addbs_u r15, r16, r17 } + 9e18: [0-9a-f]* { sadah_u r5, r6, r7 ; inthb r15, r16, r17 } + 9e20: [0-9a-f]* { sadah_u r5, r6, r7 ; lw_na r15, r16 } + 9e28: [0-9a-f]* { sadah_u r5, r6, r7 ; moveli.sn r15, 4660 } + 9e30: [0-9a-f]* { sadah_u r5, r6, r7 ; sb r15, r16 } + 9e38: [0-9a-f]* { sadah_u r5, r6, r7 ; shrib r15, r16, 5 } + 9e40: [0-9a-f]* { sadah_u r5, r6, r7 ; sne r15, r16, r17 } + 9e48: [0-9a-f]* { sadah_u r5, r6, r7 ; xori r15, r16, 5 } + 9e50: [0-9a-f]* { sadb_u r5, r6, r7 ; ill } + 9e58: [0-9a-f]* { sadb_u r5, r6, r7 ; lhadd_u r15, r16, 5 } + 9e60: [0-9a-f]* { sadb_u r5, r6, r7 ; move r15, r16 } + 9e68: [0-9a-f]* { sadb_u r5, r6, r7 ; s1a r15, r16, r17 } + 9e70: [0-9a-f]* { sadb_u r5, r6, r7 ; shrb r15, r16, r17 } + 9e78: [0-9a-f]* { sadb_u r5, r6, r7 ; sltib_u r15, r16, 5 } + 9e80: [0-9a-f]* { sadb_u r5, r6, r7 ; tns r15, r16 } + 9e88: [0-9a-f]* { sadh r5, r6, r7 ; flush r15 } + 9e90: [0-9a-f]* { sadh r5, r6, r7 ; lh r15, r16 } + 9e98: [0-9a-f]* { sadh r5, r6, r7 ; mnz r15, r16, r17 } + 9ea0: [0-9a-f]* { sadh r5, r6, r7 ; raise } + 9ea8: [0-9a-f]* { sadh r5, r6, r7 ; shlib r15, r16, 5 } + 9eb0: [0-9a-f]* { sadh r5, r6, r7 ; slti r15, r16, 5 } + 9eb8: [0-9a-f]* { sadh r5, r6, r7 ; subs r15, r16, r17 } + 9ec0: [0-9a-f]* { sadh_u r5, r6, r7 ; auli r15, r16, 4660 } + 9ec8: [0-9a-f]* { sadh_u r5, r6, r7 ; lb_u r15, r16 } + 9ed0: [0-9a-f]* { sadh_u r5, r6, r7 ; minib_u r15, r16, 5 } + 9ed8: [0-9a-f]* { sadh_u r5, r6, r7 ; packhs r15, r16, r17 } + 9ee0: [0-9a-f]* { sadh_u r5, r6, r7 ; shlb r15, r16, r17 } + 9ee8: [0-9a-f]* { sadh_u r5, r6, r7 ; slteh_u r15, r16, r17 } + 9ef0: [0-9a-f]* { sadh_u r5, r6, r7 ; subbs_u r15, r16, r17 } + 9ef8: [0-9a-f]* { adds r5, r6, r7 ; sb r15, r16 } + 9f00: [0-9a-f]* { intlb r5, r6, r7 ; sb r15, r16 } + 9f08: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sb r15, r16 } + 9f10: [0-9a-f]* { mulllsa_uu r5, r6, r7 ; sb r15, r16 } + 9f18: [0-9a-f]* { sadab_u r5, r6, r7 ; sb r15, r16 } + 9f20: [0-9a-f]* { shrh r5, r6, r7 ; sb r15, r16 } + 9f28: [0-9a-f]* { sltih r5, r6, 5 ; sb r15, r16 } + 9f30: [0-9a-f]* { tblidxb3 r5, r6 ; sb r15, r16 } + 9f38: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 } + 9f40: [0-9a-f]* { add r15, r16, r17 ; shl r5, r6, r7 ; sb r25, r26 } + 9f48: [0-9a-f]* { add r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 } + 9f50: [0-9a-f]* { add r5, r6, r7 ; seq r15, r16, r17 ; sb r25, r26 } + 9f58: [0-9a-f]* { addi r15, r16, 5 ; and r5, r6, r7 ; sb r25, r26 } + 9f60: [0-9a-f]* { mvnz r5, r6, r7 ; addi r15, r16, 5 ; sb r25, r26 } + 9f68: [0-9a-f]* { addi r15, r16, 5 ; slt_u r5, r6, r7 ; sb r25, r26 } + 9f70: [0-9a-f]* { addi r5, r6, 5 ; ill ; sb r25, r26 } + 9f78: [0-9a-f]* { addi r5, r6, 5 ; shri r15, r16, 5 ; sb r25, r26 } + 9f80: [0-9a-f]* { ctz r5, r6 ; and r15, r16, r17 ; sb r25, r26 } + 9f88: [0-9a-f]* { and r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 } + 9f90: [0-9a-f]* { and r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 } + 9f98: [0-9a-f]* { and r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + 9fa0: [0-9a-f]* { and r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 } + 9fa8: [0-9a-f]* { andi r15, r16, 5 ; movei r5, 5 ; sb r25, r26 } + 9fb0: [0-9a-f]* { andi r15, r16, 5 ; s1a r5, r6, r7 ; sb r25, r26 } + 9fb8: [0-9a-f]* { tblidxb1 r5, r6 ; andi r15, r16, 5 ; sb r25, r26 } + 9fc0: [0-9a-f]* { andi r5, r6, 5 ; rl r15, r16, r17 ; sb r25, r26 } + 9fc8: [0-9a-f]* { andi r5, r6, 5 ; sub r15, r16, r17 ; sb r25, r26 } + 9fd0: [0-9a-f]* { bitx r5, r6 ; s1a r15, r16, r17 ; sb r25, r26 } + 9fd8: [0-9a-f]* { bitx r5, r6 ; sb r25, r26 } + 9fe0: [0-9a-f]* { bytex r5, r6 ; s3a r15, r16, r17 ; sb r25, r26 } + 9fe8: [0-9a-f]* { clz r5, r6 ; addi r15, r16, 5 ; sb r25, r26 } + 9ff0: [0-9a-f]* { clz r5, r6 ; seqi r15, r16, 5 ; sb r25, r26 } + 9ff8: [0-9a-f]* { ctz r5, r6 ; andi r15, r16, 5 ; sb r25, r26 } + a000: [0-9a-f]* { ctz r5, r6 ; shli r15, r16, 5 ; sb r25, r26 } + a008: [0-9a-f]* { and r5, r6, r7 ; sb r25, r26 } + a010: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sb r25, r26 } + a018: [0-9a-f]* { rli r5, r6, 5 ; sb r25, r26 } + a020: [0-9a-f]* { slt r5, r6, r7 ; sb r25, r26 } + a028: [0-9a-f]* { tblidxb1 r5, r6 ; sb r25, r26 } + a030: [0-9a-f]* { mulhh_uu r5, r6, r7 ; ill ; sb r25, r26 } + a038: [0-9a-f]* { s3a r5, r6, r7 ; ill ; sb r25, r26 } + a040: [0-9a-f]* { tblidxb3 r5, r6 ; ill ; sb r25, r26 } + a048: [0-9a-f]* { info 19 ; move r15, r16 ; sb r25, r26 } + a050: [0-9a-f]* { info 19 ; or r15, r16, r17 ; sb r25, r26 } + a058: [0-9a-f]* { info 19 ; shl r5, r6, r7 ; sb r25, r26 } + a060: [0-9a-f]* { info 19 ; sne r5, r6, r7 ; sb r25, r26 } + a068: [0-9a-f]* { clz r5, r6 ; mnz r15, r16, r17 ; sb r25, r26 } + a070: [0-9a-f]* { mnz r15, r16, r17 ; nor r5, r6, r7 ; sb r25, r26 } + a078: [0-9a-f]* { mnz r15, r16, r17 ; slti_u r5, r6, 5 ; sb r25, r26 } + a080: [0-9a-f]* { mnz r5, r6, r7 ; movei r15, 5 ; sb r25, r26 } + a088: [0-9a-f]* { mnz r5, r6, r7 ; slte_u r15, r16, r17 ; sb r25, r26 } + a090: [0-9a-f]* { move r15, r16 ; move r5, r6 ; sb r25, r26 } + a098: [0-9a-f]* { move r15, r16 ; rli r5, r6, 5 ; sb r25, r26 } + a0a0: [0-9a-f]* { tblidxb0 r5, r6 ; move r15, r16 ; sb r25, r26 } + a0a8: [0-9a-f]* { move r5, r6 ; ori r15, r16, 5 ; sb r25, r26 } + a0b0: [0-9a-f]* { move r5, r6 ; srai r15, r16, 5 ; sb r25, r26 } + a0b8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; movei r15, 5 ; sb r25, r26 } + a0c0: [0-9a-f]* { movei r15, 5 ; seqi r5, r6, 5 ; sb r25, r26 } + a0c8: [0-9a-f]* { movei r15, 5 ; sb r25, r26 } + a0d0: [0-9a-f]* { movei r5, 5 ; s3a r15, r16, r17 ; sb r25, r26 } + a0d8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; addi r15, r16, 5 ; sb r25, r26 } + a0e0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; seqi r15, r16, 5 ; sb r25, r26 } + a0e8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; andi r15, r16, 5 ; sb r25, r26 } + a0f0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + a0f8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; ill ; sb r25, r26 } + a100: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shri r15, r16, 5 ; sb r25, r26 } + a108: [0-9a-f]* { mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + a110: [0-9a-f]* { mulhha_uu r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + a118: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; movei r15, 5 ; sb r25, r26 } + a120: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slte_u r15, r16, r17 ; sb r25, r26 } + a128: [0-9a-f]* { mulll_ss r5, r6, r7 ; nop ; sb r25, r26 } + a130: [0-9a-f]* { mulll_ss r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 } + a138: [0-9a-f]* { mulll_uu r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 } + a140: [0-9a-f]* { mulll_uu r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 } + a148: [0-9a-f]* { mullla_ss r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 } + a150: [0-9a-f]* { mullla_ss r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 } + a158: [0-9a-f]* { mullla_uu r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 } + a160: [0-9a-f]* { mullla_uu r5, r6, r7 ; sb r25, r26 } + a168: [0-9a-f]* { mvnz r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + a170: [0-9a-f]* { mvz r5, r6, r7 ; addi r15, r16, 5 ; sb r25, r26 } + a178: [0-9a-f]* { mvz r5, r6, r7 ; seqi r15, r16, 5 ; sb r25, r26 } + a180: [0-9a-f]* { mz r15, r16, r17 ; andi r5, r6, 5 ; sb r25, r26 } + a188: [0-9a-f]* { mvz r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + a190: [0-9a-f]* { mz r15, r16, r17 ; slte r5, r6, r7 ; sb r25, r26 } + a198: [0-9a-f]* { mz r5, r6, r7 ; info 19 ; sb r25, r26 } + a1a0: [0-9a-f]* { mz r5, r6, r7 ; slt r15, r16, r17 ; sb r25, r26 } + a1a8: [0-9a-f]* { bitx r5, r6 ; nop ; sb r25, r26 } + a1b0: [0-9a-f]* { mullla_ss r5, r6, r7 ; nop ; sb r25, r26 } + a1b8: [0-9a-f]* { nop ; s2a r15, r16, r17 ; sb r25, r26 } + a1c0: [0-9a-f]* { nop ; slte r15, r16, r17 ; sb r25, r26 } + a1c8: [0-9a-f]* { nop ; xor r15, r16, r17 ; sb r25, r26 } + a1d0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 } + a1d8: [0-9a-f]* { nor r15, r16, r17 ; shl r5, r6, r7 ; sb r25, r26 } + a1e0: [0-9a-f]* { nor r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 } + a1e8: [0-9a-f]* { nor r5, r6, r7 ; seq r15, r16, r17 ; sb r25, r26 } + a1f0: [0-9a-f]* { or r15, r16, r17 ; and r5, r6, r7 ; sb r25, r26 } + a1f8: [0-9a-f]* { mvnz r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 } + a200: [0-9a-f]* { or r15, r16, r17 ; slt_u r5, r6, r7 ; sb r25, r26 } + a208: [0-9a-f]* { or r5, r6, r7 ; ill ; sb r25, r26 } + a210: [0-9a-f]* { or r5, r6, r7 ; shri r15, r16, 5 ; sb r25, r26 } + a218: [0-9a-f]* { ctz r5, r6 ; ori r15, r16, 5 ; sb r25, r26 } + a220: [0-9a-f]* { ori r15, r16, 5 ; or r5, r6, r7 ; sb r25, r26 } + a228: [0-9a-f]* { ori r15, r16, 5 ; sne r5, r6, r7 ; sb r25, r26 } + a230: [0-9a-f]* { ori r5, r6, 5 ; mz r15, r16, r17 ; sb r25, r26 } + a238: [0-9a-f]* { ori r5, r6, 5 ; slti r15, r16, 5 ; sb r25, r26 } + a240: [0-9a-f]* { pcnt r5, r6 ; nor r15, r16, r17 ; sb r25, r26 } + a248: [0-9a-f]* { pcnt r5, r6 ; sne r15, r16, r17 ; sb r25, r26 } + a250: [0-9a-f]* { mulhh_uu r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 } + a258: [0-9a-f]* { rl r15, r16, r17 ; s3a r5, r6, r7 ; sb r25, r26 } + a260: [0-9a-f]* { tblidxb3 r5, r6 ; rl r15, r16, r17 ; sb r25, r26 } + a268: [0-9a-f]* { rl r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 } + a270: [0-9a-f]* { rl r5, r6, r7 ; sb r25, r26 } + a278: [0-9a-f]* { mulll_uu r5, r6, r7 ; rli r15, r16, 5 ; sb r25, r26 } + a280: [0-9a-f]* { rli r15, r16, 5 ; shr r5, r6, r7 ; sb r25, r26 } + a288: [0-9a-f]* { rli r5, r6, 5 ; and r15, r16, r17 ; sb r25, r26 } + a290: [0-9a-f]* { rli r5, r6, 5 ; shl r15, r16, r17 ; sb r25, r26 } + a298: [0-9a-f]* { bitx r5, r6 ; s1a r15, r16, r17 ; sb r25, r26 } + a2a0: [0-9a-f]* { s1a r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 } + a2a8: [0-9a-f]* { s1a r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 } + a2b0: [0-9a-f]* { s1a r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + a2b8: [0-9a-f]* { s1a r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + a2c0: [0-9a-f]* { s2a r15, r16, r17 ; info 19 ; sb r25, r26 } + a2c8: [0-9a-f]* { pcnt r5, r6 ; s2a r15, r16, r17 ; sb r25, r26 } + a2d0: [0-9a-f]* { s2a r15, r16, r17 ; srai r5, r6, 5 ; sb r25, r26 } + a2d8: [0-9a-f]* { s2a r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 } + a2e0: [0-9a-f]* { s2a r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 } + a2e8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + a2f0: [0-9a-f]* { s3a r15, r16, r17 ; s3a r5, r6, r7 ; sb r25, r26 } + a2f8: [0-9a-f]* { tblidxb3 r5, r6 ; s3a r15, r16, r17 ; sb r25, r26 } + a300: [0-9a-f]* { s3a r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 } + a308: [0-9a-f]* { s3a r5, r6, r7 ; sb r25, r26 } + a310: [0-9a-f]* { mulll_uu r5, r6, r7 ; seq r15, r16, r17 ; sb r25, r26 } + a318: [0-9a-f]* { seq r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 } + a320: [0-9a-f]* { seq r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 } + a328: [0-9a-f]* { seq r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 } + a330: [0-9a-f]* { bitx r5, r6 ; seqi r15, r16, 5 ; sb r25, r26 } + a338: [0-9a-f]* { seqi r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 } + a340: [0-9a-f]* { seqi r15, r16, 5 ; slte_u r5, r6, r7 ; sb r25, r26 } + a348: [0-9a-f]* { seqi r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 } + a350: [0-9a-f]* { seqi r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + a358: [0-9a-f]* { shl r15, r16, r17 ; info 19 ; sb r25, r26 } + a360: [0-9a-f]* { pcnt r5, r6 ; shl r15, r16, r17 ; sb r25, r26 } + a368: [0-9a-f]* { shl r15, r16, r17 ; srai r5, r6, 5 ; sb r25, r26 } + a370: [0-9a-f]* { shl r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 } + a378: [0-9a-f]* { shl r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 } + a380: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + a388: [0-9a-f]* { shli r15, r16, 5 ; s3a r5, r6, r7 ; sb r25, r26 } + a390: [0-9a-f]* { tblidxb3 r5, r6 ; shli r15, r16, 5 ; sb r25, r26 } + a398: [0-9a-f]* { shli r5, r6, 5 ; s1a r15, r16, r17 ; sb r25, r26 } + a3a0: [0-9a-f]* { shli r5, r6, 5 ; sb r25, r26 } + a3a8: [0-9a-f]* { mulll_uu r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 } + a3b0: [0-9a-f]* { shr r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 } + a3b8: [0-9a-f]* { shr r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 } + a3c0: [0-9a-f]* { shr r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 } + a3c8: [0-9a-f]* { bitx r5, r6 ; shri r15, r16, 5 ; sb r25, r26 } + a3d0: [0-9a-f]* { shri r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 } + a3d8: [0-9a-f]* { shri r15, r16, 5 ; slte_u r5, r6, r7 ; sb r25, r26 } + a3e0: [0-9a-f]* { shri r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 } + a3e8: [0-9a-f]* { shri r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + a3f0: [0-9a-f]* { slt r15, r16, r17 ; info 19 ; sb r25, r26 } + a3f8: [0-9a-f]* { pcnt r5, r6 ; slt r15, r16, r17 ; sb r25, r26 } + a400: [0-9a-f]* { slt r15, r16, r17 ; srai r5, r6, 5 ; sb r25, r26 } + a408: [0-9a-f]* { slt r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 } + a410: [0-9a-f]* { slt r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 } + a418: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + a420: [0-9a-f]* { slt_u r15, r16, r17 ; s3a r5, r6, r7 ; sb r25, r26 } + a428: [0-9a-f]* { tblidxb3 r5, r6 ; slt_u r15, r16, r17 ; sb r25, r26 } + a430: [0-9a-f]* { slt_u r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 } + a438: [0-9a-f]* { slt_u r5, r6, r7 ; sb r25, r26 } + a440: [0-9a-f]* { mulll_uu r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 } + a448: [0-9a-f]* { slte r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 } + a450: [0-9a-f]* { slte r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 } + a458: [0-9a-f]* { slte r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 } + a460: [0-9a-f]* { bitx r5, r6 ; slte_u r15, r16, r17 ; sb r25, r26 } + a468: [0-9a-f]* { slte_u r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 } + a470: [0-9a-f]* { slte_u r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 } + a478: [0-9a-f]* { slte_u r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + a480: [0-9a-f]* { slte_u r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + a488: [0-9a-f]* { slti r15, r16, 5 ; info 19 ; sb r25, r26 } + a490: [0-9a-f]* { pcnt r5, r6 ; slti r15, r16, 5 ; sb r25, r26 } + a498: [0-9a-f]* { slti r15, r16, 5 ; srai r5, r6, 5 ; sb r25, r26 } + a4a0: [0-9a-f]* { slti r5, r6, 5 ; nor r15, r16, r17 ; sb r25, r26 } + a4a8: [0-9a-f]* { slti r5, r6, 5 ; sne r15, r16, r17 ; sb r25, r26 } + a4b0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 } + a4b8: [0-9a-f]* { slti_u r15, r16, 5 ; s3a r5, r6, r7 ; sb r25, r26 } + a4c0: [0-9a-f]* { tblidxb3 r5, r6 ; slti_u r15, r16, 5 ; sb r25, r26 } + a4c8: [0-9a-f]* { slti_u r5, r6, 5 ; s1a r15, r16, r17 ; sb r25, r26 } + a4d0: [0-9a-f]* { slti_u r5, r6, 5 ; sb r25, r26 } + a4d8: [0-9a-f]* { mulll_uu r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 } + a4e0: [0-9a-f]* { sne r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 } + a4e8: [0-9a-f]* { sne r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 } + a4f0: [0-9a-f]* { sne r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 } + a4f8: [0-9a-f]* { bitx r5, r6 ; sra r15, r16, r17 ; sb r25, r26 } + a500: [0-9a-f]* { sra r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 } + a508: [0-9a-f]* { sra r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 } + a510: [0-9a-f]* { sra r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + a518: [0-9a-f]* { sra r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + a520: [0-9a-f]* { srai r15, r16, 5 ; info 19 ; sb r25, r26 } + a528: [0-9a-f]* { pcnt r5, r6 ; srai r15, r16, 5 ; sb r25, r26 } + a530: [0-9a-f]* { srai r15, r16, 5 ; srai r5, r6, 5 ; sb r25, r26 } + a538: [0-9a-f]* { srai r5, r6, 5 ; nor r15, r16, r17 ; sb r25, r26 } + a540: [0-9a-f]* { srai r5, r6, 5 ; sne r15, r16, r17 ; sb r25, r26 } + a548: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 } + a550: [0-9a-f]* { sub r15, r16, r17 ; s3a r5, r6, r7 ; sb r25, r26 } + a558: [0-9a-f]* { tblidxb3 r5, r6 ; sub r15, r16, r17 ; sb r25, r26 } + a560: [0-9a-f]* { sub r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 } + a568: [0-9a-f]* { sub r5, r6, r7 ; sb r25, r26 } + a570: [0-9a-f]* { tblidxb0 r5, r6 ; s3a r15, r16, r17 ; sb r25, r26 } + a578: [0-9a-f]* { tblidxb1 r5, r6 ; addi r15, r16, 5 ; sb r25, r26 } + a580: [0-9a-f]* { tblidxb1 r5, r6 ; seqi r15, r16, 5 ; sb r25, r26 } + a588: [0-9a-f]* { tblidxb2 r5, r6 ; andi r15, r16, 5 ; sb r25, r26 } + a590: [0-9a-f]* { tblidxb2 r5, r6 ; shli r15, r16, 5 ; sb r25, r26 } + a598: [0-9a-f]* { tblidxb3 r5, r6 ; ill ; sb r25, r26 } + a5a0: [0-9a-f]* { tblidxb3 r5, r6 ; shri r15, r16, 5 ; sb r25, r26 } + a5a8: [0-9a-f]* { ctz r5, r6 ; xor r15, r16, r17 ; sb r25, r26 } + a5b0: [0-9a-f]* { xor r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 } + a5b8: [0-9a-f]* { xor r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 } + a5c0: [0-9a-f]* { xor r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + a5c8: [0-9a-f]* { xor r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 } + a5d0: [0-9a-f]* { adiffh r5, r6, r7 ; sbadd r15, r16, 5 } + a5d8: [0-9a-f]* { maxb_u r5, r6, r7 ; sbadd r15, r16, 5 } + a5e0: [0-9a-f]* { mulhha_su r5, r6, r7 ; sbadd r15, r16, 5 } + a5e8: [0-9a-f]* { mvz r5, r6, r7 ; sbadd r15, r16, 5 } + a5f0: [0-9a-f]* { sadah_u r5, r6, r7 ; sbadd r15, r16, 5 } + a5f8: [0-9a-f]* { shrib r5, r6, 5 ; sbadd r15, r16, 5 } + a600: [0-9a-f]* { sne r5, r6, r7 ; sbadd r15, r16, 5 } + a608: [0-9a-f]* { xori r5, r6, 5 ; sbadd r15, r16, 5 } + a610: [0-9a-f]* { seq r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 } + a618: [0-9a-f]* { seq r15, r16, r17 ; and r5, r6, r7 ; sw r25, r26 } + a620: [0-9a-f]* { bitx r5, r6 ; seq r15, r16, r17 ; prefetch r25 } + a628: [0-9a-f]* { clz r5, r6 ; seq r15, r16, r17 ; prefetch r25 } + a630: [0-9a-f]* { seq r15, r16, r17 ; lh r25, r26 } + a638: [0-9a-f]* { seq r15, r16, r17 ; inthh r5, r6, r7 } + a640: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 } + a648: [0-9a-f]* { seq r15, r16, r17 ; shl r5, r6, r7 ; lb r25, r26 } + a650: [0-9a-f]* { seq r15, r16, r17 ; add r5, r6, r7 ; lb_u r25, r26 } + a658: [0-9a-f]* { mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 } + a660: [0-9a-f]* { seq r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + a668: [0-9a-f]* { seq r15, r16, r17 ; andi r5, r6, 5 ; lh r25, r26 } + a670: [0-9a-f]* { mvz r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 } + a678: [0-9a-f]* { seq r15, r16, r17 ; slte r5, r6, r7 ; lh r25, r26 } + a680: [0-9a-f]* { clz r5, r6 ; seq r15, r16, r17 ; lh_u r25, r26 } + a688: [0-9a-f]* { seq r15, r16, r17 ; nor r5, r6, r7 ; lh_u r25, r26 } + a690: [0-9a-f]* { seq r15, r16, r17 ; slti_u r5, r6, 5 ; lh_u r25, r26 } + a698: [0-9a-f]* { seq r15, r16, r17 ; info 19 ; lw r25, r26 } + a6a0: [0-9a-f]* { pcnt r5, r6 ; seq r15, r16, r17 ; lw r25, r26 } + a6a8: [0-9a-f]* { seq r15, r16, r17 ; srai r5, r6, 5 ; lw r25, r26 } + a6b0: [0-9a-f]* { seq r15, r16, r17 ; mnz r5, r6, r7 ; lh_u r25, r26 } + a6b8: [0-9a-f]* { seq r15, r16, r17 ; movei r5, 5 ; lb_u r25, r26 } + a6c0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; seq r15, r16, r17 } + a6c8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + a6d0: [0-9a-f]* { mulhla_us r5, r6, r7 ; seq r15, r16, r17 } + a6d8: [0-9a-f]* { mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + a6e0: [0-9a-f]* { mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 } + a6e8: [0-9a-f]* { mvnz r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 } + a6f0: [0-9a-f]* { seq r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + a6f8: [0-9a-f]* { seq r15, r16, r17 ; nor r5, r6, r7 ; lh_u r25, r26 } + a700: [0-9a-f]* { seq r15, r16, r17 ; ori r5, r6, 5 ; lh_u r25, r26 } + a708: [0-9a-f]* { pcnt r5, r6 ; seq r15, r16, r17 } + a710: [0-9a-f]* { mulll_uu r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 } + a718: [0-9a-f]* { seq r15, r16, r17 ; shr r5, r6, r7 ; prefetch r25 } + a720: [0-9a-f]* { seq r15, r16, r17 ; rl r5, r6, r7 ; lh r25, r26 } + a728: [0-9a-f]* { seq r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + a730: [0-9a-f]* { seq r15, r16, r17 ; s3a r5, r6, r7 ; lh r25, r26 } + a738: [0-9a-f]* { clz r5, r6 ; seq r15, r16, r17 ; sb r25, r26 } + a740: [0-9a-f]* { seq r15, r16, r17 ; nor r5, r6, r7 ; sb r25, r26 } + a748: [0-9a-f]* { seq r15, r16, r17 ; slti_u r5, r6, 5 ; sb r25, r26 } + a750: [0-9a-f]* { seq r15, r16, r17 ; seq r5, r6, r7 } + a758: [0-9a-f]* { bytex r5, r6 ; seq r15, r16, r17 ; sh r25, r26 } + a760: [0-9a-f]* { seq r15, r16, r17 ; nop ; sh r25, r26 } + a768: [0-9a-f]* { seq r15, r16, r17 ; slti r5, r6, 5 ; sh r25, r26 } + a770: [0-9a-f]* { seq r15, r16, r17 ; shl r5, r6, r7 ; sw r25, r26 } + a778: [0-9a-f]* { seq r15, r16, r17 ; shr r5, r6, r7 ; lw r25, r26 } + a780: [0-9a-f]* { seq r15, r16, r17 ; slt r5, r6, r7 ; lb r25, r26 } + a788: [0-9a-f]* { seq r15, r16, r17 ; sltb r5, r6, r7 } + a790: [0-9a-f]* { seq r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 } + a798: [0-9a-f]* { seq r15, r16, r17 ; slti_u r5, r6, 5 ; lh r25, r26 } + a7a0: [0-9a-f]* { seq r15, r16, r17 ; sne r5, r6, r7 ; sw r25, r26 } + a7a8: [0-9a-f]* { seq r15, r16, r17 ; srai r5, r6, 5 ; lw r25, r26 } + a7b0: [0-9a-f]* { seq r15, r16, r17 ; subh r5, r6, r7 } + a7b8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + a7c0: [0-9a-f]* { seq r15, r16, r17 ; shl r5, r6, r7 ; sw r25, r26 } + a7c8: [0-9a-f]* { tblidxb0 r5, r6 ; seq r15, r16, r17 ; lb r25, r26 } + a7d0: [0-9a-f]* { tblidxb2 r5, r6 ; seq r15, r16, r17 ; lb r25, r26 } + a7d8: [0-9a-f]* { seq r15, r16, r17 ; xor r5, r6, r7 ; lb r25, r26 } + a7e0: [0-9a-f]* { seq r5, r6, r7 ; add r15, r16, r17 } + a7e8: [0-9a-f]* { seq r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + a7f0: [0-9a-f]* { seq r5, r6, r7 ; auli r15, r16, 4660 } + a7f8: [0-9a-f]* { seq r5, r6, r7 ; ill ; prefetch r25 } + a800: [0-9a-f]* { seq r5, r6, r7 ; inv r15 } + a808: [0-9a-f]* { seq r5, r6, r7 ; or r15, r16, r17 ; lb r25, r26 } + a810: [0-9a-f]* { seq r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 } + a818: [0-9a-f]* { seq r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 } + a820: [0-9a-f]* { seq r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 } + a828: [0-9a-f]* { seq r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + a830: [0-9a-f]* { seq r5, r6, r7 ; sra r15, r16, r17 ; lh r25, r26 } + a838: [0-9a-f]* { seq r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 } + a840: [0-9a-f]* { seq r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 } + a848: [0-9a-f]* { seq r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + a850: [0-9a-f]* { seq r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + a858: [0-9a-f]* { seq r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 } + a860: [0-9a-f]* { seq r5, r6, r7 ; move r15, r16 ; sw r25, r26 } + a868: [0-9a-f]* { seq r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + a870: [0-9a-f]* { seq r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + a878: [0-9a-f]* { seq r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 } + a880: [0-9a-f]* { seq r5, r6, r7 ; move r15, r16 ; prefetch r25 } + a888: [0-9a-f]* { seq r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 } + a890: [0-9a-f]* { seq r5, r6, r7 ; rl r15, r16, r17 } + a898: [0-9a-f]* { seq r5, r6, r7 ; s1a r15, r16, r17 } + a8a0: [0-9a-f]* { seq r5, r6, r7 ; s3a r15, r16, r17 } + a8a8: [0-9a-f]* { seq r5, r6, r7 ; s2a r15, r16, r17 ; sb r25, r26 } + a8b0: [0-9a-f]* { seq r5, r6, r7 ; sbadd r15, r16, 5 } + a8b8: [0-9a-f]* { seq r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 } + a8c0: [0-9a-f]* { seq r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 } + a8c8: [0-9a-f]* { seq r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 } + a8d0: [0-9a-f]* { seq r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + a8d8: [0-9a-f]* { seq r5, r6, r7 ; shrh r15, r16, r17 } + a8e0: [0-9a-f]* { seq r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + a8e8: [0-9a-f]* { seq r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 } + a8f0: [0-9a-f]* { seq r5, r6, r7 ; slth_u r15, r16, r17 } + a8f8: [0-9a-f]* { seq r5, r6, r7 ; slti_u r15, r16, 5 } + a900: [0-9a-f]* { seq r5, r6, r7 ; sra r15, r16, r17 ; lh_u r25, r26 } + a908: [0-9a-f]* { seq r5, r6, r7 ; sraih r15, r16, 5 } + a910: [0-9a-f]* { seq r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 } + a918: [0-9a-f]* { seq r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 } + a920: [0-9a-f]* { seq r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 } + a928: [0-9a-f]* { adiffb_u r5, r6, r7 ; seqb r15, r16, r17 } + a930: [0-9a-f]* { seqb r15, r16, r17 ; intlh r5, r6, r7 } + a938: [0-9a-f]* { mulhha_ss r5, r6, r7 ; seqb r15, r16, r17 } + a940: [0-9a-f]* { mvnz r5, r6, r7 ; seqb r15, r16, r17 } + a948: [0-9a-f]* { sadah r5, r6, r7 ; seqb r15, r16, r17 } + a950: [0-9a-f]* { seqb r15, r16, r17 ; shri r5, r6, 5 } + a958: [0-9a-f]* { seqb r15, r16, r17 ; sltih_u r5, r6, 5 } + a960: [0-9a-f]* { seqb r15, r16, r17 ; xor r5, r6, r7 } + a968: [0-9a-f]* { seqb r5, r6, r7 ; icoh r15 } + a970: [0-9a-f]* { seqb r5, r6, r7 ; lhadd r15, r16, 5 } + a978: [0-9a-f]* { seqb r5, r6, r7 ; mnzh r15, r16, r17 } + a980: [0-9a-f]* { seqb r5, r6, r7 ; rli r15, r16, 5 } + a988: [0-9a-f]* { seqb r5, r6, r7 ; shr r15, r16, r17 } + a990: [0-9a-f]* { seqb r5, r6, r7 ; sltib r15, r16, 5 } + a998: [0-9a-f]* { seqb r5, r6, r7 ; swadd r15, r16, 5 } + a9a0: [0-9a-f]* { seqh r15, r16, r17 ; auli r5, r6, 4660 } + a9a8: [0-9a-f]* { seqh r15, r16, r17 ; maxih r5, r6, 5 } + a9b0: [0-9a-f]* { mulhl_ss r5, r6, r7 ; seqh r15, r16, r17 } + a9b8: [0-9a-f]* { seqh r15, r16, r17 ; mzh r5, r6, r7 } + a9c0: [0-9a-f]* { sadh_u r5, r6, r7 ; seqh r15, r16, r17 } + a9c8: [0-9a-f]* { seqh r15, r16, r17 ; slt_u r5, r6, r7 } + a9d0: [0-9a-f]* { seqh r15, r16, r17 ; sra r5, r6, r7 } + a9d8: [0-9a-f]* { seqh r5, r6, r7 ; addbs_u r15, r16, r17 } + a9e0: [0-9a-f]* { seqh r5, r6, r7 ; inthb r15, r16, r17 } + a9e8: [0-9a-f]* { seqh r5, r6, r7 ; lw_na r15, r16 } + a9f0: [0-9a-f]* { seqh r5, r6, r7 ; moveli.sn r15, 4660 } + a9f8: [0-9a-f]* { seqh r5, r6, r7 ; sb r15, r16 } + aa00: [0-9a-f]* { seqh r5, r6, r7 ; shrib r15, r16, 5 } + aa08: [0-9a-f]* { seqh r5, r6, r7 ; sne r15, r16, r17 } + aa10: [0-9a-f]* { seqh r5, r6, r7 ; xori r15, r16, 5 } + aa18: [0-9a-f]* { seqi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 } + aa20: [0-9a-f]* { seqi r15, r16, 5 ; and r5, r6, r7 ; sw r25, r26 } + aa28: [0-9a-f]* { bitx r5, r6 ; seqi r15, r16, 5 ; prefetch r25 } + aa30: [0-9a-f]* { clz r5, r6 ; seqi r15, r16, 5 ; prefetch r25 } + aa38: [0-9a-f]* { seqi r15, r16, 5 ; lh r25, r26 } + aa40: [0-9a-f]* { seqi r15, r16, 5 ; inthh r5, r6, r7 } + aa48: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 } + aa50: [0-9a-f]* { seqi r15, r16, 5 ; shl r5, r6, r7 ; lb r25, r26 } + aa58: [0-9a-f]* { seqi r15, r16, 5 ; add r5, r6, r7 ; lb_u r25, r26 } + aa60: [0-9a-f]* { mullla_ss r5, r6, r7 ; seqi r15, r16, 5 ; lb_u r25, r26 } + aa68: [0-9a-f]* { seqi r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 } + aa70: [0-9a-f]* { seqi r15, r16, 5 ; andi r5, r6, 5 ; lh r25, r26 } + aa78: [0-9a-f]* { mvz r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 } + aa80: [0-9a-f]* { seqi r15, r16, 5 ; slte r5, r6, r7 ; lh r25, r26 } + aa88: [0-9a-f]* { clz r5, r6 ; seqi r15, r16, 5 ; lh_u r25, r26 } + aa90: [0-9a-f]* { seqi r15, r16, 5 ; nor r5, r6, r7 ; lh_u r25, r26 } + aa98: [0-9a-f]* { seqi r15, r16, 5 ; slti_u r5, r6, 5 ; lh_u r25, r26 } + aaa0: [0-9a-f]* { seqi r15, r16, 5 ; info 19 ; lw r25, r26 } + aaa8: [0-9a-f]* { pcnt r5, r6 ; seqi r15, r16, 5 ; lw r25, r26 } + aab0: [0-9a-f]* { seqi r15, r16, 5 ; srai r5, r6, 5 ; lw r25, r26 } + aab8: [0-9a-f]* { seqi r15, r16, 5 ; mnz r5, r6, r7 ; lh_u r25, r26 } + aac0: [0-9a-f]* { seqi r15, r16, 5 ; movei r5, 5 ; lb_u r25, r26 } + aac8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; seqi r15, r16, 5 } + aad0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + aad8: [0-9a-f]* { mulhla_us r5, r6, r7 ; seqi r15, r16, 5 } + aae0: [0-9a-f]* { mulll_ss r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + aae8: [0-9a-f]* { mullla_ss r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 } + aaf0: [0-9a-f]* { mvnz r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 } + aaf8: [0-9a-f]* { seqi r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 } + ab00: [0-9a-f]* { seqi r15, r16, 5 ; nor r5, r6, r7 ; lh_u r25, r26 } + ab08: [0-9a-f]* { seqi r15, r16, 5 ; ori r5, r6, 5 ; lh_u r25, r26 } + ab10: [0-9a-f]* { pcnt r5, r6 ; seqi r15, r16, 5 } + ab18: [0-9a-f]* { mulll_uu r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 } + ab20: [0-9a-f]* { seqi r15, r16, 5 ; shr r5, r6, r7 ; prefetch r25 } + ab28: [0-9a-f]* { seqi r15, r16, 5 ; rl r5, r6, r7 ; lh r25, r26 } + ab30: [0-9a-f]* { seqi r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 } + ab38: [0-9a-f]* { seqi r15, r16, 5 ; s3a r5, r6, r7 ; lh r25, r26 } + ab40: [0-9a-f]* { clz r5, r6 ; seqi r15, r16, 5 ; sb r25, r26 } + ab48: [0-9a-f]* { seqi r15, r16, 5 ; nor r5, r6, r7 ; sb r25, r26 } + ab50: [0-9a-f]* { seqi r15, r16, 5 ; slti_u r5, r6, 5 ; sb r25, r26 } + ab58: [0-9a-f]* { seqi r15, r16, 5 ; seq r5, r6, r7 } + ab60: [0-9a-f]* { bytex r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 } + ab68: [0-9a-f]* { seqi r15, r16, 5 ; nop ; sh r25, r26 } + ab70: [0-9a-f]* { seqi r15, r16, 5 ; slti r5, r6, 5 ; sh r25, r26 } + ab78: [0-9a-f]* { seqi r15, r16, 5 ; shl r5, r6, r7 ; sw r25, r26 } + ab80: [0-9a-f]* { seqi r15, r16, 5 ; shr r5, r6, r7 ; lw r25, r26 } + ab88: [0-9a-f]* { seqi r15, r16, 5 ; slt r5, r6, r7 ; lb r25, r26 } + ab90: [0-9a-f]* { seqi r15, r16, 5 ; sltb r5, r6, r7 } + ab98: [0-9a-f]* { seqi r15, r16, 5 ; slte_u r5, r6, r7 ; sw r25, r26 } + aba0: [0-9a-f]* { seqi r15, r16, 5 ; slti_u r5, r6, 5 ; lh r25, r26 } + aba8: [0-9a-f]* { seqi r15, r16, 5 ; sne r5, r6, r7 ; sw r25, r26 } + abb0: [0-9a-f]* { seqi r15, r16, 5 ; srai r5, r6, 5 ; lw r25, r26 } + abb8: [0-9a-f]* { seqi r15, r16, 5 ; subh r5, r6, r7 } + abc0: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + abc8: [0-9a-f]* { seqi r15, r16, 5 ; shl r5, r6, r7 ; sw r25, r26 } + abd0: [0-9a-f]* { tblidxb0 r5, r6 ; seqi r15, r16, 5 ; lb r25, r26 } + abd8: [0-9a-f]* { tblidxb2 r5, r6 ; seqi r15, r16, 5 ; lb r25, r26 } + abe0: [0-9a-f]* { seqi r15, r16, 5 ; xor r5, r6, r7 ; lb r25, r26 } + abe8: [0-9a-f]* { seqi r5, r6, 5 ; add r15, r16, r17 } + abf0: [0-9a-f]* { seqi r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 } + abf8: [0-9a-f]* { seqi r5, r6, 5 ; auli r15, r16, 4660 } + ac00: [0-9a-f]* { seqi r5, r6, 5 ; ill ; prefetch r25 } + ac08: [0-9a-f]* { seqi r5, r6, 5 ; inv r15 } + ac10: [0-9a-f]* { seqi r5, r6, 5 ; or r15, r16, r17 ; lb r25, r26 } + ac18: [0-9a-f]* { seqi r5, r6, 5 ; sra r15, r16, r17 ; lb r25, r26 } + ac20: [0-9a-f]* { seqi r5, r6, 5 ; ori r15, r16, 5 ; lb_u r25, r26 } + ac28: [0-9a-f]* { seqi r5, r6, 5 ; srai r15, r16, 5 ; lb_u r25, r26 } + ac30: [0-9a-f]* { seqi r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 } + ac38: [0-9a-f]* { seqi r5, r6, 5 ; sra r15, r16, r17 ; lh r25, r26 } + ac40: [0-9a-f]* { seqi r5, r6, 5 ; ori r15, r16, 5 ; lh_u r25, r26 } + ac48: [0-9a-f]* { seqi r5, r6, 5 ; srai r15, r16, 5 ; lh_u r25, r26 } + ac50: [0-9a-f]* { seqi r5, r6, 5 ; nor r15, r16, r17 ; lw r25, r26 } + ac58: [0-9a-f]* { seqi r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 } + ac60: [0-9a-f]* { seqi r5, r6, 5 ; mnz r15, r16, r17 ; lb r25, r26 } + ac68: [0-9a-f]* { seqi r5, r6, 5 ; move r15, r16 ; sw r25, r26 } + ac70: [0-9a-f]* { seqi r5, r6, 5 ; mz r15, r16, r17 ; prefetch r25 } + ac78: [0-9a-f]* { seqi r5, r6, 5 ; nor r15, r16, r17 ; lh_u r25, r26 } + ac80: [0-9a-f]* { seqi r5, r6, 5 ; ori r15, r16, 5 ; lh_u r25, r26 } + ac88: [0-9a-f]* { seqi r5, r6, 5 ; move r15, r16 ; prefetch r25 } + ac90: [0-9a-f]* { seqi r5, r6, 5 ; slte r15, r16, r17 ; prefetch r25 } + ac98: [0-9a-f]* { seqi r5, r6, 5 ; rl r15, r16, r17 } + aca0: [0-9a-f]* { seqi r5, r6, 5 ; s1a r15, r16, r17 } + aca8: [0-9a-f]* { seqi r5, r6, 5 ; s3a r15, r16, r17 } + acb0: [0-9a-f]* { seqi r5, r6, 5 ; s2a r15, r16, r17 ; sb r25, r26 } + acb8: [0-9a-f]* { seqi r5, r6, 5 ; sbadd r15, r16, 5 } + acc0: [0-9a-f]* { seqi r5, r6, 5 ; seqi r15, r16, 5 ; sh r25, r26 } + acc8: [0-9a-f]* { seqi r5, r6, 5 ; ori r15, r16, 5 ; sh r25, r26 } + acd0: [0-9a-f]* { seqi r5, r6, 5 ; srai r15, r16, 5 ; sh r25, r26 } + acd8: [0-9a-f]* { seqi r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 } + ace0: [0-9a-f]* { seqi r5, r6, 5 ; shrh r15, r16, r17 } + ace8: [0-9a-f]* { seqi r5, r6, 5 ; slt r15, r16, r17 ; sh r25, r26 } + acf0: [0-9a-f]* { seqi r5, r6, 5 ; slte r15, r16, r17 ; prefetch r25 } + acf8: [0-9a-f]* { seqi r5, r6, 5 ; slth_u r15, r16, r17 } + ad00: [0-9a-f]* { seqi r5, r6, 5 ; slti_u r15, r16, 5 } + ad08: [0-9a-f]* { seqi r5, r6, 5 ; sra r15, r16, r17 ; lh_u r25, r26 } + ad10: [0-9a-f]* { seqi r5, r6, 5 ; sraih r15, r16, 5 } + ad18: [0-9a-f]* { seqi r5, r6, 5 ; andi r15, r16, 5 ; sw r25, r26 } + ad20: [0-9a-f]* { seqi r5, r6, 5 ; shli r15, r16, 5 ; sw r25, r26 } + ad28: [0-9a-f]* { seqi r5, r6, 5 ; xor r15, r16, r17 ; lh r25, r26 } + ad30: [0-9a-f]* { adiffb_u r5, r6, r7 ; seqib r15, r16, 5 } + ad38: [0-9a-f]* { seqib r15, r16, 5 ; intlh r5, r6, r7 } + ad40: [0-9a-f]* { mulhha_ss r5, r6, r7 ; seqib r15, r16, 5 } + ad48: [0-9a-f]* { mvnz r5, r6, r7 ; seqib r15, r16, 5 } + ad50: [0-9a-f]* { sadah r5, r6, r7 ; seqib r15, r16, 5 } + ad58: [0-9a-f]* { seqib r15, r16, 5 ; shri r5, r6, 5 } + ad60: [0-9a-f]* { seqib r15, r16, 5 ; sltih_u r5, r6, 5 } + ad68: [0-9a-f]* { seqib r15, r16, 5 ; xor r5, r6, r7 } + ad70: [0-9a-f]* { seqib r5, r6, 5 ; icoh r15 } + ad78: [0-9a-f]* { seqib r5, r6, 5 ; lhadd r15, r16, 5 } + ad80: [0-9a-f]* { seqib r5, r6, 5 ; mnzh r15, r16, r17 } + ad88: [0-9a-f]* { seqib r5, r6, 5 ; rli r15, r16, 5 } + ad90: [0-9a-f]* { seqib r5, r6, 5 ; shr r15, r16, r17 } + ad98: [0-9a-f]* { seqib r5, r6, 5 ; sltib r15, r16, 5 } + ada0: [0-9a-f]* { seqib r5, r6, 5 ; swadd r15, r16, 5 } + ada8: [0-9a-f]* { seqih r15, r16, 5 ; auli r5, r6, 4660 } + adb0: [0-9a-f]* { seqih r15, r16, 5 ; maxih r5, r6, 5 } + adb8: [0-9a-f]* { mulhl_ss r5, r6, r7 ; seqih r15, r16, 5 } + adc0: [0-9a-f]* { seqih r15, r16, 5 ; mzh r5, r6, r7 } + adc8: [0-9a-f]* { sadh_u r5, r6, r7 ; seqih r15, r16, 5 } + add0: [0-9a-f]* { seqih r15, r16, 5 ; slt_u r5, r6, r7 } + add8: [0-9a-f]* { seqih r15, r16, 5 ; sra r5, r6, r7 } + ade0: [0-9a-f]* { seqih r5, r6, 5 ; addbs_u r15, r16, r17 } + ade8: [0-9a-f]* { seqih r5, r6, 5 ; inthb r15, r16, r17 } + adf0: [0-9a-f]* { seqih r5, r6, 5 ; lw_na r15, r16 } + adf8: [0-9a-f]* { seqih r5, r6, 5 ; moveli.sn r15, 4660 } + ae00: [0-9a-f]* { seqih r5, r6, 5 ; sb r15, r16 } + ae08: [0-9a-f]* { seqih r5, r6, 5 ; shrib r15, r16, 5 } + ae10: [0-9a-f]* { seqih r5, r6, 5 ; sne r15, r16, r17 } + ae18: [0-9a-f]* { seqih r5, r6, 5 ; xori r15, r16, 5 } + ae20: [0-9a-f]* { bytex r5, r6 ; sh r15, r16 } + ae28: [0-9a-f]* { minih r5, r6, 5 ; sh r15, r16 } + ae30: [0-9a-f]* { mulhla_ss r5, r6, r7 ; sh r15, r16 } + ae38: [0-9a-f]* { ori r5, r6, 5 ; sh r15, r16 } + ae40: [0-9a-f]* { seqi r5, r6, 5 ; sh r15, r16 } + ae48: [0-9a-f]* { slte_u r5, r6, r7 ; sh r15, r16 } + ae50: [0-9a-f]* { sraib r5, r6, 5 ; sh r15, r16 } + ae58: [0-9a-f]* { clz r5, r6 ; add r15, r16, r17 ; sh r25, r26 } + ae60: [0-9a-f]* { add r15, r16, r17 ; nor r5, r6, r7 ; sh r25, r26 } + ae68: [0-9a-f]* { add r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 } + ae70: [0-9a-f]* { add r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + ae78: [0-9a-f]* { add r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 } + ae80: [0-9a-f]* { addi r15, r16, 5 ; move r5, r6 ; sh r25, r26 } + ae88: [0-9a-f]* { addi r15, r16, 5 ; rli r5, r6, 5 ; sh r25, r26 } + ae90: [0-9a-f]* { tblidxb0 r5, r6 ; addi r15, r16, 5 ; sh r25, r26 } + ae98: [0-9a-f]* { addi r5, r6, 5 ; ori r15, r16, 5 ; sh r25, r26 } + aea0: [0-9a-f]* { addi r5, r6, 5 ; srai r15, r16, 5 ; sh r25, r26 } + aea8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; and r15, r16, r17 ; sh r25, r26 } + aeb0: [0-9a-f]* { and r15, r16, r17 ; seqi r5, r6, 5 ; sh r25, r26 } + aeb8: [0-9a-f]* { and r15, r16, r17 ; sh r25, r26 } + aec0: [0-9a-f]* { and r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 } + aec8: [0-9a-f]* { andi r15, r16, 5 ; addi r5, r6, 5 ; sh r25, r26 } + aed0: [0-9a-f]* { mullla_uu r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + aed8: [0-9a-f]* { andi r15, r16, 5 ; slt r5, r6, r7 ; sh r25, r26 } + aee0: [0-9a-f]* { andi r5, r6, 5 ; sh r25, r26 } + aee8: [0-9a-f]* { andi r5, r6, 5 ; shr r15, r16, r17 ; sh r25, r26 } + aef0: [0-9a-f]* { bitx r5, r6 ; info 19 ; sh r25, r26 } + aef8: [0-9a-f]* { bitx r5, r6 ; slt r15, r16, r17 ; sh r25, r26 } + af00: [0-9a-f]* { bytex r5, r6 ; move r15, r16 ; sh r25, r26 } + af08: [0-9a-f]* { bytex r5, r6 ; slte r15, r16, r17 ; sh r25, r26 } + af10: [0-9a-f]* { clz r5, r6 ; mz r15, r16, r17 ; sh r25, r26 } + af18: [0-9a-f]* { clz r5, r6 ; slti r15, r16, 5 ; sh r25, r26 } + af20: [0-9a-f]* { ctz r5, r6 ; nor r15, r16, r17 ; sh r25, r26 } + af28: [0-9a-f]* { ctz r5, r6 ; sne r15, r16, r17 ; sh r25, r26 } + af30: [0-9a-f]* { info 19 ; sh r25, r26 } + af38: [0-9a-f]* { nop ; sh r25, r26 } + af40: [0-9a-f]* { seqi r15, r16, 5 ; sh r25, r26 } + af48: [0-9a-f]* { slti_u r15, r16, 5 ; sh r25, r26 } + af50: [0-9a-f]* { andi r5, r6, 5 ; ill ; sh r25, r26 } + af58: [0-9a-f]* { mvz r5, r6, r7 ; ill ; sh r25, r26 } + af60: [0-9a-f]* { slte r5, r6, r7 ; ill ; sh r25, r26 } + af68: [0-9a-f]* { info 19 ; andi r15, r16, 5 ; sh r25, r26 } + af70: [0-9a-f]* { mulll_ss r5, r6, r7 ; info 19 ; sh r25, r26 } + af78: [0-9a-f]* { info 19 ; s1a r15, r16, r17 ; sh r25, r26 } + af80: [0-9a-f]* { info 19 ; slt_u r15, r16, r17 ; sh r25, r26 } + af88: [0-9a-f]* { tblidxb2 r5, r6 ; info 19 ; sh r25, r26 } + af90: [0-9a-f]* { mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; sh r25, r26 } + af98: [0-9a-f]* { mnz r15, r16, r17 ; seq r5, r6, r7 ; sh r25, r26 } + afa0: [0-9a-f]* { mnz r15, r16, r17 ; xor r5, r6, r7 ; sh r25, r26 } + afa8: [0-9a-f]* { mnz r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 } + afb0: [0-9a-f]* { move r15, r16 ; add r5, r6, r7 ; sh r25, r26 } + afb8: [0-9a-f]* { mullla_ss r5, r6, r7 ; move r15, r16 ; sh r25, r26 } + afc0: [0-9a-f]* { move r15, r16 ; shri r5, r6, 5 ; sh r25, r26 } + afc8: [0-9a-f]* { move r5, r6 ; andi r15, r16, 5 ; sh r25, r26 } + afd0: [0-9a-f]* { move r5, r6 ; shli r15, r16, 5 ; sh r25, r26 } + afd8: [0-9a-f]* { bytex r5, r6 ; movei r15, 5 ; sh r25, r26 } + afe0: [0-9a-f]* { movei r15, 5 ; nop ; sh r25, r26 } + afe8: [0-9a-f]* { movei r15, 5 ; slti r5, r6, 5 ; sh r25, r26 } + aff0: [0-9a-f]* { movei r5, 5 ; move r15, r16 ; sh r25, r26 } + aff8: [0-9a-f]* { movei r5, 5 ; slte r15, r16, r17 ; sh r25, r26 } + b000: [0-9a-f]* { mulhh_ss r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 } + b008: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 } + b010: [0-9a-f]* { mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; sh r25, r26 } + b018: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 } + b020: [0-9a-f]* { mulhha_ss r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 } + b028: [0-9a-f]* { mulhha_ss r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 } + b030: [0-9a-f]* { mulhha_uu r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 } + b038: [0-9a-f]* { mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + b040: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 } + b048: [0-9a-f]* { mulll_ss r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 } + b050: [0-9a-f]* { mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 } + b058: [0-9a-f]* { mulll_uu r5, r6, r7 ; and r15, r16, r17 ; sh r25, r26 } + b060: [0-9a-f]* { mulll_uu r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 } + b068: [0-9a-f]* { mullla_ss r5, r6, r7 ; sh r25, r26 } + b070: [0-9a-f]* { mullla_ss r5, r6, r7 ; shr r15, r16, r17 ; sh r25, r26 } + b078: [0-9a-f]* { mullla_uu r5, r6, r7 ; info 19 ; sh r25, r26 } + b080: [0-9a-f]* { mullla_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + b088: [0-9a-f]* { mvnz r5, r6, r7 ; move r15, r16 ; sh r25, r26 } + b090: [0-9a-f]* { mvnz r5, r6, r7 ; slte r15, r16, r17 ; sh r25, r26 } + b098: [0-9a-f]* { mvz r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 } + b0a0: [0-9a-f]* { mvz r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 } + b0a8: [0-9a-f]* { mz r15, r16, r17 ; movei r5, 5 ; sh r25, r26 } + b0b0: [0-9a-f]* { mz r15, r16, r17 ; s1a r5, r6, r7 ; sh r25, r26 } + b0b8: [0-9a-f]* { tblidxb1 r5, r6 ; mz r15, r16, r17 ; sh r25, r26 } + b0c0: [0-9a-f]* { mz r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 } + b0c8: [0-9a-f]* { mz r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 } + b0d0: [0-9a-f]* { nop ; move r15, r16 ; sh r25, r26 } + b0d8: [0-9a-f]* { nop ; or r15, r16, r17 ; sh r25, r26 } + b0e0: [0-9a-f]* { nop ; shl r5, r6, r7 ; sh r25, r26 } + b0e8: [0-9a-f]* { nop ; sne r5, r6, r7 ; sh r25, r26 } + b0f0: [0-9a-f]* { clz r5, r6 ; nor r15, r16, r17 ; sh r25, r26 } + b0f8: [0-9a-f]* { nor r15, r16, r17 ; nor r5, r6, r7 ; sh r25, r26 } + b100: [0-9a-f]* { nor r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 } + b108: [0-9a-f]* { nor r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + b110: [0-9a-f]* { nor r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 } + b118: [0-9a-f]* { or r15, r16, r17 ; move r5, r6 ; sh r25, r26 } + b120: [0-9a-f]* { or r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 } + b128: [0-9a-f]* { tblidxb0 r5, r6 ; or r15, r16, r17 ; sh r25, r26 } + b130: [0-9a-f]* { or r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 } + b138: [0-9a-f]* { or r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 } + b140: [0-9a-f]* { mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 } + b148: [0-9a-f]* { ori r15, r16, 5 ; seqi r5, r6, 5 ; sh r25, r26 } + b150: [0-9a-f]* { ori r15, r16, 5 ; sh r25, r26 } + b158: [0-9a-f]* { ori r5, r6, 5 ; s3a r15, r16, r17 ; sh r25, r26 } + b160: [0-9a-f]* { pcnt r5, r6 ; addi r15, r16, 5 ; sh r25, r26 } + b168: [0-9a-f]* { pcnt r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 } + b170: [0-9a-f]* { rl r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + b178: [0-9a-f]* { mvz r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 } + b180: [0-9a-f]* { rl r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + b188: [0-9a-f]* { rl r5, r6, r7 ; info 19 ; sh r25, r26 } + b190: [0-9a-f]* { rl r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + b198: [0-9a-f]* { rli r15, r16, 5 ; sh r25, r26 } + b1a0: [0-9a-f]* { rli r15, r16, 5 ; ori r5, r6, 5 ; sh r25, r26 } + b1a8: [0-9a-f]* { rli r15, r16, 5 ; sra r5, r6, r7 ; sh r25, r26 } + b1b0: [0-9a-f]* { rli r5, r6, 5 ; nop ; sh r25, r26 } + b1b8: [0-9a-f]* { rli r5, r6, 5 ; slti_u r15, r16, 5 ; sh r25, r26 } + b1c0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 } + b1c8: [0-9a-f]* { s1a r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 } + b1d0: [0-9a-f]* { tblidxb2 r5, r6 ; s1a r15, r16, r17 ; sh r25, r26 } + b1d8: [0-9a-f]* { s1a r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 } + b1e0: [0-9a-f]* { s1a r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + b1e8: [0-9a-f]* { mulll_ss r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 } + b1f0: [0-9a-f]* { s2a r15, r16, r17 ; shli r5, r6, 5 ; sh r25, r26 } + b1f8: [0-9a-f]* { s2a r5, r6, r7 ; addi r15, r16, 5 ; sh r25, r26 } + b200: [0-9a-f]* { s2a r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 } + b208: [0-9a-f]* { s3a r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + b210: [0-9a-f]* { mvz r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 } + b218: [0-9a-f]* { s3a r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + b220: [0-9a-f]* { s3a r5, r6, r7 ; info 19 ; sh r25, r26 } + b228: [0-9a-f]* { s3a r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + b230: [0-9a-f]* { seq r15, r16, r17 ; sh r25, r26 } + b238: [0-9a-f]* { seq r15, r16, r17 ; ori r5, r6, 5 ; sh r25, r26 } + b240: [0-9a-f]* { seq r15, r16, r17 ; sra r5, r6, r7 ; sh r25, r26 } + b248: [0-9a-f]* { seq r5, r6, r7 ; nop ; sh r25, r26 } + b250: [0-9a-f]* { seq r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 } + b258: [0-9a-f]* { mulhh_ss r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 } + b260: [0-9a-f]* { seqi r15, r16, 5 ; s2a r5, r6, r7 ; sh r25, r26 } + b268: [0-9a-f]* { tblidxb2 r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 } + b270: [0-9a-f]* { seqi r5, r6, 5 ; rli r15, r16, 5 ; sh r25, r26 } + b278: [0-9a-f]* { seqi r5, r6, 5 ; xor r15, r16, r17 ; sh r25, r26 } + b280: [0-9a-f]* { mulll_ss r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 } + b288: [0-9a-f]* { shl r15, r16, r17 ; shli r5, r6, 5 ; sh r25, r26 } + b290: [0-9a-f]* { shl r5, r6, r7 ; addi r15, r16, 5 ; sh r25, r26 } + b298: [0-9a-f]* { shl r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 } + b2a0: [0-9a-f]* { shli r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 } + b2a8: [0-9a-f]* { mvz r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + b2b0: [0-9a-f]* { shli r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 } + b2b8: [0-9a-f]* { shli r5, r6, 5 ; info 19 ; sh r25, r26 } + b2c0: [0-9a-f]* { shli r5, r6, 5 ; slt r15, r16, r17 ; sh r25, r26 } + b2c8: [0-9a-f]* { shr r15, r16, r17 ; sh r25, r26 } + b2d0: [0-9a-f]* { shr r15, r16, r17 ; ori r5, r6, 5 ; sh r25, r26 } + b2d8: [0-9a-f]* { shr r15, r16, r17 ; sra r5, r6, r7 ; sh r25, r26 } + b2e0: [0-9a-f]* { shr r5, r6, r7 ; nop ; sh r25, r26 } + b2e8: [0-9a-f]* { shr r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 } + b2f0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 } + b2f8: [0-9a-f]* { shri r15, r16, 5 ; s2a r5, r6, r7 ; sh r25, r26 } + b300: [0-9a-f]* { tblidxb2 r5, r6 ; shri r15, r16, 5 ; sh r25, r26 } + b308: [0-9a-f]* { shri r5, r6, 5 ; rli r15, r16, 5 ; sh r25, r26 } + b310: [0-9a-f]* { shri r5, r6, 5 ; xor r15, r16, r17 ; sh r25, r26 } + b318: [0-9a-f]* { mulll_ss r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + b320: [0-9a-f]* { slt r15, r16, r17 ; shli r5, r6, 5 ; sh r25, r26 } + b328: [0-9a-f]* { slt r5, r6, r7 ; addi r15, r16, 5 ; sh r25, r26 } + b330: [0-9a-f]* { slt r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 } + b338: [0-9a-f]* { slt_u r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + b340: [0-9a-f]* { mvz r5, r6, r7 ; slt_u r15, r16, r17 ; sh r25, r26 } + b348: [0-9a-f]* { slt_u r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + b350: [0-9a-f]* { slt_u r5, r6, r7 ; info 19 ; sh r25, r26 } + b358: [0-9a-f]* { slt_u r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + b360: [0-9a-f]* { slte r15, r16, r17 ; sh r25, r26 } + b368: [0-9a-f]* { slte r15, r16, r17 ; ori r5, r6, 5 ; sh r25, r26 } + b370: [0-9a-f]* { slte r15, r16, r17 ; sra r5, r6, r7 ; sh r25, r26 } + b378: [0-9a-f]* { slte r5, r6, r7 ; nop ; sh r25, r26 } + b380: [0-9a-f]* { slte r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 } + b388: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 } + b390: [0-9a-f]* { slte_u r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 } + b398: [0-9a-f]* { tblidxb2 r5, r6 ; slte_u r15, r16, r17 ; sh r25, r26 } + b3a0: [0-9a-f]* { slte_u r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 } + b3a8: [0-9a-f]* { slte_u r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + b3b0: [0-9a-f]* { mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 } + b3b8: [0-9a-f]* { slti r15, r16, 5 ; shli r5, r6, 5 ; sh r25, r26 } + b3c0: [0-9a-f]* { slti r5, r6, 5 ; addi r15, r16, 5 ; sh r25, r26 } + b3c8: [0-9a-f]* { slti r5, r6, 5 ; seqi r15, r16, 5 ; sh r25, r26 } + b3d0: [0-9a-f]* { slti_u r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 } + b3d8: [0-9a-f]* { mvz r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 } + b3e0: [0-9a-f]* { slti_u r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 } + b3e8: [0-9a-f]* { slti_u r5, r6, 5 ; info 19 ; sh r25, r26 } + b3f0: [0-9a-f]* { slti_u r5, r6, 5 ; slt r15, r16, r17 ; sh r25, r26 } + b3f8: [0-9a-f]* { sne r15, r16, r17 ; sh r25, r26 } + b400: [0-9a-f]* { sne r15, r16, r17 ; ori r5, r6, 5 ; sh r25, r26 } + b408: [0-9a-f]* { sne r15, r16, r17 ; sra r5, r6, r7 ; sh r25, r26 } + b410: [0-9a-f]* { sne r5, r6, r7 ; nop ; sh r25, r26 } + b418: [0-9a-f]* { sne r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 } + b420: [0-9a-f]* { mulhh_ss r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 } + b428: [0-9a-f]* { sra r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 } + b430: [0-9a-f]* { tblidxb2 r5, r6 ; sra r15, r16, r17 ; sh r25, r26 } + b438: [0-9a-f]* { sra r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 } + b440: [0-9a-f]* { sra r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + b448: [0-9a-f]* { mulll_ss r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 } + b450: [0-9a-f]* { srai r15, r16, 5 ; shli r5, r6, 5 ; sh r25, r26 } + b458: [0-9a-f]* { srai r5, r6, 5 ; addi r15, r16, 5 ; sh r25, r26 } + b460: [0-9a-f]* { srai r5, r6, 5 ; seqi r15, r16, 5 ; sh r25, r26 } + b468: [0-9a-f]* { sub r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + b470: [0-9a-f]* { mvz r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 } + b478: [0-9a-f]* { sub r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + b480: [0-9a-f]* { sub r5, r6, r7 ; info 19 ; sh r25, r26 } + b488: [0-9a-f]* { sub r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + b490: [0-9a-f]* { tblidxb0 r5, r6 ; move r15, r16 ; sh r25, r26 } + b498: [0-9a-f]* { tblidxb0 r5, r6 ; slte r15, r16, r17 ; sh r25, r26 } + b4a0: [0-9a-f]* { tblidxb1 r5, r6 ; mz r15, r16, r17 ; sh r25, r26 } + b4a8: [0-9a-f]* { tblidxb1 r5, r6 ; slti r15, r16, 5 ; sh r25, r26 } + b4b0: [0-9a-f]* { tblidxb2 r5, r6 ; nor r15, r16, r17 ; sh r25, r26 } + b4b8: [0-9a-f]* { tblidxb2 r5, r6 ; sne r15, r16, r17 ; sh r25, r26 } + b4c0: [0-9a-f]* { tblidxb3 r5, r6 ; ori r15, r16, 5 ; sh r25, r26 } + b4c8: [0-9a-f]* { tblidxb3 r5, r6 ; srai r15, r16, 5 ; sh r25, r26 } + b4d0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + b4d8: [0-9a-f]* { xor r15, r16, r17 ; seqi r5, r6, 5 ; sh r25, r26 } + b4e0: [0-9a-f]* { xor r15, r16, r17 ; sh r25, r26 } + b4e8: [0-9a-f]* { xor r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 } + b4f0: [0-9a-f]* { addb r5, r6, r7 ; shadd r15, r16, 5 } + b4f8: [0-9a-f]* { crc32_32 r5, r6, r7 ; shadd r15, r16, 5 } + b500: [0-9a-f]* { mnz r5, r6, r7 ; shadd r15, r16, 5 } + b508: [0-9a-f]* { mulhla_us r5, r6, r7 ; shadd r15, r16, 5 } + b510: [0-9a-f]* { packhb r5, r6, r7 ; shadd r15, r16, 5 } + b518: [0-9a-f]* { seqih r5, r6, 5 ; shadd r15, r16, 5 } + b520: [0-9a-f]* { slteb_u r5, r6, r7 ; shadd r15, r16, 5 } + b528: [0-9a-f]* { sub r5, r6, r7 ; shadd r15, r16, 5 } + b530: [0-9a-f]* { shl r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + b538: [0-9a-f]* { shl r15, r16, r17 ; adds r5, r6, r7 } + b540: [0-9a-f]* { shl r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + b548: [0-9a-f]* { bytex r5, r6 ; shl r15, r16, r17 ; lw r25, r26 } + b550: [0-9a-f]* { ctz r5, r6 ; shl r15, r16, r17 ; lh r25, r26 } + b558: [0-9a-f]* { shl r15, r16, r17 ; info 19 ; lb_u r25, r26 } + b560: [0-9a-f]* { clz r5, r6 ; shl r15, r16, r17 ; lb r25, r26 } + b568: [0-9a-f]* { shl r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 } + b570: [0-9a-f]* { shl r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 } + b578: [0-9a-f]* { shl r15, r16, r17 ; info 19 ; lb_u r25, r26 } + b580: [0-9a-f]* { pcnt r5, r6 ; shl r15, r16, r17 ; lb_u r25, r26 } + b588: [0-9a-f]* { shl r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + b590: [0-9a-f]* { shl r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + b598: [0-9a-f]* { shl r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + b5a0: [0-9a-f]* { tblidxb1 r5, r6 ; shl r15, r16, r17 ; lh r25, r26 } + b5a8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 } + b5b0: [0-9a-f]* { shl r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 } + b5b8: [0-9a-f]* { shl r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 } + b5c0: [0-9a-f]* { mulll_ss r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + b5c8: [0-9a-f]* { shl r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 } + b5d0: [0-9a-f]* { shl r15, r16, r17 ; maxh r5, r6, r7 } + b5d8: [0-9a-f]* { shl r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + b5e0: [0-9a-f]* { shl r15, r16, r17 ; moveli r5, 4660 } + b5e8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 } + b5f0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 } + b5f8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 } + b600: [0-9a-f]* { mulll_uu r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 } + b608: [0-9a-f]* { mullla_uu r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } + b610: [0-9a-f]* { mvz r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + b618: [0-9a-f]* { shl r15, r16, r17 ; nop ; lh r25, r26 } + b620: [0-9a-f]* { shl r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + b628: [0-9a-f]* { shl r15, r16, r17 ; packhs r5, r6, r7 } + b630: [0-9a-f]* { shl r15, r16, r17 ; prefetch r25 } + b638: [0-9a-f]* { shl r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 } + b640: [0-9a-f]* { shl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + b648: [0-9a-f]* { shl r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + b650: [0-9a-f]* { shl r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + b658: [0-9a-f]* { sadah r5, r6, r7 ; shl r15, r16, r17 } + b660: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 } + b668: [0-9a-f]* { shl r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 } + b670: [0-9a-f]* { shl r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 } + b678: [0-9a-f]* { shl r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + b680: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 } + b688: [0-9a-f]* { shl r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 } + b690: [0-9a-f]* { tblidxb3 r5, r6 ; shl r15, r16, r17 ; sh r25, r26 } + b698: [0-9a-f]* { shl r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + b6a0: [0-9a-f]* { shl r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + b6a8: [0-9a-f]* { shl r15, r16, r17 ; slt r5, r6, r7 } + b6b0: [0-9a-f]* { shl r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + b6b8: [0-9a-f]* { shl r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + b6c0: [0-9a-f]* { shl r15, r16, r17 ; sltib_u r5, r6, 5 } + b6c8: [0-9a-f]* { shl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + b6d0: [0-9a-f]* { shl r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + b6d8: [0-9a-f]* { clz r5, r6 ; shl r15, r16, r17 ; sw r25, r26 } + b6e0: [0-9a-f]* { shl r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 } + b6e8: [0-9a-f]* { shl r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 } + b6f0: [0-9a-f]* { tblidxb0 r5, r6 ; shl r15, r16, r17 } + b6f8: [0-9a-f]* { tblidxb2 r5, r6 ; shl r15, r16, r17 } + b700: [0-9a-f]* { shl r15, r16, r17 ; xor r5, r6, r7 } + b708: [0-9a-f]* { shl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + b710: [0-9a-f]* { shl r5, r6, r7 ; and r15, r16, r17 } + b718: [0-9a-f]* { shl r5, r6, r7 ; prefetch r25 } + b720: [0-9a-f]* { shl r5, r6, r7 ; info 19 ; lw r25, r26 } + b728: [0-9a-f]* { shl r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + b730: [0-9a-f]* { shl r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + b738: [0-9a-f]* { shl r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 } + b740: [0-9a-f]* { shl r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 } + b748: [0-9a-f]* { shl r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + b750: [0-9a-f]* { shl r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 } + b758: [0-9a-f]* { shl r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + b760: [0-9a-f]* { shl r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + b768: [0-9a-f]* { shl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + b770: [0-9a-f]* { shl r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + b778: [0-9a-f]* { shl r5, r6, r7 ; maxb_u r15, r16, r17 } + b780: [0-9a-f]* { shl r5, r6, r7 ; mnz r15, r16, r17 } + b788: [0-9a-f]* { shl r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + b790: [0-9a-f]* { shl r5, r6, r7 ; nop ; lh r25, r26 } + b798: [0-9a-f]* { shl r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + b7a0: [0-9a-f]* { shl r5, r6, r7 ; packhs r15, r16, r17 } + b7a8: [0-9a-f]* { shl r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 } + b7b0: [0-9a-f]* { shl r5, r6, r7 ; prefetch r25 } + b7b8: [0-9a-f]* { shl r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + b7c0: [0-9a-f]* { shl r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + b7c8: [0-9a-f]* { shl r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + b7d0: [0-9a-f]* { shl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + b7d8: [0-9a-f]* { shl r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + b7e0: [0-9a-f]* { shl r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + b7e8: [0-9a-f]* { shl r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + b7f0: [0-9a-f]* { shl r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + b7f8: [0-9a-f]* { shl r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + b800: [0-9a-f]* { shl r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + b808: [0-9a-f]* { shl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + b810: [0-9a-f]* { shl r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + b818: [0-9a-f]* { shl r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + b820: [0-9a-f]* { shl r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + b828: [0-9a-f]* { shl r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + b830: [0-9a-f]* { shl r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + b838: [0-9a-f]* { shl r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + b840: [0-9a-f]* { shl r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + b848: [0-9a-f]* { shlb r15, r16, r17 ; add r5, r6, r7 } + b850: [0-9a-f]* { clz r5, r6 ; shlb r15, r16, r17 } + b858: [0-9a-f]* { shlb r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + b860: [0-9a-f]* { mulhla_su r5, r6, r7 ; shlb r15, r16, r17 } + b868: [0-9a-f]* { shlb r15, r16, r17 ; packbs_u r5, r6, r7 } + b870: [0-9a-f]* { shlb r15, r16, r17 ; seqib r5, r6, 5 } + b878: [0-9a-f]* { shlb r15, r16, r17 ; slteb r5, r6, r7 } + b880: [0-9a-f]* { shlb r15, r16, r17 ; sraih r5, r6, 5 } + b888: [0-9a-f]* { shlb r5, r6, r7 ; addih r15, r16, 5 } + b890: [0-9a-f]* { shlb r5, r6, r7 ; iret } + b898: [0-9a-f]* { shlb r5, r6, r7 ; maxib_u r15, r16, 5 } + b8a0: [0-9a-f]* { shlb r5, r6, r7 ; nop } + b8a8: [0-9a-f]* { shlb r5, r6, r7 ; seqi r15, r16, 5 } + b8b0: [0-9a-f]* { shlb r5, r6, r7 ; sltb_u r15, r16, r17 } + b8b8: [0-9a-f]* { shlb r5, r6, r7 ; srah r15, r16, r17 } + b8c0: [0-9a-f]* { shlh r15, r16, r17 ; addhs r5, r6, r7 } + b8c8: [0-9a-f]* { dword_align r5, r6, r7 ; shlh r15, r16, r17 } + b8d0: [0-9a-f]* { shlh r15, r16, r17 ; move r5, r6 } + b8d8: [0-9a-f]* { mulll_ss r5, r6, r7 ; shlh r15, r16, r17 } + b8e0: [0-9a-f]* { pcnt r5, r6 ; shlh r15, r16, r17 } + b8e8: [0-9a-f]* { shlh r15, r16, r17 ; shlh r5, r6, r7 } + b8f0: [0-9a-f]* { shlh r15, r16, r17 ; slth r5, r6, r7 } + b8f8: [0-9a-f]* { shlh r15, r16, r17 ; subh r5, r6, r7 } + b900: [0-9a-f]* { shlh r5, r6, r7 ; and r15, r16, r17 } + b908: [0-9a-f]* { shlh r5, r6, r7 ; jrp r15 } + b910: [0-9a-f]* { shlh r5, r6, r7 ; minb_u r15, r16, r17 } + b918: [0-9a-f]* { shlh r5, r6, r7 ; packbs_u r15, r16, r17 } + b920: [0-9a-f]* { shlh r5, r6, r7 ; shadd r15, r16, 5 } + b928: [0-9a-f]* { shlh r5, r6, r7 ; slteb_u r15, r16, r17 } + b930: [0-9a-f]* { shlh r5, r6, r7 ; sub r15, r16, r17 } + b938: [0-9a-f]* { shli r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 } + b940: [0-9a-f]* { shli r15, r16, 5 ; adds r5, r6, r7 } + b948: [0-9a-f]* { shli r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 } + b950: [0-9a-f]* { bytex r5, r6 ; shli r15, r16, 5 ; lw r25, r26 } + b958: [0-9a-f]* { ctz r5, r6 ; shli r15, r16, 5 ; lh r25, r26 } + b960: [0-9a-f]* { shli r15, r16, 5 ; info 19 ; lb_u r25, r26 } + b968: [0-9a-f]* { clz r5, r6 ; shli r15, r16, 5 ; lb r25, r26 } + b970: [0-9a-f]* { shli r15, r16, 5 ; nor r5, r6, r7 ; lb r25, r26 } + b978: [0-9a-f]* { shli r15, r16, 5 ; slti_u r5, r6, 5 ; lb r25, r26 } + b980: [0-9a-f]* { shli r15, r16, 5 ; info 19 ; lb_u r25, r26 } + b988: [0-9a-f]* { pcnt r5, r6 ; shli r15, r16, 5 ; lb_u r25, r26 } + b990: [0-9a-f]* { shli r15, r16, 5 ; srai r5, r6, 5 ; lb_u r25, r26 } + b998: [0-9a-f]* { shli r15, r16, 5 ; movei r5, 5 ; lh r25, r26 } + b9a0: [0-9a-f]* { shli r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 } + b9a8: [0-9a-f]* { tblidxb1 r5, r6 ; shli r15, r16, 5 ; lh r25, r26 } + b9b0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + b9b8: [0-9a-f]* { shli r15, r16, 5 ; seq r5, r6, r7 ; lh_u r25, r26 } + b9c0: [0-9a-f]* { shli r15, r16, 5 ; xor r5, r6, r7 ; lh_u r25, r26 } + b9c8: [0-9a-f]* { mulll_ss r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + b9d0: [0-9a-f]* { shli r15, r16, 5 ; shli r5, r6, 5 ; lw r25, r26 } + b9d8: [0-9a-f]* { shli r15, r16, 5 ; maxh r5, r6, r7 } + b9e0: [0-9a-f]* { shli r15, r16, 5 ; move r5, r6 ; lb r25, r26 } + b9e8: [0-9a-f]* { shli r15, r16, 5 ; moveli r5, 4660 } + b9f0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + b9f8: [0-9a-f]* { mulhha_uu r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + ba00: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + ba08: [0-9a-f]* { mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + ba10: [0-9a-f]* { mullla_uu r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + ba18: [0-9a-f]* { mvz r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + ba20: [0-9a-f]* { shli r15, r16, 5 ; nop ; lh r25, r26 } + ba28: [0-9a-f]* { shli r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 } + ba30: [0-9a-f]* { shli r15, r16, 5 ; packhs r5, r6, r7 } + ba38: [0-9a-f]* { shli r15, r16, 5 ; prefetch r25 } + ba40: [0-9a-f]* { shli r15, r16, 5 ; ori r5, r6, 5 ; prefetch r25 } + ba48: [0-9a-f]* { shli r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + ba50: [0-9a-f]* { shli r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 } + ba58: [0-9a-f]* { shli r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 } + ba60: [0-9a-f]* { sadah r5, r6, r7 ; shli r15, r16, 5 } + ba68: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + ba70: [0-9a-f]* { shli r15, r16, 5 ; seq r5, r6, r7 ; sb r25, r26 } + ba78: [0-9a-f]* { shli r15, r16, 5 ; xor r5, r6, r7 ; sb r25, r26 } + ba80: [0-9a-f]* { shli r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 } + ba88: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + ba90: [0-9a-f]* { shli r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 } + ba98: [0-9a-f]* { tblidxb3 r5, r6 ; shli r15, r16, 5 ; sh r25, r26 } + baa0: [0-9a-f]* { shli r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 } + baa8: [0-9a-f]* { shli r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 } + bab0: [0-9a-f]* { shli r15, r16, 5 ; slt r5, r6, r7 } + bab8: [0-9a-f]* { shli r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 } + bac0: [0-9a-f]* { shli r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 } + bac8: [0-9a-f]* { shli r15, r16, 5 ; sltib_u r5, r6, 5 } + bad0: [0-9a-f]* { shli r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + bad8: [0-9a-f]* { shli r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 } + bae0: [0-9a-f]* { clz r5, r6 ; shli r15, r16, 5 ; sw r25, r26 } + bae8: [0-9a-f]* { shli r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 } + baf0: [0-9a-f]* { shli r15, r16, 5 ; slti_u r5, r6, 5 ; sw r25, r26 } + baf8: [0-9a-f]* { tblidxb0 r5, r6 ; shli r15, r16, 5 } + bb00: [0-9a-f]* { tblidxb2 r5, r6 ; shli r15, r16, 5 } + bb08: [0-9a-f]* { shli r15, r16, 5 ; xor r5, r6, r7 } + bb10: [0-9a-f]* { shli r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + bb18: [0-9a-f]* { shli r5, r6, 5 ; and r15, r16, r17 } + bb20: [0-9a-f]* { shli r5, r6, 5 ; prefetch r25 } + bb28: [0-9a-f]* { shli r5, r6, 5 ; info 19 ; lw r25, r26 } + bb30: [0-9a-f]* { shli r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 } + bb38: [0-9a-f]* { shli r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 } + bb40: [0-9a-f]* { shli r5, r6, 5 ; andi r15, r16, 5 ; lb_u r25, r26 } + bb48: [0-9a-f]* { shli r5, r6, 5 ; shli r15, r16, 5 ; lb_u r25, r26 } + bb50: [0-9a-f]* { shli r5, r6, 5 ; and r15, r16, r17 ; lh r25, r26 } + bb58: [0-9a-f]* { shli r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 } + bb60: [0-9a-f]* { shli r5, r6, 5 ; andi r15, r16, 5 ; lh_u r25, r26 } + bb68: [0-9a-f]* { shli r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 } + bb70: [0-9a-f]* { shli r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + bb78: [0-9a-f]* { shli r5, r6, 5 ; seqi r15, r16, 5 ; lw r25, r26 } + bb80: [0-9a-f]* { shli r5, r6, 5 ; maxb_u r15, r16, r17 } + bb88: [0-9a-f]* { shli r5, r6, 5 ; mnz r15, r16, r17 } + bb90: [0-9a-f]* { shli r5, r6, 5 ; movei r15, 5 ; sh r25, r26 } + bb98: [0-9a-f]* { shli r5, r6, 5 ; nop ; lh r25, r26 } + bba0: [0-9a-f]* { shli r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 } + bba8: [0-9a-f]* { shli r5, r6, 5 ; packhs r15, r16, r17 } + bbb0: [0-9a-f]* { shli r5, r6, 5 ; s1a r15, r16, r17 ; prefetch r25 } + bbb8: [0-9a-f]* { shli r5, r6, 5 ; prefetch r25 } + bbc0: [0-9a-f]* { shli r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 } + bbc8: [0-9a-f]* { shli r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 } + bbd0: [0-9a-f]* { shli r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 } + bbd8: [0-9a-f]* { shli r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + bbe0: [0-9a-f]* { shli r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 } + bbe8: [0-9a-f]* { shli r5, r6, 5 ; andi r15, r16, 5 ; sh r25, r26 } + bbf0: [0-9a-f]* { shli r5, r6, 5 ; shli r15, r16, 5 ; sh r25, r26 } + bbf8: [0-9a-f]* { shli r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 } + bc00: [0-9a-f]* { shli r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 } + bc08: [0-9a-f]* { shli r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 } + bc10: [0-9a-f]* { shli r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + bc18: [0-9a-f]* { shli r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 } + bc20: [0-9a-f]* { shli r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 } + bc28: [0-9a-f]* { shli r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 } + bc30: [0-9a-f]* { shli r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 } + bc38: [0-9a-f]* { shli r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 } + bc40: [0-9a-f]* { shli r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 } + bc48: [0-9a-f]* { shli r5, r6, 5 ; sne r15, r16, r17 ; sw r25, r26 } + bc50: [0-9a-f]* { shlib r15, r16, 5 ; add r5, r6, r7 } + bc58: [0-9a-f]* { clz r5, r6 ; shlib r15, r16, 5 } + bc60: [0-9a-f]* { shlib r15, r16, 5 ; mm r5, r6, r7, 5, 7 } + bc68: [0-9a-f]* { mulhla_su r5, r6, r7 ; shlib r15, r16, 5 } + bc70: [0-9a-f]* { shlib r15, r16, 5 ; packbs_u r5, r6, r7 } + bc78: [0-9a-f]* { shlib r15, r16, 5 ; seqib r5, r6, 5 } + bc80: [0-9a-f]* { shlib r15, r16, 5 ; slteb r5, r6, r7 } + bc88: [0-9a-f]* { shlib r15, r16, 5 ; sraih r5, r6, 5 } + bc90: [0-9a-f]* { shlib r5, r6, 5 ; addih r15, r16, 5 } + bc98: [0-9a-f]* { shlib r5, r6, 5 ; iret } + bca0: [0-9a-f]* { shlib r5, r6, 5 ; maxib_u r15, r16, 5 } + bca8: [0-9a-f]* { shlib r5, r6, 5 ; nop } + bcb0: [0-9a-f]* { shlib r5, r6, 5 ; seqi r15, r16, 5 } + bcb8: [0-9a-f]* { shlib r5, r6, 5 ; sltb_u r15, r16, r17 } + bcc0: [0-9a-f]* { shlib r5, r6, 5 ; srah r15, r16, r17 } + bcc8: [0-9a-f]* { shlih r15, r16, 5 ; addhs r5, r6, r7 } + bcd0: [0-9a-f]* { dword_align r5, r6, r7 ; shlih r15, r16, 5 } + bcd8: [0-9a-f]* { shlih r15, r16, 5 ; move r5, r6 } + bce0: [0-9a-f]* { mulll_ss r5, r6, r7 ; shlih r15, r16, 5 } + bce8: [0-9a-f]* { pcnt r5, r6 ; shlih r15, r16, 5 } + bcf0: [0-9a-f]* { shlih r15, r16, 5 ; shlh r5, r6, r7 } + bcf8: [0-9a-f]* { shlih r15, r16, 5 ; slth r5, r6, r7 } + bd00: [0-9a-f]* { shlih r15, r16, 5 ; subh r5, r6, r7 } + bd08: [0-9a-f]* { shlih r5, r6, 5 ; and r15, r16, r17 } + bd10: [0-9a-f]* { shlih r5, r6, 5 ; jrp r15 } + bd18: [0-9a-f]* { shlih r5, r6, 5 ; minb_u r15, r16, r17 } + bd20: [0-9a-f]* { shlih r5, r6, 5 ; packbs_u r15, r16, r17 } + bd28: [0-9a-f]* { shlih r5, r6, 5 ; shadd r15, r16, 5 } + bd30: [0-9a-f]* { shlih r5, r6, 5 ; slteb_u r15, r16, r17 } + bd38: [0-9a-f]* { shlih r5, r6, 5 ; sub r15, r16, r17 } + bd40: [0-9a-f]* { shr r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + bd48: [0-9a-f]* { shr r15, r16, r17 ; adds r5, r6, r7 } + bd50: [0-9a-f]* { shr r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + bd58: [0-9a-f]* { bytex r5, r6 ; shr r15, r16, r17 ; lw r25, r26 } + bd60: [0-9a-f]* { ctz r5, r6 ; shr r15, r16, r17 ; lh r25, r26 } + bd68: [0-9a-f]* { shr r15, r16, r17 ; info 19 ; lb_u r25, r26 } + bd70: [0-9a-f]* { clz r5, r6 ; shr r15, r16, r17 ; lb r25, r26 } + bd78: [0-9a-f]* { shr r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 } + bd80: [0-9a-f]* { shr r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 } + bd88: [0-9a-f]* { shr r15, r16, r17 ; info 19 ; lb_u r25, r26 } + bd90: [0-9a-f]* { pcnt r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 } + bd98: [0-9a-f]* { shr r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + bda0: [0-9a-f]* { shr r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + bda8: [0-9a-f]* { shr r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + bdb0: [0-9a-f]* { tblidxb1 r5, r6 ; shr r15, r16, r17 ; lh r25, r26 } + bdb8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shr r15, r16, r17 ; lh_u r25, r26 } + bdc0: [0-9a-f]* { shr r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 } + bdc8: [0-9a-f]* { shr r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 } + bdd0: [0-9a-f]* { mulll_ss r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 } + bdd8: [0-9a-f]* { shr r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 } + bde0: [0-9a-f]* { shr r15, r16, r17 ; maxh r5, r6, r7 } + bde8: [0-9a-f]* { shr r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + bdf0: [0-9a-f]* { shr r15, r16, r17 ; moveli r5, 4660 } + bdf8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shr r15, r16, r17 ; sh r25, r26 } + be00: [0-9a-f]* { mulhha_uu r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 } + be08: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; shr r15, r16, r17 ; sh r25, r26 } + be10: [0-9a-f]* { mulll_uu r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 } + be18: [0-9a-f]* { mullla_uu r5, r6, r7 ; shr r15, r16, r17 ; prefetch r25 } + be20: [0-9a-f]* { mvz r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 } + be28: [0-9a-f]* { shr r15, r16, r17 ; nop ; lh r25, r26 } + be30: [0-9a-f]* { shr r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + be38: [0-9a-f]* { shr r15, r16, r17 ; packhs r5, r6, r7 } + be40: [0-9a-f]* { shr r15, r16, r17 ; prefetch r25 } + be48: [0-9a-f]* { shr r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 } + be50: [0-9a-f]* { shr r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + be58: [0-9a-f]* { shr r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + be60: [0-9a-f]* { shr r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + be68: [0-9a-f]* { sadah r5, r6, r7 ; shr r15, r16, r17 } + be70: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 } + be78: [0-9a-f]* { shr r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 } + be80: [0-9a-f]* { shr r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 } + be88: [0-9a-f]* { shr r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + be90: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shr r15, r16, r17 ; sh r25, r26 } + be98: [0-9a-f]* { shr r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 } + bea0: [0-9a-f]* { tblidxb3 r5, r6 ; shr r15, r16, r17 ; sh r25, r26 } + bea8: [0-9a-f]* { shr r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + beb0: [0-9a-f]* { shr r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + beb8: [0-9a-f]* { shr r15, r16, r17 ; slt r5, r6, r7 } + bec0: [0-9a-f]* { shr r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + bec8: [0-9a-f]* { shr r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + bed0: [0-9a-f]* { shr r15, r16, r17 ; sltib_u r5, r6, 5 } + bed8: [0-9a-f]* { shr r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + bee0: [0-9a-f]* { shr r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + bee8: [0-9a-f]* { clz r5, r6 ; shr r15, r16, r17 ; sw r25, r26 } + bef0: [0-9a-f]* { shr r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 } + bef8: [0-9a-f]* { shr r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 } + bf00: [0-9a-f]* { tblidxb0 r5, r6 ; shr r15, r16, r17 } + bf08: [0-9a-f]* { tblidxb2 r5, r6 ; shr r15, r16, r17 } + bf10: [0-9a-f]* { shr r15, r16, r17 ; xor r5, r6, r7 } + bf18: [0-9a-f]* { shr r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + bf20: [0-9a-f]* { shr r5, r6, r7 ; and r15, r16, r17 } + bf28: [0-9a-f]* { shr r5, r6, r7 ; prefetch r25 } + bf30: [0-9a-f]* { shr r5, r6, r7 ; info 19 ; lw r25, r26 } + bf38: [0-9a-f]* { shr r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + bf40: [0-9a-f]* { shr r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + bf48: [0-9a-f]* { shr r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 } + bf50: [0-9a-f]* { shr r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 } + bf58: [0-9a-f]* { shr r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + bf60: [0-9a-f]* { shr r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 } + bf68: [0-9a-f]* { shr r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + bf70: [0-9a-f]* { shr r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + bf78: [0-9a-f]* { shr r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + bf80: [0-9a-f]* { shr r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + bf88: [0-9a-f]* { shr r5, r6, r7 ; maxb_u r15, r16, r17 } + bf90: [0-9a-f]* { shr r5, r6, r7 ; mnz r15, r16, r17 } + bf98: [0-9a-f]* { shr r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + bfa0: [0-9a-f]* { shr r5, r6, r7 ; nop ; lh r25, r26 } + bfa8: [0-9a-f]* { shr r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + bfb0: [0-9a-f]* { shr r5, r6, r7 ; packhs r15, r16, r17 } + bfb8: [0-9a-f]* { shr r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 } + bfc0: [0-9a-f]* { shr r5, r6, r7 ; prefetch r25 } + bfc8: [0-9a-f]* { shr r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + bfd0: [0-9a-f]* { shr r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + bfd8: [0-9a-f]* { shr r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + bfe0: [0-9a-f]* { shr r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + bfe8: [0-9a-f]* { shr r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + bff0: [0-9a-f]* { shr r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + bff8: [0-9a-f]* { shr r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + c000: [0-9a-f]* { shr r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + c008: [0-9a-f]* { shr r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + c010: [0-9a-f]* { shr r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + c018: [0-9a-f]* { shr r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + c020: [0-9a-f]* { shr r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + c028: [0-9a-f]* { shr r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + c030: [0-9a-f]* { shr r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + c038: [0-9a-f]* { shr r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + c040: [0-9a-f]* { shr r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + c048: [0-9a-f]* { shr r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + c050: [0-9a-f]* { shr r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + c058: [0-9a-f]* { shrb r15, r16, r17 ; add r5, r6, r7 } + c060: [0-9a-f]* { clz r5, r6 ; shrb r15, r16, r17 } + c068: [0-9a-f]* { shrb r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + c070: [0-9a-f]* { mulhla_su r5, r6, r7 ; shrb r15, r16, r17 } + c078: [0-9a-f]* { shrb r15, r16, r17 ; packbs_u r5, r6, r7 } + c080: [0-9a-f]* { shrb r15, r16, r17 ; seqib r5, r6, 5 } + c088: [0-9a-f]* { shrb r15, r16, r17 ; slteb r5, r6, r7 } + c090: [0-9a-f]* { shrb r15, r16, r17 ; sraih r5, r6, 5 } + c098: [0-9a-f]* { shrb r5, r6, r7 ; addih r15, r16, 5 } + c0a0: [0-9a-f]* { shrb r5, r6, r7 ; iret } + c0a8: [0-9a-f]* { shrb r5, r6, r7 ; maxib_u r15, r16, 5 } + c0b0: [0-9a-f]* { shrb r5, r6, r7 ; nop } + c0b8: [0-9a-f]* { shrb r5, r6, r7 ; seqi r15, r16, 5 } + c0c0: [0-9a-f]* { shrb r5, r6, r7 ; sltb_u r15, r16, r17 } + c0c8: [0-9a-f]* { shrb r5, r6, r7 ; srah r15, r16, r17 } + c0d0: [0-9a-f]* { shrh r15, r16, r17 ; addhs r5, r6, r7 } + c0d8: [0-9a-f]* { dword_align r5, r6, r7 ; shrh r15, r16, r17 } + c0e0: [0-9a-f]* { shrh r15, r16, r17 ; move r5, r6 } + c0e8: [0-9a-f]* { mulll_ss r5, r6, r7 ; shrh r15, r16, r17 } + c0f0: [0-9a-f]* { pcnt r5, r6 ; shrh r15, r16, r17 } + c0f8: [0-9a-f]* { shrh r15, r16, r17 ; shlh r5, r6, r7 } + c100: [0-9a-f]* { shrh r15, r16, r17 ; slth r5, r6, r7 } + c108: [0-9a-f]* { shrh r15, r16, r17 ; subh r5, r6, r7 } + c110: [0-9a-f]* { shrh r5, r6, r7 ; and r15, r16, r17 } + c118: [0-9a-f]* { shrh r5, r6, r7 ; jrp r15 } + c120: [0-9a-f]* { shrh r5, r6, r7 ; minb_u r15, r16, r17 } + c128: [0-9a-f]* { shrh r5, r6, r7 ; packbs_u r15, r16, r17 } + c130: [0-9a-f]* { shrh r5, r6, r7 ; shadd r15, r16, 5 } + c138: [0-9a-f]* { shrh r5, r6, r7 ; slteb_u r15, r16, r17 } + c140: [0-9a-f]* { shrh r5, r6, r7 ; sub r15, r16, r17 } + c148: [0-9a-f]* { shri r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 } + c150: [0-9a-f]* { shri r15, r16, 5 ; adds r5, r6, r7 } + c158: [0-9a-f]* { shri r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 } + c160: [0-9a-f]* { bytex r5, r6 ; shri r15, r16, 5 ; lw r25, r26 } + c168: [0-9a-f]* { ctz r5, r6 ; shri r15, r16, 5 ; lh r25, r26 } + c170: [0-9a-f]* { shri r15, r16, 5 ; info 19 ; lb_u r25, r26 } + c178: [0-9a-f]* { clz r5, r6 ; shri r15, r16, 5 ; lb r25, r26 } + c180: [0-9a-f]* { shri r15, r16, 5 ; nor r5, r6, r7 ; lb r25, r26 } + c188: [0-9a-f]* { shri r15, r16, 5 ; slti_u r5, r6, 5 ; lb r25, r26 } + c190: [0-9a-f]* { shri r15, r16, 5 ; info 19 ; lb_u r25, r26 } + c198: [0-9a-f]* { pcnt r5, r6 ; shri r15, r16, 5 ; lb_u r25, r26 } + c1a0: [0-9a-f]* { shri r15, r16, 5 ; srai r5, r6, 5 ; lb_u r25, r26 } + c1a8: [0-9a-f]* { shri r15, r16, 5 ; movei r5, 5 ; lh r25, r26 } + c1b0: [0-9a-f]* { shri r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 } + c1b8: [0-9a-f]* { tblidxb1 r5, r6 ; shri r15, r16, 5 ; lh r25, r26 } + c1c0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shri r15, r16, 5 ; lh_u r25, r26 } + c1c8: [0-9a-f]* { shri r15, r16, 5 ; seq r5, r6, r7 ; lh_u r25, r26 } + c1d0: [0-9a-f]* { shri r15, r16, 5 ; xor r5, r6, r7 ; lh_u r25, r26 } + c1d8: [0-9a-f]* { mulll_ss r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + c1e0: [0-9a-f]* { shri r15, r16, 5 ; shli r5, r6, 5 ; lw r25, r26 } + c1e8: [0-9a-f]* { shri r15, r16, 5 ; maxh r5, r6, r7 } + c1f0: [0-9a-f]* { shri r15, r16, 5 ; move r5, r6 ; lb r25, r26 } + c1f8: [0-9a-f]* { shri r15, r16, 5 ; moveli r5, 4660 } + c200: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 } + c208: [0-9a-f]* { mulhha_uu r5, r6, r7 ; shri r15, r16, 5 ; sb r25, r26 } + c210: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 } + c218: [0-9a-f]* { mulll_uu r5, r6, r7 ; shri r15, r16, 5 ; sb r25, r26 } + c220: [0-9a-f]* { mullla_uu r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 } + c228: [0-9a-f]* { mvz r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + c230: [0-9a-f]* { shri r15, r16, 5 ; nop ; lh r25, r26 } + c238: [0-9a-f]* { shri r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 } + c240: [0-9a-f]* { shri r15, r16, 5 ; packhs r5, r6, r7 } + c248: [0-9a-f]* { shri r15, r16, 5 ; prefetch r25 } + c250: [0-9a-f]* { shri r15, r16, 5 ; ori r5, r6, 5 ; prefetch r25 } + c258: [0-9a-f]* { shri r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + c260: [0-9a-f]* { shri r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 } + c268: [0-9a-f]* { shri r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 } + c270: [0-9a-f]* { sadah r5, r6, r7 ; shri r15, r16, 5 } + c278: [0-9a-f]* { mulhha_ss r5, r6, r7 ; shri r15, r16, 5 ; sb r25, r26 } + c280: [0-9a-f]* { shri r15, r16, 5 ; seq r5, r6, r7 ; sb r25, r26 } + c288: [0-9a-f]* { shri r15, r16, 5 ; xor r5, r6, r7 ; sb r25, r26 } + c290: [0-9a-f]* { shri r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 } + c298: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 } + c2a0: [0-9a-f]* { shri r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 } + c2a8: [0-9a-f]* { tblidxb3 r5, r6 ; shri r15, r16, 5 ; sh r25, r26 } + c2b0: [0-9a-f]* { shri r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 } + c2b8: [0-9a-f]* { shri r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 } + c2c0: [0-9a-f]* { shri r15, r16, 5 ; slt r5, r6, r7 } + c2c8: [0-9a-f]* { shri r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 } + c2d0: [0-9a-f]* { shri r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 } + c2d8: [0-9a-f]* { shri r15, r16, 5 ; sltib_u r5, r6, 5 } + c2e0: [0-9a-f]* { shri r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + c2e8: [0-9a-f]* { shri r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 } + c2f0: [0-9a-f]* { clz r5, r6 ; shri r15, r16, 5 ; sw r25, r26 } + c2f8: [0-9a-f]* { shri r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 } + c300: [0-9a-f]* { shri r15, r16, 5 ; slti_u r5, r6, 5 ; sw r25, r26 } + c308: [0-9a-f]* { tblidxb0 r5, r6 ; shri r15, r16, 5 } + c310: [0-9a-f]* { tblidxb2 r5, r6 ; shri r15, r16, 5 } + c318: [0-9a-f]* { shri r15, r16, 5 ; xor r5, r6, r7 } + c320: [0-9a-f]* { shri r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + c328: [0-9a-f]* { shri r5, r6, 5 ; and r15, r16, r17 } + c330: [0-9a-f]* { shri r5, r6, 5 ; prefetch r25 } + c338: [0-9a-f]* { shri r5, r6, 5 ; info 19 ; lw r25, r26 } + c340: [0-9a-f]* { shri r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 } + c348: [0-9a-f]* { shri r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 } + c350: [0-9a-f]* { shri r5, r6, 5 ; andi r15, r16, 5 ; lb_u r25, r26 } + c358: [0-9a-f]* { shri r5, r6, 5 ; shli r15, r16, 5 ; lb_u r25, r26 } + c360: [0-9a-f]* { shri r5, r6, 5 ; and r15, r16, r17 ; lh r25, r26 } + c368: [0-9a-f]* { shri r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 } + c370: [0-9a-f]* { shri r5, r6, 5 ; andi r15, r16, 5 ; lh_u r25, r26 } + c378: [0-9a-f]* { shri r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 } + c380: [0-9a-f]* { shri r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + c388: [0-9a-f]* { shri r5, r6, 5 ; seqi r15, r16, 5 ; lw r25, r26 } + c390: [0-9a-f]* { shri r5, r6, 5 ; maxb_u r15, r16, r17 } + c398: [0-9a-f]* { shri r5, r6, 5 ; mnz r15, r16, r17 } + c3a0: [0-9a-f]* { shri r5, r6, 5 ; movei r15, 5 ; sh r25, r26 } + c3a8: [0-9a-f]* { shri r5, r6, 5 ; nop ; lh r25, r26 } + c3b0: [0-9a-f]* { shri r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 } + c3b8: [0-9a-f]* { shri r5, r6, 5 ; packhs r15, r16, r17 } + c3c0: [0-9a-f]* { shri r5, r6, 5 ; s1a r15, r16, r17 ; prefetch r25 } + c3c8: [0-9a-f]* { shri r5, r6, 5 ; prefetch r25 } + c3d0: [0-9a-f]* { shri r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 } + c3d8: [0-9a-f]* { shri r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 } + c3e0: [0-9a-f]* { shri r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 } + c3e8: [0-9a-f]* { shri r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + c3f0: [0-9a-f]* { shri r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 } + c3f8: [0-9a-f]* { shri r5, r6, 5 ; andi r15, r16, 5 ; sh r25, r26 } + c400: [0-9a-f]* { shri r5, r6, 5 ; shli r15, r16, 5 ; sh r25, r26 } + c408: [0-9a-f]* { shri r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 } + c410: [0-9a-f]* { shri r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 } + c418: [0-9a-f]* { shri r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 } + c420: [0-9a-f]* { shri r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + c428: [0-9a-f]* { shri r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 } + c430: [0-9a-f]* { shri r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 } + c438: [0-9a-f]* { shri r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 } + c440: [0-9a-f]* { shri r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 } + c448: [0-9a-f]* { shri r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 } + c450: [0-9a-f]* { shri r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 } + c458: [0-9a-f]* { shri r5, r6, 5 ; sne r15, r16, r17 ; sw r25, r26 } + c460: [0-9a-f]* { shrib r15, r16, 5 ; add r5, r6, r7 } + c468: [0-9a-f]* { clz r5, r6 ; shrib r15, r16, 5 } + c470: [0-9a-f]* { shrib r15, r16, 5 ; mm r5, r6, r7, 5, 7 } + c478: [0-9a-f]* { mulhla_su r5, r6, r7 ; shrib r15, r16, 5 } + c480: [0-9a-f]* { shrib r15, r16, 5 ; packbs_u r5, r6, r7 } + c488: [0-9a-f]* { shrib r15, r16, 5 ; seqib r5, r6, 5 } + c490: [0-9a-f]* { shrib r15, r16, 5 ; slteb r5, r6, r7 } + c498: [0-9a-f]* { shrib r15, r16, 5 ; sraih r5, r6, 5 } + c4a0: [0-9a-f]* { shrib r5, r6, 5 ; addih r15, r16, 5 } + c4a8: [0-9a-f]* { shrib r5, r6, 5 ; iret } + c4b0: [0-9a-f]* { shrib r5, r6, 5 ; maxib_u r15, r16, 5 } + c4b8: [0-9a-f]* { shrib r5, r6, 5 ; nop } + c4c0: [0-9a-f]* { shrib r5, r6, 5 ; seqi r15, r16, 5 } + c4c8: [0-9a-f]* { shrib r5, r6, 5 ; sltb_u r15, r16, r17 } + c4d0: [0-9a-f]* { shrib r5, r6, 5 ; srah r15, r16, r17 } + c4d8: [0-9a-f]* { shrih r15, r16, 5 ; addhs r5, r6, r7 } + c4e0: [0-9a-f]* { dword_align r5, r6, r7 ; shrih r15, r16, 5 } + c4e8: [0-9a-f]* { shrih r15, r16, 5 ; move r5, r6 } + c4f0: [0-9a-f]* { mulll_ss r5, r6, r7 ; shrih r15, r16, 5 } + c4f8: [0-9a-f]* { pcnt r5, r6 ; shrih r15, r16, 5 } + c500: [0-9a-f]* { shrih r15, r16, 5 ; shlh r5, r6, r7 } + c508: [0-9a-f]* { shrih r15, r16, 5 ; slth r5, r6, r7 } + c510: [0-9a-f]* { shrih r15, r16, 5 ; subh r5, r6, r7 } + c518: [0-9a-f]* { shrih r5, r6, 5 ; and r15, r16, r17 } + c520: [0-9a-f]* { shrih r5, r6, 5 ; jrp r15 } + c528: [0-9a-f]* { shrih r5, r6, 5 ; minb_u r15, r16, r17 } + c530: [0-9a-f]* { shrih r5, r6, 5 ; packbs_u r15, r16, r17 } + c538: [0-9a-f]* { shrih r5, r6, 5 ; shadd r15, r16, 5 } + c540: [0-9a-f]* { shrih r5, r6, 5 ; slteb_u r15, r16, r17 } + c548: [0-9a-f]* { shrih r5, r6, 5 ; sub r15, r16, r17 } + c550: [0-9a-f]* { slt r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + c558: [0-9a-f]* { slt r15, r16, r17 ; adds r5, r6, r7 } + c560: [0-9a-f]* { slt r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + c568: [0-9a-f]* { bytex r5, r6 ; slt r15, r16, r17 ; lw r25, r26 } + c570: [0-9a-f]* { ctz r5, r6 ; slt r15, r16, r17 ; lh r25, r26 } + c578: [0-9a-f]* { slt r15, r16, r17 ; info 19 ; lb_u r25, r26 } + c580: [0-9a-f]* { clz r5, r6 ; slt r15, r16, r17 ; lb r25, r26 } + c588: [0-9a-f]* { slt r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 } + c590: [0-9a-f]* { slt r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 } + c598: [0-9a-f]* { slt r15, r16, r17 ; info 19 ; lb_u r25, r26 } + c5a0: [0-9a-f]* { pcnt r5, r6 ; slt r15, r16, r17 ; lb_u r25, r26 } + c5a8: [0-9a-f]* { slt r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + c5b0: [0-9a-f]* { slt r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + c5b8: [0-9a-f]* { slt r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + c5c0: [0-9a-f]* { tblidxb1 r5, r6 ; slt r15, r16, r17 ; lh r25, r26 } + c5c8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slt r15, r16, r17 ; lh_u r25, r26 } + c5d0: [0-9a-f]* { slt r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 } + c5d8: [0-9a-f]* { slt r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 } + c5e0: [0-9a-f]* { mulll_ss r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 } + c5e8: [0-9a-f]* { slt r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 } + c5f0: [0-9a-f]* { slt r15, r16, r17 ; maxh r5, r6, r7 } + c5f8: [0-9a-f]* { slt r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + c600: [0-9a-f]* { slt r15, r16, r17 ; moveli r5, 4660 } + c608: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + c610: [0-9a-f]* { mulhha_uu r5, r6, r7 ; slt r15, r16, r17 ; sb r25, r26 } + c618: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + c620: [0-9a-f]* { mulll_uu r5, r6, r7 ; slt r15, r16, r17 ; sb r25, r26 } + c628: [0-9a-f]* { mullla_uu r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 } + c630: [0-9a-f]* { mvz r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 } + c638: [0-9a-f]* { slt r15, r16, r17 ; nop ; lh r25, r26 } + c640: [0-9a-f]* { slt r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + c648: [0-9a-f]* { slt r15, r16, r17 ; packhs r5, r6, r7 } + c650: [0-9a-f]* { slt r15, r16, r17 ; prefetch r25 } + c658: [0-9a-f]* { slt r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 } + c660: [0-9a-f]* { slt r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + c668: [0-9a-f]* { slt r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + c670: [0-9a-f]* { slt r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + c678: [0-9a-f]* { sadah r5, r6, r7 ; slt r15, r16, r17 } + c680: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slt r15, r16, r17 ; sb r25, r26 } + c688: [0-9a-f]* { slt r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 } + c690: [0-9a-f]* { slt r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 } + c698: [0-9a-f]* { slt r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + c6a0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + c6a8: [0-9a-f]* { slt r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 } + c6b0: [0-9a-f]* { tblidxb3 r5, r6 ; slt r15, r16, r17 ; sh r25, r26 } + c6b8: [0-9a-f]* { slt r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + c6c0: [0-9a-f]* { slt r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + c6c8: [0-9a-f]* { slt r15, r16, r17 ; slt r5, r6, r7 } + c6d0: [0-9a-f]* { slt r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + c6d8: [0-9a-f]* { slt r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + c6e0: [0-9a-f]* { slt r15, r16, r17 ; sltib_u r5, r6, 5 } + c6e8: [0-9a-f]* { slt r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + c6f0: [0-9a-f]* { slt r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + c6f8: [0-9a-f]* { clz r5, r6 ; slt r15, r16, r17 ; sw r25, r26 } + c700: [0-9a-f]* { slt r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 } + c708: [0-9a-f]* { slt r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 } + c710: [0-9a-f]* { tblidxb0 r5, r6 ; slt r15, r16, r17 } + c718: [0-9a-f]* { tblidxb2 r5, r6 ; slt r15, r16, r17 } + c720: [0-9a-f]* { slt r15, r16, r17 ; xor r5, r6, r7 } + c728: [0-9a-f]* { slt r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + c730: [0-9a-f]* { slt r5, r6, r7 ; and r15, r16, r17 } + c738: [0-9a-f]* { slt r5, r6, r7 ; prefetch r25 } + c740: [0-9a-f]* { slt r5, r6, r7 ; info 19 ; lw r25, r26 } + c748: [0-9a-f]* { slt r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + c750: [0-9a-f]* { slt r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + c758: [0-9a-f]* { slt r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 } + c760: [0-9a-f]* { slt r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 } + c768: [0-9a-f]* { slt r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + c770: [0-9a-f]* { slt r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 } + c778: [0-9a-f]* { slt r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + c780: [0-9a-f]* { slt r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + c788: [0-9a-f]* { slt r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + c790: [0-9a-f]* { slt r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + c798: [0-9a-f]* { slt r5, r6, r7 ; maxb_u r15, r16, r17 } + c7a0: [0-9a-f]* { slt r5, r6, r7 ; mnz r15, r16, r17 } + c7a8: [0-9a-f]* { slt r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + c7b0: [0-9a-f]* { slt r5, r6, r7 ; nop ; lh r25, r26 } + c7b8: [0-9a-f]* { slt r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + c7c0: [0-9a-f]* { slt r5, r6, r7 ; packhs r15, r16, r17 } + c7c8: [0-9a-f]* { slt r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 } + c7d0: [0-9a-f]* { slt r5, r6, r7 ; prefetch r25 } + c7d8: [0-9a-f]* { slt r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + c7e0: [0-9a-f]* { slt r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + c7e8: [0-9a-f]* { slt r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + c7f0: [0-9a-f]* { slt r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + c7f8: [0-9a-f]* { slt r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + c800: [0-9a-f]* { slt r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + c808: [0-9a-f]* { slt r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + c810: [0-9a-f]* { slt r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + c818: [0-9a-f]* { slt r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + c820: [0-9a-f]* { slt r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + c828: [0-9a-f]* { slt r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + c830: [0-9a-f]* { slt r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + c838: [0-9a-f]* { slt r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + c840: [0-9a-f]* { slt r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + c848: [0-9a-f]* { slt r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + c850: [0-9a-f]* { slt r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + c858: [0-9a-f]* { slt r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + c860: [0-9a-f]* { slt r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + c868: [0-9a-f]* { slt_u r15, r16, r17 ; add r5, r6, r7 ; lb r25, r26 } + c870: [0-9a-f]* { slt_u r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 } + c878: [0-9a-f]* { slt_u r15, r16, r17 ; and r5, r6, r7 } + c880: [0-9a-f]* { bitx r5, r6 ; slt_u r15, r16, r17 ; sb r25, r26 } + c888: [0-9a-f]* { clz r5, r6 ; slt_u r15, r16, r17 ; sb r25, r26 } + c890: [0-9a-f]* { slt_u r15, r16, r17 ; lh_u r25, r26 } + c898: [0-9a-f]* { slt_u r15, r16, r17 ; intlb r5, r6, r7 } + c8a0: [0-9a-f]* { mulll_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 } + c8a8: [0-9a-f]* { slt_u r15, r16, r17 ; shli r5, r6, 5 ; lb r25, r26 } + c8b0: [0-9a-f]* { slt_u r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 } + c8b8: [0-9a-f]* { mullla_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + c8c0: [0-9a-f]* { slt_u r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 } + c8c8: [0-9a-f]* { bitx r5, r6 ; slt_u r15, r16, r17 ; lh r25, r26 } + c8d0: [0-9a-f]* { slt_u r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 } + c8d8: [0-9a-f]* { slt_u r15, r16, r17 ; slte_u r5, r6, r7 ; lh r25, r26 } + c8e0: [0-9a-f]* { ctz r5, r6 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + c8e8: [0-9a-f]* { slt_u r15, r16, r17 ; or r5, r6, r7 ; lh_u r25, r26 } + c8f0: [0-9a-f]* { slt_u r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 } + c8f8: [0-9a-f]* { slt_u r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 } + c900: [0-9a-f]* { slt_u r15, r16, r17 ; rl r5, r6, r7 ; lw r25, r26 } + c908: [0-9a-f]* { slt_u r15, r16, r17 ; sub r5, r6, r7 ; lw r25, r26 } + c910: [0-9a-f]* { slt_u r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 } + c918: [0-9a-f]* { slt_u r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + c920: [0-9a-f]* { mulhh_su r5, r6, r7 ; slt_u r15, r16, r17 } + c928: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slt_u r15, r16, r17 } + c930: [0-9a-f]* { mulhla_uu r5, r6, r7 ; slt_u r15, r16, r17 } + c938: [0-9a-f]* { mulll_ss r5, r6, r7 ; slt_u r15, r16, r17 } + c940: [0-9a-f]* { mullla_ss r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 } + c948: [0-9a-f]* { mvnz r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + c950: [0-9a-f]* { slt_u r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 } + c958: [0-9a-f]* { slt_u r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 } + c960: [0-9a-f]* { slt_u r15, r16, r17 ; ori r5, r6, 5 ; lw r25, r26 } + c968: [0-9a-f]* { slt_u r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 } + c970: [0-9a-f]* { mullla_ss r5, r6, r7 ; slt_u r15, r16, r17 ; prefetch r25 } + c978: [0-9a-f]* { slt_u r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 } + c980: [0-9a-f]* { slt_u r15, r16, r17 ; rl r5, r6, r7 ; lh_u r25, r26 } + c988: [0-9a-f]* { slt_u r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 } + c990: [0-9a-f]* { slt_u r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 } + c998: [0-9a-f]* { ctz r5, r6 ; slt_u r15, r16, r17 ; sb r25, r26 } + c9a0: [0-9a-f]* { slt_u r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 } + c9a8: [0-9a-f]* { slt_u r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 } + c9b0: [0-9a-f]* { slt_u r15, r16, r17 ; seqb r5, r6, r7 } + c9b8: [0-9a-f]* { clz r5, r6 ; slt_u r15, r16, r17 ; sh r25, r26 } + c9c0: [0-9a-f]* { slt_u r15, r16, r17 ; nor r5, r6, r7 ; sh r25, r26 } + c9c8: [0-9a-f]* { slt_u r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 } + c9d0: [0-9a-f]* { slt_u r15, r16, r17 ; shl r5, r6, r7 } + c9d8: [0-9a-f]* { slt_u r15, r16, r17 ; shr r5, r6, r7 ; prefetch r25 } + c9e0: [0-9a-f]* { slt_u r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 } + c9e8: [0-9a-f]* { slt_u r15, r16, r17 ; sltb_u r5, r6, r7 } + c9f0: [0-9a-f]* { slt_u r15, r16, r17 ; slte_u r5, r6, r7 } + c9f8: [0-9a-f]* { slt_u r15, r16, r17 ; slti_u r5, r6, 5 ; lh_u r25, r26 } + ca00: [0-9a-f]* { slt_u r15, r16, r17 ; sne r5, r6, r7 } + ca08: [0-9a-f]* { slt_u r15, r16, r17 ; srai r5, r6, 5 ; prefetch r25 } + ca10: [0-9a-f]* { slt_u r15, r16, r17 ; subhs r5, r6, r7 } + ca18: [0-9a-f]* { mulll_ss r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 } + ca20: [0-9a-f]* { slt_u r15, r16, r17 ; shli r5, r6, 5 ; sw r25, r26 } + ca28: [0-9a-f]* { tblidxb0 r5, r6 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + ca30: [0-9a-f]* { tblidxb2 r5, r6 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + ca38: [0-9a-f]* { slt_u r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 } + ca40: [0-9a-f]* { slt_u r5, r6, r7 ; addb r15, r16, r17 } + ca48: [0-9a-f]* { slt_u r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + ca50: [0-9a-f]* { slt_u r5, r6, r7 ; dtlbpr r15 } + ca58: [0-9a-f]* { slt_u r5, r6, r7 ; ill ; sb r25, r26 } + ca60: [0-9a-f]* { slt_u r5, r6, r7 ; iret } + ca68: [0-9a-f]* { slt_u r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 } + ca70: [0-9a-f]* { slt_u r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + ca78: [0-9a-f]* { slt_u r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 } + ca80: [0-9a-f]* { slt_u r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 } + ca88: [0-9a-f]* { slt_u r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 } + ca90: [0-9a-f]* { slt_u r5, r6, r7 ; srai r15, r16, 5 ; lh r25, r26 } + ca98: [0-9a-f]* { slt_u r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 } + caa0: [0-9a-f]* { slt_u r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 } + caa8: [0-9a-f]* { slt_u r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 } + cab0: [0-9a-f]* { slt_u r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + cab8: [0-9a-f]* { slt_u r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + cac0: [0-9a-f]* { slt_u r5, r6, r7 ; move r15, r16 } + cac8: [0-9a-f]* { slt_u r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + cad0: [0-9a-f]* { slt_u r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + cad8: [0-9a-f]* { slt_u r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + cae0: [0-9a-f]* { slt_u r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + cae8: [0-9a-f]* { slt_u r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 } + caf0: [0-9a-f]* { slt_u r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + caf8: [0-9a-f]* { slt_u r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + cb00: [0-9a-f]* { slt_u r5, r6, r7 ; sb r15, r16 } + cb08: [0-9a-f]* { slt_u r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + cb10: [0-9a-f]* { slt_u r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 } + cb18: [0-9a-f]* { slt_u r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + cb20: [0-9a-f]* { slt_u r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 } + cb28: [0-9a-f]* { slt_u r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 } + cb30: [0-9a-f]* { slt_u r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + cb38: [0-9a-f]* { slt_u r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 } + cb40: [0-9a-f]* { slt_u r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 } + cb48: [0-9a-f]* { slt_u r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 } + cb50: [0-9a-f]* { slt_u r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + cb58: [0-9a-f]* { slt_u r5, r6, r7 ; sltib r15, r16, 5 } + cb60: [0-9a-f]* { slt_u r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + cb68: [0-9a-f]* { slt_u r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + cb70: [0-9a-f]* { slt_u r5, r6, r7 ; sw r25, r26 } + cb78: [0-9a-f]* { slt_u r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 } + cb80: [0-9a-f]* { slt_u r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + cb88: [0-9a-f]* { adiffh r5, r6, r7 ; sltb r15, r16, r17 } + cb90: [0-9a-f]* { sltb r15, r16, r17 ; maxb_u r5, r6, r7 } + cb98: [0-9a-f]* { mulhha_su r5, r6, r7 ; sltb r15, r16, r17 } + cba0: [0-9a-f]* { mvz r5, r6, r7 ; sltb r15, r16, r17 } + cba8: [0-9a-f]* { sadah_u r5, r6, r7 ; sltb r15, r16, r17 } + cbb0: [0-9a-f]* { sltb r15, r16, r17 ; shrib r5, r6, 5 } + cbb8: [0-9a-f]* { sltb r15, r16, r17 ; sne r5, r6, r7 } + cbc0: [0-9a-f]* { sltb r15, r16, r17 ; xori r5, r6, 5 } + cbc8: [0-9a-f]* { sltb r5, r6, r7 ; ill } + cbd0: [0-9a-f]* { sltb r5, r6, r7 ; lhadd_u r15, r16, 5 } + cbd8: [0-9a-f]* { sltb r5, r6, r7 ; move r15, r16 } + cbe0: [0-9a-f]* { sltb r5, r6, r7 ; s1a r15, r16, r17 } + cbe8: [0-9a-f]* { sltb r5, r6, r7 ; shrb r15, r16, r17 } + cbf0: [0-9a-f]* { sltb r5, r6, r7 ; sltib_u r15, r16, 5 } + cbf8: [0-9a-f]* { sltb r5, r6, r7 ; tns r15, r16 } + cc00: [0-9a-f]* { avgb_u r5, r6, r7 ; sltb_u r15, r16, r17 } + cc08: [0-9a-f]* { sltb_u r15, r16, r17 ; minb_u r5, r6, r7 } + cc10: [0-9a-f]* { mulhl_su r5, r6, r7 ; sltb_u r15, r16, r17 } + cc18: [0-9a-f]* { sltb_u r15, r16, r17 ; nop } + cc20: [0-9a-f]* { sltb_u r15, r16, r17 ; seq r5, r6, r7 } + cc28: [0-9a-f]* { sltb_u r15, r16, r17 ; sltb r5, r6, r7 } + cc30: [0-9a-f]* { sltb_u r15, r16, r17 ; srab r5, r6, r7 } + cc38: [0-9a-f]* { sltb_u r5, r6, r7 ; addh r15, r16, r17 } + cc40: [0-9a-f]* { sltb_u r5, r6, r7 ; inthh r15, r16, r17 } + cc48: [0-9a-f]* { sltb_u r5, r6, r7 ; lwadd r15, r16, 5 } + cc50: [0-9a-f]* { sltb_u r5, r6, r7 ; mtspr 5, r16 } + cc58: [0-9a-f]* { sltb_u r5, r6, r7 ; sbadd r15, r16, 5 } + cc60: [0-9a-f]* { sltb_u r5, r6, r7 ; shrih r15, r16, 5 } + cc68: [0-9a-f]* { sltb_u r5, r6, r7 ; sneb r15, r16, r17 } + cc70: [0-9a-f]* { slte r15, r16, r17 ; add r5, r6, r7 ; lb r25, r26 } + cc78: [0-9a-f]* { slte r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 } + cc80: [0-9a-f]* { slte r15, r16, r17 ; and r5, r6, r7 } + cc88: [0-9a-f]* { bitx r5, r6 ; slte r15, r16, r17 ; sb r25, r26 } + cc90: [0-9a-f]* { clz r5, r6 ; slte r15, r16, r17 ; sb r25, r26 } + cc98: [0-9a-f]* { slte r15, r16, r17 ; lh_u r25, r26 } + cca0: [0-9a-f]* { slte r15, r16, r17 ; intlb r5, r6, r7 } + cca8: [0-9a-f]* { mulll_ss r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 } + ccb0: [0-9a-f]* { slte r15, r16, r17 ; shli r5, r6, 5 ; lb r25, r26 } + ccb8: [0-9a-f]* { slte r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 } + ccc0: [0-9a-f]* { mullla_uu r5, r6, r7 ; slte r15, r16, r17 ; lb_u r25, r26 } + ccc8: [0-9a-f]* { slte r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 } + ccd0: [0-9a-f]* { bitx r5, r6 ; slte r15, r16, r17 ; lh r25, r26 } + ccd8: [0-9a-f]* { slte r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 } + cce0: [0-9a-f]* { slte r15, r16, r17 ; slte_u r5, r6, r7 ; lh r25, r26 } + cce8: [0-9a-f]* { ctz r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 } + ccf0: [0-9a-f]* { slte r15, r16, r17 ; or r5, r6, r7 ; lh_u r25, r26 } + ccf8: [0-9a-f]* { slte r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 } + cd00: [0-9a-f]* { slte r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 } + cd08: [0-9a-f]* { slte r15, r16, r17 ; rl r5, r6, r7 ; lw r25, r26 } + cd10: [0-9a-f]* { slte r15, r16, r17 ; sub r5, r6, r7 ; lw r25, r26 } + cd18: [0-9a-f]* { slte r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 } + cd20: [0-9a-f]* { slte r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + cd28: [0-9a-f]* { mulhh_su r5, r6, r7 ; slte r15, r16, r17 } + cd30: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slte r15, r16, r17 } + cd38: [0-9a-f]* { mulhla_uu r5, r6, r7 ; slte r15, r16, r17 } + cd40: [0-9a-f]* { mulll_ss r5, r6, r7 ; slte r15, r16, r17 } + cd48: [0-9a-f]* { mullla_ss r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 } + cd50: [0-9a-f]* { mvnz r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 } + cd58: [0-9a-f]* { slte r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 } + cd60: [0-9a-f]* { slte r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 } + cd68: [0-9a-f]* { slte r15, r16, r17 ; ori r5, r6, 5 ; lw r25, r26 } + cd70: [0-9a-f]* { slte r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 } + cd78: [0-9a-f]* { mullla_ss r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 } + cd80: [0-9a-f]* { slte r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 } + cd88: [0-9a-f]* { slte r15, r16, r17 ; rl r5, r6, r7 ; lh_u r25, r26 } + cd90: [0-9a-f]* { slte r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 } + cd98: [0-9a-f]* { slte r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 } + cda0: [0-9a-f]* { ctz r5, r6 ; slte r15, r16, r17 ; sb r25, r26 } + cda8: [0-9a-f]* { slte r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 } + cdb0: [0-9a-f]* { slte r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 } + cdb8: [0-9a-f]* { slte r15, r16, r17 ; seqb r5, r6, r7 } + cdc0: [0-9a-f]* { clz r5, r6 ; slte r15, r16, r17 ; sh r25, r26 } + cdc8: [0-9a-f]* { slte r15, r16, r17 ; nor r5, r6, r7 ; sh r25, r26 } + cdd0: [0-9a-f]* { slte r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 } + cdd8: [0-9a-f]* { slte r15, r16, r17 ; shl r5, r6, r7 } + cde0: [0-9a-f]* { slte r15, r16, r17 ; shr r5, r6, r7 ; prefetch r25 } + cde8: [0-9a-f]* { slte r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 } + cdf0: [0-9a-f]* { slte r15, r16, r17 ; sltb_u r5, r6, r7 } + cdf8: [0-9a-f]* { slte r15, r16, r17 ; slte_u r5, r6, r7 } + ce00: [0-9a-f]* { slte r15, r16, r17 ; slti_u r5, r6, 5 ; lh_u r25, r26 } + ce08: [0-9a-f]* { slte r15, r16, r17 ; sne r5, r6, r7 } + ce10: [0-9a-f]* { slte r15, r16, r17 ; srai r5, r6, 5 ; prefetch r25 } + ce18: [0-9a-f]* { slte r15, r16, r17 ; subhs r5, r6, r7 } + ce20: [0-9a-f]* { mulll_ss r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 } + ce28: [0-9a-f]* { slte r15, r16, r17 ; shli r5, r6, 5 ; sw r25, r26 } + ce30: [0-9a-f]* { tblidxb0 r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 } + ce38: [0-9a-f]* { tblidxb2 r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 } + ce40: [0-9a-f]* { slte r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 } + ce48: [0-9a-f]* { slte r5, r6, r7 ; addb r15, r16, r17 } + ce50: [0-9a-f]* { slte r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + ce58: [0-9a-f]* { slte r5, r6, r7 ; dtlbpr r15 } + ce60: [0-9a-f]* { slte r5, r6, r7 ; ill ; sb r25, r26 } + ce68: [0-9a-f]* { slte r5, r6, r7 ; iret } + ce70: [0-9a-f]* { slte r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 } + ce78: [0-9a-f]* { slte r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + ce80: [0-9a-f]* { slte r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 } + ce88: [0-9a-f]* { slte r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 } + ce90: [0-9a-f]* { slte r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 } + ce98: [0-9a-f]* { slte r5, r6, r7 ; srai r15, r16, 5 ; lh r25, r26 } + cea0: [0-9a-f]* { slte r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 } + cea8: [0-9a-f]* { slte r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 } + ceb0: [0-9a-f]* { slte r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 } + ceb8: [0-9a-f]* { slte r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + cec0: [0-9a-f]* { slte r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + cec8: [0-9a-f]* { slte r5, r6, r7 ; move r15, r16 } + ced0: [0-9a-f]* { slte r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + ced8: [0-9a-f]* { slte r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + cee0: [0-9a-f]* { slte r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + cee8: [0-9a-f]* { slte r5, r6, r7 ; movei r15, 5 ; prefetch r25 } + cef0: [0-9a-f]* { slte r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 } + cef8: [0-9a-f]* { slte r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + cf00: [0-9a-f]* { slte r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + cf08: [0-9a-f]* { slte r5, r6, r7 ; sb r15, r16 } + cf10: [0-9a-f]* { slte r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + cf18: [0-9a-f]* { slte r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 } + cf20: [0-9a-f]* { slte r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + cf28: [0-9a-f]* { slte r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 } + cf30: [0-9a-f]* { slte r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 } + cf38: [0-9a-f]* { slte r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + cf40: [0-9a-f]* { slte r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 } + cf48: [0-9a-f]* { slte r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 } + cf50: [0-9a-f]* { slte r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 } + cf58: [0-9a-f]* { slte r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + cf60: [0-9a-f]* { slte r5, r6, r7 ; sltib r15, r16, 5 } + cf68: [0-9a-f]* { slte r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + cf70: [0-9a-f]* { slte r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + cf78: [0-9a-f]* { slte r5, r6, r7 ; sw r25, r26 } + cf80: [0-9a-f]* { slte r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 } + cf88: [0-9a-f]* { slte r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + cf90: [0-9a-f]* { slte_u r15, r16, r17 ; addh r5, r6, r7 } + cf98: [0-9a-f]* { slte_u r15, r16, r17 ; and r5, r6, r7 ; lb_u r25, r26 } + cfa0: [0-9a-f]* { avgb_u r5, r6, r7 ; slte_u r15, r16, r17 } + cfa8: [0-9a-f]* { bytex r5, r6 ; slte_u r15, r16, r17 ; sw r25, r26 } + cfb0: [0-9a-f]* { ctz r5, r6 ; slte_u r15, r16, r17 ; sb r25, r26 } + cfb8: [0-9a-f]* { slte_u r15, r16, r17 ; info 19 ; prefetch r25 } + cfc0: [0-9a-f]* { slte_u r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 } + cfc8: [0-9a-f]* { slte_u r15, r16, r17 ; rl r5, r6, r7 ; lb r25, r26 } + cfd0: [0-9a-f]* { slte_u r15, r16, r17 ; sub r5, r6, r7 ; lb r25, r26 } + cfd8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + cfe0: [0-9a-f]* { slte_u r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + cfe8: [0-9a-f]* { tblidxb2 r5, r6 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + cff0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; slte_u r15, r16, r17 ; lh r25, r26 } + cff8: [0-9a-f]* { slte_u r15, r16, r17 ; seqi r5, r6, 5 ; lh r25, r26 } + d000: [0-9a-f]* { slte_u r15, r16, r17 ; lh r25, r26 } + d008: [0-9a-f]* { mulll_uu r5, r6, r7 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + d010: [0-9a-f]* { slte_u r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 } + d018: [0-9a-f]* { slte_u r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 } + d020: [0-9a-f]* { mvnz r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + d028: [0-9a-f]* { slte_u r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 } + d030: [0-9a-f]* { slte_u r15, r16, r17 ; minh r5, r6, r7 } + d038: [0-9a-f]* { slte_u r15, r16, r17 ; move r5, r6 ; lw r25, r26 } + d040: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lh r25, r26 } + d048: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + d050: [0-9a-f]* { mulhhsa_uu r5, r6, r7 ; slte_u r15, r16, r17 } + d058: [0-9a-f]* { mulll_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + d060: [0-9a-f]* { mullla_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 } + d068: [0-9a-f]* { mullla_uu r5, r6, r7 ; slte_u r15, r16, r17 } + d070: [0-9a-f]* { mvz r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 } + d078: [0-9a-f]* { slte_u r15, r16, r17 ; nop ; sb r25, r26 } + d080: [0-9a-f]* { slte_u r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 } + d088: [0-9a-f]* { pcnt r5, r6 ; slte_u r15, r16, r17 ; lh r25, r26 } + d090: [0-9a-f]* { slte_u r15, r16, r17 ; movei r5, 5 ; prefetch r25 } + d098: [0-9a-f]* { slte_u r15, r16, r17 ; s1a r5, r6, r7 ; prefetch r25 } + d0a0: [0-9a-f]* { tblidxb1 r5, r6 ; slte_u r15, r16, r17 ; prefetch r25 } + d0a8: [0-9a-f]* { slte_u r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 } + d0b0: [0-9a-f]* { slte_u r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 } + d0b8: [0-9a-f]* { sadh_u r5, r6, r7 ; slte_u r15, r16, r17 } + d0c0: [0-9a-f]* { mulll_uu r5, r6, r7 ; slte_u r15, r16, r17 ; sb r25, r26 } + d0c8: [0-9a-f]* { slte_u r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 } + d0d0: [0-9a-f]* { slte_u r15, r16, r17 ; seq r5, r6, r7 ; lh r25, r26 } + d0d8: [0-9a-f]* { slte_u r15, r16, r17 ; seqib r5, r6, 5 } + d0e0: [0-9a-f]* { mulll_ss r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 } + d0e8: [0-9a-f]* { slte_u r15, r16, r17 ; shli r5, r6, 5 ; sh r25, r26 } + d0f0: [0-9a-f]* { slte_u r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 } + d0f8: [0-9a-f]* { slte_u r15, r16, r17 ; shli r5, r6, 5 } + d100: [0-9a-f]* { slte_u r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 } + d108: [0-9a-f]* { slte_u r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 } + d110: [0-9a-f]* { slte_u r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 } + d118: [0-9a-f]* { slte_u r15, r16, r17 ; slti r5, r6, 5 ; prefetch r25 } + d120: [0-9a-f]* { slte_u r15, r16, r17 ; sne r5, r6, r7 ; lb_u r25, r26 } + d128: [0-9a-f]* { slte_u r15, r16, r17 ; sra r5, r6, r7 } + d130: [0-9a-f]* { slte_u r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 } + d138: [0-9a-f]* { slte_u r15, r16, r17 ; mnz r5, r6, r7 ; sw r25, r26 } + d140: [0-9a-f]* { slte_u r15, r16, r17 ; rl r5, r6, r7 ; sw r25, r26 } + d148: [0-9a-f]* { slte_u r15, r16, r17 ; sub r5, r6, r7 ; sw r25, r26 } + d150: [0-9a-f]* { tblidxb1 r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + d158: [0-9a-f]* { tblidxb3 r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + d160: [0-9a-f]* { slte_u r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + d168: [0-9a-f]* { slte_u r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 } + d170: [0-9a-f]* { slte_u r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + d178: [0-9a-f]* { slte_u r5, r6, r7 } + d180: [0-9a-f]* { slte_u r5, r6, r7 ; info 19 ; sw r25, r26 } + d188: [0-9a-f]* { slte_u r5, r6, r7 ; info 19 ; lb r25, r26 } + d190: [0-9a-f]* { slte_u r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 } + d198: [0-9a-f]* { slte_u r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + d1a0: [0-9a-f]* { slte_u r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + d1a8: [0-9a-f]* { slte_u r5, r6, r7 ; info 19 ; lh r25, r26 } + d1b0: [0-9a-f]* { slte_u r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 } + d1b8: [0-9a-f]* { slte_u r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 } + d1c0: [0-9a-f]* { slte_u r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + d1c8: [0-9a-f]* { slte_u r5, r6, r7 ; ill ; lw r25, r26 } + d1d0: [0-9a-f]* { slte_u r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + d1d8: [0-9a-f]* { slte_u r5, r6, r7 ; mf } + d1e0: [0-9a-f]* { slte_u r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 } + d1e8: [0-9a-f]* { slte_u r5, r6, r7 ; moveli.sn r15, 4660 } + d1f0: [0-9a-f]* { slte_u r5, r6, r7 ; nop ; sb r25, r26 } + d1f8: [0-9a-f]* { slte_u r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 } + d200: [0-9a-f]* { slte_u r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } + d208: [0-9a-f]* { slte_u r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 } + d210: [0-9a-f]* { slte_u r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 } + d218: [0-9a-f]* { slte_u r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 } + d220: [0-9a-f]* { slte_u r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 } + d228: [0-9a-f]* { slte_u r5, r6, r7 ; nop ; sb r25, r26 } + d230: [0-9a-f]* { slte_u r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 } + d238: [0-9a-f]* { slte_u r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 } + d240: [0-9a-f]* { slte_u r5, r6, r7 ; mnz r15, r16, r17 ; sh r25, r26 } + d248: [0-9a-f]* { slte_u r5, r6, r7 ; slt_u r15, r16, r17 ; sh r25, r26 } + d250: [0-9a-f]* { slte_u r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 } + d258: [0-9a-f]* { slte_u r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 } + d260: [0-9a-f]* { slte_u r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 } + d268: [0-9a-f]* { slte_u r5, r6, r7 ; sltb r15, r16, r17 } + d270: [0-9a-f]* { slte_u r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 } + d278: [0-9a-f]* { slte_u r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 } + d280: [0-9a-f]* { slte_u r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + d288: [0-9a-f]* { slte_u r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 } + d290: [0-9a-f]* { slte_u r5, r6, r7 ; subh r15, r16, r17 } + d298: [0-9a-f]* { slte_u r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + d2a0: [0-9a-f]* { slte_u r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 } + d2a8: [0-9a-f]* { slteb r15, r16, r17 ; addhs r5, r6, r7 } + d2b0: [0-9a-f]* { dword_align r5, r6, r7 ; slteb r15, r16, r17 } + d2b8: [0-9a-f]* { slteb r15, r16, r17 ; move r5, r6 } + d2c0: [0-9a-f]* { mulll_ss r5, r6, r7 ; slteb r15, r16, r17 } + d2c8: [0-9a-f]* { pcnt r5, r6 ; slteb r15, r16, r17 } + d2d0: [0-9a-f]* { slteb r15, r16, r17 ; shlh r5, r6, r7 } + d2d8: [0-9a-f]* { slteb r15, r16, r17 ; slth r5, r6, r7 } + d2e0: [0-9a-f]* { slteb r15, r16, r17 ; subh r5, r6, r7 } + d2e8: [0-9a-f]* { slteb r5, r6, r7 ; and r15, r16, r17 } + d2f0: [0-9a-f]* { slteb r5, r6, r7 ; jrp r15 } + d2f8: [0-9a-f]* { slteb r5, r6, r7 ; minb_u r15, r16, r17 } + d300: [0-9a-f]* { slteb r5, r6, r7 ; packbs_u r15, r16, r17 } + d308: [0-9a-f]* { slteb r5, r6, r7 ; shadd r15, r16, 5 } + d310: [0-9a-f]* { slteb r5, r6, r7 ; slteb_u r15, r16, r17 } + d318: [0-9a-f]* { slteb r5, r6, r7 ; sub r15, r16, r17 } + d320: [0-9a-f]* { slteb_u r15, r16, r17 ; addli r5, r6, 4660 } + d328: [0-9a-f]* { slteb_u r15, r16, r17 ; inthb r5, r6, r7 } + d330: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slteb_u r15, r16, r17 } + d338: [0-9a-f]* { mullla_su r5, r6, r7 ; slteb_u r15, r16, r17 } + d340: [0-9a-f]* { slteb_u r15, r16, r17 ; s2a r5, r6, r7 } + d348: [0-9a-f]* { slteb_u r15, r16, r17 ; shr r5, r6, r7 } + d350: [0-9a-f]* { slteb_u r15, r16, r17 ; sltib r5, r6, 5 } + d358: [0-9a-f]* { tblidxb1 r5, r6 ; slteb_u r15, r16, r17 } + d360: [0-9a-f]* { slteb_u r5, r6, r7 ; finv r15 } + d368: [0-9a-f]* { slteb_u r5, r6, r7 ; lbadd_u r15, r16, 5 } + d370: [0-9a-f]* { slteb_u r5, r6, r7 ; mm r15, r16, r17, 5, 7 } + d378: [0-9a-f]* { slteb_u r5, r6, r7 ; prefetch r15 } + d380: [0-9a-f]* { slteb_u r5, r6, r7 ; shli r15, r16, 5 } + d388: [0-9a-f]* { slteb_u r5, r6, r7 ; slth_u r15, r16, r17 } + d390: [0-9a-f]* { slteb_u r5, r6, r7 ; subhs r15, r16, r17 } + d398: [0-9a-f]* { adiffh r5, r6, r7 ; slteh r15, r16, r17 } + d3a0: [0-9a-f]* { slteh r15, r16, r17 ; maxb_u r5, r6, r7 } + d3a8: [0-9a-f]* { mulhha_su r5, r6, r7 ; slteh r15, r16, r17 } + d3b0: [0-9a-f]* { mvz r5, r6, r7 ; slteh r15, r16, r17 } + d3b8: [0-9a-f]* { sadah_u r5, r6, r7 ; slteh r15, r16, r17 } + d3c0: [0-9a-f]* { slteh r15, r16, r17 ; shrib r5, r6, 5 } + d3c8: [0-9a-f]* { slteh r15, r16, r17 ; sne r5, r6, r7 } + d3d0: [0-9a-f]* { slteh r15, r16, r17 ; xori r5, r6, 5 } + d3d8: [0-9a-f]* { slteh r5, r6, r7 ; ill } + d3e0: [0-9a-f]* { slteh r5, r6, r7 ; lhadd_u r15, r16, 5 } + d3e8: [0-9a-f]* { slteh r5, r6, r7 ; move r15, r16 } + d3f0: [0-9a-f]* { slteh r5, r6, r7 ; s1a r15, r16, r17 } + d3f8: [0-9a-f]* { slteh r5, r6, r7 ; shrb r15, r16, r17 } + d400: [0-9a-f]* { slteh r5, r6, r7 ; sltib_u r15, r16, 5 } + d408: [0-9a-f]* { slteh r5, r6, r7 ; tns r15, r16 } + d410: [0-9a-f]* { avgb_u r5, r6, r7 ; slteh_u r15, r16, r17 } + d418: [0-9a-f]* { slteh_u r15, r16, r17 ; minb_u r5, r6, r7 } + d420: [0-9a-f]* { mulhl_su r5, r6, r7 ; slteh_u r15, r16, r17 } + d428: [0-9a-f]* { slteh_u r15, r16, r17 ; nop } + d430: [0-9a-f]* { slteh_u r15, r16, r17 ; seq r5, r6, r7 } + d438: [0-9a-f]* { slteh_u r15, r16, r17 ; sltb r5, r6, r7 } + d440: [0-9a-f]* { slteh_u r15, r16, r17 ; srab r5, r6, r7 } + d448: [0-9a-f]* { slteh_u r5, r6, r7 ; addh r15, r16, r17 } + d450: [0-9a-f]* { slteh_u r5, r6, r7 ; inthh r15, r16, r17 } + d458: [0-9a-f]* { slteh_u r5, r6, r7 ; lwadd r15, r16, 5 } + d460: [0-9a-f]* { slteh_u r5, r6, r7 ; mtspr 5, r16 } + d468: [0-9a-f]* { slteh_u r5, r6, r7 ; sbadd r15, r16, 5 } + d470: [0-9a-f]* { slteh_u r5, r6, r7 ; shrih r15, r16, 5 } + d478: [0-9a-f]* { slteh_u r5, r6, r7 ; sneb r15, r16, r17 } + d480: [0-9a-f]* { slth r15, r16, r17 ; add r5, r6, r7 } + d488: [0-9a-f]* { clz r5, r6 ; slth r15, r16, r17 } + d490: [0-9a-f]* { slth r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + d498: [0-9a-f]* { mulhla_su r5, r6, r7 ; slth r15, r16, r17 } + d4a0: [0-9a-f]* { slth r15, r16, r17 ; packbs_u r5, r6, r7 } + d4a8: [0-9a-f]* { slth r15, r16, r17 ; seqib r5, r6, 5 } + d4b0: [0-9a-f]* { slth r15, r16, r17 ; slteb r5, r6, r7 } + d4b8: [0-9a-f]* { slth r15, r16, r17 ; sraih r5, r6, 5 } + d4c0: [0-9a-f]* { slth r5, r6, r7 ; addih r15, r16, 5 } + d4c8: [0-9a-f]* { slth r5, r6, r7 ; iret } + d4d0: [0-9a-f]* { slth r5, r6, r7 ; maxib_u r15, r16, 5 } + d4d8: [0-9a-f]* { slth r5, r6, r7 ; nop } + d4e0: [0-9a-f]* { slth r5, r6, r7 ; seqi r15, r16, 5 } + d4e8: [0-9a-f]* { slth r5, r6, r7 ; sltb_u r15, r16, r17 } + d4f0: [0-9a-f]* { slth r5, r6, r7 ; srah r15, r16, r17 } + d4f8: [0-9a-f]* { slth_u r15, r16, r17 ; addhs r5, r6, r7 } + d500: [0-9a-f]* { dword_align r5, r6, r7 ; slth_u r15, r16, r17 } + d508: [0-9a-f]* { slth_u r15, r16, r17 ; move r5, r6 } + d510: [0-9a-f]* { mulll_ss r5, r6, r7 ; slth_u r15, r16, r17 } + d518: [0-9a-f]* { pcnt r5, r6 ; slth_u r15, r16, r17 } + d520: [0-9a-f]* { slth_u r15, r16, r17 ; shlh r5, r6, r7 } + d528: [0-9a-f]* { slth_u r15, r16, r17 ; slth r5, r6, r7 } + d530: [0-9a-f]* { slth_u r15, r16, r17 ; subh r5, r6, r7 } + d538: [0-9a-f]* { slth_u r5, r6, r7 ; and r15, r16, r17 } + d540: [0-9a-f]* { slth_u r5, r6, r7 ; jrp r15 } + d548: [0-9a-f]* { slth_u r5, r6, r7 ; minb_u r15, r16, r17 } + d550: [0-9a-f]* { slth_u r5, r6, r7 ; packbs_u r15, r16, r17 } + d558: [0-9a-f]* { slth_u r5, r6, r7 ; shadd r15, r16, 5 } + d560: [0-9a-f]* { slth_u r5, r6, r7 ; slteb_u r15, r16, r17 } + d568: [0-9a-f]* { slth_u r5, r6, r7 ; sub r15, r16, r17 } + d570: [0-9a-f]* { slti r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 } + d578: [0-9a-f]* { slti r15, r16, 5 ; adds r5, r6, r7 } + d580: [0-9a-f]* { slti r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 } + d588: [0-9a-f]* { bytex r5, r6 ; slti r15, r16, 5 ; lw r25, r26 } + d590: [0-9a-f]* { ctz r5, r6 ; slti r15, r16, 5 ; lh r25, r26 } + d598: [0-9a-f]* { slti r15, r16, 5 ; info 19 ; lb_u r25, r26 } + d5a0: [0-9a-f]* { clz r5, r6 ; slti r15, r16, 5 ; lb r25, r26 } + d5a8: [0-9a-f]* { slti r15, r16, 5 ; nor r5, r6, r7 ; lb r25, r26 } + d5b0: [0-9a-f]* { slti r15, r16, 5 ; slti_u r5, r6, 5 ; lb r25, r26 } + d5b8: [0-9a-f]* { slti r15, r16, 5 ; info 19 ; lb_u r25, r26 } + d5c0: [0-9a-f]* { pcnt r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 } + d5c8: [0-9a-f]* { slti r15, r16, 5 ; srai r5, r6, 5 ; lb_u r25, r26 } + d5d0: [0-9a-f]* { slti r15, r16, 5 ; movei r5, 5 ; lh r25, r26 } + d5d8: [0-9a-f]* { slti r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 } + d5e0: [0-9a-f]* { tblidxb1 r5, r6 ; slti r15, r16, 5 ; lh r25, r26 } + d5e8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 } + d5f0: [0-9a-f]* { slti r15, r16, 5 ; seq r5, r6, r7 ; lh_u r25, r26 } + d5f8: [0-9a-f]* { slti r15, r16, 5 ; xor r5, r6, r7 ; lh_u r25, r26 } + d600: [0-9a-f]* { mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + d608: [0-9a-f]* { slti r15, r16, 5 ; shli r5, r6, 5 ; lw r25, r26 } + d610: [0-9a-f]* { slti r15, r16, 5 ; maxh r5, r6, r7 } + d618: [0-9a-f]* { slti r15, r16, 5 ; move r5, r6 ; lb r25, r26 } + d620: [0-9a-f]* { slti r15, r16, 5 ; moveli r5, 4660 } + d628: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 } + d630: [0-9a-f]* { mulhha_uu r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 } + d638: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 } + d640: [0-9a-f]* { mulll_uu r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 } + d648: [0-9a-f]* { mullla_uu r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 } + d650: [0-9a-f]* { mvz r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + d658: [0-9a-f]* { slti r15, r16, 5 ; nop ; lh r25, r26 } + d660: [0-9a-f]* { slti r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 } + d668: [0-9a-f]* { slti r15, r16, 5 ; packhs r5, r6, r7 } + d670: [0-9a-f]* { slti r15, r16, 5 ; prefetch r25 } + d678: [0-9a-f]* { slti r15, r16, 5 ; ori r5, r6, 5 ; prefetch r25 } + d680: [0-9a-f]* { slti r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + d688: [0-9a-f]* { slti r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 } + d690: [0-9a-f]* { slti r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 } + d698: [0-9a-f]* { sadah r5, r6, r7 ; slti r15, r16, 5 } + d6a0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 } + d6a8: [0-9a-f]* { slti r15, r16, 5 ; seq r5, r6, r7 ; sb r25, r26 } + d6b0: [0-9a-f]* { slti r15, r16, 5 ; xor r5, r6, r7 ; sb r25, r26 } + d6b8: [0-9a-f]* { slti r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 } + d6c0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 } + d6c8: [0-9a-f]* { slti r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 } + d6d0: [0-9a-f]* { tblidxb3 r5, r6 ; slti r15, r16, 5 ; sh r25, r26 } + d6d8: [0-9a-f]* { slti r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 } + d6e0: [0-9a-f]* { slti r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 } + d6e8: [0-9a-f]* { slti r15, r16, 5 ; slt r5, r6, r7 } + d6f0: [0-9a-f]* { slti r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 } + d6f8: [0-9a-f]* { slti r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 } + d700: [0-9a-f]* { slti r15, r16, 5 ; sltib_u r5, r6, 5 } + d708: [0-9a-f]* { slti r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + d710: [0-9a-f]* { slti r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 } + d718: [0-9a-f]* { clz r5, r6 ; slti r15, r16, 5 ; sw r25, r26 } + d720: [0-9a-f]* { slti r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 } + d728: [0-9a-f]* { slti r15, r16, 5 ; slti_u r5, r6, 5 ; sw r25, r26 } + d730: [0-9a-f]* { tblidxb0 r5, r6 ; slti r15, r16, 5 } + d738: [0-9a-f]* { tblidxb2 r5, r6 ; slti r15, r16, 5 } + d740: [0-9a-f]* { slti r15, r16, 5 ; xor r5, r6, r7 } + d748: [0-9a-f]* { slti r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + d750: [0-9a-f]* { slti r5, r6, 5 ; and r15, r16, r17 } + d758: [0-9a-f]* { slti r5, r6, 5 ; prefetch r25 } + d760: [0-9a-f]* { slti r5, r6, 5 ; info 19 ; lw r25, r26 } + d768: [0-9a-f]* { slti r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 } + d770: [0-9a-f]* { slti r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 } + d778: [0-9a-f]* { slti r5, r6, 5 ; andi r15, r16, 5 ; lb_u r25, r26 } + d780: [0-9a-f]* { slti r5, r6, 5 ; shli r15, r16, 5 ; lb_u r25, r26 } + d788: [0-9a-f]* { slti r5, r6, 5 ; and r15, r16, r17 ; lh r25, r26 } + d790: [0-9a-f]* { slti r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 } + d798: [0-9a-f]* { slti r5, r6, 5 ; andi r15, r16, 5 ; lh_u r25, r26 } + d7a0: [0-9a-f]* { slti r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 } + d7a8: [0-9a-f]* { slti r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + d7b0: [0-9a-f]* { slti r5, r6, 5 ; seqi r15, r16, 5 ; lw r25, r26 } + d7b8: [0-9a-f]* { slti r5, r6, 5 ; maxb_u r15, r16, r17 } + d7c0: [0-9a-f]* { slti r5, r6, 5 ; mnz r15, r16, r17 } + d7c8: [0-9a-f]* { slti r5, r6, 5 ; movei r15, 5 ; sh r25, r26 } + d7d0: [0-9a-f]* { slti r5, r6, 5 ; nop ; lh r25, r26 } + d7d8: [0-9a-f]* { slti r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 } + d7e0: [0-9a-f]* { slti r5, r6, 5 ; packhs r15, r16, r17 } + d7e8: [0-9a-f]* { slti r5, r6, 5 ; s1a r15, r16, r17 ; prefetch r25 } + d7f0: [0-9a-f]* { slti r5, r6, 5 ; prefetch r25 } + d7f8: [0-9a-f]* { slti r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 } + d800: [0-9a-f]* { slti r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 } + d808: [0-9a-f]* { slti r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 } + d810: [0-9a-f]* { slti r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + d818: [0-9a-f]* { slti r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 } + d820: [0-9a-f]* { slti r5, r6, 5 ; andi r15, r16, 5 ; sh r25, r26 } + d828: [0-9a-f]* { slti r5, r6, 5 ; shli r15, r16, 5 ; sh r25, r26 } + d830: [0-9a-f]* { slti r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 } + d838: [0-9a-f]* { slti r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 } + d840: [0-9a-f]* { slti r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 } + d848: [0-9a-f]* { slti r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + d850: [0-9a-f]* { slti r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 } + d858: [0-9a-f]* { slti r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 } + d860: [0-9a-f]* { slti r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 } + d868: [0-9a-f]* { slti r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 } + d870: [0-9a-f]* { slti r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 } + d878: [0-9a-f]* { slti r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 } + d880: [0-9a-f]* { slti r5, r6, 5 ; sne r15, r16, r17 ; sw r25, r26 } + d888: [0-9a-f]* { slti_u r15, r16, 5 ; add r5, r6, r7 ; lb r25, r26 } + d890: [0-9a-f]* { slti_u r15, r16, 5 ; addi r5, r6, 5 ; sb r25, r26 } + d898: [0-9a-f]* { slti_u r15, r16, 5 ; and r5, r6, r7 } + d8a0: [0-9a-f]* { bitx r5, r6 ; slti_u r15, r16, 5 ; sb r25, r26 } + d8a8: [0-9a-f]* { clz r5, r6 ; slti_u r15, r16, 5 ; sb r25, r26 } + d8b0: [0-9a-f]* { slti_u r15, r16, 5 ; lh_u r25, r26 } + d8b8: [0-9a-f]* { slti_u r15, r16, 5 ; intlb r5, r6, r7 } + d8c0: [0-9a-f]* { mulll_ss r5, r6, r7 ; slti_u r15, r16, 5 ; lb r25, r26 } + d8c8: [0-9a-f]* { slti_u r15, r16, 5 ; shli r5, r6, 5 ; lb r25, r26 } + d8d0: [0-9a-f]* { slti_u r15, r16, 5 ; addi r5, r6, 5 ; lb_u r25, r26 } + d8d8: [0-9a-f]* { mullla_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 } + d8e0: [0-9a-f]* { slti_u r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 } + d8e8: [0-9a-f]* { bitx r5, r6 ; slti_u r15, r16, 5 ; lh r25, r26 } + d8f0: [0-9a-f]* { slti_u r15, r16, 5 ; mz r5, r6, r7 ; lh r25, r26 } + d8f8: [0-9a-f]* { slti_u r15, r16, 5 ; slte_u r5, r6, r7 ; lh r25, r26 } + d900: [0-9a-f]* { ctz r5, r6 ; slti_u r15, r16, 5 ; lh_u r25, r26 } + d908: [0-9a-f]* { slti_u r15, r16, 5 ; or r5, r6, r7 ; lh_u r25, r26 } + d910: [0-9a-f]* { slti_u r15, r16, 5 ; sne r5, r6, r7 ; lh_u r25, r26 } + d918: [0-9a-f]* { slti_u r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 } + d920: [0-9a-f]* { slti_u r15, r16, 5 ; rl r5, r6, r7 ; lw r25, r26 } + d928: [0-9a-f]* { slti_u r15, r16, 5 ; sub r5, r6, r7 ; lw r25, r26 } + d930: [0-9a-f]* { slti_u r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 } + d938: [0-9a-f]* { slti_u r15, r16, 5 ; movei r5, 5 ; lh r25, r26 } + d940: [0-9a-f]* { mulhh_su r5, r6, r7 ; slti_u r15, r16, 5 } + d948: [0-9a-f]* { mulhha_ss r5, r6, r7 ; slti_u r15, r16, 5 } + d950: [0-9a-f]* { mulhla_uu r5, r6, r7 ; slti_u r15, r16, 5 } + d958: [0-9a-f]* { mulll_ss r5, r6, r7 ; slti_u r15, r16, 5 } + d960: [0-9a-f]* { mullla_ss r5, r6, r7 ; slti_u r15, r16, 5 ; sw r25, r26 } + d968: [0-9a-f]* { mvnz r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 } + d970: [0-9a-f]* { slti_u r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 } + d978: [0-9a-f]* { slti_u r15, r16, 5 ; nor r5, r6, r7 ; lw r25, r26 } + d980: [0-9a-f]* { slti_u r15, r16, 5 ; ori r5, r6, 5 ; lw r25, r26 } + d988: [0-9a-f]* { slti_u r15, r16, 5 ; add r5, r6, r7 ; prefetch r25 } + d990: [0-9a-f]* { mullla_ss r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 } + d998: [0-9a-f]* { slti_u r15, r16, 5 ; shri r5, r6, 5 ; prefetch r25 } + d9a0: [0-9a-f]* { slti_u r15, r16, 5 ; rl r5, r6, r7 ; lh_u r25, r26 } + d9a8: [0-9a-f]* { slti_u r15, r16, 5 ; s1a r5, r6, r7 ; lh_u r25, r26 } + d9b0: [0-9a-f]* { slti_u r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 } + d9b8: [0-9a-f]* { ctz r5, r6 ; slti_u r15, r16, 5 ; sb r25, r26 } + d9c0: [0-9a-f]* { slti_u r15, r16, 5 ; or r5, r6, r7 ; sb r25, r26 } + d9c8: [0-9a-f]* { slti_u r15, r16, 5 ; sne r5, r6, r7 ; sb r25, r26 } + d9d0: [0-9a-f]* { slti_u r15, r16, 5 ; seqb r5, r6, r7 } + d9d8: [0-9a-f]* { clz r5, r6 ; slti_u r15, r16, 5 ; sh r25, r26 } + d9e0: [0-9a-f]* { slti_u r15, r16, 5 ; nor r5, r6, r7 ; sh r25, r26 } + d9e8: [0-9a-f]* { slti_u r15, r16, 5 ; slti_u r5, r6, 5 ; sh r25, r26 } + d9f0: [0-9a-f]* { slti_u r15, r16, 5 ; shl r5, r6, r7 } + d9f8: [0-9a-f]* { slti_u r15, r16, 5 ; shr r5, r6, r7 ; prefetch r25 } + da00: [0-9a-f]* { slti_u r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 } + da08: [0-9a-f]* { slti_u r15, r16, 5 ; sltb_u r5, r6, r7 } + da10: [0-9a-f]* { slti_u r15, r16, 5 ; slte_u r5, r6, r7 } + da18: [0-9a-f]* { slti_u r15, r16, 5 ; slti_u r5, r6, 5 ; lh_u r25, r26 } + da20: [0-9a-f]* { slti_u r15, r16, 5 ; sne r5, r6, r7 } + da28: [0-9a-f]* { slti_u r15, r16, 5 ; srai r5, r6, 5 ; prefetch r25 } + da30: [0-9a-f]* { slti_u r15, r16, 5 ; subhs r5, r6, r7 } + da38: [0-9a-f]* { mulll_ss r5, r6, r7 ; slti_u r15, r16, 5 ; sw r25, r26 } + da40: [0-9a-f]* { slti_u r15, r16, 5 ; shli r5, r6, 5 ; sw r25, r26 } + da48: [0-9a-f]* { tblidxb0 r5, r6 ; slti_u r15, r16, 5 ; lb_u r25, r26 } + da50: [0-9a-f]* { tblidxb2 r5, r6 ; slti_u r15, r16, 5 ; lb_u r25, r26 } + da58: [0-9a-f]* { slti_u r15, r16, 5 ; xor r5, r6, r7 ; lb_u r25, r26 } + da60: [0-9a-f]* { slti_u r5, r6, 5 ; addb r15, r16, r17 } + da68: [0-9a-f]* { slti_u r5, r6, 5 ; and r15, r16, r17 ; lb_u r25, r26 } + da70: [0-9a-f]* { slti_u r5, r6, 5 ; dtlbpr r15 } + da78: [0-9a-f]* { slti_u r5, r6, 5 ; ill ; sb r25, r26 } + da80: [0-9a-f]* { slti_u r5, r6, 5 ; iret } + da88: [0-9a-f]* { slti_u r5, r6, 5 ; ori r15, r16, 5 ; lb r25, r26 } + da90: [0-9a-f]* { slti_u r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 } + da98: [0-9a-f]* { slti_u r5, r6, 5 ; rl r15, r16, r17 ; lb_u r25, r26 } + daa0: [0-9a-f]* { slti_u r5, r6, 5 ; sub r15, r16, r17 ; lb_u r25, r26 } + daa8: [0-9a-f]* { slti_u r5, r6, 5 ; ori r15, r16, 5 ; lh r25, r26 } + dab0: [0-9a-f]* { slti_u r5, r6, 5 ; srai r15, r16, 5 ; lh r25, r26 } + dab8: [0-9a-f]* { slti_u r5, r6, 5 ; rl r15, r16, r17 ; lh_u r25, r26 } + dac0: [0-9a-f]* { slti_u r5, r6, 5 ; sub r15, r16, r17 ; lh_u r25, r26 } + dac8: [0-9a-f]* { slti_u r5, r6, 5 ; or r15, r16, r17 ; lw r25, r26 } + dad0: [0-9a-f]* { slti_u r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 } + dad8: [0-9a-f]* { slti_u r5, r6, 5 ; mnz r15, r16, r17 ; lb_u r25, r26 } + dae0: [0-9a-f]* { slti_u r5, r6, 5 ; move r15, r16 } + dae8: [0-9a-f]* { slti_u r5, r6, 5 ; mz r15, r16, r17 ; sb r25, r26 } + daf0: [0-9a-f]* { slti_u r5, r6, 5 ; nor r15, r16, r17 ; lw r25, r26 } + daf8: [0-9a-f]* { slti_u r5, r6, 5 ; ori r15, r16, 5 ; lw r25, r26 } + db00: [0-9a-f]* { slti_u r5, r6, 5 ; movei r15, 5 ; prefetch r25 } + db08: [0-9a-f]* { slti_u r5, r6, 5 ; slte_u r15, r16, r17 ; prefetch r25 } + db10: [0-9a-f]* { slti_u r5, r6, 5 ; rli r15, r16, 5 ; lb r25, r26 } + db18: [0-9a-f]* { slti_u r5, r6, 5 ; s2a r15, r16, r17 ; lb r25, r26 } + db20: [0-9a-f]* { slti_u r5, r6, 5 ; sb r15, r16 } + db28: [0-9a-f]* { slti_u r5, r6, 5 ; s3a r15, r16, r17 ; sb r25, r26 } + db30: [0-9a-f]* { slti_u r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 } + db38: [0-9a-f]* { slti_u r5, r6, 5 ; seqi r15, r16, 5 ; sw r25, r26 } + db40: [0-9a-f]* { slti_u r5, r6, 5 ; rl r15, r16, r17 ; sh r25, r26 } + db48: [0-9a-f]* { slti_u r5, r6, 5 ; sub r15, r16, r17 ; sh r25, r26 } + db50: [0-9a-f]* { slti_u r5, r6, 5 ; shli r15, r16, 5 ; lw r25, r26 } + db58: [0-9a-f]* { slti_u r5, r6, 5 ; shri r15, r16, 5 ; lb r25, r26 } + db60: [0-9a-f]* { slti_u r5, r6, 5 ; slt r15, r16, r17 ; sw r25, r26 } + db68: [0-9a-f]* { slti_u r5, r6, 5 ; slte r15, r16, r17 ; sb r25, r26 } + db70: [0-9a-f]* { slti_u r5, r6, 5 ; slti r15, r16, 5 ; lb r25, r26 } + db78: [0-9a-f]* { slti_u r5, r6, 5 ; sltib r15, r16, 5 } + db80: [0-9a-f]* { slti_u r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 } + db88: [0-9a-f]* { slti_u r5, r6, 5 ; sub r15, r16, r17 ; lb r25, r26 } + db90: [0-9a-f]* { slti_u r5, r6, 5 ; sw r25, r26 } + db98: [0-9a-f]* { slti_u r5, r6, 5 ; shr r15, r16, r17 ; sw r25, r26 } + dba0: [0-9a-f]* { slti_u r5, r6, 5 ; xor r15, r16, r17 ; lh_u r25, r26 } + dba8: [0-9a-f]* { adiffh r5, r6, r7 ; sltib r15, r16, 5 } + dbb0: [0-9a-f]* { sltib r15, r16, 5 ; maxb_u r5, r6, r7 } + dbb8: [0-9a-f]* { mulhha_su r5, r6, r7 ; sltib r15, r16, 5 } + dbc0: [0-9a-f]* { mvz r5, r6, r7 ; sltib r15, r16, 5 } + dbc8: [0-9a-f]* { sadah_u r5, r6, r7 ; sltib r15, r16, 5 } + dbd0: [0-9a-f]* { sltib r15, r16, 5 ; shrib r5, r6, 5 } + dbd8: [0-9a-f]* { sltib r15, r16, 5 ; sne r5, r6, r7 } + dbe0: [0-9a-f]* { sltib r15, r16, 5 ; xori r5, r6, 5 } + dbe8: [0-9a-f]* { sltib r5, r6, 5 ; ill } + dbf0: [0-9a-f]* { sltib r5, r6, 5 ; lhadd_u r15, r16, 5 } + dbf8: [0-9a-f]* { sltib r5, r6, 5 ; move r15, r16 } + dc00: [0-9a-f]* { sltib r5, r6, 5 ; s1a r15, r16, r17 } + dc08: [0-9a-f]* { sltib r5, r6, 5 ; shrb r15, r16, r17 } + dc10: [0-9a-f]* { sltib r5, r6, 5 ; sltib_u r15, r16, 5 } + dc18: [0-9a-f]* { sltib r5, r6, 5 ; tns r15, r16 } + dc20: [0-9a-f]* { avgb_u r5, r6, r7 ; sltib_u r15, r16, 5 } + dc28: [0-9a-f]* { sltib_u r15, r16, 5 ; minb_u r5, r6, r7 } + dc30: [0-9a-f]* { mulhl_su r5, r6, r7 ; sltib_u r15, r16, 5 } + dc38: [0-9a-f]* { sltib_u r15, r16, 5 ; nop } + dc40: [0-9a-f]* { sltib_u r15, r16, 5 ; seq r5, r6, r7 } + dc48: [0-9a-f]* { sltib_u r15, r16, 5 ; sltb r5, r6, r7 } + dc50: [0-9a-f]* { sltib_u r15, r16, 5 ; srab r5, r6, r7 } + dc58: [0-9a-f]* { sltib_u r5, r6, 5 ; addh r15, r16, r17 } + dc60: [0-9a-f]* { sltib_u r5, r6, 5 ; inthh r15, r16, r17 } + dc68: [0-9a-f]* { sltib_u r5, r6, 5 ; lwadd r15, r16, 5 } + dc70: [0-9a-f]* { sltib_u r5, r6, 5 ; mtspr 5, r16 } + dc78: [0-9a-f]* { sltib_u r5, r6, 5 ; sbadd r15, r16, 5 } + dc80: [0-9a-f]* { sltib_u r5, r6, 5 ; shrih r15, r16, 5 } + dc88: [0-9a-f]* { sltib_u r5, r6, 5 ; sneb r15, r16, r17 } + dc90: [0-9a-f]* { sltih r15, r16, 5 ; add r5, r6, r7 } + dc98: [0-9a-f]* { clz r5, r6 ; sltih r15, r16, 5 } + dca0: [0-9a-f]* { sltih r15, r16, 5 ; mm r5, r6, r7, 5, 7 } + dca8: [0-9a-f]* { mulhla_su r5, r6, r7 ; sltih r15, r16, 5 } + dcb0: [0-9a-f]* { sltih r15, r16, 5 ; packbs_u r5, r6, r7 } + dcb8: [0-9a-f]* { sltih r15, r16, 5 ; seqib r5, r6, 5 } + dcc0: [0-9a-f]* { sltih r15, r16, 5 ; slteb r5, r6, r7 } + dcc8: [0-9a-f]* { sltih r15, r16, 5 ; sraih r5, r6, 5 } + dcd0: [0-9a-f]* { sltih r5, r6, 5 ; addih r15, r16, 5 } + dcd8: [0-9a-f]* { sltih r5, r6, 5 ; iret } + dce0: [0-9a-f]* { sltih r5, r6, 5 ; maxib_u r15, r16, 5 } + dce8: [0-9a-f]* { sltih r5, r6, 5 ; nop } + dcf0: [0-9a-f]* { sltih r5, r6, 5 ; seqi r15, r16, 5 } + dcf8: [0-9a-f]* { sltih r5, r6, 5 ; sltb_u r15, r16, r17 } + dd00: [0-9a-f]* { sltih r5, r6, 5 ; srah r15, r16, r17 } + dd08: [0-9a-f]* { sltih_u r15, r16, 5 ; addhs r5, r6, r7 } + dd10: [0-9a-f]* { dword_align r5, r6, r7 ; sltih_u r15, r16, 5 } + dd18: [0-9a-f]* { sltih_u r15, r16, 5 ; move r5, r6 } + dd20: [0-9a-f]* { mulll_ss r5, r6, r7 ; sltih_u r15, r16, 5 } + dd28: [0-9a-f]* { pcnt r5, r6 ; sltih_u r15, r16, 5 } + dd30: [0-9a-f]* { sltih_u r15, r16, 5 ; shlh r5, r6, r7 } + dd38: [0-9a-f]* { sltih_u r15, r16, 5 ; slth r5, r6, r7 } + dd40: [0-9a-f]* { sltih_u r15, r16, 5 ; subh r5, r6, r7 } + dd48: [0-9a-f]* { sltih_u r5, r6, 5 ; and r15, r16, r17 } + dd50: [0-9a-f]* { sltih_u r5, r6, 5 ; jrp r15 } + dd58: [0-9a-f]* { sltih_u r5, r6, 5 ; minb_u r15, r16, r17 } + dd60: [0-9a-f]* { sltih_u r5, r6, 5 ; packbs_u r15, r16, r17 } + dd68: [0-9a-f]* { sltih_u r5, r6, 5 ; shadd r15, r16, 5 } + dd70: [0-9a-f]* { sltih_u r5, r6, 5 ; slteb_u r15, r16, r17 } + dd78: [0-9a-f]* { sltih_u r5, r6, 5 ; sub r15, r16, r17 } + dd80: [0-9a-f]* { sne r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + dd88: [0-9a-f]* { sne r15, r16, r17 ; adds r5, r6, r7 } + dd90: [0-9a-f]* { sne r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + dd98: [0-9a-f]* { bytex r5, r6 ; sne r15, r16, r17 ; lw r25, r26 } + dda0: [0-9a-f]* { ctz r5, r6 ; sne r15, r16, r17 ; lh r25, r26 } + dda8: [0-9a-f]* { sne r15, r16, r17 ; info 19 ; lb_u r25, r26 } + ddb0: [0-9a-f]* { clz r5, r6 ; sne r15, r16, r17 ; lb r25, r26 } + ddb8: [0-9a-f]* { sne r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 } + ddc0: [0-9a-f]* { sne r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 } + ddc8: [0-9a-f]* { sne r15, r16, r17 ; info 19 ; lb_u r25, r26 } + ddd0: [0-9a-f]* { pcnt r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 } + ddd8: [0-9a-f]* { sne r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + dde0: [0-9a-f]* { sne r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + dde8: [0-9a-f]* { sne r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + ddf0: [0-9a-f]* { tblidxb1 r5, r6 ; sne r15, r16, r17 ; lh r25, r26 } + ddf8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 } + de00: [0-9a-f]* { sne r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 } + de08: [0-9a-f]* { sne r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 } + de10: [0-9a-f]* { mulll_ss r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + de18: [0-9a-f]* { sne r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 } + de20: [0-9a-f]* { sne r15, r16, r17 ; maxh r5, r6, r7 } + de28: [0-9a-f]* { sne r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + de30: [0-9a-f]* { sne r15, r16, r17 ; moveli r5, 4660 } + de38: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 } + de40: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 } + de48: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 } + de50: [0-9a-f]* { mulll_uu r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 } + de58: [0-9a-f]* { mullla_uu r5, r6, r7 ; sne r15, r16, r17 ; prefetch r25 } + de60: [0-9a-f]* { mvz r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + de68: [0-9a-f]* { sne r15, r16, r17 ; nop ; lh r25, r26 } + de70: [0-9a-f]* { sne r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + de78: [0-9a-f]* { sne r15, r16, r17 ; packhs r5, r6, r7 } + de80: [0-9a-f]* { sne r15, r16, r17 ; prefetch r25 } + de88: [0-9a-f]* { sne r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 } + de90: [0-9a-f]* { sne r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + de98: [0-9a-f]* { sne r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + dea0: [0-9a-f]* { sne r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + dea8: [0-9a-f]* { sadah r5, r6, r7 ; sne r15, r16, r17 } + deb0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 } + deb8: [0-9a-f]* { sne r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 } + dec0: [0-9a-f]* { sne r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 } + dec8: [0-9a-f]* { sne r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + ded0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 } + ded8: [0-9a-f]* { sne r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 } + dee0: [0-9a-f]* { tblidxb3 r5, r6 ; sne r15, r16, r17 ; sh r25, r26 } + dee8: [0-9a-f]* { sne r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + def0: [0-9a-f]* { sne r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + def8: [0-9a-f]* { sne r15, r16, r17 ; slt r5, r6, r7 } + df00: [0-9a-f]* { sne r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + df08: [0-9a-f]* { sne r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + df10: [0-9a-f]* { sne r15, r16, r17 ; sltib_u r5, r6, 5 } + df18: [0-9a-f]* { sne r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + df20: [0-9a-f]* { sne r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + df28: [0-9a-f]* { clz r5, r6 ; sne r15, r16, r17 ; sw r25, r26 } + df30: [0-9a-f]* { sne r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 } + df38: [0-9a-f]* { sne r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 } + df40: [0-9a-f]* { tblidxb0 r5, r6 ; sne r15, r16, r17 } + df48: [0-9a-f]* { tblidxb2 r5, r6 ; sne r15, r16, r17 } + df50: [0-9a-f]* { sne r15, r16, r17 ; xor r5, r6, r7 } + df58: [0-9a-f]* { sne r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + df60: [0-9a-f]* { sne r5, r6, r7 ; and r15, r16, r17 } + df68: [0-9a-f]* { sne r5, r6, r7 ; prefetch r25 } + df70: [0-9a-f]* { sne r5, r6, r7 ; info 19 ; lw r25, r26 } + df78: [0-9a-f]* { sne r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + df80: [0-9a-f]* { sne r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + df88: [0-9a-f]* { sne r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 } + df90: [0-9a-f]* { sne r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 } + df98: [0-9a-f]* { sne r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + dfa0: [0-9a-f]* { sne r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 } + dfa8: [0-9a-f]* { sne r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + dfb0: [0-9a-f]* { sne r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + dfb8: [0-9a-f]* { sne r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + dfc0: [0-9a-f]* { sne r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + dfc8: [0-9a-f]* { sne r5, r6, r7 ; maxb_u r15, r16, r17 } + dfd0: [0-9a-f]* { sne r5, r6, r7 ; mnz r15, r16, r17 } + dfd8: [0-9a-f]* { sne r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + dfe0: [0-9a-f]* { sne r5, r6, r7 ; nop ; lh r25, r26 } + dfe8: [0-9a-f]* { sne r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + dff0: [0-9a-f]* { sne r5, r6, r7 ; packhs r15, r16, r17 } + dff8: [0-9a-f]* { sne r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 } + e000: [0-9a-f]* { sne r5, r6, r7 ; prefetch r25 } + e008: [0-9a-f]* { sne r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + e010: [0-9a-f]* { sne r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + e018: [0-9a-f]* { sne r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + e020: [0-9a-f]* { sne r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + e028: [0-9a-f]* { sne r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + e030: [0-9a-f]* { sne r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + e038: [0-9a-f]* { sne r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + e040: [0-9a-f]* { sne r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + e048: [0-9a-f]* { sne r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + e050: [0-9a-f]* { sne r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + e058: [0-9a-f]* { sne r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + e060: [0-9a-f]* { sne r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + e068: [0-9a-f]* { sne r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + e070: [0-9a-f]* { sne r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + e078: [0-9a-f]* { sne r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + e080: [0-9a-f]* { sne r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + e088: [0-9a-f]* { sne r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + e090: [0-9a-f]* { sne r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + e098: [0-9a-f]* { sneb r15, r16, r17 ; add r5, r6, r7 } + e0a0: [0-9a-f]* { clz r5, r6 ; sneb r15, r16, r17 } + e0a8: [0-9a-f]* { sneb r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + e0b0: [0-9a-f]* { mulhla_su r5, r6, r7 ; sneb r15, r16, r17 } + e0b8: [0-9a-f]* { sneb r15, r16, r17 ; packbs_u r5, r6, r7 } + e0c0: [0-9a-f]* { sneb r15, r16, r17 ; seqib r5, r6, 5 } + e0c8: [0-9a-f]* { sneb r15, r16, r17 ; slteb r5, r6, r7 } + e0d0: [0-9a-f]* { sneb r15, r16, r17 ; sraih r5, r6, 5 } + e0d8: [0-9a-f]* { sneb r5, r6, r7 ; addih r15, r16, 5 } + e0e0: [0-9a-f]* { sneb r5, r6, r7 ; iret } + e0e8: [0-9a-f]* { sneb r5, r6, r7 ; maxib_u r15, r16, 5 } + e0f0: [0-9a-f]* { sneb r5, r6, r7 ; nop } + e0f8: [0-9a-f]* { sneb r5, r6, r7 ; seqi r15, r16, 5 } + e100: [0-9a-f]* { sneb r5, r6, r7 ; sltb_u r15, r16, r17 } + e108: [0-9a-f]* { sneb r5, r6, r7 ; srah r15, r16, r17 } + e110: [0-9a-f]* { sneh r15, r16, r17 ; addhs r5, r6, r7 } + e118: [0-9a-f]* { dword_align r5, r6, r7 ; sneh r15, r16, r17 } + e120: [0-9a-f]* { sneh r15, r16, r17 ; move r5, r6 } + e128: [0-9a-f]* { mulll_ss r5, r6, r7 ; sneh r15, r16, r17 } + e130: [0-9a-f]* { pcnt r5, r6 ; sneh r15, r16, r17 } + e138: [0-9a-f]* { sneh r15, r16, r17 ; shlh r5, r6, r7 } + e140: [0-9a-f]* { sneh r15, r16, r17 ; slth r5, r6, r7 } + e148: [0-9a-f]* { sneh r15, r16, r17 ; subh r5, r6, r7 } + e150: [0-9a-f]* { sneh r5, r6, r7 ; and r15, r16, r17 } + e158: [0-9a-f]* { sneh r5, r6, r7 ; jrp r15 } + e160: [0-9a-f]* { sneh r5, r6, r7 ; minb_u r15, r16, r17 } + e168: [0-9a-f]* { sneh r5, r6, r7 ; packbs_u r15, r16, r17 } + e170: [0-9a-f]* { sneh r5, r6, r7 ; shadd r15, r16, 5 } + e178: [0-9a-f]* { sneh r5, r6, r7 ; slteb_u r15, r16, r17 } + e180: [0-9a-f]* { sneh r5, r6, r7 ; sub r15, r16, r17 } + e188: [0-9a-f]* { sra r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + e190: [0-9a-f]* { sra r15, r16, r17 ; adds r5, r6, r7 } + e198: [0-9a-f]* { sra r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + e1a0: [0-9a-f]* { bytex r5, r6 ; sra r15, r16, r17 ; lw r25, r26 } + e1a8: [0-9a-f]* { ctz r5, r6 ; sra r15, r16, r17 ; lh r25, r26 } + e1b0: [0-9a-f]* { sra r15, r16, r17 ; info 19 ; lb_u r25, r26 } + e1b8: [0-9a-f]* { clz r5, r6 ; sra r15, r16, r17 ; lb r25, r26 } + e1c0: [0-9a-f]* { sra r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 } + e1c8: [0-9a-f]* { sra r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 } + e1d0: [0-9a-f]* { sra r15, r16, r17 ; info 19 ; lb_u r25, r26 } + e1d8: [0-9a-f]* { pcnt r5, r6 ; sra r15, r16, r17 ; lb_u r25, r26 } + e1e0: [0-9a-f]* { sra r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + e1e8: [0-9a-f]* { sra r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + e1f0: [0-9a-f]* { sra r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + e1f8: [0-9a-f]* { tblidxb1 r5, r6 ; sra r15, r16, r17 ; lh r25, r26 } + e200: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sra r15, r16, r17 ; lh_u r25, r26 } + e208: [0-9a-f]* { sra r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 } + e210: [0-9a-f]* { sra r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 } + e218: [0-9a-f]* { mulll_ss r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + e220: [0-9a-f]* { sra r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 } + e228: [0-9a-f]* { sra r15, r16, r17 ; maxh r5, r6, r7 } + e230: [0-9a-f]* { sra r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + e238: [0-9a-f]* { sra r15, r16, r17 ; moveli r5, 4660 } + e240: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 } + e248: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 } + e250: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 } + e258: [0-9a-f]* { mulll_uu r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 } + e260: [0-9a-f]* { mullla_uu r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 } + e268: [0-9a-f]* { mvz r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + e270: [0-9a-f]* { sra r15, r16, r17 ; nop ; lh r25, r26 } + e278: [0-9a-f]* { sra r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + e280: [0-9a-f]* { sra r15, r16, r17 ; packhs r5, r6, r7 } + e288: [0-9a-f]* { sra r15, r16, r17 ; prefetch r25 } + e290: [0-9a-f]* { sra r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 } + e298: [0-9a-f]* { sra r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + e2a0: [0-9a-f]* { sra r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + e2a8: [0-9a-f]* { sra r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + e2b0: [0-9a-f]* { sadah r5, r6, r7 ; sra r15, r16, r17 } + e2b8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 } + e2c0: [0-9a-f]* { sra r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 } + e2c8: [0-9a-f]* { sra r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 } + e2d0: [0-9a-f]* { sra r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + e2d8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 } + e2e0: [0-9a-f]* { sra r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 } + e2e8: [0-9a-f]* { tblidxb3 r5, r6 ; sra r15, r16, r17 ; sh r25, r26 } + e2f0: [0-9a-f]* { sra r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + e2f8: [0-9a-f]* { sra r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + e300: [0-9a-f]* { sra r15, r16, r17 ; slt r5, r6, r7 } + e308: [0-9a-f]* { sra r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + e310: [0-9a-f]* { sra r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + e318: [0-9a-f]* { sra r15, r16, r17 ; sltib_u r5, r6, 5 } + e320: [0-9a-f]* { sra r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + e328: [0-9a-f]* { sra r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + e330: [0-9a-f]* { clz r5, r6 ; sra r15, r16, r17 ; sw r25, r26 } + e338: [0-9a-f]* { sra r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 } + e340: [0-9a-f]* { sra r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 } + e348: [0-9a-f]* { tblidxb0 r5, r6 ; sra r15, r16, r17 } + e350: [0-9a-f]* { tblidxb2 r5, r6 ; sra r15, r16, r17 } + e358: [0-9a-f]* { sra r15, r16, r17 ; xor r5, r6, r7 } + e360: [0-9a-f]* { sra r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + e368: [0-9a-f]* { sra r5, r6, r7 ; and r15, r16, r17 } + e370: [0-9a-f]* { sra r5, r6, r7 ; prefetch r25 } + e378: [0-9a-f]* { sra r5, r6, r7 ; info 19 ; lw r25, r26 } + e380: [0-9a-f]* { sra r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + e388: [0-9a-f]* { sra r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + e390: [0-9a-f]* { sra r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 } + e398: [0-9a-f]* { sra r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 } + e3a0: [0-9a-f]* { sra r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + e3a8: [0-9a-f]* { sra r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 } + e3b0: [0-9a-f]* { sra r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + e3b8: [0-9a-f]* { sra r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + e3c0: [0-9a-f]* { sra r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + e3c8: [0-9a-f]* { sra r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + e3d0: [0-9a-f]* { sra r5, r6, r7 ; maxb_u r15, r16, r17 } + e3d8: [0-9a-f]* { sra r5, r6, r7 ; mnz r15, r16, r17 } + e3e0: [0-9a-f]* { sra r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + e3e8: [0-9a-f]* { sra r5, r6, r7 ; nop ; lh r25, r26 } + e3f0: [0-9a-f]* { sra r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + e3f8: [0-9a-f]* { sra r5, r6, r7 ; packhs r15, r16, r17 } + e400: [0-9a-f]* { sra r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 } + e408: [0-9a-f]* { sra r5, r6, r7 ; prefetch r25 } + e410: [0-9a-f]* { sra r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + e418: [0-9a-f]* { sra r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + e420: [0-9a-f]* { sra r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + e428: [0-9a-f]* { sra r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + e430: [0-9a-f]* { sra r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + e438: [0-9a-f]* { sra r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + e440: [0-9a-f]* { sra r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + e448: [0-9a-f]* { sra r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + e450: [0-9a-f]* { sra r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + e458: [0-9a-f]* { sra r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + e460: [0-9a-f]* { sra r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + e468: [0-9a-f]* { sra r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + e470: [0-9a-f]* { sra r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + e478: [0-9a-f]* { sra r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + e480: [0-9a-f]* { sra r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + e488: [0-9a-f]* { sra r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + e490: [0-9a-f]* { sra r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + e498: [0-9a-f]* { sra r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + e4a0: [0-9a-f]* { srab r15, r16, r17 ; add r5, r6, r7 } + e4a8: [0-9a-f]* { clz r5, r6 ; srab r15, r16, r17 } + e4b0: [0-9a-f]* { srab r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + e4b8: [0-9a-f]* { mulhla_su r5, r6, r7 ; srab r15, r16, r17 } + e4c0: [0-9a-f]* { srab r15, r16, r17 ; packbs_u r5, r6, r7 } + e4c8: [0-9a-f]* { srab r15, r16, r17 ; seqib r5, r6, 5 } + e4d0: [0-9a-f]* { srab r15, r16, r17 ; slteb r5, r6, r7 } + e4d8: [0-9a-f]* { srab r15, r16, r17 ; sraih r5, r6, 5 } + e4e0: [0-9a-f]* { srab r5, r6, r7 ; addih r15, r16, 5 } + e4e8: [0-9a-f]* { srab r5, r6, r7 ; iret } + e4f0: [0-9a-f]* { srab r5, r6, r7 ; maxib_u r15, r16, 5 } + e4f8: [0-9a-f]* { srab r5, r6, r7 ; nop } + e500: [0-9a-f]* { srab r5, r6, r7 ; seqi r15, r16, 5 } + e508: [0-9a-f]* { srab r5, r6, r7 ; sltb_u r15, r16, r17 } + e510: [0-9a-f]* { srab r5, r6, r7 ; srah r15, r16, r17 } + e518: [0-9a-f]* { srah r15, r16, r17 ; addhs r5, r6, r7 } + e520: [0-9a-f]* { dword_align r5, r6, r7 ; srah r15, r16, r17 } + e528: [0-9a-f]* { srah r15, r16, r17 ; move r5, r6 } + e530: [0-9a-f]* { mulll_ss r5, r6, r7 ; srah r15, r16, r17 } + e538: [0-9a-f]* { pcnt r5, r6 ; srah r15, r16, r17 } + e540: [0-9a-f]* { srah r15, r16, r17 ; shlh r5, r6, r7 } + e548: [0-9a-f]* { srah r15, r16, r17 ; slth r5, r6, r7 } + e550: [0-9a-f]* { srah r15, r16, r17 ; subh r5, r6, r7 } + e558: [0-9a-f]* { srah r5, r6, r7 ; and r15, r16, r17 } + e560: [0-9a-f]* { srah r5, r6, r7 ; jrp r15 } + e568: [0-9a-f]* { srah r5, r6, r7 ; minb_u r15, r16, r17 } + e570: [0-9a-f]* { srah r5, r6, r7 ; packbs_u r15, r16, r17 } + e578: [0-9a-f]* { srah r5, r6, r7 ; shadd r15, r16, 5 } + e580: [0-9a-f]* { srah r5, r6, r7 ; slteb_u r15, r16, r17 } + e588: [0-9a-f]* { srah r5, r6, r7 ; sub r15, r16, r17 } + e590: [0-9a-f]* { srai r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 } + e598: [0-9a-f]* { srai r15, r16, 5 ; adds r5, r6, r7 } + e5a0: [0-9a-f]* { srai r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 } + e5a8: [0-9a-f]* { bytex r5, r6 ; srai r15, r16, 5 ; lw r25, r26 } + e5b0: [0-9a-f]* { ctz r5, r6 ; srai r15, r16, 5 ; lh r25, r26 } + e5b8: [0-9a-f]* { srai r15, r16, 5 ; info 19 ; lb_u r25, r26 } + e5c0: [0-9a-f]* { clz r5, r6 ; srai r15, r16, 5 ; lb r25, r26 } + e5c8: [0-9a-f]* { srai r15, r16, 5 ; nor r5, r6, r7 ; lb r25, r26 } + e5d0: [0-9a-f]* { srai r15, r16, 5 ; slti_u r5, r6, 5 ; lb r25, r26 } + e5d8: [0-9a-f]* { srai r15, r16, 5 ; info 19 ; lb_u r25, r26 } + e5e0: [0-9a-f]* { pcnt r5, r6 ; srai r15, r16, 5 ; lb_u r25, r26 } + e5e8: [0-9a-f]* { srai r15, r16, 5 ; srai r5, r6, 5 ; lb_u r25, r26 } + e5f0: [0-9a-f]* { srai r15, r16, 5 ; movei r5, 5 ; lh r25, r26 } + e5f8: [0-9a-f]* { srai r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 } + e600: [0-9a-f]* { tblidxb1 r5, r6 ; srai r15, r16, 5 ; lh r25, r26 } + e608: [0-9a-f]* { mulhha_ss r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 } + e610: [0-9a-f]* { srai r15, r16, 5 ; seq r5, r6, r7 ; lh_u r25, r26 } + e618: [0-9a-f]* { srai r15, r16, 5 ; xor r5, r6, r7 ; lh_u r25, r26 } + e620: [0-9a-f]* { mulll_ss r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 } + e628: [0-9a-f]* { srai r15, r16, 5 ; shli r5, r6, 5 ; lw r25, r26 } + e630: [0-9a-f]* { srai r15, r16, 5 ; maxh r5, r6, r7 } + e638: [0-9a-f]* { srai r15, r16, 5 ; move r5, r6 ; lb r25, r26 } + e640: [0-9a-f]* { srai r15, r16, 5 ; moveli r5, 4660 } + e648: [0-9a-f]* { mulhh_uu r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 } + e650: [0-9a-f]* { mulhha_uu r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 } + e658: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 } + e660: [0-9a-f]* { mulll_uu r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 } + e668: [0-9a-f]* { mullla_uu r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 } + e670: [0-9a-f]* { mvz r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 } + e678: [0-9a-f]* { srai r15, r16, 5 ; nop ; lh r25, r26 } + e680: [0-9a-f]* { srai r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 } + e688: [0-9a-f]* { srai r15, r16, 5 ; packhs r5, r6, r7 } + e690: [0-9a-f]* { srai r15, r16, 5 ; prefetch r25 } + e698: [0-9a-f]* { srai r15, r16, 5 ; ori r5, r6, 5 ; prefetch r25 } + e6a0: [0-9a-f]* { srai r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + e6a8: [0-9a-f]* { srai r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 } + e6b0: [0-9a-f]* { srai r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 } + e6b8: [0-9a-f]* { sadah r5, r6, r7 ; srai r15, r16, 5 } + e6c0: [0-9a-f]* { mulhha_ss r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 } + e6c8: [0-9a-f]* { srai r15, r16, 5 ; seq r5, r6, r7 ; sb r25, r26 } + e6d0: [0-9a-f]* { srai r15, r16, 5 ; xor r5, r6, r7 ; sb r25, r26 } + e6d8: [0-9a-f]* { srai r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 } + e6e0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 } + e6e8: [0-9a-f]* { srai r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 } + e6f0: [0-9a-f]* { tblidxb3 r5, r6 ; srai r15, r16, 5 ; sh r25, r26 } + e6f8: [0-9a-f]* { srai r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 } + e700: [0-9a-f]* { srai r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 } + e708: [0-9a-f]* { srai r15, r16, 5 ; slt r5, r6, r7 } + e710: [0-9a-f]* { srai r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 } + e718: [0-9a-f]* { srai r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 } + e720: [0-9a-f]* { srai r15, r16, 5 ; sltib_u r5, r6, 5 } + e728: [0-9a-f]* { srai r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + e730: [0-9a-f]* { srai r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 } + e738: [0-9a-f]* { clz r5, r6 ; srai r15, r16, 5 ; sw r25, r26 } + e740: [0-9a-f]* { srai r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 } + e748: [0-9a-f]* { srai r15, r16, 5 ; slti_u r5, r6, 5 ; sw r25, r26 } + e750: [0-9a-f]* { tblidxb0 r5, r6 ; srai r15, r16, 5 } + e758: [0-9a-f]* { tblidxb2 r5, r6 ; srai r15, r16, 5 } + e760: [0-9a-f]* { srai r15, r16, 5 ; xor r5, r6, r7 } + e768: [0-9a-f]* { srai r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + e770: [0-9a-f]* { srai r5, r6, 5 ; and r15, r16, r17 } + e778: [0-9a-f]* { srai r5, r6, 5 ; prefetch r25 } + e780: [0-9a-f]* { srai r5, r6, 5 ; info 19 ; lw r25, r26 } + e788: [0-9a-f]* { srai r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 } + e790: [0-9a-f]* { srai r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 } + e798: [0-9a-f]* { srai r5, r6, 5 ; andi r15, r16, 5 ; lb_u r25, r26 } + e7a0: [0-9a-f]* { srai r5, r6, 5 ; shli r15, r16, 5 ; lb_u r25, r26 } + e7a8: [0-9a-f]* { srai r5, r6, 5 ; and r15, r16, r17 ; lh r25, r26 } + e7b0: [0-9a-f]* { srai r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 } + e7b8: [0-9a-f]* { srai r5, r6, 5 ; andi r15, r16, 5 ; lh_u r25, r26 } + e7c0: [0-9a-f]* { srai r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 } + e7c8: [0-9a-f]* { srai r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + e7d0: [0-9a-f]* { srai r5, r6, 5 ; seqi r15, r16, 5 ; lw r25, r26 } + e7d8: [0-9a-f]* { srai r5, r6, 5 ; maxb_u r15, r16, r17 } + e7e0: [0-9a-f]* { srai r5, r6, 5 ; mnz r15, r16, r17 } + e7e8: [0-9a-f]* { srai r5, r6, 5 ; movei r15, 5 ; sh r25, r26 } + e7f0: [0-9a-f]* { srai r5, r6, 5 ; nop ; lh r25, r26 } + e7f8: [0-9a-f]* { srai r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 } + e800: [0-9a-f]* { srai r5, r6, 5 ; packhs r15, r16, r17 } + e808: [0-9a-f]* { srai r5, r6, 5 ; s1a r15, r16, r17 ; prefetch r25 } + e810: [0-9a-f]* { srai r5, r6, 5 ; prefetch r25 } + e818: [0-9a-f]* { srai r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 } + e820: [0-9a-f]* { srai r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 } + e828: [0-9a-f]* { srai r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 } + e830: [0-9a-f]* { srai r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + e838: [0-9a-f]* { srai r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 } + e840: [0-9a-f]* { srai r5, r6, 5 ; andi r15, r16, 5 ; sh r25, r26 } + e848: [0-9a-f]* { srai r5, r6, 5 ; shli r15, r16, 5 ; sh r25, r26 } + e850: [0-9a-f]* { srai r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 } + e858: [0-9a-f]* { srai r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 } + e860: [0-9a-f]* { srai r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 } + e868: [0-9a-f]* { srai r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + e870: [0-9a-f]* { srai r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 } + e878: [0-9a-f]* { srai r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 } + e880: [0-9a-f]* { srai r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 } + e888: [0-9a-f]* { srai r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 } + e890: [0-9a-f]* { srai r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 } + e898: [0-9a-f]* { srai r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 } + e8a0: [0-9a-f]* { srai r5, r6, 5 ; sne r15, r16, r17 ; sw r25, r26 } + e8a8: [0-9a-f]* { sraib r15, r16, 5 ; add r5, r6, r7 } + e8b0: [0-9a-f]* { clz r5, r6 ; sraib r15, r16, 5 } + e8b8: [0-9a-f]* { sraib r15, r16, 5 ; mm r5, r6, r7, 5, 7 } + e8c0: [0-9a-f]* { mulhla_su r5, r6, r7 ; sraib r15, r16, 5 } + e8c8: [0-9a-f]* { sraib r15, r16, 5 ; packbs_u r5, r6, r7 } + e8d0: [0-9a-f]* { sraib r15, r16, 5 ; seqib r5, r6, 5 } + e8d8: [0-9a-f]* { sraib r15, r16, 5 ; slteb r5, r6, r7 } + e8e0: [0-9a-f]* { sraib r15, r16, 5 ; sraih r5, r6, 5 } + e8e8: [0-9a-f]* { sraib r5, r6, 5 ; addih r15, r16, 5 } + e8f0: [0-9a-f]* { sraib r5, r6, 5 ; iret } + e8f8: [0-9a-f]* { sraib r5, r6, 5 ; maxib_u r15, r16, 5 } + e900: [0-9a-f]* { sraib r5, r6, 5 ; nop } + e908: [0-9a-f]* { sraib r5, r6, 5 ; seqi r15, r16, 5 } + e910: [0-9a-f]* { sraib r5, r6, 5 ; sltb_u r15, r16, r17 } + e918: [0-9a-f]* { sraib r5, r6, 5 ; srah r15, r16, r17 } + e920: [0-9a-f]* { sraih r15, r16, 5 ; addhs r5, r6, r7 } + e928: [0-9a-f]* { dword_align r5, r6, r7 ; sraih r15, r16, 5 } + e930: [0-9a-f]* { sraih r15, r16, 5 ; move r5, r6 } + e938: [0-9a-f]* { mulll_ss r5, r6, r7 ; sraih r15, r16, 5 } + e940: [0-9a-f]* { pcnt r5, r6 ; sraih r15, r16, 5 } + e948: [0-9a-f]* { sraih r15, r16, 5 ; shlh r5, r6, r7 } + e950: [0-9a-f]* { sraih r15, r16, 5 ; slth r5, r6, r7 } + e958: [0-9a-f]* { sraih r15, r16, 5 ; subh r5, r6, r7 } + e960: [0-9a-f]* { sraih r5, r6, 5 ; and r15, r16, r17 } + e968: [0-9a-f]* { sraih r5, r6, 5 ; jrp r15 } + e970: [0-9a-f]* { sraih r5, r6, 5 ; minb_u r15, r16, r17 } + e978: [0-9a-f]* { sraih r5, r6, 5 ; packbs_u r15, r16, r17 } + e980: [0-9a-f]* { sraih r5, r6, 5 ; shadd r15, r16, 5 } + e988: [0-9a-f]* { sraih r5, r6, 5 ; slteb_u r15, r16, r17 } + e990: [0-9a-f]* { sraih r5, r6, 5 ; sub r15, r16, r17 } + e998: [0-9a-f]* { sub r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + e9a0: [0-9a-f]* { sub r15, r16, r17 ; adds r5, r6, r7 } + e9a8: [0-9a-f]* { sub r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + e9b0: [0-9a-f]* { bytex r5, r6 ; sub r15, r16, r17 ; lw r25, r26 } + e9b8: [0-9a-f]* { ctz r5, r6 ; sub r15, r16, r17 ; lh r25, r26 } + e9c0: [0-9a-f]* { sub r15, r16, r17 ; info 19 ; lb_u r25, r26 } + e9c8: [0-9a-f]* { clz r5, r6 ; sub r15, r16, r17 ; lb r25, r26 } + e9d0: [0-9a-f]* { sub r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 } + e9d8: [0-9a-f]* { sub r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 } + e9e0: [0-9a-f]* { sub r15, r16, r17 ; info 19 ; lb_u r25, r26 } + e9e8: [0-9a-f]* { pcnt r5, r6 ; sub r15, r16, r17 ; lb_u r25, r26 } + e9f0: [0-9a-f]* { sub r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + e9f8: [0-9a-f]* { sub r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + ea00: [0-9a-f]* { sub r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + ea08: [0-9a-f]* { tblidxb1 r5, r6 ; sub r15, r16, r17 ; lh r25, r26 } + ea10: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 } + ea18: [0-9a-f]* { sub r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 } + ea20: [0-9a-f]* { sub r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 } + ea28: [0-9a-f]* { mulll_ss r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + ea30: [0-9a-f]* { sub r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 } + ea38: [0-9a-f]* { sub r15, r16, r17 ; maxh r5, r6, r7 } + ea40: [0-9a-f]* { sub r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + ea48: [0-9a-f]* { sub r15, r16, r17 ; moveli r5, 4660 } + ea50: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 } + ea58: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 } + ea60: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 } + ea68: [0-9a-f]* { mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 } + ea70: [0-9a-f]* { mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + ea78: [0-9a-f]* { mvz r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + ea80: [0-9a-f]* { sub r15, r16, r17 ; nop ; lh r25, r26 } + ea88: [0-9a-f]* { sub r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + ea90: [0-9a-f]* { sub r15, r16, r17 ; packhs r5, r6, r7 } + ea98: [0-9a-f]* { sub r15, r16, r17 ; prefetch r25 } + eaa0: [0-9a-f]* { sub r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 } + eaa8: [0-9a-f]* { sub r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + eab0: [0-9a-f]* { sub r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + eab8: [0-9a-f]* { sub r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + eac0: [0-9a-f]* { sadah r5, r6, r7 ; sub r15, r16, r17 } + eac8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 } + ead0: [0-9a-f]* { sub r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 } + ead8: [0-9a-f]* { sub r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 } + eae0: [0-9a-f]* { sub r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + eae8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 } + eaf0: [0-9a-f]* { sub r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 } + eaf8: [0-9a-f]* { tblidxb3 r5, r6 ; sub r15, r16, r17 ; sh r25, r26 } + eb00: [0-9a-f]* { sub r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + eb08: [0-9a-f]* { sub r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + eb10: [0-9a-f]* { sub r15, r16, r17 ; slt r5, r6, r7 } + eb18: [0-9a-f]* { sub r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + eb20: [0-9a-f]* { sub r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + eb28: [0-9a-f]* { sub r15, r16, r17 ; sltib_u r5, r6, 5 } + eb30: [0-9a-f]* { sub r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + eb38: [0-9a-f]* { sub r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + eb40: [0-9a-f]* { clz r5, r6 ; sub r15, r16, r17 ; sw r25, r26 } + eb48: [0-9a-f]* { sub r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 } + eb50: [0-9a-f]* { sub r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 } + eb58: [0-9a-f]* { tblidxb0 r5, r6 ; sub r15, r16, r17 } + eb60: [0-9a-f]* { tblidxb2 r5, r6 ; sub r15, r16, r17 } + eb68: [0-9a-f]* { sub r15, r16, r17 ; xor r5, r6, r7 } + eb70: [0-9a-f]* { sub r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + eb78: [0-9a-f]* { sub r5, r6, r7 ; and r15, r16, r17 } + eb80: [0-9a-f]* { sub r5, r6, r7 ; prefetch r25 } + eb88: [0-9a-f]* { sub r5, r6, r7 ; info 19 ; lw r25, r26 } + eb90: [0-9a-f]* { sub r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + eb98: [0-9a-f]* { sub r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + eba0: [0-9a-f]* { sub r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 } + eba8: [0-9a-f]* { sub r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 } + ebb0: [0-9a-f]* { sub r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + ebb8: [0-9a-f]* { sub r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 } + ebc0: [0-9a-f]* { sub r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + ebc8: [0-9a-f]* { sub r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + ebd0: [0-9a-f]* { sub r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + ebd8: [0-9a-f]* { sub r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + ebe0: [0-9a-f]* { sub r5, r6, r7 ; maxb_u r15, r16, r17 } + ebe8: [0-9a-f]* { sub r5, r6, r7 ; mnz r15, r16, r17 } + ebf0: [0-9a-f]* { sub r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + ebf8: [0-9a-f]* { sub r5, r6, r7 ; nop ; lh r25, r26 } + ec00: [0-9a-f]* { sub r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + ec08: [0-9a-f]* { sub r5, r6, r7 ; packhs r15, r16, r17 } + ec10: [0-9a-f]* { sub r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 } + ec18: [0-9a-f]* { sub r5, r6, r7 ; prefetch r25 } + ec20: [0-9a-f]* { sub r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + ec28: [0-9a-f]* { sub r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + ec30: [0-9a-f]* { sub r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + ec38: [0-9a-f]* { sub r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + ec40: [0-9a-f]* { sub r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + ec48: [0-9a-f]* { sub r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + ec50: [0-9a-f]* { sub r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + ec58: [0-9a-f]* { sub r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + ec60: [0-9a-f]* { sub r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + ec68: [0-9a-f]* { sub r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + ec70: [0-9a-f]* { sub r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + ec78: [0-9a-f]* { sub r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + ec80: [0-9a-f]* { sub r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + ec88: [0-9a-f]* { sub r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + ec90: [0-9a-f]* { sub r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + ec98: [0-9a-f]* { sub r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + eca0: [0-9a-f]* { sub r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + eca8: [0-9a-f]* { sub r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + ecb0: [0-9a-f]* { subb r15, r16, r17 ; add r5, r6, r7 } + ecb8: [0-9a-f]* { clz r5, r6 ; subb r15, r16, r17 } + ecc0: [0-9a-f]* { subb r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + ecc8: [0-9a-f]* { mulhla_su r5, r6, r7 ; subb r15, r16, r17 } + ecd0: [0-9a-f]* { subb r15, r16, r17 ; packbs_u r5, r6, r7 } + ecd8: [0-9a-f]* { subb r15, r16, r17 ; seqib r5, r6, 5 } + ece0: [0-9a-f]* { subb r15, r16, r17 ; slteb r5, r6, r7 } + ece8: [0-9a-f]* { subb r15, r16, r17 ; sraih r5, r6, 5 } + ecf0: [0-9a-f]* { subb r5, r6, r7 ; addih r15, r16, 5 } + ecf8: [0-9a-f]* { subb r5, r6, r7 ; iret } + ed00: [0-9a-f]* { subb r5, r6, r7 ; maxib_u r15, r16, 5 } + ed08: [0-9a-f]* { subb r5, r6, r7 ; nop } + ed10: [0-9a-f]* { subb r5, r6, r7 ; seqi r15, r16, 5 } + ed18: [0-9a-f]* { subb r5, r6, r7 ; sltb_u r15, r16, r17 } + ed20: [0-9a-f]* { subb r5, r6, r7 ; srah r15, r16, r17 } + ed28: [0-9a-f]* { subbs_u r15, r16, r17 ; addhs r5, r6, r7 } + ed30: [0-9a-f]* { dword_align r5, r6, r7 ; subbs_u r15, r16, r17 } + ed38: [0-9a-f]* { subbs_u r15, r16, r17 ; move r5, r6 } + ed40: [0-9a-f]* { mulll_ss r5, r6, r7 ; subbs_u r15, r16, r17 } + ed48: [0-9a-f]* { pcnt r5, r6 ; subbs_u r15, r16, r17 } + ed50: [0-9a-f]* { subbs_u r15, r16, r17 ; shlh r5, r6, r7 } + ed58: [0-9a-f]* { subbs_u r15, r16, r17 ; slth r5, r6, r7 } + ed60: [0-9a-f]* { subbs_u r15, r16, r17 ; subh r5, r6, r7 } + ed68: [0-9a-f]* { subbs_u r5, r6, r7 ; and r15, r16, r17 } + ed70: [0-9a-f]* { subbs_u r5, r6, r7 ; jrp r15 } + ed78: [0-9a-f]* { subbs_u r5, r6, r7 ; minb_u r15, r16, r17 } + ed80: [0-9a-f]* { subbs_u r5, r6, r7 ; packbs_u r15, r16, r17 } + ed88: [0-9a-f]* { subbs_u r5, r6, r7 ; shadd r15, r16, 5 } + ed90: [0-9a-f]* { subbs_u r5, r6, r7 ; slteb_u r15, r16, r17 } + ed98: [0-9a-f]* { subbs_u r5, r6, r7 ; sub r15, r16, r17 } + eda0: [0-9a-f]* { subh r15, r16, r17 ; addli r5, r6, 4660 } + eda8: [0-9a-f]* { subh r15, r16, r17 ; inthb r5, r6, r7 } + edb0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; subh r15, r16, r17 } + edb8: [0-9a-f]* { mullla_su r5, r6, r7 ; subh r15, r16, r17 } + edc0: [0-9a-f]* { subh r15, r16, r17 ; s2a r5, r6, r7 } + edc8: [0-9a-f]* { subh r15, r16, r17 ; shr r5, r6, r7 } + edd0: [0-9a-f]* { subh r15, r16, r17 ; sltib r5, r6, 5 } + edd8: [0-9a-f]* { tblidxb1 r5, r6 ; subh r15, r16, r17 } + ede0: [0-9a-f]* { subh r5, r6, r7 ; finv r15 } + ede8: [0-9a-f]* { subh r5, r6, r7 ; lbadd_u r15, r16, 5 } + edf0: [0-9a-f]* { subh r5, r6, r7 ; mm r15, r16, r17, 5, 7 } + edf8: [0-9a-f]* { subh r5, r6, r7 ; prefetch r15 } + ee00: [0-9a-f]* { subh r5, r6, r7 ; shli r15, r16, 5 } + ee08: [0-9a-f]* { subh r5, r6, r7 ; slth_u r15, r16, r17 } + ee10: [0-9a-f]* { subh r5, r6, r7 ; subhs r15, r16, r17 } + ee18: [0-9a-f]* { adiffh r5, r6, r7 ; subhs r15, r16, r17 } + ee20: [0-9a-f]* { subhs r15, r16, r17 ; maxb_u r5, r6, r7 } + ee28: [0-9a-f]* { mulhha_su r5, r6, r7 ; subhs r15, r16, r17 } + ee30: [0-9a-f]* { mvz r5, r6, r7 ; subhs r15, r16, r17 } + ee38: [0-9a-f]* { sadah_u r5, r6, r7 ; subhs r15, r16, r17 } + ee40: [0-9a-f]* { subhs r15, r16, r17 ; shrib r5, r6, 5 } + ee48: [0-9a-f]* { subhs r15, r16, r17 ; sne r5, r6, r7 } + ee50: [0-9a-f]* { subhs r15, r16, r17 ; xori r5, r6, 5 } + ee58: [0-9a-f]* { subhs r5, r6, r7 ; ill } + ee60: [0-9a-f]* { subhs r5, r6, r7 ; lhadd_u r15, r16, 5 } + ee68: [0-9a-f]* { subhs r5, r6, r7 ; move r15, r16 } + ee70: [0-9a-f]* { subhs r5, r6, r7 ; s1a r15, r16, r17 } + ee78: [0-9a-f]* { subhs r5, r6, r7 ; shrb r15, r16, r17 } + ee80: [0-9a-f]* { subhs r5, r6, r7 ; sltib_u r15, r16, 5 } + ee88: [0-9a-f]* { subhs r5, r6, r7 ; tns r15, r16 } + ee90: [0-9a-f]* { avgb_u r5, r6, r7 ; subs r15, r16, r17 } + ee98: [0-9a-f]* { subs r15, r16, r17 ; minb_u r5, r6, r7 } + eea0: [0-9a-f]* { mulhl_su r5, r6, r7 ; subs r15, r16, r17 } + eea8: [0-9a-f]* { subs r15, r16, r17 ; nop } + eeb0: [0-9a-f]* { subs r15, r16, r17 ; seq r5, r6, r7 } + eeb8: [0-9a-f]* { subs r15, r16, r17 ; sltb r5, r6, r7 } + eec0: [0-9a-f]* { subs r15, r16, r17 ; srab r5, r6, r7 } + eec8: [0-9a-f]* { subs r5, r6, r7 ; addh r15, r16, r17 } + eed0: [0-9a-f]* { subs r5, r6, r7 ; inthh r15, r16, r17 } + eed8: [0-9a-f]* { subs r5, r6, r7 ; lwadd r15, r16, 5 } + eee0: [0-9a-f]* { subs r5, r6, r7 ; mtspr 5, r16 } + eee8: [0-9a-f]* { subs r5, r6, r7 ; sbadd r15, r16, 5 } + eef0: [0-9a-f]* { subs r5, r6, r7 ; shrih r15, r16, 5 } + eef8: [0-9a-f]* { subs r5, r6, r7 ; sneb r15, r16, r17 } + ef00: [0-9a-f]* { add r5, r6, r7 ; sw r15, r16 } + ef08: [0-9a-f]* { clz r5, r6 ; sw r15, r16 } + ef10: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; sw r15, r16 } + ef18: [0-9a-f]* { mulhla_su r5, r6, r7 ; sw r15, r16 } + ef20: [0-9a-f]* { packbs_u r5, r6, r7 ; sw r15, r16 } + ef28: [0-9a-f]* { seqib r5, r6, 5 ; sw r15, r16 } + ef30: [0-9a-f]* { slteb r5, r6, r7 ; sw r15, r16 } + ef38: [0-9a-f]* { sraih r5, r6, 5 ; sw r15, r16 } + ef40: [0-9a-f]* { ctz r5, r6 ; add r15, r16, r17 ; sw r25, r26 } + ef48: [0-9a-f]* { add r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 } + ef50: [0-9a-f]* { add r15, r16, r17 ; sne r5, r6, r7 ; sw r25, r26 } + ef58: [0-9a-f]* { add r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 } + ef60: [0-9a-f]* { add r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + ef68: [0-9a-f]* { addi r15, r16, 5 ; movei r5, 5 ; sw r25, r26 } + ef70: [0-9a-f]* { addi r15, r16, 5 ; s1a r5, r6, r7 ; sw r25, r26 } + ef78: [0-9a-f]* { tblidxb1 r5, r6 ; addi r15, r16, 5 ; sw r25, r26 } + ef80: [0-9a-f]* { addi r5, r6, 5 ; rl r15, r16, r17 ; sw r25, r26 } + ef88: [0-9a-f]* { addi r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 } + ef90: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 } + ef98: [0-9a-f]* { and r15, r16, r17 ; shl r5, r6, r7 ; sw r25, r26 } + efa0: [0-9a-f]* { and r5, r6, r7 ; add r15, r16, r17 ; sw r25, r26 } + efa8: [0-9a-f]* { and r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + efb0: [0-9a-f]* { andi r15, r16, 5 ; and r5, r6, r7 ; sw r25, r26 } + efb8: [0-9a-f]* { mvnz r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 } + efc0: [0-9a-f]* { andi r15, r16, 5 ; slt_u r5, r6, r7 ; sw r25, r26 } + efc8: [0-9a-f]* { andi r5, r6, 5 ; ill ; sw r25, r26 } + efd0: [0-9a-f]* { andi r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 } + efd8: [0-9a-f]* { bitx r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 } + efe0: [0-9a-f]* { bitx r5, r6 ; slt_u r15, r16, r17 ; sw r25, r26 } + efe8: [0-9a-f]* { bytex r5, r6 ; movei r15, 5 ; sw r25, r26 } + eff0: [0-9a-f]* { bytex r5, r6 ; slte_u r15, r16, r17 ; sw r25, r26 } + eff8: [0-9a-f]* { clz r5, r6 ; nop ; sw r25, r26 } + f000: [0-9a-f]* { clz r5, r6 ; slti_u r15, r16, 5 ; sw r25, r26 } + f008: [0-9a-f]* { ctz r5, r6 ; or r15, r16, r17 ; sw r25, r26 } + f010: [0-9a-f]* { ctz r5, r6 ; sra r15, r16, r17 ; sw r25, r26 } + f018: [0-9a-f]* { mnz r15, r16, r17 ; sw r25, r26 } + f020: [0-9a-f]* { nor r15, r16, r17 ; sw r25, r26 } + f028: [0-9a-f]* { seqi r5, r6, 5 ; sw r25, r26 } + f030: [0-9a-f]* { slti_u r5, r6, 5 ; sw r25, r26 } + f038: [0-9a-f]* { bitx r5, r6 ; ill ; sw r25, r26 } + f040: [0-9a-f]* { mz r5, r6, r7 ; ill ; sw r25, r26 } + f048: [0-9a-f]* { slte_u r5, r6, r7 ; ill ; sw r25, r26 } + f050: [0-9a-f]* { info 19 ; andi r5, r6, 5 ; sw r25, r26 } + f058: [0-9a-f]* { mulll_uu r5, r6, r7 ; info 19 ; sw r25, r26 } + f060: [0-9a-f]* { info 19 ; s1a r5, r6, r7 ; sw r25, r26 } + f068: [0-9a-f]* { info 19 ; slt_u r5, r6, r7 ; sw r25, r26 } + f070: [0-9a-f]* { tblidxb3 r5, r6 ; info 19 ; sw r25, r26 } + f078: [0-9a-f]* { mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 } + f080: [0-9a-f]* { mnz r15, r16, r17 ; seqi r5, r6, 5 ; sw r25, r26 } + f088: [0-9a-f]* { mnz r15, r16, r17 ; sw r25, r26 } + f090: [0-9a-f]* { mnz r5, r6, r7 ; s3a r15, r16, r17 ; sw r25, r26 } + f098: [0-9a-f]* { move r15, r16 ; addi r5, r6, 5 ; sw r25, r26 } + f0a0: [0-9a-f]* { mullla_uu r5, r6, r7 ; move r15, r16 ; sw r25, r26 } + f0a8: [0-9a-f]* { move r15, r16 ; slt r5, r6, r7 ; sw r25, r26 } + f0b0: [0-9a-f]* { move r5, r6 ; sw r25, r26 } + f0b8: [0-9a-f]* { move r5, r6 ; shr r15, r16, r17 ; sw r25, r26 } + f0c0: [0-9a-f]* { clz r5, r6 ; movei r15, 5 ; sw r25, r26 } + f0c8: [0-9a-f]* { movei r15, 5 ; nor r5, r6, r7 ; sw r25, r26 } + f0d0: [0-9a-f]* { movei r15, 5 ; slti_u r5, r6, 5 ; sw r25, r26 } + f0d8: [0-9a-f]* { movei r5, 5 ; movei r15, 5 ; sw r25, r26 } + f0e0: [0-9a-f]* { movei r5, 5 ; slte_u r15, r16, r17 ; sw r25, r26 } + f0e8: [0-9a-f]* { mulhh_ss r5, r6, r7 ; nop ; sw r25, r26 } + f0f0: [0-9a-f]* { mulhh_ss r5, r6, r7 ; slti_u r15, r16, 5 ; sw r25, r26 } + f0f8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 } + f100: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 } + f108: [0-9a-f]* { mulhha_ss r5, r6, r7 ; rl r15, r16, r17 ; sw r25, r26 } + f110: [0-9a-f]* { mulhha_ss r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + f118: [0-9a-f]* { mulhha_uu r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 } + f120: [0-9a-f]* { mulhha_uu r5, r6, r7 ; sw r25, r26 } + f128: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 ; sw r25, r26 } + f130: [0-9a-f]* { mulll_ss r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 } + f138: [0-9a-f]* { mulll_ss r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + f140: [0-9a-f]* { mulll_uu r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 } + f148: [0-9a-f]* { mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 } + f150: [0-9a-f]* { mullla_ss r5, r6, r7 ; ill ; sw r25, r26 } + f158: [0-9a-f]* { mullla_ss r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + f160: [0-9a-f]* { mullla_uu r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 } + f168: [0-9a-f]* { mullla_uu r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 } + f170: [0-9a-f]* { mvnz r5, r6, r7 ; movei r15, 5 ; sw r25, r26 } + f178: [0-9a-f]* { mvnz r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 } + f180: [0-9a-f]* { mvz r5, r6, r7 ; nop ; sw r25, r26 } + f188: [0-9a-f]* { mvz r5, r6, r7 ; slti_u r15, r16, 5 ; sw r25, r26 } + f190: [0-9a-f]* { mulhh_ss r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 } + f198: [0-9a-f]* { mz r15, r16, r17 ; s2a r5, r6, r7 ; sw r25, r26 } + f1a0: [0-9a-f]* { tblidxb2 r5, r6 ; mz r15, r16, r17 ; sw r25, r26 } + f1a8: [0-9a-f]* { mz r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + f1b0: [0-9a-f]* { mz r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 } + f1b8: [0-9a-f]* { nop ; move r5, r6 ; sw r25, r26 } + f1c0: [0-9a-f]* { nop ; or r5, r6, r7 ; sw r25, r26 } + f1c8: [0-9a-f]* { nop ; shli r15, r16, 5 ; sw r25, r26 } + f1d0: [0-9a-f]* { nop ; sra r15, r16, r17 ; sw r25, r26 } + f1d8: [0-9a-f]* { ctz r5, r6 ; nor r15, r16, r17 ; sw r25, r26 } + f1e0: [0-9a-f]* { nor r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 } + f1e8: [0-9a-f]* { nor r15, r16, r17 ; sne r5, r6, r7 ; sw r25, r26 } + f1f0: [0-9a-f]* { nor r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 } + f1f8: [0-9a-f]* { nor r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + f200: [0-9a-f]* { or r15, r16, r17 ; movei r5, 5 ; sw r25, r26 } + f208: [0-9a-f]* { or r15, r16, r17 ; s1a r5, r6, r7 ; sw r25, r26 } + f210: [0-9a-f]* { tblidxb1 r5, r6 ; or r15, r16, r17 ; sw r25, r26 } + f218: [0-9a-f]* { or r5, r6, r7 ; rl r15, r16, r17 ; sw r25, r26 } + f220: [0-9a-f]* { or r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + f228: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 } + f230: [0-9a-f]* { ori r15, r16, 5 ; shl r5, r6, r7 ; sw r25, r26 } + f238: [0-9a-f]* { ori r5, r6, 5 ; add r15, r16, r17 ; sw r25, r26 } + f240: [0-9a-f]* { ori r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 } + f248: [0-9a-f]* { pcnt r5, r6 ; and r15, r16, r17 ; sw r25, r26 } + f250: [0-9a-f]* { pcnt r5, r6 ; shl r15, r16, r17 ; sw r25, r26 } + f258: [0-9a-f]* { bitx r5, r6 ; rl r15, r16, r17 ; sw r25, r26 } + f260: [0-9a-f]* { rl r15, r16, r17 ; mz r5, r6, r7 ; sw r25, r26 } + f268: [0-9a-f]* { rl r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 } + f270: [0-9a-f]* { rl r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 } + f278: [0-9a-f]* { rl r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 } + f280: [0-9a-f]* { rli r15, r16, 5 ; info 19 ; sw r25, r26 } + f288: [0-9a-f]* { pcnt r5, r6 ; rli r15, r16, 5 ; sw r25, r26 } + f290: [0-9a-f]* { rli r15, r16, 5 ; srai r5, r6, 5 ; sw r25, r26 } + f298: [0-9a-f]* { rli r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 } + f2a0: [0-9a-f]* { rli r5, r6, 5 ; sne r15, r16, r17 ; sw r25, r26 } + f2a8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 } + f2b0: [0-9a-f]* { s1a r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 } + f2b8: [0-9a-f]* { tblidxb3 r5, r6 ; s1a r15, r16, r17 ; sw r25, r26 } + f2c0: [0-9a-f]* { s1a r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 } + f2c8: [0-9a-f]* { s1a r5, r6, r7 ; sw r25, r26 } + f2d0: [0-9a-f]* { mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + f2d8: [0-9a-f]* { s2a r15, r16, r17 ; shr r5, r6, r7 ; sw r25, r26 } + f2e0: [0-9a-f]* { s2a r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 } + f2e8: [0-9a-f]* { s2a r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 } + f2f0: [0-9a-f]* { bitx r5, r6 ; s3a r15, r16, r17 ; sw r25, r26 } + f2f8: [0-9a-f]* { s3a r15, r16, r17 ; mz r5, r6, r7 ; sw r25, r26 } + f300: [0-9a-f]* { s3a r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 } + f308: [0-9a-f]* { s3a r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 } + f310: [0-9a-f]* { s3a r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 } + f318: [0-9a-f]* { seq r15, r16, r17 ; info 19 ; sw r25, r26 } + f320: [0-9a-f]* { pcnt r5, r6 ; seq r15, r16, r17 ; sw r25, r26 } + f328: [0-9a-f]* { seq r15, r16, r17 ; srai r5, r6, 5 ; sw r25, r26 } + f330: [0-9a-f]* { seq r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + f338: [0-9a-f]* { seq r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + f340: [0-9a-f]* { mulhh_uu r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + f348: [0-9a-f]* { seqi r15, r16, 5 ; s3a r5, r6, r7 ; sw r25, r26 } + f350: [0-9a-f]* { tblidxb3 r5, r6 ; seqi r15, r16, 5 ; sw r25, r26 } + f358: [0-9a-f]* { seqi r5, r6, 5 ; s1a r15, r16, r17 ; sw r25, r26 } + f360: [0-9a-f]* { seqi r5, r6, 5 ; sw r25, r26 } + f368: [0-9a-f]* { mulll_uu r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 } + f370: [0-9a-f]* { shl r15, r16, r17 ; shr r5, r6, r7 ; sw r25, r26 } + f378: [0-9a-f]* { shl r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 } + f380: [0-9a-f]* { shl r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 } + f388: [0-9a-f]* { bitx r5, r6 ; shli r15, r16, 5 ; sw r25, r26 } + f390: [0-9a-f]* { shli r15, r16, 5 ; mz r5, r6, r7 ; sw r25, r26 } + f398: [0-9a-f]* { shli r15, r16, 5 ; slte_u r5, r6, r7 ; sw r25, r26 } + f3a0: [0-9a-f]* { shli r5, r6, 5 ; mnz r15, r16, r17 ; sw r25, r26 } + f3a8: [0-9a-f]* { shli r5, r6, 5 ; slt_u r15, r16, r17 ; sw r25, r26 } + f3b0: [0-9a-f]* { shr r15, r16, r17 ; info 19 ; sw r25, r26 } + f3b8: [0-9a-f]* { pcnt r5, r6 ; shr r15, r16, r17 ; sw r25, r26 } + f3c0: [0-9a-f]* { shr r15, r16, r17 ; srai r5, r6, 5 ; sw r25, r26 } + f3c8: [0-9a-f]* { shr r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + f3d0: [0-9a-f]* { shr r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + f3d8: [0-9a-f]* { mulhh_uu r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + f3e0: [0-9a-f]* { shri r15, r16, 5 ; s3a r5, r6, r7 ; sw r25, r26 } + f3e8: [0-9a-f]* { tblidxb3 r5, r6 ; shri r15, r16, 5 ; sw r25, r26 } + f3f0: [0-9a-f]* { shri r5, r6, 5 ; s1a r15, r16, r17 ; sw r25, r26 } + f3f8: [0-9a-f]* { shri r5, r6, 5 ; sw r25, r26 } + f400: [0-9a-f]* { mulll_uu r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 } + f408: [0-9a-f]* { slt r15, r16, r17 ; shr r5, r6, r7 ; sw r25, r26 } + f410: [0-9a-f]* { slt r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 } + f418: [0-9a-f]* { slt r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 } + f420: [0-9a-f]* { bitx r5, r6 ; slt_u r15, r16, r17 ; sw r25, r26 } + f428: [0-9a-f]* { slt_u r15, r16, r17 ; mz r5, r6, r7 ; sw r25, r26 } + f430: [0-9a-f]* { slt_u r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 } + f438: [0-9a-f]* { slt_u r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 } + f440: [0-9a-f]* { slt_u r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 } + f448: [0-9a-f]* { slte r15, r16, r17 ; info 19 ; sw r25, r26 } + f450: [0-9a-f]* { pcnt r5, r6 ; slte r15, r16, r17 ; sw r25, r26 } + f458: [0-9a-f]* { slte r15, r16, r17 ; srai r5, r6, 5 ; sw r25, r26 } + f460: [0-9a-f]* { slte r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + f468: [0-9a-f]* { slte r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + f470: [0-9a-f]* { mulhh_uu r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 } + f478: [0-9a-f]* { slte_u r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 } + f480: [0-9a-f]* { tblidxb3 r5, r6 ; slte_u r15, r16, r17 ; sw r25, r26 } + f488: [0-9a-f]* { slte_u r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 } + f490: [0-9a-f]* { slte_u r5, r6, r7 ; sw r25, r26 } + f498: [0-9a-f]* { mulll_uu r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + f4a0: [0-9a-f]* { slti r15, r16, 5 ; shr r5, r6, r7 ; sw r25, r26 } + f4a8: [0-9a-f]* { slti r5, r6, 5 ; and r15, r16, r17 ; sw r25, r26 } + f4b0: [0-9a-f]* { slti r5, r6, 5 ; shl r15, r16, r17 ; sw r25, r26 } + f4b8: [0-9a-f]* { bitx r5, r6 ; slti_u r15, r16, 5 ; sw r25, r26 } + f4c0: [0-9a-f]* { slti_u r15, r16, 5 ; mz r5, r6, r7 ; sw r25, r26 } + f4c8: [0-9a-f]* { slti_u r15, r16, 5 ; slte_u r5, r6, r7 ; sw r25, r26 } + f4d0: [0-9a-f]* { slti_u r5, r6, 5 ; mnz r15, r16, r17 ; sw r25, r26 } + f4d8: [0-9a-f]* { slti_u r5, r6, 5 ; slt_u r15, r16, r17 ; sw r25, r26 } + f4e0: [0-9a-f]* { sne r15, r16, r17 ; info 19 ; sw r25, r26 } + f4e8: [0-9a-f]* { pcnt r5, r6 ; sne r15, r16, r17 ; sw r25, r26 } + f4f0: [0-9a-f]* { sne r15, r16, r17 ; srai r5, r6, 5 ; sw r25, r26 } + f4f8: [0-9a-f]* { sne r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + f500: [0-9a-f]* { sne r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + f508: [0-9a-f]* { mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 } + f510: [0-9a-f]* { sra r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 } + f518: [0-9a-f]* { tblidxb3 r5, r6 ; sra r15, r16, r17 ; sw r25, r26 } + f520: [0-9a-f]* { sra r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 } + f528: [0-9a-f]* { sra r5, r6, r7 ; sw r25, r26 } + f530: [0-9a-f]* { mulll_uu r5, r6, r7 ; srai r15, r16, 5 ; sw r25, r26 } + f538: [0-9a-f]* { srai r15, r16, 5 ; shr r5, r6, r7 ; sw r25, r26 } + f540: [0-9a-f]* { srai r5, r6, 5 ; and r15, r16, r17 ; sw r25, r26 } + f548: [0-9a-f]* { srai r5, r6, 5 ; shl r15, r16, r17 ; sw r25, r26 } + f550: [0-9a-f]* { bitx r5, r6 ; sub r15, r16, r17 ; sw r25, r26 } + f558: [0-9a-f]* { sub r15, r16, r17 ; mz r5, r6, r7 ; sw r25, r26 } + f560: [0-9a-f]* { sub r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 } + f568: [0-9a-f]* { sub r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 } + f570: [0-9a-f]* { sub r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 } + f578: [0-9a-f]* { tblidxb0 r5, r6 ; movei r15, 5 ; sw r25, r26 } + f580: [0-9a-f]* { tblidxb0 r5, r6 ; slte_u r15, r16, r17 ; sw r25, r26 } + f588: [0-9a-f]* { tblidxb1 r5, r6 ; nop ; sw r25, r26 } + f590: [0-9a-f]* { tblidxb1 r5, r6 ; slti_u r15, r16, 5 ; sw r25, r26 } + f598: [0-9a-f]* { tblidxb2 r5, r6 ; or r15, r16, r17 ; sw r25, r26 } + f5a0: [0-9a-f]* { tblidxb2 r5, r6 ; sra r15, r16, r17 ; sw r25, r26 } + f5a8: [0-9a-f]* { tblidxb3 r5, r6 ; rl r15, r16, r17 ; sw r25, r26 } + f5b0: [0-9a-f]* { tblidxb3 r5, r6 ; sub r15, r16, r17 ; sw r25, r26 } + f5b8: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 } + f5c0: [0-9a-f]* { xor r15, r16, r17 ; shl r5, r6, r7 ; sw r25, r26 } + f5c8: [0-9a-f]* { xor r5, r6, r7 ; add r15, r16, r17 ; sw r25, r26 } + f5d0: [0-9a-f]* { xor r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + f5d8: [0-9a-f]* { addbs_u r5, r6, r7 ; swadd r15, r16, 5 } + f5e0: [0-9a-f]* { crc32_8 r5, r6, r7 ; swadd r15, r16, 5 } + f5e8: [0-9a-f]* { mnzb r5, r6, r7 ; swadd r15, r16, 5 } + f5f0: [0-9a-f]* { mulhla_uu r5, r6, r7 ; swadd r15, r16, 5 } + f5f8: [0-9a-f]* { packhs r5, r6, r7 ; swadd r15, r16, 5 } + f600: [0-9a-f]* { shl r5, r6, r7 ; swadd r15, r16, 5 } + f608: [0-9a-f]* { slteh r5, r6, r7 ; swadd r15, r16, 5 } + f610: [0-9a-f]* { subb r5, r6, r7 ; swadd r15, r16, 5 } + f618: [0-9a-f]* { tblidxb0 r5, r6 ; add r15, r16, r17 ; prefetch r25 } + f620: [0-9a-f]* { tblidxb0 r5, r6 ; addih r15, r16, 5 } + f628: [0-9a-f]* { tblidxb0 r5, r6 ; andi r15, r16, 5 ; sb r25, r26 } + f630: [0-9a-f]* { tblidxb0 r5, r6 ; ill ; lb_u r25, r26 } + f638: [0-9a-f]* { tblidxb0 r5, r6 ; inthb r15, r16, r17 } + f640: [0-9a-f]* { tblidxb0 r5, r6 ; movei r15, 5 ; lb r25, r26 } + f648: [0-9a-f]* { tblidxb0 r5, r6 ; slte_u r15, r16, r17 ; lb r25, r26 } + f650: [0-9a-f]* { tblidxb0 r5, r6 ; mz r15, r16, r17 ; lb_u r25, r26 } + f658: [0-9a-f]* { tblidxb0 r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 } + f660: [0-9a-f]* { tblidxb0 r5, r6 ; movei r15, 5 ; lh r25, r26 } + f668: [0-9a-f]* { tblidxb0 r5, r6 ; slte_u r15, r16, r17 ; lh r25, r26 } + f670: [0-9a-f]* { tblidxb0 r5, r6 ; mz r15, r16, r17 ; lh_u r25, r26 } + f678: [0-9a-f]* { tblidxb0 r5, r6 ; slti r15, r16, 5 ; lh_u r25, r26 } + f680: [0-9a-f]* { tblidxb0 r5, r6 ; move r15, r16 ; lw r25, r26 } + f688: [0-9a-f]* { tblidxb0 r5, r6 ; slte r15, r16, r17 ; lw r25, r26 } + f690: [0-9a-f]* { tblidxb0 r5, r6 ; minh r15, r16, r17 } + f698: [0-9a-f]* { tblidxb0 r5, r6 ; move r15, r16 ; lw r25, r26 } + f6a0: [0-9a-f]* { tblidxb0 r5, r6 ; mz r15, r16, r17 ; lb_u r25, r26 } + f6a8: [0-9a-f]* { tblidxb0 r5, r6 ; nop } + f6b0: [0-9a-f]* { tblidxb0 r5, r6 ; or r15, r16, r17 } + f6b8: [0-9a-f]* { tblidxb0 r5, r6 ; prefetch r25 } + f6c0: [0-9a-f]* { tblidxb0 r5, r6 ; shr r15, r16, r17 ; prefetch r25 } + f6c8: [0-9a-f]* { tblidxb0 r5, r6 ; rl r15, r16, r17 ; prefetch r25 } + f6d0: [0-9a-f]* { tblidxb0 r5, r6 ; s1a r15, r16, r17 ; prefetch r25 } + f6d8: [0-9a-f]* { tblidxb0 r5, r6 ; s3a r15, r16, r17 ; prefetch r25 } + f6e0: [0-9a-f]* { tblidxb0 r5, r6 ; ori r15, r16, 5 ; sb r25, r26 } + f6e8: [0-9a-f]* { tblidxb0 r5, r6 ; srai r15, r16, 5 ; sb r25, r26 } + f6f0: [0-9a-f]* { tblidxb0 r5, r6 ; seqi r15, r16, 5 ; lh_u r25, r26 } + f6f8: [0-9a-f]* { tblidxb0 r5, r6 ; mz r15, r16, r17 ; sh r25, r26 } + f700: [0-9a-f]* { tblidxb0 r5, r6 ; slti r15, r16, 5 ; sh r25, r26 } + f708: [0-9a-f]* { tblidxb0 r5, r6 ; shlh r15, r16, r17 } + f710: [0-9a-f]* { tblidxb0 r5, r6 ; shr r15, r16, r17 ; sh r25, r26 } + f718: [0-9a-f]* { tblidxb0 r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 } + f720: [0-9a-f]* { tblidxb0 r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 } + f728: [0-9a-f]* { tblidxb0 r5, r6 ; slteb_u r15, r16, r17 } + f730: [0-9a-f]* { tblidxb0 r5, r6 ; slti_u r15, r16, 5 ; prefetch r25 } + f738: [0-9a-f]* { tblidxb0 r5, r6 ; sneh r15, r16, r17 } + f740: [0-9a-f]* { tblidxb0 r5, r6 ; srai r15, r16, 5 ; sh r25, r26 } + f748: [0-9a-f]* { tblidxb0 r5, r6 ; sw r15, r16 } + f750: [0-9a-f]* { tblidxb0 r5, r6 ; s3a r15, r16, r17 ; sw r25, r26 } + f758: [0-9a-f]* { tblidxb0 r5, r6 ; tns r15, r16 } + f760: [0-9a-f]* { tblidxb1 r5, r6 ; add r15, r16, r17 ; sh r25, r26 } + f768: [0-9a-f]* { tblidxb1 r5, r6 ; addli.sn r15, r16, 4660 } + f770: [0-9a-f]* { tblidxb1 r5, r6 ; andi r15, r16, 5 ; sw r25, r26 } + f778: [0-9a-f]* { tblidxb1 r5, r6 ; ill ; lh_u r25, r26 } + f780: [0-9a-f]* { tblidxb1 r5, r6 ; intlb r15, r16, r17 } + f788: [0-9a-f]* { tblidxb1 r5, r6 ; nop ; lb r25, r26 } + f790: [0-9a-f]* { tblidxb1 r5, r6 ; slti_u r15, r16, 5 ; lb r25, r26 } + f798: [0-9a-f]* { tblidxb1 r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 } + f7a0: [0-9a-f]* { tblidxb1 r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 } + f7a8: [0-9a-f]* { tblidxb1 r5, r6 ; nop ; lh r25, r26 } + f7b0: [0-9a-f]* { tblidxb1 r5, r6 ; slti_u r15, r16, 5 ; lh r25, r26 } + f7b8: [0-9a-f]* { tblidxb1 r5, r6 ; nor r15, r16, r17 ; lh_u r25, r26 } + f7c0: [0-9a-f]* { tblidxb1 r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 } + f7c8: [0-9a-f]* { tblidxb1 r5, r6 ; mz r15, r16, r17 ; lw r25, r26 } + f7d0: [0-9a-f]* { tblidxb1 r5, r6 ; slti r15, r16, 5 ; lw r25, r26 } + f7d8: [0-9a-f]* { tblidxb1 r5, r6 ; minih r15, r16, 5 } + f7e0: [0-9a-f]* { tblidxb1 r5, r6 ; move r15, r16 ; sb r25, r26 } + f7e8: [0-9a-f]* { tblidxb1 r5, r6 ; mz r15, r16, r17 ; lh_u r25, r26 } + f7f0: [0-9a-f]* { tblidxb1 r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 } + f7f8: [0-9a-f]* { tblidxb1 r5, r6 ; ori r15, r16, 5 ; lb_u r25, r26 } + f800: [0-9a-f]* { tblidxb1 r5, r6 ; info 19 ; prefetch r25 } + f808: [0-9a-f]* { tblidxb1 r5, r6 ; slt r15, r16, r17 ; prefetch r25 } + f810: [0-9a-f]* { tblidxb1 r5, r6 ; rl r15, r16, r17 ; sh r25, r26 } + f818: [0-9a-f]* { tblidxb1 r5, r6 ; s1a r15, r16, r17 ; sh r25, r26 } + f820: [0-9a-f]* { tblidxb1 r5, r6 ; s3a r15, r16, r17 ; sh r25, r26 } + f828: [0-9a-f]* { tblidxb1 r5, r6 ; rli r15, r16, 5 ; sb r25, r26 } + f830: [0-9a-f]* { tblidxb1 r5, r6 ; xor r15, r16, r17 ; sb r25, r26 } + f838: [0-9a-f]* { tblidxb1 r5, r6 ; seqi r15, r16, 5 ; prefetch r25 } + f840: [0-9a-f]* { tblidxb1 r5, r6 ; nor r15, r16, r17 ; sh r25, r26 } + f848: [0-9a-f]* { tblidxb1 r5, r6 ; sne r15, r16, r17 ; sh r25, r26 } + f850: [0-9a-f]* { tblidxb1 r5, r6 ; shli r15, r16, 5 ; lb_u r25, r26 } + f858: [0-9a-f]* { tblidxb1 r5, r6 ; shr r15, r16, r17 } + f860: [0-9a-f]* { tblidxb1 r5, r6 ; slt r15, r16, r17 ; prefetch r25 } + f868: [0-9a-f]* { tblidxb1 r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 } + f870: [0-9a-f]* { tblidxb1 r5, r6 ; slteh_u r15, r16, r17 } + f878: [0-9a-f]* { tblidxb1 r5, r6 ; slti_u r15, r16, 5 ; sh r25, r26 } + f880: [0-9a-f]* { tblidxb1 r5, r6 ; sra r15, r16, r17 ; lb_u r25, r26 } + f888: [0-9a-f]* { tblidxb1 r5, r6 ; srai r15, r16, 5 } + f890: [0-9a-f]* { tblidxb1 r5, r6 ; addi r15, r16, 5 ; sw r25, r26 } + f898: [0-9a-f]* { tblidxb1 r5, r6 ; seqi r15, r16, 5 ; sw r25, r26 } + f8a0: [0-9a-f]* { tblidxb1 r5, r6 ; xor r15, r16, r17 ; lb r25, r26 } + f8a8: [0-9a-f]* { tblidxb2 r5, r6 ; add r15, r16, r17 } + f8b0: [0-9a-f]* { tblidxb2 r5, r6 ; and r15, r16, r17 ; lb r25, r26 } + f8b8: [0-9a-f]* { tblidxb2 r5, r6 ; auli r15, r16, 4660 } + f8c0: [0-9a-f]* { tblidxb2 r5, r6 ; ill ; prefetch r25 } + f8c8: [0-9a-f]* { tblidxb2 r5, r6 ; inv r15 } + f8d0: [0-9a-f]* { tblidxb2 r5, r6 ; or r15, r16, r17 ; lb r25, r26 } + f8d8: [0-9a-f]* { tblidxb2 r5, r6 ; sra r15, r16, r17 ; lb r25, r26 } + f8e0: [0-9a-f]* { tblidxb2 r5, r6 ; ori r15, r16, 5 ; lb_u r25, r26 } + f8e8: [0-9a-f]* { tblidxb2 r5, r6 ; srai r15, r16, 5 ; lb_u r25, r26 } + f8f0: [0-9a-f]* { tblidxb2 r5, r6 ; or r15, r16, r17 ; lh r25, r26 } + f8f8: [0-9a-f]* { tblidxb2 r5, r6 ; sra r15, r16, r17 ; lh r25, r26 } + f900: [0-9a-f]* { tblidxb2 r5, r6 ; ori r15, r16, 5 ; lh_u r25, r26 } + f908: [0-9a-f]* { tblidxb2 r5, r6 ; srai r15, r16, 5 ; lh_u r25, r26 } + f910: [0-9a-f]* { tblidxb2 r5, r6 ; nor r15, r16, r17 ; lw r25, r26 } + f918: [0-9a-f]* { tblidxb2 r5, r6 ; sne r15, r16, r17 ; lw r25, r26 } + f920: [0-9a-f]* { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; lb r25, r26 } + f928: [0-9a-f]* { tblidxb2 r5, r6 ; move r15, r16 ; sw r25, r26 } + f930: [0-9a-f]* { tblidxb2 r5, r6 ; mz r15, r16, r17 ; prefetch r25 } + f938: [0-9a-f]* { tblidxb2 r5, r6 ; nor r15, r16, r17 ; lh_u r25, r26 } + f940: [0-9a-f]* { tblidxb2 r5, r6 ; ori r15, r16, 5 ; lh_u r25, r26 } + f948: [0-9a-f]* { tblidxb2 r5, r6 ; move r15, r16 ; prefetch r25 } + f950: [0-9a-f]* { tblidxb2 r5, r6 ; slte r15, r16, r17 ; prefetch r25 } + f958: [0-9a-f]* { tblidxb2 r5, r6 ; rl r15, r16, r17 } + f960: [0-9a-f]* { tblidxb2 r5, r6 ; s1a r15, r16, r17 } + f968: [0-9a-f]* { tblidxb2 r5, r6 ; s3a r15, r16, r17 } + f970: [0-9a-f]* { tblidxb2 r5, r6 ; s2a r15, r16, r17 ; sb r25, r26 } + f978: [0-9a-f]* { tblidxb2 r5, r6 ; sbadd r15, r16, 5 } + f980: [0-9a-f]* { tblidxb2 r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 } + f988: [0-9a-f]* { tblidxb2 r5, r6 ; ori r15, r16, 5 ; sh r25, r26 } + f990: [0-9a-f]* { tblidxb2 r5, r6 ; srai r15, r16, 5 ; sh r25, r26 } + f998: [0-9a-f]* { tblidxb2 r5, r6 ; shli r15, r16, 5 ; lh_u r25, r26 } + f9a0: [0-9a-f]* { tblidxb2 r5, r6 ; shrh r15, r16, r17 } + f9a8: [0-9a-f]* { tblidxb2 r5, r6 ; slt r15, r16, r17 ; sh r25, r26 } + f9b0: [0-9a-f]* { tblidxb2 r5, r6 ; slte r15, r16, r17 ; prefetch r25 } + f9b8: [0-9a-f]* { tblidxb2 r5, r6 ; slth_u r15, r16, r17 } + f9c0: [0-9a-f]* { tblidxb2 r5, r6 ; slti_u r15, r16, 5 } + f9c8: [0-9a-f]* { tblidxb2 r5, r6 ; sra r15, r16, r17 ; lh_u r25, r26 } + f9d0: [0-9a-f]* { tblidxb2 r5, r6 ; sraih r15, r16, 5 } + f9d8: [0-9a-f]* { tblidxb2 r5, r6 ; andi r15, r16, 5 ; sw r25, r26 } + f9e0: [0-9a-f]* { tblidxb2 r5, r6 ; shli r15, r16, 5 ; sw r25, r26 } + f9e8: [0-9a-f]* { tblidxb2 r5, r6 ; xor r15, r16, r17 ; lh r25, r26 } + f9f0: [0-9a-f]* { tblidxb3 r5, r6 ; addbs_u r15, r16, r17 } + f9f8: [0-9a-f]* { tblidxb3 r5, r6 ; and r15, r16, r17 ; lh r25, r26 } + fa00: [0-9a-f]* { tblidxb3 r5, r6 ; finv r15 } + fa08: [0-9a-f]* { tblidxb3 r5, r6 ; ill ; sh r25, r26 } + fa10: [0-9a-f]* { tblidxb3 r5, r6 ; jalr r15 } + fa18: [0-9a-f]* { tblidxb3 r5, r6 ; rl r15, r16, r17 ; lb r25, r26 } + fa20: [0-9a-f]* { tblidxb3 r5, r6 ; sub r15, r16, r17 ; lb r25, r26 } + fa28: [0-9a-f]* { tblidxb3 r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 } + fa30: [0-9a-f]* { tblidxb3 r5, r6 ; xor r15, r16, r17 ; lb_u r25, r26 } + fa38: [0-9a-f]* { tblidxb3 r5, r6 ; rl r15, r16, r17 ; lh r25, r26 } + fa40: [0-9a-f]* { tblidxb3 r5, r6 ; sub r15, r16, r17 ; lh r25, r26 } + fa48: [0-9a-f]* { tblidxb3 r5, r6 ; rli r15, r16, 5 ; lh_u r25, r26 } + fa50: [0-9a-f]* { tblidxb3 r5, r6 ; xor r15, r16, r17 ; lh_u r25, r26 } + fa58: [0-9a-f]* { tblidxb3 r5, r6 ; ori r15, r16, 5 ; lw r25, r26 } + fa60: [0-9a-f]* { tblidxb3 r5, r6 ; srai r15, r16, 5 ; lw r25, r26 } + fa68: [0-9a-f]* { tblidxb3 r5, r6 ; mnz r15, r16, r17 ; lh r25, r26 } + fa70: [0-9a-f]* { tblidxb3 r5, r6 ; movei r15, 5 ; lb r25, r26 } + fa78: [0-9a-f]* { tblidxb3 r5, r6 ; mz r15, r16, r17 ; sh r25, r26 } + fa80: [0-9a-f]* { tblidxb3 r5, r6 ; nor r15, r16, r17 ; prefetch r25 } + fa88: [0-9a-f]* { tblidxb3 r5, r6 ; ori r15, r16, 5 ; prefetch r25 } + fa90: [0-9a-f]* { tblidxb3 r5, r6 ; mz r15, r16, r17 ; prefetch r25 } + fa98: [0-9a-f]* { tblidxb3 r5, r6 ; slti r15, r16, 5 ; prefetch r25 } + faa0: [0-9a-f]* { tblidxb3 r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 } + faa8: [0-9a-f]* { tblidxb3 r5, r6 ; s2a r15, r16, r17 ; lb_u r25, r26 } + fab0: [0-9a-f]* { tblidxb3 r5, r6 ; add r15, r16, r17 ; sb r25, r26 } + fab8: [0-9a-f]* { tblidxb3 r5, r6 ; seq r15, r16, r17 ; sb r25, r26 } + fac0: [0-9a-f]* { tblidxb3 r5, r6 ; seq r15, r16, r17 ; lb_u r25, r26 } + fac8: [0-9a-f]* { tblidxb3 r5, r6 ; seqi r15, r16, 5 } + fad0: [0-9a-f]* { tblidxb3 r5, r6 ; rli r15, r16, 5 ; sh r25, r26 } + fad8: [0-9a-f]* { tblidxb3 r5, r6 ; xor r15, r16, r17 ; sh r25, r26 } + fae0: [0-9a-f]* { tblidxb3 r5, r6 ; shli r15, r16, 5 ; prefetch r25 } + fae8: [0-9a-f]* { tblidxb3 r5, r6 ; shri r15, r16, 5 ; lb_u r25, r26 } + faf0: [0-9a-f]* { tblidxb3 r5, r6 ; slt r15, r16, r17 } + faf8: [0-9a-f]* { tblidxb3 r5, r6 ; slte r15, r16, r17 ; sh r25, r26 } + fb00: [0-9a-f]* { tblidxb3 r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 } + fb08: [0-9a-f]* { tblidxb3 r5, r6 ; sltib_u r15, r16, 5 } + fb10: [0-9a-f]* { tblidxb3 r5, r6 ; sra r15, r16, r17 ; prefetch r25 } + fb18: [0-9a-f]* { tblidxb3 r5, r6 ; sub r15, r16, r17 ; lb_u r25, r26 } + fb20: [0-9a-f]* { tblidxb3 r5, r6 ; ill ; sw r25, r26 } + fb28: [0-9a-f]* { tblidxb3 r5, r6 ; shri r15, r16, 5 ; sw r25, r26 } + fb30: [0-9a-f]* { tblidxb3 r5, r6 ; xor r15, r16, r17 ; lw r25, r26 } + fb38: [0-9a-f]* { and r5, r6, r7 ; tns r15, r16 } + fb40: [0-9a-f]* { maxh r5, r6, r7 ; tns r15, r16 } + fb48: [0-9a-f]* { mulhha_uu r5, r6, r7 ; tns r15, r16 } + fb50: [0-9a-f]* { mz r5, r6, r7 ; tns r15, r16 } + fb58: [0-9a-f]* { sadb_u r5, r6, r7 ; tns r15, r16 } + fb60: [0-9a-f]* { shrih r5, r6, 5 ; tns r15, r16 } + fb68: [0-9a-f]* { sneb r5, r6, r7 ; tns r15, r16 } + fb70: [0-9a-f]* { add r5, r6, r7 ; wh64 r15 } + fb78: [0-9a-f]* { clz r5, r6 ; wh64 r15 } + fb80: [0-9a-f]* { mm r5, r6, r7, 5, 7 ; wh64 r15 } + fb88: [0-9a-f]* { mulhla_su r5, r6, r7 ; wh64 r15 } + fb90: [0-9a-f]* { packbs_u r5, r6, r7 ; wh64 r15 } + fb98: [0-9a-f]* { seqib r5, r6, 5 ; wh64 r15 } + fba0: [0-9a-f]* { slteb r5, r6, r7 ; wh64 r15 } + fba8: [0-9a-f]* { sraih r5, r6, 5 ; wh64 r15 } + fbb0: [0-9a-f]* { xor r15, r16, r17 ; add r5, r6, r7 ; sh r25, r26 } + fbb8: [0-9a-f]* { xor r15, r16, r17 ; addli.sn r5, r6, 4660 } + fbc0: [0-9a-f]* { xor r15, r16, r17 ; andi r5, r6, 5 ; sb r25, r26 } + fbc8: [0-9a-f]* { bytex r5, r6 ; xor r15, r16, r17 ; lh_u r25, r26 } + fbd0: [0-9a-f]* { ctz r5, r6 ; xor r15, r16, r17 ; lb_u r25, r26 } + fbd8: [0-9a-f]* { xor r15, r16, r17 ; info 19 ; lb r25, r26 } + fbe0: [0-9a-f]* { bytex r5, r6 ; xor r15, r16, r17 ; lb r25, r26 } + fbe8: [0-9a-f]* { xor r15, r16, r17 ; nop ; lb r25, r26 } + fbf0: [0-9a-f]* { xor r15, r16, r17 ; slti r5, r6, 5 ; lb r25, r26 } + fbf8: [0-9a-f]* { xor r15, r16, r17 ; lb_u r25, r26 } + fc00: [0-9a-f]* { xor r15, r16, r17 ; ori r5, r6, 5 ; lb_u r25, r26 } + fc08: [0-9a-f]* { xor r15, r16, r17 ; sra r5, r6, r7 ; lb_u r25, r26 } + fc10: [0-9a-f]* { xor r15, r16, r17 ; move r5, r6 ; lh r25, r26 } + fc18: [0-9a-f]* { xor r15, r16, r17 ; rli r5, r6, 5 ; lh r25, r26 } + fc20: [0-9a-f]* { tblidxb0 r5, r6 ; xor r15, r16, r17 ; lh r25, r26 } + fc28: [0-9a-f]* { mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + fc30: [0-9a-f]* { xor r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 } + fc38: [0-9a-f]* { tblidxb3 r5, r6 ; xor r15, r16, r17 ; lh_u r25, r26 } + fc40: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 } + fc48: [0-9a-f]* { xor r15, r16, r17 ; shl r5, r6, r7 ; lw r25, r26 } + fc50: [0-9a-f]* { xor r15, r16, r17 ; maxb_u r5, r6, r7 } + fc58: [0-9a-f]* { xor r15, r16, r17 ; mnzh r5, r6, r7 } + fc60: [0-9a-f]* { xor r15, r16, r17 ; movei r5, 5 } + fc68: [0-9a-f]* { mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 } + fc70: [0-9a-f]* { mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + fc78: [0-9a-f]* { mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 } + fc80: [0-9a-f]* { mulll_uu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + fc88: [0-9a-f]* { mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 } + fc90: [0-9a-f]* { mvz r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + fc98: [0-9a-f]* { xor r15, r16, r17 ; nop ; lb_u r25, r26 } + fca0: [0-9a-f]* { xor r15, r16, r17 ; or r5, r6, r7 ; lb_u r25, r26 } + fca8: [0-9a-f]* { xor r15, r16, r17 ; packhb r5, r6, r7 } + fcb0: [0-9a-f]* { ctz r5, r6 ; xor r15, r16, r17 ; prefetch r25 } + fcb8: [0-9a-f]* { xor r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 } + fcc0: [0-9a-f]* { xor r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 } + fcc8: [0-9a-f]* { xor r15, r16, r17 ; rli r5, r6, 5 ; lb r25, r26 } + fcd0: [0-9a-f]* { xor r15, r16, r17 ; s2a r5, r6, r7 ; lb r25, r26 } + fcd8: [0-9a-f]* { sadab_u r5, r6, r7 ; xor r15, r16, r17 } + fce0: [0-9a-f]* { mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 } + fce8: [0-9a-f]* { xor r15, r16, r17 ; s3a r5, r6, r7 ; sb r25, r26 } + fcf0: [0-9a-f]* { tblidxb3 r5, r6 ; xor r15, r16, r17 ; sb r25, r26 } + fcf8: [0-9a-f]* { xor r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 } + fd00: [0-9a-f]* { mulhh_ss r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + fd08: [0-9a-f]* { xor r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 } + fd10: [0-9a-f]* { tblidxb2 r5, r6 ; xor r15, r16, r17 ; sh r25, r26 } + fd18: [0-9a-f]* { xor r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 } + fd20: [0-9a-f]* { xor r15, r16, r17 ; shri r5, r6, 5 ; lb r25, r26 } + fd28: [0-9a-f]* { xor r15, r16, r17 ; slt r5, r6, r7 ; sw r25, r26 } + fd30: [0-9a-f]* { xor r15, r16, r17 ; slte r5, r6, r7 ; sb r25, r26 } + fd38: [0-9a-f]* { xor r15, r16, r17 ; slti r5, r6, 5 ; lb r25, r26 } + fd40: [0-9a-f]* { xor r15, r16, r17 ; sltib r5, r6, 5 } + fd48: [0-9a-f]* { xor r15, r16, r17 ; sra r5, r6, r7 ; lw r25, r26 } + fd50: [0-9a-f]* { xor r15, r16, r17 ; sub r5, r6, r7 ; lb r25, r26 } + fd58: [0-9a-f]* { bytex r5, r6 ; xor r15, r16, r17 ; sw r25, r26 } + fd60: [0-9a-f]* { xor r15, r16, r17 ; nop ; sw r25, r26 } + fd68: [0-9a-f]* { xor r15, r16, r17 ; slti r5, r6, 5 ; sw r25, r26 } + fd70: [0-9a-f]* { tblidxb0 r5, r6 ; xor r15, r16, r17 ; sw r25, r26 } + fd78: [0-9a-f]* { tblidxb2 r5, r6 ; xor r15, r16, r17 ; sw r25, r26 } + fd80: [0-9a-f]* { xor r15, r16, r17 ; xor r5, r6, r7 ; sw r25, r26 } + fd88: [0-9a-f]* { xor r5, r6, r7 ; addi r15, r16, 5 ; lh_u r25, r26 } + fd90: [0-9a-f]* { xor r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 } + fd98: [0-9a-f]* { xor r5, r6, r7 ; lw r25, r26 } + fda0: [0-9a-f]* { xor r5, r6, r7 ; info 19 ; lh_u r25, r26 } + fda8: [0-9a-f]* { xor r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 } + fdb0: [0-9a-f]* { xor r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 } + fdb8: [0-9a-f]* { xor r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + fdc0: [0-9a-f]* { xor r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 } + fdc8: [0-9a-f]* { xor r5, r6, r7 ; addi r15, r16, 5 ; lh r25, r26 } + fdd0: [0-9a-f]* { xor r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 } + fdd8: [0-9a-f]* { xor r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + fde0: [0-9a-f]* { xor r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 } + fde8: [0-9a-f]* { xor r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 } + fdf0: [0-9a-f]* { xor r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 } + fdf8: [0-9a-f]* { xor r5, r6, r7 ; lwadd_na r15, r16, 5 } + fe00: [0-9a-f]* { xor r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 } + fe08: [0-9a-f]* { xor r5, r6, r7 ; movei r15, 5 ; sb r25, r26 } + fe10: [0-9a-f]* { xor r5, r6, r7 ; nop ; lb_u r25, r26 } + fe18: [0-9a-f]* { xor r5, r6, r7 ; or r15, r16, r17 ; lb_u r25, r26 } + fe20: [0-9a-f]* { xor r5, r6, r7 ; packhb r15, r16, r17 } + fe28: [0-9a-f]* { xor r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 } + fe30: [0-9a-f]* { xor r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + fe38: [0-9a-f]* { xor r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 } + fe40: [0-9a-f]* { xor r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 } + fe48: [0-9a-f]* { xor r5, r6, r7 ; info 19 ; sb r25, r26 } + fe50: [0-9a-f]* { xor r5, r6, r7 ; slt r15, r16, r17 ; sb r25, r26 } + fe58: [0-9a-f]* { xor r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 } + fe60: [0-9a-f]* { xor r5, r6, r7 ; and r15, r16, r17 ; sh r25, r26 } + fe68: [0-9a-f]* { xor r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 } + fe70: [0-9a-f]* { xor r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 } + fe78: [0-9a-f]* { xor r5, r6, r7 ; shlih r15, r16, 5 } + fe80: [0-9a-f]* { xor r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 } + fe88: [0-9a-f]* { xor r5, r6, r7 ; slt_u r15, r16, r17 ; prefetch r25 } + fe90: [0-9a-f]* { xor r5, r6, r7 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + fe98: [0-9a-f]* { xor r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 } + fea0: [0-9a-f]* { xor r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 } + fea8: [0-9a-f]* { xor r5, r6, r7 ; srah r15, r16, r17 } + feb0: [0-9a-f]* { xor r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 } + feb8: [0-9a-f]* { xor r5, r6, r7 ; nop ; sw r25, r26 } + fec0: [0-9a-f]* { xor r5, r6, r7 ; slti_u r15, r16, 5 ; sw r25, r26 } + fec8: [0-9a-f]* { xor r5, r6, r7 ; xori r15, r16, 5 } + fed0: [0-9a-f]* { bytex r5, r6 ; xori r15, r16, 5 } + fed8: [0-9a-f]* { xori r15, r16, 5 ; minih r5, r6, 5 } + fee0: [0-9a-f]* { mulhla_ss r5, r6, r7 ; xori r15, r16, 5 } + fee8: [0-9a-f]* { xori r15, r16, 5 ; ori r5, r6, 5 } + fef0: [0-9a-f]* { xori r15, r16, 5 ; seqi r5, r6, 5 } + fef8: [0-9a-f]* { xori r15, r16, 5 ; slte_u r5, r6, r7 } + ff00: [0-9a-f]* { xori r15, r16, 5 ; sraib r5, r6, 5 } + ff08: [0-9a-f]* { xori r5, r6, 5 ; addib r15, r16, 5 } + ff10: [0-9a-f]* { xori r5, r6, 5 ; inv r15 } + ff18: [0-9a-f]* { xori r5, r6, 5 ; maxh r15, r16, r17 } + ff20: [0-9a-f]* { xori r5, r6, 5 ; mzh r15, r16, r17 } + ff28: [0-9a-f]* { xori r5, r6, 5 ; seqh r15, r16, r17 } + ff30: [0-9a-f]* { xori r5, r6, 5 ; sltb r15, r16, r17 } + ff38: [0-9a-f]* { xori r5, r6, 5 ; srab r15, r16, r17 } diff --git a/gas/testsuite/gas/tilepro/t_insns.s b/gas/testsuite/gas/tilepro/t_insns.s new file mode 100644 index 0000000..97bec32 --- /dev/null +++ b/gas/testsuite/gas/tilepro/t_insns.s @@ -0,0 +1,8202 @@ +target: + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + nop + + { mulllsa_uu r5, r6, r7 ; bbnst r15, target } + { mulhha_ss r5, r6, r7 ; blezt r15, target } + { mulhla_us r5, r6, r7 ; bbnst r15, target } + { mullla_uu r5, r6, r7 ; bgezt r15, target } + { addlis r5, r6, 0x1234 ; bzt r15, target } + { mulhh_uu r5, r6, r7 ; bbnst r15, target } + { mulhha_uu r5, r6, r7 ; bgzt r15, target } + { mulhl_uu r5, r6, r7 ; blezt r15, target } + { mulhla_us r5, r6, r7 ; blzt r15, target } + { mulll_uu r5, r6, r7 ; bbnst r15, target } + { mullla_uu r5, r6, r7 ; bgzt r15, target } + { addlis r5, r6, 0x1234 ; bz r15, target } + { crc32_32 r5, r6, r7 ; blzt r15, target } + { mulhh_ss r5, r6, r7 ; blzt r15, target } + { mulhha_ss r5, r6, r7 ; bzt r15, target } + { mulhl_su r5, r6, r7 ; bbst r15, target } + { mulhla_ss r5, r6, r7 ; bbs r15, target } + { mulhlsa_uu r5, r6, r7 ; bz r15, target } + { mulll_uu r5, r6, r7 ; blzt r15, target } + { packbs_u r5, r6, r7 ; bgez r15, target } + { addbs_u r5, r6, r7 ; bbns r15, target } + { auli r5, r6, 0x1234 ; bzt r15, target } + { maxib_u r5, r6, 5 ; bgezt r15, target } + { movelis r5, 0x1234 ; blez r15, target } + { mulhha_uu r5, r6, r7 ; bz r15, target } + { mulhl_uu r5, r6, r7 ; bzt r15, target } + { mullla_ss r5, r6, r7 ; bz r15, target } + { sadab_u r5, r6, r7 ; bgzt r15, target } + { slte_u r5, r6, r7 ; bbnst r15, target } + { sltib_u r5, r6, 5 ; bbnst r15, target } + { addhs r5, r6, r7 ; blezt r15, target } + { crc32_8 r5, r6, r7 ; blz r15, target } + { maxb_u r5, r6, r7 ; blzt r15, target } + { minib_u r5, r6, 5 ; blez r15, target } + { mulhl_su r5, r6, r7 ; bz r15, target } + { packhs r5, r6, r7 ; bnzt r15, target } + { sadah_u r5, r6, r7 ; bzt r15, target } + { sltb_u r5, r6, r7 ; bgez r15, target } + { slteh r5, r6, r7 ; bbnst r15, target } + { sltib_u r5, r6, 5 ; bgez r15, target } + { addb r5, r6, r7 ; bbnst r15, target } + { adds r5, r6, r7 ; bbnst r15, target } + { inthb r5, r6, r7 ; bgez r15, target } + { intlh r5, r6, r7 ; bbst r15, target } + { maxih r5, r6, 5 ; bgezt r15, target } + { mnzb r5, r6, r7 ; blezt r15, target } + { packhs r5, r6, r7 ; blz r15, target } + { sadb_u r5, r6, r7 ; bnz r15, target } + { seqih r5, r6, 5 ; bgezt r15, target } + { shrib r5, r6, 5 ; bbnst r15, target } + { sltb_u r5, r6, r7 ; bzt r15, target } + { slteh r5, r6, r7 ; bgzt r15, target } + { sltib r5, r6, 5 ; bbnst r15, target } + { sneh r5, r6, r7 ; bgezt r15, target } + { subh r5, r6, r7 ; blezt r15, target } + { tblidxb3 r5, r6 ; bbnst r15, target } + { addhs r5, r6, r7 ; bbs r15, target } + { addih r5, r6, 5 ; blzt r15, target } + { avgh r5, r6, r7 ; bgez r15, target } + { intlh r5, r6, r7 ; bbs r15, target } + { maxih r5, r6, 5 ; bnzt r15, target } + { mnzb r5, r6, r7 ; bbns r15, target } + { mvnz r5, r6, r7 ; bgez r15, target } + { s1a r5, r6, r7 ; bbnst r15, target } + { sadh r5, r6, r7 ; blzt r15, target } + { seqi r5, r6, 5 ; bbnst r15, target } + { shlb r5, r6, r7 ; bbns r15, target } + { shlib r5, r6, 5 ; bgzt r15, target } + { shrb r5, r6, r7 ; bnzt r15, target } + { shrih r5, r6, 5 ; bgez r15, target } + { sltb_u r5, r6, r7 ; bz r15, target } + { slth r5, r6, r7 ; bbst r15, target } + { sltib r5, r6, 5 ; blzt r15, target } + { sneb r5, r6, r7 ; bnzt r15, target } + { srah r5, r6, r7 ; bgez r15, target } + { sraih r5, r6, 5 ; blzt r15, target } + { subhs r5, r6, r7 ; bgz r15, target } + { tblidxb1 r5, r6 ; bgez r15, target } + { xor r5, r6, r7 ; bgezt r15, target } + { addh r5, r6, r7 ; bnz r15, target } + { addli r5, r6, 0x1234 ; jal target } + { avgh r5, r6, r7 ; bbs r15, target } + { minh r5, r6, r7 ; bbs r15, target } + { mnzb r5, r6, r7 ; bnz r15, target } + { mvnz r5, r6, r7 ; bnz r15, target } + { mzh r5, r6, r7 ; bbst r15, target } + { rl r5, r6, r7 ; bgezt r15, target } + { s3a r5, r6, r7 ; bbst r15, target } + { seqb r5, r6, r7 ; bgz r15, target } + { seqib r5, r6, 5 ; bzt r15, target } + { shlh r5, r6, r7 ; blz r15, target } + { shr r5, r6, r7 ; bbns r15, target } + { shri r5, r6, 5 ; bgzt r15, target } + { slt r5, r6, r7 ; bnzt r15, target } + { slti r5, r6, 5 ; bbst r15, target } + { sne r5, r6, r7 ; bgzt r15, target } + { sra r5, r6, r7 ; bnzt r15, target } + { sraib r5, r6, 5 ; blz r15, target } + { subh r5, r6, r7 ; bbs r15, target } + { tblidxb1 r5, r6 ; bzt r15, target } + { xori r5, r6, 5 ; bgez r15, target } + { adds r5, r6, r7 ; bz r15, target } + { infol 0x1234 ; blezt r15, target } + { mulhl_uu r5, r6, r7 ; jal target } + { mzb r5, r6, r7 ; bgz r15, target } + { or r5, r6, r7 ; bnzt r15, target } + { rli r5, r6, 5 ; blez r15, target } + { seq r5, r6, r7 ; bgz r15, target } + { shli r5, r6, 5 ; bbs r15, target } + { shrih r5, r6, 5 ; bz r15, target } + { sne r5, r6, r7 ; bzt r15, target } + { sub r5, r6, r7 ; bnz r15, target } + { addbs_u r5, r6, r7 ; jal target } + { infol 0x1234 ; blez r15, target } + { mullla_uu r5, r6, r7 ; j target } + { pcnt r5, r6 ; bbnst r15, target } + { shl r5, r6, r7 ; bz r15, target } + { bitx r5, r6 ; bbst r15, target } + { infol 0x1234 ; blz r15, target } + { movei r5, 5 ; blzt r15, target } + { pcnt r5, r6 ; bbns r15, target } + { bitx r5, r6 ; blz r15, target } + { inthb r5, r6, r7 ; jal target } + { sadab_u r5, r6, r7 ; j target } + { clz r5, r6 ; bbs r15, target } + { move r5, r6 ; bz r15, target } + { shrh r5, r6, r7 ; jal target } + { subh r5, r6, r7 ; jal target } + { mnz r5, r6, r7 ; jal target } + { slti_u r5, r6, 5 ; j target } + { info 19 ; bnzt r15, target } + { shlib r5, r6, 5 ; j target } + { tblidxb0 r5, r6 ; j target } + { s1a r5, r6, r7 ; j target } + { fnop ; blezt r15, target } + { infol 0x1234 ; j target } + { clz r5, r6 ; j target } + { bbnst r15, target ; addlis r5, r6, 0x1234 } + { bbnst r15, target ; inthh r5, r6, r7 } + { bbnst r15, target ; mulhh_su r5, r6, r7 } + { bbnst r15, target ; mullla_uu r5, r6, r7 } + { bbnst r15, target ; s3a r5, r6, r7 } + { bbnst r15, target ; shrb r5, r6, r7 } + { bbnst r15, target ; sltib_u r5, r6, 5 } + { bbnst r15, target ; tblidxb2 r5, r6 } + { bgezt r15, target ; avgb_u r5, r6, r7 } + { bgezt r15, target ; minb_u r5, r6, r7 } + { bgezt r15, target ; mulhl_su r5, r6, r7 } + { bgezt r15, target ; nop } + { bgezt r15, target ; seq r5, r6, r7 } + { bgezt r15, target ; sltb r5, r6, r7 } + { bgezt r15, target ; srab r5, r6, r7 } + { blezt r15, target ; addh r5, r6, r7 } + { blezt r15, target ; ctz r5, r6 } + { blezt r15, target ; mnzh r5, r6, r7 } + { blezt r15, target ; mulhlsa_uu r5, r6, r7 } + { blezt r15, target ; packlb r5, r6, r7 } + { blezt r15, target ; shlb r5, r6, r7 } + { blezt r15, target ; slteh_u r5, r6, r7 } + { blezt r15, target ; subbs_u r5, r6, r7 } + { bbns r15, target ; addlis r5, r6, 0x1234 } + { bbns r15, target ; inthh r5, r6, r7 } + { bbns r15, target ; mulhh_su r5, r6, r7 } + { bbns r15, target ; mullla_uu r5, r6, r7 } + { bbns r15, target ; s3a r5, r6, r7 } + { bbns r15, target ; shrb r5, r6, r7 } + { bbns r15, target ; sltib_u r5, r6, 5 } + { bbns r15, target ; tblidxb2 r5, r6 } + { bbst r15, target ; avgb_u r5, r6, r7 } + { bbst r15, target ; minb_u r5, r6, r7 } + { bbst r15, target ; mulhl_su r5, r6, r7 } + { bbst r15, target ; nop } + { bbst r15, target ; seq r5, r6, r7 } + { bbst r15, target ; sltb r5, r6, r7 } + { bbst r15, target ; srab r5, r6, r7 } + { bgez r15, target ; addh r5, r6, r7 } + { bgez r15, target ; ctz r5, r6 } + { bgez r15, target ; mnzh r5, r6, r7 } + { bgez r15, target ; mulhlsa_uu r5, r6, r7 } + { bgez r15, target ; packlb r5, r6, r7 } + { bgez r15, target ; shlb r5, r6, r7 } + { bgez r15, target ; slteh_u r5, r6, r7 } + { bgez r15, target ; subbs_u r5, r6, r7 } + { bgzt r15, target ; adds r5, r6, r7 } + { bgzt r15, target ; intlb r5, r6, r7 } + { bgzt r15, target ; mulhh_uu r5, r6, r7 } + { bgzt r15, target ; mulllsa_uu r5, r6, r7 } + { bgzt r15, target ; sadab_u r5, r6, r7 } + { bgzt r15, target ; shrh r5, r6, r7 } + { bgzt r15, target ; sltih r5, r6, 5 } + { bgzt r15, target ; tblidxb3 r5, r6 } + { blez r15, target ; avgh r5, r6, r7 } + { blez r15, target ; minh r5, r6, r7 } + { blez r15, target ; mulhl_us r5, r6, r7 } + { blez r15, target ; nor r5, r6, r7 } + { blez r15, target ; seqb r5, r6, r7 } + { blez r15, target ; sltb_u r5, r6, r7 } + { blez r15, target ; srah r5, r6, r7 } + { blzt r15, target ; addhs r5, r6, r7 } + { blzt r15, target ; dword_align r5, r6, r7 } + { blzt r15, target ; move r5, r6 } + { blzt r15, target ; mulll_ss r5, r6, r7 } + { blzt r15, target ; pcnt r5, r6 } + { blzt r15, target ; shlh r5, r6, r7 } + { blzt r15, target ; slth r5, r6, r7 } + { blzt r15, target ; subh r5, r6, r7 } + { bnzt r15, target ; adiffb_u r5, r6, r7 } + { bnzt r15, target ; intlh r5, r6, r7 } + { bnzt r15, target ; mulhha_ss r5, r6, r7 } + { bnzt r15, target ; mvnz r5, r6, r7 } + { bnzt r15, target ; sadah r5, r6, r7 } + { bnzt r15, target ; shri r5, r6, 5 } + { bnzt r15, target ; sltih_u r5, r6, 5 } + { bnzt r15, target ; xor r5, r6, r7 } + { bbs r15, target ; avgh r5, r6, r7 } + { bbs r15, target ; minh r5, r6, r7 } + { bbs r15, target ; mulhl_us r5, r6, r7 } + { bbs r15, target ; nor r5, r6, r7 } + { bbs r15, target ; seqb r5, r6, r7 } + { bbs r15, target ; sltb_u r5, r6, r7 } + { bbs r15, target ; srah r5, r6, r7 } + { bgz r15, target ; addhs r5, r6, r7 } + { bgz r15, target ; dword_align r5, r6, r7 } + { bgz r15, target ; move r5, r6 } + { bgz r15, target ; mulll_ss r5, r6, r7 } + { bgz r15, target ; pcnt r5, r6 } + { bgz r15, target ; shlh r5, r6, r7 } + { bgz r15, target ; slth r5, r6, r7 } + { bgz r15, target ; subh r5, r6, r7 } + { blz r15, target ; adiffb_u r5, r6, r7 } + { blz r15, target ; intlh r5, r6, r7 } + { blz r15, target ; mulhha_ss r5, r6, r7 } + { blz r15, target ; mvnz r5, r6, r7 } + { blz r15, target ; sadah r5, r6, r7 } + { blz r15, target ; shri r5, r6, 5 } + { blz r15, target ; sltih_u r5, r6, 5 } + { blz r15, target ; xor r5, r6, r7 } + { bnz r15, target ; bitx r5, r6 } + { bnz r15, target ; minib_u r5, r6, 5 } + { bnz r15, target ; mulhl_uu r5, r6, r7 } + { bnz r15, target ; or r5, r6, r7 } + { bnz r15, target ; seqh r5, r6, r7 } + { bnz r15, target ; slte r5, r6, r7 } + { bnz r15, target ; srai r5, r6, 5 } + { bzt r15, target ; addi r5, r6, 5 } + { bzt r15, target ; fnop } + { bzt r15, target ; movei r5, 5 } + { bzt r15, target ; mulll_su r5, r6, r7 } + { bzt r15, target ; rl r5, r6, r7 } + { bzt r15, target ; shli r5, r6, 5 } + { bzt r15, target ; slth_u r5, r6, r7 } + { bzt r15, target ; subhs r5, r6, r7 } + { bz r15, target ; addli r5, r6, 0x1234 } + { bz r15, target ; inthb r5, r6, r7 } + { bz r15, target ; mulhh_ss r5, r6, r7 } + { bz r15, target ; mullla_su r5, r6, r7 } + { bz r15, target ; s2a r5, r6, r7 } + { bz r15, target ; shr r5, r6, r7 } + { bz r15, target ; sltib r5, r6, 5 } + { bz r15, target ; tblidxb1 r5, r6 } + { jal target ; addb r5, r6, r7 } + { jal target ; crc32_32 r5, r6, r7 } + { jal target ; mnz r5, r6, r7 } + { jal target ; mulhla_us r5, r6, r7 } + { jal target ; packhb r5, r6, r7 } + { jal target ; seqih r5, r6, 5 } + { jal target ; slteb_u r5, r6, r7 } + { jal target ; sub r5, r6, r7 } + { j target ; addih r5, r6, 5 } + { j target ; infol 0x1234 } + { j target ; movelis r5, 0x1234 } + { j target ; mullla_ss r5, r6, r7 } + { j target ; s1a r5, r6, r7 } + { j target ; shlih r5, r6, 5 } + { j target ; slti_u r5, r6, 5 } + { j target ; tblidxb0 r5, r6 } + and r5, r6, r7 + info 19 + lnk r5 + movei r5, 5 + mulll_ss r5, r6, r7 + packlb r5, r6, r7 + seqi r5, r6, 5 + sltb_u r5, r6, r7 + srah r5, r6, r7 + tns r5, r6 + { add r15, r16, r17 ; addi r5, r6, 5 ; lh r25, r26 } + { add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 } + { add r15, r16, r17 ; bitx r5, r6 ; lh r25, r26 } + { add r15, r16, r17 ; clz r5, r6 ; lh r25, r26 } + { add r15, r16, r17 ; dword_align r5, r6, r7 } + { add r15, r16, r17 ; info 19 } + { add r15, r16, r17 ; lb r25, r26 ; mulhh_uu r5, r6, r7 } + { add r15, r16, r17 ; lb r25, r26 ; s3a r5, r6, r7 } + { add r15, r16, r17 ; lb r25, r26 ; tblidxb3 r5, r6 } + { add r15, r16, r17 ; lb_u r25, r26 ; mulhlsa_uu r5, r6, r7 } + { add r15, r16, r17 ; lb_u r25, r26 ; shl r5, r6, r7 } + { add r15, r16, r17 ; lh r25, r26 ; add r5, r6, r7 } + { add r15, r16, r17 ; lh r25, r26 ; mullla_ss r5, r6, r7 } + { add r15, r16, r17 ; lh r25, r26 ; shri r5, r6, 5 } + { add r15, r16, r17 ; lh_u r25, r26 ; andi r5, r6, 5 } + { add r15, r16, r17 ; lh_u r25, r26 ; mvz r5, r6, r7 } + { add r15, r16, r17 ; lh_u r25, r26 ; slte r5, r6, r7 } + { add r15, r16, r17 ; lw r25, r26 ; clz r5, r6 } + { add r15, r16, r17 ; lw r25, r26 ; nor r5, r6, r7 } + { add r15, r16, r17 ; lw r25, r26 ; slti_u r5, r6, 5 } + { add r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 } + { add r15, r16, r17 ; move r5, r6 ; sw r25, r26 } + { add r15, r16, r17 ; mulhh_ss r5, r6, r7 ; sb r25, r26 } + { add r15, r16, r17 ; mulhha_ss r5, r6, r7 ; prefetch r25 } + { add r15, r16, r17 ; mulhl_uu r5, r6, r7 } + { add r15, r16, r17 ; mulll_ss r5, r6, r7 ; prefetch r25 } + { add r15, r16, r17 ; mullla_ss r5, r6, r7 ; lw r25, r26 } + { add r15, r16, r17 ; mvnz r5, r6, r7 ; lh r25, r26 } + { add r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 } + { add r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 } + { add r15, r16, r17 ; ori r5, r6, 5 ; lb r25, r26 } + { add r15, r16, r17 ; pcnt r5, r6 ; sb r25, r26 } + { add r15, r16, r17 ; prefetch r25 ; mulhha_uu r5, r6, r7 } + { add r15, r16, r17 ; prefetch r25 ; seqi r5, r6, 5 } + { add r15, r16, r17 ; prefetch r25 } + { add r15, r16, r17 ; rli r5, r6, 5 } + { add r15, r16, r17 ; s2a r5, r6, r7 } + { add r15, r16, r17 ; sb r25, r26 ; andi r5, r6, 5 } + { add r15, r16, r17 ; sb r25, r26 ; mvz r5, r6, r7 } + { add r15, r16, r17 ; sb r25, r26 ; slte r5, r6, r7 } + { add r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 } + { add r15, r16, r17 ; sh r25, r26 ; and r5, r6, r7 } + { add r15, r16, r17 ; sh r25, r26 ; mvnz r5, r6, r7 } + { add r15, r16, r17 ; sh r25, r26 ; slt_u r5, r6, r7 } + { add r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 } + { add r15, r16, r17 ; shr r5, r6, r7 ; lb_u r25, r26 } + { add r15, r16, r17 ; shri r5, r6, 5 } + { add r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 } + { add r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 } + { add r15, r16, r17 ; slti r5, r6, 5 } + { add r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 } + { add r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + { add r15, r16, r17 ; sub r5, r6, r7 } + { add r15, r16, r17 ; sw r25, r26 ; mulhh_uu r5, r6, r7 } + { add r15, r16, r17 ; sw r25, r26 ; s3a r5, r6, r7 } + { add r15, r16, r17 ; sw r25, r26 ; tblidxb3 r5, r6 } + { add r15, r16, r17 ; tblidxb1 r5, r6 ; sh r25, r26 } + { add r15, r16, r17 ; tblidxb3 r5, r6 ; sh r25, r26 } + { add r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 } + { add r5, r6, r7 ; addli r15, r16, 0x1234 } + { add r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + { add r5, r6, r7 ; ill ; lh r25, r26 } + { add r5, r6, r7 ; inthh r15, r16, r17 } + { add r5, r6, r7 ; lb r25, r26 ; mz r15, r16, r17 } + { add r5, r6, r7 ; lb r25, r26 ; slti r15, r16, 5 } + { add r5, r6, r7 ; lb_u r25, r26 ; nop } + { add r5, r6, r7 ; lb_u r25, r26 ; slti_u r15, r16, 5 } + { add r5, r6, r7 ; lh r25, r26 ; mz r15, r16, r17 } + { add r5, r6, r7 ; lh r25, r26 ; slti r15, r16, 5 } + { add r5, r6, r7 ; lh_u r25, r26 ; nop } + { add r5, r6, r7 ; lh_u r25, r26 ; slti_u r15, r16, 5 } + { add r5, r6, r7 ; lw r25, r26 ; movei r15, 5 } + { add r5, r6, r7 ; lw r25, r26 ; slte_u r15, r16, r17 } + { add r5, r6, r7 ; minib_u r15, r16, 5 } + { add r5, r6, r7 ; move r15, r16 ; prefetch r25 } + { add r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + { add r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 } + { add r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 } + { add r5, r6, r7 ; prefetch r25 ; ill } + { add r5, r6, r7 ; prefetch r25 ; shri r15, r16, 5 } + { add r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 } + { add r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 } + { add r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + { add r5, r6, r7 ; sb r25, r26 ; rl r15, r16, r17 } + { add r5, r6, r7 ; sb r25, r26 ; sub r15, r16, r17 } + { add r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + { add r5, r6, r7 ; sh r25, r26 ; nop } + { add r5, r6, r7 ; sh r25, r26 ; slti_u r15, r16, 5 } + { add r5, r6, r7 ; shli r15, r16, 5 ; lb r25, r26 } + { add r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 } + { add r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 } + { add r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 } + { add r5, r6, r7 ; slteh r15, r16, r17 } + { add r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 } + { add r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 } + { add r5, r6, r7 ; srai r15, r16, 5 ; sw r25, r26 } + { add r5, r6, r7 ; sw r25, r26 ; add r15, r16, r17 } + { add r5, r6, r7 ; sw r25, r26 ; seq r15, r16, r17 } + { add r5, r6, r7 ; wh64 r15 } + { addb r15, r16, r17 ; addli r5, r6, 0x1234 } + { addb r15, r16, r17 ; inthb r5, r6, r7 } + { addb r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { addb r15, r16, r17 ; mullla_su r5, r6, r7 } + { addb r15, r16, r17 ; s2a r5, r6, r7 } + { addb r15, r16, r17 ; shr r5, r6, r7 } + { addb r15, r16, r17 ; sltib r5, r6, 5 } + { addb r15, r16, r17 ; tblidxb1 r5, r6 } + { addb r5, r6, r7 ; finv r15 } + { addb r5, r6, r7 ; lbadd_u r15, r16, 5 } + { addb r5, r6, r7 ; mm r15, r16, r17, 5, 7 } + { addb r5, r6, r7 ; prefetch r15 } + { addb r5, r6, r7 ; shli r15, r16, 5 } + { addb r5, r6, r7 ; slth_u r15, r16, r17 } + { addb r5, r6, r7 ; subhs r15, r16, r17 } + { addbs_u r15, r16, r17 ; adiffh r5, r6, r7 } + { addbs_u r15, r16, r17 ; maxb_u r5, r6, r7 } + { addbs_u r15, r16, r17 ; mulhha_su r5, r6, r7 } + { addbs_u r15, r16, r17 ; mvz r5, r6, r7 } + { addbs_u r15, r16, r17 ; sadah_u r5, r6, r7 } + { addbs_u r15, r16, r17 ; shrib r5, r6, 5 } + { addbs_u r15, r16, r17 ; sne r5, r6, r7 } + { addbs_u r15, r16, r17 ; xori r5, r6, 5 } + { addbs_u r5, r6, r7 ; ill } + { addbs_u r5, r6, r7 ; lhadd_u r15, r16, 5 } + { addbs_u r5, r6, r7 ; move r15, r16 } + { addbs_u r5, r6, r7 ; s1a r15, r16, r17 } + { addbs_u r5, r6, r7 ; shrb r15, r16, r17 } + { addbs_u r5, r6, r7 ; sltib_u r15, r16, 5 } + { addbs_u r5, r6, r7 ; tns r15, r16 } + { addh r15, r16, r17 ; avgb_u r5, r6, r7 } + { addh r15, r16, r17 ; minb_u r5, r6, r7 } + { addh r15, r16, r17 ; mulhl_su r5, r6, r7 } + { addh r15, r16, r17 ; nop } + { addh r15, r16, r17 ; seq r5, r6, r7 } + { addh r15, r16, r17 ; sltb r5, r6, r7 } + { addh r15, r16, r17 ; srab r5, r6, r7 } + { addh r5, r6, r7 ; addh r15, r16, r17 } + { addh r5, r6, r7 ; inthh r15, r16, r17 } + { addh r5, r6, r7 ; lwadd r15, r16, 5 } + { addh r5, r6, r7 ; mtspr 0x5, r16 } + { addh r5, r6, r7 ; sbadd r15, r16, 5 } + { addh r5, r6, r7 ; shrih r15, r16, 5 } + { addh r5, r6, r7 ; sneb r15, r16, r17 } + { addhs r15, r16, r17 ; add r5, r6, r7 } + { addhs r15, r16, r17 ; clz r5, r6 } + { addhs r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + { addhs r15, r16, r17 ; mulhla_su r5, r6, r7 } + { addhs r15, r16, r17 ; packbs_u r5, r6, r7 } + { addhs r15, r16, r17 ; seqib r5, r6, 5 } + { addhs r15, r16, r17 ; slteb r5, r6, r7 } + { addhs r15, r16, r17 ; sraih r5, r6, 5 } + { addhs r5, r6, r7 ; addih r15, r16, 5 } + { addhs r5, r6, r7 ; iret } + { addhs r5, r6, r7 ; maxib_u r15, r16, 5 } + { addhs r5, r6, r7 ; nop } + { addhs r5, r6, r7 ; seqi r15, r16, 5 } + { addhs r5, r6, r7 ; sltb_u r15, r16, r17 } + { addhs r5, r6, r7 ; srah r15, r16, r17 } + { addi r15, r16, 5 ; add r5, r6, r7 ; lw r25, r26 } + { addi r15, r16, 5 ; addib r5, r6, 5 } + { addi r15, r16, 5 ; andi r5, r6, 5 ; lh_u r25, r26 } + { addi r15, r16, 5 ; bytex r5, r6 ; lb r25, r26 } + { addi r15, r16, 5 ; crc32_32 r5, r6, r7 } + { addi r15, r16, 5 ; fnop ; sh r25, r26 } + { addi r15, r16, 5 ; lb r25, r26 ; and r5, r6, r7 } + { addi r15, r16, 5 ; lb r25, r26 ; mvnz r5, r6, r7 } + { addi r15, r16, 5 ; lb r25, r26 ; slt_u r5, r6, r7 } + { addi r15, r16, 5 ; lb_u r25, r26 ; bytex r5, r6 } + { addi r15, r16, 5 ; lb_u r25, r26 ; nop } + { addi r15, r16, 5 ; lb_u r25, r26 ; slti r5, r6, 5 } + { addi r15, r16, 5 ; lh r25, r26 ; fnop } + { addi r15, r16, 5 ; lh r25, r26 ; ori r5, r6, 5 } + { addi r15, r16, 5 ; lh r25, r26 ; sra r5, r6, r7 } + { addi r15, r16, 5 ; lh_u r25, r26 ; move r5, r6 } + { addi r15, r16, 5 ; lh_u r25, r26 ; rli r5, r6, 5 } + { addi r15, r16, 5 ; lh_u r25, r26 ; tblidxb0 r5, r6 } + { addi r15, r16, 5 ; lw r25, r26 ; mulhh_uu r5, r6, r7 } + { addi r15, r16, 5 ; lw r25, r26 ; s3a r5, r6, r7 } + { addi r15, r16, 5 ; lw r25, r26 ; tblidxb3 r5, r6 } + { addi r15, r16, 5 ; mnz r5, r6, r7 ; sw r25, r26 } + { addi r15, r16, 5 ; movei r5, 5 ; sb r25, r26 } + { addi r15, r16, 5 ; mulhh_uu r5, r6, r7 ; lh_u r25, r26 } + { addi r15, r16, 5 ; mulhha_uu r5, r6, r7 ; lh r25, r26 } + { addi r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; lh_u r25, r26 } + { addi r15, r16, 5 ; mulll_uu r5, r6, r7 ; lh r25, r26 } + { addi r15, r16, 5 ; mullla_uu r5, r6, r7 ; lb_u r25, r26 } + { addi r15, r16, 5 ; mvz r5, r6, r7 ; lb r25, r26 } + { addi r15, r16, 5 ; mzb r5, r6, r7 } + { addi r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 } + { addi r15, r16, 5 ; ori r5, r6, 5 ; sw r25, r26 } + { addi r15, r16, 5 ; prefetch r25 ; bitx r5, r6 } + { addi r15, r16, 5 ; prefetch r25 ; mz r5, r6, r7 } + { addi r15, r16, 5 ; prefetch r25 ; slte_u r5, r6, r7 } + { addi r15, r16, 5 ; rl r5, r6, r7 ; sh r25, r26 } + { addi r15, r16, 5 ; s1a r5, r6, r7 ; sh r25, r26 } + { addi r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 } + { addi r15, r16, 5 ; sb r25, r26 ; move r5, r6 } + { addi r15, r16, 5 ; sb r25, r26 ; rli r5, r6, 5 } + { addi r15, r16, 5 ; sb r25, r26 ; tblidxb0 r5, r6 } + { addi r15, r16, 5 ; seqi r5, r6, 5 ; lh r25, r26 } + { addi r15, r16, 5 ; sh r25, r26 ; mnz r5, r6, r7 } + { addi r15, r16, 5 ; sh r25, r26 ; rl r5, r6, r7 } + { addi r15, r16, 5 ; sh r25, r26 ; sub r5, r6, r7 } + { addi r15, r16, 5 ; shli r5, r6, 5 ; lb_u r25, r26 } + { addi r15, r16, 5 ; shr r5, r6, r7 } + { addi r15, r16, 5 ; slt r5, r6, r7 ; prefetch r25 } + { addi r15, r16, 5 ; slte r5, r6, r7 ; lh_u r25, r26 } + { addi r15, r16, 5 ; slteh_u r5, r6, r7 } + { addi r15, r16, 5 ; slti_u r5, r6, 5 ; sh r25, r26 } + { addi r15, r16, 5 ; sra r5, r6, r7 ; lb_u r25, r26 } + { addi r15, r16, 5 ; srai r5, r6, 5 } + { addi r15, r16, 5 ; sw r25, r26 ; and r5, r6, r7 } + { addi r15, r16, 5 ; sw r25, r26 ; mvnz r5, r6, r7 } + { addi r15, r16, 5 ; sw r25, r26 ; slt_u r5, r6, r7 } + { addi r15, r16, 5 ; tblidxb0 r5, r6 ; prefetch r25 } + { addi r15, r16, 5 ; tblidxb2 r5, r6 ; prefetch r25 } + { addi r15, r16, 5 ; xor r5, r6, r7 ; prefetch r25 } + { addi r5, r6, 5 ; addi r15, r16, 5 ; lb r25, r26 } + { addi r5, r6, 5 ; and r15, r16, r17 ; prefetch r25 } + { addi r5, r6, 5 ; fnop ; lb_u r25, r26 } + { addi r5, r6, 5 ; info 19 ; lb r25, r26 } + { addi r5, r6, 5 ; jrp r15 } + { addi r5, r6, 5 ; lb r25, r26 ; s2a r15, r16, r17 } + { addi r5, r6, 5 ; lb_u r15, r16 } + { addi r5, r6, 5 ; lb_u r25, r26 ; s3a r15, r16, r17 } + { addi r5, r6, 5 ; lbadd_u r15, r16, 5 } + { addi r5, r6, 5 ; lh r25, r26 ; s2a r15, r16, r17 } + { addi r5, r6, 5 ; lh_u r15, r16 } + { addi r5, r6, 5 ; lh_u r25, r26 ; s3a r15, r16, r17 } + { addi r5, r6, 5 ; lhadd_u r15, r16, 5 } + { addi r5, r6, 5 ; lw r25, r26 ; s1a r15, r16, r17 } + { addi r5, r6, 5 ; lw r25, r26 } + { addi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 } + { addi r5, r6, 5 ; movei r15, 5 ; lh_u r25, r26 } + { addi r5, r6, 5 ; mzb r15, r16, r17 } + { addi r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 } + { addi r5, r6, 5 ; ori r15, r16, 5 ; sw r25, r26 } + { addi r5, r6, 5 ; prefetch r25 ; or r15, r16, r17 } + { addi r5, r6, 5 ; prefetch r25 ; sra r15, r16, r17 } + { addi r5, r6, 5 ; rli r15, r16, 5 ; lw r25, r26 } + { addi r5, r6, 5 ; s2a r15, r16, r17 ; lw r25, r26 } + { addi r5, r6, 5 ; sb r25, r26 ; andi r15, r16, 5 } + { addi r5, r6, 5 ; sb r25, r26 ; shli r15, r16, 5 } + { addi r5, r6, 5 ; seq r15, r16, r17 ; lw r25, r26 } + { addi r5, r6, 5 ; sh r15, r16 } + { addi r5, r6, 5 ; sh r25, r26 ; s3a r15, r16, r17 } + { addi r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 } + { addi r5, r6, 5 ; shli r15, r16, 5 ; sw r25, r26 } + { addi r5, r6, 5 ; shri r15, r16, 5 ; lw r25, r26 } + { addi r5, r6, 5 ; slt_u r15, r16, r17 ; lh r25, r26 } + { addi r5, r6, 5 ; slte_u r15, r16, r17 ; lb r25, r26 } + { addi r5, r6, 5 ; slti r15, r16, 5 ; lw r25, r26 } + { addi r5, r6, 5 ; sne r15, r16, r17 ; lb r25, r26 } + { addi r5, r6, 5 ; sra r15, r16, r17 ; sw r25, r26 } + { addi r5, r6, 5 ; sub r15, r16, r17 ; lw r25, r26 } + { addi r5, r6, 5 ; sw r25, r26 ; move r15, r16 } + { addi r5, r6, 5 ; sw r25, r26 ; slte r15, r16, r17 } + { addi r5, r6, 5 ; xor r15, r16, r17 ; sh r25, r26 } + { addib r15, r16, 5 ; avgb_u r5, r6, r7 } + { addib r15, r16, 5 ; minb_u r5, r6, r7 } + { addib r15, r16, 5 ; mulhl_su r5, r6, r7 } + { addib r15, r16, 5 ; nop } + { addib r15, r16, 5 ; seq r5, r6, r7 } + { addib r15, r16, 5 ; sltb r5, r6, r7 } + { addib r15, r16, 5 ; srab r5, r6, r7 } + { addib r5, r6, 5 ; addh r15, r16, r17 } + { addib r5, r6, 5 ; inthh r15, r16, r17 } + { addib r5, r6, 5 ; lwadd r15, r16, 5 } + { addib r5, r6, 5 ; mtspr 0x5, r16 } + { addib r5, r6, 5 ; sbadd r15, r16, 5 } + { addib r5, r6, 5 ; shrih r15, r16, 5 } + { addib r5, r6, 5 ; sneb r15, r16, r17 } + { addih r15, r16, 5 ; add r5, r6, r7 } + { addih r15, r16, 5 ; clz r5, r6 } + { addih r15, r16, 5 ; mm r5, r6, r7, 5, 7 } + { addih r15, r16, 5 ; mulhla_su r5, r6, r7 } + { addih r15, r16, 5 ; packbs_u r5, r6, r7 } + { addih r15, r16, 5 ; seqib r5, r6, 5 } + { addih r15, r16, 5 ; slteb r5, r6, r7 } + { addih r15, r16, 5 ; sraih r5, r6, 5 } + { addih r5, r6, 5 ; addih r15, r16, 5 } + { addih r5, r6, 5 ; iret } + { addih r5, r6, 5 ; maxib_u r15, r16, 5 } + { addih r5, r6, 5 ; nop } + { addih r5, r6, 5 ; seqi r15, r16, 5 } + { addih r5, r6, 5 ; sltb_u r15, r16, r17 } + { addih r5, r6, 5 ; srah r15, r16, r17 } + { addli r15, r16, 0x1234 ; addhs r5, r6, r7 } + { addli r15, r16, 0x1234 ; dword_align r5, r6, r7 } + { addli r15, r16, 0x1234 ; move r5, r6 } + { addli r15, r16, 0x1234 ; mulll_ss r5, r6, r7 } + { addli r15, r16, 0x1234 ; pcnt r5, r6 } + { addli r15, r16, 0x1234 ; shlh r5, r6, r7 } + { addli r15, r16, 0x1234 ; slth r5, r6, r7 } + { addli r15, r16, 0x1234 ; subh r5, r6, r7 } + { addli r5, r6, 0x1234 ; and r15, r16, r17 } + { addli r5, r6, 0x1234 ; jrp r15 } + { addli r5, r6, 0x1234 ; minb_u r15, r16, r17 } + { addli r5, r6, 0x1234 ; packbs_u r15, r16, r17 } + { addli r5, r6, 0x1234 ; shadd r15, r16, 5 } + { addli r5, r6, 0x1234 ; slteb_u r15, r16, r17 } + { addli r5, r6, 0x1234 ; sub r15, r16, r17 } + { addlis r15, r16, 0x1234 ; addli r5, r6, 0x1234 } + { addlis r15, r16, 0x1234 ; inthh r5, r6, r7 } + { addlis r15, r16, 0x1234 ; mulhh_uu r5, r6, r7 } + { addlis r15, r16, 0x1234 ; mulllsa_uu r5, r6, r7 } + { addlis r15, r16, 0x1234 ; sadab_u r5, r6, r7 } + { addlis r15, r16, 0x1234 ; shrh r5, r6, r7 } + { addlis r15, r16, 0x1234 ; sltih r5, r6, 5 } + { addlis r15, r16, 0x1234 ; tblidxb3 r5, r6 } + { addlis r5, r6, 0x1234 ; icoh r15 } + { addlis r5, r6, 0x1234 ; lhadd r15, r16, 5 } + { addlis r5, r6, 0x1234 ; mnzh r15, r16, r17 } + { addlis r5, r6, 0x1234 ; s1a r15, r16, r17 } + { addlis r5, r6, 0x1234 ; shrb r15, r16, r17 } + { addlis r5, r6, 0x1234 ; sltib_u r15, r16, 5 } + { addlis r5, r6, 0x1234 ; tns r15, r16 } + { adds r15, r16, r17 ; avgb_u r5, r6, r7 } + { adds r15, r16, r17 ; minb_u r5, r6, r7 } + { adds r15, r16, r17 ; mulhl_su r5, r6, r7 } + { adds r15, r16, r17 ; nop } + { adds r15, r16, r17 ; seq r5, r6, r7 } + { adds r15, r16, r17 ; sltb r5, r6, r7 } + { adds r15, r16, r17 ; srab r5, r6, r7 } + { adds r5, r6, r7 ; addh r15, r16, r17 } + { adds r5, r6, r7 ; inthh r15, r16, r17 } + { adds r5, r6, r7 ; lwadd r15, r16, 5 } + { adds r5, r6, r7 ; mtspr 0x5, r16 } + { adds r5, r6, r7 ; sbadd r15, r16, 5 } + { adds r5, r6, r7 ; shrih r15, r16, 5 } + { adds r5, r6, r7 ; sneb r15, r16, r17 } + { adiffb_u r5, r6, r7 ; add r15, r16, r17 } + { adiffb_u r5, r6, r7 ; info 19 } + { adiffb_u r5, r6, r7 ; lnk r15 } + { adiffb_u r5, r6, r7 ; movei r15, 5 } + { adiffb_u r5, r6, r7 ; s2a r15, r16, r17 } + { adiffb_u r5, r6, r7 ; shrh r15, r16, r17 } + { adiffb_u r5, r6, r7 ; sltih r15, r16, 5 } + { adiffb_u r5, r6, r7 ; wh64 r15 } + { adiffh r5, r6, r7 ; fnop } + { adiffh r5, r6, r7 ; lh_u r15, r16 } + { adiffh r5, r6, r7 ; mnzb r15, r16, r17 } + { adiffh r5, r6, r7 ; rl r15, r16, r17 } + { adiffh r5, r6, r7 ; shlih r15, r16, 5 } + { adiffh r5, r6, r7 ; slti_u r15, r16, 5 } + { adiffh r5, r6, r7 ; sw r15, r16 } + { and r15, r16, r17 ; addi r5, r6, 5 ; lb r25, r26 } + { and r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 } + { and r15, r16, r17 ; bitx r5, r6 ; lb r25, r26 } + { and r15, r16, r17 ; clz r5, r6 ; lb r25, r26 } + { and r15, r16, r17 ; ctz r5, r6 ; sw r25, r26 } + { and r15, r16, r17 ; info 19 ; sh r25, r26 } + { and r15, r16, r17 ; lb r25, r26 ; movei r5, 5 } + { and r15, r16, r17 ; lb r25, r26 ; s1a r5, r6, r7 } + { and r15, r16, r17 ; lb r25, r26 ; tblidxb1 r5, r6 } + { and r15, r16, r17 ; lb_u r25, r26 ; mulhha_ss r5, r6, r7 } + { and r15, r16, r17 ; lb_u r25, r26 ; seq r5, r6, r7 } + { and r15, r16, r17 ; lb_u r25, r26 ; xor r5, r6, r7 } + { and r15, r16, r17 ; lh r25, r26 ; mulll_ss r5, r6, r7 } + { and r15, r16, r17 ; lh r25, r26 ; shli r5, r6, 5 } + { and r15, r16, r17 ; lh_u r25, r26 ; addi r5, r6, 5 } + { and r15, r16, r17 ; lh_u r25, r26 ; mullla_uu r5, r6, r7 } + { and r15, r16, r17 ; lh_u r25, r26 ; slt r5, r6, r7 } + { and r15, r16, r17 ; lw r25, r26 ; bitx r5, r6 } + { and r15, r16, r17 ; lw r25, r26 ; mz r5, r6, r7 } + { and r15, r16, r17 ; lw r25, r26 ; slte_u r5, r6, r7 } + { and r15, r16, r17 ; minih r5, r6, 5 } + { and r15, r16, r17 ; move r5, r6 ; sb r25, r26 } + { and r15, r16, r17 ; mulhh_ss r5, r6, r7 ; lw r25, r26 } + { and r15, r16, r17 ; mulhha_ss r5, r6, r7 ; lh_u r25, r26 } + { and r15, r16, r17 ; mulhl_su r5, r6, r7 } + { and r15, r16, r17 ; mulll_ss r5, r6, r7 ; lh_u r25, r26 } + { and r15, r16, r17 ; mullla_ss r5, r6, r7 ; lh r25, r26 } + { and r15, r16, r17 ; mvnz r5, r6, r7 ; lb r25, r26 } + { and r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 } + { and r15, r16, r17 ; nop ; sw r25, r26 } + { and r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 } + { and r15, r16, r17 ; pcnt r5, r6 ; lw r25, r26 } + { and r15, r16, r17 ; prefetch r25 ; mulhh_uu r5, r6, r7 } + { and r15, r16, r17 ; prefetch r25 ; s3a r5, r6, r7 } + { and r15, r16, r17 ; prefetch r25 ; tblidxb3 r5, r6 } + { and r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 } + { and r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 } + { and r15, r16, r17 ; sb r25, r26 ; addi r5, r6, 5 } + { and r15, r16, r17 ; sb r25, r26 ; mullla_uu r5, r6, r7 } + { and r15, r16, r17 ; sb r25, r26 ; slt r5, r6, r7 } + { and r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 } + { and r15, r16, r17 ; sh r25, r26 ; add r5, r6, r7 } + { and r15, r16, r17 ; sh r25, r26 ; mullla_ss r5, r6, r7 } + { and r15, r16, r17 ; sh r25, r26 ; shri r5, r6, 5 } + { and r15, r16, r17 ; shl r5, r6, r7 ; lh_u r25, r26 } + { and r15, r16, r17 ; shlih r5, r6, 5 } + { and r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 } + { and r15, r16, r17 ; slt_u r5, r6, r7 ; prefetch r25 } + { and r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 } + { and r15, r16, r17 ; slti r5, r6, 5 ; sh r25, r26 } + { and r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 } + { and r15, r16, r17 ; srah r5, r6, r7 } + { and r15, r16, r17 ; sub r5, r6, r7 ; sh r25, r26 } + { and r15, r16, r17 ; sw r25, r26 ; movei r5, 5 } + { and r15, r16, r17 ; sw r25, r26 ; s1a r5, r6, r7 } + { and r15, r16, r17 ; sw r25, r26 ; tblidxb1 r5, r6 } + { and r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch r25 } + { and r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch r25 } + { and r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 } + { and r5, r6, r7 ; addib r15, r16, 5 } + { and r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + { and r5, r6, r7 ; ill ; lb r25, r26 } + { and r5, r6, r7 ; infol 0x1234 } + { and r5, r6, r7 ; lb r25, r26 ; move r15, r16 } + { and r5, r6, r7 ; lb r25, r26 ; slte r15, r16, r17 } + { and r5, r6, r7 ; lb_u r25, r26 ; movei r15, 5 } + { and r5, r6, r7 ; lb_u r25, r26 ; slte_u r15, r16, r17 } + { and r5, r6, r7 ; lh r25, r26 ; move r15, r16 } + { and r5, r6, r7 ; lh r25, r26 ; slte r15, r16, r17 } + { and r5, r6, r7 ; lh_u r25, r26 ; movei r15, 5 } + { and r5, r6, r7 ; lh_u r25, r26 ; slte_u r15, r16, r17 } + { and r5, r6, r7 ; lw r25, r26 ; mnz r15, r16, r17 } + { and r5, r6, r7 ; lw r25, r26 ; slt_u r15, r16, r17 } + { and r5, r6, r7 ; minb_u r15, r16, r17 } + { and r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 } + { and r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 } + { and r5, r6, r7 ; nop ; sw r25, r26 } + { and r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 } + { and r5, r6, r7 ; prefetch r25 ; andi r15, r16, 5 } + { and r5, r6, r7 ; prefetch r25 ; shli r15, r16, 5 } + { and r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + { and r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 } + { and r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 } + { and r5, r6, r7 ; sb r25, r26 ; or r15, r16, r17 } + { and r5, r6, r7 ; sb r25, r26 ; sra r15, r16, r17 } + { and r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 } + { and r5, r6, r7 ; sh r25, r26 ; movei r15, 5 } + { and r5, r6, r7 ; sh r25, r26 ; slte_u r15, r16, r17 } + { and r5, r6, r7 ; shlb r15, r16, r17 } + { and r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 } + { and r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 } + { and r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 } + { and r5, r6, r7 ; slteb r15, r16, r17 } + { and r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 } + { and r5, r6, r7 ; sneb r15, r16, r17 } + { and r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 } + { and r5, r6, r7 ; subs r15, r16, r17 } + { and r5, r6, r7 ; sw r25, r26 ; s2a r15, r16, r17 } + { and r5, r6, r7 ; swadd r15, r16, 5 } + { andi r15, r16, 5 ; add r5, r6, r7 ; sb r25, r26 } + { andi r15, r16, 5 ; addli r5, r6, 0x1234 } + { andi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 } + { andi r15, r16, 5 ; bytex r5, r6 ; lh r25, r26 } + { andi r15, r16, 5 ; ctz r5, r6 ; lb r25, r26 } + { andi r15, r16, 5 ; fnop } + { andi r15, r16, 5 ; lb r25, r26 ; bitx r5, r6 } + { andi r15, r16, 5 ; lb r25, r26 ; mz r5, r6, r7 } + { andi r15, r16, 5 ; lb r25, r26 ; slte_u r5, r6, r7 } + { andi r15, r16, 5 ; lb_u r25, r26 ; ctz r5, r6 } + { andi r15, r16, 5 ; lb_u r25, r26 ; or r5, r6, r7 } + { andi r15, r16, 5 ; lb_u r25, r26 ; sne r5, r6, r7 } + { andi r15, r16, 5 ; lh r25, r26 ; mnz r5, r6, r7 } + { andi r15, r16, 5 ; lh r25, r26 ; rl r5, r6, r7 } + { andi r15, r16, 5 ; lh r25, r26 ; sub r5, r6, r7 } + { andi r15, r16, 5 ; lh_u r25, r26 ; mulhh_ss r5, r6, r7 } + { andi r15, r16, 5 ; lh_u r25, r26 ; s2a r5, r6, r7 } + { andi r15, r16, 5 ; lh_u r25, r26 ; tblidxb2 r5, r6 } + { andi r15, r16, 5 ; lw r25, r26 ; mulhha_uu r5, r6, r7 } + { andi r15, r16, 5 ; lw r25, r26 ; seqi r5, r6, 5 } + { andi r15, r16, 5 ; lw r25, r26 } + { andi r15, r16, 5 ; mnzb r5, r6, r7 } + { andi r15, r16, 5 ; movei r5, 5 ; sw r25, r26 } + { andi r15, r16, 5 ; mulhh_uu r5, r6, r7 ; prefetch r25 } + { andi r15, r16, 5 ; mulhha_uu r5, r6, r7 ; lw r25, r26 } + { andi r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; prefetch r25 } + { andi r15, r16, 5 ; mulll_uu r5, r6, r7 ; lw r25, r26 } + { andi r15, r16, 5 ; mullla_uu r5, r6, r7 ; lh_u r25, r26 } + { andi r15, r16, 5 ; mvz r5, r6, r7 ; lh r25, r26 } + { andi r15, r16, 5 ; nop ; lb r25, r26 } + { andi r15, r16, 5 ; or r5, r6, r7 ; lb r25, r26 } + { andi r15, r16, 5 ; packbs_u r5, r6, r7 } + { andi r15, r16, 5 ; prefetch r25 ; clz r5, r6 } + { andi r15, r16, 5 ; prefetch r25 ; nor r5, r6, r7 } + { andi r15, r16, 5 ; prefetch r25 ; slti_u r5, r6, 5 } + { andi r15, r16, 5 ; rl r5, r6, r7 } + { andi r15, r16, 5 ; s1a r5, r6, r7 } + { andi r15, r16, 5 ; s3a r5, r6, r7 } + { andi r15, r16, 5 ; sb r25, r26 ; mulhh_ss r5, r6, r7 } + { andi r15, r16, 5 ; sb r25, r26 ; s2a r5, r6, r7 } + { andi r15, r16, 5 ; sb r25, r26 ; tblidxb2 r5, r6 } + { andi r15, r16, 5 ; seqi r5, r6, 5 ; lw r25, r26 } + { andi r15, r16, 5 ; sh r25, r26 ; movei r5, 5 } + { andi r15, r16, 5 ; sh r25, r26 ; s1a r5, r6, r7 } + { andi r15, r16, 5 ; sh r25, r26 ; tblidxb1 r5, r6 } + { andi r15, r16, 5 ; shli r5, r6, 5 ; lh_u r25, r26 } + { andi r15, r16, 5 ; shrh r5, r6, r7 } + { andi r15, r16, 5 ; slt r5, r6, r7 ; sh r25, r26 } + { andi r15, r16, 5 ; slte r5, r6, r7 ; prefetch r25 } + { andi r15, r16, 5 ; slth_u r5, r6, r7 } + { andi r15, r16, 5 ; slti_u r5, r6, 5 } + { andi r15, r16, 5 ; sra r5, r6, r7 ; lh_u r25, r26 } + { andi r15, r16, 5 ; sraih r5, r6, 5 } + { andi r15, r16, 5 ; sw r25, r26 ; bitx r5, r6 } + { andi r15, r16, 5 ; sw r25, r26 ; mz r5, r6, r7 } + { andi r15, r16, 5 ; sw r25, r26 ; slte_u r5, r6, r7 } + { andi r15, r16, 5 ; tblidxb0 r5, r6 ; sh r25, r26 } + { andi r15, r16, 5 ; tblidxb2 r5, r6 ; sh r25, r26 } + { andi r15, r16, 5 ; xor r5, r6, r7 ; sh r25, r26 } + { andi r5, r6, 5 ; addi r15, r16, 5 ; lh r25, r26 } + { andi r5, r6, 5 ; and r15, r16, r17 ; sh r25, r26 } + { andi r5, r6, 5 ; fnop ; lh_u r25, r26 } + { andi r5, r6, 5 ; info 19 ; lh r25, r26 } + { andi r5, r6, 5 ; lb r25, r26 ; add r15, r16, r17 } + { andi r5, r6, 5 ; lb r25, r26 ; seq r15, r16, r17 } + { andi r5, r6, 5 ; lb_u r25, r26 ; addi r15, r16, 5 } + { andi r5, r6, 5 ; lb_u r25, r26 ; seqi r15, r16, 5 } + { andi r5, r6, 5 ; lh r25, r26 ; add r15, r16, r17 } + { andi r5, r6, 5 ; lh r25, r26 ; seq r15, r16, r17 } + { andi r5, r6, 5 ; lh_u r25, r26 ; addi r15, r16, 5 } + { andi r5, r6, 5 ; lh_u r25, r26 ; seqi r15, r16, 5 } + { andi r5, r6, 5 ; lw r15, r16 } + { andi r5, r6, 5 ; lw r25, r26 ; s3a r15, r16, r17 } + { andi r5, r6, 5 ; lwadd r15, r16, 5 } + { andi r5, r6, 5 ; mnz r15, r16, r17 ; sh r25, r26 } + { andi r5, r6, 5 ; movei r15, 5 ; prefetch r25 } + { andi r5, r6, 5 ; nop ; lb r25, r26 } + { andi r5, r6, 5 ; or r15, r16, r17 ; lb r25, r26 } + { andi r5, r6, 5 ; packbs_u r15, r16, r17 } + { andi r5, r6, 5 ; prefetch r25 ; rl r15, r16, r17 } + { andi r5, r6, 5 ; prefetch r25 ; sub r15, r16, r17 } + { andi r5, r6, 5 ; rli r15, r16, 5 ; sb r25, r26 } + { andi r5, r6, 5 ; s2a r15, r16, r17 ; sb r25, r26 } + { andi r5, r6, 5 ; sb r25, r26 ; ill } + { andi r5, r6, 5 ; sb r25, r26 ; shri r15, r16, 5 } + { andi r5, r6, 5 ; seq r15, r16, r17 ; sb r25, r26 } + { andi r5, r6, 5 ; sh r25, r26 ; addi r15, r16, 5 } + { andi r5, r6, 5 ; sh r25, r26 ; seqi r15, r16, 5 } + { andi r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 } + { andi r5, r6, 5 ; shlib r15, r16, 5 } + { andi r5, r6, 5 ; shri r15, r16, 5 ; sb r25, r26 } + { andi r5, r6, 5 ; slt_u r15, r16, r17 ; lw r25, r26 } + { andi r5, r6, 5 ; slte_u r15, r16, r17 ; lh r25, r26 } + { andi r5, r6, 5 ; slti r15, r16, 5 ; sb r25, r26 } + { andi r5, r6, 5 ; sne r15, r16, r17 ; lh r25, r26 } + { andi r5, r6, 5 ; srab r15, r16, r17 } + { andi r5, r6, 5 ; sub r15, r16, r17 ; sb r25, r26 } + { andi r5, r6, 5 ; sw r25, r26 ; mz r15, r16, r17 } + { andi r5, r6, 5 ; sw r25, r26 ; slti r15, r16, 5 } + { andi r5, r6, 5 ; xor r15, r16, r17 } + { auli r15, r16, 0x1234 ; bitx r5, r6 } + { auli r15, r16, 0x1234 ; minib_u r5, r6, 5 } + { auli r15, r16, 0x1234 ; mulhl_uu r5, r6, r7 } + { auli r15, r16, 0x1234 ; or r5, r6, r7 } + { auli r15, r16, 0x1234 ; seqh r5, r6, r7 } + { auli r15, r16, 0x1234 ; slte r5, r6, r7 } + { auli r15, r16, 0x1234 ; srai r5, r6, 5 } + { auli r5, r6, 0x1234 ; addi r15, r16, 5 } + { auli r5, r6, 0x1234 ; intlh r15, r16, r17 } + { auli r5, r6, 0x1234 ; maxb_u r15, r16, r17 } + { auli r5, r6, 0x1234 ; mzb r15, r16, r17 } + { auli r5, r6, 0x1234 ; seqb r15, r16, r17 } + { auli r5, r6, 0x1234 ; slt_u r15, r16, r17 } + { auli r5, r6, 0x1234 ; sra r15, r16, r17 } + { avgb_u r5, r6, r7 ; addbs_u r15, r16, r17 } + { avgb_u r5, r6, r7 ; inthb r15, r16, r17 } + { avgb_u r5, r6, r7 ; lw_na r15, r16 } + { avgb_u r5, r6, r7 ; movelis r15, 0x1234 } + { avgb_u r5, r6, r7 ; sb r15, r16 } + { avgb_u r5, r6, r7 ; shrib r15, r16, 5 } + { avgb_u r5, r6, r7 ; sne r15, r16, r17 } + { avgb_u r5, r6, r7 ; xori r15, r16, 5 } + { avgh r5, r6, r7 ; ill } + { avgh r5, r6, r7 ; lhadd_u r15, r16, 5 } + { avgh r5, r6, r7 ; move r15, r16 } + { avgh r5, r6, r7 ; s1a r15, r16, r17 } + { avgh r5, r6, r7 ; shrb r15, r16, r17 } + { avgh r5, r6, r7 ; sltib_u r15, r16, 5 } + { avgh r5, r6, r7 ; tns r15, r16 } + { bitx r5, r6 ; addi r15, r16, 5 ; lh r25, r26 } + { bitx r5, r6 ; and r15, r16, r17 ; sh r25, r26 } + { bitx r5, r6 ; fnop ; lh_u r25, r26 } + { bitx r5, r6 ; info 19 ; lh r25, r26 } + { bitx r5, r6 ; lb r25, r26 ; add r15, r16, r17 } + { bitx r5, r6 ; lb r25, r26 ; seq r15, r16, r17 } + { bitx r5, r6 ; lb_u r25, r26 ; addi r15, r16, 5 } + { bitx r5, r6 ; lb_u r25, r26 ; seqi r15, r16, 5 } + { bitx r5, r6 ; lh r25, r26 ; add r15, r16, r17 } + { bitx r5, r6 ; lh r25, r26 ; seq r15, r16, r17 } + { bitx r5, r6 ; lh_u r25, r26 ; addi r15, r16, 5 } + { bitx r5, r6 ; lh_u r25, r26 ; seqi r15, r16, 5 } + { bitx r5, r6 ; lw r15, r16 } + { bitx r5, r6 ; lw r25, r26 ; s3a r15, r16, r17 } + { bitx r5, r6 ; lwadd r15, r16, 5 } + { bitx r5, r6 ; mnz r15, r16, r17 ; sh r25, r26 } + { bitx r5, r6 ; movei r15, 5 ; prefetch r25 } + { bitx r5, r6 ; nop ; lb r25, r26 } + { bitx r5, r6 ; or r15, r16, r17 ; lb r25, r26 } + { bitx r5, r6 ; packbs_u r15, r16, r17 } + { bitx r5, r6 ; prefetch r25 ; rl r15, r16, r17 } + { bitx r5, r6 ; prefetch r25 ; sub r15, r16, r17 } + { bitx r5, r6 ; rli r15, r16, 5 ; sb r25, r26 } + { bitx r5, r6 ; s2a r15, r16, r17 ; sb r25, r26 } + { bitx r5, r6 ; sb r25, r26 ; ill } + { bitx r5, r6 ; sb r25, r26 ; shri r15, r16, 5 } + { bitx r5, r6 ; seq r15, r16, r17 ; sb r25, r26 } + { bitx r5, r6 ; sh r25, r26 ; addi r15, r16, 5 } + { bitx r5, r6 ; sh r25, r26 ; seqi r15, r16, 5 } + { bitx r5, r6 ; shl r15, r16, r17 ; lh r25, r26 } + { bitx r5, r6 ; shlib r15, r16, 5 } + { bitx r5, r6 ; shri r15, r16, 5 ; sb r25, r26 } + { bitx r5, r6 ; slt_u r15, r16, r17 ; lw r25, r26 } + { bitx r5, r6 ; slte_u r15, r16, r17 ; lh r25, r26 } + { bitx r5, r6 ; slti r15, r16, 5 ; sb r25, r26 } + { bitx r5, r6 ; sne r15, r16, r17 ; lh r25, r26 } + { bitx r5, r6 ; srab r15, r16, r17 } + { bitx r5, r6 ; sub r15, r16, r17 ; sb r25, r26 } + { bitx r5, r6 ; sw r25, r26 ; mz r15, r16, r17 } + { bitx r5, r6 ; sw r25, r26 ; slti r15, r16, 5 } + { bitx r5, r6 ; xor r15, r16, r17 } + { bytex r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 } + { bytex r5, r6 ; and r15, r16, r17 ; sw r25, r26 } + { bytex r5, r6 ; fnop ; lw r25, r26 } + { bytex r5, r6 ; info 19 ; lh_u r25, r26 } + { bytex r5, r6 ; lb r25, r26 ; addi r15, r16, 5 } + { bytex r5, r6 ; lb r25, r26 ; seqi r15, r16, 5 } + { bytex r5, r6 ; lb_u r25, r26 ; and r15, r16, r17 } + { bytex r5, r6 ; lb_u r25, r26 ; shl r15, r16, r17 } + { bytex r5, r6 ; lh r25, r26 ; addi r15, r16, 5 } + { bytex r5, r6 ; lh r25, r26 ; seqi r15, r16, 5 } + { bytex r5, r6 ; lh_u r25, r26 ; and r15, r16, r17 } + { bytex r5, r6 ; lh_u r25, r26 ; shl r15, r16, r17 } + { bytex r5, r6 ; lw r25, r26 ; add r15, r16, r17 } + { bytex r5, r6 ; lw r25, r26 ; seq r15, r16, r17 } + { bytex r5, r6 ; lwadd_na r15, r16, 5 } + { bytex r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 } + { bytex r5, r6 ; movei r15, 5 ; sb r25, r26 } + { bytex r5, r6 ; nop ; lb_u r25, r26 } + { bytex r5, r6 ; or r15, r16, r17 ; lb_u r25, r26 } + { bytex r5, r6 ; packhb r15, r16, r17 } + { bytex r5, r6 ; prefetch r25 ; rli r15, r16, 5 } + { bytex r5, r6 ; prefetch r25 ; xor r15, r16, r17 } + { bytex r5, r6 ; rli r15, r16, 5 ; sh r25, r26 } + { bytex r5, r6 ; s2a r15, r16, r17 ; sh r25, r26 } + { bytex r5, r6 ; sb r25, r26 ; info 19 } + { bytex r5, r6 ; sb r25, r26 ; slt r15, r16, r17 } + { bytex r5, r6 ; seq r15, r16, r17 ; sh r25, r26 } + { bytex r5, r6 ; sh r25, r26 ; and r15, r16, r17 } + { bytex r5, r6 ; sh r25, r26 ; shl r15, r16, r17 } + { bytex r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 } + { bytex r5, r6 ; shlih r15, r16, 5 } + { bytex r5, r6 ; shri r15, r16, 5 ; sh r25, r26 } + { bytex r5, r6 ; slt_u r15, r16, r17 ; prefetch r25 } + { bytex r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + { bytex r5, r6 ; slti r15, r16, 5 ; sh r25, r26 } + { bytex r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 } + { bytex r5, r6 ; srah r15, r16, r17 } + { bytex r5, r6 ; sub r15, r16, r17 ; sh r25, r26 } + { bytex r5, r6 ; sw r25, r26 ; nop } + { bytex r5, r6 ; sw r25, r26 ; slti_u r15, r16, 5 } + { bytex r5, r6 ; xori r15, r16, 5 } + { clz r5, r6 ; addi r15, r16, 5 ; prefetch r25 } + { clz r5, r6 ; andi r15, r16, 5 ; lb r25, r26 } + { clz r5, r6 ; fnop ; sb r25, r26 } + { clz r5, r6 ; info 19 ; prefetch r25 } + { clz r5, r6 ; lb r25, r26 ; andi r15, r16, 5 } + { clz r5, r6 ; lb r25, r26 ; shli r15, r16, 5 } + { clz r5, r6 ; lb_u r25, r26 ; fnop } + { clz r5, r6 ; lb_u r25, r26 ; shr r15, r16, r17 } + { clz r5, r6 ; lh r25, r26 ; andi r15, r16, 5 } + { clz r5, r6 ; lh r25, r26 ; shli r15, r16, 5 } + { clz r5, r6 ; lh_u r25, r26 ; fnop } + { clz r5, r6 ; lh_u r25, r26 ; shr r15, r16, r17 } + { clz r5, r6 ; lw r25, r26 ; and r15, r16, r17 } + { clz r5, r6 ; lw r25, r26 ; shl r15, r16, r17 } + { clz r5, r6 ; maxh r15, r16, r17 } + { clz r5, r6 ; mnzb r15, r16, r17 } + { clz r5, r6 ; movei r15, 5 ; sw r25, r26 } + { clz r5, r6 ; nop ; lh_u r25, r26 } + { clz r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 } + { clz r5, r6 ; packlb r15, r16, r17 } + { clz r5, r6 ; prefetch r25 ; s2a r15, r16, r17 } + { clz r5, r6 ; raise } + { clz r5, r6 ; rli r15, r16, 5 } + { clz r5, r6 ; s2a r15, r16, r17 } + { clz r5, r6 ; sb r25, r26 ; move r15, r16 } + { clz r5, r6 ; sb r25, r26 ; slte r15, r16, r17 } + { clz r5, r6 ; seq r15, r16, r17 } + { clz r5, r6 ; sh r25, r26 ; fnop } + { clz r5, r6 ; sh r25, r26 ; shr r15, r16, r17 } + { clz r5, r6 ; shl r15, r16, r17 ; prefetch r25 } + { clz r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 } + { clz r5, r6 ; shri r15, r16, 5 } + { clz r5, r6 ; slt_u r15, r16, r17 ; sh r25, r26 } + { clz r5, r6 ; slte_u r15, r16, r17 ; prefetch r25 } + { clz r5, r6 ; slti r15, r16, 5 } + { clz r5, r6 ; sne r15, r16, r17 ; prefetch r25 } + { clz r5, r6 ; srai r15, r16, 5 ; lb_u r25, r26 } + { clz r5, r6 ; sub r15, r16, r17 } + { clz r5, r6 ; sw r25, r26 ; or r15, r16, r17 } + { clz r5, r6 ; sw r25, r26 ; sra r15, r16, r17 } + { crc32_32 r5, r6, r7 ; addb r15, r16, r17 } + { crc32_32 r5, r6, r7 ; infol 0x1234 } + { crc32_32 r5, r6, r7 ; lw r15, r16 } + { crc32_32 r5, r6, r7 ; moveli r15, 0x1234 } + { crc32_32 r5, r6, r7 ; s3a r15, r16, r17 } + { crc32_32 r5, r6, r7 ; shri r15, r16, 5 } + { crc32_32 r5, r6, r7 ; sltih_u r15, r16, 5 } + { crc32_32 r5, r6, r7 ; xor r15, r16, r17 } + { crc32_8 r5, r6, r7 ; icoh r15 } + { crc32_8 r5, r6, r7 ; lhadd r15, r16, 5 } + { crc32_8 r5, r6, r7 ; mnzh r15, r16, r17 } + { crc32_8 r5, r6, r7 ; rli r15, r16, 5 } + { crc32_8 r5, r6, r7 ; shr r15, r16, r17 } + { crc32_8 r5, r6, r7 ; sltib r15, r16, 5 } + { crc32_8 r5, r6, r7 ; swadd r15, r16, 5 } + { ctz r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 } + { ctz r5, r6 ; and r15, r16, r17 ; sb r25, r26 } + { ctz r5, r6 ; fnop ; lh r25, r26 } + { ctz r5, r6 ; info 19 ; lb_u r25, r26 } + { ctz r5, r6 ; lb r15, r16 } + { ctz r5, r6 ; lb r25, r26 ; s3a r15, r16, r17 } + { ctz r5, r6 ; lb_u r25, r26 ; add r15, r16, r17 } + { ctz r5, r6 ; lb_u r25, r26 ; seq r15, r16, r17 } + { ctz r5, r6 ; lh r15, r16 } + { ctz r5, r6 ; lh r25, r26 ; s3a r15, r16, r17 } + { ctz r5, r6 ; lh_u r25, r26 ; add r15, r16, r17 } + { ctz r5, r6 ; lh_u r25, r26 ; seq r15, r16, r17 } + { ctz r5, r6 ; lnk r15 } + { ctz r5, r6 ; lw r25, r26 ; s2a r15, r16, r17 } + { ctz r5, r6 ; lw_na r15, r16 } + { ctz r5, r6 ; mnz r15, r16, r17 ; sb r25, r26 } + { ctz r5, r6 ; movei r15, 5 ; lw r25, r26 } + { ctz r5, r6 ; mzh r15, r16, r17 } + { ctz r5, r6 ; nor r15, r16, r17 } + { ctz r5, r6 ; ori r15, r16, 5 } + { ctz r5, r6 ; prefetch r25 ; ori r15, r16, 5 } + { ctz r5, r6 ; prefetch r25 ; srai r15, r16, 5 } + { ctz r5, r6 ; rli r15, r16, 5 ; prefetch r25 } + { ctz r5, r6 ; s2a r15, r16, r17 ; prefetch r25 } + { ctz r5, r6 ; sb r25, r26 ; fnop } + { ctz r5, r6 ; sb r25, r26 ; shr r15, r16, r17 } + { ctz r5, r6 ; seq r15, r16, r17 ; prefetch r25 } + { ctz r5, r6 ; sh r25, r26 ; add r15, r16, r17 } + { ctz r5, r6 ; sh r25, r26 ; seq r15, r16, r17 } + { ctz r5, r6 ; shl r15, r16, r17 ; lb_u r25, r26 } + { ctz r5, r6 ; shli r15, r16, 5 } + { ctz r5, r6 ; shri r15, r16, 5 ; prefetch r25 } + { ctz r5, r6 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + { ctz r5, r6 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + { ctz r5, r6 ; slti r15, r16, 5 ; prefetch r25 } + { ctz r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 } + { ctz r5, r6 ; sra r15, r16, r17 } + { ctz r5, r6 ; sub r15, r16, r17 ; prefetch r25 } + { ctz r5, r6 ; sw r25, r26 ; movei r15, 5 } + { ctz r5, r6 ; sw r25, r26 ; slte_u r15, r16, r17 } + { ctz r5, r6 ; xor r15, r16, r17 ; sw r25, r26 } + { dtlbpr r15 ; avgb_u r5, r6, r7 } + { dtlbpr r15 ; minb_u r5, r6, r7 } + { dtlbpr r15 ; mulhl_su r5, r6, r7 } + { dtlbpr r15 ; nop } + { dtlbpr r15 ; seq r5, r6, r7 } + { dtlbpr r15 ; sltb r5, r6, r7 } + { dtlbpr r15 ; srab r5, r6, r7 } + { dword_align r5, r6, r7 ; addh r15, r16, r17 } + { dword_align r5, r6, r7 ; inthh r15, r16, r17 } + { dword_align r5, r6, r7 ; lwadd r15, r16, 5 } + { dword_align r5, r6, r7 ; mtspr 0x5, r16 } + { dword_align r5, r6, r7 ; sbadd r15, r16, 5 } + { dword_align r5, r6, r7 ; shrih r15, r16, 5 } + { dword_align r5, r6, r7 ; sneb r15, r16, r17 } + { finv r15 ; add r5, r6, r7 } + { finv r15 ; clz r5, r6 } + { finv r15 ; mm r5, r6, r7, 5, 7 } + { finv r15 ; mulhla_su r5, r6, r7 } + { finv r15 ; packbs_u r5, r6, r7 } + { finv r15 ; seqib r5, r6, 5 } + { finv r15 ; slteb r5, r6, r7 } + { finv r15 ; sraih r5, r6, 5 } + { flush r15 ; addih r5, r6, 5 } + { flush r15 ; infol 0x1234 } + { flush r15 ; movelis r5, 0x1234 } + { flush r15 ; mullla_ss r5, r6, r7 } + { flush r15 ; s1a r5, r6, r7 } + { flush r15 ; shlih r5, r6, 5 } + { flush r15 ; slti_u r5, r6, 5 } + { flush r15 ; tblidxb0 r5, r6 } + { fnop ; add r5, r6, r7 ; lw r25, r26 } + { fnop ; addi r15, r16, 5 ; sb r25, r26 } + { fnop ; addlis r15, r16, 0x1234 } + { fnop ; and r5, r6, r7 ; lw r25, r26 } + { fnop ; andi r5, r6, 5 ; lw r25, r26 } + { fnop ; bytex r5, r6 ; lb r25, r26 } + { fnop ; crc32_32 r5, r6, r7 } + { fnop ; fnop ; lw r25, r26 } + { fnop ; info 19 ; lh_u r25, r26 } + { fnop ; jr r15 } + { fnop ; lb r25, r26 ; move r15, r16 } + { fnop ; lb r25, r26 ; or r15, r16, r17 } + { fnop ; lb r25, r26 ; shl r5, r6, r7 } + { fnop ; lb r25, r26 ; sne r5, r6, r7 } + { fnop ; lb_u r25, r26 ; and r5, r6, r7 } + { fnop ; lb_u r25, r26 ; mulhlsa_uu r5, r6, r7 } + { fnop ; lb_u r25, r26 ; rli r5, r6, 5 } + { fnop ; lb_u r25, r26 ; slt r5, r6, r7 } + { fnop ; lb_u r25, r26 ; tblidxb1 r5, r6 } + { fnop ; lh r25, r26 ; ctz r5, r6 } + { fnop ; lh r25, r26 ; mvz r5, r6, r7 } + { fnop ; lh r25, r26 ; s3a r5, r6, r7 } + { fnop ; lh r25, r26 ; slte_u r5, r6, r7 } + { fnop ; lh_u r15, r16 } + { fnop ; lh_u r25, r26 ; movei r15, 5 } + { fnop ; lh_u r25, r26 ; ori r15, r16, 5 } + { fnop ; lh_u r25, r26 ; shli r5, r6, 5 } + { fnop ; lh_u r25, r26 ; sra r5, r6, r7 } + { fnop ; lw r25, r26 ; and r15, r16, r17 } + { fnop ; lw r25, r26 ; mulhha_uu r5, r6, r7 } + { fnop ; lw r25, r26 ; rli r15, r16, 5 } + { fnop ; lw r25, r26 ; slt r15, r16, r17 } + { fnop ; lw r25, r26 ; tblidxb0 r5, r6 } + { fnop ; minb_u r15, r16, r17 } + { fnop ; mnz r5, r6, r7 ; lb r25, r26 } + { fnop ; move r15, r16 ; sb r25, r26 } + { fnop ; movei r15, 5 ; sb r25, r26 } + { fnop ; mulhh_ss r5, r6, r7 ; lb_u r25, r26 } + { fnop ; mulhha_ss r5, r6, r7 ; lb r25, r26 } + { fnop ; mulhha_uu r5, r6, r7 } + { fnop ; mulll_ss r5, r6, r7 ; lb r25, r26 } + { fnop ; mulll_uu r5, r6, r7 } + { fnop ; mullla_uu r5, r6, r7 ; sw r25, r26 } + { fnop ; mvz r5, r6, r7 ; sh r25, r26 } + { fnop ; mz r5, r6, r7 ; sh r25, r26 } + { fnop ; nor r15, r16, r17 ; lh_u r25, r26 } + { fnop ; or r15, r16, r17 ; lh_u r25, r26 } + { fnop ; ori r15, r16, 5 ; lh_u r25, r26 } + { fnop ; packhb r5, r6, r7 } + { fnop ; prefetch r25 ; and r15, r16, r17 } + { fnop ; prefetch r25 ; mulhha_uu r5, r6, r7 } + { fnop ; prefetch r25 ; rli r15, r16, 5 } + { fnop ; prefetch r25 ; slt r15, r16, r17 } + { fnop ; prefetch r25 ; tblidxb0 r5, r6 } + { fnop ; rl r5, r6, r7 ; lh r25, r26 } + { fnop ; rli r5, r6, 5 ; lh r25, r26 } + { fnop ; s1a r5, r6, r7 ; lh r25, r26 } + { fnop ; s2a r5, r6, r7 ; lh r25, r26 } + { fnop ; s3a r5, r6, r7 ; lh r25, r26 } + { fnop ; sb r25, r26 ; and r5, r6, r7 } + { fnop ; sb r25, r26 ; mulhlsa_uu r5, r6, r7 } + { fnop ; sb r25, r26 ; rli r5, r6, 5 } + { fnop ; sb r25, r26 ; slt r5, r6, r7 } + { fnop ; sb r25, r26 ; tblidxb1 r5, r6 } + { fnop ; seq r5, r6, r7 ; lh_u r25, r26 } + { fnop ; seqi r15, r16, 5 } + { fnop ; sh r25, r26 ; and r15, r16, r17 } + { fnop ; sh r25, r26 ; mulhha_uu r5, r6, r7 } + { fnop ; sh r25, r26 ; rli r15, r16, 5 } + { fnop ; sh r25, r26 ; slt r15, r16, r17 } + { fnop ; sh r25, r26 ; tblidxb0 r5, r6 } + { fnop ; shl r5, r6, r7 ; lh r25, r26 } + { fnop ; shli r15, r16, 5 ; sw r25, r26 } + { fnop ; shr r15, r16, r17 ; lw r25, r26 } + { fnop ; shri r15, r16, 5 ; lb r25, r26 } + { fnop ; shrib r15, r16, 5 } + { fnop ; slt r5, r6, r7 ; sb r25, r26 } + { fnop ; slt_u r5, r6, r7 ; sb r25, r26 } + { fnop ; slte r5, r6, r7 ; lh r25, r26 } + { fnop ; slte_u r5, r6, r7 ; lh r25, r26 } + { fnop ; slti r15, r16, 5 ; lb r25, r26 } + { fnop ; slti_u r15, r16, 5 ; lb r25, r26 } + { fnop ; sltib r15, r16, 5 } + { fnop ; sne r5, r6, r7 ; lh r25, r26 } + { fnop ; sra r15, r16, r17 ; sw r25, r26 } + { fnop ; srai r15, r16, 5 ; lw r25, r26 } + { fnop ; sub r15, r16, r17 ; lb r25, r26 } + { fnop ; subb r15, r16, r17 } + { fnop ; sw r25, r26 ; bytex r5, r6 } + { fnop ; sw r25, r26 ; mullla_uu r5, r6, r7 } + { fnop ; sw r25, r26 ; s2a r5, r6, r7 } + { fnop ; sw r25, r26 ; slte r5, r6, r7 } + { fnop ; sw r25, r26 ; xor r5, r6, r7 } + { fnop ; tblidxb1 r5, r6 ; sh r25, r26 } + { fnop ; tblidxb3 r5, r6 ; sh r25, r26 } + { fnop ; xor r5, r6, r7 ; prefetch r25 } + { icoh r15 ; and r5, r6, r7 } + { icoh r15 ; maxh r5, r6, r7 } + { icoh r15 ; mulhha_uu r5, r6, r7 } + { icoh r15 ; mz r5, r6, r7 } + { icoh r15 ; sadb_u r5, r6, r7 } + { icoh r15 ; shrih r5, r6, 5 } + { icoh r15 ; sneb r5, r6, r7 } + { ill ; add r5, r6, r7 ; lb r25, r26 } + { ill ; addi r5, r6, 5 ; sb r25, r26 } + { ill ; and r5, r6, r7 } + { ill ; bitx r5, r6 ; sb r25, r26 } + { ill ; clz r5, r6 ; sb r25, r26 } + { ill ; fnop ; lh_u r25, r26 } + { ill ; intlb r5, r6, r7 } + { ill ; lb r25, r26 ; mulll_ss r5, r6, r7 } + { ill ; lb r25, r26 ; shli r5, r6, 5 } + { ill ; lb_u r25, r26 ; addi r5, r6, 5 } + { ill ; lb_u r25, r26 ; mullla_uu r5, r6, r7 } + { ill ; lb_u r25, r26 ; slt r5, r6, r7 } + { ill ; lh r25, r26 ; bitx r5, r6 } + { ill ; lh r25, r26 ; mz r5, r6, r7 } + { ill ; lh r25, r26 ; slte_u r5, r6, r7 } + { ill ; lh_u r25, r26 ; ctz r5, r6 } + { ill ; lh_u r25, r26 ; or r5, r6, r7 } + { ill ; lh_u r25, r26 ; sne r5, r6, r7 } + { ill ; lw r25, r26 ; mnz r5, r6, r7 } + { ill ; lw r25, r26 ; rl r5, r6, r7 } + { ill ; lw r25, r26 ; sub r5, r6, r7 } + { ill ; mnz r5, r6, r7 ; lw r25, r26 } + { ill ; movei r5, 5 ; lh r25, r26 } + { ill ; mulhh_su r5, r6, r7 } + { ill ; mulhha_ss r5, r6, r7 } + { ill ; mulhla_uu r5, r6, r7 } + { ill ; mulll_ss r5, r6, r7 } + { ill ; mullla_ss r5, r6, r7 ; sw r25, r26 } + { ill ; mvnz r5, r6, r7 ; sb r25, r26 } + { ill ; mz r5, r6, r7 ; sb r25, r26 } + { ill ; nor r5, r6, r7 ; lw r25, r26 } + { ill ; ori r5, r6, 5 ; lw r25, r26 } + { ill ; prefetch r25 ; add r5, r6, r7 } + { ill ; prefetch r25 ; mullla_ss r5, r6, r7 } + { ill ; prefetch r25 ; shri r5, r6, 5 } + { ill ; rl r5, r6, r7 ; lh_u r25, r26 } + { ill ; s1a r5, r6, r7 ; lh_u r25, r26 } + { ill ; s3a r5, r6, r7 ; lh_u r25, r26 } + { ill ; sb r25, r26 ; ctz r5, r6 } + { ill ; sb r25, r26 ; or r5, r6, r7 } + { ill ; sb r25, r26 ; sne r5, r6, r7 } + { ill ; seqb r5, r6, r7 } + { ill ; sh r25, r26 ; clz r5, r6 } + { ill ; sh r25, r26 ; nor r5, r6, r7 } + { ill ; sh r25, r26 ; slti_u r5, r6, 5 } + { ill ; shl r5, r6, r7 } + { ill ; shr r5, r6, r7 ; prefetch r25 } + { ill ; slt r5, r6, r7 ; lb_u r25, r26 } + { ill ; sltb_u r5, r6, r7 } + { ill ; slte_u r5, r6, r7 } + { ill ; slti_u r5, r6, 5 ; lh_u r25, r26 } + { ill ; sne r5, r6, r7 } + { ill ; srai r5, r6, 5 ; prefetch r25 } + { ill ; subhs r5, r6, r7 } + { ill ; sw r25, r26 ; mulll_ss r5, r6, r7 } + { ill ; sw r25, r26 ; shli r5, r6, 5 } + { ill ; tblidxb0 r5, r6 ; lb_u r25, r26 } + { ill ; tblidxb2 r5, r6 ; lb_u r25, r26 } + { ill ; xor r5, r6, r7 ; lb_u r25, r26 } + { info 19 ; add r5, r6, r7 ; lb r25, r26 } + { info 19 ; addi r15, r16, 5 ; lh r25, r26 } + { info 19 ; addih r15, r16, 5 } + { info 19 ; and r5, r6, r7 ; lb r25, r26 } + { info 19 ; andi r5, r6, 5 ; lb r25, r26 } + { info 19 ; bitx r5, r6 ; sb r25, r26 } + { info 19 ; clz r5, r6 ; sb r25, r26 } + { info 19 ; fnop ; lb r25, r26 } + { info 19 ; ill } + { info 19 ; inv r15 } + { info 19 ; lb r25, r26 ; ill } + { info 19 ; lb r25, r26 ; mz r5, r6, r7 } + { info 19 ; lb r25, r26 ; seq r5, r6, r7 } + { info 19 ; lb r25, r26 ; slti r5, r6, 5 } + { info 19 ; lb_u r25, r26 ; add r5, r6, r7 } + { info 19 ; lb_u r25, r26 ; mulhh_ss r5, r6, r7 } + { info 19 ; lb_u r25, r26 ; pcnt r5, r6 } + { info 19 ; lb_u r25, r26 ; shr r5, r6, r7 } + { info 19 ; lb_u r25, r26 ; srai r5, r6, 5 } + { info 19 ; lh r25, r26 ; andi r5, r6, 5 } + { info 19 ; lh r25, r26 ; mulll_uu r5, r6, r7 } + { info 19 ; lh r25, r26 ; s1a r5, r6, r7 } + { info 19 ; lh r25, r26 ; slt_u r5, r6, r7 } + { info 19 ; lh r25, r26 ; tblidxb3 r5, r6 } + { info 19 ; lh_u r25, r26 ; mnz r15, r16, r17 } + { info 19 ; lh_u r25, r26 ; nor r15, r16, r17 } + { info 19 ; lh_u r25, r26 ; seqi r5, r6, 5 } + { info 19 ; lh_u r25, r26 ; slti_u r5, r6, 5 } + { info 19 ; lw r25, r26 ; add r15, r16, r17 } + { info 19 ; lw r25, r26 ; movei r5, 5 } + { info 19 ; lw r25, r26 ; ori r5, r6, 5 } + { info 19 ; lw r25, r26 ; shr r15, r16, r17 } + { info 19 ; lw r25, r26 ; srai r15, r16, 5 } + { info 19 ; maxih r15, r16, 5 } + { info 19 ; mnz r15, r16, r17 ; sb r25, r26 } + { info 19 ; move r15, r16 ; lh r25, r26 } + { info 19 ; movei r15, 5 ; lh r25, r26 } + { info 19 ; movelis r15, 0x1234 } + { info 19 ; mulhh_uu r5, r6, r7 ; sb r25, r26 } + { info 19 ; mulhha_uu r5, r6, r7 ; prefetch r25 } + { info 19 ; mulhlsa_uu r5, r6, r7 ; sb r25, r26 } + { info 19 ; mulll_uu r5, r6, r7 ; prefetch r25 } + { info 19 ; mullla_uu r5, r6, r7 ; lw r25, r26 } + { info 19 ; mvz r5, r6, r7 ; lh_u r25, r26 } + { info 19 ; mz r5, r6, r7 ; lh_u r25, r26 } + { info 19 ; nop } + { info 19 ; nor r5, r6, r7 } + { info 19 ; or r5, r6, r7 } + { info 19 ; ori r5, r6, 5 } + { info 19 ; prefetch r25 ; add r15, r16, r17 } + { info 19 ; prefetch r25 ; movei r5, 5 } + { info 19 ; prefetch r25 ; ori r5, r6, 5 } + { info 19 ; prefetch r25 ; shr r15, r16, r17 } + { info 19 ; prefetch r25 ; srai r15, r16, 5 } + { info 19 ; rl r15, r16, r17 ; sw r25, r26 } + { info 19 ; rli r15, r16, 5 ; sw r25, r26 } + { info 19 ; s1a r15, r16, r17 ; sw r25, r26 } + { info 19 ; s2a r15, r16, r17 ; sw r25, r26 } + { info 19 ; s3a r15, r16, r17 ; sw r25, r26 } + { info 19 ; sb r25, r26 ; add r5, r6, r7 } + { info 19 ; sb r25, r26 ; mulhh_ss r5, r6, r7 } + { info 19 ; sb r25, r26 ; pcnt r5, r6 } + { info 19 ; sb r25, r26 ; shr r5, r6, r7 } + { info 19 ; sb r25, r26 ; srai r5, r6, 5 } + { info 19 ; seq r15, r16, r17 } + { info 19 ; seqi r15, r16, 5 ; prefetch r25 } + { info 19 ; sh r25, r26 ; add r15, r16, r17 } + { info 19 ; sh r25, r26 ; movei r5, 5 } + { info 19 ; sh r25, r26 ; ori r5, r6, 5 } + { info 19 ; sh r25, r26 ; shr r15, r16, r17 } + { info 19 ; sh r25, r26 ; srai r15, r16, 5 } + { info 19 ; shl r15, r16, r17 ; sw r25, r26 } + { info 19 ; shli r15, r16, 5 ; lw r25, r26 } + { info 19 ; shr r15, r16, r17 ; lb r25, r26 } + { info 19 ; shrb r15, r16, r17 } + { info 19 ; shri r5, r6, 5 ; sb r25, r26 } + { info 19 ; slt r5, r6, r7 ; lh r25, r26 } + { info 19 ; slt_u r5, r6, r7 ; lh r25, r26 } + { info 19 ; slte r15, r16, r17 ; sw r25, r26 } + { info 19 ; slte_u r15, r16, r17 ; sw r25, r26 } + { info 19 ; slth r15, r16, r17 } + { info 19 ; slti r5, r6, 5 ; sb r25, r26 } + { info 19 ; slti_u r5, r6, 5 ; sb r25, r26 } + { info 19 ; sne r15, r16, r17 ; sw r25, r26 } + { info 19 ; sra r15, r16, r17 ; lw r25, r26 } + { info 19 ; srai r15, r16, 5 ; lb r25, r26 } + { info 19 ; sraib r15, r16, 5 } + { info 19 ; sub r5, r6, r7 ; sb r25, r26 } + { info 19 ; sw r25, r26 ; and r5, r6, r7 } + { info 19 ; sw r25, r26 ; mulhlsa_uu r5, r6, r7 } + { info 19 ; sw r25, r26 ; rli r5, r6, 5 } + { info 19 ; sw r25, r26 ; slt r5, r6, r7 } + { info 19 ; sw r25, r26 ; tblidxb1 r5, r6 } + { info 19 ; tblidxb1 r5, r6 ; lh_u r25, r26 } + { info 19 ; tblidxb3 r5, r6 ; lh_u r25, r26 } + { info 19 ; xor r5, r6, r7 ; lb_u r25, r26 } + { infol 0x1234 ; addhs r5, r6, r7 } + { infol 0x1234 ; auli r5, r6, 0x1234 } + { infol 0x1234 ; inthh r15, r16, r17 } + { infol 0x1234 ; lnk r15 } + { infol 0x1234 ; minib_u r5, r6, 5 } + { infol 0x1234 ; mulhh_ss r5, r6, r7 } + { infol 0x1234 ; mullla_su r5, r6, r7 } + { infol 0x1234 ; packhb r15, r16, r17 } + { infol 0x1234 ; sadah r5, r6, r7 } + { infol 0x1234 ; shadd r15, r16, 5 } + { infol 0x1234 ; shri r5, r6, 5 } + { infol 0x1234 ; slteb_u r5, r6, r7 } + { infol 0x1234 ; sltih_u r5, r6, 5 } + { infol 0x1234 ; sub r5, r6, r7 } + { infol 0x1234 ; xor r5, r6, r7 } + { inthb r15, r16, r17 ; avgh r5, r6, r7 } + { inthb r15, r16, r17 ; minh r5, r6, r7 } + { inthb r15, r16, r17 ; mulhl_us r5, r6, r7 } + { inthb r15, r16, r17 ; nor r5, r6, r7 } + { inthb r15, r16, r17 ; seqb r5, r6, r7 } + { inthb r15, r16, r17 ; sltb_u r5, r6, r7 } + { inthb r15, r16, r17 ; srah r5, r6, r7 } + { inthb r5, r6, r7 ; addhs r15, r16, r17 } + { inthb r5, r6, r7 ; intlb r15, r16, r17 } + { inthb r5, r6, r7 ; lwadd_na r15, r16, 5 } + { inthb r5, r6, r7 ; mz r15, r16, r17 } + { inthb r5, r6, r7 ; seq r15, r16, r17 } + { inthb r5, r6, r7 ; slt r15, r16, r17 } + { inthb r5, r6, r7 ; sneh r15, r16, r17 } + { inthh r15, r16, r17 ; addb r5, r6, r7 } + { inthh r15, r16, r17 ; crc32_32 r5, r6, r7 } + { inthh r15, r16, r17 ; mnz r5, r6, r7 } + { inthh r15, r16, r17 ; mulhla_us r5, r6, r7 } + { inthh r15, r16, r17 ; packhb r5, r6, r7 } + { inthh r15, r16, r17 ; seqih r5, r6, 5 } + { inthh r15, r16, r17 ; slteb_u r5, r6, r7 } + { inthh r15, r16, r17 ; sub r5, r6, r7 } + { inthh r5, r6, r7 ; addli r15, r16, 0x1234 } + { inthh r5, r6, r7 ; jalr r15 } + { inthh r5, r6, r7 ; maxih r15, r16, 5 } + { inthh r5, r6, r7 ; nor r15, r16, r17 } + { inthh r5, r6, r7 ; seqib r15, r16, 5 } + { inthh r5, r6, r7 ; slte r15, r16, r17 } + { inthh r5, r6, r7 ; srai r15, r16, 5 } + { intlb r15, r16, r17 ; addi r5, r6, 5 } + { intlb r15, r16, r17 ; fnop } + { intlb r15, r16, r17 ; movei r5, 5 } + { intlb r15, r16, r17 ; mulll_su r5, r6, r7 } + { intlb r15, r16, r17 ; rl r5, r6, r7 } + { intlb r15, r16, r17 ; shli r5, r6, 5 } + { intlb r15, r16, r17 ; slth_u r5, r6, r7 } + { intlb r15, r16, r17 ; subhs r5, r6, r7 } + { intlb r5, r6, r7 ; andi r15, r16, 5 } + { intlb r5, r6, r7 ; lb r15, r16 } + { intlb r5, r6, r7 ; minh r15, r16, r17 } + { intlb r5, r6, r7 ; packhb r15, r16, r17 } + { intlb r5, r6, r7 ; shl r15, r16, r17 } + { intlb r5, r6, r7 ; slteh r15, r16, r17 } + { intlb r5, r6, r7 ; subb r15, r16, r17 } + { intlh r15, r16, r17 ; addlis r5, r6, 0x1234 } + { intlh r15, r16, r17 ; inthh r5, r6, r7 } + { intlh r15, r16, r17 ; mulhh_su r5, r6, r7 } + { intlh r15, r16, r17 ; mullla_uu r5, r6, r7 } + { intlh r15, r16, r17 ; s3a r5, r6, r7 } + { intlh r15, r16, r17 ; shrb r5, r6, r7 } + { intlh r15, r16, r17 ; sltib_u r5, r6, 5 } + { intlh r15, r16, r17 ; tblidxb2 r5, r6 } + { intlh r5, r6, r7 ; flush r15 } + { intlh r5, r6, r7 ; lh r15, r16 } + { intlh r5, r6, r7 ; mnz r15, r16, r17 } + { intlh r5, r6, r7 ; raise } + { intlh r5, r6, r7 ; shlib r15, r16, 5 } + { intlh r5, r6, r7 ; slti r15, r16, 5 } + { intlh r5, r6, r7 ; subs r15, r16, r17 } + { inv r15 ; and r5, r6, r7 } + { inv r15 ; maxh r5, r6, r7 } + { inv r15 ; mulhha_uu r5, r6, r7 } + { inv r15 ; mz r5, r6, r7 } + { inv r15 ; sadb_u r5, r6, r7 } + { inv r15 ; shrih r5, r6, 5 } + { inv r15 ; sneb r5, r6, r7 } + { iret ; add r5, r6, r7 } + { iret ; clz r5, r6 } + { iret ; mm r5, r6, r7, 5, 7 } + { iret ; mulhla_su r5, r6, r7 } + { iret ; packbs_u r5, r6, r7 } + { iret ; seqib r5, r6, 5 } + { iret ; slteb r5, r6, r7 } + { iret ; sraih r5, r6, 5 } + { jalr r15 ; addih r5, r6, 5 } + { jalr r15 ; infol 0x1234 } + { jalr r15 ; movelis r5, 0x1234 } + { jalr r15 ; mullla_ss r5, r6, r7 } + { jalr r15 ; s1a r5, r6, r7 } + { jalr r15 ; shlih r5, r6, 5 } + { jalr r15 ; slti_u r5, r6, 5 } + { jalr r15 ; tblidxb0 r5, r6 } + { jalrp r15 ; andi r5, r6, 5 } + { jalrp r15 ; maxib_u r5, r6, 5 } + { jalrp r15 ; mulhhsa_uu r5, r6, r7 } + { jalrp r15 ; mzb r5, r6, r7 } + { jalrp r15 ; sadh r5, r6, r7 } + { jalrp r15 ; slt r5, r6, r7 } + { jalrp r15 ; sneh r5, r6, r7 } + { jr r15 ; addb r5, r6, r7 } + { jr r15 ; crc32_32 r5, r6, r7 } + { jr r15 ; mnz r5, r6, r7 } + { jr r15 ; mulhla_us r5, r6, r7 } + { jr r15 ; packhb r5, r6, r7 } + { jr r15 ; seqih r5, r6, 5 } + { jr r15 ; slteb_u r5, r6, r7 } + { jr r15 ; sub r5, r6, r7 } + { jrp r15 ; addli r5, r6, 0x1234 } + { jrp r15 ; inthb r5, r6, r7 } + { jrp r15 ; mulhh_ss r5, r6, r7 } + { jrp r15 ; mullla_su r5, r6, r7 } + { jrp r15 ; s2a r5, r6, r7 } + { jrp r15 ; shr r5, r6, r7 } + { jrp r15 ; sltib r5, r6, 5 } + { jrp r15 ; tblidxb1 r5, r6 } + { lb r15, r16 ; auli r5, r6, 0x1234 } + { lb r15, r16 ; maxih r5, r6, 5 } + { lb r15, r16 ; mulhl_ss r5, r6, r7 } + { lb r15, r16 ; mzh r5, r6, r7 } + { lb r15, r16 ; sadh_u r5, r6, r7 } + { lb r15, r16 ; slt_u r5, r6, r7 } + { lb r15, r16 ; sra r5, r6, r7 } + { lb r25, r26 ; add r15, r16, r17 ; and r5, r6, r7 } + { lb r25, r26 ; add r15, r16, r17 ; mvnz r5, r6, r7 } + { lb r25, r26 ; add r15, r16, r17 ; slt_u r5, r6, r7 } + { lb r25, r26 ; add r5, r6, r7 ; ill } + { lb r25, r26 ; add r5, r6, r7 ; shri r15, r16, 5 } + { lb r25, r26 ; addi r15, r16, 5 ; ctz r5, r6 } + { lb r25, r26 ; addi r15, r16, 5 ; or r5, r6, r7 } + { lb r25, r26 ; addi r15, r16, 5 ; sne r5, r6, r7 } + { lb r25, r26 ; addi r5, r6, 5 ; mz r15, r16, r17 } + { lb r25, r26 ; addi r5, r6, 5 ; slti r15, r16, 5 } + { lb r25, r26 ; and r15, r16, r17 ; movei r5, 5 } + { lb r25, r26 ; and r15, r16, r17 ; s1a r5, r6, r7 } + { lb r25, r26 ; and r15, r16, r17 ; tblidxb1 r5, r6 } + { lb r25, r26 ; and r5, r6, r7 ; rl r15, r16, r17 } + { lb r25, r26 ; and r5, r6, r7 ; sub r15, r16, r17 } + { lb r25, r26 ; andi r15, r16, 5 ; mulhlsa_uu r5, r6, r7 } + { lb r25, r26 ; andi r15, r16, 5 ; shl r5, r6, r7 } + { lb r25, r26 ; andi r5, r6, 5 ; add r15, r16, r17 } + { lb r25, r26 ; andi r5, r6, 5 ; seq r15, r16, r17 } + { lb r25, r26 ; bitx r5, r6 ; and r15, r16, r17 } + { lb r25, r26 ; bitx r5, r6 ; shl r15, r16, r17 } + { lb r25, r26 ; bytex r5, r6 ; fnop } + { lb r25, r26 ; bytex r5, r6 ; shr r15, r16, r17 } + { lb r25, r26 ; clz r5, r6 ; info 19 } + { lb r25, r26 ; clz r5, r6 ; slt r15, r16, r17 } + { lb r25, r26 ; ctz r5, r6 ; move r15, r16 } + { lb r25, r26 ; ctz r5, r6 ; slte r15, r16, r17 } + { lb r25, r26 ; fnop ; clz r5, r6 } + { lb r25, r26 ; fnop ; mvnz r5, r6, r7 } + { lb r25, r26 ; fnop ; s3a r15, r16, r17 } + { lb r25, r26 ; fnop ; slte_u r15, r16, r17 } + { lb r25, r26 ; fnop } + { lb r25, r26 ; ill ; mulll_uu r5, r6, r7 } + { lb r25, r26 ; ill ; shr r5, r6, r7 } + { lb r25, r26 ; info 19 ; addi r15, r16, 5 } + { lb r25, r26 ; info 19 ; mulhh_uu r5, r6, r7 } + { lb r25, r26 ; info 19 ; rl r15, r16, r17 } + { lb r25, r26 ; info 19 ; shri r15, r16, 5 } + { lb r25, r26 ; info 19 ; sub r15, r16, r17 } + { lb r25, r26 ; mnz r15, r16, r17 ; move r5, r6 } + { lb r25, r26 ; mnz r15, r16, r17 ; rli r5, r6, 5 } + { lb r25, r26 ; mnz r15, r16, r17 ; tblidxb0 r5, r6 } + { lb r25, r26 ; mnz r5, r6, r7 ; ori r15, r16, 5 } + { lb r25, r26 ; mnz r5, r6, r7 ; srai r15, r16, 5 } + { lb r25, r26 ; move r15, r16 ; mulhha_uu r5, r6, r7 } + { lb r25, r26 ; move r15, r16 ; seqi r5, r6, 5 } + { lb r25, r26 ; move r15, r16 } + { lb r25, r26 ; move r5, r6 ; s3a r15, r16, r17 } + { lb r25, r26 ; movei r15, 5 ; addi r5, r6, 5 } + { lb r25, r26 ; movei r15, 5 ; mullla_uu r5, r6, r7 } + { lb r25, r26 ; movei r15, 5 ; slt r5, r6, r7 } + { lb r25, r26 ; movei r5, 5 ; fnop } + { lb r25, r26 ; movei r5, 5 ; shr r15, r16, r17 } + { lb r25, r26 ; mulhh_ss r5, r6, r7 ; info 19 } + { lb r25, r26 ; mulhh_ss r5, r6, r7 ; slt r15, r16, r17 } + { lb r25, r26 ; mulhh_uu r5, r6, r7 ; move r15, r16 } + { lb r25, r26 ; mulhh_uu r5, r6, r7 ; slte r15, r16, r17 } + { lb r25, r26 ; mulhha_ss r5, r6, r7 ; mz r15, r16, r17 } + { lb r25, r26 ; mulhha_ss r5, r6, r7 ; slti r15, r16, 5 } + { lb r25, r26 ; mulhha_uu r5, r6, r7 ; nor r15, r16, r17 } + { lb r25, r26 ; mulhha_uu r5, r6, r7 ; sne r15, r16, r17 } + { lb r25, r26 ; mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 } + { lb r25, r26 ; mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 } + { lb r25, r26 ; mulll_ss r5, r6, r7 ; rli r15, r16, 5 } + { lb r25, r26 ; mulll_ss r5, r6, r7 ; xor r15, r16, r17 } + { lb r25, r26 ; mulll_uu r5, r6, r7 ; s2a r15, r16, r17 } + { lb r25, r26 ; mullla_ss r5, r6, r7 ; add r15, r16, r17 } + { lb r25, r26 ; mullla_ss r5, r6, r7 ; seq r15, r16, r17 } + { lb r25, r26 ; mullla_uu r5, r6, r7 ; and r15, r16, r17 } + { lb r25, r26 ; mullla_uu r5, r6, r7 ; shl r15, r16, r17 } + { lb r25, r26 ; mvnz r5, r6, r7 ; fnop } + { lb r25, r26 ; mvnz r5, r6, r7 ; shr r15, r16, r17 } + { lb r25, r26 ; mvz r5, r6, r7 ; info 19 } + { lb r25, r26 ; mvz r5, r6, r7 ; slt r15, r16, r17 } + { lb r25, r26 ; mz r15, r16, r17 ; fnop } + { lb r25, r26 ; mz r15, r16, r17 ; ori r5, r6, 5 } + { lb r25, r26 ; mz r15, r16, r17 ; sra r5, r6, r7 } + { lb r25, r26 ; mz r5, r6, r7 ; nop } + { lb r25, r26 ; mz r5, r6, r7 ; slti_u r15, r16, 5 } + { lb r25, r26 ; nop ; ill } + { lb r25, r26 ; nop ; mz r5, r6, r7 } + { lb r25, r26 ; nop ; seq r5, r6, r7 } + { lb r25, r26 ; nop ; slti r5, r6, 5 } + { lb r25, r26 ; nor r15, r16, r17 ; and r5, r6, r7 } + { lb r25, r26 ; nor r15, r16, r17 ; mvnz r5, r6, r7 } + { lb r25, r26 ; nor r15, r16, r17 ; slt_u r5, r6, r7 } + { lb r25, r26 ; nor r5, r6, r7 ; ill } + { lb r25, r26 ; nor r5, r6, r7 ; shri r15, r16, 5 } + { lb r25, r26 ; or r15, r16, r17 ; ctz r5, r6 } + { lb r25, r26 ; or r15, r16, r17 ; or r5, r6, r7 } + { lb r25, r26 ; or r15, r16, r17 ; sne r5, r6, r7 } + { lb r25, r26 ; or r5, r6, r7 ; mz r15, r16, r17 } + { lb r25, r26 ; or r5, r6, r7 ; slti r15, r16, 5 } + { lb r25, r26 ; ori r15, r16, 5 ; movei r5, 5 } + { lb r25, r26 ; ori r15, r16, 5 ; s1a r5, r6, r7 } + { lb r25, r26 ; ori r15, r16, 5 ; tblidxb1 r5, r6 } + { lb r25, r26 ; ori r5, r6, 5 ; rl r15, r16, r17 } + { lb r25, r26 ; ori r5, r6, 5 ; sub r15, r16, r17 } + { lb r25, r26 ; pcnt r5, r6 ; s1a r15, r16, r17 } + { lb r25, r26 ; pcnt r5, r6 } + { lb r25, r26 ; rl r15, r16, r17 ; mulll_uu r5, r6, r7 } + { lb r25, r26 ; rl r15, r16, r17 ; shr r5, r6, r7 } + { lb r25, r26 ; rl r5, r6, r7 ; and r15, r16, r17 } + { lb r25, r26 ; rl r5, r6, r7 ; shl r15, r16, r17 } + { lb r25, r26 ; rli r15, r16, 5 ; bitx r5, r6 } + { lb r25, r26 ; rli r15, r16, 5 ; mz r5, r6, r7 } + { lb r25, r26 ; rli r15, r16, 5 ; slte_u r5, r6, r7 } + { lb r25, r26 ; rli r5, r6, 5 ; mnz r15, r16, r17 } + { lb r25, r26 ; rli r5, r6, 5 ; slt_u r15, r16, r17 } + { lb r25, r26 ; s1a r15, r16, r17 ; info 19 } + { lb r25, r26 ; s1a r15, r16, r17 ; pcnt r5, r6 } + { lb r25, r26 ; s1a r15, r16, r17 ; srai r5, r6, 5 } + { lb r25, r26 ; s1a r5, r6, r7 ; nor r15, r16, r17 } + { lb r25, r26 ; s1a r5, r6, r7 ; sne r15, r16, r17 } + { lb r25, r26 ; s2a r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { lb r25, r26 ; s2a r15, r16, r17 ; s3a r5, r6, r7 } + { lb r25, r26 ; s2a r15, r16, r17 ; tblidxb3 r5, r6 } + { lb r25, r26 ; s2a r5, r6, r7 ; s1a r15, r16, r17 } + { lb r25, r26 ; s2a r5, r6, r7 } + { lb r25, r26 ; s3a r15, r16, r17 ; mulll_uu r5, r6, r7 } + { lb r25, r26 ; s3a r15, r16, r17 ; shr r5, r6, r7 } + { lb r25, r26 ; s3a r5, r6, r7 ; and r15, r16, r17 } + { lb r25, r26 ; s3a r5, r6, r7 ; shl r15, r16, r17 } + { lb r25, r26 ; seq r15, r16, r17 ; bitx r5, r6 } + { lb r25, r26 ; seq r15, r16, r17 ; mz r5, r6, r7 } + { lb r25, r26 ; seq r15, r16, r17 ; slte_u r5, r6, r7 } + { lb r25, r26 ; seq r5, r6, r7 ; mnz r15, r16, r17 } + { lb r25, r26 ; seq r5, r6, r7 ; slt_u r15, r16, r17 } + { lb r25, r26 ; seqi r15, r16, 5 ; info 19 } + { lb r25, r26 ; seqi r15, r16, 5 ; pcnt r5, r6 } + { lb r25, r26 ; seqi r15, r16, 5 ; srai r5, r6, 5 } + { lb r25, r26 ; seqi r5, r6, 5 ; nor r15, r16, r17 } + { lb r25, r26 ; seqi r5, r6, 5 ; sne r15, r16, r17 } + { lb r25, r26 ; shl r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { lb r25, r26 ; shl r15, r16, r17 ; s3a r5, r6, r7 } + { lb r25, r26 ; shl r15, r16, r17 ; tblidxb3 r5, r6 } + { lb r25, r26 ; shl r5, r6, r7 ; s1a r15, r16, r17 } + { lb r25, r26 ; shl r5, r6, r7 } + { lb r25, r26 ; shli r15, r16, 5 ; mulll_uu r5, r6, r7 } + { lb r25, r26 ; shli r15, r16, 5 ; shr r5, r6, r7 } + { lb r25, r26 ; shli r5, r6, 5 ; and r15, r16, r17 } + { lb r25, r26 ; shli r5, r6, 5 ; shl r15, r16, r17 } + { lb r25, r26 ; shr r15, r16, r17 ; bitx r5, r6 } + { lb r25, r26 ; shr r15, r16, r17 ; mz r5, r6, r7 } + { lb r25, r26 ; shr r15, r16, r17 ; slte_u r5, r6, r7 } + { lb r25, r26 ; shr r5, r6, r7 ; mnz r15, r16, r17 } + { lb r25, r26 ; shr r5, r6, r7 ; slt_u r15, r16, r17 } + { lb r25, r26 ; shri r15, r16, 5 ; info 19 } + { lb r25, r26 ; shri r15, r16, 5 ; pcnt r5, r6 } + { lb r25, r26 ; shri r15, r16, 5 ; srai r5, r6, 5 } + { lb r25, r26 ; shri r5, r6, 5 ; nor r15, r16, r17 } + { lb r25, r26 ; shri r5, r6, 5 ; sne r15, r16, r17 } + { lb r25, r26 ; slt r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { lb r25, r26 ; slt r15, r16, r17 ; s3a r5, r6, r7 } + { lb r25, r26 ; slt r15, r16, r17 ; tblidxb3 r5, r6 } + { lb r25, r26 ; slt r5, r6, r7 ; s1a r15, r16, r17 } + { lb r25, r26 ; slt r5, r6, r7 } + { lb r25, r26 ; slt_u r15, r16, r17 ; mulll_uu r5, r6, r7 } + { lb r25, r26 ; slt_u r15, r16, r17 ; shr r5, r6, r7 } + { lb r25, r26 ; slt_u r5, r6, r7 ; and r15, r16, r17 } + { lb r25, r26 ; slt_u r5, r6, r7 ; shl r15, r16, r17 } + { lb r25, r26 ; slte r15, r16, r17 ; bitx r5, r6 } + { lb r25, r26 ; slte r15, r16, r17 ; mz r5, r6, r7 } + { lb r25, r26 ; slte r15, r16, r17 ; slte_u r5, r6, r7 } + { lb r25, r26 ; slte r5, r6, r7 ; mnz r15, r16, r17 } + { lb r25, r26 ; slte r5, r6, r7 ; slt_u r15, r16, r17 } + { lb r25, r26 ; slte_u r15, r16, r17 ; info 19 } + { lb r25, r26 ; slte_u r15, r16, r17 ; pcnt r5, r6 } + { lb r25, r26 ; slte_u r15, r16, r17 ; srai r5, r6, 5 } + { lb r25, r26 ; slte_u r5, r6, r7 ; nor r15, r16, r17 } + { lb r25, r26 ; slte_u r5, r6, r7 ; sne r15, r16, r17 } + { lb r25, r26 ; slti r15, r16, 5 ; mulhh_uu r5, r6, r7 } + { lb r25, r26 ; slti r15, r16, 5 ; s3a r5, r6, r7 } + { lb r25, r26 ; slti r15, r16, 5 ; tblidxb3 r5, r6 } + { lb r25, r26 ; slti r5, r6, 5 ; s1a r15, r16, r17 } + { lb r25, r26 ; slti r5, r6, 5 } + { lb r25, r26 ; slti_u r15, r16, 5 ; mulll_uu r5, r6, r7 } + { lb r25, r26 ; slti_u r15, r16, 5 ; shr r5, r6, r7 } + { lb r25, r26 ; slti_u r5, r6, 5 ; and r15, r16, r17 } + { lb r25, r26 ; slti_u r5, r6, 5 ; shl r15, r16, r17 } + { lb r25, r26 ; sne r15, r16, r17 ; bitx r5, r6 } + { lb r25, r26 ; sne r15, r16, r17 ; mz r5, r6, r7 } + { lb r25, r26 ; sne r15, r16, r17 ; slte_u r5, r6, r7 } + { lb r25, r26 ; sne r5, r6, r7 ; mnz r15, r16, r17 } + { lb r25, r26 ; sne r5, r6, r7 ; slt_u r15, r16, r17 } + { lb r25, r26 ; sra r15, r16, r17 ; info 19 } + { lb r25, r26 ; sra r15, r16, r17 ; pcnt r5, r6 } + { lb r25, r26 ; sra r15, r16, r17 ; srai r5, r6, 5 } + { lb r25, r26 ; sra r5, r6, r7 ; nor r15, r16, r17 } + { lb r25, r26 ; sra r5, r6, r7 ; sne r15, r16, r17 } + { lb r25, r26 ; srai r15, r16, 5 ; mulhh_uu r5, r6, r7 } + { lb r25, r26 ; srai r15, r16, 5 ; s3a r5, r6, r7 } + { lb r25, r26 ; srai r15, r16, 5 ; tblidxb3 r5, r6 } + { lb r25, r26 ; srai r5, r6, 5 ; s1a r15, r16, r17 } + { lb r25, r26 ; srai r5, r6, 5 } + { lb r25, r26 ; sub r15, r16, r17 ; mulll_uu r5, r6, r7 } + { lb r25, r26 ; sub r15, r16, r17 ; shr r5, r6, r7 } + { lb r25, r26 ; sub r5, r6, r7 ; and r15, r16, r17 } + { lb r25, r26 ; sub r5, r6, r7 ; shl r15, r16, r17 } + { lb r25, r26 ; tblidxb0 r5, r6 ; fnop } + { lb r25, r26 ; tblidxb0 r5, r6 ; shr r15, r16, r17 } + { lb r25, r26 ; tblidxb1 r5, r6 ; info 19 } + { lb r25, r26 ; tblidxb1 r5, r6 ; slt r15, r16, r17 } + { lb r25, r26 ; tblidxb2 r5, r6 ; move r15, r16 } + { lb r25, r26 ; tblidxb2 r5, r6 ; slte r15, r16, r17 } + { lb r25, r26 ; tblidxb3 r5, r6 ; mz r15, r16, r17 } + { lb r25, r26 ; tblidxb3 r5, r6 ; slti r15, r16, 5 } + { lb r25, r26 ; xor r15, r16, r17 ; movei r5, 5 } + { lb r25, r26 ; xor r15, r16, r17 ; s1a r5, r6, r7 } + { lb r25, r26 ; xor r15, r16, r17 ; tblidxb1 r5, r6 } + { lb r25, r26 ; xor r5, r6, r7 ; rl r15, r16, r17 } + { lb r25, r26 ; xor r5, r6, r7 ; sub r15, r16, r17 } + { lb_u r15, r16 ; avgh r5, r6, r7 } + { lb_u r15, r16 ; minh r5, r6, r7 } + { lb_u r15, r16 ; mulhl_us r5, r6, r7 } + { lb_u r15, r16 ; nor r5, r6, r7 } + { lb_u r15, r16 ; seqb r5, r6, r7 } + { lb_u r15, r16 ; sltb_u r5, r6, r7 } + { lb_u r15, r16 ; srah r5, r6, r7 } + { lb_u r25, r26 ; add r15, r16, r17 ; bitx r5, r6 } + { lb_u r25, r26 ; add r15, r16, r17 ; mz r5, r6, r7 } + { lb_u r25, r26 ; add r15, r16, r17 ; slte_u r5, r6, r7 } + { lb_u r25, r26 ; add r5, r6, r7 ; mnz r15, r16, r17 } + { lb_u r25, r26 ; add r5, r6, r7 ; slt_u r15, r16, r17 } + { lb_u r25, r26 ; addi r15, r16, 5 ; info 19 } + { lb_u r25, r26 ; addi r15, r16, 5 ; pcnt r5, r6 } + { lb_u r25, r26 ; addi r15, r16, 5 ; srai r5, r6, 5 } + { lb_u r25, r26 ; addi r5, r6, 5 ; nor r15, r16, r17 } + { lb_u r25, r26 ; addi r5, r6, 5 ; sne r15, r16, r17 } + { lb_u r25, r26 ; and r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { lb_u r25, r26 ; and r15, r16, r17 ; s3a r5, r6, r7 } + { lb_u r25, r26 ; and r15, r16, r17 ; tblidxb3 r5, r6 } + { lb_u r25, r26 ; and r5, r6, r7 ; s1a r15, r16, r17 } + { lb_u r25, r26 ; and r5, r6, r7 } + { lb_u r25, r26 ; andi r15, r16, 5 ; mulll_uu r5, r6, r7 } + { lb_u r25, r26 ; andi r15, r16, 5 ; shr r5, r6, r7 } + { lb_u r25, r26 ; andi r5, r6, 5 ; and r15, r16, r17 } + { lb_u r25, r26 ; andi r5, r6, 5 ; shl r15, r16, r17 } + { lb_u r25, r26 ; bitx r5, r6 ; fnop } + { lb_u r25, r26 ; bitx r5, r6 ; shr r15, r16, r17 } + { lb_u r25, r26 ; bytex r5, r6 ; info 19 } + { lb_u r25, r26 ; bytex r5, r6 ; slt r15, r16, r17 } + { lb_u r25, r26 ; clz r5, r6 ; move r15, r16 } + { lb_u r25, r26 ; clz r5, r6 ; slte r15, r16, r17 } + { lb_u r25, r26 ; ctz r5, r6 ; mz r15, r16, r17 } + { lb_u r25, r26 ; ctz r5, r6 ; slti r15, r16, 5 } + { lb_u r25, r26 ; fnop ; fnop } + { lb_u r25, r26 ; fnop ; mz r15, r16, r17 } + { lb_u r25, r26 ; fnop ; seq r15, r16, r17 } + { lb_u r25, r26 ; fnop ; slti r15, r16, 5 } + { lb_u r25, r26 ; ill ; addi r5, r6, 5 } + { lb_u r25, r26 ; ill ; mullla_uu r5, r6, r7 } + { lb_u r25, r26 ; ill ; slt r5, r6, r7 } + { lb_u r25, r26 ; info 19 ; and r15, r16, r17 } + { lb_u r25, r26 ; info 19 ; mulhha_uu r5, r6, r7 } + { lb_u r25, r26 ; info 19 ; rli r15, r16, 5 } + { lb_u r25, r26 ; info 19 ; slt r15, r16, r17 } + { lb_u r25, r26 ; info 19 ; tblidxb0 r5, r6 } + { lb_u r25, r26 ; mnz r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { lb_u r25, r26 ; mnz r15, r16, r17 ; s2a r5, r6, r7 } + { lb_u r25, r26 ; mnz r15, r16, r17 ; tblidxb2 r5, r6 } + { lb_u r25, r26 ; mnz r5, r6, r7 ; rli r15, r16, 5 } + { lb_u r25, r26 ; mnz r5, r6, r7 ; xor r15, r16, r17 } + { lb_u r25, r26 ; move r15, r16 ; mulll_ss r5, r6, r7 } + { lb_u r25, r26 ; move r15, r16 ; shli r5, r6, 5 } + { lb_u r25, r26 ; move r5, r6 ; addi r15, r16, 5 } + { lb_u r25, r26 ; move r5, r6 ; seqi r15, r16, 5 } + { lb_u r25, r26 ; movei r15, 5 ; andi r5, r6, 5 } + { lb_u r25, r26 ; movei r15, 5 ; mvz r5, r6, r7 } + { lb_u r25, r26 ; movei r15, 5 ; slte r5, r6, r7 } + { lb_u r25, r26 ; movei r5, 5 ; info 19 } + { lb_u r25, r26 ; movei r5, 5 ; slt r15, r16, r17 } + { lb_u r25, r26 ; mulhh_ss r5, r6, r7 ; move r15, r16 } + { lb_u r25, r26 ; mulhh_ss r5, r6, r7 ; slte r15, r16, r17 } + { lb_u r25, r26 ; mulhh_uu r5, r6, r7 ; mz r15, r16, r17 } + { lb_u r25, r26 ; mulhh_uu r5, r6, r7 ; slti r15, r16, 5 } + { lb_u r25, r26 ; mulhha_ss r5, r6, r7 ; nor r15, r16, r17 } + { lb_u r25, r26 ; mulhha_ss r5, r6, r7 ; sne r15, r16, r17 } + { lb_u r25, r26 ; mulhha_uu r5, r6, r7 ; ori r15, r16, 5 } + { lb_u r25, r26 ; mulhha_uu r5, r6, r7 ; srai r15, r16, 5 } + { lb_u r25, r26 ; mulhlsa_uu r5, r6, r7 ; rli r15, r16, 5 } + { lb_u r25, r26 ; mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 } + { lb_u r25, r26 ; mulll_ss r5, r6, r7 ; s2a r15, r16, r17 } + { lb_u r25, r26 ; mulll_uu r5, r6, r7 ; add r15, r16, r17 } + { lb_u r25, r26 ; mulll_uu r5, r6, r7 ; seq r15, r16, r17 } + { lb_u r25, r26 ; mullla_ss r5, r6, r7 ; and r15, r16, r17 } + { lb_u r25, r26 ; mullla_ss r5, r6, r7 ; shl r15, r16, r17 } + { lb_u r25, r26 ; mullla_uu r5, r6, r7 ; fnop } + { lb_u r25, r26 ; mullla_uu r5, r6, r7 ; shr r15, r16, r17 } + { lb_u r25, r26 ; mvnz r5, r6, r7 ; info 19 } + { lb_u r25, r26 ; mvnz r5, r6, r7 ; slt r15, r16, r17 } + { lb_u r25, r26 ; mvz r5, r6, r7 ; move r15, r16 } + { lb_u r25, r26 ; mvz r5, r6, r7 ; slte r15, r16, r17 } + { lb_u r25, r26 ; mz r15, r16, r17 ; mnz r5, r6, r7 } + { lb_u r25, r26 ; mz r15, r16, r17 ; rl r5, r6, r7 } + { lb_u r25, r26 ; mz r15, r16, r17 ; sub r5, r6, r7 } + { lb_u r25, r26 ; mz r5, r6, r7 ; or r15, r16, r17 } + { lb_u r25, r26 ; mz r5, r6, r7 ; sra r15, r16, r17 } + { lb_u r25, r26 ; nop ; mnz r15, r16, r17 } + { lb_u r25, r26 ; nop ; nor r15, r16, r17 } + { lb_u r25, r26 ; nop ; seqi r5, r6, 5 } + { lb_u r25, r26 ; nop ; slti_u r5, r6, 5 } + { lb_u r25, r26 ; nor r15, r16, r17 ; bitx r5, r6 } + { lb_u r25, r26 ; nor r15, r16, r17 ; mz r5, r6, r7 } + { lb_u r25, r26 ; nor r15, r16, r17 ; slte_u r5, r6, r7 } + { lb_u r25, r26 ; nor r5, r6, r7 ; mnz r15, r16, r17 } + { lb_u r25, r26 ; nor r5, r6, r7 ; slt_u r15, r16, r17 } + { lb_u r25, r26 ; or r15, r16, r17 ; info 19 } + { lb_u r25, r26 ; or r15, r16, r17 ; pcnt r5, r6 } + { lb_u r25, r26 ; or r15, r16, r17 ; srai r5, r6, 5 } + { lb_u r25, r26 ; or r5, r6, r7 ; nor r15, r16, r17 } + { lb_u r25, r26 ; or r5, r6, r7 ; sne r15, r16, r17 } + { lb_u r25, r26 ; ori r15, r16, 5 ; mulhh_uu r5, r6, r7 } + { lb_u r25, r26 ; ori r15, r16, 5 ; s3a r5, r6, r7 } + { lb_u r25, r26 ; ori r15, r16, 5 ; tblidxb3 r5, r6 } + { lb_u r25, r26 ; ori r5, r6, 5 ; s1a r15, r16, r17 } + { lb_u r25, r26 ; ori r5, r6, 5 } + { lb_u r25, r26 ; pcnt r5, r6 ; s3a r15, r16, r17 } + { lb_u r25, r26 ; rl r15, r16, r17 ; addi r5, r6, 5 } + { lb_u r25, r26 ; rl r15, r16, r17 ; mullla_uu r5, r6, r7 } + { lb_u r25, r26 ; rl r15, r16, r17 ; slt r5, r6, r7 } + { lb_u r25, r26 ; rl r5, r6, r7 ; fnop } + { lb_u r25, r26 ; rl r5, r6, r7 ; shr r15, r16, r17 } + { lb_u r25, r26 ; rli r15, r16, 5 ; clz r5, r6 } + { lb_u r25, r26 ; rli r15, r16, 5 ; nor r5, r6, r7 } + { lb_u r25, r26 ; rli r15, r16, 5 ; slti_u r5, r6, 5 } + { lb_u r25, r26 ; rli r5, r6, 5 ; movei r15, 5 } + { lb_u r25, r26 ; rli r5, r6, 5 ; slte_u r15, r16, r17 } + { lb_u r25, r26 ; s1a r15, r16, r17 ; move r5, r6 } + { lb_u r25, r26 ; s1a r15, r16, r17 ; rli r5, r6, 5 } + { lb_u r25, r26 ; s1a r15, r16, r17 ; tblidxb0 r5, r6 } + { lb_u r25, r26 ; s1a r5, r6, r7 ; ori r15, r16, 5 } + { lb_u r25, r26 ; s1a r5, r6, r7 ; srai r15, r16, 5 } + { lb_u r25, r26 ; s2a r15, r16, r17 ; mulhha_uu r5, r6, r7 } + { lb_u r25, r26 ; s2a r15, r16, r17 ; seqi r5, r6, 5 } + { lb_u r25, r26 ; s2a r15, r16, r17 } + { lb_u r25, r26 ; s2a r5, r6, r7 ; s3a r15, r16, r17 } + { lb_u r25, r26 ; s3a r15, r16, r17 ; addi r5, r6, 5 } + { lb_u r25, r26 ; s3a r15, r16, r17 ; mullla_uu r5, r6, r7 } + { lb_u r25, r26 ; s3a r15, r16, r17 ; slt r5, r6, r7 } + { lb_u r25, r26 ; s3a r5, r6, r7 ; fnop } + { lb_u r25, r26 ; s3a r5, r6, r7 ; shr r15, r16, r17 } + { lb_u r25, r26 ; seq r15, r16, r17 ; clz r5, r6 } + { lb_u r25, r26 ; seq r15, r16, r17 ; nor r5, r6, r7 } + { lb_u r25, r26 ; seq r15, r16, r17 ; slti_u r5, r6, 5 } + { lb_u r25, r26 ; seq r5, r6, r7 ; movei r15, 5 } + { lb_u r25, r26 ; seq r5, r6, r7 ; slte_u r15, r16, r17 } + { lb_u r25, r26 ; seqi r15, r16, 5 ; move r5, r6 } + { lb_u r25, r26 ; seqi r15, r16, 5 ; rli r5, r6, 5 } + { lb_u r25, r26 ; seqi r15, r16, 5 ; tblidxb0 r5, r6 } + { lb_u r25, r26 ; seqi r5, r6, 5 ; ori r15, r16, 5 } + { lb_u r25, r26 ; seqi r5, r6, 5 ; srai r15, r16, 5 } + { lb_u r25, r26 ; shl r15, r16, r17 ; mulhha_uu r5, r6, r7 } + { lb_u r25, r26 ; shl r15, r16, r17 ; seqi r5, r6, 5 } + { lb_u r25, r26 ; shl r15, r16, r17 } + { lb_u r25, r26 ; shl r5, r6, r7 ; s3a r15, r16, r17 } + { lb_u r25, r26 ; shli r15, r16, 5 ; addi r5, r6, 5 } + { lb_u r25, r26 ; shli r15, r16, 5 ; mullla_uu r5, r6, r7 } + { lb_u r25, r26 ; shli r15, r16, 5 ; slt r5, r6, r7 } + { lb_u r25, r26 ; shli r5, r6, 5 ; fnop } + { lb_u r25, r26 ; shli r5, r6, 5 ; shr r15, r16, r17 } + { lb_u r25, r26 ; shr r15, r16, r17 ; clz r5, r6 } + { lb_u r25, r26 ; shr r15, r16, r17 ; nor r5, r6, r7 } + { lb_u r25, r26 ; shr r15, r16, r17 ; slti_u r5, r6, 5 } + { lb_u r25, r26 ; shr r5, r6, r7 ; movei r15, 5 } + { lb_u r25, r26 ; shr r5, r6, r7 ; slte_u r15, r16, r17 } + { lb_u r25, r26 ; shri r15, r16, 5 ; move r5, r6 } + { lb_u r25, r26 ; shri r15, r16, 5 ; rli r5, r6, 5 } + { lb_u r25, r26 ; shri r15, r16, 5 ; tblidxb0 r5, r6 } + { lb_u r25, r26 ; shri r5, r6, 5 ; ori r15, r16, 5 } + { lb_u r25, r26 ; shri r5, r6, 5 ; srai r15, r16, 5 } + { lb_u r25, r26 ; slt r15, r16, r17 ; mulhha_uu r5, r6, r7 } + { lb_u r25, r26 ; slt r15, r16, r17 ; seqi r5, r6, 5 } + { lb_u r25, r26 ; slt r15, r16, r17 } + { lb_u r25, r26 ; slt r5, r6, r7 ; s3a r15, r16, r17 } + { lb_u r25, r26 ; slt_u r15, r16, r17 ; addi r5, r6, 5 } + { lb_u r25, r26 ; slt_u r15, r16, r17 ; mullla_uu r5, r6, r7 } + { lb_u r25, r26 ; slt_u r15, r16, r17 ; slt r5, r6, r7 } + { lb_u r25, r26 ; slt_u r5, r6, r7 ; fnop } + { lb_u r25, r26 ; slt_u r5, r6, r7 ; shr r15, r16, r17 } + { lb_u r25, r26 ; slte r15, r16, r17 ; clz r5, r6 } + { lb_u r25, r26 ; slte r15, r16, r17 ; nor r5, r6, r7 } + { lb_u r25, r26 ; slte r15, r16, r17 ; slti_u r5, r6, 5 } + { lb_u r25, r26 ; slte r5, r6, r7 ; movei r15, 5 } + { lb_u r25, r26 ; slte r5, r6, r7 ; slte_u r15, r16, r17 } + { lb_u r25, r26 ; slte_u r15, r16, r17 ; move r5, r6 } + { lb_u r25, r26 ; slte_u r15, r16, r17 ; rli r5, r6, 5 } + { lb_u r25, r26 ; slte_u r15, r16, r17 ; tblidxb0 r5, r6 } + { lb_u r25, r26 ; slte_u r5, r6, r7 ; ori r15, r16, 5 } + { lb_u r25, r26 ; slte_u r5, r6, r7 ; srai r15, r16, 5 } + { lb_u r25, r26 ; slti r15, r16, 5 ; mulhha_uu r5, r6, r7 } + { lb_u r25, r26 ; slti r15, r16, 5 ; seqi r5, r6, 5 } + { lb_u r25, r26 ; slti r15, r16, 5 } + { lb_u r25, r26 ; slti r5, r6, 5 ; s3a r15, r16, r17 } + { lb_u r25, r26 ; slti_u r15, r16, 5 ; addi r5, r6, 5 } + { lb_u r25, r26 ; slti_u r15, r16, 5 ; mullla_uu r5, r6, r7 } + { lb_u r25, r26 ; slti_u r15, r16, 5 ; slt r5, r6, r7 } + { lb_u r25, r26 ; slti_u r5, r6, 5 ; fnop } + { lb_u r25, r26 ; slti_u r5, r6, 5 ; shr r15, r16, r17 } + { lb_u r25, r26 ; sne r15, r16, r17 ; clz r5, r6 } + { lb_u r25, r26 ; sne r15, r16, r17 ; nor r5, r6, r7 } + { lb_u r25, r26 ; sne r15, r16, r17 ; slti_u r5, r6, 5 } + { lb_u r25, r26 ; sne r5, r6, r7 ; movei r15, 5 } + { lb_u r25, r26 ; sne r5, r6, r7 ; slte_u r15, r16, r17 } + { lb_u r25, r26 ; sra r15, r16, r17 ; move r5, r6 } + { lb_u r25, r26 ; sra r15, r16, r17 ; rli r5, r6, 5 } + { lb_u r25, r26 ; sra r15, r16, r17 ; tblidxb0 r5, r6 } + { lb_u r25, r26 ; sra r5, r6, r7 ; ori r15, r16, 5 } + { lb_u r25, r26 ; sra r5, r6, r7 ; srai r15, r16, 5 } + { lb_u r25, r26 ; srai r15, r16, 5 ; mulhha_uu r5, r6, r7 } + { lb_u r25, r26 ; srai r15, r16, 5 ; seqi r5, r6, 5 } + { lb_u r25, r26 ; srai r15, r16, 5 } + { lb_u r25, r26 ; srai r5, r6, 5 ; s3a r15, r16, r17 } + { lb_u r25, r26 ; sub r15, r16, r17 ; addi r5, r6, 5 } + { lb_u r25, r26 ; sub r15, r16, r17 ; mullla_uu r5, r6, r7 } + { lb_u r25, r26 ; sub r15, r16, r17 ; slt r5, r6, r7 } + { lb_u r25, r26 ; sub r5, r6, r7 ; fnop } + { lb_u r25, r26 ; sub r5, r6, r7 ; shr r15, r16, r17 } + { lb_u r25, r26 ; tblidxb0 r5, r6 ; info 19 } + { lb_u r25, r26 ; tblidxb0 r5, r6 ; slt r15, r16, r17 } + { lb_u r25, r26 ; tblidxb1 r5, r6 ; move r15, r16 } + { lb_u r25, r26 ; tblidxb1 r5, r6 ; slte r15, r16, r17 } + { lb_u r25, r26 ; tblidxb2 r5, r6 ; mz r15, r16, r17 } + { lb_u r25, r26 ; tblidxb2 r5, r6 ; slti r15, r16, 5 } + { lb_u r25, r26 ; tblidxb3 r5, r6 ; nor r15, r16, r17 } + { lb_u r25, r26 ; tblidxb3 r5, r6 ; sne r15, r16, r17 } + { lb_u r25, r26 ; xor r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { lb_u r25, r26 ; xor r15, r16, r17 ; s3a r5, r6, r7 } + { lb_u r25, r26 ; xor r15, r16, r17 ; tblidxb3 r5, r6 } + { lb_u r25, r26 ; xor r5, r6, r7 ; s1a r15, r16, r17 } + { lb_u r25, r26 ; xor r5, r6, r7 } + { lbadd r15, r16, 5 ; bytex r5, r6 } + { lbadd r15, r16, 5 ; minih r5, r6, 5 } + { lbadd r15, r16, 5 ; mulhla_ss r5, r6, r7 } + { lbadd r15, r16, 5 ; ori r5, r6, 5 } + { lbadd r15, r16, 5 ; seqi r5, r6, 5 } + { lbadd r15, r16, 5 ; slte_u r5, r6, r7 } + { lbadd r15, r16, 5 ; sraib r5, r6, 5 } + { lbadd_u r15, r16, 5 ; addib r5, r6, 5 } + { lbadd_u r15, r16, 5 ; info 19 } + { lbadd_u r15, r16, 5 ; moveli r5, 0x1234 } + { lbadd_u r15, r16, 5 ; mulll_uu r5, r6, r7 } + { lbadd_u r15, r16, 5 ; rli r5, r6, 5 } + { lbadd_u r15, r16, 5 ; shlib r5, r6, 5 } + { lbadd_u r15, r16, 5 ; slti r5, r6, 5 } + { lbadd_u r15, r16, 5 ; subs r5, r6, r7 } + { lh r15, r16 ; and r5, r6, r7 } + { lh r15, r16 ; maxh r5, r6, r7 } + { lh r15, r16 ; mulhha_uu r5, r6, r7 } + { lh r15, r16 ; mz r5, r6, r7 } + { lh r15, r16 ; sadb_u r5, r6, r7 } + { lh r15, r16 ; shrih r5, r6, 5 } + { lh r15, r16 ; sneb r5, r6, r7 } + { lh r25, r26 ; add r15, r16, r17 ; add r5, r6, r7 } + { lh r25, r26 ; add r15, r16, r17 ; mullla_ss r5, r6, r7 } + { lh r25, r26 ; add r15, r16, r17 ; shri r5, r6, 5 } + { lh r25, r26 ; add r5, r6, r7 ; andi r15, r16, 5 } + { lh r25, r26 ; add r5, r6, r7 ; shli r15, r16, 5 } + { lh r25, r26 ; addi r15, r16, 5 ; bytex r5, r6 } + { lh r25, r26 ; addi r15, r16, 5 ; nop } + { lh r25, r26 ; addi r15, r16, 5 ; slti r5, r6, 5 } + { lh r25, r26 ; addi r5, r6, 5 ; move r15, r16 } + { lh r25, r26 ; addi r5, r6, 5 ; slte r15, r16, r17 } + { lh r25, r26 ; and r15, r16, r17 ; mnz r5, r6, r7 } + { lh r25, r26 ; and r15, r16, r17 ; rl r5, r6, r7 } + { lh r25, r26 ; and r15, r16, r17 ; sub r5, r6, r7 } + { lh r25, r26 ; and r5, r6, r7 ; or r15, r16, r17 } + { lh r25, r26 ; and r5, r6, r7 ; sra r15, r16, r17 } + { lh r25, r26 ; andi r15, r16, 5 ; mulhha_ss r5, r6, r7 } + { lh r25, r26 ; andi r15, r16, 5 ; seq r5, r6, r7 } + { lh r25, r26 ; andi r15, r16, 5 ; xor r5, r6, r7 } + { lh r25, r26 ; andi r5, r6, 5 ; s2a r15, r16, r17 } + { lh r25, r26 ; bitx r5, r6 ; add r15, r16, r17 } + { lh r25, r26 ; bitx r5, r6 ; seq r15, r16, r17 } + { lh r25, r26 ; bytex r5, r6 ; and r15, r16, r17 } + { lh r25, r26 ; bytex r5, r6 ; shl r15, r16, r17 } + { lh r25, r26 ; clz r5, r6 ; fnop } + { lh r25, r26 ; clz r5, r6 ; shr r15, r16, r17 } + { lh r25, r26 ; ctz r5, r6 ; info 19 } + { lh r25, r26 ; ctz r5, r6 ; slt r15, r16, r17 } + { lh r25, r26 ; fnop ; bitx r5, r6 } + { lh r25, r26 ; fnop ; mullla_ss r5, r6, r7 } + { lh r25, r26 ; fnop ; s2a r15, r16, r17 } + { lh r25, r26 ; fnop ; slte r15, r16, r17 } + { lh r25, r26 ; fnop ; xor r15, r16, r17 } + { lh r25, r26 ; ill ; mulhlsa_uu r5, r6, r7 } + { lh r25, r26 ; ill ; shl r5, r6, r7 } + { lh r25, r26 ; info 19 ; add r15, r16, r17 } + { lh r25, r26 ; info 19 ; movei r5, 5 } + { lh r25, r26 ; info 19 ; ori r5, r6, 5 } + { lh r25, r26 ; info 19 ; shr r15, r16, r17 } + { lh r25, r26 ; info 19 ; srai r15, r16, 5 } + { lh r25, r26 ; mnz r15, r16, r17 ; info 19 } + { lh r25, r26 ; mnz r15, r16, r17 ; pcnt r5, r6 } + { lh r25, r26 ; mnz r15, r16, r17 ; srai r5, r6, 5 } + { lh r25, r26 ; mnz r5, r6, r7 ; nor r15, r16, r17 } + { lh r25, r26 ; mnz r5, r6, r7 ; sne r15, r16, r17 } + { lh r25, r26 ; move r15, r16 ; mulhh_uu r5, r6, r7 } + { lh r25, r26 ; move r15, r16 ; s3a r5, r6, r7 } + { lh r25, r26 ; move r15, r16 ; tblidxb3 r5, r6 } + { lh r25, r26 ; move r5, r6 ; s1a r15, r16, r17 } + { lh r25, r26 ; move r5, r6 } + { lh r25, r26 ; movei r15, 5 ; mulll_uu r5, r6, r7 } + { lh r25, r26 ; movei r15, 5 ; shr r5, r6, r7 } + { lh r25, r26 ; movei r5, 5 ; and r15, r16, r17 } + { lh r25, r26 ; movei r5, 5 ; shl r15, r16, r17 } + { lh r25, r26 ; mulhh_ss r5, r6, r7 ; fnop } + { lh r25, r26 ; mulhh_ss r5, r6, r7 ; shr r15, r16, r17 } + { lh r25, r26 ; mulhh_uu r5, r6, r7 ; info 19 } + { lh r25, r26 ; mulhh_uu r5, r6, r7 ; slt r15, r16, r17 } + { lh r25, r26 ; mulhha_ss r5, r6, r7 ; move r15, r16 } + { lh r25, r26 ; mulhha_ss r5, r6, r7 ; slte r15, r16, r17 } + { lh r25, r26 ; mulhha_uu r5, r6, r7 ; mz r15, r16, r17 } + { lh r25, r26 ; mulhha_uu r5, r6, r7 ; slti r15, r16, 5 } + { lh r25, r26 ; mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 } + { lh r25, r26 ; mulhlsa_uu r5, r6, r7 ; sne r15, r16, r17 } + { lh r25, r26 ; mulll_ss r5, r6, r7 ; ori r15, r16, 5 } + { lh r25, r26 ; mulll_ss r5, r6, r7 ; srai r15, r16, 5 } + { lh r25, r26 ; mulll_uu r5, r6, r7 ; rli r15, r16, 5 } + { lh r25, r26 ; mulll_uu r5, r6, r7 ; xor r15, r16, r17 } + { lh r25, r26 ; mullla_ss r5, r6, r7 ; s2a r15, r16, r17 } + { lh r25, r26 ; mullla_uu r5, r6, r7 ; add r15, r16, r17 } + { lh r25, r26 ; mullla_uu r5, r6, r7 ; seq r15, r16, r17 } + { lh r25, r26 ; mvnz r5, r6, r7 ; and r15, r16, r17 } + { lh r25, r26 ; mvnz r5, r6, r7 ; shl r15, r16, r17 } + { lh r25, r26 ; mvz r5, r6, r7 ; fnop } + { lh r25, r26 ; mvz r5, r6, r7 ; shr r15, r16, r17 } + { lh r25, r26 ; mz r15, r16, r17 ; clz r5, r6 } + { lh r25, r26 ; mz r15, r16, r17 ; nor r5, r6, r7 } + { lh r25, r26 ; mz r15, r16, r17 ; slti_u r5, r6, 5 } + { lh r25, r26 ; mz r5, r6, r7 ; movei r15, 5 } + { lh r25, r26 ; mz r5, r6, r7 ; slte_u r15, r16, r17 } + { lh r25, r26 ; nop ; ctz r5, r6 } + { lh r25, r26 ; nop ; mvz r5, r6, r7 } + { lh r25, r26 ; nop ; s3a r5, r6, r7 } + { lh r25, r26 ; nop ; slte_u r5, r6, r7 } + { lh r25, r26 ; nor r15, r16, r17 ; add r5, r6, r7 } + { lh r25, r26 ; nor r15, r16, r17 ; mullla_ss r5, r6, r7 } + { lh r25, r26 ; nor r15, r16, r17 ; shri r5, r6, 5 } + { lh r25, r26 ; nor r5, r6, r7 ; andi r15, r16, 5 } + { lh r25, r26 ; nor r5, r6, r7 ; shli r15, r16, 5 } + { lh r25, r26 ; or r15, r16, r17 ; bytex r5, r6 } + { lh r25, r26 ; or r15, r16, r17 ; nop } + { lh r25, r26 ; or r15, r16, r17 ; slti r5, r6, 5 } + { lh r25, r26 ; or r5, r6, r7 ; move r15, r16 } + { lh r25, r26 ; or r5, r6, r7 ; slte r15, r16, r17 } + { lh r25, r26 ; ori r15, r16, 5 ; mnz r5, r6, r7 } + { lh r25, r26 ; ori r15, r16, 5 ; rl r5, r6, r7 } + { lh r25, r26 ; ori r15, r16, 5 ; sub r5, r6, r7 } + { lh r25, r26 ; ori r5, r6, 5 ; or r15, r16, r17 } + { lh r25, r26 ; ori r5, r6, 5 ; sra r15, r16, r17 } + { lh r25, r26 ; pcnt r5, r6 ; rl r15, r16, r17 } + { lh r25, r26 ; pcnt r5, r6 ; sub r15, r16, r17 } + { lh r25, r26 ; rl r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { lh r25, r26 ; rl r15, r16, r17 ; shl r5, r6, r7 } + { lh r25, r26 ; rl r5, r6, r7 ; add r15, r16, r17 } + { lh r25, r26 ; rl r5, r6, r7 ; seq r15, r16, r17 } + { lh r25, r26 ; rli r15, r16, 5 ; and r5, r6, r7 } + { lh r25, r26 ; rli r15, r16, 5 ; mvnz r5, r6, r7 } + { lh r25, r26 ; rli r15, r16, 5 ; slt_u r5, r6, r7 } + { lh r25, r26 ; rli r5, r6, 5 ; ill } + { lh r25, r26 ; rli r5, r6, 5 ; shri r15, r16, 5 } + { lh r25, r26 ; s1a r15, r16, r17 ; ctz r5, r6 } + { lh r25, r26 ; s1a r15, r16, r17 ; or r5, r6, r7 } + { lh r25, r26 ; s1a r15, r16, r17 ; sne r5, r6, r7 } + { lh r25, r26 ; s1a r5, r6, r7 ; mz r15, r16, r17 } + { lh r25, r26 ; s1a r5, r6, r7 ; slti r15, r16, 5 } + { lh r25, r26 ; s2a r15, r16, r17 ; movei r5, 5 } + { lh r25, r26 ; s2a r15, r16, r17 ; s1a r5, r6, r7 } + { lh r25, r26 ; s2a r15, r16, r17 ; tblidxb1 r5, r6 } + { lh r25, r26 ; s2a r5, r6, r7 ; rl r15, r16, r17 } + { lh r25, r26 ; s2a r5, r6, r7 ; sub r15, r16, r17 } + { lh r25, r26 ; s3a r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { lh r25, r26 ; s3a r15, r16, r17 ; shl r5, r6, r7 } + { lh r25, r26 ; s3a r5, r6, r7 ; add r15, r16, r17 } + { lh r25, r26 ; s3a r5, r6, r7 ; seq r15, r16, r17 } + { lh r25, r26 ; seq r15, r16, r17 ; and r5, r6, r7 } + { lh r25, r26 ; seq r15, r16, r17 ; mvnz r5, r6, r7 } + { lh r25, r26 ; seq r15, r16, r17 ; slt_u r5, r6, r7 } + { lh r25, r26 ; seq r5, r6, r7 ; ill } + { lh r25, r26 ; seq r5, r6, r7 ; shri r15, r16, 5 } + { lh r25, r26 ; seqi r15, r16, 5 ; ctz r5, r6 } + { lh r25, r26 ; seqi r15, r16, 5 ; or r5, r6, r7 } + { lh r25, r26 ; seqi r15, r16, 5 ; sne r5, r6, r7 } + { lh r25, r26 ; seqi r5, r6, 5 ; mz r15, r16, r17 } + { lh r25, r26 ; seqi r5, r6, 5 ; slti r15, r16, 5 } + { lh r25, r26 ; shl r15, r16, r17 ; movei r5, 5 } + { lh r25, r26 ; shl r15, r16, r17 ; s1a r5, r6, r7 } + { lh r25, r26 ; shl r15, r16, r17 ; tblidxb1 r5, r6 } + { lh r25, r26 ; shl r5, r6, r7 ; rl r15, r16, r17 } + { lh r25, r26 ; shl r5, r6, r7 ; sub r15, r16, r17 } + { lh r25, r26 ; shli r15, r16, 5 ; mulhlsa_uu r5, r6, r7 } + { lh r25, r26 ; shli r15, r16, 5 ; shl r5, r6, r7 } + { lh r25, r26 ; shli r5, r6, 5 ; add r15, r16, r17 } + { lh r25, r26 ; shli r5, r6, 5 ; seq r15, r16, r17 } + { lh r25, r26 ; shr r15, r16, r17 ; and r5, r6, r7 } + { lh r25, r26 ; shr r15, r16, r17 ; mvnz r5, r6, r7 } + { lh r25, r26 ; shr r15, r16, r17 ; slt_u r5, r6, r7 } + { lh r25, r26 ; shr r5, r6, r7 ; ill } + { lh r25, r26 ; shr r5, r6, r7 ; shri r15, r16, 5 } + { lh r25, r26 ; shri r15, r16, 5 ; ctz r5, r6 } + { lh r25, r26 ; shri r15, r16, 5 ; or r5, r6, r7 } + { lh r25, r26 ; shri r15, r16, 5 ; sne r5, r6, r7 } + { lh r25, r26 ; shri r5, r6, 5 ; mz r15, r16, r17 } + { lh r25, r26 ; shri r5, r6, 5 ; slti r15, r16, 5 } + { lh r25, r26 ; slt r15, r16, r17 ; movei r5, 5 } + { lh r25, r26 ; slt r15, r16, r17 ; s1a r5, r6, r7 } + { lh r25, r26 ; slt r15, r16, r17 ; tblidxb1 r5, r6 } + { lh r25, r26 ; slt r5, r6, r7 ; rl r15, r16, r17 } + { lh r25, r26 ; slt r5, r6, r7 ; sub r15, r16, r17 } + { lh r25, r26 ; slt_u r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { lh r25, r26 ; slt_u r15, r16, r17 ; shl r5, r6, r7 } + { lh r25, r26 ; slt_u r5, r6, r7 ; add r15, r16, r17 } + { lh r25, r26 ; slt_u r5, r6, r7 ; seq r15, r16, r17 } + { lh r25, r26 ; slte r15, r16, r17 ; and r5, r6, r7 } + { lh r25, r26 ; slte r15, r16, r17 ; mvnz r5, r6, r7 } + { lh r25, r26 ; slte r15, r16, r17 ; slt_u r5, r6, r7 } + { lh r25, r26 ; slte r5, r6, r7 ; ill } + { lh r25, r26 ; slte r5, r6, r7 ; shri r15, r16, 5 } + { lh r25, r26 ; slte_u r15, r16, r17 ; ctz r5, r6 } + { lh r25, r26 ; slte_u r15, r16, r17 ; or r5, r6, r7 } + { lh r25, r26 ; slte_u r15, r16, r17 ; sne r5, r6, r7 } + { lh r25, r26 ; slte_u r5, r6, r7 ; mz r15, r16, r17 } + { lh r25, r26 ; slte_u r5, r6, r7 ; slti r15, r16, 5 } + { lh r25, r26 ; slti r15, r16, 5 ; movei r5, 5 } + { lh r25, r26 ; slti r15, r16, 5 ; s1a r5, r6, r7 } + { lh r25, r26 ; slti r15, r16, 5 ; tblidxb1 r5, r6 } + { lh r25, r26 ; slti r5, r6, 5 ; rl r15, r16, r17 } + { lh r25, r26 ; slti r5, r6, 5 ; sub r15, r16, r17 } + { lh r25, r26 ; slti_u r15, r16, 5 ; mulhlsa_uu r5, r6, r7 } + { lh r25, r26 ; slti_u r15, r16, 5 ; shl r5, r6, r7 } + { lh r25, r26 ; slti_u r5, r6, 5 ; add r15, r16, r17 } + { lh r25, r26 ; slti_u r5, r6, 5 ; seq r15, r16, r17 } + { lh r25, r26 ; sne r15, r16, r17 ; and r5, r6, r7 } + { lh r25, r26 ; sne r15, r16, r17 ; mvnz r5, r6, r7 } + { lh r25, r26 ; sne r15, r16, r17 ; slt_u r5, r6, r7 } + { lh r25, r26 ; sne r5, r6, r7 ; ill } + { lh r25, r26 ; sne r5, r6, r7 ; shri r15, r16, 5 } + { lh r25, r26 ; sra r15, r16, r17 ; ctz r5, r6 } + { lh r25, r26 ; sra r15, r16, r17 ; or r5, r6, r7 } + { lh r25, r26 ; sra r15, r16, r17 ; sne r5, r6, r7 } + { lh r25, r26 ; sra r5, r6, r7 ; mz r15, r16, r17 } + { lh r25, r26 ; sra r5, r6, r7 ; slti r15, r16, 5 } + { lh r25, r26 ; srai r15, r16, 5 ; movei r5, 5 } + { lh r25, r26 ; srai r15, r16, 5 ; s1a r5, r6, r7 } + { lh r25, r26 ; srai r15, r16, 5 ; tblidxb1 r5, r6 } + { lh r25, r26 ; srai r5, r6, 5 ; rl r15, r16, r17 } + { lh r25, r26 ; srai r5, r6, 5 ; sub r15, r16, r17 } + { lh r25, r26 ; sub r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { lh r25, r26 ; sub r15, r16, r17 ; shl r5, r6, r7 } + { lh r25, r26 ; sub r5, r6, r7 ; add r15, r16, r17 } + { lh r25, r26 ; sub r5, r6, r7 ; seq r15, r16, r17 } + { lh r25, r26 ; tblidxb0 r5, r6 ; and r15, r16, r17 } + { lh r25, r26 ; tblidxb0 r5, r6 ; shl r15, r16, r17 } + { lh r25, r26 ; tblidxb1 r5, r6 ; fnop } + { lh r25, r26 ; tblidxb1 r5, r6 ; shr r15, r16, r17 } + { lh r25, r26 ; tblidxb2 r5, r6 ; info 19 } + { lh r25, r26 ; tblidxb2 r5, r6 ; slt r15, r16, r17 } + { lh r25, r26 ; tblidxb3 r5, r6 ; move r15, r16 } + { lh r25, r26 ; tblidxb3 r5, r6 ; slte r15, r16, r17 } + { lh r25, r26 ; xor r15, r16, r17 ; mnz r5, r6, r7 } + { lh r25, r26 ; xor r15, r16, r17 ; rl r5, r6, r7 } + { lh r25, r26 ; xor r15, r16, r17 ; sub r5, r6, r7 } + { lh r25, r26 ; xor r5, r6, r7 ; or r15, r16, r17 } + { lh r25, r26 ; xor r5, r6, r7 ; sra r15, r16, r17 } + { lh_u r15, r16 ; auli r5, r6, 0x1234 } + { lh_u r15, r16 ; maxih r5, r6, 5 } + { lh_u r15, r16 ; mulhl_ss r5, r6, r7 } + { lh_u r15, r16 ; mzh r5, r6, r7 } + { lh_u r15, r16 ; sadh_u r5, r6, r7 } + { lh_u r15, r16 ; slt_u r5, r6, r7 } + { lh_u r15, r16 ; sra r5, r6, r7 } + { lh_u r25, r26 ; add r15, r16, r17 ; and r5, r6, r7 } + { lh_u r25, r26 ; add r15, r16, r17 ; mvnz r5, r6, r7 } + { lh_u r25, r26 ; add r15, r16, r17 ; slt_u r5, r6, r7 } + { lh_u r25, r26 ; add r5, r6, r7 ; ill } + { lh_u r25, r26 ; add r5, r6, r7 ; shri r15, r16, 5 } + { lh_u r25, r26 ; addi r15, r16, 5 ; ctz r5, r6 } + { lh_u r25, r26 ; addi r15, r16, 5 ; or r5, r6, r7 } + { lh_u r25, r26 ; addi r15, r16, 5 ; sne r5, r6, r7 } + { lh_u r25, r26 ; addi r5, r6, 5 ; mz r15, r16, r17 } + { lh_u r25, r26 ; addi r5, r6, 5 ; slti r15, r16, 5 } + { lh_u r25, r26 ; and r15, r16, r17 ; movei r5, 5 } + { lh_u r25, r26 ; and r15, r16, r17 ; s1a r5, r6, r7 } + { lh_u r25, r26 ; and r15, r16, r17 ; tblidxb1 r5, r6 } + { lh_u r25, r26 ; and r5, r6, r7 ; rl r15, r16, r17 } + { lh_u r25, r26 ; and r5, r6, r7 ; sub r15, r16, r17 } + { lh_u r25, r26 ; andi r15, r16, 5 ; mulhlsa_uu r5, r6, r7 } + { lh_u r25, r26 ; andi r15, r16, 5 ; shl r5, r6, r7 } + { lh_u r25, r26 ; andi r5, r6, 5 ; add r15, r16, r17 } + { lh_u r25, r26 ; andi r5, r6, 5 ; seq r15, r16, r17 } + { lh_u r25, r26 ; bitx r5, r6 ; and r15, r16, r17 } + { lh_u r25, r26 ; bitx r5, r6 ; shl r15, r16, r17 } + { lh_u r25, r26 ; bytex r5, r6 ; fnop } + { lh_u r25, r26 ; bytex r5, r6 ; shr r15, r16, r17 } + { lh_u r25, r26 ; clz r5, r6 ; info 19 } + { lh_u r25, r26 ; clz r5, r6 ; slt r15, r16, r17 } + { lh_u r25, r26 ; ctz r5, r6 ; move r15, r16 } + { lh_u r25, r26 ; ctz r5, r6 ; slte r15, r16, r17 } + { lh_u r25, r26 ; fnop ; clz r5, r6 } + { lh_u r25, r26 ; fnop ; mvnz r5, r6, r7 } + { lh_u r25, r26 ; fnop ; s3a r15, r16, r17 } + { lh_u r25, r26 ; fnop ; slte_u r15, r16, r17 } + { lh_u r25, r26 ; fnop } + { lh_u r25, r26 ; ill ; mulll_uu r5, r6, r7 } + { lh_u r25, r26 ; ill ; shr r5, r6, r7 } + { lh_u r25, r26 ; info 19 ; addi r15, r16, 5 } + { lh_u r25, r26 ; info 19 ; mulhh_uu r5, r6, r7 } + { lh_u r25, r26 ; info 19 ; rl r15, r16, r17 } + { lh_u r25, r26 ; info 19 ; shri r15, r16, 5 } + { lh_u r25, r26 ; info 19 ; sub r15, r16, r17 } + { lh_u r25, r26 ; mnz r15, r16, r17 ; move r5, r6 } + { lh_u r25, r26 ; mnz r15, r16, r17 ; rli r5, r6, 5 } + { lh_u r25, r26 ; mnz r15, r16, r17 ; tblidxb0 r5, r6 } + { lh_u r25, r26 ; mnz r5, r6, r7 ; ori r15, r16, 5 } + { lh_u r25, r26 ; mnz r5, r6, r7 ; srai r15, r16, 5 } + { lh_u r25, r26 ; move r15, r16 ; mulhha_uu r5, r6, r7 } + { lh_u r25, r26 ; move r15, r16 ; seqi r5, r6, 5 } + { lh_u r25, r26 ; move r15, r16 } + { lh_u r25, r26 ; move r5, r6 ; s3a r15, r16, r17 } + { lh_u r25, r26 ; movei r15, 5 ; addi r5, r6, 5 } + { lh_u r25, r26 ; movei r15, 5 ; mullla_uu r5, r6, r7 } + { lh_u r25, r26 ; movei r15, 5 ; slt r5, r6, r7 } + { lh_u r25, r26 ; movei r5, 5 ; fnop } + { lh_u r25, r26 ; movei r5, 5 ; shr r15, r16, r17 } + { lh_u r25, r26 ; mulhh_ss r5, r6, r7 ; info 19 } + { lh_u r25, r26 ; mulhh_ss r5, r6, r7 ; slt r15, r16, r17 } + { lh_u r25, r26 ; mulhh_uu r5, r6, r7 ; move r15, r16 } + { lh_u r25, r26 ; mulhh_uu r5, r6, r7 ; slte r15, r16, r17 } + { lh_u r25, r26 ; mulhha_ss r5, r6, r7 ; mz r15, r16, r17 } + { lh_u r25, r26 ; mulhha_ss r5, r6, r7 ; slti r15, r16, 5 } + { lh_u r25, r26 ; mulhha_uu r5, r6, r7 ; nor r15, r16, r17 } + { lh_u r25, r26 ; mulhha_uu r5, r6, r7 ; sne r15, r16, r17 } + { lh_u r25, r26 ; mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 } + { lh_u r25, r26 ; mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 } + { lh_u r25, r26 ; mulll_ss r5, r6, r7 ; rli r15, r16, 5 } + { lh_u r25, r26 ; mulll_ss r5, r6, r7 ; xor r15, r16, r17 } + { lh_u r25, r26 ; mulll_uu r5, r6, r7 ; s2a r15, r16, r17 } + { lh_u r25, r26 ; mullla_ss r5, r6, r7 ; add r15, r16, r17 } + { lh_u r25, r26 ; mullla_ss r5, r6, r7 ; seq r15, r16, r17 } + { lh_u r25, r26 ; mullla_uu r5, r6, r7 ; and r15, r16, r17 } + { lh_u r25, r26 ; mullla_uu r5, r6, r7 ; shl r15, r16, r17 } + { lh_u r25, r26 ; mvnz r5, r6, r7 ; fnop } + { lh_u r25, r26 ; mvnz r5, r6, r7 ; shr r15, r16, r17 } + { lh_u r25, r26 ; mvz r5, r6, r7 ; info 19 } + { lh_u r25, r26 ; mvz r5, r6, r7 ; slt r15, r16, r17 } + { lh_u r25, r26 ; mz r15, r16, r17 ; fnop } + { lh_u r25, r26 ; mz r15, r16, r17 ; ori r5, r6, 5 } + { lh_u r25, r26 ; mz r15, r16, r17 ; sra r5, r6, r7 } + { lh_u r25, r26 ; mz r5, r6, r7 ; nop } + { lh_u r25, r26 ; mz r5, r6, r7 ; slti_u r15, r16, 5 } + { lh_u r25, r26 ; nop ; ill } + { lh_u r25, r26 ; nop ; mz r5, r6, r7 } + { lh_u r25, r26 ; nop ; seq r5, r6, r7 } + { lh_u r25, r26 ; nop ; slti r5, r6, 5 } + { lh_u r25, r26 ; nor r15, r16, r17 ; and r5, r6, r7 } + { lh_u r25, r26 ; nor r15, r16, r17 ; mvnz r5, r6, r7 } + { lh_u r25, r26 ; nor r15, r16, r17 ; slt_u r5, r6, r7 } + { lh_u r25, r26 ; nor r5, r6, r7 ; ill } + { lh_u r25, r26 ; nor r5, r6, r7 ; shri r15, r16, 5 } + { lh_u r25, r26 ; or r15, r16, r17 ; ctz r5, r6 } + { lh_u r25, r26 ; or r15, r16, r17 ; or r5, r6, r7 } + { lh_u r25, r26 ; or r15, r16, r17 ; sne r5, r6, r7 } + { lh_u r25, r26 ; or r5, r6, r7 ; mz r15, r16, r17 } + { lh_u r25, r26 ; or r5, r6, r7 ; slti r15, r16, 5 } + { lh_u r25, r26 ; ori r15, r16, 5 ; movei r5, 5 } + { lh_u r25, r26 ; ori r15, r16, 5 ; s1a r5, r6, r7 } + { lh_u r25, r26 ; ori r15, r16, 5 ; tblidxb1 r5, r6 } + { lh_u r25, r26 ; ori r5, r6, 5 ; rl r15, r16, r17 } + { lh_u r25, r26 ; ori r5, r6, 5 ; sub r15, r16, r17 } + { lh_u r25, r26 ; pcnt r5, r6 ; s1a r15, r16, r17 } + { lh_u r25, r26 ; pcnt r5, r6 } + { lh_u r25, r26 ; rl r15, r16, r17 ; mulll_uu r5, r6, r7 } + { lh_u r25, r26 ; rl r15, r16, r17 ; shr r5, r6, r7 } + { lh_u r25, r26 ; rl r5, r6, r7 ; and r15, r16, r17 } + { lh_u r25, r26 ; rl r5, r6, r7 ; shl r15, r16, r17 } + { lh_u r25, r26 ; rli r15, r16, 5 ; bitx r5, r6 } + { lh_u r25, r26 ; rli r15, r16, 5 ; mz r5, r6, r7 } + { lh_u r25, r26 ; rli r15, r16, 5 ; slte_u r5, r6, r7 } + { lh_u r25, r26 ; rli r5, r6, 5 ; mnz r15, r16, r17 } + { lh_u r25, r26 ; rli r5, r6, 5 ; slt_u r15, r16, r17 } + { lh_u r25, r26 ; s1a r15, r16, r17 ; info 19 } + { lh_u r25, r26 ; s1a r15, r16, r17 ; pcnt r5, r6 } + { lh_u r25, r26 ; s1a r15, r16, r17 ; srai r5, r6, 5 } + { lh_u r25, r26 ; s1a r5, r6, r7 ; nor r15, r16, r17 } + { lh_u r25, r26 ; s1a r5, r6, r7 ; sne r15, r16, r17 } + { lh_u r25, r26 ; s2a r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { lh_u r25, r26 ; s2a r15, r16, r17 ; s3a r5, r6, r7 } + { lh_u r25, r26 ; s2a r15, r16, r17 ; tblidxb3 r5, r6 } + { lh_u r25, r26 ; s2a r5, r6, r7 ; s1a r15, r16, r17 } + { lh_u r25, r26 ; s2a r5, r6, r7 } + { lh_u r25, r26 ; s3a r15, r16, r17 ; mulll_uu r5, r6, r7 } + { lh_u r25, r26 ; s3a r15, r16, r17 ; shr r5, r6, r7 } + { lh_u r25, r26 ; s3a r5, r6, r7 ; and r15, r16, r17 } + { lh_u r25, r26 ; s3a r5, r6, r7 ; shl r15, r16, r17 } + { lh_u r25, r26 ; seq r15, r16, r17 ; bitx r5, r6 } + { lh_u r25, r26 ; seq r15, r16, r17 ; mz r5, r6, r7 } + { lh_u r25, r26 ; seq r15, r16, r17 ; slte_u r5, r6, r7 } + { lh_u r25, r26 ; seq r5, r6, r7 ; mnz r15, r16, r17 } + { lh_u r25, r26 ; seq r5, r6, r7 ; slt_u r15, r16, r17 } + { lh_u r25, r26 ; seqi r15, r16, 5 ; info 19 } + { lh_u r25, r26 ; seqi r15, r16, 5 ; pcnt r5, r6 } + { lh_u r25, r26 ; seqi r15, r16, 5 ; srai r5, r6, 5 } + { lh_u r25, r26 ; seqi r5, r6, 5 ; nor r15, r16, r17 } + { lh_u r25, r26 ; seqi r5, r6, 5 ; sne r15, r16, r17 } + { lh_u r25, r26 ; shl r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { lh_u r25, r26 ; shl r15, r16, r17 ; s3a r5, r6, r7 } + { lh_u r25, r26 ; shl r15, r16, r17 ; tblidxb3 r5, r6 } + { lh_u r25, r26 ; shl r5, r6, r7 ; s1a r15, r16, r17 } + { lh_u r25, r26 ; shl r5, r6, r7 } + { lh_u r25, r26 ; shli r15, r16, 5 ; mulll_uu r5, r6, r7 } + { lh_u r25, r26 ; shli r15, r16, 5 ; shr r5, r6, r7 } + { lh_u r25, r26 ; shli r5, r6, 5 ; and r15, r16, r17 } + { lh_u r25, r26 ; shli r5, r6, 5 ; shl r15, r16, r17 } + { lh_u r25, r26 ; shr r15, r16, r17 ; bitx r5, r6 } + { lh_u r25, r26 ; shr r15, r16, r17 ; mz r5, r6, r7 } + { lh_u r25, r26 ; shr r15, r16, r17 ; slte_u r5, r6, r7 } + { lh_u r25, r26 ; shr r5, r6, r7 ; mnz r15, r16, r17 } + { lh_u r25, r26 ; shr r5, r6, r7 ; slt_u r15, r16, r17 } + { lh_u r25, r26 ; shri r15, r16, 5 ; info 19 } + { lh_u r25, r26 ; shri r15, r16, 5 ; pcnt r5, r6 } + { lh_u r25, r26 ; shri r15, r16, 5 ; srai r5, r6, 5 } + { lh_u r25, r26 ; shri r5, r6, 5 ; nor r15, r16, r17 } + { lh_u r25, r26 ; shri r5, r6, 5 ; sne r15, r16, r17 } + { lh_u r25, r26 ; slt r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { lh_u r25, r26 ; slt r15, r16, r17 ; s3a r5, r6, r7 } + { lh_u r25, r26 ; slt r15, r16, r17 ; tblidxb3 r5, r6 } + { lh_u r25, r26 ; slt r5, r6, r7 ; s1a r15, r16, r17 } + { lh_u r25, r26 ; slt r5, r6, r7 } + { lh_u r25, r26 ; slt_u r15, r16, r17 ; mulll_uu r5, r6, r7 } + { lh_u r25, r26 ; slt_u r15, r16, r17 ; shr r5, r6, r7 } + { lh_u r25, r26 ; slt_u r5, r6, r7 ; and r15, r16, r17 } + { lh_u r25, r26 ; slt_u r5, r6, r7 ; shl r15, r16, r17 } + { lh_u r25, r26 ; slte r15, r16, r17 ; bitx r5, r6 } + { lh_u r25, r26 ; slte r15, r16, r17 ; mz r5, r6, r7 } + { lh_u r25, r26 ; slte r15, r16, r17 ; slte_u r5, r6, r7 } + { lh_u r25, r26 ; slte r5, r6, r7 ; mnz r15, r16, r17 } + { lh_u r25, r26 ; slte r5, r6, r7 ; slt_u r15, r16, r17 } + { lh_u r25, r26 ; slte_u r15, r16, r17 ; info 19 } + { lh_u r25, r26 ; slte_u r15, r16, r17 ; pcnt r5, r6 } + { lh_u r25, r26 ; slte_u r15, r16, r17 ; srai r5, r6, 5 } + { lh_u r25, r26 ; slte_u r5, r6, r7 ; nor r15, r16, r17 } + { lh_u r25, r26 ; slte_u r5, r6, r7 ; sne r15, r16, r17 } + { lh_u r25, r26 ; slti r15, r16, 5 ; mulhh_uu r5, r6, r7 } + { lh_u r25, r26 ; slti r15, r16, 5 ; s3a r5, r6, r7 } + { lh_u r25, r26 ; slti r15, r16, 5 ; tblidxb3 r5, r6 } + { lh_u r25, r26 ; slti r5, r6, 5 ; s1a r15, r16, r17 } + { lh_u r25, r26 ; slti r5, r6, 5 } + { lh_u r25, r26 ; slti_u r15, r16, 5 ; mulll_uu r5, r6, r7 } + { lh_u r25, r26 ; slti_u r15, r16, 5 ; shr r5, r6, r7 } + { lh_u r25, r26 ; slti_u r5, r6, 5 ; and r15, r16, r17 } + { lh_u r25, r26 ; slti_u r5, r6, 5 ; shl r15, r16, r17 } + { lh_u r25, r26 ; sne r15, r16, r17 ; bitx r5, r6 } + { lh_u r25, r26 ; sne r15, r16, r17 ; mz r5, r6, r7 } + { lh_u r25, r26 ; sne r15, r16, r17 ; slte_u r5, r6, r7 } + { lh_u r25, r26 ; sne r5, r6, r7 ; mnz r15, r16, r17 } + { lh_u r25, r26 ; sne r5, r6, r7 ; slt_u r15, r16, r17 } + { lh_u r25, r26 ; sra r15, r16, r17 ; info 19 } + { lh_u r25, r26 ; sra r15, r16, r17 ; pcnt r5, r6 } + { lh_u r25, r26 ; sra r15, r16, r17 ; srai r5, r6, 5 } + { lh_u r25, r26 ; sra r5, r6, r7 ; nor r15, r16, r17 } + { lh_u r25, r26 ; sra r5, r6, r7 ; sne r15, r16, r17 } + { lh_u r25, r26 ; srai r15, r16, 5 ; mulhh_uu r5, r6, r7 } + { lh_u r25, r26 ; srai r15, r16, 5 ; s3a r5, r6, r7 } + { lh_u r25, r26 ; srai r15, r16, 5 ; tblidxb3 r5, r6 } + { lh_u r25, r26 ; srai r5, r6, 5 ; s1a r15, r16, r17 } + { lh_u r25, r26 ; srai r5, r6, 5 } + { lh_u r25, r26 ; sub r15, r16, r17 ; mulll_uu r5, r6, r7 } + { lh_u r25, r26 ; sub r15, r16, r17 ; shr r5, r6, r7 } + { lh_u r25, r26 ; sub r5, r6, r7 ; and r15, r16, r17 } + { lh_u r25, r26 ; sub r5, r6, r7 ; shl r15, r16, r17 } + { lh_u r25, r26 ; tblidxb0 r5, r6 ; fnop } + { lh_u r25, r26 ; tblidxb0 r5, r6 ; shr r15, r16, r17 } + { lh_u r25, r26 ; tblidxb1 r5, r6 ; info 19 } + { lh_u r25, r26 ; tblidxb1 r5, r6 ; slt r15, r16, r17 } + { lh_u r25, r26 ; tblidxb2 r5, r6 ; move r15, r16 } + { lh_u r25, r26 ; tblidxb2 r5, r6 ; slte r15, r16, r17 } + { lh_u r25, r26 ; tblidxb3 r5, r6 ; mz r15, r16, r17 } + { lh_u r25, r26 ; tblidxb3 r5, r6 ; slti r15, r16, 5 } + { lh_u r25, r26 ; xor r15, r16, r17 ; movei r5, 5 } + { lh_u r25, r26 ; xor r15, r16, r17 ; s1a r5, r6, r7 } + { lh_u r25, r26 ; xor r15, r16, r17 ; tblidxb1 r5, r6 } + { lh_u r25, r26 ; xor r5, r6, r7 ; rl r15, r16, r17 } + { lh_u r25, r26 ; xor r5, r6, r7 ; sub r15, r16, r17 } + { lhadd r15, r16, 5 ; avgh r5, r6, r7 } + { lhadd r15, r16, 5 ; minh r5, r6, r7 } + { lhadd r15, r16, 5 ; mulhl_us r5, r6, r7 } + { lhadd r15, r16, 5 ; nor r5, r6, r7 } + { lhadd r15, r16, 5 ; seqb r5, r6, r7 } + { lhadd r15, r16, 5 ; sltb_u r5, r6, r7 } + { lhadd r15, r16, 5 ; srah r5, r6, r7 } + { lhadd_u r15, r16, 5 ; addhs r5, r6, r7 } + { lhadd_u r15, r16, 5 ; dword_align r5, r6, r7 } + { lhadd_u r15, r16, 5 ; move r5, r6 } + { lhadd_u r15, r16, 5 ; mulll_ss r5, r6, r7 } + { lhadd_u r15, r16, 5 ; pcnt r5, r6 } + { lhadd_u r15, r16, 5 ; shlh r5, r6, r7 } + { lhadd_u r15, r16, 5 ; slth r5, r6, r7 } + { lhadd_u r15, r16, 5 ; subh r5, r6, r7 } + { lnk r15 ; adiffb_u r5, r6, r7 } + { lnk r15 ; intlh r5, r6, r7 } + { lnk r15 ; mulhha_ss r5, r6, r7 } + { lnk r15 ; mvnz r5, r6, r7 } + { lnk r15 ; sadah r5, r6, r7 } + { lnk r15 ; shri r5, r6, 5 } + { lnk r15 ; sltih_u r5, r6, 5 } + { lnk r15 ; xor r5, r6, r7 } + { lw r15, r16 ; bitx r5, r6 } + { lw r15, r16 ; minib_u r5, r6, 5 } + { lw r15, r16 ; mulhl_uu r5, r6, r7 } + { lw r15, r16 ; or r5, r6, r7 } + { lw r15, r16 ; seqh r5, r6, r7 } + { lw r15, r16 ; slte r5, r6, r7 } + { lw r15, r16 ; srai r5, r6, 5 } + { lw r25, r26 ; add r15, r16, r17 ; bytex r5, r6 } + { lw r25, r26 ; add r15, r16, r17 ; nop } + { lw r25, r26 ; add r15, r16, r17 ; slti r5, r6, 5 } + { lw r25, r26 ; add r5, r6, r7 ; move r15, r16 } + { lw r25, r26 ; add r5, r6, r7 ; slte r15, r16, r17 } + { lw r25, r26 ; addi r15, r16, 5 ; mnz r5, r6, r7 } + { lw r25, r26 ; addi r15, r16, 5 ; rl r5, r6, r7 } + { lw r25, r26 ; addi r15, r16, 5 ; sub r5, r6, r7 } + { lw r25, r26 ; addi r5, r6, 5 ; or r15, r16, r17 } + { lw r25, r26 ; addi r5, r6, 5 ; sra r15, r16, r17 } + { lw r25, r26 ; and r15, r16, r17 ; mulhha_ss r5, r6, r7 } + { lw r25, r26 ; and r15, r16, r17 ; seq r5, r6, r7 } + { lw r25, r26 ; and r15, r16, r17 ; xor r5, r6, r7 } + { lw r25, r26 ; and r5, r6, r7 ; s2a r15, r16, r17 } + { lw r25, r26 ; andi r15, r16, 5 ; add r5, r6, r7 } + { lw r25, r26 ; andi r15, r16, 5 ; mullla_ss r5, r6, r7 } + { lw r25, r26 ; andi r15, r16, 5 ; shri r5, r6, 5 } + { lw r25, r26 ; andi r5, r6, 5 ; andi r15, r16, 5 } + { lw r25, r26 ; andi r5, r6, 5 ; shli r15, r16, 5 } + { lw r25, r26 ; bitx r5, r6 ; ill } + { lw r25, r26 ; bitx r5, r6 ; shri r15, r16, 5 } + { lw r25, r26 ; bytex r5, r6 ; mnz r15, r16, r17 } + { lw r25, r26 ; bytex r5, r6 ; slt_u r15, r16, r17 } + { lw r25, r26 ; clz r5, r6 ; movei r15, 5 } + { lw r25, r26 ; clz r5, r6 ; slte_u r15, r16, r17 } + { lw r25, r26 ; ctz r5, r6 ; nop } + { lw r25, r26 ; ctz r5, r6 ; slti_u r15, r16, 5 } + { lw r25, r26 ; fnop ; ill } + { lw r25, r26 ; fnop ; mz r5, r6, r7 } + { lw r25, r26 ; fnop ; seq r5, r6, r7 } + { lw r25, r26 ; fnop ; slti r5, r6, 5 } + { lw r25, r26 ; ill ; and r5, r6, r7 } + { lw r25, r26 ; ill ; mvnz r5, r6, r7 } + { lw r25, r26 ; ill ; slt_u r5, r6, r7 } + { lw r25, r26 ; info 19 ; and r5, r6, r7 } + { lw r25, r26 ; info 19 ; mulhlsa_uu r5, r6, r7 } + { lw r25, r26 ; info 19 ; rli r5, r6, 5 } + { lw r25, r26 ; info 19 ; slt r5, r6, r7 } + { lw r25, r26 ; info 19 ; tblidxb1 r5, r6 } + { lw r25, r26 ; mnz r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { lw r25, r26 ; mnz r15, r16, r17 ; s3a r5, r6, r7 } + { lw r25, r26 ; mnz r15, r16, r17 ; tblidxb3 r5, r6 } + { lw r25, r26 ; mnz r5, r6, r7 ; s1a r15, r16, r17 } + { lw r25, r26 ; mnz r5, r6, r7 } + { lw r25, r26 ; move r15, r16 ; mulll_uu r5, r6, r7 } + { lw r25, r26 ; move r15, r16 ; shr r5, r6, r7 } + { lw r25, r26 ; move r5, r6 ; and r15, r16, r17 } + { lw r25, r26 ; move r5, r6 ; shl r15, r16, r17 } + { lw r25, r26 ; movei r15, 5 ; bitx r5, r6 } + { lw r25, r26 ; movei r15, 5 ; mz r5, r6, r7 } + { lw r25, r26 ; movei r15, 5 ; slte_u r5, r6, r7 } + { lw r25, r26 ; movei r5, 5 ; mnz r15, r16, r17 } + { lw r25, r26 ; movei r5, 5 ; slt_u r15, r16, r17 } + { lw r25, r26 ; mulhh_ss r5, r6, r7 ; movei r15, 5 } + { lw r25, r26 ; mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 } + { lw r25, r26 ; mulhh_uu r5, r6, r7 ; nop } + { lw r25, r26 ; mulhh_uu r5, r6, r7 ; slti_u r15, r16, 5 } + { lw r25, r26 ; mulhha_ss r5, r6, r7 ; or r15, r16, r17 } + { lw r25, r26 ; mulhha_ss r5, r6, r7 ; sra r15, r16, r17 } + { lw r25, r26 ; mulhha_uu r5, r6, r7 ; rl r15, r16, r17 } + { lw r25, r26 ; mulhha_uu r5, r6, r7 ; sub r15, r16, r17 } + { lw r25, r26 ; mulhlsa_uu r5, r6, r7 ; s1a r15, r16, r17 } + { lw r25, r26 ; mulhlsa_uu r5, r6, r7 } + { lw r25, r26 ; mulll_ss r5, r6, r7 ; s3a r15, r16, r17 } + { lw r25, r26 ; mulll_uu r5, r6, r7 ; addi r15, r16, 5 } + { lw r25, r26 ; mulll_uu r5, r6, r7 ; seqi r15, r16, 5 } + { lw r25, r26 ; mullla_ss r5, r6, r7 ; andi r15, r16, 5 } + { lw r25, r26 ; mullla_ss r5, r6, r7 ; shli r15, r16, 5 } + { lw r25, r26 ; mullla_uu r5, r6, r7 ; ill } + { lw r25, r26 ; mullla_uu r5, r6, r7 ; shri r15, r16, 5 } + { lw r25, r26 ; mvnz r5, r6, r7 ; mnz r15, r16, r17 } + { lw r25, r26 ; mvnz r5, r6, r7 ; slt_u r15, r16, r17 } + { lw r25, r26 ; mvz r5, r6, r7 ; movei r15, 5 } + { lw r25, r26 ; mvz r5, r6, r7 ; slte_u r15, r16, r17 } + { lw r25, r26 ; mz r15, r16, r17 ; move r5, r6 } + { lw r25, r26 ; mz r15, r16, r17 ; rli r5, r6, 5 } + { lw r25, r26 ; mz r15, r16, r17 ; tblidxb0 r5, r6 } + { lw r25, r26 ; mz r5, r6, r7 ; ori r15, r16, 5 } + { lw r25, r26 ; mz r5, r6, r7 ; srai r15, r16, 5 } + { lw r25, r26 ; nop ; mnz r5, r6, r7 } + { lw r25, r26 ; nop ; nor r5, r6, r7 } + { lw r25, r26 ; nop ; shl r15, r16, r17 } + { lw r25, r26 ; nop ; sne r15, r16, r17 } + { lw r25, r26 ; nor r15, r16, r17 ; bytex r5, r6 } + { lw r25, r26 ; nor r15, r16, r17 ; nop } + { lw r25, r26 ; nor r15, r16, r17 ; slti r5, r6, 5 } + { lw r25, r26 ; nor r5, r6, r7 ; move r15, r16 } + { lw r25, r26 ; nor r5, r6, r7 ; slte r15, r16, r17 } + { lw r25, r26 ; or r15, r16, r17 ; mnz r5, r6, r7 } + { lw r25, r26 ; or r15, r16, r17 ; rl r5, r6, r7 } + { lw r25, r26 ; or r15, r16, r17 ; sub r5, r6, r7 } + { lw r25, r26 ; or r5, r6, r7 ; or r15, r16, r17 } + { lw r25, r26 ; or r5, r6, r7 ; sra r15, r16, r17 } + { lw r25, r26 ; ori r15, r16, 5 ; mulhha_ss r5, r6, r7 } + { lw r25, r26 ; ori r15, r16, 5 ; seq r5, r6, r7 } + { lw r25, r26 ; ori r15, r16, 5 ; xor r5, r6, r7 } + { lw r25, r26 ; ori r5, r6, 5 ; s2a r15, r16, r17 } + { lw r25, r26 ; pcnt r5, r6 ; add r15, r16, r17 } + { lw r25, r26 ; pcnt r5, r6 ; seq r15, r16, r17 } + { lw r25, r26 ; rl r15, r16, r17 ; and r5, r6, r7 } + { lw r25, r26 ; rl r15, r16, r17 ; mvnz r5, r6, r7 } + { lw r25, r26 ; rl r15, r16, r17 ; slt_u r5, r6, r7 } + { lw r25, r26 ; rl r5, r6, r7 ; ill } + { lw r25, r26 ; rl r5, r6, r7 ; shri r15, r16, 5 } + { lw r25, r26 ; rli r15, r16, 5 ; ctz r5, r6 } + { lw r25, r26 ; rli r15, r16, 5 ; or r5, r6, r7 } + { lw r25, r26 ; rli r15, r16, 5 ; sne r5, r6, r7 } + { lw r25, r26 ; rli r5, r6, 5 ; mz r15, r16, r17 } + { lw r25, r26 ; rli r5, r6, 5 ; slti r15, r16, 5 } + { lw r25, r26 ; s1a r15, r16, r17 ; movei r5, 5 } + { lw r25, r26 ; s1a r15, r16, r17 ; s1a r5, r6, r7 } + { lw r25, r26 ; s1a r15, r16, r17 ; tblidxb1 r5, r6 } + { lw r25, r26 ; s1a r5, r6, r7 ; rl r15, r16, r17 } + { lw r25, r26 ; s1a r5, r6, r7 ; sub r15, r16, r17 } + { lw r25, r26 ; s2a r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { lw r25, r26 ; s2a r15, r16, r17 ; shl r5, r6, r7 } + { lw r25, r26 ; s2a r5, r6, r7 ; add r15, r16, r17 } + { lw r25, r26 ; s2a r5, r6, r7 ; seq r15, r16, r17 } + { lw r25, r26 ; s3a r15, r16, r17 ; and r5, r6, r7 } + { lw r25, r26 ; s3a r15, r16, r17 ; mvnz r5, r6, r7 } + { lw r25, r26 ; s3a r15, r16, r17 ; slt_u r5, r6, r7 } + { lw r25, r26 ; s3a r5, r6, r7 ; ill } + { lw r25, r26 ; s3a r5, r6, r7 ; shri r15, r16, 5 } + { lw r25, r26 ; seq r15, r16, r17 ; ctz r5, r6 } + { lw r25, r26 ; seq r15, r16, r17 ; or r5, r6, r7 } + { lw r25, r26 ; seq r15, r16, r17 ; sne r5, r6, r7 } + { lw r25, r26 ; seq r5, r6, r7 ; mz r15, r16, r17 } + { lw r25, r26 ; seq r5, r6, r7 ; slti r15, r16, 5 } + { lw r25, r26 ; seqi r15, r16, 5 ; movei r5, 5 } + { lw r25, r26 ; seqi r15, r16, 5 ; s1a r5, r6, r7 } + { lw r25, r26 ; seqi r15, r16, 5 ; tblidxb1 r5, r6 } + { lw r25, r26 ; seqi r5, r6, 5 ; rl r15, r16, r17 } + { lw r25, r26 ; seqi r5, r6, 5 ; sub r15, r16, r17 } + { lw r25, r26 ; shl r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { lw r25, r26 ; shl r15, r16, r17 ; shl r5, r6, r7 } + { lw r25, r26 ; shl r5, r6, r7 ; add r15, r16, r17 } + { lw r25, r26 ; shl r5, r6, r7 ; seq r15, r16, r17 } + { lw r25, r26 ; shli r15, r16, 5 ; and r5, r6, r7 } + { lw r25, r26 ; shli r15, r16, 5 ; mvnz r5, r6, r7 } + { lw r25, r26 ; shli r15, r16, 5 ; slt_u r5, r6, r7 } + { lw r25, r26 ; shli r5, r6, 5 ; ill } + { lw r25, r26 ; shli r5, r6, 5 ; shri r15, r16, 5 } + { lw r25, r26 ; shr r15, r16, r17 ; ctz r5, r6 } + { lw r25, r26 ; shr r15, r16, r17 ; or r5, r6, r7 } + { lw r25, r26 ; shr r15, r16, r17 ; sne r5, r6, r7 } + { lw r25, r26 ; shr r5, r6, r7 ; mz r15, r16, r17 } + { lw r25, r26 ; shr r5, r6, r7 ; slti r15, r16, 5 } + { lw r25, r26 ; shri r15, r16, 5 ; movei r5, 5 } + { lw r25, r26 ; shri r15, r16, 5 ; s1a r5, r6, r7 } + { lw r25, r26 ; shri r15, r16, 5 ; tblidxb1 r5, r6 } + { lw r25, r26 ; shri r5, r6, 5 ; rl r15, r16, r17 } + { lw r25, r26 ; shri r5, r6, 5 ; sub r15, r16, r17 } + { lw r25, r26 ; slt r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { lw r25, r26 ; slt r15, r16, r17 ; shl r5, r6, r7 } + { lw r25, r26 ; slt r5, r6, r7 ; add r15, r16, r17 } + { lw r25, r26 ; slt r5, r6, r7 ; seq r15, r16, r17 } + { lw r25, r26 ; slt_u r15, r16, r17 ; and r5, r6, r7 } + { lw r25, r26 ; slt_u r15, r16, r17 ; mvnz r5, r6, r7 } + { lw r25, r26 ; slt_u r15, r16, r17 ; slt_u r5, r6, r7 } + { lw r25, r26 ; slt_u r5, r6, r7 ; ill } + { lw r25, r26 ; slt_u r5, r6, r7 ; shri r15, r16, 5 } + { lw r25, r26 ; slte r15, r16, r17 ; ctz r5, r6 } + { lw r25, r26 ; slte r15, r16, r17 ; or r5, r6, r7 } + { lw r25, r26 ; slte r15, r16, r17 ; sne r5, r6, r7 } + { lw r25, r26 ; slte r5, r6, r7 ; mz r15, r16, r17 } + { lw r25, r26 ; slte r5, r6, r7 ; slti r15, r16, 5 } + { lw r25, r26 ; slte_u r15, r16, r17 ; movei r5, 5 } + { lw r25, r26 ; slte_u r15, r16, r17 ; s1a r5, r6, r7 } + { lw r25, r26 ; slte_u r15, r16, r17 ; tblidxb1 r5, r6 } + { lw r25, r26 ; slte_u r5, r6, r7 ; rl r15, r16, r17 } + { lw r25, r26 ; slte_u r5, r6, r7 ; sub r15, r16, r17 } + { lw r25, r26 ; slti r15, r16, 5 ; mulhlsa_uu r5, r6, r7 } + { lw r25, r26 ; slti r15, r16, 5 ; shl r5, r6, r7 } + { lw r25, r26 ; slti r5, r6, 5 ; add r15, r16, r17 } + { lw r25, r26 ; slti r5, r6, 5 ; seq r15, r16, r17 } + { lw r25, r26 ; slti_u r15, r16, 5 ; and r5, r6, r7 } + { lw r25, r26 ; slti_u r15, r16, 5 ; mvnz r5, r6, r7 } + { lw r25, r26 ; slti_u r15, r16, 5 ; slt_u r5, r6, r7 } + { lw r25, r26 ; slti_u r5, r6, 5 ; ill } + { lw r25, r26 ; slti_u r5, r6, 5 ; shri r15, r16, 5 } + { lw r25, r26 ; sne r15, r16, r17 ; ctz r5, r6 } + { lw r25, r26 ; sne r15, r16, r17 ; or r5, r6, r7 } + { lw r25, r26 ; sne r15, r16, r17 ; sne r5, r6, r7 } + { lw r25, r26 ; sne r5, r6, r7 ; mz r15, r16, r17 } + { lw r25, r26 ; sne r5, r6, r7 ; slti r15, r16, 5 } + { lw r25, r26 ; sra r15, r16, r17 ; movei r5, 5 } + { lw r25, r26 ; sra r15, r16, r17 ; s1a r5, r6, r7 } + { lw r25, r26 ; sra r15, r16, r17 ; tblidxb1 r5, r6 } + { lw r25, r26 ; sra r5, r6, r7 ; rl r15, r16, r17 } + { lw r25, r26 ; sra r5, r6, r7 ; sub r15, r16, r17 } + { lw r25, r26 ; srai r15, r16, 5 ; mulhlsa_uu r5, r6, r7 } + { lw r25, r26 ; srai r15, r16, 5 ; shl r5, r6, r7 } + { lw r25, r26 ; srai r5, r6, 5 ; add r15, r16, r17 } + { lw r25, r26 ; srai r5, r6, 5 ; seq r15, r16, r17 } + { lw r25, r26 ; sub r15, r16, r17 ; and r5, r6, r7 } + { lw r25, r26 ; sub r15, r16, r17 ; mvnz r5, r6, r7 } + { lw r25, r26 ; sub r15, r16, r17 ; slt_u r5, r6, r7 } + { lw r25, r26 ; sub r5, r6, r7 ; ill } + { lw r25, r26 ; sub r5, r6, r7 ; shri r15, r16, 5 } + { lw r25, r26 ; tblidxb0 r5, r6 ; mnz r15, r16, r17 } + { lw r25, r26 ; tblidxb0 r5, r6 ; slt_u r15, r16, r17 } + { lw r25, r26 ; tblidxb1 r5, r6 ; movei r15, 5 } + { lw r25, r26 ; tblidxb1 r5, r6 ; slte_u r15, r16, r17 } + { lw r25, r26 ; tblidxb2 r5, r6 ; nop } + { lw r25, r26 ; tblidxb2 r5, r6 ; slti_u r15, r16, 5 } + { lw r25, r26 ; tblidxb3 r5, r6 ; or r15, r16, r17 } + { lw r25, r26 ; tblidxb3 r5, r6 ; sra r15, r16, r17 } + { lw r25, r26 ; xor r15, r16, r17 ; mulhha_ss r5, r6, r7 } + { lw r25, r26 ; xor r15, r16, r17 ; seq r5, r6, r7 } + { lw r25, r26 ; xor r15, r16, r17 ; xor r5, r6, r7 } + { lw r25, r26 ; xor r5, r6, r7 ; s2a r15, r16, r17 } + { lw_na r15, r16 ; add r5, r6, r7 } + { lw_na r15, r16 ; clz r5, r6 } + { lw_na r15, r16 ; mm r5, r6, r7, 5, 7 } + { lw_na r15, r16 ; mulhla_su r5, r6, r7 } + { lw_na r15, r16 ; packbs_u r5, r6, r7 } + { lw_na r15, r16 ; seqib r5, r6, 5 } + { lw_na r15, r16 ; slteb r5, r6, r7 } + { lw_na r15, r16 ; sraih r5, r6, 5 } + { lwadd r15, r16, 5 ; addih r5, r6, 5 } + { lwadd r15, r16, 5 ; infol 0x1234 } + { lwadd r15, r16, 5 ; movelis r5, 0x1234 } + { lwadd r15, r16, 5 ; mullla_ss r5, r6, r7 } + { lwadd r15, r16, 5 ; s1a r5, r6, r7 } + { lwadd r15, r16, 5 ; shlih r5, r6, 5 } + { lwadd r15, r16, 5 ; slti_u r5, r6, 5 } + { lwadd r15, r16, 5 ; tblidxb0 r5, r6 } + { lwadd_na r15, r16, 5 ; andi r5, r6, 5 } + { lwadd_na r15, r16, 5 ; maxib_u r5, r6, 5 } + { lwadd_na r15, r16, 5 ; mulhhsa_uu r5, r6, r7 } + { lwadd_na r15, r16, 5 ; mzb r5, r6, r7 } + { lwadd_na r15, r16, 5 ; sadh r5, r6, r7 } + { lwadd_na r15, r16, 5 ; slt r5, r6, r7 } + { lwadd_na r15, r16, 5 ; sneh r5, r6, r7 } + { maxb_u r15, r16, r17 ; addb r5, r6, r7 } + { maxb_u r15, r16, r17 ; crc32_32 r5, r6, r7 } + { maxb_u r15, r16, r17 ; mnz r5, r6, r7 } + { maxb_u r15, r16, r17 ; mulhla_us r5, r6, r7 } + { maxb_u r15, r16, r17 ; packhb r5, r6, r7 } + { maxb_u r15, r16, r17 ; seqih r5, r6, 5 } + { maxb_u r15, r16, r17 ; slteb_u r5, r6, r7 } + { maxb_u r15, r16, r17 ; sub r5, r6, r7 } + { maxb_u r5, r6, r7 ; addli r15, r16, 0x1234 } + { maxb_u r5, r6, r7 ; jalr r15 } + { maxb_u r5, r6, r7 ; maxih r15, r16, 5 } + { maxb_u r5, r6, r7 ; nor r15, r16, r17 } + { maxb_u r5, r6, r7 ; seqib r15, r16, 5 } + { maxb_u r5, r6, r7 ; slte r15, r16, r17 } + { maxb_u r5, r6, r7 ; srai r15, r16, 5 } + { maxh r15, r16, r17 ; addi r5, r6, 5 } + { maxh r15, r16, r17 ; fnop } + { maxh r15, r16, r17 ; movei r5, 5 } + { maxh r15, r16, r17 ; mulll_su r5, r6, r7 } + { maxh r15, r16, r17 ; rl r5, r6, r7 } + { maxh r15, r16, r17 ; shli r5, r6, 5 } + { maxh r15, r16, r17 ; slth_u r5, r6, r7 } + { maxh r15, r16, r17 ; subhs r5, r6, r7 } + { maxh r5, r6, r7 ; andi r15, r16, 5 } + { maxh r5, r6, r7 ; lb r15, r16 } + { maxh r5, r6, r7 ; minh r15, r16, r17 } + { maxh r5, r6, r7 ; packhb r15, r16, r17 } + { maxh r5, r6, r7 ; shl r15, r16, r17 } + { maxh r5, r6, r7 ; slteh r15, r16, r17 } + { maxh r5, r6, r7 ; subb r15, r16, r17 } + { maxib_u r15, r16, 5 ; addlis r5, r6, 0x1234 } + { maxib_u r15, r16, 5 ; inthh r5, r6, r7 } + { maxib_u r15, r16, 5 ; mulhh_su r5, r6, r7 } + { maxib_u r15, r16, 5 ; mullla_uu r5, r6, r7 } + { maxib_u r15, r16, 5 ; s3a r5, r6, r7 } + { maxib_u r15, r16, 5 ; shrb r5, r6, r7 } + { maxib_u r15, r16, 5 ; sltib_u r5, r6, 5 } + { maxib_u r15, r16, 5 ; tblidxb2 r5, r6 } + { maxib_u r5, r6, 5 ; flush r15 } + { maxib_u r5, r6, 5 ; lh r15, r16 } + { maxib_u r5, r6, 5 ; mnz r15, r16, r17 } + { maxib_u r5, r6, 5 ; raise } + { maxib_u r5, r6, 5 ; shlib r15, r16, 5 } + { maxib_u r5, r6, 5 ; slti r15, r16, 5 } + { maxib_u r5, r6, 5 ; subs r15, r16, r17 } + { maxih r15, r16, 5 ; and r5, r6, r7 } + { maxih r15, r16, 5 ; maxh r5, r6, r7 } + { maxih r15, r16, 5 ; mulhha_uu r5, r6, r7 } + { maxih r15, r16, 5 ; mz r5, r6, r7 } + { maxih r15, r16, 5 ; sadb_u r5, r6, r7 } + { maxih r15, r16, 5 ; shrih r5, r6, 5 } + { maxih r15, r16, 5 ; sneb r5, r6, r7 } + { maxih r5, r6, 5 ; add r15, r16, r17 } + { maxih r5, r6, 5 ; info 19 } + { maxih r5, r6, 5 ; lnk r15 } + { maxih r5, r6, 5 ; movei r15, 5 } + { maxih r5, r6, 5 ; s2a r15, r16, r17 } + { maxih r5, r6, 5 ; shrh r15, r16, r17 } + { maxih r5, r6, 5 ; sltih r15, r16, 5 } + { maxih r5, r6, 5 ; wh64 r15 } + { mf ; avgh r5, r6, r7 } + { mf ; minh r5, r6, r7 } + { mf ; mulhl_us r5, r6, r7 } + { mf ; nor r5, r6, r7 } + { mf ; seqb r5, r6, r7 } + { mf ; sltb_u r5, r6, r7 } + { mf ; srah r5, r6, r7 } + { mfspr r16, 0x5 ; addhs r5, r6, r7 } + { mfspr r16, 0x5 ; dword_align r5, r6, r7 } + { mfspr r16, 0x5 ; move r5, r6 } + { mfspr r16, 0x5 ; mulll_ss r5, r6, r7 } + { mfspr r16, 0x5 ; pcnt r5, r6 } + { mfspr r16, 0x5 ; shlh r5, r6, r7 } + { mfspr r16, 0x5 ; slth r5, r6, r7 } + { mfspr r16, 0x5 ; subh r5, r6, r7 } + { minb_u r15, r16, r17 ; adiffb_u r5, r6, r7 } + { minb_u r15, r16, r17 ; intlh r5, r6, r7 } + { minb_u r15, r16, r17 ; mulhha_ss r5, r6, r7 } + { minb_u r15, r16, r17 ; mvnz r5, r6, r7 } + { minb_u r15, r16, r17 ; sadah r5, r6, r7 } + { minb_u r15, r16, r17 ; shri r5, r6, 5 } + { minb_u r15, r16, r17 ; sltih_u r5, r6, 5 } + { minb_u r15, r16, r17 ; xor r5, r6, r7 } + { minb_u r5, r6, r7 ; icoh r15 } + { minb_u r5, r6, r7 ; lhadd r15, r16, 5 } + { minb_u r5, r6, r7 ; mnzh r15, r16, r17 } + { minb_u r5, r6, r7 ; rli r15, r16, 5 } + { minb_u r5, r6, r7 ; shr r15, r16, r17 } + { minb_u r5, r6, r7 ; sltib r15, r16, 5 } + { minb_u r5, r6, r7 ; swadd r15, r16, 5 } + { minh r15, r16, r17 ; auli r5, r6, 0x1234 } + { minh r15, r16, r17 ; maxih r5, r6, 5 } + { minh r15, r16, r17 ; mulhl_ss r5, r6, r7 } + { minh r15, r16, r17 ; mzh r5, r6, r7 } + { minh r15, r16, r17 ; sadh_u r5, r6, r7 } + { minh r15, r16, r17 ; slt_u r5, r6, r7 } + { minh r15, r16, r17 ; sra r5, r6, r7 } + { minh r5, r6, r7 ; addbs_u r15, r16, r17 } + { minh r5, r6, r7 ; inthb r15, r16, r17 } + { minh r5, r6, r7 ; lw_na r15, r16 } + { minh r5, r6, r7 ; movelis r15, 0x1234 } + { minh r5, r6, r7 ; sb r15, r16 } + { minh r5, r6, r7 ; shrib r15, r16, 5 } + { minh r5, r6, r7 ; sne r15, r16, r17 } + { minh r5, r6, r7 ; xori r15, r16, 5 } + { minib_u r15, r16, 5 ; bytex r5, r6 } + { minib_u r15, r16, 5 ; minih r5, r6, 5 } + { minib_u r15, r16, 5 ; mulhla_ss r5, r6, r7 } + { minib_u r15, r16, 5 ; ori r5, r6, 5 } + { minib_u r15, r16, 5 ; seqi r5, r6, 5 } + { minib_u r15, r16, 5 ; slte_u r5, r6, r7 } + { minib_u r15, r16, 5 ; sraib r5, r6, 5 } + { minib_u r5, r6, 5 ; addib r15, r16, 5 } + { minib_u r5, r6, 5 ; inv r15 } + { minib_u r5, r6, 5 ; maxh r15, r16, r17 } + { minib_u r5, r6, 5 ; mzh r15, r16, r17 } + { minib_u r5, r6, 5 ; seqh r15, r16, r17 } + { minib_u r5, r6, 5 ; sltb r15, r16, r17 } + { minib_u r5, r6, 5 ; srab r15, r16, r17 } + { minih r15, r16, 5 ; addh r5, r6, r7 } + { minih r15, r16, 5 ; ctz r5, r6 } + { minih r15, r16, 5 ; mnzh r5, r6, r7 } + { minih r15, r16, 5 ; mulhlsa_uu r5, r6, r7 } + { minih r15, r16, 5 ; packlb r5, r6, r7 } + { minih r15, r16, 5 ; shlb r5, r6, r7 } + { minih r15, r16, 5 ; slteh_u r5, r6, r7 } + { minih r15, r16, 5 ; subbs_u r5, r6, r7 } + { minih r5, r6, 5 ; adds r15, r16, r17 } + { minih r5, r6, 5 ; jr r15 } + { minih r5, r6, 5 ; mfspr r16, 0x5 } + { minih r5, r6, 5 ; ori r15, r16, 5 } + { minih r5, r6, 5 ; sh r15, r16 } + { minih r5, r6, 5 ; slteb r15, r16, r17 } + { minih r5, r6, 5 ; sraih r15, r16, 5 } + { mm r15, r16, r17, 5, 7 ; addih r5, r6, 5 } + { mm r15, r16, r17, 5, 7 ; infol 0x1234 } + { mm r15, r16, r17, 5, 7 ; movelis r5, 0x1234 } + { mm r15, r16, r17, 5, 7 ; mullla_ss r5, r6, r7 } + { mm r15, r16, r17, 5, 7 ; s1a r5, r6, r7 } + { mm r15, r16, r17, 5, 7 ; shlih r5, r6, 5 } + { mm r15, r16, r17, 5, 7 ; slti_u r5, r6, 5 } + { mm r15, r16, r17, 5, 7 ; tblidxb0 r5, r6 } + { mm r5, r6, r7, 5, 7 ; dtlbpr r15 } + { mm r5, r6, r7, 5, 7 ; lbadd r15, r16, 5 } + { mm r5, r6, r7, 5, 7 ; minih r15, r16, 5 } + { mm r5, r6, r7, 5, 7 ; packlb r15, r16, r17 } + { mm r5, r6, r7, 5, 7 ; shlh r15, r16, r17 } + { mm r5, r6, r7, 5, 7 ; slth r15, r16, r17 } + { mm r5, r6, r7, 5, 7 ; subh r15, r16, r17 } + { mnz r15, r16, r17 ; addbs_u r5, r6, r7 } + { mnz r15, r16, r17 ; and r5, r6, r7 ; lb r25, r26 } + { mnz r15, r16, r17 ; auli r5, r6, 0x1234 } + { mnz r15, r16, r17 ; bytex r5, r6 ; sh r25, r26 } + { mnz r15, r16, r17 ; ctz r5, r6 ; prefetch r25 } + { mnz r15, r16, r17 ; info 19 ; lw r25, r26 } + { mnz r15, r16, r17 ; lb r25, r26 ; info 19 } + { mnz r15, r16, r17 ; lb r25, r26 ; pcnt r5, r6 } + { mnz r15, r16, r17 ; lb r25, r26 ; srai r5, r6, 5 } + { mnz r15, r16, r17 ; lb_u r25, r26 ; movei r5, 5 } + { mnz r15, r16, r17 ; lb_u r25, r26 ; s1a r5, r6, r7 } + { mnz r15, r16, r17 ; lb_u r25, r26 ; tblidxb1 r5, r6 } + { mnz r15, r16, r17 ; lh r25, r26 ; mulhha_ss r5, r6, r7 } + { mnz r15, r16, r17 ; lh r25, r26 ; seq r5, r6, r7 } + { mnz r15, r16, r17 ; lh r25, r26 ; xor r5, r6, r7 } + { mnz r15, r16, r17 ; lh_u r25, r26 ; mulll_ss r5, r6, r7 } + { mnz r15, r16, r17 ; lh_u r25, r26 ; shli r5, r6, 5 } + { mnz r15, r16, r17 ; lw r25, r26 ; addi r5, r6, 5 } + { mnz r15, r16, r17 ; lw r25, r26 ; mullla_uu r5, r6, r7 } + { mnz r15, r16, r17 ; lw r25, r26 ; slt r5, r6, r7 } + { mnz r15, r16, r17 ; minb_u r5, r6, r7 } + { mnz r15, r16, r17 ; move r5, r6 ; lh_u r25, r26 } + { mnz r15, r16, r17 ; mulhh_ss r5, r6, r7 ; lb_u r25, r26 } + { mnz r15, r16, r17 ; mulhha_ss r5, r6, r7 ; lb r25, r26 } + { mnz r15, r16, r17 ; mulhha_uu r5, r6, r7 } + { mnz r15, r16, r17 ; mulll_ss r5, r6, r7 ; lb r25, r26 } + { mnz r15, r16, r17 ; mulll_uu r5, r6, r7 } + { mnz r15, r16, r17 ; mullla_uu r5, r6, r7 ; sw r25, r26 } + { mnz r15, r16, r17 ; mvz r5, r6, r7 ; sh r25, r26 } + { mnz r15, r16, r17 ; nop ; prefetch r25 } + { mnz r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 } + { mnz r15, r16, r17 ; pcnt r5, r6 ; lb_u r25, r26 } + { mnz r15, r16, r17 ; prefetch r25 ; move r5, r6 } + { mnz r15, r16, r17 ; prefetch r25 ; rli r5, r6, 5 } + { mnz r15, r16, r17 ; prefetch r25 ; tblidxb0 r5, r6 } + { mnz r15, r16, r17 ; rli r5, r6, 5 ; lw r25, r26 } + { mnz r15, r16, r17 ; s2a r5, r6, r7 ; lw r25, r26 } + { mnz r15, r16, r17 ; sadh r5, r6, r7 } + { mnz r15, r16, r17 ; sb r25, r26 ; mulll_ss r5, r6, r7 } + { mnz r15, r16, r17 ; sb r25, r26 ; shli r5, r6, 5 } + { mnz r15, r16, r17 ; seq r5, r6, r7 ; lb_u r25, r26 } + { mnz r15, r16, r17 ; seqi r5, r6, 5 } + { mnz r15, r16, r17 ; sh r25, r26 ; mulhlsa_uu r5, r6, r7 } + { mnz r15, r16, r17 ; sh r25, r26 ; shl r5, r6, r7 } + { mnz r15, r16, r17 ; shl r5, r6, r7 ; lb r25, r26 } + { mnz r15, r16, r17 ; shli r5, r6, 5 ; sw r25, r26 } + { mnz r15, r16, r17 ; shri r5, r6, 5 ; lw r25, r26 } + { mnz r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 } + { mnz r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 } + { mnz r15, r16, r17 ; slti r5, r6, 5 ; lw r25, r26 } + { mnz r15, r16, r17 ; sne r5, r6, r7 ; lb r25, r26 } + { mnz r15, r16, r17 ; sra r5, r6, r7 ; sw r25, r26 } + { mnz r15, r16, r17 ; sub r5, r6, r7 ; lw r25, r26 } + { mnz r15, r16, r17 ; sw r25, r26 ; info 19 } + { mnz r15, r16, r17 ; sw r25, r26 ; pcnt r5, r6 } + { mnz r15, r16, r17 ; sw r25, r26 ; srai r5, r6, 5 } + { mnz r15, r16, r17 ; tblidxb1 r5, r6 ; lh r25, r26 } + { mnz r15, r16, r17 ; tblidxb3 r5, r6 ; lh r25, r26 } + { mnz r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 } + { mnz r5, r6, r7 ; addi r15, r16, 5 ; sh r25, r26 } + { mnz r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 } + { mnz r5, r6, r7 ; fnop ; sw r25, r26 } + { mnz r5, r6, r7 ; info 19 ; sh r25, r26 } + { mnz r5, r6, r7 ; lb r25, r26 ; ill } + { mnz r5, r6, r7 ; lb r25, r26 ; shri r15, r16, 5 } + { mnz r5, r6, r7 ; lb_u r25, r26 ; info 19 } + { mnz r5, r6, r7 ; lb_u r25, r26 ; slt r15, r16, r17 } + { mnz r5, r6, r7 ; lh r25, r26 ; ill } + { mnz r5, r6, r7 ; lh r25, r26 ; shri r15, r16, 5 } + { mnz r5, r6, r7 ; lh_u r25, r26 ; info 19 } + { mnz r5, r6, r7 ; lh_u r25, r26 ; slt r15, r16, r17 } + { mnz r5, r6, r7 ; lw r25, r26 ; fnop } + { mnz r5, r6, r7 ; lw r25, r26 ; shr r15, r16, r17 } + { mnz r5, r6, r7 ; maxih r15, r16, 5 } + { mnz r5, r6, r7 ; move r15, r16 ; lb r25, r26 } + { mnz r5, r6, r7 ; moveli r15, 0x1234 } + { mnz r5, r6, r7 ; nop ; prefetch r25 } + { mnz r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } + { mnz r5, r6, r7 ; prefetch r25 ; add r15, r16, r17 } + { mnz r5, r6, r7 ; prefetch r25 ; seq r15, r16, r17 } + { mnz r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 } + { mnz r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 } + { mnz r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 } + { mnz r5, r6, r7 ; sb r25, r26 ; mz r15, r16, r17 } + { mnz r5, r6, r7 ; sb r25, r26 ; slti r15, r16, 5 } + { mnz r5, r6, r7 ; seqh r15, r16, r17 } + { mnz r5, r6, r7 ; sh r25, r26 ; info 19 } + { mnz r5, r6, r7 ; sh r25, r26 ; slt r15, r16, r17 } + { mnz r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 } + { mnz r5, r6, r7 ; shr r15, r16, r17 ; lh_u r25, r26 } + { mnz r5, r6, r7 ; shrih r15, r16, 5 } + { mnz r5, r6, r7 ; slt_u r15, r16, r17 } + { mnz r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 } + { mnz r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 } + { mnz r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 } + { mnz r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 } + { mnz r5, r6, r7 ; subbs_u r15, r16, r17 } + { mnz r5, r6, r7 ; sw r25, r26 ; rl r15, r16, r17 } + { mnz r5, r6, r7 ; sw r25, r26 ; sub r15, r16, r17 } + { mnzb r15, r16, r17 ; addh r5, r6, r7 } + { mnzb r15, r16, r17 ; ctz r5, r6 } + { mnzb r15, r16, r17 ; mnzh r5, r6, r7 } + { mnzb r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { mnzb r15, r16, r17 ; packlb r5, r6, r7 } + { mnzb r15, r16, r17 ; shlb r5, r6, r7 } + { mnzb r15, r16, r17 ; slteh_u r5, r6, r7 } + { mnzb r15, r16, r17 ; subbs_u r5, r6, r7 } + { mnzb r5, r6, r7 ; adds r15, r16, r17 } + { mnzb r5, r6, r7 ; jr r15 } + { mnzb r5, r6, r7 ; mfspr r16, 0x5 } + { mnzb r5, r6, r7 ; ori r15, r16, 5 } + { mnzb r5, r6, r7 ; sh r15, r16 } + { mnzb r5, r6, r7 ; slteb r15, r16, r17 } + { mnzb r5, r6, r7 ; sraih r15, r16, 5 } + { mnzh r15, r16, r17 ; addih r5, r6, 5 } + { mnzh r15, r16, r17 ; infol 0x1234 } + { mnzh r15, r16, r17 ; movelis r5, 0x1234 } + { mnzh r15, r16, r17 ; mullla_ss r5, r6, r7 } + { mnzh r15, r16, r17 ; s1a r5, r6, r7 } + { mnzh r15, r16, r17 ; shlih r5, r6, 5 } + { mnzh r15, r16, r17 ; slti_u r5, r6, 5 } + { mnzh r15, r16, r17 ; tblidxb0 r5, r6 } + { mnzh r5, r6, r7 ; dtlbpr r15 } + { mnzh r5, r6, r7 ; lbadd r15, r16, 5 } + { mnzh r5, r6, r7 ; minih r15, r16, 5 } + { mnzh r5, r6, r7 ; packlb r15, r16, r17 } + { mnzh r5, r6, r7 ; shlh r15, r16, r17 } + { mnzh r5, r6, r7 ; slth r15, r16, r17 } + { mnzh r5, r6, r7 ; subh r15, r16, r17 } + { move r15, r16 ; addbs_u r5, r6, r7 } + { move r15, r16 ; and r5, r6, r7 ; lb r25, r26 } + { move r15, r16 ; auli r5, r6, 0x1234 } + { move r15, r16 ; bytex r5, r6 ; sh r25, r26 } + { move r15, r16 ; ctz r5, r6 ; prefetch r25 } + { move r15, r16 ; info 19 ; lw r25, r26 } + { move r15, r16 ; lb r25, r26 ; info 19 } + { move r15, r16 ; lb r25, r26 ; pcnt r5, r6 } + { move r15, r16 ; lb r25, r26 ; srai r5, r6, 5 } + { move r15, r16 ; lb_u r25, r26 ; movei r5, 5 } + { move r15, r16 ; lb_u r25, r26 ; s1a r5, r6, r7 } + { move r15, r16 ; lb_u r25, r26 ; tblidxb1 r5, r6 } + { move r15, r16 ; lh r25, r26 ; mulhha_ss r5, r6, r7 } + { move r15, r16 ; lh r25, r26 ; seq r5, r6, r7 } + { move r15, r16 ; lh r25, r26 ; xor r5, r6, r7 } + { move r15, r16 ; lh_u r25, r26 ; mulll_ss r5, r6, r7 } + { move r15, r16 ; lh_u r25, r26 ; shli r5, r6, 5 } + { move r15, r16 ; lw r25, r26 ; addi r5, r6, 5 } + { move r15, r16 ; lw r25, r26 ; mullla_uu r5, r6, r7 } + { move r15, r16 ; lw r25, r26 ; slt r5, r6, r7 } + { move r15, r16 ; minb_u r5, r6, r7 } + { move r15, r16 ; move r5, r6 ; lh_u r25, r26 } + { move r15, r16 ; mulhh_ss r5, r6, r7 ; lb_u r25, r26 } + { move r15, r16 ; mulhha_ss r5, r6, r7 ; lb r25, r26 } + { move r15, r16 ; mulhha_uu r5, r6, r7 } + { move r15, r16 ; mulll_ss r5, r6, r7 ; lb r25, r26 } + { move r15, r16 ; mulll_uu r5, r6, r7 } + { move r15, r16 ; mullla_uu r5, r6, r7 ; sw r25, r26 } + { move r15, r16 ; mvz r5, r6, r7 ; sh r25, r26 } + { move r15, r16 ; nop ; prefetch r25 } + { move r15, r16 ; or r5, r6, r7 ; prefetch r25 } + { move r15, r16 ; pcnt r5, r6 ; lb_u r25, r26 } + { move r15, r16 ; prefetch r25 ; move r5, r6 } + { move r15, r16 ; prefetch r25 ; rli r5, r6, 5 } + { move r15, r16 ; prefetch r25 ; tblidxb0 r5, r6 } + { move r15, r16 ; rli r5, r6, 5 ; lw r25, r26 } + { move r15, r16 ; s2a r5, r6, r7 ; lw r25, r26 } + { move r15, r16 ; sadh r5, r6, r7 } + { move r15, r16 ; sb r25, r26 ; mulll_ss r5, r6, r7 } + { move r15, r16 ; sb r25, r26 ; shli r5, r6, 5 } + { move r15, r16 ; seq r5, r6, r7 ; lb_u r25, r26 } + { move r15, r16 ; seqi r5, r6, 5 } + { move r15, r16 ; sh r25, r26 ; mulhlsa_uu r5, r6, r7 } + { move r15, r16 ; sh r25, r26 ; shl r5, r6, r7 } + { move r15, r16 ; shl r5, r6, r7 ; lb r25, r26 } + { move r15, r16 ; shli r5, r6, 5 ; sw r25, r26 } + { move r15, r16 ; shri r5, r6, 5 ; lw r25, r26 } + { move r15, r16 ; slt_u r5, r6, r7 ; lh r25, r26 } + { move r15, r16 ; slte_u r5, r6, r7 ; lb r25, r26 } + { move r15, r16 ; slti r5, r6, 5 ; lw r25, r26 } + { move r15, r16 ; sne r5, r6, r7 ; lb r25, r26 } + { move r15, r16 ; sra r5, r6, r7 ; sw r25, r26 } + { move r15, r16 ; sub r5, r6, r7 ; lw r25, r26 } + { move r15, r16 ; sw r25, r26 ; info 19 } + { move r15, r16 ; sw r25, r26 ; pcnt r5, r6 } + { move r15, r16 ; sw r25, r26 ; srai r5, r6, 5 } + { move r15, r16 ; tblidxb1 r5, r6 ; lh r25, r26 } + { move r15, r16 ; tblidxb3 r5, r6 ; lh r25, r26 } + { move r5, r6 ; add r15, r16, r17 ; lb_u r25, r26 } + { move r5, r6 ; addi r15, r16, 5 ; sh r25, r26 } + { move r5, r6 ; andi r15, r16, 5 ; lh r25, r26 } + { move r5, r6 ; fnop ; sw r25, r26 } + { move r5, r6 ; info 19 ; sh r25, r26 } + { move r5, r6 ; lb r25, r26 ; ill } + { move r5, r6 ; lb r25, r26 ; shri r15, r16, 5 } + { move r5, r6 ; lb_u r25, r26 ; info 19 } + { move r5, r6 ; lb_u r25, r26 ; slt r15, r16, r17 } + { move r5, r6 ; lh r25, r26 ; ill } + { move r5, r6 ; lh r25, r26 ; shri r15, r16, 5 } + { move r5, r6 ; lh_u r25, r26 ; info 19 } + { move r5, r6 ; lh_u r25, r26 ; slt r15, r16, r17 } + { move r5, r6 ; lw r25, r26 ; fnop } + { move r5, r6 ; lw r25, r26 ; shr r15, r16, r17 } + { move r5, r6 ; maxih r15, r16, 5 } + { move r5, r6 ; move r15, r16 ; lb r25, r26 } + { move r5, r6 ; moveli r15, 0x1234 } + { move r5, r6 ; nop ; prefetch r25 } + { move r5, r6 ; or r15, r16, r17 ; prefetch r25 } + { move r5, r6 ; prefetch r25 ; add r15, r16, r17 } + { move r5, r6 ; prefetch r25 ; seq r15, r16, r17 } + { move r5, r6 ; rl r15, r16, r17 ; lb_u r25, r26 } + { move r5, r6 ; s1a r15, r16, r17 ; lb_u r25, r26 } + { move r5, r6 ; s3a r15, r16, r17 ; lb_u r25, r26 } + { move r5, r6 ; sb r25, r26 ; mz r15, r16, r17 } + { move r5, r6 ; sb r25, r26 ; slti r15, r16, 5 } + { move r5, r6 ; seqh r15, r16, r17 } + { move r5, r6 ; sh r25, r26 ; info 19 } + { move r5, r6 ; sh r25, r26 ; slt r15, r16, r17 } + { move r5, r6 ; shl r15, r16, r17 ; sh r25, r26 } + { move r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 } + { move r5, r6 ; shrih r15, r16, 5 } + { move r5, r6 ; slt_u r15, r16, r17 } + { move r5, r6 ; slte_u r15, r16, r17 ; sh r25, r26 } + { move r5, r6 ; slti_u r15, r16, 5 ; lb_u r25, r26 } + { move r5, r6 ; sne r15, r16, r17 ; sh r25, r26 } + { move r5, r6 ; srai r15, r16, 5 ; lh_u r25, r26 } + { move r5, r6 ; subbs_u r15, r16, r17 } + { move r5, r6 ; sw r25, r26 ; rl r15, r16, r17 } + { move r5, r6 ; sw r25, r26 ; sub r15, r16, r17 } + { movei r15, 5 ; add r5, r6, r7 ; lh_u r25, r26 } + { movei r15, 5 ; addi r5, r6, 5 } + { movei r15, 5 ; andi r5, r6, 5 ; lh r25, r26 } + { movei r15, 5 ; bitx r5, r6 } + { movei r15, 5 ; clz r5, r6 } + { movei r15, 5 ; fnop ; sb r25, r26 } + { movei r15, 5 ; lb r25, r26 ; addi r5, r6, 5 } + { movei r15, 5 ; lb r25, r26 ; mullla_uu r5, r6, r7 } + { movei r15, 5 ; lb r25, r26 ; slt r5, r6, r7 } + { movei r15, 5 ; lb_u r25, r26 ; bitx r5, r6 } + { movei r15, 5 ; lb_u r25, r26 ; mz r5, r6, r7 } + { movei r15, 5 ; lb_u r25, r26 ; slte_u r5, r6, r7 } + { movei r15, 5 ; lh r25, r26 ; ctz r5, r6 } + { movei r15, 5 ; lh r25, r26 ; or r5, r6, r7 } + { movei r15, 5 ; lh r25, r26 ; sne r5, r6, r7 } + { movei r15, 5 ; lh_u r25, r26 ; mnz r5, r6, r7 } + { movei r15, 5 ; lh_u r25, r26 ; rl r5, r6, r7 } + { movei r15, 5 ; lh_u r25, r26 ; sub r5, r6, r7 } + { movei r15, 5 ; lw r25, r26 ; mulhh_ss r5, r6, r7 } + { movei r15, 5 ; lw r25, r26 ; s2a r5, r6, r7 } + { movei r15, 5 ; lw r25, r26 ; tblidxb2 r5, r6 } + { movei r15, 5 ; mnz r5, r6, r7 ; sh r25, r26 } + { movei r15, 5 ; movei r5, 5 ; prefetch r25 } + { movei r15, 5 ; mulhh_uu r5, r6, r7 ; lh r25, r26 } + { movei r15, 5 ; mulhha_uu r5, r6, r7 ; lb_u r25, r26 } + { movei r15, 5 ; mulhlsa_uu r5, r6, r7 ; lh r25, r26 } + { movei r15, 5 ; mulll_uu r5, r6, r7 ; lb_u r25, r26 } + { movei r15, 5 ; mullla_uu r5, r6, r7 ; lb r25, r26 } + { movei r15, 5 ; mvnz r5, r6, r7 } + { movei r15, 5 ; mz r5, r6, r7 } + { movei r15, 5 ; nor r5, r6, r7 ; sh r25, r26 } + { movei r15, 5 ; ori r5, r6, 5 ; sh r25, r26 } + { movei r15, 5 ; prefetch r25 ; andi r5, r6, 5 } + { movei r15, 5 ; prefetch r25 ; mvz r5, r6, r7 } + { movei r15, 5 ; prefetch r25 ; slte r5, r6, r7 } + { movei r15, 5 ; rl r5, r6, r7 ; sb r25, r26 } + { movei r15, 5 ; s1a r5, r6, r7 ; sb r25, r26 } + { movei r15, 5 ; s3a r5, r6, r7 ; sb r25, r26 } + { movei r15, 5 ; sb r25, r26 ; mnz r5, r6, r7 } + { movei r15, 5 ; sb r25, r26 ; rl r5, r6, r7 } + { movei r15, 5 ; sb r25, r26 ; sub r5, r6, r7 } + { movei r15, 5 ; seqi r5, r6, 5 ; lb_u r25, r26 } + { movei r15, 5 ; sh r25, r26 ; info 19 } + { movei r15, 5 ; sh r25, r26 ; pcnt r5, r6 } + { movei r15, 5 ; sh r25, r26 ; srai r5, r6, 5 } + { movei r15, 5 ; shli r5, r6, 5 ; lb r25, r26 } + { movei r15, 5 ; shr r5, r6, r7 ; sw r25, r26 } + { movei r15, 5 ; slt r5, r6, r7 ; lw r25, r26 } + { movei r15, 5 ; slte r5, r6, r7 ; lh r25, r26 } + { movei r15, 5 ; slteh r5, r6, r7 } + { movei r15, 5 ; slti_u r5, r6, 5 ; sb r25, r26 } + { movei r15, 5 ; sra r5, r6, r7 ; lb r25, r26 } + { movei r15, 5 ; srai r5, r6, 5 ; sw r25, r26 } + { movei r15, 5 ; sw r25, r26 ; addi r5, r6, 5 } + { movei r15, 5 ; sw r25, r26 ; mullla_uu r5, r6, r7 } + { movei r15, 5 ; sw r25, r26 ; slt r5, r6, r7 } + { movei r15, 5 ; tblidxb0 r5, r6 ; lw r25, r26 } + { movei r15, 5 ; tblidxb2 r5, r6 ; lw r25, r26 } + { movei r15, 5 ; xor r5, r6, r7 ; lw r25, r26 } + { movei r5, 5 ; addhs r15, r16, r17 } + { movei r5, 5 ; and r15, r16, r17 ; lw r25, r26 } + { movei r5, 5 ; fnop ; lb r25, r26 } + { movei r5, 5 ; ill } + { movei r5, 5 ; jr r15 } + { movei r5, 5 ; lb r25, r26 ; s1a r15, r16, r17 } + { movei r5, 5 ; lb r25, r26 } + { movei r5, 5 ; lb_u r25, r26 ; s2a r15, r16, r17 } + { movei r5, 5 ; lbadd r15, r16, 5 } + { movei r5, 5 ; lh r25, r26 ; s1a r15, r16, r17 } + { movei r5, 5 ; lh r25, r26 } + { movei r5, 5 ; lh_u r25, r26 ; s2a r15, r16, r17 } + { movei r5, 5 ; lhadd r15, r16, 5 } + { movei r5, 5 ; lw r25, r26 ; rli r15, r16, 5 } + { movei r5, 5 ; lw r25, r26 ; xor r15, r16, r17 } + { movei r5, 5 ; mnz r15, r16, r17 ; lw r25, r26 } + { movei r5, 5 ; movei r15, 5 ; lh r25, r26 } + { movei r5, 5 ; mz r15, r16, r17 } + { movei r5, 5 ; nor r15, r16, r17 ; sh r25, r26 } + { movei r5, 5 ; ori r15, r16, 5 ; sh r25, r26 } + { movei r5, 5 ; prefetch r25 ; nor r15, r16, r17 } + { movei r5, 5 ; prefetch r25 ; sne r15, r16, r17 } + { movei r5, 5 ; rli r15, r16, 5 ; lh_u r25, r26 } + { movei r5, 5 ; s2a r15, r16, r17 ; lh_u r25, r26 } + { movei r5, 5 ; sb r25, r26 ; and r15, r16, r17 } + { movei r5, 5 ; sb r25, r26 ; shl r15, r16, r17 } + { movei r5, 5 ; seq r15, r16, r17 ; lh_u r25, r26 } + { movei r5, 5 ; seqih r15, r16, 5 } + { movei r5, 5 ; sh r25, r26 ; s2a r15, r16, r17 } + { movei r5, 5 ; shadd r15, r16, 5 } + { movei r5, 5 ; shli r15, r16, 5 ; sh r25, r26 } + { movei r5, 5 ; shri r15, r16, 5 ; lh_u r25, r26 } + { movei r5, 5 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + { movei r5, 5 ; slte r15, r16, r17 } + { movei r5, 5 ; slti r15, r16, 5 ; lh_u r25, r26 } + { movei r5, 5 ; sltih_u r15, r16, 5 } + { movei r5, 5 ; sra r15, r16, r17 ; sh r25, r26 } + { movei r5, 5 ; sub r15, r16, r17 ; lh_u r25, r26 } + { movei r5, 5 ; sw r25, r26 ; mnz r15, r16, r17 } + { movei r5, 5 ; sw r25, r26 ; slt_u r15, r16, r17 } + { movei r5, 5 ; xor r15, r16, r17 ; sb r25, r26 } + { moveli r15, 0x1234 ; auli r5, r6, 0x1234 } + { moveli r15, 0x1234 ; maxih r5, r6, 5 } + { moveli r15, 0x1234 ; mulhl_ss r5, r6, r7 } + { moveli r15, 0x1234 ; mzh r5, r6, r7 } + { moveli r15, 0x1234 ; sadh_u r5, r6, r7 } + { moveli r15, 0x1234 ; slt_u r5, r6, r7 } + { moveli r15, 0x1234 ; sra r5, r6, r7 } + { moveli r5, 0x1234 ; addbs_u r15, r16, r17 } + { moveli r5, 0x1234 ; inthb r15, r16, r17 } + { moveli r5, 0x1234 ; lw_na r15, r16 } + { moveli r5, 0x1234 ; movelis r15, 0x1234 } + { moveli r5, 0x1234 ; sb r15, r16 } + { moveli r5, 0x1234 ; shrib r15, r16, 5 } + { moveli r5, 0x1234 ; sne r15, r16, r17 } + { moveli r5, 0x1234 ; xori r15, r16, 5 } + { movelis r15, 0x1234 ; clz r5, r6 } + { movelis r15, 0x1234 ; mm r5, r6, r7, 5, 7 } + { movelis r15, 0x1234 ; mulhla_us r5, r6, r7 } + { movelis r15, 0x1234 ; packhb r5, r6, r7 } + { movelis r15, 0x1234 ; seqih r5, r6, 5 } + { movelis r15, 0x1234 ; slteb_u r5, r6, r7 } + { movelis r15, 0x1234 ; sub r5, r6, r7 } + { movelis r5, 0x1234 ; addli r15, r16, 0x1234 } + { movelis r5, 0x1234 ; jalrp r15 } + { movelis r5, 0x1234 ; mf } + { movelis r5, 0x1234 ; ori r15, r16, 5 } + { movelis r5, 0x1234 ; sh r15, r16 } + { movelis r5, 0x1234 ; slteb r15, r16, r17 } + { movelis r5, 0x1234 ; sraih r15, r16, 5 } + { mtspr 0x5, r16 ; addih r5, r6, 5 } + { mtspr 0x5, r16 ; infol 0x1234 } + { mtspr 0x5, r16 ; movelis r5, 0x1234 } + { mtspr 0x5, r16 ; mullla_ss r5, r6, r7 } + { mtspr 0x5, r16 ; s1a r5, r6, r7 } + { mtspr 0x5, r16 ; shlih r5, r6, 5 } + { mtspr 0x5, r16 ; slti_u r5, r6, 5 } + { mtspr 0x5, r16 ; tblidxb0 r5, r6 } + { mulhh_ss r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 } + { mulhh_ss r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + { mulhh_ss r5, r6, r7 ; fnop ; lb_u r25, r26 } + { mulhh_ss r5, r6, r7 ; info 19 ; lb r25, r26 } + { mulhh_ss r5, r6, r7 ; jrp r15 } + { mulhh_ss r5, r6, r7 ; lb r25, r26 ; s2a r15, r16, r17 } + { mulhh_ss r5, r6, r7 ; lb_u r15, r16 } + { mulhh_ss r5, r6, r7 ; lb_u r25, r26 ; s3a r15, r16, r17 } + { mulhh_ss r5, r6, r7 ; lbadd_u r15, r16, 5 } + { mulhh_ss r5, r6, r7 ; lh r25, r26 ; s2a r15, r16, r17 } + { mulhh_ss r5, r6, r7 ; lh_u r15, r16 } + { mulhh_ss r5, r6, r7 ; lh_u r25, r26 ; s3a r15, r16, r17 } + { mulhh_ss r5, r6, r7 ; lhadd_u r15, r16, 5 } + { mulhh_ss r5, r6, r7 ; lw r25, r26 ; s1a r15, r16, r17 } + { mulhh_ss r5, r6, r7 ; lw r25, r26 } + { mulhh_ss r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + { mulhh_ss r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 } + { mulhh_ss r5, r6, r7 ; mzb r15, r16, r17 } + { mulhh_ss r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + { mulhh_ss r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 } + { mulhh_ss r5, r6, r7 ; prefetch r25 ; or r15, r16, r17 } + { mulhh_ss r5, r6, r7 ; prefetch r25 ; sra r15, r16, r17 } + { mulhh_ss r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 } + { mulhh_ss r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + { mulhh_ss r5, r6, r7 ; sb r25, r26 ; andi r15, r16, 5 } + { mulhh_ss r5, r6, r7 ; sb r25, r26 ; shli r15, r16, 5 } + { mulhh_ss r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 } + { mulhh_ss r5, r6, r7 ; sh r15, r16 } + { mulhh_ss r5, r6, r7 ; sh r25, r26 ; s3a r15, r16, r17 } + { mulhh_ss r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + { mulhh_ss r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 } + { mulhh_ss r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + { mulhh_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 } + { mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 } + { mulhh_ss r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + { mulhh_ss r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 } + { mulhh_ss r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 } + { mulhh_ss r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + { mulhh_ss r5, r6, r7 ; sw r25, r26 ; move r15, r16 } + { mulhh_ss r5, r6, r7 ; sw r25, r26 ; slte r15, r16, r17 } + { mulhh_ss r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + { mulhh_su r5, r6, r7 ; flush r15 } + { mulhh_su r5, r6, r7 ; lh r15, r16 } + { mulhh_su r5, r6, r7 ; mnz r15, r16, r17 } + { mulhh_su r5, r6, r7 ; raise } + { mulhh_su r5, r6, r7 ; shlib r15, r16, 5 } + { mulhh_su r5, r6, r7 ; slti r15, r16, 5 } + { mulhh_su r5, r6, r7 ; subs r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; addhs r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; and r15, r16, r17 ; lw r25, r26 } + { mulhh_uu r5, r6, r7 ; fnop ; lb r25, r26 } + { mulhh_uu r5, r6, r7 ; ill } + { mulhh_uu r5, r6, r7 ; jr r15 } + { mulhh_uu r5, r6, r7 ; lb r25, r26 ; s1a r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; lb r25, r26 } + { mulhh_uu r5, r6, r7 ; lb_u r25, r26 ; s2a r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; lbadd r15, r16, 5 } + { mulhh_uu r5, r6, r7 ; lh r25, r26 ; s1a r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; lh r25, r26 } + { mulhh_uu r5, r6, r7 ; lh_u r25, r26 ; s2a r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; lhadd r15, r16, 5 } + { mulhh_uu r5, r6, r7 ; lw r25, r26 ; rli r15, r16, 5 } + { mulhh_uu r5, r6, r7 ; lw r25, r26 ; xor r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 } + { mulhh_uu r5, r6, r7 ; movei r15, 5 ; lh r25, r26 } + { mulhh_uu r5, r6, r7 ; mz r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; sh r25, r26 } + { mulhh_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 } + { mulhh_uu r5, r6, r7 ; prefetch r25 ; nor r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; prefetch r25 ; sne r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; rli r15, r16, 5 ; lh_u r25, r26 } + { mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 } + { mulhh_uu r5, r6, r7 ; sb r25, r26 ; and r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; sb r25, r26 ; shl r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; seq r15, r16, r17 ; lh_u r25, r26 } + { mulhh_uu r5, r6, r7 ; seqih r15, r16, 5 } + { mulhh_uu r5, r6, r7 ; sh r25, r26 ; s2a r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; shadd r15, r16, 5 } + { mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 } + { mulhh_uu r5, r6, r7 ; shri r15, r16, 5 ; lh_u r25, r26 } + { mulhh_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 } + { mulhh_uu r5, r6, r7 ; slte r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 } + { mulhh_uu r5, r6, r7 ; sltih_u r15, r16, 5 } + { mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 } + { mulhh_uu r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 } + { mulhh_uu r5, r6, r7 ; sw r25, r26 ; mnz r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; sw r25, r26 ; slt_u r15, r16, r17 } + { mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 } + { mulhha_ss r5, r6, r7 ; addi r15, r16, 5 ; lb_u r25, r26 } + { mulhha_ss r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 } + { mulhha_ss r5, r6, r7 ; fnop ; lh r25, r26 } + { mulhha_ss r5, r6, r7 ; info 19 ; lb_u r25, r26 } + { mulhha_ss r5, r6, r7 ; lb r15, r16 } + { mulhha_ss r5, r6, r7 ; lb r25, r26 ; s3a r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; lb_u r25, r26 ; add r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; lb_u r25, r26 ; seq r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; lh r15, r16 } + { mulhha_ss r5, r6, r7 ; lh r25, r26 ; s3a r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; lh_u r25, r26 ; add r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; lh_u r25, r26 ; seq r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; lnk r15 } + { mulhha_ss r5, r6, r7 ; lw r25, r26 ; s2a r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; lw_na r15, r16 } + { mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + { mulhha_ss r5, r6, r7 ; movei r15, 5 ; lw r25, r26 } + { mulhha_ss r5, r6, r7 ; mzh r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; nor r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; ori r15, r16, 5 } + { mulhha_ss r5, r6, r7 ; prefetch r25 ; ori r15, r16, 5 } + { mulhha_ss r5, r6, r7 ; prefetch r25 ; srai r15, r16, 5 } + { mulhha_ss r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 } + { mulhha_ss r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 } + { mulhha_ss r5, r6, r7 ; sb r25, r26 ; fnop } + { mulhha_ss r5, r6, r7 ; sb r25, r26 ; shr r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 } + { mulhha_ss r5, r6, r7 ; sh r25, r26 ; add r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; sh r25, r26 ; seq r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 } + { mulhha_ss r5, r6, r7 ; shli r15, r16, 5 } + { mulhha_ss r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 } + { mulhha_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + { mulhha_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + { mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 } + { mulhha_ss r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 } + { mulhha_ss r5, r6, r7 ; sra r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + { mulhha_ss r5, r6, r7 ; sw r25, r26 ; movei r15, 5 } + { mulhha_ss r5, r6, r7 ; sw r25, r26 ; slte_u r15, r16, r17 } + { mulhha_ss r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 } + { mulhha_su r5, r6, r7 ; fnop } + { mulhha_su r5, r6, r7 ; lh_u r15, r16 } + { mulhha_su r5, r6, r7 ; mnzb r15, r16, r17 } + { mulhha_su r5, r6, r7 ; rl r15, r16, r17 } + { mulhha_su r5, r6, r7 ; shlih r15, r16, 5 } + { mulhha_su r5, r6, r7 ; slti_u r15, r16, 5 } + { mulhha_su r5, r6, r7 ; sw r15, r16 } + { mulhha_uu r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 } + { mulhha_uu r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + { mulhha_uu r5, r6, r7 ; fnop ; lb_u r25, r26 } + { mulhha_uu r5, r6, r7 ; info 19 ; lb r25, r26 } + { mulhha_uu r5, r6, r7 ; jrp r15 } + { mulhha_uu r5, r6, r7 ; lb r25, r26 ; s2a r15, r16, r17 } + { mulhha_uu r5, r6, r7 ; lb_u r15, r16 } + { mulhha_uu r5, r6, r7 ; lb_u r25, r26 ; s3a r15, r16, r17 } + { mulhha_uu r5, r6, r7 ; lbadd_u r15, r16, 5 } + { mulhha_uu r5, r6, r7 ; lh r25, r26 ; s2a r15, r16, r17 } + { mulhha_uu r5, r6, r7 ; lh_u r15, r16 } + { mulhha_uu r5, r6, r7 ; lh_u r25, r26 ; s3a r15, r16, r17 } + { mulhha_uu r5, r6, r7 ; lhadd_u r15, r16, 5 } + { mulhha_uu r5, r6, r7 ; lw r25, r26 ; s1a r15, r16, r17 } + { mulhha_uu r5, r6, r7 ; lw r25, r26 } + { mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + { mulhha_uu r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 } + { mulhha_uu r5, r6, r7 ; mzb r15, r16, r17 } + { mulhha_uu r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + { mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 } + { mulhha_uu r5, r6, r7 ; prefetch r25 ; or r15, r16, r17 } + { mulhha_uu r5, r6, r7 ; prefetch r25 ; sra r15, r16, r17 } + { mulhha_uu r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 } + { mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + { mulhha_uu r5, r6, r7 ; sb r25, r26 ; andi r15, r16, 5 } + { mulhha_uu r5, r6, r7 ; sb r25, r26 ; shli r15, r16, 5 } + { mulhha_uu r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 } + { mulhha_uu r5, r6, r7 ; sh r15, r16 } + { mulhha_uu r5, r6, r7 ; sh r25, r26 ; s3a r15, r16, r17 } + { mulhha_uu r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + { mulhha_uu r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 } + { mulhha_uu r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + { mulhha_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 } + { mulhha_uu r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 } + { mulhha_uu r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + { mulhha_uu r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 } + { mulhha_uu r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 } + { mulhha_uu r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + { mulhha_uu r5, r6, r7 ; sw r25, r26 ; move r15, r16 } + { mulhha_uu r5, r6, r7 ; sw r25, r26 ; slte r15, r16, r17 } + { mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + { mulhhsa_uu r5, r6, r7 ; flush r15 } + { mulhhsa_uu r5, r6, r7 ; lh r15, r16 } + { mulhhsa_uu r5, r6, r7 ; mnz r15, r16, r17 } + { mulhhsa_uu r5, r6, r7 ; raise } + { mulhhsa_uu r5, r6, r7 ; shlib r15, r16, 5 } + { mulhhsa_uu r5, r6, r7 ; slti r15, r16, 5 } + { mulhhsa_uu r5, r6, r7 ; subs r15, r16, r17 } + { mulhl_ss r5, r6, r7 ; auli r15, r16, 0x1234 } + { mulhl_ss r5, r6, r7 ; lb_u r15, r16 } + { mulhl_ss r5, r6, r7 ; minib_u r15, r16, 5 } + { mulhl_ss r5, r6, r7 ; packhs r15, r16, r17 } + { mulhl_ss r5, r6, r7 ; shlb r15, r16, r17 } + { mulhl_ss r5, r6, r7 ; slteh_u r15, r16, r17 } + { mulhl_ss r5, r6, r7 ; subbs_u r15, r16, r17 } + { mulhl_su r5, r6, r7 ; adds r15, r16, r17 } + { mulhl_su r5, r6, r7 ; jr r15 } + { mulhl_su r5, r6, r7 ; mfspr r16, 0x5 } + { mulhl_su r5, r6, r7 ; ori r15, r16, 5 } + { mulhl_su r5, r6, r7 ; sh r15, r16 } + { mulhl_su r5, r6, r7 ; slteb r15, r16, r17 } + { mulhl_su r5, r6, r7 ; sraih r15, r16, 5 } + { mulhl_us r5, r6, r7 ; addih r15, r16, 5 } + { mulhl_us r5, r6, r7 ; iret } + { mulhl_us r5, r6, r7 ; maxib_u r15, r16, 5 } + { mulhl_us r5, r6, r7 ; nop } + { mulhl_us r5, r6, r7 ; seqi r15, r16, 5 } + { mulhl_us r5, r6, r7 ; sltb_u r15, r16, r17 } + { mulhl_us r5, r6, r7 ; srah r15, r16, r17 } + { mulhl_uu r5, r6, r7 ; addhs r15, r16, r17 } + { mulhl_uu r5, r6, r7 ; intlb r15, r16, r17 } + { mulhl_uu r5, r6, r7 ; lwadd_na r15, r16, 5 } + { mulhl_uu r5, r6, r7 ; mz r15, r16, r17 } + { mulhl_uu r5, r6, r7 ; seq r15, r16, r17 } + { mulhl_uu r5, r6, r7 ; slt r15, r16, r17 } + { mulhl_uu r5, r6, r7 ; sneh r15, r16, r17 } + { mulhla_ss r5, r6, r7 ; addb r15, r16, r17 } + { mulhla_ss r5, r6, r7 ; infol 0x1234 } + { mulhla_ss r5, r6, r7 ; lw r15, r16 } + { mulhla_ss r5, r6, r7 ; moveli r15, 0x1234 } + { mulhla_ss r5, r6, r7 ; s3a r15, r16, r17 } + { mulhla_ss r5, r6, r7 ; shri r15, r16, 5 } + { mulhla_ss r5, r6, r7 ; sltih_u r15, r16, 5 } + { mulhla_ss r5, r6, r7 ; xor r15, r16, r17 } + { mulhla_su r5, r6, r7 ; icoh r15 } + { mulhla_su r5, r6, r7 ; lhadd r15, r16, 5 } + { mulhla_su r5, r6, r7 ; mnzh r15, r16, r17 } + { mulhla_su r5, r6, r7 ; rli r15, r16, 5 } + { mulhla_su r5, r6, r7 ; shr r15, r16, r17 } + { mulhla_su r5, r6, r7 ; sltib r15, r16, 5 } + { mulhla_su r5, r6, r7 ; swadd r15, r16, 5 } + { mulhla_us r5, r6, r7 ; finv r15 } + { mulhla_us r5, r6, r7 ; lbadd_u r15, r16, 5 } + { mulhla_us r5, r6, r7 ; mm r15, r16, r17, 5, 7 } + { mulhla_us r5, r6, r7 ; prefetch r15 } + { mulhla_us r5, r6, r7 ; shli r15, r16, 5 } + { mulhla_us r5, r6, r7 ; slth_u r15, r16, r17 } + { mulhla_us r5, r6, r7 ; subhs r15, r16, r17 } + { mulhla_uu r5, r6, r7 ; andi r15, r16, 5 } + { mulhla_uu r5, r6, r7 ; lb r15, r16 } + { mulhla_uu r5, r6, r7 ; minh r15, r16, r17 } + { mulhla_uu r5, r6, r7 ; packhb r15, r16, r17 } + { mulhla_uu r5, r6, r7 ; shl r15, r16, r17 } + { mulhla_uu r5, r6, r7 ; slteh r15, r16, r17 } + { mulhla_uu r5, r6, r7 ; subb r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; add r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + { mulhlsa_uu r5, r6, r7 ; auli r15, r16, 0x1234 } + { mulhlsa_uu r5, r6, r7 ; ill ; prefetch r25 } + { mulhlsa_uu r5, r6, r7 ; inv r15 } + { mulhlsa_uu r5, r6, r7 ; lb r25, r26 ; or r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; lb r25, r26 ; sra r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; lb_u r25, r26 ; ori r15, r16, 5 } + { mulhlsa_uu r5, r6, r7 ; lb_u r25, r26 ; srai r15, r16, 5 } + { mulhlsa_uu r5, r6, r7 ; lh r25, r26 ; or r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; lh r25, r26 ; sra r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; lh_u r25, r26 ; ori r15, r16, 5 } + { mulhlsa_uu r5, r6, r7 ; lh_u r25, r26 ; srai r15, r16, 5 } + { mulhlsa_uu r5, r6, r7 ; lw r25, r26 ; nor r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; lw r25, r26 ; sne r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 } + { mulhlsa_uu r5, r6, r7 ; move r15, r16 ; sw r25, r26 } + { mulhlsa_uu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + { mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + { mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 } + { mulhlsa_uu r5, r6, r7 ; prefetch r25 ; move r15, r16 } + { mulhlsa_uu r5, r6, r7 ; prefetch r25 ; slte r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; rl r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; s1a r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; sb r25, r26 ; s2a r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; sbadd r15, r16, 5 } + { mulhlsa_uu r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 } + { mulhlsa_uu r5, r6, r7 ; sh r25, r26 ; ori r15, r16, 5 } + { mulhlsa_uu r5, r6, r7 ; sh r25, r26 ; srai r15, r16, 5 } + { mulhlsa_uu r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + { mulhlsa_uu r5, r6, r7 ; shrh r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + { mulhlsa_uu r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 } + { mulhlsa_uu r5, r6, r7 ; slth_u r15, r16, r17 } + { mulhlsa_uu r5, r6, r7 ; slti_u r15, r16, 5 } + { mulhlsa_uu r5, r6, r7 ; sra r15, r16, r17 ; lh_u r25, r26 } + { mulhlsa_uu r5, r6, r7 ; sraih r15, r16, 5 } + { mulhlsa_uu r5, r6, r7 ; sw r25, r26 ; andi r15, r16, 5 } + { mulhlsa_uu r5, r6, r7 ; sw r25, r26 ; shli r15, r16, 5 } + { mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 } + { mulll_ss r5, r6, r7 ; addbs_u r15, r16, r17 } + { mulll_ss r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + { mulll_ss r5, r6, r7 ; finv r15 } + { mulll_ss r5, r6, r7 ; ill ; sh r25, r26 } + { mulll_ss r5, r6, r7 ; jalr r15 } + { mulll_ss r5, r6, r7 ; lb r25, r26 ; rl r15, r16, r17 } + { mulll_ss r5, r6, r7 ; lb r25, r26 ; sub r15, r16, r17 } + { mulll_ss r5, r6, r7 ; lb_u r25, r26 ; rli r15, r16, 5 } + { mulll_ss r5, r6, r7 ; lb_u r25, r26 ; xor r15, r16, r17 } + { mulll_ss r5, r6, r7 ; lh r25, r26 ; rl r15, r16, r17 } + { mulll_ss r5, r6, r7 ; lh r25, r26 ; sub r15, r16, r17 } + { mulll_ss r5, r6, r7 ; lh_u r25, r26 ; rli r15, r16, 5 } + { mulll_ss r5, r6, r7 ; lh_u r25, r26 ; xor r15, r16, r17 } + { mulll_ss r5, r6, r7 ; lw r25, r26 ; ori r15, r16, 5 } + { mulll_ss r5, r6, r7 ; lw r25, r26 ; srai r15, r16, 5 } + { mulll_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh r25, r26 } + { mulll_ss r5, r6, r7 ; movei r15, 5 ; lb r25, r26 } + { mulll_ss r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 } + { mulll_ss r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + { mulll_ss r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 } + { mulll_ss r5, r6, r7 ; prefetch r25 ; mz r15, r16, r17 } + { mulll_ss r5, r6, r7 ; prefetch r25 ; slti r15, r16, 5 } + { mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 } + { mulll_ss r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 } + { mulll_ss r5, r6, r7 ; sb r25, r26 ; add r15, r16, r17 } + { mulll_ss r5, r6, r7 ; sb r25, r26 ; seq r15, r16, r17 } + { mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 } + { mulll_ss r5, r6, r7 ; seqi r15, r16, 5 } + { mulll_ss r5, r6, r7 ; sh r25, r26 ; rli r15, r16, 5 } + { mulll_ss r5, r6, r7 ; sh r25, r26 ; xor r15, r16, r17 } + { mulll_ss r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + { mulll_ss r5, r6, r7 ; shri r15, r16, 5 ; lb_u r25, r26 } + { mulll_ss r5, r6, r7 ; slt r15, r16, r17 } + { mulll_ss r5, r6, r7 ; slte r15, r16, r17 ; sh r25, r26 } + { mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 } + { mulll_ss r5, r6, r7 ; sltib_u r15, r16, 5 } + { mulll_ss r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 } + { mulll_ss r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 } + { mulll_ss r5, r6, r7 ; sw r25, r26 ; ill } + { mulll_ss r5, r6, r7 ; sw r25, r26 ; shri r15, r16, 5 } + { mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 } + { mulll_su r5, r6, r7 ; auli r15, r16, 0x1234 } + { mulll_su r5, r6, r7 ; lb_u r15, r16 } + { mulll_su r5, r6, r7 ; minib_u r15, r16, 5 } + { mulll_su r5, r6, r7 ; packhs r15, r16, r17 } + { mulll_su r5, r6, r7 ; shlb r15, r16, r17 } + { mulll_su r5, r6, r7 ; slteh_u r15, r16, r17 } + { mulll_su r5, r6, r7 ; subbs_u r15, r16, r17 } + { mulll_uu r5, r6, r7 ; addb r15, r16, r17 } + { mulll_uu r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + { mulll_uu r5, r6, r7 ; dtlbpr r15 } + { mulll_uu r5, r6, r7 ; ill ; sb r25, r26 } + { mulll_uu r5, r6, r7 ; iret } + { mulll_uu r5, r6, r7 ; lb r25, r26 ; ori r15, r16, 5 } + { mulll_uu r5, r6, r7 ; lb r25, r26 ; srai r15, r16, 5 } + { mulll_uu r5, r6, r7 ; lb_u r25, r26 ; rl r15, r16, r17 } + { mulll_uu r5, r6, r7 ; lb_u r25, r26 ; sub r15, r16, r17 } + { mulll_uu r5, r6, r7 ; lh r25, r26 ; ori r15, r16, 5 } + { mulll_uu r5, r6, r7 ; lh r25, r26 ; srai r15, r16, 5 } + { mulll_uu r5, r6, r7 ; lh_u r25, r26 ; rl r15, r16, r17 } + { mulll_uu r5, r6, r7 ; lh_u r25, r26 ; sub r15, r16, r17 } + { mulll_uu r5, r6, r7 ; lw r25, r26 ; or r15, r16, r17 } + { mulll_uu r5, r6, r7 ; lw r25, r26 ; sra r15, r16, r17 } + { mulll_uu r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + { mulll_uu r5, r6, r7 ; move r15, r16 } + { mulll_uu r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + { mulll_uu r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + { mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + { mulll_uu r5, r6, r7 ; prefetch r25 ; movei r15, 5 } + { mulll_uu r5, r6, r7 ; prefetch r25 ; slte_u r15, r16, r17 } + { mulll_uu r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + { mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + { mulll_uu r5, r6, r7 ; sb r15, r16 } + { mulll_uu r5, r6, r7 ; sb r25, r26 ; s3a r15, r16, r17 } + { mulll_uu r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 } + { mulll_uu r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + { mulll_uu r5, r6, r7 ; sh r25, r26 ; rl r15, r16, r17 } + { mulll_uu r5, r6, r7 ; sh r25, r26 ; sub r15, r16, r17 } + { mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + { mulll_uu r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 } + { mulll_uu r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 } + { mulll_uu r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 } + { mulll_uu r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + { mulll_uu r5, r6, r7 ; sltib r15, r16, 5 } + { mulll_uu r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + { mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + { mulll_uu r5, r6, r7 ; sw r25, r26 ; fnop } + { mulll_uu r5, r6, r7 ; sw r25, r26 ; shr r15, r16, r17 } + { mulll_uu r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + { mullla_ss r5, r6, r7 ; addh r15, r16, r17 } + { mullla_ss r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + { mullla_ss r5, r6, r7 ; flush r15 } + { mullla_ss r5, r6, r7 ; ill ; sw r25, r26 } + { mullla_ss r5, r6, r7 ; jalrp r15 } + { mullla_ss r5, r6, r7 ; lb r25, r26 ; rli r15, r16, 5 } + { mullla_ss r5, r6, r7 ; lb r25, r26 ; xor r15, r16, r17 } + { mullla_ss r5, r6, r7 ; lb_u r25, r26 ; s1a r15, r16, r17 } + { mullla_ss r5, r6, r7 ; lb_u r25, r26 } + { mullla_ss r5, r6, r7 ; lh r25, r26 ; rli r15, r16, 5 } + { mullla_ss r5, r6, r7 ; lh r25, r26 ; xor r15, r16, r17 } + { mullla_ss r5, r6, r7 ; lh_u r25, r26 ; s1a r15, r16, r17 } + { mullla_ss r5, r6, r7 ; lh_u r25, r26 } + { mullla_ss r5, r6, r7 ; lw r25, r26 ; rl r15, r16, r17 } + { mullla_ss r5, r6, r7 ; lw r25, r26 ; sub r15, r16, r17 } + { mullla_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 } + { mullla_ss r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + { mullla_ss r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 } + { mullla_ss r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 } + { mullla_ss r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 } + { mullla_ss r5, r6, r7 ; prefetch r25 ; nop } + { mullla_ss r5, r6, r7 ; prefetch r25 ; slti_u r15, r16, 5 } + { mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 } + { mullla_ss r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 } + { mullla_ss r5, r6, r7 ; sb r25, r26 ; addi r15, r16, 5 } + { mullla_ss r5, r6, r7 ; sb r25, r26 ; seqi r15, r16, 5 } + { mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 } + { mullla_ss r5, r6, r7 ; seqib r15, r16, 5 } + { mullla_ss r5, r6, r7 ; sh r25, r26 ; s1a r15, r16, r17 } + { mullla_ss r5, r6, r7 ; sh r25, r26 } + { mullla_ss r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + { mullla_ss r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 } + { mullla_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 } + { mullla_ss r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 } + { mullla_ss r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 } + { mullla_ss r5, r6, r7 ; sltih r15, r16, 5 } + { mullla_ss r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 } + { mullla_ss r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 } + { mullla_ss r5, r6, r7 ; sw r25, r26 ; info 19 } + { mullla_ss r5, r6, r7 ; sw r25, r26 ; slt r15, r16, r17 } + { mullla_ss r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + { mullla_su r5, r6, r7 ; dtlbpr r15 } + { mullla_su r5, r6, r7 ; lbadd r15, r16, 5 } + { mullla_su r5, r6, r7 ; minih r15, r16, 5 } + { mullla_su r5, r6, r7 ; packlb r15, r16, r17 } + { mullla_su r5, r6, r7 ; shlh r15, r16, r17 } + { mullla_su r5, r6, r7 ; slth r15, r16, r17 } + { mullla_su r5, r6, r7 ; subh r15, r16, r17 } + { mullla_uu r5, r6, r7 ; addbs_u r15, r16, r17 } + { mullla_uu r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 } + { mullla_uu r5, r6, r7 ; finv r15 } + { mullla_uu r5, r6, r7 ; ill ; sh r25, r26 } + { mullla_uu r5, r6, r7 ; jalr r15 } + { mullla_uu r5, r6, r7 ; lb r25, r26 ; rl r15, r16, r17 } + { mullla_uu r5, r6, r7 ; lb r25, r26 ; sub r15, r16, r17 } + { mullla_uu r5, r6, r7 ; lb_u r25, r26 ; rli r15, r16, 5 } + { mullla_uu r5, r6, r7 ; lb_u r25, r26 ; xor r15, r16, r17 } + { mullla_uu r5, r6, r7 ; lh r25, r26 ; rl r15, r16, r17 } + { mullla_uu r5, r6, r7 ; lh r25, r26 ; sub r15, r16, r17 } + { mullla_uu r5, r6, r7 ; lh_u r25, r26 ; rli r15, r16, 5 } + { mullla_uu r5, r6, r7 ; lh_u r25, r26 ; xor r15, r16, r17 } + { mullla_uu r5, r6, r7 ; lw r25, r26 ; ori r15, r16, 5 } + { mullla_uu r5, r6, r7 ; lw r25, r26 ; srai r15, r16, 5 } + { mullla_uu r5, r6, r7 ; mnz r15, r16, r17 ; lh r25, r26 } + { mullla_uu r5, r6, r7 ; movei r15, 5 ; lb r25, r26 } + { mullla_uu r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 } + { mullla_uu r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 } + { mullla_uu r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 } + { mullla_uu r5, r6, r7 ; prefetch r25 ; mz r15, r16, r17 } + { mullla_uu r5, r6, r7 ; prefetch r25 ; slti r15, r16, 5 } + { mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 } + { mullla_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 } + { mullla_uu r5, r6, r7 ; sb r25, r26 ; add r15, r16, r17 } + { mullla_uu r5, r6, r7 ; sb r25, r26 ; seq r15, r16, r17 } + { mullla_uu r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 } + { mullla_uu r5, r6, r7 ; seqi r15, r16, 5 } + { mullla_uu r5, r6, r7 ; sh r25, r26 ; rli r15, r16, 5 } + { mullla_uu r5, r6, r7 ; sh r25, r26 ; xor r15, r16, r17 } + { mullla_uu r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 } + { mullla_uu r5, r6, r7 ; shri r15, r16, 5 ; lb_u r25, r26 } + { mullla_uu r5, r6, r7 ; slt r15, r16, r17 } + { mullla_uu r5, r6, r7 ; slte r15, r16, r17 ; sh r25, r26 } + { mullla_uu r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 } + { mullla_uu r5, r6, r7 ; sltib_u r15, r16, 5 } + { mullla_uu r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 } + { mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 } + { mullla_uu r5, r6, r7 ; sw r25, r26 ; ill } + { mullla_uu r5, r6, r7 ; sw r25, r26 ; shri r15, r16, 5 } + { mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 } + { mulllsa_uu r5, r6, r7 ; auli r15, r16, 0x1234 } + { mulllsa_uu r5, r6, r7 ; lb_u r15, r16 } + { mulllsa_uu r5, r6, r7 ; minib_u r15, r16, 5 } + { mulllsa_uu r5, r6, r7 ; packhs r15, r16, r17 } + { mulllsa_uu r5, r6, r7 ; shlb r15, r16, r17 } + { mulllsa_uu r5, r6, r7 ; slteh_u r15, r16, r17 } + { mulllsa_uu r5, r6, r7 ; subbs_u r15, r16, r17 } + { mvnz r5, r6, r7 ; addb r15, r16, r17 } + { mvnz r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + { mvnz r5, r6, r7 ; dtlbpr r15 } + { mvnz r5, r6, r7 ; ill ; sb r25, r26 } + { mvnz r5, r6, r7 ; iret } + { mvnz r5, r6, r7 ; lb r25, r26 ; ori r15, r16, 5 } + { mvnz r5, r6, r7 ; lb r25, r26 ; srai r15, r16, 5 } + { mvnz r5, r6, r7 ; lb_u r25, r26 ; rl r15, r16, r17 } + { mvnz r5, r6, r7 ; lb_u r25, r26 ; sub r15, r16, r17 } + { mvnz r5, r6, r7 ; lh r25, r26 ; ori r15, r16, 5 } + { mvnz r5, r6, r7 ; lh r25, r26 ; srai r15, r16, 5 } + { mvnz r5, r6, r7 ; lh_u r25, r26 ; rl r15, r16, r17 } + { mvnz r5, r6, r7 ; lh_u r25, r26 ; sub r15, r16, r17 } + { mvnz r5, r6, r7 ; lw r25, r26 ; or r15, r16, r17 } + { mvnz r5, r6, r7 ; lw r25, r26 ; sra r15, r16, r17 } + { mvnz r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + { mvnz r5, r6, r7 ; move r15, r16 } + { mvnz r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + { mvnz r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + { mvnz r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + { mvnz r5, r6, r7 ; prefetch r25 ; movei r15, 5 } + { mvnz r5, r6, r7 ; prefetch r25 ; slte_u r15, r16, r17 } + { mvnz r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + { mvnz r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + { mvnz r5, r6, r7 ; sb r15, r16 } + { mvnz r5, r6, r7 ; sb r25, r26 ; s3a r15, r16, r17 } + { mvnz r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 } + { mvnz r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + { mvnz r5, r6, r7 ; sh r25, r26 ; rl r15, r16, r17 } + { mvnz r5, r6, r7 ; sh r25, r26 ; sub r15, r16, r17 } + { mvnz r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + { mvnz r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 } + { mvnz r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 } + { mvnz r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 } + { mvnz r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + { mvnz r5, r6, r7 ; sltib r15, r16, 5 } + { mvnz r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + { mvnz r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + { mvnz r5, r6, r7 ; sw r25, r26 ; fnop } + { mvnz r5, r6, r7 ; sw r25, r26 ; shr r15, r16, r17 } + { mvnz r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + { mvz r5, r6, r7 ; addh r15, r16, r17 } + { mvz r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 } + { mvz r5, r6, r7 ; flush r15 } + { mvz r5, r6, r7 ; ill ; sw r25, r26 } + { mvz r5, r6, r7 ; jalrp r15 } + { mvz r5, r6, r7 ; lb r25, r26 ; rli r15, r16, 5 } + { mvz r5, r6, r7 ; lb r25, r26 ; xor r15, r16, r17 } + { mvz r5, r6, r7 ; lb_u r25, r26 ; s1a r15, r16, r17 } + { mvz r5, r6, r7 ; lb_u r25, r26 } + { mvz r5, r6, r7 ; lh r25, r26 ; rli r15, r16, 5 } + { mvz r5, r6, r7 ; lh r25, r26 ; xor r15, r16, r17 } + { mvz r5, r6, r7 ; lh_u r25, r26 ; s1a r15, r16, r17 } + { mvz r5, r6, r7 ; lh_u r25, r26 } + { mvz r5, r6, r7 ; lw r25, r26 ; rl r15, r16, r17 } + { mvz r5, r6, r7 ; lw r25, r26 ; sub r15, r16, r17 } + { mvz r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 } + { mvz r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 } + { mvz r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 } + { mvz r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 } + { mvz r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 } + { mvz r5, r6, r7 ; prefetch r25 ; nop } + { mvz r5, r6, r7 ; prefetch r25 ; slti_u r15, r16, 5 } + { mvz r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 } + { mvz r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 } + { mvz r5, r6, r7 ; sb r25, r26 ; addi r15, r16, 5 } + { mvz r5, r6, r7 ; sb r25, r26 ; seqi r15, r16, 5 } + { mvz r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 } + { mvz r5, r6, r7 ; seqib r15, r16, 5 } + { mvz r5, r6, r7 ; sh r25, r26 ; s1a r15, r16, r17 } + { mvz r5, r6, r7 ; sh r25, r26 } + { mvz r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 } + { mvz r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 } + { mvz r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 } + { mvz r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 } + { mvz r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 } + { mvz r5, r6, r7 ; sltih r15, r16, 5 } + { mvz r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 } + { mvz r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 } + { mvz r5, r6, r7 ; sw r25, r26 ; info 19 } + { mvz r5, r6, r7 ; sw r25, r26 ; slt r15, r16, r17 } + { mvz r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 } + { mz r15, r16, r17 ; addi r5, r6, 5 ; lb r25, r26 } + { mz r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 } + { mz r15, r16, r17 ; bitx r5, r6 ; lb r25, r26 } + { mz r15, r16, r17 ; clz r5, r6 ; lb r25, r26 } + { mz r15, r16, r17 ; ctz r5, r6 ; sw r25, r26 } + { mz r15, r16, r17 ; info 19 ; sh r25, r26 } + { mz r15, r16, r17 ; lb r25, r26 ; movei r5, 5 } + { mz r15, r16, r17 ; lb r25, r26 ; s1a r5, r6, r7 } + { mz r15, r16, r17 ; lb r25, r26 ; tblidxb1 r5, r6 } + { mz r15, r16, r17 ; lb_u r25, r26 ; mulhha_ss r5, r6, r7 } + { mz r15, r16, r17 ; lb_u r25, r26 ; seq r5, r6, r7 } + { mz r15, r16, r17 ; lb_u r25, r26 ; xor r5, r6, r7 } + { mz r15, r16, r17 ; lh r25, r26 ; mulll_ss r5, r6, r7 } + { mz r15, r16, r17 ; lh r25, r26 ; shli r5, r6, 5 } + { mz r15, r16, r17 ; lh_u r25, r26 ; addi r5, r6, 5 } + { mz r15, r16, r17 ; lh_u r25, r26 ; mullla_uu r5, r6, r7 } + { mz r15, r16, r17 ; lh_u r25, r26 ; slt r5, r6, r7 } + { mz r15, r16, r17 ; lw r25, r26 ; bitx r5, r6 } + { mz r15, r16, r17 ; lw r25, r26 ; mz r5, r6, r7 } + { mz r15, r16, r17 ; lw r25, r26 ; slte_u r5, r6, r7 } + { mz r15, r16, r17 ; minih r5, r6, 5 } + { mz r15, r16, r17 ; move r5, r6 ; sb r25, r26 } + { mz r15, r16, r17 ; mulhh_ss r5, r6, r7 ; lw r25, r26 } + { mz r15, r16, r17 ; mulhha_ss r5, r6, r7 ; lh_u r25, r26 } + { mz r15, r16, r17 ; mulhl_su r5, r6, r7 } + { mz r15, r16, r17 ; mulll_ss r5, r6, r7 ; lh_u r25, r26 } + { mz r15, r16, r17 ; mullla_ss r5, r6, r7 ; lh r25, r26 } + { mz r15, r16, r17 ; mvnz r5, r6, r7 ; lb r25, r26 } + { mz r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 } + { mz r15, r16, r17 ; nop ; sw r25, r26 } + { mz r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 } + { mz r15, r16, r17 ; pcnt r5, r6 ; lw r25, r26 } + { mz r15, r16, r17 ; prefetch r25 ; mulhh_uu r5, r6, r7 } + { mz r15, r16, r17 ; prefetch r25 ; s3a r5, r6, r7 } + { mz r15, r16, r17 ; prefetch r25 ; tblidxb3 r5, r6 } + { mz r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 } + { mz r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 } + { mz r15, r16, r17 ; sb r25, r26 ; addi r5, r6, 5 } + { mz r15, r16, r17 ; sb r25, r26 ; mullla_uu r5, r6, r7 } + { mz r15, r16, r17 ; sb r25, r26 ; slt r5, r6, r7 } + { mz r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 } + { mz r15, r16, r17 ; sh r25, r26 ; add r5, r6, r7 } + { mz r15, r16, r17 ; sh r25, r26 ; mullla_ss r5, r6, r7 } + { mz r15, r16, r17 ; sh r25, r26 ; shri r5, r6, 5 } + { mz r15, r16, r17 ; shl r5, r6, r7 ; lh_u r25, r26 } + { mz r15, r16, r17 ; shlih r5, r6, 5 } + { mz r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 } + { mz r15, r16, r17 ; slt_u r5, r6, r7 ; prefetch r25 } + { mz r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 } + { mz r15, r16, r17 ; slti r5, r6, 5 ; sh r25, r26 } + { mz r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 } + { mz r15, r16, r17 ; srah r5, r6, r7 } + { mz r15, r16, r17 ; sub r5, r6, r7 ; sh r25, r26 } + { mz r15, r16, r17 ; sw r25, r26 ; movei r5, 5 } + { mz r15, r16, r17 ; sw r25, r26 ; s1a r5, r6, r7 } + { mz r15, r16, r17 ; sw r25, r26 ; tblidxb1 r5, r6 } + { mz r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch r25 } + { mz r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch r25 } + { mz r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 } + { mz r5, r6, r7 ; addib r15, r16, 5 } + { mz r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 } + { mz r5, r6, r7 ; ill ; lb r25, r26 } + { mz r5, r6, r7 ; infol 0x1234 } + { mz r5, r6, r7 ; lb r25, r26 ; move r15, r16 } + { mz r5, r6, r7 ; lb r25, r26 ; slte r15, r16, r17 } + { mz r5, r6, r7 ; lb_u r25, r26 ; movei r15, 5 } + { mz r5, r6, r7 ; lb_u r25, r26 ; slte_u r15, r16, r17 } + { mz r5, r6, r7 ; lh r25, r26 ; move r15, r16 } + { mz r5, r6, r7 ; lh r25, r26 ; slte r15, r16, r17 } + { mz r5, r6, r7 ; lh_u r25, r26 ; movei r15, 5 } + { mz r5, r6, r7 ; lh_u r25, r26 ; slte_u r15, r16, r17 } + { mz r5, r6, r7 ; lw r25, r26 ; mnz r15, r16, r17 } + { mz r5, r6, r7 ; lw r25, r26 ; slt_u r15, r16, r17 } + { mz r5, r6, r7 ; minb_u r15, r16, r17 } + { mz r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 } + { mz r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 } + { mz r5, r6, r7 ; nop ; sw r25, r26 } + { mz r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 } + { mz r5, r6, r7 ; prefetch r25 ; andi r15, r16, 5 } + { mz r5, r6, r7 ; prefetch r25 ; shli r15, r16, 5 } + { mz r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 } + { mz r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 } + { mz r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 } + { mz r5, r6, r7 ; sb r25, r26 ; or r15, r16, r17 } + { mz r5, r6, r7 ; sb r25, r26 ; sra r15, r16, r17 } + { mz r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 } + { mz r5, r6, r7 ; sh r25, r26 ; movei r15, 5 } + { mz r5, r6, r7 ; sh r25, r26 ; slte_u r15, r16, r17 } + { mz r5, r6, r7 ; shlb r15, r16, r17 } + { mz r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 } + { mz r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 } + { mz r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 } + { mz r5, r6, r7 ; slteb r15, r16, r17 } + { mz r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 } + { mz r5, r6, r7 ; sneb r15, r16, r17 } + { mz r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 } + { mz r5, r6, r7 ; subs r15, r16, r17 } + { mz r5, r6, r7 ; sw r25, r26 ; s2a r15, r16, r17 } + { mz r5, r6, r7 ; swadd r15, r16, 5 } + { mzb r15, r16, r17 ; addib r5, r6, 5 } + { mzb r15, r16, r17 ; info 19 } + { mzb r15, r16, r17 ; moveli r5, 0x1234 } + { mzb r15, r16, r17 ; mulll_uu r5, r6, r7 } + { mzb r15, r16, r17 ; rli r5, r6, 5 } + { mzb r15, r16, r17 ; shlib r5, r6, 5 } + { mzb r15, r16, r17 ; slti r5, r6, 5 } + { mzb r15, r16, r17 ; subs r5, r6, r7 } + { mzb r5, r6, r7 ; auli r15, r16, 0x1234 } + { mzb r5, r6, r7 ; lb_u r15, r16 } + { mzb r5, r6, r7 ; minib_u r15, r16, 5 } + { mzb r5, r6, r7 ; packhs r15, r16, r17 } + { mzb r5, r6, r7 ; shlb r15, r16, r17 } + { mzb r5, r6, r7 ; slteh_u r15, r16, r17 } + { mzb r5, r6, r7 ; subbs_u r15, r16, r17 } + { mzh r15, r16, r17 ; adds r5, r6, r7 } + { mzh r15, r16, r17 ; intlb r5, r6, r7 } + { mzh r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { mzh r15, r16, r17 ; mulllsa_uu r5, r6, r7 } + { mzh r15, r16, r17 ; sadab_u r5, r6, r7 } + { mzh r15, r16, r17 ; shrh r5, r6, r7 } + { mzh r15, r16, r17 ; sltih r5, r6, 5 } + { mzh r15, r16, r17 ; tblidxb3 r5, r6 } + { mzh r5, r6, r7 ; fnop } + { mzh r5, r6, r7 ; lh_u r15, r16 } + { mzh r5, r6, r7 ; mnzb r15, r16, r17 } + { mzh r5, r6, r7 ; rl r15, r16, r17 } + { mzh r5, r6, r7 ; shlih r15, r16, 5 } + { mzh r5, r6, r7 ; slti_u r15, r16, 5 } + { mzh r5, r6, r7 ; sw r15, r16 } + { nop ; add r5, r6, r7 ; lh_u r25, r26 } + { nop ; addi r15, r16, 5 ; prefetch r25 } + { nop ; addli r5, r6, 0x1234 } + { nop ; and r5, r6, r7 ; lh_u r25, r26 } + { nop ; andi r5, r6, 5 ; lh_u r25, r26 } + { nop ; bitx r5, r6 } + { nop ; clz r5, r6 ; sw r25, r26 } + { nop ; fnop ; lb_u r25, r26 } + { nop ; info 19 ; lb r25, r26 } + { nop ; iret } + { nop ; lb r25, r26 ; info 19 } + { nop ; lb r25, r26 ; nop } + { nop ; lb r25, r26 ; seqi r15, r16, 5 } + { nop ; lb r25, r26 ; slti_u r15, r16, 5 } + { nop ; lb_u r25, r26 ; addi r15, r16, 5 } + { nop ; lb_u r25, r26 ; mulhh_uu r5, r6, r7 } + { nop ; lb_u r25, r26 ; rl r15, r16, r17 } + { nop ; lb_u r25, r26 ; shri r15, r16, 5 } + { nop ; lb_u r25, r26 ; sub r15, r16, r17 } + { nop ; lh r25, r26 ; bitx r5, r6 } + { nop ; lh r25, r26 ; mullla_ss r5, r6, r7 } + { nop ; lh r25, r26 ; s2a r15, r16, r17 } + { nop ; lh r25, r26 ; slte r15, r16, r17 } + { nop ; lh r25, r26 ; xor r15, r16, r17 } + { nop ; lh_u r25, r26 ; mnz r5, r6, r7 } + { nop ; lh_u r25, r26 ; nor r5, r6, r7 } + { nop ; lh_u r25, r26 ; shl r15, r16, r17 } + { nop ; lh_u r25, r26 ; sne r15, r16, r17 } + { nop ; lw r25, r26 ; add r5, r6, r7 } + { nop ; lw r25, r26 ; mulhh_ss r5, r6, r7 } + { nop ; lw r25, r26 ; pcnt r5, r6 } + { nop ; lw r25, r26 ; shr r5, r6, r7 } + { nop ; lw r25, r26 ; srai r5, r6, 5 } + { nop ; maxih r5, r6, 5 } + { nop ; mnz r15, r16, r17 ; sh r25, r26 } + { nop ; move r15, r16 ; lh_u r25, r26 } + { nop ; movei r15, 5 ; lh_u r25, r26 } + { nop ; movelis r5, 0x1234 } + { nop ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { nop ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { nop ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { nop ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { nop ; mullla_uu r5, r6, r7 ; prefetch r25 } + { nop ; mvz r5, r6, r7 ; lw r25, r26 } + { nop ; mz r5, r6, r7 ; lw r25, r26 } + { nop ; nop } + { nop ; nor r5, r6, r7 } + { nop ; or r5, r6, r7 } + { nop ; ori r5, r6, 5 } + { nop ; prefetch r25 ; add r15, r16, r17 } + { nop ; prefetch r25 ; movei r5, 5 } + { nop ; prefetch r25 ; ori r5, r6, 5 } + { nop ; prefetch r25 ; shr r15, r16, r17 } + { nop ; prefetch r25 ; srai r15, r16, 5 } + { nop ; rl r15, r16, r17 ; sw r25, r26 } + { nop ; rli r15, r16, 5 ; sw r25, r26 } + { nop ; s1a r15, r16, r17 ; sw r25, r26 } + { nop ; s2a r15, r16, r17 ; sw r25, r26 } + { nop ; s3a r15, r16, r17 ; sw r25, r26 } + { nop ; sb r25, r26 ; add r5, r6, r7 } + { nop ; sb r25, r26 ; mulhh_ss r5, r6, r7 } + { nop ; sb r25, r26 ; pcnt r5, r6 } + { nop ; sb r25, r26 ; shr r5, r6, r7 } + { nop ; sb r25, r26 ; srai r5, r6, 5 } + { nop ; seq r15, r16, r17 } + { nop ; seqi r15, r16, 5 ; prefetch r25 } + { nop ; sh r25, r26 ; add r15, r16, r17 } + { nop ; sh r25, r26 ; movei r5, 5 } + { nop ; sh r25, r26 ; ori r5, r6, 5 } + { nop ; sh r25, r26 ; shr r15, r16, r17 } + { nop ; sh r25, r26 ; srai r15, r16, 5 } + { nop ; shl r15, r16, r17 ; sw r25, r26 } + { nop ; shli r15, r16, 5 ; lw r25, r26 } + { nop ; shr r15, r16, r17 ; lb r25, r26 } + { nop ; shrb r15, r16, r17 } + { nop ; shri r5, r6, 5 ; sb r25, r26 } + { nop ; slt r5, r6, r7 ; lh r25, r26 } + { nop ; slt_u r5, r6, r7 ; lh r25, r26 } + { nop ; slte r15, r16, r17 ; sw r25, r26 } + { nop ; slte_u r15, r16, r17 ; sw r25, r26 } + { nop ; slth r15, r16, r17 } + { nop ; slti r5, r6, 5 ; sb r25, r26 } + { nop ; slti_u r5, r6, 5 ; sb r25, r26 } + { nop ; sne r15, r16, r17 ; sw r25, r26 } + { nop ; sra r15, r16, r17 ; lw r25, r26 } + { nop ; srai r15, r16, 5 ; lb r25, r26 } + { nop ; sraib r15, r16, 5 } + { nop ; sub r5, r6, r7 ; sb r25, r26 } + { nop ; sw r25, r26 ; and r5, r6, r7 } + { nop ; sw r25, r26 ; mulhlsa_uu r5, r6, r7 } + { nop ; sw r25, r26 ; rli r5, r6, 5 } + { nop ; sw r25, r26 ; slt r5, r6, r7 } + { nop ; sw r25, r26 ; tblidxb1 r5, r6 } + { nop ; tblidxb0 r5, r6 } + { nop ; tblidxb2 r5, r6 } + { nop ; xor r15, r16, r17 ; sh r25, r26 } + { nor r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 } + { nor r15, r16, r17 ; addih r5, r6, 5 } + { nor r15, r16, r17 ; andi r5, r6, 5 ; lw r25, r26 } + { nor r15, r16, r17 ; bytex r5, r6 ; lb_u r25, r26 } + { nor r15, r16, r17 ; crc32_8 r5, r6, r7 } + { nor r15, r16, r17 ; fnop ; sw r25, r26 } + { nor r15, r16, r17 ; lb r25, r26 ; andi r5, r6, 5 } + { nor r15, r16, r17 ; lb r25, r26 ; mvz r5, r6, r7 } + { nor r15, r16, r17 ; lb r25, r26 ; slte r5, r6, r7 } + { nor r15, r16, r17 ; lb_u r25, r26 ; clz r5, r6 } + { nor r15, r16, r17 ; lb_u r25, r26 ; nor r5, r6, r7 } + { nor r15, r16, r17 ; lb_u r25, r26 ; slti_u r5, r6, 5 } + { nor r15, r16, r17 ; lh r25, r26 ; info 19 } + { nor r15, r16, r17 ; lh r25, r26 ; pcnt r5, r6 } + { nor r15, r16, r17 ; lh r25, r26 ; srai r5, r6, 5 } + { nor r15, r16, r17 ; lh_u r25, r26 ; movei r5, 5 } + { nor r15, r16, r17 ; lh_u r25, r26 ; s1a r5, r6, r7 } + { nor r15, r16, r17 ; lh_u r25, r26 ; tblidxb1 r5, r6 } + { nor r15, r16, r17 ; lw r25, r26 ; mulhha_ss r5, r6, r7 } + { nor r15, r16, r17 ; lw r25, r26 ; seq r5, r6, r7 } + { nor r15, r16, r17 ; lw r25, r26 ; xor r5, r6, r7 } + { nor r15, r16, r17 ; mnz r5, r6, r7 } + { nor r15, r16, r17 ; movei r5, 5 ; sh r25, r26 } + { nor r15, r16, r17 ; mulhh_uu r5, r6, r7 ; lw r25, r26 } + { nor r15, r16, r17 ; mulhha_uu r5, r6, r7 ; lh_u r25, r26 } + { nor r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; lw r25, r26 } + { nor r15, r16, r17 ; mulll_uu r5, r6, r7 ; lh_u r25, r26 } + { nor r15, r16, r17 ; mullla_uu r5, r6, r7 ; lh r25, r26 } + { nor r15, r16, r17 ; mvz r5, r6, r7 ; lb_u r25, r26 } + { nor r15, r16, r17 ; mzh r5, r6, r7 } + { nor r15, r16, r17 ; nor r5, r6, r7 } + { nor r15, r16, r17 ; ori r5, r6, 5 } + { nor r15, r16, r17 ; prefetch r25 ; bytex r5, r6 } + { nor r15, r16, r17 ; prefetch r25 ; nop } + { nor r15, r16, r17 ; prefetch r25 ; slti r5, r6, 5 } + { nor r15, r16, r17 ; rl r5, r6, r7 ; sw r25, r26 } + { nor r15, r16, r17 ; s1a r5, r6, r7 ; sw r25, r26 } + { nor r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 } + { nor r15, r16, r17 ; sb r25, r26 ; movei r5, 5 } + { nor r15, r16, r17 ; sb r25, r26 ; s1a r5, r6, r7 } + { nor r15, r16, r17 ; sb r25, r26 ; tblidxb1 r5, r6 } + { nor r15, r16, r17 ; seqi r5, r6, 5 ; lh_u r25, r26 } + { nor r15, r16, r17 ; sh r25, r26 ; move r5, r6 } + { nor r15, r16, r17 ; sh r25, r26 ; rli r5, r6, 5 } + { nor r15, r16, r17 ; sh r25, r26 ; tblidxb0 r5, r6 } + { nor r15, r16, r17 ; shli r5, r6, 5 ; lh r25, r26 } + { nor r15, r16, r17 ; shrb r5, r6, r7 } + { nor r15, r16, r17 ; slt r5, r6, r7 ; sb r25, r26 } + { nor r15, r16, r17 ; slte r5, r6, r7 ; lw r25, r26 } + { nor r15, r16, r17 ; slth r5, r6, r7 } + { nor r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 } + { nor r15, r16, r17 ; sra r5, r6, r7 ; lh r25, r26 } + { nor r15, r16, r17 ; sraib r5, r6, 5 } + { nor r15, r16, r17 ; sw r25, r26 ; andi r5, r6, 5 } + { nor r15, r16, r17 ; sw r25, r26 ; mvz r5, r6, r7 } + { nor r15, r16, r17 ; sw r25, r26 ; slte r5, r6, r7 } + { nor r15, r16, r17 ; tblidxb0 r5, r6 ; sb r25, r26 } + { nor r15, r16, r17 ; tblidxb2 r5, r6 ; sb r25, r26 } + { nor r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 } + { nor r5, r6, r7 ; addi r15, r16, 5 ; lb_u r25, r26 } + { nor r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 } + { nor r5, r6, r7 ; fnop ; lh r25, r26 } + { nor r5, r6, r7 ; info 19 ; lb_u r25, r26 } + { nor r5, r6, r7 ; lb r15, r16 } + { nor r5, r6, r7 ; lb r25, r26 ; s3a r15, r16, r17 } + { nor r5, r6, r7 ; lb_u r25, r26 ; add r15, r16, r17 } + { nor r5, r6, r7 ; lb_u r25, r26 ; seq r15, r16, r17 } + { nor r5, r6, r7 ; lh r15, r16 } + { nor r5, r6, r7 ; lh r25, r26 ; s3a r15, r16, r17 } + { nor r5, r6, r7 ; lh_u r25, r26 ; add r15, r16, r17 } + { nor r5, r6, r7 ; lh_u r25, r26 ; seq r15, r16, r17 } + { nor r5, r6, r7 ; lnk r15 } + { nor r5, r6, r7 ; lw r25, r26 ; s2a r15, r16, r17 } + { nor r5, r6, r7 ; lw_na r15, r16 } + { nor r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 } + { nor r5, r6, r7 ; movei r15, 5 ; lw r25, r26 } + { nor r5, r6, r7 ; mzh r15, r16, r17 } + { nor r5, r6, r7 ; nor r15, r16, r17 } + { nor r5, r6, r7 ; ori r15, r16, 5 } + { nor r5, r6, r7 ; prefetch r25 ; ori r15, r16, 5 } + { nor r5, r6, r7 ; prefetch r25 ; srai r15, r16, 5 } + { nor r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 } + { nor r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 } + { nor r5, r6, r7 ; sb r25, r26 ; fnop } + { nor r5, r6, r7 ; sb r25, r26 ; shr r15, r16, r17 } + { nor r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 } + { nor r5, r6, r7 ; sh r25, r26 ; add r15, r16, r17 } + { nor r5, r6, r7 ; sh r25, r26 ; seq r15, r16, r17 } + { nor r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 } + { nor r5, r6, r7 ; shli r15, r16, 5 } + { nor r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 } + { nor r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 } + { nor r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 } + { nor r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 } + { nor r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 } + { nor r5, r6, r7 ; sra r15, r16, r17 } + { nor r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } + { nor r5, r6, r7 ; sw r25, r26 ; movei r15, 5 } + { nor r5, r6, r7 ; sw r25, r26 ; slte_u r15, r16, r17 } + { nor r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 } + { or r15, r16, r17 ; addi r5, r6, 5 ; lh_u r25, r26 } + { or r15, r16, r17 ; and r5, r6, r7 ; sb r25, r26 } + { or r15, r16, r17 ; bitx r5, r6 ; lh_u r25, r26 } + { or r15, r16, r17 ; clz r5, r6 ; lh_u r25, r26 } + { or r15, r16, r17 ; fnop ; lb r25, r26 } + { or r15, r16, r17 ; infol 0x1234 } + { or r15, r16, r17 ; lb r25, r26 ; mulhha_ss r5, r6, r7 } + { or r15, r16, r17 ; lb r25, r26 ; seq r5, r6, r7 } + { or r15, r16, r17 ; lb r25, r26 ; xor r5, r6, r7 } + { or r15, r16, r17 ; lb_u r25, r26 ; mulll_ss r5, r6, r7 } + { or r15, r16, r17 ; lb_u r25, r26 ; shli r5, r6, 5 } + { or r15, r16, r17 ; lh r25, r26 ; addi r5, r6, 5 } + { or r15, r16, r17 ; lh r25, r26 ; mullla_uu r5, r6, r7 } + { or r15, r16, r17 ; lh r25, r26 ; slt r5, r6, r7 } + { or r15, r16, r17 ; lh_u r25, r26 ; bitx r5, r6 } + { or r15, r16, r17 ; lh_u r25, r26 ; mz r5, r6, r7 } + { or r15, r16, r17 ; lh_u r25, r26 ; slte_u r5, r6, r7 } + { or r15, r16, r17 ; lw r25, r26 ; ctz r5, r6 } + { or r15, r16, r17 ; lw r25, r26 ; or r5, r6, r7 } + { or r15, r16, r17 ; lw r25, r26 ; sne r5, r6, r7 } + { or r15, r16, r17 ; mnz r5, r6, r7 ; lb_u r25, r26 } + { or r15, r16, r17 ; move r5, r6 } + { or r15, r16, r17 ; mulhh_ss r5, r6, r7 ; sh r25, r26 } + { or r15, r16, r17 ; mulhha_ss r5, r6, r7 ; sb r25, r26 } + { or r15, r16, r17 ; mulhla_ss r5, r6, r7 } + { or r15, r16, r17 ; mulll_ss r5, r6, r7 ; sb r25, r26 } + { or r15, r16, r17 ; mullla_ss r5, r6, r7 ; prefetch r25 } + { or r15, r16, r17 ; mvnz r5, r6, r7 ; lh_u r25, r26 } + { or r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 } + { or r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 } + { or r15, r16, r17 ; ori r5, r6, 5 ; lb_u r25, r26 } + { or r15, r16, r17 ; pcnt r5, r6 ; sh r25, r26 } + { or r15, r16, r17 ; prefetch r25 ; mulhlsa_uu r5, r6, r7 } + { or r15, r16, r17 ; prefetch r25 ; shl r5, r6, r7 } + { or r15, r16, r17 ; rl r5, r6, r7 ; lb r25, r26 } + { or r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 } + { or r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 } + { or r15, r16, r17 ; sb r25, r26 ; bitx r5, r6 } + { or r15, r16, r17 ; sb r25, r26 ; mz r5, r6, r7 } + { or r15, r16, r17 ; sb r25, r26 ; slte_u r5, r6, r7 } + { or r15, r16, r17 ; seq r5, r6, r7 ; sh r25, r26 } + { or r15, r16, r17 ; sh r25, r26 ; andi r5, r6, 5 } + { or r15, r16, r17 ; sh r25, r26 ; mvz r5, r6, r7 } + { or r15, r16, r17 ; sh r25, r26 ; slte r5, r6, r7 } + { or r15, r16, r17 ; shl r5, r6, r7 ; sb r25, r26 } + { or r15, r16, r17 ; shr r5, r6, r7 ; lh r25, r26 } + { or r15, r16, r17 ; shrib r5, r6, 5 } + { or r15, r16, r17 ; slt_u r5, r6, r7 ; sw r25, r26 } + { or r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 } + { or r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 } + { or r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 } + { or r15, r16, r17 ; srai r5, r6, 5 ; lh r25, r26 } + { or r15, r16, r17 ; subb r5, r6, r7 } + { or r15, r16, r17 ; sw r25, r26 ; mulhha_ss r5, r6, r7 } + { or r15, r16, r17 ; sw r25, r26 ; seq r5, r6, r7 } + { or r15, r16, r17 ; sw r25, r26 ; xor r5, r6, r7 } + { or r15, r16, r17 ; tblidxb1 r5, r6 ; sw r25, r26 } + { or r15, r16, r17 ; tblidxb3 r5, r6 ; sw r25, r26 } + { or r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 } + { or r5, r6, r7 ; addlis r15, r16, 0x1234 } + { or r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 } + { or r5, r6, r7 ; ill ; lh_u r25, r26 } + { or r5, r6, r7 ; intlb r15, r16, r17 } + { or r5, r6, r7 ; lb r25, r26 ; nop } + { or r5, r6, r7 ; lb r25, r26 ; slti_u r15, r16, 5 } + { or r5, r6, r7 ; lb_u r25, r26 ; nor r15, r16, r17 } + { or r5, r6, r7 ; lb_u r25, r26 ; sne r15, r16, r17 } + { or r5, r6, r7 ; lh r25, r26 ; nop } + { or r5, r6, r7 ; lh r25, r26 ; slti_u r15, r16, 5 } + { or r5, r6, r7 ; lh_u r25, r26 ; nor r15, r16, r17 } + { or r5, r6, r7 ; lh_u r25, r26 ; sne r15, r16, r17 } + { or r5, r6, r7 ; lw r25, r26 ; mz r15, r16, r17 } + { or r5, r6, r7 ; lw r25, r26 ; slti r15, r16, 5 } + { or r5, r6, r7 ; minih r15, r16, 5 } + { or r5, r6, r7 ; move r15, r16 ; sb r25, r26 } + { or r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 } + { or r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 } + { or r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 } + { or r5, r6, r7 ; prefetch r25 ; info 19 } + { or r5, r6, r7 ; prefetch r25 ; slt r15, r16, r17 } + { or r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 } + { or r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 } + { or r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 } + { or r5, r6, r7 ; sb r25, r26 ; rli r15, r16, 5 } + { or r5, r6, r7 ; sb r25, r26 ; xor r15, r16, r17 } + { or r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 } + { or r5, r6, r7 ; sh r25, r26 ; nor r15, r16, r17 } + { or r5, r6, r7 ; sh r25, r26 ; sne r15, r16, r17 } + { or r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 } + { or r5, r6, r7 ; shr r15, r16, r17 } + { or r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 } + { or r5, r6, r7 ; slte r15, r16, r17 ; lh_u r25, r26 } + { or r5, r6, r7 ; slteh_u r15, r16, r17 } + { or r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 } + { or r5, r6, r7 ; sra r15, r16, r17 ; lb_u r25, r26 } + { or r5, r6, r7 ; srai r15, r16, 5 } + { or r5, r6, r7 ; sw r25, r26 ; addi r15, r16, 5 } + { or r5, r6, r7 ; sw r25, r26 ; seqi r15, r16, 5 } + { or r5, r6, r7 ; xor r15, r16, r17 ; lb r25, r26 } + { ori r15, r16, 5 ; add r5, r6, r7 } + { ori r15, r16, 5 ; adiffb_u r5, r6, r7 } + { ori r15, r16, 5 ; andi r5, r6, 5 ; sw r25, r26 } + { ori r15, r16, 5 ; bytex r5, r6 ; prefetch r25 } + { ori r15, r16, 5 ; ctz r5, r6 ; lh_u r25, r26 } + { ori r15, r16, 5 ; info 19 ; lh r25, r26 } + { ori r15, r16, 5 ; lb r25, r26 ; ctz r5, r6 } + { ori r15, r16, 5 ; lb r25, r26 ; or r5, r6, r7 } + { ori r15, r16, 5 ; lb r25, r26 ; sne r5, r6, r7 } + { ori r15, r16, 5 ; lb_u r25, r26 ; mnz r5, r6, r7 } + { ori r15, r16, 5 ; lb_u r25, r26 ; rl r5, r6, r7 } + { ori r15, r16, 5 ; lb_u r25, r26 ; sub r5, r6, r7 } + { ori r15, r16, 5 ; lh r25, r26 ; mulhh_ss r5, r6, r7 } + { ori r15, r16, 5 ; lh r25, r26 ; s2a r5, r6, r7 } + { ori r15, r16, 5 ; lh r25, r26 ; tblidxb2 r5, r6 } + { ori r15, r16, 5 ; lh_u r25, r26 ; mulhha_uu r5, r6, r7 } + { ori r15, r16, 5 ; lh_u r25, r26 ; seqi r5, r6, 5 } + { ori r15, r16, 5 ; lh_u r25, r26 } + { ori r15, r16, 5 ; lw r25, r26 ; mulll_uu r5, r6, r7 } + { ori r15, r16, 5 ; lw r25, r26 ; shr r5, r6, r7 } + { ori r15, r16, 5 ; maxib_u r5, r6, 5 } + { ori r15, r16, 5 ; move r5, r6 ; lb_u r25, r26 } + { ori r15, r16, 5 ; movelis r5, 0x1234 } + { ori r15, r16, 5 ; mulhh_uu r5, r6, r7 ; sw r25, r26 } + { ori r15, r16, 5 ; mulhha_uu r5, r6, r7 ; sh r25, r26 } + { ori r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; sw r25, r26 } + { ori r15, r16, 5 ; mulll_uu r5, r6, r7 ; sh r25, r26 } + { ori r15, r16, 5 ; mullla_uu r5, r6, r7 ; sb r25, r26 } + { ori r15, r16, 5 ; mvz r5, r6, r7 ; prefetch r25 } + { ori r15, r16, 5 ; nop ; lh_u r25, r26 } + { ori r15, r16, 5 ; or r5, r6, r7 ; lh_u r25, r26 } + { ori r15, r16, 5 ; packlb r5, r6, r7 } + { ori r15, r16, 5 ; prefetch r25 ; info 19 } + { ori r15, r16, 5 ; prefetch r25 ; pcnt r5, r6 } + { ori r15, r16, 5 ; prefetch r25 ; srai r5, r6, 5 } + { ori r15, r16, 5 ; rli r5, r6, 5 ; lh r25, r26 } + { ori r15, r16, 5 ; s2a r5, r6, r7 ; lh r25, r26 } + { ori r15, r16, 5 ; sadah_u r5, r6, r7 } + { ori r15, r16, 5 ; sb r25, r26 ; mulhha_uu r5, r6, r7 } + { ori r15, r16, 5 ; sb r25, r26 ; seqi r5, r6, 5 } + { ori r15, r16, 5 ; sb r25, r26 } + { ori r15, r16, 5 ; seqi r5, r6, 5 ; sh r25, r26 } + { ori r15, r16, 5 ; sh r25, r26 ; mulhha_ss r5, r6, r7 } + { ori r15, r16, 5 ; sh r25, r26 ; seq r5, r6, r7 } + { ori r15, r16, 5 ; sh r25, r26 ; xor r5, r6, r7 } + { ori r15, r16, 5 ; shli r5, r6, 5 ; sb r25, r26 } + { ori r15, r16, 5 ; shri r5, r6, 5 ; lh r25, r26 } + { ori r15, r16, 5 ; slt_u r5, r6, r7 ; lb r25, r26 } + { ori r15, r16, 5 ; slte r5, r6, r7 ; sw r25, r26 } + { ori r15, r16, 5 ; slti r5, r6, 5 ; lh r25, r26 } + { ori r15, r16, 5 ; sltih r5, r6, 5 } + { ori r15, r16, 5 ; sra r5, r6, r7 ; sb r25, r26 } + { ori r15, r16, 5 ; sub r5, r6, r7 ; lh r25, r26 } + { ori r15, r16, 5 ; sw r25, r26 ; ctz r5, r6 } + { ori r15, r16, 5 ; sw r25, r26 ; or r5, r6, r7 } + { ori r15, r16, 5 ; sw r25, r26 ; sne r5, r6, r7 } + { ori r15, r16, 5 ; tblidxb1 r5, r6 ; lb r25, r26 } + { ori r15, r16, 5 ; tblidxb3 r5, r6 ; lb r25, r26 } + { ori r15, r16, 5 ; xori r5, r6, 5 } + { ori r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 } + { ori r5, r6, 5 ; andi r15, r16, 5 ; lb r25, r26 } + { ori r5, r6, 5 ; fnop ; sb r25, r26 } + { ori r5, r6, 5 ; info 19 ; prefetch r25 } + { ori r5, r6, 5 ; lb r25, r26 ; andi r15, r16, 5 } + { ori r5, r6, 5 ; lb r25, r26 ; shli r15, r16, 5 } + { ori r5, r6, 5 ; lb_u r25, r26 ; fnop } + { ori r5, r6, 5 ; lb_u r25, r26 ; shr r15, r16, r17 } + { ori r5, r6, 5 ; lh r25, r26 ; andi r15, r16, 5 } + { ori r5, r6, 5 ; lh r25, r26 ; shli r15, r16, 5 } + { ori r5, r6, 5 ; lh_u r25, r26 ; fnop } + { ori r5, r6, 5 ; lh_u r25, r26 ; shr r15, r16, r17 } + { ori r5, r6, 5 ; lw r25, r26 ; and r15, r16, r17 } + { ori r5, r6, 5 ; lw r25, r26 ; shl r15, r16, r17 } + { ori r5, r6, 5 ; maxh r15, r16, r17 } + { ori r5, r6, 5 ; mnzb r15, r16, r17 } + { ori r5, r6, 5 ; movei r15, 5 ; sw r25, r26 } + { ori r5, r6, 5 ; nop ; lh_u r25, r26 } + { ori r5, r6, 5 ; or r15, r16, r17 ; lh_u r25, r26 } + { ori r5, r6, 5 ; packlb r15, r16, r17 } + { ori r5, r6, 5 ; prefetch r25 ; s2a r15, r16, r17 } + { ori r5, r6, 5 ; raise } + { ori r5, r6, 5 ; rli r15, r16, 5 } + { ori r5, r6, 5 ; s2a r15, r16, r17 } + { ori r5, r6, 5 ; sb r25, r26 ; move r15, r16 } + { ori r5, r6, 5 ; sb r25, r26 ; slte r15, r16, r17 } + { ori r5, r6, 5 ; seq r15, r16, r17 } + { ori r5, r6, 5 ; sh r25, r26 ; fnop } + { ori r5, r6, 5 ; sh r25, r26 ; shr r15, r16, r17 } + { ori r5, r6, 5 ; shl r15, r16, r17 ; prefetch r25 } + { ori r5, r6, 5 ; shr r15, r16, r17 ; lb_u r25, r26 } + { ori r5, r6, 5 ; shri r15, r16, 5 } + { ori r5, r6, 5 ; slt_u r15, r16, r17 ; sh r25, r26 } + { ori r5, r6, 5 ; slte_u r15, r16, r17 ; prefetch r25 } + { ori r5, r6, 5 ; slti r15, r16, 5 } + { ori r5, r6, 5 ; sne r15, r16, r17 ; prefetch r25 } + { ori r5, r6, 5 ; srai r15, r16, 5 ; lb_u r25, r26 } + { ori r5, r6, 5 ; sub r15, r16, r17 } + { ori r5, r6, 5 ; sw r25, r26 ; or r15, r16, r17 } + { ori r5, r6, 5 ; sw r25, r26 ; sra r15, r16, r17 } + { packbs_u r15, r16, r17 ; addb r5, r6, r7 } + { packbs_u r15, r16, r17 ; crc32_32 r5, r6, r7 } + { packbs_u r15, r16, r17 ; mnz r5, r6, r7 } + { packbs_u r15, r16, r17 ; mulhla_us r5, r6, r7 } + { packbs_u r15, r16, r17 ; packhb r5, r6, r7 } + { packbs_u r15, r16, r17 ; seqih r5, r6, 5 } + { packbs_u r15, r16, r17 ; slteb_u r5, r6, r7 } + { packbs_u r15, r16, r17 ; sub r5, r6, r7 } + { packbs_u r5, r6, r7 ; addli r15, r16, 0x1234 } + { packbs_u r5, r6, r7 ; jalr r15 } + { packbs_u r5, r6, r7 ; maxih r15, r16, 5 } + { packbs_u r5, r6, r7 ; nor r15, r16, r17 } + { packbs_u r5, r6, r7 ; seqib r15, r16, 5 } + { packbs_u r5, r6, r7 ; slte r15, r16, r17 } + { packbs_u r5, r6, r7 ; srai r15, r16, 5 } + { packhb r15, r16, r17 ; addi r5, r6, 5 } + { packhb r15, r16, r17 ; fnop } + { packhb r15, r16, r17 ; movei r5, 5 } + { packhb r15, r16, r17 ; mulll_su r5, r6, r7 } + { packhb r15, r16, r17 ; rl r5, r6, r7 } + { packhb r15, r16, r17 ; shli r5, r6, 5 } + { packhb r15, r16, r17 ; slth_u r5, r6, r7 } + { packhb r15, r16, r17 ; subhs r5, r6, r7 } + { packhb r5, r6, r7 ; andi r15, r16, 5 } + { packhb r5, r6, r7 ; lb r15, r16 } + { packhb r5, r6, r7 ; minh r15, r16, r17 } + { packhb r5, r6, r7 ; packhb r15, r16, r17 } + { packhb r5, r6, r7 ; shl r15, r16, r17 } + { packhb r5, r6, r7 ; slteh r15, r16, r17 } + { packhb r5, r6, r7 ; subb r15, r16, r17 } + { packhs r15, r16, r17 ; addlis r5, r6, 0x1234 } + { packhs r15, r16, r17 ; inthh r5, r6, r7 } + { packhs r15, r16, r17 ; mulhh_su r5, r6, r7 } + { packhs r15, r16, r17 ; mullla_uu r5, r6, r7 } + { packhs r15, r16, r17 ; s3a r5, r6, r7 } + { packhs r15, r16, r17 ; shrb r5, r6, r7 } + { packhs r15, r16, r17 ; sltib_u r5, r6, 5 } + { packhs r15, r16, r17 ; tblidxb2 r5, r6 } + { packhs r5, r6, r7 ; flush r15 } + { packhs r5, r6, r7 ; lh r15, r16 } + { packhs r5, r6, r7 ; mnz r15, r16, r17 } + { packhs r5, r6, r7 ; raise } + { packhs r5, r6, r7 ; shlib r15, r16, 5 } + { packhs r5, r6, r7 ; slti r15, r16, 5 } + { packhs r5, r6, r7 ; subs r15, r16, r17 } + { packlb r15, r16, r17 ; and r5, r6, r7 } + { packlb r15, r16, r17 ; maxh r5, r6, r7 } + { packlb r15, r16, r17 ; mulhha_uu r5, r6, r7 } + { packlb r15, r16, r17 ; mz r5, r6, r7 } + { packlb r15, r16, r17 ; sadb_u r5, r6, r7 } + { packlb r15, r16, r17 ; shrih r5, r6, 5 } + { packlb r15, r16, r17 ; sneb r5, r6, r7 } + { packlb r5, r6, r7 ; add r15, r16, r17 } + { packlb r5, r6, r7 ; info 19 } + { packlb r5, r6, r7 ; lnk r15 } + { packlb r5, r6, r7 ; movei r15, 5 } + { packlb r5, r6, r7 ; s2a r15, r16, r17 } + { packlb r5, r6, r7 ; shrh r15, r16, r17 } + { packlb r5, r6, r7 ; sltih r15, r16, 5 } + { packlb r5, r6, r7 ; wh64 r15 } + { pcnt r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 } + { pcnt r5, r6 ; and r15, r16, r17 ; sw r25, r26 } + { pcnt r5, r6 ; fnop ; lw r25, r26 } + { pcnt r5, r6 ; info 19 ; lh_u r25, r26 } + { pcnt r5, r6 ; lb r25, r26 ; addi r15, r16, 5 } + { pcnt r5, r6 ; lb r25, r26 ; seqi r15, r16, 5 } + { pcnt r5, r6 ; lb_u r25, r26 ; and r15, r16, r17 } + { pcnt r5, r6 ; lb_u r25, r26 ; shl r15, r16, r17 } + { pcnt r5, r6 ; lh r25, r26 ; addi r15, r16, 5 } + { pcnt r5, r6 ; lh r25, r26 ; seqi r15, r16, 5 } + { pcnt r5, r6 ; lh_u r25, r26 ; and r15, r16, r17 } + { pcnt r5, r6 ; lh_u r25, r26 ; shl r15, r16, r17 } + { pcnt r5, r6 ; lw r25, r26 ; add r15, r16, r17 } + { pcnt r5, r6 ; lw r25, r26 ; seq r15, r16, r17 } + { pcnt r5, r6 ; lwadd_na r15, r16, 5 } + { pcnt r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 } + { pcnt r5, r6 ; movei r15, 5 ; sb r25, r26 } + { pcnt r5, r6 ; nop ; lb_u r25, r26 } + { pcnt r5, r6 ; or r15, r16, r17 ; lb_u r25, r26 } + { pcnt r5, r6 ; packhb r15, r16, r17 } + { pcnt r5, r6 ; prefetch r25 ; rli r15, r16, 5 } + { pcnt r5, r6 ; prefetch r25 ; xor r15, r16, r17 } + { pcnt r5, r6 ; rli r15, r16, 5 ; sh r25, r26 } + { pcnt r5, r6 ; s2a r15, r16, r17 ; sh r25, r26 } + { pcnt r5, r6 ; sb r25, r26 ; info 19 } + { pcnt r5, r6 ; sb r25, r26 ; slt r15, r16, r17 } + { pcnt r5, r6 ; seq r15, r16, r17 ; sh r25, r26 } + { pcnt r5, r6 ; sh r25, r26 ; and r15, r16, r17 } + { pcnt r5, r6 ; sh r25, r26 ; shl r15, r16, r17 } + { pcnt r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 } + { pcnt r5, r6 ; shlih r15, r16, 5 } + { pcnt r5, r6 ; shri r15, r16, 5 ; sh r25, r26 } + { pcnt r5, r6 ; slt_u r15, r16, r17 ; prefetch r25 } + { pcnt r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + { pcnt r5, r6 ; slti r15, r16, 5 ; sh r25, r26 } + { pcnt r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 } + { pcnt r5, r6 ; srah r15, r16, r17 } + { pcnt r5, r6 ; sub r15, r16, r17 ; sh r25, r26 } + { pcnt r5, r6 ; sw r25, r26 ; nop } + { pcnt r5, r6 ; sw r25, r26 ; slti_u r15, r16, 5 } + { pcnt r5, r6 ; xori r15, r16, 5 } + { prefetch r15 ; bytex r5, r6 } + { prefetch r15 ; minih r5, r6, 5 } + { prefetch r15 ; mulhla_ss r5, r6, r7 } + { prefetch r15 ; ori r5, r6, 5 } + { prefetch r15 ; seqi r5, r6, 5 } + { prefetch r15 ; slte_u r5, r6, r7 } + { prefetch r15 ; sraib r5, r6, 5 } + { prefetch r25 ; add r15, r16, r17 ; clz r5, r6 } + { prefetch r25 ; add r15, r16, r17 ; nor r5, r6, r7 } + { prefetch r25 ; add r15, r16, r17 ; slti_u r5, r6, 5 } + { prefetch r25 ; add r5, r6, r7 ; movei r15, 5 } + { prefetch r25 ; add r5, r6, r7 ; slte_u r15, r16, r17 } + { prefetch r25 ; addi r15, r16, 5 ; move r5, r6 } + { prefetch r25 ; addi r15, r16, 5 ; rli r5, r6, 5 } + { prefetch r25 ; addi r15, r16, 5 ; tblidxb0 r5, r6 } + { prefetch r25 ; addi r5, r6, 5 ; ori r15, r16, 5 } + { prefetch r25 ; addi r5, r6, 5 ; srai r15, r16, 5 } + { prefetch r25 ; and r15, r16, r17 ; mulhha_uu r5, r6, r7 } + { prefetch r25 ; and r15, r16, r17 ; seqi r5, r6, 5 } + { prefetch r25 ; and r15, r16, r17 } + { prefetch r25 ; and r5, r6, r7 ; s3a r15, r16, r17 } + { prefetch r25 ; andi r15, r16, 5 ; addi r5, r6, 5 } + { prefetch r25 ; andi r15, r16, 5 ; mullla_uu r5, r6, r7 } + { prefetch r25 ; andi r15, r16, 5 ; slt r5, r6, r7 } + { prefetch r25 ; andi r5, r6, 5 ; fnop } + { prefetch r25 ; andi r5, r6, 5 ; shr r15, r16, r17 } + { prefetch r25 ; bitx r5, r6 ; info 19 } + { prefetch r25 ; bitx r5, r6 ; slt r15, r16, r17 } + { prefetch r25 ; bytex r5, r6 ; move r15, r16 } + { prefetch r25 ; bytex r5, r6 ; slte r15, r16, r17 } + { prefetch r25 ; clz r5, r6 ; mz r15, r16, r17 } + { prefetch r25 ; clz r5, r6 ; slti r15, r16, 5 } + { prefetch r25 ; ctz r5, r6 ; nor r15, r16, r17 } + { prefetch r25 ; ctz r5, r6 ; sne r15, r16, r17 } + { prefetch r25 ; fnop ; info 19 } + { prefetch r25 ; fnop ; nop } + { prefetch r25 ; fnop ; seqi r15, r16, 5 } + { prefetch r25 ; fnop ; slti_u r15, r16, 5 } + { prefetch r25 ; ill ; andi r5, r6, 5 } + { prefetch r25 ; ill ; mvz r5, r6, r7 } + { prefetch r25 ; ill ; slte r5, r6, r7 } + { prefetch r25 ; info 19 ; andi r15, r16, 5 } + { prefetch r25 ; info 19 ; mulll_ss r5, r6, r7 } + { prefetch r25 ; info 19 ; s1a r15, r16, r17 } + { prefetch r25 ; info 19 ; slt_u r15, r16, r17 } + { prefetch r25 ; info 19 ; tblidxb2 r5, r6 } + { prefetch r25 ; mnz r15, r16, r17 ; mulhha_ss r5, r6, r7 } + { prefetch r25 ; mnz r15, r16, r17 ; seq r5, r6, r7 } + { prefetch r25 ; mnz r15, r16, r17 ; xor r5, r6, r7 } + { prefetch r25 ; mnz r5, r6, r7 ; s2a r15, r16, r17 } + { prefetch r25 ; move r15, r16 ; add r5, r6, r7 } + { prefetch r25 ; move r15, r16 ; mullla_ss r5, r6, r7 } + { prefetch r25 ; move r15, r16 ; shri r5, r6, 5 } + { prefetch r25 ; move r5, r6 ; andi r15, r16, 5 } + { prefetch r25 ; move r5, r6 ; shli r15, r16, 5 } + { prefetch r25 ; movei r15, 5 ; bytex r5, r6 } + { prefetch r25 ; movei r15, 5 ; nop } + { prefetch r25 ; movei r15, 5 ; slti r5, r6, 5 } + { prefetch r25 ; movei r5, 5 ; move r15, r16 } + { prefetch r25 ; movei r5, 5 ; slte r15, r16, r17 } + { prefetch r25 ; mulhh_ss r5, r6, r7 ; mz r15, r16, r17 } + { prefetch r25 ; mulhh_ss r5, r6, r7 ; slti r15, r16, 5 } + { prefetch r25 ; mulhh_uu r5, r6, r7 ; nor r15, r16, r17 } + { prefetch r25 ; mulhh_uu r5, r6, r7 ; sne r15, r16, r17 } + { prefetch r25 ; mulhha_ss r5, r6, r7 ; ori r15, r16, 5 } + { prefetch r25 ; mulhha_ss r5, r6, r7 ; srai r15, r16, 5 } + { prefetch r25 ; mulhha_uu r5, r6, r7 ; rli r15, r16, 5 } + { prefetch r25 ; mulhha_uu r5, r6, r7 ; xor r15, r16, r17 } + { prefetch r25 ; mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 } + { prefetch r25 ; mulll_ss r5, r6, r7 ; add r15, r16, r17 } + { prefetch r25 ; mulll_ss r5, r6, r7 ; seq r15, r16, r17 } + { prefetch r25 ; mulll_uu r5, r6, r7 ; and r15, r16, r17 } + { prefetch r25 ; mulll_uu r5, r6, r7 ; shl r15, r16, r17 } + { prefetch r25 ; mullla_ss r5, r6, r7 ; fnop } + { prefetch r25 ; mullla_ss r5, r6, r7 ; shr r15, r16, r17 } + { prefetch r25 ; mullla_uu r5, r6, r7 ; info 19 } + { prefetch r25 ; mullla_uu r5, r6, r7 ; slt r15, r16, r17 } + { prefetch r25 ; mvnz r5, r6, r7 ; move r15, r16 } + { prefetch r25 ; mvnz r5, r6, r7 ; slte r15, r16, r17 } + { prefetch r25 ; mvz r5, r6, r7 ; mz r15, r16, r17 } + { prefetch r25 ; mvz r5, r6, r7 ; slti r15, r16, 5 } + { prefetch r25 ; mz r15, r16, r17 ; movei r5, 5 } + { prefetch r25 ; mz r15, r16, r17 ; s1a r5, r6, r7 } + { prefetch r25 ; mz r15, r16, r17 ; tblidxb1 r5, r6 } + { prefetch r25 ; mz r5, r6, r7 ; rl r15, r16, r17 } + { prefetch r25 ; mz r5, r6, r7 ; sub r15, r16, r17 } + { prefetch r25 ; nop ; move r15, r16 } + { prefetch r25 ; nop ; or r15, r16, r17 } + { prefetch r25 ; nop ; shl r5, r6, r7 } + { prefetch r25 ; nop ; sne r5, r6, r7 } + { prefetch r25 ; nor r15, r16, r17 ; clz r5, r6 } + { prefetch r25 ; nor r15, r16, r17 ; nor r5, r6, r7 } + { prefetch r25 ; nor r15, r16, r17 ; slti_u r5, r6, 5 } + { prefetch r25 ; nor r5, r6, r7 ; movei r15, 5 } + { prefetch r25 ; nor r5, r6, r7 ; slte_u r15, r16, r17 } + { prefetch r25 ; or r15, r16, r17 ; move r5, r6 } + { prefetch r25 ; or r15, r16, r17 ; rli r5, r6, 5 } + { prefetch r25 ; or r15, r16, r17 ; tblidxb0 r5, r6 } + { prefetch r25 ; or r5, r6, r7 ; ori r15, r16, 5 } + { prefetch r25 ; or r5, r6, r7 ; srai r15, r16, 5 } + { prefetch r25 ; ori r15, r16, 5 ; mulhha_uu r5, r6, r7 } + { prefetch r25 ; ori r15, r16, 5 ; seqi r5, r6, 5 } + { prefetch r25 ; ori r15, r16, 5 } + { prefetch r25 ; ori r5, r6, 5 ; s3a r15, r16, r17 } + { prefetch r25 ; pcnt r5, r6 ; addi r15, r16, 5 } + { prefetch r25 ; pcnt r5, r6 ; seqi r15, r16, 5 } + { prefetch r25 ; rl r15, r16, r17 ; andi r5, r6, 5 } + { prefetch r25 ; rl r15, r16, r17 ; mvz r5, r6, r7 } + { prefetch r25 ; rl r15, r16, r17 ; slte r5, r6, r7 } + { prefetch r25 ; rl r5, r6, r7 ; info 19 } + { prefetch r25 ; rl r5, r6, r7 ; slt r15, r16, r17 } + { prefetch r25 ; rli r15, r16, 5 ; fnop } + { prefetch r25 ; rli r15, r16, 5 ; ori r5, r6, 5 } + { prefetch r25 ; rli r15, r16, 5 ; sra r5, r6, r7 } + { prefetch r25 ; rli r5, r6, 5 ; nop } + { prefetch r25 ; rli r5, r6, 5 ; slti_u r15, r16, 5 } + { prefetch r25 ; s1a r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { prefetch r25 ; s1a r15, r16, r17 ; s2a r5, r6, r7 } + { prefetch r25 ; s1a r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch r25 ; s1a r5, r6, r7 ; rli r15, r16, 5 } + { prefetch r25 ; s1a r5, r6, r7 ; xor r15, r16, r17 } + { prefetch r25 ; s2a r15, r16, r17 ; mulll_ss r5, r6, r7 } + { prefetch r25 ; s2a r15, r16, r17 ; shli r5, r6, 5 } + { prefetch r25 ; s2a r5, r6, r7 ; addi r15, r16, 5 } + { prefetch r25 ; s2a r5, r6, r7 ; seqi r15, r16, 5 } + { prefetch r25 ; s3a r15, r16, r17 ; andi r5, r6, 5 } + { prefetch r25 ; s3a r15, r16, r17 ; mvz r5, r6, r7 } + { prefetch r25 ; s3a r15, r16, r17 ; slte r5, r6, r7 } + { prefetch r25 ; s3a r5, r6, r7 ; info 19 } + { prefetch r25 ; s3a r5, r6, r7 ; slt r15, r16, r17 } + { prefetch r25 ; seq r15, r16, r17 ; fnop } + { prefetch r25 ; seq r15, r16, r17 ; ori r5, r6, 5 } + { prefetch r25 ; seq r15, r16, r17 ; sra r5, r6, r7 } + { prefetch r25 ; seq r5, r6, r7 ; nop } + { prefetch r25 ; seq r5, r6, r7 ; slti_u r15, r16, 5 } + { prefetch r25 ; seqi r15, r16, 5 ; mulhh_ss r5, r6, r7 } + { prefetch r25 ; seqi r15, r16, 5 ; s2a r5, r6, r7 } + { prefetch r25 ; seqi r15, r16, 5 ; tblidxb2 r5, r6 } + { prefetch r25 ; seqi r5, r6, 5 ; rli r15, r16, 5 } + { prefetch r25 ; seqi r5, r6, 5 ; xor r15, r16, r17 } + { prefetch r25 ; shl r15, r16, r17 ; mulll_ss r5, r6, r7 } + { prefetch r25 ; shl r15, r16, r17 ; shli r5, r6, 5 } + { prefetch r25 ; shl r5, r6, r7 ; addi r15, r16, 5 } + { prefetch r25 ; shl r5, r6, r7 ; seqi r15, r16, 5 } + { prefetch r25 ; shli r15, r16, 5 ; andi r5, r6, 5 } + { prefetch r25 ; shli r15, r16, 5 ; mvz r5, r6, r7 } + { prefetch r25 ; shli r15, r16, 5 ; slte r5, r6, r7 } + { prefetch r25 ; shli r5, r6, 5 ; info 19 } + { prefetch r25 ; shli r5, r6, 5 ; slt r15, r16, r17 } + { prefetch r25 ; shr r15, r16, r17 ; fnop } + { prefetch r25 ; shr r15, r16, r17 ; ori r5, r6, 5 } + { prefetch r25 ; shr r15, r16, r17 ; sra r5, r6, r7 } + { prefetch r25 ; shr r5, r6, r7 ; nop } + { prefetch r25 ; shr r5, r6, r7 ; slti_u r15, r16, 5 } + { prefetch r25 ; shri r15, r16, 5 ; mulhh_ss r5, r6, r7 } + { prefetch r25 ; shri r15, r16, 5 ; s2a r5, r6, r7 } + { prefetch r25 ; shri r15, r16, 5 ; tblidxb2 r5, r6 } + { prefetch r25 ; shri r5, r6, 5 ; rli r15, r16, 5 } + { prefetch r25 ; shri r5, r6, 5 ; xor r15, r16, r17 } + { prefetch r25 ; slt r15, r16, r17 ; mulll_ss r5, r6, r7 } + { prefetch r25 ; slt r15, r16, r17 ; shli r5, r6, 5 } + { prefetch r25 ; slt r5, r6, r7 ; addi r15, r16, 5 } + { prefetch r25 ; slt r5, r6, r7 ; seqi r15, r16, 5 } + { prefetch r25 ; slt_u r15, r16, r17 ; andi r5, r6, 5 } + { prefetch r25 ; slt_u r15, r16, r17 ; mvz r5, r6, r7 } + { prefetch r25 ; slt_u r15, r16, r17 ; slte r5, r6, r7 } + { prefetch r25 ; slt_u r5, r6, r7 ; info 19 } + { prefetch r25 ; slt_u r5, r6, r7 ; slt r15, r16, r17 } + { prefetch r25 ; slte r15, r16, r17 ; fnop } + { prefetch r25 ; slte r15, r16, r17 ; ori r5, r6, 5 } + { prefetch r25 ; slte r15, r16, r17 ; sra r5, r6, r7 } + { prefetch r25 ; slte r5, r6, r7 ; nop } + { prefetch r25 ; slte r5, r6, r7 ; slti_u r15, r16, 5 } + { prefetch r25 ; slte_u r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { prefetch r25 ; slte_u r15, r16, r17 ; s2a r5, r6, r7 } + { prefetch r25 ; slte_u r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch r25 ; slte_u r5, r6, r7 ; rli r15, r16, 5 } + { prefetch r25 ; slte_u r5, r6, r7 ; xor r15, r16, r17 } + { prefetch r25 ; slti r15, r16, 5 ; mulll_ss r5, r6, r7 } + { prefetch r25 ; slti r15, r16, 5 ; shli r5, r6, 5 } + { prefetch r25 ; slti r5, r6, 5 ; addi r15, r16, 5 } + { prefetch r25 ; slti r5, r6, 5 ; seqi r15, r16, 5 } + { prefetch r25 ; slti_u r15, r16, 5 ; andi r5, r6, 5 } + { prefetch r25 ; slti_u r15, r16, 5 ; mvz r5, r6, r7 } + { prefetch r25 ; slti_u r15, r16, 5 ; slte r5, r6, r7 } + { prefetch r25 ; slti_u r5, r6, 5 ; info 19 } + { prefetch r25 ; slti_u r5, r6, 5 ; slt r15, r16, r17 } + { prefetch r25 ; sne r15, r16, r17 ; fnop } + { prefetch r25 ; sne r15, r16, r17 ; ori r5, r6, 5 } + { prefetch r25 ; sne r15, r16, r17 ; sra r5, r6, r7 } + { prefetch r25 ; sne r5, r6, r7 ; nop } + { prefetch r25 ; sne r5, r6, r7 ; slti_u r15, r16, 5 } + { prefetch r25 ; sra r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { prefetch r25 ; sra r15, r16, r17 ; s2a r5, r6, r7 } + { prefetch r25 ; sra r15, r16, r17 ; tblidxb2 r5, r6 } + { prefetch r25 ; sra r5, r6, r7 ; rli r15, r16, 5 } + { prefetch r25 ; sra r5, r6, r7 ; xor r15, r16, r17 } + { prefetch r25 ; srai r15, r16, 5 ; mulll_ss r5, r6, r7 } + { prefetch r25 ; srai r15, r16, 5 ; shli r5, r6, 5 } + { prefetch r25 ; srai r5, r6, 5 ; addi r15, r16, 5 } + { prefetch r25 ; srai r5, r6, 5 ; seqi r15, r16, 5 } + { prefetch r25 ; sub r15, r16, r17 ; andi r5, r6, 5 } + { prefetch r25 ; sub r15, r16, r17 ; mvz r5, r6, r7 } + { prefetch r25 ; sub r15, r16, r17 ; slte r5, r6, r7 } + { prefetch r25 ; sub r5, r6, r7 ; info 19 } + { prefetch r25 ; sub r5, r6, r7 ; slt r15, r16, r17 } + { prefetch r25 ; tblidxb0 r5, r6 ; move r15, r16 } + { prefetch r25 ; tblidxb0 r5, r6 ; slte r15, r16, r17 } + { prefetch r25 ; tblidxb1 r5, r6 ; mz r15, r16, r17 } + { prefetch r25 ; tblidxb1 r5, r6 ; slti r15, r16, 5 } + { prefetch r25 ; tblidxb2 r5, r6 ; nor r15, r16, r17 } + { prefetch r25 ; tblidxb2 r5, r6 ; sne r15, r16, r17 } + { prefetch r25 ; tblidxb3 r5, r6 ; ori r15, r16, 5 } + { prefetch r25 ; tblidxb3 r5, r6 ; srai r15, r16, 5 } + { prefetch r25 ; xor r15, r16, r17 ; mulhha_uu r5, r6, r7 } + { prefetch r25 ; xor r15, r16, r17 ; seqi r5, r6, 5 } + { prefetch r25 ; xor r15, r16, r17 } + { prefetch r25 ; xor r5, r6, r7 ; s3a r15, r16, r17 } + { raise ; addb r5, r6, r7 } + { raise ; crc32_32 r5, r6, r7 } + { raise ; mnz r5, r6, r7 } + { raise ; mulhla_us r5, r6, r7 } + { raise ; packhb r5, r6, r7 } + { raise ; seqih r5, r6, 5 } + { raise ; slteb_u r5, r6, r7 } + { raise ; sub r5, r6, r7 } + { rl r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + { rl r15, r16, r17 ; adds r5, r6, r7 } + { rl r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + { rl r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 } + { rl r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 } + { rl r15, r16, r17 ; info 19 ; lb_u r25, r26 } + { rl r15, r16, r17 ; lb r25, r26 ; clz r5, r6 } + { rl r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 } + { rl r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 } + { rl r15, r16, r17 ; lb_u r25, r26 ; info 19 } + { rl r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 } + { rl r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 } + { rl r15, r16, r17 ; lh r25, r26 ; movei r5, 5 } + { rl r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 } + { rl r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 } + { rl r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 } + { rl r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 } + { rl r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 } + { rl r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 } + { rl r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 } + { rl r15, r16, r17 ; maxh r5, r6, r7 } + { rl r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + { rl r15, r16, r17 ; moveli r5, 0x1234 } + { rl r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { rl r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { rl r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { rl r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { rl r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 } + { rl r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 } + { rl r15, r16, r17 ; nop ; lh r25, r26 } + { rl r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + { rl r15, r16, r17 ; packhs r5, r6, r7 } + { rl r15, r16, r17 ; prefetch r25 ; fnop } + { rl r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 } + { rl r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 } + { rl r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + { rl r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + { rl r15, r16, r17 ; sadah r5, r6, r7 } + { rl r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 } + { rl r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 } + { rl r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 } + { rl r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + { rl r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 } + { rl r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 } + { rl r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 } + { rl r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + { rl r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + { rl r15, r16, r17 ; slt r5, r6, r7 } + { rl r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + { rl r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + { rl r15, r16, r17 ; sltib_u r5, r6, 5 } + { rl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + { rl r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + { rl r15, r16, r17 ; sw r25, r26 ; clz r5, r6 } + { rl r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 } + { rl r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 } + { rl r15, r16, r17 ; tblidxb0 r5, r6 } + { rl r15, r16, r17 ; tblidxb2 r5, r6 } + { rl r15, r16, r17 ; xor r5, r6, r7 } + { rl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + { rl r5, r6, r7 ; and r15, r16, r17 } + { rl r5, r6, r7 ; fnop ; prefetch r25 } + { rl r5, r6, r7 ; info 19 ; lw r25, r26 } + { rl r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 } + { rl r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 } + { rl r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 } + { rl r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 } + { rl r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 } + { rl r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 } + { rl r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 } + { rl r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 } + { rl r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 } + { rl r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 } + { rl r5, r6, r7 ; maxb_u r15, r16, r17 } + { rl r5, r6, r7 ; mnz r15, r16, r17 } + { rl r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + { rl r5, r6, r7 ; nop ; lh r25, r26 } + { rl r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + { rl r5, r6, r7 ; packhs r15, r16, r17 } + { rl r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 } + { rl r5, r6, r7 ; prefetch r25 } + { rl r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + { rl r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + { rl r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 } + { rl r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 } + { rl r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + { rl r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 } + { rl r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 } + { rl r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + { rl r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + { rl r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + { rl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + { rl r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + { rl r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + { rl r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + { rl r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + { rl r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + { rl r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 } + { rl r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 } + { rli r15, r16, 5 ; add r5, r6, r7 ; lb r25, r26 } + { rli r15, r16, 5 ; addi r5, r6, 5 ; sb r25, r26 } + { rli r15, r16, 5 ; and r5, r6, r7 } + { rli r15, r16, 5 ; bitx r5, r6 ; sb r25, r26 } + { rli r15, r16, 5 ; clz r5, r6 ; sb r25, r26 } + { rli r15, r16, 5 ; fnop ; lh_u r25, r26 } + { rli r15, r16, 5 ; intlb r5, r6, r7 } + { rli r15, r16, 5 ; lb r25, r26 ; mulll_ss r5, r6, r7 } + { rli r15, r16, 5 ; lb r25, r26 ; shli r5, r6, 5 } + { rli r15, r16, 5 ; lb_u r25, r26 ; addi r5, r6, 5 } + { rli r15, r16, 5 ; lb_u r25, r26 ; mullla_uu r5, r6, r7 } + { rli r15, r16, 5 ; lb_u r25, r26 ; slt r5, r6, r7 } + { rli r15, r16, 5 ; lh r25, r26 ; bitx r5, r6 } + { rli r15, r16, 5 ; lh r25, r26 ; mz r5, r6, r7 } + { rli r15, r16, 5 ; lh r25, r26 ; slte_u r5, r6, r7 } + { rli r15, r16, 5 ; lh_u r25, r26 ; ctz r5, r6 } + { rli r15, r16, 5 ; lh_u r25, r26 ; or r5, r6, r7 } + { rli r15, r16, 5 ; lh_u r25, r26 ; sne r5, r6, r7 } + { rli r15, r16, 5 ; lw r25, r26 ; mnz r5, r6, r7 } + { rli r15, r16, 5 ; lw r25, r26 ; rl r5, r6, r7 } + { rli r15, r16, 5 ; lw r25, r26 ; sub r5, r6, r7 } + { rli r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 } + { rli r15, r16, 5 ; movei r5, 5 ; lh r25, r26 } + { rli r15, r16, 5 ; mulhh_su r5, r6, r7 } + { rli r15, r16, 5 ; mulhha_ss r5, r6, r7 } + { rli r15, r16, 5 ; mulhla_uu r5, r6, r7 } + { rli r15, r16, 5 ; mulll_ss r5, r6, r7 } + { rli r15, r16, 5 ; mullla_ss r5, r6, r7 ; sw r25, r26 } + { rli r15, r16, 5 ; mvnz r5, r6, r7 ; sb r25, r26 } + { rli r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 } + { rli r15, r16, 5 ; nor r5, r6, r7 ; lw r25, r26 } + { rli r15, r16, 5 ; ori r5, r6, 5 ; lw r25, r26 } + { rli r15, r16, 5 ; prefetch r25 ; add r5, r6, r7 } + { rli r15, r16, 5 ; prefetch r25 ; mullla_ss r5, r6, r7 } + { rli r15, r16, 5 ; prefetch r25 ; shri r5, r6, 5 } + { rli r15, r16, 5 ; rl r5, r6, r7 ; lh_u r25, r26 } + { rli r15, r16, 5 ; s1a r5, r6, r7 ; lh_u r25, r26 } + { rli r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 } + { rli r15, r16, 5 ; sb r25, r26 ; ctz r5, r6 } + { rli r15, r16, 5 ; sb r25, r26 ; or r5, r6, r7 } + { rli r15, r16, 5 ; sb r25, r26 ; sne r5, r6, r7 } + { rli r15, r16, 5 ; seqb r5, r6, r7 } + { rli r15, r16, 5 ; sh r25, r26 ; clz r5, r6 } + { rli r15, r16, 5 ; sh r25, r26 ; nor r5, r6, r7 } + { rli r15, r16, 5 ; sh r25, r26 ; slti_u r5, r6, 5 } + { rli r15, r16, 5 ; shl r5, r6, r7 } + { rli r15, r16, 5 ; shr r5, r6, r7 ; prefetch r25 } + { rli r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 } + { rli r15, r16, 5 ; sltb_u r5, r6, r7 } + { rli r15, r16, 5 ; slte_u r5, r6, r7 } + { rli r15, r16, 5 ; slti_u r5, r6, 5 ; lh_u r25, r26 } + { rli r15, r16, 5 ; sne r5, r6, r7 } + { rli r15, r16, 5 ; srai r5, r6, 5 ; prefetch r25 } + { rli r15, r16, 5 ; subhs r5, r6, r7 } + { rli r15, r16, 5 ; sw r25, r26 ; mulll_ss r5, r6, r7 } + { rli r15, r16, 5 ; sw r25, r26 ; shli r5, r6, 5 } + { rli r15, r16, 5 ; tblidxb0 r5, r6 ; lb_u r25, r26 } + { rli r15, r16, 5 ; tblidxb2 r5, r6 ; lb_u r25, r26 } + { rli r15, r16, 5 ; xor r5, r6, r7 ; lb_u r25, r26 } + { rli r5, r6, 5 ; addb r15, r16, r17 } + { rli r5, r6, 5 ; and r15, r16, r17 ; lb_u r25, r26 } + { rli r5, r6, 5 ; dtlbpr r15 } + { rli r5, r6, 5 ; ill ; sb r25, r26 } + { rli r5, r6, 5 ; iret } + { rli r5, r6, 5 ; lb r25, r26 ; ori r15, r16, 5 } + { rli r5, r6, 5 ; lb r25, r26 ; srai r15, r16, 5 } + { rli r5, r6, 5 ; lb_u r25, r26 ; rl r15, r16, r17 } + { rli r5, r6, 5 ; lb_u r25, r26 ; sub r15, r16, r17 } + { rli r5, r6, 5 ; lh r25, r26 ; ori r15, r16, 5 } + { rli r5, r6, 5 ; lh r25, r26 ; srai r15, r16, 5 } + { rli r5, r6, 5 ; lh_u r25, r26 ; rl r15, r16, r17 } + { rli r5, r6, 5 ; lh_u r25, r26 ; sub r15, r16, r17 } + { rli r5, r6, 5 ; lw r25, r26 ; or r15, r16, r17 } + { rli r5, r6, 5 ; lw r25, r26 ; sra r15, r16, r17 } + { rli r5, r6, 5 ; mnz r15, r16, r17 ; lb_u r25, r26 } + { rli r5, r6, 5 ; move r15, r16 } + { rli r5, r6, 5 ; mz r15, r16, r17 ; sb r25, r26 } + { rli r5, r6, 5 ; nor r15, r16, r17 ; lw r25, r26 } + { rli r5, r6, 5 ; ori r15, r16, 5 ; lw r25, r26 } + { rli r5, r6, 5 ; prefetch r25 ; movei r15, 5 } + { rli r5, r6, 5 ; prefetch r25 ; slte_u r15, r16, r17 } + { rli r5, r6, 5 ; rli r15, r16, 5 ; lb r25, r26 } + { rli r5, r6, 5 ; s2a r15, r16, r17 ; lb r25, r26 } + { rli r5, r6, 5 ; sb r15, r16 } + { rli r5, r6, 5 ; sb r25, r26 ; s3a r15, r16, r17 } + { rli r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 } + { rli r5, r6, 5 ; seqi r15, r16, 5 ; sw r25, r26 } + { rli r5, r6, 5 ; sh r25, r26 ; rl r15, r16, r17 } + { rli r5, r6, 5 ; sh r25, r26 ; sub r15, r16, r17 } + { rli r5, r6, 5 ; shli r15, r16, 5 ; lw r25, r26 } + { rli r5, r6, 5 ; shri r15, r16, 5 ; lb r25, r26 } + { rli r5, r6, 5 ; slt r15, r16, r17 ; sw r25, r26 } + { rli r5, r6, 5 ; slte r15, r16, r17 ; sb r25, r26 } + { rli r5, r6, 5 ; slti r15, r16, 5 ; lb r25, r26 } + { rli r5, r6, 5 ; sltib r15, r16, 5 } + { rli r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 } + { rli r5, r6, 5 ; sub r15, r16, r17 ; lb r25, r26 } + { rli r5, r6, 5 ; sw r25, r26 ; fnop } + { rli r5, r6, 5 ; sw r25, r26 ; shr r15, r16, r17 } + { rli r5, r6, 5 ; xor r15, r16, r17 ; lh_u r25, r26 } + { s1a r15, r16, r17 ; addh r5, r6, r7 } + { s1a r15, r16, r17 ; and r5, r6, r7 ; lb_u r25, r26 } + { s1a r15, r16, r17 ; avgb_u r5, r6, r7 } + { s1a r15, r16, r17 ; bytex r5, r6 ; sw r25, r26 } + { s1a r15, r16, r17 ; ctz r5, r6 ; sb r25, r26 } + { s1a r15, r16, r17 ; info 19 ; prefetch r25 } + { s1a r15, r16, r17 ; lb r25, r26 ; mnz r5, r6, r7 } + { s1a r15, r16, r17 ; lb r25, r26 ; rl r5, r6, r7 } + { s1a r15, r16, r17 ; lb r25, r26 ; sub r5, r6, r7 } + { s1a r15, r16, r17 ; lb_u r25, r26 ; mulhh_ss r5, r6, r7 } + { s1a r15, r16, r17 ; lb_u r25, r26 ; s2a r5, r6, r7 } + { s1a r15, r16, r17 ; lb_u r25, r26 ; tblidxb2 r5, r6 } + { s1a r15, r16, r17 ; lh r25, r26 ; mulhha_uu r5, r6, r7 } + { s1a r15, r16, r17 ; lh r25, r26 ; seqi r5, r6, 5 } + { s1a r15, r16, r17 ; lh r25, r26 } + { s1a r15, r16, r17 ; lh_u r25, r26 ; mulll_uu r5, r6, r7 } + { s1a r15, r16, r17 ; lh_u r25, r26 ; shr r5, r6, r7 } + { s1a r15, r16, r17 ; lw r25, r26 ; and r5, r6, r7 } + { s1a r15, r16, r17 ; lw r25, r26 ; mvnz r5, r6, r7 } + { s1a r15, r16, r17 ; lw r25, r26 ; slt_u r5, r6, r7 } + { s1a r15, r16, r17 ; minh r5, r6, r7 } + { s1a r15, r16, r17 ; move r5, r6 ; lw r25, r26 } + { s1a r15, r16, r17 ; mulhh_ss r5, r6, r7 ; lh r25, r26 } + { s1a r15, r16, r17 ; mulhha_ss r5, r6, r7 ; lb_u r25, r26 } + { s1a r15, r16, r17 ; mulhhsa_uu r5, r6, r7 } + { s1a r15, r16, r17 ; mulll_ss r5, r6, r7 ; lb_u r25, r26 } + { s1a r15, r16, r17 ; mullla_ss r5, r6, r7 ; lb r25, r26 } + { s1a r15, r16, r17 ; mullla_uu r5, r6, r7 } + { s1a r15, r16, r17 ; mvz r5, r6, r7 ; sw r25, r26 } + { s1a r15, r16, r17 ; nop ; sb r25, r26 } + { s1a r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 } + { s1a r15, r16, r17 ; pcnt r5, r6 ; lh r25, r26 } + { s1a r15, r16, r17 ; prefetch r25 ; movei r5, 5 } + { s1a r15, r16, r17 ; prefetch r25 ; s1a r5, r6, r7 } + { s1a r15, r16, r17 ; prefetch r25 ; tblidxb1 r5, r6 } + { s1a r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 } + { s1a r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 } + { s1a r15, r16, r17 ; sadh_u r5, r6, r7 } + { s1a r15, r16, r17 ; sb r25, r26 ; mulll_uu r5, r6, r7 } + { s1a r15, r16, r17 ; sb r25, r26 ; shr r5, r6, r7 } + { s1a r15, r16, r17 ; seq r5, r6, r7 ; lh r25, r26 } + { s1a r15, r16, r17 ; seqib r5, r6, 5 } + { s1a r15, r16, r17 ; sh r25, r26 ; mulll_ss r5, r6, r7 } + { s1a r15, r16, r17 ; sh r25, r26 ; shli r5, r6, 5 } + { s1a r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 } + { s1a r15, r16, r17 ; shli r5, r6, 5 } + { s1a r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 } + { s1a r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 } + { s1a r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 } + { s1a r15, r16, r17 ; slti r5, r6, 5 ; prefetch r25 } + { s1a r15, r16, r17 ; sne r5, r6, r7 ; lb_u r25, r26 } + { s1a r15, r16, r17 ; sra r5, r6, r7 } + { s1a r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 } + { s1a r15, r16, r17 ; sw r25, r26 ; mnz r5, r6, r7 } + { s1a r15, r16, r17 ; sw r25, r26 ; rl r5, r6, r7 } + { s1a r15, r16, r17 ; sw r25, r26 ; sub r5, r6, r7 } + { s1a r15, r16, r17 ; tblidxb1 r5, r6 ; lh_u r25, r26 } + { s1a r15, r16, r17 ; tblidxb3 r5, r6 ; lh_u r25, r26 } + { s1a r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + { s1a r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 } + { s1a r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + { s1a r5, r6, r7 ; fnop } + { s1a r5, r6, r7 ; info 19 ; sw r25, r26 } + { s1a r5, r6, r7 ; lb r25, r26 ; info 19 } + { s1a r5, r6, r7 ; lb r25, r26 ; slt r15, r16, r17 } + { s1a r5, r6, r7 ; lb_u r25, r26 ; mnz r15, r16, r17 } + { s1a r5, r6, r7 ; lb_u r25, r26 ; slt_u r15, r16, r17 } + { s1a r5, r6, r7 ; lh r25, r26 ; info 19 } + { s1a r5, r6, r7 ; lh r25, r26 ; slt r15, r16, r17 } + { s1a r5, r6, r7 ; lh_u r25, r26 ; mnz r15, r16, r17 } + { s1a r5, r6, r7 ; lh_u r25, r26 ; slt_u r15, r16, r17 } + { s1a r5, r6, r7 ; lw r25, r26 ; ill } + { s1a r5, r6, r7 ; lw r25, r26 ; shri r15, r16, 5 } + { s1a r5, r6, r7 ; mf } + { s1a r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 } + { s1a r5, r6, r7 ; movelis r15, 0x1234 } + { s1a r5, r6, r7 ; nop ; sb r25, r26 } + { s1a r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 } + { s1a r5, r6, r7 ; prefetch r25 ; addi r15, r16, 5 } + { s1a r5, r6, r7 ; prefetch r25 ; seqi r15, r16, 5 } + { s1a r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 } + { s1a r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 } + { s1a r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 } + { s1a r5, r6, r7 ; sb r25, r26 ; nop } + { s1a r5, r6, r7 ; sb r25, r26 ; slti_u r15, r16, 5 } + { s1a r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 } + { s1a r5, r6, r7 ; sh r25, r26 ; mnz r15, r16, r17 } + { s1a r5, r6, r7 ; sh r25, r26 ; slt_u r15, r16, r17 } + { s1a r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 } + { s1a r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 } + { s1a r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 } + { s1a r5, r6, r7 ; sltb r15, r16, r17 } + { s1a r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 } + { s1a r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 } + { s1a r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + { s1a r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 } + { s1a r5, r6, r7 ; subh r15, r16, r17 } + { s1a r5, r6, r7 ; sw r25, r26 ; rli r15, r16, 5 } + { s1a r5, r6, r7 ; sw r25, r26 ; xor r15, r16, r17 } + { s2a r15, r16, r17 ; add r5, r6, r7 ; lw r25, r26 } + { s2a r15, r16, r17 ; addib r5, r6, 5 } + { s2a r15, r16, r17 ; andi r5, r6, 5 ; lh_u r25, r26 } + { s2a r15, r16, r17 ; bytex r5, r6 ; lb r25, r26 } + { s2a r15, r16, r17 ; crc32_32 r5, r6, r7 } + { s2a r15, r16, r17 ; fnop ; sh r25, r26 } + { s2a r15, r16, r17 ; lb r25, r26 ; and r5, r6, r7 } + { s2a r15, r16, r17 ; lb r25, r26 ; mvnz r5, r6, r7 } + { s2a r15, r16, r17 ; lb r25, r26 ; slt_u r5, r6, r7 } + { s2a r15, r16, r17 ; lb_u r25, r26 ; bytex r5, r6 } + { s2a r15, r16, r17 ; lb_u r25, r26 ; nop } + { s2a r15, r16, r17 ; lb_u r25, r26 ; slti r5, r6, 5 } + { s2a r15, r16, r17 ; lh r25, r26 ; fnop } + { s2a r15, r16, r17 ; lh r25, r26 ; ori r5, r6, 5 } + { s2a r15, r16, r17 ; lh r25, r26 ; sra r5, r6, r7 } + { s2a r15, r16, r17 ; lh_u r25, r26 ; move r5, r6 } + { s2a r15, r16, r17 ; lh_u r25, r26 ; rli r5, r6, 5 } + { s2a r15, r16, r17 ; lh_u r25, r26 ; tblidxb0 r5, r6 } + { s2a r15, r16, r17 ; lw r25, r26 ; mulhh_uu r5, r6, r7 } + { s2a r15, r16, r17 ; lw r25, r26 ; s3a r5, r6, r7 } + { s2a r15, r16, r17 ; lw r25, r26 ; tblidxb3 r5, r6 } + { s2a r15, r16, r17 ; mnz r5, r6, r7 ; sw r25, r26 } + { s2a r15, r16, r17 ; movei r5, 5 ; sb r25, r26 } + { s2a r15, r16, r17 ; mulhh_uu r5, r6, r7 ; lh_u r25, r26 } + { s2a r15, r16, r17 ; mulhha_uu r5, r6, r7 ; lh r25, r26 } + { s2a r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; lh_u r25, r26 } + { s2a r15, r16, r17 ; mulll_uu r5, r6, r7 ; lh r25, r26 } + { s2a r15, r16, r17 ; mullla_uu r5, r6, r7 ; lb_u r25, r26 } + { s2a r15, r16, r17 ; mvz r5, r6, r7 ; lb r25, r26 } + { s2a r15, r16, r17 ; mzb r5, r6, r7 } + { s2a r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 } + { s2a r15, r16, r17 ; ori r5, r6, 5 ; sw r25, r26 } + { s2a r15, r16, r17 ; prefetch r25 ; bitx r5, r6 } + { s2a r15, r16, r17 ; prefetch r25 ; mz r5, r6, r7 } + { s2a r15, r16, r17 ; prefetch r25 ; slte_u r5, r6, r7 } + { s2a r15, r16, r17 ; rl r5, r6, r7 ; sh r25, r26 } + { s2a r15, r16, r17 ; s1a r5, r6, r7 ; sh r25, r26 } + { s2a r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 } + { s2a r15, r16, r17 ; sb r25, r26 ; move r5, r6 } + { s2a r15, r16, r17 ; sb r25, r26 ; rli r5, r6, 5 } + { s2a r15, r16, r17 ; sb r25, r26 ; tblidxb0 r5, r6 } + { s2a r15, r16, r17 ; seqi r5, r6, 5 ; lh r25, r26 } + { s2a r15, r16, r17 ; sh r25, r26 ; mnz r5, r6, r7 } + { s2a r15, r16, r17 ; sh r25, r26 ; rl r5, r6, r7 } + { s2a r15, r16, r17 ; sh r25, r26 ; sub r5, r6, r7 } + { s2a r15, r16, r17 ; shli r5, r6, 5 ; lb_u r25, r26 } + { s2a r15, r16, r17 ; shr r5, r6, r7 } + { s2a r15, r16, r17 ; slt r5, r6, r7 ; prefetch r25 } + { s2a r15, r16, r17 ; slte r5, r6, r7 ; lh_u r25, r26 } + { s2a r15, r16, r17 ; slteh_u r5, r6, r7 } + { s2a r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 } + { s2a r15, r16, r17 ; sra r5, r6, r7 ; lb_u r25, r26 } + { s2a r15, r16, r17 ; srai r5, r6, 5 } + { s2a r15, r16, r17 ; sw r25, r26 ; and r5, r6, r7 } + { s2a r15, r16, r17 ; sw r25, r26 ; mvnz r5, r6, r7 } + { s2a r15, r16, r17 ; sw r25, r26 ; slt_u r5, r6, r7 } + { s2a r15, r16, r17 ; tblidxb0 r5, r6 ; prefetch r25 } + { s2a r15, r16, r17 ; tblidxb2 r5, r6 ; prefetch r25 } + { s2a r15, r16, r17 ; xor r5, r6, r7 ; prefetch r25 } + { s2a r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 } + { s2a r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 } + { s2a r5, r6, r7 ; fnop ; lb_u r25, r26 } + { s2a r5, r6, r7 ; info 19 ; lb r25, r26 } + { s2a r5, r6, r7 ; jrp r15 } + { s2a r5, r6, r7 ; lb r25, r26 ; s2a r15, r16, r17 } + { s2a r5, r6, r7 ; lb_u r15, r16 } + { s2a r5, r6, r7 ; lb_u r25, r26 ; s3a r15, r16, r17 } + { s2a r5, r6, r7 ; lbadd_u r15, r16, 5 } + { s2a r5, r6, r7 ; lh r25, r26 ; s2a r15, r16, r17 } + { s2a r5, r6, r7 ; lh_u r15, r16 } + { s2a r5, r6, r7 ; lh_u r25, r26 ; s3a r15, r16, r17 } + { s2a r5, r6, r7 ; lhadd_u r15, r16, 5 } + { s2a r5, r6, r7 ; lw r25, r26 ; s1a r15, r16, r17 } + { s2a r5, r6, r7 ; lw r25, r26 } + { s2a r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } + { s2a r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 } + { s2a r5, r6, r7 ; mzb r15, r16, r17 } + { s2a r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 } + { s2a r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 } + { s2a r5, r6, r7 ; prefetch r25 ; or r15, r16, r17 } + { s2a r5, r6, r7 ; prefetch r25 ; sra r15, r16, r17 } + { s2a r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 } + { s2a r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 } + { s2a r5, r6, r7 ; sb r25, r26 ; andi r15, r16, 5 } + { s2a r5, r6, r7 ; sb r25, r26 ; shli r15, r16, 5 } + { s2a r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 } + { s2a r5, r6, r7 ; sh r15, r16 } + { s2a r5, r6, r7 ; sh r25, r26 ; s3a r15, r16, r17 } + { s2a r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 } + { s2a r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 } + { s2a r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 } + { s2a r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 } + { s2a r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 } + { s2a r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 } + { s2a r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 } + { s2a r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 } + { s2a r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 } + { s2a r5, r6, r7 ; sw r25, r26 ; move r15, r16 } + { s2a r5, r6, r7 ; sw r25, r26 ; slte r15, r16, r17 } + { s2a r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 } + { s3a r15, r16, r17 ; addi r5, r6, 5 ; lh r25, r26 } + { s3a r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 } + { s3a r15, r16, r17 ; bitx r5, r6 ; lh r25, r26 } + { s3a r15, r16, r17 ; clz r5, r6 ; lh r25, r26 } + { s3a r15, r16, r17 ; dword_align r5, r6, r7 } + { s3a r15, r16, r17 ; info 19 } + { s3a r15, r16, r17 ; lb r25, r26 ; mulhh_uu r5, r6, r7 } + { s3a r15, r16, r17 ; lb r25, r26 ; s3a r5, r6, r7 } + { s3a r15, r16, r17 ; lb r25, r26 ; tblidxb3 r5, r6 } + { s3a r15, r16, r17 ; lb_u r25, r26 ; mulhlsa_uu r5, r6, r7 } + { s3a r15, r16, r17 ; lb_u r25, r26 ; shl r5, r6, r7 } + { s3a r15, r16, r17 ; lh r25, r26 ; add r5, r6, r7 } + { s3a r15, r16, r17 ; lh r25, r26 ; mullla_ss r5, r6, r7 } + { s3a r15, r16, r17 ; lh r25, r26 ; shri r5, r6, 5 } + { s3a r15, r16, r17 ; lh_u r25, r26 ; andi r5, r6, 5 } + { s3a r15, r16, r17 ; lh_u r25, r26 ; mvz r5, r6, r7 } + { s3a r15, r16, r17 ; lh_u r25, r26 ; slte r5, r6, r7 } + { s3a r15, r16, r17 ; lw r25, r26 ; clz r5, r6 } + { s3a r15, r16, r17 ; lw r25, r26 ; nor r5, r6, r7 } + { s3a r15, r16, r17 ; lw r25, r26 ; slti_u r5, r6, 5 } + { s3a r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 } + { s3a r15, r16, r17 ; move r5, r6 ; sw r25, r26 } + { s3a r15, r16, r17 ; mulhh_ss r5, r6, r7 ; sb r25, r26 } + { s3a r15, r16, r17 ; mulhha_ss r5, r6, r7 ; prefetch r25 } + { s3a r15, r16, r17 ; mulhl_uu r5, r6, r7 } + { s3a r15, r16, r17 ; mulll_ss r5, r6, r7 ; prefetch r25 } + { s3a r15, r16, r17 ; mullla_ss r5, r6, r7 ; lw r25, r26 } + { s3a r15, r16, r17 ; mvnz r5, r6, r7 ; lh r25, r26 } + { s3a r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 } + { s3a r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 } + { s3a r15, r16, r17 ; ori r5, r6, 5 ; lb r25, r26 } + { s3a r15, r16, r17 ; pcnt r5, r6 ; sb r25, r26 } + { s3a r15, r16, r17 ; prefetch r25 ; mulhha_uu r5, r6, r7 } + { s3a r15, r16, r17 ; prefetch r25 ; seqi r5, r6, 5 } + { s3a r15, r16, r17 ; prefetch r25 } + { s3a r15, r16, r17 ; rli r5, r6, 5 } + { s3a r15, r16, r17 ; s2a r5, r6, r7 } + { s3a r15, r16, r17 ; sb r25, r26 ; andi r5, r6, 5 } + { s3a r15, r16, r17 ; sb r25, r26 ; mvz r5, r6, r7 } + { s3a r15, r16, r17 ; sb r25, r26 ; slte r5, r6, r7 } + { s3a r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 } + { s3a r15, r16, r17 ; sh r25, r26 ; and r5, r6, r7 } + { s3a r15, r16, r17 ; sh r25, r26 ; mvnz r5, r6, r7 } + { s3a r15, r16, r17 ; sh r25, r26 ; slt_u r5, r6, r7 } + { s3a r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 } + { s3a r15, r16, r17 ; shr r5, r6, r7 ; lb_u r25, r26 } + { s3a r15, r16, r17 ; shri r5, r6, 5 } + { s3a r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 } + { s3a r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 } + { s3a r15, r16, r17 ; slti r5, r6, 5 } + { s3a r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 } + { s3a r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 } + { s3a r15, r16, r17 ; sub r5, r6, r7 } + { s3a r15, r16, r17 ; sw r25, r26 ; mulhh_uu r5, r6, r7 } + { s3a r15, r16, r17 ; sw r25, r26 ; s3a r5, r6, r7 } + { s3a r15, r16, r17 ; sw r25, r26 ; tblidxb3 r5, r6 } + { s3a r15, r16, r17 ; tblidxb1 r5, r6 ; sh r25, r26 } + { s3a r15, r16, r17 ; tblidxb3 r5, r6 ; sh r25, r26 } + { s3a r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 } + { s3a r5, r6, r7 ; addli r15, r16, 0x1234 } + { s3a r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 } + { s3a r5, r6, r7 ; ill ; lh r25, r26 } + { s3a r5, r6, r7 ; inthh r15, r16, r17 } + { s3a r5, r6, r7 ; lb r25, r26 ; mz r15, r16, r17 } + { s3a r5, r6, r7 ; lb r25, r26 ; slti r15, r16, 5 } + { s3a r5, r6, r7 ; lb_u r25, r26 ; nop } + { s3a r5, r6, r7 ; lb_u r25, r26 ; slti_u r15, r16, 5 } + { s3a r5, r6, r7 ; lh r25, r26 ; mz r15, r16, r17 } + { s3a r5, r6, r7 ; lh r25, r26 ; slti r15, r16, 5 } + { s3a r5, r6, r7 ; lh_u r25, r26 ; nop } + { s3a r5, r6, r7 ; lh_u r25, r26 ; slti_u r15, r16, 5 } + { s3a r5, r6, r7 ; lw r25, r26 ; movei r15, 5 } + { s3a r5, r6, r7 ; lw r25, r26 ; slte_u r15, r16, r17 } + { s3a r5, r6, r7 ; minib_u r15, r16, 5 } + { s3a r5, r6, r7 ; move r15, r16 ; prefetch r25 } + { s3a r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 } + { s3a r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 } + { s3a r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 } + { s3a r5, r6, r7 ; prefetch r25 ; ill } + { s3a r5, r6, r7 ; prefetch r25 ; shri r15, r16, 5 } + { s3a r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 } + { s3a r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 } + { s3a r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 } + { s3a r5, r6, r7 ; sb r25, r26 ; rl r15, r16, r17 } + { s3a r5, r6, r7 ; sb r25, r26 ; sub r15, r16, r17 } + { s3a r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 } + { s3a r5, r6, r7 ; sh r25, r26 ; nop } + { s3a r5, r6, r7 ; sh r25, r26 ; slti_u r15, r16, 5 } + { s3a r5, r6, r7 ; shli r15, r16, 5 ; lb r25, r26 } + { s3a r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 } + { s3a r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 } + { s3a r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 } + { s3a r5, r6, r7 ; slteh r15, r16, r17 } + { s3a r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 } + { s3a r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 } + { s3a r5, r6, r7 ; srai r15, r16, 5 ; sw r25, r26 } + { s3a r5, r6, r7 ; sw r25, r26 ; add r15, r16, r17 } + { s3a r5, r6, r7 ; sw r25, r26 ; seq r15, r16, r17 } + { s3a r5, r6, r7 ; wh64 r15 } + { sadab_u r5, r6, r7 ; addli r15, r16, 0x1234 } + { sadab_u r5, r6, r7 ; jalr r15 } + { sadab_u r5, r6, r7 ; maxih r15, r16, 5 } + { sadab_u r5, r6, r7 ; nor r15, r16, r17 } + { sadab_u r5, r6, r7 ; seqib r15, r16, 5 } + { sadab_u r5, r6, r7 ; slte r15, r16, r17 } + { sadab_u r5, r6, r7 ; srai r15, r16, 5 } + { sadah r5, r6, r7 ; addi r15, r16, 5 } + { sadah r5, r6, r7 ; intlh r15, r16, r17 } + { sadah r5, r6, r7 ; maxb_u r15, r16, r17 } + { sadah r5, r6, r7 ; mzb r15, r16, r17 } + { sadah r5, r6, r7 ; seqb r15, r16, r17 } + { sadah r5, r6, r7 ; slt_u r15, r16, r17 } + { sadah r5, r6, r7 ; sra r15, r16, r17 } + { sadah_u r5, r6, r7 ; addbs_u r15, r16, r17 } + { sadah_u r5, r6, r7 ; inthb r15, r16, r17 } + { sadah_u r5, r6, r7 ; lw_na r15, r16 } + { sadah_u r5, r6, r7 ; movelis r15, 0x1234 } + { sadah_u r5, r6, r7 ; sb r15, r16 } + { sadah_u r5, r6, r7 ; shrib r15, r16, 5 } + { sadah_u r5, r6, r7 ; sne r15, r16, r17 } + { sadah_u r5, r6, r7 ; xori r15, r16, 5 } + { sadb_u r5, r6, r7 ; ill } + { sadb_u r5, r6, r7 ; lhadd_u r15, r16, 5 } + { sadb_u r5, r6, r7 ; move r15, r16 } + { sadb_u r5, r6, r7 ; s1a r15, r16, r17 } + { sadb_u r5, r6, r7 ; shrb r15, r16, r17 } + { sadb_u r5, r6, r7 ; sltib_u r15, r16, 5 } + { sadb_u r5, r6, r7 ; tns r15, r16 } + { sadh r5, r6, r7 ; flush r15 } + { sadh r5, r6, r7 ; lh r15, r16 } + { sadh r5, r6, r7 ; mnz r15, r16, r17 } + { sadh r5, r6, r7 ; raise } + { sadh r5, r6, r7 ; shlib r15, r16, 5 } + { sadh r5, r6, r7 ; slti r15, r16, 5 } + { sadh r5, r6, r7 ; subs r15, r16, r17 } + { sadh_u r5, r6, r7 ; auli r15, r16, 0x1234 } + { sadh_u r5, r6, r7 ; lb_u r15, r16 } + { sadh_u r5, r6, r7 ; minib_u r15, r16, 5 } + { sadh_u r5, r6, r7 ; packhs r15, r16, r17 } + { sadh_u r5, r6, r7 ; shlb r15, r16, r17 } + { sadh_u r5, r6, r7 ; slteh_u r15, r16, r17 } + { sadh_u r5, r6, r7 ; subbs_u r15, r16, r17 } + { sb r15, r16 ; adds r5, r6, r7 } + { sb r15, r16 ; intlb r5, r6, r7 } + { sb r15, r16 ; mulhh_uu r5, r6, r7 } + { sb r15, r16 ; mulllsa_uu r5, r6, r7 } + { sb r15, r16 ; sadab_u r5, r6, r7 } + { sb r15, r16 ; shrh r5, r6, r7 } + { sb r15, r16 ; sltih r5, r6, 5 } + { sb r15, r16 ; tblidxb3 r5, r6 } + { sb r25, r26 ; add r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { sb r25, r26 ; add r15, r16, r17 ; shl r5, r6, r7 } + { sb r25, r26 ; add r5, r6, r7 ; add r15, r16, r17 } + { sb r25, r26 ; add r5, r6, r7 ; seq r15, r16, r17 } + { sb r25, r26 ; addi r15, r16, 5 ; and r5, r6, r7 } + { sb r25, r26 ; addi r15, r16, 5 ; mvnz r5, r6, r7 } + { sb r25, r26 ; addi r15, r16, 5 ; slt_u r5, r6, r7 } + { sb r25, r26 ; addi r5, r6, 5 ; ill } + { sb r25, r26 ; addi r5, r6, 5 ; shri r15, r16, 5 } + { sb r25, r26 ; and r15, r16, r17 ; ctz r5, r6 } + { sb r25, r26 ; and r15, r16, r17 ; or r5, r6, r7 } + { sb r25, r26 ; and r15, r16, r17 ; sne r5, r6, r7 } + { sb r25, r26 ; and r5, r6, r7 ; mz r15, r16, r17 } + { sb r25, r26 ; and r5, r6, r7 ; slti r15, r16, 5 } + { sb r25, r26 ; andi r15, r16, 5 ; movei r5, 5 } + { sb r25, r26 ; andi r15, r16, 5 ; s1a r5, r6, r7 } + { sb r25, r26 ; andi r15, r16, 5 ; tblidxb1 r5, r6 } + { sb r25, r26 ; andi r5, r6, 5 ; rl r15, r16, r17 } + { sb r25, r26 ; andi r5, r6, 5 ; sub r15, r16, r17 } + { sb r25, r26 ; bitx r5, r6 ; s1a r15, r16, r17 } + { sb r25, r26 ; bitx r5, r6 } + { sb r25, r26 ; bytex r5, r6 ; s3a r15, r16, r17 } + { sb r25, r26 ; clz r5, r6 ; addi r15, r16, 5 } + { sb r25, r26 ; clz r5, r6 ; seqi r15, r16, 5 } + { sb r25, r26 ; ctz r5, r6 ; andi r15, r16, 5 } + { sb r25, r26 ; ctz r5, r6 ; shli r15, r16, 5 } + { sb r25, r26 ; fnop ; and r5, r6, r7 } + { sb r25, r26 ; fnop ; mulhlsa_uu r5, r6, r7 } + { sb r25, r26 ; fnop ; rli r5, r6, 5 } + { sb r25, r26 ; fnop ; slt r5, r6, r7 } + { sb r25, r26 ; fnop ; tblidxb1 r5, r6 } + { sb r25, r26 ; ill ; mulhh_uu r5, r6, r7 } + { sb r25, r26 ; ill ; s3a r5, r6, r7 } + { sb r25, r26 ; ill ; tblidxb3 r5, r6 } + { sb r25, r26 ; info 19 ; move r15, r16 } + { sb r25, r26 ; info 19 ; or r15, r16, r17 } + { sb r25, r26 ; info 19 ; shl r5, r6, r7 } + { sb r25, r26 ; info 19 ; sne r5, r6, r7 } + { sb r25, r26 ; mnz r15, r16, r17 ; clz r5, r6 } + { sb r25, r26 ; mnz r15, r16, r17 ; nor r5, r6, r7 } + { sb r25, r26 ; mnz r15, r16, r17 ; slti_u r5, r6, 5 } + { sb r25, r26 ; mnz r5, r6, r7 ; movei r15, 5 } + { sb r25, r26 ; mnz r5, r6, r7 ; slte_u r15, r16, r17 } + { sb r25, r26 ; move r15, r16 ; move r5, r6 } + { sb r25, r26 ; move r15, r16 ; rli r5, r6, 5 } + { sb r25, r26 ; move r15, r16 ; tblidxb0 r5, r6 } + { sb r25, r26 ; move r5, r6 ; ori r15, r16, 5 } + { sb r25, r26 ; move r5, r6 ; srai r15, r16, 5 } + { sb r25, r26 ; movei r15, 5 ; mulhha_uu r5, r6, r7 } + { sb r25, r26 ; movei r15, 5 ; seqi r5, r6, 5 } + { sb r25, r26 ; movei r15, 5 } + { sb r25, r26 ; movei r5, 5 ; s3a r15, r16, r17 } + { sb r25, r26 ; mulhh_ss r5, r6, r7 ; addi r15, r16, 5 } + { sb r25, r26 ; mulhh_ss r5, r6, r7 ; seqi r15, r16, 5 } + { sb r25, r26 ; mulhh_uu r5, r6, r7 ; andi r15, r16, 5 } + { sb r25, r26 ; mulhh_uu r5, r6, r7 ; shli r15, r16, 5 } + { sb r25, r26 ; mulhha_ss r5, r6, r7 ; ill } + { sb r25, r26 ; mulhha_ss r5, r6, r7 ; shri r15, r16, 5 } + { sb r25, r26 ; mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 } + { sb r25, r26 ; mulhha_uu r5, r6, r7 ; slt_u r15, r16, r17 } + { sb r25, r26 ; mulhlsa_uu r5, r6, r7 ; movei r15, 5 } + { sb r25, r26 ; mulhlsa_uu r5, r6, r7 ; slte_u r15, r16, r17 } + { sb r25, r26 ; mulll_ss r5, r6, r7 ; nop } + { sb r25, r26 ; mulll_ss r5, r6, r7 ; slti_u r15, r16, 5 } + { sb r25, r26 ; mulll_uu r5, r6, r7 ; or r15, r16, r17 } + { sb r25, r26 ; mulll_uu r5, r6, r7 ; sra r15, r16, r17 } + { sb r25, r26 ; mullla_ss r5, r6, r7 ; rl r15, r16, r17 } + { sb r25, r26 ; mullla_ss r5, r6, r7 ; sub r15, r16, r17 } + { sb r25, r26 ; mullla_uu r5, r6, r7 ; s1a r15, r16, r17 } + { sb r25, r26 ; mullla_uu r5, r6, r7 } + { sb r25, r26 ; mvnz r5, r6, r7 ; s3a r15, r16, r17 } + { sb r25, r26 ; mvz r5, r6, r7 ; addi r15, r16, 5 } + { sb r25, r26 ; mvz r5, r6, r7 ; seqi r15, r16, 5 } + { sb r25, r26 ; mz r15, r16, r17 ; andi r5, r6, 5 } + { sb r25, r26 ; mz r15, r16, r17 ; mvz r5, r6, r7 } + { sb r25, r26 ; mz r15, r16, r17 ; slte r5, r6, r7 } + { sb r25, r26 ; mz r5, r6, r7 ; info 19 } + { sb r25, r26 ; mz r5, r6, r7 ; slt r15, r16, r17 } + { sb r25, r26 ; nop ; bitx r5, r6 } + { sb r25, r26 ; nop ; mullla_ss r5, r6, r7 } + { sb r25, r26 ; nop ; s2a r15, r16, r17 } + { sb r25, r26 ; nop ; slte r15, r16, r17 } + { sb r25, r26 ; nop ; xor r15, r16, r17 } + { sb r25, r26 ; nor r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { sb r25, r26 ; nor r15, r16, r17 ; shl r5, r6, r7 } + { sb r25, r26 ; nor r5, r6, r7 ; add r15, r16, r17 } + { sb r25, r26 ; nor r5, r6, r7 ; seq r15, r16, r17 } + { sb r25, r26 ; or r15, r16, r17 ; and r5, r6, r7 } + { sb r25, r26 ; or r15, r16, r17 ; mvnz r5, r6, r7 } + { sb r25, r26 ; or r15, r16, r17 ; slt_u r5, r6, r7 } + { sb r25, r26 ; or r5, r6, r7 ; ill } + { sb r25, r26 ; or r5, r6, r7 ; shri r15, r16, 5 } + { sb r25, r26 ; ori r15, r16, 5 ; ctz r5, r6 } + { sb r25, r26 ; ori r15, r16, 5 ; or r5, r6, r7 } + { sb r25, r26 ; ori r15, r16, 5 ; sne r5, r6, r7 } + { sb r25, r26 ; ori r5, r6, 5 ; mz r15, r16, r17 } + { sb r25, r26 ; ori r5, r6, 5 ; slti r15, r16, 5 } + { sb r25, r26 ; pcnt r5, r6 ; nor r15, r16, r17 } + { sb r25, r26 ; pcnt r5, r6 ; sne r15, r16, r17 } + { sb r25, r26 ; rl r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { sb r25, r26 ; rl r15, r16, r17 ; s3a r5, r6, r7 } + { sb r25, r26 ; rl r15, r16, r17 ; tblidxb3 r5, r6 } + { sb r25, r26 ; rl r5, r6, r7 ; s1a r15, r16, r17 } + { sb r25, r26 ; rl r5, r6, r7 } + { sb r25, r26 ; rli r15, r16, 5 ; mulll_uu r5, r6, r7 } + { sb r25, r26 ; rli r15, r16, 5 ; shr r5, r6, r7 } + { sb r25, r26 ; rli r5, r6, 5 ; and r15, r16, r17 } + { sb r25, r26 ; rli r5, r6, 5 ; shl r15, r16, r17 } + { sb r25, r26 ; s1a r15, r16, r17 ; bitx r5, r6 } + { sb r25, r26 ; s1a r15, r16, r17 ; mz r5, r6, r7 } + { sb r25, r26 ; s1a r15, r16, r17 ; slte_u r5, r6, r7 } + { sb r25, r26 ; s1a r5, r6, r7 ; mnz r15, r16, r17 } + { sb r25, r26 ; s1a r5, r6, r7 ; slt_u r15, r16, r17 } + { sb r25, r26 ; s2a r15, r16, r17 ; info 19 } + { sb r25, r26 ; s2a r15, r16, r17 ; pcnt r5, r6 } + { sb r25, r26 ; s2a r15, r16, r17 ; srai r5, r6, 5 } + { sb r25, r26 ; s2a r5, r6, r7 ; nor r15, r16, r17 } + { sb r25, r26 ; s2a r5, r6, r7 ; sne r15, r16, r17 } + { sb r25, r26 ; s3a r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { sb r25, r26 ; s3a r15, r16, r17 ; s3a r5, r6, r7 } + { sb r25, r26 ; s3a r15, r16, r17 ; tblidxb3 r5, r6 } + { sb r25, r26 ; s3a r5, r6, r7 ; s1a r15, r16, r17 } + { sb r25, r26 ; s3a r5, r6, r7 } + { sb r25, r26 ; seq r15, r16, r17 ; mulll_uu r5, r6, r7 } + { sb r25, r26 ; seq r15, r16, r17 ; shr r5, r6, r7 } + { sb r25, r26 ; seq r5, r6, r7 ; and r15, r16, r17 } + { sb r25, r26 ; seq r5, r6, r7 ; shl r15, r16, r17 } + { sb r25, r26 ; seqi r15, r16, 5 ; bitx r5, r6 } + { sb r25, r26 ; seqi r15, r16, 5 ; mz r5, r6, r7 } + { sb r25, r26 ; seqi r15, r16, 5 ; slte_u r5, r6, r7 } + { sb r25, r26 ; seqi r5, r6, 5 ; mnz r15, r16, r17 } + { sb r25, r26 ; seqi r5, r6, 5 ; slt_u r15, r16, r17 } + { sb r25, r26 ; shl r15, r16, r17 ; info 19 } + { sb r25, r26 ; shl r15, r16, r17 ; pcnt r5, r6 } + { sb r25, r26 ; shl r15, r16, r17 ; srai r5, r6, 5 } + { sb r25, r26 ; shl r5, r6, r7 ; nor r15, r16, r17 } + { sb r25, r26 ; shl r5, r6, r7 ; sne r15, r16, r17 } + { sb r25, r26 ; shli r15, r16, 5 ; mulhh_uu r5, r6, r7 } + { sb r25, r26 ; shli r15, r16, 5 ; s3a r5, r6, r7 } + { sb r25, r26 ; shli r15, r16, 5 ; tblidxb3 r5, r6 } + { sb r25, r26 ; shli r5, r6, 5 ; s1a r15, r16, r17 } + { sb r25, r26 ; shli r5, r6, 5 } + { sb r25, r26 ; shr r15, r16, r17 ; mulll_uu r5, r6, r7 } + { sb r25, r26 ; shr r15, r16, r17 ; shr r5, r6, r7 } + { sb r25, r26 ; shr r5, r6, r7 ; and r15, r16, r17 } + { sb r25, r26 ; shr r5, r6, r7 ; shl r15, r16, r17 } + { sb r25, r26 ; shri r15, r16, 5 ; bitx r5, r6 } + { sb r25, r26 ; shri r15, r16, 5 ; mz r5, r6, r7 } + { sb r25, r26 ; shri r15, r16, 5 ; slte_u r5, r6, r7 } + { sb r25, r26 ; shri r5, r6, 5 ; mnz r15, r16, r17 } + { sb r25, r26 ; shri r5, r6, 5 ; slt_u r15, r16, r17 } + { sb r25, r26 ; slt r15, r16, r17 ; info 19 } + { sb r25, r26 ; slt r15, r16, r17 ; pcnt r5, r6 } + { sb r25, r26 ; slt r15, r16, r17 ; srai r5, r6, 5 } + { sb r25, r26 ; slt r5, r6, r7 ; nor r15, r16, r17 } + { sb r25, r26 ; slt r5, r6, r7 ; sne r15, r16, r17 } + { sb r25, r26 ; slt_u r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { sb r25, r26 ; slt_u r15, r16, r17 ; s3a r5, r6, r7 } + { sb r25, r26 ; slt_u r15, r16, r17 ; tblidxb3 r5, r6 } + { sb r25, r26 ; slt_u r5, r6, r7 ; s1a r15, r16, r17 } + { sb r25, r26 ; slt_u r5, r6, r7 } + { sb r25, r26 ; slte r15, r16, r17 ; mulll_uu r5, r6, r7 } + { sb r25, r26 ; slte r15, r16, r17 ; shr r5, r6, r7 } + { sb r25, r26 ; slte r5, r6, r7 ; and r15, r16, r17 } + { sb r25, r26 ; slte r5, r6, r7 ; shl r15, r16, r17 } + { sb r25, r26 ; slte_u r15, r16, r17 ; bitx r5, r6 } + { sb r25, r26 ; slte_u r15, r16, r17 ; mz r5, r6, r7 } + { sb r25, r26 ; slte_u r15, r16, r17 ; slte_u r5, r6, r7 } + { sb r25, r26 ; slte_u r5, r6, r7 ; mnz r15, r16, r17 } + { sb r25, r26 ; slte_u r5, r6, r7 ; slt_u r15, r16, r17 } + { sb r25, r26 ; slti r15, r16, 5 ; info 19 } + { sb r25, r26 ; slti r15, r16, 5 ; pcnt r5, r6 } + { sb r25, r26 ; slti r15, r16, 5 ; srai r5, r6, 5 } + { sb r25, r26 ; slti r5, r6, 5 ; nor r15, r16, r17 } + { sb r25, r26 ; slti r5, r6, 5 ; sne r15, r16, r17 } + { sb r25, r26 ; slti_u r15, r16, 5 ; mulhh_uu r5, r6, r7 } + { sb r25, r26 ; slti_u r15, r16, 5 ; s3a r5, r6, r7 } + { sb r25, r26 ; slti_u r15, r16, 5 ; tblidxb3 r5, r6 } + { sb r25, r26 ; slti_u r5, r6, 5 ; s1a r15, r16, r17 } + { sb r25, r26 ; slti_u r5, r6, 5 } + { sb r25, r26 ; sne r15, r16, r17 ; mulll_uu r5, r6, r7 } + { sb r25, r26 ; sne r15, r16, r17 ; shr r5, r6, r7 } + { sb r25, r26 ; sne r5, r6, r7 ; and r15, r16, r17 } + { sb r25, r26 ; sne r5, r6, r7 ; shl r15, r16, r17 } + { sb r25, r26 ; sra r15, r16, r17 ; bitx r5, r6 } + { sb r25, r26 ; sra r15, r16, r17 ; mz r5, r6, r7 } + { sb r25, r26 ; sra r15, r16, r17 ; slte_u r5, r6, r7 } + { sb r25, r26 ; sra r5, r6, r7 ; mnz r15, r16, r17 } + { sb r25, r26 ; sra r5, r6, r7 ; slt_u r15, r16, r17 } + { sb r25, r26 ; srai r15, r16, 5 ; info 19 } + { sb r25, r26 ; srai r15, r16, 5 ; pcnt r5, r6 } + { sb r25, r26 ; srai r15, r16, 5 ; srai r5, r6, 5 } + { sb r25, r26 ; srai r5, r6, 5 ; nor r15, r16, r17 } + { sb r25, r26 ; srai r5, r6, 5 ; sne r15, r16, r17 } + { sb r25, r26 ; sub r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { sb r25, r26 ; sub r15, r16, r17 ; s3a r5, r6, r7 } + { sb r25, r26 ; sub r15, r16, r17 ; tblidxb3 r5, r6 } + { sb r25, r26 ; sub r5, r6, r7 ; s1a r15, r16, r17 } + { sb r25, r26 ; sub r5, r6, r7 } + { sb r25, r26 ; tblidxb0 r5, r6 ; s3a r15, r16, r17 } + { sb r25, r26 ; tblidxb1 r5, r6 ; addi r15, r16, 5 } + { sb r25, r26 ; tblidxb1 r5, r6 ; seqi r15, r16, 5 } + { sb r25, r26 ; tblidxb2 r5, r6 ; andi r15, r16, 5 } + { sb r25, r26 ; tblidxb2 r5, r6 ; shli r15, r16, 5 } + { sb r25, r26 ; tblidxb3 r5, r6 ; ill } + { sb r25, r26 ; tblidxb3 r5, r6 ; shri r15, r16, 5 } + { sb r25, r26 ; xor r15, r16, r17 ; ctz r5, r6 } + { sb r25, r26 ; xor r15, r16, r17 ; or r5, r6, r7 } + { sb r25, r26 ; xor r15, r16, r17 ; sne r5, r6, r7 } + { sb r25, r26 ; xor r5, r6, r7 ; mz r15, r16, r17 } + { sb r25, r26 ; xor r5, r6, r7 ; slti r15, r16, 5 } + { sbadd r15, r16, 5 ; adiffh r5, r6, r7 } + { sbadd r15, r16, 5 ; maxb_u r5, r6, r7 } + { sbadd r15, r16, 5 ; mulhha_su r5, r6, r7 } + { sbadd r15, r16, 5 ; mvz r5, r6, r7 } + { sbadd r15, r16, 5 ; sadah_u r5, r6, r7 } + { sbadd r15, r16, 5 ; shrib r5, r6, 5 } + { sbadd r15, r16, 5 ; sne r5, r6, r7 } + { sbadd r15, r16, 5 ; xori r5, r6, 5 } + { seq r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 } + { seq r15, r16, r17 ; and r5, r6, r7 ; sw r25, r26 } + { seq r15, r16, r17 ; bitx r5, r6 ; prefetch r25 } + { seq r15, r16, r17 ; clz r5, r6 ; prefetch r25 } + { seq r15, r16, r17 ; fnop ; lh r25, r26 } + { seq r15, r16, r17 ; inthh r5, r6, r7 } + { seq r15, r16, r17 ; lb r25, r26 ; mulhlsa_uu r5, r6, r7 } + { seq r15, r16, r17 ; lb r25, r26 ; shl r5, r6, r7 } + { seq r15, r16, r17 ; lb_u r25, r26 ; add r5, r6, r7 } + { seq r15, r16, r17 ; lb_u r25, r26 ; mullla_ss r5, r6, r7 } + { seq r15, r16, r17 ; lb_u r25, r26 ; shri r5, r6, 5 } + { seq r15, r16, r17 ; lh r25, r26 ; andi r5, r6, 5 } + { seq r15, r16, r17 ; lh r25, r26 ; mvz r5, r6, r7 } + { seq r15, r16, r17 ; lh r25, r26 ; slte r5, r6, r7 } + { seq r15, r16, r17 ; lh_u r25, r26 ; clz r5, r6 } + { seq r15, r16, r17 ; lh_u r25, r26 ; nor r5, r6, r7 } + { seq r15, r16, r17 ; lh_u r25, r26 ; slti_u r5, r6, 5 } + { seq r15, r16, r17 ; lw r25, r26 ; info 19 } + { seq r15, r16, r17 ; lw r25, r26 ; pcnt r5, r6 } + { seq r15, r16, r17 ; lw r25, r26 ; srai r5, r6, 5 } + { seq r15, r16, r17 ; mnz r5, r6, r7 ; lh_u r25, r26 } + { seq r15, r16, r17 ; movei r5, 5 ; lb_u r25, r26 } + { seq r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { seq r15, r16, r17 ; mulhha_ss r5, r6, r7 ; sw r25, r26 } + { seq r15, r16, r17 ; mulhla_us r5, r6, r7 } + { seq r15, r16, r17 ; mulll_ss r5, r6, r7 ; sw r25, r26 } + { seq r15, r16, r17 ; mullla_ss r5, r6, r7 ; sh r25, r26 } + { seq r15, r16, r17 ; mvnz r5, r6, r7 ; prefetch r25 } + { seq r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } + { seq r15, r16, r17 ; nor r5, r6, r7 ; lh_u r25, r26 } + { seq r15, r16, r17 ; ori r5, r6, 5 ; lh_u r25, r26 } + { seq r15, r16, r17 ; pcnt r5, r6 } + { seq r15, r16, r17 ; prefetch r25 ; mulll_uu r5, r6, r7 } + { seq r15, r16, r17 ; prefetch r25 ; shr r5, r6, r7 } + { seq r15, r16, r17 ; rl r5, r6, r7 ; lh r25, r26 } + { seq r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 } + { seq r15, r16, r17 ; s3a r5, r6, r7 ; lh r25, r26 } + { seq r15, r16, r17 ; sb r25, r26 ; clz r5, r6 } + { seq r15, r16, r17 ; sb r25, r26 ; nor r5, r6, r7 } + { seq r15, r16, r17 ; sb r25, r26 ; slti_u r5, r6, 5 } + { seq r15, r16, r17 ; seq r5, r6, r7 } + { seq r15, r16, r17 ; sh r25, r26 ; bytex r5, r6 } + { seq r15, r16, r17 ; sh r25, r26 ; nop } + { seq r15, r16, r17 ; sh r25, r26 ; slti r5, r6, 5 } + { seq r15, r16, r17 ; shl r5, r6, r7 ; sw r25, r26 } + { seq r15, r16, r17 ; shr r5, r6, r7 ; lw r25, r26 } + { seq r15, r16, r17 ; slt r5, r6, r7 ; lb r25, r26 } + { seq r15, r16, r17 ; sltb r5, r6, r7 } + { seq r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 } + { seq r15, r16, r17 ; slti_u r5, r6, 5 ; lh r25, r26 } + { seq r15, r16, r17 ; sne r5, r6, r7 ; sw r25, r26 } + { seq r15, r16, r17 ; srai r5, r6, 5 ; lw r25, r26 } + { seq r15, r16, r17 ; subh r5, r6, r7 } + { seq r15, r16, r17 ; sw r25, r26 ; mulhlsa_uu r5, r6, r7 } + { seq r15, r16, r17 ; sw r25, r26 ; shl r5, r6, r7 } + { seq r15, r16, r17 ; tblidxb0 r5, r6 ; lb r25, r26 } + { seq r15, r16, r17 ; tblidxb2 r5, r6 ; lb r25, r26 } + { seq r15, r16, r17 ; xor r5, r6, r7 ; lb r25, r26 } + { seq r5, r6, r7 ; add r15, r16, r17 } + { seq r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 } + { seq r5, r6, r7 ; auli r15, r16, 0x1234 } + { seq r5, r6, r7 ; ill ; prefetch r25 } + { seq r5, r6, r7 ; inv r15 } + { seq r5, r6, r7 ; lb r25, r26 ; or r15, r16, r17 } + { seq r5, r6, r7 ; lb r25, r26 ; sra r15, r16, r17 } + { seq r5, r6, r7 ; lb_u r25, r26 ; ori r15, r16, 5 } + { seq r5, r6, r7 ; lb_u r25, r26 ; srai r15, r16, 5 } + { seq r5, r6, r7 ; lh r25, r26 ; or r15, r16, r17 } + { seq r5, r6, r7 ; lh r25, r26 ; sra r15, r16, r17 } + { seq r5, r6, r7 ; lh_u r25, r26 ; ori r15, r16, 5 } + { seq r5, r6, r7 ; lh_u r25, r26 ; srai r15, r16, 5 } + { seq r5, r6, r7 ; lw r25, r26 ; nor r15, r16, r17 } + { seq r5, r6, r7 ; lw r25, r26 ; sne r15, r16, r17 } + { seq r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 } + { seq r5, r6, r7 ; move r15, r16 ; sw r25, r26 } + { seq r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } + { seq r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 } + { seq r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 } + { seq r5, r6, r7 ; prefetch r25 ; move r15, r16 } + { seq r5, r6, r7 ; prefetch r25 ; slte r15, r16, r17 } + { seq r5, r6, r7 ; rl r15, r16, r17 } + { seq r5, r6, r7 ; s1a r15, r16, r17 } + { seq r5, r6, r7 ; s3a r15, r16, r17 } + { seq r5, r6, r7 ; sb r25, r26 ; s2a r15, r16, r17 } + { seq r5, r6, r7 ; sbadd r15, r16, 5 } + { seq r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 } + { seq r5, r6, r7 ; sh r25, r26 ; ori r15, r16, 5 } + { seq r5, r6, r7 ; sh r25, r26 ; srai r15, r16, 5 } + { seq r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 } + { seq r5, r6, r7 ; shrh r15, r16, r17 } + { seq r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 } + { seq r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 } + { seq r5, r6, r7 ; slth_u r15, r16, r17 } + { seq r5, r6, r7 ; slti_u r15, r16, 5 } + { seq r5, r6, r7 ; sra r15, r16, r17 ; lh_u r25, r26 } + { seq r5, r6, r7 ; sraih r15, r16, 5 } + { seq r5, r6, r7 ; sw r25, r26 ; andi r15, r16, 5 } + { seq r5, r6, r7 ; sw r25, r26 ; shli r15, r16, 5 } + { seq r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 } + { seqb r15, r16, r17 ; adiffb_u r5, r6, r7 } + { seqb r15, r16, r17 ; intlh r5, r6, r7 } + { seqb r15, r16, r17 ; mulhha_ss r5, r6, r7 } + { seqb r15, r16, r17 ; mvnz r5, r6, r7 } + { seqb r15, r16, r17 ; sadah r5, r6, r7 } + { seqb r15, r16, r17 ; shri r5, r6, 5 } + { seqb r15, r16, r17 ; sltih_u r5, r6, 5 } + { seqb r15, r16, r17 ; xor r5, r6, r7 } + { seqb r5, r6, r7 ; icoh r15 } + { seqb r5, r6, r7 ; lhadd r15, r16, 5 } + { seqb r5, r6, r7 ; mnzh r15, r16, r17 } + { seqb r5, r6, r7 ; rli r15, r16, 5 } + { seqb r5, r6, r7 ; shr r15, r16, r17 } + { seqb r5, r6, r7 ; sltib r15, r16, 5 } + { seqb r5, r6, r7 ; swadd r15, r16, 5 } + { seqh r15, r16, r17 ; auli r5, r6, 0x1234 } + { seqh r15, r16, r17 ; maxih r5, r6, 5 } + { seqh r15, r16, r17 ; mulhl_ss r5, r6, r7 } + { seqh r15, r16, r17 ; mzh r5, r6, r7 } + { seqh r15, r16, r17 ; sadh_u r5, r6, r7 } + { seqh r15, r16, r17 ; slt_u r5, r6, r7 } + { seqh r15, r16, r17 ; sra r5, r6, r7 } + { seqh r5, r6, r7 ; addbs_u r15, r16, r17 } + { seqh r5, r6, r7 ; inthb r15, r16, r17 } + { seqh r5, r6, r7 ; lw_na r15, r16 } + { seqh r5, r6, r7 ; movelis r15, 0x1234 } + { seqh r5, r6, r7 ; sb r15, r16 } + { seqh r5, r6, r7 ; shrib r15, r16, 5 } + { seqh r5, r6, r7 ; sne r15, r16, r17 } + { seqh r5, r6, r7 ; xori r15, r16, 5 } + { seqi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 } + { seqi r15, r16, 5 ; and r5, r6, r7 ; sw r25, r26 } + { seqi r15, r16, 5 ; bitx r5, r6 ; prefetch r25 } + { seqi r15, r16, 5 ; clz r5, r6 ; prefetch r25 } + { seqi r15, r16, 5 ; fnop ; lh r25, r26 } + { seqi r15, r16, 5 ; inthh r5, r6, r7 } + { seqi r15, r16, 5 ; lb r25, r26 ; mulhlsa_uu r5, r6, r7 } + { seqi r15, r16, 5 ; lb r25, r26 ; shl r5, r6, r7 } + { seqi r15, r16, 5 ; lb_u r25, r26 ; add r5, r6, r7 } + { seqi r15, r16, 5 ; lb_u r25, r26 ; mullla_ss r5, r6, r7 } + { seqi r15, r16, 5 ; lb_u r25, r26 ; shri r5, r6, 5 } + { seqi r15, r16, 5 ; lh r25, r26 ; andi r5, r6, 5 } + { seqi r15, r16, 5 ; lh r25, r26 ; mvz r5, r6, r7 } + { seqi r15, r16, 5 ; lh r25, r26 ; slte r5, r6, r7 } + { seqi r15, r16, 5 ; lh_u r25, r26 ; clz r5, r6 } + { seqi r15, r16, 5 ; lh_u r25, r26 ; nor r5, r6, r7 } + { seqi r15, r16, 5 ; lh_u r25, r26 ; slti_u r5, r6, 5 } + { seqi r15, r16, 5 ; lw r25, r26 ; info 19 } + { seqi r15, r16, 5 ; lw r25, r26 ; pcnt r5, r6 } + { seqi r15, r16, 5 ; lw r25, r26 ; srai r5, r6, 5 } + { seqi r15, r16, 5 ; mnz r5, r6, r7 ; lh_u r25, r26 } + { seqi r15, r16, 5 ; movei r5, 5 ; lb_u r25, r26 } + { seqi r15, r16, 5 ; mulhh_ss r5, r6, r7 } + { seqi r15, r16, 5 ; mulhha_ss r5, r6, r7 ; sw r25, r26 } + { seqi r15, r16, 5 ; mulhla_us r5, r6, r7 } + { seqi r15, r16, 5 ; mulll_ss r5, r6, r7 ; sw r25, r26 } + { seqi r15, r16, 5 ; mullla_ss r5, r6, r7 ; sh r25, r26 } + { seqi r15, r16, 5 ; mvnz r5, r6, r7 ; prefetch r25 } + { seqi r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 } + { seqi r15, r16, 5 ; nor r5, r6, r7 ; lh_u r25, r26 } + { seqi r15, r16, 5 ; ori r5, r6, 5 ; lh_u r25, r26 } + { seqi r15, r16, 5 ; pcnt r5, r6 } + { seqi r15, r16, 5 ; prefetch r25 ; mulll_uu r5, r6, r7 } + { seqi r15, r16, 5 ; prefetch r25 ; shr r5, r6, r7 } + { seqi r15, r16, 5 ; rl r5, r6, r7 ; lh r25, r26 } + { seqi r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 } + { seqi r15, r16, 5 ; s3a r5, r6, r7 ; lh r25, r26 } + { seqi r15, r16, 5 ; sb r25, r26 ; clz r5, r6 } + { seqi r15, r16, 5 ; sb r25, r26 ; nor r5, r6, r7 } + { seqi r15, r16, 5 ; sb r25, r26 ; slti_u r5, r6, 5 } + { seqi r15, r16, 5 ; seq r5, r6, r7 } + { seqi r15, r16, 5 ; sh r25, r26 ; bytex r5, r6 } + { seqi r15, r16, 5 ; sh r25, r26 ; nop } + { seqi r15, r16, 5 ; sh r25, r26 ; slti r5, r6, 5 } + { seqi r15, r16, 5 ; shl r5, r6, r7 ; sw r25, r26 } + { seqi r15, r16, 5 ; shr r5, r6, r7 ; lw r25, r26 } + { seqi r15, r16, 5 ; slt r5, r6, r7 ; lb r25, r26 } + { seqi r15, r16, 5 ; sltb r5, r6, r7 } + { seqi r15, r16, 5 ; slte_u r5, r6, r7 ; sw r25, r26 } + { seqi r15, r16, 5 ; slti_u r5, r6, 5 ; lh r25, r26 } + { seqi r15, r16, 5 ; sne r5, r6, r7 ; sw r25, r26 } + { seqi r15, r16, 5 ; srai r5, r6, 5 ; lw r25, r26 } + { seqi r15, r16, 5 ; subh r5, r6, r7 } + { seqi r15, r16, 5 ; sw r25, r26 ; mulhlsa_uu r5, r6, r7 } + { seqi r15, r16, 5 ; sw r25, r26 ; shl r5, r6, r7 } + { seqi r15, r16, 5 ; tblidxb0 r5, r6 ; lb r25, r26 } + { seqi r15, r16, 5 ; tblidxb2 r5, r6 ; lb r25, r26 } + { seqi r15, r16, 5 ; xor r5, r6, r7 ; lb r25, r26 } + { seqi r5, r6, 5 ; add r15, r16, r17 } + { seqi r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 } + { seqi r5, r6, 5 ; auli r15, r16, 0x1234 } + { seqi r5, r6, 5 ; ill ; prefetch r25 } + { seqi r5, r6, 5 ; inv r15 } + { seqi r5, r6, 5 ; lb r25, r26 ; or r15, r16, r17 } + { seqi r5, r6, 5 ; lb r25, r26 ; sra r15, r16, r17 } + { seqi r5, r6, 5 ; lb_u r25, r26 ; ori r15, r16, 5 } + { seqi r5, r6, 5 ; lb_u r25, r26 ; srai r15, r16, 5 } + { seqi r5, r6, 5 ; lh r25, r26 ; or r15, r16, r17 } + { seqi r5, r6, 5 ; lh r25, r26 ; sra r15, r16, r17 } + { seqi r5, r6, 5 ; lh_u r25, r26 ; ori r15, r16, 5 } + { seqi r5, r6, 5 ; lh_u r25, r26 ; srai r15, r16, 5 } + { seqi r5, r6, 5 ; lw r25, r26 ; nor r15, r16, r17 } + { seqi r5, r6, 5 ; lw r25, r26 ; sne r15, r16, r17 } + { seqi r5, r6, 5 ; mnz r15, r16, r17 ; lb r25, r26 } + { seqi r5, r6, 5 ; move r15, r16 ; sw r25, r26 } + { seqi r5, r6, 5 ; mz r15, r16, r17 ; prefetch r25 } + { seqi r5, r6, 5 ; nor r15, r16, r17 ; lh_u r25, r26 } + { seqi r5, r6, 5 ; ori r15, r16, 5 ; lh_u r25, r26 } + { seqi r5, r6, 5 ; prefetch r25 ; move r15, r16 } + { seqi r5, r6, 5 ; prefetch r25 ; slte r15, r16, r17 } + { seqi r5, r6, 5 ; rl r15, r16, r17 } + { seqi r5, r6, 5 ; s1a r15, r16, r17 } + { seqi r5, r6, 5 ; s3a r15, r16, r17 } + { seqi r5, r6, 5 ; sb r25, r26 ; s2a r15, r16, r17 } + { seqi r5, r6, 5 ; sbadd r15, r16, 5 } + { seqi r5, r6, 5 ; seqi r15, r16, 5 ; sh r25, r26 } + { seqi r5, r6, 5 ; sh r25, r26 ; ori r15, r16, 5 } + { seqi r5, r6, 5 ; sh r25, r26 ; srai r15, r16, 5 } + { seqi r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 } + { seqi r5, r6, 5 ; shrh r15, r16, r17 } + { seqi r5, r6, 5 ; slt r15, r16, r17 ; sh r25, r26 } + { seqi r5, r6, 5 ; slte r15, r16, r17 ; prefetch r25 } + { seqi r5, r6, 5 ; slth_u r15, r16, r17 } + { seqi r5, r6, 5 ; slti_u r15, r16, 5 } + { seqi r5, r6, 5 ; sra r15, r16, r17 ; lh_u r25, r26 } + { seqi r5, r6, 5 ; sraih r15, r16, 5 } + { seqi r5, r6, 5 ; sw r25, r26 ; andi r15, r16, 5 } + { seqi r5, r6, 5 ; sw r25, r26 ; shli r15, r16, 5 } + { seqi r5, r6, 5 ; xor r15, r16, r17 ; lh r25, r26 } + { seqib r15, r16, 5 ; adiffb_u r5, r6, r7 } + { seqib r15, r16, 5 ; intlh r5, r6, r7 } + { seqib r15, r16, 5 ; mulhha_ss r5, r6, r7 } + { seqib r15, r16, 5 ; mvnz r5, r6, r7 } + { seqib r15, r16, 5 ; sadah r5, r6, r7 } + { seqib r15, r16, 5 ; shri r5, r6, 5 } + { seqib r15, r16, 5 ; sltih_u r5, r6, 5 } + { seqib r15, r16, 5 ; xor r5, r6, r7 } + { seqib r5, r6, 5 ; icoh r15 } + { seqib r5, r6, 5 ; lhadd r15, r16, 5 } + { seqib r5, r6, 5 ; mnzh r15, r16, r17 } + { seqib r5, r6, 5 ; rli r15, r16, 5 } + { seqib r5, r6, 5 ; shr r15, r16, r17 } + { seqib r5, r6, 5 ; sltib r15, r16, 5 } + { seqib r5, r6, 5 ; swadd r15, r16, 5 } + { seqih r15, r16, 5 ; auli r5, r6, 0x1234 } + { seqih r15, r16, 5 ; maxih r5, r6, 5 } + { seqih r15, r16, 5 ; mulhl_ss r5, r6, r7 } + { seqih r15, r16, 5 ; mzh r5, r6, r7 } + { seqih r15, r16, 5 ; sadh_u r5, r6, r7 } + { seqih r15, r16, 5 ; slt_u r5, r6, r7 } + { seqih r15, r16, 5 ; sra r5, r6, r7 } + { seqih r5, r6, 5 ; addbs_u r15, r16, r17 } + { seqih r5, r6, 5 ; inthb r15, r16, r17 } + { seqih r5, r6, 5 ; lw_na r15, r16 } + { seqih r5, r6, 5 ; movelis r15, 0x1234 } + { seqih r5, r6, 5 ; sb r15, r16 } + { seqih r5, r6, 5 ; shrib r15, r16, 5 } + { seqih r5, r6, 5 ; sne r15, r16, r17 } + { seqih r5, r6, 5 ; xori r15, r16, 5 } + { sh r15, r16 ; bytex r5, r6 } + { sh r15, r16 ; minih r5, r6, 5 } + { sh r15, r16 ; mulhla_ss r5, r6, r7 } + { sh r15, r16 ; ori r5, r6, 5 } + { sh r15, r16 ; seqi r5, r6, 5 } + { sh r15, r16 ; slte_u r5, r6, r7 } + { sh r15, r16 ; sraib r5, r6, 5 } + { sh r25, r26 ; add r15, r16, r17 ; clz r5, r6 } + { sh r25, r26 ; add r15, r16, r17 ; nor r5, r6, r7 } + { sh r25, r26 ; add r15, r16, r17 ; slti_u r5, r6, 5 } + { sh r25, r26 ; add r5, r6, r7 ; movei r15, 5 } + { sh r25, r26 ; add r5, r6, r7 ; slte_u r15, r16, r17 } + { sh r25, r26 ; addi r15, r16, 5 ; move r5, r6 } + { sh r25, r26 ; addi r15, r16, 5 ; rli r5, r6, 5 } + { sh r25, r26 ; addi r15, r16, 5 ; tblidxb0 r5, r6 } + { sh r25, r26 ; addi r5, r6, 5 ; ori r15, r16, 5 } + { sh r25, r26 ; addi r5, r6, 5 ; srai r15, r16, 5 } + { sh r25, r26 ; and r15, r16, r17 ; mulhha_uu r5, r6, r7 } + { sh r25, r26 ; and r15, r16, r17 ; seqi r5, r6, 5 } + { sh r25, r26 ; and r15, r16, r17 } + { sh r25, r26 ; and r5, r6, r7 ; s3a r15, r16, r17 } + { sh r25, r26 ; andi r15, r16, 5 ; addi r5, r6, 5 } + { sh r25, r26 ; andi r15, r16, 5 ; mullla_uu r5, r6, r7 } + { sh r25, r26 ; andi r15, r16, 5 ; slt r5, r6, r7 } + { sh r25, r26 ; andi r5, r6, 5 ; fnop } + { sh r25, r26 ; andi r5, r6, 5 ; shr r15, r16, r17 } + { sh r25, r26 ; bitx r5, r6 ; info 19 } + { sh r25, r26 ; bitx r5, r6 ; slt r15, r16, r17 } + { sh r25, r26 ; bytex r5, r6 ; move r15, r16 } + { sh r25, r26 ; bytex r5, r6 ; slte r15, r16, r17 } + { sh r25, r26 ; clz r5, r6 ; mz r15, r16, r17 } + { sh r25, r26 ; clz r5, r6 ; slti r15, r16, 5 } + { sh r25, r26 ; ctz r5, r6 ; nor r15, r16, r17 } + { sh r25, r26 ; ctz r5, r6 ; sne r15, r16, r17 } + { sh r25, r26 ; fnop ; info 19 } + { sh r25, r26 ; fnop ; nop } + { sh r25, r26 ; fnop ; seqi r15, r16, 5 } + { sh r25, r26 ; fnop ; slti_u r15, r16, 5 } + { sh r25, r26 ; ill ; andi r5, r6, 5 } + { sh r25, r26 ; ill ; mvz r5, r6, r7 } + { sh r25, r26 ; ill ; slte r5, r6, r7 } + { sh r25, r26 ; info 19 ; andi r15, r16, 5 } + { sh r25, r26 ; info 19 ; mulll_ss r5, r6, r7 } + { sh r25, r26 ; info 19 ; s1a r15, r16, r17 } + { sh r25, r26 ; info 19 ; slt_u r15, r16, r17 } + { sh r25, r26 ; info 19 ; tblidxb2 r5, r6 } + { sh r25, r26 ; mnz r15, r16, r17 ; mulhha_ss r5, r6, r7 } + { sh r25, r26 ; mnz r15, r16, r17 ; seq r5, r6, r7 } + { sh r25, r26 ; mnz r15, r16, r17 ; xor r5, r6, r7 } + { sh r25, r26 ; mnz r5, r6, r7 ; s2a r15, r16, r17 } + { sh r25, r26 ; move r15, r16 ; add r5, r6, r7 } + { sh r25, r26 ; move r15, r16 ; mullla_ss r5, r6, r7 } + { sh r25, r26 ; move r15, r16 ; shri r5, r6, 5 } + { sh r25, r26 ; move r5, r6 ; andi r15, r16, 5 } + { sh r25, r26 ; move r5, r6 ; shli r15, r16, 5 } + { sh r25, r26 ; movei r15, 5 ; bytex r5, r6 } + { sh r25, r26 ; movei r15, 5 ; nop } + { sh r25, r26 ; movei r15, 5 ; slti r5, r6, 5 } + { sh r25, r26 ; movei r5, 5 ; move r15, r16 } + { sh r25, r26 ; movei r5, 5 ; slte r15, r16, r17 } + { sh r25, r26 ; mulhh_ss r5, r6, r7 ; mz r15, r16, r17 } + { sh r25, r26 ; mulhh_ss r5, r6, r7 ; slti r15, r16, 5 } + { sh r25, r26 ; mulhh_uu r5, r6, r7 ; nor r15, r16, r17 } + { sh r25, r26 ; mulhh_uu r5, r6, r7 ; sne r15, r16, r17 } + { sh r25, r26 ; mulhha_ss r5, r6, r7 ; ori r15, r16, 5 } + { sh r25, r26 ; mulhha_ss r5, r6, r7 ; srai r15, r16, 5 } + { sh r25, r26 ; mulhha_uu r5, r6, r7 ; rli r15, r16, 5 } + { sh r25, r26 ; mulhha_uu r5, r6, r7 ; xor r15, r16, r17 } + { sh r25, r26 ; mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 } + { sh r25, r26 ; mulll_ss r5, r6, r7 ; add r15, r16, r17 } + { sh r25, r26 ; mulll_ss r5, r6, r7 ; seq r15, r16, r17 } + { sh r25, r26 ; mulll_uu r5, r6, r7 ; and r15, r16, r17 } + { sh r25, r26 ; mulll_uu r5, r6, r7 ; shl r15, r16, r17 } + { sh r25, r26 ; mullla_ss r5, r6, r7 ; fnop } + { sh r25, r26 ; mullla_ss r5, r6, r7 ; shr r15, r16, r17 } + { sh r25, r26 ; mullla_uu r5, r6, r7 ; info 19 } + { sh r25, r26 ; mullla_uu r5, r6, r7 ; slt r15, r16, r17 } + { sh r25, r26 ; mvnz r5, r6, r7 ; move r15, r16 } + { sh r25, r26 ; mvnz r5, r6, r7 ; slte r15, r16, r17 } + { sh r25, r26 ; mvz r5, r6, r7 ; mz r15, r16, r17 } + { sh r25, r26 ; mvz r5, r6, r7 ; slti r15, r16, 5 } + { sh r25, r26 ; mz r15, r16, r17 ; movei r5, 5 } + { sh r25, r26 ; mz r15, r16, r17 ; s1a r5, r6, r7 } + { sh r25, r26 ; mz r15, r16, r17 ; tblidxb1 r5, r6 } + { sh r25, r26 ; mz r5, r6, r7 ; rl r15, r16, r17 } + { sh r25, r26 ; mz r5, r6, r7 ; sub r15, r16, r17 } + { sh r25, r26 ; nop ; move r15, r16 } + { sh r25, r26 ; nop ; or r15, r16, r17 } + { sh r25, r26 ; nop ; shl r5, r6, r7 } + { sh r25, r26 ; nop ; sne r5, r6, r7 } + { sh r25, r26 ; nor r15, r16, r17 ; clz r5, r6 } + { sh r25, r26 ; nor r15, r16, r17 ; nor r5, r6, r7 } + { sh r25, r26 ; nor r15, r16, r17 ; slti_u r5, r6, 5 } + { sh r25, r26 ; nor r5, r6, r7 ; movei r15, 5 } + { sh r25, r26 ; nor r5, r6, r7 ; slte_u r15, r16, r17 } + { sh r25, r26 ; or r15, r16, r17 ; move r5, r6 } + { sh r25, r26 ; or r15, r16, r17 ; rli r5, r6, 5 } + { sh r25, r26 ; or r15, r16, r17 ; tblidxb0 r5, r6 } + { sh r25, r26 ; or r5, r6, r7 ; ori r15, r16, 5 } + { sh r25, r26 ; or r5, r6, r7 ; srai r15, r16, 5 } + { sh r25, r26 ; ori r15, r16, 5 ; mulhha_uu r5, r6, r7 } + { sh r25, r26 ; ori r15, r16, 5 ; seqi r5, r6, 5 } + { sh r25, r26 ; ori r15, r16, 5 } + { sh r25, r26 ; ori r5, r6, 5 ; s3a r15, r16, r17 } + { sh r25, r26 ; pcnt r5, r6 ; addi r15, r16, 5 } + { sh r25, r26 ; pcnt r5, r6 ; seqi r15, r16, 5 } + { sh r25, r26 ; rl r15, r16, r17 ; andi r5, r6, 5 } + { sh r25, r26 ; rl r15, r16, r17 ; mvz r5, r6, r7 } + { sh r25, r26 ; rl r15, r16, r17 ; slte r5, r6, r7 } + { sh r25, r26 ; rl r5, r6, r7 ; info 19 } + { sh r25, r26 ; rl r5, r6, r7 ; slt r15, r16, r17 } + { sh r25, r26 ; rli r15, r16, 5 ; fnop } + { sh r25, r26 ; rli r15, r16, 5 ; ori r5, r6, 5 } + { sh r25, r26 ; rli r15, r16, 5 ; sra r5, r6, r7 } + { sh r25, r26 ; rli r5, r6, 5 ; nop } + { sh r25, r26 ; rli r5, r6, 5 ; slti_u r15, r16, 5 } + { sh r25, r26 ; s1a r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { sh r25, r26 ; s1a r15, r16, r17 ; s2a r5, r6, r7 } + { sh r25, r26 ; s1a r15, r16, r17 ; tblidxb2 r5, r6 } + { sh r25, r26 ; s1a r5, r6, r7 ; rli r15, r16, 5 } + { sh r25, r26 ; s1a r5, r6, r7 ; xor r15, r16, r17 } + { sh r25, r26 ; s2a r15, r16, r17 ; mulll_ss r5, r6, r7 } + { sh r25, r26 ; s2a r15, r16, r17 ; shli r5, r6, 5 } + { sh r25, r26 ; s2a r5, r6, r7 ; addi r15, r16, 5 } + { sh r25, r26 ; s2a r5, r6, r7 ; seqi r15, r16, 5 } + { sh r25, r26 ; s3a r15, r16, r17 ; andi r5, r6, 5 } + { sh r25, r26 ; s3a r15, r16, r17 ; mvz r5, r6, r7 } + { sh r25, r26 ; s3a r15, r16, r17 ; slte r5, r6, r7 } + { sh r25, r26 ; s3a r5, r6, r7 ; info 19 } + { sh r25, r26 ; s3a r5, r6, r7 ; slt r15, r16, r17 } + { sh r25, r26 ; seq r15, r16, r17 ; fnop } + { sh r25, r26 ; seq r15, r16, r17 ; ori r5, r6, 5 } + { sh r25, r26 ; seq r15, r16, r17 ; sra r5, r6, r7 } + { sh r25, r26 ; seq r5, r6, r7 ; nop } + { sh r25, r26 ; seq r5, r6, r7 ; slti_u r15, r16, 5 } + { sh r25, r26 ; seqi r15, r16, 5 ; mulhh_ss r5, r6, r7 } + { sh r25, r26 ; seqi r15, r16, 5 ; s2a r5, r6, r7 } + { sh r25, r26 ; seqi r15, r16, 5 ; tblidxb2 r5, r6 } + { sh r25, r26 ; seqi r5, r6, 5 ; rli r15, r16, 5 } + { sh r25, r26 ; seqi r5, r6, 5 ; xor r15, r16, r17 } + { sh r25, r26 ; shl r15, r16, r17 ; mulll_ss r5, r6, r7 } + { sh r25, r26 ; shl r15, r16, r17 ; shli r5, r6, 5 } + { sh r25, r26 ; shl r5, r6, r7 ; addi r15, r16, 5 } + { sh r25, r26 ; shl r5, r6, r7 ; seqi r15, r16, 5 } + { sh r25, r26 ; shli r15, r16, 5 ; andi r5, r6, 5 } + { sh r25, r26 ; shli r15, r16, 5 ; mvz r5, r6, r7 } + { sh r25, r26 ; shli r15, r16, 5 ; slte r5, r6, r7 } + { sh r25, r26 ; shli r5, r6, 5 ; info 19 } + { sh r25, r26 ; shli r5, r6, 5 ; slt r15, r16, r17 } + { sh r25, r26 ; shr r15, r16, r17 ; fnop } + { sh r25, r26 ; shr r15, r16, r17 ; ori r5, r6, 5 } + { sh r25, r26 ; shr r15, r16, r17 ; sra r5, r6, r7 } + { sh r25, r26 ; shr r5, r6, r7 ; nop } + { sh r25, r26 ; shr r5, r6, r7 ; slti_u r15, r16, 5 } + { sh r25, r26 ; shri r15, r16, 5 ; mulhh_ss r5, r6, r7 } + { sh r25, r26 ; shri r15, r16, 5 ; s2a r5, r6, r7 } + { sh r25, r26 ; shri r15, r16, 5 ; tblidxb2 r5, r6 } + { sh r25, r26 ; shri r5, r6, 5 ; rli r15, r16, 5 } + { sh r25, r26 ; shri r5, r6, 5 ; xor r15, r16, r17 } + { sh r25, r26 ; slt r15, r16, r17 ; mulll_ss r5, r6, r7 } + { sh r25, r26 ; slt r15, r16, r17 ; shli r5, r6, 5 } + { sh r25, r26 ; slt r5, r6, r7 ; addi r15, r16, 5 } + { sh r25, r26 ; slt r5, r6, r7 ; seqi r15, r16, 5 } + { sh r25, r26 ; slt_u r15, r16, r17 ; andi r5, r6, 5 } + { sh r25, r26 ; slt_u r15, r16, r17 ; mvz r5, r6, r7 } + { sh r25, r26 ; slt_u r15, r16, r17 ; slte r5, r6, r7 } + { sh r25, r26 ; slt_u r5, r6, r7 ; info 19 } + { sh r25, r26 ; slt_u r5, r6, r7 ; slt r15, r16, r17 } + { sh r25, r26 ; slte r15, r16, r17 ; fnop } + { sh r25, r26 ; slte r15, r16, r17 ; ori r5, r6, 5 } + { sh r25, r26 ; slte r15, r16, r17 ; sra r5, r6, r7 } + { sh r25, r26 ; slte r5, r6, r7 ; nop } + { sh r25, r26 ; slte r5, r6, r7 ; slti_u r15, r16, 5 } + { sh r25, r26 ; slte_u r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { sh r25, r26 ; slte_u r15, r16, r17 ; s2a r5, r6, r7 } + { sh r25, r26 ; slte_u r15, r16, r17 ; tblidxb2 r5, r6 } + { sh r25, r26 ; slte_u r5, r6, r7 ; rli r15, r16, 5 } + { sh r25, r26 ; slte_u r5, r6, r7 ; xor r15, r16, r17 } + { sh r25, r26 ; slti r15, r16, 5 ; mulll_ss r5, r6, r7 } + { sh r25, r26 ; slti r15, r16, 5 ; shli r5, r6, 5 } + { sh r25, r26 ; slti r5, r6, 5 ; addi r15, r16, 5 } + { sh r25, r26 ; slti r5, r6, 5 ; seqi r15, r16, 5 } + { sh r25, r26 ; slti_u r15, r16, 5 ; andi r5, r6, 5 } + { sh r25, r26 ; slti_u r15, r16, 5 ; mvz r5, r6, r7 } + { sh r25, r26 ; slti_u r15, r16, 5 ; slte r5, r6, r7 } + { sh r25, r26 ; slti_u r5, r6, 5 ; info 19 } + { sh r25, r26 ; slti_u r5, r6, 5 ; slt r15, r16, r17 } + { sh r25, r26 ; sne r15, r16, r17 ; fnop } + { sh r25, r26 ; sne r15, r16, r17 ; ori r5, r6, 5 } + { sh r25, r26 ; sne r15, r16, r17 ; sra r5, r6, r7 } + { sh r25, r26 ; sne r5, r6, r7 ; nop } + { sh r25, r26 ; sne r5, r6, r7 ; slti_u r15, r16, 5 } + { sh r25, r26 ; sra r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { sh r25, r26 ; sra r15, r16, r17 ; s2a r5, r6, r7 } + { sh r25, r26 ; sra r15, r16, r17 ; tblidxb2 r5, r6 } + { sh r25, r26 ; sra r5, r6, r7 ; rli r15, r16, 5 } + { sh r25, r26 ; sra r5, r6, r7 ; xor r15, r16, r17 } + { sh r25, r26 ; srai r15, r16, 5 ; mulll_ss r5, r6, r7 } + { sh r25, r26 ; srai r15, r16, 5 ; shli r5, r6, 5 } + { sh r25, r26 ; srai r5, r6, 5 ; addi r15, r16, 5 } + { sh r25, r26 ; srai r5, r6, 5 ; seqi r15, r16, 5 } + { sh r25, r26 ; sub r15, r16, r17 ; andi r5, r6, 5 } + { sh r25, r26 ; sub r15, r16, r17 ; mvz r5, r6, r7 } + { sh r25, r26 ; sub r15, r16, r17 ; slte r5, r6, r7 } + { sh r25, r26 ; sub r5, r6, r7 ; info 19 } + { sh r25, r26 ; sub r5, r6, r7 ; slt r15, r16, r17 } + { sh r25, r26 ; tblidxb0 r5, r6 ; move r15, r16 } + { sh r25, r26 ; tblidxb0 r5, r6 ; slte r15, r16, r17 } + { sh r25, r26 ; tblidxb1 r5, r6 ; mz r15, r16, r17 } + { sh r25, r26 ; tblidxb1 r5, r6 ; slti r15, r16, 5 } + { sh r25, r26 ; tblidxb2 r5, r6 ; nor r15, r16, r17 } + { sh r25, r26 ; tblidxb2 r5, r6 ; sne r15, r16, r17 } + { sh r25, r26 ; tblidxb3 r5, r6 ; ori r15, r16, 5 } + { sh r25, r26 ; tblidxb3 r5, r6 ; srai r15, r16, 5 } + { sh r25, r26 ; xor r15, r16, r17 ; mulhha_uu r5, r6, r7 } + { sh r25, r26 ; xor r15, r16, r17 ; seqi r5, r6, 5 } + { sh r25, r26 ; xor r15, r16, r17 } + { sh r25, r26 ; xor r5, r6, r7 ; s3a r15, r16, r17 } + { shadd r15, r16, 5 ; addb r5, r6, r7 } + { shadd r15, r16, 5 ; crc32_32 r5, r6, r7 } + { shadd r15, r16, 5 ; mnz r5, r6, r7 } + { shadd r15, r16, 5 ; mulhla_us r5, r6, r7 } + { shadd r15, r16, 5 ; packhb r5, r6, r7 } + { shadd r15, r16, 5 ; seqih r5, r6, 5 } + { shadd r15, r16, 5 ; slteb_u r5, r6, r7 } + { shadd r15, r16, 5 ; sub r5, r6, r7 } + { shl r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + { shl r15, r16, r17 ; adds r5, r6, r7 } + { shl r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + { shl r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 } + { shl r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 } + { shl r15, r16, r17 ; info 19 ; lb_u r25, r26 } + { shl r15, r16, r17 ; lb r25, r26 ; clz r5, r6 } + { shl r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 } + { shl r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 } + { shl r15, r16, r17 ; lb_u r25, r26 ; info 19 } + { shl r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 } + { shl r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 } + { shl r15, r16, r17 ; lh r25, r26 ; movei r5, 5 } + { shl r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 } + { shl r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 } + { shl r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 } + { shl r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 } + { shl r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 } + { shl r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 } + { shl r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 } + { shl r15, r16, r17 ; maxh r5, r6, r7 } + { shl r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + { shl r15, r16, r17 ; moveli r5, 0x1234 } + { shl r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { shl r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { shl r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { shl r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { shl r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 } + { shl r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 } + { shl r15, r16, r17 ; nop ; lh r25, r26 } + { shl r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + { shl r15, r16, r17 ; packhs r5, r6, r7 } + { shl r15, r16, r17 ; prefetch r25 ; fnop } + { shl r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 } + { shl r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 } + { shl r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + { shl r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + { shl r15, r16, r17 ; sadah r5, r6, r7 } + { shl r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 } + { shl r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 } + { shl r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 } + { shl r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + { shl r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 } + { shl r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 } + { shl r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 } + { shl r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + { shl r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + { shl r15, r16, r17 ; slt r5, r6, r7 } + { shl r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + { shl r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + { shl r15, r16, r17 ; sltib_u r5, r6, 5 } + { shl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + { shl r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + { shl r15, r16, r17 ; sw r25, r26 ; clz r5, r6 } + { shl r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 } + { shl r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 } + { shl r15, r16, r17 ; tblidxb0 r5, r6 } + { shl r15, r16, r17 ; tblidxb2 r5, r6 } + { shl r15, r16, r17 ; xor r5, r6, r7 } + { shl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + { shl r5, r6, r7 ; and r15, r16, r17 } + { shl r5, r6, r7 ; fnop ; prefetch r25 } + { shl r5, r6, r7 ; info 19 ; lw r25, r26 } + { shl r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 } + { shl r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 } + { shl r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 } + { shl r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 } + { shl r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 } + { shl r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 } + { shl r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 } + { shl r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 } + { shl r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 } + { shl r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 } + { shl r5, r6, r7 ; maxb_u r15, r16, r17 } + { shl r5, r6, r7 ; mnz r15, r16, r17 } + { shl r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + { shl r5, r6, r7 ; nop ; lh r25, r26 } + { shl r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + { shl r5, r6, r7 ; packhs r15, r16, r17 } + { shl r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 } + { shl r5, r6, r7 ; prefetch r25 } + { shl r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + { shl r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + { shl r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 } + { shl r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 } + { shl r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + { shl r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 } + { shl r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 } + { shl r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + { shl r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + { shl r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + { shl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + { shl r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + { shl r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + { shl r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + { shl r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + { shl r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + { shl r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 } + { shl r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 } + { shlb r15, r16, r17 ; add r5, r6, r7 } + { shlb r15, r16, r17 ; clz r5, r6 } + { shlb r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + { shlb r15, r16, r17 ; mulhla_su r5, r6, r7 } + { shlb r15, r16, r17 ; packbs_u r5, r6, r7 } + { shlb r15, r16, r17 ; seqib r5, r6, 5 } + { shlb r15, r16, r17 ; slteb r5, r6, r7 } + { shlb r15, r16, r17 ; sraih r5, r6, 5 } + { shlb r5, r6, r7 ; addih r15, r16, 5 } + { shlb r5, r6, r7 ; iret } + { shlb r5, r6, r7 ; maxib_u r15, r16, 5 } + { shlb r5, r6, r7 ; nop } + { shlb r5, r6, r7 ; seqi r15, r16, 5 } + { shlb r5, r6, r7 ; sltb_u r15, r16, r17 } + { shlb r5, r6, r7 ; srah r15, r16, r17 } + { shlh r15, r16, r17 ; addhs r5, r6, r7 } + { shlh r15, r16, r17 ; dword_align r5, r6, r7 } + { shlh r15, r16, r17 ; move r5, r6 } + { shlh r15, r16, r17 ; mulll_ss r5, r6, r7 } + { shlh r15, r16, r17 ; pcnt r5, r6 } + { shlh r15, r16, r17 ; shlh r5, r6, r7 } + { shlh r15, r16, r17 ; slth r5, r6, r7 } + { shlh r15, r16, r17 ; subh r5, r6, r7 } + { shlh r5, r6, r7 ; and r15, r16, r17 } + { shlh r5, r6, r7 ; jrp r15 } + { shlh r5, r6, r7 ; minb_u r15, r16, r17 } + { shlh r5, r6, r7 ; packbs_u r15, r16, r17 } + { shlh r5, r6, r7 ; shadd r15, r16, 5 } + { shlh r5, r6, r7 ; slteb_u r15, r16, r17 } + { shlh r5, r6, r7 ; sub r15, r16, r17 } + { shli r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 } + { shli r15, r16, 5 ; adds r5, r6, r7 } + { shli r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 } + { shli r15, r16, 5 ; bytex r5, r6 ; lw r25, r26 } + { shli r15, r16, 5 ; ctz r5, r6 ; lh r25, r26 } + { shli r15, r16, 5 ; info 19 ; lb_u r25, r26 } + { shli r15, r16, 5 ; lb r25, r26 ; clz r5, r6 } + { shli r15, r16, 5 ; lb r25, r26 ; nor r5, r6, r7 } + { shli r15, r16, 5 ; lb r25, r26 ; slti_u r5, r6, 5 } + { shli r15, r16, 5 ; lb_u r25, r26 ; info 19 } + { shli r15, r16, 5 ; lb_u r25, r26 ; pcnt r5, r6 } + { shli r15, r16, 5 ; lb_u r25, r26 ; srai r5, r6, 5 } + { shli r15, r16, 5 ; lh r25, r26 ; movei r5, 5 } + { shli r15, r16, 5 ; lh r25, r26 ; s1a r5, r6, r7 } + { shli r15, r16, 5 ; lh r25, r26 ; tblidxb1 r5, r6 } + { shli r15, r16, 5 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 } + { shli r15, r16, 5 ; lh_u r25, r26 ; seq r5, r6, r7 } + { shli r15, r16, 5 ; lh_u r25, r26 ; xor r5, r6, r7 } + { shli r15, r16, 5 ; lw r25, r26 ; mulll_ss r5, r6, r7 } + { shli r15, r16, 5 ; lw r25, r26 ; shli r5, r6, 5 } + { shli r15, r16, 5 ; maxh r5, r6, r7 } + { shli r15, r16, 5 ; move r5, r6 ; lb r25, r26 } + { shli r15, r16, 5 ; moveli r5, 0x1234 } + { shli r15, r16, 5 ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { shli r15, r16, 5 ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { shli r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { shli r15, r16, 5 ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { shli r15, r16, 5 ; mullla_uu r5, r6, r7 ; prefetch r25 } + { shli r15, r16, 5 ; mvz r5, r6, r7 ; lw r25, r26 } + { shli r15, r16, 5 ; nop ; lh r25, r26 } + { shli r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 } + { shli r15, r16, 5 ; packhs r5, r6, r7 } + { shli r15, r16, 5 ; prefetch r25 ; fnop } + { shli r15, r16, 5 ; prefetch r25 ; ori r5, r6, 5 } + { shli r15, r16, 5 ; prefetch r25 ; sra r5, r6, r7 } + { shli r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 } + { shli r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 } + { shli r15, r16, 5 ; sadah r5, r6, r7 } + { shli r15, r16, 5 ; sb r25, r26 ; mulhha_ss r5, r6, r7 } + { shli r15, r16, 5 ; sb r25, r26 ; seq r5, r6, r7 } + { shli r15, r16, 5 ; sb r25, r26 ; xor r5, r6, r7 } + { shli r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 } + { shli r15, r16, 5 ; sh r25, r26 ; mulhh_uu r5, r6, r7 } + { shli r15, r16, 5 ; sh r25, r26 ; s3a r5, r6, r7 } + { shli r15, r16, 5 ; sh r25, r26 ; tblidxb3 r5, r6 } + { shli r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 } + { shli r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 } + { shli r15, r16, 5 ; slt r5, r6, r7 } + { shli r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 } + { shli r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 } + { shli r15, r16, 5 ; sltib_u r5, r6, 5 } + { shli r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + { shli r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 } + { shli r15, r16, 5 ; sw r25, r26 ; clz r5, r6 } + { shli r15, r16, 5 ; sw r25, r26 ; nor r5, r6, r7 } + { shli r15, r16, 5 ; sw r25, r26 ; slti_u r5, r6, 5 } + { shli r15, r16, 5 ; tblidxb0 r5, r6 } + { shli r15, r16, 5 ; tblidxb2 r5, r6 } + { shli r15, r16, 5 ; xor r5, r6, r7 } + { shli r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + { shli r5, r6, 5 ; and r15, r16, r17 } + { shli r5, r6, 5 ; fnop ; prefetch r25 } + { shli r5, r6, 5 ; info 19 ; lw r25, r26 } + { shli r5, r6, 5 ; lb r25, r26 ; and r15, r16, r17 } + { shli r5, r6, 5 ; lb r25, r26 ; shl r15, r16, r17 } + { shli r5, r6, 5 ; lb_u r25, r26 ; andi r15, r16, 5 } + { shli r5, r6, 5 ; lb_u r25, r26 ; shli r15, r16, 5 } + { shli r5, r6, 5 ; lh r25, r26 ; and r15, r16, r17 } + { shli r5, r6, 5 ; lh r25, r26 ; shl r15, r16, r17 } + { shli r5, r6, 5 ; lh_u r25, r26 ; andi r15, r16, 5 } + { shli r5, r6, 5 ; lh_u r25, r26 ; shli r15, r16, 5 } + { shli r5, r6, 5 ; lw r25, r26 ; addi r15, r16, 5 } + { shli r5, r6, 5 ; lw r25, r26 ; seqi r15, r16, 5 } + { shli r5, r6, 5 ; maxb_u r15, r16, r17 } + { shli r5, r6, 5 ; mnz r15, r16, r17 } + { shli r5, r6, 5 ; movei r15, 5 ; sh r25, r26 } + { shli r5, r6, 5 ; nop ; lh r25, r26 } + { shli r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 } + { shli r5, r6, 5 ; packhs r15, r16, r17 } + { shli r5, r6, 5 ; prefetch r25 ; s1a r15, r16, r17 } + { shli r5, r6, 5 ; prefetch r25 } + { shli r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 } + { shli r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 } + { shli r5, r6, 5 ; sb r25, r26 ; mnz r15, r16, r17 } + { shli r5, r6, 5 ; sb r25, r26 ; slt_u r15, r16, r17 } + { shli r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 } + { shli r5, r6, 5 ; sh r25, r26 ; andi r15, r16, 5 } + { shli r5, r6, 5 ; sh r25, r26 ; shli r15, r16, 5 } + { shli r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 } + { shli r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 } + { shli r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 } + { shli r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + { shli r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 } + { shli r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 } + { shli r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 } + { shli r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 } + { shli r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 } + { shli r5, r6, 5 ; sw r25, r26 ; nor r15, r16, r17 } + { shli r5, r6, 5 ; sw r25, r26 ; sne r15, r16, r17 } + { shlib r15, r16, 5 ; add r5, r6, r7 } + { shlib r15, r16, 5 ; clz r5, r6 } + { shlib r15, r16, 5 ; mm r5, r6, r7, 5, 7 } + { shlib r15, r16, 5 ; mulhla_su r5, r6, r7 } + { shlib r15, r16, 5 ; packbs_u r5, r6, r7 } + { shlib r15, r16, 5 ; seqib r5, r6, 5 } + { shlib r15, r16, 5 ; slteb r5, r6, r7 } + { shlib r15, r16, 5 ; sraih r5, r6, 5 } + { shlib r5, r6, 5 ; addih r15, r16, 5 } + { shlib r5, r6, 5 ; iret } + { shlib r5, r6, 5 ; maxib_u r15, r16, 5 } + { shlib r5, r6, 5 ; nop } + { shlib r5, r6, 5 ; seqi r15, r16, 5 } + { shlib r5, r6, 5 ; sltb_u r15, r16, r17 } + { shlib r5, r6, 5 ; srah r15, r16, r17 } + { shlih r15, r16, 5 ; addhs r5, r6, r7 } + { shlih r15, r16, 5 ; dword_align r5, r6, r7 } + { shlih r15, r16, 5 ; move r5, r6 } + { shlih r15, r16, 5 ; mulll_ss r5, r6, r7 } + { shlih r15, r16, 5 ; pcnt r5, r6 } + { shlih r15, r16, 5 ; shlh r5, r6, r7 } + { shlih r15, r16, 5 ; slth r5, r6, r7 } + { shlih r15, r16, 5 ; subh r5, r6, r7 } + { shlih r5, r6, 5 ; and r15, r16, r17 } + { shlih r5, r6, 5 ; jrp r15 } + { shlih r5, r6, 5 ; minb_u r15, r16, r17 } + { shlih r5, r6, 5 ; packbs_u r15, r16, r17 } + { shlih r5, r6, 5 ; shadd r15, r16, 5 } + { shlih r5, r6, 5 ; slteb_u r15, r16, r17 } + { shlih r5, r6, 5 ; sub r15, r16, r17 } + { shr r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + { shr r15, r16, r17 ; adds r5, r6, r7 } + { shr r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + { shr r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 } + { shr r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 } + { shr r15, r16, r17 ; info 19 ; lb_u r25, r26 } + { shr r15, r16, r17 ; lb r25, r26 ; clz r5, r6 } + { shr r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 } + { shr r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 } + { shr r15, r16, r17 ; lb_u r25, r26 ; info 19 } + { shr r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 } + { shr r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 } + { shr r15, r16, r17 ; lh r25, r26 ; movei r5, 5 } + { shr r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 } + { shr r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 } + { shr r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 } + { shr r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 } + { shr r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 } + { shr r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 } + { shr r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 } + { shr r15, r16, r17 ; maxh r5, r6, r7 } + { shr r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + { shr r15, r16, r17 ; moveli r5, 0x1234 } + { shr r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { shr r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { shr r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { shr r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { shr r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 } + { shr r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 } + { shr r15, r16, r17 ; nop ; lh r25, r26 } + { shr r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + { shr r15, r16, r17 ; packhs r5, r6, r7 } + { shr r15, r16, r17 ; prefetch r25 ; fnop } + { shr r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 } + { shr r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 } + { shr r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + { shr r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + { shr r15, r16, r17 ; sadah r5, r6, r7 } + { shr r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 } + { shr r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 } + { shr r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 } + { shr r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + { shr r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 } + { shr r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 } + { shr r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 } + { shr r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + { shr r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + { shr r15, r16, r17 ; slt r5, r6, r7 } + { shr r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + { shr r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + { shr r15, r16, r17 ; sltib_u r5, r6, 5 } + { shr r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + { shr r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + { shr r15, r16, r17 ; sw r25, r26 ; clz r5, r6 } + { shr r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 } + { shr r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 } + { shr r15, r16, r17 ; tblidxb0 r5, r6 } + { shr r15, r16, r17 ; tblidxb2 r5, r6 } + { shr r15, r16, r17 ; xor r5, r6, r7 } + { shr r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + { shr r5, r6, r7 ; and r15, r16, r17 } + { shr r5, r6, r7 ; fnop ; prefetch r25 } + { shr r5, r6, r7 ; info 19 ; lw r25, r26 } + { shr r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 } + { shr r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 } + { shr r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 } + { shr r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 } + { shr r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 } + { shr r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 } + { shr r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 } + { shr r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 } + { shr r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 } + { shr r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 } + { shr r5, r6, r7 ; maxb_u r15, r16, r17 } + { shr r5, r6, r7 ; mnz r15, r16, r17 } + { shr r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + { shr r5, r6, r7 ; nop ; lh r25, r26 } + { shr r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + { shr r5, r6, r7 ; packhs r15, r16, r17 } + { shr r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 } + { shr r5, r6, r7 ; prefetch r25 } + { shr r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + { shr r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + { shr r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 } + { shr r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 } + { shr r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + { shr r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 } + { shr r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 } + { shr r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + { shr r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + { shr r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + { shr r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + { shr r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + { shr r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + { shr r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + { shr r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + { shr r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + { shr r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 } + { shr r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 } + { shrb r15, r16, r17 ; add r5, r6, r7 } + { shrb r15, r16, r17 ; clz r5, r6 } + { shrb r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + { shrb r15, r16, r17 ; mulhla_su r5, r6, r7 } + { shrb r15, r16, r17 ; packbs_u r5, r6, r7 } + { shrb r15, r16, r17 ; seqib r5, r6, 5 } + { shrb r15, r16, r17 ; slteb r5, r6, r7 } + { shrb r15, r16, r17 ; sraih r5, r6, 5 } + { shrb r5, r6, r7 ; addih r15, r16, 5 } + { shrb r5, r6, r7 ; iret } + { shrb r5, r6, r7 ; maxib_u r15, r16, 5 } + { shrb r5, r6, r7 ; nop } + { shrb r5, r6, r7 ; seqi r15, r16, 5 } + { shrb r5, r6, r7 ; sltb_u r15, r16, r17 } + { shrb r5, r6, r7 ; srah r15, r16, r17 } + { shrh r15, r16, r17 ; addhs r5, r6, r7 } + { shrh r15, r16, r17 ; dword_align r5, r6, r7 } + { shrh r15, r16, r17 ; move r5, r6 } + { shrh r15, r16, r17 ; mulll_ss r5, r6, r7 } + { shrh r15, r16, r17 ; pcnt r5, r6 } + { shrh r15, r16, r17 ; shlh r5, r6, r7 } + { shrh r15, r16, r17 ; slth r5, r6, r7 } + { shrh r15, r16, r17 ; subh r5, r6, r7 } + { shrh r5, r6, r7 ; and r15, r16, r17 } + { shrh r5, r6, r7 ; jrp r15 } + { shrh r5, r6, r7 ; minb_u r15, r16, r17 } + { shrh r5, r6, r7 ; packbs_u r15, r16, r17 } + { shrh r5, r6, r7 ; shadd r15, r16, 5 } + { shrh r5, r6, r7 ; slteb_u r15, r16, r17 } + { shrh r5, r6, r7 ; sub r15, r16, r17 } + { shri r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 } + { shri r15, r16, 5 ; adds r5, r6, r7 } + { shri r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 } + { shri r15, r16, 5 ; bytex r5, r6 ; lw r25, r26 } + { shri r15, r16, 5 ; ctz r5, r6 ; lh r25, r26 } + { shri r15, r16, 5 ; info 19 ; lb_u r25, r26 } + { shri r15, r16, 5 ; lb r25, r26 ; clz r5, r6 } + { shri r15, r16, 5 ; lb r25, r26 ; nor r5, r6, r7 } + { shri r15, r16, 5 ; lb r25, r26 ; slti_u r5, r6, 5 } + { shri r15, r16, 5 ; lb_u r25, r26 ; info 19 } + { shri r15, r16, 5 ; lb_u r25, r26 ; pcnt r5, r6 } + { shri r15, r16, 5 ; lb_u r25, r26 ; srai r5, r6, 5 } + { shri r15, r16, 5 ; lh r25, r26 ; movei r5, 5 } + { shri r15, r16, 5 ; lh r25, r26 ; s1a r5, r6, r7 } + { shri r15, r16, 5 ; lh r25, r26 ; tblidxb1 r5, r6 } + { shri r15, r16, 5 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 } + { shri r15, r16, 5 ; lh_u r25, r26 ; seq r5, r6, r7 } + { shri r15, r16, 5 ; lh_u r25, r26 ; xor r5, r6, r7 } + { shri r15, r16, 5 ; lw r25, r26 ; mulll_ss r5, r6, r7 } + { shri r15, r16, 5 ; lw r25, r26 ; shli r5, r6, 5 } + { shri r15, r16, 5 ; maxh r5, r6, r7 } + { shri r15, r16, 5 ; move r5, r6 ; lb r25, r26 } + { shri r15, r16, 5 ; moveli r5, 0x1234 } + { shri r15, r16, 5 ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { shri r15, r16, 5 ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { shri r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { shri r15, r16, 5 ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { shri r15, r16, 5 ; mullla_uu r5, r6, r7 ; prefetch r25 } + { shri r15, r16, 5 ; mvz r5, r6, r7 ; lw r25, r26 } + { shri r15, r16, 5 ; nop ; lh r25, r26 } + { shri r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 } + { shri r15, r16, 5 ; packhs r5, r6, r7 } + { shri r15, r16, 5 ; prefetch r25 ; fnop } + { shri r15, r16, 5 ; prefetch r25 ; ori r5, r6, 5 } + { shri r15, r16, 5 ; prefetch r25 ; sra r5, r6, r7 } + { shri r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 } + { shri r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 } + { shri r15, r16, 5 ; sadah r5, r6, r7 } + { shri r15, r16, 5 ; sb r25, r26 ; mulhha_ss r5, r6, r7 } + { shri r15, r16, 5 ; sb r25, r26 ; seq r5, r6, r7 } + { shri r15, r16, 5 ; sb r25, r26 ; xor r5, r6, r7 } + { shri r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 } + { shri r15, r16, 5 ; sh r25, r26 ; mulhh_uu r5, r6, r7 } + { shri r15, r16, 5 ; sh r25, r26 ; s3a r5, r6, r7 } + { shri r15, r16, 5 ; sh r25, r26 ; tblidxb3 r5, r6 } + { shri r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 } + { shri r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 } + { shri r15, r16, 5 ; slt r5, r6, r7 } + { shri r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 } + { shri r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 } + { shri r15, r16, 5 ; sltib_u r5, r6, 5 } + { shri r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + { shri r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 } + { shri r15, r16, 5 ; sw r25, r26 ; clz r5, r6 } + { shri r15, r16, 5 ; sw r25, r26 ; nor r5, r6, r7 } + { shri r15, r16, 5 ; sw r25, r26 ; slti_u r5, r6, 5 } + { shri r15, r16, 5 ; tblidxb0 r5, r6 } + { shri r15, r16, 5 ; tblidxb2 r5, r6 } + { shri r15, r16, 5 ; xor r5, r6, r7 } + { shri r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + { shri r5, r6, 5 ; and r15, r16, r17 } + { shri r5, r6, 5 ; fnop ; prefetch r25 } + { shri r5, r6, 5 ; info 19 ; lw r25, r26 } + { shri r5, r6, 5 ; lb r25, r26 ; and r15, r16, r17 } + { shri r5, r6, 5 ; lb r25, r26 ; shl r15, r16, r17 } + { shri r5, r6, 5 ; lb_u r25, r26 ; andi r15, r16, 5 } + { shri r5, r6, 5 ; lb_u r25, r26 ; shli r15, r16, 5 } + { shri r5, r6, 5 ; lh r25, r26 ; and r15, r16, r17 } + { shri r5, r6, 5 ; lh r25, r26 ; shl r15, r16, r17 } + { shri r5, r6, 5 ; lh_u r25, r26 ; andi r15, r16, 5 } + { shri r5, r6, 5 ; lh_u r25, r26 ; shli r15, r16, 5 } + { shri r5, r6, 5 ; lw r25, r26 ; addi r15, r16, 5 } + { shri r5, r6, 5 ; lw r25, r26 ; seqi r15, r16, 5 } + { shri r5, r6, 5 ; maxb_u r15, r16, r17 } + { shri r5, r6, 5 ; mnz r15, r16, r17 } + { shri r5, r6, 5 ; movei r15, 5 ; sh r25, r26 } + { shri r5, r6, 5 ; nop ; lh r25, r26 } + { shri r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 } + { shri r5, r6, 5 ; packhs r15, r16, r17 } + { shri r5, r6, 5 ; prefetch r25 ; s1a r15, r16, r17 } + { shri r5, r6, 5 ; prefetch r25 } + { shri r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 } + { shri r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 } + { shri r5, r6, 5 ; sb r25, r26 ; mnz r15, r16, r17 } + { shri r5, r6, 5 ; sb r25, r26 ; slt_u r15, r16, r17 } + { shri r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 } + { shri r5, r6, 5 ; sh r25, r26 ; andi r15, r16, 5 } + { shri r5, r6, 5 ; sh r25, r26 ; shli r15, r16, 5 } + { shri r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 } + { shri r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 } + { shri r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 } + { shri r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + { shri r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 } + { shri r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 } + { shri r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 } + { shri r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 } + { shri r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 } + { shri r5, r6, 5 ; sw r25, r26 ; nor r15, r16, r17 } + { shri r5, r6, 5 ; sw r25, r26 ; sne r15, r16, r17 } + { shrib r15, r16, 5 ; add r5, r6, r7 } + { shrib r15, r16, 5 ; clz r5, r6 } + { shrib r15, r16, 5 ; mm r5, r6, r7, 5, 7 } + { shrib r15, r16, 5 ; mulhla_su r5, r6, r7 } + { shrib r15, r16, 5 ; packbs_u r5, r6, r7 } + { shrib r15, r16, 5 ; seqib r5, r6, 5 } + { shrib r15, r16, 5 ; slteb r5, r6, r7 } + { shrib r15, r16, 5 ; sraih r5, r6, 5 } + { shrib r5, r6, 5 ; addih r15, r16, 5 } + { shrib r5, r6, 5 ; iret } + { shrib r5, r6, 5 ; maxib_u r15, r16, 5 } + { shrib r5, r6, 5 ; nop } + { shrib r5, r6, 5 ; seqi r15, r16, 5 } + { shrib r5, r6, 5 ; sltb_u r15, r16, r17 } + { shrib r5, r6, 5 ; srah r15, r16, r17 } + { shrih r15, r16, 5 ; addhs r5, r6, r7 } + { shrih r15, r16, 5 ; dword_align r5, r6, r7 } + { shrih r15, r16, 5 ; move r5, r6 } + { shrih r15, r16, 5 ; mulll_ss r5, r6, r7 } + { shrih r15, r16, 5 ; pcnt r5, r6 } + { shrih r15, r16, 5 ; shlh r5, r6, r7 } + { shrih r15, r16, 5 ; slth r5, r6, r7 } + { shrih r15, r16, 5 ; subh r5, r6, r7 } + { shrih r5, r6, 5 ; and r15, r16, r17 } + { shrih r5, r6, 5 ; jrp r15 } + { shrih r5, r6, 5 ; minb_u r15, r16, r17 } + { shrih r5, r6, 5 ; packbs_u r15, r16, r17 } + { shrih r5, r6, 5 ; shadd r15, r16, 5 } + { shrih r5, r6, 5 ; slteb_u r15, r16, r17 } + { shrih r5, r6, 5 ; sub r15, r16, r17 } + { slt r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + { slt r15, r16, r17 ; adds r5, r6, r7 } + { slt r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + { slt r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 } + { slt r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 } + { slt r15, r16, r17 ; info 19 ; lb_u r25, r26 } + { slt r15, r16, r17 ; lb r25, r26 ; clz r5, r6 } + { slt r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 } + { slt r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 } + { slt r15, r16, r17 ; lb_u r25, r26 ; info 19 } + { slt r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 } + { slt r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 } + { slt r15, r16, r17 ; lh r25, r26 ; movei r5, 5 } + { slt r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 } + { slt r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 } + { slt r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 } + { slt r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 } + { slt r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 } + { slt r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 } + { slt r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 } + { slt r15, r16, r17 ; maxh r5, r6, r7 } + { slt r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + { slt r15, r16, r17 ; moveli r5, 0x1234 } + { slt r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { slt r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { slt r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { slt r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { slt r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 } + { slt r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 } + { slt r15, r16, r17 ; nop ; lh r25, r26 } + { slt r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + { slt r15, r16, r17 ; packhs r5, r6, r7 } + { slt r15, r16, r17 ; prefetch r25 ; fnop } + { slt r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 } + { slt r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 } + { slt r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + { slt r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + { slt r15, r16, r17 ; sadah r5, r6, r7 } + { slt r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 } + { slt r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 } + { slt r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 } + { slt r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + { slt r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 } + { slt r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 } + { slt r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 } + { slt r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + { slt r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + { slt r15, r16, r17 ; slt r5, r6, r7 } + { slt r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + { slt r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + { slt r15, r16, r17 ; sltib_u r5, r6, 5 } + { slt r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + { slt r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + { slt r15, r16, r17 ; sw r25, r26 ; clz r5, r6 } + { slt r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 } + { slt r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 } + { slt r15, r16, r17 ; tblidxb0 r5, r6 } + { slt r15, r16, r17 ; tblidxb2 r5, r6 } + { slt r15, r16, r17 ; xor r5, r6, r7 } + { slt r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + { slt r5, r6, r7 ; and r15, r16, r17 } + { slt r5, r6, r7 ; fnop ; prefetch r25 } + { slt r5, r6, r7 ; info 19 ; lw r25, r26 } + { slt r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 } + { slt r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 } + { slt r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 } + { slt r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 } + { slt r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 } + { slt r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 } + { slt r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 } + { slt r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 } + { slt r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 } + { slt r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 } + { slt r5, r6, r7 ; maxb_u r15, r16, r17 } + { slt r5, r6, r7 ; mnz r15, r16, r17 } + { slt r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + { slt r5, r6, r7 ; nop ; lh r25, r26 } + { slt r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + { slt r5, r6, r7 ; packhs r15, r16, r17 } + { slt r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 } + { slt r5, r6, r7 ; prefetch r25 } + { slt r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + { slt r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + { slt r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 } + { slt r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 } + { slt r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + { slt r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 } + { slt r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 } + { slt r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + { slt r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + { slt r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + { slt r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + { slt r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + { slt r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + { slt r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + { slt r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + { slt r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + { slt r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 } + { slt r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 } + { slt_u r15, r16, r17 ; add r5, r6, r7 ; lb r25, r26 } + { slt_u r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 } + { slt_u r15, r16, r17 ; and r5, r6, r7 } + { slt_u r15, r16, r17 ; bitx r5, r6 ; sb r25, r26 } + { slt_u r15, r16, r17 ; clz r5, r6 ; sb r25, r26 } + { slt_u r15, r16, r17 ; fnop ; lh_u r25, r26 } + { slt_u r15, r16, r17 ; intlb r5, r6, r7 } + { slt_u r15, r16, r17 ; lb r25, r26 ; mulll_ss r5, r6, r7 } + { slt_u r15, r16, r17 ; lb r25, r26 ; shli r5, r6, 5 } + { slt_u r15, r16, r17 ; lb_u r25, r26 ; addi r5, r6, 5 } + { slt_u r15, r16, r17 ; lb_u r25, r26 ; mullla_uu r5, r6, r7 } + { slt_u r15, r16, r17 ; lb_u r25, r26 ; slt r5, r6, r7 } + { slt_u r15, r16, r17 ; lh r25, r26 ; bitx r5, r6 } + { slt_u r15, r16, r17 ; lh r25, r26 ; mz r5, r6, r7 } + { slt_u r15, r16, r17 ; lh r25, r26 ; slte_u r5, r6, r7 } + { slt_u r15, r16, r17 ; lh_u r25, r26 ; ctz r5, r6 } + { slt_u r15, r16, r17 ; lh_u r25, r26 ; or r5, r6, r7 } + { slt_u r15, r16, r17 ; lh_u r25, r26 ; sne r5, r6, r7 } + { slt_u r15, r16, r17 ; lw r25, r26 ; mnz r5, r6, r7 } + { slt_u r15, r16, r17 ; lw r25, r26 ; rl r5, r6, r7 } + { slt_u r15, r16, r17 ; lw r25, r26 ; sub r5, r6, r7 } + { slt_u r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 } + { slt_u r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + { slt_u r15, r16, r17 ; mulhh_su r5, r6, r7 } + { slt_u r15, r16, r17 ; mulhha_ss r5, r6, r7 } + { slt_u r15, r16, r17 ; mulhla_uu r5, r6, r7 } + { slt_u r15, r16, r17 ; mulll_ss r5, r6, r7 } + { slt_u r15, r16, r17 ; mullla_ss r5, r6, r7 ; sw r25, r26 } + { slt_u r15, r16, r17 ; mvnz r5, r6, r7 ; sb r25, r26 } + { slt_u r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 } + { slt_u r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 } + { slt_u r15, r16, r17 ; ori r5, r6, 5 ; lw r25, r26 } + { slt_u r15, r16, r17 ; prefetch r25 ; add r5, r6, r7 } + { slt_u r15, r16, r17 ; prefetch r25 ; mullla_ss r5, r6, r7 } + { slt_u r15, r16, r17 ; prefetch r25 ; shri r5, r6, 5 } + { slt_u r15, r16, r17 ; rl r5, r6, r7 ; lh_u r25, r26 } + { slt_u r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 } + { slt_u r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 } + { slt_u r15, r16, r17 ; sb r25, r26 ; ctz r5, r6 } + { slt_u r15, r16, r17 ; sb r25, r26 ; or r5, r6, r7 } + { slt_u r15, r16, r17 ; sb r25, r26 ; sne r5, r6, r7 } + { slt_u r15, r16, r17 ; seqb r5, r6, r7 } + { slt_u r15, r16, r17 ; sh r25, r26 ; clz r5, r6 } + { slt_u r15, r16, r17 ; sh r25, r26 ; nor r5, r6, r7 } + { slt_u r15, r16, r17 ; sh r25, r26 ; slti_u r5, r6, 5 } + { slt_u r15, r16, r17 ; shl r5, r6, r7 } + { slt_u r15, r16, r17 ; shr r5, r6, r7 ; prefetch r25 } + { slt_u r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 } + { slt_u r15, r16, r17 ; sltb_u r5, r6, r7 } + { slt_u r15, r16, r17 ; slte_u r5, r6, r7 } + { slt_u r15, r16, r17 ; slti_u r5, r6, 5 ; lh_u r25, r26 } + { slt_u r15, r16, r17 ; sne r5, r6, r7 } + { slt_u r15, r16, r17 ; srai r5, r6, 5 ; prefetch r25 } + { slt_u r15, r16, r17 ; subhs r5, r6, r7 } + { slt_u r15, r16, r17 ; sw r25, r26 ; mulll_ss r5, r6, r7 } + { slt_u r15, r16, r17 ; sw r25, r26 ; shli r5, r6, 5 } + { slt_u r15, r16, r17 ; tblidxb0 r5, r6 ; lb_u r25, r26 } + { slt_u r15, r16, r17 ; tblidxb2 r5, r6 ; lb_u r25, r26 } + { slt_u r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 } + { slt_u r5, r6, r7 ; addb r15, r16, r17 } + { slt_u r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + { slt_u r5, r6, r7 ; dtlbpr r15 } + { slt_u r5, r6, r7 ; ill ; sb r25, r26 } + { slt_u r5, r6, r7 ; iret } + { slt_u r5, r6, r7 ; lb r25, r26 ; ori r15, r16, 5 } + { slt_u r5, r6, r7 ; lb r25, r26 ; srai r15, r16, 5 } + { slt_u r5, r6, r7 ; lb_u r25, r26 ; rl r15, r16, r17 } + { slt_u r5, r6, r7 ; lb_u r25, r26 ; sub r15, r16, r17 } + { slt_u r5, r6, r7 ; lh r25, r26 ; ori r15, r16, 5 } + { slt_u r5, r6, r7 ; lh r25, r26 ; srai r15, r16, 5 } + { slt_u r5, r6, r7 ; lh_u r25, r26 ; rl r15, r16, r17 } + { slt_u r5, r6, r7 ; lh_u r25, r26 ; sub r15, r16, r17 } + { slt_u r5, r6, r7 ; lw r25, r26 ; or r15, r16, r17 } + { slt_u r5, r6, r7 ; lw r25, r26 ; sra r15, r16, r17 } + { slt_u r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + { slt_u r5, r6, r7 ; move r15, r16 } + { slt_u r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + { slt_u r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + { slt_u r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + { slt_u r5, r6, r7 ; prefetch r25 ; movei r15, 5 } + { slt_u r5, r6, r7 ; prefetch r25 ; slte_u r15, r16, r17 } + { slt_u r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + { slt_u r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + { slt_u r5, r6, r7 ; sb r15, r16 } + { slt_u r5, r6, r7 ; sb r25, r26 ; s3a r15, r16, r17 } + { slt_u r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 } + { slt_u r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + { slt_u r5, r6, r7 ; sh r25, r26 ; rl r15, r16, r17 } + { slt_u r5, r6, r7 ; sh r25, r26 ; sub r15, r16, r17 } + { slt_u r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + { slt_u r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 } + { slt_u r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 } + { slt_u r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 } + { slt_u r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + { slt_u r5, r6, r7 ; sltib r15, r16, 5 } + { slt_u r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + { slt_u r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + { slt_u r5, r6, r7 ; sw r25, r26 ; fnop } + { slt_u r5, r6, r7 ; sw r25, r26 ; shr r15, r16, r17 } + { slt_u r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + { sltb r15, r16, r17 ; adiffh r5, r6, r7 } + { sltb r15, r16, r17 ; maxb_u r5, r6, r7 } + { sltb r15, r16, r17 ; mulhha_su r5, r6, r7 } + { sltb r15, r16, r17 ; mvz r5, r6, r7 } + { sltb r15, r16, r17 ; sadah_u r5, r6, r7 } + { sltb r15, r16, r17 ; shrib r5, r6, 5 } + { sltb r15, r16, r17 ; sne r5, r6, r7 } + { sltb r15, r16, r17 ; xori r5, r6, 5 } + { sltb r5, r6, r7 ; ill } + { sltb r5, r6, r7 ; lhadd_u r15, r16, 5 } + { sltb r5, r6, r7 ; move r15, r16 } + { sltb r5, r6, r7 ; s1a r15, r16, r17 } + { sltb r5, r6, r7 ; shrb r15, r16, r17 } + { sltb r5, r6, r7 ; sltib_u r15, r16, 5 } + { sltb r5, r6, r7 ; tns r15, r16 } + { sltb_u r15, r16, r17 ; avgb_u r5, r6, r7 } + { sltb_u r15, r16, r17 ; minb_u r5, r6, r7 } + { sltb_u r15, r16, r17 ; mulhl_su r5, r6, r7 } + { sltb_u r15, r16, r17 ; nop } + { sltb_u r15, r16, r17 ; seq r5, r6, r7 } + { sltb_u r15, r16, r17 ; sltb r5, r6, r7 } + { sltb_u r15, r16, r17 ; srab r5, r6, r7 } + { sltb_u r5, r6, r7 ; addh r15, r16, r17 } + { sltb_u r5, r6, r7 ; inthh r15, r16, r17 } + { sltb_u r5, r6, r7 ; lwadd r15, r16, 5 } + { sltb_u r5, r6, r7 ; mtspr 0x5, r16 } + { sltb_u r5, r6, r7 ; sbadd r15, r16, 5 } + { sltb_u r5, r6, r7 ; shrih r15, r16, 5 } + { sltb_u r5, r6, r7 ; sneb r15, r16, r17 } + { slte r15, r16, r17 ; add r5, r6, r7 ; lb r25, r26 } + { slte r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 } + { slte r15, r16, r17 ; and r5, r6, r7 } + { slte r15, r16, r17 ; bitx r5, r6 ; sb r25, r26 } + { slte r15, r16, r17 ; clz r5, r6 ; sb r25, r26 } + { slte r15, r16, r17 ; fnop ; lh_u r25, r26 } + { slte r15, r16, r17 ; intlb r5, r6, r7 } + { slte r15, r16, r17 ; lb r25, r26 ; mulll_ss r5, r6, r7 } + { slte r15, r16, r17 ; lb r25, r26 ; shli r5, r6, 5 } + { slte r15, r16, r17 ; lb_u r25, r26 ; addi r5, r6, 5 } + { slte r15, r16, r17 ; lb_u r25, r26 ; mullla_uu r5, r6, r7 } + { slte r15, r16, r17 ; lb_u r25, r26 ; slt r5, r6, r7 } + { slte r15, r16, r17 ; lh r25, r26 ; bitx r5, r6 } + { slte r15, r16, r17 ; lh r25, r26 ; mz r5, r6, r7 } + { slte r15, r16, r17 ; lh r25, r26 ; slte_u r5, r6, r7 } + { slte r15, r16, r17 ; lh_u r25, r26 ; ctz r5, r6 } + { slte r15, r16, r17 ; lh_u r25, r26 ; or r5, r6, r7 } + { slte r15, r16, r17 ; lh_u r25, r26 ; sne r5, r6, r7 } + { slte r15, r16, r17 ; lw r25, r26 ; mnz r5, r6, r7 } + { slte r15, r16, r17 ; lw r25, r26 ; rl r5, r6, r7 } + { slte r15, r16, r17 ; lw r25, r26 ; sub r5, r6, r7 } + { slte r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 } + { slte r15, r16, r17 ; movei r5, 5 ; lh r25, r26 } + { slte r15, r16, r17 ; mulhh_su r5, r6, r7 } + { slte r15, r16, r17 ; mulhha_ss r5, r6, r7 } + { slte r15, r16, r17 ; mulhla_uu r5, r6, r7 } + { slte r15, r16, r17 ; mulll_ss r5, r6, r7 } + { slte r15, r16, r17 ; mullla_ss r5, r6, r7 ; sw r25, r26 } + { slte r15, r16, r17 ; mvnz r5, r6, r7 ; sb r25, r26 } + { slte r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 } + { slte r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 } + { slte r15, r16, r17 ; ori r5, r6, 5 ; lw r25, r26 } + { slte r15, r16, r17 ; prefetch r25 ; add r5, r6, r7 } + { slte r15, r16, r17 ; prefetch r25 ; mullla_ss r5, r6, r7 } + { slte r15, r16, r17 ; prefetch r25 ; shri r5, r6, 5 } + { slte r15, r16, r17 ; rl r5, r6, r7 ; lh_u r25, r26 } + { slte r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 } + { slte r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 } + { slte r15, r16, r17 ; sb r25, r26 ; ctz r5, r6 } + { slte r15, r16, r17 ; sb r25, r26 ; or r5, r6, r7 } + { slte r15, r16, r17 ; sb r25, r26 ; sne r5, r6, r7 } + { slte r15, r16, r17 ; seqb r5, r6, r7 } + { slte r15, r16, r17 ; sh r25, r26 ; clz r5, r6 } + { slte r15, r16, r17 ; sh r25, r26 ; nor r5, r6, r7 } + { slte r15, r16, r17 ; sh r25, r26 ; slti_u r5, r6, 5 } + { slte r15, r16, r17 ; shl r5, r6, r7 } + { slte r15, r16, r17 ; shr r5, r6, r7 ; prefetch r25 } + { slte r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 } + { slte r15, r16, r17 ; sltb_u r5, r6, r7 } + { slte r15, r16, r17 ; slte_u r5, r6, r7 } + { slte r15, r16, r17 ; slti_u r5, r6, 5 ; lh_u r25, r26 } + { slte r15, r16, r17 ; sne r5, r6, r7 } + { slte r15, r16, r17 ; srai r5, r6, 5 ; prefetch r25 } + { slte r15, r16, r17 ; subhs r5, r6, r7 } + { slte r15, r16, r17 ; sw r25, r26 ; mulll_ss r5, r6, r7 } + { slte r15, r16, r17 ; sw r25, r26 ; shli r5, r6, 5 } + { slte r15, r16, r17 ; tblidxb0 r5, r6 ; lb_u r25, r26 } + { slte r15, r16, r17 ; tblidxb2 r5, r6 ; lb_u r25, r26 } + { slte r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 } + { slte r5, r6, r7 ; addb r15, r16, r17 } + { slte r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 } + { slte r5, r6, r7 ; dtlbpr r15 } + { slte r5, r6, r7 ; ill ; sb r25, r26 } + { slte r5, r6, r7 ; iret } + { slte r5, r6, r7 ; lb r25, r26 ; ori r15, r16, 5 } + { slte r5, r6, r7 ; lb r25, r26 ; srai r15, r16, 5 } + { slte r5, r6, r7 ; lb_u r25, r26 ; rl r15, r16, r17 } + { slte r5, r6, r7 ; lb_u r25, r26 ; sub r15, r16, r17 } + { slte r5, r6, r7 ; lh r25, r26 ; ori r15, r16, 5 } + { slte r5, r6, r7 ; lh r25, r26 ; srai r15, r16, 5 } + { slte r5, r6, r7 ; lh_u r25, r26 ; rl r15, r16, r17 } + { slte r5, r6, r7 ; lh_u r25, r26 ; sub r15, r16, r17 } + { slte r5, r6, r7 ; lw r25, r26 ; or r15, r16, r17 } + { slte r5, r6, r7 ; lw r25, r26 ; sra r15, r16, r17 } + { slte r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 } + { slte r5, r6, r7 ; move r15, r16 } + { slte r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 } + { slte r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 } + { slte r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 } + { slte r5, r6, r7 ; prefetch r25 ; movei r15, 5 } + { slte r5, r6, r7 ; prefetch r25 ; slte_u r15, r16, r17 } + { slte r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 } + { slte r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 } + { slte r5, r6, r7 ; sb r15, r16 } + { slte r5, r6, r7 ; sb r25, r26 ; s3a r15, r16, r17 } + { slte r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 } + { slte r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 } + { slte r5, r6, r7 ; sh r25, r26 ; rl r15, r16, r17 } + { slte r5, r6, r7 ; sh r25, r26 ; sub r15, r16, r17 } + { slte r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 } + { slte r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 } + { slte r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 } + { slte r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 } + { slte r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 } + { slte r5, r6, r7 ; sltib r15, r16, 5 } + { slte r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 } + { slte r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 } + { slte r5, r6, r7 ; sw r25, r26 ; fnop } + { slte r5, r6, r7 ; sw r25, r26 ; shr r15, r16, r17 } + { slte r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 } + { slte_u r15, r16, r17 ; addh r5, r6, r7 } + { slte_u r15, r16, r17 ; and r5, r6, r7 ; lb_u r25, r26 } + { slte_u r15, r16, r17 ; avgb_u r5, r6, r7 } + { slte_u r15, r16, r17 ; bytex r5, r6 ; sw r25, r26 } + { slte_u r15, r16, r17 ; ctz r5, r6 ; sb r25, r26 } + { slte_u r15, r16, r17 ; info 19 ; prefetch r25 } + { slte_u r15, r16, r17 ; lb r25, r26 ; mnz r5, r6, r7 } + { slte_u r15, r16, r17 ; lb r25, r26 ; rl r5, r6, r7 } + { slte_u r15, r16, r17 ; lb r25, r26 ; sub r5, r6, r7 } + { slte_u r15, r16, r17 ; lb_u r25, r26 ; mulhh_ss r5, r6, r7 } + { slte_u r15, r16, r17 ; lb_u r25, r26 ; s2a r5, r6, r7 } + { slte_u r15, r16, r17 ; lb_u r25, r26 ; tblidxb2 r5, r6 } + { slte_u r15, r16, r17 ; lh r25, r26 ; mulhha_uu r5, r6, r7 } + { slte_u r15, r16, r17 ; lh r25, r26 ; seqi r5, r6, 5 } + { slte_u r15, r16, r17 ; lh r25, r26 } + { slte_u r15, r16, r17 ; lh_u r25, r26 ; mulll_uu r5, r6, r7 } + { slte_u r15, r16, r17 ; lh_u r25, r26 ; shr r5, r6, r7 } + { slte_u r15, r16, r17 ; lw r25, r26 ; and r5, r6, r7 } + { slte_u r15, r16, r17 ; lw r25, r26 ; mvnz r5, r6, r7 } + { slte_u r15, r16, r17 ; lw r25, r26 ; slt_u r5, r6, r7 } + { slte_u r15, r16, r17 ; minh r5, r6, r7 } + { slte_u r15, r16, r17 ; move r5, r6 ; lw r25, r26 } + { slte_u r15, r16, r17 ; mulhh_ss r5, r6, r7 ; lh r25, r26 } + { slte_u r15, r16, r17 ; mulhha_ss r5, r6, r7 ; lb_u r25, r26 } + { slte_u r15, r16, r17 ; mulhhsa_uu r5, r6, r7 } + { slte_u r15, r16, r17 ; mulll_ss r5, r6, r7 ; lb_u r25, r26 } + { slte_u r15, r16, r17 ; mullla_ss r5, r6, r7 ; lb r25, r26 } + { slte_u r15, r16, r17 ; mullla_uu r5, r6, r7 } + { slte_u r15, r16, r17 ; mvz r5, r6, r7 ; sw r25, r26 } + { slte_u r15, r16, r17 ; nop ; sb r25, r26 } + { slte_u r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 } + { slte_u r15, r16, r17 ; pcnt r5, r6 ; lh r25, r26 } + { slte_u r15, r16, r17 ; prefetch r25 ; movei r5, 5 } + { slte_u r15, r16, r17 ; prefetch r25 ; s1a r5, r6, r7 } + { slte_u r15, r16, r17 ; prefetch r25 ; tblidxb1 r5, r6 } + { slte_u r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 } + { slte_u r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 } + { slte_u r15, r16, r17 ; sadh_u r5, r6, r7 } + { slte_u r15, r16, r17 ; sb r25, r26 ; mulll_uu r5, r6, r7 } + { slte_u r15, r16, r17 ; sb r25, r26 ; shr r5, r6, r7 } + { slte_u r15, r16, r17 ; seq r5, r6, r7 ; lh r25, r26 } + { slte_u r15, r16, r17 ; seqib r5, r6, 5 } + { slte_u r15, r16, r17 ; sh r25, r26 ; mulll_ss r5, r6, r7 } + { slte_u r15, r16, r17 ; sh r25, r26 ; shli r5, r6, 5 } + { slte_u r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 } + { slte_u r15, r16, r17 ; shli r5, r6, 5 } + { slte_u r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 } + { slte_u r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 } + { slte_u r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 } + { slte_u r15, r16, r17 ; slti r5, r6, 5 ; prefetch r25 } + { slte_u r15, r16, r17 ; sne r5, r6, r7 ; lb_u r25, r26 } + { slte_u r15, r16, r17 ; sra r5, r6, r7 } + { slte_u r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 } + { slte_u r15, r16, r17 ; sw r25, r26 ; mnz r5, r6, r7 } + { slte_u r15, r16, r17 ; sw r25, r26 ; rl r5, r6, r7 } + { slte_u r15, r16, r17 ; sw r25, r26 ; sub r5, r6, r7 } + { slte_u r15, r16, r17 ; tblidxb1 r5, r6 ; lh_u r25, r26 } + { slte_u r15, r16, r17 ; tblidxb3 r5, r6 ; lh_u r25, r26 } + { slte_u r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 } + { slte_u r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 } + { slte_u r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 } + { slte_u r5, r6, r7 ; fnop } + { slte_u r5, r6, r7 ; info 19 ; sw r25, r26 } + { slte_u r5, r6, r7 ; lb r25, r26 ; info 19 } + { slte_u r5, r6, r7 ; lb r25, r26 ; slt r15, r16, r17 } + { slte_u r5, r6, r7 ; lb_u r25, r26 ; mnz r15, r16, r17 } + { slte_u r5, r6, r7 ; lb_u r25, r26 ; slt_u r15, r16, r17 } + { slte_u r5, r6, r7 ; lh r25, r26 ; info 19 } + { slte_u r5, r6, r7 ; lh r25, r26 ; slt r15, r16, r17 } + { slte_u r5, r6, r7 ; lh_u r25, r26 ; mnz r15, r16, r17 } + { slte_u r5, r6, r7 ; lh_u r25, r26 ; slt_u r15, r16, r17 } + { slte_u r5, r6, r7 ; lw r25, r26 ; ill } + { slte_u r5, r6, r7 ; lw r25, r26 ; shri r15, r16, 5 } + { slte_u r5, r6, r7 ; mf } + { slte_u r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 } + { slte_u r5, r6, r7 ; movelis r15, 0x1234 } + { slte_u r5, r6, r7 ; nop ; sb r25, r26 } + { slte_u r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 } + { slte_u r5, r6, r7 ; prefetch r25 ; addi r15, r16, 5 } + { slte_u r5, r6, r7 ; prefetch r25 ; seqi r15, r16, 5 } + { slte_u r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 } + { slte_u r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 } + { slte_u r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 } + { slte_u r5, r6, r7 ; sb r25, r26 ; nop } + { slte_u r5, r6, r7 ; sb r25, r26 ; slti_u r15, r16, 5 } + { slte_u r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 } + { slte_u r5, r6, r7 ; sh r25, r26 ; mnz r15, r16, r17 } + { slte_u r5, r6, r7 ; sh r25, r26 ; slt_u r15, r16, r17 } + { slte_u r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 } + { slte_u r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 } + { slte_u r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 } + { slte_u r5, r6, r7 ; sltb r15, r16, r17 } + { slte_u r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 } + { slte_u r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 } + { slte_u r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 } + { slte_u r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 } + { slte_u r5, r6, r7 ; subh r15, r16, r17 } + { slte_u r5, r6, r7 ; sw r25, r26 ; rli r15, r16, 5 } + { slte_u r5, r6, r7 ; sw r25, r26 ; xor r15, r16, r17 } + { slteb r15, r16, r17 ; addhs r5, r6, r7 } + { slteb r15, r16, r17 ; dword_align r5, r6, r7 } + { slteb r15, r16, r17 ; move r5, r6 } + { slteb r15, r16, r17 ; mulll_ss r5, r6, r7 } + { slteb r15, r16, r17 ; pcnt r5, r6 } + { slteb r15, r16, r17 ; shlh r5, r6, r7 } + { slteb r15, r16, r17 ; slth r5, r6, r7 } + { slteb r15, r16, r17 ; subh r5, r6, r7 } + { slteb r5, r6, r7 ; and r15, r16, r17 } + { slteb r5, r6, r7 ; jrp r15 } + { slteb r5, r6, r7 ; minb_u r15, r16, r17 } + { slteb r5, r6, r7 ; packbs_u r15, r16, r17 } + { slteb r5, r6, r7 ; shadd r15, r16, 5 } + { slteb r5, r6, r7 ; slteb_u r15, r16, r17 } + { slteb r5, r6, r7 ; sub r15, r16, r17 } + { slteb_u r15, r16, r17 ; addli r5, r6, 0x1234 } + { slteb_u r15, r16, r17 ; inthb r5, r6, r7 } + { slteb_u r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { slteb_u r15, r16, r17 ; mullla_su r5, r6, r7 } + { slteb_u r15, r16, r17 ; s2a r5, r6, r7 } + { slteb_u r15, r16, r17 ; shr r5, r6, r7 } + { slteb_u r15, r16, r17 ; sltib r5, r6, 5 } + { slteb_u r15, r16, r17 ; tblidxb1 r5, r6 } + { slteb_u r5, r6, r7 ; finv r15 } + { slteb_u r5, r6, r7 ; lbadd_u r15, r16, 5 } + { slteb_u r5, r6, r7 ; mm r15, r16, r17, 5, 7 } + { slteb_u r5, r6, r7 ; prefetch r15 } + { slteb_u r5, r6, r7 ; shli r15, r16, 5 } + { slteb_u r5, r6, r7 ; slth_u r15, r16, r17 } + { slteb_u r5, r6, r7 ; subhs r15, r16, r17 } + { slteh r15, r16, r17 ; adiffh r5, r6, r7 } + { slteh r15, r16, r17 ; maxb_u r5, r6, r7 } + { slteh r15, r16, r17 ; mulhha_su r5, r6, r7 } + { slteh r15, r16, r17 ; mvz r5, r6, r7 } + { slteh r15, r16, r17 ; sadah_u r5, r6, r7 } + { slteh r15, r16, r17 ; shrib r5, r6, 5 } + { slteh r15, r16, r17 ; sne r5, r6, r7 } + { slteh r15, r16, r17 ; xori r5, r6, 5 } + { slteh r5, r6, r7 ; ill } + { slteh r5, r6, r7 ; lhadd_u r15, r16, 5 } + { slteh r5, r6, r7 ; move r15, r16 } + { slteh r5, r6, r7 ; s1a r15, r16, r17 } + { slteh r5, r6, r7 ; shrb r15, r16, r17 } + { slteh r5, r6, r7 ; sltib_u r15, r16, 5 } + { slteh r5, r6, r7 ; tns r15, r16 } + { slteh_u r15, r16, r17 ; avgb_u r5, r6, r7 } + { slteh_u r15, r16, r17 ; minb_u r5, r6, r7 } + { slteh_u r15, r16, r17 ; mulhl_su r5, r6, r7 } + { slteh_u r15, r16, r17 ; nop } + { slteh_u r15, r16, r17 ; seq r5, r6, r7 } + { slteh_u r15, r16, r17 ; sltb r5, r6, r7 } + { slteh_u r15, r16, r17 ; srab r5, r6, r7 } + { slteh_u r5, r6, r7 ; addh r15, r16, r17 } + { slteh_u r5, r6, r7 ; inthh r15, r16, r17 } + { slteh_u r5, r6, r7 ; lwadd r15, r16, 5 } + { slteh_u r5, r6, r7 ; mtspr 0x5, r16 } + { slteh_u r5, r6, r7 ; sbadd r15, r16, 5 } + { slteh_u r5, r6, r7 ; shrih r15, r16, 5 } + { slteh_u r5, r6, r7 ; sneb r15, r16, r17 } + { slth r15, r16, r17 ; add r5, r6, r7 } + { slth r15, r16, r17 ; clz r5, r6 } + { slth r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + { slth r15, r16, r17 ; mulhla_su r5, r6, r7 } + { slth r15, r16, r17 ; packbs_u r5, r6, r7 } + { slth r15, r16, r17 ; seqib r5, r6, 5 } + { slth r15, r16, r17 ; slteb r5, r6, r7 } + { slth r15, r16, r17 ; sraih r5, r6, 5 } + { slth r5, r6, r7 ; addih r15, r16, 5 } + { slth r5, r6, r7 ; iret } + { slth r5, r6, r7 ; maxib_u r15, r16, 5 } + { slth r5, r6, r7 ; nop } + { slth r5, r6, r7 ; seqi r15, r16, 5 } + { slth r5, r6, r7 ; sltb_u r15, r16, r17 } + { slth r5, r6, r7 ; srah r15, r16, r17 } + { slth_u r15, r16, r17 ; addhs r5, r6, r7 } + { slth_u r15, r16, r17 ; dword_align r5, r6, r7 } + { slth_u r15, r16, r17 ; move r5, r6 } + { slth_u r15, r16, r17 ; mulll_ss r5, r6, r7 } + { slth_u r15, r16, r17 ; pcnt r5, r6 } + { slth_u r15, r16, r17 ; shlh r5, r6, r7 } + { slth_u r15, r16, r17 ; slth r5, r6, r7 } + { slth_u r15, r16, r17 ; subh r5, r6, r7 } + { slth_u r5, r6, r7 ; and r15, r16, r17 } + { slth_u r5, r6, r7 ; jrp r15 } + { slth_u r5, r6, r7 ; minb_u r15, r16, r17 } + { slth_u r5, r6, r7 ; packbs_u r15, r16, r17 } + { slth_u r5, r6, r7 ; shadd r15, r16, 5 } + { slth_u r5, r6, r7 ; slteb_u r15, r16, r17 } + { slth_u r5, r6, r7 ; sub r15, r16, r17 } + { slti r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 } + { slti r15, r16, 5 ; adds r5, r6, r7 } + { slti r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 } + { slti r15, r16, 5 ; bytex r5, r6 ; lw r25, r26 } + { slti r15, r16, 5 ; ctz r5, r6 ; lh r25, r26 } + { slti r15, r16, 5 ; info 19 ; lb_u r25, r26 } + { slti r15, r16, 5 ; lb r25, r26 ; clz r5, r6 } + { slti r15, r16, 5 ; lb r25, r26 ; nor r5, r6, r7 } + { slti r15, r16, 5 ; lb r25, r26 ; slti_u r5, r6, 5 } + { slti r15, r16, 5 ; lb_u r25, r26 ; info 19 } + { slti r15, r16, 5 ; lb_u r25, r26 ; pcnt r5, r6 } + { slti r15, r16, 5 ; lb_u r25, r26 ; srai r5, r6, 5 } + { slti r15, r16, 5 ; lh r25, r26 ; movei r5, 5 } + { slti r15, r16, 5 ; lh r25, r26 ; s1a r5, r6, r7 } + { slti r15, r16, 5 ; lh r25, r26 ; tblidxb1 r5, r6 } + { slti r15, r16, 5 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 } + { slti r15, r16, 5 ; lh_u r25, r26 ; seq r5, r6, r7 } + { slti r15, r16, 5 ; lh_u r25, r26 ; xor r5, r6, r7 } + { slti r15, r16, 5 ; lw r25, r26 ; mulll_ss r5, r6, r7 } + { slti r15, r16, 5 ; lw r25, r26 ; shli r5, r6, 5 } + { slti r15, r16, 5 ; maxh r5, r6, r7 } + { slti r15, r16, 5 ; move r5, r6 ; lb r25, r26 } + { slti r15, r16, 5 ; moveli r5, 0x1234 } + { slti r15, r16, 5 ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { slti r15, r16, 5 ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { slti r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { slti r15, r16, 5 ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { slti r15, r16, 5 ; mullla_uu r5, r6, r7 ; prefetch r25 } + { slti r15, r16, 5 ; mvz r5, r6, r7 ; lw r25, r26 } + { slti r15, r16, 5 ; nop ; lh r25, r26 } + { slti r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 } + { slti r15, r16, 5 ; packhs r5, r6, r7 } + { slti r15, r16, 5 ; prefetch r25 ; fnop } + { slti r15, r16, 5 ; prefetch r25 ; ori r5, r6, 5 } + { slti r15, r16, 5 ; prefetch r25 ; sra r5, r6, r7 } + { slti r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 } + { slti r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 } + { slti r15, r16, 5 ; sadah r5, r6, r7 } + { slti r15, r16, 5 ; sb r25, r26 ; mulhha_ss r5, r6, r7 } + { slti r15, r16, 5 ; sb r25, r26 ; seq r5, r6, r7 } + { slti r15, r16, 5 ; sb r25, r26 ; xor r5, r6, r7 } + { slti r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 } + { slti r15, r16, 5 ; sh r25, r26 ; mulhh_uu r5, r6, r7 } + { slti r15, r16, 5 ; sh r25, r26 ; s3a r5, r6, r7 } + { slti r15, r16, 5 ; sh r25, r26 ; tblidxb3 r5, r6 } + { slti r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 } + { slti r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 } + { slti r15, r16, 5 ; slt r5, r6, r7 } + { slti r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 } + { slti r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 } + { slti r15, r16, 5 ; sltib_u r5, r6, 5 } + { slti r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + { slti r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 } + { slti r15, r16, 5 ; sw r25, r26 ; clz r5, r6 } + { slti r15, r16, 5 ; sw r25, r26 ; nor r5, r6, r7 } + { slti r15, r16, 5 ; sw r25, r26 ; slti_u r5, r6, 5 } + { slti r15, r16, 5 ; tblidxb0 r5, r6 } + { slti r15, r16, 5 ; tblidxb2 r5, r6 } + { slti r15, r16, 5 ; xor r5, r6, r7 } + { slti r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + { slti r5, r6, 5 ; and r15, r16, r17 } + { slti r5, r6, 5 ; fnop ; prefetch r25 } + { slti r5, r6, 5 ; info 19 ; lw r25, r26 } + { slti r5, r6, 5 ; lb r25, r26 ; and r15, r16, r17 } + { slti r5, r6, 5 ; lb r25, r26 ; shl r15, r16, r17 } + { slti r5, r6, 5 ; lb_u r25, r26 ; andi r15, r16, 5 } + { slti r5, r6, 5 ; lb_u r25, r26 ; shli r15, r16, 5 } + { slti r5, r6, 5 ; lh r25, r26 ; and r15, r16, r17 } + { slti r5, r6, 5 ; lh r25, r26 ; shl r15, r16, r17 } + { slti r5, r6, 5 ; lh_u r25, r26 ; andi r15, r16, 5 } + { slti r5, r6, 5 ; lh_u r25, r26 ; shli r15, r16, 5 } + { slti r5, r6, 5 ; lw r25, r26 ; addi r15, r16, 5 } + { slti r5, r6, 5 ; lw r25, r26 ; seqi r15, r16, 5 } + { slti r5, r6, 5 ; maxb_u r15, r16, r17 } + { slti r5, r6, 5 ; mnz r15, r16, r17 } + { slti r5, r6, 5 ; movei r15, 5 ; sh r25, r26 } + { slti r5, r6, 5 ; nop ; lh r25, r26 } + { slti r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 } + { slti r5, r6, 5 ; packhs r15, r16, r17 } + { slti r5, r6, 5 ; prefetch r25 ; s1a r15, r16, r17 } + { slti r5, r6, 5 ; prefetch r25 } + { slti r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 } + { slti r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 } + { slti r5, r6, 5 ; sb r25, r26 ; mnz r15, r16, r17 } + { slti r5, r6, 5 ; sb r25, r26 ; slt_u r15, r16, r17 } + { slti r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 } + { slti r5, r6, 5 ; sh r25, r26 ; andi r15, r16, 5 } + { slti r5, r6, 5 ; sh r25, r26 ; shli r15, r16, 5 } + { slti r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 } + { slti r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 } + { slti r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 } + { slti r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + { slti r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 } + { slti r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 } + { slti r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 } + { slti r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 } + { slti r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 } + { slti r5, r6, 5 ; sw r25, r26 ; nor r15, r16, r17 } + { slti r5, r6, 5 ; sw r25, r26 ; sne r15, r16, r17 } + { slti_u r15, r16, 5 ; add r5, r6, r7 ; lb r25, r26 } + { slti_u r15, r16, 5 ; addi r5, r6, 5 ; sb r25, r26 } + { slti_u r15, r16, 5 ; and r5, r6, r7 } + { slti_u r15, r16, 5 ; bitx r5, r6 ; sb r25, r26 } + { slti_u r15, r16, 5 ; clz r5, r6 ; sb r25, r26 } + { slti_u r15, r16, 5 ; fnop ; lh_u r25, r26 } + { slti_u r15, r16, 5 ; intlb r5, r6, r7 } + { slti_u r15, r16, 5 ; lb r25, r26 ; mulll_ss r5, r6, r7 } + { slti_u r15, r16, 5 ; lb r25, r26 ; shli r5, r6, 5 } + { slti_u r15, r16, 5 ; lb_u r25, r26 ; addi r5, r6, 5 } + { slti_u r15, r16, 5 ; lb_u r25, r26 ; mullla_uu r5, r6, r7 } + { slti_u r15, r16, 5 ; lb_u r25, r26 ; slt r5, r6, r7 } + { slti_u r15, r16, 5 ; lh r25, r26 ; bitx r5, r6 } + { slti_u r15, r16, 5 ; lh r25, r26 ; mz r5, r6, r7 } + { slti_u r15, r16, 5 ; lh r25, r26 ; slte_u r5, r6, r7 } + { slti_u r15, r16, 5 ; lh_u r25, r26 ; ctz r5, r6 } + { slti_u r15, r16, 5 ; lh_u r25, r26 ; or r5, r6, r7 } + { slti_u r15, r16, 5 ; lh_u r25, r26 ; sne r5, r6, r7 } + { slti_u r15, r16, 5 ; lw r25, r26 ; mnz r5, r6, r7 } + { slti_u r15, r16, 5 ; lw r25, r26 ; rl r5, r6, r7 } + { slti_u r15, r16, 5 ; lw r25, r26 ; sub r5, r6, r7 } + { slti_u r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 } + { slti_u r15, r16, 5 ; movei r5, 5 ; lh r25, r26 } + { slti_u r15, r16, 5 ; mulhh_su r5, r6, r7 } + { slti_u r15, r16, 5 ; mulhha_ss r5, r6, r7 } + { slti_u r15, r16, 5 ; mulhla_uu r5, r6, r7 } + { slti_u r15, r16, 5 ; mulll_ss r5, r6, r7 } + { slti_u r15, r16, 5 ; mullla_ss r5, r6, r7 ; sw r25, r26 } + { slti_u r15, r16, 5 ; mvnz r5, r6, r7 ; sb r25, r26 } + { slti_u r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 } + { slti_u r15, r16, 5 ; nor r5, r6, r7 ; lw r25, r26 } + { slti_u r15, r16, 5 ; ori r5, r6, 5 ; lw r25, r26 } + { slti_u r15, r16, 5 ; prefetch r25 ; add r5, r6, r7 } + { slti_u r15, r16, 5 ; prefetch r25 ; mullla_ss r5, r6, r7 } + { slti_u r15, r16, 5 ; prefetch r25 ; shri r5, r6, 5 } + { slti_u r15, r16, 5 ; rl r5, r6, r7 ; lh_u r25, r26 } + { slti_u r15, r16, 5 ; s1a r5, r6, r7 ; lh_u r25, r26 } + { slti_u r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 } + { slti_u r15, r16, 5 ; sb r25, r26 ; ctz r5, r6 } + { slti_u r15, r16, 5 ; sb r25, r26 ; or r5, r6, r7 } + { slti_u r15, r16, 5 ; sb r25, r26 ; sne r5, r6, r7 } + { slti_u r15, r16, 5 ; seqb r5, r6, r7 } + { slti_u r15, r16, 5 ; sh r25, r26 ; clz r5, r6 } + { slti_u r15, r16, 5 ; sh r25, r26 ; nor r5, r6, r7 } + { slti_u r15, r16, 5 ; sh r25, r26 ; slti_u r5, r6, 5 } + { slti_u r15, r16, 5 ; shl r5, r6, r7 } + { slti_u r15, r16, 5 ; shr r5, r6, r7 ; prefetch r25 } + { slti_u r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 } + { slti_u r15, r16, 5 ; sltb_u r5, r6, r7 } + { slti_u r15, r16, 5 ; slte_u r5, r6, r7 } + { slti_u r15, r16, 5 ; slti_u r5, r6, 5 ; lh_u r25, r26 } + { slti_u r15, r16, 5 ; sne r5, r6, r7 } + { slti_u r15, r16, 5 ; srai r5, r6, 5 ; prefetch r25 } + { slti_u r15, r16, 5 ; subhs r5, r6, r7 } + { slti_u r15, r16, 5 ; sw r25, r26 ; mulll_ss r5, r6, r7 } + { slti_u r15, r16, 5 ; sw r25, r26 ; shli r5, r6, 5 } + { slti_u r15, r16, 5 ; tblidxb0 r5, r6 ; lb_u r25, r26 } + { slti_u r15, r16, 5 ; tblidxb2 r5, r6 ; lb_u r25, r26 } + { slti_u r15, r16, 5 ; xor r5, r6, r7 ; lb_u r25, r26 } + { slti_u r5, r6, 5 ; addb r15, r16, r17 } + { slti_u r5, r6, 5 ; and r15, r16, r17 ; lb_u r25, r26 } + { slti_u r5, r6, 5 ; dtlbpr r15 } + { slti_u r5, r6, 5 ; ill ; sb r25, r26 } + { slti_u r5, r6, 5 ; iret } + { slti_u r5, r6, 5 ; lb r25, r26 ; ori r15, r16, 5 } + { slti_u r5, r6, 5 ; lb r25, r26 ; srai r15, r16, 5 } + { slti_u r5, r6, 5 ; lb_u r25, r26 ; rl r15, r16, r17 } + { slti_u r5, r6, 5 ; lb_u r25, r26 ; sub r15, r16, r17 } + { slti_u r5, r6, 5 ; lh r25, r26 ; ori r15, r16, 5 } + { slti_u r5, r6, 5 ; lh r25, r26 ; srai r15, r16, 5 } + { slti_u r5, r6, 5 ; lh_u r25, r26 ; rl r15, r16, r17 } + { slti_u r5, r6, 5 ; lh_u r25, r26 ; sub r15, r16, r17 } + { slti_u r5, r6, 5 ; lw r25, r26 ; or r15, r16, r17 } + { slti_u r5, r6, 5 ; lw r25, r26 ; sra r15, r16, r17 } + { slti_u r5, r6, 5 ; mnz r15, r16, r17 ; lb_u r25, r26 } + { slti_u r5, r6, 5 ; move r15, r16 } + { slti_u r5, r6, 5 ; mz r15, r16, r17 ; sb r25, r26 } + { slti_u r5, r6, 5 ; nor r15, r16, r17 ; lw r25, r26 } + { slti_u r5, r6, 5 ; ori r15, r16, 5 ; lw r25, r26 } + { slti_u r5, r6, 5 ; prefetch r25 ; movei r15, 5 } + { slti_u r5, r6, 5 ; prefetch r25 ; slte_u r15, r16, r17 } + { slti_u r5, r6, 5 ; rli r15, r16, 5 ; lb r25, r26 } + { slti_u r5, r6, 5 ; s2a r15, r16, r17 ; lb r25, r26 } + { slti_u r5, r6, 5 ; sb r15, r16 } + { slti_u r5, r6, 5 ; sb r25, r26 ; s3a r15, r16, r17 } + { slti_u r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 } + { slti_u r5, r6, 5 ; seqi r15, r16, 5 ; sw r25, r26 } + { slti_u r5, r6, 5 ; sh r25, r26 ; rl r15, r16, r17 } + { slti_u r5, r6, 5 ; sh r25, r26 ; sub r15, r16, r17 } + { slti_u r5, r6, 5 ; shli r15, r16, 5 ; lw r25, r26 } + { slti_u r5, r6, 5 ; shri r15, r16, 5 ; lb r25, r26 } + { slti_u r5, r6, 5 ; slt r15, r16, r17 ; sw r25, r26 } + { slti_u r5, r6, 5 ; slte r15, r16, r17 ; sb r25, r26 } + { slti_u r5, r6, 5 ; slti r15, r16, 5 ; lb r25, r26 } + { slti_u r5, r6, 5 ; sltib r15, r16, 5 } + { slti_u r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 } + { slti_u r5, r6, 5 ; sub r15, r16, r17 ; lb r25, r26 } + { slti_u r5, r6, 5 ; sw r25, r26 ; fnop } + { slti_u r5, r6, 5 ; sw r25, r26 ; shr r15, r16, r17 } + { slti_u r5, r6, 5 ; xor r15, r16, r17 ; lh_u r25, r26 } + { sltib r15, r16, 5 ; adiffh r5, r6, r7 } + { sltib r15, r16, 5 ; maxb_u r5, r6, r7 } + { sltib r15, r16, 5 ; mulhha_su r5, r6, r7 } + { sltib r15, r16, 5 ; mvz r5, r6, r7 } + { sltib r15, r16, 5 ; sadah_u r5, r6, r7 } + { sltib r15, r16, 5 ; shrib r5, r6, 5 } + { sltib r15, r16, 5 ; sne r5, r6, r7 } + { sltib r15, r16, 5 ; xori r5, r6, 5 } + { sltib r5, r6, 5 ; ill } + { sltib r5, r6, 5 ; lhadd_u r15, r16, 5 } + { sltib r5, r6, 5 ; move r15, r16 } + { sltib r5, r6, 5 ; s1a r15, r16, r17 } + { sltib r5, r6, 5 ; shrb r15, r16, r17 } + { sltib r5, r6, 5 ; sltib_u r15, r16, 5 } + { sltib r5, r6, 5 ; tns r15, r16 } + { sltib_u r15, r16, 5 ; avgb_u r5, r6, r7 } + { sltib_u r15, r16, 5 ; minb_u r5, r6, r7 } + { sltib_u r15, r16, 5 ; mulhl_su r5, r6, r7 } + { sltib_u r15, r16, 5 ; nop } + { sltib_u r15, r16, 5 ; seq r5, r6, r7 } + { sltib_u r15, r16, 5 ; sltb r5, r6, r7 } + { sltib_u r15, r16, 5 ; srab r5, r6, r7 } + { sltib_u r5, r6, 5 ; addh r15, r16, r17 } + { sltib_u r5, r6, 5 ; inthh r15, r16, r17 } + { sltib_u r5, r6, 5 ; lwadd r15, r16, 5 } + { sltib_u r5, r6, 5 ; mtspr 0x5, r16 } + { sltib_u r5, r6, 5 ; sbadd r15, r16, 5 } + { sltib_u r5, r6, 5 ; shrih r15, r16, 5 } + { sltib_u r5, r6, 5 ; sneb r15, r16, r17 } + { sltih r15, r16, 5 ; add r5, r6, r7 } + { sltih r15, r16, 5 ; clz r5, r6 } + { sltih r15, r16, 5 ; mm r5, r6, r7, 5, 7 } + { sltih r15, r16, 5 ; mulhla_su r5, r6, r7 } + { sltih r15, r16, 5 ; packbs_u r5, r6, r7 } + { sltih r15, r16, 5 ; seqib r5, r6, 5 } + { sltih r15, r16, 5 ; slteb r5, r6, r7 } + { sltih r15, r16, 5 ; sraih r5, r6, 5 } + { sltih r5, r6, 5 ; addih r15, r16, 5 } + { sltih r5, r6, 5 ; iret } + { sltih r5, r6, 5 ; maxib_u r15, r16, 5 } + { sltih r5, r6, 5 ; nop } + { sltih r5, r6, 5 ; seqi r15, r16, 5 } + { sltih r5, r6, 5 ; sltb_u r15, r16, r17 } + { sltih r5, r6, 5 ; srah r15, r16, r17 } + { sltih_u r15, r16, 5 ; addhs r5, r6, r7 } + { sltih_u r15, r16, 5 ; dword_align r5, r6, r7 } + { sltih_u r15, r16, 5 ; move r5, r6 } + { sltih_u r15, r16, 5 ; mulll_ss r5, r6, r7 } + { sltih_u r15, r16, 5 ; pcnt r5, r6 } + { sltih_u r15, r16, 5 ; shlh r5, r6, r7 } + { sltih_u r15, r16, 5 ; slth r5, r6, r7 } + { sltih_u r15, r16, 5 ; subh r5, r6, r7 } + { sltih_u r5, r6, 5 ; and r15, r16, r17 } + { sltih_u r5, r6, 5 ; jrp r15 } + { sltih_u r5, r6, 5 ; minb_u r15, r16, r17 } + { sltih_u r5, r6, 5 ; packbs_u r15, r16, r17 } + { sltih_u r5, r6, 5 ; shadd r15, r16, 5 } + { sltih_u r5, r6, 5 ; slteb_u r15, r16, r17 } + { sltih_u r5, r6, 5 ; sub r15, r16, r17 } + { sne r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + { sne r15, r16, r17 ; adds r5, r6, r7 } + { sne r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + { sne r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 } + { sne r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 } + { sne r15, r16, r17 ; info 19 ; lb_u r25, r26 } + { sne r15, r16, r17 ; lb r25, r26 ; clz r5, r6 } + { sne r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 } + { sne r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 } + { sne r15, r16, r17 ; lb_u r25, r26 ; info 19 } + { sne r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 } + { sne r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 } + { sne r15, r16, r17 ; lh r25, r26 ; movei r5, 5 } + { sne r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 } + { sne r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 } + { sne r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 } + { sne r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 } + { sne r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 } + { sne r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 } + { sne r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 } + { sne r15, r16, r17 ; maxh r5, r6, r7 } + { sne r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + { sne r15, r16, r17 ; moveli r5, 0x1234 } + { sne r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { sne r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { sne r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { sne r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { sne r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 } + { sne r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 } + { sne r15, r16, r17 ; nop ; lh r25, r26 } + { sne r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + { sne r15, r16, r17 ; packhs r5, r6, r7 } + { sne r15, r16, r17 ; prefetch r25 ; fnop } + { sne r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 } + { sne r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 } + { sne r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + { sne r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + { sne r15, r16, r17 ; sadah r5, r6, r7 } + { sne r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 } + { sne r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 } + { sne r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 } + { sne r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + { sne r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 } + { sne r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 } + { sne r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 } + { sne r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + { sne r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + { sne r15, r16, r17 ; slt r5, r6, r7 } + { sne r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + { sne r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + { sne r15, r16, r17 ; sltib_u r5, r6, 5 } + { sne r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + { sne r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + { sne r15, r16, r17 ; sw r25, r26 ; clz r5, r6 } + { sne r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 } + { sne r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 } + { sne r15, r16, r17 ; tblidxb0 r5, r6 } + { sne r15, r16, r17 ; tblidxb2 r5, r6 } + { sne r15, r16, r17 ; xor r5, r6, r7 } + { sne r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + { sne r5, r6, r7 ; and r15, r16, r17 } + { sne r5, r6, r7 ; fnop ; prefetch r25 } + { sne r5, r6, r7 ; info 19 ; lw r25, r26 } + { sne r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 } + { sne r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 } + { sne r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 } + { sne r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 } + { sne r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 } + { sne r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 } + { sne r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 } + { sne r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 } + { sne r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 } + { sne r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 } + { sne r5, r6, r7 ; maxb_u r15, r16, r17 } + { sne r5, r6, r7 ; mnz r15, r16, r17 } + { sne r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + { sne r5, r6, r7 ; nop ; lh r25, r26 } + { sne r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + { sne r5, r6, r7 ; packhs r15, r16, r17 } + { sne r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 } + { sne r5, r6, r7 ; prefetch r25 } + { sne r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + { sne r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + { sne r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 } + { sne r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 } + { sne r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + { sne r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 } + { sne r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 } + { sne r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + { sne r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + { sne r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + { sne r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + { sne r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + { sne r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + { sne r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + { sne r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + { sne r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + { sne r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 } + { sne r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 } + { sneb r15, r16, r17 ; add r5, r6, r7 } + { sneb r15, r16, r17 ; clz r5, r6 } + { sneb r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + { sneb r15, r16, r17 ; mulhla_su r5, r6, r7 } + { sneb r15, r16, r17 ; packbs_u r5, r6, r7 } + { sneb r15, r16, r17 ; seqib r5, r6, 5 } + { sneb r15, r16, r17 ; slteb r5, r6, r7 } + { sneb r15, r16, r17 ; sraih r5, r6, 5 } + { sneb r5, r6, r7 ; addih r15, r16, 5 } + { sneb r5, r6, r7 ; iret } + { sneb r5, r6, r7 ; maxib_u r15, r16, 5 } + { sneb r5, r6, r7 ; nop } + { sneb r5, r6, r7 ; seqi r15, r16, 5 } + { sneb r5, r6, r7 ; sltb_u r15, r16, r17 } + { sneb r5, r6, r7 ; srah r15, r16, r17 } + { sneh r15, r16, r17 ; addhs r5, r6, r7 } + { sneh r15, r16, r17 ; dword_align r5, r6, r7 } + { sneh r15, r16, r17 ; move r5, r6 } + { sneh r15, r16, r17 ; mulll_ss r5, r6, r7 } + { sneh r15, r16, r17 ; pcnt r5, r6 } + { sneh r15, r16, r17 ; shlh r5, r6, r7 } + { sneh r15, r16, r17 ; slth r5, r6, r7 } + { sneh r15, r16, r17 ; subh r5, r6, r7 } + { sneh r5, r6, r7 ; and r15, r16, r17 } + { sneh r5, r6, r7 ; jrp r15 } + { sneh r5, r6, r7 ; minb_u r15, r16, r17 } + { sneh r5, r6, r7 ; packbs_u r15, r16, r17 } + { sneh r5, r6, r7 ; shadd r15, r16, 5 } + { sneh r5, r6, r7 ; slteb_u r15, r16, r17 } + { sneh r5, r6, r7 ; sub r15, r16, r17 } + { sra r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + { sra r15, r16, r17 ; adds r5, r6, r7 } + { sra r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + { sra r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 } + { sra r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 } + { sra r15, r16, r17 ; info 19 ; lb_u r25, r26 } + { sra r15, r16, r17 ; lb r25, r26 ; clz r5, r6 } + { sra r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 } + { sra r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 } + { sra r15, r16, r17 ; lb_u r25, r26 ; info 19 } + { sra r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 } + { sra r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 } + { sra r15, r16, r17 ; lh r25, r26 ; movei r5, 5 } + { sra r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 } + { sra r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 } + { sra r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 } + { sra r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 } + { sra r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 } + { sra r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 } + { sra r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 } + { sra r15, r16, r17 ; maxh r5, r6, r7 } + { sra r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + { sra r15, r16, r17 ; moveli r5, 0x1234 } + { sra r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { sra r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { sra r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { sra r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { sra r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 } + { sra r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 } + { sra r15, r16, r17 ; nop ; lh r25, r26 } + { sra r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + { sra r15, r16, r17 ; packhs r5, r6, r7 } + { sra r15, r16, r17 ; prefetch r25 ; fnop } + { sra r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 } + { sra r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 } + { sra r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + { sra r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + { sra r15, r16, r17 ; sadah r5, r6, r7 } + { sra r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 } + { sra r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 } + { sra r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 } + { sra r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + { sra r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 } + { sra r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 } + { sra r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 } + { sra r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + { sra r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + { sra r15, r16, r17 ; slt r5, r6, r7 } + { sra r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + { sra r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + { sra r15, r16, r17 ; sltib_u r5, r6, 5 } + { sra r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + { sra r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + { sra r15, r16, r17 ; sw r25, r26 ; clz r5, r6 } + { sra r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 } + { sra r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 } + { sra r15, r16, r17 ; tblidxb0 r5, r6 } + { sra r15, r16, r17 ; tblidxb2 r5, r6 } + { sra r15, r16, r17 ; xor r5, r6, r7 } + { sra r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + { sra r5, r6, r7 ; and r15, r16, r17 } + { sra r5, r6, r7 ; fnop ; prefetch r25 } + { sra r5, r6, r7 ; info 19 ; lw r25, r26 } + { sra r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 } + { sra r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 } + { sra r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 } + { sra r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 } + { sra r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 } + { sra r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 } + { sra r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 } + { sra r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 } + { sra r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 } + { sra r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 } + { sra r5, r6, r7 ; maxb_u r15, r16, r17 } + { sra r5, r6, r7 ; mnz r15, r16, r17 } + { sra r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + { sra r5, r6, r7 ; nop ; lh r25, r26 } + { sra r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + { sra r5, r6, r7 ; packhs r15, r16, r17 } + { sra r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 } + { sra r5, r6, r7 ; prefetch r25 } + { sra r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + { sra r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + { sra r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 } + { sra r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 } + { sra r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + { sra r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 } + { sra r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 } + { sra r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + { sra r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + { sra r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + { sra r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + { sra r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + { sra r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + { sra r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + { sra r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + { sra r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + { sra r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 } + { sra r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 } + { srab r15, r16, r17 ; add r5, r6, r7 } + { srab r15, r16, r17 ; clz r5, r6 } + { srab r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + { srab r15, r16, r17 ; mulhla_su r5, r6, r7 } + { srab r15, r16, r17 ; packbs_u r5, r6, r7 } + { srab r15, r16, r17 ; seqib r5, r6, 5 } + { srab r15, r16, r17 ; slteb r5, r6, r7 } + { srab r15, r16, r17 ; sraih r5, r6, 5 } + { srab r5, r6, r7 ; addih r15, r16, 5 } + { srab r5, r6, r7 ; iret } + { srab r5, r6, r7 ; maxib_u r15, r16, 5 } + { srab r5, r6, r7 ; nop } + { srab r5, r6, r7 ; seqi r15, r16, 5 } + { srab r5, r6, r7 ; sltb_u r15, r16, r17 } + { srab r5, r6, r7 ; srah r15, r16, r17 } + { srah r15, r16, r17 ; addhs r5, r6, r7 } + { srah r15, r16, r17 ; dword_align r5, r6, r7 } + { srah r15, r16, r17 ; move r5, r6 } + { srah r15, r16, r17 ; mulll_ss r5, r6, r7 } + { srah r15, r16, r17 ; pcnt r5, r6 } + { srah r15, r16, r17 ; shlh r5, r6, r7 } + { srah r15, r16, r17 ; slth r5, r6, r7 } + { srah r15, r16, r17 ; subh r5, r6, r7 } + { srah r5, r6, r7 ; and r15, r16, r17 } + { srah r5, r6, r7 ; jrp r15 } + { srah r5, r6, r7 ; minb_u r15, r16, r17 } + { srah r5, r6, r7 ; packbs_u r15, r16, r17 } + { srah r5, r6, r7 ; shadd r15, r16, 5 } + { srah r5, r6, r7 ; slteb_u r15, r16, r17 } + { srah r5, r6, r7 ; sub r15, r16, r17 } + { srai r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 } + { srai r15, r16, 5 ; adds r5, r6, r7 } + { srai r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 } + { srai r15, r16, 5 ; bytex r5, r6 ; lw r25, r26 } + { srai r15, r16, 5 ; ctz r5, r6 ; lh r25, r26 } + { srai r15, r16, 5 ; info 19 ; lb_u r25, r26 } + { srai r15, r16, 5 ; lb r25, r26 ; clz r5, r6 } + { srai r15, r16, 5 ; lb r25, r26 ; nor r5, r6, r7 } + { srai r15, r16, 5 ; lb r25, r26 ; slti_u r5, r6, 5 } + { srai r15, r16, 5 ; lb_u r25, r26 ; info 19 } + { srai r15, r16, 5 ; lb_u r25, r26 ; pcnt r5, r6 } + { srai r15, r16, 5 ; lb_u r25, r26 ; srai r5, r6, 5 } + { srai r15, r16, 5 ; lh r25, r26 ; movei r5, 5 } + { srai r15, r16, 5 ; lh r25, r26 ; s1a r5, r6, r7 } + { srai r15, r16, 5 ; lh r25, r26 ; tblidxb1 r5, r6 } + { srai r15, r16, 5 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 } + { srai r15, r16, 5 ; lh_u r25, r26 ; seq r5, r6, r7 } + { srai r15, r16, 5 ; lh_u r25, r26 ; xor r5, r6, r7 } + { srai r15, r16, 5 ; lw r25, r26 ; mulll_ss r5, r6, r7 } + { srai r15, r16, 5 ; lw r25, r26 ; shli r5, r6, 5 } + { srai r15, r16, 5 ; maxh r5, r6, r7 } + { srai r15, r16, 5 ; move r5, r6 ; lb r25, r26 } + { srai r15, r16, 5 ; moveli r5, 0x1234 } + { srai r15, r16, 5 ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { srai r15, r16, 5 ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { srai r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { srai r15, r16, 5 ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { srai r15, r16, 5 ; mullla_uu r5, r6, r7 ; prefetch r25 } + { srai r15, r16, 5 ; mvz r5, r6, r7 ; lw r25, r26 } + { srai r15, r16, 5 ; nop ; lh r25, r26 } + { srai r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 } + { srai r15, r16, 5 ; packhs r5, r6, r7 } + { srai r15, r16, 5 ; prefetch r25 ; fnop } + { srai r15, r16, 5 ; prefetch r25 ; ori r5, r6, 5 } + { srai r15, r16, 5 ; prefetch r25 ; sra r5, r6, r7 } + { srai r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 } + { srai r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 } + { srai r15, r16, 5 ; sadah r5, r6, r7 } + { srai r15, r16, 5 ; sb r25, r26 ; mulhha_ss r5, r6, r7 } + { srai r15, r16, 5 ; sb r25, r26 ; seq r5, r6, r7 } + { srai r15, r16, 5 ; sb r25, r26 ; xor r5, r6, r7 } + { srai r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 } + { srai r15, r16, 5 ; sh r25, r26 ; mulhh_uu r5, r6, r7 } + { srai r15, r16, 5 ; sh r25, r26 ; s3a r5, r6, r7 } + { srai r15, r16, 5 ; sh r25, r26 ; tblidxb3 r5, r6 } + { srai r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 } + { srai r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 } + { srai r15, r16, 5 ; slt r5, r6, r7 } + { srai r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 } + { srai r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 } + { srai r15, r16, 5 ; sltib_u r5, r6, 5 } + { srai r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 } + { srai r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 } + { srai r15, r16, 5 ; sw r25, r26 ; clz r5, r6 } + { srai r15, r16, 5 ; sw r25, r26 ; nor r5, r6, r7 } + { srai r15, r16, 5 ; sw r25, r26 ; slti_u r5, r6, 5 } + { srai r15, r16, 5 ; tblidxb0 r5, r6 } + { srai r15, r16, 5 ; tblidxb2 r5, r6 } + { srai r15, r16, 5 ; xor r5, r6, r7 } + { srai r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 } + { srai r5, r6, 5 ; and r15, r16, r17 } + { srai r5, r6, 5 ; fnop ; prefetch r25 } + { srai r5, r6, 5 ; info 19 ; lw r25, r26 } + { srai r5, r6, 5 ; lb r25, r26 ; and r15, r16, r17 } + { srai r5, r6, 5 ; lb r25, r26 ; shl r15, r16, r17 } + { srai r5, r6, 5 ; lb_u r25, r26 ; andi r15, r16, 5 } + { srai r5, r6, 5 ; lb_u r25, r26 ; shli r15, r16, 5 } + { srai r5, r6, 5 ; lh r25, r26 ; and r15, r16, r17 } + { srai r5, r6, 5 ; lh r25, r26 ; shl r15, r16, r17 } + { srai r5, r6, 5 ; lh_u r25, r26 ; andi r15, r16, 5 } + { srai r5, r6, 5 ; lh_u r25, r26 ; shli r15, r16, 5 } + { srai r5, r6, 5 ; lw r25, r26 ; addi r15, r16, 5 } + { srai r5, r6, 5 ; lw r25, r26 ; seqi r15, r16, 5 } + { srai r5, r6, 5 ; maxb_u r15, r16, r17 } + { srai r5, r6, 5 ; mnz r15, r16, r17 } + { srai r5, r6, 5 ; movei r15, 5 ; sh r25, r26 } + { srai r5, r6, 5 ; nop ; lh r25, r26 } + { srai r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 } + { srai r5, r6, 5 ; packhs r15, r16, r17 } + { srai r5, r6, 5 ; prefetch r25 ; s1a r15, r16, r17 } + { srai r5, r6, 5 ; prefetch r25 } + { srai r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 } + { srai r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 } + { srai r5, r6, 5 ; sb r25, r26 ; mnz r15, r16, r17 } + { srai r5, r6, 5 ; sb r25, r26 ; slt_u r15, r16, r17 } + { srai r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 } + { srai r5, r6, 5 ; sh r25, r26 ; andi r15, r16, 5 } + { srai r5, r6, 5 ; sh r25, r26 ; shli r15, r16, 5 } + { srai r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 } + { srai r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 } + { srai r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 } + { srai r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 } + { srai r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 } + { srai r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 } + { srai r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 } + { srai r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 } + { srai r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 } + { srai r5, r6, 5 ; sw r25, r26 ; nor r15, r16, r17 } + { srai r5, r6, 5 ; sw r25, r26 ; sne r15, r16, r17 } + { sraib r15, r16, 5 ; add r5, r6, r7 } + { sraib r15, r16, 5 ; clz r5, r6 } + { sraib r15, r16, 5 ; mm r5, r6, r7, 5, 7 } + { sraib r15, r16, 5 ; mulhla_su r5, r6, r7 } + { sraib r15, r16, 5 ; packbs_u r5, r6, r7 } + { sraib r15, r16, 5 ; seqib r5, r6, 5 } + { sraib r15, r16, 5 ; slteb r5, r6, r7 } + { sraib r15, r16, 5 ; sraih r5, r6, 5 } + { sraib r5, r6, 5 ; addih r15, r16, 5 } + { sraib r5, r6, 5 ; iret } + { sraib r5, r6, 5 ; maxib_u r15, r16, 5 } + { sraib r5, r6, 5 ; nop } + { sraib r5, r6, 5 ; seqi r15, r16, 5 } + { sraib r5, r6, 5 ; sltb_u r15, r16, r17 } + { sraib r5, r6, 5 ; srah r15, r16, r17 } + { sraih r15, r16, 5 ; addhs r5, r6, r7 } + { sraih r15, r16, 5 ; dword_align r5, r6, r7 } + { sraih r15, r16, 5 ; move r5, r6 } + { sraih r15, r16, 5 ; mulll_ss r5, r6, r7 } + { sraih r15, r16, 5 ; pcnt r5, r6 } + { sraih r15, r16, 5 ; shlh r5, r6, r7 } + { sraih r15, r16, 5 ; slth r5, r6, r7 } + { sraih r15, r16, 5 ; subh r5, r6, r7 } + { sraih r5, r6, 5 ; and r15, r16, r17 } + { sraih r5, r6, 5 ; jrp r15 } + { sraih r5, r6, 5 ; minb_u r15, r16, r17 } + { sraih r5, r6, 5 ; packbs_u r15, r16, r17 } + { sraih r5, r6, 5 ; shadd r15, r16, 5 } + { sraih r5, r6, 5 ; slteb_u r15, r16, r17 } + { sraih r5, r6, 5 ; sub r15, r16, r17 } + { sub r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 } + { sub r15, r16, r17 ; adds r5, r6, r7 } + { sub r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 } + { sub r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 } + { sub r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 } + { sub r15, r16, r17 ; info 19 ; lb_u r25, r26 } + { sub r15, r16, r17 ; lb r25, r26 ; clz r5, r6 } + { sub r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 } + { sub r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 } + { sub r15, r16, r17 ; lb_u r25, r26 ; info 19 } + { sub r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 } + { sub r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 } + { sub r15, r16, r17 ; lh r25, r26 ; movei r5, 5 } + { sub r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 } + { sub r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 } + { sub r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 } + { sub r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 } + { sub r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 } + { sub r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 } + { sub r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 } + { sub r15, r16, r17 ; maxh r5, r6, r7 } + { sub r15, r16, r17 ; move r5, r6 ; lb r25, r26 } + { sub r15, r16, r17 ; moveli r5, 0x1234 } + { sub r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 } + { sub r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 } + { sub r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 } + { sub r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 } + { sub r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 } + { sub r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 } + { sub r15, r16, r17 ; nop ; lh r25, r26 } + { sub r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 } + { sub r15, r16, r17 ; packhs r5, r6, r7 } + { sub r15, r16, r17 ; prefetch r25 ; fnop } + { sub r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 } + { sub r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 } + { sub r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 } + { sub r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 } + { sub r15, r16, r17 ; sadah r5, r6, r7 } + { sub r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 } + { sub r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 } + { sub r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 } + { sub r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 } + { sub r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 } + { sub r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 } + { sub r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 } + { sub r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 } + { sub r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 } + { sub r15, r16, r17 ; slt r5, r6, r7 } + { sub r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 } + { sub r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 } + { sub r15, r16, r17 ; sltib_u r5, r6, 5 } + { sub r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 } + { sub r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 } + { sub r15, r16, r17 ; sw r25, r26 ; clz r5, r6 } + { sub r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 } + { sub r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 } + { sub r15, r16, r17 ; tblidxb0 r5, r6 } + { sub r15, r16, r17 ; tblidxb2 r5, r6 } + { sub r15, r16, r17 ; xor r5, r6, r7 } + { sub r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 } + { sub r5, r6, r7 ; and r15, r16, r17 } + { sub r5, r6, r7 ; fnop ; prefetch r25 } + { sub r5, r6, r7 ; info 19 ; lw r25, r26 } + { sub r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 } + { sub r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 } + { sub r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 } + { sub r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 } + { sub r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 } + { sub r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 } + { sub r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 } + { sub r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 } + { sub r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 } + { sub r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 } + { sub r5, r6, r7 ; maxb_u r15, r16, r17 } + { sub r5, r6, r7 ; mnz r15, r16, r17 } + { sub r5, r6, r7 ; movei r15, 5 ; sh r25, r26 } + { sub r5, r6, r7 ; nop ; lh r25, r26 } + { sub r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 } + { sub r5, r6, r7 ; packhs r15, r16, r17 } + { sub r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 } + { sub r5, r6, r7 ; prefetch r25 } + { sub r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 } + { sub r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 } + { sub r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 } + { sub r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 } + { sub r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 } + { sub r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 } + { sub r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 } + { sub r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 } + { sub r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 } + { sub r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 } + { sub r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 } + { sub r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 } + { sub r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 } + { sub r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 } + { sub r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 } + { sub r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 } + { sub r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 } + { sub r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 } + { subb r15, r16, r17 ; add r5, r6, r7 } + { subb r15, r16, r17 ; clz r5, r6 } + { subb r15, r16, r17 ; mm r5, r6, r7, 5, 7 } + { subb r15, r16, r17 ; mulhla_su r5, r6, r7 } + { subb r15, r16, r17 ; packbs_u r5, r6, r7 } + { subb r15, r16, r17 ; seqib r5, r6, 5 } + { subb r15, r16, r17 ; slteb r5, r6, r7 } + { subb r15, r16, r17 ; sraih r5, r6, 5 } + { subb r5, r6, r7 ; addih r15, r16, 5 } + { subb r5, r6, r7 ; iret } + { subb r5, r6, r7 ; maxib_u r15, r16, 5 } + { subb r5, r6, r7 ; nop } + { subb r5, r6, r7 ; seqi r15, r16, 5 } + { subb r5, r6, r7 ; sltb_u r15, r16, r17 } + { subb r5, r6, r7 ; srah r15, r16, r17 } + { subbs_u r15, r16, r17 ; addhs r5, r6, r7 } + { subbs_u r15, r16, r17 ; dword_align r5, r6, r7 } + { subbs_u r15, r16, r17 ; move r5, r6 } + { subbs_u r15, r16, r17 ; mulll_ss r5, r6, r7 } + { subbs_u r15, r16, r17 ; pcnt r5, r6 } + { subbs_u r15, r16, r17 ; shlh r5, r6, r7 } + { subbs_u r15, r16, r17 ; slth r5, r6, r7 } + { subbs_u r15, r16, r17 ; subh r5, r6, r7 } + { subbs_u r5, r6, r7 ; and r15, r16, r17 } + { subbs_u r5, r6, r7 ; jrp r15 } + { subbs_u r5, r6, r7 ; minb_u r15, r16, r17 } + { subbs_u r5, r6, r7 ; packbs_u r15, r16, r17 } + { subbs_u r5, r6, r7 ; shadd r15, r16, 5 } + { subbs_u r5, r6, r7 ; slteb_u r15, r16, r17 } + { subbs_u r5, r6, r7 ; sub r15, r16, r17 } + { subh r15, r16, r17 ; addli r5, r6, 0x1234 } + { subh r15, r16, r17 ; inthb r5, r6, r7 } + { subh r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { subh r15, r16, r17 ; mullla_su r5, r6, r7 } + { subh r15, r16, r17 ; s2a r5, r6, r7 } + { subh r15, r16, r17 ; shr r5, r6, r7 } + { subh r15, r16, r17 ; sltib r5, r6, 5 } + { subh r15, r16, r17 ; tblidxb1 r5, r6 } + { subh r5, r6, r7 ; finv r15 } + { subh r5, r6, r7 ; lbadd_u r15, r16, 5 } + { subh r5, r6, r7 ; mm r15, r16, r17, 5, 7 } + { subh r5, r6, r7 ; prefetch r15 } + { subh r5, r6, r7 ; shli r15, r16, 5 } + { subh r5, r6, r7 ; slth_u r15, r16, r17 } + { subh r5, r6, r7 ; subhs r15, r16, r17 } + { subhs r15, r16, r17 ; adiffh r5, r6, r7 } + { subhs r15, r16, r17 ; maxb_u r5, r6, r7 } + { subhs r15, r16, r17 ; mulhha_su r5, r6, r7 } + { subhs r15, r16, r17 ; mvz r5, r6, r7 } + { subhs r15, r16, r17 ; sadah_u r5, r6, r7 } + { subhs r15, r16, r17 ; shrib r5, r6, 5 } + { subhs r15, r16, r17 ; sne r5, r6, r7 } + { subhs r15, r16, r17 ; xori r5, r6, 5 } + { subhs r5, r6, r7 ; ill } + { subhs r5, r6, r7 ; lhadd_u r15, r16, 5 } + { subhs r5, r6, r7 ; move r15, r16 } + { subhs r5, r6, r7 ; s1a r15, r16, r17 } + { subhs r5, r6, r7 ; shrb r15, r16, r17 } + { subhs r5, r6, r7 ; sltib_u r15, r16, 5 } + { subhs r5, r6, r7 ; tns r15, r16 } + { subs r15, r16, r17 ; avgb_u r5, r6, r7 } + { subs r15, r16, r17 ; minb_u r5, r6, r7 } + { subs r15, r16, r17 ; mulhl_su r5, r6, r7 } + { subs r15, r16, r17 ; nop } + { subs r15, r16, r17 ; seq r5, r6, r7 } + { subs r15, r16, r17 ; sltb r5, r6, r7 } + { subs r15, r16, r17 ; srab r5, r6, r7 } + { subs r5, r6, r7 ; addh r15, r16, r17 } + { subs r5, r6, r7 ; inthh r15, r16, r17 } + { subs r5, r6, r7 ; lwadd r15, r16, 5 } + { subs r5, r6, r7 ; mtspr 0x5, r16 } + { subs r5, r6, r7 ; sbadd r15, r16, 5 } + { subs r5, r6, r7 ; shrih r15, r16, 5 } + { subs r5, r6, r7 ; sneb r15, r16, r17 } + { sw r15, r16 ; add r5, r6, r7 } + { sw r15, r16 ; clz r5, r6 } + { sw r15, r16 ; mm r5, r6, r7, 5, 7 } + { sw r15, r16 ; mulhla_su r5, r6, r7 } + { sw r15, r16 ; packbs_u r5, r6, r7 } + { sw r15, r16 ; seqib r5, r6, 5 } + { sw r15, r16 ; slteb r5, r6, r7 } + { sw r15, r16 ; sraih r5, r6, 5 } + { sw r25, r26 ; add r15, r16, r17 ; ctz r5, r6 } + { sw r25, r26 ; add r15, r16, r17 ; or r5, r6, r7 } + { sw r25, r26 ; add r15, r16, r17 ; sne r5, r6, r7 } + { sw r25, r26 ; add r5, r6, r7 ; mz r15, r16, r17 } + { sw r25, r26 ; add r5, r6, r7 ; slti r15, r16, 5 } + { sw r25, r26 ; addi r15, r16, 5 ; movei r5, 5 } + { sw r25, r26 ; addi r15, r16, 5 ; s1a r5, r6, r7 } + { sw r25, r26 ; addi r15, r16, 5 ; tblidxb1 r5, r6 } + { sw r25, r26 ; addi r5, r6, 5 ; rl r15, r16, r17 } + { sw r25, r26 ; addi r5, r6, 5 ; sub r15, r16, r17 } + { sw r25, r26 ; and r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { sw r25, r26 ; and r15, r16, r17 ; shl r5, r6, r7 } + { sw r25, r26 ; and r5, r6, r7 ; add r15, r16, r17 } + { sw r25, r26 ; and r5, r6, r7 ; seq r15, r16, r17 } + { sw r25, r26 ; andi r15, r16, 5 ; and r5, r6, r7 } + { sw r25, r26 ; andi r15, r16, 5 ; mvnz r5, r6, r7 } + { sw r25, r26 ; andi r15, r16, 5 ; slt_u r5, r6, r7 } + { sw r25, r26 ; andi r5, r6, 5 ; ill } + { sw r25, r26 ; andi r5, r6, 5 ; shri r15, r16, 5 } + { sw r25, r26 ; bitx r5, r6 ; mnz r15, r16, r17 } + { sw r25, r26 ; bitx r5, r6 ; slt_u r15, r16, r17 } + { sw r25, r26 ; bytex r5, r6 ; movei r15, 5 } + { sw r25, r26 ; bytex r5, r6 ; slte_u r15, r16, r17 } + { sw r25, r26 ; clz r5, r6 ; nop } + { sw r25, r26 ; clz r5, r6 ; slti_u r15, r16, 5 } + { sw r25, r26 ; ctz r5, r6 ; or r15, r16, r17 } + { sw r25, r26 ; ctz r5, r6 ; sra r15, r16, r17 } + { sw r25, r26 ; fnop ; mnz r15, r16, r17 } + { sw r25, r26 ; fnop ; nor r15, r16, r17 } + { sw r25, r26 ; fnop ; seqi r5, r6, 5 } + { sw r25, r26 ; fnop ; slti_u r5, r6, 5 } + { sw r25, r26 ; ill ; bitx r5, r6 } + { sw r25, r26 ; ill ; mz r5, r6, r7 } + { sw r25, r26 ; ill ; slte_u r5, r6, r7 } + { sw r25, r26 ; info 19 ; andi r5, r6, 5 } + { sw r25, r26 ; info 19 ; mulll_uu r5, r6, r7 } + { sw r25, r26 ; info 19 ; s1a r5, r6, r7 } + { sw r25, r26 ; info 19 ; slt_u r5, r6, r7 } + { sw r25, r26 ; info 19 ; tblidxb3 r5, r6 } + { sw r25, r26 ; mnz r15, r16, r17 ; mulhha_uu r5, r6, r7 } + { sw r25, r26 ; mnz r15, r16, r17 ; seqi r5, r6, 5 } + { sw r25, r26 ; mnz r15, r16, r17 } + { sw r25, r26 ; mnz r5, r6, r7 ; s3a r15, r16, r17 } + { sw r25, r26 ; move r15, r16 ; addi r5, r6, 5 } + { sw r25, r26 ; move r15, r16 ; mullla_uu r5, r6, r7 } + { sw r25, r26 ; move r15, r16 ; slt r5, r6, r7 } + { sw r25, r26 ; move r5, r6 ; fnop } + { sw r25, r26 ; move r5, r6 ; shr r15, r16, r17 } + { sw r25, r26 ; movei r15, 5 ; clz r5, r6 } + { sw r25, r26 ; movei r15, 5 ; nor r5, r6, r7 } + { sw r25, r26 ; movei r15, 5 ; slti_u r5, r6, 5 } + { sw r25, r26 ; movei r5, 5 ; movei r15, 5 } + { sw r25, r26 ; movei r5, 5 ; slte_u r15, r16, r17 } + { sw r25, r26 ; mulhh_ss r5, r6, r7 ; nop } + { sw r25, r26 ; mulhh_ss r5, r6, r7 ; slti_u r15, r16, 5 } + { sw r25, r26 ; mulhh_uu r5, r6, r7 ; or r15, r16, r17 } + { sw r25, r26 ; mulhh_uu r5, r6, r7 ; sra r15, r16, r17 } + { sw r25, r26 ; mulhha_ss r5, r6, r7 ; rl r15, r16, r17 } + { sw r25, r26 ; mulhha_ss r5, r6, r7 ; sub r15, r16, r17 } + { sw r25, r26 ; mulhha_uu r5, r6, r7 ; s1a r15, r16, r17 } + { sw r25, r26 ; mulhha_uu r5, r6, r7 } + { sw r25, r26 ; mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 } + { sw r25, r26 ; mulll_ss r5, r6, r7 ; addi r15, r16, 5 } + { sw r25, r26 ; mulll_ss r5, r6, r7 ; seqi r15, r16, 5 } + { sw r25, r26 ; mulll_uu r5, r6, r7 ; andi r15, r16, 5 } + { sw r25, r26 ; mulll_uu r5, r6, r7 ; shli r15, r16, 5 } + { sw r25, r26 ; mullla_ss r5, r6, r7 ; ill } + { sw r25, r26 ; mullla_ss r5, r6, r7 ; shri r15, r16, 5 } + { sw r25, r26 ; mullla_uu r5, r6, r7 ; mnz r15, r16, r17 } + { sw r25, r26 ; mullla_uu r5, r6, r7 ; slt_u r15, r16, r17 } + { sw r25, r26 ; mvnz r5, r6, r7 ; movei r15, 5 } + { sw r25, r26 ; mvnz r5, r6, r7 ; slte_u r15, r16, r17 } + { sw r25, r26 ; mvz r5, r6, r7 ; nop } + { sw r25, r26 ; mvz r5, r6, r7 ; slti_u r15, r16, 5 } + { sw r25, r26 ; mz r15, r16, r17 ; mulhh_ss r5, r6, r7 } + { sw r25, r26 ; mz r15, r16, r17 ; s2a r5, r6, r7 } + { sw r25, r26 ; mz r15, r16, r17 ; tblidxb2 r5, r6 } + { sw r25, r26 ; mz r5, r6, r7 ; rli r15, r16, 5 } + { sw r25, r26 ; mz r5, r6, r7 ; xor r15, r16, r17 } + { sw r25, r26 ; nop ; move r5, r6 } + { sw r25, r26 ; nop ; or r5, r6, r7 } + { sw r25, r26 ; nop ; shli r15, r16, 5 } + { sw r25, r26 ; nop ; sra r15, r16, r17 } + { sw r25, r26 ; nor r15, r16, r17 ; ctz r5, r6 } + { sw r25, r26 ; nor r15, r16, r17 ; or r5, r6, r7 } + { sw r25, r26 ; nor r15, r16, r17 ; sne r5, r6, r7 } + { sw r25, r26 ; nor r5, r6, r7 ; mz r15, r16, r17 } + { sw r25, r26 ; nor r5, r6, r7 ; slti r15, r16, 5 } + { sw r25, r26 ; or r15, r16, r17 ; movei r5, 5 } + { sw r25, r26 ; or r15, r16, r17 ; s1a r5, r6, r7 } + { sw r25, r26 ; or r15, r16, r17 ; tblidxb1 r5, r6 } + { sw r25, r26 ; or r5, r6, r7 ; rl r15, r16, r17 } + { sw r25, r26 ; or r5, r6, r7 ; sub r15, r16, r17 } + { sw r25, r26 ; ori r15, r16, 5 ; mulhlsa_uu r5, r6, r7 } + { sw r25, r26 ; ori r15, r16, 5 ; shl r5, r6, r7 } + { sw r25, r26 ; ori r5, r6, 5 ; add r15, r16, r17 } + { sw r25, r26 ; ori r5, r6, 5 ; seq r15, r16, r17 } + { sw r25, r26 ; pcnt r5, r6 ; and r15, r16, r17 } + { sw r25, r26 ; pcnt r5, r6 ; shl r15, r16, r17 } + { sw r25, r26 ; rl r15, r16, r17 ; bitx r5, r6 } + { sw r25, r26 ; rl r15, r16, r17 ; mz r5, r6, r7 } + { sw r25, r26 ; rl r15, r16, r17 ; slte_u r5, r6, r7 } + { sw r25, r26 ; rl r5, r6, r7 ; mnz r15, r16, r17 } + { sw r25, r26 ; rl r5, r6, r7 ; slt_u r15, r16, r17 } + { sw r25, r26 ; rli r15, r16, 5 ; info 19 } + { sw r25, r26 ; rli r15, r16, 5 ; pcnt r5, r6 } + { sw r25, r26 ; rli r15, r16, 5 ; srai r5, r6, 5 } + { sw r25, r26 ; rli r5, r6, 5 ; nor r15, r16, r17 } + { sw r25, r26 ; rli r5, r6, 5 ; sne r15, r16, r17 } + { sw r25, r26 ; s1a r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { sw r25, r26 ; s1a r15, r16, r17 ; s3a r5, r6, r7 } + { sw r25, r26 ; s1a r15, r16, r17 ; tblidxb3 r5, r6 } + { sw r25, r26 ; s1a r5, r6, r7 ; s1a r15, r16, r17 } + { sw r25, r26 ; s1a r5, r6, r7 } + { sw r25, r26 ; s2a r15, r16, r17 ; mulll_uu r5, r6, r7 } + { sw r25, r26 ; s2a r15, r16, r17 ; shr r5, r6, r7 } + { sw r25, r26 ; s2a r5, r6, r7 ; and r15, r16, r17 } + { sw r25, r26 ; s2a r5, r6, r7 ; shl r15, r16, r17 } + { sw r25, r26 ; s3a r15, r16, r17 ; bitx r5, r6 } + { sw r25, r26 ; s3a r15, r16, r17 ; mz r5, r6, r7 } + { sw r25, r26 ; s3a r15, r16, r17 ; slte_u r5, r6, r7 } + { sw r25, r26 ; s3a r5, r6, r7 ; mnz r15, r16, r17 } + { sw r25, r26 ; s3a r5, r6, r7 ; slt_u r15, r16, r17 } + { sw r25, r26 ; seq r15, r16, r17 ; info 19 } + { sw r25, r26 ; seq r15, r16, r17 ; pcnt r5, r6 } + { sw r25, r26 ; seq r15, r16, r17 ; srai r5, r6, 5 } + { sw r25, r26 ; seq r5, r6, r7 ; nor r15, r16, r17 } + { sw r25, r26 ; seq r5, r6, r7 ; sne r15, r16, r17 } + { sw r25, r26 ; seqi r15, r16, 5 ; mulhh_uu r5, r6, r7 } + { sw r25, r26 ; seqi r15, r16, 5 ; s3a r5, r6, r7 } + { sw r25, r26 ; seqi r15, r16, 5 ; tblidxb3 r5, r6 } + { sw r25, r26 ; seqi r5, r6, 5 ; s1a r15, r16, r17 } + { sw r25, r26 ; seqi r5, r6, 5 } + { sw r25, r26 ; shl r15, r16, r17 ; mulll_uu r5, r6, r7 } + { sw r25, r26 ; shl r15, r16, r17 ; shr r5, r6, r7 } + { sw r25, r26 ; shl r5, r6, r7 ; and r15, r16, r17 } + { sw r25, r26 ; shl r5, r6, r7 ; shl r15, r16, r17 } + { sw r25, r26 ; shli r15, r16, 5 ; bitx r5, r6 } + { sw r25, r26 ; shli r15, r16, 5 ; mz r5, r6, r7 } + { sw r25, r26 ; shli r15, r16, 5 ; slte_u r5, r6, r7 } + { sw r25, r26 ; shli r5, r6, 5 ; mnz r15, r16, r17 } + { sw r25, r26 ; shli r5, r6, 5 ; slt_u r15, r16, r17 } + { sw r25, r26 ; shr r15, r16, r17 ; info 19 } + { sw r25, r26 ; shr r15, r16, r17 ; pcnt r5, r6 } + { sw r25, r26 ; shr r15, r16, r17 ; srai r5, r6, 5 } + { sw r25, r26 ; shr r5, r6, r7 ; nor r15, r16, r17 } + { sw r25, r26 ; shr r5, r6, r7 ; sne r15, r16, r17 } + { sw r25, r26 ; shri r15, r16, 5 ; mulhh_uu r5, r6, r7 } + { sw r25, r26 ; shri r15, r16, 5 ; s3a r5, r6, r7 } + { sw r25, r26 ; shri r15, r16, 5 ; tblidxb3 r5, r6 } + { sw r25, r26 ; shri r5, r6, 5 ; s1a r15, r16, r17 } + { sw r25, r26 ; shri r5, r6, 5 } + { sw r25, r26 ; slt r15, r16, r17 ; mulll_uu r5, r6, r7 } + { sw r25, r26 ; slt r15, r16, r17 ; shr r5, r6, r7 } + { sw r25, r26 ; slt r5, r6, r7 ; and r15, r16, r17 } + { sw r25, r26 ; slt r5, r6, r7 ; shl r15, r16, r17 } + { sw r25, r26 ; slt_u r15, r16, r17 ; bitx r5, r6 } + { sw r25, r26 ; slt_u r15, r16, r17 ; mz r5, r6, r7 } + { sw r25, r26 ; slt_u r15, r16, r17 ; slte_u r5, r6, r7 } + { sw r25, r26 ; slt_u r5, r6, r7 ; mnz r15, r16, r17 } + { sw r25, r26 ; slt_u r5, r6, r7 ; slt_u r15, r16, r17 } + { sw r25, r26 ; slte r15, r16, r17 ; info 19 } + { sw r25, r26 ; slte r15, r16, r17 ; pcnt r5, r6 } + { sw r25, r26 ; slte r15, r16, r17 ; srai r5, r6, 5 } + { sw r25, r26 ; slte r5, r6, r7 ; nor r15, r16, r17 } + { sw r25, r26 ; slte r5, r6, r7 ; sne r15, r16, r17 } + { sw r25, r26 ; slte_u r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { sw r25, r26 ; slte_u r15, r16, r17 ; s3a r5, r6, r7 } + { sw r25, r26 ; slte_u r15, r16, r17 ; tblidxb3 r5, r6 } + { sw r25, r26 ; slte_u r5, r6, r7 ; s1a r15, r16, r17 } + { sw r25, r26 ; slte_u r5, r6, r7 } + { sw r25, r26 ; slti r15, r16, 5 ; mulll_uu r5, r6, r7 } + { sw r25, r26 ; slti r15, r16, 5 ; shr r5, r6, r7 } + { sw r25, r26 ; slti r5, r6, 5 ; and r15, r16, r17 } + { sw r25, r26 ; slti r5, r6, 5 ; shl r15, r16, r17 } + { sw r25, r26 ; slti_u r15, r16, 5 ; bitx r5, r6 } + { sw r25, r26 ; slti_u r15, r16, 5 ; mz r5, r6, r7 } + { sw r25, r26 ; slti_u r15, r16, 5 ; slte_u r5, r6, r7 } + { sw r25, r26 ; slti_u r5, r6, 5 ; mnz r15, r16, r17 } + { sw r25, r26 ; slti_u r5, r6, 5 ; slt_u r15, r16, r17 } + { sw r25, r26 ; sne r15, r16, r17 ; info 19 } + { sw r25, r26 ; sne r15, r16, r17 ; pcnt r5, r6 } + { sw r25, r26 ; sne r15, r16, r17 ; srai r5, r6, 5 } + { sw r25, r26 ; sne r5, r6, r7 ; nor r15, r16, r17 } + { sw r25, r26 ; sne r5, r6, r7 ; sne r15, r16, r17 } + { sw r25, r26 ; sra r15, r16, r17 ; mulhh_uu r5, r6, r7 } + { sw r25, r26 ; sra r15, r16, r17 ; s3a r5, r6, r7 } + { sw r25, r26 ; sra r15, r16, r17 ; tblidxb3 r5, r6 } + { sw r25, r26 ; sra r5, r6, r7 ; s1a r15, r16, r17 } + { sw r25, r26 ; sra r5, r6, r7 } + { sw r25, r26 ; srai r15, r16, 5 ; mulll_uu r5, r6, r7 } + { sw r25, r26 ; srai r15, r16, 5 ; shr r5, r6, r7 } + { sw r25, r26 ; srai r5, r6, 5 ; and r15, r16, r17 } + { sw r25, r26 ; srai r5, r6, 5 ; shl r15, r16, r17 } + { sw r25, r26 ; sub r15, r16, r17 ; bitx r5, r6 } + { sw r25, r26 ; sub r15, r16, r17 ; mz r5, r6, r7 } + { sw r25, r26 ; sub r15, r16, r17 ; slte_u r5, r6, r7 } + { sw r25, r26 ; sub r5, r6, r7 ; mnz r15, r16, r17 } + { sw r25, r26 ; sub r5, r6, r7 ; slt_u r15, r16, r17 } + { sw r25, r26 ; tblidxb0 r5, r6 ; movei r15, 5 } + { sw r25, r26 ; tblidxb0 r5, r6 ; slte_u r15, r16, r17 } + { sw r25, r26 ; tblidxb1 r5, r6 ; nop } + { sw r25, r26 ; tblidxb1 r5, r6 ; slti_u r15, r16, 5 } + { sw r25, r26 ; tblidxb2 r5, r6 ; or r15, r16, r17 } + { sw r25, r26 ; tblidxb2 r5, r6 ; sra r15, r16, r17 } + { sw r25, r26 ; tblidxb3 r5, r6 ; rl r15, r16, r17 } + { sw r25, r26 ; tblidxb3 r5, r6 ; sub r15, r16, r17 } + { sw r25, r26 ; xor r15, r16, r17 ; mulhlsa_uu r5, r6, r7 } + { sw r25, r26 ; xor r15, r16, r17 ; shl r5, r6, r7 } + { sw r25, r26 ; xor r5, r6, r7 ; add r15, r16, r17 } + { sw r25, r26 ; xor r5, r6, r7 ; seq r15, r16, r17 } + { swadd r15, r16, 5 ; addbs_u r5, r6, r7 } + { swadd r15, r16, 5 ; crc32_8 r5, r6, r7 } + { swadd r15, r16, 5 ; mnzb r5, r6, r7 } + { swadd r15, r16, 5 ; mulhla_uu r5, r6, r7 } + { swadd r15, r16, 5 ; packhs r5, r6, r7 } + { swadd r15, r16, 5 ; shl r5, r6, r7 } + { swadd r15, r16, 5 ; slteh r5, r6, r7 } + { swadd r15, r16, 5 ; subb r5, r6, r7 } + { tblidxb0 r5, r6 ; add r15, r16, r17 ; prefetch r25 } + { tblidxb0 r5, r6 ; addih r15, r16, 5 } + { tblidxb0 r5, r6 ; andi r15, r16, 5 ; sb r25, r26 } + { tblidxb0 r5, r6 ; ill ; lb_u r25, r26 } + { tblidxb0 r5, r6 ; inthb r15, r16, r17 } + { tblidxb0 r5, r6 ; lb r25, r26 ; movei r15, 5 } + { tblidxb0 r5, r6 ; lb r25, r26 ; slte_u r15, r16, r17 } + { tblidxb0 r5, r6 ; lb_u r25, r26 ; mz r15, r16, r17 } + { tblidxb0 r5, r6 ; lb_u r25, r26 ; slti r15, r16, 5 } + { tblidxb0 r5, r6 ; lh r25, r26 ; movei r15, 5 } + { tblidxb0 r5, r6 ; lh r25, r26 ; slte_u r15, r16, r17 } + { tblidxb0 r5, r6 ; lh_u r25, r26 ; mz r15, r16, r17 } + { tblidxb0 r5, r6 ; lh_u r25, r26 ; slti r15, r16, 5 } + { tblidxb0 r5, r6 ; lw r25, r26 ; move r15, r16 } + { tblidxb0 r5, r6 ; lw r25, r26 ; slte r15, r16, r17 } + { tblidxb0 r5, r6 ; minh r15, r16, r17 } + { tblidxb0 r5, r6 ; move r15, r16 ; lw r25, r26 } + { tblidxb0 r5, r6 ; mz r15, r16, r17 ; lb_u r25, r26 } + { tblidxb0 r5, r6 ; nop } + { tblidxb0 r5, r6 ; or r15, r16, r17 } + { tblidxb0 r5, r6 ; prefetch r25 ; fnop } + { tblidxb0 r5, r6 ; prefetch r25 ; shr r15, r16, r17 } + { tblidxb0 r5, r6 ; rl r15, r16, r17 ; prefetch r25 } + { tblidxb0 r5, r6 ; s1a r15, r16, r17 ; prefetch r25 } + { tblidxb0 r5, r6 ; s3a r15, r16, r17 ; prefetch r25 } + { tblidxb0 r5, r6 ; sb r25, r26 ; ori r15, r16, 5 } + { tblidxb0 r5, r6 ; sb r25, r26 ; srai r15, r16, 5 } + { tblidxb0 r5, r6 ; seqi r15, r16, 5 ; lh_u r25, r26 } + { tblidxb0 r5, r6 ; sh r25, r26 ; mz r15, r16, r17 } + { tblidxb0 r5, r6 ; sh r25, r26 ; slti r15, r16, 5 } + { tblidxb0 r5, r6 ; shlh r15, r16, r17 } + { tblidxb0 r5, r6 ; shr r15, r16, r17 ; sh r25, r26 } + { tblidxb0 r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 } + { tblidxb0 r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 } + { tblidxb0 r5, r6 ; slteb_u r15, r16, r17 } + { tblidxb0 r5, r6 ; slti_u r15, r16, 5 ; prefetch r25 } + { tblidxb0 r5, r6 ; sneh r15, r16, r17 } + { tblidxb0 r5, r6 ; srai r15, r16, 5 ; sh r25, r26 } + { tblidxb0 r5, r6 ; sw r15, r16 } + { tblidxb0 r5, r6 ; sw r25, r26 ; s3a r15, r16, r17 } + { tblidxb0 r5, r6 ; tns r15, r16 } + { tblidxb1 r5, r6 ; add r15, r16, r17 ; sh r25, r26 } + { tblidxb1 r5, r6 ; addlis r15, r16, 0x1234 } + { tblidxb1 r5, r6 ; andi r15, r16, 5 ; sw r25, r26 } + { tblidxb1 r5, r6 ; ill ; lh_u r25, r26 } + { tblidxb1 r5, r6 ; intlb r15, r16, r17 } + { tblidxb1 r5, r6 ; lb r25, r26 ; nop } + { tblidxb1 r5, r6 ; lb r25, r26 ; slti_u r15, r16, 5 } + { tblidxb1 r5, r6 ; lb_u r25, r26 ; nor r15, r16, r17 } + { tblidxb1 r5, r6 ; lb_u r25, r26 ; sne r15, r16, r17 } + { tblidxb1 r5, r6 ; lh r25, r26 ; nop } + { tblidxb1 r5, r6 ; lh r25, r26 ; slti_u r15, r16, 5 } + { tblidxb1 r5, r6 ; lh_u r25, r26 ; nor r15, r16, r17 } + { tblidxb1 r5, r6 ; lh_u r25, r26 ; sne r15, r16, r17 } + { tblidxb1 r5, r6 ; lw r25, r26 ; mz r15, r16, r17 } + { tblidxb1 r5, r6 ; lw r25, r26 ; slti r15, r16, 5 } + { tblidxb1 r5, r6 ; minih r15, r16, 5 } + { tblidxb1 r5, r6 ; move r15, r16 ; sb r25, r26 } + { tblidxb1 r5, r6 ; mz r15, r16, r17 ; lh_u r25, r26 } + { tblidxb1 r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 } + { tblidxb1 r5, r6 ; ori r15, r16, 5 ; lb_u r25, r26 } + { tblidxb1 r5, r6 ; prefetch r25 ; info 19 } + { tblidxb1 r5, r6 ; prefetch r25 ; slt r15, r16, r17 } + { tblidxb1 r5, r6 ; rl r15, r16, r17 ; sh r25, r26 } + { tblidxb1 r5, r6 ; s1a r15, r16, r17 ; sh r25, r26 } + { tblidxb1 r5, r6 ; s3a r15, r16, r17 ; sh r25, r26 } + { tblidxb1 r5, r6 ; sb r25, r26 ; rli r15, r16, 5 } + { tblidxb1 r5, r6 ; sb r25, r26 ; xor r15, r16, r17 } + { tblidxb1 r5, r6 ; seqi r15, r16, 5 ; prefetch r25 } + { tblidxb1 r5, r6 ; sh r25, r26 ; nor r15, r16, r17 } + { tblidxb1 r5, r6 ; sh r25, r26 ; sne r15, r16, r17 } + { tblidxb1 r5, r6 ; shli r15, r16, 5 ; lb_u r25, r26 } + { tblidxb1 r5, r6 ; shr r15, r16, r17 } + { tblidxb1 r5, r6 ; slt r15, r16, r17 ; prefetch r25 } + { tblidxb1 r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 } + { tblidxb1 r5, r6 ; slteh_u r15, r16, r17 } + { tblidxb1 r5, r6 ; slti_u r15, r16, 5 ; sh r25, r26 } + { tblidxb1 r5, r6 ; sra r15, r16, r17 ; lb_u r25, r26 } + { tblidxb1 r5, r6 ; srai r15, r16, 5 } + { tblidxb1 r5, r6 ; sw r25, r26 ; addi r15, r16, 5 } + { tblidxb1 r5, r6 ; sw r25, r26 ; seqi r15, r16, 5 } + { tblidxb1 r5, r6 ; xor r15, r16, r17 ; lb r25, r26 } + { tblidxb2 r5, r6 ; add r15, r16, r17 } + { tblidxb2 r5, r6 ; and r15, r16, r17 ; lb r25, r26 } + { tblidxb2 r5, r6 ; auli r15, r16, 0x1234 } + { tblidxb2 r5, r6 ; ill ; prefetch r25 } + { tblidxb2 r5, r6 ; inv r15 } + { tblidxb2 r5, r6 ; lb r25, r26 ; or r15, r16, r17 } + { tblidxb2 r5, r6 ; lb r25, r26 ; sra r15, r16, r17 } + { tblidxb2 r5, r6 ; lb_u r25, r26 ; ori r15, r16, 5 } + { tblidxb2 r5, r6 ; lb_u r25, r26 ; srai r15, r16, 5 } + { tblidxb2 r5, r6 ; lh r25, r26 ; or r15, r16, r17 } + { tblidxb2 r5, r6 ; lh r25, r26 ; sra r15, r16, r17 } + { tblidxb2 r5, r6 ; lh_u r25, r26 ; ori r15, r16, 5 } + { tblidxb2 r5, r6 ; lh_u r25, r26 ; srai r15, r16, 5 } + { tblidxb2 r5, r6 ; lw r25, r26 ; nor r15, r16, r17 } + { tblidxb2 r5, r6 ; lw r25, r26 ; sne r15, r16, r17 } + { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; lb r25, r26 } + { tblidxb2 r5, r6 ; move r15, r16 ; sw r25, r26 } + { tblidxb2 r5, r6 ; mz r15, r16, r17 ; prefetch r25 } + { tblidxb2 r5, r6 ; nor r15, r16, r17 ; lh_u r25, r26 } + { tblidxb2 r5, r6 ; ori r15, r16, 5 ; lh_u r25, r26 } + { tblidxb2 r5, r6 ; prefetch r25 ; move r15, r16 } + { tblidxb2 r5, r6 ; prefetch r25 ; slte r15, r16, r17 } + { tblidxb2 r5, r6 ; rl r15, r16, r17 } + { tblidxb2 r5, r6 ; s1a r15, r16, r17 } + { tblidxb2 r5, r6 ; s3a r15, r16, r17 } + { tblidxb2 r5, r6 ; sb r25, r26 ; s2a r15, r16, r17 } + { tblidxb2 r5, r6 ; sbadd r15, r16, 5 } + { tblidxb2 r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 } + { tblidxb2 r5, r6 ; sh r25, r26 ; ori r15, r16, 5 } + { tblidxb2 r5, r6 ; sh r25, r26 ; srai r15, r16, 5 } + { tblidxb2 r5, r6 ; shli r15, r16, 5 ; lh_u r25, r26 } + { tblidxb2 r5, r6 ; shrh r15, r16, r17 } + { tblidxb2 r5, r6 ; slt r15, r16, r17 ; sh r25, r26 } + { tblidxb2 r5, r6 ; slte r15, r16, r17 ; prefetch r25 } + { tblidxb2 r5, r6 ; slth_u r15, r16, r17 } + { tblidxb2 r5, r6 ; slti_u r15, r16, 5 } + { tblidxb2 r5, r6 ; sra r15, r16, r17 ; lh_u r25, r26 } + { tblidxb2 r5, r6 ; sraih r15, r16, 5 } + { tblidxb2 r5, r6 ; sw r25, r26 ; andi r15, r16, 5 } + { tblidxb2 r5, r6 ; sw r25, r26 ; shli r15, r16, 5 } + { tblidxb2 r5, r6 ; xor r15, r16, r17 ; lh r25, r26 } + { tblidxb3 r5, r6 ; addbs_u r15, r16, r17 } + { tblidxb3 r5, r6 ; and r15, r16, r17 ; lh r25, r26 } + { tblidxb3 r5, r6 ; finv r15 } + { tblidxb3 r5, r6 ; ill ; sh r25, r26 } + { tblidxb3 r5, r6 ; jalr r15 } + { tblidxb3 r5, r6 ; lb r25, r26 ; rl r15, r16, r17 } + { tblidxb3 r5, r6 ; lb r25, r26 ; sub r15, r16, r17 } + { tblidxb3 r5, r6 ; lb_u r25, r26 ; rli r15, r16, 5 } + { tblidxb3 r5, r6 ; lb_u r25, r26 ; xor r15, r16, r17 } + { tblidxb3 r5, r6 ; lh r25, r26 ; rl r15, r16, r17 } + { tblidxb3 r5, r6 ; lh r25, r26 ; sub r15, r16, r17 } + { tblidxb3 r5, r6 ; lh_u r25, r26 ; rli r15, r16, 5 } + { tblidxb3 r5, r6 ; lh_u r25, r26 ; xor r15, r16, r17 } + { tblidxb3 r5, r6 ; lw r25, r26 ; ori r15, r16, 5 } + { tblidxb3 r5, r6 ; lw r25, r26 ; srai r15, r16, 5 } + { tblidxb3 r5, r6 ; mnz r15, r16, r17 ; lh r25, r26 } + { tblidxb3 r5, r6 ; movei r15, 5 ; lb r25, r26 } + { tblidxb3 r5, r6 ; mz r15, r16, r17 ; sh r25, r26 } + { tblidxb3 r5, r6 ; nor r15, r16, r17 ; prefetch r25 } + { tblidxb3 r5, r6 ; ori r15, r16, 5 ; prefetch r25 } + { tblidxb3 r5, r6 ; prefetch r25 ; mz r15, r16, r17 } + { tblidxb3 r5, r6 ; prefetch r25 ; slti r15, r16, 5 } + { tblidxb3 r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 } + { tblidxb3 r5, r6 ; s2a r15, r16, r17 ; lb_u r25, r26 } + { tblidxb3 r5, r6 ; sb r25, r26 ; add r15, r16, r17 } + { tblidxb3 r5, r6 ; sb r25, r26 ; seq r15, r16, r17 } + { tblidxb3 r5, r6 ; seq r15, r16, r17 ; lb_u r25, r26 } + { tblidxb3 r5, r6 ; seqi r15, r16, 5 } + { tblidxb3 r5, r6 ; sh r25, r26 ; rli r15, r16, 5 } + { tblidxb3 r5, r6 ; sh r25, r26 ; xor r15, r16, r17 } + { tblidxb3 r5, r6 ; shli r15, r16, 5 ; prefetch r25 } + { tblidxb3 r5, r6 ; shri r15, r16, 5 ; lb_u r25, r26 } + { tblidxb3 r5, r6 ; slt r15, r16, r17 } + { tblidxb3 r5, r6 ; slte r15, r16, r17 ; sh r25, r26 } + { tblidxb3 r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 } + { tblidxb3 r5, r6 ; sltib_u r15, r16, 5 } + { tblidxb3 r5, r6 ; sra r15, r16, r17 ; prefetch r25 } + { tblidxb3 r5, r6 ; sub r15, r16, r17 ; lb_u r25, r26 } + { tblidxb3 r5, r6 ; sw r25, r26 ; ill } + { tblidxb3 r5, r6 ; sw r25, r26 ; shri r15, r16, 5 } + { tblidxb3 r5, r6 ; xor r15, r16, r17 ; lw r25, r26 } + { tns r15, r16 ; and r5, r6, r7 } + { tns r15, r16 ; maxh r5, r6, r7 } + { tns r15, r16 ; mulhha_uu r5, r6, r7 } + { tns r15, r16 ; mz r5, r6, r7 } + { tns r15, r16 ; sadb_u r5, r6, r7 } + { tns r15, r16 ; shrih r5, r6, 5 } + { tns r15, r16 ; sneb r5, r6, r7 } + { wh64 r15 ; add r5, r6, r7 } + { wh64 r15 ; clz r5, r6 } + { wh64 r15 ; mm r5, r6, r7, 5, 7 } + { wh64 r15 ; mulhla_su r5, r6, r7 } + { wh64 r15 ; packbs_u r5, r6, r7 } + { wh64 r15 ; seqib r5, r6, 5 } + { wh64 r15 ; slteb r5, r6, r7 } + { wh64 r15 ; sraih r5, r6, 5 } + { xor r15, r16, r17 ; add r5, r6, r7 ; sh r25, r26 } + { xor r15, r16, r17 ; addlis r5, r6, 0x1234 } + { xor r15, r16, r17 ; andi r5, r6, 5 ; sb r25, r26 } + { xor r15, r16, r17 ; bytex r5, r6 ; lh_u r25, r26 } + { xor r15, r16, r17 ; ctz r5, r6 ; lb_u r25, r26 } + { xor r15, r16, r17 ; info 19 ; lb r25, r26 } + { xor r15, r16, r17 ; lb r25, r26 ; bytex r5, r6 } + { xor r15, r16, r17 ; lb r25, r26 ; nop } + { xor r15, r16, r17 ; lb r25, r26 ; slti r5, r6, 5 } + { xor r15, r16, r17 ; lb_u r25, r26 ; fnop } + { xor r15, r16, r17 ; lb_u r25, r26 ; ori r5, r6, 5 } + { xor r15, r16, r17 ; lb_u r25, r26 ; sra r5, r6, r7 } + { xor r15, r16, r17 ; lh r25, r26 ; move r5, r6 } + { xor r15, r16, r17 ; lh r25, r26 ; rli r5, r6, 5 } + { xor r15, r16, r17 ; lh r25, r26 ; tblidxb0 r5, r6 } + { xor r15, r16, r17 ; lh_u r25, r26 ; mulhh_uu r5, r6, r7 } + { xor r15, r16, r17 ; lh_u r25, r26 ; s3a r5, r6, r7 } + { xor r15, r16, r17 ; lh_u r25, r26 ; tblidxb3 r5, r6 } + { xor r15, r16, r17 ; lw r25, r26 ; mulhlsa_uu r5, r6, r7 } + { xor r15, r16, r17 ; lw r25, r26 ; shl r5, r6, r7 } + { xor r15, r16, r17 ; maxb_u r5, r6, r7 } + { xor r15, r16, r17 ; mnzh r5, r6, r7 } + { xor r15, r16, r17 ; movei r5, 5 } + { xor r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sb r25, r26 } + { xor r15, r16, r17 ; mulhha_uu r5, r6, r7 ; prefetch r25 } + { xor r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sb r25, r26 } + { xor r15, r16, r17 ; mulll_uu r5, r6, r7 ; prefetch r25 } + { xor r15, r16, r17 ; mullla_uu r5, r6, r7 ; lw r25, r26 } + { xor r15, r16, r17 ; mvz r5, r6, r7 ; lh_u r25, r26 } + { xor r15, r16, r17 ; nop ; lb_u r25, r26 } + { xor r15, r16, r17 ; or r5, r6, r7 ; lb_u r25, r26 } + { xor r15, r16, r17 ; packhb r5, r6, r7 } + { xor r15, r16, r17 ; prefetch r25 ; ctz r5, r6 } + { xor r15, r16, r17 ; prefetch r25 ; or r5, r6, r7 } + { xor r15, r16, r17 ; prefetch r25 ; sne r5, r6, r7 } + { xor r15, r16, r17 ; rli r5, r6, 5 ; lb r25, r26 } + { xor r15, r16, r17 ; s2a r5, r6, r7 ; lb r25, r26 } + { xor r15, r16, r17 ; sadab_u r5, r6, r7 } + { xor r15, r16, r17 ; sb r25, r26 ; mulhh_uu r5, r6, r7 } + { xor r15, r16, r17 ; sb r25, r26 ; s3a r5, r6, r7 } + { xor r15, r16, r17 ; sb r25, r26 ; tblidxb3 r5, r6 } + { xor r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 } + { xor r15, r16, r17 ; sh r25, r26 ; mulhh_ss r5, r6, r7 } + { xor r15, r16, r17 ; sh r25, r26 ; s2a r5, r6, r7 } + { xor r15, r16, r17 ; sh r25, r26 ; tblidxb2 r5, r6 } + { xor r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 } + { xor r15, r16, r17 ; shri r5, r6, 5 ; lb r25, r26 } + { xor r15, r16, r17 ; slt r5, r6, r7 ; sw r25, r26 } + { xor r15, r16, r17 ; slte r5, r6, r7 ; sb r25, r26 } + { xor r15, r16, r17 ; slti r5, r6, 5 ; lb r25, r26 } + { xor r15, r16, r17 ; sltib r5, r6, 5 } + { xor r15, r16, r17 ; sra r5, r6, r7 ; lw r25, r26 } + { xor r15, r16, r17 ; sub r5, r6, r7 ; lb r25, r26 } + { xor r15, r16, r17 ; sw r25, r26 ; bytex r5, r6 } + { xor r15, r16, r17 ; sw r25, r26 ; nop } + { xor r15, r16, r17 ; sw r25, r26 ; slti r5, r6, 5 } + { xor r15, r16, r17 ; tblidxb0 r5, r6 ; sw r25, r26 } + { xor r15, r16, r17 ; tblidxb2 r5, r6 ; sw r25, r26 } + { xor r15, r16, r17 ; xor r5, r6, r7 ; sw r25, r26 } + { xor r5, r6, r7 ; addi r15, r16, 5 ; lh_u r25, r26 } + { xor r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 } + { xor r5, r6, r7 ; fnop ; lw r25, r26 } + { xor r5, r6, r7 ; info 19 ; lh_u r25, r26 } + { xor r5, r6, r7 ; lb r25, r26 ; addi r15, r16, 5 } + { xor r5, r6, r7 ; lb r25, r26 ; seqi r15, r16, 5 } + { xor r5, r6, r7 ; lb_u r25, r26 ; and r15, r16, r17 } + { xor r5, r6, r7 ; lb_u r25, r26 ; shl r15, r16, r17 } + { xor r5, r6, r7 ; lh r25, r26 ; addi r15, r16, 5 } + { xor r5, r6, r7 ; lh r25, r26 ; seqi r15, r16, 5 } + { xor r5, r6, r7 ; lh_u r25, r26 ; and r15, r16, r17 } + { xor r5, r6, r7 ; lh_u r25, r26 ; shl r15, r16, r17 } + { xor r5, r6, r7 ; lw r25, r26 ; add r15, r16, r17 } + { xor r5, r6, r7 ; lw r25, r26 ; seq r15, r16, r17 } + { xor r5, r6, r7 ; lwadd_na r15, r16, 5 } + { xor r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 } + { xor r5, r6, r7 ; movei r15, 5 ; sb r25, r26 } + { xor r5, r6, r7 ; nop ; lb_u r25, r26 } + { xor r5, r6, r7 ; or r15, r16, r17 ; lb_u r25, r26 } + { xor r5, r6, r7 ; packhb r15, r16, r17 } + { xor r5, r6, r7 ; prefetch r25 ; rli r15, r16, 5 } + { xor r5, r6, r7 ; prefetch r25 ; xor r15, r16, r17 } + { xor r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 } + { xor r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 } + { xor r5, r6, r7 ; sb r25, r26 ; info 19 } + { xor r5, r6, r7 ; sb r25, r26 ; slt r15, r16, r17 } + { xor r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 } + { xor r5, r6, r7 ; sh r25, r26 ; and r15, r16, r17 } + { xor r5, r6, r7 ; sh r25, r26 ; shl r15, r16, r17 } + { xor r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 } + { xor r5, r6, r7 ; shlih r15, r16, 5 } + { xor r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 } + { xor r5, r6, r7 ; slt_u r15, r16, r17 ; prefetch r25 } + { xor r5, r6, r7 ; slte_u r15, r16, r17 ; lh_u r25, r26 } + { xor r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 } + { xor r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 } + { xor r5, r6, r7 ; srah r15, r16, r17 } + { xor r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 } + { xor r5, r6, r7 ; sw r25, r26 ; nop } + { xor r5, r6, r7 ; sw r25, r26 ; slti_u r15, r16, 5 } + { xor r5, r6, r7 ; xori r15, r16, 5 } + { xori r15, r16, 5 ; bytex r5, r6 } + { xori r15, r16, 5 ; minih r5, r6, 5 } + { xori r15, r16, 5 ; mulhla_ss r5, r6, r7 } + { xori r15, r16, 5 ; ori r5, r6, 5 } + { xori r15, r16, 5 ; seqi r5, r6, 5 } + { xori r15, r16, 5 ; slte_u r5, r6, r7 } + { xori r15, r16, 5 ; sraib r5, r6, 5 } + { xori r5, r6, 5 ; addib r15, r16, 5 } + { xori r5, r6, 5 ; inv r15 } + { xori r5, r6, 5 ; maxh r15, r16, r17 } + { xori r5, r6, 5 ; mzh r15, r16, r17 } + { xori r5, r6, 5 ; seqh r15, r16, r17 } + { xori r5, r6, 5 ; sltb r15, r16, r17 } + { xori r5, r6, 5 ; srab r15, r16, r17 } diff --git a/gas/testsuite/gas/tilepro/tilepro.exp b/gas/testsuite/gas/tilepro/tilepro.exp new file mode 100644 index 0000000..f07e3fd --- /dev/null +++ b/gas/testsuite/gas/tilepro/tilepro.exp @@ -0,0 +1,24 @@ +# Expect script for TILEPro assembler tests. +# Copyright 2011 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +if [istarget tilepro-*-*] { + run_dump_test "t_insns" + run_dump_test "t_constants" +} diff --git a/gas/write.c b/gas/write.c index a5d2b4d..a1e0205 100644 --- a/gas/write.c +++ b/gas/write.c @@ -1,7 +1,7 @@ /* write.c - emit .o file Copyright 1986, 1987, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, - 2010 Free Software Foundation, Inc. + 2010, 2011 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -654,15 +654,21 @@ dump_section_relocs (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, FILE *stream) static void resolve_reloc_expr_symbols (void) { + bfd_vma addr_mask = 1; struct reloc_list *r; + /* Avoid a shift by the width of type. */ + addr_mask <<= bfd_arch_bits_per_address (stdoutput) - 1; + addr_mask <<= 1; + addr_mask -= 1; + for (r = reloc_list; r; r = r->next) { + reloc_howto_type *howto = r->u.a.howto; expressionS *symval; symbolS *sym; bfd_vma offset, addend; asection *sec; - reloc_howto_type *howto; resolve_symbol_value (r->u.a.offset_sym); symval = symbol_get_value_expression (r->u.a.offset_sym); @@ -708,7 +714,29 @@ resolve_reloc_expr_symbols (void) sec = NULL; } else if (sym != NULL) - symbol_mark_used_in_reloc (sym); + { + /* Convert relocs against local symbols to refer to the + corresponding section symbol plus offset instead. Keep + PC-relative relocs of the REL variety intact though to + prevent the offset from overflowing the relocated field, + unless it has enough bits to cover the whole address + space. */ + if (S_IS_LOCAL (sym) && !symbol_section_p (sym) + && !(howto->partial_inplace + && howto->pc_relative + && howto->src_mask != addr_mask)) + { + asection *symsec = S_GET_SEGMENT (sym); + if (!(((symsec->flags & SEC_MERGE) != 0 + && addend != 0) + || (symsec->flags & SEC_THREAD_LOCAL) != 0)) + { + addend += S_GET_VALUE (sym); + sym = section_symbol (symsec); + } + } + symbol_mark_used_in_reloc (sym); + } } if (sym == NULL) { @@ -717,8 +745,6 @@ resolve_reloc_expr_symbols (void) sym = abs_section_sym; } - howto = r->u.a.howto; - r->u.b.sec = sec; r->u.b.s = symbol_get_bfdsym (sym); r->u.b.r.sym_ptr_ptr = &r->u.b.s; @@ -1146,15 +1172,37 @@ install_reloc (asection *sec, arelent *reloc, fragS *fragp, } } +static fragS * +get_frag_for_reloc (fragS *last_frag, + const segment_info_type *seginfo, + const struct reloc_list *r) +{ + fragS *f; + + for (f = last_frag; f != NULL; f = f->fr_next) + if (f->fr_address <= r->u.b.r.address + && r->u.b.r.address < f->fr_address + f->fr_fix) + return f; + + for (f = seginfo->frchainP->frch_root; f != NULL; f = f->fr_next) + if (f->fr_address <= r->u.b.r.address + && r->u.b.r.address < f->fr_address + f->fr_fix) + return f; + + as_bad_where (r->file, r->line, + _("reloc not within (fixed part of) section")); + return NULL; +} + static void write_relocs (bfd *abfd, asection *sec, void *xxx ATTRIBUTE_UNUSED) { segment_info_type *seginfo = seg_info (sec); - unsigned int i; unsigned int n; struct reloc_list *my_reloc_list, **rp, *r; arelent **relocs; fixS *fixp; + fragS *last_frag; /* If seginfo is NULL, we did not create this section; don't do anything with it. */ @@ -1188,12 +1236,19 @@ write_relocs (bfd *abfd, asection *sec, void *xxx ATTRIBUTE_UNUSED) relocs = (arelent **) xcalloc (n, sizeof (arelent *)); - i = 0; + n = 0; + r = my_reloc_list; + last_frag = NULL; for (fixp = seginfo->fix_root; fixp != (fixS *) NULL; fixp = fixp->fx_next) { - int j; int fx_size, slack; offsetT loc; + arelent **reloc; +#ifndef RELOC_EXPANSION_POSSIBLE + arelent *rel; + + reloc = &rel; +#endif if (fixp->fx_done) continue; @@ -1208,40 +1263,58 @@ write_relocs (bfd *abfd, asection *sec, void *xxx ATTRIBUTE_UNUSED) _("internal error: fixup not contained within frag")); #ifndef RELOC_EXPANSION_POSSIBLE - { - arelent *reloc = tc_gen_reloc (sec, fixp); - - if (!reloc) - continue; - relocs[i++] = reloc; - j = 1; - } + *reloc = tc_gen_reloc (sec, fixp); #else - { - arelent **reloc = tc_gen_reloc (sec, fixp); + reloc = tc_gen_reloc (sec, fixp); +#endif - for (j = 0; reloc[j]; j++) - relocs[i++] = reloc[j]; - } + while (*reloc) + { + while (r != NULL && r->u.b.r.address < (*reloc)->address) + { + fragS *f = get_frag_for_reloc (last_frag, seginfo, r); + if (f != NULL) + { + last_frag = f; + relocs[n++] = &r->u.b.r; + install_reloc (sec, &r->u.b.r, f, r->file, r->line); + } + r = r->next; + } + relocs[n++] = *reloc; + install_reloc (sec, *reloc, fixp->fx_frag, + fixp->fx_file, fixp->fx_line); +#ifndef RELOC_EXPANSION_POSSIBLE + break; +#else + reloc++; #endif + } + } - for ( ; j != 0; --j) - install_reloc (sec, relocs[i - j], fixp->fx_frag, - fixp->fx_file, fixp->fx_line); + while (r != NULL) + { + fragS *f = get_frag_for_reloc (last_frag, seginfo, r); + if (f != NULL) + { + last_frag = f; + relocs[n++] = &r->u.b.r; + install_reloc (sec, &r->u.b.r, f, r->file, r->line); + } + r = r->next; } - n = i; #ifdef DEBUG4 { - unsigned int i, j, nsyms; + unsigned int k, j, nsyms; asymbol **sympp; sympp = bfd_get_outsymbols (stdoutput); nsyms = bfd_get_symcount (stdoutput); - for (i = 0; i < n; i++) - if (((*relocs[i]->sym_ptr_ptr)->flags & BSF_SECTION_SYM) == 0) + for (k = 0; k < n; k++) + if (((*relocs[k]->sym_ptr_ptr)->flags & BSF_SECTION_SYM) == 0) { for (j = 0; j < nsyms; j++) - if (sympp[j] == *relocs[i]->sym_ptr_ptr) + if (sympp[j] == *relocs[k]->sym_ptr_ptr) break; if (j == nsyms) abort (); @@ -1249,23 +1322,6 @@ write_relocs (bfd *abfd, asection *sec, void *xxx ATTRIBUTE_UNUSED) } #endif - for (r = my_reloc_list; r != NULL; r = r->next) - { - fragS *f; - for (f = seginfo->frchainP->frch_root; f; f = f->fr_next) - if (f->fr_address <= r->u.b.r.address - && r->u.b.r.address < f->fr_address + f->fr_fix) - break; - if (f == NULL) - as_bad_where (r->file, r->line, - _("reloc not within (fixed part of) section")); - else - { - relocs[n++] = &r->u.b.r; - install_reloc (sec, &r->u.b.r, f, r->file, r->line); - } - } - if (n) { flagword flags = bfd_get_section_flags (abfd, sec); @@ -1280,16 +1336,16 @@ write_relocs (bfd *abfd, asection *sec, void *xxx ATTRIBUTE_UNUSED) #ifdef DEBUG3 { - unsigned int i; - arelent *r; - asymbol *s; + unsigned int k; + fprintf (stderr, "relocs for sec %s\n", sec->name); - for (i = 0; i < n; i++) + for (k = 0; k < n; k++) { - r = relocs[i]; - s = *r->sym_ptr_ptr; + arelent *rel = relocs[k]; + asymbol *s = *rel->sym_ptr_ptr; fprintf (stderr, " reloc %2d @%p off %4lx : sym %-10s addend %lx\n", - i, r, (unsigned long)r->address, s->name, (unsigned long)r->addend); + k, rel, (unsigned long)rel->address, s->name, + (unsigned long)rel->addend); } } #endif @@ -1734,13 +1790,6 @@ write_object_file (void) } } -#ifdef OBJ_VMS - /* Under VMS we try to be compatible with VAX-11 "C". Thus, we call - a routine to check for the definition of the procedure "_main", - and if so -- fix it up so that it can be program entry point. */ - vms_check_for_main (); -#endif /* OBJ_VMS */ - /* From now on, we don't care about sub-segments. Build one frag chain for each segment. Linked thru fr_next. */ diff --git a/gold/ChangeLog b/gold/ChangeLog index 3567034..7f91606 100644 --- a/gold/ChangeLog +++ b/gold/ChangeLog @@ -1,3 +1,1698 @@ +2011-11-11 Doug Kwan + + * arm.cc (Target_arm::do_make_elf_object): Allow executable also + if --just-symbols is given. + +2011-11-10 Doug Kwan + + PR gold/13362 + * arm.cc (Target_arm::Relocate::relocate_tls): Do unaligned accesses + when processing data relocs. + * reloc.h (Relocate_functions::rel_unaligned): New method. + (Relocate_functions::pcrel_unaligned): Ditto. + (Relocate_functions::rel32_unaligned): Ditto. + (Relocate_functions::pcrel32_unaligned): Ditto. + +2011-11-15 Matthew Gretton-Dann + + Apply mainline patches. + 2011-11-02 Matthew Gretton-Dann + * arm.cc (Target_arm::may_use_v5t_interworking): Check whether + we are working around the ARM1176 Erratum. + * options.h (General_options::fix_arm1176): Add option. + * testsuite/Makefile.am: Add testcases, and keep current ones + working. + * testsuite/Makefile.in: Regenerate. + * testsuite/arm_fix_1176.s: New file. + * testsuite/arm_fix_1176.sh: Likewise. + 2011-11-02 Matthew Gretton-Dann + * arm.cc (Target_arm::Target_arm): Remove initialisation of + may_use_blx_. + (Target_arm::may_use_blx): Remove method. + (Target_arm::set_may_use_blx): Likewise. + (Target_arm::may_use_v4t_interworking): New method. + (Target_arm::may_use_v5t_interworking): Likewise. + (Target_arm::may_use_blx_): Remove member variable. + (Arm_relocate_functions::arm_branch_common): Check for v5T + interworking. + (Arm_relocate_functions::thumb_branch_common): Likewise. + (Reloc_stub::stub_type_for_reloc): Likewise. + (Target_arm::do_finalize_sections): Correct interworking checks. + * testsuite/Makefile.am: Add new tests. + * testsuite/Makefile.in: Regenerate. + * testsuite/arm_farcall_arm_arm.s: New test. + * testsuite/arm_farcall_arm_arm.sh: Likewise. + * testsuite/arm_farcall_arm_thumb.s: Likewise. + * testsuite/arm_farcall_arm_thumb.sh: Likewise. + * testsuite/arm_farcall_thumb_arm.s: Likewise. + * testsuite/arm_farcall_thumb_arm.sh: Likewise. + * testsuite/arm_farcall_thumb_thumb.s: Likewise. + * testsuite/arm_farcall_thumb_thumb.sh: Likewise. + +2011-10-25 Alan Modra + + Apply mainline patches. + 2011-09-26 Cary Coutant + gcc PR lto/47247 + * plugin.cc (get_symbols_v2): New function. + (Plugin::load): Add LDPT_GET_SYMBOLS_V2. + (is_referenced_from_outside): New function. + (Pluginobj::get_symbol_resolution_info): Add version parameter, return + LDPR_PREVAILING_DEF_IRONLY_EXP when using new version. + (get_symbols): Pass version parameter. + (get_symbols_v2): New function. + * plugin.h (Pluginobj::get_symbol_resolution_info): Add version + parameter. + * testsuite/plugin_test.c (get_symbols_v2): New static variable. + (onload): Add LDPT_GET_SYMBOLS_V2. + (all_symbols_read_hook): Use get_symbols_v2; check for + LDPR_PREVAILING_DEF_IRONLY_EXP. + * testsuite/plugin_test_3.sh: Update expected results. + +2011-10-18 David S. Miller + + PR binutils/13301 + * sparc.cc (Target_sparc::Relocate::reloc_adjust_addr_): New + member to track relocation locations that have moved during TLS + reloc optimizations. + (Target_sparc::Relocate::Relocate): Initialize to NULL. + (Target_sparc::Relocate::relocate): Adjust view down by 4 + bytes if it matches reloc_adjust_addr_. + (Target_sparc::Relocate::relocate_tls): Always move the + __tls_get_addr call delay slot instruction forward 4 bytes when + performing relaxation. + +2011-09-27 Viktor Kutuzov + Ian Lance Taylor + + * symtab.cc (Symbol_table::define_special_symbol): Always + canonicalize version string. + +2011-09-19 Sriraman Tallam + + * plugin.h (should_defer_layout): Modify to check for any_claimed_. + +2011-09-19 Cary Coutant + + * incremental.cc (can_incremental_update): Fix typo in comment. + * incremental.h (can_incremental_update): Likewise. + +2011-09-18 Cary Coutant + + * incremental.cc (can_incremental_update): New function. + * incremental.h (can_incremental_update): New function. + * layout.cc (Layout::init_fixed_output_section): Call it. + (Layout::make_output_section): Don't allow patch space in .eh_frame. + * object.cc (Sized_relobj_file::do_layout): Call + can_incremental_update. + +2011-09-13 Cary Coutant + + * configure.ac: Check for glibc support for gnu_indirect_function + support with static linking, setting automake conditional + IFUNC_STATIC. + * Makefile.in: Regenerate. + * configure: Regenerate. + + * testsuite/Makefile.am (ifuncmain1static, ifuncmain2static) + (ifuncmain4static, ifuncmain5static, ifuncmain7static): Add check + for IFUNC_STATIC. + * testsuite/Makefile.in: Regenerate. + +2011-09-13 Cary Coutant + + * incremental.cc (Sized_relobj_incr::do_layout): Call + report_comdat_group for kept comdat sections. + * testsuite/Makefile.am (incremental_comdat_test_1): New test. + * testsuite/Makefile.in: Regenerate. + * testsuite/incr_comdat_test_1.cc: New source file. + * testsuite/incr_comdat_test_2_v1.cc: New source file. + * testsuite/incr_comdat_test_2_v2.cc: New source file. + * testsuite/incr_comdat_test_2_v3.cc: New source file. + +2011-09-13 Ian Lance Taylor + + * object.cc (Sized_relobj_file::do_layout): Remove unused local + variable external_symbols_offset. + +2011-09-12 Ian Lance Taylor + + * object.cc (Sized_relobj_file::do_layout): Remove assertion which + triggered if object has no symbols. + +2011-09-09 David S. Miller + + * output.cc (Output_fill_debug_info::do_write): Use Swap_unaligned. + (Output_fill_debug_line::do_write): Likewise. + +2011-08-29 Cary Coutant + + * output.cc: (Output_fill_debug_info::do_minimum_hole_size): Add + casts to match formatting specs. + (Output_fill_debug_line::do_minimum_hole_size): Likewise. + +2011-08-26 Cary Coutant + + * layout.cc (Free_list::allocate): Provide guarantee of minimum + remaining hole size when allocating. + (Layout::make_output_section): Set fill methods for debug sections. + * layout.h (Free_list::Free_list_node): Move from private to + public. + (Free_list::set_min_hole_size): New function. + (Free_list::begin, Free_list::end): New functions. + (Free_list::min_hole_): New data member. + * output.cc: Include dwarf.h. + (Output_fill_debug_info::do_minimum_hole_size): New function. + (Output_fill_debug_info::do_write): New function. + (Output_fill_debug_line::do_minimum_hole_size): New function. + (Output_fill_debug_line::do_write): New function. + (Output_section::Output_section): Initialize new data member. + (Output_section::set_final_data_size): Ensure patch space is larger + than minimum hole size. + (Output_section::do_write): Fill holes in debug sections. + * output.h (Output_fill): New class. + (Output_fill_debug_info): New class. + (Output_fill_debug_line): New class. + (Output_section::set_free_space_fill): New function. + (Output_section::free_space_fill_): New data member. + * testsuite/Makefile.am (incremental_test_3): Add + --incremental-patch option. + (incremental_test_4): Likewise. + (incremental_test_5): Likewise. + (incremental_test_6): Likewise. + (incremental_copy_test): Likewise. + (incremental_common_test_1): Likewise. + * testsuite/Makefile.in: Regenerate. + +2011-08-26 Nick Clifton + + * po/es.po: Updated Spanish translation. + +2011-08-01 Cary Coutant + + * gold/testsuite/Makefile.am (justsyms_exec): New testcase. + * gold/testsuite/Makefile.in: Regenerate. + * gold/testsuite/justsyms_exec.c: New source file. + * gold/testsuite/justsyms_lib.c: New source file. + +2011-08-01 Cary Coutant + + * layout.cc (Layout::set_segment_offsets): Don't realign text + segment if -Ttext was specified. + * object.cc (Sized_relobj_file::Sized_relobj_file): Store the ELF + file type. + * object.h (Sized_relobj_file::e_type): New function. + (Sized_relobj_file::e_type_): New data member. + * symtab.cc (Symbol_table::add_from_relobj): Don't add section + base address for ET_EXEC files. + * target.cc (Target::do_make_elf_object_implementation): Allow + ET_EXEC files with --just-symbols option. + +2011-07-28 Cary Coutant + + * workqueue-internal.h (Workqueue_threader::should_cancel_thread): + Add thread_number parameter. + (Workqueue_threader_threadpool::should_cancel_thread): Likewise. + * workqueue-threads.cc + (Workqueue_threader_threadpool::should_cancel_thread): Cancel + current thread if its thread number is greater than desired thread + count. + * workqueue.cc (Workqueue_threader_single::should_cancel_thread): + Add thread_number parameter. + (Workqueue::should_cancel_thread): Likewise. + (Workqueue::find_runnable_or_wait): Pass thread_number to + should_cancel_thread. + * workqueue.h (Workqueue::should_cancel_thread): Add thread_number + parameter. + +2011-07-22 Sriraman Tallam + + * symtab.cc (Symbol_table::add_from_relobj): Mark symbol as referenced + only after checking if it cannot be forced local. + * symtab.h (is_externally_visible): Check if the symbol is not forced + local. + +2011-07-15 Ian Lance Taylor + + * options.h (class General_options): Add --print-output-format. + Move -EL next to -EB, for better --help output. + * target-select.cc: Include , "options.h", and + "parameters.h". + (Target_selector::do_target_bfd_name): New function. + (print_output_format): New function. + * target-select.h (class Target_selector): Update declarations. + (Target_selector::target_bfd_name): New function. + (print_output_format): Declare. + * main.cc: Include "target-select.h". + (main): Handle --print-output-format. + * gold.cc: Include "target-select.h". + (queue_initial_tasks): Handle --print-output-format when there are + no input files. + * parameters.cc (parameters_force_valid_target): Give a better + error message if -EB/-EL does not match target. + * freebsd.h (Target_selector_freebsd::do_target_bfd_name): New + function. + +2011-07-15 Ian Lance Taylor + + * i386.cc (class Output_data_plt_i386): Add layout_ field. + (Output_data_plt_i386::Output_data_plt_i386): Initialize layout_. + (Output_data_plt_i386::do_write): Write address of .dynamic + section to first entry in .got.plt section. + * x86_64.cc (class Output_data_plt_x86_64): Add layout_ field. + (Output_data_plt_x86_64::Output_data_plt_x86_64) [both versions]: + Initialize layout_. + (Output_data_plt_x86_64::do_write): Write address of .dynamic + section to first entry in .got.plt section. + * layout.h (Layout::dynamic_section): New function. + +2011-07-13 Sriraman Tallam + + * archive.cc (Archive::get_elf_object_for_member): Add extra parameter + to claim_file call. + * layout.cc (Layout::Layout): Initialize section_ordering_specified_, + input_section_position_, and input_section_glob_. + (read_layout_from_file): Call function section_ordering_specified. + * layout.h (is_section_ordering_specified): New function. + (section_ordering_specified): New function. + (section_ordering_specified_): New boolean member. + * main.cc(main): Call load_plugins after layout object is defined. + * output.cc (Output_section::add_input_section): Use + function section_ordering_specified to check if section ordering is + needed. + * output.cc (Output_section::add_relaxed_input_section): Use + function section_ordering_specified to check if section ordering is + needed. + (Output_section::update_section_layout): New function. + (Output_section::sort_attached_input_sections): Check if input section + must be reordered. + * output.h (Output_section::update_section_layout): New function. + * plugin.cc (get_section_count): New function. + (get_section_type): New function. + (get_section_name): New function. + (get_section_contents): New function. + (update_section_order): New function. + (allow_section_ordering): New function. + (Plugin::load): Add the new interfaces to the transfer vector. + (Plugin_manager::load_plugins): New parameter. + (Plugin_manager::all_symbols_read): New parameter. + (Plugin_manager::claim_file): New parameter. Save the elf object for + unclaimed objects. + (Plugin_manager::get_elf_object): New function. + (Plugin_manager::get_view): Change to directly use the bool to check + if get_view is called from claim_file_hook. + * plugin.h (input_objects): New function + (Plugin__manager::load_plugins): New parameter. + (Plugin_manager::claim_file): New parameter. + (Plugin_manager::get_elf_object): New function. + (Plugin_manager::in_claim_file_handler): New function. + (Plugin_manager::in_claim_file_handler_): New member. + (layout): New function. + * readsyms.cc (Read_symbols::do_read_symbols): Call the claim_file + handler with an extra parameter. Make the elf object before calling + claim_file handler. + * testsuite/plugin_test.c (get_section_count): New function pointer. + (get_section_type): New function pointer. + (get_section_name): New function pointer. + (get_section_contents): New function pointer. + (update_section_order): New function pointer. + (allow_section_ordering): New function pointer. + (onload): Check if the new interfaces exist. + +2011-07-13 Ian Lance Taylor + + * i386.cc (Target_i386::got_section): If -z now, make .got.plt a + relro section. + * x86_64.cc (Target_x86_64::got_section): Likewise. + * testsuite/Makefile.am (check_PROGRAMS): Add relro_now_test. + (relro_now_test_SOURCES): New variable. + (relro_now_test_DEPENDENCIES): New variable. + (relro_now_test_LDFLAGS): New variable. + (relro_now_test_LDADD): New variable. + (relro_now_test.so): New target. + * testsuite/Makefile.in: Rebuild. + +2011-07-12 Ian Lance Taylor + + PR gold/12980 + * i386.cc (Target_i386::Scan::global): For a GOT reloc, use a + GLOB_DAT relocation rather than a RELATIVE relocation for a + protected symbol when creating a shared library. + * x86_64.cc (Target_x86_64::Scan::global): Likewise. + * testsuite/protected_1.cc (f2, get_f2_addr): New functions. + * testsuite/protected_main_1.cc (main): Test that protected + function has same address. + +2011-07-11 Ian Lance Taylor + + PR gold/12979 + * options.h (class General_options): Add -Bgroup. + * options.cc (General_options::finalize): If -Bgroup is set, + default to --unresolved-symbols=report-all. + * layout.cc (Layout::finish_dynamic_section): Implement -Bgroup. + * target-reloc.h (issue_undefined_symbol_error): Handle + --unresolved-symbols=report-all. + +2011-07-08 Ian Lance Taylor + + PR gold/11985 + * layout.cc (Layout::create_initial_dynamic_sections): Don't crash + if linker script discards key sections. + (Layout::create_dynamic_symtab): Likewise. + (Layout::assign_local_dynsym_offsets): Likewise. + (Layout::sized_create_version_sections): Likewise. + (Layout::create_interp): Likewise. + (Layout::finish_dynamic_section): Likewise. + (Layout::set_dynamic_symbol_size): Likewise. + +2011-07-08 Ian Lance Taylor + + PR gold/12386 + * options.h (class General_options): Add --unresolved-symbols. + * target-reloc.h (issue_undefined_symbol_error): Check + --unresolved-symbols. Add comments. + +2011-07-08 Ian Lance Taylor + + * testsuite/odr_violation2.cc (Ordering::operator()): Make + expression more complex. + +2011-07-08 Ian Lance Taylor + + PR gold/11317 + * target-reloc.h (issue_undefined_symbol_error): New inline + function, broken out of relocate_section. + (relocate_section): Call issue_undefined_symbol_error. + * i386.cc (Target_i386::Relocate::relocate_tls): Don't crash if + there is no TLS segment if we are about to issue an undefined + symbol error. + * x86_64.cc (Target_x86_64::relocate_tls): Likewise. + +2011-07-08 Ian Lance Taylor + + PR gold/12279 + * resolve.cc (Symbol_table::should_override): Add fromtype + parameter. Change all callers. Give error when linking together + TLS and non-TLS symbol. + (Symbol_table::should_override_with_special): Add fromtype + parameter. Change all callers. + * i386.cc (Target_i386::Relocate::relocate_tls): Don't crash if + there is no TLS segment if we have reported some errors. + * x86_64.cc (Target_x86_64::relocate_tls): Likewise. + +2011-07-08 Ian Lance Taylor + + PR gold/12372 + * target.h (Target::plt_address_for_global): New function. + (Target::plt_address_for_local): New function. + (Target::plt_section_for_global): Remove. + (Target::plt_section_for_local): Remove. + (Target::do_plt_address_for_global): New virtual function. + (Target::do_plt_address_for_local): New virtual function. + (Target::do_plt_section_for_global): Remove. + (Target::do_plt_section_for_local): Remove. + (Target::register_global_plt_entry): Add Symbol_table and Layout + parameters. + * output.cc (Output_data_got::Got_entry::write): Use + plt_address_for_global and plt_address_for_local. + * layout.cc (Layout::add_target_dynamic_tags): Use size and + address of output section. + * i386.cc (class Output_data_plt_i386): Add irelative_rel_, + got_irelative_, and irelative_count_ fields. Update + declarations. + (Output_data_plt_i386::has_irelative_section): New function. + (Output_data_plt_i386::entry_count): Add irelative_count_. + (Output_data_plt_i386::set_final_data_size): Likewise. + (class Target_i386): Add got_irelative_ and rel_irelative_ + fields. Update declarations. + (Target_i386::Target_i386): Initialize new fields. + (Target_i386::do_plt_address_for_global): New function replacing + do_plt_section_for_global. + (Target_i386::do_plt_address_for_local): New function replacing + do_plt_section_for_local. + (Target_i386::got_section): Create got_irelative_. + (Target_i386::rel_irelative_section): New function. + (Output_data_plt_i386::Output_data_plt_i386): Initialize new + fields. Don't define __rel_iplt_{start,end}. + (Output_data_plt_i386::add_entry): Add symtab and layout + parameters. Change all callers. Use different PLT and GOT for + IFUNC symbols. + (Output_data_plt_i386::add_local_ifunc_entry): Add symtab and + layout parameters. Change all callers. Use different PLT and + GOT. + (Output_data_plt_i386::rel_tls_desc): Fix formatting. + (Output_data_plt_i386::rel_irelative): New function. + (Output_data_plt_i386::address_for_global): New function. + (Output_data_plt_i386::address_for_local): New function. + (Output_data_plt_i386::do_write): Write out IRELATIVE area. Use + IRELATIVE GOT when changing IFUNC GOT entries. + (Target_i386::Scan::global): Use IRELATIVE GOT for IRELATIVE + reloc. + (Target_i386::do_finalize_sections): Create the __rel_iplt symbols + if we didn't create an IRELATIVE GOT. + (Target_i386::Relocate::relocate): Use plt_address_for_global and + plt_address_for_local. + (Target_i386::do_dynsym_value): Use plt_address_for_global. + * x86_64.cc (class Output_data_plt_x86_64): Add irelative_rel_, + got_irelative_, and irelative_count_ fields. Update + declarations. + (Output_data_plt_x86_64::Output_data_plt_x86_64) [both versions]: + Initialize new fields. Remove symtab parameter. Change all + callers. + (Output_data_plt_x86_64::get_tlsdesc_plt_offset): Add + irelative_count_. + (Output_data_plt_x86_64::has_irelative_section): New function. + (Output_data_plt_x86_64::entry_count): Add irelative_count_. + (class Target_x86_64): Add got_irelative_ and rel_irelative_ + fields. Update declarations. + (Target_x86_64::Target_x86_64): Initialize new fields. + (Target_x86_64::do_plt_address_for_global): New function replacing + do_plt_section_for_global. + (Target_x86_64::do_plt_address_for_local): New function replacing + do_plt_section_for_local. + (Target_x86_64::got_section): Create got_irelative_. + (Target_x86_64::rela_irelative_section): New function. + (Output_data_plt_x86_64::init): Remove symtab parameter. Change + all callers. Don't create __rel_iplt_{start,end}. + (Output_data_plt_x86_64::add_entry): Add symtab and layout + parameters. Change all callers. Use different PLT and GOT for + IFUNC symbols. + (Output_data_plt_x86_64::add_local_ifunc_entry): Add symtab and + layout parameters. Change all callers. Use different PLT and + GOT. + (Output_data_plt_x86_64::add_relocation): Add symtab and layout + parameters. Change all callers. Use different PLT and GOT for + IFUNC symbols. + (Output_data_plt_x86_64::rela_tlsdesc): Fix formatting. + (Output_data_plt_x86_64::rela_irelative): New function. + (Output_data_plt_x86_64::address_for_global): New function. + (Output_data_plt_x86_64::address_for_local): New function. + (Output_data_plt_x86_64::set_final_data_size): Likewise. + (Output_data_plt_x86_64::do_write): Write out IRELATIVE area. + (Target_x86_64::init_got_plt_for_update): Create got_irelative_. + (Target_x86_64::register_global_plt_entry): Add symtab and layout + parameters. + (Target_x86_64::Scan::global): Use IRELATIVE GOT for IRELATIVE + reloc. + (Target_x86_64::do_finalize_sections): Create the __rela_iplt + symbols if we didn't create an IRELATIVE GOT. + (Target_x86_64::Relocate::relocate): Use plt_address_for_global and + plt_address_for_local. + (Target_x86_64::do_dynsym_value): Use plt_address_for_global. + * testsuite/ifuncvar1.c: New test file. + * testsuite/ifuncvar2.c: New test file. + * testsuite/ifuncvar3.c: New test file. + * testsuite/Makefile.am (check_PROGRAMS): Add ifuncvar. + (ifuncvar1_pic.o, ifuncvar2_pic.o, ifuncvar.so): New targets. + (ifuncvar_SOURCES, ifuncvar_DEPENDENCIES): New variables. + (ifuncvar_LDFLAGS, ifuncvar_LDADD): New variables. + * testsuite/Makefile.in: Rebuild. + +2011-07-07 Cary Coutant + + * testsuite/Makefile.am (two_file_test_1_v1_ndebug.o): New target. + (two_file_test_1_ndebug.o): Likewise. + (two_file_test_1b_ndebug.o): Likewise. + (two_file_test_2_ndebug.o): Likewise. + (two_file_test_main_ndebug.o): Likewise. + (incremental_test_2): Link with no-debug versions. + +2011-07-06 Cary Coutant + + * gold/incremental.cc + (Output_section_incremental_inputs::write_info_blocks): Check for + hidden and internal symbols. + +2011-07-06 Cary Coutant + + * incremental.cc (Sized_incremental_binary::do_file_has_changed): + Check disposition for startup file. + (Incremental_inputs::report_command_line): Ignore + --incremental-startup-unchanged option. + * options.cc (General_options::parse_incremental_startup_unchanged): + New function. + (General_options::General_options): Initialize new data member. + * options.h (Incremental_disposition): Add INCREMENTAL_STARTUP. + (General_options): Add --incremental-startup-unchanged option. + (General_options::incremental_startup_disposition): New function. + (General_options::incremental_startup_disposition_): New data member. + +2011-07-06 Cary Coutant + + * incremental.cc (Sized_incremental_binary::setup_readers): Pass + input file index to Script_info ctor. + (Sized_incremental_binary::do_file_has_changed): Find the + command-line argument for files named in scripts. + * incremental.h (Script_info::Script_info): New ctor + with input file index. + (Script_info::input_file_index): New function. + (Script_info::input_file_index_): New data member. + (Incremental_binary::get_library): Add const. + (Incremental_binary::get_script_info): Add const. + * readsyms.cc (Read_member::is_runnable): Check for this_blocker_. + * testsuite/Makefile.am (incremental_test_5): New test case. + (incremental_test_6): New test case. + * testsuite/Makefile.in: Regenerate. + +2011-07-06 Cary Coutant + + * incremental.cc (Sized_incremental_binary::do_check_inputs): Add + debug output when command lines differ. + +2011-07-06 Cary Coutant + + * incremental.cc (Incremental_inputs::report_command_line): Ignore + --incremental-patch option. + * layout.cc (Free_list::allocate): Extend allocation beyond original + end if enabled. + (Layout::make_output_section): Mark sections that should get + patch space. + * options.cc (parse_percent): New function. + * options.h (parse_percent): New function. + (DEFINE_percent): New macro. + (General_options): Add --incremental-patch option. + * output.cc (Output_section::Output_section): Initialize new data + members. + (Output_section::add_input_section): Print section name when out + of patch space. + (Output_section::add_output_section_data): Likewise. + (Output_section::set_final_data_size): Add patch space when + doing --incremental-full. + (Output_section::do_reset_address_and_file_offset): Remove patch + space. + (Output_segment::set_section_list_addresses): Print debug output + only if --incremental-update. + * output.h (Output_section::set_is_patch_space_allowed): New function. + (Output_section::is_patch_space_allowed_): New data member. + (Output_section::patch_space_): New data member. + * parameters.cc (Parameters::incremental_full): New function. + * parameters.h (Parameters::incremental_full): New function + * testsuite/Makefile.am (incremental_test_2): Add test for + --incremental-patch option. + * testsuite/Makefile.in: Regenerate. + * testsuite/two_file_test_1_v1.cc (t1, t2, t3): Add comments. + (t18): Remove function body. + +2011-07-05 Doug Kwan + + PR gold/12771 + * arm.cc (Arm_relocate_functions::abs8): Use int32_t for addend and + Arm_Address type for relocation result. + (Arm_relocate_functions::abs16): Use unaligned access. Also fix + overflow check. + (Arm_relocate_functions::abs32): Use unaligned access. + (Arm_relocate_functions::rel32): Ditto. + (Arm_relocate_functions::prel31): Ditto. + (Arm_exidix_cantunwind::do_fixed_endian_write): Ditto. + * testsuite/Makefile.am: Add new test arm_unaligned_reloc for unaligned + static data relocations. + * testsuite/Makefile.in: Regnerate. + * testsuite/arm_unaligned_reloc.{s,sh}: New files. + +2011-07-05 Ian Lance Taylor + + PR gold/12392 + * i386.cc (Target_i386::do_finalize_sections): Define __rel_iplt + symbols if necessary. + * x86_64.cc (Target_x86_64::do_finalize_sections): Likewise. + +2011-07-05 Ian Lance Taylor + + PR gold/12952 + * resolve.cc (Symbol::override_base_with_special): Simply override + version with special symbol version, ignoring previous version. + +2011-07-05 Ian Lance Taylor + + * object.cc (Sized_relobj_file::include_section_group): Add + information to comment about signature location. + +2011-07-02 Ian Lance Taylor + + PR gold/12957 + * options.h (class General_options): Add -f and -F. + * options.cc (General_options::finalize): Fatal error if -f/-F + are used without -shared. + * layout.cc (Layout::finish_dynamic_section): Implement -f/-F. + +2011-07-02 Ian Lance Taylor + + * dirsearch.cc (Dir_cache::read_files): Ignore ENOTDIR errors. + +2011-07-01 Ian Lance Taylor + + PR gold/12525 + PR gold/12952 + * resolve.cc (Symbol::override_base_with_special): Don't override + the version if the overriding symbol has a different name. + * dynobj.cc (Versions::add_def): Add dynpool parameter. Change + all callers. If we give an error about an undefined version, + define the base version if necessary. + * dynobj.h (class Versions): Update declaration. + * testsuite/weak_alias_test_5.cc: New file. + * testsuite/weak_alias_test.script: New file. + * testsuite/weak_alias_test_main.cc: Check that versioned_symbol + and versioned_alias have the right value, and call t2. + * testsuite/Makefile.am (weak_alias_test_DEPENDENCIES): Add + weak_alias_test_5.so. + (weak_alias_test_LDADD): Likewise. + (weak_alias_test_5_pic.o, weak_alias_test_5.so): New targets. + * testsuite/Makefile.in: Rebuild. + +2011-07-01 Ian Lance Taylor + + PR gold/12525 + * options.h (class General_options): Support -z notext. + * testsuite/Makefile.am (two_file_shared_1_nonpic.so): Use + -Wl,-z,notext. + (two_file_shared_nonpic.so): Likewise. + (two_file_shared_mixed.so): Likewise. + (two_file_shared_mixed_1.so): Likewise. + (weak_undef_lib_nonpic.so): Likewise. + (alt/weak_undef_lib_nonpic.so): Likewise. + (tls_test_shared_nonpic.so): Likewise. + * testsuite/Makefile.in: Rebuild. + +2011-07-01 Ian Lance Taylor + + PR gold/12525 + * configure.ac: Test whether static linking works, setting + the automake conditional HAVE_STATIC. + * testsuite/Makefile.am: Disable tests using -static if + HAVE_STATIC is not true. + * configure, testsuite/Makefile.in: Rebuild. + +2011-07-01 Ian Lance Taylor + + PR gold/12525 + * ehframe.cc (Eh_frame_hdr::get_fde_pc): Handle DW_EH_PE_datarel. + Assert if we see DW_EH_PE_indirect. + * target.h (Target::ehframe_datarel_base): New function. + (Target::do_ehframe_datarel_base): New target function. + * i386.cc (Target_i386::do_ehframe_datarel_base): New function. + * x86_64.cc (Target_x86_64::do_ehframe_datarel_base): New + function. + +2011-07-01 Ian Lance Taylor + + PR gold/12571 + * options.h (class General_options): Add + --ld-generated-unwind-info. + * ehframe.cc (Fde::write): Add address parameter. Change all + callers. If associated with PLT, fill in address and size. + (Cie::set_output_offset): Only add merge mapping if there is an + object. + (Cie::write): Add address parameter. Change all callers. + (Eh_frame::add_ehframe_for_plt): New function. + * ehframe.h (class Fde): Update declarations. Move shndx_ and + input_offset_ fields into union u_, with new plt field. + (Fde::Fde): Adjust for new union field. + (Fde::Fde) [Output_data version]: New constructor. + (Fde::add_mapping): Only add merge mapping if there is an object. + (class Cie): Update declarations. + (class Eh_frame): Declare add_ehframe_for_plt. + * layout.cc (Layout::layout_eh_frame): Break out code into + make_eh_frame_section, and call it. + (Layout::make_eh_frame_section): New function. + (Layout::add_eh_frame_for_plt): New function. + * layout.h (class Layout): Update declarations. + * merge.cc (Merge_map::add_mapping): Add assertion. + * i386.cc: Include "dwarf.h". + (class Output_data_plt_i386): Make first_plt_entry, + dyn_first_plt_entry, exec_plt_entry, and dyn_plt_entry const. Add + plt_eh_frame_cie_size, plt_eh_frame_fde_size, plt_eh_frame_cie, + and plt_eh_frame_fde. + (Output_data_plt_i386::Output_data_plt_i386): Align to 16-byte + boundary. Call add_eh_frame_for_plt if appropriate. + * x86_64.cc: Include "dwarf.h". + (class Output_data_plt_x86_64): Align to 16-byte boundary. Make + first_plt_entry, plt_entry and tlsdesc_plt_entry const. Add + plt_eh_frame_cie_size, plt_eh_frame_fde_size, plt_eh_frame_cie, + and plt_eh_frame_fde. + (Output_data_plt_x86_64::init): Call add_eh_frame_for_plt if + appropriate. + +2011-06-29 Ian Lance Taylor + + PR gold/12629 + * object.cc (Sized_relobj_file::layout_section): Change shdr + parameter to be const. + (Sized_relobj_file::layout_eh_frame_section): New function, broken + out of do_layout. + (Sized_relobj_file::do_layout): Defer .eh_frame sections if + appropriate. Call layout_eh_frame_section. + (Sized_relobj_file::do_layout_deferred_sections): Handle .eh_frame + sections. + * object.h (class Sized_relobj_file): Update declarations. + +2011-06-29 Ian Lance Taylor + + PR gold/12652 + * script.cc (Token::integer_value): Accept trailing M/m/K/k + modifier. + (Lex::gather_token): Accept trailing M/m/K/k for integers. + +2011-06-29 Ian Lance Taylor + + PR gold/12675 + * object.cc (Sized_relobj_file::check_eh_frame_flags): Check for + SHT_X86_64_UNWIND. + * layout.cc (Layout::layout_eh_frame): Likewise. + +2011-06-29 Ian Lance Taylor + + PR gold/12695 + * layout.cc (Layout::symtab_section_shndx): New function. + * layout.h (class Layout): Declare symtab_section_shndx. + * output.cc (Output_section::write_header): Call it. + +2011-06-29 Ian Lance Taylor + + PR gold/12818 + * symtab.cc (Symbol::should_add_dynsym_entry): Don't add undefined + symbols which are not used in a relocation. + +2011-06-28 Ian Lance Taylor + + PR gold/12898 + * layout.cc (Layout::segment_precedes): Don't crash if a linker + script create indistinguishable segments. + (Layout::set_segment_offsets): Use stable_sort when sorting + segments. Pass this to Compare_segments constructor. + * layout.h (class Layout): Make segment_precedes non-static. + (class Compare_segments): Change from struct to class. Add + layout_ field. Add constructor. + * script-sections.cc + (Script_sections::attach_sections_using_phdrs_clause): Rename + local orphan to is_orphan. Don't report failure to put empty + section in segment. On attachment failure, report name of + section, and attach to first PT_LOAD segment. + +2011-06-28 Ian Lance Taylor + + PR gold/12934 + * target-select.cc (Target_selector::Target_selector): Add + emulation parameter. Change all callers. + (select_target_by_bfd_name): Rename from select_target_by_name. + Change all callers. + (select_target_by_emulation): New function. + (supported_emulation_names): New function. + * target-select.h (class Target_selector): Add emulation_ field. + Update declarations. + (Target_selector::recognize_by_bfd_name): Rename from + recognize_by_name. Change all callers. + (Target_selector::supported_bfd_names): Rename from + supported_names. Change all callers. + (Target_selector::recognize_by_emulation): New function. + (Target_selector::supported_emulations): New function. + (Target_selector::emulation): New function. + (Target_selector::do_recognize_by_bfd_name): Rename from + do_recognize_by_name. Change all callers. + (Target_selector::do_supported_bfd_names): Rename from + do_supported_names. Change all callers. + (Target_selector::do_recognize_by_emulation): New function. + (Target_selector::do_supported_emulations): New function. + (select_target_by_bfd_name): Change name in declaration. + (select_target_by_emulation): Declare. + (supported_emulation_names): Declare. + * parameters.cc (parameters_force_valid_target): Try to find + target based on emulation from -m option. + * options.h (class General_options): Change doc string for -m. + * options.cc (help): Print emulations. + (General_options::parse_V): Likewise. + * freebsd.h (Target_selector_freebsd::Target_selector_freebsd): + Add emulation parameter. Change all callers. + +2011-06-28 Ian Lance Taylor + + * target.h (class Target): Add osabi_ field. + (Target::osabi): New function. + (Target::set_osabi): New function. + (Target::Target): Initialize osabi_. + (Target::do_adjust_elf_header): Make pure virtual. + (Sized_target::do_adjust_elf_header): Declare. + * target.cc (Sized_target::do_adjust_elf_header): New function. + (class Sized_target): Instantiate all versions. + * freebsd.h (class Target_freebsd): Remove. + (Target_selector_freebsd::do_recognize): Call set_osabi on + Target. + (Target_selector_freebsd::do_recognize_by_name): Likewise. + (Target_selector_freebsd::set_osabi): Remove. + * i386.cc (class Target_i386): Inherit from Sized_target rather + than Target_freebsd. + * x86_64.cc (class Target_x86_64): Likewise. + +2011-06-28 Ian Lance Taylor + + * target.h (Target::can_check_for_function_pointers): Rewrite. + Make non-virtual. + (Target::can_icf_inline_merge_sections): Likewise. + (Target::section_may_have_icf_unsafe_poineters): Likewise. + (Target::Target_info): Add can_icf_inline_merge_sections field. + (Target::do_can_check_for_function_pointers): New virtual + function. + (Target::do_section_may_have_icf_unsafe_pointers): Likewise. + * arm.cc (Target_arm::do_can_check_for_function_pointers): Rename + from can_check_for_function_pointers, move in file. + (Target_arm::do_section_may_have_icf_unsafe_pointers): Rename from + section_may_have_icf_unsafe_poineters, move in file. + (Target_arm::arm_info): Initialize can_icf_inline_merge_sections. + * i386.cc (Target_i386::do_can_check_for_function_pointers): + Rename from can_check_for_function_pointers, move in file. + (Target_i386::can_icf_inline_merge_sections): Remove. + (Target_i386::i386_info): Initialize + can_icf_inline_merge_sections. + * powerpc.cc (Target_powerpc::powerpc_info) [all versions]: + Initialize can_icf_inline_merge_sections. + * sparc.cc (Target_sparc::sparc_info) [both version]: Likewise. + * x86_64.cc (Target_x86_64::do_can_check_for_function_pointers): + Rename from can_check_for_function_pointers, move in file. + (Target_x86_64::can_icf_inline_merge_sections): Remove. + (Target_x86_64::x86_64_info): Initialize + can_icf_inline_merge_sections. + * testsuite/testfile.cc (Target_test::test_target_info): + Likewise. + * icf.cc (get_section_contents): Correct formatting. + +2011-06-27 Ian Lance Taylor + + * symtab.cc (Symbol::versioned_name): New function. + (Symbol_table::add_to_final_symtab): Use versioned_name when + appropriate. + (Symbol_table::sized_write_symbol): Likewise. + * symtab.h (class Symbol): Declare versioned_name. + * stringpool.h (class Stringpool_template): Add variant of add + which takes a std::basic_string. + * testsuite/Makefile.am (check_PROGRAMS): Add ver_test_12. + (ver_test_12_SOURCES, ver_test_12_DEPENDENCIES): New variables. + (ver_test_12_LDFLAGS, ver_test_12_LDADD): New variables. + (ver_test_12.o): New target. + * testsuite/Makefile.in: Rebuild. + +2011-06-27 Doug Kwan + + * arm.cc (Arm_relocate_functions::thm_jump8, + Arm_relocate_functions::thm_jump11): Use a wider signed + type to compute offset. + * testsuite/Makefile.am: Add new tests arm_thm_jump11 and + arm_thm_jump8. + * testsuite/Makefile.in: Regenerate. + * testsuite/arm_branch_in_range.sh: Check test results of + arm_thm_jump11 and arm_thm_jump8. + * testsuite/arm_thm_jump11.s: New test source file. + * testsuite/arm_thm_jump11.t: New linker script. + * testsuite/arm_thm_jump8.s: New test source file. + * testsuite/arm_thm_jump8.t: New linker script. + +2011-06-24 Ian Lance Taylor + + * layout.cc: Include "object.h". + (ctors_sections_in_init_array): New static variable. + (Layout::is_ctors_in_init_array): New function. + (Layout::layout): Add entry to ctors_sections_in_init_array if + appropriate. + * layout.h (class Layout): Declare is_ctors_in_init_array. + * reloc.cc (Sized_relobj_file::do_relocate): Call reverse_words if + is_ctors_reverse_view is set. + (Sized_relobj_file::write_sections): Add layout parameter. Change + all callers. Set is_ctors_reverse_view field of View_size. + (Sized_relobj_file::reverse_words): New function. + * object.h (Sized_relobj_file::View_size): Add + is_ctors_reverse_view field. + (class Sized_relobj_file): Update declarations. + * testsuite/initpri3.c: New test. + * testsuite/Makefile.am: (check_PROGRAMS): Add initpri3a and + initpri3b. + (initpri3a_SOURCES, initpri3a_DEPENDENCIES): New variables. + (initpri3a_LDFLAGS, initpri3a_LDADD): New variables. + (initpri3b_SOURCES, initpri3b_DEPENDENCIES): New variables. + (initpri3b_LDFLAGS, initpri3b_LDADD): New variables. + * testsuite/Makefile.in: Rebuild. + +2011-06-24 Cary Coutant + + * testsuite/Makefile.am: Add in-tree assembler to gcctestdir. + (debug_msg_cdebug.o, odr_violation1_cdebug.o, odr_violation2_cdebug.o) + (debug_msg_cdebug.err): New targets. + * testsuite/Makefile.in: Regenerate. + * testsuite/debug_msg.sh: Check output of link with compressed debug. + Fix checks for link with shared library. + +2011-06-24 Doug Kwan + + * arm.cc (Arm_output_section::append_text_sections_to_list): Do not + skip empty text sections. + * testsuite/arm_exidx_test.s: Test handling of an empty text section. + +2011-06-22 Ian Lance Taylor + + PR gold/12910 + * options.h (class General_options): Add --ctors-in-init-array. + * layout.cc (Layout::get_output_section): Treat SHT_INIT_ARRAY and + friends as SHT_PROGBITS for merging sections. + (Layout::layout): Remove special handling of .init_array and + friends. Don't sort if doing relocatable link. Sort for .ctors + and .dtors if ctors_in_init_array. + (Layout::make_output_section): Force correct section types for + .init_array and friends. Don't sort if doing relocatable link, + Don't sort .ctors and .dtors if ctors_in_init_array. + (Layout::section_name_mapping): Remove .ctors. and .dtorso. + (Layout::output_section_name): Add relobj parameter. Change all + callers. Handle .ctors. and .dtors. in code rather than table. + Handle .ctors and .dtors if ctors_in_init_array. + (Layout::match_file_name): New function, moved from output.cc. + * layout.h (class Layout): Update declarations. + * output.cc: Include "layout.h". + (Input_section_sort_entry::get_priority): New function. + (Input_section_sort_entry::match_file_name): Just call + Layout::match_file_name. + (Output_section::Input_section_sort_init_fini_compare::operator()): + Handle .ctors and .dtors. Sort by explicit priority rather than + by name. + * configure.ac: Remove CONSTRUCTOR_PRIORITY test and conditional. + * testsuite/initpri2.c: New test. + * testsuite/Makefile.am: Don't test CONSTRUCTOR_PRIORITY. + (check_PROGRAMS): Add initpri2. + (initpri2_SOURCES, initpri2_DEPENDENCIES): New variables. + (initpri2_LDFLAGS, initpri2_LDADD): New variables. + * configure, testsuite/Makefile.in: Rebuild. + +2011-06-19 Ian Lance Taylor + + PR gold/12880 + * layout.cc (Layout::attach_allocated_section_to_segment): Add a + .interp section to a PT_INTERP segment even if we have seen a + --dynamic-linker option. Don't do it if we have seen a PHDRS + clause in a linker script. + (Layout::finalize): Don't create a .interp section if we've + already create a PT_INTERP segment. + (Layout::create_interp): Always call choose_output_section (revert + patch of 2011-06-17). Don't create PT_INTERP segment. + * script-sections.cc + (Script_sections::create_note_and_tls_segments): Add a .interp + section to a PT_INTERP segment even if we have seen a + --dynamic-linker option. + +2011-06-18 Ian Lance Taylor + + * layout.cc (Layout::finish_dynamic_section): Don't set DT_TEXTREL + merely because a non-PT_LOAD segment has a dynamic reloc. + +2011-06-18 Ian Lance Taylor + + * layout.cc (Layout::finish_dynamic_section): Don't create + DT_FLAGS entry if not needed. + +2011-06-18 Ian Lance Taylor + + PR gold/12745 + * layout.cc (Layout::layout_eh_frame): Correct handling of + writable .eh_frame section. + +2011-06-17 Ian Lance Taylor + + PR gold/12893 + * resolve.cc (Symbol_table::resolve): Don't give an error if a + symbol is redefined with the exact same object and value. + +2011-06-17 Ian Lance Taylor + + PR gold/12880 + * layout.h (class Layout): Add interp_segment_ field. + * layout.cc (Layout::Layout): Initialize interp_segment_ field. + (Layout::attach_allocated_section_to_segment): If making shared + library, put .interp section in PT_INTERP segment. + (Layout::finalize): Also call create_interp if -dynamic-linker + option was used. + (Layout::create_interp): Assert that there is no PT_INTERP + segment. If not using a SECTIONS clause, use make_output_section. + (Layout::make_output_segment): Set interp_segment_ if PT_INTERP. + * script-sections.cc + (Script_sections::create_note_and_tls_segments): If making shared + library, put .interp section in PT_INTERP segment. + +2011-06-17 Ian Lance Taylor + + * object.cc (Sized_relobj_file::do_layout): Keep warning sections + when making a shared library. + +2011-06-17 Ian Lance Taylor + + * x86_64.cc (Target_x86_64::Scan::check_non_pic): Add gsym + parameter. Change all callers. Don't issue warning about PC32 + against locally defined symbol. + +2011-06-16 Ian Lance Taylor + + * symtab.cc (Warnings::issue_warning): Don't warn if relocation + occurs in same object. + +2011-06-14 Alan Modra + + * po/POTFILES.in: Regenerate. + +2011-06-09 Ian Lance Taylor + + * script-sections.cc + (Orphan_output_section::set_section_addresses): For a relocatable + link set address to 0. + +2011-06-09 Cary Coutant + + PR gold/12804 + * gold/gold.cc (queue_initial_tasks): Warn if --incremental is + used with --compress-debug-sections. + * gold/object.cc (Sized_relobj_file::do_layout): Report + uncompressed size of compressed input sections. + +2011-06-08 Cary Coutant + + PR gold/12804 + * testsuite/two_file_test_2_v1.cc: Change initialization of + v2 to keep it in .data. + +2011-06-07 Cary Coutant + + * common.cc (Symbol_table::do_allocate_commons_list): Call + gold_fallback. + * errors.cc (Errors::fatal): Adjust call to gold_exit. + (Errors::fallback): New function. + (gold_fallback): New function. + * errors.h (Errors::fallback): New function. + * gold.cc (gold_exit): Change status parameter to enum; adjust + all callers. + (queue_initial_tasks): Call gold_fallback. + * gold.h: Include cstdlib. + (Exit_status): New enum type. + (gold_exit): Change status parameter to enum. + (gold_fallback): New function. + * layout.cc (Layout::set_section_offsets): Call gold_fallback. + (Layout::create_symtab_sections): Likewise. + (Layout::create_shdrs): Likewise. + * main.cc (main): Adjust call to gold_exit. + * output.cc (Output_data_got::add_got_entry): Call gold_fallback. + (Output_data_got::add_got_entry_pair): Likewise. + (Output_section::add_input_section): Likewise. + (Output_section::add_output_section_data): Likewise. + (Output_segment::set_section_list_addresses): Likewise. + * x86_64.cc (Output_data_plt_x86_64::add_entry): Likewise. + +2011-06-07 Cary Coutant + + * layout.cc (Layout::set_segment_offsets): Don't adjust layout + for incremental links. + * output.cc (Output_segment::set_section_list_addresses): Remove + FIXME and test for TLS or BSS. + +2011-06-07 Cary Coutant + + * testsuite/Makefile.am: Add incremental_copy_test, + incremental_common_test_1. + * testsuite/Makefile.in: Regenerate. + * testsuite/common_test_1_v1.c: New source file. + * testsuite/common_test_1_v2.c: New source file. + * testsuite/copy_test_v1.cc: New source file. + +2011-06-07 Cary Coutant + + * common.cc (Symbol_table::do_allocate_commons_list): For incremental + update, allocate common from bss section's free list. + * incremental-dump.cc (dump_incremental_inputs): Print flag for + linker-defined symbols. + * incremental.cc (Sized_incremental_binary::do_process_got_plt): + Skip GOT and PLT entries that are no longer referenced. + (Output_section_incremental_inputs::write_info_blocks): Mark + linker-defined symbols. + (Sized_incr_relobj::do_add_symbols): Process linker-defined symbols. + * output.cc (Output_section::allocate): New function. + * output.h (Output_section::allocate): New function. + * resolve.cc (Symbol_table::report_resolve_problem): Add case for + linker-defined symbols. + (Symbol::override_base_with_special): Copy is_predefined_ flag. + * symtab.cc (Symbol::init_fields): Initialize is_predefined_ flag. + (Symbol::init_base_output_data): Likewise. + (Symbol::init_base_output_segment): Likewise. + (Symbol::init_base_constant): Likewise. + (Sized_symbol::init_output_data): Likewise. + (Sized_symbol::init_output_segment): Likewise. + (Sized_symbol::init_constant): Likewise. + (Symbol_table::do_define_in_output_data): Likewise. + (Symbol_table::do_define_in_output_segment): Likewise. + (Symbol_table::do_define_as_constant): Likewise. + * symtab.h (Symbol::is_predefined): New function. + (Symbol::init_base_output_data): Add is_predefined parameter. + (Symbol::init_base_output_segment): Likewise. + (Symbol::init_base_constant): Likewise. + (Symbol::is_predefined_): New data member. + (Sized_symbol::init_output_data): Add is_predefined parameter. + (Sized_symbol::init_output_segment): Likewise. + (Sized_symbol::init_constant): Likewise. + (enum Symbol_table::Defined): Add INCREMENTAL_BASE. + +2011-06-07 Cary Coutant + + * copy-relocs.cc (Copy_relocs::copy_reloc): Call make_copy_reloc + instead of emit_copy_reloc. + (Copy_relocs::emit_copy_reloc): Refactor. + (Copy_relocs::make_copy_reloc): New function. + (Copy_relocs::add_copy_reloc): Remove. + * copy-relocs.h (Copy_relocs::emit_copy_reloc): Move to public + section. + (Copy_relocs::make_copy_reloc): New function. + (Copy_relocs::add_copy_reloc): Remove. + * gold.cc (queue_middle_tasks): Emit old COPY relocations from + unchanged input files. + * incremental-dump.cc (dump_incremental_inputs): Print "COPY" flag. + * incremental.cc (Sized_incremental_binary::do_reserve_layout): + Reserve BSS space for COPY relocations. + (Sized_incremental_binary::do_emit_copy_relocs): New function. + (Output_section_incremental_inputs::write_info_blocks): Record + whether a symbol is copied from a shared object. + (Sized_incr_dynobj::do_add_symbols): Record COPY relocations. + * incremental.h (enum Incremental_shlib_symbol_flags): New type. + (INCREMENTAL_SHLIB_SYM_FLAGS_SHIFT): New constant. + (Incremental_input_entry_reader::get_output_symbol_index): Add + is_copy parameter. + (Incremental_binary::emit_copy_relocs): New function. + (Incremental_binary::do_emit_copy_relocs): New function. + (Sized_incremental_binary::Sized_incremental_binary): Initialize + new data member. + (Sized_incremental_binary::add_copy_reloc): New function. + (Sized_incremental_binary::do_emit_copy_relocs): New function. + (Sized_incremental_binary::Copy_reloc): New struct. + (Sized_incremental_binary::Copy_relocs): New typedef. + (Sized_incremental_binary::copy_relocs_): New data member. + * symtab.cc (Symbol_table::add_from_incrobj): Change return type. + * symtab.h (Symbol_table::add_from_incrobj): Change return type. + * target.h (Sized_target::emit_copy_reloc): New function. + * x86_64.cc (Target_x86_64::emit_copy_reloc): New function. + +2011-06-02 Cary Coutant + + PR gold/12163 + * gold/archive.cc (Archive::Archive): Initialize new data member. + (Archive::include_all_members): Return if archive has already been + included. + * gold/archive.h (Archive::include_all_members_): New data member. + +2011-06-02 Nick Clifton + + * dynobj.h: Fix spelling mistake in comment. + * output.cc: Likewise. + +2011-05-31 Doug Kwan + Asier Llano + + PR gold/12826 + * arm.cc (Target_arm::tag_cpu_arch_combine): Fix handling of + arch value that equals to elfcpp::MAX_TAG_CPU_ARCH. + * testsuite/Makefile.am: (MOSTLYCLEANFILES): Clean up. Remove + redundant arm_exidx_test.so. + * testsuite/Makefile.in: Regenerate. + (check_SCRIPTS): Add pr12826.sh + (check_DATA): Add pr12826.stdout + (pr12826.stdout, pr12826.so, pr12826_1.o, pr12826_2.o): New rules. + * testsuite/pr12826.sh: New file. + * testsuite/pr12826_1.s: Ditto. + * testsuite/pr12826_1.s: Ditto. + +2011-05-30 Ian Lance Taylor + + * reloc.cc (Sized_relobj_file::do_read_relocs): Ignore empty reloc + sections. + +2011-05-29 Ian Lance Taylor + + PR gold/12804 + * testsuite/Makefile.am: Use different file name for two_file_test + temporary file for each incremental test. + * testsuite/Makefile.in: Rebuild. + +2011-05-29 Ian Lance Taylor + + * binary.cc (Binary_to_elf::sized_convert): Don't crash if the + binary input file is empty. + +2011-05-27 Ian Lance Taylor + + * testsuite/Makefile.am (ver_test_2.so): Use -Wl,-R,. + (ver_test_9.so): Likewise. + * testsuite/Makefile.in: Rebuild. + +2011-05-26 Cary Coutant + + * incremental-dump.cc (dump_incremental_inputs): Print COMDAT groups. + * incremental.cc (Incremental_inputs::report_input_section): Fix + comment, indentation. + (Incremental_inputs::report_comdat_group): New function. + (Output_section_incremental_inputs::set_final_data_size): Adjust size + of data for incremental input file entry. + (Output_section_incremental_inputs::write_info_blocks): Write COMDAT + group count, COMDAT group signatures. + (Sized_incr_relobj::do_layout): Record kept COMDAT group info from + an unchanged input file. + * incremental.h (Incremental_object_entry::Incremental_object_entry): + Initialize new data member. + (Incremental_object_entry::add_comdat_group): New function. + (Incremental_object_entry::get_comdat_group_count): New function. + (Incremental_object_entry::get_comdat_signature_key): New function. + (Incremental_object_entry::groups_): New data member. + (Incremental_inputs::report_comdat_group): New function. + (Incremental_input_entry_reader::get_symbol_offset): Adjust size of + data for incremental input file entry. + (Incremental_input_entry_reader::get_comdat_group_count): New function. + (Incremental_input_entry_reader::get_input_section): Adjust size of + data for incremental input file entry. + (Incremental_input_entry_reader::get_global_symbol_reader): Likewise. + (Incremental_input_entry_reader::get_comdat_group_signature): New + function. + * object.cc (Sized_relobj::include_section_group): Report kept + COMDAT groups for incremental links. + +2011-05-24 David Meyer + + * dirsearch.cc (Dirsearch::find): Replace n1 and n2 parameters + with name parameter. Add found_name parameter. + * fileread.cc (Input_file::find_file): Adjust code accordingly. + * dirsearch.h (class Dirsearch): Update declaration. + +2011-05-24 Ian Lance Taylor + + * archive.cc (Library_base::should_include_member): Pull in object + from archive if it defines the entry symbol. + * parameters.cc (Parameters::entry): New function. + * parameters.h (class Parameters): Declare entry. + * output.h (class Output_file_header): Remove entry_ field. + * output.cc (Output_file_header::Output_file_header): Remove entry + parameter. Change all callers. + (Output_file_header::entry): Use parameters->entry. + * gold.cc (queue_middle_tasks): Likewise. + * plugin.cc (Plugin_hook::run): Likewise. + +2011-05-24 Cary Coutant + + * gold.cc (queue_initial_tasks): Pass incremental base filename + to Output_file::open_base_file; don't print error message. + * incremental-dump.cc (main): Adjust call to + Output_file::open_for_modification. + * incremental-dump.cc (main): Likewise. + * incremental.cc (Incremental_inputs::report_command_line): + Ignore --incremental-base option when comparing command lines. + Ignore parameter when given as separate argument. + * options.h (class General_options): Add --incremental-base. + * output.cc (Output_file::Output_file): + (Output_file::open_base_file): Add base_name and writable parameters; + read base file into new file; print error message here. + (Output_file::map_no_anonymous): Add writable parameter; adjust all + callers. + * output.h (Output_file::open_for_modification): Rename to... + (Output_file::open_base_file): ...this; add base_name and + writable parameters; adjust all callers. + (Output_file::map_no_anonymous): Add writable parameter; adjust all + callers. + * testsuite/Makefile.am (incremental_test_4): Test + --incremental-base. + * testsuite/Makefile.in: Regenerate. + +2011-05-24 Cary Coutant + + * testsuite/Makefile.am: Add incremental_test_2, incremental_test_3, + incremental_test_4. + * testsuite/Makefile.in: Regenerate. + * testsuite/two_file_test_1_v1.cc: New test source file. + * testsuite/two_file_test_1b_v1.cc: New test source file. + * testsuite/two_file_test_2_v1.cc: New test source file. + +2011-05-24 Cary Coutant + + * dynobj.h (Dynobj::do_dynobj): New function. + * incremental-dump.cc (dump_incremental_inputs): Print as_needed + flag and soname for shared objects. + * incremental.cc (Incremental_inputs::report_object): Make + either Incremental_object_entry or Incremental_dynobj_entry; add + soname to string table. + (Incremental_inputs::report_input_section): Add assertion. + (Output_section_incremental_inputs::set_final_data_size): Adjust + type of input file entry for shared libraries; adjust size of + shared library info entry. + (Output_section_incremental_inputs::write_input_files): Write + as_needed flag for shared libraries. + (Output_section_incremental_inputs::write_info_blocks): Adjust type + of input file entry for shared libraries; write soname. + (Sized_incr_dynobj::Sized_incr_dynobj): Read as_needed flag and + soname from incremental info. + * incremental.h (enum Incremental_input_flags): Add + INCREMENTAL_INPUT_AS_NEEDED. + (Incremental_input_entry::Incremental_input_entry): Initialize new + data member. + (Incremental_input_entry::set_as_needed): New function. + (Incremental_input_entry::as_needed): New function. + (Incremental_input_entry::do_dynobj_entry): New function. + (Incremental_input_entry::as_needed_): New data member. + (Incremental_object_entry::Incremental_object_entry): Don't check + for shared library. + (Incremental_object_entry::do_type): Likewise. + (class Incremental_dynobj_entry): New class. + (Incremental_input_entry_reader::as_needed): New function. + (Incremental_input_entry_reader::get_soname): New function. + (Incremental_input_entry_reader::get_global_symbol_count): Rewrite. + (Incremental_input_entry_reader::get_output_symbol_index): Adjust + size of shared library info entry. + * layout.cc (Layout::finish_dynamic_section): Don't test for + incremental link when adding DT_NEEDED entries. + * object.h (Object::Object): Initialize new data member. + (Object::dynobj): New function. + (Object::set_as_needed): New function. + (Object::as_needed): New function. + (Object::do_dynobj): New function. + (Object::as_needed_): New data member. + +2011-05-24 Cary Coutant + + * incremental-dump.cc (dump_incremental_inputs): Print dynamic reloc + info; adjust display of GOT entries. + * incremental.cc (Sized_incremental_binary::setup_readers): Allocate + vector of input objects; remove file_status_. + (Sized_incremental_binary::do_reserve_layout): Remove file_status_. + (Sized_incremental_binary::do_process_got_plt): Adjust calls to + got_plt reader; call target hooks to reserve GOT entries. + (Output_section_incremental_inputs::set_final_data_size): Adjust size + of input file info header and GOT info entry. + (Output_section_incremental_inputs::write_info_blocks): Write dynamic + relocation info. + (Got_plt_view_info::got_descriptor): Remove. + (Got_plt_view_info::sym_index): New data member. + (Got_plt_view_info::input_index): New data member. + (Local_got_offset_visitor::visit): Write input file index. + (Global_got_offset_visitor::visit): Write 0 for input file index. + (Global_symbol_visitor_got_plt::operator()): Replace got_descriptor + with sym_index and input_index. + (Output_section_incremental_inputs::write_got_plt): Adjust size of + incremental info GOT entry; replace got_descriptor with input_index. + (Sized_relobj_incr::Sized_relobj_incr): Adjust initializers; record + map from input file index to object. + (Sized_relobj_incr::do_layout): Replace direct data member reference + with accessor function. + (Sized_relobj_incr::do_for_all_local_got_entries): Move to base class. + * incremental.h (Incremental_input_entry_reader::get_symbol_offset): + Adjust size of input file info header. + (Incremental_input_entry_reader::get_first_dyn_reloc): New function. + (Incremental_input_entry_reader::get_dyn_reloc_count): New function. + (Incremental_input_entry_reader::get_input_section): Adjust size of + input file info header. + (Incremental_got_plt_reader::Incremental_got_plt_reader): Adjust size + of incremental info GOT entry. + (Incremental_got_plt_reader::get_got_desc): Remove. + (Incremental_got_plt_reader::get_got_symndx): New function. + (Incremental_got_plt_reader::get_got_input_index): New function. + (Sized_incremental_binary::Sized_incremental_binary): Remove + file_status_; add input_objects_. + (Sized_incremental_binary::~Sized_incremental_binary): Remove. + (Sized_incremental_binary::set_file_is_unchanged): Remove. + (Sized_incremental_binary::file_is_unchanged): Remove. + (Sized_incremental_binary::set_input_object): New function. + (Sized_incremental_binary::input_object): New function. + (Sized_incremental_binary::file_status_): Remove. + (Sized_incremental_binary::input_objects_): New data member. + (Sized_relobj_incr): Rename Sized_incr_relobj to this; adjust all + references. + (Sized_relobj_incr::invalid_address): Move to base class. + (Sized_relobj_incr::is_output_section_offset_invalid): Move to base + class. + (Sized_relobj_incr::do_output_section_offset): Likewise. + (Sized_relobj_incr::do_for_all_local_got_entries): Likewise. + (Sized_relobj_incr::section_offsets_): Likewise. + * object.cc (Sized_relobj::do_for_all_local_got_entries): New + function. + (Sized_relobj_file::Sized_relobj_file): Remove local_got_offsets_. + (Sized_relobj_file::layout_section): Replace refs to section_offsets_ + with accessor function. + (Sized_relobj_file::do_layout): Likewise. + (Sized_relobj_file::do_layout_deferred_sections): Likewise. + (Sized_relobj_file::do_for_all_local_got_entries): Move to base class. + (Sized_relobj_file::compute_final_local_value): Replace refs to + section_offsets_ with accessor function. + (Sized_relobj_file::do_finalize_local_symbols): Likewise. + * object.h (Relobj::Relobj): Initialize new data members. + (Relobj::add_dyn_reloc): New function. + (Relobj::first_dyn_reloc): New function. + (Relobj::dyn_reloc_count): New function. + (Relobj::first_dyn_reloc_): New data member. + (Relobj::dyn_reloc_count_): New data member. + (Sized_relobj): Rename Sized_relobj_base to this; adjust all + references. + (Sized_relobj::Address): New typedef. + (Sized_relobj::invalid_address): Move here from child class. + (Sized_relobj::Sized_relobj): Initialize new data members. + (Sized_relobj::sized_relobj): New function. + (Sized_relobj::is_output_section_offset_invalid): Move here from + child class. + (Sized_relobj::get_output_section_offset): Likewise. + (Sized_relobj::local_has_got_offset): Likewise. + (Sized_relobj::local_got_offset): Likewise. + (Sized_relobj::set_local_got_offset): Likewise. + (Sized_relobj::do_for_all_local_got_entries): Likewise. + (Sized_relobj::clear_got_offsets): New function. + (Sized_relobj::section_offsets): Move here from child class. + (Sized_relobj::do_output_section_offset): Likewise. + (Sized_relobj::do_set_section_offset): Likewise. + (Sized_relobj::Local_got_offsets): Likewise. + (Sized_relobj::local_got_offsets_): Likewise. + (Sized_relobj::section_offsets_): Likewise. + (Sized_relobj_file): Rename Sized_relobj to this; adjust all + references. + (Sized_relobj_file::is_output_section_offset_invalid): Move to base + class. + (Sized_relobj_file::sized_relobj): New function + (Sized_relobj_file::local_has_got_offset): Move to base class. + (Sized_relobj_file::local_got_offset): Likewise. + (Sized_relobj_file::set_local_got_offset): Likewise. + (Sized_relobj_file::get_output_section_offset): Likewise. + (Sized_relobj_file::do_for_all_local_got_entries): Likewise. + (Sized_relobj_file::do_output_section_offset): Likewise. + (Sized_relobj_file::do_set_section_offset): Likewise. + (Sized_relobj_file::Local_got_offsets): Likewise. + (Sized_relobj_file::local_got_offsets_): Likewise. + (Sized_relobj_file::section_offsets_): Likewise. + * output.cc (Output_reloc::Output_reloc): Adjust type of relobj + (all constructors). + (set_needs_dynsym_index): Convert relobj to derived class pointer. + (Output_reloc::get_symbol_index): Likewise. + (Output_reloc::local_section_offset): Likewise. + (Output_reloc::get_address): Likewise. + (Output_reloc::symbol_value): Likewise. + (Output_data_got::reserve_slot): Move to class definition. + (Output_data_got::reserve_local): New function. + (Output_data_got::reserve_slot_for_global): Remove. + (Output_data_got::reserve_global): New function. + * output.h (Output_reloc::Output_reloc): Adjust type of relobj + (all constructors, two instantiations). + (Output_reloc::get_relobj): New function (two instantiations). + (Output_reloc::u1_.relobj, Output_reloc::u2_.relobj): Adjust type. + (Output_data_reloc_base::add): Convert relobj to derived class pointer. + (Output_data_reloc::add_global): Adjust type of relobj. + (Output_data_reloc::add_global_relative): Likewise. + (Output_data_reloc::add_symbolless_global_addend): Likewise. + (Output_data_reloc::add_local): Likewise. + (Output_data_reloc::add_local_relative): Likewise. + (Output_data_reloc::add_symbolless_local_addend): Likewise. + (Output_data_reloc::add_local_section): Likewise. + (Output_data_reloc::add_output_section): Likewise. + (Output_data_reloc::add_absolute): Likewise. + (Output_data_reloc::add_target_specific): Likewise. + (Output_data_got::reserve_slot): Move definition here. + (Output_data_got::reserve_local): New function. + (Output_data_got::reserve_global): New function. + * reloc.cc (Sized_relobj_file::do_read_relocs): Replace refs to + section_offsets_ with accessor function. + (Sized_relobj_file::write_sections): Likewise. + (Sized_relobj_file::do_relocate_sections): Likewise. + * target.h (Sized_target::reserve_local_got_entry): New function. + (Sized_target::reserve_global_got_entry): New function. + * x86_64.cc (Target_x86_64::reserve_local_got_entry): New function. + (Target_x86_64::reserve_global_got_entry): New function. + (Target_x86_64::init_got_plt_for_update): Create rela_dyn section. + +2011-05-23 Cary Coutant + + * gold.cc (queue_middle_tasks): Process existing GOT/PLT entries. + * incremental-dump.cc (dump_incremental_inputs): Mask high-order + bit when checking got_type. + * incremental.cc (Sized_incremental_binary::setup_readers): + Store symbol table and string table locations; initialize bit vector + of file status flags. + (Sized_incremental_binary::do_reserve_layout): Set bit flag for + unchanged files. + (Sized_incremental_binary::do_process_got_plt): New function. + (Sized_incremental_binary::get_symtab_view): Use stored locations. + (Output_section_incremental_inputs::set_final_data_size): Record + file index for each input file. + (Output_section_incremental_inputs::write_got_plt): Store file index + instead of input entry offset for each GOT entry. + * incremental.h + (Incremental_input_entry::Incremental_input_entry): Initialize new + data member. + (Incremental_input_entry::set_offset): Store file index. + (Incremental_input_entry::get_file_index): New function. + (Incremental_input_entry::file_index_): New data member. + (Incremental_binary::process_got_plt): New function. + (Incremental_binary::do_process_got_plt): New function. + (Sized_incremental_binary::Sized_incremental_binary): Initialize new + data members. + (Sized_incremental_binary::~Sized_incremental_binary): New destructor. + (Sized_incremental_binary::set_file_is_unchanged): New function. + (Sized_incremental_binary::file_is_unchanged): New function. + (Sized_incremental_binary::do_process_got_plt): New function. + (Sized_incremental_binary::file_status_): New data member. + (Sized_incremental_binary::main_symtab_loc_): New data member. + (Sized_incremental_binary::main_strtab_loc_): New data member. + * output.cc (Output_data_got::Got_entry::write): Add case + RESERVED_CODE. + (Output_data_got::add_global): Call add_got_entry. + (Output_data_got::add_global_plt): Likewise. + (Output_data_got::add_global_with_rel): Likewise. + (Output_data_got::add_global_with_rela): Likewise. + (Output_data_got::add_global_pair_with_rel): Call add_got_entry_pair. + (Output_data_got::add_global_pair_with_rela): Likewise. + (Output_data_got::add_local): Call add_got_entry. + (Output_data_got::add_local_plt): Likewise. + (Output_data_got::add_local_with_rel): Likewise. + (Output_data_got::add_local_with_rela): Likewise. + (Output_data_got::add_local_pair_with_rel): Call add_got_entry_pair. + (Output_data_got::add_local_pair_with_rela): Likewise. + (Output_data_got::reserve_slot): New function. + (Output_data_got::reserve_slot_for_global): New function. + (Output_data_got::add_got_entry): New function. + (Output_data_got::add_got_entry_pair): New function. + (Output_section::add_output_section_data): Edit FIXME. + * output.h + (Output_section_data_build::Output_section_data_build): New + constructor with size parameter. + (Output_data_space::Output_data_space): Likewise. + (Output_data_got::Output_data_got): Initialize new data member; new + constructor with size parameter. + (Output_data_got::add_constant): Call add_got_entry. + (Output_data_got::reserve_slot): New function. + (Output_data_got::reserve_slot_for_global): New function. + (class Output_data_got::Got_entry): Add RESERVED_CODE. + (Output_data_got::add_got_entry): New function. + (Output_data_got::add_got_entry_pair): New function. + (Output_data_got::free_list_): New data member. + * target.h (Sized_target::init_got_plt_for_update): New function. + (Sized_target::register_global_plt_entry): New function. + * x86_64.cc (Output_data_plt_x86_64::Output_data_plt_x86_64): + Initialize new data member; call init; add constructor with PLT count. + (Output_data_plt_x86_64::init): New function. + (Output_data_plt_x86_64::add_relocation): New function. + (Output_data_plt_x86_64::reserve_slot): New function. + (Output_data_plt_x86_64::free_list_): New data member. + (Target_x86_64::init_got_plt_for_update): New function. + (Target_x86_64::register_global_plt_entry): New function. + (Output_data_plt_x86_64::add_entry): Allocate from free list for + incremental updates. + (Output_data_plt_x86_64::add_relocation): New function. + * testsuite/object_unittest.cc (Object_test): Set default options. + +2011-05-16 Ian Lance Taylor + + * options.h (class General_options): Make -i a synonym for -r. + +2011-05-16 Ian Lance Taylor + + * testsuite/tls_test_main.cc: Use semaphores instead of mutexes. + +2011-05-10 Cary Coutant + + * object.cc (Sized_relobj::do_count_local_symbols): Check for + strip_all (-s). + +2011-05-06 Ian Lance Taylor + + * layout.cc (Layout::layout): If the output section flags change, + update the ordering. + +2011-04-25 Cary Coutant + + * incremental-dump.cc (dump_incremental_inputs): Print local + symbol info for each input file. + * incremental.cc + (Output_section_incremental_inputs::set_final_data_size): Add local + symbol info to input file entries in incremental info. + (Output_section_incremental_inputs::write_info_blocks): Likewise. + (Sized_incr_relobj::Sized_incr_relobj): Initialize new data members. + (Sized_incr_relobj::do_add_symbols): Cosmetic change. + (Sized_incr_relobj::do_count_local_symbols): Replace stub with + implementation. + (Sized_incr_relobj::do_finalize_local_symbols): Likewise. + (Sized_incr_relobj::do_relocate): Write the local symbols. + (Sized_incr_dynobj::do_add_symbols): Cosmetic change. + * incremental.h (Incremental_inputs_reader::get_symbol_offset): + Adjust size of input file header. + (Incremental_inputs_reader::get_local_symbol_offset): New function. + (Incremental_inputs_reader::get_local_symbol_count): New function. + (Incremental_inputs_reader::get_input_section): Adjust size of input + file header. + (Incremental_inputs_reader::get_global_symbol_reader): Likewise. + (Sized_incr_relobj::This): New typedef. + (Sized_incr_relobj::sym_size): New const data member. + (Sized_incr_relobj::Local_symbol): New struct. + (Sized_incr_relobj::do_output_local_symbol_count): New function. + (Sized_incr_relobj::do_local_symbol_offset): New function. + (Sized_incr_relobj::local_symbol_count_): New data member. + (Sized_incr_relobj::output_local_dynsym_count_): New data member. + (Sized_incr_relobj::local_symbol_index_): New data member. + (Sized_incr_relobj::local_symbol_offset_): New data member. + (Sized_incr_relobj::local_dynsym_offset_): New data member. + (Sized_incr_relobj::local_symbols_): New data member. + * object.h (Relobj::output_local_symbol_count): New function. + (Relobj::local_symbol_offset): New function. + (Relobj::do_output_local_symbol_count): New function. + (Relobj::do_local_symbol_offset): New function. + (Sized_relobj::do_output_local_symbol_count): New function. + (Sized_relobj::do_local_symbol_offset): New function. + +2011-04-22 Vladimir Simonov + + * descriptors.cc (set_close_on_exec): New function. + (Descriptors::open): Use set_close_on_exec. + * output.cc (S_ISLNK): Define if not defined. + +2011-04-22 Cary Coutant + + * incremental.cc (Sized_incremental_binary::setup_readers): Allocate + global symbol map. + (Sized_incremental_binary::do_apply_incremental_relocs): New function. + (Sized_incr_relobj::do_add_symbols): Add symbols to global symbol map. + (Sized_incr_relobj::do_relocate): Remap section indices in incremental + relocations. + (Sized_incr_dynobj::do_add_symbols): Add symbols to global symbol map. + (Sized_incr_dynobj::do_for_all_global_symbols): Remove FIXME. + (Sized_incr_dynobj::do_for_all_local_got_entries): Likewise. + * incremental.h + (Incremental_inputs_reader::global_symbol_reader_at_offset): New + function. + (Incremental_binary::apply_incremental_relocs): New function. + (Incremental_binary::do_apply_incremental_relocs): New function. + (Sized_incremental_binary::Sized_incremental_binary): Initialize new + data member. + (Sized_incremental_binary::add_global_symbol): New function. + (Sized_incremental_binary::global_symbol): New function. + (Sized_incremental_binary::do_apply_incremental_relocs): New function. + (Sized_incremental_binary::symbol_map_): New data member. + * layout.cc (Layout_task_runner::run): Apply incremental relocations. + * target.h (Sized_target::apply_relocation): New function. + * target-reloc.h (apply_relocation): New function. + * x86_64.cc (Target_x86_64::apply_relocation): New function. + +2011-04-22 Doug Kwan + + * arm.cc (Arm_output_section::Arm_output_section): Set SHF_LINK_ORDER + flag of a SHT_ARM_EXIDX section. + * testsuite/Makefile.am (arm_exidx_test): New test rules. + * testsuite/Makefile.in: Regenerate. + * testsuite/arm_exidx_test.s: New file. + * testsuite/arm_exidx_test.sh: Same. + 2011-04-20 Cary Coutant PR gold/12689 @@ -616,7 +2311,7 @@ * testsuite/Makefile.am (final_layout.stdout): Use -n option with nm. * testsuite/Makefile.in: Regenerate. -2010-03-23 Rafael Ávila de Espíndola +2011-03-23 Rafael Ávila de Espíndola * plugin.cc (get_view): New. (Plugin::load): Pass get_view to the plugin. @@ -717,7 +2412,7 @@ the toolchain building binutils. * configure: Rebuild. -2010-02-18 Rafael Ávila de Espíndola +2011-02-18 Rafael Ávila de Espíndola * symtab.cc (Symbol::should_add_dynsym_entry) Return false for plugin only symbols. @@ -736,7 +2431,7 @@ * reloc.cc (Sized_relobj::do_relocate): Don't call clear_local_symbols. -2010-02-08 Rafael Ávila de Espíndola +2011-02-08 Rafael Ávila de Espíndola * plugin.cc (is_visible_from_outside): Return true for symbols in the -u option. diff --git a/gold/Makefile.in b/gold/Makefile.in index bf729cf..1c33fe6 100644 --- a/gold/Makefile.in +++ b/gold/Makefile.in @@ -273,6 +273,7 @@ MKDIR_P = @MKDIR_P@ MKINSTALLDIRS = @MKINSTALLDIRS@ MSGFMT = @MSGFMT@ MSGMERGE = @MSGMERGE@ +NM = @NM@ NO_WERROR = @NO_WERROR@ OBJEXT = @OBJEXT@ PACKAGE = @PACKAGE@ diff --git a/gold/archive.cc b/gold/archive.cc index 6a1e3b9..c2e6ff6 100644 --- a/gold/archive.cc +++ b/gold/archive.cc @@ -113,6 +113,11 @@ Library_base::should_include_member(Symbol_table* symtab, Layout* layout, *why = buf; delete[] buf; } + else if (strcmp(sym_name, parameters->entry()) == 0) + { + *why = "entry symbol "; + *why += sym_name; + } else return Library_base::SHOULD_INCLUDE_UNKNOWN; } @@ -174,7 +179,8 @@ Archive::Archive(const std::string& name, Input_file* input_file, : Library_base(task), name_(name), input_file_(input_file), armap_(), armap_names_(), extended_names_(), armap_checked_(), seen_offsets_(), members_(), is_thin_archive_(is_thin_archive), included_member_(false), - nested_archives_(), dirpath_(dirpath), num_members_(0) + nested_archives_(), dirpath_(dirpath), num_members_(0), + included_all_members_(false) { this->no_export_ = parameters->options().check_excluded_libs(input_file->found_name()); @@ -647,7 +653,8 @@ Archive::get_elf_object_for_member(off_t off, bool* punconfigured) { Object* obj = parameters->options().plugins()->claim_file(input_file, memoff, - memsize); + memsize, + NULL); if (obj != NULL) { // The input file was claimed by a plugin, and its symbols @@ -842,6 +849,13 @@ bool Archive::include_all_members(Symbol_table* symtab, Layout* layout, Input_objects* input_objects, Mapfile* mapfile) { + // Don't include the same archive twice. This can happen if + // --whole-archive is nested inside --start-group (PR gold/12163). + if (this->included_all_members_) + return true; + + this->included_all_members_ = true; + input_objects->archive_start(this); if (this->members_.size() > 0) diff --git a/gold/archive.h b/gold/archive.h index 78c2cc8..e73a687 100644 --- a/gold/archive.h +++ b/gold/archive.h @@ -405,6 +405,8 @@ class Archive : public Library_base unsigned int num_members_; // True if we exclude this library archive from automatic export. bool no_export_; + // True if this library has been included as a --whole-archive. + bool included_all_members_; }; // This class is used to read an archive and pick out the desired diff --git a/gold/arm.cc b/gold/arm.cc index 6c81d30..72c3670 100644 --- a/gold/arm.cc +++ b/gold/arm.cc @@ -1,6 +1,6 @@ // arm.cc -- arm target support for gold. -// Copyright 2009, 2010 Free Software Foundation, Inc. +// Copyright 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Doug Kwan based on the i386 code // by Ian Lance Taylor . // This file also contains borrowed and adapted code from @@ -1342,9 +1342,13 @@ class Arm_output_section : public Output_section public: typedef std::vector > Text_section_list; + // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section. Arm_output_section(const char* name, elfcpp::Elf_Word type, elfcpp::Elf_Xword flags) - : Output_section(name, type, flags) + : Output_section(name, type, + (type == elfcpp::SHT_ARM_EXIDX + ? flags | elfcpp::SHF_LINK_ORDER + : flags)) { if (type == elfcpp::SHT_ARM_EXIDX) this->set_always_keeps_input_sections(); @@ -1475,14 +1479,14 @@ class Arm_exidx_input_section // Arm_relobj class. template -class Arm_relobj : public Sized_relobj<32, big_endian> +class Arm_relobj : public Sized_relobj_file<32, big_endian> { public: static const Arm_address invalid_address = static_cast(-1); Arm_relobj(const std::string& name, Input_file* input_file, off_t offset, const typename elfcpp::Ehdr<32, big_endian>& ehdr) - : Sized_relobj<32, big_endian>(name, input_file, offset, ehdr), + : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr), stub_tables_(), local_symbol_is_thumb_function_(), attributes_section_data_(NULL), mapping_symbols_info_(), section_has_cortex_a8_workaround_(NULL), exidx_section_map_(), @@ -1653,7 +1657,7 @@ class Arm_relobj : public Sized_relobj<32, big_endian> do_setup() { // Call parent's setup method. - Sized_relobj<32, big_endian>::do_setup(); + Sized_relobj_file<32, big_endian>::do_setup(); // Initialize look-up tables. Stub_table_list empty_stub_table_list(this->shnum(), NULL); @@ -1666,9 +1670,10 @@ class Arm_relobj : public Sized_relobj<32, big_endian> Stringpool_template*); void - do_relocate_sections(const Symbol_table* symtab, const Layout* layout, - const unsigned char* pshdrs, Output_file* of, - typename Sized_relobj<32, big_endian>::Views* pivews); + do_relocate_sections( + const Symbol_table* symtab, const Layout* layout, + const unsigned char* pshdrs, Output_file* of, + typename Sized_relobj_file<32, big_endian>::Views* pivews); // Read the symbol information. void @@ -1908,7 +1913,8 @@ class Arm_output_data_got : public Output_data_got<32, big_endian> // relocation that needs to be applied in a static link. void add_static_reloc(unsigned int got_offset, unsigned int r_type, - Sized_relobj<32, big_endian>* relobj, unsigned int index) + Sized_relobj_file<32, big_endian>* relobj, + unsigned int index) { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj, index)); @@ -1925,7 +1931,7 @@ class Arm_output_data_got : public Output_data_got<32, big_endian> // Same as the above but for a local symbol in OBJECT with INDEX. void add_tls_gd32_with_static_reloc(unsigned int got_type, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int index); protected: @@ -1944,7 +1950,7 @@ class Arm_output_data_got : public Output_data_got<32, big_endian> { this->u_.global.symbol = gsym; } Static_reloc(unsigned int got_offset, unsigned int r_type, - Sized_relobj<32, big_endian>* relobj, unsigned int index) + Sized_relobj_file<32, big_endian>* relobj, unsigned int index) : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false) { this->u_.local.relobj = relobj; @@ -1975,7 +1981,7 @@ class Arm_output_data_got : public Output_data_got<32, big_endian> } // For a relocation against a local symbol, the defining object. - Sized_relobj<32, big_endian>* + Sized_relobj_file<32, big_endian>* relobj() const { gold_assert(!this->symbol_is_global_); @@ -2008,7 +2014,7 @@ class Arm_output_data_got : public Output_data_got<32, big_endian> struct { // For a local symbol, the object defining object. - Sized_relobj<32, big_endian>* relobj; + Sized_relobj_file<32, big_endian>* relobj; // For a local symbol, the symbol index. unsigned int index; } local; @@ -2069,7 +2075,8 @@ class Arm_scan_relocatable_relocs : case elfcpp::R_ARM_TARGET1: case elfcpp::R_ARM_TARGET2: gold_unreachable(); - // Relocations that write full 32 bits. + // Relocations that write full 32 bits and + // have alignment of 1. case elfcpp::R_ARM_ABS32: case elfcpp::R_ARM_REL32: case elfcpp::R_ARM_SBREL32: @@ -2087,7 +2094,7 @@ class Arm_scan_relocatable_relocs : case elfcpp::R_ARM_TLS_LDO32: case elfcpp::R_ARM_TLS_IE32: case elfcpp::R_ARM_TLS_LE32: - return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4; + return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED; default: // For all other static relocations, return RELOC_SPECIAL. return Relocatable_relocs::RELOC_SPECIAL; @@ -2171,38 +2178,11 @@ class Target_arm : public Sized_target<32, big_endian> copy_relocs_(elfcpp::R_ARM_COPY), dynbss_(NULL), got_mod_index_offset_(-1U), tls_base_symbol_defined_(false), stub_tables_(), stub_factory_(Stub_factory::get_instance()), - may_use_blx_(false), should_force_pic_veneer_(false), + should_force_pic_veneer_(false), arm_input_section_map_(), attributes_section_data_(NULL), fix_cortex_a8_(false), cortex_a8_relocs_info_() { } - // Virtual function which is set to return true by a target if - // it can use relocation types to determine if a function's - // pointer is taken. - virtual bool - can_check_for_function_pointers() const - { return true; } - - // Whether a section called SECTION_NAME may have function pointers to - // sections not eligible for safe ICF folding. - virtual bool - section_may_have_icf_unsafe_pointers(const char* section_name) const - { - return (!is_prefix_of(".ARM.exidx", section_name) - && !is_prefix_of(".ARM.extab", section_name) - && Target::section_may_have_icf_unsafe_pointers(section_name)); - } - - // Whether we can use BLX. - bool - may_use_blx() const - { return this->may_use_blx_; } - - // Set use-BLX flag. - void - set_may_use_blx(bool value) - { this->may_use_blx_ = value; } - // Whether we force PCI branch veneers. bool should_force_pic_veneer() const @@ -2264,13 +2244,43 @@ class Target_arm : public Sized_target<32, big_endian> || arch == elfcpp::TAG_CPU_ARCH_V7 || arch == elfcpp::TAG_CPU_ARCH_V7E_M); } + + // Whether we have v4T interworking instructions available. + bool + may_use_v4t_interworking() const + { + Object_attribute* attr = + this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); + int arch = attr->int_value(); + return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4 + && arch != elfcpp::TAG_CPU_ARCH_V4); + } + + // Whether we have v5T interworking instructions available. + bool + may_use_v5t_interworking() const + { + Object_attribute* attr = + this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); + int arch = attr->int_value(); + if (parameters->options().fix_arm1176()) + return (arch == elfcpp::TAG_CPU_ARCH_V6T2 + || arch == elfcpp::TAG_CPU_ARCH_V7 + || arch == elfcpp::TAG_CPU_ARCH_V6_M + || arch == elfcpp::TAG_CPU_ARCH_V6S_M + || arch == elfcpp::TAG_CPU_ARCH_V7E_M); + else + return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4 + && arch != elfcpp::TAG_CPU_ARCH_V4 + && arch != elfcpp::TAG_CPU_ARCH_V4T); + } // Process the relocations to determine unreferenced sections for // garbage collection. void gc_process_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -2284,7 +2294,7 @@ class Target_arm : public Sized_target<32, big_endian> void scan_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -2320,7 +2330,7 @@ class Target_arm : public Sized_target<32, big_endian> void scan_relocatable_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -2547,6 +2557,23 @@ class Target_arm : public Sized_target<32, big_endian> arm_reloc_property_table = new Arm_reloc_property_table(); } + // Virtual function which is set to return true by a target if + // it can use relocation types to determine if a function's + // pointer is taken. + virtual bool + do_can_check_for_function_pointers() const + { return true; } + + // Whether a section called SECTION_NAME may have function pointers to + // sections not eligible for safe ICF folding. + virtual bool + do_section_may_have_icf_unsafe_pointers(const char* section_name) const + { + return (!is_prefix_of(".ARM.exidx", section_name) + && !is_prefix_of(".ARM.extab", section_name) + && Target::do_section_may_have_icf_unsafe_pointers(section_name)); + } + private: // The class which scans relocations. class Scan @@ -2561,7 +2588,7 @@ class Target_arm : public Sized_target<32, big_endian> inline void local(Symbol_table* symtab, Layout* layout, Target_arm* target, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, @@ -2569,7 +2596,7 @@ class Target_arm : public Sized_target<32, big_endian> inline void global(Symbol_table* symtab, Layout* layout, Target_arm* target, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, @@ -2577,7 +2604,7 @@ class Target_arm : public Sized_target<32, big_endian> inline bool local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* , - Sized_relobj<32, big_endian>* , + Sized_relobj_file<32, big_endian>* , unsigned int , Output_section* , const elfcpp::Rel<32, big_endian>& , @@ -2586,7 +2613,7 @@ class Target_arm : public Sized_target<32, big_endian> inline bool global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* , - Sized_relobj<32, big_endian>* , + Sized_relobj_file<32, big_endian>* , unsigned int , Output_section* , const elfcpp::Rel<32, big_endian>& , @@ -2594,11 +2621,11 @@ class Target_arm : public Sized_target<32, big_endian> private: static void - unsupported_reloc_local(Sized_relobj<32, big_endian>*, + unsupported_reloc_local(Sized_relobj_file<32, big_endian>*, unsigned int r_type); static void - unsupported_reloc_global(Sized_relobj<32, big_endian>*, + unsupported_reloc_global(Sized_relobj_file<32, big_endian>*, unsigned int r_type, Symbol*); void @@ -2740,7 +2767,7 @@ class Target_arm : public Sized_target<32, big_endian> // Create a GOT entry for the TLS module index. unsigned int got_mod_index_entry(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, big_endian>* object); + Sized_relobj_file<32, big_endian>* object); // Get the PLT section. const Output_data_plt_arm* @@ -2771,7 +2798,7 @@ class Target_arm : public Sized_target<32, big_endian> // Add a potential copy relocation. void copy_reloc(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int shndx, Output_section* output_section, Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc) { @@ -2916,8 +2943,6 @@ class Target_arm : public Sized_target<32, big_endian> Stub_table_list stub_tables_; // Stub factory. const Stub_factory &stub_factory_; - // Whether we can use BLX. - bool may_use_blx_; // Whether we force PIC branch veneers. bool should_force_pic_veneer_; // Map for locating Arm_input_sections. @@ -2940,6 +2965,7 @@ const Target::Target_info Target_arm::arm_info = false, // has_resolve false, // has_code_fill true, // is_default_stack_executable + false, // can_icf_inline_merge_sections '\0', // wrap_char "/usr/lib/libc.so.1", // dynamic_linker 0x8000, // default_text_segment_address @@ -3204,15 +3230,14 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_ABS8: S + A static inline typename This::Status abs8(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval) { typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype; - typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; Valtype* wv = reinterpret_cast(view); Valtype val = elfcpp::Swap<8, big_endian>::readval(wv); - Reltype addend = utils::sign_extend<8>(val); - Reltype x = psymval->value(object, addend); + int32_t addend = utils::sign_extend<8>(val); + Arm_address x = psymval->value(object, addend); val = utils::bit_select(val, x, 0xffU); elfcpp::Swap<8, big_endian>::writeval(wv, val); @@ -3226,7 +3251,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_THM_ABS5: S + A static inline typename This::Status thm_abs5(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval) { typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; @@ -3248,7 +3273,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_ABS12: S + A static inline typename This::Status abs12(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval) { typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; @@ -3267,18 +3292,20 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_ABS16: S + A static inline typename This::Status abs16(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval) { - typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; + typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype; typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; - Valtype* wv = reinterpret_cast(view); - Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); - Reltype addend = utils::sign_extend<16>(val); - Reltype x = psymval->value(object, addend); + Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view); + int32_t addend = utils::sign_extend<16>(val); + Arm_address x = psymval->value(object, addend); val = utils::bit_select(val, x, 0xffffU); - elfcpp::Swap<16, big_endian>::writeval(wv, val); - return (utils::has_signed_unsigned_overflow<16>(x) + elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val); + + // R_ARM_ABS16 permits signed or unsigned results. + int signed_x = static_cast(x); + return ((signed_x < -32768 || signed_x > 65536) ? This::STATUS_OVERFLOW : This::STATUS_OKAY); } @@ -3286,31 +3313,29 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_ABS32: (S + A) | T static inline typename This::Status abs32(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address thumb_bit) { - typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; - Valtype* wv = reinterpret_cast(view); - Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv); + typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; + Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view); Valtype x = psymval->value(object, addend) | thumb_bit; - elfcpp::Swap<32, big_endian>::writeval(wv, x); + elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x); return This::STATUS_OKAY; } // R_ARM_REL32: (S + A) | T - P static inline typename This::Status rel32(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address address, Arm_address thumb_bit) { - typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; - Valtype* wv = reinterpret_cast(view); - Valtype addend = elfcpp::Swap<32, big_endian>::readval(wv); + typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; + Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view); Valtype x = (psymval->value(object, addend) | thumb_bit) - address; - elfcpp::Swap<32, big_endian>::writeval(wv, x); + elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x); return This::STATUS_OKAY; } @@ -3323,7 +3348,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_THM_JUMP6: S + A – P static inline typename This::Status thm_jump6(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address address) { @@ -3345,18 +3370,19 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_THM_JUMP8: S + A – P static inline typename This::Status thm_jump8(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address address) { typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; - typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; Valtype* wv = reinterpret_cast(view); Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); - Reltype addend = utils::sign_extend<8>((val & 0x00ff) << 1); - Reltype x = (psymval->value(object, addend) - address); - elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xff00) | ((x & 0x01fe) >> 1)); - return (utils::has_overflow<8>(x) + int32_t addend = utils::sign_extend<8>((val & 0x00ff) << 1); + int32_t x = (psymval->value(object, addend) - address); + elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00) + | ((x & 0x01fe) >> 1))); + // We do a 9-bit overflow check because x is right-shifted by 1 bit. + return (utils::has_overflow<9>(x) ? This::STATUS_OVERFLOW : This::STATUS_OKAY); } @@ -3364,18 +3390,19 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_THM_JUMP11: S + A – P static inline typename This::Status thm_jump11(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address address) { typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; - typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; Valtype* wv = reinterpret_cast(view); Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); - Reltype addend = utils::sign_extend<11>((val & 0x07ff) << 1); - Reltype x = (psymval->value(object, addend) - address); - elfcpp::Swap<16, big_endian>::writeval(wv, (val & 0xf800) | ((x & 0x0ffe) >> 1)); - return (utils::has_overflow<11>(x) + int32_t addend = utils::sign_extend<11>((val & 0x07ff) << 1); + int32_t x = (psymval->value(object, addend) - address); + elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800) + | ((x & 0x0ffe) >> 1))); + // We do a 12-bit overflow check because x is right-shifted by 1 bit. + return (utils::has_overflow<12>(x) ? This::STATUS_OVERFLOW : This::STATUS_OKAY); } @@ -3421,18 +3448,17 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_PREL: (S + A) | T - P static inline typename This::Status prel31(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address address, Arm_address thumb_bit) { - typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; - Valtype* wv = reinterpret_cast(view); - Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); + typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; + Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view); Valtype addend = utils::sign_extend<31>(val); Valtype x = (psymval->value(object, addend) | thumb_bit) - address; val = utils::bit_select(val, x, 0x7fffffffU); - elfcpp::Swap<32, big_endian>::writeval(wv, val); + elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val); return (utils::has_overflow<31>(x) ? This::STATUS_OVERFLOW : This::STATUS_OKAY); } @@ -3443,7 +3469,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_MOVW_BREL: ((S + A) | T) - B(S) static inline typename This::Status movw(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address relative_address_base, Arm_address thumb_bit, @@ -3467,7 +3493,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_MOVT_BREL: S + A - B(S) static inline typename This::Status movt(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address relative_address_base) { @@ -3488,7 +3514,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S) static inline typename This::Status thm_movw(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address relative_address_base, Arm_address thumb_bit, @@ -3515,7 +3541,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_THM_MOVT_BREL: S + A - B(S) static inline typename This::Status thm_movt(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address relative_address_base) { @@ -3535,7 +3561,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32) static inline typename This::Status thm_alu11(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address address, Arm_address thumb_bit) @@ -3589,7 +3615,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_THM_PC8: S + A - Pa (Thumb) static inline typename This::Status thm_pc8(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address address) { @@ -3611,7 +3637,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_THM_PC12: S + A - Pa (Thumb32) static inline typename This::Status thm_pc12(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, Arm_address address) { @@ -3696,7 +3722,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S) static inline typename This::Status arm_grp_alu(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, const int group, Arm_address address, @@ -3753,7 +3779,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_LDR_SB_G2: S + A - B(S) static inline typename This::Status arm_grp_ldr(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, const int group, Arm_address address) @@ -3791,7 +3817,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_LDRS_SB_G2: S + A - B(S) static inline typename This::Status arm_grp_ldrs(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, const int group, Arm_address address) @@ -3829,7 +3855,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian> // R_ARM_LDC_SB_G2: S + A - B(S) static inline typename This::Status arm_grp_ldc(unsigned char* view, - const Sized_relobj<32, big_endian>* object, + const Sized_relobj_file<32, big_endian>* object, const Symbol_value<32>* psymval, const int group, Arm_address address) @@ -3943,7 +3969,7 @@ Arm_relocate_functions::arm_branch_common( // We need a stub if the branch offset is too large or if we need // to switch mode. - bool may_use_blx = arm_target->may_use_blx(); + bool may_use_blx = arm_target->may_use_v5t_interworking(); Reloc_stub* stub = NULL; if (!parameters->options().relocatable() @@ -4074,7 +4100,7 @@ Arm_relocate_functions::thumb_branch_common( Arm_address branch_target = psymval->value(object, addend); // For BLX, bit 1 of target address comes from bit 1 of base address. - bool may_use_blx = arm_target->may_use_blx(); + bool may_use_blx = arm_target->may_use_v5t_interworking(); if (thumb_bit == 0 && may_use_blx) branch_target = utils::bit_select(branch_target, address, 0x2); @@ -4457,7 +4483,7 @@ Reloc_stub::stub_type_for_reloc( { const Target_arm* big_endian_target = Target_arm::default_target(); - may_use_blx = big_endian_target->may_use_blx(); + may_use_blx = big_endian_target->may_use_v5t_interworking(); should_force_pic_veneer = big_endian_target->should_force_pic_veneer(); thumb2 = big_endian_target->using_thumb2(); thumb_only = big_endian_target->using_thumb_only(); @@ -4466,7 +4492,7 @@ Reloc_stub::stub_type_for_reloc( { const Target_arm* little_endian_target = Target_arm::default_target(); - may_use_blx = little_endian_target->may_use_blx(); + may_use_blx = little_endian_target->may_use_v5t_interworking(); should_force_pic_veneer = little_endian_target->should_force_pic_veneer(); thumb2 = little_endian_target->using_thumb2(); thumb_only = little_endian_target->using_thumb_only(); @@ -5212,8 +5238,7 @@ Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of) const section_size_type oview_size = 8; unsigned char* const oview = of->get_output_view(offset, oview_size); - typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; - Valtype* wv = reinterpret_cast(oview); + typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; Output_section* os = this->relobj_->output_section(this->shndx_); gold_assert(os != NULL); @@ -5254,8 +5279,10 @@ Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of) uint32_t prel31_offset = output_address - this->address(); if (utils::has_overflow<31>(offset)) gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry")); - elfcpp::Swap<32, big_endian>::writeval(wv, prel31_offset & 0x7fffffffU); - elfcpp::Swap<32, big_endian>::writeval(wv + 1, elfcpp::EXIDX_CANTUNWIND); + elfcpp::Swap_unaligned<32, big_endian>::writeval(oview, + prel31_offset & 0x7fffffffU); + elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4, + elfcpp::EXIDX_CANTUNWIND); of->write_output_view(this->offset(), oview_size, oview); } @@ -5797,8 +5824,7 @@ Arm_output_section::append_text_sections_to_list( { // We only care about plain or relaxed input sections. We also // ignore any merged sections. - if ((p->is_input_section() || p->is_relaxed_input_section()) - && p->data_size() != 0) + if (p->is_input_section() || p->is_relaxed_input_section()) list->push_back(Text_section_list::value_type(p->relobj(), p->shndx())); } @@ -6336,7 +6362,7 @@ Arm_relobj::scan_sections_for_stubs( // do_count_local_symbol in parent and scan local symbols to mark // THUMB functions. This is not the most efficient way but I do not want to // slow down other ports by calling a per symbol target hook inside -// Sized_relobj::do_count_local_symbols. +// Sized_relobj_file::do_count_local_symbols. template void @@ -6348,7 +6374,7 @@ Arm_relobj::do_count_local_symbols( // STT_ARM_TFUNC. // Ask parent to count the local symbols. - Sized_relobj<32, big_endian>::do_count_local_symbols(pool, dynpool); + Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool); const unsigned int loccount = this->local_symbol_count(); if (loccount == 0) return; @@ -6396,7 +6422,7 @@ Arm_relobj::do_count_local_symbols( // Skip the first dummy symbol. psyms += sym_size; - typename Sized_relobj<32, big_endian>::Local_values* plocal_values = + typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values = this->local_values(); for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) { @@ -6439,11 +6465,11 @@ Arm_relobj::do_relocate_sections( const Layout* layout, const unsigned char* pshdrs, Output_file* of, - typename Sized_relobj<32, big_endian>::Views* pviews) + typename Sized_relobj_file<32, big_endian>::Views* pviews) { // Call parent to relocate sections. - Sized_relobj<32, big_endian>::do_relocate_sections(symtab, layout, pshdrs, - of, pviews); + Sized_relobj_file<32, big_endian>::do_relocate_sections(symtab, layout, + pshdrs, of, pviews); // We do not generate stubs if doing a relocatable link. if (parameters->options().relocatable()) @@ -6679,7 +6705,7 @@ void Arm_relobj::do_read_symbols(Read_symbols_data* sd) { // Call parent class to read symbol information. - Sized_relobj<32, big_endian>::do_read_symbols(sd); + Sized_relobj_file<32, big_endian>::do_read_symbols(sd); // If this input file is a binary file, it has no processor // specific flags and attributes section. @@ -6839,7 +6865,7 @@ Arm_relobj::do_gc_process_relocs(Symbol_table* symtab, Read_relocs_data* rd) { // First, call base class method to process relocations in this object. - Sized_relobj<32, big_endian>::do_gc_process_relocs(symtab, layout, rd); + Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd); // If --gc-sections is not specified, there is nothing more to do. // This happens when --icf is used but --gc-sections is not. @@ -6904,7 +6930,7 @@ Arm_relobj::update_output_local_symbol_count() // Loop over the local symbols. - typedef typename Sized_relobj<32, big_endian>::Output_sections + typedef typename Sized_relobj_file<32, big_endian>::Output_sections Output_sections; const Output_sections& out_sections(this->output_sections()); unsigned int shnum = this->shnum(); @@ -7085,7 +7111,7 @@ template void Arm_output_data_got::add_tls_gd32_with_static_reloc( unsigned int got_type, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int index) { if (object->local_has_got_offset(index, got_type)) @@ -7134,7 +7160,7 @@ Arm_output_data_got::do_write(Output_file* of) Arm_address value; if (!reloc.symbol_is_global()) { - Sized_relobj<32, big_endian>* object = reloc.relobj(); + Sized_relobj_file<32, big_endian>* object = reloc.relobj(); const Symbol_value<32>* psymval = reloc.relobj()->local_symbol(reloc.index()); @@ -7532,7 +7558,7 @@ unsigned int Target_arm::got_mod_index_entry( Symbol_table* symtab, Layout* layout, - Sized_relobj<32, big_endian>* object) + Sized_relobj_file<32, big_endian>* object) { if (this->got_mod_index_offset_ == -1U) { @@ -7698,7 +7724,7 @@ Target_arm::Scan::get_reference_flags(unsigned int r_type) template void Target_arm::Scan::unsupported_reloc_local( - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int r_type) { gold_error(_("%s: unsupported reloc %u against local symbol"), @@ -7766,7 +7792,7 @@ inline void Target_arm::Scan::local(Symbol_table* symtab, Layout* layout, Target_arm* target, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rel<32, big_endian>& reloc, @@ -8070,7 +8096,7 @@ Target_arm::Scan::local(Symbol_table* symtab, template void Target_arm::Scan::unsupported_reloc_global( - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int r_type, Symbol* gsym) { @@ -8112,7 +8138,7 @@ Target_arm::Scan::local_reloc_may_be_function_pointer( Symbol_table*, Layout*, Target_arm* target, - Sized_relobj<32, big_endian>*, + Sized_relobj_file<32, big_endian>*, unsigned int, Output_section*, const elfcpp::Rel<32, big_endian>&, @@ -8129,7 +8155,7 @@ Target_arm::Scan::global_reloc_may_be_function_pointer( Symbol_table*, Layout*, Target_arm* target, - Sized_relobj<32, big_endian>*, + Sized_relobj_file<32, big_endian>*, unsigned int, Output_section*, const elfcpp::Rel<32, big_endian>&, @@ -8151,7 +8177,7 @@ inline void Target_arm::Scan::global(Symbol_table* symtab, Layout* layout, Target_arm* target, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rel<32, big_endian>& reloc, @@ -8480,17 +8506,18 @@ Target_arm::Scan::global(Symbol_table* symtab, template void -Target_arm::gc_process_relocs(Symbol_table* symtab, - Layout* layout, - Sized_relobj<32, big_endian>* object, - unsigned int data_shndx, - unsigned int, - const unsigned char* prelocs, - size_t reloc_count, - Output_section* output_section, - bool needs_special_offset_handling, - size_t local_symbol_count, - const unsigned char* plocal_symbols) +Target_arm::gc_process_relocs( + Symbol_table* symtab, + Layout* layout, + Sized_relobj_file<32, big_endian>* object, + unsigned int data_shndx, + unsigned int, + const unsigned char* prelocs, + size_t reloc_count, + Output_section* output_section, + bool needs_special_offset_handling, + size_t local_symbol_count, + const unsigned char* plocal_symbols) { typedef Target_arm Arm; typedef typename Target_arm::Scan Scan; @@ -8516,7 +8543,7 @@ template void Target_arm::scan_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -8596,12 +8623,8 @@ Target_arm::do_finalize_sections( if (this->attributes_section_data_ == NULL) this->attributes_section_data_ = new Attributes_section_data(NULL, 0); - // Check BLX use. const Object_attribute* cpu_arch_attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); - if (cpu_arch_attr->int_value() > elfcpp::TAG_CPU_ARCH_V4) - this->set_may_use_blx(true); - // Check if we need to use Cortex-A8 workaround. if (parameters->options().user_set_fix_cortex_a8()) this->fix_cortex_a8_ = parameters->options().fix_cortex_a8(); @@ -8622,7 +8645,7 @@ Target_arm::do_finalize_sections( // The V4BX interworking stub contains BX instruction, // which is not specified for some profiles. if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING - && !this->may_use_blx()) + && !this->may_use_v4t_interworking()) gold_error(_("unable to provide V4BX reloc interworking fix up; " "the target profile does not support BX instruction")); @@ -9291,7 +9314,7 @@ Target_arm::Relocate::relocate_tls( typedef Relocate_functions<32, big_endian> RelocFuncs; Output_segment* tls_segment = relinfo->layout->tls_segment(); - const Sized_relobj<32, big_endian>* object = relinfo->object; + const Sized_relobj_file<32, big_endian>* object = relinfo->object; elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0); @@ -9325,7 +9348,7 @@ Target_arm::Relocate::relocate_tls( // Relocate the field with the PC relative offset of the pair of // GOT entries. - RelocFuncs::pcrel32(view, got_entry, address); + RelocFuncs::pcrel32_unaligned(view, got_entry, address); return ArmRelocFuncs::STATUS_OKAY; } } @@ -9344,13 +9367,13 @@ Target_arm::Relocate::relocate_tls( // Relocate the field with the PC relative offset of the pair of // GOT entries. - RelocFuncs::pcrel32(view, got_entry, address); + RelocFuncs::pcrel32_unaligned(view, got_entry, address); return ArmRelocFuncs::STATUS_OKAY; } break; case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic - RelocFuncs::rel32(view, value); + RelocFuncs::rel32_unaligned(view, value); return ArmRelocFuncs::STATUS_OKAY; case elfcpp::R_ARM_TLS_IE32: // Initial-exec @@ -9379,7 +9402,7 @@ Target_arm::Relocate::relocate_tls( target->got_plt_section()->address() + got_offset; // Relocate the field with the PC relative offset of the GOT entry. - RelocFuncs::pcrel32(view, got_entry, address); + RelocFuncs::pcrel32_unaligned(view, got_entry, address); return ArmRelocFuncs::STATUS_OKAY; } break; @@ -9395,7 +9418,7 @@ Target_arm::Relocate::relocate_tls( // need to add TCB size to the offset. Arm_address aligned_tcb_size = align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment()); - RelocFuncs::rel32(view, value + aligned_tcb_size); + RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size); } return ArmRelocFuncs::STATUS_OKAY; @@ -9497,7 +9520,7 @@ void Target_arm::scan_relocatable_relocs( Symbol_table* symtab, Layout* layout, - Sized_relobj<32, big_endian>* object, + Sized_relobj_file<32, big_endian>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -9973,9 +9996,9 @@ Target_arm::do_adjust_elf_header( } // do_make_elf_object to override the same function in the base class. -// We need to use a target-specific sub-class of Sized_relobj<32, big_endian> -// to store ARM specific information. Hence we need to have our own -// ELF object creation. +// We need to use a target-specific sub-class of +// Sized_relobj_file<32, big_endian> to store ARM specific information. +// Hence we need to have our own ELF object creation. template Object* @@ -9985,7 +10008,10 @@ Target_arm::do_make_elf_object( off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr) { int et = ehdr.get_e_type(); - if (et == elfcpp::ET_REL) + // ET_EXEC files are valid input for --just-symbols/-R, + // and we treat them as relocatable objects. + if (et == elfcpp::ET_REL + || (et == elfcpp::ET_EXEC && input_file->just_symbols())) { Arm_relobj* obj = new Arm_relobj(name, input_file, offset, ehdr); @@ -10195,7 +10221,7 @@ Target_arm::tag_cpu_arch_combine( // Check we've not got a higher architecture than we know about. - if (oldtag >= elfcpp::MAX_TAG_CPU_ARCH || newtag >= elfcpp::MAX_TAG_CPU_ARCH) + if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH) { gold_error(_("%s: unknown CPU architecture"), name); return -1; @@ -11185,7 +11211,7 @@ Target_arm::scan_reloc_section_for_stubs( // symbol. if (!is_defined_in_discarded_section) { - typedef Sized_relobj<32, big_endian> ObjType; + typedef Sized_relobj_file<32, big_endian> ObjType; typename ObjType::Compute_final_local_value_status status = arm_object->compute_final_local_value(r_sym, psymval, &symval, relinfo->symtab); @@ -11789,7 +11815,7 @@ Target_arm::scan_span_for_cortex_a8_erratum( // an ARM instruction. If we were not making a stub, // the BL would have been converted to a BLX. Use the // BLX stub instead in that case. - if (this->may_use_blx() && force_target_arm + if (this->may_use_v5t_interworking() && force_target_arm && stub_type == arm_stub_a8_veneer_bl) { stub_type = arm_stub_a8_veneer_blx; @@ -11895,7 +11921,8 @@ class Target_selector_arm : public Target_selector public: Target_selector_arm() : Target_selector(elfcpp::EM_ARM, 32, big_endian, - (big_endian ? "elf32-bigarm" : "elf32-littlearm")) + (big_endian ? "elf32-bigarm" : "elf32-littlearm"), + (big_endian ? "armelfb" : "armelf")) { } Target* diff --git a/gold/binary.cc b/gold/binary.cc index f14df0d..6cc99a9 100644 --- a/gold/binary.cc +++ b/gold/binary.cc @@ -132,7 +132,11 @@ Binary_to_elf::sized_convert(const Task* task) } section_size_type filesize = convert_to_section_size_type(f.filesize()); - const unsigned char* fileview = f.get_view(0, 0, filesize, false, false); + const unsigned char* fileview; + if (filesize == 0) + fileview = NULL; + else + fileview = f.get_view(0, 0, filesize, false, false); unsigned int align; if (size == 32) @@ -223,10 +227,13 @@ Binary_to_elf::sized_convert(const Task* task) shstrtab.get_strtab_size(), 0, 0, 1, 0, &pout); - memcpy(pout, fileview, filesize); - pout += filesize; - memset(pout, 0, aligned_filesize - filesize); - pout += aligned_filesize - filesize; + if (filesize > 0) + { + memcpy(pout, fileview, filesize); + pout += filesize; + memset(pout, 0, aligned_filesize - filesize); + pout += aligned_filesize - filesize; + } this->write_symbol("", &strtab, 0, 0, &pout); this->write_symbol(start_symbol_name, &strtab, 0, 1, diff --git a/gold/common.cc b/gold/common.cc index 6acd2b5..1a9aea8 100644 --- a/gold/common.cc +++ b/gold/common.cc @@ -286,12 +286,23 @@ Symbol_table::do_allocate_commons_list( gold_unreachable(); } - Output_data_space* poc = new Output_data_space(addralign, ds_name); - Output_section* os = layout->add_output_section_data(name, - elfcpp::SHT_NOBITS, - flags, poc, - ORDER_INVALID, - false); + Output_data_space* poc; + Output_section* os; + + if (!parameters->incremental_update()) + { + poc = new Output_data_space(addralign, ds_name); + os = layout->add_output_section_data(name, elfcpp::SHT_NOBITS, flags, + poc, ORDER_INVALID, false); + } + else + { + // When doing an incremental update, we need to allocate each common + // directly from the output section's free list. + poc = NULL; + os = layout->find_output_section(name); + } + if (os != NULL) { if (commons_section_type == COMMONS_SMALL) @@ -329,12 +340,26 @@ Symbol_table::do_allocate_commons_list( if (mapfile != NULL) mapfile->report_allocate_common(sym, ssym->symsize()); - off = align_address(off, ssym->value()); - ssym->allocate_common(poc, off); - off += ssym->symsize(); + if (poc != NULL) + { + off = align_address(off, ssym->value()); + ssym->allocate_common(poc, off); + off += ssym->symsize(); + } + else + { + // For an incremental update, allocate from the free list. + off = os->allocate(ssym->symsize(), ssym->value()); + if (off == -1) + gold_fallback(_("out of patch space in section %s; " + "relink with --incremental-full"), + os->name()); + ssym->allocate_common(os, off); + } } - poc->set_current_data_size(off); + if (poc != NULL) + poc->set_current_data_size(off); commons->clear(); } diff --git a/gold/configure b/gold/configure index 5a7268d..e0a91f8 100755 --- a/gold/configure +++ b/gold/configure @@ -602,11 +602,11 @@ LFS_CFLAGS WARN_CXXFLAGS NO_WERROR WARN_CFLAGS +IFUNC_STATIC_FALSE +IFUNC_STATIC_TRUE IFUNC_FALSE IFUNC_TRUE RANDOM_SEED_CFLAGS -CONSTRUCTOR_PRIORITY_FALSE -CONSTRUCTOR_PRIORITY_TRUE TLS_DESCRIPTORS_FALSE TLS_DESCRIPTORS_TRUE TLS_GNU2_DIALECT_FALSE @@ -621,6 +621,8 @@ MCMODEL_MEDIUM_FALSE MCMODEL_MEDIUM_TRUE FN_PTRS_IN_SO_WITHOUT_PIC_FALSE FN_PTRS_IN_SO_WITHOUT_PIC_TRUE +HAVE_STATIC_FALSE +HAVE_STATIC_TRUE NATIVE_OR_CROSS_LINKER_FALSE NATIVE_OR_CROSS_LINKER_TRUE GCC_FALSE @@ -671,6 +673,7 @@ CPPFLAGS LDFLAGS CFLAGS CC +NM TARGETOBJS DEFAULT_TARGET_X86_64_FALSE DEFAULT_TARGET_X86_64_TRUE @@ -3526,6 +3529,99 @@ cat >>confdefs.h <<_ACEOF _ACEOF +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}nm", so it can be a program name with args. +set dummy ${ac_tool_prefix}nm; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_NM+set}" = set; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$NM"; then + ac_cv_prog_NM="$NM" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_NM="${ac_tool_prefix}nm" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +NM=$ac_cv_prog_NM +if test -n "$NM"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $NM" >&5 +$as_echo "$NM" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_NM"; then + ac_ct_NM=$NM + # Extract the first word of "nm", so it can be a program name with args. +set dummy nm; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_ac_ct_NM+set}" = set; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_NM"; then + ac_cv_prog_ac_ct_NM="$ac_ct_NM" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_NM="nm" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_NM=$ac_cv_prog_ac_ct_NM +if test -n "$ac_ct_NM"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_NM" >&5 +$as_echo "$ac_ct_NM" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_NM" = x; then + NM="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + NM=$ac_ct_NM + fi +else + NM="$ac_cv_prog_NM" +fi + + ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' @@ -6106,6 +6202,45 @@ else fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether static linking works" >&5 +$as_echo_n "checking whether static linking works... " >&6; } +if test "${gold_cv_lib_static+set}" = set; then : + $as_echo_n "(cached) " >&6 +else + LDFLAGS_hold=$LDFLAGS +LDFLAGS="$LDFLAGS -static" +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +void f() { } +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + gold_cv_lib_static=yes +else + gold_cv_lib_static=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LDFLAGS=$LDFLAGS_hold +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gold_cv_lib_static" >&5 +$as_echo "$gold_cv_lib_static" >&6; } + if test "$gold_cv_lib_static" = "yes"; then + HAVE_STATIC_TRUE= + HAVE_STATIC_FALSE='#' +else + HAVE_STATIC_TRUE='#' + HAVE_STATIC_FALSE= +fi + + if case $target_cpu in i?86) true;; @@ -6314,34 +6449,6 @@ else fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for constructor priorities" >&5 -$as_echo_n "checking for constructor priorities... " >&6; } -if test "${gold_cv_c_conprio+set}" = set; then : - $as_echo_n "(cached) " >&6 -else - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ -void f() __attribute__ ((constructor (1))); -_ACEOF -if ac_fn_c_try_compile "$LINENO"; then : - gold_cv_c_conprio=yes -else - gold_cv_c_conprio=no -fi -rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gold_cv_c_conprio" >&5 -$as_echo "$gold_cv_c_conprio" >&6; } - - if test "$gold_cv_c_conprio" = "yes"; then - CONSTRUCTOR_PRIORITY_TRUE= - CONSTRUCTOR_PRIORITY_FALSE='#' -else - CONSTRUCTOR_PRIORITY_TRUE='#' - CONSTRUCTOR_PRIORITY_FALSE= -fi - - { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -frandom-seed support" >&5 $as_echo_n "checking for -frandom-seed support... " >&6; } if test "${gold_cv_c_random_seed+set}" = set; then : @@ -6370,12 +6477,14 @@ if test "$gold_cv_c_random_seed" = "yes"; then fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for glibc >= 2.11" >&5 -$as_echo_n "checking for glibc >= 2.11... " >&6; } -if test "${gold_cv_lib_glibc2_11+set}" = set; then : +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for glibc ifunc support" >&5 +$as_echo_n "checking for glibc ifunc support... " >&6; } +if test "${gold_cv_lib_glibc_ifunc+set}" = set; then : $as_echo_n "(cached) " >&6 else - cat confdefs.h - <<_ACEOF >conftest.$ac_ext + save_LDFLAGS="$LDFLAGS" +LDFLAGS="$LDFLAGS -static" +cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ #include @@ -6384,20 +6493,39 @@ error #elif __GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ < 11) error #endif -__asm__(".type foo, %gnu_indirect_function"); +void func (void) { } +void invoke (void); +__asm__(".type invoke, %gnu_indirect_function"); +typedef void (*funcptr) (void); +funcptr dispatch (void) __asm__ ("invoke"); +funcptr dispatch (void) { return &func; } +int +main () +{ +invoke(); + ; + return 0; +} _ACEOF -if ac_fn_c_try_compile "$LINENO"; then : - gold_cv_lib_glibc2_11=yes +if ac_fn_c_try_link "$LINENO"; then : + +if ${NM} conftest$EXEEXT | grep "__rela\?_iplt_start" >/dev/null 2>&1; then + gold_cv_lib_glibc_ifunc=both else - gold_cv_lib_glibc2_11=no + gold_cv_lib_glibc_ifunc=dyn fi -rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +else + gold_cv_lib_glibc_ifunc=no fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gold_cv_lib_glibc2_11" >&5 -$as_echo "$gold_cv_lib_glibc2_11" >&6; } +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LDFLAGS="$save_LDFLAGS" +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gold_cv_lib_glibc_ifunc" >&5 +$as_echo "$gold_cv_lib_glibc_ifunc" >&6; } - if test "$gold_cv_lib_glibc2_11" = "yes"; then + if test "$gold_cv_lib_glibc_ifunc" != "no"; then IFUNC_TRUE= IFUNC_FALSE='#' else @@ -6405,6 +6533,14 @@ else IFUNC_FALSE= fi + if test "$gold_cv_lib_glibc_ifunc" = "both"; then + IFUNC_STATIC_TRUE= + IFUNC_STATIC_FALSE='#' +else + IFUNC_STATIC_TRUE='#' + IFUNC_STATIC_FALSE= +fi + GCC_WARN_CFLAGS="-W -Wall -Wstrict-prototypes -Wmissing-prototypes" @@ -7306,6 +7442,10 @@ if test -z "${NATIVE_OR_CROSS_LINKER_TRUE}" && test -z "${NATIVE_OR_CROSS_LINKER as_fn_error "conditional \"NATIVE_OR_CROSS_LINKER\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi +if test -z "${HAVE_STATIC_TRUE}" && test -z "${HAVE_STATIC_FALSE}"; then + as_fn_error "conditional \"HAVE_STATIC\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi if test -z "${FN_PTRS_IN_SO_WITHOUT_PIC_TRUE}" && test -z "${FN_PTRS_IN_SO_WITHOUT_PIC_FALSE}"; then as_fn_error "conditional \"FN_PTRS_IN_SO_WITHOUT_PIC\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 @@ -7334,14 +7474,14 @@ if test -z "${TLS_DESCRIPTORS_TRUE}" && test -z "${TLS_DESCRIPTORS_FALSE}"; then as_fn_error "conditional \"TLS_DESCRIPTORS\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi -if test -z "${CONSTRUCTOR_PRIORITY_TRUE}" && test -z "${CONSTRUCTOR_PRIORITY_FALSE}"; then - as_fn_error "conditional \"CONSTRUCTOR_PRIORITY\" was never defined. -Usually this means the macro was only invoked conditionally." "$LINENO" 5 -fi if test -z "${IFUNC_TRUE}" && test -z "${IFUNC_FALSE}"; then as_fn_error "conditional \"IFUNC\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi +if test -z "${IFUNC_STATIC_TRUE}" && test -z "${IFUNC_STATIC_FALSE}"; then + as_fn_error "conditional \"IFUNC_STATIC\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi if test -z "${HAVE_ZLIB_TRUE}" && test -z "${HAVE_ZLIB_FALSE}"; then as_fn_error "conditional \"HAVE_ZLIB\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 diff --git a/gold/configure.ac b/gold/configure.ac index 7757d8c..685e85b 100644 --- a/gold/configure.ac +++ b/gold/configure.ac @@ -238,6 +238,8 @@ AC_DEFINE_UNQUOTED(GOLD_DEFAULT_BIG_ENDIAN, $default_big_endian, AC_DEFINE_UNQUOTED(GOLD_DEFAULT_OSABI, $default_osabi, [Default OSABI code]) +AC_CHECK_TOOL(NM, nm) + AC_PROG_CC AC_PROG_CXX AC_PROG_YACC @@ -261,6 +263,18 @@ AM_CONDITIONAL(GCC, test "$GCC" = yes) AM_CONDITIONAL(NATIVE_OR_CROSS_LINKER, test "x$target_alias" = "x" -o "x$host_alias" = "x$target_alias" -o "x$host_alias" = "x$build_alias") +dnl Test for whether static linking is supported. Some systems do not +dnl install static libraries. This only affects the set of tests that +dnl we run. +AC_CACHE_CHECK([whether static linking works], [gold_cv_lib_static], +[LDFLAGS_hold=$LDFLAGS +LDFLAGS="$LDFLAGS -static" +AC_LINK_IFELSE([ +AC_LANG_PROGRAM([[void f() { }]])], +[gold_cv_lib_static=yes], [gold_cv_lib_static=no]) +LDFLAGS=$LDFLAGS_hold]) +AM_CONDITIONAL(HAVE_STATIC, test "$gold_cv_lib_static" = "yes") + dnl Some architectures do not support taking pointers of functions dnl defined in shared libraries except in -fPIC mode. We need to dnl tell the unittest framework if we're compiling for one of those @@ -346,14 +360,6 @@ error AM_CONDITIONAL(TLS_DESCRIPTORS, test "$gold_cv_lib_glibc29" = "yes") -dnl Check whether the compiler supports constructor priorities in -dnl attributes, which were added in gcc 4.3. -AC_CACHE_CHECK([for constructor priorities], [gold_cv_c_conprio], -[AC_COMPILE_IFELSE([void f() __attribute__ ((constructor (1)));], -[gold_cv_c_conprio=yes], [gold_cv_c_conprio=no])]) - -AM_CONDITIONAL(CONSTRUCTOR_PRIORITY, test "$gold_cv_c_conprio" = "yes") - dnl Test for the -frandom-seed option. AC_CACHE_CHECK([for -frandom-seed support], [gold_cv_c_random_seed], [save_CFLAGS="$CFLAGS" @@ -370,18 +376,33 @@ AC_SUBST(RANDOM_SEED_CFLAGS) dnl On GNU/Linux ifunc is supported by the dynamic linker in glibc dnl 2.11 or later, and by binutils 2.20.1 or later. -AC_CACHE_CHECK([for glibc >= 2.11], [gold_cv_lib_glibc2_11], -[AC_COMPILE_IFELSE([ +AC_CACHE_CHECK([for glibc ifunc support], [gold_cv_lib_glibc_ifunc], +[save_LDFLAGS="$LDFLAGS" +LDFLAGS="$LDFLAGS -static" +AC_LINK_IFELSE([AC_LANG_PROGRAM([[ #include #if !defined __GLIBC__ error #elif __GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ < 11) error #endif -__asm__(".type foo, %gnu_indirect_function"); -], [gold_cv_lib_glibc2_11=yes], [gold_cv_lib_glibc2_11=no])]) +void func (void) { } +void invoke (void); +__asm__(".type invoke, %gnu_indirect_function"); +typedef void (*funcptr) (void); +funcptr dispatch (void) __asm__ ("invoke"); +funcptr dispatch (void) { return &func; }]], +[[invoke();]]) +], [ +if ${NM} conftest$EXEEXT | grep "__rela\?_iplt_start" >/dev/null 2>&1; then + gold_cv_lib_glibc_ifunc=both +else + gold_cv_lib_glibc_ifunc=dyn +fi], [gold_cv_lib_glibc_ifunc=no]) +LDFLAGS="$save_LDFLAGS"]) -AM_CONDITIONAL(IFUNC, test "$gold_cv_lib_glibc2_11" = "yes") +AM_CONDITIONAL(IFUNC, test "$gold_cv_lib_glibc_ifunc" != "no") +AM_CONDITIONAL(IFUNC_STATIC, test "$gold_cv_lib_glibc_ifunc" = "both") AM_BINUTILS_WARNINGS diff --git a/gold/copy-relocs.cc b/gold/copy-relocs.cc index 4931aa0..20b110d 100644 --- a/gold/copy-relocs.cc +++ b/gold/copy-relocs.cc @@ -58,14 +58,14 @@ Copy_relocs::copy_reloc( Symbol_table* symtab, Layout* layout, Sized_symbol* sym, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int shndx, Output_section* output_section, const Reloc& rel, Output_data_reloc* reloc_section) { if (this->need_copy_reloc(sym, object, shndx)) - this->emit_copy_reloc(symtab, layout, sym, reloc_section); + this->make_copy_reloc(symtab, layout, sym, reloc_section); else { // We may not need a COPY relocation. Save this relocation to @@ -81,7 +81,7 @@ template bool Copy_relocs::need_copy_reloc( Sized_symbol* sym, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int shndx) const { if (!parameters->options().copyreloc()) @@ -106,6 +106,24 @@ template void Copy_relocs::emit_copy_reloc( Symbol_table* symtab, + Sized_symbol* sym, + Output_data* posd, + off_t offset, + Output_data_reloc* reloc_section) +{ + // Define the symbol as being copied. + symtab->define_with_copy_reloc(sym, posd, offset); + + // Add the COPY relocation to the dynamic reloc section. + reloc_section->add_global(sym, this->copy_reloc_type_, posd, offset, 0); +} + +// Make a COPY relocation for SYM and emit it. + +template +void +Copy_relocs::make_copy_reloc( + Symbol_table* symtab, Layout* layout, Sized_symbol* sym, Output_data_reloc* reloc_section) @@ -164,24 +182,7 @@ Copy_relocs::emit_copy_reloc( section_size_type offset = dynbss_size; dynbss->set_current_data_size(dynbss_size + symsize); - // Define the symbol as being copied. - symtab->define_with_copy_reloc(sym, dynbss, offset); - - // Add the COPY relocation to the dynamic reloc section. - this->add_copy_reloc(sym, offset, reloc_section); -} - -// Add a COPY relocation for SYM to RELOC_SECTION. - -template -void -Copy_relocs::add_copy_reloc( - Symbol* sym, - section_size_type offset, - Output_data_reloc* reloc_section) -{ - reloc_section->add_global(sym, this->copy_reloc_type_, this->dynbss_, - offset, 0); + this->emit_copy_reloc(symtab, sym, dynbss, offset, reloc_section); } // Save a relocation to possibly be emitted later. @@ -190,7 +191,7 @@ template void Copy_relocs::save( Symbol* sym, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int shndx, Output_section* output_section, const Reloc& rel) diff --git a/gold/copy-relocs.h b/gold/copy-relocs.h index 2fe6a24..d1e2323 100644 --- a/gold/copy-relocs.h +++ b/gold/copy-relocs.h @@ -66,7 +66,7 @@ class Copy_relocs // section is where the dynamic relocs are put. void copy_reloc(Symbol_table*, Layout*, Sized_symbol* sym, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int shndx, Output_section* output_section, const Reloc& rel, Output_data_reloc*); @@ -81,6 +81,12 @@ class Copy_relocs void emit(Output_data_reloc*); + // Emit a COPY reloc. + void + emit_copy_reloc(Symbol_table*, Sized_symbol*, + Output_data*, off_t, + Output_data_reloc*); + private: typedef typename elfcpp::Elf_types::Elf_Addr Address; typedef typename elfcpp::Elf_types::Elf_Addr Addend; @@ -92,7 +98,7 @@ class Copy_relocs { public: Copy_reloc_entry(Symbol* sym, unsigned int reloc_type, - Sized_relobj* relobj, + Sized_relobj_file* relobj, unsigned int shndx, Output_section* output_section, Address address, Addend addend) @@ -110,7 +116,7 @@ class Copy_relocs private: Symbol* sym_; unsigned int reloc_type_; - Sized_relobj* relobj_; + Sized_relobj_file* relobj_; unsigned int shndx_; Output_section* output_section_; Address address_; @@ -123,22 +129,17 @@ class Copy_relocs // Return whether we need a COPY reloc. bool need_copy_reloc(Sized_symbol* gsym, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int shndx) const; - // Emit a COPY reloc. + // Make a new COPY reloc and emit it. void - emit_copy_reloc(Symbol_table*, Layout*, Sized_symbol*, + make_copy_reloc(Symbol_table*, Layout*, Sized_symbol*, Output_data_reloc*); - // Add a COPY reloc to the dynamic reloc section. - void - add_copy_reloc(Symbol*, section_size_type, - Output_data_reloc*); - // Save a reloc against SYM for possible emission later. void - save(Symbol*, Sized_relobj*, unsigned int shndx, + save(Symbol*, Sized_relobj_file*, unsigned int shndx, Output_section*, const Reloc& rel); // The target specific relocation type of the COPY relocation. diff --git a/gold/descriptors.cc b/gold/descriptors.cc index db8ad67..2ab0d5c 100644 --- a/gold/descriptors.cc +++ b/gold/descriptors.cc @@ -1,6 +1,6 @@ // descriptors.cc -- manage file descriptors for gold -// Copyright 2008, 2009 Free Software Foundation, Inc. +// Copyright 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -34,15 +34,24 @@ #include "descriptors.h" #include "binary-io.h" +// O_CLOEXEC is only available on newer systems. +#ifndef O_CLOEXEC +#define O_CLOEXEC 0 +#endif + // Very old systems may not define FD_CLOEXEC. #ifndef FD_CLOEXEC #define FD_CLOEXEC 1 #endif -// O_CLOEXEC is only available on newer systems. -#ifndef O_CLOEXEC -#define O_CLOEXEC 0 +static inline void +set_close_on_exec(int fd) +{ +// Mingw does not define F_SETFD. +#ifdef F_SETFD + fcntl(fd, F_SETFD, FD_CLOEXEC); #endif +} namespace gold { @@ -133,7 +142,7 @@ Descriptors::open(int descriptor, const char* name, int flags, int mode) if (O_CLOEXEC == 0 && parameters->options_valid() && parameters->options().has_plugins()) - fcntl(new_descriptor, F_SETFD, FD_CLOEXEC); + set_close_on_exec(new_descriptor); { Hold_optional_lock hl(this->lock_); diff --git a/gold/dirsearch.cc b/gold/dirsearch.cc index fac3b2c..1ae2055 100644 --- a/gold/dirsearch.cc +++ b/gold/dirsearch.cc @@ -1,6 +1,6 @@ // dirsearch.cc -- directory searching for gold -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -66,8 +66,9 @@ Dir_cache::read_files() DIR* d = opendir(this->dirname_); if (d == NULL) { - // We ignore directories which do not exist. - if (errno != ENOENT) + // We ignore directories which do not exist or are actually file + // names. + if (errno != ENOENT && errno != ENOTDIR) gold::gold_error(_("%s: can not read directory: %s"), this->dirname_, strerror(errno)); return; @@ -241,8 +242,9 @@ Dirsearch::initialize(Workqueue* workqueue, // File_read::open. std::string -Dirsearch::find(const std::string& n1, const std::string& n2, - bool* is_in_sysroot, int* pindex) const +Dirsearch::find(const std::vector& names, + bool* is_in_sysroot, int* pindex, + std::string *found_name) const { gold_assert(!this->token_.is_blocked()); gold_assert(*pindex >= 0); @@ -254,27 +256,20 @@ Dirsearch::find(const std::string& n1, const std::string& n2, const Search_directory* p = &this->directories_->at(i); Dir_cache* pdc = caches->lookup(p->name().c_str()); gold_assert(pdc != NULL); - if (pdc->find(n1)) + for (std::vector::const_iterator n = names.begin(); + n != names.end(); + ++n) { - *is_in_sysroot = p->is_in_sysroot(); - *pindex = i; - return p->name() + '/' + n1; - } - else - gold_debug(DEBUG_FILES, "Attempt to open %s/%s failed", - p->name().c_str(), n1.c_str()); - - if (!n2.empty()) - { - if (pdc->find(n2)) - { - *is_in_sysroot = p->is_in_sysroot(); + if (pdc->find(*n)) + { + *is_in_sysroot = p->is_in_sysroot(); *pindex = i; - return p->name() + '/' + n2; - } - else - gold_debug(DEBUG_FILES, "Attempt to open %s/%s failed", - p->name().c_str(), n2.c_str()); + *found_name = *n; + return p->name() + '/' + *n; + } + else + gold_debug(DEBUG_FILES, "Attempt to open %s/%s failed", + p->name().c_str(), (*n).c_str()); } } diff --git a/gold/dirsearch.h b/gold/dirsearch.h index 986d389..270cef6 100644 --- a/gold/dirsearch.h +++ b/gold/dirsearch.h @@ -1,6 +1,6 @@ // dirsearch.h -- directory searching for gold -*- C++ -*- -// Copyright 2006, 2007, 2008 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -59,8 +59,8 @@ class Dirsearch // and that value plus one may be used to find the next file with // the same name(s). std::string - find(const std::string&, const std::string& n2, bool* is_in_sysroot, - int* pindex) const; + find(const std::vector& names, bool* is_in_sysroot, + int* pindex, std::string *found_name) const; // Return the blocker token which controls access. Task_token* diff --git a/gold/dynobj.cc b/gold/dynobj.cc index 8ddb3f7..4404a35 100644 --- a/gold/dynobj.cc +++ b/gold/dynobj.cc @@ -1,6 +1,6 @@ // dynobj.cc -- dynamic object support for gold -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -1483,7 +1483,7 @@ Versions::record_version(const Symbol_table* symtab, if (!sym->is_from_dynobj() && !sym->is_copied_from_dynobj()) { if (parameters->options().shared()) - this->add_def(sym, version, version_key); + this->add_def(dynpool, sym, version, version_key); } else { @@ -1496,7 +1496,7 @@ Versions::record_version(const Symbol_table* symtab, // We've found a symbol SYM defined in version VERSION. void -Versions::add_def(const Symbol* sym, const char* version, +Versions::add_def(Stringpool* dynpool, const Symbol* sym, const char* version, Stringpool::Key version_key) { Key k(version_key, 0); @@ -1520,8 +1520,12 @@ Versions::add_def(const Symbol* sym, const char* version, // find a definition of a symbol with a version which is not // in the version script. if (parameters->options().shared()) - gold_error(_("symbol %s has undefined version %s"), - sym->demangled_name().c_str(), version); + { + gold_error(_("symbol %s has undefined version %s"), + sym->demangled_name().c_str(), version); + if (this->needs_base_version_) + this->define_base_version(dynpool); + } else // We only insert a base version for shared library. gold_assert(!this->needs_base_version_); diff --git a/gold/dynobj.h b/gold/dynobj.h index 7a626c0..186b67c 100644 --- a/gold/dynobj.h +++ b/gold/dynobj.h @@ -1,6 +1,6 @@ // dynobj.h -- dynamic object support for gold -*- C++ -*- -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -96,6 +96,11 @@ class Dynobj : public Object unsigned char** pphash, unsigned int* phashlen); protected: + // Return a pointer to this object. + virtual Dynobj* + do_dynobj() + { return this; } + // Set the DT_SONAME string. void set_soname_string(const char* s) @@ -156,7 +161,7 @@ template class Sized_dynobj : public Dynobj { public: - typedef typename Sized_relobj::Symbols Symbols; + typedef typename Sized_relobj_file::Symbols Symbols; Sized_dynobj(const std::string& name, Input_file* input_file, off_t offset, const typename elfcpp::Ehdr&); @@ -594,7 +599,8 @@ class Versions // Handle a symbol SYM defined with version VERSION. void - add_def(const Symbol* sym, const char* version, Stringpool::Key); + add_def(Stringpool*, const Symbol* sym, const char* version, + Stringpool::Key); // Add a reference to version NAME in file FILENAME. void @@ -647,7 +653,7 @@ class Versions // Contents of --version-script, if passed, or NULL. const Version_script_info& version_script_; // Whether we need to insert a base version. This is only used for - // shared libaries and is cleared when the base version is defined. + // shared libraries and is cleared when the base version is defined. bool needs_base_version_; }; diff --git a/gold/ehframe.cc b/gold/ehframe.cc index 2c470b0..dad2331 100644 --- a/gold/ehframe.cc +++ b/gold/ehframe.cc @@ -1,6 +1,6 @@ // ehframe.cc -- handle exception frame sections for gold -// Copyright 2006, 2007, 2008, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -266,7 +266,7 @@ Eh_frame_hdr::get_fde_pc( gold_unreachable(); } - switch (fde_encoding & 0xf0) + switch (fde_encoding & 0x70) { case 0: break; @@ -275,12 +275,18 @@ Eh_frame_hdr::get_fde_pc( pc += eh_frame_address + fde_offset + 8; break; + case elfcpp::DW_EH_PE_datarel: + pc += parameters->target().ehframe_datarel_base(); + break; + default: // If other cases arise, then we have to handle them, or we have // to reject them by returning false in Eh_frame::read_cie. gold_unreachable(); } + gold_assert((fde_encoding & elfcpp::DW_EH_PE_indirect) == 0); + return pc; } @@ -321,14 +327,16 @@ Eh_frame_hdr::get_fde_addresses(Output_file* of, // Write the FDE to OVIEW starting at OFFSET. CIE_OFFSET is the // offset of the CIE in OVIEW. FDE_ENCODING is the encoding, from the -// CIE. ADDRALIGN is the required alignment. Record the FDE pc for -// EH_FRAME_HDR. Return the new offset. +// CIE. ADDRALIGN is the required alignment. ADDRESS is the virtual +// address of OVIEW. Record the FDE pc for EH_FRAME_HDR. Return the +// new offset. template section_offset_type Fde::write(unsigned char* oview, section_offset_type offset, - unsigned int addralign, section_offset_type cie_offset, - unsigned char fde_encoding, Eh_frame_hdr* eh_frame_hdr) + uint64_t address, unsigned int addralign, + section_offset_type cie_offset, unsigned char fde_encoding, + Eh_frame_hdr* eh_frame_hdr) { gold_assert((offset & (addralign - 1)) == 0); @@ -355,6 +363,24 @@ Fde::write(unsigned char* oview, section_offset_type offset, // will later be applied to the FDE data. memcpy(oview + offset + 8, this->contents_.data(), length); + // If this FDE is associated with a PLT, fill in the PLT's address + // and size. + if (this->object_ == NULL) + { + gold_assert(memcmp(oview + offset + 8, "\0\0\0\0\0\0\0\0", 8) == 0); + Output_data* plt = this->u_.from_linker.plt; + uint64_t poffset = plt->address() - (address + offset + 8); + int32_t spoffset = static_cast(poffset); + off_t psize = plt->data_size(); + uint32_t upsize = static_cast(psize); + if (static_cast(static_cast(spoffset)) != poffset + || static_cast(upsize) != psize) + gold_warning(_("overflow in PLT unwind data; " + "unwinding through PLT may fail")); + elfcpp::Swap<32, big_endian>::writeval(oview + offset + 8, spoffset); + elfcpp::Swap<32, big_endian>::writeval(oview + offset + 12, upsize); + } + if (aligned_full_length > length + 8) memset(oview + offset + length + 8, 0, aligned_full_length - (length + 8)); @@ -389,8 +415,12 @@ Cie::set_output_offset(section_offset_type output_offset, // Add 4 for length and 4 for zero CIE identifier tag. length += 8; - merge_map->add_mapping(this->object_, this->shndx_, this->input_offset_, - length, output_offset); + if (this->object_ != NULL) + { + // Add a mapping so that relocations are applied correctly. + merge_map->add_mapping(this->object_, this->shndx_, this->input_offset_, + length, output_offset); + } length = align_address(length, addralign); @@ -415,7 +445,8 @@ Cie::set_output_offset(section_offset_type output_offset, template section_offset_type Cie::write(unsigned char* oview, section_offset_type offset, - unsigned int addralign, Eh_frame_hdr* eh_frame_hdr) + uint64_t address, unsigned int addralign, + Eh_frame_hdr* eh_frame_hdr) { gold_assert((offset & (addralign - 1)) == 0); @@ -448,7 +479,7 @@ Cie::write(unsigned char* oview, section_offset_type offset, for (std::vector::const_iterator p = this->fdes_.begin(); p != this->fdes_.end(); ++p) - offset = (*p)->write(oview, offset, addralign, + offset = (*p)->write(oview, offset, address, addralign, cie_offset, fde_encoding, eh_frame_hdr); @@ -525,7 +556,7 @@ Eh_frame::skip_leb128(const unsigned char** pp, const unsigned char* pend) template bool Eh_frame::add_ehframe_input_section( - Sized_relobj* object, + Sized_relobj_file* object, const unsigned char* symbols, section_size_type symbols_size, const unsigned char* symbol_names, @@ -588,7 +619,7 @@ Eh_frame::add_ehframe_input_section( template bool Eh_frame::do_add_ehframe_input_section( - Sized_relobj* object, + Sized_relobj_file* object, const unsigned char* symbols, section_size_type symbols_size, const unsigned char* symbol_names, @@ -675,7 +706,7 @@ Eh_frame::do_add_ehframe_input_section( template bool -Eh_frame::read_cie(Sized_relobj* object, +Eh_frame::read_cie(Sized_relobj_file* object, unsigned int shndx, const unsigned char* symbols, section_size_type symbols_size, @@ -929,7 +960,7 @@ Eh_frame::read_cie(Sized_relobj* object, template bool -Eh_frame::read_fde(Sized_relobj* object, +Eh_frame::read_fde(Sized_relobj_file* object, unsigned int shndx, const unsigned char* symbols, section_size_type symbols_size, @@ -994,6 +1025,29 @@ Eh_frame::read_fde(Sized_relobj* object, return true; } +// Add unwind information for a PLT. + +void +Eh_frame::add_ehframe_for_plt(Output_data* plt, const unsigned char* cie_data, + size_t cie_length, const unsigned char* fde_data, + size_t fde_length) +{ + Cie cie(NULL, 0, 0, elfcpp::DW_EH_PE_pcrel | elfcpp::DW_EH_PE_sdata4, "", + cie_data, cie_length); + Cie_offsets::iterator find_cie = this->cie_offsets_.find(&cie); + Cie* pcie; + if (find_cie != this->cie_offsets_.end()) + pcie = *find_cie; + else + { + pcie = new Cie(cie); + this->cie_offsets_.insert(pcie); + } + + Fde* fde = new Fde(plt, fde_data, fde_length); + pcie->add_fde(fde); +} + // Return the number of FDEs. unsigned int @@ -1113,18 +1167,19 @@ template void Eh_frame::do_sized_write(unsigned char* oview) { + uint64_t address = this->address(); unsigned int addralign = this->addralign(); section_offset_type o = 0; for (Unmergeable_cie_offsets::iterator p = this->unmergeable_cie_offsets_.begin(); p != this->unmergeable_cie_offsets_.end(); ++p) - o = (*p)->write(oview, o, addralign, + o = (*p)->write(oview, o, address, addralign, this->eh_frame_hdr_); for (Cie_offsets::iterator p = this->cie_offsets_.begin(); p != this->cie_offsets_.end(); ++p) - o = (*p)->write(oview, o, addralign, + o = (*p)->write(oview, o, address, addralign, this->eh_frame_hdr_); } @@ -1132,7 +1187,7 @@ Eh_frame::do_sized_write(unsigned char* oview) template bool Eh_frame::add_ehframe_input_section<32, false>( - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, const unsigned char* symbols, section_size_type symbols_size, const unsigned char* symbol_names, @@ -1146,7 +1201,7 @@ Eh_frame::add_ehframe_input_section<32, false>( template bool Eh_frame::add_ehframe_input_section<32, true>( - Sized_relobj<32, true>* object, + Sized_relobj_file<32, true>* object, const unsigned char* symbols, section_size_type symbols_size, const unsigned char* symbol_names, @@ -1160,7 +1215,7 @@ Eh_frame::add_ehframe_input_section<32, true>( template bool Eh_frame::add_ehframe_input_section<64, false>( - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, const unsigned char* symbols, section_size_type symbols_size, const unsigned char* symbol_names, @@ -1174,7 +1229,7 @@ Eh_frame::add_ehframe_input_section<64, false>( template bool Eh_frame::add_ehframe_input_section<64, true>( - Sized_relobj<64, true>* object, + Sized_relobj_file<64, true>* object, const unsigned char* symbols, section_size_type symbols_size, const unsigned char* symbol_names, diff --git a/gold/ehframe.h b/gold/ehframe.h index 1690245..c3f82e9 100644 --- a/gold/ehframe.h +++ b/gold/ehframe.h @@ -1,6 +1,6 @@ // ehframe.h -- handle exception frame sections for gold -*- C++ -*- -// Copyright 2006, 2007, 2008 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -45,10 +45,6 @@ class Eh_frame; // time and when a shared object is loaded, and the time required to // deregister the exception handlers when a shared object is unloaded. -// FIXME: gcc supports using storing a sorted lookup table for the -// FDEs in the PT_GNU_EH_FRAME segment, but we do not yet generate -// that. - class Eh_frame_hdr : public Output_section_data { public: @@ -170,9 +166,18 @@ class Fde public: Fde(Relobj* object, unsigned int shndx, section_offset_type input_offset, const unsigned char* contents, size_t length) - : object_(object), shndx_(shndx), input_offset_(input_offset), + : object_(object), contents_(reinterpret_cast(contents), length) - { } + { + this->u_.from_object.shndx = shndx; + this->u_.from_object.input_offset = input_offset; + } + + // Create an FDE associated with a PLT. + Fde(Output_data* plt, const unsigned char* contents, size_t length) + : object_(NULL), + contents_(reinterpret_cast(contents), length) + { this->u_.from_linker.plt = plt; } // Return the length of this FDE. Add 4 for the length and 4 for // the offset to the CIE. @@ -180,32 +185,52 @@ class Fde length() const { return this->contents_.length() + 8; } - // Add a mapping for this FDE to MERGE_MAP. + // Add a mapping for this FDE to MERGE_MAP, so that relocations + // against the FDE are applied to right part of the output file. void add_mapping(section_offset_type output_offset, Merge_map* merge_map) const { - merge_map->add_mapping(this->object_, this->shndx_, - this->input_offset_, this->length(), - output_offset); + if (this->object_ != NULL) + merge_map->add_mapping(this->object_, this->u_.from_object.shndx, + this->u_.from_object.input_offset, this->length(), + output_offset); } // Write the FDE to OVIEW starting at OFFSET. FDE_ENCODING is the // encoding, from the CIE. Round up the bytes to ADDRALIGN if - // necessary. Record the FDE in EH_FRAME_HDR. Return the new - // offset. + // necessary. ADDRESS is the virtual address of OVIEW. Record the + // FDE in EH_FRAME_HDR. Return the new offset. template section_offset_type write(unsigned char* oview, section_offset_type offset, - unsigned int addralign, section_offset_type cie_offset, - unsigned char fde_encoding, Eh_frame_hdr* eh_frame_hdr); + uint64_t address, unsigned int addralign, + section_offset_type cie_offset, unsigned char fde_encoding, + Eh_frame_hdr* eh_frame_hdr); private: - // The object in which this FDE was seen. + // The object in which this FDE was seen. This will be NULL for a + // linker generated FDE. Relobj* object_; - // Input section index for this FDE. - unsigned int shndx_; - // Offset within the input section for this FDE. - section_offset_type input_offset_; + union + { + // These fields are used if the FDE is from an input object (the + // object_ field is not NULL). + struct + { + // Input section index for this FDE. + unsigned int shndx; + // Offset within the input section for this FDE. + section_offset_type input_offset; + } from_object; + // This field is used if the FDE is generated by the linker (the + // object_ field is NULL). + struct + { + // The only linker generated FDEs are for PLT sections, and this + // points to the PLT section. + Output_data* plt; + } from_linker; + } u_; // FDE data. std::string contents_; }; @@ -261,10 +286,11 @@ class Cie // Write the CIE to OVIEW starting at OFFSET. EH_FRAME_HDR is the // exception frame header for FDE recording. Round up the bytes to - // ADDRALIGN. Return the new offset. + // ADDRALIGN. ADDRESS is the virtual address of OVIEW. Return the + // new offset. template section_offset_type - write(unsigned char* oview, section_offset_type offset, + write(unsigned char* oview, section_offset_type offset, uint64_t address, unsigned int addralign, Eh_frame_hdr* eh_frame_hdr); friend bool operator<(const Cie&, const Cie&); @@ -274,11 +300,14 @@ class Cie // The class is not assignable. Cie& operator=(const Cie&); - // The object in which this CIE was first seen. + // The object in which this CIE was first seen. This will be NULL + // for a linker generated CIE. Relobj* object_; - // Input section index for this CIE. + // Input section index for this CIE. This will be 0 for a linker + // generated CIE. unsigned int shndx_; - // Offset within the input section for this CIE. + // Offset within the input section for this CIE. This will be 0 for + // a linker generated CIE. section_offset_type input_offset_; // The encoding of the FDE. This is a DW_EH_PE code. unsigned char fde_encoding_; @@ -316,7 +345,7 @@ class Eh_frame : public Output_section_data // data. template bool - add_ehframe_input_section(Sized_relobj* object, + add_ehframe_input_section(Sized_relobj_file* object, const unsigned char* symbols, section_size_type symbols_size, const unsigned char* symbol_names, @@ -324,6 +353,15 @@ class Eh_frame : public Output_section_data unsigned int shndx, unsigned int reloc_shndx, unsigned int reloc_type); + // Add a CIE and an FDE for a PLT section, to permit unwinding + // through a PLT. The FDE data should start with 8 bytes of zero, + // which will be replaced by a 4 byte PC relative reference to the + // address of PLT and a 4 byte size of PLT. + void + add_ehframe_for_plt(Output_data* plt, const unsigned char* cie_data, + size_t cie_length, const unsigned char* fde_data, + size_t fde_length); + // Return the number of FDEs. unsigned int fde_count() const; @@ -382,7 +420,7 @@ class Eh_frame : public Output_section_data // The implementation of add_ehframe_input_section. template bool - do_add_ehframe_input_section(Sized_relobj* object, + do_add_ehframe_input_section(Sized_relobj_file* object, const unsigned char* symbols, section_size_type symbols_size, const unsigned char* symbol_names, @@ -397,7 +435,7 @@ class Eh_frame : public Output_section_data // Read a CIE. template bool - read_cie(Sized_relobj* object, + read_cie(Sized_relobj_file* object, unsigned int shndx, const unsigned char* symbols, section_size_type symbols_size, @@ -413,7 +451,7 @@ class Eh_frame : public Output_section_data // Read an FDE. template bool - read_fde(Sized_relobj* object, + read_fde(Sized_relobj_file* object, unsigned int shndx, const unsigned char* symbols, section_size_type symbols_size, diff --git a/gold/errors.cc b/gold/errors.cc index b586504..b79764b 100644 --- a/gold/errors.cc +++ b/gold/errors.cc @@ -81,7 +81,18 @@ Errors::fatal(const char* format, va_list args) fprintf(stderr, _("%s: fatal error: "), this->program_name_); vfprintf(stderr, format, args); fputc('\n', stderr); - gold_exit(false); + gold_exit(GOLD_ERR); +} + +// Report a fallback error. + +void +Errors::fallback(const char* format, va_list args) +{ + fprintf(stderr, _("%s: fatal error: "), this->program_name_); + vfprintf(stderr, format, args); + fputc('\n', stderr); + gold_exit(GOLD_FALLBACK); } // Report an error. @@ -212,6 +223,17 @@ gold_fatal(const char* format, ...) va_end(args); } +// Report a fallback error. + +void +gold_fallback(const char* format, ...) +{ + va_list args; + va_start(args, format); + parameters->errors()->fallback(format, args); + va_end(args); +} + // Report an error. void diff --git a/gold/errors.h b/gold/errors.h index a8f823d..1e61c8d 100644 --- a/gold/errors.h +++ b/gold/errors.h @@ -49,6 +49,12 @@ class Errors void fatal(const char* format, va_list) ATTRIBUTE_NORETURN; + // Report a fallback error. After printing the error, this must exit + // with a special status code indicating that fallback to + // --incremental-full is required. + void + fallback(const char* format, va_list) ATTRIBUTE_NORETURN; + // Report an error and continue. void error(const char* format, va_list); diff --git a/gold/fileread.cc b/gold/fileread.cc index 2324734..80ddfbc 100644 --- a/gold/fileread.cc +++ b/gold/fileread.cc @@ -986,45 +986,40 @@ Input_file::find_file(const Dirsearch& dirpath, int* pindex, else if (input_argument->is_lib() || input_argument->is_searched_file()) { - std::string n1, n2; + std::vector names; + names.reserve(2); if (input_argument->is_lib()) { - n1 = "lib"; - n1 += input_argument->name(); + std::string prefix = "lib"; + prefix += input_argument->name(); if (parameters->options().is_static() || !input_argument->options().Bdynamic()) - n1 += ".a"; + names.push_back(prefix + ".a"); else { - n2 = n1 + ".a"; - n1 += ".so"; + names.push_back(prefix + ".so"); + names.push_back(prefix + ".a"); } } else - n1 = input_argument->name(); + names.push_back(input_argument->name()); - if (Input_file::try_extra_search_path(pindex, input_argument, n1, - found_name, namep)) - return true; - - if (!n2.empty() && Input_file::try_extra_search_path(pindex, - input_argument, n2, - found_name, namep)) - return true; + for (std::vector::const_iterator n = names.begin(); + n != names.end(); + ++n) + if (Input_file::try_extra_search_path(pindex, input_argument, *n, + found_name, namep)) + return true; // It is not in the extra_search_path. - name = dirpath.find(n1, n2, is_in_sysroot, pindex); + name = dirpath.find(names, is_in_sysroot, pindex, found_name); if (name.empty()) { gold_error(_("cannot find %s%s"), - input_argument->is_lib() ? "-l" : "", + input_argument->is_lib() ? "-l" : "", input_argument->name()); return false; } - if (n2.empty() || name[name.length() - 1] == 'o') - *found_name = n1; - else - *found_name = n2; *namep = name; return true; } @@ -1034,22 +1029,21 @@ Input_file::find_file(const Dirsearch& dirpath, int* pindex, gold_assert(input_argument->extra_search_path() != NULL); if (try_extra_search_path(pindex, input_argument, input_argument->name(), - found_name, namep)) - return true; + found_name, namep)) + return true; // extra_search_path failed, so check the normal search-path. int index = *pindex; if (index > 0) - --index; - name = dirpath.find(input_argument->name(), "", - is_in_sysroot, &index); + --index; + name = dirpath.find(std::vector(1, input_argument->name()), + is_in_sysroot, &index, found_name); if (name.empty()) - { - gold_error(_("cannot find %s"), - input_argument->name()); - return false; - } - *found_name = input_argument->name(); + { + gold_error(_("cannot find %s"), + input_argument->name()); + return false; + } *namep = name; *pindex = index + 1; return true; diff --git a/gold/freebsd.h b/gold/freebsd.h index de69735..175dd05 100644 --- a/gold/freebsd.h +++ b/gold/freebsd.h @@ -1,6 +1,6 @@ // freebsd.h -- FreeBSD support for gold -*- C++ -*- -// Copyright 2009 Free Software Foundation, Inc. +// Copyright 2009, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -30,67 +30,17 @@ namespace gold { // FreeBSD 4.1 and later wants the EI_OSABI field in the ELF header to -// be set to ELFOSABI_FREEBSD. This is a subclass of Sized_target -// which supports that. The real target would be a subclass of this -// one. We permit combining FreeBSD and non-FreeBSD object files. -// The effect of this target is to set the code in the output file. - -template -class Target_freebsd : public Sized_target -{ - public: - // Set the value to use for the EI_OSABI field in the ELF header. - void - set_osabi(elfcpp::ELFOSABI osabi) - { this->osabi_ = osabi; } - - protected: - Target_freebsd(const Target::Target_info* pti) - : Sized_target(pti), - osabi_(elfcpp::ELFOSABI_NONE) - { } - - virtual void - do_adjust_elf_header(unsigned char* view, int len) const; - - private: - // Value to store in the EI_OSABI field of the ELF file header. - elfcpp::ELFOSABI osabi_; -}; - -// Adjust the ELF file header by storing the requested value in the -// OSABI field. This is for FreeBSD support. - -template -inline void -Target_freebsd::do_adjust_elf_header(unsigned char* view, - int len) const -{ - if (this->osabi_ != elfcpp::ELFOSABI_NONE) - { - gold_assert(len == elfcpp::Elf_sizes::ehdr_size); - - elfcpp::Ehdr ehdr(view); - unsigned char e_ident[elfcpp::EI_NIDENT]; - memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT); - - e_ident[elfcpp::EI_OSABI] = this->osabi_; - - elfcpp::Ehdr_write oehdr(view); - oehdr.put_e_ident(e_ident); - } -} - -// A target selector for targets which permit combining both FreeBSD -// and non-FreeBSD object files. +// be set to ELFOSABI_FREEBSD. This is a target selector for targets +// which permit combining both FreeBSD and non-FreeBSD object files. class Target_selector_freebsd : public Target_selector { public: Target_selector_freebsd(int machine, int size, bool is_big_endian, const char* bfd_name, - const char* freebsd_bfd_name) - : Target_selector(machine, size, is_big_endian, NULL), + const char* freebsd_bfd_name, + const char* emulation) + : Target_selector(machine, size, is_big_endian, NULL, emulation), bfd_name_(bfd_name), freebsd_bfd_name_(freebsd_bfd_name) { } @@ -102,20 +52,20 @@ class Target_selector_freebsd : public Target_selector { Target* ret = this->instantiate_target(); if (osabi == elfcpp::ELFOSABI_FREEBSD) - this->set_osabi(ret); + ret->set_osabi(static_cast(osabi)); return ret; } // Recognize two names. virtual Target* - do_recognize_by_name(const char* name) + do_recognize_by_bfd_name(const char* name) { if (strcmp(name, this->bfd_name_) == 0) return this->instantiate_target(); else if (strcmp(name, this->freebsd_bfd_name_) == 0) { Target* ret = this->instantiate_target(); - this->set_osabi(ret); + ret->set_osabi(elfcpp::ELFOSABI_FREEBSD); return ret; } else @@ -124,39 +74,24 @@ class Target_selector_freebsd : public Target_selector // Print both names in --help output. virtual void - do_supported_names(std::vector* names) + do_supported_bfd_names(std::vector* names) { names->push_back(this->bfd_name_); names->push_back(this->freebsd_bfd_name_); } - private: - // Set the OSABI field. This is quite ugly. - void - set_osabi(Target* target) + // Return appropriate BFD name. + virtual const char* + do_target_bfd_name(const Target* target) { - if (this->get_size() == 32) - { - if (this->is_big_endian()) - static_cast*>(target)-> - set_osabi(elfcpp::ELFOSABI_FREEBSD); - else - static_cast*>(target)-> - set_osabi(elfcpp::ELFOSABI_FREEBSD); - } - else if (this->get_size() == 64) - { - if (this->is_big_endian()) - static_cast*>(target)-> - set_osabi(elfcpp::ELFOSABI_FREEBSD); - else - static_cast*>(target)-> - set_osabi(elfcpp::ELFOSABI_FREEBSD); - } - else - gold_unreachable(); + if (!this->is_our_target(target)) + return NULL; + return (target->osabi() == elfcpp::ELFOSABI_FREEBSD + ? this->freebsd_bfd_name_ + : this->bfd_name_); } + private: // The BFD name for the non-Freebsd target. const char* bfd_name_; // The BFD name for the Freebsd target. diff --git a/gold/gc.h b/gold/gc.h index 10cdd5f..4688781 100644 --- a/gold/gc.h +++ b/gold/gc.h @@ -37,7 +37,7 @@ namespace gold class Object; template -class Sized_relobj; +class Sized_relobj_file; template class Reloc_types; @@ -178,7 +178,7 @@ gc_process_relocs( Symbol_table* symtab, Layout*, Target_type* target, - Sized_relobj* src_obj, + Sized_relobj_file* src_obj, unsigned int src_indx, const unsigned char* prelocs, size_t reloc_count, diff --git a/gold/gold.cc b/gold/gold.cc index 926e5fb..12f25b7 100644 --- a/gold/gold.cc +++ b/gold/gold.cc @@ -1,6 +1,6 @@ // gold.cc -- main linker functions -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -30,6 +30,7 @@ #include "libiberty.h" #include "options.h" +#include "target-select.h" #include "debug.h" #include "workqueue.h" #include "dirsearch.h" @@ -58,15 +59,15 @@ process_incremental_input(Incremental_binary*, unsigned int, Input_objects*, Task_token*, Task_token*); void -gold_exit(bool status) +gold_exit(Exit_status status) { if (parameters != NULL && parameters->options_valid() && parameters->options().has_plugins()) parameters->options().plugins()->cleanup(); - if (!status && parameters != NULL && parameters->options_valid()) + if (status != GOLD_OK && parameters != NULL && parameters->options_valid()) unlink_if_ordinary(parameters->options().output_file_name()); - exit(status ? EXIT_SUCCESS : EXIT_FAILURE); + exit(status); } void @@ -87,7 +88,7 @@ gold_nomem() const char* const s = ": out of memory\n"; len = write(2, s, strlen(s)); } - gold_exit(false); + gold_exit(GOLD_ERR); } // Handle an unreachable case. @@ -97,7 +98,7 @@ do_gold_unreachable(const char* filename, int lineno, const char* function) { fprintf(stderr, _("%s: internal error in %s, at %s:%d\n"), program_name, function, filename, lineno); - gold_exit(false); + gold_exit(GOLD_ERR); } // This class arranges to run the functions done in the middle of the @@ -175,8 +176,16 @@ queue_initial_tasks(const General_options& options, { if (cmdline.begin() == cmdline.end()) { + bool is_ok = false; if (options.printed_version()) - gold_exit(true); + is_ok = true; + if (options.print_output_format()) + { + print_output_format(); + is_ok = true; + } + if (is_ok) + gold_exit(GOLD_OK); gold_fatal(_("no input files")); } @@ -200,15 +209,14 @@ queue_initial_tasks(const General_options& options, gold_error(_("incremental linking is incompatible with --icf")); if (options.has_plugins()) gold_error(_("incremental linking is incompatible with --plugin")); + if (strcmp(options.compress_debug_sections(), "none") != 0) + gold_error(_("incremental linking is incompatible with " + "--compress-debug-sections")); if (parameters->incremental_update()) { Output_file* of = new Output_file(options.output_file_name()); - if (!of->open_for_modification()) - gold_info(_("incremental update not possible: " - "cannot open %s"), - options.output_file_name()); - else + if (of->open_base_file(options.incremental_base(), true)) { ibase = open_incremental_binary(of); if (ibase != NULL @@ -226,7 +234,7 @@ queue_initial_tasks(const General_options& options, if (set_parameters_incremental_full()) gold_info(_("linking with --incremental-full")); else - gold_fatal(_("restart link with --incremental-full")); + gold_fallback(_("restart link with --incremental-full")); } } } @@ -505,11 +513,7 @@ queue_middle_tasks(const General_options& options, if (parameters->options().gc_sections()) { // Find the start symbol if any. - Symbol* start_sym; - if (parameters->options().entry()) - start_sym = symtab->lookup(parameters->options().entry()); - else - start_sym = symtab->lookup("_start"); + Symbol* start_sym = symtab->lookup(parameters->entry()); if (start_sym != NULL) { bool is_ordinary; @@ -630,6 +634,15 @@ queue_middle_tasks(const General_options& options, } } + // For incremental updates, record the existing GOT and PLT entries, + // and the COPY relocations. + if (parameters->incremental_update()) + { + Incremental_binary* ibase = layout->incremental_base(); + ibase->process_got_plt(symtab, layout); + ibase->emit_copy_relocs(symtab); + } + if (is_debugging_enabled(DEBUG_SCRIPT)) layout->script_options()->print(stderr); @@ -747,7 +760,7 @@ queue_middle_tasks(const General_options& options, // THIS_BLOCKER to be NULL here. There's no real point in // continuing if that happens. gold_assert(parameters->errors()->error_count() > 0); - gold_exit(false); + gold_exit(GOLD_ERR); } } diff --git a/gold/gold.h b/gold/gold.h index 133a64e..88fc4de 100644 --- a/gold/gold.h +++ b/gold/gold.h @@ -27,6 +27,7 @@ #include "ansidecl.h" #include +#include #include #include #include @@ -166,6 +167,15 @@ class Output_file; template struct Relocate_info; +// Exit status codes. + +enum Exit_status +{ + GOLD_OK = EXIT_SUCCESS, + GOLD_ERR = EXIT_FAILURE, + GOLD_FALLBACK = EXIT_FAILURE + 1 +}; + // Some basic types. For these we use lower case initial letters. // For an offset in an input or output file, use off_t. Note that @@ -183,7 +193,7 @@ extern const char* program_name; // This function is called to exit the program. Status is true to // exit success (0) and false to exit failure (1). extern void -gold_exit(bool status) ATTRIBUTE_NORETURN; +gold_exit(Exit_status status) ATTRIBUTE_NORETURN; // This function is called to emit an error message and then // immediately exit with failure. @@ -203,6 +213,13 @@ gold_warning(const char* msg, ...) ATTRIBUTE_PRINTF_1; extern void gold_info(const char* msg, ...) ATTRIBUTE_PRINTF_1; +// This function is called to emit an error message and then +// immediately exit with fallback status (e.g., when +// --incremental-update fails and the link needs to be restarted +// with --incremental-full). +extern void +gold_fallback(const char* format, ...) ATTRIBUTE_NORETURN ATTRIBUTE_PRINTF_1; + // Work around a bug in gcc 4.3.0. http://gcc.gnu.org/PR35546 . This // can probably be removed after the bug has been fixed for a while. #ifdef HAVE_TEMPLATE_ATTRIBUTES diff --git a/gold/i386.cc b/gold/i386.cc index a137b2e..445bc68 100644 --- a/gold/i386.cc +++ b/gold/i386.cc @@ -1,6 +1,6 @@ // i386.cc -- i386 target support for gold. -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -25,6 +25,7 @@ #include #include "elfcpp.h" +#include "dwarf.h" #include "parameters.h" #include "reloc.h" #include "i386.h" @@ -52,15 +53,16 @@ class Output_data_plt_i386 : public Output_section_data public: typedef Output_data_reloc Reloc_section; - Output_data_plt_i386(Symbol_table*, Layout*, Output_data_space*); + Output_data_plt_i386(Layout*, Output_data_space*, Output_data_space*); // Add an entry to the PLT. void - add_entry(Symbol* gsym); + add_entry(Symbol_table*, Layout*, Symbol* gsym); // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. unsigned int - add_local_ifunc_entry(Sized_relobj<32, false>* relobj, + add_local_ifunc_entry(Symbol_table*, Layout*, + Sized_relobj_file<32, false>* relobj, unsigned int local_sym_index); // Return the .rel.plt section data. @@ -72,10 +74,19 @@ class Output_data_plt_i386 : public Output_section_data Reloc_section* rel_tls_desc(Layout*); + // Return where the IRELATIVE relocations should go. + Reloc_section* + rel_irelative(Symbol_table*, Layout*); + + // Return whether we created a section for IRELATIVE relocations. + bool + has_irelative_section() const + { return this->irelative_rel_ != NULL; } + // Return the number of PLT entries. unsigned int entry_count() const - { return this->count_; } + { return this->count_ + this->irelative_count_; } // Return the offset of the first non-reserved PLT entry. static unsigned int @@ -87,6 +98,14 @@ class Output_data_plt_i386 : public Output_section_data get_plt_entry_size() { return plt_entry_size; } + // Return the PLT address to use for a global symbol. + uint64_t + address_for_global(const Symbol*); + + // Return the PLT address to use for a local symbol. + uint64_t + address_for_local(const Relobj*, unsigned int symndx); + protected: void do_adjust_output_section(Output_section* os); @@ -101,21 +120,30 @@ class Output_data_plt_i386 : public Output_section_data static const int plt_entry_size = 16; // The first entry in the PLT for an executable. - static unsigned char exec_first_plt_entry[plt_entry_size]; + static const unsigned char exec_first_plt_entry[plt_entry_size]; // The first entry in the PLT for a shared object. - static unsigned char dyn_first_plt_entry[plt_entry_size]; + static const unsigned char dyn_first_plt_entry[plt_entry_size]; // Other entries in the PLT for an executable. - static unsigned char exec_plt_entry[plt_entry_size]; + static const unsigned char exec_plt_entry[plt_entry_size]; // Other entries in the PLT for a shared object. - static unsigned char dyn_plt_entry[plt_entry_size]; + static const unsigned char dyn_plt_entry[plt_entry_size]; + + // The .eh_frame unwind information for the PLT. + static const int plt_eh_frame_cie_size = 16; + static const int plt_eh_frame_fde_size = 32; + static const unsigned char plt_eh_frame_cie[plt_eh_frame_cie_size]; + static const unsigned char plt_eh_frame_fde[plt_eh_frame_fde_size]; // Set the final size. void set_final_data_size() - { this->set_data_size((this->count_ + 1) * plt_entry_size); } + { + this->set_data_size((this->count_ + this->irelative_count_ + 1) + * plt_entry_size); + } // Write out the PLT data. void @@ -133,20 +161,31 @@ class Output_data_plt_i386 : public Output_section_data // offset in the GOT. struct Local_ifunc { - Sized_relobj<32, false>* object; + Sized_relobj_file<32, false>* object; unsigned int local_sym_index; unsigned int got_offset; }; + // A pointer to the Layout class, so that we can find the .dynamic + // section when we write out the GOT PLT section. + Layout* layout_; // The reloc section. Reloc_section* rel_; // The TLS_DESC relocations, if necessary. These must follow the // regular PLT relocs. Reloc_section* tls_desc_rel_; + // The IRELATIVE relocations, if necessary. These must follow the + // regular relocatoins and the TLS_DESC relocations. + Reloc_section* irelative_rel_; // The .got.plt section. Output_data_space* got_plt_; + // The part of the .got.plt section used for IRELATIVE relocs. + Output_data_space* got_irelative_; // The number of PLT entries. unsigned int count_; + // Number of PLT entries with R_386_IRELATIVE relocs. These follow + // the regular PLT entries. + unsigned int irelative_count_; // Global STT_GNU_IFUNC symbols. std::vector global_ifuncs_; // Local STT_GNU_IFUNC symbols. @@ -158,33 +197,25 @@ class Output_data_plt_i386 : public Output_section_data // http://people.redhat.com/drepper/tls.pdf // http://www.lsd.ic.unicamp.br/~oliva/writeups/TLS/RFC-TLSDESC-x86.txt -class Target_i386 : public Target_freebsd<32, false> +class Target_i386 : public Sized_target<32, false> { public: typedef Output_data_reloc Reloc_section; Target_i386() - : Target_freebsd<32, false>(&i386_info), - got_(NULL), plt_(NULL), got_plt_(NULL), got_tlsdesc_(NULL), - global_offset_table_(NULL), rel_dyn_(NULL), - copy_relocs_(elfcpp::R_386_COPY), dynbss_(NULL), + : Sized_target<32, false>(&i386_info), + got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL), + got_tlsdesc_(NULL), global_offset_table_(NULL), rel_dyn_(NULL), + rel_irelative_(NULL), copy_relocs_(elfcpp::R_386_COPY), dynbss_(NULL), got_mod_index_offset_(-1U), tls_base_symbol_defined_(false) { } - inline bool - can_check_for_function_pointers() const - { return true; } - - virtual bool - can_icf_inline_merge_sections () const - { return true; } - // Process the relocations to determine unreferenced sections for // garbage collection. void gc_process_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -198,7 +229,7 @@ class Target_i386 : public Target_freebsd<32, false> void scan_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -234,7 +265,7 @@ class Target_i386 : public Target_freebsd<32, false> void scan_relocatable_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -282,14 +313,23 @@ class Target_i386 : public Target_freebsd<32, false> return Target::do_is_local_label_name(name); } - // Return the PLT section. - Output_data* - do_plt_section_for_global(const Symbol*) const - { return this->plt_section(); } + // Return the PLT address to use for a global symbol. + uint64_t + do_plt_address_for_global(const Symbol* gsym) const + { return this->plt_section()->address_for_global(gsym); } + + uint64_t + do_plt_address_for_local(const Relobj* relobj, unsigned int symndx) const + { return this->plt_section()->address_for_local(relobj, symndx); } + + // We can tell whether we take the address of a function. + inline bool + do_can_check_for_function_pointers() const + { return true; } - Output_data* - do_plt_section_for_local(const Relobj*, unsigned int) const - { return this->plt_section(); } + // Return the base for a DW_EH_PE_datarel encoding. + uint64_t + do_ehframe_datarel_base() const; // Return whether SYM is call to a non-split function. bool @@ -341,7 +381,7 @@ class Target_i386 : public Target_freebsd<32, false> inline void local(Symbol_table* symtab, Layout* layout, Target_i386* target, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rel<32, false>& reloc, unsigned int r_type, @@ -349,7 +389,7 @@ class Target_i386 : public Target_freebsd<32, false> inline void global(Symbol_table* symtab, Layout* layout, Target_i386* target, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rel<32, false>& reloc, unsigned int r_type, @@ -358,7 +398,7 @@ class Target_i386 : public Target_freebsd<32, false> inline bool local_reloc_may_be_function_pointer(Symbol_table* symtab, Layout* layout, Target_i386* target, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rel<32, false>& reloc, @@ -368,7 +408,7 @@ class Target_i386 : public Target_freebsd<32, false> inline bool global_reloc_may_be_function_pointer(Symbol_table* symtab, Layout* layout, Target_i386* target, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rel<32, false>& reloc, @@ -379,13 +419,14 @@ class Target_i386 : public Target_freebsd<32, false> possible_function_pointer_reloc(unsigned int r_type); bool - reloc_needs_plt_for_ifunc(Sized_relobj<32, false>*, unsigned int r_type); + reloc_needs_plt_for_ifunc(Sized_relobj_file<32, false>*, + unsigned int r_type); static void - unsupported_reloc_local(Sized_relobj<32, false>*, unsigned int r_type); + unsupported_reloc_local(Sized_relobj_file<32, false>*, unsigned int r_type); static void - unsupported_reloc_global(Sized_relobj<32, false>*, unsigned int r_type, + unsupported_reloc_global(Sized_relobj_file<32, false>*, unsigned int r_type, Symbol*); }; @@ -552,7 +593,7 @@ class Target_i386 : public Target_freebsd<32, false> // Create a PLT entry for a local STT_GNU_IFUNC symbol. void make_local_ifunc_plt_entry(Symbol_table*, Layout*, - Sized_relobj<32, false>* relobj, + Sized_relobj_file<32, false>* relobj, unsigned int local_sym_index); // Define the _TLS_MODULE_BASE_ symbol in the TLS segment. @@ -562,7 +603,7 @@ class Target_i386 : public Target_freebsd<32, false> // Create a GOT entry for the TLS module index. unsigned int got_mod_index_entry(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, false>* object); + Sized_relobj_file<32, false>* object); // Get the PLT section. Output_data_plt_i386* @@ -580,10 +621,14 @@ class Target_i386 : public Target_freebsd<32, false> Reloc_section* rel_tls_desc_section(Layout*) const; + // Get the section to use for IRELATIVE relocations. + Reloc_section* + rel_irelative_section(Layout*); + // Add a potential copy relocation. void copy_reloc(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int shndx, Output_section* output_section, Symbol* sym, const elfcpp::Rel<32, false>& reloc) { @@ -616,12 +661,16 @@ class Target_i386 : public Target_freebsd<32, false> Output_data_plt_i386* plt_; // The GOT PLT section. Output_data_space* got_plt_; + // The GOT section for IRELATIVE relocations. + Output_data_space* got_irelative_; // The GOT section for TLSDESC relocations. Output_data_got<32, false>* got_tlsdesc_; // The _GLOBAL_OFFSET_TABLE_ symbol. Symbol* global_offset_table_; // The dynamic reloc section. Reloc_section* rel_dyn_; + // The section to use for IRELATIVE relocs. + Reloc_section* rel_irelative_; // Relocs saved to avoid a COPY reloc. Copy_relocs copy_relocs_; // Space for variables copied with a COPY reloc. @@ -641,6 +690,7 @@ const Target::Target_info Target_i386::i386_info = false, // has_resolve true, // has_code_fill true, // is_default_stack_executable + true, // can_icf_inline_merge_sections '\0', // wrap_char "/usr/lib/libc.so.1", // dynamic_linker 0x08048000, // default_text_segment_address @@ -665,23 +715,37 @@ Target_i386::got_section(Symbol_table* symtab, Layout* layout) this->got_ = new Output_data_got<32, false>(); + // When using -z now, we can treat .got.plt as a relro section. + // Without -z now, it is modified after program startup by lazy + // PLT relocations. + bool is_got_plt_relro = parameters->options().now(); + Output_section_order got_order = (is_got_plt_relro + ? ORDER_RELRO + : ORDER_RELRO_LAST); + Output_section_order got_plt_order = (is_got_plt_relro + ? ORDER_RELRO + : ORDER_NON_RELRO_FIRST); + layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), - this->got_, ORDER_RELRO_LAST, true); + this->got_, got_order, true); this->got_plt_ = new Output_data_space(4, "** GOT PLT"); layout->add_output_section_data(".got.plt", elfcpp::SHT_PROGBITS, (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), - this->got_plt_, ORDER_NON_RELRO_FIRST, - false); + this->got_plt_, got_plt_order, + is_got_plt_relro); // The first three entries are reserved. this->got_plt_->set_current_data_size(3 * 4); - // Those bytes can go into the relro segment. - layout->increase_relro(3 * 4); + if (!is_got_plt_relro) + { + // Those bytes can go into the relro segment. + layout->increase_relro(3 * 4); + } // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT. this->global_offset_table_ = @@ -693,6 +757,15 @@ Target_i386::got_section(Symbol_table* symtab, Layout* layout) elfcpp::STV_HIDDEN, 0, false, false); + // If there are any IRELATIVE relocations, they get GOT entries + // in .got.plt after the jump slot relocations. + this->got_irelative_ = new Output_data_space(4, "** GOT IRELATIVE PLT"); + layout->add_output_section_data(".got.plt", elfcpp::SHT_PROGBITS, + (elfcpp::SHF_ALLOC + | elfcpp::SHF_WRITE), + this->got_irelative_, + got_plt_order, is_got_plt_relro); + // If there are any TLSDESC relocations, they get GOT entries in // .got.plt after the jump slot entries. this->got_tlsdesc_ = new Output_data_got<32, false>(); @@ -700,7 +773,7 @@ Target_i386::got_section(Symbol_table* symtab, Layout* layout) (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), this->got_tlsdesc_, - ORDER_NON_RELRO_FIRST, false); + got_plt_order, is_got_plt_relro); } return this->got_; @@ -722,38 +795,49 @@ Target_i386::rel_dyn_section(Layout* layout) return this->rel_dyn_; } +// Get the section to use for IRELATIVE relocs, creating it if +// necessary. These go in .rel.dyn, but only after all other dynamic +// relocations. They need to follow the other dynamic relocations so +// that they can refer to global variables initialized by those +// relocs. + +Target_i386::Reloc_section* +Target_i386::rel_irelative_section(Layout* layout) +{ + if (this->rel_irelative_ == NULL) + { + // Make sure we have already create the dynamic reloc section. + this->rel_dyn_section(layout); + this->rel_irelative_ = new Reloc_section(false); + layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL, + elfcpp::SHF_ALLOC, this->rel_irelative_, + ORDER_DYNAMIC_RELOCS, false); + gold_assert(this->rel_dyn_->output_section() + == this->rel_irelative_->output_section()); + } + return this->rel_irelative_; +} + // Create the PLT section. The ordinary .got section is an argument, // since we need to refer to the start. We also create our own .got // section just for PLT entries. -Output_data_plt_i386::Output_data_plt_i386(Symbol_table* symtab, - Layout* layout, - Output_data_space* got_plt) - : Output_section_data(4), tls_desc_rel_(NULL), got_plt_(got_plt), count_(0), - global_ifuncs_(), local_ifuncs_() +Output_data_plt_i386::Output_data_plt_i386(Layout* layout, + Output_data_space* got_plt, + Output_data_space* got_irelative) + : Output_section_data(16), layout_(layout), tls_desc_rel_(NULL), + irelative_rel_(NULL), got_plt_(got_plt), got_irelative_(got_irelative), + count_(0), irelative_count_(0), global_ifuncs_(), local_ifuncs_() { this->rel_ = new Reloc_section(false); layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL, elfcpp::SHF_ALLOC, this->rel_, ORDER_DYNAMIC_PLT_RELOCS, false); - if (parameters->doing_static_link()) - { - // A statically linked executable will only have a .rel.plt - // section to hold R_386_IRELATIVE relocs for STT_GNU_IFUNC - // symbols. The library will use these symbols to locate the - // IRELATIVE relocs at program startup time. - symtab->define_in_output_data("__rel_iplt_start", NULL, - Symbol_table::PREDEFINED, - this->rel_, 0, 0, elfcpp::STT_NOTYPE, - elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, - 0, false, true); - symtab->define_in_output_data("__rel_iplt_end", NULL, - Symbol_table::PREDEFINED, - this->rel_, 0, 0, elfcpp::STT_NOTYPE, - elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, - 0, true, true); - } + // Add unwind information if requested. + if (parameters->options().ld_generated_unwind_info()) + layout->add_eh_frame_for_plt(this, plt_eh_frame_cie, plt_eh_frame_cie_size, + plt_eh_frame_fde, plt_eh_frame_fde_size); } void @@ -767,29 +851,23 @@ Output_data_plt_i386::do_adjust_output_section(Output_section* os) // Add an entry to the PLT. void -Output_data_plt_i386::add_entry(Symbol* gsym) +Output_data_plt_i386::add_entry(Symbol_table* symtab, Layout* layout, + Symbol* gsym) { gold_assert(!gsym->has_plt_offset()); - // Note that when setting the PLT offset we skip the initial - // reserved PLT entry. - gsym->set_plt_offset((this->count_ + 1) * plt_entry_size); - - ++this->count_; - - section_offset_type got_offset = this->got_plt_->current_data_size(); - - // Every PLT entry needs a GOT entry which points back to the PLT - // entry (this will be changed by the dynamic linker, normally - // lazily when the function is called). - this->got_plt_->set_current_data_size(got_offset + 4); - // Every PLT entry needs a reloc. if (gsym->type() == elfcpp::STT_GNU_IFUNC && gsym->can_use_relative_reloc(false)) { - this->rel_->add_symbolless_global_addend(gsym, elfcpp::R_386_IRELATIVE, - this->got_plt_, got_offset); + gsym->set_plt_offset(this->irelative_count_ * plt_entry_size); + ++this->irelative_count_; + section_offset_type got_offset = + this->got_irelative_->current_data_size(); + this->got_irelative_->set_current_data_size(got_offset + 4); + Reloc_section* rel = this->rel_irelative(symtab, layout); + rel->add_symbolless_global_addend(gsym, elfcpp::R_386_IRELATIVE, + this->got_irelative_, got_offset); struct Global_ifunc gi; gi.sym = gsym; gi.got_offset = got_offset; @@ -797,6 +875,19 @@ Output_data_plt_i386::add_entry(Symbol* gsym) } else { + // When setting the PLT offset we skip the initial reserved PLT + // entry. + gsym->set_plt_offset((this->count_ + 1) * plt_entry_size); + + ++this->count_; + + section_offset_type got_offset = this->got_plt_->current_data_size(); + + // Every PLT entry needs a GOT entry which points back to the + // PLT entry (this will be changed by the dynamic linker, + // normally lazily when the function is called). + this->got_plt_->set_current_data_size(got_offset + 4); + gsym->set_needs_dynsym_entry(); this->rel_->add_global(gsym, elfcpp::R_386_JUMP_SLOT, this->got_plt_, got_offset); @@ -811,22 +902,26 @@ Output_data_plt_i386::add_entry(Symbol* gsym) // the PLT offset. unsigned int -Output_data_plt_i386::add_local_ifunc_entry(Sized_relobj<32, false>* relobj, - unsigned int local_sym_index) +Output_data_plt_i386::add_local_ifunc_entry( + Symbol_table* symtab, + Layout* layout, + Sized_relobj_file<32, false>* relobj, + unsigned int local_sym_index) { - unsigned int plt_offset = (this->count_ + 1) * plt_entry_size; - ++this->count_; + unsigned int plt_offset = this->irelative_count_ * plt_entry_size; + ++this->irelative_count_; - section_offset_type got_offset = this->got_plt_->current_data_size(); + section_offset_type got_offset = this->got_irelative_->current_data_size(); // Every PLT entry needs a GOT entry which points back to the PLT // entry. - this->got_plt_->set_current_data_size(got_offset + 4); + this->got_irelative_->set_current_data_size(got_offset + 4); // Every PLT entry needs a reloc. - this->rel_->add_symbolless_local_addend(relobj, local_sym_index, - elfcpp::R_386_IRELATIVE, - this->got_plt_, got_offset); + Reloc_section* rel = this->rel_irelative(symtab, layout); + rel->add_symbolless_local_addend(relobj, local_sym_index, + elfcpp::R_386_IRELATIVE, + this->got_irelative_, got_offset); struct Local_ifunc li; li.object = relobj; @@ -849,15 +944,75 @@ Output_data_plt_i386::rel_tls_desc(Layout* layout) layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL, elfcpp::SHF_ALLOC, this->tls_desc_rel_, ORDER_DYNAMIC_PLT_RELOCS, false); - gold_assert(this->tls_desc_rel_->output_section() == - this->rel_->output_section()); + gold_assert(this->tls_desc_rel_->output_section() + == this->rel_->output_section()); } return this->tls_desc_rel_; } +// Return where the IRELATIVE relocations should go in the PLT. These +// follow the JUMP_SLOT and TLS_DESC relocations. + +Output_data_plt_i386::Reloc_section* +Output_data_plt_i386::rel_irelative(Symbol_table* symtab, Layout* layout) +{ + if (this->irelative_rel_ == NULL) + { + // Make sure we have a place for the TLS_DESC relocations, in + // case we see any later on. + this->rel_tls_desc(layout); + this->irelative_rel_ = new Reloc_section(false); + layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL, + elfcpp::SHF_ALLOC, this->irelative_rel_, + ORDER_DYNAMIC_PLT_RELOCS, false); + gold_assert(this->irelative_rel_->output_section() + == this->rel_->output_section()); + + if (parameters->doing_static_link()) + { + // A statically linked executable will only have a .rel.plt + // section to hold R_386_IRELATIVE relocs for STT_GNU_IFUNC + // symbols. The library will use these symbols to locate + // the IRELATIVE relocs at program startup time. + symtab->define_in_output_data("__rel_iplt_start", NULL, + Symbol_table::PREDEFINED, + this->irelative_rel_, 0, 0, + elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, + elfcpp::STV_HIDDEN, 0, false, true); + symtab->define_in_output_data("__rel_iplt_end", NULL, + Symbol_table::PREDEFINED, + this->irelative_rel_, 0, 0, + elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, + elfcpp::STV_HIDDEN, 0, true, true); + } + } + return this->irelative_rel_; +} + +// Return the PLT address to use for a global symbol. + +uint64_t +Output_data_plt_i386::address_for_global(const Symbol* gsym) +{ + uint64_t offset = 0; + if (gsym->type() == elfcpp::STT_GNU_IFUNC + && gsym->can_use_relative_reloc(false)) + offset = (this->count_ + 1) * plt_entry_size; + return this->address() + offset; +} + +// Return the PLT address to use for a local symbol. These are always +// IRELATIVE relocs. + +uint64_t +Output_data_plt_i386::address_for_local(const Relobj*, unsigned int) +{ + return this->address() + (this->count_ + 1) * plt_entry_size; +} + // The first entry in the PLT for an executable. -unsigned char Output_data_plt_i386::exec_first_plt_entry[plt_entry_size] = +const unsigned char Output_data_plt_i386::exec_first_plt_entry[plt_entry_size] = { 0xff, 0x35, // pushl contents of memory address 0, 0, 0, 0, // replaced with address of .got + 4 @@ -868,7 +1023,7 @@ unsigned char Output_data_plt_i386::exec_first_plt_entry[plt_entry_size] = // The first entry in the PLT for a shared object. -unsigned char Output_data_plt_i386::dyn_first_plt_entry[plt_entry_size] = +const unsigned char Output_data_plt_i386::dyn_first_plt_entry[plt_entry_size] = { 0xff, 0xb3, 4, 0, 0, 0, // pushl 4(%ebx) 0xff, 0xa3, 8, 0, 0, 0, // jmp *8(%ebx) @@ -877,7 +1032,7 @@ unsigned char Output_data_plt_i386::dyn_first_plt_entry[plt_entry_size] = // Subsequent entries in the PLT for an executable. -unsigned char Output_data_plt_i386::exec_plt_entry[plt_entry_size] = +const unsigned char Output_data_plt_i386::exec_plt_entry[plt_entry_size] = { 0xff, 0x25, // jmp indirect 0, 0, 0, 0, // replaced with address of symbol in .got @@ -889,7 +1044,7 @@ unsigned char Output_data_plt_i386::exec_plt_entry[plt_entry_size] = // Subsequent entries in the PLT for a shared object. -unsigned char Output_data_plt_i386::dyn_plt_entry[plt_entry_size] = +const unsigned char Output_data_plt_i386::dyn_plt_entry[plt_entry_size] = { 0xff, 0xa3, // jmp *offset(%ebx) 0, 0, 0, 0, // replaced with offset of symbol in .got @@ -899,6 +1054,54 @@ unsigned char Output_data_plt_i386::dyn_plt_entry[plt_entry_size] = 0, 0, 0, 0 // replaced with offset to start of .plt }; +// The .eh_frame unwind information for the PLT. + +const unsigned char +Output_data_plt_i386::plt_eh_frame_cie[plt_eh_frame_cie_size] = +{ + 1, // CIE version. + 'z', // Augmentation: augmentation size included. + 'R', // Augmentation: FDE encoding included. + '\0', // End of augmentation string. + 1, // Code alignment factor. + 0x7c, // Data alignment factor. + 8, // Return address column. + 1, // Augmentation size. + (elfcpp::DW_EH_PE_pcrel // FDE encoding. + | elfcpp::DW_EH_PE_sdata4), + elfcpp::DW_CFA_def_cfa, 4, 4, // DW_CFA_def_cfa: r4 (esp) ofs 4. + elfcpp::DW_CFA_offset + 8, 1, // DW_CFA_offset: r8 (eip) at cfa-4. + elfcpp::DW_CFA_nop, // Align to 16 bytes. + elfcpp::DW_CFA_nop +}; + +const unsigned char +Output_data_plt_i386::plt_eh_frame_fde[plt_eh_frame_fde_size] = +{ + 0, 0, 0, 0, // Replaced with offset to .plt. + 0, 0, 0, 0, // Replaced with size of .plt. + 0, // Augmentation size. + elfcpp::DW_CFA_def_cfa_offset, 8, // DW_CFA_def_cfa_offset: 8. + elfcpp::DW_CFA_advance_loc + 6, // Advance 6 to __PLT__ + 6. + elfcpp::DW_CFA_def_cfa_offset, 12, // DW_CFA_def_cfa_offset: 12. + elfcpp::DW_CFA_advance_loc + 10, // Advance 10 to __PLT__ + 16. + elfcpp::DW_CFA_def_cfa_expression, // DW_CFA_def_cfa_expression. + 11, // Block length. + elfcpp::DW_OP_breg4, 4, // Push %esp + 4. + elfcpp::DW_OP_breg8, 0, // Push %eip. + elfcpp::DW_OP_lit15, // Push 0xf. + elfcpp::DW_OP_and, // & (%eip & 0xf). + elfcpp::DW_OP_lit11, // Push 0xb. + elfcpp::DW_OP_ge, // >= ((%eip & 0xf) >= 0xb) + elfcpp::DW_OP_lit2, // Push 2. + elfcpp::DW_OP_shl, // << (((%eip & 0xf) >= 0xb) << 2) + elfcpp::DW_OP_plus, // + ((((%eip&0xf)>=0xb)<<2)+%esp+4 + elfcpp::DW_CFA_nop, // Align to 32 bytes. + elfcpp::DW_CFA_nop, + elfcpp::DW_CFA_nop, + elfcpp::DW_CFA_nop +}; + // Write out the PLT. This uses the hand-coded instructions above, // and adjusts them as needed. This is all specified by the i386 ELF // Processor Supplement. @@ -912,8 +1115,12 @@ Output_data_plt_i386::do_write(Output_file* of) unsigned char* const oview = of->get_output_view(offset, oview_size); const off_t got_file_offset = this->got_plt_->offset(); + gold_assert(parameters->incremental_update() + || (got_file_offset + this->got_plt_->data_size() + == this->got_irelative_->offset())); const section_size_type got_size = - convert_to_section_size_type(this->got_plt_->data_size()); + convert_to_section_size_type(this->got_plt_->data_size() + + this->got_irelative_->data_size()); unsigned char* const got_view = of->get_output_view(got_file_offset, got_size); @@ -934,15 +1141,23 @@ Output_data_plt_i386::do_write(Output_file* of) unsigned char* got_pov = got_view; - memset(got_pov, 0, 12); - got_pov += 12; + // The first entry in the GOT is the address of the .dynamic section + // aka the PT_DYNAMIC segment. The next two entries are reserved. + // We saved space for them when we created the section in + // Target_i386::got_section. + Output_section* dynamic = this->layout_->dynamic_section(); + uint32_t dynamic_addr = dynamic == NULL ? 0 : dynamic->address(); + elfcpp::Swap<32, false>::writeval(got_pov, dynamic_addr); + got_pov += 4; + memset(got_pov, 0, 8); + got_pov += 8; const int rel_size = elfcpp::Elf_sizes<32>::rel_size; unsigned int plt_offset = plt_entry_size; unsigned int plt_rel_offset = 0; unsigned int got_offset = 12; - const unsigned int count = this->count_; + const unsigned int count = this->count_ + this->irelative_count_; for (unsigned int i = 0; i < count; ++i, @@ -979,6 +1194,7 @@ Output_data_plt_i386::do_write(Output_file* of) // the GOT to point to the actual symbol value, rather than point to // the PLT entry. That will let the dynamic linker call the right // function when resolving IRELATIVE relocations. + unsigned char* got_irelative_view = got_view + this->got_plt_->data_size(); for (std::vector::const_iterator p = this->global_ifuncs_.begin(); p != this->global_ifuncs_.end(); @@ -986,7 +1202,7 @@ Output_data_plt_i386::do_write(Output_file* of) { const Sized_symbol<32>* ssym = static_cast*>(p->sym); - elfcpp::Swap<32, false>::writeval(got_view + p->got_offset, + elfcpp::Swap<32, false>::writeval(got_irelative_view + p->got_offset, ssym->value()); } @@ -997,7 +1213,7 @@ Output_data_plt_i386::do_write(Output_file* of) { const Symbol_value<32>* psymval = p->object->local_symbol(p->local_sym_index); - elfcpp::Swap<32, false>::writeval(got_view + p->got_offset, + elfcpp::Swap<32, false>::writeval(got_irelative_view + p->got_offset, psymval->value(p->object, 0)); } @@ -1018,7 +1234,8 @@ Target_i386::make_plt_section(Symbol_table* symtab, Layout* layout) // Create the GOT sections first. this->got_section(symtab, layout); - this->plt_ = new Output_data_plt_i386(symtab, layout, this->got_plt_); + this->plt_ = new Output_data_plt_i386(layout, this->got_plt_, + this->got_irelative_); layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS, (elfcpp::SHF_ALLOC | elfcpp::SHF_EXECINSTR), @@ -1039,21 +1256,22 @@ Target_i386::make_plt_entry(Symbol_table* symtab, Layout* layout, Symbol* gsym) return; if (this->plt_ == NULL) this->make_plt_section(symtab, layout); - this->plt_->add_entry(gsym); + this->plt_->add_entry(symtab, layout, gsym); } // Make a PLT entry for a local STT_GNU_IFUNC symbol. void Target_i386::make_local_ifunc_plt_entry(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, false>* relobj, + Sized_relobj_file<32, false>* relobj, unsigned int local_sym_index) { if (relobj->local_has_plt_offset(local_sym_index)) return; if (this->plt_ == NULL) this->make_plt_section(symtab, layout); - unsigned int plt_offset = this->plt_->add_local_ifunc_entry(relobj, + unsigned int plt_offset = this->plt_->add_local_ifunc_entry(symtab, layout, + relobj, local_sym_index); relobj->set_local_plt_offset(local_sym_index, plt_offset); } @@ -1122,7 +1340,7 @@ Target_i386::define_tls_base_symbol(Symbol_table* symtab, Layout* layout) unsigned int Target_i386::got_mod_index_entry(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, false>* object) + Sized_relobj_file<32, false>* object) { if (this->got_mod_index_offset_ == -1U) { @@ -1268,7 +1486,7 @@ Target_i386::Scan::get_reference_flags(unsigned int r_type) // Report an unsupported relocation against a local symbol. void -Target_i386::Scan::unsupported_reloc_local(Sized_relobj<32, false>* object, +Target_i386::Scan::unsupported_reloc_local(Sized_relobj_file<32, false>* object, unsigned int r_type) { gold_error(_("%s: unsupported reloc %u against local symbol"), @@ -1279,8 +1497,9 @@ Target_i386::Scan::unsupported_reloc_local(Sized_relobj<32, false>* object, // given type against a STT_GNU_IFUNC symbol. bool -Target_i386::Scan::reloc_needs_plt_for_ifunc(Sized_relobj<32, false>* object, - unsigned int r_type) +Target_i386::Scan::reloc_needs_plt_for_ifunc( + Sized_relobj_file<32, false>* object, + unsigned int r_type) { int flags = Scan::get_reference_flags(r_type); if (flags & Symbol::TLS_REF) @@ -1295,7 +1514,7 @@ inline void Target_i386::Scan::local(Symbol_table* symtab, Layout* layout, Target_i386* target, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rel<32, false>& reloc, @@ -1597,9 +1816,10 @@ Target_i386::Scan::local(Symbol_table* symtab, // Report an unsupported relocation against a global symbol. void -Target_i386::Scan::unsupported_reloc_global(Sized_relobj<32, false>* object, - unsigned int r_type, - Symbol* gsym) +Target_i386::Scan::unsupported_reloc_global( + Sized_relobj_file<32, false>* object, + unsigned int r_type, + Symbol* gsym) { gold_error(_("%s: unsupported reloc %u against global symbol %s"), object->name().c_str(), r_type, gsym->demangled_name().c_str()); @@ -1629,7 +1849,7 @@ Target_i386::Scan::local_reloc_may_be_function_pointer( Symbol_table* , Layout* , Target_i386* , - Sized_relobj<32, false>* , + Sized_relobj_file<32, false>* , unsigned int , Output_section* , const elfcpp::Rel<32, false>& , @@ -1644,7 +1864,7 @@ Target_i386::Scan::global_reloc_may_be_function_pointer( Symbol_table* , Layout* , Target_i386* , - Sized_relobj<32, false>* , + Sized_relobj_file<32, false>* , unsigned int , Output_section* , const elfcpp::Rel<32, false>& , @@ -1660,7 +1880,7 @@ inline void Target_i386::Scan::global(Symbol_table* symtab, Layout* layout, Target_i386* target, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rel<32, false>& reloc, @@ -1713,7 +1933,7 @@ Target_i386::Scan::global(Symbol_table* symtab, // STT_GNU_IFUNC symbol. This makes a function // address in a PIE executable match the address in a // shared library that it links against. - Reloc_section* rel_dyn = target->rel_dyn_section(layout); + Reloc_section* rel_dyn = target->rel_irelative_section(layout); rel_dyn->add_symbolless_global_addend(gsym, elfcpp::R_386_IRELATIVE, output_section, @@ -1790,9 +2010,24 @@ Target_i386::Scan::global(Symbol_table* symtab, // If this symbol is not fully resolved, we need to add a // GOT entry with a dynamic relocation. Reloc_section* rel_dyn = target->rel_dyn_section(layout); + + // Use a GLOB_DAT rather than a RELATIVE reloc if: + // + // 1) The symbol may be defined in some other module. + // + // 2) We are building a shared library and this is a + // protected symbol; using GLOB_DAT means that the dynamic + // linker can use the address of the PLT in the main + // executable when appropriate so that function address + // comparisons work. + // + // 3) This is a STT_GNU_IFUNC symbol in position dependent + // code, again so that function address comparisons work. if (gsym->is_from_dynobj() || gsym->is_undefined() || gsym->is_preemptible() + || (gsym->visibility() == elfcpp::STV_PROTECTED + && parameters->options().shared()) || (gsym->type() == elfcpp::STT_GNU_IFUNC && parameters->options().output_is_position_independent())) got->add_global_with_rel(gsym, GOT_TYPE_STANDARD, @@ -2025,7 +2260,7 @@ Target_i386::Scan::global(Symbol_table* symtab, void Target_i386::gc_process_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, unsigned int, const unsigned char* prelocs, @@ -2056,7 +2291,7 @@ Target_i386::gc_process_relocs(Symbol_table* symtab, void Target_i386::scan_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -2115,6 +2350,47 @@ Target_i386::do_finalize_sections( uint32_t data_size = this->got_plt_->current_data_size(); symtab->get_sized_symbol<32>(sym)->set_symsize(data_size); } + + if (parameters->doing_static_link() + && (this->plt_ == NULL || !this->plt_->has_irelative_section())) + { + // If linking statically, make sure that the __rel_iplt symbols + // were defined if necessary, even if we didn't create a PLT. + static const Define_symbol_in_segment syms[] = + { + { + "__rel_iplt_start", // name + elfcpp::PT_LOAD, // segment_type + elfcpp::PF_W, // segment_flags_set + elfcpp::PF(0), // segment_flags_clear + 0, // value + 0, // size + elfcpp::STT_NOTYPE, // type + elfcpp::STB_GLOBAL, // binding + elfcpp::STV_HIDDEN, // visibility + 0, // nonvis + Symbol::SEGMENT_START, // offset_from_base + true // only_if_ref + }, + { + "__rel_iplt_end", // name + elfcpp::PT_LOAD, // segment_type + elfcpp::PF_W, // segment_flags_set + elfcpp::PF(0), // segment_flags_clear + 0, // value + 0, // size + elfcpp::STT_NOTYPE, // type + elfcpp::STB_GLOBAL, // binding + elfcpp::STV_HIDDEN, // visibility + 0, // nonvis + Symbol::SEGMENT_START, // offset_from_base + true // only_if_ref + } + }; + + symtab->define_symbols(layout, 2, syms, + layout->script_options()->saw_sections_clause()); + } } // Return whether a direct absolute static relocation needs to be applied. @@ -2187,7 +2463,7 @@ Target_i386::Relocate::relocate(const Relocate_info<32, false>* relinfo, } } - const Sized_relobj<32, false>* object = relinfo->object; + const Sized_relobj_file<32, false>* object = relinfo->object; // Pick the value to use for symbols defined in shared objects. Symbol_value<32> symval; @@ -2206,7 +2482,7 @@ Target_i386::Relocate::relocate(const Relocate_info<32, false>* relinfo, else if (gsym != NULL && gsym->use_plt_offset(Scan::get_reference_flags(r_type))) { - symval.set_output_value(target->plt_section()->address() + symval.set_output_value(target->plt_address_for_global(gsym) + gsym->plt_offset()); psymval = &symval; } @@ -2215,7 +2491,7 @@ Target_i386::Relocate::relocate(const Relocate_info<32, false>* relinfo, unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); if (object->local_has_plt_offset(r_sym)) { - symval.set_output_value(target->plt_section()->address() + symval.set_output_value(target->plt_address_for_local(object, r_sym) + object->local_plt_offset(r_sym)); psymval = &symval; } @@ -2388,7 +2664,7 @@ Target_i386::Relocate::relocate_tls(const Relocate_info<32, false>* relinfo, { Output_segment* tls_segment = relinfo->layout->tls_segment(); - const Sized_relobj<32, false>* object = relinfo->object; + const Sized_relobj_file<32, false>* object = relinfo->object; elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0); @@ -2402,7 +2678,12 @@ Target_i386::Relocate::relocate_tls(const Relocate_info<32, false>* relinfo, case elfcpp::R_386_TLS_GD: // Global-dynamic if (optimized_type == tls::TLSOPT_TO_LE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } this->tls_gd_to_le(relinfo, relnum, tls_segment, rel, r_type, value, view, view_size); @@ -2428,7 +2709,12 @@ Target_i386::Relocate::relocate_tls(const Relocate_info<32, false>* relinfo, } if (optimized_type == tls::TLSOPT_TO_IE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } this->tls_gd_to_ie(relinfo, relnum, tls_segment, rel, r_type, got_offset, view, view_size); break; @@ -2451,7 +2737,12 @@ Target_i386::Relocate::relocate_tls(const Relocate_info<32, false>* relinfo, this->local_dynamic_type_ = LOCAL_DYNAMIC_GNU; if (optimized_type == tls::TLSOPT_TO_LE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } this->tls_desc_gd_to_le(relinfo, relnum, tls_segment, rel, r_type, value, view, view_size); @@ -2486,7 +2777,12 @@ Target_i386::Relocate::relocate_tls(const Relocate_info<32, false>* relinfo, } if (optimized_type == tls::TLSOPT_TO_IE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } this->tls_desc_gd_to_ie(relinfo, relnum, tls_segment, rel, r_type, got_offset, view, view_size); break; @@ -2518,7 +2814,12 @@ Target_i386::Relocate::relocate_tls(const Relocate_info<32, false>* relinfo, this->local_dynamic_type_ = LOCAL_DYNAMIC_GNU; if (optimized_type == tls::TLSOPT_TO_LE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } this->tls_ld_to_le(relinfo, relnum, tls_segment, rel, r_type, value, view, view_size); break; @@ -2549,7 +2850,12 @@ Target_i386::Relocate::relocate_tls(const Relocate_info<32, false>* relinfo, elfcpp::Shdr<32, false> shdr(relinfo->data_shdr); if ((shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) != 0) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } value -= tls_segment->memsz(); } } @@ -2561,7 +2867,12 @@ Target_i386::Relocate::relocate_tls(const Relocate_info<32, false>* relinfo, case elfcpp::R_386_TLS_IE_32: if (optimized_type == tls::TLSOPT_TO_LE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } Target_i386::Relocate::tls_ie_to_le(relinfo, relnum, tls_segment, rel, r_type, value, view, view_size); @@ -2605,7 +2916,12 @@ Target_i386::Relocate::relocate_tls(const Relocate_info<32, false>* relinfo, // have been created for this location, so do not apply it now. if (!parameters->options().shared()) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } value -= tls_segment->memsz(); Relocate_functions<32, false>::rel32(view, value); } @@ -2616,7 +2932,12 @@ Target_i386::Relocate::relocate_tls(const Relocate_info<32, false>* relinfo, // have been created for this location, so do not apply it now. if (!parameters->options().shared()) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } value = tls_segment->memsz() - value; Relocate_functions<32, false>::rel32(view, value); } @@ -3066,7 +3387,7 @@ Target_i386::Relocatable_size_for_reloc::get_size_for_reloc( void Target_i386::scan_relocatable_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -3139,7 +3460,7 @@ uint64_t Target_i386::do_dynsym_value(const Symbol* gsym) const { gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset()); - return this->plt_section()->address() + gsym->plt_offset(); + return this->plt_address_for_global(gsym) + gsym->plt_offset(); } // Return a string used to fill a code section with nops to take up @@ -3205,6 +3526,21 @@ Target_i386::do_code_fill(section_size_type length) const return std::string(nops[length], length); } +// Return the value to use for the base of a DW_EH_PE_datarel offset +// in an FDE. Solaris and SVR4 use DW_EH_PE_datarel because their +// assembler can not write out the difference between two labels in +// different sections, so instead of using a pc-relative value they +// use an offset from the GOT. + +uint64_t +Target_i386::do_ehframe_datarel_base() const +{ + gold_assert(this->global_offset_table_ != NULL); + Symbol* sym = this->global_offset_table_; + Sized_symbol<32>* ssym = static_cast*>(sym); + return ssym->value(); +} + // Return whether SYM should be treated as a call to a non-split // function. We don't want that to be true of a call to a // get_pc_thunk function. @@ -3282,7 +3618,8 @@ class Target_selector_i386 : public Target_selector_freebsd public: Target_selector_i386() : Target_selector_freebsd(elfcpp::EM_386, 32, false, - "elf32-i386", "elf32-i386-freebsd") + "elf32-i386", "elf32-i386-freebsd", + "elf_i386") { } Target* diff --git a/gold/icf.cc b/gold/icf.cc index 09dcba6..5935c5b 100644 --- a/gold/icf.cc +++ b/gold/icf.cc @@ -1,6 +1,6 @@ // icf.cc -- Identical Code Folding. // -// Copyright 2009, 2010 Free Software Foundation, Inc. +// Copyright 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Sriraman Tallam . // This file is part of gold. @@ -373,7 +373,7 @@ get_section_contents(bool first_iteration, // This reloc points to a merge section. Hash the // contents of this section. if ((secn_flags & elfcpp::SHF_MERGE) != 0 - && parameters->target().can_icf_inline_merge_sections ()) + && parameters->target().can_icf_inline_merge_sections()) { uint64_t entsize = (it_v->first)->section_entsize(it_v->second); diff --git a/gold/incremental-dump.cc b/gold/incremental-dump.cc index 3a77ee8..fb3d25f 100644 --- a/gold/incremental-dump.cc +++ b/gold/incremental-dump.cc @@ -138,18 +138,23 @@ dump_incremental_inputs(const char* argv0, const char* filename, switch (input_type) { case INCREMENTAL_INPUT_OBJECT: - printf("Object\n"); - printf(" Input section count: %d\n", - input_file.get_input_section_count()); - printf(" Symbol count: %d\n", - input_file.get_global_symbol_count()); - break; case INCREMENTAL_INPUT_ARCHIVE_MEMBER: - printf("Archive member\n"); + printf("%s\n", (input_type == INCREMENTAL_INPUT_OBJECT + ? "Object" : "Archive member")); printf(" Input section count: %d\n", input_file.get_input_section_count()); - printf(" Symbol count: %d\n", + printf(" Global symbol count: %d\n", input_file.get_global_symbol_count()); + printf(" Local symbol offset: %d\n", + input_file.get_local_symbol_offset()); + printf(" Local symbol count: %d\n", + input_file.get_local_symbol_count()); + printf(" First dynamic reloc: %d\n", + input_file.get_first_dyn_reloc()); + printf(" Dynamic reloc count: %d\n", + input_file.get_dyn_reloc_count()); + printf(" COMDAT group count: %d\n", + input_file.get_comdat_group_count()); break; case INCREMENTAL_INPUT_ARCHIVE: printf("Archive\n"); @@ -159,6 +164,10 @@ dump_incremental_inputs(const char* argv0, const char* filename, break; case INCREMENTAL_INPUT_SHARED_LIBRARY: printf("Shared library\n"); + printf(" As needed: %s\n", + input_file.as_needed() ? "true" : "false"); + printf(" soname: %s\n", + input_file.get_soname()); printf(" Symbol count: %d\n", input_file.get_global_symbol_count()); break; @@ -205,6 +214,11 @@ dump_incremental_inputs(const char* argv0, const char* filename, static_cast(info.sh_size), info.name); } + + unsigned int ncomdat = input_file.get_comdat_group_count(); + for (unsigned int i = 0; i < ncomdat; ++i) + printf(" Comdat group: %s\n", + input_file.get_comdat_group_signature(i)); } // Get a view of the .symtab section. @@ -279,8 +293,9 @@ dump_incremental_inputs(const char* argv0, const char* filename, for (unsigned int symndx = 0; symndx < nsyms; ++symndx) { bool is_def; + bool is_copy; unsigned int output_symndx = - input_file.get_output_symbol_index(symndx, &is_def); + input_file.get_output_symbol_index(symndx, &is_def, &is_copy); sym_p = symtab_view.data() + output_symndx * sym_size; elfcpp::Sym sym(sym_p); const char* symname; @@ -289,7 +304,7 @@ dump_incremental_inputs(const char* argv0, const char* filename, printf(" %6d %6s %8s %8s %8s %8s %-5s %s\n", output_symndx, "", "", "", "", "", - is_def ? "DEF" : "UNDEF", + is_copy ? "COPY" : (is_def ? "DEF" : "UNDEF"), symname); } } @@ -307,12 +322,14 @@ dump_incremental_inputs(const char* argv0, const char* filename, symname = ""; printf(" %6d %6d %8d %8d %8d %8d %-5s %s\n", output_symndx, - info.shndx(), + info.shndx() == -1U ? -1 : info.shndx(), input_file.get_symbol_offset(symndx), info.next_offset(), info.reloc_count(), info.reloc_offset(), - info.shndx() != elfcpp::SHN_UNDEF ? "DEF" : "UNDEF", + (info.shndx() == -1U + ? "BASE" + : info.shndx() == 0 ? "UNDEF" : "DEF"), symname); } } @@ -369,24 +386,26 @@ dump_incremental_inputs(const char* argv0, const char* filename, for (unsigned int i = 0; i < ngot; ++i) { unsigned int got_type = igot_plt.get_got_type(i); - unsigned int got_desc = igot_plt.get_got_desc(i); + unsigned int got_symndx = igot_plt.get_got_symndx(i); + unsigned int got_input_index = igot_plt.get_got_input_index(i); printf("[%d] type %02x, ", i, got_type & 0x7f); - if (got_type == 0x7f) + if ((got_type & 0x7f) == 0x7f) printf("reserved"); else if (got_type & 0x80) { - Entry_reader input_file = incremental_inputs.input_file(got_desc); + Entry_reader input_file = + incremental_inputs.input_file(got_input_index); const char* objname = input_file.filename(); - printf("local: %s (%d)", objname, got_desc); + printf("local: %s (%d)", objname, got_symndx); } else { - sym_p = symtab_view.data() + got_desc * sym_size; + sym_p = symtab_view.data() + got_symndx * sym_size; elfcpp::Sym sym(sym_p); const char* symname; if (!strtab.get_c_string(sym.get_st_name(), &symname)) symname = ""; - printf("global %s (%d)", symname, got_desc); + printf("global %s (%d)", symname, got_symndx); } printf("\n"); } @@ -440,10 +459,10 @@ main(int argc, char** argv) Output_file* file = new Output_file(filename); - bool t = file->open_for_modification(); + bool t = file->open_base_file(NULL, false); if (!t) { - fprintf(stderr, "%s: open_for_modification(%s): %s\n", argv[0], filename, + fprintf(stderr, "%s: open_base_file(%s): %s\n", argv[0], filename, strerror(errno)); return 1; } diff --git a/gold/incremental.cc b/gold/incremental.cc index ba89e05..b422827 100644 --- a/gold/incremental.cc +++ b/gold/incremental.cc @@ -1,6 +1,6 @@ // inremental.cc -- incremental linking support for gold -// Copyright 2009, 2010 Free Software Foundation, Inc. +// Copyright 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Mikolaj Zalewski . // This file is part of gold. @@ -22,6 +22,7 @@ #include "gold.h" +#include #include #include "libiberty.h" @@ -160,6 +161,22 @@ Incremental_binary::error(const char* format, ...) const va_end(args); } +// Return TRUE if a section of type SH_TYPE can be updated in place +// during an incremental update. We can update sections of type PROGBITS, +// NOBITS, INIT_ARRAY, FINI_ARRAY, PREINIT_ARRAY, and NOTE. All others +// will be regenerated. + +bool +can_incremental_update(unsigned int sh_type) +{ + return (sh_type == elfcpp::SHT_PROGBITS + || sh_type == elfcpp::SHT_NOBITS + || sh_type == elfcpp::SHT_INIT_ARRAY + || sh_type == elfcpp::SHT_FINI_ARRAY + || sh_type == elfcpp::SHT_PREINIT_ARRAY + || sh_type == elfcpp::SHT_NOTE); +} + // Find the .gnu_incremental_inputs section and related sections. template @@ -258,11 +275,25 @@ Sized_incremental_binary::setup_readers() this->got_plt_reader_ = Incremental_got_plt_reader(got_plt_view.data()); + // Find the main symbol table. + unsigned int main_symtab_shndx = + this->elf_file_.find_section_by_type(elfcpp::SHT_SYMTAB); + gold_assert(main_symtab_shndx != elfcpp::SHN_UNDEF); + this->main_symtab_loc_ = this->elf_file_.section_contents(main_symtab_shndx); + + // Find the main symbol string table. + unsigned int main_strtab_shndx = + this->elf_file_.section_link(main_symtab_shndx); + gold_assert(main_strtab_shndx != elfcpp::SHN_UNDEF + && main_strtab_shndx < this->elf_file_.shnum()); + this->main_strtab_loc_ = this->elf_file_.section_contents(main_strtab_shndx); + // Walk the list of input files (a) to setup an Input_reader for each // input file, and (b) to record maps of files added from archive // libraries and scripts. Incremental_inputs_reader& inputs = this->inputs_reader_; unsigned int count = inputs.input_file_count(); + this->input_objects_.resize(count); this->input_entry_readers_.reserve(count); this->library_map_.resize(count); this->script_map_.resize(count); @@ -294,7 +325,7 @@ Sized_incremental_binary::setup_readers() break; case INCREMENTAL_INPUT_SCRIPT: { - Script_info* script = new Script_info(input_file.filename()); + Script_info* script = new Script_info(input_file.filename(), i); this->script_map_[i] = script; unsigned int object_count = input_file.get_object_count(); for (unsigned int j = 0; j < object_count; j++) @@ -310,6 +341,10 @@ Sized_incremental_binary::setup_readers() } } + // Initialize the map of global symbols. + unsigned int nglobals = this->symtab_reader_.symbol_count(); + this->symbol_map_.resize(nglobals); + this->has_incremental_info_ = true; } @@ -374,6 +409,12 @@ Sized_incremental_binary::do_check_inputs( if (incremental_inputs->command_line() != inputs.command_line()) { + gold_debug(DEBUG_INCREMENTAL, + "old command line: %s", + inputs.command_line()); + gold_debug(DEBUG_INCREMENTAL, + "new command line: %s", + incremental_inputs->command_line().c_str()); explain_no_incremental(_("command line changed")); return false; } @@ -423,10 +464,24 @@ Sized_incremental_binary::do_file_has_changed( { Input_entry_reader input_file = this->inputs_reader_.input_file(n); Incremental_disposition disp = INCREMENTAL_CHECK; + + // For files named in scripts, find the file that was actually named + // on the command line, so that we can get the incremental disposition + // flag. + Script_info* script = this->get_script_info(n); + if (script != NULL) + n = script->input_file_index(); + const Input_argument* input_argument = this->get_input_argument(n); if (input_argument != NULL) disp = input_argument->file().options().incremental_disposition(); + // For files at the beginning of the command line (i.e., those added + // implicitly by gcc), check whether the --incremental-startup-unchanged + // option was used. + if (disp == INCREMENTAL_STARTUP) + disp = parameters->options().incremental_startup_disposition(); + if (disp != INCREMENTAL_CHECK) return disp == INCREMENTAL_CHANGED; @@ -500,11 +555,45 @@ void Sized_incremental_binary::do_reserve_layout( unsigned int input_file_index) { + const int sym_size = elfcpp::Elf_sizes::sym_size; + Input_entry_reader input_file = this->inputs_reader_.input_file(input_file_index); if (input_file.type() == INCREMENTAL_INPUT_SHARED_LIBRARY) - return; + { + // Reserve the BSS space used for COPY relocations. + unsigned int nsyms = input_file.get_global_symbol_count(); + Incremental_binary::View symtab_view(NULL); + unsigned int symtab_count; + elfcpp::Elf_strtab strtab(NULL, 0); + this->get_symtab_view(&symtab_view, &symtab_count, &strtab); + for (unsigned int i = 0; i < nsyms; ++i) + { + bool is_def; + bool is_copy; + unsigned int output_symndx = + input_file.get_output_symbol_index(i, &is_def, &is_copy); + if (is_copy) + { + const unsigned char* sym_p = (symtab_view.data() + + output_symndx * sym_size); + elfcpp::Sym gsym(sym_p); + unsigned int shndx = gsym.get_st_shndx(); + if (shndx < 1 || shndx >= this->section_map_.size()) + continue; + Output_section* os = this->section_map_[shndx]; + off_t offset = gsym.get_st_value() - os->address(); + os->reserve(offset, gsym.get_st_size()); + gold_debug(DEBUG_INCREMENTAL, + "Reserve for COPY reloc: %s, off %d, size %d", + os->name(), + static_cast(offset), + static_cast(gsym.get_st_size())); + } + } + return; + } unsigned int shnum = input_file.get_input_section_count(); for (unsigned int i = 0; i < shnum; i++) @@ -519,6 +608,209 @@ Sized_incremental_binary::do_reserve_layout( } } +// Process the GOT and PLT entries from the existing output file. + +template +void +Sized_incremental_binary::do_process_got_plt( + Symbol_table* symtab, + Layout* layout) +{ + Incremental_got_plt_reader got_plt_reader(this->got_plt_reader()); + Sized_target* target = + parameters->sized_target(); + + // Get the number of symbols in the main symbol table and in the + // incremental symbol table. The difference between the two counts + // is the index of the first forced-local or global symbol in the + // main symbol table. + unsigned int symtab_count = + this->main_symtab_loc_.data_size / elfcpp::Elf_sizes::sym_size; + unsigned int isym_count = this->symtab_reader_.symbol_count(); + unsigned int first_global = symtab_count - isym_count; + + // Tell the target how big the GOT and PLT sections are. + unsigned int got_count = got_plt_reader.get_got_entry_count(); + unsigned int plt_count = got_plt_reader.get_plt_entry_count(); + Output_data_got* got = + target->init_got_plt_for_update(symtab, layout, got_count, plt_count); + + // Read the GOT entries from the base file and build the outgoing GOT. + for (unsigned int i = 0; i < got_count; ++i) + { + unsigned int got_type = got_plt_reader.get_got_type(i); + if ((got_type & 0x7f) == 0x7f) + { + // This is the second entry of a pair. + got->reserve_slot(i); + continue; + } + unsigned int symndx = got_plt_reader.get_got_symndx(i); + if (got_type & 0x80) + { + // This is an entry for a local symbol. Ignore this entry if + // the object file was replaced. + unsigned int input_index = got_plt_reader.get_got_input_index(i); + gold_debug(DEBUG_INCREMENTAL, + "GOT entry %d, type %02x: (local symbol)", + i, got_type & 0x7f); + Sized_relobj_incr* obj = + this->input_object(input_index); + if (obj != NULL) + target->reserve_local_got_entry(i, obj, symndx, got_type & 0x7f); + } + else + { + // This is an entry for a global symbol. GOT_DESC is the symbol + // table index. + // FIXME: This should really be a fatal error (corrupt input). + gold_assert(symndx >= first_global && symndx < symtab_count); + Symbol* sym = this->global_symbol(symndx - first_global); + // Add the GOT entry only if the symbol is still referenced. + if (sym != NULL && sym->in_reg()) + { + gold_debug(DEBUG_INCREMENTAL, + "GOT entry %d, type %02x: %s", + i, got_type, sym->name()); + target->reserve_global_got_entry(i, sym, got_type); + } + } + } + + // Read the PLT entries from the base file and pass each to the target. + for (unsigned int i = 0; i < plt_count; ++i) + { + unsigned int plt_desc = got_plt_reader.get_plt_desc(i); + // FIXME: This should really be a fatal error (corrupt input). + gold_assert(plt_desc >= first_global && plt_desc < symtab_count); + Symbol* sym = this->global_symbol(plt_desc - first_global); + // Add the PLT entry only if the symbol is still referenced. + if (sym->in_reg()) + { + gold_debug(DEBUG_INCREMENTAL, + "PLT entry %d: %s", + i, sym->name()); + target->register_global_plt_entry(symtab, layout, i, sym); + } + } +} + +// Emit COPY relocations from the existing output file. + +template +void +Sized_incremental_binary::do_emit_copy_relocs( + Symbol_table* symtab) +{ + Sized_target* target = + parameters->sized_target(); + + for (typename Copy_relocs::iterator p = this->copy_relocs_.begin(); + p != this->copy_relocs_.end(); + ++p) + { + if (!(*p).symbol->is_copied_from_dynobj()) + target->emit_copy_reloc(symtab, (*p).symbol, (*p).output_section, + (*p).offset); + } +} + +// Apply incremental relocations for symbols whose values have changed. + +template +void +Sized_incremental_binary::do_apply_incremental_relocs( + const Symbol_table* symtab, + Layout* layout, + Output_file* of) +{ + typedef typename elfcpp::Elf_types::Elf_Addr Address; + typedef typename elfcpp::Elf_types::Elf_Swxword Addend; + Incremental_symtab_reader isymtab(this->symtab_reader()); + Incremental_relocs_reader irelocs(this->relocs_reader()); + unsigned int nglobals = isymtab.symbol_count(); + const unsigned int incr_reloc_size = irelocs.reloc_size; + + Relocate_info relinfo; + relinfo.symtab = symtab; + relinfo.layout = layout; + relinfo.object = NULL; + relinfo.reloc_shndx = 0; + relinfo.reloc_shdr = NULL; + relinfo.data_shndx = 0; + relinfo.data_shdr = NULL; + + Sized_target* target = + parameters->sized_target(); + + for (unsigned int i = 0; i < nglobals; i++) + { + const Symbol* gsym = this->global_symbol(i); + + // If the symbol is not referenced from any unchanged input files, + // we do not need to reapply any of its relocations. + if (gsym == NULL) + continue; + + // If the symbol is defined in an unchanged file, we do not need to + // reapply any of its relocations. + if (gsym->source() == Symbol::FROM_OBJECT + && gsym->object()->is_incremental()) + continue; + + gold_debug(DEBUG_INCREMENTAL, + "Applying incremental relocations for global symbol %s [%d]", + gsym->name(), i); + + // Follow the linked list of input symbol table entries for this symbol. + // We don't bother to figure out whether the symbol table entry belongs + // to a changed or unchanged file because it's easier just to apply all + // the relocations -- although we might scribble over an area that has + // been reallocated, we do this before copying any new data into the + // output file. + unsigned int offset = isymtab.get_list_head(i); + while (offset > 0) + { + Incremental_global_symbol_reader sym_info = + this->inputs_reader().global_symbol_reader_at_offset(offset); + unsigned int r_base = sym_info.reloc_offset(); + unsigned int r_count = sym_info.reloc_count(); + + // Apply each relocation for this symbol table entry. + for (unsigned int j = 0; j < r_count; + ++j, r_base += incr_reloc_size) + { + unsigned int r_type = irelocs.get_r_type(r_base); + unsigned int r_shndx = irelocs.get_r_shndx(r_base); + Address r_offset = irelocs.get_r_offset(r_base); + Addend r_addend = irelocs.get_r_addend(r_base); + Output_section* os = this->output_section(r_shndx); + Address address = os->address(); + off_t section_offset = os->offset(); + size_t view_size = os->data_size(); + unsigned char* const view = of->get_output_view(section_offset, + view_size); + + gold_debug(DEBUG_INCREMENTAL, + " %08lx: %s + %d: type %d addend %ld", + (long)(section_offset + r_offset), + os->name(), + (int)r_offset, + r_type, + (long)r_addend); + + target->apply_relocation(&relinfo, r_offset, r_type, r_addend, + gsym, view, address, view_size); + + // FIXME: Do something more efficient if write_output_view + // ever becomes more than a no-op. + of->write_output_view(section_offset, view_size, view); + } + offset = sym_info.next_offset(); + } + } +} + // Get a view of the main symbol table and the symbol string table. template @@ -528,20 +820,12 @@ Sized_incremental_binary::get_symtab_view( unsigned int* nsyms, elfcpp::Elf_strtab* strtab) { - unsigned int symtab_shndx = - this->elf_file_.find_section_by_type(elfcpp::SHT_SYMTAB); - gold_assert(symtab_shndx != elfcpp::SHN_UNDEF); - Location symtab_location(this->elf_file_.section_contents(symtab_shndx)); - *symtab_view = this->view(symtab_location); - *nsyms = symtab_location.data_size / elfcpp::Elf_sizes::sym_size; - - unsigned int strtab_shndx = this->elf_file_.section_link(symtab_shndx); - gold_assert(strtab_shndx != elfcpp::SHN_UNDEF - && strtab_shndx < this->elf_file_.shnum()); + *symtab_view = this->view(this->main_symtab_loc_); + *nsyms = this->main_symtab_loc_.data_size / elfcpp::Elf_sizes::sym_size; - Location strtab_location(this->elf_file_.section_contents(strtab_shndx)); - View strtab_view(this->view(strtab_location)); - *strtab = elfcpp::Elf_strtab(strtab_view.data(), strtab_location.data_size); + View strtab_view(this->view(this->main_strtab_loc_)); + *strtab = elfcpp::Elf_strtab(strtab_view.data(), + this->main_strtab_loc_.data_size); } namespace @@ -676,8 +960,20 @@ Incremental_inputs::report_command_line(int argc, const char* const* argv) || strcmp(argv[i], "--incremental-changed") == 0 || strcmp(argv[i], "--incremental-unchanged") == 0 || strcmp(argv[i], "--incremental-unknown") == 0 + || strcmp(argv[i], "--incremental-startup-unchanged") == 0 + || is_prefix_of("--incremental-base=", argv[i]) + || is_prefix_of("--incremental-patch=", argv[i]) || is_prefix_of("--debug=", argv[i])) continue; + if (strcmp(argv[i], "--incremental-base") == 0 + || strcmp(argv[i], "--incremental-patch") == 0 + || strcmp(argv[i], "--debug") == 0) + { + // When these options are used without the '=', skip the + // following parameter as well. + ++i; + continue; + } args.append(" '"); // Now append argv[i], but with all single-quotes escaped @@ -790,33 +1086,51 @@ Incremental_inputs::report_object(Object* obj, unsigned int arg_serial, arg_serial = 0; this->strtab_->add(obj->name().c_str(), false, &filename_key); - Incremental_object_entry* obj_entry = - new Incremental_object_entry(filename_key, obj, arg_serial, mtime); - if (obj->is_in_system_directory()) - obj_entry->set_is_in_system_directory(); - this->inputs_.push_back(obj_entry); - if (arch != NULL) + Incremental_input_entry* input_entry; + + this->current_object_ = obj; + + if (!obj->is_dynamic()) + { + this->current_object_entry_ = + new Incremental_object_entry(filename_key, obj, arg_serial, mtime); + input_entry = this->current_object_entry_; + if (arch != NULL) + { + Incremental_archive_entry* arch_entry = arch->incremental_info(); + gold_assert(arch_entry != NULL); + arch_entry->add_object(this->current_object_entry_); + } + } + else { - Incremental_archive_entry* arch_entry = arch->incremental_info(); - gold_assert(arch_entry != NULL); - arch_entry->add_object(obj_entry); + this->current_object_entry_ = NULL; + Stringpool::Key soname_key; + Dynobj* dynobj = obj->dynobj(); + gold_assert(dynobj != NULL); + this->strtab_->add(dynobj->soname(), false, &soname_key); + input_entry = new Incremental_dynobj_entry(filename_key, soname_key, obj, + arg_serial, mtime); } + if (obj->is_in_system_directory()) + input_entry->set_is_in_system_directory(); + + if (obj->as_needed()) + input_entry->set_as_needed(); + + this->inputs_.push_back(input_entry); + if (script_info != NULL) { Incremental_script_entry* script_entry = script_info->incremental_info(); gold_assert(script_entry != NULL); - script_entry->add_object(obj_entry); + script_entry->add_object(input_entry); } - - this->current_object_ = obj; - this->current_object_entry_ = obj_entry; } -// Record the input object file OBJ. If ARCH is not NULL, attach -// the object file to the archive. This is called by the -// Add_symbols task after finding out the type of the file. +// Record an input section SHNDX from object file OBJ. void Incremental_inputs::report_input_section(Object* obj, unsigned int shndx, @@ -825,12 +1139,27 @@ Incremental_inputs::report_input_section(Object* obj, unsigned int shndx, Stringpool::Key key = 0; if (name != NULL) - this->strtab_->add(name, true, &key); + this->strtab_->add(name, true, &key); gold_assert(obj == this->current_object_); + gold_assert(this->current_object_entry_ != NULL); this->current_object_entry_->add_input_section(shndx, key, sh_size); } +// Record a kept COMDAT group belonging to object file OBJ. + +void +Incremental_inputs::report_comdat_group(Object* obj, const char* name) +{ + Stringpool::Key key = 0; + + if (name != NULL) + this->strtab_->add(name, true, &key); + gold_assert(obj == this->current_object_); + gold_assert(this->current_object_entry_ != NULL); + this->current_object_entry_->add_comdat_group(key); +} + // Record that the input argument INPUT is a script SCRIPT. This is // called by read_script after parsing the script and reading the list // of inputs added by this script. @@ -922,6 +1251,7 @@ Output_section_incremental_inputs::set_final_data_size() unsigned int input_offset = this->header_size; // Offset of each supplemental info block. + unsigned int file_index = 0; unsigned int info_offset = this->header_size; info_offset += this->input_entry_size * inputs->input_file_count(); @@ -931,8 +1261,9 @@ Output_section_incremental_inputs::set_final_data_size() p != inputs->input_files().end(); ++p) { - // Set the offset of the input file entry. - (*p)->set_offset(input_offset); + // Set the index and offset of the input file entry. + (*p)->set_offset(file_index, input_offset); + ++file_index; input_offset += this->input_entry_size; // Set the offset of the supplemental info block. @@ -955,23 +1286,27 @@ Output_section_incremental_inputs::set_final_data_size() Incremental_object_entry* entry = (*p)->object_entry(); gold_assert(entry != NULL); (*p)->set_info_offset(info_offset); - // Input section count + global symbol count. - info_offset += 8; + // Input section count, global symbol count, local symbol offset, + // local symbol count, first dynamic reloc, dynamic reloc count, + // comdat group count. + info_offset += 28; // Each input section. info_offset += (entry->get_input_section_count() * (8 + 2 * sizeof_addr)); // Each global symbol. const Object::Symbols* syms = entry->object()->get_global_symbols(); info_offset += syms->size() * 20; + // Each comdat group. + info_offset += entry->get_comdat_group_count() * 4; } break; case INCREMENTAL_INPUT_SHARED_LIBRARY: { - Incremental_object_entry* entry = (*p)->object_entry(); + Incremental_dynobj_entry* entry = (*p)->dynobj_entry(); gold_assert(entry != NULL); (*p)->set_info_offset(info_offset); - // Global symbol count. - info_offset += 4; + // Global symbol count, soname index. + info_offset += 8; // Each global symbol. const Object::Symbols* syms = entry->object()->get_global_symbols(); gold_assert(syms != NULL); @@ -1025,7 +1360,7 @@ Output_section_incremental_inputs::set_final_data_size() unsigned int plt_count = target->plt_entry_count(); unsigned int got_plt_size = 8; // GOT entry count, PLT entry count. got_plt_size = (got_plt_size + got_count + 3) & ~3; // GOT type array. - got_plt_size += got_count * 4 + plt_count * 4; // GOT array, PLT array. + got_plt_size += got_count * 8 + plt_count * 4; // GOT array, PLT array. inputs->got_plt_section()->set_current_data_size(got_plt_size); } @@ -1133,6 +1468,8 @@ Output_section_incremental_inputs::write_input_files( unsigned int flags = (*p)->type(); if ((*p)->is_in_system_directory()) flags |= INCREMENTAL_INPUT_IN_SYSTEM_DIR; + if ((*p)->as_needed()) + flags |= INCREMENTAL_INPUT_AS_NEEDED; Swap32::writeval(pov, filename_offset); Swap32::writeval(pov + 4, (*p)->get_info_offset()); Swap64::writeval(pov + 8, mtime.seconds); @@ -1195,13 +1532,24 @@ Output_section_incremental_inputs::write_info_blocks( Incremental_object_entry* entry = (*p)->object_entry(); gold_assert(entry != NULL); const Object* obj = entry->object(); + const Relobj* relobj = static_cast(obj); const Object::Symbols* syms = obj->get_global_symbols(); // Write the input section count and global symbol count. unsigned int nsections = entry->get_input_section_count(); unsigned int nsyms = syms->size(); + off_t locals_offset = relobj->local_symbol_offset(); + unsigned int nlocals = relobj->output_local_symbol_count(); + unsigned int first_dynrel = relobj->first_dyn_reloc(); + unsigned int ndynrel = relobj->dyn_reloc_count(); + unsigned int ncomdat = entry->get_comdat_group_count(); Swap32::writeval(pov, nsections); Swap32::writeval(pov + 4, nsyms); - pov += 8; + Swap32::writeval(pov + 8, static_cast(locals_offset)); + Swap32::writeval(pov + 12, nlocals); + Swap32::writeval(pov + 16, first_dynrel); + Swap32::writeval(pov + 20, ndynrel); + Swap32::writeval(pov + 24, ncomdat); + pov += 28; // Build a temporary array to map input section indexes // from the original object file index to the index in the @@ -1247,14 +1595,24 @@ Output_section_incremental_inputs::write_info_blocks( if (sym->is_forwarder()) sym = this->symtab_->resolve_forwards(sym); unsigned int shndx = 0; - if (sym->source() == Symbol::FROM_OBJECT - && sym->object() == obj - && sym->is_defined()) + if (sym->source() != Symbol::FROM_OBJECT) + { + // The symbol was defined by the linker (e.g., common). + // We mark these symbols with a special SHNDX of -1, + // but exclude linker-predefined symbols and symbols + // copied from shared objects. + if (!sym->is_predefined() + && !sym->is_copied_from_dynobj()) + shndx = -1U; + } + else if (sym->object() == obj && sym->is_defined()) { bool is_ordinary; unsigned int orig_shndx = sym->shndx(&is_ordinary); if (is_ordinary) shndx = index_map[orig_shndx]; + else + shndx = 1; } unsigned int symtab_index = sym->symtab_index(); unsigned int chain = 0; @@ -1278,6 +1636,17 @@ Output_section_incremental_inputs::write_info_blocks( pov += 20; } + // For each kept COMDAT group, write the group signature. + for (unsigned int i = 0; i < ncomdat; i++) + { + Stringpool::Key key = entry->get_comdat_signature_key(i); + off_t name_offset = 0; + if (key != 0) + name_offset = strtab->get_offset_from_key(key); + Swap32::writeval(pov, name_offset); + pov += 4; + } + delete[] index_map; } break; @@ -1286,11 +1655,19 @@ Output_section_incremental_inputs::write_info_blocks( { gold_assert(static_cast(pov - oview) == (*p)->get_info_offset()); - Incremental_object_entry* entry = (*p)->object_entry(); + Incremental_dynobj_entry* entry = (*p)->dynobj_entry(); gold_assert(entry != NULL); - const Object* obj = entry->object(); + Object* obj = entry->object(); + Dynobj* dynobj = obj->dynobj(); + gold_assert(dynobj != NULL); const Object::Symbols* syms = obj->get_global_symbols(); + // Write the soname string table index. + section_offset_type soname_offset = + strtab->get_offset_from_key(entry->get_soname_key()); + Swap32::writeval(pov, soname_offset); + pov += 4; + // Skip the global symbol count for now. unsigned char* orig_pov = pov; pov += 4; @@ -1307,12 +1684,22 @@ Output_section_incremental_inputs::write_info_blocks( sym = this->symtab_->resolve_forwards(sym); if (sym->symtab_index() == -1U) continue; - unsigned int def_flag = 0; - if (sym->source() == Symbol::FROM_OBJECT - && sym->object() == obj - && sym->is_defined()) - def_flag = 1U << 31; - Swap32::writeval(pov, sym->symtab_index() | def_flag); + unsigned int flags = 0; + // If the symbol has hidden or internal visibility, we + // mark it as defined in the shared object so we don't + // try to resolve it during an incremental update. + if (sym->visibility() == elfcpp::STV_HIDDEN + || sym->visibility() == elfcpp::STV_INTERNAL) + flags = INCREMENTAL_SHLIB_SYM_DEF; + else if (sym->source() == Symbol::FROM_OBJECT + && sym->object() == obj + && sym->is_defined()) + flags = INCREMENTAL_SHLIB_SYM_DEF; + else if (sym->is_copied_from_dynobj() + && this->symtab_->get_copy_source(sym) == dynobj) + flags = INCREMENTAL_SHLIB_SYM_COPY; + flags <<= INCREMENTAL_SHLIB_SYM_FLAGS_SHIFT; + Swap32::writeval(pov, sym->symtab_index() | flags); pov += 4; ++nsyms_out; } @@ -1396,11 +1783,14 @@ struct Got_plt_view_info unsigned int first_plt_entry_offset; // Size of a PLT entry (this is a target-dependent value). unsigned int plt_entry_size; - // Value to write in the GOT descriptor array. For global symbols, - // this is the global symbol table index; for local symbols, it is - // the offset of the input file entry in the .gnu_incremental_inputs - // section. - unsigned int got_descriptor; + // Symbol index to write in the GOT descriptor array. For global symbols, + // this is the global symbol table index; for local symbols, it is the + // local symbol table index. + unsigned int sym_index; + // Input file index to write in the GOT descriptor array. For global + // symbols, this is 0; for local symbols, it is the index of the input + // file entry in the .gnu_incremental_inputs section. + unsigned int input_index; }; // Functor class for processing a GOT offset list for local symbols. @@ -1425,8 +1815,9 @@ class Local_got_offset_visitor : public Got_offset_list::Visitor // high bit to flag a local symbol. gold_assert(got_type < 0x7f); this->info_.got_type_p[got_index] = got_type | 0x80; - unsigned char* pov = this->info_.got_desc_p + got_index * 4; - elfcpp::Swap<32, big_endian>::writeval(pov, this->info_.got_descriptor); + unsigned char* pov = this->info_.got_desc_p + got_index * 8; + elfcpp::Swap<32, big_endian>::writeval(pov, this->info_.sym_index); + elfcpp::Swap<32, big_endian>::writeval(pov + 4, this->info_.input_index); } private: @@ -1456,8 +1847,9 @@ class Global_got_offset_visitor : public Got_offset_list::Visitor // high bit to flag a local symbol. gold_assert(got_type < 0x7f); this->info_.got_type_p[got_index] = got_type; - unsigned char* pov = this->info_.got_desc_p + got_index * 4; - elfcpp::Swap<32, big_endian>::writeval(pov, this->info_.got_descriptor); + unsigned char* pov = this->info_.got_desc_p + got_index * 8; + elfcpp::Swap<32, big_endian>::writeval(pov, this->info_.sym_index); + elfcpp::Swap<32, big_endian>::writeval(pov + 4, 0); } private: @@ -1484,7 +1876,8 @@ class Global_symbol_visitor_got_plt const Got_offset_list* got_offsets = sym->got_offset_list(); if (got_offsets != NULL) { - this->info_.got_descriptor = sym->symtab_index(); + this->info_.sym_index = sym->symtab_index(); + this->info_.input_index = 0; Got_visitor v(this->info_); got_offsets->for_all_got_offsets(&v); } @@ -1523,7 +1916,7 @@ Output_section_incremental_inputs::write_got_plt( view_info.got_type_p = pov + 8; view_info.got_desc_p = (view_info.got_type_p + ((view_info.got_count + 3) & ~3)); - view_info.plt_desc_p = view_info.got_desc_p + view_info.got_count * 4; + view_info.plt_desc_p = view_info.got_desc_p + view_info.got_count * 8; gold_assert(pov + view_size == view_info.plt_desc_p + view_info.plt_count * 4); @@ -1549,7 +1942,7 @@ Output_section_incremental_inputs::write_got_plt( gold_assert(entry != NULL); const Object* obj = entry->object(); gold_assert(obj != NULL); - view_info.got_descriptor = (*p)->get_offset(); + view_info.input_index = (*p)->get_file_index(); Got_visitor v(view_info); obj->for_all_local_got_entries(&v); } @@ -1559,32 +1952,35 @@ Output_section_incremental_inputs::write_got_plt( symtab_->for_all_symbols(Symbol_visitor(view_info)); } -// Class Sized_incr_relobj. Most of these methods are not used for +// Class Sized_relobj_incr. Most of these methods are not used for // Incremental objects, but are required to be implemented by the // base class Object. template -Sized_incr_relobj::Sized_incr_relobj( +Sized_relobj_incr::Sized_relobj_incr( const std::string& name, Sized_incremental_binary* ibase, unsigned int input_file_index) - : Sized_relobj_base(name, NULL), ibase_(ibase), + : Sized_relobj(name, NULL), ibase_(ibase), input_file_index_(input_file_index), input_reader_(ibase->inputs_reader().input_file(input_file_index)), - symbols_(), section_offsets_(), incr_reloc_offset_(-1U), - incr_reloc_count_(0), incr_reloc_output_index_(0), incr_relocs_(NULL) + local_symbol_count_(0), output_local_dynsym_count_(0), + local_symbol_index_(0), local_symbol_offset_(0), local_dynsym_offset_(0), + symbols_(), incr_reloc_offset_(-1U), incr_reloc_count_(0), + incr_reloc_output_index_(0), incr_relocs_(NULL), local_symbols_() { if (this->input_reader_.is_in_system_directory()) this->set_is_in_system_directory(); const unsigned int shnum = this->input_reader_.get_input_section_count() + 1; this->set_shnum(shnum); + ibase->set_input_object(input_file_index, this); } // Read the symbols. template void -Sized_incr_relobj::do_read_symbols(Read_symbols_data*) +Sized_relobj_incr::do_read_symbols(Read_symbols_data*) { gold_unreachable(); } @@ -1593,7 +1989,7 @@ Sized_incr_relobj::do_read_symbols(Read_symbols_data*) template void -Sized_incr_relobj::do_layout( +Sized_relobj_incr::do_layout( Symbol_table*, Layout* layout, Read_symbols_data*) @@ -1603,7 +1999,7 @@ Sized_incr_relobj::do_layout( gold_assert(incremental_inputs != NULL); Output_sections& out_sections(this->output_sections()); out_sections.resize(shnum); - this->section_offsets_.resize(shnum); + this->section_offsets().resize(shnum); for (unsigned int i = 1; i < shnum; i++) { typename Input_entry_reader::Input_section_info sect = @@ -1616,7 +2012,23 @@ Sized_incr_relobj::do_layout( Output_section* os = this->ibase_->output_section(sect.output_shndx); gold_assert(os != NULL); out_sections[i] = os; - this->section_offsets_[i] = static_cast

(sect.sh_offset); + this->section_offsets()[i] = static_cast
(sect.sh_offset); + } + + // Process the COMDAT groups. + unsigned int ncomdat = this->input_reader_.get_comdat_group_count(); + for (unsigned int i = 0; i < ncomdat; i++) + { + const char* signature = this->input_reader_.get_comdat_group_signature(i); + if (signature == NULL || signature[0] == '\0') + this->error(_("COMDAT group has no signature")); + bool keep = layout->find_or_add_kept_section(signature, this, i, true, + true, NULL); + if (keep) + incremental_inputs->report_comdat_group(this, signature); + else + this->error(_("COMDAT group %s included twice in incremental link"), + signature); } } @@ -1624,7 +2036,7 @@ Sized_incr_relobj::do_layout( // input files from a plugin. template void -Sized_incr_relobj::do_layout_deferred_sections(Layout*) +Sized_relobj_incr::do_layout_deferred_sections(Layout*) { } @@ -1632,7 +2044,7 @@ Sized_incr_relobj::do_layout_deferred_sections(Layout*) template void -Sized_incr_relobj::do_add_symbols( +Sized_relobj_incr::do_add_symbols( Symbol_table* symtab, Read_symbols_data*, Layout*) @@ -1652,17 +2064,17 @@ Sized_incr_relobj::do_add_symbols( elfcpp::Elf_strtab strtab(NULL, 0); this->ibase_->get_symtab_view(&symtab_view, &symtab_count, &strtab); - // Incremental_symtab_reader isymtab(this->ibase_->symtab_reader()); - // Incremental_relocs_reader irelocs(this->ibase_->relocs_reader()); - // unsigned int isym_count = isymtab.symbol_count(); - // unsigned int first_global = symtab_count - isym_count; + Incremental_symtab_reader isymtab(this->ibase_->symtab_reader()); + unsigned int isym_count = isymtab.symbol_count(); + unsigned int first_global = symtab_count - isym_count; - unsigned const char* sym_p; + const unsigned char* sym_p; for (unsigned int i = 0; i < nsyms; ++i) { Incremental_global_symbol_reader info = this->input_reader_.get_global_symbol_reader(i); - sym_p = symtab_view.data() + info.output_symndx() * sym_size; + unsigned int output_symndx = info.output_symndx(); + sym_p = symtab_view.data() + output_symndx * sym_size; elfcpp::Sym gsym(sym_p); const char* name; if (!strtab.get_c_string(gsym.get_st_name(), &name)) @@ -1679,7 +2091,7 @@ Sized_incr_relobj::do_add_symbols( st_bind = elfcpp::STB_GLOBAL; unsigned int input_shndx = info.shndx(); - if (input_shndx == 0) + if (input_shndx == 0 || input_shndx == -1U) { shndx = elfcpp::SHN_UNDEF; v = 0; @@ -1706,8 +2118,40 @@ Sized_incr_relobj::do_add_symbols( osym.put_st_other(gsym.get_st_other()); osym.put_st_shndx(shndx); - this->symbols_[i] = - symtab->add_from_incrobj(this, name, NULL, &sym); + Symbol* res = symtab->add_from_incrobj(this, name, NULL, &sym); + + // If this is a linker-defined symbol that hasn't yet been defined, + // define it now. + if (input_shndx == -1U && !res->is_defined()) + { + shndx = gsym.get_st_shndx(); + v = gsym.get_st_value(); + Elf_size_type symsize = gsym.get_st_size(); + if (shndx == elfcpp::SHN_ABS) + { + symtab->define_as_constant(name, NULL, + Symbol_table::INCREMENTAL_BASE, + v, symsize, st_type, st_bind, + gsym.get_st_visibility(), 0, + false, false); + } + else + { + Output_section* os = this->ibase_->output_section(shndx); + gold_assert(os != NULL && os->has_fixed_layout()); + v -= os->address(); + if (symsize > 0) + os->reserve(v, symsize); + symtab->define_in_output_data(name, NULL, + Symbol_table::INCREMENTAL_BASE, + os, v, symsize, st_type, st_bind, + gsym.get_st_visibility(), 0, + false, false); + } + } + + this->symbols_[i] = res; + this->ibase_->add_global_symbol(output_symndx - first_global, res); } } @@ -1715,7 +2159,7 @@ Sized_incr_relobj::do_add_symbols( template Archive::Should_include -Sized_incr_relobj::do_should_include_member( +Sized_relobj_incr::do_should_include_member( Symbol_table*, Layout*, Read_symbols_data*, @@ -1728,29 +2172,18 @@ Sized_incr_relobj::do_should_include_member( template void -Sized_incr_relobj::do_for_all_global_symbols( +Sized_relobj_incr::do_for_all_global_symbols( Read_symbols_data*, Library_base::Symbol_visitor_base*) { // This routine is not used for incremental objects. } -// Iterate over local symbols, calling a visitor class V for each GOT offset -// associated with a local symbol. - -template -void -Sized_incr_relobj::do_for_all_local_got_entries( - Got_offset_list::Visitor*) const -{ - // FIXME: Implement Sized_incr_relobj::do_for_all_local_got_entries. -} - // Get the size of a section. template uint64_t -Sized_incr_relobj::do_section_size(unsigned int) +Sized_relobj_incr::do_section_size(unsigned int) { gold_unreachable(); } @@ -1759,7 +2192,7 @@ Sized_incr_relobj::do_section_size(unsigned int) template std::string -Sized_incr_relobj::do_section_name(unsigned int) +Sized_relobj_incr::do_section_name(unsigned int) { gold_unreachable(); } @@ -1768,7 +2201,7 @@ Sized_incr_relobj::do_section_name(unsigned int) template Object::Location -Sized_incr_relobj::do_section_contents(unsigned int) +Sized_relobj_incr::do_section_contents(unsigned int) { gold_unreachable(); } @@ -1777,7 +2210,7 @@ Sized_incr_relobj::do_section_contents(unsigned int) template uint64_t -Sized_incr_relobj::do_section_flags(unsigned int) +Sized_relobj_incr::do_section_flags(unsigned int) { gold_unreachable(); } @@ -1786,7 +2219,7 @@ Sized_incr_relobj::do_section_flags(unsigned int) template uint64_t -Sized_incr_relobj::do_section_entsize(unsigned int) +Sized_relobj_incr::do_section_entsize(unsigned int) { gold_unreachable(); } @@ -1795,7 +2228,7 @@ Sized_incr_relobj::do_section_entsize(unsigned int) template uint64_t -Sized_incr_relobj::do_section_address(unsigned int) +Sized_relobj_incr::do_section_address(unsigned int) { gold_unreachable(); } @@ -1804,7 +2237,7 @@ Sized_incr_relobj::do_section_address(unsigned int) template unsigned int -Sized_incr_relobj::do_section_type(unsigned int) +Sized_relobj_incr::do_section_type(unsigned int) { gold_unreachable(); } @@ -1813,7 +2246,7 @@ Sized_incr_relobj::do_section_type(unsigned int) template unsigned int -Sized_incr_relobj::do_section_link(unsigned int) +Sized_relobj_incr::do_section_link(unsigned int) { gold_unreachable(); } @@ -1822,7 +2255,7 @@ Sized_incr_relobj::do_section_link(unsigned int) template unsigned int -Sized_incr_relobj::do_section_info(unsigned int) +Sized_relobj_incr::do_section_info(unsigned int) { gold_unreachable(); } @@ -1831,7 +2264,7 @@ Sized_incr_relobj::do_section_info(unsigned int) template uint64_t -Sized_incr_relobj::do_section_addralign(unsigned int) +Sized_relobj_incr::do_section_addralign(unsigned int) { gold_unreachable(); } @@ -1840,7 +2273,7 @@ Sized_incr_relobj::do_section_addralign(unsigned int) template Xindex* -Sized_incr_relobj::do_initialize_xindex() +Sized_relobj_incr::do_initialize_xindex() { gold_unreachable(); } @@ -1849,7 +2282,7 @@ Sized_incr_relobj::do_initialize_xindex() template void -Sized_incr_relobj::do_get_global_symbol_counts( +Sized_relobj_incr::do_get_global_symbol_counts( const Symbol_table*, size_t*, size_t*) const { gold_unreachable(); @@ -1859,7 +2292,7 @@ Sized_incr_relobj::do_get_global_symbol_counts( template void -Sized_incr_relobj::do_read_relocs(Read_relocs_data*) +Sized_relobj_incr::do_read_relocs(Read_relocs_data*) { } @@ -1868,7 +2301,7 @@ Sized_incr_relobj::do_read_relocs(Read_relocs_data*) template void -Sized_incr_relobj::do_gc_process_relocs(Symbol_table*, +Sized_relobj_incr::do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*) { @@ -1879,7 +2312,7 @@ Sized_incr_relobj::do_gc_process_relocs(Symbol_table*, template void -Sized_incr_relobj::do_scan_relocs(Symbol_table*, +Sized_relobj_incr::do_scan_relocs(Symbol_table*, Layout* layout, Read_relocs_data*) { @@ -1924,31 +2357,62 @@ Sized_incr_relobj::do_scan_relocs(Symbol_table*, template void -Sized_incr_relobj::do_count_local_symbols( - Stringpool_template*, +Sized_relobj_incr::do_count_local_symbols( + Stringpool_template* pool, Stringpool_template*) { - // FIXME: Count local symbols. + const int sym_size = elfcpp::Elf_sizes::sym_size; + + // Set the count of local symbols based on the incremental info. + unsigned int nlocals = this->input_reader_.get_local_symbol_count(); + this->local_symbol_count_ = nlocals; + this->local_symbols_.reserve(nlocals); + + // Get views of the base file's symbol table and string table. + Incremental_binary::View symtab_view(NULL); + unsigned int symtab_count; + elfcpp::Elf_strtab strtab(NULL, 0); + this->ibase_->get_symtab_view(&symtab_view, &symtab_count, &strtab); + + // Read the local symbols from the base file's symbol table. + off_t off = this->input_reader_.get_local_symbol_offset(); + const unsigned char* symp = symtab_view.data() + off; + for (unsigned int i = 0; i < nlocals; ++i, symp += sym_size) + { + elfcpp::Sym sym(symp); + const char* name; + if (!strtab.get_c_string(sym.get_st_name(), &name)) + name = ""; + gold_debug(DEBUG_INCREMENTAL, "Local symbol %d: %s", i, name); + name = pool->add(name, true, NULL); + this->local_symbols_.push_back(Local_symbol(name, + sym.get_st_value(), + sym.get_st_size(), + sym.get_st_shndx(), + sym.get_st_type(), + false)); + } } // Finalize the local symbols. template unsigned int -Sized_incr_relobj::do_finalize_local_symbols( +Sized_relobj_incr::do_finalize_local_symbols( unsigned int index, - off_t, + off_t off, Symbol_table*) { - // FIXME: Finalize local symbols. - return index; + this->local_symbol_index_ = index; + this->local_symbol_offset_ = off; + return index + this->local_symbol_count_; } // Set the offset where local dynamic symbol information will be stored. template unsigned int -Sized_incr_relobj::do_set_local_dynsym_indexes( +Sized_relobj_incr::do_set_local_dynsym_indexes( unsigned int index) { // FIXME: set local dynsym indexes. @@ -1959,7 +2423,7 @@ Sized_incr_relobj::do_set_local_dynsym_indexes( template unsigned int -Sized_incr_relobj::do_set_local_dynsym_offset(off_t) +Sized_relobj_incr::do_set_local_dynsym_offset(off_t) { return 0; } @@ -1972,7 +2436,7 @@ Sized_incr_relobj::do_set_local_dynsym_offset(off_t) template void -Sized_incr_relobj::do_relocate(const Symbol_table*, +Sized_relobj_incr::do_relocate(const Symbol_table*, const Layout* layout, Output_file* of) { @@ -1993,14 +2457,112 @@ Sized_incr_relobj::do_relocate(const Symbol_table*, off_t off = this->incr_reloc_output_index_ * incr_reloc_size; unsigned int len = this->incr_reloc_count_ * incr_reloc_size; memcpy(view + off, this->incr_relocs_, len); + + // The output section table may have changed, so we need to map + // the old section index to the new section index for each relocation. + for (unsigned int i = 0; i < this->incr_reloc_count_; ++i) + { + unsigned char* pov = view + off + i * incr_reloc_size; + unsigned int shndx = elfcpp::Swap<32, big_endian>::readval(pov + 4); + Output_section* os = this->ibase_->output_section(shndx); + gold_assert(os != NULL); + shndx = os->out_shndx(); + elfcpp::Swap<32, big_endian>::writeval(pov + 4, shndx); + } + of->write_output_view(off, len, view); + + // Get views into the output file for the portions of the symbol table + // and the dynamic symbol table that we will be writing. + off_t symtab_off = layout->symtab_section()->offset(); + off_t output_size = this->local_symbol_count_ * This::sym_size; + unsigned char* oview = NULL; + if (output_size > 0) + oview = of->get_output_view(symtab_off + this->local_symbol_offset_, + output_size); + + off_t dyn_output_size = this->output_local_dynsym_count_ * sym_size; + unsigned char* dyn_oview = NULL; + if (dyn_output_size > 0) + dyn_oview = of->get_output_view(this->local_dynsym_offset_, + dyn_output_size); + + // Write the local symbols. + unsigned char* ov = oview; + unsigned char* dyn_ov = dyn_oview; + const Stringpool* sympool = layout->sympool(); + const Stringpool* dynpool = layout->dynpool(); + Output_symtab_xindex* symtab_xindex = layout->symtab_xindex(); + Output_symtab_xindex* dynsym_xindex = layout->dynsym_xindex(); + for (unsigned int i = 0; i < this->local_symbol_count_; ++i) + { + Local_symbol& lsym(this->local_symbols_[i]); + + bool is_ordinary; + unsigned int st_shndx = this->adjust_sym_shndx(i, lsym.st_shndx, + &is_ordinary); + if (is_ordinary) + { + Output_section* os = this->ibase_->output_section(st_shndx); + st_shndx = os->out_shndx(); + if (st_shndx >= elfcpp::SHN_LORESERVE) + { + symtab_xindex->add(this->local_symbol_index_ + i, st_shndx); + if (lsym.needs_dynsym_entry) + dynsym_xindex->add(lsym.output_dynsym_index, st_shndx); + st_shndx = elfcpp::SHN_XINDEX; + } + } + + // Write the symbol to the output symbol table. + { + elfcpp::Sym_write osym(ov); + osym.put_st_name(sympool->get_offset(lsym.name)); + osym.put_st_value(lsym.st_value); + osym.put_st_size(lsym.st_size); + osym.put_st_info(elfcpp::STB_LOCAL, + static_cast(lsym.st_type)); + osym.put_st_other(0); + osym.put_st_shndx(st_shndx); + ov += sym_size; + } + + // Write the symbol to the output dynamic symbol table. + if (lsym.needs_dynsym_entry) + { + gold_assert(dyn_ov < dyn_oview + dyn_output_size); + elfcpp::Sym_write osym(dyn_ov); + osym.put_st_name(dynpool->get_offset(lsym.name)); + osym.put_st_value(lsym.st_value); + osym.put_st_size(lsym.st_size); + osym.put_st_info(elfcpp::STB_LOCAL, + static_cast(lsym.st_type)); + osym.put_st_other(0); + osym.put_st_shndx(st_shndx); + dyn_ov += sym_size; + } + } + + if (output_size > 0) + { + gold_assert(ov - oview == output_size); + of->write_output_view(symtab_off + this->local_symbol_offset_, + output_size, oview); + } + + if (dyn_output_size > 0) + { + gold_assert(dyn_ov - dyn_oview == dyn_output_size); + of->write_output_view(this->local_dynsym_offset_, dyn_output_size, + dyn_oview); + } } // Set the offset of a section. template void -Sized_incr_relobj::do_set_section_offset(unsigned int, +Sized_relobj_incr::do_set_section_offset(unsigned int, uint64_t) { } @@ -2021,6 +2583,9 @@ Sized_incr_dynobj::Sized_incr_dynobj( { if (this->input_reader_.is_in_system_directory()) this->set_is_in_system_directory(); + if (this->input_reader_.as_needed()) + this->set_as_needed(); + this->set_soname_string(this->input_reader_.get_soname()); this->set_shnum(0); } @@ -2068,24 +2633,30 @@ Sized_incr_dynobj::do_add_symbols( elfcpp::Elf_strtab strtab(NULL, 0); this->ibase_->get_symtab_view(&symtab_view, &symtab_count, &strtab); - // Incremental_symtab_reader isymtab(this->ibase_->symtab_reader()); - // Incremental_relocs_reader irelocs(this->ibase_->relocs_reader()); - // unsigned int isym_count = isymtab.symbol_count(); - // unsigned int first_global = symtab_count - isym_count; + Incremental_symtab_reader isymtab(this->ibase_->symtab_reader()); + unsigned int isym_count = isymtab.symbol_count(); + unsigned int first_global = symtab_count - isym_count; - unsigned const char* sym_p; + // We keep a set of symbols that we have generated COPY relocations + // for, indexed by the symbol value. We do not need more than one + // COPY relocation per address. + typedef typename std::set
Copied_symbols; + Copied_symbols copied_symbols; + + const unsigned char* sym_p; for (unsigned int i = 0; i < nsyms; ++i) { bool is_def; + bool is_copy; unsigned int output_symndx = - this->input_reader_.get_output_symbol_index(i, &is_def); + this->input_reader_.get_output_symbol_index(i, &is_def, &is_copy); sym_p = symtab_view.data() + output_symndx * sym_size; elfcpp::Sym gsym(sym_p); const char* name; if (!strtab.get_c_string(gsym.get_st_name(), &name)) name = ""; - typename elfcpp::Elf_types::Elf_Addr v; + Address v; unsigned int shndx; elfcpp::STB st_bind = gsym.get_st_bind(); elfcpp::STT st_type = gsym.get_st_type(); @@ -2115,8 +2686,24 @@ Sized_incr_dynobj::do_add_symbols( osym.put_st_other(gsym.get_st_other()); osym.put_st_shndx(shndx); - this->symbols_[i] = - symtab->add_from_incrobj(this, name, NULL, &sym); + Sized_symbol* res = + symtab->add_from_incrobj(this, name, NULL, &sym); + this->symbols_[i] = res; + this->ibase_->add_global_symbol(output_symndx - first_global, + this->symbols_[i]); + + if (is_copy) + { + std::pair ins = + copied_symbols.insert(v); + if (ins.second) + { + unsigned int shndx = gsym.get_st_shndx(); + Output_section* os = this->ibase_->output_section(shndx); + off_t offset = v - os->address(); + this->ibase_->add_copy_reloc(this->symbols_[i], os, offset); + } + } } } @@ -2152,7 +2739,6 @@ void Sized_incr_dynobj::do_for_all_local_got_entries( Got_offset_list::Visitor*) const { - // FIXME: Implement Sized_incr_dynobj::do_for_all_local_got_entries. } // Get the size of a section. @@ -2287,7 +2873,7 @@ make_sized_incremental_object( obj = new Sized_incr_dynobj<32, false>(name, sized_ibase, input_file_index); else - obj = new Sized_incr_relobj<32, false>(name, sized_ibase, + obj = new Sized_relobj_incr<32, false>(name, sized_ibase, input_file_index); } break; @@ -2301,7 +2887,7 @@ make_sized_incremental_object( obj = new Sized_incr_dynobj<32, true>(name, sized_ibase, input_file_index); else - obj = new Sized_incr_relobj<32, true>(name, sized_ibase, + obj = new Sized_relobj_incr<32, true>(name, sized_ibase, input_file_index); } break; @@ -2315,7 +2901,7 @@ make_sized_incremental_object( obj = new Sized_incr_dynobj<64, false>(name, sized_ibase, input_file_index); else - obj = new Sized_incr_relobj<64, false>(name, sized_ibase, + obj = new Sized_relobj_incr<64, false>(name, sized_ibase, input_file_index); } break; @@ -2329,7 +2915,7 @@ make_sized_incremental_object( obj = new Sized_incr_dynobj<64, true>(name, sized_ibase, input_file_index); else - obj = new Sized_incr_relobj<64, true>(name, sized_ibase, + obj = new Sized_relobj_incr<64, true>(name, sized_ibase, input_file_index); } break; @@ -2375,7 +2961,7 @@ template class Sized_incremental_binary<32, false>; template -class Sized_incr_relobj<32, false>; +class Sized_relobj_incr<32, false>; template class Sized_incr_dynobj<32, false>; @@ -2386,7 +2972,7 @@ template class Sized_incremental_binary<32, true>; template -class Sized_incr_relobj<32, true>; +class Sized_relobj_incr<32, true>; template class Sized_incr_dynobj<32, true>; @@ -2397,7 +2983,7 @@ template class Sized_incremental_binary<64, false>; template -class Sized_incr_relobj<64, false>; +class Sized_relobj_incr<64, false>; template class Sized_incr_dynobj<64, false>; @@ -2408,7 +2994,7 @@ template class Sized_incremental_binary<64, true>; template -class Sized_incr_relobj<64, true>; +class Sized_relobj_incr<64, true>; template class Sized_incr_dynobj<64, true>; diff --git a/gold/incremental.h b/gold/incremental.h index 2b3f0e7..e6732df 100644 --- a/gold/incremental.h +++ b/gold/incremental.h @@ -40,12 +40,12 @@ class Input_argument; class Incremental_inputs_checker; class Incremental_script_entry; class Incremental_object_entry; +class Incremental_dynobj_entry; class Incremental_archive_entry; class Incremental_inputs; class Incremental_binary; class Incremental_library; class Object; -class Script_info; // Incremental input type as stored in .gnu_incremental_inputs. @@ -63,9 +63,29 @@ enum Incremental_input_type enum Incremental_input_flags { - INCREMENTAL_INPUT_IN_SYSTEM_DIR = 0x0800 + INCREMENTAL_INPUT_IN_SYSTEM_DIR = 0x8000, + INCREMENTAL_INPUT_AS_NEEDED = 0x4000 }; +// Symbol flags for the incremental symbol table. +// These flags are stored in the top two bits of +// the symbol index field. + +enum Incremental_shlib_symbol_flags +{ + // Symbol is defined in this library. + INCREMENTAL_SHLIB_SYM_DEF = 2, + // Symbol is defined in this library, with a COPY relocation. + INCREMENTAL_SHLIB_SYM_COPY = 3 +}; + +static const int INCREMENTAL_SHLIB_SYM_FLAGS_SHIFT = 30; + +// Return TRUE if a section of type SH_TYPE can be updated in place +// during an incremental update. +bool +can_incremental_update(unsigned int sh_type); + // Create an Incremental_binary object for FILE. Returns NULL is this is not // possible, e.g. FILE is not an ELF file or has an unsupported target. @@ -79,8 +99,9 @@ class Incremental_input_entry public: Incremental_input_entry(Stringpool::Key filename_key, unsigned int arg_serial, Timespec mtime) - : filename_key_(filename_key), offset_(0), info_offset_(0), - arg_serial_(arg_serial), mtime_(mtime), is_in_system_directory_(false) + : filename_key_(filename_key), file_index_(0), offset_(0), info_offset_(0), + arg_serial_(arg_serial), mtime_(mtime), is_in_system_directory_(false), + as_needed_(false) { } virtual @@ -92,16 +113,24 @@ class Incremental_input_entry type() const { return this->do_type(); } - // Set the section offset of this input file entry. + // Set the index and section offset of this input file entry. void - set_offset(unsigned int offset) - { this->offset_ = offset; } + set_offset(unsigned int file_index, unsigned int offset) + { + this->file_index_ = file_index; + this->offset_ = offset; + } // Set the section offset of the supplemental information for this entry. void set_info_offset(unsigned int info_offset) { this->info_offset_ = info_offset; } + // Get the index of this input file entry. + unsigned int + get_file_index() const + { return this->file_index_; } + // Get the section offset of this input file entry. unsigned int get_offset() const @@ -137,6 +166,16 @@ class Incremental_input_entry is_in_system_directory() const { return this->is_in_system_directory_; } + // Record that the file was linked with --as-needed. + void + set_as_needed() + { this->as_needed_ = true; } + + // Return TRUE if the file was linked with --as-needed. + bool + as_needed() const + { return this->as_needed_; } + // Return a pointer to the derived Incremental_script_entry object. // Return NULL for input entries that are not script files. Incremental_script_entry* @@ -149,6 +188,12 @@ class Incremental_input_entry object_entry() { return this->do_object_entry(); } + // Return a pointer to the derived Incremental_dynobj_entry object. + // Return NULL for input entries that are not shared object files. + Incremental_dynobj_entry* + dynobj_entry() + { return this->do_dynobj_entry(); } + // Return a pointer to the derived Incremental_archive_entry object. // Return NULL for input entries that are not archive files. Incremental_archive_entry* @@ -172,6 +217,12 @@ class Incremental_input_entry do_object_entry() { return NULL; } + // Return a pointer to the derived Incremental_dynobj_entry object. + // Return NULL for input entries that are not shared object files. + virtual Incremental_dynobj_entry* + do_dynobj_entry() + { return NULL; } + // Return a pointer to the derived Incremental_archive_entry object. // Return NULL for input entries that are not archive files. virtual Incremental_archive_entry* @@ -182,6 +233,9 @@ class Incremental_input_entry // Key of the filename string in the section stringtable. Stringpool::Key filename_key_; + // Index of the entry in the output section. + unsigned int file_index_; + // Offset of the entry in the output section. unsigned int offset_; @@ -196,6 +250,9 @@ class Incremental_input_entry // TRUE if the file was found in a system directory. bool is_in_system_directory_; + + // TRUE if the file was linked with --as-needed. + bool as_needed_; }; // Information about a script input that will persist during the whole linker @@ -206,7 +263,13 @@ class Script_info { public: Script_info(const std::string& filename) - : filename_(filename), incremental_script_entry_(NULL) + : filename_(filename), input_file_index_(0), + incremental_script_entry_(NULL) + { } + + Script_info(const std::string& filename, unsigned int input_file_index) + : filename_(filename), input_file_index_(input_file_index), + incremental_script_entry_(NULL) { } // Store a pointer to the incremental information for this script. @@ -219,6 +282,11 @@ class Script_info filename() const { return this->filename_; } + // Return the input file index. + unsigned int + input_file_index() const + { return this->input_file_index_; } + // Return the pointer to the incremental information for this script. Incremental_script_entry* incremental_info() const @@ -226,6 +294,7 @@ class Script_info private: const std::string filename_; + unsigned int input_file_index_; Incremental_script_entry* incremental_script_entry_; }; @@ -286,11 +355,8 @@ class Incremental_object_entry : public Incremental_input_entry Incremental_object_entry(Stringpool::Key filename_key, Object* obj, unsigned int arg_serial, Timespec mtime) : Incremental_input_entry(filename_key, arg_serial, mtime), obj_(obj), - is_member_(false), sections_() - { - if (!obj_->is_dynamic()) - this->sections_.reserve(obj->shnum()); - } + is_member_(false), sections_(), groups_() + { this->sections_.reserve(obj->shnum()); } // Get the object. Object* @@ -332,15 +398,28 @@ class Incremental_object_entry : public Incremental_input_entry get_input_section_size(unsigned int n) const { return this->sections_[n].sh_size_; } + // Add a kept COMDAT group. + void + add_comdat_group(Stringpool::Key signature_key) + { this->groups_.push_back(signature_key); } + + // Return the number of COMDAT groups. + unsigned int + get_comdat_group_count() const + { return this->groups_.size(); } + + // Return the stringpool key for the signature of the Nth comdat group. + Stringpool::Key + get_comdat_signature_key(unsigned int n) const + { return this->groups_[n]; } + protected: virtual Incremental_input_type do_type() const { return (this->is_member_ ? INCREMENTAL_INPUT_ARCHIVE_MEMBER - : (this->obj_->is_dynamic() - ? INCREMENTAL_INPUT_SHARED_LIBRARY - : INCREMENTAL_INPUT_OBJECT)); + : INCREMENTAL_INPUT_OBJECT); } // Return a pointer to the derived Incremental_object_entry object. @@ -366,6 +445,49 @@ class Incremental_object_entry : public Incremental_input_entry off_t sh_size_; }; std::vector sections_; + + // COMDAT groups. + std::vector groups_; +}; + +// Class for recording shared library input files. + +class Incremental_dynobj_entry : public Incremental_input_entry +{ + public: + Incremental_dynobj_entry(Stringpool::Key filename_key, + Stringpool::Key soname_key, Object* obj, + unsigned int arg_serial, Timespec mtime) + : Incremental_input_entry(filename_key, arg_serial, mtime), + soname_key_(soname_key), obj_(obj) + { } + + // Get the object. + Object* + object() const + { return this->obj_; } + + // Get the stringpool key for the soname. + Stringpool::Key + get_soname_key() const + { return this->soname_key_; } + + protected: + virtual Incremental_input_type + do_type() const + { return INCREMENTAL_INPUT_SHARED_LIBRARY; } + + // Return a pointer to the derived Incremental_dynobj_entry object. + virtual Incremental_dynobj_entry* + do_dynobj_entry() + { return this; } + + private: + // Key of the soname string in the section stringtable. + Stringpool::Key soname_key_; + + // The object file itself. + Object* obj_; }; // Class for recording archive library input files. @@ -472,6 +594,10 @@ class Incremental_inputs report_input_section(Object* obj, unsigned int shndx, const char* name, off_t sh_size); + // Record a kept COMDAT group belonging to object file OBJ. + void + report_comdat_group(Object* obj, const char* name); + // Record the info for input script SCRIPT. void report_script(Script_info* script, unsigned int arg_serial, @@ -707,6 +833,11 @@ class Incremental_inputs_reader is_in_system_directory() const { return (this->flags_ & INCREMENTAL_INPUT_IN_SYSTEM_DIR) != 0; } + // Return TRUE if the file was linked with --as-needed. + bool + as_needed() const + { return (this->flags_ & INCREMENTAL_INPUT_AS_NEEDED) != 0; } + // Return the input section count -- for objects only. unsigned int get_input_section_count() const @@ -716,6 +847,16 @@ class Incremental_inputs_reader return Swap32::readval(this->inputs_->p_ + this->info_offset_); } + // Return the soname -- for shared libraries only. + const char* + get_soname() const + { + gold_assert(this->type() == INCREMENTAL_INPUT_SHARED_LIBRARY); + unsigned int offset = Swap32::readval(this->inputs_->p_ + + this->info_offset_); + return this->inputs_->get_string(offset); + } + // Return the offset of the supplemental info for symbol SYMNDX -- // for objects only. unsigned int @@ -725,7 +866,7 @@ class Incremental_inputs_reader || this->type() == INCREMENTAL_INPUT_ARCHIVE_MEMBER); unsigned int section_count = this->get_input_section_count(); - return (this->info_offset_ + 8 + return (this->info_offset_ + 28 + section_count * input_section_entry_size + symndx * 20); } @@ -734,16 +875,60 @@ class Incremental_inputs_reader unsigned int get_global_symbol_count() const { - switch (this->type()) - { - case INCREMENTAL_INPUT_OBJECT: - case INCREMENTAL_INPUT_ARCHIVE_MEMBER: - return Swap32::readval(this->inputs_->p_ + this->info_offset_ + 4); - case INCREMENTAL_INPUT_SHARED_LIBRARY: - return Swap32::readval(this->inputs_->p_ + this->info_offset_); - default: - gold_unreachable(); - } + gold_assert(this->type() == INCREMENTAL_INPUT_OBJECT + || this->type() == INCREMENTAL_INPUT_ARCHIVE_MEMBER + || this->type() == INCREMENTAL_INPUT_SHARED_LIBRARY); + return Swap32::readval(this->inputs_->p_ + this->info_offset_ + 4); + } + + // Return the offset of the first local symbol -- for objects only. + unsigned int + get_local_symbol_offset() const + { + gold_assert(this->type() == INCREMENTAL_INPUT_OBJECT + || this->type() == INCREMENTAL_INPUT_ARCHIVE_MEMBER); + + return Swap32::readval(this->inputs_->p_ + this->info_offset_ + 8); + } + + // Return the local symbol count -- for objects only. + unsigned int + get_local_symbol_count() const + { + gold_assert(this->type() == INCREMENTAL_INPUT_OBJECT + || this->type() == INCREMENTAL_INPUT_ARCHIVE_MEMBER); + + return Swap32::readval(this->inputs_->p_ + this->info_offset_ + 12); + } + + // Return the index of the first dynamic relocation -- for objects only. + unsigned int + get_first_dyn_reloc() const + { + gold_assert(this->type() == INCREMENTAL_INPUT_OBJECT + || this->type() == INCREMENTAL_INPUT_ARCHIVE_MEMBER); + + return Swap32::readval(this->inputs_->p_ + this->info_offset_ + 16); + } + + // Return the dynamic relocation count -- for objects only. + unsigned int + get_dyn_reloc_count() const + { + gold_assert(this->type() == INCREMENTAL_INPUT_OBJECT + || this->type() == INCREMENTAL_INPUT_ARCHIVE_MEMBER); + + return Swap32::readval(this->inputs_->p_ + this->info_offset_ + 20); + } + + // Return the COMDAT group count -- for objects only. + unsigned int + get_comdat_group_count() const + { + gold_assert(this->type() == INCREMENTAL_INPUT_OBJECT + || this->type() == INCREMENTAL_INPUT_ARCHIVE_MEMBER); + + return Swap32::readval(this->inputs_->p_ + this->info_offset_ + 24); } // Return the object count -- for scripts only. @@ -816,7 +1001,7 @@ class Incremental_inputs_reader { Input_section_info info; const unsigned char* p = (this->inputs_->p_ - + this->info_offset_ + 8 + + this->info_offset_ + 28 + n * input_section_entry_size); unsigned int name_offset = Swap32::readval(p); info.name = this->inputs_->get_string(name_offset); @@ -834,25 +1019,56 @@ class Incremental_inputs_reader || this->type() == INCREMENTAL_INPUT_ARCHIVE_MEMBER); unsigned int section_count = this->get_input_section_count(); const unsigned char* p = (this->inputs_->p_ - + this->info_offset_ + 8 + + this->info_offset_ + 28 + section_count * input_section_entry_size + n * 20); return Incremental_global_symbol_reader(p); } + // Return the signature of the Nth comdat group -- for objects only. + const char* + get_comdat_group_signature(unsigned int n) const + { + unsigned int section_count = this->get_input_section_count(); + unsigned int symbol_count = this->get_global_symbol_count(); + const unsigned char* p = (this->inputs_->p_ + + this->info_offset_ + 28 + + section_count * input_section_entry_size + + symbol_count * 20 + + n * 4); + unsigned int name_offset = Swap32::readval(p); + return this->inputs_->get_string(name_offset); + } + // Return the output symbol index for the Nth global symbol -- for shared // libraries only. Sets *IS_DEF to TRUE if the symbol is defined in this - // input file. + // input file. Sets *IS_COPY to TRUE if the symbol was copied from this + // input file with a COPY relocation. unsigned int - get_output_symbol_index(unsigned int n, bool* is_def) + get_output_symbol_index(unsigned int n, bool* is_def, bool* is_copy) { gold_assert(this->type() == INCREMENTAL_INPUT_SHARED_LIBRARY); const unsigned char* p = (this->inputs_->p_ - + this->info_offset_ + 4 + + this->info_offset_ + 8 + n * 4); unsigned int output_symndx = Swap32::readval(p); - *is_def = (output_symndx & (1U << 31)) != 0; - return output_symndx & ((1U << 31) - 1); + unsigned int flags = output_symndx >> INCREMENTAL_SHLIB_SYM_FLAGS_SHIFT; + output_symndx &= ((1U << INCREMENTAL_SHLIB_SYM_FLAGS_SHIFT) - 1); + switch (flags) + { + case INCREMENTAL_SHLIB_SYM_DEF: + *is_def = true; + *is_copy = false; + break; + case INCREMENTAL_SHLIB_SYM_COPY: + *is_def = true; + *is_copy = true; + break; + default: + *is_def = false; + *is_copy = false; + } + return output_symndx; } private: @@ -898,6 +1114,14 @@ class Incremental_inputs_reader return Incremental_input_entry_reader(this, offset); } + // Return a reader for the global symbol info at OFFSET. + Incremental_global_symbol_reader + global_symbol_reader_at_offset(unsigned int offset) const + { + const unsigned char* p = this->p_ + offset; + return Incremental_global_symbol_reader(p); + } + private: // Lookup a string in the ELF string table. const char* get_string(unsigned int offset) const @@ -1025,7 +1249,7 @@ class Incremental_got_plt_reader { this->got_count_ = elfcpp::Swap<32, big_endian>::readval(p); this->got_desc_p_ = p + 8 + ((this->got_count_ + 3) & ~3); - this->plt_desc_p_ = this->got_desc_p_ + this->got_count_ * 4; + this->plt_desc_p_ = this->got_desc_p_ + this->got_count_ * 8; } // Return the GOT entry count. @@ -1049,11 +1273,18 @@ class Incremental_got_plt_reader return this->p_[8 + n]; } - // Return the GOT descriptor for GOT entry N. + // Return the symbol index for GOT entry N. + unsigned int + get_got_symndx(unsigned int n) + { + return elfcpp::Swap<32, big_endian>::readval(this->got_desc_p_ + n * 8); + } + + // Return the input file index for GOT entry N. unsigned int - get_got_desc(unsigned int n) + get_got_input_index(unsigned int n) { - return elfcpp::Swap<32, big_endian>::readval(this->got_desc_p_ + n * 4); + return elfcpp::Swap<32, big_endian>::readval(this->got_desc_p_ + n * 8 + 4); } // Return the PLT descriptor for PLT entry N. @@ -1188,12 +1419,12 @@ class Incremental_binary // Return an Incremental_library for the given input file. Incremental_library* - get_library(unsigned int n) + get_library(unsigned int n) const { return this->library_map_[n]; } // Return a Script_info for the given input file. Script_info* - get_script_info(unsigned int n) + get_script_info(unsigned int n) const { return this->script_map_[n]; } // Initialize the layout of the output file based on the existing @@ -1207,6 +1438,22 @@ class Incremental_binary reserve_layout(unsigned int input_file_index) { this->do_reserve_layout(input_file_index); } + // Process the GOT and PLT entries from the existing output file. + void + process_got_plt(Symbol_table* symtab, Layout* layout) + { this->do_process_got_plt(symtab, layout); } + + // Emit COPY relocations from the existing output file. + void + emit_copy_relocs(Symbol_table* symtab) + { this->do_emit_copy_relocs(symtab); } + + // Apply incremental relocations for symbols whose values have changed. + void + apply_incremental_relocs(const Symbol_table* symtab, Layout* layout, + Output_file* of) + { this->do_apply_incremental_relocs(symtab, layout, of); } + // Functions and types for the elfcpp::Elf_file interface. This // permit us to use Incremental_binary as the File template parameter for // elfcpp::Elf_file. @@ -1279,6 +1526,18 @@ class Incremental_binary virtual void do_reserve_layout(unsigned int input_file_index) = 0; + // Process the GOT and PLT entries from the existing output file. + virtual void + do_process_got_plt(Symbol_table* symtab, Layout* layout) = 0; + + // Emit COPY relocations from the existing output file. + virtual void + do_emit_copy_relocs(Symbol_table* symtab) = 0; + + // Apply incremental relocations for symbols whose values have changed. + virtual void + do_apply_incremental_relocs(const Symbol_table*, Layout*, Output_file*) = 0; + virtual unsigned int do_input_file_count() const = 0; @@ -1300,6 +1559,9 @@ class Incremental_binary }; template +class Sized_relobj_incr; + +template class Sized_incremental_binary : public Incremental_binary { public: @@ -1307,8 +1569,9 @@ class Sized_incremental_binary : public Incremental_binary const elfcpp::Ehdr& ehdr, Target* target) : Incremental_binary(output, target), elf_file_(this, ehdr), - section_map_(), has_incremental_info_(false), inputs_reader_(), - symtab_reader_(), relocs_reader_(), got_plt_reader_(), + input_objects_(), section_map_(), symbol_map_(), copy_relocs_(), + main_symtab_loc_(), main_strtab_loc_(), has_incremental_info_(false), + inputs_reader_(), symtab_reader_(), relocs_reader_(), got_plt_reader_(), input_entry_readers_() { this->setup_readers(); } @@ -1317,11 +1580,44 @@ class Sized_incremental_binary : public Incremental_binary has_incremental_info() const { return this->has_incremental_info_; } + // Record a pointer to the object for input file N. + void + set_input_object(unsigned int n, + Sized_relobj_incr* obj) + { this->input_objects_[n] = obj; } + + // Return a pointer to the object for input file N. + Sized_relobj_incr* + input_object(unsigned int n) const + { + gold_assert(n < this->input_objects_.size()); + return this->input_objects_[n]; + } + // Return the Output_section for section index SHNDX. Output_section* output_section(unsigned int shndx) { return this->section_map_[shndx]; } + // Map a symbol table entry from the base file to the output symbol table. + // SYMNDX is relative to the first forced-local or global symbol in the + // input file symbol table. + void + add_global_symbol(unsigned int symndx, Symbol* gsym) + { this->symbol_map_[symndx] = gsym; } + + // Map a symbol table entry from the base file to the output symbol table. + // SYMNDX is relative to the first forced-local or global symbol in the + // input file symbol table. + Symbol* + global_symbol(unsigned int symndx) const + { return this->symbol_map_[symndx]; } + + // Add a COPY relocation for a global symbol. + void + add_copy_reloc(Symbol* gsym, Output_section* os, off_t offset) + { this->copy_relocs_.push_back(Copy_reloc(gsym, os, offset)); } + // Readers for the incremental info sections. const Incremental_inputs_reader& @@ -1366,6 +1662,19 @@ class Sized_incremental_binary : public Incremental_binary virtual void do_reserve_layout(unsigned int input_file_index); + // Process the GOT and PLT entries from the existing output file. + virtual void + do_process_got_plt(Symbol_table* symtab, Layout* layout); + + // Emit COPY relocations from the existing output file. + virtual void + do_emit_copy_relocs(Symbol_table* symtab); + + // Apply incremental relocations for symbols whose values have changed. + virtual void + do_apply_incremental_relocs(const Symbol_table* symtab, Layout* layout, + Output_file* of); + // Proxy class for a sized Incremental_input_entry_reader. class Sized_input_reader : public Input_reader @@ -1419,6 +1728,22 @@ class Sized_incremental_binary : public Incremental_binary } private: + // List of symbols that need COPY relocations. + struct Copy_reloc + { + Copy_reloc(Symbol* sym, Output_section* os, off_t off) + : symbol(sym), output_section(os), offset(off) + { } + + // The global symbol to copy. + Symbol* symbol; + // The output section into which the symbol was copied. + Output_section* output_section; + // The offset within that output section. + off_t offset; + }; + typedef std::vector Copy_relocs; + bool find_incremental_inputs_sections(unsigned int* p_inputs_shndx, unsigned int* p_symtab_shndx, @@ -1432,9 +1757,23 @@ class Sized_incremental_binary : public Incremental_binary // Output as an ELF file. elfcpp::Elf_file elf_file_; + // Vector of pointers to the input objects for the unchanged files. + // For replaced files, the corresponding pointer is NULL. + std::vector*> input_objects_; + // Map section index to an Output_section in the updated layout. std::vector section_map_; + // Map global symbols from the input file to the symbol table. + std::vector symbol_map_; + + // List of symbols that need COPY relocations. + Copy_relocs copy_relocs_; + + // Locations of the main symbol table and symbol string table. + Location main_symtab_loc_; + Location main_strtab_loc_; + // Readers for the incremental info sections. bool has_incremental_info_; Incremental_inputs_reader inputs_reader_; @@ -1449,45 +1788,53 @@ class Sized_incremental_binary : public Incremental_binary // can be used directly from the base file. template -class Sized_incr_relobj : public Sized_relobj_base +class Sized_relobj_incr : public Sized_relobj { public: typedef typename elfcpp::Elf_types::Elf_Addr Address; - typedef typename Sized_relobj_base::Symbols Symbols; - - static const Address invalid_address = static_cast
(0) - 1; + typedef typename Sized_relobj::Symbols Symbols; - Sized_incr_relobj(const std::string& name, + Sized_relobj_incr(const std::string& name, Sized_incremental_binary* ibase, unsigned int input_file_index); - // Checks if the offset of input section SHNDX within its output - // section is invalid. - bool - is_output_section_offset_invalid(unsigned int shndx) const - { return this->section_offsets_[shndx] == invalid_address; } - - // Get the offset of input section SHNDX within its output section. - // This is -1 if the input section requires a special mapping, such - // as a merge section. The output section can be found in the - // output_sections_ field of the parent class Incrobj. - uint64_t - do_output_section_offset(unsigned int shndx) const - { - gold_assert(shndx < this->section_offsets_.size()); - Address off = this->section_offsets_[shndx]; - if (off == invalid_address) - return -1ULL; - return off; - } - private: - typedef typename Sized_relobj_base::Output_sections + // For convenience. + typedef Sized_relobj_incr This; + static const int sym_size = elfcpp::Elf_sizes::sym_size; + + typedef typename Sized_relobj::Output_sections Output_sections; typedef Incremental_inputs_reader Inputs_reader; typedef typename Inputs_reader::Incremental_input_entry_reader Input_entry_reader; + // A local symbol. + struct Local_symbol + { + Local_symbol(const char* name_, Address value_, unsigned int size_, + unsigned int shndx_, unsigned int type_, + bool needs_dynsym_entry_) + : st_value(value_), name(name_), st_size(size_), st_shndx(shndx_), + st_type(type_), output_dynsym_index(0), + needs_dynsym_entry(needs_dynsym_entry_) + { } + // The symbol value. + Address st_value; + // The symbol name. This points to the stringpool entry. + const char* name; + // The symbol size. + unsigned int st_size; + // The output section index. + unsigned int st_shndx : 28; + // The symbol type. + unsigned int st_type : 4; + // The index of the symbol in the output dynamic symbol table. + unsigned int output_dynsym_index : 31; + // TRUE if the symbol needs to appear in the dynamic symbol table. + unsigned int needs_dynsym_entry : 1; + }; + // Return TRUE if this is an incremental (unchanged) input file. bool do_is_incremental() const @@ -1524,11 +1871,6 @@ class Sized_incr_relobj : public Sized_relobj_base do_for_all_global_symbols(Read_symbols_data* sd, Library_base::Symbol_visitor_base* v); - // Iterate over local symbols, calling a visitor class V for each GOT offset - // associated with a local symbol. - void - do_for_all_local_got_entries(Got_offset_list::Visitor* v) const; - // Get the size of a section. uint64_t do_section_size(unsigned int shndx); @@ -1585,7 +1927,17 @@ class Sized_incr_relobj : public Sized_relobj_base // Return the number of local symbols. unsigned int do_local_symbol_count() const - { return 0; } + { return this->local_symbol_count_; } + + // Return the number of local symbols in the output symbol table. + unsigned int + do_output_local_symbol_count() const + { return this->local_symbol_count_; } + + // Return the file offset for local symbols in the output symbol table. + off_t + do_local_symbol_offset() const + { return this->local_symbol_offset_; } // Read the relocs. void @@ -1631,12 +1983,19 @@ class Sized_incr_relobj : public Sized_relobj_base unsigned int input_file_index_; // The reader for the input file. Input_entry_reader input_reader_; + // The number of local symbols. + unsigned int local_symbol_count_; + // The number of local symbols which go into the output file's dynamic + // symbol table. + unsigned int output_local_dynsym_count_; + // This starting symbol index in the output symbol table. + unsigned int local_symbol_index_; + // The file offset for local symbols in the output symbol table. + unsigned int local_symbol_offset_; + // The file offset for local symbols in the output symbol table. + unsigned int local_dynsym_offset_; // The entries in the symbol table for the external symbols. Symbols symbols_; - // For each input section, the offset of the input section in its - // output section. This is INVALID_ADDRESS if the input section requires a - // special mapping. - std::vector
section_offsets_; // The offset of the first incremental relocation for this object. unsigned int incr_reloc_offset_; // The number of incremental relocations for this object. @@ -1646,6 +2005,8 @@ class Sized_incr_relobj : public Sized_relobj_base unsigned int incr_reloc_output_index_; // A copy of the incremental relocations from this object. unsigned char* incr_relocs_; + // The local symbols. + std::vector local_symbols_; }; // An incremental Dynobj. This class represents a shared object that has diff --git a/gold/layout.cc b/gold/layout.cc index 7afb21f..1c32bcf 100644 --- a/gold/layout.cc +++ b/gold/layout.cc @@ -46,6 +46,7 @@ #include "ehframe.h" #include "compressed_output.h" #include "reduced_debug_output.h" +#include "object.h" #include "reloc.h" #include "descriptors.h" #include "plugin.h" @@ -161,19 +162,29 @@ Free_list::allocate(off_t len, uint64_t align, off_t minoff) ++Free_list::num_allocates; + // We usually want to drop free chunks smaller than 4 bytes. + // If we need to guarantee a minimum hole size, though, we need + // to keep track of all free chunks. + const int fuzz = this->min_hole_ > 0 ? 0 : 3; + for (Iterator p = this->list_.begin(); p != this->list_.end(); ++p) { ++Free_list::num_allocate_visits; off_t start = p->start_ > minoff ? p->start_ : minoff; start = align_address(start, align); off_t end = start + len; - if (end <= p->end_) + if (end > p->end_ && p->end_ == this->length_ && this->extend_) { - if (p->start_ + 3 >= start && p->end_ <= end + 3) + this->length_ = end; + p->end_ = end; + } + if (end == p->end_ || (end <= p->end_ - this->min_hole_)) + { + if (p->start_ + fuzz >= start && p->end_ <= end + fuzz) this->list_.erase(p); - else if (p->start_ + 3 >= start) + else if (p->start_ + fuzz >= start) p->start_ = end; - else if (p->end_ <= end + 3) + else if (p->end_ <= end + fuzz) p->end_ = start; else { @@ -185,6 +196,12 @@ Free_list::allocate(off_t len, uint64_t align, off_t minoff) return start; } } + if (this->extend_) + { + off_t start = align_address(this->length_, align); + this->length_ = start + len; + return start; + } return -1; } @@ -298,10 +315,11 @@ Layout::Relaxation_debug_check::verify_sections( void Layout_task_runner::run(Workqueue* workqueue, const Task* task) { - off_t file_size = this->layout_->finalize(this->input_objects_, - this->symtab_, - this->target_, - task); + Layout* layout = this->layout_; + off_t file_size = layout->finalize(this->input_objects_, + this->symtab_, + this->target_, + task); // Now we know the final size of the output file and we know where // each piece of information goes. @@ -309,11 +327,11 @@ Layout_task_runner::run(Workqueue* workqueue, const Task* task) if (this->mapfile_ != NULL) { this->mapfile_->print_discarded_sections(this->input_objects_); - this->layout_->print_to_mapfile(this->mapfile_); + layout->print_to_mapfile(this->mapfile_); } Output_file* of; - if (this->layout_->incremental_base() == NULL) + if (layout->incremental_base() == NULL) { of = new Output_file(parameters->options().output_file_name()); if (this->options_.oformat_enum() != General_options::OBJECT_FORMAT_ELF) @@ -322,13 +340,24 @@ Layout_task_runner::run(Workqueue* workqueue, const Task* task) } else { - of = this->layout_->incremental_base()->output_file(); + of = layout->incremental_base()->output_file(); + + // Apply the incremental relocations for symbols whose values + // have changed. We do this before we resize the file and start + // writing anything else to it, so that we can read the old + // incremental information from the file before (possibly) + // overwriting it. + if (parameters->incremental_update()) + layout->incremental_base()->apply_incremental_relocs(this->symtab_, + this->layout_, + of); + of->resize(file_size); } // Queue up the final set of tasks. gold::queue_final_tasks(this->options_, this->input_objects_, - this->symtab_, this->layout_, workqueue, of); + this->symtab_, layout, workqueue, of); } // Layout methods. @@ -348,6 +377,7 @@ Layout::Layout(int number_of_input_files, Script_options* script_options) section_headers_(NULL), tls_segment_(NULL), relro_segment_(NULL), + interp_segment_(NULL), increase_relro_(0), symtab_section_(NULL), symtab_xindex_(NULL), @@ -374,11 +404,14 @@ Layout::Layout(int number_of_input_files, Script_options* script_options) any_postprocessing_sections_(false), resized_signatures_(false), have_stabstr_section_(false), + section_ordering_specified_(false), incremental_inputs_(NULL), record_output_section_data_from_script_(false), script_output_section_data_list_(), segment_states_(NULL), relaxation_debug_check_(NULL), + input_section_position_(), + input_section_glob_(), incremental_base_(NULL), free_list_() { @@ -498,7 +531,7 @@ is_compressed_debug_section(const char* secname) template bool -Layout::include_section(Sized_relobj*, const char* name, +Layout::include_section(Sized_relobj_file*, const char* name, const elfcpp::Shdr& shdr) { if (shdr.get_sh_flags() & elfcpp::SHF_EXCLUDE) @@ -604,19 +637,52 @@ Layout::find_output_segment(elfcpp::PT type, elfcpp::Elf_Word set, return NULL; } +// When we put a .ctors or .dtors section with more than one word into +// a .init_array or .fini_array section, we need to reverse the words +// in the .ctors/.dtors section. This is because .init_array executes +// constructors front to back, where .ctors executes them back to +// front, and vice-versa for .fini_array/.dtors. Although we do want +// to remap .ctors/.dtors into .init_array/.fini_array because it can +// be more efficient, we don't want to change the order in which +// constructors/destructors are run. This set just keeps track of +// these sections which need to be reversed. It is only changed by +// Layout::layout. It should be a private member of Layout, but that +// would require layout.h to #include object.h to get the definition +// of Section_id. +static Unordered_set ctors_sections_in_init_array; + +// Return whether OBJECT/SHNDX is a .ctors/.dtors section mapped to a +// .init_array/.fini_array section. + +bool +Layout::is_ctors_in_init_array(Relobj* relobj, unsigned int shndx) const +{ + return (ctors_sections_in_init_array.find(Section_id(relobj, shndx)) + != ctors_sections_in_init_array.end()); +} + // Return the output section to use for section NAME with type TYPE // and section flags FLAGS. NAME must be canonicalized in the string -// pool, and NAME_KEY is the key. IS_INTERP is true if this is the -// .interp section. IS_DYNAMIC_LINKER_SECTION is true if this section -// is used by the dynamic linker. IS_RELRO is true for a relro -// section. IS_LAST_RELRO is true for the last relro section. -// IS_FIRST_NON_RELRO is true for the first non-relro section. +// pool, and NAME_KEY is the key. ORDER is where this should appear +// in the output sections. IS_RELRO is true for a relro section. Output_section* Layout::get_output_section(const char* name, Stringpool::Key name_key, elfcpp::Elf_Word type, elfcpp::Elf_Xword flags, Output_section_order order, bool is_relro) { + elfcpp::Elf_Word lookup_type = type; + + // For lookup purposes, treat INIT_ARRAY, FINI_ARRAY, and + // PREINIT_ARRAY like PROGBITS. This ensures that we combine + // .init_array, .fini_array, and .preinit_array sections by name + // whatever their type in the input file. We do this because the + // types are not always right in the input files. + if (lookup_type == elfcpp::SHT_INIT_ARRAY + || lookup_type == elfcpp::SHT_FINI_ARRAY + || lookup_type == elfcpp::SHT_PREINIT_ARRAY) + lookup_type = elfcpp::SHT_PROGBITS; + elfcpp::Elf_Xword lookup_flags = flags; // Ignoring SHF_WRITE and SHF_EXECINSTR here means that we combine @@ -625,7 +691,7 @@ Layout::get_output_section(const char* name, Stringpool::Key name_key, // controlling this. lookup_flags &= ~(elfcpp::SHF_WRITE | elfcpp::SHF_EXECINSTR); - const Key key(name_key, std::make_pair(type, lookup_flags)); + const Key key(name_key, std::make_pair(lookup_type, lookup_flags)); const std::pair v(key, NULL); std::pair ins( this->section_name_map_.insert(v)); @@ -642,20 +708,24 @@ Layout::get_output_section(const char* name, Stringpool::Key name_key, // there should be an option to control this. Output_section* os = NULL; - if (type == elfcpp::SHT_PROGBITS) + if (lookup_type == elfcpp::SHT_PROGBITS) { if (flags == 0) { Output_section* same_name = this->find_output_section(name); if (same_name != NULL - && same_name->type() == elfcpp::SHT_PROGBITS + && (same_name->type() == elfcpp::SHT_PROGBITS + || same_name->type() == elfcpp::SHT_INIT_ARRAY + || same_name->type() == elfcpp::SHT_FINI_ARRAY + || same_name->type() == elfcpp::SHT_PREINIT_ARRAY) && (same_name->flags() & elfcpp::SHF_TLS) == 0) os = same_name; } else if ((flags & elfcpp::SHF_TLS) == 0) { elfcpp::Elf_Xword zero_flags = 0; - const Key zero_key(name_key, std::make_pair(type, zero_flags)); + const Key zero_key(name_key, std::make_pair(lookup_type, + zero_flags)); Section_name_map::iterator p = this->section_name_map_.find(zero_key); if (p != this->section_name_map_.end()) @@ -675,12 +745,9 @@ Layout::get_output_section(const char* name, Stringpool::Key name_key, // RELOBJ, with type TYPE and flags FLAGS. RELOBJ may be NULL for a // linker created section. IS_INPUT_SECTION is true if we are // choosing an output section for an input section found in a input -// file. IS_INTERP is true if this is the .interp section. -// IS_DYNAMIC_LINKER_SECTION is true if this section is used by the -// dynamic linker. IS_RELRO is true for a relro section. -// IS_LAST_RELRO is true for the last relro section. -// IS_FIRST_NON_RELRO is true for the first non-relro section. This -// will return NULL if the input section should be discarded. +// file. ORDER is where this section should appear in the output +// sections. IS_RELRO is true for a relro section. This will return +// NULL if the input section should be discarded. Output_section* Layout::choose_output_section(const Relobj* relobj, const char* name, @@ -808,7 +875,7 @@ Layout::choose_output_section(const Relobj* relobj, const char* name, if (is_input_section && !this->script_options_->saw_sections_clause() && !parameters->options().relocatable()) - name = Layout::output_section_name(name, &len); + name = Layout::output_section_name(relobj, name, &len); Stringpool::Key name_key; name = this->namepool_.add_with_length(name, len, true, &name_key); @@ -831,11 +898,10 @@ Layout::init_fixed_output_section(const char* name, { unsigned int sh_type = shdr.get_sh_type(); - // We preserve the layout of PROGBITS, NOBITS, and NOTE sections. + // We preserve the layout of PROGBITS, NOBITS, INIT_ARRAY, FINI_ARRAY, + // PRE_INIT_ARRAY, and NOTE sections. // All others will be created from scratch and reallocated. - if (sh_type != elfcpp::SHT_PROGBITS - && sh_type != elfcpp::SHT_NOBITS - && sh_type != elfcpp::SHT_NOTE) + if (!can_incremental_update(sh_type)) return NULL; typename elfcpp::Elf_types::Elf_Addr sh_addr = shdr.get_sh_addr(); @@ -868,7 +934,7 @@ Layout::init_fixed_output_section(const char* name, template Output_section* -Layout::layout(Sized_relobj* object, unsigned int shndx, +Layout::layout(Sized_relobj_file* object, unsigned int shndx, const char* name, const elfcpp::Shdr& shdr, unsigned int reloc_shndx, unsigned int, off_t* off) { @@ -877,32 +943,11 @@ Layout::layout(Sized_relobj* object, unsigned int shndx, if (!this->include_section(object, name, shdr)) return NULL; - Output_section* os; - - // Sometimes .init_array*, .preinit_array* and .fini_array* do not have - // correct section types. Force them here. elfcpp::Elf_Word sh_type = shdr.get_sh_type(); - if (sh_type == elfcpp::SHT_PROGBITS) - { - static const char init_array_prefix[] = ".init_array"; - static const char preinit_array_prefix[] = ".preinit_array"; - static const char fini_array_prefix[] = ".fini_array"; - static size_t init_array_prefix_size = sizeof(init_array_prefix) - 1; - static size_t preinit_array_prefix_size = - sizeof(preinit_array_prefix) - 1; - static size_t fini_array_prefix_size = sizeof(fini_array_prefix) - 1; - - if (strncmp(name, init_array_prefix, init_array_prefix_size) == 0) - sh_type = elfcpp::SHT_INIT_ARRAY; - else if (strncmp(name, preinit_array_prefix, preinit_array_prefix_size) - == 0) - sh_type = elfcpp::SHT_PREINIT_ARRAY; - else if (strncmp(name, fini_array_prefix, fini_array_prefix_size) == 0) - sh_type = elfcpp::SHT_FINI_ARRAY; - } // In a relocatable link a grouped section must not be combined with // any other sections. + Output_section* os; if (parameters->options().relocatable() && (shdr.get_sh_flags() & elfcpp::SHF_GROUP) != 0) { @@ -920,20 +965,55 @@ Layout::layout(Sized_relobj* object, unsigned int shndx, } // By default the GNU linker sorts input sections whose names match - // .ctor.*, .dtor.*, .init_array.*, or .fini_array.*. The sections - // are sorted by name. This is used to implement constructor - // priority ordering. We are compatible. + // .ctors.*, .dtors.*, .init_array.*, or .fini_array.*. The + // sections are sorted by name. This is used to implement + // constructor priority ordering. We are compatible. When we put + // .ctor sections in .init_array and .dtor sections in .fini_array, + // we must also sort plain .ctor and .dtor sections. if (!this->script_options_->saw_sections_clause() + && !parameters->options().relocatable() && (is_prefix_of(".ctors.", name) || is_prefix_of(".dtors.", name) || is_prefix_of(".init_array.", name) - || is_prefix_of(".fini_array.", name))) + || is_prefix_of(".fini_array.", name) + || (parameters->options().ctors_in_init_array() + && (strcmp(name, ".ctors") == 0 + || strcmp(name, ".dtors") == 0)))) os->set_must_sort_attached_input_sections(); + // If this is a .ctors or .ctors.* section being mapped to a + // .init_array section, or a .dtors or .dtors.* section being mapped + // to a .fini_array section, we will need to reverse the words if + // there is more than one. Record this section for later. See + // ctors_sections_in_init_array above. + if (!this->script_options_->saw_sections_clause() + && !parameters->options().relocatable() + && shdr.get_sh_size() > size / 8 + && (((strcmp(name, ".ctors") == 0 + || is_prefix_of(".ctors.", name)) + && strcmp(os->name(), ".init_array") == 0) + || ((strcmp(name, ".dtors") == 0 + || is_prefix_of(".dtors.", name)) + && strcmp(os->name(), ".fini_array") == 0))) + ctors_sections_in_init_array.insert(Section_id(object, shndx)); + // FIXME: Handle SHF_LINK_ORDER somewhere. + elfcpp::Elf_Xword orig_flags = os->flags(); + *off = os->add_input_section(this, object, shndx, name, shdr, reloc_shndx, this->script_options_->saw_sections_clause()); + + // If the flags changed, we may have to change the order. + if ((orig_flags & elfcpp::SHF_ALLOC) != 0) + { + orig_flags &= (elfcpp::SHF_WRITE | elfcpp::SHF_EXECINSTR); + elfcpp::Elf_Xword new_flags = + os->flags() & (elfcpp::SHF_WRITE | elfcpp::SHF_EXECINSTR); + if (orig_flags != new_flags) + os->set_order(this->default_section_order(os, false)); + } + this->have_added_input_section_ = true; return os; @@ -943,7 +1023,7 @@ Layout::layout(Sized_relobj* object, unsigned int shndx, template Output_section* -Layout::layout_reloc(Sized_relobj* object, +Layout::layout_reloc(Sized_relobj_file* object, unsigned int, const elfcpp::Shdr& shdr, Output_section* data_section, @@ -1010,7 +1090,7 @@ Layout::layout_reloc(Sized_relobj* object, template void Layout::layout_group(Symbol_table* symtab, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int, const char* group_section_name, const char* signature, @@ -1060,7 +1140,7 @@ Layout::layout_group(Symbol_table* symtab, template Output_section* -Layout::layout_eh_frame(Sized_relobj* object, +Layout::layout_eh_frame(Sized_relobj_file* object, const unsigned char* symbols, off_t symbols_size, const unsigned char* symbol_names, @@ -1070,11 +1150,77 @@ Layout::layout_eh_frame(Sized_relobj* object, unsigned int reloc_shndx, unsigned int reloc_type, off_t* off) { - gold_assert(shdr.get_sh_type() == elfcpp::SHT_PROGBITS); + gold_assert(shdr.get_sh_type() == elfcpp::SHT_PROGBITS + || shdr.get_sh_type() == elfcpp::SHT_X86_64_UNWIND); gold_assert((shdr.get_sh_flags() & elfcpp::SHF_ALLOC) != 0); - const char* const name = ".eh_frame"; - Output_section* os = this->choose_output_section(object, name, + Output_section* os = this->make_eh_frame_section(object); + if (os == NULL) + return NULL; + + gold_assert(this->eh_frame_section_ == os); + + elfcpp::Elf_Xword orig_flags = os->flags(); + + if (!parameters->incremental() + && this->eh_frame_data_->add_ehframe_input_section(object, + symbols, + symbols_size, + symbol_names, + symbol_names_size, + shndx, + reloc_shndx, + reloc_type)) + { + os->update_flags_for_input_section(shdr.get_sh_flags()); + + // A writable .eh_frame section is a RELRO section. + if ((orig_flags & (elfcpp::SHF_WRITE | elfcpp::SHF_EXECINSTR)) + != (os->flags() & (elfcpp::SHF_WRITE | elfcpp::SHF_EXECINSTR))) + { + os->set_is_relro(); + os->set_order(ORDER_RELRO); + } + + // We found a .eh_frame section we are going to optimize, so now + // we can add the set of optimized sections to the output + // section. We need to postpone adding this until we've found a + // section we can optimize so that the .eh_frame section in + // crtbegin.o winds up at the start of the output section. + if (!this->added_eh_frame_data_) + { + os->add_output_section_data(this->eh_frame_data_); + this->added_eh_frame_data_ = true; + } + *off = -1; + } + else + { + // We couldn't handle this .eh_frame section for some reason. + // Add it as a normal section. + bool saw_sections_clause = this->script_options_->saw_sections_clause(); + *off = os->add_input_section(this, object, shndx, ".eh_frame", shdr, + reloc_shndx, saw_sections_clause); + this->have_added_input_section_ = true; + + if ((orig_flags & (elfcpp::SHF_WRITE | elfcpp::SHF_EXECINSTR)) + != (os->flags() & (elfcpp::SHF_WRITE | elfcpp::SHF_EXECINSTR))) + os->set_order(this->default_section_order(os, false)); + } + + return os; +} + +// Create and return the magic .eh_frame section. Create +// .eh_frame_hdr also if appropriate. OBJECT is the object with the +// input .eh_frame section; it may be NULL. + +Output_section* +Layout::make_eh_frame_section(const Relobj* object) +{ + // FIXME: On x86_64, this could use SHT_X86_64_UNWIND rather than + // SHT_PROGBITS. + Output_section* os = this->choose_output_section(object, ".eh_frame", elfcpp::SHT_PROGBITS, elfcpp::SHF_ALLOC, false, ORDER_EHFRAME, false); @@ -1118,47 +1264,31 @@ Layout::layout_eh_frame(Sized_relobj* object, } } - gold_assert(this->eh_frame_section_ == os); - - if (!parameters->incremental() - && this->eh_frame_data_->add_ehframe_input_section(object, - symbols, - symbols_size, - symbol_names, - symbol_names_size, - shndx, - reloc_shndx, - reloc_type)) - { - os->update_flags_for_input_section(shdr.get_sh_flags()); + return os; +} - // A writable .eh_frame section is a RELRO section. - if ((shdr.get_sh_flags() & elfcpp::SHF_WRITE) != 0) - os->set_is_relro(); +// Add an exception frame for a PLT. This is called from target code. - // We found a .eh_frame section we are going to optimize, so now - // we can add the set of optimized sections to the output - // section. We need to postpone adding this until we've found a - // section we can optimize so that the .eh_frame section in - // crtbegin.o winds up at the start of the output section. - if (!this->added_eh_frame_data_) - { - os->add_output_section_data(this->eh_frame_data_); - this->added_eh_frame_data_ = true; - } - *off = -1; +void +Layout::add_eh_frame_for_plt(Output_data* plt, const unsigned char* cie_data, + size_t cie_length, const unsigned char* fde_data, + size_t fde_length) +{ + if (parameters->incremental()) + { + // FIXME: Maybe this could work some day.... + return; } - else + Output_section* os = this->make_eh_frame_section(NULL); + if (os == NULL) + return; + this->eh_frame_data_->add_ehframe_for_plt(plt, cie_data, cie_length, + fde_data, fde_length); + if (!this->added_eh_frame_data_) { - // We couldn't handle this .eh_frame section for some reason. - // Add it as a normal section. - bool saw_sections_clause = this->script_options_->saw_sections_clause(); - *off = os->add_input_section(this, object, shndx, name, shdr, reloc_shndx, - saw_sections_clause); - this->have_added_input_section_ = true; + os->add_output_section_data(this->eh_frame_data_); + this->added_eh_frame_data_ = true; } - - return os; } // Add POSD to an output section using NAME, TYPE, and FLAGS. Return @@ -1226,6 +1356,18 @@ Layout::make_output_section(const char* name, elfcpp::Elf_Word type, } else { + // Sometimes .init_array*, .preinit_array* and .fini_array* do + // not have correct section types. Force them here. + if (type == elfcpp::SHT_PROGBITS) + { + if (is_prefix_of(".init_array", name)) + type = elfcpp::SHT_INIT_ARRAY; + else if (is_prefix_of(".preinit_array", name)) + type = elfcpp::SHT_PREINIT_ARRAY; + else if (is_prefix_of(".fini_array", name)) + type = elfcpp::SHT_FINI_ARRAY; + } + // FIXME: const_cast is ugly. Target* target = const_cast(¶meters->target()); os = target->make_output_section(name, type, flags); @@ -1273,10 +1415,12 @@ Layout::make_output_section(const char* name, elfcpp::Elf_Word type, // do the same. We need to know that this might happen before we // attach any input sections. if (!this->script_options_->saw_sections_clause() - && (strcmp(name, ".ctors") == 0 - || strcmp(name, ".dtors") == 0 - || strcmp(name, ".init_array") == 0 - || strcmp(name, ".fini_array") == 0)) + && !parameters->options().relocatable() + && (strcmp(name, ".init_array") == 0 + || strcmp(name, ".fini_array") == 0 + || (!parameters->options().ctors_in_init_array() + && (strcmp(name, ".ctors") == 0 + || strcmp(name, ".dtors") == 0)))) os->set_may_sort_attached_input_sections(); // Check for .stab*str sections, as .stab* sections need to link to @@ -1287,6 +1431,35 @@ Layout::make_output_section(const char* name, elfcpp::Elf_Word type, && strcmp(name + strlen(name) - 3, "str") == 0) this->have_stabstr_section_ = true; + // During a full incremental link, we add patch space to most + // PROGBITS and NOBITS sections. Flag those that may be + // arbitrarily padded. + if ((type == elfcpp::SHT_PROGBITS || type == elfcpp::SHT_NOBITS) + && order != ORDER_INTERP + && order != ORDER_INIT + && order != ORDER_PLT + && order != ORDER_FINI + && order != ORDER_RELRO_LAST + && order != ORDER_NON_RELRO_FIRST + && strcmp(name, ".eh_frame") != 0 + && strcmp(name, ".ctors") != 0 + && strcmp(name, ".dtors") != 0 + && strcmp(name, ".jcr") != 0) + { + os->set_is_patch_space_allowed(); + + // Certain sections require "holes" to be filled with + // specific fill patterns. These fill patterns may have + // a minimum size, so we must prevent allocations from the + // free list that leave a hole smaller than the minimum. + if (strcmp(name, ".debug_info") == 0) + os->set_free_space_fill(new Output_fill_debug_info(false)); + else if (strcmp(name, ".debug_types") == 0) + os->set_free_space_fill(new Output_fill_debug_info(true)); + else if (strcmp(name, ".debug_line") == 0) + os->set_free_space_fill(new Output_fill_debug_line()); + } + // If we have already attached the sections to segments, then we // need to attach this one now. This happens for sections created // directly by the linker. @@ -1516,6 +1689,20 @@ Layout::attach_allocated_section_to_segment(Output_section* os) this->make_output_segment(elfcpp::PT_GNU_RELRO, seg_flags); this->relro_segment_->add_output_section_to_nonload(os, seg_flags); } + + // If we see a section named .interp, put it into a PT_INTERP + // segment. This seems broken to me, but this is what GNU ld does, + // and glibc expects it. + if (strcmp(os->name(), ".interp") == 0 + && !this->script_options_->saw_phdrs_clause()) + { + if (this->interp_segment_ == NULL) + this->make_output_segment(elfcpp::PT_INTERP, seg_flags); + else + gold_warning(_("multiple '.interp' sections in input files " + "may cause confusing PT_INTERP segment")); + this->interp_segment_->add_output_section_to_nonload(os, seg_flags); + } } // Make an output section for a script. @@ -1620,15 +1807,20 @@ Layout::create_initial_dynamic_sections(Symbol_table* symtab) false, ORDER_RELRO, true); - this->dynamic_symbol_ = - symtab->define_in_output_data("_DYNAMIC", NULL, Symbol_table::PREDEFINED, - this->dynamic_section_, 0, 0, - elfcpp::STT_OBJECT, elfcpp::STB_LOCAL, - elfcpp::STV_HIDDEN, 0, false, false); + // A linker script may discard .dynamic, so check for NULL. + if (this->dynamic_section_ != NULL) + { + this->dynamic_symbol_ = + symtab->define_in_output_data("_DYNAMIC", NULL, + Symbol_table::PREDEFINED, + this->dynamic_section_, 0, 0, + elfcpp::STT_OBJECT, elfcpp::STB_LOCAL, + elfcpp::STV_HIDDEN, 0, false, false); - this->dynamic_data_ = new Output_data_dynamic(&this->dynpool_); + this->dynamic_data_ = new Output_data_dynamic(&this->dynpool_); - this->dynamic_section_->add_output_section_data(this->dynamic_data_); + this->dynamic_section_->add_output_section_data(this->dynamic_data_); + } } // For each output section whose name can be represented as C symbol, @@ -1921,8 +2113,12 @@ Layout::relaxation_loop_body( // If the user set the address of the text segment, that may not be // compatible with putting the segment headers and file headers into // that segment. - if (parameters->options().user_set_Ttext()) - load_seg = NULL; + if (parameters->options().user_set_Ttext() + && parameters->options().Ttext() % target->common_pagesize() != 0) + { + load_seg = NULL; + phdr_seg = NULL; + } gold_assert(phdr_seg == NULL || load_seg != NULL @@ -2038,7 +2234,7 @@ Layout::find_section_order_index(const std::string& section_name) } // Read the sequence of input sections from the file specified with -// --section-ordering-file. +// option --section-ordering-file. void Layout::read_layout_from_file() @@ -2054,6 +2250,7 @@ Layout::read_layout_from_file() std::getline(in, line); // this chops off the trailing \n, if any unsigned int position = 1; + this->set_section_ordering_specified(); while (in) { @@ -2138,8 +2335,11 @@ Layout::finalize(const Input_objects* input_objects, Symbol_table* symtab, &versions); // Create the .interp section to hold the name of the - // interpreter, and put it in a PT_INTERP segment. - if (!parameters->options().shared()) + // interpreter, and put it in a PT_INTERP segment. Don't do it + // if we saw a .interp section in an input file. + if ((!parameters->options().shared() + || parameters->options().dynamic_linker() != NULL) + && this->interp_segment_ == NULL) this->create_interp(target); // Finish the .dynamic section to hold the dynamic data, and put @@ -2167,9 +2367,8 @@ Layout::finalize(const Input_objects* input_objects, Symbol_table* symtab, : new Output_segment_headers(this->segment_list_)); // Lay out the file header. - Output_file_header* file_header - = new Output_file_header(target, symtab, segment_headers, - parameters->options().entry()); + Output_file_header* file_header = new Output_file_header(target, symtab, + segment_headers); this->special_output_list_.push_back(file_header); if (segment_headers != NULL) @@ -2649,7 +2848,7 @@ Layout::create_incremental_info_sections(Symbol_table* symtab) // Return whether SEG1 should be before SEG2 in the output file. This // is based entirely on the segment type and flags. When this is -// called the segment addresses has normally not yet been set. +// called the segment addresses have normally not yet been set. bool Layout::segment_precedes(const Output_segment* seg1, @@ -2775,8 +2974,10 @@ Layout::segment_precedes(const Output_segment* seg1, return (flags1 & elfcpp::PF_R) == 0; // We shouldn't get here--we shouldn't create segments which we - // can't distinguish. - gold_unreachable(); + // can't distinguish. Unless of course we are using a weird linker + // script. + gold_assert(this->script_options_->saw_phdrs_clause()); + return false; } // Increase OFF so that it is congruent to ADDR modulo ABI_PAGESIZE. @@ -2800,9 +3001,11 @@ off_t Layout::set_segment_offsets(const Target* target, Output_segment* load_seg, unsigned int* pshndx) { - // Sort them into the final order. - std::sort(this->segment_list_.begin(), this->segment_list_.end(), - Layout::Compare_segments()); + // Sort them into the final order. We use a stable sort so that we + // don't randomize the order of indistinguishable segments created + // by linker scripts. + std::stable_sort(this->segment_list_.begin(), this->segment_list_.end(), + Layout::Compare_segments(this)); // Find the PT_LOAD segments, and set their addresses and offsets // and their section's addresses and offsets. @@ -2854,6 +3057,11 @@ Layout::set_segment_offsets(const Target* target, Output_segment* load_seg, // the physical address. addr = (*p)->paddr(); } + else if (parameters->options().user_set_Ttext() + && ((*p)->flags() & elfcpp::PF_W) == 0) + { + are_addresses_set = true; + } else if (parameters->options().user_set_Tdata() && ((*p)->flags() & elfcpp::PF_W) != 0 && (!parameters->options().user_set_Tbss() @@ -2933,7 +3141,7 @@ Layout::set_segment_offsets(const Target* target, Output_segment* load_seg, if (!are_addresses_set && !has_relro && aligned_addr != addr - && !parameters->incremental_update()) + && !parameters->incremental()) { uint64_t first_off = (common_pagesize - (aligned_addr @@ -3101,18 +3309,18 @@ Layout::set_section_offsets(off_t off, Layout::Section_offset_pass pass) if (is_debugging_enabled(DEBUG_INCREMENTAL)) this->free_list_.dump(); gold_assert((*p)->output_section() != NULL); - gold_fatal(_("out of patch space for section %s; " - "relink with --incremental-full"), - (*p)->output_section()->name()); + gold_fallback(_("out of patch space for section %s; " + "relink with --incremental-full"), + (*p)->output_section()->name()); } (*p)->set_file_offset(off); (*p)->finalize_data_size(); if ((*p)->data_size() > current_size) { gold_assert((*p)->output_section() != NULL); - gold_fatal(_("%s: section changed size; " - "relink with --incremental-full"), - (*p)->output_section()->name()); + gold_fallback(_("%s: section changed size; " + "relink with --incremental-full"), + (*p)->output_section()->name()); } gold_debug(DEBUG_INCREMENTAL, "set_section_offsets: %08lx %08lx %s", @@ -3367,8 +3575,8 @@ Layout::create_symtab_sections(const Input_objects* input_objects, { symtab_off = this->allocate(off, align, *poff); if (off == -1) - gold_fatal(_("out of patch space for symbol table; " - "relink with --incremental-full")); + gold_fallback(_("out of patch space for symbol table; " + "relink with --incremental-full")); gold_debug(DEBUG_INCREMENTAL, "create_symtab_sections: %08lx %08lx .symtab", static_cast(symtab_off), @@ -3438,8 +3646,8 @@ Layout::create_shdrs(const Output_section* shstrtab_section, off_t* poff) oshdrs->pre_finalize_data_size(); off = this->allocate(oshdrs->data_size(), oshdrs->addralign(), *poff); if (off == -1) - gold_fatal(_("out of patch space for section header table; " - "relink with --incremental-full")); + gold_fallback(_("out of patch space for section header table; " + "relink with --incremental-full")); gold_debug(DEBUG_INCREMENTAL, "create_shdrs: %08lx %08lx (section header table)", static_cast(off), @@ -3536,20 +3744,27 @@ Layout::create_dynamic_symtab(const Input_objects* input_objects, ORDER_DYNAMIC_LINKER, false); - Output_section_data* odata = new Output_data_fixed_space(index * symsize, - align, - "** dynsym"); - dynsym->add_output_section_data(odata); + // Check for NULL as a linker script may discard .dynsym. + if (dynsym != NULL) + { + Output_section_data* odata = new Output_data_fixed_space(index * symsize, + align, + "** dynsym"); + dynsym->add_output_section_data(odata); - dynsym->set_info(local_symcount); - dynsym->set_entsize(symsize); - dynsym->set_addralign(align); + dynsym->set_info(local_symcount); + dynsym->set_entsize(symsize); + dynsym->set_addralign(align); - this->dynsym_section_ = dynsym; + this->dynsym_section_ = dynsym; + } Output_data_dynamic* const odyn = this->dynamic_data_; - odyn->add_section_address(elfcpp::DT_SYMTAB, dynsym); - odyn->add_constant(elfcpp::DT_SYMENT, symsize); + if (odyn != NULL) + { + odyn->add_section_address(elfcpp::DT_SYMTAB, dynsym); + odyn->add_constant(elfcpp::DT_SYMENT, symsize); + } // If there are more than SHN_LORESERVE allocated sections, we // create a .dynsym_shndx section. It is possible that we don't @@ -3566,20 +3781,23 @@ Layout::create_dynamic_symtab(const Input_objects* input_objects, elfcpp::SHF_ALLOC, false, ORDER_DYNAMIC_LINKER, false); - this->dynsym_xindex_ = new Output_symtab_xindex(index); + if (dynsym_xindex != NULL) + { + this->dynsym_xindex_ = new Output_symtab_xindex(index); - dynsym_xindex->add_output_section_data(this->dynsym_xindex_); + dynsym_xindex->add_output_section_data(this->dynsym_xindex_); - dynsym_xindex->set_link_section(dynsym); - dynsym_xindex->set_addralign(4); - dynsym_xindex->set_entsize(4); + dynsym_xindex->set_link_section(dynsym); + dynsym_xindex->set_addralign(4); + dynsym_xindex->set_entsize(4); - dynsym_xindex->set_after_input_sections(); + dynsym_xindex->set_after_input_sections(); - // This tells the driver code to wait until the symbol table has - // written out before writing out the postprocessing sections, - // including the .dynsym_shndx section. - this->any_postprocessing_sections_ = true; + // This tells the driver code to wait until the symbol table + // has written out before writing out the postprocessing + // sections, including the .dynsym_shndx section. + this->any_postprocessing_sections_ = true; + } } // Create the dynamic string table section. @@ -3591,16 +3809,24 @@ Layout::create_dynamic_symtab(const Input_objects* input_objects, ORDER_DYNAMIC_LINKER, false); - Output_section_data* strdata = new Output_data_strtab(&this->dynpool_); - dynstr->add_output_section_data(strdata); + if (dynstr != NULL) + { + Output_section_data* strdata = new Output_data_strtab(&this->dynpool_); + dynstr->add_output_section_data(strdata); - dynsym->set_link_section(dynstr); - this->dynamic_section_->set_link_section(dynstr); + if (dynsym != NULL) + dynsym->set_link_section(dynstr); + if (this->dynamic_section_ != NULL) + this->dynamic_section_->set_link_section(dynstr); - odyn->add_section_address(elfcpp::DT_STRTAB, dynstr); - odyn->add_section_size(elfcpp::DT_STRSZ, dynstr); + if (odyn != NULL) + { + odyn->add_section_address(elfcpp::DT_STRTAB, dynstr); + odyn->add_section_size(elfcpp::DT_STRSZ, dynstr); + } - *pdynstr = dynstr; + *pdynstr = dynstr; + } // Create the hash tables. @@ -3621,12 +3847,18 @@ Layout::create_dynamic_symtab(const Input_objects* input_objects, hashlen, align, "** hash"); - hashsec->add_output_section_data(hashdata); + if (hashsec != NULL && hashdata != NULL) + hashsec->add_output_section_data(hashdata); - hashsec->set_link_section(dynsym); - hashsec->set_entsize(4); + if (hashsec != NULL) + { + if (dynsym != NULL) + hashsec->set_link_section(dynsym); + hashsec->set_entsize(4); + } - odyn->add_section_address(elfcpp::DT_HASH, hashsec); + if (odyn != NULL) + odyn->add_section_address(elfcpp::DT_HASH, hashsec); } if (strcmp(parameters->options().hash_style(), "gnu") == 0 @@ -3646,17 +3878,23 @@ Layout::create_dynamic_symtab(const Input_objects* input_objects, hashlen, align, "** hash"); - hashsec->add_output_section_data(hashdata); + if (hashsec != NULL && hashdata != NULL) + hashsec->add_output_section_data(hashdata); - hashsec->set_link_section(dynsym); + if (hashsec != NULL) + { + if (dynsym != NULL) + hashsec->set_link_section(dynsym); - // For a 64-bit target, the entries in .gnu.hash do not have a - // uniform size, so we only set the entry size for a 32-bit - // target. - if (parameters->target().get_size() == 32) - hashsec->set_entsize(4); + // For a 64-bit target, the entries in .gnu.hash do not have + // a uniform size, so we only set the entry size for a + // 32-bit target. + if (parameters->target().get_size() == 32) + hashsec->set_entsize(4); - odyn->add_section_address(elfcpp::DT_GNU_HASH, hashsec); + if (odyn != NULL) + odyn->add_section_address(elfcpp::DT_GNU_HASH, hashsec); + } } } @@ -3666,7 +3904,8 @@ void Layout::assign_local_dynsym_offsets(const Input_objects* input_objects) { Output_section* dynsym = this->dynsym_section_; - gold_assert(dynsym != NULL); + if (dynsym == NULL) + return; off_t off = dynsym->offset(); @@ -3747,46 +3986,59 @@ Layout::sized_create_version_sections( ORDER_DYNAMIC_LINKER, false); - unsigned char* vbuf; - unsigned int vsize; - versions->symbol_section_contents(symtab, &this->dynpool_, - local_symcount, - dynamic_symbols, - &vbuf, &vsize); - - Output_section_data* vdata = new Output_data_const_buffer(vbuf, vsize, 2, - "** versions"); - - vsec->add_output_section_data(vdata); - vsec->set_entsize(2); - vsec->set_link_section(this->dynsym_section_); + // Check for NULL since a linker script may discard this section. + if (vsec != NULL) + { + unsigned char* vbuf; + unsigned int vsize; + versions->symbol_section_contents(symtab, + &this->dynpool_, + local_symcount, + dynamic_symbols, + &vbuf, &vsize); + + Output_section_data* vdata = new Output_data_const_buffer(vbuf, vsize, 2, + "** versions"); + + vsec->add_output_section_data(vdata); + vsec->set_entsize(2); + vsec->set_link_section(this->dynsym_section_); + } Output_data_dynamic* const odyn = this->dynamic_data_; - odyn->add_section_address(elfcpp::DT_VERSYM, vsec); + if (odyn != NULL && vsec != NULL) + odyn->add_section_address(elfcpp::DT_VERSYM, vsec); if (versions->any_defs()) { Output_section* vdsec; - vdsec= this->choose_output_section(NULL, ".gnu.version_d", - elfcpp::SHT_GNU_verdef, - elfcpp::SHF_ALLOC, - false, ORDER_DYNAMIC_LINKER, false); + vdsec = this->choose_output_section(NULL, ".gnu.version_d", + elfcpp::SHT_GNU_verdef, + elfcpp::SHF_ALLOC, + false, ORDER_DYNAMIC_LINKER, false); - unsigned char* vdbuf; - unsigned int vdsize; - unsigned int vdentries; - versions->def_section_contents(&this->dynpool_, &vdbuf, - &vdsize, &vdentries); + if (vdsec != NULL) + { + unsigned char* vdbuf; + unsigned int vdsize; + unsigned int vdentries; + versions->def_section_contents(&this->dynpool_, + &vdbuf, &vdsize, + &vdentries); - Output_section_data* vddata = - new Output_data_const_buffer(vdbuf, vdsize, 4, "** version defs"); + Output_section_data* vddata = + new Output_data_const_buffer(vdbuf, vdsize, 4, "** version defs"); - vdsec->add_output_section_data(vddata); - vdsec->set_link_section(dynstr); - vdsec->set_info(vdentries); + vdsec->add_output_section_data(vddata); + vdsec->set_link_section(dynstr); + vdsec->set_info(vdentries); - odyn->add_section_address(elfcpp::DT_VERDEF, vdsec); - odyn->add_constant(elfcpp::DT_VERDEFNUM, vdentries); + if (odyn != NULL) + { + odyn->add_section_address(elfcpp::DT_VERDEF, vdsec); + odyn->add_constant(elfcpp::DT_VERDEFNUM, vdentries); + } + } } if (versions->any_needs()) @@ -3797,22 +4049,28 @@ Layout::sized_create_version_sections( elfcpp::SHF_ALLOC, false, ORDER_DYNAMIC_LINKER, false); - unsigned char* vnbuf; - unsigned int vnsize; - unsigned int vnentries; - versions->need_section_contents(&this->dynpool_, - &vnbuf, &vnsize, - &vnentries); + if (vnsec != NULL) + { + unsigned char* vnbuf; + unsigned int vnsize; + unsigned int vnentries; + versions->need_section_contents(&this->dynpool_, + &vnbuf, &vnsize, + &vnentries); - Output_section_data* vndata = - new Output_data_const_buffer(vnbuf, vnsize, 4, "** version refs"); + Output_section_data* vndata = + new Output_data_const_buffer(vnbuf, vnsize, 4, "** version refs"); - vnsec->add_output_section_data(vndata); - vnsec->set_link_section(dynstr); - vnsec->set_info(vnentries); + vnsec->add_output_section_data(vndata); + vnsec->set_link_section(dynstr); + vnsec->set_info(vnentries); - odyn->add_section_address(elfcpp::DT_VERNEED, vnsec); - odyn->add_constant(elfcpp::DT_VERNEEDNUM, vnentries); + if (odyn != NULL) + { + odyn->add_section_address(elfcpp::DT_VERNEED, vnsec); + odyn->add_constant(elfcpp::DT_VERNEEDNUM, vnentries); + } + } } } @@ -3821,6 +4079,8 @@ Layout::sized_create_version_sections( void Layout::create_interp(const Target* target) { + gold_assert(this->interp_segment_ == NULL); + const char* interp = parameters->options().dynamic_linker(); if (interp == NULL) { @@ -3837,14 +4097,8 @@ Layout::create_interp(const Target* target) elfcpp::SHF_ALLOC, false, ORDER_INTERP, false); - osec->add_output_section_data(odata); - - if (!this->script_options_->saw_phdrs_clause()) - { - Output_segment* oseg = this->make_output_segment(elfcpp::PT_INTERP, - elfcpp::PF_R); - oseg->add_output_section_to_nonload(osec, elfcpp::PF_R); - } + if (osec != NULL) + osec->add_output_section_data(odata); } // Add dynamic tags for the PLT and the dynamic relocs. This is @@ -3860,7 +4114,8 @@ Layout::create_interp(const Target* target) // some targets have multiple reloc sections in PLT_REL. // If DYN_REL is not NULL, it is used for DT_REL/DT_RELA, -// DT_RELSZ/DT_RELASZ, DT_RELENT/DT_RELAENT. +// DT_RELSZ/DT_RELASZ, DT_RELENT/DT_RELAENT. Again we use the output +// section. // If ADD_DEBUG is true, we add a DT_DEBUG entry when generating an // executable. @@ -3889,13 +4144,16 @@ Layout::add_target_dynamic_tags(bool use_rel, const Output_data* plt_got, if (dyn_rel != NULL && dyn_rel->output_section() != NULL) { odyn->add_section_address(use_rel ? elfcpp::DT_REL : elfcpp::DT_RELA, - dyn_rel); - if (plt_rel != NULL && dynrel_includes_plt) + dyn_rel->output_section()); + if (plt_rel != NULL + && plt_rel->output_section() != NULL + && dynrel_includes_plt) odyn->add_section_size(use_rel ? elfcpp::DT_RELSZ : elfcpp::DT_RELASZ, - dyn_rel, plt_rel); + dyn_rel->output_section(), + plt_rel->output_section()); else odyn->add_section_size(use_rel ? elfcpp::DT_RELSZ : elfcpp::DT_RELASZ, - dyn_rel); + dyn_rel->output_section()); const int size = parameters->target().get_size(); elfcpp::DT rel_tag; int rel_size; @@ -3946,7 +4204,8 @@ void Layout::finish_dynamic_section(const Input_objects* input_objects, const Symbol_table* symtab) { - if (!this->script_options_->saw_phdrs_clause()) + if (!this->script_options_->saw_phdrs_clause() + && this->dynamic_section_ != NULL) { Output_segment* oseg = this->make_output_segment(elfcpp::PT_DYNAMIC, (elfcpp::PF_R @@ -3956,14 +4215,14 @@ Layout::finish_dynamic_section(const Input_objects* input_objects, } Output_data_dynamic* const odyn = this->dynamic_data_; + if (odyn == NULL) + return; for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin(); p != input_objects->dynobj_end(); ++p) { - if (!(*p)->is_needed() - && !(*p)->is_incremental() - && (*p)->input_file()->options().as_needed()) + if (!(*p)->is_needed() && (*p)->as_needed()) { // This dynamic object was linked with --as-needed, but it // is not needed. @@ -4050,7 +4309,8 @@ Layout::finish_dynamic_section(const Input_objects* input_objects, p != this->segment_list_.end(); ++p) { - if (((*p)->flags() & elfcpp::PF_W) == 0 + if ((*p)->type() == elfcpp::PT_LOAD + && ((*p)->flags() & elfcpp::PF_W) == 0 && (*p)->has_dynamic_reloc()) { have_textrel = true; @@ -4070,7 +4330,7 @@ Layout::finish_dynamic_section(const Input_objects* input_objects, { if (((*p)->flags() & elfcpp::SHF_ALLOC) != 0 && ((*p)->flags() & elfcpp::SHF_WRITE) == 0 - && ((*p)->has_dynamic_reloc())) + && (*p)->has_dynamic_reloc()) { have_textrel = true; break; @@ -4078,8 +4338,18 @@ Layout::finish_dynamic_section(const Input_objects* input_objects, } } - // Add a DT_FLAGS entry. We add it even if no flags are set so that - // post-link tools can easily modify these flags if desired. + if (parameters->options().filter() != NULL) + odyn->add_string(elfcpp::DT_FILTER, parameters->options().filter()); + if (parameters->options().any_auxiliary()) + { + for (options::String_set::const_iterator p = + parameters->options().auxiliary_begin(); + p != parameters->options().auxiliary_end(); + ++p) + odyn->add_string(elfcpp::DT_AUXILIARY, *p); + } + + // Add a DT_FLAGS entry if necessary. unsigned int flags = 0; if (have_textrel) { @@ -4105,7 +4375,8 @@ Layout::finish_dynamic_section(const Input_objects* input_objects, } if (parameters->options().now()) flags |= elfcpp::DF_BIND_NOW; - odyn->add_constant(elfcpp::DT_FLAGS, flags); + if (flags != 0) + odyn->add_constant(elfcpp::DT_FLAGS, flags); flags = 0; if (parameters->options().initfirst()) @@ -4130,7 +4401,9 @@ Layout::finish_dynamic_section(const Input_objects* input_objects, flags |= elfcpp::DF_1_ORIGIN; if (parameters->options().now()) flags |= elfcpp::DF_1_NOW; - if (flags) + if (parameters->options().Bgroup()) + flags |= elfcpp::DF_1_GROUP; + if (flags != 0) odyn->add_constant(elfcpp::DT_FLAGS_1, flags); } @@ -4141,7 +4414,11 @@ void Layout::set_dynamic_symbol_size(const Symbol_table* symtab) { Output_data_dynamic* const odyn = this->dynamic_data_; + if (odyn == NULL) + return; odyn->finalize_data_size(); + if (this->dynamic_symbol_ == NULL) + return; off_t data_size = odyn->data_size(); const int size = parameters->target().get_size(); if (size == 32) @@ -4161,8 +4438,6 @@ Layout::set_dynamic_symbol_size(const Symbol_table* symtab) const Layout::Section_name_mapping Layout::section_name_mapping[] = { MAPPING_INIT(".text.", ".text"), - MAPPING_INIT(".ctors.", ".ctors"), - MAPPING_INIT(".dtors.", ".dtors"), MAPPING_INIT(".rodata.", ".rodata"), MAPPING_INIT(".data.rel.ro.local", ".data.rel.ro.local"), MAPPING_INIT(".data.rel.ro", ".data.rel.ro"), @@ -4214,7 +4489,8 @@ const int Layout::section_name_mapping_count = // length of NAME. const char* -Layout::output_section_name(const char* name, size_t* plen) +Layout::output_section_name(const Relobj* relobj, const char* name, + size_t* plen) { // gcc 4.3 generates the following sorts of section names when it // needs a section name specific to a function: @@ -4261,9 +4537,62 @@ Layout::output_section_name(const char* name, size_t* plen) } } + // As an additional complication, .ctors sections are output in + // either .ctors or .init_array sections, and .dtors sections are + // output in either .dtors or .fini_array sections. + if (is_prefix_of(".ctors.", name) || is_prefix_of(".dtors.", name)) + { + if (parameters->options().ctors_in_init_array()) + { + *plen = 11; + return name[1] == 'c' ? ".init_array" : ".fini_array"; + } + else + { + *plen = 6; + return name[1] == 'c' ? ".ctors" : ".dtors"; + } + } + if (parameters->options().ctors_in_init_array() + && (strcmp(name, ".ctors") == 0 || strcmp(name, ".dtors") == 0)) + { + // To make .init_array/.fini_array work with gcc we must exclude + // .ctors and .dtors sections from the crtbegin and crtend + // files. + if (relobj == NULL + || (!Layout::match_file_name(relobj, "crtbegin") + && !Layout::match_file_name(relobj, "crtend"))) + { + *plen = 11; + return name[1] == 'c' ? ".init_array" : ".fini_array"; + } + } + return name; } +// Return true if RELOBJ is an input file whose base name matches +// FILE_NAME. The base name must have an extension of ".o", and must +// be exactly FILE_NAME.o or FILE_NAME, one character, ".o". This is +// to match crtbegin.o as well as crtbeginS.o without getting confused +// by other possibilities. Overall matching the file name this way is +// a dreadful hack, but the GNU linker does it in order to better +// support gcc, and we need to be compatible. + +bool +Layout::match_file_name(const Relobj* relobj, const char* match) +{ + const std::string& file_name(relobj->name()); + const char* base_name = lbasename(file_name.c_str()); + size_t match_len = strlen(match); + if (strncmp(base_name, match, match_len) != 0) + return false; + size_t base_len = strlen(base_name); + if (base_len != match_len + 2 && base_len != match_len + 3) + return false; + return memcmp(base_name + base_len - 2, ".o", 2) == 0; +} + // Check if a comdat group or .gnu.linkonce section with the given // NAME is selected for the link. If there is already a section, // *KEPT_SECTION is set to point to the existing section and the @@ -4367,6 +4696,8 @@ Layout::make_output_segment(elfcpp::Elf_Word type, elfcpp::Elf_Word flags) this->tls_segment_ = oseg; else if (type == elfcpp::PT_GNU_RELRO) this->relro_segment_ = oseg; + else if (type == elfcpp::PT_INTERP) + this->interp_segment_ = oseg; return oseg; } @@ -4381,6 +4712,17 @@ Layout::symtab_section_offset() const return 0; } +// Return the section index of the normal symbol table. It may have +// been stripped by the -s/--strip-all option. + +unsigned int +Layout::symtab_section_shndx() const +{ + if (this->symtab_section_ != NULL) + return this->symtab_section_->out_shndx(); + return 0; +} + // Write out the Output_sections. Most won't have anything to write, // since most of the data will come from input sections which are // handled elsewhere. But some Output_sections do have Output_data. @@ -4762,7 +5104,8 @@ Layout::init_fixed_output_section<64, true>( #ifdef HAVE_TARGET_32_LITTLE template Output_section* -Layout::layout<32, false>(Sized_relobj<32, false>* object, unsigned int shndx, +Layout::layout<32, false>(Sized_relobj_file<32, false>* object, + unsigned int shndx, const char* name, const elfcpp::Shdr<32, false>& shdr, unsigned int, unsigned int, off_t*); @@ -4771,7 +5114,8 @@ Layout::layout<32, false>(Sized_relobj<32, false>* object, unsigned int shndx, #ifdef HAVE_TARGET_32_BIG template Output_section* -Layout::layout<32, true>(Sized_relobj<32, true>* object, unsigned int shndx, +Layout::layout<32, true>(Sized_relobj_file<32, true>* object, + unsigned int shndx, const char* name, const elfcpp::Shdr<32, true>& shdr, unsigned int, unsigned int, off_t*); @@ -4780,7 +5124,8 @@ Layout::layout<32, true>(Sized_relobj<32, true>* object, unsigned int shndx, #ifdef HAVE_TARGET_64_LITTLE template Output_section* -Layout::layout<64, false>(Sized_relobj<64, false>* object, unsigned int shndx, +Layout::layout<64, false>(Sized_relobj_file<64, false>* object, + unsigned int shndx, const char* name, const elfcpp::Shdr<64, false>& shdr, unsigned int, unsigned int, off_t*); @@ -4789,7 +5134,8 @@ Layout::layout<64, false>(Sized_relobj<64, false>* object, unsigned int shndx, #ifdef HAVE_TARGET_64_BIG template Output_section* -Layout::layout<64, true>(Sized_relobj<64, true>* object, unsigned int shndx, +Layout::layout<64, true>(Sized_relobj_file<64, true>* object, + unsigned int shndx, const char* name, const elfcpp::Shdr<64, true>& shdr, unsigned int, unsigned int, off_t*); @@ -4798,7 +5144,7 @@ Layout::layout<64, true>(Sized_relobj<64, true>* object, unsigned int shndx, #ifdef HAVE_TARGET_32_LITTLE template Output_section* -Layout::layout_reloc<32, false>(Sized_relobj<32, false>* object, +Layout::layout_reloc<32, false>(Sized_relobj_file<32, false>* object, unsigned int reloc_shndx, const elfcpp::Shdr<32, false>& shdr, Output_section* data_section, @@ -4808,7 +5154,7 @@ Layout::layout_reloc<32, false>(Sized_relobj<32, false>* object, #ifdef HAVE_TARGET_32_BIG template Output_section* -Layout::layout_reloc<32, true>(Sized_relobj<32, true>* object, +Layout::layout_reloc<32, true>(Sized_relobj_file<32, true>* object, unsigned int reloc_shndx, const elfcpp::Shdr<32, true>& shdr, Output_section* data_section, @@ -4818,7 +5164,7 @@ Layout::layout_reloc<32, true>(Sized_relobj<32, true>* object, #ifdef HAVE_TARGET_64_LITTLE template Output_section* -Layout::layout_reloc<64, false>(Sized_relobj<64, false>* object, +Layout::layout_reloc<64, false>(Sized_relobj_file<64, false>* object, unsigned int reloc_shndx, const elfcpp::Shdr<64, false>& shdr, Output_section* data_section, @@ -4828,7 +5174,7 @@ Layout::layout_reloc<64, false>(Sized_relobj<64, false>* object, #ifdef HAVE_TARGET_64_BIG template Output_section* -Layout::layout_reloc<64, true>(Sized_relobj<64, true>* object, +Layout::layout_reloc<64, true>(Sized_relobj_file<64, true>* object, unsigned int reloc_shndx, const elfcpp::Shdr<64, true>& shdr, Output_section* data_section, @@ -4839,7 +5185,7 @@ Layout::layout_reloc<64, true>(Sized_relobj<64, true>* object, template void Layout::layout_group<32, false>(Symbol_table* symtab, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int, const char* group_section_name, const char* signature, @@ -4852,7 +5198,7 @@ Layout::layout_group<32, false>(Symbol_table* symtab, template void Layout::layout_group<32, true>(Symbol_table* symtab, - Sized_relobj<32, true>* object, + Sized_relobj_file<32, true>* object, unsigned int, const char* group_section_name, const char* signature, @@ -4865,7 +5211,7 @@ Layout::layout_group<32, true>(Symbol_table* symtab, template void Layout::layout_group<64, false>(Symbol_table* symtab, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int, const char* group_section_name, const char* signature, @@ -4878,7 +5224,7 @@ Layout::layout_group<64, false>(Symbol_table* symtab, template void Layout::layout_group<64, true>(Symbol_table* symtab, - Sized_relobj<64, true>* object, + Sized_relobj_file<64, true>* object, unsigned int, const char* group_section_name, const char* signature, @@ -4890,7 +5236,7 @@ Layout::layout_group<64, true>(Symbol_table* symtab, #ifdef HAVE_TARGET_32_LITTLE template Output_section* -Layout::layout_eh_frame<32, false>(Sized_relobj<32, false>* object, +Layout::layout_eh_frame<32, false>(Sized_relobj_file<32, false>* object, const unsigned char* symbols, off_t symbols_size, const unsigned char* symbol_names, @@ -4905,9 +5251,9 @@ Layout::layout_eh_frame<32, false>(Sized_relobj<32, false>* object, #ifdef HAVE_TARGET_32_BIG template Output_section* -Layout::layout_eh_frame<32, true>(Sized_relobj<32, true>* object, - const unsigned char* symbols, - off_t symbols_size, +Layout::layout_eh_frame<32, true>(Sized_relobj_file<32, true>* object, + const unsigned char* symbols, + off_t symbols_size, const unsigned char* symbol_names, off_t symbol_names_size, unsigned int shndx, @@ -4920,7 +5266,7 @@ Layout::layout_eh_frame<32, true>(Sized_relobj<32, true>* object, #ifdef HAVE_TARGET_64_LITTLE template Output_section* -Layout::layout_eh_frame<64, false>(Sized_relobj<64, false>* object, +Layout::layout_eh_frame<64, false>(Sized_relobj_file<64, false>* object, const unsigned char* symbols, off_t symbols_size, const unsigned char* symbol_names, @@ -4935,9 +5281,9 @@ Layout::layout_eh_frame<64, false>(Sized_relobj<64, false>* object, #ifdef HAVE_TARGET_64_BIG template Output_section* -Layout::layout_eh_frame<64, true>(Sized_relobj<64, true>* object, - const unsigned char* symbols, - off_t symbols_size, +Layout::layout_eh_frame<64, true>(Sized_relobj_file<64, true>* object, + const unsigned char* symbols, + off_t symbols_size, const unsigned char* symbol_names, off_t symbol_names_size, unsigned int shndx, diff --git a/gold/layout.h b/gold/layout.h index 907181f..05cb50f 100644 --- a/gold/layout.h +++ b/gold/layout.h @@ -1,6 +1,6 @@ // layout.h -- lay out output file sections for gold -*- C++ -*- -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -71,34 +71,60 @@ is_compressed_debug_section(const char* secname); class Free_list { public: + struct Free_list_node + { + Free_list_node(off_t start, off_t end) + : start_(start), end_(end) + { } + off_t start_; + off_t end_; + }; + typedef std::list::const_iterator Const_iterator; + Free_list() - : list_(), last_remove_(list_.begin()), extend_(false), length_(0) + : list_(), last_remove_(list_.begin()), extend_(false), length_(0), + min_hole_(0) { } + // Initialize the free list for a section of length LEN. + // If EXTEND is true, free space may be allocated past the end. void init(off_t len, bool extend); + // Set the minimum hole size that is allowed when allocating + // from the free list. + void + set_min_hole_size(off_t min_hole) + { this->min_hole_ = min_hole; } + + // Remove a chunk from the free list. void remove(off_t start, off_t end); + // Allocate a chunk of space from the free list of length LEN, + // with alignment ALIGN, and minimum offset MINOFF. off_t allocate(off_t len, uint64_t align, off_t minoff); + // Return an iterator for the beginning of the free list. + Const_iterator + begin() const + { return this->list_.begin(); } + + // Return an iterator for the end of the free list. + Const_iterator + end() const + { return this->list_.end(); } + + // Dump the free list (for debugging). void dump(); + // Print usage statistics. static void print_stats(); private: - struct Free_list_node - { - Free_list_node(off_t start, off_t end) - : start_(start), end_(end) - { } - off_t start_; - off_t end_; - }; typedef std::list::iterator Iterator; // The free list. @@ -113,6 +139,10 @@ class Free_list // The total length of the section, segment, or file. off_t length_; + // The minimum hole size allowed. When allocating from the free list, + // we must not leave a hole smaller than this. + off_t min_hole_; + // Statistics: // The total number of free lists used. static unsigned int num_lists; @@ -488,10 +518,18 @@ class Layout // within the output section. template Output_section* - layout(Sized_relobj *object, unsigned int shndx, + layout(Sized_relobj_file *object, unsigned int shndx, const char* name, const elfcpp::Shdr& shdr, unsigned int reloc_shndx, unsigned int reloc_type, off_t* offset); + bool + is_section_ordering_specified() + { return this->section_ordering_specified_; } + + void + set_section_ordering_specified() + { this->section_ordering_specified_ = true; } + // For incremental updates, allocate a block of memory from the // free list. Find a block starting at or after MINOFF. off_t @@ -501,6 +539,8 @@ class Layout unsigned int find_section_order_index(const std::string&); + // Read the sequence of input sections from the file specified with + // linker option --section-ordering-file. void read_layout_from_file(); @@ -510,7 +550,7 @@ class Layout // relocatable information. template Output_section* - layout_reloc(Sized_relobj* object, + layout_reloc(Sized_relobj_file* object, unsigned int reloc_shndx, const elfcpp::Shdr& shdr, Output_section* data_section, @@ -520,7 +560,7 @@ class Layout template void layout_group(Symbol_table* symtab, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int group_shndx, const char* group_section_name, const char* signature, @@ -539,7 +579,7 @@ class Layout // returns the output section, and sets *OFFSET to the offset. template Output_section* - layout_eh_frame(Sized_relobj* object, + layout_eh_frame(Sized_relobj_file* object, const unsigned char* symbols, off_t symbols_size, const unsigned char* symbol_names, @@ -549,6 +589,14 @@ class Layout unsigned int reloc_shndx, unsigned int reloc_type, off_t* offset); + // Add .eh_frame information for a PLT. The FDE must start with a + // 4-byte PC-relative reference to the start of the PLT, followed by + // a 4-byte size of PLT. + void + add_eh_frame_for_plt(Output_data* plt, const unsigned char* cie_data, + size_t cie_length, const unsigned char* fde_data, + size_t fde_length); + // Handle a GNU stack note. This is called once per input object // file. SEEN_GNU_STACK is true if the object file has a // .note.GNU-stack section. GNU_STACK_FLAGS is the section flags @@ -609,6 +657,12 @@ class Layout dynpool() const { return &this->dynpool_; } + // Return the .dynamic output section. This is only valid after the + // layout has been finalized. + Output_section* + dynamic_section() const + { return this->dynamic_section_; } + // Return the symtab_xindex section used to hold large section // indexes for the normal symbol table. Output_symtab_xindex* @@ -645,6 +699,18 @@ class Layout || strncmp(name, ".stab", sizeof(".stab") - 1) == 0); } + // Return true if RELOBJ is an input file whose base name matches + // FILE_NAME. The base name must have an extension of ".o", and + // must be exactly FILE_NAME.o or FILE_NAME, one character, ".o". + static bool + match_file_name(const Relobj* relobj, const char* file_name); + + // Return whether section SHNDX in RELOBJ is a .ctors/.dtors section + // with more than one word being mapped to a .init_array/.fini_array + // section. + bool + is_ctors_in_init_array(Relobj* relobj, unsigned int shndx) const; + // Check if a comdat group or .gnu.linkonce section with the given // NAME is selected for the link. If there is already a section, // *KEPT_SECTION is set to point to the signature and the function @@ -689,6 +755,10 @@ class Layout off_t symtab_section_offset() const; + // Return the section index of the normal symbol tabl.e + unsigned int + symtab_section_shndx() const; + // Return the dynamic symbol table. Output_section* dynsym_section() const @@ -958,14 +1028,14 @@ class Layout // Return whether to include this section in the link. template bool - include_section(Sized_relobj* object, const char* name, + include_section(Sized_relobj_file* object, const char* name, const elfcpp::Shdr&); // Return the output section name to use given an input section // name. Set *PLEN to the length of the name. *PLEN must be // initialized to the length of NAME. static const char* - output_section_name(const char* name, size_t* plen); + output_section_name(const Relobj*, const char* name, size_t* plen); // Return the number of allocated output sections. size_t @@ -1002,6 +1072,10 @@ class Layout void attach_allocated_section_to_segment(Output_section*); + // Make the .eh_frame section. + Output_section* + make_eh_frame_section(const Relobj*); + // Set the final file offsets of all the segments. off_t set_segment_offsets(const Target*, Output_segment*, unsigned int* pshndx); @@ -1040,7 +1114,7 @@ class Layout place_orphan_sections_in_script(); // Return whether SEG1 comes before SEG2 in the output file. - static bool + bool segment_precedes(const Output_segment* seg1, const Output_segment* seg2); // Use to save and restore segments during relaxation. @@ -1090,11 +1164,19 @@ class Layout // A comparison class for segments. - struct Compare_segments + class Compare_segments { + public: + Compare_segments(Layout* layout) + : layout_(layout) + { } + bool operator()(const Output_segment* seg1, const Output_segment* seg2) - { return Layout::segment_precedes(seg1, seg2); } + { return this->layout_->segment_precedes(seg1, seg2); } + + private: + Layout* layout_; }; typedef std::vector Output_section_data_list; @@ -1168,6 +1250,8 @@ class Layout Output_segment* tls_segment_; // A pointer to the PT_GNU_RELRO segment if there is one. Output_segment* relro_segment_; + // A pointer to the PT_INTERP segment if there is one. + Output_segment* interp_segment_; // A backend may increase the size of the PT_GNU_RELRO segment if // there is one. This is the amount to increase it by. unsigned int increase_relro_; @@ -1224,6 +1308,9 @@ class Layout bool resized_signatures_; // Whether we have created a .stab*str output section. bool have_stabstr_section_; + // True if the input sections in the output sections should be sorted + // as specified in a section ordering file. + bool section_ordering_specified_; // In incremental build, holds information check the inputs and build the // .gnu_incremental_inputs section. Incremental_inputs* incremental_inputs_; diff --git a/gold/main.cc b/gold/main.cc index 7ca0d70..f6e7609 100644 --- a/gold/main.cc +++ b/gold/main.cc @@ -1,6 +1,6 @@ // main.cc -- gold main function. -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -33,6 +33,7 @@ #include "script.h" #include "options.h" +#include "target-select.h" #include "parameters.h" #include "errors.h" #include "mapfile.h" @@ -195,10 +196,6 @@ main(int argc, char** argv) if (parameters->options().relocatable()) command_line.script_options().version_script_info()->clear(); - // Load plugin libraries. - if (command_line.options().has_plugins()) - command_line.options().plugins()->load_plugins(); - // The work queue. Workqueue workqueue(command_line.options()); @@ -234,6 +231,10 @@ main(int argc, char** argv) if (parameters->options().section_ordering_file()) layout.read_layout_from_file(); + // Load plugin libraries. + if (command_line.options().has_plugins()) + command_line.options().plugins()->load_plugins(&layout); + // Get the search path from the -L options. Dirsearch search_path; search_path.initialize(&workqueue, &command_line.options().library_path()); @@ -246,6 +247,9 @@ main(int argc, char** argv) // Run the main task processing loop. workqueue.process(0); + if (command_line.options().print_output_format()) + print_output_format(); + if (command_line.options().stats()) { Timer::TimeStats elapsed = timer.get_elapsed_time(); @@ -291,6 +295,8 @@ main(int argc, char** argv) // If the user used --noinhibit-exec, we force the exit status to be // successful. This is compatible with GNU ld. - gold_exit(errors.error_count() == 0 - || parameters->options().noinhibit_exec()); + gold_exit((errors.error_count() == 0 + || parameters->options().noinhibit_exec()) + ? GOLD_OK + : GOLD_ERR); } diff --git a/gold/mapfile.cc b/gold/mapfile.cc index 0cde51e..2062ae4 100644 --- a/gold/mapfile.cc +++ b/gold/mapfile.cc @@ -202,7 +202,7 @@ Mapfile::print_memory_map_header() template void Mapfile::print_input_section_symbols( - const Sized_relobj* relobj, + const Sized_relobj_file* relobj, unsigned int shndx) { unsigned int symcount = relobj->symbol_count(); @@ -273,8 +273,8 @@ Mapfile::print_input_section(Relobj* relobj, unsigned int shndx) #ifdef HAVE_TARGET_32_LITTLE case Parameters::TARGET_32_LITTLE: { - const Sized_relobj<32, false>* sized_relobj = - static_cast*>(relobj); + const Sized_relobj_file<32, false>* sized_relobj = + static_cast*>(relobj); this->print_input_section_symbols(sized_relobj, shndx); } break; @@ -282,8 +282,8 @@ Mapfile::print_input_section(Relobj* relobj, unsigned int shndx) #ifdef HAVE_TARGET_32_BIG case Parameters::TARGET_32_BIG: { - const Sized_relobj<32, true>* sized_relobj = - static_cast*>(relobj); + const Sized_relobj_file<32, true>* sized_relobj = + static_cast*>(relobj); this->print_input_section_symbols(sized_relobj, shndx); } break; @@ -291,8 +291,8 @@ Mapfile::print_input_section(Relobj* relobj, unsigned int shndx) #ifdef HAVE_TARGET_64_LITTLE case Parameters::TARGET_64_LITTLE: { - const Sized_relobj<64, false>* sized_relobj = - static_cast*>(relobj); + const Sized_relobj_file<64, false>* sized_relobj = + static_cast*>(relobj); this->print_input_section_symbols(sized_relobj, shndx); } break; @@ -300,8 +300,8 @@ Mapfile::print_input_section(Relobj* relobj, unsigned int shndx) #ifdef HAVE_TARGET_64_BIG case Parameters::TARGET_64_BIG: { - const Sized_relobj<64, true>* sized_relobj = - static_cast*>(relobj); + const Sized_relobj_file<64, true>* sized_relobj = + static_cast*>(relobj); this->print_input_section_symbols(sized_relobj, shndx); } break; diff --git a/gold/mapfile.h b/gold/mapfile.h index 908a208..808fc66 100644 --- a/gold/mapfile.h +++ b/gold/mapfile.h @@ -33,7 +33,7 @@ class Archive; class Symbol; class Relobj; template -class Sized_relobj; +class Sized_relobj_file; class Output_section; class Output_data; @@ -100,7 +100,7 @@ class Mapfile // Print symbols for an input section. template void - print_input_section_symbols(const Sized_relobj*, + print_input_section_symbols(const Sized_relobj_file*, unsigned int shndx); // Map file to write to. diff --git a/gold/merge.cc b/gold/merge.cc index 4fcbc10..093b6fc 100644 --- a/gold/merge.cc +++ b/gold/merge.cc @@ -1,6 +1,6 @@ // merge.cc -- handle section merging for gold -// Copyright 2006, 2007, 2008, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -242,6 +242,7 @@ Merge_map::add_mapping(Relobj* object, unsigned int shndx, section_offset_type offset, section_size_type length, section_offset_type output_offset) { + gold_assert(object != NULL); Object_merge_map* object_merge_map = object->merge_map(); if (object_merge_map == NULL) { diff --git a/gold/object.cc b/gold/object.cc index b1fc25c..84a9646 100644 --- a/gold/object.cc +++ b/gold/object.cc @@ -189,7 +189,7 @@ Object::section_contents(unsigned int shndx, section_size_type* plen, return this->get_view(loc.file_offset, *plen, true, cache); } -// Read the section data into SD. This is code common to Sized_relobj +// Read the section data into SD. This is code common to Sized_relobj_file // and Sized_dynobj, so we put it into Object. template @@ -374,13 +374,35 @@ Relobj::finalize_incremental_relocs(Layout* layout, bool clear_counts) // Class Sized_relobj. +// Iterate over local symbols, calling a visitor class V for each GOT offset +// associated with a local symbol. + +template +void +Sized_relobj::do_for_all_local_got_entries( + Got_offset_list::Visitor* v) const +{ + unsigned int nsyms = this->local_symbol_count(); + for (unsigned int i = 0; i < nsyms; i++) + { + Local_got_offsets::const_iterator p = this->local_got_offsets_.find(i); + if (p != this->local_got_offsets_.end()) + { + const Got_offset_list* got_offsets = p->second; + got_offsets->for_all_got_offsets(v); + } + } +} + +// Class Sized_relobj_file. + template -Sized_relobj::Sized_relobj( +Sized_relobj_file::Sized_relobj_file( const std::string& name, Input_file* input_file, off_t offset, const elfcpp::Ehdr& ehdr) - : Sized_relobj_base(name, input_file, offset), + : Sized_relobj(name, input_file, offset), elf_file_(this, ehdr), symtab_shndx_(-1U), local_symbol_count_(0), @@ -391,7 +413,6 @@ Sized_relobj::Sized_relobj( local_symbol_offset_(0), local_dynsym_offset_(0), local_values_(), - local_got_offsets_(), local_plt_offsets_(), kept_comdat_sections_(), has_eh_frame_(false), @@ -400,10 +421,11 @@ Sized_relobj::Sized_relobj( deferred_layout_relocs_(), compressed_sections_() { + this->e_type_ = ehdr.get_e_type(); } template -Sized_relobj::~Sized_relobj() +Sized_relobj_file::~Sized_relobj_file() { } @@ -412,7 +434,7 @@ Sized_relobj::~Sized_relobj() template void -Sized_relobj::do_setup() +Sized_relobj_file::do_setup() { const unsigned int shnum = this->elf_file_.shnum(); this->set_shnum(shnum); @@ -425,7 +447,7 @@ Sized_relobj::do_setup() template void -Sized_relobj::find_symtab(const unsigned char* pshdrs) +Sized_relobj_file::find_symtab(const unsigned char* pshdrs) { const unsigned int shnum = this->shnum(); this->symtab_shndx_ = 0; @@ -474,7 +496,7 @@ Sized_relobj::find_symtab(const unsigned char* pshdrs) template Xindex* -Sized_relobj::do_initialize_xindex() +Sized_relobj_file::do_initialize_xindex() { gold_assert(this->symtab_shndx_ != -1U); Xindex* xindex = new Xindex(this->elf_file_.large_shndx_offset()); @@ -487,10 +509,12 @@ Sized_relobj::do_initialize_xindex() template bool -Sized_relobj::check_eh_frame_flags( +Sized_relobj_file::check_eh_frame_flags( const elfcpp::Shdr* shdr) const { - return (shdr->get_sh_type() == elfcpp::SHT_PROGBITS + elfcpp::Elf_Word sh_type = shdr->get_sh_type(); + return ((sh_type == elfcpp::SHT_PROGBITS + || sh_type == elfcpp::SHT_X86_64_UNWIND) && (shdr->get_sh_flags() & elfcpp::SHF_ALLOC) != 0); } @@ -499,7 +523,7 @@ Sized_relobj::check_eh_frame_flags( template bool -Sized_relobj::find_eh_frame( +Sized_relobj_file::find_eh_frame( const unsigned char* pshdrs, const char* names, section_size_type names_size) const @@ -536,7 +560,7 @@ build_compressed_section_map( unsigned int shnum, const char* names, section_size_type names_size, - Sized_relobj* obj) + Sized_relobj_file* obj) { Compressed_section_map* uncompressed_sizes = new Compressed_section_map(); const unsigned int shdr_size = elfcpp::Elf_sizes::shdr_size; @@ -574,7 +598,7 @@ build_compressed_section_map( template void -Sized_relobj::do_read_symbols(Read_symbols_data* sd) +Sized_relobj_file::do_read_symbols(Read_symbols_data* sd) { this->read_section_data(&this->elf_file_, sd); @@ -677,9 +701,9 @@ Sized_relobj::do_read_symbols(Read_symbols_data* sd) template unsigned int -Sized_relobj::symbol_section_and_value(unsigned int sym, - Address* value, - bool* is_ordinary) +Sized_relobj_file::symbol_section_and_value(unsigned int sym, + Address* value, + bool* is_ordinary) { section_size_type symbols_size; const unsigned char* symbols = this->section_contents(this->symtab_shndx_, @@ -703,7 +727,7 @@ Sized_relobj::symbol_section_and_value(unsigned int sym, template bool -Sized_relobj::include_section_group( +Sized_relobj_file::include_section_group( Symbol_table* symtab, Layout* layout, unsigned int index, @@ -725,10 +749,11 @@ Sized_relobj::include_section_group( // just like ordinary sections. elfcpp::Elf_Word flags = elfcpp::Swap<32, big_endian>::readval(pword); - // Look up the group signature, which is the name of a symbol. This - // is a lot of effort to go to to read a string. Why didn't they - // just have the group signature point into the string table, rather - // than indirect through a symbol? + // Look up the group signature, which is the name of a symbol. ELF + // uses a symbol name because some group signatures are long, and + // the name is generally already in the symbol table, so it makes + // sense to put the long string just once in .strtab rather than in + // both .strtab and .shstrtab. // Get the appropriate symbol table header (this will normally be // the single SHT_SYMTAB section, but in principle it need not be). @@ -804,6 +829,13 @@ Sized_relobj::include_section_group( is_comdat = true; } + if (is_comdat && include_group) + { + Incremental_inputs* incremental_inputs = layout->incremental_inputs(); + if (incremental_inputs != NULL) + incremental_inputs->report_comdat_group(this, signature.c_str()); + } + size_t count = shdr.get_sh_size() / sizeof(elfcpp::Elf_Word); std::vector shndxes; @@ -916,7 +948,7 @@ Sized_relobj::include_section_group( template bool -Sized_relobj::include_linkonce_section( +Sized_relobj_file::include_linkonce_section( Layout* layout, unsigned int index, const char* name, @@ -988,12 +1020,13 @@ Sized_relobj::include_linkonce_section( template inline void -Sized_relobj::layout_section(Layout* layout, - unsigned int shndx, - const char* name, - typename This::Shdr& shdr, - unsigned int reloc_shndx, - unsigned int reloc_type) +Sized_relobj_file::layout_section( + Layout* layout, + unsigned int shndx, + const char* name, + const typename This::Shdr& shdr, + unsigned int reloc_shndx, + unsigned int reloc_type) { off_t offset; Output_section* os = layout->layout(this, shndx, name, shdr, @@ -1001,9 +1034,9 @@ Sized_relobj::layout_section(Layout* layout, this->output_sections()[shndx] = os; if (offset == -1) - this->section_offsets_[shndx] = invalid_address; + this->section_offsets()[shndx] = invalid_address; else - this->section_offsets_[shndx] = convert_types(offset); + this->section_offsets()[shndx] = convert_types(offset); // If this section requires special handling, and if there are // relocs that apply to it, then we must do the special handling @@ -1012,6 +1045,53 @@ Sized_relobj::layout_section(Layout* layout, this->set_relocs_must_follow_section_writes(); } +// Layout an input .eh_frame section. + +template +void +Sized_relobj_file::layout_eh_frame_section( + Layout* layout, + const unsigned char* symbols_data, + section_size_type symbols_size, + const unsigned char* symbol_names_data, + section_size_type symbol_names_size, + unsigned int shndx, + const typename This::Shdr& shdr, + unsigned int reloc_shndx, + unsigned int reloc_type) +{ + gold_assert(this->has_eh_frame_); + + off_t offset; + Output_section* os = layout->layout_eh_frame(this, + symbols_data, + symbols_size, + symbol_names_data, + symbol_names_size, + shndx, + shdr, + reloc_shndx, + reloc_type, + &offset); + this->output_sections()[shndx] = os; + if (os == NULL || offset == -1) + { + // An object can contain at most one section holding exception + // frame information. + gold_assert(this->discarded_eh_frame_shndx_ == -1U); + this->discarded_eh_frame_shndx_ = shndx; + this->section_offsets()[shndx] = invalid_address; + } + else + this->section_offsets()[shndx] = convert_types(offset); + + // If this section requires special handling, and if there are + // relocs that aply to it, then we must do the special handling + // before we apply the relocs. + if (os != NULL && offset == -1 && reloc_shndx != 0) + this->set_relocs_must_follow_section_writes(); +} + // Lay out the input sections. We walk through the sections and check // whether they should be included in the link. If they should, we // pass them to the Layout object, which will return an output section @@ -1028,9 +1108,9 @@ Sized_relobj::layout_section(Layout* layout, template void -Sized_relobj::do_layout(Symbol_table* symtab, - Layout* layout, - Read_symbols_data* sd) +Sized_relobj_file::do_layout(Symbol_table* symtab, + Layout* layout, + Read_symbols_data* sd) { const unsigned int shnum = this->shnum(); bool is_gc_pass_one = ((parameters->options().gc_sections() @@ -1069,7 +1149,6 @@ Sized_relobj::do_layout(Symbol_table* symtab, section_size_type section_names_size; const unsigned char* symbols_data = NULL; section_size_type symbols_size; - section_offset_type external_symbols_offset; const unsigned char* symbol_names_data = NULL; section_size_type symbol_names_size; @@ -1079,7 +1158,6 @@ Sized_relobj::do_layout(Symbol_table* symtab, section_names_size = gc_sd->section_names_size; symbols_data = gc_sd->symbols_data; symbols_size = gc_sd->symbols_size; - external_symbols_offset = gc_sd->external_symbols_offset; symbol_names_data = gc_sd->symbol_names_data; symbol_names_size = gc_sd->symbol_names_size; } @@ -1090,7 +1168,6 @@ Sized_relobj::do_layout(Symbol_table* symtab, if (sd->symbols != NULL) symbols_data = sd->symbols->data(); symbols_size = sd->symbols_size; - external_symbols_offset = sd->external_symbols_offset; if (sd->symbol_names != NULL) symbol_names_data = sd->symbol_names->data(); symbol_names_size = sd->symbol_names_size; @@ -1151,7 +1228,7 @@ Sized_relobj::do_layout(Symbol_table* symtab, } Output_sections& out_sections(this->output_sections()); - std::vector
& out_section_offsets(this->section_offsets_); + std::vector
& out_section_offsets(this->section_offsets()); if (!is_gc_pass_two) { @@ -1215,7 +1292,7 @@ Sized_relobj::do_layout(Symbol_table* symtab, { if (this->handle_gnu_warning_section(name, i, symtab)) { - if (!relocatable) + if (!relocatable && !parameters->options().shared()) omit[i] = true; } @@ -1234,8 +1311,7 @@ Sized_relobj::do_layout(Symbol_table* symtab, // -fsplit-stack. if (this->handle_split_stack_section(name)) { - if (!parameters->options().relocatable() - && !parameters->options().shared()) + if (!relocatable && !parameters->options().shared()) omit[i] = true; } @@ -1268,11 +1344,14 @@ Sized_relobj::do_layout(Symbol_table* symtab, Incremental_inputs* incremental_inputs = layout->incremental_inputs(); if (incremental_inputs != NULL && !discard - && (shdr.get_sh_type() == elfcpp::SHT_PROGBITS - || shdr.get_sh_type() == elfcpp::SHT_NOBITS - || shdr.get_sh_type() == elfcpp::SHT_NOTE)) - incremental_inputs->report_input_section(this, i, name, - shdr.get_sh_size()); + && can_incremental_update(shdr.get_sh_type())) + { + off_t sh_size = shdr.get_sh_size(); + section_size_type uncompressed_size; + if (this->section_is_compressed(i, &uncompressed_size)) + sh_size = uncompressed_size; + incremental_inputs->report_input_section(this, i, name, sh_size); + } if (discard) { @@ -1333,7 +1412,12 @@ Sized_relobj::do_layout(Symbol_table* symtab, out_sections[i] = reinterpret_cast(1); out_section_offsets[i] = invalid_address; } - else + else if (should_defer_layout) + this->deferred_layout_.push_back(Deferred_layout(i, name, + pshdrs, + reloc_shndx[i], + reloc_type[i])); + else eh_frame_sections.push_back(i); continue; } @@ -1493,41 +1577,20 @@ Sized_relobj::do_layout(Symbol_table* symtab, p != eh_frame_sections.end(); ++p) { - gold_assert(this->has_eh_frame_); - gold_assert(external_symbols_offset != 0); - unsigned int i = *p; const unsigned char* pshdr; pshdr = section_headers_data + i * This::shdr_size; typename This::Shdr shdr(pshdr); - off_t offset; - Output_section* os = layout->layout_eh_frame(this, - symbols_data, - symbols_size, - symbol_names_data, - symbol_names_size, - i, shdr, - reloc_shndx[i], - reloc_type[i], - &offset); - out_sections[i] = os; - if (os == NULL || offset == -1) - { - // An object can contain at most one section holding exception - // frame information. - gold_assert(this->discarded_eh_frame_shndx_ == -1U); - this->discarded_eh_frame_shndx_ = i; - out_section_offsets[i] = invalid_address; - } - else - out_section_offsets[i] = convert_types(offset); - - // If this section requires special handling, and if there are - // relocs that apply to it, then we must do the special handling - // before we apply the relocs. - if (os != NULL && offset == -1 && reloc_shndx[i] != 0) - this->set_relocs_must_follow_section_writes(); + this->layout_eh_frame_section(layout, + symbols_data, + symbols_size, + symbol_names_data, + symbol_names_size, + i, + shdr, + reloc_shndx[i], + reloc_type[i]); } if (is_gc_pass_two) @@ -1552,7 +1615,7 @@ Sized_relobj::do_layout(Symbol_table* symtab, template void -Sized_relobj::do_layout_deferred_sections(Layout* layout) +Sized_relobj_file::do_layout_deferred_sections(Layout* layout) { typename std::vector::iterator deferred; @@ -1566,8 +1629,27 @@ Sized_relobj::do_layout_deferred_sections(Layout* layout) if (!this->is_section_included(deferred->shndx_)) continue; - this->layout_section(layout, deferred->shndx_, deferred->name_.c_str(), - shdr, deferred->reloc_shndx_, deferred->reloc_type_); + if (parameters->options().relocatable() + || deferred->name_ != ".eh_frame" + || !this->check_eh_frame_flags(&shdr)) + this->layout_section(layout, deferred->shndx_, deferred->name_.c_str(), + shdr, deferred->reloc_shndx_, + deferred->reloc_type_); + else + { + // Reading the symbols again here may be slow. + Read_symbols_data sd; + this->read_symbols(&sd); + this->layout_eh_frame_section(layout, + sd.symbols->data(), + sd.symbols_size, + sd.symbol_names->data(), + sd.symbol_names_size, + deferred->shndx_, + shdr, + deferred->reloc_shndx_, + deferred->reloc_type_); + } } this->deferred_layout_.clear(); @@ -1575,7 +1657,7 @@ Sized_relobj::do_layout_deferred_sections(Layout* layout) // Now handle the deferred relocation sections. Output_sections& out_sections(this->output_sections()); - std::vector
& out_section_offsets(this->section_offsets_); + std::vector
& out_section_offsets(this->section_offsets()); for (deferred = this->deferred_layout_relocs_.begin(); deferred != this->deferred_layout_relocs_.end(); @@ -1607,9 +1689,9 @@ Sized_relobj::do_layout_deferred_sections(Layout* layout) template void -Sized_relobj::do_add_symbols(Symbol_table* symtab, - Read_symbols_data* sd, - Layout*) +Sized_relobj_file::do_add_symbols(Symbol_table* symtab, + Read_symbols_data* sd, + Layout*) { if (sd->symbols == NULL) { @@ -1650,10 +1732,11 @@ Sized_relobj::do_add_symbols(Symbol_table* symtab, template Archive::Should_include -Sized_relobj::do_should_include_member(Symbol_table* symtab, - Layout* layout, - Read_symbols_data* sd, - std::string* why) +Sized_relobj_file::do_should_include_member( + Symbol_table* symtab, + Layout* layout, + Read_symbols_data* sd, + std::string* why) { char* tmpbuf = NULL; size_t tmpbuflen = 0; @@ -1699,7 +1782,7 @@ Sized_relobj::do_should_include_member(Symbol_table* symtab, template void -Sized_relobj::do_for_all_global_symbols( +Sized_relobj_file::do_for_all_global_symbols( Read_symbols_data* sd, Library_base::Symbol_visitor_base* v) { @@ -1720,31 +1803,12 @@ Sized_relobj::do_for_all_global_symbols( } } -// Iterate over local symbols, calling a visitor class V for each GOT offset -// associated with a local symbol. - -template -void -Sized_relobj::do_for_all_local_got_entries( - Got_offset_list::Visitor* v) const -{ - unsigned int nsyms = this->local_symbol_count(); - for (unsigned int i = 0; i < nsyms; i++) - { - Local_got_offsets::const_iterator p = this->local_got_offsets_.find(i); - if (p != this->local_got_offsets_.end()) - { - const Got_offset_list* got_offsets = p->second; - got_offsets->for_all_got_offsets(v); - } - } -} - // Return whether the local symbol SYMNDX has a PLT offset. template bool -Sized_relobj::local_has_plt_offset(unsigned int symndx) const +Sized_relobj_file::local_has_plt_offset( + unsigned int symndx) const { typename Local_plt_offsets::const_iterator p = this->local_plt_offsets_.find(symndx); @@ -1755,7 +1819,7 @@ Sized_relobj::local_has_plt_offset(unsigned int symndx) const template unsigned int -Sized_relobj::local_plt_offset(unsigned int symndx) const +Sized_relobj_file::local_plt_offset(unsigned int symndx) const { typename Local_plt_offsets::const_iterator p = this->local_plt_offsets_.find(symndx); @@ -1767,8 +1831,8 @@ Sized_relobj::local_plt_offset(unsigned int symndx) const template void -Sized_relobj::set_local_plt_offset(unsigned int symndx, - unsigned int plt_offset) +Sized_relobj_file::set_local_plt_offset( + unsigned int symndx, unsigned int plt_offset) { std::pair ins = this->local_plt_offsets_.insert(std::make_pair(symndx, plt_offset)); @@ -1783,8 +1847,8 @@ Sized_relobj::set_local_plt_offset(unsigned int symndx, template void -Sized_relobj::do_count_local_symbols(Stringpool* pool, - Stringpool* dynpool) +Sized_relobj_file::do_count_local_symbols(Stringpool* pool, + Stringpool* dynpool) { gold_assert(this->symtab_shndx_ != -1U); if (this->symtab_shndx_ == 0) @@ -1824,6 +1888,7 @@ Sized_relobj::do_count_local_symbols(Stringpool* pool, unsigned int dyncount = 0; // Skip the first, dummy, symbol. psyms += sym_size; + bool strip_all = parameters->options().strip_all(); bool discard_all = parameters->options().discard_all(); bool discard_locals = parameters->options().discard_locals(); for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) @@ -1882,7 +1947,8 @@ Sized_relobj::do_count_local_symbols(Stringpool* pool, ++dyncount; } - if (discard_all && lv.may_be_discarded_from_output_symtab()) + if (strip_all + || (discard_all && lv.may_be_discarded_from_output_symtab())) { lv.set_no_output_symtab_entry(); continue; @@ -1930,8 +1996,8 @@ Sized_relobj::do_count_local_symbols(Stringpool* pool, // Compute the final value of a local symbol. template -typename Sized_relobj::Compute_final_local_value_status -Sized_relobj::compute_final_local_value_internal( +typename Sized_relobj_file::Compute_final_local_value_status +Sized_relobj_file::compute_final_local_value_internal( unsigned int r_sym, const Symbol_value* lv_in, Symbol_value* lv_out, @@ -1980,8 +2046,8 @@ Sized_relobj::compute_final_local_value_internal( Section_id folded = symtab->icf()->get_folded_section(this, shndx); gold_assert(folded.first != NULL); - Sized_relobj* folded_obj = reinterpret_cast - *>(folded.first); + Sized_relobj_file* folded_obj = reinterpret_cast + *>(folded.first); os = folded_obj->output_section(folded.second); gold_assert(os != NULL); secoffset = folded_obj->get_output_section_offset(folded.second); @@ -2083,8 +2149,8 @@ Sized_relobj::compute_final_local_value_internal( // everything is finalized. The caller should also free up any allocated // memory in the return value in *LV. template -typename Sized_relobj::Compute_final_local_value_status -Sized_relobj::compute_final_local_value( +typename Sized_relobj_file::Compute_final_local_value_status +Sized_relobj_file::compute_final_local_value( unsigned int r_sym, const Symbol_value* lv_in, Symbol_value* lv_out, @@ -2093,7 +2159,7 @@ Sized_relobj::compute_final_local_value( // This is just a wrapper of compute_final_local_value_internal. const bool relocatable = parameters->options().relocatable(); const Output_sections& out_sections(this->output_sections()); - const std::vector
& out_offsets(this->section_offsets_); + const std::vector
& out_offsets(this->section_offsets()); return this->compute_final_local_value_internal(r_sym, lv_in, lv_out, relocatable, out_sections, out_offsets, symtab); @@ -2106,9 +2172,10 @@ Sized_relobj::compute_final_local_value( template unsigned int -Sized_relobj::do_finalize_local_symbols(unsigned int index, - off_t off, - Symbol_table* symtab) +Sized_relobj_file::do_finalize_local_symbols( + unsigned int index, + off_t off, + Symbol_table* symtab) { gold_assert(off == static_cast(align_address(off, size >> 3))); @@ -2117,7 +2184,7 @@ Sized_relobj::do_finalize_local_symbols(unsigned int index, const bool relocatable = parameters->options().relocatable(); const Output_sections& out_sections(this->output_sections()); - const std::vector
& out_offsets(this->section_offsets_); + const std::vector
& out_offsets(this->section_offsets()); for (unsigned int i = 1; i < loccount; ++i) { @@ -2151,7 +2218,8 @@ Sized_relobj::do_finalize_local_symbols(unsigned int index, template unsigned int -Sized_relobj::do_set_local_dynsym_indexes(unsigned int index) +Sized_relobj_file::do_set_local_dynsym_indexes( + unsigned int index) { const unsigned int loccount = this->local_symbol_count_; for (unsigned int i = 1; i < loccount; ++i) @@ -2172,7 +2240,7 @@ Sized_relobj::do_set_local_dynsym_indexes(unsigned int index) template unsigned int -Sized_relobj::do_set_local_dynsym_offset(off_t off) +Sized_relobj_file::do_set_local_dynsym_offset(off_t off) { gold_assert(off == static_cast(align_address(off, size >> 3))); this->local_dynsym_offset_ = off; @@ -2184,7 +2252,7 @@ Sized_relobj::do_set_local_dynsym_offset(off_t off) template uint64_t -Sized_relobj::do_section_flags(unsigned int shndx) +Sized_relobj_file::do_section_flags(unsigned int shndx) { Symbols_data* sd = this->get_symbols_data(); if (sd != NULL) @@ -2203,7 +2271,7 @@ Sized_relobj::do_section_flags(unsigned int shndx) template uint64_t -Sized_relobj::do_section_entsize(unsigned int shndx) +Sized_relobj_file::do_section_entsize(unsigned int shndx) { Symbols_data* sd = this->get_symbols_data(); gold_assert(sd != NULL); @@ -2218,7 +2286,7 @@ Sized_relobj::do_section_entsize(unsigned int shndx) template void -Sized_relobj::write_local_symbols( +Sized_relobj_file::write_local_symbols( Output_file* of, const Stringpool* sympool, const Stringpool* dynpool, @@ -2368,7 +2436,7 @@ Sized_relobj::write_local_symbols( template bool -Sized_relobj::get_symbol_location_info( +Sized_relobj_file::get_symbol_location_info( unsigned int shndx, off_t offset, Symbol_location_info* info) @@ -2443,8 +2511,8 @@ Sized_relobj::get_symbol_location_info( // debugging sections. If we can't find the kept section, return 0. template -typename Sized_relobj::Address -Sized_relobj::map_to_kept_section( +typename Sized_relobj_file::Address +Sized_relobj_file::map_to_kept_section( unsigned int shndx, bool* found) const { @@ -2452,8 +2520,8 @@ Sized_relobj::map_to_kept_section( unsigned int kept_shndx; if (this->get_kept_comdat_section(shndx, &kept_object, &kept_shndx)) { - Sized_relobj* kept_relobj = - static_cast*>(kept_object); + Sized_relobj_file* kept_relobj = + static_cast*>(kept_object); Output_section* os = kept_relobj->output_section(kept_shndx); Address offset = kept_relobj->get_output_section_offset(kept_shndx); if (os != NULL && offset != invalid_address) @@ -2470,7 +2538,7 @@ Sized_relobj::map_to_kept_section( template void -Sized_relobj::do_get_global_symbol_counts( +Sized_relobj_file::do_get_global_symbol_counts( const Symbol_table*, size_t* defined, size_t* used) const @@ -2849,22 +2917,22 @@ Object::read_section_data<64, true>(elfcpp::Elf_file<64, true, Object>*, #ifdef HAVE_TARGET_32_LITTLE template -class Sized_relobj<32, false>; +class Sized_relobj_file<32, false>; #endif #ifdef HAVE_TARGET_32_BIG template -class Sized_relobj<32, true>; +class Sized_relobj_file<32, true>; #endif #ifdef HAVE_TARGET_64_LITTLE template -class Sized_relobj<64, false>; +class Sized_relobj_file<64, false>; #endif #ifdef HAVE_TARGET_64_BIG template -class Sized_relobj<64, true>; +class Sized_relobj_file<64, true>; #endif #ifdef HAVE_TARGET_32_LITTLE diff --git a/gold/object.h b/gold/object.h index c814e76..a389c54 100644 --- a/gold/object.h +++ b/gold/object.h @@ -332,12 +332,13 @@ class Object : name_(name), input_file_(input_file), offset_(offset), shnum_(-1U), is_dynamic_(is_dynamic), is_needed_(false), uses_split_stack_(false), has_no_split_stack_(false), no_export_(false), - is_in_system_directory_(false), xindex_(NULL) + is_in_system_directory_(false), as_needed_(false), xindex_(NULL) { if (input_file != NULL) { input_file->file().add_object(); this->is_in_system_directory_ = input_file->is_in_system_directory(); + this->as_needed_ = input_file->options().as_needed(); } } @@ -386,6 +387,12 @@ class Object has_no_split_stack() const { return this->has_no_split_stack_; } + // Returns NULL for Objects that are not dynamic objects. This method + // is overridden in the Dynobj class. + Dynobj* + dynobj() + { return this->do_dynobj(); } + // Returns NULL for Objects that are not plugin objects. This method // is overridden in the Pluginobj class. Pluginobj* @@ -688,6 +695,16 @@ class Object is_in_system_directory() const { return this->is_in_system_directory_; } + // Set flag that this object was linked with --as-needed. + void + set_as_needed() + { this->as_needed_ = true; } + + // Return whether this object was linked with --as-needed. + bool + as_needed() const + { return this->as_needed_; } + // Return whether we found this object by searching a directory. bool searched_for() const @@ -719,6 +736,12 @@ class Object { return this->do_get_incremental_reloc_count(symndx); } protected: + // Returns NULL for Objects that are not dynamic objects. This method + // is overridden in the Dynobj class. + virtual Dynobj* + do_dynobj() + { return NULL; } + // Returns NULL for Objects that are not plugin objects. This method // is overridden in the Pluginobj class. virtual Pluginobj* @@ -834,7 +857,7 @@ class Object set_shnum(int shnum) { this->shnum_ = shnum; } - // Functions used by both Sized_relobj and Sized_dynobj. + // Functions used by both Sized_relobj_file and Sized_dynobj. // Read the section data into a Read_symbols_data object. template @@ -911,12 +934,14 @@ class Object bool no_export_ : 1; // True if the object was found in a system directory. bool is_in_system_directory_ : 1; + // True if the object was linked with --as-needed. + bool as_needed_ : 1; // Many sections for objects with more than SHN_LORESERVE sections. Xindex* xindex_; }; // A regular object (ET_REL). This is an abstract base class itself. -// The implementation is the template class Sized_relobj. +// The implementation is the template class Sized_relobj_file. class Relobj : public Object { @@ -929,7 +954,9 @@ class Relobj : public Object relocs_must_follow_section_writes_(false), sd_(NULL), reloc_counts_(NULL), - reloc_bases_(NULL) + reloc_bases_(NULL), + first_dyn_reloc_(0), + dyn_reloc_count_(0) { } // During garbage collection, the Read_symbols_data pass for @@ -987,6 +1014,16 @@ class Relobj : public Object local_symbol_count() const { return this->do_local_symbol_count(); } + // The number of local symbols in the output symbol table. + virtual unsigned int + output_local_symbol_count() const + { return this->do_output_local_symbol_count(); } + + // The file offset for local symbols in the output symbol table. + virtual off_t + local_symbol_offset() const + { return this->do_local_symbol_offset(); } + // Initial local symbol processing: count the number of local symbols // in the output symbol table and dynamic symbol table; add local symbol // names to *POOL and *DYNPOOL. @@ -1012,6 +1049,25 @@ class Relobj : public Object set_local_dynsym_offset(off_t off) { return this->do_set_local_dynsym_offset(off); } + // Record a dynamic relocation against an input section from this object. + void + add_dyn_reloc(unsigned int index) + { + if (this->dyn_reloc_count_ == 0) + this->first_dyn_reloc_ = index; + ++this->dyn_reloc_count_; + } + + // Return the index of the first dynamic relocation. + unsigned int + first_dyn_reloc() const + { return this->first_dyn_reloc_; } + + // Return the count of dynamic relocations. + unsigned int + dyn_reloc_count() const + { return this->dyn_reloc_count_; } + // Relocate the input sections and write out the local symbols. void relocate(const Symbol_table* symtab, const Layout* layout, Output_file* of) @@ -1115,6 +1171,14 @@ class Relobj : public Object virtual unsigned int do_local_symbol_count() const = 0; + // Return the number of output local symbols--implemented by child class. + virtual unsigned int + do_output_local_symbol_count() const = 0; + + // Return the file offset for local symbols--implemented by child class. + virtual off_t + do_local_symbol_offset() const = 0; + // Count local symbols--implemented by child class. virtual void do_count_local_symbols(Stringpool_template*, @@ -1244,6 +1308,10 @@ class Relobj : public Object unsigned int* reloc_counts_; // Per-symbol base indexes of relocations, for incremental links. unsigned int* reloc_bases_; + // Index of the first dynamic relocation for this object. + unsigned int first_dyn_reloc_; + // Count of dynamic relocations for this object. + unsigned int dyn_reloc_count_; }; // This class is used to handle relocations against a section symbol @@ -1361,7 +1429,7 @@ class Symbol_value // symbol is defined, and ADDEND is an addend to add to the value. template Value - value(const Sized_relobj* object, Value addend) const + value(const Sized_relobj_file* object, Value addend) const { if (this->has_output_value_) return this->u_.value + addend; @@ -1660,37 +1728,155 @@ typedef std::map Compressed_section_map; // or an incremental (unchanged) object. This is size and endian specific. template -class Sized_relobj_base : public Relobj +class Sized_relobj : public Relobj { public: + typedef typename elfcpp::Elf_types::Elf_Addr Address; typedef Relobj::Symbols Symbols; - Sized_relobj_base(const std::string& name, Input_file* input_file) - : Relobj(name, input_file) + static const Address invalid_address = static_cast
(0) - 1; + + Sized_relobj(const std::string& name, Input_file* input_file) + : Relobj(name, input_file), local_got_offsets_(), section_offsets_() { } - Sized_relobj_base(const std::string& name, Input_file* input_file, + Sized_relobj(const std::string& name, Input_file* input_file, off_t offset) - : Relobj(name, input_file, offset) + : Relobj(name, input_file, offset), local_got_offsets_(), section_offsets_() { } - ~Sized_relobj_base() + ~Sized_relobj() { } + // If this is a regular object, return a pointer to the Sized_relobj_file + // object. Otherwise, return NULL. + virtual Sized_relobj_file* + sized_relobj() + { return NULL; } + + const virtual Sized_relobj_file* + sized_relobj() const + { return NULL; } + + // Checks if the offset of input section SHNDX within its output + // section is invalid. + bool + is_output_section_offset_invalid(unsigned int shndx) const + { return this->get_output_section_offset(shndx) == invalid_address; } + + // Get the offset of input section SHNDX within its output section. + // This is -1 if the input section requires a special mapping, such + // as a merge section. The output section can be found in the + // output_sections_ field of the parent class Relobj. + Address + get_output_section_offset(unsigned int shndx) const + { + gold_assert(shndx < this->section_offsets_.size()); + return this->section_offsets_[shndx]; + } + + // Return whether the local symbol SYMNDX has a GOT offset. + // For TLS symbols, the GOT entry will hold its tp-relative offset. + bool + local_has_got_offset(unsigned int symndx, unsigned int got_type) const + { + Local_got_offsets::const_iterator p = + this->local_got_offsets_.find(symndx); + return (p != this->local_got_offsets_.end() + && p->second->get_offset(got_type) != -1U); + } + + // Return the GOT offset of the local symbol SYMNDX. + unsigned int + local_got_offset(unsigned int symndx, unsigned int got_type) const + { + Local_got_offsets::const_iterator p = + this->local_got_offsets_.find(symndx); + gold_assert(p != this->local_got_offsets_.end()); + unsigned int off = p->second->get_offset(got_type); + gold_assert(off != -1U); + return off; + } + + // Set the GOT offset of the local symbol SYMNDX to GOT_OFFSET. + void + set_local_got_offset(unsigned int symndx, unsigned int got_type, + unsigned int got_offset) + { + Local_got_offsets::const_iterator p = + this->local_got_offsets_.find(symndx); + if (p != this->local_got_offsets_.end()) + p->second->set_offset(got_type, got_offset); + else + { + Got_offset_list* g = new Got_offset_list(got_type, got_offset); + std::pair ins = + this->local_got_offsets_.insert(std::make_pair(symndx, g)); + gold_assert(ins.second); + } + } + + // Iterate over local symbols, calling a visitor class V for each GOT offset + // associated with a local symbol. + void + do_for_all_local_got_entries(Got_offset_list::Visitor* v) const; + protected: typedef Relobj::Output_sections Output_sections; + // Clear the local symbol information. + void + clear_got_offsets() + { this->local_got_offsets_.clear(); } + + // Return the vector of section offsets. + std::vector
& + section_offsets() + { return this->section_offsets_; } + + // Get the offset of a section. + uint64_t + do_output_section_offset(unsigned int shndx) const + { + Address off = this->get_output_section_offset(shndx); + if (off == invalid_address) + return -1ULL; + return off; + } + + // Set the offset of a section. + void + do_set_section_offset(unsigned int shndx, uint64_t off) + { + gold_assert(shndx < this->section_offsets_.size()); + this->section_offsets_[shndx] = + (off == static_cast(-1) + ? invalid_address + : convert_types(off)); + } + private: + // The GOT offsets of local symbols. This map also stores GOT offsets + // for tp-relative offsets for TLS symbols. + typedef Unordered_map Local_got_offsets; + + // GOT offsets for local non-TLS symbols, and tp-relative offsets + // for TLS symbols, indexed by symbol number. + Local_got_offsets local_got_offsets_; + // For each input section, the offset of the input section in its + // output section. This is INVALID_ADDRESS if the input section requires a + // special mapping. + std::vector
section_offsets_; }; // A regular object file. This is size and endian specific. template -class Sized_relobj : public Sized_relobj_base +class Sized_relobj_file : public Sized_relobj { public: typedef typename elfcpp::Elf_types::Elf_Addr Address; - typedef typename Sized_relobj_base::Symbols Symbols; + typedef typename Sized_relobj::Symbols Symbols; typedef std::vector > Local_values; static const Address invalid_address = static_cast
(0) - 1; @@ -1705,22 +1891,32 @@ class Sized_relobj : public Sized_relobj_base CFLV_DISCARDED }; - Sized_relobj(const std::string& name, Input_file* input_file, off_t offset, - const typename elfcpp::Ehdr&); + Sized_relobj_file(const std::string& name, + Input_file* input_file, + off_t offset, + const typename elfcpp::Ehdr&); - ~Sized_relobj(); - - // Checks if the offset of input section SHNDX within its output - // section is invalid. - bool - is_output_section_offset_invalid(unsigned int shndx) const - { return this->get_output_section_offset(shndx) == invalid_address; } + ~Sized_relobj_file(); // Set up the object file based on TARGET. void setup() { this->do_setup(); } + // Return a pointer to the Sized_relobj_file object. + Sized_relobj_file* + sized_relobj() + { return this; } + + const Sized_relobj_file* + sized_relobj() const + { return this; } + + // Return the ELF file type. + int + e_type() const + { return this->e_type_; } + // Return the number of symbols. This is only valid after // Object::add_symbols has been called. unsigned int @@ -1800,47 +1996,6 @@ class Sized_relobj : public Sized_relobj_base this->local_values_[sym].set_needs_output_dynsym_entry(); } - // Return whether the local symbol SYMNDX has a GOT offset. - // For TLS symbols, the GOT entry will hold its tp-relative offset. - bool - local_has_got_offset(unsigned int symndx, unsigned int got_type) const - { - Local_got_offsets::const_iterator p = - this->local_got_offsets_.find(symndx); - return (p != this->local_got_offsets_.end() - && p->second->get_offset(got_type) != -1U); - } - - // Return the GOT offset of the local symbol SYMNDX. - unsigned int - local_got_offset(unsigned int symndx, unsigned int got_type) const - { - Local_got_offsets::const_iterator p = - this->local_got_offsets_.find(symndx); - gold_assert(p != this->local_got_offsets_.end()); - unsigned int off = p->second->get_offset(got_type); - gold_assert(off != -1U); - return off; - } - - // Set the GOT offset of the local symbol SYMNDX to GOT_OFFSET. - void - set_local_got_offset(unsigned int symndx, unsigned int got_type, - unsigned int got_offset) - { - Local_got_offsets::const_iterator p = - this->local_got_offsets_.find(symndx); - if (p != this->local_got_offsets_.end()) - p->second->set_offset(got_type, got_offset); - else - { - Got_offset_list* g = new Got_offset_list(got_type, got_offset); - std::pair ins = - this->local_got_offsets_.insert(std::make_pair(symndx, g)); - gold_assert(ins.second); - } - } - // Return whether the local symbol SYMNDX has a PLT offset. bool local_has_plt_offset(unsigned int symndx) const; @@ -1854,17 +2009,6 @@ class Sized_relobj : public Sized_relobj_base void set_local_plt_offset(unsigned int symndx, unsigned int plt_offset); - // Get the offset of input section SHNDX within its output section. - // This is -1 if the input section requires a special mapping, such - // as a merge section. The output section can be found in the - // output_sections_ field of the parent class Relobj. - Address - get_output_section_offset(unsigned int shndx) const - { - gold_assert(shndx < this->section_offsets_.size()); - return this->section_offsets_[shndx]; - } - // Return the name of the symbol that spans the given offset in the // specified section in this object. This is used only for error // messages and is not particularly efficient. @@ -1895,7 +2039,7 @@ class Sized_relobj : public Sized_relobj_base const Symbol_table* symtab); protected: - typedef typename Sized_relobj_base::Output_sections + typedef typename Sized_relobj::Output_sections Output_sections; // Set up. @@ -1911,6 +2055,16 @@ class Sized_relobj : public Sized_relobj_base do_local_symbol_count() const { return this->local_symbol_count_; } + // Return the number of local symbols in the output symbol table. + unsigned int + do_output_local_symbol_count() const + { return this->output_local_symbol_count_; } + + // Return the number of local symbols in the output symbol table. + off_t + do_local_symbol_offset() const + { return this->local_symbol_offset_; } + // Lay out the input sections. void do_layout(Symbol_table*, Layout*, Read_symbols_data*); @@ -1933,11 +2087,6 @@ class Sized_relobj : public Sized_relobj_base do_for_all_global_symbols(Read_symbols_data* sd, Library_base::Symbol_visitor_base* v); - // Iterate over local symbols, calling a visitor class V for each GOT offset - // associated with a local symbol. - void - do_for_all_local_got_entries(Got_offset_list::Visitor* v) const; - // Read the relocs. void do_read_relocs(Read_relocs_data*); @@ -2033,27 +2182,6 @@ class Sized_relobj : public Sized_relobj_base do_get_global_symbols() const { return &this->symbols_; } - // Get the offset of a section. - uint64_t - do_output_section_offset(unsigned int shndx) const - { - Address off = this->get_output_section_offset(shndx); - if (off == invalid_address) - return -1ULL; - return off; - } - - // Set the offset of a section. - void - do_set_section_offset(unsigned int shndx, uint64_t off) - { - gold_assert(shndx < this->section_offsets_.size()); - this->section_offsets_[shndx] = - (off == static_cast(-1) - ? invalid_address - : convert_types(off)); - } - // Adjust a section index if necessary. unsigned int adjust_shndx(unsigned int shndx) @@ -2097,6 +2225,7 @@ class Sized_relobj : public Sized_relobj_base section_size_type view_size; bool is_input_output_view; bool is_postprocessing_view; + bool is_ctors_reverse_view; }; typedef std::vector Views; @@ -2133,7 +2262,7 @@ class Sized_relobj : public Sized_relobj_base private: // For convenience. - typedef Sized_relobj This; + typedef Sized_relobj_file This; static const int ehdr_size = elfcpp::Elf_sizes::ehdr_size; static const int shdr_size = elfcpp::Elf_sizes::shdr_size; static const int sym_size = elfcpp::Elf_sizes::sym_size; @@ -2182,13 +2311,23 @@ class Sized_relobj : public Sized_relobj_base // Layout an input section. void layout_section(Layout* layout, unsigned int shndx, const char* name, - typename This::Shdr& shdr, unsigned int reloc_shndx, + const typename This::Shdr& shdr, unsigned int reloc_shndx, unsigned int reloc_type); + // Layout an input .eh_frame section. + void + layout_eh_frame_section(Layout* layout, const unsigned char* symbols_data, + section_size_type symbols_size, + const unsigned char* symbol_names_data, + section_size_type symbol_names_size, + unsigned int shndx, const typename This::Shdr&, + unsigned int reloc_shndx, unsigned int reloc_type); + // Write section data to the output file. Record the views and // sizes in VIEWS for use when relocating. void - write_sections(const unsigned char* pshdrs, Output_file*, Views*); + write_sections(const Layout*, const unsigned char* pshdrs, Output_file*, + Views*); // Relocate the sections in the output file. void @@ -2197,6 +2336,11 @@ class Sized_relobj : public Sized_relobj_base Views* pviews) { this->do_relocate_sections(symtab, layout, pshdrs, of, pviews); } + // Reverse the words in a section. Used for .ctors sections mapped + // to .init_array sections. + void + reverse_words(unsigned char*, section_size_type); + // Scan the input relocations for --emit-relocs. void emit_relocs_scan(Symbol_table*, Layout*, const unsigned char* plocal_syms, @@ -2341,10 +2485,6 @@ class Sized_relobj : public Sized_relobj_base const std::vector
& out_offsets, const Symbol_table* symtab); - // The GOT offsets of local symbols. This map also stores GOT offsets - // for tp-relative offsets for TLS symbols. - typedef Unordered_map Local_got_offsets; - // The PLT offsets of local symbols. typedef Unordered_map Local_plt_offsets; @@ -2369,6 +2509,9 @@ class Sized_relobj : public Sized_relobj_base // General access to the ELF file. elfcpp::Elf_file elf_file_; + // Type of ELF file (ET_REL or ET_EXEC). ET_EXEC files are allowed + // as input files only for the --just-symbols option. + int e_type_; // Index of SHT_SYMTAB section. unsigned int symtab_shndx_; // The number of local symbols. @@ -2388,15 +2531,8 @@ class Sized_relobj : public Sized_relobj_base off_t local_dynsym_offset_; // Values of local symbols. Local_values local_values_; - // GOT offsets for local non-TLS symbols, and tp-relative offsets - // for TLS symbols, indexed by symbol number. - Local_got_offsets local_got_offsets_; // PLT offsets for local symbols. Local_plt_offsets local_plt_offsets_; - // For each input section, the offset of the input section in its - // output section. This is INVALID_ADDRESS if the input section requires a - // special mapping. - std::vector
section_offsets_; // Table mapping discarded comdat sections to corresponding kept sections. Kept_comdat_section_table kept_comdat_sections_; // Whether this object has a GNU style .eh_frame section. @@ -2520,7 +2656,7 @@ struct Relocate_info // Layout. const Layout* layout; // Object being relocated. - Sized_relobj* object; + Sized_relobj_file* object; // Section index of relocation section. unsigned int reloc_shndx; // Section header of relocation section. diff --git a/gold/options.cc b/gold/options.cc index 3ec76a8..be32645 100644 --- a/gold/options.cc +++ b/gold/options.cc @@ -1,6 +1,6 @@ // options.c -- handle command line options for gold -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -170,6 +170,15 @@ help() printf(" %s", *p); printf("\n"); + printf(_("%s: supported emulations:"), gold::program_name); + supported_names.clear(); + gold::supported_emulation_names(&supported_names); + for (std::vector::const_iterator p = supported_names.begin(); + p != supported_names.end(); + ++p) + printf(" %s", *p); + printf("\n"); + // REPORT_BUGS_TO is defined in bfd/bfdver.h. const char* report = REPORT_BUGS_TO; if (*report != '\0') @@ -226,6 +235,17 @@ parse_double(const char* option_name, const char* arg, double* retval) } void +parse_percent(const char* option_name, const char* arg, double* retval) +{ + char* endptr; + *retval = strtod(arg, &endptr) / 100.0; + if (*endptr != '\0') + gold_fatal(_("%s: invalid option value " + "(expected a floating point number): %s"), + option_name, arg); +} + +void parse_string(const char* option_name, const char* arg, const char** retval) { if (*arg == '\0') @@ -300,6 +320,7 @@ General_options::parse_V(const char*, const char*, Command_line*) { gold::print_version(true); this->printed_version_ = true; + printf(_(" Supported targets:\n")); std::vector supported_names; gold::supported_target_names(&supported_names); @@ -307,6 +328,14 @@ General_options::parse_V(const char*, const char*, Command_line*) p != supported_names.end(); ++p) printf(" %s\n", *p); + + printf(_(" Supported emulations:\n")); + supported_names.clear(); + gold::supported_emulation_names(&supported_names); + for (std::vector::const_iterator p = supported_names.begin(); + p != supported_names.end(); + ++p) + printf(" %s\n", *p); } void @@ -369,6 +398,14 @@ General_options::parse_incremental_unknown(const char*, const char*, } void +General_options::parse_incremental_startup_unchanged(const char*, const char*, + Command_line*) +{ + this->implicit_incremental_ = true; + this->incremental_startup_disposition_ = INCREMENTAL_UNCHANGED; +} + +void General_options::parse_library(const char*, const char* arg, Command_line* cmdline) { @@ -881,7 +918,8 @@ General_options::General_options() plugins_(NULL), dynamic_list_(), incremental_mode_(INCREMENTAL_OFF), - incremental_disposition_(INCREMENTAL_CHECK), + incremental_disposition_(INCREMENTAL_STARTUP), + incremental_startup_disposition_(INCREMENTAL_CHECK), implicit_incremental_(false), excluded_libs_(), symbols_to_retain_(), @@ -1130,6 +1168,14 @@ General_options::finalize() } } + // -Bgroup implies --unresolved-symbols=report-all. + if (this->Bgroup() && !this->user_set_unresolved_symbols()) + this->set_unresolved_symbols("report-all"); + + // -shared implies --allow-shlib-undefined. Currently + // ---allow-shlib-undefined controls warnings issued based on the + // -symbol table. --unresolved-symbols controls warnings issued + // -based on relocations. if (this->shared() && !this->user_set_allow_shlib_undefined()) this->set_allow_shlib_undefined(true); @@ -1148,6 +1194,14 @@ General_options::finalize() if (this->pie() && this->relocatable()) gold_fatal(_("-pie and -r are incompatible")); + if (!this->shared()) + { + if (this->filter() != NULL) + gold_fatal(_("-F/--filter may not used without -shared")); + if (this->any_auxiliary()) + gold_fatal(_("-f/--auxiliary may not be used without -shared")); + } + // TODO: implement support for -retain-symbols-file with -r, if needed. if (this->relocatable() && this->retain_symbols_file()) gold_fatal(_("-retain-symbols-file does not yet work with -r")); diff --git a/gold/options.h b/gold/options.h index 3949690..768df9c 100644 --- a/gold/options.h +++ b/gold/options.h @@ -1,6 +1,6 @@ // options.h -- handle command line options for gold -*- C++ -*- -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -63,6 +63,11 @@ class Script_info; enum Incremental_disposition { + // Startup files that appear before the first disposition option. + // These will default to INCREMENTAL_CHECK unless the + // --incremental-startup-unchanged option is given. + // (For files added implicitly by gcc before any user options.) + INCREMENTAL_STARTUP, // Determine the status from the timestamp (default). INCREMENTAL_CHECK, // Assume the file changed from the previous build. @@ -98,6 +103,9 @@ extern void parse_double(const char* option_name, const char* arg, double* retval); extern void +parse_percent(const char* option_name, const char* arg, double* retval); + +extern void parse_string(const char* option_name, const char* arg, const char** retval); extern void @@ -372,6 +380,12 @@ struct Struct_special : public Struct_var #default_value__, helpstring__, helparg__, false, \ double, double, options::parse_double) +#define DEFINE_percent(varname__, dashes__, shortname__, default_value__, \ + helpstring__, helparg__) \ + DEFINE_var(varname__, dashes__, shortname__, default_value__ / 100.0, \ + #default_value__, helpstring__, helparg__, false, \ + double, double, options::parse_percent) + #define DEFINE_string(varname__, dashes__, shortname__, default_value__, \ helpstring__, helparg__) \ DEFINE_var(varname__, dashes__, shortname__, default_value__, \ @@ -629,6 +643,9 @@ class General_options DEFINE_bool_alias(dn, Bdynamic, options::ONE_DASH, '\0', N_("alias for -Bstatic"), NULL, true); + DEFINE_bool(Bgroup, options::ONE_DASH, '\0', false, + N_("Use group name lookup rules for shared library"), NULL); + DEFINE_bool(Bsymbolic, options::ONE_DASH, '\0', false, N_("Bind defined symbols locally"), NULL); @@ -663,6 +680,10 @@ class General_options N_("Output cross reference table"), N_("Do not output cross reference table")); + DEFINE_bool(ctors_in_init_array, options::TWO_DASHES, '\0', true, + N_("Use DT_INIT_ARRAY for all constructors (default)"), + N_("Handle constructors as directed by compiler")); + DEFINE_bool(define_common, options::TWO_DASHES, 'd', false, N_("Define common symbols"), N_("Do not define common symbols")); @@ -721,16 +742,24 @@ class General_options DEFINE_special(EB, options::ONE_DASH, '\0', N_("Link big-endian objects."), NULL); - DEFINE_bool(eh_frame_hdr, options::TWO_DASHES, '\0', false, - N_("Create exception frame header"), NULL); - DEFINE_special(EL, options::ONE_DASH, '\0', N_("Link little-endian objects."), NULL); + DEFINE_bool(eh_frame_hdr, options::TWO_DASHES, '\0', false, + N_("Create exception frame header"), NULL); + DEFINE_bool(enum_size_warning, options::TWO_DASHES, '\0', true, NULL, N_("(ARM only) Do not warn about objects with incompatible " "enum sizes")); + DEFINE_set(auxiliary, options::TWO_DASHES, 'f', + N_("Auxiliary filter for shared object symbol table"), + N_("SHLIB")); + + DEFINE_string(filter, options::TWO_DASHES, 'F', NULL, + N_("Filter for shared object symbol table"), + N_("SHLIB")); + DEFINE_bool(fatal_warnings, options::TWO_DASHES, '\0', false, N_("Treat warnings as errors"), N_("Do not treat warnings as errors")); @@ -742,6 +771,10 @@ class General_options N_("(ARM only) Fix binaries for Cortex-A8 erratum."), N_("(ARM only) Do not fix binaries for Cortex-A8 erratum.")); + DEFINE_bool(fix_arm1176, options::TWO_DASHES, '\0', true, + N_("(ARM only) Fix binaries for ARM1176 erratum."), + N_("(ARM only) Do not fix binaries for ARM1176 erratum.")); + DEFINE_bool(merge_exidx_entries, options::TWO_DASHES, '\0', true, N_("(ARM only) Merge exidx entries in debuginfo."), N_("(ARM only) Do not merge exidx entries in debuginfo.")); @@ -761,9 +794,6 @@ class General_options DEFINE_string(soname, options::ONE_DASH, 'h', NULL, N_("Set shared library name"), N_("FILENAME")); - DEFINE_bool(i, options::EXACTLY_ONE_DASH, '\0', false, - N_("Ignored"), NULL); - DEFINE_double(hash_bucket_empty_fraction, options::TWO_DASHES, '\0', 0.0, N_("Min fraction of empty buckets in dynamic hash"), N_("FRACTION")); @@ -790,6 +820,11 @@ class General_options DEFINE_special(incremental_update, options::TWO_DASHES, '\0', N_("Do an incremental link; exit if not possible"), NULL); + DEFINE_string(incremental_base, options::TWO_DASHES, '\0', NULL, + N_("Set base file for incremental linking" + " (default is output file)"), + N_("FILE")); + DEFINE_special(incremental_changed, options::TWO_DASHES, '\0', N_("Assume files changed"), NULL); @@ -799,6 +834,14 @@ class General_options DEFINE_special(incremental_unknown, options::TWO_DASHES, '\0', N_("Use timestamps to check files (default)"), NULL); + DEFINE_special(incremental_startup_unchanged, options::TWO_DASHES, '\0', + N_("Assume startup files unchanged " + "(files preceding this option)"), NULL); + + DEFINE_percent(incremental_patch, options::TWO_DASHES, '\0', 10, + N_("Amount of extra space to allocate for patches"), + N_("PERCENT")); + DEFINE_string(init, options::ONE_DASH, '\0', "_init", N_("Call SYMBOL at load-time"), N_("SYMBOL")); @@ -814,6 +857,10 @@ class General_options N_("Keep files mapped across passes (default)"), N_("Release mapped files after each pass")); + DEFINE_bool(ld_generated_unwind_info, options::TWO_DASHES, '\0', true, + N_("Generate unwind information for PLT (default)"), + N_("Do not generate unwind information for PLT")); + DEFINE_special(library, options::TWO_DASHES, 'l', N_("Search for library LIBNAME"), N_("LIBNAME")); @@ -829,7 +876,7 @@ class General_options NULL); DEFINE_string(m, options::EXACTLY_ONE_DASH, 'm', "", - N_("Ignored for compatibility"), N_("EMULATION")); + N_("Set GNU linker emulation; obsolete"), N_("EMULATION")); DEFINE_bool(print_map, options::TWO_DASHES, 'M', false, N_("Write map file on standard output"), NULL); @@ -884,6 +931,9 @@ class General_options DEFINE_bool(preread_archive_symbols, options::TWO_DASHES, '\0', false, N_("Preread archive symbols when multi-threaded"), NULL); + DEFINE_bool(print_output_format, options::TWO_DASHES, '\0', false, + N_("Print default output format"), NULL); + DEFINE_string(print_symbol_counts, options::TWO_DASHES, '\0', NULL, N_("Print symbols defined and used for each input"), N_("FILENAME")); @@ -896,6 +946,8 @@ class General_options DEFINE_bool(relocatable, options::EXACTLY_ONE_DASH, 'r', false, N_("Generate relocatable output"), NULL); + DEFINE_bool_alias(i, relocatable, options::EXACTLY_ONE_DASH, '\0', + N_("Synonym for -r"), NULL, false); DEFINE_bool(relax, options::TWO_DASHES, '\0', false, N_("Relax branches on certain targets"), NULL); @@ -1027,6 +1079,13 @@ class General_options DEFINE_set(undefined, options::TWO_DASHES, 'u', N_("Create undefined reference to SYMBOL"), N_("SYMBOL")); + DEFINE_enum(unresolved_symbols, options::TWO_DASHES, '\0', NULL, + N_("How to handle unresolved symbols"), + ("ignore-all,report-all,ignore-in-object-files," + "ignore-in-shared-libs"), + {"ignore-all", "report-all", "ignore-in-object-files", + "ignore-in-shared-libs"}); + DEFINE_bool(verbose, options::TWO_DASHES, '\0', false, N_("Synonym for --debug=files"), NULL); @@ -1158,7 +1217,7 @@ class General_options N_("Don't mark variables read-only after relocation")); DEFINE_bool(text, options::DASH_Z, '\0', false, N_("Do not permit relocations in read-only segments"), - NULL); + N_("Permit relocations in read-only segments (default)")); DEFINE_bool_alias(textoff, text, options::DASH_Z, '\0', N_("Permit relocations in read-only segments (default)"), NULL, true); @@ -1309,6 +1368,12 @@ class General_options incremental_disposition() const { return this->incremental_disposition_; } + // The disposition to use for startup files (those that precede the + // first --incremental-changed, etc. option). + Incremental_disposition + incremental_startup_disposition() const + { return this->incremental_startup_disposition_; } + // Return true if S is the name of a library excluded from automatic // symbol export. bool @@ -1426,9 +1491,12 @@ class General_options // --incremental-unchanged or --incremental-unknown option. The // value may change as we proceed parsing the command line flags. Incremental_disposition incremental_disposition_; + // The disposition to use for startup files (those marked + // INCREMENTAL_STARTUP). + Incremental_disposition incremental_startup_disposition_; // Whether we have seen one of the options that require incremental - // build (--incremental-changed, --incremental-unchanged or - // --incremental-unknown) + // build (--incremental-changed, --incremental-unchanged, + // --incremental-unknown, or --incremental-startup-unchanged). bool implicit_incremental_; // Libraries excluded from automatic export, via --exclude-libs. Unordered_set excluded_libs_; diff --git a/gold/output.cc b/gold/output.cc index 26f843c..29d8e3d 100644 --- a/gold/output.cc +++ b/gold/output.cc @@ -36,12 +36,14 @@ #include "libiberty.h" +#include "dwarf.h" #include "parameters.h" #include "object.h" #include "symtab.h" #include "reloc.h" #include "merge.h" #include "descriptors.h" +#include "layout.h" #include "output.h" // For systems without mmap support. @@ -121,6 +123,11 @@ posix_fallocate(int o, off_t offset, off_t len) } #endif // !defined(HAVE_POSIX_FALLOCATE) +// Mingw does not have S_ISLNK. +#ifndef S_ISLNK +# define S_ISLNK(mode) 0 +#endif + namespace gold { @@ -420,14 +427,12 @@ Output_segment_headers::do_size() const Output_file_header::Output_file_header(const Target* target, const Symbol_table* symtab, - const Output_segment_headers* osh, - const char* entry) + const Output_segment_headers* osh) : target_(target), symtab_(symtab), segment_header_(osh), section_header_(NULL), - shstrtab_(NULL), - entry_(entry) + shstrtab_(NULL) { this->set_data_size(this->do_size()); } @@ -476,7 +481,7 @@ Output_file_header::do_write(Output_file* of) } } -// Write out the file header with appropriate size and endianess. +// Write out the file header with appropriate size and endianness. template void @@ -567,22 +572,16 @@ Output_file_header::do_sized_write(Output_file* of) of->write_output_view(0, ehdr_size, view); } -// Return the value to use for the entry address. THIS->ENTRY_ is the -// symbol specified on the command line, if any. +// Return the value to use for the entry address. template typename elfcpp::Elf_types::Elf_Addr Output_file_header::entry() { - const bool should_issue_warning = (this->entry_ != NULL + const bool should_issue_warning = (parameters->options().entry() != NULL && !parameters->options().relocatable() && !parameters->options().shared()); - - // FIXME: Need to support target specific entry symbol. - const char* entry = this->entry_; - if (entry == NULL) - entry = "_start"; - + const char* entry = parameters->entry(); Symbol* sym = this->symtab_->lookup(entry); typename Sized_symbol::Value_type v; @@ -936,10 +935,13 @@ set_needs_dynsym_index() default: { const unsigned int lsi = this->local_sym_index_; + Sized_relobj_file* relobj = + this->u1_.relobj->sized_relobj(); + gold_assert(relobj != NULL); if (!this->is_section_symbol_) - this->u1_.relobj->set_needs_output_dynsym_entry(lsi); + relobj->set_needs_output_dynsym_entry(lsi); else - this->u1_.relobj->output_section(lsi)->set_needs_dynsym_index(); + relobj->output_section(lsi)->set_needs_dynsym_index(); } break; } @@ -989,16 +991,19 @@ Output_reloc::get_symbol_index() default: { const unsigned int lsi = this->local_sym_index_; + Sized_relobj_file* relobj = + this->u1_.relobj->sized_relobj(); + gold_assert(relobj != NULL); if (!this->is_section_symbol_) { if (dynamic) - index = this->u1_.relobj->dynsym_index(lsi); + index = relobj->dynsym_index(lsi); else - index = this->u1_.relobj->symtab_index(lsi); + index = relobj->symtab_index(lsi); } else { - Output_section* os = this->u1_.relobj->output_section(lsi); + Output_section* os = relobj->output_section(lsi); gold_assert(os != NULL); if (dynamic) index = os->dynsym_index(); @@ -1033,7 +1038,10 @@ Output_reloc:: if (offset != invalid_address) return offset + addend; // This is a merge section. - offset = os->output_address(this->u1_.relobj, lsi, addend); + Sized_relobj_file* relobj = + this->u1_.relobj->sized_relobj(); + gold_assert(relobj != NULL); + offset = os->output_address(relobj, lsi, addend); gold_assert(offset != invalid_address); return offset; } @@ -1054,8 +1062,10 @@ Output_reloc::get_address() const address += os->address() + off; else { - address = os->output_address(this->u2_.relobj, this->shndx_, - address); + Sized_relobj_file* relobj = + this->u2_.relobj->sized_relobj(); + gold_assert(relobj != NULL); + address = os->output_address(relobj, this->shndx_, address); gold_assert(address != invalid_address); } } @@ -1108,8 +1118,11 @@ Output_reloc::symbol_value( && this->local_sym_index_ != 0 && !this->is_section_symbol_); const unsigned int lsi = this->local_sym_index_; - const Symbol_value* symval = this->u1_.relobj->local_symbol(lsi); - return symval->value(this->u1_.relobj, addend); + Sized_relobj_file* relobj = + this->u1_.relobj->sized_relobj(); + gold_assert(relobj != NULL); + const Symbol_value* symval = relobj->local_symbol(lsi); + return symval->value(relobj, addend); } // Reloc comparison. This function sorts the dynamic relocs for the @@ -1260,7 +1273,7 @@ Output_relocatable_relocs::set_final_data_size() template Output_data_group::Output_data_group( - Sized_relobj* relobj, + Sized_relobj_file* relobj, section_size_type entry_count, elfcpp::Elf_Word flags, std::vector* input_shndxes) @@ -1335,7 +1348,7 @@ Output_data_got::Got_entry::write(unsigned char* pov) const // RELATIVE relocation. Symbol* gsym = this->u_.gsym; if (this->use_plt_offset_ && gsym->has_plt_offset()) - val = (parameters->target().plt_section_for_global(gsym)->address() + val = (parameters->target().plt_address_for_global(gsym) + gsym->plt_offset()); else { @@ -1353,18 +1366,25 @@ Output_data_got::Got_entry::write(unsigned char* pov) const val = this->u_.constant; break; + case RESERVED_CODE: + // If we're doing an incremental update, don't touch this GOT entry. + if (parameters->incremental_update()) + return; + val = this->u_.constant; + break; + default: { - const Sized_relobj* object = this->u_.object; + const Sized_relobj_file* object = this->u_.object; const unsigned int lsi = this->local_sym_index_; const Symbol_value* symval = object->local_symbol(lsi); if (!this->use_plt_offset_) val = symval->value(this->u_.object, 0); else { - const Output_data* plt = - parameters->target().plt_section_for_local(object, lsi); - val = plt->address() + object->local_plt_offset(lsi); + uint64_t plt_address = + parameters->target().plt_address_for_local(object, lsi); + val = plt_address + object->local_plt_offset(lsi); } } break; @@ -1388,9 +1408,8 @@ Output_data_got::add_global( if (gsym->has_got_offset(got_type)) return false; - this->entries_.push_back(Got_entry(gsym, false)); - this->set_got_size(); - gsym->set_got_offset(got_type, this->last_got_offset()); + unsigned int got_offset = this->add_got_entry(Got_entry(gsym, false)); + gsym->set_got_offset(got_type, got_offset); return true; } @@ -1404,9 +1423,8 @@ Output_data_got::add_global_plt(Symbol* gsym, if (gsym->has_got_offset(got_type)) return false; - this->entries_.push_back(Got_entry(gsym, true)); - this->set_got_size(); - gsym->set_got_offset(got_type, this->last_got_offset()); + unsigned int got_offset = this->add_got_entry(Got_entry(gsym, true)); + gsym->set_got_offset(got_type, got_offset); return true; } @@ -1424,9 +1442,7 @@ Output_data_got::add_global_with_rel( if (gsym->has_got_offset(got_type)) return; - this->entries_.push_back(Got_entry()); - this->set_got_size(); - unsigned int got_offset = this->last_got_offset(); + unsigned int got_offset = this->add_got_entry(Got_entry()); gsym->set_got_offset(got_type, got_offset); rel_dyn->add_global(gsym, r_type, this, got_offset); } @@ -1442,9 +1458,7 @@ Output_data_got::add_global_with_rela( if (gsym->has_got_offset(got_type)) return; - this->entries_.push_back(Got_entry()); - this->set_got_size(); - unsigned int got_offset = this->last_got_offset(); + unsigned int got_offset = this->add_got_entry(Got_entry()); gsym->set_got_offset(got_type, got_offset); rela_dyn->add_global(gsym, r_type, this, got_offset, 0); } @@ -1464,19 +1478,12 @@ Output_data_got::add_global_pair_with_rel( if (gsym->has_got_offset(got_type)) return; - this->entries_.push_back(Got_entry()); - unsigned int got_offset = this->last_got_offset(); + unsigned int got_offset = this->add_got_entry_pair(Got_entry(), Got_entry()); gsym->set_got_offset(got_type, got_offset); rel_dyn->add_global(gsym, r_type_1, this, got_offset); - this->entries_.push_back(Got_entry()); if (r_type_2 != 0) - { - got_offset = this->last_got_offset(); - rel_dyn->add_global(gsym, r_type_2, this, got_offset); - } - - this->set_got_size(); + rel_dyn->add_global(gsym, r_type_2, this, got_offset + size / 8); } template @@ -1491,19 +1498,12 @@ Output_data_got::add_global_pair_with_rela( if (gsym->has_got_offset(got_type)) return; - this->entries_.push_back(Got_entry()); - unsigned int got_offset = this->last_got_offset(); + unsigned int got_offset = this->add_got_entry_pair(Got_entry(), Got_entry()); gsym->set_got_offset(got_type, got_offset); rela_dyn->add_global(gsym, r_type_1, this, got_offset, 0); - this->entries_.push_back(Got_entry()); if (r_type_2 != 0) - { - got_offset = this->last_got_offset(); - rela_dyn->add_global(gsym, r_type_2, this, got_offset, 0); - } - - this->set_got_size(); + rela_dyn->add_global(gsym, r_type_2, this, got_offset + size / 8, 0); } // Add an entry for a local symbol to the GOT. This returns true if @@ -1513,16 +1513,16 @@ Output_data_got::add_global_pair_with_rela( template bool Output_data_got::add_local( - Sized_relobj* object, + Sized_relobj_file* object, unsigned int symndx, unsigned int got_type) { if (object->local_has_got_offset(symndx, got_type)) return false; - this->entries_.push_back(Got_entry(object, symndx, false)); - this->set_got_size(); - object->set_local_got_offset(symndx, got_type, this->last_got_offset()); + unsigned int got_offset = this->add_got_entry(Got_entry(object, symndx, + false)); + object->set_local_got_offset(symndx, got_type, got_offset); return true; } @@ -1531,16 +1531,16 @@ Output_data_got::add_local( template bool Output_data_got::add_local_plt( - Sized_relobj* object, + Sized_relobj_file* object, unsigned int symndx, unsigned int got_type) { if (object->local_has_got_offset(symndx, got_type)) return false; - this->entries_.push_back(Got_entry(object, symndx, true)); - this->set_got_size(); - object->set_local_got_offset(symndx, got_type, this->last_got_offset()); + unsigned int got_offset = this->add_got_entry(Got_entry(object, symndx, + true)); + object->set_local_got_offset(symndx, got_type, got_offset); return true; } @@ -1550,7 +1550,7 @@ Output_data_got::add_local_plt( template void Output_data_got::add_local_with_rel( - Sized_relobj* object, + Sized_relobj_file* object, unsigned int symndx, unsigned int got_type, Rel_dyn* rel_dyn, @@ -1559,9 +1559,7 @@ Output_data_got::add_local_with_rel( if (object->local_has_got_offset(symndx, got_type)) return; - this->entries_.push_back(Got_entry()); - this->set_got_size(); - unsigned int got_offset = this->last_got_offset(); + unsigned int got_offset = this->add_got_entry(Got_entry()); object->set_local_got_offset(symndx, got_type, got_offset); rel_dyn->add_local(object, symndx, r_type, this, got_offset); } @@ -1569,7 +1567,7 @@ Output_data_got::add_local_with_rel( template void Output_data_got::add_local_with_rela( - Sized_relobj* object, + Sized_relobj_file* object, unsigned int symndx, unsigned int got_type, Rela_dyn* rela_dyn, @@ -1578,9 +1576,7 @@ Output_data_got::add_local_with_rela( if (object->local_has_got_offset(symndx, got_type)) return; - this->entries_.push_back(Got_entry()); - this->set_got_size(); - unsigned int got_offset = this->last_got_offset(); + unsigned int got_offset = this->add_got_entry(Got_entry()); object->set_local_got_offset(symndx, got_type, got_offset); rela_dyn->add_local(object, symndx, r_type, this, got_offset, 0); } @@ -1591,7 +1587,7 @@ Output_data_got::add_local_with_rela( template void Output_data_got::add_local_pair_with_rel( - Sized_relobj* object, + Sized_relobj_file* object, unsigned int symndx, unsigned int shndx, unsigned int got_type, @@ -1602,26 +1598,21 @@ Output_data_got::add_local_pair_with_rel( if (object->local_has_got_offset(symndx, got_type)) return; - this->entries_.push_back(Got_entry()); - unsigned int got_offset = this->last_got_offset(); + unsigned int got_offset = + this->add_got_entry_pair(Got_entry(), + Got_entry(object, symndx, false)); object->set_local_got_offset(symndx, got_type, got_offset); Output_section* os = object->output_section(shndx); rel_dyn->add_output_section(os, r_type_1, this, got_offset); - this->entries_.push_back(Got_entry(object, symndx, false)); if (r_type_2 != 0) - { - got_offset = this->last_got_offset(); - rel_dyn->add_output_section(os, r_type_2, this, got_offset); - } - - this->set_got_size(); + rel_dyn->add_output_section(os, r_type_2, this, got_offset + size / 8); } template void Output_data_got::add_local_pair_with_rela( - Sized_relobj* object, + Sized_relobj_file* object, unsigned int symndx, unsigned int shndx, unsigned int got_type, @@ -1632,20 +1623,42 @@ Output_data_got::add_local_pair_with_rela( if (object->local_has_got_offset(symndx, got_type)) return; - this->entries_.push_back(Got_entry()); - unsigned int got_offset = this->last_got_offset(); + unsigned int got_offset = + this->add_got_entry_pair(Got_entry(), + Got_entry(object, symndx, false)); object->set_local_got_offset(symndx, got_type, got_offset); Output_section* os = object->output_section(shndx); rela_dyn->add_output_section(os, r_type_1, this, got_offset, 0); - this->entries_.push_back(Got_entry(object, symndx, false)); if (r_type_2 != 0) - { - got_offset = this->last_got_offset(); - rela_dyn->add_output_section(os, r_type_2, this, got_offset, 0); - } + rela_dyn->add_output_section(os, r_type_2, this, got_offset + size / 8, 0); +} + +// Reserve a slot in the GOT for a local symbol or the second slot of a pair. - this->set_got_size(); +template +void +Output_data_got::reserve_local( + unsigned int i, + Sized_relobj* object, + unsigned int sym_index, + unsigned int got_type) +{ + this->reserve_slot(i); + object->set_local_got_offset(sym_index, got_type, this->got_offset(i)); +} + +// Reserve a slot in the GOT for a global symbol. + +template +void +Output_data_got::reserve_global( + unsigned int i, + Symbol* gsym, + unsigned int got_type) +{ + this->reserve_slot(i); + gsym->set_got_offset(got_type, this->got_offset(i)); } // Write out the GOT. @@ -1677,6 +1690,63 @@ Output_data_got::do_write(Output_file* of) this->entries_.clear(); } +// Create a new GOT entry and return its offset. + +template +unsigned int +Output_data_got::add_got_entry(Got_entry got_entry) +{ + if (!this->is_data_size_valid()) + { + this->entries_.push_back(got_entry); + this->set_got_size(); + return this->last_got_offset(); + } + else + { + // For an incremental update, find an available slot. + off_t got_offset = this->free_list_.allocate(size / 8, size / 8, 0); + if (got_offset == -1) + gold_fallback(_("out of patch space (GOT);" + " relink with --incremental-full")); + unsigned int got_index = got_offset / (size / 8); + gold_assert(got_index < this->entries_.size()); + this->entries_[got_index] = got_entry; + return static_cast(got_offset); + } +} + +// Create a pair of new GOT entries and return the offset of the first. + +template +unsigned int +Output_data_got::add_got_entry_pair(Got_entry got_entry_1, + Got_entry got_entry_2) +{ + if (!this->is_data_size_valid()) + { + unsigned int got_offset; + this->entries_.push_back(got_entry_1); + got_offset = this->last_got_offset(); + this->entries_.push_back(got_entry_2); + this->set_got_size(); + return got_offset; + } + else + { + // For an incremental update, find an available pair of slots. + off_t got_offset = this->free_list_.allocate(2 * size / 8, size / 8, 0); + if (got_offset == -1) + gold_fallback(_("out of patch space (GOT);" + " relink with --incremental-full")); + unsigned int got_index = got_offset / (size / 8); + gold_assert(got_index < this->entries_.size()); + this->entries_[got_index] = got_entry_1; + this->entries_[got_index + 1] = got_entry_2; + return static_cast(got_offset); + } +} + // Output_data_dynamic::Dynamic_entry methods. // Write out the entry. @@ -1857,6 +1927,142 @@ Output_symtab_xindex::endian_do_write(unsigned char* const oview) } } +// Output_fill_debug_info methods. + +// Return the minimum size needed for a dummy compilation unit header. + +size_t +Output_fill_debug_info::do_minimum_hole_size() const +{ + // Compile unit header fields: unit_length, version, debug_abbrev_offset, + // address_size. + const size_t len = 4 + 2 + 4 + 1; + // For type units, add type_signature, type_offset. + if (this->is_debug_types_) + return len + 8 + 4; + return len; +} + +// Write a dummy compilation unit header to fill a hole in the +// .debug_info or .debug_types section. + +void +Output_fill_debug_info::do_write(Output_file* of, off_t off, size_t len) const +{ + gold_debug(DEBUG_INCREMENTAL, "fill_debug_info(%08lx, %08lx)", + static_cast(off), static_cast(len)); + + gold_assert(len >= this->do_minimum_hole_size()); + + unsigned char* const oview = of->get_output_view(off, len); + unsigned char* pov = oview; + + // Write header fields: unit_length, version, debug_abbrev_offset, + // address_size. + if (this->is_big_endian()) + { + elfcpp::Swap_unaligned<32, true>::writeval(pov, len - 4); + elfcpp::Swap_unaligned<16, true>::writeval(pov + 4, this->version); + elfcpp::Swap_unaligned<32, true>::writeval(pov + 6, 0); + } + else + { + elfcpp::Swap_unaligned<32, false>::writeval(pov, len - 4); + elfcpp::Swap_unaligned<16, false>::writeval(pov + 4, this->version); + elfcpp::Swap_unaligned<32, false>::writeval(pov + 6, 0); + } + pov += 4 + 2 + 4; + *pov++ = 4; + + // For type units, the additional header fields -- type_signature, + // type_offset -- can be filled with zeroes. + + // Fill the remainder of the free space with zeroes. The first + // zero should tell the consumer there are no DIEs to read in this + // compilation unit. + if (pov < oview + len) + memset(pov, 0, oview + len - pov); + + of->write_output_view(off, len, oview); +} + +// Output_fill_debug_line methods. + +// Return the minimum size needed for a dummy line number program header. + +size_t +Output_fill_debug_line::do_minimum_hole_size() const +{ + // Line number program header fields: unit_length, version, header_length, + // minimum_instruction_length, default_is_stmt, line_base, line_range, + // opcode_base, standard_opcode_lengths[], include_directories, filenames. + const size_t len = 4 + 2 + 4 + this->header_length; + return len; +} + +// Write a dummy line number program header to fill a hole in the +// .debug_line section. + +void +Output_fill_debug_line::do_write(Output_file* of, off_t off, size_t len) const +{ + gold_debug(DEBUG_INCREMENTAL, "fill_debug_line(%08lx, %08lx)", + static_cast(off), static_cast(len)); + + gold_assert(len >= this->do_minimum_hole_size()); + + unsigned char* const oview = of->get_output_view(off, len); + unsigned char* pov = oview; + + // Write header fields: unit_length, version, header_length, + // minimum_instruction_length, default_is_stmt, line_base, line_range, + // opcode_base, standard_opcode_lengths[], include_directories, filenames. + // We set the header_length field to cover the entire hole, so the + // line number program is empty. + if (this->is_big_endian()) + { + elfcpp::Swap_unaligned<32, true>::writeval(pov, len - 4); + elfcpp::Swap_unaligned<16, true>::writeval(pov + 4, this->version); + elfcpp::Swap_unaligned<32, true>::writeval(pov + 6, len - (4 + 2 + 4)); + } + else + { + elfcpp::Swap_unaligned<32, false>::writeval(pov, len - 4); + elfcpp::Swap_unaligned<16, false>::writeval(pov + 4, this->version); + elfcpp::Swap_unaligned<32, false>::writeval(pov + 6, len - (4 + 2 + 4)); + } + pov += 4 + 2 + 4; + *pov++ = 1; // minimum_instruction_length + *pov++ = 0; // default_is_stmt + *pov++ = 0; // line_base + *pov++ = 5; // line_range + *pov++ = 13; // opcode_base + *pov++ = 0; // standard_opcode_lengths[1] + *pov++ = 1; // standard_opcode_lengths[2] + *pov++ = 1; // standard_opcode_lengths[3] + *pov++ = 1; // standard_opcode_lengths[4] + *pov++ = 1; // standard_opcode_lengths[5] + *pov++ = 0; // standard_opcode_lengths[6] + *pov++ = 0; // standard_opcode_lengths[7] + *pov++ = 0; // standard_opcode_lengths[8] + *pov++ = 1; // standard_opcode_lengths[9] + *pov++ = 0; // standard_opcode_lengths[10] + *pov++ = 0; // standard_opcode_lengths[11] + *pov++ = 1; // standard_opcode_lengths[12] + *pov++ = 0; // include_directories (empty) + *pov++ = 0; // filenames (empty) + + // Some consumers don't check the header_length field, and simply + // start reading the line number program immediately following the + // header. For those consumers, we fill the remainder of the free + // space with DW_LNS_set_basic_block opcodes. These are effectively + // no-ops: the resulting line table program will not create any rows. + if (pov < oview + len) + memset(pov, elfcpp::DW_LNS_set_basic_block, oview + len - pov); + + of->write_output_view(off, len, oview); +} + // Output_section::Input_section methods. // Return the current data size. For an input section we store the size here. @@ -2084,10 +2290,13 @@ Output_section::Output_section(const char* name, elfcpp::Elf_Word type, is_noload_(false), always_keeps_input_sections_(false), has_fixed_layout_(false), + is_patch_space_allowed_(false), tls_offset_(0), checkpoint_(NULL), lookup_maps_(new Output_section_lookup_maps), - free_list_() + free_list_(), + free_space_fill_(NULL), + patch_space_(0) { // An unallocated section has no address. Forcing this means that // we don't need special treatment for symbols defined in debug @@ -2132,7 +2341,7 @@ Output_section::set_entsize(uint64_t v) template off_t Output_section::add_input_section(Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int shndx, const char* secname, const elfcpp::Shdr& shdr, @@ -2202,7 +2411,9 @@ Output_section::add_input_section(Layout* layout, offset_in_section = this->free_list_.allocate(input_section_size, addralign, 0); if (offset_in_section == -1) - gold_fatal(_("out of patch space; relink with --incremental-full")); + gold_fallback(_("out of patch space in section %s; " + "relink with --incremental-full"), + this->name()); aligned_offset_in_section = offset_in_section; } else @@ -2223,7 +2434,7 @@ Output_section::add_input_section(Layout* layout, && (sh_flags & elfcpp::SHF_EXECINSTR) != 0 && parameters->target().has_code_fill() && (parameters->target().may_relax() - || parameters->options().section_ordering_file())) + || layout->is_section_ordering_specified())) { gold_assert(this->fills_.empty()); this->generate_code_fills_at_write_ = true; @@ -2262,10 +2473,10 @@ Output_section::add_input_section(Layout* layout, || this->must_sort_attached_input_sections() || parameters->options().user_set_Map() || parameters->target().may_relax() - || parameters->options().section_ordering_file()) + || layout->is_section_ordering_specified()) { Input_section isecn(object, shndx, input_section_size, addralign); - if (parameters->options().section_ordering_file()) + if (layout->is_section_ordering_specified()) { unsigned int section_order_index = layout->find_section_order_index(std::string(secname)); @@ -2306,7 +2517,9 @@ Output_section::add_output_section_data(Output_section_data* posd) offset_in_section = this->free_list_.allocate(posd->data_size(), posd->addralign(), 0); if (offset_in_section == -1) - gold_fatal(_("out of patch space; relink with --incremental-full")); + gold_fallback(_("out of patch space in section %s; " + "relink with --incremental-full"), + this->name()); // Finalize the address and offset now. uint64_t addr = this->address(); off_t offset = this->offset(); @@ -2330,7 +2543,8 @@ Output_section::add_output_section_data(Output_section_data* posd) uint64_t addr = this->address(); posd->set_address(addr); posd->set_file_offset(0); - // FIXME: Mark *POSD as part of a fixed-layout section. + // FIXME: This should eventually be unreachable. + // gold_unreachable(); } } @@ -2345,7 +2559,7 @@ Output_section::add_relaxed_input_section(Layout* layout, // If the --section-ordering-file option is used to specify the order of // sections, we need to keep track of sections. - if (parameters->options().section_ordering_file()) + if (layout->is_section_ordering_specified()) { unsigned int section_order_index = layout->find_section_order_index(name); @@ -2875,30 +3089,51 @@ Output_section::update_data_size() void Output_section::set_final_data_size() { + off_t data_size; + if (this->input_sections_.empty()) + data_size = this->current_data_size_for_child(); + else { - this->set_data_size(this->current_data_size_for_child()); - return; - } + if (this->must_sort_attached_input_sections() + || this->input_section_order_specified()) + this->sort_attached_input_sections(); - if (this->must_sort_attached_input_sections() - || this->input_section_order_specified()) - this->sort_attached_input_sections(); + uint64_t address = this->address(); + off_t startoff = this->offset(); + off_t off = startoff + this->first_input_offset_; + for (Input_section_list::iterator p = this->input_sections_.begin(); + p != this->input_sections_.end(); + ++p) + { + off = align_address(off, p->addralign()); + p->set_address_and_file_offset(address + (off - startoff), off, + startoff); + off += p->data_size(); + } + data_size = off - startoff; + } - uint64_t address = this->address(); - off_t startoff = this->offset(); - off_t off = startoff + this->first_input_offset_; - for (Input_section_list::iterator p = this->input_sections_.begin(); - p != this->input_sections_.end(); - ++p) + // For full incremental links, we want to allocate some patch space + // in most sections for subsequent incremental updates. + if (this->is_patch_space_allowed_ && parameters->incremental_full()) { - off = align_address(off, p->addralign()); - p->set_address_and_file_offset(address + (off - startoff), off, - startoff); - off += p->data_size(); + double pct = parameters->options().incremental_patch(); + size_t extra = static_cast(data_size * pct); + if (this->free_space_fill_ != NULL + && this->free_space_fill_->minimum_hole_size() > extra) + extra = this->free_space_fill_->minimum_hole_size(); + off_t new_size = align_address(data_size + extra, this->addralign()); + this->patch_space_ = new_size - data_size; + gold_debug(DEBUG_INCREMENTAL, + "set_final_data_size: %08lx + %08lx: section %s", + static_cast(data_size), + static_cast(this->patch_space_), + this->name()); + data_size = new_size; } - this->set_data_size(off - startoff); + this->set_data_size(data_size); } // Reset the address and file offset. @@ -2917,8 +3152,16 @@ Output_section::do_reset_address_and_file_offset() p != this->input_sections_.end(); ++p) p->reset_address_and_file_offset(); + + // Remove any patch space that was added in set_final_data_size. + if (this->patch_space_ > 0) + { + this->set_current_data_size_for_child(this->current_data_size_for_child() + - this->patch_space_); + this->patch_space_ = 0; + } } - + // Return true if address and file offset have the values after reset. bool @@ -2947,7 +3190,7 @@ Output_section::do_set_tls_offset(uint64_t tls_base) // priority ordering implemented by the GNU linker, in which the // priority becomes part of the section name and the sections are // sorted by name. We only do this for an output section if we see an -// attached input section matching ".ctor.*", ".dtor.*", +// attached input section matching ".ctors.*", ".dtors.*", // ".init_array.*" or ".fini_array.*". class Output_section::Input_section_sort_entry @@ -3022,6 +3265,34 @@ class Output_section::Input_section_sort_entry return this->section_name_.find('.', 1) != std::string::npos; } + // Return the priority. Believe it or not, gcc encodes the priority + // differently for .ctors/.dtors and .init_array/.fini_array + // sections. + unsigned int + get_priority() const + { + gold_assert(this->section_has_name_); + bool is_ctors; + if (is_prefix_of(".ctors.", this->section_name_.c_str()) + || is_prefix_of(".dtors.", this->section_name_.c_str())) + is_ctors = true; + else if (is_prefix_of(".init_array.", this->section_name_.c_str()) + || is_prefix_of(".fini_array.", this->section_name_.c_str())) + is_ctors = false; + else + return 0; + char* end; + unsigned long prio = strtoul((this->section_name_.c_str() + + (is_ctors ? 7 : 12)), + &end, 10); + if (*end != '\0') + return 0; + else if (is_ctors) + return 65535 - prio; + else + return prio; + } + // Return true if this an input file whose base name matches // FILE_NAME. The base name must have an extension of ".o", and // must be exactly FILE_NAME.o or FILE_NAME, one character, ".o". @@ -3030,18 +3301,8 @@ class Output_section::Input_section_sort_entry // file name this way is a dreadful hack, but the GNU linker does it // in order to better support gcc, and we need to be compatible. bool - match_file_name(const char* match_file_name) const - { - const std::string& file_name(this->input_section_.relobj()->name()); - const char* base_name = lbasename(file_name.c_str()); - size_t match_len = strlen(match_file_name); - if (strncmp(base_name, match_file_name, match_len) != 0) - return false; - size_t base_len = strlen(base_name); - if (base_len != match_len + 2 && base_len != match_len + 3) - return false; - return memcmp(base_name + base_len - 2, ".o", 2) == 0; - } + match_file_name(const char* file_name) const + { return Layout::match_file_name(this->input_section_.relobj(), file_name); } // Returns 1 if THIS should appear before S in section order, -1 if S // appears before THIS and 0 if they are not comparable. @@ -3163,6 +3424,28 @@ Output_section::Input_section_sort_init_fini_compare::operator()( if (!s1_has_priority && s2_has_priority) return false; + // .ctors and .dtors sections without priority come after + // .init_array and .fini_array sections without priority. + if (!s1_has_priority + && (s1.section_name() == ".ctors" || s1.section_name() == ".dtors") + && s1.section_name() != s2.section_name()) + return false; + if (!s2_has_priority + && (s2.section_name() == ".ctors" || s2.section_name() == ".dtors") + && s2.section_name() != s1.section_name()) + return true; + + // Sort by priority if we can. + if (s1_has_priority) + { + unsigned int s1_prio = s1.get_priority(); + unsigned int s2_prio = s2.get_priority(); + if (s1_prio < s2_prio) + return true; + else if (s1_prio > s2_prio) + return false; + } + // Check if a section order exists for these sections through a section // ordering file. If sequence_num is 0, an order does not exist. int sequence_num = s1.compare_section_ordering(s2); @@ -3197,6 +3480,38 @@ Output_section::Input_section_sort_section_order_index_compare::operator()( return s1_secn_index < s2_secn_index; } +// This updates the section order index of input sections according to the +// the order specified in the mapping from Section id to order index. + +void +Output_section::update_section_layout( + const Section_layout_order& order_map) +{ + for (Input_section_list::iterator p = this->input_sections_.begin(); + p != this->input_sections_.end(); + ++p) + { + if (p->is_input_section() + || p->is_relaxed_input_section()) + { + Object* obj = (p->is_input_section() + ? p->relobj() + : p->relaxed_input_section()->relobj()); + unsigned int shndx = p->shndx(); + Section_layout_order::const_iterator it + = order_map.find(Section_id(obj, shndx)); + if (it == order_map.end()) + continue; + unsigned int section_order_index = it->second; + if (section_order_index != 0) + { + p->set_section_order_index(section_order_index); + this->set_input_section_order_specified(); + } + } + } +} + // Sort the input sections attached to an output section. void @@ -3239,7 +3554,7 @@ Output_section::sort_attached_input_sections() } else { - gold_assert(parameters->options().section_ordering_file()); + gold_assert(this->input_section_order_specified()); std::sort(sort_list.begin(), sort_list.end(), Input_section_sort_section_order_index_compare()); } @@ -3279,7 +3594,7 @@ Output_section::write_header(const Layout* layout, if (this->link_section_ != NULL) oshdr->put_sh_link(this->link_section_->out_shndx()); else if (this->should_link_to_symtab_) - oshdr->put_sh_link(layout->symtab_section()->out_shndx()); + oshdr->put_sh_link(layout->symtab_section_shndx()); else if (this->should_link_to_dynsym_) oshdr->put_sh_link(layout->dynsym_section()->out_shndx()); else @@ -3341,6 +3656,26 @@ Output_section::do_write(Output_file* of) p->write(of); off = aligned_off + p->data_size(); } + + // For incremental links, fill in unused chunks in debug sections + // with dummy compilation unit headers. + if (this->free_space_fill_ != NULL) + { + for (Free_list::Const_iterator p = this->free_list_.begin(); + p != this->free_list_.end(); + ++p) + { + off_t off = p->start_; + size_t len = p->end_ - off; + this->free_space_fill_->write(of, this->offset() + off, len); + } + if (this->patch_space_ > 0) + { + off_t off = this->current_data_size_for_child() - this->patch_space_; + this->free_space_fill_->write(of, this->offset() + off, + this->patch_space_); + } + } } // If a section requires postprocessing, create the buffer to use. @@ -3657,12 +3992,22 @@ Output_section::set_fixed_layout(uint64_t sh_addr, off_t sh_offset, // Reserve space within the fixed layout for the section. Used for // incremental update links. + void Output_section::reserve(uint64_t sh_offset, uint64_t sh_size) { this->free_list_.remove(sh_offset, sh_offset + sh_size); } +// Allocate space from the free list for the section. Used for +// incremental update links. + +off_t +Output_section::allocate(off_t len, uint64_t addralign) +{ + return this->free_list_.allocate(len, addralign, 0); +} + // Output segment methods. Output_segment::Output_segment(elfcpp::Elf_Word type, elfcpp::Elf_Word flags) @@ -4077,10 +4422,7 @@ Output_segment::set_section_list_addresses(Layout* layout, bool reset, } } - // FIXME: Need to handle TLS and .bss with incremental update. - if (!parameters->incremental_update() - || (*p)->is_section_flag_set(elfcpp::SHF_TLS) - || (*p)->is_section_type(elfcpp::SHT_NOBITS)) + if (!parameters->incremental_update()) { off = align_address(off, align); (*p)->set_address_and_file_offset(addr + (off - startoff), off); @@ -4094,17 +4436,17 @@ Output_segment::set_section_list_addresses(Layout* layout, bool reset, if (off == -1) { gold_assert((*p)->output_section() != NULL); - gold_fatal(_("out of patch space for section %s; " - "relink with --incremental-full"), - (*p)->output_section()->name()); + gold_fallback(_("out of patch space for section %s; " + "relink with --incremental-full"), + (*p)->output_section()->name()); } (*p)->set_address_and_file_offset(addr + (off - startoff), off); if ((*p)->data_size() > current_size) { gold_assert((*p)->output_section() != NULL); - gold_fatal(_("%s: section changed size; " - "relink with --incremental-full"), - (*p)->output_section()->name()); + gold_fallback(_("%s: section changed size; " + "relink with --incremental-full"), + (*p)->output_section()->name()); } } } @@ -4147,14 +4489,15 @@ Output_segment::set_section_list_addresses(Layout* layout, bool reset, (*p)->finalize_data_size(); } - gold_debug(DEBUG_INCREMENTAL, - "set_section_list_addresses: %08lx %08lx %s", - static_cast(off), - static_cast((*p)->data_size()), - ((*p)->output_section() != NULL - ? (*p)->output_section()->name() : "(special)")); - - // We want to ignore the size of a SHF_TLS or SHT_NOBITS + if (parameters->incremental_update()) + gold_debug(DEBUG_INCREMENTAL, + "set_section_list_addresses: %08lx %08lx %s", + static_cast(off), + static_cast((*p)->data_size()), + ((*p)->output_section() != NULL + ? (*p)->output_section()->name() : "(special)")); + + // We want to ignore the size of a SHF_TLS SHT_NOBITS // section. Such a section does not affect the size of a // PT_LOAD segment. if (!(*p)->is_section_flag_set(elfcpp::SHF_TLS) @@ -4485,31 +4828,77 @@ Output_file::Output_file(const char* name) } // Try to open an existing file. Returns false if the file doesn't -// exist, has a size of 0 or can't be mmapped. +// exist, has a size of 0 or can't be mmapped. If BASE_NAME is not +// NULL, open that file as the base for incremental linking, and +// copy its contents to the new output file. This routine can +// be called for incremental updates, in which case WRITABLE should +// be true, or by the incremental-dump utility, in which case +// WRITABLE should be false. bool -Output_file::open_for_modification() +Output_file::open_base_file(const char* base_name, bool writable) { // The name "-" means "stdout". if (strcmp(this->name_, "-") == 0) return false; + bool use_base_file = base_name != NULL; + if (!use_base_file) + base_name = this->name_; + else if (strcmp(base_name, this->name_) == 0) + gold_fatal(_("%s: incremental base and output file name are the same"), + base_name); + // Don't bother opening files with a size of zero. struct stat s; - if (::stat(this->name_, &s) != 0 || s.st_size == 0) - return false; + if (::stat(base_name, &s) != 0) + { + gold_info(_("%s: stat: %s"), base_name, strerror(errno)); + return false; + } + if (s.st_size == 0) + { + gold_info(_("%s: incremental base file is empty"), base_name); + return false; + } - int o = open_descriptor(-1, this->name_, O_RDWR, 0); + // If we're using a base file, we want to open it read-only. + if (use_base_file) + writable = false; + + int oflags = writable ? O_RDWR : O_RDONLY; + int o = open_descriptor(-1, base_name, oflags, 0); if (o < 0) - gold_fatal(_("%s: open: %s"), this->name_, strerror(errno)); + { + gold_info(_("%s: open: %s"), base_name, strerror(errno)); + return false; + } + + // If the base file and the output file are different, open a + // new output file and read the contents from the base file into + // the newly-mapped region. + if (use_base_file) + { + this->open(s.st_size); + ssize_t len = ::read(o, this->base_, s.st_size); + if (len < 0) + { + gold_info(_("%s: read failed: %s"), base_name, strerror(errno)); + return false; + } + if (len < s.st_size) + { + gold_info(_("%s: file too short"), base_name); + return false; + } + ::close(o); + return true; + } + this->o_ = o; this->file_size_ = s.st_size; - // If the file can't be mmapped, copying the content to an anonymous - // map will probably negate the performance benefits of incremental - // linking. This could be helped by using views and loading only - // the necessary parts, but this is not supported as of now. - if (!this->map_no_anonymous()) + if (!this->map_no_anonymous(writable)) { release_descriptor(o, true); this->o_ = -1; @@ -4611,7 +5000,7 @@ Output_file::resize(off_t file_size) { this->unmap(); this->file_size_ = file_size; - if (!this->map_no_anonymous()) + if (!this->map_no_anonymous(true)) gold_fatal(_("%s: mmap: %s"), this->name_, strerror(errno)); } } @@ -4638,9 +5027,10 @@ Output_file::map_anonymous() } // Map the file into memory. Return whether the mapping succeeded. +// If WRITABLE is true, map with write access. bool -Output_file::map_no_anonymous() +Output_file::map_no_anonymous(bool writable) { const int o = this->o_; @@ -4662,12 +5052,14 @@ Output_file::map_no_anonymous() // output file will wind up incomplete, but we will have already // exited. The alternative to fallocate would be to use fdatasync, // but that would be a more significant performance hit. - if (::posix_fallocate(o, 0, this->file_size_) < 0) + if (writable && ::posix_fallocate(o, 0, this->file_size_) < 0) gold_fatal(_("%s: %s"), this->name_, strerror(errno)); // Map the file into memory. - base = ::mmap(NULL, this->file_size_, PROT_READ | PROT_WRITE, - MAP_SHARED, o, 0); + int prot = PROT_READ; + if (writable) + prot |= PROT_WRITE; + base = ::mmap(NULL, this->file_size_, prot, MAP_SHARED, o, 0); // The mmap call might fail because of file system issues: the file // system might not support mmap at all, or it might not support @@ -4685,7 +5077,7 @@ Output_file::map_no_anonymous() void Output_file::map() { - if (this->map_no_anonymous()) + if (this->map_no_anonymous(true)) return; // The mmap call might fail because of file system issues: the file @@ -4763,7 +5155,7 @@ template off_t Output_section::add_input_section<32, false>( Layout* layout, - Sized_relobj<32, false>* object, + Sized_relobj_file<32, false>* object, unsigned int shndx, const char* secname, const elfcpp::Shdr<32, false>& shdr, @@ -4776,7 +5168,7 @@ template off_t Output_section::add_input_section<32, true>( Layout* layout, - Sized_relobj<32, true>* object, + Sized_relobj_file<32, true>* object, unsigned int shndx, const char* secname, const elfcpp::Shdr<32, true>& shdr, @@ -4789,7 +5181,7 @@ template off_t Output_section::add_input_section<64, false>( Layout* layout, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int shndx, const char* secname, const elfcpp::Shdr<64, false>& shdr, @@ -4802,7 +5194,7 @@ template off_t Output_section::add_input_section<64, true>( Layout* layout, - Sized_relobj<64, true>* object, + Sized_relobj_file<64, true>* object, unsigned int shndx, const char* secname, const elfcpp::Shdr<64, true>& shdr, diff --git a/gold/output.h b/gold/output.h index f47c724..1bec2c0 100644 --- a/gold/output.h +++ b/gold/output.h @@ -46,6 +46,8 @@ template class Sized_target; template class Sized_relobj; +template +class Sized_relobj_file; // An abtract class for data which has to go into the output file. @@ -564,8 +566,7 @@ class Output_file_header : public Output_data public: Output_file_header(const Target*, const Symbol_table*, - const Output_segment_headers*, - const char* entry); + const Output_segment_headers*); // Add information about the section headers. We lay out the ELF // file header before we create the section headers. @@ -612,7 +613,6 @@ class Output_file_header : public Output_data const Output_segment_headers* segment_header_; const Output_section_headers* section_header_; const Output_section* shstrtab_; - const char* entry_; }; // Output sections are mainly comprised of input sections. However, @@ -764,6 +764,10 @@ class Output_section_data_build : public Output_section_data : Output_section_data(addralign) { } + Output_section_data_build(off_t data_size, uint64_t addralign) + : Output_section_data(data_size, addralign, false) + { } + // Set the current data size. void set_current_data_size(off_t data_size) @@ -890,6 +894,12 @@ class Output_data_space : public Output_section_data_build map_name_(map_name) { } + explicit Output_data_space(off_t data_size, uint64_t addralign, + const char* map_name) + : Output_section_data_build(data_size, addralign), + map_name_(map_name) + { } + // Set the alignment. void set_space_alignment(uint64_t align) @@ -1109,6 +1119,16 @@ class Output_reloc Address symbol_value(Addend addend) const; + // If this relocation is against an input section, return the + // relocatable object containing the input section. + Sized_relobj* + get_relobj() const + { + if (this->shndx_ == INVALID_CODE) + return NULL; + return this->u2_.relobj; + } + // Write the reloc entry to an output view. void write(unsigned char* pov) const; @@ -1315,6 +1335,12 @@ class Output_reloc is_symbolless() const { return this->rel_.is_symbolless(); } + // If this relocation is against an input section, return the + // relocatable object containing the input section. + Sized_relobj* + get_relobj() const + { return this->rel_.get_relobj(); } + // Write the reloc entry to an output view. void write(unsigned char* pov) const; @@ -1427,6 +1453,9 @@ class Output_data_reloc_base : public Output_data_reloc_generic od->add_dynamic_reloc(); if (reloc.is_relative()) this->bump_relative_reloc_count(); + Sized_relobj* relobj = reloc.get_relobj(); + if (relobj != NULL) + relobj->add_dyn_reloc(this->relocs_.size() - 1); } private: @@ -1809,9 +1838,9 @@ class Output_data_reloc void add_local_section(Sized_relobj* relobj, - unsigned int input_shndx, unsigned int type, - Output_data* od, unsigned int shndx, Address address, - Addend addend) + unsigned int input_shndx, unsigned int type, + Output_data* od, unsigned int shndx, Address address, + Addend addend) { this->add(od, Output_reloc_type(relobj, input_shndx, type, shndx, address, addend, false, false, true)); @@ -1900,7 +1929,7 @@ class Output_data_group : public Output_section_data { public: // The constructor clears *INPUT_SHNDXES. - Output_data_group(Sized_relobj* relobj, + Output_data_group(Sized_relobj_file* relobj, section_size_type entry_count, elfcpp::Elf_Word flags, std::vector* input_shndxes); @@ -1920,7 +1949,7 @@ class Output_data_group : public Output_section_data private: // The input object. - Sized_relobj* relobj_; + Sized_relobj_file* relobj_; // The group flag word. elfcpp::Elf_Word flags_; // The section indexes of the input sections in this group. @@ -1942,9 +1971,20 @@ class Output_data_got : public Output_section_data_build Output_data_got() : Output_section_data_build(Output_data::default_alignment_for_size(size)), - entries_() + entries_(), free_list_() { } + Output_data_got(off_t data_size) + : Output_section_data_build(data_size, + Output_data::default_alignment_for_size(size)), + entries_(), free_list_() + { + // For an incremental update, we have an existing GOT section. + // Initialize the list of entries and the free list. + this->entries_.resize(data_size / (size / 8)); + this->free_list_.init(data_size, false); + } + // Add an entry for a global symbol to the GOT. Return true if this // is a new GOT entry, false if the symbol was already in the GOT. bool @@ -1981,37 +2021,38 @@ class Output_data_got : public Output_section_data_build // this is a new GOT entry, false if the symbol already has a GOT // entry. bool - add_local(Sized_relobj* object, unsigned int sym_index, + add_local(Sized_relobj_file* object, unsigned int sym_index, unsigned int got_type); // Like add_local, but use the PLT offset of the local symbol if it // has one. bool - add_local_plt(Sized_relobj* object, unsigned int sym_index, + add_local_plt(Sized_relobj_file* object, + unsigned int sym_index, unsigned int got_type); // Add an entry for a local symbol to the GOT, and add a dynamic // relocation of type R_TYPE for the GOT entry. void - add_local_with_rel(Sized_relobj* object, + add_local_with_rel(Sized_relobj_file* object, unsigned int sym_index, unsigned int got_type, Rel_dyn* rel_dyn, unsigned int r_type); void - add_local_with_rela(Sized_relobj* object, + add_local_with_rela(Sized_relobj_file* object, unsigned int sym_index, unsigned int got_type, Rela_dyn* rela_dyn, unsigned int r_type); // Add a pair of entries for a local symbol to the GOT, and add // dynamic relocations of type R_TYPE_1 and R_TYPE_2, respectively. void - add_local_pair_with_rel(Sized_relobj* object, + add_local_pair_with_rel(Sized_relobj_file* object, unsigned int sym_index, unsigned int shndx, unsigned int got_type, Rel_dyn* rel_dyn, unsigned int r_type_1, unsigned int r_type_2); void - add_local_pair_with_rela(Sized_relobj* object, + add_local_pair_with_rela(Sized_relobj_file* object, unsigned int sym_index, unsigned int shndx, unsigned int got_type, Rela_dyn* rela_dyn, unsigned int r_type_1, unsigned int r_type_2); @@ -2021,11 +2062,24 @@ class Output_data_got : public Output_section_data_build unsigned int add_constant(Valtype constant) { - this->entries_.push_back(Got_entry(constant)); - this->set_got_size(); - return this->last_got_offset(); + unsigned int got_offset = this->add_got_entry(Got_entry(constant)); + return got_offset; } + // Reserve a slot in the GOT. + void + reserve_slot(unsigned int i) + { this->free_list_.remove(i * size / 8, (i + 1) * size / 8); } + + // Reserve a slot in the GOT for a local symbol. + void + reserve_local(unsigned int i, Sized_relobj* object, + unsigned int sym_index, unsigned int got_type); + + // Reserve a slot in the GOT for a global symbol. + void + reserve_global(unsigned int i, Symbol* gsym, unsigned int got_type); + protected: // Write out the GOT table. void @@ -2043,7 +2097,7 @@ class Output_data_got : public Output_section_data_build public: // Create a zero entry. Got_entry() - : local_sym_index_(CONSTANT_CODE), use_plt_offset_(false) + : local_sym_index_(RESERVED_CODE), use_plt_offset_(false) { this->u_.constant = 0; } // Create a global symbol entry. @@ -2052,12 +2106,13 @@ class Output_data_got : public Output_section_data_build { this->u_.gsym = gsym; } // Create a local symbol entry. - Got_entry(Sized_relobj* object, + Got_entry(Sized_relobj_file* object, unsigned int local_sym_index, bool use_plt_offset) : local_sym_index_(local_sym_index), use_plt_offset_(use_plt_offset) { gold_assert(local_sym_index != GSYM_CODE && local_sym_index != CONSTANT_CODE + && local_sym_index != RESERVED_CODE && local_sym_index == this->local_sym_index_); this->u_.object = object; } @@ -2076,13 +2131,14 @@ class Output_data_got : public Output_section_data_build enum { GSYM_CODE = 0x7fffffff, - CONSTANT_CODE = 0x7ffffffe + CONSTANT_CODE = 0x7ffffffe, + RESERVED_CODE = 0x7ffffffd }; union { // For a local symbol, the object. - Sized_relobj* object; + Sized_relobj_file* object; // For a global symbol, the symbol. Symbol* gsym; // For a constant, the constant. @@ -2097,6 +2153,14 @@ class Output_data_got : public Output_section_data_build typedef std::vector Got_entries; + // Create a new GOT entry and return its offset. + unsigned int + add_got_entry(Got_entry got_entry); + + // Create a pair of new GOT entries and return the offset of the first. + unsigned int + add_got_entry_pair(Got_entry got_entry_1, Got_entry got_entry_2); + // Return the offset into the GOT of GOT entry I. unsigned int got_offset(unsigned int i) const @@ -2114,6 +2178,10 @@ class Output_data_got : public Output_section_data_build // The list of GOT entries. Got_entries entries_; + + // List of available regions within the section, for incremental + // update links. + Free_list free_list_; }; // Output_data_dynamic is used to hold the data in SHT_DYNAMIC @@ -2547,6 +2615,99 @@ class Output_section_lookup_maps Relaxed_input_sections_by_id relaxed_input_sections_by_id_; }; +// This abstract base class defines the interface for the +// types of methods used to fill free space left in an output +// section during an incremental link. These methods are used +// to insert dummy compilation units into debug info so that +// debug info consumers can scan the debug info serially. + +class Output_fill +{ + public: + Output_fill() + : is_big_endian_(parameters->target().is_big_endian()) + { } + + // Return the smallest size chunk of free space that can be + // filled with a dummy compilation unit. + size_t + minimum_hole_size() const + { return this->do_minimum_hole_size(); } + + // Write a fill pattern of length LEN at offset OFF in the file. + void + write(Output_file* of, off_t off, size_t len) const + { this->do_write(of, off, len); } + + protected: + virtual size_t + do_minimum_hole_size() const = 0; + + virtual void + do_write(Output_file* of, off_t off, size_t len) const = 0; + + bool + is_big_endian() const + { return this->is_big_endian_; } + + private: + bool is_big_endian_; +}; + +// Fill method that introduces a dummy compilation unit in +// a .debug_info or .debug_types section. + +class Output_fill_debug_info : public Output_fill +{ + public: + Output_fill_debug_info(bool is_debug_types) + : is_debug_types_(is_debug_types) + { } + + protected: + virtual size_t + do_minimum_hole_size() const; + + virtual void + do_write(Output_file* of, off_t off, size_t len) const; + + private: + // Version of the header. + static const int version = 4; + // True if this is a .debug_types section. + bool is_debug_types_; +}; + +// Fill method that introduces a dummy compilation unit in +// a .debug_line section. + +class Output_fill_debug_line : public Output_fill +{ + public: + Output_fill_debug_line() + { } + + protected: + virtual size_t + do_minimum_hole_size() const; + + virtual void + do_write(Output_file* of, off_t off, size_t len) const; + + private: + // Version of the header. We write a DWARF-3 header because it's smaller + // and many tools have not yet been updated to understand the DWARF-4 header. + static const int version = 3; + // Length of the portion of the header that follows the header_length + // field. This includes the following fields: + // minimum_instruction_length, default_is_stmt, line_base, line_range, + // opcode_base, standard_opcode_lengths[], include_directories, filenames. + // The standard_opcode_lengths array is 12 bytes long, and the + // include_directories and filenames fields each contain only a single + // null byte. + static const size_t header_length = 19; +}; + // An output section. We don't expect to have too many output // sections, so we don't bother to do a template on the size. @@ -2566,7 +2727,7 @@ class Output_section : public Output_data // within the output section. template off_t - add_input_section(Layout* layout, Sized_relobj* object, + add_input_section(Layout* layout, Sized_relobj_file* object, unsigned int shndx, const char* name, const elfcpp::Shdr& shdr, unsigned int reloc_shndx, bool have_sections_script); @@ -2597,6 +2758,11 @@ class Output_section : public Output_data flags() const { return this->flags_; } + typedef std::map Section_layout_order; + + void + update_section_layout(const Section_layout_order& order_map); + // Update the output section flags based on input section flags. void update_flags_for_input_section(elfcpp::Elf_Xword flags); @@ -3359,11 +3525,31 @@ class Output_section : public Output_data has_fixed_layout() const { return this->has_fixed_layout_; } + // Set flag to allow patch space for this section. Used for full + // incremental links. + void + set_is_patch_space_allowed() + { this->is_patch_space_allowed_ = true; } + + // Set a fill method to use for free space left in the output section + // during incremental links. + void + set_free_space_fill(Output_fill* free_space_fill) + { + this->free_space_fill_ = free_space_fill; + this->free_list_.set_min_hole_size(free_space_fill->minimum_hole_size()); + } + // Reserve space within the fixed layout for the section. Used for // incremental update links. void reserve(uint64_t sh_offset, uint64_t sh_size); + // Allocate space from the free list for the section. Used for + // incremental update links. + off_t + allocate(off_t len, uint64_t addralign); + protected: // Return the output section--i.e., the object itself. Output_section* @@ -3817,6 +4003,8 @@ class Output_section : public Output_data bool always_keeps_input_sections_ : 1; // Whether this section has a fixed layout, for incremental update links. bool has_fixed_layout_ : 1; + // True if we can add patch space to this section. + bool is_patch_space_allowed_ : 1; // For SHT_TLS sections, the offset of this section relative to the base // of the TLS segment. uint64_t tls_offset_; @@ -3827,6 +4015,10 @@ class Output_section : public Output_data // List of available regions within the section, for incremental // update links. Free_list free_list_; + // Method for filling chunks of free space. + Output_fill* free_space_fill_; + // Amount added as patch space for incremental linking. + off_t patch_space_; }; // An output segment. PT_LOAD segments are built from collections of @@ -4118,9 +4310,10 @@ class Output_file // Try to open an existing file. Returns false if the file doesn't // exist, has a size of 0 or can't be mmaped. This method is - // thread-unsafe. + // thread-unsafe. If BASE_NAME is not NULL, use the contents of + // that file as the base for incremental linking. bool - open_for_modification(); + open_base_file(const char* base_name, bool writable); // Open the output file. FILE_SIZE is the final size of the file. // If the file already exists, it is deleted/truncated. This method @@ -4205,7 +4398,7 @@ class Output_file // Map the file into memory. bool - map_no_anonymous(); + map_no_anonymous(bool); // Unmap the file from memory (and flush to disk buffers). void diff --git a/gold/parameters.cc b/gold/parameters.cc index e04168f..c14bd1e 100644 --- a/gold/parameters.cc +++ b/gold/parameters.cc @@ -1,6 +1,6 @@ // parameters.cc -- general parameters for a link using gold -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -211,6 +211,20 @@ Parameters::check_target_endianness() } } +// Return the name of the entry symbol. + +const char* +Parameters::entry() const +{ + const char* ret = this->options().entry(); + if (ret == NULL) + { + // FIXME: Need to support target specific entry symbol. + ret = "_start"; + } + return ret; +} + // Set the incremental linking mode to INCREMENTAL_FULL. Used when // the linker determines that an incremental update is not possible. // Returns false if the incremental mode was INCREMENTAL_UPDATE, @@ -234,6 +248,14 @@ Parameters::incremental() const return this->incremental_mode_ != General_options::INCREMENTAL_OFF; } +// Return true if we are doing a full incremental link. + +bool +Parameters::incremental_full() const +{ + return this->incremental_mode_ == General_options::INCREMENTAL_FULL; +} + // Return true if we are doing an incremental update. bool @@ -285,15 +307,28 @@ parameters_force_valid_target() gold_assert(parameters->options_valid()); if (parameters->options().user_set_oformat()) { - Target* target = select_target_by_name(parameters->options().oformat()); + const char* bfd_name = parameters->options().oformat(); + Target* target = select_target_by_bfd_name(bfd_name); + if (target != NULL) + { + set_parameters_target(target); + return; + } + + gold_error(_("unrecognized output format %s"), bfd_name); + } + + if (parameters->options().user_set_m()) + { + const char* emulation = parameters->options().m(); + Target* target = select_target_by_emulation(emulation); if (target != NULL) { set_parameters_target(target); return; } - gold_error(_("unrecognized output format %s"), - parameters->options().oformat()); + gold_error(_("unrecognized emulation %s"), emulation); } // The GOLD_DEFAULT_xx macros are defined by the configure script. @@ -311,7 +346,13 @@ parameters_force_valid_target() is_big_endian, elfcpp::GOLD_DEFAULT_OSABI, 0); - gold_assert(target != NULL); + + if (target == NULL) + { + gold_assert(is_big_endian != GOLD_DEFAULT_BIG_ENDIAN); + gold_fatal(_("no supported target for -EB/-EL option")); + } + set_parameters_target(target); } diff --git a/gold/parameters.h b/gold/parameters.h index f9022ae..09b0516 100644 --- a/gold/parameters.h +++ b/gold/parameters.h @@ -134,6 +134,10 @@ class Parameters return debug_; } + // Return the name of the entry symbol. + const char* + entry() const; + // A convenience routine for combining size and endianness. It also // checks the HAVE_TARGET_FOO configure options and dies if the // current target's size/endianness is not supported according to @@ -155,6 +159,10 @@ class Parameters bool incremental() const; + // Return true if we are doing a full incremental link. + bool + incremental_full() const; + // Return true if we are doing an incremental update. bool incremental_update() const; diff --git a/gold/plugin.cc b/gold/plugin.cc index 3a5e672..3ccd8d0 100644 --- a/gold/plugin.cc +++ b/gold/plugin.cc @@ -78,6 +78,9 @@ static enum ld_plugin_status get_symbols(const void *handle, int nsyms, struct ld_plugin_symbol *syms); static enum ld_plugin_status +get_symbols_v2(const void *handle, int nsyms, struct ld_plugin_symbol *syms); + +static enum ld_plugin_status add_input_file(const char *pathname); static enum ld_plugin_status @@ -89,6 +92,29 @@ set_extra_library_path(const char *path); static enum ld_plugin_status message(int level, const char *format, ...); +static enum ld_plugin_status +get_input_section_count(const void* handle, unsigned int* count); + +static enum ld_plugin_status +get_input_section_type(const struct ld_plugin_section section, + unsigned int* type); + +static enum ld_plugin_status +get_input_section_name(const struct ld_plugin_section section, + char** section_name_ptr); + +static enum ld_plugin_status +get_input_section_contents(const struct ld_plugin_section section, + const unsigned char** section_contents, + size_t* len); + +static enum ld_plugin_status +update_section_order(const struct ld_plugin_section *section_list, + unsigned int num_sections); + +static enum ld_plugin_status +allow_section_ordering(); + }; #endif // ENABLE_PLUGINS @@ -133,7 +159,8 @@ Plugin::load() sscanf(ver, "%d.%d", &major, &minor); // Allocate and populate a transfer vector. - const int tv_fixed_size = 17; + const int tv_fixed_size = 24; + int tv_size = this->args_.size() + tv_fixed_size; ld_plugin_tv* tv = new ld_plugin_tv[tv_size]; @@ -204,6 +231,10 @@ Plugin::load() tv[i].tv_u.tv_get_symbols = get_symbols; ++i; + tv[i].tv_tag = LDPT_GET_SYMBOLS_V2; + tv[i].tv_u.tv_get_symbols = get_symbols_v2; + + ++i; tv[i].tv_tag = LDPT_ADD_INPUT_FILE; tv[i].tv_u.tv_add_input_file = add_input_file; @@ -216,6 +247,30 @@ Plugin::load() tv[i].tv_u.tv_set_extra_library_path = set_extra_library_path; ++i; + tv[i].tv_tag = LDPT_GET_INPUT_SECTION_COUNT; + tv[i].tv_u.tv_get_input_section_count = get_input_section_count; + + ++i; + tv[i].tv_tag = LDPT_GET_INPUT_SECTION_TYPE; + tv[i].tv_u.tv_get_input_section_type = get_input_section_type; + + ++i; + tv[i].tv_tag = LDPT_GET_INPUT_SECTION_NAME; + tv[i].tv_u.tv_get_input_section_name = get_input_section_name; + + ++i; + tv[i].tv_tag = LDPT_GET_INPUT_SECTION_CONTENTS; + tv[i].tv_u.tv_get_input_section_contents = get_input_section_contents; + + ++i; + tv[i].tv_tag = LDPT_UPDATE_SECTION_ORDER; + tv[i].tv_u.tv_update_section_order = update_section_order; + + ++i; + tv[i].tv_tag = LDPT_ALLOW_SECTION_ORDERING; + tv[i].tv_u.tv_allow_section_ordering = allow_section_ordering; + + ++i; tv[i].tv_tag = LDPT_NULL; tv[i].tv_u.tv_val = 0; @@ -326,8 +381,9 @@ Plugin_manager::~Plugin_manager() // Load all plugin libraries. void -Plugin_manager::load_plugins() +Plugin_manager::load_plugins(Layout* layout) { + this->layout_ = layout; for (this->current_ = this->plugins_.begin(); this->current_ != this->plugins_.end(); ++this->current_) @@ -338,7 +394,7 @@ Plugin_manager::load_plugins() Pluginobj* Plugin_manager::claim_file(Input_file* input_file, off_t offset, - off_t filesize) + off_t filesize, Object* elf_object) { if (this->in_replacement_phase_) return NULL; @@ -350,6 +406,9 @@ Plugin_manager::claim_file(Input_file* input_file, off_t offset, this->plugin_input_file_.offset = offset; this->plugin_input_file_.filesize = filesize; this->plugin_input_file_.handle = reinterpret_cast(handle); + if (elf_object != NULL) + this->objects_.push_back(elf_object); + this->in_claim_file_handler_ = true; for (this->current_ = this->plugins_.begin(); this->current_ != this->plugins_.end(); @@ -358,9 +417,11 @@ Plugin_manager::claim_file(Input_file* input_file, off_t offset, if ((*this->current_)->claim_file(&this->plugin_input_file_)) { this->any_claimed_ = true; + this->in_claim_file_handler_ = false; - if (this->objects_.size() > handle) - return this->objects_[handle]; + if (this->objects_.size() > handle + && this->objects_[handle]->pluginobj() != NULL) + return this->objects_[handle]->pluginobj(); // If the plugin claimed the file but did not call the // add_symbols callback, we need to create the Pluginobj now. @@ -369,6 +430,7 @@ Plugin_manager::claim_file(Input_file* input_file, off_t offset, } } + this->in_claim_file_handler_ = false; return NULL; } @@ -402,7 +464,7 @@ Plugin_manager::save_input_group(Input_group* input_group) void Plugin_manager::all_symbols_read(Workqueue* workqueue, Task* task, Input_objects* input_objects, - Symbol_table* symtab, Layout* layout, + Symbol_table* symtab, Dirsearch* dirpath, Mapfile* mapfile, Task_token** last_blocker) { @@ -411,7 +473,6 @@ Plugin_manager::all_symbols_read(Workqueue* workqueue, Task* task, this->task_ = task; this->input_objects_ = input_objects; this->symtab_ = symtab; - this->layout_ = layout; this->dirpath_ = dirpath; this->mapfile_ = mapfile; this->this_blocker_ = NULL; @@ -599,12 +660,20 @@ Pluginobj* Plugin_manager::make_plugin_object(unsigned int handle) { // Make sure we aren't asked to make an object for the same handle twice. - if (this->objects_.size() != handle) + if (this->objects_.size() != handle + && this->objects_[handle]->pluginobj() != NULL) return NULL; Pluginobj* obj = make_sized_plugin_object(this->input_file_, this->plugin_input_file_.offset, this->plugin_input_file_.filesize); + + + // If the elf object for this file was pushed into the objects_ vector, delete + // it to make room for the Pluginobj as this file is claimed. + if (this->objects_.size() != handle) + this->objects_.pop_back(); + this->objects_.push_back(obj); return obj; } @@ -616,7 +685,7 @@ ld_plugin_status Plugin_manager::get_input_file(unsigned int handle, struct ld_plugin_input_file* file) { - Pluginobj* obj = this->object(handle); + Pluginobj* obj = this->object(handle)->pluginobj(); if (obj == NULL) return LDPS_BAD_HANDLE; @@ -634,7 +703,11 @@ Plugin_manager::get_input_file(unsigned int handle, ld_plugin_status Plugin_manager::release_input_file(unsigned int handle) { - Pluginobj* obj = this->object(handle); + if (this->object(handle) == NULL) + return LDPS_BAD_HANDLE; + + Pluginobj* obj = this->object(handle)->pluginobj(); + if (obj == NULL) return LDPS_BAD_HANDLE; @@ -642,13 +715,30 @@ Plugin_manager::release_input_file(unsigned int handle) return LDPS_OK; } +// Get the elf object corresponding to the handle. Return NULL if we +// found a Pluginobj instead. + +Object* +Plugin_manager::get_elf_object(const void* handle) +{ + Object* obj = this->object( + static_cast(reinterpret_cast(handle))); + + // The object should not be a Pluginobj. + if (obj == NULL + || obj->pluginobj() != NULL) + return NULL; + + return obj; +} + ld_plugin_status Plugin_manager::get_view(unsigned int handle, const void **viewp) { off_t offset; size_t filesize; Input_file *input_file; - if (this->objects_.size() == handle) + if (this->in_claim_file_handler_) { // We are being called from the claim_file hook. const struct ld_plugin_input_file &f = this->plugin_input_file_; @@ -659,7 +749,9 @@ Plugin_manager::get_view(unsigned int handle, const void **viewp) else { // An already claimed file. - Pluginobj* obj = this->object(handle); + if (this->object(handle) == NULL) + return LDPS_BAD_HANDLE; + Pluginobj* obj = this->object(handle)->pluginobj(); if (obj == NULL) return LDPS_BAD_HANDLE; offset = obj->offset(); @@ -725,11 +817,11 @@ Pluginobj::Pluginobj(const std::string& name, Input_file* input_file, { } -// Return TRUE if a defined symbol might be reachable from outside the +// Return TRUE if a defined symbol is referenced from outside the // universe of claimed objects. static inline bool -is_visible_from_outside(Symbol* lsym) +is_referenced_from_outside(Symbol* lsym) { if (lsym->in_real_elf()) return true; @@ -737,6 +829,15 @@ is_visible_from_outside(Symbol* lsym) return true; if (parameters->options().is_undefined(lsym->name())) return true; + return false; +} + +// Return TRUE if a defined symbol might be reachable from outside the +// load module. + +static inline bool +is_visible_from_outside(Symbol* lsym) +{ if (parameters->options().export_dynamic() || parameters->options().shared()) return lsym->is_externally_visible(); return false; @@ -745,8 +846,18 @@ is_visible_from_outside(Symbol* lsym) // Get symbol resolution info. ld_plugin_status -Pluginobj::get_symbol_resolution_info(int nsyms, ld_plugin_symbol* syms) const -{ +Pluginobj::get_symbol_resolution_info(int nsyms, + ld_plugin_symbol* syms, + int version) const +{ + // For version 1 of this interface, we cannot use + // LDPR_PREVAILING_DEF_IRONLY_EXP, so we return LDPR_PREVAILING_DEF + // instead. + const ld_plugin_symbol_resolution ldpr_prevailing_def_ironly_exp + = (version > 1 + ? LDPR_PREVAILING_DEF_IRONLY_EXP + : LDPR_PREVAILING_DEF); + if (nsyms > this->nsyms_) return LDPS_NO_SYMS; @@ -777,9 +888,14 @@ Pluginobj::get_symbol_resolution_info(int nsyms, ld_plugin_symbol* syms) const if (lsym->source() != Symbol::FROM_OBJECT) res = LDPR_RESOLVED_EXEC; else if (lsym->object()->pluginobj() == this) - res = (is_visible_from_outside(lsym) - ? LDPR_PREVAILING_DEF - : LDPR_PREVAILING_DEF_IRONLY); + { + if (is_referenced_from_outside(lsym)) + res = LDPR_PREVAILING_DEF; + else if (is_visible_from_outside(lsym)) + res = ldpr_prevailing_def_ironly_exp; + else + res = LDPR_PREVAILING_DEF_IRONLY; + } else if (lsym->object()->pluginobj() != NULL) res = LDPR_RESOLVED_IR; else if (lsym->object()->is_dynamic()) @@ -793,9 +909,14 @@ Pluginobj::get_symbol_resolution_info(int nsyms, ld_plugin_symbol* syms) const if (lsym->source() != Symbol::FROM_OBJECT) res = LDPR_PREEMPTED_REG; else if (lsym->object() == static_cast(this)) - res = (is_visible_from_outside(lsym) - ? LDPR_PREVAILING_DEF - : LDPR_PREVAILING_DEF_IRONLY); + { + if (is_referenced_from_outside(lsym)) + res = LDPR_PREVAILING_DEF; + else if (is_visible_from_outside(lsym)) + res = ldpr_prevailing_def_ironly_exp; + else + res = LDPR_PREVAILING_DEF_IRONLY; + } else res = (lsym->object()->pluginobj() != NULL ? LDPR_PREEMPTED_IR @@ -1218,11 +1339,7 @@ void Plugin_hook::run(Workqueue* workqueue) { gold_assert(this->options_.has_plugins()); - Symbol* start_sym; - if (parameters->options().entry()) - start_sym = this->symtab_->lookup(parameters->options().entry()); - else - start_sym = this->symtab_->lookup("_start"); + Symbol* start_sym = this->symtab_->lookup(parameters->entry()); if (start_sym != NULL) start_sym->set_in_real_elf(); @@ -1230,7 +1347,6 @@ Plugin_hook::run(Workqueue* workqueue) this, this->input_objects_, this->symtab_, - this->layout_, this->dirpath_, this->mapfile_, &this->this_blocker_); @@ -1324,11 +1440,31 @@ static enum ld_plugin_status get_symbols(const void* handle, int nsyms, ld_plugin_symbol* syms) { gold_assert(parameters->options().has_plugins()); - Pluginobj* obj = parameters->options().plugins()->object( - static_cast(reinterpret_cast(handle))); + Object* obj = parameters->options().plugins()->object( + static_cast(reinterpret_cast(handle))); + if (obj == NULL) + return LDPS_ERR; + Pluginobj* plugin_obj = obj->pluginobj(); + if (plugin_obj == NULL) + return LDPS_ERR; + return plugin_obj->get_symbol_resolution_info(nsyms, syms, 1); +} + +// Version 2 of the above. The only difference is that this version +// is allowed to return the resolution code LDPR_PREVAILING_DEF_IRONLY_EXP. + +static enum ld_plugin_status +get_symbols_v2(const void* handle, int nsyms, ld_plugin_symbol* syms) +{ + gold_assert(parameters->options().has_plugins()); + Object* obj = parameters->options().plugins()->object( + static_cast(reinterpret_cast(handle))); if (obj == NULL) return LDPS_ERR; - return obj->get_symbol_resolution_info(nsyms, syms); + Pluginobj* plugin_obj = obj->pluginobj(); + if (plugin_obj == NULL) + return LDPS_ERR; + return plugin_obj->get_symbol_resolution_info(nsyms, syms, 2); } // Add a new (real) input file generated by a plugin. @@ -1388,6 +1524,158 @@ message(int level, const char* format, ...) return LDPS_OK; } +// Get the section count of the object corresponding to the handle. This +// plugin interface can only be called in the claim_file handler of the plugin. + +static enum ld_plugin_status +get_input_section_count(const void* handle, unsigned int* count) +{ + gold_assert(parameters->options().has_plugins()); + + if (!parameters->options().plugins()->in_claim_file_handler()) + return LDPS_ERR; + + Object* obj = parameters->options().plugins()->get_elf_object(handle); + + if (obj == NULL) + return LDPS_ERR; + + *count = obj->shnum(); + return LDPS_OK; +} + +// Get the type of the specified section in the object corresponding +// to the handle. This plugin interface can only be called in the +// claim_file handler of the plugin. + +static enum ld_plugin_status +get_input_section_type(const struct ld_plugin_section section, + unsigned int* type) +{ + gold_assert(parameters->options().has_plugins()); + + if (!parameters->options().plugins()->in_claim_file_handler()) + return LDPS_ERR; + + Object* obj + = parameters->options().plugins()->get_elf_object(section.handle); + + if (obj == NULL) + return LDPS_BAD_HANDLE; + + *type = obj->section_type(section.shndx); + return LDPS_OK; +} + +// Get the name of the specified section in the object corresponding +// to the handle. This plugin interface can only be called in the +// claim_file handler of the plugin. + +static enum ld_plugin_status +get_input_section_name(const struct ld_plugin_section section, + char** section_name_ptr) +{ + gold_assert(parameters->options().has_plugins()); + + if (!parameters->options().plugins()->in_claim_file_handler()) + return LDPS_ERR; + + Object* obj + = parameters->options().plugins()->get_elf_object(section.handle); + + if (obj == NULL) + return LDPS_BAD_HANDLE; + + // Check if the object is locked before getting the section name. + gold_assert(obj->is_locked()); + + const std::string section_name = obj->section_name(section.shndx); + *section_name_ptr = static_cast(malloc(section_name.length() + 1)); + memcpy(*section_name_ptr, section_name.c_str(), section_name.length() + 1); + return LDPS_OK; +} + +// Get the contents of the specified section in the object corresponding +// to the handle. This plugin interface can only be called in the +// claim_file handler of the plugin. + +static enum ld_plugin_status +get_input_section_contents(const struct ld_plugin_section section, + const unsigned char** section_contents_ptr, + size_t* len) +{ + gold_assert(parameters->options().has_plugins()); + + if (!parameters->options().plugins()->in_claim_file_handler()) + return LDPS_ERR; + + Object* obj + = parameters->options().plugins()->get_elf_object(section.handle); + + if (obj == NULL) + return LDPS_BAD_HANDLE; + + // Check if the object is locked before getting the section contents. + gold_assert(obj->is_locked()); + + section_size_type plen; + *section_contents_ptr + = obj->section_contents(section.shndx, &plen, false); + *len = plen; + return LDPS_OK; +} + +// Specify the ordering of sections in the final layout. The sections are +// specified as (handle,shndx) pairs in the two arrays in the order in +// which they should appear in the final layout. + +static enum ld_plugin_status +update_section_order(const struct ld_plugin_section *section_list, + unsigned int num_sections) +{ + gold_assert(parameters->options().has_plugins()); + + if (num_sections == 0) + return LDPS_OK; + + if (section_list == NULL) + return LDPS_ERR; + + std::map order_map; + + for (unsigned int i = 0; i < num_sections; ++i) + { + Object* obj = parameters->options().plugins()->get_elf_object( + section_list[i].handle); + if (obj == NULL) + return LDPS_BAD_HANDLE; + unsigned int shndx = section_list[i].shndx; + Section_id secn_id(obj, shndx); + order_map[secn_id] = i + 1; + } + + Layout* layout = parameters->options().plugins()->layout(); + gold_assert (layout != NULL); + + for (Layout::Section_list::const_iterator p = layout->section_list().begin(); + p != layout->section_list().end(); + ++p) + (*p)->update_section_layout(order_map); + + return LDPS_OK; +} + +// Let the linker know that the sections could be reordered. + +static enum ld_plugin_status +allow_section_ordering() +{ + gold_assert(parameters->options().has_plugins()); + Layout* layout = parameters->options().plugins()->layout(); + layout->set_section_ordering_specified(); + return LDPS_OK; +} + #endif // ENABLE_PLUGINS // Allocate a Pluginobj object of the appropriate size and endianness. diff --git a/gold/plugin.h b/gold/plugin.h index 2ee0b5e..32ffe35 100644 --- a/gold/plugin.h +++ b/gold/plugin.h @@ -131,6 +131,7 @@ class Plugin_manager : plugins_(), objects_(), deferred_layout_objects_(), input_file_(NULL), plugin_input_file_(), rescannable_(), undefined_symbols_(), any_claimed_(false), in_replacement_phase_(false), any_added_(false), + in_claim_file_handler_(false), options_(options), workqueue_(NULL), task_(NULL), input_objects_(NULL), symtab_(NULL), layout_(NULL), dirpath_(NULL), mapfile_(NULL), this_blocker_(NULL), extra_search_path_() @@ -153,11 +154,22 @@ class Plugin_manager // Load all plugin libraries. void - load_plugins(); + load_plugins(Layout* layout); // Call the plugin claim-file handlers in turn to see if any claim the file. Pluginobj* - claim_file(Input_file* input_file, off_t offset, off_t filesize); + claim_file(Input_file* input_file, off_t offset, off_t filesize, + Object* elf_object); + + // Get the object associated with the handle and check if it is an elf object. + // If it is not a Pluginobj, it is an elf object. + Object* + get_elf_object(const void* handle); + + // True if the claim_file handler of the plugins is being called. + bool + in_claim_file_handler() + { return in_claim_file_handler_; } // Let the plugin manager save an archive for later rescanning. // This takes ownership of the Archive pointer. @@ -173,7 +185,7 @@ class Plugin_manager void all_symbols_read(Workqueue* workqueue, Task* task, Input_objects* input_objects, Symbol_table* symtab, - Layout* layout, Dirsearch* dirpath, Mapfile* mapfile, + Dirsearch* dirpath, Mapfile* mapfile, Task_token** last_blocker); // Tell the plugin manager that we've a new undefined symbol which @@ -218,8 +230,8 @@ class Plugin_manager Pluginobj* make_plugin_object(unsigned int handle); - // Return the Pluginobj associated with the given HANDLE. - Pluginobj* + // Return the object associated with the given HANDLE. + Object* object(unsigned int handle) const { if (handle >= this->objects_.size()) @@ -231,7 +243,7 @@ class Plugin_manager // and we are still in the initial input phase. bool should_defer_layout() const - { return !this->objects_.empty() && !this->in_replacement_phase_; } + { return this->any_claimed_ && !this->in_replacement_phase_; } // Add a regular object to the deferred layout list. These are // objects whose layout has been deferred until after the @@ -265,6 +277,14 @@ class Plugin_manager in_replacement_phase() const { return this->in_replacement_phase_; } + Input_objects* + input_objects() const + { return this->input_objects_; } + + Layout* + layout() + { return this->layout_; } + private: Plugin_manager(const Plugin_manager&); Plugin_manager& operator=(const Plugin_manager&); @@ -293,7 +313,7 @@ class Plugin_manager }; typedef std::list Plugin_list; - typedef std::vector Object_list; + typedef std::vector Object_list; typedef std::vector Deferred_layout_list; typedef std::vector Rescannable_list; typedef std::vector Undefined_symbol_list; @@ -340,6 +360,9 @@ class Plugin_manager // Whether any input files or libraries were added by a plugin. bool any_added_; + // Set to true when the claim_file handler of a plugin is called. + bool in_claim_file_handler_; + const General_options& options_; Workqueue* workqueue_; Task* task_; @@ -370,7 +393,9 @@ class Pluginobj : public Object // Fill in the symbol resolution status for the given plugin symbols. ld_plugin_status - get_symbol_resolution_info(int nsyms, ld_plugin_symbol* syms) const; + get_symbol_resolution_info(int nsyms, + ld_plugin_symbol* syms, + int version) const; // Store the incoming symbols from the plugin for later processing. void diff --git a/gold/po/POTFILES.in b/gold/po/POTFILES.in index 4d6122c..8793d89 100644 --- a/gold/po/POTFILES.in +++ b/gold/po/POTFILES.in @@ -1,5 +1,10 @@ archive.cc archive.h +arm-reloc-property.cc +arm-reloc-property.h +arm.cc +attributes.cc +attributes.h binary.cc binary.h common.cc @@ -27,11 +32,19 @@ errors.h expression.cc fileread.cc fileread.h +freebsd.h +gc.cc +gc.h gold-threads.cc gold-threads.h gold.cc gold.h i386.cc +icf.cc +icf.h +incremental.cc +int_encoding.cc +int_encoding.h layout.cc layout.h mapfile.cc @@ -46,6 +59,8 @@ output.cc output.h parameters.cc parameters.h +plugin.cc +plugin.h powerpc.cc readsyms.cc readsyms.h @@ -68,7 +83,10 @@ symtab.h target-reloc.h target-select.cc target-select.h +target.cc target.h +timer.cc +timer.h tls.h token.h version.cc diff --git a/gold/po/es.gmo b/gold/po/es.gmo new file mode 100644 index 0000000000000000000000000000000000000000..e79c3047cd4d6d4c8396865d46df4089fb51864d GIT binary patch literal 51373 zcmd6w378yLb?*x>7z=FU4TIP6B3rUGvb!%ofZJ225=BNgzN7&NE>POIQ+?5D4JJNg#Re_dn;}>Z+cekxcU5_xe-m zU$^S+_uO;NJ@?j`?;U=?tqH$>cuQ03kOl6CUi5I&wt zs;QTPYS(s9>8HSxz*mB*=SRUufL{Vt?$-nU6uf}&e}LzM=MH%M8^EIpKNCC!d^M>0 z-3^`t{tjFVE?=G`CxT5-<-7t^{67Kd+T_at?*q>xeEeBSavHc5d^9)%sy#0Q9|_(C zt^~gT9s)j?!4Mt>s{JXb@mb4%%D)Y2+}{YQ{&#`u-(QFDnP+==3{?Ja09DW11AYoT zg7Ced+VvAq?Ky^kp05N|&rP8ExdPHv$#X;aL!jDoPr&=Zl<*1X`Z!zyY8)z{>i>L@ zB9eE5bYb!xQ2n)t&Y{Z5a`0eqd%!91RKiaMRsXkuBuU-}UJw2t;3bda8R0jAqSGhR z8N#jLBJgVPFt7}Y4t9Zug3kt3-YY=$^IO0J!4H6%7k7e(gP#E(1>OrD1pYWY|7E}j zJ>K&>5>&iXL547S9LT?A8^`O#KK=tP>pyGWT)VTdLJUd(tT#oGpI-rNK-gvoor zBf;;1$AG^D_5Khhx6+>nJ`{Ws_!#g?Q1PZg)#JsW=;SU?l6^ylUxIeUY`d(7Q7QY4*Y9S z?|&Kam_g5XJ*a%Ep!)G2b;E9AwAf%o=3)Fah3{?I8 z0aQH>Uh8yvF(~?c5-9q*7F2o90X06ihv$D5!oL77oX>9tMfaltuLo7X3Gi6( z>EH?AYr&(zkAug9_kfpzzYOos8uEVG1gc+lfTw~tfhzCaAX6v#4XFH=u6KI66cjzL z2Q`kHz|+9ppvLJ~nwfGPOHfDa*a_5Z1$%GttyqLbHvqRUxO?|%cH4xVti z_uqO@bg>&0KYj;z1o+kP{70bp#93#+t2>vs83ixlJ`ti6Ydi^g1MHdxN^}Y#If7}6T zeEtR$-?}e6KXBOFvlLXk)u8IN9aOwspz?VksCL~6E(Y%bMK}KnYMc+-=y(>WdT#{P zA6r4ydoL(H`z%oDUJ0t+?*~OMUk1e=e*`MO`#|xT!#8=l(?Rvmg`nb(fGM~WJQ;im zsQ&msze;afn}`=g-B`xbZsc)*C) zcQtqj;cGyRPZfMP_+n7?xg~@@462{+4){6nP{LmXF9N>>s-GS`>g8VuE+bq5)gL#9 z=XZc-68>8-1rOZj^tJ?qRVFLI)4&F(etH$C`h5_56!>XS`P~Dm-TwkE1&_VLpAUfw z-vFwAZUGMmzX2Wr{v6ae{1>Qvj=9q1i@@J3Vs;WxZMkiZ~PcM8a!aT zkHc}`VT3OLHJ_gVYP_4^3E;E9gTc3eL*V;Cjl+H5a`5;kdp`|>qTk7YF9c5{{2uT) z@XMg``)LRtSn~Rv3Lek%p@8F{(me~*xZVb;-Jb_l?_YqA0S_4S^v8qhzl%YJE|~%8 z!sK3%u1Qvm!=u5QLFM-=P~(1N+4EfkYJ7Hp7l3a9HICm1?;lcey=W<@dR+&qpPmMu z489#yxnBU!2Tz*tez^)1ojxB_y!QwEYj82)`#_EBF_TV5o4`v5KNVCv?*`8T?*&z# zhwSkFI}1FG@FwtKU1uV#H!1?O`z)YOi<(UR#5%_X;5_V zT~O`(6{!3Uy}{|>6j1q|1FHVpL8ZG1JPCXocq;hk;OXGcL-_EW9)3KidA%K63bw&h zz&C-91wRKK1AYe_0q+Md2A^2-^e+OH|A#@9_YF|>`1kPs#3>J72C9FiK-J@x@ca|u z`42(W@;Og9j1b1Re}t1*+dC!1KUc!2`fA zff|>uf@@8gKx77kCl)_3-?NrqjbI;C7ym zgzz1p#_LDmjo?FCPKVD0R};P)6dnCLsD4@6_WExDMX!GZsvWn2qPsr>RiE#Ghk-u@ zj|Kk&+zLLrgKh;@!6U)DK#kv5LG|Cyz+v!_yL?_=4Qf8#0&2W|4JzHyyPckvf#(yx z8hkwXGH?+53s7{jXphsyd7$2J1|JDNA5{O{0v-Z>E8tH-wfBDTT=4W6pI6s{DdE?H zqN`7UD(810yn3&Pp9U)bPl2lEmjnJCcm&~p0W~fMJ=ObjJ*ekX;A6mNfug(Df#-pr z15X9-2UV}*p62x$2G1aTBdGp=54ZySHh4Dph^M<=y&AlT@H0TAzZ+Ej{}I$Uo$(AG z&-1}$gx7(p|5Lz=!DoPwQ1Z!uXFU@gk??Jx=ydmuj?Vy?ClK5OD*hC>8hm*Oe-%`He+ym${#ST^@pF;I zgr5ek1-}7a03Lgj^W9NU{cy>T&Q3oFA+QMHg*Q`MxuR?*T6-{NNY*yn7<3 zd|m@S1iS|n-Fz+J0Wb3W&I8Zo`54Hng3#JMASto@G$uz8hQyz6?}3 zp9GhJ{{pK2PkgDj>tay(KOIzme+bn3UxOOIN8Rk>y$n=7li+FKo53aE=RwVfUxCU$ z{bQFmPXI3^yaQB!-VQ3=SHKj!54;dO>SeC4Yz9@|TS1$T;E9Cq2N!`yzufD0GN^pU zK*fI{D8BTu@cf^^8wnrz3fGr!4fsazAfCSiRQo;vs-OM}JPG^>n1Tnr((w%NDTJR0 zo(_HzRJy+h)$Rjs@qQZsuOnOnOW>!#Bf#`lUoW2rs@#>}MsOXt9()C;{JsS~0{k~n z{d>TxoGvd4xC7L<+yW~9uYqTS=fB$NX$NTI2A;+9UxOEeC%wkU<;max;g^Gt1wRe0 z0lx)45 z{2C}eb>?ke?v>zigkJz&1-=7Reg7*wKkcoa|61@wp6>#c->bmygLj4S>)z(=`4o65 z&%Xm61s?x)r?Ydxa|z!HUJZT`ycj&?9bTU?P;_!LsD8c^90h*{s(u&0)9LA2Q0;Gl zng?$M)sOE5)xTc~&+iTRUGPwz{{(yjct5D|Uh^m3e^cNEgx?5i9KH^!UI)I*=hb>p z?_UZk|IdR%;8#J_;=fIkHF{`?R4xIGy>neatv zE-%-DYX6PkS>PSurQnaiW#FkF^7=dpTu=B`Q1j|L-~f2ohrOPcfR_{A9q==t(jRn( z=XXB%1ic4U&ga0(z~6w^fh#}a&tDCyKfeH;20r+sUjL=w;e>}ncsrj<^kY6>&Hy!jTfr;9o#5Hv=fG9qeW2#giaWi$EuhAw1?u^&py>RgpvL2W zh48Pzl<*-R_j;Taa3iR6JHb=I7lVtz4}wR7UkBBXzXVl}Q~uP~!`r|~!XE>7f+yUS zBsK6wU<14#RJzH#y`SCyt|t5qP~&sdC%j*;12s?H4l4g2ftnXbebU=?EqEc}r-SE! zcY<~B=irmTt3T!Wy$96$-+&so#h-S1-UePo_-0V~ei>W~9`+fxw`~KDBm55V0`PO- z8t`|Z^11l4-tTqrK*H|^F9kmg9tr*y6n#DXb58f?gUaVQ;3eQEK;`p$@OW_9tdGkR zz(*6Vf|>_6f{y{;4ITl`f~xm7z~$hPf97> zs?SbP!?@S}_H|$r{5sb*u7kKVb~k|fXUt~q zr(7p+>G#(TNr&(Y!@cIDexlvATyNqXtkihM{|3jo-p4bI>F>Du{kHP{w(#QT;FW|m zmzXN{6P-VfXa9@qdEA${4(56t;aRSybNvR$KNP7pC$ZY@EmYC*FoI>F(~?BS|*?1 z{v>cC*N?fM0rfkXYctmkTxG7KxL(TpySeleKh^K{5FQWsA)YPe+QIcWF8v0iVb9L$0&9U^(`CKKCyV z_kudt8lH`C>GuQhwcrupi@5IK{*hcC3GcbJ-+KOseJ029{2#!VaDAWa7OwYmou7;U zUGBfl^(>z2*XDi$cokR5y?)1mALaTN?*EHxkn8UVU%>S(u5WPZ_vnDSe=FAv;YV^U z(F1>Gw1cv7BrV;dk0o=ohT< z>^d&QL-HtaB)k)>4)?c(bbkSUnJeY_3h-s%JzR^p*Y8(cFS0v$U3k_eye>SuC_Gz3 zSiJ6GA>0V~0r0?Z{~7S(TxW)G$RdHACZFQjv*Uw+Z|B)p!u?-ye<9a}`8C%uT=DnAa3gut3HQ^a*~9f|!hZu^!?m7Ezni#T z#r+$=uYo6mp98momvWuJwSn+1@C~4TEeEr)m%_7WfEV)o9Ik)ndP{iz9qwPx^%}0f z=Gl_)d=Fv$9?x|kSC!{0^?=`b+&>rmSFTTUzmw~9?*EDFpDS`@z2JAi zzXWdqPXm9%rQcTx9}WJ(Ld-+LzvTXAt|xQ-i14Lc+qwS_t}R@55k41uIQVj|L%4rG zIKidg-*DZ|_2-1I0soOpzjtuG&hEPZJv`j5CGPp$zb}MO1sh!N=K67XHb9&ghB6)m zZVdO&0l!9^Gr&IrzX{$6zL)D=T=91~H&^rSo8Tb$VelR>{=OV^pf9$!~285rx1Pu*S~W;H9UV4 z_whHt%?r3b!1eU_5FFzA4A*N&vx)1C+)sw|&*A>DT>0OVc(;=4nLPXu_8D(A$em+^Y`Efxn2>T|5ix&ry(qu%H6+> zce@E!xW34JnM=O|xW2^w6SkV?+Eqz*&D} zy4#-+zL)FP@N6;nf5~+T*CTj#G1m*Ye+btqt|_jodA1tV?`d4W=X!<$x!)Dx{$k?2 zo%?^|I)MA5Lpr^FG}jQ}-+1JZ8qJw>sx(a~O-DM@(~V}EsO?g7veIs?*MC(c3- zSEXZ}@ttZ{A)WP0@zGR;_Lu3*daGTkw_9ney0=1mVmRS=qK)R(lDT74C7qERc0i~^NpgEhg(TcBDG_0$k%PqXx`c4K;a z!BR@i@g3D&m9$nJYnH-zg)uC(+m)&5wt51Rq_=A#igu-ymfC4!Vxm=P`@_nf@k*ua zqrwZT$EviwqvAE1D$S&06-KYw>`b?~tl)6x*8Si>!To@OHtn>vE?j;A(0oibNlQF|+c%HSagtp*g z(@>{|$eEFqL0?pw_1FgIBFn7bTPqired<)}yGpexB~DvU5a?9WC6ztXjDaXKouL1W zS6bhu_0H5-rMWa4jeVuBQ*663nNLzHwc2647!qS1MqF^JIg?4lT<_FsDJ_|*)=SjM znx;Wj^#YMjRa7f+sxUcftx9EQZ$C|yYH-=9T)IH2IZ~WAjz~XGv-3t2^D9Q&Q=RHe zg~4R1YQ~G(8?8`uqt2*Rr;KCPLjAo#A)6>Xm?cBQ>(j>A4GfNT!&J4^QlCvW8=YzT zGz{vL7($)}Se=X#dq_tyv$6Dm#}Hd7xuC2-!<|rl)!W&)F^_K2W~Go*r(O&);_cE- z`h|&GAF%nu;7xX>n77`NPK=`Nfc}j?HK@UEH89525IY;FQ@?&JYDu$GPn)GWQ{5T0 zNQj>EUQ4NeNM^B?H1q@8-kCz};?O4AcEN)v~-ig)VW7HR%E>z|osUO6-CjWAV0=raqP*Y=CGb!Zs& zp(4W=%qfT%gZqe*)wwiTs-n83leNYe-4c2-40^tDb5cl=jtS;eA>!chA(R`66*L=tw?1I9OeHQZ z>tE^(3W0Tlql4Q=hA!JUv}ttv;P8gaHknF+KpGiZJGx=>rjc~KR)WlP8B{0h4HHo# zLxWq_UcP+r={sAJw8=(QBh4;Ye z5RHwxLN?)C)Q4bAXjRgUsUY3uOZSm$BvzV{zTHK7_6)CneA&aY@JQyLQF$70c4Im#0MRS}mpeJ4c9mNE(P{5AR7Z1G%j z5vHq<5>sJ7Qd^v%tLP>JOmp~Ftlof)a#qI~RzJHN&7EGufo3uginr`6-#HoPWArO9 z|6YQtIzG2n#UaS#11lZZpq8bR^kAmkC&l=^;(2i0x~)SaBgtU7oUT3dOn9YMp)i(u zWj85nl{T!jkxh;;Qd#siLPp$lzBn*2y{c8~J52+P;~17nVRTZK7CS7@5FZUo`s$q5 zZf|f~%6vs;t2;#q#NqkZswF3bfpQ`f&2H2TCUK*-3(CsW5#vyEC~45y&AQR;n}&wg z4Xx`>PJ@Njf~cw1(JErBGA>T9IbcMz#QSk6W}d-T3mw%Sx6<()njzFK|FB#w*H1@@ zw0FrGElH!bVxm*`nHFb|iObqdF;?%(wVStX8co)se5WHd-a$P=M-bUqYP!5! z8S6}Lhoc44m_&v+d~R7l?CF_ib#g~LJ!i#=3)1z?N+lg>Otg{Ym2`arBaMmoW$A|c zIE;U7#>Q+(?>&ON7L9bE-x}+hwag8uy~G;7<*RnFQn+4OoVT*4GTw1!8zZ8KnZ3!! zw6Y8SSe@|YJaT$`ywi+%%0Lp75DApP#^c+0EJ{8$Ngq8z1{Ko-q&b#YFGd&#wsqRTXa=2k9Y3MbuZV#2$?|4qLwrx&j_!-b-bY~D1u zaVSWOyr}4ndNuJjtc`RbW!M;tjAt%4%oxcaCF|yi+LL=HStnXcOJifr3W}3!C~kFP z(#|xPYk?d+N-TR-5RjrDxe>6mmBP>6x~AaBs4$$BdBKF{N2D12Sju+3~D-%?pzFs6`MMq(oH zz$x_p>Ogykq9Ia4X)X0skE$PDwKY;{SPHVTzzVC~f~=x?!~7NtDR-u8G#F`79KAw+ zOK4A(P!M-9twhz@i$Tab=eBi=5rlCa>ZkbLSG`>|CtIt^?i~o6*3RnmwArs@2aQvg zSr#;`WSy^YQmN@IpJp%_3~k&tJgAjlGBkw&%If3Xi>}Lz0^${6k(>gxlJ#2$Z84r)R;f$#tvE+XH>?x2Rl1MEP+32?*q`$*E^m8Z z7v|7Ra#=K`+R8!XWPQZol<0vC*<@PVC`*;G4WQ-e=>r4R@rl)~(nRHSn|Q$#pp6WO zRZ5}mmM0rzLtwgTy)$yf*7JJ!dH!`I7w7b7O43%1k3_>2mP>YE+N~tMG-9c<+d~O` zB56lc`W!VXo8rrk2^%8=SO7Few4pw(QLM{4Hl+rNZ+ER%EUM7fHiRvMbsL5r$jCCJ zmmw*XV|8k}X2me`hlj2h8cv2ctg!(fUXXDy85jpPmzs%1oQHSiqiJslow2z6vvF`s zMq(Sq1GJMW!?Z1_jELYhVVRTUV!+0CvG-yz&@IZfa%XCK!3bKHcO#I7t+pz2q6$yl zD>|q)VZ!}NBQ6@Q^Rf00VrX0$rztit(1j}LshhWMxNO6wbh_CXm$5@;@}61;qqm5y zn=V_Hj4A*6q*pH&wN~0Y6I+h~+#=y6!P{P=MS(=>vXTF5w&wwi3Y zeBIU&TT_b>YL%R7ecY^;VU5wgx42b^k!%^>#%xQrY~6g>*1?U*mZD;`%&lTY)n^MM zV|!1&x`eQ$0XZ{Dwlq1)A?{Sz#cHLdIP|DTThIbU;H^fd$zsOsf(7c&3J;*mIH^VGW5k2OgVJ&Fau5 ziVl&4N8ROm?2aY2_BTr1?l{C3v7+ij--e>|x++&FEXFFlT2RrATMi?m zgIh=E2*Z&L*9;{iTZYzd7#v13kYS$AU<09q-K2L81`CA4>Y=N)$W$o3ainW=jh4J9 zUq_g-K`A!P-t0Zlr5DW0IMiWu%`~S(ejLg>fC8jD`(8r-Z1U4wL}p3iLsMMs3G9Co zlZz`?aW2}MqE=>vYR|)1v}RhYWYcB?W}BH5JpyE%O={mp9%B{;tJr)|+;r)dv-#rK z+|Kgpvr-w6tg+1upTq+bEfyje(Cv99c3FzmB(X4E>vcjhtq=RF<|FJQOsB)6n;8L} zfe5mHT*_HC8$6O$m~n>s6IZ(9JTN6fgcK$dC&(ttW9br&$!$0FMwPY= zyRnT3dly@n(SNCYLunlSG#S+*Ig$^z6EZQjf{AfeI@9QwAq`a<9@ea)J)n2BX}XRk ziS?;7C5aa)aM`A9sV^~V>6XqItH*S>N;xPXaf+X-qXX(Ivc{%o9DS)q4OOfeV=Z4) zs28g`mZX@lDIIyqkp-59w5~ma8a>KBOofgLC)$jU`B3p{p0(~Mb{l4E8N2^D<5k5b zNhxj|Q~wsxi) z&f1(VVa4G_c#|E{AqvYL-@eiC)XGaOKN-Q9P*a$)=?OOu`I;uGQyy=3Q|8wub|^Q( z``$v}nOE-HSddtp{aeLfxdTxy!*t7zU`_3}S>a0UP$BJ%km;yZ(T;+&ORm&LH(fvN zGPxM^H4YuhY1N=qCD*PV8NGUV==$VZ26vft$}$(U%i5*Z&g-vT#_;eKl^z2iH;Mu< zkp=M7UCSoxon>Q<_Kxe5921QyksU^rJVqUd)j`bY7Ba7~w_mI6(SZ0}ViqH@3?9YQ z@C2weZW((N+ct%GV;l&I$t+11=MC|Um7vDNNG1p|_S9$6Eu-6qHxI7km2G+~963hP z*~Q{nhoA@fnaNH#c9kezR;D%v!jUS|blsMQm0M=;j>q*AD)VG!ot`G%`I#PUvd|hF z=^h2#b(J6jnGyrquM{>DjZHeTZIdZ?nipE8*U}=-Z6%zjR4>`d$&7?FU*j9wXqgl2 zdBAB0otk8Pwr=Mn!S*$SBSYH<*NhZ0=^F`MWH`o}s_xMSZcxA`#|J{6!hLCy>?ZwU zMnxnnG`lsk?BD>hOIe-^#>`7#BVX~LO!fxRY%gr8`?&=AIdq_HtNZcfK95!wp2e9; zFXwyOvT()@Z)5A!7eB>F%y+Amo$m|VR!$o8H8C6#kxej>MyGa}fiUh;1~t#x7FIVH zuh@l#+pwF`=&+-&-2)R9mW7{$%@VK}^!R4cGscW5ykATfPMYg2&P3KKxrp(gE}AT2 z6msOfID!=sko;n_X2tqSTuGGLt(_<^t5zt?o41chku*YIbaPC~)d>^4nbxB+^5!qw zx^SC!nVFKhE5zGWeGL>-|xHFa*5#atF|QG745m;3vQqkA|eGe&ZPU0Rap zj>0RoiF8T!POYXrOhcY8lL-rXw=~JlZw-WvhXI?9nyl6Ws6;mFvauC)m0Mh*0d#J9 zo9FwNG}uf>M%N&)*0Q<_g95o|#O#>1KWZgWQ#K)L5>f|n^HS&J#jTUGX!Dbak${bJ z%yJ$IkFPUrRI^mX9coEuv@nin7<-S$#iVg~-C7QvSYD>2u^g>c;R`VeRGOvAAL=y0 zIk(Q@jTDUG<%$jKhO8gDRZDhODx4uSb5uBaBCCbbKjWvB0YjREDVZG)3TmgD2c7EU zFjMjHNe-+MHe}xq1l7UJL>!~wl$2{c0~ZI4=Xw*!b03quyUnUSaZOoMEOyk(do*Et zBg9_v`P(yT=Z)=3M{fP3VYhAkPQp?>MHyxc{DgB*U3&Df?A(DLR@4TutW&{0ChF@| zw&p#$U#rw7QB#axYM&2lzeW(rq_bzD1X=z#&%Zy_sv=fkP2wz>xH2Nh>?6Dioz@~# zw}i_sxovnDE|{4#qWTx3j9kv)hO0M@4zAfga`~opSH(=SJmS&3>_K*%tEg@zX01~r zgPftQ5?9^lxte$1>4-d6=J`W|A=NI+NGFoo?~6tsEt@4l)TGhBoV(wq8f# zwK6!=Ua)aS!A2o`R>mp@lT2?MIO9y2@2%(dRRQl`tou?b`Zdx{H02s^)}D;BMFoNHzx+kyXfPzRH%gjuV4D+J zJrVpZMN@ zbySvw8nkyedgX5`dvC%&=HF*c5MPDf>8FK+D8A=KwO9-K*0kC8wFp&{vA4U$*EqVC zoY4duPQz!0+N`$|o77C-*y};djdMId!$bW{JBZ2lH+qLpSK!L~SZTx_Xc@Qa?iFRL zE;`j!QaUM9Qp4y+jVu?X$JSFMi!7u3V^dw`RXsxC`?u7KORRLtj@sG>b~P4*6~3Vk zJP-@0)K`Ay%9jLVRYk9mzs$3Fwz6I zedt2pv~ZQ#8+RYCx_rrPD6b(iEO z_av=+;H6406A#Ko*0CE&BI(7(M`C2+5g!S65=UqYN!0JEQJjsMhA1o=EpF#TZ%o@J z&+Z*EhcM0J8IK$zEavakFuILjJ8G2jwWd4ivAA2&Q$Jqnh)MCSZ>taN4LcrW=1;VR zZbpZ6i9Wp6=9E72&EA^^%1(!mxu@}+f-Fkxhd8aQFMC!)M3#u2tkc(g1~SiQGsRfU zHq(yXer7b6aU=VHcJB9edFh}&TNyt8lJ_4Sbf6xs3B^Pm*I(yPx<)`$yeV;tzxWw6>2kC zg)Uq7+!s+Bn5(1qq;CQv`?(OOtWatsI=ptC1DT^{!pARJ`4pJr;gkkg3Q!_ z=^ERje5R7^rfr74vYpPQD>=Q=(D&~H8_EM$xId4Td{f2noU{C#70WMNvB=M63~X#o zR?7oxI3Y4H+Q4B2=Nuv4PP3EaZb5X78w{oLg(pzOP={n^O5wdeQhqXR>su{l9!_&&6a=pX{)=Ixt!( z@eSX|bg5qDXz)dq)}^(o>fDWjb+ff-oPR zg;m|^ZKLZ4F6hQnZLx(93~@kNcKns;1sDKucr(JP+*Z2!3;?6S?EB;zp!)_qCmCBrRu9h3- zK!;;JIs?>5CYWclcSJfeD~89^-av|8BfAEo7yaHgUokD|1xr0RJ~y$pZaTKd^cM+y zzrD)obarf;ScvEIqay=>xz1re=p;mNsAH5J9qGWrnrbM8G708;iaORAqkY{NR#Qt_ zd>F+hHJz&LLM8D8W$lOdG$hd*Pt9~7PEI$mHQ0Aw=5NED2zWKsXwKI1Ni$@_qE?<^pkaM}R#wN* zk}%X1k+q5u&+d6&LqFTAWOCS}4U5@3tU>k06kkbM<+OURDHrEJzRI%9(S?) ztTuTLwjIHdUnX*h$&K|gdqJhK%3e*J=(qLoABo;JmTy5p!yhohJx zP&d(L1Se9mZ0Ll{Czah}5MvYqS?7iZb}@S!Uz3c_zEA$YwD*(|rdYkc8EQG((Z-rh z=+^8VHREHo$_xZdM~Nn=Sdn%V`oputk&trC{0V71VupdsPG~

wYPRV$C+|qGO?M zXBeS385L#JTIP^B6k;0>u1bNdUu>?jik`g& z#as=^e^{mKUFZR11`Uu`Hz{L1dl!2T64t3gqWX?}mq0&wk_8fIX?ZUf&s>3p#({}VG%!sCCE>WQQ&^MtO z(j?(ZjJ8o#LklqLLOKWUbT&tf!%yOUtl_dF^c(MbIHnvF`P7Il6d`9_>;8)Z5Ai_A zir$4cR+@b4Mf&K>$QqTKrL@acm~M`2YUdp!72O(fPEMcSbKFbqizbCe%Ix-Lw`Xt9 zGlW8X>t$1`@I54fKrdxkh=`mOs{8h6LsO)?Fk@d*K`+)hM-)1?V50YPWIS z4isR*#C;$kg{)UxC*z!>SOMeTT?T9P-8a$$NM2ae{y{kuE8uJ8|4s#RImpPB^>-i` zY(}LnVTFf!wkwNS(22rm(UW6{Wt|G8SA+T@#flUA#uVpKTC64gr#NCBA(!I`p)!3r zc3zndc?SKIQJX_OG-Zy)+Ap4{aW9%@uM*pj3!3YsN{$J-FD0^FfTNIq#zC5u&KMs( zx$H1wmWvGOBL!v8Ni#QvQYm!MAW-KaSk1ovYx0b`pldVWx8 zP@$$e?sDSzmre!uPOhxMrlUS%t%iBq`d9Un zk0(?Lt!X)(RN565IQ{%RiRoqqszWi%VkFp7aQXBMZ#S<9~tSjm! z3(aJp1iXM4P-u2x5Rq&TOTd~JB==BRQfHZ(%)a`y#X3qlI!L3huc&H$_BNbFHRNq6 zn*wf{2(L=!nQ7mCqolSfmm)(B%*34;-(?C#TpH(1=u$0AGmAVBhf`E@9F>_xrt9p{ z4AZr|n**xI=X`Zl8f)Si?5tkrQ%Nx!=LGcJEQ;d*n{m!L#*{;f zM=w-7Z;Z7&yD*+<*%=pyJ^rYIt^t1vy1!{Z_>dV|yLQ9uD>o&BlTBv5gcDj6mN4ht z@*$G*P(^CZ{mgubknTp8^tl0i$ol7qz+{9MQqo?ukeN4j=5j`*F^a_P{jU)543x@)H z%42MHpqy;ca#bsU%*rXAtK%8wM+>V72f%ZdtZbq%3q}HOW-99YcC0$xZ+lJBNl46_ z*i3Y_&I}6(svXyWGGoQ{F{>ZVR4sIaxo$}$3HP)mM_XDtsarx637V;~Y6%*}>sH?g z%(8BrAqH>noQ`FemXCnU7-5Q!PFdh*qkmkTh?fM<#az2>Xw&FmGF(FvF%13~(@Q?`{LI)&lO+jY)_?%%PvX&M!RZG>rCi_E5ry;++uQaF4GYyK6qEiCt5wl>zxl;ba-STXjT`liNsTUGpf+5Vy*LqrtE z6h)EF%6;4?y*z*w@|GGMcM5C@xqYz7?wE8ZI%{P1rSi_Ux#-7h&|HbS;ufSMlZV+P z8-bZi)Ynq2I!2Iz6i_k|+k1>uc3V^ZqOFE~lPBILcqn5~PSa)(kPnfTq z5lAlXkq#lX8%>z#>^I%kTS}N9?p{ouYiv`Bsc(+E=tIq?g$kl3b41%b_1JecBqRG* zVxcnrf2hLNIr2Ei(cI(|l`7oblsR}Vdu#A{maKCxXCjHf`r@M)&h{jeHD-Tlv-T7Z z&#N8A(P5^+1zHWZunwaj2TV{8iczI^Ko@!lhi{c`AQ|+BuEXky%}LV9iRvz61f7=g z5avqshGss<+!xyA`p8!^U(LgFj8mTixMVBgEJRzGf3VCZxoEug0Az`Z#N8P()o2$( zKQfokLvzv|-b`cX6ZJ|jZr!uS(uNedDtlv%R-qq*8I_IH0+kCUxCp<-p-XKcGF zWsj^RT_$H_4d_-&A1Y~`ru{$FObiI!A(&ehXgv|NhVBui)$;7^=4VYS>9ASJ=55Hi zPXad!vNjRHhL{|-lmSX~7nDSfPM8H=`ON=znV2S$$*o^7Hls)v96@upikN}eh}K&x zeceu83~Vj^fE})`j(y{qRA8NDA2U?G{N1*+SIg}7xv}uwS zbsMslRQ3vVU9&+!s1|0(=3XlS{P2=GC3p<#USk%8qw9$7C7|+7GSM zwC&P?4QpKYB}1I*VC#-~Qff8O2z*{gGAt$L#m(19BUbH-O>!#QyU>ZNZ^<{E46$`f zPDCVw`^RZUeXGiJ3+<(-Zu2dFaM#9X_cN{zcAIESjw*(k=4~=BaI?3u*rZkF0B&DX z5C;Rs!l^)k>p_>=PbqV-Nb?TQA4p&0vvYeT*8zWk#9O~%?d3yTH{(byAb#Y0Fx<<7 z4J}`>SYP8zPF*F3+(~#HPO=1=Vl@Yy+7S6hASRq~&fZb3PBzjFfw{1Us-q8*owCAVER+6$q~dT&4Qu04OmYQR zbUtM=hLpNLx|!&WZX{=fRHhm(%nD<98H|%UJfcubKh>!jlGrEd`CuZQL%GvlXI|knM7C1X9)rF%>l?b8SceXiX|} zbio-EW<>X47Y(`+`Tx_T2xHD_p1KdbWYY%uyxX*SeNo)(Gn=*A&+g@c6c^4+gsFuqy}^V-ZE$S*c-_cm(U5$B62#+| zpCqSW`x;34ro%uz-Kd)*4Kq7*o$SpmV{Tk+<`wH>nb=fgp6;~+>b4Z-;K6>?E2Nhv zzNXnHx@XSpPDiAG!mhX#BAM)mX)=37mQ%M)y(#QK&O9xFocF*p za=P}?{uwb|wnZs+BHNisg0A$)Wzavp`lKQ&upd;H(iOU(e|&Rh#4xig?lKLihnb5( zGG_(|$(fdc;H{^qZns3V>U}1dH})o*o>~>NEiSRubY|R2*0WS}Mm&XB);SVJSp8$$ zpqRFG(8riB<@Z+tJagw-$)@gUm+ZKkFDuL!V6KbJA7D4Osb(zJH9+}X^3O%e%s)K$ zVRUBJ)%GW1m=yaHRfE|`Hg9nuO80kpntKSuD5axJe~9rAF{bQjUOoB=G-eVFTDh}u z8Um*STj6UL(gbmVt^fC&2kP%Dsw=~)u8?!GbsKg-hC5j8bQF;qne8u}e>a8KzI5em z$UHHPj=GkN#rW?l_!bS0<=OYi>7cWS&`TJ&I?WcsI*ZKA=xY6LJCj_V(J)5=&CV4A?I&on zlyrSKh-f`ajGUD(Mjoaa(#~CM5;0d+*Nm=MWS3dm_+x&y#$(l!=$&gJX1wx=n9GH9 zQF-jm#y^nJGGi+qjc#D+fe4_I(b5F{jI*sG8^7^t9dZt439*l^^)-lOvSIS05OeNf z2Z?l!Il421?PaTIMUPg;Rkw)V8WA~efZ((-SC<7MVkpViVu6_Y79!cKgBJU+Z;Y1g zz`b}o*~x5&&^OxvcbRThbnjRTyF;ZK>osj-LC+OCLt3ux!aoxB{S8|0i8+TgAlY|S zECsqdbFwfZR_0ilh&3M8gqc6chTKDT6Lj^djCFKh%3zZ{R{L`6>{x3!v^$2BN`g#h zwN5HcNMjNvaHEIFTs7x#m0Z?rF4kd~I$LV`ThU=;wy2gom1~V)gA<3(PNnEwJW5(DJPn>=2@+ZB)UG^aHDWUb{{=e3Zh9`Hfl4f0ata zu*)4KIcte*tE#XPwt2vKo93W-mfQ3$F4&aZn2yanGOg4(8fPc5ec71XiyYift83yB zABe@%7wg6bvcH&NYyDu%$qt9lYnF{nl&Pk@T$$CNFq=>4Og0lar?5&>6&{2kLtlN% zi-&v>_!mB$#ul^p=aRI!=UM|nEMc8!yw~g@*RCEK8Qn0v85fsq-|e4YOe;;UF>PKo z=6c5zN&D8l7!!k{lH-YAJLLC*iFu^>S z|F(&G=RQaZ5+^&i3f~JKA*mAjIB34)>VT{TSt29*eA}WI&IPlHrzW)7?8U1qynJ&J zhb=Y{P1%Rz*7t#y;#=?CIN8nL6AF0r%M#pl%1dV^o@~lW{OCxaWoiC88zv8I_TbAi zA>T~aa8e+A-V|w@F3=Zc{&`eBYWIW%OUU_N%=?O#%5^6lKmk4eJ^N=iUkY>fnNJc= zJ#t{qmna3NpEAPY^K*d&D#$)O=qlK-@ct=a{5l7xavnf3h(~IfEqOSKN6_Z1JR+y{ z#z4P!Oipnn4R5~ce)v&Gzk6!9j~7(7cYw)Zo?MEN$8pQ(TNhnbu1`{{t$61gdPeff z%z<9vhus(GyzZ9N>>bjaE3L$iTOqgUsy=V2Ds(NT61iZ(Bw{+HbOoKWaxTV!V2){M z=7ogNqkktMl?+YH%qh$srKLR~mdR${L+X>Zo6rSFKGAge{;n{N^a0YiZAUs%Q|957 zu_jI)h4^SzcI-7bG!TI3D%Z4_zEGR2q5BoPC&$=DaWgiFDkJn92bEHN_m~^vcaI&Q zvakUs;;EVI()cy$Tsfs4_0KE&i!rzcG5T3n)MvdCuFxg^$GPa-$i=f3;G2QgX6&Af zvUTs=k5>?-aq*2RZYnXfVW&o;oM1BH54D!YuT)w7={yFY(;t13;Qg}zwr<5-o~PJ^^n7OYl-X{;5Ez9{rl2mNv|PAI9k&%{xzcU`N- zWui&fxV#FbuK{EHE=guIc(NR=M*4XG1R1lmFT|65&c>_?)Gl}KFy>;K zVQh%`WzEPGg6Q*I3jB`Wy;OjN&oi|MM$;+4(EKc z51%-qTv!r$|Jks^n)|IWKuud-r^1w$?+ z&fX>uvtqDWqu@IGTv?HK;O@p`^AgJ%P&6pHWtzI{+!pcyju{=!x@626n+d59E#Jys zFK{6W4a~mV>88q-6wyfLpLJk?g+uCeUDhky(tl#;Nxm7e)5Na*Z4hjvjvqPG3v^tz zu0W@D)|FEnJa@63yk?QH4070ktMo8UttRLjI^ZVJlkeipx*rzMk%$#9eDbU*745;U zT*XKbzd5O0j48oPbRXtnz}K2`A(UhMiw}$~pjN z4ji&j$H}=Z-Rl16bkODlLb%^S)m&dvgOMzgI@?`3hR;a(LVC zWx?U?{1N6Wy6f=fqzowADlcK_cL_TO(D z^u>aKqm%j^#yC-7Onuc+c;u_8!Xr3Rf2EIMgwMgsT#tuYFGzDyuPNB&rKz}CZJ(*3 zI1zRB32Rh^baXn3HS`lE4)qNVzO=hhXiSu>X3-3blTv>w%r{2WM3Qtz>&~-6$d+5Z2{VEy80Y7s+MZJTQFdmu$p~hS5}TiF1)A(L-4~$FxVj7a z9ou_4nl%?xalR<>NlHc%bnqJR>mD!a?2H$&36cpTcj2S!#yeIW;XH+ZCJjV1M3egqKA$O zyuavUS;Nk`*<1$Bg<`43rZX<1Is|Xa@hAlyWuLG6Y|iCFzrc^|D7pkzPaTq;aJL3J z)+U0CWZ>FT*H+80(8a1qR#>U<*1WtHU&r%&13Fd1R&<@uP7u`A#paE<`&37Mn;m(l zk|st6bEbAF>%`!hLM*5oxs=45^UvntG~Fm+l=3_y8XN*uvm8?;?F?R*WX!Tphj%?n z^obs=lEe#(rHuBwrpw%iGq8n%>z=%*%8f%`x6b>FTX0?#D%-6^7~+*_^xxd|RJHH8 z3uN7g+zK_F`(A_1N?R++Y%<%B6zkC^VP9e`l*TX{p)nvmL|@FDcwshb=mLk0Y%X+~ ztv8})Xa0oawNQe73WX(t%?2Y$kgPm#SuPXp uO2`3zr42(2Bl%hwFM)FOogk`U4Ohyt$Z&kd{}5|9sU!mvUZn9I{eJ))Ze}h3 literal 0 HcmV?d00001 diff --git a/gold/po/es.po b/gold/po/es.po index 30e87cc..6825c3e 100644 --- a/gold/po/es.po +++ b/gold/po/es.po @@ -1,29 +1,30 @@ -# Mensajes en español para gold 2.20.1. -# Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc. +# Mensajes en español para gold 2.20.90. +# Copyright (C) 2008, 2009, 2010, 2011 Free Software Foundation, Inc. # This file is distributed under the same license as the binutils package. -# Cristian Othón Martínez Vera , 2008, 2009, 2010. +# Cristian Othón Martínez Vera , 2008, 2009, 2010, 2011. # msgid "" msgstr "" -"Project-Id-Version: gold 2.20.1\n" +"Project-Id-Version: gold 2.20.90\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" "POT-Creation-Date: 2010-03-03 15:08+0100\n" -"PO-Revision-Date: 2010-04-27 17:31-0500\n" -"Last-Translator: Cristian Othón Martínez Vera \n" +"PO-Revision-Date: 2011-08-24 11:49-0500\n" +"Last-Translator: Cristian Othón Martínez Vera \n" "Language-Team: Spanish \n" +"Language: es\n" "MIME-Version: 1.0\n" -"Content-Type: text/plain; charset=ISO-8859-1\n" +"Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" #: archive.cc:119 #, c-format msgid "%s: no archive symbol table (run ranlib)" -msgstr "%s: no existe la tabla de símbolos de archivo (ejecute ranlib)" +msgstr "%s: no existe la tabla de símbolos de archivo (ejecute ranlib)" #: archive.cc:204 #, c-format msgid "%s: bad archive symbol table names" -msgstr "%s: nombres de tabla de símbolos de archivo erróneos" +msgstr "%s: nombres de tabla de símbolos de archivo erróneos" #: archive.cc:236 #, c-format @@ -33,7 +34,7 @@ msgstr "%s: encabezado de archivo mal formado en %zu" #: archive.cc:256 #, c-format msgid "%s: malformed archive header size at %zu" -msgstr "%s: tamaño de encabezado de archivo mal formado en %zu" +msgstr "%s: tamaño de encabezado de archivo mal formado en %zu" #: archive.cc:267 #, c-format @@ -43,12 +44,12 @@ msgstr "%s: nombre de encabezado de archivo mal formado en %zu" #: archive.cc:297 #, c-format msgid "%s: bad extended name index at %zu" -msgstr "%s: índice de nombre extendido erróneo en %zu" +msgstr "%s: índice de nombre extendido erróneo en %zu" #: archive.cc:307 #, c-format msgid "%s: bad extended name entry at header %zu" -msgstr "%s: entrada de nombre extendida errónea en el encabezado %zu" +msgstr "%s: entrada de nombre extendida errónea en el encabezado %zu" #: archive.cc:404 #, c-format @@ -83,11 +84,11 @@ msgstr "** PLT" #: x86_64.cc:1265 #, c-format msgid "%s: unsupported reloc %u against local symbol" -msgstr "%s: no se admite la reubicación %u contra el símbolo local" +msgstr "%s: no se admite la reubicación %u contra el símbolo local" #: arm.cc:1404 powerpc.cc:1105 sparc.cc:1592 x86_64.cc:992 msgid "requires unsupported dynamic reloc; recompile with -fPIC" -msgstr "se requiere una reubicación dinámica no admitida; recompile con -fPIC" +msgstr "se requiere una reubicación dinámica no admitida; recompile con -fPIC" #. These are relocations which should only be seen by the #. dynamic linker, and should never be seen here. @@ -96,34 +97,34 @@ msgstr "se requiere una reubicaci #: x86_64.cc:1453 #, c-format msgid "%s: unexpected reloc %u in object file" -msgstr "%s: reubicación %u inesperada en el fichero objeto" +msgstr "%s: reubicación %u inesperada en el fichero objeto" #: arm.cc:1538 i386.cc:1171 powerpc.cc:1242 sparc.cc:1896 x86_64.cc:1279 #: x86_64.cc:1571 #, c-format msgid "%s: unsupported reloc %u against global symbol %s" -msgstr "%s: no se admite la reubicación %u contra el símbolo global %s" +msgstr "%s: no se admite la reubicación %u contra el símbolo global %s" #: arm.cc:1804 i386.cc:1542 #, c-format msgid "%s: unsupported RELA reloc section" -msgstr "%s: no se admite la sección de reubicación RELA" +msgstr "%s: no se admite la sección de reubicación RELA" #: arm.cc:2047 msgid "relocation R_ARM_MOVW_ABS_NC cannot be used when makinga shared object; recompile with -fPIC" -msgstr "no se puede usar la reubicación R_ARM_MOVW_ABS_NC cuando se hace un objeto compartido; recompile con -fPIC" +msgstr "no se puede usar la reubicación R_ARM_MOVW_ABS_NC cuando se hace un objeto compartido; recompile con -fPIC" #: arm.cc:2056 msgid "relocation R_ARM_MOVT_ABS cannot be used when makinga shared object; recompile with -fPIC" -msgstr "no se puede usar la reubicación R_ARM_MOVT_ABS cundo se hace un objeto compartido; recompile con -fPIC" +msgstr "no se puede usar la reubicación R_ARM_MOVT_ABS cundo se hace un objeto compartido; recompile con -fPIC" #: arm.cc:2067 msgid "relocation R_ARM_THM_MOVW_ABS_NC cannot be used whenmaking a shared object; recompile with -fPIC" -msgstr "no se puede usar la reubicación R_ARM_THM_MOVW_ABS_NC cuando se hace un objeto compartido; recompile con -fPIC" +msgstr "no se puede usar la reubicación R_ARM_THM_MOVW_ABS_NC cuando se hace un objeto compartido; recompile con -fPIC" #: arm.cc:2077 msgid "relocation R_ARM_THM_MOVT_ABS cannot be used whenmaking a shared object; recompile with -fPIC" -msgstr "no se puede usar la reubicación R_ARM_THM_MOVT_ABS cuando se hace un objeto compartido; recompile con -fPIC" +msgstr "no se puede usar la reubicación R_ARM_THM_MOVT_ABS cuando se hace un objeto compartido; recompile con -fPIC" #: arm.cc:2141 msgid "cannot find origin of R_ARM_BASE_PREL" @@ -137,29 +138,29 @@ msgstr "no se puede encontrar el origen de R_ARM_BASE_ABS" #: x86_64.cc:1935 x86_64.cc:2518 #, c-format msgid "unexpected reloc %u in object file" -msgstr "reubicación %u inesperada en el fichero objeto" +msgstr "reubicación %u inesperada en el fichero objeto" #: arm.cc:2236 i386.cc:1852 i386.cc:1931 i386.cc:1983 i386.cc:2014 #: i386.cc:2076 powerpc.cc:1804 sparc.cc:2717 sparc.cc:2900 sparc.cc:2961 #: sparc.cc:3068 x86_64.cc:1956 x86_64.cc:2039 x86_64.cc:2094 x86_64.cc:2119 #, c-format msgid "unsupported reloc %u" -msgstr "no se admite la reubicación %u" +msgstr "no se admite la reubicación %u" #: arm.cc:2248 #, c-format msgid "relocation overflow in relocation %u" -msgstr "desbordamiento de reubicación en la reubicación %u" +msgstr "desbordamiento de reubicación en la reubicación %u" #: arm.cc:2256 #, c-format msgid "unexpected opcode while processing relocation %u" -msgstr "código de operación inesperado al procesar la reubicación %u" +msgstr "código de operación inesperado al procesar la reubicación %u" #: arm.cc:2359 i386.cc:2535 #, c-format msgid "unsupported reloc %u in object file" -msgstr "no se admite la reubicación %u en el fichero objeto" +msgstr "no se admite la reubicación %u en el fichero objeto" #: binary.cc:129 #, c-format @@ -168,17 +169,17 @@ msgstr "no se puede abrir %s: %s" #: compressed_output.cc:128 msgid "not compressing section data: zlib error" -msgstr "no se comprime la sección de datos: erro de zlib" +msgstr "no se comprime la sección de datos: erro de zlib" #: cref.cc:244 #, c-format msgid "cannot open symbol count file %s: %s" -msgstr "no se puede abrir el fichero de cuenta de símbolos %s: %s" +msgstr "no se puede abrir el fichero de cuenta de símbolos %s: %s" #: descriptors.cc:116 #, c-format msgid "file %s was removed during the link" -msgstr "se borró el fichero %s durante el enlace" +msgstr "se borró el fichero %s durante el enlace" #: descriptors.cc:169 msgid "out of file descriptors and couldn't close any" @@ -196,27 +197,27 @@ msgstr "%s: no se puede leer el directorio: %s" #: dwarf_reader.cc:53 dwarf_reader.cc:84 msgid "Unusually large LEB128 decoded, debug information may be corrupted" -msgstr "Se decodificó un LEB128 inusualmente grande, la información de depuración puede estar corrupta" +msgstr "Se decodificó un LEB128 inusualmente grande, la información de depuración puede estar corrupta" #: dynobj.cc:164 #, c-format msgid "unexpected duplicate type %u section: %u, %u" -msgstr "duplicado inesperado tipo %u sección: %u, %u" +msgstr "duplicado inesperado tipo %u sección: %u, %u" #: dynobj.cc:200 #, c-format msgid "unexpected link in section %u header: %u != %u" -msgstr "enlace inesperado en la sección %u encabezado: %u != %u" +msgstr "enlace inesperado en la sección %u encabezado: %u != %u" #: dynobj.cc:236 #, c-format msgid "DYNAMIC section %u link out of range: %u" -msgstr "enlace de la sección DYNAMIC %u fuera de rango: %u" +msgstr "enlace de la sección DYNAMIC %u fuera de rango: %u" #: dynobj.cc:244 #, c-format msgid "DYNAMIC section %u link %u is not a strtab" -msgstr "sección DYNAMIC %u enlace %u no es un strtab" +msgstr "sección DYNAMIC %u enlace %u no es un strtab" #: dynobj.cc:273 #, c-format @@ -230,37 +231,37 @@ msgstr "valor de DT_NEEDED fuera de rango: %lld >= %lld" #: dynobj.cc:298 msgid "missing DT_NULL in dynamic segment" -msgstr "falta DT_NULL en el segmento dinámico" +msgstr "falta DT_NULL en el segmento dinámico" #: dynobj.cc:344 #, c-format msgid "invalid dynamic symbol table name index: %u" -msgstr "índice de nombre de tabla de símbolos dinámicos inválido: %u" +msgstr "índice de nombre de tabla de símbolos dinámicos inválido: %u" #: dynobj.cc:351 #, c-format msgid "dynamic symbol table name section has wrong type: %u" -msgstr "la sección de nombre de tabla de símbolos dinámicos tiene un tipo erróneo: %u" +msgstr "la sección de nombre de tabla de símbolos dinámicos tiene un tipo erróneo: %u" #: dynobj.cc:438 object.cc:463 object.cc:1106 #, c-format msgid "bad section name offset for section %u: %lu" -msgstr "desplazamiento de nombre de sección erróneo para la sección %u: %lu" +msgstr "desplazamiento de nombre de sección erróneo para la sección %u: %lu" #: dynobj.cc:468 #, c-format msgid "duplicate definition for version %u" -msgstr "definición duplicada para la versión %u" +msgstr "definición duplicada para la versión %u" #: dynobj.cc:497 #, c-format msgid "unexpected verdef version %u" -msgstr "versión verdef %u inesperada" +msgstr "versión verdef %u inesperada" #: dynobj.cc:513 #, c-format msgid "verdef vd_cnt field too small: %u" -msgstr "campo vd_cnt verdef demasiado pequeño: %u" +msgstr "campo vd_cnt verdef demasiado pequeño: %u" #: dynobj.cc:521 #, c-format @@ -280,7 +281,7 @@ msgstr "campo vd_next verdef fuera de rango: %u" #: dynobj.cc:576 #, c-format msgid "unexpected verneed version %u" -msgstr "versión verneed %u inesperada" +msgstr "versión verneed %u inesperada" #: dynobj.cc:585 #, c-format @@ -304,12 +305,12 @@ msgstr "campo vn_next verneed fuera de rango: %u" #: dynobj.cc:670 msgid "size of dynamic symbols is not multiple of symbol size" -msgstr "el tamaño de los símbolos dinámicos no es un múltiplo del tamaño de símbolo" +msgstr "el tamaño de los símbolos dinámicos no es un múltiplo del tamaño de símbolo" #: dynobj.cc:1435 #, c-format msgid "symbol %s has undefined version %s" -msgstr "el símbolo %s tiene la versión sin definir %s" +msgstr "el símbolo %s tiene la versión sin definir %s" #: ehframe.h:82 msgid "** eh_frame_hdr" @@ -352,7 +353,7 @@ msgstr "%s: %s: error: referencia a '%s' sin definir\n" #: errors.cc:172 #, c-format msgid "%s: %s: error: undefined reference to '%s', version '%s'\n" -msgstr "%s: %s: error: referencia a '%s' sin definir, versión '%s'\n" +msgstr "%s: %s: error: referencia a '%s' sin definir, versión '%s'\n" #: errors.cc:182 #, c-format @@ -362,11 +363,11 @@ msgstr "%s: " #: expression.cc:172 #, c-format msgid "undefined symbol '%s' referenced in expression" -msgstr "se hace referencia al símbolo sin definir '%s' en la expresión" +msgstr "se hace referencia al símbolo sin definir '%s' en la expresión" #: expression.cc:209 msgid "invalid reference to dot symbol outside of SECTIONS clause" -msgstr "referencia inválida al símbolo dot fuera de la cláusula SECTIONS" +msgstr "referencia inválida al símbolo dot fuera de la cláusula SECTIONS" #. Handle unary operators. We use a preprocessor macro as a hack to #. capture the C operator. @@ -392,15 +393,15 @@ msgstr " por cero" #: expression.cc:575 msgid "max applied to section relative value" -msgstr "se aplicó max al valor relativo de la sección" +msgstr "se aplicó max al valor relativo de la sección" #: expression.cc:610 msgid "min applied to section relative value" -msgstr "se aplicó min al valor relativo de la sección" +msgstr "se aplicó min al valor relativo de la sección" #: expression.cc:740 msgid "aligning to section relative value" -msgstr "se alinea al valor relativo de la sección" +msgstr "se alinea al valor relativo de la sección" #: expression.cc:895 #, c-format @@ -422,12 +423,12 @@ msgstr "no se admite LENGTH" #: fileread.cc:65 #, c-format msgid "munmap failed: %s" -msgstr "falló munmap: %s" +msgstr "falló munmap: %s" #: fileread.cc:129 #, c-format msgid "%s: fstat failed: %s" -msgstr "%s: falló fstat: %s" +msgstr "%s: falló fstat: %s" #: fileread.cc:169 #, c-format @@ -437,37 +438,37 @@ msgstr "no se puede reabrir el fichero %s" #: fileread.cc:302 #, c-format msgid "%s: pread failed: %s" -msgstr "%s: falló pread: %s" +msgstr "%s: falló pread: %s" #: fileread.cc:308 #, c-format msgid "%s: file too short: read only %lld of %lld bytes at %lld" -msgstr "%s: el fichero era demasiado pequeño: sólo se leyeron %lld de %lld bytes en %lld" +msgstr "%s: el fichero era demasiado pequeño: sólo se leyeron %lld de %lld bytes en %lld" #: fileread.cc:372 #, c-format msgid "%s: attempt to map %lld bytes at offset %lld exceeds size of file; the file may be corrupt" -msgstr "%s: al intentar mapear %lld bytes en el desplazamiento %lld se excedió el tamaño del fichero; el fichero tal vez se corrompió" +msgstr "%s: al intentar mapear %lld bytes en el desplazamiento %lld se excedió el tamaño del fichero; el fichero tal vez se corrompió" #: fileread.cc:402 #, c-format msgid "%s: mmap offset %lld size %lld failed: %s" -msgstr "%s: falló el desplazamiento mmap %lld tamaño %lld: %s" +msgstr "%s: falló el desplazamiento mmap %lld tamaño %lld: %s" #: fileread.cc:548 #, c-format msgid "%s: lseek failed: %s" -msgstr "%s: falló lseek: %s" +msgstr "%s: falló lseek: %s" #: fileread.cc:554 #, c-format msgid "%s: readv failed: %s" -msgstr "%s: falló readv: %s" +msgstr "%s: falló readv: %s" #: fileread.cc:557 #, c-format msgid "%s: file too short: read only %zd of %zd bytes at %lld" -msgstr "%s: el fichero era demasiado pequeño: sólo se leyeron %zd de %zd bytes en %lld" +msgstr "%s: el fichero era demasiado pequeño: sólo se leyeron %zd de %zd bytes en %lld" #: fileread.cc:706 #, c-format @@ -477,12 +478,12 @@ msgstr "%s: total de bytes mapeados para lectura: %llu\n" #: fileread.cc:708 #, c-format msgid "%s: maximum bytes mapped for read at one time: %llu\n" -msgstr "%s: máximo de bytes mapeados para lectura de una sola vez: %llu\n" +msgstr "%s: máximo de bytes mapeados para lectura de una sola vez: %llu\n" #: fileread.cc:791 #, c-format msgid "%s: stat failed: %s" -msgstr "%s: falló stat: %s" +msgstr "%s: falló stat: %s" #: fileread.cc:849 #, c-format @@ -502,67 +503,67 @@ msgstr "no se puede abrir %s: %s" #: gold-threads.cc:103 #, c-format msgid "pthead_mutextattr_init failed: %s" -msgstr "falló pthread_mutextattr_init: %s" +msgstr "falló pthread_mutextattr_init: %s" #: gold-threads.cc:107 #, c-format msgid "pthread_mutextattr_settype failed: %s" -msgstr "falló pthread_mutextattr_settype: %s" +msgstr "falló pthread_mutextattr_settype: %s" #: gold-threads.cc:112 #, c-format msgid "pthread_mutex_init failed: %s" -msgstr "falló pthread_mutex_init: %s" +msgstr "falló pthread_mutex_init: %s" #: gold-threads.cc:116 #, c-format msgid "pthread_mutexattr_destroy failed: %s" -msgstr "falló pthread_mutexattr_destroy: %s" +msgstr "falló pthread_mutexattr_destroy: %s" #: gold-threads.cc:123 #, c-format msgid "pthread_mutex_destroy failed: %s" -msgstr "falló pthread_mutex_destroy: %s" +msgstr "falló pthread_mutex_destroy: %s" #: gold-threads.cc:131 gold-threads.cc:382 #, c-format msgid "pthread_mutex_lock failed: %s" -msgstr "falló pthread_mutex_lock: %s" +msgstr "falló pthread_mutex_lock: %s" #: gold-threads.cc:139 gold-threads.cc:394 #, c-format msgid "pthread_mutex_unlock failed: %s" -msgstr "falló pthread_mutex_unlock: %s" +msgstr "falló pthread_mutex_unlock: %s" #: gold-threads.cc:220 #, c-format msgid "pthread_cond_init failed: %s" -msgstr "falló pthread_cond_init: %s" +msgstr "falló pthread_cond_init: %s" #: gold-threads.cc:227 #, c-format msgid "pthread_cond_destroy failed: %s" -msgstr "falló pthread_cond_destroy: %s" +msgstr "falló pthread_cond_destroy: %s" #: gold-threads.cc:236 #, c-format msgid "pthread_cond_wait failed: %s" -msgstr "falló pthread_cond_wait: %s" +msgstr "falló pthread_cond_wait: %s" #: gold-threads.cc:244 #, c-format msgid "pthread_cond_signal failed: %s" -msgstr "falló pthread_cond_signal: %s" +msgstr "falló pthread_cond_signal: %s" #: gold-threads.cc:252 #, c-format msgid "pthread_cond_broadcast failed: %s" -msgstr "falló pthread_cond_broadcast: %s" +msgstr "falló pthread_cond_broadcast: %s" #: gold-threads.cc:388 #, c-format msgid "pthread_once failed: %s" -msgstr "falló pthread_once: %s" +msgstr "falló pthread_once: %s" #: gold.cc:91 #, c-format @@ -580,38 +581,38 @@ msgstr "no se puede mezclar -r con --gc-sections o --icf" #: gold.cc:407 #, c-format msgid "cannot mix -static with dynamic object %s" -msgstr "no se puede mezclar -static con el objeto dinámico %s" +msgstr "no se puede mezclar -static con el objeto dinámico %s" #: gold.cc:411 #, c-format msgid "cannot mix -r with dynamic object %s" -msgstr "no se puede mezclar -r con el objeto dinámico %s" +msgstr "no se puede mezclar -r con el objeto dinámico %s" #: gold.cc:415 #, c-format msgid "cannot use non-ELF output format with dynamic object %s" -msgstr "no se puede usar un formato de salida diferente a ELF con el objeto dinámico %s" +msgstr "no se puede usar un formato de salida diferente a ELF con el objeto dinámico %s" #: gold.cc:427 #, c-format msgid "cannot mix split-stack '%s' and non-split-stack '%s' when using -r" -msgstr "no se puede mezclar la división-pila '%s' y la no-división-pila '%s' al usar -r" +msgstr "no se puede mezclar la división-pila '%s' y la no-división-pila '%s' al usar -r" #. FIXME: This needs to specify the location somehow. #: i386.cc:232 i386.cc:1669 sparc.cc:234 sparc.cc:2395 x86_64.cc:237 #: x86_64.cc:1732 msgid "missing expected TLS relocation" -msgstr "falta la reubicación TLS esperada" +msgstr "falta la reubicación TLS esperada" #: i386.cc:944 x86_64.cc:1068 #, c-format msgid "section symbol %u has bad shndx %u" -msgstr "el símbolo de sección %u tiene shndx %u erróneo" +msgstr "el símbolo de sección %u tiene shndx %u erróneo" #: i386.cc:1036 i386.cc:1060 sparc.cc:1777 x86_64.cc:1176 x86_64.cc:1204 #, c-format msgid "local symbol %u has bad shndx %u" -msgstr "el símbolo local %u tiene shndx %u erróneo" +msgstr "el símbolo local %u tiene shndx %u erróneo" #: i386.cc:1991 msgid "both SUN and GNU model TLS relocations" @@ -620,48 +621,48 @@ msgstr "reubicaciones TLS tanto de modelo GNU como SUN" #: i386.cc:2730 x86_64.cc:2719 #, c-format msgid "failed to match split-stack sequence at section %u offset %0zx" -msgstr "falló al coincidir la secuencia dividir-pila en la sección %u desplazamiento %0zx" +msgstr "falló al coincidir la secuencia dividir-pila en la sección %u desplazamiento %0zx" #: icf.cc:616 #, c-format msgid "%s: ICF Converged after %u iteration(s)" -msgstr "%s: Convergió ICF después de %u iteracion(es)" +msgstr "%s: Convergió ICF después de %u iteracion(es)" #: icf.cc:619 #, c-format msgid "%s: ICF stopped after %u iteration(s)" -msgstr "%s: Se detiene ICF después de %u iteracion(es)" +msgstr "%s: Se detiene ICF después de %u iteracion(es)" #: icf.cc:633 #, c-format msgid "Could not find symbol %s to unfold\n" -msgstr "No se puede encontrar el símbolo %s para desincorporar\n" +msgstr "No se puede encontrar el símbolo %s para desincorporar\n" #: incremental.cc:242 #, c-format msgid "the link might take longer: cannot perform incremental link: %s" -msgstr "el enlazado puede tardar más: no se puede realizar el enlazado incremental: %s" +msgstr "el enlazado puede tardar más: no se puede realizar el enlazado incremental: %s" #: incremental.cc:302 msgid "no incremental data from previous build" -msgstr "no se encontraron datos incrementales de la compilación anterior" +msgstr "no se encontraron datos incrementales de la compilación anterior" #: incremental.cc:309 incremental.cc:332 msgid "invalid incremental build data" -msgstr "datos de compilación incremental inválidos" +msgstr "datos de compilación incremental inválidos" #: incremental.cc:321 msgid "different version of incremental build data" -msgstr "versión diferente de datos de compilación incremental" +msgstr "versión diferente de datos de compilación incremental" #: incremental.cc:338 msgid "command line changed" -msgstr "cambió la línea de órdenes" +msgstr "cambió la línea de órdenes" #: incremental.cc:362 #, c-format msgid "unsupported ELF machine number %d" -msgstr "no se admite el número de máquina ELF %d" +msgstr "no se admite el número de máquina ELF %d" #: incremental.cc:387 msgid "output is not an ELF file." @@ -686,12 +687,12 @@ msgstr "no se admite el fichero: 64-bit, little-endian" #: layout.cc:1887 #, c-format msgid "--build-id=uuid failed: could not open /dev/urandom: %s" -msgstr "falló --build-id=uuid: no se puede abrir /dev/urandom: %s" +msgstr "falló --build-id=uuid: no se puede abrir /dev/urandom: %s" #: layout.cc:1894 #, c-format msgid "/dev/urandom: read failed: %s" -msgstr "/dev/urandom: falló la lectura: %s" +msgstr "/dev/urandom: falló la lectura: %s" #: layout.cc:1896 #, c-format @@ -701,7 +702,7 @@ msgstr "/dev/urandom: se esperaban %zu bytes, se obtuvieron %zd bytes" #: layout.cc:1918 #, c-format msgid "--build-id argument '%s' not a valid hex number" -msgstr "el argumento '%s' de --build-id no es un número hexadecimal válido" +msgstr "el argumento '%s' de --build-id no es un número hexadecimal válido" #: layout.cc:1924 #, c-format @@ -729,7 +730,7 @@ msgid "" "Archive member included because of file (symbol)\n" "\n" msgstr "" -"Se incluyó el miembro del archivo debido al fichero (símbolo)\n" +"Se incluyó el miembro del archivo debido al fichero (símbolo)\n" "\n" #: mapfile.cc:159 @@ -739,7 +740,7 @@ msgid "" "Allocating common symbols\n" msgstr "" "\n" -"Se asignan los símbolos comunes\n" +"Se asignan los símbolos comunes\n" #: mapfile.cc:161 #, c-format @@ -747,7 +748,7 @@ msgid "" "Common symbol size file\n" "\n" msgstr "" -"Símbolo común tamaño fichero\n" +"Símbolo común tamaño fichero\n" "\n" #: mapfile.cc:195 @@ -775,16 +776,16 @@ msgstr "" #: merge.cc:455 #, c-format msgid "%s: %s merged constants size: %lu; input: %zu; output: %zu\n" -msgstr "%s: %s constantes mezcladas tamaño: %lu; entrada: %zu; salida: %zu\n" +msgstr "%s: %s constantes mezcladas tamaño: %lu; entrada: %zu; salida: %zu\n" #: merge.cc:478 msgid "mergeable string section length not multiple of character size" -msgstr "la longitud de la sección de cadenas mezclables no es un múltiplo del tamaño de carácter" +msgstr "la longitud de la sección de cadenas mezclables no es un múltiplo del tamaño de carácter" #: merge.cc:494 #, c-format msgid "%s: last entry in mergeable string section '%s' not null terminated" -msgstr "%s: la última entrada en la sección de cadenas mezclables '%s' no está terminada con null" +msgstr "%s: la última entrada en la sección de cadenas mezclables '%s' no está terminada con null" #: merge.cc:613 #, c-format @@ -801,17 +802,17 @@ msgstr "** mezclar cadenas" #: object.cc:75 msgid "missing SHT_SYMTAB_SHNDX section" -msgstr "falta la sección SHT_SYMTAB_SHNDX" +msgstr "falta la sección SHT_SYMTAB_SHNDX" #: object.cc:119 #, c-format msgid "symbol %u out of range for SHT_SYMTAB_SHNDX section" -msgstr "el símbolo %u está fuera de rango para la sección SHT_SYMTAB_SHNDX" +msgstr "el símbolo %u está fuera de rango para la sección SHT_SYMTAB_SHNDX" #: object.cc:126 #, c-format msgid "extended index for symbol %u out of range: %u" -msgstr "el índice extendido para el símbolo %u está fuera de rango: %u" +msgstr "el índice extendido para el símbolo %u está fuera de rango: %u" #: object.cc:148 object.cc:2331 output.cc:4052 #, c-format @@ -821,76 +822,76 @@ msgstr "%s: %s" #: object.cc:190 #, c-format msgid "section name section has wrong type: %u" -msgstr "la sección de nombre de sección tiene tipo erróneo: %u" +msgstr "la sección de nombre de sección tiene tipo erróneo: %u" #: object.cc:546 #, c-format msgid "invalid symbol table name index: %u" -msgstr "índice de nombre de tabla de símbolos erróneo: %u" +msgstr "índice de nombre de tabla de símbolos erróneo: %u" #: object.cc:552 #, c-format msgid "symbol table name section has wrong type: %u" -msgstr "la sección de nombre de tabla de símbolos tiene tipo erróneo: %u" +msgstr "la sección de nombre de tabla de símbolos tiene tipo erróneo: %u" #: object.cc:641 #, c-format msgid "section group %u info %u out of range" -msgstr "la sección grupo %u info %u está fuera de rango" +msgstr "la sección grupo %u info %u está fuera de rango" #: object.cc:660 #, c-format msgid "symbol %u name offset %u out of range" -msgstr "el símbolo %u nombre desplazamiento %u está fuera de rango" +msgstr "el símbolo %u nombre desplazamiento %u está fuera de rango" #: object.cc:678 #, c-format msgid "symbol %u invalid section index %u" -msgstr "el símbolo %u tiene un índice de sección %u inválido" +msgstr "el símbolo %u tiene un índice de sección %u inválido" #: object.cc:723 #, c-format msgid "section %u in section group %u out of range" -msgstr "la sección %u en el grupo de sección %u está fuera de rango" +msgstr "la sección %u en el grupo de sección %u está fuera de rango" #: object.cc:731 #, c-format msgid "invalid section group %u refers to earlier section %u" -msgstr "el grupo de sección %u inválido se refiere a la sección %u anterior" +msgstr "el grupo de sección %u inválido se refiere a la sección %u anterior" #: object.cc:1037 reloc.cc:271 reloc.cc:838 #, c-format msgid "relocation section %u has bad info %u" -msgstr "la sección de reubicación %u tiene información %u errónea" +msgstr "la sección de reubicación %u tiene información %u errónea" #: object.cc:1231 #, c-format msgid "%s: removing unused section from '%s' in file '%s'" -msgstr "%s: se borra la sección sin usar de '%s' en el fichero '%s'" +msgstr "%s: se borra la sección sin usar de '%s' en el fichero '%s'" #: object.cc:1257 #, c-format msgid "%s: ICF folding section '%s' in file '%s'into '%s' in file '%s'" -msgstr "%s: la sección de incorporación ICF '%s' en el fichero '%s' dentro de '%s' en el fichero '%s'" +msgstr "%s: la sección de incorporación ICF '%s' en el fichero '%s' dentro de '%s' en el fichero '%s'" #: object.cc:1454 msgid "size of symbols is not multiple of symbol size" -msgstr "el tamaño de los símbolos no es un múltiplo del tamaño de símbolo" +msgstr "el tamaño de los símbolos no es un múltiplo del tamaño de símbolo" #: object.cc:1563 #, c-format msgid "local symbol %u section name out of range: %u >= %u" -msgstr "el nombre de sección del símbolo local %u está fuera de rango: %u >= %u" +msgstr "el nombre de sección del símbolo local %u está fuera de rango: %u >= %u" #: object.cc:1652 #, c-format msgid "unknown section index %u for local symbol %u" -msgstr "índice de sección %u desconocido para el símbolo local %u" +msgstr "índice de sección %u desconocido para el símbolo local %u" #: object.cc:1661 #, c-format msgid "local symbol %u section index %u out of range" -msgstr "el símbolo local %u índice de sección %u está fuera de rango" +msgstr "el símbolo local %u índice de sección %u está fuera de rango" #: object.cc:2169 #, c-format @@ -900,7 +901,7 @@ msgstr "no se admite %s pero se requiere para %s en %s" #: object.cc:2273 #, c-format msgid "%s: unsupported ELF machine number %d" -msgstr "%s: no se admite el número de máquina ELF %d" +msgstr "%s: no se admite el número de máquina ELF %d" #: object.cc:2283 #, c-format @@ -910,22 +911,22 @@ msgstr "%s: objetivo incompatible" #: object.cc:2347 plugin.cc:1019 #, c-format msgid "%s: not configured to support 32-bit big-endian object" -msgstr "%s: no se configuró para admitir objetos big-endian de 32-bit" +msgstr "%s: no se configuró para admitir objetos big-endian de 32-bit" #: object.cc:2363 plugin.cc:1028 #, c-format msgid "%s: not configured to support 32-bit little-endian object" -msgstr "%s: no se configuró para admitir objetos little-endian de 32-bit" +msgstr "%s: no se configuró para admitir objetos little-endian de 32-bit" #: object.cc:2382 plugin.cc:1040 #, c-format msgid "%s: not configured to support 64-bit big-endian object" -msgstr "%s: no se configuró para admitir objetos big-endian de 64-bit" +msgstr "%s: no se configuró para admitir objetos big-endian de 64-bit" #: object.cc:2398 plugin.cc:1049 #, c-format msgid "%s: not configured to support 64-bit little-endian object" -msgstr "%s: no se configuró para admitir objetos little-endian de 64-bit" +msgstr "%s: no se configuró para admitir objetos little-endian de 64-bit" #: options.cc:156 #, c-format @@ -951,17 +952,17 @@ msgstr "Reporte bichos a %s\n" #: options.cc:193 options.cc:203 options.cc:213 #, c-format msgid "%s: invalid option value (expected an integer): %s" -msgstr "%s: valor de opción inválido (se esperaba un entero): %s" +msgstr "%s: valor de opción inválido (se esperaba un entero): %s" #: options.cc:223 #, c-format msgid "%s: invalid option value (expected a floating point number): %s" -msgstr "%s: valor de opción inválido (se esperaba un número de coma flotante): %s" +msgstr "%s: valor de opción inválido (se esperaba un número de coma flotante): %s" #: options.cc:232 #, c-format msgid "%s: must take a non-empty argument" -msgstr "%s: debe tomar un argumento que no esté vacío" +msgstr "%s: debe tomar un argumento que no esté vacío" #: options.cc:273 #, c-format @@ -976,17 +977,17 @@ msgstr " Objetivos admitidos:\n" #: options.cc:409 #, c-format msgid "unable to parse script file %s" -msgstr "no se puede decodificar el fichero de guión %s" +msgstr "no se puede decodificar el fichero de guión %s" #: options.cc:417 #, c-format msgid "unable to parse version script file %s" -msgstr "no se puede decodificar el fichero de guión de versión %s" +msgstr "no se puede decodificar el fichero de guión de versión %s" #: options.cc:425 #, c-format msgid "unable to parse dynamic-list script file %s" -msgstr "no se puede decodificar el fichero de guión de lista dinámica %s" +msgstr "no se puede decodificar el fichero de guión de lista dinámica %s" #: options.cc:522 #, c-format @@ -996,7 +997,7 @@ msgstr "no se admite el formato '%s'; se trata como elf (formatos admitidos: elf #: options.cc:538 #, c-format msgid "%s: use the --help option for usage information\n" -msgstr "%s: use la opción --help para información de modo de empleo\n" +msgstr "%s: use la opción --help para información de modo de empleo\n" #: options.cc:547 #, c-format @@ -1013,17 +1014,17 @@ msgstr "falta un argumento" #: options.cc:736 msgid "unknown -z option" -msgstr "opción -z desconocida" +msgstr "opción -z desconocida" #: options.cc:935 #, c-format msgid "ignoring --threads: %s was compiled without thread support" -msgstr "se descarta --threads: %s se compiló sin soporte para hilos" +msgstr "se descarta --threads: %s se compiló sin soporte para hilos" #: options.cc:942 #, c-format msgid "ignoring --thread-count: %s was compiled without thread support" -msgstr "se descarta --thread-count: %s se compiló sin soporte para hilos" +msgstr "se descarta --thread-count: %s se compiló sin soporte para hilos" #: options.cc:981 #, c-format @@ -1048,7 +1049,7 @@ msgstr "-pie y -r son incompatibles" #: options.cc:1014 msgid "-retain-symbols-file does not yet work with -r" -msgstr "-retain-symbols-file aún no funciona con -r" +msgstr "-retain-symbols-file aún no funciona con -r" #: options.cc:1020 msgid "binary output format not compatible with -shared or -pie or -r" @@ -1057,7 +1058,7 @@ msgstr "el formato de salida binario no es compatible con -shared o -pie o -r" #: options.cc:1026 #, c-format msgid "--hash-bucket-empty-fraction value %g out of range [0.0, 1.0)" -msgstr "el valor %g de --hash-bucket-empty-fraction está fuera de rango [0.0, 1.0]" +msgstr "el valor %g de --hash-bucket-empty-fraction está fuera de rango [0.0, 1.0]" #: options.cc:1031 msgid "Options --incremental-changed, --incremental-unchanged, --incremental-unknown require the use of --incremental" @@ -1074,7 +1075,7 @@ msgstr "Fin de grupo sin inicio de grupo" #. I guess it's neither a long option nor a short option. #: options.cc:1174 msgid "unknown option" -msgstr "opción desconocida" +msgstr "opción desconocida" #: options.cc:1201 #, c-format @@ -1083,15 +1084,15 @@ msgstr "%s: falta el fin de grupo\n" #: options.h:571 msgid "Report usage information" -msgstr "Muestra la información de uso" +msgstr "Muestra la información de uso" #: options.h:573 msgid "Report version information" -msgstr "Muestra la información de la versión" +msgstr "Muestra la información de la versión" #: options.h:575 msgid "Report version and target information" -msgstr "Muestra la información de la versión y el objetivo" +msgstr "Muestra la información de la versión y el objetivo" #: options.h:584 options.h:635 msgid "Not supported" @@ -1111,7 +1112,7 @@ msgstr "No permite referencias sin resolver en bibliotecas compartidas" #: options.h:592 msgid "Only set DT_NEEDED for shared libraries if used" -msgstr "Sólo establece DT_NEEDED para las bibliotecas compartidas si se usan" +msgstr "Sólo establece DT_NEEDED para las bibliotecas compartidas si se usan" #: options.h:593 msgid "Always DT_NEEDED for shared libraries" @@ -1131,11 +1132,11 @@ msgstr "-l no busca bibliotecas compartidas" #: options.h:609 msgid "Bind defined symbols locally" -msgstr "Enlaza los símbolos definidos localmente" +msgstr "Enlaza los símbolos definidos localmente" #: options.h:612 msgid "Bind defined function symbols locally" -msgstr "Enlaza los símbolos de función localmente" +msgstr "Enlaza los símbolos de función localmente" #: options.h:615 msgid "Generate build ID note" @@ -1163,11 +1164,11 @@ msgstr "[ninguno]" #: options.h:639 msgid "Define common symbols" -msgstr "Define símbolos comunes" +msgstr "Define símbolos comunes" #: options.h:640 msgid "Do not define common symbols" -msgstr "No define símbolos comunes" +msgstr "No define símbolos comunes" #: options.h:642 options.h:644 msgid "Alias for -d" @@ -1175,7 +1176,7 @@ msgstr "Igual que -d" #: options.h:647 msgid "Turn on debugging" -msgstr "Activa la depuración" +msgstr "Activa la depuración" #: options.h:648 msgid "[all,files,script,task][,...]" @@ -1183,43 +1184,43 @@ msgstr "[all,files,script,task][,...]" #: options.h:651 msgid "Define a symbol" -msgstr "Define un símbolo" +msgstr "Define un símbolo" #: options.h:651 msgid "SYMBOL=EXPRESSION" -msgstr "SÍMBOLO=EXPRESIÓN" +msgstr "SÍMBOLO=EXPRESIÓN" #: options.h:654 msgid "Demangle C++ symbols in log messages" -msgstr "Desenreda los símbolos C++ en los mensajes de registro" +msgstr "Desenreda los símbolos C++ en los mensajes de registro" #: options.h:658 msgid "Do not demangle C++ symbols in log messages" -msgstr "No desenreda los símbolos C++ en los mensajes de registro" +msgstr "No desenreda los símbolos C++ en los mensajes de registro" #: options.h:662 msgid "Try to detect violations of the One Definition Rule" -msgstr "Trata de detectar las violaciones de la Regla de Una Definición" +msgstr "Trata de detectar las violaciones de la Regla de Una Definición" #: options.h:666 msgid "Delete all temporary local symbols" -msgstr "Borra todos los símbolos locales temporales" +msgstr "Borra todos los símbolos locales temporales" #: options.h:669 msgid "Add data symbols to dynamic symbols" -msgstr "Agrega los símbolos de datos a los símbolos dinámicos" +msgstr "Agrega los símbolos de datos a los símbolos dinámicos" #: options.h:672 msgid "Add C++ operator new/delete to dynamic symbols" -msgstr "Agrega el operador de C++ new/delete a los símbolos dinámicos" +msgstr "Agrega el operador de C++ new/delete a los símbolos dinámicos" #: options.h:675 msgid "Add C++ typeinfo to dynamic symbols" -msgstr "Agrega la información de tipo C++ a los símbolos dinámicos" +msgstr "Agrega la información de tipo C++ a los símbolos dinámicos" #: options.h:678 msgid "Read a list of dynamic symbols" -msgstr "Lee una lista de símbolos dinámicos" +msgstr "Lee una lista de símbolos dinámicos" #: options.h:678 options.h:732 options.h:766 options.h:893 options.h:921 msgid "FILE" @@ -1227,27 +1228,27 @@ msgstr "FICHERO" #: options.h:681 msgid "Set program start address" -msgstr "Establece la dirección de inicio del programa" +msgstr "Establece la dirección de inicio del programa" #: options.h:681 options.h:908 options.h:910 options.h:912 msgid "ADDRESS" -msgstr "DIRECCIÓN" +msgstr "DIRECCIÓN" #: options.h:684 msgid "Exclude libraries from automatic export" -msgstr "Excluye las bibliotecas de la exportación automática" +msgstr "Excluye las bibliotecas de la exportación automática" #: options.h:688 msgid "Export all dynamic symbols" -msgstr "Exporta todos los símbolos dinámicos" +msgstr "Exporta todos los símbolos dinámicos" #: options.h:689 msgid "Do not export all dynamic symbols (default)" -msgstr "No exporta todos los símbolos dinámicos (por defecto)" +msgstr "No exporta todos los símbolos dinámicos (por defecto)" #: options.h:692 msgid "Create exception frame header" -msgstr "Crea un encabezado de marco de excepción" +msgstr "Crea un encabezado de marco de excepción" #: options.h:695 msgid "Treat warnings as errors" @@ -1264,7 +1265,7 @@ msgstr "Llama a SYMBOL al momento de descarga" #: options.h:699 options.h:729 options.h:873 options.h:915 options.h:936 #: options.h:939 msgid "SYMBOL" -msgstr "SÍMBOLO" +msgstr "SÍMBOLO" #: options.h:702 msgid "Set shared library name" @@ -1276,15 +1277,15 @@ msgstr "FICHERO" #: options.h:705 msgid "Min fraction of empty buckets in dynamic hash" -msgstr "Fracción mínima de las cubos vacíos en la asociación dinámica" +msgstr "Fracción mínima de las cubos vacíos en la asociación dinámica" #: options.h:706 msgid "FRACTION" -msgstr "FRACCIÓN" +msgstr "FRACCIÓN" #: options.h:709 msgid "Dynamic hash style" -msgstr "Estilo de asociación dinámica" +msgstr "Estilo de asociación dinámica" #: options.h:709 msgid "[sysv,gnu,both]" @@ -1292,7 +1293,7 @@ msgstr "[sysv,gnu,both]" #: options.h:713 msgid "Set dynamic linker path" -msgstr "Establece la ruta del enlazador dinámico" +msgstr "Establece la ruta del enlazador dinámico" #: options.h:713 msgid "PROGRAM" @@ -1304,7 +1305,7 @@ msgstr "Trabajo en progreso; no usar" #: options.h:717 msgid "Do a full build" -msgstr "Hace una compilación completa" +msgstr "Hace una compilación completa" #: options.h:720 msgid "Assume files changed" @@ -1324,7 +1325,7 @@ msgstr "Llama a SYMBOL al momento de cargar" #: options.h:732 msgid "Read only symbol values from FILE" -msgstr "Lee sólo valores de símbolos del FICHERO" +msgstr "Lee sólo valores de símbolos del FICHERO" #: options.h:735 msgid "Search for library LIBNAME" @@ -1336,7 +1337,7 @@ msgstr "NOMBREBIB" #: options.h:738 msgid "Add directory to search path" -msgstr "Agrega el directorio a la ruta de búsqueda" +msgstr "Agrega el directorio a la ruta de búsqueda" #: options.h:738 options.h:813 options.h:816 options.h:820 options.h:887 msgid "DIR" @@ -1348,11 +1349,11 @@ msgstr "Se descarta por compatibilidad" #: options.h:741 msgid "EMULATION" -msgstr "EMULACIÓN" +msgstr "EMULACIÓN" #: options.h:744 msgid "Write map file on standard output" -msgstr "Escribe el fichero mapa en la salida estándar" +msgstr "Escribe el fichero mapa en la salida estándar" #: options.h:745 msgid "Write map file" @@ -1368,11 +1369,11 @@ msgstr "No pagina los datos alineados" #: options.h:751 msgid "Do not page align data, do not make text readonly" -msgstr "No pagina los datos alineados, no hace el texto de sólo lectura" +msgstr "No pagina los datos alineados, no hace el texto de sólo lectura" #: options.h:752 msgid "Page align data, make text readonly" -msgstr "Pagina los datos alineados, hace el texto de sólo lectura" +msgstr "Pagina los datos alineados, hace el texto de sólo lectura" #: options.h:755 msgid "Enable use of DT_RUNPATH and DT_FLAGS" @@ -1384,11 +1385,11 @@ msgstr "Desactiva el uso de DT_RUNPATH y DT_FLAGS" #: options.h:759 msgid "Create an output file even if errors occur" -msgstr "Crea un fichero de salida aún si ocurren errores" +msgstr "Crea un fichero de salida aún si ocurren errores" #: options.h:762 options.h:958 msgid "Report undefined symbols (even with --shared)" -msgstr "Reporta símbolos sin definir (aún con --shared)" +msgstr "Reporta símbolos sin definir (aún con --shared)" #: options.h:766 msgid "Set output file name" @@ -1396,7 +1397,7 @@ msgstr "Establece el nombre del fichero de salida" #: options.h:769 msgid "Optimize output file size" -msgstr "Optimiza el tamaño del fichero de salida" +msgstr "Optimiza el tamaño del fichero de salida" #: options.h:769 msgid "LEVEL" @@ -1412,7 +1413,7 @@ msgstr "[binary]" #: options.h:775 options.h:777 msgid "Create a position independent executable" -msgstr "Crea un ejecutable independiente de posición" +msgstr "Crea un ejecutable independiente de posición" #: options.h:782 msgid "Load a plugin library" @@ -1424,19 +1425,19 @@ msgstr "PLUGIN" #: options.h:784 msgid "Pass an option to the plugin" -msgstr "Pasa una opción al plugin" +msgstr "Pasa una opción al plugin" #: options.h:784 msgid "OPTION" -msgstr "OPCIÓN" +msgstr "OPCIÓN" #: options.h:788 msgid "Preread archive symbols when multi-threaded" -msgstr "Prelee los símbolos de archivo cuando es multi-hilos" +msgstr "Prelee los símbolos de archivo cuando es multi-hilos" #: options.h:791 msgid "Print symbols defined and used for each input" -msgstr "Muestra los símbolos definidos y usados por cada entrada" +msgstr "Muestra los símbolos definidos y usados por cada entrada" #: options.h:795 msgid "Ignored for SVR4 compatibility" @@ -1456,7 +1457,7 @@ msgstr "Relaja ramificaciones en ciertos objetivos" #: options.h:807 msgid "keep only symbols listed in this file" -msgstr "mantiene sólo los símbolos enlistados en este fichero" +msgstr "mantiene sólo los símbolos enlistados en este fichero" #: options.h:807 msgid "[file]" @@ -1464,43 +1465,43 @@ msgstr "[fichero]" #: options.h:813 options.h:816 msgid "Add DIR to runtime search path" -msgstr "Agrega el DIRectorio a la ruta de búsqueda de tiempo de ejecución" +msgstr "Agrega el DIRectorio a la ruta de búsqueda de tiempo de ejecución" #: options.h:819 msgid "Add DIR to link time shared library search path" -msgstr "Agrega el DIRectorio a la ruta de búsqueda de bibliotecas compartidas en tiempo de enlace" +msgstr "Agrega el DIRectorio a la ruta de búsqueda de bibliotecas compartidas en tiempo de enlace" #: options.h:823 msgid "Strip all symbols" -msgstr "Descarta todos los símbolos" +msgstr "Descarta todos los símbolos" #: options.h:825 msgid "Strip debugging information" -msgstr "Descarta la información de depuración" +msgstr "Descarta la información de depuración" #: options.h:827 msgid "Emit only debug line number information" -msgstr "Sólo emite la información de número de línea de depuración" +msgstr "Sólo emite la información de número de línea de depuración" #: options.h:829 msgid "Strip debug symbols that are unused by gdb (at least versions <= 6.7)" -msgstr "Descarta los símbolos de depuración que no usa gdb (por lo menos las versiones <= 6.7)" +msgstr "Descarta los símbolos de depuración que no usa gdb (por lo menos las versiones <= 6.7)" #: options.h:832 msgid "Strip LTO intermediate code sections" -msgstr "Descarta las secciones de código intermedio LTO" +msgstr "Descarta las secciones de código intermedio LTO" #: options.h:835 msgid "(ARM only) The maximum distance from instructions in a group of sections to their stubs. Negative values mean stubs are always after the group. 1 means using default size.\n" -msgstr "(Sólo ARM) La distancia máxima de las instrucciones en un grupo de secciones a sus cabos. Los valores negativos significan que los cabos siempre van después del grupo. 1 significa usar el tamaño por defecto.\n" +msgstr "(Sólo ARM) La distancia máxima de las instrucciones en un grupo de secciones a sus cabos. Los valores negativos significan que los cabos siempre van después del grupo. 1 significa usar el tamaño por defecto.\n" #: options.h:838 options.h:852 options.h:956 options.h:975 msgid "SIZE" -msgstr "TAMAÑO" +msgstr "TAMAÑO" #: options.h:841 msgid "Use less memory and more disk I/O (included only for compatibility with GNU ld)" -msgstr "Usa menos memoria y más E/S de disco (sólo se incluye por compatibilidad con ld de GNU)" +msgstr "Usa menos memoria y más E/S de disco (sólo se incluye por compatibilidad con ld de GNU)" #: options.h:845 options.h:848 msgid "Generate shared library" @@ -1508,7 +1509,7 @@ msgstr "Genera una biblioteca compartida" #: options.h:851 msgid "Stack size when -fsplit-stack function calls non-split" -msgstr "Tamaño de la pila cuando la función -fsplit-stack llama a algo que no está dividido" +msgstr "Tamaño de la pila cuando la función -fsplit-stack llama a algo que no está dividido" #: options.h:857 msgid "Do not link against shared libraries" @@ -1516,11 +1517,11 @@ msgstr "No enlaza contra bibliotecas compartidas" #: options.h:860 msgid "Identical Code Folding. '--icf=safe' folds only ctors and dtors." -msgstr "Incorporación de Código Idéntico (ICF por sus siglas en inglés). '--icf=safe' sólo incorpora ctors y dtors." +msgstr "Incorporación de Código Idéntico (ICF por sus siglas en inglés). '--icf=safe' sólo incorpora ctors y dtors." #: options.h:866 msgid "Number of iterations of ICF (default 2)" -msgstr "Número de iteraciones de ICF (por defecto 2)" +msgstr "Número de iteraciones de ICF (por defecto 2)" #: options.h:866 options.h:899 options.h:901 options.h:903 options.h:905 msgid "COUNT" @@ -1528,15 +1529,15 @@ msgstr "CUENTA" #: options.h:869 msgid "List folded identical sections on stderr" -msgstr "Enlista las secciones idénticas incorporadas en la salida de error estándar" +msgstr "Enlista las secciones idénticas incorporadas en la salida de error estándar" #: options.h:870 msgid "Do not list folded identical sections" -msgstr "No enlista las secciones idénticas incorporadas" +msgstr "No enlista las secciones idénticas incorporadas" #: options.h:873 msgid "Do not fold this symbol during ICF" -msgstr "No incorpora este símbolo durante ICF" +msgstr "No incorpora este símbolo durante ICF" #: options.h:876 msgid "Remove unused sections" @@ -1548,7 +1549,7 @@ msgstr "No borra las secciones sin uso (por defecto)" #: options.h:880 msgid "List removed unused sections on stderr" -msgstr "Enlista las secciones sin uso borradas en la salida de error estándar" +msgstr "Enlista las secciones sin uso borradas en la salida de error estándar" #: options.h:881 msgid "Do not list removed unused sections" @@ -1556,11 +1557,11 @@ msgstr "No enlista las secciones sin uso borradas" #: options.h:884 msgid "Print resource usage statistics" -msgstr "Muestra las estadísticas de uso de recursos" +msgstr "Muestra las estadísticas de uso de recursos" #: options.h:887 msgid "Set target system root directory" -msgstr "Establece el directorio raíz del sistema objetivo" +msgstr "Establece el directorio raíz del sistema objetivo" #: options.h:890 msgid "Print the name of each input file" @@ -1568,7 +1569,7 @@ msgstr "Muestra el nombre de cada fichero de entrada" #: options.h:893 msgid "Read linker script" -msgstr "Lee el guión del enlazador" +msgstr "Lee el guión del enlazador" #: options.h:896 msgid "Run the linker multi-threaded" @@ -1580,51 +1581,51 @@ msgstr "No ejecuta el enlazador multi-hilos" #: options.h:899 msgid "Number of threads to use" -msgstr "Número de hilos a usar" +msgstr "Número de hilos a usar" #: options.h:901 msgid "Number of threads to use in initial pass" -msgstr "Número de hilos a usar en el paso inicial" +msgstr "Número de hilos a usar en el paso inicial" #: options.h:903 msgid "Number of threads to use in middle pass" -msgstr "Número de hilos a usar en el paso medio" +msgstr "Número de hilos a usar en el paso medio" #: options.h:905 msgid "Number of threads to use in final pass" -msgstr "Número de hilos a usar en el paso final" +msgstr "Número de hilos a usar en el paso final" #: options.h:908 msgid "Set the address of the bss segment" -msgstr "Establece la dirección del segmento bss" +msgstr "Establece la dirección del segmento bss" #: options.h:910 msgid "Set the address of the data segment" -msgstr "Establece la dirección del segmento data" +msgstr "Establece la dirección del segmento data" #: options.h:912 msgid "Set the address of the text segment" -msgstr "Establece la dirección del segmento text" +msgstr "Establece la dirección del segmento text" #: options.h:915 msgid "Create undefined reference to SYMBOL" -msgstr "Crea una referencia sin definir hacia el SÍMBOLO" +msgstr "Crea una referencia sin definir hacia el SÍMBOLO" #: options.h:918 msgid "Synonym for --debug=files" -msgstr "Sinónimo para --debug=files" +msgstr "Sinónimo para --debug=files" #: options.h:921 msgid "Read version script" -msgstr "Lee el guión de versión" +msgstr "Lee el guión de versión" #: options.h:924 msgid "Warn about duplicate common symbols" -msgstr "Avisa sobre símbolos comunes duplicados" +msgstr "Avisa sobre símbolos comunes duplicados" #: options.h:925 msgid "Do not warn about duplicate common symbols (default)" -msgstr "No avisa sobre símbolos comunes duplicados (por defecto)" +msgstr "No avisa sobre símbolos comunes duplicados (por defecto)" #: options.h:928 msgid "Warn when skipping an incompatible library" @@ -1640,19 +1641,19 @@ msgstr "Incluye todos los contenidos del archivo" #: options.h:933 msgid "Include only needed archive contents" -msgstr "Incluye sólo los contenidos del archivo necesarios" +msgstr "Incluye sólo los contenidos del archivo necesarios" #: options.h:936 msgid "Use wrapper functions for SYMBOL" -msgstr "Usa funciones de envoltura para el SÍMBOLO" +msgstr "Usa funciones de envoltura para el SÍMBOLO" #: options.h:939 msgid "Trace references to symbol" -msgstr "Rastrea las referencias al símbolo" +msgstr "Rastrea las referencias al símbolo" #: options.h:942 msgid "Default search path for Solaris compatibility" -msgstr "Ruta de búsqueda por defecto para compatibilidad con Solaris" +msgstr "Ruta de búsqueda por defecto para compatibilidad con Solaris" #: options.h:943 msgid "PATH" @@ -1660,23 +1661,23 @@ msgstr "RUTA" #: options.h:946 msgid "Start a library search group" -msgstr "Inicia un grupo de búsqueda de bibliotecas" +msgstr "Inicia un grupo de búsqueda de bibliotecas" #: options.h:948 msgid "End a library search group" -msgstr "Termina un grupo de búsqueda de bibliotecas" +msgstr "Termina un grupo de búsqueda de bibliotecas" #: options.h:953 msgid "Sort dynamic relocs" -msgstr "Ordena las reubicaciones dinámicas" +msgstr "Ordena las reubicaciones dinámicas" #: options.h:954 msgid "Do not sort dynamic relocs" -msgstr "No ordena las reubicaciones dinámicas" +msgstr "No ordena las reubicaciones dinámicas" #: options.h:956 msgid "Set common page size to SIZE" -msgstr "Establece el tamaño de página común a TAMAÑO" +msgstr "Establece el tamaño de página común a TAMAÑO" #: options.h:961 msgid "Mark output as requiring executable stack" @@ -1684,7 +1685,7 @@ msgstr "Marca la salida para requerir pila ejecutable" #: options.h:963 msgid "Mark DSO to be initialized first at runtime" -msgstr "Marca el DSO para inicializarse primero en tiempo de ejecución" +msgstr "Marca el DSO para inicializarse primero en tiempo de ejecución" #: options.h:966 msgid "Mark object to interpose all DSOs but executable" @@ -1692,7 +1693,7 @@ msgstr "Marca el objeto para interponer todos los DSOs pero ejecutable" #: options.h:969 msgid "Mark object for lazy runtime binding (default)" -msgstr "Marca el objeto para enlazado en tiempo de ejecución laxo (por defecto)" +msgstr "Marca el objeto para enlazado en tiempo de ejecución laxo (por defecto)" #: options.h:972 msgid "Mark object requiring immediate process" @@ -1700,7 +1701,7 @@ msgstr "Marca el objeto para requerir proceso inmediato" #: options.h:975 msgid "Set maximum page size to SIZE" -msgstr "Establece el tamaño máximo de página a TAMAÑO" +msgstr "Establece el tamaño máximo de página a TAMAÑO" #: options.h:978 msgid "Do not create copy relocs" @@ -1708,11 +1709,11 @@ msgstr "No crea reubicaciones de copia" #: options.h:980 msgid "Mark object not to use default search paths" -msgstr "Marca el objeto para no usar las rutas de búsqueda por defecto" +msgstr "Marca el objeto para no usar las rutas de búsqueda por defecto" #: options.h:983 msgid "Mark DSO non-deletable at runtime" -msgstr "Marca el DSO como no eliminable en tiempo de ejecución" +msgstr "Marca el DSO como no eliminable en tiempo de ejecución" #: options.h:986 msgid "Mark DSO not available to dlopen" @@ -1728,43 +1729,43 @@ msgstr "Marca la salida para no requerir pila ejecutable" #: options.h:994 msgid "Mark object for immediate function binding" -msgstr "Marca el objeto para enlace de función inmediato" +msgstr "Marca el objeto para enlace de función inmediato" #: options.h:997 msgid "Mark DSO to indicate that needs immediate $ORIGIN processing at runtime" -msgstr "Marca el DSO para indicar que requiere procesamiento de $ORIGIN inmediato en tiempo de ejecución" +msgstr "Marca el DSO para indicar que requiere procesamiento de $ORIGIN inmediato en tiempo de ejecución" #: options.h:1000 msgid "Where possible mark variables read-only after relocation" -msgstr "Marca las variables como sólo lectura después de la reubicación cuando es posible" +msgstr "Marca las variables como sólo lectura después de la reubicación cuando es posible" #: options.h:1001 msgid "Don't mark variables read-only after relocation" -msgstr "No marca las variables como sólo lectura después de la reubicación" +msgstr "No marca las variables como sólo lectura después de la reubicación" #: output.cc:1132 msgid "section group retained but group element discarded" -msgstr "se retiene el grupo de sección pero se descarta el elemento de grupo" +msgstr "se retiene el grupo de sección pero se descarta el elemento de grupo" #: output.cc:1860 #, c-format msgid "invalid alignment %lu for section \"%s\"" -msgstr "alineación %lu inválida para la sección \"%s\"" +msgstr "alineación %lu inválida para la sección \"%s\"" #: output.cc:3573 #, c-format msgid "dot moves backward in linker script from 0x%llx to 0x%llx" -msgstr "el punto se mueve hacia atrás en el guión del enlazador de 0x%llx a 0x%llx" +msgstr "el punto se mueve hacia atrás en el guión del enlazador de 0x%llx a 0x%llx" #: output.cc:3576 #, c-format msgid "address of section '%s' moves backward from 0x%llx to 0x%llx" -msgstr "la dirección de la sección '%s' se mueve hacia atrás de 0x%llx a 0x%llx" +msgstr "la dirección de la sección '%s' se mueve hacia atrás de 0x%llx a 0x%llx" #: output.cc:3755 #, c-format msgid "nobits section %s may not precede progbits section %s in same segment" -msgstr "la sección nobits %s puede no preceder a la sección progbits %s en el mismo segmento" +msgstr "la sección nobits %s puede no preceder a la sección progbits %s en el mismo segmento" #: output.cc:3907 output.cc:3975 #, c-format @@ -1784,7 +1785,7 @@ msgstr "%s: mmap: %s" #: output.cc:4085 #, c-format msgid "%s: mmap: failed to allocate %lu bytes for output file: %s" -msgstr "%s: mmap: falló al reservar %lu bytes para el fichero de salida: %s" +msgstr "%s: mmap: falló al reservar %lu bytes para el fichero de salida: %s" #: output.cc:4096 #, c-format @@ -1794,7 +1795,7 @@ msgstr "%s: munmap: %s" #: output.cc:4115 #, c-format msgid "%s: write: unexpected 0 return-value" -msgstr "%s: wirte: valor de devolución 0 inesperado" +msgstr "%s: wirte: valor de devolución 0 inesperado" #: output.cc:4117 #, c-format @@ -1808,7 +1809,7 @@ msgstr "%s: close: %s" #: output.h:520 msgid "** section headers" -msgstr "** encabezados de sección" +msgstr "** encabezados de sección" #: output.h:565 msgid "** segment headers" @@ -1828,7 +1829,7 @@ msgstr "** tabla de cadenas" #: output.h:1300 msgid "** dynamic relocs" -msgstr "** reubicaciones dinámicas" +msgstr "** reubicaciones dinámicas" #: output.h:1301 output.h:1637 msgid "** relocs" @@ -1844,7 +1845,7 @@ msgstr "** GOT" #: output.h:1916 msgid "** dynamic" -msgstr "** dinámico" +msgstr "** dinámico" #: output.h:2039 msgid "** symtab xindex" @@ -1867,17 +1868,17 @@ msgstr "%s: no se puede encontrar el punto de entrada de carga" #: plugin.cc:426 msgid "Input files added by plug-ins in --incremental mode not supported yet.\n" -msgstr "Aún no se admiten los ficheros de entrada agregados por plug-ins en el modo --incremental.\n" +msgstr "Aún no se admiten los ficheros de entrada agregados por plug-ins en el modo --incremental.\n" #: powerpc.cc:1502 sparc.cc:2307 x86_64.cc:1632 #, c-format msgid "%s: unsupported REL reloc section" -msgstr "%s: no se admite la sección de reubicación REL" +msgstr "%s: no se admite la sección de reubicación REL" #: readsyms.cc:191 #, c-format msgid "%s: file is empty" -msgstr "%s: el fichero está vacío" +msgstr "%s: el fichero está vacío" #. Here we have to handle any other input file types we need. #: readsyms.cc:575 @@ -1887,38 +1888,38 @@ msgstr "%s: no es un objeto o un archivo" #: reduced_debug_output.cc:236 msgid "Debug abbreviations extend beyond .debug_abbrev section; failed to reduce debug abbreviations" -msgstr "Las abreviaciones de depuración se extienden más allá de la sección .debug_abbrev; falló al reducir las abreviaciones de depuración" +msgstr "Las abreviaciones de depuración se extienden más allá de la sección .debug_abbrev; falló al reducir las abreviaciones de depuración" #: reduced_debug_output.cc:322 msgid "Extremely large compile unit in debug info; failed to reduce debug info" -msgstr "Unidad de compilación extremadamente grande en la información de depuración; falló al reducir la información de depuración" +msgstr "Unidad de compilación extremadamente grande en la información de depuración; falló al reducir la información de depuración" #: reduced_debug_output.cc:330 msgid "Debug info extends beyond .debug_info section;failed to reduce debug info" -msgstr "La información de depuración se extiende más allá de la sección .debug_info; falló al reducir la información de depuración" +msgstr "La información de depuración se extiende más allá de la sección .debug_info; falló al reducir la información de depuración" #: reduced_debug_output.cc:350 reduced_debug_output.cc:392 msgid "Invalid DIE in debug info; failed to reduce debug info" -msgstr "DIE inválido en la información de depuración; falló al reducir la información de depuración" +msgstr "DIE inválido en la información de depuración; falló al reducir la información de depuración" #: reduced_debug_output.cc:373 msgid "Debug info extends beyond .debug_info section; failed to reduce debug info" -msgstr "La información de depuración se extiende más allá de la sección .debug_info; falló al reducir la información de depuración" +msgstr "La información de depuración se extiende más allá de la sección .debug_info; falló al reducir la información de depuración" #: reloc.cc:297 reloc.cc:858 #, c-format msgid "relocation section %u uses unexpected symbol table %u" -msgstr "la sección de reubicación %u usa la tabla de símbolos inesperada %u" +msgstr "la sección de reubicación %u usa la tabla de símbolos inesperada %u" #: reloc.cc:312 reloc.cc:875 #, c-format msgid "unexpected entsize for reloc section %u: %lu != %u" -msgstr "tamaño de entidad inesperado para la sección de reubicación %u: %lu != %u" +msgstr "tamaño de entidad inesperado para la sección de reubicación %u: %lu != %u" #: reloc.cc:321 reloc.cc:884 #, c-format msgid "reloc section %u size %lu uneven" -msgstr "sección de reubicación %u tamaño %lu disparejo" +msgstr "sección de reubicación %u tamaño %lu disparejo" #: reloc.cc:1203 #, c-format @@ -1928,73 +1929,73 @@ msgstr "no se puede convertir la llamada de '%s' a '%s'" #: reloc.cc:1343 #, c-format msgid "reloc section size %zu is not a multiple of reloc size %d\n" -msgstr "el tamaño de la sección de reubicación %zu no es un múltiplo del tamaño de reubicación %d\n" +msgstr "el tamaño de la sección de reubicación %zu no es un múltiplo del tamaño de reubicación %d\n" #. We should only see externally visible symbols in the symbol #. table. #: resolve.cc:191 msgid "invalid STB_LOCAL symbol in external symbols" -msgstr "símbolo STB_LOCAL inválido en símbolos externos" +msgstr "símbolo STB_LOCAL inválido en símbolos externos" #. Any target which wants to handle STB_LOOS, etc., needs to #. define a resolve method. #: resolve.cc:197 msgid "unsupported symbol binding" -msgstr "no se admite el enlace de símbolos" +msgstr "no se admite el enlace de símbolos" #. A dynamic object cannot reference a hidden or internal symbol #. defined in another object. #: resolve.cc:266 #, c-format msgid "%s symbol '%s' in %s is referenced by DSO %s" -msgstr "%s símbolo '%s' en %s es referenciado por el DSO %s" +msgstr "%s símbolo '%s' en %s es referenciado por el DSO %s" #: resolve.cc:326 #, c-format msgid "common of '%s' overriding smaller common" -msgstr "el común de '%s' sobreescribe un común más pequeño" +msgstr "el común de '%s' sobreescribe un común más pequeño" #: resolve.cc:331 #, c-format msgid "common of '%s' overidden by larger common" -msgstr "el común de '%s' es sobreescrito por un común más grande" +msgstr "el común de '%s' es sobreescrito por un común más grande" #: resolve.cc:336 #, c-format msgid "multiple common of '%s'" -msgstr "comunes múltiples de '%s'" +msgstr "comunes múltiples de '%s'" #: resolve.cc:442 #, c-format msgid "multiple definition of '%s'" -msgstr "definición múltiple de '%s'" +msgstr "definición múltiple de '%s'" #: resolve.cc:481 #, c-format msgid "definition of '%s' overriding common" -msgstr "la definición de '%s' sobreescribe el común" +msgstr "la definición de '%s' sobreescribe el común" #: resolve.cc:516 #, c-format msgid "definition of '%s' overriding dynamic common definition" -msgstr "la definición de '%s' sobreescribe la definición común dinámica" +msgstr "la definición de '%s' sobreescribe la definición común dinámica" #: resolve.cc:636 #, c-format msgid "common '%s' overridden by previous definition" -msgstr "el común '%s' se sobreescribe por la definición previa" +msgstr "el común '%s' se sobreescribe por la definición previa" #: resolve.cc:766 resolve.cc:778 msgid "command line" -msgstr "línea de órdenes" +msgstr "línea de órdenes" #: script-sections.cc:690 msgid "dot may not move backward" -msgstr "dot tal vez mueve hacia atrás" +msgstr "dot tal vez mueve hacia atrás" #: script-sections.cc:757 msgid "** expression" -msgstr "** expresión" +msgstr "** expresión" #: script-sections.cc:941 msgid "fill value is not absolute" @@ -2003,17 +2004,17 @@ msgstr "el valor de relleno no es absoluto" #: script-sections.cc:1913 #, c-format msgid "alignment of section %s is not absolute" -msgstr "la alineación de la sección %s no es absoluta" +msgstr "la alineación de la sección %s no es absoluta" #: script-sections.cc:1957 #, c-format msgid "subalign of section %s is not absolute" -msgstr "la subalineación de la sección %s no es absoluta" +msgstr "la subalineación de la sección %s no es absoluta" #: script-sections.cc:1972 #, c-format msgid "fill of section %s is not absolute" -msgstr "el relleno de la sección %s no es absoluto" +msgstr "el relleno de la sección %s no es absoluto" #: script-sections.cc:2048 msgid "SPECIAL constraints are not implemented" @@ -2021,15 +2022,15 @@ msgstr "no se admiten las restricciones SPECIAL" #: script-sections.cc:2090 msgid "mismatched definition for constrained sections" -msgstr "no coincide la definición para las secciones restringidas" +msgstr "no coincide la definición para las secciones restringidas" #: script-sections.cc:2634 msgid "DATA_SEGMENT_ALIGN may only appear once in a linker script" -msgstr "DATA_SEGMENT_ALIGN sólo puede aparecer una vez en un guión de enlazado" +msgstr "DATA_SEGMENT_ALIGN sólo puede aparecer una vez en un guión de enlazado" #: script-sections.cc:2649 msgid "DATA_SEGMENT_RELRO_END may only appear once in a linker script" -msgstr "DATA_SEGMENT_RELRO_END sólo puede aparecer una vez en un guión de enlazado" +msgstr "DATA_SEGMENT_RELRO_END sólo puede aparecer una vez en un guión de enlazado" #: script-sections.cc:2654 msgid "DATA_SEGMENT_RELRO_END must follow DATA_SEGMENT_ALIGN" @@ -2037,7 +2038,7 @@ msgstr "DATA_SEGMENT_RELRO_END debe seguir a DATA_SEGMENT_ALIGN" #: script-sections.cc:2826 msgid "no matching section constraint" -msgstr "no coincide la restricción de sección" +msgstr "no coincide la restricción de sección" #: script-sections.cc:3151 msgid "TLS sections are not adjacent" @@ -2045,7 +2046,7 @@ msgstr "las secciones TLS no son adyacentes" #: script-sections.cc:3280 msgid "allocated section not in any segment" -msgstr "la sección alojada no está en ningún segmento" +msgstr "la sección alojada no está en ningún segmento" #: script-sections.cc:3309 #, c-format @@ -2054,37 +2055,37 @@ msgstr "no existe el segmento %s" #: script-sections.cc:3323 msgid "section in two PT_LOAD segments" -msgstr "sección en dos segmentos PT_LOAD" +msgstr "sección en dos segmentos PT_LOAD" #: script-sections.cc:3330 msgid "allocated section not in any PT_LOAD segment" -msgstr "la sección alojada no está en ningún segmento PT_LOAD" +msgstr "la sección alojada no está en ningún segmento PT_LOAD" #: script-sections.cc:3358 msgid "may only specify load address for PT_LOAD segment" -msgstr "sólo se puede especificar dirección de carga para un segmento PT_LOAD" +msgstr "sólo se puede especificar dirección de carga para un segmento PT_LOAD" #: script-sections.cc:3382 #, c-format msgid "PHDRS load address overrides section %s load address" -msgstr "la dirección de carga PHDRS sobreescribe la dirección de carga de la sección %s" +msgstr "la dirección de carga PHDRS sobreescribe la dirección de carga de la sección %s" #. We could support this if we wanted to. #: script-sections.cc:3393 msgid "using only one of FILEHDR and PHDRS is not currently supported" -msgstr "no se admite sólo usar uno de FILEHDR y PHDRS" +msgstr "no se admite sólo usar uno de FILEHDR y PHDRS" #: script-sections.cc:3408 msgid "sections loaded on first page without room for file and program headers are not supported" -msgstr "no se admiten las secciones cargadas en la primera página sin espacio para ficheros y encabezados de programa" +msgstr "no se admiten las secciones cargadas en la primera página sin espacio para ficheros y encabezados de programa" #: script-sections.cc:3414 msgid "using FILEHDR and PHDRS on more than one PT_LOAD segment is not currently supported" -msgstr "no se admite usar FILEHDR y PHDRS en más de un segmento PT_LOAD" +msgstr "no se admite usar FILEHDR y PHDRS en más de un segmento PT_LOAD" #: script.cc:1072 msgid "invalid use of PROVIDE for dot symbol" -msgstr "uso inválido de PROVIDE para el símbolo dot" +msgstr "uso inválido de PROVIDE para el símbolo dot" #: script.cc:2132 #, c-format @@ -2096,17 +2097,17 @@ msgstr "%s:%d:%d: %s" #: script.cc:2297 #, c-format msgid "%s:%d:%d: ignoring command OPTION; OPTION is only valid for scripts specified via -T/--script" -msgstr "%s:%d:%d se descarta la orden OPTION; OPTION sólo es válido para guiones especificados a través de -T/--script" +msgstr "%s:%d:%d se descarta la orden OPTION; OPTION sólo es válido para guiones especificados a través de -T/--script" #: script.cc:2362 #, c-format msgid "%s:%d:%d: ignoring SEARCH_DIR; SEARCH_DIR is only valid for scripts specified via -T/--script" -msgstr "%s:%d:%d: se descarta SEARCH_DIR; SEARCH_DIR sólo es válido para guiones especificados a través de -T/--script" +msgstr "%s:%d:%d: se descarta SEARCH_DIR; SEARCH_DIR sólo es válido para guiones especificados a través de -T/--script" #: script.cc:2606 script.cc:2620 #, c-format msgid "%s:%d:%d: DATA_SEGMENT_ALIGN not in SECTIONS clause" -msgstr "%s:%d:%d: DATA_SEGMENT_ALIGN no está en la cláusula SECTIONS" +msgstr "%s:%d:%d: DATA_SEGMENT_ALIGN no está en la cláusula SECTIONS" #: script.cc:2739 msgid "unknown PHDR type (try integer)" @@ -2135,12 +2136,12 @@ msgstr "%s: referencia a %s" #: symtab.cc:859 #, c-format msgid "%s: definition of %s" -msgstr "%s: definición de '%s'" +msgstr "%s: definición de '%s'" #: symtab.cc:1052 #, c-format msgid "bad global symbol name offset %u at %zu" -msgstr "desplazamiento de nombres de símbol global %u erróneo en %zu" +msgstr "desplazamiento de nombres de símbol global %u erróneo en %zu" #: symtab.cc:1278 msgid "--just-symbols does not make sense with a shared object" @@ -2148,51 +2149,51 @@ msgstr "--just-symbols no tiene sentido con un objeto compartido" #: symtab.cc:1284 msgid "too few symbol versions" -msgstr "faltan versiones de símbolo" +msgstr "faltan versiones de símbolo" #: symtab.cc:1333 #, c-format msgid "bad symbol name offset %u at %zu" -msgstr "desplazamiento de nombre de símbolo %u erróneno en %zu" +msgstr "desplazamiento de nombre de símbolo %u erróneno en %zu" #: symtab.cc:1396 #, c-format msgid "versym for symbol %zu out of range: %u" -msgstr "versym para el símbolo %zu está fuera de rango: %u" +msgstr "versym para el símbolo %zu está fuera de rango: %u" #: symtab.cc:1404 #, c-format msgid "versym for symbol %zu has no name: %u" -msgstr "versym para el símbolo %zu no tienen nombre: %u" +msgstr "versym para el símbolo %zu no tienen nombre: %u" #: symtab.cc:2549 symtab.cc:2681 #, c-format msgid "%s: unsupported symbol section 0x%x" -msgstr "%s: no se admitide la sección de símbolo 0x%x" +msgstr "%s: no se admitide la sección de símbolo 0x%x" #: symtab.cc:2933 #, c-format msgid "%s: symbol table entries: %zu; buckets: %zu\n" -msgstr "%s: entradas de tabla de símbolos: %zu; cubos: %zu\n" +msgstr "%s: entradas de tabla de símbolos: %zu; cubos: %zu\n" #: symtab.cc:2936 #, c-format msgid "%s: symbol table entries: %zu\n" -msgstr "%s: entradas de tabla de símbolo: %zu\n" +msgstr "%s: entradas de tabla de símbolo: %zu\n" #: symtab.cc:3007 #, c-format msgid "while linking %s: symbol '%s' defined in multiple places (possible ODR violation):" -msgstr "al enlazar %s: se definió el símbolo '%s' en varios lugares (posible violación ODR):" +msgstr "al enlazar %s: se definió el símbolo '%s' en varios lugares (posible violación ODR):" #: target-reloc.h:259 msgid "relocation refers to discarded comdat section" -msgstr "la reubicación se refiere a la sección comdat descartada" +msgstr "la reubicación se refiere a la sección comdat descartada" #: target-reloc.h:298 #, c-format msgid "reloc has bad offset %zu" -msgstr "la reubicación tiene un desplazamiento %zu erróneo" +msgstr "la reubicación tiene un desplazamiento %zu erróneo" #: target.cc:90 #, c-format @@ -2202,15 +2203,15 @@ msgstr "%s: no se admite el tipo de fichero ELF %d" #: target.cc:157 #, c-format msgid "linker does not include stack split support required by %s" -msgstr "el enlazador no incluye el soporte de división de pila requerido por %s" +msgstr "el enlazador no incluye el soporte de división de pila requerido por %s" #: tls.h:59 msgid "TLS relocation out of range" -msgstr "reubicación TLS fuera de rango" +msgstr "reubicación TLS fuera de rango" #: tls.h:73 msgid "TLS relocation against invalid instruction" -msgstr "reubicación TLS contra una instrucción inválida" +msgstr "reubicación TLS contra una instrucción inválida" #. This output is intended to follow the GNU standards. #: version.cc:65 @@ -2225,28 +2226,28 @@ msgid "" "the GNU General Public License version 3 or (at your option) a later version.\n" "This program has absolutely no warranty.\n" msgstr "" -"Este programa es software libre; se puede redistribuir bajo los términos de\n" -"la Licencia Pública General de GNU versión 3 o (a su elección) una versión\n" +"Este programa es software libre; se puede redistribuir bajo los términos de\n" +"la Licencia Pública General de GNU versión 3 o (a su elección) una versión\n" "posterior.\n" -"Este programa no tiene absolutamente ninguna garantía.\n" +"Este programa no tiene absolutamente ninguna garantía.\n" #: workqueue-threads.cc:106 #, c-format msgid "%s failed: %s" -msgstr "falló %s: %s" +msgstr "falló %s: %s" #: x86_64.cc:2184 #, c-format msgid "unsupported reloc type %u" -msgstr "no se admite el tipo de reubicación %u" +msgstr "no se admite el tipo de reubicación %u" #: x86_64.cc:2524 #, c-format msgid "unsupported reloc %u against local symbol" -msgstr "no se admite la reubicación %u contra un símbolo local" +msgstr "no se admite la reubicación %u contra un símbolo local" #~ msgid " applied to section relative value" -#~ msgstr " se aplica al valor relativo a la sección" +#~ msgstr " se aplica al valor relativo a la sección" #~ msgid "cannot find -l%s" #~ msgstr "no se puede encontrar -l%s" @@ -2255,31 +2256,31 @@ msgstr "no se admite la reubicaci #~ msgstr "%s: el fichero ELF es demasiado corto" #~ msgid "%s: invalid ELF version 0" -#~ msgstr "%s: versión ELF 0 inválida" +#~ msgstr "%s: versión ELF 0 inválida" #~ msgid "%s: unsupported ELF version %d" -#~ msgstr "%s: no se admite la versión ELF %d" +#~ msgstr "%s: no se admite la versión ELF %d" #~ msgid "%s: invalid ELF class 0" -#~ msgstr "%s: clase ELF 0 inválida" +#~ msgstr "%s: clase ELF 0 inválida" #~ msgid "%s: unsupported ELF class %d" #~ msgstr "%s: no se admite la clase ELF %d" #~ msgid "%s: invalid ELF data encoding" -#~ msgstr "%s: codificación de datos ELF inválida" +#~ msgstr "%s: codificación de datos ELF inválida" #~ msgid "%s: unsupported ELF data encoding %d" -#~ msgstr "%s: no se admite la codificación de datos ELF %d" +#~ msgstr "%s: no se admite la codificación de datos ELF %d" #~ msgid "%s: lseek: %s" #~ msgstr "%s: lseek: %s" #~ msgid "invalid assignment to dot outside of SECTIONS" -#~ msgstr "asignación inválida a dot fuera de SECTIONS" +#~ msgstr "asignación inválida a dot fuera de SECTIONS" #~ msgid "%s: undefined reference to '%s', version '%s'" -#~ msgstr "%s: referencia a '%s' sin definir, versión '%s'" +#~ msgstr "%s: referencia a '%s' sin definir, versión '%s'" #~ msgid "%s: undefined reference to '%s'" #~ msgstr "%s: referencia a '%s' sin definir" diff --git a/gold/po/fi.gmo b/gold/po/fi.gmo new file mode 100644 index 0000000000000000000000000000000000000000..59175d3c1e3d73f4cd7bd1bcaee96a1b4904cb1a GIT binary patch literal 39817 zcmb`Q34k0&b@veZ|FUcIVnf9<5h9*+3E?io>ZHu$DvqUfAwM$s|P(cLI|@cbw`3w)8sw}ZzL ze+)bo{1kWr_;=t@pdxyHGB;y{|clFqW=Pq1CP4cz5jGj@vA_!w;x;uPJ$}`5m5d2F;MOK z8h9OeDi0MO1{Hr9sPg{|RDB-@mG4O(|8MYQ;-^pG2LImQ|0j<>1y$bhD_y$tz{`lQ0`QTo<9Rc_p>3^G2nF|x1tT8 z=sXLGe;)zW51$2<{@=mF!Q&u4RftXjAz8E@qzTcCzyGTsT^2nKsvbWAMgP+%bPc!` zyaAjAuL3^^J`4O8Q2D;+@k}~N@c|Ili)KLe*IU6`z#oEx;LQvgz5mtV@!*F+$)C@F zdhgdk@!{dTO#I#p!XnW)sCK>1$KMYs{g*-U_0K@69-Tra-QNI8u1tfX_sc-h?OotW z;1@yl?>~X+pC5pt-&u5`^7VPV3*1P24|o{(QBeHy36GD1rxE`mDEaztp!)4-gwp9? z4=B3c1nT}hpybc}pxW~mQ1$&okSat^fGY0<2D$q0Vo-ch0L9N&f$H}@Fb2mxJ_L$R z@AUXrpxX5_5LSqm)0v|C4v?W8Jp`T%{*J%@aqtY{-v>qiqY>ij$5o)p*$Jv%F9P+R zN5JQRp8!RduYq)3^berwd&c!{oX4Qj_k-$(8Bq0jJ*akk1XO=~-N%0bs$QqAbI(_R zN`EV;baOubYEbq4FsOd}0(d6)WAGgC6qr`H8dUwZf@;ThQ1aq_@I>$-Q2E{ro(=v! zsDAqk@C5MNpvw6ncnWyxjV|9MpxS>usPsF)7_5Pk>#qYP=RV-^i=f)|6HxCt?j~2x zrQiVZb>LaxOF)(TYoNx{W1#MT6I4B-K6C?cE~t8c9TXk@3uK5zr`+ty-30P4x`RKW z&)dNm+z-NH(Ko^4z;o6+I`@L&>n)((bDNL1K+)>~P~-Kb;055rpy>G_P;%w#p!oRM zes_O0sD8f#jKPBzs(rVCqVIj+ zt>D8TT^D@=TmzoJ$<^a7Q0<=qp9{VnRC%8O)&8eIr9XGjy>BO|db|!?4*mfMYei3h zF?a^TQu(g~)t{4~(!C9oeES%v^grZhZI9pBynUP^oqsQm8$SA(AhRsK)G zi@~$EI(qbjJBd$%;=7N5E5RRu>aUA`!KK^c@m^5nz6lilKMeMQ-vu?!&)VkNdj+Wc z+rT5hIZ)+32#P;{7gWCe;A-&upq^hi;@-Cn6#ZJD==28gMDX`Owd3R9$>5XVao~S~ zD(~=7SHIPu^4$)e0?vXfz*m9duMdLa`zJv0@ee?Xh>qLt_-70hoqhw<`1v%be*P|~ z_MfoBJ--@M{2oy4eaPQ`pTGYFfB(neDLjvFgC^ir;4eNSie3S#9w*TW>gQhYcyItb z3EU2<{3-Bg@U@`Y{Rns%_3F4^;XS?=aCAEeD@Xd=k7GOhJZh z^j=W!dkPeN55LpZYdI*o-3VR}mOZ`;RJwlv&jg=!mwV5-;AzBHgADCx5ZnO10aUst zz^lOj0M$R2-0k>!6R3C@yb*jkcs=+jQ2lk-JuZKb$Mv9|-vizRzRlxTJ)X16&p*KD z@cfOS+WXr+{!Q>K;!lHm@0rhY@oPcRdlb9^ybly#{SJ68_!V#+_!ICZ@Y1ht?LK1Mjq6Lm%ZZPJH-is@ z8ZTc4)s7=ej*b_C7ZUFW&jY7GJ%5Fd?*n7vp8!{b-vULKGZL467+gcV4r*Mz7gW6; z11|vo8axL4A$S9L*aTx5To1kg`~-Le*f;5L6L>7~VNm^WHz@ww1B%aI0xkpJ2#WuH z6%?QUzQ;fI_df}q&iyZgs@M1Z{r?6Ip2I{vr?>?NLn&jsHAs=kkbqWd>MwSPs!>8BA;>0Su-f$suE$M1kggHMB(f=8u} z?pK1McLmfqd?iSc(R;w7z_Xf;FE0WWzZ{IgHK4}BouK;pg`nQ^E1=5z0I2@@9H{#K z7*zkB50Ui#4d5MM1GIhs4R8T)x+h!=0eU*BmH1eF(f3{Cn^k@QgXvA6voGiND6j-wA5GKM5WV zKJD)xcAu+nA9y+U2SN4c^T8PW5Ga0p0#tvW{e0K|H-qOB-vOQo?gd4cSAweVqu|TH ze+I>e_rAc%|33lMPhS8}0iOa@&XM=K`zt`vaTBQbZ3acp6g(b$K6nQBD)1a|A9w-y zaZvU67O3)m2tEgV&I7K#SAb^|-w5h{2~__+0E$lU2G0UN>hUX}`um6AIpEnZbo{Xf z+(vvWsB+!`s+>Os)$VVD1@O!VUH(nr7l~Ivy}$oOj;=*e{qE6FK{5+`sI^rQ0 zUk$DzJ^`)--vWw%{~Q$GejZf2&V8xl!y)iw;uTQ!dJw!Gd^6Ywe!)LK6(+cd_zLiR za0{sS%z*viZ-9Ewx54G$Q=rnF@p3or)_^K^3{?7G18)Ss398)}y~5=i2G1kj0(XE9 zgKNQm1qZ>NUv%|sfL9TJ1-JtI2si+K2h@05`ARpw#zE!(O;G8+21{OjB}xe8Q&-0tJ|gU==Y>)?gpr#$`( zsB({gy{qR{pxX63um^lKsCs`86hHlq$D@DAwRau3o%=5W_54fVD)8BFaPsPUQ15Gj zqVHS5%fbEN^T7WHYJBW?qvN~Rf_m?tfGfdofokU|Z*p|L9u%L{LA~ew;JM)6fd%lV z;1%E{4?B5s4|p^23Gg)VJ)qwIXQ1*w<>ME=*}Zo=sPX#%sQ!5ycpCT^sPaDto(w+i z@uasnz4~0Rm-}~v%J)j}RPeXJYrv0yYS({)qUU*!xN>gtH9&l>gw4K zs()rd-TxKvO7QdGYVgQkcI{mQ>V6Frz1{(;ou36o|DS=A;Q4QhqGy2m9mWOGXpZn& zu2tWA3HrT?ctSXaP$TGfmdCeq{UFyD68^-VxIf1LxA-)=^A&eHI)Qu7A*es~V+dwH zhHbQ#XODxYf+OGspnfkWq=Xjn6Tnx4>g#9t=l$S=#7DuS{5_%(L(_Qec6t1G80ic`Nzstvo5%k-|{gc39!Uej)?`1yiHQ@Dx=li&OiZ0`#%)KiK z4X(w1MgMSzM?sV4&m;Vkzjr_QLgM=UJz;<_?Bkm~>Y0A$5)k@{A_}LKXBmm zANM8*y9w{%K4RN`THiZ^E6Io|*Y5)FBiu#M?{5hj7sv8!h_FjHbHC?uPrsiLHrSOL zce?y5u=t z#@~N|kN*%ni*O$Ip9%hfzyBZLKl|(d<1r7biCjXSM(#a&{vzVP1-_ba6roC(sM>qWMP2hJ4cN3mPcq!pp(!C7q_38hN>zlcrBRs}+ z_)TzeGWUK8?j-CdTurC2){<)8Ya1|lt-uuA4KJ7GkoWK4e_y2|P9KtUV z`uzPDa{WxMZzMd-^;3ibLBIDCPUrp`z^4hXvz1z zk8%A7;Twe46aF8eM)($CnsAd(HwOMPas8&a{;<1@Hgf$dT(9%-d%zOm4(|T~xE|E+ z6NEv+j|eNdx14YZ*Y6};07wY~^|lcq4c?sNa)>F+!2}?|?@V^gEOI zhumfM_ZPVLQsrCLSEG0%*EB>46!&KY0b>k8%>fni;c;onXch(ab~7c)~$NT8aI*(FPlx` z*t zhIj(%Q8c8Uq9d#V#m4xQXk96fHHw}zo?K(aQXC$;4yWVBD4|xYCawdNB-z_cXhF$t z8-eHIVl$pfilw9>BHDZAr!13cuTq92AD3%zd$|;=o5m}}G>unTJ@WUBvtf^ViEf?u zG%!JDzWR*O$c9qflkA;=s`OPco~YE_ke;bizqr<_jwOv18GXZh7t3Fx8O>xepM?U& z27zU&iAofYdw!~@~x!S7w z?nGS8Pyy=UxP@2OYYdxm)kb&4x5hQk7ZbyDVqG{`9ataR4VkTns^v75;GAsKTQiIf z-`!Q-0{2a%3H&b(v^v>UmyA=&HhmgNN3>OGmS-4|3yy|rtJaw~Z8CtTX*zYS6>N~u zTa&FSQqfhm6_TjMjH~8U0wECpd(?)I*5sCDsMWLX?vM~YjaDsg6l+M86+WR6#}Oum zw4O_{hltUM@+1P=sRE}e;wx4c#>&ljtUOtObY;k!BdrL&WVTAV*{mdol=JEU3IK9kh4PMk3T*VWD3oGsT|X}&9`PzFXIWtiAI3#}9FZg` z?72}o!Y6Cfr!9wUl4U@;ciG|J7kMc`wtTGrRAXf`%rt>6qv z-nhJ^f3a(jkM#GA_U#%O*tmIM%jmAYp}~z?Oq9bPBLnM42Zy(eNFldU;}M^yJXx#D z)+9;aw)LBK^$%`ao4b}eFeAh1bTud)Z5w4v$8_)**w^9Qv|6t~>tHF-fXB$<(fi2I@3_y=$t}u=rkN z6-upMQ_MKrDQO?A2uW^)E$AKKS|0RV!EZ#+R>LwSu?q zM%fnJ$Uy4Xu|M^$suXmZ)EF6i%FQWsbvjj)R`iOmP-&-46Ny=~RD7b$ijPR=9#gLI zpDQJoz-JME6{L?f++esFh8sqH)Y;x_Oku1$JE=FGq`J$472K7+TgCPD_iq~*8HxHz zrI^8@`AwxMQ|w9wUU&euDpB2)SFm=vhm)vZwNxXN=x?dSTZhY zp&Mwl*F~0 z(OT< zQ8LQ_D^Ixj5u$T^ywwOvlfC1K*9($JUJit(i`W4pJ2&4vJQOV;+N;GmCz@q@6dPPK z+ooMbdvgF&~3xJ2DbDwJpX6eWneplI-Xy-h>;PsInK@5@&d#xq*8ptI-4^n z>B#VwzRd$(+$@!JC+P;)hpvG{Vhht`{#@==p8iw`}bj-NaBrqK@v`Fx0nkB=2`|E6#gZ(s zkVErQi7>sD!Cut_y3m|bvZNFer8vjBjUr!>rsP-b%}_i>aJ+mvbWpu^v9xz%n!(s8 ztFuyjd%+CB;sh=r;*#+)XQO^+e#NpO7A|;QaA+XX9|@{x!?r%NsiTcaEon#86rIbRH(I((pmvgD5vpCs}?g;2orPN{r;Zg}?9k&yZXG{te*DT}p zK2f&ZKZ81-*^S((grJg{GK2QlL8m8Yf_>GrL=KJNq39IE&iNS6K4sRRW zIOr$EIffgS7hV3#w#A}B6y%6(WZ86dZ7CYYf~(5w>c*yyc8E-ZO>a*`)-w z!eU~EwBBl9n>bH|-1_CTSsqU#_dM9;P7hLVgshrsf+WGKL$9#x<5NrJn0s2ipFK1( zMB7v`uaCSdz;2oBaIbOp9dnsRy&9W9wG_cEl;x@v_r^&18j4&Fhl#)C6wWVCPF=sZC=GI+;8G_rMI{b1jaBsOL*G{QAgWX94h zRsBT5!McIlw`vwE6+P0Pdk4)LWbX)L!rMh=px8_cq2yl7!}bs{Bg7`F%H&p19RYZO z%n7$Jv2Zc@u_WfQEa9fv2zCb%ImygPl1!@JjW2uBsVI#>?Y{4ebS`Zs)woedHfED- zmjHIo2C7>n7-PlC&qo(aVjj~2q_JU}rCGoZ8*!~z*qj-`F*IW$KUgvDjmAW+RsM<;l`m+{4{UQbcTfj!Wa~*Tq+_ykMfhIV&Wja8fCN~+PP_K&JDAKu}iB6i-~2DQ5&~xkDX;!iMO`KD&_Hb zsLXp%q+u9dq17AFilUi5+thr8>`T;fBcxintfO8Sxy)T zd}fK0M_T$eS>w8jM~hh7qZqP`s8Z6zHGwCU>6hrJc37i^v6pT3MK{STqdPQo!I5D9s2EQ$m7t++&<1T<>kw5TIz{0SW@}kc+J61BW{xmob)qJ zmvlzeT1GuCmrlbv43_H9@abKTM@Aq|8I{szwv6lF>Y)fp0* z5XL1_n~S%O?iw2I>(4~Xl8J-d&|ZVi6%4O?-EwOytoJgw{&jlNi(g(=Xhb4wJhFX@84?>1{u0&??j2|GSxyH4W)6Sf` zwI)=KwIQ`HjS?Vvbp= zT!NNz>4~OQOwM==YaiKEib^f^B{5g;SX&ok1Ub086$SeF%DZWmv0C6B3BEmzy2c5M zfV8?5A+!-*7-hCHV)HBsW|D+Vs!XlLlw6`2u9BR|HrcpcGsdBg8}Z=f)rGyoHxDT* zAA}l)+qq>g3C@p*G!==<@YV%JrX_J+$nHVwjFk4eO13t-HZ~WD+QZ9}%0%3gJ(G@P zHILrselM%~5-}^HY%#6iJuwAi1M!HpKm!MbTFU0{&R-Mza_8qa_Byz%xfKs@f<{3< zkBr`o>{*YI==+yGQ#aU79(OCv61RmN!oqBUK-UYFrx&!7A>b!#CKRQ<=xF*bWtyX& z2+NIG>c#oXxWKwP)HYkrFuh2@zS0YnAC@yi)=*RD7J;AIa|4WAcIV}#VOF{MOh3O; z8nrZxnc9xQ{sAM4+U&AMHsA9y+va<$TCha6mt6qJs2j9Q%+=i{5$E3~dwa!M{%nmk zlhRYQ(q4_U?gXKoZU}Xan?+MQ)sZvEM0Rt*w<7HGgV?~Btr@trU#yM%L{~$(Tgxpf z8Y)R`5$P z+lPi?-jVUATZhV$jBH|IV&~@3zMFTAY}(R)dyp|%g0L=|-N=>~JM~@UwlHN&vPf)f zM?Xz68=I&#A}>F)>Nk}-Fqq|KGf{^_A;^9fyvA|TnIYYshK8mx4uW-I`q!_KvC+#p%3E+N;NS^@YhHrv0B5wFyiZDS3IO`G>^W!l@9ksj3h*c6Nwm%O$6& zrD^NoFmSENwN%HeSZ|n4Y#m%5<(jGy;Ff^B>%3cb&U@5pTs#CsTOl5=eaiLi>yqIXPhB! zs&AuOj;k>D_FGmmFH%PB$asNX4^(%R$Rt|9tWINd8Ep}`%Xb)i11q!4_ zfwm(rGixDgW>|Jx2tjk^l61|iyv(!hF1b|s+hztVsv`W$56+g>R`!Wxk2ffSX`V(c zw=RZ>HB)S0gE-k6<`wfEhqlj8hNVvG;N$gm)5d(pjNhuSgAdq+*`BD}Sj^O1?p}Ld zVWLNZ#0@Q(6}=kgxx`val8}&6_AK_WYN&9z==khE<=yRl4z4PNXOo$MYe-=rh-9rdc{pp-21Zu>`8BQo_{m* z>*Z@f;R~dkN8|1^o+UbRd!}QuWV`-bwwqjQ03xOYkXt-KTyfY&+bOlT2KQH&O&Jss zJ8L*$($vyT*b5xFGHt!V@B5x#zSm<5Wfy}KTYKZ#QgN4w1GYC-%;99ZPCMUhsuCEf zv`eWEm}uNQ0V>H(tgxHE(p3yvPtJnHURJY8)ecxG$H27%)GDMp&`WJJ=%q_nj&3#H z_1&v&by7(ftRi7(=mM$oqSTV@nPR}29Vu(nyG`6p34?IczsQ7F5NI%DrhR5AxMA5e zmN_AZ;jhfIx?&A0S#_OiC=8YgJKTArHEaQ-dseSpy=s|TtSM|xC(EV6%`6!eM(bFKCstT>9slCXuUT{X)t9ci?uu0;ENo*Nk+zj)=`LSYSan5V z)oP_%b>*e2*kQJ82#dFX%ea=}Y^)>IZjnzRzO~qxg?DT5_0#@p{_DbxV z8^~IlY~ijgj3!04aBe8qYGpQGT+jNCm8MrWc~qDv-&Da{p00FDfCz=jWMwUB-mq-* z;O2pL>)FV;Y`t6ZFN~UhN2dE_P_kTGYm+i8%yrvGHx#aIr_;+&9fbjZj%Q7LEi;Z~ zTPy4>trRv;Y1|jJ8H=XtR)xJ~dr$vZ-&`=9ZQ(Ax^VdBp%13E%rt?Ej_A0iUh)ntgKYPp_K|lu^8cEn>o{9itW1|VG_d&1wXQy0*<1@dbIna@nL}nhOQw{HXQf6Hr(s1qmzT?fqpHP; zGTT7jJ|IZC+{wJ^{(bxR;bDi63D?d2kJcCx^0+&)8DXA$@U6>J{{=E70FX&PUjE;n{FNa`Y&KdUrbZcO=} z)XJA73rtgNRoK!~O6Bm(%q+`rA=? zUILUhGI^ow+Ps8$iVt_T9{1F7?7=K$C|D`CreUgSmRI4Lda-?|u%q-v^J~1;ise*A z*TjvoFQB2h6O| z^FJy;^jN9@jtr!{LtF-NB;pyGPK+~{G>nSclgQ4rm_3hZ8OF9wqh*J!93dBZMa;mg zV_=AvG(&&~Z2-))TJ*+jF>cIFG5RX?nVE1hQVTu#k&c%`gUZ@rR||HK9f@4{iJf{} zc$DD(pyddO4iONByZ0Y1SSqq?t~tkcZsB;L!i>$~p8=3v%B9?@8X;WP))$fi*YEu$2 zxqUz~^pW&4>nyJC4v@R!*y2GJ;7&aLysz)by~OL;i&)GgU8V|{YqN5@V5j25#bD70 z&TE7i8l^~6qlq%lE}Yxxc4OpTb}-~?G9A>?2&V{B8F!9HyKGiFl)3O=^XE15EU>CD z!zVvlvMAI%e;m>cL?4-dYNp@~qaf_UGHSsNZOTB+l~tdTYLxt3+EL2f_c&#@2)p7r$`pqKdIPk!;GP78It4Yk_%U0x-MsTz58(I(iPah zFVvv@dS-n4_hBVEd#p+|I}es}LUR7mPkIgJ*6B&PrL7N{G`b-;jk3{`rA~nwai{Ho zXc$UfI4Y-UO?&991Ko3TGvg}F_d0HAb}`M%SzFWnu6h`Ey3(haJz5I4P7cgFEZV7rP`Ausm@%QZ7&ERqNuxYn zXDs@eTk#N2lA3wVK~l4ZnWeyBt;%$LriD?ao?iS+DYa>~YPD93nrKWX7^)Qw>fJ>q z{^DgXWsR?OUX=8F_oi$K%+3xo$=yYJ%(I0b2F^>GvETbk8QNu3hYaSUKx@@!AY`*y z=TFyJ(cIKQZZMlI^-8eVY$BULb>-4T(Rg^ibQvBQ9vmHrhBSeq!8&hhp0MUzD#=(Y z`X;i8I5d$7XKSWjnQpae9r=p8>&oI>APXhRW~!RAW<~Vb(bJ4BA~t7GMSSO32yDTG-y)LFjMoJY!yZy5&bsz( z9^5jp#aY`jxQtp@gsq?so_z4_Y@}dCk_$T>yGV}3>)DES;HqO-R(5kPG-XPGYYi@E z%sW3@B0<@4TGsI?9$wiM$y(T_y8sLlc{dU3lm?H_7lxg0HCA8fg<7m%@^$2N#@^5O zE_n&E*8T6iY}h11CUH4&Zs%_ce)fZ|nU#AY_&uV{=GJtM++Y$%eKo|Ya%A>(Ga9JO zn&rFx(o4~0LH1Q}s?PG+I7`al8Kz`LF}AoF%8#0eX`jjE!w}wmDVd&~&Mj2RIuW%0 zAq+Ou+k9QX2SGFg_$<4o)bWFLj!pHtppbP-HYp*k&d$9bgOMsr>9rs4>Wl)?o#KqHJ5&3!Oes1GsdI1bLDK)s*`3ovWEGK!CN&3;z)=Rv^d6#@qvwM(;t{w zTFS2unP$$-N5cI?Yd^jKHvlrKMcdjQ(U^CkfgJ(y?z93!>BUp6dbP}=TC9V|^JG^v zfb&k1)poiL@y4>B**4f>-p6fev3=l+!NS6sg49qNJ zsHbN=IA#F~%Twe_=E@31{4=G{eA9Wwt$~>RS;3*h{6Lg7Mx{y}=@I`k}M1qg@W!`;0HC92+EV=0PKArUt9@$tcT)nupkoK`odeMzyOgR#*ykN@};1 zhzad5YohpDWg8gJVLISMLM)ZnpToMh)i@#};j?L=dXMD$JP`esuW$rYprhw!J_WMcQhxciuYHT&ERV zp3f5OuA4tVa>n*2P%T}D=^zoN<4%?81-7|EpI`qRI|7Xg>qwvRwTzNd@&MuoW# zp5*3$cF**HSKpdxHRGU1VJw%zR)77xG1|rfzr6)EyxJ;Y4UX476nPe!s3NhFZHtgL zkG6LzRX%KKrY#*cWm{CRZaANA2hQExgS{n#rk8_NWqs1afrknftE{FK?Ui`Cm7ZP} zGBCpNrPk`Hv&SrFwra1mhqA{ft48R6FdwJyWJJ(RM>AXWi+gt0XEe`n{$F#+wNJo@ z3by;6?Hhb_BsA2>Td>ZpPjQ-6KAP^w{^m%RT|3{Z?L78AZ;0MHeCu#H_s&)v+0dG4 zXzkM$c%4E<>a-&7ZwR<s*Aj9>G*MJ|csUR#9^cUl}G(NzK;%Y9q50 zA)i?4ttoIn-P!GO#B$JLI zJ8iauDz?C>c`5W7LVuZCBV@VWR`z>D1tueKbG1bQwH4+voU$pCzV(@Hq)w)s%SFlD ztd%qM7-O0N``WpE3#`&;5f#6>3}ZEktspk(;*I#Tn?=sp-$G6%yX18ahW50L`8S5j z(sSFLY+4}e6vl?QgM}Q%a85eTA^PDACV9+snB&!{w3d)4*lzF39K4+~iD&>ng-jT; zfA|7mT930c__iwvVZ_35-u319%KAV#)rpwubf@N?d`GKh&J$;RA+T{0ax_2Vz2@DS zA6zH&cLb@e{g2evoFB+)l~wbmoLcP1ha_GQjhmgqs}`ZYF(~##_w3&dOp`NcsNF?B z`R``)PB*}<&b`6vQE?{Q?iXcu-44z$Zs1O>rMZoaZc2LRy3w6GhXy&a?*@KvNZai7 zdc3y@bM4;;%{or|^VKpkG3*2X%s=(-tS4t`Ex0?hZG`!xUbnc9KQP_1MMpXI=~-7! zP(P?v$3|i2dL|OhnmRz9AX;5o>p?g+zjiKZ?%Xb^?J(%tzvwuKJgy1t#NNuZ+hTz5 zL4YiSXO07uufxtzSlUmY2yi^+JI)kTphIqs-!>~Wfe1@$+9AZ+8tYiHvsikk(tJ3e z;ODmpqk{Iz)7WAx37I)B%EgH8kY_(-1(98rc@A?ME&X#m1{w+!%-Z|Bd-gejP*Q>~ zk6CwCRfL;rm(7f_d7qi)zS2u(Mz-^vrGqO$5YiHXj9^jpQEg^BuaxVP;~o(%bxLV z%R|QVZr2P{Z}IsKB#>X+ce7o$*UGPcYfayZki9@ST! zxLPi@0B)5CeF9y~F|T>I9L&zp)Jh8**lp=Ia^qVG=_}?_p;Db9%008?CtvB#=e|$F zo^2JPjbC^%VFR=&MvFLslVO#Ku%ixFM33JcMs}2T`#T6u9IS}i+fx?!7J?}z+mfxO zmCcMrWXe;`XpU4*+MRP3dbMXm(tldPMvCev#q5bRucWpJ!a0WtWY%xgv3WQ9I6_z? zu}ulc9Cfo}AuX#EJ9BxZpi{G%JY`W$+vnfjnNpOm6)__8e?+Kuyp@NtFqYJW~9=#nPMD9(F`Q+;s3&3e?L zc2>C~Onj=PuF>Hjfa2QTJ%2;X()p!j7t5)x%s$M(ED?QwFeh515X}?9$wO$C^DW7H zG|w7A8b#SL6SJbQh4Bl!?Mq&|%rLivbG_(rkFCe$Gr|pndxhoNgRLRLC^d7NKk~(P z*xsyfXwt?=vC&}_&{dRe&<8yG2a z8su#az7}Es@0s~qbD&74X2u0A*%?}B8pg4TYnObSN|CX$GfHZ8eWoEWol)AhEU=P8 zS)|di>~<0GxC{x(0$6GV4QBU6~&d9-Il50X%@DbrAx0d z4*k|IZ(AWlO~@|xS%=PzV^Ze}f81f|bm2P(OQ*80Ei9eHf9_%FME22#MU!-X`r!b{ zmabCnGY|(T$A1iB=~PTM8re4~mQLFFVTgHY&Hv&Tht1U|S!l|e{?BF?;d2pzJ@LWl z2#3@j=h4fk)W{WN+~%IK@eNj#b>tp7{ZKM5p9zd*QDz5vi$1mNIic(;VjfvWrG)Xq zc_b*k=FnKNEx6j4$63apy_xo607~9Rekmy1KTVn-O1R9Ego!|JFfJ%JdpYto?;f@9 zOIYPq5xZ~-(|pKFsD@lp%v@rEulmumSj&Na8M*E8U5PuK zS5_;XOw)WZM^f^HyVirEve%#OdbO2~+(^#1-_DmSE$ku4cThWFhbHpJdRn;(_?Gjz zy?PqqCE^3T#hM*r37@-Q2)eIn1m(ySLVW_07xB)EnWkF|1bM(sS1qI$B;eTG$%-f` zO^BmGeI~pR;k}}|ealr|~NGnr7j&u1!hdy#~h&lKUM>~g! zE87RrRjz&RBBVQTZ92Zq5wabq3E>kQhtP(QMb$gR*SJr39Bd|-t7B-j?K$*7;?5{X zk{t8XE!A<%CU#>6m=O}V-c38u^4{;MZRSquNmIz_qz9hc+d?}?_{=q>qqAaZ$p_qo aT=j(I47sWK{zpMeD*P`OkoJ54b<76{pRWMKcRwEU1XS9|t}jJQF+yJQw7@jpjmH!D)_5D4la=rns1W$O1 z;Z@*Mi9ZwMzvLJANB#K#sP=yrWC)TUgC~KwN={mB{Tl?YAU+1FycdC@ z=kJ5+_uqk{^RYBWcm}BQF9A;gN5Ct=+rYcPpLhHQcntBIDO9)}Tn3JV;){LY@!+$; zlfiqy6Tt^T(f>{06T!EE$AZ5HihutIJO%s<@Hp@*{{CMae*&t!lh<0h3&6{X4}#Z# z&jL4sZ}9lTAVZj(M4}YD8WeqR2bJ$2|A;St6I6RX;qM;;MbG~NMfY~obfRaC- z237APp!o0!R3?631HvN7B&dG9!sG7%mHzXf`1-#-_+e1|@^Qz9z%z(H3`)L!6V$jJhfq2b zTnUPqkUfm zD*dgX(k*!WWuV&o0Z`-iIq=EgkHGW5#qPM=YG%eVNm`0Pf+!obd!~{ z8XP9R5j+RH4^+9o0%|_JAJqG=foexGgl+)N2i5LJK+)mHAX6+^zRAkn2J&C>bp8>2 z-VCPTpMbDf@-^@z@Vw1N=QW`CdIzX_ZufWx6us^RHD6x@UIe}t6g~eClw5fP6d#|s z#on(2HSSLbQ}6*$eDRy0`22T3@!8iw_4h=Gp!Qq}itbl~mw;PA@oNp#_`ePm9e*1X zT|NjZ-4{TnUh?0dsQ%p!ioSP) zw}P()8M@>j!1dsT+pHbW0M-9_@G0P%L6!G$Q2qaRQ0dPfvHI==)s9zyE5P3eVXfo~ zU<#gvuvGr*K#k`#sB~`vCEq>@D*gBT{W=;a`F;necK;lhf^P#w$IpNlfL{c~?>_-W z=aWWF9-RlCNc?&b(j~WmE5TQSD);^1h2S?FmuhTwYDerhoq`sBt=Wr}6C#;A-LrLFIo7xDNajsPcaT zUJ9PO%jmHMyp#AeD8BnBxEA~&sPVe=X_jt>>(q5Z)*Mf>qf$H~5!4tvX1(pB9pvLKMz%Ag{!A;=mXV`ev z!OMuh5IhHbC#doGl*hjbD*bVHVH1F(U z)Oi0gcn0`MkADRe{f^sbbUp)ovhsQSCh&6NJHczf=Ydy&?*rBEZ-Q#yY0olwum@E9 zO&EP=@<$our{2v9C{vpRNgDUUa9{(x0f%qxYhNIxk#9!?3zXT;GkDsxAUjvFx zcY&hIJ>Z4lAArYzp9i;rUja2fE2~D&J)q|6bHSUymx33Ae-3J#z5}YBOCZuE;4V<* zb-*jY=YrzfcR7B^@q}5U?*>rqYJ!)6uLd`P9|YB(q-N{gt>EK`z5rCcFLHc8sPX+K zC_cVu&ek1wfMdk}0Ne*Is~ex~2gQ$X1kVKD1FGIX2iJl>0JnlqX;}N~p!oJzJ^o?v za^l|wHLot5w|-m?t|Hz7)t@(mD({1!=_5NCLHMk#K3BC?I7yK{? z36d{@qUW}z^A)K0UN8kGK+XUAK;?TQsQ$eVJP-UVsP=ptRC`ZuS-Q(W^?NJ018joo z=SRUOf{!?U13ZcNcfbMgr=Z4vpl$dx@CM=?@JjGKpy==oP<(b;$M9BA^X`7|Ebx!O zr-FY2iVu%FVEI>r>xl1jd^Mh~g1b!~tpGJ{+rg8;aZuw@22=2UQ02ZAJPrI9sB-=mJPZ6W_#|-ob1c3R z)c6j8DYy@OGWdM(9Pmw!?*o#+!ByZn;B!FL|9VjLdk?7oJp!uS z$K8W(5Ii4Lx}Sh5@9cYR9EU)adjQ-8z7$*oei0OXk9(f^MFv38c@|Xv?g7PbZvn*z zZwEDw4>>*zs^4D$C11V=YJARmzVX8lD1JEz>iye5)%!V6w6hFNSyc7IWa2QNqWc)h?>ichjYUf8ljo0@*o<3lD za~!;p_b&p6z)ygp&l7*n#%mDVNxTAH3ceRqd0zrIfTzCL=FN6+Gx0;7Pnn%~F1 z#OhrKUQGO%;Q8PSLDAvYzze{4gBtI@0!8Pqf|r0l1~m`TpErIP1T{}z0IL3XfGPM5 z$KzgV3H316ALzfa1>&JAM&VyM6?!ooBtw>c1XLiI>2Y;0r@lRfE^$vn6XP4swxR3a+gB!uezQXwRCU6Du1Kwpz3=kC_ei%cs2M{Q0+eZ7fdeP2x>ehz(Mdipvr#- zsB!o_D7ya;6d#}Y8l&g4!7GTr3sgHF0oAXQUu*SW4eI-p$KL>|{7?G(ANl*$ud{S} z!PEKvAXo<90zL-R@9{jm30xq&oM)wbHbK9a64(0V1VWvl-#LzN=K1+NUrhMp@WuW) z0l3A}=*|DO*U2foJDZ^X=m%?OKc-8vfo~6ir-NhQMWB96wWLMp5I+Tc87P`P#=ma? zpHF-oJl5Y4Okr z3w{rH+H1h;3D5DkeZ>dBLzQ<=B{X>!-?+Kbe zC-QBSAQ_bZJ%xAr{TJcp@MLmHk3aSJmEaE2T}f#3TqBI}e9*uD8~8hf+j(~dVXMDi z4&F&zze&O&!m~ZDcmGTO`0qh~|6Gs%06d3q0q-9R{=UEeKKOt9`IC-$SV!bC@-%bx z==%$Z{}%W%!m)%o!U5h5fs!}35cFH;`98+;GJn?l{~#RW@s)bvzt@1@BHTrI9N|TT zYf1M2xW?0egy&5>FA(0(bNo&5@Fd>-1e8qt6T;QRw}AH%zC_qS*hU!P{hxt*z#G74 zg5L!%2R{Wq5xgJN?-vZhzsvaduLxfzyoIoebUy|+6aJj=b%K5?d9R;j|IhjJHt>tY z|AMfa=ZnGkyPSuV@N0x$AzVxNEa7v6s|m-E{tMt)pngv!4D*O`dK7d?RuFW_bR9JtkXu z{w1C_dii2QN2;ql>wY*zFxQyqw5-#yHPv<%HXC9Ngc|J(^TSaoe zZ}40tbO_7&et~~G-t)eP_;vp7LOuKY*ZDia4B=A3rxnTl_L8V zpYYc_e}?cQ!V3wP5atOt^X(;sy*$U?MlLDD>fu#4yQ;EmuD zK>fZ-m>`shzYBaKLBA&x|3iDs{(TznUZi}>hHACOWT{=PPp6ZOxw%F?Z7s}AG-|D7 z$+9ig)?}$!u9VYieZJF9Tb0RnwNY;^zfBc!R zW9=qwESK7)wAF5QCfl86g;XoqLy>x` zU8=WRX{&m7g(S7k2BSqtz9DUN+7PCYmk6{|4-`7}a%HMor>tgWs?w~~Co3Yyr7K#O z9#x_>>48eK1<`x594s~K(8I|zJbH6F1@$NzQqM3Dp#i1lsOR*jH`9H zy;@E+Op~=ztCbFhcI4j&&W1f2WrlUp*T@9Le2w`)qcD}ym6b#DP?fPNrBk(rP3idt z?Mv&Oxrs`1RYu=fZ@>I?y3wvo=d)0t*dVgZTty{{$DN;Qtx9FKmp0*LR_k1;Hq~g( zwdVcbI1jXKk&Iu~Yl&3j|r^I}q% zPOJ+DYXBP)`yq1}p}A_SCBZq}Y;@+C9X{N1)B^WSwJPwxI54y+JoU&prR>tDSt&$2 zwRUx$8M)+anCsMwiCb+Z@GM=Yt@VL0Nf@o^&Ky$F8rz9U)MMsVd!_;*5dR0&hnP0V zt&pMK$cDQhAyzg!^|V>4BUM&;!ay7&ObTh8OR|rM(W&Y*0^3x9sfzTQE*g`FBuQcCM(GGo)}>EZ4zDnU(5V+c7KCxyCy}Y2 zh51Uq1al?SFLTYrZ@*Mgv@cQ1?%`3yl=|eB*P@<~V(17-GNP2GOI6I7bh_4E+V$86p30{u3FdaO!;*h0jAy*MG0|PUa8uHL|l_YPcRhq6aM$!hTsYczj zWYMHK*sQj@7JcBx)YckWU zfT6a)OyMbVh!yCsrlp@;nAxk4)r?UU2zz0eriX$>nG6g}bgH%T0LD~QSivwh1+7H| zUuG~pZO-M=Z|rpV6b18Sqk~?Sl9BXIFE3XPT;4&al^b(`gJ9ZHYlh0STrh1q0MWwo z$CfVXifLK@Ql#XApZ5-~9bA)Mv3773weCmR4%o~<>Nl`IRo9#pbgNQlW*n@xXVBHH znUb`kE53nRH*KpTF&iuuPn22l3F+)J81R}Ak#3+ZYNh#Bx)Q6fgoU^&*_>asr}hg5 zr#~C0wKS5%VS=Y?%aw`F^gia7ujxf7iECTYhTf5SexX^No@uA+1_!TAZ*Ep9=~!c` zjij!mH#gAJL42=CN9vPnDICUVV}YW4!?M^&R5`!|t4`Va2+=t?*=fe4l|z#i*9($J zE(hY*K6b#^o!d9<98H!G?Q^9C6V0+cN==?wZPTw(;Kxc7)Wxi*(A_)t4e!{(^!%S? zmw{~tb-K852{R+gG3~e8FadWt&cam;oa~w(;Kw|>U66@aJ5?0d{!PbHP zfzgU3dFiqMywFxpso|5eX5TWE=usAB@_$k5yreLr=t?GLf?ybH)Nr1(W6=B6$QHKkCvHHtL)g?{ZFms|E0tx5#T;6fN`$FaCi|Qg&;#umC99NUq884v zUZcnx(w6*6-3-NJ1joy#!vHnvmr8p#XPJ!6ss^hSY99!OU}*{$5OK+PnX}0jGrv;V z5X`&BJ)=W1^pfE@7QG>#%?w(bEfK_rZWAZN^`l{mVK_wMO%A?HyPAPEd`KQy zD2r9$4RVE(3?HJea}_*gur|~eYs-Dusna&t(^{t19DefMJTf|*=pPBHUlT1d7=&r2|Ih;STj^W+W;oF8slhKh)fzI29c4ai*E~eZvwv#ONfpVo*F)uEB>?T!` zO93++z{wuyj({%L%AL9S!zPe*+)Y592`N-uv&`4KMcHZ-rPo`Vuf5d^vPi7CwUU>u zEi2d4HY?BWRKu#PI){r8l~YOQn~h0iWFZ~p1&`}I{^Bq^^d05Fz*i1cCOe_`p22Jo zX0h7QEx((Nsacww?M;2ylnbG-dPU1e&fR?^Km(H!nta>%w!J*?%X}Hb;K9NIfmOQFS`7fU5iDND9RDp z$g=4e+H$fJ3vNzcSDUM5^~nNFq{EV3+qUc;L*Z$|!ED)7R&29cMu^5W;fhuvMY3!6 z&aJzLwkNxax?znip^DOfR})v-qV0@UdT<8AvquT+g2luPtwyJbZDO7Xx%I29c6G9q z*!O6cn;xXy2w8PC2$Bk39Y%$1A5Sfn6Wr4p{p@2PL$X^9bA9Blfbc5F4y(rOJJvGI z##|Z%YDf{?LRqd_=}?N4ucOH2fJi4RSafiQ@3&D^)Iao(t){?QjS$`- zBBxn7Ns>v`+x!Y&ii$EYXn5~q(OPJ=D|2bHfo#kc*_Hry&L*nu5=^jTK1)WeKre|fq*k*?%ztx`g4 zJIA%s>o=xXuf1kfk}G9eUcWpmjxC^87v{peA3(h_T{dbZ-Acws$8r{58g1OTvnEHY zHmPL|_9T^&5}iijTebp^JX$L6FHNHOlkpjr9dU?xoYDfkWmZdfbtY=n$#k?zJt)#R4X@Phjc7&DET6;D ze3k4=)NwPWTDz>!E{t4OcQ{_C9i_pp5f(IZs=a_qU>u)W#pIE;zJsi>q2f~?YkM3+ zmKjy9v~f+~NoDyZI;tO`Q#-Mj!|Ka+hudyN#WyMk0-yLRm|DLvZ6DTh7K z?_g6Nhi2yXG0&9Cm)o_~lVY&6*zAM>F$JYc#U1R!VO}o^Zy=(6pn$Fh=42tFg4{&z{Ko}fYGhOejnP{|U?n=U1 zOjChThzc5$ol(fnZGOTzhDTK zwZD;%4%E6Y=BkI}?hP%7ddThToiYq8AHNW|^NEOmeW3S1C|I<_|3 z&Io#ug1ym8lpnVVy0i*D9u_r#!BtBkuAf4Eb6mm zO~QK5Wp-Hav1`E=*&$8=Afs;3HZf0k1&O%$HQBp6&hlq#t_3MQQ!gLVOzTY$`)O0C zXWsNpZK@+@kcsTU1>Z@q&yV5&W432td%sv4`Gu~ga<7)_D;jE*`ZRhXh^u(^2LeyB z;9}!Z1En=JLgQ$fRc$dDSt|OLl$lCuPPQoO>f{!M+Ce6*_V&Yi@u5xo#4G8Mn}&|IWE@26BIsY=Bg7**em8u{} z)eDnDOy@sCG%R4^Ov%eLtv@8rmQIC;ZK(q>KD$7C(+6NoG zah{@i#u2}Rr z_I+_OEOk;xAFsDf2lJUTepFu zLPAQ}Wroi~UzVm9aulGDMUG^(C~~}59i35W2D4>Rax0ZYWbtL7I6L16r~?5aaeJ!c zqqet-UuWx$gY|UaZubsRn7xskKP-gOm9_@51LWEFpt$i0Y5f}Wm{%o>#%@JU45aBX z^hhj;HeH8woNelJ9ITiM2G#8qTcB9|*#vgd2Rbi)nfdkdt)TEFQZAx#ZyINbLT+a| z7E9sOeai)KBI0BXH%!{vx`}6j6Du?9H~6{l z#pSymTPnL4q|`Z-9w?Xg1#!Uf##(SV1zo3;Z(*qt8L7NasgIawGI#=1Qn<0gY5rPI zF=#zG3;I=74~?oHu~Ejr^&_+@raDrkVK%7J!#9p$4ZQ2at7COiNf@jmVeIGk6_|hv1!Yc|i7&6m7^EKSC92(1`Jv&(q-D(&Z zDG%Ic_l?$b1d!obxAuzb)?Ts9wrd8qx2CJ*flX{04U9L|r^|Nj93Kd$zVL+(Y{8ka zKAaRA7`%@E(krf6f5p|S2d}$wkc0!fIY^{~rQLKSx@utE)#>21>jwu{4_-4kxNH=g zcL1kxy@k86fm|DEvduWWHr>&|jF@Sp*K_`2Y9IFnnvI(lN;8edTFjdp$XB24;H@1P zuar2!Il@6sHfeRI;Cgm|LTReH%~#Hj-c-Y1-dby$fQW_Z%G!FReZ#WtBio0&{pTp> zvdy;XKQJCVJTl%dhnCg)hOjKd#@skEwsYXxYp=R);EHZy)rbZe820Nt>(gslc!W!H z_32WrFg@YhCGD_9r%1+PlNQt)wFFPhH2W8tfOh?g zH`y~EwUaT+QR{RpxUy_11W(8NYq6E&>GN`_s{|D6y({LME=|xAnnsVHV>+u%JoE<3 zuWpMp8$;As=ZWOVw$2y4RM1yb&?kiKxaT-uu}`3;$@yrLkVD%yy4|f|dn`MZ`GLtel*Lto3;x6Q-8Eft7(j1HudB)c(&Q`gJ zxhQ=Yu2!ktv07qACUA8&+;w&-5Tt2|#$@AF5L7GoQ&3&hLO$a-v%7*z&<~;6$;t?n zbTL##_J@0et}boV=$UD|u%?+^e2wsDE~0S5@6ngC=z8JLT*Tsrh-{hsWjU%%(1Om+ z_yZAvPMnie#npnE3$0L&13g&^y3R#=Hk3YhO=ab0t)Cw$+8v>esEYDjK%1jp?)!Nu z>%ix)T_}u=>I$LmMMIj_XHw@UaiOchN;VeD*#b_cu<%DhAC>yg4X{d*gw~o{#uxI^ zb%-mzAS*(Kt_oSf@+ZuqXuyT&DYA2uZN0p19DXoaa( zQ%sc5)mkx2XqB6hS^so5af!wkUqOOk$L4bl<){{GD3A?O&LCFiqs8O9{n7X+5bUrS zH4-v!*T-hK3Dwia?8f3Wt|iHVa9Qpjw!tem~H<+5h^YH$Iprc6E`#?gnOTh4&=B zJM8Vo*_K>+Rps?*V{%R}5S9X|?|^X~k}W_AZ*5z@&>{=n5h-Otk6IB#ZAmn%#KVTaVm#ELXMK zqLUc<`>}OqOC9=_U3|Q&_u`{f9RxoXk*sQ4b-EdA<`YvwMAD^3PtQp))ew!e?gB|` zx0n_lKVm9Bgj1%G9E-8iXZ;pWrPgz+(LTosirNZBqwIeeyHTsmpvr7X(vz`kMs`*5 z(CEPnL<8iB~i(2jc(IU8T0&Iq;hp8T{%&j?Qm4I>#xZ!SNg&vi>KZL8h)#9 zB*&|AnRu|pWhQ~lg^_GSOK;{LdFkkGTW-=iEiMSn28iAe*osT-^EyXeY3?tvbeU!R zSP+%!NysJ@#%&2S52R&dZh~3uA}V}ef(J5s!^LAG{cd2ItY<|sjc*eFV|}ut6$nEk z|A1J>)r_5q?{^dP|64I}DWsK4^~kp}O$;t6=7Kr7)b-4x&*O}?WklCC$7CUL_P}R7 zk%Ej5f8`3rkQ^>kzlL^_TPqAPz8;3x4!WYnD+h7?MQ&dkUhlKpn;XK)AWB?W4|2Ut z2Om-_hVocfwDchvv4i|fzQYzSlgWy%1w+9LEm%@Zl$ooEY)dvfU$RZuT%(sR|CS!f zs~PQ+J*Whh%2f`@a=bd+_T=WK$(JB}Y`Jf8rTC>Q5qR%+Jzf56UcK6R9)pU3pkJIh zSpOeILT6aGm zb>U8HWgTHuZ8dDH(bc{5B-- zRn#qoVF}Kyz{oORlHply5s?t1ro&BFn+#c7aY_3vQ+bnUr6w9qGUUbtGeU->G(xxS zx%Ni6ag?)r)9~(FhsF{F>rm>?n})WI4DB#|=kqS*FeZOzLepGE8_W?EVkEhfbkS>T zY1FS#i7sK8Zk6{B%^n0!h=VvC8KS+iJ9;T}Pu1+bu$VXs@(0nM_=Q!=TCQf7R?TIXjF0TtdMk!- zygsD?vhmq9JU)b_iZc_v%>7j_A#6Qha+TN>f$QBsj&^NNYD5RO^7vCb*d%_Lby0~~ z8VW1dbU-{`s|^J0mMMvm(h_r$rB<21>?@aMI_%pl-3(v71b2kAPxKzp)`E#IMH8#E zJla|D;m`>q9r9w5X^*Q}DyFpNbuYZenHC6!FMGbKji1UaoBT0jDNh zOQUo@>J3(l-PHvnmPS!j_AVA~85-TQ+way&ib7mOT99ZMP1^U!7B=j(_M}LLc8!i8 zFGsk|S5TfaAz_{4`vt{`or>bzq}{;Yxe-NB6#o3VB=w``+AYgh1iuuOcHeZ@R=Y2m z-P5vL(Ph*fY@8*H>LhP{$S%r=S3=lS3M}PGoQg4J=#ei-XpWl!u3V*; z%}W>i7D|fRMPJQlY6WOHIa!)8OAU3x2slGd;F0Hk7_;DOUU-jtiYW4hU!^)jz- z5?_`YY#hFIOc#1blFisc&M5_3ChDXyW~Q&=o&Up$3@H_>UkNg)K0VXXk_{#_i%cK= zWLadZT!GmJWGtCN_uRT?H-?E)1qSV%+PM;=Fb|0#s-}6cCgK^7ZYhPXG5*0%rlNeq zrt1m{cYa$;!pdB}+`!$+B@W|H4JfZyng67n?S9{6X(xO7nae{mgWO?JXl;*Cxh?4a zsOo&tYQ^; zy!mSbm1MS}?lVAXTfNwgU$&cLT~u5yrd@Kmp7@*(g#}}RYP95F#t->P9%f#ZJK2l| ze={z=L#&iq8+1w#r&;K*+a31M4aC#*-DcP7^ ziEX3iWV<4&aMd!(jp7ekSKr@hQ`y>Og%-2rkCAWx+5phCX&u*TRdqMm#!!cna=UIm z-n))+QMH-BWr-I8&Xca3S6ik-6)t?^GCm#ChV~H0m_*myS|~D7vMDS{{F*SsO3FBv z6F5psYjW~0$14anb9ULfNf8E`UuKfBUOMhhI#NYgfwahEUAnMQ=2yC}>KQJJ8*ddpB+! zx^qakgk@i>u}QF|HLE{)xu(sYXRCOxxJpv9^YS-~XZd4bTC?7jz)uUA)zQ^?=0=m^ z)cG_BY>6Vf`YeHt#z}tTJkA~#0o`MDE)68SSX~E!77xs#hH;C=TyEVJv&ss~XZ0+N za3wehY*)3uFKGv^wB2i`Rov(Z`<|A`QutECG<>{yytvff;=)DBYMQu?iNj(SEF*)4 zl_Y=K5e|q--uFJj9M%vmV#Bt8V) z>(rLQ&K20OdlF1TbR$PA?axclF`b9&I3@E35uEzrZnYGxJO^q?Fpdfd;qLs%`#Fff zuFf&AE9d9E36WiMB?TVo+8?)e5K-biK{&Sub#&9_FmnKMff4m7%i9(nf#hA zCD2uW3B(UVbQQUdiMl9`t7L0`I6umTE_xxkZ=~$@z?_RtcqueXP;Z2b+?h2P*FOkL z7Ma;5r><|tgasWGn#>+lDX~^a%u1^1FD*xt(e63qu6*a&&-=nvWZA(%Z$t?dPtTkE zw^&-L#<3E~y#KA%}G=8w1+%J#e8eR77Y-;2K$Z+`dt-ly8!z3+ZG z{n~e*&xKpxebN*!eRmUOoQfU}CW=|y;dl?r+S$laSvsW2M3|dh#b*od-`rdzYK1sR$KCBmY6g;I0|N%@i1Z}oIpjLWOYW3 z=TkJ>b+8;=BZX5!+16ZKK!l6p-dmbgm_Jdy<)=g@k&$aMFCdU|h6N0v^0eOEA5gX+l0+hdw~K}S|%u|~TWVHHPb9)?{TA>!M7 zO%}M*E{dakK&E958#`d*c1)ywm#wgNd+e0Mv6UrVD)&+3YQ^j1hqZPiZF2U#FA3rz zTrB6uB%|?>_QZLCqMZLF3cjaw|!i4F^6!a%t)Y7Kn zEF#pp>!kKM6ILw2EDyIUe4u?3VevZHFJTmuMKUHheRK=mDVomYx?oVJ-w0gxyLnCdV=l7t_t?asJOlO7U`fF=zKUQ$bq5 z6UO_&RlJM%fI1DFQ47(rW@G z>{iLiYSr$o`=N6GlCGSTTQR$4Wp|`(A41!-*fom^i}mzY;`GaAKyOCpVP}D8_tG{y zv_FgP(f{L8_&@T>-**?YEOH8UbA=vu?JtR&;_Za4lF*cmUhG0MVrjM*%$n3&($Yf) zY4gL{QB6ESzzM-tiQML4nZ+FP zPME=;FTZ=!X>mdY6^Jjoq9((2}m1g-r7qVOO zi%Jdm(fb$MO<%k=e^fc_&U?5(|7g-5eUl28>iburna#a=U)}njF~RsU#>qswgnl4> zF}-aZ$?WT2L)^P&!$Yo5cj0y4x~E7&Sl{we8~)0j7mP9tDTcaWc7?+aE90V5PA4`l Nu@)$aoA}(n|9{8B?NtB( literal 0 HcmV?d00001 diff --git a/gold/po/vi.gmo b/gold/po/vi.gmo new file mode 100644 index 0000000000000000000000000000000000000000..4495ad787f05bffd2a1ea928c442f322bc219e80 GIT binary patch literal 56321 zcmdVD37lM2nfHHPktia#vtE`!BI%F>ge(NIbrzF!Lb}<(w$fGUE>d09c2y;5a7094 z5ZMG&29bn_7!Uzbk+ds~@pT(%8e8+Zt~8$1#G8h94?3^)}$mB@#I7lIdpbx`F#1(J32 zTOU4>N~)=gK((tERQf^i81Pn5_51|*V(=@V%KeVVUx0H7{|9&)cuI$he<}EC!dHOD zf$s%Xzfo`w_pz68H z<7dH_6Mh<0yZ#WKfNIZE9)AbMgpWGK^}|`9`k?@- z{?~#O5#0|$!sth!=rsl6P~~VQco5j@aS%M7@a3TDza1n=^dNW%IPUSR*Yk|{`mngm&!Q_6g^jhigykuxw#so3!?|X zSAahT4+DP->itU*ZlymJd;xei_!{s$Q1OO9)#G|le6kxn34{g#2^-vJPj zk8T0go=<~n=MO-NjQ$9o3C@RjbZs;OJ`a2dRJun!{@CMzL{`41f|r1ofNuat!ByZ3 z5n|P6J$NwqR#1BIMo|3uK~Uv?2^3%d3RJw8FLLsA9Ej?PE(FD|*MP4D9|Mm7zX|I7 zuRR{N*yXz%RK7(}bi5H%KYbj075F_+a`8`~;vKWZ(Q`R?G~pZwt4CLY>aS0Ns^8B+ z)#IS0j!(}7#h+(`;;)N9m3I}W{@LZ9Kk3820$1?-fMrh4uLH&RJsvLsRliN(;ozTv zM}c>MuLeH_9tl1LE&_k;-=Ey+=+Xs>E(754;MJhYyB|b!qJIIE|McaKpB91Q=jEXK zu?su_+zP6nJ^)I7KMo!Pejbd$pLl#8nT!6%gDPh||A|lD2Z}GpK)wGL@I>&am5zSP zLGi^_Q2O{@@a5n){PUlJ(i4ZkL`ruwD863-o&dfHoCaR&-#-k#kns0FweN30_1nLJ z;+GR($}+eJd_MRPsQ&#psC54T9svF`cpUiepy+tSYFGbxp!lKys@_+FqQ|44`sdrA z^wu-}`2lNOd!~bmw-8jldO^k80xF;DK(*^Ja4Pr|D8BhOQ2l(!T8Afts`pw@^w_{3)pXo&lw24()R3P6S1td7$EVgE6=nJQjQxD0)2P z@o7-~^gB@e^x}1{yd|Lctrt{%-T}gD(R)Dg@sB{2^Y7s6z(d!&=LjLl#;8sxW zn0L0LOAn~=XAo4rJ3vG*dK47B{tYC{=!gxDE+sG~d>g2Ge*#o_-v{S{&+m5iT?oFE z@P(lIrwG0XydG42Zu8-ffui%M$0xvp34a+p1N=THI=!mLl|K)hK{yAB9yj{ukAf!= z{vjBH2b|;hZ5oKGjAnr+fE7@5dJm}jJq*4K{2ZwKo&weGe+8$5ho9@7cY+FE3W`3r zfro!9@7pQy=JI{@iXMryvycK)}_ztiGyaQBzUjij(zX4Uh!_Ig8vKUl8 z7lNmQSAc5YW1#B)Q*a*mpP>5T^b4H4T?8usn?bevv!LGpCn!1|bD``1Wgwyy^@0ou z(F5Ro@PC7%?+F*V`gDUT_cBm&_#sg7z6ib^j4pQhp9YF<7kYdfsCXX&RgZBn2IEUy z{T73#5Uzkqw-cNVei>B!-}~qD-{|z*n?Tk7CNKs+2CCnl2BkNC2EH16ey{6?Bfvul z&jlsVZvfTb!{AZimEb|(cCZutD5!pT2Al~V`6frFHK6#n-{W=Q(S#oWj{v_4D!*U& z@BukjzvICpdEV)<4^+AUjsgWqf37zDEgfV(sj`Y2nnO7K}ZwL z>O)6^H-gIVpFs8dEAlSiC7}9e0Gtbc08~GI*S~*W!P!OALDlPGP;`0=cr5rqQ00CJ zJPkZ%lcUS|p!oD!Q1L$M@tfdO!q0%}*Tec9A9aCe5xyK$J4eBj!KXph=XnE;ekX$` z5bgqB2-ZRM!&^Yf*8`yV@^j!E@K^r*(M31jb%CnS6`=a%9#HiE94J2cYf$a{Cs6qv ze5vDy<3Qy*2UPugL8ZGIJOSu54!LQQ1lrDRgc^J^H2NdKLJ&b1IvtE z;8EbN=S0z)LDBp0A;(v%LGf7$6g{p6Uku(0N}oLfE(D(hmw?ZGvl|yXLG{ZUzhVT!5qLAGdVCX9IWN21>4Q#>AM$tr zm3$NL2f%~CFN3cEzw7az!NUk2_-D`xJRUp=tb>x*9bgPT4o(Aq0GL!S93TgQvaC>8YE*O@zM)9tzI5()HI_pz>J_ ziaytX>Ze=5o57!h?*q5K9a#fkc9rAPr#=1voWk>Q@L2Fyp!ne6cR0R09DEt!lfc)4 zXMm#9x!{3d9u$4b;H$vve0aMLkAkApUx9~!zXX-vA3(L|psS;3F<1lD&z}VI;ES$t z{Wu8DBm7ZNa`OvN@n&DkTnD@gya4j$h6L)!y5{OTpiRs^_Mg zT>pLqJd5z79)AnIp71F!#Uii>4uSWBN`Lq*4zB^%5dIB#BzWe#9ba4wojZ*z9=Tu}Au180LfJ$@TJmGA+#JNp6>*Y2FJlF_?$c3e6(f9~LsS6I1Ahk21+9tK_wik{oSBf#%~3&G!doPCdzp9-jc_z);Q_!zhv{24e4oV63$fI0ABaLor@ zJue2;{(C_^|0JmX-UEuRFTL0C=^3E%839H2`@tFDA3^o=j1M{ea51=q@a3TT`?H|Z z{TMtJJor8rZw`17;j=-N^B|~x{vjy3AN*mL?_6*(;Q{dZ;Qc=Q5GcO+4fq=H58yH2 zD|b2hI2{z-a$pR;7gRZ)0#%Qndpz)dN52`Mp7(*O?=_(0;#{rO-g z;p=?(8{i3qqmQ`yoCsb>a1nSUcqgd-d>oV>a3y&3!;U`(z-ffv3oZgb4|ajidBnAMJ@{(E*Mh3Y z-QdCCH^F{z96ShI^)WZEJr8^d;a>14umr9EuLn;Dp9aqWU;L<}%SuqsZv+>Cd%)Ac z13vEBeLPI0=^$S6?_VOEBJy>I)A}Cz>5ig z3lu$OKj!-3LGZPN_kc6NzXg^4pij{ja0#e(-2H~uXL7Z83gI1_vtRQl(Rx_Ykx=MsJ!sB!3Va4qOBOCkG}v;2M_py_!ICW;Jd!!>O1eNj-Df+`eQfv2Jj!jtHHTnbN&BWZ~@_G zz@^}B4dGJi|@4&OcnFxCcB5{5kkq@X&8N`*#K?dM^bG2}j;|IWufm+%X@|2cRuI1GM=>m05Fxn9AuOF{h| z$@LlTFXFnD`wxTXfwzN?a~;K{KUl&3>V&WJ_X|AE2F14@;N1h@3a&qL^>IDOvzLRv z=W6x0f%iN7i(i805iWtF{+amd^*sA4u4}l@aUI0<7lg;S{)`LuH~Z<0+z)a8MXvC7 z2+z(SAU+F!uizOhVt=SG`+E=nKgshITtDXiCigh`|4^Rq^dZDM`Visp*Tc;h2tOB` z1J2|+ko%j!*MX?#=+oRE1Fq%z8TTWg{*L8Z$8{-Jp6iudH}HOxOMiztFh7fK`~34q zxS!57!1a1A{k@oX!{Ao%V_cG%w}W?sf5)Z2!@0i9bv@7j7Sx}3dpp+yJiCW$Gxx`V z*KqxW>trs5Ap5(P`&<0Ipv<*|XWd--8wc+IUk<*L>rw7s!u4_go?H7{&i{{d9nSNg zgYV+{8?M{9KFW1kD*j({{{yZod9J@2_p3n3Y|Op>jsQQw^{?Fj7uRC0za>1E>-${a z<g-+Kvf;gW8<1Kh(^;QA!j0GIyW z0zM4(`tXPBDf|nTcy=+@ZthEyGzV7e; zlKXjFAK?mrU-$Q)@DDx-e%#+nZ=cWm8Q>SVUdjENef-nGGS?M8ydFG+I1IDV@!a14 zPUSj<`yX@N%@zJ0^Y`E2!HwL1AM8oJ-{|k(oqBdTael*f7+3iFiNARbSoilsq}j&x zIl|utFXURzrN67W-oyR-!Eb>_gHM1Pz(rg~ajhb}1$;lKzp4Y93+DW@w}SI{K8Nd{ zxwiY~KjQvQuJ>_$lV{WX^KFFnr}69nt|HIp>j8hKa{mtS-?%=<{bsHcx&KG57jX4+ zP2swXOMg|~KMno}{2F*0cmnuSF8zIj@TgE1FxYl#+ zCVUF`BJdWjmvaA6a1)pQzRk6Z>x+ah1phae{_f@a3%hIl_acA0l(?sH|DX>a4_3JD z=lYp{)d>PLH*ZTXbz;6-fb>JJp?}3kjAL05iSNL1W%>}&s9=I6%82A(z{=OP+ zz}N8n60X(UU*_Zd5PTcgG9P{c_$8laHuo$2b3HoI-@ljpja*j~p2789z2xt?{{2DV zn+d;x>;G_F?w@~v`|#Jn&7X5U#Pw(4A=t_Fd9L@7ri<$??)!cEtGItHSNiX4-p%K_ zf`^ZQ*MfU|gf|gBflGhKdOVf;mvQ}oYYoq)b3Kpyw{ac8rN8SPM0fc#e+NFy^=|+C zw?e|d@L|DV>V7Bhwh}IIeVO|_m;Rp5^%d?{bG^Yo+r+aUa(#;H@44Q=^JBOU=KfCb zB2a&?_3w{ZP| z>#Yi;{?7IHXAd4^6N~t;}nzF1|?aK}43;DQM9;(;kYN4-Itdy%$c(=ANSQ#FP2XjM&;<&p$G*lU` z5w(^Z?l07;^Le^)B)+ULT#2Su<4w6@sgR!^Ppv9ctj6UE`6Y=qk~l3&-#V1a!p6DLB*qaK&g>oP9DQQ{vIv06Hvca@(X7lwx`!%1V3aJ`%_Y$}#1Vz}VjAJ-~Inh9wqi8~|SQW&n% zn@uUV=7!5q%a^-q>GF7KrA$<{DYvOspkL~75rk(d^;8!oPm}c3T4iWx(o%B6eFMcUg}7AQIGpqS<@+#Ks}%-^YN7-z3AIaNidvx> z=W20f)23>n<{lQd^%V+v*DJiRdMt=*0|i&3!Q4o^u|V$)57&okR=15gTJB5sd|1nE zq)p}AU_tCWKUS2&wpxL%$=hRNs1cPtP{`#)w9D#kVirlXO)*21zFgU)W0;h29&zZa zA!*_b%b~ASsfwR`s8Xk;5+-;eA6Lqyis}M8kHkY2DDKiEvF!CwsoqZ)I5Lh{4CASy zx>Q8*nWs5$6XH|K@TB!1LMytvOzcUmQi-br=z{q$D0QJqBaZaSIMXi*S?QA`yo?-3 z2PECuNQQ*b@U&`~4{xEzhTu+hkyA!i2DB&)mqQzz7MWpmug;&EccN1)Z^@O4lsIIR zAW$#F(+b;$=mT+Pyb1c5t~A=l<@(^p!tnH@H};mkOtG~>e>zDiSFQQ}qDxG97;~Yi zCJ2+dxm+)mVp=j-Ea#|`HBFtW>Uky|ET~q}R9-kr)k0x&Go1!=CA92dDxGK56f3rk zBi2vzY}<%Ze%XlIii7n*-+c%mvk8L-Qqs9*d0g3e zDV<|v7%Wz+qFMiNr9K2reWwmeA*5A+)yX)qiFFh+=}Q-IF{D;Q{ykJoaWp$mdr?lAeG^ZM(9$gOKhJwy>X;D6Ik6>6|m4GeMB#ZC>B zsb4D?g>pi)A>+9w9?-Kb&9agiX+6p5Ni7E+dikk-qIo*XVpZK2)Udg9!x@WAR?1Bz4a9=Zctaaet|@5wdtn`c6+*ZbAwf z(jmcwD)@W?m(1EWb(@P*Mc-k4baV_9O6Vy!@<_APtGWIH1BSG;8C!0Q${J`}hq1*H zj`pEcSInZ>*t_Kp8_QJU)V%)1u0cMqY;n)x-tNv7YdgDodKa%*wW7;R3I?R^&ZRx8 z)^&BqeWe_1p30!uU#{2?)!n&x!_t+#%T{ezK=g1gHElz`8&TDuYTs~iNCq*(X>n5# znb}gz#T`8-cXYT{t#a3-B!^|QZoTTUz~i&ZecIv;YpqVx;~pqJm~%r>z9>Vz4+Bt= ztG?G9LGv6L2{}KUpoD$jRizl|vLY?2)i+jW#&K7npB}<8H7Zvb#?g@W60t(hm$v3c zutd##R%hD?H8Y-V5v%mH^av(cu3lnR#E?02O7yzd#VgkJ2-dGL$d54U7W?$X-#V7A z>PcaschfL~a{9h^AU|y3ZD=}%#!6Ws6F4{2`(R0ERnm=_AdTruRb_x0&r5b#!d37fbmL46iV{Vsh2V;cQ`q&#`y|!3srDXBYCw@Mvk`@YXdM$b%0LCh;)`oN2w9F zT9B4Cd&fsgrZN%n+-veRX>qxvA`BH_B}Ab^qqa0d!_bX75Oefas9uNla#F_;WGvAAihUDnmFJ1mvt^{%}$FmvjuTesjgYX#zLPoy=1_cXquzrblg0P zt5s}Ndt8nC1|%WWF8wfH%$HBZh_rXn5=}{iw_;Ph>?AEnkPVlmk!-BymrK{3)729# z#rTf9FIc-|-5SjTG~ekE(VJh?ZTjn94HWt|LsX}Xa{0V;pqH%*4vkW7s2Wf6N_Tp+ zH0}I~-JeYq{JjHF1VRwmRBAjkU)Wgh??t0|*O-P3Y53H%fY?JL!^QrAT0Cdgthw>> z;X)zqu579?k{9CT6`V9Syw8YNmHSZqOA|F_Q+h`c#%u9N9sVsbuUU$0!0kEa_*FM+ zmnuc;<)wKG+X{Vkr))z+3^DUJxjrpyK|dBZx#>LPbYEY6IOHh@i8n$tpm;SN-nQ{5 zxxR^7*b#E5m>nR?F~@vKBdv|A60}0F3bIMD*EX!{?d)2HcKz=q*F*}ENq{C+E<%K( zhM3skozeeh-{#{p7n!k^Ex54BNb%Lv!ja=%3k0HNbwKjQXTpm*Jg9_xtoG? znO2)}wO5|c+vcfA`6jCYj8CGy5j-XN+wtJN**qr^$tTfC7l?2n4D*f0;RT<_)Dpqaw<&`DO zvEiJq^^1E}+8|AE`I^Nmx}#-G&Erk-+L)E2u-P^HsnmV4zJ1VYp@=^8PTXMcTCSfV zMKd{exIo2;$j2f8k94od7Mt^Vqd6K9ms?Y#`WHE0j!Fc7yOR^n={#W2V^&294*V+hka)KBpp zt(r+SAzQ1;)&T~b>gM9mkom9V2MwZ&lz9s)TIOarvCMR)Pb0VtI@g}FX0c{|QRg5I zD65atUXU(v3P@M@NpjR#-WRFtL|f)U!Dvde%iSEPbDLR0{w1qIPH1xVT1E5lK89EE zaManBm3c)64Hj^Gqo!aPwN#Ydr7=sH)gDS{5lJhWvgfE#-V9$>OjsD{zyqK@q7CIf^W;Dk`;sGujxFub4|2n)e`IQHIphX zgn@owacMZRh;4LNI-1souo<(z#!qviR1DPk7S>)Y z2DU}Ml&=pCO&US-@-1P{fEemm`e~2_3~Zr7 zeEhl%t5&S)iid_PeR6ilP2N;%@AMY4HPR*1l8ws0-0!NFidxEDHWFHo1Kc8|l$_DS zM^|rBQ5gh&UJ*2l43}yqYq!*`YBuWP>z;{c4QIUvL*KDGy@O>2@20GLR|#j}GZv^G zjr<$&B({BW#kGj$#6Lr~onWmP> z3Nor;Q>^9VFcpjEOi#sgW1^e;;C^gmkbR+YvHcL#p!GjAl5mSl0AePtVxelbc<_*s_3}GK$s@vz0^IDYJ@Ijm>aq zGLP0{1&YC|mHIG~8RsWA7gUwuxk_GoAIx@Vx{@=)j;L>gO@T!Pc!nXs$5vHrQBxe9 zytJN)Hdw{52M_{Y2aC)X;9h$}&ik<~g$+O6a`k>;v%YOmw-{juMv|(O+ZMC6fqsSb zsQ13Yu)KOj?Ru`;hFHFU$0LwC>O4LuVE!|qiVc1GRnJD09nyavlaj(Lc| z0zwYINwW-k4}^n-o#(HYt59}hcf;ozJb7V!?M7t1QEZmI`Fr3?S1>O_SNq;I*PIf$ z?NE*Y6d>E#ttGV1CN1V-GD{L3n&E0sQ2+h7T%2(gWYOMatukX&d+z(9I#OjO8xL1d zwuwv8MS!gnp?1s28<9fq6>As8xh|dOtX&+F?IfQTGnHvcpj%@13f=H09#48?1D*3kpn1L4R1J{f0;G`L8bVFn3xPn^*mC{YxTQ2OLVcbqhK=%kO7#TF((t+WG zC@wVHGU{2=jjED+!M2oyxoX%cl3H$Rjw)*#bz=(=_AazA;s0Fz(p(?*Y1E@ha$p~B zH_63V^)AK*@kpg^jxjAr~M$@%5Nvco8)JQxYHG(iCWz(|avstRb>@>jtc6Om zCfyjFgEFndEn%*cIdh31uF5l)H?Lc&vyGIEJz|XK=SXjAi7CFwk)nEujT|#) z&YYsL9@WKm$aA0{vkk2d+SW-aQ*N*oi`C8Xs*~5n)0lBMC%lavvLQ0l9=Cj>?kVM` zTYhqaBT$35vY~`?4!Jo^FsEF+t;2G^4&#S%PI$Mr;C1GCdv_K@7H8jP@#hUNl*=() zwJlhK`|MUYPb*Z6cE-pMYC-U$Fxo}uX`vg^54kZp8+3CV2+D3%Z&XDWE$r^OU`^*G z(M5Fb3?s@6H_*1Hdbl_mqaNg8cZVF zjH>Y%a~xF%Ghd;c_d!n)4OKf;$^(DMUTlNhe+DHnBD8(?I5>jvhKHCMT(b{sf7W* zrOGT_=S#!OEjM`G#dSMW+GJ)#k0VF?#16Kx&>9^09s}IjDt-t=Bs#QSDIAW}H*xnl zU1r=#E;LOq#aW$Ojo48sD%sA-goPxp;f*b{Ob9kTV7G&IP0~Lbdf7?PyJT^9XYb-A z-I+{UM#2_Z6JiY(w`l>_8({r?9iFCWUz#MpNvoK_5b+buM$IfcG=Th4mgl4~(<894 zuXIo{_WGgOUYMx6eF@On6VR5`-S*@bkLG8d1xbax-d-XF*6_4w2Rb7_5RAaxiDR33h7`7BOK@?C{lBk#FrgQL?eS;!m_ zArz-1;wD*4RPh$YtwlC#e>dZ3Y>r8sk?dfXl_b8S@Iq-*JS};rR?{BDkmobx!eYFe z9wqy?I{d;zhsmRa)mi|T$Y-55wIWhEk4tcXPE2odzHdpr&$PQ|2?N$rW_P|*U>Eh6 zZPRv-s!_0%Z4k8)QX6p7qt3BYtH&nM+OvtVfc108vJHoa*NHVMDHU`3T0)E}&JlHE z^Y*xqG<2`?mcu8Oml~!uy$MvC`skr|n2UUq0vhN4H>0oXmwo$N4 z%2_-eXL^h05*v^wJ|=l%nN@4z5?M1W2Fm$u64>Slfl5w(n}oJ)Y-e<&=1=N&TgI

pY;is?(O^Wp7R4>B@o z@0mD3oMcu8;f%C2SShfI<@!q&XxL9(4IYi>p6ty3fYI73@CTs5AjYTkIKE%M1uJ{XPZ zVOl)RC1KWeGG4pobc>fPW{3HVWahGG;NjWSZkZ z#H#GyKtVGt{f3})v8wX?_%fVMZgDp9GK|0^NOx^g)zW= z?x4goqantVT)uaZne;YnzuIuGESEI-h{1r6@1^be-i^aBZ=akRVXGvK&%~fQwc*N0 z+xL@ZUu7u4^WHA+t-01!v)cDgQnHKCu4wlbeUbUHCA7-D)qb!^-W%oiRsly}y!$dL zS~b#kG^HAE-kwCW1p|Tazub$U(NIX{Z`5eUhHZ9aHAQf5*(w=0AWkF;vGJK{6+vGw zSOb28G^yb0u&vUusm@?XONAO%06ri8 zX)Pp2QzYs(6+6W#VVsm3O2cI9SadL($s6BcczeZ}%9hH;a>Z#_hrwX7EZYz=RTF7H zuU8Y}#w#}GshsfE*EwTuN7-0z^D^A2bxoHoo3zZ>O9+)Dp$4_BmFDrcn!LBcKjhzH zP7q#s>a?;#d=$6lMYWgqjU!&LgbOo)vmzhSOK-IKWW34EebwN~Tl0u}!NcFuREV5LTCSOmM zEs~7VkIi&xYkK&?_id^drdaWyZMC%z>`F`q3w%TEbs!#4&4n_Cg=}HXc_Mwcx~Z@= z82O$C)u`_F6EOv_`FP8X_Qn9-htY^XlpAI!_dVTV%ZF~zH!ECaHpkt|>(DO~qu~iB zGc&AY|2bNllOUPIXb!BcOIqO7rywakk(hR=XN@Vjje8ocT*u3lo*^BSimYun8i`~V zn;r>~iAQ`!xMSEtn@J+Nt42W@C59L*>Md?3M6V3lBG1+VxkC`Mu*V~%2($USY8c;! zuN~D(=~_chC>B;Ln(D_(Z86Edb<64vNaJtrR3t0v&=_87-S;LqygP-Cu^*dx57*+`j>FI&WO-)Qb7vk<9$W}$;KC4`4@SZ7O9uyss$Fzohm z{LyHa%gytDCbgF^za1!Yj#4e`ixD&uxJ?y|8@9s3Vxv}_3eAI7Q2T7Z=OBxkc9Dc5 zF?^mjm-in5Pt4z2hOLr|xpVbx@s@n9*Yq+U+?8x`M1z72)snO*2tmGAvG*FO&pfuu z$-eWKkFzNo%nvzr+Z9%}N|pCoDJOj8z0@ki+FPL}$tra6%F(SRcfNb|ostX)W{o0Y zXlRRA=`qcsIYp%v2Tck6(BK|Q^M!}LAk)-Ad&7{488B30S(MLIlGU_z@K>_ZIek96 zS1S7cy<=6r<6L*1$9%r2qI>4doHJ|Y>?v+*M#tJ}e=*;&gbgAcJr&NYV4EYnTdx&M z)kQ3F&8!UfPg%dNr^7xMVRYzN#zO9VzE_z&t7FzF{EKJ5e*UbvClQ`S#EuR4%r%N+ z;+@(tXHGn4&ipy^PMS6Elvz{OFyriCVYggmsY^$hEG>=HSi9-QmoDG;8GROBG|Vy> zpW~GCGs|qL%+=2%Wx2o3nrcT+A;-6S=N1b!bpWI38C!}S=XNdXuTxBv3!gG3-cg$_XQ%!M$cXYBhSuXtf z@m%KqQ`VRGh_KYL91V(#v&@Dig4Kny7ijMiw+m-2m~wuH-;=9muBr4b$Fsws9i90i z!1sf5IWgzSn`u?tH@^Gcp?GLuYzHd|ld&10X52a4mP*Vg0w*yD;ZP%rlrf2rOM z4UF%;kMlr)2Z!Q~_?Ioy_lOVW^C;CE9zXGbUOq9Jyl>=*P8=k4aeVjZ_!@A0^zPy$NBD?pbut;- z-4|;ghCj|{T7G==Asp*QJ?N%3=roRSvd`f7=)HY`cqW9Cy;%@%8~b=F^_H>iYFp}w zNMn@k8z0@_x{r=|gqBywM{kMy$4BoNic90WcZiZY@JCr#dL~vlgOZ9lh0r*!$5S8L z6N$@*Gc@WO*z<6XD#8`&_3O*(V5nD4s5~LR{Y*atb}NqE&$8I~?wzf&r5koq?8dPj zl{j@mkTD@dcypZrELWES2N7Uf{(sC9#G0mko=@H)G3fVVV9}bmq-MO%Vn)(1qhllF zm~CRTqzvO|c;f-}%w!d+K~wZ8{8NVM`S^3s!*yB~4ouRoO?a%PMCF055F~Wa`RkWzmb`*nV5ep&4aHgg1qp8=$E{{nPhv-g= z_!^51ZV;$stSZW7`Ab zd6ky#Ij!6KdlNhKXM?Wh@@pCJW?bfv-r1vE@J1*uWqzGUi8L<)H(!AzE$v^8L&f>%xb z2w@5&bjY5E_w0a4Y6E&{#HV2Gb_ z{3tqJL`4pZ@idmq`;AIFi%wpGnM`MS*7S@jl0hJKiEoOR)w^s!LafB@~nxhkv6J(6DJeiV)1zSYVp?Ya-yJbS})JzjV8@7oU#aZBln=wgT z@0AC}9vyT;Vn#JrTbWI;CJRv0oouG);AB0pe?L;-=R1%j9jLM<>5(z>cu3hbBrIDHDq ze8>wV1hw?I(JEv(c2DEPxzI4g#|(qk# zoz&_RlVfl;>qj>*he68QIC~uvTg;k_;%3x@>BIz4fKn}I7p)`OWJA;qY0#s$Ba3Mz z7$hQPk%m~ZCK9P=t!2qOQLSzmN5CI3WudtP(jlcLQ_zz=Jvd{+H`BXGyo@4#bZTfc zZQ1kLCDlub=u~&cm)A55ofC-8((&&I+BDVqP`7)hTCGb=ky&&ZxF0h#x2&-y`eS`a$MOH8R=h z^~7i@f2YSxg}u3+bMY4Y)6j5x%qLkAbd!OEOU!;8a@qu5z%JPG6b-8|U+0T#DFaCrTo3<3;zs_36mg(v7>M%!k z{Lru+`Aw4B6`B_5Vm=dg*%nM&I^W^EK|D#~Vg^Lh&diXQI6!E75f=cRej zXqP+J4dLDrbh&ouFoV_LMgRe$U-aJ0~ z&c!y;{5fAE%9m!|^9HXcordj$8wAb&fM&0E7Ej*BgLqow3_qIT^dg5Z?R#D&Cygn) zW11FjwfU$;hCOS?M?bjK)zRsNyU<5ivky?Uy-SWuDE|eE4|3_*MBZ0+U-P!)vI2ID z_>?JXp&^rnjW(3@i5l+KxIDIfWUpX$7lV91_kzYeRk7 zZ^qe5$;cQ_YmiI_6s|zu**NoHDvpf@G|KrGZ!flv6&l)z)+2W^L-WodZ>d{#8U@A! zW7}nN_)#UjFca-HZR=#+%Z^2GI0qbz|DXNKZ8TOS#D0gQQRB zhOV()e8owpGb4w={Hb)W(}2)CsZ4voq8_=fSVS5hy^@5x;_{Q!+|EpN{wkxYYP+j1 zUhlF;gfN+Cq_KOZ!<$jrxl5YT3a4#2NR=gKtXqptDY53%J|n%xcRo23KtN}{Qz=gfu>`=cc_we|HP z=iNI~dXP2KRvBxw3Lb%dFV6N3Pf}QFxNl_o|7B56-YoUs+IYw)Qm=Sgnr8kq%jo>{ z+P;&&hA?N}Hg6p<)f}BKQ_7S-{dzAOOz0YOy`+^w!#||nXX+x6ysIdxg+abis-1ut z#(e8QTdBQvD3)VF%jHr|uuyt7Es<-ShKV5fIROus>r7198|SCyfdl3aGpCqYl3KQx zaq{1{MsO;aifd!lii&4z$V3I^m*$( z4oyngWc$@!A-z|@skEw>_6Rgv03ihf7h9LS%eY|`nAPc6L<{#ioin6JYpKK!+KyU{ zL=1T~IQIUaei&u75SuDLjPthjCll9eB{$78)6W!xgd(Yy4SX_yWd)}#Z5uQ&mGCNr z+U!Hz8P=m>GmXIbpKOS9{jK#%%c4Wny`e9iFNVJ}anodSV(;8zT2w7za$uY#>8eQE zkhYLfQ+XvjACUQ2Xa+UKh3ncfcsO}{k9ZHhmf`R6;M9h2ac(LNcs zu8)ID7D+P^Y)_7OWfDn9dMz+Prem8+_mY;bz4A9zsBz3uHO+ZGyR1Hr%v#n)JgvE# zeJ>R$6+kyI<;}ChNmFBVtCyB&?bvO->sOAC-q^JwI^UT!&ag_2O-9M!zzT~V&fAt6 zww5qi+J8m5+6}h@nt8cqIu~i1X>7E{Pn7ZDXEhhbLfG#V+?vt`K~K=?UG>mH3Sx4S z;*CI!6$ro(w88%%zr*!x8Q1(6A-f*`KaP7S2g9)zn;BHJPSBu4TiYT<(nf3spwVmA zGkJJtSFgKWzjEyDUA>x2dCOU26l;TwUrd?@Q@*HZsU~8njSEzDdoZz76)K_0fph$7AKk*VKD358$((6(dL1Ovp#xYo z>2my-QlCz9Xp5>1%{q;BX0*h*3q5I;pBjCY_E=2xB^JE~N1e zzlkWXiDX#bOht4xbsLQ`aZ+1OBScb81z5%t#T+Ebj2b2h?k8`)Qn1??=9!LCc7M(Z zuoM-u)M=S>5vN13J?ynivcy30n+%v@Iu_S?ui9_(KgY&cP5x9^x(r`27WXVtHMoY(ce=zX>$~_PDp1TTx=!({82J6N~8z?+6CJv^W#Ui7gm~I+SLu|FV7lpQ~ zoX%=*aUE;FiHZi(B5u2F1lcl6m+JL0Z4eWTX4Qu*v zr*>#-($rkjc3H8l0e6H}4A2az&DhBpA5O#NBVUd#aPneqlgUd^MbkTIQdwi@25*>+ zi_JM_tJ<8Aqd+PTW)8MLv$;MkjL%d@H)rcRy=+5_*@%wF`!FAyyuPW1Cp3LFEoRX9 zu$PPplG9YW2ngpcA|f>bBXP2N~^;ipPF8^ z#bKFM`=1(jWnc8ITG6{~ zeE0obk>ojX-`f&^|H{w`l8FliK8!MOV|jC2Kd!P^$82Tyhq~e=URA@e{G1wG9YJL%H zMf99Zd29zQ=QO6rtMoIc=E;(_kncb_WOf{}u!mREZxZL+ekBMyU{fU}Y9r%|VVsg? zO149(1x$k6DyRff1DVg%_FlUc3m2tfu-dZfkc;fwOBB57wjfuvDmOP>{T?Rr(5IdM z-Dl@5XnIgPdsEKsR1+D8nfj%yXc@c1xzGdY64D<8MQir3-@&M6TF{w-uKuRA;Xi$L zX6t|4KdLpXNj7*YUbIrXhW)(GzAJL}r|7G5tb5!bVsBC{aQ1noho;&1EDwP3NIPju zwgRAhQhECtwBN5bY3wwWY)0iMvCnBFar@;BLUClz&X(fvLxbO;vo|e1KDs>`HcNLS zqRFaOIBDDRVGERYCtX|HOE!)5NfrvjQsu%W%s}3LPH)f3@zD=2Ww>d*6~*MlmZ;!e z>5|lm;T_#adi&TMBk!_=dRaxvoeCfVsPKAio-5h*a+ul6|T-h@I z%xB|`5l65PMQ@Q#c1qc>u2pO{{i7MKO%$c)({yb^Ra|V(O!6t{;BXxG`xIAaU-`i- z*~c(_-;&zF;$r897gZM6etJDuH$Kx;AK0M4$YBPgM%~O|740sKjO;g#81kaHqMoGdU+J0k!8k>mb^%*I%<}z%{hgod|BaSBZN*Y zcTS{fW4I2zXELLWesbLh-SOq2%#@~UWUZFE9eEfespHE<1XO#=UE@0TEph6nH*Vq< znKThI--*krQJQ4R+M80ov72#*xH-eptUS0)FEZ2vxrvF#$?XW>=dMw#ZiW>$7PxP( zolaqt*ioFKSu~b0d$etF3$KgTi&*`4GN4^0e4@DCmVuVqBG^*XD|S-)v=!^uOrMgW z`6*blh<_jZvKqUlr>iP(6M62UuI3iy3DZBVQfn-nIi+RWJRuafVyc1F)_zP&4Rty> zUD~yw5M7lsdw8TyGW!Ce^Cw>m=s`z3sOcDc?fgCnV*>U#ipVS(o{b+I&G%4W_5(|* zv7;t ztRFV0>tt`Sz_mj$MOdDS*I|V!wb)91q$;5(0kas-C&4l1+{1pFZtk4_IZoPGHE3vSn--eWIUf2EnMwvnPp>FcCFxC zcn+>;dzk!`DZD+968zHp6djCHJ4gEkffZ0tNiJOw?qT@lYAsOWm7zRCgB+C67vN$7xA|41w z*Bg)c!|R!kvEV3mDNBrx15+^<%n>II1zj=lV^bg&KNuYU~ z8v--F6`4xOjHzk!v>)RX#qXa^J<+b`q&j3AJ~gwEU6O0(hwO~C?^y@8@?hCUZ+eMOX)uZ$hTIQ(EGb@X}LeLL3cUSS-m{JE5k=o*BAgir-BM8NRX> zr(VoY_@VJ8(d%(C%(Ty@5t$a~%Z#*8w;%yVlzSz(+jW37!`E$5 zIv~q|4Xvqt(!m&Z7DCbi7B6u(5@H>T{IFs&{+O_|g%&{Gv8i1)iLkleY?WCyLBsHx zJg1~a-T|5}R65excG(`JN(?)EbtmH9&H&~-A&9t}47xg2*$~dvh2UPm=Ec2L04B1{~ua zR5P>rIya}UO|9C=xi{9SEYE58iwa2#X}#^H-g@8+E$!ZEdtjVlm6wN8Mau~hRFxaQ zgGHoGzRVbt!-Mo|5)EC^BzcKX)$cJu*QGX)MU5{7>2Qo%eRCgrPY?Vd8chaQ+NfjM zjq38L;og&}St+HI)YNlJVzWb%a7u$M);1PZ<)o4UDCH&3V>-K5$^EZbq^utNN_M0a zs>E$wnV{`6KXAbiX%j}XEt3*5+mupUZ_*XFwZDBWOa}IUs~pGvDc*y)jUUXw#Fe$^ zSU|*(w?7qmqgH|3-fy!;GlsZMBT1Q`q1Pn4i4g2XgnS2+0J{bmz1F12)j7SRa)Lfl zwWExCB3Qi{7X|e*wUcUxe3^|;vXk$zr#UX4Zp{?mVzoObU0{EH{7y5B^w$%LM|nO* z7^?R+98c4L!rpbI?uG`sDhvNz8Pkda9RPBO|uZ<0W;)wdl+AY^R|W z%yACSXFcA&Um6~Y6a$;?k%&nVVN#_Q_1!4Wz!hdwZhcWz(qcU$98<7~zvp3Q`^3jl zx{2n1wt6yck!zr8zx5%aHR;{ZU$c+bge)k(Wh!-| z`<{dEQK61=_>ZwW2~O782a=Vvg7gk~BW2U9*L7mz0kK{3`g~t;li7G6uH1RrjcH#= zH72hS9c31ieTETQ<9DE@vZn8o?bsR5u=J@Y?vM0wW0+=mkVK2@pTSreeZ;pl?7nz* z?QJnU2TQ?I33n$Xbatt4OM2M}U7$_E?mHd-GbKokQ*7q`NQfjF%9;r&d~VW<%|Bkk z)GfsFy@Y_?k~|~O)}@{LC^jnlj>uZ1SxYX7)PfX=W*xLcoScbGJb%)rrc(D&vpFw4YUp zP^!p|>6Sr^7IY&kEeRp#DkI;%5tqB5<9|2vtGR>j-%9` z_W5{?nfhc*Yd2SRqX9MO&`-?BX|*r4On$cI|LKZme!=Gd4>kRNf~?HxIT6b(y0wrj zH)ynD670xUX<8Wk!QS#ex?`$4Zu{NVi%{v-2(SVSdyZD|+b%2kYG{hPDZl9dn(L^sM+jrBS_&~G= za_r?uo&V&_%!c_Pd!~6aP---pFx_cl7}d@De%cQtjfSTOstH;9mhW$t#@aSRN-YWU zAw!_?KKQ8`6%3YW#;Ym%q`uq9IHWPlB)IB8C2oz@^{e;h}H)6??bNWw>2 zEe?m`$lewUCvFN;bG8=W{Sjt5KS82W2kxad;0D2=8JSw{f2RNa95Uo1JHLHd4Z5d{ zj3&Pw;W$6T@bD0`HB691A7y-CPRD1@pmPp95rDZI;(ANqgVcECR};L-^v-xss8lpL zRa_B{X~mBAyHTEpRft^2liJVWhovTFPj<=AO8J!nTMBSj}bzd7ad zvORkPY^SMdVXZ}OGJ_K*cDo@P`E%K|i_jwDglY|O@ZAwi>{hEe{#Sfj=GP{^{d7+2 z1gTwXq3!Zv$yB&Z#=1|XXPyh}2e76|O+4t>CY;5dj*FVn9z$a*Sh;m6=>*Q1#x$HQ zte$HiPt%eNLd|OpX>?*pZEg_T;h*N^R$u?ps>T6=5|$t}t+Prkc4WKd66|7v zwC{)7Hu~9=X`m#g`veNFGqg?{$sw@B~GZ=nY! zAp~8#7h!5eKDZ{?shZZA3G3{eoVLl@X}Lx}G|Q`(k^OEcTogXJOjWu)aU#E0Q#{CO zypNdTA}E(k=);eR$*OceR_4sqhRd^+XWIGZ!W`eP7U9BkBkROGTh^!r86)R6)OVZ6 zU-Fw}h@;nREvFt*+s!HM2g9CCI{mU)Bc1yN4he`IzCEE7`ysJL^nI;f_}w#?(tZnV zpOdCqX1aUd6Q(M=e<}SBruo_y_|d`kh0;;_VYDXgtYalTBbwWod6)HC``GPEaB`-R z*KZ8-mS5v}+P>Axl-LBd-Y|wTwvx*uFh5gI*3G9`jp2c-n5x // and David Edelsohn @@ -67,7 +67,7 @@ class Target_powerpc : public Sized_target void gc_process_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -81,7 +81,7 @@ class Target_powerpc : public Sized_target void scan_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -116,7 +116,7 @@ class Target_powerpc : public Sized_target void scan_relocatable_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -193,7 +193,7 @@ class Target_powerpc : public Sized_target inline void local(Symbol_table* symtab, Layout* layout, Target_powerpc* target, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela& reloc, unsigned int r_type, @@ -201,7 +201,7 @@ class Target_powerpc : public Sized_target inline void global(Symbol_table* symtab, Layout* layout, Target_powerpc* target, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela& reloc, unsigned int r_type, @@ -210,7 +210,7 @@ class Target_powerpc : public Sized_target inline bool local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_powerpc* , - Sized_relobj* , + Sized_relobj_file* , unsigned int , Output_section* , const elfcpp::Rela& , @@ -221,7 +221,7 @@ class Target_powerpc : public Sized_target inline bool global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_powerpc* , - Sized_relobj* , + Sized_relobj_file* , unsigned int , Output_section* , const elfcpp::Rela private: static void - unsupported_reloc_local(Sized_relobj*, + unsupported_reloc_local(Sized_relobj_file*, unsigned int r_type); static void - unsupported_reloc_global(Sized_relobj*, + unsupported_reloc_global(Sized_relobj_file*, unsigned int r_type, Symbol*); static void @@ -313,7 +313,7 @@ class Target_powerpc : public Sized_target // Create a GOT entry for the TLS module index. unsigned int got_mod_index_entry(Symbol_table* symtab, Layout* layout, - Sized_relobj* object); + Sized_relobj_file* object); // Get the PLT section. const Output_data_plt_powerpc* @@ -330,7 +330,7 @@ class Target_powerpc : public Sized_target // Copy a relocation against a global symbol. void copy_reloc(Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int shndx, Output_section* output_section, Symbol* sym, const elfcpp::Rela& reloc) { @@ -383,6 +383,7 @@ Target::Target_info Target_powerpc<32, true>::powerpc_info = false, // has_resolve false, // has_code_fill true, // is_default_stack_executable + false, // can_icf_inline_merge_sections '\0', // wrap_char "/usr/lib/ld.so.1", // dynamic_linker 0x10000000, // default_text_segment_address @@ -406,6 +407,7 @@ Target::Target_info Target_powerpc<32, false>::powerpc_info = false, // has_resolve false, // has_code_fill true, // is_default_stack_executable + false, // can_icf_inline_merge_sections '\0', // wrap_char "/usr/lib/ld.so.1", // dynamic_linker 0x10000000, // default_text_segment_address @@ -429,6 +431,7 @@ Target::Target_info Target_powerpc<64, true>::powerpc_info = false, // has_resolve false, // has_code_fill true, // is_default_stack_executable + false, // can_icf_inline_merge_sections '\0', // wrap_char "/usr/lib/ld.so.1", // dynamic_linker 0x10000000, // default_text_segment_address @@ -452,6 +455,7 @@ Target::Target_info Target_powerpc<64, false>::powerpc_info = false, // has_resolve false, // has_code_fill true, // is_default_stack_executable + false, // can_icf_inline_merge_sections '\0', // wrap_char "/usr/lib/ld.so.1", // dynamic_linker 0x10000000, // default_text_segment_address @@ -496,7 +500,7 @@ private: rela(unsigned char* view, unsigned int right_shift, elfcpp::Elf_Xword dst_mask, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Swap::Valtype addend) { @@ -517,7 +521,7 @@ private: static inline void rela_ua(unsigned char* view, unsigned int right_shift, elfcpp::Elf_Xword dst_mask, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Swap::Valtype addend) { @@ -539,7 +543,7 @@ private: static inline void pcrela(unsigned char* view, unsigned int right_shift, elfcpp::Elf_Xword dst_mask, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Swap::Valtype addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -559,7 +563,7 @@ private: template static inline void pcrela_unaligned(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Swap::Valtype addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -578,7 +582,7 @@ public: // R_POWERPC_REL32: (Symbol + Addend - Address) static inline void rel32(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -587,7 +591,7 @@ public: // R_POWERPC_REL24: (Symbol + Addend - Address) & 0x3fffffc static inline void rel24(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -599,7 +603,7 @@ public: // R_POWERPC_REL14: (Symbol + Addend - Address) & 0xfffc static inline void rel14(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -617,7 +621,7 @@ public: static inline void addr16(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { This_reloc::rela16(view, object, psymval, addend); } @@ -640,7 +644,7 @@ public: static inline void addr16_lo(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { This_reloc::rela16(view, object, psymval, addend); } @@ -656,7 +660,7 @@ public: static inline void addr16_hi(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -684,7 +688,7 @@ public: static inline void addr16_ha(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -702,7 +706,7 @@ public: // R_PPC_REL16: (Symbol + Addend - Address) & 0xffff static inline void rel16(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -711,7 +715,7 @@ public: // R_PPC_REL16_LO: (Symbol + Addend - Address) & 0xffff static inline void rel16_lo(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -720,7 +724,7 @@ public: // R_PPC_REL16_HI: ((Symbol + Addend - Address) >> 16) & 0xffff static inline void rel16_hi(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -734,7 +738,7 @@ public: // relocation is negative, add one. static inline void rel16_ha(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -1068,9 +1072,10 @@ Target_powerpc::plt_entry_size() const template unsigned int -Target_powerpc::got_mod_index_entry(Symbol_table* symtab, - Layout* layout, - Sized_relobj* object) +Target_powerpc::got_mod_index_entry( + Symbol_table* symtab, + Layout* layout, + Sized_relobj_file* object) { if (this->got_mod_index_offset_ == -1U) { @@ -1176,7 +1181,7 @@ Target_powerpc::Scan::get_reference_flags( template void Target_powerpc::Scan::unsupported_reloc_local( - Sized_relobj* object, + Sized_relobj_file* object, unsigned int r_type) { gold_error(_("%s: unsupported reloc %u against local symbol"), @@ -1284,7 +1289,7 @@ Target_powerpc::Scan::local( Symbol_table* symtab, Layout* layout, Target_powerpc* target, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela& reloc, @@ -1402,7 +1407,7 @@ Target_powerpc::Scan::local( template void Target_powerpc::Scan::unsupported_reloc_global( - Sized_relobj* object, + Sized_relobj_file* object, unsigned int r_type, Symbol* gsym) { @@ -1418,7 +1423,7 @@ Target_powerpc::Scan::global( Symbol_table* symtab, Layout* layout, Target_powerpc* target, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela& reloc, @@ -1609,7 +1614,7 @@ void Target_powerpc::gc_process_relocs( Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int, const unsigned char* prelocs, @@ -1644,7 +1649,7 @@ void Target_powerpc::scan_relocs( Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -1756,7 +1761,7 @@ Target_powerpc::Relocate::relocate( psymval = &symval; } - const Sized_relobj* object = relinfo->object; + const Sized_relobj_file* object = relinfo->object; elfcpp::Elf_Xword addend = rela.get_r_addend(); // Get the GOT offset if needed. Unlike i386 and x86_64, our GOT @@ -1959,7 +1964,7 @@ Target_powerpc::Relocate::relocate_tls( { Output_segment* tls_segment = relinfo->layout->tls_segment(); typedef Powerpc_relocate_functions Reloc; - const Sized_relobj* object = relinfo->object; + const Sized_relobj_file* object = relinfo->object; const elfcpp::Elf_Xword addend = rela.get_r_addend(); typename elfcpp::Elf_types::Elf_Addr value = psymval->value(object, 0); @@ -2033,7 +2038,7 @@ void Target_powerpc::scan_relocatable_relocs( Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -2119,9 +2124,12 @@ class Target_selector_powerpc : public Target_selector public: Target_selector_powerpc() : Target_selector(elfcpp::EM_NONE, size, big_endian, - (size == 64 ? - (big_endian ? "elf64-powerpc" : "elf64-powerpcle") : - (big_endian ? "elf32-powerpc" : "elf32-powerpcle"))) + (size == 64 + ? (big_endian ? "elf64-powerpc" : "elf64-powerpcle") + : (big_endian ? "elf32-powerpc" : "elf32-powerpcle")), + (size == 64 + ? (big_endian ? "elf64ppc" : "elf64lppc") + : (big_endian ? "elf32ppc" : "elf32lppc"))) { } Target* do_recognize(int machine, int, int) diff --git a/gold/readsyms.cc b/gold/readsyms.cc index 05b42cd..1e50942 100644 --- a/gold/readsyms.cc +++ b/gold/readsyms.cc @@ -320,12 +320,33 @@ Read_symbols::do_read_symbols(Workqueue* workqueue) } } + Object* elf_obj = NULL; + bool unconfigured; + bool* punconfigured = NULL; + if (is_elf) + { + // This is an ELF object. + + unconfigured = false; + punconfigured = (input_file->will_search_for() + ? &unconfigured + : NULL); + elf_obj = make_elf_object(input_file->filename(), + input_file, 0, ehdr, read_size, + punconfigured); + } + if (parameters->options().has_plugins()) { Pluginobj* obj = parameters->options().plugins()->claim_file(input_file, - 0, filesize); + 0, filesize, + elf_obj); if (obj != NULL) { + // Delete the elf_obj, this file has been claimed. + if (elf_obj != NULL) + delete elf_obj; + // The input file was claimed by a plugin, and its symbols // have been provided by the plugin. @@ -359,14 +380,7 @@ Read_symbols::do_read_symbols(Workqueue* workqueue) { // This is an ELF object. - bool unconfigured = false; - bool* punconfigured = (input_file->will_search_for() - ? &unconfigured - : NULL); - Object* obj = make_elf_object(input_file->filename(), - input_file, 0, ehdr, read_size, - punconfigured); - if (obj == NULL) + if (elf_obj == NULL) { if (unconfigured) { @@ -382,7 +396,7 @@ Read_symbols::do_read_symbols(Workqueue* workqueue) } Read_symbols_data* sd = new Read_symbols_data; - obj->read_symbols(sd); + elf_obj->read_symbols(sd); // Opening the file locked it, so now we need to unlock it. We // need to unlock it before queuing the Add_symbols task, @@ -397,7 +411,7 @@ Read_symbols::do_read_symbols(Workqueue* workqueue) if (this->member_ != NULL) { this->member_->sd_ = sd; - this->member_->obj_ = obj; + this->member_->obj_ = elf_obj; this->member_->arg_serial_ = this->input_argument_->file().arg_serial(); return true; @@ -412,7 +426,7 @@ Read_symbols::do_read_symbols(Workqueue* workqueue) this->dirindex_, this->mapfile_, this->input_argument_, - obj, + elf_obj, NULL, sd, this->this_blocker_, @@ -637,6 +651,8 @@ Read_member::~Read_member() Task_token* Read_member::is_runnable() { + if (this->this_blocker_ != NULL && this->this_blocker_->is_blocked()) + return this->this_blocker_; return NULL; } diff --git a/gold/reloc.cc b/gold/reloc.cc index c58e42b..4c28b03 100644 --- a/gold/reloc.cc +++ b/gold/reloc.cc @@ -258,7 +258,7 @@ Relocate_task::get_name() const template void -Sized_relobj::do_read_relocs(Read_relocs_data* rd) +Sized_relobj_file::do_read_relocs(Read_relocs_data* rd) { rd->relocs.clear(); @@ -269,7 +269,7 @@ Sized_relobj::do_read_relocs(Read_relocs_data* rd) rd->relocs.reserve(shnum / 2); const Output_sections& out_sections(this->output_sections()); - const std::vector

& out_offsets(this->section_offsets_); + const std::vector
& out_offsets(this->section_offsets()); const unsigned char* pshdrs = this->get_view(this->elf_file_.shoff(), shnum * This::shdr_size, @@ -322,6 +322,9 @@ Sized_relobj::do_read_relocs(Read_relocs_data* rd) off_t sh_size = shdr.get_sh_size(); + if (sh_size == 0) + continue; + unsigned int reloc_size; if (sh_type == elfcpp::SHT_REL) reloc_size = elfcpp::Elf_sizes::rel_size; @@ -380,9 +383,9 @@ Sized_relobj::do_read_relocs(Read_relocs_data* rd) template void -Sized_relobj::do_gc_process_relocs(Symbol_table* symtab, - Layout* layout, - Read_relocs_data* rd) +Sized_relobj_file::do_gc_process_relocs(Symbol_table* symtab, + Layout* layout, + Read_relocs_data* rd) { Sized_target* target = parameters->sized_target(); @@ -420,7 +423,7 @@ Sized_relobj::do_gc_process_relocs(Symbol_table* symtab, template void -Sized_relobj::do_scan_relocs(Symbol_table* symtab, +Sized_relobj_file::do_scan_relocs(Symbol_table* symtab, Layout* layout, Read_relocs_data* rd) { @@ -537,7 +540,7 @@ class Emit_relocs_strategy template void -Sized_relobj::emit_relocs_scan( +Sized_relobj_file::emit_relocs_scan( Symbol_table* symtab, Layout* layout, const unsigned char* plocal_syms, @@ -564,7 +567,7 @@ Sized_relobj::emit_relocs_scan( template template void -Sized_relobj::emit_relocs_scan_reltype( +Sized_relobj_file::emit_relocs_scan_reltype( Symbol_table* symtab, Layout* layout, const unsigned char* plocal_syms, @@ -590,7 +593,7 @@ Sized_relobj::emit_relocs_scan_reltype( template void -Sized_relobj::incremental_relocs_scan( +Sized_relobj_file::incremental_relocs_scan( const Read_relocs_data::Relocs_list::iterator& p) { if (p->sh_type == elfcpp::SHT_REL) @@ -608,7 +611,7 @@ Sized_relobj::incremental_relocs_scan( template template void -Sized_relobj::incremental_relocs_scan_reltype( +Sized_relobj_file::incremental_relocs_scan_reltype( const Read_relocs_data::Relocs_list::iterator& p) { typedef typename Reloc_types::Reloc Reltype; @@ -638,9 +641,9 @@ Sized_relobj::incremental_relocs_scan_reltype( template void -Sized_relobj::do_relocate(const Symbol_table* symtab, - const Layout* layout, - Output_file* of) +Sized_relobj_file::do_relocate(const Symbol_table* symtab, + const Layout* layout, + Output_file* of) { unsigned int shnum = this->shnum(); @@ -656,7 +659,7 @@ Sized_relobj::do_relocate(const Symbol_table* symtab, // section data to the output file. The second one applies // relocations. - this->write_sections(pshdrs, of, &views); + this->write_sections(layout, pshdrs, of, &views); // To speed up relocations, we set up hash tables for fast lookup of // input offsets to output addresses. @@ -675,6 +678,8 @@ Sized_relobj::do_relocate(const Symbol_table* symtab, { if (views[i].view != NULL) { + if (views[i].is_ctors_reverse_view) + this->reverse_words(views[i].view, views[i].view_size); if (!views[i].is_postprocessing_view) { if (views[i].is_input_output_view) @@ -709,13 +714,14 @@ struct Read_multiple_compare template void -Sized_relobj::write_sections(const unsigned char* pshdrs, - Output_file* of, - Views* pviews) +Sized_relobj_file::write_sections(const Layout* layout, + const unsigned char* pshdrs, + Output_file* of, + Views* pviews) { unsigned int shnum = this->shnum(); const Output_sections& out_sections(this->output_sections()); - const std::vector
& out_offsets(this->section_offsets_); + const std::vector
& out_offsets(this->section_offsets()); File_read::Read_multiple rm; bool is_sorted = true; @@ -758,6 +764,7 @@ Sized_relobj::write_sections(const unsigned char* pshdrs, pvs->address = posd->address(); pvs->is_input_output_view = false; pvs->is_postprocessing_view = false; + pvs->is_ctors_reverse_view = false; continue; } @@ -872,6 +879,12 @@ Sized_relobj::write_sections(const unsigned char* pshdrs, pvs->view_size = view_size; pvs->is_input_output_view = output_offset == invalid_address; pvs->is_postprocessing_view = os->requires_postprocessing(); + pvs->is_ctors_reverse_view = + (!parameters->options().relocatable() + && view_size > size / 8 + && (strcmp(os->name(), ".init_array") == 0 + || strcmp(os->name(), ".fini_array") == 0) + && layout->is_ctors_in_init_array(this, i)); } // Actually read the data. @@ -888,7 +901,7 @@ Sized_relobj::write_sections(const unsigned char* pshdrs, template void -Sized_relobj::do_relocate_sections( +Sized_relobj_file::do_relocate_sections( const Symbol_table* symtab, const Layout* layout, const unsigned char* pshdrs, @@ -900,7 +913,7 @@ Sized_relobj::do_relocate_sections( parameters->sized_target(); const Output_sections& out_sections(this->output_sections()); - const std::vector
& out_offsets(this->section_offsets_); + const std::vector
& out_offsets(this->section_offsets()); Relocate_info relinfo; relinfo.symtab = symtab; @@ -1024,7 +1037,7 @@ Sized_relobj::do_relocate_sections( template void -Sized_relobj::emit_relocs( +Sized_relobj_file::emit_relocs( const Relocate_info* relinfo, unsigned int i, unsigned int sh_type, @@ -1061,7 +1074,7 @@ Sized_relobj::emit_relocs( template template void -Sized_relobj::emit_relocs_reltype( +Sized_relobj_file::emit_relocs_reltype( const Relocate_info* relinfo, unsigned int i, const unsigned char* prelocs, @@ -1093,7 +1106,7 @@ Sized_relobj::emit_relocs_reltype( template void -Sized_relobj::incremental_relocs_write( +Sized_relobj_file::incremental_relocs_write( const Relocate_info* relinfo, unsigned int sh_type, const unsigned char* prelocs, @@ -1129,7 +1142,7 @@ Sized_relobj::incremental_relocs_write( template template void -Sized_relobj::incremental_relocs_write_reltype( +Sized_relobj_file::incremental_relocs_write_reltype( const Relocate_info* relinfo, const unsigned char* prelocs, size_t reloc_count, @@ -1215,7 +1228,7 @@ Sized_relobj::incremental_relocs_write_reltype( template void -Sized_relobj::initialize_input_to_output_maps() +Sized_relobj_file::initialize_input_to_output_maps() { const unsigned int loccount = this->local_symbol_count_; for (unsigned int i = 1; i < loccount; ++i) @@ -1229,7 +1242,7 @@ Sized_relobj::initialize_input_to_output_maps() template void -Sized_relobj::free_input_to_output_maps() +Sized_relobj_file::free_input_to_output_maps() { const unsigned int loccount = this->local_symbol_count_; for (unsigned int i = 1; i < loccount; ++i) @@ -1247,7 +1260,7 @@ Sized_relobj::free_input_to_output_maps() template void -Sized_relobj::split_stack_adjust( +Sized_relobj_file::split_stack_adjust( const Symbol_table* symtab, const unsigned char* pshdrs, unsigned int sh_type, @@ -1279,7 +1292,7 @@ Sized_relobj::split_stack_adjust( template template void -Sized_relobj::split_stack_adjust_reltype( +Sized_relobj_file::split_stack_adjust_reltype( const Symbol_table* symtab, const unsigned char* pshdrs, unsigned int shndx, @@ -1436,10 +1449,10 @@ Sized_relobj::split_stack_adjust_reltype( template void -Sized_relobj::find_functions( +Sized_relobj_file::find_functions( const unsigned char* pshdrs, unsigned int shndx, - Sized_relobj::Function_offsets* function_offsets) + Sized_relobj_file::Function_offsets* function_offsets) { // We need to read the symbols to find the functions. If we wanted // to, we could cache reading the symbols across all sections in the @@ -1480,6 +1493,26 @@ Sized_relobj::find_functions( } } +// Reverse the words in a section. Used for .ctors sections mapped to +// .init_array sections. See ctors_sections_in_init_array in +// layout.cc. + +template +void +Sized_relobj_file::reverse_words(unsigned char* view, + section_size_type view_size) +{ + typedef typename elfcpp::Swap::Valtype Valtype; + Valtype* vview = reinterpret_cast(view); + section_size_type vview_size = view_size / (size / 8); + for (section_size_type i = 0; i < vview_size / 2; ++i) + { + Valtype tmp = vview[i]; + vview[i] = vview[vview_size - 1 - i]; + vview[vview_size - 1 - i] = tmp; + } +} + // Class Merged_symbol_value. template @@ -1636,127 +1669,127 @@ Track_relocs::advance(off_t offset) #ifdef HAVE_TARGET_32_LITTLE template void -Sized_relobj<32, false>::do_read_relocs(Read_relocs_data* rd); +Sized_relobj_file<32, false>::do_read_relocs(Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_32_BIG template void -Sized_relobj<32, true>::do_read_relocs(Read_relocs_data* rd); +Sized_relobj_file<32, true>::do_read_relocs(Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_64_LITTLE template void -Sized_relobj<64, false>::do_read_relocs(Read_relocs_data* rd); +Sized_relobj_file<64, false>::do_read_relocs(Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_64_BIG template void -Sized_relobj<64, true>::do_read_relocs(Read_relocs_data* rd); +Sized_relobj_file<64, true>::do_read_relocs(Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_32_LITTLE template void -Sized_relobj<32, false>::do_gc_process_relocs(Symbol_table* symtab, - Layout* layout, - Read_relocs_data* rd); +Sized_relobj_file<32, false>::do_gc_process_relocs(Symbol_table* symtab, + Layout* layout, + Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_32_BIG template void -Sized_relobj<32, true>::do_gc_process_relocs(Symbol_table* symtab, - Layout* layout, - Read_relocs_data* rd); +Sized_relobj_file<32, true>::do_gc_process_relocs(Symbol_table* symtab, + Layout* layout, + Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_64_LITTLE template void -Sized_relobj<64, false>::do_gc_process_relocs(Symbol_table* symtab, - Layout* layout, - Read_relocs_data* rd); +Sized_relobj_file<64, false>::do_gc_process_relocs(Symbol_table* symtab, + Layout* layout, + Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_64_BIG template void -Sized_relobj<64, true>::do_gc_process_relocs(Symbol_table* symtab, - Layout* layout, - Read_relocs_data* rd); +Sized_relobj_file<64, true>::do_gc_process_relocs(Symbol_table* symtab, + Layout* layout, + Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_32_LITTLE template void -Sized_relobj<32, false>::do_scan_relocs(Symbol_table* symtab, - Layout* layout, - Read_relocs_data* rd); +Sized_relobj_file<32, false>::do_scan_relocs(Symbol_table* symtab, + Layout* layout, + Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_32_BIG template void -Sized_relobj<32, true>::do_scan_relocs(Symbol_table* symtab, - Layout* layout, - Read_relocs_data* rd); +Sized_relobj_file<32, true>::do_scan_relocs(Symbol_table* symtab, + Layout* layout, + Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_64_LITTLE template void -Sized_relobj<64, false>::do_scan_relocs(Symbol_table* symtab, - Layout* layout, - Read_relocs_data* rd); +Sized_relobj_file<64, false>::do_scan_relocs(Symbol_table* symtab, + Layout* layout, + Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_64_BIG template void -Sized_relobj<64, true>::do_scan_relocs(Symbol_table* symtab, - Layout* layout, - Read_relocs_data* rd); +Sized_relobj_file<64, true>::do_scan_relocs(Symbol_table* symtab, + Layout* layout, + Read_relocs_data* rd); #endif #ifdef HAVE_TARGET_32_LITTLE template void -Sized_relobj<32, false>::do_relocate(const Symbol_table* symtab, - const Layout* layout, - Output_file* of); +Sized_relobj_file<32, false>::do_relocate(const Symbol_table* symtab, + const Layout* layout, + Output_file* of); #endif #ifdef HAVE_TARGET_32_BIG template void -Sized_relobj<32, true>::do_relocate(const Symbol_table* symtab, - const Layout* layout, - Output_file* of); +Sized_relobj_file<32, true>::do_relocate(const Symbol_table* symtab, + const Layout* layout, + Output_file* of); #endif #ifdef HAVE_TARGET_64_LITTLE template void -Sized_relobj<64, false>::do_relocate(const Symbol_table* symtab, - const Layout* layout, - Output_file* of); +Sized_relobj_file<64, false>::do_relocate(const Symbol_table* symtab, + const Layout* layout, + Output_file* of); #endif #ifdef HAVE_TARGET_64_BIG template void -Sized_relobj<64, true>::do_relocate(const Symbol_table* symtab, - const Layout* layout, - Output_file* of); +Sized_relobj_file<64, true>::do_relocate(const Symbol_table* symtab, + const Layout* layout, + Output_file* of); #endif #ifdef HAVE_TARGET_32_LITTLE template void -Sized_relobj<32, false>::do_relocate_sections( +Sized_relobj_file<32, false>::do_relocate_sections( const Symbol_table* symtab, const Layout* layout, const unsigned char* pshdrs, @@ -1767,7 +1800,7 @@ Sized_relobj<32, false>::do_relocate_sections( #ifdef HAVE_TARGET_32_BIG template void -Sized_relobj<32, true>::do_relocate_sections( +Sized_relobj_file<32, true>::do_relocate_sections( const Symbol_table* symtab, const Layout* layout, const unsigned char* pshdrs, @@ -1778,7 +1811,7 @@ Sized_relobj<32, true>::do_relocate_sections( #ifdef HAVE_TARGET_64_LITTLE template void -Sized_relobj<64, false>::do_relocate_sections( +Sized_relobj_file<64, false>::do_relocate_sections( const Symbol_table* symtab, const Layout* layout, const unsigned char* pshdrs, @@ -1789,7 +1822,7 @@ Sized_relobj<64, false>::do_relocate_sections( #ifdef HAVE_TARGET_64_BIG template void -Sized_relobj<64, true>::do_relocate_sections( +Sized_relobj_file<64, true>::do_relocate_sections( const Symbol_table* symtab, const Layout* layout, const unsigned char* pshdrs, @@ -1800,41 +1833,41 @@ Sized_relobj<64, true>::do_relocate_sections( #ifdef HAVE_TARGET_32_LITTLE template void -Sized_relobj<32, false>::initialize_input_to_output_maps(); +Sized_relobj_file<32, false>::initialize_input_to_output_maps(); template void -Sized_relobj<32, false>::free_input_to_output_maps(); +Sized_relobj_file<32, false>::free_input_to_output_maps(); #endif #ifdef HAVE_TARGET_32_BIG template void -Sized_relobj<32, true>::initialize_input_to_output_maps(); +Sized_relobj_file<32, true>::initialize_input_to_output_maps(); template void -Sized_relobj<32, true>::free_input_to_output_maps(); +Sized_relobj_file<32, true>::free_input_to_output_maps(); #endif #ifdef HAVE_TARGET_64_LITTLE template void -Sized_relobj<64, false>::initialize_input_to_output_maps(); +Sized_relobj_file<64, false>::initialize_input_to_output_maps(); template void -Sized_relobj<64, false>::free_input_to_output_maps(); +Sized_relobj_file<64, false>::free_input_to_output_maps(); #endif #ifdef HAVE_TARGET_64_BIG template void -Sized_relobj<64, true>::initialize_input_to_output_maps(); +Sized_relobj_file<64, true>::initialize_input_to_output_maps(); template void -Sized_relobj<64, true>::free_input_to_output_maps(); +Sized_relobj_file<64, true>::free_input_to_output_maps(); #endif #if defined(HAVE_TARGET_32_LITTLE) || defined(HAVE_TARGET_32_BIG) diff --git a/gold/reloc.h b/gold/reloc.h index 87e70cc..02f91a4 100644 --- a/gold/reloc.h +++ b/gold/reloc.h @@ -47,7 +47,7 @@ template class Sized_symbol; template -class Sized_relobj; +class Sized_relobj_file; template class Symbol_value; @@ -247,6 +247,8 @@ class Relocatable_relocs RELOC_ADJUST_FOR_SECTION_2, RELOC_ADJUST_FOR_SECTION_4, RELOC_ADJUST_FOR_SECTION_8, + // Like RELOC_ADJUST_FOR_SECTION_4 but for unaligned relocs. + RELOC_ADJUST_FOR_SECTION_4_UNALIGNED, // Discard the input reloc--process it completely when relocating // the data section contents. RELOC_DISCARD, @@ -331,13 +333,25 @@ private: elfcpp::Swap::writeval(wv, x + value); } + // Like the above but for relocs at unaligned addresses. + template + static inline void + rel_unaligned(unsigned char* view, + typename elfcpp::Swap::Valtype value) + { + typedef typename elfcpp::Swap_unaligned::Valtype + Valtype; + Valtype x = elfcpp::Swap_unaligned::readval(view); + elfcpp::Swap_unaligned::writeval(view, x + value); + } + // Do a simple relocation using a Symbol_value with the addend in // the section contents. VALSIZE is the size of the value to // relocate. template static inline void rel(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval) { typedef typename elfcpp::Swap::Valtype Valtype; @@ -347,6 +361,20 @@ private: elfcpp::Swap::writeval(wv, x); } + // Like the above but for relocs at unaligned addresses. + template + static inline void + rel_unaligned(unsigned char* view, + const Sized_relobj_file* object, + const Symbol_value* psymval) + { + typedef typename elfcpp::Swap_unaligned::Valtype + Valtype; + Valtype x = elfcpp::Swap_unaligned::readval(view); + x = psymval->value(object, x); + elfcpp::Swap_unaligned::writeval(view, x); + } + // Do a simple relocation with the addend in the relocation. // VALSIZE is the size of the value. template @@ -365,7 +393,7 @@ private: template static inline void rela(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Swap::Valtype addend) { @@ -389,13 +417,26 @@ private: elfcpp::Swap::writeval(wv, x + value - address); } + // Like the above but for relocs at unaligned addresses. + template + static inline void + pcrel_unaligned(unsigned char* view, + typename elfcpp::Swap::Valtype value, + typename elfcpp::Elf_types::Elf_Addr address) + { + typedef typename elfcpp::Swap::Valtype Valtype; + Valtype x = elfcpp::Swap_unaligned::readval(view); + elfcpp::Swap_unaligned::writeval(view, + x + value - address); + } + // Do a simple PC relative relocation with a Symbol_value with the // addend in the section contents. VALSIZE is the size of the // value. template static inline void pcrel(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr address) { @@ -425,7 +466,7 @@ private: template static inline void pcrela(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Swap::Valtype addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -447,7 +488,7 @@ public: static inline void rel8(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval) { This::template rel<8>(view, object, psymval); } @@ -458,7 +499,7 @@ public: static inline void rela8(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, unsigned char addend) { This::template rela<8>(view, object, psymval, addend); } @@ -472,7 +513,7 @@ public: static inline void pcrel8(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr address) { This::template pcrel<8>(view, object, psymval, address); } @@ -486,7 +527,7 @@ public: static inline void pcrela8(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, unsigned char addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -500,7 +541,7 @@ public: static inline void rel16(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval) { This::template rel<16>(view, object, psymval); } @@ -511,7 +552,7 @@ public: static inline void rela16(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, elfcpp::Elf_Half addend) { This::template rela<16>(view, object, psymval, addend); } @@ -525,7 +566,7 @@ public: static inline void pcrel16(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr address) { This::template pcrel<16>(view, object, psymval, address); } @@ -540,7 +581,7 @@ public: static inline void pcrela16(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, elfcpp::Elf_Half addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -552,12 +593,24 @@ public: rel32(unsigned char* view, elfcpp::Elf_Word value) { This::template rel<32>(view, value); } + // Like above but for relocs at unaligned addresses. + static inline void + rel32_unaligned(unsigned char* view, elfcpp::Elf_Word value) + { This::template rel_unaligned<32>(view, value); } + static inline void rel32(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval) { This::template rel<32>(view, object, psymval); } + // Like above but for relocs at unaligned addresses. + static inline void + rel32_unaligned(unsigned char* view, + const Sized_relobj_file* object, + const Symbol_value* psymval) + { This::template rel_unaligned<32>(view, object, psymval); } + // Do an 32-bit RELA relocation with the addend in the relocation. static inline void rela32(unsigned char* view, elfcpp::Elf_Word value, elfcpp::Elf_Word addend) @@ -565,7 +618,7 @@ public: static inline void rela32(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, elfcpp::Elf_Word addend) { This::template rela<32>(view, object, psymval, addend); } @@ -577,9 +630,15 @@ public: typename elfcpp::Elf_types::Elf_Addr address) { This::template pcrel<32>(view, value, address); } + // Unaligned version of the above. + static inline void + pcrel32_unaligned(unsigned char* view, elfcpp::Elf_Word value, + typename elfcpp::Elf_types::Elf_Addr address) + { This::template pcrel_unaligned<32>(view, value, address); } + static inline void pcrel32(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr address) { This::template pcrel<32>(view, object, psymval, address); } @@ -594,7 +653,7 @@ public: static inline void pcrela32(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, elfcpp::Elf_Word addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -608,7 +667,7 @@ public: static inline void rel64(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval) { This::template rel<64>(view, object, psymval); } @@ -620,7 +679,7 @@ public: static inline void rela64(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, elfcpp::Elf_Xword addend) { This::template rela<64>(view, object, psymval, addend); } @@ -634,7 +693,7 @@ public: static inline void pcrel64(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr address) { This::template pcrel<64>(view, object, psymval, address); } @@ -649,7 +708,7 @@ public: static inline void pcrela64(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, elfcpp::Elf_Xword addend, typename elfcpp::Elf_types::Elf_Addr address) diff --git a/gold/resolve.cc b/gold/resolve.cc index a9a89fa..03288ec 100644 --- a/gold/resolve.cc +++ b/gold/resolve.cc @@ -1,6 +1,6 @@ // resolve.cc -- symbol resolution for gold -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -245,6 +245,21 @@ Symbol_table::resolve(Sized_symbol* to, unsigned int orig_st_shndx, Object* object, const char* version) { + // It's possible for a symbol to be defined in an object file + // using .symver to give it a version, and for there to also be + // a linker script giving that symbol the same version. We + // don't want to give a multiple-definition error for this + // harmless redefinition. + bool to_is_ordinary; + if (to->source() == Symbol::FROM_OBJECT + && to->object() == object + && is_ordinary + && to->is_defined() + && to->shndx(&to_is_ordinary) == st_shndx + && to_is_ordinary + && to->value() == sym.get_st_value()) + return; + if (parameters->target().has_resolve()) { Sized_target* sized_target; @@ -306,7 +321,6 @@ Symbol_table::resolve(Sized_symbol* to, // inline and the other is not. (Note: not all ODR violations can // be found this way, and not everything this finds is an ODR // violation. But it's helpful to warn about.) - bool to_is_ordinary; if (parameters->options().detect_odr_violations() && (sym.get_st_bind() == elfcpp::STB_WEAK || to->binding() == elfcpp::STB_WEAK) @@ -337,8 +351,8 @@ Symbol_table::resolve(Sized_symbol* to, bool adjust_common_sizes; bool adjust_dyndef; typename Sized_symbol::Size_type tosize = to->symsize(); - if (Symbol_table::should_override(to, frombits, OBJECT, object, - &adjust_common_sizes, + if (Symbol_table::should_override(to, frombits, sym.get_st_type(), OBJECT, + object, &adjust_common_sizes, &adjust_dyndef)) { elfcpp::STB tobinding = to->binding(); @@ -395,8 +409,8 @@ Symbol_table::resolve(Sized_symbol* to, bool Symbol_table::should_override(const Symbol* to, unsigned int frombits, - Defined defined, Object* object, - bool* adjust_common_sizes, + elfcpp::STT fromtype, Defined defined, + Object* object, bool* adjust_common_sizes, bool* adjust_dyndef) { *adjust_common_sizes = false; @@ -420,7 +434,13 @@ Symbol_table::should_override(const Symbol* to, unsigned int frombits, to->type()); } - // FIXME: Warn if either but not both of TO and SYM are STT_TLS. + if (to->type() == elfcpp::STT_TLS + ? fromtype != elfcpp::STT_TLS + : fromtype == elfcpp::STT_TLS) + Symbol_table::report_resolve_problem(true, + _("symbol '%s' used as both __thread " + "and non-__thread"), + to, defined, object); // We use a giant switch table for symbol resolution. This code is // unwieldy, but: 1) it is efficient; 2) we definitely handle all @@ -830,6 +850,7 @@ Symbol_table::report_resolve_problem(bool is_error, const char* msg, objname = _("linker script"); break; case PREDEFINED: + case INCREMENTAL_BASE: objname = _("linker defined"); break; default: @@ -855,13 +876,15 @@ Symbol_table::report_resolve_problem(bool is_error, const char* msg, // defining special symbols. bool -Symbol_table::should_override_with_special(const Symbol* to, Defined defined) +Symbol_table::should_override_with_special(const Symbol* to, + elfcpp::STT fromtype, + Defined defined) { bool adjust_common_sizes; bool adjust_dyn_def; unsigned int frombits = global_flag | regular_flag | def_flag; - bool ret = Symbol_table::should_override(to, frombits, defined, NULL, - &adjust_common_sizes, + bool ret = Symbol_table::should_override(to, frombits, fromtype, defined, + NULL, &adjust_common_sizes, &adjust_dyn_def); gold_assert(!adjust_common_sizes && !adjust_dyn_def); return ret; @@ -872,7 +895,8 @@ Symbol_table::should_override_with_special(const Symbol* to, Defined defined) void Symbol::override_base_with_special(const Symbol* from) { - gold_assert(this->name_ == from->name_ || this->has_alias()); + bool same_name = this->name_ == from->name_; + gold_assert(same_name || this->has_alias()); this->source_ = from->source_; switch (from->source_) @@ -894,7 +918,16 @@ Symbol::override_base_with_special(const Symbol* from) break; } - this->override_version(from->version_); + if (same_name) + { + // When overriding a versioned symbol with a special symbol, we + // may be changing the version. This will happen if we see a + // special symbol such as "_end" defined in a shared object with + // one version (from a version script), but we want to define it + // here with a different version (from a different version + // script). + this->version_ = from->version_; + } this->type_ = from->type_; this->binding_ = from->binding_; this->override_visibility(from->visibility_); @@ -908,6 +941,8 @@ Symbol::override_base_with_special(const Symbol* from) if (from->needs_dynsym_value_) this->needs_dynsym_value_ = true; + this->is_predefined_ = from->is_predefined_; + // We shouldn't see these flags. If we do, we need to handle them // somehow. gold_assert(!from->is_forwarder_); diff --git a/gold/script-sections.cc b/gold/script-sections.cc index 10af8e1..1fad88d 100644 --- a/gold/script-sections.cc +++ b/gold/script-sections.cc @@ -2846,6 +2846,17 @@ Orphan_output_section::set_section_addresses(Symbol_table*, Layout*, uint64_t address = *dot_value; address = align_address(address, this->os_->addralign()); + // For a relocatable link, all orphan sections are put at + // address 0. In general we expect all sections to be at + // address 0 for a relocatable link, but we permit the linker + // script to override that for specific output sections. + if (parameters->options().relocatable()) + { + address = 0; + *load_address = 0; + have_load_address = false; + } + if ((this->os_->flags() & elfcpp::SHF_ALLOC) != 0) { this->os_->set_address(address); @@ -3925,6 +3936,18 @@ Script_sections::create_note_and_tls_segments( saw_tls = true; } + + // If we are making a shared library, and we see a section named + // .interp then put the .interp section in a PT_INTERP segment. + // This is for GNU ld compatibility. + if (strcmp((*p)->name(), ".interp") == 0) + { + elfcpp::Elf_Word seg_flags = + Layout::section_flags_to_segment((*p)->flags()); + Output_segment* oseg = layout->make_output_segment(elfcpp::PT_INTERP, + seg_flags); + oseg->add_output_section_to_nonload(*p, seg_flags); + } } } @@ -4027,15 +4050,37 @@ Script_sections::attach_sections_using_phdrs_clause(Layout* layout) p != this->sections_elements_->end(); ++p) { - bool orphan; + bool is_orphan; String_list* old_phdr_names = phdr_names; - Output_section* os = (*p)->allocate_to_segment(&phdr_names, &orphan); + Output_section* os = (*p)->allocate_to_segment(&phdr_names, &is_orphan); if (os == NULL) continue; + elfcpp::Elf_Word seg_flags = + Layout::section_flags_to_segment(os->flags()); + if (phdr_names == NULL) { - gold_error(_("allocated section not in any segment")); + // Don't worry about empty orphan sections. + if (is_orphan && os->current_data_size() > 0) + gold_error(_("allocated section %s not in any segment"), + os->name()); + + // To avoid later crashes drop this section into the first + // PT_LOAD segment. + for (Phdrs_elements::const_iterator ppe = + this->phdrs_elements_->begin(); + ppe != this->phdrs_elements_->end(); + ++ppe) + { + Output_segment* oseg = (*ppe)->segment(); + if (oseg->type() == elfcpp::PT_LOAD) + { + oseg->add_output_section_to_load(layout, os, seg_flags); + break; + } + } + continue; } @@ -4050,7 +4095,7 @@ Script_sections::attach_sections_using_phdrs_clause(Layout* layout) // PT_INTERP segment will pick up following orphan sections, // which does not make sense. If this is not an orphan section, // we trust the linker script. - if (orphan) + if (is_orphan) { // Enable PT_LOAD segments only filtering until we see another // list of segment names. @@ -4071,9 +4116,6 @@ Script_sections::attach_sections_using_phdrs_clause(Layout* layout) && r->second->type() != elfcpp::PT_LOAD) continue; - elfcpp::Elf_Word seg_flags = - Layout::section_flags_to_segment(os->flags()); - if (r->second->type() != elfcpp::PT_LOAD) r->second->add_output_section_to_nonload(os, seg_flags); else diff --git a/gold/script.cc b/gold/script.cc index 8f2170d..7df0c9e 100644 --- a/gold/script.cc +++ b/gold/script.cc @@ -1,6 +1,6 @@ // script.cc -- handle linker scripts for gold. -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -146,13 +146,7 @@ class Token } uint64_t - integer_value() const - { - gold_assert(this->classification_ == TOKEN_INTEGER); - // Null terminate. - std::string s(this->value_, this->value_length_); - return strtoull(s.c_str(), NULL, 0); - } + integer_value() const; private: // The token classification. @@ -171,6 +165,35 @@ class Token int charpos_; }; +// Return the value of a TOKEN_INTEGER. + +uint64_t +Token::integer_value() const +{ + gold_assert(this->classification_ == TOKEN_INTEGER); + + size_t len = this->value_length_; + + uint64_t multiplier = 1; + char last = this->value_[len - 1]; + if (last == 'm' || last == 'M') + { + multiplier = 1024 * 1024; + --len; + } + else if (last == 'k' || last == 'K') + { + multiplier = 1024; + --len; + } + + char *end; + uint64_t ret = strtoull(this->value_, &end, 0); + gold_assert(static_cast(end - this->value_) == len); + + return ret * multiplier; +} + // This class handles lexing a file into a sequence of tokens. class Lex @@ -474,9 +497,7 @@ Lex::can_continue_name(const char* c) // For a number we accept 0x followed by hex digits, or any sequence // of digits. The old linker accepts leading '$' for hex, and // trailing HXBOD. Those are for MRI compatibility and we don't -// accept them. The old linker also accepts trailing MK for mega or -// kilo. FIXME: Those are mentioned in the documentation, and we -// should accept them. +// accept them. // Return whether C1 C2 C3 can start a hex number. @@ -703,8 +724,15 @@ Lex::gather_token(Token::Classification classification, const char** pp) { const char* new_match = NULL; - while ((new_match = (this->*can_continue_fn)(match))) + while ((new_match = (this->*can_continue_fn)(match)) != NULL) match = new_match; + + // A special case: integers may be followed by a single M or K, + // case-insensitive. + if (classification == Token::TOKEN_INTEGER + && (*match == 'm' || *match == 'M' || *match == 'k' || *match == 'K')) + ++match; + *pp = match; return this->make_token(classification, start, match - start, start); } @@ -2804,7 +2832,7 @@ script_check_output_format(void* closurev, { Parser_closure* closure = static_cast(closurev); std::string name(default_name, default_length); - Target* target = select_target_by_name(name.c_str()); + Target* target = select_target_by_bfd_name(name.c_str()); if (target == NULL || !parameters->is_compatible_target(target)) { if (closure->skip_on_incompatible_target()) diff --git a/gold/sparc.cc b/gold/sparc.cc index 84614bd..5f67a4e 100644 --- a/gold/sparc.cc +++ b/gold/sparc.cc @@ -1,6 +1,6 @@ // sparc.cc -- sparc target support for gold. -// Copyright 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by David S. Miller . // This file is part of gold. @@ -69,7 +69,7 @@ class Target_sparc : public Sized_target void gc_process_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -83,7 +83,7 @@ class Target_sparc : public Sized_target void scan_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -118,7 +118,7 @@ class Target_sparc : public Sized_target void scan_relocatable_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -203,7 +203,7 @@ class Target_sparc : public Sized_target inline void local(Symbol_table* symtab, Layout* layout, Target_sparc* target, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela& reloc, unsigned int r_type, @@ -211,7 +211,7 @@ class Target_sparc : public Sized_target inline void global(Symbol_table* symtab, Layout* layout, Target_sparc* target, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela& reloc, unsigned int r_type, @@ -220,7 +220,7 @@ class Target_sparc : public Sized_target inline bool local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_sparc* , - Sized_relobj* , + Sized_relobj_file* , unsigned int , Output_section* , const elfcpp::Rela& , @@ -231,7 +231,7 @@ class Target_sparc : public Sized_target inline bool global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_sparc* , - Sized_relobj* , + Sized_relobj_file* , unsigned int , Output_section* , const elfcpp::Rela private: static void - unsupported_reloc_local(Sized_relobj*, + unsupported_reloc_local(Sized_relobj_file*, unsigned int r_type); static void - unsupported_reloc_global(Sized_relobj*, + unsupported_reloc_global(Sized_relobj_file*, unsigned int r_type, Symbol*); static void @@ -265,7 +265,7 @@ class Target_sparc : public Sized_target { public: Relocate() - : ignore_gd_add_(false) + : ignore_gd_add_(false), reloc_adjust_addr_(NULL) { } ~Relocate() @@ -302,6 +302,9 @@ class Target_sparc : public Sized_target // Ignore the next relocation which should be R_SPARC_TLS_GD_ADD bool ignore_gd_add_; + + // If we hit a reloc at this view address, adjust it back by 4 bytes. + unsigned char *reloc_adjust_addr_; }; // A class which returns the size required for a relocation type, @@ -324,7 +327,7 @@ class Target_sparc : public Sized_target // Create a GOT entry for the TLS module index. unsigned int got_mod_index_entry(Symbol_table* symtab, Layout* layout, - Sized_relobj* object); + Sized_relobj_file* object); // Return the gsym for "__tls_get_addr". Cache if not already // cached. @@ -352,7 +355,7 @@ class Target_sparc : public Sized_target // Copy a relocation against a global symbol. void copy_reloc(Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int shndx, Output_section* output_section, Symbol* sym, const elfcpp::Rela& reloc) { @@ -403,6 +406,7 @@ Target::Target_info Target_sparc<32, true>::sparc_info = false, // has_resolve false, // has_code_fill true, // is_default_stack_executable + false, // can_icf_inline_merge_sections '\0', // wrap_char "/usr/lib/ld.so.1", // dynamic_linker 0x00010000, // default_text_segment_address @@ -426,6 +430,7 @@ Target::Target_info Target_sparc<64, true>::sparc_info = false, // has_resolve false, // has_code_fill true, // is_default_stack_executable + false, // can_icf_inline_merge_sections '\0', // wrap_char "/usr/lib/sparcv9/ld.so.1", // dynamic_linker 0x100000, // default_text_segment_address @@ -472,7 +477,7 @@ private: rela(unsigned char* view, unsigned int right_shift, typename elfcpp::Elf_types::Elf_Addr dst_mask, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Swap::Valtype addend) { @@ -493,7 +498,7 @@ private: static inline void rela_ua(unsigned char* view, unsigned int right_shift, elfcpp::Elf_Xword dst_mask, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Swap::Valtype addend) { @@ -516,7 +521,7 @@ private: pcrela(unsigned char* view, unsigned int right_shift, typename elfcpp::Elf_types::Elf_Addr dst_mask, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Swap::Valtype addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -536,7 +541,7 @@ private: template static inline void pcrela_unaligned(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Swap::Valtype addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -556,7 +561,7 @@ public: // R_SPARC_WDISP30: (Symbol + Addend - Address) >> 2 static inline void wdisp30(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -568,7 +573,7 @@ public: // R_SPARC_WDISP22: (Symbol + Addend - Address) >> 2 static inline void wdisp22(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -580,7 +585,7 @@ public: // R_SPARC_WDISP19: (Symbol + Addend - Address) >> 2 static inline void wdisp19(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -592,7 +597,7 @@ public: // R_SPARC_WDISP16: (Symbol + Addend - Address) >> 2 static inline void wdisp16(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -615,7 +620,7 @@ public: // R_SPARC_PC22: (Symbol + Addend - Address) >> 10 static inline void pc22(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -627,7 +632,7 @@ public: // R_SPARC_PC10: (Symbol + Addend - Address) & 0x3ff static inline void pc10(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -648,7 +653,7 @@ public: // R_SPARC_HI22: (Symbol + Addend) >> 10 static inline void hi22(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -658,7 +663,7 @@ public: // R_SPARC_PCPLT22: (Symbol + Addend - Address) >> 10 static inline void pcplt22(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -679,7 +684,7 @@ public: // R_SPARC_LO10: (Symbol + Addend) & 0x3ff static inline void lo10(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -689,7 +694,7 @@ public: // R_SPARC_LO10: (Symbol + Addend) & 0x3ff static inline void lo10(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -701,7 +706,7 @@ public: // R_SPARC_OLO10: ((Symbol + Addend) & 0x3ff) + Addend2 static inline void olo10(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr addend2) @@ -722,7 +727,7 @@ public: // R_SPARC_22: (Symbol + Addend) static inline void rela32_22(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -741,7 +746,7 @@ public: // R_SPARC_13: (Symbol + Addend) static inline void rela32_13(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -751,7 +756,7 @@ public: // R_SPARC_UA16: (Symbol + Addend) static inline void ua16(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -761,7 +766,7 @@ public: // R_SPARC_UA32: (Symbol + Addend) static inline void ua32(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -771,7 +776,7 @@ public: // R_SPARC_UA64: (Symbol + Addend) static inline void ua64(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -782,7 +787,7 @@ public: // R_SPARC_DISP8: (Symbol + Addend - Address) static inline void disp8(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -794,7 +799,7 @@ public: // R_SPARC_DISP16: (Symbol + Addend - Address) static inline void disp16(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -806,7 +811,7 @@ public: // R_SPARC_DISP32: (Symbol + Addend - Address) static inline void disp32(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -818,7 +823,7 @@ public: // R_SPARC_DISP64: (Symbol + Addend - Address) static inline void disp64(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, elfcpp::Elf_Xword addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -830,7 +835,7 @@ public: // R_SPARC_H44: (Symbol + Addend) >> 22 static inline void h44(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -840,7 +845,7 @@ public: // R_SPARC_M44: ((Symbol + Addend) >> 12) & 0x3ff static inline void m44(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -850,7 +855,7 @@ public: // R_SPARC_L44: (Symbol + Addend) & 0xfff static inline void l44(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -860,7 +865,7 @@ public: // R_SPARC_HH22: (Symbol + Addend) >> 42 static inline void hh22(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -870,7 +875,7 @@ public: // R_SPARC_PC_HH22: (Symbol + Addend - Address) >> 42 static inline void pc_hh22(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -882,7 +887,7 @@ public: // R_SPARC_HM10: ((Symbol + Addend) >> 32) & 0x3ff static inline void hm10(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -892,7 +897,7 @@ public: // R_SPARC_PC_HM10: ((Symbol + Addend - Address) >> 32) & 0x3ff static inline void pc_hm10(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend, typename elfcpp::Elf_types::Elf_Addr address) @@ -904,7 +909,7 @@ public: // R_SPARC_11: (Symbol + Addend) static inline void rela32_11(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -914,7 +919,7 @@ public: // R_SPARC_10: (Symbol + Addend) static inline void rela32_10(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -924,7 +929,7 @@ public: // R_SPARC_7: (Symbol + Addend) static inline void rela32_7(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -934,7 +939,7 @@ public: // R_SPARC_6: (Symbol + Addend) static inline void rela32_6(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -944,7 +949,7 @@ public: // R_SPARC_5: (Symbol + Addend) static inline void rela32_5(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -1001,7 +1006,7 @@ public: // R_SPARC_HIX22: ((Symbol + Addend) ^ 0xffffffffffffffff) >> 10 static inline void hix22(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -1042,7 +1047,7 @@ public: // R_SPARC_LOX10: ((Symbol + Addend) & 0x3ff) | 0x1c00 static inline void lox10(unsigned char* view, - const Sized_relobj* object, + const Sized_relobj_file* object, const Symbol_value* psymval, typename elfcpp::Elf_types::Elf_Addr addend) { @@ -1490,9 +1495,10 @@ Target_sparc::plt_entry_size() const template unsigned int -Target_sparc::got_mod_index_entry(Symbol_table* symtab, - Layout* layout, - Sized_relobj* object) +Target_sparc::got_mod_index_entry( + Symbol_table* symtab, + Layout* layout, + Sized_relobj_file* object) { if (this->got_mod_index_offset_ == -1U) { @@ -1709,7 +1715,7 @@ Target_sparc::Scan::generate_tls_call(Symbol_table* symtab, template void Target_sparc::Scan::unsupported_reloc_local( - Sized_relobj* object, + Sized_relobj_file* object, unsigned int r_type) { gold_error(_("%s: unsupported reloc %u against local symbol"), @@ -1816,7 +1822,7 @@ Target_sparc::Scan::local( Symbol_table* symtab, Layout* layout, Target_sparc* target, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela& reloc, @@ -2104,7 +2110,7 @@ Target_sparc::Scan::local( template void Target_sparc::Scan::unsupported_reloc_global( - Sized_relobj* object, + Sized_relobj_file* object, unsigned int r_type, Symbol* gsym) { @@ -2120,7 +2126,7 @@ Target_sparc::Scan::global( Symbol_table* symtab, Layout* layout, Target_sparc* target, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela& reloc, @@ -2498,7 +2504,7 @@ void Target_sparc::gc_process_relocs( Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int, const unsigned char* prelocs, @@ -2533,7 +2539,7 @@ void Target_sparc::scan_relocs( Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -2619,6 +2625,8 @@ Target_sparc::Relocate::relocate( return false; } } + if (this->reloc_adjust_addr_ == view) + view -= 4; typedef Sparc_relocate_functions Reloc; @@ -2636,7 +2644,7 @@ Target_sparc::Relocate::relocate( psymval = &symval; } - const Sized_relobj* object = relinfo->object; + const Sized_relobj_file* object = relinfo->object; const elfcpp::Elf_Xword addend = rela.get_r_addend(); // Get the GOT offset if needed. Unlike i386 and x86_64, our GOT @@ -2979,7 +2987,7 @@ Target_sparc::Relocate::relocate_tls( { Output_segment* tls_segment = relinfo->layout->tls_segment(); typedef Sparc_relocate_functions Reloc; - const Sized_relobj* object = relinfo->object; + const Sized_relobj_file* object = relinfo->object; typedef typename elfcpp::Swap<32, true>::Valtype Insntype; const elfcpp::Elf_Xword addend = rela.get_r_addend(); @@ -3098,7 +3106,15 @@ Target_sparc::Relocate::relocate_tls( wv += 1; this->ignore_gd_add_ = true; } - + else + { + // Even if the delay slot isn't the TLS_GD_ADD + // instruction, we still have to handle the case + // where it sets up %o0 in some other way. + elfcpp::Swap<32, true>::writeval(wv, val); + wv += 1; + this->reloc_adjust_addr_ = view + 4; + } // call __tls_get_addr --> add %g7, %o0, %o0 elfcpp::Swap<32, true>::writeval(wv, 0x9001c008); break; @@ -3392,7 +3408,7 @@ void Target_sparc::scan_relocatable_relocs( Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -3478,7 +3494,8 @@ class Target_selector_sparc : public Target_selector public: Target_selector_sparc() : Target_selector(elfcpp::EM_NONE, size, big_endian, - (size == 64 ? "elf64-sparc" : "elf32-sparc")) + (size == 64 ? "elf64-sparc" : "elf32-sparc"), + (size == 64 ? "elf64_sparc" : "elf32_sparc")) { } Target* do_recognize(int machine, int, int) diff --git a/gold/stringpool.h b/gold/stringpool.h index 2f9a313..c51b143 100644 --- a/gold/stringpool.h +++ b/gold/stringpool.h @@ -1,6 +1,6 @@ // stringpool.h -- a string pool for gold -*- C++ -*- -// Copyright 2006, 2007, 2008 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -219,6 +219,11 @@ class Stringpool_template const Stringpool_char* add(const Stringpool_char* s, bool copy, Key* pkey); + // Add the string S to the pool. + const Stringpool_char* + add(const std::basic_string& s, bool copy, Key* pkey) + { return this->add_with_length(s.data(), s.size(), copy, pkey); } + // Add string S of length LEN characters to the pool. If COPY is // true, S need not be null terminated. const Stringpool_char* diff --git a/gold/symtab.cc b/gold/symtab.cc index 3880ce1..ff1b5ca 100644 --- a/gold/symtab.cc +++ b/gold/symtab.cc @@ -79,6 +79,7 @@ Symbol::init_fields(const char* name, const char* version, this->is_defined_in_discarded_section_ = false; this->undef_binding_set_ = false; this->undef_binding_weak_ = false; + this->is_predefined_ = false; } // Return the demangled version of the symbol's name, but only @@ -133,7 +134,8 @@ void Symbol::init_base_output_data(const char* name, const char* version, Output_data* od, elfcpp::STT type, elfcpp::STB binding, elfcpp::STV visibility, - unsigned char nonvis, bool offset_is_from_end) + unsigned char nonvis, bool offset_is_from_end, + bool is_predefined) { this->init_fields(name, version, type, binding, visibility, nonvis); this->u_.in_output_data.output_data = od; @@ -141,6 +143,7 @@ Symbol::init_base_output_data(const char* name, const char* version, this->source_ = IN_OUTPUT_DATA; this->in_reg_ = true; this->in_real_elf_ = true; + this->is_predefined_ = is_predefined; } // Initialize the fields in the base class Symbol for a symbol defined @@ -151,7 +154,8 @@ Symbol::init_base_output_segment(const char* name, const char* version, Output_segment* os, elfcpp::STT type, elfcpp::STB binding, elfcpp::STV visibility, unsigned char nonvis, - Segment_offset_base offset_base) + Segment_offset_base offset_base, + bool is_predefined) { this->init_fields(name, version, type, binding, visibility, nonvis); this->u_.in_output_segment.output_segment = os; @@ -159,6 +163,7 @@ Symbol::init_base_output_segment(const char* name, const char* version, this->source_ = IN_OUTPUT_SEGMENT; this->in_reg_ = true; this->in_real_elf_ = true; + this->is_predefined_ = is_predefined; } // Initialize the fields in the base class Symbol for a symbol defined @@ -167,12 +172,14 @@ Symbol::init_base_output_segment(const char* name, const char* version, void Symbol::init_base_constant(const char* name, const char* version, elfcpp::STT type, elfcpp::STB binding, - elfcpp::STV visibility, unsigned char nonvis) + elfcpp::STV visibility, unsigned char nonvis, + bool is_predefined) { this->init_fields(name, version, type, binding, visibility, nonvis); this->source_ = IS_CONSTANT; this->in_reg_ = true; this->in_real_elf_ = true; + this->is_predefined_ = is_predefined; } // Initialize the fields in the base class Symbol for an undefined @@ -227,10 +234,11 @@ Sized_symbol::init_output_data(const char* name, const char* version, elfcpp::STB binding, elfcpp::STV visibility, unsigned char nonvis, - bool offset_is_from_end) + bool offset_is_from_end, + bool is_predefined) { this->init_base_output_data(name, version, od, type, binding, visibility, - nonvis, offset_is_from_end); + nonvis, offset_is_from_end, is_predefined); this->value_ = value; this->symsize_ = symsize; } @@ -246,10 +254,11 @@ Sized_symbol::init_output_segment(const char* name, const char* version, elfcpp::STB binding, elfcpp::STV visibility, unsigned char nonvis, - Segment_offset_base offset_base) + Segment_offset_base offset_base, + bool is_predefined) { this->init_base_output_segment(name, version, os, type, binding, visibility, - nonvis, offset_base); + nonvis, offset_base, is_predefined); this->value_ = value; this->symsize_ = symsize; } @@ -262,9 +271,11 @@ void Sized_symbol::init_constant(const char* name, const char* version, Value_type value, Size_type symsize, elfcpp::STT type, elfcpp::STB binding, - elfcpp::STV visibility, unsigned char nonvis) + elfcpp::STV visibility, unsigned char nonvis, + bool is_predefined) { - this->init_base_constant(name, version, type, binding, visibility, nonvis); + this->init_base_constant(name, version, type, binding, visibility, nonvis, + is_predefined); this->value_ = value; this->symsize_ = symsize; } @@ -282,6 +293,21 @@ Sized_symbol::init_undefined(const char* name, const char* version, this->symsize_ = 0; } +// Return an allocated string holding the symbol's name as +// name@version. This is used for relocatable links. + +std::string +Symbol::versioned_name() const +{ + gold_assert(this->version_ != NULL); + std::string ret = this->name_; + ret.push_back('@'); + if (this->is_def_) + ret.push_back('@'); + ret += this->version_; + return ret; +} + // Return true if SHNDX represents a common symbol. bool @@ -388,6 +414,7 @@ Symbol::should_add_dynsym_entry(Symbol_table* symtab) const // externally visible, we need to add it. if ((parameters->options().export_dynamic() || parameters->options().shared()) && !this->is_from_dynobj() + && !this->is_undefined() && this->is_externally_visible()) return true; @@ -1048,13 +1075,13 @@ Symbol_table::add_from_object(Object* object, template void Symbol_table::add_from_relobj( - Sized_relobj* relobj, + Sized_relobj_file* relobj, const unsigned char* syms, size_t count, size_t symndx_offset, const char* sym_names, size_t sym_name_size, - typename Sized_relobj::Symbols* sympointers, + typename Sized_relobj_file::Symbols* sympointers, size_t* defined) { *defined = 0; @@ -1165,12 +1192,14 @@ Symbol_table::add_from_relobj( { memcpy(symbuf, p, sym_size); elfcpp::Sym_write sw(symbuf); - if (orig_st_shndx != elfcpp::SHN_UNDEF && is_ordinary) + if (orig_st_shndx != elfcpp::SHN_UNDEF + && is_ordinary + && relobj->e_type() == elfcpp::ET_REL) { - // Symbol values in object files are section relative. - // This is normally what we want, but since here we are - // converting the symbol to absolute we need to add the - // section address. The section address in an object + // Symbol values in relocatable object files are section + // relative. This is normally what we want, but since here + // we are converting the symbol to absolute we need to add + // the section address. The section address in an object // file is normally zero, but people can use a linker // script to change it. sw.put_st_value(sym.get_st_value() @@ -1211,15 +1240,15 @@ Symbol_table::add_from_relobj( is_default_version, *psym, st_shndx, is_ordinary, orig_st_shndx); + if (is_forced_local) + this->force_local(res); + // If building a shared library using garbage collection, do not // treat externally visible symbols as garbage. if (parameters->options().gc_sections() && parameters->options().shared()) this->gc_mark_symbol_for_shlib(res); - if (is_forced_local) - this->force_local(res); - if (is_defined_in_discarded_section) res->set_is_defined_in_discarded_section(); @@ -1304,7 +1333,7 @@ Symbol_table::add_from_dynobj( const unsigned char* versym, size_t versym_size, const std::vector* version_map, - typename Sized_relobj::Symbols* sympointers, + typename Sized_relobj_file::Symbols* sympointers, size_t* defined) { *defined = 0; @@ -1489,7 +1518,7 @@ Symbol_table::add_from_dynobj( // Add a symbol from a incremental object file. template -Symbol* +Sized_symbol* Symbol_table::add_from_incrobj( Object* obj, const char* name, @@ -1654,7 +1683,9 @@ Symbol_table::define_special_symbol(const char** pname, const char** pversion, return NULL; *pname = oldsym->name(); - if (!is_default_version) + if (is_default_version) + *pversion = this->namepool_.add(*pversion, true, NULL); + else *pversion = oldsym->version(); } else @@ -1843,7 +1874,8 @@ Symbol_table::do_define_in_output_data( return NULL; sym->init_output_data(name, version, od, value, symsize, type, binding, - visibility, nonvis, offset_is_from_end); + visibility, nonvis, offset_is_from_end, + defined == PREDEFINED); if (oldsym == NULL) { @@ -1855,7 +1887,7 @@ Symbol_table::do_define_in_output_data( return sym; } - if (Symbol_table::should_override_with_special(oldsym, defined)) + if (Symbol_table::should_override_with_special(oldsym, type, defined)) this->override_with_special(oldsym, sym); if (resolve_oldsym) @@ -1956,7 +1988,8 @@ Symbol_table::do_define_in_output_segment( return NULL; sym->init_output_segment(name, version, os, value, symsize, type, binding, - visibility, nonvis, offset_base); + visibility, nonvis, offset_base, + defined == PREDEFINED); if (oldsym == NULL) { @@ -1968,7 +2001,7 @@ Symbol_table::do_define_in_output_segment( return sym; } - if (Symbol_table::should_override_with_special(oldsym, defined)) + if (Symbol_table::should_override_with_special(oldsym, type, defined)) this->override_with_special(oldsym, sym); if (resolve_oldsym) @@ -2068,7 +2101,7 @@ Symbol_table::do_define_as_constant( return NULL; sym->init_constant(name, version, value, symsize, type, binding, visibility, - nonvis); + nonvis, defined == PREDEFINED); if (oldsym == NULL) { @@ -2087,7 +2120,7 @@ Symbol_table::do_define_as_constant( } if (force_override - || Symbol_table::should_override_with_special(oldsym, defined)) + || Symbol_table::should_override_with_special(oldsym, type, defined)) this->override_with_special(oldsym, sym); if (resolve_oldsym) @@ -2403,7 +2436,10 @@ Symbol_table::add_to_final_symtab(Symbol* sym, Stringpool* pool, unsigned int* pindex, off_t* poff) { sym->set_symtab_index(*pindex); - pool->add(sym->name(), false, NULL); + if (sym->version() == NULL || !parameters->options().relocatable()) + pool->add(sym->name(), false, NULL); + else + pool->add(sym->versioned_name(), true, NULL); ++*pindex; *poff += elfcpp::Elf_sizes::sym_size; } @@ -2912,7 +2948,10 @@ Symbol_table::sized_write_symbol( unsigned char* p) const { elfcpp::Sym_write osym(p); - osym.put_st_name(pool->get_offset(sym->name())); + if (sym->version() == NULL || !parameters->options().relocatable()) + osym.put_st_name(pool->get_offset(sym->name())); + else + osym.put_st_name(pool->get_offset(sym->versioned_name())); osym.put_st_value(value); // Use a symbol size of zero for undefined symbols from shared libraries. if (shndx == elfcpp::SHN_UNDEF && sym->is_from_dynobj()) @@ -3269,6 +3308,12 @@ Warnings::issue_warning(const Symbol* sym, size_t relnum, off_t reloffset) const { gold_assert(sym->has_warning()); + + // We don't want to issue a warning for a relocation against the + // symbol in the same object file in which the symbol is defined. + if (sym->object() == relinfo->object) + return; + Warning_table::const_iterator p = this->warnings_.find(sym->name()); gold_assert(p != this->warnings_.end()); gold_warning_at_location(relinfo, relnum, reloffset, @@ -3295,13 +3340,13 @@ Sized_symbol<64>::allocate_common(Output_data*, Value_type); template void Symbol_table::add_from_relobj<32, false>( - Sized_relobj<32, false>* relobj, + Sized_relobj_file<32, false>* relobj, const unsigned char* syms, size_t count, size_t symndx_offset, const char* sym_names, size_t sym_name_size, - Sized_relobj<32, false>::Symbols* sympointers, + Sized_relobj_file<32, false>::Symbols* sympointers, size_t* defined); #endif @@ -3309,13 +3354,13 @@ Symbol_table::add_from_relobj<32, false>( template void Symbol_table::add_from_relobj<32, true>( - Sized_relobj<32, true>* relobj, + Sized_relobj_file<32, true>* relobj, const unsigned char* syms, size_t count, size_t symndx_offset, const char* sym_names, size_t sym_name_size, - Sized_relobj<32, true>::Symbols* sympointers, + Sized_relobj_file<32, true>::Symbols* sympointers, size_t* defined); #endif @@ -3323,13 +3368,13 @@ Symbol_table::add_from_relobj<32, true>( template void Symbol_table::add_from_relobj<64, false>( - Sized_relobj<64, false>* relobj, + Sized_relobj_file<64, false>* relobj, const unsigned char* syms, size_t count, size_t symndx_offset, const char* sym_names, size_t sym_name_size, - Sized_relobj<64, false>::Symbols* sympointers, + Sized_relobj_file<64, false>::Symbols* sympointers, size_t* defined); #endif @@ -3337,13 +3382,13 @@ Symbol_table::add_from_relobj<64, false>( template void Symbol_table::add_from_relobj<64, true>( - Sized_relobj<64, true>* relobj, + Sized_relobj_file<64, true>* relobj, const unsigned char* syms, size_t count, size_t symndx_offset, const char* sym_names, size_t sym_name_size, - Sized_relobj<64, true>::Symbols* sympointers, + Sized_relobj_file<64, true>::Symbols* sympointers, size_t* defined); #endif @@ -3399,7 +3444,7 @@ Symbol_table::add_from_dynobj<32, false>( const unsigned char* versym, size_t versym_size, const std::vector* version_map, - Sized_relobj<32, false>::Symbols* sympointers, + Sized_relobj_file<32, false>::Symbols* sympointers, size_t* defined); #endif @@ -3415,7 +3460,7 @@ Symbol_table::add_from_dynobj<32, true>( const unsigned char* versym, size_t versym_size, const std::vector* version_map, - Sized_relobj<32, true>::Symbols* sympointers, + Sized_relobj_file<32, true>::Symbols* sympointers, size_t* defined); #endif @@ -3431,7 +3476,7 @@ Symbol_table::add_from_dynobj<64, false>( const unsigned char* versym, size_t versym_size, const std::vector* version_map, - Sized_relobj<64, false>::Symbols* sympointers, + Sized_relobj_file<64, false>::Symbols* sympointers, size_t* defined); #endif @@ -3447,13 +3492,13 @@ Symbol_table::add_from_dynobj<64, true>( const unsigned char* versym, size_t versym_size, const std::vector* version_map, - Sized_relobj<64, true>::Symbols* sympointers, + Sized_relobj_file<64, true>::Symbols* sympointers, size_t* defined); #endif #ifdef HAVE_TARGET_32_LITTLE template -Symbol* +Sized_symbol<32>* Symbol_table::add_from_incrobj( Object* obj, const char* name, @@ -3463,7 +3508,7 @@ Symbol_table::add_from_incrobj( #ifdef HAVE_TARGET_32_BIG template -Symbol* +Sized_symbol<32>* Symbol_table::add_from_incrobj( Object* obj, const char* name, @@ -3473,7 +3518,7 @@ Symbol_table::add_from_incrobj( #ifdef HAVE_TARGET_64_LITTLE template -Symbol* +Sized_symbol<64>* Symbol_table::add_from_incrobj( Object* obj, const char* name, @@ -3483,7 +3528,7 @@ Symbol_table::add_from_incrobj( #ifdef HAVE_TARGET_64_BIG template -Symbol* +Sized_symbol<64>* Symbol_table::add_from_incrobj( Object* obj, const char* name, diff --git a/gold/symtab.h b/gold/symtab.h index 4196138..b9b9e00 100644 --- a/gold/symtab.h +++ b/gold/symtab.h @@ -1,6 +1,6 @@ // symtab.h -- the gold symbol table -*- C++ -*- -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -42,7 +42,7 @@ class Mapfile; class Object; class Relobj; template -class Sized_relobj; +class Sized_relobj_file; template class Sized_pluginobj; class Dynobj; @@ -136,6 +136,10 @@ class Symbol set_is_default() { this->is_def_ = true; } + // Return the symbol's name as name@version (or name@@version). + std::string + versioned_name() const; + // Return the symbol source. Source source() const @@ -534,8 +538,9 @@ class Symbol bool is_externally_visible() const { - return (this->visibility_ == elfcpp::STV_DEFAULT - || this->visibility_ == elfcpp::STV_PROTECTED); + return ((this->visibility_ == elfcpp::STV_DEFAULT + || this->visibility_ == elfcpp::STV_PROTECTED) + && !this->is_forced_local_); } // Return true if this symbol can be preempted by a definition in @@ -803,6 +808,11 @@ class Symbol && !this->is_func()); } + // Return true if this symbol was predefined by the linker. + bool + is_predefined() const + { return this->is_predefined_; } + protected: // Instances of this class should always be created at a specific // size. @@ -828,7 +838,8 @@ class Symbol void init_base_output_data(const char* name, const char* version, Output_data*, elfcpp::STT, elfcpp::STB, elfcpp::STV, - unsigned char nonvis, bool offset_is_from_end); + unsigned char nonvis, bool offset_is_from_end, + bool is_predefined); // Initialize fields for an Output_segment. void @@ -836,13 +847,14 @@ class Symbol Output_segment* os, elfcpp::STT type, elfcpp::STB binding, elfcpp::STV visibility, unsigned char nonvis, - Segment_offset_base offset_base); + Segment_offset_base offset_base, + bool is_predefined); // Initialize fields for a constant. void init_base_constant(const char* name, const char* version, elfcpp::STT type, elfcpp::STB binding, elfcpp::STV visibility, - unsigned char nonvis); + unsigned char nonvis, bool is_predefined); // Initialize fields for an undefined symbol. void @@ -991,6 +1003,8 @@ class Symbol // True if this symbol was a weak undef resolved by a dynamic def // (bit 33). bool undef_binding_weak_ : 1; + // True if this symbol is a predefined linker symbol (bit 34). + bool is_predefined_ : 1; }; // The parts of a symbol which are size specific. Using a template @@ -1020,20 +1034,20 @@ class Sized_symbol : public Symbol init_output_data(const char* name, const char* version, Output_data*, Value_type value, Size_type symsize, elfcpp::STT, elfcpp::STB, elfcpp::STV, unsigned char nonvis, - bool offset_is_from_end); + bool offset_is_from_end, bool is_predefined); // Initialize fields for an Output_segment. void init_output_segment(const char* name, const char* version, Output_segment*, Value_type value, Size_type symsize, elfcpp::STT, elfcpp::STB, elfcpp::STV, unsigned char nonvis, - Segment_offset_base offset_base); + Segment_offset_base offset_base, bool is_predefined); // Initialize fields for a constant. void init_constant(const char* name, const char* version, Value_type value, Size_type symsize, elfcpp::STT, elfcpp::STB, elfcpp::STV, - unsigned char nonvis); + unsigned char nonvis, bool is_predefined); // Initialize fields for an undefined symbol. void @@ -1250,6 +1264,9 @@ class Symbol_table SCRIPT, // Predefined by the linker. PREDEFINED, + // Defined by the linker during an incremental base link, but not + // a predefined symbol (e.g., common, defined in script). + INCREMENTAL_BASE, }; // The order in which we sort common symbols. @@ -1309,11 +1326,11 @@ class Symbol_table // *DEFINED to the number of defined symbols. template void - add_from_relobj(Sized_relobj* relobj, + add_from_relobj(Sized_relobj_file* relobj, const unsigned char* syms, size_t count, size_t symndx_offset, const char* sym_names, size_t sym_name_size, - typename Sized_relobj::Symbols*, + typename Sized_relobj_file::Symbols*, size_t* defined); // Add one external symbol from the plugin object OBJ to the symbol table. @@ -1335,13 +1352,13 @@ class Symbol_table const char* sym_names, size_t sym_name_size, const unsigned char* versym, size_t versym_size, const std::vector*, - typename Sized_relobj::Symbols*, + typename Sized_relobj_file::Symbols*, size_t* defined); // Add one external symbol from the incremental object OBJ to the symbol // table. Returns a pointer to the resolved symbol in the symbol table. template - Symbol* + Sized_symbol* add_from_incrobj(Object* obj, const char* name, const char* ver, elfcpp::Sym* sym); @@ -1645,7 +1662,8 @@ class Symbol_table // Whether we should override a symbol, based on flags in // resolve.cc. static bool - should_override(const Symbol*, unsigned int, Defined, Object*, bool*, bool*); + should_override(const Symbol*, unsigned int, elfcpp::STT, Defined, + Object*, bool*, bool*); // Report a problem in symbol resolution. static void @@ -1663,7 +1681,7 @@ class Symbol_table // Whether we should override a symbol with a special symbol which // is automatically defined by the linker. static bool - should_override_with_special(const Symbol*, Defined); + should_override_with_special(const Symbol*, elfcpp::STT, Defined); // Override a symbol with a special symbol. template diff --git a/gold/target-reloc.h b/gold/target-reloc.h index 2d12fa2..464a3fa 100644 --- a/gold/target-reloc.h +++ b/gold/target-reloc.h @@ -1,6 +1,6 @@ // target-reloc.h -- target specific relocation support -*- C++ -*- -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -46,7 +46,7 @@ scan_relocs( Symbol_table* symtab, Layout* layout, Target_type* target, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, const unsigned char* prelocs, size_t reloc_count, @@ -169,6 +169,57 @@ visibility_error(const Symbol* sym) v, sym->name()); } +// Return true if we are should issue an error saying that SYM is an +// undefined symbol. This is called if there is a relocation against +// SYM. + +inline bool +issue_undefined_symbol_error(const Symbol* sym) +{ + // We only report global symbols. + if (sym == NULL) + return false; + + // We only report undefined symbols. + if (!sym->is_undefined() && !sym->is_placeholder()) + return false; + + // We don't report weak symbols. + if (sym->binding() == elfcpp::STB_WEAK) + return false; + + // We don't report symbols defined in discarded sections. + if (sym->is_defined_in_discarded_section()) + return false; + + // If the target defines this symbol, don't report it here. + if (parameters->target().is_defined_by_abi(sym)) + return false; + + // See if we've been told to ignore whether this symbol is + // undefined. + const char* const u = parameters->options().unresolved_symbols(); + if (u != NULL) + { + if (strcmp(u, "ignore-all") == 0) + return false; + if (strcmp(u, "report-all") == 0) + return true; + if (strcmp(u, "ignore-in-object-files") == 0 && !sym->in_dyn()) + return false; + if (strcmp(u, "ignore-in-shared-libs") == 0 && !sym->in_reg()) + return false; + } + + // When creating a shared library, only report unresolved symbols if + // -z defs was used. + if (parameters->options().shared() && !parameters->options().defs()) + return false; + + // Otherwise issue a warning. + return true; +} + // This function implements the generic part of relocation processing. // The template parameter Relocate must be a class type which provides // a single function, relocate(), which implements the machine @@ -213,7 +264,7 @@ relocate_section( const int reloc_size = Reloc_types::reloc_size; Relocate relocate; - Sized_relobj* object = relinfo->object; + Sized_relobj_file* object = relinfo->object; unsigned int local_count = object->local_symbol_count(); Comdat_behavior comdat_behavior = CB_UNDETERMINED; @@ -344,13 +395,7 @@ relocate_section( continue; } - if (sym != NULL - && (sym->is_undefined() || sym->is_placeholder()) - && sym->binding() != elfcpp::STB_WEAK - && !is_defined_in_discarded_section - && !target->is_defined_by_abi(sym) - && (!parameters->options().shared() // -shared - || parameters->options().defs())) // -z defs + if (issue_undefined_symbol_error(sym)) gold_undefined_symbol_at_location(sym, relinfo, i, offset); else if (sym != NULL && sym->visibility() != elfcpp::STV_DEFAULT @@ -362,6 +407,46 @@ relocate_section( } } +// Apply an incremental relocation. + +template +void +apply_relocation(const Relocate_info* relinfo, + Target_type* target, + typename elfcpp::Elf_types::Elf_Addr r_offset, + unsigned int r_type, + typename elfcpp::Elf_types::Elf_Swxword r_addend, + const Symbol* gsym, + unsigned char* view, + typename elfcpp::Elf_types::Elf_Addr address, + section_size_type view_size) +{ + // Construct the ELF relocation in a temporary buffer. + const int reloc_size = elfcpp::Elf_sizes<64>::rela_size; + unsigned char relbuf[reloc_size]; + elfcpp::Rela<64, false> rel(relbuf); + elfcpp::Rela_write<64, false> orel(relbuf); + orel.put_r_offset(r_offset); + orel.put_r_info(elfcpp::elf_r_info<64>(0, r_type)); + orel.put_r_addend(r_addend); + + // Setup a Symbol_value for the global symbol. + const Sized_symbol<64>* sym = static_cast*>(gsym); + Symbol_value<64> symval; + gold_assert(sym->has_symtab_index() && sym->symtab_index() != -1U); + symval.set_output_symtab_index(sym->symtab_index()); + symval.set_output_value(sym->value()); + if (gsym->type() == elfcpp::STT_TLS) + symval.set_is_tls_symbol(); + else if (gsym->type() == elfcpp::STT_GNU_IFUNC) + symval.set_is_ifunc_symbol(); + + Relocate relocate; + relocate.relocate(relinfo, target, NULL, -1U, rel, r_type, sym, &symval, + view + r_offset, address + r_offset, view_size); +} + // This class may be used as a typical class for the // Scan_relocatable_reloc parameter to scan_relocatable_relocs. The // template parameter Classify_reloc must be a class type which @@ -435,7 +520,7 @@ void scan_relocatable_relocs( Symbol_table*, Layout*, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, const unsigned char* prelocs, size_t reloc_count, @@ -530,7 +615,7 @@ relocate_for_relocatable( const int reloc_size = Reloc_types::reloc_size; const Address invalid_address = static_cast
(0) - 1; - Sized_relobj* const object = relinfo->object; + Sized_relobj_file* const object = relinfo->object; const unsigned int local_count = object->local_symbol_count(); unsigned char* pwrite = reloc_view; @@ -584,6 +669,7 @@ relocate_for_relocatable( case Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_2: case Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4: case Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_8: + case Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED: { // We are adjusting a section symbol. We need to find // the symbol table index of the section symbol for @@ -705,6 +791,12 @@ relocate_for_relocatable( psymval); break; + case Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED: + Relocate_functions::rel32_unaligned(padd, + object, + psymval); + break; + default: gold_unreachable(); } diff --git a/gold/target-select.cc b/gold/target-select.cc index 859bc3b..9370a87 100644 --- a/gold/target-select.cc +++ b/gold/target-select.cc @@ -1,6 +1,6 @@ // target-select.cc -- select a target for an object file -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -22,9 +22,12 @@ #include "gold.h" +#include #include #include "elfcpp.h" +#include "options.h" +#include "parameters.h" #include "target-select.h" namespace @@ -52,9 +55,10 @@ Set_target_once::do_run_once(void*) // fast. Target_selector::Target_selector(int machine, int size, bool is_big_endian, - const char* bfd_name) + const char* bfd_name, const char* emulation) : machine_(machine), size_(size), is_big_endian_(is_big_endian), - bfd_name_(bfd_name), instantiated_target_(NULL), set_target_once_(this) + bfd_name_(bfd_name), emulation_(emulation), instantiated_target_(NULL), + set_target_once_(this) { this->next_ = target_selectors; target_selectors = this; @@ -79,6 +83,18 @@ Target_selector::set_target() this->instantiated_target_ = this->do_instantiate_target(); } +// If we instantiated TARGET, return the corresponding BFD name. + +const char* +Target_selector::do_target_bfd_name(const Target* target) +{ + if (!this->is_our_target(target)) + return NULL; + const char* my_bfd_name = this->bfd_name(); + gold_assert(my_bfd_name != NULL); + return my_bfd_name; +} + // Find the target for an ELF file. Target* @@ -104,14 +120,33 @@ select_target(int machine, int size, bool is_big_endian, int osabi, // --oformat option. Target* -select_target_by_name(const char* name) +select_target_by_bfd_name(const char* name) { for (Target_selector* p = target_selectors; p != NULL; p = p->next()) { const char* pname = p->bfd_name(); if (pname == NULL || strcmp(pname, name) == 0) { - Target* ret = p->recognize_by_name(name); + Target* ret = p->recognize_by_bfd_name(name); + if (ret != NULL) + return ret; + } + } + return NULL; +} + +// Find a target using a GNU linker emulation. This is used to +// support the -m option. + +Target* +select_target_by_emulation(const char* name) +{ + for (Target_selector* p = target_selectors; p != NULL; p = p->next()) + { + const char* pname = p->emulation(); + if (pname == NULL || strcmp(pname, name) == 0) + { + Target* ret = p->recognize_by_emulation(name); if (ret != NULL) return ret; } @@ -125,7 +160,58 @@ void supported_target_names(std::vector* names) { for (Target_selector* p = target_selectors; p != NULL; p = p->next()) - p->supported_names(names); + p->supported_bfd_names(names); +} + +// Push all the supported emulations onto a vector. + +void +supported_emulation_names(std::vector* names) +{ + for (Target_selector* p = target_selectors; p != NULL; p = p->next()) + p->supported_emulations(names); +} + +// Implement the --print-output-format option. + +void +print_output_format() +{ + if (!parameters->target_valid()) + { + // This case arises when --print-output-format is used with no + // input files. We need to come up with the right string to + // print based on the other options. If the user specified the + // format using a --oformat option, use that. That saves each + // target from having to remember the name that was used to + // select it. In other cases, we will just have to ask the + // target. + if (parameters->options().user_set_oformat()) + { + const char* bfd_name = parameters->options().oformat(); + Target* target = select_target_by_bfd_name(bfd_name); + if (target != NULL) + printf("%s\n", bfd_name); + else + gold_error(_("unrecognized output format %s"), bfd_name); + return; + } + + parameters_force_valid_target(); + } + + const Target* target = ¶meters->target(); + for (Target_selector* p = target_selectors; p != NULL; p = p->next()) + { + const char* bfd_name = p->target_bfd_name(target); + if (bfd_name != NULL) + { + printf("%s\n", bfd_name); + return; + } + } + + gold_unreachable(); } } // End namespace gold. diff --git a/gold/target-select.h b/gold/target-select.h index 4e2ea92..310c0b9 100644 --- a/gold/target-select.h +++ b/gold/target-select.h @@ -1,6 +1,6 @@ // target-select.h -- select a target for an object file -*- C++ -*- -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -65,9 +65,10 @@ class Target_selector // or 64), and endianness. The machine number can be EM_NONE to // test for any machine number. BFD_NAME is the name of the target // used by the GNU linker, for backward compatibility; it may be - // NULL. + // NULL. EMULATION is the name of the emulation used by the GNU + // linker; it is similar to BFD_NAME. Target_selector(int machine, int size, bool is_big_endian, - const char* bfd_name); + const char* bfd_name, const char* emulation); virtual ~Target_selector() { } @@ -81,14 +82,26 @@ class Target_selector // If NAME matches the target, return a pointer to a target // structure. Target* - recognize_by_name(const char* name) - { return this->do_recognize_by_name(name); } + recognize_by_bfd_name(const char* name) + { return this->do_recognize_by_bfd_name(name); } - // Push all supported names onto the vector. This is only used for - // help output. + // Push all supported BFD names onto the vector. This is only used + // for help output. void - supported_names(std::vector* names) - { this->do_supported_names(names); } + supported_bfd_names(std::vector* names) + { this->do_supported_bfd_names(names); } + + // If NAME matches the target emulation, return a pointer to a + // target structure. + Target* + recognize_by_emulation(const char* name) + { return this->do_recognize_by_emulation(name); } + + // Push all supported emulations onto the vector. This is only used + // for help output. + void + supported_emulations(std::vector* names) + { this->do_supported_emulations(names); } // Return the next Target_selector in the linked list. Target_selector* @@ -114,12 +127,26 @@ class Target_selector { return this->is_big_endian_; } // Return the BFD name. This may return NULL, in which case the - // do_recognize_by_name hook will be responsible for matching the - // BFD name. + // do_recognize_by_bfd_name hook will be responsible for matching + // the BFD name. const char* bfd_name() const { return this->bfd_name_; } + // Return the emulation. This may return NULL, in which case the + // do_recognize_by_emulation hook will be responsible for matching + // the emulation. + const char* + emulation() const + { return this->emulation_; } + + // The reverse mapping, for --print-output-format: if we + // instantiated TARGET, return our BFD_NAME. If we did not + // instantiate it, return NULL. + const char* + target_bfd_name(const Target* target) + { return this->do_target_bfd_name(target); } + protected: // Return an instance of the real target. This must be implemented // by the child class. @@ -141,23 +168,50 @@ class Target_selector // child class may implement a different version of this to // recognize more than one name. virtual Target* - do_recognize_by_name(const char*) + do_recognize_by_bfd_name(const char*) { return this->instantiate_target(); } // Return a list of supported BFD names. The child class may // implement a different version of this to handle more than one // name. virtual void - do_supported_names(std::vector* names) + do_supported_bfd_names(std::vector* names) { gold_assert(this->bfd_name_ != NULL); names->push_back(this->bfd_name_); } + // Recognize a target by emulation. When this is called we already + // know that the name matches (or that the emulation_ field is + // NULL). The child class may implement a different version of this + // to recognize more than one emulation. + virtual Target* + do_recognize_by_emulation(const char*) + { return this->instantiate_target(); } + + // Return a list of supported emulations. The child class may + // implement a different version of this to handle more than one + // emulation. + virtual void + do_supported_emulations(std::vector* emulations) + { + gold_assert(this->emulation_ != NULL); + emulations->push_back(this->emulation_); + } + + // Map from target to BFD name. + virtual const char* + do_target_bfd_name(const Target*); + // Instantiate the target and return it. Target* instantiate_target(); + // Return whether TARGET is the target we instantiated. + bool + is_our_target(const Target* target) + { return target == this->instantiated_target_; } + private: // Set the target. void @@ -173,6 +227,8 @@ class Target_selector const bool is_big_endian_; // BFD name of target, for compatibility. const char* const bfd_name_; + // GNU linker emulation for this target, for compatibility. + const char* const emulation_; // Next entry in list built at global constructor time. Target_selector* next_; // The singleton Target structure--this points to an instance of the @@ -191,7 +247,12 @@ select_target(int machine, int size, bool big_endian, int osabi, // Select a target using a BFD name. extern Target* -select_target_by_name(const char* name); +select_target_by_bfd_name(const char* name); + +// Select a target using a GNU linker emulation. + +extern Target* +select_target_by_emulation(const char* name); // Fill in a vector with the list of supported targets. This returns // a list of BFD names. @@ -199,6 +260,16 @@ select_target_by_name(const char* name); extern void supported_target_names(std::vector*); +// Fill in a vector with the list of supported emulations. + +extern void +supported_emulation_names(std::vector*); + +// Print the output format, for the --print-output-format option. + +extern void +print_output_format(); + } // End namespace gold. #endif // !defined(GOLD_TARGET_SELECT_H) diff --git a/gold/target.cc b/gold/target.cc index 2c0cbbf..091f9d3 100644 --- a/gold/target.cc +++ b/gold/target.cc @@ -1,6 +1,6 @@ -// target.cc +// target.cc -- target support for gold. -// Copyright 2009, 2010 Free Software Foundation, Inc. +// Copyright 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Doug Kwan . // This file is part of gold. @@ -72,10 +72,13 @@ Target::do_make_elf_object_implementation( const elfcpp::Ehdr& ehdr) { int et = ehdr.get_e_type(); - if (et == elfcpp::ET_REL) + // ET_EXEC files are valid input for --just-symbols/-R, + // and we treat them as relocatable objects. + if (et == elfcpp::ET_REL + || (et == elfcpp::ET_EXEC && input_file->just_symbols())) { - Sized_relobj* obj = - new Sized_relobj(name, input_file, offset, ehdr); + Sized_relobj_file* obj = + new Sized_relobj_file(name, input_file, offset, ehdr); obj->setup(); return obj; } @@ -200,4 +203,49 @@ Target::set_view_to_nop(unsigned char* view, section_size_type view_size, } } +// Class Sized_target. + +// Set the EI_OSABI field of the ELF header if requested. + +template +void +Sized_target::do_adjust_elf_header(unsigned char* view, + int len) const +{ + elfcpp::ELFOSABI osabi = this->osabi(); + if (osabi != elfcpp::ELFOSABI_NONE) + { + gold_assert(len == elfcpp::Elf_sizes::ehdr_size); + + elfcpp::Ehdr ehdr(view); + unsigned char e_ident[elfcpp::EI_NIDENT]; + memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT); + + e_ident[elfcpp::EI_OSABI] = osabi; + + elfcpp::Ehdr_write oehdr(view); + oehdr.put_e_ident(e_ident); + } +} + +#ifdef HAVE_TARGET_32_LITTLE +template +class Sized_target<32, false>; +#endif + +#ifdef HAVE_TARGET_32_BIG +template +class Sized_target<32, true>; +#endif + +#ifdef HAVE_TARGET_64_LITTLE +template +class Sized_target<64, false>; +#endif + +#ifdef HAVE_TARGET_64_BIG +template +class Sized_target<64, true>; +#endif + } // End namespace gold. diff --git a/gold/target.h b/gold/target.h index 85af8d3..a378120 100644 --- a/gold/target.h +++ b/gold/target.h @@ -1,6 +1,6 @@ // target.h -- target support for gold -*- C++ -*- -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -45,6 +45,8 @@ class Object; class Relobj; template class Sized_relobj; +template +class Sized_relobj_file; class Relocatable_relocs; template class Relocate_info; @@ -54,6 +56,8 @@ template class Sized_symbol; class Symbol_table; class Output_data; +template +class Output_data_got; class Output_section; class Input_objects; class Task; @@ -66,34 +70,6 @@ class Target virtual ~Target() { } - // Virtual function which is set to return true by a target if - // it can use relocation types to determine if a function's - // pointer is taken. - virtual bool - can_check_for_function_pointers() const - { return false; } - - // This function is used in ICF (icf.cc). This is set to true by - // the target if a relocation to a merged section can be processed - // to retrieve the contents of the merged section. - virtual bool - can_icf_inline_merge_sections () const - { return false; } - - // Whether a section called SECTION_NAME may have function pointers to - // sections not eligible for safe ICF folding. - virtual bool - section_may_have_icf_unsafe_pointers(const char* section_name) const - { - // We recognize sections for normal vtables, construction vtables and - // EH frames. - return (!is_prefix_of(".rodata._ZTV", section_name) - && !is_prefix_of(".data.rel.ro._ZTV", section_name) - && !is_prefix_of(".rodata._ZTC", section_name) - && !is_prefix_of(".data.rel.ro._ZTC", section_name) - && !is_prefix_of(".eh_frame", section_name)); - } - // Return the bit size that this target implements. This should // return 32 or 64. int @@ -270,17 +246,46 @@ class Target reloc_addend(void* arg, unsigned int type, uint64_t addend) const { return this->do_reloc_addend(arg, type, addend); } - // Return the PLT section to use for a global symbol. This is used - // for STT_GNU_IFUNC symbols. - Output_data* - plt_section_for_global(const Symbol* sym) const - { return this->do_plt_section_for_global(sym); } + // Return the PLT address to use for a global symbol. This is used + // for STT_GNU_IFUNC symbols. The symbol's plt_offset is relative + // to this PLT address. + uint64_t + plt_address_for_global(const Symbol* sym) const + { return this->do_plt_address_for_global(sym); } + + // Return the PLT address to use for a local symbol. This is used + // for STT_GNU_IFUNC symbols. The symbol's plt_offset is relative + // to this PLT address. + uint64_t + plt_address_for_local(const Relobj* object, unsigned int symndx) const + { return this->do_plt_address_for_local(object, symndx); } + + // Return whether this target can use relocation types to determine + // if a function's address is taken. + bool + can_check_for_function_pointers() const + { return this->do_can_check_for_function_pointers(); } + + // Return whether a relocation to a merged section can be processed + // to retrieve the contents. + bool + can_icf_inline_merge_sections () const + { return this->pti_->can_icf_inline_merge_sections; } + + // Whether a section called SECTION_NAME may have function pointers to + // sections not eligible for safe ICF folding. + virtual bool + section_may_have_icf_unsafe_pointers(const char* section_name) const + { return this->do_section_may_have_icf_unsafe_pointers(section_name); } - // Return the PLT section to use for a local symbol. This is used - // for STT_GNU_IFUNC symbols. - Output_data* - plt_section_for_local(const Relobj* object, unsigned int symndx) const - { return this->do_plt_section_for_local(object, symndx); } + // Return the base to use for the PC value in an FDE when it is + // encoded using DW_EH_PE_datarel. This does not appear to be + // documented anywhere, but it is target specific. Any use of + // DW_EH_PE_datarel in gcc requires defining a special macro + // (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX) to output the value. + uint64_t + ehframe_datarel_base() const + { return this->do_ehframe_datarel_base(); } // Return true if a reference to SYM from a reloc of type R_TYPE // means that the current function may call an object compiled @@ -381,6 +386,17 @@ class Target select_as_default_target() { this->do_select_as_default_target(); } + // Return the value to store in the EI_OSABI field in the ELF + // header. + elfcpp::ELFOSABI + osabi() const + { return this->osabi_; } + + // Set the value to store in the EI_OSABI field in the ELF header. + void + set_osabi(elfcpp::ELFOSABI osabi) + { this->osabi_ = osabi; } + protected: // This struct holds the constant information for a child class. We // use a struct to avoid the overhead of virtual function calls for @@ -402,6 +418,9 @@ class Target // Whether an object file with no .note.GNU-stack sections implies // that the stack should be executable. bool is_default_stack_executable; + // Whether a relocation to a merged section can be processed to + // retrieve the contents. + bool can_icf_inline_merge_sections; // Prefix character to strip when checking for wrapping. char wrap_char; // The default dynamic linker name. @@ -430,7 +449,7 @@ class Target Target(const Target_info* pti) : pti_(pti), processor_specific_flags_(0), - are_processor_specific_flags_set_(false) + are_processor_specific_flags_set_(false), osabi_(elfcpp::ELFOSABI_NONE) { } // Virtual function which may be implemented by the child class. @@ -462,10 +481,10 @@ class Target // Adjust the output file header before it is written out. VIEW // points to the header in external form. LEN is the length, and // will be one of the values of elfcpp::Elf_sizes::ehdr_size. - // By default, we do nothing. + // By default, we set the EI_OSABI field if requested (in + // Sized_target). virtual void - do_adjust_elf_header(unsigned char*, int) const - { } + do_adjust_elf_header(unsigned char*, int) const = 0; // Virtual function which may be overridden by the child class. virtual bool @@ -485,12 +504,36 @@ class Target // Virtual functions that must be overridden by a target that uses // STT_GNU_IFUNC symbols. - virtual Output_data* - do_plt_section_for_global(const Symbol*) const + virtual uint64_t + do_plt_address_for_global(const Symbol*) const { gold_unreachable(); } - virtual Output_data* - do_plt_section_for_local(const Relobj*, unsigned int) const + virtual uint64_t + do_plt_address_for_local(const Relobj*, unsigned int) const + { gold_unreachable(); } + + // Virtual function which may be overriden by the child class. + virtual bool + do_can_check_for_function_pointers() const + { return false; } + + // Virtual function which may be overridden by the child class. We + // recognize some default sections for which we don't care whether + // they have function pointers. + virtual bool + do_section_may_have_icf_unsafe_pointers(const char* section_name) const + { + // We recognize sections for normal vtables, construction vtables and + // EH frames. + return (!is_prefix_of(".rodata._ZTV", section_name) + && !is_prefix_of(".data.rel.ro._ZTV", section_name) + && !is_prefix_of(".rodata._ZTC", section_name) + && !is_prefix_of(".data.rel.ro._ZTC", section_name) + && !is_prefix_of(".eh_frame", section_name)); + } + + virtual uint64_t + do_ehframe_datarel_base() const { gold_unreachable(); } // Virtual function which may be overridden by the child class. The @@ -605,6 +648,10 @@ class Target elfcpp::Elf_Word processor_specific_flags_; // Whether the processor-specific flags are set at least once. bool are_processor_specific_flags_set_; + // If not ELFOSABI_NONE, the value to put in the EI_OSABI field of + // the ELF header. This is handled at this level because it is + // OS-specific rather than processor-specific. + elfcpp::ELFOSABI osabi_; }; // The abstract class for a specific size and endianness of target. @@ -640,7 +687,7 @@ class Sized_target : public Target virtual void gc_process_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -665,7 +712,7 @@ class Sized_target : public Target virtual void scan_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -704,7 +751,7 @@ class Sized_target : public Target virtual void scan_relocatable_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj* object, + Sized_relobj_file* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -795,6 +842,61 @@ class Sized_target : public Target plt_entry_size() const { gold_unreachable(); } + // Create the GOT and PLT sections for an incremental update. + // A target needs to implement this to support incremental linking. + + virtual Output_data_got* + init_got_plt_for_update(Symbol_table*, + Layout*, + unsigned int /* got_count */, + unsigned int /* plt_count */) + { gold_unreachable(); } + + // Reserve a GOT entry for a local symbol, and regenerate any + // necessary dynamic relocations. + virtual void + reserve_local_got_entry(unsigned int /* got_index */, + Sized_relobj* /* obj */, + unsigned int /* r_sym */, + unsigned int /* got_type */) + { gold_unreachable(); } + + // Reserve a GOT entry for a global symbol, and regenerate any + // necessary dynamic relocations. + virtual void + reserve_global_got_entry(unsigned int /* got_index */, Symbol* /* gsym */, + unsigned int /* got_type */) + { gold_unreachable(); } + + // Register an existing PLT entry for a global symbol. + // A target needs to implement this to support incremental linking. + + virtual void + register_global_plt_entry(Symbol_table*, Layout*, + unsigned int /* plt_index */, + Symbol*) + { gold_unreachable(); } + + // Force a COPY relocation for a given symbol. + // A target needs to implement this to support incremental linking. + + virtual void + emit_copy_reloc(Symbol_table*, Symbol*, Output_section*, off_t) + { gold_unreachable(); } + + // Apply an incremental relocation. + + virtual void + apply_relocation(const Relocate_info* /* relinfo */, + typename elfcpp::Elf_types::Elf_Addr /* r_offset */, + unsigned int /* r_type */, + typename elfcpp::Elf_types::Elf_Swxword /* r_addend */, + const Symbol* /* gsym */, + unsigned char* /* view */, + typename elfcpp::Elf_types::Elf_Addr /* address */, + section_size_type /* view_size */) + { gold_unreachable(); } + protected: Sized_target(const Target::Target_info* pti) : Target(pti) @@ -802,6 +904,10 @@ class Sized_target : public Target gold_assert(pti->size == size); gold_assert(pti->is_big_endian ? big_endian : !big_endian); } + + // Set the EI_OSABI field if requested. + virtual void + do_adjust_elf_header(unsigned char*, int) const; }; } // End namespace gold. diff --git a/gold/testsuite/Makefile.am b/gold/testsuite/Makefile.am index 2675763..9b8605b 100644 --- a/gold/testsuite/Makefile.am +++ b/gold/testsuite/Makefile.am @@ -80,6 +80,12 @@ gcctestdir/ld: ../ld-new rm -f gcctestdir/ld (cd gcctestdir && $(LN_S) ../../ld-new ld) +# Some tests require the latest features of an in-tree assembler. +gcctestdir/as: $(TEST_AS) + test -d gcctestdir || mkdir -p gcctestdir + rm -f gcctestdir/as + (cd gcctestdir && $(LN_S) $(abs_top_builddir)/../gas/as-new as) + endif GCC check_PROGRAMS += object_unittest @@ -251,22 +257,28 @@ icf_sht_rel_addend_test.stdout: icf_sht_rel_addend_test $(TEST_NM) icf_sht_rel_addend_test > icf_sht_rel_addend_test.stdout check_PROGRAMS += basic_test -check_PROGRAMS += basic_static_test check_PROGRAMS += basic_pic_test -check_PROGRAMS += basic_static_pic_test basic_test.o: basic_test.cc $(CXXCOMPILE) -O0 -c -o $@ $< basic_test: basic_test.o gcctestdir/ld $(CXXLINK) -Bgcctestdir/ basic_test.o + +if HAVE_STATIC +check_PROGRAMS += basic_static_test basic_static_test: basic_test.o gcctestdir/ld $(CXXLINK) -Bgcctestdir/ -static basic_test.o +endif basic_pic_test.o: basic_test.cc $(CXXCOMPILE) -O0 -c -fpic -o $@ $< basic_pic_test: basic_pic_test.o gcctestdir/ld $(CXXLINK) -Bgcctestdir/ basic_pic_test.o + +if HAVE_STATIC +check_PROGRAMS += basic_static_pic_test basic_static_pic_test: basic_pic_test.o gcctestdir/ld $(CXXLINK) -Bgcctestdir/ -static basic_pic_test.o +endif check_PROGRAMS += basic_pie_test basic_pie_test.o: basic_test.cc @@ -275,20 +287,20 @@ basic_pie_test: basic_pie_test.o gcctestdir/ld $(CXXLINK) -Bgcctestdir/ -pie basic_pie_test.o check_PROGRAMS += constructor_test -check_PROGRAMS += constructor_static_test constructor_test_SOURCES = constructor_test.cc constructor_test_DEPENDENCIES = gcctestdir/ld constructor_test_LDFLAGS = -Bgcctestdir/ constructor_test_LDADD = +if HAVE_STATIC +check_PROGRAMS += constructor_static_test constructor_static_test_SOURCES = $(constructor_test_SOURCES) constructor_static_test_DEPENDENCIES = $(constructor_test_DEPENDENCIES) constructor_static_test_LDFLAGS = $(constructor_test_LDFLAGS) -static constructor_static_test_LDADD = $(constructor_test_LDADD) - +endif check_PROGRAMS += two_file_test -check_PROGRAMS += two_file_static_test check_PROGRAMS += two_file_pic_test two_file_test_SOURCES = \ two_file_test_1.cc \ @@ -300,10 +312,13 @@ two_file_test_DEPENDENCIES = gcctestdir/ld two_file_test_LDFLAGS = -Bgcctestdir/ two_file_test_LDADD = +if HAVE_STATIC +check_PROGRAMS += two_file_static_test two_file_static_test_SOURCES = $(two_file_test_SOURCES) two_file_static_test_DEPENDENCIES = $(two_file_test_DEPENDENCIES) two_file_static_test_LDFLAGS = $(two_file_test_LDFLAGS) -static two_file_static_test_LDADD = $(two_file_test_LDADD) +endif two_file_pic_test_SOURCES = two_file_test_main.cc two_file_pic_test_DEPENDENCIES = \ @@ -413,15 +428,15 @@ check_PROGRAMS += two_file_separate_shared_21_nonpic_test check_PROGRAMS += two_file_mixed_shared_test check_PROGRAMS += two_file_mixed_2_shared_test two_file_shared_1_nonpic.so: two_file_test_1.o gcctestdir/ld - $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b.o + $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b.o -Wl,-z,notext two_file_shared_2_nonpic.so: two_file_test_2.o gcctestdir/ld $(CXXLINK) -Bgcctestdir/ -shared two_file_test_2.o two_file_shared_nonpic.so: two_file_test_1.o two_file_test_1b.o two_file_test_2.o gcctestdir/ld - $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b.o two_file_test_2.o + $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b.o two_file_test_2.o -Wl,-z,notext two_file_shared_mixed.so: two_file_test_1_pic.o two_file_test_1b_pic.o two_file_test_2.o gcctestdir/ld - $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1_pic.o two_file_test_1b_pic.o two_file_test_2.o + $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1_pic.o two_file_test_1b_pic.o two_file_test_2.o -Wl,-z,notext two_file_shared_mixed_1.so: two_file_test_1.o two_file_test_1b_pic.o two_file_shared_2.so gcctestdir/ld - $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b_pic.o two_file_shared_2.so + $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b_pic.o two_file_shared_2.so -Wl,-z,notext two_file_shared_1_nonpic_test_SOURCES = \ two_file_test_2.cc two_file_test_main.cc @@ -508,7 +523,6 @@ common_test_3.so: common_test_3_pic.o ver_test_2.script gcctestdir/ld $(LINK) -Bgcctestdir/ -shared common_test_3_pic.o -Wl,--version-script,$(srcdir)/ver_test_2.script check_PROGRAMS += exception_test -check_PROGRAMS += exception_static_test check_PROGRAMS += exception_shared_1_test check_PROGRAMS += exception_shared_2_test check_PROGRAMS += exception_same_shared_test @@ -534,10 +548,13 @@ exception_test_DEPENDENCIES = gcctestdir/ld exception_test_LDFLAGS = -Bgcctestdir/ exception_test_LDADD = +if HAVE_STATIC +check_PROGRAMS += exception_static_test exception_static_test_SOURCES = $(exception_test_SOURCES) exception_static_test_DEPENDENCIES = $(exception_test_DEPENDENCIES) exception_static_test_LDFLAGS = $(exception_test_LDFLAGS) -static exception_static_test_LDADD = $(exception_test_LDADD) +endif exception_shared_1_test_SOURCES = exception_test_2.cc exception_test_main.cc exception_shared_1_test_DEPENDENCIES = gcctestdir/ld exception_shared_1.so @@ -603,10 +620,10 @@ weak_undef_file1_nonpic.o: weak_undef_file1.cc weak_undef_file2_nonpic.o: weak_undef_file2.cc $(CXXCOMPILE) -c -o $@ $< weak_undef_lib_nonpic.so: weak_undef_file1_nonpic.o - $(CXXLINK) -Bgcctestdir/ -shared weak_undef_file1_nonpic.o + $(CXXLINK) -Bgcctestdir/ -shared weak_undef_file1_nonpic.o -Wl,-z,notext alt/weak_undef_lib_nonpic.so: weak_undef_file2_nonpic.o test -d alt || mkdir -p alt - $(CXXLINK) -Bgcctestdir/ -shared weak_undef_file2_nonpic.o + $(CXXLINK) -Bgcctestdir/ -shared weak_undef_file2_nonpic.o -Wl,-z,notext endif FN_PTRS_IN_SO_WITHOUT_PIC @@ -614,11 +631,11 @@ check_PROGRAMS += weak_alias_test weak_alias_test_SOURCES = weak_alias_test_main.cc weak_alias_test_DEPENDENCIES = \ gcctestdir/ld weak_alias_test_1.so weak_alias_test_2.so \ - weak_alias_test_3.o weak_alias_test_4.so + weak_alias_test_3.o weak_alias_test_4.so weak_alias_test_5.so weak_alias_test_LDFLAGS = -Bgcctestdir/ -Wl,-R,. weak_alias_test_LDADD = \ weak_alias_test_1.so weak_alias_test_2.so weak_alias_test_3.o \ - weak_alias_test_4.so + weak_alias_test_4.so weak_alias_test_5.so weak_alias_test_1_pic.o: weak_alias_test_1.cc $(CXXCOMPILE) -c -fpic -o $@ $< weak_alias_test_1.so: weak_alias_test_1_pic.o gcctestdir/ld @@ -633,6 +650,11 @@ weak_alias_test_4_pic.o: weak_alias_test_4.cc $(CXXCOMPILE) -c -fpic -o $@ $< weak_alias_test_4.so: weak_alias_test_4_pic.o gcctestdir/ld $(CXXLINK) -Bgcctestdir/ -shared weak_alias_test_4_pic.o +weak_alias_test_5_pic.o: weak_alias_test_5.cc + $(CXXCOMPILE) -c -fpic -o $@ $< +weak_alias_test_5.so: weak_alias_test_5_pic.o $(srcdir)/weak_alias_test.script gcctestdir/ld + $(CXXLINK) -Bgcctestdir/ -shared weak_alias_test_5_pic.o \ + -Wl,--version-script,$(srcdir)/weak_alias_test.script check_SCRIPTS += weak_plt.sh check_PROGRAMS += weak_plt @@ -772,6 +794,7 @@ endif TLS_DESCRIPTORS endif TLS_GNU2_DIALECT +if HAVE_STATIC if STATIC_TLS check_PROGRAMS += tls_static_test check_PROGRAMS += tls_static_pic_test @@ -786,11 +809,12 @@ tls_static_pic_test_DEPENDENCIES = $(tls_pic_test_DEPENDENCIES) tls_static_pic_test_LDFLAGS = $(tls_pic_test_LDFLAGS) -static tls_static_pic_test_LDADD = $(tls_pic_test_LDADD) endif +endif if FN_PTRS_IN_SO_WITHOUT_PIC check_PROGRAMS += tls_shared_nonpic_test tls_test_shared_nonpic.so: tls_test.o tls_test_file2.o tls_test_c.o gcctestdir/ld - $(CXXLINK) -Bgcctestdir/ -shared tls_test.o tls_test_file2.o tls_test_c.o + $(CXXLINK) -Bgcctestdir/ -shared tls_test.o tls_test_file2.o tls_test_c.o -Wl,-z,notext tls_shared_nonpic_test_SOURCES = tls_test_main.cc tls_shared_nonpic_test_DEPENDENCIES = gcctestdir/ld tls_test_shared_nonpic.so @@ -828,16 +852,29 @@ many_sections_r_test.o: many_sections_test.o gcctestdir/ld many_sections_r_test: many_sections_r_test.o gcctestdir/ld $(CXXLINK) -Bgcctestdir/ many_sections_r_test.o $(LIBS) -if CONSTRUCTOR_PRIORITY - check_PROGRAMS += initpri1 initpri1_SOURCES = initpri1.c initpri1_DEPENDENCIES = gcctestdir/ld initpri1_LDFLAGS = -Bgcctestdir/ initpri1_LDADD = -endif +check_PROGRAMS += initpri2 +initpri2_SOURCES = initpri2.c +initpri2_DEPENDENCIES = gcctestdir/ld +initpri2_LDFLAGS = -Bgcctestdir/ +initpri2_LDADD = +check_PROGRAMS += initpri3a +initpri3a_SOURCES = initpri3.c +initpri3a_DEPENDENCIES = gcctestdir/ld +initpri3a_LDFLAGS = -Bgcctestdir/ +initpri3a_LDADD = + +check_PROGRAMS += initpri3b +initpri3b_SOURCES = initpri3.c +initpri3b_DEPENDENCIES = gcctestdir/ld +initpri3b_LDFLAGS = -Bgcctestdir/ -Wl,--no-ctors-in-init-array +initpri3b_LDADD = # Test --detect-odr-violations check_SCRIPTS += debug_msg.sh @@ -862,6 +899,29 @@ debug_msg.err: debug_msg.o odr_violation1.o odr_violation2.o gcctestdir/ld exit 1; \ fi + +if HAVE_ZLIB + +# Check that --detect-odr-violations works with compressed debug sections. +check_DATA += debug_msg_cdebug.err +MOSTLYCLEANFILES += debug_msg_cdebug.err +debug_msg_cdebug.o: debug_msg.cc gcctestdir/as + $(CXXCOMPILE) -Bgcctestdir/ -O0 -g -Wa,--compress-debug-sections -c -w -o $@ $(srcdir)/debug_msg.cc +odr_violation1_cdebug.o: odr_violation1.cc gcctestdir/as + $(CXXCOMPILE) -Bgcctestdir/ -O0 -g -Wa,--compress-debug-sections -c -w -o $@ $(srcdir)/odr_violation1.cc +odr_violation2_cdebug.o: odr_violation2.cc gcctestdir/as + $(CXXCOMPILE) -Bgcctestdir/ -O2 -g -Wa,--compress-debug-sections -c -w -o $@ $(srcdir)/odr_violation2.cc +debug_msg_cdebug.err: debug_msg_cdebug.o odr_violation1_cdebug.o odr_violation2_cdebug.o gcctestdir/ld + @echo $(CXXLINK) -Bgcctestdir/ -Wl,--detect-odr-violations -o debug_msg_cdebug debug_msg_cdebug.o odr_violation1_cdebug.o odr_violation2_cdebug.o "2>$@" + @if $(CXXLINK) -Bgcctestdir/ -Wl,--detect-odr-violations -o debug_msg_cdebug debug_msg_cdebug.o odr_violation1_cdebug.o odr_violation2_cdebug.o 2>$@; \ + then \ + echo 1>&2 "Link of debug_msg_cdebug should have failed"; \ + rm -f $@; \ + exit 1; \ + fi + +endif HAVE_ZLIB + # See if we can also detect problems when we're linking .so's, not .o's. check_DATA += debug_msg_so.err MOSTLYCLEANFILES += debug_msg_so.err @@ -945,6 +1005,18 @@ flagstest_o_specialfile_and_compress_debug_sections: flagstest_debug.o \ endif HAVE_ZLIB +# Test -TText and -Tdata. +check_PROGRAMS += flagstest_o_ttext_1 +flagstest_o_ttext_1: flagstest_debug.o gcctestdir/ld + $(CXXLINK) -Bgcctestdir/ -o $@ $< -Wl,-Ttext,0x400000 -Wl,-Tdata,0x800000 + +# This version won't be runnable, because there is no way to put the +# PT_PHDR segment at file offset 0. We just make sure that we can +# build it without error. +check_DATA += flagstest_o_ttext_2 +flagstest_o_ttext_2: flagstest_debug.o gcctestdir/ld + $(CXXLINK) -Bgcctestdir/ -o $@ $< -Wl,-Ttext,0x400010 -Wl,-Tdata,0x800010 + # Test symbol versioning. check_PROGRAMS += ver_test ver_test_SOURCES = ver_test_main.cc @@ -954,7 +1026,7 @@ ver_test_LDADD = ver_test_1.so ver_test_2.so ver_test_4.so ver_test_1.so: ver_test_1.o ver_test_2.so ver_test_3.o ver_test_4.so gcctestdir/ld $(CXXLINK) -Bgcctestdir/ -shared ver_test_1.o ver_test_2.so ver_test_3.o ver_test_4.so ver_test_2.so: ver_test_2.o $(srcdir)/ver_test_2.script ver_test_4.so gcctestdir/ld - $(CXXLINK) -Bgcctestdir/ -shared -Wl,--version-script,$(srcdir)/ver_test_2.script ver_test_2.o ver_test_4.so + $(CXXLINK) -Bgcctestdir/ -shared -Wl,--version-script,$(srcdir)/ver_test_2.script -Wl,-R,. ver_test_2.o ver_test_4.so ver_test_4.so: ver_test_4.o $(srcdir)/ver_test_4.script gcctestdir/ld $(CXXLINK) -Bgcctestdir/ -shared -Wl,--version-script,$(srcdir)/ver_test_4.script ver_test_4.o ver_test_1.o: ver_test_1.cc @@ -1027,7 +1099,7 @@ ver_test_9_DEPENDENCIES = gcctestdir/ld ver_test_9.so ver_test_9_LDFLAGS = -Bgcctestdir/ -Wl,-R,. ver_test_9_LDADD = ver_test_9.so ver_test_9.so: ver_test_9.o ver_test_4.so ver_test_5.so gcctestdir/ld - $(CXXLINK) -Bgcctestdir/ -shared ver_test_9.o ver_test_5.so ver_test_4.so + $(CXXLINK) -Bgcctestdir/ -shared -Wl,-R,. ver_test_9.o ver_test_5.so ver_test_4.so ver_test_9.o: ver_test_9.cc $(CXXCOMPILE) -c -fpic -o $@ $< @@ -1047,6 +1119,14 @@ ver_test_11_LDADD = ver_test_11.a ver_test_11.a: ver_test_1.o ver_test_2.o ver_test_4.o $(TEST_AR) rc $@ $^ +check_PROGRAMS += ver_test_12 +ver_test_12_SOURCES = ver_test_main_2.cc +ver_test_12_DEPENDENCIES = gcctestdir/ld ver_test_12.o +ver_test_12_LDFLAGS = -Bgcctestdir/ -Wl,-R,. +ver_test_12_LDADD = ver_test_12.o +ver_test_12.o: gcctestdir/ld ver_test_1.o ver_test_2.o ver_test_4.o + gcctestdir/ld -r -o $@ ver_test_1.o ver_test_2.o ver_test_4.o + check_PROGRAMS += protected_1 protected_1_SOURCES = \ protected_main_1.cc protected_main_2.cc protected_main_3.cc @@ -1095,6 +1175,14 @@ relro_test_pic.o: relro_test.cc relro_test.stdout: relro_test.so $(TEST_READELF) -SlW relro_test.so > relro_test.stdout +check_PROGRAMS += relro_now_test +relro_now_test_SOURCES = relro_test_main.cc +relro_now_test_DEPENDENCIES = gcctestdir/ld relro_now_test.so +relro_now_test_LDFLAGS = -Bgcctestdir -Wl,-R,. -Wl,-z,relro -Wl,-z,now +relro_now_test_LDADD = relro_now_test.so +relro_now_test.so: gcctestdir/ld relro_test_pic.o + $(CXXLINK) -Bgcctestdir/ -shared -Wl,-z,relro -Wl,-z,now relro_test_pic.o + check_PROGRAMS += relro_strip_test relro_strip_test_SOURCES = relro_test_main.cc relro_strip_test_DEPENDENCIES = gcctestdir/ld relro_strip_test.so @@ -1133,6 +1221,16 @@ justsyms_2.o: justsyms_2.cc justsyms_2r.o: justsyms_2.o gcctestdir/ld $(srcdir)/justsyms.t gcctestdir/ld -o $@ -r -T $(srcdir)/justsyms.t justsyms_2.o +check_PROGRAMS += justsyms_exec +justsyms_exec_SOURCES = justsyms_exec.c +justsyms_exec_DEPENDENCIES = gcctestdir/ld justsyms_lib +justsyms_exec_LDFLAGS = -Bgcctestdir/ -Wl,-R,justsyms_lib +justsyms_exec_LDADD = +justsyms_lib.o: justsyms_lib.c + $(COMPILE) -c -o $@ $< +justsyms_lib: justsyms_lib.o gcctestdir/ld + gcctestdir/ld -o $@ -Ttext=0x1000200 -Tdata=0x2000000 -e exported_func justsyms_lib.o + check_PROGRAMS += binary_test MOSTLYCLEANFILES += binary.txt binary_test_SOURCES = binary_test.cc @@ -1565,6 +1663,8 @@ ifuncmain1pic.o: ifuncmain1.c ifuncmain1pie.o: ifuncmain1.c $(COMPILE) -c -fpie -o $@ $< +if HAVE_STATIC +if IFUNC_STATIC check_PROGRAMS += ifuncmain1static ifuncmain1static_SOURCES = ifuncmain1.c ifuncmain1static_DEPENDENCIES = gcctestdir/ld ifuncdep1.o @@ -1574,6 +1674,8 @@ ifuncmain1static_LDADD = ifuncdep1.o check_PROGRAMS += ifuncmain1picstatic ifuncmain1picstatic: ifuncmain1pic.o ifuncmod1.o gcctestdir/ld $(LINK) -Bgcctestdir/ -static ifuncmain1pic.o ifuncmod1.o +endif +endif check_PROGRAMS += ifuncmain1 ifuncmain1_SOURCES = ifuncmain1.c @@ -1621,6 +1723,8 @@ ifuncmain2pic.o: ifuncmain2.c ifuncdep2pic.o: ifuncdep2.c $(COMPILE) -c -fpic -o $@ $< +if HAVE_STATIC +if IFUNC_STATIC check_PROGRAMS += ifuncmain2static ifuncmain2static_SOURCES = ifuncmain2.c ifuncdep2.c ifuncmain2static_DEPENDENCIES = gcctestdir/ld @@ -1630,6 +1734,8 @@ ifuncmain2static_LDADD = check_PROGRAMS += ifuncmain2picstatic ifuncmain2picstatic: ifuncmain2pic.o ifuncdep2pic.o gcctestdir/ld $(LINK) -Bgcctestdir/ -static ifuncmain2pic.o ifuncdep2pic.o +endif +endif check_PROGRAMS += ifuncmain2 ifuncmain2_SOURCES = ifuncmain2.c ifuncdep2.c @@ -1655,6 +1761,8 @@ ifuncmain3_LDADD = -ldl ifuncmain4pic.o: ifuncmain4.c $(COMPILE) -c -fpic -o $@ $< +if HAVE_STATIC +if IFUNC_STATIC check_PROGRAMS += ifuncmain4static ifuncmain4static_SOURCES = ifuncmain4.c ifuncmain4static_DEPENDENCIES = gcctestdir/ld @@ -1664,6 +1772,8 @@ ifuncmain4static_LDADD = check_PROGRAMS += ifuncmain4picstatic ifuncmain4picstatic: ifuncmain4pic.o gcctestdir/ld $(LINK) -Bgcctestdir/ -static ifuncmain4pic.o +endif +endif check_PROGRAMS += ifuncmain4 ifuncmain4_SOURCES = ifuncmain4.c @@ -1685,6 +1795,8 @@ ifuncmod5.so: ifuncmod5.o gcctestdir/ld ifuncdep5.o: ifuncmod5.c $(COMPILE) -c -o $@ $< +if HAVE_STATIC +if IFUNC_STATIC check_PROGRAMS += ifuncmain5static ifuncmain5static_SOURCES = ifuncmain5.c ifuncmain5static_DEPENDENCIES = gcctestdir/ld ifuncdep5.o @@ -1694,6 +1806,8 @@ ifuncmain5static_LDADD = ifuncdep5.o check_PROGRAMS += ifuncmain5picstatic ifuncmain5picstatic: ifuncmain5pic.o ifuncmod5.o gcctestdir/ld $(LINK) -Bgcctestdir/ -static ifuncmain5pic.o ifuncmod5.o +endif +endif check_PROGRAMS += ifuncmain5 ifuncmain5_SOURCES = ifuncmain5.c @@ -1731,6 +1845,8 @@ ifuncmain7pic.o: ifuncmain7.c ifuncmain7pie.o: ifuncmain7.c $(COMPILE) -c -fpie -o $@ $< +if HAVE_STATIC +if IFUNC_STATIC check_PROGRAMS += ifuncmain7static ifuncmain7static_SOURCES = ifuncmain7.c ifuncmain7static_DEPENDENCIES = gcctestdir/ld @@ -1740,6 +1856,8 @@ ifuncmain7static_LDADD = check_PROGRAMS += ifuncmain7picstatic ifuncmain7picstatic: ifuncmain7pic.o gcctestdir/ld $(LINK) -Bgcctestdir/ -static ifuncmain7pic.o +endif +endif check_PROGRAMS += ifuncmain7 ifuncmain7_SOURCES = ifuncmain7.c @@ -1755,6 +1873,18 @@ check_PROGRAMS += ifuncmain7pie ifuncmain7pie: ifuncmain7pie.o gcctestdir/ld $(LINK) -Bgcctestdir/ -pie ifuncmain7pie.o +check_PROGRAMS += ifuncvar +ifuncvar1_pic.o: ifuncvar1.c + $(COMPILE) -c -fpic -o $@ $< +ifuncvar2_pic.o: ifuncvar2.c + $(COMPILE) -c -fpic -o $@ $< +ifuncvar.so: ifuncvar1_pic.o ifuncvar2_pic.o gcctestdir/ld + $(LINK) -Bgcctestdir/ -shared ifuncvar1_pic.o ifuncvar2_pic.o +ifuncvar_SOURCES = ifuncvar3.c +ifuncvar_DEPENDENCIES = gcctestdir/ld ifuncvar.so +ifuncvar_LDFLAGS = -Bgcctestdir/ -Wl,-R,. +ifuncvar_LDADD = ifuncvar.so + endif IFUNC # Test that strong reference to a weak symbol in a DSO remains strong. @@ -1815,6 +1945,108 @@ memory_test: memory_test.o gcctestdir/ld $(srcdir)/memory_test.t memory_test.stdout: memory_test $(TEST_READELF) -lWS $< > $@ +# End-to-end incremental linking tests. +# Incremental linking is currently supported only on the x86_64 target. + +if DEFAULT_TARGET_X86_64 + +two_file_test_1_v1_ndebug.o: two_file_test_1_v1.cc + $(CXXCOMPILE) -O0 -g0 -c -o $@ $< +two_file_test_1_ndebug.o: two_file_test_1.cc + $(CXXCOMPILE) -O0 -g0 -c -o $@ $< +two_file_test_1b_ndebug.o: two_file_test_1b.cc + $(CXXCOMPILE) -O0 -g0 -c -o $@ $< +two_file_test_2_ndebug.o: two_file_test_2.cc + $(CXXCOMPILE) -O0 -g0 -c -o $@ $< +two_file_test_main_ndebug.o: two_file_test_main.cc + $(CXXCOMPILE) -O0 -g0 -c -o $@ $< + +check_PROGRAMS += incremental_test_2 +MOSTLYCLEANFILES += two_file_test_tmp_2.o +incremental_test_2: two_file_test_1_v1_ndebug.o two_file_test_1_ndebug.o two_file_test_1b_ndebug.o \ + two_file_test_2_ndebug.o two_file_test_main_ndebug.o gcctestdir/ld + cp -f two_file_test_1_v1_ndebug.o two_file_test_tmp_2.o + $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ two_file_test_tmp_2.o two_file_test_1b_ndebug.o two_file_test_2_ndebug.o two_file_test_main_ndebug.o + @sleep 1 + cp -f two_file_test_1_ndebug.o two_file_test_tmp_2.o + $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ two_file_test_tmp_2.o two_file_test_1b_ndebug.o two_file_test_2_ndebug.o two_file_test_main_ndebug.o + +check_PROGRAMS += incremental_test_3 +MOSTLYCLEANFILES += two_file_test_tmp_3.o +incremental_test_3: two_file_test_1.o two_file_test_1b_v1.o two_file_test_1b.o \ + two_file_test_2.o two_file_test_main.o gcctestdir/ld + cp -f two_file_test_1b_v1.o two_file_test_tmp_3.o + $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ two_file_test_1.o two_file_test_tmp_3.o two_file_test_2.o two_file_test_main.o + @sleep 1 + cp -f two_file_test_1b.o two_file_test_tmp_3.o + $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ two_file_test_1.o two_file_test_tmp_3.o two_file_test_2.o two_file_test_main.o + +check_PROGRAMS += incremental_test_4 +MOSTLYCLEANFILES += incremental_test_4.base two_file_test_tmp_4.o +incremental_test_4: two_file_test_1.o two_file_test_1b.o two_file_test_2_v1.o \ + two_file_test_2.o two_file_test_main.o gcctestdir/ld + cp -f two_file_test_2_v1.o two_file_test_tmp_4.o + $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ two_file_test_1.o two_file_test_1b.o two_file_test_tmp_4.o two_file_test_main.o + mv -f incremental_test_4 incremental_test_4.base + @sleep 1 + cp -f two_file_test_2.o two_file_test_tmp_4.o + $(CXXLINK) -Wl,--incremental-update,--incremental-base=incremental_test_4.base -Bgcctestdir/ two_file_test_1.o two_file_test_1b.o two_file_test_tmp_4.o two_file_test_main.o + +check_PROGRAMS += incremental_test_5 +MOSTLYCLEANFILES += two_file_test_5.a +incremental_test_5: two_file_test_1.o two_file_test_1b_v1.o two_file_test_1b.o \ + two_file_test_2.o two_file_test_main.o gcctestdir/ld + cp -f two_file_test_1b_v1.o two_file_test_tmp_5.o + $(TEST_AR) rc two_file_test_5.a two_file_test_1.o two_file_test_tmp_5.o two_file_test_2.o + $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ two_file_test_main.o two_file_test_5.a + @sleep 1 + cp -f two_file_test_1b.o two_file_test_tmp_5.o + $(TEST_AR) rc two_file_test_5.a two_file_test_1.o two_file_test_tmp_5.o two_file_test_2.o + $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ two_file_test_main.o two_file_test_5.a + +# Test the --incremental-unchanged flag with an archive library. +# The second link should not update the library. +check_PROGRAMS += incremental_test_6 +MOSTLYCLEANFILES += two_file_test_6.a +incremental_test_6: two_file_test_1.o two_file_test_1b_v1.o two_file_test_1b.o \ + two_file_test_2.o two_file_test_main.o gcctestdir/ld + cp -f two_file_test_1b.o two_file_test_tmp_6.o + $(TEST_AR) rc two_file_test_6.a two_file_test_1.o two_file_test_tmp_6.o two_file_test_2.o + $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ two_file_test_main.o two_file_test_6.a + @sleep 1 + cp -f two_file_test_1b_v1.o two_file_test_tmp_6.o + $(TEST_AR) rc two_file_test_6.a two_file_test_1.o two_file_test_tmp_6.o two_file_test_2.o + $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ two_file_test_main.o -Wl,--incremental-unchanged two_file_test_6.a -Wl,--incremental-unknown + +check_PROGRAMS += incremental_copy_test +incremental_copy_test: copy_test_v1.o copy_test.o copy_test_1.so copy_test_2.so + cp -f copy_test_v1.o copy_test_tmp.o + $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ -Wl,-R,. copy_test_tmp.o copy_test_1.so copy_test_2.so + @sleep 1 + cp -f copy_test.o copy_test_tmp.o + $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ -Wl,-R,. copy_test_tmp.o copy_test_1.so copy_test_2.so + +check_PROGRAMS += incremental_common_test_1 +incremental_common_test_1: common_test_1_v1.o common_test_1_v2.o gcctestdir/ld + cp -f common_test_1_v1.o common_test_1_tmp.o + $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ common_test_1_tmp.o + @sleep 1 + cp -f common_test_1_v2.o common_test_1_tmp.o + $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ common_test_1_tmp.o + +check_PROGRAMS += incremental_comdat_test_1 +incremental_comdat_test_1: incr_comdat_test_1.o incr_comdat_test_2_v1.o incr_comdat_test_2_v2.o incr_comdat_test_2_v3.o gcctestdir/ld + cp -f incr_comdat_test_2_v1.o incr_comdat_test_1_tmp.o + $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ incr_comdat_test_1.o incr_comdat_test_1_tmp.o + @sleep 1 + cp -f incr_comdat_test_2_v2.o incr_comdat_test_1_tmp.o + $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ incr_comdat_test_1.o incr_comdat_test_1_tmp.o + @sleep 1 + cp -f incr_comdat_test_2_v3.o incr_comdat_test_1_tmp.o + $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ incr_comdat_test_1.o incr_comdat_test_1_tmp.o + +endif DEFAULT_TARGET_X86_64 + endif GCC endif NATIVE_LINKER @@ -1931,7 +2163,8 @@ check_DATA += arm_bl_in_range.stdout arm_bl_out_of_range.stdout \ thumb2_bl_in_range.stdout thumb2_bl_out_of_range.stdout \ thumb_blx_in_range.stdout thumb_blx_out_of_range.stdout \ thumb2_blx_in_range.stdout thumb2_blx_out_of_range.stdout \ - thumb_bl_out_of_range_local.stdout + thumb_bl_out_of_range_local.stdout arm_thm_jump11.stdout \ + arm_thm_jump8.stdout arm_bl_in_range.stdout: arm_bl_in_range $(TEST_OBJDUMP) -D $< > $@ @@ -1955,7 +2188,7 @@ thumb_bl_in_range.stdout: thumb_bl_in_range $(TEST_OBJDUMP) -D $< > $@ thumb_bl_in_range: thumb_bl_in_range.o ../ld-new - ../ld-new -T $(srcdir)/thumb_branch_range.t -o $@ $< + ../ld-new --no-fix-arm1176 -T $(srcdir)/thumb_branch_range.t -o $@ $< thumb_bl_in_range.o: thumb_bl_in_range.s $(TEST_AS) -o $@ -march=armv5te $< @@ -1964,7 +2197,7 @@ thumb_bl_out_of_range.stdout: thumb_bl_out_of_range $(TEST_OBJDUMP) -D $< > $@ thumb_bl_out_of_range: thumb_bl_out_of_range.o ../ld-new - ../ld-new -T $(srcdir)/thumb_branch_range.t -o $@ $< + ../ld-new --no-fix-arm1176 -T $(srcdir)/thumb_branch_range.t -o $@ $< thumb_bl_out_of_range.o: thumb_bl_out_of_range.s $(TEST_AS) -o $@ -march=armv5te $< @@ -1991,7 +2224,7 @@ thumb_blx_in_range.stdout: thumb_blx_in_range $(TEST_OBJDUMP) -D $< > $@ thumb_blx_in_range: thumb_blx_in_range.o ../ld-new - ../ld-new -T $(srcdir)/thumb_branch_range.t -o $@ $< + ../ld-new --no-fix-arm1176 -T $(srcdir)/thumb_branch_range.t -o $@ $< thumb_blx_in_range.o: thumb_blx_in_range.s $(TEST_AS) -o $@ -march=armv5te $< @@ -2000,7 +2233,7 @@ thumb_blx_out_of_range.stdout: thumb_blx_out_of_range $(TEST_OBJDUMP) -D $< > $@ thumb_blx_out_of_range: thumb_blx_out_of_range.o ../ld-new - ../ld-new -T $(srcdir)/thumb_branch_range.t -o $@ $< + ../ld-new --no-fix-arm1176 -T $(srcdir)/thumb_branch_range.t -o $@ $< thumb_blx_out_of_range.o: thumb_blx_out_of_range.s $(TEST_AS) -o $@ -march=armv5te $< @@ -2027,15 +2260,34 @@ thumb_bl_out_of_range_local.stdout: thumb_bl_out_of_range_local $(TEST_OBJDUMP) -D $< > $@ thumb_bl_out_of_range_local: thumb_bl_out_of_range_local.o ../ld-new - ../ld-new -T $(srcdir)/thumb_branch_range.t -o $@ $< + ../ld-new --no-fix-arm1176 -T $(srcdir)/thumb_branch_range.t -o $@ $< thumb_bl_out_of_range_local.o: thumb_bl_out_of_range_local.s $(TEST_AS) -o $@ -march=armv5te $< +arm_thm_jump11.stdout: arm_thm_jump11 + $(TEST_OBJDUMP) -D $< > $@ + +arm_thm_jump11: arm_thm_jump11.o ../ld-new + ../ld-new -T $(srcdir)/arm_thm_jump11.t -o $@ $< + +arm_thm_jump11.o: arm_thm_jump11.s + $(TEST_AS) -o $@ $< + +arm_thm_jump8.stdout: arm_thm_jump8 + $(TEST_OBJDUMP) -D $< > $@ + +arm_thm_jump8: arm_thm_jump8.o ../ld-new + ../ld-new -T $(srcdir)/arm_thm_jump8.t -o $@ $< + +arm_thm_jump8.o: arm_thm_jump8.s + $(TEST_AS) -o $@ $< + MOSTLYCLEANFILES += arm_bl_in_range arm_bl_out_of_range thumb_bl_in_range \ thumb_bl_out_of_range thumb2_bl_in_range thumb2_bl_out_of_range \ thumb_blx_in_range thumb_blx_out_of_range thumb2_blx_in_range \ - thumb2_blx_out_of_range thumb_bl_out_of_range_local + thumb2_blx_out_of_range thumb_bl_out_of_range_local arm_thm_jump11 \ + arm_thm_jump8 check_SCRIPTS += arm_fix_v4bx.sh check_DATA += arm_fix_v4bx.stdout arm_fix_v4bx_interworking.stdout \ @@ -2045,7 +2297,7 @@ arm_fix_v4bx.stdout: arm_fix_v4bx $(TEST_OBJDUMP) -D -j.text $< > $@ arm_fix_v4bx: arm_fix_v4bx.o ../ld-new - ../ld-new --fix-v4bx -o $@ $< + ../ld-new --no-fix-arm1176 --fix-v4bx -o $@ $< arm_fix_v4bx.o: arm_fix_v4bx.s $(TEST_AS) -o $@ $< @@ -2054,13 +2306,13 @@ arm_fix_v4bx_interworking.stdout: arm_fix_v4bx_interworking $(TEST_OBJDUMP) -D -j.text $< > $@ arm_fix_v4bx_interworking: arm_fix_v4bx.o ../ld-new - ../ld-new --fix-v4bx-interworking -o $@ $< + ../ld-new --no-fix-arm1176 --fix-v4bx-interworking -o $@ $< arm_no_fix_v4bx.stdout: arm_no_fix_v4bx $(TEST_OBJDUMP) -D -j.text $< > $@ arm_no_fix_v4bx: arm_fix_v4bx.o ../ld-new - ../ld-new -o $@ $< + ../ld-new --no-fix-arm1176 -o $@ $< MOSTLYCLEANFILES += arm_fix_v4bx arm_fix_v4bx_interworking arm_no_fix_v4bx @@ -2100,6 +2352,69 @@ arm_attr_merge_7b.o: arm_attr_merge_7b.s MOSTLYCLEANFILES += arm_attr_merge_6 arm_attr_merge_6r arm_attr_merge_7 +# ARM1176 workaround test. +check_SCRIPTS += arm_fix_1176.sh +check_DATA += arm_fix_1176_default_v6z.stdout arm_fix_1176_on_v6z.stdout \ + arm_fix_1176_off_v6z.stdout arm_fix_1176_default_v5te.stdout \ + arm_fix_1176_default_v7a.stdout arm_fix_1176_default_1156t2f_s.stdout + +arm_fix_1176_default_v6z.stdout: arm_fix_1176_default_v6z + $(TEST_OBJDUMP) -D -j.foo $< > $@ + +arm_fix_1176_default_v6z: arm_fix_1176_default_v6z.o ../ld-new + ../ld-new --section-start=.foo=0x2001014 -o $@ $< + +arm_fix_1176_default_v6z.o: arm_fix_1176.s + $(TEST_AS) -march=armv6z -o $@ $< + +arm_fix_1176_on_v6z.stdout: arm_fix_1176_on_v6z + $(TEST_OBJDUMP) -D -j.foo $< > $@ + +arm_fix_1176_on_v6z: arm_fix_1176_on_v6z.o ../ld-new + ../ld-new --section-start=.foo=0x2001014 --fix-arm1176 -o $@ $< + +arm_fix_1176_on_v6z.o: arm_fix_1176.s + $(TEST_AS) -march=armv6z -o $@ $< + +arm_fix_1176_off_v6z.stdout: arm_fix_1176_off_v6z + $(TEST_OBJDUMP) -D -j.foo $< > $@ + +arm_fix_1176_off_v6z: arm_fix_1176_off_v6z.o ../ld-new + ../ld-new --section-start=.foo=0x2001014 --no-fix-arm1176 -o $@ $< + +arm_fix_1176_off_v6z.o: arm_fix_1176.s + $(TEST_AS) -march=armv6z -o $@ $< + +arm_fix_1176_default_v5te.stdout: arm_fix_1176_default_v5te + $(TEST_OBJDUMP) -D -j.foo $< > $@ + +arm_fix_1176_default_v5te: arm_fix_1176_default_v5te.o ../ld-new + ../ld-new --section-start=.foo=0x2001014 -o $@ $< + +arm_fix_1176_default_v5te.o: arm_fix_1176.s + $(TEST_AS) -march=armv5te -o $@ $< + +arm_fix_1176_default_v7a.stdout: arm_fix_1176_default_v7a + $(TEST_OBJDUMP) -D -j.foo $< > $@ + +arm_fix_1176_default_v7a: arm_fix_1176_default_v7a.o ../ld-new + ../ld-new --section-start=.foo=0x2001014 -o $@ $< + +arm_fix_1176_default_v7a.o: arm_fix_1176.s + $(TEST_AS) -march=armv7-a -o $@ $< + +arm_fix_1176_default_1156t2f_s.stdout: arm_fix_1176_default_1156t2f_s + $(TEST_OBJDUMP) -D -j.foo $< > $@ + +arm_fix_1176_default_1156t2f_s: arm_fix_1176_default_1156t2f_s.o ../ld-new + ../ld-new --section-start=.foo=0x2001014 -o $@ $< + +arm_fix_1176_default_1156t2f_s.o: arm_fix_1176.s + $(TEST_AS) -mcpu=arm1156t2f-s -o $@ $< + +MOSTLYCLEANFILES += arm_fix_1176_default_v6z arm_fix_1176_on_v6z arm_fix_1176_off_v6z \ + arm_fix_1176_default_v5te arm_fix_1176_default_v7a arm_fix_1176_default_1156t2f_s + # Cortex-A8 workaround test. check_SCRIPTS += arm_cortex_a8.sh @@ -2164,6 +2479,167 @@ arm_cortex_a8_local_reloc.o: arm_cortex_a8_local_reloc.s MOSTLYCLEANFILES += arm_cortex_a8_b_cond arm_cortex_a8_b arm_cortex_a8_bl \ arm_cortex_a8_blx arm_cortex_a8_local arm_cortex_a8_local_reloc +check_SCRIPTS += arm_exidx_test.sh +check_DATA += arm_exidx_test.stdout + +arm_exidx_test.stdout: arm_exidx_test.so + $(TEST_READELF) -S $< > $@ + +arm_exidx_test.so: arm_exidx_test.o ../ld-new + ../ld-new -shared -o $@ $< + +arm_exidx_test.o: arm_exidx_test.s + $(TEST_AS) -o $@ $< + +check_SCRIPTS += pr12826.sh +check_DATA += pr12826.stdout + +pr12826.stdout: pr12826.so + $(TEST_READELF) -A $< > $@ + +pr12826.so: pr12826_1.o pr12826_2.o ../ld-new + ../ld-new -shared -o $@ $< + +pr12826_1.o: pr12826_1.s + $(TEST_AS) -o $@ $< + +pr12826_2.o: pr12826_2.s + $(TEST_AS) -o $@ $< + +check_SCRIPTS += arm_unaligned_reloc.sh +check_DATA += arm_unaligned_reloc.stdout arm_unaligned_reloc_r.stdout + +arm_unaligned_reloc.stdout: arm_unaligned_reloc + $(TEST_OBJDUMP) -D $< > $@ + +arm_unaligned_reloc_r.stdout: arm_unaligned_reloc_r + $(TEST_OBJDUMP) -Dr $< > $@ + +arm_unaligned_reloc: arm_unaligned_reloc.o ../ld-new + ../ld-new -o $@ $< + +arm_unaligned_reloc_r: arm_unaligned_reloc.o ../ld-new + ../ld-new -r -o $@ $< + +arm_unaligned_reloc.o: arm_unaligned_reloc.s + $(TEST_AS) -o $@ $< + +MOSTLYCLEANFILES += arm_unaligned_reloc arm_unaligned_reloc_r + +# Check ARM to ARM farcall veneers + +check_SCRIPTS += arm_farcall_arm_arm.sh +check_DATA += arm_farcall_arm_arm.stdout + +arm_farcall_arm_arm.stdout: arm_farcall_arm_arm + $(TEST_OBJDUMP) -d $< > $@ + +arm_farcall_arm_arm: arm_farcall_arm_arm.o ../ld-new + ../ld-new --no-fix-arm1176 --section-start .text=0x1000 --section-start .foo=0x2001020 -o $@ $< + +arm_farcall_arm_arm.o: arm_farcall_arm_arm.s + $(TEST_AS) -o $@ $< + +MOSTLYCLEANFILES += arm_farcall_arm_arm + +# Check ARM to Thumb farcall veneers + +check_SCRIPTS += arm_farcall_arm_thumb.sh +check_DATA += arm_farcall_arm_thumb.stdout arm_farcall_arm_thumb_5t.stdout + +arm_farcall_arm_thumb.stdout: arm_farcall_arm_thumb + $(TEST_OBJDUMP) -D $< > $@ + +arm_farcall_arm_thumb: arm_farcall_arm_thumb.o ../ld-new + ../ld-new --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +arm_farcall_arm_thumb.o: arm_farcall_arm_thumb.s + $(TEST_AS) -o $@ $< + +arm_farcall_arm_thumb_5t.stdout: arm_farcall_arm_thumb_5t + $(TEST_OBJDUMP) -D $< > $@ + +arm_farcall_arm_thumb_5t: arm_farcall_arm_thumb_5t.o ../ld-new + ../ld-new --no-fix-arm1176 --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +arm_farcall_arm_thumb_5t.o: arm_farcall_arm_thumb.s + $(TEST_AS) -march=armv5t -o $@ $< + +MOSTLYCLEANFILES += arm_farcall_arm_thumb arm_farcall_arm_thumb_5t + +# Check Thumb to Thumb farcall veneers + +check_SCRIPTS += arm_farcall_thumb_thumb.sh +check_DATA += arm_farcall_thumb_thumb.stdout \ + arm_farcall_thumb_thumb_5t.stdout \ + arm_farcall_thumb_thumb_7m.stdout \ + arm_farcall_thumb_thumb_6m.stdout + +arm_farcall_thumb_thumb.stdout: arm_farcall_thumb_thumb + $(TEST_OBJDUMP) -D $< > $@ + +arm_farcall_thumb_thumb: arm_farcall_thumb_thumb.o ../ld-new + ../ld-new --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +arm_farcall_thumb_thumb.o: arm_farcall_thumb_thumb.s + $(TEST_AS) -march=armv4t -o $@ $< + +arm_farcall_thumb_thumb_5t.stdout: arm_farcall_thumb_thumb_5t + $(TEST_OBJDUMP) -D $< > $@ + +arm_farcall_thumb_thumb_5t: arm_farcall_thumb_thumb_5t.o ../ld-new + ../ld-new --no-fix-arm1176 --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +arm_farcall_thumb_thumb_5t.o: arm_farcall_thumb_thumb.s + $(TEST_AS) -march=armv5t -o $@ $< + +arm_farcall_thumb_thumb_7m.stdout: arm_farcall_thumb_thumb_7m + $(TEST_OBJDUMP) -D $< > $@ + +arm_farcall_thumb_thumb_7m: arm_farcall_thumb_thumb_7m.o ../ld-new + ../ld-new --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +arm_farcall_thumb_thumb_7m.o: arm_farcall_thumb_thumb.s + $(TEST_AS) -march=armv7-m -o $@ $< + +arm_farcall_thumb_thumb_6m.stdout: arm_farcall_thumb_thumb_6m + $(TEST_OBJDUMP) -D $< > $@ + +arm_farcall_thumb_thumb_6m: arm_farcall_thumb_thumb_6m.o ../ld-new + ../ld-new --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +arm_farcall_thumb_thumb_6m.o: arm_farcall_thumb_thumb.s + $(TEST_AS) -march=armv6-m -o $@ $< + +MOSTLYCLEANFILES += arm_farcall_thumb_thumb arm_farcall_thumb_thumb_5t \ + arm_farcall_thumb_thumb_7m arm_farcall_thumb_thumb_6m + +# Check Thumb to ARM farcall veneers + +check_SCRIPTS += arm_farcall_thumb_arm.sh +check_DATA += arm_farcall_thumb_arm.stdout \ + arm_farcall_thumb_arm_5t.stdout + +arm_farcall_thumb_arm.stdout: arm_farcall_thumb_arm + $(TEST_OBJDUMP) -D $< > $@ + +arm_farcall_thumb_arm: arm_farcall_thumb_arm.o ../ld-new + ../ld-new --section-start .text=0x1c01010 --section-start .foo=0x2001014 -o $@ $< + +arm_farcall_thumb_arm.o: arm_farcall_thumb_arm.s + $(TEST_AS) -o $@ $< + +arm_farcall_thumb_arm_5t.stdout: arm_farcall_thumb_arm_5t + $(TEST_OBJDUMP) -D $< > $@ + +arm_farcall_thumb_arm_5t: arm_farcall_thumb_arm_5t.o ../ld-new + ../ld-new --no-fix-arm1176 --section-start .text=0x1c01010 --section-start .foo=0x2001014 -o $@ $< + +arm_farcall_thumb_arm_5t.o: arm_farcall_thumb_arm.s + $(TEST_AS) -march=armv5t -o $@ $< + +MOSTLYCLEANFILES += arm_farcall_thumb_arm arm_farcall_thumb_arm_5t + endif DEFAULT_TARGET_ARM endif NATIVE_OR_CROSS_LINKER diff --git a/gold/testsuite/Makefile.in b/gold/testsuite/Makefile.in index 226816b..67149fb 100644 --- a/gold/testsuite/Makefile.in +++ b/gold/testsuite/Makefile.in @@ -47,7 +47,12 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ $(am__EXEEXT_13) $(am__EXEEXT_14) $(am__EXEEXT_15) \ $(am__EXEEXT_16) $(am__EXEEXT_17) $(am__EXEEXT_18) \ $(am__EXEEXT_19) $(am__EXEEXT_20) $(am__EXEEXT_21) \ - $(am__EXEEXT_22) + $(am__EXEEXT_22) $(am__EXEEXT_23) $(am__EXEEXT_24) \ + $(am__EXEEXT_25) $(am__EXEEXT_26) $(am__EXEEXT_27) \ + $(am__EXEEXT_28) $(am__EXEEXT_29) $(am__EXEEXT_30) \ + $(am__EXEEXT_31) $(am__EXEEXT_32) $(am__EXEEXT_33) \ + $(am__EXEEXT_34) $(am__EXEEXT_35) $(am__EXEEXT_36) \ + $(am__EXEEXT_37) $(am__EXEEXT_38) @NATIVE_OR_CROSS_LINKER_TRUE@am__append_1 = object_unittest \ @NATIVE_OR_CROSS_LINKER_TRUE@ binary_unittest @@ -84,11 +89,6 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_9.sh dynamic_list.sh # Create the data files that debug_msg.sh analyzes. - -# See if we can also detect problems when we're linking .so's, not .o's. - -# We also want to make sure we do something reasonable when there's no -# debug info available. For the best test, we use .so's. @GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_3 = incremental_test.stdout \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ gc_comdat_test.stdout \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ gc_tls_test.stdout \ @@ -104,23 +104,7 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ icf_string_merge_test.stdout \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ icf_sht_rel_addend_test.stdout \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_shared.dbg \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_plt_shared.so debug_msg.err \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ debug_msg_so.err \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ debug_msg_ndebug.err \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ undef_symbol.err ver_test_1.syms \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_2.syms ver_test_4.syms \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_5.syms ver_test_7.syms \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_10.syms protected_3.err \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ relro_test.stdout \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_matching_test.stdout \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_3.stdout \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_4.stdout \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_5.stdout \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_6.stdout \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_7.stdout \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_8.stdout \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_9.stdout \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ dynamic_list.stdout +@GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_plt_shared.so debug_msg.err @GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_4 = incremental_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ gc_comdat_test gc_tls_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ gc_orphan_section_test icf_test \ @@ -134,15 +118,20 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_shared.dbg \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ alt/weak_undef_lib.so @GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_5 = icf_virtual_function_folding_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ basic_test basic_static_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ basic_pic_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ basic_static_pic_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ basic_pie_test constructor_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ constructor_static_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_static_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_pic_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_shared_1_test \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ basic_test basic_pic_test +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am__append_6 = basic_static_test \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@ basic_static_pic_test +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_7 = basic_pie_test \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ constructor_test +@GCC_FALSE@constructor_test_DEPENDENCIES = +@NATIVE_LINKER_FALSE@constructor_test_DEPENDENCIES = +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am__append_8 = constructor_static_test +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_9 = two_file_test \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_pic_test +@GCC_FALSE@two_file_test_DEPENDENCIES = +@NATIVE_LINKER_FALSE@two_file_test_DEPENDENCIES = +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am__append_10 = two_file_static_test +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_11 = two_file_shared_1_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_shared_2_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_shared_1_pic_2_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_shared_2_pic_1_test \ @@ -151,14 +140,10 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_separate_shared_21_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_relocatable_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_pie_test -@GCC_FALSE@constructor_test_DEPENDENCIES = -@NATIVE_LINKER_FALSE@constructor_test_DEPENDENCIES = -@GCC_FALSE@two_file_test_DEPENDENCIES = -@NATIVE_LINKER_FALSE@two_file_test_DEPENDENCIES = # The nonpic tests will fail on platforms which can not put non-PIC # code into shared libraries, so we just don't run them in that case. -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_6 = two_file_shared_1_nonpic_test \ +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_12 = two_file_shared_1_nonpic_test \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_shared_2_nonpic_test \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_same_shared_nonpic_test \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_separate_shared_12_nonpic_test \ @@ -166,48 +151,93 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_mixed_shared_test \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_mixed_2_shared_test \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_mixed_pie_test -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_7 = two_file_strip_test \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_13 = two_file_strip_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_same_shared_strip_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ common_test_1 common_test_2 \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_static_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_shared_1_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_shared_2_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_same_shared_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_separate_shared_12_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_separate_shared_21_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_test weak_undef_test +@GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_separate_shared_21_test @GCC_FALSE@common_test_1_DEPENDENCIES = @NATIVE_LINKER_FALSE@common_test_1_DEPENDENCIES = @GCC_FALSE@exception_test_DEPENDENCIES = @NATIVE_LINKER_FALSE@exception_test_DEPENDENCIES = +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am__append_14 = exception_static_test +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_15 = weak_test \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_undef_test @GCC_FALSE@weak_test_DEPENDENCIES = @NATIVE_LINKER_FALSE@weak_test_DEPENDENCIES = -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_8 = weak_undef_nonpic_test -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_9 = alt/weak_undef_lib_nonpic.so -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_10 = weak_alias_test weak_plt \ +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_16 = weak_undef_nonpic_test +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_17 = alt/weak_undef_lib_nonpic.so +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_18 = weak_alias_test weak_plt \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ copy_test -@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@am__append_11 = tls_test \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@am__append_19 = tls_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_pic_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_pie_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_pie_pic_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_shared_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_shared_ie_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_shared_gd_to_ie_test -@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@am__append_12 = tls_shared_gnu2_gd_to_ie_test -@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_DESCRIPTORS_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@am__append_13 = tls_shared_gnu2_test -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@am__append_14 = tls_static_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@ tls_static_pic_test -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@am__append_15 = tls_shared_nonpic_test -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_16 = many_sections_test \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ many_sections_r_test +@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@am__append_20 = tls_shared_gnu2_gd_to_ie_test +@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_DESCRIPTORS_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@am__append_21 = tls_shared_gnu2_test +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@am__append_22 = tls_static_test \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@ tls_static_pic_test +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@am__append_23 = tls_shared_nonpic_test + +# Test -o when emitting to a special file (such as something in /dev). +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_24 = many_sections_test \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ many_sections_r_test initpri1 \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ initpri2 initpri3a initpri3b \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ flagstest_o_specialfile @GCC_FALSE@many_sections_test_DEPENDENCIES = @NATIVE_LINKER_FALSE@many_sections_test_DEPENDENCIES = -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_17 = many_sections_define.h \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_25 = many_sections_define.h \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ many_sections_check.h -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_18 = many_sections_define.h \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_26 = many_sections_define.h \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ many_sections_check.h \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ debug_msg.err debug_msg_so.err \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ debug_msg.err +@GCC_FALSE@initpri1_DEPENDENCIES = +@NATIVE_LINKER_FALSE@initpri1_DEPENDENCIES = +@GCC_FALSE@initpri2_DEPENDENCIES = +@NATIVE_LINKER_FALSE@initpri2_DEPENDENCIES = +@GCC_FALSE@initpri3a_DEPENDENCIES = +@NATIVE_LINKER_FALSE@initpri3a_DEPENDENCIES = +@GCC_FALSE@initpri3b_DEPENDENCIES = +@NATIVE_LINKER_FALSE@initpri3b_DEPENDENCIES = + +# Check that --detect-odr-violations works with compressed debug sections. +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@am__append_27 = debug_msg_cdebug.err +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@am__append_28 = debug_msg_cdebug.err + +# See if we can also detect problems when we're linking .so's, not .o's. + +# We also want to make sure we do something reasonable when there's no +# debug info available. For the best test, we use .so's. + +# This version won't be runnable, because there is no way to put the +# PT_PHDR segment at file offset 0. We just make sure that we can +# build it without error. +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_29 = debug_msg_so.err \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ debug_msg_ndebug.err \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ undef_symbol.err \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ flagstest_o_ttext_2 \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_1.syms ver_test_2.syms \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_4.syms ver_test_5.syms \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_7.syms ver_test_10.syms \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ protected_3.err \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ relro_test.stdout \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_matching_test.stdout \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_3.stdout \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_4.stdout \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_5.stdout \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_6.stdout \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_7.stdout \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_8.stdout \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_9.stdout \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ dynamic_list.stdout +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_30 = debug_msg_so.err \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ debug_msg_ndebug.err \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ undef_symbol.err ver_test_11.a \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ protected_3.err binary.txt \ @@ -221,30 +251,28 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ alt/thin_archive_test_2.o \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ alt/thin_archive_test_4.o \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ alt/libthin2.a alt/libthin4.a -@CONSTRUCTOR_PRIORITY_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_19 = initpri1 -@CONSTRUCTOR_PRIORITY_FALSE@initpri1_DEPENDENCIES = -@GCC_FALSE@initpri1_DEPENDENCIES = -@NATIVE_LINKER_FALSE@initpri1_DEPENDENCIES = - -# Test -o when emitting to a special file (such as something in /dev). -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_20 = flagstest_o_specialfile # Test --compress-debug-sections. FIXME: check we actually compress. # The specialfile output has a tricky case when we also compress debug # sections, because it requires output-file resizing. -@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@am__append_21 = flagstest_compress_debug_sections \ +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@am__append_31 = flagstest_compress_debug_sections \ @GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ flagstest_o_specialfile_and_compress_debug_sections +# Test -TText and -Tdata. + # Test symbol versioning. -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_22 = ver_test ver_test_2 \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_6 ver_test_8 ver_test_9 \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_11 protected_1 \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ protected_2 relro_test \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_32 = flagstest_o_ttext_1 \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test ver_test_2 ver_test_6 \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_8 ver_test_9 \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_11 ver_test_12 \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ protected_1 protected_2 \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ relro_test relro_now_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ relro_strip_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ relro_script_test script_test_1 \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_2 justsyms \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ binary_test script_test_3 \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ justsyms_exec binary_test \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_3 \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ tls_phdrs_script_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ tls_script_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ thin_archive_test_1 \ @@ -255,13 +283,15 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @NATIVE_LINKER_FALSE@script_test_2_DEPENDENCIES = @GCC_FALSE@justsyms_DEPENDENCIES = @NATIVE_LINKER_FALSE@justsyms_DEPENDENCIES = +@GCC_FALSE@justsyms_exec_DEPENDENCIES = +@NATIVE_LINKER_FALSE@justsyms_exec_DEPENDENCIES = @GCC_FALSE@binary_test_DEPENDENCIES = @NATIVE_LINKER_FALSE@binary_test_DEPENDENCIES = @GCC_FALSE@thin_archive_test_2_DEPENDENCIES = @NATIVE_LINKER_FALSE@thin_archive_test_2_DEPENDENCIES = # Test plugins with -r. -@GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@am__append_23 = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@am__append_33 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_1 \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_2 \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_3 \ @@ -270,7 +300,7 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_6 \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_7 \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_8 -@GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@am__append_24 = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@am__append_34 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_1.sh \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_2.sh \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_3.sh \ @@ -280,7 +310,7 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ # Test that symbols known in the IR file but not in the replacement file # produce an unresolved symbol error. -@GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@am__append_25 = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@am__append_35 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_1.err \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_2.err \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_3.err \ @@ -290,7 +320,7 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_7.syms \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_9.err # Make a copy of two_file_test_1.o, which does not define the symbol _Z4t16av. -@GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@am__append_26 = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@am__append_36 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_1.err \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_2.err \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_3.err \ @@ -301,7 +331,7 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_9.err \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ two_file_test_1c.o \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ unused.c -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_27 = exclude_libs_test \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_37 = exclude_libs_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ local_labels_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ discard_locals_test @@ -319,14 +349,14 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ # weak reference in a DSO. # Test that MEMORY region support works. -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_28 = exclude_libs_test.sh \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_38 = exclude_libs_test.sh \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ discard_locals_test.sh \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ hidden_test.sh \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ retain_symbols_file_test.sh \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ no_version_test.sh \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ strong_ref_weak_def.sh \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ dyn_weak_ref.sh memory_test.sh -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_29 = exclude_libs_test.syms \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_39 = exclude_libs_test.syms \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ discard_locals_test.syms \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ discard_locals_relocatable_test1.syms \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ discard_locals_relocatable_test2.syms \ @@ -336,7 +366,7 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ strong_ref_weak_def.stdout \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ dyn_weak_ref.stdout \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ memory_test.stdout -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_30 = exclude_libs_test.syms \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_40 = exclude_libs_test.syms \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ libexclude_libs_test_1.a \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ libexclude_libs_test_2.a \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ alt/libexclude_libs_test_3.a \ @@ -362,7 +392,7 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ dyn_weak_ref.stdout \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ memory_test.stdout memory_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ memory_test.o -@GCC_TRUE@@MCMODEL_MEDIUM_TRUE@@NATIVE_LINKER_TRUE@am__append_31 = large +@GCC_TRUE@@MCMODEL_MEDIUM_TRUE@@NATIVE_LINKER_TRUE@am__append_41 = large @GCC_FALSE@large_DEPENDENCIES = @MCMODEL_MEDIUM_FALSE@large_DEPENDENCIES = @NATIVE_LINKER_FALSE@large_DEPENDENCIES = @@ -371,96 +401,137 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ # it will get execute permission. # Check -l:foo.a -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_32 = permission_test \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_42 = permission_test \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ searched_file_test @GCC_FALSE@searched_file_test_DEPENDENCIES = @NATIVE_LINKER_FALSE@searched_file_test_DEPENDENCIES = -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__append_33 = \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1static \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1picstatic \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1 \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__append_43 = ifuncmain1static \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1picstatic +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__append_44 = ifuncmain1 \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1pic \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1vis \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1vispic \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1staticpic \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1pie \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1vispie \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1staticpie \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain2static \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain2picstatic \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain2 \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain2pic \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain3 \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain4static \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain4picstatic \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain4 \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5static \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5picstatic \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5 \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5pic \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5staticpic \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5pie \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain6pie \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7static \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7picstatic \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7 \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7pic \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7pie +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1staticpie +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__append_45 = ifuncmain2static \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain2picstatic @GCC_FALSE@ifuncmain2static_DEPENDENCIES = +@HAVE_STATIC_FALSE@ifuncmain2static_DEPENDENCIES = @IFUNC_FALSE@ifuncmain2static_DEPENDENCIES = +@IFUNC_STATIC_FALSE@ifuncmain2static_DEPENDENCIES = @NATIVE_LINKER_FALSE@ifuncmain2static_DEPENDENCIES = +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__append_46 = ifuncmain2 \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain2pic \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain3 @GCC_FALSE@ifuncmain2_DEPENDENCIES = @IFUNC_FALSE@ifuncmain2_DEPENDENCIES = @NATIVE_LINKER_FALSE@ifuncmain2_DEPENDENCIES = @GCC_FALSE@ifuncmain3_DEPENDENCIES = @IFUNC_FALSE@ifuncmain3_DEPENDENCIES = @NATIVE_LINKER_FALSE@ifuncmain3_DEPENDENCIES = +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__append_47 = ifuncmain4static \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain4picstatic @GCC_FALSE@ifuncmain4static_DEPENDENCIES = +@HAVE_STATIC_FALSE@ifuncmain4static_DEPENDENCIES = @IFUNC_FALSE@ifuncmain4static_DEPENDENCIES = +@IFUNC_STATIC_FALSE@ifuncmain4static_DEPENDENCIES = @NATIVE_LINKER_FALSE@ifuncmain4static_DEPENDENCIES = +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__append_48 = ifuncmain4 @GCC_FALSE@ifuncmain4_DEPENDENCIES = @IFUNC_FALSE@ifuncmain4_DEPENDENCIES = @NATIVE_LINKER_FALSE@ifuncmain4_DEPENDENCIES = +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__append_49 = ifuncmain5static \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5picstatic +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__append_50 = ifuncmain5 \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5pic \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5staticpic \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5pie \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain6pie +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__append_51 = ifuncmain7static \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7picstatic @GCC_FALSE@ifuncmain7static_DEPENDENCIES = +@HAVE_STATIC_FALSE@ifuncmain7static_DEPENDENCIES = @IFUNC_FALSE@ifuncmain7static_DEPENDENCIES = +@IFUNC_STATIC_FALSE@ifuncmain7static_DEPENDENCIES = @NATIVE_LINKER_FALSE@ifuncmain7static_DEPENDENCIES = +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__append_52 = ifuncmain7 \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7pic \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7pie \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncvar @GCC_FALSE@ifuncmain7_DEPENDENCIES = @IFUNC_FALSE@ifuncmain7_DEPENDENCIES = @NATIVE_LINKER_FALSE@ifuncmain7_DEPENDENCIES = # Test that --start-lib and --end-lib function correctly. -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_34 = start_lib_test +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_53 = start_lib_test + +# Test the --incremental-unchanged flag with an archive library. +# The second link should not update the library. +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_54 = incremental_test_2 \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_test_3 \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_test_4 \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_test_5 \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_test_6 \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_copy_test \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_common_test_1 \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_comdat_test_1 +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_55 = two_file_test_tmp_2.o \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_tmp_3.o \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_test_4.base \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_tmp_4.o \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_5.a \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_6.a # These tests work with native and cross linkers. # Test script section order. -@NATIVE_OR_CROSS_LINKER_TRUE@am__append_35 = script_test_10.sh -@NATIVE_OR_CROSS_LINKER_TRUE@am__append_36 = script_test_10.stdout +@NATIVE_OR_CROSS_LINKER_TRUE@am__append_56 = script_test_10.sh +@NATIVE_OR_CROSS_LINKER_TRUE@am__append_57 = script_test_10.stdout # These tests work with cross linkers only. -@DEFAULT_TARGET_I386_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_37 = split_i386.sh -@DEFAULT_TARGET_I386_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_38 = split_i386_1.stdout split_i386_2.stdout \ +@DEFAULT_TARGET_I386_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_58 = split_i386.sh +@DEFAULT_TARGET_I386_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_59 = split_i386_1.stdout split_i386_2.stdout \ @DEFAULT_TARGET_I386_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_i386_3.stdout split_i386_4.stdout split_i386_r.stdout -@DEFAULT_TARGET_I386_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_39 = split_i386_1 split_i386_2 split_i386_3 \ +@DEFAULT_TARGET_I386_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_60 = split_i386_1 split_i386_2 split_i386_3 \ @DEFAULT_TARGET_I386_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_i386_4 split_i386_r -@DEFAULT_TARGET_X86_64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_40 = split_x86_64.sh -@DEFAULT_TARGET_X86_64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_41 = split_x86_64_1.stdout split_x86_64_2.stdout \ +@DEFAULT_TARGET_X86_64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_61 = split_x86_64.sh +@DEFAULT_TARGET_X86_64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_62 = split_x86_64_1.stdout split_x86_64_2.stdout \ @DEFAULT_TARGET_X86_64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_x86_64_3.stdout split_x86_64_4.stdout split_x86_64_r.stdout -@DEFAULT_TARGET_X86_64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_42 = split_x86_64_1 split_x86_64_2 split_x86_64_3 \ +@DEFAULT_TARGET_X86_64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_63 = split_x86_64_1 split_x86_64_2 split_x86_64_3 \ @DEFAULT_TARGET_X86_64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_x86_64_4 split_x86_64_r +# ARM1176 workaround test. + # Cortex-A8 workaround test. -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_43 = arm_abs_global.sh \ + +# Check ARM to ARM farcall veneers + +# Check ARM to Thumb farcall veneers + +# Check Thumb to Thumb farcall veneers + +# Check Thumb to ARM farcall veneers +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_64 = arm_abs_global.sh \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_branch_in_range.sh \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_branch_out_of_range.sh \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_v4bx.sh \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_attr_merge.sh \ -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8.sh -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_44 = arm_abs_global.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176.sh \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8.sh \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_exidx_test.sh \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ pr12826.sh \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_unaligned_reloc.sh \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_arm_arm.sh \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_arm_thumb.sh \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_thumb.sh \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_arm.sh +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_65 = arm_abs_global.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_bl_in_range.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_bl_out_of_range.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ thumb_bl_in_range.stdout \ @@ -472,19 +543,40 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ thumb2_blx_in_range.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ thumb2_blx_out_of_range.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ thumb_bl_out_of_range_local.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_thm_jump11.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_thm_jump8.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_v4bx.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_v4bx_interworking.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_no_fix_v4bx.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_attr_merge_6.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_attr_merge_6r.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_attr_merge_7.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_default_v6z.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_on_v6z.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_off_v6z.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_default_v5te.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_default_v7a.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_default_1156t2f_s.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_b_cond.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_b.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_bl.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_blx.stdout \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_local.stdout \ -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_local_reloc.stdout -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_45 = arm_abs_global \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_local_reloc.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_exidx_test.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ pr12826.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_unaligned_reloc.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_unaligned_reloc_r.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_arm_arm.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_arm_thumb.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_arm_thumb_5t.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_thumb.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_thumb_5t.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_thumb_7m.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_thumb_6m.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_arm.stdout \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_arm_5t.stdout +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_66 = arm_abs_global \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_bl_in_range \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_bl_out_of_range \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ thumb_bl_in_range \ @@ -496,18 +588,37 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ thumb2_blx_in_range \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ thumb2_blx_out_of_range \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ thumb_bl_out_of_range_local \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_thm_jump11 \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_thm_jump8 \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_v4bx \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_v4bx_interworking \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_no_fix_v4bx \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_attr_merge_6 \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_attr_merge_6r \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_attr_merge_7 \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_default_v6z \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_on_v6z \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_off_v6z \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_default_v5te \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_default_v7a \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_fix_1176_default_1156t2f_s \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_b_cond \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_b \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_bl \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_blx \ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_local \ -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_local_reloc +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_cortex_a8_local_reloc \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_unaligned_reloc \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_unaligned_reloc_r \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_arm_arm \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_arm_thumb \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_arm_thumb_5t \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_thumb \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_thumb_5t \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_thumb_7m \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_thumb_6m \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_arm \ +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_arm_5t subdir = testsuite DIST_COMMON = $(srcdir)/Makefile.in $(srcdir)/Makefile.am ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 @@ -536,15 +647,16 @@ libgoldtest_a_OBJECTS = $(am_libgoldtest_a_OBJECTS) @NATIVE_OR_CROSS_LINKER_TRUE@ binary_unittest$(EXEEXT) @GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_2 = icf_virtual_function_folding_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ basic_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ basic_static_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ basic_pic_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ basic_static_pic_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ basic_pie_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ constructor_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ constructor_static_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_static_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_pic_test$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ basic_pic_test$(EXEEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_3 = basic_static_test$(EXEEXT) \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@ basic_static_pic_test$(EXEEXT) +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_4 = basic_pie_test$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ constructor_test$(EXEEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_5 = constructor_static_test$(EXEEXT) +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_6 = two_file_test$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_pic_test$(EXEEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_7 = two_file_static_test$(EXEEXT) +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_8 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_shared_1_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_shared_2_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_shared_1_pic_2_test$(EXEEXT) \ @@ -554,7 +666,7 @@ libgoldtest_a_OBJECTS = $(am_libgoldtest_a_OBJECTS) @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_separate_shared_21_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_relocatable_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_pie_test$(EXEEXT) -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_3 = two_file_shared_1_nonpic_test$(EXEEXT) \ +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_9 = two_file_shared_1_nonpic_test$(EXEEXT) \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_shared_2_nonpic_test$(EXEEXT) \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_same_shared_nonpic_test$(EXEEXT) \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_separate_shared_12_nonpic_test$(EXEEXT) \ @@ -562,25 +674,26 @@ libgoldtest_a_OBJECTS = $(am_libgoldtest_a_OBJECTS) @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_mixed_shared_test$(EXEEXT) \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_mixed_2_shared_test$(EXEEXT) \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_mixed_pie_test$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_4 = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_10 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_strip_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_same_shared_strip_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ common_test_1$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ common_test_2$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_static_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_shared_1_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_shared_2_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_same_shared_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_separate_shared_12_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_separate_shared_21_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_test$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_separate_shared_21_test$(EXEEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_11 = exception_static_test$(EXEEXT) +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_12 = weak_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_undef_test$(EXEEXT) -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_5 = weak_undef_nonpic_test$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_6 = weak_alias_test$(EXEEXT) \ +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_13 = weak_undef_nonpic_test$(EXEEXT) +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_14 = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_alias_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_plt$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ copy_test$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@am__EXEEXT_7 = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@am__EXEEXT_15 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_pic_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_pie_test$(EXEEXT) \ @@ -588,39 +701,47 @@ libgoldtest_a_OBJECTS = $(am_libgoldtest_a_OBJECTS) @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_shared_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_shared_ie_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_shared_gd_to_ie_test$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@am__EXEEXT_8 = tls_shared_gnu2_gd_to_ie_test$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_DESCRIPTORS_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@am__EXEEXT_9 = tls_shared_gnu2_test$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@am__EXEEXT_10 = tls_static_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@ tls_static_pic_test$(EXEEXT) -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@am__EXEEXT_11 = tls_shared_nonpic_test$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_12 = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@am__EXEEXT_16 = tls_shared_gnu2_gd_to_ie_test$(EXEEXT) +@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_DESCRIPTORS_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@am__EXEEXT_17 = tls_shared_gnu2_test$(EXEEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@am__EXEEXT_18 = tls_static_test$(EXEEXT) \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@ tls_static_pic_test$(EXEEXT) +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@am__EXEEXT_19 = tls_shared_nonpic_test$(EXEEXT) +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_20 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ many_sections_test$(EXEEXT) \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ many_sections_r_test$(EXEEXT) -@CONSTRUCTOR_PRIORITY_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_13 = initpri1$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_14 = flagstest_o_specialfile$(EXEEXT) -@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_15 = flagstest_compress_debug_sections$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ many_sections_r_test$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ initpri1$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ initpri2$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ initpri3a$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ initpri3b$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ flagstest_o_specialfile$(EXEEXT) +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_21 = flagstest_compress_debug_sections$(EXEEXT) \ @GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ flagstest_o_specialfile_and_compress_debug_sections$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_16 = ver_test$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_22 = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ flagstest_o_ttext_1$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_2$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_6$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_8$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_9$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_11$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_12$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ protected_1$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ protected_2$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ relro_test$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ relro_now_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ relro_strip_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ relro_script_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_1$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_2$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ justsyms$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ justsyms_exec$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ binary_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ script_test_3$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ tls_phdrs_script_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ tls_script_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ thin_archive_test_1$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ thin_archive_test_2$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@am__EXEEXT_17 = plugin_test_1$(EXEEXT) \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@am__EXEEXT_23 = plugin_test_1$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_2$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_3$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_4$(EXEEXT) \ @@ -628,16 +749,17 @@ libgoldtest_a_OBJECTS = $(am_libgoldtest_a_OBJECTS) @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_6$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_7$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@PLUGINS_TRUE@ plugin_test_8$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_18 = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_24 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exclude_libs_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ local_labels_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ discard_locals_test$(EXEEXT) -@GCC_TRUE@@MCMODEL_MEDIUM_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_19 = large$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_20 = \ +@GCC_TRUE@@MCMODEL_MEDIUM_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_25 = large$(EXEEXT) +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_26 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ permission_test$(EXEEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ searched_file_test$(EXEEXT) -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_21 = ifuncmain1static$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1picstatic$(EXEEXT) \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_27 = ifuncmain1static$(EXEEXT) \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1picstatic$(EXEEXT) +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_28 = \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1$(EXEEXT) \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1pic$(EXEEXT) \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1vis$(EXEEXT) \ @@ -645,28 +767,41 @@ libgoldtest_a_OBJECTS = $(am_libgoldtest_a_OBJECTS) @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1staticpic$(EXEEXT) \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1pie$(EXEEXT) \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1vispie$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1staticpie$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain2static$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain2picstatic$(EXEEXT) \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain1staticpie$(EXEEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_29 = ifuncmain2static$(EXEEXT) \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain2picstatic$(EXEEXT) +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_30 = \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain2$(EXEEXT) \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain2pic$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain3$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain4static$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain4picstatic$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain4$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5static$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5picstatic$(EXEEXT) \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain3$(EXEEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_31 = ifuncmain4static$(EXEEXT) \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain4picstatic$(EXEEXT) +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_32 = \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain4$(EXEEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_33 = ifuncmain5static$(EXEEXT) \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5picstatic$(EXEEXT) +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_34 = \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5$(EXEEXT) \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5pic$(EXEEXT) \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5staticpic$(EXEEXT) \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain5pie$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain6pie$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7static$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7picstatic$(EXEEXT) \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain6pie$(EXEEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_35 = ifuncmain7static$(EXEEXT) \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7picstatic$(EXEEXT) +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_36 = \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7$(EXEEXT) \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7pic$(EXEEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7pie$(EXEEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_22 = start_lib_test$(EXEEXT) +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncmain7pie$(EXEEXT) \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncvar$(EXEEXT) +@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_37 = start_lib_test$(EXEEXT) +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_38 = incremental_test_2$(EXEEXT) \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_test_3$(EXEEXT) \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_test_4$(EXEEXT) \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_test_5$(EXEEXT) \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_test_6$(EXEEXT) \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_copy_test$(EXEEXT) \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_common_test_1$(EXEEXT) \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ incremental_comdat_test_1$(EXEEXT) basic_pic_test_SOURCES = basic_pic_test.c basic_pic_test_OBJECTS = basic_pic_test.$(OBJEXT) basic_pic_test_LDADD = $(LDADD) @@ -722,8 +857,7 @@ common_test_2_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ $(common_test_2_LDFLAGS) $(LDFLAGS) -o $@ @GCC_TRUE@@NATIVE_LINKER_TRUE@am__objects_1 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ constructor_test.$(OBJEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@am_constructor_static_test_OBJECTS = \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(am__objects_1) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am_constructor_static_test_OBJECTS = $(am__objects_1) constructor_static_test_OBJECTS = \ $(am_constructor_static_test_OBJECTS) constructor_static_test_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ @@ -785,8 +919,7 @@ exception_shared_2_test_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_test_main.$(OBJEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_test_1.$(OBJEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exception_test_2.$(OBJEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@am_exception_static_test_OBJECTS = \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(am__objects_2) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am_exception_static_test_OBJECTS = $(am__objects_2) exception_static_test_OBJECTS = $(am_exception_static_test_OBJECTS) exception_static_test_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ $(exception_static_test_LDFLAGS) $(LDFLAGS) -o $@ @@ -825,6 +958,12 @@ flagstest_o_specialfile_and_compress_debug_sections_DEPENDENCIES = \ libgoldtest.a ../libgold.a ../../libiberty/libiberty.a \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ $(am__DEPENDENCIES_1) +flagstest_o_ttext_1_SOURCES = flagstest_o_ttext_1.c +flagstest_o_ttext_1_OBJECTS = flagstest_o_ttext_1.$(OBJEXT) +flagstest_o_ttext_1_LDADD = $(LDADD) +flagstest_o_ttext_1_DEPENDENCIES = libgoldtest.a ../libgold.a \ + ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) icf_virtual_function_folding_test_SOURCES = \ icf_virtual_function_folding_test.c icf_virtual_function_folding_test_OBJECTS = \ @@ -855,7 +994,7 @@ ifuncmain1pie_LDADD = $(LDADD) ifuncmain1pie_DEPENDENCIES = libgoldtest.a ../libgold.a \ ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am_ifuncmain1static_OBJECTS = ifuncmain1.$(OBJEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am_ifuncmain1static_OBJECTS = ifuncmain1.$(OBJEXT) ifuncmain1static_OBJECTS = $(am_ifuncmain1static_OBJECTS) ifuncmain1static_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ $(ifuncmain1static_LDFLAGS) $(LDFLAGS) -o $@ @@ -904,8 +1043,8 @@ ifuncmain2picstatic_LDADD = $(LDADD) ifuncmain2picstatic_DEPENDENCIES = libgoldtest.a ../libgold.a \ ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am_ifuncmain2static_OBJECTS = ifuncmain2.$(OBJEXT) \ -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncdep2.$(OBJEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am_ifuncmain2static_OBJECTS = ifuncmain2.$(OBJEXT) \ +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncdep2.$(OBJEXT) ifuncmain2static_OBJECTS = $(am_ifuncmain2static_OBJECTS) ifuncmain2static_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ $(ifuncmain2static_LDFLAGS) $(LDFLAGS) -o $@ @@ -923,7 +1062,7 @@ ifuncmain4picstatic_LDADD = $(LDADD) ifuncmain4picstatic_DEPENDENCIES = libgoldtest.a ../libgold.a \ ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am_ifuncmain4static_OBJECTS = ifuncmain4.$(OBJEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am_ifuncmain4static_OBJECTS = ifuncmain4.$(OBJEXT) ifuncmain4static_OBJECTS = $(am_ifuncmain4static_OBJECTS) ifuncmain4static_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ $(ifuncmain4static_LDFLAGS) $(LDFLAGS) -o $@ @@ -949,7 +1088,7 @@ ifuncmain5pie_LDADD = $(LDADD) ifuncmain5pie_DEPENDENCIES = libgoldtest.a ../libgold.a \ ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am_ifuncmain5static_OBJECTS = ifuncmain5.$(OBJEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am_ifuncmain5static_OBJECTS = ifuncmain5.$(OBJEXT) ifuncmain5static_OBJECTS = $(am_ifuncmain5static_OBJECTS) ifuncmain5static_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ $(ifuncmain5static_LDFLAGS) $(LDFLAGS) -o $@ @@ -987,19 +1126,95 @@ ifuncmain7pie_LDADD = $(LDADD) ifuncmain7pie_DEPENDENCIES = libgoldtest.a ../libgold.a \ ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am_ifuncmain7static_OBJECTS = ifuncmain7.$(OBJEXT) +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am_ifuncmain7static_OBJECTS = ifuncmain7.$(OBJEXT) ifuncmain7static_OBJECTS = $(am_ifuncmain7static_OBJECTS) ifuncmain7static_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ $(ifuncmain7static_LDFLAGS) $(LDFLAGS) -o $@ -@CONSTRUCTOR_PRIORITY_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am_initpri1_OBJECTS = initpri1.$(OBJEXT) +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@am_ifuncvar_OBJECTS = \ +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ ifuncvar3.$(OBJEXT) +ifuncvar_OBJECTS = $(am_ifuncvar_OBJECTS) +ifuncvar_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(ifuncvar_LDFLAGS) \ + $(LDFLAGS) -o $@ +incremental_comdat_test_1_SOURCES = incremental_comdat_test_1.c +incremental_comdat_test_1_OBJECTS = \ + incremental_comdat_test_1.$(OBJEXT) +incremental_comdat_test_1_LDADD = $(LDADD) +incremental_comdat_test_1_DEPENDENCIES = libgoldtest.a ../libgold.a \ + ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) +incremental_common_test_1_SOURCES = incremental_common_test_1.c +incremental_common_test_1_OBJECTS = \ + incremental_common_test_1.$(OBJEXT) +incremental_common_test_1_LDADD = $(LDADD) +incremental_common_test_1_DEPENDENCIES = libgoldtest.a ../libgold.a \ + ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) +incremental_copy_test_SOURCES = incremental_copy_test.c +incremental_copy_test_OBJECTS = incremental_copy_test.$(OBJEXT) +incremental_copy_test_LDADD = $(LDADD) +incremental_copy_test_DEPENDENCIES = libgoldtest.a ../libgold.a \ + ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) +incremental_test_2_SOURCES = incremental_test_2.c +incremental_test_2_OBJECTS = incremental_test_2.$(OBJEXT) +incremental_test_2_LDADD = $(LDADD) +incremental_test_2_DEPENDENCIES = libgoldtest.a ../libgold.a \ + ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) +incremental_test_3_SOURCES = incremental_test_3.c +incremental_test_3_OBJECTS = incremental_test_3.$(OBJEXT) +incremental_test_3_LDADD = $(LDADD) +incremental_test_3_DEPENDENCIES = libgoldtest.a ../libgold.a \ + ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) +incremental_test_4_SOURCES = incremental_test_4.c +incremental_test_4_OBJECTS = incremental_test_4.$(OBJEXT) +incremental_test_4_LDADD = $(LDADD) +incremental_test_4_DEPENDENCIES = libgoldtest.a ../libgold.a \ + ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) +incremental_test_5_SOURCES = incremental_test_5.c +incremental_test_5_OBJECTS = incremental_test_5.$(OBJEXT) +incremental_test_5_LDADD = $(LDADD) +incremental_test_5_DEPENDENCIES = libgoldtest.a ../libgold.a \ + ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) +incremental_test_6_SOURCES = incremental_test_6.c +incremental_test_6_OBJECTS = incremental_test_6.$(OBJEXT) +incremental_test_6_LDADD = $(LDADD) +incremental_test_6_DEPENDENCIES = libgoldtest.a ../libgold.a \ + ../../libiberty/libiberty.a $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) +@GCC_TRUE@@NATIVE_LINKER_TRUE@am_initpri1_OBJECTS = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ initpri1.$(OBJEXT) initpri1_OBJECTS = $(am_initpri1_OBJECTS) initpri1_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(initpri1_LDFLAGS) \ $(LDFLAGS) -o $@ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am_initpri2_OBJECTS = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ initpri2.$(OBJEXT) +initpri2_OBJECTS = $(am_initpri2_OBJECTS) +initpri2_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(initpri2_LDFLAGS) \ + $(LDFLAGS) -o $@ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am_initpri3a_OBJECTS = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ initpri3.$(OBJEXT) +initpri3a_OBJECTS = $(am_initpri3a_OBJECTS) +initpri3a_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(initpri3a_LDFLAGS) \ + $(LDFLAGS) -o $@ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am_initpri3b_OBJECTS = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ initpri3.$(OBJEXT) +initpri3b_OBJECTS = $(am_initpri3b_OBJECTS) +initpri3b_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(initpri3b_LDFLAGS) \ + $(LDFLAGS) -o $@ @GCC_TRUE@@NATIVE_LINKER_TRUE@am_justsyms_OBJECTS = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ justsyms_1.$(OBJEXT) justsyms_OBJECTS = $(am_justsyms_OBJECTS) justsyms_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ $(justsyms_LDFLAGS) $(LDFLAGS) -o $@ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am_justsyms_exec_OBJECTS = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ justsyms_exec.$(OBJEXT) +justsyms_exec_OBJECTS = $(am_justsyms_exec_OBJECTS) +justsyms_exec_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ + $(justsyms_exec_LDFLAGS) $(LDFLAGS) -o $@ @GCC_TRUE@@MCMODEL_MEDIUM_TRUE@@NATIVE_LINKER_TRUE@am_large_OBJECTS = large-large.$(OBJEXT) large_OBJECTS = $(am_large_OBJECTS) large_LINK = $(CCLD) $(large_CFLAGS) $(CFLAGS) $(large_LDFLAGS) \ @@ -1095,6 +1310,11 @@ protected_1_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ protected_2_OBJECTS = $(am_protected_2_OBJECTS) protected_2_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ $(protected_2_LDFLAGS) $(LDFLAGS) -o $@ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am_relro_now_test_OBJECTS = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ relro_test_main.$(OBJEXT) +relro_now_test_OBJECTS = $(am_relro_now_test_OBJECTS) +relro_now_test_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ + $(relro_now_test_LDFLAGS) $(LDFLAGS) -o $@ @GCC_TRUE@@NATIVE_LINKER_TRUE@am_relro_script_test_OBJECTS = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ relro_test_main.$(OBJEXT) relro_script_test_OBJECTS = $(am_relro_script_test_OBJECTS) @@ -1209,7 +1429,7 @@ tls_shared_test_OBJECTS = $(am_tls_shared_test_OBJECTS) tls_shared_test_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ $(tls_shared_test_LDFLAGS) $(LDFLAGS) -o $@ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@am__objects_4 = tls_test_main.$(OBJEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@am_tls_static_pic_test_OBJECTS = $(am__objects_4) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@am_tls_static_pic_test_OBJECTS = $(am__objects_4) tls_static_pic_test_OBJECTS = $(am_tls_static_pic_test_OBJECTS) @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@am__DEPENDENCIES_3 = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_test_pic.o \ @@ -1217,7 +1437,7 @@ tls_static_pic_test_OBJECTS = $(am_tls_static_pic_test_OBJECTS) @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ tls_test_c_pic.o tls_static_pic_test_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ $(tls_static_pic_test_LDFLAGS) $(LDFLAGS) -o $@ -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@am_tls_static_test_OBJECTS = $(am__objects_3) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@am_tls_static_test_OBJECTS = $(am__objects_3) tls_static_test_OBJECTS = $(am_tls_static_test_OBJECTS) tls_static_test_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ $(tls_static_test_LDFLAGS) $(LDFLAGS) -o $@ @@ -1354,8 +1574,7 @@ two_file_shared_2_test_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_1b.$(OBJEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_2.$(OBJEXT) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_main.$(OBJEXT) -@GCC_TRUE@@NATIVE_LINKER_TRUE@am_two_file_static_test_OBJECTS = \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(am__objects_5) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am_two_file_static_test_OBJECTS = $(am__objects_5) two_file_static_test_OBJECTS = $(am_two_file_static_test_OBJECTS) two_file_static_test_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ $(two_file_static_test_LDFLAGS) $(LDFLAGS) -o $@ @@ -1383,6 +1602,11 @@ ver_test_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ ver_test_11_OBJECTS = $(am_ver_test_11_OBJECTS) ver_test_11_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ $(ver_test_11_LDFLAGS) $(LDFLAGS) -o $@ +@GCC_TRUE@@NATIVE_LINKER_TRUE@am_ver_test_12_OBJECTS = \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_main_2.$(OBJEXT) +ver_test_12_OBJECTS = $(am_ver_test_12_OBJECTS) +ver_test_12_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \ + $(ver_test_12_LDFLAGS) $(LDFLAGS) -o $@ @GCC_TRUE@@NATIVE_LINKER_TRUE@am_ver_test_2_OBJECTS = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ ver_test_main_2.$(OBJEXT) ver_test_2_OBJECTS = $(am_ver_test_2_OBJECTS) @@ -1456,12 +1680,12 @@ SOURCES = $(libgoldtest_a_SOURCES) basic_pic_test.c basic_pie_test.c \ $(exclude_libs_test_SOURCES) \ flagstest_compress_debug_sections.c flagstest_o_specialfile.c \ flagstest_o_specialfile_and_compress_debug_sections.c \ - icf_virtual_function_folding_test.c $(ifuncmain1_SOURCES) \ - ifuncmain1pic.c ifuncmain1picstatic.c ifuncmain1pie.c \ - $(ifuncmain1static_SOURCES) ifuncmain1staticpic.c \ - ifuncmain1staticpie.c $(ifuncmain1vis_SOURCES) \ - ifuncmain1vispic.c ifuncmain1vispie.c $(ifuncmain2_SOURCES) \ - ifuncmain2pic.c ifuncmain2picstatic.c \ + flagstest_o_ttext_1.c icf_virtual_function_folding_test.c \ + $(ifuncmain1_SOURCES) ifuncmain1pic.c ifuncmain1picstatic.c \ + ifuncmain1pie.c $(ifuncmain1static_SOURCES) \ + ifuncmain1staticpic.c ifuncmain1staticpie.c \ + $(ifuncmain1vis_SOURCES) ifuncmain1vispic.c ifuncmain1vispie.c \ + $(ifuncmain2_SOURCES) ifuncmain2pic.c ifuncmain2picstatic.c \ $(ifuncmain2static_SOURCES) $(ifuncmain3_SOURCES) \ $(ifuncmain4_SOURCES) ifuncmain4picstatic.c \ $(ifuncmain4static_SOURCES) $(ifuncmain5_SOURCES) \ @@ -1469,17 +1693,22 @@ SOURCES = $(libgoldtest_a_SOURCES) basic_pic_test.c basic_pie_test.c \ $(ifuncmain5static_SOURCES) ifuncmain5staticpic.c \ ifuncmain6pie.c $(ifuncmain7_SOURCES) ifuncmain7pic.c \ ifuncmain7picstatic.c ifuncmain7pie.c \ - $(ifuncmain7static_SOURCES) $(initpri1_SOURCES) \ - $(justsyms_SOURCES) $(large_SOURCES) local_labels_test.c \ + $(ifuncmain7static_SOURCES) $(ifuncvar_SOURCES) \ + incremental_comdat_test_1.c incremental_common_test_1.c \ + incremental_copy_test.c incremental_test_2.c \ + incremental_test_3.c incremental_test_4.c incremental_test_5.c \ + incremental_test_6.c $(initpri1_SOURCES) $(initpri2_SOURCES) \ + $(initpri3a_SOURCES) $(initpri3b_SOURCES) $(justsyms_SOURCES) \ + $(justsyms_exec_SOURCES) $(large_SOURCES) local_labels_test.c \ many_sections_r_test.c $(many_sections_test_SOURCES) \ $(object_unittest_SOURCES) permission_test.c plugin_test_1.c \ plugin_test_2.c plugin_test_3.c plugin_test_4.c \ plugin_test_5.c plugin_test_6.c plugin_test_7.c \ plugin_test_8.c $(protected_1_SOURCES) $(protected_2_SOURCES) \ - $(relro_script_test_SOURCES) $(relro_strip_test_SOURCES) \ - $(relro_test_SOURCES) $(script_test_1_SOURCES) \ - $(script_test_2_SOURCES) script_test_3.c \ - $(searched_file_test_SOURCES) start_lib_test.c \ + $(relro_now_test_SOURCES) $(relro_script_test_SOURCES) \ + $(relro_strip_test_SOURCES) $(relro_test_SOURCES) \ + $(script_test_1_SOURCES) $(script_test_2_SOURCES) \ + script_test_3.c $(searched_file_test_SOURCES) start_lib_test.c \ $(thin_archive_test_1_SOURCES) $(thin_archive_test_2_SOURCES) \ $(tls_phdrs_script_test_SOURCES) $(tls_pic_test_SOURCES) \ tls_pie_pic_test.c tls_pie_test.c $(tls_script_test_SOURCES) \ @@ -1508,11 +1737,11 @@ SOURCES = $(libgoldtest_a_SOURCES) basic_pic_test.c basic_pie_test.c \ $(two_file_shared_2_test_SOURCES) \ $(two_file_static_test_SOURCES) two_file_strip_test.c \ $(two_file_test_SOURCES) $(ver_test_SOURCES) \ - $(ver_test_11_SOURCES) $(ver_test_2_SOURCES) \ - $(ver_test_6_SOURCES) $(ver_test_8_SOURCES) \ - $(ver_test_9_SOURCES) $(weak_alias_test_SOURCES) weak_plt.c \ - $(weak_test_SOURCES) $(weak_undef_nonpic_test_SOURCES) \ - $(weak_undef_test_SOURCES) + $(ver_test_11_SOURCES) $(ver_test_12_SOURCES) \ + $(ver_test_2_SOURCES) $(ver_test_6_SOURCES) \ + $(ver_test_8_SOURCES) $(ver_test_9_SOURCES) \ + $(weak_alias_test_SOURCES) weak_plt.c $(weak_test_SOURCES) \ + $(weak_undef_nonpic_test_SOURCES) $(weak_undef_test_SOURCES) ETAGS = etags CTAGS = ctags am__tty_colors = \ @@ -1637,6 +1866,7 @@ MKDIR_P = @MKDIR_P@ MKINSTALLDIRS = @MKINSTALLDIRS@ MSGFMT = @MSGFMT@ MSGMERGE = @MSGMERGE@ +NM = @NM@ NO_WERROR = @NO_WERROR@ OBJEXT = @OBJEXT@ PACKAGE = @PACKAGE@ @@ -1749,20 +1979,21 @@ TEST_AS = $(top_builddir)/../gas/as-new # improve on that here. automake-1.9 info docs say "mostlyclean" is # the right choice for files 'make' builds that people rebuild. MOSTLYCLEANFILES = *.so *.syms *.stdout $(am__append_4) \ - $(am__append_9) $(am__append_18) $(am__append_26) \ - $(am__append_30) $(am__append_39) $(am__append_42) \ - $(am__append_45) + $(am__append_17) $(am__append_26) $(am__append_28) \ + $(am__append_30) $(am__append_36) $(am__append_40) \ + $(am__append_55) $(am__append_60) $(am__append_63) \ + $(am__append_66) # We will add to these later, for each individual test. Note # that we add each test under check_SCRIPTS or check_PROGRAMS; # the TESTS variable is automatically populated from these. -check_SCRIPTS = $(am__append_2) $(am__append_24) $(am__append_28) \ - $(am__append_35) $(am__append_37) $(am__append_40) \ - $(am__append_43) -check_DATA = $(am__append_3) $(am__append_25) $(am__append_29) \ - $(am__append_36) $(am__append_38) $(am__append_41) \ - $(am__append_44) -BUILT_SOURCES = $(am__append_17) +check_SCRIPTS = $(am__append_2) $(am__append_34) $(am__append_38) \ + $(am__append_56) $(am__append_58) $(am__append_61) \ + $(am__append_64) +check_DATA = $(am__append_3) $(am__append_27) $(am__append_29) \ + $(am__append_35) $(am__append_39) $(am__append_57) \ + $(am__append_59) $(am__append_62) $(am__append_65) +BUILT_SOURCES = $(am__append_25) TESTS = $(check_SCRIPTS) $(check_PROGRAMS) # --------------------------------------------------------------------- @@ -1783,10 +2014,10 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@constructor_test_DEPENDENCIES = gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@constructor_test_LDFLAGS = -Bgcctestdir/ @GCC_TRUE@@NATIVE_LINKER_TRUE@constructor_test_LDADD = -@GCC_TRUE@@NATIVE_LINKER_TRUE@constructor_static_test_SOURCES = $(constructor_test_SOURCES) -@GCC_TRUE@@NATIVE_LINKER_TRUE@constructor_static_test_DEPENDENCIES = $(constructor_test_DEPENDENCIES) -@GCC_TRUE@@NATIVE_LINKER_TRUE@constructor_static_test_LDFLAGS = $(constructor_test_LDFLAGS) -static -@GCC_TRUE@@NATIVE_LINKER_TRUE@constructor_static_test_LDADD = $(constructor_test_LDADD) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@constructor_static_test_SOURCES = $(constructor_test_SOURCES) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@constructor_static_test_DEPENDENCIES = $(constructor_test_DEPENDENCIES) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@constructor_static_test_LDFLAGS = $(constructor_test_LDFLAGS) -static +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@constructor_static_test_LDADD = $(constructor_test_LDADD) @GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_test_SOURCES = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_1.cc \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_1b.cc \ @@ -1797,10 +2028,10 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_test_DEPENDENCIES = gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_test_LDFLAGS = -Bgcctestdir/ @GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_test_LDADD = -@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_static_test_SOURCES = $(two_file_test_SOURCES) -@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_static_test_DEPENDENCIES = $(two_file_test_DEPENDENCIES) -@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_static_test_LDFLAGS = $(two_file_test_LDFLAGS) -static -@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_static_test_LDADD = $(two_file_test_LDADD) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@two_file_static_test_SOURCES = $(two_file_test_SOURCES) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@two_file_static_test_DEPENDENCIES = $(two_file_test_DEPENDENCIES) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@two_file_static_test_LDFLAGS = $(two_file_test_LDFLAGS) -static +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@two_file_static_test_LDADD = $(two_file_test_LDADD) @GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_pic_test_SOURCES = two_file_test_main.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_pic_test_DEPENDENCIES = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ gcctestdir/ld two_file_test_1_pic.o two_file_test_1b_pic.o two_file_test_2_pic.o @@ -1922,10 +2153,10 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@exception_test_DEPENDENCIES = gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@exception_test_LDFLAGS = -Bgcctestdir/ @GCC_TRUE@@NATIVE_LINKER_TRUE@exception_test_LDADD = -@GCC_TRUE@@NATIVE_LINKER_TRUE@exception_static_test_SOURCES = $(exception_test_SOURCES) -@GCC_TRUE@@NATIVE_LINKER_TRUE@exception_static_test_DEPENDENCIES = $(exception_test_DEPENDENCIES) -@GCC_TRUE@@NATIVE_LINKER_TRUE@exception_static_test_LDFLAGS = $(exception_test_LDFLAGS) -static -@GCC_TRUE@@NATIVE_LINKER_TRUE@exception_static_test_LDADD = $(exception_test_LDADD) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@exception_static_test_SOURCES = $(exception_test_SOURCES) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@exception_static_test_DEPENDENCIES = $(exception_test_DEPENDENCIES) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@exception_static_test_LDFLAGS = $(exception_test_LDFLAGS) -static +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@exception_static_test_LDADD = $(exception_test_LDADD) @GCC_TRUE@@NATIVE_LINKER_TRUE@exception_shared_1_test_SOURCES = exception_test_2.cc exception_test_main.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@exception_shared_1_test_DEPENDENCIES = gcctestdir/ld exception_shared_1.so @GCC_TRUE@@NATIVE_LINKER_TRUE@exception_shared_1_test_LDFLAGS = -Bgcctestdir/ -Wl,-R,. @@ -1969,12 +2200,12 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_alias_test_SOURCES = weak_alias_test_main.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_alias_test_DEPENDENCIES = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ gcctestdir/ld weak_alias_test_1.so weak_alias_test_2.so \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_alias_test_3.o weak_alias_test_4.so +@GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_alias_test_3.o weak_alias_test_4.so weak_alias_test_5.so @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_alias_test_LDFLAGS = -Bgcctestdir/ -Wl,-R,. @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_alias_test_LDADD = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_alias_test_1.so weak_alias_test_2.so weak_alias_test_3.o \ -@GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_alias_test_4.so +@GCC_TRUE@@NATIVE_LINKER_TRUE@ weak_alias_test_4.so weak_alias_test_5.so @GCC_TRUE@@NATIVE_LINKER_TRUE@copy_test_SOURCES = copy_test.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@copy_test_DEPENDENCIES = gcctestdir/ld copy_test_1.so copy_test_2.so @@ -2020,14 +2251,14 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_DESCRIPTORS_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@tls_shared_gnu2_test_DEPENDENCIES = gcctestdir/ld tls_test_gnu2_shared.so @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_DESCRIPTORS_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@tls_shared_gnu2_test_LDFLAGS = -Bgcctestdir/ -Wl,-R,. @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_DESCRIPTORS_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@tls_shared_gnu2_test_LDADD = tls_test_gnu2_shared.so -lpthread -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_test_SOURCES = $(tls_test_SOURCES) -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_test_DEPENDENCIES = $(tls_test_DEPENDENCIES) -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_test_LDFLAGS = $(tls_test_LDFLAGS) -static -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_test_LDADD = $(tls_test_LDADD) -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_pic_test_SOURCES = $(tls_pic_test_SOURCES) -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_pic_test_DEPENDENCIES = $(tls_pic_test_DEPENDENCIES) -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_pic_test_LDFLAGS = $(tls_pic_test_LDFLAGS) -static -@GCC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_pic_test_LDADD = $(tls_pic_test_LDADD) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_test_SOURCES = $(tls_test_SOURCES) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_test_DEPENDENCIES = $(tls_test_DEPENDENCIES) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_test_LDFLAGS = $(tls_test_LDFLAGS) -static +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_test_LDADD = $(tls_test_LDADD) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_pic_test_SOURCES = $(tls_pic_test_SOURCES) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_pic_test_DEPENDENCIES = $(tls_pic_test_DEPENDENCIES) +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_pic_test_LDFLAGS = $(tls_pic_test_LDFLAGS) -static +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@@STATIC_TLS_TRUE@@TLS_TRUE@tls_static_pic_test_LDADD = $(tls_pic_test_LDADD) @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@tls_shared_nonpic_test_SOURCES = tls_test_main.cc @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@tls_shared_nonpic_test_DEPENDENCIES = gcctestdir/ld tls_test_shared_nonpic.so @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@tls_shared_nonpic_test_LDFLAGS = -Bgcctestdir/ -Wl,-R,. @@ -2036,10 +2267,22 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@many_sections_test_DEPENDENCIES = gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@many_sections_test_LDFLAGS = -Bgcctestdir/ -rdynamic @GCC_TRUE@@NATIVE_LINKER_TRUE@many_sections_test_LDADD = -@CONSTRUCTOR_PRIORITY_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri1_SOURCES = initpri1.c -@CONSTRUCTOR_PRIORITY_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri1_DEPENDENCIES = gcctestdir/ld -@CONSTRUCTOR_PRIORITY_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri1_LDFLAGS = -Bgcctestdir/ -@CONSTRUCTOR_PRIORITY_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri1_LDADD = +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri1_SOURCES = initpri1.c +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri1_DEPENDENCIES = gcctestdir/ld +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri1_LDFLAGS = -Bgcctestdir/ +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri1_LDADD = +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri2_SOURCES = initpri2.c +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri2_DEPENDENCIES = gcctestdir/ld +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri2_LDFLAGS = -Bgcctestdir/ +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri2_LDADD = +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri3a_SOURCES = initpri3.c +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri3a_DEPENDENCIES = gcctestdir/ld +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri3a_LDFLAGS = -Bgcctestdir/ +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri3a_LDADD = +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri3b_SOURCES = initpri3.c +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri3b_DEPENDENCIES = gcctestdir/ld +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri3b_LDFLAGS = -Bgcctestdir/ -Wl,--no-ctors-in-init-array +@GCC_TRUE@@NATIVE_LINKER_TRUE@initpri3b_LDADD = @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_SOURCES = ver_test_main.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_DEPENDENCIES = gcctestdir/ld ver_test_1.so ver_test_2.so ver_test_4.so @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_LDFLAGS = -Bgcctestdir/ -Wl,-R,. @@ -2064,6 +2307,10 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_11_DEPENDENCIES = gcctestdir/ld ver_test_11.a @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_11_LDFLAGS = -Bgcctestdir/ -Wl,-R,. @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_11_LDADD = ver_test_11.a +@GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_12_SOURCES = ver_test_main_2.cc +@GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_12_DEPENDENCIES = gcctestdir/ld ver_test_12.o +@GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_12_LDFLAGS = -Bgcctestdir/ -Wl,-R,. +@GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_12_LDADD = ver_test_12.o @GCC_TRUE@@NATIVE_LINKER_TRUE@protected_1_SOURCES = \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ protected_main_1.cc protected_main_2.cc protected_main_3.cc @@ -2078,6 +2325,10 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@relro_test_DEPENDENCIES = gcctestdir/ld relro_test.so @GCC_TRUE@@NATIVE_LINKER_TRUE@relro_test_LDFLAGS = -Bgcctestdir/ -Wl,-R,. @GCC_TRUE@@NATIVE_LINKER_TRUE@relro_test_LDADD = relro_test.so +@GCC_TRUE@@NATIVE_LINKER_TRUE@relro_now_test_SOURCES = relro_test_main.cc +@GCC_TRUE@@NATIVE_LINKER_TRUE@relro_now_test_DEPENDENCIES = gcctestdir/ld relro_now_test.so +@GCC_TRUE@@NATIVE_LINKER_TRUE@relro_now_test_LDFLAGS = -Bgcctestdir -Wl,-R,. -Wl,-z,relro -Wl,-z,now +@GCC_TRUE@@NATIVE_LINKER_TRUE@relro_now_test_LDADD = relro_now_test.so @GCC_TRUE@@NATIVE_LINKER_TRUE@relro_strip_test_SOURCES = relro_test_main.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@relro_strip_test_DEPENDENCIES = gcctestdir/ld relro_strip_test.so @GCC_TRUE@@NATIVE_LINKER_TRUE@relro_strip_test_LDFLAGS = -Bgcctestdir/ -Wl,-R,. @@ -2098,6 +2349,10 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@justsyms_DEPENDENCIES = gcctestdir/ld justsyms_2r.o @GCC_TRUE@@NATIVE_LINKER_TRUE@justsyms_LDFLAGS = -Bgcctestdir/ -Wl,-R,justsyms_2r.o @GCC_TRUE@@NATIVE_LINKER_TRUE@justsyms_LDADD = +@GCC_TRUE@@NATIVE_LINKER_TRUE@justsyms_exec_SOURCES = justsyms_exec.c +@GCC_TRUE@@NATIVE_LINKER_TRUE@justsyms_exec_DEPENDENCIES = gcctestdir/ld justsyms_lib +@GCC_TRUE@@NATIVE_LINKER_TRUE@justsyms_exec_LDFLAGS = -Bgcctestdir/ -Wl,-R,justsyms_lib +@GCC_TRUE@@NATIVE_LINKER_TRUE@justsyms_exec_LDADD = @GCC_TRUE@@NATIVE_LINKER_TRUE@binary_test_SOURCES = binary_test.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@binary_test_DEPENDENCIES = gcctestdir/ld binary.txt @GCC_TRUE@@NATIVE_LINKER_TRUE@binary_test_LDFLAGS = -Bgcctestdir/ -Wl,--format,binary,binary.txt,--format,elf @@ -2140,10 +2395,10 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@NATIVE_LINKER_TRUE@searched_file_test_DEPENDENCIES = alt/searched_file_test_lib.a @GCC_TRUE@@NATIVE_LINKER_TRUE@searched_file_test_LDFLAGS = -Bgcctestdir/ -Lalt @GCC_TRUE@@NATIVE_LINKER_TRUE@searched_file_test_LDADD = -l:searched_file_test_lib.a -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1static_SOURCES = ifuncmain1.c -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1static_DEPENDENCIES = gcctestdir/ld ifuncdep1.o -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1static_LDFLAGS = -Bgcctestdir/ -static -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1static_LDADD = ifuncdep1.o +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1static_SOURCES = ifuncmain1.c +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1static_DEPENDENCIES = gcctestdir/ld ifuncdep1.o +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1static_LDFLAGS = -Bgcctestdir/ -static +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1static_LDADD = ifuncdep1.o @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1_SOURCES = ifuncmain1.c @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1_DEPENDENCIES = gcctestdir/ld ifuncmod1.so @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1_LDFLAGS = -Bgcctestdir/ -Wl,-R,. @@ -2152,10 +2407,10 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1vis_DEPENDENCIES = gcctestdir/ld ifuncmod1.so @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1vis_LDFLAGS = -Bgcctestdir/ -Wl,-R,. @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1vis_LDADD = ifuncmod1.so -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2static_SOURCES = ifuncmain2.c ifuncdep2.c -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2static_DEPENDENCIES = gcctestdir/ld -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2static_LDFLAGS = -Bgcctestdir/ -static -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2static_LDADD = +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2static_SOURCES = ifuncmain2.c ifuncdep2.c +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2static_DEPENDENCIES = gcctestdir/ld +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2static_LDFLAGS = -Bgcctestdir/ -static +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2static_LDADD = @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2_SOURCES = ifuncmain2.c ifuncdep2.c @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2_DEPENDENCIES = gcctestdir/ld @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2_LDFLAGS = -Bgcctestdir/ @@ -2164,30 +2419,34 @@ LDADD = libgoldtest.a ../libgold.a ../../libiberty/libiberty.a $(LIBINTL) \ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain3_DEPENDENCIES = gcctestdir/ld ifuncmod3.so @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain3_LDFLAGS = -Bgcctestdir/ -Wl,--export-dynamic -Wl,-R,. @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain3_LDADD = -ldl -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4static_SOURCES = ifuncmain4.c -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4static_DEPENDENCIES = gcctestdir/ld -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4static_LDFLAGS = -Bgcctestdir/ -static -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4static_LDADD = +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4static_SOURCES = ifuncmain4.c +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4static_DEPENDENCIES = gcctestdir/ld +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4static_LDFLAGS = -Bgcctestdir/ -static +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4static_LDADD = @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4_SOURCES = ifuncmain4.c @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4_DEPENDENCIES = gcctestdir/ld @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4_LDFLAGS = -Bgcctestdir/ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4_LDADD = -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5static_SOURCES = ifuncmain5.c -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5static_DEPENDENCIES = gcctestdir/ld ifuncdep5.o -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5static_LDFLAGS = -Bgcctestdir/ -static -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5static_LDADD = ifuncdep5.o +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5static_SOURCES = ifuncmain5.c +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5static_DEPENDENCIES = gcctestdir/ld ifuncdep5.o +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5static_LDFLAGS = -Bgcctestdir/ -static +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5static_LDADD = ifuncdep5.o @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5_SOURCES = ifuncmain5.c @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5_DEPENDENCIES = gcctestdir/ld ifuncmod5.so @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5_LDFLAGS = -Bgcctestdir/ -Wl,-R,. @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5_LDADD = ifuncmod5.so -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7static_SOURCES = ifuncmain7.c -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7static_DEPENDENCIES = gcctestdir/ld -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7static_LDFLAGS = -Bgcctestdir/ -static -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7static_LDADD = +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7static_SOURCES = ifuncmain7.c +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7static_DEPENDENCIES = gcctestdir/ld +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7static_LDFLAGS = -Bgcctestdir/ -static +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7static_LDADD = @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7_SOURCES = ifuncmain7.c @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7_DEPENDENCIES = gcctestdir/ld @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7_LDFLAGS = -Bgcctestdir/ @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7_LDADD = +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncvar_SOURCES = ifuncvar3.c +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncvar_DEPENDENCIES = gcctestdir/ld ifuncvar.so +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncvar_LDFLAGS = -Bgcctestdir/ -Wl,-R,. +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncvar_LDADD = ifuncvar.so @DEFAULT_TARGET_I386_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@SPLIT_DEFSYMS = --defsym __morestack=0x100 --defsym __morestack_non_split=0x200 @DEFAULT_TARGET_X86_64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@SPLIT_DEFSYMS = --defsym __morestack=0x100 --defsym __morestack_non_split=0x200 all: $(BUILT_SOURCES) @@ -2250,12 +2509,18 @@ clean-checkPROGRAMS: @GCC_FALSE@basic_static_pic_test$(EXEEXT): $(basic_static_pic_test_OBJECTS) $(basic_static_pic_test_DEPENDENCIES) @GCC_FALSE@ @rm -f basic_static_pic_test$(EXEEXT) @GCC_FALSE@ $(LINK) $(basic_static_pic_test_OBJECTS) $(basic_static_pic_test_LDADD) $(LIBS) +@HAVE_STATIC_FALSE@basic_static_pic_test$(EXEEXT): $(basic_static_pic_test_OBJECTS) $(basic_static_pic_test_DEPENDENCIES) +@HAVE_STATIC_FALSE@ @rm -f basic_static_pic_test$(EXEEXT) +@HAVE_STATIC_FALSE@ $(LINK) $(basic_static_pic_test_OBJECTS) $(basic_static_pic_test_LDADD) $(LIBS) @NATIVE_LINKER_FALSE@basic_static_pic_test$(EXEEXT): $(basic_static_pic_test_OBJECTS) $(basic_static_pic_test_DEPENDENCIES) @NATIVE_LINKER_FALSE@ @rm -f basic_static_pic_test$(EXEEXT) @NATIVE_LINKER_FALSE@ $(LINK) $(basic_static_pic_test_OBJECTS) $(basic_static_pic_test_LDADD) $(LIBS) @GCC_FALSE@basic_static_test$(EXEEXT): $(basic_static_test_OBJECTS) $(basic_static_test_DEPENDENCIES) @GCC_FALSE@ @rm -f basic_static_test$(EXEEXT) @GCC_FALSE@ $(LINK) $(basic_static_test_OBJECTS) $(basic_static_test_LDADD) $(LIBS) +@HAVE_STATIC_FALSE@basic_static_test$(EXEEXT): $(basic_static_test_OBJECTS) $(basic_static_test_DEPENDENCIES) +@HAVE_STATIC_FALSE@ @rm -f basic_static_test$(EXEEXT) +@HAVE_STATIC_FALSE@ $(LINK) $(basic_static_test_OBJECTS) $(basic_static_test_LDADD) $(LIBS) @NATIVE_LINKER_FALSE@basic_static_test$(EXEEXT): $(basic_static_test_OBJECTS) $(basic_static_test_DEPENDENCIES) @NATIVE_LINKER_FALSE@ @rm -f basic_static_test$(EXEEXT) @NATIVE_LINKER_FALSE@ $(LINK) $(basic_static_test_OBJECTS) $(basic_static_test_LDADD) $(LIBS) @@ -2337,6 +2602,12 @@ exclude_libs_test$(EXEEXT): $(exclude_libs_test_OBJECTS) $(exclude_libs_test_DEP @NATIVE_LINKER_FALSE@flagstest_o_specialfile_and_compress_debug_sections$(EXEEXT): $(flagstest_o_specialfile_and_compress_debug_sections_OBJECTS) $(flagstest_o_specialfile_and_compress_debug_sections_DEPENDENCIES) @NATIVE_LINKER_FALSE@ @rm -f flagstest_o_specialfile_and_compress_debug_sections$(EXEEXT) @NATIVE_LINKER_FALSE@ $(LINK) $(flagstest_o_specialfile_and_compress_debug_sections_OBJECTS) $(flagstest_o_specialfile_and_compress_debug_sections_LDADD) $(LIBS) +@GCC_FALSE@flagstest_o_ttext_1$(EXEEXT): $(flagstest_o_ttext_1_OBJECTS) $(flagstest_o_ttext_1_DEPENDENCIES) +@GCC_FALSE@ @rm -f flagstest_o_ttext_1$(EXEEXT) +@GCC_FALSE@ $(LINK) $(flagstest_o_ttext_1_OBJECTS) $(flagstest_o_ttext_1_LDADD) $(LIBS) +@NATIVE_LINKER_FALSE@flagstest_o_ttext_1$(EXEEXT): $(flagstest_o_ttext_1_OBJECTS) $(flagstest_o_ttext_1_DEPENDENCIES) +@NATIVE_LINKER_FALSE@ @rm -f flagstest_o_ttext_1$(EXEEXT) +@NATIVE_LINKER_FALSE@ $(LINK) $(flagstest_o_ttext_1_OBJECTS) $(flagstest_o_ttext_1_LDADD) $(LIBS) @GCC_FALSE@icf_virtual_function_folding_test$(EXEEXT): $(icf_virtual_function_folding_test_OBJECTS) $(icf_virtual_function_folding_test_DEPENDENCIES) @GCC_FALSE@ @rm -f icf_virtual_function_folding_test$(EXEEXT) @GCC_FALSE@ $(LINK) $(icf_virtual_function_folding_test_OBJECTS) $(icf_virtual_function_folding_test_LDADD) $(LIBS) @@ -2358,9 +2629,15 @@ ifuncmain1$(EXEEXT): $(ifuncmain1_OBJECTS) $(ifuncmain1_DEPENDENCIES) @GCC_FALSE@ifuncmain1picstatic$(EXEEXT): $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_DEPENDENCIES) @GCC_FALSE@ @rm -f ifuncmain1picstatic$(EXEEXT) @GCC_FALSE@ $(LINK) $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_LDADD) $(LIBS) +@HAVE_STATIC_FALSE@ifuncmain1picstatic$(EXEEXT): $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_DEPENDENCIES) +@HAVE_STATIC_FALSE@ @rm -f ifuncmain1picstatic$(EXEEXT) +@HAVE_STATIC_FALSE@ $(LINK) $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_LDADD) $(LIBS) @IFUNC_FALSE@ifuncmain1picstatic$(EXEEXT): $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_DEPENDENCIES) @IFUNC_FALSE@ @rm -f ifuncmain1picstatic$(EXEEXT) @IFUNC_FALSE@ $(LINK) $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_LDADD) $(LIBS) +@IFUNC_STATIC_FALSE@ifuncmain1picstatic$(EXEEXT): $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_DEPENDENCIES) +@IFUNC_STATIC_FALSE@ @rm -f ifuncmain1picstatic$(EXEEXT) +@IFUNC_STATIC_FALSE@ $(LINK) $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_LDADD) $(LIBS) @NATIVE_LINKER_FALSE@ifuncmain1picstatic$(EXEEXT): $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_DEPENDENCIES) @NATIVE_LINKER_FALSE@ @rm -f ifuncmain1picstatic$(EXEEXT) @NATIVE_LINKER_FALSE@ $(LINK) $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_LDADD) $(LIBS) @@ -2430,9 +2707,15 @@ ifuncmain2$(EXEEXT): $(ifuncmain2_OBJECTS) $(ifuncmain2_DEPENDENCIES) @GCC_FALSE@ifuncmain2picstatic$(EXEEXT): $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_DEPENDENCIES) @GCC_FALSE@ @rm -f ifuncmain2picstatic$(EXEEXT) @GCC_FALSE@ $(LINK) $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_LDADD) $(LIBS) +@HAVE_STATIC_FALSE@ifuncmain2picstatic$(EXEEXT): $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_DEPENDENCIES) +@HAVE_STATIC_FALSE@ @rm -f ifuncmain2picstatic$(EXEEXT) +@HAVE_STATIC_FALSE@ $(LINK) $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_LDADD) $(LIBS) @IFUNC_FALSE@ifuncmain2picstatic$(EXEEXT): $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_DEPENDENCIES) @IFUNC_FALSE@ @rm -f ifuncmain2picstatic$(EXEEXT) @IFUNC_FALSE@ $(LINK) $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_LDADD) $(LIBS) +@IFUNC_STATIC_FALSE@ifuncmain2picstatic$(EXEEXT): $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_DEPENDENCIES) +@IFUNC_STATIC_FALSE@ @rm -f ifuncmain2picstatic$(EXEEXT) +@IFUNC_STATIC_FALSE@ $(LINK) $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_LDADD) $(LIBS) @NATIVE_LINKER_FALSE@ifuncmain2picstatic$(EXEEXT): $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_DEPENDENCIES) @NATIVE_LINKER_FALSE@ @rm -f ifuncmain2picstatic$(EXEEXT) @NATIVE_LINKER_FALSE@ $(LINK) $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_LDADD) $(LIBS) @@ -2448,9 +2731,15 @@ ifuncmain4$(EXEEXT): $(ifuncmain4_OBJECTS) $(ifuncmain4_DEPENDENCIES) @GCC_FALSE@ifuncmain4picstatic$(EXEEXT): $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_DEPENDENCIES) @GCC_FALSE@ @rm -f ifuncmain4picstatic$(EXEEXT) @GCC_FALSE@ $(LINK) $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_LDADD) $(LIBS) +@HAVE_STATIC_FALSE@ifuncmain4picstatic$(EXEEXT): $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_DEPENDENCIES) +@HAVE_STATIC_FALSE@ @rm -f ifuncmain4picstatic$(EXEEXT) +@HAVE_STATIC_FALSE@ $(LINK) $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_LDADD) $(LIBS) @IFUNC_FALSE@ifuncmain4picstatic$(EXEEXT): $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_DEPENDENCIES) @IFUNC_FALSE@ @rm -f ifuncmain4picstatic$(EXEEXT) @IFUNC_FALSE@ $(LINK) $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_LDADD) $(LIBS) +@IFUNC_STATIC_FALSE@ifuncmain4picstatic$(EXEEXT): $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_DEPENDENCIES) +@IFUNC_STATIC_FALSE@ @rm -f ifuncmain4picstatic$(EXEEXT) +@IFUNC_STATIC_FALSE@ $(LINK) $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_LDADD) $(LIBS) @NATIVE_LINKER_FALSE@ifuncmain4picstatic$(EXEEXT): $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_DEPENDENCIES) @NATIVE_LINKER_FALSE@ @rm -f ifuncmain4picstatic$(EXEEXT) @NATIVE_LINKER_FALSE@ $(LINK) $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_LDADD) $(LIBS) @@ -2472,9 +2761,15 @@ ifuncmain5$(EXEEXT): $(ifuncmain5_OBJECTS) $(ifuncmain5_DEPENDENCIES) @GCC_FALSE@ifuncmain5picstatic$(EXEEXT): $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_DEPENDENCIES) @GCC_FALSE@ @rm -f ifuncmain5picstatic$(EXEEXT) @GCC_FALSE@ $(LINK) $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_LDADD) $(LIBS) +@HAVE_STATIC_FALSE@ifuncmain5picstatic$(EXEEXT): $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_DEPENDENCIES) +@HAVE_STATIC_FALSE@ @rm -f ifuncmain5picstatic$(EXEEXT) +@HAVE_STATIC_FALSE@ $(LINK) $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_LDADD) $(LIBS) @IFUNC_FALSE@ifuncmain5picstatic$(EXEEXT): $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_DEPENDENCIES) @IFUNC_FALSE@ @rm -f ifuncmain5picstatic$(EXEEXT) @IFUNC_FALSE@ $(LINK) $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_LDADD) $(LIBS) +@IFUNC_STATIC_FALSE@ifuncmain5picstatic$(EXEEXT): $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_DEPENDENCIES) +@IFUNC_STATIC_FALSE@ @rm -f ifuncmain5picstatic$(EXEEXT) +@IFUNC_STATIC_FALSE@ $(LINK) $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_LDADD) $(LIBS) @NATIVE_LINKER_FALSE@ifuncmain5picstatic$(EXEEXT): $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_DEPENDENCIES) @NATIVE_LINKER_FALSE@ @rm -f ifuncmain5picstatic$(EXEEXT) @NATIVE_LINKER_FALSE@ $(LINK) $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_LDADD) $(LIBS) @@ -2523,9 +2818,15 @@ ifuncmain7$(EXEEXT): $(ifuncmain7_OBJECTS) $(ifuncmain7_DEPENDENCIES) @GCC_FALSE@ifuncmain7picstatic$(EXEEXT): $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_DEPENDENCIES) @GCC_FALSE@ @rm -f ifuncmain7picstatic$(EXEEXT) @GCC_FALSE@ $(LINK) $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_LDADD) $(LIBS) +@HAVE_STATIC_FALSE@ifuncmain7picstatic$(EXEEXT): $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_DEPENDENCIES) +@HAVE_STATIC_FALSE@ @rm -f ifuncmain7picstatic$(EXEEXT) +@HAVE_STATIC_FALSE@ $(LINK) $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_LDADD) $(LIBS) @IFUNC_FALSE@ifuncmain7picstatic$(EXEEXT): $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_DEPENDENCIES) @IFUNC_FALSE@ @rm -f ifuncmain7picstatic$(EXEEXT) @IFUNC_FALSE@ $(LINK) $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_LDADD) $(LIBS) +@IFUNC_STATIC_FALSE@ifuncmain7picstatic$(EXEEXT): $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_DEPENDENCIES) +@IFUNC_STATIC_FALSE@ @rm -f ifuncmain7picstatic$(EXEEXT) +@IFUNC_STATIC_FALSE@ $(LINK) $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_LDADD) $(LIBS) @NATIVE_LINKER_FALSE@ifuncmain7picstatic$(EXEEXT): $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_DEPENDENCIES) @NATIVE_LINKER_FALSE@ @rm -f ifuncmain7picstatic$(EXEEXT) @NATIVE_LINKER_FALSE@ $(LINK) $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_LDADD) $(LIBS) @@ -2541,12 +2842,99 @@ ifuncmain7$(EXEEXT): $(ifuncmain7_OBJECTS) $(ifuncmain7_DEPENDENCIES) ifuncmain7static$(EXEEXT): $(ifuncmain7static_OBJECTS) $(ifuncmain7static_DEPENDENCIES) @rm -f ifuncmain7static$(EXEEXT) $(ifuncmain7static_LINK) $(ifuncmain7static_OBJECTS) $(ifuncmain7static_LDADD) $(LIBS) +ifuncvar$(EXEEXT): $(ifuncvar_OBJECTS) $(ifuncvar_DEPENDENCIES) + @rm -f ifuncvar$(EXEEXT) + $(ifuncvar_LINK) $(ifuncvar_OBJECTS) $(ifuncvar_LDADD) $(LIBS) +@DEFAULT_TARGET_X86_64_FALSE@incremental_comdat_test_1$(EXEEXT): $(incremental_comdat_test_1_OBJECTS) $(incremental_comdat_test_1_DEPENDENCIES) +@DEFAULT_TARGET_X86_64_FALSE@ @rm -f incremental_comdat_test_1$(EXEEXT) +@DEFAULT_TARGET_X86_64_FALSE@ $(LINK) $(incremental_comdat_test_1_OBJECTS) $(incremental_comdat_test_1_LDADD) $(LIBS) +@GCC_FALSE@incremental_comdat_test_1$(EXEEXT): $(incremental_comdat_test_1_OBJECTS) $(incremental_comdat_test_1_DEPENDENCIES) +@GCC_FALSE@ @rm -f incremental_comdat_test_1$(EXEEXT) +@GCC_FALSE@ $(LINK) $(incremental_comdat_test_1_OBJECTS) $(incremental_comdat_test_1_LDADD) $(LIBS) +@NATIVE_LINKER_FALSE@incremental_comdat_test_1$(EXEEXT): $(incremental_comdat_test_1_OBJECTS) $(incremental_comdat_test_1_DEPENDENCIES) +@NATIVE_LINKER_FALSE@ @rm -f incremental_comdat_test_1$(EXEEXT) +@NATIVE_LINKER_FALSE@ $(LINK) $(incremental_comdat_test_1_OBJECTS) $(incremental_comdat_test_1_LDADD) $(LIBS) +@DEFAULT_TARGET_X86_64_FALSE@incremental_common_test_1$(EXEEXT): $(incremental_common_test_1_OBJECTS) $(incremental_common_test_1_DEPENDENCIES) +@DEFAULT_TARGET_X86_64_FALSE@ @rm -f incremental_common_test_1$(EXEEXT) +@DEFAULT_TARGET_X86_64_FALSE@ $(LINK) $(incremental_common_test_1_OBJECTS) $(incremental_common_test_1_LDADD) $(LIBS) +@GCC_FALSE@incremental_common_test_1$(EXEEXT): $(incremental_common_test_1_OBJECTS) $(incremental_common_test_1_DEPENDENCIES) +@GCC_FALSE@ @rm -f incremental_common_test_1$(EXEEXT) +@GCC_FALSE@ $(LINK) $(incremental_common_test_1_OBJECTS) $(incremental_common_test_1_LDADD) $(LIBS) +@NATIVE_LINKER_FALSE@incremental_common_test_1$(EXEEXT): $(incremental_common_test_1_OBJECTS) $(incremental_common_test_1_DEPENDENCIES) +@NATIVE_LINKER_FALSE@ @rm -f incremental_common_test_1$(EXEEXT) +@NATIVE_LINKER_FALSE@ $(LINK) $(incremental_common_test_1_OBJECTS) $(incremental_common_test_1_LDADD) $(LIBS) +@DEFAULT_TARGET_X86_64_FALSE@incremental_copy_test$(EXEEXT): $(incremental_copy_test_OBJECTS) $(incremental_copy_test_DEPENDENCIES) +@DEFAULT_TARGET_X86_64_FALSE@ @rm -f incremental_copy_test$(EXEEXT) +@DEFAULT_TARGET_X86_64_FALSE@ $(LINK) $(incremental_copy_test_OBJECTS) $(incremental_copy_test_LDADD) $(LIBS) +@GCC_FALSE@incremental_copy_test$(EXEEXT): $(incremental_copy_test_OBJECTS) $(incremental_copy_test_DEPENDENCIES) +@GCC_FALSE@ @rm -f incremental_copy_test$(EXEEXT) +@GCC_FALSE@ $(LINK) $(incremental_copy_test_OBJECTS) $(incremental_copy_test_LDADD) $(LIBS) +@NATIVE_LINKER_FALSE@incremental_copy_test$(EXEEXT): $(incremental_copy_test_OBJECTS) $(incremental_copy_test_DEPENDENCIES) +@NATIVE_LINKER_FALSE@ @rm -f incremental_copy_test$(EXEEXT) +@NATIVE_LINKER_FALSE@ $(LINK) $(incremental_copy_test_OBJECTS) $(incremental_copy_test_LDADD) $(LIBS) +@DEFAULT_TARGET_X86_64_FALSE@incremental_test_2$(EXEEXT): $(incremental_test_2_OBJECTS) $(incremental_test_2_DEPENDENCIES) +@DEFAULT_TARGET_X86_64_FALSE@ @rm -f incremental_test_2$(EXEEXT) +@DEFAULT_TARGET_X86_64_FALSE@ $(LINK) $(incremental_test_2_OBJECTS) $(incremental_test_2_LDADD) $(LIBS) +@GCC_FALSE@incremental_test_2$(EXEEXT): $(incremental_test_2_OBJECTS) $(incremental_test_2_DEPENDENCIES) +@GCC_FALSE@ @rm -f incremental_test_2$(EXEEXT) +@GCC_FALSE@ $(LINK) $(incremental_test_2_OBJECTS) $(incremental_test_2_LDADD) $(LIBS) +@NATIVE_LINKER_FALSE@incremental_test_2$(EXEEXT): $(incremental_test_2_OBJECTS) $(incremental_test_2_DEPENDENCIES) +@NATIVE_LINKER_FALSE@ @rm -f incremental_test_2$(EXEEXT) +@NATIVE_LINKER_FALSE@ $(LINK) $(incremental_test_2_OBJECTS) $(incremental_test_2_LDADD) $(LIBS) +@DEFAULT_TARGET_X86_64_FALSE@incremental_test_3$(EXEEXT): $(incremental_test_3_OBJECTS) $(incremental_test_3_DEPENDENCIES) +@DEFAULT_TARGET_X86_64_FALSE@ @rm -f incremental_test_3$(EXEEXT) +@DEFAULT_TARGET_X86_64_FALSE@ $(LINK) $(incremental_test_3_OBJECTS) $(incremental_test_3_LDADD) $(LIBS) +@GCC_FALSE@incremental_test_3$(EXEEXT): $(incremental_test_3_OBJECTS) $(incremental_test_3_DEPENDENCIES) +@GCC_FALSE@ @rm -f incremental_test_3$(EXEEXT) +@GCC_FALSE@ $(LINK) $(incremental_test_3_OBJECTS) $(incremental_test_3_LDADD) $(LIBS) +@NATIVE_LINKER_FALSE@incremental_test_3$(EXEEXT): $(incremental_test_3_OBJECTS) $(incremental_test_3_DEPENDENCIES) +@NATIVE_LINKER_FALSE@ @rm -f incremental_test_3$(EXEEXT) +@NATIVE_LINKER_FALSE@ $(LINK) $(incremental_test_3_OBJECTS) $(incremental_test_3_LDADD) $(LIBS) +@DEFAULT_TARGET_X86_64_FALSE@incremental_test_4$(EXEEXT): $(incremental_test_4_OBJECTS) $(incremental_test_4_DEPENDENCIES) +@DEFAULT_TARGET_X86_64_FALSE@ @rm -f incremental_test_4$(EXEEXT) +@DEFAULT_TARGET_X86_64_FALSE@ $(LINK) $(incremental_test_4_OBJECTS) $(incremental_test_4_LDADD) $(LIBS) +@GCC_FALSE@incremental_test_4$(EXEEXT): $(incremental_test_4_OBJECTS) $(incremental_test_4_DEPENDENCIES) +@GCC_FALSE@ @rm -f incremental_test_4$(EXEEXT) +@GCC_FALSE@ $(LINK) $(incremental_test_4_OBJECTS) $(incremental_test_4_LDADD) $(LIBS) +@NATIVE_LINKER_FALSE@incremental_test_4$(EXEEXT): $(incremental_test_4_OBJECTS) $(incremental_test_4_DEPENDENCIES) +@NATIVE_LINKER_FALSE@ @rm -f incremental_test_4$(EXEEXT) +@NATIVE_LINKER_FALSE@ $(LINK) $(incremental_test_4_OBJECTS) $(incremental_test_4_LDADD) $(LIBS) +@DEFAULT_TARGET_X86_64_FALSE@incremental_test_5$(EXEEXT): $(incremental_test_5_OBJECTS) $(incremental_test_5_DEPENDENCIES) +@DEFAULT_TARGET_X86_64_FALSE@ @rm -f incremental_test_5$(EXEEXT) +@DEFAULT_TARGET_X86_64_FALSE@ $(LINK) $(incremental_test_5_OBJECTS) $(incremental_test_5_LDADD) $(LIBS) +@GCC_FALSE@incremental_test_5$(EXEEXT): $(incremental_test_5_OBJECTS) $(incremental_test_5_DEPENDENCIES) +@GCC_FALSE@ @rm -f incremental_test_5$(EXEEXT) +@GCC_FALSE@ $(LINK) $(incremental_test_5_OBJECTS) $(incremental_test_5_LDADD) $(LIBS) +@NATIVE_LINKER_FALSE@incremental_test_5$(EXEEXT): $(incremental_test_5_OBJECTS) $(incremental_test_5_DEPENDENCIES) +@NATIVE_LINKER_FALSE@ @rm -f incremental_test_5$(EXEEXT) +@NATIVE_LINKER_FALSE@ $(LINK) $(incremental_test_5_OBJECTS) $(incremental_test_5_LDADD) $(LIBS) +@DEFAULT_TARGET_X86_64_FALSE@incremental_test_6$(EXEEXT): $(incremental_test_6_OBJECTS) $(incremental_test_6_DEPENDENCIES) +@DEFAULT_TARGET_X86_64_FALSE@ @rm -f incremental_test_6$(EXEEXT) +@DEFAULT_TARGET_X86_64_FALSE@ $(LINK) $(incremental_test_6_OBJECTS) $(incremental_test_6_LDADD) $(LIBS) +@GCC_FALSE@incremental_test_6$(EXEEXT): $(incremental_test_6_OBJECTS) $(incremental_test_6_DEPENDENCIES) +@GCC_FALSE@ @rm -f incremental_test_6$(EXEEXT) +@GCC_FALSE@ $(LINK) $(incremental_test_6_OBJECTS) $(incremental_test_6_LDADD) $(LIBS) +@NATIVE_LINKER_FALSE@incremental_test_6$(EXEEXT): $(incremental_test_6_OBJECTS) $(incremental_test_6_DEPENDENCIES) +@NATIVE_LINKER_FALSE@ @rm -f incremental_test_6$(EXEEXT) +@NATIVE_LINKER_FALSE@ $(LINK) $(incremental_test_6_OBJECTS) $(incremental_test_6_LDADD) $(LIBS) initpri1$(EXEEXT): $(initpri1_OBJECTS) $(initpri1_DEPENDENCIES) @rm -f initpri1$(EXEEXT) $(initpri1_LINK) $(initpri1_OBJECTS) $(initpri1_LDADD) $(LIBS) +initpri2$(EXEEXT): $(initpri2_OBJECTS) $(initpri2_DEPENDENCIES) + @rm -f initpri2$(EXEEXT) + $(initpri2_LINK) $(initpri2_OBJECTS) $(initpri2_LDADD) $(LIBS) +initpri3a$(EXEEXT): $(initpri3a_OBJECTS) $(initpri3a_DEPENDENCIES) + @rm -f initpri3a$(EXEEXT) + $(initpri3a_LINK) $(initpri3a_OBJECTS) $(initpri3a_LDADD) $(LIBS) +initpri3b$(EXEEXT): $(initpri3b_OBJECTS) $(initpri3b_DEPENDENCIES) + @rm -f initpri3b$(EXEEXT) + $(initpri3b_LINK) $(initpri3b_OBJECTS) $(initpri3b_LDADD) $(LIBS) justsyms$(EXEEXT): $(justsyms_OBJECTS) $(justsyms_DEPENDENCIES) @rm -f justsyms$(EXEEXT) $(justsyms_LINK) $(justsyms_OBJECTS) $(justsyms_LDADD) $(LIBS) +justsyms_exec$(EXEEXT): $(justsyms_exec_OBJECTS) $(justsyms_exec_DEPENDENCIES) + @rm -f justsyms_exec$(EXEEXT) + $(justsyms_exec_LINK) $(justsyms_exec_OBJECTS) $(justsyms_exec_LDADD) $(LIBS) large$(EXEEXT): $(large_OBJECTS) $(large_DEPENDENCIES) @rm -f large$(EXEEXT) $(large_LINK) $(large_OBJECTS) $(large_LDADD) $(LIBS) @@ -2652,6 +3040,9 @@ protected_1$(EXEEXT): $(protected_1_OBJECTS) $(protected_1_DEPENDENCIES) protected_2$(EXEEXT): $(protected_2_OBJECTS) $(protected_2_DEPENDENCIES) @rm -f protected_2$(EXEEXT) $(protected_2_LINK) $(protected_2_OBJECTS) $(protected_2_LDADD) $(LIBS) +relro_now_test$(EXEEXT): $(relro_now_test_OBJECTS) $(relro_now_test_DEPENDENCIES) + @rm -f relro_now_test$(EXEEXT) + $(relro_now_test_LINK) $(relro_now_test_OBJECTS) $(relro_now_test_LDADD) $(LIBS) relro_script_test$(EXEEXT): $(relro_script_test_OBJECTS) $(relro_script_test_DEPENDENCIES) @rm -f relro_script_test$(EXEEXT) $(relro_script_test_LINK) $(relro_script_test_OBJECTS) $(relro_script_test_LDADD) $(LIBS) @@ -2826,6 +3217,9 @@ ver_test$(EXEEXT): $(ver_test_OBJECTS) $(ver_test_DEPENDENCIES) ver_test_11$(EXEEXT): $(ver_test_11_OBJECTS) $(ver_test_11_DEPENDENCIES) @rm -f ver_test_11$(EXEEXT) $(ver_test_11_LINK) $(ver_test_11_OBJECTS) $(ver_test_11_LDADD) $(LIBS) +ver_test_12$(EXEEXT): $(ver_test_12_OBJECTS) $(ver_test_12_DEPENDENCIES) + @rm -f ver_test_12$(EXEEXT) + $(ver_test_12_LINK) $(ver_test_12_OBJECTS) $(ver_test_12_LDADD) $(LIBS) ver_test_2$(EXEEXT): $(ver_test_2_OBJECTS) $(ver_test_2_DEPENDENCIES) @rm -f ver_test_2$(EXEEXT) $(ver_test_2_LINK) $(ver_test_2_OBJECTS) $(ver_test_2_LDADD) $(LIBS) @@ -2881,6 +3275,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/flagstest_compress_debug_sections.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/flagstest_o_specialfile.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/flagstest_o_specialfile_and_compress_debug_sections.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/flagstest_o_ttext_1.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/icf_virtual_function_folding_test.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ifuncdep2.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ifuncmain1.Po@am__quote@ @@ -2908,8 +3303,20 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ifuncmain7pic.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ifuncmain7picstatic.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ifuncmain7pie.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ifuncvar3.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/incremental_comdat_test_1.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/incremental_common_test_1.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/incremental_copy_test.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/incremental_test_2.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/incremental_test_3.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/incremental_test_4.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/incremental_test_5.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/incremental_test_6.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/initpri1.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/initpri2.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/initpri3.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/justsyms_1.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/justsyms_exec.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/large-large.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/local_labels_test.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/many_sections_r_test.Po@am__quote@ @@ -3314,8 +3721,24 @@ arm_fix_v4bx.sh.log: arm_fix_v4bx.sh @p='arm_fix_v4bx.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) arm_attr_merge.sh.log: arm_attr_merge.sh @p='arm_attr_merge.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +arm_fix_1176.sh.log: arm_fix_1176.sh + @p='arm_fix_1176.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) arm_cortex_a8.sh.log: arm_cortex_a8.sh @p='arm_cortex_a8.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +arm_exidx_test.sh.log: arm_exidx_test.sh + @p='arm_exidx_test.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +pr12826.sh.log: pr12826.sh + @p='pr12826.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +arm_unaligned_reloc.sh.log: arm_unaligned_reloc.sh + @p='arm_unaligned_reloc.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +arm_farcall_arm_arm.sh.log: arm_farcall_arm_arm.sh + @p='arm_farcall_arm_arm.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +arm_farcall_arm_thumb.sh.log: arm_farcall_arm_thumb.sh + @p='arm_farcall_arm_thumb.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +arm_farcall_thumb_thumb.sh.log: arm_farcall_thumb_thumb.sh + @p='arm_farcall_thumb_thumb.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +arm_farcall_thumb_arm.sh.log: arm_farcall_thumb_arm.sh + @p='arm_farcall_thumb_arm.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) object_unittest.log: object_unittest$(EXEEXT) @p='object_unittest$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) binary_unittest.log: binary_unittest$(EXEEXT) @@ -3324,10 +3747,10 @@ icf_virtual_function_folding_test.log: icf_virtual_function_folding_test$(EXEEXT @p='icf_virtual_function_folding_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) basic_test.log: basic_test$(EXEEXT) @p='basic_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) -basic_static_test.log: basic_static_test$(EXEEXT) - @p='basic_static_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) basic_pic_test.log: basic_pic_test$(EXEEXT) @p='basic_pic_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +basic_static_test.log: basic_static_test$(EXEEXT) + @p='basic_static_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) basic_static_pic_test.log: basic_static_pic_test$(EXEEXT) @p='basic_static_pic_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) basic_pie_test.log: basic_pie_test$(EXEEXT) @@ -3338,10 +3761,10 @@ constructor_static_test.log: constructor_static_test$(EXEEXT) @p='constructor_static_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) two_file_test.log: two_file_test$(EXEEXT) @p='two_file_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) -two_file_static_test.log: two_file_static_test$(EXEEXT) - @p='two_file_static_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) two_file_pic_test.log: two_file_pic_test$(EXEEXT) @p='two_file_pic_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +two_file_static_test.log: two_file_static_test$(EXEEXT) + @p='two_file_static_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) two_file_shared_1_test.log: two_file_shared_1_test$(EXEEXT) @p='two_file_shared_1_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) two_file_shared_2_test.log: two_file_shared_2_test$(EXEEXT) @@ -3386,8 +3809,6 @@ common_test_2.log: common_test_2$(EXEEXT) @p='common_test_2$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) exception_test.log: exception_test$(EXEEXT) @p='exception_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) -exception_static_test.log: exception_static_test$(EXEEXT) - @p='exception_static_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) exception_shared_1_test.log: exception_shared_1_test$(EXEEXT) @p='exception_shared_1_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) exception_shared_2_test.log: exception_shared_2_test$(EXEEXT) @@ -3398,6 +3819,8 @@ exception_separate_shared_12_test.log: exception_separate_shared_12_test$(EXEEXT @p='exception_separate_shared_12_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) exception_separate_shared_21_test.log: exception_separate_shared_21_test$(EXEEXT) @p='exception_separate_shared_21_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +exception_static_test.log: exception_static_test$(EXEEXT) + @p='exception_static_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) weak_test.log: weak_test$(EXEEXT) @p='weak_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) weak_undef_test.log: weak_undef_test$(EXEEXT) @@ -3440,12 +3863,20 @@ many_sections_r_test.log: many_sections_r_test$(EXEEXT) @p='many_sections_r_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) initpri1.log: initpri1$(EXEEXT) @p='initpri1$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +initpri2.log: initpri2$(EXEEXT) + @p='initpri2$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +initpri3a.log: initpri3a$(EXEEXT) + @p='initpri3a$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +initpri3b.log: initpri3b$(EXEEXT) + @p='initpri3b$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) flagstest_o_specialfile.log: flagstest_o_specialfile$(EXEEXT) @p='flagstest_o_specialfile$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) flagstest_compress_debug_sections.log: flagstest_compress_debug_sections$(EXEEXT) @p='flagstest_compress_debug_sections$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) flagstest_o_specialfile_and_compress_debug_sections.log: flagstest_o_specialfile_and_compress_debug_sections$(EXEEXT) @p='flagstest_o_specialfile_and_compress_debug_sections$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +flagstest_o_ttext_1.log: flagstest_o_ttext_1$(EXEEXT) + @p='flagstest_o_ttext_1$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) ver_test.log: ver_test$(EXEEXT) @p='ver_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) ver_test_2.log: ver_test_2$(EXEEXT) @@ -3458,12 +3889,16 @@ ver_test_9.log: ver_test_9$(EXEEXT) @p='ver_test_9$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) ver_test_11.log: ver_test_11$(EXEEXT) @p='ver_test_11$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +ver_test_12.log: ver_test_12$(EXEEXT) + @p='ver_test_12$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) protected_1.log: protected_1$(EXEEXT) @p='protected_1$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) protected_2.log: protected_2$(EXEEXT) @p='protected_2$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) relro_test.log: relro_test$(EXEEXT) @p='relro_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +relro_now_test.log: relro_now_test$(EXEEXT) + @p='relro_now_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) relro_strip_test.log: relro_strip_test$(EXEEXT) @p='relro_strip_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) relro_script_test.log: relro_script_test$(EXEEXT) @@ -3474,6 +3909,8 @@ script_test_2.log: script_test_2$(EXEEXT) @p='script_test_2$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) justsyms.log: justsyms$(EXEEXT) @p='justsyms$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +justsyms_exec.log: justsyms_exec$(EXEEXT) + @p='justsyms_exec$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) binary_test.log: binary_test$(EXEEXT) @p='binary_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) script_test_3.log: script_test_3$(EXEEXT) @@ -3574,8 +4011,26 @@ ifuncmain7pic.log: ifuncmain7pic$(EXEEXT) @p='ifuncmain7pic$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) ifuncmain7pie.log: ifuncmain7pie$(EXEEXT) @p='ifuncmain7pie$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +ifuncvar.log: ifuncvar$(EXEEXT) + @p='ifuncvar$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) start_lib_test.log: start_lib_test$(EXEEXT) @p='start_lib_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +incremental_test_2.log: incremental_test_2$(EXEEXT) + @p='incremental_test_2$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +incremental_test_3.log: incremental_test_3$(EXEEXT) + @p='incremental_test_3$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +incremental_test_4.log: incremental_test_4$(EXEEXT) + @p='incremental_test_4$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +incremental_test_5.log: incremental_test_5$(EXEEXT) + @p='incremental_test_5$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +incremental_test_6.log: incremental_test_6$(EXEEXT) + @p='incremental_test_6$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +incremental_copy_test.log: incremental_copy_test$(EXEEXT) + @p='incremental_copy_test$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +incremental_common_test_1.log: incremental_common_test_1$(EXEEXT) + @p='incremental_common_test_1$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) +incremental_comdat_test_1.log: incremental_comdat_test_1$(EXEEXT) + @p='incremental_comdat_test_1$(EXEEXT)'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post) .test.log: @p='$<'; $(am__check_pre) $(TEST_LOG_COMPILE) "$$tst" $(am__check_post) @am__EXEEXT_TRUE@.test$(EXEEXT).log: @@ -3716,6 +4171,12 @@ uninstall-am: @GCC_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ rm -f gcctestdir/ld @GCC_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ (cd gcctestdir && $(LN_S) ../../ld-new ld) +# Some tests require the latest features of an in-tree assembler. +@GCC_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@gcctestdir/as: $(TEST_AS) +@GCC_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ test -d gcctestdir || mkdir -p gcctestdir +@GCC_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ rm -f gcctestdir/as +@GCC_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ (cd gcctestdir && $(LN_S) $(abs_top_builddir)/../gas/as-new as) + # --------------------------------------------------------------------- # These tests test the output of gold (end-to-end tests). In # particular, they make sure that gold can link "difficult" object @@ -3825,15 +4286,15 @@ uninstall-am: @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -O0 -c -o $@ $< @GCC_TRUE@@NATIVE_LINKER_TRUE@basic_test: basic_test.o gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ basic_test.o -@GCC_TRUE@@NATIVE_LINKER_TRUE@basic_static_test: basic_test.o gcctestdir/ld -@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -static basic_test.o +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@basic_static_test: basic_test.o gcctestdir/ld +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -static basic_test.o @GCC_TRUE@@NATIVE_LINKER_TRUE@basic_pic_test.o: basic_test.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -O0 -c -fpic -o $@ $< @GCC_TRUE@@NATIVE_LINKER_TRUE@basic_pic_test: basic_pic_test.o gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ basic_pic_test.o -@GCC_TRUE@@NATIVE_LINKER_TRUE@basic_static_pic_test: basic_pic_test.o gcctestdir/ld -@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -static basic_pic_test.o +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@basic_static_pic_test: basic_pic_test.o gcctestdir/ld +@GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -static basic_pic_test.o @GCC_TRUE@@NATIVE_LINKER_TRUE@basic_pie_test.o: basic_test.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -O0 -c -fpie -o $@ $< @GCC_TRUE@@NATIVE_LINKER_TRUE@basic_pie_test: basic_pie_test.o gcctestdir/ld @@ -3866,15 +4327,15 @@ uninstall-am: @GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_shared.dbg: two_file_shared.so @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_READELF) -w $< >$@ 2>/dev/null @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_shared_1_nonpic.so: two_file_test_1.o gcctestdir/ld -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b.o +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b.o -Wl,-z,notext @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_shared_2_nonpic.so: two_file_test_2.o gcctestdir/ld @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared two_file_test_2.o @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_shared_nonpic.so: two_file_test_1.o two_file_test_1b.o two_file_test_2.o gcctestdir/ld -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b.o two_file_test_2.o +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b.o two_file_test_2.o -Wl,-z,notext @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_shared_mixed.so: two_file_test_1_pic.o two_file_test_1b_pic.o two_file_test_2.o gcctestdir/ld -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1_pic.o two_file_test_1b_pic.o two_file_test_2.o +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1_pic.o two_file_test_1b_pic.o two_file_test_2.o -Wl,-z,notext @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_shared_mixed_1.so: two_file_test_1.o two_file_test_1b_pic.o two_file_shared_2.so gcctestdir/ld -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b_pic.o two_file_shared_2.so +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared two_file_test_1.o two_file_test_1b_pic.o two_file_shared_2.so -Wl,-z,notext @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_mixed_pie_test: two_file_test_1.o two_file_test_1b_pie.o \ @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_main_pie.o two_file_shared_2.so gcctestdir/ld @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -Wl,-R,. -pie two_file_test_1.o two_file_test_1b_pie.o two_file_test_main_pie.o two_file_shared_2.so @@ -3914,10 +4375,10 @@ uninstall-am: @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_file2_nonpic.o: weak_undef_file2.cc @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -c -o $@ $< @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_lib_nonpic.so: weak_undef_file1_nonpic.o -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared weak_undef_file1_nonpic.o +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared weak_undef_file1_nonpic.o -Wl,-z,notext @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@alt/weak_undef_lib_nonpic.so: weak_undef_file2_nonpic.o @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ test -d alt || mkdir -p alt -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared weak_undef_file2_nonpic.o +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared weak_undef_file2_nonpic.o -Wl,-z,notext @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_alias_test_1_pic.o: weak_alias_test_1.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -c -fpic -o $@ $< @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_alias_test_1.so: weak_alias_test_1_pic.o gcctestdir/ld @@ -3932,6 +4393,11 @@ uninstall-am: @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -c -fpic -o $@ $< @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_alias_test_4.so: weak_alias_test_4_pic.o gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared weak_alias_test_4_pic.o +@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_alias_test_5_pic.o: weak_alias_test_5.cc +@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -c -fpic -o $@ $< +@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_alias_test_5.so: weak_alias_test_5_pic.o $(srcdir)/weak_alias_test.script gcctestdir/ld +@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared weak_alias_test_5_pic.o \ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ -Wl,--version-script,$(srcdir)/weak_alias_test.script @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_plt_main_pic.o: weak_plt_main.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -c -fpic -o $@ $< @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_plt: weak_plt_main_pic.o gcctestdir/ld @@ -3998,7 +4464,7 @@ uninstall-am: @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_DESCRIPTORS_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@tls_test_gnu2_shared.so: tls_test_gnu2.o tls_test_file2_gnu2.o tls_test_c_gnu2.o gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_DESCRIPTORS_TRUE@@TLS_GNU2_DIALECT_TRUE@@TLS_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared tls_test_gnu2.o tls_test_file2_gnu2.o tls_test_c_gnu2.o @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@tls_test_shared_nonpic.so: tls_test.o tls_test_file2.o tls_test_c.o gcctestdir/ld -@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared tls_test.o tls_test_file2.o tls_test_c.o +@FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@@TLS_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared tls_test.o tls_test_file2.o tls_test_c.o -Wl,-z,notext @GCC_TRUE@@NATIVE_LINKER_TRUE@many_sections_define.h: @GCC_TRUE@@NATIVE_LINKER_TRUE@ (for i in `seq 1 70000`; do \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ echo "int var_$$i __attribute__((section(\"section_$$i\"))) = $$i;"; \ @@ -4029,6 +4495,20 @@ uninstall-am: @GCC_TRUE@@NATIVE_LINKER_TRUE@ rm -f $@; \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ exit 1; \ @GCC_TRUE@@NATIVE_LINKER_TRUE@ fi +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@debug_msg_cdebug.o: debug_msg.cc gcctestdir/as +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -Bgcctestdir/ -O0 -g -Wa,--compress-debug-sections -c -w -o $@ $(srcdir)/debug_msg.cc +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@odr_violation1_cdebug.o: odr_violation1.cc gcctestdir/as +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -Bgcctestdir/ -O0 -g -Wa,--compress-debug-sections -c -w -o $@ $(srcdir)/odr_violation1.cc +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@odr_violation2_cdebug.o: odr_violation2.cc gcctestdir/as +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -Bgcctestdir/ -O2 -g -Wa,--compress-debug-sections -c -w -o $@ $(srcdir)/odr_violation2.cc +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@debug_msg_cdebug.err: debug_msg_cdebug.o odr_violation1_cdebug.o odr_violation2_cdebug.o gcctestdir/ld +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ @echo $(CXXLINK) -Bgcctestdir/ -Wl,--detect-odr-violations -o debug_msg_cdebug debug_msg_cdebug.o odr_violation1_cdebug.o odr_violation2_cdebug.o "2>$@" +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ @if $(CXXLINK) -Bgcctestdir/ -Wl,--detect-odr-violations -o debug_msg_cdebug debug_msg_cdebug.o odr_violation1_cdebug.o odr_violation2_cdebug.o 2>$@; \ +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ then \ +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ echo 1>&2 "Link of debug_msg_cdebug should have failed"; \ +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ rm -f $@; \ +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ exit 1; \ +@GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ fi @GCC_TRUE@@NATIVE_LINKER_TRUE@debug_msg.so: debug_msg.cc gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -Bgcctestdir/ -O0 -g -shared -fPIC -w -o $@ $(srcdir)/debug_msg.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@odr_violation1.so: odr_violation1.cc gcctestdir/ld @@ -4081,10 +4561,14 @@ uninstall-am: @GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -o /dev/stdout $< -Wl,--compress-debug-sections=zlib 2>&1 | cat > $@ @GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ chmod a+x $@ @GCC_TRUE@@HAVE_ZLIB_TRUE@@NATIVE_LINKER_TRUE@ test -s $@ +@GCC_TRUE@@NATIVE_LINKER_TRUE@flagstest_o_ttext_1: flagstest_debug.o gcctestdir/ld +@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -o $@ $< -Wl,-Ttext,0x400000 -Wl,-Tdata,0x800000 +@GCC_TRUE@@NATIVE_LINKER_TRUE@flagstest_o_ttext_2: flagstest_debug.o gcctestdir/ld +@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -o $@ $< -Wl,-Ttext,0x400010 -Wl,-Tdata,0x800010 @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_1.so: ver_test_1.o ver_test_2.so ver_test_3.o ver_test_4.so gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared ver_test_1.o ver_test_2.so ver_test_3.o ver_test_4.so @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_2.so: ver_test_2.o $(srcdir)/ver_test_2.script ver_test_4.so gcctestdir/ld -@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared -Wl,--version-script,$(srcdir)/ver_test_2.script ver_test_2.o ver_test_4.so +@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared -Wl,--version-script,$(srcdir)/ver_test_2.script -Wl,-R,. ver_test_2.o ver_test_4.so @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_4.so: ver_test_4.o $(srcdir)/ver_test_4.script gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared -Wl,--version-script,$(srcdir)/ver_test_4.script ver_test_4.o @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_1.o: ver_test_1.cc @@ -4120,7 +4604,7 @@ uninstall-am: @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_8_2.so: two_file_test_2_pic.o $(srcdir)/ver_test_8.script gcctestdir/ld @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared -Wl,--version-script,$(srcdir)/ver_test_8.script two_file_test_2_pic.o @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_9.so: ver_test_9.o ver_test_4.so ver_test_5.so gcctestdir/ld -@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared ver_test_9.o ver_test_5.so ver_test_4.so +@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared -Wl,-R,. ver_test_9.o ver_test_5.so ver_test_4.so @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_9.o: ver_test_9.cc @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -c -fpic -o $@ $< @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_10.syms: ver_test_10.so @@ -4129,6 +4613,8 @@ uninstall-am: @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared -Wl,--version-script,$(srcdir)/ver_test_10.script ver_test_2.o @GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_11.a: ver_test_1.o ver_test_2.o ver_test_4.o @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_AR) rc $@ $^ +@GCC_TRUE@@NATIVE_LINKER_TRUE@ver_test_12.o: gcctestdir/ld ver_test_1.o ver_test_2.o ver_test_4.o +@GCC_TRUE@@NATIVE_LINKER_TRUE@ gcctestdir/ld -r -o $@ ver_test_1.o ver_test_2.o ver_test_4.o @GCC_TRUE@@NATIVE_LINKER_TRUE@protected_1.so: gcctestdir/ld protected_1_pic.o protected_2_pic.o protected_3_pic.o @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared protected_1_pic.o protected_2_pic.o protected_3_pic.o @@ -4153,6 +4639,8 @@ uninstall-am: @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -c -fpic -o $@ $< @GCC_TRUE@@NATIVE_LINKER_TRUE@relro_test.stdout: relro_test.so @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_READELF) -SlW relro_test.so > relro_test.stdout +@GCC_TRUE@@NATIVE_LINKER_TRUE@relro_now_test.so: gcctestdir/ld relro_test_pic.o +@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Bgcctestdir/ -shared -Wl,-z,relro -Wl,-z,now relro_test_pic.o @GCC_TRUE@@NATIVE_LINKER_TRUE@relro_strip_test.so: relro_test.so @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_STRIP) -o $@ $< @GCC_TRUE@@NATIVE_LINKER_TRUE@relro_script_test.so: gcctestdir/ld relro_script_test.t relro_test_pic.o @@ -4161,6 +4649,10 @@ uninstall-am: @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -c -o $@ $< @GCC_TRUE@@NATIVE_LINKER_TRUE@justsyms_2r.o: justsyms_2.o gcctestdir/ld $(srcdir)/justsyms.t @GCC_TRUE@@NATIVE_LINKER_TRUE@ gcctestdir/ld -o $@ -r -T $(srcdir)/justsyms.t justsyms_2.o +@GCC_TRUE@@NATIVE_LINKER_TRUE@justsyms_lib.o: justsyms_lib.c +@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -o $@ $< +@GCC_TRUE@@NATIVE_LINKER_TRUE@justsyms_lib: justsyms_lib.o gcctestdir/ld +@GCC_TRUE@@NATIVE_LINKER_TRUE@ gcctestdir/ld -o $@ -Ttext=0x1000200 -Tdata=0x2000000 -e exported_func justsyms_lib.o # Copy the file to the build directory to avoid worrying about the # full pathname in the generated symbols. @GCC_TRUE@@NATIVE_LINKER_TRUE@binary.txt: $(srcdir)/binary.in @@ -4399,8 +4891,8 @@ uninstall-am: @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -fpic -o $@ $< @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1pie.o: ifuncmain1.c @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -fpie -o $@ $< -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1picstatic: ifuncmain1pic.o ifuncmod1.o gcctestdir/ld -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -static ifuncmain1pic.o ifuncmod1.o +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1picstatic: ifuncmain1pic.o ifuncmod1.o gcctestdir/ld +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -static ifuncmain1pic.o ifuncmod1.o @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1pic: ifuncmain1pic.o ifuncmod1.so gcctestdir/ld @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ ifuncmain1pic.o ifuncmod1.so -Wl,-R,. @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1vispic.o: ifuncmain1vis.c @@ -4423,8 +4915,8 @@ uninstall-am: @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncdep2pic.o: ifuncdep2.c @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -fpic -o $@ $< -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2picstatic: ifuncmain2pic.o ifuncdep2pic.o gcctestdir/ld -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -static ifuncmain2pic.o ifuncdep2pic.o +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2picstatic: ifuncmain2pic.o ifuncdep2pic.o gcctestdir/ld +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -static ifuncmain2pic.o ifuncdep2pic.o @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2pic: ifuncmain2pic.o ifuncdep2pic.o gcctestdir/ld @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ ifuncmain2pic.o ifuncdep2pic.o @@ -4435,8 +4927,8 @@ uninstall-am: @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4pic.o: ifuncmain4.c @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -fpic -o $@ $< -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4picstatic: ifuncmain4pic.o gcctestdir/ld -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -static ifuncmain4pic.o +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4picstatic: ifuncmain4pic.o gcctestdir/ld +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -static ifuncmain4pic.o @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5pic.o: ifuncmain5.c @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -fpic -o $@ $< @@ -4451,8 +4943,8 @@ uninstall-am: @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncdep5.o: ifuncmod5.c @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -o $@ $< -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5picstatic: ifuncmain5pic.o ifuncmod5.o gcctestdir/ld -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -static ifuncmain5pic.o ifuncmod5.o +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5picstatic: ifuncmain5pic.o ifuncmod5.o gcctestdir/ld +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -static ifuncmain5pic.o ifuncmod5.o @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5pic: ifuncmain5pic.o ifuncmod5.so gcctestdir/ld @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ ifuncmain5pic.o ifuncmod5.so -Wl,-R,. @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5staticpic: ifuncmain5pic.o ifuncmod5.o gcctestdir/ld @@ -4475,12 +4967,18 @@ uninstall-am: @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7pie.o: ifuncmain7.c @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -fpie -o $@ $< -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7picstatic: ifuncmain7pic.o gcctestdir/ld -@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -static ifuncmain7pic.o +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7picstatic: ifuncmain7pic.o gcctestdir/ld +@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -static ifuncmain7pic.o @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7pic: ifuncmain7pic.o gcctestdir/ld @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ ifuncmain7pic.o @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7pie: ifuncmain7pie.o gcctestdir/ld @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -pie ifuncmain7pie.o +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncvar1_pic.o: ifuncvar1.c +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -fpic -o $@ $< +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncvar2_pic.o: ifuncvar2.c +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -fpic -o $@ $< +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncvar.so: ifuncvar1_pic.o ifuncvar2_pic.o gcctestdir/ld +@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -shared ifuncvar1_pic.o ifuncvar2_pic.o @GCC_TRUE@@NATIVE_LINKER_TRUE@strong_ref_weak_def_2.o: strong_ref_weak_def_2.c @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -o $@ -c -fPIC $< @GCC_TRUE@@NATIVE_LINKER_TRUE@strong_ref_weak_def_2.so: strong_ref_weak_def_2.o gcctestdir/ld @@ -4517,6 +5015,81 @@ uninstall-am: @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -nostartfiles -nostdlib -T $(srcdir)/memory_test.t -o $@ memory_test.o @GCC_TRUE@@NATIVE_LINKER_TRUE@memory_test.stdout: memory_test @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_READELF) -lWS $< > $@ + +# End-to-end incremental linking tests. +# Incremental linking is currently supported only on the x86_64 target. + +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_test_1_v1_ndebug.o: two_file_test_1_v1.cc +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -O0 -g0 -c -o $@ $< +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_test_1_ndebug.o: two_file_test_1.cc +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -O0 -g0 -c -o $@ $< +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_test_1b_ndebug.o: two_file_test_1b.cc +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -O0 -g0 -c -o $@ $< +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_test_2_ndebug.o: two_file_test_2.cc +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -O0 -g0 -c -o $@ $< +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@two_file_test_main_ndebug.o: two_file_test_main.cc +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -O0 -g0 -c -o $@ $< +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@incremental_test_2: two_file_test_1_v1_ndebug.o two_file_test_1_ndebug.o two_file_test_1b_ndebug.o \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_2_ndebug.o two_file_test_main_ndebug.o gcctestdir/ld +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f two_file_test_1_v1_ndebug.o two_file_test_tmp_2.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ two_file_test_tmp_2.o two_file_test_1b_ndebug.o two_file_test_2_ndebug.o two_file_test_main_ndebug.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ @sleep 1 +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f two_file_test_1_ndebug.o two_file_test_tmp_2.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ two_file_test_tmp_2.o two_file_test_1b_ndebug.o two_file_test_2_ndebug.o two_file_test_main_ndebug.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@incremental_test_3: two_file_test_1.o two_file_test_1b_v1.o two_file_test_1b.o \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_2.o two_file_test_main.o gcctestdir/ld +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f two_file_test_1b_v1.o two_file_test_tmp_3.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ two_file_test_1.o two_file_test_tmp_3.o two_file_test_2.o two_file_test_main.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ @sleep 1 +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f two_file_test_1b.o two_file_test_tmp_3.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ two_file_test_1.o two_file_test_tmp_3.o two_file_test_2.o two_file_test_main.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@incremental_test_4: two_file_test_1.o two_file_test_1b.o two_file_test_2_v1.o \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_2.o two_file_test_main.o gcctestdir/ld +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f two_file_test_2_v1.o two_file_test_tmp_4.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ two_file_test_1.o two_file_test_1b.o two_file_test_tmp_4.o two_file_test_main.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ mv -f incremental_test_4 incremental_test_4.base +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ @sleep 1 +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f two_file_test_2.o two_file_test_tmp_4.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-update,--incremental-base=incremental_test_4.base -Bgcctestdir/ two_file_test_1.o two_file_test_1b.o two_file_test_tmp_4.o two_file_test_main.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@incremental_test_5: two_file_test_1.o two_file_test_1b_v1.o two_file_test_1b.o \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_2.o two_file_test_main.o gcctestdir/ld +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f two_file_test_1b_v1.o two_file_test_tmp_5.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_AR) rc two_file_test_5.a two_file_test_1.o two_file_test_tmp_5.o two_file_test_2.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ two_file_test_main.o two_file_test_5.a +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ @sleep 1 +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f two_file_test_1b.o two_file_test_tmp_5.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_AR) rc two_file_test_5.a two_file_test_1.o two_file_test_tmp_5.o two_file_test_2.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ two_file_test_main.o two_file_test_5.a +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@incremental_test_6: two_file_test_1.o two_file_test_1b_v1.o two_file_test_1b.o \ +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ two_file_test_2.o two_file_test_main.o gcctestdir/ld +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f two_file_test_1b.o two_file_test_tmp_6.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_AR) rc two_file_test_6.a two_file_test_1.o two_file_test_tmp_6.o two_file_test_2.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ two_file_test_main.o two_file_test_6.a +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ @sleep 1 +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f two_file_test_1b_v1.o two_file_test_tmp_6.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_AR) rc two_file_test_6.a two_file_test_1.o two_file_test_tmp_6.o two_file_test_2.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ two_file_test_main.o -Wl,--incremental-unchanged two_file_test_6.a -Wl,--incremental-unknown +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@incremental_copy_test: copy_test_v1.o copy_test.o copy_test_1.so copy_test_2.so +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f copy_test_v1.o copy_test_tmp.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ -Wl,-R,. copy_test_tmp.o copy_test_1.so copy_test_2.so +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ @sleep 1 +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f copy_test.o copy_test_tmp.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ -Wl,-R,. copy_test_tmp.o copy_test_1.so copy_test_2.so +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@incremental_common_test_1: common_test_1_v1.o common_test_1_v2.o gcctestdir/ld +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f common_test_1_v1.o common_test_1_tmp.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ common_test_1_tmp.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ @sleep 1 +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f common_test_1_v2.o common_test_1_tmp.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ common_test_1_tmp.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@incremental_comdat_test_1: incr_comdat_test_1.o incr_comdat_test_2_v1.o incr_comdat_test_2_v2.o incr_comdat_test_2_v3.o gcctestdir/ld +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f incr_comdat_test_2_v1.o incr_comdat_test_1_tmp.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-full,--incremental-patch=100 -Bgcctestdir/ incr_comdat_test_1.o incr_comdat_test_1_tmp.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ @sleep 1 +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f incr_comdat_test_2_v2.o incr_comdat_test_1_tmp.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ incr_comdat_test_1.o incr_comdat_test_1_tmp.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ @sleep 1 +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ cp -f incr_comdat_test_2_v3.o incr_comdat_test_1_tmp.o +@DEFAULT_TARGET_X86_64_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXLINK) -Wl,--incremental-update -Bgcctestdir/ incr_comdat_test_1.o incr_comdat_test_1_tmp.o @NATIVE_OR_CROSS_LINKER_TRUE@script_test_10.o: script_test_10.s @NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< @NATIVE_OR_CROSS_LINKER_TRUE@script_test_10: $(srcdir)/script_test_10.t script_test_10.o gcctestdir/ld @@ -4608,7 +5181,7 @@ uninstall-am: @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@thumb_bl_in_range: thumb_bl_in_range.o ../ld-new -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -T $(srcdir)/thumb_branch_range.t -o $@ $< +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 -T $(srcdir)/thumb_branch_range.t -o $@ $< @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@thumb_bl_in_range.o: thumb_bl_in_range.s @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ -march=armv5te $< @@ -4617,7 +5190,7 @@ uninstall-am: @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@thumb_bl_out_of_range: thumb_bl_out_of_range.o ../ld-new -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -T $(srcdir)/thumb_branch_range.t -o $@ $< +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 -T $(srcdir)/thumb_branch_range.t -o $@ $< @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@thumb_bl_out_of_range.o: thumb_bl_out_of_range.s @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ -march=armv5te $< @@ -4644,7 +5217,7 @@ uninstall-am: @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@thumb_blx_in_range: thumb_blx_in_range.o ../ld-new -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -T $(srcdir)/thumb_branch_range.t -o $@ $< +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 -T $(srcdir)/thumb_branch_range.t -o $@ $< @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@thumb_blx_in_range.o: thumb_blx_in_range.s @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ -march=armv5te $< @@ -4653,7 +5226,7 @@ uninstall-am: @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@thumb_blx_out_of_range: thumb_blx_out_of_range.o ../ld-new -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -T $(srcdir)/thumb_branch_range.t -o $@ $< +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 -T $(srcdir)/thumb_branch_range.t -o $@ $< @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@thumb_blx_out_of_range.o: thumb_blx_out_of_range.s @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ -march=armv5te $< @@ -4680,16 +5253,34 @@ uninstall-am: @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@thumb_bl_out_of_range_local: thumb_bl_out_of_range_local.o ../ld-new -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -T $(srcdir)/thumb_branch_range.t -o $@ $< +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 -T $(srcdir)/thumb_branch_range.t -o $@ $< @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@thumb_bl_out_of_range_local.o: thumb_bl_out_of_range_local.s @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ -march=armv5te $< +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_thm_jump11.stdout: arm_thm_jump11 +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_thm_jump11: arm_thm_jump11.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -T $(srcdir)/arm_thm_jump11.t -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_thm_jump11.o: arm_thm_jump11.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_thm_jump8.stdout: arm_thm_jump8 +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_thm_jump8: arm_thm_jump8.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -T $(srcdir)/arm_thm_jump8.t -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_thm_jump8.o: arm_thm_jump8.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< + @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_v4bx.stdout: arm_fix_v4bx @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D -j.text $< > $@ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_v4bx: arm_fix_v4bx.o ../ld-new -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --fix-v4bx -o $@ $< +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 --fix-v4bx -o $@ $< @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_v4bx.o: arm_fix_v4bx.s @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< @@ -4698,13 +5289,13 @@ uninstall-am: @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D -j.text $< > $@ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_v4bx_interworking: arm_fix_v4bx.o ../ld-new -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --fix-v4bx-interworking -o $@ $< +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 --fix-v4bx-interworking -o $@ $< @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_no_fix_v4bx.stdout: arm_no_fix_v4bx @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D -j.text $< > $@ @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_no_fix_v4bx: arm_fix_v4bx.o ../ld-new -@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -o $@ $< +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 -o $@ $< @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_attr_merge_6.stdout: arm_attr_merge_6 @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_READELF) -A $< > $@ @@ -4736,6 +5327,60 @@ uninstall-am: @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_attr_merge_7b.o: arm_attr_merge_7b.s @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_v6z.stdout: arm_fix_1176_default_v6z +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D -j.foo $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_v6z: arm_fix_1176_default_v6z.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --section-start=.foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_v6z.o: arm_fix_1176.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv6z -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_on_v6z.stdout: arm_fix_1176_on_v6z +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D -j.foo $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_on_v6z: arm_fix_1176_on_v6z.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --section-start=.foo=0x2001014 --fix-arm1176 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_on_v6z.o: arm_fix_1176.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv6z -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_off_v6z.stdout: arm_fix_1176_off_v6z +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D -j.foo $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_off_v6z: arm_fix_1176_off_v6z.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --section-start=.foo=0x2001014 --no-fix-arm1176 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_off_v6z.o: arm_fix_1176.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv6z -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_v5te.stdout: arm_fix_1176_default_v5te +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D -j.foo $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_v5te: arm_fix_1176_default_v5te.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --section-start=.foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_v5te.o: arm_fix_1176.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv5te -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_v7a.stdout: arm_fix_1176_default_v7a +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D -j.foo $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_v7a: arm_fix_1176_default_v7a.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --section-start=.foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_v7a.o: arm_fix_1176.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv7-a -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_1156t2f_s.stdout: arm_fix_1176_default_1156t2f_s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D -j.foo $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_1156t2f_s: arm_fix_1176_default_1156t2f_s.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --section-start=.foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_fix_1176_default_1156t2f_s.o: arm_fix_1176.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -mcpu=arm1156t2f-s -o $@ $< + @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_cortex_a8_b_cond.stdout: arm_cortex_a8_b_cond @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D -j.text $< > $@ @@ -4790,6 +5435,123 @@ uninstall-am: @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_cortex_a8_local_reloc.o: arm_cortex_a8_local_reloc.s @DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_exidx_test.stdout: arm_exidx_test.so +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_READELF) -S $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_exidx_test.so: arm_exidx_test.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -shared -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_exidx_test.o: arm_exidx_test.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@pr12826.stdout: pr12826.so +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_READELF) -A $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@pr12826.so: pr12826_1.o pr12826_2.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -shared -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@pr12826_1.o: pr12826_1.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@pr12826_2.o: pr12826_2.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_unaligned_reloc.stdout: arm_unaligned_reloc +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_unaligned_reloc_r.stdout: arm_unaligned_reloc_r +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -Dr $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_unaligned_reloc: arm_unaligned_reloc.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_unaligned_reloc_r: arm_unaligned_reloc.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -r -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_unaligned_reloc.o: arm_unaligned_reloc.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_arm_arm.stdout: arm_farcall_arm_arm +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -d $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_arm_arm: arm_farcall_arm_arm.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 --section-start .text=0x1000 --section-start .foo=0x2001020 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_arm_arm.o: arm_farcall_arm_arm.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_arm_thumb.stdout: arm_farcall_arm_thumb +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_arm_thumb: arm_farcall_arm_thumb.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_arm_thumb.o: arm_farcall_arm_thumb.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_arm_thumb_5t.stdout: arm_farcall_arm_thumb_5t +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_arm_thumb_5t: arm_farcall_arm_thumb_5t.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_arm_thumb_5t.o: arm_farcall_arm_thumb.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv5t -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb.stdout: arm_farcall_thumb_thumb +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb: arm_farcall_thumb_thumb.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb.o: arm_farcall_thumb_thumb.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv4t -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb_5t.stdout: arm_farcall_thumb_thumb_5t +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb_5t: arm_farcall_thumb_thumb_5t.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb_5t.o: arm_farcall_thumb_thumb.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv5t -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb_7m.stdout: arm_farcall_thumb_thumb_7m +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb_7m: arm_farcall_thumb_thumb_7m.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb_7m.o: arm_farcall_thumb_thumb.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv7-m -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb_6m.stdout: arm_farcall_thumb_thumb_6m +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb_6m: arm_farcall_thumb_thumb_6m.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --section-start .text=0x1000 --section-start .foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_thumb_6m.o: arm_farcall_thumb_thumb.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv6-m -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_arm.stdout: arm_farcall_thumb_arm +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_arm: arm_farcall_thumb_arm.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --section-start .text=0x1c01010 --section-start .foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_arm.o: arm_farcall_thumb_arm.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_arm_5t.stdout: arm_farcall_thumb_arm_5t +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -D $< > $@ + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_arm_5t: arm_farcall_thumb_arm_5t.o ../ld-new +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new --no-fix-arm1176 --section-start .text=0x1c01010 --section-start .foo=0x2001014 -o $@ $< + +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_arm_5t.o: arm_farcall_thumb_arm.s +@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv5t -o $@ $< + # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: diff --git a/gold/testsuite/arm_branch_in_range.sh b/gold/testsuite/arm_branch_in_range.sh index 43b50c6..dc6f36f 100755 --- a/gold/testsuite/arm_branch_in_range.sh +++ b/gold/testsuite/arm_branch_in_range.sh @@ -61,4 +61,13 @@ check thumb2_blx_in_range.stdout \ " 2000006: f400 c000 blx 1000008 <_backward_target>" check thumb2_blx_in_range.stdout \ " 200000c: f3ff c7fe blx 300000c <_forward_target>" +check arm_thm_jump11.stdout \ + " 8804: e400 b.n 8008 <_backward_target>" +check arm_thm_jump11.stdout \ + " 8806: e3ff b.n 9008 <_forward_target>" +check arm_thm_jump8.stdout \ + " 8104: d080 beq.n 8008 <_backward_target>" +check arm_thm_jump8.stdout \ + " 8106: d07f beq.n 8208 <_forward_target>" + exit 0 diff --git a/gold/testsuite/arm_exidx_test.s b/gold/testsuite/arm_exidx_test.s new file mode 100644 index 0000000..14dcc94 --- /dev/null +++ b/gold/testsuite/arm_exidx_test.s @@ -0,0 +1,25 @@ + .syntax unified + .arch armv5te + .section .text.answer,"ax",%progbits + .align 2 + .global answer + .type answer, %function +answer: + .fnstart + .cantunwind + mov r0, #42 + bx lr + .fnend + .size answer, .-answer + +# Check that we can handle an empty .text section + .section .text.empty,"ax",%progbits + .align 2 + .global empty + .type empty, %function +empty: + .fnstart + .cantunwind + .fnend + .size empty, .-empty + diff --git a/gold/testsuite/arm_exidx_test.sh b/gold/testsuite/arm_exidx_test.sh new file mode 100755 index 0000000..f732a68 --- /dev/null +++ b/gold/testsuite/arm_exidx_test.sh @@ -0,0 +1,45 @@ +#!/bin/sh + +# arm_exidx_test.sh -- a test case for .ARM.exidx section. + +# Copyright 2011 Free Software Foundation, Inc. +# Written by Doug Kwan . + +# This file is part of gold. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +# This file goes with arm_exidx_test.s, an ARM assembly source file constructed +# to test handling of .ARM.exidx and .ARM.extab sections. + +check() +{ + if ! grep -q "$2" "$1" + then + echo "Did not find section header in $1:" + echo " $2" + echo "" + echo "Actual headers below:" + cat "$1" + exit 1 + fi +} + +# Check that SHF_LINK_ORDER is set. +check arm_exidx_test.stdout ".* .ARM.exidx .* ARM_EXIDX .* AL .*" +check arm_exidx_test.stdout ".* .ARM.extab .* PROGBITS .* A .*" + +exit 0 diff --git a/gold/testsuite/arm_farcall_arm_arm.s b/gold/testsuite/arm_farcall_arm_arm.s new file mode 100644 index 0000000..00c1e48 --- /dev/null +++ b/gold/testsuite/arm_farcall_arm_arm.s @@ -0,0 +1,20 @@ +@ Test to ensure that a ARM to ARM call exceeding 32Mb generates a stub. + + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + +_start: + bl bar + +@ We will place the section .foo at 0x2001020. + + .section .foo, "xa" + + .type bar, %function +bar: + bx lr + diff --git a/gold/testsuite/arm_farcall_arm_arm.sh b/gold/testsuite/arm_farcall_arm_arm.sh new file mode 100755 index 0000000..7d95528 --- /dev/null +++ b/gold/testsuite/arm_farcall_arm_arm.sh @@ -0,0 +1,44 @@ +#!/bin/sh + +# arm_farcall_arm_arm.sh -- a test case for ARM->ARM farcall veneers + +# Copyright 2010, 2011, Free Software Foundation, Inc. +# Written by Matthew Gretton-Dann +# Based upon arm_cortex_a8.sh +# Written by Doug Kwan . + +# This file is part of gold. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +check() +{ + if ! grep -q "$2" "$1" + then + echo "Did not find expected instruction in $1:" + echo " $2" + echo "" + echo "Actual instructions below:" + cat "$1" + exit 1 + fi +} + +# Check for ARM->ARM default +check arm_farcall_arm_arm.stdout "1004: .* ldr pc, \[pc, #-4\] .*" +check arm_farcall_arm_arm.stdout "1008: 02001020" + +exit 0 diff --git a/gold/testsuite/arm_farcall_arm_thumb.s b/gold/testsuite/arm_farcall_arm_thumb.s new file mode 100644 index 0000000..c69f31c --- /dev/null +++ b/gold/testsuite/arm_farcall_arm_thumb.s @@ -0,0 +1,20 @@ +@ Test to ensure that a ARM to Thumb call exceeding 32Mb generates a stub. + + .global _start + .global bar + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + +_start: + bl bar + +@ We will place the section .foo at 0x2001010. + + .section .foo, "xa" + .thumb_func +bar: + bx lr + diff --git a/gold/testsuite/arm_farcall_arm_thumb.sh b/gold/testsuite/arm_farcall_arm_thumb.sh new file mode 100755 index 0000000..2df2d65 --- /dev/null +++ b/gold/testsuite/arm_farcall_arm_thumb.sh @@ -0,0 +1,50 @@ +#!/bin/sh + +# arm_farcall_arm_thumb.sh -- a test case for ARM->Thumb farcall veneers. + +# Copyright 2010, 2011, Free Software Foundation, Inc. +# Written by Matthew Gretton-Dann +# Based upon arm_cortex_a8.sh +# Written by Doug Kwan . + +# This file is part of gold. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +check() +{ + if ! grep -q "$2" "$1" + then + echo "Did not find expected instruction in $1:" + echo " $2" + echo "" + echo "Actual instructions below:" + cat "$1" + exit 1 + fi +} + +# Check for ARM->Thumb default +check arm_farcall_arm_thumb.stdout "1004: .* ldr ip, \[pc\]" +check arm_farcall_arm_thumb.stdout "1008: .* bx ip" +check arm_farcall_arm_thumb.stdout "100c: 02001015" + +# Check for ARM->Thumb with v5t interworking +chck arm_farcall_arm_thumb_5t.stdout "1004: f004 e51f" +chck arm_farcall_arm_thumb_5t.stdout "1008: 1015" +chck arm_farcall_arm_thumb_5t.stdout "100a: 0200" + +exit 0 diff --git a/gold/testsuite/arm_farcall_thumb_arm.s b/gold/testsuite/arm_farcall_thumb_arm.s new file mode 100644 index 0000000..1fd6a07 --- /dev/null +++ b/gold/testsuite/arm_farcall_thumb_arm.s @@ -0,0 +1,27 @@ +@ Test to ensure that a Thumb to ARM call exceeding 4Mb generates a stub. +@ Check that we can generate two types of stub in the same section. + + .global _start + .syntax unified + +@ We will place the section .text at 0x1c01010. + + .text + .thumb_func +_start: + .global bar + bl bar +@ This call is close enough to generate a "short branch" stub +@ or no stub if blx is available. + .space 0x0300000 + bl bar + +@ We will place the section .foo at 0x2001014. + + .section .foo, "xa" + + .arm + .type bar, %function +bar: + bx lr + diff --git a/gold/testsuite/arm_farcall_thumb_arm.sh b/gold/testsuite/arm_farcall_thumb_arm.sh new file mode 100755 index 0000000..e22da46 --- /dev/null +++ b/gold/testsuite/arm_farcall_thumb_arm.sh @@ -0,0 +1,56 @@ +#!/bin/sh + +# arm_farcall_thumb_arm.sh -- a test case for Thumb->ARM farcall veneers. + +# Copyright 2010, 2011, Free Software Foundation, Inc. +# Written by Matthew Gretton-Dann +# Based upon arm_cortex_a8.sh +# Written by Doug Kwan . + +# This file is part of gold. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +check() +{ + if ! grep -q "$2" "$1" + then + echo "Did not find expected instruction in $1:" + echo " $2" + echo "" + echo "Actual instructions below:" + cat "$1" + exit 1 + fi +} + +# Thumb->ARM +check arm_farcall_thumb_arm.stdout "1f01018: .* bx pc" +check arm_farcall_thumb_arm.stdout "1f0101a: .* nop" +check arm_farcall_thumb_arm.stdout "1f0101c: f004 e51f" +check arm_farcall_thumb_arm.stdout "1f01020: 1014" +check arm_farcall_thumb_arm.stdout "1f01022: 0200" + +check arm_farcall_thumb_arm.stdout "1f01024: .* bx pc" +check arm_farcall_thumb_arm.stdout "1f01026: .* nop" +check arm_farcall_thumb_arm.stdout "1f01028: fff9 ea03" + +# Thumb->ARM with v5T interworking +check arm_farcall_thumb_arm_5t.stdout "1f01018: f004 e51f" +check arm_farcall_thumb_arm_5t.stdout "1f0101c: 1014" +check arm_farcall_thumb_arm_5t.stdout "1f0101e: 0200" + +exit 0 diff --git a/gold/testsuite/arm_farcall_thumb_thumb.s b/gold/testsuite/arm_farcall_thumb_thumb.s new file mode 100644 index 0000000..650b1a6 --- /dev/null +++ b/gold/testsuite/arm_farcall_thumb_thumb.s @@ -0,0 +1,19 @@ +@ Test to ensure that a Thumb to Thumb call exceeding 4Mb generates a stub. + + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func +_start: + bl bar + +@ We will place the section .foo at 0x02001014. + + .section .foo, "xa" + .thumb_func +bar: + bx lr + diff --git a/gold/testsuite/arm_farcall_thumb_thumb.sh b/gold/testsuite/arm_farcall_thumb_thumb.sh new file mode 100755 index 0000000..23fb0cd --- /dev/null +++ b/gold/testsuite/arm_farcall_thumb_thumb.sh @@ -0,0 +1,74 @@ +#!/bin/sh + +# arm_farcall_thumb_thumb.sh -- a test case for Thumb->Thumb farcall veneers. + +# Copyright 2010, 2011, Free Software Foundation, Inc. +# Written by Matthew Gretton-Dann +# Based upon arm_cortex_a8.sh +# Written by Doug Kwan . + +# This file is part of gold. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +check() +{ + if ! grep -q "$2" "$1" + then + echo "Did not find expected instruction in $1:" + echo " $2" + echo "" + echo "Actual instructions below:" + cat "$1" + exit 1 + fi +} + +# Thumb->Thumb default +check arm_farcall_thumb_thumb.stdout "1004: .* bx pc" +check arm_farcall_thumb_thumb.stdout "1006: .* nop" +check arm_farcall_thumb_thumb.stdout "1008: c000" +check arm_farcall_thumb_thumb.stdout "100a: e59f" +check arm_farcall_thumb_thumb.stdout "100c: ff1c e12f" +check arm_farcall_thumb_thumb.stdout "1010: 1015" +check arm_farcall_thumb_thumb.stdout "1012: 0200" + +# Thumb->Thumb with v5T interworking +check arm_farcall_thumb_thumb_5t.stdout "1004: f004 e51f" +check arm_farcall_thumb_thumb_5t.stdout "1008: 1015" +check arm_farcall_thumb_thumb_5t.stdout "100a: 0200" + +# Thumb->Thumb on v6-M +check arm_farcall_thumb_thumb_6m.stdout "1004: .* push {r0}" +check arm_farcall_thumb_thumb_6m.stdout "1006: .* ldr r0, \\[pc, #8\\]" +check arm_farcall_thumb_thumb_6m.stdout "1008: .* mov ip, r0" +check arm_farcall_thumb_thumb_6m.stdout "100a: .* pop {r0}" +check arm_farcall_thumb_thumb_6m.stdout "100c: .* bx ip" +check arm_farcall_thumb_thumb_6m.stdout "100e: .* nop" +check arm_farcall_thumb_thumb_6m.stdout "1010: 1015" +check arm_farcall_thumb_thumb_6m.stdout "1012: 0200" + +# Thumb->Thumb on v7-M +check arm_farcall_thumb_thumb_6m.stdout "1004: .* push {r0}" +check arm_farcall_thumb_thumb_6m.stdout "1006: .* ldr r0, \\[pc, #8\\]" +check arm_farcall_thumb_thumb_6m.stdout "1008: .* mov ip, r0" +check arm_farcall_thumb_thumb_6m.stdout "100a: .* pop {r0}" +check arm_farcall_thumb_thumb_6m.stdout "100c: .* bx ip" +check arm_farcall_thumb_thumb_6m.stdout "100e: .* nop" +check arm_farcall_thumb_thumb_6m.stdout "1010: 1015" +check arm_farcall_thumb_thumb_6m.stdout "1012: 0200" + +exit 0 diff --git a/gold/testsuite/arm_fix_1176.s b/gold/testsuite/arm_fix_1176.s new file mode 100644 index 0000000..96e0328 --- /dev/null +++ b/gold/testsuite/arm_fix_1176.s @@ -0,0 +1,15 @@ + .syntax unified + .globl _start + .globl func_to_branch_to + + .arm + .text +func_to_branch_to: + bx lr + + .thumb + .section .foo, "xa" + .thumb_func +_start: + bl func_to_branch_to + diff --git a/gold/testsuite/arm_fix_1176.sh b/gold/testsuite/arm_fix_1176.sh new file mode 100755 index 0000000..152b0a3 --- /dev/null +++ b/gold/testsuite/arm_fix_1176.sh @@ -0,0 +1,61 @@ +#!/bin/sh + +# arm_fix_1176.sh -- a test case for the ARM1176 workaround. + +# Copyright 2010, 2011, Free Software Foundation, Inc. +# Written by Matthew Gretton-Dann +# Based upon arm_cortex_a8.sh +# Written by Doug Kwan . + +# This file is part of gold. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +# This file goes with arm_v4bx.s, an ARM assembly source file constructed to +# have test the handling of R_ARM_V4BX relocation. + +check() +{ + if ! grep -q "$2" "$1" + then + echo "Did not find expected instruction in $1:" + echo " $2" + echo "" + echo "Actual instructions below:" + cat "$1" + exit 1 + fi +} + +# Check for fix default state on v6Z. +check arm_fix_1176_default_v6z.stdout "2001014: .* bl 2001018 <.*>" + +# Check for fix explicitly on on v6Z. +check arm_fix_1176_on_v6z.stdout "2001014: .* bl 2001018 <.*>" + +# Check for explicitly off on v6Z +check arm_fix_1176_off_v6z.stdout "2001014: .* blx 2001018 <.*>" + +# Check for fix default state on v5TE +check arm_fix_1176_default_v5te.stdout "2001014: .* bl 2001018 <.*>" + +# Check for fix default state on v7A +check arm_fix_1176_default_v7a.stdout "2001014: .* blx 2001018 <.*>" + +# Check for fix default state on ARM1156T2F-S +check arm_fix_1176_default_1156t2f_s.stdout "2001014: .* blx 2001018 <.*>" + +exit 0 diff --git a/gold/testsuite/arm_thm_jump11.s b/gold/testsuite/arm_thm_jump11.s new file mode 100644 index 0000000..41f1ce7 --- /dev/null +++ b/gold/testsuite/arm_thm_jump11.s @@ -0,0 +1,57 @@ +# arm_thm_jump11.s +# Test R_ARM_THM_JUMP11 relocations just within the branch range limits. + .syntax unified + .arch armv5te + + .section .text.pre,"x" + +# Add padding so that target is just in branch range. + .space 8 + + .global _backward_target + .code 16 + .thumb_func + .type _backword_target, %function +_backward_target: + bx lr + .size _backward_target, .-_backward_target + + .text + +# Define _start so that linker does not complain. + .global _start + .code 32 + .align 2 + .type _start, %function +_start: + bx lr + .size _start, .-_start + + .global _backward_test + .code 16 + .thumb_func + .type _backward_test, %function +_backward_test: + b.n _backward_target + .size _backward_test, .-_backward_test + + .global _forward_test + .code 16 + .thumb_func + .type _forward_test, %function +_forward_test: + b.n _forward_target + .size _forward_test, .-_forward_test + + .section .text.post,"x" + +# Add padding so that target is just in branch range. + .space 8 + + .global _forward_target + .code 16 + .thumb_func + .type _forward_target, %function +_forward_target: + bx lr + .size _forward_target, .-_forward_target diff --git a/gold/testsuite/arm_thm_jump11.t b/gold/testsuite/arm_thm_jump11.t new file mode 100644 index 0000000..2ec4143 --- /dev/null +++ b/gold/testsuite/arm_thm_jump11.t @@ -0,0 +1,36 @@ +/* arm_thm_jump11.t -- linker script to test R_ARM_THM_JUMP11 relocation. + + Copyright 2011 Free Software Foundation, Inc. + Written by Doug Kwan . + + This file is part of gold. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +SECTIONS +{ + . = 0x8000; + + .text.pre : { *(.text.pre) } + . = ALIGN(0x800); + .text : { *(.text) } + . = ALIGN(0x800); + .text.post : { *(.text.post) } + . += 0x1000; + .data : { *(.data) } + .bss : { *(.bss) } + .ARM.attributes : { *(.ARM.attributes) } +} diff --git a/gold/testsuite/arm_thm_jump8.s b/gold/testsuite/arm_thm_jump8.s new file mode 100644 index 0000000..540a243 --- /dev/null +++ b/gold/testsuite/arm_thm_jump8.s @@ -0,0 +1,57 @@ +# arm_thm_jump8.s +# Test R_ARM_THM_JUMP8 relocations just within the branch range limits. + .syntax unified + .arch armv5te + + .section .text.pre,"x" + +# Add padding so that target is just in branch range. + .space 8 + + .global _backward_target + .code 16 + .thumb_func + .type _backword_target, %function +_backward_target: + bx lr + .size _backward_target, .-_backward_target + + .text + +# Define _start so that linker does not complain. + .global _start + .code 32 + .align 2 + .type _start, %function +_start: + bx lr + .size _start, .-_start + + .global _backward_test + .code 16 + .thumb_func + .type _backward_test, %function +_backward_test: + beq.n _backward_target + .size _backward_test, .-_backward_test + + .global _forward_test + .code 16 + .thumb_func + .type _forward_test, %function +_forward_test: + beq.n _forward_target + .size _forward_test, .-_forward_test + + .section .text.post,"x" + +# Add padding so that target is just in branch range. + .space 8 + + .global _forward_target + .code 16 + .thumb_func + .type _forward_target, %function +_forward_target: + bx lr + .size _forward_target, .-_forward_target diff --git a/gold/testsuite/arm_thm_jump8.t b/gold/testsuite/arm_thm_jump8.t new file mode 100644 index 0000000..fa674b4 --- /dev/null +++ b/gold/testsuite/arm_thm_jump8.t @@ -0,0 +1,36 @@ +/* arm_thm_jump8.t -- linker script to test R_ARM_THM_JUMP8 relocation. + + Copyright 2011 Free Software Foundation, Inc. + Written by Doug Kwan . + + This file is part of gold. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +SECTIONS +{ + . = 0x8000; + + .text.pre : { *(.text.pre) } + . = ALIGN(0x100); + .text : { *(.text) } + . = ALIGN(0x100); + .text.post : { *(.text.post) } + . += 0x1000; + .data : { *(.data) } + .bss : { *(.bss) } + .ARM.attributes : { *(.ARM.attributes) } +} diff --git a/gold/testsuite/arm_unaligned_reloc.s b/gold/testsuite/arm_unaligned_reloc.s new file mode 100644 index 0000000..7677bff --- /dev/null +++ b/gold/testsuite/arm_unaligned_reloc.s @@ -0,0 +1,44 @@ + .syntax unified + + .global _start + .type _start, %function + .text +_start: + bx lr + .size _start,.-_start + + .section .data.0,"aw",%progbits + .align 12 + .type x, %object + .size x, 4 +x: + .word 1 + + .section .data.1,"aw",%progbits + .align 2 + +# This causes following relocations to be unaligned. + .global padding + .type padding, %object + .size padding, 1 +padding: + .byte 0 + + .global abs32 + .type abs32, %object + .size abs32, 4 +abs32: + .word x + + .global rel32 + .type rel32, %object + .size rel32, 4 +rel32: + .word x - . + + .global abs16 + .type abs16, %object + .size abs16, 2 +abs16: + .short x + .short 0 diff --git a/gold/testsuite/arm_unaligned_reloc.sh b/gold/testsuite/arm_unaligned_reloc.sh new file mode 100755 index 0000000..39a5a11 --- /dev/null +++ b/gold/testsuite/arm_unaligned_reloc.sh @@ -0,0 +1,57 @@ +#!/bin/sh + +# arm_unaligned_reloc.sh -- test ARM unaligned static data relocations. + +# Copyright 2011 Free Software Foundation, Inc. +# Written by Doug Kwan + +# This file is part of gold. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +# This file goes with the assembler source file arm_unaligned_reloc.s, +# that is assembled and linked as a dummy executable. We want to check +# it is okay to do unaligned static data relocations. + +check() +{ + if ! grep -q -e "$2" "$1" + then + echo "Did not find pattern \"$2\" in $1:" + echo " $2" + echo "" + echo "Actual disassembly below:" + cat "$1" + exit 1 + fi +} + +check arm_unaligned_reloc.stdout "^00009000 :$" +check arm_unaligned_reloc.stdout "^0000a001 :$" +check arm_unaligned_reloc.stdout "^ a001: 00009000 .*$" +check arm_unaligned_reloc.stdout "^0000a005 :" +check arm_unaligned_reloc.stdout "^ a005: ffffeffb .*$" +check arm_unaligned_reloc.stdout "^0000a009 :" +check arm_unaligned_reloc.stdout "^ a009: 00009000 .*$" + +check arm_unaligned_reloc_r.stdout "^ 1: 00000000 .*$" +check arm_unaligned_reloc_r.stdout "^[ ]*1: R_ARM_ABS32 .data.0$" +check arm_unaligned_reloc_r.stdout "^ 5: 00000000 .*$" +check arm_unaligned_reloc_r.stdout "^[ ]*5: R_ARM_REL32 .data.0$" +check arm_unaligned_reloc_r.stdout "^ 9: 00000000 .*$" +check arm_unaligned_reloc_r.stdout "^[ ]*9: R_ARM_ABS16 .data.0$" + +exit 0 diff --git a/gold/testsuite/binary_unittest.cc b/gold/testsuite/binary_unittest.cc index 8e95062..a9f47c2 100644 --- a/gold/testsuite/binary_unittest.cc +++ b/gold/testsuite/binary_unittest.cc @@ -95,9 +95,9 @@ Sized_binary_test() delete sd.symbol_names; sd.symbol_names = NULL; - Sized_relobj* relobj = - static_cast*>(object); - typename Sized_relobj::Address value; + Sized_relobj_file* relobj = + static_cast*>(object); + typename Sized_relobj_file::Address value; bool is_ordinary; CHECK(relobj->symbol_section_and_value(0, &value, &is_ordinary) == 0); CHECK(is_ordinary); diff --git a/gold/testsuite/common_test_1_v1.c b/gold/testsuite/common_test_1_v1.c new file mode 100644 index 0000000..86abc40 --- /dev/null +++ b/gold/testsuite/common_test_1_v1.c @@ -0,0 +1,79 @@ +/* common_test_1_v1.c -- test common symbol sorting + + Copyright 2008, 2011 Free Software Foundation, Inc. + Written by Ian Lance Taylor + + This file is part of gold. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. + + This is a test of a common symbol in the main program and a + versioned symbol in a shared library. The common symbol in the + main program should override the shared library symbol. + + This file is a modified version of the real test case, to be used + while testing the --incremental option. */ + +#include + +/* Common symbols should be sorted by size, largest first, and then by + alignment, largest first. We mix up the names, because gas seems + to sort common symbols roughly by name. */ + +int c9[90]; +int c8[80]; +int c7[70]; +int c6[60]; +int c5[10]; +int c4[20]; +int c3[30]; +int c2[40]; +int c1[50]; + +int a1 __attribute__ ((aligned (1 << 9))); +int a2 __attribute__ ((aligned (1 << 8))); +int a3 __attribute__ ((aligned (1 << 7))); +int a4 __attribute__ ((aligned (1 << 6))); +int a5 __attribute__ ((aligned (1 << 1))); +int a6 __attribute__ ((aligned (1 << 2))); +int a7 __attribute__ ((aligned (1 << 3))); +int a8 __attribute__ ((aligned (1 << 4))); +int a9 __attribute__ ((aligned (1 << 5))); + +int +main (int argc __attribute__ ((unused)), char** argv __attribute__ ((unused))) +{ + /* These tests are deliberately incorrect. */ + assert (c5 < c4); + assert (c4 < c3); + assert (c3 < c2); + assert (c2 < c1); + assert (c1 < c6); + assert (c6 < c7); + assert (c7 < c8); + assert (c8 < c9); + + assert (&a1 > &a2); + assert (&a2 > &a3); + assert (&a3 > &a4); + assert (&a4 > &a9); + assert (&a9 > &a8); + assert (&a8 > &a7); + assert (&a7 > &a6); + assert (&a6 > &a5); + + return 0; +} diff --git a/gold/testsuite/common_test_1_v2.c b/gold/testsuite/common_test_1_v2.c new file mode 100644 index 0000000..c66a647 --- /dev/null +++ b/gold/testsuite/common_test_1_v2.c @@ -0,0 +1,77 @@ +/* common_test_1_v2.c -- test common symbol sorting + + Copyright 2008 Free Software Foundation, Inc. + Written by Ian Lance Taylor + + This file is part of gold. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. + + This is a test of a common symbol in the main program and a + versioned symbol in a shared library. The common symbol in the + main program should override the shared library symbol. */ + +#include + +/* Common symbols should be sorted by size, largest first, and then by + alignment, largest first. We mix up the names, because gas seems + to sort common symbols roughly by name. */ + +int c9[90]; +int c8[80]; +int c7[70]; +int c6[60]; +int c5[10]; +int c4[20]; +int c3[30]; +int c2[40]; +int c1[50]; + +int a1 __attribute__ ((aligned (1 << 9))); +int a2 __attribute__ ((aligned (1 << 8))); +int a3 __attribute__ ((aligned (1 << 7))); +int a4 __attribute__ ((aligned (1 << 6))); +int a5 __attribute__ ((aligned (1 << 1))); +int a6 __attribute__ ((aligned (1 << 2))); +int a7 __attribute__ ((aligned (1 << 3))); +int a8 __attribute__ ((aligned (1 << 4))); +int a9 __attribute__ ((aligned (1 << 5))); + +int +main (int argc __attribute__ ((unused)), char** argv __attribute__ ((unused))) +{ + // After an incremental update, all guarantees about ordering + // are null. + assert (c5 != c4); + assert (c4 != c3); + assert (c3 != c2); + assert (c2 != c1); + assert (c1 != c6); + assert (c6 != c7); + assert (c7 != c8); + assert (c8 != c9); + + assert (&a1 != &a2); + assert (&a2 != &a3); + assert (&a3 != &a4); + assert (&a4 != &a9); + assert (&a9 != &a8); + assert (&a8 != &a7); + assert (&a7 != &a6); + assert (&a6 != &a5); + + return 0; +} diff --git a/gold/testsuite/copy_test_v1.cc b/gold/testsuite/copy_test_v1.cc new file mode 100644 index 0000000..63f7dfd --- /dev/null +++ b/gold/testsuite/copy_test_v1.cc @@ -0,0 +1,47 @@ +// copy_test_v1.cc -- test copy relocs for gold + +// Copyright 2008, 2011 Free Software Foundation, Inc. +// Written by Ian Lance Taylor . + +// This file is part of gold. + +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. + +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +// MA 02110-1301, USA. + +// This source file is used for testing the --incremental option. +// The object built from this source will be incrementally updated +// with the correct object built from copy_test.cc. + +#include +#include + +// Misalign the BSS section. +static char c; + +// From copy_test_1.cc. +extern char b; + +// From copy_test_2.cc. +extern long long l; + +int +main() +{ + assert(c == 0); + assert(b == 1); + assert(l == 3); // Deliberately incorrect. + assert((reinterpret_cast(&l) & 0x7) == 0); + return 0; +} diff --git a/gold/testsuite/debug_msg.sh b/gold/testsuite/debug_msg.sh index 9a6f2d5..c0d03b3 100755 --- a/gold/testsuite/debug_msg.sh +++ b/gold/testsuite/debug_msg.sh @@ -90,6 +90,33 @@ check debug_msg.err ": symbol 'SometimesInlineFunction(int)' defined in multiple check debug_msg.err "debug_msg.cc:68" check debug_msg.err "odr_violation2.cc:27" +# Check for the same error messages when using --compressed-debug-sections. +if test -r debug_msg_cdebug.err +then + check debug_msg_cdebug.err "debug_msg_cdebug.o:debug_msg.cc:function fn_array: error: undefined reference to 'undef_fn1()'" + check debug_msg_cdebug.err "debug_msg_cdebug.o:debug_msg.cc:function fn_array: error: undefined reference to 'undef_fn2()'" + check debug_msg_cdebug.err "debug_msg_cdebug.o:debug_msg.cc:function badref1: error: undefined reference to 'undef_int'" + check debug_msg_cdebug.err ".*/debug_msg.cc:50: error: undefined reference to 'undef_fn1()'" + check debug_msg_cdebug.err ".*/debug_msg.cc:55: error: undefined reference to 'undef_fn2()'" + check debug_msg_cdebug.err ".*/debug_msg.cc:43: error: undefined reference to 'undef_fn1()'" + check debug_msg_cdebug.err ".*/debug_msg.cc:44: error: undefined reference to 'undef_fn2()'" + check debug_msg_cdebug.err ".*/debug_msg.cc:.*: error: undefined reference to 'undef_int'" + check debug_msg_cdebug.err ".*/debug_msg.cc:43: error: undefined reference to 'undef_fn1()'" + check debug_msg_cdebug.err ".*/debug_msg.cc:44: error: undefined reference to 'undef_fn2()'" + check debug_msg_cdebug.err ".*/debug_msg.cc:.*: error: undefined reference to 'undef_int'" + check debug_msg_cdebug.err ": symbol 'Ordering::operator()(int, int)' defined in multiple places (possible ODR violation):" + check debug_msg_cdebug.err "odr_violation1.cc:6" + check debug_msg_cdebug.err "odr_violation2.cc:12" + check_missing debug_msg_cdebug.err "OdrDerived::~OdrDerived()" + check_missing debug_msg_cdebug.err "__adjust_heap" + check_missing debug_msg_cdebug.err ": symbol 'OverriddenCFunction' defined in multiple places (possible ODR violation):" + check_missing debug_msg_cdebug.err "odr_violation1.cc:16" + check_missing debug_msg_cdebug.err "odr_violation2.cc:23" + check debug_msg_cdebug.err ": symbol 'SometimesInlineFunction(int)' defined in multiple places (possible ODR violation):" + check debug_msg_cdebug.err "debug_msg.cc:68" + check debug_msg_cdebug.err "odr_violation2.cc:27" +fi + # When linking together .so's, we don't catch the line numbers, but we # still find all the undefined variables, and the ODR violation. check debug_msg_so.err "debug_msg.so: error: undefined reference to 'undef_fn1()'" @@ -98,14 +125,14 @@ check debug_msg_so.err "debug_msg.so: error: undefined reference to 'undef_int'" check debug_msg_so.err ": symbol 'Ordering::operator()(int, int)' defined in multiple places (possible ODR violation):" check debug_msg_so.err "odr_violation1.cc:6" check debug_msg_so.err "odr_violation2.cc:12" -check_missing debug_msg.err "OdrDerived::~OdrDerived()" -check_missing debug_msg.err "__adjust_heap" -check_missing debug_msg.err ": symbol 'OverriddenCFunction' defined in multiple places (possible ODR violation):" -check_missing debug_msg.err "odr_violation1.cc:16" -check_missing debug_msg.err "odr_violation2.cc:23" -check debug_msg.err ": symbol 'SometimesInlineFunction(int)' defined in multiple places (possible ODR violation):" -check debug_msg.err "debug_msg.cc:68" -check debug_msg.err "odr_violation2.cc:27" +check_missing debug_msg_so.err "OdrDerived::~OdrDerived()" +check_missing debug_msg_so.err "__adjust_heap" +check_missing debug_msg_so.err ": symbol 'OverriddenCFunction' defined in multiple places (possible ODR violation):" +check_missing debug_msg_so.err "odr_violation1.cc:16" +check_missing debug_msg_so.err "odr_violation2.cc:23" +check debug_msg_so.err ": symbol 'SometimesInlineFunction(int)' defined in multiple places (possible ODR violation):" +check debug_msg_so.err "debug_msg.cc:68" +check debug_msg_so.err "odr_violation2.cc:27" # These messages shouldn't need any debug info to detect: check debug_msg_ndebug.err "debug_msg_ndebug.so: error: undefined reference to 'undef_fn1()'" diff --git a/gold/testsuite/ifuncvar1.c b/gold/testsuite/ifuncvar1.c new file mode 100644 index 0000000..75af2a6 --- /dev/null +++ b/gold/testsuite/ifuncvar1.c @@ -0,0 +1,20 @@ +/* Test global variable initialized to hidden STT_GNU_IFUNC symbol. */ + +int didit; + +extern void doit (void); + +void +doit (void) +{ + didit = 1; +} + +void (*get_foo (void)) (void) __asm__ ("foo"); +__asm__ (".type foo, %gnu_indirect_function"); +__asm__ (".hidden foo"); + +void (*get_foo (void)) (void) +{ + return &doit; +} diff --git a/gold/testsuite/ifuncvar2.c b/gold/testsuite/ifuncvar2.c new file mode 100644 index 0000000..f09de0e --- /dev/null +++ b/gold/testsuite/ifuncvar2.c @@ -0,0 +1,12 @@ +/* Test global variable initialized to hidden STT_GNU_IFUNC symbol. */ + +extern void foo (void); +void (*f) (void) = &foo; + +extern void bar (void); + +void +bar (void) +{ + f (); +} diff --git a/gold/testsuite/ifuncvar3.c b/gold/testsuite/ifuncvar3.c new file mode 100644 index 0000000..e078b56 --- /dev/null +++ b/gold/testsuite/ifuncvar3.c @@ -0,0 +1,14 @@ +/* Test global variable initialized to hidden STT_GNU_IFUNC symbol. */ + +#include + +extern void bar (void); +extern int didit; + +int +main (void) +{ + bar (); + assert (didit == 1); + return 0; +} diff --git a/gold/testsuite/incr_comdat_test_1.cc b/gold/testsuite/incr_comdat_test_1.cc new file mode 100644 index 0000000..7a232c2 --- /dev/null +++ b/gold/testsuite/incr_comdat_test_1.cc @@ -0,0 +1,68 @@ +// incr_comdat_test_1.cc -- test incremental update with comdat sections + +// Copyright 2011 Free Software Foundation, Inc. +// Written by Cary Coutant . + +// This file is part of gold. + +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. + +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +// MA 02110-1301, USA. + +#include + +template +T GetMax(T a, T b) +{ + return a > b ? a : b; +} + +extern int foo(); + +int bar() +{ + return GetMax(4, 5); +} + +class A +{ + public: + int sum(int k) + { + static int total = 0; + total += k; + return total; + } +}; + +#define CHECK_EQ(var, expected) \ + do \ + { \ + if ((var) != (expected)) \ + { \ + printf(#var ": expected %d, found %d\n", expected, var); \ + return 1; \ + } \ + } \ + while (0) + +int main() +{ + A a; + CHECK_EQ(bar(), 5); + CHECK_EQ(foo(), 11); + CHECK_EQ(a.sum(55), 11 + 55); + CHECK_EQ(a.sum(66), 11 + 55 + 66); + return 0; +} diff --git a/gold/testsuite/incr_comdat_test_2_v1.cc b/gold/testsuite/incr_comdat_test_2_v1.cc new file mode 100644 index 0000000..f7d6a8c --- /dev/null +++ b/gold/testsuite/incr_comdat_test_2_v1.cc @@ -0,0 +1,44 @@ +// incr_comdat_test_2.cc -- test incremental update with comdat sections + +// Copyright 2011 Free Software Foundation, Inc. +// Written by Cary Coutant . + +// This file is part of gold. + +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. + +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +// MA 02110-1301, USA. + +template +T GetMax(T a, T b) +{ + return a > b ? a : b; +} + +class A +{ + public: + int sum(int k) + { + static int total = 0; + total += k; + return total; + } +}; + +int foo() +{ + A a; + return GetMax(10, a.sum(8)); +} diff --git a/gold/testsuite/incr_comdat_test_2_v2.cc b/gold/testsuite/incr_comdat_test_2_v2.cc new file mode 100644 index 0000000..fca7fda --- /dev/null +++ b/gold/testsuite/incr_comdat_test_2_v2.cc @@ -0,0 +1,44 @@ +// incr_comdat_test_2.cc -- test incremental update with comdat sections + +// Copyright 2011 Free Software Foundation, Inc. +// Written by Cary Coutant . + +// This file is part of gold. + +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. + +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +// MA 02110-1301, USA. + +template +T GetMax(T a, T b) +{ + return a > b ? a : b; +} + +class A +{ + public: + int sum(int k) + { + static int total = 0; + total += k; + return total; + } +}; + +int foo() +{ + A a; + return GetMax(10, a.sum(9)); +} diff --git a/gold/testsuite/incr_comdat_test_2_v3.cc b/gold/testsuite/incr_comdat_test_2_v3.cc new file mode 100644 index 0000000..cbb83c1 --- /dev/null +++ b/gold/testsuite/incr_comdat_test_2_v3.cc @@ -0,0 +1,44 @@ +// incr_comdat_test_2.cc -- test incremental update with comdat sections + +// Copyright 2011 Free Software Foundation, Inc. +// Written by Cary Coutant . + +// This file is part of gold. + +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. + +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +// MA 02110-1301, USA. + +template +T GetMax(T a, T b) +{ + return a > b ? a : b; +} + +class A +{ + public: + int sum(int k) + { + static int total = 0; + total += k; + return total; + } +}; + +int foo() +{ + A a; + return GetMax(10, a.sum(11)); +} diff --git a/gold/testsuite/initpri2.c b/gold/testsuite/initpri2.c new file mode 100644 index 0000000..525661f --- /dev/null +++ b/gold/testsuite/initpri2.c @@ -0,0 +1,118 @@ +/* initpri2.c -- test mixing init_array and ctor priorities. + + Copyright 2011 Free Software Foundation, Inc. + Copied from the gcc configury, where the test was contributed by + H.J. Lu . + + This file is part of gold. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +/* This tests that the linker correctly combines .ctor and .init_array + sections when both have priorities. */ + +#include + +static int count; + +static void +init1005 (void) +{ + if (count != 0) + abort (); + count = 1005; +} +void (*const init_array1005[]) (void) + __attribute__ ((section (".init_array.01005"), aligned (sizeof (void *)))) + = { init1005 }; +static void +fini1005 (void) +{ + if (count != 1005) + abort (); +} +void (*const fini_array1005[]) (void) + __attribute__ ((section (".fini_array.01005"), aligned (sizeof (void *)))) + = { fini1005 }; + +static void +ctor1007 (void) +{ + if (count != 1005) + abort (); + count = 1007; +} +void (*const ctors1007[]) (void) + __attribute__ ((section (".ctors.64528"), aligned (sizeof (void *)))) + = { ctor1007 }; +static void +dtor1007 (void) +{ + if (count != 1007) + abort (); + count = 1005; +} +void (*const dtors1007[]) (void) + __attribute__ ((section (".dtors.64528"), aligned (sizeof (void *)))) + = { dtor1007 }; + +static void +init65530 (void) +{ + if (count != 1007) + abort (); + count = 65530; +} +void (*const init_array65530[]) (void) + __attribute__ ((section (".init_array.65530"), aligned (sizeof (void *)))) + = { init65530 }; +static void +fini65530 (void) +{ + if (count != 65530) + abort (); + count = 1007; +} +void (*const fini_array65530[]) (void) + __attribute__ ((section (".fini_array.65530"), aligned (sizeof (void *)))) + = { fini65530 }; + +static void +ctor65535 (void) +{ + if (count != 65530) + abort (); + count = 65535; +} +void (*const ctors65535[]) (void) + __attribute__ ((section (".ctors"), aligned (sizeof (void *)))) + = { ctor65535 }; +static void +dtor65535 (void) +{ + if (count != 65535) + abort (); + count = 65530; +} +void (*const dtors65535[]) (void) + __attribute__ ((section (".dtors"), aligned (sizeof (void *)))) + = { dtor65535 }; + +int +main (void) +{ + return 0; +} diff --git a/gold/testsuite/initpri3.c b/gold/testsuite/initpri3.c new file mode 100644 index 0000000..01e233d --- /dev/null +++ b/gold/testsuite/initpri3.c @@ -0,0 +1,80 @@ +/* initpri3.c -- test ctor odering when using init_array. + + Copyright 2011 Free Software Foundation, Inc. + Written by Ian Lance Taylor . + + This file is part of gold. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +/* This tests that the linker correctly orders .ctor entries when + putting them into .init_array, as is the default. */ + +#include + +int i = 1; + +static void +ctor1 (void) +{ + assert (i == 1); + i = 2; +} + +static void +ctor2 (void) +{ + assert (i == 2); + i = 3; +} + +static void +dtor1 (void) +{ + assert (i == 3); + i = 2; +} + +static void +dtor2 (void) +{ + assert (i == 2); + i = 1; +} + +/* The .ctors section is run in reverse order, the .dtors section in + run in forward order. We give these arrays the "aligned" attribute + because the x86_64 ABI would otherwise give them a 16-byte + alignment, which may leave a hole in the section. */ + +void (*ctors[]) (void) + __attribute__ ((aligned (4), section (".ctors"))) = { + ctor2, + ctor1 +}; + +void (*dtors[]) (void) + __attribute__ ((aligned (4), section (".dtors"))) = { + dtor1, + dtor2 +}; + +int +main (void) +{ + assert (i == 3); + return 0; +} diff --git a/gold/testsuite/justsyms_exec.c b/gold/testsuite/justsyms_exec.c new file mode 100644 index 0000000..6155147 --- /dev/null +++ b/gold/testsuite/justsyms_exec.c @@ -0,0 +1,53 @@ +// justsyms_exec.c -- test --just-symbols for gold + +// Copyright 2011 Free Software Foundation, Inc. +// Written by Cary Coutant . + +// This file is part of gold. + +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. + +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +// MA 02110-1301, USA. + +// The Linux kernel builds an executable file using a linker script, and +// then links against that object file using the -R option. This is a +// test for that usage. + +#include + +extern int exported_func(void); + +extern int exported_data; + +static int errs = 0; + +void check(void *sym, long v, const char *name); + +void +check(void *sym, long v, const char *name) +{ + if (sym != (void *)v) + { + fprintf(stderr, "&%s is %8p, expected %08lx\n", name, sym, v); + errs++; + } +} + +int +main(void) +{ + check(exported_func, 0x1000200, "exported_func"); + check(&exported_data, 0x2000000, "exported_data"); + return errs; +} diff --git a/gold/testsuite/justsyms_lib.c b/gold/testsuite/justsyms_lib.c new file mode 100644 index 0000000..9666fb7 --- /dev/null +++ b/gold/testsuite/justsyms_lib.c @@ -0,0 +1,35 @@ +// justsyms_lib.cc -- test --just-symbols for gold + +// Copyright 2011 Free Software Foundation, Inc. +// Written by Cary Coutant . + +// This file is part of gold. + +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. + +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +// MA 02110-1301, USA. + +// This test goes with justsyms_exec.cc. We compile this file, then +// link it into an executable image with -Ttext and -Tdata to set +// the starting addresses for each segment. + +int exported_func(void); + +int exported_data = 0x1000; + +int +exported_func(void) +{ + return 1; +} diff --git a/gold/testsuite/object_unittest.cc b/gold/testsuite/object_unittest.cc index 0451add..7dedeae 100644 --- a/gold/testsuite/object_unittest.cc +++ b/gold/testsuite/object_unittest.cc @@ -23,6 +23,8 @@ #include "gold.h" #include "object.h" +#include "options.h" +#include "parameters.h" #include "test.h" #include "testfile.h" @@ -62,8 +64,11 @@ Sized_object_test(const unsigned char* test_file, unsigned int test_file_size) bool Object_test(Test_report*) { + General_options options; int fail = 0; + set_parameters_options(&options); + #ifdef HAVE_TARGET_32_LITTLE if (!Sized_object_test<32, false>(test_file_1_32_little, test_file_1_size_32_little)) diff --git a/gold/testsuite/odr_violation2.cc b/gold/testsuite/odr_violation2.cc index a159182..e3d30f3 100644 --- a/gold/testsuite/odr_violation2.cc +++ b/gold/testsuite/odr_violation2.cc @@ -12,7 +12,7 @@ class Ordering { bool Ordering::operator()(int a, int b) { // Optimization makes this operator() a different size than the one // in odr_violation1.cc. - return a + 1 > b + 1; + return a + 12345 > b / 67; } void SortDescending(int array[], int size) { diff --git a/gold/testsuite/plugin_test.c b/gold/testsuite/plugin_test.c index 9d095e8..47d400a 100644 --- a/gold/testsuite/plugin_test.c +++ b/gold/testsuite/plugin_test.c @@ -56,10 +56,17 @@ static ld_plugin_register_all_symbols_read register_all_symbols_read_hook = NULL static ld_plugin_register_cleanup register_cleanup_hook = NULL; static ld_plugin_add_symbols add_symbols = NULL; static ld_plugin_get_symbols get_symbols = NULL; +static ld_plugin_get_symbols get_symbols_v2 = NULL; static ld_plugin_add_input_file add_input_file = NULL; static ld_plugin_message message = NULL; static ld_plugin_get_input_file get_input_file = NULL; static ld_plugin_release_input_file release_input_file = NULL; +static ld_plugin_get_input_section_count get_input_section_count = NULL; +static ld_plugin_get_input_section_type get_input_section_type = NULL; +static ld_plugin_get_input_section_name get_input_section_name = NULL; +static ld_plugin_get_input_section_contents get_input_section_contents = NULL; +static ld_plugin_update_section_order update_section_order = NULL; +static ld_plugin_allow_section_ordering allow_section_ordering = NULL; #define MAXOPTS 10 @@ -114,6 +121,9 @@ onload(struct ld_plugin_tv *tv) case LDPT_GET_SYMBOLS: get_symbols = entry->tv_u.tv_get_symbols; break; + case LDPT_GET_SYMBOLS_V2: + get_symbols_v2 = entry->tv_u.tv_get_symbols; + break; case LDPT_ADD_INPUT_FILE: add_input_file = entry->tv_u.tv_add_input_file; break; @@ -126,6 +136,24 @@ onload(struct ld_plugin_tv *tv) case LDPT_RELEASE_INPUT_FILE: release_input_file = entry->tv_u.tv_release_input_file; break; + case LDPT_GET_INPUT_SECTION_COUNT: + get_input_section_count = *entry->tv_u.tv_get_input_section_count; + break; + case LDPT_GET_INPUT_SECTION_TYPE: + get_input_section_type = *entry->tv_u.tv_get_input_section_type; + break; + case LDPT_GET_INPUT_SECTION_NAME: + get_input_section_name = *entry->tv_u.tv_get_input_section_name; + break; + case LDPT_GET_INPUT_SECTION_CONTENTS: + get_input_section_contents = *entry->tv_u.tv_get_input_section_contents; + break; + case LDPT_UPDATE_SECTION_ORDER: + update_section_order = *entry->tv_u.tv_update_section_order; + break; + case LDPT_ALLOW_SECTION_ORDERING: + allow_section_ordering = *entry->tv_u.tv_allow_section_ordering; + break; default: break; } @@ -179,6 +207,42 @@ onload(struct ld_plugin_tv *tv) return LDPS_ERR; } + if (get_input_section_count == NULL) + { + fprintf(stderr, "tv_get_input_section_count interface missing\n"); + return LDPS_ERR; + } + + if (get_input_section_type == NULL) + { + fprintf(stderr, "tv_get_input_section_type interface missing\n"); + return LDPS_ERR; + } + + if (get_input_section_name == NULL) + { + fprintf(stderr, "tv_get_input_section_name interface missing\n"); + return LDPS_ERR; + } + + if (get_input_section_contents == NULL) + { + fprintf(stderr, "tv_get_input_section_contents interface missing\n"); + return LDPS_ERR; + } + + if (update_section_order == NULL) + { + fprintf(stderr, "tv_update_section_order interface missing\n"); + return LDPS_ERR; + } + + if (allow_section_ordering == NULL) + { + fprintf(stderr, "tv_allow_section_ordering interface missing\n"); + return LDPS_ERR; + } + return LDPS_OK; } @@ -334,9 +398,9 @@ all_symbols_read_hook(void) (*message)(LDPL_INFO, "all symbols read hook called"); - if (get_symbols == NULL) + if (get_symbols_v2 == NULL) { - fprintf(stderr, "tv_get_symbols interface missing\n"); + fprintf(stderr, "tv_get_symbols (v2) interface missing\n"); return LDPS_ERR; } @@ -344,7 +408,7 @@ all_symbols_read_hook(void) claimed_file != NULL; claimed_file = claimed_file->next) { - (*get_symbols)(claimed_file->handle, claimed_file->nsyms, + (*get_symbols_v2)(claimed_file->handle, claimed_file->nsyms, claimed_file->syms); for (i = 0; i < claimed_file->nsyms; ++i) @@ -363,6 +427,9 @@ all_symbols_read_hook(void) case LDPR_PREVAILING_DEF_IRONLY: res = "PREVAILING_DEF_IRONLY"; break; + case LDPR_PREVAILING_DEF_IRONLY_EXP: + res = "PREVAILING_DEF_IRONLY_EXP"; + break; case LDPR_PREEMPTED_REG: res = "PREEMPTED_REG"; break; diff --git a/gold/testsuite/plugin_test_3.sh b/gold/testsuite/plugin_test_3.sh index 961df15..39356d1 100755 --- a/gold/testsuite/plugin_test_3.sh +++ b/gold/testsuite/plugin_test_3.sh @@ -46,7 +46,7 @@ check plugin_test_3.err "two_file_test_main.o: claim file hook called" check plugin_test_3.err "two_file_test_1.syms: claim file hook called" check plugin_test_3.err "two_file_test_1b.syms: claim file hook called" check plugin_test_3.err "two_file_test_2.syms: claim file hook called" -check plugin_test_3.err "two_file_test_1.syms: _Z4f13iv: PREVAILING_DEF_REG" +check plugin_test_3.err "two_file_test_1.syms: _Z4f13iv: PREVAILING_DEF_IRONLY_EXP" check plugin_test_3.err "two_file_test_1.syms: _Z2t2v: PREVAILING_DEF_REG" check plugin_test_3.err "two_file_test_1.syms: v2: RESOLVED_IR" check plugin_test_3.err "two_file_test_1.syms: t17data: RESOLVED_IR" diff --git a/gold/testsuite/pr12826.sh b/gold/testsuite/pr12826.sh new file mode 100755 index 0000000..a4fa2e3 --- /dev/null +++ b/gold/testsuite/pr12826.sh @@ -0,0 +1,44 @@ +#!/bin/sh + +# pr12826.sh -- a test case for combining ARM arch attributes. + +# Copyright 2011 Free Software Foundation, Inc. +# Written by Doug Kwan . + +# This file is part of gold. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +# This file goes with pr12826_1.s and pr12826_2.s, two ARM assembly source +# files constructed to test handling of arch attributes. + +check() +{ + if ! grep -q "$2" "$1" + then + echo "Did not find attribute in $1:" + echo " $2" + echo "" + echo "Actual attribute below:" + cat "$1" + exit 1 + fi +} + +# Check that arch is armv7e-m. +check pr12826.stdout "Tag_CPU_arch: v7E-M" + +exit 0 diff --git a/gold/testsuite/pr12826_1.s b/gold/testsuite/pr12826_1.s new file mode 100644 index 0000000..b4f6841 --- /dev/null +++ b/gold/testsuite/pr12826_1.s @@ -0,0 +1,13 @@ + .syntax unified + .arch armv7e-m + .thumb + .text + .align 2 + .global f1 + .thumb + .thumb_func + .type f1, %function +f1: + movs r0, #0 + bx lr + .size f1, .-f1 diff --git a/gold/testsuite/pr12826_2.s b/gold/testsuite/pr12826_2.s new file mode 100644 index 0000000..2dd7dc9 --- /dev/null +++ b/gold/testsuite/pr12826_2.s @@ -0,0 +1,13 @@ + .syntax unified + .arch armv7e-m + .thumb + .text + .align 2 + .global f2 + .thumb + .thumb_func + .type f2, %function +f2: + movs r0, #0 + bx lr + .size f2, .-f2 diff --git a/gold/testsuite/protected_1.cc b/gold/testsuite/protected_1.cc index 9183312..049bda7 100644 --- a/gold/testsuite/protected_1.cc +++ b/gold/testsuite/protected_1.cc @@ -31,3 +31,28 @@ f1() { return 1; } + +// The function f2 is used to test that the executable can see the +// same function address for a protected function in the executable +// and in the shared library. We can't use the visibility attribute +// here, becaues that may cause gcc to generate a PC relative reloc; +// we need it to get the value from the GOT. I'm not sure this is +// really useful, given that it doesn't work with the visibility +// attribute. This test exists here mainly because the glibc +// testsuite has the same test, and we want to make sure that gold +// passes the glibc testsuite. + +extern "C" int f2(); +asm(".protected f2"); + +extern "C" int +f2() +{ + return 2; +} + +int +(*get_f2_addr())() +{ + return f2; +} diff --git a/gold/testsuite/protected_main_1.cc b/gold/testsuite/protected_main_1.cc index cc387a4..271446f 100644 --- a/gold/testsuite/protected_main_1.cc +++ b/gold/testsuite/protected_main_1.cc @@ -28,9 +28,13 @@ extern bool t1(); extern bool t2(); +extern "C" int f2(); +extern int (*get_f2_addr()) (); + int main() { assert(t1()); assert(t2()); + assert(&f2 == get_f2_addr()); } diff --git a/gold/testsuite/testfile.cc b/gold/testsuite/testfile.cc index 7f53792..93e716a 100644 --- a/gold/testsuite/testfile.cc +++ b/gold/testsuite/testfile.cc @@ -1,6 +1,6 @@ // testfile.cc -- Dummy ELF objects for testing purposes. -// Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -44,13 +44,14 @@ class Target_test : public Sized_target { } void - gc_process_relocs(Symbol_table*, Layout*, Sized_relobj*, + gc_process_relocs(Symbol_table*, Layout*, + Sized_relobj_file*, unsigned int, unsigned int, const unsigned char*, size_t, Output_section*, bool, size_t, const unsigned char*) { ERROR("call to Target_test::gc_process_relocs"); } void - scan_relocs(Symbol_table*, Layout*, Sized_relobj*, + scan_relocs(Symbol_table*, Layout*, Sized_relobj_file*, unsigned int, unsigned int, const unsigned char*, size_t, Output_section*, bool, size_t, const unsigned char*) { ERROR("call to Target_test::scan_relocs"); } @@ -64,7 +65,7 @@ class Target_test : public Sized_target void scan_relocatable_relocs(Symbol_table*, Layout*, - Sized_relobj*, unsigned int, + Sized_relobj_file*, unsigned int, unsigned int, const unsigned char*, size_t, Output_section*, bool, size_t, const unsigned char*, Relocatable_relocs*) @@ -93,6 +94,7 @@ const Target::Target_info Target_test::test_target_info = false, // has_resolve false, // has_code_fill false, // is_default_stack_executable + false, // can_icf_inline_merge_sections '\0', // wrap_char "/dummy", // dynamic_linker 0x08000000, // default_text_segment_address @@ -149,7 +151,7 @@ class Target_selector_test : public Target_selector { public: Target_selector_test() - : Target_selector(0xffff, size, big_endian, NULL) + : Target_selector(0xffff, size, big_endian, NULL, NULL) { } Target* diff --git a/gold/testsuite/tls_test_main.cc b/gold/testsuite/tls_test_main.cc index 0ff02c6..d781a15 100644 --- a/gold/testsuite/tls_test_main.cc +++ b/gold/testsuite/tls_test_main.cc @@ -1,6 +1,6 @@ // tls_test.cc -- test TLS variables for gold, main function -// Copyright 2006, 2007, 2008 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -26,40 +26,36 @@ #include #include #include +#include #include "tls_test.h" // We make these macros so the assert() will give useful line-numbers. -#define safe_lock(muptr) \ +#define safe_lock(semptr) \ do \ { \ - int err = pthread_mutex_lock(muptr); \ + int err = sem_wait(semptr); \ assert(err == 0); \ } \ while (0) -#define safe_unlock(muptr) \ +#define safe_unlock(semptr) \ do \ { \ - int err = pthread_mutex_unlock(muptr); \ + int err = sem_post(semptr); \ assert(err == 0); \ } \ while (0) -struct Mutex_set +struct Sem_set { - pthread_mutex_t mutex1; - pthread_mutex_t mutex2; - pthread_mutex_t mutex3; + sem_t sem1; + sem_t sem2; + sem_t sem3; }; -Mutex_set mutexes1 = { PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER }; - -Mutex_set mutexes2 = { PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER } ; +Sem_set sems1; +Sem_set sems2; bool failed = false; @@ -73,18 +69,19 @@ check(const char* name, bool val) } } -// The body of the thread function. This gets a lock on the first -// mutex, runs the tests, and then unlocks the second mutex. Then it -// locks the third mutex, and the runs the verification test again. +// The body of the thread function. This acquires the first +// semaphore, runs the tests, and then releases the second semaphore. +// Then it acquires the third semaphore, and the runs the verification +// test again. void* thread_routine(void* arg) { - Mutex_set* pms = static_cast(arg); + Sem_set* pms = static_cast(arg); - // Lock the first mutex. + // Acquire the first semaphore. if (pms) - safe_lock(&pms->mutex1); + safe_lock(&pms->sem1); // Run the tests. check("t1", t1()); @@ -103,13 +100,13 @@ thread_routine(void* arg) check("t12", t12()); check("t_last", t_last()); - // Unlock the second mutex. + // Release the second semaphore. if (pms) - safe_unlock(&pms->mutex2); + safe_unlock(&pms->sem2); - // Lock the third mutex. + // Acquire the third semaphore. if (pms) - safe_lock(&pms->mutex3); + safe_lock(&pms->sem3); check("t_last", t_last()); @@ -124,37 +121,38 @@ main() // First, as a sanity check, run through the tests in the "main" thread. thread_routine(0); - // Set up the mutex locks. We want the first thread to start right + // Set up the semaphores. We want the first thread to start right // away, tell us when it is done with the first part, and wait for // us to release it. We want the second thread to wait to start, // tell us when it is done with the first part, and wait for us to // release it. - safe_lock(&mutexes1.mutex2); - safe_lock(&mutexes1.mutex3); + sem_init(&sems1.sem1, 0, 1); + sem_init(&sems1.sem2, 0, 0); + sem_init(&sems1.sem3, 0, 0); - safe_lock(&mutexes2.mutex1); - safe_lock(&mutexes2.mutex2); - safe_lock(&mutexes2.mutex3); + sem_init(&sems2.sem1, 0, 0); + sem_init(&sems2.sem2, 0, 0); + sem_init(&sems2.sem3, 0, 0); pthread_t thread1; - int err = pthread_create(&thread1, NULL, thread_routine, &mutexes1); + int err = pthread_create(&thread1, NULL, thread_routine, &sems1); assert(err == 0); pthread_t thread2; - err = pthread_create(&thread2, NULL, thread_routine, &mutexes2); + err = pthread_create(&thread2, NULL, thread_routine, &sems2); assert(err == 0); // Wait for the first thread to complete the first part. - safe_lock(&mutexes1.mutex2); + safe_lock(&sems1.sem2); // Tell the second thread to start. - safe_unlock(&mutexes2.mutex1); + safe_unlock(&sems2.sem1); // Wait for the second thread to complete the first part. - safe_lock(&mutexes2.mutex2); + safe_lock(&sems2.sem2); // Tell the first thread to continue and finish. - safe_unlock(&mutexes1.mutex3); + safe_unlock(&sems1.sem3); // Wait for the first thread to finish. void* thread_val; @@ -163,7 +161,7 @@ main() assert(thread_val == 0); // Tell the second thread to continue and finish. - safe_unlock(&mutexes2.mutex3); + safe_unlock(&sems2.sem3); // Wait for the second thread to finish. err = pthread_join(thread2, &thread_val); diff --git a/gold/testsuite/two_file_test_1_v1.cc b/gold/testsuite/two_file_test_1_v1.cc new file mode 100644 index 0000000..2a23654 --- /dev/null +++ b/gold/testsuite/two_file_test_1_v1.cc @@ -0,0 +1,236 @@ +// two_file_test_1_v1.cc -- a two file test case for gold, file 1 of 2 + +// Copyright 2006, 2007, 2008, 2011 Free Software Foundation, Inc. +// Written by Ian Lance Taylor . + +// This file is part of gold. + +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. + +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +// MA 02110-1301, USA. + +// This is an alternate version of the source file two_file_test_1.cc, +// used to test incremental linking. We build a binary first using this +// source file, then do an incremental link with the primary version of +// the file. + +// This tests references between files. This is file 1, and +// two_file_test_2.cc is file 2. We test in several different ways: + +// Files 1 and 2 linked together in executable. +// File 1 in executable, file 2 in shared library. +// File 1 in shared library, file 2 in executable. +// Files 1 and 2 linked together in shared library. +// Files 1 and 2 in different shared libraries. + +// We test the following cases. + +// 1 Code in file 1 calls code in file 2. +// 2 Code in file 1 refers to global data in file 2. +// 3 Code in file 1 referes to common symbol in file 2. +// 4 Code in file 1 refers to offset within global data in file 2. +// 5 Code in file 1 refers to offset within common symbol in file 2. +// 6 Data in file 1 refers to global data in file 2. +// 7 Data in file 1 refers to common symbol in file 2. +// 8 Data in file 1 refers to offset within global data in file 2. +// 9 Data in file 1 refers to offset within common symbol in file 2. +// 10 Data in file 1 refers to function in file 2. +// 11 Pass function pointer from file 1 to file 2. +// 12 Compare address of function for equality in both files. +// 13 Compare address of inline function for equality in both files. +// 14 Compare string constants in file 1 and file 2. +// 15 Compare wide string constants in file 1 and file 2. +// 16 Call a function directly after its address has been taken. +// 17 File 1 checks array of string constants defined in file 2. +// 18 File 1 checks string constants referenced in code in file 2. + +#include "two_file_test.h" + +// 1 Code in file 1 calls code in file 2. + +bool +t1() +{ + return t1_2() == 0; // Intentionally wrong. +} + +// 2 Code in file 1 refers to global data in file 2. + +bool +t2() +{ + return v2 == 0; // Intentionally wrong. +} + +// 3 Code in file 1 referes to common symbol in file 2. + +bool +t3() +{ + return v3 == 0; // Intentionally wrong. +} + +// 4 Code in file 1 refers to offset within global data in file 2. + +bool +t4() +{ + return v4[5] == ','; +} + +// 5 Code in file 1 refers to offset within common symbol in file 2. + +bool +t5() +{ + return v5[7] == 'w'; +} + +// 6 Data in file 1 refers to global data in file 2. + +int* p6 = &v2; + +bool +t6() +{ + return *p6 == 456; +} + +// 7 Data in file 1 refers to common symbol in file 2. + +int* p7 = &v3; + +bool +t7() +{ + return *p7 == 789; +} + +// 8 Data in file 1 refers to offset within global data in file 2. + +char* p8 = &v4[6]; + +bool +t8() +{ + return *p8 == ' '; +} + +// 9 Data in file 1 refers to offset within common symbol in file 2. + +char* p9 = &v5[8]; + +bool +t9() +{ + return *p9 == 'o'; +} + +// 10 Data in file 1 refers to function in file 2. + +int (*pfn)() = &f10; + +bool +t10() +{ + return (*pfn)() == 135; +} + +// 11 Pass function pointer from file 1 to file 2. + +int +f11a() +{ + return 246; +} + +bool +t11() +{ + return f11b(&f11a) == 246; +} + +// 12 Compare address of function for equality in both files. + +bool +t12() +{ + return &t12 == f12(); +} + +// 13 Compare address of inline function for equality in both files. + +bool +t13() +{ + return &f13i == f13(); +} + +// 14 Compare string constants in file 1 and file 2. + +bool +t14() +{ + const char* s1 = TEST_STRING_CONSTANT; + const char* s2 = f14(); + while (*s1 != '\0') + if (*s1++ != *s2++) + return false; + return *s2 == '\0'; +} + +// 15 Compare wide string constants in file 1 and file 2. + +bool +t15() +{ + const wchar_t* s1 = TEST_WIDE_STRING_CONSTANT; + const wchar_t* s2 = f15(); + while (*s1 != '\0') + if (*s1++ != *s2++) + return false; + return *s2 == '\0'; +} + +// 16 Call a function directly after its address has been taken. + +bool +t16() +{ + return f10() == 135; +} + +// 17 File 1 checks array of string constants defined in file 2. + +bool +t17() +{ + char c = 'a'; + for (int i = 0; i < T17_COUNT; ++i) + { + if (t17data[i][0] != c || t17data[i][1] != '\0') + return false; + ++c; + } + return true; +} + +// 18 File 1 checks string constants referenced in code in file 2. + +bool +t18() +{ + // Stubbed out; full implementation in two_file_test_1.cc. + return true; +} diff --git a/gold/testsuite/two_file_test_1b_v1.cc b/gold/testsuite/two_file_test_1b_v1.cc new file mode 100644 index 0000000..0adaf84 --- /dev/null +++ b/gold/testsuite/two_file_test_1b_v1.cc @@ -0,0 +1,46 @@ +// two_file_test_1b_v1.cc -- supplementary file for a three-file test case +// for gold. + +// Copyright 2008, 2011 Free Software Foundation, Inc. +// Written by Cary Coutant . + +// This file is part of gold. + +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. + +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +// MA 02110-1301, USA. + +// This is an alternate version of the source file two_file_test_1b.cc, +// used to test incremental linking. We build a binary first using this +// source file, then do an incremental link with the primary version of +// the file. + +// This file is used as part of a mixed PIC/non-PIC test. +// Files 1 and 1b are linked together in a shared library. +// File 1 is compiled non-PIC, and file 1a is compiled PIC. +// File 2 is compiled PIC and linked in a second shared library. +// This tests that a non-PIC call does not accidentally get +// bound to a PIC PLT entry. + +// We test the following cases. + +#include "two_file_test.h" + +// 16 Call a function directly after its address has been taken. + +bool +t16a() +{ + return f10() == 125; +} diff --git a/gold/testsuite/two_file_test_2_v1.cc b/gold/testsuite/two_file_test_2_v1.cc new file mode 100644 index 0000000..ea26c66 --- /dev/null +++ b/gold/testsuite/two_file_test_2_v1.cc @@ -0,0 +1,150 @@ +// two_file_test_2_v1.cc -- a two file test case for gold, file 2 of 2 + +// Copyright 2006, 2007, 2008 Free Software Foundation, Inc. +// Written by Ian Lance Taylor . + +// This file is part of gold. + +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. + +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +// MA 02110-1301, USA. + +// This is an alternate version of the source file two_file_test_2.cc, +// used to test incremental linking. We build a binary first using this +// source file, then do an incremental link with the primary version of +// the file. + +// This tests references between files. This is file 2, and +// two_file_test_1.cc is file 1. See file 1 for details. + +#include "two_file_test.h" + +// 1 Code in file 1 calls code in file 2. + +int +t1_2() +{ + return 0; +} + +bool +t1a() +{ + return t1_2() == 0; +} + +// 2 Code in file 1 refers to global data in file 2. + +int v2 = 1; + +// 3 Code in file 1 referes to common symbol in file 2. This is +// initialized at runtime to 789. + +int v3; + +// 4 Code in file 1 refers to offset within global data in file 2. + +char v4[] = "World, hello"; + +// 5 Code in file 1 refers to offset within common symbol in file 2. +// This is initialized at runtime to a copy of v4. + +char v5[13]; + +// 6 Data in file 1 refers to global data in file 2. This reuses v2. + +// 7 Data in file 1 refers to common symbol in file 2. This reuses v3. + +// 8 Data in file 1 refers to offset within global data in file 2. +// This reuses v4. + +// 9 Data in file 1 refers to offset within common symbol in file 2. +// This reuses v5. + +// 10 Data in file 1 refers to function in file 2. + +int +f10() +{ + return 0; +} + +// 11 Pass function pointer from file 1 to file 2. + +int +f11b(int (*pfn)()) +{ + return (*pfn)(); +} + +// 12 Compare address of function for equality in both files. + +bool +(*f12())() +{ + return &t12; +} + +// 13 Compare address of inline function for equality in both files. + +void +(*f13())() +{ + return &f13i; +} + +// 14 Compare string constants in file 1 and file 2. + +const char* +f14() +{ + return TEST_STRING_CONSTANT; +} + +// 15 Compare wide string constants in file 1 and file 2. + +const wchar_t* +f15() +{ + return TEST_WIDE_STRING_CONSTANT; +} + +// 17 File 1 checks array of string constants defined in file 2. + +const char* t17data[T17_COUNT] = +{ + "0", "1", "2", "3", "4" +}; + +// 18 File 1 checks string constants referenced directly in file 2. + +const char* +f18(int i) +{ + switch (i) + { + case 0: + return "0"; + case 1: + return "1"; + case 2: + return "2"; + case 3: + return "3"; + case 4: + return "4"; + default: + return 0; + } +} diff --git a/gold/testsuite/weak_alias_test.script b/gold/testsuite/weak_alias_test.script new file mode 100644 index 0000000..1911631 --- /dev/null +++ b/gold/testsuite/weak_alias_test.script @@ -0,0 +1,8 @@ +VER1 { + global: + versioned_symbol; +}; +VER2 { + global: + versioned_alias; +}; diff --git a/gold/testsuite/weak_alias_test_5.cc b/gold/testsuite/weak_alias_test_5.cc new file mode 100644 index 0000000..df48092 --- /dev/null +++ b/gold/testsuite/weak_alias_test_5.cc @@ -0,0 +1,39 @@ +// weak_alias_test_5.cc -- test versioned weak aliases for gold + +// Copyright 2011 Free Software Foundation, Inc. +// Written by Ian Lance Taylor . + +// This file is part of gold. + +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. + +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +// MA 02110-1301, USA. + +// Define a versioned symbol. +int versioned_symbol = 1; +__asm__(".symver versioned_symbol,versioned_symbol@@VER1"); + +// Define a weak alias for the versioned symbol, with a different version. +extern int versioned_alias __attribute__ ((weak, alias("versioned_symbol"))); +__asm__(".symver versioned_alias,versioned_alias@@VER2"); + +bool +t2() +{ + if (versioned_symbol != 1) + return false; + if (versioned_alias != 1) + return false; + return true; +} diff --git a/gold/testsuite/weak_alias_test_main.cc b/gold/testsuite/weak_alias_test_main.cc index 070eb2f..e3f8620 100644 --- a/gold/testsuite/weak_alias_test_main.cc +++ b/gold/testsuite/weak_alias_test_main.cc @@ -39,7 +39,12 @@ int weak_aliased_2 = 6; extern int strong_aliased_3; extern int weak_aliased_4; +// Defined in weak_alias_test_5.cc +extern int versioned_symbol; +extern int versioned_alias; + extern bool t1(); +extern bool t2(); int main() @@ -64,4 +69,12 @@ main() // Make sure the symbols look right from a shared library. assert(t1()); + + // versioned_symbol comes from weak_alias_test_5.cc. + assert(versioned_symbol == 1); + // So does versioned_alias. + assert(versioned_alias == 1); + + // Make sure the versioned symbols look right from a shared library. + assert(t2()); } diff --git a/gold/workqueue-internal.h b/gold/workqueue-internal.h index 684c65b..764dc91 100644 --- a/gold/workqueue-internal.h +++ b/gold/workqueue-internal.h @@ -56,7 +56,7 @@ class Workqueue_threader // Return whether to cancel the current thread. virtual bool - should_cancel_thread() = 0; + should_cancel_thread(int thread_number) = 0; protected: // Get the Workqueue. @@ -84,7 +84,7 @@ class Workqueue_threader_threadpool : public Workqueue_threader // Return whether to cancel a thread. bool - should_cancel_thread(); + should_cancel_thread(int thread_number); // Process all tasks. This keeps running until told to cancel. void diff --git a/gold/workqueue-threads.cc b/gold/workqueue-threads.cc index 60d4adc..de2ce5b 100644 --- a/gold/workqueue-threads.cc +++ b/gold/workqueue-threads.cc @@ -174,7 +174,7 @@ Workqueue_threader_threadpool::set_thread_count(int thread_count) // Return whether the current thread should be cancelled. bool -Workqueue_threader_threadpool::should_cancel_thread() +Workqueue_threader_threadpool::should_cancel_thread(int thread_number) { // Fast exit without taking a lock. if (!this->check_thread_count_) @@ -182,12 +182,13 @@ Workqueue_threader_threadpool::should_cancel_thread() { Hold_lock hl(this->lock_); - if (this->threads_ > this->desired_thread_count_) + if (thread_number > this->desired_thread_count_) { --this->threads_; + if (this->threads_ <= this->desired_thread_count_) + this->check_thread_count_ = 0; return true; } - this->check_thread_count_ = 0; } return false; diff --git a/gold/workqueue.cc b/gold/workqueue.cc index 6449bba..e78e86b 100644 --- a/gold/workqueue.cc +++ b/gold/workqueue.cc @@ -110,7 +110,7 @@ class Workqueue_threader_single : public Workqueue_threader { gold_assert(thread_count > 0); } bool - should_cancel_thread() + should_cancel_thread(int) { return false; } }; @@ -202,9 +202,9 @@ Workqueue::queue_next(Task* t) // Return whether to cancel the current thread. inline bool -Workqueue::should_cancel_thread() +Workqueue::should_cancel_thread(int thread_number) { - return this->threader_->should_cancel_thread(); + return this->threader_->should_cancel_thread(thread_number); } // Find a runnable task in TASKS. Return NULL if none could be found. @@ -264,7 +264,7 @@ Workqueue::find_runnable_or_wait(int thread_number) return NULL; } - if (this->should_cancel_thread()) + if (this->should_cancel_thread(thread_number)) return NULL; gold_debug(DEBUG_TASK, "%3d sleeping", thread_number); diff --git a/gold/workqueue.h b/gold/workqueue.h index 9121e10..424b5e7 100644 --- a/gold/workqueue.h +++ b/gold/workqueue.h @@ -268,7 +268,7 @@ class Workqueue // Return whether to cancel this thread. bool - should_cancel_thread(); + should_cancel_thread(int thread_number); // Master Workqueue lock. This controls access to the following // member variables. diff --git a/gold/x86_64.cc b/gold/x86_64.cc index 5ba15c4..e6b0021 100644 --- a/gold/x86_64.cc +++ b/gold/x86_64.cc @@ -1,6 +1,6 @@ // x86_64.cc -- x86_64 target support for gold. -// Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +// Copyright 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. // Written by Ian Lance Taylor . // This file is part of gold. @@ -25,6 +25,7 @@ #include #include "elfcpp.h" +#include "dwarf.h" #include "parameters.h" #include "reloc.h" #include "x86_64.h" @@ -53,18 +54,50 @@ class Output_data_plt_x86_64 : public Output_section_data public: typedef Output_data_reloc Reloc_section; - Output_data_plt_x86_64(Symbol_table*, Layout*, Output_data_got<64, false>*, - Output_data_space*); + Output_data_plt_x86_64(Layout* layout, Output_data_got<64, false>* got, + Output_data_space* got_plt, + Output_data_space* got_irelative) + : Output_section_data(16), layout_(layout), tlsdesc_rel_(NULL), + irelative_rel_(NULL), got_(got), got_plt_(got_plt), + got_irelative_(got_irelative), count_(0), irelative_count_(0), + tlsdesc_got_offset_(-1U), free_list_() + { this->init(layout); } + + Output_data_plt_x86_64(Layout* layout, Output_data_got<64, false>* got, + Output_data_space* got_plt, + Output_data_space* got_irelative, + unsigned int plt_count) + : Output_section_data((plt_count + 1) * plt_entry_size, 16, false), + layout_(layout), tlsdesc_rel_(NULL), irelative_rel_(NULL), got_(got), + got_plt_(got_plt), got_irelative_(got_irelative), count_(plt_count), + irelative_count_(0), tlsdesc_got_offset_(-1U), free_list_() + { + this->init(layout); + + // Initialize the free list and reserve the first entry. + this->free_list_.init((plt_count + 1) * plt_entry_size, false); + this->free_list_.remove(0, plt_entry_size); + } + + // Initialize the PLT section. + void + init(Layout* layout); // Add an entry to the PLT. void - add_entry(Symbol* gsym); + add_entry(Symbol_table*, Layout*, Symbol* gsym); // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. unsigned int - add_local_ifunc_entry(Sized_relobj<64, false>* relobj, + add_local_ifunc_entry(Symbol_table* symtab, Layout*, + Sized_relobj_file<64, false>* relobj, unsigned int local_sym_index); + // Add the relocation for a PLT entry. + void + add_relocation(Symbol_table*, Layout*, Symbol* gsym, + unsigned int got_offset); + // Add the reserved TLSDESC_PLT entry to the PLT. void reserve_tlsdesc_entry(unsigned int got_offset) @@ -83,7 +116,7 @@ class Output_data_plt_x86_64 : public Output_section_data // Return the offset of the reserved TLSDESC_PLT entry. unsigned int get_tlsdesc_plt_offset() const - { return (this->count_ + 1) * plt_entry_size; } + { return (this->count_ + this->irelative_count_ + 1) * plt_entry_size; } // Return the .rela.plt section data. Reloc_section* @@ -94,10 +127,20 @@ class Output_data_plt_x86_64 : public Output_section_data Reloc_section* rela_tlsdesc(Layout*); + // Return where the IRELATIVE relocations should go in the PLT + // relocations. + Reloc_section* + rela_irelative(Symbol_table*, Layout*); + + // Return whether we created a section for IRELATIVE relocations. + bool + has_irelative_section() const + { return this->irelative_rel_ != NULL; } + // Return the number of PLT entries. unsigned int entry_count() const - { return this->count_; } + { return this->count_ + this->irelative_count_; } // Return the offset of the first non-reserved PLT entry. static unsigned int @@ -109,6 +152,22 @@ class Output_data_plt_x86_64 : public Output_section_data get_plt_entry_size() { return plt_entry_size; } + // Reserve a slot in the PLT for an existing symbol in an incremental update. + void + reserve_slot(unsigned int plt_index) + { + this->free_list_.remove((plt_index + 1) * plt_entry_size, + (plt_index + 2) * plt_entry_size); + } + + // Return the PLT address to use for a global symbol. + uint64_t + address_for_global(const Symbol*); + + // Return the PLT address to use for a local symbol. + uint64_t + address_for_local(const Relobj*, unsigned int symndx); + protected: void do_adjust_output_section(Output_section* os); @@ -125,13 +184,19 @@ class Output_data_plt_x86_64 : public Output_section_data // The first entry in the PLT. // From the AMD64 ABI: "Unlike Intel386 ABI, this ABI uses the same // procedure linkage table for both programs and shared objects." - static unsigned char first_plt_entry[plt_entry_size]; + static const unsigned char first_plt_entry[plt_entry_size]; // Other entries in the PLT for an executable. - static unsigned char plt_entry[plt_entry_size]; + static const unsigned char plt_entry[plt_entry_size]; // The reserved TLSDESC entry in the PLT for an executable. - static unsigned char tlsdesc_plt_entry[plt_entry_size]; + static const unsigned char tlsdesc_plt_entry[plt_entry_size]; + + // The .eh_frame unwind information for the PLT. + static const int plt_eh_frame_cie_size = 16; + static const int plt_eh_frame_fde_size = 32; + static const unsigned char plt_eh_frame_cie[plt_eh_frame_cie_size]; + static const unsigned char plt_eh_frame_fde[plt_eh_frame_fde_size]; // Set the final size. void @@ -141,19 +206,33 @@ class Output_data_plt_x86_64 : public Output_section_data void do_write(Output_file*); + // A pointer to the Layout class, so that we can find the .dynamic + // section when we write out the GOT PLT section. + Layout* layout_; // The reloc section. Reloc_section* rel_; // The TLSDESC relocs, if necessary. These must follow the regular // PLT relocs. Reloc_section* tlsdesc_rel_; + // The IRELATIVE relocs, if necessary. These must follow the + // regular PLT relocations and the TLSDESC relocations. + Reloc_section* irelative_rel_; // The .got section. Output_data_got<64, false>* got_; // The .got.plt section. Output_data_space* got_plt_; + // The part of the .got.plt section used for IRELATIVE relocs. + Output_data_space* got_irelative_; // The number of PLT entries. unsigned int count_; + // Number of PLT entries with R_X86_64_IRELATIVE relocs. These + // follow the regular PLT entries. + unsigned int irelative_count_; // Offset of the reserved TLSDESC_GOT entry when needed. unsigned int tlsdesc_got_offset_; + // List of available regions within the section, for incremental + // update links. + Free_list free_list_; }; // The x86_64 target class. @@ -163,7 +242,7 @@ class Output_data_plt_x86_64 : public Output_section_data // http://people.redhat.com/drepper/tls.pdf // http://www.lsd.ic.unicamp.br/~oliva/writeups/TLS/RFC-TLSDESC-x86.txt -class Target_x86_64 : public Target_freebsd<64, false> +class Target_x86_64 : public Sized_target<64, false> { public: // In the x86_64 ABI (p 68), it says "The AMD64 ABI architectures @@ -171,28 +250,14 @@ class Target_x86_64 : public Target_freebsd<64, false> typedef Output_data_reloc Reloc_section; Target_x86_64() - : Target_freebsd<64, false>(&x86_64_info), - got_(NULL), plt_(NULL), got_plt_(NULL), got_tlsdesc_(NULL), - global_offset_table_(NULL), rela_dyn_(NULL), - copy_relocs_(elfcpp::R_X86_64_COPY), dynbss_(NULL), - got_mod_index_offset_(-1U), tlsdesc_reloc_info_(), + : Sized_target<64, false>(&x86_64_info), + got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL), + got_tlsdesc_(NULL), global_offset_table_(NULL), rela_dyn_(NULL), + rela_irelative_(NULL), copy_relocs_(elfcpp::R_X86_64_COPY), + dynbss_(NULL), got_mod_index_offset_(-1U), tlsdesc_reloc_info_(), tls_base_symbol_defined_(false) { } - // This function should be defined in targets that can use relocation - // types to determine (implemented in local_reloc_may_be_function_pointer - // and global_reloc_may_be_function_pointer) - // if a function's pointer is taken. ICF uses this in safe mode to only - // fold those functions whose pointer is defintely not taken. For x86_64 - // pie binaries, safe ICF cannot be done by looking at relocation types. - inline bool - can_check_for_function_pointers() const - { return !parameters->options().pie(); } - - virtual bool - can_icf_inline_merge_sections () const - { return true; } - // Hook for a new output section. void do_new_output_section(Output_section*) const; @@ -201,7 +266,7 @@ class Target_x86_64 : public Target_freebsd<64, false> void gc_process_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -215,7 +280,7 @@ class Target_x86_64 : public Target_freebsd<64, false> void scan_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -251,7 +316,7 @@ class Target_x86_64 : public Target_freebsd<64, false> void scan_relocatable_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -301,13 +366,27 @@ class Target_x86_64 : public Target_freebsd<64, false> do_reloc_addend(void* arg, unsigned int r_type, uint64_t addend) const; // Return the PLT section. - Output_data* - do_plt_section_for_global(const Symbol*) const - { return this->plt_section(); } + uint64_t + do_plt_address_for_global(const Symbol* gsym) const + { return this->plt_section()->address_for_global(gsym); } - Output_data* - do_plt_section_for_local(const Relobj*, unsigned int) const - { return this->plt_section(); } + uint64_t + do_plt_address_for_local(const Relobj* relobj, unsigned int symndx) const + { return this->plt_section()->address_for_local(relobj, symndx); } + + // This function should be defined in targets that can use relocation + // types to determine (implemented in local_reloc_may_be_function_pointer + // and global_reloc_may_be_function_pointer) + // if a function's pointer is taken. ICF uses this in safe mode to only + // fold those functions whose pointer is defintely not taken. For x86_64 + // pie binaries, safe ICF cannot be done by looking at relocation types. + bool + do_can_check_for_function_pointers() const + { return !parameters->options().pie(); } + + // Return the base for a DW_EH_PE_datarel encoding. + uint64_t + do_ehframe_datarel_base() const; // Adjust -fsplit-stack code which calls non-split-stack code. void @@ -345,9 +424,50 @@ class Target_x86_64 : public Target_freebsd<64, false> unsigned int plt_entry_size() const; + // Create the GOT section for an incremental update. + Output_data_got<64, false>* + init_got_plt_for_update(Symbol_table* symtab, + Layout* layout, + unsigned int got_count, + unsigned int plt_count); + + // Reserve a GOT entry for a local symbol, and regenerate any + // necessary dynamic relocations. + void + reserve_local_got_entry(unsigned int got_index, + Sized_relobj<64, false>* obj, + unsigned int r_sym, + unsigned int got_type); + + // Reserve a GOT entry for a global symbol, and regenerate any + // necessary dynamic relocations. + void + reserve_global_got_entry(unsigned int got_index, Symbol* gsym, + unsigned int got_type); + + // Register an existing PLT entry for a global symbol. + void + register_global_plt_entry(Symbol_table*, Layout*, unsigned int plt_index, + Symbol* gsym); + + // Force a COPY relocation for a given symbol. + void + emit_copy_reloc(Symbol_table*, Symbol*, Output_section*, off_t); + + // Apply an incremental relocation. + void + apply_relocation(const Relocate_info<64, false>* relinfo, + elfcpp::Elf_types<64>::Elf_Addr r_offset, + unsigned int r_type, + elfcpp::Elf_types<64>::Elf_Swxword r_addend, + const Symbol* gsym, + unsigned char* view, + elfcpp::Elf_types<64>::Elf_Addr address, + section_size_type view_size); + // Add a new reloc argument, returning the index in the vector. size_t - add_tlsdesc_info(Sized_relobj<64, false>* object, unsigned int r_sym) + add_tlsdesc_info(Sized_relobj_file<64, false>* object, unsigned int r_sym) { this->tlsdesc_reloc_info_.push_back(Tlsdesc_info(object, r_sym)); return this->tlsdesc_reloc_info_.size() - 1; @@ -367,7 +487,7 @@ class Target_x86_64 : public Target_freebsd<64, false> inline void local(Symbol_table* symtab, Layout* layout, Target_x86_64* target, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela<64, false>& reloc, unsigned int r_type, @@ -375,7 +495,7 @@ class Target_x86_64 : public Target_freebsd<64, false> inline void global(Symbol_table* symtab, Layout* layout, Target_x86_64* target, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela<64, false>& reloc, unsigned int r_type, @@ -384,7 +504,7 @@ class Target_x86_64 : public Target_freebsd<64, false> inline bool local_reloc_may_be_function_pointer(Symbol_table* symtab, Layout* layout, Target_x86_64* target, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela<64, false>& reloc, @@ -394,7 +514,7 @@ class Target_x86_64 : public Target_freebsd<64, false> inline bool global_reloc_may_be_function_pointer(Symbol_table* symtab, Layout* layout, Target_x86_64* target, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela<64, false>& reloc, @@ -403,20 +523,21 @@ class Target_x86_64 : public Target_freebsd<64, false> private: static void - unsupported_reloc_local(Sized_relobj<64, false>*, unsigned int r_type); + unsupported_reloc_local(Sized_relobj_file<64, false>*, unsigned int r_type); static void - unsupported_reloc_global(Sized_relobj<64, false>*, unsigned int r_type, + unsupported_reloc_global(Sized_relobj_file<64, false>*, unsigned int r_type, Symbol*); void - check_non_pic(Relobj*, unsigned int r_type); + check_non_pic(Relobj*, unsigned int r_type, Symbol*); inline bool possible_function_pointer_reloc(unsigned int r_type); bool - reloc_needs_plt_for_ifunc(Sized_relobj<64, false>*, unsigned int r_type); + reloc_needs_plt_for_ifunc(Sized_relobj_file<64, false>*, + unsigned int r_type); // Whether we have issued an error about a non-PIC compilation. bool issued_non_pic_error_; @@ -565,7 +686,7 @@ class Target_x86_64 : public Target_freebsd<64, false> // Create a PLT entry for a local STT_GNU_IFUNC symbol. void make_local_ifunc_plt_entry(Symbol_table*, Layout*, - Sized_relobj<64, false>* relobj, + Sized_relobj_file<64, false>* relobj, unsigned int local_sym_index); // Define the _TLS_MODULE_BASE_ symbol in the TLS segment. @@ -579,7 +700,7 @@ class Target_x86_64 : public Target_freebsd<64, false> // Create a GOT entry for the TLS module index. unsigned int got_mod_index_entry(Symbol_table* symtab, Layout* layout, - Sized_relobj<64, false>* object); + Sized_relobj_file<64, false>* object); // Get the PLT section. Output_data_plt_x86_64* @@ -597,10 +718,14 @@ class Target_x86_64 : public Target_freebsd<64, false> Reloc_section* rela_tlsdesc_section(Layout*) const; + // Get the section to use for IRELATIVE relocations. + Reloc_section* + rela_irelative_section(Layout*); + // Add a potential copy relocation. void copy_reloc(Symbol_table* symtab, Layout* layout, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int shndx, Output_section* output_section, Symbol* sym, const elfcpp::Rela<64, false>& reloc) { @@ -631,12 +756,12 @@ class Target_x86_64 : public Target_freebsd<64, false> // R_X86_64_TLSDESC against a local symbol. struct Tlsdesc_info { - Tlsdesc_info(Sized_relobj<64, false>* a_object, unsigned int a_r_sym) + Tlsdesc_info(Sized_relobj_file<64, false>* a_object, unsigned int a_r_sym) : object(a_object), r_sym(a_r_sym) { } // The object in which the local symbol is defined. - Sized_relobj<64, false>* object; + Sized_relobj_file<64, false>* object; // The local symbol index in the object. unsigned int r_sym; }; @@ -647,12 +772,16 @@ class Target_x86_64 : public Target_freebsd<64, false> Output_data_plt_x86_64* plt_; // The GOT PLT section. Output_data_space* got_plt_; + // The GOT section for IRELATIVE relocations. + Output_data_space* got_irelative_; // The GOT section for TLSDESC relocations. Output_data_got<64, false>* got_tlsdesc_; // The _GLOBAL_OFFSET_TABLE_ symbol. Symbol* global_offset_table_; // The dynamic reloc section. Reloc_section* rela_dyn_; + // The section to use for IRELATIVE relocs. + Reloc_section* rela_irelative_; // Relocs saved to avoid a COPY reloc. Copy_relocs copy_relocs_; // Space for variables copied with a COPY reloc. @@ -676,6 +805,7 @@ const Target::Target_info Target_x86_64::x86_64_info = false, // has_resolve true, // has_code_fill true, // is_default_stack_executable + true, // can_icf_inline_merge_sections '\0', // wrap_char "/lib/ld64.so.1", // program interpreter 0x400000, // default_text_segment_address @@ -708,26 +838,39 @@ Target_x86_64::got_section(Symbol_table* symtab, Layout* layout) { gold_assert(symtab != NULL && layout != NULL); + // When using -z now, we can treat .got.plt as a relro section. + // Without -z now, it is modified after program startup by lazy + // PLT relocations. + bool is_got_plt_relro = parameters->options().now(); + Output_section_order got_order = (is_got_plt_relro + ? ORDER_RELRO + : ORDER_RELRO_LAST); + Output_section_order got_plt_order = (is_got_plt_relro + ? ORDER_RELRO + : ORDER_NON_RELRO_FIRST); + this->got_ = new Output_data_got<64, false>(); layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), - this->got_, ORDER_RELRO_LAST, - true); + this->got_, got_order, true); this->got_plt_ = new Output_data_space(8, "** GOT PLT"); layout->add_output_section_data(".got.plt", elfcpp::SHT_PROGBITS, (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), - this->got_plt_, ORDER_NON_RELRO_FIRST, - false); + this->got_plt_, got_plt_order, + is_got_plt_relro); // The first three entries are reserved. this->got_plt_->set_current_data_size(3 * 8); - // Those bytes can go into the relro segment. - layout->increase_relro(3 * 8); + if (!is_got_plt_relro) + { + // Those bytes can go into the relro segment. + layout->increase_relro(3 * 8); + } // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT. this->global_offset_table_ = @@ -739,14 +882,23 @@ Target_x86_64::got_section(Symbol_table* symtab, Layout* layout) elfcpp::STV_HIDDEN, 0, false, false); + // If there are any IRELATIVE relocations, they get GOT entries + // in .got.plt after the jump slot entries. + this->got_irelative_ = new Output_data_space(8, "** GOT IRELATIVE PLT"); + layout->add_output_section_data(".got.plt", elfcpp::SHT_PROGBITS, + (elfcpp::SHF_ALLOC + | elfcpp::SHF_WRITE), + this->got_irelative_, + got_plt_order, is_got_plt_relro); + // If there are any TLSDESC relocations, they get GOT entries in - // .got.plt after the jump slot entries. + // .got.plt after the jump slot and IRELATIVE entries. this->got_tlsdesc_ = new Output_data_got<64, false>(); layout->add_output_section_data(".got.plt", elfcpp::SHT_PROGBITS, (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), this->got_tlsdesc_, - ORDER_NON_RELRO_FIRST, false); + got_plt_order, is_got_plt_relro); } return this->got_; @@ -768,39 +920,43 @@ Target_x86_64::rela_dyn_section(Layout* layout) return this->rela_dyn_; } -// Create the PLT section. The ordinary .got section is an argument, -// since we need to refer to the start. We also create our own .got -// section just for PLT entries. +// Get the section to use for IRELATIVE relocs, creating it if +// necessary. These go in .rela.dyn, but only after all other dynamic +// relocations. They need to follow the other dynamic relocations so +// that they can refer to global variables initialized by those +// relocs. + +Target_x86_64::Reloc_section* +Target_x86_64::rela_irelative_section(Layout* layout) +{ + if (this->rela_irelative_ == NULL) + { + // Make sure we have already created the dynamic reloc section. + this->rela_dyn_section(layout); + this->rela_irelative_ = new Reloc_section(false); + layout->add_output_section_data(".rela.dyn", elfcpp::SHT_RELA, + elfcpp::SHF_ALLOC, this->rela_irelative_, + ORDER_DYNAMIC_RELOCS, false); + gold_assert(this->rela_dyn_->output_section() + == this->rela_irelative_->output_section()); + } + return this->rela_irelative_; +} + +// Initialize the PLT section. -Output_data_plt_x86_64::Output_data_plt_x86_64(Symbol_table* symtab, - Layout* layout, - Output_data_got<64, false>* got, - Output_data_space* got_plt) - : Output_section_data(8), tlsdesc_rel_(NULL), got_(got), got_plt_(got_plt), - count_(0), tlsdesc_got_offset_(-1U) +void +Output_data_plt_x86_64::init(Layout* layout) { this->rel_ = new Reloc_section(false); layout->add_output_section_data(".rela.plt", elfcpp::SHT_RELA, elfcpp::SHF_ALLOC, this->rel_, ORDER_DYNAMIC_PLT_RELOCS, false); - if (parameters->doing_static_link()) - { - // A statically linked executable will only have a .rela.plt - // section to hold R_X86_64_IRELATIVE relocs for STT_GNU_IFUNC - // symbols. The library will use these symbols to locate the - // IRELATIVE relocs at program startup time. - symtab->define_in_output_data("__rela_iplt_start", NULL, - Symbol_table::PREDEFINED, - this->rel_, 0, 0, elfcpp::STT_NOTYPE, - elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, - 0, false, true); - symtab->define_in_output_data("__rela_iplt_end", NULL, - Symbol_table::PREDEFINED, - this->rel_, 0, 0, elfcpp::STT_NOTYPE, - elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, - 0, true, true); - } + // Add unwind information if requested. + if (parameters->options().ld_generated_unwind_info()) + layout->add_eh_frame_for_plt(this, plt_eh_frame_cie, plt_eh_frame_cie_size, + plt_eh_frame_fde, plt_eh_frame_fde_size); } void @@ -812,35 +968,74 @@ Output_data_plt_x86_64::do_adjust_output_section(Output_section* os) // Add an entry to the PLT. void -Output_data_plt_x86_64::add_entry(Symbol* gsym) +Output_data_plt_x86_64::add_entry(Symbol_table* symtab, Layout* layout, + Symbol* gsym) { gold_assert(!gsym->has_plt_offset()); - // Note that when setting the PLT offset we skip the initial - // reserved PLT entry. - gsym->set_plt_offset((this->count_ + 1) * plt_entry_size); + unsigned int plt_index; + off_t plt_offset; + section_offset_type got_offset; - ++this->count_; + unsigned int* pcount; + unsigned int offset; + unsigned int reserved; + Output_data_space* got; + if (gsym->type() == elfcpp::STT_GNU_IFUNC + && gsym->can_use_relative_reloc(false)) + { + pcount = &this->irelative_count_; + offset = 0; + reserved = 0; + got = this->got_irelative_; + } + else + { + pcount = &this->count_; + offset = 1; + reserved = 3; + got = this->got_plt_; + } - section_offset_type got_offset = this->got_plt_->current_data_size(); + if (!this->is_data_size_valid()) + { + // Note that when setting the PLT offset for a non-IRELATIVE + // entry we skip the initial reserved PLT entry. + plt_index = *pcount + offset; + plt_offset = plt_index * plt_entry_size; - // Every PLT entry needs a GOT entry which points back to the PLT - // entry (this will be changed by the dynamic linker, normally - // lazily when the function is called). - this->got_plt_->set_current_data_size(got_offset + 8); + ++*pcount; - // Every PLT entry needs a reloc. - if (gsym->type() == elfcpp::STT_GNU_IFUNC - && gsym->can_use_relative_reloc(false)) - this->rel_->add_symbolless_global_addend(gsym, elfcpp::R_X86_64_IRELATIVE, - this->got_plt_, got_offset, 0); + got_offset = (plt_index - offset + reserved) * 8; + gold_assert(got_offset == got->current_data_size()); + + // Every PLT entry needs a GOT entry which points back to the PLT + // entry (this will be changed by the dynamic linker, normally + // lazily when the function is called). + got->set_current_data_size(got_offset + 8); + } else { - gsym->set_needs_dynsym_entry(); - this->rel_->add_global(gsym, elfcpp::R_X86_64_JUMP_SLOT, this->got_plt_, - got_offset, 0); + // FIXME: This is probably not correct for IRELATIVE relocs. + + // For incremental updates, find an available slot. + plt_offset = this->free_list_.allocate(plt_entry_size, plt_entry_size, 0); + if (plt_offset == -1) + gold_fallback(_("out of patch space (PLT);" + " relink with --incremental-full")); + + // The GOT and PLT entries have a 1-1 correspondance, so the GOT offset + // can be calculated from the PLT index, adjusting for the three + // reserved entries at the beginning of the GOT. + plt_index = plt_offset / plt_entry_size - 1; + got_offset = (plt_index - offset + reserved) * 8; } + gsym->set_plt_offset(plt_offset); + + // Every PLT entry needs a reloc. + this->add_relocation(symtab, layout, gsym, got_offset); + // Note that we don't need to save the symbol. The contents of the // PLT are independent of which symbols are used. The symbols only // appear in the relocations. @@ -850,26 +1045,51 @@ Output_data_plt_x86_64::add_entry(Symbol* gsym) // the PLT offset. unsigned int -Output_data_plt_x86_64::add_local_ifunc_entry(Sized_relobj<64, false>* relobj, - unsigned int local_sym_index) +Output_data_plt_x86_64::add_local_ifunc_entry( + Symbol_table* symtab, + Layout* layout, + Sized_relobj_file<64, false>* relobj, + unsigned int local_sym_index) { - unsigned int plt_offset = (this->count_ + 1) * plt_entry_size; - ++this->count_; + unsigned int plt_offset = this->irelative_count_ * plt_entry_size; + ++this->irelative_count_; - section_offset_type got_offset = this->got_plt_->current_data_size(); + section_offset_type got_offset = this->got_irelative_->current_data_size(); // Every PLT entry needs a GOT entry which points back to the PLT // entry. - this->got_plt_->set_current_data_size(got_offset + 8); + this->got_irelative_->set_current_data_size(got_offset + 8); // Every PLT entry needs a reloc. - this->rel_->add_symbolless_local_addend(relobj, local_sym_index, - elfcpp::R_X86_64_IRELATIVE, - this->got_plt_, got_offset, 0); + Reloc_section* rela = this->rela_irelative(symtab, layout); + rela->add_symbolless_local_addend(relobj, local_sym_index, + elfcpp::R_X86_64_IRELATIVE, + this->got_irelative_, got_offset, 0); return plt_offset; } +// Add the relocation for a PLT entry. + +void +Output_data_plt_x86_64::add_relocation(Symbol_table* symtab, Layout* layout, + Symbol* gsym, unsigned int got_offset) +{ + if (gsym->type() == elfcpp::STT_GNU_IFUNC + && gsym->can_use_relative_reloc(false)) + { + Reloc_section* rela = this->rela_irelative(symtab, layout); + rela->add_symbolless_global_addend(gsym, elfcpp::R_X86_64_IRELATIVE, + this->got_irelative_, got_offset, 0); + } + else + { + gsym->set_needs_dynsym_entry(); + this->rel_->add_global(gsym, elfcpp::R_X86_64_JUMP_SLOT, this->got_plt_, + got_offset, 0); + } +} + // Return where the TLSDESC relocations should go, creating it if // necessary. These follow the JUMP_SLOT relocations. @@ -882,17 +1102,78 @@ Output_data_plt_x86_64::rela_tlsdesc(Layout* layout) layout->add_output_section_data(".rela.plt", elfcpp::SHT_RELA, elfcpp::SHF_ALLOC, this->tlsdesc_rel_, ORDER_DYNAMIC_PLT_RELOCS, false); - gold_assert(this->tlsdesc_rel_->output_section() == - this->rel_->output_section()); + gold_assert(this->tlsdesc_rel_->output_section() + == this->rel_->output_section()); } return this->tlsdesc_rel_; } +// Return where the IRELATIVE relocations should go in the PLT. These +// follow the JUMP_SLOT and the TLSDESC relocations. + +Output_data_plt_x86_64::Reloc_section* +Output_data_plt_x86_64::rela_irelative(Symbol_table* symtab, Layout* layout) +{ + if (this->irelative_rel_ == NULL) + { + // Make sure we have a place for the TLSDESC relocations, in + // case we see any later on. + this->rela_tlsdesc(layout); + this->irelative_rel_ = new Reloc_section(false); + layout->add_output_section_data(".rela.plt", elfcpp::SHT_RELA, + elfcpp::SHF_ALLOC, this->irelative_rel_, + ORDER_DYNAMIC_PLT_RELOCS, false); + gold_assert(this->irelative_rel_->output_section() + == this->rel_->output_section()); + + if (parameters->doing_static_link()) + { + // A statically linked executable will only have a .rela.plt + // section to hold R_X86_64_IRELATIVE relocs for + // STT_GNU_IFUNC symbols. The library will use these + // symbols to locate the IRELATIVE relocs at program startup + // time. + symtab->define_in_output_data("__rela_iplt_start", NULL, + Symbol_table::PREDEFINED, + this->irelative_rel_, 0, 0, + elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, + elfcpp::STV_HIDDEN, 0, false, true); + symtab->define_in_output_data("__rela_iplt_end", NULL, + Symbol_table::PREDEFINED, + this->irelative_rel_, 0, 0, + elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, + elfcpp::STV_HIDDEN, 0, true, true); + } + } + return this->irelative_rel_; +} + +// Return the PLT address to use for a global symbol. + +uint64_t +Output_data_plt_x86_64::address_for_global(const Symbol* gsym) +{ + uint64_t offset = 0; + if (gsym->type() == elfcpp::STT_GNU_IFUNC + && gsym->can_use_relative_reloc(false)) + offset = (this->count_ + 1) * plt_entry_size; + return this->address() + offset; +} + +// Return the PLT address to use for a local symbol. These are always +// IRELATIVE relocs. + +uint64_t +Output_data_plt_x86_64::address_for_local(const Relobj*, unsigned int) +{ + return this->address() + (this->count_ + 1) * plt_entry_size; +} + // Set the final size. void Output_data_plt_x86_64::set_final_data_size() { - unsigned int count = this->count_; + unsigned int count = this->count_ + this->irelative_count_; if (this->has_tlsdesc_entry()) ++count; this->set_data_size((count + 1) * plt_entry_size); @@ -900,7 +1181,7 @@ Output_data_plt_x86_64::set_final_data_size() // The first entry in the PLT for an executable. -unsigned char Output_data_plt_x86_64::first_plt_entry[plt_entry_size] = +const unsigned char Output_data_plt_x86_64::first_plt_entry[plt_entry_size] = { // From AMD64 ABI Draft 0.98, page 76 0xff, 0x35, // pushq contents of memory address @@ -912,7 +1193,7 @@ unsigned char Output_data_plt_x86_64::first_plt_entry[plt_entry_size] = // Subsequent entries in the PLT for an executable. -unsigned char Output_data_plt_x86_64::plt_entry[plt_entry_size] = +const unsigned char Output_data_plt_x86_64::plt_entry[plt_entry_size] = { // From AMD64 ABI Draft 0.98, page 76 0xff, 0x25, // jmpq indirect @@ -925,7 +1206,7 @@ unsigned char Output_data_plt_x86_64::plt_entry[plt_entry_size] = // The reserved TLSDESC entry in the PLT for an executable. -unsigned char Output_data_plt_x86_64::tlsdesc_plt_entry[plt_entry_size] = +const unsigned char Output_data_plt_x86_64::tlsdesc_plt_entry[plt_entry_size] = { // From Alexandre Oliva, "Thread-Local Storage Descriptors for IA32 // and AMD64/EM64T", Version 0.9.4 (2005-10-10). @@ -937,6 +1218,54 @@ unsigned char Output_data_plt_x86_64::tlsdesc_plt_entry[plt_entry_size] = 0x40, 0 }; +// The .eh_frame unwind information for the PLT. + +const unsigned char +Output_data_plt_x86_64::plt_eh_frame_cie[plt_eh_frame_cie_size] = +{ + 1, // CIE version. + 'z', // Augmentation: augmentation size included. + 'R', // Augmentation: FDE encoding included. + '\0', // End of augmentation string. + 1, // Code alignment factor. + 0x78, // Data alignment factor. + 16, // Return address column. + 1, // Augmentation size. + (elfcpp::DW_EH_PE_pcrel // FDE encoding. + | elfcpp::DW_EH_PE_sdata4), + elfcpp::DW_CFA_def_cfa, 7, 8, // DW_CFA_def_cfa: r7 (rsp) ofs 8. + elfcpp::DW_CFA_offset + 16, 1,// DW_CFA_offset: r16 (rip) at cfa-8. + elfcpp::DW_CFA_nop, // Align to 16 bytes. + elfcpp::DW_CFA_nop +}; + +const unsigned char +Output_data_plt_x86_64::plt_eh_frame_fde[plt_eh_frame_fde_size] = +{ + 0, 0, 0, 0, // Replaced with offset to .plt. + 0, 0, 0, 0, // Replaced with size of .plt. + 0, // Augmentation size. + elfcpp::DW_CFA_def_cfa_offset, 16, // DW_CFA_def_cfa_offset: 16. + elfcpp::DW_CFA_advance_loc + 6, // Advance 6 to __PLT__ + 6. + elfcpp::DW_CFA_def_cfa_offset, 24, // DW_CFA_def_cfa_offset: 24. + elfcpp::DW_CFA_advance_loc + 10, // Advance 10 to __PLT__ + 16. + elfcpp::DW_CFA_def_cfa_expression, // DW_CFA_def_cfa_expression. + 11, // Block length. + elfcpp::DW_OP_breg7, 8, // Push %rsp + 8. + elfcpp::DW_OP_breg16, 0, // Push %rip. + elfcpp::DW_OP_lit15, // Push 0xf. + elfcpp::DW_OP_and, // & (%rip & 0xf). + elfcpp::DW_OP_lit11, // Push 0xb. + elfcpp::DW_OP_ge, // >= ((%rip & 0xf) >= 0xb) + elfcpp::DW_OP_lit3, // Push 3. + elfcpp::DW_OP_shl, // << (((%rip & 0xf) >= 0xb) << 3) + elfcpp::DW_OP_plus, // + ((((%rip&0xf)>=0xb)<<3)+%rsp+8 + elfcpp::DW_CFA_nop, // Align to 32 bytes. + elfcpp::DW_CFA_nop, + elfcpp::DW_CFA_nop, + elfcpp::DW_CFA_nop +}; + // Write out the PLT. This uses the hand-coded instructions above, // and adjusts them as needed. This is specified by the AMD64 ABI. @@ -949,8 +1278,12 @@ Output_data_plt_x86_64::do_write(Output_file* of) unsigned char* const oview = of->get_output_view(offset, oview_size); const off_t got_file_offset = this->got_plt_->offset(); + gold_assert(parameters->incremental_update() + || (got_file_offset + this->got_plt_->data_size() + == this->got_irelative_->offset())); const section_size_type got_size = - convert_to_section_size_type(this->got_plt_->data_size()); + convert_to_section_size_type(this->got_plt_->data_size() + + this->got_irelative_->data_size()); unsigned char* const got_view = of->get_output_view(got_file_offset, got_size); @@ -977,12 +1310,20 @@ Output_data_plt_x86_64::do_write(Output_file* of) unsigned char* got_pov = got_view; - memset(got_pov, 0, 24); - got_pov += 24; + // The first entry in the GOT is the address of the .dynamic section + // aka the PT_DYNAMIC segment. The next two entries are reserved. + // We saved space for them when we created the section in + // Target_x86_64::got_section. + Output_section* dynamic = this->layout_->dynamic_section(); + uint32_t dynamic_addr = dynamic == NULL ? 0 : dynamic->address(); + elfcpp::Swap<64, false>::writeval(got_pov, dynamic_addr); + got_pov += 8; + memset(got_pov, 0, 16); + got_pov += 16; unsigned int plt_offset = plt_entry_size; unsigned int got_offset = 24; - const unsigned int count = this->count_; + const unsigned int count = this->count_ + this->irelative_count_; for (unsigned int plt_index = 0; plt_index < count; ++plt_index, @@ -1040,8 +1381,9 @@ Target_x86_64::make_plt_section(Symbol_table* symtab, Layout* layout) // Create the GOT sections first. this->got_section(symtab, layout); - this->plt_ = new Output_data_plt_x86_64(symtab, layout, this->got_, - this->got_plt_); + this->plt_ = new Output_data_plt_x86_64(layout, this->got_, + this->got_plt_, + this->got_irelative_); layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS, (elfcpp::SHF_ALLOC | elfcpp::SHF_EXECINSTR), @@ -1073,21 +1415,22 @@ Target_x86_64::make_plt_entry(Symbol_table* symtab, Layout* layout, if (this->plt_ == NULL) this->make_plt_section(symtab, layout); - this->plt_->add_entry(gsym); + this->plt_->add_entry(symtab, layout, gsym); } // Make a PLT entry for a local STT_GNU_IFUNC symbol. void Target_x86_64::make_local_ifunc_plt_entry(Symbol_table* symtab, Layout* layout, - Sized_relobj<64, false>* relobj, + Sized_relobj_file<64, false>* relobj, unsigned int local_sym_index) { if (relobj->local_has_plt_offset(local_sym_index)) return; if (this->plt_ == NULL) this->make_plt_section(symtab, layout); - unsigned int plt_offset = this->plt_->add_local_ifunc_entry(relobj, + unsigned int plt_offset = this->plt_->add_local_ifunc_entry(symtab, layout, + relobj, local_sym_index); relobj->set_local_plt_offset(local_sym_index, plt_offset); } @@ -1118,6 +1461,196 @@ Target_x86_64::plt_entry_size() const return Output_data_plt_x86_64::get_plt_entry_size(); } +// Create the GOT and PLT sections for an incremental update. + +Output_data_got<64, false>* +Target_x86_64::init_got_plt_for_update(Symbol_table* symtab, + Layout* layout, + unsigned int got_count, + unsigned int plt_count) +{ + gold_assert(this->got_ == NULL); + + this->got_ = new Output_data_got<64, false>(got_count * 8); + layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, + (elfcpp::SHF_ALLOC + | elfcpp::SHF_WRITE), + this->got_, ORDER_RELRO_LAST, + true); + + // Add the three reserved entries. + this->got_plt_ = new Output_data_space((plt_count + 3) * 8, 8, "** GOT PLT"); + layout->add_output_section_data(".got.plt", elfcpp::SHT_PROGBITS, + (elfcpp::SHF_ALLOC + | elfcpp::SHF_WRITE), + this->got_plt_, ORDER_NON_RELRO_FIRST, + false); + + // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT. + this->global_offset_table_ = + symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL, + Symbol_table::PREDEFINED, + this->got_plt_, + 0, 0, elfcpp::STT_OBJECT, + elfcpp::STB_LOCAL, + elfcpp::STV_HIDDEN, 0, + false, false); + + // If there are any TLSDESC relocations, they get GOT entries in + // .got.plt after the jump slot entries. + // FIXME: Get the count for TLSDESC entries. + this->got_tlsdesc_ = new Output_data_got<64, false>(0); + layout->add_output_section_data(".got.plt", elfcpp::SHT_PROGBITS, + elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE, + this->got_tlsdesc_, + ORDER_NON_RELRO_FIRST, false); + + // If there are any IRELATIVE relocations, they get GOT entries in + // .got.plt after the jump slot and TLSDESC entries. + this->got_irelative_ = new Output_data_space(0, 8, "** GOT IRELATIVE PLT"); + layout->add_output_section_data(".got.plt", elfcpp::SHT_PROGBITS, + elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE, + this->got_irelative_, + ORDER_NON_RELRO_FIRST, false); + + // Create the PLT section. + this->plt_ = new Output_data_plt_x86_64(layout, this->got_, this->got_plt_, + this->got_irelative_, plt_count); + layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS, + elfcpp::SHF_ALLOC | elfcpp::SHF_EXECINSTR, + this->plt_, ORDER_PLT, false); + + // Make the sh_info field of .rela.plt point to .plt. + Output_section* rela_plt_os = this->plt_->rela_plt()->output_section(); + rela_plt_os->set_info_section(this->plt_->output_section()); + + // Create the rela_dyn section. + this->rela_dyn_section(layout); + + return this->got_; +} + +// Reserve a GOT entry for a local symbol, and regenerate any +// necessary dynamic relocations. + +void +Target_x86_64::reserve_local_got_entry( + unsigned int got_index, + Sized_relobj<64, false>* obj, + unsigned int r_sym, + unsigned int got_type) +{ + unsigned int got_offset = got_index * 8; + Reloc_section* rela_dyn = this->rela_dyn_section(NULL); + + this->got_->reserve_local(got_index, obj, r_sym, got_type); + switch (got_type) + { + case GOT_TYPE_STANDARD: + if (parameters->options().output_is_position_independent()) + rela_dyn->add_local_relative(obj, r_sym, elfcpp::R_X86_64_RELATIVE, + this->got_, got_offset, 0); + break; + case GOT_TYPE_TLS_OFFSET: + rela_dyn->add_local(obj, r_sym, elfcpp::R_X86_64_TPOFF64, + this->got_, got_offset, 0); + break; + case GOT_TYPE_TLS_PAIR: + this->got_->reserve_slot(got_index + 1); + rela_dyn->add_local(obj, r_sym, elfcpp::R_X86_64_DTPMOD64, + this->got_, got_offset, 0); + break; + case GOT_TYPE_TLS_DESC: + gold_fatal(_("TLS_DESC not yet supported for incremental linking")); + // this->got_->reserve_slot(got_index + 1); + // rela_dyn->add_target_specific(elfcpp::R_X86_64_TLSDESC, arg, + // this->got_, got_offset, 0); + break; + default: + gold_unreachable(); + } +} + +// Reserve a GOT entry for a global symbol, and regenerate any +// necessary dynamic relocations. + +void +Target_x86_64::reserve_global_got_entry(unsigned int got_index, Symbol* gsym, + unsigned int got_type) +{ + unsigned int got_offset = got_index * 8; + Reloc_section* rela_dyn = this->rela_dyn_section(NULL); + + this->got_->reserve_global(got_index, gsym, got_type); + switch (got_type) + { + case GOT_TYPE_STANDARD: + if (!gsym->final_value_is_known()) + { + if (gsym->is_from_dynobj() + || gsym->is_undefined() + || gsym->is_preemptible() + || gsym->type() == elfcpp::STT_GNU_IFUNC) + rela_dyn->add_global(gsym, elfcpp::R_X86_64_GLOB_DAT, + this->got_, got_offset, 0); + else + rela_dyn->add_global_relative(gsym, elfcpp::R_X86_64_RELATIVE, + this->got_, got_offset, 0); + } + break; + case GOT_TYPE_TLS_OFFSET: + rela_dyn->add_global_relative(gsym, elfcpp::R_X86_64_TPOFF64, + this->got_, got_offset, 0); + break; + case GOT_TYPE_TLS_PAIR: + this->got_->reserve_slot(got_index + 1); + rela_dyn->add_global_relative(gsym, elfcpp::R_X86_64_DTPMOD64, + this->got_, got_offset, 0); + rela_dyn->add_global_relative(gsym, elfcpp::R_X86_64_DTPOFF64, + this->got_, got_offset + 8, 0); + break; + case GOT_TYPE_TLS_DESC: + this->got_->reserve_slot(got_index + 1); + rela_dyn->add_global_relative(gsym, elfcpp::R_X86_64_TLSDESC, + this->got_, got_offset, 0); + break; + default: + gold_unreachable(); + } +} + +// Register an existing PLT entry for a global symbol. + +void +Target_x86_64::register_global_plt_entry(Symbol_table* symtab, + Layout* layout, + unsigned int plt_index, + Symbol* gsym) +{ + gold_assert(this->plt_ != NULL); + gold_assert(!gsym->has_plt_offset()); + + this->plt_->reserve_slot(plt_index); + + gsym->set_plt_offset((plt_index + 1) * this->plt_entry_size()); + + unsigned int got_offset = (plt_index + 3) * 8; + this->plt_->add_relocation(symtab, layout, gsym, got_offset); +} + +// Force a COPY relocation for a given symbol. + +void +Target_x86_64::emit_copy_reloc( + Symbol_table* symtab, Symbol* sym, Output_section* os, off_t offset) +{ + this->copy_relocs_.emit_copy_reloc(symtab, + symtab->get_sized_symbol<64>(sym), + os, + offset, + this->rela_dyn_section(NULL)); +} + // Define the _TLS_MODULE_BASE_ symbol in the TLS segment. void @@ -1168,7 +1701,7 @@ Target_x86_64::reserve_tlsdesc_entries(Symbol_table* symtab, unsigned int Target_x86_64::got_mod_index_entry(Symbol_table* symtab, Layout* layout, - Sized_relobj<64, false>* object) + Sized_relobj_file<64, false>* object) { if (this->got_mod_index_offset_ == -1U) { @@ -1309,8 +1842,9 @@ Target_x86_64::Scan::get_reference_flags(unsigned int r_type) // Report an unsupported relocation against a local symbol. void -Target_x86_64::Scan::unsupported_reloc_local(Sized_relobj<64, false>* object, - unsigned int r_type) +Target_x86_64::Scan::unsupported_reloc_local( + Sized_relobj_file<64, false>* object, + unsigned int r_type) { gold_error(_("%s: unsupported reloc %u against local symbol"), object->name().c_str(), r_type); @@ -1322,10 +1856,13 @@ Target_x86_64::Scan::unsupported_reloc_local(Sized_relobj<64, false>* object, // Here we know the section is allocated, but we don't know that it is // read-only. But we check for all the relocation types which the // glibc dynamic linker supports, so it seems appropriate to issue an -// error even if the section is not read-only. +// error even if the section is not read-only. If GSYM is not NULL, +// it is the symbol the relocation is against; if it is NULL, the +// relocation is against a local symbol. void -Target_x86_64::Scan::check_non_pic(Relobj* object, unsigned int r_type) +Target_x86_64::Scan::check_non_pic(Relobj* object, unsigned int r_type, + Symbol* gsym) { switch (r_type) { @@ -1343,13 +1880,29 @@ Target_x86_64::Scan::check_non_pic(Relobj* object, unsigned int r_type) return; // glibc supports these reloc types, but they can overflow. - case elfcpp::R_X86_64_32: case elfcpp::R_X86_64_PC32: + // A PC relative reference is OK against a local symbol or if + // the symbol is defined locally. + if (gsym == NULL + || (!gsym->is_from_dynobj() + && !gsym->is_undefined() + && !gsym->is_preemptible())) + return; + /* Fall through. */ + case elfcpp::R_X86_64_32: if (this->issued_non_pic_error_) return; gold_assert(parameters->options().output_is_position_independent()); - object->error(_("requires dynamic reloc which may overflow at runtime; " - "recompile with -fPIC")); + if (gsym == NULL) + object->error(_("requires dynamic R_X86_64_32 reloc which may " + "overflow at runtime; recompile with -fPIC")); + else + object->error(_("requires dynamic %s reloc against '%s' which may " + "overflow at runtime; recompile with -fPIC"), + (r_type == elfcpp::R_X86_64_32 + ? "R_X86_64_32" + : "R_X86_64_PC32"), + gsym->name()); this->issued_non_pic_error_ = true; return; @@ -1360,8 +1913,9 @@ Target_x86_64::Scan::check_non_pic(Relobj* object, unsigned int r_type) if (this->issued_non_pic_error_) return; gold_assert(parameters->options().output_is_position_independent()); - object->error(_("requires unsupported dynamic reloc; " - "recompile with -fPIC")); + object->error(_("requires unsupported dynamic reloc %u; " + "recompile with -fPIC"), + r_type); this->issued_non_pic_error_ = true; return; @@ -1374,8 +1928,9 @@ Target_x86_64::Scan::check_non_pic(Relobj* object, unsigned int r_type) // given type against a STT_GNU_IFUNC symbol. bool -Target_x86_64::Scan::reloc_needs_plt_for_ifunc(Sized_relobj<64, false>* object, - unsigned int r_type) +Target_x86_64::Scan::reloc_needs_plt_for_ifunc( + Sized_relobj_file<64, false>* object, + unsigned int r_type) { int flags = Scan::get_reference_flags(r_type); if (flags & Symbol::TLS_REF) @@ -1390,7 +1945,7 @@ inline void Target_x86_64::Scan::local(Symbol_table* symtab, Layout* layout, Target_x86_64* target, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela<64, false>& reloc, @@ -1441,7 +1996,7 @@ Target_x86_64::Scan::local(Symbol_table* symtab, // because that is always a 64-bit relocation. if (parameters->options().output_is_position_independent()) { - this->check_non_pic(object, r_type); + this->check_non_pic(object, r_type, NULL); Reloc_section* rela_dyn = target->rela_dyn_section(layout); unsigned int r_sym = elfcpp::elf_r_sym<64>(reloc.get_r_info()); @@ -1525,7 +2080,7 @@ Target_x86_64::Scan::local(Symbol_table* symtab, } else { - this->check_non_pic(object, r_type); + this->check_non_pic(object, r_type, NULL); gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION); rela_dyn->add_local( @@ -1685,9 +2240,10 @@ Target_x86_64::Scan::local(Symbol_table* symtab, // Report an unsupported relocation against a global symbol. void -Target_x86_64::Scan::unsupported_reloc_global(Sized_relobj<64, false>* object, - unsigned int r_type, - Symbol* gsym) +Target_x86_64::Scan::unsupported_reloc_global( + Sized_relobj_file<64, false>* object, + unsigned int r_type, + Symbol* gsym) { gold_error(_("%s: unsupported reloc %u against global symbol %s"), object->name().c_str(), r_type, gsym->demangled_name().c_str()); @@ -1725,7 +2281,7 @@ Target_x86_64::Scan::local_reloc_may_be_function_pointer( Symbol_table* , Layout* , Target_x86_64* , - Sized_relobj<64, false>* , + Sized_relobj_file<64, false>* , unsigned int , Output_section* , const elfcpp::Rela<64, false>& , @@ -1748,7 +2304,7 @@ Target_x86_64::Scan::global_reloc_may_be_function_pointer( Symbol_table*, Layout* , Target_x86_64* , - Sized_relobj<64, false>* , + Sized_relobj_file<64, false>* , unsigned int , Output_section* , const elfcpp::Rela<64, false>& , @@ -1770,7 +2326,7 @@ inline void Target_x86_64::Scan::global(Symbol_table* symtab, Layout* layout, Target_x86_64* target, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, Output_section* output_section, const elfcpp::Rela<64, false>& reloc, @@ -1825,7 +2381,8 @@ Target_x86_64::Scan::global(Symbol_table* symtab, // STT_GNU_IFUNC symbol. This makes a function // address in a PIE executable match the address in a // shared library that it links against. - Reloc_section* rela_dyn = target->rela_dyn_section(layout); + Reloc_section* rela_dyn = + target->rela_irelative_section(layout); unsigned int r_type = elfcpp::R_X86_64_IRELATIVE; rela_dyn->add_symbolless_global_addend(gsym, r_type, output_section, object, @@ -1845,7 +2402,7 @@ Target_x86_64::Scan::global(Symbol_table* symtab, } else { - this->check_non_pic(object, r_type); + this->check_non_pic(object, r_type, gsym); Reloc_section* rela_dyn = target->rela_dyn_section(layout); rela_dyn->add_global(gsym, r_type, output_section, object, data_shndx, reloc.get_r_offset(), @@ -1873,7 +2430,7 @@ Target_x86_64::Scan::global(Symbol_table* symtab, } else { - this->check_non_pic(object, r_type); + this->check_non_pic(object, r_type, gsym); Reloc_section* rela_dyn = target->rela_dyn_section(layout); rela_dyn->add_global(gsym, r_type, output_section, object, data_shndx, reloc.get_r_offset(), @@ -1904,9 +2461,24 @@ Target_x86_64::Scan::global(Symbol_table* symtab, // If this symbol is not fully resolved, we need to add a // dynamic relocation for it. Reloc_section* rela_dyn = target->rela_dyn_section(layout); + + // Use a GLOB_DAT rather than a RELATIVE reloc if: + // + // 1) The symbol may be defined in some other module. + // + // 2) We are building a shared library and this is a + // protected symbol; using GLOB_DAT means that the dynamic + // linker can use the address of the PLT in the main + // executable when appropriate so that function address + // comparisons work. + // + // 3) This is a STT_GNU_IFUNC symbol in position dependent + // code, again so that function address comparisons work. if (gsym->is_from_dynobj() || gsym->is_undefined() || gsym->is_preemptible() + || (gsym->visibility() == elfcpp::STV_PROTECTED + && parameters->options().shared()) || (gsym->type() == elfcpp::STT_GNU_IFUNC && parameters->options().output_is_position_independent())) got->add_global_with_rela(gsym, GOT_TYPE_STANDARD, rela_dyn, @@ -2114,7 +2686,7 @@ Target_x86_64::Scan::global(Symbol_table* symtab, void Target_x86_64::gc_process_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -2151,7 +2723,7 @@ Target_x86_64::gc_process_relocs(Symbol_table* symtab, void Target_x86_64::scan_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -2228,6 +2800,47 @@ Target_x86_64::do_finalize_sections( uint64_t data_size = this->got_plt_->current_data_size(); symtab->get_sized_symbol<64>(sym)->set_symsize(data_size); } + + if (parameters->doing_static_link() + && (this->plt_ == NULL || !this->plt_->has_irelative_section())) + { + // If linking statically, make sure that the __rela_iplt symbols + // were defined if necessary, even if we didn't create a PLT. + static const Define_symbol_in_segment syms[] = + { + { + "__rela_iplt_start", // name + elfcpp::PT_LOAD, // segment_type + elfcpp::PF_W, // segment_flags_set + elfcpp::PF(0), // segment_flags_clear + 0, // value + 0, // size + elfcpp::STT_NOTYPE, // type + elfcpp::STB_GLOBAL, // binding + elfcpp::STV_HIDDEN, // visibility + 0, // nonvis + Symbol::SEGMENT_START, // offset_from_base + true // only_if_ref + }, + { + "__rela_iplt_end", // name + elfcpp::PT_LOAD, // segment_type + elfcpp::PF_W, // segment_flags_set + elfcpp::PF(0), // segment_flags_clear + 0, // value + 0, // size + elfcpp::STT_NOTYPE, // type + elfcpp::STB_GLOBAL, // binding + elfcpp::STV_HIDDEN, // visibility + 0, // nonvis + Symbol::SEGMENT_START, // offset_from_base + true // only_if_ref + } + }; + + symtab->define_symbols(layout, 2, syms, + layout->script_options()->saw_sections_clause()); + } } // Perform a relocation. @@ -2262,14 +2875,14 @@ Target_x86_64::Relocate::relocate(const Relocate_info<64, false>* relinfo, } } - const Sized_relobj<64, false>* object = relinfo->object; + const Sized_relobj_file<64, false>* object = relinfo->object; // Pick the value to use for symbols defined in the PLT. Symbol_value<64> symval; if (gsym != NULL && gsym->use_plt_offset(Scan::get_reference_flags(r_type))) { - symval.set_output_value(target->plt_section()->address() + symval.set_output_value(target->plt_address_for_global(gsym) + gsym->plt_offset()); psymval = &symval; } @@ -2278,7 +2891,7 @@ Target_x86_64::Relocate::relocate(const Relocate_info<64, false>* relinfo, unsigned int r_sym = elfcpp::elf_r_sym<64>(rela.get_r_info()); if (object->local_has_plt_offset(r_sym)) { - symval.set_output_value(target->plt_section()->address() + symval.set_output_value(target->plt_address_for_local(object, r_sym) + object->local_plt_offset(r_sym)); psymval = &symval; } @@ -2510,7 +3123,7 @@ Target_x86_64::Relocate::relocate_tls(const Relocate_info<64, false>* relinfo, { Output_segment* tls_segment = relinfo->layout->tls_segment(); - const Sized_relobj<64, false>* object = relinfo->object; + const Sized_relobj_file<64, false>* object = relinfo->object; const elfcpp::Elf_Xword addend = rela.get_r_addend(); elfcpp::Shdr<64, false> data_shdr(relinfo->data_shdr); bool is_executable = (data_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) != 0; @@ -2537,7 +3150,12 @@ Target_x86_64::Relocate::relocate_tls(const Relocate_info<64, false>* relinfo, } if (optimized_type == tls::TLSOPT_TO_LE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } this->tls_gd_to_le(relinfo, relnum, tls_segment, rela, r_type, value, view, view_size); @@ -2563,7 +3181,12 @@ Target_x86_64::Relocate::relocate_tls(const Relocate_info<64, false>* relinfo, } if (optimized_type == tls::TLSOPT_TO_IE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } value = target->got_plt_section()->address() + got_offset; this->tls_gd_to_ie(relinfo, relnum, tls_segment, rela, r_type, value, view, address, view_size); @@ -2592,7 +3215,12 @@ Target_x86_64::Relocate::relocate_tls(const Relocate_info<64, false>* relinfo, } if (optimized_type == tls::TLSOPT_TO_LE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } this->tls_desc_gd_to_le(relinfo, relnum, tls_segment, rela, r_type, value, view, view_size); @@ -2627,7 +3255,12 @@ Target_x86_64::Relocate::relocate_tls(const Relocate_info<64, false>* relinfo, } if (optimized_type == tls::TLSOPT_TO_IE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } value = target->got_plt_section()->address() + got_offset; this->tls_desc_gd_to_ie(relinfo, relnum, tls_segment, rela, r_type, value, view, address, @@ -2659,7 +3292,12 @@ Target_x86_64::Relocate::relocate_tls(const Relocate_info<64, false>* relinfo, } if (optimized_type == tls::TLSOPT_TO_LE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } this->tls_ld_to_le(relinfo, relnum, tls_segment, rela, r_type, value, view, view_size); break; @@ -2689,7 +3327,12 @@ Target_x86_64::Relocate::relocate_tls(const Relocate_info<64, false>* relinfo, // R_X86_64_TLSLD. if (optimized_type == tls::TLSOPT_TO_LE && is_executable) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } value -= tls_segment->memsz(); } Relocate_functions<64, false>::rela32(view, value, addend); @@ -2699,7 +3342,12 @@ Target_x86_64::Relocate::relocate_tls(const Relocate_info<64, false>* relinfo, // See R_X86_64_DTPOFF32, just above, for why we check for is_executable. if (optimized_type == tls::TLSOPT_TO_LE && is_executable) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } value -= tls_segment->memsz(); } Relocate_functions<64, false>::rela64(view, value, addend); @@ -2708,7 +3356,12 @@ Target_x86_64::Relocate::relocate_tls(const Relocate_info<64, false>* relinfo, case elfcpp::R_X86_64_GOTTPOFF: // Initial-exec if (optimized_type == tls::TLSOPT_TO_LE) { - gold_assert(tls_segment != NULL); + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } Target_x86_64::Relocate::tls_ie_to_le(relinfo, relnum, tls_segment, rela, r_type, value, view, view_size); @@ -2743,6 +3396,12 @@ Target_x86_64::Relocate::relocate_tls(const Relocate_info<64, false>* relinfo, break; case elfcpp::R_X86_64_TPOFF32: // Local-exec + if (tls_segment == NULL) + { + gold_assert(parameters->errors()->error_count() > 0 + || issue_undefined_symbol_error(gsym)); + return; + } value -= tls_segment->memsz(); Relocate_functions<64, false>::rela32(view, value, addend); break; @@ -3014,6 +3673,32 @@ Target_x86_64::relocate_section( reloc_symbol_changes); } +// Apply an incremental relocation. Incremental relocations always refer +// to global symbols. + +void +Target_x86_64::apply_relocation( + const Relocate_info<64, false>* relinfo, + elfcpp::Elf_types<64>::Elf_Addr r_offset, + unsigned int r_type, + elfcpp::Elf_types<64>::Elf_Swxword r_addend, + const Symbol* gsym, + unsigned char* view, + elfcpp::Elf_types<64>::Elf_Addr address, + section_size_type view_size) +{ + gold::apply_relocation<64, false, Target_x86_64, Target_x86_64::Relocate>( + relinfo, + this, + r_offset, + r_type, + r_addend, + gsym, + view, + address, + view_size); +} + // Return the size of a relocation while scanning during a relocatable // link. @@ -3089,7 +3774,7 @@ Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc( void Target_x86_64::scan_relocatable_relocs(Symbol_table* symtab, Layout* layout, - Sized_relobj<64, false>* object, + Sized_relobj_file<64, false>* object, unsigned int data_shndx, unsigned int sh_type, const unsigned char* prelocs, @@ -3162,7 +3847,7 @@ uint64_t Target_x86_64::do_dynsym_value(const Symbol* gsym) const { gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset()); - return this->plt_section()->address() + gsym->plt_offset(); + return this->plt_address_for_global(gsym) + gsym->plt_offset(); } // Return a string used to fill a code section with nops to take up @@ -3247,6 +3932,21 @@ Target_x86_64::do_reloc_addend(void* arg, unsigned int r_type, return psymval->value(ti.object, 0); } +// Return the value to use for the base of a DW_EH_PE_datarel offset +// in an FDE. Solaris and SVR4 use DW_EH_PE_datarel because their +// assembler can not write out the difference between two labels in +// different sections, so instead of using a pc-relative value they +// use an offset from the GOT. + +uint64_t +Target_x86_64::do_ehframe_datarel_base() const +{ + gold_assert(this->global_offset_table_ != NULL); + Symbol* sym = this->global_offset_table_; + Sized_symbol<64>* ssym = static_cast*>(sym); + return ssym->value(); +} + // FNOFFSET in section SHNDX in OBJECT is the start of a function // compiled with -fsplit-stack. The function calls non-split-stack // code. We have to change the function so that it always ensures @@ -3315,7 +4015,7 @@ class Target_selector_x86_64 : public Target_selector_freebsd public: Target_selector_x86_64() : Target_selector_freebsd(elfcpp::EM_X86_64, 64, false, "elf64-x86-64", - "elf64-x86-64-freebsd") + "elf64-x86-64-freebsd", "elf_x86_64") { } Target* diff --git a/gprof/.gitignore b/gprof/.gitignore new file mode 100644 index 0000000..28f9e80 --- /dev/null +++ b/gprof/.gitignore @@ -0,0 +1,8 @@ +/gprof + +/bsd_callg_bl.c +/config.texi +/flat_bl.c +/fsf_callg_bl.c +/gconfig.h +/gprof.1 diff --git a/gprof/ChangeLog b/gprof/ChangeLog index abb7959..9ec97a8 100644 --- a/gprof/ChangeLog +++ b/gprof/ChangeLog @@ -1,3 +1,22 @@ +2011-08-26 Nick Clifton + + * po/es.po: Updated Spanish translation. + +2011-06-07 David Warme + + * corefile.c (core_sym_class): Allow for multiple iterations of + clone clones and subprograms. + +2011-04-28 Jonathan Nieder + + * cg_print.c (print_header): Add no-c-format comment to prevent + confusion when translating "%time". + +2011-04-27 Nick Clifton + + * po/eo.po: Updated Esperanto translation. + * po/fr.po: Updated French translation. + 2011-03-30 Nick Clifton * po/eo.po: New Esperanto translation. diff --git a/gprof/bsd_callg_bl.c b/gprof/bsd_callg_bl.c new file mode 100644 index 0000000..1497674 --- /dev/null +++ b/gprof/bsd_callg_bl.c @@ -0,0 +1,120 @@ +/* ==> Do not modify this file!! It is created automatically + from bsd_callg_bl.m using the gen-c-prog.awk script. <== */ + +#include +#include "ansidecl.h" + +void bsd_callg_blurb (FILE *); +void +bsd_callg_blurb (file) + FILE *file; +{ + fputs ("\n", file); + fputs ("\n", file); + fputs ("\n", file); + fputs ("call graph profile:\n", file); + fputs (" The sum of self and descendents is the major sort\n", file); + fputs (" for this listing.\n", file); + fputs ("\n", file); + fputs (" function entries:\n", file); + fputs ("\n", file); + fputs ("index the index of the function in the call graph\n", file); + fputs (" listing, as an aid to locating it (see below).\n", file); + fputs ("\n", file); + fputs ("%time the percentage of the total time of the program\n", file); + fputs (" accounted for by this function and its\n", file); + fputs (" descendents.\n", file); + fputs ("\n", file); + fputs ("self the number of seconds spent in this function\n", file); + fputs (" itself.\n", file); + fputs ("\n", file); + fputs ("descendents\n", file); + fputs (" the number of seconds spent in the descendents of\n", file); + fputs (" this function on behalf of this function.\n", file); + fputs ("\n", file); + fputs ("called the number of times this function is called (other\n", file); + fputs (" than recursive calls).\n", file); + fputs ("\n", file); + fputs ("self the number of times this function calls itself\n", file); + fputs (" recursively.\n", file); + fputs ("\n", file); + fputs ("name the name of the function, with an indication of\n", file); + fputs (" its membership in a cycle, if any.\n", file); + fputs ("\n", file); + fputs ("index the index of the function in the call graph\n", file); + fputs (" listing, as an aid to locating it.\n", file); + fputs ("\n", file); + fputs ("\n", file); + fputs ("\n", file); + fputs (" parent listings:\n", file); + fputs ("\n", file); + fputs ("self* the number of seconds of this function's self time\n", file); + fputs (" which is due to calls from this parent.\n", file); + fputs ("\n", file); + fputs ("descendents*\n", file); + fputs (" the number of seconds of this function's\n", file); + fputs (" descendent time which is due to calls from this\n", file); + fputs (" parent.\n", file); + fputs ("\n", file); + fputs ("called** the number of times this function is called by\n", file); + fputs (" this parent. This is the numerator of the\n", file); + fputs (" fraction which divides up the function's time to\n", file); + fputs (" its parents.\n", file); + fputs ("\n", file); + fputs ("total* the number of times this function was called by\n", file); + fputs (" all of its parents. This is the denominator of\n", file); + fputs (" the propagation fraction.\n", file); + fputs ("\n", file); + fputs ("parents the name of this parent, with an indication of the\n", file); + fputs (" parent's membership in a cycle, if any.\n", file); + fputs ("\n", file); + fputs ("index the index of this parent in the call graph\n", file); + fputs (" listing, as an aid in locating it.\n", file); + fputs ("\n", file); + fputs ("\n", file); + fputs ("\n", file); + fputs (" children listings:\n", file); + fputs ("\n", file); + fputs ("self* the number of seconds of this child's self time\n", file); + fputs (" which is due to being called by this function.\n", file); + fputs ("\n", file); + fputs ("descendent*\n", file); + fputs (" the number of seconds of this child's descendent's\n", file); + fputs (" time which is due to being called by this\n", file); + fputs (" function.\n", file); + fputs ("\n", file); + fputs ("called** the number of times this child is called by this\n", file); + fputs (" function. This is the numerator of the\n", file); + fputs (" propagation fraction for this child.\n", file); + fputs ("\n", file); + fputs ("total* the number of times this child is called by all\n", file); + fputs (" functions. This is the denominator of the\n", file); + fputs (" propagation fraction.\n", file); + fputs ("\n", file); + fputs ("children the name of this child, and an indication of its\n", file); + fputs (" membership in a cycle, if any.\n", file); + fputs ("\n", file); + fputs ("index the index of this child in the call graph listing,\n", file); + fputs (" as an aid to locating it.\n", file); + fputs ("\n", file); + fputs ("\n", file); + fputs ("\n", file); + fputs (" * these fields are omitted for parents (or\n", file); + fputs (" children) in the same cycle as the function. If\n", file); + fputs (" the function (or child) is a member of a cycle,\n", file); + fputs (" the propagated times and propagation denominator\n", file); + fputs (" represent the self time and descendent time of the\n", file); + fputs (" cycle as a whole.\n", file); + fputs ("\n", file); + fputs (" ** static-only parents and children are indicated\n", file); + fputs (" by a call count of 0.\n", file); + fputs ("\n", file); + fputs ("\n", file); + fputs ("\n", file); + fputs (" cycle listings:\n", file); + fputs (" the cycle as a whole is listed with the same\n", file); + fputs (" fields as a function entry. Below it are listed\n", file); + fputs (" the members of the cycle, and their contributions\n", file); + fputs (" to the time and call counts of the cycle.\n", file); + fputs (" \n", file); +} diff --git a/gprof/cg_print.c b/gprof/cg_print.c index c1a2a31..8ff1471 100644 --- a/gprof/cg_print.c +++ b/gprof/cg_print.c @@ -1,6 +1,6 @@ /* cg_print.c - Print routines for displaying call graphs. - Copyright 2000, 2001, 2002, 2004, 2007, 2009 + Copyright 2000, 2001, 2002, 2004, 2007, 2009, 2011 Free Software Foundation, Inc. This file is part of GNU Binutils. @@ -96,8 +96,11 @@ print_header () printf ("%6.6s %5.5s %7.7s %11.11s %7.7s/%-7.7s %-8.8s\n", "", "", "", "", _("called"), _("total"), _("parents")); printf ("%-6.6s %5.5s %7.7s %11.11s %7.7s+%-7.7s %-8.8s\t%5.5s\n", - _("index"), _("%time"), _("self"), _("descendants"), - _("called"), _("self"), _("name"), _("index")); + _("index"), + /* xgettext:no-c-format */ + _("%time"), + _("self"), _("descendants"), _("called"), _("self"), + _("name"), _("index")); printf ("%6.6s %5.5s %7.7s %11.11s %7.7s/%-7.7s %-8.8s\n", "", "", "", "", _("called"), _("total"), _("children")); printf ("\n"); diff --git a/gprof/config.texi b/gprof/config.texi new file mode 100644 index 0000000..169c886 --- /dev/null +++ b/gprof/config.texi @@ -0,0 +1 @@ +@set top_srcdir . diff --git a/gprof/corefile.c b/gprof/corefile.c index 2d772f9..e25d19b 100644 --- a/gprof/corefile.c +++ b/gprof/corefile.c @@ -387,19 +387,27 @@ core_sym_class (asymbol *sym) if (*name == '$') return 0; - if (*name == '.') + while (*name == '.') { - /* Allow GCC cloned functions. */ - if (strlen (name) > 7 && strncmp (name, ".clone.", 7) == 0) - name += 6; + /* Allow both nested subprograms (which end with ".NNN", where N is + a digit) and GCC cloned functions (which contain ".clone"). + Allow for multiple iterations of both - apparently GCC can clone + clones and subprograms. */ + int digit_seen = 0; +#define CLONE_NAME ".clone." +#define CLONE_NAME_LEN strlen (CLONE_NAME) + + if (strlen (name) > CLONE_NAME_LEN + && strncmp (name, CLONE_NAME, CLONE_NAME_LEN) == 0) + name += CLONE_NAME_LEN - 1; - /* Do not discard nested subprograms (those - which end with .NNN, where N are digits). */ for (name++; *name; name++) - if (! ISDIGIT (*name)) + if (digit_seen && *name == '.') + break; + else if (ISDIGIT (*name)) + digit_seen = 1; + else return 0; - - break; } } diff --git a/gprof/flat_bl.c b/gprof/flat_bl.c new file mode 100644 index 0000000..8bfe80b --- /dev/null +++ b/gprof/flat_bl.c @@ -0,0 +1,39 @@ +/* ==> Do not modify this file!! It is created automatically + from flat_bl.m using the gen-c-prog.awk script. <== */ + +#include +#include "ansidecl.h" + +void flat_blurb (FILE *); +void +flat_blurb (file) + FILE *file; +{ + fputs ("\n", file); + fputs (" % the percentage of the total running time of the\n", file); + fputs ("time program used by this function.\n", file); + fputs ("\n", file); + fputs ("cumulative a running sum of the number of seconds accounted\n", file); + fputs (" seconds for by this function and those listed above it.\n", file); + fputs ("\n", file); + fputs (" self the number of seconds accounted for by this\n", file); + fputs ("seconds function alone. This is the major sort for this\n", file); + fputs (" listing.\n", file); + fputs ("\n", file); + fputs ("calls the number of times this function was invoked, if\n", file); + fputs (" this function is profiled, else blank.\n", file); + fputs (" \n", file); + fputs (" self the average number of milliseconds spent in this\n", file); + fputs ("ms/call function per call, if this function is profiled,\n", file); + fputs (" else blank.\n", file); + fputs ("\n", file); + fputs (" total the average number of milliseconds spent in this\n", file); + fputs ("ms/call function and its descendents per call, if this \n", file); + fputs (" function is profiled, else blank.\n", file); + fputs ("\n", file); + fputs ("name the name of the function. This is the minor sort\n", file); + fputs (" for this listing. The index shows the location of\n", file); + fputs (" the function in the gprof listing. If the index is\n", file); + fputs (" in parenthesis it shows where it would appear in\n", file); + fputs (" the gprof listing if it were to be printed.\n", file); +} diff --git a/gprof/fsf_callg_bl.c b/gprof/fsf_callg_bl.c new file mode 100644 index 0000000..e298de2 --- /dev/null +++ b/gprof/fsf_callg_bl.c @@ -0,0 +1,95 @@ +/* ==> Do not modify this file!! It is created automatically + from fsf_callg_bl.m using the gen-c-prog.awk script. <== */ + +#include +#include "ansidecl.h" + +void fsf_callg_blurb (FILE *); +void +fsf_callg_blurb (file) + FILE *file; +{ + fputs ("\n", file); + fputs (" This table describes the call tree of the program, and was sorted by\n", file); + fputs (" the total amount of time spent in each function and its children.\n", file); + fputs ("\n", file); + fputs (" Each entry in this table consists of several lines. The line with the\n", file); + fputs (" index number at the left hand margin lists the current function.\n", file); + fputs (" The lines above it list the functions that called this function,\n", file); + fputs (" and the lines below it list the functions this one called.\n", file); + fputs (" This line lists:\n", file); + fputs (" index A unique number given to each element of the table.\n", file); + fputs (" Index numbers are sorted numerically.\n", file); + fputs (" The index number is printed next to every function name so\n", file); + fputs (" it is easier to look up where the function in the table.\n", file); + fputs ("\n", file); + fputs (" % time This is the percentage of the `total' time that was spent\n", file); + fputs (" in this function and its children. Note that due to\n", file); + fputs (" different viewpoints, functions excluded by options, etc,\n", file); + fputs (" these numbers will NOT add up to 100%.\n", file); + fputs ("\n", file); + fputs (" self This is the total amount of time spent in this function.\n", file); + fputs ("\n", file); + fputs (" children This is the total amount of time propagated into this\n", file); + fputs (" function by its children.\n", file); + fputs ("\n", file); + fputs (" called This is the number of times the function was called.\n", file); + fputs (" If the function called itself recursively, the number\n", file); + fputs (" only includes non-recursive calls, and is followed by\n", file); + fputs (" a `+' and the number of recursive calls.\n", file); + fputs ("\n", file); + fputs (" name The name of the current function. The index number is\n", file); + fputs (" printed after it. If the function is a member of a\n", file); + fputs (" cycle, the cycle number is printed between the\n", file); + fputs (" function's name and the index number.\n", file); + fputs ("\n", file); + fputs ("\n", file); + fputs (" For the function's parents, the fields have the following meanings:\n", file); + fputs ("\n", file); + fputs (" self This is the amount of time that was propagated directly\n", file); + fputs (" from the function into this parent.\n", file); + fputs ("\n", file); + fputs (" children This is the amount of time that was propagated from\n", file); + fputs (" the function's children into this parent.\n", file); + fputs ("\n", file); + fputs (" called This is the number of times this parent called the\n", file); + fputs (" function `/' the total number of times the function\n", file); + fputs (" was called. Recursive calls to the function are not\n", file); + fputs (" included in the number after the `/'.\n", file); + fputs ("\n", file); + fputs (" name This is the name of the parent. The parent's index\n", file); + fputs (" number is printed after it. If the parent is a\n", file); + fputs (" member of a cycle, the cycle number is printed between\n", file); + fputs (" the name and the index number.\n", file); + fputs ("\n", file); + fputs (" If the parents of the function cannot be determined, the word\n", file); + fputs (" `' is printed in the `name' field, and all the other\n", file); + fputs (" fields are blank.\n", file); + fputs ("\n", file); + fputs (" For the function's children, the fields have the following meanings:\n", file); + fputs ("\n", file); + fputs (" self This is the amount of time that was propagated directly\n", file); + fputs (" from the child into the function.\n", file); + fputs ("\n", file); + fputs (" children This is the amount of time that was propagated from the\n", file); + fputs (" child's children to the function.\n", file); + fputs ("\n", file); + fputs (" called This is the number of times the function called\n", file); + fputs (" this child `/' the total number of times the child\n", file); + fputs (" was called. Recursive calls by the child are not\n", file); + fputs (" listed in the number after the `/'.\n", file); + fputs ("\n", file); + fputs (" name This is the name of the child. The child's index\n", file); + fputs (" number is printed after it. If the child is a\n", file); + fputs (" member of a cycle, the cycle number is printed\n", file); + fputs (" between the name and the index number.\n", file); + fputs ("\n", file); + fputs (" If there are any cycles (circles) in the call graph, there is an\n", file); + fputs (" entry for the cycle-as-a-whole. This entry shows who called the\n", file); + fputs (" cycle (as parents) and the members of the cycle (as children.)\n", file); + fputs (" The `+' recursive calls entry shows the number of function calls that\n", file); + fputs (" were internal to the cycle, and the calls entry for each member shows,\n", file); + fputs (" for that member, how many times it was called from other members of\n", file); + fputs (" the cycle.\n", file); + fputs ("\n", file); +} diff --git a/gprof/gprof.1 b/gprof/gprof.1 new file mode 100644 index 0000000..a6fc4a7 --- /dev/null +++ b/gprof/gprof.1 @@ -0,0 +1,757 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "GPROF 1" +.TH GPROF 1 "2011-11-21" "binutils-2.21.90" "GNU" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +gprof \- display call graph profile data +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +gprof [ \-[abcDhilLrsTvwxyz] ] [ \-[ACeEfFJnNOpPqQZ][\fIname\fR] ] + [ \-I \fIdirs\fR ] [ \-d[\fInum\fR] ] [ \-k \fIfrom/to\fR ] + [ \-m \fImin-count\fR ] [ \-R \fImap_file\fR ] [ \-t \fItable-length\fR ] + [ \-\-[no\-]annotated\-source[=\fIname\fR] ] + [ \-\-[no\-]exec\-counts[=\fIname\fR] ] + [ \-\-[no\-]flat\-profile[=\fIname\fR] ] [ \-\-[no\-]graph[=\fIname\fR] ] + [ \-\-[no\-]time=\fIname\fR] [ \-\-all\-lines ] [ \-\-brief ] + [ \-\-debug[=\fIlevel\fR] ] [ \-\-function\-ordering ] + [ \-\-file\-ordering \fImap_file\fR ] [ \-\-directory\-path=\fIdirs\fR ] + [ \-\-display\-unused\-functions ] [ \-\-file\-format=\fIname\fR ] + [ \-\-file\-info ] [ \-\-help ] [ \-\-line ] [ \-\-min\-count=\fIn\fR ] + [ \-\-no\-static ] [ \-\-print\-path ] [ \-\-separate\-files ] + [ \-\-static\-call\-graph ] [ \-\-sum ] [ \-\-table\-length=\fIlen\fR ] + [ \-\-traditional ] [ \-\-version ] [ \-\-width=\fIn\fR ] + [ \-\-ignore\-non\-functions ] [ \-\-demangle[=\fI\s-1STYLE\s0\fR] ] + [ \-\-no\-demangle ] [\-\-external\-symbol\-table=name] + [ \fIimage-file\fR ] [ \fIprofile-file\fR ... ] +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\f(CW\*(C`gprof\*(C'\fR produces an execution profile of C, Pascal, or Fortran77 +programs. The effect of called routines is incorporated in the profile +of each caller. The profile data is taken from the call graph profile file +(\fIgmon.out\fR default) which is created by programs +that are compiled with the \fB\-pg\fR option of +\&\f(CW\*(C`cc\*(C'\fR, \f(CW\*(C`pc\*(C'\fR, and \f(CW\*(C`f77\*(C'\fR. +The \fB\-pg\fR option also links in versions of the library routines +that are compiled for profiling. \f(CW\*(C`Gprof\*(C'\fR reads the given object +file (the default is \f(CW\*(C`a.out\*(C'\fR) and establishes the relation between +its symbol table and the call graph profile from \fIgmon.out\fR. +If more than one profile file is specified, the \f(CW\*(C`gprof\*(C'\fR +output shows the sum of the profile information in the given profile files. +.PP +\&\f(CW\*(C`Gprof\*(C'\fR calculates the amount of time spent in each routine. +Next, these times are propagated along the edges of the call graph. +Cycles are discovered, and calls into a cycle are made to share the time +of the cycle. +.PP +Several forms of output are available from the analysis. +.PP +The \fIflat profile\fR shows how much time your program spent in each function, +and how many times that function was called. If you simply want to know +which functions burn most of the cycles, it is stated concisely here. +.PP +The \fIcall graph\fR shows, for each function, which functions called it, which +other functions it called, and how many times. There is also an estimate +of how much time was spent in the subroutines of each function. This can +suggest places where you might try to eliminate function calls that use a +lot of time. +.PP +The \fIannotated source\fR listing is a copy of the program's +source code, labeled with the number of times each line of the +program was executed. +.SH "OPTIONS" +.IX Header "OPTIONS" +These options specify which of several output formats +\&\f(CW\*(C`gprof\*(C'\fR should produce. +.PP +Many of these options take an optional \fIsymspec\fR to specify +functions to be included or excluded. These options can be +specified multiple times, with different symspecs, to include +or exclude sets of symbols. +.PP +Specifying any of these options overrides the default (\fB\-p \-q\fR), +which prints a flat profile and call graph analysis +for all functions. +.ie n .IP """\-A[\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-A[\f(CIsymspec\f(CW]\fR" 4 +.IX Item "-A[symspec]" +.PD 0 +.ie n .IP """\-\-annotated\-source[=\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-\-annotated\-source[=\f(CIsymspec\f(CW]\fR" 4 +.IX Item "--annotated-source[=symspec]" +.PD +The \fB\-A\fR option causes \f(CW\*(C`gprof\*(C'\fR to print annotated source code. +If \fIsymspec\fR is specified, print output only for matching symbols. +.ie n .IP """\-b""" 4 +.el .IP "\f(CW\-b\fR" 4 +.IX Item "-b" +.PD 0 +.ie n .IP """\-\-brief""" 4 +.el .IP "\f(CW\-\-brief\fR" 4 +.IX Item "--brief" +.PD +If the \fB\-b\fR option is given, \f(CW\*(C`gprof\*(C'\fR doesn't print the +verbose blurbs that try to explain the meaning of all of the fields in +the tables. This is useful if you intend to print out the output, or +are tired of seeing the blurbs. +.ie n .IP """\-C[\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-C[\f(CIsymspec\f(CW]\fR" 4 +.IX Item "-C[symspec]" +.PD 0 +.ie n .IP """\-\-exec\-counts[=\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-\-exec\-counts[=\f(CIsymspec\f(CW]\fR" 4 +.IX Item "--exec-counts[=symspec]" +.PD +The \fB\-C\fR option causes \f(CW\*(C`gprof\*(C'\fR to +print a tally of functions and the number of times each was called. +If \fIsymspec\fR is specified, print tally only for matching symbols. +.Sp +If the profile data file contains basic-block count records, specifying +the \fB\-l\fR option, along with \fB\-C\fR, will cause basic-block +execution counts to be tallied and displayed. +.ie n .IP """\-i""" 4 +.el .IP "\f(CW\-i\fR" 4 +.IX Item "-i" +.PD 0 +.ie n .IP """\-\-file\-info""" 4 +.el .IP "\f(CW\-\-file\-info\fR" 4 +.IX Item "--file-info" +.PD +The \fB\-i\fR option causes \f(CW\*(C`gprof\*(C'\fR to display summary information +about the profile data file(s) and then exit. The number of histogram, +call graph, and basic-block count records is displayed. +.ie n .IP """\-I \f(CIdirs\f(CW""" 4 +.el .IP "\f(CW\-I \f(CIdirs\f(CW\fR" 4 +.IX Item "-I dirs" +.PD 0 +.ie n .IP """\-\-directory\-path=\f(CIdirs\f(CW""" 4 +.el .IP "\f(CW\-\-directory\-path=\f(CIdirs\f(CW\fR" 4 +.IX Item "--directory-path=dirs" +.PD +The \fB\-I\fR option specifies a list of search directories in +which to find source files. Environment variable \fI\s-1GPROF_PATH\s0\fR +can also be used to convey this information. +Used mostly for annotated source output. +.ie n .IP """\-J[\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-J[\f(CIsymspec\f(CW]\fR" 4 +.IX Item "-J[symspec]" +.PD 0 +.ie n .IP """\-\-no\-annotated\-source[=\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-\-no\-annotated\-source[=\f(CIsymspec\f(CW]\fR" 4 +.IX Item "--no-annotated-source[=symspec]" +.PD +The \fB\-J\fR option causes \f(CW\*(C`gprof\*(C'\fR not to +print annotated source code. +If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints annotated source, +but excludes matching symbols. +.ie n .IP """\-L""" 4 +.el .IP "\f(CW\-L\fR" 4 +.IX Item "-L" +.PD 0 +.ie n .IP """\-\-print\-path""" 4 +.el .IP "\f(CW\-\-print\-path\fR" 4 +.IX Item "--print-path" +.PD +Normally, source filenames are printed with the path +component suppressed. The \fB\-L\fR option causes \f(CW\*(C`gprof\*(C'\fR +to print the full pathname of +source filenames, which is determined +from symbolic debugging information in the image file +and is relative to the directory in which the compiler +was invoked. +.ie n .IP """\-p[\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-p[\f(CIsymspec\f(CW]\fR" 4 +.IX Item "-p[symspec]" +.PD 0 +.ie n .IP """\-\-flat\-profile[=\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-\-flat\-profile[=\f(CIsymspec\f(CW]\fR" 4 +.IX Item "--flat-profile[=symspec]" +.PD +The \fB\-p\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a flat profile. +If \fIsymspec\fR is specified, print flat profile only for matching symbols. +.ie n .IP """\-P[\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-P[\f(CIsymspec\f(CW]\fR" 4 +.IX Item "-P[symspec]" +.PD 0 +.ie n .IP """\-\-no\-flat\-profile[=\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-\-no\-flat\-profile[=\f(CIsymspec\f(CW]\fR" 4 +.IX Item "--no-flat-profile[=symspec]" +.PD +The \fB\-P\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress printing a flat profile. +If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints a flat profile, +but excludes matching symbols. +.ie n .IP """\-q[\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-q[\f(CIsymspec\f(CW]\fR" 4 +.IX Item "-q[symspec]" +.PD 0 +.ie n .IP """\-\-graph[=\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-\-graph[=\f(CIsymspec\f(CW]\fR" 4 +.IX Item "--graph[=symspec]" +.PD +The \fB\-q\fR option causes \f(CW\*(C`gprof\*(C'\fR to print the call graph analysis. +If \fIsymspec\fR is specified, print call graph only for matching symbols +and their children. +.ie n .IP """\-Q[\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-Q[\f(CIsymspec\f(CW]\fR" 4 +.IX Item "-Q[symspec]" +.PD 0 +.ie n .IP """\-\-no\-graph[=\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-\-no\-graph[=\f(CIsymspec\f(CW]\fR" 4 +.IX Item "--no-graph[=symspec]" +.PD +The \fB\-Q\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress printing the +call graph. +If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints a call graph, +but excludes matching symbols. +.ie n .IP """\-t""" 4 +.el .IP "\f(CW\-t\fR" 4 +.IX Item "-t" +.PD 0 +.ie n .IP """\-\-table\-length=\f(CInum\f(CW""" 4 +.el .IP "\f(CW\-\-table\-length=\f(CInum\f(CW\fR" 4 +.IX Item "--table-length=num" +.PD +The \fB\-t\fR option causes the \fInum\fR most active source lines in +each source file to be listed when source annotation is enabled. The +default is 10. +.ie n .IP """\-y""" 4 +.el .IP "\f(CW\-y\fR" 4 +.IX Item "-y" +.PD 0 +.ie n .IP """\-\-separate\-files""" 4 +.el .IP "\f(CW\-\-separate\-files\fR" 4 +.IX Item "--separate-files" +.PD +This option affects annotated source output only. +Normally, \f(CW\*(C`gprof\*(C'\fR prints annotated source files +to standard-output. If this option is specified, +annotated source for a file named \fIpath/\fIfilename\fI\fR +is generated in the file \fI\fIfilename\fI\-ann\fR. If the underlying +file system would truncate \fI\fIfilename\fI\-ann\fR so that it +overwrites the original \fI\fIfilename\fI\fR, \f(CW\*(C`gprof\*(C'\fR generates +annotated source in the file \fI\fIfilename\fI.ann\fR instead (if the +original file name has an extension, that extension is \fIreplaced\fR +with \fI.ann\fR). +.ie n .IP """\-Z[\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-Z[\f(CIsymspec\f(CW]\fR" 4 +.IX Item "-Z[symspec]" +.PD 0 +.ie n .IP """\-\-no\-exec\-counts[=\f(CIsymspec\f(CW]""" 4 +.el .IP "\f(CW\-\-no\-exec\-counts[=\f(CIsymspec\f(CW]\fR" 4 +.IX Item "--no-exec-counts[=symspec]" +.PD +The \fB\-Z\fR option causes \f(CW\*(C`gprof\*(C'\fR not to +print a tally of functions and the number of times each was called. +If \fIsymspec\fR is specified, print tally, but exclude matching symbols. +.ie n .IP """\-r""" 4 +.el .IP "\f(CW\-r\fR" 4 +.IX Item "-r" +.PD 0 +.ie n .IP """\-\-function\-ordering""" 4 +.el .IP "\f(CW\-\-function\-ordering\fR" 4 +.IX Item "--function-ordering" +.PD +The \fB\-\-function\-ordering\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a +suggested function ordering for the program based on profiling data. +This option suggests an ordering which may improve paging, tlb and +cache behavior for the program on systems which support arbitrary +ordering of functions in an executable. +.Sp +The exact details of how to force the linker to place functions +in a particular order is system dependent and out of the scope of this +manual. +.ie n .IP """\-R \f(CImap_file\f(CW""" 4 +.el .IP "\f(CW\-R \f(CImap_file\f(CW\fR" 4 +.IX Item "-R map_file" +.PD 0 +.ie n .IP """\-\-file\-ordering \f(CImap_file\f(CW""" 4 +.el .IP "\f(CW\-\-file\-ordering \f(CImap_file\f(CW\fR" 4 +.IX Item "--file-ordering map_file" +.PD +The \fB\-\-file\-ordering\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a +suggested .o link line ordering for the program based on profiling data. +This option suggests an ordering which may improve paging, tlb and +cache behavior for the program on systems which do not support arbitrary +ordering of functions in an executable. +.Sp +Use of the \fB\-a\fR argument is highly recommended with this option. +.Sp +The \fImap_file\fR argument is a pathname to a file which provides +function name to object file mappings. The format of the file is similar to +the output of the program \f(CW\*(C`nm\*(C'\fR. +.Sp +.Vb 8 +\& c\-parse.o:00000000 T yyparse +\& c\-parse.o:00000004 C yyerrflag +\& c\-lang.o:00000000 T maybe_objc_method_name +\& c\-lang.o:00000000 T print_lang_statistics +\& c\-lang.o:00000000 T recognize_objc_keyword +\& c\-decl.o:00000000 T print_lang_identifier +\& c\-decl.o:00000000 T print_lang_type +\& ... +.Ve +.Sp +To create a \fImap_file\fR with \s-1GNU\s0 \f(CW\*(C`nm\*(C'\fR, type a command like +\&\f(CW\*(C`nm \-\-extern\-only \-\-defined\-only \-v \-\-print\-file\-name program\-name\*(C'\fR. +.ie n .IP """\-T""" 4 +.el .IP "\f(CW\-T\fR" 4 +.IX Item "-T" +.PD 0 +.ie n .IP """\-\-traditional""" 4 +.el .IP "\f(CW\-\-traditional\fR" 4 +.IX Item "--traditional" +.PD +The \fB\-T\fR option causes \f(CW\*(C`gprof\*(C'\fR to print its output in +\&\*(L"traditional\*(R" \s-1BSD\s0 style. +.ie n .IP """\-w \f(CIwidth\f(CW""" 4 +.el .IP "\f(CW\-w \f(CIwidth\f(CW\fR" 4 +.IX Item "-w width" +.PD 0 +.ie n .IP """\-\-width=\f(CIwidth\f(CW""" 4 +.el .IP "\f(CW\-\-width=\f(CIwidth\f(CW\fR" 4 +.IX Item "--width=width" +.PD +Sets width of output lines to \fIwidth\fR. +Currently only used when printing the function index at the bottom +of the call graph. +.ie n .IP """\-x""" 4 +.el .IP "\f(CW\-x\fR" 4 +.IX Item "-x" +.PD 0 +.ie n .IP """\-\-all\-lines""" 4 +.el .IP "\f(CW\-\-all\-lines\fR" 4 +.IX Item "--all-lines" +.PD +This option affects annotated source output only. +By default, only the lines at the beginning of a basic-block +are annotated. If this option is specified, every line in +a basic-block is annotated by repeating the annotation for the +first line. This behavior is similar to \f(CW\*(C`tcov\*(C'\fR's \fB\-a\fR. +.ie n .IP """\-\-demangle[=\f(CIstyle\f(CW]""" 4 +.el .IP "\f(CW\-\-demangle[=\f(CIstyle\f(CW]\fR" 4 +.IX Item "--demangle[=style]" +.PD 0 +.ie n .IP """\-\-no\-demangle""" 4 +.el .IP "\f(CW\-\-no\-demangle\fR" 4 +.IX Item "--no-demangle" +.PD +These options control whether \*(C+ symbol names should be demangled when +printing output. The default is to demangle symbols. The +\&\f(CW\*(C`\-\-no\-demangle\*(C'\fR option may be used to turn off demangling. Different +compilers have different mangling styles. The optional demangling style +argument can be used to choose an appropriate demangling style for your +compiler. +.SS "Analysis Options" +.IX Subsection "Analysis Options" +.ie n .IP """\-a""" 4 +.el .IP "\f(CW\-a\fR" 4 +.IX Item "-a" +.PD 0 +.ie n .IP """\-\-no\-static""" 4 +.el .IP "\f(CW\-\-no\-static\fR" 4 +.IX Item "--no-static" +.PD +The \fB\-a\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress the printing of +statically declared (private) functions. (These are functions whose +names are not listed as global, and which are not visible outside the +file/function/block where they were defined.) Time spent in these +functions, calls to/from them, etc., will all be attributed to the +function that was loaded directly before it in the executable file. +This option affects both the flat profile and the call graph. +.ie n .IP """\-c""" 4 +.el .IP "\f(CW\-c\fR" 4 +.IX Item "-c" +.PD 0 +.ie n .IP """\-\-static\-call\-graph""" 4 +.el .IP "\f(CW\-\-static\-call\-graph\fR" 4 +.IX Item "--static-call-graph" +.PD +The \fB\-c\fR option causes the call graph of the program to be +augmented by a heuristic which examines the text space of the object +file and identifies function calls in the binary machine code. +Since normal call graph records are only generated when functions are +entered, this option identifies children that could have been called, +but never were. Calls to functions that were not compiled with +profiling enabled are also identified, but only if symbol table +entries are present for them. +Calls to dynamic library routines are typically \fInot\fR found +by this option. +Parents or children identified via this heuristic +are indicated in the call graph with call counts of \fB0\fR. +.ie n .IP """\-D""" 4 +.el .IP "\f(CW\-D\fR" 4 +.IX Item "-D" +.PD 0 +.ie n .IP """\-\-ignore\-non\-functions""" 4 +.el .IP "\f(CW\-\-ignore\-non\-functions\fR" 4 +.IX Item "--ignore-non-functions" +.PD +The \fB\-D\fR option causes \f(CW\*(C`gprof\*(C'\fR to ignore symbols which +are not known to be functions. This option will give more accurate +profile data on systems where it is supported (Solaris and \s-1HPUX\s0 for +example). +.ie n .IP """\-k \f(CIfrom\f(CW/\f(CIto\f(CW""" 4 +.el .IP "\f(CW\-k \f(CIfrom\f(CW/\f(CIto\f(CW\fR" 4 +.IX Item "-k from/to" +The \fB\-k\fR option allows you to delete from the call graph any arcs from +symbols matching symspec \fIfrom\fR to those matching symspec \fIto\fR. +.ie n .IP """\-l""" 4 +.el .IP "\f(CW\-l\fR" 4 +.IX Item "-l" +.PD 0 +.ie n .IP """\-\-line""" 4 +.el .IP "\f(CW\-\-line\fR" 4 +.IX Item "--line" +.PD +The \fB\-l\fR option enables line-by-line profiling, which causes +histogram hits to be charged to individual source code lines, +instead of functions. This feature only works with programs compiled +by older versions of the \f(CW\*(C`gcc\*(C'\fR compiler. Newer versions of +\&\f(CW\*(C`gcc\*(C'\fR are designed to work with the \f(CW\*(C`gcov\*(C'\fR tool instead. +.Sp +If the program was compiled with basic-block counting enabled, +this option will also identify how many times each line of +code was executed. +While line-by-line profiling can help isolate where in a large function +a program is spending its time, it also significantly increases +the running time of \f(CW\*(C`gprof\*(C'\fR, and magnifies statistical +inaccuracies. +.ie n .IP """\-m \f(CInum\f(CW""" 4 +.el .IP "\f(CW\-m \f(CInum\f(CW\fR" 4 +.IX Item "-m num" +.PD 0 +.ie n .IP """\-\-min\-count=\f(CInum\f(CW""" 4 +.el .IP "\f(CW\-\-min\-count=\f(CInum\f(CW\fR" 4 +.IX Item "--min-count=num" +.PD +This option affects execution count output only. +Symbols that are executed less than \fInum\fR times are suppressed. +.ie n .IP """\-n\f(CIsymspec\f(CW""" 4 +.el .IP "\f(CW\-n\f(CIsymspec\f(CW\fR" 4 +.IX Item "-nsymspec" +.PD 0 +.ie n .IP """\-\-time=\f(CIsymspec\f(CW""" 4 +.el .IP "\f(CW\-\-time=\f(CIsymspec\f(CW\fR" 4 +.IX Item "--time=symspec" +.PD +The \fB\-n\fR option causes \f(CW\*(C`gprof\*(C'\fR, in its call graph analysis, +to only propagate times for symbols matching \fIsymspec\fR. +.ie n .IP """\-N\f(CIsymspec\f(CW""" 4 +.el .IP "\f(CW\-N\f(CIsymspec\f(CW\fR" 4 +.IX Item "-Nsymspec" +.PD 0 +.ie n .IP """\-\-no\-time=\f(CIsymspec\f(CW""" 4 +.el .IP "\f(CW\-\-no\-time=\f(CIsymspec\f(CW\fR" 4 +.IX Item "--no-time=symspec" +.PD +The \fB\-n\fR option causes \f(CW\*(C`gprof\*(C'\fR, in its call graph analysis, +not to propagate times for symbols matching \fIsymspec\fR. +.ie n .IP """\-S\f(CIfilename\f(CW""" 4 +.el .IP "\f(CW\-S\f(CIfilename\f(CW\fR" 4 +.IX Item "-Sfilename" +.PD 0 +.ie n .IP """\-\-external\-symbol\-table=\f(CIfilename\f(CW""" 4 +.el .IP "\f(CW\-\-external\-symbol\-table=\f(CIfilename\f(CW\fR" 4 +.IX Item "--external-symbol-table=filename" +.PD +The \fB\-S\fR option causes \f(CW\*(C`gprof\*(C'\fR to read an external symbol table +file, such as \fI/proc/kallsyms\fR, rather than read the symbol table +from the given object file (the default is \f(CW\*(C`a.out\*(C'\fR). This is useful +for profiling kernel modules. +.ie n .IP """\-z""" 4 +.el .IP "\f(CW\-z\fR" 4 +.IX Item "-z" +.PD 0 +.ie n .IP """\-\-display\-unused\-functions""" 4 +.el .IP "\f(CW\-\-display\-unused\-functions\fR" 4 +.IX Item "--display-unused-functions" +.PD +If you give the \fB\-z\fR option, \f(CW\*(C`gprof\*(C'\fR will mention all +functions in the flat profile, even those that were never called, and +that had no time spent in them. This is useful in conjunction with the +\&\fB\-c\fR option for discovering which routines were never called. +.SS "Miscellaneous Options" +.IX Subsection "Miscellaneous Options" +.ie n .IP """\-d[\f(CInum\f(CW]""" 4 +.el .IP "\f(CW\-d[\f(CInum\f(CW]\fR" 4 +.IX Item "-d[num]" +.PD 0 +.ie n .IP """\-\-debug[=\f(CInum\f(CW]""" 4 +.el .IP "\f(CW\-\-debug[=\f(CInum\f(CW]\fR" 4 +.IX Item "--debug[=num]" +.PD +The \fB\-d\fR \fInum\fR option specifies debugging options. +If \fInum\fR is not specified, enable all debugging. +.ie n .IP """\-h""" 4 +.el .IP "\f(CW\-h\fR" 4 +.IX Item "-h" +.PD 0 +.ie n .IP """\-\-help""" 4 +.el .IP "\f(CW\-\-help\fR" 4 +.IX Item "--help" +.PD +The \fB\-h\fR option prints command line usage. +.ie n .IP """\-O\f(CIname\f(CW""" 4 +.el .IP "\f(CW\-O\f(CIname\f(CW\fR" 4 +.IX Item "-Oname" +.PD 0 +.ie n .IP """\-\-file\-format=\f(CIname\f(CW""" 4 +.el .IP "\f(CW\-\-file\-format=\f(CIname\f(CW\fR" 4 +.IX Item "--file-format=name" +.PD +Selects the format of the profile data files. Recognized formats are +\&\fBauto\fR (the default), \fBbsd\fR, \fB4.4bsd\fR, \fBmagic\fR, and +\&\fBprof\fR (not yet supported). +.ie n .IP """\-s""" 4 +.el .IP "\f(CW\-s\fR" 4 +.IX Item "-s" +.PD 0 +.ie n .IP """\-\-sum""" 4 +.el .IP "\f(CW\-\-sum\fR" 4 +.IX Item "--sum" +.PD +The \fB\-s\fR option causes \f(CW\*(C`gprof\*(C'\fR to summarize the information +in the profile data files it read in, and write out a profile data +file called \fIgmon.sum\fR, which contains all the information from +the profile data files that \f(CW\*(C`gprof\*(C'\fR read in. The file \fIgmon.sum\fR +may be one of the specified input files; the effect of this is to +merge the data in the other input files into \fIgmon.sum\fR. +.Sp +Eventually you can run \f(CW\*(C`gprof\*(C'\fR again without \fB\-s\fR to analyze the +cumulative data in the file \fIgmon.sum\fR. +.ie n .IP """\-v""" 4 +.el .IP "\f(CW\-v\fR" 4 +.IX Item "-v" +.PD 0 +.ie n .IP """\-\-version""" 4 +.el .IP "\f(CW\-\-version\fR" 4 +.IX Item "--version" +.PD +The \fB\-v\fR flag causes \f(CW\*(C`gprof\*(C'\fR to print the current version +number, and then exit. +.SS "Deprecated Options" +.IX Subsection "Deprecated Options" +These options have been replaced with newer versions that use symspecs. +.ie n .IP """\-e \f(CIfunction_name\f(CW""" 4 +.el .IP "\f(CW\-e \f(CIfunction_name\f(CW\fR" 4 +.IX Item "-e function_name" +The \fB\-e\fR \fIfunction\fR option tells \f(CW\*(C`gprof\*(C'\fR to not print +information about the function \fIfunction_name\fR (and its +children...) in the call graph. The function will still be listed +as a child of any functions that call it, but its index number will be +shown as \fB[not printed]\fR. More than one \fB\-e\fR option may be +given; only one \fIfunction_name\fR may be indicated with each \fB\-e\fR +option. +.ie n .IP """\-E \f(CIfunction_name\f(CW""" 4 +.el .IP "\f(CW\-E \f(CIfunction_name\f(CW\fR" 4 +.IX Item "-E function_name" +The \f(CW\*(C`\-E \f(CIfunction\f(CW\*(C'\fR option works like the \f(CW\*(C`\-e\*(C'\fR option, but +time spent in the function (and children who were not called from +anywhere else), will not be used to compute the percentages-of-time for +the call graph. More than one \fB\-E\fR option may be given; only one +\&\fIfunction_name\fR may be indicated with each \fB\-E\fR option. +.ie n .IP """\-f \f(CIfunction_name\f(CW""" 4 +.el .IP "\f(CW\-f \f(CIfunction_name\f(CW\fR" 4 +.IX Item "-f function_name" +The \fB\-f\fR \fIfunction\fR option causes \f(CW\*(C`gprof\*(C'\fR to limit the +call graph to the function \fIfunction_name\fR and its children (and +their children...). More than one \fB\-f\fR option may be given; +only one \fIfunction_name\fR may be indicated with each \fB\-f\fR +option. +.ie n .IP """\-F \f(CIfunction_name\f(CW""" 4 +.el .IP "\f(CW\-F \f(CIfunction_name\f(CW\fR" 4 +.IX Item "-F function_name" +The \fB\-F\fR \fIfunction\fR option works like the \f(CW\*(C`\-f\*(C'\fR option, but +only time spent in the function and its children (and their +children...) will be used to determine total-time and +percentages-of-time for the call graph. More than one \fB\-F\fR option +may be given; only one \fIfunction_name\fR may be indicated with each +\&\fB\-F\fR option. The \fB\-F\fR option overrides the \fB\-E\fR option. +.SH "FILES" +.IX Header "FILES" +.ie n .IP """\f(CIa.out\f(CW""" 4 +.el .IP "\f(CW\f(CIa.out\f(CW\fR" 4 +.IX Item "a.out" +the namelist and text space. +.ie n .IP """\f(CIgmon.out\f(CW""" 4 +.el .IP "\f(CW\f(CIgmon.out\f(CW\fR" 4 +.IX Item "gmon.out" +dynamic call graph and profile. +.ie n .IP """\f(CIgmon.sum\f(CW""" 4 +.el .IP "\f(CW\f(CIgmon.sum\f(CW\fR" 4 +.IX Item "gmon.sum" +summarized dynamic call graph and profile. +.SH "BUGS" +.IX Header "BUGS" +The granularity of the sampling is shown, but remains +statistical at best. +We assume that the time for each execution of a function +can be expressed by the total time for the function divided +by the number of times the function is called. +Thus the time propagated along the call graph arcs to the function's +parents is directly proportional to the number of times that +arc is traversed. +.PP +Parents that are not themselves profiled will have the time of +their profiled children propagated to them, but they will appear +to be spontaneously invoked in the call graph listing, and will +not have their time propagated further. +Similarly, signal catchers, even though profiled, will appear +to be spontaneous (although for more obscure reasons). +Any profiled children of signal catchers should have their times +propagated properly, unless the signal catcher was invoked during +the execution of the profiling routine, in which case all is lost. +.PP +The profiled program must call \f(CW\*(C`exit\*(C'\fR(2) +or return normally for the profiling information to be saved +in the \fIgmon.out\fR file. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fImonitor\fR\|(3), \fIprofil\fR\|(2), \fIcc\fR\|(1), \fIprof\fR\|(1), and the Info entry for \fIgprof\fR. +.PP +\&\*(L"An Execution Profiler for Modular Programs\*(R", +by S. Graham, P. Kessler, M. McKusick; +Software \- Practice and Experience, +Vol. 13, pp. 671\-685, 1983. +.PP +\&\*(L"gprof: A Call Graph Execution Profiler\*(R", +by S. Graham, P. Kessler, M. McKusick; +Proceedings of the \s-1SIGPLAN\s0 '82 Symposium on Compiler Construction, +\&\s-1SIGPLAN\s0 Notices, Vol. 17, No 6, pp. 120\-126, June 1982. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1988, 1992, 1997, 1998, 1999, 2000, 2001, 2003, +2007, 2008, 2009 Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/gprof/gprof.info b/gprof/gprof.info new file mode 100644 index 0000000..9667777 --- /dev/null +++ b/gprof/gprof.info @@ -0,0 +1,2474 @@ +This is gprof.info, produced by makeinfo version 4.8 from gprof.texi. + +INFO-DIR-SECTION Software development +START-INFO-DIR-ENTRY +* gprof: (gprof). Profiling your program's execution +END-INFO-DIR-ENTRY + + This file documents the gprof profiler of the GNU system. + + Copyright (C) 1988, 1992, 1997, 1998, 1999, 2000, 2001, 2003, 2007, +2008, 2009 Free Software Foundation, Inc. + + Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License, Version 1.3 or +any later version published by the Free Software Foundation; with no +Invariant Sections, with no Front-Cover Texts, and with no Back-Cover +Texts. A copy of the license is included in the section entitled "GNU +Free Documentation License". + + +File: gprof.info, Node: Top, Next: Introduction, Up: (dir) + +Profiling a Program: Where Does It Spend Its Time? +************************************************** + +This manual describes the GNU profiler, `gprof', and how you can use it +to determine which parts of a program are taking most of the execution +time. We assume that you know how to write, compile, and execute +programs. GNU `gprof' was written by Jay Fenlason. + + This manual is for `gprof' (GNU Binutils) version 2.21.90. + + This document is distributed under the terms of the GNU Free +Documentation License version 1.3. A copy of the license is included +in the section entitled "GNU Free Documentation License". + +* Menu: + +* Introduction:: What profiling means, and why it is useful. + +* Compiling:: How to compile your program for profiling. +* Executing:: Executing your program to generate profile data +* Invoking:: How to run `gprof', and its options + +* Output:: Interpreting `gprof''s output + +* Inaccuracy:: Potential problems you should be aware of +* How do I?:: Answers to common questions +* Incompatibilities:: (between GNU `gprof' and Unix `gprof'.) +* Details:: Details of how profiling is done +* GNU Free Documentation License:: GNU Free Documentation License + + +File: gprof.info, Node: Introduction, Next: Compiling, Prev: Top, Up: Top + +1 Introduction to Profiling +*************************** + +Profiling allows you to learn where your program spent its time and +which functions called which other functions while it was executing. +This information can show you which pieces of your program are slower +than you expected, and might be candidates for rewriting to make your +program execute faster. It can also tell you which functions are being +called more or less often than you expected. This may help you spot +bugs that had otherwise been unnoticed. + + Since the profiler uses information collected during the actual +execution of your program, it can be used on programs that are too +large or too complex to analyze by reading the source. However, how +your program is run will affect the information that shows up in the +profile data. If you don't use some feature of your program while it +is being profiled, no profile information will be generated for that +feature. + + Profiling has several steps: + + * You must compile and link your program with profiling enabled. + *Note Compiling a Program for Profiling: Compiling. + + * You must execute your program to generate a profile data file. + *Note Executing the Program: Executing. + + * You must run `gprof' to analyze the profile data. *Note `gprof' + Command Summary: Invoking. + + The next three chapters explain these steps in greater detail. + + Several forms of output are available from the analysis. + + The "flat profile" shows how much time your program spent in each +function, and how many times that function was called. If you simply +want to know which functions burn most of the cycles, it is stated +concisely here. *Note The Flat Profile: Flat Profile. + + The "call graph" shows, for each function, which functions called +it, which other functions it called, and how many times. There is also +an estimate of how much time was spent in the subroutines of each +function. This can suggest places where you might try to eliminate +function calls that use a lot of time. *Note The Call Graph: Call +Graph. + + The "annotated source" listing is a copy of the program's source +code, labeled with the number of times each line of the program was +executed. *Note The Annotated Source Listing: Annotated Source. + + To better understand how profiling works, you may wish to read a +description of its implementation. *Note Implementation of Profiling: +Implementation. + + +File: gprof.info, Node: Compiling, Next: Executing, Prev: Introduction, Up: Top + +2 Compiling a Program for Profiling +*********************************** + +The first step in generating profile information for your program is to +compile and link it with profiling enabled. + + To compile a source file for profiling, specify the `-pg' option when +you run the compiler. (This is in addition to the options you normally +use.) + + To link the program for profiling, if you use a compiler such as `cc' +to do the linking, simply specify `-pg' in addition to your usual +options. The same option, `-pg', alters either compilation or linking +to do what is necessary for profiling. Here are examples: + + cc -g -c myprog.c utils.c -pg + cc -o myprog myprog.o utils.o -pg + + The `-pg' option also works with a command that both compiles and +links: + + cc -o myprog myprog.c utils.c -g -pg + + Note: The `-pg' option must be part of your compilation options as +well as your link options. If it is not then no call-graph data will +be gathered and when you run `gprof' you will get an error message like +this: + + gprof: gmon.out file is missing call-graph data + + If you add the `-Q' switch to suppress the printing of the call +graph data you will still be able to see the time samples: + + Flat profile: + + Each sample counts as 0.01 seconds. + % cumulative self self total + time seconds seconds calls Ts/call Ts/call name + 44.12 0.07 0.07 zazLoop + 35.29 0.14 0.06 main + 20.59 0.17 0.04 bazMillion + + If you run the linker `ld' directly instead of through a compiler +such as `cc', you may have to specify a profiling startup file +`gcrt0.o' as the first input file instead of the usual startup file +`crt0.o'. In addition, you would probably want to specify the +profiling C library, `libc_p.a', by writing `-lc_p' instead of the +usual `-lc'. This is not absolutely necessary, but doing this gives +you number-of-calls information for standard library functions such as +`read' and `open'. For example: + + ld -o myprog /lib/gcrt0.o myprog.o utils.o -lc_p + + If you are running the program on a system which supports shared +libraries you may run into problems with the profiling support code in +a shared library being called before that library has been fully +initialised. This is usually detected by the program encountering a +segmentation fault as soon as it is run. The solution is to link +against a static version of the library containing the profiling +support code, which for `gcc' users can be done via the `-static' or +`-static-libgcc' command line option. For example: + + gcc -g -pg -static-libgcc myprog.c utils.c -o myprog + + If you compile only some of the modules of the program with `-pg', +you can still profile the program, but you won't get complete +information about the modules that were compiled without `-pg'. The +only information you get for the functions in those modules is the +total time spent in them; there is no record of how many times they +were called, or from where. This will not affect the flat profile +(except that the `calls' field for the functions will be blank), but +will greatly reduce the usefulness of the call graph. + + If you wish to perform line-by-line profiling you should use the +`gcov' tool instead of `gprof'. See that tool's manual or info pages +for more details of how to do this. + + Note, older versions of `gcc' produce line-by-line profiling +information that works with `gprof' rather than `gcov' so there is +still support for displaying this kind of information in `gprof'. *Note +Line-by-line Profiling: Line-by-line. + + It also worth noting that `gcc' implements a +`-finstrument-functions' command line option which will insert calls to +special user supplied instrumentation routines at the entry and exit of +every function in their program. This can be used to implement an +alternative profiling scheme. + + +File: gprof.info, Node: Executing, Next: Invoking, Prev: Compiling, Up: Top + +3 Executing the Program +*********************** + +Once the program is compiled for profiling, you must run it in order to +generate the information that `gprof' needs. Simply run the program as +usual, using the normal arguments, file names, etc. The program should +run normally, producing the same output as usual. It will, however, run +somewhat slower than normal because of the time spent collecting and +writing the profile data. + + The way you run the program--the arguments and input that you give +it--may have a dramatic effect on what the profile information shows. +The profile data will describe the parts of the program that were +activated for the particular input you use. For example, if the first +command you give to your program is to quit, the profile data will show +the time used in initialization and in cleanup, but not much else. + + Your program will write the profile data into a file called +`gmon.out' just before exiting. If there is already a file called +`gmon.out', its contents are overwritten. There is currently no way to +tell the program to write the profile data under a different name, but +you can rename the file afterwards if you are concerned that it may be +overwritten. + + In order to write the `gmon.out' file properly, your program must +exit normally: by returning from `main' or by calling `exit'. Calling +the low-level function `_exit' does not write the profile data, and +neither does abnormal termination due to an unhandled signal. + + The `gmon.out' file is written in the program's _current working +directory_ at the time it exits. This means that if your program calls +`chdir', the `gmon.out' file will be left in the last directory your +program `chdir''d to. If you don't have permission to write in this +directory, the file is not written, and you will get an error message. + + Older versions of the GNU profiling library may also write a file +called `bb.out'. This file, if present, contains an human-readable +listing of the basic-block execution counts. Unfortunately, the +appearance of a human-readable `bb.out' means the basic-block counts +didn't get written into `gmon.out'. The Perl script `bbconv.pl', +included with the `gprof' source distribution, will convert a `bb.out' +file into a format readable by `gprof'. Invoke it like this: + + bbconv.pl < bb.out > BH-DATA + + This translates the information in `bb.out' into a form that `gprof' +can understand. But you still need to tell `gprof' about the existence +of this translated information. To do that, include BB-DATA on the +`gprof' command line, _along with `gmon.out'_, like this: + + gprof OPTIONS EXECUTABLE-FILE gmon.out BB-DATA [YET-MORE-PROFILE-DATA-FILES...] [> OUTFILE] + + +File: gprof.info, Node: Invoking, Next: Output, Prev: Executing, Up: Top + +4 `gprof' Command Summary +************************* + +After you have a profile data file `gmon.out', you can run `gprof' to +interpret the information in it. The `gprof' program prints a flat +profile and a call graph on standard output. Typically you would +redirect the output of `gprof' into a file with `>'. + + You run `gprof' like this: + + gprof OPTIONS [EXECUTABLE-FILE [PROFILE-DATA-FILES...]] [> OUTFILE] + +Here square-brackets indicate optional arguments. + + If you omit the executable file name, the file `a.out' is used. If +you give no profile data file name, the file `gmon.out' is used. If +any file is not in the proper format, or if the profile data file does +not appear to belong to the executable file, an error message is +printed. + + You can give more than one profile data file by entering all their +names after the executable file name; then the statistics in all the +data files are summed together. + + The order of these options does not matter. + +* Menu: + +* Output Options:: Controlling `gprof''s output style +* Analysis Options:: Controlling how `gprof' analyzes its data +* Miscellaneous Options:: +* Deprecated Options:: Options you no longer need to use, but which + have been retained for compatibility +* Symspecs:: Specifying functions to include or exclude + + +File: gprof.info, Node: Output Options, Next: Analysis Options, Up: Invoking + +4.1 Output Options +================== + +These options specify which of several output formats `gprof' should +produce. + + Many of these options take an optional "symspec" to specify +functions to be included or excluded. These options can be specified +multiple times, with different symspecs, to include or exclude sets of +symbols. *Note Symspecs: Symspecs. + + Specifying any of these options overrides the default (`-p -q'), +which prints a flat profile and call graph analysis for all functions. + +`-A[SYMSPEC]' +`--annotated-source[=SYMSPEC]' + The `-A' option causes `gprof' to print annotated source code. If + SYMSPEC is specified, print output only for matching symbols. + *Note The Annotated Source Listing: Annotated Source. + +`-b' +`--brief' + If the `-b' option is given, `gprof' doesn't print the verbose + blurbs that try to explain the meaning of all of the fields in the + tables. This is useful if you intend to print out the output, or + are tired of seeing the blurbs. + +`-C[SYMSPEC]' +`--exec-counts[=SYMSPEC]' + The `-C' option causes `gprof' to print a tally of functions and + the number of times each was called. If SYMSPEC is specified, + print tally only for matching symbols. + + If the profile data file contains basic-block count records, + specifying the `-l' option, along with `-C', will cause basic-block + execution counts to be tallied and displayed. + +`-i' +`--file-info' + The `-i' option causes `gprof' to display summary information + about the profile data file(s) and then exit. The number of + histogram, call graph, and basic-block count records is displayed. + +`-I DIRS' +`--directory-path=DIRS' + The `-I' option specifies a list of search directories in which to + find source files. Environment variable GPROF_PATH can also be + used to convey this information. Used mostly for annotated source + output. + +`-J[SYMSPEC]' +`--no-annotated-source[=SYMSPEC]' + The `-J' option causes `gprof' not to print annotated source code. + If SYMSPEC is specified, `gprof' prints annotated source, but + excludes matching symbols. + +`-L' +`--print-path' + Normally, source filenames are printed with the path component + suppressed. The `-L' option causes `gprof' to print the full + pathname of source filenames, which is determined from symbolic + debugging information in the image file and is relative to the + directory in which the compiler was invoked. + +`-p[SYMSPEC]' +`--flat-profile[=SYMSPEC]' + The `-p' option causes `gprof' to print a flat profile. If + SYMSPEC is specified, print flat profile only for matching symbols. + *Note The Flat Profile: Flat Profile. + +`-P[SYMSPEC]' +`--no-flat-profile[=SYMSPEC]' + The `-P' option causes `gprof' to suppress printing a flat profile. + If SYMSPEC is specified, `gprof' prints a flat profile, but + excludes matching symbols. + +`-q[SYMSPEC]' +`--graph[=SYMSPEC]' + The `-q' option causes `gprof' to print the call graph analysis. + If SYMSPEC is specified, print call graph only for matching symbols + and their children. *Note The Call Graph: Call Graph. + +`-Q[SYMSPEC]' +`--no-graph[=SYMSPEC]' + The `-Q' option causes `gprof' to suppress printing the call graph. + If SYMSPEC is specified, `gprof' prints a call graph, but excludes + matching symbols. + +`-t' +`--table-length=NUM' + The `-t' option causes the NUM most active source lines in each + source file to be listed when source annotation is enabled. The + default is 10. + +`-y' +`--separate-files' + This option affects annotated source output only. Normally, + `gprof' prints annotated source files to standard-output. If this + option is specified, annotated source for a file named + `path/FILENAME' is generated in the file `FILENAME-ann'. If the + underlying file system would truncate `FILENAME-ann' so that it + overwrites the original `FILENAME', `gprof' generates annotated + source in the file `FILENAME.ann' instead (if the original file + name has an extension, that extension is _replaced_ with `.ann'). + +`-Z[SYMSPEC]' +`--no-exec-counts[=SYMSPEC]' + The `-Z' option causes `gprof' not to print a tally of functions + and the number of times each was called. If SYMSPEC is specified, + print tally, but exclude matching symbols. + +`-r' +`--function-ordering' + The `--function-ordering' option causes `gprof' to print a + suggested function ordering for the program based on profiling + data. This option suggests an ordering which may improve paging, + tlb and cache behavior for the program on systems which support + arbitrary ordering of functions in an executable. + + The exact details of how to force the linker to place functions in + a particular order is system dependent and out of the scope of this + manual. + +`-R MAP_FILE' +`--file-ordering MAP_FILE' + The `--file-ordering' option causes `gprof' to print a suggested + .o link line ordering for the program based on profiling data. + This option suggests an ordering which may improve paging, tlb and + cache behavior for the program on systems which do not support + arbitrary ordering of functions in an executable. + + Use of the `-a' argument is highly recommended with this option. + + The MAP_FILE argument is a pathname to a file which provides + function name to object file mappings. The format of the file is + similar to the output of the program `nm'. + + c-parse.o:00000000 T yyparse + c-parse.o:00000004 C yyerrflag + c-lang.o:00000000 T maybe_objc_method_name + c-lang.o:00000000 T print_lang_statistics + c-lang.o:00000000 T recognize_objc_keyword + c-decl.o:00000000 T print_lang_identifier + c-decl.o:00000000 T print_lang_type + ... + + To create a MAP_FILE with GNU `nm', type a command like `nm + --extern-only --defined-only -v --print-file-name program-name'. + +`-T' +`--traditional' + The `-T' option causes `gprof' to print its output in + "traditional" BSD style. + +`-w WIDTH' +`--width=WIDTH' + Sets width of output lines to WIDTH. Currently only used when + printing the function index at the bottom of the call graph. + +`-x' +`--all-lines' + This option affects annotated source output only. By default, + only the lines at the beginning of a basic-block are annotated. + If this option is specified, every line in a basic-block is + annotated by repeating the annotation for the first line. This + behavior is similar to `tcov''s `-a'. + +`--demangle[=STYLE]' +`--no-demangle' + These options control whether C++ symbol names should be demangled + when printing output. The default is to demangle symbols. The + `--no-demangle' option may be used to turn off demangling. + Different compilers have different mangling styles. The optional + demangling style argument can be used to choose an appropriate + demangling style for your compiler. + + +File: gprof.info, Node: Analysis Options, Next: Miscellaneous Options, Prev: Output Options, Up: Invoking + +4.2 Analysis Options +==================== + +`-a' +`--no-static' + The `-a' option causes `gprof' to suppress the printing of + statically declared (private) functions. (These are functions + whose names are not listed as global, and which are not visible + outside the file/function/block where they were defined.) Time + spent in these functions, calls to/from them, etc., will all be + attributed to the function that was loaded directly before it in + the executable file. This option affects both the flat profile + and the call graph. + +`-c' +`--static-call-graph' + The `-c' option causes the call graph of the program to be + augmented by a heuristic which examines the text space of the + object file and identifies function calls in the binary machine + code. Since normal call graph records are only generated when + functions are entered, this option identifies children that could + have been called, but never were. Calls to functions that were + not compiled with profiling enabled are also identified, but only + if symbol table entries are present for them. Calls to dynamic + library routines are typically _not_ found by this option. + Parents or children identified via this heuristic are indicated in + the call graph with call counts of `0'. + +`-D' +`--ignore-non-functions' + The `-D' option causes `gprof' to ignore symbols which are not + known to be functions. This option will give more accurate + profile data on systems where it is supported (Solaris and HPUX for + example). + +`-k FROM/TO' + The `-k' option allows you to delete from the call graph any arcs + from symbols matching symspec FROM to those matching symspec TO. + +`-l' +`--line' + The `-l' option enables line-by-line profiling, which causes + histogram hits to be charged to individual source code lines, + instead of functions. This feature only works with programs + compiled by older versions of the `gcc' compiler. Newer versions + of `gcc' are designed to work with the `gcov' tool instead. + + If the program was compiled with basic-block counting enabled, + this option will also identify how many times each line of code + was executed. While line-by-line profiling can help isolate where + in a large function a program is spending its time, it also + significantly increases the running time of `gprof', and magnifies + statistical inaccuracies. *Note Statistical Sampling Error: + Sampling Error. + +`-m NUM' +`--min-count=NUM' + This option affects execution count output only. Symbols that are + executed less than NUM times are suppressed. + +`-nSYMSPEC' +`--time=SYMSPEC' + The `-n' option causes `gprof', in its call graph analysis, to + only propagate times for symbols matching SYMSPEC. + +`-NSYMSPEC' +`--no-time=SYMSPEC' + The `-n' option causes `gprof', in its call graph analysis, not to + propagate times for symbols matching SYMSPEC. + +`-SFILENAME' +`--external-symbol-table=FILENAME' + The `-S' option causes `gprof' to read an external symbol table + file, such as `/proc/kallsyms', rather than read the symbol table + from the given object file (the default is `a.out'). This is useful + for profiling kernel modules. + +`-z' +`--display-unused-functions' + If you give the `-z' option, `gprof' will mention all functions in + the flat profile, even those that were never called, and that had + no time spent in them. This is useful in conjunction with the + `-c' option for discovering which routines were never called. + + + +File: gprof.info, Node: Miscellaneous Options, Next: Deprecated Options, Prev: Analysis Options, Up: Invoking + +4.3 Miscellaneous Options +========================= + +`-d[NUM]' +`--debug[=NUM]' + The `-d NUM' option specifies debugging options. If NUM is not + specified, enable all debugging. *Note Debugging `gprof': + Debugging. + +`-h' +`--help' + The `-h' option prints command line usage. + +`-ONAME' +`--file-format=NAME' + Selects the format of the profile data files. Recognized formats + are `auto' (the default), `bsd', `4.4bsd', `magic', and `prof' + (not yet supported). + +`-s' +`--sum' + The `-s' option causes `gprof' to summarize the information in the + profile data files it read in, and write out a profile data file + called `gmon.sum', which contains all the information from the + profile data files that `gprof' read in. The file `gmon.sum' may + be one of the specified input files; the effect of this is to + merge the data in the other input files into `gmon.sum'. + + Eventually you can run `gprof' again without `-s' to analyze the + cumulative data in the file `gmon.sum'. + +`-v' +`--version' + The `-v' flag causes `gprof' to print the current version number, + and then exit. + + + +File: gprof.info, Node: Deprecated Options, Next: Symspecs, Prev: Miscellaneous Options, Up: Invoking + +4.4 Deprecated Options +====================== + +These options have been replaced with newer versions that use symspecs. + +`-e FUNCTION_NAME' + The `-e FUNCTION' option tells `gprof' to not print information + about the function FUNCTION_NAME (and its children...) in the call + graph. The function will still be listed as a child of any + functions that call it, but its index number will be shown as + `[not printed]'. More than one `-e' option may be given; only one + FUNCTION_NAME may be indicated with each `-e' option. + +`-E FUNCTION_NAME' + The `-E FUNCTION' option works like the `-e' option, but time + spent in the function (and children who were not called from + anywhere else), will not be used to compute the + percentages-of-time for the call graph. More than one `-E' option + may be given; only one FUNCTION_NAME may be indicated with each + `-E' option. + +`-f FUNCTION_NAME' + The `-f FUNCTION' option causes `gprof' to limit the call graph to + the function FUNCTION_NAME and its children (and their + children...). More than one `-f' option may be given; only one + FUNCTION_NAME may be indicated with each `-f' option. + +`-F FUNCTION_NAME' + The `-F FUNCTION' option works like the `-f' option, but only time + spent in the function and its children (and their children...) + will be used to determine total-time and percentages-of-time for + the call graph. More than one `-F' option may be given; only one + FUNCTION_NAME may be indicated with each `-F' option. The `-F' + option overrides the `-E' option. + + + Note that only one function can be specified with each `-e', `-E', +`-f' or `-F' option. To specify more than one function, use multiple +options. For example, this command: + + gprof -e boring -f foo -f bar myprogram > gprof.output + +lists in the call graph all functions that were reached from either +`foo' or `bar' and were not reachable from `boring'. + + +File: gprof.info, Node: Symspecs, Prev: Deprecated Options, Up: Invoking + +4.5 Symspecs +============ + +Many of the output options allow functions to be included or excluded +using "symspecs" (symbol specifications), which observe the following +syntax: + + filename_containing_a_dot + | funcname_not_containing_a_dot + | linenumber + | ( [ any_filename ] `:' ( any_funcname | linenumber ) ) + + Here are some sample symspecs: + +`main.c' + Selects everything in file `main.c'--the dot in the string tells + `gprof' to interpret the string as a filename, rather than as a + function name. To select a file whose name does not contain a + dot, a trailing colon should be specified. For example, `odd:' is + interpreted as the file named `odd'. + +`main' + Selects all functions named `main'. + + Note that there may be multiple instances of the same function name + because some of the definitions may be local (i.e., static). + Unless a function name is unique in a program, you must use the + colon notation explained below to specify a function from a + specific source file. + + Sometimes, function names contain dots. In such cases, it is + necessary to add a leading colon to the name. For example, + `:.mul' selects function `.mul'. + + In some object file formats, symbols have a leading underscore. + `gprof' will normally not print these underscores. When you name a + symbol in a symspec, you should type it exactly as `gprof' prints + it in its output. For example, if the compiler produces a symbol + `_main' from your `main' function, `gprof' still prints it as + `main' in its output, so you should use `main' in symspecs. + +`main.c:main' + Selects function `main' in file `main.c'. + +`main.c:134' + Selects line 134 in file `main.c'. + + +File: gprof.info, Node: Output, Next: Inaccuracy, Prev: Invoking, Up: Top + +5 Interpreting `gprof''s Output +******************************* + +`gprof' can produce several different output styles, the most important +of which are described below. The simplest output styles (file +information, execution count, and function and file ordering) are not +described here, but are documented with the respective options that +trigger them. *Note Output Options: Output Options. + +* Menu: + +* Flat Profile:: The flat profile shows how much time was spent + executing directly in each function. +* Call Graph:: The call graph shows which functions called which + others, and how much time each function used + when its subroutine calls are included. +* Line-by-line:: `gprof' can analyze individual source code lines +* Annotated Source:: The annotated source listing displays source code + labeled with execution counts + + +File: gprof.info, Node: Flat Profile, Next: Call Graph, Up: Output + +5.1 The Flat Profile +==================== + +The "flat profile" shows the total amount of time your program spent +executing each function. Unless the `-z' option is given, functions +with no apparent time spent in them, and no apparent calls to them, are +not mentioned. Note that if a function was not compiled for profiling, +and didn't run long enough to show up on the program counter histogram, +it will be indistinguishable from a function that was never called. + + This is part of a flat profile for a small program: + + Flat profile: + + Each sample counts as 0.01 seconds. + % cumulative self self total + time seconds seconds calls ms/call ms/call name + 33.34 0.02 0.02 7208 0.00 0.00 open + 16.67 0.03 0.01 244 0.04 0.12 offtime + 16.67 0.04 0.01 8 1.25 1.25 memccpy + 16.67 0.05 0.01 7 1.43 1.43 write + 16.67 0.06 0.01 mcount + 0.00 0.06 0.00 236 0.00 0.00 tzset + 0.00 0.06 0.00 192 0.00 0.00 tolower + 0.00 0.06 0.00 47 0.00 0.00 strlen + 0.00 0.06 0.00 45 0.00 0.00 strchr + 0.00 0.06 0.00 1 0.00 50.00 main + 0.00 0.06 0.00 1 0.00 0.00 memcpy + 0.00 0.06 0.00 1 0.00 10.11 print + 0.00 0.06 0.00 1 0.00 0.00 profil + 0.00 0.06 0.00 1 0.00 50.00 report + ... + +The functions are sorted first by decreasing run-time spent in them, +then by decreasing number of calls, then alphabetically by name. The +functions `mcount' and `profil' are part of the profiling apparatus and +appear in every flat profile; their time gives a measure of the amount +of overhead due to profiling. + + Just before the column headers, a statement appears indicating how +much time each sample counted as. This "sampling period" estimates the +margin of error in each of the time figures. A time figure that is not +much larger than this is not reliable. In this example, each sample +counted as 0.01 seconds, suggesting a 100 Hz sampling rate. The +program's total execution time was 0.06 seconds, as indicated by the +`cumulative seconds' field. Since each sample counted for 0.01 +seconds, this means only six samples were taken during the run. Two of +the samples occurred while the program was in the `open' function, as +indicated by the `self seconds' field. Each of the other four samples +occurred one each in `offtime', `memccpy', `write', and `mcount'. +Since only six samples were taken, none of these values can be regarded +as particularly reliable. In another run, the `self seconds' field for +`mcount' might well be `0.00' or `0.02'. *Note Statistical Sampling +Error: Sampling Error, for a complete discussion. + + The remaining functions in the listing (those whose `self seconds' +field is `0.00') didn't appear in the histogram samples at all. +However, the call graph indicated that they were called, so therefore +they are listed, sorted in decreasing order by the `calls' field. +Clearly some time was spent executing these functions, but the paucity +of histogram samples prevents any determination of how much time each +took. + + Here is what the fields in each line mean: + +`% time' + This is the percentage of the total execution time your program + spent in this function. These should all add up to 100%. + +`cumulative seconds' + This is the cumulative total number of seconds the computer spent + executing this functions, plus the time spent in all the functions + above this one in this table. + +`self seconds' + This is the number of seconds accounted for by this function alone. + The flat profile listing is sorted first by this number. + +`calls' + This is the total number of times the function was called. If the + function was never called, or the number of times it was called + cannot be determined (probably because the function was not + compiled with profiling enabled), the "calls" field is blank. + +`self ms/call' + This represents the average number of milliseconds spent in this + function per call, if this function is profiled. Otherwise, this + field is blank for this function. + +`total ms/call' + This represents the average number of milliseconds spent in this + function and its descendants per call, if this function is + profiled. Otherwise, this field is blank for this function. This + is the only field in the flat profile that uses call graph + analysis. + +`name' + This is the name of the function. The flat profile is sorted by + this field alphabetically after the "self seconds" and "calls" + fields are sorted. + + +File: gprof.info, Node: Call Graph, Next: Line-by-line, Prev: Flat Profile, Up: Output + +5.2 The Call Graph +================== + +The "call graph" shows how much time was spent in each function and its +children. From this information, you can find functions that, while +they themselves may not have used much time, called other functions +that did use unusual amounts of time. + + Here is a sample call from a small program. This call came from the +same `gprof' run as the flat profile example in the previous section. + + granularity: each sample hit covers 2 byte(s) for 20.00% of 0.05 seconds + + index % time self children called name + + [1] 100.0 0.00 0.05 start [1] + 0.00 0.05 1/1 main [2] + 0.00 0.00 1/2 on_exit [28] + 0.00 0.00 1/1 exit [59] + ----------------------------------------------- + 0.00 0.05 1/1 start [1] + [2] 100.0 0.00 0.05 1 main [2] + 0.00 0.05 1/1 report [3] + ----------------------------------------------- + 0.00 0.05 1/1 main [2] + [3] 100.0 0.00 0.05 1 report [3] + 0.00 0.03 8/8 timelocal [6] + 0.00 0.01 1/1 print [9] + 0.00 0.01 9/9 fgets [12] + 0.00 0.00 12/34 strncmp [40] + 0.00 0.00 8/8 lookup [20] + 0.00 0.00 1/1 fopen [21] + 0.00 0.00 8/8 chewtime [24] + 0.00 0.00 8/16 skipspace [44] + ----------------------------------------------- + [4] 59.8 0.01 0.02 8+472 [4] + 0.01 0.02 244+260 offtime [7] + 0.00 0.00 236+1 tzset [26] + ----------------------------------------------- + + The lines full of dashes divide this table into "entries", one for +each function. Each entry has one or more lines. + + In each entry, the primary line is the one that starts with an index +number in square brackets. The end of this line says which function +the entry is for. The preceding lines in the entry describe the +callers of this function and the following lines describe its +subroutines (also called "children" when we speak of the call graph). + + The entries are sorted by time spent in the function and its +subroutines. + + The internal profiling function `mcount' (*note The Flat Profile: +Flat Profile.) is never mentioned in the call graph. + +* Menu: + +* Primary:: Details of the primary line's contents. +* Callers:: Details of caller-lines' contents. +* Subroutines:: Details of subroutine-lines' contents. +* Cycles:: When there are cycles of recursion, + such as `a' calls `b' calls `a'... + + +File: gprof.info, Node: Primary, Next: Callers, Up: Call Graph + +5.2.1 The Primary Line +---------------------- + +The "primary line" in a call graph entry is the line that describes the +function which the entry is about and gives the overall statistics for +this function. + + For reference, we repeat the primary line from the entry for function +`report' in our main example, together with the heading line that shows +the names of the fields: + + index % time self children called name + ... + [3] 100.0 0.00 0.05 1 report [3] + + Here is what the fields in the primary line mean: + +`index' + Entries are numbered with consecutive integers. Each function + therefore has an index number, which appears at the beginning of + its primary line. + + Each cross-reference to a function, as a caller or subroutine of + another, gives its index number as well as its name. The index + number guides you if you wish to look for the entry for that + function. + +`% time' + This is the percentage of the total time that was spent in this + function, including time spent in subroutines called from this + function. + + The time spent in this function is counted again for the callers of + this function. Therefore, adding up these percentages is + meaningless. + +`self' + This is the total amount of time spent in this function. This + should be identical to the number printed in the `seconds' field + for this function in the flat profile. + +`children' + This is the total amount of time spent in the subroutine calls + made by this function. This should be equal to the sum of all the + `self' and `children' entries of the children listed directly + below this function. + +`called' + This is the number of times the function was called. + + If the function called itself recursively, there are two numbers, + separated by a `+'. The first number counts non-recursive calls, + and the second counts recursive calls. + + In the example above, the function `report' was called once from + `main'. + +`name' + This is the name of the current function. The index number is + repeated after it. + + If the function is part of a cycle of recursion, the cycle number + is printed between the function's name and the index number (*note + How Mutually Recursive Functions Are Described: Cycles.). For + example, if function `gnurr' is part of cycle number one, and has + index number twelve, its primary line would be end like this: + + gnurr [12] + + +File: gprof.info, Node: Callers, Next: Subroutines, Prev: Primary, Up: Call Graph + +5.2.2 Lines for a Function's Callers +------------------------------------ + +A function's entry has a line for each function it was called by. +These lines' fields correspond to the fields of the primary line, but +their meanings are different because of the difference in context. + + For reference, we repeat two lines from the entry for the function +`report', the primary line and one caller-line preceding it, together +with the heading line that shows the names of the fields: + + index % time self children called name + ... + 0.00 0.05 1/1 main [2] + [3] 100.0 0.00 0.05 1 report [3] + + Here are the meanings of the fields in the caller-line for `report' +called from `main': + +`self' + An estimate of the amount of time spent in `report' itself when it + was called from `main'. + +`children' + An estimate of the amount of time spent in subroutines of `report' + when `report' was called from `main'. + + The sum of the `self' and `children' fields is an estimate of the + amount of time spent within calls to `report' from `main'. + +`called' + Two numbers: the number of times `report' was called from `main', + followed by the total number of non-recursive calls to `report' + from all its callers. + +`name and index number' + The name of the caller of `report' to which this line applies, + followed by the caller's index number. + + Not all functions have entries in the call graph; some options to + `gprof' request the omission of certain functions. When a caller + has no entry of its own, it still has caller-lines in the entries + of the functions it calls. + + If the caller is part of a recursion cycle, the cycle number is + printed between the name and the index number. + + If the identity of the callers of a function cannot be determined, a +dummy caller-line is printed which has `' as the "caller's +name" and all other fields blank. This can happen for signal handlers. + + +File: gprof.info, Node: Subroutines, Next: Cycles, Prev: Callers, Up: Call Graph + +5.2.3 Lines for a Function's Subroutines +---------------------------------------- + +A function's entry has a line for each of its subroutines--in other +words, a line for each other function that it called. These lines' +fields correspond to the fields of the primary line, but their meanings +are different because of the difference in context. + + For reference, we repeat two lines from the entry for the function +`main', the primary line and a line for a subroutine, together with the +heading line that shows the names of the fields: + + index % time self children called name + ... + [2] 100.0 0.00 0.05 1 main [2] + 0.00 0.05 1/1 report [3] + + Here are the meanings of the fields in the subroutine-line for `main' +calling `report': + +`self' + An estimate of the amount of time spent directly within `report' + when `report' was called from `main'. + +`children' + An estimate of the amount of time spent in subroutines of `report' + when `report' was called from `main'. + + The sum of the `self' and `children' fields is an estimate of the + total time spent in calls to `report' from `main'. + +`called' + Two numbers, the number of calls to `report' from `main' followed + by the total number of non-recursive calls to `report'. This + ratio is used to determine how much of `report''s `self' and + `children' time gets credited to `main'. *Note Estimating + `children' Times: Assumptions. + +`name' + The name of the subroutine of `main' to which this line applies, + followed by the subroutine's index number. + + If the caller is part of a recursion cycle, the cycle number is + printed between the name and the index number. + + +File: gprof.info, Node: Cycles, Prev: Subroutines, Up: Call Graph + +5.2.4 How Mutually Recursive Functions Are Described +---------------------------------------------------- + +The graph may be complicated by the presence of "cycles of recursion" +in the call graph. A cycle exists if a function calls another function +that (directly or indirectly) calls (or appears to call) the original +function. For example: if `a' calls `b', and `b' calls `a', then `a' +and `b' form a cycle. + + Whenever there are call paths both ways between a pair of functions, +they belong to the same cycle. If `a' and `b' call each other and `b' +and `c' call each other, all three make one cycle. Note that even if +`b' only calls `a' if it was not called from `a', `gprof' cannot +determine this, so `a' and `b' are still considered a cycle. + + The cycles are numbered with consecutive integers. When a function +belongs to a cycle, each time the function name appears in the call +graph it is followed by `'. + + The reason cycles matter is that they make the time values in the +call graph paradoxical. The "time spent in children" of `a' should +include the time spent in its subroutine `b' and in `b''s +subroutines--but one of `b''s subroutines is `a'! How much of `a''s +time should be included in the children of `a', when `a' is indirectly +recursive? + + The way `gprof' resolves this paradox is by creating a single entry +for the cycle as a whole. The primary line of this entry describes the +total time spent directly in the functions of the cycle. The +"subroutines" of the cycle are the individual functions of the cycle, +and all other functions that were called directly by them. The +"callers" of the cycle are the functions, outside the cycle, that +called functions in the cycle. + + Here is an example portion of a call graph which shows a cycle +containing functions `a' and `b'. The cycle was entered by a call to +`a' from `main'; both `a' and `b' called `c'. + + index % time self children called name + ---------------------------------------- + 1.77 0 1/1 main [2] + [3] 91.71 1.77 0 1+5 [3] + 1.02 0 3 b [4] + 0.75 0 2 a [5] + ---------------------------------------- + 3 a [5] + [4] 52.85 1.02 0 0 b [4] + 2 a [5] + 0 0 3/6 c [6] + ---------------------------------------- + 1.77 0 1/1 main [2] + 2 b [4] + [5] 38.86 0.75 0 1 a [5] + 3 b [4] + 0 0 3/6 c [6] + ---------------------------------------- + +(The entire call graph for this program contains in addition an entry +for `main', which calls `a', and an entry for `c', with callers `a' and +`b'.) + + index % time self children called name + + [1] 100.00 0 1.93 0 start [1] + 0.16 1.77 1/1 main [2] + ---------------------------------------- + 0.16 1.77 1/1 start [1] + [2] 100.00 0.16 1.77 1 main [2] + 1.77 0 1/1 a [5] + ---------------------------------------- + 1.77 0 1/1 main [2] + [3] 91.71 1.77 0 1+5 [3] + 1.02 0 3 b [4] + 0.75 0 2 a [5] + 0 0 6/6 c [6] + ---------------------------------------- + 3 a [5] + [4] 52.85 1.02 0 0 b [4] + 2 a [5] + 0 0 3/6 c [6] + ---------------------------------------- + 1.77 0 1/1 main [2] + 2 b [4] + [5] 38.86 0.75 0 1 a [5] + 3 b [4] + 0 0 3/6 c [6] + ---------------------------------------- + 0 0 3/6 b [4] + 0 0 3/6 a [5] + [6] 0.00 0 0 6 c [6] + ---------------------------------------- + + The `self' field of the cycle's primary line is the total time spent +in all the functions of the cycle. It equals the sum of the `self' +fields for the individual functions in the cycle, found in the entry in +the subroutine lines for these functions. + + The `children' fields of the cycle's primary line and subroutine +lines count only subroutines outside the cycle. Even though `a' calls +`b', the time spent in those calls to `b' is not counted in `a''s +`children' time. Thus, we do not encounter the problem of what to do +when the time in those calls to `b' includes indirect recursive calls +back to `a'. + + The `children' field of a caller-line in the cycle's entry estimates +the amount of time spent _in the whole cycle_, and its other +subroutines, on the times when that caller called a function in the +cycle. + + The `called' field in the primary line for the cycle has two numbers: +first, the number of times functions in the cycle were called by +functions outside the cycle; second, the number of times they were +called by functions in the cycle (including times when a function in +the cycle calls itself). This is a generalization of the usual split +into non-recursive and recursive calls. + + The `called' field of a subroutine-line for a cycle member in the +cycle's entry says how many time that function was called from +functions in the cycle. The total of all these is the second number in +the primary line's `called' field. + + In the individual entry for a function in a cycle, the other +functions in the same cycle can appear as subroutines and as callers. +These lines show how many times each function in the cycle called or +was called from each other function in the cycle. The `self' and +`children' fields in these lines are blank because of the difficulty of +defining meanings for them when recursion is going on. + + +File: gprof.info, Node: Line-by-line, Next: Annotated Source, Prev: Call Graph, Up: Output + +5.3 Line-by-line Profiling +========================== + +`gprof''s `-l' option causes the program to perform "line-by-line" +profiling. In this mode, histogram samples are assigned not to +functions, but to individual lines of source code. This only works +with programs compiled with older versions of the `gcc' compiler. +Newer versions of `gcc' use a different program - `gcov' - to display +line-by-line profiling information. + + With the older versions of `gcc' the program usually has to be +compiled with a `-g' option, in addition to `-pg', in order to generate +debugging symbols for tracking source code lines. Note, in much older +versions of `gcc' the program had to be compiled with the `-a' command +line option as well. + + The flat profile is the most useful output table in line-by-line +mode. The call graph isn't as useful as normal, since the current +version of `gprof' does not propagate call graph arcs from source code +lines to the enclosing function. The call graph does, however, show +each line of code that called each function, along with a count. + + Here is a section of `gprof''s output, without line-by-line +profiling. Note that `ct_init' accounted for four histogram hits, and +13327 calls to `init_block'. + + Flat profile: + + Each sample counts as 0.01 seconds. + % cumulative self self total + time seconds seconds calls us/call us/call name + 30.77 0.13 0.04 6335 6.31 6.31 ct_init + + + Call graph (explanation follows) + + + granularity: each sample hit covers 4 byte(s) for 7.69% of 0.13 seconds + + index % time self children called name + + 0.00 0.00 1/13496 name_too_long + 0.00 0.00 40/13496 deflate + 0.00 0.00 128/13496 deflate_fast + 0.00 0.00 13327/13496 ct_init + [7] 0.0 0.00 0.00 13496 init_block + + Now let's look at some of `gprof''s output from the same program run, +this time with line-by-line profiling enabled. Note that `ct_init''s +four histogram hits are broken down into four lines of source code--one +hit occurred on each of lines 349, 351, 382 and 385. In the call graph, +note how `ct_init''s 13327 calls to `init_block' are broken down into +one call from line 396, 3071 calls from line 384, 3730 calls from line +385, and 6525 calls from 387. + + Flat profile: + + Each sample counts as 0.01 seconds. + % cumulative self + time seconds seconds calls name + 7.69 0.10 0.01 ct_init (trees.c:349) + 7.69 0.11 0.01 ct_init (trees.c:351) + 7.69 0.12 0.01 ct_init (trees.c:382) + 7.69 0.13 0.01 ct_init (trees.c:385) + + + Call graph (explanation follows) + + + granularity: each sample hit covers 4 byte(s) for 7.69% of 0.13 seconds + + % time self children called name + + 0.00 0.00 1/13496 name_too_long (gzip.c:1440) + 0.00 0.00 1/13496 deflate (deflate.c:763) + 0.00 0.00 1/13496 ct_init (trees.c:396) + 0.00 0.00 2/13496 deflate (deflate.c:727) + 0.00 0.00 4/13496 deflate (deflate.c:686) + 0.00 0.00 5/13496 deflate (deflate.c:675) + 0.00 0.00 12/13496 deflate (deflate.c:679) + 0.00 0.00 16/13496 deflate (deflate.c:730) + 0.00 0.00 128/13496 deflate_fast (deflate.c:654) + 0.00 0.00 3071/13496 ct_init (trees.c:384) + 0.00 0.00 3730/13496 ct_init (trees.c:385) + 0.00 0.00 6525/13496 ct_init (trees.c:387) + [6] 0.0 0.00 0.00 13496 init_block (trees.c:408) + + +File: gprof.info, Node: Annotated Source, Prev: Line-by-line, Up: Output + +5.4 The Annotated Source Listing +================================ + +`gprof''s `-A' option triggers an annotated source listing, which lists +the program's source code, each function labeled with the number of +times it was called. You may also need to specify the `-I' option, if +`gprof' can't find the source code files. + + With older versions of `gcc' compiling with `gcc ... -g -pg -a' +augments your program with basic-block counting code, in addition to +function counting code. This enables `gprof' to determine how many +times each line of code was executed. With newer versions of `gcc' +support for displaying basic-block counts is provided by the `gcov' +program. + + For example, consider the following function, taken from gzip, with +line numbers added: + + 1 ulg updcrc(s, n) + 2 uch *s; + 3 unsigned n; + 4 { + 5 register ulg c; + 6 + 7 static ulg crc = (ulg)0xffffffffL; + 8 + 9 if (s == NULL) { + 10 c = 0xffffffffL; + 11 } else { + 12 c = crc; + 13 if (n) do { + 14 c = crc_32_tab[...]; + 15 } while (--n); + 16 } + 17 crc = c; + 18 return c ^ 0xffffffffL; + 19 } + + `updcrc' has at least five basic-blocks. One is the function +itself. The `if' statement on line 9 generates two more basic-blocks, +one for each branch of the `if'. A fourth basic-block results from the +`if' on line 13, and the contents of the `do' loop form the fifth +basic-block. The compiler may also generate additional basic-blocks to +handle various special cases. + + A program augmented for basic-block counting can be analyzed with +`gprof -l -A'. The `-x' option is also helpful, to ensure that each +line of code is labeled at least once. Here is `updcrc''s annotated +source listing for a sample `gzip' run: + + ulg updcrc(s, n) + uch *s; + unsigned n; + 2 ->{ + register ulg c; + + static ulg crc = (ulg)0xffffffffL; + + 2 -> if (s == NULL) { + 1 -> c = 0xffffffffL; + 1 -> } else { + 1 -> c = crc; + 1 -> if (n) do { + 26312 -> c = crc_32_tab[...]; + 26312,1,26311 -> } while (--n); + } + 2 -> crc = c; + 2 -> return c ^ 0xffffffffL; + 2 ->} + + In this example, the function was called twice, passing once through +each branch of the `if' statement. The body of the `do' loop was +executed a total of 26312 times. Note how the `while' statement is +annotated. It began execution 26312 times, once for each iteration +through the loop. One of those times (the last time) it exited, while +it branched back to the beginning of the loop 26311 times. + + +File: gprof.info, Node: Inaccuracy, Next: How do I?, Prev: Output, Up: Top + +6 Inaccuracy of `gprof' Output +****************************** + +* Menu: + +* Sampling Error:: Statistical margins of error +* Assumptions:: Estimating children times + + +File: gprof.info, Node: Sampling Error, Next: Assumptions, Up: Inaccuracy + +6.1 Statistical Sampling Error +============================== + +The run-time figures that `gprof' gives you are based on a sampling +process, so they are subject to statistical inaccuracy. If a function +runs only a small amount of time, so that on the average the sampling +process ought to catch that function in the act only once, there is a +pretty good chance it will actually find that function zero times, or +twice. + + By contrast, the number-of-calls and basic-block figures are derived +by counting, not sampling. They are completely accurate and will not +vary from run to run if your program is deterministic and single +threaded. In multi-threaded applications, or single threaded +applications that link with multi-threaded libraries, the counts are +only deterministic if the counting function is thread-safe. (Note: +beware that the mcount counting function in glibc is _not_ +thread-safe). *Note Implementation of Profiling: Implementation. + + The "sampling period" that is printed at the beginning of the flat +profile says how often samples are taken. The rule of thumb is that a +run-time figure is accurate if it is considerably bigger than the +sampling period. + + The actual amount of error can be predicted. For N samples, the +_expected_ error is the square-root of N. For example, if the sampling +period is 0.01 seconds and `foo''s run-time is 1 second, N is 100 +samples (1 second/0.01 seconds), sqrt(N) is 10 samples, so the expected +error in `foo''s run-time is 0.1 seconds (10*0.01 seconds), or ten +percent of the observed value. Again, if the sampling period is 0.01 +seconds and `bar''s run-time is 100 seconds, N is 10000 samples, +sqrt(N) is 100 samples, so the expected error in `bar''s run-time is 1 +second, or one percent of the observed value. It is likely to vary +this much _on the average_ from one profiling run to the next. +(_Sometimes_ it will vary more.) + + This does not mean that a small run-time figure is devoid of +information. If the program's _total_ run-time is large, a small +run-time for one function does tell you that that function used an +insignificant fraction of the whole program's time. Usually this means +it is not worth optimizing. + + One way to get more accuracy is to give your program more (but +similar) input data so it will take longer. Another way is to combine +the data from several runs, using the `-s' option of `gprof'. Here is +how: + + 1. Run your program once. + + 2. Issue the command `mv gmon.out gmon.sum'. + + 3. Run your program again, the same as before. + + 4. Merge the new data in `gmon.out' into `gmon.sum' with this command: + + gprof -s EXECUTABLE-FILE gmon.out gmon.sum + + 5. Repeat the last two steps as often as you wish. + + 6. Analyze the cumulative data using this command: + + gprof EXECUTABLE-FILE gmon.sum > OUTPUT-FILE + + +File: gprof.info, Node: Assumptions, Prev: Sampling Error, Up: Inaccuracy + +6.2 Estimating `children' Times +=============================== + +Some of the figures in the call graph are estimates--for example, the +`children' time values and all the time figures in caller and +subroutine lines. + + There is no direct information about these measurements in the +profile data itself. Instead, `gprof' estimates them by making an +assumption about your program that might or might not be true. + + The assumption made is that the average time spent in each call to +any function `foo' is not correlated with who called `foo'. If `foo' +used 5 seconds in all, and 2/5 of the calls to `foo' came from `a', +then `foo' contributes 2 seconds to `a''s `children' time, by +assumption. + + This assumption is usually true enough, but for some programs it is +far from true. Suppose that `foo' returns very quickly when its +argument is zero; suppose that `a' always passes zero as an argument, +while other callers of `foo' pass other arguments. In this program, +all the time spent in `foo' is in the calls from callers other than `a'. +But `gprof' has no way of knowing this; it will blindly and incorrectly +charge 2 seconds of time in `foo' to the children of `a'. + + We hope some day to put more complete data into `gmon.out', so that +this assumption is no longer needed, if we can figure out how. For the +novice, the estimated figures are usually more useful than misleading. + + +File: gprof.info, Node: How do I?, Next: Incompatibilities, Prev: Inaccuracy, Up: Top + +7 Answers to Common Questions +***************************** + +How can I get more exact information about hot spots in my program? + Looking at the per-line call counts only tells part of the story. + Because `gprof' can only report call times and counts by function, + the best way to get finer-grained information on where the program + is spending its time is to re-factor large functions into sequences + of calls to smaller ones. Beware however that this can introduce + artificial hot spots since compiling with `-pg' adds a significant + overhead to function calls. An alternative solution is to use a + non-intrusive profiler, e.g. oprofile. + +How do I find which lines in my program were executed the most times? + Use the `gcov' program. + +How do I find which lines in my program called a particular function? + Use `gprof -l' and lookup the function in the call graph. The + callers will be broken down by function and line number. + +How do I analyze a program that runs for less than a second? + Try using a shell script like this one: + + for i in `seq 1 100`; do + fastprog + mv gmon.out gmon.out.$i + done + + gprof -s fastprog gmon.out.* + + gprof fastprog gmon.sum + + If your program is completely deterministic, all the call counts + will be simple multiples of 100 (i.e., a function called once in + each run will appear with a call count of 100). + + + +File: gprof.info, Node: Incompatibilities, Next: Details, Prev: How do I?, Up: Top + +8 Incompatibilities with Unix `gprof' +************************************* + +GNU `gprof' and Berkeley Unix `gprof' use the same data file +`gmon.out', and provide essentially the same information. But there +are a few differences. + + * GNU `gprof' uses a new, generalized file format with support for + basic-block execution counts and non-realtime histograms. A magic + cookie and version number allows `gprof' to easily identify new + style files. Old BSD-style files can still be read. *Note + Profiling Data File Format: File Format. + + * For a recursive function, Unix `gprof' lists the function as a + parent and as a child, with a `calls' field that lists the number + of recursive calls. GNU `gprof' omits these lines and puts the + number of recursive calls in the primary line. + + * When a function is suppressed from the call graph with `-e', GNU + `gprof' still lists it as a subroutine of functions that call it. + + * GNU `gprof' accepts the `-k' with its argument in the form + `from/to', instead of `from to'. + + * In the annotated source listing, if there are multiple basic + blocks on the same line, GNU `gprof' prints all of their counts, + separated by commas. + + * The blurbs, field widths, and output formats are different. GNU + `gprof' prints blurbs after the tables, so that you can see the + tables without skipping the blurbs. + + +File: gprof.info, Node: Details, Next: GNU Free Documentation License, Prev: Incompatibilities, Up: Top + +9 Details of Profiling +********************** + +* Menu: + +* Implementation:: How a program collects profiling information +* File Format:: Format of `gmon.out' files +* Internals:: `gprof''s internal operation +* Debugging:: Using `gprof''s `-d' option + + +File: gprof.info, Node: Implementation, Next: File Format, Up: Details + +9.1 Implementation of Profiling +=============================== + +Profiling works by changing how every function in your program is +compiled so that when it is called, it will stash away some information +about where it was called from. From this, the profiler can figure out +what function called it, and can count how many times it was called. +This change is made by the compiler when your program is compiled with +the `-pg' option, which causes every function to call `mcount' (or +`_mcount', or `__mcount', depending on the OS and compiler) as one of +its first operations. + + The `mcount' routine, included in the profiling library, is +responsible for recording in an in-memory call graph table both its +parent routine (the child) and its parent's parent. This is typically +done by examining the stack frame to find both the address of the +child, and the return address in the original parent. Since this is a +very machine-dependent operation, `mcount' itself is typically a short +assembly-language stub routine that extracts the required information, +and then calls `__mcount_internal' (a normal C function) with two +arguments--`frompc' and `selfpc'. `__mcount_internal' is responsible +for maintaining the in-memory call graph, which records `frompc', +`selfpc', and the number of times each of these call arcs was traversed. + + GCC Version 2 provides a magical function +(`__builtin_return_address'), which allows a generic `mcount' function +to extract the required information from the stack frame. However, on +some architectures, most notably the SPARC, using this builtin can be +very computationally expensive, and an assembly language version of +`mcount' is used for performance reasons. + + Number-of-calls information for library routines is collected by +using a special version of the C library. The programs in it are the +same as in the usual C library, but they were compiled with `-pg'. If +you link your program with `gcc ... -pg', it automatically uses the +profiling version of the library. + + Profiling also involves watching your program as it runs, and +keeping a histogram of where the program counter happens to be every +now and then. Typically the program counter is looked at around 100 +times per second of run time, but the exact frequency may vary from +system to system. + + This is done is one of two ways. Most UNIX-like operating systems +provide a `profil()' system call, which registers a memory array with +the kernel, along with a scale factor that determines how the program's +address space maps into the array. Typical scaling values cause every +2 to 8 bytes of address space to map into a single array slot. On +every tick of the system clock (assuming the profiled program is +running), the value of the program counter is examined and the +corresponding slot in the memory array is incremented. Since this is +done in the kernel, which had to interrupt the process anyway to handle +the clock interrupt, very little additional system overhead is required. + + However, some operating systems, most notably Linux 2.0 (and +earlier), do not provide a `profil()' system call. On such a system, +arrangements are made for the kernel to periodically deliver a signal +to the process (typically via `setitimer()'), which then performs the +same operation of examining the program counter and incrementing a slot +in the memory array. Since this method requires a signal to be +delivered to user space every time a sample is taken, it uses +considerably more overhead than kernel-based profiling. Also, due to +the added delay required to deliver the signal, this method is less +accurate as well. + + A special startup routine allocates memory for the histogram and +either calls `profil()' or sets up a clock signal handler. This +routine (`monstartup') can be invoked in several ways. On Linux +systems, a special profiling startup file `gcrt0.o', which invokes +`monstartup' before `main', is used instead of the default `crt0.o'. +Use of this special startup file is one of the effects of using `gcc +... -pg' to link. On SPARC systems, no special startup files are used. +Rather, the `mcount' routine, when it is invoked for the first time +(typically when `main' is called), calls `monstartup'. + + If the compiler's `-a' option was used, basic-block counting is also +enabled. Each object file is then compiled with a static array of +counts, initially zero. In the executable code, every time a new +basic-block begins (i.e., when an `if' statement appears), an extra +instruction is inserted to increment the corresponding count in the +array. At compile time, a paired array was constructed that recorded +the starting address of each basic-block. Taken together, the two +arrays record the starting address of every basic-block, along with the +number of times it was executed. + + The profiling library also includes a function (`mcleanup') which is +typically registered using `atexit()' to be called as the program +exits, and is responsible for writing the file `gmon.out'. Profiling +is turned off, various headers are output, and the histogram is +written, followed by the call-graph arcs and the basic-block counts. + + The output from `gprof' gives no indication of parts of your program +that are limited by I/O or swapping bandwidth. This is because samples +of the program counter are taken at fixed intervals of the program's +run time. Therefore, the time measurements in `gprof' output say +nothing about time that your program was not running. For example, a +part of the program that creates so much data that it cannot all fit in +physical memory at once may run very slowly due to thrashing, but +`gprof' will say it uses little time. On the other hand, sampling by +run time has the advantage that the amount of load due to other users +won't directly affect the output you get. + + +File: gprof.info, Node: File Format, Next: Internals, Prev: Implementation, Up: Details + +9.2 Profiling Data File Format +============================== + +The old BSD-derived file format used for profile data does not contain a +magic cookie that allows to check whether a data file really is a +`gprof' file. Furthermore, it does not provide a version number, thus +rendering changes to the file format almost impossible. GNU `gprof' +uses a new file format that provides these features. For backward +compatibility, GNU `gprof' continues to support the old BSD-derived +format, but not all features are supported with it. For example, +basic-block execution counts cannot be accommodated by the old file +format. + + The new file format is defined in header file `gmon_out.h'. It +consists of a header containing the magic cookie and a version number, +as well as some spare bytes available for future extensions. All data +in a profile data file is in the native format of the target for which +the profile was collected. GNU `gprof' adapts automatically to the +byte-order in use. + + In the new file format, the header is followed by a sequence of +records. Currently, there are three different record types: histogram +records, call-graph arc records, and basic-block execution count +records. Each file can contain any number of each record type. When +reading a file, GNU `gprof' will ensure records of the same type are +compatible with each other and compute the union of all records. For +example, for basic-block execution counts, the union is simply the sum +of all execution counts for each basic-block. + +9.2.1 Histogram Records +----------------------- + +Histogram records consist of a header that is followed by an array of +bins. The header contains the text-segment range that the histogram +spans, the size of the histogram in bytes (unlike in the old BSD +format, this does not include the size of the header), the rate of the +profiling clock, and the physical dimension that the bin counts +represent after being scaled by the profiling clock rate. The physical +dimension is specified in two parts: a long name of up to 15 characters +and a single character abbreviation. For example, a histogram +representing real-time would specify the long name as "seconds" and the +abbreviation as "s". This feature is useful for architectures that +support performance monitor hardware (which, fortunately, is becoming +increasingly common). For example, under DEC OSF/1, the "uprofile" +command can be used to produce a histogram of, say, instruction cache +misses. In this case, the dimension in the histogram header could be +set to "i-cache misses" and the abbreviation could be set to "1" +(because it is simply a count, not a physical dimension). Also, the +profiling rate would have to be set to 1 in this case. + + Histogram bins are 16-bit numbers and each bin represent an equal +amount of text-space. For example, if the text-segment is one thousand +bytes long and if there are ten bins in the histogram, each bin +represents one hundred bytes. + +9.2.2 Call-Graph Records +------------------------ + +Call-graph records have a format that is identical to the one used in +the BSD-derived file format. It consists of an arc in the call graph +and a count indicating the number of times the arc was traversed during +program execution. Arcs are specified by a pair of addresses: the +first must be within caller's function and the second must be within +the callee's function. When performing profiling at the function +level, these addresses can point anywhere within the respective +function. However, when profiling at the line-level, it is better if +the addresses are as close to the call-site/entry-point as possible. +This will ensure that the line-level call-graph is able to identify +exactly which line of source code performed calls to a function. + +9.2.3 Basic-Block Execution Count Records +----------------------------------------- + +Basic-block execution count records consist of a header followed by a +sequence of address/count pairs. The header simply specifies the +length of the sequence. In an address/count pair, the address +identifies a basic-block and the count specifies the number of times +that basic-block was executed. Any address within the basic-address can +be used. + + +File: gprof.info, Node: Internals, Next: Debugging, Prev: File Format, Up: Details + +9.3 `gprof''s Internal Operation +================================ + +Like most programs, `gprof' begins by processing its options. During +this stage, it may building its symspec list (`sym_ids.c:sym_id_add'), +if options are specified which use symspecs. `gprof' maintains a +single linked list of symspecs, which will eventually get turned into +12 symbol tables, organized into six include/exclude pairs--one pair +each for the flat profile (INCL_FLAT/EXCL_FLAT), the call graph arcs +(INCL_ARCS/EXCL_ARCS), printing in the call graph +(INCL_GRAPH/EXCL_GRAPH), timing propagation in the call graph +(INCL_TIME/EXCL_TIME), the annotated source listing +(INCL_ANNO/EXCL_ANNO), and the execution count listing +(INCL_EXEC/EXCL_EXEC). + + After option processing, `gprof' finishes building the symspec list +by adding all the symspecs in `default_excluded_list' to the exclude +lists EXCL_TIME and EXCL_GRAPH, and if line-by-line profiling is +specified, EXCL_FLAT as well. These default excludes are not added to +EXCL_ANNO, EXCL_ARCS, and EXCL_EXEC. + + Next, the BFD library is called to open the object file, verify that +it is an object file, and read its symbol table (`core.c:core_init'), +using `bfd_canonicalize_symtab' after mallocing an appropriately sized +array of symbols. At this point, function mappings are read (if the +`--file-ordering' option has been specified), and the core text space +is read into memory (if the `-c' option was given). + + `gprof''s own symbol table, an array of Sym structures, is now built. +This is done in one of two ways, by one of two routines, depending on +whether line-by-line profiling (`-l' option) has been enabled. For +normal profiling, the BFD canonical symbol table is scanned. For +line-by-line profiling, every text space address is examined, and a new +symbol table entry gets created every time the line number changes. In +either case, two passes are made through the symbol table--one to count +the size of the symbol table required, and the other to actually read +the symbols. In between the two passes, a single array of type `Sym' +is created of the appropriate length. Finally, +`symtab.c:symtab_finalize' is called to sort the symbol table and +remove duplicate entries (entries with the same memory address). + + The symbol table must be a contiguous array for two reasons. First, +the `qsort' library function (which sorts an array) will be used to +sort the symbol table. Also, the symbol lookup routine +(`symtab.c:sym_lookup'), which finds symbols based on memory address, +uses a binary search algorithm which requires the symbol table to be a +sorted array. Function symbols are indicated with an `is_func' flag. +Line number symbols have no special flags set. Additionally, a symbol +can have an `is_static' flag to indicate that it is a local symbol. + + With the symbol table read, the symspecs can now be translated into +Syms (`sym_ids.c:sym_id_parse'). Remember that a single symspec can +match multiple symbols. An array of symbol tables (`syms') is created, +each entry of which is a symbol table of Syms to be included or +excluded from a particular listing. The master symbol table and the +symspecs are examined by nested loops, and every symbol that matches a +symspec is inserted into the appropriate syms table. This is done +twice, once to count the size of each required symbol table, and again +to build the tables, which have been malloced between passes. From now +on, to determine whether a symbol is on an include or exclude symspec +list, `gprof' simply uses its standard symbol lookup routine on the +appropriate table in the `syms' array. + + Now the profile data file(s) themselves are read +(`gmon_io.c:gmon_out_read'), first by checking for a new-style +`gmon.out' header, then assuming this is an old-style BSD `gmon.out' if +the magic number test failed. + + New-style histogram records are read by `hist.c:hist_read_rec'. For +the first histogram record, allocate a memory array to hold all the +bins, and read them in. When multiple profile data files (or files +with multiple histogram records) are read, the memory ranges of each +pair of histogram records must be either equal, or non-overlapping. +For each pair of histogram records, the resolution (memory region size +divided by the number of bins) must be the same. The time unit must be +the same for all histogram records. If the above containts are met, all +histograms for the same memory range are merged. + + As each call graph record is read (`call_graph.c:cg_read_rec'), the +parent and child addresses are matched to symbol table entries, and a +call graph arc is created by `cg_arcs.c:arc_add', unless the arc fails +a symspec check against INCL_ARCS/EXCL_ARCS. As each arc is added, a +linked list is maintained of the parent's child arcs, and of the child's +parent arcs. Both the child's call count and the arc's call count are +incremented by the record's call count. + + Basic-block records are read (`basic_blocks.c:bb_read_rec'), but +only if line-by-line profiling has been selected. Each basic-block +address is matched to a corresponding line symbol in the symbol table, +and an entry made in the symbol's bb_addr and bb_calls arrays. Again, +if multiple basic-block records are present for the same address, the +call counts are cumulative. + + A gmon.sum file is dumped, if requested (`gmon_io.c:gmon_out_write'). + + If histograms were present in the data files, assign them to symbols +(`hist.c:hist_assign_samples') by iterating over all the sample bins +and assigning them to symbols. Since the symbol table is sorted in +order of ascending memory addresses, we can simple follow along in the +symbol table as we make our pass over the sample bins. This step +includes a symspec check against INCL_FLAT/EXCL_FLAT. Depending on the +histogram scale factor, a sample bin may span multiple symbols, in +which case a fraction of the sample count is allocated to each symbol, +proportional to the degree of overlap. This effect is rare for normal +profiling, but overlaps are more common during line-by-line profiling, +and can cause each of two adjacent lines to be credited with half a +hit, for example. + + If call graph data is present, `cg_arcs.c:cg_assemble' is called. +First, if `-c' was specified, a machine-dependent routine (`find_call') +scans through each symbol's machine code, looking for subroutine call +instructions, and adding them to the call graph with a zero call count. +A topological sort is performed by depth-first numbering all the +symbols (`cg_dfn.c:cg_dfn'), so that children are always numbered less +than their parents, then making a array of pointers into the symbol +table and sorting it into numerical order, which is reverse topological +order (children appear before parents). Cycles are also detected at +this point, all members of which are assigned the same topological +number. Two passes are now made through this sorted array of symbol +pointers. The first pass, from end to beginning (parents to children), +computes the fraction of child time to propagate to each parent and a +print flag. The print flag reflects symspec handling of +INCL_GRAPH/EXCL_GRAPH, with a parent's include or exclude (print or no +print) property being propagated to its children, unless they +themselves explicitly appear in INCL_GRAPH or EXCL_GRAPH. A second +pass, from beginning to end (children to parents) actually propagates +the timings along the call graph, subject to a check against +INCL_TIME/EXCL_TIME. With the print flag, fractions, and timings now +stored in the symbol structures, the topological sort array is now +discarded, and a new array of pointers is assembled, this time sorted +by propagated time. + + Finally, print the various outputs the user requested, which is now +fairly straightforward. The call graph (`cg_print.c:cg_print') and +flat profile (`hist.c:hist_print') are regurgitations of values already +computed. The annotated source listing +(`basic_blocks.c:print_annotated_source') uses basic-block information, +if present, to label each line of code with call counts, otherwise only +the function call counts are presented. + + The function ordering code is marginally well documented in the +source code itself (`cg_print.c'). Basically, the functions with the +most use and the most parents are placed first, followed by other +functions with the most use, followed by lower use functions, followed +by unused functions at the end. + + +File: gprof.info, Node: Debugging, Prev: Internals, Up: Details + +9.4 Debugging `gprof' +===================== + +If `gprof' was compiled with debugging enabled, the `-d' option +triggers debugging output (to stdout) which can be helpful in +understanding its operation. The debugging number specified is +interpreted as a sum of the following options: + +2 - Topological sort + Monitor depth-first numbering of symbols during call graph analysis + +4 - Cycles + Shows symbols as they are identified as cycle heads + +16 - Tallying + As the call graph arcs are read, show each arc and how the total + calls to each function are tallied + +32 - Call graph arc sorting + Details sorting individual parents/children within each call graph + entry + +64 - Reading histogram and call graph records + Shows address ranges of histograms as they are read, and each call + graph arc + +128 - Symbol table + Reading, classifying, and sorting the symbol table from the object + file. For line-by-line profiling (`-l' option), also shows line + numbers being assigned to memory addresses. + +256 - Static call graph + Trace operation of `-c' option + +512 - Symbol table and arc table lookups + Detail operation of lookup routines + +1024 - Call graph propagation + Shows how function times are propagated along the call graph + +2048 - Basic-blocks + Shows basic-block records as they are read from profile data (only + meaningful with `-l' option) + +4096 - Symspecs + Shows symspec-to-symbol pattern matching operation + +8192 - Annotate source + Tracks operation of `-A' option + + +File: gprof.info, Node: GNU Free Documentation License, Prev: Details, Up: Top + +Appendix A GNU Free Documentation License +***************************************** + + Version 1.3, 3 November 2008 + + Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc. + `http://fsf.org/' + + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + 0. 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Symspecs26965 +Node: Output28791 +Node: Flat Profile29831 +Node: Call Graph34784 +Node: Primary38016 +Node: Callers40604 +Node: Subroutines42721 +Node: Cycles44562 +Node: Line-by-line51339 +Node: Annotated Source55412 +Node: Inaccuracy58411 +Node: Sampling Error58669 +Node: Assumptions61573 +Node: How do I?63043 +Node: Incompatibilities64597 +Node: Details66091 +Node: Implementation66484 +Node: File Format72381 +Node: Internals76671 +Node: Debugging85166 +Node: GNU Free Documentation License86767 + +End Tag Table diff --git a/gprof/po/.cvsignore b/gprof/po/.cvsignore deleted file mode 100644 index becd153..0000000 --- a/gprof/po/.cvsignore +++ /dev/null @@ -1 +0,0 @@ -*.gmo diff --git a/gprof/po/bg.gmo b/gprof/po/bg.gmo new file mode 100644 index 0000000000000000000000000000000000000000..668ad6b296bc750add5797a43f1fb809bfdff6c6 GIT binary patch literal 12677 zcmd6sZHyh|b;pN5N_;~SASpDIqz?{T+u&Jy&6~aU8iVl?Ck7j^Ny65J*?VVqFTOkX za_3&`jZ(=kyad!1l9Z4HwMk0KhgMY=Ft+dColZx0he^T)+`=Ud?&!g+Xu(T>EqUacq2F z5PS&S1g-&hf*%7@@Z;c@z$?Ic@JjH{z@G=dmzVzlyo~!xRs_K+@Z;cWa2!VM}cr*9{crExAI0XJ@jvu2l$+;b* ztKb3fdawds13n9?{c-S@z<&lM=ZZ^$;8WlRa4q<2;HBX2gP#Cj1Fr(V2WtNR1*+ZU zAMpCx41R|D7~Bn>2G@Zf_+Sv+0*-;|rwwX;UkBHKCqc>o_n_u?F-8c%ZJ_j+fWHiW z65b{Rw4)6wW4pe`C2(AU+2Gvf+`9@V(%#gHS8@GAQ|805MtcQvUonsCh4f7lHo*UJU+Q ze*Ys-{rxzd62*?G%Hy**=aGxyJdw}Tx} zcKQh97*;({dOiSd0-pq>?>9l|;X)p60B-`vz!^~WU*b=C|89Q&HmH986;!`h;w+=! zICv{~1XTMs!HwWgz%AfL$R&QXLACz_kSPUkgP#Mx530W%C?Nq`pyc@nP;y>@k*eTl zLDl~*sD7??L2y5K2dMThfa2eugVNIv!MnhnkmPyrdGI&Db&&5@z|)}WU4;{<-vi(} z@K3-y!5@J4fMYoIBj7XO9pD9!S@Mm8+rT++D|iZQfj5(2A@C9K z0QeTD`EA9RH-m@4XTg)8?EOic@iMRl;#$EIAgT(!3PPRW1gL)h0+hdPgskH2EGWA@ z0ZK2=gR;Y)f^G0ZIzMnBa)Y1d{vWBtRD%&Fulel*Zvnpns@+@p{fE|jp5F<|&+Y?1 z2u2_-6*Rz)fXBc~z^{S#g1-lf&p!k&1%Cp*AG{Ru39klA;A&7jx&eG2nCAEe@B;4l zaf)v`9`F$C2QTK-IMRs@aR7?i!8GkaMFR&@x0ob<+0MC*6Iz+vvdNvCI(B*p_JR|f z(yweKdrL>s`wGs7I5%_d=9JEKNcX7DxUczK#%c2fH*pq+VucQ9V*an|t2ku~>FdLs zIzG+$NzMm3-@_@+Mw}nz6d!en*Tr#vesNKb&@K2?PSk0~XZV+Y=-A`I?0PNND>=o9 z9eMd$P&Sesb;#ahocC~kmUEo5IB;9zD|E9spz>Xuj`Kdw;(!Krh(mYh*HGU$KuET= z?@Cadx`tDS_#doTv0{5vtGVfB)R-xixOX~wWo~tRs8NfOs8y{eZmM3Z)eoj?RCB1} zCZn`k4kv5%@&Q+_x09A@#^rjma{i~Oe_UqV(8e8Tbxv_!eWseW>QtW{sC{-Rl}n}4 zR4r<`MzcOut;M4%*;{WoL!LN`%8Tfw+5J{ z>4t_kObrc5TwNguLoW3o#X?ENo+fqIs?NqPDwo@{NY;ugYE%@Xz(zEkmk!-Ld^6(R zG<*~Pw+!FH|H#Pj$Vm6j%B0UNX``OBq9m@j)2*doiH5#;-~Uq0Hfa{l-G*AC>3;RQ z23CN=MP^C^~H?qJG7-A`D(}t8F}Z-)uKf;jL@vEU%l?TN=i5$A-pKvr(&8qn+Si zahY~*$L?_#O|_U^Gma|NgwES$&vs5Vm{)Y%*DOXFCN3fT^RSEwTP|%k8ug|+#&M%& z8J00ly9uH4j&>)tIUdGp9)?rxq%3}iIB?w5@DV*zPRG5n*=Wv9#x6zX>QptZKzGR$ zRVvLmOiVq<>k}BSyyFysv z3ue^B2se<@Jv5ZA%A0o|)f=%|A$@cWLW-_3U%`U9C>U2_X8at4_Qk|NLn_^Ik zsXaB$i7YnH3jUI$5-pmXY{rjPeOxThM9DOoo{U=uV?;Qoamkp|tk1etL*-R=*Q)#L zv-)i(iU#kdKh&V!t-nGgmAX`XAgLd8Gn_oD#Kg3N)z*x656?sB>s4qJUWG<63-g!0 zqDCW*nre!@F~sz2JsGaITM8;&3R^o_!i+Abn2n~ZWx`qgKsD#%U>%}MIyXC6ujM2h zeA-TWv{gWqrUztf)oDKiuXDj7ldF&Y-aVsy5ImfvAP=r-tYA_**E(i`-ux6khzqmT zG!=RJR-{VQioC*>t=%=fuUAdV_1Ok2QQXPZ-%ML)OReZ%L*p8++e5z6<%;s_nJP3z z|999iYmSrAnsvBm>jX=jR+!YHr8!$8D(9w3>$CA>y)vh{+kzffMqRBHO%B)MWQ zP0|*@$-+`C=T1uGn_D|TtA`})Dk)J+nv46QkylGQv1kan8c{QiVU3@=v7zh0eL-Z2 z;8j|^(vpWP^e7c2eh zHUft=$D$jCT1tGtA3{~Dam4k9hH8h_u#&e2a)#@!yUvY^SyU+n-KBkNu!XQ!C2x|~ zS8Ejt+KJ6%YjAs%`tW`GeRsHN>2xhZH0GMs>6w-r*|hNncW*pR-15d`>D!l7&23r) z_9>-tRi>F#BO;;=Zmznz=UHp$kHs1#BGmX`+H~jL`~0AYTnct3mG}_Mam6~}l4v$2 zU${5cGUEufseDp(_d;RiUzVA+x8TF|aN{)v~u=<~CwTLFudad1xS&xVh)PlCH zIfUMqviNJ=bra!4G+Dj_741s*K6>!b+~@c2SK)2j;~i7upGxlD-PrTUefK=De?oHE zvz-L?X1c$$Vj`?ekj`1*0i>zVu4~oRdKRK5p)p;z1QpRTgzVF;8EY6$B=vBAl)z(U zLSb5OlWRs? zm920SV>JR>ZNHbdFi&^Mwu)kWuf#<2q^mdQLc-I`n5jy=SE?xq|6JHk;CZE+7I;1S zY{0utPdw|rnoOBa!*B5FMuHmdx7fPpL2owus^LkO75%W1L<0y`{ge^K})Z8{@(?A zn)Qc?yW!4Cc)!mzM)QETVR*y(;Z5sHKDLE-rPI|)csmg;+*?PF?dgzphqu96x@|gX z57(R1r9Hd%hTBQpErq@V`i{B{>qpjyBO~GZo7~9A=nXes&;5EThWC;y4~; z8#avIc+2(cH&Aa^l(xdX1j3Z?QE!gAd+TkIPq!y-HS3SMEwF+|+nQF|u)<;a;8t2D z({0ghZye2zy4%~eY2G?X1h!PF<<_>TGzurDCG^(PT|4jE(VP6p@cPnr)&o=y$R)7iYs7PFJtasE&7KTpwO=b6sYY@X%j zomO?LvoqPtG&@4`1$B`v(8U=?!D|$pP|w9i2BXbqZ!pRcr%RW;%>79^I39BO8W*Sh zrbVw}HorQ|7T3Jv`gz4y-qAE|cV)S;{zqLfZP$5RGn5iC>mz#|jV?3PvensML3fMj z=M|KC#`=?;=53=T`*P=S=jqPldN0ntWokx=*+Q}D;>*mNoy)$2GR|bLV%1{nCHoz0 z_7wW}Px{#KM(1e^k(-h^EI6vjjMhIrF!YhmGm^w*Z&-7TC~GhDbtmI?w`sE9W)`QY zI!}M6poX`-xHmAGCywpmNO_$ni;0iA?D$fHYDgQ2H&&z4tF)VE&!+Q)IIWqOg3fe~ z_V#lIp0TOpd+@tD40^PGUuWrOnk&5@Lp&^`tsDkl$WEFTJ4dn1F-YzmDwh!XrN!5? zg}&<2i0J_9$i8-e8r?46bctP_<+g{A@(ql3S}H+O9P{1m5-r_2-v`RRZL>Kc`}i1= z+wpAKeKlSRiiY2${qkb)Y$fwvaj{kT11tL1I&aX z-8OQ!qE(-B42UWbFkUdEjVF_!KMpPgTI+R6LL=`Y)S$_Nk$xTyOc^G=n$>fN`{*lOP4 z)^x*f?xeJ10>%VJRP1NdOOhKFek^^w+u?i@Hp6T_J`RX@C$bYnsKePGGnV-g(>ZLR zk)VR)M?1%OiX8ciVfJmLdtHQ5w6WC*rPBOF=h%|lW)R@)T{E?(1v5NB&t4WSIoxqB zv+3uss zmAy`GbXXJfBfmpwknw*fO}<;1OEYM4W-o4$FKF5EbC-Hf_4|#oIyuVAiW0I;9*`ll zMcQtN>TVnsHRMxb*;+r$D_GS0IGd-$D2f1seaI%#OtIaUGbA6kq># z&CgyjHZd=0TSke zz14mdS(w4mEJ_lc6waUS96?9cui^zJcv^w0t9-Ael~Pka6OEOJ3@tRKpq~76rU<0G z2v=2DRvxy9Y?9p4IL)$1%5uufUzW^bjnRdT`h?2UpKiu%6Yvx}_ubMTeL8%q2;1VEbh41Y2Ur*! z+=xc0S|{yoMqf?yZe(Dy1*^Ncx5eAFT}miO6xQekidEW>QCJ|G*Vtzisx>36wo&159$si}Ld>OW;0-)1%NM%a0# z6lg;~`;NG-w>jI?KkF54i)rr&jFT$l-_k1!F9`wL{F3}^g>4P=QtEw(Ie9OVp8LK4 zFywJ{M3Sf_MDf$i!@}@xzX=rbLxrPeN))EmS3UdXK}nrry#+Fyinsjiw~%_N*Z=G* z2>)W=Hv?XclwZo%6<8#yF~ANqI8qm)Tk2 ze4+D2$|;d@#HH+asdG{#(njA7N51rE*(7B!ap2_<^!J!@ea)6n66bB6FThZdR|SSS zZH8VX0nJ|YW|c$=eDCs8g;z)Zu|hMnes~A*jL#Nr=ejasZ%Nv>I+K6H5S7+RIog7r zRTNsxPP12KQ-4*3Ek`fPl9b0jkbM(ph|LRM}fJHTXwuFCnpFD8$ z=dy3GA@{B9+3Y1;`H$Ys_m8g5wh?2V&Ay(!AhWRoSiB77j9z@WD&kY#x1R{#37KJ0 z{hV(kibv*+mSx}zgaC^bhJ+2jsF+veQPffsNFt;qSB;sfg7PWb{~qx-)N z6(4#0N1OiE51zFm5zV@(@o?XDcAUH3;ziC7DC%loP>VJ*!83hPv9(TtLZmwBE&u~J zeDdjSJ+d9Fcnl+s4BIk+R<%shgWoCclgkRYC;xCJFc$$#QeZEvu^1HHb&d`XT=&Kd ndY2kai-g|oWm@HxdM8^XA=KN5e?*sB$BNC>z~m)k?OpsgK<7^A literal 0 HcmV?d00001 diff --git a/gprof/po/da.gmo b/gprof/po/da.gmo new file mode 100644 index 0000000000000000000000000000000000000000..b432d9953da85235b0c1615381e8f0d53d576626 GIT binary patch literal 10329 zcmd6se~ca1RmZ1kOX3Gj+7KxHVYqR-wHY~Nph`tTLO>NGBv3&FWDr7p zzW2`iFAN)IT0lb$0X6?qb^B>>?M>_z)c!sLQR4sSLGkZzK*{gFK<)G0?_y3c z1oeHQ{=N!|f7e0D;U_@p*{h)B@#i2@1h0eI@7qu=eg+3YR4lj*s{I-$I&aqBzXC#9 z@H?RN;47f^{okPG*$e-*HQ52K<)pJLGAB#Q0s&!tHyOf(f0|E zrr=AU=>A*qgW!LH;@f$Mk-mHclpHod>Deow@L=it8r%2vU zP{cp&J)%5GxkNck(IXw&N6{I%kMa(RA^`-S?qc&!I91lK4!1A0D0k^bnBe&~_jyq~gz@;=HLiXNTE z21Rnw^C0C2Md#{8%F~qb!?ALHTsm{Gu9V&x%1Zq$Sge2F4_>T)BkJHOiq82titNlo zl!qyLILa`5+qRQYnwoAA4b~eCzKxz~o!Mn?4$>%#swB@$Cr{J-M!8!(7h=?R=P3rm*e2i2wK2(l@tRH+1XHjoMUQcVAD+DyMsYuJ@g_bZ#^noiwVS=G<_E1dF z5~ri~x+$anAhmwurHM+j&@~HXQ_bVP=E|_&kBSj%1`UYMhG|qJ)o9t+nHkoTidi;n z!4xT69aVN$xjQh2+oLuMKsb{}=Ei!S+M{N5Azo|DG#(8QOJNq8`#TE@B3Hj4geA9X zD3MSWyVfi>RnoU6YPW}dD64F&LE~x|IEcD+?ZV^D$06@P^8oKBnosavT52vWO}<>6 z_<6V-{qULhR>KZy7seciEm3!t{bqnvBogMXJ6*Cx+oFAJzFN0N zVz1@Jj_3tbjqyT>TC{0&X_AcIN$I*zdPytF*}?6F_CD!kuuv|;)n#}(%%u9UsUid( zn_X@_^u8DlVBu4{nXK-c<&~E4y5p8cRQ;%$_84ZIFWY9EIeqbri8>X#D{K@e8Iup4 zJcqTap?TwpXNFm*VdEmgw})*+SebG-803W}=HNy}8!cm}{V z+S2ck18fT|A2BoaOgydYMO#!x-}Mt zzH>Xuc2*|NP1v5T=p?Mytn5u_hf>)acsC{%`+^v?G0Y80X6OM z_yp9$Z$w4Lm}PGnGVNg7iz%-nvC1}CD@8}SoYPMNMayBAUh zqax|9S7zzZ!AH$y+r@f$k>UWaW{EpI73RI8U@l>^SrTCv-Qw=R?wX#j-OPu}hLsR? zW!N>BV8Q4 zd5m<%F9Kbm0%jMwh{~{4B(~#zIX}00B*na?Yo6Y*cqWe9b(G#uYaD4_>GEO}Vx-oO zI96%)I4KGHN8vC-+v7=a;Q8od0)K#}!>K{`J&~zMo|PKR$b4l%D5Y2;O8ug>*1N_VNz9&o zM;{P`83E9kdG)HbK|yF&R$e@R+UXDd!g0Nu3PWlO774v`^TdpKbL`An#=-9d@91~L zpjsE)2Aj<$LH%mGdyT6{I$Be}=HmsF-km2?6_IGi6v(tlGdN?b3YxBoA!{6uW#f#G z2Dl&d?XGIsw8~;`SY3TRO7Bull6H2PasRS_w29fe=FL_k5G^)#PzJ7&z$&OO7?`CX zwk5%O%+W3bh_^TW+i-btw-G}1(x$}zl7gRdk6Vu~?X+u)adH7FvzXjMuPkg=u9 zRjs}8g3|$WRpWk>Kx^7>u1fuUHX*LF2`-uNmpX<-V622~yKak_jKX!FQaFw`P1){T zMuCu8)qaremA1!3?8`0l48Mt2lHQ=Wy$C}4Whdx6b7&POauEsP;7$Kfp()K zN5-PpQ%-?fl`<NTD2r&&rhYaaccV$E1u14A%dOJk#?Af8UQeTL zm2^%2R?%~MwhJM88d|pO;nBLbn$0sLh?#YVap!gcDf4$U%{<)TNE3!LNlA!htjjZ` zx18FLbx^9ozb86~@{j4dW3*JwHdXwd&Hd*2=y2#%9M1(WQ zo+_EVTJ2{C>7XJO$!LyjG*ome*sHs{v#y)5%Z6Yx5T-ZR9hptZ&t08ngg@Q6+k?C3 zGHl}9Hm4_CaGAjaZp8GQxHnHjlJ)B3giTQ!#DCj)wpmKeI5k1c=7{oHcu$p|rVeD~ z%S!HXST3m&%Y7&FFB@l&IIu(+F}FnJvg;fL(MPYWT)kf@%jI93bA%YW;@zq{G8A}G zj)60Qa(sRu=K}31tV>gPy`jqvQNCmIA;q4=S)Ht$7>X)S(Z)JaQF<+!ocXc!q53ZN z)nzMYxi;*v3Tex&u>sg3Z_{Me&9Lv9!)rpe$Ixnc$#~mmDi6k&@Zf zDu&qD)W|%1`_#pBK6fhc>Eq-DbokuGBwna*0lmtSG$}GAFWlyQ?t&0N_V|01y~rGk z%v}0HHk|*CaE5#WV6{S4Lnmh z$_DBT-`I%@zHZ_0Fv5ySURN{9HIhVuR-QwSWQ zp=64ARE>zYw+0+{o7K> zkPTxrL|=N`O#Y{{TqHv_vH&M>D1Zv z_rJHgr{}S@6Tv51bNk;__jT?$|9kGaXa4T)+kPqF)1ur<*>`IYyb2z97himyxFZPe z0?&baz!$&|fvXZt9|XTuzklbhAou~E?*(^*O>i1~4pjf20@eQ4 z!2{qQfRf`Mz&pWP8bRL_2>cmPEjo`cY?nU zB69FW5S0dB0_ht3H7GrP9Xt>IGpK&EcVjE?B~bmALD_E=N zM!Frm9n|w(pvHS&{ro{tyfmQ3f4r`r1Cw{KR#5BzB0|Xye*qfsUqI>ey&v#=I0%Zz zPlJ*_t>1qFd@s+R0UrQg2gS3mfd;%2GD#2nz@y-KP`vnA5Q+t#1^Em9kS_!N6-d|M zJD}#f6JyHm)8K>PQjI?kiZAP+=KUv7|-N(Sw;BSJG=bNB-bqB&c z4ITuW;7@~+?+bh#0RN_beiusA`;UVA!IR)Dn1ffq&w-4cUhDHzX?L!U>7728c_WXfwJReP`v*bcsuwBP<;L*sQvlN zb^WJ6$^RNCeSaRj4g7mh?fy$(h5A`=p#Ck6i^uvvf#7ipE;@LMf(s1Z zN4bxpkM?=6YuBz*QIeQm9u51A2G2&Hjdy0+UK=J+8kKRDnr@aP*-EiTEvGuB6%}zi zY$aKH*|f7NElqCQS>Ac`+QL`2nKyLvZtAt|b=|xl7iC8C!KT(*-_p3zXmpdPG{ZdW z#)+NPn}uv>koSC?+G4iRaBI|q`(aK=be7bZI-FFzTFA;MF=;hu+1zAZlc=S=X4{pN zpeg2}cHb1yV3=6H@WMoend+ITqN(apTQgq`22sAsoIwNO(<+JbxLlnzc4CBnTr$d4 zn=?d$R#!_qUF-?Wk@jkv2@ssYBeT-a5_`-nPIZbFw|n+Fl^k>(?OA8H=rduFCNGc$g2 z@1)No#V||DD79Ht9BTwSboAXPzIW<&SgSDR1Zs(Tlj=7^tRj;zcHQW*&D$3CvG}rY zjm%!#ixtrdr5fXn61AvP@500>t>eNqAGZ=KipkFHsrG(xGMFl6(dsNZtx{3HW6B7F zcg(b#58mh15EVYYhr#N$X;x|)&mA{4rW!=$MvE$Cf7v$u%-p3jChC@~F1Jx9P8qy% z_N;2E!MxGH6WuJ*uy6_C>%%rCEKN}jhgq(H*|<^OhGooCUX7B<%`sK^ z#_cHGU7Aj2!uI5gZp?hm(q2P$B$dBGcOzl(FPKpa!`(nib7iXFTA|4|s||_Dfnww5Zj}?bX=(#dbeR zduY04%N2_V+d4NSXE)CVX7^Nkw|gox|9i{0RVr`r-HeACG`bsaq>@f16)&gRis@6R z>sWl+N?i8+_V7G}zFvin!n@HZW?}u(S2P^jC|6hPjUjr2ENy00DW@`~uD~BjeZ<4Xh=--FewP2BxYl8iLdq(vn z>~M~P+PM~1&Lr7x9cO}#^~rtU7Y1=rh&&S~QYR`Sudti89-H2`i_>;C7{U_yom%~Q zQEru5-akR(nr}QpebUv6^5>ZvYZD-abWz=dWHa&{3i_@aSIXSnK)Z8iXe5?C5(dvqX-7O`GNvn3k8+o-< zsq==AYZ&E)g*ATdjt%1tJmExkaE_h*2-HHN(U78h3eg8_MqGT)6y+*f7d9x?!lJ#5?>cR5i^;JaBC)xweOsyxJ5q zOzEf%_U_$l&WK+$Yy{&2{#bAX=NA(_Y468LhZj}q)^jX485Q1%pPWB!deZDZL>aE; zaj##RnZu7hWS+4-yq7mA2jH`5>^4t{d+#cki&<liMkS-2FXuvzg?SY#Cu$KuiPB))-I;>RgQb(+>!Dku&8Cf?rD#lhSA zh%Z+mam35ss2%? zDvjQW3&Q@@uu5TjXB-@OJ^GlyZ=enF+~{%Ibvh0EHW|7}C9(T4R`Su*3yDq(^clBZ z^^lkY1tEodEG(V@WxKiRX?^Q(!y)^Y*i<4JOUFAyLVa>jw z4+z4P0BEGVde+*ZV6^##7tYT){?INQy>~<5NNvs}p+DTbFeBX@KXZ}o>X0u69zu4}*%+(`VT~fg2;{{0X_LC{|NV4M!g!m?$xYm75S!a_3Kxnlh5-r)q=c>xTO+Y8j*eHjxtH|qw% zdLgF|cfzDN-b<@ymiHQ$FD-3f_jtmcx@dZ5#%}J}W@^i0jSJ^4 z%x&mmrg@-oisJ!IhYPDiR-_PpKi(luA5)|XC(EPHE}RJ;-Ds!D2&uz4!XI5_X3e9m zm}?LDh7(mcue#3RacYsN7;xIRpEM}&tk1&IIb|=s3>@Ld5Na3%(JYRumRm)lq|Ic_3e^@G=N92rxkK{dEwUEhL&ic~>O{n8!h(L$?sJDL z6J)UPZLECmg(%b;ZleqASVPBXH#c$w@uZ#A%q1^I!?f^twdv*DIhM&S zvTS$9xq0ol=lbj2ZaS9y^hSPUn*ukIBoL#{SFti_m~+{7Ji9MM>%W1za$xJ_;(L)-pSNO|E@yg*#@SrEcyP7tVu{Z?NmvStpZ=1ybP~e>~NG<2Co_=uzuTtV>*e1maBCn_Q5YtY?zjn*=i;EJ>ya-92vDu;=wq55>9Rq z-}s8ppNKiV^&1H%I^!yjBK;Jkr#EsbTRM2JIPdZ)^%Z_gi|t#(nmWuGCsurywaP44 z`I@N)#;sZz4tGSxhN^;hUMGIGv6t9qI$Yfbwx8p6x7afEwq!`1H>FeQC~;B`tqtQ> zvF-Tv)7_-~#7w?joG#ai7MpOND~)^sTX|y{zTIZFjU-&ZL9SnW&Boe&{9B{%oBP9? z2&PWDyuC>-6RfQ%4S_8F)FWiqsaZG%Ef7HEQRO0dk^2>;EIQ74Xl6s4?+^0L$roZO zF2^JfoIe?*U*>)K#Tn7F(p+&_g5Bhsa-~ceaXStC@@n^S!KYtpn@o)y4gdB@Rtp@! z*k$bOhn&Ud7IH`%QQ}Qcc)P5#_tqNM($=JvZ-%D z%d+oNIA@o=saN6hH%^5FNE}LUmBc|(N%$ryoQWO2DTl+c#xb3gK8NF6hi5M@cFN*7 zA9{u~lP)WTE>w!NF4#mnK-xNkA`yk#gLHpdv4)Fg*$aaK$-UB?;ncHcew@>pD-0WC z!13!-IVNLA5fc(&ma*l)^qc(cr*f3Zxww(Z!E>!Cwo6IPT6drCED|y|>zoezVt*?x zbRqXS9aqOwX%?cEwob~$0;Bp=z)g}miD{wC3Uv+ba$M^qg(rkP5z~_7H^T% zIsdm46 zOUO{*Yga0wNte_a@Xv{kt`G^HLY`+b@1ldkAfcXxM4}Y zdNoq0cY*9}HUFxorcH#7H~d+s^so_p@uZ@uTvU+}nEwEJnh-s*Xu0T18Bjq9Ut z_q=z4r@=Y!68Hf48Sq2kuY%tP{yBIb_zm!V;2YKZx9#w}ck_HdxD#xGv*5F!=zkPc z|6c~@!9M^c$3KDJ1K!c_yzd9^1vTzYP~$CuqI(`Z2xj2p;BSK;2LAz^0q=&1&<90# z5rnn34n77J;Dg}Hpya%;{PR3<9-WdNbepNo9y@qcnq8e)&G;=BKUbwcKJFezxfU* zdm9Fq-3FlK{S{F5`6G}n-s>QLR(R?ELrg;Rxd5(!p90TH8l+&HFz=`R^=~k-zQ+ z?*#XQcY}+d?0dX=J_Ab6E1>%Q1StBS0pALK4iukXtng(}`uhT?et!ds?>E7>fX~w8 zC%RT0cs~TH&qbPK*Cid}a`w_Vy5#qhm;6JvJ3%{1J4TZZ?x7v0eUzr_X$RgjpmZmF z$mfsJWOLbBa}H=v(9Y8i({xFLHf`oyDiaVf5m{O zXj%)WX)n+)pZ5t`i>9@;horp-^yXaC}IYPTYyF~j4t-j>L@}=cHgwqGAT?Jw$rTh-M{AUbDME}JMI+Kme*DHwJ0xAx(}v$Z+=VXMx)V< zgTf56v>V0YqTZ~eLxa3$q9n{08x1>0J=h=SghXdbjhRDn$*YyL2x60zgI1WCv}Az334;jGc$QppX<53T@WM-zhr#mwv zarFy97;?K0ITlJf_G^-wA{vAyXt&D&k`-Y`MD=SFI1GB#+nL9kk0ajx=6>!6ng_Tq zEHoDuMo;#g^m#ZRrb!VbVOr)#8{RgAj(p<29oZqx!kDK}OVFECzZqf`nFQWdr}JUf z4)H!FU#x{jX0PnUjOc|@jd4Z^T6`0AZlZ+VQEt1BddVyDN#gcQd$)Yjo5>f^>LNNV z6S;oJ6afbBm{~g>exH>?RQTi^%&NXgT4)&OJ9cPHH3*7vk1}C>g>C4}(()-2bPHye zg+V7uU|w2#mX)jFc{Sq+vJh#QxP)-u{Wc~nOkNI$X(q-j+#qY?WsFm1I8?=GIf*y; z7>eBYyJgarfBP)pFw^h>oOuu9@w-8=VOpWdkvZx{VF!1YOhKoUg?VoB=tgMPaMuX| zuLf~x$CxQy=XQ|nEKDagetYsoH)6bI5ne}jBvrgYceSv@7tE-M5pHlw^TJHdu|k87 zKc&M^6qQh&uvPYYn#q(to-lsLM7<=+F5;=WFW)`fSXQOv^prLSN(41-Lh*c(Ii25Hhv%R)hA zqz7qu}-+K(!KobE$($u|bAG_IU*`fHht-Btlnnx2xeNTFZDuPea< zE7yegyX6^FgRsKc3aa3mhYBX~R_j<3jOVBDL0lL_c`oOf*pWIx5jch2viHdJu3wb2 z)4>ogQQWE2pXJ47sTKWWG_LVR9IBnJQk2`z)FG4m|2G-4=NK6+OYuFsPq4*lhskZU zw2N&Rv@28P=^$*Soej<1Zs=iW(Zog2YQ|x5gjg3Pc|mZpVJWVBCnxf4?3!|`7bNUX zDN&xZ5l%!Srvp zUp#4g((Eoo8E#}zZ>=y3hYs#F7s4LV%bAo7@R=mCi>DyGca_XVOg4!E;-VegF4)=e z`kI3uTQ;ghs8iF)(?`xd;|4|KhIcyYgxB#OQ|}fg2?ilq!-Y_rjUnLXTAAv*f+H&n zvq_uw*(_w^NV^594x6M|liw9Sf>xf!Wf8I~5hdt_^A;Nj{Y*{@pxxK3`l~^!eG(O& z$ycskyS{Pb@@2hz>O{EIJ@s^QZh3hAlNUe!iOZ{!%YHjec+c|7jUB6gXO*PRzUm-|))>Z|{tf1E)uq6SxI57SD2zlCIUMzZS+rJE$bK zKSoMEk~ksJX^uXlw*5RL=RiS7VIT95$bho#Sk8HszDkxD6- z2x2#A<@NUCwW!0KT}PJ?_z4M6t-NZ~DxhGriz}DTELs1dpI^VXtO%rG#vs1i+?+7A zZjPNg4ITQ9*d5)BAgX-9PO#Z*lGLxZdsjGm#2c5Du(^Bzr?>0L6j>nI2?Yu*@(kA4 zs*lkJO_6qTn7V(SA=)TxU2$Qn;YpUT zVHK|L?B)Ew@H-FCqEgCL5Vq#8$|NP4B*Y$Xf^i)M*bU2&AYc#vhIG1xd@Ke+j&l&z$yK}^3lvwa<% zdt`rM|7tK%g1DgqM4tsYXtCATWY_qOIH>GIL#=%n!&@?D1!AOon4bJ0#rk&6i3xRH_q2)DJl@%7C*sUo30ZoEZi~1ez*n zP*{N|NAg#Hhg)*OLMsZT1X&-m_o;5U)KkpPl^InCJJfc?jXql4T-+F@xR53ov2%0? zNQF{nF$+}QP?$=X!djqi$!Ly=p~R79XwXj1QJ`vMbsW1yu2HdL@`E*oB3fGqU03_C z6^ujTi%e(qtsk)_(RIKYtZN?%sEPEwRbjUNG0Z{|7HPWBg0Yi?3pGvjk`ppg z>uuWwGuyW+gamS=I8Azr%&)$LKfGkOT~)ERqqUU^v^1)Ma2&V4Cz&egyiIOZ4a9Pr zR#4uKFqR8USq+em*4r(?s0`v%Hbv$9Vq#^f7QzDS zm;I2CxD5s4IHEjKNhDq0u2b!9Bag@5HkC$dF_aQi24SZm+FD;`u@w=qQ#Ff`?^JQ1 z8WhjGcSG*QLUL$$50C(cq;)EbpR7}d!+y=k%}f}*4ZUXNT$x|ML`E_K%= z?BiHj8KA&KOL-hD$1}-G+`gX^Y1X%QI4iD8wQY6~3?sKHD(3jct+`W4=)1K?fY#=v z;)%9C76(cV`}|MB kO0SX;Twt^yWCYL&}WM-ReFH$sP00R;kN6D|7F?aQ*T+0O|!DOr(3^u5eD;t4gBDC>o7=L)nVjX_7FZJ={jGoQ_>mIRg-E-$BN++b` zVM)eet1pC@8f_iM9<_`agaZztqO)gFZjPaSvSG;6ojMHJ#JWd!H5FmRz}@Qrq)1NS eQ6@xqw^f-r$}&`hLpETBXt;t5WU9`j#``ZjRdZPY literal 0 HcmV?d00001 diff --git a/gprof/po/eo.po b/gprof/po/eo.po index 5f82afe..5afb910 100644 --- a/gprof/po/eo.po +++ b/gprof/po/eo.po @@ -8,7 +8,7 @@ msgstr "" "Project-Id-Version: gprof 2.20.90\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" "POT-Creation-Date: 2010-11-05 11:34+0100\n" -"PO-Revision-Date: 2011-03-13 10:38-0300\n" +"PO-Revision-Date: 2011-04-17 14:27-0300\n" "Last-Translator: Felipe Castro \n" "Language-Team: Esperanto \n" "Language: eo\n" @@ -178,10 +178,11 @@ msgstr "patroj" msgid "index" msgstr "indekso" +# c-format ??? #: cg_print.c:98 #, c-format msgid "%time" -msgstr "" +msgstr "%time (tempo)" #: cg_print.c:98 cg_print.c:99 msgid "self" diff --git a/gprof/po/es.gmo b/gprof/po/es.gmo new file mode 100644 index 0000000000000000000000000000000000000000..a5f808ec30ac26e6f7f5b232663cdcfe3b12ffa8 GIT binary patch literal 10865 zcmd6tZHyh)S;r@7($u%KO-oBCN!v-=Tic0ez3aq@y?%)kXPr2;W7pm!q?^T=J2QLl z*mGxY=Ee3c0wgNlBq9V-#RnvWK|w?)f)YRwfr`2xiiCn1gj4|%NR+oPDDVXV9}vI) zIcM&RckMP%2}Yj#pPBRaoacGYbDr~G|MiD%`;y1id_&oSA@QdKb!E506fPVzu1%3nk2>7=9e)|s3`ylW4fIGnja2NP2sP;bss{Sv6 zi{NjAlH>2e_ky=}JnwtK_k$XDC#dmOK(%`TJOGy9L*TE2p9cRH?1FdDi7)`w?mS4> z-bL_!umXN&miQ3;41h4_*04Q;&-*!kPJ*w1|9C5U1DAOJ z2F8@$cVHyhX}7~;pxQqN-Up6Ax#ll`lJA#6T+RD6Q1X2l#B|;txbi;+HUB>aZv$_| zNOypDfO`J`sQy0e-tPwGmp-WeA93X?V0sI41wYF7-$kgy;Mc+X!T0e|dOrwC&wWsK zdKr{{e+QI(-vUvU_ckcGZozr>g8M<~F99j?egZrQUIQi1UxAv}f4cH_)2a03gM9Li zIa~wP?lSl=_?w{o_@6-e)dyKzlJ^j(c6|`n^?npQ2L22vxxWssfd3B4PmUtI^dEw! z!Jh_?fqw}~-n$WUAGjZsTmw-3|0K8w{tEaI_~&2*zL!etU;!Qi-*mXcw{ow5lH-R! z&F2+R{{1(g);w#f}MBar=axo7c@py-kk`A>w0?~o&dET){5U8-+vUDL2x=aOK=m8D?-#*acz>3AnOm3Uq3Z{@ zHP(4<$*wEl#s$sAG|hzwbC>**>3heyALl;CEnkvIC~FKFJn z?pwJ(&)wtJn$UXCB|mSk=iI|>4&~z)xD^9+$>*LnPoDQVhq51TWc=_`;0gC#{@&r1 z{d5sZy(8S`xS!{Kg1f!sOKc6sXAZcJr$L{4)x8TA-Lri5jC+>-AK@lMd!OYd1RCGH z7t}=vK;b)f91pY1@0a0d(CP5*>zaP^cO_RxS(t})TIBvlk!8h|YPV{3W4{+xX%zIb zBD&;9MU&TlnM6ey-@LT4#S!BMX56_}TRyw$gS4s(st@OCU;mZLola*X3u}K=78_}n zEbGf^G4hf3RGKH%a;IbFs2B6#AD8G%snb1}HGEnv>M-;3X4p$gzu53I)l9A?Q6nX2 zh?OuJ_*FO@Wr>}5<%gBu?fczoLB(xd|9mqXhUJ(sy$-_XO%|4EJzn;cnH~mdO)r;| zk}fi|IAV->%Zxq>K{0kIC1A z#FyEfy_gZTP^#}+ql7)m)VlK1oZ4w+s!wXkE2`PXQ8(HvpY*!bGFn|mr%f)`kNrBt z;IY5UjECQs%?K4fvYXCa-MpwZjP)HeG^QGc^|VHlv%ZpucK*tl6Mnc+GrKYg<20x9 z#@MrQu7>Be9nUmNkcNp%2wNURn6UP%W;7~Fbx_Vx!>lo5 zbQ@ba3iF+{9~XWQ&3@QO8E>IZt|B{8!Ur7*QOXH5@+$f8ozq1?dG;eibpRen;$rTOWNq?w8y_^18mBfWqd?_!k z_ycar;)IxXC9MZ`d00QheXR9c7laQt{LyQ z%QJL?u)^62TyU)t1(R&6b&Lt7^HcaBE)3JElJm^$NO4$)R$(`+Ju$tlm*!D19N{I3 zJ5K#&RbMZ)qJM_QHQuBLx6?UA+5JovO1b~H*)e;LFQb(OzGwCcwm9uDm5G*Sv5msW znW`#=Nw0{ae$vCHWCzU7A-l!O4WB%=u15`p0Bo-|Ho zqLEcglbdLWbB)5XO7I#xcjFC{1w0c(wh4~$UIgkPQQM{5J;%|9EJi|n->>R1T9)Gr^5nOR5uPc97gTO)Nv*`wbwh|lgyQpdx3vuykH@mu< zoxGXL8M@kPz5DLF&p#pmqGHFJZ16|D!vw#S>`7}s&0;<@xtY&V@3FA5LHx1vkNbUT zb`PSA#%0azgOvOwy)( zwoKSKij5joCkv!mv*ijOVXrE(rcT(Eh!WJodFwGkKU0wcX!rHkg0-+0J&uY_RjZe; zTpfR5eO(_PJ)W#=oOmjK`poF;OXolL`Smr)Wy($x-pgvevtuoY*GTHj$4e#{@2v~9 z9^&qKV63ZGLW`U;z~%e(z%&fj@*-FdbG%vkP*4>O8OPd@$so3Zyu|iXwPhOC7Ah$X z>>}RU(&WKg+sJ3^AjlOcVK%9YqzrmxnrxUSv(K#^$p~-Rx|O#z&t&5^73KHSFGe)$ zbVWH12vUP1Mpf!PPAk&>anR&=dpt=FtR8JnU>DF-JkxucZy22hgCrZ7K_#(ym?-&3 zZiPgr75YpgQ#>N)KtV`hUaN%2fU?b4ZdhA8meK7VS(_z(4h_PgndK$?^c64=en3e)Q5*ol+0 zL*FU8qn#0roG+LOE-WmN)UQST3miSN@wyT=n=jz>We`$B1yjYJnb`e!%X-nJ}x4_48(-DEpnWXI6vbr0*t?ejN8*_V+C=Ee1n)V{nKGtZ@!i%U+|GW`YeMqam?gu`Y3{3y)RYTzGE zs$*FynWt4al~$e8Cr__T6|uCi*g4MLfSQBV@rdatKi^AeNb^HVQ*p@p$TO=af&zx z-M+U>M49waOKJLz8l(+10?foq4Vg}F^BP1&!FmyE(blb0#a1?tH?OVA{q3aR+GktM z^g5a4Ts`$R$@54lx5zauL~1Av4!y)zUsOzCC=DiZN_J=8JWJ$^(veOs6LP~8ne}qq zr~@Up^v2VhZwwPuWmbU%N$~$B!V^&yubF8}{o`22AEH1)k5d%dAF{i*M8~wbpsu!~{$l2;tna3x>;$_Xn8 z)-{AlG0&Gsg3W6Z#ikd9^-d$9P2x2WyPmwrO^Ps&-iUr?uGOg7eAPN~0+#}ZBG+hI zmy_&H+#B{{s~8?da|+`j+=*mjPGR{{G)0Xh4WKnw#o)BjJ2IrDL*Yq$9vw3Do>zvHBlzRCqh;4+NF-v#P ztOHZt+TGDi;pQ9pHXdYs%0}dv)SsYYBJzw+(ihBABEG`K-W%=-$aVeB(h^X{p{&5H zxRjlMeyN`1FwA;^OJiZDJZlj+?{MpJW;$KjW>VLwjWYs=4Hq92EVT<&vw5pa-xT8L z?D{NrN>_bLwrZLNGPX^P9ARa02b5$ut4aQKc#vK!*n%8~0B1ELzTvI3BV$-YT1hw< ztp5dfwQ^msvJ95y-Hk1UrRar>XXlgUc?xUuWdtTTDt*d}p+bUez+XRfz#s#($2~O3 zs%GumU4BK05viBREP^3_>2O3Aahfimv*v3|0-{Jo*iPc9*sRUhXspQ6l3fLUcbfcG zGO%>B1Y_d|-xkkhXf88@n-N`cvNse(F?2o?u!QxlKcwXSv~FTUR)m%wxe?Jd9cDYK z%az`c?7F^nOLuK)r-S)X8+EfUM@U^N@y@5 z7JrNJIC3i}dGx`d-B4lXWU2(_0)LDlA2dDaMDP06qg^Q-&mw%7{tD~SMt{H=7Sks~ djHySD-Oq-0Wry~p1x02UGDW7zA$gu8`)@5N3)=ty literal 0 HcmV?d00001 diff --git a/gprof/po/es.po b/gprof/po/es.po index 92c13d7..45f2379 100644 --- a/gprof/po/es.po +++ b/gprof/po/es.po @@ -1,18 +1,19 @@ -# Mensajes en español para gprof 2.20.90 -# Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +# Mensajes en español para gprof 2.20.90 +# Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. # This file is distributed under the same license as the binutils package. -# Cristian Othón Martínez Vera , 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010. +# Cristian Othón Martínez Vera , 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011. # msgid "" msgstr "" "Project-Id-Version: gprof 2.20.90\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" "POT-Creation-Date: 2010-11-05 11:34+0100\n" -"PO-Revision-Date: 2010-11-18 12:10-0600\n" -"Last-Translator: Cristian Othón Martínez Vera \n" +"PO-Revision-Date: 2011-08-24 11:50-0500\n" +"Last-Translator: Cristian Othón Martínez Vera \n" "Language-Team: Spanish \n" +"Language: es\n" "MIME-Version: 1.0\n" -"Content-Type: text/plain; charset=ISO-8859-1\n" +"Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" #: alpha.c:102 mips.c:54 @@ -42,7 +43,7 @@ msgstr "%s: %s: fin de fichero inesperado\n" #: basic_blocks.c:196 #, c-format msgid "%s: warning: ignoring basic-block exec counts (use -l or --line)\n" -msgstr "%s: aviso: se descartan las cuentas de ejecución de bloques básicos (use -l o --line)\n" +msgstr "%s: aviso: se descartan las cuentas de ejecución de bloques básicos (use -l o --line)\n" #. FIXME: This only works if bfd_vma is unsigned long. #: basic_blocks.c:289 basic_blocks.c:299 @@ -66,9 +67,9 @@ msgid "" msgstr "" "\n" "\n" -"%d Líneas Principales:\n" +"%d Líneas Principales:\n" "\n" -" Línea Cuenta\n" +" Línea Cuenta\n" "\n" #: basic_blocks.c:567 @@ -79,18 +80,18 @@ msgid "" "\n" msgstr "" "\n" -"Resumen de Ejecución:\n" +"Resumen de Ejecución:\n" "\n" #: basic_blocks.c:568 #, c-format msgid "%9ld Executable lines in this file\n" -msgstr "%9ld Líneas ejecutables en este fichero\n" +msgstr "%9ld Líneas ejecutables en este fichero\n" #: basic_blocks.c:570 #, c-format msgid "%9ld Lines executed\n" -msgstr "%9ld Líneas ejecutadas\n" +msgstr "%9ld Líneas ejecutadas\n" #: basic_blocks.c:571 #, c-format @@ -104,12 +105,12 @@ msgid "" "%9lu Total number of line executions\n" msgstr "" "\n" -"%9lu Número total de ejecuciones de línea\n" +"%9lu Número total de ejecuciones de línea\n" #: basic_blocks.c:577 #, c-format msgid "%9.2f Average executions per line\n" -msgstr "%9.2f Ejecuciones promedio por línea\n" +msgstr "%9.2f Ejecuciones promedio por línea\n" #: call_graph.c:68 #, c-format @@ -122,7 +123,7 @@ msgid "" "\t\t Call graph (explanation follows)\n" "\n" msgstr "" -"\t\t Gráfico de llamadas (explicación a continuación)\n" +"\t\t Gráfico de llamadas (explicación a continuación)\n" "\n" #: cg_print.c:76 @@ -131,7 +132,7 @@ msgid "" "\t\t\tCall graph\n" "\n" msgstr "" -"\t\t\tGráfico de llamadas\n" +"\t\t\tGráfico de llamadas\n" "\n" #: cg_print.c:79 hist.c:468 @@ -175,7 +176,7 @@ msgstr "padres" #: cg_print.c:98 cg_print.c:99 msgid "index" -msgstr "índice" +msgstr "índice" #: cg_print.c:98 #, c-format @@ -184,7 +185,7 @@ msgstr "%tiempo" #: cg_print.c:98 cg_print.c:99 msgid "self" -msgstr "sí mismo" +msgstr "sí mismo" #: cg_print.c:98 msgid "descendants" @@ -201,7 +202,7 @@ msgstr "hijos" #: cg_print.c:106 #, c-format msgid "index %% time self children called name\n" -msgstr "ind %% tiempo sí_mismo hijos llamado nombre\n" +msgstr "ind %% tiempo sí_mismo hijos llamado nombre\n" #: cg_print.c:129 #, c-format @@ -211,12 +212,12 @@ msgstr " [%d]\n" #: cg_print.c:355 #, c-format msgid "%6.6s %5.5s %7.7s %11.11s %7.7s %7.7s \n" -msgstr "%6.6s %5.5s %7.7s %11.11s %7.7s %7.7s \n" +msgstr "%6.6s %5.5s %7.7s %11.11s %7.7s %7.7s \n" #: cg_print.c:356 #, c-format msgid "%6.6s %5.5s %7.7s %7.7s %7.7s %7.7s \n" -msgstr "%6.6s %5.5s %7.7s %11.11s %7.7s %7.7s \n" +msgstr "%6.6s %5.5s %7.7s %11.11s %7.7s %7.7s \n" #: cg_print.c:590 #, c-format @@ -224,7 +225,7 @@ msgid "" "Index by function name\n" "\n" msgstr "" -"Índice por nombre de función\n" +"Índice por nombre de función\n" "\n" #: cg_print.c:647 cg_print.c:656 @@ -245,17 +246,17 @@ msgstr "%s: no se puede abrir %s.\n" #: corefile.c:183 #, c-format msgid "%s: %s: not in executable format\n" -msgstr "%s: %s: no está en formato ejecutable\n" +msgstr "%s: %s: no está en formato ejecutable\n" #: corefile.c:194 #, c-format msgid "%s: can't find .text section in %s\n" -msgstr "%s: no se puede encontrar la sección .text en %s\n" +msgstr "%s: no se puede encontrar la sección .text en %s\n" #: corefile.c:269 #, c-format msgid "%s: ran out room for %lu bytes of text space\n" -msgstr "%s: se terminó el espacio para %lu bytes de espacio de texto\n" +msgstr "%s: se terminó el espacio para %lu bytes de espacio de texto\n" #: corefile.c:283 #, c-format @@ -270,17 +271,17 @@ msgstr "%s: -c no se admite en la arquitectura %s\n" #: corefile.c:513 corefile.c:598 #, c-format msgid "%s: file `%s' has no symbols\n" -msgstr "%s: el fichero `%s' no tiene símbolos\n" +msgstr "%s: el fichero `%s' no tiene símbolos\n" #: corefile.c:859 #, c-format msgid "%s: somebody miscounted: ltab.len=%d instead of %ld\n" -msgstr "%s: alguien contó mal: ltab.len=%d en lugar de %ld\n" +msgstr "%s: alguien contó mal: ltab.len=%d en lugar de %ld\n" #: gmon_io.c:84 #, c-format msgid "%s: address size has unexpected value of %u\n" -msgstr "%s: el tamaño de la dirección tiene un valor inesperado de %u\n" +msgstr "%s: el tamaño de la dirección tiene un valor inesperado de %u\n" #: gmon_io.c:319 gmon_io.c:415 #, c-format @@ -290,7 +291,7 @@ msgstr "%s: el fichero es muy corto para ser un fichero gmon\n" #: gmon_io.c:329 gmon_io.c:458 #, c-format msgid "%s: file `%s' has bad magic cookie\n" -msgstr "%s: el fichero `%s' tiene una galleta mágica errónea\n" +msgstr "%s: el fichero `%s' tiene una galleta mágica errónea\n" #: gmon_io.c:340 #, c-format @@ -300,12 +301,12 @@ msgstr "%s: el fichero `%s' tiene la version %d que no se admite\n" #: gmon_io.c:370 #, c-format msgid "%s: %s: found bad tag %d (file corrupted?)\n" -msgstr "%s: %s: se encontró la marca errónea %d (¿Fichero corrupto?)\n" +msgstr "%s: %s: se encontró la marca errónea %d (¿Fichero corrupto?)\n" #: gmon_io.c:437 #, c-format msgid "%s: profiling rate incompatible with first gmon file\n" -msgstr "%s: tasa de análisis de perfil incompatible con el primer fichero gmon\n" +msgstr "%s: tasa de análisis de perfil incompatible con el primer fichero gmon\n" #: gmon_io.c:488 #, c-format @@ -320,22 +321,22 @@ msgstr "%s: el fichero '%s' no parece estar en el formato gmon.out\n" #: gmon_io.c:531 #, c-format msgid "%s: unexpected EOF after reading %d/%d bins\n" -msgstr "%s: fin de fichero inesperado después de leer %d/%d binarios\n" +msgstr "%s: fin de fichero inesperado después de leer %d/%d binarios\n" #: gmon_io.c:563 #, c-format msgid "time is in ticks, not seconds\n" -msgstr "el tiempo está en tics, no en segundos\n" +msgstr "el tiempo está en tics, no en segundos\n" #: gmon_io.c:569 gmon_io.c:749 #, c-format msgid "%s: don't know how to deal with file format %d\n" -msgstr "%s: se desconoce cómo lidiar con el fichero de formato %d\n" +msgstr "%s: se desconoce cómo lidiar con el fichero de formato %d\n" #: gmon_io.c:579 #, c-format msgid "File `%s' (version %d) contains:\n" -msgstr "El fichero `%s' (versión %d) contiene:\n" +msgstr "El fichero `%s' (versión %d) contiene:\n" #: gmon_io.c:582 #, c-format @@ -350,22 +351,22 @@ msgstr "\t%d registros de histogramas\n" #: gmon_io.c:585 #, c-format msgid "\t%d call-graph record\n" -msgstr "\t%d registro de gráfico de llamadas\n" +msgstr "\t%d registro de gráfico de llamadas\n" #: gmon_io.c:586 #, c-format msgid "\t%d call-graph records\n" -msgstr "\t%d registros de gráficos de llamadas\n" +msgstr "\t%d registros de gráficos de llamadas\n" #: gmon_io.c:588 #, c-format msgid "\t%d basic-block count record\n" -msgstr "\t%d registro de cuenta de bloques básicos\n" +msgstr "\t%d registro de cuenta de bloques básicos\n" #: gmon_io.c:589 #, c-format msgid "\t%d basic-block count records\n" -msgstr "\t%d registros de cuentas de bloques básicos\n" +msgstr "\t%d registros de cuentas de bloques básicos\n" #: gprof.c:159 #, c-format @@ -406,7 +407,7 @@ msgstr "Reporte bichos a %s\n" #: gprof.c:251 #, c-format msgid "%s: debugging not supported; -d ignored\n" -msgstr "%s: no se admite la depuración; se descarta -d\n" +msgstr "%s: no se admite la depuración; se descarta -d\n" #: gprof.c:331 #, c-format @@ -427,7 +428,7 @@ msgstr "Basado en gprof de BSD, copyright 1983 Regents of the University of Cali #: gprof.c:421 #, c-format msgid "This program is free software. This program has absolutely no warranty.\n" -msgstr "Este programa es software libre. Este programa no tiene ninguna garantía en lo absoluto.\n" +msgstr "Este programa es software libre. Este programa no tiene ninguna garantía en lo absoluto.\n" #: gprof.c:462 #, c-format @@ -437,12 +438,12 @@ msgstr "%s: estilo de desenredo desconocido `%s'\n" #: gprof.c:482 #, c-format msgid "%s: Only one of --function-ordering and --file-ordering may be specified.\n" -msgstr "%s: Sólo se puede especificar uno de --function-ordering y --file-ordering.\n" +msgstr "%s: Sólo se puede especificar uno de --function-ordering y --file-ordering.\n" #: gprof.c:534 #, c-format msgid "%s: sorry, file format `prof' is not yet supported\n" -msgstr "%s: perdón, el formato de fichero `prof' aún no se admite\n" +msgstr "%s: perdón, el formato de fichero `prof' aún no se admite\n" #: gprof.c:588 #, c-format @@ -452,7 +453,7 @@ msgstr "%s: falta el histograma en el fichero gmon.out\n" #: gprof.c:595 #, c-format msgid "%s: gmon.out file is missing call-graph data\n" -msgstr "%s: faltan los datos del gráfico de llamadas en el fichero gmon.out\n" +msgstr "%s: faltan los datos del gráfico de llamadas en el fichero gmon.out\n" #: hist.c:135 #, c-format @@ -461,7 +462,7 @@ msgid "" "%s: from '%s'\n" "%s: to '%s'\n" msgstr "" -"%s: cambió la unidad de dimensión entre los registros de histograma\n" +"%s: cambió la unidad de dimensión entre los registros de histograma\n" "%s: de '%s'\n" "%s: a '%s'\n" @@ -472,7 +473,7 @@ msgid "" "%s: from '%c'\n" "%s: to '%c'\n" msgstr "" -"%s: cambió la abreviación de dimensión entre los registros de histograma\n" +"%s: cambió la abreviación de dimensión entre los registros de histograma\n" "%s: de '%c'\n" "%s: a '%c'\n" @@ -489,7 +490,7 @@ msgstr "%s: registros de histogramas empalmados\n" #: hist.c:230 #, c-format msgid "%s: %s: unexpected EOF after reading %u of %u samples\n" -msgstr "%s: %s: fin de fichero inesperado después de leer %u de %u muestras\n" +msgstr "%s: %s: fin de fichero inesperado después de leer %u de %u muestras\n" #: hist.c:464 #, c-format @@ -529,7 +530,7 @@ msgstr "cumulativo" #: hist.c:490 msgid "self " -msgstr "sí mismo " +msgstr "sí mismo " #: hist.c:490 msgid "total " @@ -564,7 +565,7 @@ msgstr "Perfil plano:\n" #: hist.c:709 #, c-format msgid "%s: found a symbol that covers several histogram records" -msgstr "%s: se encontró un símbolo que cubre varios registros de histograma" +msgstr "%s: se encontró un símbolo que cubre varios registros de histograma" #: mips.c:71 #, c-format @@ -595,4 +596,4 @@ msgstr " " #~ msgstr "%s: `%s' es incompatible con el primer fichero gmon\n" #~ msgid "%s: bfd_vma has unexpected size of %ld bytes\n" -#~ msgstr "%s: bfd_vma tiene un tamaño inesperado de %ld bytes\n" +#~ msgstr "%s: bfd_vma tiene un tamaño inesperado de %ld bytes\n" diff --git a/gprof/po/fi.gmo b/gprof/po/fi.gmo new file mode 100644 index 0000000000000000000000000000000000000000..082672a430a1a1cab7ad018a8a971d12c3378dde GIT binary patch literal 11021 zcmds-TZ~=TS;u$Nl;BfnLz^b_1}h0u+llwF$BCVIe2HUwocI>I_T=JBjI-yQHRo)f zefB=xm$6TgT0{j>5j;={Bq*r>4VMb>z@k36tLxvlEeL*s?@xf+!8W)9dtyu z7oh0)4)}iXwpI}QB=`YP>uv|N-Xf@RFMyANIk+GEWAJCdH^4dY4ki(XpvGMSnL4-z zJ_wfJz2NVF8vl3TPlNvriq4PzSP+~BkAb_uUj^?3{~Ej>{Cn_Y;P*i7zxCsO+9KI`@07rgy02GeEb~vDew=# z`@q-0ec*qB>h~##d>C8;9|FG!YQDb#cY)sqHSSJ?^KtMY@Nw`wD1Q7J_&)H@K}Zh% z3WTM>*FlB`{{V`Q-v-Zu{{d>;!iSI*_yVYL15olCgZvA=#Lp@4_rZU?4ZeZ%e18jJ zitpPHlH|0r#-pIdKMOtpjzFpAmqF3@dmyS7{1GVn{uD%X!7Fw9H$d(Gb?|oZHiUEs zcn7HO4}zNSuKN4qp!Cv!n*Xu7eGz=+J?s_K{&p6q2m_+ju8 zxF76+8vhk=5BQIu^yYRtOFwpjqVIW7d@I0X;O9Wm@hbQ%`0t?X={Q8Fz7JjozXZxY zz6)wUAAxCY@Ilak&x7L2&w=9qOLhAIfTI5| z!3FT&K=r?$$sYk%K+XSK;6d}3DSoih^hxeP<;D*{r$@zE+F`A@YCQ|L9P2gp!9w_lgl0!KtvHd z2_6Hx;1%!>!Mone8W{C6e18mPGc@=N2+M-ssPSvyUcUbc)V}Y4Nz(s=p!E1ejb}jF z;YCpEMxgXQ1LY^KgSUf!0&WBUtp0ul)I6`&-`@cF7re%g`h6d4fw!@__kf~Ra?!Kw zA^2HPYh9w;UDt)6_N|9)x`!=ndc-f-5FDqRpd6)0$HiCi>Pd>8(;kAS!51jf*uCFIpptbm9W#5Jiu4RC*vDh;NeR`zffo(>uUD;;kOU;pDD&OfFcY+)4Q`<#CF9 z-zmzAl-nrJQ&uRLwUZOzyb@frOfMt=Q+w#?#=6wUL`;2!hMwcDJLm< zq`#7d>dYk96m}d-Hbw81J(4Gn9KM zcTw)8=)ncR@NL_UM@eFOc{J*`T6`Nl(>k-m-WVlO8kKRDn$;{xvg^f8^_=UPm8gh2 z;YyNq2Bwo$X=!rX$@1=7w-&y+!@8kcchjgX)phrNT$CBzhnsreTubLxtF@X$r5WYf zYMj^w)huNr1HEVC)D{b^mfNE~+>1Fb(%DjL?m$vewUm`nV$y23Vsn$NnnXSA4cn>2 z1TC=`b^4}=hNHy#jTa^=%v{gR6>T*)ea)q6IE?Z!YX&WdPpc%#<8r)U?92@PxMY?! zn=?fMSI4E@QS1!Nq0YF&0uavRk-6T_5_`lf&vmb~W*UzKh$T03?Y*mWb0Sx75WT1O4!s-&+kkpj{aAIBbb}v+Oq`q#}_pciriN%{vzDWAkO- z8i~D@7dxUCOf|*}C0e0PqYD$K^o|SHebP%>QOpkR%yo84Cxf|S0j@5<(<+tfcTE`~ z@UGe6)Eq={Bbc9+|z8>dWO zIeAvKs-bz!#52Pz)Ua_8;oHLwA}mc&jYe6ni80(L@1SL@Q{^aBJ<<6z8PjMrJPcQ> zv?KivF<_f(`G}dRXX0tyFdCZ`YYJ$NS7X~n-9=N>?dG;9Oc8(9nm+0}L*QDJRBnyA z%6INW>GsleGZS`ZD^_FHYnS#0v_q-<4ZLfJ#lIj%Z47sVQkoa%3a%AeeA<+atVYyC zb?r*k>uD#O_;JvLT@&}xEO*+$1l@Rb)#lQm0#SR_*y35-QeEsNEks(hvXa}i*!#s! zKT3OWdc~I4EhKCi+!CFuc{ViL=Q`WnSDE?uo93-jd4qQ{A8gRgDialU<6hJ_ z30+1pjCyegkz|9o*2m3#@Gix8xRNEc5^ip-(y7|YA&S$RXe=|v_tEQ`u*lIhqy64I zqk0i6oTH$2u7#B|Nw!MIiD0@vxexrpFfIxy&&-L`jmpR~>`i-5MDP2>X(tI4w$?lXFW+tvdytZ@g=hTD>S@w~L9=q_Lgx zMxHHI>bxP!HHz}WqBVZ+P8%i$JmW-e;T*fWA!r4Pnkl93DT+SC7;*7EQ_IRKwdV`n@i?tN9kT+C+EIKnTw#htvu4}nKBAQ(ORCaxD&ZyQh4PkTh<>^t1kmYgmc!*}rE>xnoh_EuuHP7c z_R1AiK7QOTuAV%dK6QR{;WL*${rr_>(dF7s;okG&N^9G4*j*;5bCm< z9qHoWtz)D!ei7&j6)?NdMO20>d2CnRn>**04=1>{S0L9S&A`T%6*OHHL#|*R z3&uGg4R9};+g;UySt;^O!|Lj5QSv6$Bxz@tY5EsAq)pt`RqwW1foQQ^2Swm239N$p zf`MBKy0#!#?_%0T0P*&Q|214*+--zVy|4+fe=}IO13#x+Cw->0t`!ObP zZq`kN%Tb6QcLv2S9|6`^pPLY`g2?}n$k;WIwsSg0M|-uC=~_JKVu@7uz2 zMKA7#$MA6BQU)KZUdZXgoiHhm_R^}I<-OL0^Go4z!gm))pFn*V%-%hF4utymh?#$Q zVSdkpd#Isfc#-f?0ZzEN-~7X7e&52ry}sYss3^lF9ASa`$nphqTG5v|6Xk0}?x{I6 zsNdSx)Nr&njN+tC%yFc3mSeDzzAf2kxWKWKrg70XhfpLpo0jGZ<+q*UF zx@X&|EswO$ojSKT<;r|}PwO}b1w0Rz#v}HoV0|}!B2Et~W<@*8!%r`r3?H5L(_#eI z;Ua;ME;S40(UrJtT}UcIvG62BqqgbDeHMrJ9yI>-@Q&2nd)UnHJlJ|Je8Q##Zf^T$ zjzudrF}ixT_bOkp?Mzh`75+0?jX8(v1jbCI*@1d+=jL)^Su<*q7hEH&BFXv#&YVFt z+*sdO&o|b~*p?O1kkT7()x&a!Q=h?f_1U3Ys+<0k;BJUlnl81aTK&mnKzM04)_pP~ zPGXnMSmXvWgy0x<>jIj`Yw^Z;jBG?zFoC_c zu}+uM*#KdpSLwz&L83{bVqnXNAkwK>G|h2bs>hDqY-_g6T#}<7+cYc2aWNhv*K3=n z%Zdu!9YiHFx>QFQtyK}ZjBC-LAZUP{*#K9~#?ok->1bNXbPO^rhlgqM9lK}K9Z@`p z2oroJq;4tffT%5wl-aPc8CZn8u})l(j>{4rXiU@S-VtfSsi%a{Epiuco%D#(_?@Rb z>OplbCju%F0ZAA*fy~>t;~O#gpAN-BNM^qfs@qIkWFVaNKp0 z*pO~0%Szc3l$jQ(FCR{&(VhaaPv@P^HM@eF*LNbFQd5az(7cgWD{a55s+=n#np|HY zp22ja@|k(#=U=)-LWNpF%eZcxjm6YbL{V3i*0LuIPBzvFe#L;S$XIcZWm*mf%#td@ zWP83Nl&)nle!1U8x10P5wGs*UIu>#n77^%tALi&xiqLAZ4?hVz9mycL7(^O3SMW2t zidcc>L=$mnhMHiXdWkAc%XH#gq`b?5Opc1Iq{8&8Y#3)*E#)mf&@q?Yl8xesk+UnX zRn9@j6C7w66&1#ijQchvjWw()u6(Qvnp9{ zQg_ojW6W?c*m(I}FXT9Q(?XlLDrK~=NV*)SgDGpBLBL-QrI>b@IM`S(&1PS5Zz)3aZRA=Jq)`*!1I7MzT! zndMK@A{)hP7|!&Z_vyFE_ENTxA|}7y%zV&@tzjvoDJ>e$pFyN89GECB-q#QCHxC?a z8K(e&D;HFtnl9ps)6EGc8$+jJ z1K*$AF-q=^D5jd|S#1t5T3eBtLd05Zv2O2c{AgvBhp_mP4;l~abI+oidWu?>SZE{w1#NidwU8ano!a()6|J99L7%m{yRGu57Um6=x?5-dOL;7n5#PYKyFV*1u*G+o=V$9{m*khd+>qky~xedG2$ZU3O5)|yN-`JA!94=MH46{0> zdgaUrn>n1Ss!p4{S<0+g|5hn8*Y>6KX0~l`SRIQ?}>xd{gl%tHUO$ni-XsYsO5y^HuMiTY(!( zm|VXEs<$Oy?tcKp+yV*i0)L*t3WeP+L5GKHP^miI43uSXoN}Bb=-_Fl*SnD!wgUYI up8o`RfkwC=l69KJ{V2F|nYyqEvUOYBrGw93;BA~DhB`jkSf9R`;Qs)a@w~AB literal 0 HcmV?d00001 diff --git a/gprof/po/fr.gmo b/gprof/po/fr.gmo new file mode 100644 index 0000000000000000000000000000000000000000..2a6e7dc6d3cc1156b0bcefa63be582755822683e GIT binary patch literal 11206 zcmd6tZHyh)S;wboQr9=74M`v^ZOTcS+qDzVde?bhzr^->ojA2)*Ip-0Hzt{TXZG&I zb7yYm#r8%m6ao?;ApsJ6X;rqBsIpW-LX=8rLBQ^ZR6;ERKC}WUAgT%>fm#F~KtjOp zf6mN(@vf7&eCfz%{&!~1%X6ORInQ~{fBnX-H~yB#)uDWdvge(i_X>F6UEH{yc(>=h z4?F?x2A>7*1YZF^41NLpN$}6WJHT&)KLLKfet*+W&--znKLk#J)8H=fX;AHd4pjZm zgEQb)K*{kv@MiFamgl`6d@rbRr$CLj0IJ<{;3HrTJ_LRlya)V8unq2@6QK{P-8qo1 zy%)jzz!JO*Tm#j91N>?5zd*_Pf%kacli*Qs5BO`~E#TL{kAQyx{uKCqQ1fs7m}_@8 zxSQvXfzN;ycpCgBxEH+hy`J|lcnVZMzXWQ2>!8}b4odES12w-pFoF-B0j0;E1wRUY z3A`KpCio!u15ouoijWV0i{Sm>uYl_BPryCkcR{tg1><}WydOLQo(83l-vDm{{}4oE z?==vWdar{t_5K=^9={8o1pgIOySZDj75E&eb{9d}Zx!U9_nX{KfWHg=(+%hioaOo3 z7*l%RiIHTd-8CKt)&3dqUT^@)H9reVzAu8fn)fOw`ThXJblxA=-@gHB{@(&`1aH7d zJHQ>Fp5F(mzuW8Q4}$Vb1FHYW>hBBSm)^l#!P|KM?+CRI-0=a2bD+lQgR;vPK-uXV zHU0pUKfNDkVanbSQ1ur<+3S}s`oii?cV^O0B^g;&G$J_ z-+#M){tieL@7A{Gh2TRV|Gdv~y9xYrQ1*Krl-~Zfe*PY)_3)pd*24`rf#f<3vLwCF zfLaf~4q_Vb^PmC021?$)19!X=TjDg2@q8D~eis;k^8Z&rT+jO)D7$?Hlz#palt2GB z_%859jQeizW>E6n4&DrY7`zF*7nFWyK!)=|Q0-U18^HmnekxG)KLyIJzfeEFR)7Cf z@EyE=nleYxCBM-1GZgiCj>59DmwZt3)}?WE$#2Fly0p5U2aiz>Q*aaSJ(Qyq*-h7z z4!rZ=a}?=EG9IGH_ho0zJ)rET$bSw{bWKzCQnWUtC&HH14{mS$AF!8nqzkiHJ?OXe zzCgK!avS9cMYcXcd4X~R<&%^SMQc)iuj_&Xdw-_>EnVxv+}`sPtvOwvpgd)NdEUos zl;7M#xtsD4%5jP=*}p}Ry>!VhEJuIS1j3DTg9v(zkS zNs?VIcB^JPG@YP`yM8Chx))71tJ2csQ8&xOH~(6=&t1m#?YI-Iw!E&Zuf#=}QN2G= z`|7t;Znav=Nl=HKQw0w~`Vx#6r+rF-6cHB$1nVVS>W6d!}7X>vL1roU8i%AYWxnuZ8ew zl>~WQuFjcgtcR7jq?b!kP8SJUT`i+s#ct0W=&p7d0Kw@zFqc=dBsyf4+Tn%P*vCU2 zX30%^df#%pEphb=K^Sto4+R!VL;E$&Od0nh6Lh;(AIZunRHNoK3LFHz`fdB6>4y;S z!RZINKRo>~_u1L$+1cTfeJ6b$CPv$j-ZyHH?Dp& zz$!8ceb<%FM0q#D`yO;DeEih z(#|ZLK5l~LlG)`^5XLE;SJs|Y?P_>l)A3ld2x*wOgmB;eE+#BZQ4I!Ju8vu_LEgp7 z7^li{sJf%mX|l@4NX>nJxk|h8Z=VGmfEG1`@@+zryH(uA4uyW=mGW5$~4A_t`U~_f*Cb2 z!VOMoUT7B_D>V4%Q#Odyq82KQI#sWynM~+ozwtv8_tGr4-a!Xpyu2Lc@}L4!JJ;9} zS?o|D>m@BDTF~j_(WThM#qLUw_Rw@EDlbQfu%&TJaxUjt-%Pc;Q}(IM-0!RUtx`pU z>*)_QsCV06qmnR_iZ7%voL6tggY=_?ovq99jO z?2RFM{Vbi%s!~B^=)$($3u-5$YfdJtAPTR|OMi%7vF*=ikYg3?n9 zlz~&&HERz|@9M>AH|r1Z62+Zb{drMdEw!S5g2px8u!nl5s}<$;GgZjt{%^Bm_8cRl zwOb0#T+&U6x`2Z?oYT9gDQ8YfR=dO^ZYNs02L)o3glIki-&jfObaAjpdduW@s?-Y{IiV?kt_;27>jpbio> zUCP~49KFwCB*gbjQLdtOx#wgRJ4&+x>gJb&Jf+Q?iwtT#p4}*dE6${4VRlsr>?ejz z*Y~xRxPaeARl8V-GgsQlmEG**)kMzF)>iA?d+)vGxcrNXEpNENAMy?m{9>{vt^GI& zc~PZyK8L)cLE(b<(R0U4Pnz9>D1+5J?yZz&_R&Y~H)o?B(aV{X4e)##+r?87-j|ik z#Y{Gh1LC3`+%DK%qxH3${@AinB|;saOr9Qp>bx5ikz3x0G>op`Kc?9&Od9kfvWByf zHXB30EwnOKcM(Tc7G{$+?X!8r#*rXFbQ=k#&;Ub$i$`b%l%UkFmXS^1D(WEC05 z(!t>%u7bS8^;0z8G_3omq||qdcxy|W2XAd7pK*gAm#>7`rY@4w@8of`Y=7B(Zs}k` zcuOugc^mT#H*Q-|em{C+MRQJ<<*PnHYUQ9+m3j~3g0z3tuTs1{93}@&k1i*03uq*s z?LAJHtxo-wC>hv6C9(Z6RPw>p35iY%^ci>U=K(nf3PK9|SVTkylx@eVhjq36Q9yPz zv8hBJw;IYw-OHR*O1VUkxIt^Lw;wOZA#-*WT|(feBtVVw>QU=}g3-<`K6`S(`VaN| z=DqETKpN!?;=9ew3DfB2@bMG0L*FsGqni{LZ{PI3ndwJoS}wNvr;1)2`bUXy{$hq6tDev9!l zGp85*dD3^ANFT#}=ghvD*%^O!)}MLM%+Ai;|G<4b&rs1nOZun;#~;?C(gXg!Su?wD zZr=>Qsdq9cN`H|+SP(w4e9jyTF2$ialW(qHVrxAR>hUl#1mq49;Sf#IUL`+UjDr50 zIgXAvtscOC!m4}N!DLOPrma&aPA!ZyFgrcdnrBl$zy9LtfO#k}-%Cu0)BVa%@x=1r z`NiY@Bcpl}lSJBIAnDNoX3jj)iObfRq$2I|kCQjzqUpds76~G-1=J*^0^cW|uN}u@*7s1oX?Pq{8vi zvY{=aG>>}F33)^^&q0JPH`kS>DJ$YhgogXU&g;mE$tL#Wb+%E*C5jwNC$HJ{+o(6} zZkR2y4O>!X8&Pe46BQvzT=>BRLAkMJS(0|Ru{J;{@#d=><~SwyI1B4rLzwVvm*BkB z6$WS+lc%yiry=5wh?8(Cx`I9(St2=IN7SBQ30~qT$VbjM_-sOU@APg4?5HCG)MP%5qvDjfX&!+1bDwL=g;>W=t-+YyI5}2fBR;brz z&~XQ^9m7%|BQew|t=Ad30?_2R?(FEvR5q|Ai1?hL)MQDVKCqKQFcz=|n%aim(O5-P zanwkrI7cxBjt92GVq3C@GuqW$&miL9xcPg;NjB0Dg(Ik?R@67FPQGDzKzbWT!n;K-?c>9ISO7wvjxMCGoP+bQ}GT*Niv}4>s3x)#Pwr^Fxj;vJRya zhcny8mp9h*Yvb$e`l+RhlDJ^`)!)r{zf%elG0WSLMiQ04-pP7$Z#9>~NBZ7a8?i@d zqv=uvl7wTwENpm-(1DsscW)yg*OH;JjyCq1RYHd&zG-t!CQo|=Mc1txV0GsBUZm*b|lONP)vj@Y;1NsB&UnYpeS0;e%y>b5Y^SK3QP>(Qym`BNQf znl{@G8#K}1odkwHvb~s!MwkJgt`8>oZfIVr;%l$@t4A-{OCZHdctg80xfQF(R!2ik zwP{ofMTErf*@TsX6)`JW-ujl#)VRn<LS32NCM!gQ?Izmn|JL+xdm(B#Qr)1sq6p?vBt?Sj9zH6>s?n~fmY3tgYTBka z3HyW1M(T|)!B1^f##4%I{bde9thy8sd4^f0_4F|&4o^<7o5Uo;Y1AaWZdoc?6`G0* ziNmdgV*wQSRRON)XnY|~@#nu}wNU6C8Q!T!Cnx1FW8w39_e;@u8*2@Zr)fIcjzmPq z2x(uNTwez*o6lQgq-iy_FdM12&b_TeAnaB;+<$b6E}?d9&SE1Y+x0N{*U7==D)!*O zBqt67jvOR=f&@eyw&Is96Iflv1ghIfE^uRQtY5^n$5h7#x|GF6=}Ag3k6w&Ql&j5G z)SzVv?OZG=NQhR>`PQr;vq+|foS=*B^9?De9sT6UtYZ5H4#3RGmQI=deYydICB$4A%*-TaO{uco36zi)LUCbOtY z+j5I$&TLCAssSIiqZjR`YY>d~G`P9$SuDIdNWwL`|HBY3dvC@t+7r1U4`e1BDQti( zL~7LCT7HAI)AG1^N*+Zps=B?2U{n_#?5qBiPMYWr`JBiKYO!HY@z+Tr7Px# literal 0 HcmV?d00001 diff --git a/gprof/po/fr.po b/gprof/po/fr.po index d5f2553..a4eaae3 100644 --- a/gprof/po/fr.po +++ b/gprof/po/fr.po @@ -1,19 +1,25 @@ # Messages français pour gprof. -# Copyright © 2008 Free Software Foundation, Inc. -# Michel Robitaille , traducteur depuis/since 1996. +# Copyright © 1996, 2006, 2008, 2011 Free Software Foundation, Inc. +# This file is distributed under the same license as the binutils package. # +# Michel Robitaille , traducteur depuis/since 1996. +# Mohammed Adnène Trojette, 2006. +# François-Xavier Coudert , 2008. +# David Prévot , 2011. msgid "" msgstr "" -"Project-Id-Version: gprof 2.17.90\n" -"Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2007-05-15 16:49+0930\n" -"PO-Revision-Date: 2008-03-30 13:45+0000\n" -"Last-Translator: François-Xavier Coudert \n" +"Project-Id-Version: gprof 2.20.90\n" +"Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" +"POT-Creation-Date: 2010-11-05 11:34+0100\n" +"PO-Revision-Date: 2011-04-21 12:20-0400\n" +"Last-Translator: David Prévot \n" "Language-Team: French \n" +"Language: fr\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" "Plural-Forms: nplurals=2; plural=(n > 1);\n" +"X-Generator: Lokalize 1.0\n" #: alpha.c:102 mips.c:54 msgid "" @@ -22,33 +28,33 @@ msgstr "" #: alpha.c:107 mips.c:59 #, c-format msgid "[find_call] %s: 0x%lx to 0x%lx\n" -msgstr "[find_call] %s: 0x%lx to 0x%lx\n" +msgstr "[find_call] %s : 0x%lx to 0x%lx\n" #: alpha.c:129 #, c-format msgid "[find_call] 0x%lx: jsr%s \n" -msgstr "[find_call] 0x%lx: jsr%s \n" +msgstr "[find_call] 0x%lx : jsr%s \n" #: alpha.c:139 #, c-format msgid "[find_call] 0x%lx: bsr" -msgstr "[find_call] 0x%lx: bsr" +msgstr "[find_call] 0x%lx : bsr" -#: basic_blocks.c:128 call_graph.c:89 hist.c:105 +#: basic_blocks.c:128 call_graph.c:89 hist.c:107 #, c-format msgid "%s: %s: unexpected end of file\n" -msgstr "%s: %s: fin prématurée du fichier\n" +msgstr "%s : %s : fin prématurée du fichier\n" #: basic_blocks.c:196 #, c-format msgid "%s: warning: ignoring basic-block exec counts (use -l or --line)\n" -msgstr "%s: AVERTISSEMENT: a ignoré les compteurs d'exécution des blocs de base(utiliser -l ou --line)\n" +msgstr "%s : avertissement : décomptes des exécutions de blocs de base ignorés (utilisez -l ou --line)\n" #. FIXME: This only works if bfd_vma is unsigned long. #: basic_blocks.c:289 basic_blocks.c:299 #, c-format msgid "%s:%d: (%s:0x%lx) %lu executions\n" -msgstr "%s:%d: (%s:0x%lx) %lu exécutions\n" +msgstr "%s:%d : (%s:0x%lx) %lu exécutions\n" #: basic_blocks.c:290 basic_blocks.c:300 msgid "" @@ -66,9 +72,9 @@ msgid "" msgstr "" "\n" "\n" -"%d Lignes du haut:\n" +"%d premières lignes :\n" "\n" -" Ligne Compteur\n" +" Ligne Compte\n" "\n" #: basic_blocks.c:567 @@ -79,7 +85,7 @@ msgid "" "\n" msgstr "" "\n" -"Sommaire d'exécution:\n" +"Résumé de l'exécution :\n" "\n" #: basic_blocks.c:568 @@ -95,7 +101,7 @@ msgstr "%9ld Lignes exécutées\n" #: basic_blocks.c:571 #, c-format msgid "%9.2f Percent of the file executed\n" -msgstr "%9.2f Percent du fichier exécuté\n" +msgstr "%9.2f Pourcentage de traitement du fichier\n" #: basic_blocks.c:575 #, c-format @@ -104,55 +110,55 @@ msgid "" "%9lu Total number of line executions\n" msgstr "" "\n" -"%9lu Nombre total de lignes exécutées\n" +"%9lu Nombre total d'exécutions de lignes\n" #: basic_blocks.c:577 #, c-format msgid "%9.2f Average executions per line\n" -msgstr "%9.2f Exécutions moyennes par ligne\n" +msgstr "%9.2f Nombre moyen d'exécutions par ligne\n" #: call_graph.c:68 #, c-format msgid "[cg_tally] arc from %s to %s traversed %lu times\n" -msgstr "[cg_tally] arc à partir de %s à %s traversés %lu fois\n" +msgstr "[cg_tally] arc à partir de %s jusqu'à %s traversé %lu fois\n" -#: cg_print.c:73 +#: cg_print.c:74 #, c-format msgid "" "\t\t Call graph (explanation follows)\n" "\n" msgstr "" -"\t\t Appel de graphe (les explications suivent)\n" +"\t\t Graphe d'appel (les explications suivent)\n" "\n" -#: cg_print.c:75 +#: cg_print.c:76 #, c-format msgid "" "\t\t\tCall graph\n" "\n" msgstr "" -"\t\t\tAppel de graphe\n" +"\t\t\tGraphe d'appel\n" "\n" -#: cg_print.c:78 hist.c:466 +#: cg_print.c:79 hist.c:468 #, c-format msgid "" "\n" "granularity: each sample hit covers %ld byte(s)" msgstr "" "\n" -"granularité: chaque échantillonnage couvre %ld octet(s)" +"granularité : chaque échantillon recouvre %ld octet(s)" -#: cg_print.c:82 +#: cg_print.c:83 #, c-format msgid "" " for %.2f%% of %.2f seconds\n" "\n" msgstr "" -" pour %.2f%% of %.2f secondes\n" +" pour %.2f%% secondes sur %.2f\n" "\n" -#: cg_print.c:86 +#: cg_print.c:87 #, c-format msgid "" " no time propagated\n" @@ -161,64 +167,64 @@ msgstr "" " pas de propagation de temps\n" "\n" -#: cg_print.c:95 cg_print.c:98 cg_print.c:100 +#: cg_print.c:96 cg_print.c:99 cg_print.c:101 msgid "called" msgstr "appelé" -#: cg_print.c:95 cg_print.c:100 +#: cg_print.c:96 cg_print.c:101 msgid "total" msgstr "total" -#: cg_print.c:95 +#: cg_print.c:96 msgid "parents" msgstr "parents" -#: cg_print.c:97 cg_print.c:98 +#: cg_print.c:98 cg_print.c:99 msgid "index" msgstr "index" -#: cg_print.c:97 +#: cg_print.c:98 #, c-format msgid "%time" msgstr "%time" -#: cg_print.c:97 cg_print.c:98 +#: cg_print.c:98 cg_print.c:99 msgid "self" msgstr "auto" -#: cg_print.c:97 +#: cg_print.c:98 msgid "descendants" msgstr "descendants" -#: cg_print.c:98 hist.c:492 +#: cg_print.c:99 hist.c:494 msgid "name" msgstr "nom" -#: cg_print.c:100 +#: cg_print.c:101 msgid "children" msgstr "rejetons" -#: cg_print.c:105 +#: cg_print.c:106 #, c-format msgid "index %% time self children called name\n" -msgstr "index %% temp auto rejetons appelé nom\n" +msgstr "index %% temps auto rejetons appelé nom\n" -#: cg_print.c:128 +#: cg_print.c:129 #, c-format msgid " [%d]\n" msgstr " [%d]\n" -#: cg_print.c:354 +#: cg_print.c:355 #, c-format msgid "%6.6s %5.5s %7.7s %11.11s %7.7s %7.7s \n" msgstr "%6.6s %5.5s %7.7s %11.11s %7.7s %7.7s \n" -#: cg_print.c:355 +#: cg_print.c:356 #, c-format msgid "%6.6s %5.5s %7.7s %7.7s %7.7s %7.7s \n" msgstr "%6.6s %5.5s %7.7s %7.7s %7.7s %7.7s \n" -#: cg_print.c:589 +#: cg_print.c:590 #, c-format msgid "" "Index by function name\n" @@ -227,150 +233,150 @@ msgstr "" "Index par nom de fonction\n" "\n" -#: cg_print.c:646 cg_print.c:655 +#: cg_print.c:647 cg_print.c:656 #, c-format msgid "" msgstr "" -#: corefile.c:59 +#: corefile.c:60 #, c-format msgid "%s: unable to parse mapping file %s.\n" -msgstr "%s: incapable d'analyser le fichier de projection %s.\n" +msgstr "%s : impossible d'analyser le fichier de projection %s.\n" -#: corefile.c:72 +#: corefile.c:84 corefile.c:504 #, c-format msgid "%s: could not open %s.\n" -msgstr "%s: ne peut ouvrir %s.\n" +msgstr "%s : impossible d'ouvrir %s.\n" -#: corefile.c:166 +#: corefile.c:183 #, c-format msgid "%s: %s: not in executable format\n" -msgstr "%s: %s: n'est pas dans un format exécutable\n" +msgstr "%s : %s : n'est pas dans un format exécutable\n" -#: corefile.c:177 +#: corefile.c:194 #, c-format msgid "%s: can't find .text section in %s\n" -msgstr "%s: ne peut repérer la section .text dans %s\n" +msgstr "%s : impossible de repérer la section .text dans %s\n" -#: corefile.c:252 +#: corefile.c:269 #, c-format msgid "%s: ran out room for %lu bytes of text space\n" -msgstr "%s: espace épuisé pour %lu octets dans l'espace texte\n" +msgstr "%s : espace insuffisant pour %lu octets dans l'espace de texte\n" -#: corefile.c:266 +#: corefile.c:283 #, c-format msgid "%s: can't do -c\n" -msgstr "%s: ne peut appliquer l'option -c\n" +msgstr "%s : impossible d'appliquer l'option -c\n" -#: corefile.c:305 +#: corefile.c:322 #, c-format msgid "%s: -c not supported on architecture %s\n" -msgstr "%s: l'option -c n'est pas supporté l'architecture %s\n" +msgstr "%s : l'option -c n'est pas prise en charge par l'architecture %s\n" -#: corefile.c:470 +#: corefile.c:513 corefile.c:598 #, c-format msgid "%s: file `%s' has no symbols\n" -msgstr "%s: fichier « %s » n'a pas de symbole\n" +msgstr "%s : fichier « %s » n'a pas de symbole\n" -#: corefile.c:772 +#: corefile.c:859 #, c-format msgid "%s: somebody miscounted: ltab.len=%d instead of %ld\n" -msgstr "%s: mauvais décomptage: ltab.len=%d au lieu de %ld\n" +msgstr "%s: mauvais décompte : ltab.len=%d au lieu de %ld\n" -#: gmon_io.c:83 +#: gmon_io.c:84 #, c-format msgid "%s: address size has unexpected value of %u\n" -msgstr "%s: taille d'adresse a une valeur inattendue de %u\n" +msgstr "%s : valeur inattendue de la taille de l'adresse : %u\n" -#: gmon_io.c:320 gmon_io.c:416 +#: gmon_io.c:319 gmon_io.c:415 #, c-format msgid "%s: file too short to be a gmon file\n" -msgstr "%s: fichier trop court pour être un fichier gmon\n" +msgstr "%s : fichier trop petit pour être un fichier gmon\n" -#: gmon_io.c:330 gmon_io.c:459 +#: gmon_io.c:329 gmon_io.c:458 #, c-format msgid "%s: file `%s' has bad magic cookie\n" -msgstr "%s: fichier « %s » a un nombre magique erroné\n" +msgstr "%s : nombre magique du fichier « %s » erroné\n" -#: gmon_io.c:341 +#: gmon_io.c:340 #, c-format msgid "%s: file `%s' has unsupported version %d\n" -msgstr "%s: fichier « %s » est d'une version non supportée %d\n" +msgstr "%s : le fichier « %s » est à la version %d qui n'est pas prise en charge\n" -#: gmon_io.c:371 +#: gmon_io.c:370 #, c-format msgid "%s: %s: found bad tag %d (file corrupted?)\n" -msgstr "%s: %s: a repéré une étiquette erronée %d (fichier corrompu?)\n" +msgstr "%s : %s : étiquette %d erronée (fichier corrompu ?)\n" -#: gmon_io.c:438 +#: gmon_io.c:437 #, c-format msgid "%s: profiling rate incompatible with first gmon file\n" msgstr "%s: taux de profilage incompatible avec le premier fichier gmon\n" -#: gmon_io.c:489 +#: gmon_io.c:488 #, c-format msgid "%s: incompatible with first gmon file\n" -msgstr "%s: incompatible avec le premier fichier gmon\n" +msgstr "%s : incompatible avec le premier fichier gmon\n" -#: gmon_io.c:516 +#: gmon_io.c:518 #, c-format msgid "%s: file '%s' does not appear to be in gmon.out format\n" -msgstr "%s: fichier « %s » ne semble pas être dans le format gmon.out\n" +msgstr "%s : le fichier « %s » n'est apparemment pas au format gmon.out\n" -#: gmon_io.c:529 +#: gmon_io.c:531 #, c-format msgid "%s: unexpected EOF after reading %d/%d bins\n" -msgstr "%s: EOF inattendu après la lecture de %d/%d bins\n" +msgstr "%s : fin de fichier inattendue après la lecture de %d/%d bins\n" #: gmon_io.c:563 #, c-format msgid "time is in ticks, not seconds\n" -msgstr "temps est en tics et non pas en secondes\n" +msgstr "mesure du temps en sauts d'horloge et non en secondes\n" -#: gmon_io.c:569 gmon_io.c:746 +#: gmon_io.c:569 gmon_io.c:749 #, c-format msgid "%s: don't know how to deal with file format %d\n" -msgstr "%s: ne sait pas comment gérer le format %d du fichier\n" +msgstr "%s : impossible de gérer le format de fichier %d\n" -#: gmon_io.c:576 +#: gmon_io.c:579 #, c-format msgid "File `%s' (version %d) contains:\n" -msgstr "Fichier « %s » (version %d) contient:\n" +msgstr "Le fichier « %s » (version %d) contient :\n" -#: gmon_io.c:579 +#: gmon_io.c:582 #, c-format msgid "\t%d histogram record\n" msgstr "\t%d enregistrement de type histogramme\n" -#: gmon_io.c:580 +#: gmon_io.c:583 #, c-format msgid "\t%d histogram records\n" msgstr "\t%d enregistrements de type histogramme\n" -#: gmon_io.c:582 +#: gmon_io.c:585 #, c-format msgid "\t%d call-graph record\n" msgstr "\t%d enregistrement de type call-graph\n" -#: gmon_io.c:583 +#: gmon_io.c:586 #, c-format msgid "\t%d call-graph records\n" msgstr "\t%d enregistrements de type call-graph\n" -#: gmon_io.c:585 +#: gmon_io.c:588 #, c-format msgid "\t%d basic-block count record\n" -msgstr "\t%d enregistrement de décomptes de bloc de base\n" +msgstr "\t%d enregistrement de décomptes de blocs de base\n" -#: gmon_io.c:586 +#: gmon_io.c:589 #, c-format msgid "\t%d basic-block count records\n" -msgstr "\t%d enregistrements de décomptes de bloc de base\n" +msgstr "\t%d enregistrements de décomptes de blocs de base\n" -#: gprof.c:158 +#: gprof.c:159 #, c-format msgid "" -"Usage: %s [-[abcDhilLsTvwxyz]] [-[ACeEfFJnNOpPqQZ][name]] [-I dirs]\n" +"Usage: %s [-[abcDhilLsTvwxyz]] [-[ACeEfFJnNOpPqSQZ][name]] [-I dirs]\n" "\t[-d[num]] [-k from/to] [-m min-count] [-t table-length]\n" "\t[--[no-]annotated-source[=name]] [--[no-]exec-counts[=name]]\n" "\t[--[no-]flat-profile[=name]] [--[no-]graph[=name]]\n" @@ -381,10 +387,10 @@ msgid "" "\t[--no-static] [--print-path] [--separate-files]\n" "\t[--static-call-graph] [--sum] [--table-length=len] [--traditional]\n" "\t[--version] [--width=n] [--ignore-non-functions]\n" -"\t[--demangle[=STYLE]] [--no-demangle] [@FILE]\n" +"\t[--demangle[=STYLE]] [--no-demangle] [--external-symbol-table=name] [@FILE]\n" "\t[image-file] [profile-file...]\n" msgstr "" -"Usage: %s [-[abcDhilLsTvwxyz]] [-[ACeEfFJnNOpPqQZ][nom]] [-I répertoires]\n" +"Usage : %s [-[abcDhilLsTvwxyz]] [-[ACeEfFJnNOpPqSQZ][nom]] [-I répertoires]\n" "\t[-d[nombre]] [-k de/à] [-m minimum] [-t longueur-de-la-table]\n" "\t[--[no-]annotated-source[=nom]] [--[no-]exec-counts[=nom]]\n" "\t[--[no-]flat-profile[=nom]] [--[no-]graph[=nom]]\n" @@ -395,155 +401,155 @@ msgstr "" "\t[--no-static] [--print-path] [--separate-files]\n" "\t[--static-call-graph] [--sum] [--table-length=longueur] [--traditional]\n" "\t[--version] [--width=n] [--ignore-non-functions]\n" -"\t[--demangle[=STYLE]] [--no-demangle] [@FICHIER]\n" -"\t[fichier-image] [fichier-profile...]\n" +"\t[--demangle[=STYLE]] [--no-demangle] [--external-symbol-table=name] [@FICHIER]\n" +"\t[fichier-image] [fichier-profil...]\n" -#: gprof.c:174 +#: gprof.c:175 #, c-format msgid "Report bugs to %s\n" -msgstr "Rapporter toutes anomalies à %s\n" +msgstr "Signaler toutes anomalies à %s\n" -#: gprof.c:250 +#: gprof.c:251 #, c-format msgid "%s: debugging not supported; -d ignored\n" -msgstr "%s: mise au point n'est pas supportée; -d ignorée\n" +msgstr "%s : débogage non pris en charge ; -d ignorée\n" -#: gprof.c:330 +#: gprof.c:331 #, c-format msgid "%s: unknown file format %s\n" -msgstr "%s: format de fichier inconnu %s\n" +msgstr "%s : format de fichier %s inconnu\n" #. This output is intended to follow the GNU standards document. -#: gprof.c:414 +#: gprof.c:419 #, c-format msgid "GNU gprof %s\n" msgstr "GNU gprof %s\n" -#: gprof.c:415 +#: gprof.c:420 #, c-format msgid "Based on BSD gprof, copyright 1983 Regents of the University of California.\n" -msgstr "Basé à partir de BSD gprof, copyright 1983 Regents of the University of California.\n" +msgstr "Basé sur BSD gprof, copyright 1983 Regents de l'Université de Californie.\n" -#: gprof.c:416 +#: gprof.c:421 #, c-format msgid "This program is free software. This program has absolutely no warranty.\n" -msgstr "Ce logiciel est libre. AUCUNE garantie n'est donnée.\n" +msgstr "Ce logiciel est libre. AUCUNE garantie ne lui est apportée.\n" -#: gprof.c:457 +#: gprof.c:462 #, c-format msgid "%s: unknown demangling style `%s'\n" -msgstr "%s: style d'encodage par mutilation inconnu « %s »\n" +msgstr "%s : style d'encodage par mutilation inconnu « %s »\n" -#: gprof.c:477 +#: gprof.c:482 #, c-format msgid "%s: Only one of --function-ordering and --file-ordering may be specified.\n" -msgstr "%s: une seule des options --function-ordering et --file-ordering peut être spécifiée.\n" +msgstr "%s : seule l'une des options --function-ordering et --file-ordering peut être indiquée.\n" -#: gprof.c:527 +#: gprof.c:534 #, c-format msgid "%s: sorry, file format `prof' is not yet supported\n" -msgstr "%s: désolé, le format de fichier « prof » n'est pas encore supporté\n" +msgstr "%s : le format de fichier « prof » n'est pas encore pris en charge\n" -#: gprof.c:581 +#: gprof.c:588 #, c-format msgid "%s: gmon.out file is missing histogram\n" -msgstr "%s: le fichier gmon.out n'a pas d'histogramme\n" +msgstr "%s : le fichier gmon.out n'a pas d'histogramme\n" -#: gprof.c:588 +#: gprof.c:595 #, c-format msgid "%s: gmon.out file is missing call-graph data\n" -msgstr "%s: le fichier gmon.out n'a pas de données de type call-graph\n" +msgstr "%s : le fichier gmon.out n'a pas de données de type call-graph\n" -#: hist.c:133 +#: hist.c:135 #, c-format msgid "" "%s: dimension unit changed between histogram records\n" "%s: from '%s'\n" "%s: to '%s'\n" msgstr "" -"%s: l'unité de dimension a changé entre les enregistrements d'histogrammes\n" -"%s: de '%s'\n" -"%s: à '%s'\n" +"%s : l'unité de dimension a changé entre les enregistrements de type histogramme\n" +"%s : de « %s »\n" +"%s : à « %s »\n" -#: hist.c:143 +#: hist.c:145 #, c-format msgid "" "%s: dimension abbreviation changed between histogram records\n" "%s: from '%c'\n" "%s: to '%c'\n" msgstr "" -"%s: l'abréviation de dimension à changé entre les enregistrements d'histogrammes\n" -"%s: de '%c'\n" -"%s: à '%c'\n" +"%s : l'abréviation de dimension à changé entre les enregistrements de type histogrammes\n" +"%s : de « %c »\n" +"%s : à « %c »\n" -#: hist.c:157 +#: hist.c:159 #, c-format msgid "%s: different scales in histogram records" -msgstr "%s: différentes échelles entre enregistrements de l'histogramme" +msgstr "%s : différentes échelles entre enregistrements de type histogramme" -#: hist.c:194 +#: hist.c:196 #, c-format msgid "%s: overlapping histogram records\n" -msgstr "%s: recouvrement entre enregistrements de l'histogramme\n" +msgstr "%s : recouvrement entre enregistrements de type histogramme\n" -#: hist.c:228 +#: hist.c:230 #, c-format msgid "%s: %s: unexpected EOF after reading %u of %u samples\n" -msgstr "%s: %s: EOF inattendue après la lecture de %u de %u échantillons\n" +msgstr "%s : %s : fin de fichier inattendue après la lecture de %u échantillons sur %u\n" -#: hist.c:462 +#: hist.c:464 #, c-format msgid "%c%c/call" msgstr "%c%c/appel" -#: hist.c:470 +#: hist.c:472 #, c-format msgid "" " for %.2f%% of %.2f %s\n" "\n" msgstr "" -" pour %.2f%% of %.2f %s\n" +" pour %.2f%% sur %.2f %s\n" "\n" -#: hist.c:476 +#: hist.c:478 #, c-format msgid "" "\n" "Each sample counts as %g %s.\n" msgstr "" "\n" -"Chaque échantillon dénombre %g %s.\n" +"Chaque échantillon compte pour %g %s.\n" -#: hist.c:481 +#: hist.c:483 #, c-format msgid "" " no time accumulated\n" "\n" msgstr "" -" pas d'accumulation de temps\n" +" pas de temps accumulé\n" "\n" -#: hist.c:488 +#: hist.c:490 msgid "cumulative" msgstr "cumulatif" -#: hist.c:488 +#: hist.c:490 msgid "self " msgstr "auto " -#: hist.c:488 +#: hist.c:490 msgid "total " msgstr "total " -#: hist.c:491 +#: hist.c:493 msgid "time" msgstr "temps" -#: hist.c:491 +#: hist.c:493 msgid "calls" msgstr "appels" -#: hist.c:580 +#: hist.c:582 #, c-format msgid "" "\n" @@ -554,37 +560,37 @@ msgstr "" "\n" "\n" "\n" -"profile plat:\n" +"profil plat :\n" -#: hist.c:586 +#: hist.c:588 #, c-format msgid "Flat profile:\n" -msgstr "Profile plat:\n" +msgstr "Profil plat :\n" -#: hist.c:705 +#: hist.c:709 #, c-format msgid "%s: found a symbol that covers several histogram records" -msgstr "%s: symbol couvrant plusieurs enregistrements de l'histogramme" +msgstr "%s : symbole couvrant plusieurs enregistrements de type histogramme" #: mips.c:71 #, c-format msgid "[find_call] 0x%lx: jal" -msgstr "[find_call] 0x%lx: jal" +msgstr "[find_call] 0x%lx : jal" -#: mips.c:96 +#: mips.c:99 #, c-format msgid "[find_call] 0x%lx: jalr\n" -msgstr "[find_call] 0x%lx: jalr\n" +msgstr "[find_call] 0x%lx : jalr\n" #: source.c:162 #, c-format msgid "%s: could not locate `%s'\n" -msgstr "%s: n'a pu localiser « %s »\n" +msgstr "%s : « %s » non localisé\n" #: source.c:237 #, c-format msgid "*** File %s:\n" -msgstr "*** Fichier %s:\n" +msgstr "*** Fichier %s :\n" #: utils.c:99 #, c-format @@ -592,7 +598,7 @@ msgid " " msgstr " " #~ msgid "%s: `%s' is incompatible with first gmon file\n" -#~ msgstr "%s: « %s » est incompatible avec le premier fichier gmon\n" +#~ msgstr "%s : « %s » est incompatible avec le premier fichier gmon\n" #~ msgid "%s: bfd_vma has unexpected size of %ld bytes\n" #~ msgstr "%s: bfd_vma a une taille inattendue de %ld octetst\n" diff --git a/gprof/po/ga.gmo b/gprof/po/ga.gmo new file mode 100644 index 0000000000000000000000000000000000000000..5942da356dcdb031837de4940a4e7be4617187bb GIT binary patch literal 10440 zcmd6sZHyh)S;wbIL*fewX`qypmY%fSde`x+cb)oeW4o~(+u6i#jW;RD#yE3l=H8ij z?#%7X+}K+XRE&yeiLkichZT_2i5L8 zNY~yA;DcZdJ^+3RRQtaHKLY+YC^_%{A+-G9H@4eK-q5{A-vnj1zi#kfK&p7x8@%s+ zC;yHHkAarApzK(Jvdiy)>gP2OReIk5#e?sF(#r=S85HxDLG^zU)H=BcBC_{$Ab;Mk zaXSEh8Qcf{8z?yqMi!q>g5ui%R6oBC%8q{m?ghUBiWejBD0nY}==nS-d0zx0@Qa{$ zb~{4z(^~@7{~1s`xZL1xgUdYs1*rM_7kCCVC|NuxK-uS2@L_NSE`sw+TKzu@>if%} z`23fk`ui>@zV9^n6tDy8`zxUI`M2P4@ZUkz+l^4Wzy#FuZ-EbjUjq+=*Fm*Az+^Sw zi`>qGp9fKe_m80X^&cQh%=;cFp52Wy^?X05=XvlPxChjDzXXc+Ujgq1{|?kRUkB;J z`yQzJ2B-B;w|U-YK+WR`l+6^q&w;YPg0(toTQ8|mX+n{4sd_-@@GIpS#6#Li_PzQz_ZP7OznM=@_xz_6#0!Gr942< z#gazh+qNAGvdr|#V34$0JR4n`@623$Wsn7VP^U$1x z!eW@$ri{a)jNbZd)UZ>T5WmVR8P{XE~wt0seR*HDz{p#ZWh#LP!`=Zi*z*7WjXT+&5` zR@duzuA2AE!Eilf00gJ=z+6s>EIw@3+R=s9)W^dfW+_d3VRyIPmbm(bAPjl44;2>5 zBl|TkOr7>)6NKTgk7RWmsnPf~3LFHz=52fL!d}GNv#^KzzJ-0)9N<^tRj=pcT?$HT!u01WAb$p8=1Ya z7c-(3N;SqACFt-?tt*q})J`i~eNs!TsHPi-?QoYk>9wn6w7QH=hqmb)A8oJez0yjv8j+b?WS=A-6c~HMP*!7rb<5>n*_Q}3HV}=4ec21p{pDQ z`S#jGh4I7b7u}Tc7V7v4vLmVd4Z0f(i+{n4ni%c|Qkv)66~_tEuO^=6|r9ON}>gwP8q+LI=>huLEb~t zow&XnBf^%(Ey>v}i@w?34!7HTc6zw{Lh260fTDfY$?y?&7|6vJ9hWkO-w?s>J7(X}Z0 zK`#w4NpUG{_&8e!?^3PzJ4M!zaQ5pk-=wV^qBK1tV_ncbf!B>-ft72D{cd>%%^<9B zwt~jFRs)2b4Argo$#r~{|4Th^YK-qlOq9iTqBZ{<5lX zlv>_DL*p86(nGV;HHvcknJSc`|2yoMJ;%ssWdZl>KEW2J9j3D0(k`|^5H_Z&ihkTF zqIJ#PZs>8eY_dA&EM#$h2w#`xRgH79ZYgWHQ{nm6ch1o2c?r8+N)(gU<0)_C)H2Mi zH-ub+psZq8G;PUI%eG1`Sd9V8leDZ1wnz0YFA#rI5AucLL*bGC{dWxN8K z=9hyqr_HkS3~D_c-N=K>&*XJw=7tFDXNFDJ_qCNchu=n3b1cNgEA8ycJUjVtCT3`B ztMzv5*kMkHUsP;)lMVi`cM#{75+t@+U!F`a#R$@=15b)m+6*q-~=xO&91 zh?_o)@70NI=&$94e<8>rv%(?2Dux6cYlkL-xC$bP>!%uj)3ENNVp89&;jJxg7`(NO zDB}h}E?@Doja($9-zn3$Yk%2oZtYNpcgrp~dB@h7?Ax}YXutW!ism?1loE_MYZlt5ZLTvw5K`F3D#kIOY&%vntgG#B`eRoUn@Z$qtD%hCy)22O6iNh{8?+(4{dhTzn6s$@xel40HMFLn=%QwP0s1c+>s-{p{+Ru4UoD$XRn9bP zUcV4zw|Gqwc6yj`{i;N?iCenp+)~SvEOBI^^6X0jC$Bj`;C8$yt_a2>mTu)Ce0;^- z4TlqZ+8`9K;*8jS+*r}S>s7y;L-Dk)ESuK3v#b6w zLU9`uKMEI@&F;m;eg5Jee`$|d+PnOT0}n19cxaJ|{*#1)3Re8-di$wrmi8|{w3{D` zi>*^ZRr{+rwF+NQl*{G`TIJ?E@o*k<2tRm<@ROg9^!h=XEf6>yrcK@(id3s{&|fwy zWm+ZXU@wT%jF&wQlxaS^@<_(%xLR<2iG|sV7xK71+&aB-`uOIomlhUV$8hxM)L&g6 zFdqfmyIAOH{;*S#CGt4^)k-f_eytA*pX6Up# z+v-;D6 z8!617T8-5)><_AVZJ|W>!5G5wiQK&z84firuOfvK7CMkfo%pEXQ&GcO-52o5RiGkDcMxMzM zXku&vt1a1(n6RmK>?(16gry?RZs@*`{3Kjxk-*VJ6>SRPl&ptZ`9LHSOsZCKaYG$x z$F}FaG6y_6H$ z^)P|pb&+y-u}aw5%%%~pZDuHX(;14*?pX37={xGF$xYav#;33x9tS8eEo3zkx*R?* z;F!}muE1m)khF?7(#+|Uy*@0geRENX6)?os&3dtUi|J)CKAgL@-89IVdL(T?Q8ESv zNs$Z=D8*%ZO)s+K*nliF9A^iUjih|`Iy~JiYU7P@d0G@VEQ~GnS^bR_X+!;H;PP6J zl~S@u#ypqf9=jpU#fdd>8)MmQgFwy_!ong>MO%$(xnLL0$ZT$mnpLU;7F)8pHZz!V zJZ``Vqbvj8wz?%O-V7&Jq_ERkDvL3l=E`b|X2x-2Gy-=?>10EE8P*M^sk~_sIw?1> zUb8vN4Ok7n^RYxcY@fyKU)5lvvN{WTiB*Dv?vCA2aTztzhK(oNkZZ$Z_D6DPCHwDe zLWC_=>w(ODGouaDDX)=rDf@(_BW0kbR{EIbO@^d1wU=+(>_`u%qJ0gDUY)qQs@4L` zkw3+gc45@4%eryn?IbS7BRx2Go#~KV=D#f0-Y$uvT^P;Ukbf@d&)XczF}G9Vxs^rP zjA#z_gOFV@8rkiLEXqWD@+c&oENhU|rcn$D6;dhJ(t)$=yUnE##HBOt!^}0FpdHQI zs8(X+EM_(%1UyCZ+J%aqJWD``sWq5wK>WBM_i_dbbb@k&tdCp)re&nY(T$gE zZ&JVI{j==#?lLeEyve{g!t!6lJg}$mXpLPhNy{b|b8T0zNyLnbs;`Yz$8!?RK~!&a zGS}u-Ihe^XH_5@cZ@0?9+|aVg!Q9wJygOuHD#`G+IheGA>-fK>VW#!i01U@>(I7=0L^2wfy7&KGKg2@E@Wc0)V^{w z*W`iOG`MSr(5fTep3avjdbBwcRkJ^4zc=}m?{8WLH+ON<&9yx3?ChQvS!G^74N1{( z2niFf!YL{4@rW$tUdE`54AB=CVR3HAf`;xW%f0DO&!SYz)7|6DK~QP;XishIjhsx- g_t@nXil#Qm$ER5RxeYKSZnuZWQOk2D;s%WOzsm`ea{vGU literal 0 HcmV?d00001 diff --git a/gprof/po/id.gmo b/gprof/po/id.gmo new file mode 100644 index 0000000000000000000000000000000000000000..e9c42932312ff0493b72b160e5b18c01c2bf5851 GIT binary patch literal 10448 zcmeI1U94TlRmXSSw22SogAhpDG%!tjYdi5izSn7D=f-yYk?Y!t9lQ2TLV9zF=bXLo zIooHSy$|~%_Q?YvwFpHj4^%>}RH-UoC8!SwQ6YgqMCGF(6od*=#0wHsRiCQx@c_I4 zzyHiWU%oeKQ>b`h+q3^?&#akQv(}n5Yu5eyyKerafTu(G0A>HXg5ZL(@JGSdzF@gC7R}5nKXqVGv;ms^4Xh zp@Xa7gJ1=I5d0#j{$B-u9Q+SZe7^4ogWyT)-+KzT1P~5O^NcI6nt!eZL8+-`7C#{m-D*cMnPk!Hb~e_|xD= zz%POKgRg@RgZ~7I?jtbyQE(l62z&+9cz+1)2fqQT-<>GuUhpCC1b6|IJbn>;H~2ds zEC;^_BGTY%AYFs6gOcMnz;ocYLG@d`3tfRPfa*5@rN1%A|KKyc&Vs)Verp$U16TNd z17%9?yHS$#w6DSAp!z=tJ^+qDndav~@%JkrrWU*kiof3mQC;u{P5YmNTK`{xH-o!S z(kR#KeNngW4ajf|A#tHs9X_wI6n& zOzHi-;6d;_D82tIDEcpfvgFZVoT?X#~Wmjjw$H5#Ff4>FFF8>z10RAVq z3OQ1ic^P8#Pt zNL5gSTIXj$rVhRZ${ub(8M5o!K-t;7p!B&1yaPN8s^1xqr3aq_MgO}E{t0OK{yK=t zgMS6JA8uo@|Go=52Or`4BFxYf{5&Xo_;Q0^1*NyY1GOLi1>6nZhf;-mz?;F9=KB%w z7QT;zvhy>bl$j!_O# zv_8qgQXZqo&W=#@$QEQ@@|Cwza9d7~veic^lSj6qM|(kX(8CrB)+o~V4^vK1&QZ=% zu24{4@CizXBHhZa^lW-?@8_D|lD!_(7raQ(Uf1&zl&9UVAozHLvY!uA?x)BmWdC|( z$MSj7m!7*QM=6&m&r?1|nLN^=>{B*#xT!o38jAMgua8oj*(%91vz4c5ey!Xm%B9G3Y?*Y! zPMUWIrkmGUWs10)7t!0dmcF^myrG+Sq1U$RhP3&w^U9_stB0MqF!`2AMHyd@yS0R% zDb{SaZ%R8HrLkXlX>4hhdSxQh3d`vP;MJMJ<8j5D}3*ZO%HA2S~CBxX*Znqx7Srtd>G^s{_Bin0gmmX<90(%d)ALf0ieTetUN_%Bx`sL~* z&m-k1&nlb6d0ifB1v_-~-RIsrb$e8+Fy;hevAucmn-N-(N*KE#x)>MT80%y4RX;XT zd!sK_1QkLx#w*2kXjAXfBpK96>By&4vWjxPb9bqGKsFgHm8(c~6`9tVOg}P}Md6Xz z>*mAmi+Y3zAK%Ad4Q-ZJn#S9Xn;KOOZ8f8)Gxk^9rJq^5aN5|diq#ddjgpMPYp2h; zF*Pi2GVolt7;ad&nDFgk7Zp~ftVg4~(7Z~jK z4%xtQq3JCnQ_sM&x}hDLPHakePPURb!raA^jiMqhOH(E<$EJ_D&N29sO=~yDQtgSm zHrrE~C^unuzG5q3zIGK~hj%!Yzd?2rX7MkmQ47P}V3g*{QpvSKlh2y+QLG*fQ&HTh zdp)gWK^~8pFfvIm%L`{63=kz-TX7)^Dp9pJjcuOAO%<_UvQn(sPN#@pO1xj}_HEWf z(w(@v7Q@1}&Mon|RpdjnXQ{i#eO0;teZ#nQCU5Xg#zPDm-HkU9Nt8>(gDk&h`V`ut z7@u}6srr6VJA-;BV25)vzgh-AxhEy(RTj^`0)ty7_Q~mB{Zj;xEeT zMy}=kQzWkWrXw^bT_Y%eo{6B4`G1!KbLJQ+t;n%GcTRA`>4Yhrw{)9rWV?;3%6u4i z@@TBJy8}IrR!v&jPCJdWqxiZcD=VCnb4zJsJ0+fPynn&0u87$^5~3_=9M5?pFP1uU z-Voy&*`kcG8ozdD4bu%g=R|gJj?n=a>cG)tNSS+vp%2-NxcHtat1(iSc`lN;StdK6 z>3+=?8GTm0XHf6?=tdq~ekQ9*v$uxfFf|;yVW^|TJNzX?wU>>!e0?dszK@fD_u-GiI_(eCl+pv3Q`)eQLabzP(m^!@} zJbmoxXZ)nF+zQTSQG6ZyF_Y86WOf)6HC&2y*ccpcshug>bqrZimbOmqHQz4xVLN4>)>X`@gqMH{Hc z*COK#G5KEAcOAoxEDtwrhBYf53d_7E;@CJkox~H!O8hwGq)pTMMg^sz-^AN{x;S`y zAK8qb1inHA%r0~hmtm(!;w|^fopT#UQ`}p+>G_?gXL@iuLfQSS#L1~xQpFg+e><7AVQtyVsk;Vm+g#K{z%uHl+{PbD+A@79K(XWV3 zjV-tZw%cuj`i*YyMXny{cvAtJj~6g{x1UT^Sn-Z4kZX};u*WtOG`%Q+Y_dI8jdMQg z;C?K&yQ)>wDT{?}P4!iqzC|@j+WBcF^ko5SQ@8b^cU!GMyu^`%GH{gyRzY*Yz%2z) zToSBDZ0$0D`S`kj8!j*IHbSUg#woG?q_b`ZepLPP4kysg3$PHmy+HKtWlZ4QtQ!cI zqYyvo4$A#L0&K26L8S|xf1BW9kzd8{hG(PjSs!t%HV*G#``~iRJGStA*-N7EBZJx=bLt99M}Qxx+i}bIf^3uzfn*+ml&7;u4}CI3cbzoo`4; zSX>9{n;Q&ickM`nEMz3gWRTX}`J?G1gSfO+ZL?WoVoF11f`F+WOmY(u{Lg16-l8#r zk%1BsRT9|&S4&bKc2ME-;$lz_M|JwYn5Fn0G8F34BpxoI+EDtPYQ<$IoT6q_q$f%) zg*qQm(oBC%Vq#vcoMCZlBAb%ua`Z`tq8A7kMo@NQkCq~3x z_cNE;BwL;82Qh9qilyu(|DkSm2c+Fs2iR9WDe)Jj}L#6^W> z|9)gw2$c58R}$(I0dmtoVUu`pdt!yN0NN=-Tyd=OEIneqR&dUeU=g1RxHxa!FC(ch zWo3EcDUMQP+0sZuQ?G<5Ib}y81uKxp)TU0K)&zxwtN&X%QV^E;TagkIqOBom&f?-AZYo3Dq2+nsjaHO2NWt*6)#`- z{m;2GJF|A028l1IS9|V%?s_6Y}=3k9?x|H`)_Pi;IJ_a8C0bV?hzcq?} z7(5N`2A>7*20sS=IQU!OkAj~E?*hLJz7u@4t$)joDEbk;-wW;pm%&}&GoZ%*45gWo1KUjnB2Y(aP_`d+(2mU80I^X@aD0%`s4((CzXN{^d==FGJ3kc0 z-2?9C`$_P_U;~~5zXWM$jk_J;ya#*$JO-Wv#gCW3w}5{F zLUQz{AS{hu1{oUt11LUz13Ux%8>n$>cOWb9IZ)$ooW~;LEqdH*l5j z&mv6m{a-=JX$LQ%;id5h!27`Spj7ikQ1tyAh^j@u0E)hsKtvb)M%(^-p!WYq;G4m( zgSUaNwBN6Sn(y1~_kV-ZO9@l+zYkRV5;(jC-huDn`;!nQKK~&o{(ZH@?||>-`wm{h zJ-qG&Pqnzw;uu_}{^Owd_8Cxm@Q)yW(SPw;0q;b)#Fvwx`07B}M-7V3mq7LZGzjU@ z-+~W;Ujz4ncSD@yeje03FM!goUjx}n^m$P8eg%|XyaGz^?_`l9;1N)I@*=2lp8}r( z{|40jccHY>+b4MK1qYz$`Xoq~=(C{s^d(Swdn=9S!TUhj)r;U7_}AbO@D_*^9S?(| zI|IdsPqg@#p!$6ql-}$!VcrD1pYLA+nJW4msD57tWf$*+$p^tFLFvQKgIecvp!V@i zQ2Txto0S}nflq=C)c*gNm-OLFp!E8yE&dCL3P;}oF@b0YgFghm2c#+*fvW!%P~(0Z zgvHUPLFvU8zzg8lz%Sg2&EmYY-&ISP;xvAYW$TJKMLN$_cIj9PtQgG z|JGa=DWYAEbU^#o^QHh^pW2_%S$;@_E>?Q4D3BGJT|bdgK$%`Cq{<9_BZ$ z+1rHthIIG+6g_wAwPVMQ6E@3CzqI2)r^C0=vsGtyxohLh=C)3Y+-w$ER$Q%itLIW; zy0%JtaW^Y^L(?moyf&rl6=m|>TdUCAW8K)VyD;j8>bCnJt?GjAqlMnvYw6tSbT%_v zn{ioerkPt)&3Z95(0eA$UA5Nf_&w^w|1c*+I$P>29m*Q2){EL^CT~VvSDIqeWa{az zxn3hCXo-`yH!zhQjWZWEUKv}NrM_9JmeoA%Yc4jUku4{z8Fe5&Z!%k^^<>Ssxfup& z%`7jtk|{E{I;q{RYIkG~_a;3SfN&!snd}&w%2P$P*%G{gQnFmaBTZ+?b80`{gC(I@`Jn&EFa*#y1Kl& zI{Wf<;^*ONT;#RQUC~rWJJC%BhT(JXn+-dpT^Mr=w%GnW`^^}sNF>bNb~^9MoKZ(4a;bh| zYKy=Vv&*lC-j~f77CyY2$=beoQEQo?JAP?IHL~?qk0!^yT#s?)Buo zr6zRl*?ebhlETEj`HIby^_FXQ4cehp{s!JniN(JlMr{mtgHoEyOBL4&Exy%MjGacb zL?y1<^!wV$0zV!yabnVbUX)%tm>@|vH(e~@=B!HZntzVq`@!t z1~%`*>8`7|gw{MKe-ldw1x<%G1;bLo(Z>g;uqBy-kV_h(QfL^zRSx?uT_6PH{ z?IKt>M?vdcD<@}?-6$O|g020@ec%^HX;n#i=1!!<);2KgHG9uQANr+vuNaNd68W8$ z{bf~er&``WgX3CnHbZ;TwTueqnL3nG|L<{P&Kx75l?A%z&k2q=oiLU6mfqOLw%3ZP zDn_nbBopo3ALuSwGg)oB%bClM;Oo-7s&P)ApyX!Lw^BM&Y=lh>8m)j)8Z84lez)=?51{t~R(g(0q7TgtBO<|JG^B5B$J*BQN4hHb4!yb}7(1mCo$k_8q16TQ#1vpmRkziSbc` zBc4^7JxME~{z=^AD0?!C4FVrSND%C2i#$Jjns0iZ#sim){i34S|CllPNFIoUrxpB6 zd%k&0$N__(!hco{#{jeaTJ5r-cf93~Lr-KXlINucGxAVb5=kkPuvu8NReIleHBH!a z=osRGI4Ay@GOt~=^(P4J;`*~^PI~>JUp%d6sz*+prU8bgoPL31YFlCZ9V{;|6SQyi z`p>e7lhOkJ)+qQ{0d6cjzL9bZEI*Nk^A8sL8{w)?6z)2+&d zVQuvlo4rOgN!a;irv0lD(q?Yy`QVm1k!W#=hbr=w1Wr+VfxzuViK__46HK>?Al_XI zZ^Pxp-!=%vE0+=5PX{ad53}l5a43;XD?$b2)*|)yFJmI_M*T#%6ov3XK5ng+> ziE3To!rMgW%i;=tH9noh&xD9#t#xSomRAofA6n@I-xZ&&`e_m$$AiV|#hU4yKeryA zAQbmO@uTSCn%TFqav)xLFkXGotnOd?;Gz3h4n43!$M^!Fpn{cn*6(1vvM*lQZ&p^< z9yoaa%E6VD&KX1_V{+f~76z4z<ydcV!J5`sp;e5UQol zPx@`ZhiP`mx|9ecv;Q$g3h`jps{Jjc3KIl-6tA??788%LEB^! zjFj+O{nI?%)^mOaWgBM36UpPNDACYuN^w77!7K0&mDuIyD~rkw=W`C-2F^}b^j9@A zPYa8;vnr&n)5H!nB?dTzi7w;Z*L(eJ!5d=OmIh$Hwu`ILRt>knyt%I=}BMzd_meRmJpR`C)+qJ0-$8)a2zAd-&vg@v6S6;`0f1J54 z-*4>XwctEz5%L!r)O7JeoYFF$ZKHfX!3%zttr)twY=zHJyz!~pM1`MfdL;|HtnGkX zsT>_gp=~`4ME6m8cB#a(at=Y=X88b_lh0X%NrrehZu|6>FT)|T+hBKL@btaSBG<5C z5gt~6C9Uy?bO;7gZsOW zm?>DGD{w_IyDT+9aFUtiqvhm7YYZ~<-KJ|&Mb6G79fal~Qp*@X&wjZV(LS7Mn;qaQ%7hRII@<@_*6NA znzgx)uFIN{$+X;5?qN(IF=@R`-XC!0w1SqQ)(U!N4&i(8(cAJMeTzGlBN;Xoy6jcF zT{9gr{h-kSgyWr(Eivg9()yc)K1j_66yiwhd!~WeT*E}C zkT4PjKYQr05c~nBkD~^H~n{_dgcf+YHG6aUvy2+rySLM|91}P;RYw-6#fStM?2X7 literal 0 HcmV?d00001 diff --git a/gprof/po/nl.gmo b/gprof/po/nl.gmo new file mode 100644 index 0000000000000000000000000000000000000000..32cf7dec33edbdde8b48de867836c9d4edfafd7b GIT binary patch literal 10712 zcmd^^ZHyh)S;wboLh1`NCA1`^Ej=-8yiPpV-lTc)`Xzo_Cr<6yjW-VI#>8{)oO|zh z=gwT_W!GzoB2?;_<$-o_kvm z+y|Zm_k*v1?*l&yeh>Id;CF$41U>+M349m$wWj=@JwfmtyuTOR2X?_l@CvB*KMbn= zFMx-@-vuSdKY-r~-qi_$2f??48h0P4@m4^!dlh^dEWjthPlMkF{yn$=-b*LK5LCO% zAYBL7!AHRgd=K*{}Ypyu}gMhL-6p!E0= z@L}-Rz`fw-!6(3f1y%21g!}-w3O)}01gQQ#2Oa>w465BbFwT3x$H9}}MNsis@Y{k^k!e-9|XG@$x_run`C{`6azE2#PZEkem|{{qTi?|-+q-$9Tn z!39uqTTp)b5fBlAPk^W@_%wJJ{2VBIejSt@-j6e>-4XC9a21qZe-gySg5L!B3qH$_ z0lx^U->*0Lb~=$CEP$H#8h8-=DezJ74?+3YS3!mh-i7ee*Fo?ocm&k?xdEO9KLyHf zz5>dhIymWvz-Pe6z>kBP&!2*t#}`5M`(L2u@gT}ny(O><#^B4~&w?+3Uj>hVCo%qE z@P|P8!)HK^`%mC0@IHfYfiHrp_d0kCd;^qU+=G%1frmh?+X!3%KL$PxegQlI?!oER z?s-u1{5W_9{0yjhe*-k&Lm2nN;3-gc{uDp*hd%~o|2IJC?QcNY_bZ_M??1sy;5~F^ zz$>8E!zQTp@M9pV4?Y2Y5d1Ch1o#c`-|s>;CM~-^&Lj{ySO;a_*Bks5PRjfQ?79?_G;dvR_2B%ld2}HEWctBr?lascxG}%;`%~a^ z+`69k;QZ%Ro~4f`xsP*8ck3W!3 zdeg-cb3P^ee<$}zZpFTH+}F4s5KzJ*LBr{`<3tOlJ0eB&Ai4fpV#&M+%LE% zzs~e1zrj6RyvDuUx&&Mtm#t(MU4&BS+b@Eza6il4UMw@Wk3RxxJ?Of?ZMavt+v`yC zAfLI|JTHRJaLdo-vk!2;llviVT`YAJzGu(rC{4|>hj*iEyUZ-w8)tNFwr@A)LN<#MOv=BO9)#tXZxm=IOQL)9CK?mWp zI*p2?+FCYtriW2d(aVM{=psd{Ta{fb_Xp-^f2+>`2u|mb*&OAmJ#N+(;;WsRkH-Vd zQkaGAV}peSiK{0BVaVM+lvpT>-PbHPRWi0F>i6q0l2tZVqqZ0YPNHE`y6|N8NyK}i z`vkvFb)VvQX{o!kG<|br(&y1~l4n(v*}N`~cY<9S`sOpgyEQwkSr~H?wM4^N^_vM+ zkxA&gsdUK}eT(-o`D$d1%--0G8Bq(R8sm);_4uaNrAabsC#9=CttGE0XB+ny`UmBc z!9ux=R+rIfoyqlMQ$-j&Hj8dN{Jy9ssPLKnbk@|(@=C*a-*H1@s&Q0p*Qhhrm+jNe ztXw>6qCv&%3LC{qM(4G&XWh6Op4WCf)660b6PFPFd)UW>l_~4VBrnu43pXnIcp2l= z1rF78bTLb}_-NHU3v}JnMl*pV65*y?0k|~Pg!j`2e zlbhCzaMu|DH=?w5V=UCZazD!URVL0&*q<#JB#hUs>l;)aS@ zFIg$kqF%4C8;OsL{ZW(+(R9yNn-&pvH10^wL6MKmzJ>li_g3Zp`Idg`Owr&@`a=!s z-SyY1B+jMc^(@~sBW}LMmYBAgR3pDUydUDeUWLwu_n}eD!u+MLXfm-;p{CdyLk!1x z*3IimL1pT~uH7}YlhL&(#?dh8W0HJ5Y5Z}%4$-CD8u#+Fal-kpb++xc3W(D5oQzdY z`w@QK2o^cHX1w1o&!`!M70y=B1lQ6kn4~+c<4mwUKZOtC!Z;~QInT_F6h~F$6?WU& zQ`7r;N!HKD6TC!mr%``VR<}y6=%1o-jW_L~+36ZZ`Ta~43c3IPvSaofBcl~LzUTG{ zwm9uDrHhtsu}z|WW2!PA+g=`TY3^=AxAC$`tEksaZFY=Umt3-Fd@w0nY@HU4mnL5P^C~)OIO%&v5iH zi;)mNG-b7g*5#h_Rop1;3TT>dMny)OWgi*TdN#XJ1XrBNs?sdh2ppz{O*ag+mH2?a zfT|W*h=*=0q&N1nlh<=O!-BTj;E_ijF=yppRO|%P4gPp=l;D?;J!$PHX-q+#x%nIq zPDP~;;-@a3F+*wg0HRE`iexyd%+lefA2%=BA<@g5lnwBuEOCpcBD@cj%q2`VOCsW; z8{93}#qIUApZ?ggQ6)m1oll;gec>fPC?a=)b6IR};6J9_Eld`TEm^~hR-26>;FemM zs=JCKD+_Z;oA%klvT@{t3RT-KY1Zs_g^#FL=4oA7b|s<&wQ$~Q3!z^sNddI`nze8( z>h;f{qVwhI#^#N!n^&)@@Z@Q`GC2Eu_QJ)tnl!ks0?`-Mv;GJ#cGky@{3Y9Rs)J0N;y&|y#_vH4uwPPvaExqdHZOt>? zxLrm0{dS2H%{yIQY=s1=(J`kg^&TfBY5!JOXLx%&O%A*seNNyP(6)H4_aqxQorWWu zPTZi9*gZ^@d@S=qqSF$6CVlsLLe7DLkixx|mdJpz-B``AzIM1BkbO;TDv@WchB7i= zSddC7mxxk7Xyf(n<7N^wXJ64L1Yt%3)GDtTwFxK~?egj?=U1HnP%muDT~`EBTQErI zH#aX#tD6&N&(RKjC+v=XMl@=C!A-E+?UK~5^@p!<^hmd^Dq-{a0#5JNlc|bGvJ(mv zTI3n5u{9-4uSp?SSsu&A1s^qV5A)w$(X#24#ay$d_apY`x~g zRws}wHg-@3u8_nkXbu>Jr69H?$$HGvE(3(OH~g>R@ZwG*r0S(j$^F~LIvx04_2dIi zpp_TkAqsne>boCf0vBdoM}!=u_(^}gJm53H=I9etI^g+V6I?3t>%`sgTpV8U8OL%H z@E+?f9qt}J)bX(`yig94I6Os!3s-aWSPw&XAI^knd19E=-MkofE?ry=Pm{j8MEVTw zyKEjibm(xXzo*R72bPx(J$i@|DuyqTJ}SWp=j$yk(Pa6FC13A+R94|Cfv_ZeG_JDJ( zc9u5{ZcWmBH@B8j89HJkjn+LKVbgg!;(BJYZ9d|9<{aFdWNnb9u3PNOJco88w~#9I zHA7HPA@cRoq8`lcjZ94 zgzhr67~VP(V{swgk8U?0hUj;Zz&R^T!)(m)8VS-eelx#b#6i)e1GCgdo?)a-c&@38 zrB%Qug1i1xdy~V_ji^0a0>NpRoEI+Jr=K0}09vmw3B(IM*`jIZh3?dI&iZ}-5A zy)NKGrt*0@gl=|MmZL?OEVER!aZ^HcHi(2BU3TM9rjg-y1Ugr}nS2-x);SC)0^>^b zflt$=sp_(%`Hr@ZzK~U?+(;&ea&L3}vie6h;S_p@y*3O<(`$PggsEvaZXjKt#!;^vr-*pf;c@nhFbtmdT zhfK#%{Ff(hgk4%V5Am7io77UUlm!#H94kEL!Mla*(JT??4D$mqA3RtlG>`@^p2Piw ztsMGRXNo{K2{pc{lO^Z>2yGC7DKTSB3SMoe#p!n=ssgQ=w%1l&6!6Kffo7RuZS5I& z;LLVBFY<1!r+((Ex|z3Rj7^cQa$yJ|QH3L9+9~=5)AlV7V_KGmsk1xcqrPI3$ZPj4 zIkF_VBR&+1?r1n@6=zoxtcbI`wAXBwQ_6-N-z8yTQ77Z7A#D;79&#QEd)+uiRlVxNSr2GgjYZNB-;+;4UJQ_MkNkS<69FYXTo_q;O%yW zmf(pXMw-~!xLcm}v_9k!ndk(k`jW&THP@zWPg|*VvFXHGN;$#r(2!nWGkt zc9}M3WUOZSW1=QPn#G~*VTX0c1&Kk|N%yu~P_tDsh+DBrVjLTEs);15g@zDn5~ZVg z1|Kx4$hoXtFU>l80JKm$tK-457WrJ%uUd025`mBx|V z3dl+4h^3W6#SjoI3{qgXsD_XUS(RA45WUH4cg!b6o;sT2lY9!^P)fKAj8Y{&z*9=i zSKb|`WYcDY^i0HUIi+TxT{$IvyFI5g*K*1!&9~9n7-E7#ktY8Gr=%lT{C~kIHRAn$ z;FQiifBw!mC3J%eoH(^|dG+KAXE39um3lssw9JxCn}QwOQZFZ%yB&ZuQJEHDdQ?el-!dHwj`7`P+q4;TE{^(R1}da_-|)$!m0oO literal 0 HcmV?d00001 diff --git a/gprof/po/pt_BR.gmo b/gprof/po/pt_BR.gmo new file mode 100644 index 0000000000000000000000000000000000000000..32876f76004002194ed8d294e106d9793e73660b GIT binary patch literal 9984 zcmd6sZHyh)S;wbI8t^3{Z7EP%pogSOY}a$WYsay@eo6eYPM!K?W3L15cH_+6IeYKK zb7yX5=B{`B1*u;U{SviRfe*AG3MdF9-c%tZM3JZjR764)rRs;am`DVJ@(D$xya;~( zb7t;~y*8;-0arWse`n^rJm-1-=Q+>w>^I+Y-)93p&vE@I*8}$k!OwvI@lL+@y!Aan z@DTWIa0j^UdxPM|z`fv)gU^6J1P;I-27ea(LGYLB=U)Wh&HZ12kAmL>w}ba@^Zj>& zYJU!#1!GWhd=~sZ@b|&@fqw#O-mih0?@dts9%u!@0q|k)ac~*@5cp|u2K>VszX7V> zy$nj%;Qio-!4H9&ZxK}gKKMcK*FeenW$eQ}FM^MNzX`q{dfiy4s(v2;WuG13d%)x1Y48&GrF-B3ILG~!_j3|1~1k3zW{2yU#joF0E)LS zgBt(O>-VpKm){Wte+x>UHb#`(Pk|o>H$mzB*Fo{?tDx-i7AXCGkWRAaA&?~pm%%;Y zRZ#su4;t_*pw|D-;5>NGk9c{GfLhnbLH>dsU*h2>>ib`<@sGg+Jbx7wUmt>Wvim7e zJW4_F?&m?81YZK7V(@kF5cm(Ec=0eop9B{`t>=@V`u`4i4*WX!7`UCyAw8^sh#b5G zN)IoC(&MY3=6Ms`4L*btWRE96$ytK4;BSMP=Nt9&d+5BM`$OOpY6nVBe*kLyZ-E~H zA4CZn=UGtWz62fx{|uCT_n06!0`3Q;?;$8Z^D?*u{x!&7FavqTgHs?B4$gw&({uHG z0*cqy!L#7cf!e2EtDpZn_#pQ!l!t19_kptGW8hDL9|iyBo*?)FD1EJC6a&5ts@-4K z_;;Z6_^+V&{w_!)z8(U_^An)tJOfI;i=gcHT>bniC_NP5ec*4@_*67OU~OgHtB9iOP5JOxT0EA_oV_LNPY;}W-;&$i|VC=MRuI>Uw8-RBhF z()lHS8(aj%(ZlsU)OUM&UwyBArVlRJeZ>EhTtDD%gX19X$e$zNPjkJS>k!wIT<_&N z&!v4N?lzwVeux9}TnD+t6LI!3m$<`L#kp_Wb|Oks(=DPwuhrt-=rew1w%d(C8f8(H z9w5T@MfMTv#7*uBkiQzdeM_&frF@9Kb?8J z{W#+7YwzQGe|taQb93#vxzU|_CVd_*2YFUSnazjg(N?fUN8f$od#i2-wF+a7p_ZsS zseUuSDl!RU*Nql!(Xp_P#aBIRWcJ!#tcX@9)fjJ-Xq9*BU794LbyB+KqgG-?IoY{0 z)7dRf1~cV6TAfFy!%WnVO%-AA*lc(6!TVx3K!s22V6eJvmRFi4YUjgB#^^`Y_~kHT zYuOH6%)Js%ZJJeUN@Pyf5*x#G$@Kh8 z`KUpSN!H2x1N?+Ed@ZSZ$W@e;>GtI~Mk1~zRq0F^#c^TF()1wr#G2Nlbm+vI8T#=% zQTAwM;@pIt$p>o*BDO2L!E#xgyc3#k)`vI3=+Xtw2?{$Y>+Yjh`M|12y^h$f4!d0~ zeoBRhOcfaQbZ`~<)ucA~bQ^YVx!GUM)7r|@Z-?2K7jiaI*_4b` zPX8XnsRfH}wcS`u?J#WKPs&mnn{e83R7HN>cWga!+P>Y}B#!sznyrvQ-)1j-uF>Wz z^1SceAue7XwshXY(Pt2KYIT-*->&BIrWWQ7G#k&Gw2D^Ssm+eC8Aj z?EKALj^d5!pO>(1SIF9%c4ABVKEup8A_y>uiqc})!9YuM78_A=Vq0wGA$B9sDiSqA zijo;*>_=G_7uPjqwTYcXq3I@WmWHKu_iIs+(P!RsUA-qycb$ICNwKcKMn_GsbLUQTO5~woD;OPcM}xy`=Y;5ildzYhF%O2B zThGzpcvN~%cKqT=)0Jj-Ahs%pE+i*Ick&{J%FT2f(E)aRjgMacc@@5*C{! z5j)*Y?l#r-@gCU0cpO=%5}{5_2M%JDFCHx7tMLOC?93P9L)z zE=Q}Klc?xSxwL+5WApmTiXI+2VHeg;J)NC9KUjS6nUAe3ODy;5v_Y@sN^9G47%vmk zxQAB}ChzaAa&_**_AGRC*DbqW+zerSx9Yi$;c}LTD^UiS6%K@DKIFh%J~EobHxNnu zIA!xr)B2Z+$wI$}Z|~{Cz}x$XGJX=|3KcK9lUq`Tt3_hh+%M<2mye`&-KHyE-o`qk z!^<@k?Z;1?Xr6OklF+s#!^>syCoXX{&HQ;9rjHI$M0 zhXvt;4#z0iav3r?duLh4`xUKpg_iTiITdwq zKc?TiNAqU2ET+2Ek6(z=J3KD79Oi|xK(vuNy5ikYE08QUc2EZHVPUhN4xDi}L2OHc z(3mY-1_*CA{I?+}cTqMWXlYYo+NQIjUO%dSc}EgxO9hx-?krGy_hn4r+@~AJ#afKn zxmxb>u}U4%2bB^R|80WBB7XsY8lH~BXZ>kEUpulr?YTYegLAFL^Go3g0!|nDorG-j zX3y;Go^W=5xM#1K+c&@OKsfu@>?{q#3wAwG#1Kxjo0|*w95l0g=Vxcb*}b$o6O~oC zgx4zB?0GS7j-_^kP?Es&6q%#tY%*tUX0LPl9*)-f`uQYLZxOYL9owtLQHIF6Ly>98 zM*VqnyojzRX~H4ChO=@zST!Nhf;!wcM~JVF|~kPlOBGCATg7U^<7owy%MeSLXzN zH%PK`_JlI-rfunF_Kh=lbGO!N+}%Rr+lQ=M`Qe*|O*PY4qX3Rb?>4E%FOivKoOBJ> zXjDYVT{6xx&Lo)*yhVIoCmBS^WK!OX+;))3qBt*5Qj?dT`?tPDO^)RfL+8!#^*13C zH~85e;K#vc#4 zsyu2sPft22GsJ$TVIL9Wd?Hh?Uz4fJsW+)QgHELCTfHf5ms}IuD=UXMy&G`1KY&5r z@5H%#W3!&-bZ>CJO4{9r-8YFQ(mC<7cCcmKw%|`$Ttklg%*czUri*!(w@e5%Z z^h6nhwZ(*q$S=N<>?49mKz+yal?~I#c$YzZBc=Mtg4LDo;~Xs~h@Y~ua7arMsoWh&gYlTA;&4OSq+xs1+H- zX2>-Y?=mk^m{HH0HRISWw|2Z~`ojc=Ij}Tli#WB3NQl=cV$6!Qh};_Hup!VR-}zR@ z)PzqM6-xZPu0LXrkDNQV{m%GWMH|k8MHvpF^e0SxkbQ>(*@D17A0j1tDT4Uk(T}PS z(4v09FGVJ`#iF!3yxE6CoIgWMn@$%ZuuVGb!V!9nDiKH+zn1S}u7+v6ZPZ@ZB#3(O za?@t4r<~jjxUi&T_%SCKiYf(BnL80j`{XW;>Namz7c6cRNkch!o^W(BHsQ1FuW~%5 zcMdO4d@iD#8l=9m=R)jE(*8~?je z>^MI*zTAYXc(}dn3m!N72)8&Lo=ulKUO`U0kxuW7(wG!Qc8CKc?(h{4DB@}!p4BK} zK_@d&h^iiuTt!{*;P_v6Wsm6wjVG#WAI|i685hz}e}oTNEU13B_ zY99DQWUI1>V>hghs+%G=4T(VI`cxKKSI#_Luh5C@%OdLWzf~7;{_D!fe^D24!F66^ zR0ggEB@+KHMFRPtu8iQ+Z5h1bTuQ(Qq6n-AgDy3GW`DM z%-k1yom!|suXgVL&Ut;#^E~Hy+i%?ej@JS{ALscIp8M_!f}aMzeK%ix{{5Xn@GkI8 za30)pZxH+_xC8t#@Okiuz#M!Z_;cWU!Ou4BzYG2#?|%wD27Uva1Mk`5=Whcw{v@~v z4nWcI8u)$S>);QAUjnu7UxM22TcGCM*9n5%;3MEu;0pL5@Rz|Z_Px_#F68-~zb&z985N4#9VWp9Vh&eja=f{3<9ud=u3C zZ-d*w?)L}5F7O3V<6i}Jo-cs&;Gct{_f0SaAN~Q)uM^;-yw~7P@Yg`~e+_&RlyG(c zJ3-Bl!L8sY!AHO^f)9az10Dqb6Z`AWHofPVl=Ztvkx;_nggJ>WX%^cNH#zW_>) z-vD)v>)yotB&hZp6rVm1YMnm=_kwqGDfRvg zco4h_ivBNxi{Q6F@#9hB&+{U9f%mH*UBTBu$@@P*u7G1Msu{c+CQDwAfLzsJ2Pl0% z0P5bo3QEs^r@=3STJH@I(t>{m#jkg9*}jav_dwCng&A}O9|NUNR~!5#Q1bjuQ2hQw zPg3G{X9C0_&{^;lRPi+XkXF(<2+CCXkW?b5KsGgzWH&YL7nNjwzI(nP%=ej z-Ch1@({4cNC@gclKL@Vx+{L5MF%M3k_4723cq@KOr%+}0`3T>z$?;V>p^t2!^g=o( zIZS^f&kr{Z&w}E|`Q}~l6FlPS$9eYgv>)-c{p{z*K_2M}Vt1dTe2d2~_}AbpsJklt zl}|$Do$l-e^*QOm>m$DM%!7qZFi=LkPK zJj*<~^U{-tcwXeuo#cw5BwMx|iju?(izr{~ba*%VOxnzxy^<$U8dY(Yn$;{xvdiVX zMs^3L7nN~8>?K+MqUmRKTA9N3vtsbpy`}H&vv273otbq@b2EG`E~|{;qnXh+w=%fX z>8vJEW%43hjT5`9mUCHdp!ay3+H$$mac9(v`(X}=bdJ>N?n!Ez&Sh1Un6w`CY+F>{WViYqdc+x;H8O5(;b>_xuEWLtT|hcMp3cOojTYxLRK} zc4~#SxMGz{wqS__uC7;huAC3d-u`-@4IrGwBXfBzOYDBL(jA=dOm*%L5KCdY3)@$_ zU6HF_5W<$5b(Bab9k|{!GgUmYChGU=5tLPSph;~r49ufp)7pJ%;VH=5xv-P(T?@PT zURqjMS{lE(Ht}w zqHobY4qvTVBe6H~;zW#ssm6GrL_PX6yEJji=(u#l$D^bb<@Dr!x4%s~8Fb5KxVj8a z>r|>gFja)W2WHOghu#-;4hug#&tlEkG^?~tw2;-6gfWV$NoSpMwQQd$=E$j|CR(jH zSYe|!xQ-3C;0pYzJt%XnMI@K4xHJoc6O(j-3#P zFUQpybQNV~h9en{F^SP&P}s6GWqj3|H57a5JeQ)Rb|iIczji-LAFIqDGhu(aVKs)l zh00#xs2og|2`;y1!xABI@d3kx`Z@}m>Eo^}x0=zMVPJdpaHxaNu$FXe!KvZ1Lw7{c!Uf zXT>5Z+b9~weau95F>ZuCJBC|Zu8(?I(nxr=w@xQIAwwgU&Cpn7%wI!k8p5KR{x+m0R^Y(MS}mB!n0?N&&jcQ^}sYjp97EE{=KhXS$PhMi?Lvb}7uu7f#eW(UhAsiNLOV$*%x#5gT0Zl~sArak>7w|;%AQ}0&vFN;`r zBP8v0J9QoXoH}(z2nEQaqO?dh&vi5>v9U@{U5m}E!!`)&K~cM;R5C>wM^QS&ybVoR zts^I?(CiSmORJ^L^vh9^GH2QAx@J#%c6q+m%gxmg93}>b6NWOQ-q>|v)f~oP@k%$j zG7o#|8GqT8n+YC&{Bd(s%EQ1;Fm`VHgS}kmn8*PyxE3b^8tT-YXMgZaRC+7+%-O?c zD9&z$lzhF2hijEt+OvCyIb(;|elJpt{|jmC6uiQ|ttya-Icyq7+;q3OyHsUqY6Yw90wKn9zpi-HE3>4oEM}RT%qWz%T8HQtO5C43k68&+$Z}oB416umcebpAgB9W#*LV?PveC9G)8rA_ zo`z1{^~&v+ZiZ<5uv&8y!<94(&qpcBtWY2y&Muw)LHg$3lOH zZ=LBvz+2}?W&9@46)IMAURzX#y&|@&?w2#%EBg|A$tLGLy{&Y{j>`>{+D}>>Xl9@ljGd$BqxXsa{!GYotH_**SayD$&<>$jgTGX3kwSbsw@5B z1;XiM{k$R(r+ZRncTY@JL?VhSE|VdVb9Ywc-Y@8+=NY+doKevP_hYu-H7%Q7SrE&;eJr3?SZK@!y7k z+(p=gpQTNRXWPk&c>SvS~C7uhS=)9~0J{HXW#%Z(x1zOeLUVUxuji@TP#cTS%=7ak(ybivpACAw789X9j8wt z1v%bo-?6i&!ri-f?g_U~25ZMvTZBglXBCMro87&bsGUstSqLTu8;~*OHrXg*Y=4t5 z-_m8~>SAQ0s~b4NJc;|!jW}x4=Id!;hn%87)CBywtyoLTDwD38pG@_6@_4ic-T7#( zEe=C)ORdYCME`F$% zb;ZFZJ_EcF+xVt*-03|T&CGgin`c!KUm`M@BY~PHO(tn5He8OLk+xNHH)3V!6`_lT z678d7LO`9G>nZKSNxFX1sQm#6NLAEr-j1qGC+@fDB-WF;OX}IASz1AQYNKnF%^}|m>U_iWalcqsYB#LyBs^&J zwaGagO{;%bX!~AKm(IA1kHyML=$oBM;D|C+*uwr4ZA#D5O%Q)LBda84;l>b6ppTp7 z^<`AwlGo=M7XW6qnLRo4bZYO8J;}J@#Pn4dH_S+MmzZesp}Nrn@q4VjlayL&M3+nb(^^hl z3t(iXG^kCIJ?p&Kne(#B1)9L^p3eG>Er{is0@CbgomD%;DgfX?ZnvU~039o-ay9yd zK^qqaI(j)bXT@aXrS+=OuhH)C1%Lyq9sKVAa?g zN%`Mu0j|=-|1@=lJJmzN=MCjw1m^lRJ&kL5d;OIj;UVT!GMG0w?v!O3LyeP>*}vi3 zP?MFgbh6r|XwDJ8fn;fz+jtb;r@ zHU!tx{)S3?&KmfgSwW`F-vx^Gx(aiwS=#wVXnw)A)G)pV-^pq@wij7BKoyrG_>76ByrYWShUel&l=2rcvq#=21f&XeuQ_O+ysYRR?o2cr@v)?;s&f|B!zsLEVGyeNeU-U;F*BJMe+{-WYyaV9SNBP5b_s2Z% zQ{YCh7kn7J3OoRQ0elJkE%2|w%fX+5zX|>#E5CS&=UvA0mEcma4_pR52&(<>gR1{M zupc}MN{)X5KMr0{@Vws!KM88wrJ%-J531cG;4NScya{{-{4)5DU=Mf+od|tU?Y4t- z?L7uw57xn}!S91=|0eiF@V`LG`MFPc-aX(Q;BxRe@KW$3cn$bA_<8Ubpyprr4cG2V zU@y=2f)9ZWa0~bjxB|TDlb&}oxEWMG2SLs6&q1~OF(|p;2Q|OTQGyR{1;yhxz-z%D zfnNgO0dEBV9aOz*5%LCb1Y89^1FF9>;BxRiQ0*>7Iah$Iz}vwsp!j$mycm29L}c#- z2&LYSL7IB+g5vQ#a1;2ipxO<78eM^pfNHl3l>Vkc{&_F(XCwGB_|F%>8#uu8Pf@0L zUxJdPr``;WtuO7lJ5r~rsn+_DEW?nsLnf`y?+bT{C@&o1YUrWE&(qA z_53MN{e3ojz5n6_kDUeh!-eH-KxvXTY`KTj2HJ5{yE6xDk{c z6+y}WEGXWOgB!rV1;yXhC_#FTKKB4KL~CIzYoej{sUYKUdJS554*t6fX{LNfOmo426ur!10MnJhOBkq%b@u9Ie0%fjB@S( z4}+TDyP)QO1y1-fxDC`i{u8_y{4$fn)V=FK+4m5LsNOvwCgw%p1K>eW{`YqvlzErZ ziR$-*(&rj*4Oju+244Z|7kb`qoO3PD|FXih^ZQ-Dn=>qd@`v98hrw@yvWs`YPk{fB zJ^vesYkB_-UJ71{k?8%^p!CrPeiYmXs@~J!$G{iC0{FuW{|XczC$s1G!H@I&OYkG$ zgWQAMx}-l{zr%eAw|EvOx-@4@*FG}HwcO%Pa!W_jkFI+hSe~U@ z@gW(-=gr*WeF=BKEgRa(E!)&3TZLL{)0*#P+?vmo+_IzmT9y64e5~H}h^u<*xy9#a zxNqm)#J!PwC-(*1@`*8S!hpAuTbKMQzhuk0E^=Uf_)&gCr@g+yU)i;;`yE)j!R&3^ zxCY#il`jXSE9p^}^eCH!N>zj%*x;AqgZuwPyVJ`NPO>N13;}X`l z2+=mSTn>Jg`)Y1oSLx4^B}>)?m5Q0D1=YzyfoG$uU1pYrd#aTn3hL!JGUIWj67NoW zRkNpL#)70=^v5c3ahEB^ji_#FVKJ_iKKO0oUKbhHx8ruTT2P!-pDZW!nCeqqwda>o zxlkyKSAx2!*5dJUB^*@ANL)3@yQv(7$zY*i=cot!!>p6&OsUYby3(L%B(4V)6E&vB z!kUT4O+_`sJz=pS5;Vm6pg3ugV5(XP-NX|UB&KJ=^dxVd) zN>D4;rw2{g(Zgi9PA`v#HM*$4>U2F^mh^gNs5o6@00gJ=!0eukE8!Y5+Edz5=y%^2JYL^pRy;VzAk#sgL z_7qphCcU0y5LO4_v=PblOQs&6@RC_($HVSxjVcu0)=Otu-6*bW7-u_nXjC;7)Y~;0 z5&jhxX=m1N*VL8%qsXRU& z)?`5ms&=NaAhOt@O885ZNVH&VtQJ0Ac5$&d8AKB>Jr>q?hlsGCaY1s9*WxL&w5Pb# zKGkFQdtSedNYUVY`hy1bZu`qADaE3AR}}9ylia*3g~YVo<@%&^4`+v%ucOeK@KP8> zEzDnh1=VU8)YKGxqlk&AIO>ZVbp@4{3EOr%)lN#6Q%nUDJa+1h+I##4oP!AkoXRX~*y{lJ_it$txD^c9Z=&vR9`BE$TS72P@wR*@_x{N5d zo~c4j=6{YIv*s8ntrlZ@cAa2}(+ZQ=Xlb3T8Wb~CCGk`^7MG?qce|j6r9o4v2V;Ge zFd8P-m7}CiaI#^klG#o|S>{5{^OPUTlqLHJe5!q;naaDs_5@I!O?$#Pw z4%`t$7731}6$mtjM0uAo_XtCu!Wjwi6DFxo!@A6~yNVqp_kgVV?w}UYX3#|jweHMr z6u}i|qIzPMH4xaZ7#3aM*HYpFeh*YF!x8)U^i=lrvXVEta)ur)wQNAHGaF=IR4jO{ z1%8b;MDQz4@70_JaxkRxRSXtla0y&anTNL9d=pUzk2D9B^xRcYD0JObk}_kxIq!Q;BAab z;U4VA0wH-TDc>B6={rHA^qWiW~ zxBl+-`@gzlRC3vO8wu~VWJh7is9zc-sk4Q)hyYh45C{;pENL(^|M~McIA3#ERyOF0M`c1gXhkOO<*rl@rqb zX}=L+?WI<7;COU7fpeg?c((U)G;TTdC&NnB4l0T5j~2`=eJGBNGkt?i`N-38JDsIrs>g~(j6}jVaY<`*+LR4FWX=cmb_A!kgS(* z?ZiX)aF6?I*u2=?2&sA!R>=MH#@ZdYUiHfb98aF-VIc~8p6c5_#&|Z&+Kvc0O7Y9Z zUCDBn0cKktudWTA`)j|5F2x4OUJVw=A?nJAb1JBV=p zNDPmS37^%6Jz*tTI}tVd;@U)E>y{CJ9qGGGr0>Lh2hGaE(}BYjkY<9F8^=r;qa2K#TizJC?)E--9^Ty5V+mjvW>o2S$ z{zIidGF?Sv<=`uD|8jJzQc;YqKK#JQ2LG0JJxN5)?5`)k(OzZH+%i_K7rx@(6-Fdk zR@6=LE|wlP1R7y$1z9Wp29ihYG^*OiWO&uB#{C>#7WEAD4-XHRYp*r>*?;x$z<{~U z^c$-4yk>Z1{%UCW2K}@x`iCIw>tAws7`;)nbw3rL&z&A>9mPA%-;`=42xQc87p-=W|r`;XP#s zQ`n^@cvM83vjJMafU*wDZysO+llSQY%9A1ua+^;`;SifSe5WbTsg*tal0V7@$+`oMr+h@WRsRV{km`|ATxbq6&~M#d z#d03(009&Nj06eP{*L-btF(g zw{DM{X`89J!4{@!h$^(=ts+0Can2FImN()yHj;lxzt;Ta4NtboopI7|T<7K>N{@;r zGbT+@eqgw0b$V9hL;OroS=_1YL=g*V@wC`j?Z$7u(v!S-Dx-9< zs&kBS5=|VkBDD@HFq-{xL*`)DeKob>pGBwk7!nd*V=^+)S-Ly`pLQj2!)NnwOBU;r zdXy#aYd+0bGpt63tm(HCki$wb7F~U<<*SWd!;V?slXb|3a7sl(tJq96tT;zFzoTb}YyOic*AxrLUd666bJSN&Py!6;Pe3xFW zZU}}jX7wDzGKJu;D#qCEXImV%`lVbh@w5%9Xob`Q!?A9OJSSk^ z>e9IfK4SeeZ;hO%?dhu%7E!c(TADP$)_j(`el1&$Ofjq^|A2K-vPb8x)-Rxk#>#P& zPLSKm56{I}oHtktaLf3y_CdR7l6qSUlsbjBR+8U5z~Bhi-qf5+cZ-IH78{xespM}{zuO;<;&6Y-H=lo~7PRKCp$-(rLyy?B_)Oh_Y>B`6wbC2%Q^ z-6cRRx>ncFV>e`u`}s0!Q93u7t!Zc3G`(8N6$&K-TxXduXD)eeZ8h#hq7LF9imi>+ zTC0)9GD2CVJ67H!RAXaE8GA@k(tWz#LHnGt`HYO*{}(#ao3H2)iI`x6**PscZAH&t zZ|y{6N_LZDoyIy)Qg!avgF=m+RGm_()PR(s(B~)vUhAnX}M!R8_Ss?j^(1W zyo|+To*B$vwioNDBX+lDplmZwprlh4Cj8p{BHfe)%6>^>&$3iwXPui*=aG5Z;#w2X zTIPcAcI%U$1I%#F&`QpU9mg46S{j(y-~hOR^@8xb|zlQ4a7NPmdAu|;5_ z`smQL(;KqUbDt=0DObiMv$etaB%dM{Du(@%m;SMm0;S5VpX$K;IzCXegw0mFW!4(@ zDl{txFZIH=HGo#K$(-2cf8eP?_eYHMJ4h_eo^&AsCs&lS%wZQO;0&*{N!Fe;{a$)R z(|nreBd|4N_f3c(zj#K>T5XB6j-;5-Jk+EA|B(Krygf63_Q?rF?89EwE?W^tu|R{g zGfPETXEhy-`_FX(&2?PsAR-u2>J5$8dG(# zO{>5OHUS)GWV=WiDvh%!EcZCCk2Calx_LPJJYzYv5s@BQoa{M$X;g-pp7I%EF8gHD z+_wT5XLQ~^r9_zg(eHLXy{g-gt(WPHwmeFCl`e2(yxmT2Ih+-%_J@4cu?f0$FD-??;^&u`U3*Si|JpS&xfBDQ)`K5-%7umz9`$vS4|(w&Q21oIk(H*GU1Lx4=?yA zWS1v3v=NIVxkRam{M!($}V zu^=bO-Q(z8r&M~j5wv+2acuzeqzcD4{poD;1k$*-zvB5Bi;{AOHXW literal 0 HcmV?d00001 diff --git a/gprof/po/rw.gmo b/gprof/po/rw.gmo new file mode 100644 index 0000000000000000000000000000000000000000..a7a1d907d3a82cafd74f59b7881e4e91452ad0ba GIT binary patch literal 486 zcmY+A%Sy#C5QgJzQ*h(jMfQ@K9z9;_1@Q)=MbYZov7HkmZBmk{dVCLG%m)x3#VLs5 zFdvgJ|6G#KrTKTkHpeV8>&yak!3=iK40mAW8N=X=5Dmvg=7Y~e{);2Km}Q1uzh+&H zufjo#;wtzjtVo^J>JCG+-sRGC!B6BU&Bp2WMskgv52T7{Y^@G^6IJPRnOt3#>L?%( zm#AYP%;iYyvC?boa+KwIypriP%|dmJ&vt12Pq#kkGM$gPW>f3r0wSq0fQt=~54pS{ zd`2e=TRj3cvgkwiIF-9?A0`K=$onRym2daC(wQC%suH2i<+*iJ2ruAjkh}ELaF|Y< zR^jEKv5{gLeIF{E_+T(~Nc%}~R-F8OLYC^}$U8#ETTMHD9^oskb`4m!BYC9|k@jxO mQ?>P{8-`6Vs1sND+B%cVtp`hqxNZ9f2*?{b1H!&p2jUwUT!uaX literal 0 HcmV?d00001 diff --git a/gprof/po/sv.gmo b/gprof/po/sv.gmo new file mode 100644 index 0000000000000000000000000000000000000000..6af90c7b338d69fce9440405952e33dbf10ad5ed GIT binary patch literal 10367 zcmd6sU635tRma;-jG`eV!8kY}G2FyKuD>L$C0SpqM7Ctf(%QyZ3%O^yXSOvx z-Q(__U5y`rDi;NQ2ow|_4^*WBB|#{7fC{L9va2ZeA$)}gS3!6o1*9lHL4X&Bsyy)f z-`hPOyE2ZGP(|0?`FG!Y&%NiKbMCq4p8eY0@BI~zr%m}dW&e9T?-lUK_wmE?nfH0# z2f?%8UhsMFKJXRrN5S6!e;E8T@Luq%;D^C)RP}f5^t>PB`{Uqlum$b`p9Mw#Q=s~P z9$Wzb5ELK(3VuI$XT$S80)7D0yt_fow+xEz1@I71)20{#c6exHKLhrt!_A@EgDb%#g_P+qN{=Ws^3*L#6 zc7QuTeSZ+tc=uG_9|L8V2GsbESMAH-)jL=#h={%4gDLUz8YsQJ35x%_KI(Zt1U5n0 z=V4Imz5w0>wn0SYZGbKCRZ#l;V^DVcPoT!T3!_r|{UEG+mq4v62I=CBKm+~)DEa(8 z2y5P7g0h2u2DR>cQLgm-Bq)1MLD|8tfuegIl-&Lvv~-~C@m@CJG4L@^^Sum;&tC>l zgRg-Pf_K2I_P4E(U31O@KCaCe=0A>GoAxzoR z0Z?*y8dUpFgG=C-K=u1~P;&c-aqBw@YMw555_}ar0R9bl2>cef06xOt8o$er_Q}tI zGThO%3fXq-w&>XlG`hw?BVA@+2QBG3*c{qlJi@j_QQP)qW!QR zM8w___!Ho>;8Wlqfp6W(94tob`xe4vYVROImwcbEa0rUOp9Qu4FMvD1zXD~iZ-C+hpzFKYdmvv-(MKiWHbWYdzX9@+IWMgC8F`~*e5 z?=0m-3hMJdOKDTIXJoH>t~jv2&sFb|y&lxyU8Tqe>iKbs>_N}d4y@gLlJ{Md`zdFt zdhHwOR(jKOH{~eh5=DFL)0FyQTUk5Z2Og>_&x3}tQhf`wH}uG6Wyg9@wf8vX!;~i} z@-z2PK0(pLRz~1Ecb*E8#PsrDxYlU!ZS+j*%%14_FbUG2jI-2qvn0tjioNRD3{5*I z;*Q@=vQFQ0vQb)^JnCe5_`kOnuDQd!zMXfDYFl;HeJw7^jP8TE-dk(w+-NkqNl=<$ zo^|6ST2jqQHZ<^iE>5FjsnM`&)Q5dBr^Gr-YBUcgBdS)iGDu818nmO_WL=Y}XLLR4 zj3fk2u^e>POc4x*N#qt@n4mDto@o{>HP?O3<_(hVry}6 z@@4BJ&m+Y!OUodQvQcrY;oXMNkaR?9XmCu8U*FE$0%igMIGqO@`W=d=$5Q5kAg5x z8GK~*IjT$z%c}>TA&cOKg^LN-?srgOX^PQsnB^LnjT_`0tc-a^IR;e?bRkW~G)5x# z{q893$i96xaFlEMfRU+Z;A!0;7@Kxv3V4pYaTH?i;wcEjJSqxP#4kr?4Rf7ga6L#y zc8=!Ab?yY|?$U&r@jJ5>-I)1WWpo|h;Z*(x+11SAUr?hKhP%Ni&5O-~YlSACHf6&| z6ctlp)E@PETFIO|9y5Mu;$E8N);bsmzg3nP5mMqIAB?cwYY^K~M$CcGPoq88RKc?H8^6yzdB-zcIt$kJ9eD&ZgdNUNP&wBkk~2xRYsac!x<0uN{K6nE3K`GLi4+E9-~{%zy(g-7{o=Hf4Te~W z{7xnQyePMFE$^Qoam_awp*ra*LAmox9deofw>dCpj*-&x4BNBk1V@}sn8JEXyV-_8 zr&3js4Wf1yjm3rFK2XypuuUocPJhr%g|i z-483naUS>9O0#(Q&_m`@)Wdr@m2v<+lg4)Ql(_e7GxNdIr=NPpO$y5m?`#@I*RdZ{pB5$!1`$!irAUX3!QmF#nd-ZOAu9^AL7UFm zJmTQUx+S8HT7+4%?Q$PMyU3DJ8F4D%CFq6mmSdQHrXU2+>1$T~)u7!ujfl<_E9)EA z$1h*GqRJDeqUG+HC(@@b3@^TP`RUJISruQl?JVv+FRnCpuKM9BL7lDaTW5Tr%tSrF z+*99bSD&~R8K;lQ_sTU(=&z=ke^rm!EHOr?x!`DHD`2L zKK5}^Ye%i9Gg@)s1{x|YvoW-+U1q!&n;W~p`TyZ+o5ozQO+d3JKP*IwQP=`ISU=~ zjyWCOiXf_N!7i}XY7x}0c6wL2dL-j33fNq{fYICiWXe1c@3;cF7Fh;+Y*j(iRSDz@ z+hfUC=OY69GT&~imQ1_I=g6w+YeDih)g)XlFIjl|G)>Y@W8lHHGLJNgwD+#Q; z>Vkn=^1`SfSP$9Sg$MJ|b@ywyyx7|ap?VP|#Qrt0ZU=5uy*Y>DY3F%Zh}@p1{`SWh z&$?MV5H3d{e%$F7`&|TBU46V#7d-cCyo-5u4ZrK34gF_b#IaO4ya!v0hg*ji8qT-* z=Zjt(`X}*l{z`@%M?Ig@hdW_X9Pg#0R+je~7cZ>%rwHF|AblG1T`~_YEFAXrchD?8 zytKIRzydXN^e+)UD!}pQ`zI}mr z0wwpH;B-w``&@=0fIF%Qjzo7o>N60l3pCNQL4J+HQpSs$ST}a*9FYWQb7_W(rXUwV z)YFAG8^mZTu7Anqt-=L0>s!VvH*a+MSWlgAAfJH44oqj<$GDo|Y?`5}A)A1f>O4cR zK9^^hX&G+bbWKInM|H@JoC53OS`>8pN;D9Jb9s(!vcWa*p-6#rgW4dtP1fKY(hcQz zkZZ6sRSw~N6h_Ic7HpnD+)UF9d1liLtX*eaYPC_31f}B0Nv1)1X>)!#lQ1z+X_^Ki z+u94&yG}GH*I=#FlP_1{(q5`Z7v=QJxTlOg5KS@Cp)@u@VYl|DS8QOu&AWAqJ zw$fG^h|Qa++12dqaw&tD)UW;8GIErz;g;UjkVrzd!D*-=Yq_j5j1~CW$eC+>>k73< zbcUJaLA7|dsYGnpK7I6QN%36)vZ!y|z8k{HeTGE(ueV8Q(-1{pp}ck+jBV*DM_c6x zp3~g94B$wuhJ5@`vEbfIM*pwGaRL^#?>v#a15hnI53BlUfovsectZ!s$K@qm=HJ8G&_g^fO{7B^+Od9z1m z$eoJLJ#NWUps5=KqLoTG<{V);mRHDaw!+yFU3O^&yJk11Oy3bqTtk^97_9OX&XOkk zd*W}Xe>+ENQx$FxyJ54wHW%Kn&Q%o1ZFb|>4%Ru>JEqzsSe84|-GwEW*PFx+lMu-X za2g$%JwYmmPeL~__y>;ucg|hR1SDiH!a8|j*eo`8Q3nRqC4k+=Nt2SgaI15f3+`~% z1%I!S7jj=Xh`H=VoTky*=1naN&MwY}XtzsXxU-IXo^|mBmx+|1;}Xhc7i$aRNSrHc z7W*4B^~E?HiVFG3T;hIg9tIG7|vtmDYz`dbd8W#+rcqq+D< zVIT3C@`m(F%b29d38zqJ4Bu&Lq)$RK$%wk_<#;|n!clQR>(Twzrbw>ZcvYV^MS>Y! zC0s~*{6A`v<+yE*Bz1RYn?%7_=W-;pO{ur#NMq)iqSK~3@`yl+dAv^fSiD{=)j z%9AMe5LTHImSb}zJ=!tx`80-3e4EN}WcGEwN0sRKzsQ&L%d6H^HavTR2cbhxm7cvL zkwIAZro>$>i)$Qn>(=j9S4|faxSOZ-Yf6=*o(@#H5+dfFBdS53or3d{ VONtRkr@!AtUXvS~%axQh{156Dca8u6 literal 0 HcmV?d00001 diff --git a/gprof/po/tr.gmo b/gprof/po/tr.gmo new file mode 100644 index 0000000000000000000000000000000000000000..82735ab742f9ea6c9aa2c982b9b7323253df424c GIT binary patch literal 11331 zcmcJVYm6kaIK8 z<*r9lkJ;@J3Mdjp1fobJae{d47b8O?BnAodWfeZm_(PP4M0|h`ghU_|DMArKA`&5% z;CJr5)sLCp$oW8PtN&e9_i^qy|8wrSXZAby-t|R~&x>5Y#C6Y|p7$HzTR+1WpZ|WB z=e-yF5jYR-dbj8OGI#*|74SLm1K5BxOv3*b%n{I9{EfFUSyd=b1G{44Mm!LNcc?>~Yv-w#3QcTdCf4ucPZkAf@UZt(ZPCipiF{~45i zcQPnlz5BsOz}=wCcL|jK3HSi`8YpsZflq-y09)YUdpvJ1*ahDQegXVd@K3?}!LNa$ zhkpa5|6AZbu=yU(dknk^O8d`(vYria9{eUK^8N_)!3TcU>gyu-5cd^$2>c^Z-v2## z5ESDa01koDKLYoHp93ERZ-E~IzYCrOe++&YJcjUM;+H_C^fZWyyaME(_es7)PoD!X zfPVl=zwd!e?Y$eLO27L+u}>4c7d#H02cHA~_8p%0hu|XjEAO{@{VXVU_zQ+U}f%6MOP_cuY| z?Q5Wnzv62tES7 z=VOth0k9BMXqmxkAvR>kAM$CI^pdn zzyDP+b${zz+AXf}-F50p9~2#JGZ|K$hfP0s}AwKL&ma{7r~AhjR;W{v0Fl$on=ZcKct4 zAHb-X-19+M=Q&X1$Ux!wuYhO<2(eG>EUEsGt;rqWh{5~lC{u2~_ z{}>c`?toM>?md$lT$3=(2 zy{GDz4#j?ZxS*_A<44_d1>VOcdJ-Loy;ivHamuv1`KmBal zIZ$+d)!knKh1*BDg!{r9Xlvp);5{Q>eBNup_`7iV=iU7&P<%{yBA<_Q33ngoI>GgR zu4lP~55nR4bCw?sF7Y4XuAWUBS{r!;Of8mnU^u!3gsAQBioijv?R)?jYE9O0Qv@`550fIAlpsx3_SRYp_&G1@d z;^lD(^^Vs>XQRzxe5s+2WK(B_@=E>x7#Ix0-_Q7d6ZG1`|yON;_FHAWn#euSaDMx$>e^-9!S%NW>rvb6pgwh}O00LF|e3tOappL~2%c>`svG zDOH#$zccw@HA1{rsc*1U7ABDiE!S%!5@B%B1Az(p8VOzZ(W`8rrH5NXsM}SyD+`}e z-{Z;;Rn$$h-0+CShM5S|PqXW)$5m!3)Wiz6To!JP3@z-0h8lZBLtzH5Wb|M#&_OO; zQ6^%Ges=J~^fQ_j6$#mrpc{1v6InlU#-472*A~O1oyE?=({HPE%n1oJqOvI&%Z&a# zNaF+xw%ctirg#_jPNJd^jZFmXFen4N?%TE=1#H{yZIZ^ua+xg`gTBpP#9JkfmuFdG zLm}Z^qHAFyg`v+N=s0y2S)$unIFyB%%}j?&DlUU|E7s{T{5(pF67MvA89VzHc>Qp% zp?7Wimql3P5n}D3o^VII<|;Ko2m%a(ywF&7Fp#Agi;XBb;TAKZL%0ut+DKFnDU?hh zV-loY!dq7r^y44UkTcs zGpOi7vAlNu#&G@GHF!-V0-Ety2~xzFWmHDe7EeGj{ZuT`PYIJGD|Ap7g@z-yK-zaiESVxvEvl= zJDJwLlzhy$KD@K1Ndb5E5z5#}kjs}`(d^nHrQgmYy=s1$z`b%T)@wSxX63D|GupUJ zL!tfni4o0mF3X2LyH@X*QI(7yMg(3R$ylXm>b2B>||F=Vo>B1fyM9e*VH)!ynrD^>Z0FVrR0VGO#nU zk-XJvk*Kb8x-XGV$HQxqi5Tt)nT?;QG7m&3TwFqim>l0(k?s8@S?M)eE-4dKq=We} z{oXuUQtcw2>gFE562!N8oX;HQl_E#9Q8;?ZhNFfjvgpu2;hBfIPCb`26K=dv7bKt| zE?amAuW#6IMM7>eY|_s{$KH&p!}Jo)JZW#fl=4jYGy|DDi!nR> zVz13rTsrTSa%i#N%Da?juMkiD^P&GyyW20hK(@cNc&K&c(T0s#{>7pjh5jibm%p4X zsm7&em;KY^pe7qU0|%GX{)L4@{=xzNsr`#f3x^(ATsW{mL;tc~izJcor`s(aR0{`} z_8)#^fu4;EK~eh41haw|kmXD2j83C)Ylt(9^{4hvcB$3DIm3Awk z)v^wfCAD1T{ix`vqusRf%iOOP_Xj6p4unO^h9ms3t6Qlqk2fx!zj$`M=*8AT<23Od zmHNxW0n3rBaUcF2rH^9`*?`MqSC`NEhsW(i+EtzVXUS+K8DCO|+fmv0xc`JsIgOZQ zJbfx?>sT$ejsuTBI7k8&ym^zJ zTN`0eAFE59Ff_;NKH2|pYa>zpU>I&~*mLvDw_6(}C(F9Y=Ih&JnHpf`+vx$idh_)p zdh_OJF;fG~d^;Y119-T3Yuz2d?fF{|%sKW-P;PDH^$FbG83#~TWTB{Rdtfam3wxbzPT{Ifie( zx^+{lb~db*RBvJcIe7;|&TE^m>panYHoGY2oZSrf3?tPx)00o4=Af@=vzA9mtn=}K z+&v?&=15M(LF8}l-)&Cg2X+^GNU=CH%YC!Cr-)S6=O9_J=IORYkVZp1V!AO>MJa97 zI-E%jaYD^Pazu;rs9*9G!<$feXB#OV@^GE#8~9O9NB}}jdX7S4=2+Y<Cta-tbqaF|QrK#I0E-+*Ds<}Isth-@PCNLIs-$)}8FqP}pRrfyw5 zh@~X<+06hdPiWuNABI`qguHk(KJ0U(bJRj_X@ELnWsH*Qjt~u9l7J>-GrBqiP9Ulq z9nohIwAOg7XmT6X-+Y4zOyQ;%<#8k-FxTs9EpQ|;7OLB0La9Z#U^*6Iy3u&GhR>|4 zFcBNAqHt@3Gvc&Di*1(A;)FPC!Xl!uRZ2wIUVW&=5%FuEwtHG1qUIP@pl7rsgPhtZDdXiyf+8#r!RV&FHpekI|TjWzu%3dZ48NyenX=i`VB-r$A7i1X2)?TC_ zvmT|0ZcgOkilLe-%k*@p`5QpG&-^fj15=)fk}C0SL#DJPn#`}(t2C~*ZdUeef14_e zo7wI>W{VN3ahymAp8YJO#vwa0n@%3(``oWYua9dtQ-z&+IFqxFsBYZ{a*Gvz@@UhQ zpvmDTjtqoq_Co>+)EEom>O_-$?9rhP=renX4<0jpT;ma#L|Qo0<@Js!CkjrZ9uq(6 zJZcCD_WRY3otRPnZbw&e@987>nkT*;15*KkI; z+VmhcZ<}^aY$w^9>yNMBrmqNN_lhacp6b4%tmX*s7GfO0C1^uRo)8dsj&cq#MsK&R zzS;hD1ZMZ=SYY#=H4~dg#52Q~ikvIc%`m@RM4kEI?~@`-RP&tBQ&9Ic#6j`X6Wik7 zRENnMb|FGfGUDBIXIn6wY(MqeorY`9PWPRxF;4ZeH@ucWVtti-bIg~CTI7s={2_sA z5SfZv?z6niFX!{hlz zzs4P_VVD1LkOZ>Rz+uo0$CY*`%p>3%r43? z(;OkGhD;TJ<#c9h!=|hK#hGEU;{5+oQLdA`mn6w+cr{byNH@Cic!w!GQ_hj%Tm8W1 zO{SvU=f7JtU3Ev9N{gh8^s*YB9G52&_Zpsjdz-gtrgP8qDWV#wEt_r7ek-=zeqG^` b<54WB-d;k6RHW(`^*P&m4i#rp=<@y#fIlxq literal 0 HcmV?d00001 diff --git a/gprof/po/vi.gmo b/gprof/po/vi.gmo new file mode 100644 index 0000000000000000000000000000000000000000..91530d67a5b0e27c10c1dbfca3cfe2fcb737a094 GIT binary patch literal 12434 zcmb`MZHygPdB=wU342?TK%tZZ?FnJ=I`OP`9h}4)+i~pJiAfxrcpY9gTW9v(*?R}y zJ9C+tYy0w{G_p`c(x$& zq3!Q~&dhzWcT*@G?d<=~oVVvZ&;LB~|= z?<(*hxEcI7_&)Fq_-o(__{-q8!FPc_1m6k%xOo5O3D0{Q&+i2{fz#j=cps?tp8-|> z55XDmtDxlgNAMTG%POAtE8vx&#@z&Jy#1is-4EUjrr?d>bKnQS*T6~e3OW(`pxPY; z>Dv1wcs-bd*MLufYX1uO>)?NYlJnia=y@Lo_kvr%N5HGWRq$HyyWp>aKL$1b%3EE# z_k){xz6<;)*Z~iN-vhUT@4M3TZUPU1>gThd=64QMyYGOK`(HuL?_C(d2akZ#<8Oi= z1pgR(KlnXxJNPf4>U|I)KLpN$H-Mi5)!#S4E#QwpwYwVQya&7iybU}IN*|AbZw6li z5!rhgM5W$$K$?0#0Hwztfp>%d465DS+p!gRKd5#mK-sSg^5^{?{|I;`u$GcxgcOe``^`AN=wgm@7zE-cJx}8+hfrogHo~umKw0KU(06 zpm_9G1^y=}-d+o7WXBz#>=hKxkAj--*Fo9y`=Io4IYyFRKM0B^+d%^!1y!Dd*MnaG zZv?*$%KkqAcY<43R5yVUsPYw1eE1ts_WUn!2Y3~o?*$Kn$H3nKr@`02yTG@hoId~; z!QJ4$gBpK3|MYweG~gFNMEAZ19tOV;N*-fa3*a%Z1%4O21Ke?q=iLK72#OEi2c?(G zAn5^c22}e~pz1#l9s>UjydB)jBH9T)1j;TKzyb!pd1Mt7W?U(Z#vh3se36w5*{uV^_-sM{zegH(3-d<3=UINAY-v`C} z74VJV`QrUoK&{hn6y>jiT7N$P-vqvQ#?`+DRQpL#a?Tddw}Rr$T_EClXTU4K-v-|R z-p4)1txNjW^&8x(bCg?aMVE8|740SYbjcp0m-s8)YyPs)9&XK5dfm%?C%3K-JFxt` zpWm{FI4%B3R`Eo0mR@h+KEf?-=n|Kiy0blq+p_bPO~n85l5TZjM(YRkTYTQneKohZ za2vO{BYi%=eHr&BxR-reC)`6~%II#ABuGU{) z3mz!mZvka{*+rLlwu}2-?vHcd!ChYB+Ev`*)Xl}qL!jZFFP;UM)m~Tf|8VhJ{_9rm zcXG=Iyo>uC+}CjH5umXl^PIhAcz z&B>Zs3bLr`FEx|u2~$lvac21rClM+|I5QHJuE6A`=T(hNdV)CdJnxIDk%AlYJ+B?#$XroCk53bh6zQZ=Hs&`N;qEn(fdmjJXZ91oct%n>JRF zN$9(%bR zNNFCJ%s5tP@L^HX4%MO%sunJF>UGUzOdq!xzhfQENs-%`k#V6wAlxc8NRtxcIr=q;!mWSgZ^mQt<6yAhJF$?pTzJhi;3{o}4 z-Wa0ZO5*9Hlgp_LC~Vt3pms947DX$lM^#LcoQMiOj@QAvWZl+M(kw_gUfPL=w3S1Y zrpIK=6WTZ6bs<<_D#!}-a5;1^m^mWezgJ5nvk z1E;VJYY$BC>P2xiX|-XA{7#|%G|MlRTHe2j#x>rchhnEI6y^3aRY*nupR!~293!Kp z3EZ>$1Y4YTn9O=hyV%-6wJ=qdw8EvN*45nYh91`DOfwIbrki2B3ttz-S&nnEZmC&t zC&Tk~w~W#10SUWFN)(g2;fObKYU#w*8$zyjkY*vQadWq97%bosC$f%ntZhZ0B_t}l z6y0Np-eNK0;_D{MyJ%hX9Is+WDOW(z{8W&}w3&0BL9Iul8+mZ~nK;kPR0o0mreV|d zeQhPq;ZLHfDHh_)>B;8l&Ftizv6x{}TdjB9b=R2#;ujSw-e7~@?d`<*MMO_p`%$yT zi%x9kv)kJnWX_52J$k#TOS4-LrQJ=VdLuWpJ8r(g+#A;MUe2U!fXCv^AK54m<`&r&!!<8N3xuw>TsGcYqVVMBUs9kW+xBXmGBbOg1mVbp^s&R z0NQ=cg1-`4E$;vVf>k1W=`fd?l+S10sm$ngS+#ty1D`2*vi=_0I(kNWEzwAD@u&arC zYc4u@OY;miZd*~jAHK1oInpI**T+dUc3D-a_ga(@_ILeG4BKmi;K1q8#RP5v4aKv) zNAa@Nsow~jZ9AwWwm$|+-W59`(P@T0qpB@#6LX*-q_B@!h-X0AcC2DpSKA*tWLFcL zO5{ghAD&iZgX?Ol)Bk-;2`bLcf{`KW<;Zc3wDCj)6)d?3)T8@jvmeKq5?J-FF<;` zo=lzwk{wqd*CJ-H#ugMb9hX8DSsru7Iv+K#KgP@Lt2wijrDM&C*PjfU8@wh-J335R zKT8p9;I@uCw^i{ZOIWjzdG;lNl~)`va7$h-%m~(NEbYug`0%v*Z#cZz(+Ht@7B-3f z%f>n#xL)WOTNivWwGkC*F!=l&b-NSb^S zzv~~Y`S-bqW3F&`+ore8OwU%FYx56f^{D3W#liXW32N-reKsGCgw1SEJ?=~=X}xmf z@Vvi|=-tNAx5M5!vu$Q}#-F)?KQp_1Zsx}8d7h!7e=pIa;v0Xo-iQ2c+sw9YbK7pZ zerCrFGnKo8EcfT}gBji`;?PCJ_>NZDOEbnwvrp$=xJXDa*H7SOOi z-)%D$h2~rF3Q>HEB2>7T?>aVrz`uD|Pm&T!`}+xdbcC5RH!nqb46a)hLD z+dgKyW^Xa>=dPJsDj)Oj2xHVcrj&+dMfFFWn*^v%jnOkDWgwch86>ehM> zoBCSsk%+ygNLpM{WTvY9mrOlcTYV;?N&mb(w0FwvMQg2hwrc7P%GP?1v*Dkh*T*7L zeRahw(I$3zil4dKg~u)y(I!iV{rs;LmZG)ZnT{#yt*t&Ao70`O)w7%%m3A5S^g0zu zgD{=Xn~d4C8*8gCVGNQG724POf68p>ef8OnDbgXg>)ph>RRk&>q(Yo#$`<`+X!h!h zYrSWxIy;+2|Eah^?L%w5CnDrpeNIxB75eAnhH3Vn8YV{O`!BW7_Ua4lv1N0c8_`ss zG>Ey9&uM=2*0l4kH~Qy_j`0U;tKVu3awN)uG&<(QTJI%19+F@+I+?7E$_aw%htiX_QV$SpY#ajE~jEMpbS zx_I8%vCxmxzO^`lmKhdI0}J!?!WnD8^KBe!?B+H!cxh6#vpE;bs)0t%42@ol1r>^( z;{H?Ji<()*t=qYBGEJvpxd2Z)pYFW>JklZRx9tBOd6URyXollJk%!?~@6otEny4vk zr-fpDMVK%*s-mVEq#QA;CV@$+9Mjf%58)%q!Ru?QUvI<4)o+R1{Z&@TV0O5ZvwEwQ z@g+LT0(gtIG{z%U<#`G^b{yA-z5Z1Fx$1fUJ3h+%BMQrzxuHkw!+x~-jENbzZt9o-%HtPf`7LPtsQFY!?r7ZTwZTyMfUm2` zL!!V6Il%^`bK){^vGa+5#dd1dTcu{hoD?PCt98_JyS)eH*X73=vrg}Qfs~EtPaFR`z9kW8NRWjLe3R5tfl$?G@8}8_%ayn5*x60YLchddgo!nHyxdZ z>wUmHIgpr@t96fK!BHj7mctsQjjg9UxwhJ~yIx6##-+}L27?4rNsSGLh1 zAdq5dl|iGW-G;r5b@VzhmUT#l$9VNcI9z9V>!9HB7Zq2Q+nZD&0`<mAbL6}vb6^(-e%?*% zWdCKP8*zv_kSeF>B-EyB&B?K2Gaa~hJwY!%%M!V%z?|7k9Iq*)3W8&ARsY?Fc%+Y%v7WQOqbYSwnHWo zm~3Bi=X$VtC0=Zp$}EG$@zBSfv!}%CBHG>Tz4lvAyFW8OU_Vq>vU4;T-$}-i9R$k| zNWy|P8PCF!L>s%k+Zia3J0L^Mf?)$@tvuK&PUbEEAs6HPH^^!wDi%j=GzcRskd(*ImOM_b# z7Ry-2(Nu**DuBq*tUyxPOCaY|d+`RS>w5br^{wh+07l+dZyx_~?g? zqKoq5#-&w9zj16>YCmd|VR0R6Kh^wt{=Mwd1)*P0!^Ebu`eU_MMfE zr(mH70Y-n@FCi3_2}HhmSR*PRAh^|~KDdSh>d8hB6;EcTyTBW1H2PcLNQS*rUD43U a8-Ckp1X;I~{%|xe=JKJQ+p7yO-v0oLa6$h7 literal 0 HcmV?d00001 diff --git a/include/ChangeLog b/include/ChangeLog index bf7128f..af96977 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,165 @@ +2011-10-25 Alan Modra + + Apply mainline patches. + 2011-10-19 Alan Modra + PR ld/13254 + * bfdlink.h (struct bfd_link_info): Add error_textrel. + + 2011-09-26 Cary Coutant + gcc PR lto/47247 + * plugin-api.h (enum ld_plugin_symbol_resolution): Add + LDPR_PREVAILING_DEF_IRONLY_EXP. + (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V2. + +2011-09-15 H.J. Lu + + PR ld/12975 + * bfdlink.h (bfd_link_info): Add version_info. + +2011-07-25 Rainer Orth + + * xregex.h (regoff_t): Define. + +2011-07-22 Jakub Jelinek + + * dwarf2.h (DW_AT_GNU_macros): New. + (enum dwarf_macro_record_type): New enum. Add DW_MACRO_GNU_*. + + PR c++/49756 + * libiberty.h (stack_limit_increase): New prototype. + +2011-07-13 Sriraman Tallam + + * plugin-api.h + (ld_plugin_section): New struct. + (ld_plugin_get_section_count): New typedef. + (ld_plugin_get_section_type): New typedef. + (ld_plugin_get_section_name): New typedef. + (ld_plugin_get_section_contents): New typedef. + (ld_plugin_update_section_order): New typedef. + (ld_plugin_allow_section_ordering): New typedef. + (LDPT_GET_SECTION_COUNT): New enum value. + (LDPT_GET_SECTION_TYPE): New enum value. + (LDPT_GET_SECTION_NAME): New enum value. + (LDPT_GET_SECTION_CONTENTS): New enum value. + (LDPT_UPDATE_SECTION_ORDER): New enum value. + (LDPT_ALLOW_SECTION_ORDERING): New enum value. + (tv_get_section_count): New struct members. + (tv_get_section_type): New struct members. + (tv_get_section_name): New struct members. + (tv_get_section_contents): New struct members. + (tv_update_section_order): New struct members. + (tv_allow_section_ordering): New struct members. + +2011-07-15 Alan Modra + + * bfdlink.h (struct bfd_link_info): Use ENUM_BITFIELD for strip, + discard, common_skip_ar_symbols, unresolved_syms_in_objects, and + unresolved_syms_in_shared_libs fields. Move emit_note_gnu_build_id + out of bitfields. Reorder bitfields. + +2011-07-13 Sriraman Tallam + + * plugin-api.h (ld_plugin_section): New struct. + (ld_plugin_get_section_count): New typedef. + (ld_plugin_get_section_type): New typedef. + (ld_plugin_get_section_name): New typedef. + (ld_plugin_get_section_contents): New typedef. + (ld_plugin_update_section_order): New typedef. + (ld_plugin_allow_section_ordering): New typedef. + (LDPT_GET_SECTION_COUNT): New enum value. + (LDPT_GET_SECTION_TYPE): New enum value. + (LDPT_GET_SECTION_NAME): New enum value. + (LDPT_GET_SECTION_CONTENTS): New enum value. + (LDPT_UPDATE_SECTION_ORDER): New enum value. + (LDPT_ALLOW_SECTION_ORDERING): New enum value. + (tv_get_section_count): New struct members. + (tv_get_section_type): New struct members. + (tv_get_section_name): New struct members. + (tv_get_section_contents): New struct members. + (tv_update_section_order): New struct members. + (tv_allow_section_ordering): New struct members. + +2011-07-11 Catherine Moore + + * bfdlink.h (flag_type): New enumeration. + (flag_info_list): New structure. + (flag_info): New structure. + +2011-07-09 H.J. Lu + + PR ld/12942 + * bfdlink.h (bfd_link_info): Add loading_lto_outputs. + +2011-07-01 Joel Brobecker + + * filenames.h (HAVE_CASE_INSENSITIVE_FILE_SYSTEM): Define + on Darwin, as well as on the systems that use a DOS-like + filesystem. + +2011-06-22 Jakub Jelinek + + PR debug/47858 + * dwarf2.h (enum dwarf_location_atom): Add DW_OP_GNU_parameter_ref. + +2011-06-22 Jakub Jelinek + + * dwarf2.h (enum dwarf_location_atom): Add DW_OP_GNU_parameter_ref. + +2011-06-20 Jakub Jelinek + + PR ld/12570 + * bfdlink.h (struct bfd_link_info): Add no_ld_generated_unwind_info + option. + +2011-06-13 Jan Kratochvil + + * demangle.h (DMGL_RET_POSTFIX): Extend the comment. + (DMGL_RET_DROP): New. + +2011-06-13 Walter Lee + + * dis-asm.h (print_insn_tilegx): Declare. + (print_insn_tilepro): Likewise. + +2011-05-17 Alan Modra + + PR ld/12760 + * bfdlink.h (struct bfd_link_callbacks ): Add "flags" and + "string" param. + +2011-05-16 Alan Modra + + * bfdlink.h (struct bfd_link_hash_entry): Remove u.undef.weak field. + +2011-05-09 Paul Brook + + * elf/tic6x.h (ELF_STRING_C6000_unwind, + ELF_STRING_C6000_unwind_info, ELF_STRING_C6000_unwind_once, + ELF_STRING_C6000_unwind_info_once): Define. + +2011-04-30 Jakub Jelinek + + * dwarf2.h (DW_OP_GNU_const_type, DW_OP_GNU_regval_type, + DW_OP_GNU_deref_type, DW_OP_GNU_convert, DW_OP_GNU_reinterpret): New. + +2011-04-25 Jan Kratochvil + + * bfdlink.h (ENUM_BITFIELD): Remove. + +2011-04-25 Jan Kratochvil + + * ansidecl.h (ENUM_BITFIELD): New, from gcc/system.h. + +2011-04-24 Alan Modra + + PR ld/12365 + PR ld/12696 + * bfdlink.h (ENUM_BITFIELD): Define. + (struct bfd_link_hash_entry): Make "type" a bitfield. Add "non_ir_ref". + (struct bfd_link_callbacks ): Pass bfd_link_hash_entry pointer + rather than "name". + 2011-04-20 Alan Modra PR ld/12365 @@ -49,20 +211,11 @@ * dwarf2.h: Update value for DW_AT_hi_user. -2010-11-25 Andreas Krebbel - - * opcode/s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_MAXCPU. - 2010-11-16 Ian Lance Taylor * simple-object.h (simple_object_attributes_merge): Declare, replacing simple_object_attributes_compare. -2010-11-16 Jie Zhang - - * elf/bfin.h (EF_BFIN_CODE_IN_L1): Define. - (EF_BFIN_DATA_IN_L1): Define. - 2010-11-04 Ian Lance Taylor * dwarf2.h (enum dwarf_source_language): Add DW_LANG_Go. diff --git a/include/ansidecl.h b/include/ansidecl.h index 8b76647..c39ce2f 100644 --- a/include/ansidecl.h +++ b/include/ansidecl.h @@ -416,6 +416,15 @@ So instead we use the macro below and test it against specific values. */ #define EXPORTED_CONST const #endif +/* Be conservative and only use enum bitfields with GCC. + FIXME: provide a complete autoconf test for buggy enum bitfields. */ + +#if (GCC_VERSION > 2000) +#define ENUM_BITFIELD(TYPE) __extension__ enum TYPE +#else +#define ENUM_BITFIELD(TYPE) unsigned int +#endif + #ifdef __cplusplus } #endif diff --git a/include/bfdlink.h b/include/bfdlink.h index 7cfaea0..be85329 100644 --- a/include/bfdlink.h +++ b/include/bfdlink.h @@ -91,7 +91,9 @@ struct bfd_link_hash_entry struct bfd_hash_entry root; /* Type of this entry. */ - enum bfd_link_hash_type type; + ENUM_BITFIELD (bfd_link_hash_type) type : 8; + + unsigned int non_ir_ref : 1; /* A union of information depending upon the type. */ union @@ -121,7 +123,6 @@ struct bfd_link_hash_entry undefined symbol list. */ struct bfd_link_hash_entry *next; bfd *abfd; /* BFD symbol was found in. */ - bfd *weak; /* BFD weak symbol was found in. */ } undef; /* bfd_link_hash_defined, bfd_link_hash_defweak. */ struct @@ -223,116 +224,121 @@ enum report_method RM_GENERATE_ERROR }; +typedef enum {with_flags, without_flags} flag_type; + +/* A section flag list. */ +struct flag_info_list +{ + flag_type with; + const char *name; + bfd_boolean valid; + struct flag_info_list *next; +}; + +/* Section flag info. */ +struct flag_info +{ + flagword only_with_flags; + flagword not_with_flags; + struct flag_info_list *flag_list; + bfd_boolean flags_initialized; +}; + struct bfd_elf_dynamic_list; +struct bfd_elf_version_tree; /* This structure holds all the information needed to communicate between BFD and the linker when doing a link. */ struct bfd_link_info { - /* TRUE if BFD should generate a relocatable object file. */ - unsigned int relocatable: 1; + /* TRUE if BFD should generate a shared object (or a pie). */ + unsigned int shared: 1; - /* TRUE if BFD should generate relocation information in the final - executable. */ - unsigned int emitrelocations: 1; + /* TRUE if generating an executable, position independent or not. */ + unsigned int executable : 1; - /* TRUE if BFD should generate a "task linked" object file, - similar to relocatable but also with globals converted to - statics. */ - unsigned int task_link: 1; + /* TRUE if generating a position independent executable. */ + unsigned int pie: 1; - /* TRUE if BFD should generate a shared object. */ - unsigned int shared: 1; + /* TRUE if BFD should generate a relocatable object file. */ + unsigned int relocatable: 1; /* TRUE if BFD should pre-bind symbols in a shared object. */ unsigned int symbolic: 1; + /* TRUE if executable should not contain copy relocs. + Setting this true may result in a non-sharable text segment. */ + unsigned int nocopyreloc: 1; + /* TRUE if BFD should export all symbols in the dynamic symbol table of an executable, rather than only those used. */ unsigned int export_dynamic: 1; - /* TRUE if shared objects should be linked directly, not shared. */ - unsigned int static_link: 1; - - /* TRUE if the output file should be in a traditional format. This - is equivalent to the setting of the BFD_TRADITIONAL_FORMAT flag - on the output file, but may be checked when reading the input - files. */ - unsigned int traditional_format: 1; - - /* TRUE if we want to produced optimized output files. This might - need much more time and therefore must be explicitly selected. */ - unsigned int optimize: 1; - - /* TRUE if ok to have multiple definition. */ - unsigned int allow_multiple_definition: 1; - - /* TRUE if ok to have version with no definition. */ - unsigned int allow_undefined_version: 1; - /* TRUE if a default symbol version should be created and used for exported symbols. */ unsigned int create_default_symver: 1; - /* TRUE if a default symbol version should be created and used for - imported symbols. */ - unsigned int default_imported_symver: 1; - - /* TRUE if symbols should be retained in memory, FALSE if they - should be freed and reread. */ - unsigned int keep_memory: 1; + /* TRUE if unreferenced sections should be removed. */ + unsigned int gc_sections: 1; /* TRUE if every symbol should be reported back via the notice callback. */ unsigned int notice_all: 1; - /* TRUE if executable should not contain copy relocs. - Setting this true may result in a non-sharable text segment. */ - unsigned int nocopyreloc: 1; + /* TRUE if we are loading LTO outputs. */ + unsigned int loading_lto_outputs: 1; - /* TRUE if the new ELF dynamic tags are enabled. */ - unsigned int new_dtags: 1; + /* TRUE if global symbols in discarded sections should be stripped. */ + unsigned int strip_discarded: 1; - /* TRUE if non-PLT relocs should be merged into one reloc section - and sorted so that relocs against the same symbol come together. */ - unsigned int combreloc: 1; + /* TRUE if all data symbols should be dynamic. */ + unsigned int dynamic_data: 1; - /* TRUE if .eh_frame_hdr section and PT_GNU_EH_FRAME ELF segment - should be created. */ - unsigned int eh_frame_hdr: 1; + /* Which symbols to strip. */ + ENUM_BITFIELD (bfd_link_strip) strip : 2; - /* TRUE if global symbols in discarded sections should be stripped. */ - unsigned int strip_discarded: 1; + /* Which local symbols to discard. */ + ENUM_BITFIELD (bfd_link_discard) discard : 2; - /* TRUE if generating a position independent executable. */ - unsigned int pie: 1; + /* Criteria for skipping symbols when determining + whether to include an object from an archive. */ + ENUM_BITFIELD (bfd_link_common_skip_ar_symbols) common_skip_ar_symbols : 2; - /* TRUE if generating an executable, position independent or not. */ - unsigned int executable : 1; + /* What to do with unresolved symbols in an object file. + When producing executables the default is GENERATE_ERROR. + When producing shared libraries the default is IGNORE. The + assumption with shared libraries is that the reference will be + resolved at load/execution time. */ + ENUM_BITFIELD (report_method) unresolved_syms_in_objects : 2; - /* TRUE if PT_GNU_STACK segment should be created with PF_R|PF_W|PF_X - flags. */ - unsigned int execstack: 1; + /* What to do with unresolved symbols in a shared library. + The same defaults apply. */ + ENUM_BITFIELD (report_method) unresolved_syms_in_shared_libs : 2; - /* TRUE if PT_GNU_STACK segment should be created with PF_R|PF_W - flags. */ - unsigned int noexecstack: 1; + /* TRUE if shared objects should be linked directly, not shared. */ + unsigned int static_link: 1; + + /* TRUE if symbols should be retained in memory, FALSE if they + should be freed and reread. */ + unsigned int keep_memory: 1; + + /* TRUE if BFD should generate relocation information in the final + executable. */ + unsigned int emitrelocations: 1; /* TRUE if PT_GNU_RELRO segment should be created. */ unsigned int relro: 1; + /* TRUE if .eh_frame_hdr section and PT_GNU_EH_FRAME ELF segment + should be created. */ + unsigned int eh_frame_hdr: 1; + /* TRUE if we should warn when adding a DT_TEXTREL to a shared object. */ unsigned int warn_shared_textrel: 1; - /* TRUE if we should warn alternate ELF machine code. */ - unsigned int warn_alternate_em: 1; - - /* TRUE if unreferenced sections should be removed. */ - unsigned int gc_sections: 1; - - /* TRUE if user shoudl be informed of removed unreferenced sections. */ - unsigned int print_gc_sections: 1; + /* TRUE if we should error when adding a DT_TEXTREL. */ + unsigned int error_textrel: 1; /* TRUE if .hash section should be created. */ unsigned int emit_hash: 1; @@ -345,36 +351,59 @@ struct bfd_link_info caching ELF symbol buffer. */ unsigned int reduce_memory_overheads: 1; - /* TRUE if all data symbols should be dynamic. */ - unsigned int dynamic_data: 1; + /* TRUE if the output file should be in a traditional format. This + is equivalent to the setting of the BFD_TRADITIONAL_FORMAT flag + on the output file, but may be checked when reading the input + files. */ + unsigned int traditional_format: 1; + + /* TRUE if non-PLT relocs should be merged into one reloc section + and sorted so that relocs against the same symbol come together. */ + unsigned int combreloc: 1; + + /* TRUE if a default symbol version should be created and used for + imported symbols. */ + unsigned int default_imported_symver: 1; + + /* TRUE if the new ELF dynamic tags are enabled. */ + unsigned int new_dtags: 1; + + /* FALSE if .eh_frame unwind info should be generated for PLT and other + linker created sections, TRUE if it should be omitted. */ + unsigned int no_ld_generated_unwind_info: 1; + + /* TRUE if BFD should generate a "task linked" object file, + similar to relocatable but also with globals converted to + statics. */ + unsigned int task_link: 1; + + /* TRUE if ok to have multiple definition. */ + unsigned int allow_multiple_definition: 1; + + /* TRUE if ok to have version with no definition. */ + unsigned int allow_undefined_version: 1; /* TRUE if some symbols have to be dynamic, controlled by --dynamic-list command line options. */ unsigned int dynamic: 1; - /* Non-NULL if .note.gnu.build-id section should be created. */ - char *emit_note_gnu_build_id; - - /* What to do with unresolved symbols in an object file. - When producing executables the default is GENERATE_ERROR. - When producing shared libraries the default is IGNORE. The - assumption with shared libraries is that the reference will be - resolved at load/execution time. */ - enum report_method unresolved_syms_in_objects; + /* TRUE if PT_GNU_STACK segment should be created with PF_R|PF_W|PF_X + flags. */ + unsigned int execstack: 1; - /* What to do with unresolved symbols in a shared library. - The same defaults apply. */ - enum report_method unresolved_syms_in_shared_libs; + /* TRUE if PT_GNU_STACK segment should be created with PF_R|PF_W + flags. */ + unsigned int noexecstack: 1; - /* Which symbols to strip. */ - enum bfd_link_strip strip; + /* TRUE if we want to produced optimized output files. This might + need much more time and therefore must be explicitly selected. */ + unsigned int optimize: 1; - /* Which local symbols to discard. */ - enum bfd_link_discard discard; + /* TRUE if user should be informed of removed unreferenced sections. */ + unsigned int print_gc_sections: 1; - /* Criteria for skipping symbols when determining - whether to include an object from an archive. */ - enum bfd_link_common_skip_ar_symbols common_skip_ar_symbols; + /* TRUE if we should warn alternate ELF machine code. */ + unsigned int warn_alternate_em: 1; /* Char that may appear as the first char of a symbol, but should be skipped (like symbol_leading_char) when looking up symbols in @@ -411,6 +440,9 @@ struct bfd_link_info bfd *input_bfds; bfd **input_bfds_tail; + /* Non-NULL if .note.gnu.build-id section should be created. */ + char *emit_note_gnu_build_id; + /* If a symbol should be created for each input BFD, this is section where those symbols should be placed. It must be a section in the output BFD. It may be NULL, in which case no such symbols @@ -468,6 +500,9 @@ struct bfd_link_info /* List of symbols should be dynamic. */ struct bfd_elf_dynamic_list *dynamic_list; + + /* The version information. */ + struct bfd_elf_version_tree *version_info; }; /* This structures holds a set of callback functions. These are called @@ -570,12 +605,15 @@ struct bfd_link_callbacks (struct bfd_link_info *, const char *name, bfd *abfd, asection *section, bfd_vma address); /* A function which is called when a symbol in notice_hash is - defined or referenced. NAME is the symbol. ABFD, SECTION and - ADDRESS are the value of the symbol. If SECTION is - bfd_und_section, this is a reference. */ + defined or referenced. H is the symbol. ABFD, SECTION and + ADDRESS are the (new) value of the symbol. If SECTION is + bfd_und_section, this is a reference. FLAGS are the symbol + BSF_* flags. STRING is the name of the symbol to indirect to if + the sym is indirect, or the warning string if a warning sym. */ bfd_boolean (*notice) - (struct bfd_link_info *, const char *name, - bfd *abfd, asection *section, bfd_vma address); + (struct bfd_link_info *, struct bfd_link_hash_entry *h, + bfd *abfd, asection *section, bfd_vma address, flagword flags, + const char *string); /* Error or warning link info message. */ void (*einfo) (const char *fmt, ...); diff --git a/include/coff/ChangeLog b/include/coff/ChangeLog index 11aec52..4b0a70a 100644 --- a/include/coff/ChangeLog +++ b/include/coff/ChangeLog @@ -1,3 +1,34 @@ +2011-06-02 Nick Clifton + + * i860.h: Fix spelling mistake in comment. + +2011-05-04 Tristan Gingold + + * rs6000.h (union external_auxent): Add x_ftype field. + * rs6k64.h: (struct external_auxent): Remap x_file field. + +2011-05-04 Tristan Gingold + + * rs6000.h (struct external_exceptab): New struct. + (EXCEPTSZ): New macro. + * rs6k64.h: (struct external_exceptab): New struct. + (EXCEPTSZ): New macro. + +2011-05-03 Tristan Gingold + + * rs6000.h (struct external_ldsym): Use E_SYMNMLEN instead of + SYMNMLEN. + +2011-04-27 Tristan Gingold + + * xcoff.h (F_FDPR_PROF, F_FDPR_OPTI, F_DSA, F_VARPG) + (STYP_DWARF, SSUBTYP_DWINFO) + (SSUBTYP_DWLINE, SSUBTYP_DWPBNMS, SSUBTYP_DWPBTYP) + (SSUBTYP_DWARNGE, SSUBTYP_DWABREV, SSUBTYP_DWSTR) + (SSUBTYP_DWRNGES, STYP_TDATA, STYP_TBSS, R_TLS, R_TLS_IE) + (R_TLS_LD, R_TLS_LE, R_TLSM, R_TLSML, R_TOCU, R_TOCL, C_DWARF): + New macros. + 2011-03-31 Tristan Gingold * internal.h (C_NULL_VALUE): Define. diff --git a/include/coff/i860.h b/include/coff/i860.h index 7de3961..0767de4 100644 --- a/include/coff/i860.h +++ b/include/coff/i860.h @@ -1,6 +1,6 @@ /* COFF information for the Intel i860. - Copyright 2001, 2003, 2010 Free Software Foundation, Inc. + Copyright 2001, 2003, 2010, 2011 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -58,7 +58,7 @@ struct external_reloc #define RELSZ 10 /* The relocation directory entry types. - PAIR : The low half that follows relates to the preceeding HIGH[ADJ]. + PAIR : The low half that follows relates to the preceding HIGH[ADJ]. HIGH : The high half of a 32-bit constant. LOWn : The low half, insn bits 15..(n-1), 2^n-byte aligned. SPLITn : The low half, insn bits 20..16 and 10..(n-1), 2^n-byte aligned. diff --git a/include/coff/rs6000.h b/include/coff/rs6000.h index 4d431df..d5b2af2 100644 --- a/include/coff/rs6000.h +++ b/include/coff/rs6000.h @@ -168,13 +168,16 @@ union external_auxent { char x_tvndx[2]; /* tv index */ } x_sym; - union { - char x_fname[E_FILNMLEN]; - struct { - char x_zeroes[4]; - char x_offset[4]; - } x_n; - } x_file; + struct { + union { + char x_fname[E_FILNMLEN]; + struct { + char x_zeroes[4]; + char x_offset[4]; + } x_n; + } x_n; + char x_ftype[1]; + } x_file; struct { char x_scnlen[4]; /* section length */ @@ -250,7 +253,7 @@ struct external_ldsym { union { - bfd_byte _l_name[SYMNMLEN]; + bfd_byte _l_name[E_SYMNMLEN]; struct { bfd_byte _l_zeroes[4]; @@ -276,3 +279,15 @@ struct external_ldrel }; #define LDRELSZ (2 * 4 + 2 * 2) + +struct external_exceptab +{ + union { + bfd_byte e_symndx[4]; + bfd_byte e_paddr[4]; + } e_addr; + bfd_byte e_lang[1]; + bfd_byte e_reason[1]; +}; + +#define EXCEPTSZ (4 + 2) diff --git a/include/coff/rs6k64.h b/include/coff/rs6k64.h index 516758b..453198a 100644 --- a/include/coff/rs6k64.h +++ b/include/coff/rs6k64.h @@ -152,15 +152,17 @@ union external_auxent } x_fcnary; } x_sym; - union { - char x_fname[E_FILNMLEN]; - struct { - char x_zeroes[4]; - char x_offset[4]; - char x_pad[6]; - unsigned char x_ftype[1]; - unsigned char x_resv[2]; - } x_n; + struct { + union { + char x_fname[E_FILNMLEN]; + struct { + char x_zeroes[4]; + char x_offset[4]; + char x_pad[6]; + } x_n; + } x_n; + unsigned char x_ftype[1]; + unsigned char x_resv[2]; } x_file; struct { @@ -259,3 +261,15 @@ struct external_ldrel }; #define LDRELSZ (16) + +struct external_exceptab +{ + union { + bfd_byte e_symndx[4]; + bfd_byte e_paddr[8]; + } e_addr; + bfd_byte e_lang[1]; + bfd_byte e_reason[1]; +}; + +#define EXCEPTSZ (10) diff --git a/include/coff/xcoff.h b/include/coff/xcoff.h index dd157d3..31b5071 100644 --- a/include/coff/xcoff.h +++ b/include/coff/xcoff.h @@ -24,6 +24,23 @@ #ifndef _INTERNAL_XCOFF_H #define _INTERNAL_XCOFF_H +/* XCOFF specific f_flags. */ + +/* File was profiled with fdpr. */ +#define F_FDPR_PROF 0x0010 + +/* File was reordered with fdpr. */ +#define F_FDPR_OPTI 0x0020 + +/* File use very large program support. */ +#define F_DSA 0x0040 + +/* One aux header specifying medium page sizes is non-zero. */ +#define F_VARPG 0x0100 + +/* Read/write sections are non-executable. */ +#define F_NONEXEC 0x8000 + /* Linker */ /* Names of "special" sections. */ @@ -35,25 +52,44 @@ #define _EXCEPT ".except" #define _TYPCHK ".typchk" -/* XCOFF uses a special .loader section with type STYP_LOADER. */ -#define STYP_LOADER 0x1000 +/* XCOFF uses special .dwXXX sections with the type STYP_DWARF. */ +#define STYP_DWARF 0x0010 -/* XCOFF uses a special .debug section with type STYP_DEBUG. */ -#define STYP_DEBUG 0x2000 +/* High-order 16-bits dwarf subtypes. */ +#define SSUBTYP_DWINFO 0x10000 +#define SSUBTYP_DWLINE 0x20000 +#define SSUBTYP_DWPBNMS 0x30000 +#define SSUBTYP_DWPBTYP 0x40000 +#define SSUBTYP_DWARNGE 0x50000 +#define SSUBTYP_DWABREV 0x60000 +#define SSUBTYP_DWSTR 0x70000 +#define SSUBTYP_DWRNGES 0x80000 -/* XCOFF handles line number or relocation overflow by creating - another section header with STYP_OVRFLO set. */ -#define STYP_OVRFLO 0x8000 +/* XCOFF uses a special .loader section with type STYP_LOADER. */ +#define STYP_LOADER 0x1000 /* Specifies an exception section. A section of this type provides information to identify the reason that a trap or ececptin occured within and executable object program */ #define STYP_EXCEPT 0x0100 +/* Specifies an initialized thread-local data section. */ +#define STYP_TDATA 0x0400 + +/* Specifies an uninitialized thread-local data section. */ +#define STYP_TBSS 0x0800 + +/* XCOFF uses a special .debug section with type STYP_DEBUG. */ +#define STYP_DEBUG 0x2000 + /* Specifies a type check section. A section of this type contains parameter argument type check strings used by the AIX binder. */ #define STYP_TYPCHK 0x4000 +/* XCOFF handles line number or relocation overflow by creating + another section header with STYP_OVRFLO set. */ +#define STYP_OVRFLO 0x8000 + #define RS6K_AOUTHDR_OMAGIC 0x0107 /* old: text & data writeable */ #define RS6K_AOUTHDR_NMAGIC 0x0108 /* new: text r/o, data r/w */ #define RS6K_AOUTHDR_ZMAGIC 0x010B /* paged: text r/o, both page-aligned */ @@ -84,6 +120,14 @@ #define R_RBAC (0x19) #define R_RBR (0x1a) #define R_RBRC (0x1b) +#define R_TLS (0x20) +#define R_TLS_IE (0x21) +#define R_TLS_LD (0x22) +#define R_TLS_LE (0x23) +#define R_TLSM (0x24) +#define R_TLSML (0x25) +#define R_TOCU (0x30) +#define R_TOCL (0x31) /* Storage class #defines, from /usr/include/storclass.h that are not already defined in internal.h */ @@ -91,6 +135,9 @@ /* Comment string in .info section */ #define C_INFO 110 +/* Dwarf symbol. */ +#define C_DWARF 112 + /* Auxillary Symbol Entries */ /* x_smtyp values: */ diff --git a/include/demangle.h b/include/demangle.h index c062455..53f6c54 100644 --- a/include/demangle.h +++ b/include/demangle.h @@ -45,7 +45,13 @@ extern "C" { #define DMGL_VERBOSE (1 << 3) /* Include implementation details. */ #define DMGL_TYPES (1 << 4) /* Also try to demangle type encodings. */ #define DMGL_RET_POSTFIX (1 << 5) /* Print function return types (when - present) after function signature */ + present) after function signature. + It applies only to the toplevel + function type. */ +#define DMGL_RET_DROP (1 << 6) /* Suppress printing function return + types, even if present. It applies + only to the toplevel function type. + */ #define DMGL_AUTO (1 << 8) #define DMGL_GNU (1 << 9) diff --git a/include/dis-asm.h b/include/dis-asm.h index 63366d9..d654211 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -1,7 +1,7 @@ /* Interface between the opcode library and its callers. - Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2009, 2010 - Free Software Foundation, Inc. + Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2009, 2010, + 2011 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -286,6 +286,8 @@ extern int print_insn_tic4x (bfd_vma, disassemble_info *); extern int print_insn_tic54x (bfd_vma, disassemble_info *); extern int print_insn_tic6x (bfd_vma, disassemble_info *); extern int print_insn_tic80 (bfd_vma, disassemble_info *); +extern int print_insn_tilegx (bfd_vma, disassemble_info *); +extern int print_insn_tilepro (bfd_vma, disassemble_info *); extern int print_insn_v850 (bfd_vma, disassemble_info *); extern int print_insn_vax (bfd_vma, disassemble_info *); extern int print_insn_w65 (bfd_vma, disassemble_info *); diff --git a/include/dwarf2.h b/include/dwarf2.h index 44b4328..37cb83f 100644 --- a/include/dwarf2.h +++ b/include/dwarf2.h @@ -366,6 +366,8 @@ enum dwarf_attribute DW_AT_GNU_all_tail_call_sites = 0x2116, DW_AT_GNU_all_call_sites = 0x2117, DW_AT_GNU_all_source_call_sites = 0x2118, + /* Section offset into .debug_macro section. */ + DW_AT_GNU_macros = 0x2119, /* VMS extensions. */ DW_AT_VMS_rtnbeg_pd_address = 0x2201, /* GNAT extensions. */ @@ -556,6 +558,15 @@ enum dwarf_location_atom /* The GNU entry value extension. See http://www.dwarfstd.org/ShowIssue.php?issue=100909.1&type=open . */ DW_OP_GNU_entry_value = 0xf3, + /* The GNU typed stack extension. + See http://www.dwarfstd.org/doc/040408.1.html . */ + DW_OP_GNU_const_type = 0xf4, + DW_OP_GNU_regval_type = 0xf5, + DW_OP_GNU_deref_type = 0xf6, + DW_OP_GNU_convert = 0xf7, + DW_OP_GNU_reinterpret = 0xf9, + /* The GNU parameter ref extension. */ + DW_OP_GNU_parameter_ref = 0xfa, /* HP extensions. */ DW_OP_HP_unknown = 0xe0, /* Ouch, the same as GNU_push_tls_address. */ DW_OP_HP_is_value = 0xe1, @@ -870,6 +881,20 @@ enum dwarf_macinfo_record_type DW_MACINFO_end_file = 4, DW_MACINFO_vendor_ext = 255 }; + +/* Names and codes for new style macro information. */ +enum dwarf_macro_record_type + { + DW_MACRO_GNU_define = 1, + DW_MACRO_GNU_undef = 2, + DW_MACRO_GNU_start_file = 3, + DW_MACRO_GNU_end_file = 4, + DW_MACRO_GNU_define_indirect = 5, + DW_MACRO_GNU_undef_indirect = 6, + DW_MACRO_GNU_transparent_include = 7, + DW_MACRO_GNU_lo_user = 0xe0, + DW_MACRO_GNU_hi_user = 0xff + }; /* @@@ For use with GNU frame unwind information. */ diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index a43b34d..3b2c88b 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,87 @@ +2011-10-25 Alan Modra + + Apply mainline patches + 2011-10-10 Alan Modra + * ppc64.h (R_PPC64_TOCSAVE): Add. + +2011-09-21 David S. Miller + + * sparc.h (Tag_GNU_Sparc_HWCAPS): New object attribute. + (ELF_SPARC_HWCAP_*): New HWCAPS bitmask values. + +2011-08-12 H.J. Lu + + PR ld/13082 + * x86-64.h (R_X86_64_RELATIVE64): New. + +2011-07-24 Chao-ying Fu + Maciej W. Rozycki + + * mips.h (R_MICROMIPS_min): New relocations. + (R_MICROMIPS_26_S1): Likewise. + (R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise. + (R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise. + (R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise. + (R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise. + (R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise. + (R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise. + (R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise. + (R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise. + (R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise. + (R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise. + (R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise. + (R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise. + (R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise. + (R_MICROMIPS_TLS_GOTTPREL): Likewise. + (R_MICROMIPS_TLS_TPREL_HI16): Likewise. + (R_MICROMIPS_TLS_TPREL_LO16): Likewise. + (R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise. + (R_MICROMIPS_max): Likewise. + (EF_MIPS_ARCH_ASE_MICROMIPS): New macro. + (STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise. + (ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise. + (STO_MICROMIPS): Likewise. + (ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise. + (ELF_ST_IS_COMPRESSED): Likewise. + (STO_MIPS_PLT, STO_MIPS_PIC): Rework. + (ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise. + (STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise. + +2011-07-22 H.J. Lu + + * common.h (EM_K1OM): New. + +2011-07-03 Samuel Thibault + Thomas Schwinge + + PR binutils/12913 + * common.h (ELFOSABI_GNU): Define, replaces... + (ELFOSABI_LINUX): ... this, kept as an alias. + (ELFOSABI_HURD): Remove. + +2011-06-15 Ulrich Weigand + + * common.h (NT_ARM_VFP): Define. + +2011-06-13 Walter Lee + + * common.h: Add EM_TILEGX. + * tilegx.h: New file. + * tilepro.h: New file. + +2011-06-09 Tristan Gingold + + * ia64.h (Elf64_External_VMS_ORIG_DYN_Note): New struct. + +2011-06-02 Nick Clifton + + * common.h: Fix spelling mistake in comment. + * reloc-macros.h: Likewise. + +2011-05-31 Paul Brook + + * arm.h (arm_st_branch_type): Add ST_BRANCH_UNKNOWN. + 2011-04-15 Sergio Durigan Junior * common.h (NT_STAPSDT): New define. @@ -43,6 +127,11 @@ R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New relocations. +2010-11-16 Jie Zhang + + * bfin.h (EF_BFIN_CODE_IN_L1): Define. + (EF_BFIN_DATA_IN_L1): Define. + 2010-11-11 Mingming Sun * mips.h (E_MIPS_MACH_LS3A): Defined. diff --git a/include/elf/arm.h b/include/elf/arm.h index 5b01835..860fdf7 100644 --- a/include/elf/arm.h +++ b/include/elf/arm.h @@ -328,7 +328,8 @@ enum enum arm_st_branch_type { ST_BRANCH_TO_ARM, ST_BRANCH_TO_THUMB, - ST_BRANCH_LONG + ST_BRANCH_LONG, + ST_BRANCH_UNKNOWN }; #define ARM_SYM_BRANCH_TYPE(SYM) \ diff --git a/include/elf/common.h b/include/elf/common.h index d48c32c..e46ae33 100644 --- a/include/elf/common.h +++ b/include/elf/common.h @@ -62,8 +62,8 @@ #define ELFOSABI_NONE 0 /* UNIX System V ABI */ #define ELFOSABI_HPUX 1 /* HP-UX operating system */ #define ELFOSABI_NETBSD 2 /* NetBSD */ -#define ELFOSABI_LINUX 3 /* GNU/Linux */ -#define ELFOSABI_HURD 4 /* GNU/Hurd */ +#define ELFOSABI_GNU 3 /* GNU */ +#define ELFOSABI_LINUX 3 /* Alias for ELFOSABI_GNU */ #define ELFOSABI_SOLARIS 6 /* Solaris */ #define ELFOSABI_AIX 7 /* AIX */ #define ELFOSABI_IRIX 8 /* IRIX */ @@ -159,7 +159,7 @@ #define EM_MMA 54 /* Fujitsu Multimedia Accelerator */ #define EM_PCP 55 /* Siemens PCP */ #define EM_NCPU 56 /* Sony nCPU embedded RISC processor */ -#define EM_NDR1 57 /* Denso NDR1 microprocesspr */ +#define EM_NDR1 57 /* Denso NDR1 microprocessor */ #define EM_STARCORE 58 /* Motorola Star*Core processor */ #define EM_ME16 59 /* Toyota ME16 processor */ #define EM_ST100 60 /* STMicroelectronics ST100 processor */ @@ -285,7 +285,7 @@ #define EM_ETPU 178 /* Freescale Extended Time Processing Unit */ #define EM_SLE9X 179 /* Infineon Technologies SLE9X core */ #define EM_L1OM 180 /* Intel L1OM */ -#define EM_INTEL181 181 /* Reserved by Intel */ +#define EM_K1OM 181 /* Intel K1OM */ #define EM_INTEL182 182 /* Reserved by Intel */ #define EM_res183 183 /* Reserved by ARM */ #define EM_res184 184 /* Reserved by ARM */ @@ -295,6 +295,7 @@ #define EM_TILEPRO 188 /* Tilera TILEPro multicore architecture family */ #define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ #define EM_CUDA 190 /* NVIDIA CUDA architecture */ +#define EM_TILEGX 191 /* Tilera TILE-Gx multicore architecture family */ /* If it is necessary to assign new unofficial EM_* values, please pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision @@ -538,6 +539,8 @@ /* note name must be "LINUX". */ #define NT_S390_PREFIX 0x305 /* S390 prefix register */ /* note name must be "LINUX". */ +#define NT_ARM_VFP 0x400 /* ARM VFP registers */ + /* note name must be "LINUX". */ /* Note segments for core files on dir-style procfs systems. */ diff --git a/include/elf/ia64.h b/include/elf/ia64.h index 5b62173..d8f6f50 100644 --- a/include/elf/ia64.h +++ b/include/elf/ia64.h @@ -256,6 +256,18 @@ typedef struct { #define NT_VMS_ORIG_DYN 107 /* Original setting of dynamic data. */ #define NT_VMS_PATCHTIME 108 /* Date/time of last patch. */ +/* Corresponding data for NT_VMS_ORIG_DYM. */ + +typedef struct { + unsigned char major_id[4]; /* Should be 1. */ + unsigned char minor_id[4]; /* Should be 3. */ + unsigned char manipulation_date[8]; /* Original NT_VMS_LNKTIME. */ + unsigned char link_flags[8]; /* Original NT_VMS_LNKFLAGS. */ + unsigned char elf_flags[4]; /* Original ehdr flags. */ + unsigned char _pad[4]; + unsigned char imgid[1]; /* Original NT_VMS_IMGID. */ +} Elf64_External_VMS_ORIG_DYN_Note; + /* IA64-specific relocation types: */ /* Relocs apply to specific instructions within a bundle. The least diff --git a/include/elf/mips.h b/include/elf/mips.h index c60e8fe..db5fa54 100644 --- a/include/elf/mips.h +++ b/include/elf/mips.h @@ -102,6 +102,48 @@ START_RELOC_NUMBERS (elf_mips_reloc_type) /* These relocations are specific to VxWorks. */ RELOC_NUMBER (R_MIPS_COPY, 126) RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127) + + /* These relocations are specific to microMIPS. */ + FAKE_RELOC (R_MICROMIPS_min, 130) + RELOC_NUMBER (R_MICROMIPS_26_S1, 133) + RELOC_NUMBER (R_MICROMIPS_HI16, 134) + RELOC_NUMBER (R_MICROMIPS_LO16, 135) + RELOC_NUMBER (R_MICROMIPS_GPREL16, 136) /* In Elf 64: + alias R_MICROMIPS_GPREL */ + RELOC_NUMBER (R_MICROMIPS_LITERAL, 137) + RELOC_NUMBER (R_MICROMIPS_GOT16, 138) /* In Elf 64: + alias R_MICROMIPS_GOT */ + RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139) + RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140) + RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141) + RELOC_NUMBER (R_MICROMIPS_CALL16, 142) /* In Elf 64: + alias R_MICROMIPS_CALL */ + RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145) + RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146) + RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147) + RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148) + RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149) + RELOC_NUMBER (R_MICROMIPS_SUB, 150) + RELOC_NUMBER (R_MICROMIPS_HIGHER, 151) + RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152) + RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153) + RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154) + RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155) + RELOC_NUMBER (R_MICROMIPS_JALR, 156) + RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157) + /* TLS relocations. */ + RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162) + RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163) + RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164) + RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165) + RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166) + RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169) + RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170) + /* microMIPS GP- and PC-relative relocations. */ + RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172) + RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173) + FAKE_RELOC (R_MICROMIPS_max, 174) + /* This was a GNU extension used by embedded-PIC. It was co-opted by mips-linux for exception-handling data. It is no longer used, but should continue to be supported by the linker for backward @@ -147,6 +189,9 @@ END_RELOC_NUMBERS (R_MIPS_maxext) /* Use MIPS-16 ISA extensions */ #define EF_MIPS_ARCH_ASE_M16 0x04000000 +/* Use MICROMIPS ISA extensions. */ +#define EF_MIPS_ARCH_ASE_MICROMIPS 0x02000000 + /* Indicates code compiled for a 64-bit machine in 32-bit mode. (regs are 32-bits wide.) */ #define EF_MIPS_32BITMODE 0x00000100 @@ -733,24 +778,49 @@ extern void bfd_mips_elf32_swap_reginfo_out #define STO_HIDDEN STV_HIDDEN #define STO_PROTECTED STV_PROTECTED +/* Two topmost bits denote the MIPS ISA for .text symbols: + + 00 -- standard MIPS code, + + 10 -- microMIPS code, + + 11 -- MIPS16 code; requires the following two bits to be set too. + Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC. See below + for details. */ +#define STO_MIPS_ISA (3 << 6) + +/* The mask spanning the rest of MIPS psABI flags. At most one is expected + to be set except for STO_MIPS16. */ +#define STO_MIPS_FLAGS (~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1))) + /* The MIPS psABI was updated in 2008 with support for PLTs and copy relocs. There are therefore two types of nonzero SHN_UNDEF functions: PLT entries and traditional MIPS lazy binding stubs. We mark the former with STO_MIPS_PLT to distinguish them from the latter. */ #define STO_MIPS_PLT 0x8 +#define ELF_ST_IS_MIPS_PLT(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PLT) +#define ELF_ST_SET_MIPS_PLT(other) (((other) & ~STO_MIPS_FLAGS) | STO_MIPS_PLT) /* This value is used to mark PIC functions in an object that mixes - PIC and non-PIC. */ + PIC and non-PIC. Note that this bit overlaps with STO_MIPS16, + although MIPS16 symbols are never considered to be MIPS_PIC. */ #define STO_MIPS_PIC 0x20 -#define ELF_ST_IS_MIPS_PIC(OTHER) \ - (((OTHER) & ~ELF_ST_VISIBILITY (-1)) == STO_MIPS_PIC) -#define ELF_ST_SET_MIPS_PIC(OTHER) \ - (STO_MIPS_PIC | ELF_ST_VISIBILITY (OTHER)) +#define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC) +#define ELF_ST_SET_MIPS_PIC(other) (((other) & ~STO_MIPS_FLAGS) | STO_MIPS_PIC) /* This value is used for a mips16 .text symbol. */ #define STO_MIPS16 0xf0 -#define ELF_ST_IS_MIPS16(OTHER) (((OTHER) & 0xf0) == STO_MIPS16) -#define ELF_ST_SET_MIPS16(OTHER) (((OTHER) & ~0xf0) | STO_MIPS16) +#define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16) +#define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16) + +/* This value is used for a microMIPS .text symbol. To distinguish from + STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS. The + mask is STO_MIPS_ISA. */ +#define STO_MICROMIPS (2 << 6) +#define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS) +#define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS) + +/* Whether code compression (either of the MIPS16 or the microMIPS ASEs) + has been indicated for a .text symbol. */ +#define ELF_ST_IS_COMPRESSED(other) \ + (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other)) /* This bit is used on Irix to indicate a symbol whose definition is optional - if, at final link time, it cannot be found, no diff --git a/include/elf/ppc.h b/include/elf/ppc.h index 688cb9b..8e27855 100644 --- a/include/elf/ppc.h +++ b/include/elf/ppc.h @@ -166,6 +166,10 @@ END_RELOC_NUMBERS (R_PPC_max) #define EF_PPC_RELOCATABLE 0x00010000 /* PowerPC -mrelocatable flag. */ #define EF_PPC_RELOCATABLE_LIB 0x00008000 /* PowerPC -mrelocatable-lib flag. */ +/* This bit is reserved by BFD for processor specific stuff. Name + it properly so that we can easily stay consistent elsewhere. */ +#define SEC_PPC_VLE SEC_TIC54X_BLOCK + /* Processor specific section headers, sh_type field. */ #define SHT_ORDERED SHT_HIPROC /* Link editor is to sort the \ diff --git a/include/elf/ppc64.h b/include/elf/ppc64.h index a18edd6..f1c80f1 100644 --- a/include/elf/ppc64.h +++ b/include/elf/ppc64.h @@ -1,5 +1,5 @@ /* PPC64 ELF support for BFD. - Copyright 2003, 2005, 2009, 2010 Free Software Foundation, Inc. + Copyright 2003, 2005, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -139,6 +139,7 @@ START_RELOC_NUMBERS (elf_ppc64_reloc_type) RELOC_NUMBER (R_PPC64_DTPREL16_HIGHESTA, 106) RELOC_NUMBER (R_PPC64_TLSGD, 107) RELOC_NUMBER (R_PPC64_TLSLD, 108) + RELOC_NUMBER (R_PPC64_TOCSAVE, 109) #ifndef RELOC_MACROS_GEN_FUNC /* Fake relocation only used internally by ld. */ diff --git a/include/elf/reloc-macros.h b/include/elf/reloc-macros.h index c0228a9..92fc9c1 100644 --- a/include/elf/reloc-macros.h +++ b/include/elf/reloc-macros.h @@ -1,5 +1,5 @@ /* Generic relocation support for BFD. - Copyright 1998, 1999, 2000, 2003, 2010 Free Software Foundation, Inc. + Copyright 1998, 1999, 2000, 2003, 2010, 2011 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -45,10 +45,10 @@ Note: The value of the symbol defined in the END_RELOC_NUMBERS macro (R_foo_count in the case of the example above) will be - set to the value of the whichever *_RELOC macro preceeds it plus + set to the value of the whichever *_RELOC macro precedes it plus one. Therefore if you intend to use the symbol as a sentinel for the highest valid macro value you should make sure that the - preceeding *_RELOC macro is the highest valid number. ie a + preceding *_RELOC macro is the highest valid number. ie a declaration like this: START_RELOC_NUMBERS (foo) diff --git a/include/elf/sparc.h b/include/elf/sparc.h index 4247151..fc8a765 100644 --- a/include/elf/sparc.h +++ b/include/elf/sparc.h @@ -1,5 +1,6 @@ /* SPARC ELF support for BFD. - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2008, 2010 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2008, 2010, + 2011 Free Software Foundation, Inc. By Doug Evans, Cygnus Support, . @@ -185,4 +186,31 @@ END_RELOC_NUMBERS (R_SPARC_max) #define DT_SPARC_REGISTER 0x70000001 +/* Object attribute tags. */ +enum +{ + /* 0-3 are generic. */ + Tag_GNU_Sparc_HWCAPS = 4, +}; + +/* These values match the AV_SPARC_* hwcap bits defined under Solaris. */ +#define ELF_SPARC_HWCAP_MUL32 0x00000001 /* umul/umulcc/smul/smulcc insns */ +#define ELF_SPARC_HWCAP_DIV32 0x00000002 /* udiv/udivcc/sdiv/sdivcc insns */ +#define ELF_SPARC_HWCAP_FSMULD 0x00000004 /* 'fsmuld' insn */ +#define ELF_SPARC_HWCAP_V8PLUS 0x00000008 /* v9 insns available to 32bit */ +#define ELF_SPARC_HWCAP_POPC 0x00000010 /* 'popc' insn */ +#define ELF_SPARC_HWCAP_VIS 0x00000020 /* VIS insns */ +#define ELF_SPARC_HWCAP_VIS2 0x00000040 /* VIS2 insns */ +#define ELF_SPARC_HWCAP_ASI_BLK_INIT \ + 0x00000080 /* block init ASIs */ +#define ELF_SPARC_HWCAP_FMAF 0x00000100 /* fused multiply-add */ +#define ELF_SPARC_HWCAP_VIS3 0x00000400 /* VIS3 insns */ +#define ELF_SPARC_HWCAP_HPC 0x00000800 /* HPC insns */ +#define ELF_SPARC_HWCAP_RANDOM 0x00001000 /* 'random' insn */ +#define ELF_SPARC_HWCAP_TRANS 0x00002000 /* transaction insns */ +#define ELF_SPARC_HWCAP_FJFMAU 0x00004000 /* unfused multiply-add */ +#define ELF_SPARC_HWCAP_IMA 0x00008000 /* integer multiply-add */ +#define ELF_SPARC_HWCAP_ASI_CACHE_SPARING \ + 0x00010000 /* cache sparing ASIs */ + #endif /* _ELF_SPARC_H */ diff --git a/include/elf/tic6x.h b/include/elf/tic6x.h index 46f43c8..e686cc3 100644 --- a/include/elf/tic6x.h +++ b/include/elf/tic6x.h @@ -158,4 +158,10 @@ enum C6XABI_Tag_ISA_C674X = 8 }; +/* Special section names. */ +#define ELF_STRING_C6000_unwind ".c6xabi.exidx" +#define ELF_STRING_C6000_unwind_info ".c6xabi.extab" +#define ELF_STRING_C6000_unwind_once ".gnu.linkonce.c6xabi.exidx." +#define ELF_STRING_C6000_unwind_info_once ".gnu.linkonce.c6xabi.extab." + #endif /* _ELF_TIC6X_H */ diff --git a/include/elf/tilegx.h b/include/elf/tilegx.h new file mode 100644 index 0000000..d276f2e --- /dev/null +++ b/include/elf/tilegx.h @@ -0,0 +1,162 @@ +/* TILE-Gx ELF support for BFD. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#ifndef _ELF_TILEGX_H +#define _ELF_TILEGX_H + +#include "elf/reloc-macros.h" + +/* Relocations. */ +START_RELOC_NUMBERS (elf_tilegx_reloc_type) + RELOC_NUMBER (R_TILEGX_NONE, 0) + + /* Standard relocations */ + RELOC_NUMBER (R_TILEGX_64, 1) + RELOC_NUMBER (R_TILEGX_32, 2) + RELOC_NUMBER (R_TILEGX_16, 3) + RELOC_NUMBER (R_TILEGX_8, 4) + RELOC_NUMBER (R_TILEGX_64_PCREL, 5) + RELOC_NUMBER (R_TILEGX_32_PCREL, 6) + RELOC_NUMBER (R_TILEGX_16_PCREL, 7) + RELOC_NUMBER (R_TILEGX_8_PCREL, 8) + + /* Custom relocations */ + + RELOC_NUMBER (R_TILEGX_HW0, 9) + RELOC_NUMBER (R_TILEGX_HW1, 10) + RELOC_NUMBER (R_TILEGX_HW2, 11) + RELOC_NUMBER (R_TILEGX_HW3, 12) + RELOC_NUMBER (R_TILEGX_HW0_LAST, 13) + RELOC_NUMBER (R_TILEGX_HW1_LAST, 14) + RELOC_NUMBER (R_TILEGX_HW2_LAST, 15) + + RELOC_NUMBER (R_TILEGX_COPY, 16) + RELOC_NUMBER (R_TILEGX_GLOB_DAT, 17) + RELOC_NUMBER (R_TILEGX_JMP_SLOT, 18) + RELOC_NUMBER (R_TILEGX_RELATIVE, 19) + + /* Branch/jump offsets */ + RELOC_NUMBER (R_TILEGX_BROFF_X1, 20) + RELOC_NUMBER (R_TILEGX_JUMPOFF_X1, 21) + RELOC_NUMBER (R_TILEGX_JUMPOFF_X1_PLT, 22) + + /* Immediate operands. */ + RELOC_NUMBER (R_TILEGX_IMM8_X0, 23) + RELOC_NUMBER (R_TILEGX_IMM8_Y0, 24) + RELOC_NUMBER (R_TILEGX_IMM8_X1, 25) + RELOC_NUMBER (R_TILEGX_IMM8_Y1, 26) + RELOC_NUMBER (R_TILEGX_DEST_IMM8_X1, 27) + RELOC_NUMBER (R_TILEGX_MT_IMM14_X1, 28) + RELOC_NUMBER (R_TILEGX_MF_IMM14_X1, 29) + RELOC_NUMBER (R_TILEGX_MMSTART_X0, 30) + RELOC_NUMBER (R_TILEGX_MMEND_X0, 31) + RELOC_NUMBER (R_TILEGX_SHAMT_X0, 32) + RELOC_NUMBER (R_TILEGX_SHAMT_X1, 33) + RELOC_NUMBER (R_TILEGX_SHAMT_Y0, 34) + RELOC_NUMBER (R_TILEGX_SHAMT_Y1, 35) + + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0, 36) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0, 37) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1, 38) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1, 39) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2, 40) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2, 41) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW3, 42) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW3, 43) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_LAST, 44) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_LAST, 45) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_LAST, 46) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_LAST, 47) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_LAST, 48) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_LAST, 49) + + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_PCREL, 50) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_PCREL, 51) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_PCREL, 52) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_PCREL, 53) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_PCREL, 54) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_PCREL, 55) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW3_PCREL, 56) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW3_PCREL, 57) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_LAST_PCREL, 58) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_LAST_PCREL, 59) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_LAST_PCREL, 60) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_LAST_PCREL, 61) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_LAST_PCREL, 62) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_LAST_PCREL, 63) + + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_GOT, 64) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_GOT, 65) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_GOT, 66) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_GOT, 67) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_GOT, 68) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_GOT, 69) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW3_GOT, 70) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW3_GOT, 71) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_LAST_GOT, 72) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_LAST_GOT, 73) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_LAST_GOT, 74) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_LAST_GOT, 75) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_LAST_GOT, 76) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_LAST_GOT, 77) + + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_TLS_GD, 78) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_TLS_GD, 79) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_TLS_GD, 80) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_TLS_GD, 81) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_TLS_GD, 82) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_TLS_GD, 83) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW3_TLS_GD, 84) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW3_TLS_GD, 85) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD, 86) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD, 87) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD, 88) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD, 89) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD, 90) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD, 91) + + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_TLS_IE, 92) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_TLS_IE, 93) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_TLS_IE, 94) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_TLS_IE, 95) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_TLS_IE, 96) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_TLS_IE, 97) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW3_TLS_IE, 98) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW3_TLS_IE, 99) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE, 100) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE, 101) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE, 102) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE, 103) + RELOC_NUMBER (R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE, 104) + RELOC_NUMBER (R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE, 105) + + RELOC_NUMBER (R_TILEGX_TLS_DTPMOD64, 106) + RELOC_NUMBER (R_TILEGX_TLS_DTPOFF64, 107) + RELOC_NUMBER (R_TILEGX_TLS_TPOFF64, 108) + RELOC_NUMBER (R_TILEGX_TLS_DTPMOD32, 109) + RELOC_NUMBER (R_TILEGX_TLS_DTPOFF32, 110) + RELOC_NUMBER (R_TILEGX_TLS_TPOFF32, 111) + +/* These are GNU extensions to enable C++ vtable garbage collection. */ + RELOC_NUMBER (R_TILEGX_GNU_VTINHERIT, 128) + RELOC_NUMBER (R_TILEGX_GNU_VTENTRY, 129) +END_RELOC_NUMBERS (R_TILEGX_max) + +#endif /* _ELF_TILEGX_H */ diff --git a/include/elf/tilepro.h b/include/elf/tilepro.h new file mode 100644 index 0000000..899697f --- /dev/null +++ b/include/elf/tilepro.h @@ -0,0 +1,128 @@ +/* TILEPro ELF support for BFD. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#ifndef _ELF_TILEPRO_H +#define _ELF_TILEPRO_H + +#include "elf/reloc-macros.h" + +/* Relocations. */ +START_RELOC_NUMBERS (elf_tilepro_reloc_type) + RELOC_NUMBER (R_TILEPRO_NONE, 0) + + /* Standard relocations */ + RELOC_NUMBER (R_TILEPRO_32, 1) + RELOC_NUMBER (R_TILEPRO_16, 2) + RELOC_NUMBER (R_TILEPRO_8, 3) + RELOC_NUMBER (R_TILEPRO_32_PCREL, 4) + RELOC_NUMBER (R_TILEPRO_16_PCREL, 5) + RELOC_NUMBER (R_TILEPRO_8_PCREL, 6) + + RELOC_NUMBER (R_TILEPRO_LO16, 7) + RELOC_NUMBER (R_TILEPRO_HI16, 8) + RELOC_NUMBER (R_TILEPRO_HA16, 9) + + RELOC_NUMBER (R_TILEPRO_COPY, 10) + RELOC_NUMBER (R_TILEPRO_GLOB_DAT, 11) + RELOC_NUMBER (R_TILEPRO_JMP_SLOT, 12) + RELOC_NUMBER (R_TILEPRO_RELATIVE, 13) + + /* Branch/jump offsets */ + RELOC_NUMBER (R_TILEPRO_BROFF_X1, 14) + RELOC_NUMBER (R_TILEPRO_JOFFLONG_X1, 15) + RELOC_NUMBER (R_TILEPRO_JOFFLONG_X1_PLT, 16) + + /* Immediate operands. */ + RELOC_NUMBER (R_TILEPRO_IMM8_X0, 17) + RELOC_NUMBER (R_TILEPRO_IMM8_Y0, 18) + RELOC_NUMBER (R_TILEPRO_IMM8_X1, 19) + RELOC_NUMBER (R_TILEPRO_IMM8_Y1, 20) + RELOC_NUMBER (R_TILEPRO_MT_IMM15_X1, 21) + RELOC_NUMBER (R_TILEPRO_MF_IMM15_X1, 22) + + RELOC_NUMBER (R_TILEPRO_IMM16_X0, 23) + RELOC_NUMBER (R_TILEPRO_IMM16_X1, 24) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_LO, 25) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_LO, 26) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_HI, 27) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_HI, 28) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_HA, 29) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_HA, 30) + + RELOC_NUMBER (R_TILEPRO_IMM16_X0_PCREL, 31) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_PCREL, 32) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_LO_PCREL, 33) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_LO_PCREL, 34) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_HI_PCREL, 35) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_HI_PCREL, 36) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_HA_PCREL, 37) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_HA_PCREL, 38) + + RELOC_NUMBER (R_TILEPRO_IMM16_X0_GOT, 39) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_GOT, 40) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_GOT_LO, 41) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_GOT_LO, 42) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_GOT_HI, 43) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_GOT_HI, 44) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_GOT_HA, 45) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_GOT_HA, 46) + + RELOC_NUMBER (R_TILEPRO_MMSTART_X0, 47) + RELOC_NUMBER (R_TILEPRO_MMEND_X0, 48) + RELOC_NUMBER (R_TILEPRO_MMSTART_X1, 49) + RELOC_NUMBER (R_TILEPRO_MMEND_X1, 50) + + RELOC_NUMBER (R_TILEPRO_SHAMT_X0, 51) + RELOC_NUMBER (R_TILEPRO_SHAMT_X1, 52) + RELOC_NUMBER (R_TILEPRO_SHAMT_Y0, 53) + RELOC_NUMBER (R_TILEPRO_SHAMT_Y1, 54) + + RELOC_NUMBER (R_TILEPRO_DEST_IMM8_X1, 55) + + /* Relocs 56-65 are currently not defined. */ + + RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_GD, 66) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_GD, 67) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_GD_LO, 68) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_GD_LO, 69) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_GD_HI, 70) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_GD_HI, 71) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_GD_HA, 72) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_GD_HA, 73) + + RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_IE, 74) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_IE, 75) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_IE_LO, 76) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_IE_LO, 77) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_IE_HI, 78) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_IE_HI, 79) + RELOC_NUMBER (R_TILEPRO_IMM16_X0_TLS_IE_HA, 80) + RELOC_NUMBER (R_TILEPRO_IMM16_X1_TLS_IE_HA, 81) + + RELOC_NUMBER (R_TILEPRO_TLS_DTPMOD32, 82) + RELOC_NUMBER (R_TILEPRO_TLS_DTPOFF32, 83) + RELOC_NUMBER (R_TILEPRO_TLS_TPOFF32, 84) + +/* These are GNU extensions to enable C++ vtable garbage collection. */ + RELOC_NUMBER (R_TILEPRO_GNU_VTINHERIT, 128) + RELOC_NUMBER (R_TILEPRO_GNU_VTENTRY, 129) +END_RELOC_NUMBERS (R_TILEPRO_max) + +#endif /* _ELF_TILEPRO_H */ diff --git a/include/elf/x86-64.h b/include/elf/x86-64.h index 56254d2..9022f84 100644 --- a/include/elf/x86-64.h +++ b/include/elf/x86-64.h @@ -72,6 +72,7 @@ START_RELOC_NUMBERS (elf_x86_64_reloc_type) descriptor. */ RELOC_NUMBER (R_X86_64_TLSDESC, 36) /* 2x64-bit TLS descriptor. */ RELOC_NUMBER (R_X86_64_IRELATIVE, 37) /* Adjust indirectly by program base */ + RELOC_NUMBER (R_X86_64_RELATIVE64, 38) /* 64bit adjust by program base */ RELOC_NUMBER (R_X86_64_GNU_VTINHERIT, 250) /* GNU C++ hack */ RELOC_NUMBER (R_X86_64_GNU_VTENTRY, 251) /* GNU C++ hack */ END_RELOC_NUMBERS (R_X86_64_max) diff --git a/include/filenames.h b/include/filenames.h index d4955df..75ec330 100644 --- a/include/filenames.h +++ b/include/filenames.h @@ -34,10 +34,18 @@ extern "C" { # ifndef HAVE_DOS_BASED_FILE_SYSTEM # define HAVE_DOS_BASED_FILE_SYSTEM 1 # endif +# ifndef HAVE_CASE_INSENSITIVE_FILE_SYSTEM +# define HAVE_CASE_INSENSITIVE_FILE_SYSTEM 1 +# endif # define HAS_DRIVE_SPEC(f) HAS_DOS_DRIVE_SPEC (f) # define IS_DIR_SEPARATOR(c) IS_DOS_DIR_SEPARATOR (c) # define IS_ABSOLUTE_PATH(f) IS_DOS_ABSOLUTE_PATH (f) #else /* not DOSish */ +# if defined(__APPLE__) +# ifndef HAVE_CASE_INSENSITIVE_FILE_SYSTEM +# define HAVE_CASE_INSENSITIVE_FILE_SYSTEM 1 +# endif +# endif /* __APPLE__ */ # define HAS_DRIVE_SPEC(f) (0) # define IS_DIR_SEPARATOR(c) IS_UNIX_DIR_SEPARATOR (c) # define IS_ABSOLUTE_PATH(f) IS_UNIX_ABSOLUTE_PATH (f) diff --git a/include/libiberty.h b/include/libiberty.h index 1cc7250..32eb83a 100644 --- a/include/libiberty.h +++ b/include/libiberty.h @@ -1,7 +1,7 @@ /* Function declarations for libiberty. Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, - 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Note - certain prototypes declared in this header file are for functions whoes implementation copyright does not belong to the @@ -637,6 +637,9 @@ extern int strverscmp (const char *, const char *); /* Set the title of a process */ extern void setproctitle (const char *name, ...); +/* Increase stack limit if possible. */ +extern void stack_limit_increase (unsigned long); + #define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0])) /* Drastically simplified alloca configurator. If we're using GCC, diff --git a/include/mach-o/ChangeLog b/include/mach-o/ChangeLog new file mode 100644 index 0000000..2276d01 --- /dev/null +++ b/include/mach-o/ChangeLog @@ -0,0 +1,19 @@ +2011-08-08 Tristan Gingold + + * loader.h (bfd_mach_o_load_command_type): Add + BFD_MACH_O_LC_LOAD_UPWARD_DYLIB, BFD_MACH_O_LC_VERSION_MIN_MACOSX, + BFD_MACH_O_LC_VERSION_MIN_IPHONEOS, BFD_MACH_O_LC_FUNCTION_STARTS, + and BFD_MACH_O_LC_DYLD_ENVIRONMENT. + * external.h (mach_o_version_min_command_external): New structure. + +2011-08-08 Tristan Gingold + + * loader.h: Reorder declarations. + * x86-64.h: New file. + * external.h: New file. + * reloc.h: New file. + +2011-07-06 Tristan Gingold + + * loader.h: New file. + diff --git a/include/mach-o/external.h b/include/mach-o/external.h new file mode 100644 index 0000000..ebb09a7 --- /dev/null +++ b/include/mach-o/external.h @@ -0,0 +1,273 @@ +/* Mach-O support for BFD. + Copyright 2011 + Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#ifndef _MACH_O_EXTERNAL_H +#define _MACH_O_EXTERNAL_H + +struct mach_o_header_external +{ + unsigned char magic[4]; /* Magic number. */ + unsigned char cputype[4]; /* CPU that this object is for. */ + unsigned char cpusubtype[4]; /* CPU subtype. */ + unsigned char filetype[4]; /* Type of file. */ + unsigned char ncmds[4]; /* Number of load commands. */ + unsigned char sizeofcmds[4]; /* Total size of load commands. */ + unsigned char flags[4]; /* Flags. */ + unsigned char reserved[4]; /* Reserved (on 64-bit version only). */ +}; + +#define BFD_MACH_O_HEADER_SIZE 28 +#define BFD_MACH_O_HEADER_64_SIZE 32 + +/* 32-bit section header. */ + +struct mach_o_section_32_external +{ + unsigned char sectname[16]; /* Section name. */ + unsigned char segname[16]; /* Segment that the section belongs to. */ + unsigned char addr[4]; /* Address of this section in memory. */ + unsigned char size[4]; /* Size in bytes of this section. */ + unsigned char offset[4]; /* File offset of this section. */ + unsigned char align[4]; /* log2 of this section's alignment. */ + unsigned char reloff[4]; /* File offset of this section's relocs. */ + unsigned char nreloc[4]; /* Number of relocs for this section. */ + unsigned char flags[4]; /* Section flags/attributes. */ + unsigned char reserved1[4]; + unsigned char reserved2[4]; +}; +#define BFD_MACH_O_SECTION_SIZE 68 + +/* 64-bit section header. */ + +struct mach_o_section_64_external +{ + unsigned char sectname[16]; /* Section name. */ + unsigned char segname[16]; /* Segment that the section belongs to. */ + unsigned char addr[8]; /* Address of this section in memory. */ + unsigned char size[8]; /* Size in bytes of this section. */ + unsigned char offset[4]; /* File offset of this section. */ + unsigned char align[4]; /* log2 of this section's alignment. */ + unsigned char reloff[4]; /* File offset of this section's relocs. */ + unsigned char nreloc[4]; /* Number of relocs for this section. */ + unsigned char flags[4]; /* Section flags/attributes. */ + unsigned char reserved1[4]; + unsigned char reserved2[4]; + unsigned char reserved3[4]; +}; +#define BFD_MACH_O_SECTION_64_SIZE 80 + +struct mach_o_load_command_external +{ + unsigned char cmd[4]; /* The type of load command. */ + unsigned char cmdsize[4]; /* Size in bytes of entire command. */ +}; +#define BFD_MACH_O_LC_SIZE 8 + +struct mach_o_segment_command_32_external +{ + unsigned char segname[16]; /* Name of this segment. */ + unsigned char vmaddr[4]; /* Virtual memory address of this segment. */ + unsigned char vmsize[4]; /* Size there, in bytes. */ + unsigned char fileoff[4]; /* Offset in bytes of the data to be mapped. */ + unsigned char filesize[4]; /* Size in bytes on disk. */ + unsigned char maxprot[4]; /* Maximum permitted vm protection. */ + unsigned char initprot[4]; /* Initial vm protection. */ + unsigned char nsects[4]; /* Number of sections in this segment. */ + unsigned char flags[4]; /* Flags that affect the loading. */ +}; +#define BFD_MACH_O_LC_SEGMENT_SIZE 56 /* Include the header. */ + +struct mach_o_segment_command_64_external +{ + unsigned char segname[16]; /* Name of this segment. */ + unsigned char vmaddr[8]; /* Virtual memory address of this segment. */ + unsigned char vmsize[8]; /* Size there, in bytes. */ + unsigned char fileoff[8]; /* Offset in bytes of the data to be mapped. */ + unsigned char filesize[8]; /* Size in bytes on disk. */ + unsigned char maxprot[4]; /* Maximum permitted vm protection. */ + unsigned char initprot[4]; /* Initial vm protection. */ + unsigned char nsects[4]; /* Number of sections in this segment. */ + unsigned char flags[4]; /* Flags that affect the loading. */ +}; +#define BFD_MACH_O_LC_SEGMENT_64_SIZE 72 /* Include the header. */ + +struct mach_o_reloc_info_external +{ + unsigned char r_address[4]; + unsigned char r_symbolnum[4]; +}; +#define BFD_MACH_O_RELENT_SIZE 8 + +struct mach_o_symtab_command_external +{ + unsigned char symoff[4]; + unsigned char nsyms[4]; + unsigned char stroff[4]; + unsigned char strsize[4]; +}; + +struct mach_o_nlist_external +{ + unsigned char n_strx[4]; + unsigned char n_type[1]; + unsigned char n_sect[1]; + unsigned char n_desc[2]; + unsigned char n_value[4]; +}; +#define BFD_MACH_O_NLIST_SIZE 12 + +struct mach_o_nlist_64_external +{ + unsigned char n_strx[4]; + unsigned char n_type[1]; + unsigned char n_sect[1]; + unsigned char n_desc[2]; + unsigned char n_value[8]; +}; +#define BFD_MACH_O_NLIST_64_SIZE 16 + +struct mach_o_thread_command_external +{ + unsigned char flavour[4]; + unsigned char count[4]; +}; + +/* For commands that just have a string or a path. */ +struct mach_o_str_command_external +{ + unsigned char str[4]; +}; + +struct mach_o_dylib_command_external +{ + unsigned char name[4]; + unsigned char timestamp[4]; + unsigned char current_version[4]; + unsigned char compatibility_version[4]; +}; + +struct mach_o_dysymtab_command_external +{ + unsigned char ilocalsym[4]; /* Index of. */ + unsigned char nlocalsym[4]; /* Number of. */ + unsigned char iextdefsym[4]; + unsigned char nextdefsym[4]; + unsigned char iundefsym[4]; + unsigned char nundefsym[4]; + unsigned char tocoff[4]; + unsigned char ntoc[4]; + unsigned char modtaboff[4]; + unsigned char nmodtab[4]; + unsigned char extrefsymoff[4]; + unsigned char nextrefsyms[4]; + unsigned char indirectsymoff[4]; + unsigned char nindirectsyms[4]; + unsigned char extreloff[4]; + unsigned char nextrel[4]; + unsigned char locreloff[4]; + unsigned char nlocrel[4]; +}; + +struct mach_o_dylib_module_external +{ + unsigned char module_name[4]; + unsigned char iextdefsym[4]; + unsigned char nextdefsym[4]; + unsigned char irefsym[4]; + unsigned char nrefsym[4]; + unsigned char ilocalsym[4]; + unsigned char nlocalsym[4]; + unsigned char iextrel[4]; + unsigned char nextrel[4]; + unsigned char iinit_iterm[4]; + unsigned char ninit_nterm[4]; + unsigned char objc_module_info_addr[4]; + unsigned char objc_module_info_size[4]; +}; +#define BFD_MACH_O_DYLIB_MODULE_SIZE 52 + +struct mach_o_dylib_module_64_external +{ + unsigned char module_name[4]; + unsigned char iextdefsym[4]; + unsigned char nextdefsym[4]; + unsigned char irefsym[4]; + unsigned char nrefsym[4]; + unsigned char ilocalsym[4]; + unsigned char nlocalsym[4]; + unsigned char iextrel[4]; + unsigned char nextrel[4]; + unsigned char iinit_iterm[4]; + unsigned char ninit_nterm[4]; + unsigned char objc_module_info_size[4]; + unsigned char objc_module_info_addr[8]; +}; +#define BFD_MACH_O_DYLIB_MODULE_64_SIZE 56 + +struct mach_o_dylib_table_of_contents_external +{ + unsigned char symbol_index[4]; + unsigned char module_index[4]; +}; +#define BFD_MACH_O_TABLE_OF_CONTENT_SIZE 8 + +struct mach_o_linkedit_data_command_external +{ + unsigned char dataoff[4]; + unsigned char datasize[4]; +}; + +struct mach_o_dyld_info_command_external +{ + unsigned char rebase_off[4]; + unsigned char rebase_size[4]; + unsigned char bind_off[4]; + unsigned char bind_size[4]; + unsigned char weak_bind_off[4]; + unsigned char weak_bind_size[4]; + unsigned char lazy_bind_off[4]; + unsigned char lazy_bind_size[4]; + unsigned char export_off[4]; + unsigned char export_size[4]; +}; + +struct mach_o_version_min_command_external +{ + unsigned char version[4]; + unsigned char reserved[4]; +}; + +struct mach_o_fat_header_external +{ + unsigned char magic[4]; + unsigned char nfat_arch[4]; /* Number of components. */ +}; + +struct mach_o_fat_arch_external +{ + unsigned char cputype[4]; + unsigned char cpusubtype[4]; + unsigned char offset[4]; /* File offset of the member. */ + unsigned char size[4]; /* Size of the member. */ + unsigned char align[4]; /* Power of 2. */ +}; + +#endif /* _MACH_O_EXTERNAL_H */ diff --git a/include/mach-o/loader.h b/include/mach-o/loader.h new file mode 100644 index 0000000..357f65e --- /dev/null +++ b/include/mach-o/loader.h @@ -0,0 +1,345 @@ +/* Mach-O support for BFD. + Copyright 2011 + Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#ifndef _MACH_O_LOADER_H +#define _MACH_O_LOADER_H + +/* Constants for header. */ + +typedef enum bfd_mach_o_mach_header_magic +{ + BFD_MACH_O_MH_MAGIC = 0xfeedface, + BFD_MACH_O_MH_CIGAM = 0xcefaedfe, + BFD_MACH_O_MH_MAGIC_64 = 0xfeedfacf, + BFD_MACH_O_MH_CIGAM_64 = 0xcffaedfe +} +bfd_mach_o_mach_header_magic; + +#define BFD_MACH_O_CPU_IS64BIT 0x1000000 + +typedef enum bfd_mach_o_cpu_type +{ + BFD_MACH_O_CPU_TYPE_VAX = 1, + BFD_MACH_O_CPU_TYPE_MC680x0 = 6, + BFD_MACH_O_CPU_TYPE_I386 = 7, + BFD_MACH_O_CPU_TYPE_MIPS = 8, + BFD_MACH_O_CPU_TYPE_MC98000 = 10, + BFD_MACH_O_CPU_TYPE_HPPA = 11, + BFD_MACH_O_CPU_TYPE_ARM = 12, + BFD_MACH_O_CPU_TYPE_MC88000 = 13, + BFD_MACH_O_CPU_TYPE_SPARC = 14, + BFD_MACH_O_CPU_TYPE_I860 = 15, + BFD_MACH_O_CPU_TYPE_ALPHA = 16, + BFD_MACH_O_CPU_TYPE_POWERPC = 18, + BFD_MACH_O_CPU_TYPE_POWERPC_64 = (BFD_MACH_O_CPU_TYPE_POWERPC | BFD_MACH_O_CPU_IS64BIT), + BFD_MACH_O_CPU_TYPE_X86_64 = (BFD_MACH_O_CPU_TYPE_I386 | BFD_MACH_O_CPU_IS64BIT) +} +bfd_mach_o_cpu_type; + +typedef enum bfd_mach_o_cpu_subtype +{ + BFD_MACH_O_CPU_SUBTYPE_X86_ALL = 3 +} +bfd_mach_o_cpu_subtype; + +typedef enum bfd_mach_o_filetype +{ + BFD_MACH_O_MH_OBJECT = 0x01, + BFD_MACH_O_MH_EXECUTE = 0x02, + BFD_MACH_O_MH_FVMLIB = 0x03, + BFD_MACH_O_MH_CORE = 0x04, + BFD_MACH_O_MH_PRELOAD = 0x05, + BFD_MACH_O_MH_DYLIB = 0x06, + BFD_MACH_O_MH_DYLINKER = 0x07, + BFD_MACH_O_MH_BUNDLE = 0x08, + BFD_MACH_O_MH_DYLIB_STUB = 0x09, + BFD_MACH_O_MH_DSYM = 0x0a, + BFD_MACH_O_MH_KEXT_BUNDLE = 0x0b +} +bfd_mach_o_filetype; + +typedef enum bfd_mach_o_header_flags +{ + BFD_MACH_O_MH_NOUNDEFS = 0x0000001, + BFD_MACH_O_MH_INCRLINK = 0x0000002, + BFD_MACH_O_MH_DYLDLINK = 0x0000004, + BFD_MACH_O_MH_BINDATLOAD = 0x0000008, + BFD_MACH_O_MH_PREBOUND = 0x0000010, + BFD_MACH_O_MH_SPLIT_SEGS = 0x0000020, + BFD_MACH_O_MH_LAZY_INIT = 0x0000040, + BFD_MACH_O_MH_TWOLEVEL = 0x0000080, + BFD_MACH_O_MH_FORCE_FLAT = 0x0000100, + BFD_MACH_O_MH_NOMULTIDEFS = 0x0000200, + BFD_MACH_O_MH_NOFIXPREBINDING = 0x0000400, + BFD_MACH_O_MH_PREBINDABLE = 0x0000800, + BFD_MACH_O_MH_ALLMODSBOUND = 0x0001000, + BFD_MACH_O_MH_SUBSECTIONS_VIA_SYMBOLS = 0x0002000, + BFD_MACH_O_MH_CANONICAL = 0x0004000, + BFD_MACH_O_MH_WEAK_DEFINES = 0x0008000, + BFD_MACH_O_MH_BINDS_TO_WEAK = 0x0010000, + BFD_MACH_O_MH_ALLOW_STACK_EXECUTION = 0x0020000, + BFD_MACH_O_MH_ROOT_SAFE = 0x0040000, + BFD_MACH_O_MH_SETUID_SAFE = 0x0080000, + BFD_MACH_O_MH_NO_REEXPORTED_DYLIBS = 0x0100000, + BFD_MACH_O_MH_PIE = 0x0200000, + BFD_MACH_O_MH_DEAD_STRIPPABLE_DYLIB = 0x0400000, + BFD_MACH_O_MH_HAS_TLV_DESCRIPTORS = 0x0800000, + BFD_MACH_O_MH_NO_HEAP_EXECUTION = 0x1000000 +} +bfd_mach_o_header_flags; + +/* Load command constants. */ +#define BFD_MACH_O_LC_REQ_DYLD 0x80000000 + +typedef enum bfd_mach_o_load_command_type +{ + BFD_MACH_O_LC_SEGMENT = 0x1, /* File segment to be mapped. */ + BFD_MACH_O_LC_SYMTAB = 0x2, /* Link-edit stab symbol table info (obsolete). */ + BFD_MACH_O_LC_SYMSEG = 0x3, /* Link-edit gdb symbol table info. */ + BFD_MACH_O_LC_THREAD = 0x4, /* Thread. */ + BFD_MACH_O_LC_UNIXTHREAD = 0x5, /* UNIX thread (includes a stack). */ + BFD_MACH_O_LC_LOADFVMLIB = 0x6, /* Load a fixed VM shared library. */ + BFD_MACH_O_LC_IDFVMLIB = 0x7, /* Fixed VM shared library id. */ + BFD_MACH_O_LC_IDENT = 0x8, /* Object identification information (obsolete). */ + BFD_MACH_O_LC_FVMFILE = 0x9, /* Fixed VM file inclusion. */ + BFD_MACH_O_LC_PREPAGE = 0xa, /* Prepage command (internal use). */ + BFD_MACH_O_LC_DYSYMTAB = 0xb, /* Dynamic link-edit symbol table info. */ + BFD_MACH_O_LC_LOAD_DYLIB = 0xc, /* Load a dynamically linked shared library. */ + BFD_MACH_O_LC_ID_DYLIB = 0xd, /* Dynamically linked shared lib identification. */ + BFD_MACH_O_LC_LOAD_DYLINKER = 0xe, /* Load a dynamic linker. */ + BFD_MACH_O_LC_ID_DYLINKER = 0xf, /* Dynamic linker identification. */ + BFD_MACH_O_LC_PREBOUND_DYLIB = 0x10, /* Modules prebound for a dynamically. */ + BFD_MACH_O_LC_ROUTINES = 0x11, /* Image routines. */ + BFD_MACH_O_LC_SUB_FRAMEWORK = 0x12, /* Sub framework. */ + BFD_MACH_O_LC_SUB_UMBRELLA = 0x13, /* Sub umbrella. */ + BFD_MACH_O_LC_SUB_CLIENT = 0x14, /* Sub client. */ + BFD_MACH_O_LC_SUB_LIBRARY = 0x15, /* Sub library. */ + BFD_MACH_O_LC_TWOLEVEL_HINTS = 0x16, /* Two-level namespace lookup hints. */ + BFD_MACH_O_LC_PREBIND_CKSUM = 0x17, /* Prebind checksum. */ + /* Load a dynamically linked shared library that is allowed to be + missing (weak). */ + BFD_MACH_O_LC_LOAD_WEAK_DYLIB = 0x18, + BFD_MACH_O_LC_SEGMENT_64 = 0x19, /* 64-bit segment of this file to be + mapped. */ + BFD_MACH_O_LC_ROUTINES_64 = 0x1a, /* Address of the dyld init routine + in a dylib. */ + BFD_MACH_O_LC_UUID = 0x1b, /* 128-bit UUID of the executable. */ + BFD_MACH_O_LC_RPATH = 0x1c, /* Run path addiions. */ + BFD_MACH_O_LC_CODE_SIGNATURE = 0x1d, /* Local of code signature. */ + BFD_MACH_O_LC_SEGMENT_SPLIT_INFO = 0x1e, /* Local of info to split seg. */ + BFD_MACH_O_LC_REEXPORT_DYLIB = 0x1f, /* Load and re-export lib. */ + BFD_MACH_O_LC_LAZY_LOAD_DYLIB = 0x20, /* Delay load of lib until use. */ + BFD_MACH_O_LC_ENCRYPTION_INFO = 0x21, /* Encrypted segment info. */ + BFD_MACH_O_LC_DYLD_INFO = 0x22, /* Compressed dyld information. */ + BFD_MACH_O_LC_LOAD_UPWARD_DYLIB = 0x23, /* Load upward dylib. */ + BFD_MACH_O_LC_VERSION_MIN_MACOSX = 0x24, /* Minimal MacOSX version. */ + BFD_MACH_O_LC_VERSION_MIN_IPHONEOS = 0x25, /* Minimal IOS version. */ + BFD_MACH_O_LC_FUNCTION_STARTS = 0x26, /* Compressed table of func start. */ + BFD_MACH_O_LC_DYLD_ENVIRONMENT = 0x27 /* Env variable string for dyld. */ +} +bfd_mach_o_load_command_type; + +/* Section constants. */ +/* Constants for the type of a section. */ + +typedef enum bfd_mach_o_section_type +{ + /* Regular section. */ + BFD_MACH_O_S_REGULAR = 0x0, + + /* Zero fill on demand section. */ + BFD_MACH_O_S_ZEROFILL = 0x1, + + /* Section with only literal C strings. */ + BFD_MACH_O_S_CSTRING_LITERALS = 0x2, + + /* Section with only 4 byte literals. */ + BFD_MACH_O_S_4BYTE_LITERALS = 0x3, + + /* Section with only 8 byte literals. */ + BFD_MACH_O_S_8BYTE_LITERALS = 0x4, + + /* Section with only pointers to literals. */ + BFD_MACH_O_S_LITERAL_POINTERS = 0x5, + + /* For the two types of symbol pointers sections and the symbol stubs + section they have indirect symbol table entries. For each of the + entries in the section the indirect symbol table entries, in + corresponding order in the indirect symbol table, start at the index + stored in the reserved1 field of the section structure. Since the + indirect symbol table entries correspond to the entries in the + section the number of indirect symbol table entries is inferred from + the size of the section divided by the size of the entries in the + section. For symbol pointers sections the size of the entries in + the section is 4 bytes and for symbol stubs sections the byte size + of the stubs is stored in the reserved2 field of the section + structure. */ + + /* Section with only non-lazy symbol pointers. */ + BFD_MACH_O_S_NON_LAZY_SYMBOL_POINTERS = 0x6, + + /* Section with only lazy symbol pointers. */ + BFD_MACH_O_S_LAZY_SYMBOL_POINTERS = 0x7, + + /* Section with only symbol stubs, byte size of stub in the reserved2 + field. */ + BFD_MACH_O_S_SYMBOL_STUBS = 0x8, + + /* Section with only function pointers for initialization. */ + BFD_MACH_O_S_MOD_INIT_FUNC_POINTERS = 0x9, + + /* Section with only function pointers for termination. */ + BFD_MACH_O_S_MOD_FINI_FUNC_POINTERS = 0xa, + + /* Section contains symbols that are coalesced by the linkers. */ + BFD_MACH_O_S_COALESCED = 0xb, + + /* Zero fill on demand section (possibly larger than 4 GB). */ + BFD_MACH_O_S_GB_ZEROFILL = 0xc, + + /* Section with only pairs of function pointers for interposing. */ + BFD_MACH_O_S_INTERPOSING = 0xd, + + /* Section with only 16 byte literals. */ + BFD_MACH_O_S_16BYTE_LITERALS = 0xe, + + /* Section contains DTrace Object Format. */ + BFD_MACH_O_S_DTRACE_DOF = 0xf, + + /* Section with only lazy symbol pointers to lazy loaded dylibs. */ + BFD_MACH_O_S_LAZY_DYLIB_SYMBOL_POINTERS = 0x10 +} +bfd_mach_o_section_type; + +/* The flags field of a section structure is separated into two parts a section + type and section attributes. The section types are mutually exclusive (it + can only have one type) but the section attributes are not (it may have more + than one attribute). */ + +#define BFD_MACH_O_SECTION_TYPE_MASK 0x000000ff + +/* Constants for the section attributes part of the flags field of a section + structure. */ +#define BFD_MACH_O_SECTION_ATTRIBUTES_MASK 0xffffff00 +/* System setable attributes. */ +#define BFD_MACH_O_SECTION_ATTRIBUTES_SYS 0x00ffff00 +/* User attributes. */ +#define BFD_MACH_O_SECTION_ATTRIBUTES_USR 0xff000000 + +typedef enum bfd_mach_o_section_attribute +{ + /* Section has local relocation entries. */ + BFD_MACH_O_S_ATTR_LOC_RELOC = 0x00000100, + + /* Section has external relocation entries. */ + BFD_MACH_O_S_ATTR_EXT_RELOC = 0x00000200, + + /* Section contains some machine instructions. */ + BFD_MACH_O_S_ATTR_SOME_INSTRUCTIONS = 0x00000400, + + /* A debug section. */ + BFD_MACH_O_S_ATTR_DEBUG = 0x02000000, + + /* Used with i386 stubs. */ + BFD_MACH_O_S_SELF_MODIFYING_CODE = 0x04000000, + + /* Blocks are live if they reference live blocks. */ + BFD_MACH_O_S_ATTR_LIVE_SUPPORT = 0x08000000, + + /* No dead stripping. */ + BFD_MACH_O_S_ATTR_NO_DEAD_STRIP = 0x10000000, + + /* Section symbols can be stripped in files with MH_DYLDLINK flag. */ + BFD_MACH_O_S_ATTR_STRIP_STATIC_SYMS = 0x20000000, + + /* Section contains coalesced symbols that are not to be in the TOC of an + archive. */ + BFD_MACH_O_S_ATTR_NO_TOC = 0x40000000, + + /* Section contains only true machine instructions. */ + BFD_MACH_O_S_ATTR_PURE_INSTRUCTIONS = 0x80000000 +} +bfd_mach_o_section_attribute; + +/* Symbol constants. */ + +/* Symbol n_type values. */ +#define BFD_MACH_O_N_STAB 0xe0 /* If any of these bits set, a symbolic debugging entry. */ +#define BFD_MACH_O_N_PEXT 0x10 /* Private external symbol bit. */ +#define BFD_MACH_O_N_TYPE 0x0e /* Mask for the type bits. */ +#define BFD_MACH_O_N_EXT 0x01 /* External symbol bit, set for external symbols. */ +#define BFD_MACH_O_N_UNDF 0x00 /* Undefined, n_sect == NO_SECT. */ +#define BFD_MACH_O_N_ABS 0x02 /* Absolute, n_sect == NO_SECT. */ +#define BFD_MACH_O_N_INDR 0x0a /* Indirect. */ +#define BFD_MACH_O_N_PBUD 0x0c /* Prebound undefined (defined in a dylib). */ +#define BFD_MACH_O_N_SECT 0x0e /* Defined in section number n_sect. */ + +#define BFD_MACH_O_NO_SECT 0 /* Symbol not in any section of the image. */ + +/* Symbol n_desc reference flags. */ +#define BFD_MACH_O_REFERENCE_MASK 0x0f +#define BFD_MACH_O_REFERENCE_FLAG_UNDEFINED_NON_LAZY 0x00 +#define BFD_MACH_O_REFERENCE_FLAG_UNDEFINED_LAZY 0x01 +#define BFD_MACH_O_REFERENCE_FLAG_DEFINED 0x02 +#define BFD_MACH_O_REFERENCE_FLAG_PRIVATE_DEFINED 0x03 +#define BFD_MACH_O_REFERENCE_FLAG_PRIVATE_UNDEFINED_NON_LAZY 0x04 +#define BFD_MACH_O_REFERENCE_FLAG_PRIVATE_UNDEFINED_LAZY 0x05 + +#define BFD_MACH_O_REFERENCED_DYNAMICALLY 0x10 +#define BFD_MACH_O_N_DESC_DISCARDED 0x20 +#define BFD_MACH_O_N_NO_DEAD_STRIP 0x20 +#define BFD_MACH_O_N_WEAK_REF 0x40 +#define BFD_MACH_O_N_WEAK_DEF 0x80 + +/* Thread constants. */ + +typedef enum bfd_mach_o_ppc_thread_flavour +{ + BFD_MACH_O_PPC_THREAD_STATE = 1, + BFD_MACH_O_PPC_FLOAT_STATE = 2, + BFD_MACH_O_PPC_EXCEPTION_STATE = 3, + BFD_MACH_O_PPC_VECTOR_STATE = 4, + BFD_MACH_O_PPC_THREAD_STATE64 = 5, + BFD_MACH_O_PPC_EXCEPTION_STATE64 = 6, + BFD_MACH_O_PPC_THREAD_STATE_NONE = 7 +} +bfd_mach_o_ppc_thread_flavour; + +/* Defined in */ +typedef enum bfd_mach_o_i386_thread_flavour +{ + BFD_MACH_O_x86_THREAD_STATE32 = 1, + BFD_MACH_O_x86_FLOAT_STATE32 = 2, + BFD_MACH_O_x86_EXCEPTION_STATE32 = 3, + BFD_MACH_O_x86_THREAD_STATE64 = 4, + BFD_MACH_O_x86_FLOAT_STATE64 = 5, + BFD_MACH_O_x86_EXCEPTION_STATE64 = 6, + BFD_MACH_O_x86_THREAD_STATE = 7, + BFD_MACH_O_x86_FLOAT_STATE = 8, + BFD_MACH_O_x86_EXCEPTION_STATE = 9, + BFD_MACH_O_x86_DEBUG_STATE32 = 10, + BFD_MACH_O_x86_DEBUG_STATE64 = 11, + BFD_MACH_O_x86_DEBUG_STATE = 12, + BFD_MACH_O_x86_THREAD_STATE_NONE = 13 +} +bfd_mach_o_i386_thread_flavour; + +#endif /* _MACH_O_LOADER_H */ diff --git a/include/mach-o/reloc.h b/include/mach-o/reloc.h new file mode 100644 index 0000000..93ebb8b --- /dev/null +++ b/include/mach-o/reloc.h @@ -0,0 +1,53 @@ +/* Mach-O support for BFD. + Copyright 2011 + Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#ifndef _MACH_O_RELOC_H +#define _MACH_O_RELOC_H + +/* Fields for a normal (non-scattered) entry. */ +#define BFD_MACH_O_R_PCREL 0x01000000 +#define BFD_MACH_O_GET_R_LENGTH(s) (((s) >> 25) & 0x3) +#define BFD_MACH_O_R_EXTERN 0x08000000 +#define BFD_MACH_O_GET_R_TYPE(s) (((s) >> 28) & 0x0f) +#define BFD_MACH_O_GET_R_SYMBOLNUM(s) ((s) & 0x00ffffff) +#define BFD_MACH_O_SET_R_LENGTH(l) (((l) & 0x3) << 25) +#define BFD_MACH_O_SET_R_TYPE(t) (((t) & 0xf) << 28) +#define BFD_MACH_O_SET_R_SYMBOLNUM(s) ((s) & 0x00ffffff) + +/* Fields for a scattered entry. */ +#define BFD_MACH_O_SR_SCATTERED 0x80000000 +#define BFD_MACH_O_SR_PCREL 0x40000000 +#define BFD_MACH_O_GET_SR_LENGTH(s) (((s) >> 28) & 0x3) +#define BFD_MACH_O_GET_SR_TYPE(s) (((s) >> 24) & 0x0f) +#define BFD_MACH_O_GET_SR_ADDRESS(s) ((s) & 0x00ffffff) +#define BFD_MACH_O_SET_SR_LENGTH(l) (((l) & 0x3) << 28) +#define BFD_MACH_O_SET_SR_TYPE(t) (((t) & 0xf) << 24) +#define BFD_MACH_O_SET_SR_ADDRESS(s) ((s) & 0x00ffffff) + +/* Generic relocation types (used by i386). */ +#define BFD_MACH_O_GENERIC_RELOC_VANILLA 0 +#define BFD_MACH_O_GENERIC_RELOC_PAIR 1 +#define BFD_MACH_O_GENERIC_RELOC_SECTDIFF 2 +#define BFD_MACH_O_GENERIC_RELOC_PB_LA_PTR 3 +#define BFD_MACH_O_GENERIC_RELOC_LOCAL_SECTDIFF 4 +#define BFD_MACH_O_GENERIC_RELOC_TLV 5 + +#endif /* _MACH_O_RELOC_H */ diff --git a/include/mach-o/x86-64.h b/include/mach-o/x86-64.h new file mode 100644 index 0000000..d06bc26 --- /dev/null +++ b/include/mach-o/x86-64.h @@ -0,0 +1,37 @@ +/* Mach-O support for BFD. + Copyright 2011 + Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#ifndef _MACH_O_X86_64_H +#define _MACH_O_X86_64_H + +/* X86-64 relocations. */ +#define BFD_MACH_O_X86_64_RELOC_UNSIGNED 0 /* Absolute addresses. */ +#define BFD_MACH_O_X86_64_RELOC_SIGNED 1 /* 32-bit disp. */ +#define BFD_MACH_O_X86_64_RELOC_BRANCH 2 /* 32-bit pcrel disp. */ +#define BFD_MACH_O_X86_64_RELOC_GOT_LOAD 3 /* Movq load of a GOT entry. */ +#define BFD_MACH_O_X86_64_RELOC_GOT 4 /* GOT reference. */ +#define BFD_MACH_O_X86_64_RELOC_SUBTRACTOR 5 /* Symbol difference. */ +#define BFD_MACH_O_X86_64_RELOC_SIGNED_1 6 /* 32-bit signed disp -1. */ +#define BFD_MACH_O_X86_64_RELOC_SIGNED_2 7 /* 32-bit signed disp -2. */ +#define BFD_MACH_O_X86_64_RELOC_SIGNED_4 8 /* 32-bit signed disp -4. */ +#define BFD_MACH_O_X86_64_RELOC_TLV 9 /* Thread local variables. */ + +#endif /* _MACH_O_X86_64_H */ diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index e148e8d..8f070a1 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,242 @@ +2011-09-21 David S. Miller + + * sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int. + (F_MUL32, F_DIV32, F_FSMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2, + F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS, + F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits. + +2011-08-09 Chao-ying Fu + Maciej W. Rozycki + + * mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros. + (OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine. + (INSN_ASE_MASK): Add the MCU bit. + (INSN_MCU): New macro. + (M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values. + (MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros. + +2011-08-09 Maciej W. Rozycki + + * mips.h (INSN_WRITE_GPR_S, INSN2_WRITE_GPR_MB): New macros. + (INSN2_READ_GPR_MC, INSN2_READ_GPR_ME): Likewise. + (INSN2_WRITE_GPR_MF, INSN2_READ_GPR_MG): Likewise. + (INSN2_READ_GPR_MJ, INSN2_WRITE_GPR_MJ): Likewise. + (INSN2_READ_GPR_MP, INSN2_WRITE_GPR_MP): Likewise. + (INSN2_READ_GPR_MQ, INSN2_WRITE_GPR_MHI): Likewise. + (INSN2_READ_GPR_MMN): Likewise. + (INSN2_READ_FPR_D): Change the bit used. + (INSN2_MOD_GPR_MD, INSN2_MOD_GPR_MF): Likewise. + (INSN2_MOD_SP, INSN2_READ_GPR_31, INSN2_READ_GP): Likewise. + (INSN2_READ_PC, INSN2_UNCOND_BRANCH): Likewise. + (INSN2_COND_BRANCH): Likewise. + (INSN2_WRITE_GPR_S, INSN2_MOD_GPR_MB): Remove macros. + (INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG): Likewise. + (INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP, INSN2_MOD_GPR_MQ): Likewise. + (INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM): Likewise. + (INSN2_MOD_GPR_MN): Likewise. + +2011-08-05 David S. Miller + + * sparc.h: Document new format codes '4', '5', and '('. + (OPF_LOW4, RS3): New macros. + +2011-08-03 Maciej W. Rozycki + + * mips.h: Document the use of FP_D in MIPS16 mode. Adjust the + order of flags documented. + +2011-07-29 Maciej W. Rozycki + + * mips.h: Clarify the description of microMIPS instruction + manipulation macros. + (MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): Remove macros. + +2011-07-24 Chao-ying Fu + Maciej W. Rozycki + + * mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros. + (OP_MASK_STYPE, OP_SH_STYPE): Likewise. + (OP_MASK_CODE10, OP_SH_CODE10): Likewise. + (OP_MASK_TRAP, OP_SH_TRAP): Likewise. + (OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise. + (OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise. + (OP_MASK_RS3, OP_SH_RS3): Likewise. + (OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise. + (OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise. + (OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise. + (OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise. + (OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise. + (OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise. + (OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise. + (OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise. + (OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise. + (OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise. + (OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise. + (OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise. + (OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise. + (OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise. + (INSN_WRITE_GPR_S): New macro. + (INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise. + (INSN2_READ_FPR_D): Likewise. + (INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise. + (INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise. + (INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise. + (INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise. + (INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise. + (INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise. + (INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise. + (INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise. + (CPU_MICROMIPS): New macro. + (M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values. + (M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise. + (M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise. + (M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise. + (M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise. + (M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise. + (M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise. + (M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise. + (M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise. + (M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise. + (M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise. + (M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise. + (M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise. + (MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros. + (MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise. + (MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise. + (MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise. + (MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise. + (MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise. + (MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise. + (MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise. + (MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise. + (MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise. + (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise. + (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise. + (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise. + (MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise. + (MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise. + (MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise. + (MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise. + (MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise. + (MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise. + (MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise. + (MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise. + (MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise. + (MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise. + (MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise. + (MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise. + (MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise. + (MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise. + (MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise. + (MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise. + (MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise. + (MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise. + (MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise. + (MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise. + (MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise. + (MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise. + (MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise. + (MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise. + (MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise. + (MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise. + (MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise. + (MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise. + (MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise. + (MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise. + (MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise. + (MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise. + (MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise. + (MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise. + (MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise. + (MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise. + (MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise. + (MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise. + (MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise. + (MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise. + (MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise. + (MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise. + (MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise. + (MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise. + (MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise. + (MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise. + (MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise. + (MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise. + (MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise. + (MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise. + (MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise. + (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise. + (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise. + (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise. + (MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise. + (MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise. + (MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise. + (MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise. + (MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise. + (MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise. + (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise. + (MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise. + (MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise. + (MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise. + (MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise. + (MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise. + (MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise. + (MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise. + (MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise. + (MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise. + (MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise. + (MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise. + (MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise. + (MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise. + (MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise. + (MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise. + (MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise. + (MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise. + (MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise. + (micromips_opcodes): New declaration. + (bfd_micromips_num_opcodes): Likewise. + +2011-07-24 Maciej W. Rozycki + + * mips.h (INSN_TRAP): Rename to... + (INSN_NO_DELAY_SLOT): ... this. + (INSN_SYNC): Remove macro. + +2011-07-01 Eric B. Weddington + + * avr.h (AVR_ISA_AVR6): Remove AVR_ISA_SPMX as it was actually + a duplicate of AVR_ISA_SPM. + +2011-07-01 Nick Clifton + + * avr.h (AVR_ISA_AVR6): Fix typo, adding AVR_ISA_SPMX. + +2011-06-18 Robin Getz + + * bfin.h (is_macmod_signed): New func + +2011-06-18 Mike Frysinger + + * bfin.h (is_macmod_pmove): Add missing space before func args. + (is_macmod_hmove): Likewise. + +2011-06-13 Walter Lee + + * tilegx.h: New file. + * tilepro.h: New file. + +2011-05-31 Paul Brook + + * arm.h (ARM_ARCH_V7R_IDIV): Define. + +2011-05-24 Andreas Krebbel + + * s390.h: Replace S390_OPERAND_REG_EVEN with + S390_OPERAND_REG_PAIR. + +2011-05-24 Andreas Krebbel + + * s390.h: Add S390_OPCODE_REG_EVEN flag. + 2011-04-18 Julian Brown * arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from bitmask. @@ -53,6 +292,10 @@ (OP_*_RZ, OP_*_FZ, INSN2_M_FP_D, INSN2_WRITE_GPR_Z, INSN2_WRITE_FPR_Z) (INSN2_READ_GPR_Z, INSN2_READ_FPR_Z, INSN2_READ_GPR_D): Define. +2010-11-25 Andreas Krebbel + + * s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_MAXCPU. + 2010-11-23 Richard Sandiford * mips.h: Fix previous commit. diff --git a/include/opcode/arm.h b/include/opcode/arm.h index 297ca63..86e3d67 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -229,6 +229,8 @@ ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC \ | ARM_EXT_DIV | ARM_EXT_ADIV \ | ARM_EXT_VIRT, 0) +/* v7-r+idiv. */ +#define ARM_ARCH_V7R_IDIV ARM_FEATURE (ARM_AEXT_V7R | ARM_EXT_ADIV, 0) /* Features that are present in v6M and v6S-M but not other v6 cores. */ #define ARM_ARCH_V6M_ONLY ARM_FEATURE (ARM_AEXT_V6M_ONLY, 0) diff --git a/include/opcode/avr.h b/include/opcode/avr.h index c754234..a6d7b47 100644 --- a/include/opcode/avr.h +++ b/include/opcode/avr.h @@ -68,8 +68,7 @@ #define AVR_ISA_AVR6 (AVR_ISA_1200 | AVR_ISA_LPM | AVR_ISA_LPMX | \ AVR_ISA_SRAM | AVR_ISA_MEGA | AVR_ISA_MUL | \ AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \ - AVR_ISA_SPM | AVR_ISA_BRK | AVR_ISA_EIND | \ - AVR_ISA_MOVW) + AVR_ISA_BRK | AVR_ISA_EIND | AVR_ISA_MOVW) #define REGISTER_P(x) ((x) == 'r' \ || (x) == 'd' \ diff --git a/include/opcode/bfin.h b/include/opcode/bfin.h index 730f63c..26f0193 100755 --- a/include/opcode/bfin.h +++ b/include/opcode/bfin.h @@ -41,18 +41,24 @@ #define M_IH 11 #define M_IU 12 -static inline int is_macmod_pmove(int x) +static inline int is_macmod_pmove (int x) { return (x == 0) || (x == M_IS) || (x == M_FU) || (x == M_S2RND) || (x == M_ISS2) || (x == M_IU); } -static inline int is_macmod_hmove(int x) +static inline int is_macmod_hmove (int x) { return (x == 0) || (x == M_IS) || (x == M_FU) || (x == M_IU) || (x == M_T) || (x == M_TFU) || (x == M_S2RND) || (x == M_ISS2) || (x == M_IH); } +static inline int is_macmod_signed (int x) +{ + return (x == 0) || (x == M_IS) || (x == M_T) || (x == M_S2RND) + || (x == M_ISS2) || (x == M_IH) || (x == M_W32); +} + /* dsp32mac +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+ | 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...| diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 0685bab..e6703f8 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -91,6 +91,10 @@ #define OP_SH_CODE20 6 #define OP_MASK_SHAMT 0x1f #define OP_SH_SHAMT 6 +#define OP_MASK_EXTLSB OP_MASK_SHAMT +#define OP_SH_EXTLSB OP_SH_SHAMT +#define OP_MASK_STYPE OP_MASK_SHAMT +#define OP_SH_STYPE OP_SH_SHAMT #define OP_MASK_FD 0x1f #define OP_SH_FD 6 #define OP_MASK_TARGET 0x3ffffff @@ -183,6 +187,12 @@ #define OP_SH_MTACC_D 13 #define OP_MASK_MTACC_D 0x3 +/* MIPS MCU ASE */ +#define OP_MASK_3BITPOS 0x7 +#define OP_SH_3BITPOS 12 +#define OP_MASK_OFFSET12 0xfff +#define OP_SH_OFFSET12 0 + #define OP_OP_COP0 0x10 #define OP_OP_COP1 0x11 #define OP_OP_COP2 0x12 @@ -238,6 +248,84 @@ #define OP_SH_FZ 0 #define OP_MASK_FZ 0x1f +/* Every MICROMIPSOP_X definition requires a corresponding OP_X + definition, and vice versa. This simplifies various parts + of the operand handling in GAS. The fields below only exist + in the microMIPS encoding, so define each one to have an empty + range. */ +#define OP_MASK_CODE10 0 +#define OP_SH_CODE10 0 +#define OP_MASK_TRAP 0 +#define OP_SH_TRAP 0 +#define OP_MASK_OFFSET10 0 +#define OP_SH_OFFSET10 0 +#define OP_MASK_RS3 0 +#define OP_SH_RS3 0 +#define OP_MASK_MB 0 +#define OP_SH_MB 0 +#define OP_MASK_MC 0 +#define OP_SH_MC 0 +#define OP_MASK_MD 0 +#define OP_SH_MD 0 +#define OP_MASK_ME 0 +#define OP_SH_ME 0 +#define OP_MASK_MF 0 +#define OP_SH_MF 0 +#define OP_MASK_MG 0 +#define OP_SH_MG 0 +#define OP_MASK_MH 0 +#define OP_SH_MH 0 +#define OP_MASK_MI 0 +#define OP_SH_MI 0 +#define OP_MASK_MJ 0 +#define OP_SH_MJ 0 +#define OP_MASK_ML 0 +#define OP_SH_ML 0 +#define OP_MASK_MM 0 +#define OP_SH_MM 0 +#define OP_MASK_MN 0 +#define OP_SH_MN 0 +#define OP_MASK_MP 0 +#define OP_SH_MP 0 +#define OP_MASK_MQ 0 +#define OP_SH_MQ 0 +#define OP_MASK_IMMA 0 +#define OP_SH_IMMA 0 +#define OP_MASK_IMMB 0 +#define OP_SH_IMMB 0 +#define OP_MASK_IMMC 0 +#define OP_SH_IMMC 0 +#define OP_MASK_IMMF 0 +#define OP_SH_IMMF 0 +#define OP_MASK_IMMG 0 +#define OP_SH_IMMG 0 +#define OP_MASK_IMMH 0 +#define OP_SH_IMMH 0 +#define OP_MASK_IMMI 0 +#define OP_SH_IMMI 0 +#define OP_MASK_IMMJ 0 +#define OP_SH_IMMJ 0 +#define OP_MASK_IMML 0 +#define OP_SH_IMML 0 +#define OP_MASK_IMMM 0 +#define OP_SH_IMMM 0 +#define OP_MASK_IMMN 0 +#define OP_SH_IMMN 0 +#define OP_MASK_IMMO 0 +#define OP_SH_IMMO 0 +#define OP_MASK_IMMP 0 +#define OP_SH_IMMP 0 +#define OP_MASK_IMMQ 0 +#define OP_SH_IMMQ 0 +#define OP_MASK_IMMU 0 +#define OP_SH_IMMU 0 +#define OP_MASK_IMMW 0 +#define OP_SH_IMMW 0 +#define OP_MASK_IMMX 0 +#define OP_SH_IMMX 0 +#define OP_MASK_IMMY 0 +#define OP_SH_IMMY 0 + /* This structure holds information for a particular instruction. */ struct mips_opcode @@ -305,7 +393,8 @@ struct mips_opcode "z" must be zero register "K" 5 bit Hardware Register (rdhwr instruction) (OP_*_RD) "+A" 5 bit ins/ext/dins/dext/dinsm/dextm position, which becomes - LSB (OP_*_SHAMT). + LSB (OP_*_SHAMT; OP_*_EXTLSB or OP_*_STYPE may be used for + microMIPS compatibility). Enforces: 0 <= pos < 32. "+B" 5 bit ins/dins size, which becomes MSB (OP_*_INSMSB). Requires that "+A" or "+E" occur first to set position. @@ -388,6 +477,10 @@ struct mips_opcode "+t" 5 bit coprocessor 0 destination register (OP_*_RT) "+T" 5 bit coprocessor 0 destination register (OP_*_RT) - disassembly only + MCU ASE usage: + "~" 12 bit offset (OP_*_OFFSET12) + "\" 3 bit position for aset and aclr (OP_*_3BITPOS) + UDI immediates: "+1" UDI immediate bits 6-10 "+2" UDI immediate bits 6-15 @@ -423,7 +516,7 @@ struct mips_opcode Characters used so far, for quick reference when adding more: "1234567890" - "%[]<>(),+:'@!$*&" + "%[]<>(),+:'@!$*&\~" "ABCDEFGHIJKLMNOPQRSTUVWXYZ" "abcdefghijklopqrstuvwxz" @@ -489,8 +582,9 @@ struct mips_opcode #define INSN_WRITE_HI 0x01000000 /* Modifies the LO register. */ #define INSN_WRITE_LO 0x02000000 -/* Takes a trap (easier to keep out of delay slot). */ -#define INSN_TRAP 0x04000000 +/* Not to be placed in a branch delay slot, either architecturally + or for ease of handling (such as with instructions that take a trap). */ +#define INSN_NO_DELAY_SLOT 0x04000000 /* Instruction stores value into memory. */ #define INSN_STORE_MEMORY 0x08000000 /* Instruction uses single precision floating point. */ @@ -499,8 +593,8 @@ struct mips_opcode #define FP_D 0x20000000 /* Instruction is part of the tx39's integer multiply family. */ #define INSN_MULT 0x40000000 -/* Instruction synchronize shared memory. */ -#define INSN_SYNC 0x80000000 +/* Modifies the general purpose register in MICROMIPSOP_*_RS. */ +#define INSN_WRITE_GPR_S 0x80000000 /* Instruction is actually a macro. It should be ignored by the disassembler, and requires special treatment by the assembler. */ #define INSN_MACRO 0xffffffff @@ -534,6 +628,51 @@ struct mips_opcode #define INSN2_READ_GPR_D 0x00000200 +/* Instruction has a branch delay slot that requires a 16-bit instruction. */ +#define INSN2_BRANCH_DELAY_16BIT 0x00000400 +/* Instruction has a branch delay slot that requires a 32-bit instruction. */ +#define INSN2_BRANCH_DELAY_32BIT 0x00000800 +/* Reads the floating point register in MICROMIPSOP_*_FD. */ +#define INSN2_READ_FPR_D 0x00001000 +/* Modifies the general purpose register in MICROMIPSOP_*_MB. */ +#define INSN2_WRITE_GPR_MB 0x00002000 +/* Reads the general purpose register in MICROMIPSOP_*_MC. */ +#define INSN2_READ_GPR_MC 0x00004000 +/* Reads/writes the general purpose register in MICROMIPSOP_*_MD. */ +#define INSN2_MOD_GPR_MD 0x00008000 +/* Reads the general purpose register in MICROMIPSOP_*_ME. */ +#define INSN2_READ_GPR_ME 0x00010000 +/* Reads/writes the general purpose register in MICROMIPSOP_*_MF. */ +#define INSN2_MOD_GPR_MF 0x00020000 +/* Reads the general purpose register in MICROMIPSOP_*_MG. */ +#define INSN2_READ_GPR_MG 0x00040000 +/* Reads the general purpose register in MICROMIPSOP_*_MJ. */ +#define INSN2_READ_GPR_MJ 0x00080000 +/* Modifies the general purpose register in MICROMIPSOP_*_MJ. */ +#define INSN2_WRITE_GPR_MJ 0x00100000 +/* Reads the general purpose register in MICROMIPSOP_*_MP. */ +#define INSN2_READ_GPR_MP 0x00200000 +/* Modifies the general purpose register in MICROMIPSOP_*_MP. */ +#define INSN2_WRITE_GPR_MP 0x00400000 +/* Reads the general purpose register in MICROMIPSOP_*_MQ. */ +#define INSN2_READ_GPR_MQ 0x00800000 +/* Reads/Writes the stack pointer ($29). */ +#define INSN2_MOD_SP 0x01000000 +/* Reads the RA ($31) register. */ +#define INSN2_READ_GPR_31 0x02000000 +/* Reads the global pointer ($28). */ +#define INSN2_READ_GP 0x04000000 +/* Reads the program counter ($pc). */ +#define INSN2_READ_PC 0x08000000 +/* Is an unconditional branch insn. */ +#define INSN2_UNCOND_BRANCH 0x10000000 +/* Is a conditional branch insn. */ +#define INSN2_COND_BRANCH 0x20000000 +/* Modifies the general purpose registers in MICROMIPSOP_*_MH/I. */ +#define INSN2_WRITE_GPR_MHI 0x40000000 +/* Reads the general purpose registers in MICROMIPSOP_*_MM/N. */ +#define INSN2_READ_GPR_MMN 0x80000000 + /* Masks used to mark instructions to indicate which MIPS ISA level they were introduced in. INSN_ISA_MASK masks an enumeration that specifies the base ISA level(s). The remainder of a 32-bit @@ -580,7 +719,7 @@ static const unsigned int mips_isa_table[] = #define INSN_OCTEON 0x00000800 /* Masks used for MIPS-defined ASEs. */ -#define INSN_ASE_MASK 0x3c00f000 +#define INSN_ASE_MASK 0x3c00f010 /* DSP ASE */ #define INSN_DSP 0x00001000 @@ -629,6 +768,9 @@ static const unsigned int mips_isa_table[] = /* RMI Xlr instruction */ #define INSN_XLR 0x00000020 +/* MCU (MicroController) ASE */ +#define INSN_MCU 0x00000010 + /* MIPS ISA defines, use instead of hardcoding ISA level. */ #define ISA_UNKNOWN 0 /* Gas internal use. */ @@ -731,12 +873,21 @@ static const unsigned int mips_isa_table[] = enum { M_ABS, + M_ACLR_AB, + M_ACLR_OB, M_ADD_I, M_ADDU_I, M_AND_I, + M_ASET_AB, + M_ASET_OB, M_BALIGN, + M_BC1FL, + M_BC1TL, + M_BC2FL, + M_BC2TL, M_BEQ, M_BEQ_I, + M_BEQL, M_BEQL_I, M_BGE, M_BGEL, @@ -746,6 +897,9 @@ enum M_BGEUL, M_BGEU_I, M_BGEUL_I, + M_BGEZ, + M_BGEZL, + M_BGEZALL, M_BGT, M_BGTL, M_BGT_I, @@ -754,6 +908,8 @@ enum M_BGTUL, M_BGTU_I, M_BGTUL_I, + M_BGTZ, + M_BGTZL, M_BLE, M_BLEL, M_BLE_I, @@ -762,6 +918,8 @@ enum M_BLEUL, M_BLEU_I, M_BLEUL_I, + M_BLEZ, + M_BLEZL, M_BLT, M_BLTL, M_BLT_I, @@ -770,10 +928,15 @@ enum M_BLTUL, M_BLTU_I, M_BLTUL_I, + M_BLTZ, + M_BLTZL, + M_BLTZALL, M_BNE, + M_BNEL, M_BNE_I, M_BNEL_I, M_CACHE_AB, + M_CACHE_OB, M_DABS, M_DADD_I, M_DADDU_I, @@ -807,6 +970,9 @@ enum M_JAL_1, M_JAL_2, M_JAL_A, + M_JALS_1, + M_JALS_2, + M_JALS_A, M_L_DOB, M_L_DAB, M_LA_AB, @@ -820,9 +986,16 @@ enum M_LD_AB, M_LDC1_AB, M_LDC2_AB, + M_LDC2_OB, M_LDC3_AB, M_LDL_AB, + M_LDL_OB, + M_LDM_AB, + M_LDM_OB, + M_LDP_AB, + M_LDP_OB, M_LDR_AB, + M_LDR_OB, M_LH_A, M_LH_AB, M_LHU_A, @@ -833,7 +1006,9 @@ enum M_LI_S, M_LI_SS, M_LL_AB, + M_LL_OB, M_LLD_AB, + M_LLD_OB, M_LS_A, M_LW_A, M_LW_AB, @@ -843,13 +1018,21 @@ enum M_LWC1_AB, M_LWC2_A, M_LWC2_AB, + M_LWC2_OB, M_LWC3_A, M_LWC3_AB, M_LWL_A, M_LWL_AB, + M_LWL_OB, + M_LWM_AB, + M_LWM_OB, + M_LWP_AB, + M_LWP_OB, M_LWR_A, M_LWR_AB, + M_LWR_OB, M_LWU_AB, + M_LWU_OB, M_MSGSND, M_MSGLD, M_MSGLD_T, @@ -865,6 +1048,7 @@ enum M_NOR_I, M_OR_I, M_PREF_AB, + M_PREF_OB, M_REM_3, M_REM_3I, M_REMU_3, @@ -882,15 +1066,24 @@ enum M_S_DAB, M_S_S, M_SC_AB, + M_SC_OB, M_SCD_AB, + M_SCD_OB, M_SD_A, M_SD_OB, M_SD_AB, M_SDC1_AB, M_SDC2_AB, + M_SDC2_OB, M_SDC3_AB, M_SDL_AB, + M_SDL_OB, + M_SDM_AB, + M_SDM_OB, + M_SDP_AB, + M_SDP_OB, M_SDR_AB, + M_SDR_OB, M_SEQ, M_SEQ_I, M_SGE, @@ -921,12 +1114,19 @@ enum M_SWC1_AB, M_SWC2_A, M_SWC2_AB, + M_SWC2_OB, M_SWC3_A, M_SWC3_AB, M_SWL_A, M_SWL_AB, + M_SWL_OB, + M_SWM_AB, + M_SWM_OB, + M_SWP_AB, + M_SWP_OB, M_SWR_A, M_SWR_AB, + M_SWR_OB, M_SUB_I, M_SUBU_I, M_SUBU_I_2, @@ -1132,6 +1332,9 @@ extern int bfd_mips_num_opcodes; /* The following flags have the same value for the mips16 opcode table: + + INSN_ISA3 + INSN_UNCOND_BRANCH_DELAY INSN_COND_BRANCH_DELAY INSN_COND_BRANCH_LIKELY (never used) @@ -1140,12 +1343,383 @@ extern int bfd_mips_num_opcodes; INSN_WRITE_HI INSN_WRITE_LO INSN_TRAP - INSN_ISA3 + FP_D (never used) */ extern const struct mips_opcode mips16_opcodes[]; extern const int bfd_mips16_num_opcodes; +/* These are the bit masks and shift counts used for the different fields + in the microMIPS instruction formats. No masks are provided for the + fixed portions of an instruction, since they are not needed. */ + +#define MICROMIPSOP_MASK_IMMEDIATE 0xffff +#define MICROMIPSOP_SH_IMMEDIATE 0 +#define MICROMIPSOP_MASK_DELTA 0xffff +#define MICROMIPSOP_SH_DELTA 0 +#define MICROMIPSOP_MASK_CODE10 0x3ff +#define MICROMIPSOP_SH_CODE10 16 /* 10-bit wait code. */ +#define MICROMIPSOP_MASK_TRAP 0xf +#define MICROMIPSOP_SH_TRAP 12 /* 4-bit trap code. */ +#define MICROMIPSOP_MASK_SHAMT 0x1f +#define MICROMIPSOP_SH_SHAMT 11 +#define MICROMIPSOP_MASK_TARGET 0x3ffffff +#define MICROMIPSOP_SH_TARGET 0 +#define MICROMIPSOP_MASK_EXTLSB 0x1f /* "ext" LSB. */ +#define MICROMIPSOP_SH_EXTLSB 6 +#define MICROMIPSOP_MASK_EXTMSBD 0x1f /* "ext" MSBD. */ +#define MICROMIPSOP_SH_EXTMSBD 11 +#define MICROMIPSOP_MASK_INSMSB 0x1f /* "ins" MSB. */ +#define MICROMIPSOP_SH_INSMSB 11 +#define MICROMIPSOP_MASK_CODE 0x3ff +#define MICROMIPSOP_SH_CODE 16 /* 10-bit higher break code. */ +#define MICROMIPSOP_MASK_CODE2 0x3ff +#define MICROMIPSOP_SH_CODE2 6 /* 10-bit lower break code. */ +#define MICROMIPSOP_MASK_CACHE 0x1f +#define MICROMIPSOP_SH_CACHE 21 /* 5-bit cache op. */ +#define MICROMIPSOP_MASK_SEL 0x7 +#define MICROMIPSOP_SH_SEL 11 +#define MICROMIPSOP_MASK_OFFSET12 0xfff +#define MICROMIPSOP_SH_OFFSET12 0 +#define MICROMIPSOP_MASK_3BITPOS 0x7 +#define MICROMIPSOP_SH_3BITPOS 21 +#define MICROMIPSOP_MASK_STYPE 0x1f +#define MICROMIPSOP_SH_STYPE 16 +#define MICROMIPSOP_MASK_OFFSET10 0x3ff +#define MICROMIPSOP_SH_OFFSET10 6 +#define MICROMIPSOP_MASK_RS 0x1f +#define MICROMIPSOP_SH_RS 16 +#define MICROMIPSOP_MASK_RT 0x1f +#define MICROMIPSOP_SH_RT 21 +#define MICROMIPSOP_MASK_RD 0x1f +#define MICROMIPSOP_SH_RD 11 +#define MICROMIPSOP_MASK_FS 0x1f +#define MICROMIPSOP_SH_FS 16 +#define MICROMIPSOP_MASK_FT 0x1f +#define MICROMIPSOP_SH_FT 21 +#define MICROMIPSOP_MASK_FD 0x1f +#define MICROMIPSOP_SH_FD 11 +#define MICROMIPSOP_MASK_FR 0x1f +#define MICROMIPSOP_SH_FR 6 +#define MICROMIPSOP_MASK_RS3 0x1f +#define MICROMIPSOP_SH_RS3 6 +#define MICROMIPSOP_MASK_PREFX 0x1f +#define MICROMIPSOP_SH_PREFX 11 +#define MICROMIPSOP_MASK_BCC 0x7 +#define MICROMIPSOP_SH_BCC 18 +#define MICROMIPSOP_MASK_CCC 0x7 +#define MICROMIPSOP_SH_CCC 13 +#define MICROMIPSOP_MASK_COPZ 0x7fffff +#define MICROMIPSOP_SH_COPZ 3 + +#define MICROMIPSOP_MASK_MB 0x7 +#define MICROMIPSOP_SH_MB 23 +#define MICROMIPSOP_MASK_MC 0x7 +#define MICROMIPSOP_SH_MC 4 +#define MICROMIPSOP_MASK_MD 0x7 +#define MICROMIPSOP_SH_MD 7 +#define MICROMIPSOP_MASK_ME 0x7 +#define MICROMIPSOP_SH_ME 1 +#define MICROMIPSOP_MASK_MF 0x7 +#define MICROMIPSOP_SH_MF 3 +#define MICROMIPSOP_MASK_MG 0x7 +#define MICROMIPSOP_SH_MG 0 +#define MICROMIPSOP_MASK_MH 0x7 +#define MICROMIPSOP_SH_MH 7 +#define MICROMIPSOP_MASK_MI 0x7 +#define MICROMIPSOP_SH_MI 7 +#define MICROMIPSOP_MASK_MJ 0x1f +#define MICROMIPSOP_SH_MJ 0 +#define MICROMIPSOP_MASK_ML 0x7 +#define MICROMIPSOP_SH_ML 4 +#define MICROMIPSOP_MASK_MM 0x7 +#define MICROMIPSOP_SH_MM 1 +#define MICROMIPSOP_MASK_MN 0x7 +#define MICROMIPSOP_SH_MN 4 +#define MICROMIPSOP_MASK_MP 0x1f +#define MICROMIPSOP_SH_MP 5 +#define MICROMIPSOP_MASK_MQ 0x7 +#define MICROMIPSOP_SH_MQ 7 + +#define MICROMIPSOP_MASK_IMMA 0x7f +#define MICROMIPSOP_SH_IMMA 0 +#define MICROMIPSOP_MASK_IMMB 0x7 +#define MICROMIPSOP_SH_IMMB 1 +#define MICROMIPSOP_MASK_IMMC 0xf +#define MICROMIPSOP_SH_IMMC 0 +#define MICROMIPSOP_MASK_IMMD 0x3ff +#define MICROMIPSOP_SH_IMMD 0 +#define MICROMIPSOP_MASK_IMME 0x7f +#define MICROMIPSOP_SH_IMME 0 +#define MICROMIPSOP_MASK_IMMF 0xf +#define MICROMIPSOP_SH_IMMF 0 +#define MICROMIPSOP_MASK_IMMG 0xf +#define MICROMIPSOP_SH_IMMG 0 +#define MICROMIPSOP_MASK_IMMH 0xf +#define MICROMIPSOP_SH_IMMH 0 +#define MICROMIPSOP_MASK_IMMI 0x7f +#define MICROMIPSOP_SH_IMMI 0 +#define MICROMIPSOP_MASK_IMMJ 0xf +#define MICROMIPSOP_SH_IMMJ 0 +#define MICROMIPSOP_MASK_IMML 0xf +#define MICROMIPSOP_SH_IMML 0 +#define MICROMIPSOP_MASK_IMMM 0x7 +#define MICROMIPSOP_SH_IMMM 1 +#define MICROMIPSOP_MASK_IMMN 0x3 +#define MICROMIPSOP_SH_IMMN 4 +#define MICROMIPSOP_MASK_IMMO 0xf +#define MICROMIPSOP_SH_IMMO 0 +#define MICROMIPSOP_MASK_IMMP 0x1f +#define MICROMIPSOP_SH_IMMP 0 +#define MICROMIPSOP_MASK_IMMQ 0x7fffff +#define MICROMIPSOP_SH_IMMQ 0 +#define MICROMIPSOP_MASK_IMMU 0x1f +#define MICROMIPSOP_SH_IMMU 0 +#define MICROMIPSOP_MASK_IMMW 0x3f +#define MICROMIPSOP_SH_IMMW 1 +#define MICROMIPSOP_MASK_IMMX 0xf +#define MICROMIPSOP_SH_IMMX 1 +#define MICROMIPSOP_MASK_IMMY 0x1ff +#define MICROMIPSOP_SH_IMMY 1 + +/* Placeholders for fields that only exist in the traditional 32-bit + instruction encoding; see the comment above for details. */ +#define MICROMIPSOP_MASK_CODE20 0 +#define MICROMIPSOP_SH_CODE20 0 +#define MICROMIPSOP_MASK_PERFREG 0 +#define MICROMIPSOP_SH_PERFREG 0 +#define MICROMIPSOP_MASK_CODE19 0 +#define MICROMIPSOP_SH_CODE19 0 +#define MICROMIPSOP_MASK_ALN 0 +#define MICROMIPSOP_SH_ALN 0 +#define MICROMIPSOP_MASK_VECBYTE 0 +#define MICROMIPSOP_SH_VECBYTE 0 +#define MICROMIPSOP_MASK_VECALIGN 0 +#define MICROMIPSOP_SH_VECALIGN 0 +#define MICROMIPSOP_MASK_DSPACC 0 +#define MICROMIPSOP_SH_DSPACC 0 +#define MICROMIPSOP_MASK_DSPACC_S 0 +#define MICROMIPSOP_SH_DSPACC_S 0 +#define MICROMIPSOP_MASK_DSPSFT 0 +#define MICROMIPSOP_SH_DSPSFT 0 +#define MICROMIPSOP_MASK_DSPSFT_7 0 +#define MICROMIPSOP_SH_DSPSFT_7 0 +#define MICROMIPSOP_MASK_SA3 0 +#define MICROMIPSOP_SH_SA3 0 +#define MICROMIPSOP_MASK_SA4 0 +#define MICROMIPSOP_SH_SA4 0 +#define MICROMIPSOP_MASK_IMM8 0 +#define MICROMIPSOP_SH_IMM8 0 +#define MICROMIPSOP_MASK_IMM10 0 +#define MICROMIPSOP_SH_IMM10 0 +#define MICROMIPSOP_MASK_WRDSP 0 +#define MICROMIPSOP_SH_WRDSP 0 +#define MICROMIPSOP_MASK_RDDSP 0 +#define MICROMIPSOP_SH_RDDSP 0 +#define MICROMIPSOP_MASK_BP 0 +#define MICROMIPSOP_SH_BP 0 +#define MICROMIPSOP_MASK_MT_U 0 +#define MICROMIPSOP_SH_MT_U 0 +#define MICROMIPSOP_MASK_MT_H 0 +#define MICROMIPSOP_SH_MT_H 0 +#define MICROMIPSOP_MASK_MTACC_T 0 +#define MICROMIPSOP_SH_MTACC_T 0 +#define MICROMIPSOP_MASK_MTACC_D 0 +#define MICROMIPSOP_SH_MTACC_D 0 +#define MICROMIPSOP_MASK_BBITIND 0 +#define MICROMIPSOP_SH_BBITIND 0 +#define MICROMIPSOP_MASK_CINSPOS 0 +#define MICROMIPSOP_SH_CINSPOS 0 +#define MICROMIPSOP_MASK_CINSLM1 0 +#define MICROMIPSOP_SH_CINSLM1 0 +#define MICROMIPSOP_MASK_SEQI 0 +#define MICROMIPSOP_SH_SEQI 0 +#define MICROMIPSOP_SH_OFFSET_A 0 +#define MICROMIPSOP_MASK_OFFSET_A 0 +#define MICROMIPSOP_SH_OFFSET_B 0 +#define MICROMIPSOP_MASK_OFFSET_B 0 +#define MICROMIPSOP_SH_OFFSET_C 0 +#define MICROMIPSOP_MASK_OFFSET_C 0 +#define MICROMIPSOP_SH_RZ 0 +#define MICROMIPSOP_MASK_RZ 0 +#define MICROMIPSOP_SH_FZ 0 +#define MICROMIPSOP_MASK_FZ 0 + +/* These are the characters which may appears in the args field of a microMIPS + instruction. They appear in the order in which the fields appear + when the instruction is used. Commas and parentheses in the args + string are ignored when assembling, and written into the output + when disassembling. + + The followings are for 16-bit microMIPS instructions. + + "ma" must be $28 + "mc" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_MC) at bit 4 + The same register used as both source and target. + "md" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_MD) at bit 7 + "me" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_ME) at bit 1 + The same register used as both source and target. + "mf" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_MF) at bit 3 + "mg" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_MG) at bit 0 + "mh" MIPS registers 4, 5, 6 (MICROMIPSOP_*_MH) at bit 7 + "mi" MIPS registers 5, 6, 7, 21, 22 (MICROMIPSOP_*_MI) at bit 7 + ("mh" and "mi" form a valid 3-bit register pair) + "mj" 5-bit MIPS registers (MICROMIPSOP_*_MJ) at bit 0 + "ml" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_ML) at bit 4 + "mm" 3-bit MIPS registers 0, 2, 3, 16-20 (MICROMIPSOP_*_MM) at bit 1 + "mn" 3-bit MIPS registers 0, 2, 3, 16-20 (MICROMIPSOP_*_MN) at bit 4 + "mp" 5-bit MIPS registers (MICROMIPSOP_*_MP) at bit 5 + "mq" 3-bit MIPS registers 0, 2-7, 17 (MICROMIPSOP_*_MQ) at bit 7 + "mr" must be program counter + "ms" must be $29 + "mt" must be the same as the previous register + "mx" must be the same as the destination register + "my" must be $31 + "mz" must be $0 + + "mA" 7-bit immediate (-64 .. 63) << 2 (MICROMIPSOP_*_IMMA) + "mB" 3-bit immediate (-1, 1, 4, 8, 12, 16, 20, 24) (MICROMIPSOP_*_IMMB) + "mC" 4-bit immediate (1, 2, 3, 4, 7, 8, 15, 16, 31, 32, 63, 64, 128, 255, + 32768, 65535) (MICROMIPSOP_*_IMMC) + "mD" 10-bit branch address (-512 .. 511) << 1 (MICROMIPSOP_*_IMMD) + "mE" 7-bit branch address (-64 .. 63) << 1 (MICROMIPSOP_*_IMME) + "mF" 4-bit immediate (0 .. 15) (MICROMIPSOP_*_IMMF) + "mG" 4-bit immediate (-1 .. 14) (MICROMIPSOP_*_IMMG) + "mH" 4-bit immediate (0 .. 15) << 1 (MICROMIPSOP_*_IMMH) + "mI" 7-bit immediate (-1 .. 126) (MICROMIPSOP_*_IMMI) + "mJ" 4-bit immediate (0 .. 15) << 2 (MICROMIPSOP_*_IMMJ) + "mL" 4-bit immediate (0 .. 15) (MICROMIPSOP_*_IMML) + "mM" 3-bit immediate (1 .. 8) (MICROMIPSOP_*_IMMM) + "mN" 2-bit immediate (0 .. 3) for register list (MICROMIPSOP_*_IMMN) + "mO" 4-bit immediate (0 .. 15) (MICROMIPSOP_*_IMML) + "mP" 5-bit immediate (0 .. 31) << 2 (MICROMIPSOP_*_IMMP) + "mU" 5-bit immediate (0 .. 31) << 2 (MICROMIPSOP_*_IMMU) + "mW" 6-bit immediate (0 .. 63) << 2 (MICROMIPSOP_*_IMMW) + "mX" 4-bit immediate (-8 .. 7) (MICROMIPSOP_*_IMMX) + "mY" 9-bit immediate (-258 .. -3, 2 .. 257) << 2 (MICROMIPSOP_*_IMMY) + "mZ" must be zero + + In most cases 32-bit microMIPS instructions use the same characters + as MIPS (with ADDIUPC being a notable exception, but there are some + others too). + + "." 10-bit signed offset/number (MICROMIPSOP_*_OFFSET10) + "1" 5-bit sync type (MICROMIPSOP_*_SHAMT) + "<" 5-bit shift amount (MICROMIPSOP_*_SHAMT) + ">" shift amount between 32 and 63, stored after subtracting 32 + (MICROMIPSOP_*_SHAMT) + "\" 3-bit position for ASET and ACLR (MICROMIPSOP_*_3BITPOS) + "|" 4-bit trap code (MICROMIPSOP_*_TRAP) + "~" 12-bit signed offset (MICROMIPSOP_*_OFFSET12) + "a" 26-bit target address (MICROMIPSOP_*_TARGET) + "b" 5-bit base register (MICROMIPSOP_*_RS) + "c" 10-bit higher breakpoint code (MICROMIPSOP_*_CODE) + "d" 5-bit destination register specifier (MICROMIPSOP_*_RD) + "h" 5-bit PREFX hint (MICROMIPSOP_*_PREFX) + "i" 16 bit unsigned immediate (MICROMIPSOP_*_IMMEDIATE) + "j" 16-bit signed immediate (MICROMIPSOP_*_DELTA) + "k" 5-bit cache opcode in target register position (MICROMIPSOP_*_CACHE) + "n" register list for 32-bit LWM/SWM instruction (MICROMIPSOP_*_RT) + "o" 16-bit signed offset (MICROMIPSOP_*_DELTA) + "p" 16-bit PC-relative branch target address (MICROMIPSOP_*_DELTA) + "q" 10-bit lower breakpoint code (MICROMIPSOP_*_CODE2) + "r" 5-bit same register used as both source and target (MICROMIPSOP_*_RS) + "s" 5-bit source register specifier (MICROMIPSOP_*_RS) + "t" 5-bit target register (MICROMIPSOP_*_RT) + "u" 16-bit upper 16 bits of address (MICROMIPSOP_*_IMMEDIATE) + "v" 5-bit same register used as both source and destination + (MICROMIPSOP_*_RS) + "w" 5-bit same register used as both target and destination + (MICROMIPSOP_*_RT) + "y" 5-bit source 3 register for ALNV.PS (MICROMIPSOP_*_RS3) + "z" must be zero register + "C" 23-bit coprocessor function code (MICROMIPSOP_*_COPZ) + "B" 8-bit syscall/wait function code (MICROMIPSOP_*_CODE10) + "K" 5-bit Hardware Register (RDHWR instruction) (MICROMIPSOP_*_RS) + + "+A" 5-bit INS/EXT/DINS/DEXT/DINSM/DEXTM position, which becomes + LSB (MICROMIPSOP_*_EXTLSB). + Enforces: 0 <= pos < 32. + "+B" 5-bit INS/DINS size, which becomes MSB (MICROMIPSOP_*_INSMSB). + Requires that "+A" or "+E" occur first to set position. + Enforces: 0 < (pos+size) <= 32. + "+C" 5-bit EXT/DEXT size, which becomes MSBD (MICROMIPSOP_*_EXTMSBD). + Requires that "+A" or "+E" occur first to set position. + Enforces: 0 < (pos+size) <= 32. + (Also used by DEXT w/ different limits, but limits for + that are checked by the M_DEXT macro.) + "+E" 5-bit DINSU/DEXTU position, which becomes LSB-32 (MICROMIPSOP_*_EXTLSB). + Enforces: 32 <= pos < 64. + "+F" 5-bit DINSM/DINSU size, which becomes MSB-32 (MICROMIPSOP_*_INSMSB). + Requires that "+A" or "+E" occur first to set position. + Enforces: 32 < (pos+size) <= 64. + "+G" 5-bit DEXTM size, which becomes MSBD-32 (MICROMIPSOP_*_EXTMSBD). + Requires that "+A" or "+E" occur first to set position. + Enforces: 32 < (pos+size) <= 64. + "+H" 5-bit DEXTU size, which becomes MSBD (MICROMIPSOP_*_EXTMSBD). + Requires that "+A" or "+E" occur first to set position. + Enforces: 32 < (pos+size) <= 64. + + PC-relative addition (ADDIUPC) instruction: + "mQ" 23-bit offset (-4194304 .. 4194303) << 2 (MICROMIPSOP_*_IMMQ) + "mb" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_MB) at bit 23 + + Floating point instructions: + "D" 5-bit destination register (MICROMIPSOP_*_FD) + "M" 3-bit compare condition code (MICROMIPSOP_*_CCC) + "N" 3-bit branch condition code (MICROMIPSOP_*_BCC) + "R" 5-bit fr source 3 register (MICROMIPSOP_*_FR) + "S" 5-bit fs source 1 register (MICROMIPSOP_*_FS) + "T" 5-bit ft source 2 register (MICROMIPSOP_*_FT) + "V" 5-bit same register used as floating source and destination or target + (MICROMIPSOP_*_FS) + + Coprocessor instructions: + "E" 5-bit target register (MICROMIPSOP_*_RT) + "G" 5-bit destination register (MICROMIPSOP_*_RD) + "H" 3-bit sel field for (D)MTC* and (D)MFC* (MICROMIPSOP_*_SEL) + "+D" combined destination register ("G") and sel ("H") for CP0 ops, + for pretty-printing in disassembly only + + Macro instructions: + "A" general 32 bit expression + "I" 32-bit immediate (value placed in imm_expr). + "+I" 32-bit immediate (value placed in imm2_expr). + "F" 64-bit floating point constant in .rdata + "L" 64-bit floating point constant in .lit8 + "f" 32-bit floating point constant + "l" 32-bit floating point constant in .lit4 + + Other: + "()" parens surrounding optional value + "," separates operands + "+" start of extension sequence + "m" start of microMIPS extension sequence + + Characters used so far, for quick reference when adding more: + "1234567890" + "<>(),+.\|~" + "ABCDEFGHI KLMN RST V " + "abcd f hijklmnopqrstuvw yz" + + Extension character sequences used so far ("+" followed by the + following), for quick reference when adding more: + "" + "" + "ABCDEFGHI" + "" + + Extension character sequences used so far ("m" followed by the + following), for quick reference when adding more: + "" + "" + " BCDEFGHIJ LMNOPQ U WXYZ" + " bcdefghij lmn pq st xyz" +*/ + +extern const struct mips_opcode micromips_opcodes[]; +extern const int bfd_micromips_num_opcodes; + /* A NOP insn impemented as "or at,at,zero". Used to implement -mfix-loongson2f. */ #define LOONGSON2F_NOP_INSN 0x00200825 diff --git a/include/opcode/s390.h b/include/opcode/s390.h index 2cbe5f5..ed70830 100644 --- a/include/opcode/s390.h +++ b/include/opcode/s390.h @@ -147,4 +147,7 @@ extern const struct s390_operand s390_operands[]; the instruction may be optional. */ #define S390_OPERAND_OPTIONAL 0x400 +/* The operand needs to be a valid GP or FP register pair. */ +#define S390_OPERAND_REG_PAIR 0x800 + #endif /* S390_H */ diff --git a/include/opcode/sparc.h b/include/opcode/sparc.h index 0d6511c..7ae3641 100644 --- a/include/opcode/sparc.h +++ b/include/opcode/sparc.h @@ -1,6 +1,6 @@ /* Definitions for opcode table for the sparc. Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000, 2002, - 2003, 2005, 2010 Free Software Foundation, Inc. + 2003, 2005, 2010, 2011 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and the GNU Binutils. @@ -98,18 +98,37 @@ typedef struct sparc_opcode unsigned long lose; /* Bits that must not be set. */ const char *args; /* This was called "delayed" in versions before the flags. */ - char flags; + unsigned int flags; short architecture; /* Bitmask of sparc_opcode_arch_val's. */ } sparc_opcode; -#define F_DELAYED 1 /* Delayed branch. */ -#define F_ALIAS 2 /* Alias for a "real" instruction. */ -#define F_UNBR 4 /* Unconditional branch. */ -#define F_CONDBR 8 /* Conditional branch. */ -#define F_JSR 16 /* Subroutine call. */ -#define F_FLOAT 32 /* Floating point instruction (not a branch). */ -#define F_FBR 64 /* Floating point branch. */ /* FIXME: Add F_ANACHRONISTIC flag for v9. */ +#define F_DELAYED 0x00000001 /* Delayed branch. */ +#define F_ALIAS 0x00000002 /* Alias for a "real" instruction. */ +#define F_UNBR 0x00000004 /* Unconditional branch. */ +#define F_CONDBR 0x00000008 /* Conditional branch. */ +#define F_JSR 0x00000010 /* Subroutine call. */ +#define F_FLOAT 0x00000020 /* Floating point instruction (not a branch). */ +#define F_FBR 0x00000040 /* Floating point branch. */ +#define F_MUL32 0x00000100 /* umul/umulcc/smul/smulcc insns */ +#define F_DIV32 0x00000200 /* udiv/udivcc/sdiv/sdivcc insns */ +#define F_FSMULD 0x00000400 /* 'fsmuld' insn */ +#define F_V8PLUS 0x00000800 /* v9 insns available to 32bit */ +#define F_POPC 0x00001000 /* 'popc' insn */ +#define F_VIS 0x00002000 /* VIS insns */ +#define F_VIS2 0x00004000 /* VIS2 insns */ +#define F_ASI_BLK_INIT 0x00008000 /* block init ASIs */ +#define F_FMAF 0x00010000 /* fused multiply-add */ +#define F_VIS3 0x00020000 /* VIS3 insns */ +#define F_HPC 0x00040000 /* HPC insns */ +#define F_RANDOM 0x00080000 /* 'random' insn */ +#define F_TRANS 0x00100000 /* transaction insns */ +#define F_FJFMAU 0x00200000 /* unfused multiply-add */ +#define F_IMA 0x00400000 /* integer multiply-add */ +#define F_ASI_CACHE_SPARING \ + 0x00800000 /* cache sparing ASIs */ + +#define F_HWCAP_MASK 0x00ffff00 /* All sparc opcodes are 32 bits, except for the `set' instruction (really a macro), which is 64 bits. It is handled as a special case. @@ -131,6 +150,8 @@ typedef struct sparc_opcode f frs2 floating point register. B frs2 floating point register (double/even). R frs2 floating point register (quad/multiple of 4). + 4 frs3 floating point register. + 5 frs3 floating point register (doube/even). g frsd floating point register. H frsd floating point register (double/even). J frsd floating point register (quad/multiple of 4). @@ -187,15 +208,14 @@ typedef struct sparc_opcode 0 32/64 bit immediate for set or setx (v9) insns _ Ancillary state register in rd (v9a) / Ancillary state register in rs1 (v9a) - - The following chars are unused: (note: ,[] are used as punctuation) - [45]. */ + ( entire floating point state register (%efsr). */ #define OP2(x) (((x) & 0x7) << 22) /* Op2 field of format2 insns. */ #define OP3(x) (((x) & 0x3f) << 19) /* Op3 field of format3 insns. */ #define OP(x) ((unsigned) ((x) & 0x3) << 30) /* Op field of all insns. */ #define OPF(x) (((x) & 0x1ff) << 5) /* Opf field of float insns. */ #define OPF_LOW5(x) OPF ((x) & 0x1f) /* V9. */ +#define OPF_LOW4(x) OPF ((x) & 0xf) /* V9. */ #define F3F(x, y, z) (OP (x) | OP3 (y) | OPF (z)) /* Format3 float insns. */ #define F3I(x) (((x) & 0x1) << 13) /* Immediate field of format 3 insns. */ #define F2(x, y) (OP (x) | OP2(y)) /* Format 2 insns. */ @@ -207,6 +227,7 @@ typedef struct sparc_opcode #define SIMM13(x) ((x) & 0x1fff) /* Simm13 field. */ #define RD(x) (((x) & 0x1f) << 25) /* Destination register field. */ #define RS1(x) (((x) & 0x1f) << 14) /* Rs1 field. */ +#define RS3(x) (((x) & 0x1f) << 9) /* Rs3 field. */ #define ASI_RS2(x) (SIMM13 (x)) #define MEMBAR(x) ((x) & 0x7f) #define SLCPOP(x) (((x) & 0x7f) << 6) /* Sparclet cpop. */ diff --git a/include/opcode/tilegx.h b/include/opcode/tilegx.h new file mode 100644 index 0000000..95a9ca7 --- /dev/null +++ b/include/opcode/tilegx.h @@ -0,0 +1,1302 @@ +/* TILE-Gx opcode information. + * + * Copyright 2011 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef opcode_tile_h +#define opcode_tile_h + +typedef unsigned long long tilegx_bundle_bits; + + +enum +{ + TILEGX_MAX_OPERANDS = 4 /* bfexts */ +}; + +typedef enum +{ + TILEGX_OPC_BPT, + TILEGX_OPC_INFO, + TILEGX_OPC_INFOL, + TILEGX_OPC_MOVE, + TILEGX_OPC_MOVEI, + TILEGX_OPC_MOVELI, + TILEGX_OPC_PREFETCH, + TILEGX_OPC_PREFETCH_ADD_L1, + TILEGX_OPC_PREFETCH_ADD_L1_FAULT, + TILEGX_OPC_PREFETCH_ADD_L2, + TILEGX_OPC_PREFETCH_ADD_L2_FAULT, + TILEGX_OPC_PREFETCH_ADD_L3, + TILEGX_OPC_PREFETCH_ADD_L3_FAULT, + TILEGX_OPC_PREFETCH_L1, + TILEGX_OPC_PREFETCH_L1_FAULT, + TILEGX_OPC_PREFETCH_L2, + TILEGX_OPC_PREFETCH_L2_FAULT, + TILEGX_OPC_PREFETCH_L3, + TILEGX_OPC_PREFETCH_L3_FAULT, + TILEGX_OPC_RAISE, + TILEGX_OPC_ADD, + TILEGX_OPC_ADDI, + TILEGX_OPC_ADDLI, + TILEGX_OPC_ADDX, + TILEGX_OPC_ADDXI, + TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXSC, + TILEGX_OPC_AND, + TILEGX_OPC_ANDI, + TILEGX_OPC_BEQZ, + TILEGX_OPC_BEQZT, + TILEGX_OPC_BFEXTS, + TILEGX_OPC_BFEXTU, + TILEGX_OPC_BFINS, + TILEGX_OPC_BGEZ, + TILEGX_OPC_BGEZT, + TILEGX_OPC_BGTZ, + TILEGX_OPC_BGTZT, + TILEGX_OPC_BLBC, + TILEGX_OPC_BLBCT, + TILEGX_OPC_BLBS, + TILEGX_OPC_BLBST, + TILEGX_OPC_BLEZ, + TILEGX_OPC_BLEZT, + TILEGX_OPC_BLTZ, + TILEGX_OPC_BLTZT, + TILEGX_OPC_BNEZ, + TILEGX_OPC_BNEZT, + TILEGX_OPC_CLZ, + TILEGX_OPC_CMOVEQZ, + TILEGX_OPC_CMOVNEZ, + TILEGX_OPC_CMPEQ, + TILEGX_OPC_CMPEQI, + TILEGX_OPC_CMPEXCH, + TILEGX_OPC_CMPEXCH4, + TILEGX_OPC_CMPLES, + TILEGX_OPC_CMPLEU, + TILEGX_OPC_CMPLTS, + TILEGX_OPC_CMPLTSI, + TILEGX_OPC_CMPLTU, + TILEGX_OPC_CMPLTUI, + TILEGX_OPC_CMPNE, + TILEGX_OPC_CMUL, + TILEGX_OPC_CMULA, + TILEGX_OPC_CMULAF, + TILEGX_OPC_CMULF, + TILEGX_OPC_CMULFR, + TILEGX_OPC_CMULH, + TILEGX_OPC_CMULHR, + TILEGX_OPC_CRC32_32, + TILEGX_OPC_CRC32_8, + TILEGX_OPC_CTZ, + TILEGX_OPC_DBLALIGN, + TILEGX_OPC_DBLALIGN2, + TILEGX_OPC_DBLALIGN4, + TILEGX_OPC_DBLALIGN6, + TILEGX_OPC_DRAIN, + TILEGX_OPC_DTLBPR, + TILEGX_OPC_EXCH, + TILEGX_OPC_EXCH4, + TILEGX_OPC_FDOUBLE_ADD_FLAGS, + TILEGX_OPC_FDOUBLE_ADDSUB, + TILEGX_OPC_FDOUBLE_MUL_FLAGS, + TILEGX_OPC_FDOUBLE_PACK1, + TILEGX_OPC_FDOUBLE_PACK2, + TILEGX_OPC_FDOUBLE_SUB_FLAGS, + TILEGX_OPC_FDOUBLE_UNPACK_MAX, + TILEGX_OPC_FDOUBLE_UNPACK_MIN, + TILEGX_OPC_FETCHADD, + TILEGX_OPC_FETCHADD4, + TILEGX_OPC_FETCHADDGEZ, + TILEGX_OPC_FETCHADDGEZ4, + TILEGX_OPC_FETCHAND, + TILEGX_OPC_FETCHAND4, + TILEGX_OPC_FETCHOR, + TILEGX_OPC_FETCHOR4, + TILEGX_OPC_FINV, + TILEGX_OPC_FLUSH, + TILEGX_OPC_FLUSHWB, + TILEGX_OPC_FNOP, + TILEGX_OPC_FSINGLE_ADD1, + TILEGX_OPC_FSINGLE_ADDSUB2, + TILEGX_OPC_FSINGLE_MUL1, + TILEGX_OPC_FSINGLE_MUL2, + TILEGX_OPC_FSINGLE_PACK1, + TILEGX_OPC_FSINGLE_PACK2, + TILEGX_OPC_FSINGLE_SUB1, + TILEGX_OPC_ICOH, + TILEGX_OPC_ILL, + TILEGX_OPC_INV, + TILEGX_OPC_IRET, + TILEGX_OPC_J, + TILEGX_OPC_JAL, + TILEGX_OPC_JALR, + TILEGX_OPC_JALRP, + TILEGX_OPC_JR, + TILEGX_OPC_JRP, + TILEGX_OPC_LD, + TILEGX_OPC_LD1S, + TILEGX_OPC_LD1S_ADD, + TILEGX_OPC_LD1U, + TILEGX_OPC_LD1U_ADD, + TILEGX_OPC_LD2S, + TILEGX_OPC_LD2S_ADD, + TILEGX_OPC_LD2U, + TILEGX_OPC_LD2U_ADD, + TILEGX_OPC_LD4S, + TILEGX_OPC_LD4S_ADD, + TILEGX_OPC_LD4U, + TILEGX_OPC_LD4U_ADD, + TILEGX_OPC_LD_ADD, + TILEGX_OPC_LDNA, + TILEGX_OPC_LDNA_ADD, + TILEGX_OPC_LDNT, + TILEGX_OPC_LDNT1S, + TILEGX_OPC_LDNT1S_ADD, + TILEGX_OPC_LDNT1U, + TILEGX_OPC_LDNT1U_ADD, + TILEGX_OPC_LDNT2S, + TILEGX_OPC_LDNT2S_ADD, + TILEGX_OPC_LDNT2U, + TILEGX_OPC_LDNT2U_ADD, + TILEGX_OPC_LDNT4S, + TILEGX_OPC_LDNT4S_ADD, + TILEGX_OPC_LDNT4U, + TILEGX_OPC_LDNT4U_ADD, + TILEGX_OPC_LDNT_ADD, + TILEGX_OPC_LNK, + TILEGX_OPC_MF, + TILEGX_OPC_MFSPR, + TILEGX_OPC_MM, + TILEGX_OPC_MNZ, + TILEGX_OPC_MTSPR, + TILEGX_OPC_MUL_HS_HS, + TILEGX_OPC_MUL_HS_HU, + TILEGX_OPC_MUL_HS_LS, + TILEGX_OPC_MUL_HS_LU, + TILEGX_OPC_MUL_HU_HU, + TILEGX_OPC_MUL_HU_LS, + TILEGX_OPC_MUL_HU_LU, + TILEGX_OPC_MUL_LS_LS, + TILEGX_OPC_MUL_LS_LU, + TILEGX_OPC_MUL_LU_LU, + TILEGX_OPC_MULA_HS_HS, + TILEGX_OPC_MULA_HS_HU, + TILEGX_OPC_MULA_HS_LS, + TILEGX_OPC_MULA_HS_LU, + TILEGX_OPC_MULA_HU_HU, + TILEGX_OPC_MULA_HU_LS, + TILEGX_OPC_MULA_HU_LU, + TILEGX_OPC_MULA_LS_LS, + TILEGX_OPC_MULA_LS_LU, + TILEGX_OPC_MULA_LU_LU, + TILEGX_OPC_MULAX, + TILEGX_OPC_MULX, + TILEGX_OPC_MZ, + TILEGX_OPC_NAP, + TILEGX_OPC_NOP, + TILEGX_OPC_NOR, + TILEGX_OPC_OR, + TILEGX_OPC_ORI, + TILEGX_OPC_PCNT, + TILEGX_OPC_REVBITS, + TILEGX_OPC_REVBYTES, + TILEGX_OPC_ROTL, + TILEGX_OPC_ROTLI, + TILEGX_OPC_SHL, + TILEGX_OPC_SHL16INSLI, + TILEGX_OPC_SHL1ADD, + TILEGX_OPC_SHL1ADDX, + TILEGX_OPC_SHL2ADD, + TILEGX_OPC_SHL2ADDX, + TILEGX_OPC_SHL3ADD, + TILEGX_OPC_SHL3ADDX, + TILEGX_OPC_SHLI, + TILEGX_OPC_SHLX, + TILEGX_OPC_SHLXI, + TILEGX_OPC_SHRS, + TILEGX_OPC_SHRSI, + TILEGX_OPC_SHRU, + TILEGX_OPC_SHRUI, + TILEGX_OPC_SHRUX, + TILEGX_OPC_SHRUXI, + TILEGX_OPC_SHUFFLEBYTES, + TILEGX_OPC_ST, + TILEGX_OPC_ST1, + TILEGX_OPC_ST1_ADD, + TILEGX_OPC_ST2, + TILEGX_OPC_ST2_ADD, + TILEGX_OPC_ST4, + TILEGX_OPC_ST4_ADD, + TILEGX_OPC_ST_ADD, + TILEGX_OPC_STNT, + TILEGX_OPC_STNT1, + TILEGX_OPC_STNT1_ADD, + TILEGX_OPC_STNT2, + TILEGX_OPC_STNT2_ADD, + TILEGX_OPC_STNT4, + TILEGX_OPC_STNT4_ADD, + TILEGX_OPC_STNT_ADD, + TILEGX_OPC_SUB, + TILEGX_OPC_SUBX, + TILEGX_OPC_SUBXSC, + TILEGX_OPC_SWINT0, + TILEGX_OPC_SWINT1, + TILEGX_OPC_SWINT2, + TILEGX_OPC_SWINT3, + TILEGX_OPC_TBLIDXB0, + TILEGX_OPC_TBLIDXB1, + TILEGX_OPC_TBLIDXB2, + TILEGX_OPC_TBLIDXB3, + TILEGX_OPC_V1ADD, + TILEGX_OPC_V1ADDI, + TILEGX_OPC_V1ADDUC, + TILEGX_OPC_V1ADIFFU, + TILEGX_OPC_V1AVGU, + TILEGX_OPC_V1CMPEQ, + TILEGX_OPC_V1CMPEQI, + TILEGX_OPC_V1CMPLES, + TILEGX_OPC_V1CMPLEU, + TILEGX_OPC_V1CMPLTS, + TILEGX_OPC_V1CMPLTSI, + TILEGX_OPC_V1CMPLTU, + TILEGX_OPC_V1CMPLTUI, + TILEGX_OPC_V1CMPNE, + TILEGX_OPC_V1DDOTPU, + TILEGX_OPC_V1DDOTPUA, + TILEGX_OPC_V1DDOTPUS, + TILEGX_OPC_V1DDOTPUSA, + TILEGX_OPC_V1DOTP, + TILEGX_OPC_V1DOTPA, + TILEGX_OPC_V1DOTPU, + TILEGX_OPC_V1DOTPUA, + TILEGX_OPC_V1DOTPUS, + TILEGX_OPC_V1DOTPUSA, + TILEGX_OPC_V1INT_H, + TILEGX_OPC_V1INT_L, + TILEGX_OPC_V1MAXU, + TILEGX_OPC_V1MAXUI, + TILEGX_OPC_V1MINU, + TILEGX_OPC_V1MINUI, + TILEGX_OPC_V1MNZ, + TILEGX_OPC_V1MULTU, + TILEGX_OPC_V1MULU, + TILEGX_OPC_V1MULUS, + TILEGX_OPC_V1MZ, + TILEGX_OPC_V1SADAU, + TILEGX_OPC_V1SADU, + TILEGX_OPC_V1SHL, + TILEGX_OPC_V1SHLI, + TILEGX_OPC_V1SHRS, + TILEGX_OPC_V1SHRSI, + TILEGX_OPC_V1SHRU, + TILEGX_OPC_V1SHRUI, + TILEGX_OPC_V1SUB, + TILEGX_OPC_V1SUBUC, + TILEGX_OPC_V2ADD, + TILEGX_OPC_V2ADDI, + TILEGX_OPC_V2ADDSC, + TILEGX_OPC_V2ADIFFS, + TILEGX_OPC_V2AVGS, + TILEGX_OPC_V2CMPEQ, + TILEGX_OPC_V2CMPEQI, + TILEGX_OPC_V2CMPLES, + TILEGX_OPC_V2CMPLEU, + TILEGX_OPC_V2CMPLTS, + TILEGX_OPC_V2CMPLTSI, + TILEGX_OPC_V2CMPLTU, + TILEGX_OPC_V2CMPLTUI, + TILEGX_OPC_V2CMPNE, + TILEGX_OPC_V2DOTP, + TILEGX_OPC_V2DOTPA, + TILEGX_OPC_V2INT_H, + TILEGX_OPC_V2INT_L, + TILEGX_OPC_V2MAXS, + TILEGX_OPC_V2MAXSI, + TILEGX_OPC_V2MINS, + TILEGX_OPC_V2MINSI, + TILEGX_OPC_V2MNZ, + TILEGX_OPC_V2MULFSC, + TILEGX_OPC_V2MULS, + TILEGX_OPC_V2MULTS, + TILEGX_OPC_V2MZ, + TILEGX_OPC_V2PACKH, + TILEGX_OPC_V2PACKL, + TILEGX_OPC_V2PACKUC, + TILEGX_OPC_V2SADAS, + TILEGX_OPC_V2SADAU, + TILEGX_OPC_V2SADS, + TILEGX_OPC_V2SADU, + TILEGX_OPC_V2SHL, + TILEGX_OPC_V2SHLI, + TILEGX_OPC_V2SHLSC, + TILEGX_OPC_V2SHRS, + TILEGX_OPC_V2SHRSI, + TILEGX_OPC_V2SHRU, + TILEGX_OPC_V2SHRUI, + TILEGX_OPC_V2SUB, + TILEGX_OPC_V2SUBSC, + TILEGX_OPC_V4ADD, + TILEGX_OPC_V4ADDSC, + TILEGX_OPC_V4INT_H, + TILEGX_OPC_V4INT_L, + TILEGX_OPC_V4PACKSC, + TILEGX_OPC_V4SHL, + TILEGX_OPC_V4SHLSC, + TILEGX_OPC_V4SHRS, + TILEGX_OPC_V4SHRU, + TILEGX_OPC_V4SUB, + TILEGX_OPC_V4SUBSC, + TILEGX_OPC_WH64, + TILEGX_OPC_XOR, + TILEGX_OPC_XORI, + TILEGX_OPC_NONE +} tilegx_mnemonic; + +/* 64-bit pattern for a { bpt ; nop } bundle. */ +#define TILEGX_BPT_BUNDLE 0x286a44ae51485000ULL + + + +static __inline unsigned int +get_BFEnd_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x3f); +} + +static __inline unsigned int +get_BFOpcodeExtension_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 24)) & 0xf); +} + +static __inline unsigned int +get_BFStart_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 18)) & 0x3f); +} + +static __inline unsigned int +get_BrOff_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 31)) & 0x0000003f) | + (((unsigned int)(n >> 37)) & 0x0001ffc0); +} + +static __inline unsigned int +get_BrType_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 54)) & 0x1f); +} + +static __inline unsigned int +get_Dest_Imm8_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 31)) & 0x0000003f) | + (((unsigned int)(n >> 43)) & 0x000000c0); +} + +static __inline unsigned int +get_Dest_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 0)) & 0x3f); +} + +static __inline unsigned int +get_Dest_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 31)) & 0x3f); +} + +static __inline unsigned int +get_Dest_Y0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 0)) & 0x3f); +} + +static __inline unsigned int +get_Dest_Y1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 31)) & 0x3f); +} + +static __inline unsigned int +get_Imm16_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0xffff); +} + +static __inline unsigned int +get_Imm16_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0xffff); +} + +static __inline unsigned int +get_Imm8OpcodeExtension_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 20)) & 0xff); +} + +static __inline unsigned int +get_Imm8OpcodeExtension_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 51)) & 0xff); +} + +static __inline unsigned int +get_Imm8_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0xff); +} + +static __inline unsigned int +get_Imm8_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0xff); +} + +static __inline unsigned int +get_Imm8_Y0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0xff); +} + +static __inline unsigned int +get_Imm8_Y1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0xff); +} + +static __inline unsigned int +get_JumpOff_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 31)) & 0x7ffffff); +} + +static __inline unsigned int +get_JumpOpcodeExtension_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 58)) & 0x1); +} + +static __inline unsigned int +get_MF_Imm14_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 37)) & 0x3fff); +} + +static __inline unsigned int +get_MT_Imm14_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 31)) & 0x0000003f) | + (((unsigned int)(n >> 37)) & 0x00003fc0); +} + +static __inline unsigned int +get_Mode(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 62)) & 0x3); +} + +static __inline unsigned int +get_Opcode_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 28)) & 0x7); +} + +static __inline unsigned int +get_Opcode_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 59)) & 0x7); +} + +static __inline unsigned int +get_Opcode_Y0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 27)) & 0xf); +} + +static __inline unsigned int +get_Opcode_Y1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 58)) & 0xf); +} + +static __inline unsigned int +get_Opcode_Y2(tilegx_bundle_bits n) +{ + return (((n >> 26)) & 0x00000001) | + (((unsigned int)(n >> 56)) & 0x00000002); +} + +static __inline unsigned int +get_RRROpcodeExtension_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 18)) & 0x3ff); +} + +static __inline unsigned int +get_RRROpcodeExtension_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 49)) & 0x3ff); +} + +static __inline unsigned int +get_RRROpcodeExtension_Y0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 18)) & 0x3); +} + +static __inline unsigned int +get_RRROpcodeExtension_Y1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 49)) & 0x3); +} + +static __inline unsigned int +get_ShAmt_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x3f); +} + +static __inline unsigned int +get_ShAmt_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x3f); +} + +static __inline unsigned int +get_ShAmt_Y0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x3f); +} + +static __inline unsigned int +get_ShAmt_Y1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x3f); +} + +static __inline unsigned int +get_ShiftOpcodeExtension_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 18)) & 0x3ff); +} + +static __inline unsigned int +get_ShiftOpcodeExtension_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 49)) & 0x3ff); +} + +static __inline unsigned int +get_ShiftOpcodeExtension_Y0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 18)) & 0x3); +} + +static __inline unsigned int +get_ShiftOpcodeExtension_Y1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 49)) & 0x3); +} + +static __inline unsigned int +get_SrcA_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 6)) & 0x3f); +} + +static __inline unsigned int +get_SrcA_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 37)) & 0x3f); +} + +static __inline unsigned int +get_SrcA_Y0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 6)) & 0x3f); +} + +static __inline unsigned int +get_SrcA_Y1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 37)) & 0x3f); +} + +static __inline unsigned int +get_SrcA_Y2(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 20)) & 0x3f); +} + +static __inline unsigned int +get_SrcBDest_Y2(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 51)) & 0x3f); +} + +static __inline unsigned int +get_SrcB_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x3f); +} + +static __inline unsigned int +get_SrcB_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x3f); +} + +static __inline unsigned int +get_SrcB_Y0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x3f); +} + +static __inline unsigned int +get_SrcB_Y1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x3f); +} + +static __inline unsigned int +get_UnaryOpcodeExtension_X0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x3f); +} + +static __inline unsigned int +get_UnaryOpcodeExtension_X1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x3f); +} + +static __inline unsigned int +get_UnaryOpcodeExtension_Y0(tilegx_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x3f); +} + +static __inline unsigned int +get_UnaryOpcodeExtension_Y1(tilegx_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x3f); +} + + +static __inline int +sign_extend(int n, int num_bits) +{ + int shift = (int)(sizeof(int) * 8 - num_bits); + return (n << shift) >> shift; +} + + + +static __inline tilegx_bundle_bits +create_BFEnd_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 12); +} + +static __inline tilegx_bundle_bits +create_BFOpcodeExtension_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xf) << 24); +} + +static __inline tilegx_bundle_bits +create_BFStart_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 18); +} + +static __inline tilegx_bundle_bits +create_BrOff_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | + (((tilegx_bundle_bits)(n & 0x0001ffc0)) << 37); +} + +static __inline tilegx_bundle_bits +create_BrType_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x1f)) << 54); +} + +static __inline tilegx_bundle_bits +create_Dest_Imm8_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | + (((tilegx_bundle_bits)(n & 0x000000c0)) << 43); +} + +static __inline tilegx_bundle_bits +create_Dest_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 0); +} + +static __inline tilegx_bundle_bits +create_Dest_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3f)) << 31); +} + +static __inline tilegx_bundle_bits +create_Dest_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 0); +} + +static __inline tilegx_bundle_bits +create_Dest_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3f)) << 31); +} + +static __inline tilegx_bundle_bits +create_Imm16_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xffff) << 12); +} + +static __inline tilegx_bundle_bits +create_Imm16_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0xffff)) << 43); +} + +static __inline tilegx_bundle_bits +create_Imm8OpcodeExtension_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xff) << 20); +} + +static __inline tilegx_bundle_bits +create_Imm8OpcodeExtension_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0xff)) << 51); +} + +static __inline tilegx_bundle_bits +create_Imm8_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xff) << 12); +} + +static __inline tilegx_bundle_bits +create_Imm8_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0xff)) << 43); +} + +static __inline tilegx_bundle_bits +create_Imm8_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xff) << 12); +} + +static __inline tilegx_bundle_bits +create_Imm8_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0xff)) << 43); +} + +static __inline tilegx_bundle_bits +create_JumpOff_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x7ffffff)) << 31); +} + +static __inline tilegx_bundle_bits +create_JumpOpcodeExtension_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x1)) << 58); +} + +static __inline tilegx_bundle_bits +create_MF_Imm14_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3fff)) << 37); +} + +static __inline tilegx_bundle_bits +create_MT_Imm14_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | + (((tilegx_bundle_bits)(n & 0x00003fc0)) << 37); +} + +static __inline tilegx_bundle_bits +create_Mode(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3)) << 62); +} + +static __inline tilegx_bundle_bits +create_Opcode_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x7) << 28); +} + +static __inline tilegx_bundle_bits +create_Opcode_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x7)) << 59); +} + +static __inline tilegx_bundle_bits +create_Opcode_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xf) << 27); +} + +static __inline tilegx_bundle_bits +create_Opcode_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0xf)) << 58); +} + +static __inline tilegx_bundle_bits +create_Opcode_Y2(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x00000001) << 26) | + (((tilegx_bundle_bits)(n & 0x00000002)) << 56); +} + +static __inline tilegx_bundle_bits +create_RRROpcodeExtension_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3ff) << 18); +} + +static __inline tilegx_bundle_bits +create_RRROpcodeExtension_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); +} + +static __inline tilegx_bundle_bits +create_RRROpcodeExtension_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3) << 18); +} + +static __inline tilegx_bundle_bits +create_RRROpcodeExtension_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3)) << 49); +} + +static __inline tilegx_bundle_bits +create_ShAmt_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 12); +} + +static __inline tilegx_bundle_bits +create_ShAmt_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3f)) << 43); +} + +static __inline tilegx_bundle_bits +create_ShAmt_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 12); +} + +static __inline tilegx_bundle_bits +create_ShAmt_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3f)) << 43); +} + +static __inline tilegx_bundle_bits +create_ShiftOpcodeExtension_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3ff) << 18); +} + +static __inline tilegx_bundle_bits +create_ShiftOpcodeExtension_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); +} + +static __inline tilegx_bundle_bits +create_ShiftOpcodeExtension_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3) << 18); +} + +static __inline tilegx_bundle_bits +create_ShiftOpcodeExtension_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3)) << 49); +} + +static __inline tilegx_bundle_bits +create_SrcA_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 6); +} + +static __inline tilegx_bundle_bits +create_SrcA_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3f)) << 37); +} + +static __inline tilegx_bundle_bits +create_SrcA_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 6); +} + +static __inline tilegx_bundle_bits +create_SrcA_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3f)) << 37); +} + +static __inline tilegx_bundle_bits +create_SrcA_Y2(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 20); +} + +static __inline tilegx_bundle_bits +create_SrcBDest_Y2(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3f)) << 51); +} + +static __inline tilegx_bundle_bits +create_SrcB_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 12); +} + +static __inline tilegx_bundle_bits +create_SrcB_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3f)) << 43); +} + +static __inline tilegx_bundle_bits +create_SrcB_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 12); +} + +static __inline tilegx_bundle_bits +create_SrcB_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3f)) << 43); +} + +static __inline tilegx_bundle_bits +create_UnaryOpcodeExtension_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 12); +} + +static __inline tilegx_bundle_bits +create_UnaryOpcodeExtension_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3f)) << 43); +} + +static __inline tilegx_bundle_bits +create_UnaryOpcodeExtension_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 12); +} + +static __inline tilegx_bundle_bits +create_UnaryOpcodeExtension_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilegx_bundle_bits)(n & 0x3f)) << 43); +} + + +typedef enum +{ + TILEGX_PIPELINE_X0, + TILEGX_PIPELINE_X1, + TILEGX_PIPELINE_Y0, + TILEGX_PIPELINE_Y1, + TILEGX_PIPELINE_Y2, +} tilegx_pipeline; + +#define tilegx_is_x_pipeline(p) ((int)(p) <= (int)TILEGX_PIPELINE_X1) + +typedef enum +{ + TILEGX_OP_TYPE_REGISTER, + TILEGX_OP_TYPE_IMMEDIATE, + TILEGX_OP_TYPE_ADDRESS, + TILEGX_OP_TYPE_SPR +} tilegx_operand_type; + +/* These are the bits that determine if a bundle is in the X encoding. */ +#define TILEGX_BUNDLE_MODE_MASK ((tilegx_bundle_bits)3 << 62) + +enum +{ + /* Maximum number of instructions in a bundle (2 for X, 3 for Y). */ + TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE = 3, + + /* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */ + TILEGX_NUM_PIPELINE_ENCODINGS = 5, + + /* Log base 2 of TILEGX_BUNDLE_SIZE_IN_BYTES. */ + TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES = 3, + + /* Instructions take this many bytes. */ + TILEGX_BUNDLE_SIZE_IN_BYTES = 1 << TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES, + + /* Log base 2 of TILEGX_BUNDLE_ALIGNMENT_IN_BYTES. */ + TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3, + + /* Bundles should be aligned modulo this number of bytes. */ + TILEGX_BUNDLE_ALIGNMENT_IN_BYTES = + (1 << TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES), + + /* Number of registers (some are magic, such as network I/O). */ + TILEGX_NUM_REGISTERS = 64, +}; + + +struct tilegx_operand +{ + /* Is this operand a register, immediate or address? */ + tilegx_operand_type type; + + /* The default relocation type for this operand. */ + signed int default_reloc : 16; + + /* How many bits is this value? (used for range checking) */ + unsigned int num_bits : 5; + + /* Is the value signed? (used for range checking) */ + unsigned int is_signed : 1; + + /* Is this operand a source register? */ + unsigned int is_src_reg : 1; + + /* Is this operand written? (i.e. is it a destination register) */ + unsigned int is_dest_reg : 1; + + /* Is this operand PC-relative? */ + unsigned int is_pc_relative : 1; + + /* By how many bits do we right shift the value before inserting? */ + unsigned int rightshift : 2; + + /* Return the bits for this operand to be ORed into an existing bundle. */ + tilegx_bundle_bits (*insert) (int op); + + /* Extract this operand and return it. */ + unsigned int (*extract) (tilegx_bundle_bits bundle); +}; + + +extern const struct tilegx_operand tilegx_operands[]; + +/* One finite-state machine per pipe for rapid instruction decoding. */ +extern const unsigned short * const +tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS]; + + +struct tilegx_opcode +{ + /* The opcode mnemonic, e.g. "add" */ + const char *name; + + /* The enum value for this mnemonic. */ + tilegx_mnemonic mnemonic; + + /* A bit mask of which of the five pipes this instruction + is compatible with: + X0 0x01 + X1 0x02 + Y0 0x04 + Y1 0x08 + Y2 0x10 */ + unsigned char pipes; + + /* How many operands are there? */ + unsigned char num_operands; + + /* Which register does this write implicitly, or TREG_ZERO if none? */ + unsigned char implicitly_written_register; + + /* Can this be bundled with other instructions (almost always true). */ + unsigned char can_bundle; + + /* The description of the operands. Each of these is an + * index into the tilegx_operands[] table. */ + unsigned char operands[TILEGX_NUM_PIPELINE_ENCODINGS][TILEGX_MAX_OPERANDS]; + +#if !defined(__KERNEL__) && !defined(_LIBC) + /* A mask of which bits have predefined values for each pipeline. + * This is useful for disassembly. */ + tilegx_bundle_bits fixed_bit_masks[TILEGX_NUM_PIPELINE_ENCODINGS]; + + /* For each bit set in fixed_bit_masks, what the value is for this + * instruction. */ + tilegx_bundle_bits fixed_bit_values[TILEGX_NUM_PIPELINE_ENCODINGS]; +#endif +}; + +extern const struct tilegx_opcode tilegx_opcodes[]; + +/* Used for non-textual disassembly into structs. */ +struct tilegx_decoded_instruction +{ + const struct tilegx_opcode *opcode; + const struct tilegx_operand *operands[TILEGX_MAX_OPERANDS]; + long long operand_values[TILEGX_MAX_OPERANDS]; +}; + + +/* Disassemble a bundle into a struct for machine processing. */ +extern int parse_insn_tilegx(tilegx_bundle_bits bits, + unsigned long long pc, + struct tilegx_decoded_instruction + decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]); + + +#if !defined(__KERNEL__) && !defined(_LIBC) +/* Canonical names of all the registers. */ +/* ISSUE: This table lives in "tile-dis.c" */ +extern const char * const tilegx_register_names[]; + +/* Descriptor for a special-purpose register. */ +struct tilegx_spr +{ + /* The number */ + int number; + + /* The name */ + const char *name; +}; + +/* List of all the SPRs; ordered by increasing number. */ +extern const struct tilegx_spr tilegx_sprs[]; + +/* Number of special-purpose registers. */ +extern const int tilegx_num_sprs; + +extern const char * +get_tilegx_spr_name (int num); +#endif /* !__KERNEL__ && !_LIBC */ + +/* Make a few "tile_" variables to simply common code between + architectures. */ + +typedef tilegx_bundle_bits tile_bundle_bits; +#define TILE_BUNDLE_SIZE_IN_BYTES TILEGX_BUNDLE_SIZE_IN_BYTES +#define TILE_BUNDLE_ALIGNMENT_IN_BYTES TILEGX_BUNDLE_ALIGNMENT_IN_BYTES +#define TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES \ + TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES + +#endif /* opcode_tilegx_h */ diff --git a/include/opcode/tilepro.h b/include/opcode/tilepro.h new file mode 100644 index 0000000..91e2a2b --- /dev/null +++ b/include/opcode/tilepro.h @@ -0,0 +1,1636 @@ +/* TILEPro opcode information. + * + * Copyright 2011 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef opcode_tilepro_h +#define opcode_tilepro_h + +typedef unsigned long long tilepro_bundle_bits; + + +enum +{ + TILEPRO_MAX_OPERANDS = 5 /* mm */ +}; + +typedef enum +{ + TILEPRO_OPC_BPT, + TILEPRO_OPC_INFO, + TILEPRO_OPC_INFOL, + TILEPRO_OPC_J, + TILEPRO_OPC_JAL, + TILEPRO_OPC_MOVE, + TILEPRO_OPC_MOVE_SN, + TILEPRO_OPC_MOVEI, + TILEPRO_OPC_MOVEI_SN, + TILEPRO_OPC_MOVELI, + TILEPRO_OPC_MOVELI_SN, + TILEPRO_OPC_MOVELIS, + TILEPRO_OPC_PREFETCH, + TILEPRO_OPC_RAISE, + TILEPRO_OPC_ADD, + TILEPRO_OPC_ADD_SN, + TILEPRO_OPC_ADDB, + TILEPRO_OPC_ADDB_SN, + TILEPRO_OPC_ADDBS_U, + TILEPRO_OPC_ADDBS_U_SN, + TILEPRO_OPC_ADDH, + TILEPRO_OPC_ADDH_SN, + TILEPRO_OPC_ADDHS, + TILEPRO_OPC_ADDHS_SN, + TILEPRO_OPC_ADDI, + TILEPRO_OPC_ADDI_SN, + TILEPRO_OPC_ADDIB, + TILEPRO_OPC_ADDIB_SN, + TILEPRO_OPC_ADDIH, + TILEPRO_OPC_ADDIH_SN, + TILEPRO_OPC_ADDLI, + TILEPRO_OPC_ADDLI_SN, + TILEPRO_OPC_ADDLIS, + TILEPRO_OPC_ADDS, + TILEPRO_OPC_ADDS_SN, + TILEPRO_OPC_ADIFFB_U, + TILEPRO_OPC_ADIFFB_U_SN, + TILEPRO_OPC_ADIFFH, + TILEPRO_OPC_ADIFFH_SN, + TILEPRO_OPC_AND, + TILEPRO_OPC_AND_SN, + TILEPRO_OPC_ANDI, + TILEPRO_OPC_ANDI_SN, + TILEPRO_OPC_AULI, + TILEPRO_OPC_AVGB_U, + TILEPRO_OPC_AVGB_U_SN, + TILEPRO_OPC_AVGH, + TILEPRO_OPC_AVGH_SN, + TILEPRO_OPC_BBNS, + TILEPRO_OPC_BBNS_SN, + TILEPRO_OPC_BBNST, + TILEPRO_OPC_BBNST_SN, + TILEPRO_OPC_BBS, + TILEPRO_OPC_BBS_SN, + TILEPRO_OPC_BBST, + TILEPRO_OPC_BBST_SN, + TILEPRO_OPC_BGEZ, + TILEPRO_OPC_BGEZ_SN, + TILEPRO_OPC_BGEZT, + TILEPRO_OPC_BGEZT_SN, + TILEPRO_OPC_BGZ, + TILEPRO_OPC_BGZ_SN, + TILEPRO_OPC_BGZT, + TILEPRO_OPC_BGZT_SN, + TILEPRO_OPC_BITX, + TILEPRO_OPC_BITX_SN, + TILEPRO_OPC_BLEZ, + TILEPRO_OPC_BLEZ_SN, + TILEPRO_OPC_BLEZT, + TILEPRO_OPC_BLEZT_SN, + TILEPRO_OPC_BLZ, + TILEPRO_OPC_BLZ_SN, + TILEPRO_OPC_BLZT, + TILEPRO_OPC_BLZT_SN, + TILEPRO_OPC_BNZ, + TILEPRO_OPC_BNZ_SN, + TILEPRO_OPC_BNZT, + TILEPRO_OPC_BNZT_SN, + TILEPRO_OPC_BYTEX, + TILEPRO_OPC_BYTEX_SN, + TILEPRO_OPC_BZ, + TILEPRO_OPC_BZ_SN, + TILEPRO_OPC_BZT, + TILEPRO_OPC_BZT_SN, + TILEPRO_OPC_CLZ, + TILEPRO_OPC_CLZ_SN, + TILEPRO_OPC_CRC32_32, + TILEPRO_OPC_CRC32_32_SN, + TILEPRO_OPC_CRC32_8, + TILEPRO_OPC_CRC32_8_SN, + TILEPRO_OPC_CTZ, + TILEPRO_OPC_CTZ_SN, + TILEPRO_OPC_DRAIN, + TILEPRO_OPC_DTLBPR, + TILEPRO_OPC_DWORD_ALIGN, + TILEPRO_OPC_DWORD_ALIGN_SN, + TILEPRO_OPC_FINV, + TILEPRO_OPC_FLUSH, + TILEPRO_OPC_FNOP, + TILEPRO_OPC_ICOH, + TILEPRO_OPC_ILL, + TILEPRO_OPC_INTHB, + TILEPRO_OPC_INTHB_SN, + TILEPRO_OPC_INTHH, + TILEPRO_OPC_INTHH_SN, + TILEPRO_OPC_INTLB, + TILEPRO_OPC_INTLB_SN, + TILEPRO_OPC_INTLH, + TILEPRO_OPC_INTLH_SN, + TILEPRO_OPC_INV, + TILEPRO_OPC_IRET, + TILEPRO_OPC_JALB, + TILEPRO_OPC_JALF, + TILEPRO_OPC_JALR, + TILEPRO_OPC_JALRP, + TILEPRO_OPC_JB, + TILEPRO_OPC_JF, + TILEPRO_OPC_JR, + TILEPRO_OPC_JRP, + TILEPRO_OPC_LB, + TILEPRO_OPC_LB_SN, + TILEPRO_OPC_LB_U, + TILEPRO_OPC_LB_U_SN, + TILEPRO_OPC_LBADD, + TILEPRO_OPC_LBADD_SN, + TILEPRO_OPC_LBADD_U, + TILEPRO_OPC_LBADD_U_SN, + TILEPRO_OPC_LH, + TILEPRO_OPC_LH_SN, + TILEPRO_OPC_LH_U, + TILEPRO_OPC_LH_U_SN, + TILEPRO_OPC_LHADD, + TILEPRO_OPC_LHADD_SN, + TILEPRO_OPC_LHADD_U, + TILEPRO_OPC_LHADD_U_SN, + TILEPRO_OPC_LNK, + TILEPRO_OPC_LNK_SN, + TILEPRO_OPC_LW, + TILEPRO_OPC_LW_SN, + TILEPRO_OPC_LW_NA, + TILEPRO_OPC_LW_NA_SN, + TILEPRO_OPC_LWADD, + TILEPRO_OPC_LWADD_SN, + TILEPRO_OPC_LWADD_NA, + TILEPRO_OPC_LWADD_NA_SN, + TILEPRO_OPC_MAXB_U, + TILEPRO_OPC_MAXB_U_SN, + TILEPRO_OPC_MAXH, + TILEPRO_OPC_MAXH_SN, + TILEPRO_OPC_MAXIB_U, + TILEPRO_OPC_MAXIB_U_SN, + TILEPRO_OPC_MAXIH, + TILEPRO_OPC_MAXIH_SN, + TILEPRO_OPC_MF, + TILEPRO_OPC_MFSPR, + TILEPRO_OPC_MINB_U, + TILEPRO_OPC_MINB_U_SN, + TILEPRO_OPC_MINH, + TILEPRO_OPC_MINH_SN, + TILEPRO_OPC_MINIB_U, + TILEPRO_OPC_MINIB_U_SN, + TILEPRO_OPC_MINIH, + TILEPRO_OPC_MINIH_SN, + TILEPRO_OPC_MM, + TILEPRO_OPC_MNZ, + TILEPRO_OPC_MNZ_SN, + TILEPRO_OPC_MNZB, + TILEPRO_OPC_MNZB_SN, + TILEPRO_OPC_MNZH, + TILEPRO_OPC_MNZH_SN, + TILEPRO_OPC_MTSPR, + TILEPRO_OPC_MULHH_SS, + TILEPRO_OPC_MULHH_SS_SN, + TILEPRO_OPC_MULHH_SU, + TILEPRO_OPC_MULHH_SU_SN, + TILEPRO_OPC_MULHH_UU, + TILEPRO_OPC_MULHH_UU_SN, + TILEPRO_OPC_MULHHA_SS, + TILEPRO_OPC_MULHHA_SS_SN, + TILEPRO_OPC_MULHHA_SU, + TILEPRO_OPC_MULHHA_SU_SN, + TILEPRO_OPC_MULHHA_UU, + TILEPRO_OPC_MULHHA_UU_SN, + TILEPRO_OPC_MULHHSA_UU, + TILEPRO_OPC_MULHHSA_UU_SN, + TILEPRO_OPC_MULHL_SS, + TILEPRO_OPC_MULHL_SS_SN, + TILEPRO_OPC_MULHL_SU, + TILEPRO_OPC_MULHL_SU_SN, + TILEPRO_OPC_MULHL_US, + TILEPRO_OPC_MULHL_US_SN, + TILEPRO_OPC_MULHL_UU, + TILEPRO_OPC_MULHL_UU_SN, + TILEPRO_OPC_MULHLA_SS, + TILEPRO_OPC_MULHLA_SS_SN, + TILEPRO_OPC_MULHLA_SU, + TILEPRO_OPC_MULHLA_SU_SN, + TILEPRO_OPC_MULHLA_US, + TILEPRO_OPC_MULHLA_US_SN, + TILEPRO_OPC_MULHLA_UU, + TILEPRO_OPC_MULHLA_UU_SN, + TILEPRO_OPC_MULHLSA_UU, + TILEPRO_OPC_MULHLSA_UU_SN, + TILEPRO_OPC_MULLL_SS, + TILEPRO_OPC_MULLL_SS_SN, + TILEPRO_OPC_MULLL_SU, + TILEPRO_OPC_MULLL_SU_SN, + TILEPRO_OPC_MULLL_UU, + TILEPRO_OPC_MULLL_UU_SN, + TILEPRO_OPC_MULLLA_SS, + TILEPRO_OPC_MULLLA_SS_SN, + TILEPRO_OPC_MULLLA_SU, + TILEPRO_OPC_MULLLA_SU_SN, + TILEPRO_OPC_MULLLA_UU, + TILEPRO_OPC_MULLLA_UU_SN, + TILEPRO_OPC_MULLLSA_UU, + TILEPRO_OPC_MULLLSA_UU_SN, + TILEPRO_OPC_MVNZ, + TILEPRO_OPC_MVNZ_SN, + TILEPRO_OPC_MVZ, + TILEPRO_OPC_MVZ_SN, + TILEPRO_OPC_MZ, + TILEPRO_OPC_MZ_SN, + TILEPRO_OPC_MZB, + TILEPRO_OPC_MZB_SN, + TILEPRO_OPC_MZH, + TILEPRO_OPC_MZH_SN, + TILEPRO_OPC_NAP, + TILEPRO_OPC_NOP, + TILEPRO_OPC_NOR, + TILEPRO_OPC_NOR_SN, + TILEPRO_OPC_OR, + TILEPRO_OPC_OR_SN, + TILEPRO_OPC_ORI, + TILEPRO_OPC_ORI_SN, + TILEPRO_OPC_PACKBS_U, + TILEPRO_OPC_PACKBS_U_SN, + TILEPRO_OPC_PACKHB, + TILEPRO_OPC_PACKHB_SN, + TILEPRO_OPC_PACKHS, + TILEPRO_OPC_PACKHS_SN, + TILEPRO_OPC_PACKLB, + TILEPRO_OPC_PACKLB_SN, + TILEPRO_OPC_PCNT, + TILEPRO_OPC_PCNT_SN, + TILEPRO_OPC_RL, + TILEPRO_OPC_RL_SN, + TILEPRO_OPC_RLI, + TILEPRO_OPC_RLI_SN, + TILEPRO_OPC_S1A, + TILEPRO_OPC_S1A_SN, + TILEPRO_OPC_S2A, + TILEPRO_OPC_S2A_SN, + TILEPRO_OPC_S3A, + TILEPRO_OPC_S3A_SN, + TILEPRO_OPC_SADAB_U, + TILEPRO_OPC_SADAB_U_SN, + TILEPRO_OPC_SADAH, + TILEPRO_OPC_SADAH_SN, + TILEPRO_OPC_SADAH_U, + TILEPRO_OPC_SADAH_U_SN, + TILEPRO_OPC_SADB_U, + TILEPRO_OPC_SADB_U_SN, + TILEPRO_OPC_SADH, + TILEPRO_OPC_SADH_SN, + TILEPRO_OPC_SADH_U, + TILEPRO_OPC_SADH_U_SN, + TILEPRO_OPC_SB, + TILEPRO_OPC_SBADD, + TILEPRO_OPC_SEQ, + TILEPRO_OPC_SEQ_SN, + TILEPRO_OPC_SEQB, + TILEPRO_OPC_SEQB_SN, + TILEPRO_OPC_SEQH, + TILEPRO_OPC_SEQH_SN, + TILEPRO_OPC_SEQI, + TILEPRO_OPC_SEQI_SN, + TILEPRO_OPC_SEQIB, + TILEPRO_OPC_SEQIB_SN, + TILEPRO_OPC_SEQIH, + TILEPRO_OPC_SEQIH_SN, + TILEPRO_OPC_SH, + TILEPRO_OPC_SHADD, + TILEPRO_OPC_SHL, + TILEPRO_OPC_SHL_SN, + TILEPRO_OPC_SHLB, + TILEPRO_OPC_SHLB_SN, + TILEPRO_OPC_SHLH, + TILEPRO_OPC_SHLH_SN, + TILEPRO_OPC_SHLI, + TILEPRO_OPC_SHLI_SN, + TILEPRO_OPC_SHLIB, + TILEPRO_OPC_SHLIB_SN, + TILEPRO_OPC_SHLIH, + TILEPRO_OPC_SHLIH_SN, + TILEPRO_OPC_SHR, + TILEPRO_OPC_SHR_SN, + TILEPRO_OPC_SHRB, + TILEPRO_OPC_SHRB_SN, + TILEPRO_OPC_SHRH, + TILEPRO_OPC_SHRH_SN, + TILEPRO_OPC_SHRI, + TILEPRO_OPC_SHRI_SN, + TILEPRO_OPC_SHRIB, + TILEPRO_OPC_SHRIB_SN, + TILEPRO_OPC_SHRIH, + TILEPRO_OPC_SHRIH_SN, + TILEPRO_OPC_SLT, + TILEPRO_OPC_SLT_SN, + TILEPRO_OPC_SLT_U, + TILEPRO_OPC_SLT_U_SN, + TILEPRO_OPC_SLTB, + TILEPRO_OPC_SLTB_SN, + TILEPRO_OPC_SLTB_U, + TILEPRO_OPC_SLTB_U_SN, + TILEPRO_OPC_SLTE, + TILEPRO_OPC_SLTE_SN, + TILEPRO_OPC_SLTE_U, + TILEPRO_OPC_SLTE_U_SN, + TILEPRO_OPC_SLTEB, + TILEPRO_OPC_SLTEB_SN, + TILEPRO_OPC_SLTEB_U, + TILEPRO_OPC_SLTEB_U_SN, + TILEPRO_OPC_SLTEH, + TILEPRO_OPC_SLTEH_SN, + TILEPRO_OPC_SLTEH_U, + TILEPRO_OPC_SLTEH_U_SN, + TILEPRO_OPC_SLTH, + TILEPRO_OPC_SLTH_SN, + TILEPRO_OPC_SLTH_U, + TILEPRO_OPC_SLTH_U_SN, + TILEPRO_OPC_SLTI, + TILEPRO_OPC_SLTI_SN, + TILEPRO_OPC_SLTI_U, + TILEPRO_OPC_SLTI_U_SN, + TILEPRO_OPC_SLTIB, + TILEPRO_OPC_SLTIB_SN, + TILEPRO_OPC_SLTIB_U, + TILEPRO_OPC_SLTIB_U_SN, + TILEPRO_OPC_SLTIH, + TILEPRO_OPC_SLTIH_SN, + TILEPRO_OPC_SLTIH_U, + TILEPRO_OPC_SLTIH_U_SN, + TILEPRO_OPC_SNE, + TILEPRO_OPC_SNE_SN, + TILEPRO_OPC_SNEB, + TILEPRO_OPC_SNEB_SN, + TILEPRO_OPC_SNEH, + TILEPRO_OPC_SNEH_SN, + TILEPRO_OPC_SRA, + TILEPRO_OPC_SRA_SN, + TILEPRO_OPC_SRAB, + TILEPRO_OPC_SRAB_SN, + TILEPRO_OPC_SRAH, + TILEPRO_OPC_SRAH_SN, + TILEPRO_OPC_SRAI, + TILEPRO_OPC_SRAI_SN, + TILEPRO_OPC_SRAIB, + TILEPRO_OPC_SRAIB_SN, + TILEPRO_OPC_SRAIH, + TILEPRO_OPC_SRAIH_SN, + TILEPRO_OPC_SUB, + TILEPRO_OPC_SUB_SN, + TILEPRO_OPC_SUBB, + TILEPRO_OPC_SUBB_SN, + TILEPRO_OPC_SUBBS_U, + TILEPRO_OPC_SUBBS_U_SN, + TILEPRO_OPC_SUBH, + TILEPRO_OPC_SUBH_SN, + TILEPRO_OPC_SUBHS, + TILEPRO_OPC_SUBHS_SN, + TILEPRO_OPC_SUBS, + TILEPRO_OPC_SUBS_SN, + TILEPRO_OPC_SW, + TILEPRO_OPC_SWADD, + TILEPRO_OPC_SWINT0, + TILEPRO_OPC_SWINT1, + TILEPRO_OPC_SWINT2, + TILEPRO_OPC_SWINT3, + TILEPRO_OPC_TBLIDXB0, + TILEPRO_OPC_TBLIDXB0_SN, + TILEPRO_OPC_TBLIDXB1, + TILEPRO_OPC_TBLIDXB1_SN, + TILEPRO_OPC_TBLIDXB2, + TILEPRO_OPC_TBLIDXB2_SN, + TILEPRO_OPC_TBLIDXB3, + TILEPRO_OPC_TBLIDXB3_SN, + TILEPRO_OPC_TNS, + TILEPRO_OPC_TNS_SN, + TILEPRO_OPC_WH64, + TILEPRO_OPC_XOR, + TILEPRO_OPC_XOR_SN, + TILEPRO_OPC_XORI, + TILEPRO_OPC_XORI_SN, + TILEPRO_OPC_NONE +} tilepro_mnemonic; + +/* 64-bit pattern for a { bpt ; nop } bundle. */ +#define TILEPRO_BPT_BUNDLE 0x400b3cae70166000ULL + +#ifndef DISASM_ONLY + +enum +{ + TILEPRO_SN_MAX_OPERANDS = 6 /* route */ +}; + +typedef enum +{ + TILEPRO_SN_OPC_BZ, + TILEPRO_SN_OPC_BNZ, + TILEPRO_SN_OPC_JRR, + TILEPRO_SN_OPC_FNOP, + TILEPRO_SN_OPC_BLZ, + TILEPRO_SN_OPC_NOP, + TILEPRO_SN_OPC_MOVEI, + TILEPRO_SN_OPC_MOVE, + TILEPRO_SN_OPC_BGEZ, + TILEPRO_SN_OPC_JR, + TILEPRO_SN_OPC_BLEZ, + TILEPRO_SN_OPC_BBNS, + TILEPRO_SN_OPC_JALRR, + TILEPRO_SN_OPC_BPT, + TILEPRO_SN_OPC_JALR, + TILEPRO_SN_OPC_SHR1, + TILEPRO_SN_OPC_BGZ, + TILEPRO_SN_OPC_BBS, + TILEPRO_SN_OPC_SHL8II, + TILEPRO_SN_OPC_ADDI, + TILEPRO_SN_OPC_HALT, + TILEPRO_SN_OPC_ROUTE, + TILEPRO_SN_OPC_NONE +} tilepro_sn_mnemonic; + +extern const unsigned char tilepro_sn_route_encode[6 * 6 * 6]; +extern const signed char tilepro_sn_route_decode[256][3]; +extern const char tilepro_sn_direction_names[6][5]; +extern const signed char tilepro_sn_dest_map[6][6]; +#endif /* DISASM_ONLY */ + + +static __inline unsigned int +get_BrOff_SN(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 0)) & 0x3ff); +} + +static __inline unsigned int +get_BrOff_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x00007fff) | + (((unsigned int)(n >> 20)) & 0x00018000); +} + +static __inline unsigned int +get_BrType_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 31)) & 0xf); +} + +static __inline unsigned int +get_Dest_Imm8_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 31)) & 0x0000003f) | + (((unsigned int)(n >> 43)) & 0x000000c0); +} + +static __inline unsigned int +get_Dest_SN(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 2)) & 0x3); +} + +static __inline unsigned int +get_Dest_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 0)) & 0x3f); +} + +static __inline unsigned int +get_Dest_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 31)) & 0x3f); +} + +static __inline unsigned int +get_Dest_Y0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 0)) & 0x3f); +} + +static __inline unsigned int +get_Dest_Y1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 31)) & 0x3f); +} + +static __inline unsigned int +get_Imm16_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0xffff); +} + +static __inline unsigned int +get_Imm16_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0xffff); +} + +static __inline unsigned int +get_Imm8_SN(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 0)) & 0xff); +} + +static __inline unsigned int +get_Imm8_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0xff); +} + +static __inline unsigned int +get_Imm8_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0xff); +} + +static __inline unsigned int +get_Imm8_Y0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0xff); +} + +static __inline unsigned int +get_Imm8_Y1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0xff); +} + +static __inline unsigned int +get_ImmOpcodeExtension_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 20)) & 0x7f); +} + +static __inline unsigned int +get_ImmOpcodeExtension_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 51)) & 0x7f); +} + +static __inline unsigned int +get_ImmRROpcodeExtension_SN(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 8)) & 0x3); +} + +static __inline unsigned int +get_JOffLong_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x00007fff) | + (((unsigned int)(n >> 20)) & 0x00018000) | + (((unsigned int)(n >> 14)) & 0x001e0000) | + (((unsigned int)(n >> 16)) & 0x07e00000) | + (((unsigned int)(n >> 31)) & 0x18000000); +} + +static __inline unsigned int +get_JOff_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x00007fff) | + (((unsigned int)(n >> 20)) & 0x00018000) | + (((unsigned int)(n >> 14)) & 0x001e0000) | + (((unsigned int)(n >> 16)) & 0x07e00000) | + (((unsigned int)(n >> 31)) & 0x08000000); +} + +static __inline unsigned int +get_MF_Imm15_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 37)) & 0x00003fff) | + (((unsigned int)(n >> 44)) & 0x00004000); +} + +static __inline unsigned int +get_MMEnd_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 18)) & 0x1f); +} + +static __inline unsigned int +get_MMEnd_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 49)) & 0x1f); +} + +static __inline unsigned int +get_MMStart_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 23)) & 0x1f); +} + +static __inline unsigned int +get_MMStart_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 54)) & 0x1f); +} + +static __inline unsigned int +get_MT_Imm15_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 31)) & 0x0000003f) | + (((unsigned int)(n >> 37)) & 0x00003fc0) | + (((unsigned int)(n >> 44)) & 0x00004000); +} + +static __inline unsigned int +get_Mode(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 63)) & 0x1); +} + +static __inline unsigned int +get_NoRegOpcodeExtension_SN(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 0)) & 0xf); +} + +static __inline unsigned int +get_Opcode_SN(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 10)) & 0x3f); +} + +static __inline unsigned int +get_Opcode_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 28)) & 0x7); +} + +static __inline unsigned int +get_Opcode_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 59)) & 0xf); +} + +static __inline unsigned int +get_Opcode_Y0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 27)) & 0xf); +} + +static __inline unsigned int +get_Opcode_Y1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 59)) & 0xf); +} + +static __inline unsigned int +get_Opcode_Y2(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 56)) & 0x7); +} + +static __inline unsigned int +get_RROpcodeExtension_SN(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 4)) & 0xf); +} + +static __inline unsigned int +get_RRROpcodeExtension_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 18)) & 0x1ff); +} + +static __inline unsigned int +get_RRROpcodeExtension_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 49)) & 0x1ff); +} + +static __inline unsigned int +get_RRROpcodeExtension_Y0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 18)) & 0x3); +} + +static __inline unsigned int +get_RRROpcodeExtension_Y1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 49)) & 0x3); +} + +static __inline unsigned int +get_RouteOpcodeExtension_SN(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 0)) & 0x3ff); +} + +static __inline unsigned int +get_S_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 27)) & 0x1); +} + +static __inline unsigned int +get_S_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 58)) & 0x1); +} + +static __inline unsigned int +get_ShAmt_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x1f); +} + +static __inline unsigned int +get_ShAmt_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x1f); +} + +static __inline unsigned int +get_ShAmt_Y0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x1f); +} + +static __inline unsigned int +get_ShAmt_Y1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x1f); +} + +static __inline unsigned int +get_SrcA_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 6)) & 0x3f); +} + +static __inline unsigned int +get_SrcA_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 37)) & 0x3f); +} + +static __inline unsigned int +get_SrcA_Y0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 6)) & 0x3f); +} + +static __inline unsigned int +get_SrcA_Y1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 37)) & 0x3f); +} + +static __inline unsigned int +get_SrcA_Y2(tilepro_bundle_bits n) +{ + return (((n >> 26)) & 0x00000001) | + (((unsigned int)(n >> 50)) & 0x0000003e); +} + +static __inline unsigned int +get_SrcBDest_Y2(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 20)) & 0x3f); +} + +static __inline unsigned int +get_SrcB_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x3f); +} + +static __inline unsigned int +get_SrcB_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x3f); +} + +static __inline unsigned int +get_SrcB_Y0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x3f); +} + +static __inline unsigned int +get_SrcB_Y1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x3f); +} + +static __inline unsigned int +get_Src_SN(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 0)) & 0x3); +} + +static __inline unsigned int +get_UnOpcodeExtension_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x1f); +} + +static __inline unsigned int +get_UnOpcodeExtension_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x1f); +} + +static __inline unsigned int +get_UnOpcodeExtension_Y0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 12)) & 0x1f); +} + +static __inline unsigned int +get_UnOpcodeExtension_Y1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 43)) & 0x1f); +} + +static __inline unsigned int +get_UnShOpcodeExtension_X0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 17)) & 0x3ff); +} + +static __inline unsigned int +get_UnShOpcodeExtension_X1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 48)) & 0x3ff); +} + +static __inline unsigned int +get_UnShOpcodeExtension_Y0(tilepro_bundle_bits num) +{ + const unsigned int n = (unsigned int)num; + return (((n >> 17)) & 0x7); +} + +static __inline unsigned int +get_UnShOpcodeExtension_Y1(tilepro_bundle_bits n) +{ + return (((unsigned int)(n >> 48)) & 0x7); +} + + +static __inline int +sign_extend(int n, int num_bits) +{ + int shift = (int)(sizeof(int) * 8 - num_bits); + return (n << shift) >> shift; +} + + + +static __inline tilepro_bundle_bits +create_BrOff_SN(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3ff) << 0); +} + +static __inline tilepro_bundle_bits +create_BrOff_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x00007fff)) << 43) | + (((tilepro_bundle_bits)(n & 0x00018000)) << 20); +} + +static __inline tilepro_bundle_bits +create_BrType_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0xf)) << 31); +} + +static __inline tilepro_bundle_bits +create_Dest_Imm8_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x0000003f)) << 31) | + (((tilepro_bundle_bits)(n & 0x000000c0)) << 43); +} + +static __inline tilepro_bundle_bits +create_Dest_SN(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3) << 2); +} + +static __inline tilepro_bundle_bits +create_Dest_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 0); +} + +static __inline tilepro_bundle_bits +create_Dest_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x3f)) << 31); +} + +static __inline tilepro_bundle_bits +create_Dest_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 0); +} + +static __inline tilepro_bundle_bits +create_Dest_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x3f)) << 31); +} + +static __inline tilepro_bundle_bits +create_Imm16_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xffff) << 12); +} + +static __inline tilepro_bundle_bits +create_Imm16_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0xffff)) << 43); +} + +static __inline tilepro_bundle_bits +create_Imm8_SN(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xff) << 0); +} + +static __inline tilepro_bundle_bits +create_Imm8_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xff) << 12); +} + +static __inline tilepro_bundle_bits +create_Imm8_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0xff)) << 43); +} + +static __inline tilepro_bundle_bits +create_Imm8_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xff) << 12); +} + +static __inline tilepro_bundle_bits +create_Imm8_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0xff)) << 43); +} + +static __inline tilepro_bundle_bits +create_ImmOpcodeExtension_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x7f) << 20); +} + +static __inline tilepro_bundle_bits +create_ImmOpcodeExtension_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x7f)) << 51); +} + +static __inline tilepro_bundle_bits +create_ImmRROpcodeExtension_SN(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3) << 8); +} + +static __inline tilepro_bundle_bits +create_JOffLong_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x00007fff)) << 43) | + (((tilepro_bundle_bits)(n & 0x00018000)) << 20) | + (((tilepro_bundle_bits)(n & 0x001e0000)) << 14) | + (((tilepro_bundle_bits)(n & 0x07e00000)) << 16) | + (((tilepro_bundle_bits)(n & 0x18000000)) << 31); +} + +static __inline tilepro_bundle_bits +create_JOff_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x00007fff)) << 43) | + (((tilepro_bundle_bits)(n & 0x00018000)) << 20) | + (((tilepro_bundle_bits)(n & 0x001e0000)) << 14) | + (((tilepro_bundle_bits)(n & 0x07e00000)) << 16) | + (((tilepro_bundle_bits)(n & 0x08000000)) << 31); +} + +static __inline tilepro_bundle_bits +create_MF_Imm15_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x00003fff)) << 37) | + (((tilepro_bundle_bits)(n & 0x00004000)) << 44); +} + +static __inline tilepro_bundle_bits +create_MMEnd_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x1f) << 18); +} + +static __inline tilepro_bundle_bits +create_MMEnd_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x1f)) << 49); +} + +static __inline tilepro_bundle_bits +create_MMStart_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x1f) << 23); +} + +static __inline tilepro_bundle_bits +create_MMStart_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x1f)) << 54); +} + +static __inline tilepro_bundle_bits +create_MT_Imm15_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x0000003f)) << 31) | + (((tilepro_bundle_bits)(n & 0x00003fc0)) << 37) | + (((tilepro_bundle_bits)(n & 0x00004000)) << 44); +} + +static __inline tilepro_bundle_bits +create_Mode(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x1)) << 63); +} + +static __inline tilepro_bundle_bits +create_NoRegOpcodeExtension_SN(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xf) << 0); +} + +static __inline tilepro_bundle_bits +create_Opcode_SN(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 10); +} + +static __inline tilepro_bundle_bits +create_Opcode_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x7) << 28); +} + +static __inline tilepro_bundle_bits +create_Opcode_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0xf)) << 59); +} + +static __inline tilepro_bundle_bits +create_Opcode_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xf) << 27); +} + +static __inline tilepro_bundle_bits +create_Opcode_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0xf)) << 59); +} + +static __inline tilepro_bundle_bits +create_Opcode_Y2(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x7)) << 56); +} + +static __inline tilepro_bundle_bits +create_RROpcodeExtension_SN(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0xf) << 4); +} + +static __inline tilepro_bundle_bits +create_RRROpcodeExtension_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x1ff) << 18); +} + +static __inline tilepro_bundle_bits +create_RRROpcodeExtension_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x1ff)) << 49); +} + +static __inline tilepro_bundle_bits +create_RRROpcodeExtension_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3) << 18); +} + +static __inline tilepro_bundle_bits +create_RRROpcodeExtension_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x3)) << 49); +} + +static __inline tilepro_bundle_bits +create_RouteOpcodeExtension_SN(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3ff) << 0); +} + +static __inline tilepro_bundle_bits +create_S_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x1) << 27); +} + +static __inline tilepro_bundle_bits +create_S_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x1)) << 58); +} + +static __inline tilepro_bundle_bits +create_ShAmt_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x1f) << 12); +} + +static __inline tilepro_bundle_bits +create_ShAmt_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x1f)) << 43); +} + +static __inline tilepro_bundle_bits +create_ShAmt_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x1f) << 12); +} + +static __inline tilepro_bundle_bits +create_ShAmt_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x1f)) << 43); +} + +static __inline tilepro_bundle_bits +create_SrcA_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 6); +} + +static __inline tilepro_bundle_bits +create_SrcA_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x3f)) << 37); +} + +static __inline tilepro_bundle_bits +create_SrcA_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 6); +} + +static __inline tilepro_bundle_bits +create_SrcA_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x3f)) << 37); +} + +static __inline tilepro_bundle_bits +create_SrcA_Y2(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x00000001) << 26) | + (((tilepro_bundle_bits)(n & 0x0000003e)) << 50); +} + +static __inline tilepro_bundle_bits +create_SrcBDest_Y2(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 20); +} + +static __inline tilepro_bundle_bits +create_SrcB_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 12); +} + +static __inline tilepro_bundle_bits +create_SrcB_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x3f)) << 43); +} + +static __inline tilepro_bundle_bits +create_SrcB_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3f) << 12); +} + +static __inline tilepro_bundle_bits +create_SrcB_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x3f)) << 43); +} + +static __inline tilepro_bundle_bits +create_Src_SN(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3) << 0); +} + +static __inline tilepro_bundle_bits +create_UnOpcodeExtension_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x1f) << 12); +} + +static __inline tilepro_bundle_bits +create_UnOpcodeExtension_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x1f)) << 43); +} + +static __inline tilepro_bundle_bits +create_UnOpcodeExtension_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x1f) << 12); +} + +static __inline tilepro_bundle_bits +create_UnOpcodeExtension_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x1f)) << 43); +} + +static __inline tilepro_bundle_bits +create_UnShOpcodeExtension_X0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x3ff) << 17); +} + +static __inline tilepro_bundle_bits +create_UnShOpcodeExtension_X1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x3ff)) << 48); +} + +static __inline tilepro_bundle_bits +create_UnShOpcodeExtension_Y0(int num) +{ + const unsigned int n = (unsigned int)num; + return ((n & 0x7) << 17); +} + +static __inline tilepro_bundle_bits +create_UnShOpcodeExtension_Y1(int num) +{ + const unsigned int n = (unsigned int)num; + return (((tilepro_bundle_bits)(n & 0x7)) << 48); +} + + + +typedef enum +{ + TILEPRO_PIPELINE_X0, + TILEPRO_PIPELINE_X1, + TILEPRO_PIPELINE_Y0, + TILEPRO_PIPELINE_Y1, + TILEPRO_PIPELINE_Y2, +} tilepro_pipeline; + +#define tilepro_is_x_pipeline(p) ((int)(p) <= (int)TILEPRO_PIPELINE_X1) + +typedef enum +{ + TILEPRO_OP_TYPE_REGISTER, + TILEPRO_OP_TYPE_IMMEDIATE, + TILEPRO_OP_TYPE_ADDRESS, + TILEPRO_OP_TYPE_SPR +} tilepro_operand_type; + +/* This is the bit that determines if a bundle is in the Y encoding. */ +#define TILEPRO_BUNDLE_Y_ENCODING_MASK ((tilepro_bundle_bits)1 << 63) + +enum +{ + /* Maximum number of instructions in a bundle (2 for X, 3 for Y). */ + TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE = 3, + + /* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */ + TILEPRO_NUM_PIPELINE_ENCODINGS = 5, + + /* Log base 2 of TILEPRO_BUNDLE_SIZE_IN_BYTES. */ + TILEPRO_LOG2_BUNDLE_SIZE_IN_BYTES = 3, + + /* Instructions take this many bytes. */ + TILEPRO_BUNDLE_SIZE_IN_BYTES = 1 << TILEPRO_LOG2_BUNDLE_SIZE_IN_BYTES, + + /* Log base 2 of TILEPRO_BUNDLE_ALIGNMENT_IN_BYTES. */ + TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3, + + /* Bundles should be aligned modulo this number of bytes. */ + TILEPRO_BUNDLE_ALIGNMENT_IN_BYTES = + (1 << TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES), + + /* Log base 2 of TILEPRO_SN_INSTRUCTION_SIZE_IN_BYTES. */ + TILEPRO_LOG2_SN_INSTRUCTION_SIZE_IN_BYTES = 1, + + /* Static network instructions take this many bytes. */ + TILEPRO_SN_INSTRUCTION_SIZE_IN_BYTES = + (1 << TILEPRO_LOG2_SN_INSTRUCTION_SIZE_IN_BYTES), + + /* Number of registers (some are magic, such as network I/O). */ + TILEPRO_NUM_REGISTERS = 64, + + /* Number of static network registers. */ + TILEPRO_NUM_SN_REGISTERS = 4 +}; + + +struct tilepro_operand +{ + /* Is this operand a register, immediate or address? */ + tilepro_operand_type type; + + /* The default relocation type for this operand. */ + signed int default_reloc : 16; + + /* How many bits is this value? (used for range checking) */ + unsigned int num_bits : 5; + + /* Is the value signed? (used for range checking) */ + unsigned int is_signed : 1; + + /* Is this operand a source register? */ + unsigned int is_src_reg : 1; + + /* Is this operand written? (i.e. is it a destination register) */ + unsigned int is_dest_reg : 1; + + /* Is this operand PC-relative? */ + unsigned int is_pc_relative : 1; + + /* By how many bits do we right shift the value before inserting? */ + unsigned int rightshift : 2; + + /* Return the bits for this operand to be ORed into an existing bundle. */ + tilepro_bundle_bits (*insert) (int op); + + /* Extract this operand and return it. */ + unsigned int (*extract) (tilepro_bundle_bits bundle); +}; + + +extern const struct tilepro_operand tilepro_operands[]; + +/* One finite-state machine per pipe for rapid instruction decoding. */ +extern const unsigned short * const +tilepro_bundle_decoder_fsms[TILEPRO_NUM_PIPELINE_ENCODINGS]; + + +struct tilepro_opcode +{ + /* The opcode mnemonic, e.g. "add" */ + const char *name; + + /* The enum value for this mnemonic. */ + tilepro_mnemonic mnemonic; + + /* A bit mask of which of the five pipes this instruction + is compatible with: + X0 0x01 + X1 0x02 + Y0 0x04 + Y1 0x08 + Y2 0x10 */ + unsigned char pipes; + + /* How many operands are there? */ + unsigned char num_operands; + + /* Which register does this write implicitly, or TREG_ZERO if none? */ + unsigned char implicitly_written_register; + + /* Can this be bundled with other instructions (almost always true). */ + unsigned char can_bundle; + + /* The description of the operands. Each of these is an + * index into the tilepro_operands[] table. */ + unsigned char operands[TILEPRO_NUM_PIPELINE_ENCODINGS][TILEPRO_MAX_OPERANDS]; + +#if !defined(__KERNEL__) && !defined(_LIBC) + /* A mask of which bits have predefined values for each pipeline. + * This is useful for disassembly. */ + tilepro_bundle_bits fixed_bit_masks[TILEPRO_NUM_PIPELINE_ENCODINGS]; + + /* For each bit set in fixed_bit_masks, what the value is for this + * instruction. */ + tilepro_bundle_bits fixed_bit_values[TILEPRO_NUM_PIPELINE_ENCODINGS]; +#endif +}; + +extern const struct tilepro_opcode tilepro_opcodes[]; + +#if !defined(__KERNEL__) && !defined(_LIBC) + +typedef unsigned short tilepro_sn_instruction_bits; + +struct tilepro_sn_opcode +{ + /* The opcode mnemonic, e.g. "add" */ + const char *name; + + /* The enum value for this mnemonic. */ + tilepro_sn_mnemonic mnemonic; + + /* How many operands are there? */ + unsigned char num_operands; + + /* The description of the operands. Each of these is an + * index into the tilepro_operands[] table. */ + unsigned char operands[TILEPRO_SN_MAX_OPERANDS]; + + /* A mask of which bits have predefined values. + * This is useful for disassembly. */ + tilepro_sn_instruction_bits fixed_bit_mask; + + /* For each bit set in fixed_bit_masks, what its value is. */ + tilepro_sn_instruction_bits fixed_bit_values; +}; + +extern const struct tilepro_sn_opcode tilepro_sn_opcodes[]; + +#endif /* !__KERNEL__ && !_LIBC */ + +/* Used for non-textual disassembly into structs. */ +struct tilepro_decoded_instruction +{ + const struct tilepro_opcode *opcode; + const struct tilepro_operand *operands[TILEPRO_MAX_OPERANDS]; + int operand_values[TILEPRO_MAX_OPERANDS]; +}; + + +/* Disassemble a bundle into a struct for machine processing. */ +extern int parse_insn_tilepro(tilepro_bundle_bits bits, + unsigned int pc, + struct tilepro_decoded_instruction + decoded[TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE]); + + +/* Given a set of bundle bits and a specific pipe, returns which + * instruction the bundle contains in that pipe. + */ +extern const struct tilepro_opcode * +find_opcode(tilepro_bundle_bits bits, tilepro_pipeline pipe); + + +#if !defined(__KERNEL__) && !defined(_LIBC) +/* Canonical names of all the registers. */ +/* ISSUE: This table lives in "tilepro-dis.c" */ +extern const char * const tilepro_register_names[]; + +/* Descriptor for a special-purpose register. */ +struct tilepro_spr +{ + /* The number */ + int number; + + /* The name */ + const char *name; +}; + +/* List of all the SPRs; ordered by increasing number. */ +extern const struct tilepro_spr tilepro_sprs[]; + +/* Number of special-purpose registers. */ +extern const int tilepro_num_sprs; + +extern const char * +get_tilepro_spr_name (int num); +#endif /* !__KERNEL__ && !_LIBC */ + +/* Make a few "tile_" variables to simply common code between + architectures. */ + +typedef tilepro_bundle_bits tile_bundle_bits; +#define TILE_BUNDLE_SIZE_IN_BYTES TILEPRO_BUNDLE_SIZE_IN_BYTES +#define TILE_BUNDLE_ALIGNMENT_IN_BYTES TILEPRO_BUNDLE_ALIGNMENT_IN_BYTES +#define TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES \ + TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES + +#endif /* opcode_tilepro_h */ diff --git a/include/plugin-api.h b/include/plugin-api.h index 7450a9e..122424c 100644 --- a/include/plugin-api.h +++ b/include/plugin-api.h @@ -93,6 +93,14 @@ struct ld_plugin_symbol int resolution; }; +/* An object's section. */ + +struct ld_plugin_section +{ + const void* handle; + unsigned int shndx; +}; + /* Whether the symbol is a definition, reference, or common, weak or not. */ enum ld_plugin_symbol_kind @@ -147,7 +155,13 @@ enum ld_plugin_symbol_resolution LDPR_RESOLVED_EXEC, /* This symbol was resolved by a definition in a shared object. */ - LDPR_RESOLVED_DYN + LDPR_RESOLVED_DYN, + + /* This is the prevailing definition of the symbol, with no + references from regular objects. It is only referenced from IR + code, but the symbol is exported and may be referenced from + a dynamic object (not seen at link time). */ + LDPR_PREVAILING_DEF_IRONLY_EXP }; /* The plugin library's "claim file" handler. */ @@ -244,6 +258,65 @@ typedef enum ld_plugin_status (*ld_plugin_message) (int level, const char *format, ...); +/* The linker's interface for retrieving the number of sections in an object. + The handle is obtained in the claim_file handler. This interface should + only be invoked in the claim_file handler. This function sets *COUNT to + the number of sections in the object. */ + +typedef +enum ld_plugin_status +(*ld_plugin_get_input_section_count) (const void* handle, unsigned int *count); + +/* The linker's interface for retrieving the section type of a specific + section in an object. This interface should only be invoked in the + claim_file handler. This function sets *TYPE to an ELF SHT_xxx value. */ + +typedef +enum ld_plugin_status +(*ld_plugin_get_input_section_type) (const struct ld_plugin_section section, + unsigned int *type); + +/* The linker's interface for retrieving the name of a specific section in + an object. This interface should only be invoked in the claim_file handler. + This function sets *SECTION_NAME_PTR to a null-terminated buffer allocated + by malloc. The plugin must free *SECTION_NAME_PTR. */ + +typedef +enum ld_plugin_status +(*ld_plugin_get_input_section_name) (const struct ld_plugin_section section, + char **section_name_ptr); + +/* The linker's interface for retrieving the contents of a specific section + in an object. This interface should only be invoked in the claim_file + handler. This function sets *SECTION_CONTENTS to point to a buffer that is + valid until clam_file handler returns. It sets *LEN to the size of the + buffer. */ + +typedef +enum ld_plugin_status +(*ld_plugin_get_input_section_contents) (const struct ld_plugin_section section, + const unsigned char **section_contents, + size_t* len); + +/* The linker's interface for specifying the desired order of sections. + The sections should be specifed using the array SECTION_LIST in the + order in which they should appear in the final layout. NUM_SECTIONS + specifies the number of entries in each array. This should be invoked + in the all_symbols_read handler. */ + +typedef +enum ld_plugin_status +(*ld_plugin_update_section_order) (const struct ld_plugin_section *section_list, + unsigned int num_sections); + +/* The linker's interface for specifying that reordering of sections is + desired so that the linker can prepare for it. This should be invoked + before update_section_order, preferably in the claim_file handler. */ + +typedef +enum ld_plugin_status +(*ld_plugin_allow_section_ordering) (void); + enum ld_plugin_level { LDPL_INFO, @@ -274,7 +347,14 @@ enum ld_plugin_tag LDPT_OUTPUT_NAME, LDPT_SET_EXTRA_LIBRARY_PATH, LDPT_GNU_LD_VERSION, - LDPT_GET_VIEW + LDPT_GET_VIEW, + LDPT_GET_INPUT_SECTION_COUNT, + LDPT_GET_INPUT_SECTION_TYPE, + LDPT_GET_INPUT_SECTION_NAME, + LDPT_GET_INPUT_SECTION_CONTENTS, + LDPT_UPDATE_SECTION_ORDER, + LDPT_ALLOW_SECTION_ORDERING, + LDPT_GET_SYMBOLS_V2 }; /* The plugin transfer vector. */ @@ -298,6 +378,12 @@ struct ld_plugin_tv ld_plugin_release_input_file tv_release_input_file; ld_plugin_add_input_library tv_add_input_library; ld_plugin_set_extra_library_path tv_set_extra_library_path; + ld_plugin_get_input_section_count tv_get_input_section_count; + ld_plugin_get_input_section_type tv_get_input_section_type; + ld_plugin_get_input_section_name tv_get_input_section_name; + ld_plugin_get_input_section_contents tv_get_input_section_contents; + ld_plugin_update_section_order tv_update_section_order; + ld_plugin_allow_section_ordering tv_allow_section_ordering; } tv_u; }; diff --git a/include/xregex.h b/include/xregex.h index 645195b..4c5ef93 100644 --- a/include/xregex.h +++ b/include/xregex.h @@ -8,6 +8,7 @@ # define regexec xregexec # define regcomp xregcomp # define regerror xregerror +# define regoff_t xregoff_t # define re_set_registers xre_set_registers # define re_match_2 xre_match_2 # define re_match xre_match diff --git a/ld/.gitignore b/ld/.gitignore new file mode 100644 index 0000000..a345bfb --- /dev/null +++ b/ld/.gitignore @@ -0,0 +1,16 @@ +/configdoc.texi +/deffilep.c +/deffilep.h +/ld-new +/ld.1 +/ldemul-list.h +/ldgram.c +/ldgram.h +/ldlex.c +/stringify.sed +/tdirs + +/e*.c + +/ldscripts +/tmpdir diff --git a/ld/ChangeLog b/ld/ChangeLog index 9e8bd5e..f5fa6ff 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,484 @@ +2011-11-02 Rainer Orth + + Backport from mainline: + 2011-11-02 Rainer Orth + + * configure.tgt (x86_64-*-solaris2*): Use $targ_extra_emuls for + targ_extra_libpath. + +2011-10-25 Alan Modra + + Apply mainline patches + 2011-10-20 Alan Modra + PR ld/13287 + * plugin.c (plugin_should_reload): New function. + * plugin.h (plugin_should_reload): Declare. + * ldlang.c (open_input_bfds): Use above function. + + 2011-10-19 Alan Modra + PR ld/13254 + * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Add + -z text, -z notext, -z textoff options for all targets having + shared lib support. + + 2011-10-15 Alan Modra + * emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Remove toc check. + + 2011-10-10 Alan Modra + * ldmain.c (main): Move code twiddling various config and link_info + bits to.. + * lexsup.c (parse_args): ..here. Move plugin_load_plugins call + into main. + * plugin.c (set_tv_header): Test link_info.executable, not + link_info.shared. + (is_visible_from_outside): Likewise. Delete redundant + is_ir_dummy_bfd check and "section" parameter. + + 2011-10-10 Alan Modra + * emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. + + 2011-10-06 Alan Modra + PR ld/13229 + * plugin.c (tv_header_tags): Add LDPT_GET_SYMBOLS_V2. + (set_tv_header): Handle it. Adjust LDPT_GET_SYMBOLS. Return void. + (get_symbols): Add def_ironly_exp param. Return that value for + syms exported from shared libs. + (get_symbols_v1, get_symbols_v2): New wrapper functions. + * testplug.c: Update for above changes. + +2011-10-13 Dave Korn + + * pe-dll.c (generate_reloc): Don't emit a base reloc for an + underlying BFD reloc that will be discarded in eh_frame data. + +2011-09-22 Tristan Gingold + + * NEWS: Add marker for 2.22. + +2011-09-20 Alan Modra + + PR ld/13201 + * ldlang.h (lang_input_statement_type): Add "reload" bitfield. + Clarify comments. + * ldlang.c (new_afile): Init new field. + (load_symbols): Don't call ldlang_add_file when reloading. + (open_input_bfds): Reload as-needed libs during plugin rescan. + +2011-09-15 H.J. Lu + + PR ld/12975 + * ldlang.c (lang_elf_version_info): Removed. + (lang_register_vers_node): Replace lang_elf_version_info with + link_info.version_info. + (lang_add_vers_depend): Likewise. + * pe-dll.c (process_def_file_and_drectve): Likewise. + * emultempl/solaris2.em (elf_solaris2_before_allocation): Likewise. + + * ldlang.h (lang_elf_version_info): Removed. + + * plugin.c (is_visible_from_outside): Check if symbol is hidden + by version script. + + * emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): + Remove lang_elf_version_info. + +2011-09-15 Dmitry Gorbachev + + PR ld/13183 + * ldmain.c (add_archive_element): Support thin archive member + for LTO. + +2011-08-26 Nick Clifton + + * po/es.po: Updated Spanish translation. + +2011-08-26 Nick Clifton + + * NEWS: Mention that --no-copy-dt-needed-entries is now the + default. + +2011-08-22 Michael Matz + + * ldmain.c (add_DT_NEEDED_for_dynamic): Default to FALSE. + * ld.texinfo (--copy-dt-needed-entries): Mention new default. + +2011-08-17 Alan Modra + + PR ld/12762 + * ldlang.c (section_already_linked): Revert 2011-07-09 changes. + * plugin.c: Likewise. + (asymbol_from_plugin_symbol): Create linkonce section for syms + with comdat_key. + +2011-08-09 Matthew Gretton-Dann + + * emultempl/armelf.em (fix_arm1176): New variable. + (arm_elf_create_output_section_statements): Pass + fix_arm1176 option to bfd backend. + (OPTION_FIX_ARM1176): New define. + (OPTION_NO_FIX_ARM1176): Likewise. + (PARSE_AND_LIST_LONGOPTS): Add new command line options. + (PARSE_AND_LIST_OPTIONS): Likewise. + (PARSE_AND_LIST_ARGS_CASES): Likewise. + * ld.texinfo: Document new command line options. + +2011-08-09 Alan Modra + + PR ld/13066 + * plugin.c (add_symbols): Revert 2011-08-05. + +2011-08-06 Kai Tietz + + * scripttempl/pep.sc: Add .debug_macro section. + * scripttempl/pe.sc: Likewise. + +2011-08-05 Alan Modra + + PR ld/12762 + * plugin.c (add_symbols): Exclude comdat_key symbols from symbol + table if already seen. + +2011-08-04 H.J. Lu + + * ldmain.c (main): Replace remove_output with ld_cleanup in + comments. + +2011-07-26 Alan Modra + + * emulparams/elf32ppc.sh: Source plt_unwind.sh. + * emulparams/elf64ppc.sh: Likewise. + * emultempl/ppc32elf.em (OPTION_NO_TLS_OPT): Adjust. + (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS, + PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Append to + existing values. + * emultempl/ppc64elf.em (OPTION_STUBGROUP_SIZE): Adjust. + (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS, + PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Append to + existing values. + +2011-07-22 H.J. Lu + + * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and + eelf_k1om_fbsd.o + (eelf_k1om.c): New. + (eelf_k1om_fbsd.c): Likewise. + * Makefile.in: Regenerated. + + * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 + is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. + (targ_extra_emuls): Likewise. + + * emulparams/elf_k1om.sh: New. + * emulparams/elf_k1om_fbsd.sh: Likewise. + +2011-07-16 Roland McGrath + + * ld.h (args_type): New field print_output_format. + * lexsup.c (enum option_values, ld_options, parse_args): + Handle --print-output-format. + * ldmain.c (main): Implement --print-output-format. + * ld.texinfo (Options): Document it. + + * ldlang.c (lang_get_output_target): Don't return current_target + when it's NULL. + +2011-07-15 Alan Modra + + * Makefile.am (e*.c): Sort. + * Makefile.in: Regenerate. + +2011-07-14 Alan Modra + + * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option, + gld${EMULATION_NAME}_list_options): Don't condition -z relro + and -z norelro on COMMONPAGESIZE being defined. + +2011-07-14 Alan Modra + + * emultempl/ppc64elf.em (plt_static_chain): New var. + (gld${EMULATION_NAME}_after_allocation): Pass to ppc64_elf_size_stubs. + (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS, + PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle + --plt-static-chain and --no-plt-static-chain. + +2011-07-14 Alan Modra + + * emultempl/elf32.em (gld${EMULATION_NAME}_add_options, + gld${EMULATION_NAME}_handle_option, gld${EMULATION_NAME}_list_options): + Provide --build-id, -z defs, -z muldefs, -z max-page-size, + -z common-page-size, -z execstack, -z noexecstack for all targets. + Add help for --exclude-libs. + (OPTION_LD_GENERATED_UNWIND_INFO, + OPTION_NO_LD_GENERATED_UNWIND_INFO): Move this.. + (gld${EMULATION_NAME}_handle_option): ..and code handling + --ld-generated-unwind-info and --no-ld-generated-unwind-info.. + * emulparams/plt_unwind.sh: ..to here. New file. Add help. + * emulparams/elf32_x86_64.sh: Include plt_unwind.sh. + * emulparams/elf_i386.sh: Likewise. + * emulparams/elf_i386_chaos.sh: Likewise. + * emulparams/elf_i386_ldso.sh: Likewise. + * emulparams/elf_l1om.sh: Likewise. + * emulparams/elf_x86_64.sh: Likewise. + +2011-07-11 Catherine Moore + + * ld.h (section_flag_list): Add field to struct wildcard_spec. + * ld.texinfo (INPUT_SECTION_FLAGS): Document. + * ldgram.y (flag_info_list, flag_info): Add to union. + (INPUT_SECTION_FLAGS): New token. + (wildcard_spec): Initialize section_flag_list to NULL for + each alternative. + (sect_flag_list, sect_flags): New rules. + (input_section_spec_no_keep): Add alternatives to recognize + sect_flags. + * ldlang.c (walk_wild_consider_section): Initialize + section_flag_info field of the section struct. + (lang_add_section): Check input section flags. + (lang_add_wild): Initialize section_flag_list field of + the statement struct. + * ldlang.h (lang_input_statement_struct): Add section_flag_list field. + (lang_wild_statement_struct): Likewise. + * ldlex.l (INPUT_SECTION_FLAGS): New token. + * mri.c (mri_draw_tree): Initialize section_flag_list to NULL. + * NEWS: Announce INPUT_SECTION_FLAGS enhancement. + +2011-07-09 H.J. Lu + + PR ld/12942 + * ldlang.c (section_already_linked): Pass "struct already_linked *" + to bfd_section_already_linked. + (lang_process): Set link_info.loading_lto_outputs before + loading LTO outputs. + * plugin.c: Include "libbfd.h". + (add_symbols): Call bfd_section_already_linked with comdat_key. + +2011-06-20 H.J. Lu + + * configure.tgt: Revert x32 change. + +2011-06-20 Jakub Jelinek + + PR ld/12570 + * emultempl/elf32.em (OPTION_LD_GENERATED_UNWIND_INFO, + OPTION_NO_LD_GENERATED_UNWIND_INFO): Define. + (gld${EMULATION_NAME}_handle_option): Handle + --ld-generated-unwind-info and --no-ld-generated-unwind-info. + * ld.texinfo (--ld-generated-unwind-info, + --no-ld-generated-unwind-info): Document. + +2011-06-19 H.J. Lu + + * configure.tgt: Support x32. + +2011-06-15 Nick Clifton + + * NEWS: Mention addition of TILEPRO and TIKE-Gx support. + +2011-06-13 Walter Lee + + * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and + eelf32tilepro.c. + (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. + (eelf32tilegx.c): New target. + (eelf32tilepro.c): Likewise. + (eelf64tilegx.c): Likewise. + * Makefile.in: Regenerate. + * configure.tgt: Handle tilegx-*-* and tilepro-*-*. + * emulparams/elf32tilegx.sh: New file. + * emulparams/elf64tilegx.sh: New file. + * emulparams/elf32tilepro.sh: New file. + +2011-06-13 Alan Modra + + * ldlang.c (sort_def_symbol, lang_one_common): Don't handle + warning symbols here. + * emultempl/pe.em (pr_sym): Remove redundant test. + * emultempl/pep.em (pr_sym): Likewise. + +2011-06-09 Nick Clifton + + PR ld/12845 + * emultempl/mipself.em (mips_add_stub_section): Do not add stubs + for sections that have been removed by garbage collection. + +2011-06-08 Alan Modra + + * ldlang.c (lang_one_common): Handle warning symbols. + +2011-06-07 Nick Clifton + + * configure.tgt: Accept any V850 architecture. + +2011-06-03 Nick Clifton + + * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32am33lin.c + Add rule to build eelf32am33lin.c + * Makefile.in: Regenerate. + +2011-06-02 Nick Clifton + + * lexsup.c: Fix spelling mistake in comment. + * scripttempl/epocpe.sc: Likewise. + * scripttempl/i386beos.sc: Likewise. + * scripttempl/mcorepe.sc: Likewise. + * scripttempl/pe.sc: Likewise. + * scripttempl/pep.sc: Likewise. + * po/ld.pot: Regenerate. + +2011-05-27 Nick Clifton + + * scripttempl/v850.sc (_heap_start): Provide. + +2011-05-23 Alan Modra + + * ldmisc.c (vfinfo): Add %H. + * ldmain.c (reloc_overflow): Use %H rather than %C. + (reloc_dangerous, unattached_reloc): Likewise. + +2011-05-23 Alan Modra + + PR 12763 + * ldlang.c (lang_output_section_find_by_flags): Match orphan .sdata2 + like sections to existing .sdata2, and similarly for orphan TLS + sections. + * emultempl/elf32.em (place_orphan): Exclude .tbss from orphan_bss. + +2011-05-17 Tomohiro Kashiwada + + PR ld/12759 + * emultempl/rxelf.em (ignore_lma): New variable. + (rx_elf_create_output_section_statements): Pass the setiing of + ignore_lma to bfd_elf32_rx_set_target_flags. + (OPTION_IGNORE_LMA): Define. + (OPTION_NO_IGNORE_LMA): Define. + (PARSE_AND_LIST_LONGOPTS): Add ignore lma. + (PARSE_AND_LIST_OPTIONS): Add ignore lma. + (PARSE_AND_LIST_ARGS_CASES): Add ignore lma. + +2011-05-17 Alan Modra + + PR ld/12760 + * ldmain.c (notice): Add "flags" and "string" param. + * plugin.c (plugin_notice): Likewise. Handle indirect, warning + and constructor syms. + +2010-05-16 Daniel Jacobowitz + + * ldlang.c (print_assignment): Use the symbol's section if we + use its value. + * ldexp.c (exp_fold_tree_1): Skip self-assignment. Expand + comment on copying symbol type. + +2011-05-16 H.J. Lu + + PR ld/12760 + * plugin.c (plugin_notice): Set u.undef.abfd for symbols made + undefweak. + +2011-05-16 Alan Modra + + * ldlang.c (lang_leave_output_section_statement): Don't copy + previous lma_region if given address. + +2011-05-13 Bernd Schmidt + + (eelf32_tic6x_linux_be.c, eelf32_tic6x_linux_le.c, + eelf32_tic6x_elf_be.c, eelf32_tic6x_elf_le.c): New rules. + * Makefile.am (ALL_EMULATIONS): Add these files. + (eelf32_tic6x_be.c, eelf32_tic6x_le.c): Depend on tic6xdsbt.em. + * Makefile.in: Regenerated. + * emultempl/tic6xdsbt.em (is_tic6x_target): Allow more tic6x target + vectors. + * emulparams/elf32_tic6x_elf_be.sh: New file. + * emulparams/elf32_tic6x_elf_le.sh: New file. + * emulparams/elf32_tic6x_linux_be.sh: New file. + * emulparams/elf32_tic6x_linux_le.sh: New file. + * configure.tgt (tic6x-*-elf, tic6x-*-uclinux): New. + (tic6x-*-*): Replaced by these. + +2011-05-13 Jan Beulich + + * configure.tgt: Add targets x86_64-*-pe and x86_64-*-pep. + +2011-05-09 Paul Brook + + * emultempl/tic6xdsbt.em (merge_exidx_entries): New. + (compare_output_sec_vma): New function. + (gld${EMULATION_NAME}_after_allocation): New function. + (OPTION_NO_MERGE_EXIDX_ENTRIES): Define. + (PARSE_AND_LIST_OPTIONS): Add --no-merge-exidx-entries. + (PARSE_AND_LIST_ARGS_CASES): Add OPTION_NO_MERGE_EXIDX_ENTRIES. + (LDEMUL_AFTER_ALLOCATION): Set. + * ld.texinfo: Document c6x --no-merge-exidx-entries. + +2011-05-07 Dave Korn + + PR ld/12365 + * scripttempl/pe.sc (__rt_psrelocs_start): New symbol definition. + (__rt_psrelocs_end): Likewise. + (__rt_psrelocs_size): Likewise difference between the above. + (__RUNTIME_PSEUDO_RELOC_LIST_END__): Move outside .rdata section + immediately after end of pseudo-reloc data. + (___RUNTIME_PSEUDO_RELOC_LIST_END___): Likewise. + (__RUNTIME_PSEUDO_RELOC_LIST__): Move outside .rdata section and + calculate backward from list end. + (___RUNTIME_PSEUDO_RELOC_LIST___): Likewise. + * scripttempl/pep.sc: Likewise. + +2011-05-06 Tristan Gingold + + * scripttempl/alphavms.sc (CODE): Add *$CODE*. + +2011-05-04 Tristan Gingold + + * emultempl/generic.em (ld_${EMULATION_NAME}_emulation): Add + LDEMUL_ADD_OPTIONS and LDEMUL_HANDLE_OPTION. + * emultempl/vms.em (OPTION_IDENTIFICATION): New macro. + (gld${EMULATION_NAME}_add_options): New function. + (gld${EMULATION_NAME}_list_options): Ditto. + (gld${EMULATION_NAME}_handle_option): Ditto. + (LDEMUL_ADD_OPTIONS, LDEMUL_HANDLE_OPTION) + (LDEMUL_LIST_OPTIONS): Define. + +2011-05-04 Alan Modra + + PR ld/12726 + * ldexp.h (lang_phase_type): Add lang_assigning_phase_enum. + * ldexp.c (exp_fold_tree_1): Correct assign to dot comment. Don't + assign to dot when lang_assigning_phase_enum. + * ldlang.h (lang_do_assignments): Update prototype. + * ldlang.c (lang_do_assignments): Add phase parameter. Update all + callers. + * pe-dll.c (pe_dll_fill_sections, pe_exe_fill_sections): Update + lang_do_assignments calls. + +2011-04-28 Daniel C. Klauer + + PR ld/12614 + * emultempl/pe.em (_after_open): Correctly check whether symbol is + in undef list. + +2011-04-26 Kai Tietz + + * scripttempl/pe.sc: Handle .eh_frame($|.)* sections. + * scripttempl/pep.sc: Likewise. + +2011-04-24 Alan Modra + + PR ld/12365 + PR ld/12696 + * ldmain.c (notice): Delete "name" param, add "h". + * plugin.c (plugin_notice): Likewise. Set non_ir_ref. Handle + redefinitions of IR symbols in real BFDs. + (plugin_multiple_definition, plugin_multiple_common): Delete. + (non_ironly_hash, init_non_ironly_hash): Delete. + (is_visible_from_outside): Traverse entry_symbol chain. + (get_symbols): Use non_ir_ref flag rather than hash lookup. + +2011-04-21 Tristan Gingold + + * scripttempl/alphavms.sc: Add dwarf2 embedding marks. + 2011-04-20 Tristan Gingold * emultempl/aix.em (_add_options): Ignore -bbigtoc switch. @@ -145,7 +626,7 @@ 2011-03-31 H.J. Lu * configure.tgt: Add elf_l1om to targ_extra_libpath for - x86_64-*-linux-*. + x86_64-*-linux-*. * emulparams/elf_l1om.sh: Remove duplicates. diff --git a/ld/Makefile.am b/ld/Makefile.am index a9e76f8..5ae86ba 100644 --- a/ld/Makefile.am +++ b/ld/Makefile.am @@ -189,6 +189,11 @@ ALL_EMULATION_SOURCES = \ eelf32_spu.c \ eelf32_tic6x_be.c \ eelf32_tic6x_le.c \ + eelf32_tic6x_linux_be.c \ + eelf32_tic6x_linux_le.c \ + eelf32_tic6x_elf_be.c \ + eelf32_tic6x_elf_le.c \ + eelf32am33lin.c \ eelf32b4300.c \ eelf32bfin.c \ eelf32bfinfd.c \ @@ -242,6 +247,8 @@ ALL_EMULATION_SOURCES = \ eelf32ppcvxworks.c \ eelf32ppcwindiss.c \ eelf32rx.c \ + eelf32tilegx.c \ + eelf32tilepro.c \ eelf32vax.c \ eelf32xc16x.c \ eelf32xc16xl.c \ @@ -471,8 +478,11 @@ ALL_64_EMULATION_SOURCES = \ eelf64ltsmip_fbsd.c \ eelf64mmix.c \ eelf64ppc.c \ + eelf64tilegx.c \ eelf_l1om.c \ eelf_l1om_fbsd.c \ + eelf_k1om.c \ + eelf_k1om_fbsd.c \ eelf_x86_64.c \ eelf_x86_64_fbsd.c \ eelf_x86_64_sol2.c \ @@ -881,11 +891,33 @@ $(srcdir)/emultempl/spu_icache.@OBJEXT@_c: @MAINT@ $(srcdir)/emultempl/spu_icach ../binutils/bin2c $@; \ fi eelf32_tic6x_be.c: $(srcdir)/emulparams/elf32_tic6x_be.sh \ - $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} ${GENSCRIPTS} elf32_tic6x_be "$(tdir_elf32_tic6x_be)" +eelf32_tic6x_elf_be.c: $(srcdir)/emulparams/elf32_tic6x_elf_be.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} + ${GENSCRIPTS} elf32_tic6x_elf_be "$(tdir_elf32_tic6x_elf_be)" +eelf32_tic6x_elf_le.c: $(srcdir)/emulparams/elf32_tic6x_elf_le.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} + ${GENSCRIPTS} elf32_tic6x_elf_le "$(tdir_elf32_tic6x_elf_le)" eelf32_tic6x_le.c: $(srcdir)/emulparams/elf32_tic6x_le.sh \ - $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} ${GENSCRIPTS} elf32_tic6x_le "$(tdir_elf32_tic6x_le)" +eelf32_tic6x_linux_be.c: $(srcdir)/emulparams/elf32_tic6x_linux_be.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} + ${GENSCRIPTS} elf32_tic6x_linux_be "$(tdir_elf32_tic6x_linux_be)" +eelf32_tic6x_linux_le.c: $(srcdir)/emulparams/elf32_tic6x_linux_le.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} + ${GENSCRIPTS} elf32_tic6x_linux_le "$(tdir_elf32_tic6x_linux_le)" +eelf32am33lin.c: $(srcdir)/emulparams/elf32am33lin.sh \ + $(srcdir)/emulparams/elf32am33lin.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf32am33lin "$(tdir_elf32am33lin)" eelf32b4300.c: $(srcdir)/emulparams/elf32b4300.sh \ $(srcdir)/emulparams/elf32bmip.sh $(ELF_DEPS) \ $(srcdir)/emultempl/mipself.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} @@ -1107,6 +1139,14 @@ eelf32ppcwindiss.c: $(srcdir)/emulparams/elf32ppcwindiss.sh \ eelf32rx.c: $(srcdir)/emulparams/elf32rx.sh \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf32rx "$(tdir_elf32rx)" +eelf32tilegx.c: $(srcdir)/emulparams/elf32tilegx.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \ + $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf32tilegx "$(tdir_tilegx)" +eelf32tilepro.c: $(srcdir)/emulparams/elf32tilepro.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \ + $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf32tilepro "$(tdir_tilepro)" eelf32vax.c: $(srcdir)/emulparams/elf32vax.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf32vax "$(tdir_elf32vax)" @@ -1932,6 +1972,10 @@ eelf64ppc.c: $(srcdir)/emulparams/elf64ppc.sh $(srcdir)/emultempl/ppc64elf.em \ ldemul-list.h \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf64ppc "$(tdir_elf64ppc)" +eelf64tilegx.c: $(srcdir)/emulparams/elf64tilegx.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \ + $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf64tilegx "$(tdir_tilegx)" eelf_l1om.c: $(srcdir)/emulparams/elf_l1om.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf_l1om "$(tdir_elf_l1om)" @@ -1939,6 +1983,13 @@ eelf_l1om_fbsd.c: $(srcdir)/emulparams/elf_l1om_fbsd.sh \ $(srcdir)/emulparams/elf_l1om.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf_l1om_fbsd "$(tdir_elf_l1om_fbsd)" +eelf_k1om.c: $(srcdir)/emulparams/elf_k1om.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf_k1om "$(tdir_elf_k1om)" +eelf_k1om_fbsd.c: $(srcdir)/emulparams/elf_k1om_fbsd.sh \ + $(srcdir)/emulparams/elf_k1om.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf_k1om_fbsd "$(tdir_elf_k1om_fbsd)" eelf_x86_64.c: $(srcdir)/emulparams/elf_x86_64.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf_x86_64 "$(tdir_elf_x86_64)" diff --git a/ld/Makefile.in b/ld/Makefile.in index 52303f1..f062b92 100644 --- a/ld/Makefile.in +++ b/ld/Makefile.in @@ -495,6 +495,11 @@ ALL_EMULATION_SOURCES = \ eelf32_spu.c \ eelf32_tic6x_be.c \ eelf32_tic6x_le.c \ + eelf32_tic6x_linux_be.c \ + eelf32_tic6x_linux_le.c \ + eelf32_tic6x_elf_be.c \ + eelf32_tic6x_elf_le.c \ + eelf32am33lin.c \ eelf32b4300.c \ eelf32bfin.c \ eelf32bfinfd.c \ @@ -548,6 +553,8 @@ ALL_EMULATION_SOURCES = \ eelf32ppcvxworks.c \ eelf32ppcwindiss.c \ eelf32rx.c \ + eelf32tilegx.c \ + eelf32tilepro.c \ eelf32vax.c \ eelf32xc16x.c \ eelf32xc16xl.c \ @@ -776,8 +783,11 @@ ALL_64_EMULATION_SOURCES = \ eelf64ltsmip_fbsd.c \ eelf64mmix.c \ eelf64ppc.c \ + eelf64tilegx.c \ eelf_l1om.c \ eelf_l1om_fbsd.c \ + eelf_k1om.c \ + eelf_k1om_fbsd.c \ eelf_x86_64.c \ eelf_x86_64_fbsd.c \ eelf_x86_64_sol2.c \ @@ -1083,8 +1093,13 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_sparc_vxworks.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_spu.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_tic6x_be.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_tic6x_elf_be.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_tic6x_elf_le.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_tic6x_le.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_tic6x_linux_be.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_tic6x_linux_le.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_x86_64.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32am33lin.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32b4300.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32bfin.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32bfinfd.Po@am__quote@ @@ -1138,6 +1153,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ppcvxworks.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ppcwindiss.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32rx.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32tilegx.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32tilepro.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32vax.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xc16x.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xc16xl.Po@am__quote@ @@ -1163,6 +1180,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip_fbsd.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64mmix.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ppc.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64tilegx.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_i386.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_i386_be.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_i386_chaos.Po@am__quote@ @@ -1170,6 +1188,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_i386_ldso.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_i386_sol2.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_i386_vxworks.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_k1om.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_k1om_fbsd.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_l1om.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_l1om_fbsd.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_s390.Po@am__quote@ @@ -2324,11 +2344,33 @@ $(srcdir)/emultempl/spu_icache.@OBJEXT@_c: @MAINT@ $(srcdir)/emultempl/spu_icach ../binutils/bin2c $@; \ fi eelf32_tic6x_be.c: $(srcdir)/emulparams/elf32_tic6x_be.sh \ - $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} ${GENSCRIPTS} elf32_tic6x_be "$(tdir_elf32_tic6x_be)" +eelf32_tic6x_elf_be.c: $(srcdir)/emulparams/elf32_tic6x_elf_be.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} + ${GENSCRIPTS} elf32_tic6x_elf_be "$(tdir_elf32_tic6x_elf_be)" +eelf32_tic6x_elf_le.c: $(srcdir)/emulparams/elf32_tic6x_elf_le.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} + ${GENSCRIPTS} elf32_tic6x_elf_le "$(tdir_elf32_tic6x_elf_le)" eelf32_tic6x_le.c: $(srcdir)/emulparams/elf32_tic6x_le.sh \ - $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} ${GENSCRIPTS} elf32_tic6x_le "$(tdir_elf32_tic6x_le)" +eelf32_tic6x_linux_be.c: $(srcdir)/emulparams/elf32_tic6x_linux_be.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} + ${GENSCRIPTS} elf32_tic6x_linux_be "$(tdir_elf32_tic6x_linux_be)" +eelf32_tic6x_linux_le.c: $(srcdir)/emulparams/elf32_tic6x_linux_le.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \ + ${GEN_DEPENDS} + ${GENSCRIPTS} elf32_tic6x_linux_le "$(tdir_elf32_tic6x_linux_le)" +eelf32am33lin.c: $(srcdir)/emulparams/elf32am33lin.sh \ + $(srcdir)/emulparams/elf32am33lin.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf32am33lin "$(tdir_elf32am33lin)" eelf32b4300.c: $(srcdir)/emulparams/elf32b4300.sh \ $(srcdir)/emulparams/elf32bmip.sh $(ELF_DEPS) \ $(srcdir)/emultempl/mipself.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} @@ -2550,6 +2592,14 @@ eelf32ppcwindiss.c: $(srcdir)/emulparams/elf32ppcwindiss.sh \ eelf32rx.c: $(srcdir)/emulparams/elf32rx.sh \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf32rx "$(tdir_elf32rx)" +eelf32tilegx.c: $(srcdir)/emulparams/elf32tilegx.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \ + $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf32tilegx "$(tdir_tilegx)" +eelf32tilepro.c: $(srcdir)/emulparams/elf32tilepro.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \ + $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf32tilepro "$(tdir_tilepro)" eelf32vax.c: $(srcdir)/emulparams/elf32vax.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf32vax "$(tdir_elf32vax)" @@ -3375,6 +3425,10 @@ eelf64ppc.c: $(srcdir)/emulparams/elf64ppc.sh $(srcdir)/emultempl/ppc64elf.em \ ldemul-list.h \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf64ppc "$(tdir_elf64ppc)" +eelf64tilegx.c: $(srcdir)/emulparams/elf64tilegx.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \ + $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf64tilegx "$(tdir_tilegx)" eelf_l1om.c: $(srcdir)/emulparams/elf_l1om.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf_l1om "$(tdir_elf_l1om)" @@ -3382,6 +3436,13 @@ eelf_l1om_fbsd.c: $(srcdir)/emulparams/elf_l1om_fbsd.sh \ $(srcdir)/emulparams/elf_l1om.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf_l1om_fbsd "$(tdir_elf_l1om_fbsd)" +eelf_k1om.c: $(srcdir)/emulparams/elf_k1om.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf_k1om "$(tdir_elf_k1om)" +eelf_k1om_fbsd.c: $(srcdir)/emulparams/elf_k1om_fbsd.sh \ + $(srcdir)/emulparams/elf_k1om.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf_k1om_fbsd "$(tdir_elf_k1om_fbsd)" eelf_x86_64.c: $(srcdir)/emulparams/elf_x86_64.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf_x86_64 "$(tdir_elf_x86_64)" diff --git a/ld/NEWS b/ld/NEWS index b303490..62406b4 100644 --- a/ld/NEWS +++ b/ld/NEWS @@ -1,12 +1,21 @@ -*- text -*- +Changes in 2.22: + +* --copy-dt-needed-entries is no longer enabled by default. Instead + --no-copy-dt-needed-entries is the default. + +* INPUT_SECTION_FLAGS has been added to the linker script language +to allow selection of input sections by section header section flags. + +* Add support for the Tilera TILEPRO and TILE-Gx architectures. + * Added SORT_BY_INIT_PRIORITY to the linker script language to permit sorting sections by numerical value of the GCC init_priority attribute encoded in the section name. Changes in 2.21: - * Linker script expression evaluation is somewhat more sane. This may break scripts that depend on quirks of the old expression evaluation. diff --git a/ld/config.in b/ld/config.in index 929da90..a3867f3 100644 --- a/ld/config.in +++ b/ld/config.in @@ -132,7 +132,7 @@ /* Define to 1 if you have the `waitpid' function. */ #undef HAVE_WAITPID -/* Define to 1 if you have the header file. */ +/* Define to 1 if you have the header file. */ #undef HAVE_WINDOWS_H /* Define to 1 if you have the header file. */ diff --git a/ld/configdoc.texi b/ld/configdoc.texi new file mode 100644 index 0000000..5a6bfd5 --- /dev/null +++ b/ld/configdoc.texi @@ -0,0 +1,27 @@ +@c ------------------------------ CONFIGURATION VARS: +@c 1. Inclusiveness of this manual +@set GENERIC + +@c 2. Specific target machines +@set ARM +@set C6X +@set H8300 +@set HPPA +@set I960 +@set M68HC11 +@set M68K +@set MMIX +@set MSP430 +@set POWERPC +@set POWERPC64 +@set Renesas +@set SPU +@set TICOFF +@set WIN32 +@set XTENSA + +@c 3. Properties of this configuration +@clear SingleFormat +@set UsesEnvVars +@c ------------------------------ end CONFIGURATION VARS + diff --git a/ld/configure.tgt b/ld/configure.tgt index 7528cb5..197f27a 100644 --- a/ld/configure.tgt +++ b/ld/configure.tgt @@ -186,24 +186,24 @@ i[3-7]86-*-linux*aout*) targ_emul=i386linux i[3-7]86-*-linux*oldld) targ_emul=i386linux; targ_extra_emuls=elf_i386 ;; i[3-7]86-*-linux-*) targ_emul=elf_i386 targ_extra_emuls=i386linux - targ64_extra_emuls="elf_x86_64 elf32_x86_64 elf_l1om" + targ64_extra_emuls="elf_x86_64 elf32_x86_64 elf_l1om elf_k1om" targ64_extra_libpath=elf_x86_64 targ_extra_libpath=elf32_x86_64 tdir_i386linux=${targ_alias}aout ;; x86_64-*-linux-*) targ_emul=elf_x86_64 - targ_extra_emuls="elf32_x86_64 elf_i386 i386linux elf_l1om" - targ_extra_libpath="elf_i386 elf32_x86_64 elf_l1om" + targ_extra_emuls="elf32_x86_64 elf_i386 i386linux elf_l1om elf_k1om" + targ_extra_libpath="elf_i386 elf32_x86_64 elf_l1om elf_k1om" tdir_i386linux=`echo ${targ_alias}aout | sed -e 's/x86_64/i386/'` tdir_elf_i386=`echo ${targ_alias} | sed -e 's/x86_64/i386/'` ;; i[3-7]86-*-sysv[45]*) targ_emul=elf_i386 ;; i[3-7]86-*-solaris2*) targ_emul=elf_i386_sol2 - targ_extra_emuls="elf_i386_ldso elf_i386 elf_x86_64_sol2 elf_x86_64 elf_l1om" + targ_extra_emuls="elf_i386_ldso elf_i386 elf_x86_64_sol2 elf_x86_64 elf_l1om elf_k1om" targ_extra_libpath=$targ_extra_emuls ;; x86_64-*-solaris2*) targ_emul=elf_x86_64_sol2 - targ_extra_emuls="elf_x86_64 elf_i386_sol2 elf_i386_ldso elf_i386 elf_l1om" - targ_extra_libpath=elf_i386 + targ_extra_emuls="elf_x86_64 elf_i386_sol2 elf_i386_ldso elf_i386 elf_l1om elf_k1om" + targ_extra_libpath=$targ_extra_emuls tdir_elf_i386=`echo ${targ_alias} | sed -e 's/x86_64/i386/'` ;; i[3-7]86-*-unixware) targ_emul=elf_i386 ;; i[3-7]86-*-solaris*) targ_emul=elf_i386_ldso @@ -220,7 +220,7 @@ i[3-7]86-*-netbsdpe*) targ_emul=i386pe i[3-7]86-*-netbsd*) targ_emul=i386nbsd targ_extra_emuls=elf_i386 ;; x86_64-*-netbsd*) targ_emul=elf_x86_64 - targ_extra_emuls="elf_i386 i386nbsd elf_l1om" + targ_extra_emuls="elf_i386 i386nbsd elf_l1om elf_k1om" tdir_elf_i386=`echo ${targ_alias} | \ sed -e 's/x86_64/i386/'` case "${tdir_elf_i386}" in @@ -231,7 +231,7 @@ x86_64-*-netbsd*) targ_emul=elf_x86_64 i[3-7]86-*-netware) targ_emul=i386nw ;; i[3-7]86-*-elf*) targ_emul=elf_i386 ;; x86_64-*-elf*) targ_emul=elf_x86_64 - targ_extra_emuls="elf_i386 elf_l1om" + targ_extra_emuls="elf_i386 elf_l1om elf_k1om" ;; i[3-7]86-*-kaos*) targ_emul=elf_i386 ;; i[3-7]86-*-freebsdaout* | i[3-7]86-*-freebsd[12].* | i[3-7]86-*-freebsd[12]) @@ -239,13 +239,13 @@ i[3-7]86-*-freebsdaout* | i[3-7]86-*-freebsd[12].* | i[3-7]86-*-freebsd[12]) i[3-7]86-*-dragonfly*) targ_emul=elf_i386 targ_extra_emuls="i386bsd" ;; x86_64-*-dragonfly*) targ_emul=elf_x86_64 - targ_extra_emuls="elf_i386 elf_l1om" ;; + targ_extra_emuls="elf_i386 elf_l1om elf_k1om" ;; i[3-7]86-*-freebsd* | i[3-7]86-*-kfreebsd*-gnu) targ_emul=elf_i386_fbsd targ_extra_emuls="elf_i386 i386bsd" ;; x86_64-*-freebsd* | x86_64-*-kfreebsd*-gnu) targ_emul=elf_x86_64_fbsd - targ_extra_emuls="elf_i386_fbsd elf_x86_64 elf_i386 elf_l1om elf_l1om_fbsd" + targ_extra_emuls="elf_i386_fbsd elf_x86_64 elf_i386 elf_l1om elf_l1om_fbsd elf_k1om elf_k1om_fbsd" targ_extra_libpath="elf_i386_fbsd" tdir_elf_i386_fbsd=`echo ${targ_alias} \ | sed -e 's/x86_64/i386/'` @@ -266,6 +266,9 @@ i[3-7]86-*-cygwin*) targ_emul=i386pe ; test "$targ" != "$host" && LIB_PATH='${tooldir}/lib/w32api' ;; i[3-7]86-*-mingw32*) targ_emul=i386pe ; targ_extra_ofiles="deffilep.o pe-dll.o" ;; +x86_64-*-pe | x86_64-*-pep) targ_emul=i386pep ; + targ_extra_emuls=i386pe ; + targ_extra_ofiles="deffilep.o pep-dll.o pe-dll.o" ;; x86_64-*-mingw*) targ_emul=i386pep ; targ_extra_emuls=i386pe targ_extra_ofiles="deffilep.o pep-dll.o pe-dll.o" ;; @@ -630,14 +633,21 @@ tic30-*-*aout*) targ_emul=tic30aout ;; tic30-*-*coff*) targ_emul=tic30coff ;; tic4x-*-* | c4x-*-*) targ_emul=tic4xcoff ; targ_extra_emuls="tic3xcoff tic3xcoff_onchip" ;; tic54x-*-* | c54x*-*-*) targ_emul=tic54xcoff ;; -tic6x-*-*) targ_emul=elf32_tic6x_le - targ_extra_emuls="elf32_tic6x_be" +tic6x-*-elf) targ_emul=elf32_tic6x_elf_le + targ_extra_emuls="elf32_tic6x_elf_be elf32_tic6x_le elf32_tic6x_be" + targ_extra_libpath=$targ_extra_emuls + ;; +tic6x-*-uclinux) targ_emul=elf32_tic6x_linux_le + targ_extra_emuls="elf32_tic6x_linux_be elf32_tic6x_le elf32_tic6x_be" + targ_extra_libpath=$targ_extra_emuls ;; tic80-*-*) targ_emul=tic80coff ;; -v850-*-*) targ_emul=v850 ;; -v850e-*-*) targ_emul=v850 ;; -v850ea-*-*) targ_emul=v850 +tilegx-*-*) targ_emul=elf64tilegx + targ_extra_emuls="elf32tilegx" + targ_extra_libpath=$targ_extra_emuls ;; +tilepro-*-*) targ_emul=elf32tilepro ;; +v850*-*-*) targ_emul=v850 ;; vax-dec-ultrix* | vax-dec-bsd*) targ_emul=vax ;; vax-*-netbsdelf*) targ_emul=elf32vax diff --git a/ld/deffilep.c b/ld/deffilep.c new file mode 100644 index 0000000..97d8265 --- /dev/null +++ b/ld/deffilep.c @@ -0,0 +1,3255 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton implementation for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* C LALR(1) parser skeleton written by Richard Stallman, by + simplifying the original so-called "semantic" parser. */ + +/* All symbols defined below should begin with yy or YY, to avoid + infringing on user name space. This should be done even for local + variables, as they might otherwise be expanded by user macros. + There are some unavoidable exceptions within include files to + define necessary library symbols; they are noted "INFRINGES ON + USER NAME SPACE" below. */ + +/* Identify Bison output. */ +#define YYBISON 1 + +/* Bison version. */ +#define YYBISON_VERSION "2.3" + +/* Skeleton name. */ +#define YYSKELETON_NAME "yacc.c" + +/* Pure parsers. */ +#define YYPURE 0 + +/* Using locations. */ +#define YYLSP_NEEDED 0 + + + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + NAME = 258, + LIBRARY = 259, + DESCRIPTION = 260, + STACKSIZE_K = 261, + HEAPSIZE = 262, + CODE = 263, + DATAU = 264, + DATAL = 265, + SECTIONS = 266, + EXPORTS = 267, + IMPORTS = 268, + VERSIONK = 269, + BASE = 270, + CONSTANTU = 271, + CONSTANTL = 272, + PRIVATEU = 273, + PRIVATEL = 274, + ALIGNCOMM = 275, + READ = 276, + WRITE = 277, + EXECUTE = 278, + SHARED = 279, + NONAMEU = 280, + NONAMEL = 281, + DIRECTIVE = 282, + EQUAL = 283, + ID = 284, + DIGITS = 285 + }; +#endif +/* Tokens. */ +#define NAME 258 +#define LIBRARY 259 +#define DESCRIPTION 260 +#define STACKSIZE_K 261 +#define HEAPSIZE 262 +#define CODE 263 +#define DATAU 264 +#define DATAL 265 +#define SECTIONS 266 +#define EXPORTS 267 +#define IMPORTS 268 +#define VERSIONK 269 +#define BASE 270 +#define CONSTANTU 271 +#define CONSTANTL 272 +#define PRIVATEU 273 +#define PRIVATEL 274 +#define ALIGNCOMM 275 +#define READ 276 +#define WRITE 277 +#define EXECUTE 278 +#define SHARED 279 +#define NONAMEU 280 +#define NONAMEL 281 +#define DIRECTIVE 282 +#define EQUAL 283 +#define ID 284 +#define DIGITS 285 + + + + +/* Copy the first part of user declarations. */ +#line 1 "deffilep.y" + /* deffilep.y - parser for .def files */ + +/* Copyright 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2006, + 2007, 2009 Free Software Foundation, Inc. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "libiberty.h" +#include "safe-ctype.h" +#include "bfd.h" +#include "ld.h" +#include "ldmisc.h" +#include "deffile.h" + +#define TRACE 0 + +#define ROUND_UP(a, b) (((a)+((b)-1))&~((b)-1)) + +/* Remap normal yacc parser interface names (yyparse, yylex, yyerror, etc), + as well as gratuitiously global symbol names, so we can have multiple + yacc generated parsers in ld. Note that these are only the variables + produced by yacc. If other parser generators (bison, byacc, etc) produce + additional global names that conflict at link time, then those parser + generators need to be fixed instead of adding those names to this list. */ + +#define yymaxdepth def_maxdepth +#define yyparse def_parse +#define yylex def_lex +#define yyerror def_error +#define yylval def_lval +#define yychar def_char +#define yydebug def_debug +#define yypact def_pact +#define yyr1 def_r1 +#define yyr2 def_r2 +#define yydef def_def +#define yychk def_chk +#define yypgo def_pgo +#define yyact def_act +#define yyexca def_exca +#define yyerrflag def_errflag +#define yynerrs def_nerrs +#define yyps def_ps +#define yypv def_pv +#define yys def_s +#define yy_yys def_yys +#define yystate def_state +#define yytmp def_tmp +#define yyv def_v +#define yy_yyv def_yyv +#define yyval def_val +#define yylloc def_lloc +#define yyreds def_reds /* With YYDEBUG defined. */ +#define yytoks def_toks /* With YYDEBUG defined. */ +#define yylhs def_yylhs +#define yylen def_yylen +#define yydefred def_yydefred +#define yydgoto def_yydgoto +#define yysindex def_yysindex +#define yyrindex def_yyrindex +#define yygindex def_yygindex +#define yytable def_yytable +#define yycheck def_yycheck + +typedef struct def_pool_str { + struct def_pool_str *next; + char data[1]; +} def_pool_str; + +static def_pool_str *pool_strs = NULL; + +static char *def_pool_alloc (size_t sz); +static char *def_pool_strdup (const char *str); +static void def_pool_free (void); + +static void def_description (const char *); +static void def_exports (const char *, const char *, int, int, const char *); +static void def_heapsize (int, int); +static void def_import (const char *, const char *, const char *, const char *, + int, const char *); +static void def_image_name (const char *, int, int); +static void def_section (const char *, int); +static void def_section_alt (const char *, const char *); +static void def_stacksize (int, int); +static void def_version (int, int); +static void def_directive (char *); +static void def_aligncomm (char *str, int align); +static int def_parse (void); +static int def_error (const char *); +static int def_lex (void); + +static int lex_forced_token = 0; +static const char *lex_parse_string = 0; +static const char *lex_parse_string_end = 0; + + + +/* Enabling traces. */ +#ifndef YYDEBUG +# define YYDEBUG 0 +#endif + +/* Enabling verbose error messages. */ +#ifdef YYERROR_VERBOSE +# undef YYERROR_VERBOSE +# define YYERROR_VERBOSE 1 +#else +# define YYERROR_VERBOSE 0 +#endif + +/* Enabling the token table. */ +#ifndef YYTOKEN_TABLE +# define YYTOKEN_TABLE 0 +#endif + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 114 "deffilep.y" +{ + char *id; + int number; + char *digits; +} +/* Line 193 of yacc.c. */ +#line 275 "deffilep.c" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + + + +/* Copy the second part of user declarations. */ + + +/* Line 216 of yacc.c. */ +#line 288 "deffilep.c" + +#ifdef short +# undef short +#endif + +#ifdef YYTYPE_UINT8 +typedef YYTYPE_UINT8 yytype_uint8; +#else +typedef unsigned char yytype_uint8; +#endif + +#ifdef YYTYPE_INT8 +typedef YYTYPE_INT8 yytype_int8; +#elif (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +typedef signed char yytype_int8; +#else +typedef short int yytype_int8; +#endif + +#ifdef YYTYPE_UINT16 +typedef YYTYPE_UINT16 yytype_uint16; +#else +typedef unsigned short int yytype_uint16; +#endif + +#ifdef YYTYPE_INT16 +typedef YYTYPE_INT16 yytype_int16; +#else +typedef short int yytype_int16; +#endif + +#ifndef YYSIZE_T +# ifdef __SIZE_TYPE__ +# define YYSIZE_T __SIZE_TYPE__ +# elif defined size_t +# define YYSIZE_T size_t +# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# else +# define YYSIZE_T unsigned int +# endif +#endif + +#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) + +#ifndef YY_ +# if defined YYENABLE_NLS && YYENABLE_NLS +# if ENABLE_NLS +# include /* INFRINGES ON USER NAME SPACE */ +# define YY_(msgid) dgettext ("bison-runtime", msgid) +# endif +# endif +# ifndef YY_ +# define YY_(msgid) msgid +# endif +#endif + +/* Suppress unused-variable warnings by "using" E. */ +#if ! defined lint || defined __GNUC__ +# define YYUSE(e) ((void) (e)) +#else +# define YYUSE(e) /* empty */ +#endif + +/* Identity function, used to suppress warnings about constant conditions. */ +#ifndef lint +# define YYID(n) (n) +#else +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static int +YYID (int i) +#else +static int +YYID (i) + int i; +#endif +{ + return i; +} +#endif + +#if ! defined yyoverflow || YYERROR_VERBOSE + +/* The parser invokes alloca or malloc; define the necessary symbols. */ + +# ifdef YYSTACK_USE_ALLOCA +# if YYSTACK_USE_ALLOCA +# ifdef __GNUC__ +# define YYSTACK_ALLOC __builtin_alloca +# elif defined __BUILTIN_VA_ARG_INCR +# include /* INFRINGES ON USER NAME SPACE */ +# elif defined _AIX +# define YYSTACK_ALLOC __alloca +# elif defined _MSC_VER +# include /* INFRINGES ON USER NAME SPACE */ +# define alloca _alloca +# else +# define YYSTACK_ALLOC alloca +# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# endif +# endif +# endif + +# ifdef YYSTACK_ALLOC + /* Pacify GCC's `empty if-body' warning. */ +# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) +# ifndef YYSTACK_ALLOC_MAXIMUM + /* The OS might guarantee only one guard page at the bottom of the stack, + and a page size can be as small as 4096 bytes. So we cannot safely + invoke alloca (N) if N exceeds 4096. Use a slightly smaller number + to allow for a few compiler-allocated temporary stack slots. */ +# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ +# endif +# else +# define YYSTACK_ALLOC YYMALLOC +# define YYSTACK_FREE YYFREE +# ifndef YYSTACK_ALLOC_MAXIMUM +# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM +# endif +# if (defined __cplusplus && ! defined _STDLIB_H \ + && ! ((defined YYMALLOC || defined malloc) \ + && (defined YYFREE || defined free))) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# ifndef YYMALLOC +# define YYMALLOC malloc +# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifndef YYFREE +# define YYFREE free +# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void free (void *); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# endif +#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ + + +#if (! defined yyoverflow \ + && (! defined __cplusplus \ + || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) + +/* A type that is properly aligned for any stack member. */ +union yyalloc +{ + yytype_int16 yyss; + YYSTYPE yyvs; + }; + +/* The size of the maximum gap between one aligned stack and the next. */ +# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) + +/* The size of an array large to enough to hold all stacks, each with + N elements. */ +# define YYSTACK_BYTES(N) \ + ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ + + YYSTACK_GAP_MAXIMUM) + +/* Copy COUNT objects from FROM to TO. The source and destination do + not overlap. */ +# ifndef YYCOPY +# if defined __GNUC__ && 1 < __GNUC__ +# define YYCOPY(To, From, Count) \ + __builtin_memcpy (To, From, (Count) * sizeof (*(From))) +# else +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ + while (YYID (0)) +# endif +# endif + +/* Relocate STACK from its old location to the new one. The + local variables YYSIZE and YYSTACKSIZE give the old and new number of + elements in the stack, and YYPTR gives the new location of the + stack. Advance YYPTR to a properly aligned location for the next + stack. */ +# define YYSTACK_RELOCATE(Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack, Stack, yysize); \ + Stack = &yyptr->Stack; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ + while (YYID (0)) + +#endif + +/* YYFINAL -- State number of the termination state. */ +#define YYFINAL 47 +/* YYLAST -- Last index in YYTABLE. */ +#define YYLAST 126 + +/* YYNTOKENS -- Number of terminals. */ +#define YYNTOKENS 35 +/* YYNNTS -- Number of nonterminals. */ +#define YYNNTS 25 +/* YYNRULES -- Number of rules. */ +#define YYNRULES 76 +/* YYNRULES -- Number of states. */ +#define YYNSTATES 123 + +/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ +#define YYUNDEFTOK 2 +#define YYMAXUTOK 285 + +#define YYTRANSLATE(YYX) \ + ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + +/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ +static const yytype_uint8 yytranslate[] = +{ + 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 32, 2, 31, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 33, 2, 2, 34, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30 +}; + +#if YYDEBUG +/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in + YYRHS. */ +static const yytype_uint8 yyprhs[] = +{ + 0, 0, 3, 6, 8, 12, 16, 19, 23, 27, + 30, 33, 36, 39, 42, 45, 50, 53, 58, 59, + 61, 64, 72, 76, 77, 79, 81, 83, 85, 87, + 89, 91, 93, 96, 98, 107, 116, 123, 130, 137, + 142, 145, 147, 150, 153, 157, 159, 161, 162, 165, + 166, 168, 170, 172, 174, 176, 179, 183, 184, 187, + 188, 191, 192, 195, 196, 200, 201, 203, 206, 210, + 212, 215, 220, 222, 223, 225, 226 +}; + +/* YYRHS -- A `-1'-separated list of the rules' RHS. */ +static const yytype_int8 yyrhs[] = +{ + 36, 0, -1, 36, 37, -1, 37, -1, 3, 50, + 54, -1, 4, 50, 54, -1, 5, 29, -1, 6, + 59, 48, -1, 7, 59, 48, -1, 8, 46, -1, + 9, 46, -1, 11, 44, -1, 12, 38, -1, 13, + 42, -1, 14, 59, -1, 14, 59, 31, 59, -1, + 27, 29, -1, 20, 56, 32, 59, -1, -1, 39, + -1, 38, 39, -1, 55, 53, 52, 47, 40, 47, + 51, -1, 41, 47, 40, -1, -1, 25, -1, 26, + -1, 16, -1, 17, -1, 9, -1, 10, -1, 18, + -1, 19, -1, 42, 43, -1, 43, -1, 29, 33, + 29, 31, 29, 31, 29, 51, -1, 29, 33, 29, + 31, 29, 31, 59, 51, -1, 29, 33, 29, 31, + 29, 51, -1, 29, 33, 29, 31, 59, 51, -1, + 29, 31, 29, 31, 29, 51, -1, 29, 31, 29, + 51, -1, 44, 45, -1, 45, -1, 29, 46, -1, + 29, 29, -1, 46, 47, 49, -1, 49, -1, 32, + -1, -1, 32, 59, -1, -1, 21, -1, 22, -1, + 23, -1, 24, -1, 29, -1, 31, 29, -1, 29, + 31, 29, -1, -1, 28, 29, -1, -1, 34, 59, + -1, -1, 33, 55, -1, -1, 15, 33, 59, -1, + -1, 29, -1, 31, 29, -1, 55, 31, 29, -1, + 29, -1, 31, 29, -1, 56, 31, 57, 58, -1, + 30, -1, -1, 29, -1, -1, 30, -1 +}; + +/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ +static const yytype_uint16 yyrline[] = +{ + 0, 135, 135, 136, 140, 141, 142, 143, 144, 145, + 146, 147, 148, 149, 150, 151, 152, 153, 157, 159, + 160, 167, 174, 175, 178, 179, 180, 181, 182, 183, + 184, 185, 188, 189, 193, 195, 197, 199, 201, 203, + 208, 209, 213, 214, 218, 219, 223, 224, 226, 227, + 231, 232, 233, 234, 237, 238, 244, 250, 253, 254, + 258, 259, 263, 264, 267, 268, 271, 272, 278, 286, + 287, 293, 301, 302, 305, 306, 309 +}; +#endif + +#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE +/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. + First, the terminals, then, starting at YYNTOKENS, nonterminals. */ +static const char *const yytname[] = +{ + "$end", "error", "$undefined", "NAME", "LIBRARY", "DESCRIPTION", + "STACKSIZE_K", "HEAPSIZE", "CODE", "DATAU", "DATAL", "SECTIONS", + "EXPORTS", "IMPORTS", "VERSIONK", "BASE", "CONSTANTU", "CONSTANTL", + "PRIVATEU", "PRIVATEL", "ALIGNCOMM", "READ", "WRITE", "EXECUTE", + "SHARED", "NONAMEU", "NONAMEL", "DIRECTIVE", "EQUAL", "ID", "DIGITS", + "'.'", "','", "'='", "'@'", "$accept", "start", "command", "explist", + "expline", "exp_opt_list", "exp_opt", "implist", "impline", "seclist", + "secline", "attr_list", "opt_comma", "opt_number", "attr", "opt_name", + "opt_equalequal_name", "opt_ordinal", "opt_equal_name", "opt_base", + "dot_name", "anylang_id", "opt_digits", "opt_id", "NUMBER", 0 +}; +#endif + +# ifdef YYPRINT +/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to + token YYLEX-NUM. */ +static const yytype_uint16 yytoknum[] = +{ + 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, + 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, + 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, + 285, 46, 44, 61, 64 +}; +# endif + +/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ +static const yytype_uint8 yyr1[] = +{ + 0, 35, 36, 36, 37, 37, 37, 37, 37, 37, + 37, 37, 37, 37, 37, 37, 37, 37, 38, 38, + 38, 39, 40, 40, 41, 41, 41, 41, 41, 41, + 41, 41, 42, 42, 43, 43, 43, 43, 43, 43, + 44, 44, 45, 45, 46, 46, 47, 47, 48, 48, + 49, 49, 49, 49, 50, 50, 50, 50, 51, 51, + 52, 52, 53, 53, 54, 54, 55, 55, 55, 56, + 56, 56, 57, 57, 58, 58, 59 +}; + +/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ +static const yytype_uint8 yyr2[] = +{ + 0, 2, 2, 1, 3, 3, 2, 3, 3, 2, + 2, 2, 2, 2, 2, 4, 2, 4, 0, 1, + 2, 7, 3, 0, 1, 1, 1, 1, 1, 1, + 1, 1, 2, 1, 8, 8, 6, 6, 6, 4, + 2, 1, 2, 2, 3, 1, 1, 0, 2, 0, + 1, 1, 1, 1, 1, 2, 3, 0, 2, 0, + 2, 0, 2, 0, 3, 0, 1, 2, 3, 1, + 2, 4, 1, 0, 1, 0, 1 +}; + +/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state + STATE-NUM when YYTABLE doesn't specify something else to do. Zero + means the default is an error. */ +static const yytype_uint8 yydefact[] = +{ + 0, 57, 57, 0, 0, 0, 0, 0, 0, 18, + 0, 0, 0, 0, 0, 3, 54, 0, 65, 65, + 6, 76, 49, 49, 50, 51, 52, 53, 9, 45, + 10, 0, 11, 41, 66, 0, 12, 19, 63, 0, + 13, 33, 14, 69, 0, 0, 16, 1, 2, 0, + 55, 0, 4, 5, 0, 7, 8, 46, 0, 43, + 42, 40, 67, 20, 0, 0, 61, 0, 0, 32, + 0, 70, 73, 0, 56, 0, 48, 44, 68, 62, + 0, 47, 59, 0, 15, 72, 75, 17, 64, 60, + 23, 0, 0, 39, 0, 74, 71, 28, 29, 26, + 27, 30, 31, 24, 25, 47, 47, 58, 59, 59, + 59, 59, 23, 38, 0, 36, 37, 21, 22, 59, + 59, 34, 35 +}; + +/* YYDEFGOTO[NTERM-NUM]. */ +static const yytype_int8 yydefgoto[] = +{ + -1, 14, 15, 36, 37, 105, 106, 40, 41, 32, + 33, 28, 58, 55, 29, 18, 93, 81, 66, 52, + 38, 45, 86, 96, 22 +}; + +/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing + STATE-NUM. */ +#define YYPACT_NINF -81 +static const yytype_int8 yypact[] = +{ + 30, 27, 27, -15, -7, -7, 64, 64, -1, 35, + 11, -7, 38, 22, 4, -81, 28, 31, 48, 48, + -81, -81, 66, 66, -81, -81, -81, -81, -2, -81, + -2, 55, -1, -81, -81, 67, 35, -81, 59, 60, + 11, -81, 68, -81, 71, 16, -81, -81, -81, 72, + -81, 69, -81, -81, -7, -81, -81, -81, 64, -81, + -2, -81, -81, -81, 74, 35, 63, 75, 76, -81, + -7, -81, 77, -7, -81, -7, -81, -81, -81, 79, + -7, 80, -26, 82, -81, -81, 85, -81, -81, -81, + 36, 86, 87, -81, 51, -81, -81, -81, -81, -81, + -81, -81, -81, -81, -81, 80, 80, -81, 78, 1, + 78, 78, 36, -81, 65, -81, -81, -81, -81, 78, + 78, -81, -81 +}; + +/* YYPGOTO[NTERM-NUM]. */ +static const yytype_int8 yypgoto[] = +{ + -81, -81, 94, -81, 81, 6, -81, -81, 83, -81, + 88, -4, -80, 96, 53, 119, -37, -81, -81, 103, + 61, -81, -81, -81, -5 +}; + +/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If + positive, shift that token. If negative, reduce the rule which + number is the opposite. If zero, do what YYDEFACT says. + If YYTABLE_NINF, syntax error. */ +#define YYTABLE_NINF -48 +static const yytype_int8 yytable[] = +{ + 23, 90, 91, 30, 47, 92, 42, 1, 2, 3, + 4, 5, 6, 7, 20, 8, 9, 10, 11, -47, + -47, -47, -47, 21, 12, 111, 112, 60, 31, 91, + 57, 13, 114, 1, 2, 3, 4, 5, 6, 7, + 39, 8, 9, 10, 11, 97, 98, 72, 73, 76, + 12, 46, 99, 100, 101, 102, 16, 13, 17, 49, + 50, 103, 104, 51, 34, 84, 35, 43, 87, 44, + 88, 113, 115, 116, 117, 89, 24, 25, 26, 27, + 109, 21, 121, 122, 59, 24, 25, 26, 27, 110, + 64, 67, 65, 68, 119, 21, 62, 80, 54, 70, + 71, 74, 75, 78, 82, 83, 91, 85, 48, 120, + 64, 77, 57, 94, 95, 107, 108, 63, 118, 56, + 61, 19, 53, 69, 0, 0, 79 +}; + +static const yytype_int8 yycheck[] = +{ + 5, 81, 28, 7, 0, 31, 11, 3, 4, 5, + 6, 7, 8, 9, 29, 11, 12, 13, 14, 21, + 22, 23, 24, 30, 20, 105, 106, 31, 29, 28, + 32, 27, 31, 3, 4, 5, 6, 7, 8, 9, + 29, 11, 12, 13, 14, 9, 10, 31, 32, 54, + 20, 29, 16, 17, 18, 19, 29, 27, 31, 31, + 29, 25, 26, 15, 29, 70, 31, 29, 73, 31, + 75, 108, 109, 110, 111, 80, 21, 22, 23, 24, + 29, 30, 119, 120, 29, 21, 22, 23, 24, 94, + 31, 31, 33, 33, 29, 30, 29, 34, 32, 31, + 29, 29, 33, 29, 29, 29, 28, 30, 14, 114, + 31, 58, 32, 31, 29, 29, 29, 36, 112, 23, + 32, 2, 19, 40, -1, -1, 65 +}; + +/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing + symbol of state STATE-NUM. */ +static const yytype_uint8 yystos[] = +{ + 0, 3, 4, 5, 6, 7, 8, 9, 11, 12, + 13, 14, 20, 27, 36, 37, 29, 31, 50, 50, + 29, 30, 59, 59, 21, 22, 23, 24, 46, 49, + 46, 29, 44, 45, 29, 31, 38, 39, 55, 29, + 42, 43, 59, 29, 31, 56, 29, 0, 37, 31, + 29, 15, 54, 54, 32, 48, 48, 32, 47, 29, + 46, 45, 29, 39, 31, 33, 53, 31, 33, 43, + 31, 29, 31, 32, 29, 33, 59, 49, 29, 55, + 34, 52, 29, 29, 59, 30, 57, 59, 59, 59, + 47, 28, 31, 51, 31, 29, 58, 9, 10, 16, + 17, 18, 19, 25, 26, 40, 41, 29, 29, 29, + 59, 47, 47, 51, 31, 51, 51, 51, 40, 29, + 59, 51, 51 +}; + +#define yyerrok (yyerrstatus = 0) +#define yyclearin (yychar = YYEMPTY) +#define YYEMPTY (-2) +#define YYEOF 0 + +#define YYACCEPT goto yyacceptlab +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab + + +/* Like YYERROR except do call yyerror. This remains here temporarily + to ease the transition to the new meaning of YYERROR, for GCC. + Once GCC version 2 has supplanted version 1, this can go. */ + +#define YYFAIL goto yyerrlab + +#define YYRECOVERING() (!!yyerrstatus) + +#define YYBACKUP(Token, Value) \ +do \ + if (yychar == YYEMPTY && yylen == 1) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ + YYPOPSTACK (1); \ + goto yybackup; \ + } \ + else \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ +while (YYID (0)) + + +#define YYTERROR 1 +#define YYERRCODE 256 + + +/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. + If N is 0, then set CURRENT to the empty location which ends + the previous symbol: RHS[0] (always defined). */ + +#define YYRHSLOC(Rhs, K) ((Rhs)[K]) +#ifndef YYLLOC_DEFAULT +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ + if (YYID (N)) \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ + while (YYID (0)) +#endif + + +/* YY_LOCATION_PRINT -- Print the location on the stream. + This macro was not mandated originally: define only if we know + we won't break user code: when these are the locations we know. */ + +#ifndef YY_LOCATION_PRINT +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) +# else +# define YY_LOCATION_PRINT(File, Loc) ((void) 0) +# endif +#endif + + +/* YYLEX -- calling `yylex' with the right arguments. */ + +#ifdef YYLEX_PARAM +# define YYLEX yylex (YYLEX_PARAM) +#else +# define YYLEX yylex () +#endif + +/* Enable debugging if requested. */ +#if YYDEBUG + +# ifndef YYFPRINTF +# include /* INFRINGES ON USER NAME SPACE */ +# define YYFPRINTF fprintf +# endif + +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ +} while (YYID (0)) + +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yy_symbol_print (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ +} while (YYID (0)) + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_value_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (!yyvaluep) + return; +# ifdef YYPRINT + if (yytype < YYNTOKENS) + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# else + YYUSE (yyoutput); +# endif + switch (yytype) + { + default: + break; + } +} + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (yytype < YYNTOKENS) + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + else + YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + + yy_symbol_value_print (yyoutput, yytype, yyvaluep); + YYFPRINTF (yyoutput, ")"); +} + +/*------------------------------------------------------------------. +| yy_stack_print -- Print the state stack from its BOTTOM up to its | +| TOP (included). | +`------------------------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_stack_print (yytype_int16 *bottom, yytype_int16 *top) +#else +static void +yy_stack_print (bottom, top) + yytype_int16 *bottom; + yytype_int16 *top; +#endif +{ + YYFPRINTF (stderr, "Stack now"); + for (; bottom <= top; ++bottom) + YYFPRINTF (stderr, " %d", *bottom); + YYFPRINTF (stderr, "\n"); +} + +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ +} while (YYID (0)) + + +/*------------------------------------------------. +| Report that the YYRULE is going to be reduced. | +`------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_reduce_print (YYSTYPE *yyvsp, int yyrule) +#else +static void +yy_reduce_print (yyvsp, yyrule) + YYSTYPE *yyvsp; + int yyrule; +#endif +{ + int yynrhs = yyr2[yyrule]; + int yyi; + unsigned long int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", + yyrule - 1, yylno); + /* The symbols being reduced. */ + for (yyi = 0; yyi < yynrhs; yyi++) + { + fprintf (stderr, " $%d = ", yyi + 1); + yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], + &(yyvsp[(yyi + 1) - (yynrhs)]) + ); + fprintf (stderr, "\n"); + } +} + +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ + yy_reduce_print (yyvsp, Rule); \ +} while (YYID (0)) + +/* Nonzero means print parse trace. It is left uninitialized so that + multiple parsers can coexist. */ +int yydebug; +#else /* !YYDEBUG */ +# define YYDPRINTF(Args) +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YY_STACK_PRINT(Bottom, Top) +# define YY_REDUCE_PRINT(Rule) +#endif /* !YYDEBUG */ + + +/* YYINITDEPTH -- initial size of the parser's stacks. */ +#ifndef YYINITDEPTH +# define YYINITDEPTH 200 +#endif + +/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only + if the built-in stack extension method is used). + + Do not make this value too large; the results are undefined if + YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + evaluated with infinite-precision integer arithmetic. */ + +#ifndef YYMAXDEPTH +# define YYMAXDEPTH 10000 +#endif + + + +#if YYERROR_VERBOSE + +# ifndef yystrlen +# if defined __GLIBC__ && defined _STRING_H +# define yystrlen strlen +# else +/* Return the length of YYSTR. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static YYSIZE_T +yystrlen (const char *yystr) +#else +static YYSIZE_T +yystrlen (yystr) + const char *yystr; +#endif +{ + YYSIZE_T yylen; + for (yylen = 0; yystr[yylen]; yylen++) + continue; + return yylen; +} +# endif +# endif + +# ifndef yystpcpy +# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE +# define yystpcpy stpcpy +# else +/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in + YYDEST. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static char * +yystpcpy (char *yydest, const char *yysrc) +#else +static char * +yystpcpy (yydest, yysrc) + char *yydest; + const char *yysrc; +#endif +{ + char *yyd = yydest; + const char *yys = yysrc; + + while ((*yyd++ = *yys++) != '\0') + continue; + + return yyd - 1; +} +# endif +# endif + +# ifndef yytnamerr +/* Copy to YYRES the contents of YYSTR after stripping away unnecessary + quotes and backslashes, so that it's suitable for yyerror. The + heuristic is that double-quoting is unnecessary unless the string + contains an apostrophe, a comma, or backslash (other than + backslash-backslash). YYSTR is taken from yytname. If YYRES is + null, do not copy; instead, return the length of what the result + would have been. */ +static YYSIZE_T +yytnamerr (char *yyres, const char *yystr) +{ + if (*yystr == '"') + { + YYSIZE_T yyn = 0; + char const *yyp = yystr; + + for (;;) + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; + + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; + + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } + do_not_strip_quotes: ; + } + + if (! yyres) + return yystrlen (yystr); + + return yystpcpy (yyres, yystr) - yyres; +} +# endif + +/* Copy into YYRESULT an error message about the unexpected token + YYCHAR while in state YYSTATE. Return the number of bytes copied, + including the terminating null byte. If YYRESULT is null, do not + copy anything; just return the number of bytes that would be + copied. As a special case, return 0 if an ordinary "syntax error" + message will do. Return YYSIZE_MAXIMUM if overflow occurs during + size calculation. */ +static YYSIZE_T +yysyntax_error (char *yyresult, int yystate, int yychar) +{ + int yyn = yypact[yystate]; + + if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) + return 0; + else + { + int yytype = YYTRANSLATE (yychar); + YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); + YYSIZE_T yysize = yysize0; + YYSIZE_T yysize1; + int yysize_overflow = 0; + enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; + char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + int yyx; + +# if 0 + /* This is so xgettext sees the translatable formats that are + constructed on the fly. */ + YY_("syntax error, unexpected %s"); + YY_("syntax error, unexpected %s, expecting %s"); + YY_("syntax error, unexpected %s, expecting %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); +# endif + char *yyfmt; + char const *yyf; + static char const yyunexpected[] = "syntax error, unexpected %s"; + static char const yyexpecting[] = ", expecting %s"; + static char const yyor[] = " or %s"; + char yyformat[sizeof yyunexpected + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; + char const *yyprefix = yyexpecting; + + /* Start YYX at -YYN if negative to avoid negative indexes in + YYCHECK. */ + int yyxbegin = yyn < 0 ? -yyn : 0; + + /* Stay within bounds of both yycheck and yytname. */ + int yychecklim = YYLAST - yyn + 1; + int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; + int yycount = 1; + + yyarg[0] = yytname[yytype]; + yyfmt = yystpcpy (yyformat, yyunexpected); + + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } + + yyf = YY_(yyformat); + yysize1 = yysize + yystrlen (yyf); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + + if (yysize_overflow) + return YYSIZE_MAXIMUM; + + if (yyresult) + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yyresult; + int yyi = 0; + while ((*yyp = *yyf) != '\0') + { + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } + } + } + return yysize; + } +} +#endif /* YYERROR_VERBOSE */ + + +/*-----------------------------------------------. +| Release the memory associated to this symbol. | +`-----------------------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +#else +static void +yydestruct (yymsg, yytype, yyvaluep) + const char *yymsg; + int yytype; + YYSTYPE *yyvaluep; +#endif +{ + YYUSE (yyvaluep); + + if (!yymsg) + yymsg = "Deleting"; + YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); + + switch (yytype) + { + + default: + break; + } +} + + +/* Prevent warnings from -Wmissing-prototypes. */ + +#ifdef YYPARSE_PARAM +#if defined __STDC__ || defined __cplusplus +int yyparse (void *YYPARSE_PARAM); +#else +int yyparse (); +#endif +#else /* ! YYPARSE_PARAM */ +#if defined __STDC__ || defined __cplusplus +int yyparse (void); +#else +int yyparse (); +#endif +#endif /* ! YYPARSE_PARAM */ + + + +/* The look-ahead symbol. */ +int yychar; + +/* The semantic value of the look-ahead symbol. */ +YYSTYPE yylval; + +/* Number of syntax errors so far. */ +int yynerrs; + + + +/*----------. +| yyparse. | +`----------*/ + +#ifdef YYPARSE_PARAM +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void *YYPARSE_PARAM) +#else +int +yyparse (YYPARSE_PARAM) + void *YYPARSE_PARAM; +#endif +#else /* ! YYPARSE_PARAM */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void) +#else +int +yyparse () + +#endif +#endif +{ + + int yystate; + int yyn; + int yyresult; + /* Number of tokens to shift before error messages enabled. */ + int yyerrstatus; + /* Look-ahead token as an internal (translated) token number. */ + int yytoken = 0; +#if YYERROR_VERBOSE + /* Buffer for error messages, and its allocated size. */ + char yymsgbuf[128]; + char *yymsg = yymsgbuf; + YYSIZE_T yymsg_alloc = sizeof yymsgbuf; +#endif + + /* Three stacks and their tools: + `yyss': related to states, + `yyvs': related to semantic values, + `yyls': related to locations. + + Refer to the stacks thru separate pointers, to allow yyoverflow + to reallocate them elsewhere. */ + + /* The state stack. */ + yytype_int16 yyssa[YYINITDEPTH]; + yytype_int16 *yyss = yyssa; + yytype_int16 *yyssp; + + /* The semantic value stack. */ + YYSTYPE yyvsa[YYINITDEPTH]; + YYSTYPE *yyvs = yyvsa; + YYSTYPE *yyvsp; + + + +#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) + + YYSIZE_T yystacksize = YYINITDEPTH; + + /* The variables used to return semantic value and location from the + action routines. */ + YYSTYPE yyval; + + + /* The number of symbols on the RHS of the reduced rule. + Keep to zero when no symbol should be popped. */ + int yylen = 0; + + YYDPRINTF ((stderr, "Starting parse\n")); + + yystate = 0; + yyerrstatus = 0; + yynerrs = 0; + yychar = YYEMPTY; /* Cause a token to be read. */ + + /* Initialize stack pointers. + Waste one element of value and location stack + so that they stay on the same level as the state stack. + The wasted elements are never initialized. */ + + yyssp = yyss; + yyvsp = yyvs; + + goto yysetstate; + +/*------------------------------------------------------------. +| yynewstate -- Push a new state, which is found in yystate. | +`------------------------------------------------------------*/ + yynewstate: + /* In all cases, when you get here, the value and location stacks + have just been pushed. So pushing a state here evens the stacks. */ + yyssp++; + + yysetstate: + *yyssp = yystate; + + if (yyss + yystacksize - 1 <= yyssp) + { + /* Get the current used size of the three stacks, in elements. */ + YYSIZE_T yysize = yyssp - yyss + 1; + +#ifdef yyoverflow + { + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + yytype_int16 *yyss1 = yyss; + + + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), + + &yystacksize); + + yyss = yyss1; + yyvs = yyvs1; + } +#else /* no yyoverflow */ +# ifndef YYSTACK_RELOCATE + goto yyexhaustedlab; +# else + /* Extend the stack our own way. */ + if (YYMAXDEPTH <= yystacksize) + goto yyexhaustedlab; + yystacksize *= 2; + if (YYMAXDEPTH < yystacksize) + yystacksize = YYMAXDEPTH; + + { + yytype_int16 *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss); + YYSTACK_RELOCATE (yyvs); + +# undef YYSTACK_RELOCATE + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); + } +# endif +#endif /* no yyoverflow */ + + yyssp = yyss + yysize - 1; + yyvsp = yyvs + yysize - 1; + + + YYDPRINTF ((stderr, "Stack size increased to %lu\n", + (unsigned long int) yystacksize)); + + if (yyss + yystacksize - 1 <= yyssp) + YYABORT; + } + + YYDPRINTF ((stderr, "Entering state %d\n", yystate)); + + goto yybackup; + +/*-----------. +| yybackup. | +`-----------*/ +yybackup: + + /* Do appropriate processing given the current state. Read a + look-ahead token if we need one and don't already have one. */ + + /* First try to decide what to do without reference to look-ahead token. */ + yyn = yypact[yystate]; + if (yyn == YYPACT_NINF) + goto yydefault; + + /* Not known => get a look-ahead token if don't already have one. */ + + /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ + if (yychar == YYEMPTY) + { + YYDPRINTF ((stderr, "Reading a token: ")); + yychar = YYLEX; + } + + if (yychar <= YYEOF) + { + yychar = yytoken = YYEOF; + YYDPRINTF ((stderr, "Now at end of input.\n")); + } + else + { + yytoken = YYTRANSLATE (yychar); + YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + } + + /* If the proper action on seeing token YYTOKEN is to reduce or to + detect an error, take that action. */ + yyn += yytoken; + if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) + goto yydefault; + yyn = yytable[yyn]; + if (yyn <= 0) + { + if (yyn == 0 || yyn == YYTABLE_NINF) + goto yyerrlab; + yyn = -yyn; + goto yyreduce; + } + + if (yyn == YYFINAL) + YYACCEPT; + + /* Count tokens shifted since error; after three, turn off error + status. */ + if (yyerrstatus) + yyerrstatus--; + + /* Shift the look-ahead token. */ + YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + + /* Discard the shifted token unless it is eof. */ + if (yychar != YYEOF) + yychar = YYEMPTY; + + yystate = yyn; + *++yyvsp = yylval; + + goto yynewstate; + + +/*-----------------------------------------------------------. +| yydefault -- do the default action for the current state. | +`-----------------------------------------------------------*/ +yydefault: + yyn = yydefact[yystate]; + if (yyn == 0) + goto yyerrlab; + goto yyreduce; + + +/*-----------------------------. +| yyreduce -- Do a reduction. | +`-----------------------------*/ +yyreduce: + /* yyn is the number of a rule to reduce with. */ + yylen = yyr2[yyn]; + + /* If YYLEN is nonzero, implement the default value of the action: + `$$ = $1'. + + Otherwise, the following line sets YYVAL to garbage. + This behavior is undocumented and Bison + users should not rely upon it. Assigning to YYVAL + unconditionally makes the parser a bit smaller, and it avoids a + GCC warning that YYVAL may be used uninitialized. */ + yyval = yyvsp[1-yylen]; + + + YY_REDUCE_PRINT (yyn); + switch (yyn) + { + case 4: +#line 140 "deffilep.y" + { def_image_name ((yyvsp[(2) - (3)].id), (yyvsp[(3) - (3)].number), 0); } + break; + + case 5: +#line 141 "deffilep.y" + { def_image_name ((yyvsp[(2) - (3)].id), (yyvsp[(3) - (3)].number), 1); } + break; + + case 6: +#line 142 "deffilep.y" + { def_description ((yyvsp[(2) - (2)].id));} + break; + + case 7: +#line 143 "deffilep.y" + { def_stacksize ((yyvsp[(2) - (3)].number), (yyvsp[(3) - (3)].number));} + break; + + case 8: +#line 144 "deffilep.y" + { def_heapsize ((yyvsp[(2) - (3)].number), (yyvsp[(3) - (3)].number));} + break; + + case 9: +#line 145 "deffilep.y" + { def_section ("CODE", (yyvsp[(2) - (2)].number));} + break; + + case 10: +#line 146 "deffilep.y" + { def_section ("DATA", (yyvsp[(2) - (2)].number));} + break; + + case 14: +#line 150 "deffilep.y" + { def_version ((yyvsp[(2) - (2)].number), 0);} + break; + + case 15: +#line 151 "deffilep.y" + { def_version ((yyvsp[(2) - (4)].number), (yyvsp[(4) - (4)].number));} + break; + + case 16: +#line 152 "deffilep.y" + { def_directive ((yyvsp[(2) - (2)].id));} + break; + + case 17: +#line 153 "deffilep.y" + { def_aligncomm ((yyvsp[(2) - (4)].id), (yyvsp[(4) - (4)].number));} + break; + + case 21: +#line 168 "deffilep.y" + { def_exports ((yyvsp[(1) - (7)].id), (yyvsp[(2) - (7)].id), (yyvsp[(3) - (7)].number), (yyvsp[(5) - (7)].number), (yyvsp[(7) - (7)].id)); } + break; + + case 22: +#line 174 "deffilep.y" + { (yyval.number) = (yyvsp[(1) - (3)].number) | (yyvsp[(3) - (3)].number); } + break; + + case 23: +#line 175 "deffilep.y" + { (yyval.number) = 0; } + break; + + case 24: +#line 178 "deffilep.y" + { (yyval.number) = 1; } + break; + + case 25: +#line 179 "deffilep.y" + { (yyval.number) = 1; } + break; + + case 26: +#line 180 "deffilep.y" + { (yyval.number) = 2; } + break; + + case 27: +#line 181 "deffilep.y" + { (yyval.number) = 2; } + break; + + case 28: +#line 182 "deffilep.y" + { (yyval.number) = 4; } + break; + + case 29: +#line 183 "deffilep.y" + { (yyval.number) = 4; } + break; + + case 30: +#line 184 "deffilep.y" + { (yyval.number) = 8; } + break; + + case 31: +#line 185 "deffilep.y" + { (yyval.number) = 8; } + break; + + case 34: +#line 194 "deffilep.y" + { def_import ((yyvsp[(1) - (8)].id), (yyvsp[(3) - (8)].id), (yyvsp[(5) - (8)].id), (yyvsp[(7) - (8)].id), -1, (yyvsp[(8) - (8)].id)); } + break; + + case 35: +#line 196 "deffilep.y" + { def_import ((yyvsp[(1) - (8)].id), (yyvsp[(3) - (8)].id), (yyvsp[(5) - (8)].id), 0, (yyvsp[(7) - (8)].number), (yyvsp[(8) - (8)].id)); } + break; + + case 36: +#line 198 "deffilep.y" + { def_import ((yyvsp[(1) - (6)].id), (yyvsp[(3) - (6)].id), 0, (yyvsp[(5) - (6)].id), -1, (yyvsp[(6) - (6)].id)); } + break; + + case 37: +#line 200 "deffilep.y" + { def_import ((yyvsp[(1) - (6)].id), (yyvsp[(3) - (6)].id), 0, 0, (yyvsp[(5) - (6)].number), (yyvsp[(6) - (6)].id)); } + break; + + case 38: +#line 202 "deffilep.y" + { def_import( 0, (yyvsp[(1) - (6)].id), (yyvsp[(3) - (6)].id), (yyvsp[(5) - (6)].id), -1, (yyvsp[(6) - (6)].id)); } + break; + + case 39: +#line 204 "deffilep.y" + { def_import ( 0, (yyvsp[(1) - (4)].id), 0, (yyvsp[(3) - (4)].id), -1, (yyvsp[(4) - (4)].id)); } + break; + + case 42: +#line 213 "deffilep.y" + { def_section ((yyvsp[(1) - (2)].id), (yyvsp[(2) - (2)].number));} + break; + + case 43: +#line 214 "deffilep.y" + { def_section_alt ((yyvsp[(1) - (2)].id), (yyvsp[(2) - (2)].id));} + break; + + case 44: +#line 218 "deffilep.y" + { (yyval.number) = (yyvsp[(1) - (3)].number) | (yyvsp[(3) - (3)].number); } + break; + + case 45: +#line 219 "deffilep.y" + { (yyval.number) = (yyvsp[(1) - (1)].number); } + break; + + case 48: +#line 226 "deffilep.y" + { (yyval.number)=(yyvsp[(2) - (2)].number);} + break; + + case 49: +#line 227 "deffilep.y" + { (yyval.number)=-1;} + break; + + case 50: +#line 231 "deffilep.y" + { (yyval.number) = 1;} + break; + + case 51: +#line 232 "deffilep.y" + { (yyval.number) = 2;} + break; + + case 52: +#line 233 "deffilep.y" + { (yyval.number)=4;} + break; + + case 53: +#line 234 "deffilep.y" + { (yyval.number)=8;} + break; + + case 54: +#line 237 "deffilep.y" + { (yyval.id) = (yyvsp[(1) - (1)].id); } + break; + + case 55: +#line 239 "deffilep.y" + { + char *name = def_pool_alloc (strlen ((yyvsp[(2) - (2)].id)) + 2); + sprintf (name, ".%s", (yyvsp[(2) - (2)].id)); + (yyval.id) = name; + } + break; + + case 56: +#line 245 "deffilep.y" + { + char *name = def_pool_alloc (strlen ((yyvsp[(1) - (3)].id)) + 1 + strlen ((yyvsp[(3) - (3)].id)) + 1); + sprintf (name, "%s.%s", (yyvsp[(1) - (3)].id), (yyvsp[(3) - (3)].id)); + (yyval.id) = name; + } + break; + + case 57: +#line 250 "deffilep.y" + { (yyval.id) = ""; } + break; + + case 58: +#line 253 "deffilep.y" + { (yyval.id) = (yyvsp[(2) - (2)].id); } + break; + + case 59: +#line 254 "deffilep.y" + { (yyval.id) = 0; } + break; + + case 60: +#line 258 "deffilep.y" + { (yyval.number) = (yyvsp[(2) - (2)].number);} + break; + + case 61: +#line 259 "deffilep.y" + { (yyval.number) = -1;} + break; + + case 62: +#line 263 "deffilep.y" + { (yyval.id) = (yyvsp[(2) - (2)].id); } + break; + + case 63: +#line 264 "deffilep.y" + { (yyval.id) = 0; } + break; + + case 64: +#line 267 "deffilep.y" + { (yyval.number) = (yyvsp[(3) - (3)].number);} + break; + + case 65: +#line 268 "deffilep.y" + { (yyval.number) = -1;} + break; + + case 66: +#line 271 "deffilep.y" + { (yyval.id) = (yyvsp[(1) - (1)].id); } + break; + + case 67: +#line 273 "deffilep.y" + { + char *name = def_pool_alloc (strlen ((yyvsp[(2) - (2)].id)) + 2); + sprintf (name, ".%s", (yyvsp[(2) - (2)].id)); + (yyval.id) = name; + } + break; + + case 68: +#line 279 "deffilep.y" + { + char *name = def_pool_alloc (strlen ((yyvsp[(1) - (3)].id)) + 1 + strlen ((yyvsp[(3) - (3)].id)) + 1); + sprintf (name, "%s.%s", (yyvsp[(1) - (3)].id), (yyvsp[(3) - (3)].id)); + (yyval.id) = name; + } + break; + + case 69: +#line 286 "deffilep.y" + { (yyval.id) = (yyvsp[(1) - (1)].id); } + break; + + case 70: +#line 288 "deffilep.y" + { + char *id = def_pool_alloc (strlen ((yyvsp[(2) - (2)].id)) + 2); + sprintf (id, ".%s", (yyvsp[(2) - (2)].id)); + (yyval.id) = id; + } + break; + + case 71: +#line 294 "deffilep.y" + { + char *id = def_pool_alloc (strlen ((yyvsp[(1) - (4)].id)) + 1 + strlen ((yyvsp[(3) - (4)].digits)) + strlen ((yyvsp[(4) - (4)].id)) + 1); + sprintf (id, "%s.%s%s", (yyvsp[(1) - (4)].id), (yyvsp[(3) - (4)].digits), (yyvsp[(4) - (4)].id)); + (yyval.id) = id; + } + break; + + case 72: +#line 301 "deffilep.y" + { (yyval.digits) = (yyvsp[(1) - (1)].digits); } + break; + + case 73: +#line 302 "deffilep.y" + { (yyval.digits) = ""; } + break; + + case 74: +#line 305 "deffilep.y" + { (yyval.id) = (yyvsp[(1) - (1)].id); } + break; + + case 75: +#line 306 "deffilep.y" + { (yyval.id) = ""; } + break; + + case 76: +#line 309 "deffilep.y" + { (yyval.number) = strtoul ((yyvsp[(1) - (1)].digits), 0, 0); } + break; + + +/* Line 1267 of yacc.c. */ +#line 1924 "deffilep.c" + default: break; + } + YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); + + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + + *++yyvsp = yyval; + + + /* Now `shift' the result of the reduction. Determine what state + that goes to, based on the state we popped back to and the rule + number reduced by. */ + + yyn = yyr1[yyn]; + + yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; + if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yytable[yystate]; + else + yystate = yydefgoto[yyn - YYNTOKENS]; + + goto yynewstate; + + +/*------------------------------------. +| yyerrlab -- here on detecting error | +`------------------------------------*/ +yyerrlab: + /* If not already recovering from an error, report this error. */ + if (!yyerrstatus) + { + ++yynerrs; +#if ! YYERROR_VERBOSE + yyerror (YY_("syntax error")); +#else + { + YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); + if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) + { + YYSIZE_T yyalloc = 2 * yysize; + if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) + yyalloc = YYSTACK_ALLOC_MAXIMUM; + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); + yymsg = (char *) YYSTACK_ALLOC (yyalloc); + if (yymsg) + yymsg_alloc = yyalloc; + else + { + yymsg = yymsgbuf; + yymsg_alloc = sizeof yymsgbuf; + } + } + + if (0 < yysize && yysize <= yymsg_alloc) + { + (void) yysyntax_error (yymsg, yystate, yychar); + yyerror (yymsg); + } + else + { + yyerror (YY_("syntax error")); + if (yysize != 0) + goto yyexhaustedlab; + } + } +#endif + } + + + + if (yyerrstatus == 3) + { + /* If just tried and failed to reuse look-ahead token after an + error, discard it. */ + + if (yychar <= YYEOF) + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } + else + { + yydestruct ("Error: discarding", + yytoken, &yylval); + yychar = YYEMPTY; + } + } + + /* Else will try to reuse look-ahead token after shifting the error + token. */ + goto yyerrlab1; + + +/*---------------------------------------------------. +| yyerrorlab -- error raised explicitly by YYERROR. | +`---------------------------------------------------*/ +yyerrorlab: + + /* Pacify compilers like GCC when the user code never invokes + YYERROR and the label yyerrorlab therefore never appears in user + code. */ + if (/*CONSTCOND*/ 0) + goto yyerrorlab; + + /* Do not reclaim the symbols of the rule which action triggered + this YYERROR. */ + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + yystate = *yyssp; + goto yyerrlab1; + + +/*-------------------------------------------------------------. +| yyerrlab1 -- common code for both syntax error and YYERROR. | +`-------------------------------------------------------------*/ +yyerrlab1: + yyerrstatus = 3; /* Each real token shifted decrements this. */ + + for (;;) + { + yyn = yypact[yystate]; + if (yyn != YYPACT_NINF) + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } + + /* Pop the current state because it cannot handle the error token. */ + if (yyssp == yyss) + YYABORT; + + + yydestruct ("Error: popping", + yystos[yystate], yyvsp); + YYPOPSTACK (1); + yystate = *yyssp; + YY_STACK_PRINT (yyss, yyssp); + } + + if (yyn == YYFINAL) + YYACCEPT; + + *++yyvsp = yylval; + + + /* Shift the error token. */ + YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); + + yystate = yyn; + goto yynewstate; + + +/*-------------------------------------. +| yyacceptlab -- YYACCEPT comes here. | +`-------------------------------------*/ +yyacceptlab: + yyresult = 0; + goto yyreturn; + +/*-----------------------------------. +| yyabortlab -- YYABORT comes here. | +`-----------------------------------*/ +yyabortlab: + yyresult = 1; + goto yyreturn; + +#ifndef yyoverflow +/*-------------------------------------------------. +| yyexhaustedlab -- memory exhaustion comes here. | +`-------------------------------------------------*/ +yyexhaustedlab: + yyerror (YY_("memory exhausted")); + yyresult = 2; + /* Fall through. */ +#endif + +yyreturn: + if (yychar != YYEOF && yychar != YYEMPTY) + yydestruct ("Cleanup: discarding lookahead", + yytoken, &yylval); + /* Do not reclaim the symbols of the rule which action triggered + this YYABORT or YYACCEPT. */ + YYPOPSTACK (yylen); + YY_STACK_PRINT (yyss, yyssp); + while (yyssp != yyss) + { + yydestruct ("Cleanup: popping", + yystos[*yyssp], yyvsp); + YYPOPSTACK (1); + } +#ifndef yyoverflow + if (yyss != yyssa) + YYSTACK_FREE (yyss); +#endif +#if YYERROR_VERBOSE + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); +#endif + /* Make sure YYID is used. */ + return YYID (yyresult); +} + + +#line 311 "deffilep.y" + + +/***************************************************************************** + API + *****************************************************************************/ + +static FILE *the_file; +static const char *def_filename; +static int linenumber; +static def_file *def; +static int saw_newline; + +struct directive + { + struct directive *next; + char *name; + int len; + }; + +static struct directive *directives = 0; + +def_file * +def_file_empty (void) +{ + def_file *rv = xmalloc (sizeof (def_file)); + memset (rv, 0, sizeof (def_file)); + rv->is_dll = -1; + rv->base_address = (bfd_vma) -1; + rv->stack_reserve = rv->stack_commit = -1; + rv->heap_reserve = rv->heap_commit = -1; + rv->version_major = rv->version_minor = -1; + return rv; +} + +def_file * +def_file_parse (const char *filename, def_file *add_to) +{ + struct directive *d; + + the_file = fopen (filename, "r"); + def_filename = filename; + linenumber = 1; + if (!the_file) + { + perror (filename); + return 0; + } + if (add_to) + { + def = add_to; + } + else + { + def = def_file_empty (); + } + + saw_newline = 1; + if (def_parse ()) + { + def_file_free (def); + fclose (the_file); + def_pool_free (); + return 0; + } + + fclose (the_file); + + while ((d = directives) != NULL) + { +#if TRACE + printf ("Adding directive %08x `%s'\n", d->name, d->name); +#endif + def_file_add_directive (def, d->name, d->len); + directives = d->next; + free (d->name); + free (d); + } + def_pool_free (); + + return def; +} + +void +def_file_free (def_file *fdef) +{ + int i; + + if (!fdef) + return; + if (fdef->name) + free (fdef->name); + if (fdef->description) + free (fdef->description); + + if (fdef->section_defs) + { + for (i = 0; i < fdef->num_section_defs; i++) + { + if (fdef->section_defs[i].name) + free (fdef->section_defs[i].name); + if (fdef->section_defs[i].class) + free (fdef->section_defs[i].class); + } + free (fdef->section_defs); + } + + if (fdef->exports) + { + for (i = 0; i < fdef->num_exports; i++) + { + if (fdef->exports[i].internal_name + && fdef->exports[i].internal_name != fdef->exports[i].name) + free (fdef->exports[i].internal_name); + if (fdef->exports[i].name) + free (fdef->exports[i].name); + if (fdef->exports[i].its_name) + free (fdef->exports[i].its_name); + } + free (fdef->exports); + } + + if (fdef->imports) + { + for (i = 0; i < fdef->num_imports; i++) + { + if (fdef->imports[i].internal_name + && fdef->imports[i].internal_name != fdef->imports[i].name) + free (fdef->imports[i].internal_name); + if (fdef->imports[i].name) + free (fdef->imports[i].name); + if (fdef->imports[i].its_name) + free (fdef->imports[i].its_name); + } + free (fdef->imports); + } + + while (fdef->modules) + { + def_file_module *m = fdef->modules; + + fdef->modules = fdef->modules->next; + free (m); + } + + while (fdef->aligncomms) + { + def_file_aligncomm *c = fdef->aligncomms; + + fdef->aligncomms = fdef->aligncomms->next; + free (c->symbol_name); + free (c); + } + + free (fdef); +} + +#ifdef DEF_FILE_PRINT +void +def_file_print (FILE *file, def_file *fdef) +{ + int i; + + fprintf (file, ">>>> def_file at 0x%08x\n", fdef); + if (fdef->name) + fprintf (file, " name: %s\n", fdef->name ? fdef->name : "(unspecified)"); + if (fdef->is_dll != -1) + fprintf (file, " is dll: %s\n", fdef->is_dll ? "yes" : "no"); + if (fdef->base_address != (bfd_vma) -1) + fprintf (file, " base address: 0x%08x\n", fdef->base_address); + if (fdef->description) + fprintf (file, " description: `%s'\n", fdef->description); + if (fdef->stack_reserve != -1) + fprintf (file, " stack reserve: 0x%08x\n", fdef->stack_reserve); + if (fdef->stack_commit != -1) + fprintf (file, " stack commit: 0x%08x\n", fdef->stack_commit); + if (fdef->heap_reserve != -1) + fprintf (file, " heap reserve: 0x%08x\n", fdef->heap_reserve); + if (fdef->heap_commit != -1) + fprintf (file, " heap commit: 0x%08x\n", fdef->heap_commit); + + if (fdef->num_section_defs > 0) + { + fprintf (file, " section defs:\n"); + + for (i = 0; i < fdef->num_section_defs; i++) + { + fprintf (file, " name: `%s', class: `%s', flags:", + fdef->section_defs[i].name, fdef->section_defs[i].class); + if (fdef->section_defs[i].flag_read) + fprintf (file, " R"); + if (fdef->section_defs[i].flag_write) + fprintf (file, " W"); + if (fdef->section_defs[i].flag_execute) + fprintf (file, " X"); + if (fdef->section_defs[i].flag_shared) + fprintf (file, " S"); + fprintf (file, "\n"); + } + } + + if (fdef->num_exports > 0) + { + fprintf (file, " exports:\n"); + + for (i = 0; i < fdef->num_exports; i++) + { + fprintf (file, " name: `%s', int: `%s', ordinal: %d, flags:", + fdef->exports[i].name, fdef->exports[i].internal_name, + fdef->exports[i].ordinal); + if (fdef->exports[i].flag_private) + fprintf (file, " P"); + if (fdef->exports[i].flag_constant) + fprintf (file, " C"); + if (fdef->exports[i].flag_noname) + fprintf (file, " N"); + if (fdef->exports[i].flag_data) + fprintf (file, " D"); + fprintf (file, "\n"); + } + } + + if (fdef->num_imports > 0) + { + fprintf (file, " imports:\n"); + + for (i = 0; i < fdef->num_imports; i++) + { + fprintf (file, " int: %s, from: `%s', name: `%s', ordinal: %d\n", + fdef->imports[i].internal_name, + fdef->imports[i].module, + fdef->imports[i].name, + fdef->imports[i].ordinal); + } + } + + if (fdef->version_major != -1) + fprintf (file, " version: %d.%d\n", fdef->version_major, fdef->version_minor); + + fprintf (file, "<<<< def_file at 0x%08x\n", fdef); +} +#endif + +/* Helper routine to check for identity of string pointers, + which might be NULL. */ + +static int +are_names_equal (const char *s1, const char *s2) +{ + if (!s1 && !s2) + return 0; + if (!s1 || !s2) + return (!s1 ? -1 : 1); + return strcmp (s1, s2); +} + +static int +cmp_export_elem (const def_file_export *e, const char *ex_name, + const char *in_name, const char *its_name, + int ord) +{ + int r; + + if ((r = are_names_equal (ex_name, e->name)) != 0) + return r; + if ((r = are_names_equal (in_name, e->internal_name)) != 0) + return r; + if ((r = are_names_equal (its_name, e->its_name)) != 0) + return r; + return (ord - e->ordinal); +} + +/* Search the position of the identical element, or returns the position + of the next higher element. If last valid element is smaller, then MAX + is returned. */ + +static int +find_export_in_list (def_file_export *b, int max, + const char *ex_name, const char *in_name, + const char *its_name, int ord, int *is_ident) +{ + int e, l, r, p; + + *is_ident = 0; + if (!max) + return 0; + if ((e = cmp_export_elem (b, ex_name, in_name, its_name, ord)) <= 0) + return 0; + if (max == 1) + return 1; + if ((e = cmp_export_elem (b + (max - 1), ex_name, in_name, its_name, ord)) > 0) + return max; + else if (!e || max == 2) + return max - 1; + l = 0; r = max - 1; + while (l < r) + { + p = (l + r) / 2; + e = cmp_export_elem (b + p, ex_name, in_name, its_name, ord); + if (!e) + { + *is_ident = 1; + return p; + } + else if (e < 0) + r = p - 1; + else if (e > 0) + l = p + 1; + } + if ((e = cmp_export_elem (b + l, ex_name, in_name, its_name, ord)) > 0) + ++l; + else if (!e) + *is_ident = 1; + return l; +} + +def_file_export * +def_file_add_export (def_file *fdef, + const char *external_name, + const char *internal_name, + int ordinal, + const char *its_name, + int *is_dup) +{ + def_file_export *e; + int pos; + int max_exports = ROUND_UP(fdef->num_exports, 32); + + if (internal_name && !external_name) + external_name = internal_name; + if (external_name && !internal_name) + internal_name = external_name; + + /* We need to avoid duplicates. */ + *is_dup = 0; + pos = find_export_in_list (fdef->exports, fdef->num_exports, + external_name, internal_name, + its_name, ordinal, is_dup); + + if (*is_dup != 0) + return (fdef->exports + pos); + + if (fdef->num_exports >= max_exports) + { + max_exports = ROUND_UP(fdef->num_exports + 1, 32); + if (fdef->exports) + fdef->exports = xrealloc (fdef->exports, + max_exports * sizeof (def_file_export)); + else + fdef->exports = xmalloc (max_exports * sizeof (def_file_export)); + } + + e = fdef->exports + pos; + if (pos != fdef->num_exports) + memmove (&e[1], e, (sizeof (def_file_export) * (fdef->num_exports - pos))); + memset (e, 0, sizeof (def_file_export)); + e->name = xstrdup (external_name); + e->internal_name = xstrdup (internal_name); + e->its_name = (its_name ? xstrdup (its_name) : NULL); + e->ordinal = ordinal; + fdef->num_exports++; + return e; +} + +def_file_module * +def_get_module (def_file *fdef, const char *name) +{ + def_file_module *s; + + for (s = fdef->modules; s; s = s->next) + if (strcmp (s->name, name) == 0) + return s; + + return NULL; +} + +static def_file_module * +def_stash_module (def_file *fdef, const char *name) +{ + def_file_module *s; + + if ((s = def_get_module (fdef, name)) != NULL) + return s; + s = xmalloc (sizeof (def_file_module) + strlen (name)); + s->next = fdef->modules; + fdef->modules = s; + s->user_data = 0; + strcpy (s->name, name); + return s; +} + +static int +cmp_import_elem (const def_file_import *e, const char *ex_name, + const char *in_name, const char *module, + int ord) +{ + int r; + + if ((r = are_names_equal (ex_name, e->name)) != 0) + return r; + if ((r = are_names_equal (in_name, e->internal_name)) != 0) + return r; + if (ord != e->ordinal) + return (ord < e->ordinal ? -1 : 1); + return are_names_equal (module, (e->module ? e->module->name : NULL)); +} + +/* Search the position of the identical element, or returns the position + of the next higher element. If last valid element is smaller, then MAX + is returned. */ + +static int +find_import_in_list (def_file_import *b, int max, + const char *ex_name, const char *in_name, + const char *module, int ord, int *is_ident) +{ + int e, l, r, p; + + *is_ident = 0; + if (!max) + return 0; + if ((e = cmp_import_elem (b, ex_name, in_name, module, ord)) <= 0) + return 0; + if (max == 1) + return 1; + if ((e = cmp_import_elem (b + (max - 1), ex_name, in_name, module, ord)) > 0) + return max; + else if (!e || max == 2) + return max - 1; + l = 0; r = max - 1; + while (l < r) + { + p = (l + r) / 2; + e = cmp_import_elem (b + p, ex_name, in_name, module, ord); + if (!e) + { + *is_ident = 1; + return p; + } + else if (e < 0) + r = p - 1; + else if (e > 0) + l = p + 1; + } + if ((e = cmp_import_elem (b + l, ex_name, in_name, module, ord)) > 0) + ++l; + else if (!e) + *is_ident = 1; + return l; +} + +def_file_import * +def_file_add_import (def_file *fdef, + const char *name, + const char *module, + int ordinal, + const char *internal_name, + const char *its_name, + int *is_dup) +{ + def_file_import *i; + int pos; + int max_imports = ROUND_UP (fdef->num_imports, 16); + + /* We need to avoid here duplicates. */ + *is_dup = 0; + pos = find_import_in_list (fdef->imports, fdef->num_imports, + name, + (!internal_name ? name : internal_name), + module, ordinal, is_dup); + if (*is_dup != 0) + return fdef->imports + pos; + + if (fdef->num_imports >= max_imports) + { + max_imports = ROUND_UP (fdef->num_imports+1, 16); + + if (fdef->imports) + fdef->imports = xrealloc (fdef->imports, + max_imports * sizeof (def_file_import)); + else + fdef->imports = xmalloc (max_imports * sizeof (def_file_import)); + } + i = fdef->imports + pos; + if (pos != fdef->num_imports) + memmove (&i[1], i, (sizeof (def_file_import) * (fdef->num_imports - pos))); + memset (i, 0, sizeof (def_file_import)); + if (name) + i->name = xstrdup (name); + if (module) + i->module = def_stash_module (fdef, module); + i->ordinal = ordinal; + if (internal_name) + i->internal_name = xstrdup (internal_name); + else + i->internal_name = i->name; + i->its_name = (its_name ? xstrdup (its_name) : NULL); + fdef->num_imports++; + + return i; +} + +struct +{ + char *param; + int token; +} +diropts[] = +{ + { "-heap", HEAPSIZE }, + { "-stack", STACKSIZE_K }, + { "-attr", SECTIONS }, + { "-export", EXPORTS }, + { "-aligncomm", ALIGNCOMM }, + { 0, 0 } +}; + +void +def_file_add_directive (def_file *my_def, const char *param, int len) +{ + def_file *save_def = def; + const char *pend = param + len; + char * tend = (char *) param; + int i; + + def = my_def; + + while (param < pend) + { + while (param < pend + && (ISSPACE (*param) || *param == '\n' || *param == 0)) + param++; + + if (param == pend) + break; + + /* Scan forward until we encounter any of: + - the end of the buffer + - the start of a new option + - a newline seperating options + - a NUL seperating options. */ + for (tend = (char *) (param + 1); + (tend < pend + && !(ISSPACE (tend[-1]) && *tend == '-') + && *tend != '\n' && *tend != 0); + tend++) + ; + + for (i = 0; diropts[i].param; i++) + { + len = strlen (diropts[i].param); + + if (tend - param >= len + && strncmp (param, diropts[i].param, len) == 0 + && (param[len] == ':' || param[len] == ' ')) + { + lex_parse_string_end = tend; + lex_parse_string = param + len + 1; + lex_forced_token = diropts[i].token; + saw_newline = 0; + if (def_parse ()) + continue; + break; + } + } + + if (!diropts[i].param) + { + char saved; + + saved = * tend; + * tend = 0; + /* xgettext:c-format */ + einfo (_("Warning: .drectve `%s' unrecognized\n"), param); + * tend = saved; + } + + lex_parse_string = 0; + param = tend; + } + + def = save_def; + def_pool_free (); +} + +/* Parser Callbacks. */ + +static void +def_image_name (const char *name, int base, int is_dll) +{ + /* If a LIBRARY or NAME statement is specified without a name, there is nothing + to do here. We retain the output filename specified on command line. */ + if (*name) + { + const char* image_name = lbasename (name); + + if (image_name != name) + einfo ("%s:%d: Warning: path components stripped from %s, '%s'\n", + def_filename, linenumber, is_dll ? "LIBRARY" : "NAME", + name); + if (def->name) + free (def->name); + /* Append the default suffix, if none specified. */ + if (strchr (image_name, '.') == 0) + { + const char * suffix = is_dll ? ".dll" : ".exe"; + + def->name = xmalloc (strlen (image_name) + strlen (suffix) + 1); + sprintf (def->name, "%s%s", image_name, suffix); + } + else + def->name = xstrdup (image_name); + } + + /* Honor a BASE address statement, even if LIBRARY string is empty. */ + def->base_address = base; + def->is_dll = is_dll; +} + +static void +def_description (const char *text) +{ + int len = def->description ? strlen (def->description) : 0; + + len += strlen (text) + 1; + if (def->description) + { + def->description = xrealloc (def->description, len); + strcat (def->description, text); + } + else + { + def->description = xmalloc (len); + strcpy (def->description, text); + } +} + +static void +def_stacksize (int reserve, int commit) +{ + def->stack_reserve = reserve; + def->stack_commit = commit; +} + +static void +def_heapsize (int reserve, int commit) +{ + def->heap_reserve = reserve; + def->heap_commit = commit; +} + +static void +def_section (const char *name, int attr) +{ + def_file_section *s; + int max_sections = ROUND_UP (def->num_section_defs, 4); + + if (def->num_section_defs >= max_sections) + { + max_sections = ROUND_UP (def->num_section_defs+1, 4); + + if (def->section_defs) + def->section_defs = xrealloc (def->section_defs, + max_sections * sizeof (def_file_import)); + else + def->section_defs = xmalloc (max_sections * sizeof (def_file_import)); + } + s = def->section_defs + def->num_section_defs; + memset (s, 0, sizeof (def_file_section)); + s->name = xstrdup (name); + if (attr & 1) + s->flag_read = 1; + if (attr & 2) + s->flag_write = 1; + if (attr & 4) + s->flag_execute = 1; + if (attr & 8) + s->flag_shared = 1; + + def->num_section_defs++; +} + +static void +def_section_alt (const char *name, const char *attr) +{ + int aval = 0; + + for (; *attr; attr++) + { + switch (*attr) + { + case 'R': + case 'r': + aval |= 1; + break; + case 'W': + case 'w': + aval |= 2; + break; + case 'X': + case 'x': + aval |= 4; + break; + case 'S': + case 's': + aval |= 8; + break; + } + } + def_section (name, aval); +} + +static void +def_exports (const char *external_name, + const char *internal_name, + int ordinal, + int flags, + const char *its_name) +{ + def_file_export *dfe; + int is_dup = 0; + + if (!internal_name && external_name) + internal_name = external_name; +#if TRACE + printf ("def_exports, ext=%s int=%s\n", external_name, internal_name); +#endif + + dfe = def_file_add_export (def, external_name, internal_name, ordinal, + its_name, &is_dup); + + /* We might check here for flag redefinition and warn. For now we + ignore duplicates silently. */ + if (is_dup) + return; + + if (flags & 1) + dfe->flag_noname = 1; + if (flags & 2) + dfe->flag_constant = 1; + if (flags & 4) + dfe->flag_data = 1; + if (flags & 8) + dfe->flag_private = 1; +} + +static void +def_import (const char *internal_name, + const char *module, + const char *dllext, + const char *name, + int ordinal, + const char *its_name) +{ + char *buf = 0; + const char *ext = dllext ? dllext : "dll"; + int is_dup = 0; + + buf = xmalloc (strlen (module) + strlen (ext) + 2); + sprintf (buf, "%s.%s", module, ext); + module = buf; + + def_file_add_import (def, name, module, ordinal, internal_name, its_name, + &is_dup); + free (buf); +} + +static void +def_version (int major, int minor) +{ + def->version_major = major; + def->version_minor = minor; +} + +static void +def_directive (char *str) +{ + struct directive *d = xmalloc (sizeof (struct directive)); + + d->next = directives; + directives = d; + d->name = xstrdup (str); + d->len = strlen (str); +} + +static void +def_aligncomm (char *str, int align) +{ + def_file_aligncomm *c, *p; + + p = NULL; + c = def->aligncomms; + while (c != NULL) + { + int e = strcmp (c->symbol_name, str); + if (!e) + { + /* Not sure if we want to allow here duplicates with + different alignments, but for now we keep them. */ + e = (int) c->alignment - align; + if (!e) + return; + } + if (e > 0) + break; + c = (p = c)->next; + } + + c = xmalloc (sizeof (def_file_aligncomm)); + c->symbol_name = xstrdup (str); + c->alignment = (unsigned int) align; + if (!p) + { + c->next = def->aligncomms; + def->aligncomms = c; + } + else + { + c->next = p->next; + p->next = c; + } +} + +static int +def_error (const char *err) +{ + einfo ("%P: %s:%d: %s\n", + def_filename ? def_filename : "", linenumber, err); + return 0; +} + + +/* Lexical Scanner. */ + +#undef TRACE +#define TRACE 0 + +/* Never freed, but always reused as needed, so no real leak. */ +static char *buffer = 0; +static int buflen = 0; +static int bufptr = 0; + +static void +put_buf (char c) +{ + if (bufptr == buflen) + { + buflen += 50; /* overly reasonable, eh? */ + if (buffer) + buffer = xrealloc (buffer, buflen + 1); + else + buffer = xmalloc (buflen + 1); + } + buffer[bufptr++] = c; + buffer[bufptr] = 0; /* not optimal, but very convenient. */ +} + +static struct +{ + char *name; + int token; +} +tokens[] = +{ + { "BASE", BASE }, + { "CODE", CODE }, + { "CONSTANT", CONSTANTU }, + { "constant", CONSTANTL }, + { "DATA", DATAU }, + { "data", DATAL }, + { "DESCRIPTION", DESCRIPTION }, + { "DIRECTIVE", DIRECTIVE }, + { "EXECUTE", EXECUTE }, + { "EXPORTS", EXPORTS }, + { "HEAPSIZE", HEAPSIZE }, + { "IMPORTS", IMPORTS }, + { "LIBRARY", LIBRARY }, + { "NAME", NAME }, + { "NONAME", NONAMEU }, + { "noname", NONAMEL }, + { "PRIVATE", PRIVATEU }, + { "private", PRIVATEL }, + { "READ", READ }, + { "SECTIONS", SECTIONS }, + { "SEGMENTS", SECTIONS }, + { "SHARED", SHARED }, + { "STACKSIZE", STACKSIZE_K }, + { "VERSION", VERSIONK }, + { "WRITE", WRITE }, + { 0, 0 } +}; + +static int +def_getc (void) +{ + int rv; + + if (lex_parse_string) + { + if (lex_parse_string >= lex_parse_string_end) + rv = EOF; + else + rv = *lex_parse_string++; + } + else + { + rv = fgetc (the_file); + } + if (rv == '\n') + saw_newline = 1; + return rv; +} + +static int +def_ungetc (int c) +{ + if (lex_parse_string) + { + lex_parse_string--; + return c; + } + else + return ungetc (c, the_file); +} + +static int +def_lex (void) +{ + int c, i, q; + + if (lex_forced_token) + { + i = lex_forced_token; + lex_forced_token = 0; +#if TRACE + printf ("lex: forcing token %d\n", i); +#endif + return i; + } + + c = def_getc (); + + /* Trim leading whitespace. */ + while (c != EOF && (c == ' ' || c == '\t') && saw_newline) + c = def_getc (); + + if (c == EOF) + { +#if TRACE + printf ("lex: EOF\n"); +#endif + return 0; + } + + if (saw_newline && c == ';') + { + do + { + c = def_getc (); + } + while (c != EOF && c != '\n'); + if (c == '\n') + return def_lex (); + return 0; + } + + /* Must be something else. */ + saw_newline = 0; + + if (ISDIGIT (c)) + { + bufptr = 0; + while (c != EOF && (ISXDIGIT (c) || (c == 'x'))) + { + put_buf (c); + c = def_getc (); + } + if (c != EOF) + def_ungetc (c); + yylval.digits = def_pool_strdup (buffer); +#if TRACE + printf ("lex: `%s' returns DIGITS\n", buffer); +#endif + return DIGITS; + } + + if (ISALPHA (c) || strchr ("$:-_?@", c)) + { + bufptr = 0; + q = c; + put_buf (c); + c = def_getc (); + + if (q == '@') + { + if (ISBLANK (c) ) /* '@' followed by whitespace. */ + return (q); + else if (ISDIGIT (c)) /* '@' followed by digit. */ + { + def_ungetc (c); + return (q); + } +#if TRACE + printf ("lex: @ returns itself\n"); +#endif + } + + while (c != EOF && (ISALNUM (c) || strchr ("$:-_?/@<>", c))) + { + put_buf (c); + c = def_getc (); + } + if (c != EOF) + def_ungetc (c); + if (ISALPHA (q)) /* Check for tokens. */ + { + for (i = 0; tokens[i].name; i++) + if (strcmp (tokens[i].name, buffer) == 0) + { +#if TRACE + printf ("lex: `%s' is a string token\n", buffer); +#endif + return tokens[i].token; + } + } +#if TRACE + printf ("lex: `%s' returns ID\n", buffer); +#endif + yylval.id = def_pool_strdup (buffer); + return ID; + } + + if (c == '\'' || c == '"') + { + q = c; + c = def_getc (); + bufptr = 0; + + while (c != EOF && c != q) + { + put_buf (c); + c = def_getc (); + } + yylval.id = def_pool_strdup (buffer); +#if TRACE + printf ("lex: `%s' returns ID\n", buffer); +#endif + return ID; + } + + if ( c == '=') + { + c = def_getc (); + if (c == '=') + { +#if TRACE + printf ("lex: `==' returns EQUAL\n"); +#endif + return EQUAL; + } + def_ungetc (c); +#if TRACE + printf ("lex: `=' returns itself\n"); +#endif + return '='; + } + if (c == '.' || c == ',') + { +#if TRACE + printf ("lex: `%c' returns itself\n", c); +#endif + return c; + } + + if (c == '\n') + { + linenumber++; + saw_newline = 1; + } + + /*printf ("lex: 0x%02x ignored\n", c); */ + return def_lex (); +} + +static char * +def_pool_alloc (size_t sz) +{ + def_pool_str *e; + + e = (def_pool_str *) xmalloc (sizeof (def_pool_str) + sz); + e->next = pool_strs; + pool_strs = e; + return e->data; +} + +static char * +def_pool_strdup (const char *str) +{ + char *s; + size_t len; + if (!str) + return NULL; + len = strlen (str) + 1; + s = def_pool_alloc (len); + memcpy (s, str, len); + return s; +} + +static void +def_pool_free (void) +{ + def_pool_str *p; + while ((p = pool_strs) != NULL) + { + pool_strs = p->next; + free (p); + } +} + diff --git a/ld/deffilep.h b/ld/deffilep.h new file mode 100644 index 0000000..2de6fe9 --- /dev/null +++ b/ld/deffilep.h @@ -0,0 +1,122 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton interface for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + NAME = 258, + LIBRARY = 259, + DESCRIPTION = 260, + STACKSIZE_K = 261, + HEAPSIZE = 262, + CODE = 263, + DATAU = 264, + DATAL = 265, + SECTIONS = 266, + EXPORTS = 267, + IMPORTS = 268, + VERSIONK = 269, + BASE = 270, + CONSTANTU = 271, + CONSTANTL = 272, + PRIVATEU = 273, + PRIVATEL = 274, + ALIGNCOMM = 275, + READ = 276, + WRITE = 277, + EXECUTE = 278, + SHARED = 279, + NONAMEU = 280, + NONAMEL = 281, + DIRECTIVE = 282, + EQUAL = 283, + ID = 284, + DIGITS = 285 + }; +#endif +/* Tokens. */ +#define NAME 258 +#define LIBRARY 259 +#define DESCRIPTION 260 +#define STACKSIZE_K 261 +#define HEAPSIZE 262 +#define CODE 263 +#define DATAU 264 +#define DATAL 265 +#define SECTIONS 266 +#define EXPORTS 267 +#define IMPORTS 268 +#define VERSIONK 269 +#define BASE 270 +#define CONSTANTU 271 +#define CONSTANTL 272 +#define PRIVATEU 273 +#define PRIVATEL 274 +#define ALIGNCOMM 275 +#define READ 276 +#define WRITE 277 +#define EXECUTE 278 +#define SHARED 279 +#define NONAMEU 280 +#define NONAMEL 281 +#define DIRECTIVE 282 +#define EQUAL 283 +#define ID 284 +#define DIGITS 285 + + + + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 114 "deffilep.y" +{ + char *id; + int number; + char *digits; +} +/* Line 1529 of yacc.c. */ +#line 115 "deffilep.h" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + +extern YYSTYPE yylval; + diff --git a/ld/emulparams/elf32_tic6x_elf_be.sh b/ld/emulparams/elf32_tic6x_elf_be.sh new file mode 100644 index 0000000..a393933 --- /dev/null +++ b/ld/emulparams/elf32_tic6x_elf_be.sh @@ -0,0 +1,2 @@ +. ${srcdir}/emulparams/elf32_tic6x_le.sh +OUTPUT_FORMAT="elf32-tic6x-elf-be" diff --git a/ld/emulparams/elf32_tic6x_elf_le.sh b/ld/emulparams/elf32_tic6x_elf_le.sh new file mode 100644 index 0000000..8c86ee4 --- /dev/null +++ b/ld/emulparams/elf32_tic6x_elf_le.sh @@ -0,0 +1,3 @@ +. ${srcdir}/emulparams/elf32_tic6x_le.sh +OUTPUT_FORMAT="elf32-tic6x-elf-le" +BIG_OUTPUT_FORMAT="elf32-tic6x-elf-be" diff --git a/ld/emulparams/elf32_tic6x_linux_be.sh b/ld/emulparams/elf32_tic6x_linux_be.sh new file mode 100644 index 0000000..3133951 --- /dev/null +++ b/ld/emulparams/elf32_tic6x_linux_be.sh @@ -0,0 +1,2 @@ +. ${srcdir}/emulparams/elf32_tic6x_le.sh +OUTPUT_FORMAT="elf32-tic6x-linux-be" diff --git a/ld/emulparams/elf32_tic6x_linux_le.sh b/ld/emulparams/elf32_tic6x_linux_le.sh new file mode 100644 index 0000000..06defa0 --- /dev/null +++ b/ld/emulparams/elf32_tic6x_linux_le.sh @@ -0,0 +1,3 @@ +. ${srcdir}/emulparams/elf32_tic6x_le.sh +OUTPUT_FORMAT="elf32-tic6x-linux-le" +BIG_OUTPUT_FORMAT="elf32-tic6x-linux-be" diff --git a/ld/emulparams/elf32_x86_64.sh b/ld/emulparams/elf32_x86_64.sh index 8895e29..d26a67f 100644 --- a/ld/emulparams/elf32_x86_64.sh +++ b/ld/emulparams/elf32_x86_64.sh @@ -1,3 +1,4 @@ +. ${srcdir}/emulparams/plt_unwind.sh SCRIPT_NAME=elf ELFSIZE=32 OUTPUT_FORMAT="elf32-x86-64" diff --git a/ld/emulparams/elf32ppc.sh b/ld/emulparams/elf32ppc.sh index e638815..8e1a9f3 100644 --- a/ld/emulparams/elf32ppc.sh +++ b/ld/emulparams/elf32ppc.sh @@ -3,6 +3,7 @@ # elf32ppcsim.sh . ${srcdir}/emulparams/elf32ppccommon.sh +. ${srcdir}/emulparams/plt_unwind.sh # Yes, we want duplicate .got and .plt sections. The linker chooses the # appropriate one magically in ppc_after_open DATA_GOT= diff --git a/ld/emulparams/elf32tilegx.sh b/ld/emulparams/elf32tilegx.sh new file mode 100644 index 0000000..0b32262 --- /dev/null +++ b/ld/emulparams/elf32tilegx.sh @@ -0,0 +1,26 @@ +SCRIPT_NAME=elf +OUTPUT_FORMAT="elf32-tilegx" +TEXT_START_ADDR=0x10000 +NO_REL_RELOCS=yes +MAXPAGESIZE="CONSTANT (MAXPAGESIZE)" +COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)" +# See also `include/elf/tilegx.h' +ARCH=tilegx +ALIGNMENT=64 +MACHINE= +NOP=0 +TEMPLATE_NAME=elf32 +GENERATE_SHLIB_SCRIPT=yes +GENERATE_COMBRELOC_SCRIPT=yes +GENERATE_PIE_SCRIPT=yes +NO_SMALL_DATA=yes +SEPARATE_GOTPLT=8 +# Look for 32 bit target libraries in /lib32, /usr/lib32 etc., first. +LIBPATH_SUFFIX=32 +OTHER_SECTIONS=" + /* TILE architecture interrupt vector areas */ + .intrpt0 0xfc000000 : { KEEP(*(.intrpt0)) } + .intrpt1 0xfd000000 : { KEEP(*(.intrpt1)) } + .intrpt2 0xfe000000 : { KEEP(*(.intrpt2)) } + .intrpt3 0xff000000 : { KEEP(*(.intrpt3)) } +" diff --git a/ld/emulparams/elf32tilepro.sh b/ld/emulparams/elf32tilepro.sh new file mode 100644 index 0000000..5fb4443 --- /dev/null +++ b/ld/emulparams/elf32tilepro.sh @@ -0,0 +1,27 @@ +SCRIPT_NAME=elf +if [ -z "$OUTPUT_FORMAT" ]; then + # Allow overriding externally to "elf32-tile64" if desired + OUTPUT_FORMAT=elf32-tilepro +fi +TEXT_START_ADDR=0x10000 +NO_REL_RELOCS=yes +MAXPAGESIZE="CONSTANT (MAXPAGESIZE)" +COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)" +# See also `include/elf/tilepro.h' +ARCH=tilepro +ALIGNMENT=64 +MACHINE= +NOP=0 +TEMPLATE_NAME=elf32 +GENERATE_SHLIB_SCRIPT=yes +GENERATE_COMBRELOC_SCRIPT=yes +GENERATE_PIE_SCRIPT=yes +NO_SMALL_DATA=yes +SEPARATE_GOTPLT=8 +OTHER_SECTIONS=" + /* TILEPRO architecture interrupt vector areas */ + .intrpt0 0xfc000000 : { KEEP(*(.intrpt0)) } + .intrpt1 0xfd000000 : { KEEP(*(.intrpt1)) } + .intrpt2 0xfe000000 : { KEEP(*(.intrpt2)) } + .intrpt3 0xff000000 : { KEEP(*(.intrpt3)) } +" diff --git a/ld/emulparams/elf64ppc.sh b/ld/emulparams/elf64ppc.sh index c9337ea..8611686 100644 --- a/ld/emulparams/elf64ppc.sh +++ b/ld/emulparams/elf64ppc.sh @@ -1,3 +1,4 @@ +. ${srcdir}/emulparams/plt_unwind.sh TEMPLATE_NAME=elf32 EXTRA_EM_FILE=ppc64elf ELFSIZE=64 diff --git a/ld/emulparams/elf64tilegx.sh b/ld/emulparams/elf64tilegx.sh new file mode 100644 index 0000000..a2c407e --- /dev/null +++ b/ld/emulparams/elf64tilegx.sh @@ -0,0 +1,25 @@ +SCRIPT_NAME=elf +OUTPUT_FORMAT="elf64-tilegx" +TEXT_START_ADDR=0x10000 +NO_REL_RELOCS=yes +MAXPAGESIZE="CONSTANT (MAXPAGESIZE)" +COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)" +# See also `include/elf/tilegx.h' +ARCH=tilegx +ALIGNMENT=64 +MACHINE= +NOP=0 +# Note that "elf32.em" actually handles elf64 also. +TEMPLATE_NAME=elf32 +GENERATE_SHLIB_SCRIPT=yes +GENERATE_COMBRELOC_SCRIPT=yes +GENERATE_PIE_SCRIPT=yes +NO_SMALL_DATA=yes +SEPARATE_GOTPLT=16 +OTHER_SECTIONS=" + /* TILE architecture interrupt vector areas */ + .intrpt0 0xfffffffffc000000 : { KEEP(*(.intrpt0)) } + .intrpt1 0xfffffffffd000000 : { KEEP(*(.intrpt1)) } + .intrpt2 0xfffffffffe000000 : { KEEP(*(.intrpt2)) } + .intrpt3 0xffffffffff000000 : { KEEP(*(.intrpt3)) } +" diff --git a/ld/emulparams/elf_i386.sh b/ld/emulparams/elf_i386.sh index d480811..1d1e4b4 100644 --- a/ld/emulparams/elf_i386.sh +++ b/ld/emulparams/elf_i386.sh @@ -1,3 +1,4 @@ +. ${srcdir}/emulparams/plt_unwind.sh SCRIPT_NAME=elf OUTPUT_FORMAT="elf32-i386" NO_RELA_RELOCS=yes diff --git a/ld/emulparams/elf_i386_chaos.sh b/ld/emulparams/elf_i386_chaos.sh index 1322174..b3005e1 100644 --- a/ld/emulparams/elf_i386_chaos.sh +++ b/ld/emulparams/elf_i386_chaos.sh @@ -1,3 +1,4 @@ +. ${srcdir}/emulparams/plt_unwind.sh SCRIPT_NAME=elf_chaos OUTPUT_FORMAT="elf32-i386" TEXT_START_ADDR=0x40000000 diff --git a/ld/emulparams/elf_i386_ldso.sh b/ld/emulparams/elf_i386_ldso.sh index 4b0d3fb..183731d 100644 --- a/ld/emulparams/elf_i386_ldso.sh +++ b/ld/emulparams/elf_i386_ldso.sh @@ -1,3 +1,4 @@ +. ${srcdir}/emulparams/plt_unwind.sh SCRIPT_NAME=elf OUTPUT_FORMAT="elf32-i386" NO_RELA_RELOCS=yes diff --git a/ld/emulparams/elf_k1om.sh b/ld/emulparams/elf_k1om.sh new file mode 100644 index 0000000..ad4b955 --- /dev/null +++ b/ld/emulparams/elf_k1om.sh @@ -0,0 +1,35 @@ +. ${srcdir}/emulparams/plt_unwind.sh +SCRIPT_NAME=elf +ELFSIZE=64 +OUTPUT_FORMAT="elf64-k1om" +NO_REL_RELOCS=yes +TEXT_START_ADDR=0x400000 +MAXPAGESIZE="CONSTANT (MAXPAGESIZE)" +COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)" +ARCH="k1om" +MACHINE= +COMPILE_IN=yes +NOP=0x90909090 +TEMPLATE_NAME=elf32 +GENERATE_SHLIB_SCRIPT=yes +GENERATE_PIE_SCRIPT=yes +NO_SMALL_DATA=yes +LARGE_SECTIONS=yes +SEPARATE_GOTPLT=24 + +if [ "x${host}" = "x${target}" ]; then + case " $EMULATION_LIBPATH " in + *" ${EMULATION_NAME} "*) + NATIVE=yes + esac +fi + +# Linux modifies the default library search path to first include +# a 64-bit specific directory. +case "$target" in + *k1om*-linux*) + case "$EMULATION_NAME" in + *k1om*) LIBPATH_SUFFIX=64 ;; + esac + ;; +esac diff --git a/ld/emulparams/elf_k1om_fbsd.sh b/ld/emulparams/elf_k1om_fbsd.sh new file mode 100644 index 0000000..98f8033 --- /dev/null +++ b/ld/emulparams/elf_k1om_fbsd.sh @@ -0,0 +1,3 @@ +. ${srcdir}/emulparams/elf_k1om.sh +. ${srcdir}/emulparams/elf_fbsd.sh +OUTPUT_FORMAT="elf64-k1om-freebsd" diff --git a/ld/emulparams/elf_l1om.sh b/ld/emulparams/elf_l1om.sh index 1af2360..1d22d69 100644 --- a/ld/emulparams/elf_l1om.sh +++ b/ld/emulparams/elf_l1om.sh @@ -1,3 +1,4 @@ +. ${srcdir}/emulparams/plt_unwind.sh SCRIPT_NAME=elf ELFSIZE=64 OUTPUT_FORMAT="elf64-l1om" diff --git a/ld/emulparams/elf_x86_64.sh b/ld/emulparams/elf_x86_64.sh index 0e93ad8..a921878 100644 --- a/ld/emulparams/elf_x86_64.sh +++ b/ld/emulparams/elf_x86_64.sh @@ -1,3 +1,4 @@ +. ${srcdir}/emulparams/plt_unwind.sh SCRIPT_NAME=elf ELFSIZE=64 OUTPUT_FORMAT="elf64-x86-64" diff --git a/ld/emulparams/plt_unwind.sh b/ld/emulparams/plt_unwind.sh new file mode 100644 index 0000000..c832570 --- /dev/null +++ b/ld/emulparams/plt_unwind.sh @@ -0,0 +1,28 @@ +PARSE_AND_LIST_PROLOGUE=' +#define OPTION_LD_GENERATED_UNWIND_INFO 301 +#define OPTION_NO_LD_GENERATED_UNWIND_INFO 302 +' + +PARSE_AND_LIST_LONGOPTS=' + {"ld-generated-unwind-info", no_argument, NULL, + OPTION_LD_GENERATED_UNWIND_INFO}, + {"no-ld-generated-unwind-info", no_argument, NULL, + OPTION_NO_LD_GENERATED_UNWIND_INFO}, +' + +PARSE_AND_LIST_OPTIONS=' + fprintf (file, _("\ + --ld-generated-unwind-info Generate exception handling info for PLT.\n\ + --no-ld-generated-unwind-info Don'\''t do so.\n" + )); +' + +PARSE_AND_LIST_ARGS_CASES=' + case OPTION_LD_GENERATED_UNWIND_INFO: + link_info.no_ld_generated_unwind_info = FALSE; + break; + + case OPTION_NO_LD_GENERATED_UNWIND_INFO: + link_info.no_ld_generated_unwind_info = TRUE; + break; +' diff --git a/ld/emultempl/armelf.em b/ld/emultempl/armelf.em index 948bf8d..d29da59 100644 --- a/ld/emultempl/armelf.em +++ b/ld/emultempl/armelf.em @@ -42,6 +42,7 @@ static int no_enum_size_warning = 0; static int no_wchar_size_warning = 0; static int pic_veneer = 0; static int merge_exidx_entries = -1; +static int fix_arm1176 = 1; static void gld${EMULATION_NAME}_before_parse (void) @@ -464,7 +465,8 @@ arm_elf_create_output_section_statements (void) target2_type, fix_v4bx, use_blx, vfp11_denorm_fix, no_enum_size_warning, no_wchar_size_warning, - pic_veneer, fix_cortex_a8); + pic_veneer, fix_cortex_a8, + fix_arm1176); stub_file = lang_add_input_file ("linker stubs", lang_input_file_is_fake_enum, @@ -529,6 +531,8 @@ PARSE_AND_LIST_PROLOGUE=' #define OPTION_FIX_CORTEX_A8 314 #define OPTION_NO_FIX_CORTEX_A8 315 #define OPTION_NO_MERGE_EXIDX_ENTRIES 316 +#define OPTION_FIX_ARM1176 317 +#define OPTION_NO_FIX_ARM1176 318 ' PARSE_AND_LIST_SHORTOPTS=p @@ -551,6 +555,8 @@ PARSE_AND_LIST_LONGOPTS=' { "fix-cortex-a8", no_argument, NULL, OPTION_FIX_CORTEX_A8 }, { "no-fix-cortex-a8", no_argument, NULL, OPTION_NO_FIX_CORTEX_A8 }, { "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES }, + { "fix-arm1176", no_argument, NULL, OPTION_FIX_ARM1176 }, + { "no-fix-arm1176", no_argument, NULL, OPTION_NO_FIX_ARM1176 }, ' PARSE_AND_LIST_OPTIONS=' @@ -579,7 +585,7 @@ PARSE_AND_LIST_OPTIONS=' )); fprintf (file, _(" --[no-]fix-cortex-a8 Disable/enable Cortex-A8 Thumb-2 branch erratum fix\n")); fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n")); - + fprintf (file, _(" --[no-]fix-arm1176 Disable/enable ARM1176 BLX immediate erratum fix\n")); ' PARSE_AND_LIST_ARGS_CASES=' @@ -662,7 +668,15 @@ PARSE_AND_LIST_ARGS_CASES=' case OPTION_NO_MERGE_EXIDX_ENTRIES: merge_exidx_entries = 0; + break; + case OPTION_FIX_ARM1176: + fix_arm1176 = 1; + break; + + case OPTION_NO_FIX_ARM1176: + fix_arm1176 = 0; + break; ' # We have our own before_allocation etc. functions, but they call diff --git a/ld/emultempl/elf32.em b/ld/emultempl/elf32.em index 17fb8bf..78a708b 100644 --- a/ld/emultempl/elf32.em +++ b/ld/emultempl/elf32.em @@ -1535,7 +1535,7 @@ gld${EMULATION_NAME}_before_allocation (void) (link_info.output_bfd, command_line.soname, rpath, command_line.filter_shlib, audit, depaudit, (const char * const *) command_line.auxiliary_filters, - &link_info, &sinterp, lang_elf_version_info))) + &link_info, &sinterp))) einfo ("%P%F: failed to set dynamic section sizes: %E\n"); ${ELF_INTERPRETER_SET_DEFAULT} @@ -1920,7 +1920,7 @@ gld${EMULATION_NAME}_place_orphan (asection *s, && ((iself && sh_type == SHT_NOTE) || (!iself && CONST_STRNEQ (secname, ".note")))) place = &hold[orphan_interp]; - else if ((s->flags & (SEC_LOAD | SEC_HAS_CONTENTS)) == 0) + else if ((s->flags & (SEC_LOAD | SEC_HAS_CONTENTS | SEC_THREAD_LOCAL)) == 0) place = &hold[orphan_bss]; else if ((s->flags & SEC_SMALL_DATA) != 0) place = &hold[orphan_sdata]; @@ -2106,8 +2106,6 @@ EOF fi fi -if test -n "$PARSE_AND_LIST_ARGS_CASES" -o x"$GENERATE_SHLIB_SCRIPT" = xyes; then - if test -n "$PARSE_AND_LIST_PROLOGUE" ; then fragment <string); + printf ("+%s\n", h->string); return TRUE; } @@ -1590,8 +1589,10 @@ gld_${EMULATION_NAME}_after_open (void) /* If the symbol in the stub section has no other undefined references, exclude the stub section from the final link. */ - if (blhe && (blhe->type == bfd_link_hash_defined) - && (blhe->u.undef.next == NULL)) + if (blhe != NULL + && blhe->type == bfd_link_hash_defined + && blhe->u.undef.next == NULL + && blhe != link_info.hash->undefs_tail) stub_sec->flags |= SEC_EXCLUDE; } } diff --git a/ld/emultempl/pep.em b/ld/emultempl/pep.em index 0c1dfb9..e02ddcf 100644 --- a/ld/emultempl/pep.em +++ b/ld/emultempl/pep.em @@ -1130,8 +1130,7 @@ pep_find_data_imports (void) static bfd_boolean pr_sym (struct bfd_hash_entry *h, void *inf ATTRIBUTE_UNUSED) { - if (pep_dll_extra_pe_debug) - printf ("+%s\n", h->string); + printf ("+%s\n", h->string); return TRUE; } diff --git a/ld/emultempl/ppc32elf.em b/ld/emultempl/ppc32elf.em index 36f9df2..d9d7c03 100644 --- a/ld/emultempl/ppc32elf.em +++ b/ld/emultempl/ppc32elf.em @@ -1,5 +1,6 @@ # This shell script emits a C file. -*- C -*- -# Copyright 2003, 2005, 2007, 2008, 2009 Free Software Foundation, Inc. +# Copyright 2003, 2005, 2007, 2008, 2009, 2010, 2011 +# Free Software Foundation, Inc. # # This file is part of the GNU Binutils. # @@ -176,8 +177,8 @@ fi # Define some shell vars to insert bits of code into the standard elf # parse_args and list_options functions. # -PARSE_AND_LIST_PROLOGUE=' -#define OPTION_NO_TLS_OPT 301 +PARSE_AND_LIST_PROLOGUE=${PARSE_AND_LIST_PROLOGUE}' +#define OPTION_NO_TLS_OPT 321 #define OPTION_NO_TLS_GET_ADDR_OPT (OPTION_NO_TLS_OPT + 1) #define OPTION_NEW_PLT (OPTION_NO_TLS_GET_ADDR_OPT + 1) #define OPTION_OLD_PLT (OPTION_NEW_PLT + 1) @@ -186,7 +187,7 @@ PARSE_AND_LIST_PROLOGUE=' #define OPTION_NO_STUBSYMS (OPTION_STUBSYMS + 1) ' -PARSE_AND_LIST_LONGOPTS=' +PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST_LONGOPTS}' { "emit-stub-syms", no_argument, NULL, OPTION_STUBSYMS }, { "no-emit-stub-syms", no_argument, NULL, OPTION_NO_STUBSYMS }, { "no-tls-optimize", no_argument, NULL, OPTION_NO_TLS_OPT }, @@ -196,7 +197,7 @@ PARSE_AND_LIST_LONGOPTS=' { "sdata-got", no_argument, NULL, OPTION_OLD_GOT }, ' -PARSE_AND_LIST_OPTIONS=' +PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_OPTIONS}' fprintf (file, _("\ --emit-stub-syms Label linker stubs with a symbol.\n\ --no-emit-stub-syms Don'\''t label linker stubs with a symbol.\n\ @@ -208,7 +209,7 @@ PARSE_AND_LIST_OPTIONS=' )); ' -PARSE_AND_LIST_ARGS_CASES=' +PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}' case OPTION_STUBSYMS: emit_stub_syms = 1; break; diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em index 0c99592..92a468f 100644 --- a/ld/emultempl/ppc64elf.em +++ b/ld/emultempl/ppc64elf.em @@ -61,6 +61,9 @@ static int no_multi_toc = 0; /* Whether to sort input toc and got sections. */ static int no_toc_sort = 0; +/* Set if PLT call stubs should load r11. */ +static int plt_static_chain = 0; + /* Whether to emit symbols for stubs. */ static int emit_stub_syms = -1; @@ -375,7 +378,8 @@ ppc_add_stub_section (const char *stub_sec_name, asection *input_section) | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_KEEP); stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd, stub_sec_name, flags); - if (stub_sec == NULL) + if (stub_sec == NULL + || !bfd_set_section_alignment (stub_file->the_bfd, stub_sec, 5)) goto err_ret; output_section = input_section->output_section; @@ -500,7 +504,7 @@ gld${EMULATION_NAME}_after_allocation (void) einfo ("%P: .init/.fini fragments use differing TOC pointers\n"); /* Call into the BFD backend to do the real work. */ - if (!ppc64_elf_size_stubs (&link_info, group_size)) + if (!ppc64_elf_size_stubs (&link_info, group_size, plt_static_chain)) einfo ("%X%P: can not size stub section: %E\n"); } } @@ -526,14 +530,6 @@ gld${EMULATION_NAME}_finish (void) descriptor in the .opd section. */ entry_section = ".opd"; - if (link_info.relocatable) - { - asection *toc = bfd_get_section_by_name (link_info.output_bfd, ".toc"); - if (toc != NULL - && bfd_section_size (link_info.output_bfd, toc) > 0x10000) - einfo ("%X%P: TOC section size exceeds 64k\n"); - } - if (stub_added) { char *msg = NULL; @@ -649,9 +645,11 @@ fi # Define some shell vars to insert bits of code into the standard elf # parse_args and list_options functions. # -PARSE_AND_LIST_PROLOGUE=' -#define OPTION_STUBGROUP_SIZE 301 -#define OPTION_STUBSYMS (OPTION_STUBGROUP_SIZE + 1) +PARSE_AND_LIST_PROLOGUE=${PARSE_AND_LIST_PROLOGUE}' +#define OPTION_STUBGROUP_SIZE 321 +#define OPTION_PLT_STATIC_CHAIN (OPTION_STUBGROUP_SIZE + 1) +#define OPTION_NO_PLT_STATIC_CHAIN (OPTION_PLT_STATIC_CHAIN + 1) +#define OPTION_STUBSYMS (OPTION_NO_PLT_STATIC_CHAIN + 1) #define OPTION_NO_STUBSYMS (OPTION_STUBSYMS + 1) #define OPTION_DOTSYMS (OPTION_NO_STUBSYMS + 1) #define OPTION_NO_DOTSYMS (OPTION_DOTSYMS + 1) @@ -664,8 +662,10 @@ PARSE_AND_LIST_PROLOGUE=' #define OPTION_NON_OVERLAPPING_OPD (OPTION_NO_TOC_SORT + 1) ' -PARSE_AND_LIST_LONGOPTS=' +PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST_LONGOPTS}' { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE }, + { "plt-static-chain", no_argument, NULL, OPTION_PLT_STATIC_CHAIN }, + { "no-plt-static-chain", no_argument, NULL, OPTION_NO_PLT_STATIC_CHAIN }, { "emit-stub-syms", no_argument, NULL, OPTION_STUBSYMS }, { "no-emit-stub-syms", no_argument, NULL, OPTION_NO_STUBSYMS }, { "dotsyms", no_argument, NULL, OPTION_DOTSYMS }, @@ -679,7 +679,7 @@ PARSE_AND_LIST_LONGOPTS=' { "non-overlapping-opd", no_argument, NULL, OPTION_NON_OVERLAPPING_OPD }, ' -PARSE_AND_LIST_OPTIONS=' +PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_OPTIONS}' fprintf (file, _("\ --stub-group-size=N Maximum size of a group of input sections that\n\ can be handled by one stub section. A negative\n\ @@ -691,6 +691,12 @@ PARSE_AND_LIST_OPTIONS=' choose suitable defaults.\n" )); fprintf (file, _("\ + --plt-static-chain PLT call stubs should load r11.\n" + )); + fprintf (file, _("\ + --no-plt-static-chain PLT call stubs should not load r11. (default)\n" + )); + fprintf (file, _("\ --emit-stub-syms Label linker stubs with a symbol.\n" )); fprintf (file, _("\ @@ -729,7 +735,7 @@ PARSE_AND_LIST_OPTIONS=' )); ' -PARSE_AND_LIST_ARGS_CASES=' +PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}' case OPTION_STUBGROUP_SIZE: { const char *end; @@ -739,6 +745,14 @@ PARSE_AND_LIST_ARGS_CASES=' } break; + case OPTION_PLT_STATIC_CHAIN: + plt_static_chain = 1; + break; + + case OPTION_NO_PLT_STATIC_CHAIN: + plt_static_chain = 0; + break; + case OPTION_STUBSYMS: emit_stub_syms = 1; break; diff --git a/ld/emultempl/rxelf.em b/ld/emultempl/rxelf.em index c4a2dac..159a649 100644 --- a/ld/emultempl/rxelf.em +++ b/ld/emultempl/rxelf.em @@ -1,5 +1,5 @@ # This shell script emits a C file. -*- C -*- -# Copyright 2009 Free Software Foundation, Inc. +# Copyright 2009, 2011 Free Software Foundation, Inc. # # This file is part of the GNU Binutils. # @@ -26,15 +26,16 @@ test -z "$TARGET2_TYPE" && TARGET2_TYPE="rel" fragment <xvec == &bfd_elf32_tic6x_le_vec - || link_info.output_bfd->xvec == &bfd_elf32_tic6x_be_vec); + || link_info.output_bfd->xvec == &bfd_elf32_tic6x_be_vec + || link_info.output_bfd->xvec == &bfd_elf32_tic6x_linux_le_vec + || link_info.output_bfd->xvec == &bfd_elf32_tic6x_linux_be_vec + || link_info.output_bfd->xvec == &bfd_elf32_tic6x_elf_le_vec + || link_info.output_bfd->xvec == &bfd_elf32_tic6x_elf_be_vec); } /* Pass params to backend. */ @@ -58,6 +68,92 @@ tic6x_after_open (void) gld${EMULATION_NAME}_after_open (); } + +static int +compare_output_sec_vma (const void *a, const void *b) +{ + asection *asec = *(asection **) a, *bsec = *(asection **) b; + asection *aout = asec->output_section, *bout = bsec->output_section; + bfd_vma avma, bvma; + + /* If there's no output section for some reason, compare equal. */ + if (!aout || !bout) + return 0; + + avma = aout->vma + asec->output_offset; + bvma = bout->vma + bsec->output_offset; + + if (avma > bvma) + return 1; + else if (avma < bvma) + return -1; + + return 0; +} + +static void +gld${EMULATION_NAME}_after_allocation (void) +{ + int layout_changed = 0; + + if (!link_info.relocatable) + { + /* Build a sorted list of input text sections, then use that to process + the unwind table index. */ + unsigned int list_size = 10; + asection **sec_list = (asection **) + xmalloc (list_size * sizeof (asection *)); + unsigned int sec_count = 0; + + LANG_FOR_EACH_INPUT_STATEMENT (is) + { + bfd *abfd = is->the_bfd; + asection *sec; + + if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) + continue; + + for (sec = abfd->sections; sec != NULL; sec = sec->next) + { + asection *out_sec = sec->output_section; + + if (out_sec + && elf_section_data (sec) + && elf_section_type (sec) == SHT_PROGBITS + && (elf_section_flags (sec) & SHF_EXECINSTR) != 0 + && (sec->flags & SEC_EXCLUDE) == 0 + && sec->sec_info_type != ELF_INFO_TYPE_JUST_SYMS + && out_sec != bfd_abs_section_ptr) + { + if (sec_count == list_size) + { + list_size *= 2; + sec_list = (asection **) + xrealloc (sec_list, list_size * sizeof (asection *)); + } + + sec_list[sec_count++] = sec; + } + } + } + + qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma); + + if (elf32_tic6x_fix_exidx_coverage (sec_list, sec_count, &link_info, + merge_exidx_entries)) + layout_changed = 1; + + free (sec_list); + } + + /* bfd_elf32_discard_info just plays with debugging sections, + ie. doesn't affect any code, so we can delay resizing the + sections. */ + if (bfd_elf_discard_info (link_info.output_bfd, & link_info)) + layout_changed = 1; + + gld${EMULATION_NAME}_map_segments (layout_changed); +} EOF # This code gets inserted into the generic elf32.sc linker script @@ -65,11 +161,13 @@ EOF PARSE_AND_LIST_PROLOGUE=' #define OPTION_DSBT_INDEX 300 #define OPTION_DSBT_SIZE 301 +#define OPTION_NO_MERGE_EXIDX_ENTRIES 302 ' PARSE_AND_LIST_LONGOPTS=' {"dsbt-index", required_argument, NULL, OPTION_DSBT_INDEX}, {"dsbt-size", required_argument, NULL, OPTION_DSBT_SIZE}, + { "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES }, ' PARSE_AND_LIST_OPTIONS=' @@ -77,6 +175,7 @@ PARSE_AND_LIST_OPTIONS=' fprintf (file, _("\t\t\tUse this as the DSBT index for the output object\n")); fprintf (file, _(" --dsbt-size \n")); fprintf (file, _("\t\t\tUse this as the number of entries in the DSBT table\n")); + fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n")); ' PARSE_AND_LIST_ARGS_CASES=' @@ -100,6 +199,9 @@ PARSE_AND_LIST_ARGS_CASES=' einfo (_("%P%F: invalid --dsbt-size %s\n"), optarg); } break; + case OPTION_NO_MERGE_EXIDX_ENTRIES: + merge_exidx_entries = 0; ' LDEMUL_AFTER_OPEN=tic6x_after_open +LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation diff --git a/ld/emultempl/vms.em b/ld/emultempl/vms.em index fb8fd53..6107c56 100644 --- a/ld/emultempl/vms.em +++ b/ld/emultempl/vms.em @@ -23,6 +23,8 @@ # This file is sourced from generic.em. fragment < Set the identification of the output\n")); +} + +static bfd_boolean +gld${EMULATION_NAME}_handle_option (int optc) +{ + switch (optc) + { + default: + return FALSE; + + case OPTION_IDENTIFICATION: + /* Currently ignored. */ + break; + } + + return TRUE; +} + EOF LDEMUL_PLACE_ORPHAN=vms_place_orphan @@ -124,3 +171,6 @@ LDEMUL_BEFORE_PARSE=gld"$EMULATION_NAME"_before_parse LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=gld"$EMULATION_NAME"_create_output_section_statements LDEMUL_FIND_POTENTIAL_LIBRARIES=gld"$EMULATION_NAME"_find_potential_libraries LDEMUL_OPEN_DYNAMIC_ARCHIVE=gld"$EMULATION_NAME"_open_dynamic_archive +LDEMUL_ADD_OPTIONS=gld"$EMULATION_NAME"_add_options +LDEMUL_HANDLE_OPTION=gld"$EMULATION_NAME"_handle_option +LDEMUL_LIST_OPTIONS=gld"$EMULATION_NAME"_list_options diff --git a/ld/ld.1 b/ld/ld.1 new file mode 100644 index 0000000..d59c15e --- /dev/null +++ b/ld/ld.1 @@ -0,0 +1,2441 @@ +.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14) +.\" +.\" Standard preamble: +.\" ======================================================================== +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. \*(C+ will +.\" give a nicer C++. Capital omega is used to do unbreakable dashes and +.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff, +.\" nothing in troff, for use with C<>. +.tr \(*W- +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" Escape single quotes in literal strings from groff's Unicode transform. +.ie \n(.g .ds Aq \(aq +.el .ds Aq ' +.\" +.\" If the F register is turned on, we'll generate index entries on stderr for +.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index +.\" entries marked with X<> in POD. Of course, you'll have to process the +.\" output yourself in some meaningful fashion. +.ie \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.el \{\ +. de IX +.. +.\} +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ======================================================================== +.\" +.IX Title "LD 1" +.TH LD 1 "2011-11-21" "binutils-2.21.90" "GNU Development Tools" +.\" For nroff, turn off justification. Always turn off hyphenation; it makes +.\" way too many mistakes in technical documents. +.if n .ad l +.nh +.SH "NAME" +ld \- The GNU linker +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +ld [\fBoptions\fR] \fIobjfile\fR ... +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\fBld\fR combines a number of object and archive files, relocates +their data and ties up symbol references. Usually the last step in +compiling a program is to run \fBld\fR. +.PP +\&\fBld\fR accepts Linker Command Language files written in +a superset of \s-1AT&T\s0's Link Editor Command Language syntax, +to provide explicit and total control over the linking process. +.PP +This man page does not describe the command language; see the +\&\fBld\fR entry in \f(CW\*(C`info\*(C'\fR for full details on the command +language and on other aspects of the \s-1GNU\s0 linker. +.PP +This version of \fBld\fR uses the general purpose \s-1BFD\s0 libraries +to operate on object files. This allows \fBld\fR to read, combine, and +write object files in many different formats\-\-\-for example, \s-1COFF\s0 or +\&\f(CW\*(C`a.out\*(C'\fR. Different formats may be linked together to produce any +available kind of object file. +.PP +Aside from its flexibility, the \s-1GNU\s0 linker is more helpful than other +linkers in providing diagnostic information. Many linkers abandon +execution immediately upon encountering an error; whenever possible, +\&\fBld\fR continues executing, allowing you to identify other errors +(or, in some cases, to get an output file in spite of the error). +.PP +The \s-1GNU\s0 linker \fBld\fR is meant to cover a broad range of situations, +and to be as compatible as possible with other linkers. As a result, +you have many choices to control its behavior. +.SH "OPTIONS" +.IX Header "OPTIONS" +The linker supports a plethora of command-line options, but in actual +practice few of them are used in any particular context. +For instance, a frequent use of \fBld\fR is to link standard Unix +object files on a standard, supported Unix system. On such a system, to +link a file \f(CW\*(C`hello.o\*(C'\fR: +.PP +.Vb 1 +\& ld \-o /lib/crt0.o hello.o \-lc +.Ve +.PP +This tells \fBld\fR to produce a file called \fIoutput\fR as the +result of linking the file \f(CW\*(C`/lib/crt0.o\*(C'\fR with \f(CW\*(C`hello.o\*(C'\fR and +the library \f(CW\*(C`libc.a\*(C'\fR, which will come from the standard search +directories. (See the discussion of the \fB\-l\fR option below.) +.PP +Some of the command-line options to \fBld\fR may be specified at any +point in the command line. However, options which refer to files, such +as \fB\-l\fR or \fB\-T\fR, cause the file to be read at the point at +which the option appears in the command line, relative to the object +files and other file options. Repeating non-file options with a +different argument will either have no further effect, or override prior +occurrences (those further to the left on the command line) of that +option. Options which may be meaningfully specified more than once are +noted in the descriptions below. +.PP +Non-option arguments are object files or archives which are to be linked +together. They may follow, precede, or be mixed in with command-line +options, except that an object file argument may not be placed between +an option and its argument. +.PP +Usually the linker is invoked with at least one object file, but you can +specify other forms of binary input files using \fB\-l\fR, \fB\-R\fR, +and the script command language. If \fIno\fR binary input files at all +are specified, the linker does not produce any output, and issues the +message \fBNo input files\fR. +.PP +If the linker cannot recognize the format of an object file, it will +assume that it is a linker script. A script specified in this way +augments the main linker script used for the link (either the default +linker script or the one specified by using \fB\-T\fR). This feature +permits the linker to link against a file which appears to be an object +or an archive, but actually merely defines some symbol values, or uses +\&\f(CW\*(C`INPUT\*(C'\fR or \f(CW\*(C`GROUP\*(C'\fR to load other objects. Specifying a +script in this way merely augments the main linker script, with the +extra commands placed after the main script; use the \fB\-T\fR option +to replace the default linker script entirely, but note the effect of +the \f(CW\*(C`INSERT\*(C'\fR command. +.PP +For options whose names are a single letter, +option arguments must either follow the option letter without intervening +whitespace, or be given as separate arguments immediately following the +option that requires them. +.PP +For options whose names are multiple letters, either one dash or two can +precede the option name; for example, \fB\-trace\-symbol\fR and +\&\fB\-\-trace\-symbol\fR are equivalent. Note\-\-\-there is one exception to +this rule. Multiple letter options that start with a lower case 'o' can +only be preceded by two dashes. This is to reduce confusion with the +\&\fB\-o\fR option. So for example \fB\-omagic\fR sets the output file +name to \fBmagic\fR whereas \fB\-\-omagic\fR sets the \s-1NMAGIC\s0 flag on the +output. +.PP +Arguments to multiple-letter options must either be separated from the +option name by an equals sign, or be given as separate arguments +immediately following the option that requires them. For example, +\&\fB\-\-trace\-symbol foo\fR and \fB\-\-trace\-symbol=foo\fR are equivalent. +Unique abbreviations of the names of multiple-letter options are +accepted. +.PP +Note\-\-\-if the linker is being invoked indirectly, via a compiler driver +(e.g. \fBgcc\fR) then all the linker command line options should be +prefixed by \fB\-Wl,\fR (or whatever is appropriate for the particular +compiler driver) like this: +.PP +.Vb 1 +\& gcc \-Wl,\-\-start\-group foo.o bar.o \-Wl,\-\-end\-group +.Ve +.PP +This is important, because otherwise the compiler driver program may +silently drop the linker options, resulting in a bad link. Confusion +may also arise when passing options that require values through a +driver, as the use of a space between option and argument acts as +a separator, and causes the driver to pass only the option to the linker +and the argument to the compiler. In this case, it is simplest to use +the joined forms of both single\- and multiple-letter options, such as: +.PP +.Vb 1 +\& gcc foo.o bar.o \-Wl,\-eENTRY \-Wl,\-Map=a.map +.Ve +.PP +Here is a table of the generic command line switches accepted by the \s-1GNU\s0 +linker: +.IP "\fB@\fR\fIfile\fR" 4 +.IX Item "@file" +Read command-line options from \fIfile\fR. The options read are +inserted in place of the original @\fIfile\fR option. If \fIfile\fR +does not exist, or cannot be read, then the option will be treated +literally, and not removed. +.Sp +Options in \fIfile\fR are separated by whitespace. A whitespace +character may be included in an option by surrounding the entire +option in either single or double quotes. Any character (including a +backslash) may be included by prefixing the character to be included +with a backslash. The \fIfile\fR may itself contain additional +@\fIfile\fR options; any such options will be processed recursively. +.IP "\fB\-a\fR \fIkeyword\fR" 4 +.IX Item "-a keyword" +This option is supported for \s-1HP/UX\s0 compatibility. The \fIkeyword\fR +argument must be one of the strings \fBarchive\fR, \fBshared\fR, or +\&\fBdefault\fR. \fB\-aarchive\fR is functionally equivalent to +\&\fB\-Bstatic\fR, and the other two keywords are functionally equivalent +to \fB\-Bdynamic\fR. This option may be used any number of times. +.IP "\fB\-\-audit\fR \fI\s-1AUDITLIB\s0\fR" 4 +.IX Item "--audit AUDITLIB" +Adds \fI\s-1AUDITLIB\s0\fR to the \f(CW\*(C`DT_AUDIT\*(C'\fR entry of the dynamic section. +\&\fI\s-1AUDITLIB\s0\fR is not checked for existence, nor will it use the \s-1DT_SONAME\s0 +specified in the library. If specified multiple times \f(CW\*(C`DT_AUDIT\*(C'\fR +will contain a colon separated list of audit interfaces to use. If the linker +finds an object with an audit entry while searching for shared libraries, +it will add a corresponding \f(CW\*(C`DT_DEPAUDIT\*(C'\fR entry in the output file. +This option is only meaningful on \s-1ELF\s0 platforms supporting the rtld-audit +interface. +.IP "\fB\-A\fR \fIarchitecture\fR" 4 +.IX Item "-A architecture" +.PD 0 +.IP "\fB\-\-architecture=\fR\fIarchitecture\fR" 4 +.IX Item "--architecture=architecture" +.PD +In the current release of \fBld\fR, this option is useful only for the +Intel 960 family of architectures. In that \fBld\fR configuration, the +\&\fIarchitecture\fR argument identifies the particular architecture in +the 960 family, enabling some safeguards and modifying the +archive-library search path. +.Sp +Future releases of \fBld\fR may support similar functionality for +other architecture families. +.IP "\fB\-b\fR \fIinput-format\fR" 4 +.IX Item "-b input-format" +.PD 0 +.IP "\fB\-\-format=\fR\fIinput-format\fR" 4 +.IX Item "--format=input-format" +.PD +\&\fBld\fR may be configured to support more than one kind of object +file. If your \fBld\fR is configured this way, you can use the +\&\fB\-b\fR option to specify the binary format for input object files +that follow this option on the command line. Even when \fBld\fR is +configured to support alternative object formats, you don't usually need +to specify this, as \fBld\fR should be configured to expect as a +default input format the most usual format on each machine. +\&\fIinput-format\fR is a text string, the name of a particular format +supported by the \s-1BFD\s0 libraries. (You can list the available binary +formats with \fBobjdump \-i\fR.) +.Sp +You may want to use this option if you are linking files with an unusual +binary format. You can also use \fB\-b\fR to switch formats explicitly (when +linking object files of different formats), by including +\&\fB\-b\fR \fIinput-format\fR before each group of object files in a +particular format. +.Sp +The default format is taken from the environment variable +\&\f(CW\*(C`GNUTARGET\*(C'\fR. +.Sp +You can also define the input format from a script, using the command +\&\f(CW\*(C`TARGET\*(C'\fR; +.IP "\fB\-c\fR \fIMRI-commandfile\fR" 4 +.IX Item "-c MRI-commandfile" +.PD 0 +.IP "\fB\-\-mri\-script=\fR\fIMRI-commandfile\fR" 4 +.IX Item "--mri-script=MRI-commandfile" +.PD +For compatibility with linkers produced by \s-1MRI\s0, \fBld\fR accepts script +files written in an alternate, restricted command language, described in +the \s-1MRI\s0 Compatible Script Files section of \s-1GNU\s0 ld documentation. +Introduce \s-1MRI\s0 script files with +the option \fB\-c\fR; use the \fB\-T\fR option to run linker +scripts written in the general-purpose \fBld\fR scripting language. +If \fIMRI-cmdfile\fR does not exist, \fBld\fR looks for it in the directories +specified by any \fB\-L\fR options. +.IP "\fB\-d\fR" 4 +.IX Item "-d" +.PD 0 +.IP "\fB\-dc\fR" 4 +.IX Item "-dc" +.IP "\fB\-dp\fR" 4 +.IX Item "-dp" +.PD +These three options are equivalent; multiple forms are supported for +compatibility with other linkers. They assign space to common symbols +even if a relocatable output file is specified (with \fB\-r\fR). The +script command \f(CW\*(C`FORCE_COMMON_ALLOCATION\*(C'\fR has the same effect. +.IP "\fB\-\-depaudit\fR \fI\s-1AUDITLIB\s0\fR" 4 +.IX Item "--depaudit AUDITLIB" +.PD 0 +.IP "\fB\-P\fR \fI\s-1AUDITLIB\s0\fR" 4 +.IX Item "-P AUDITLIB" +.PD +Adds \fI\s-1AUDITLIB\s0\fR to the \f(CW\*(C`DT_DEPAUDIT\*(C'\fR entry of the dynamic section. +\&\fI\s-1AUDITLIB\s0\fR is not checked for existence, nor will it use the \s-1DT_SONAME\s0 +specified in the library. If specified multiple times \f(CW\*(C`DT_DEPAUDIT\*(C'\fR +will contain a colon separated list of audit interfaces to use. This +option is only meaningful on \s-1ELF\s0 platforms supporting the rtld-audit interface. +The \-P option is provided for Solaris compatibility. +.IP "\fB\-e\fR \fIentry\fR" 4 +.IX Item "-e entry" +.PD 0 +.IP "\fB\-\-entry=\fR\fIentry\fR" 4 +.IX Item "--entry=entry" +.PD +Use \fIentry\fR as the explicit symbol for beginning execution of your +program, rather than the default entry point. If there is no symbol +named \fIentry\fR, the linker will try to parse \fIentry\fR as a number, +and use that as the entry address (the number will be interpreted in +base 10; you may use a leading \fB0x\fR for base 16, or a leading +\&\fB0\fR for base 8). +.IP "\fB\-\-exclude\-libs\fR \fIlib\fR\fB,\fR\fIlib\fR\fB,...\fR" 4 +.IX Item "--exclude-libs lib,lib,..." +Specifies a list of archive libraries from which symbols should not be automatically +exported. The library names may be delimited by commas or colons. Specifying +\&\f(CW\*(C`\-\-exclude\-libs ALL\*(C'\fR excludes symbols in all archive libraries from +automatic export. This option is available only for the i386 \s-1PE\s0 targeted +port of the linker and for \s-1ELF\s0 targeted ports. For i386 \s-1PE\s0, symbols +explicitly listed in a .def file are still exported, regardless of this +option. For \s-1ELF\s0 targeted ports, symbols affected by this option will +be treated as hidden. +.IP "\fB\-\-exclude\-modules\-for\-implib\fR \fImodule\fR\fB,\fR\fImodule\fR\fB,...\fR" 4 +.IX Item "--exclude-modules-for-implib module,module,..." +Specifies a list of object files or archive members, from which symbols +should not be automatically exported, but which should be copied wholesale +into the import library being generated during the link. The module names +may be delimited by commas or colons, and must match exactly the filenames +used by \fBld\fR to open the files; for archive members, this is simply +the member name, but for object files the name listed must include and +match precisely any path used to specify the input file on the linker's +command-line. This option is available only for the i386 \s-1PE\s0 targeted port +of the linker. Symbols explicitly listed in a .def file are still exported, +regardless of this option. +.IP "\fB\-E\fR" 4 +.IX Item "-E" +.PD 0 +.IP "\fB\-\-export\-dynamic\fR" 4 +.IX Item "--export-dynamic" +.IP "\fB\-\-no\-export\-dynamic\fR" 4 +.IX Item "--no-export-dynamic" +.PD +When creating a dynamically linked executable, using the \fB\-E\fR +option or the \fB\-\-export\-dynamic\fR option causes the linker to add +all symbols to the dynamic symbol table. The dynamic symbol table is the +set of symbols which are visible from dynamic objects at run time. +.Sp +If you do not use either of these options (or use the +\&\fB\-\-no\-export\-dynamic\fR option to restore the default behavior), the +dynamic symbol table will normally contain only those symbols which are +referenced by some dynamic object mentioned in the link. +.Sp +If you use \f(CW\*(C`dlopen\*(C'\fR to load a dynamic object which needs to refer +back to the symbols defined by the program, rather than some other +dynamic object, then you will probably need to use this option when +linking the program itself. +.Sp +You can also use the dynamic list to control what symbols should +be added to the dynamic symbol table if the output format supports it. +See the description of \fB\-\-dynamic\-list\fR. +.Sp +Note that this option is specific to \s-1ELF\s0 targeted ports. \s-1PE\s0 targets +support a similar function to export all symbols from a \s-1DLL\s0 or \s-1EXE\s0; see +the description of \fB\-\-export\-all\-symbols\fR below. +.IP "\fB\-EB\fR" 4 +.IX Item "-EB" +Link big-endian objects. This affects the default output format. +.IP "\fB\-EL\fR" 4 +.IX Item "-EL" +Link little-endian objects. This affects the default output format. +.IP "\fB\-f\fR \fIname\fR" 4 +.IX Item "-f name" +.PD 0 +.IP "\fB\-\-auxiliary=\fR\fIname\fR" 4 +.IX Item "--auxiliary=name" +.PD +When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_AUXILIARY\s0 field +to the specified name. This tells the dynamic linker that the symbol +table of the shared object should be used as an auxiliary filter on the +symbol table of the shared object \fIname\fR. +.Sp +If you later link a program against this filter object, then, when you +run the program, the dynamic linker will see the \s-1DT_AUXILIARY\s0 field. If +the dynamic linker resolves any symbols from the filter object, it will +first check whether there is a definition in the shared object +\&\fIname\fR. If there is one, it will be used instead of the definition +in the filter object. The shared object \fIname\fR need not exist. +Thus the shared object \fIname\fR may be used to provide an alternative +implementation of certain functions, perhaps for debugging or for +machine specific performance. +.Sp +This option may be specified more than once. The \s-1DT_AUXILIARY\s0 entries +will be created in the order in which they appear on the command line. +.IP "\fB\-F\fR \fIname\fR" 4 +.IX Item "-F name" +.PD 0 +.IP "\fB\-\-filter=\fR\fIname\fR" 4 +.IX Item "--filter=name" +.PD +When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_FILTER\s0 field to +the specified name. This tells the dynamic linker that the symbol table +of the shared object which is being created should be used as a filter +on the symbol table of the shared object \fIname\fR. +.Sp +If you later link a program against this filter object, then, when you +run the program, the dynamic linker will see the \s-1DT_FILTER\s0 field. The +dynamic linker will resolve symbols according to the symbol table of the +filter object as usual, but it will actually link to the definitions +found in the shared object \fIname\fR. Thus the filter object can be +used to select a subset of the symbols provided by the object +\&\fIname\fR. +.Sp +Some older linkers used the \fB\-F\fR option throughout a compilation +toolchain for specifying object-file format for both input and output +object files. +The \s-1GNU\s0 linker uses other mechanisms for this purpose: the +\&\fB\-b\fR, \fB\-\-format\fR, \fB\-\-oformat\fR options, the +\&\f(CW\*(C`TARGET\*(C'\fR command in linker scripts, and the \f(CW\*(C`GNUTARGET\*(C'\fR +environment variable. +The \s-1GNU\s0 linker will ignore the \fB\-F\fR option when not +creating an \s-1ELF\s0 shared object. +.IP "\fB\-fini=\fR\fIname\fR" 4 +.IX Item "-fini=name" +When creating an \s-1ELF\s0 executable or shared object, call \s-1NAME\s0 when the +executable or shared object is unloaded, by setting \s-1DT_FINI\s0 to the +address of the function. By default, the linker uses \f(CW\*(C`_fini\*(C'\fR as +the function to call. +.IP "\fB\-g\fR" 4 +.IX Item "-g" +Ignored. Provided for compatibility with other tools. +.IP "\fB\-G\fR \fIvalue\fR" 4 +.IX Item "-G value" +.PD 0 +.IP "\fB\-\-gpsize=\fR\fIvalue\fR" 4 +.IX Item "--gpsize=value" +.PD +Set the maximum size of objects to be optimized using the \s-1GP\s0 register to +\&\fIsize\fR. This is only meaningful for object file formats such as +\&\s-1MIPS\s0 \s-1ECOFF\s0 which supports putting large and small objects into different +sections. This is ignored for other object file formats. +.IP "\fB\-h\fR \fIname\fR" 4 +.IX Item "-h name" +.PD 0 +.IP "\fB\-soname=\fR\fIname\fR" 4 +.IX Item "-soname=name" +.PD +When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_SONAME\s0 field to +the specified name. When an executable is linked with a shared object +which has a \s-1DT_SONAME\s0 field, then when the executable is run the dynamic +linker will attempt to load the shared object specified by the \s-1DT_SONAME\s0 +field rather than the using the file name given to the linker. +.IP "\fB\-i\fR" 4 +.IX Item "-i" +Perform an incremental link (same as option \fB\-r\fR). +.IP "\fB\-init=\fR\fIname\fR" 4 +.IX Item "-init=name" +When creating an \s-1ELF\s0 executable or shared object, call \s-1NAME\s0 when the +executable or shared object is loaded, by setting \s-1DT_INIT\s0 to the address +of the function. By default, the linker uses \f(CW\*(C`_init\*(C'\fR as the +function to call. +.IP "\fB\-l\fR \fInamespec\fR" 4 +.IX Item "-l namespec" +.PD 0 +.IP "\fB\-\-library=\fR\fInamespec\fR" 4 +.IX Item "--library=namespec" +.PD +Add the archive or object file specified by \fInamespec\fR to the +list of files to link. This option may be used any number of times. +If \fInamespec\fR is of the form \fI:\fIfilename\fI\fR, \fBld\fR +will search the library path for a file called \fIfilename\fR, otherwise it +will search the library path for a file called \fIlib\fInamespec\fI.a\fR. +.Sp +On systems which support shared libraries, \fBld\fR may also search for +files other than \fIlib\fInamespec\fI.a\fR. Specifically, on \s-1ELF\s0 +and SunOS systems, \fBld\fR will search a directory for a library +called \fIlib\fInamespec\fI.so\fR before searching for one called +\&\fIlib\fInamespec\fI.a\fR. (By convention, a \f(CW\*(C`.so\*(C'\fR extension +indicates a shared library.) Note that this behavior does not apply +to \fI:\fIfilename\fI\fR, which always specifies a file called +\&\fIfilename\fR. +.Sp +The linker will search an archive only once, at the location where it is +specified on the command line. If the archive defines a symbol which +was undefined in some object which appeared before the archive on the +command line, the linker will include the appropriate file(s) from the +archive. However, an undefined symbol in an object appearing later on +the command line will not cause the linker to search the archive again. +.Sp +See the \fB\-(\fR option for a way to force the linker to search +archives multiple times. +.Sp +You may list the same archive multiple times on the command line. +.Sp +This type of archive searching is standard for Unix linkers. However, +if you are using \fBld\fR on \s-1AIX\s0, note that it is different from the +behaviour of the \s-1AIX\s0 linker. +.IP "\fB\-L\fR \fIsearchdir\fR" 4 +.IX Item "-L searchdir" +.PD 0 +.IP "\fB\-\-library\-path=\fR\fIsearchdir\fR" 4 +.IX Item "--library-path=searchdir" +.PD +Add path \fIsearchdir\fR to the list of paths that \fBld\fR will search +for archive libraries and \fBld\fR control scripts. You may use this +option any number of times. The directories are searched in the order +in which they are specified on the command line. Directories specified +on the command line are searched before the default directories. All +\&\fB\-L\fR options apply to all \fB\-l\fR options, regardless of the +order in which the options appear. \fB\-L\fR options do not affect +how \fBld\fR searches for a linker script unless \fB\-T\fR +option is specified. +.Sp +If \fIsearchdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced +by the \fIsysroot prefix\fR, a path specified when the linker is configured. +.Sp +The default set of paths searched (without being specified with +\&\fB\-L\fR) depends on which emulation mode \fBld\fR is using, and in +some cases also on how it was configured. +.Sp +The paths can also be specified in a link script with the +\&\f(CW\*(C`SEARCH_DIR\*(C'\fR command. Directories specified this way are searched +at the point in which the linker script appears in the command line. +.IP "\fB\-m\fR \fIemulation\fR" 4 +.IX Item "-m emulation" +Emulate the \fIemulation\fR linker. You can list the available +emulations with the \fB\-\-verbose\fR or \fB\-V\fR options. +.Sp +If the \fB\-m\fR option is not used, the emulation is taken from the +\&\f(CW\*(C`LDEMULATION\*(C'\fR environment variable, if that is defined. +.Sp +Otherwise, the default emulation depends upon how the linker was +configured. +.IP "\fB\-M\fR" 4 +.IX Item "-M" +.PD 0 +.IP "\fB\-\-print\-map\fR" 4 +.IX Item "--print-map" +.PD +Print a link map to the standard output. A link map provides +information about the link, including the following: +.RS 4 +.IP "\(bu" 4 +Where object files are mapped into memory. +.IP "\(bu" 4 +How common symbols are allocated. +.IP "\(bu" 4 +All archive members included in the link, with a mention of the symbol +which caused the archive member to be brought in. +.IP "\(bu" 4 +The values assigned to symbols. +.Sp +Note \- symbols whose values are computed by an expression which +involves a reference to a previous value of the same symbol may not +have correct result displayed in the link map. This is because the +linker discards intermediate results and only retains the final value +of an expression. Under such circumstances the linker will display +the final value enclosed by square brackets. Thus for example a +linker script containing: +.Sp +.Vb 3 +\& foo = 1 +\& foo = foo * 4 +\& foo = foo + 8 +.Ve +.Sp +will produce the following output in the link map if the \fB\-M\fR +option is used: +.Sp +.Vb 3 +\& 0x00000001 foo = 0x1 +\& [0x0000000c] foo = (foo * 0x4) +\& [0x0000000c] foo = (foo + 0x8) +.Ve +.Sp +See \fBExpressions\fR for more information about expressions in linker +scripts. +.RE +.RS 4 +.RE +.IP "\fB\-n\fR" 4 +.IX Item "-n" +.PD 0 +.IP "\fB\-\-nmagic\fR" 4 +.IX Item "--nmagic" +.PD +Turn off page alignment of sections, and disable linking against shared +libraries. If the output format supports Unix style magic numbers, +mark the output as \f(CW\*(C`NMAGIC\*(C'\fR. +.IP "\fB\-N\fR" 4 +.IX Item "-N" +.PD 0 +.IP "\fB\-\-omagic\fR" 4 +.IX Item "--omagic" +.PD +Set the text and data sections to be readable and writable. Also, do +not page-align the data segment, and disable linking against shared +libraries. If the output format supports Unix style magic numbers, +mark the output as \f(CW\*(C`OMAGIC\*(C'\fR. Note: Although a writable text section +is allowed for PE-COFF targets, it does not conform to the format +specification published by Microsoft. +.IP "\fB\-\-no\-omagic\fR" 4 +.IX Item "--no-omagic" +This option negates most of the effects of the \fB\-N\fR option. It +sets the text section to be read-only, and forces the data segment to +be page-aligned. Note \- this option does not enable linking against +shared libraries. Use \fB\-Bdynamic\fR for this. +.IP "\fB\-o\fR \fIoutput\fR" 4 +.IX Item "-o output" +.PD 0 +.IP "\fB\-\-output=\fR\fIoutput\fR" 4 +.IX Item "--output=output" +.PD +Use \fIoutput\fR as the name for the program produced by \fBld\fR; if this +option is not specified, the name \fIa.out\fR is used by default. The +script command \f(CW\*(C`OUTPUT\*(C'\fR can also specify the output file name. +.IP "\fB\-O\fR \fIlevel\fR" 4 +.IX Item "-O level" +If \fIlevel\fR is a numeric values greater than zero \fBld\fR optimizes +the output. This might take significantly longer and therefore probably +should only be enabled for the final binary. At the moment this +option only affects \s-1ELF\s0 shared library generation. Future releases of +the linker may make more use of this option. Also currently there is +no difference in the linker's behaviour for different non-zero values +of this option. Again this may change with future releases. +.IP "\fB\-q\fR" 4 +.IX Item "-q" +.PD 0 +.IP "\fB\-\-emit\-relocs\fR" 4 +.IX Item "--emit-relocs" +.PD +Leave relocation sections and contents in fully linked executables. +Post link analysis and optimization tools may need this information in +order to perform correct modifications of executables. This results +in larger executables. +.Sp +This option is currently only supported on \s-1ELF\s0 platforms. +.IP "\fB\-\-force\-dynamic\fR" 4 +.IX Item "--force-dynamic" +Force the output file to have dynamic sections. This option is specific +to VxWorks targets. +.IP "\fB\-r\fR" 4 +.IX Item "-r" +.PD 0 +.IP "\fB\-\-relocatable\fR" 4 +.IX Item "--relocatable" +.PD +Generate relocatable output\-\-\-i.e., generate an output file that can in +turn serve as input to \fBld\fR. This is often called \fIpartial +linking\fR. As a side effect, in environments that support standard Unix +magic numbers, this option also sets the output file's magic number to +\&\f(CW\*(C`OMAGIC\*(C'\fR. +If this option is not specified, an absolute file is produced. When +linking \*(C+ programs, this option \fIwill not\fR resolve references to +constructors; to do that, use \fB\-Ur\fR. +.Sp +When an input file does not have the same format as the output file, +partial linking is only supported if that input file does not contain any +relocations. Different output formats can have further restrictions; for +example some \f(CW\*(C`a.out\*(C'\fR\-based formats do not support partial linking +with input files in other formats at all. +.Sp +This option does the same thing as \fB\-i\fR. +.IP "\fB\-R\fR \fIfilename\fR" 4 +.IX Item "-R filename" +.PD 0 +.IP "\fB\-\-just\-symbols=\fR\fIfilename\fR" 4 +.IX Item "--just-symbols=filename" +.PD +Read symbol names and their addresses from \fIfilename\fR, but do not +relocate it or include it in the output. This allows your output file +to refer symbolically to absolute locations of memory defined in other +programs. You may use this option more than once. +.Sp +For compatibility with other \s-1ELF\s0 linkers, if the \fB\-R\fR option is +followed by a directory name, rather than a file name, it is treated as +the \fB\-rpath\fR option. +.IP "\fB\-s\fR" 4 +.IX Item "-s" +.PD 0 +.IP "\fB\-\-strip\-all\fR" 4 +.IX Item "--strip-all" +.PD +Omit all symbol information from the output file. +.IP "\fB\-S\fR" 4 +.IX Item "-S" +.PD 0 +.IP "\fB\-\-strip\-debug\fR" 4 +.IX Item "--strip-debug" +.PD +Omit debugger symbol information (but not all symbols) from the output file. +.IP "\fB\-t\fR" 4 +.IX Item "-t" +.PD 0 +.IP "\fB\-\-trace\fR" 4 +.IX Item "--trace" +.PD +Print the names of the input files as \fBld\fR processes them. +.IP "\fB\-T\fR \fIscriptfile\fR" 4 +.IX Item "-T scriptfile" +.PD 0 +.IP "\fB\-\-script=\fR\fIscriptfile\fR" 4 +.IX Item "--script=scriptfile" +.PD +Use \fIscriptfile\fR as the linker script. This script replaces +\&\fBld\fR's default linker script (rather than adding to it), so +\&\fIcommandfile\fR must specify everything necessary to describe the +output file. If \fIscriptfile\fR does not exist in +the current directory, \f(CW\*(C`ld\*(C'\fR looks for it in the directories +specified by any preceding \fB\-L\fR options. Multiple \fB\-T\fR +options accumulate. +.IP "\fB\-dT\fR \fIscriptfile\fR" 4 +.IX Item "-dT scriptfile" +.PD 0 +.IP "\fB\-\-default\-script=\fR\fIscriptfile\fR" 4 +.IX Item "--default-script=scriptfile" +.PD +Use \fIscriptfile\fR as the default linker script. +.Sp +This option is similar to the \fB\-\-script\fR option except that +processing of the script is delayed until after the rest of the +command line has been processed. This allows options placed after the +\&\fB\-\-default\-script\fR option on the command line to affect the +behaviour of the linker script, which can be important when the linker +command line cannot be directly controlled by the user. (eg because +the command line is being constructed by another tool, such as +\&\fBgcc\fR). +.IP "\fB\-u\fR \fIsymbol\fR" 4 +.IX Item "-u symbol" +.PD 0 +.IP "\fB\-\-undefined=\fR\fIsymbol\fR" 4 +.IX Item "--undefined=symbol" +.PD +Force \fIsymbol\fR to be entered in the output file as an undefined +symbol. Doing this may, for example, trigger linking of additional +modules from standard libraries. \fB\-u\fR may be repeated with +different option arguments to enter additional undefined symbols. This +option is equivalent to the \f(CW\*(C`EXTERN\*(C'\fR linker script command. +.IP "\fB\-Ur\fR" 4 +.IX Item "-Ur" +For anything other than \*(C+ programs, this option is equivalent to +\&\fB\-r\fR: it generates relocatable output\-\-\-i.e., an output file that can in +turn serve as input to \fBld\fR. When linking \*(C+ programs, \fB\-Ur\fR +\&\fIdoes\fR resolve references to constructors, unlike \fB\-r\fR. +It does not work to use \fB\-Ur\fR on files that were themselves linked +with \fB\-Ur\fR; once the constructor table has been built, it cannot +be added to. Use \fB\-Ur\fR only for the last partial link, and +\&\fB\-r\fR for the others. +.IP "\fB\-\-unique[=\fR\fI\s-1SECTION\s0\fR\fB]\fR" 4 +.IX Item "--unique[=SECTION]" +Creates a separate output section for every input section matching +\&\fI\s-1SECTION\s0\fR, or if the optional wildcard \fI\s-1SECTION\s0\fR argument is +missing, for every orphan input section. An orphan section is one not +specifically mentioned in a linker script. You may use this option +multiple times on the command line; It prevents the normal merging of +input sections with the same name, overriding output section assignments +in a linker script. +.IP "\fB\-v\fR" 4 +.IX Item "-v" +.PD 0 +.IP "\fB\-\-version\fR" 4 +.IX Item "--version" +.IP "\fB\-V\fR" 4 +.IX Item "-V" +.PD +Display the version number for \fBld\fR. The \fB\-V\fR option also +lists the supported emulations. +.IP "\fB\-x\fR" 4 +.IX Item "-x" +.PD 0 +.IP "\fB\-\-discard\-all\fR" 4 +.IX Item "--discard-all" +.PD +Delete all local symbols. +.IP "\fB\-X\fR" 4 +.IX Item "-X" +.PD 0 +.IP "\fB\-\-discard\-locals\fR" 4 +.IX Item "--discard-locals" +.PD +Delete all temporary local symbols. (These symbols start with +system-specific local label prefixes, typically \fB.L\fR for \s-1ELF\s0 systems +or \fBL\fR for traditional a.out systems.) +.IP "\fB\-y\fR \fIsymbol\fR" 4 +.IX Item "-y symbol" +.PD 0 +.IP "\fB\-\-trace\-symbol=\fR\fIsymbol\fR" 4 +.IX Item "--trace-symbol=symbol" +.PD +Print the name of each linked file in which \fIsymbol\fR appears. This +option may be given any number of times. On many systems it is necessary +to prepend an underscore. +.Sp +This option is useful when you have an undefined symbol in your link but +don't know where the reference is coming from. +.IP "\fB\-Y\fR \fIpath\fR" 4 +.IX Item "-Y path" +Add \fIpath\fR to the default library search path. This option exists +for Solaris compatibility. +.IP "\fB\-z\fR \fIkeyword\fR" 4 +.IX Item "-z keyword" +The recognized keywords are: +.RS 4 +.IP "\fBcombreloc\fR" 4 +.IX Item "combreloc" +Combines multiple reloc sections and sorts them to make dynamic symbol +lookup caching possible. +.IP "\fBdefs\fR" 4 +.IX Item "defs" +Disallows undefined symbols in object files. Undefined symbols in +shared libraries are still allowed. +.IP "\fBexecstack\fR" 4 +.IX Item "execstack" +Marks the object as requiring executable stack. +.IP "\fBinitfirst\fR" 4 +.IX Item "initfirst" +This option is only meaningful when building a shared object. +It marks the object so that its runtime initialization will occur +before the runtime initialization of any other objects brought into +the process at the same time. Similarly the runtime finalization of +the object will occur after the runtime finalization of any other +objects. +.IP "\fBinterpose\fR" 4 +.IX Item "interpose" +Marks the object that its symbol table interposes before all symbols +but the primary executable. +.IP "\fBlazy\fR" 4 +.IX Item "lazy" +When generating an executable or shared library, mark it to tell the +dynamic linker to defer function call resolution to the point when +the function is called (lazy binding), rather than at load time. +Lazy binding is the default. +.IP "\fBloadfltr\fR" 4 +.IX Item "loadfltr" +Marks the object that its filters be processed immediately at +runtime. +.IP "\fBmuldefs\fR" 4 +.IX Item "muldefs" +Allows multiple definitions. +.IP "\fBnocombreloc\fR" 4 +.IX Item "nocombreloc" +Disables multiple reloc sections combining. +.IP "\fBnocopyreloc\fR" 4 +.IX Item "nocopyreloc" +Disables production of copy relocs. +.IP "\fBnodefaultlib\fR" 4 +.IX Item "nodefaultlib" +Marks the object that the search for dependencies of this object will +ignore any default library search paths. +.IP "\fBnodelete\fR" 4 +.IX Item "nodelete" +Marks the object shouldn't be unloaded at runtime. +.IP "\fBnodlopen\fR" 4 +.IX Item "nodlopen" +Marks the object not available to \f(CW\*(C`dlopen\*(C'\fR. +.IP "\fBnodump\fR" 4 +.IX Item "nodump" +Marks the object can not be dumped by \f(CW\*(C`dldump\*(C'\fR. +.IP "\fBnoexecstack\fR" 4 +.IX Item "noexecstack" +Marks the object as not requiring executable stack. +.IP "\fBnorelro\fR" 4 +.IX Item "norelro" +Don't create an \s-1ELF\s0 \f(CW\*(C`PT_GNU_RELRO\*(C'\fR segment header in the object. +.IP "\fBnow\fR" 4 +.IX Item "now" +When generating an executable or shared library, mark it to tell the +dynamic linker to resolve all symbols when the program is started, or +when the shared library is linked to using dlopen, instead of +deferring function call resolution to the point when the function is +first called. +.IP "\fBorigin\fR" 4 +.IX Item "origin" +Marks the object may contain \f(CW$ORIGIN\fR. +.IP "\fBrelro\fR" 4 +.IX Item "relro" +Create an \s-1ELF\s0 \f(CW\*(C`PT_GNU_RELRO\*(C'\fR segment header in the object. +.IP "\fBmax\-page\-size=\fR\fIvalue\fR" 4 +.IX Item "max-page-size=value" +Set the emulation maximum page size to \fIvalue\fR. +.IP "\fBcommon\-page\-size=\fR\fIvalue\fR" 4 +.IX Item "common-page-size=value" +Set the emulation common page size to \fIvalue\fR. +.RE +.RS 4 +.Sp +Other keywords are ignored for Solaris compatibility. +.RE +.IP "\fB\-(\fR \fIarchives\fR \fB\-)\fR" 4 +.IX Item "-( archives -)" +.PD 0 +.IP "\fB\-\-start\-group\fR \fIarchives\fR \fB\-\-end\-group\fR" 4 +.IX Item "--start-group archives --end-group" +.PD +The \fIarchives\fR should be a list of archive files. They may be +either explicit file names, or \fB\-l\fR options. +.Sp +The specified archives are searched repeatedly until no new undefined +references are created. Normally, an archive is searched only once in +the order that it is specified on the command line. If a symbol in that +archive is needed to resolve an undefined symbol referred to by an +object in an archive that appears later on the command line, the linker +would not be able to resolve that reference. By grouping the archives, +they all be searched repeatedly until all possible references are +resolved. +.Sp +Using this option has a significant performance cost. It is best to use +it only when there are unavoidable circular references between two or +more archives. +.IP "\fB\-\-accept\-unknown\-input\-arch\fR" 4 +.IX Item "--accept-unknown-input-arch" +.PD 0 +.IP "\fB\-\-no\-accept\-unknown\-input\-arch\fR" 4 +.IX Item "--no-accept-unknown-input-arch" +.PD +Tells the linker to accept input files whose architecture cannot be +recognised. The assumption is that the user knows what they are doing +and deliberately wants to link in these unknown input files. This was +the default behaviour of the linker, before release 2.14. The default +behaviour from release 2.14 onwards is to reject such input files, and +so the \fB\-\-accept\-unknown\-input\-arch\fR option has been added to +restore the old behaviour. +.IP "\fB\-\-as\-needed\fR" 4 +.IX Item "--as-needed" +.PD 0 +.IP "\fB\-\-no\-as\-needed\fR" 4 +.IX Item "--no-as-needed" +.PD +This option affects \s-1ELF\s0 \s-1DT_NEEDED\s0 tags for dynamic libraries mentioned +on the command line after the \fB\-\-as\-needed\fR option. Normally +the linker will add a \s-1DT_NEEDED\s0 tag for each dynamic library mentioned +on the command line, regardless of whether the library is actually +needed or not. \fB\-\-as\-needed\fR causes a \s-1DT_NEEDED\s0 tag to only be +emitted for a library that satisfies an undefined symbol reference +from a regular object file or, if the library is not found in the +\&\s-1DT_NEEDED\s0 lists of other libraries linked up to that point, an +undefined symbol reference from another dynamic library. +\&\fB\-\-no\-as\-needed\fR restores the default behaviour. +.IP "\fB\-\-add\-needed\fR" 4 +.IX Item "--add-needed" +.PD 0 +.IP "\fB\-\-no\-add\-needed\fR" 4 +.IX Item "--no-add-needed" +.PD +These two options have been deprecated because of the similarity of +their names to the \fB\-\-as\-needed\fR and \fB\-\-no\-as\-needed\fR +options. They have been replaced by \fB\-\-copy\-dt\-needed\-entries\fR +and \fB\-\-no\-copy\-dt\-needed\-entries\fR. +.IP "\fB\-assert\fR \fIkeyword\fR" 4 +.IX Item "-assert keyword" +This option is ignored for SunOS compatibility. +.IP "\fB\-Bdynamic\fR" 4 +.IX Item "-Bdynamic" +.PD 0 +.IP "\fB\-dy\fR" 4 +.IX Item "-dy" +.IP "\fB\-call_shared\fR" 4 +.IX Item "-call_shared" +.PD +Link against dynamic libraries. This is only meaningful on platforms +for which shared libraries are supported. This option is normally the +default on such platforms. The different variants of this option are +for compatibility with various systems. You may use this option +multiple times on the command line: it affects library searching for +\&\fB\-l\fR options which follow it. +.IP "\fB\-Bgroup\fR" 4 +.IX Item "-Bgroup" +Set the \f(CW\*(C`DF_1_GROUP\*(C'\fR flag in the \f(CW\*(C`DT_FLAGS_1\*(C'\fR entry in the dynamic +section. This causes the runtime linker to handle lookups in this +object and its dependencies to be performed only inside the group. +\&\fB\-\-unresolved\-symbols=report\-all\fR is implied. This option is +only meaningful on \s-1ELF\s0 platforms which support shared libraries. +.IP "\fB\-Bstatic\fR" 4 +.IX Item "-Bstatic" +.PD 0 +.IP "\fB\-dn\fR" 4 +.IX Item "-dn" +.IP "\fB\-non_shared\fR" 4 +.IX Item "-non_shared" +.IP "\fB\-static\fR" 4 +.IX Item "-static" +.PD +Do not link against shared libraries. This is only meaningful on +platforms for which shared libraries are supported. The different +variants of this option are for compatibility with various systems. You +may use this option multiple times on the command line: it affects +library searching for \fB\-l\fR options which follow it. This +option also implies \fB\-\-unresolved\-symbols=report\-all\fR. This +option can be used with \fB\-shared\fR. Doing so means that a +shared library is being created but that all of the library's external +references must be resolved by pulling in entries from static +libraries. +.IP "\fB\-Bsymbolic\fR" 4 +.IX Item "-Bsymbolic" +When creating a shared library, bind references to global symbols to the +definition within the shared library, if any. Normally, it is possible +for a program linked against a shared library to override the definition +within the shared library. This option is only meaningful on \s-1ELF\s0 +platforms which support shared libraries. +.IP "\fB\-Bsymbolic\-functions\fR" 4 +.IX Item "-Bsymbolic-functions" +When creating a shared library, bind references to global function +symbols to the definition within the shared library, if any. +This option is only meaningful on \s-1ELF\s0 platforms which support shared +libraries. +.IP "\fB\-\-dynamic\-list=\fR\fIdynamic-list-file\fR" 4 +.IX Item "--dynamic-list=dynamic-list-file" +Specify the name of a dynamic list file to the linker. This is +typically used when creating shared libraries to specify a list of +global symbols whose references shouldn't be bound to the definition +within the shared library, or creating dynamically linked executables +to specify a list of symbols which should be added to the symbol table +in the executable. This option is only meaningful on \s-1ELF\s0 platforms +which support shared libraries. +.Sp +The format of the dynamic list is the same as the version node without +scope and node name. See \fB\s-1VERSION\s0\fR for more information. +.IP "\fB\-\-dynamic\-list\-data\fR" 4 +.IX Item "--dynamic-list-data" +Include all global data symbols to the dynamic list. +.IP "\fB\-\-dynamic\-list\-cpp\-new\fR" 4 +.IX Item "--dynamic-list-cpp-new" +Provide the builtin dynamic list for \*(C+ operator new and delete. It +is mainly useful for building shared libstdc++. +.IP "\fB\-\-dynamic\-list\-cpp\-typeinfo\fR" 4 +.IX Item "--dynamic-list-cpp-typeinfo" +Provide the builtin dynamic list for \*(C+ runtime type identification. +.IP "\fB\-\-check\-sections\fR" 4 +.IX Item "--check-sections" +.PD 0 +.IP "\fB\-\-no\-check\-sections\fR" 4 +.IX Item "--no-check-sections" +.PD +Asks the linker \fInot\fR to check section addresses after they have +been assigned to see if there are any overlaps. Normally the linker will +perform this check, and if it finds any overlaps it will produce +suitable error messages. The linker does know about, and does make +allowances for sections in overlays. The default behaviour can be +restored by using the command line switch \fB\-\-check\-sections\fR. +Section overlap is not usually checked for relocatable links. You can +force checking in that case by using the \fB\-\-check\-sections\fR +option. +.IP "\fB\-\-copy\-dt\-needed\-entries\fR" 4 +.IX Item "--copy-dt-needed-entries" +.PD 0 +.IP "\fB\-\-no\-copy\-dt\-needed\-entries\fR" 4 +.IX Item "--no-copy-dt-needed-entries" +.PD +This option affects the treatment of dynamic libraries referred to +by \s-1DT_NEEDED\s0 tags \fIinside\fR \s-1ELF\s0 dynamic libraries mentioned on the +command line. Normally the linker won't add a \s-1DT_NEEDED\s0 tag to the +output binary for each library mentioned in a \s-1DT_NEEDED\s0 tag in an +input dynamic library. With \fB\-\-copy\-dt\-needed\-entries\fR +specified on the command line however any dynamic libraries that +follow it will have their \s-1DT_NEEDED\s0 entries added. The default +behaviour can be restored with \fB\-\-no\-copy\-dt\-needed\-entries\fR. +.Sp +This option also has an effect on the resolution of symbols in dynamic +libraries. With \fB\-\-copy\-dt\-needed\-entries\fR dynamic libraries +mentioned on the command line will be recursively searched, following +their \s-1DT_NEEDED\s0 tags to other libraries, in order to resolve symbols +required by the output binary. With the default setting however +the searching of dynamic libraries that follow it will stop with the +dynamic library itself. No \s-1DT_NEEDED\s0 links will be traversed to resolve +symbols. +.IP "\fB\-\-cref\fR" 4 +.IX Item "--cref" +Output a cross reference table. If a linker map file is being +generated, the cross reference table is printed to the map file. +Otherwise, it is printed on the standard output. +.Sp +The format of the table is intentionally simple, so that it may be +easily processed by a script if necessary. The symbols are printed out, +sorted by name. For each symbol, a list of file names is given. If the +symbol is defined, the first file listed is the location of the +definition. The remaining files contain references to the symbol. +.IP "\fB\-\-no\-define\-common\fR" 4 +.IX Item "--no-define-common" +This option inhibits the assignment of addresses to common symbols. +The script command \f(CW\*(C`INHIBIT_COMMON_ALLOCATION\*(C'\fR has the same effect. +.Sp +The \fB\-\-no\-define\-common\fR option allows decoupling +the decision to assign addresses to Common symbols from the choice +of the output file type; otherwise a non-Relocatable output type +forces assigning addresses to Common symbols. +Using \fB\-\-no\-define\-common\fR allows Common symbols that are referenced +from a shared library to be assigned addresses only in the main program. +This eliminates the unused duplicate space in the shared library, +and also prevents any possible confusion over resolving to the wrong +duplicate when there are many dynamic modules with specialized search +paths for runtime symbol resolution. +.IP "\fB\-\-defsym=\fR\fIsymbol\fR\fB=\fR\fIexpression\fR" 4 +.IX Item "--defsym=symbol=expression" +Create a global symbol in the output file, containing the absolute +address given by \fIexpression\fR. You may use this option as many +times as necessary to define multiple symbols in the command line. A +limited form of arithmetic is supported for the \fIexpression\fR in this +context: you may give a hexadecimal constant or the name of an existing +symbol, or use \f(CW\*(C`+\*(C'\fR and \f(CW\*(C`\-\*(C'\fR to add or subtract hexadecimal +constants or symbols. If you need more elaborate expressions, consider +using the linker command language from a script. \fINote:\fR there should be no white +space between \fIsymbol\fR, the equals sign ("\fB=\fR"), and +\&\fIexpression\fR. +.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4 +.IX Item "--demangle[=style]" +.PD 0 +.IP "\fB\-\-no\-demangle\fR" 4 +.IX Item "--no-demangle" +.PD +These options control whether to demangle symbol names in error messages +and other output. When the linker is told to demangle, it tries to +present symbol names in a readable fashion: it strips leading +underscores if they are used by the object file format, and converts \*(C+ +mangled symbol names into user readable names. Different compilers have +different mangling styles. The optional demangling style argument can be used +to choose an appropriate demangling style for your compiler. The linker will +demangle by default unless the environment variable \fB\s-1COLLECT_NO_DEMANGLE\s0\fR +is set. These options may be used to override the default. +.IP "\fB\-I\fR\fIfile\fR" 4 +.IX Item "-Ifile" +.PD 0 +.IP "\fB\-\-dynamic\-linker=\fR\fIfile\fR" 4 +.IX Item "--dynamic-linker=file" +.PD +Set the name of the dynamic linker. This is only meaningful when +generating dynamically linked \s-1ELF\s0 executables. The default dynamic +linker is normally correct; don't use this unless you know what you are +doing. +.IP "\fB\-\-fatal\-warnings\fR" 4 +.IX Item "--fatal-warnings" +.PD 0 +.IP "\fB\-\-no\-fatal\-warnings\fR" 4 +.IX Item "--no-fatal-warnings" +.PD +Treat all warnings as errors. The default behaviour can be restored +with the option \fB\-\-no\-fatal\-warnings\fR. +.IP "\fB\-\-force\-exe\-suffix\fR" 4 +.IX Item "--force-exe-suffix" +Make sure that an output file has a .exe suffix. +.Sp +If a successfully built fully linked output file does not have a +\&\f(CW\*(C`.exe\*(C'\fR or \f(CW\*(C`.dll\*(C'\fR suffix, this option forces the linker to copy +the output file to one of the same name with a \f(CW\*(C`.exe\*(C'\fR suffix. This +option is useful when using unmodified Unix makefiles on a Microsoft +Windows host, since some versions of Windows won't run an image unless +it ends in a \f(CW\*(C`.exe\*(C'\fR suffix. +.IP "\fB\-\-gc\-sections\fR" 4 +.IX Item "--gc-sections" +.PD 0 +.IP "\fB\-\-no\-gc\-sections\fR" 4 +.IX Item "--no-gc-sections" +.PD +Enable garbage collection of unused input sections. It is ignored on +targets that do not support this option. The default behaviour (of not +performing this garbage collection) can be restored by specifying +\&\fB\-\-no\-gc\-sections\fR on the command line. +.Sp +\&\fB\-\-gc\-sections\fR decides which input sections are used by +examining symbols and relocations. The section containing the entry +symbol and all sections containing symbols undefined on the +command-line will be kept, as will sections containing symbols +referenced by dynamic objects. Note that when building shared +libraries, the linker must assume that any visible symbol is +referenced. Once this initial set of sections has been determined, +the linker recursively marks as used any section referenced by their +relocations. See \fB\-\-entry\fR and \fB\-\-undefined\fR. +.Sp +This option can be set when doing a partial link (enabled with option +\&\fB\-r\fR). In this case the root of symbols kept must be explicitly +specified either by an \fB\-\-entry\fR or \fB\-\-undefined\fR option or by +a \f(CW\*(C`ENTRY\*(C'\fR command in the linker script. +.IP "\fB\-\-print\-gc\-sections\fR" 4 +.IX Item "--print-gc-sections" +.PD 0 +.IP "\fB\-\-no\-print\-gc\-sections\fR" 4 +.IX Item "--no-print-gc-sections" +.PD +List all sections removed by garbage collection. The listing is +printed on stderr. This option is only effective if garbage +collection has been enabled via the \fB\-\-gc\-sections\fR) option. The +default behaviour (of not listing the sections that are removed) can +be restored by specifying \fB\-\-no\-print\-gc\-sections\fR on the command +line. +.IP "\fB\-\-print\-output\-format\fR" 4 +.IX Item "--print-output-format" +Print the name of the default output format (perhaps influenced by +other command-line options). This is the string that would appear +in an \f(CW\*(C`OUTPUT_FORMAT\*(C'\fR linker script command. +.IP "\fB\-\-help\fR" 4 +.IX Item "--help" +Print a summary of the command-line options on the standard output and exit. +.IP "\fB\-\-target\-help\fR" 4 +.IX Item "--target-help" +Print a summary of all target specific options on the standard output and exit. +.IP "\fB\-Map=\fR\fImapfile\fR" 4 +.IX Item "-Map=mapfile" +Print a link map to the file \fImapfile\fR. See the description of the +\&\fB\-M\fR option, above. +.IP "\fB\-\-no\-keep\-memory\fR" 4 +.IX Item "--no-keep-memory" +\&\fBld\fR normally optimizes for speed over memory usage by caching the +symbol tables of input files in memory. This option tells \fBld\fR to +instead optimize for memory usage, by rereading the symbol tables as +necessary. This may be required if \fBld\fR runs out of memory space +while linking a large executable. +.IP "\fB\-\-no\-undefined\fR" 4 +.IX Item "--no-undefined" +.PD 0 +.IP "\fB\-z defs\fR" 4 +.IX Item "-z defs" +.PD +Report unresolved symbol references from regular object files. This +is done even if the linker is creating a non-symbolic shared library. +The switch \fB\-\-[no\-]allow\-shlib\-undefined\fR controls the +behaviour for reporting unresolved references found in shared +libraries being linked in. +.IP "\fB\-\-allow\-multiple\-definition\fR" 4 +.IX Item "--allow-multiple-definition" +.PD 0 +.IP "\fB\-z muldefs\fR" 4 +.IX Item "-z muldefs" +.PD +Normally when a symbol is defined multiple times, the linker will +report a fatal error. These options allow multiple definitions and the +first definition will be used. +.IP "\fB\-\-allow\-shlib\-undefined\fR" 4 +.IX Item "--allow-shlib-undefined" +.PD 0 +.IP "\fB\-\-no\-allow\-shlib\-undefined\fR" 4 +.IX Item "--no-allow-shlib-undefined" +.PD +Allows or disallows undefined symbols in shared libraries. +This switch is similar to \fB\-\-no\-undefined\fR except that it +determines the behaviour when the undefined symbols are in a +shared library rather than a regular object file. It does not affect +how undefined symbols in regular object files are handled. +.Sp +The default behaviour is to report errors for any undefined symbols +referenced in shared libraries if the linker is being used to create +an executable, but to allow them if the linker is being used to create +a shared library. +.Sp +The reasons for allowing undefined symbol references in shared +libraries specified at link time are that: +.RS 4 +.IP "\(bu" 4 +A shared library specified at link time may not be the same as the one +that is available at load time, so the symbol might actually be +resolvable at load time. +.IP "\(bu" 4 +There are some operating systems, eg BeOS and \s-1HPPA\s0, where undefined +symbols in shared libraries are normal. +.Sp +The BeOS kernel for example patches shared libraries at load time to +select whichever function is most appropriate for the current +architecture. This is used, for example, to dynamically select an +appropriate memset function. +.RE +.RS 4 +.RE +.IP "\fB\-\-no\-undefined\-version\fR" 4 +.IX Item "--no-undefined-version" +Normally when a symbol has an undefined version, the linker will ignore +it. This option disallows symbols with undefined version and a fatal error +will be issued instead. +.IP "\fB\-\-default\-symver\fR" 4 +.IX Item "--default-symver" +Create and use a default symbol version (the soname) for unversioned +exported symbols. +.IP "\fB\-\-default\-imported\-symver\fR" 4 +.IX Item "--default-imported-symver" +Create and use a default symbol version (the soname) for unversioned +imported symbols. +.IP "\fB\-\-no\-warn\-mismatch\fR" 4 +.IX Item "--no-warn-mismatch" +Normally \fBld\fR will give an error if you try to link together input +files that are mismatched for some reason, perhaps because they have +been compiled for different processors or for different endiannesses. +This option tells \fBld\fR that it should silently permit such possible +errors. This option should only be used with care, in cases when you +have taken some special action that ensures that the linker errors are +inappropriate. +.IP "\fB\-\-no\-warn\-search\-mismatch\fR" 4 +.IX Item "--no-warn-search-mismatch" +Normally \fBld\fR will give a warning if it finds an incompatible +library during a library search. This option silences the warning. +.IP "\fB\-\-no\-whole\-archive\fR" 4 +.IX Item "--no-whole-archive" +Turn off the effect of the \fB\-\-whole\-archive\fR option for subsequent +archive files. +.IP "\fB\-\-noinhibit\-exec\fR" 4 +.IX Item "--noinhibit-exec" +Retain the executable output file whenever it is still usable. +Normally, the linker will not produce an output file if it encounters +errors during the link process; it exits without writing an output file +when it issues any error whatsoever. +.IP "\fB\-nostdlib\fR" 4 +.IX Item "-nostdlib" +Only search library directories explicitly specified on the +command line. Library directories specified in linker scripts +(including linker scripts specified on the command line) are ignored. +.IP "\fB\-\-oformat=\fR\fIoutput-format\fR" 4 +.IX Item "--oformat=output-format" +\&\fBld\fR may be configured to support more than one kind of object +file. If your \fBld\fR is configured this way, you can use the +\&\fB\-\-oformat\fR option to specify the binary format for the output +object file. Even when \fBld\fR is configured to support alternative +object formats, you don't usually need to specify this, as \fBld\fR +should be configured to produce as a default output format the most +usual format on each machine. \fIoutput-format\fR is a text string, the +name of a particular format supported by the \s-1BFD\s0 libraries. (You can +list the available binary formats with \fBobjdump \-i\fR.) The script +command \f(CW\*(C`OUTPUT_FORMAT\*(C'\fR can also specify the output format, but +this option overrides it. +.IP "\fB\-pie\fR" 4 +.IX Item "-pie" +.PD 0 +.IP "\fB\-\-pic\-executable\fR" 4 +.IX Item "--pic-executable" +.PD +Create a position independent executable. This is currently only supported on +\&\s-1ELF\s0 platforms. Position independent executables are similar to shared +libraries in that they are relocated by the dynamic linker to the virtual +address the \s-1OS\s0 chooses for them (which can vary between invocations). Like +normal dynamically linked executables they can be executed and symbols +defined in the executable cannot be overridden by shared libraries. +.IP "\fB\-qmagic\fR" 4 +.IX Item "-qmagic" +This option is ignored for Linux compatibility. +.IP "\fB\-Qy\fR" 4 +.IX Item "-Qy" +This option is ignored for \s-1SVR4\s0 compatibility. +.IP "\fB\-\-relax\fR" 4 +.IX Item "--relax" +.PD 0 +.IP "\fB\-\-no\-relax\fR" 4 +.IX Item "--no-relax" +.PD +An option with machine dependent effects. +This option is only supported on a few targets. +.Sp +On some platforms the \fB\-\-relax\fR option performs target specific, +global optimizations that become possible when the linker resolves +addressing in the program, such as relaxing address modes, +synthesizing new instructions, selecting shorter version of current +instructions, and combinig constant values. +.Sp +On some platforms these link time global optimizations may make symbolic +debugging of the resulting executable impossible. +This is known to be the case for the Matsushita \s-1MN10200\s0 and \s-1MN10300\s0 +family of processors. +.Sp +On platforms where this is not supported, \fB\-\-relax\fR is accepted, +but ignored. +.Sp +On platforms where \fB\-\-relax\fR is accepted the option +\&\fB\-\-no\-relax\fR can be used to disable the feature. +.IP "\fB\-\-retain\-symbols\-file=\fR\fIfilename\fR" 4 +.IX Item "--retain-symbols-file=filename" +Retain \fIonly\fR the symbols listed in the file \fIfilename\fR, +discarding all others. \fIfilename\fR is simply a flat file, with one +symbol name per line. This option is especially useful in environments +(such as VxWorks) +where a large global symbol table is accumulated gradually, to conserve +run-time memory. +.Sp +\&\fB\-\-retain\-symbols\-file\fR does \fInot\fR discard undefined symbols, +or symbols needed for relocations. +.Sp +You may only specify \fB\-\-retain\-symbols\-file\fR once in the command +line. It overrides \fB\-s\fR and \fB\-S\fR. +.IP "\fB\-rpath=\fR\fIdir\fR" 4 +.IX Item "-rpath=dir" +Add a directory to the runtime library search path. This is used when +linking an \s-1ELF\s0 executable with shared objects. All \fB\-rpath\fR +arguments are concatenated and passed to the runtime linker, which uses +them to locate shared objects at runtime. The \fB\-rpath\fR option is +also used when locating shared objects which are needed by shared +objects explicitly included in the link; see the description of the +\&\fB\-rpath\-link\fR option. If \fB\-rpath\fR is not used when linking an +\&\s-1ELF\s0 executable, the contents of the environment variable +\&\f(CW\*(C`LD_RUN_PATH\*(C'\fR will be used if it is defined. +.Sp +The \fB\-rpath\fR option may also be used on SunOS. By default, on +SunOS, the linker will form a runtime search patch out of all the +\&\fB\-L\fR options it is given. If a \fB\-rpath\fR option is used, the +runtime search path will be formed exclusively using the \fB\-rpath\fR +options, ignoring the \fB\-L\fR options. This can be useful when using +gcc, which adds many \fB\-L\fR options which may be on \s-1NFS\s0 mounted +file systems. +.Sp +For compatibility with other \s-1ELF\s0 linkers, if the \fB\-R\fR option is +followed by a directory name, rather than a file name, it is treated as +the \fB\-rpath\fR option. +.IP "\fB\-rpath\-link=\fR\fIdir\fR" 4 +.IX Item "-rpath-link=dir" +When using \s-1ELF\s0 or SunOS, one shared library may require another. This +happens when an \f(CW\*(C`ld \-shared\*(C'\fR link includes a shared library as one +of the input files. +.Sp +When the linker encounters such a dependency when doing a non-shared, +non-relocatable link, it will automatically try to locate the required +shared library and include it in the link, if it is not included +explicitly. In such a case, the \fB\-rpath\-link\fR option +specifies the first set of directories to search. The +\&\fB\-rpath\-link\fR option may specify a sequence of directory names +either by specifying a list of names separated by colons, or by +appearing multiple times. +.Sp +This option should be used with caution as it overrides the search path +that may have been hard compiled into a shared library. In such a case it +is possible to use unintentionally a different search path than the +runtime linker would do. +.Sp +The linker uses the following search paths to locate required shared +libraries: +.RS 4 +.IP "1." 4 +Any directories specified by \fB\-rpath\-link\fR options. +.IP "2." 4 +Any directories specified by \fB\-rpath\fR options. The difference +between \fB\-rpath\fR and \fB\-rpath\-link\fR is that directories +specified by \fB\-rpath\fR options are included in the executable and +used at runtime, whereas the \fB\-rpath\-link\fR option is only effective +at link time. Searching \fB\-rpath\fR in this way is only supported +by native linkers and cross linkers which have been configured with +the \fB\-\-with\-sysroot\fR option. +.IP "3." 4 +On an \s-1ELF\s0 system, for native linkers, if the \fB\-rpath\fR and +\&\fB\-rpath\-link\fR options were not used, search the contents of the +environment variable \f(CW\*(C`LD_RUN_PATH\*(C'\fR. +.IP "4." 4 +On SunOS, if the \fB\-rpath\fR option was not used, search any +directories specified using \fB\-L\fR options. +.IP "5." 4 +For a native linker, the search the contents of the environment +variable \f(CW\*(C`LD_LIBRARY_PATH\*(C'\fR. +.IP "6." 4 +For a native \s-1ELF\s0 linker, the directories in \f(CW\*(C`DT_RUNPATH\*(C'\fR or +\&\f(CW\*(C`DT_RPATH\*(C'\fR of a shared library are searched for shared +libraries needed by it. The \f(CW\*(C`DT_RPATH\*(C'\fR entries are ignored if +\&\f(CW\*(C`DT_RUNPATH\*(C'\fR entries exist. +.IP "7." 4 +The default directories, normally \fI/lib\fR and \fI/usr/lib\fR. +.IP "8." 4 +For a native linker on an \s-1ELF\s0 system, if the file \fI/etc/ld.so.conf\fR +exists, the list of directories found in that file. +.RE +.RS 4 +.Sp +If the required shared library is not found, the linker will issue a +warning and continue with the link. +.RE +.IP "\fB\-shared\fR" 4 +.IX Item "-shared" +.PD 0 +.IP "\fB\-Bshareable\fR" 4 +.IX Item "-Bshareable" +.PD +Create a shared library. This is currently only supported on \s-1ELF\s0, \s-1XCOFF\s0 +and SunOS platforms. On SunOS, the linker will automatically create a +shared library if the \fB\-e\fR option is not used and there are +undefined symbols in the link. +.IP "\fB\-\-sort\-common\fR" 4 +.IX Item "--sort-common" +.PD 0 +.IP "\fB\-\-sort\-common=ascending\fR" 4 +.IX Item "--sort-common=ascending" +.IP "\fB\-\-sort\-common=descending\fR" 4 +.IX Item "--sort-common=descending" +.PD +This option tells \fBld\fR to sort the common symbols by alignment in +ascending or descending order when it places them in the appropriate output +sections. The symbol alignments considered are sixteen-byte or larger, +eight-byte, four-byte, two-byte, and one-byte. This is to prevent gaps +between symbols due to alignment constraints. If no sorting order is +specified, then descending order is assumed. +.IP "\fB\-\-sort\-section=name\fR" 4 +.IX Item "--sort-section=name" +This option will apply \f(CW\*(C`SORT_BY_NAME\*(C'\fR to all wildcard section +patterns in the linker script. +.IP "\fB\-\-sort\-section=alignment\fR" 4 +.IX Item "--sort-section=alignment" +This option will apply \f(CW\*(C`SORT_BY_ALIGNMENT\*(C'\fR to all wildcard section +patterns in the linker script. +.IP "\fB\-\-split\-by\-file[=\fR\fIsize\fR\fB]\fR" 4 +.IX Item "--split-by-file[=size]" +Similar to \fB\-\-split\-by\-reloc\fR but creates a new output section for +each input file when \fIsize\fR is reached. \fIsize\fR defaults to a +size of 1 if not given. +.IP "\fB\-\-split\-by\-reloc[=\fR\fIcount\fR\fB]\fR" 4 +.IX Item "--split-by-reloc[=count]" +Tries to creates extra sections in the output file so that no single +output section in the file contains more than \fIcount\fR relocations. +This is useful when generating huge relocatable files for downloading into +certain real time kernels with the \s-1COFF\s0 object file format; since \s-1COFF\s0 +cannot represent more than 65535 relocations in a single section. Note +that this will fail to work with object file formats which do not +support arbitrary sections. The linker will not split up individual +input sections for redistribution, so if a single input section contains +more than \fIcount\fR relocations one output section will contain that +many relocations. \fIcount\fR defaults to a value of 32768. +.IP "\fB\-\-stats\fR" 4 +.IX Item "--stats" +Compute and display statistics about the operation of the linker, such +as execution time and memory usage. +.IP "\fB\-\-sysroot=\fR\fIdirectory\fR" 4 +.IX Item "--sysroot=directory" +Use \fIdirectory\fR as the location of the sysroot, overriding the +configure-time default. This option is only supported by linkers +that were configured using \fB\-\-with\-sysroot\fR. +.IP "\fB\-\-traditional\-format\fR" 4 +.IX Item "--traditional-format" +For some targets, the output of \fBld\fR is different in some ways from +the output of some existing linker. This switch requests \fBld\fR to +use the traditional format instead. +.Sp +For example, on SunOS, \fBld\fR combines duplicate entries in the +symbol string table. This can reduce the size of an output file with +full debugging information by over 30 percent. Unfortunately, the SunOS +\&\f(CW\*(C`dbx\*(C'\fR program can not read the resulting program (\f(CW\*(C`gdb\*(C'\fR has no +trouble). The \fB\-\-traditional\-format\fR switch tells \fBld\fR to not +combine duplicate entries. +.IP "\fB\-\-section\-start=\fR\fIsectionname\fR\fB=\fR\fIorg\fR" 4 +.IX Item "--section-start=sectionname=org" +Locate a section in the output file at the absolute +address given by \fIorg\fR. You may use this option as many +times as necessary to locate multiple sections in the command +line. +\&\fIorg\fR must be a single hexadecimal integer; +for compatibility with other linkers, you may omit the leading +\&\fB0x\fR usually associated with hexadecimal values. \fINote:\fR there +should be no white space between \fIsectionname\fR, the equals +sign ("\fB=\fR"), and \fIorg\fR. +.IP "\fB\-Tbss=\fR\fIorg\fR" 4 +.IX Item "-Tbss=org" +.PD 0 +.IP "\fB\-Tdata=\fR\fIorg\fR" 4 +.IX Item "-Tdata=org" +.IP "\fB\-Ttext=\fR\fIorg\fR" 4 +.IX Item "-Ttext=org" +.PD +Same as \fB\-\-section\-start\fR, with \f(CW\*(C`.bss\*(C'\fR, \f(CW\*(C`.data\*(C'\fR or +\&\f(CW\*(C`.text\*(C'\fR as the \fIsectionname\fR. +.IP "\fB\-Ttext\-segment=\fR\fIorg\fR" 4 +.IX Item "-Ttext-segment=org" +When creating an \s-1ELF\s0 executable or shared object, it will set the address +of the first byte of the text segment. +.IP "\fB\-\-unresolved\-symbols=\fR\fImethod\fR" 4 +.IX Item "--unresolved-symbols=method" +Determine how to handle unresolved symbols. There are four possible +values for \fBmethod\fR: +.RS 4 +.IP "\fBignore-all\fR" 4 +.IX Item "ignore-all" +Do not report any unresolved symbols. +.IP "\fBreport-all\fR" 4 +.IX Item "report-all" +Report all unresolved symbols. This is the default. +.IP "\fBignore-in-object-files\fR" 4 +.IX Item "ignore-in-object-files" +Report unresolved symbols that are contained in shared libraries, but +ignore them if they come from regular object files. +.IP "\fBignore-in-shared-libs\fR" 4 +.IX Item "ignore-in-shared-libs" +Report unresolved symbols that come from regular object files, but +ignore them if they come from shared libraries. This can be useful +when creating a dynamic binary and it is known that all the shared +libraries that it should be referencing are included on the linker's +command line. +.RE +.RS 4 +.Sp +The behaviour for shared libraries on their own can also be controlled +by the \fB\-\-[no\-]allow\-shlib\-undefined\fR option. +.Sp +Normally the linker will generate an error message for each reported +unresolved symbol but the option \fB\-\-warn\-unresolved\-symbols\fR +can change this to a warning. +.RE +.IP "\fB\-\-dll\-verbose\fR" 4 +.IX Item "--dll-verbose" +.PD 0 +.IP "\fB\-\-verbose[=\fR\fI\s-1NUMBER\s0\fR\fB]\fR" 4 +.IX Item "--verbose[=NUMBER]" +.PD +Display the version number for \fBld\fR and list the linker emulations +supported. Display which input files can and cannot be opened. Display +the linker script being used by the linker. If the optional \fI\s-1NUMBER\s0\fR +argument > 1, plugin symbol status will also be displayed. +.IP "\fB\-\-version\-script=\fR\fIversion-scriptfile\fR" 4 +.IX Item "--version-script=version-scriptfile" +Specify the name of a version script to the linker. This is typically +used when creating shared libraries to specify additional information +about the version hierarchy for the library being created. This option +is only fully supported on \s-1ELF\s0 platforms which support shared libraries; +see \fB\s-1VERSION\s0\fR. It is partially supported on \s-1PE\s0 platforms, which can +use version scripts to filter symbol visibility in auto-export mode: any +symbols marked \fBlocal\fR in the version script will not be exported. +.IP "\fB\-\-warn\-common\fR" 4 +.IX Item "--warn-common" +Warn when a common symbol is combined with another common symbol or with +a symbol definition. Unix linkers allow this somewhat sloppy practise, +but linkers on some other operating systems do not. This option allows +you to find potential problems from combining global symbols. +Unfortunately, some C libraries use this practise, so you may get some +warnings about symbols in the libraries as well as in your programs. +.Sp +There are three kinds of global symbols, illustrated here by C examples: +.RS 4 +.IP "\fBint i = 1;\fR" 4 +.IX Item "int i = 1;" +A definition, which goes in the initialized data section of the output +file. +.IP "\fBextern int i;\fR" 4 +.IX Item "extern int i;" +An undefined reference, which does not allocate space. +There must be either a definition or a common symbol for the +variable somewhere. +.IP "\fBint i;\fR" 4 +.IX Item "int i;" +A common symbol. If there are only (one or more) common symbols for a +variable, it goes in the uninitialized data area of the output file. +The linker merges multiple common symbols for the same variable into a +single symbol. If they are of different sizes, it picks the largest +size. The linker turns a common symbol into a declaration, if there is +a definition of the same variable. +.RE +.RS 4 +.Sp +The \fB\-\-warn\-common\fR option can produce five kinds of warnings. +Each warning consists of a pair of lines: the first describes the symbol +just encountered, and the second describes the previous symbol +encountered with the same name. One or both of the two symbols will be +a common symbol. +.IP "1." 4 +Turning a common symbol into a reference, because there is already a +definition for the symbol. +.Sp +.Vb 3 +\& (
): warning: common of \`\*(Aq +\& overridden by definition +\& (
): warning: defined here +.Ve +.IP "2." 4 +Turning a common symbol into a reference, because a later definition for +the symbol is encountered. This is the same as the previous case, +except that the symbols are encountered in a different order. +.Sp +.Vb 3 +\& (
): warning: definition of \`\*(Aq +\& overriding common +\& (
): warning: common is here +.Ve +.IP "3." 4 +Merging a common symbol with a previous same-sized common symbol. +.Sp +.Vb 3 +\& (
): warning: multiple common +\& of \`\*(Aq +\& (
): warning: previous common is here +.Ve +.IP "4." 4 +Merging a common symbol with a previous larger common symbol. +.Sp +.Vb 3 +\& (
): warning: common of \`\*(Aq +\& overridden by larger common +\& (
): warning: larger common is here +.Ve +.IP "5." 4 +Merging a common symbol with a previous smaller common symbol. This is +the same as the previous case, except that the symbols are +encountered in a different order. +.Sp +.Vb 3 +\& (
): warning: common of \`\*(Aq +\& overriding smaller common +\& (
): warning: smaller common is here +.Ve +.RE +.RS 4 +.RE +.IP "\fB\-\-warn\-constructors\fR" 4 +.IX Item "--warn-constructors" +Warn if any global constructors are used. This is only useful for a few +object file formats. For formats like \s-1COFF\s0 or \s-1ELF\s0, the linker can not +detect the use of global constructors. +.IP "\fB\-\-warn\-multiple\-gp\fR" 4 +.IX Item "--warn-multiple-gp" +Warn if multiple global pointer values are required in the output file. +This is only meaningful for certain processors, such as the Alpha. +Specifically, some processors put large-valued constants in a special +section. A special register (the global pointer) points into the middle +of this section, so that constants can be loaded efficiently via a +base-register relative addressing mode. Since the offset in +base-register relative mode is fixed and relatively small (e.g., 16 +bits), this limits the maximum size of the constant pool. Thus, in +large programs, it is often necessary to use multiple global pointer +values in order to be able to address all possible constants. This +option causes a warning to be issued whenever this case occurs. +.IP "\fB\-\-warn\-once\fR" 4 +.IX Item "--warn-once" +Only warn once for each undefined symbol, rather than once per module +which refers to it. +.IP "\fB\-\-warn\-section\-align\fR" 4 +.IX Item "--warn-section-align" +Warn if the address of an output section is changed because of +alignment. Typically, the alignment will be set by an input section. +The address will only be changed if it not explicitly specified; that +is, if the \f(CW\*(C`SECTIONS\*(C'\fR command does not specify a start address for +the section. +.IP "\fB\-\-warn\-shared\-textrel\fR" 4 +.IX Item "--warn-shared-textrel" +Warn if the linker adds a \s-1DT_TEXTREL\s0 to a shared object. +.IP "\fB\-\-warn\-alternate\-em\fR" 4 +.IX Item "--warn-alternate-em" +Warn if an object has alternate \s-1ELF\s0 machine code. +.IP "\fB\-\-warn\-unresolved\-symbols\fR" 4 +.IX Item "--warn-unresolved-symbols" +If the linker is going to report an unresolved symbol (see the option +\&\fB\-\-unresolved\-symbols\fR) it will normally generate an error. +This option makes it generate a warning instead. +.IP "\fB\-\-error\-unresolved\-symbols\fR" 4 +.IX Item "--error-unresolved-symbols" +This restores the linker's default behaviour of generating errors when +it is reporting unresolved symbols. +.IP "\fB\-\-whole\-archive\fR" 4 +.IX Item "--whole-archive" +For each archive mentioned on the command line after the +\&\fB\-\-whole\-archive\fR option, include every object file in the archive +in the link, rather than searching the archive for the required object +files. This is normally used to turn an archive file into a shared +library, forcing every object to be included in the resulting shared +library. This option may be used more than once. +.Sp +Two notes when using this option from gcc: First, gcc doesn't know +about this option, so you have to use \fB\-Wl,\-whole\-archive\fR. +Second, don't forget to use \fB\-Wl,\-no\-whole\-archive\fR after your +list of archives, because gcc will add its own list of archives to +your link and you may not want this flag to affect those as well. +.IP "\fB\-\-wrap=\fR\fIsymbol\fR" 4 +.IX Item "--wrap=symbol" +Use a wrapper function for \fIsymbol\fR. Any undefined reference to +\&\fIsymbol\fR will be resolved to \f(CW\*(C`_\|_wrap_\f(CIsymbol\f(CW\*(C'\fR. Any +undefined reference to \f(CW\*(C`_\|_real_\f(CIsymbol\f(CW\*(C'\fR will be resolved to +\&\fIsymbol\fR. +.Sp +This can be used to provide a wrapper for a system function. The +wrapper function should be called \f(CW\*(C`_\|_wrap_\f(CIsymbol\f(CW\*(C'\fR. If it +wishes to call the system function, it should call +\&\f(CW\*(C`_\|_real_\f(CIsymbol\f(CW\*(C'\fR. +.Sp +Here is a trivial example: +.Sp +.Vb 6 +\& void * +\& _\|_wrap_malloc (size_t c) +\& { +\& printf ("malloc called with %zu\en", c); +\& return _\|_real_malloc (c); +\& } +.Ve +.Sp +If you link other code with this file using \fB\-\-wrap malloc\fR, then +all calls to \f(CW\*(C`malloc\*(C'\fR will call the function \f(CW\*(C`_\|_wrap_malloc\*(C'\fR +instead. The call to \f(CW\*(C`_\|_real_malloc\*(C'\fR in \f(CW\*(C`_\|_wrap_malloc\*(C'\fR will +call the real \f(CW\*(C`malloc\*(C'\fR function. +.Sp +You may wish to provide a \f(CW\*(C`_\|_real_malloc\*(C'\fR function as well, so that +links without the \fB\-\-wrap\fR option will succeed. If you do this, +you should not put the definition of \f(CW\*(C`_\|_real_malloc\*(C'\fR in the same +file as \f(CW\*(C`_\|_wrap_malloc\*(C'\fR; if you do, the assembler may resolve the +call before the linker has a chance to wrap it to \f(CW\*(C`malloc\*(C'\fR. +.IP "\fB\-\-eh\-frame\-hdr\fR" 4 +.IX Item "--eh-frame-hdr" +Request creation of \f(CW\*(C`.eh_frame_hdr\*(C'\fR section and \s-1ELF\s0 +\&\f(CW\*(C`PT_GNU_EH_FRAME\*(C'\fR segment header. +.IP "\fB\-\-no\-ld\-generated\-unwind\-info\fR" 4 +.IX Item "--no-ld-generated-unwind-info" +Request creation of \f(CW\*(C`.eh_frame\*(C'\fR unwind info for linker +generated code sections like \s-1PLT\s0. This option is on by default +if linker generated unwind info is supported. +.IP "\fB\-\-enable\-new\-dtags\fR" 4 +.IX Item "--enable-new-dtags" +.PD 0 +.IP "\fB\-\-disable\-new\-dtags\fR" 4 +.IX Item "--disable-new-dtags" +.PD +This linker can create the new dynamic tags in \s-1ELF\s0. But the older \s-1ELF\s0 +systems may not understand them. If you specify +\&\fB\-\-enable\-new\-dtags\fR, the dynamic tags will be created as needed. +If you specify \fB\-\-disable\-new\-dtags\fR, no new dynamic tags will be +created. By default, the new dynamic tags are not created. Note that +those options are only available for \s-1ELF\s0 systems. +.IP "\fB\-\-hash\-size=\fR\fInumber\fR" 4 +.IX Item "--hash-size=number" +Set the default size of the linker's hash tables to a prime number +close to \fInumber\fR. Increasing this value can reduce the length of +time it takes the linker to perform its tasks, at the expense of +increasing the linker's memory requirements. Similarly reducing this +value can reduce the memory requirements at the expense of speed. +.IP "\fB\-\-hash\-style=\fR\fIstyle\fR" 4 +.IX Item "--hash-style=style" +Set the type of linker's hash table(s). \fIstyle\fR can be either +\&\f(CW\*(C`sysv\*(C'\fR for classic \s-1ELF\s0 \f(CW\*(C`.hash\*(C'\fR section, \f(CW\*(C`gnu\*(C'\fR for +new style \s-1GNU\s0 \f(CW\*(C`.gnu.hash\*(C'\fR section or \f(CW\*(C`both\*(C'\fR for both +the classic \s-1ELF\s0 \f(CW\*(C`.hash\*(C'\fR and new style \s-1GNU\s0 \f(CW\*(C`.gnu.hash\*(C'\fR +hash tables. The default is \f(CW\*(C`sysv\*(C'\fR. +.IP "\fB\-\-reduce\-memory\-overheads\fR" 4 +.IX Item "--reduce-memory-overheads" +This option reduces memory requirements at ld runtime, at the expense of +linking speed. This was introduced to select the old O(n^2) algorithm +for link map file generation, rather than the new O(n) algorithm which uses +about 40% more memory for symbol storage. +.Sp +Another effect of the switch is to set the default hash table size to +1021, which again saves memory at the cost of lengthening the linker's +run time. This is not done however if the \fB\-\-hash\-size\fR switch +has been used. +.Sp +The \fB\-\-reduce\-memory\-overheads\fR switch may be also be used to +enable other tradeoffs in future versions of the linker. +.IP "\fB\-\-build\-id\fR" 4 +.IX Item "--build-id" +.PD 0 +.IP "\fB\-\-build\-id=\fR\fIstyle\fR" 4 +.IX Item "--build-id=style" +.PD +Request creation of \f(CW\*(C`.note.gnu.build\-id\*(C'\fR \s-1ELF\s0 note section. +The contents of the note are unique bits identifying this linked +file. \fIstyle\fR can be \f(CW\*(C`uuid\*(C'\fR to use 128 random bits, +\&\f(CW\*(C`sha1\*(C'\fR to use a 160\-bit \s-1SHA1\s0 hash on the normative +parts of the output contents, \f(CW\*(C`md5\*(C'\fR to use a 128\-bit +\&\s-1MD5\s0 hash on the normative parts of the output contents, or +\&\f(CW\*(C`0x\f(CIhexstring\f(CW\*(C'\fR to use a chosen bit string specified as +an even number of hexadecimal digits (\f(CW\*(C`\-\*(C'\fR and \f(CW\*(C`:\*(C'\fR +characters between digit pairs are ignored). If \fIstyle\fR is +omitted, \f(CW\*(C`sha1\*(C'\fR is used. +.Sp +The \f(CW\*(C`md5\*(C'\fR and \f(CW\*(C`sha1\*(C'\fR styles produces an identifier +that is always the same in an identical output file, but will be +unique among all nonidentical output files. It is not intended +to be compared as a checksum for the file's contents. A linked +file may be changed later by other tools, but the build \s-1ID\s0 bit +string identifying the original linked file does not change. +.Sp +Passing \f(CW\*(C`none\*(C'\fR for \fIstyle\fR disables the setting from any +\&\f(CW\*(C`\-\-build\-id\*(C'\fR options earlier on the command line. +.PP +The i386 \s-1PE\s0 linker supports the \fB\-shared\fR option, which causes +the output to be a dynamically linked library (\s-1DLL\s0) instead of a +normal executable. You should name the output \f(CW\*(C`*.dll\*(C'\fR when you +use this option. In addition, the linker fully supports the standard +\&\f(CW\*(C`*.def\*(C'\fR files, which may be specified on the linker command line +like an object file (in fact, it should precede archives it exports +symbols from, to ensure that they get linked in, just like a normal +object file). +.PP +In addition to the options common to all targets, the i386 \s-1PE\s0 linker +support additional command line options that are specific to the i386 +\&\s-1PE\s0 target. Options that take values may be separated from their +values by either a space or an equals sign. +.IP "\fB\-\-add\-stdcall\-alias\fR" 4 +.IX Item "--add-stdcall-alias" +If given, symbols with a stdcall suffix (@\fInn\fR) will be exported +as-is and also with the suffix stripped. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-base\-file\fR \fIfile\fR" 4 +.IX Item "--base-file file" +Use \fIfile\fR as the name of a file in which to save the base +addresses of all the relocations needed for generating DLLs with +\&\fIdlltool\fR. +[This is an i386 \s-1PE\s0 specific option] +.IP "\fB\-\-dll\fR" 4 +.IX Item "--dll" +Create a \s-1DLL\s0 instead of a regular executable. You may also use +\&\fB\-shared\fR or specify a \f(CW\*(C`LIBRARY\*(C'\fR in a given \f(CW\*(C`.def\*(C'\fR +file. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-enable\-long\-section\-names\fR" 4 +.IX Item "--enable-long-section-names" +.PD 0 +.IP "\fB\-\-disable\-long\-section\-names\fR" 4 +.IX Item "--disable-long-section-names" +.PD +The \s-1PE\s0 variants of the Coff object format add an extension that permits +the use of section names longer than eight characters, the normal limit +for Coff. By default, these names are only allowed in object files, as +fully-linked executable images do not carry the Coff string table required +to support the longer names. As a \s-1GNU\s0 extension, it is possible to +allow their use in executable images as well, or to (probably pointlessly!) +disallow it in object files, by using these two options. Executable images +generated with these long section names are slightly non-standard, carrying +as they do a string table, and may generate confusing output when examined +with non-GNU PE-aware tools, such as file viewers and dumpers. However, +\&\s-1GDB\s0 relies on the use of \s-1PE\s0 long section names to find Dwarf\-2 debug +information sections in an executable image at runtime, and so if neither +option is specified on the command-line, \fBld\fR will enable long +section names, overriding the default and technically correct behaviour, +when it finds the presence of debug information while linking an executable +image and not stripping symbols. +[This option is valid for all \s-1PE\s0 targeted ports of the linker] +.IP "\fB\-\-enable\-stdcall\-fixup\fR" 4 +.IX Item "--enable-stdcall-fixup" +.PD 0 +.IP "\fB\-\-disable\-stdcall\-fixup\fR" 4 +.IX Item "--disable-stdcall-fixup" +.PD +If the link finds a symbol that it cannot resolve, it will attempt to +do \*(L"fuzzy linking\*(R" by looking for another defined symbol that differs +only in the format of the symbol name (cdecl vs stdcall) and will +resolve that symbol by linking to the match. For example, the +undefined symbol \f(CW\*(C`_foo\*(C'\fR might be linked to the function +\&\f(CW\*(C`_foo@12\*(C'\fR, or the undefined symbol \f(CW\*(C`_bar@16\*(C'\fR might be linked +to the function \f(CW\*(C`_bar\*(C'\fR. When the linker does this, it prints a +warning, since it normally should have failed to link, but sometimes +import libraries generated from third-party dlls may need this feature +to be usable. If you specify \fB\-\-enable\-stdcall\-fixup\fR, this +feature is fully enabled and warnings are not printed. If you specify +\&\fB\-\-disable\-stdcall\-fixup\fR, this feature is disabled and such +mismatches are considered to be errors. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-leading\-underscore\fR" 4 +.IX Item "--leading-underscore" +.PD 0 +.IP "\fB\-\-no\-leading\-underscore\fR" 4 +.IX Item "--no-leading-underscore" +.PD +For most targets default symbol-prefix is an underscore and is defined +in target's description. By this option it is possible to +disable/enable the default underscore symbol-prefix. +.IP "\fB\-\-export\-all\-symbols\fR" 4 +.IX Item "--export-all-symbols" +If given, all global symbols in the objects used to build a \s-1DLL\s0 will +be exported by the \s-1DLL\s0. Note that this is the default if there +otherwise wouldn't be any exported symbols. When symbols are +explicitly exported via \s-1DEF\s0 files or implicitly exported via function +attributes, the default is to not export anything else unless this +option is given. Note that the symbols \f(CW\*(C`DllMain@12\*(C'\fR, +\&\f(CW\*(C`DllEntryPoint@0\*(C'\fR, \f(CW\*(C`DllMainCRTStartup@12\*(C'\fR, and +\&\f(CW\*(C`impure_ptr\*(C'\fR will not be automatically +exported. Also, symbols imported from other DLLs will not be +re-exported, nor will symbols specifying the \s-1DLL\s0's internal layout +such as those beginning with \f(CW\*(C`_head_\*(C'\fR or ending with +\&\f(CW\*(C`_iname\*(C'\fR. In addition, no symbols from \f(CW\*(C`libgcc\*(C'\fR, +\&\f(CW\*(C`libstd++\*(C'\fR, \f(CW\*(C`libmingw32\*(C'\fR, or \f(CW\*(C`crtX.o\*(C'\fR will be exported. +Symbols whose names begin with \f(CW\*(C`_\|_rtti_\*(C'\fR or \f(CW\*(C`_\|_builtin_\*(C'\fR will +not be exported, to help with \*(C+ DLLs. Finally, there is an +extensive list of cygwin-private symbols that are not exported +(obviously, this applies on when building DLLs for cygwin targets). +These cygwin-excludes are: \f(CW\*(C`_cygwin_dll_entry@12\*(C'\fR, +\&\f(CW\*(C`_cygwin_crt0_common@8\*(C'\fR, \f(CW\*(C`_cygwin_noncygwin_dll_entry@12\*(C'\fR, +\&\f(CW\*(C`_fmode\*(C'\fR, \f(CW\*(C`_impure_ptr\*(C'\fR, \f(CW\*(C`cygwin_attach_dll\*(C'\fR, +\&\f(CW\*(C`cygwin_premain0\*(C'\fR, \f(CW\*(C`cygwin_premain1\*(C'\fR, \f(CW\*(C`cygwin_premain2\*(C'\fR, +\&\f(CW\*(C`cygwin_premain3\*(C'\fR, and \f(CW\*(C`environ\*(C'\fR. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-exclude\-symbols\fR \fIsymbol\fR\fB,\fR\fIsymbol\fR\fB,...\fR" 4 +.IX Item "--exclude-symbols symbol,symbol,..." +Specifies a list of symbols which should not be automatically +exported. The symbol names may be delimited by commas or colons. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-exclude\-all\-symbols\fR" 4 +.IX Item "--exclude-all-symbols" +Specifies no symbols should be automatically exported. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-file\-alignment\fR" 4 +.IX Item "--file-alignment" +Specify the file alignment. Sections in the file will always begin at +file offsets which are multiples of this number. This defaults to +512. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-heap\fR \fIreserve\fR" 4 +.IX Item "--heap reserve" +.PD 0 +.IP "\fB\-\-heap\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4 +.IX Item "--heap reserve,commit" +.PD +Specify the number of bytes of memory to reserve (and optionally commit) +to be used as heap for this program. The default is 1Mb reserved, 4K +committed. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-image\-base\fR \fIvalue\fR" 4 +.IX Item "--image-base value" +Use \fIvalue\fR as the base address of your program or dll. This is +the lowest memory location that will be used when your program or dll +is loaded. To reduce the need to relocate and improve performance of +your dlls, each should have a unique base address and not overlap any +other dlls. The default is 0x400000 for executables, and 0x10000000 +for dlls. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-kill\-at\fR" 4 +.IX Item "--kill-at" +If given, the stdcall suffixes (@\fInn\fR) will be stripped from +symbols before they are exported. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-large\-address\-aware\fR" 4 +.IX Item "--large-address-aware" +If given, the appropriate bit in the \*(L"Characteristics\*(R" field of the \s-1COFF\s0 +header is set to indicate that this executable supports virtual addresses +greater than 2 gigabytes. This should be used in conjunction with the /3GB +or /USERVA=\fIvalue\fR megabytes switch in the \*(L"[operating systems]\*(R" +section of the \s-1BOOT\s0.INI. Otherwise, this bit has no effect. +[This option is specific to \s-1PE\s0 targeted ports of the linker] +.IP "\fB\-\-major\-image\-version\fR \fIvalue\fR" 4 +.IX Item "--major-image-version value" +Sets the major number of the \*(L"image version\*(R". Defaults to 1. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-major\-os\-version\fR \fIvalue\fR" 4 +.IX Item "--major-os-version value" +Sets the major number of the \*(L"os version\*(R". Defaults to 4. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-major\-subsystem\-version\fR \fIvalue\fR" 4 +.IX Item "--major-subsystem-version value" +Sets the major number of the \*(L"subsystem version\*(R". Defaults to 4. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-minor\-image\-version\fR \fIvalue\fR" 4 +.IX Item "--minor-image-version value" +Sets the minor number of the \*(L"image version\*(R". Defaults to 0. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-minor\-os\-version\fR \fIvalue\fR" 4 +.IX Item "--minor-os-version value" +Sets the minor number of the \*(L"os version\*(R". Defaults to 0. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-minor\-subsystem\-version\fR \fIvalue\fR" 4 +.IX Item "--minor-subsystem-version value" +Sets the minor number of the \*(L"subsystem version\*(R". Defaults to 0. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-output\-def\fR \fIfile\fR" 4 +.IX Item "--output-def file" +The linker will create the file \fIfile\fR which will contain a \s-1DEF\s0 +file corresponding to the \s-1DLL\s0 the linker is generating. This \s-1DEF\s0 file +(which should be called \f(CW\*(C`*.def\*(C'\fR) may be used to create an import +library with \f(CW\*(C`dlltool\*(C'\fR or may be used as a reference to +automatically or implicitly exported symbols. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-out\-implib\fR \fIfile\fR" 4 +.IX Item "--out-implib file" +The linker will create the file \fIfile\fR which will contain an +import lib corresponding to the \s-1DLL\s0 the linker is generating. This +import lib (which should be called \f(CW\*(C`*.dll.a\*(C'\fR or \f(CW\*(C`*.a\*(C'\fR +may be used to link clients against the generated \s-1DLL\s0; this behaviour +makes it possible to skip a separate \f(CW\*(C`dlltool\*(C'\fR import library +creation step. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-enable\-auto\-image\-base\fR" 4 +.IX Item "--enable-auto-image-base" +Automatically choose the image base for DLLs, unless one is specified +using the \f(CW\*(C`\-\-image\-base\*(C'\fR argument. By using a hash generated +from the dllname to create unique image bases for each \s-1DLL\s0, in-memory +collisions and relocations which can delay program execution are +avoided. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-disable\-auto\-image\-base\fR" 4 +.IX Item "--disable-auto-image-base" +Do not automatically generate a unique image base. If there is no +user-specified image base (\f(CW\*(C`\-\-image\-base\*(C'\fR) then use the platform +default. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-dll\-search\-prefix\fR \fIstring\fR" 4 +.IX Item "--dll-search-prefix string" +When linking dynamically to a dll without an import library, +search for \f(CW\*(C`.dll\*(C'\fR in preference to +\&\f(CW\*(C`lib.dll\*(C'\fR. This behaviour allows easy distinction +between DLLs built for the various \*(L"subplatforms\*(R": native, cygwin, +uwin, pw, etc. For instance, cygwin DLLs typically use +\&\f(CW\*(C`\-\-dll\-search\-prefix=cyg\*(C'\fR. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-enable\-auto\-import\fR" 4 +.IX Item "--enable-auto-import" +Do sophisticated linking of \f(CW\*(C`_symbol\*(C'\fR to \f(CW\*(C`_\|_imp_\|_symbol\*(C'\fR for +\&\s-1DATA\s0 imports from DLLs, and create the necessary thunking symbols when +building the import libraries with those \s-1DATA\s0 exports. Note: Use of the +\&'auto\-import' extension will cause the text section of the image file +to be made writable. This does not conform to the PE-COFF format +specification published by Microsoft. +.Sp +Note \- use of the 'auto\-import' extension will also cause read only +data which would normally be placed into the .rdata section to be +placed into the .data section instead. This is in order to work +around a problem with consts that is described here: +http://www.cygwin.com/ml/cygwin/2004\-09/msg01101.html +.Sp +Using 'auto\-import' generally will 'just work' \*(-- but sometimes you may +see this message: +.Sp +"variable '' can't be auto-imported. Please read the +documentation for ld's \f(CW\*(C`\-\-enable\-auto\-import\*(C'\fR for details." +.Sp +This message occurs when some (sub)expression accesses an address +ultimately given by the sum of two constants (Win32 import tables only +allow one). Instances where this may occur include accesses to member +fields of struct variables imported from a \s-1DLL\s0, as well as using a +constant index into an array variable imported from a \s-1DLL\s0. Any +multiword variable (arrays, structs, long long, etc) may trigger +this error condition. However, regardless of the exact data type +of the offending exported variable, ld will always detect it, issue +the warning, and exit. +.Sp +There are several ways to address this difficulty, regardless of the +data type of the exported variable: +.Sp +One way is to use \-\-enable\-runtime\-pseudo\-reloc switch. This leaves the task +of adjusting references in your client code for runtime environment, so +this method works only when runtime environment supports this feature. +.Sp +A second solution is to force one of the 'constants' to be a variable \*(-- +that is, unknown and un-optimizable at compile time. For arrays, +there are two possibilities: a) make the indexee (the array's address) +a variable, or b) make the 'constant' index a variable. Thus: +.Sp +.Vb 3 +\& extern type extern_array[]; +\& extern_array[1] \-\-> +\& { volatile type *t=extern_array; t[1] } +.Ve +.Sp +or +.Sp +.Vb 3 +\& extern type extern_array[]; +\& extern_array[1] \-\-> +\& { volatile int t=1; extern_array[t] } +.Ve +.Sp +For structs (and most other multiword data types) the only option +is to make the struct itself (or the long long, or the ...) variable: +.Sp +.Vb 3 +\& extern struct s extern_struct; +\& extern_struct.field \-\-> +\& { volatile struct s *t=&extern_struct; t\->field } +.Ve +.Sp +or +.Sp +.Vb 3 +\& extern long long extern_ll; +\& extern_ll \-\-> +\& { volatile long long * local_ll=&extern_ll; *local_ll } +.Ve +.Sp +A third method of dealing with this difficulty is to abandon +\&'auto\-import' for the offending symbol and mark it with +\&\f(CW\*(C`_\|_declspec(dllimport)\*(C'\fR. However, in practise that +requires using compile-time #defines to indicate whether you are +building a \s-1DLL\s0, building client code that will link to the \s-1DLL\s0, or +merely building/linking to a static library. In making the choice +between the various methods of resolving the 'direct address with +constant offset' problem, you should consider typical real-world usage: +.Sp +Original: +.Sp +.Vb 7 +\& \-\-foo.h +\& extern int arr[]; +\& \-\-foo.c +\& #include "foo.h" +\& void main(int argc, char **argv){ +\& printf("%d\en",arr[1]); +\& } +.Ve +.Sp +Solution 1: +.Sp +.Vb 9 +\& \-\-foo.h +\& extern int arr[]; +\& \-\-foo.c +\& #include "foo.h" +\& void main(int argc, char **argv){ +\& /* This workaround is for win32 and cygwin; do not "optimize" */ +\& volatile int *parr = arr; +\& printf("%d\en",parr[1]); +\& } +.Ve +.Sp +Solution 2: +.Sp +.Vb 10 +\& \-\-foo.h +\& /* Note: auto\-export is assumed (no _\|_declspec(dllexport)) */ +\& #if (defined(_WIN32) || defined(_\|_CYGWIN_\|_)) && \e +\& !(defined(FOO_BUILD_DLL) || defined(FOO_STATIC)) +\& #define FOO_IMPORT _\|_declspec(dllimport) +\& #else +\& #define FOO_IMPORT +\& #endif +\& extern FOO_IMPORT int arr[]; +\& \-\-foo.c +\& #include "foo.h" +\& void main(int argc, char **argv){ +\& printf("%d\en",arr[1]); +\& } +.Ve +.Sp +A fourth way to avoid this problem is to re-code your +library to use a functional interface rather than a data interface +for the offending variables (e.g. \fIset_foo()\fR and \fIget_foo()\fR accessor +functions). +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-disable\-auto\-import\fR" 4 +.IX Item "--disable-auto-import" +Do not attempt to do sophisticated linking of \f(CW\*(C`_symbol\*(C'\fR to +\&\f(CW\*(C`_\|_imp_\|_symbol\*(C'\fR for \s-1DATA\s0 imports from DLLs. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-enable\-runtime\-pseudo\-reloc\fR" 4 +.IX Item "--enable-runtime-pseudo-reloc" +If your code contains expressions described in \-\-enable\-auto\-import section, +that is, \s-1DATA\s0 imports from \s-1DLL\s0 with non-zero offset, this switch will create +a vector of 'runtime pseudo relocations' which can be used by runtime +environment to adjust references to such data in your client code. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-disable\-runtime\-pseudo\-reloc\fR" 4 +.IX Item "--disable-runtime-pseudo-reloc" +Do not create pseudo relocations for non-zero offset \s-1DATA\s0 imports from +DLLs. This is the default. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-enable\-extra\-pe\-debug\fR" 4 +.IX Item "--enable-extra-pe-debug" +Show additional debug info related to auto-import symbol thunking. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-section\-alignment\fR" 4 +.IX Item "--section-alignment" +Sets the section alignment. Sections in memory will always begin at +addresses which are a multiple of this number. Defaults to 0x1000. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-stack\fR \fIreserve\fR" 4 +.IX Item "--stack reserve" +.PD 0 +.IP "\fB\-\-stack\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4 +.IX Item "--stack reserve,commit" +.PD +Specify the number of bytes of memory to reserve (and optionally commit) +to be used as stack for this program. The default is 2Mb reserved, 4K +committed. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.IP "\fB\-\-subsystem\fR \fIwhich\fR" 4 +.IX Item "--subsystem which" +.PD 0 +.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR" 4 +.IX Item "--subsystem which:major" +.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR\fB.\fR\fIminor\fR" 4 +.IX Item "--subsystem which:major.minor" +.PD +Specifies the subsystem under which your program will execute. The +legal values for \fIwhich\fR are \f(CW\*(C`native\*(C'\fR, \f(CW\*(C`windows\*(C'\fR, +\&\f(CW\*(C`console\*(C'\fR, \f(CW\*(C`posix\*(C'\fR, and \f(CW\*(C`xbox\*(C'\fR. You may optionally set +the subsystem version also. Numeric values are also accepted for +\&\fIwhich\fR. +[This option is specific to the i386 \s-1PE\s0 targeted port of the linker] +.Sp +The following options set flags in the \f(CW\*(C`DllCharacteristics\*(C'\fR field +of the \s-1PE\s0 file header: +[These options are specific to \s-1PE\s0 targeted ports of the linker] +.IP "\fB\-\-dynamicbase\fR" 4 +.IX Item "--dynamicbase" +The image base address may be relocated using address space layout +randomization (\s-1ASLR\s0). This feature was introduced with \s-1MS\s0 Windows +Vista for i386 \s-1PE\s0 targets. +.IP "\fB\-\-forceinteg\fR" 4 +.IX Item "--forceinteg" +Code integrity checks are enforced. +.IP "\fB\-\-nxcompat\fR" 4 +.IX Item "--nxcompat" +The image is compatible with the Data Execution Prevention. +This feature was introduced with \s-1MS\s0 Windows \s-1XP\s0 \s-1SP2\s0 for i386 \s-1PE\s0 targets. +.IP "\fB\-\-no\-isolation\fR" 4 +.IX Item "--no-isolation" +Although the image understands isolation, do not isolate the image. +.IP "\fB\-\-no\-seh\fR" 4 +.IX Item "--no-seh" +The image does not use \s-1SEH\s0. No \s-1SE\s0 handler may be called from +this image. +.IP "\fB\-\-no\-bind\fR" 4 +.IX Item "--no-bind" +Do not bind this image. +.IP "\fB\-\-wdmdriver\fR" 4 +.IX Item "--wdmdriver" +The driver uses the \s-1MS\s0 Windows Driver Model. +.IP "\fB\-\-tsaware\fR" 4 +.IX Item "--tsaware" +The image is Terminal Server aware. +.PP +The C6X uClinux target uses a binary format called \s-1DSBT\s0 to support shared +libraries. Each shared library in the system needs to have a unique index; +all executables use an index of 0. +.IP "\fB\-\-dsbt\-size\fR \fIsize\fR" 4 +.IX Item "--dsbt-size size" +This option sets the number of entires in the \s-1DSBT\s0 of the current executable +or shared library to \fIsize\fR. The default is to create a table with 64 +entries. +.IP "\fB\-\-dsbt\-index\fR \fIindex\fR" 4 +.IX Item "--dsbt-index index" +This option sets the \s-1DSBT\s0 index of the current executable or shared library +to \fIindex\fR. The default is 0, which is appropriate for generating +executables. If a shared library is generated with a \s-1DSBT\s0 index of 0, the +\&\f(CW\*(C`R_C6000_DSBT_INDEX\*(C'\fR relocs are copied into the output file. +.Sp +The \fB\-\-no\-merge\-exidx\-entries\fR switch disables the merging of adjacent +exidx entries in frame unwind info. +.PP +The 68HC11 and 68HC12 linkers support specific options to control the +memory bank switching mapping and trampoline code generation. +.IP "\fB\-\-no\-trampoline\fR" 4 +.IX Item "--no-trampoline" +This option disables the generation of trampoline. By default a trampoline +is generated for each far function which is called using a \f(CW\*(C`jsr\*(C'\fR +instruction (this happens when a pointer to a far function is taken). +.IP "\fB\-\-bank\-window\fR \fIname\fR" 4 +.IX Item "--bank-window name" +This option indicates to the linker the name of the memory region in +the \fB\s-1MEMORY\s0\fR specification that describes the memory bank window. +The definition of such region is then used by the linker to compute +paging and addresses within the memory window. +.PP +The following options are supported to control handling of \s-1GOT\s0 generation +when linking for 68K targets. +.IP "\fB\-\-got=\fR\fItype\fR" 4 +.IX Item "--got=type" +This option tells the linker which \s-1GOT\s0 generation scheme to use. +\&\fItype\fR should be one of \fBsingle\fR, \fBnegative\fR, +\&\fBmultigot\fR or \fBtarget\fR. For more information refer to the +Info entry for \fIld\fR. +.SH "ENVIRONMENT" +.IX Header "ENVIRONMENT" +You can change the behaviour of \fBld\fR with the environment variables +\&\f(CW\*(C`GNUTARGET\*(C'\fR, +\&\f(CW\*(C`LDEMULATION\*(C'\fR and \f(CW\*(C`COLLECT_NO_DEMANGLE\*(C'\fR. +.PP +\&\f(CW\*(C`GNUTARGET\*(C'\fR determines the input-file object format if you don't +use \fB\-b\fR (or its synonym \fB\-\-format\fR). Its value should be one +of the \s-1BFD\s0 names for an input format. If there is no +\&\f(CW\*(C`GNUTARGET\*(C'\fR in the environment, \fBld\fR uses the natural format +of the target. If \f(CW\*(C`GNUTARGET\*(C'\fR is set to \f(CW\*(C`default\*(C'\fR then \s-1BFD\s0 +attempts to discover the input format by examining binary input files; +this method often succeeds, but there are potential ambiguities, since +there is no method of ensuring that the magic number used to specify +object-file formats is unique. However, the configuration procedure for +\&\s-1BFD\s0 on each system places the conventional format for that system first +in the search-list, so ambiguities are resolved in favor of convention. +.PP +\&\f(CW\*(C`LDEMULATION\*(C'\fR determines the default emulation if you don't use the +\&\fB\-m\fR option. The emulation can affect various aspects of linker +behaviour, particularly the default linker script. You can list the +available emulations with the \fB\-\-verbose\fR or \fB\-V\fR options. If +the \fB\-m\fR option is not used, and the \f(CW\*(C`LDEMULATION\*(C'\fR environment +variable is not defined, the default emulation depends upon how the +linker was configured. +.PP +Normally, the linker will default to demangling symbols. However, if +\&\f(CW\*(C`COLLECT_NO_DEMANGLE\*(C'\fR is set in the environment, then it will +default to not demangling symbols. This environment variable is used in +a similar fashion by the \f(CW\*(C`gcc\*(C'\fR linker wrapper program. The default +may be overridden by the \fB\-\-demangle\fR and \fB\-\-no\-demangle\fR +options. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fIar\fR\|(1), \fInm\fR\|(1), \fIobjcopy\fR\|(1), \fIobjdump\fR\|(1), \fIreadelf\fR\|(1) and +the Info entries for \fIbinutils\fR and +\&\fIld\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, +1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free +Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, with no Front-Cover Texts, and with no +Back-Cover Texts. A copy of the license is included in the +section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". diff --git a/ld/ld.h b/ld/ld.h index 9391923..a18b265 100644 --- a/ld/ld.h +++ b/ld/ld.h @@ -96,6 +96,7 @@ struct wildcard_spec { const char *name; struct name_list *exclude_name_list; sort_type sorted; + struct flag_info *section_flag_list; }; struct wildcard_list { @@ -199,6 +200,9 @@ typedef struct { input files. */ bfd_boolean accept_unknown_input_arch; + /* If TRUE we'll just print the default output on stdout. */ + bfd_boolean print_output_format; + /* Big or little endian as set on command line. */ enum endian_enum endian; diff --git a/ld/ld.info b/ld/ld.info new file mode 100644 index 0000000..8d42dde --- /dev/null +++ b/ld/ld.info @@ -0,0 +1,7964 @@ +This is ld.info, produced by makeinfo version 4.8 from ld.texinfo. + +INFO-DIR-SECTION Software development +START-INFO-DIR-ENTRY +* Ld: (ld). The GNU linker. +END-INFO-DIR-ENTRY + + This file documents the GNU linker LD (GNU Binutils) version 2.21.90. + + Copyright (C) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free +Software Foundation, Inc. + + Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License, Version 1.3 or +any later version published by the Free Software Foundation; with no +Invariant Sections, with no Front-Cover Texts, and with no Back-Cover +Texts. A copy of the license is included in the section entitled "GNU +Free Documentation License". + + +File: ld.info, Node: Top, Next: Overview, Up: (dir) + +LD +** + +This file documents the GNU linker ld (GNU Binutils) version 2.21.90. + + This document is distributed under the terms of the GNU Free +Documentation License version 1.3. A copy of the license is included +in the section entitled "GNU Free Documentation License". + +* Menu: + +* Overview:: Overview +* Invocation:: Invocation +* Scripts:: Linker Scripts + +* Machine Dependent:: Machine Dependent Features + +* BFD:: BFD + +* Reporting Bugs:: Reporting Bugs +* MRI:: MRI Compatible Script Files +* GNU Free Documentation License:: GNU Free Documentation License +* LD Index:: LD Index + + +File: ld.info, Node: Overview, Next: Invocation, Prev: Top, Up: Top + +1 Overview +********** + +`ld' combines a number of object and archive files, relocates their +data and ties up symbol references. Usually the last step in compiling +a program is to run `ld'. + + `ld' accepts Linker Command Language files written in a superset of +AT&T's Link Editor Command Language syntax, to provide explicit and +total control over the linking process. + + This version of `ld' uses the general purpose BFD libraries to +operate on object files. This allows `ld' to read, combine, and write +object files in many different formats--for example, COFF or `a.out'. +Different formats may be linked together to produce any available kind +of object file. *Note BFD::, for more information. + + Aside from its flexibility, the GNU linker is more helpful than other +linkers in providing diagnostic information. Many linkers abandon +execution immediately upon encountering an error; whenever possible, +`ld' continues executing, allowing you to identify other errors (or, in +some cases, to get an output file in spite of the error). + + +File: ld.info, Node: Invocation, Next: Scripts, Prev: Overview, Up: Top + +2 Invocation +************ + +The GNU linker `ld' is meant to cover a broad range of situations, and +to be as compatible as possible with other linkers. As a result, you +have many choices to control its behavior. + +* Menu: + +* Options:: Command Line Options +* Environment:: Environment Variables + + +File: ld.info, Node: Options, Next: Environment, Up: Invocation + +2.1 Command Line Options +======================== + + The linker supports a plethora of command-line options, but in actual +practice few of them are used in any particular context. For instance, +a frequent use of `ld' is to link standard Unix object files on a +standard, supported Unix system. On such a system, to link a file +`hello.o': + + ld -o OUTPUT /lib/crt0.o hello.o -lc + + This tells `ld' to produce a file called OUTPUT as the result of +linking the file `/lib/crt0.o' with `hello.o' and the library `libc.a', +which will come from the standard search directories. (See the +discussion of the `-l' option below.) + + Some of the command-line options to `ld' may be specified at any +point in the command line. However, options which refer to files, such +as `-l' or `-T', cause the file to be read at the point at which the +option appears in the command line, relative to the object files and +other file options. Repeating non-file options with a different +argument will either have no further effect, or override prior +occurrences (those further to the left on the command line) of that +option. Options which may be meaningfully specified more than once are +noted in the descriptions below. + + Non-option arguments are object files or archives which are to be +linked together. They may follow, precede, or be mixed in with +command-line options, except that an object file argument may not be +placed between an option and its argument. + + Usually the linker is invoked with at least one object file, but you +can specify other forms of binary input files using `-l', `-R', and the +script command language. If _no_ binary input files at all are +specified, the linker does not produce any output, and issues the +message `No input files'. + + If the linker cannot recognize the format of an object file, it will +assume that it is a linker script. A script specified in this way +augments the main linker script used for the link (either the default +linker script or the one specified by using `-T'). This feature +permits the linker to link against a file which appears to be an object +or an archive, but actually merely defines some symbol values, or uses +`INPUT' or `GROUP' to load other objects. Specifying a script in this +way merely augments the main linker script, with the extra commands +placed after the main script; use the `-T' option to replace the +default linker script entirely, but note the effect of the `INSERT' +command. *Note Scripts::. + + For options whose names are a single letter, option arguments must +either follow the option letter without intervening whitespace, or be +given as separate arguments immediately following the option that +requires them. + + For options whose names are multiple letters, either one dash or two +can precede the option name; for example, `-trace-symbol' and +`--trace-symbol' are equivalent. Note--there is one exception to this +rule. Multiple letter options that start with a lower case 'o' can +only be preceded by two dashes. This is to reduce confusion with the +`-o' option. So for example `-omagic' sets the output file name to +`magic' whereas `--omagic' sets the NMAGIC flag on the output. + + Arguments to multiple-letter options must either be separated from +the option name by an equals sign, or be given as separate arguments +immediately following the option that requires them. For example, +`--trace-symbol foo' and `--trace-symbol=foo' are equivalent. Unique +abbreviations of the names of multiple-letter options are accepted. + + Note--if the linker is being invoked indirectly, via a compiler +driver (e.g. `gcc') then all the linker command line options should be +prefixed by `-Wl,' (or whatever is appropriate for the particular +compiler driver) like this: + + gcc -Wl,--start-group foo.o bar.o -Wl,--end-group + + This is important, because otherwise the compiler driver program may +silently drop the linker options, resulting in a bad link. Confusion +may also arise when passing options that require values through a +driver, as the use of a space between option and argument acts as a +separator, and causes the driver to pass only the option to the linker +and the argument to the compiler. In this case, it is simplest to use +the joined forms of both single- and multiple-letter options, such as: + + gcc foo.o bar.o -Wl,-eENTRY -Wl,-Map=a.map + + Here is a table of the generic command line switches accepted by the +GNU linker: + +`@FILE' + Read command-line options from FILE. The options read are + inserted in place of the original @FILE option. If FILE does not + exist, or cannot be read, then the option will be treated + literally, and not removed. + + Options in FILE are separated by whitespace. A whitespace + character may be included in an option by surrounding the entire + option in either single or double quotes. Any character + (including a backslash) may be included by prefixing the character + to be included with a backslash. The FILE may itself contain + additional @FILE options; any such options will be processed + recursively. + +`-a KEYWORD' + This option is supported for HP/UX compatibility. The KEYWORD + argument must be one of the strings `archive', `shared', or + `default'. `-aarchive' is functionally equivalent to `-Bstatic', + and the other two keywords are functionally equivalent to + `-Bdynamic'. This option may be used any number of times. + +`--audit AUDITLIB' + Adds AUDITLIB to the `DT_AUDIT' entry of the dynamic section. + AUDITLIB is not checked for existence, nor will it use the + DT_SONAME specified in the library. If specified multiple times + `DT_AUDIT' will contain a colon separated list of audit interfaces + to use. If the linker finds an object with an audit entry while + searching for shared libraries, it will add a corresponding + `DT_DEPAUDIT' entry in the output file. This option is only + meaningful on ELF platforms supporting the rtld-audit interface. + +`-A ARCHITECTURE' +`--architecture=ARCHITECTURE' + In the current release of `ld', this option is useful only for the + Intel 960 family of architectures. In that `ld' configuration, the + ARCHITECTURE argument identifies the particular architecture in + the 960 family, enabling some safeguards and modifying the + archive-library search path. *Note `ld' and the Intel 960 family: + i960, for details. + + Future releases of `ld' may support similar functionality for + other architecture families. + +`-b INPUT-FORMAT' +`--format=INPUT-FORMAT' + `ld' may be configured to support more than one kind of object + file. If your `ld' is configured this way, you can use the `-b' + option to specify the binary format for input object files that + follow this option on the command line. Even when `ld' is + configured to support alternative object formats, you don't + usually need to specify this, as `ld' should be configured to + expect as a default input format the most usual format on each + machine. INPUT-FORMAT is a text string, the name of a particular + format supported by the BFD libraries. (You can list the + available binary formats with `objdump -i'.) *Note BFD::. + + You may want to use this option if you are linking files with an + unusual binary format. You can also use `-b' to switch formats + explicitly (when linking object files of different formats), by + including `-b INPUT-FORMAT' before each group of object files in a + particular format. + + The default format is taken from the environment variable + `GNUTARGET'. *Note Environment::. You can also define the input + format from a script, using the command `TARGET'; see *Note Format + Commands::. + +`-c MRI-COMMANDFILE' +`--mri-script=MRI-COMMANDFILE' + For compatibility with linkers produced by MRI, `ld' accepts script + files written in an alternate, restricted command language, + described in *Note MRI Compatible Script Files: MRI. Introduce + MRI script files with the option `-c'; use the `-T' option to run + linker scripts written in the general-purpose `ld' scripting + language. If MRI-CMDFILE does not exist, `ld' looks for it in the + directories specified by any `-L' options. + +`-d' +`-dc' +`-dp' + These three options are equivalent; multiple forms are supported + for compatibility with other linkers. They assign space to common + symbols even if a relocatable output file is specified (with + `-r'). The script command `FORCE_COMMON_ALLOCATION' has the same + effect. *Note Miscellaneous Commands::. + +`--depaudit AUDITLIB' +`-P AUDITLIB' + Adds AUDITLIB to the `DT_DEPAUDIT' entry of the dynamic section. + AUDITLIB is not checked for existence, nor will it use the + DT_SONAME specified in the library. If specified multiple times + `DT_DEPAUDIT' will contain a colon separated list of audit + interfaces to use. This option is only meaningful on ELF + platforms supporting the rtld-audit interface. The -P option is + provided for Solaris compatibility. + +`-e ENTRY' +`--entry=ENTRY' + Use ENTRY as the explicit symbol for beginning execution of your + program, rather than the default entry point. If there is no + symbol named ENTRY, the linker will try to parse ENTRY as a number, + and use that as the entry address (the number will be interpreted + in base 10; you may use a leading `0x' for base 16, or a leading + `0' for base 8). *Note Entry Point::, for a discussion of defaults + and other ways of specifying the entry point. + +`--exclude-libs LIB,LIB,...' + Specifies a list of archive libraries from which symbols should + not be automatically exported. The library names may be delimited + by commas or colons. Specifying `--exclude-libs ALL' excludes + symbols in all archive libraries from automatic export. This + option is available only for the i386 PE targeted port of the + linker and for ELF targeted ports. For i386 PE, symbols + explicitly listed in a .def file are still exported, regardless of + this option. For ELF targeted ports, symbols affected by this + option will be treated as hidden. + +`--exclude-modules-for-implib MODULE,MODULE,...' + Specifies a list of object files or archive members, from which + symbols should not be automatically exported, but which should be + copied wholesale into the import library being generated during + the link. The module names may be delimited by commas or colons, + and must match exactly the filenames used by `ld' to open the + files; for archive members, this is simply the member name, but + for object files the name listed must include and match precisely + any path used to specify the input file on the linker's + command-line. This option is available only for the i386 PE + targeted port of the linker. Symbols explicitly listed in a .def + file are still exported, regardless of this option. + +`-E' +`--export-dynamic' +`--no-export-dynamic' + When creating a dynamically linked executable, using the `-E' + option or the `--export-dynamic' option causes the linker to add + all symbols to the dynamic symbol table. The dynamic symbol table + is the set of symbols which are visible from dynamic objects at + run time. + + If you do not use either of these options (or use the + `--no-export-dynamic' option to restore the default behavior), the + dynamic symbol table will normally contain only those symbols + which are referenced by some dynamic object mentioned in the link. + + If you use `dlopen' to load a dynamic object which needs to refer + back to the symbols defined by the program, rather than some other + dynamic object, then you will probably need to use this option when + linking the program itself. + + You can also use the dynamic list to control what symbols should + be added to the dynamic symbol table if the output format supports + it. See the description of `--dynamic-list'. + + Note that this option is specific to ELF targeted ports. PE + targets support a similar function to export all symbols from a + DLL or EXE; see the description of `--export-all-symbols' below. + +`-EB' + Link big-endian objects. This affects the default output format. + +`-EL' + Link little-endian objects. This affects the default output + format. + +`-f NAME' +`--auxiliary=NAME' + When creating an ELF shared object, set the internal DT_AUXILIARY + field to the specified name. This tells the dynamic linker that + the symbol table of the shared object should be used as an + auxiliary filter on the symbol table of the shared object NAME. + + If you later link a program against this filter object, then, when + you run the program, the dynamic linker will see the DT_AUXILIARY + field. If the dynamic linker resolves any symbols from the filter + object, it will first check whether there is a definition in the + shared object NAME. If there is one, it will be used instead of + the definition in the filter object. The shared object NAME need + not exist. Thus the shared object NAME may be used to provide an + alternative implementation of certain functions, perhaps for + debugging or for machine specific performance. + + This option may be specified more than once. The DT_AUXILIARY + entries will be created in the order in which they appear on the + command line. + +`-F NAME' +`--filter=NAME' + When creating an ELF shared object, set the internal DT_FILTER + field to the specified name. This tells the dynamic linker that + the symbol table of the shared object which is being created + should be used as a filter on the symbol table of the shared + object NAME. + + If you later link a program against this filter object, then, when + you run the program, the dynamic linker will see the DT_FILTER + field. The dynamic linker will resolve symbols according to the + symbol table of the filter object as usual, but it will actually + link to the definitions found in the shared object NAME. Thus the + filter object can be used to select a subset of the symbols + provided by the object NAME. + + Some older linkers used the `-F' option throughout a compilation + toolchain for specifying object-file format for both input and + output object files. The GNU linker uses other mechanisms for + this purpose: the `-b', `--format', `--oformat' options, the + `TARGET' command in linker scripts, and the `GNUTARGET' + environment variable. The GNU linker will ignore the `-F' option + when not creating an ELF shared object. + +`-fini=NAME' + When creating an ELF executable or shared object, call NAME when + the executable or shared object is unloaded, by setting DT_FINI to + the address of the function. By default, the linker uses `_fini' + as the function to call. + +`-g' + Ignored. Provided for compatibility with other tools. + +`-G VALUE' +`--gpsize=VALUE' + Set the maximum size of objects to be optimized using the GP + register to SIZE. This is only meaningful for object file formats + such as MIPS ECOFF which supports putting large and small objects + into different sections. This is ignored for other object file + formats. + +`-h NAME' +`-soname=NAME' + When creating an ELF shared object, set the internal DT_SONAME + field to the specified name. When an executable is linked with a + shared object which has a DT_SONAME field, then when the + executable is run the dynamic linker will attempt to load the + shared object specified by the DT_SONAME field rather than the + using the file name given to the linker. + +`-i' + Perform an incremental link (same as option `-r'). + +`-init=NAME' + When creating an ELF executable or shared object, call NAME when + the executable or shared object is loaded, by setting DT_INIT to + the address of the function. By default, the linker uses `_init' + as the function to call. + +`-l NAMESPEC' +`--library=NAMESPEC' + Add the archive or object file specified by NAMESPEC to the list + of files to link. This option may be used any number of times. + If NAMESPEC is of the form `:FILENAME', `ld' will search the + library path for a file called FILENAME, otherwise it will search + the library path for a file called `libNAMESPEC.a'. + + On systems which support shared libraries, `ld' may also search for + files other than `libNAMESPEC.a'. Specifically, on ELF and SunOS + systems, `ld' will search a directory for a library called + `libNAMESPEC.so' before searching for one called `libNAMESPEC.a'. + (By convention, a `.so' extension indicates a shared library.) + Note that this behavior does not apply to `:FILENAME', which + always specifies a file called FILENAME. + + The linker will search an archive only once, at the location where + it is specified on the command line. If the archive defines a + symbol which was undefined in some object which appeared before + the archive on the command line, the linker will include the + appropriate file(s) from the archive. However, an undefined + symbol in an object appearing later on the command line will not + cause the linker to search the archive again. + + See the `-(' option for a way to force the linker to search + archives multiple times. + + You may list the same archive multiple times on the command line. + + This type of archive searching is standard for Unix linkers. + However, if you are using `ld' on AIX, note that it is different + from the behaviour of the AIX linker. + +`-L SEARCHDIR' +`--library-path=SEARCHDIR' + Add path SEARCHDIR to the list of paths that `ld' will search for + archive libraries and `ld' control scripts. You may use this + option any number of times. The directories are searched in the + order in which they are specified on the command line. + Directories specified on the command line are searched before the + default directories. All `-L' options apply to all `-l' options, + regardless of the order in which the options appear. `-L' options + do not affect how `ld' searches for a linker script unless `-T' + option is specified. + + If SEARCHDIR begins with `=', then the `=' will be replaced by the + "sysroot prefix", a path specified when the linker is configured. + + The default set of paths searched (without being specified with + `-L') depends on which emulation mode `ld' is using, and in some + cases also on how it was configured. *Note Environment::. + + The paths can also be specified in a link script with the + `SEARCH_DIR' command. Directories specified this way are searched + at the point in which the linker script appears in the command + line. + +`-m EMULATION' + Emulate the EMULATION linker. You can list the available + emulations with the `--verbose' or `-V' options. + + If the `-m' option is not used, the emulation is taken from the + `LDEMULATION' environment variable, if that is defined. + + Otherwise, the default emulation depends upon how the linker was + configured. + +`-M' +`--print-map' + Print a link map to the standard output. A link map provides + information about the link, including the following: + + * Where object files are mapped into memory. + + * How common symbols are allocated. + + * All archive members included in the link, with a mention of + the symbol which caused the archive member to be brought in. + + * The values assigned to symbols. + + Note - symbols whose values are computed by an expression + which involves a reference to a previous value of the same + symbol may not have correct result displayed in the link map. + This is because the linker discards intermediate results and + only retains the final value of an expression. Under such + circumstances the linker will display the final value + enclosed by square brackets. Thus for example a linker + script containing: + + foo = 1 + foo = foo * 4 + foo = foo + 8 + + will produce the following output in the link map if the `-M' + option is used: + + 0x00000001 foo = 0x1 + [0x0000000c] foo = (foo * 0x4) + [0x0000000c] foo = (foo + 0x8) + + See *Note Expressions:: for more information about + expressions in linker scripts. + +`-n' +`--nmagic' + Turn off page alignment of sections, and disable linking against + shared libraries. If the output format supports Unix style magic + numbers, mark the output as `NMAGIC'. + +`-N' +`--omagic' + Set the text and data sections to be readable and writable. Also, + do not page-align the data segment, and disable linking against + shared libraries. If the output format supports Unix style magic + numbers, mark the output as `OMAGIC'. Note: Although a writable + text section is allowed for PE-COFF targets, it does not conform + to the format specification published by Microsoft. + +`--no-omagic' + This option negates most of the effects of the `-N' option. It + sets the text section to be read-only, and forces the data segment + to be page-aligned. Note - this option does not enable linking + against shared libraries. Use `-Bdynamic' for this. + +`-o OUTPUT' +`--output=OUTPUT' + Use OUTPUT as the name for the program produced by `ld'; if this + option is not specified, the name `a.out' is used by default. The + script command `OUTPUT' can also specify the output file name. + +`-O LEVEL' + If LEVEL is a numeric values greater than zero `ld' optimizes the + output. This might take significantly longer and therefore + probably should only be enabled for the final binary. At the + moment this option only affects ELF shared library generation. + Future releases of the linker may make more use of this option. + Also currently there is no difference in the linker's behaviour + for different non-zero values of this option. Again this may + change with future releases. + +`-q' +`--emit-relocs' + Leave relocation sections and contents in fully linked executables. + Post link analysis and optimization tools may need this + information in order to perform correct modifications of + executables. This results in larger executables. + + This option is currently only supported on ELF platforms. + +`--force-dynamic' + Force the output file to have dynamic sections. This option is + specific to VxWorks targets. + +`-r' +`--relocatable' + Generate relocatable output--i.e., generate an output file that + can in turn serve as input to `ld'. This is often called "partial + linking". As a side effect, in environments that support standard + Unix magic numbers, this option also sets the output file's magic + number to `OMAGIC'. If this option is not specified, an absolute + file is produced. When linking C++ programs, this option _will + not_ resolve references to constructors; to do that, use `-Ur'. + + When an input file does not have the same format as the output + file, partial linking is only supported if that input file does + not contain any relocations. Different output formats can have + further restrictions; for example some `a.out'-based formats do + not support partial linking with input files in other formats at + all. + + This option does the same thing as `-i'. + +`-R FILENAME' +`--just-symbols=FILENAME' + Read symbol names and their addresses from FILENAME, but do not + relocate it or include it in the output. This allows your output + file to refer symbolically to absolute locations of memory defined + in other programs. You may use this option more than once. + + For compatibility with other ELF linkers, if the `-R' option is + followed by a directory name, rather than a file name, it is + treated as the `-rpath' option. + +`-s' +`--strip-all' + Omit all symbol information from the output file. + +`-S' +`--strip-debug' + Omit debugger symbol information (but not all symbols) from the + output file. + +`-t' +`--trace' + Print the names of the input files as `ld' processes them. + +`-T SCRIPTFILE' +`--script=SCRIPTFILE' + Use SCRIPTFILE as the linker script. This script replaces `ld''s + default linker script (rather than adding to it), so COMMANDFILE + must specify everything necessary to describe the output file. + *Note Scripts::. If SCRIPTFILE does not exist in the current + directory, `ld' looks for it in the directories specified by any + preceding `-L' options. Multiple `-T' options accumulate. + +`-dT SCRIPTFILE' +`--default-script=SCRIPTFILE' + Use SCRIPTFILE as the default linker script. *Note Scripts::. + + This option is similar to the `--script' option except that + processing of the script is delayed until after the rest of the + command line has been processed. This allows options placed after + the `--default-script' option on the command line to affect the + behaviour of the linker script, which can be important when the + linker command line cannot be directly controlled by the user. + (eg because the command line is being constructed by another tool, + such as `gcc'). + +`-u SYMBOL' +`--undefined=SYMBOL' + Force SYMBOL to be entered in the output file as an undefined + symbol. Doing this may, for example, trigger linking of additional + modules from standard libraries. `-u' may be repeated with + different option arguments to enter additional undefined symbols. + This option is equivalent to the `EXTERN' linker script command. + +`-Ur' + For anything other than C++ programs, this option is equivalent to + `-r': it generates relocatable output--i.e., an output file that + can in turn serve as input to `ld'. When linking C++ programs, + `-Ur' _does_ resolve references to constructors, unlike `-r'. It + does not work to use `-Ur' on files that were themselves linked + with `-Ur'; once the constructor table has been built, it cannot + be added to. Use `-Ur' only for the last partial link, and `-r' + for the others. + +`--unique[=SECTION]' + Creates a separate output section for every input section matching + SECTION, or if the optional wildcard SECTION argument is missing, + for every orphan input section. An orphan section is one not + specifically mentioned in a linker script. You may use this option + multiple times on the command line; It prevents the normal + merging of input sections with the same name, overriding output + section assignments in a linker script. + +`-v' +`--version' +`-V' + Display the version number for `ld'. The `-V' option also lists + the supported emulations. + +`-x' +`--discard-all' + Delete all local symbols. + +`-X' +`--discard-locals' + Delete all temporary local symbols. (These symbols start with + system-specific local label prefixes, typically `.L' for ELF + systems or `L' for traditional a.out systems.) + +`-y SYMBOL' +`--trace-symbol=SYMBOL' + Print the name of each linked file in which SYMBOL appears. This + option may be given any number of times. On many systems it is + necessary to prepend an underscore. + + This option is useful when you have an undefined symbol in your + link but don't know where the reference is coming from. + +`-Y PATH' + Add PATH to the default library search path. This option exists + for Solaris compatibility. + +`-z KEYWORD' + The recognized keywords are: + `combreloc' + Combines multiple reloc sections and sorts them to make + dynamic symbol lookup caching possible. + + `defs' + Disallows undefined symbols in object files. Undefined + symbols in shared libraries are still allowed. + + `execstack' + Marks the object as requiring executable stack. + + `initfirst' + This option is only meaningful when building a shared object. + It marks the object so that its runtime initialization will + occur before the runtime initialization of any other objects + brought into the process at the same time. Similarly the + runtime finalization of the object will occur after the + runtime finalization of any other objects. + + `interpose' + Marks the object that its symbol table interposes before all + symbols but the primary executable. + + `lazy' + When generating an executable or shared library, mark it to + tell the dynamic linker to defer function call resolution to + the point when the function is called (lazy binding), rather + than at load time. Lazy binding is the default. + + `loadfltr' + Marks the object that its filters be processed immediately at + runtime. + + `muldefs' + Allows multiple definitions. + + `nocombreloc' + Disables multiple reloc sections combining. + + `nocopyreloc' + Disables production of copy relocs. + + `nodefaultlib' + Marks the object that the search for dependencies of this + object will ignore any default library search paths. + + `nodelete' + Marks the object shouldn't be unloaded at runtime. + + `nodlopen' + Marks the object not available to `dlopen'. + + `nodump' + Marks the object can not be dumped by `dldump'. + + `noexecstack' + Marks the object as not requiring executable stack. + + `norelro' + Don't create an ELF `PT_GNU_RELRO' segment header in the + object. + + `now' + When generating an executable or shared library, mark it to + tell the dynamic linker to resolve all symbols when the + program is started, or when the shared library is linked to + using dlopen, instead of deferring function call resolution + to the point when the function is first called. + + `origin' + Marks the object may contain $ORIGIN. + + `relro' + Create an ELF `PT_GNU_RELRO' segment header in the object. + + `max-page-size=VALUE' + Set the emulation maximum page size to VALUE. + + `common-page-size=VALUE' + Set the emulation common page size to VALUE. + + + Other keywords are ignored for Solaris compatibility. + +`-( ARCHIVES -)' +`--start-group ARCHIVES --end-group' + The ARCHIVES should be a list of archive files. They may be + either explicit file names, or `-l' options. + + The specified archives are searched repeatedly until no new + undefined references are created. Normally, an archive is + searched only once in the order that it is specified on the + command line. If a symbol in that archive is needed to resolve an + undefined symbol referred to by an object in an archive that + appears later on the command line, the linker would not be able to + resolve that reference. By grouping the archives, they all be + searched repeatedly until all possible references are resolved. + + Using this option has a significant performance cost. It is best + to use it only when there are unavoidable circular references + between two or more archives. + +`--accept-unknown-input-arch' +`--no-accept-unknown-input-arch' + Tells the linker to accept input files whose architecture cannot be + recognised. The assumption is that the user knows what they are + doing and deliberately wants to link in these unknown input files. + This was the default behaviour of the linker, before release + 2.14. The default behaviour from release 2.14 onwards is to + reject such input files, and so the `--accept-unknown-input-arch' + option has been added to restore the old behaviour. + +`--as-needed' +`--no-as-needed' + This option affects ELF DT_NEEDED tags for dynamic libraries + mentioned on the command line after the `--as-needed' option. + Normally the linker will add a DT_NEEDED tag for each dynamic + library mentioned on the command line, regardless of whether the + library is actually needed or not. `--as-needed' causes a + DT_NEEDED tag to only be emitted for a library that satisfies an + undefined symbol reference from a regular object file or, if the + library is not found in the DT_NEEDED lists of other libraries + linked up to that point, an undefined symbol reference from + another dynamic library. `--no-as-needed' restores the default + behaviour. + +`--add-needed' +`--no-add-needed' + These two options have been deprecated because of the similarity of + their names to the `--as-needed' and `--no-as-needed' options. + They have been replaced by `--copy-dt-needed-entries' and + `--no-copy-dt-needed-entries'. + +`-assert KEYWORD' + This option is ignored for SunOS compatibility. + +`-Bdynamic' +`-dy' +`-call_shared' + Link against dynamic libraries. This is only meaningful on + platforms for which shared libraries are supported. This option + is normally the default on such platforms. The different variants + of this option are for compatibility with various systems. You + may use this option multiple times on the command line: it affects + library searching for `-l' options which follow it. + +`-Bgroup' + Set the `DF_1_GROUP' flag in the `DT_FLAGS_1' entry in the dynamic + section. This causes the runtime linker to handle lookups in this + object and its dependencies to be performed only inside the group. + `--unresolved-symbols=report-all' is implied. This option is only + meaningful on ELF platforms which support shared libraries. + +`-Bstatic' +`-dn' +`-non_shared' +`-static' + Do not link against shared libraries. This is only meaningful on + platforms for which shared libraries are supported. The different + variants of this option are for compatibility with various + systems. You may use this option multiple times on the command + line: it affects library searching for `-l' options which follow + it. This option also implies `--unresolved-symbols=report-all'. + This option can be used with `-shared'. Doing so means that a + shared library is being created but that all of the library's + external references must be resolved by pulling in entries from + static libraries. + +`-Bsymbolic' + When creating a shared library, bind references to global symbols + to the definition within the shared library, if any. Normally, it + is possible for a program linked against a shared library to + override the definition within the shared library. This option is + only meaningful on ELF platforms which support shared libraries. + +`-Bsymbolic-functions' + When creating a shared library, bind references to global function + symbols to the definition within the shared library, if any. This + option is only meaningful on ELF platforms which support shared + libraries. + +`--dynamic-list=DYNAMIC-LIST-FILE' + Specify the name of a dynamic list file to the linker. This is + typically used when creating shared libraries to specify a list of + global symbols whose references shouldn't be bound to the + definition within the shared library, or creating dynamically + linked executables to specify a list of symbols which should be + added to the symbol table in the executable. This option is only + meaningful on ELF platforms which support shared libraries. + + The format of the dynamic list is the same as the version node + without scope and node name. See *Note VERSION:: for more + information. + +`--dynamic-list-data' + Include all global data symbols to the dynamic list. + +`--dynamic-list-cpp-new' + Provide the builtin dynamic list for C++ operator new and delete. + It is mainly useful for building shared libstdc++. + +`--dynamic-list-cpp-typeinfo' + Provide the builtin dynamic list for C++ runtime type + identification. + +`--check-sections' +`--no-check-sections' + Asks the linker _not_ to check section addresses after they have + been assigned to see if there are any overlaps. Normally the + linker will perform this check, and if it finds any overlaps it + will produce suitable error messages. The linker does know about, + and does make allowances for sections in overlays. The default + behaviour can be restored by using the command line switch + `--check-sections'. Section overlap is not usually checked for + relocatable links. You can force checking in that case by using + the `--check-sections' option. + +`--copy-dt-needed-entries' +`--no-copy-dt-needed-entries' + This option affects the treatment of dynamic libraries referred to + by DT_NEEDED tags _inside_ ELF dynamic libraries mentioned on the + command line. Normally the linker won't add a DT_NEEDED tag to the + output binary for each library mentioned in a DT_NEEDED tag in an + input dynamic library. With `--copy-dt-needed-entries' specified + on the command line however any dynamic libraries that follow it + will have their DT_NEEDED entries added. The default behaviour + can be restored with `--no-copy-dt-needed-entries'. + + This option also has an effect on the resolution of symbols in + dynamic libraries. With `--copy-dt-needed-entries' dynamic + libraries mentioned on the command line will be recursively + searched, following their DT_NEEDED tags to other libraries, in + order to resolve symbols required by the output binary. With the + default setting however the searching of dynamic libraries that + follow it will stop with the dynamic library itself. No DT_NEEDED + links will be traversed to resolve symbols. + +`--cref' + Output a cross reference table. If a linker map file is being + generated, the cross reference table is printed to the map file. + Otherwise, it is printed on the standard output. + + The format of the table is intentionally simple, so that it may be + easily processed by a script if necessary. The symbols are + printed out, sorted by name. For each symbol, a list of file + names is given. If the symbol is defined, the first file listed + is the location of the definition. The remaining files contain + references to the symbol. + +`--no-define-common' + This option inhibits the assignment of addresses to common symbols. + The script command `INHIBIT_COMMON_ALLOCATION' has the same effect. + *Note Miscellaneous Commands::. + + The `--no-define-common' option allows decoupling the decision to + assign addresses to Common symbols from the choice of the output + file type; otherwise a non-Relocatable output type forces + assigning addresses to Common symbols. Using `--no-define-common' + allows Common symbols that are referenced from a shared library to + be assigned addresses only in the main program. This eliminates + the unused duplicate space in the shared library, and also + prevents any possible confusion over resolving to the wrong + duplicate when there are many dynamic modules with specialized + search paths for runtime symbol resolution. + +`--defsym=SYMBOL=EXPRESSION' + Create a global symbol in the output file, containing the absolute + address given by EXPRESSION. You may use this option as many + times as necessary to define multiple symbols in the command line. + A limited form of arithmetic is supported for the EXPRESSION in + this context: you may give a hexadecimal constant or the name of + an existing symbol, or use `+' and `-' to add or subtract + hexadecimal constants or symbols. If you need more elaborate + expressions, consider using the linker command language from a + script (*note Assignment: Symbol Definitions: Assignments.). + _Note:_ there should be no white space between SYMBOL, the equals + sign ("<=>"), and EXPRESSION. + +`--demangle[=STYLE]' +`--no-demangle' + These options control whether to demangle symbol names in error + messages and other output. When the linker is told to demangle, + it tries to present symbol names in a readable fashion: it strips + leading underscores if they are used by the object file format, + and converts C++ mangled symbol names into user readable names. + Different compilers have different mangling styles. The optional + demangling style argument can be used to choose an appropriate + demangling style for your compiler. The linker will demangle by + default unless the environment variable `COLLECT_NO_DEMANGLE' is + set. These options may be used to override the default. + +`-IFILE' +`--dynamic-linker=FILE' + Set the name of the dynamic linker. This is only meaningful when + generating dynamically linked ELF executables. The default dynamic + linker is normally correct; don't use this unless you know what + you are doing. + +`--fatal-warnings' +`--no-fatal-warnings' + Treat all warnings as errors. The default behaviour can be + restored with the option `--no-fatal-warnings'. + +`--force-exe-suffix' + Make sure that an output file has a .exe suffix. + + If a successfully built fully linked output file does not have a + `.exe' or `.dll' suffix, this option forces the linker to copy the + output file to one of the same name with a `.exe' suffix. This + option is useful when using unmodified Unix makefiles on a + Microsoft Windows host, since some versions of Windows won't run + an image unless it ends in a `.exe' suffix. + +`--gc-sections' +`--no-gc-sections' + Enable garbage collection of unused input sections. It is ignored + on targets that do not support this option. The default behaviour + (of not performing this garbage collection) can be restored by + specifying `--no-gc-sections' on the command line. + + `--gc-sections' decides which input sections are used by examining + symbols and relocations. The section containing the entry symbol + and all sections containing symbols undefined on the command-line + will be kept, as will sections containing symbols referenced by + dynamic objects. Note that when building shared libraries, the + linker must assume that any visible symbol is referenced. Once + this initial set of sections has been determined, the linker + recursively marks as used any section referenced by their + relocations. See `--entry' and `--undefined'. + + This option can be set when doing a partial link (enabled with + option `-r'). In this case the root of symbols kept must be + explicitly specified either by an `--entry' or `--undefined' + option or by a `ENTRY' command in the linker script. + +`--print-gc-sections' +`--no-print-gc-sections' + List all sections removed by garbage collection. The listing is + printed on stderr. This option is only effective if garbage + collection has been enabled via the `--gc-sections') option. The + default behaviour (of not listing the sections that are removed) + can be restored by specifying `--no-print-gc-sections' on the + command line. + +`--print-output-format' + Print the name of the default output format (perhaps influenced by + other command-line options). This is the string that would appear + in an `OUTPUT_FORMAT' linker script command (*note File + Commands::). + +`--help' + Print a summary of the command-line options on the standard output + and exit. + +`--target-help' + Print a summary of all target specific options on the standard + output and exit. + +`-Map=MAPFILE' + Print a link map to the file MAPFILE. See the description of the + `-M' option, above. + +`--no-keep-memory' + `ld' normally optimizes for speed over memory usage by caching the + symbol tables of input files in memory. This option tells `ld' to + instead optimize for memory usage, by rereading the symbol tables + as necessary. This may be required if `ld' runs out of memory + space while linking a large executable. + +`--no-undefined' +`-z defs' + Report unresolved symbol references from regular object files. + This is done even if the linker is creating a non-symbolic shared + library. The switch `--[no-]allow-shlib-undefined' controls the + behaviour for reporting unresolved references found in shared + libraries being linked in. + +`--allow-multiple-definition' +`-z muldefs' + Normally when a symbol is defined multiple times, the linker will + report a fatal error. These options allow multiple definitions and + the first definition will be used. + +`--allow-shlib-undefined' +`--no-allow-shlib-undefined' + Allows or disallows undefined symbols in shared libraries. This + switch is similar to `--no-undefined' except that it determines + the behaviour when the undefined symbols are in a shared library + rather than a regular object file. It does not affect how + undefined symbols in regular object files are handled. + + The default behaviour is to report errors for any undefined symbols + referenced in shared libraries if the linker is being used to + create an executable, but to allow them if the linker is being + used to create a shared library. + + The reasons for allowing undefined symbol references in shared + libraries specified at link time are that: + + * A shared library specified at link time may not be the same + as the one that is available at load time, so the symbol + might actually be resolvable at load time. + + * There are some operating systems, eg BeOS and HPPA, where + undefined symbols in shared libraries are normal. + + The BeOS kernel for example patches shared libraries at load + time to select whichever function is most appropriate for the + current architecture. This is used, for example, to + dynamically select an appropriate memset function. + +`--no-undefined-version' + Normally when a symbol has an undefined version, the linker will + ignore it. This option disallows symbols with undefined version + and a fatal error will be issued instead. + +`--default-symver' + Create and use a default symbol version (the soname) for + unversioned exported symbols. + +`--default-imported-symver' + Create and use a default symbol version (the soname) for + unversioned imported symbols. + +`--no-warn-mismatch' + Normally `ld' will give an error if you try to link together input + files that are mismatched for some reason, perhaps because they + have been compiled for different processors or for different + endiannesses. This option tells `ld' that it should silently + permit such possible errors. This option should only be used with + care, in cases when you have taken some special action that + ensures that the linker errors are inappropriate. + +`--no-warn-search-mismatch' + Normally `ld' will give a warning if it finds an incompatible + library during a library search. This option silences the warning. + +`--no-whole-archive' + Turn off the effect of the `--whole-archive' option for subsequent + archive files. + +`--noinhibit-exec' + Retain the executable output file whenever it is still usable. + Normally, the linker will not produce an output file if it + encounters errors during the link process; it exits without + writing an output file when it issues any error whatsoever. + +`-nostdlib' + Only search library directories explicitly specified on the + command line. Library directories specified in linker scripts + (including linker scripts specified on the command line) are + ignored. + +`--oformat=OUTPUT-FORMAT' + `ld' may be configured to support more than one kind of object + file. If your `ld' is configured this way, you can use the + `--oformat' option to specify the binary format for the output + object file. Even when `ld' is configured to support alternative + object formats, you don't usually need to specify this, as `ld' + should be configured to produce as a default output format the most + usual format on each machine. OUTPUT-FORMAT is a text string, the + name of a particular format supported by the BFD libraries. (You + can list the available binary formats with `objdump -i'.) The + script command `OUTPUT_FORMAT' can also specify the output format, + but this option overrides it. *Note BFD::. + +`-pie' +`--pic-executable' + Create a position independent executable. This is currently only + supported on ELF platforms. Position independent executables are + similar to shared libraries in that they are relocated by the + dynamic linker to the virtual address the OS chooses for them + (which can vary between invocations). Like normal dynamically + linked executables they can be executed and symbols defined in the + executable cannot be overridden by shared libraries. + +`-qmagic' + This option is ignored for Linux compatibility. + +`-Qy' + This option is ignored for SVR4 compatibility. + +`--relax' +`--no-relax' + An option with machine dependent effects. This option is only + supported on a few targets. *Note `ld' and the H8/300: H8/300. + *Note `ld' and the Intel 960 family: i960. *Note `ld' and Xtensa + Processors: Xtensa. *Note `ld' and the 68HC11 and 68HC12: + M68HC11/68HC12. *Note `ld' and PowerPC 32-bit ELF Support: + PowerPC ELF32. + + On some platforms the `--relax' option performs target specific, + global optimizations that become possible when the linker resolves + addressing in the program, such as relaxing address modes, + synthesizing new instructions, selecting shorter version of current + instructions, and combinig constant values. + + On some platforms these link time global optimizations may make + symbolic debugging of the resulting executable impossible. This + is known to be the case for the Matsushita MN10200 and MN10300 + family of processors. + + On platforms where this is not supported, `--relax' is accepted, + but ignored. + + On platforms where `--relax' is accepted the option `--no-relax' + can be used to disable the feature. + +`--retain-symbols-file=FILENAME' + Retain _only_ the symbols listed in the file FILENAME, discarding + all others. FILENAME is simply a flat file, with one symbol name + per line. This option is especially useful in environments (such + as VxWorks) where a large global symbol table is accumulated + gradually, to conserve run-time memory. + + `--retain-symbols-file' does _not_ discard undefined symbols, or + symbols needed for relocations. + + You may only specify `--retain-symbols-file' once in the command + line. It overrides `-s' and `-S'. + +`-rpath=DIR' + Add a directory to the runtime library search path. This is used + when linking an ELF executable with shared objects. All `-rpath' + arguments are concatenated and passed to the runtime linker, which + uses them to locate shared objects at runtime. The `-rpath' + option is also used when locating shared objects which are needed + by shared objects explicitly included in the link; see the + description of the `-rpath-link' option. If `-rpath' is not used + when linking an ELF executable, the contents of the environment + variable `LD_RUN_PATH' will be used if it is defined. + + The `-rpath' option may also be used on SunOS. By default, on + SunOS, the linker will form a runtime search patch out of all the + `-L' options it is given. If a `-rpath' option is used, the + runtime search path will be formed exclusively using the `-rpath' + options, ignoring the `-L' options. This can be useful when using + gcc, which adds many `-L' options which may be on NFS mounted file + systems. + + For compatibility with other ELF linkers, if the `-R' option is + followed by a directory name, rather than a file name, it is + treated as the `-rpath' option. + +`-rpath-link=DIR' + When using ELF or SunOS, one shared library may require another. + This happens when an `ld -shared' link includes a shared library + as one of the input files. + + When the linker encounters such a dependency when doing a + non-shared, non-relocatable link, it will automatically try to + locate the required shared library and include it in the link, if + it is not included explicitly. In such a case, the `-rpath-link' + option specifies the first set of directories to search. The + `-rpath-link' option may specify a sequence of directory names + either by specifying a list of names separated by colons, or by + appearing multiple times. + + This option should be used with caution as it overrides the search + path that may have been hard compiled into a shared library. In + such a case it is possible to use unintentionally a different + search path than the runtime linker would do. + + The linker uses the following search paths to locate required + shared libraries: + 1. Any directories specified by `-rpath-link' options. + + 2. Any directories specified by `-rpath' options. The difference + between `-rpath' and `-rpath-link' is that directories + specified by `-rpath' options are included in the executable + and used at runtime, whereas the `-rpath-link' option is only + effective at link time. Searching `-rpath' in this way is + only supported by native linkers and cross linkers which have + been configured with the `--with-sysroot' option. + + 3. On an ELF system, for native linkers, if the `-rpath' and + `-rpath-link' options were not used, search the contents of + the environment variable `LD_RUN_PATH'. + + 4. On SunOS, if the `-rpath' option was not used, search any + directories specified using `-L' options. + + 5. For a native linker, the search the contents of the + environment variable `LD_LIBRARY_PATH'. + + 6. For a native ELF linker, the directories in `DT_RUNPATH' or + `DT_RPATH' of a shared library are searched for shared + libraries needed by it. The `DT_RPATH' entries are ignored if + `DT_RUNPATH' entries exist. + + 7. The default directories, normally `/lib' and `/usr/lib'. + + 8. For a native linker on an ELF system, if the file + `/etc/ld.so.conf' exists, the list of directories found in + that file. + + If the required shared library is not found, the linker will issue + a warning and continue with the link. + +`-shared' +`-Bshareable' + Create a shared library. This is currently only supported on ELF, + XCOFF and SunOS platforms. On SunOS, the linker will + automatically create a shared library if the `-e' option is not + used and there are undefined symbols in the link. + +`--sort-common' +`--sort-common=ascending' +`--sort-common=descending' + This option tells `ld' to sort the common symbols by alignment in + ascending or descending order when it places them in the + appropriate output sections. The symbol alignments considered are + sixteen-byte or larger, eight-byte, four-byte, two-byte, and + one-byte. This is to prevent gaps between symbols due to alignment + constraints. If no sorting order is specified, then descending + order is assumed. + +`--sort-section=name' + This option will apply `SORT_BY_NAME' to all wildcard section + patterns in the linker script. + +`--sort-section=alignment' + This option will apply `SORT_BY_ALIGNMENT' to all wildcard section + patterns in the linker script. + +`--split-by-file[=SIZE]' + Similar to `--split-by-reloc' but creates a new output section for + each input file when SIZE is reached. SIZE defaults to a size of + 1 if not given. + +`--split-by-reloc[=COUNT]' + Tries to creates extra sections in the output file so that no + single output section in the file contains more than COUNT + relocations. This is useful when generating huge relocatable + files for downloading into certain real time kernels with the COFF + object file format; since COFF cannot represent more than 65535 + relocations in a single section. Note that this will fail to work + with object file formats which do not support arbitrary sections. + The linker will not split up individual input sections for + redistribution, so if a single input section contains more than + COUNT relocations one output section will contain that many + relocations. COUNT defaults to a value of 32768. + +`--stats' + Compute and display statistics about the operation of the linker, + such as execution time and memory usage. + +`--sysroot=DIRECTORY' + Use DIRECTORY as the location of the sysroot, overriding the + configure-time default. This option is only supported by linkers + that were configured using `--with-sysroot'. + +`--traditional-format' + For some targets, the output of `ld' is different in some ways from + the output of some existing linker. This switch requests `ld' to + use the traditional format instead. + + For example, on SunOS, `ld' combines duplicate entries in the + symbol string table. This can reduce the size of an output file + with full debugging information by over 30 percent. + Unfortunately, the SunOS `dbx' program can not read the resulting + program (`gdb' has no trouble). The `--traditional-format' switch + tells `ld' to not combine duplicate entries. + +`--section-start=SECTIONNAME=ORG' + Locate a section in the output file at the absolute address given + by ORG. You may use this option as many times as necessary to + locate multiple sections in the command line. ORG must be a + single hexadecimal integer; for compatibility with other linkers, + you may omit the leading `0x' usually associated with hexadecimal + values. _Note:_ there should be no white space between + SECTIONNAME, the equals sign ("<=>"), and ORG. + +`-Tbss=ORG' +`-Tdata=ORG' +`-Ttext=ORG' + Same as `--section-start', with `.bss', `.data' or `.text' as the + SECTIONNAME. + +`-Ttext-segment=ORG' + When creating an ELF executable or shared object, it will set the + address of the first byte of the text segment. + +`--unresolved-symbols=METHOD' + Determine how to handle unresolved symbols. There are four + possible values for `method': + + `ignore-all' + Do not report any unresolved symbols. + + `report-all' + Report all unresolved symbols. This is the default. + + `ignore-in-object-files' + Report unresolved symbols that are contained in shared + libraries, but ignore them if they come from regular object + files. + + `ignore-in-shared-libs' + Report unresolved symbols that come from regular object + files, but ignore them if they come from shared libraries. + This can be useful when creating a dynamic binary and it is + known that all the shared libraries that it should be + referencing are included on the linker's command line. + + The behaviour for shared libraries on their own can also be + controlled by the `--[no-]allow-shlib-undefined' option. + + Normally the linker will generate an error message for each + reported unresolved symbol but the option + `--warn-unresolved-symbols' can change this to a warning. + +`--dll-verbose' +`--verbose[=NUMBER]' + Display the version number for `ld' and list the linker emulations + supported. Display which input files can and cannot be opened. + Display the linker script being used by the linker. If the + optional NUMBER argument > 1, plugin symbol status will also be + displayed. + +`--version-script=VERSION-SCRIPTFILE' + Specify the name of a version script to the linker. This is + typically used when creating shared libraries to specify + additional information about the version hierarchy for the library + being created. This option is only fully supported on ELF + platforms which support shared libraries; see *Note VERSION::. It + is partially supported on PE platforms, which can use version + scripts to filter symbol visibility in auto-export mode: any + symbols marked `local' in the version script will not be exported. + *Note WIN32::. + +`--warn-common' + Warn when a common symbol is combined with another common symbol + or with a symbol definition. Unix linkers allow this somewhat + sloppy practise, but linkers on some other operating systems do + not. This option allows you to find potential problems from + combining global symbols. Unfortunately, some C libraries use + this practise, so you may get some warnings about symbols in the + libraries as well as in your programs. + + There are three kinds of global symbols, illustrated here by C + examples: + + `int i = 1;' + A definition, which goes in the initialized data section of + the output file. + + `extern int i;' + An undefined reference, which does not allocate space. There + must be either a definition or a common symbol for the + variable somewhere. + + `int i;' + A common symbol. If there are only (one or more) common + symbols for a variable, it goes in the uninitialized data + area of the output file. The linker merges multiple common + symbols for the same variable into a single symbol. If they + are of different sizes, it picks the largest size. The + linker turns a common symbol into a declaration, if there is + a definition of the same variable. + + The `--warn-common' option can produce five kinds of warnings. + Each warning consists of a pair of lines: the first describes the + symbol just encountered, and the second describes the previous + symbol encountered with the same name. One or both of the two + symbols will be a common symbol. + + 1. Turning a common symbol into a reference, because there is + already a definition for the symbol. + FILE(SECTION): warning: common of `SYMBOL' + overridden by definition + FILE(SECTION): warning: defined here + + 2. Turning a common symbol into a reference, because a later + definition for the symbol is encountered. This is the same + as the previous case, except that the symbols are encountered + in a different order. + FILE(SECTION): warning: definition of `SYMBOL' + overriding common + FILE(SECTION): warning: common is here + + 3. Merging a common symbol with a previous same-sized common + symbol. + FILE(SECTION): warning: multiple common + of `SYMBOL' + FILE(SECTION): warning: previous common is here + + 4. Merging a common symbol with a previous larger common symbol. + FILE(SECTION): warning: common of `SYMBOL' + overridden by larger common + FILE(SECTION): warning: larger common is here + + 5. Merging a common symbol with a previous smaller common + symbol. This is the same as the previous case, except that + the symbols are encountered in a different order. + FILE(SECTION): warning: common of `SYMBOL' + overriding smaller common + FILE(SECTION): warning: smaller common is here + +`--warn-constructors' + Warn if any global constructors are used. This is only useful for + a few object file formats. For formats like COFF or ELF, the + linker can not detect the use of global constructors. + +`--warn-multiple-gp' + Warn if multiple global pointer values are required in the output + file. This is only meaningful for certain processors, such as the + Alpha. Specifically, some processors put large-valued constants + in a special section. A special register (the global pointer) + points into the middle of this section, so that constants can be + loaded efficiently via a base-register relative addressing mode. + Since the offset in base-register relative mode is fixed and + relatively small (e.g., 16 bits), this limits the maximum size of + the constant pool. Thus, in large programs, it is often necessary + to use multiple global pointer values in order to be able to + address all possible constants. This option causes a warning to + be issued whenever this case occurs. + +`--warn-once' + Only warn once for each undefined symbol, rather than once per + module which refers to it. + +`--warn-section-align' + Warn if the address of an output section is changed because of + alignment. Typically, the alignment will be set by an input + section. The address will only be changed if it not explicitly + specified; that is, if the `SECTIONS' command does not specify a + start address for the section (*note SECTIONS::). + +`--warn-shared-textrel' + Warn if the linker adds a DT_TEXTREL to a shared object. + +`--warn-alternate-em' + Warn if an object has alternate ELF machine code. + +`--warn-unresolved-symbols' + If the linker is going to report an unresolved symbol (see the + option `--unresolved-symbols') it will normally generate an error. + This option makes it generate a warning instead. + +`--error-unresolved-symbols' + This restores the linker's default behaviour of generating errors + when it is reporting unresolved symbols. + +`--whole-archive' + For each archive mentioned on the command line after the + `--whole-archive' option, include every object file in the archive + in the link, rather than searching the archive for the required + object files. This is normally used to turn an archive file into + a shared library, forcing every object to be included in the + resulting shared library. This option may be used more than once. + + Two notes when using this option from gcc: First, gcc doesn't know + about this option, so you have to use `-Wl,-whole-archive'. + Second, don't forget to use `-Wl,-no-whole-archive' after your + list of archives, because gcc will add its own list of archives to + your link and you may not want this flag to affect those as well. + +`--wrap=SYMBOL' + Use a wrapper function for SYMBOL. Any undefined reference to + SYMBOL will be resolved to `__wrap_SYMBOL'. Any undefined + reference to `__real_SYMBOL' will be resolved to SYMBOL. + + This can be used to provide a wrapper for a system function. The + wrapper function should be called `__wrap_SYMBOL'. If it wishes + to call the system function, it should call `__real_SYMBOL'. + + Here is a trivial example: + + void * + __wrap_malloc (size_t c) + { + printf ("malloc called with %zu\n", c); + return __real_malloc (c); + } + + If you link other code with this file using `--wrap malloc', then + all calls to `malloc' will call the function `__wrap_malloc' + instead. The call to `__real_malloc' in `__wrap_malloc' will call + the real `malloc' function. + + You may wish to provide a `__real_malloc' function as well, so that + links without the `--wrap' option will succeed. If you do this, + you should not put the definition of `__real_malloc' in the same + file as `__wrap_malloc'; if you do, the assembler may resolve the + call before the linker has a chance to wrap it to `malloc'. + +`--eh-frame-hdr' + Request creation of `.eh_frame_hdr' section and ELF + `PT_GNU_EH_FRAME' segment header. + +`--no-ld-generated-unwind-info' + Request creation of `.eh_frame' unwind info for linker generated + code sections like PLT. This option is on by default if linker + generated unwind info is supported. + +`--enable-new-dtags' +`--disable-new-dtags' + This linker can create the new dynamic tags in ELF. But the older + ELF systems may not understand them. If you specify + `--enable-new-dtags', the dynamic tags will be created as needed. + If you specify `--disable-new-dtags', no new dynamic tags will be + created. By default, the new dynamic tags are not created. Note + that those options are only available for ELF systems. + +`--hash-size=NUMBER' + Set the default size of the linker's hash tables to a prime number + close to NUMBER. Increasing this value can reduce the length of + time it takes the linker to perform its tasks, at the expense of + increasing the linker's memory requirements. Similarly reducing + this value can reduce the memory requirements at the expense of + speed. + +`--hash-style=STYLE' + Set the type of linker's hash table(s). STYLE can be either + `sysv' for classic ELF `.hash' section, `gnu' for new style GNU + `.gnu.hash' section or `both' for both the classic ELF `.hash' and + new style GNU `.gnu.hash' hash tables. The default is `sysv'. + +`--reduce-memory-overheads' + This option reduces memory requirements at ld runtime, at the + expense of linking speed. This was introduced to select the old + O(n^2) algorithm for link map file generation, rather than the new + O(n) algorithm which uses about 40% more memory for symbol storage. + + Another effect of the switch is to set the default hash table size + to 1021, which again saves memory at the cost of lengthening the + linker's run time. This is not done however if the `--hash-size' + switch has been used. + + The `--reduce-memory-overheads' switch may be also be used to + enable other tradeoffs in future versions of the linker. + +`--build-id' +`--build-id=STYLE' + Request creation of `.note.gnu.build-id' ELF note section. The + contents of the note are unique bits identifying this linked file. + STYLE can be `uuid' to use 128 random bits, `sha1' to use a + 160-bit SHA1 hash on the normative parts of the output contents, + `md5' to use a 128-bit MD5 hash on the normative parts of the + output contents, or `0xHEXSTRING' to use a chosen bit string + specified as an even number of hexadecimal digits (`-' and `:' + characters between digit pairs are ignored). If STYLE is omitted, + `sha1' is used. + + The `md5' and `sha1' styles produces an identifier that is always + the same in an identical output file, but will be unique among all + nonidentical output files. It is not intended to be compared as a + checksum for the file's contents. A linked file may be changed + later by other tools, but the build ID bit string identifying the + original linked file does not change. + + Passing `none' for STYLE disables the setting from any + `--build-id' options earlier on the command line. + +2.1.1 Options Specific to i386 PE Targets +----------------------------------------- + +The i386 PE linker supports the `-shared' option, which causes the +output to be a dynamically linked library (DLL) instead of a normal +executable. You should name the output `*.dll' when you use this +option. In addition, the linker fully supports the standard `*.def' +files, which may be specified on the linker command line like an object +file (in fact, it should precede archives it exports symbols from, to +ensure that they get linked in, just like a normal object file). + + In addition to the options common to all targets, the i386 PE linker +support additional command line options that are specific to the i386 +PE target. Options that take values may be separated from their values +by either a space or an equals sign. + +`--add-stdcall-alias' + If given, symbols with a stdcall suffix (@NN) will be exported + as-is and also with the suffix stripped. [This option is specific + to the i386 PE targeted port of the linker] + +`--base-file FILE' + Use FILE as the name of a file in which to save the base addresses + of all the relocations needed for generating DLLs with `dlltool'. + [This is an i386 PE specific option] + +`--dll' + Create a DLL instead of a regular executable. You may also use + `-shared' or specify a `LIBRARY' in a given `.def' file. [This + option is specific to the i386 PE targeted port of the linker] + +`--enable-long-section-names' +`--disable-long-section-names' + The PE variants of the Coff object format add an extension that + permits the use of section names longer than eight characters, the + normal limit for Coff. By default, these names are only allowed + in object files, as fully-linked executable images do not carry + the Coff string table required to support the longer names. As a + GNU extension, it is possible to allow their use in executable + images as well, or to (probably pointlessly!) disallow it in + object files, by using these two options. Executable images + generated with these long section names are slightly non-standard, + carrying as they do a string table, and may generate confusing + output when examined with non-GNU PE-aware tools, such as file + viewers and dumpers. However, GDB relies on the use of PE long + section names to find Dwarf-2 debug information sections in an + executable image at runtime, and so if neither option is specified + on the command-line, `ld' will enable long section names, + overriding the default and technically correct behaviour, when it + finds the presence of debug information while linking an executable + image and not stripping symbols. [This option is valid for all PE + targeted ports of the linker] + +`--enable-stdcall-fixup' +`--disable-stdcall-fixup' + If the link finds a symbol that it cannot resolve, it will attempt + to do "fuzzy linking" by looking for another defined symbol that + differs only in the format of the symbol name (cdecl vs stdcall) + and will resolve that symbol by linking to the match. For + example, the undefined symbol `_foo' might be linked to the + function `_foo@12', or the undefined symbol `_bar@16' might be + linked to the function `_bar'. When the linker does this, it + prints a warning, since it normally should have failed to link, + but sometimes import libraries generated from third-party dlls may + need this feature to be usable. If you specify + `--enable-stdcall-fixup', this feature is fully enabled and + warnings are not printed. If you specify + `--disable-stdcall-fixup', this feature is disabled and such + mismatches are considered to be errors. [This option is specific + to the i386 PE targeted port of the linker] + +`--leading-underscore' +`--no-leading-underscore' + For most targets default symbol-prefix is an underscore and is + defined in target's description. By this option it is possible to + disable/enable the default underscore symbol-prefix. + +`--export-all-symbols' + If given, all global symbols in the objects used to build a DLL + will be exported by the DLL. Note that this is the default if + there otherwise wouldn't be any exported symbols. When symbols are + explicitly exported via DEF files or implicitly exported via + function attributes, the default is to not export anything else + unless this option is given. Note that the symbols `DllMain@12', + `DllEntryPoint@0', `DllMainCRTStartup@12', and `impure_ptr' will + not be automatically exported. Also, symbols imported from other + DLLs will not be re-exported, nor will symbols specifying the + DLL's internal layout such as those beginning with `_head_' or + ending with `_iname'. In addition, no symbols from `libgcc', + `libstd++', `libmingw32', or `crtX.o' will be exported. Symbols + whose names begin with `__rtti_' or `__builtin_' will not be + exported, to help with C++ DLLs. Finally, there is an extensive + list of cygwin-private symbols that are not exported (obviously, + this applies on when building DLLs for cygwin targets). These + cygwin-excludes are: `_cygwin_dll_entry@12', + `_cygwin_crt0_common@8', `_cygwin_noncygwin_dll_entry@12', + `_fmode', `_impure_ptr', `cygwin_attach_dll', `cygwin_premain0', + `cygwin_premain1', `cygwin_premain2', `cygwin_premain3', and + `environ'. [This option is specific to the i386 PE targeted port + of the linker] + +`--exclude-symbols SYMBOL,SYMBOL,...' + Specifies a list of symbols which should not be automatically + exported. The symbol names may be delimited by commas or colons. + [This option is specific to the i386 PE targeted port of the + linker] + +`--exclude-all-symbols' + Specifies no symbols should be automatically exported. [This + option is specific to the i386 PE targeted port of the linker] + +`--file-alignment' + Specify the file alignment. Sections in the file will always + begin at file offsets which are multiples of this number. This + defaults to 512. [This option is specific to the i386 PE targeted + port of the linker] + +`--heap RESERVE' +`--heap RESERVE,COMMIT' + Specify the number of bytes of memory to reserve (and optionally + commit) to be used as heap for this program. The default is 1Mb + reserved, 4K committed. [This option is specific to the i386 PE + targeted port of the linker] + +`--image-base VALUE' + Use VALUE as the base address of your program or dll. This is the + lowest memory location that will be used when your program or dll + is loaded. To reduce the need to relocate and improve performance + of your dlls, each should have a unique base address and not + overlap any other dlls. The default is 0x400000 for executables, + and 0x10000000 for dlls. [This option is specific to the i386 PE + targeted port of the linker] + +`--kill-at' + If given, the stdcall suffixes (@NN) will be stripped from symbols + before they are exported. [This option is specific to the i386 PE + targeted port of the linker] + +`--large-address-aware' + If given, the appropriate bit in the "Characteristics" field of + the COFF header is set to indicate that this executable supports + virtual addresses greater than 2 gigabytes. This should be used + in conjunction with the /3GB or /USERVA=VALUE megabytes switch in + the "[operating systems]" section of the BOOT.INI. Otherwise, + this bit has no effect. [This option is specific to PE targeted + ports of the linker] + +`--major-image-version VALUE' + Sets the major number of the "image version". Defaults to 1. + [This option is specific to the i386 PE targeted port of the + linker] + +`--major-os-version VALUE' + Sets the major number of the "os version". Defaults to 4. [This + option is specific to the i386 PE targeted port of the linker] + +`--major-subsystem-version VALUE' + Sets the major number of the "subsystem version". Defaults to 4. + [This option is specific to the i386 PE targeted port of the + linker] + +`--minor-image-version VALUE' + Sets the minor number of the "image version". Defaults to 0. + [This option is specific to the i386 PE targeted port of the + linker] + +`--minor-os-version VALUE' + Sets the minor number of the "os version". Defaults to 0. [This + option is specific to the i386 PE targeted port of the linker] + +`--minor-subsystem-version VALUE' + Sets the minor number of the "subsystem version". Defaults to 0. + [This option is specific to the i386 PE targeted port of the + linker] + +`--output-def FILE' + The linker will create the file FILE which will contain a DEF file + corresponding to the DLL the linker is generating. This DEF file + (which should be called `*.def') may be used to create an import + library with `dlltool' or may be used as a reference to + automatically or implicitly exported symbols. [This option is + specific to the i386 PE targeted port of the linker] + +`--out-implib FILE' + The linker will create the file FILE which will contain an import + lib corresponding to the DLL the linker is generating. This import + lib (which should be called `*.dll.a' or `*.a' may be used to link + clients against the generated DLL; this behaviour makes it + possible to skip a separate `dlltool' import library creation step. + [This option is specific to the i386 PE targeted port of the + linker] + +`--enable-auto-image-base' + Automatically choose the image base for DLLs, unless one is + specified using the `--image-base' argument. By using a hash + generated from the dllname to create unique image bases for each + DLL, in-memory collisions and relocations which can delay program + execution are avoided. [This option is specific to the i386 PE + targeted port of the linker] + +`--disable-auto-image-base' + Do not automatically generate a unique image base. If there is no + user-specified image base (`--image-base') then use the platform + default. [This option is specific to the i386 PE targeted port of + the linker] + +`--dll-search-prefix STRING' + When linking dynamically to a dll without an import library, + search for `.dll' in preference to + `lib.dll'. This behaviour allows easy distinction + between DLLs built for the various "subplatforms": native, cygwin, + uwin, pw, etc. For instance, cygwin DLLs typically use + `--dll-search-prefix=cyg'. [This option is specific to the i386 + PE targeted port of the linker] + +`--enable-auto-import' + Do sophisticated linking of `_symbol' to `__imp__symbol' for DATA + imports from DLLs, and create the necessary thunking symbols when + building the import libraries with those DATA exports. Note: Use + of the 'auto-import' extension will cause the text section of the + image file to be made writable. This does not conform to the + PE-COFF format specification published by Microsoft. + + Note - use of the 'auto-import' extension will also cause read only + data which would normally be placed into the .rdata section to be + placed into the .data section instead. This is in order to work + around a problem with consts that is described here: + http://www.cygwin.com/ml/cygwin/2004-09/msg01101.html + + Using 'auto-import' generally will 'just work' - but sometimes you + may see this message: + + "variable '' can't be auto-imported. Please read the + documentation for ld's `--enable-auto-import' for details." + + This message occurs when some (sub)expression accesses an address + ultimately given by the sum of two constants (Win32 import tables + only allow one). Instances where this may occur include accesses + to member fields of struct variables imported from a DLL, as well + as using a constant index into an array variable imported from a + DLL. Any multiword variable (arrays, structs, long long, etc) may + trigger this error condition. However, regardless of the exact + data type of the offending exported variable, ld will always + detect it, issue the warning, and exit. + + There are several ways to address this difficulty, regardless of + the data type of the exported variable: + + One way is to use -enable-runtime-pseudo-reloc switch. This leaves + the task of adjusting references in your client code for runtime + environment, so this method works only when runtime environment + supports this feature. + + A second solution is to force one of the 'constants' to be a + variable - that is, unknown and un-optimizable at compile time. + For arrays, there are two possibilities: a) make the indexee (the + array's address) a variable, or b) make the 'constant' index a + variable. Thus: + + extern type extern_array[]; + extern_array[1] --> + { volatile type *t=extern_array; t[1] } + + or + + extern type extern_array[]; + extern_array[1] --> + { volatile int t=1; extern_array[t] } + + For structs (and most other multiword data types) the only option + is to make the struct itself (or the long long, or the ...) + variable: + + extern struct s extern_struct; + extern_struct.field --> + { volatile struct s *t=&extern_struct; t->field } + + or + + extern long long extern_ll; + extern_ll --> + { volatile long long * local_ll=&extern_ll; *local_ll } + + A third method of dealing with this difficulty is to abandon + 'auto-import' for the offending symbol and mark it with + `__declspec(dllimport)'. However, in practise that requires using + compile-time #defines to indicate whether you are building a DLL, + building client code that will link to the DLL, or merely + building/linking to a static library. In making the choice + between the various methods of resolving the 'direct address with + constant offset' problem, you should consider typical real-world + usage: + + Original: + --foo.h + extern int arr[]; + --foo.c + #include "foo.h" + void main(int argc, char **argv){ + printf("%d\n",arr[1]); + } + + Solution 1: + --foo.h + extern int arr[]; + --foo.c + #include "foo.h" + void main(int argc, char **argv){ + /* This workaround is for win32 and cygwin; do not "optimize" */ + volatile int *parr = arr; + printf("%d\n",parr[1]); + } + + Solution 2: + --foo.h + /* Note: auto-export is assumed (no __declspec(dllexport)) */ + #if (defined(_WIN32) || defined(__CYGWIN__)) && \ + !(defined(FOO_BUILD_DLL) || defined(FOO_STATIC)) + #define FOO_IMPORT __declspec(dllimport) + #else + #define FOO_IMPORT + #endif + extern FOO_IMPORT int arr[]; + --foo.c + #include "foo.h" + void main(int argc, char **argv){ + printf("%d\n",arr[1]); + } + + A fourth way to avoid this problem is to re-code your library to + use a functional interface rather than a data interface for the + offending variables (e.g. set_foo() and get_foo() accessor + functions). [This option is specific to the i386 PE targeted port + of the linker] + +`--disable-auto-import' + Do not attempt to do sophisticated linking of `_symbol' to + `__imp__symbol' for DATA imports from DLLs. [This option is + specific to the i386 PE targeted port of the linker] + +`--enable-runtime-pseudo-reloc' + If your code contains expressions described in -enable-auto-import + section, that is, DATA imports from DLL with non-zero offset, this + switch will create a vector of 'runtime pseudo relocations' which + can be used by runtime environment to adjust references to such + data in your client code. [This option is specific to the i386 PE + targeted port of the linker] + +`--disable-runtime-pseudo-reloc' + Do not create pseudo relocations for non-zero offset DATA imports + from DLLs. This is the default. [This option is specific to the + i386 PE targeted port of the linker] + +`--enable-extra-pe-debug' + Show additional debug info related to auto-import symbol thunking. + [This option is specific to the i386 PE targeted port of the + linker] + +`--section-alignment' + Sets the section alignment. Sections in memory will always begin + at addresses which are a multiple of this number. Defaults to + 0x1000. [This option is specific to the i386 PE targeted port of + the linker] + +`--stack RESERVE' +`--stack RESERVE,COMMIT' + Specify the number of bytes of memory to reserve (and optionally + commit) to be used as stack for this program. The default is 2Mb + reserved, 4K committed. [This option is specific to the i386 PE + targeted port of the linker] + +`--subsystem WHICH' +`--subsystem WHICH:MAJOR' +`--subsystem WHICH:MAJOR.MINOR' + Specifies the subsystem under which your program will execute. The + legal values for WHICH are `native', `windows', `console', + `posix', and `xbox'. You may optionally set the subsystem version + also. Numeric values are also accepted for WHICH. [This option + is specific to the i386 PE targeted port of the linker] + + The following options set flags in the `DllCharacteristics' field + of the PE file header: [These options are specific to PE targeted + ports of the linker] + +`--dynamicbase' + The image base address may be relocated using address space layout + randomization (ASLR). This feature was introduced with MS Windows + Vista for i386 PE targets. + +`--forceinteg' + Code integrity checks are enforced. + +`--nxcompat' + The image is compatible with the Data Execution Prevention. This + feature was introduced with MS Windows XP SP2 for i386 PE targets. + +`--no-isolation' + Although the image understands isolation, do not isolate the image. + +`--no-seh' + The image does not use SEH. No SE handler may be called from this + image. + +`--no-bind' + Do not bind this image. + +`--wdmdriver' + The driver uses the MS Windows Driver Model. + +`--tsaware' + The image is Terminal Server aware. + + +2.1.2 Options specific to C6X uClinux targets +--------------------------------------------- + +The C6X uClinux target uses a binary format called DSBT to support +shared libraries. Each shared library in the system needs to have a +unique index; all executables use an index of 0. + +`--dsbt-size SIZE' + This option sets the number of entires in the DSBT of the current + executable or shared library to SIZE. The default is to create a + table with 64 entries. + +`--dsbt-index INDEX' + This option sets the DSBT index of the current executable or + shared library to INDEX. The default is 0, which is appropriate + for generating executables. If a shared library is generated with + a DSBT index of 0, the `R_C6000_DSBT_INDEX' relocs are copied into + the output file. + + The `--no-merge-exidx-entries' switch disables the merging of + adjacent exidx entries in frame unwind info. + + +2.1.3 Options specific to Motorola 68HC11 and 68HC12 targets +------------------------------------------------------------ + +The 68HC11 and 68HC12 linkers support specific options to control the +memory bank switching mapping and trampoline code generation. + +`--no-trampoline' + This option disables the generation of trampoline. By default a + trampoline is generated for each far function which is called + using a `jsr' instruction (this happens when a pointer to a far + function is taken). + +`--bank-window NAME' + This option indicates to the linker the name of the memory region + in the `MEMORY' specification that describes the memory bank + window. The definition of such region is then used by the linker + to compute paging and addresses within the memory window. + + +2.1.4 Options specific to Motorola 68K target +--------------------------------------------- + +The following options are supported to control handling of GOT +generation when linking for 68K targets. + +`--got=TYPE' + This option tells the linker which GOT generation scheme to use. + TYPE should be one of `single', `negative', `multigot' or + `target'. For more information refer to the Info entry for `ld'. + + + +File: ld.info, Node: Environment, Prev: Options, Up: Invocation + +2.2 Environment Variables +========================= + +You can change the behaviour of `ld' with the environment variables +`GNUTARGET', `LDEMULATION' and `COLLECT_NO_DEMANGLE'. + + `GNUTARGET' determines the input-file object format if you don't use +`-b' (or its synonym `--format'). Its value should be one of the BFD +names for an input format (*note BFD::). If there is no `GNUTARGET' in +the environment, `ld' uses the natural format of the target. If +`GNUTARGET' is set to `default' then BFD attempts to discover the input +format by examining binary input files; this method often succeeds, but +there are potential ambiguities, since there is no method of ensuring +that the magic number used to specify object-file formats is unique. +However, the configuration procedure for BFD on each system places the +conventional format for that system first in the search-list, so +ambiguities are resolved in favor of convention. + + `LDEMULATION' determines the default emulation if you don't use the +`-m' option. The emulation can affect various aspects of linker +behaviour, particularly the default linker script. You can list the +available emulations with the `--verbose' or `-V' options. If the `-m' +option is not used, and the `LDEMULATION' environment variable is not +defined, the default emulation depends upon how the linker was +configured. + + Normally, the linker will default to demangling symbols. However, if +`COLLECT_NO_DEMANGLE' is set in the environment, then it will default +to not demangling symbols. This environment variable is used in a +similar fashion by the `gcc' linker wrapper program. The default may +be overridden by the `--demangle' and `--no-demangle' options. + + +File: ld.info, Node: Scripts, Next: Machine Dependent, Prev: Invocation, Up: Top + +3 Linker Scripts +**************** + +Every link is controlled by a "linker script". This script is written +in the linker command language. + + The main purpose of the linker script is to describe how the +sections in the input files should be mapped into the output file, and +to control the memory layout of the output file. Most linker scripts +do nothing more than this. However, when necessary, the linker script +can also direct the linker to perform many other operations, using the +commands described below. + + The linker always uses a linker script. If you do not supply one +yourself, the linker will use a default script that is compiled into the +linker executable. You can use the `--verbose' command line option to +display the default linker script. Certain command line options, such +as `-r' or `-N', will affect the default linker script. + + You may supply your own linker script by using the `-T' command line +option. When you do this, your linker script will replace the default +linker script. + + You may also use linker scripts implicitly by naming them as input +files to the linker, as though they were files to be linked. *Note +Implicit Linker Scripts::. + +* Menu: + +* Basic Script Concepts:: Basic Linker Script Concepts +* Script Format:: Linker Script Format +* Simple Example:: Simple Linker Script Example +* Simple Commands:: Simple Linker Script Commands +* Assignments:: Assigning Values to Symbols +* SECTIONS:: SECTIONS Command +* MEMORY:: MEMORY Command +* PHDRS:: PHDRS Command +* VERSION:: VERSION Command +* Expressions:: Expressions in Linker Scripts +* Implicit Linker Scripts:: Implicit Linker Scripts + + +File: ld.info, Node: Basic Script Concepts, Next: Script Format, Up: Scripts + +3.1 Basic Linker Script Concepts +================================ + +We need to define some basic concepts and vocabulary in order to +describe the linker script language. + + The linker combines input files into a single output file. The +output file and each input file are in a special data format known as an +"object file format". Each file is called an "object file". The +output file is often called an "executable", but for our purposes we +will also call it an object file. Each object file has, among other +things, a list of "sections". We sometimes refer to a section in an +input file as an "input section"; similarly, a section in the output +file is an "output section". + + Each section in an object file has a name and a size. Most sections +also have an associated block of data, known as the "section contents". +A section may be marked as "loadable", which mean that the contents +should be loaded into memory when the output file is run. A section +with no contents may be "allocatable", which means that an area in +memory should be set aside, but nothing in particular should be loaded +there (in some cases this memory must be zeroed out). A section which +is neither loadable nor allocatable typically contains some sort of +debugging information. + + Every loadable or allocatable output section has two addresses. The +first is the "VMA", or virtual memory address. This is the address the +section will have when the output file is run. The second is the +"LMA", or load memory address. This is the address at which the +section will be loaded. In most cases the two addresses will be the +same. An example of when they might be different is when a data section +is loaded into ROM, and then copied into RAM when the program starts up +(this technique is often used to initialize global variables in a ROM +based system). In this case the ROM address would be the LMA, and the +RAM address would be the VMA. + + You can see the sections in an object file by using the `objdump' +program with the `-h' option. + + Every object file also has a list of "symbols", known as the "symbol +table". A symbol may be defined or undefined. Each symbol has a name, +and each defined symbol has an address, among other information. If +you compile a C or C++ program into an object file, you will get a +defined symbol for every defined function and global or static +variable. Every undefined function or global variable which is +referenced in the input file will become an undefined symbol. + + You can see the symbols in an object file by using the `nm' program, +or by using the `objdump' program with the `-t' option. + + +File: ld.info, Node: Script Format, Next: Simple Example, Prev: Basic Script Concepts, Up: Scripts + +3.2 Linker Script Format +======================== + +Linker scripts are text files. + + You write a linker script as a series of commands. Each command is +either a keyword, possibly followed by arguments, or an assignment to a +symbol. You may separate commands using semicolons. Whitespace is +generally ignored. + + Strings such as file or format names can normally be entered +directly. If the file name contains a character such as a comma which +would otherwise serve to separate file names, you may put the file name +in double quotes. There is no way to use a double quote character in a +file name. + + You may include comments in linker scripts just as in C, delimited by +`/*' and `*/'. As in C, comments are syntactically equivalent to +whitespace. + + +File: ld.info, Node: Simple Example, Next: Simple Commands, Prev: Script Format, Up: Scripts + +3.3 Simple Linker Script Example +================================ + +Many linker scripts are fairly simple. + + The simplest possible linker script has just one command: +`SECTIONS'. You use the `SECTIONS' command to describe the memory +layout of the output file. + + The `SECTIONS' command is a powerful command. Here we will describe +a simple use of it. Let's assume your program consists only of code, +initialized data, and uninitialized data. These will be in the +`.text', `.data', and `.bss' sections, respectively. Let's assume +further that these are the only sections which appear in your input +files. + + For this example, let's say that the code should be loaded at address +0x10000, and that the data should start at address 0x8000000. Here is a +linker script which will do that: + SECTIONS + { + . = 0x10000; + .text : { *(.text) } + . = 0x8000000; + .data : { *(.data) } + .bss : { *(.bss) } + } + + You write the `SECTIONS' command as the keyword `SECTIONS', followed +by a series of symbol assignments and output section descriptions +enclosed in curly braces. + + The first line inside the `SECTIONS' command of the above example +sets the value of the special symbol `.', which is the location +counter. If you do not specify the address of an output section in some +other way (other ways are described later), the address is set from the +current value of the location counter. The location counter is then +incremented by the size of the output section. At the start of the +`SECTIONS' command, the location counter has the value `0'. + + The second line defines an output section, `.text'. The colon is +required syntax which may be ignored for now. Within the curly braces +after the output section name, you list the names of the input sections +which should be placed into this output section. The `*' is a wildcard +which matches any file name. The expression `*(.text)' means all +`.text' input sections in all input files. + + Since the location counter is `0x10000' when the output section +`.text' is defined, the linker will set the address of the `.text' +section in the output file to be `0x10000'. + + The remaining lines define the `.data' and `.bss' sections in the +output file. The linker will place the `.data' output section at +address `0x8000000'. After the linker places the `.data' output +section, the value of the location counter will be `0x8000000' plus the +size of the `.data' output section. The effect is that the linker will +place the `.bss' output section immediately after the `.data' output +section in memory. + + The linker will ensure that each output section has the required +alignment, by increasing the location counter if necessary. In this +example, the specified addresses for the `.text' and `.data' sections +will probably satisfy any alignment constraints, but the linker may +have to create a small gap between the `.data' and `.bss' sections. + + That's it! That's a simple and complete linker script. + + +File: ld.info, Node: Simple Commands, Next: Assignments, Prev: Simple Example, Up: Scripts + +3.4 Simple Linker Script Commands +================================= + +In this section we describe the simple linker script commands. + +* Menu: + +* Entry Point:: Setting the entry point +* File Commands:: Commands dealing with files + +* Format Commands:: Commands dealing with object file formats + +* REGION_ALIAS:: Assign alias names to memory regions +* Miscellaneous Commands:: Other linker script commands + + +File: ld.info, Node: Entry Point, Next: File Commands, Up: Simple Commands + +3.4.1 Setting the Entry Point +----------------------------- + +The first instruction to execute in a program is called the "entry +point". You can use the `ENTRY' linker script command to set the entry +point. The argument is a symbol name: + ENTRY(SYMBOL) + + There are several ways to set the entry point. The linker will set +the entry point by trying each of the following methods in order, and +stopping when one of them succeeds: + * the `-e' ENTRY command-line option; + + * the `ENTRY(SYMBOL)' command in a linker script; + + * the value of a target specific symbol, if it is defined; For many + targets this is `start', but PE and BeOS based systems for example + check a list of possible entry symbols, matching the first one + found. + + * the address of the first byte of the `.text' section, if present; + + * The address `0'. + + +File: ld.info, Node: File Commands, Next: Format Commands, Prev: Entry Point, Up: Simple Commands + +3.4.2 Commands Dealing with Files +--------------------------------- + +Several linker script commands deal with files. + +`INCLUDE FILENAME' + Include the linker script FILENAME at this point. The file will + be searched for in the current directory, and in any directory + specified with the `-L' option. You can nest calls to `INCLUDE' + up to 10 levels deep. + + You can place `INCLUDE' directives at the top level, in `MEMORY' or + `SECTIONS' commands, or in output section descriptions. + +`INPUT(FILE, FILE, ...)' +`INPUT(FILE FILE ...)' + The `INPUT' command directs the linker to include the named files + in the link, as though they were named on the command line. + + For example, if you always want to include `subr.o' any time you do + a link, but you can't be bothered to put it on every link command + line, then you can put `INPUT (subr.o)' in your linker script. + + In fact, if you like, you can list all of your input files in the + linker script, and then invoke the linker with nothing but a `-T' + option. + + In case a "sysroot prefix" is configured, and the filename starts + with the `/' character, and the script being processed was located + inside the "sysroot prefix", the filename will be looked for in + the "sysroot prefix". Otherwise, the linker will try to open the + file in the current directory. If it is not found, the linker + will search through the archive library search path. See the + description of `-L' in *Note Command Line Options: Options. + + If you use `INPUT (-lFILE)', `ld' will transform the name to + `libFILE.a', as with the command line argument `-l'. + + When you use the `INPUT' command in an implicit linker script, the + files will be included in the link at the point at which the linker + script file is included. This can affect archive searching. + +`GROUP(FILE, FILE, ...)' +`GROUP(FILE FILE ...)' + The `GROUP' command is like `INPUT', except that the named files + should all be archives, and they are searched repeatedly until no + new undefined references are created. See the description of `-(' + in *Note Command Line Options: Options. + +`AS_NEEDED(FILE, FILE, ...)' +`AS_NEEDED(FILE FILE ...)' + This construct can appear only inside of the `INPUT' or `GROUP' + commands, among other filenames. The files listed will be handled + as if they appear directly in the `INPUT' or `GROUP' commands, + with the exception of ELF shared libraries, that will be added only + when they are actually needed. This construct essentially enables + `--as-needed' option for all the files listed inside of it and + restores previous `--as-needed' resp. `--no-as-needed' setting + afterwards. + +`OUTPUT(FILENAME)' + The `OUTPUT' command names the output file. Using + `OUTPUT(FILENAME)' in the linker script is exactly like using `-o + FILENAME' on the command line (*note Command Line Options: + Options.). If both are used, the command line option takes + precedence. + + You can use the `OUTPUT' command to define a default name for the + output file other than the usual default of `a.out'. + +`SEARCH_DIR(PATH)' + The `SEARCH_DIR' command adds PATH to the list of paths where `ld' + looks for archive libraries. Using `SEARCH_DIR(PATH)' is exactly + like using `-L PATH' on the command line (*note Command Line + Options: Options.). If both are used, then the linker will search + both paths. Paths specified using the command line option are + searched first. + +`STARTUP(FILENAME)' + The `STARTUP' command is just like the `INPUT' command, except + that FILENAME will become the first input file to be linked, as + though it were specified first on the command line. This may be + useful when using a system in which the entry point is always the + start of the first file. + + +File: ld.info, Node: Format Commands, Next: REGION_ALIAS, Prev: File Commands, Up: Simple Commands + +3.4.3 Commands Dealing with Object File Formats +----------------------------------------------- + +A couple of linker script commands deal with object file formats. + +`OUTPUT_FORMAT(BFDNAME)' +`OUTPUT_FORMAT(DEFAULT, BIG, LITTLE)' + The `OUTPUT_FORMAT' command names the BFD format to use for the + output file (*note BFD::). Using `OUTPUT_FORMAT(BFDNAME)' is + exactly like using `--oformat BFDNAME' on the command line (*note + Command Line Options: Options.). If both are used, the command + line option takes precedence. + + You can use `OUTPUT_FORMAT' with three arguments to use different + formats based on the `-EB' and `-EL' command line options. This + permits the linker script to set the output format based on the + desired endianness. + + If neither `-EB' nor `-EL' are used, then the output format will + be the first argument, DEFAULT. If `-EB' is used, the output + format will be the second argument, BIG. If `-EL' is used, the + output format will be the third argument, LITTLE. + + For example, the default linker script for the MIPS ELF target + uses this command: + OUTPUT_FORMAT(elf32-bigmips, elf32-bigmips, elf32-littlemips) + This says that the default format for the output file is + `elf32-bigmips', but if the user uses the `-EL' command line + option, the output file will be created in the `elf32-littlemips' + format. + +`TARGET(BFDNAME)' + The `TARGET' command names the BFD format to use when reading input + files. It affects subsequent `INPUT' and `GROUP' commands. This + command is like using `-b BFDNAME' on the command line (*note + Command Line Options: Options.). If the `TARGET' command is used + but `OUTPUT_FORMAT' is not, then the last `TARGET' command is also + used to set the format for the output file. *Note BFD::. + + +File: ld.info, Node: REGION_ALIAS, Next: Miscellaneous Commands, Prev: Format Commands, Up: Simple Commands + +3.4.4 Assign alias names to memory regions +------------------------------------------ + +Alias names can be added to existing memory regions created with the +*Note MEMORY:: command. Each name corresponds to at most one memory +region. + + REGION_ALIAS(ALIAS, REGION) + + The `REGION_ALIAS' function creates an alias name ALIAS for the +memory region REGION. This allows a flexible mapping of output sections +to memory regions. An example follows. + + Suppose we have an application for embedded systems which come with +various memory storage devices. All have a general purpose, volatile +memory `RAM' that allows code execution or data storage. Some may have +a read-only, non-volatile memory `ROM' that allows code execution and +read-only data access. The last variant is a read-only, non-volatile +memory `ROM2' with read-only data access and no code execution +capability. We have four output sections: + + * `.text' program code; + + * `.rodata' read-only data; + + * `.data' read-write initialized data; + + * `.bss' read-write zero initialized data. + + The goal is to provide a linker command file that contains a system +independent part defining the output sections and a system dependent +part mapping the output sections to the memory regions available on the +system. Our embedded systems come with three different memory setups +`A', `B' and `C': +Section Variant A Variant B Variant C +.text RAM ROM ROM +.rodata RAM ROM ROM2 +.data RAM RAM/ROM RAM/ROM2 +.bss RAM RAM RAM + The notation `RAM/ROM' or `RAM/ROM2' means that this section is +loaded into region `ROM' or `ROM2' respectively. Please note that the +load address of the `.data' section starts in all three variants at the +end of the `.rodata' section. + + The base linker script that deals with the output sections follows. +It includes the system dependent `linkcmds.memory' file that describes +the memory layout: + INCLUDE linkcmds.memory + + SECTIONS + { + .text : + { + *(.text) + } > REGION_TEXT + .rodata : + { + *(.rodata) + rodata_end = .; + } > REGION_RODATA + .data : AT (rodata_end) + { + data_start = .; + *(.data) + } > REGION_DATA + data_size = SIZEOF(.data); + data_load_start = LOADADDR(.data); + .bss : + { + *(.bss) + } > REGION_BSS + } + + Now we need three different `linkcmds.memory' files to define memory +regions and alias names. The content of `linkcmds.memory' for the three +variants `A', `B' and `C': +`A' + Here everything goes into the `RAM'. + MEMORY + { + RAM : ORIGIN = 0, LENGTH = 4M + } + + REGION_ALIAS("REGION_TEXT", RAM); + REGION_ALIAS("REGION_RODATA", RAM); + REGION_ALIAS("REGION_DATA", RAM); + REGION_ALIAS("REGION_BSS", RAM); + +`B' + Program code and read-only data go into the `ROM'. Read-write + data goes into the `RAM'. An image of the initialized data is + loaded into the `ROM' and will be copied during system start into + the `RAM'. + MEMORY + { + ROM : ORIGIN = 0, LENGTH = 3M + RAM : ORIGIN = 0x10000000, LENGTH = 1M + } + + REGION_ALIAS("REGION_TEXT", ROM); + REGION_ALIAS("REGION_RODATA", ROM); + REGION_ALIAS("REGION_DATA", RAM); + REGION_ALIAS("REGION_BSS", RAM); + +`C' + Program code goes into the `ROM'. Read-only data goes into the + `ROM2'. Read-write data goes into the `RAM'. An image of the + initialized data is loaded into the `ROM2' and will be copied + during system start into the `RAM'. + MEMORY + { + ROM : ORIGIN = 0, LENGTH = 2M + ROM2 : ORIGIN = 0x10000000, LENGTH = 1M + RAM : ORIGIN = 0x20000000, LENGTH = 1M + } + + REGION_ALIAS("REGION_TEXT", ROM); + REGION_ALIAS("REGION_RODATA", ROM2); + REGION_ALIAS("REGION_DATA", RAM); + REGION_ALIAS("REGION_BSS", RAM); + + It is possible to write a common system initialization routine to +copy the `.data' section from `ROM' or `ROM2' into the `RAM' if +necessary: + #include + + extern char data_start []; + extern char data_size []; + extern char data_load_start []; + + void copy_data(void) + { + if (data_start != data_load_start) + { + memcpy(data_start, data_load_start, (size_t) data_size); + } + } + + +File: ld.info, Node: Miscellaneous Commands, Prev: REGION_ALIAS, Up: Simple Commands + +3.4.5 Other Linker Script Commands +---------------------------------- + +There are a few other linker scripts commands. + +`ASSERT(EXP, MESSAGE)' + Ensure that EXP is non-zero. If it is zero, then exit the linker + with an error code, and print MESSAGE. + +`EXTERN(SYMBOL SYMBOL ...)' + Force SYMBOL to be entered in the output file as an undefined + symbol. Doing this may, for example, trigger linking of additional + modules from standard libraries. You may list several SYMBOLs for + each `EXTERN', and you may use `EXTERN' multiple times. This + command has the same effect as the `-u' command-line option. + +`FORCE_COMMON_ALLOCATION' + This command has the same effect as the `-d' command-line option: + to make `ld' assign space to common symbols even if a relocatable + output file is specified (`-r'). + +`INHIBIT_COMMON_ALLOCATION' + This command has the same effect as the `--no-define-common' + command-line option: to make `ld' omit the assignment of addresses + to common symbols even for a non-relocatable output file. + +`INSERT [ AFTER | BEFORE ] OUTPUT_SECTION' + This command is typically used in a script specified by `-T' to + augment the default `SECTIONS' with, for example, overlays. It + inserts all prior linker script statements after (or before) + OUTPUT_SECTION, and also causes `-T' to not override the default + linker script. The exact insertion point is as for orphan + sections. *Note Location Counter::. The insertion happens after + the linker has mapped input sections to output sections. Prior to + the insertion, since `-T' scripts are parsed before the default + linker script, statements in the `-T' script occur before the + default linker script statements in the internal linker + representation of the script. In particular, input section + assignments will be made to `-T' output sections before those in + the default script. Here is an example of how a `-T' script using + `INSERT' might look: + + SECTIONS + { + OVERLAY : + { + .ov1 { ov1*(.text) } + .ov2 { ov2*(.text) } + } + } + INSERT AFTER .text; + +`NOCROSSREFS(SECTION SECTION ...)' + This command may be used to tell `ld' to issue an error about any + references among certain output sections. + + In certain types of programs, particularly on embedded systems when + using overlays, when one section is loaded into memory, another + section will not be. Any direct references between the two + sections would be errors. For example, it would be an error if + code in one section called a function defined in the other section. + + The `NOCROSSREFS' command takes a list of output section names. If + `ld' detects any cross references between the sections, it reports + an error and returns a non-zero exit status. Note that the + `NOCROSSREFS' command uses output section names, not input section + names. + +`OUTPUT_ARCH(BFDARCH)' + Specify a particular output machine architecture. The argument is + one of the names used by the BFD library (*note BFD::). You can + see the architecture of an object file by using the `objdump' + program with the `-f' option. + +`LD_FEATURE(STRING)' + This command may be used to modify `ld' behavior. If STRING is + `"SANE_EXPR"' then absolute symbols and numbers in a script are + simply treated as numbers everywhere. *Note Expression Section::. + + +File: ld.info, Node: Assignments, Next: SECTIONS, Prev: Simple Commands, Up: Scripts + +3.5 Assigning Values to Symbols +=============================== + +You may assign a value to a symbol in a linker script. This will define +the symbol and place it into the symbol table with a global scope. + +* Menu: + +* Simple Assignments:: Simple Assignments +* PROVIDE:: PROVIDE +* PROVIDE_HIDDEN:: PROVIDE_HIDDEN +* Source Code Reference:: How to use a linker script defined symbol in source code + + +File: ld.info, Node: Simple Assignments, Next: PROVIDE, Up: Assignments + +3.5.1 Simple Assignments +------------------------ + +You may assign to a symbol using any of the C assignment operators: + +`SYMBOL = EXPRESSION ;' +`SYMBOL += EXPRESSION ;' +`SYMBOL -= EXPRESSION ;' +`SYMBOL *= EXPRESSION ;' +`SYMBOL /= EXPRESSION ;' +`SYMBOL <<= EXPRESSION ;' +`SYMBOL >>= EXPRESSION ;' +`SYMBOL &= EXPRESSION ;' +`SYMBOL |= EXPRESSION ;' + + The first case will define SYMBOL to the value of EXPRESSION. In +the other cases, SYMBOL must already be defined, and the value will be +adjusted accordingly. + + The special symbol name `.' indicates the location counter. You may +only use this within a `SECTIONS' command. *Note Location Counter::. + + The semicolon after EXPRESSION is required. + + Expressions are defined below; see *Note Expressions::. + + You may write symbol assignments as commands in their own right, or +as statements within a `SECTIONS' command, or as part of an output +section description in a `SECTIONS' command. + + The section of the symbol will be set from the section of the +expression; for more information, see *Note Expression Section::. + + Here is an example showing the three different places that symbol +assignments may be used: + + floating_point = 0; + SECTIONS + { + .text : + { + *(.text) + _etext = .; + } + _bdata = (. + 3) & ~ 3; + .data : { *(.data) } + } + In this example, the symbol `floating_point' will be defined as +zero. The symbol `_etext' will be defined as the address following the +last `.text' input section. The symbol `_bdata' will be defined as the +address following the `.text' output section aligned upward to a 4 byte +boundary. + + +File: ld.info, Node: PROVIDE, Next: PROVIDE_HIDDEN, Prev: Simple Assignments, Up: Assignments + +3.5.2 PROVIDE +------------- + +In some cases, it is desirable for a linker script to define a symbol +only if it is referenced and is not defined by any object included in +the link. For example, traditional linkers defined the symbol `etext'. +However, ANSI C requires that the user be able to use `etext' as a +function name without encountering an error. The `PROVIDE' keyword may +be used to define a symbol, such as `etext', only if it is referenced +but not defined. The syntax is `PROVIDE(SYMBOL = EXPRESSION)'. + + Here is an example of using `PROVIDE' to define `etext': + SECTIONS + { + .text : + { + *(.text) + _etext = .; + PROVIDE(etext = .); + } + } + + In this example, if the program defines `_etext' (with a leading +underscore), the linker will give a multiple definition error. If, on +the other hand, the program defines `etext' (with no leading +underscore), the linker will silently use the definition in the program. +If the program references `etext' but does not define it, the linker +will use the definition in the linker script. + + +File: ld.info, Node: PROVIDE_HIDDEN, Next: Source Code Reference, Prev: PROVIDE, Up: Assignments + +3.5.3 PROVIDE_HIDDEN +-------------------- + +Similar to `PROVIDE'. For ELF targeted ports, the symbol will be +hidden and won't be exported. + + +File: ld.info, Node: Source Code Reference, Prev: PROVIDE_HIDDEN, Up: Assignments + +3.5.4 Source Code Reference +--------------------------- + +Accessing a linker script defined variable from source code is not +intuitive. In particular a linker script symbol is not equivalent to a +variable declaration in a high level language, it is instead a symbol +that does not have a value. + + Before going further, it is important to note that compilers often +transform names in the source code into different names when they are +stored in the symbol table. For example, Fortran compilers commonly +prepend or append an underscore, and C++ performs extensive `name +mangling'. Therefore there might be a discrepancy between the name of +a variable as it is used in source code and the name of the same +variable as it is defined in a linker script. For example in C a +linker script variable might be referred to as: + + extern int foo; + + But in the linker script it might be defined as: + + _foo = 1000; + + In the remaining examples however it is assumed that no name +transformation has taken place. + + When a symbol is declared in a high level language such as C, two +things happen. The first is that the compiler reserves enough space in +the program's memory to hold the _value_ of the symbol. The second is +that the compiler creates an entry in the program's symbol table which +holds the symbol's _address_. ie the symbol table contains the address +of the block of memory holding the symbol's value. So for example the +following C declaration, at file scope: + + int foo = 1000; + + creates a entry called `foo' in the symbol table. This entry holds +the address of an `int' sized block of memory where the number 1000 is +initially stored. + + When a program references a symbol the compiler generates code that +first accesses the symbol table to find the address of the symbol's +memory block and then code to read the value from that memory block. +So: + + foo = 1; + + looks up the symbol `foo' in the symbol table, gets the address +associated with this symbol and then writes the value 1 into that +address. Whereas: + + int * a = & foo; + + looks up the symbol `foo' in the symbol table, gets it address and +then copies this address into the block of memory associated with the +variable `a'. + + Linker scripts symbol declarations, by contrast, create an entry in +the symbol table but do not assign any memory to them. Thus they are +an address without a value. So for example the linker script +definition: + + foo = 1000; + + creates an entry in the symbol table called `foo' which holds the +address of memory location 1000, but nothing special is stored at +address 1000. This means that you cannot access the _value_ of a +linker script defined symbol - it has no value - all you can do is +access the _address_ of a linker script defined symbol. + + Hence when you are using a linker script defined symbol in source +code you should always take the address of the symbol, and never +attempt to use its value. For example suppose you want to copy the +contents of a section of memory called .ROM into a section called +.FLASH and the linker script contains these declarations: + + start_of_ROM = .ROM; + end_of_ROM = .ROM + sizeof (.ROM) - 1; + start_of_FLASH = .FLASH; + + Then the C source code to perform the copy would be: + + extern char start_of_ROM, end_of_ROM, start_of_FLASH; + + memcpy (& start_of_FLASH, & start_of_ROM, & end_of_ROM - & start_of_ROM); + + Note the use of the `&' operators. These are correct. + + +File: ld.info, Node: SECTIONS, Next: MEMORY, Prev: Assignments, Up: Scripts + +3.6 SECTIONS Command +==================== + +The `SECTIONS' command tells the linker how to map input sections into +output sections, and how to place the output sections in memory. + + The format of the `SECTIONS' command is: + SECTIONS + { + SECTIONS-COMMAND + SECTIONS-COMMAND + ... + } + + Each SECTIONS-COMMAND may of be one of the following: + + * an `ENTRY' command (*note Entry command: Entry Point.) + + * a symbol assignment (*note Assignments::) + + * an output section description + + * an overlay description + + The `ENTRY' command and symbol assignments are permitted inside the +`SECTIONS' command for convenience in using the location counter in +those commands. This can also make the linker script easier to +understand because you can use those commands at meaningful points in +the layout of the output file. + + Output section descriptions and overlay descriptions are described +below. + + If you do not use a `SECTIONS' command in your linker script, the +linker will place each input section into an identically named output +section in the order that the sections are first encountered in the +input files. If all input sections are present in the first file, for +example, the order of sections in the output file will match the order +in the first input file. The first section will be at address zero. + +* Menu: + +* Output Section Description:: Output section description +* Output Section Name:: Output section name +* Output Section Address:: Output section address +* Input Section:: Input section description +* Output Section Data:: Output section data +* Output Section Keywords:: Output section keywords +* Output Section Discarding:: Output section discarding +* Output Section Attributes:: Output section attributes +* Overlay Description:: Overlay description + + +File: ld.info, Node: Output Section Description, Next: Output Section Name, Up: SECTIONS + +3.6.1 Output Section Description +-------------------------------- + +The full description of an output section looks like this: + SECTION [ADDRESS] [(TYPE)] : + [AT(LMA)] + [ALIGN(SECTION_ALIGN)] + [SUBALIGN(SUBSECTION_ALIGN)] + [CONSTRAINT] + { + OUTPUT-SECTION-COMMAND + OUTPUT-SECTION-COMMAND + ... + } [>REGION] [AT>LMA_REGION] [:PHDR :PHDR ...] [=FILLEXP] + + Most output sections do not use most of the optional section +attributes. + + The whitespace around SECTION is required, so that the section name +is unambiguous. The colon and the curly braces are also required. The +line breaks and other white space are optional. + + Each OUTPUT-SECTION-COMMAND may be one of the following: + + * a symbol assignment (*note Assignments::) + + * an input section description (*note Input Section::) + + * data values to include directly (*note Output Section Data::) + + * a special output section keyword (*note Output Section Keywords::) + + +File: ld.info, Node: Output Section Name, Next: Output Section Address, Prev: Output Section Description, Up: SECTIONS + +3.6.2 Output Section Name +------------------------- + +The name of the output section is SECTION. SECTION must meet the +constraints of your output format. In formats which only support a +limited number of sections, such as `a.out', the name must be one of +the names supported by the format (`a.out', for example, allows only +`.text', `.data' or `.bss'). If the output format supports any number +of sections, but with numbers and not names (as is the case for Oasys), +the name should be supplied as a quoted numeric string. A section name +may consist of any sequence of characters, but a name which contains +any unusual characters such as commas must be quoted. + + The output section name `/DISCARD/' is special; *Note Output Section +Discarding::. + + +File: ld.info, Node: Output Section Address, Next: Input Section, Prev: Output Section Name, Up: SECTIONS + +3.6.3 Output Section Address +---------------------------- + +The ADDRESS is an expression for the VMA (the virtual memory address) +of the output section. This address is optional, but if it is provided +then the output address will be set exactly as specified. + + If the output address is not specified then one will be chosen for +the section, based on the heuristic below. This address will be +adjusted to fit the alignment requirement of the output section. The +alignment requirement is the strictest alignment of any input section +contained within the output section. + + The output section address heuristic is as follows: + + * If an output memory REGION is set for the section then it is added + to this region and its address will be the next free address in + that region. + + * If the MEMORY command has been used to create a list of memory + regions then the first region which has attributes compatible with + the section is selected to contain it. The section's output + address will be the next free address in that region; *Note + MEMORY::. + + * If no memory regions were specified, or none match the section then + the output address will be based on the current value of the + location counter. + +For example: + + .text . : { *(.text) } + +and + + .text : { *(.text) } + +are subtly different. The first will set the address of the `.text' +output section to the current value of the location counter. The +second will set it to the current value of the location counter aligned +to the strictest alignment of any of the `.text' input sections. + + The ADDRESS may be an arbitrary expression; *Note Expressions::. +For example, if you want to align the section on a 0x10 byte boundary, +so that the lowest four bits of the section address are zero, you could +do something like this: + .text ALIGN(0x10) : { *(.text) } + This works because `ALIGN' returns the current location counter +aligned upward to the specified value. + + Specifying ADDRESS for a section will change the value of the +location counter, provided that the section is non-empty. (Empty +sections are ignored). + + +File: ld.info, Node: Input Section, Next: Output Section Data, Prev: Output Section Address, Up: SECTIONS + +3.6.4 Input Section Description +------------------------------- + +The most common output section command is an input section description. + + The input section description is the most basic linker script +operation. You use output sections to tell the linker how to lay out +your program in memory. You use input section descriptions to tell the +linker how to map the input files into your memory layout. + +* Menu: + +* Input Section Basics:: Input section basics +* Input Section Wildcards:: Input section wildcard patterns +* Input Section Common:: Input section for common symbols +* Input Section Keep:: Input section and garbage collection +* Input Section Example:: Input section example + + +File: ld.info, Node: Input Section Basics, Next: Input Section Wildcards, Up: Input Section + +3.6.4.1 Input Section Basics +............................ + +An input section description consists of a file name optionally followed +by a list of section names in parentheses. + + The file name and the section name may be wildcard patterns, which we +describe further below (*note Input Section Wildcards::). + + The most common input section description is to include all input +sections with a particular name in the output section. For example, to +include all input `.text' sections, you would write: + *(.text) + Here the `*' is a wildcard which matches any file name. To exclude +a list of files from matching the file name wildcard, EXCLUDE_FILE may +be used to match all files except the ones specified in the +EXCLUDE_FILE list. For example: + *(EXCLUDE_FILE (*crtend.o *otherfile.o) .ctors) + will cause all .ctors sections from all files except `crtend.o' and +`otherfile.o' to be included. + + There are two ways to include more than one section: + *(.text .rdata) + *(.text) *(.rdata) + The difference between these is the order in which the `.text' and +`.rdata' input sections will appear in the output section. In the +first example, they will be intermingled, appearing in the same order as +they are found in the linker input. In the second example, all `.text' +input sections will appear first, followed by all `.rdata' input +sections. + + You can specify a file name to include sections from a particular +file. You would do this if one or more of your files contain special +data that needs to be at a particular location in memory. For example: + data.o(.data) + + To refine the sections that are included based on the section flags +of an input section, INPUT_SECTION_FLAGS may be used. + + Here is a simple example for using Section header flags for ELF +sections: + + SECTIONS { + .text : { INPUT_SECTION_FLAGS (SHF_MERGE & SHF_STRINGS) *(.text) } + .text2 : { INPUT_SECTION_FLAGS (!SHF_WRITE) *(.text) } + } + + In this example, the output section `.text' will be comprised of any +input section matching the name *(.text) whose section header flags +`SHF_MERGE' and `SHF_STRINGS' are set. The output section `.text2' +will be comprised of any input section matching the name *(.text) whose +section header flag `SHF_WRITE' is clear. + + You can also specify files within archives by writing a pattern +matching the archive, a colon, then the pattern matching the file, with +no whitespace around the colon. + +`archive:file' + matches file within archive + +`archive:' + matches the whole archive + +`:file' + matches file but not one in an archive + + Either one or both of `archive' and `file' can contain shell +wildcards. On DOS based file systems, the linker will assume that a +single letter followed by a colon is a drive specifier, so `c:myfile.o' +is a simple file specification, not `myfile.o' within an archive called +`c'. `archive:file' filespecs may also be used within an +`EXCLUDE_FILE' list, but may not appear in other linker script +contexts. For instance, you cannot extract a file from an archive by +using `archive:file' in an `INPUT' command. + + If you use a file name without a list of sections, then all sections +in the input file will be included in the output section. This is not +commonly done, but it may by useful on occasion. For example: + data.o + + When you use a file name which is not an `archive:file' specifier +and does not contain any wild card characters, the linker will first +see if you also specified the file name on the linker command line or +in an `INPUT' command. If you did not, the linker will attempt to open +the file as an input file, as though it appeared on the command line. +Note that this differs from an `INPUT' command, because the linker will +not search for the file in the archive search path. + + +File: ld.info, Node: Input Section Wildcards, Next: Input Section Common, Prev: Input Section Basics, Up: Input Section + +3.6.4.2 Input Section Wildcard Patterns +....................................... + +In an input section description, either the file name or the section +name or both may be wildcard patterns. + + The file name of `*' seen in many examples is a simple wildcard +pattern for the file name. + + The wildcard patterns are like those used by the Unix shell. + +`*' + matches any number of characters + +`?' + matches any single character + +`[CHARS]' + matches a single instance of any of the CHARS; the `-' character + may be used to specify a range of characters, as in `[a-z]' to + match any lower case letter + +`\' + quotes the following character + + When a file name is matched with a wildcard, the wildcard characters +will not match a `/' character (used to separate directory names on +Unix). A pattern consisting of a single `*' character is an exception; +it will always match any file name, whether it contains a `/' or not. +In a section name, the wildcard characters will match a `/' character. + + File name wildcard patterns only match files which are explicitly +specified on the command line or in an `INPUT' command. The linker +does not search directories to expand wildcards. + + If a file name matches more than one wildcard pattern, or if a file +name appears explicitly and is also matched by a wildcard pattern, the +linker will use the first match in the linker script. For example, this +sequence of input section descriptions is probably in error, because the +`data.o' rule will not be used: + .data : { *(.data) } + .data1 : { data.o(.data) } + + Normally, the linker will place files and sections matched by +wildcards in the order in which they are seen during the link. You can +change this by using the `SORT_BY_NAME' keyword, which appears before a +wildcard pattern in parentheses (e.g., `SORT_BY_NAME(.text*)'). When +the `SORT_BY_NAME' keyword is used, the linker will sort the files or +sections into ascending order by name before placing them in the output +file. + + `SORT_BY_ALIGNMENT' is very similar to `SORT_BY_NAME'. The +difference is `SORT_BY_ALIGNMENT' will sort sections into ascending +order by alignment before placing them in the output file. + + `SORT_BY_INIT_PRIORITY' is very similar to `SORT_BY_NAME'. The +difference is `SORT_BY_INIT_PRIORITY' will sort sections into ascending +order by numerical value of the GCC init_priority attribute encoded in +the section name before placing them in the output file. + + `SORT' is an alias for `SORT_BY_NAME'. + + When there are nested section sorting commands in linker script, +there can be at most 1 level of nesting for section sorting commands. + + 1. `SORT_BY_NAME' (`SORT_BY_ALIGNMENT' (wildcard section pattern)). + It will sort the input sections by name first, then by alignment + if 2 sections have the same name. + + 2. `SORT_BY_ALIGNMENT' (`SORT_BY_NAME' (wildcard section pattern)). + It will sort the input sections by alignment first, then by name + if 2 sections have the same alignment. + + 3. `SORT_BY_NAME' (`SORT_BY_NAME' (wildcard section pattern)) is + treated the same as `SORT_BY_NAME' (wildcard section pattern). + + 4. `SORT_BY_ALIGNMENT' (`SORT_BY_ALIGNMENT' (wildcard section + pattern)) is treated the same as `SORT_BY_ALIGNMENT' (wildcard + section pattern). + + 5. All other nested section sorting commands are invalid. + + When both command line section sorting option and linker script +section sorting command are used, section sorting command always takes +precedence over the command line option. + + If the section sorting command in linker script isn't nested, the +command line option will make the section sorting command to be treated +as nested sorting command. + + 1. `SORT_BY_NAME' (wildcard section pattern ) with `--sort-sections + alignment' is equivalent to `SORT_BY_NAME' (`SORT_BY_ALIGNMENT' + (wildcard section pattern)). + + 2. `SORT_BY_ALIGNMENT' (wildcard section pattern) with + `--sort-section name' is equivalent to `SORT_BY_ALIGNMENT' + (`SORT_BY_NAME' (wildcard section pattern)). + + If the section sorting command in linker script is nested, the +command line option will be ignored. + + If you ever get confused about where input sections are going, use +the `-M' linker option to generate a map file. The map file shows +precisely how input sections are mapped to output sections. + + This example shows how wildcard patterns might be used to partition +files. This linker script directs the linker to place all `.text' +sections in `.text' and all `.bss' sections in `.bss'. The linker will +place the `.data' section from all files beginning with an upper case +character in `.DATA'; for all other files, the linker will place the +`.data' section in `.data'. + SECTIONS { + .text : { *(.text) } + .DATA : { [A-Z]*(.data) } + .data : { *(.data) } + .bss : { *(.bss) } + } + + +File: ld.info, Node: Input Section Common, Next: Input Section Keep, Prev: Input Section Wildcards, Up: Input Section + +3.6.4.3 Input Section for Common Symbols +........................................ + +A special notation is needed for common symbols, because in many object +file formats common symbols do not have a particular input section. The +linker treats common symbols as though they are in an input section +named `COMMON'. + + You may use file names with the `COMMON' section just as with any +other input sections. You can use this to place common symbols from a +particular input file in one section while common symbols from other +input files are placed in another section. + + In most cases, common symbols in input files will be placed in the +`.bss' section in the output file. For example: + .bss { *(.bss) *(COMMON) } + + Some object file formats have more than one type of common symbol. +For example, the MIPS ELF object file format distinguishes standard +common symbols and small common symbols. In this case, the linker will +use a different special section name for other types of common symbols. +In the case of MIPS ELF, the linker uses `COMMON' for standard common +symbols and `.scommon' for small common symbols. This permits you to +map the different types of common symbols into memory at different +locations. + + You will sometimes see `[COMMON]' in old linker scripts. This +notation is now considered obsolete. It is equivalent to `*(COMMON)'. + + +File: ld.info, Node: Input Section Keep, Next: Input Section Example, Prev: Input Section Common, Up: Input Section + +3.6.4.4 Input Section and Garbage Collection +............................................ + +When link-time garbage collection is in use (`--gc-sections'), it is +often useful to mark sections that should not be eliminated. This is +accomplished by surrounding an input section's wildcard entry with +`KEEP()', as in `KEEP(*(.init))' or `KEEP(SORT_BY_NAME(*)(.ctors))'. + + +File: ld.info, Node: Input Section Example, Prev: Input Section Keep, Up: Input Section + +3.6.4.5 Input Section Example +............................. + +The following example is a complete linker script. It tells the linker +to read all of the sections from file `all.o' and place them at the +start of output section `outputa' which starts at location `0x10000'. +All of section `.input1' from file `foo.o' follows immediately, in the +same output section. All of section `.input2' from `foo.o' goes into +output section `outputb', followed by section `.input1' from `foo1.o'. +All of the remaining `.input1' and `.input2' sections from any files +are written to output section `outputc'. + + SECTIONS { + outputa 0x10000 : + { + all.o + foo.o (.input1) + } + outputb : + { + foo.o (.input2) + foo1.o (.input1) + } + outputc : + { + *(.input1) + *(.input2) + } + } + + +File: ld.info, Node: Output Section Data, Next: Output Section Keywords, Prev: Input Section, Up: SECTIONS + +3.6.5 Output Section Data +------------------------- + +You can include explicit bytes of data in an output section by using +`BYTE', `SHORT', `LONG', `QUAD', or `SQUAD' as an output section +command. Each keyword is followed by an expression in parentheses +providing the value to store (*note Expressions::). The value of the +expression is stored at the current value of the location counter. + + The `BYTE', `SHORT', `LONG', and `QUAD' commands store one, two, +four, and eight bytes (respectively). After storing the bytes, the +location counter is incremented by the number of bytes stored. + + For example, this will store the byte 1 followed by the four byte +value of the symbol `addr': + BYTE(1) + LONG(addr) + + When using a 64 bit host or target, `QUAD' and `SQUAD' are the same; +they both store an 8 byte, or 64 bit, value. When both host and target +are 32 bits, an expression is computed as 32 bits. In this case `QUAD' +stores a 32 bit value zero extended to 64 bits, and `SQUAD' stores a 32 +bit value sign extended to 64 bits. + + If the object file format of the output file has an explicit +endianness, which is the normal case, the value will be stored in that +endianness. When the object file format does not have an explicit +endianness, as is true of, for example, S-records, the value will be +stored in the endianness of the first input object file. + + Note--these commands only work inside a section description and not +between them, so the following will produce an error from the linker: + SECTIONS { .text : { *(.text) } LONG(1) .data : { *(.data) } } + whereas this will work: + SECTIONS { .text : { *(.text) ; LONG(1) } .data : { *(.data) } } + + You may use the `FILL' command to set the fill pattern for the +current section. It is followed by an expression in parentheses. Any +otherwise unspecified regions of memory within the section (for example, +gaps left due to the required alignment of input sections) are filled +with the value of the expression, repeated as necessary. A `FILL' +statement covers memory locations after the point at which it occurs in +the section definition; by including more than one `FILL' statement, +you can have different fill patterns in different parts of an output +section. + + This example shows how to fill unspecified regions of memory with the +value `0x90': + FILL(0x90909090) + + The `FILL' command is similar to the `=FILLEXP' output section +attribute, but it only affects the part of the section following the +`FILL' command, rather than the entire section. If both are used, the +`FILL' command takes precedence. *Note Output Section Fill::, for +details on the fill expression. + + +File: ld.info, Node: Output Section Keywords, Next: Output Section Discarding, Prev: Output Section Data, Up: SECTIONS + +3.6.6 Output Section Keywords +----------------------------- + +There are a couple of keywords which can appear as output section +commands. + +`CREATE_OBJECT_SYMBOLS' + The command tells the linker to create a symbol for each input + file. The name of each symbol will be the name of the + corresponding input file. The section of each symbol will be the + output section in which the `CREATE_OBJECT_SYMBOLS' command + appears. + + This is conventional for the a.out object file format. It is not + normally used for any other object file format. + +`CONSTRUCTORS' + When linking using the a.out object file format, the linker uses an + unusual set construct to support C++ global constructors and + destructors. When linking object file formats which do not support + arbitrary sections, such as ECOFF and XCOFF, the linker will + automatically recognize C++ global constructors and destructors by + name. For these object file formats, the `CONSTRUCTORS' command + tells the linker to place constructor information in the output + section where the `CONSTRUCTORS' command appears. The + `CONSTRUCTORS' command is ignored for other object file formats. + + The symbol `__CTOR_LIST__' marks the start of the global + constructors, and the symbol `__CTOR_END__' marks the end. + Similarly, `__DTOR_LIST__' and `__DTOR_END__' mark the start and + end of the global destructors. The first word in the list is the + number of entries, followed by the address of each constructor or + destructor, followed by a zero word. The compiler must arrange to + actually run the code. For these object file formats GNU C++ + normally calls constructors from a subroutine `__main'; a call to + `__main' is automatically inserted into the startup code for + `main'. GNU C++ normally runs destructors either by using + `atexit', or directly from the function `exit'. + + For object file formats such as `COFF' or `ELF' which support + arbitrary section names, GNU C++ will normally arrange to put the + addresses of global constructors and destructors into the `.ctors' + and `.dtors' sections. Placing the following sequence into your + linker script will build the sort of table which the GNU C++ + runtime code expects to see. + + __CTOR_LIST__ = .; + LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) + *(.ctors) + LONG(0) + __CTOR_END__ = .; + __DTOR_LIST__ = .; + LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) + *(.dtors) + LONG(0) + __DTOR_END__ = .; + + If you are using the GNU C++ support for initialization priority, + which provides some control over the order in which global + constructors are run, you must sort the constructors at link time + to ensure that they are executed in the correct order. When using + the `CONSTRUCTORS' command, use `SORT_BY_NAME(CONSTRUCTORS)' + instead. When using the `.ctors' and `.dtors' sections, use + `*(SORT_BY_NAME(.ctors))' and `*(SORT_BY_NAME(.dtors))' instead of + just `*(.ctors)' and `*(.dtors)'. + + Normally the compiler and linker will handle these issues + automatically, and you will not need to concern yourself with + them. However, you may need to consider this if you are using C++ + and writing your own linker scripts. + + + +File: ld.info, Node: Output Section Discarding, Next: Output Section Attributes, Prev: Output Section Keywords, Up: SECTIONS + +3.6.7 Output Section Discarding +------------------------------- + +The linker will not create output sections with no contents. This is +for convenience when referring to input sections that may or may not be +present in any of the input files. For example: + .foo : { *(.foo) } + will only create a `.foo' section in the output file if there is a +`.foo' section in at least one input file, and if the input sections +are not all empty. Other link script directives that allocate space in +an output section will also create the output section. + + The linker will ignore address assignments (*note Output Section +Address::) on discarded output sections, except when the linker script +defines symbols in the output section. In that case the linker will +obey the address assignments, possibly advancing dot even though the +section is discarded. + + The special output section name `/DISCARD/' may be used to discard +input sections. Any input sections which are assigned to an output +section named `/DISCARD/' are not included in the output file. + + +File: ld.info, Node: Output Section Attributes, Next: Overlay Description, Prev: Output Section Discarding, Up: SECTIONS + +3.6.8 Output Section Attributes +------------------------------- + +We showed above that the full description of an output section looked +like this: + + SECTION [ADDRESS] [(TYPE)] : + [AT(LMA)] + [ALIGN(SECTION_ALIGN)] + [SUBALIGN(SUBSECTION_ALIGN)] + [CONSTRAINT] + { + OUTPUT-SECTION-COMMAND + OUTPUT-SECTION-COMMAND + ... + } [>REGION] [AT>LMA_REGION] [:PHDR :PHDR ...] [=FILLEXP] + + We've already described SECTION, ADDRESS, and +OUTPUT-SECTION-COMMAND. In this section we will describe the remaining +section attributes. + +* Menu: + +* Output Section Type:: Output section type +* Output Section LMA:: Output section LMA +* Forced Output Alignment:: Forced Output Alignment +* Forced Input Alignment:: Forced Input Alignment +* Output Section Constraint:: Output section constraint +* Output Section Region:: Output section region +* Output Section Phdr:: Output section phdr +* Output Section Fill:: Output section fill + + +File: ld.info, Node: Output Section Type, Next: Output Section LMA, Up: Output Section Attributes + +3.6.8.1 Output Section Type +........................... + +Each output section may have a type. The type is a keyword in +parentheses. The following types are defined: + +`NOLOAD' + The section should be marked as not loadable, so that it will not + be loaded into memory when the program is run. + +`DSECT' +`COPY' +`INFO' +`OVERLAY' + These type names are supported for backward compatibility, and are + rarely used. They all have the same effect: the section should be + marked as not allocatable, so that no memory is allocated for the + section when the program is run. + + The linker normally sets the attributes of an output section based on +the input sections which map into it. You can override this by using +the section type. For example, in the script sample below, the `ROM' +section is addressed at memory location `0' and does not need to be +loaded when the program is run. + SECTIONS { + ROM 0 (NOLOAD) : { ... } + ... + } + + +File: ld.info, Node: Output Section LMA, Next: Forced Output Alignment, Prev: Output Section Type, Up: Output Section Attributes + +3.6.8.2 Output Section LMA +.......................... + +Every section has a virtual address (VMA) and a load address (LMA); see +*Note Basic Script Concepts::. The virtual address is specified by the +*note Output Section Address:: described earlier. The load address is +specified by the `AT' or `AT>' keywords. Specifying a load address is +optional. + + The `AT' keyword takes an expression as an argument. This specifies +the exact load address of the section. The `AT>' keyword takes the +name of a memory region as an argument. *Note MEMORY::. The load +address of the section is set to the next free address in the region, +aligned to the section's alignment requirements. + + If neither `AT' nor `AT>' is specified for an allocatable section, +the linker will use the following heuristic to determine the load +address: + + * If the section has a specific VMA address, then this is used as + the LMA address as well. + + * If the section is not allocatable then its LMA is set to its VMA. + + * Otherwise if a memory region can be found that is compatible with + the current section, and this region contains at least one + section, then the LMA is set so the difference between the VMA and + LMA is the same as the difference between the VMA and LMA of the + last section in the located region. + + * If no memory regions have been declared then a default region that + covers the entire address space is used in the previous step. + + * If no suitable region could be found, or there was no previous + section then the LMA is set equal to the VMA. + + This feature is designed to make it easy to build a ROM image. For +example, the following linker script creates three output sections: one +called `.text', which starts at `0x1000', one called `.mdata', which is +loaded at the end of the `.text' section even though its VMA is +`0x2000', and one called `.bss' to hold uninitialized data at address +`0x3000'. The symbol `_data' is defined with the value `0x2000', which +shows that the location counter holds the VMA value, not the LMA value. + + SECTIONS + { + .text 0x1000 : { *(.text) _etext = . ; } + .mdata 0x2000 : + AT ( ADDR (.text) + SIZEOF (.text) ) + { _data = . ; *(.data); _edata = . ; } + .bss 0x3000 : + { _bstart = . ; *(.bss) *(COMMON) ; _bend = . ;} + } + + The run-time initialization code for use with a program generated +with this linker script would include something like the following, to +copy the initialized data from the ROM image to its runtime address. +Notice how this code takes advantage of the symbols defined by the +linker script. + + extern char _etext, _data, _edata, _bstart, _bend; + char *src = &_etext; + char *dst = &_data; + + /* ROM has data at end of text; copy it. */ + while (dst < &_edata) + *dst++ = *src++; + + /* Zero bss. */ + for (dst = &_bstart; dst< &_bend; dst++) + *dst = 0; + + +File: ld.info, Node: Forced Output Alignment, Next: Forced Input Alignment, Prev: Output Section LMA, Up: Output Section Attributes + +3.6.8.3 Forced Output Alignment +............................... + +You can increase an output section's alignment by using ALIGN. + + +File: ld.info, Node: Forced Input Alignment, Next: Output Section Constraint, Prev: Forced Output Alignment, Up: Output Section Attributes + +3.6.8.4 Forced Input Alignment +.............................. + +You can force input section alignment within an output section by using +SUBALIGN. The value specified overrides any alignment given by input +sections, whether larger or smaller. + + +File: ld.info, Node: Output Section Constraint, Next: Output Section Region, Prev: Forced Input Alignment, Up: Output Section Attributes + +3.6.8.5 Output Section Constraint +................................. + +You can specify that an output section should only be created if all of +its input sections are read-only or all of its input sections are +read-write by using the keyword `ONLY_IF_RO' and `ONLY_IF_RW' +respectively. + + +File: ld.info, Node: Output Section Region, Next: Output Section Phdr, Prev: Output Section Constraint, Up: Output Section Attributes + +3.6.8.6 Output Section Region +............................. + +You can assign a section to a previously defined region of memory by +using `>REGION'. *Note MEMORY::. + + Here is a simple example: + MEMORY { rom : ORIGIN = 0x1000, LENGTH = 0x1000 } + SECTIONS { ROM : { *(.text) } >rom } + + +File: ld.info, Node: Output Section Phdr, Next: Output Section Fill, Prev: Output Section Region, Up: Output Section Attributes + +3.6.8.7 Output Section Phdr +........................... + +You can assign a section to a previously defined program segment by +using `:PHDR'. *Note PHDRS::. If a section is assigned to one or more +segments, then all subsequent allocated sections will be assigned to +those segments as well, unless they use an explicitly `:PHDR' modifier. +You can use `:NONE' to tell the linker to not put the section in any +segment at all. + + Here is a simple example: + PHDRS { text PT_LOAD ; } + SECTIONS { .text : { *(.text) } :text } + + +File: ld.info, Node: Output Section Fill, Prev: Output Section Phdr, Up: Output Section Attributes + +3.6.8.8 Output Section Fill +........................... + +You can set the fill pattern for an entire section by using `=FILLEXP'. +FILLEXP is an expression (*note Expressions::). Any otherwise +unspecified regions of memory within the output section (for example, +gaps left due to the required alignment of input sections) will be +filled with the value, repeated as necessary. If the fill expression +is a simple hex number, ie. a string of hex digit starting with `0x' +and without a trailing `k' or `M', then an arbitrarily long sequence of +hex digits can be used to specify the fill pattern; Leading zeros +become part of the pattern too. For all other cases, including extra +parentheses or a unary `+', the fill pattern is the four least +significant bytes of the value of the expression. In all cases, the +number is big-endian. + + You can also change the fill value with a `FILL' command in the +output section commands; (*note Output Section Data::). + + Here is a simple example: + SECTIONS { .text : { *(.text) } =0x90909090 } + + +File: ld.info, Node: Overlay Description, Prev: Output Section Attributes, Up: SECTIONS + +3.6.9 Overlay Description +------------------------- + +An overlay description provides an easy way to describe sections which +are to be loaded as part of a single memory image but are to be run at +the same memory address. At run time, some sort of overlay manager will +copy the overlaid sections in and out of the runtime memory address as +required, perhaps by simply manipulating addressing bits. This approach +can be useful, for example, when a certain region of memory is faster +than another. + + Overlays are described using the `OVERLAY' command. The `OVERLAY' +command is used within a `SECTIONS' command, like an output section +description. The full syntax of the `OVERLAY' command is as follows: + OVERLAY [START] : [NOCROSSREFS] [AT ( LDADDR )] + { + SECNAME1 + { + OUTPUT-SECTION-COMMAND + OUTPUT-SECTION-COMMAND + ... + } [:PHDR...] [=FILL] + SECNAME2 + { + OUTPUT-SECTION-COMMAND + OUTPUT-SECTION-COMMAND + ... + } [:PHDR...] [=FILL] + ... + } [>REGION] [:PHDR...] [=FILL] + + Everything is optional except `OVERLAY' (a keyword), and each +section must have a name (SECNAME1 and SECNAME2 above). The section +definitions within the `OVERLAY' construct are identical to those +within the general `SECTIONS' contruct (*note SECTIONS::), except that +no addresses and no memory regions may be defined for sections within +an `OVERLAY'. + + The sections are all defined with the same starting address. The +load addresses of the sections are arranged such that they are +consecutive in memory starting at the load address used for the +`OVERLAY' as a whole (as with normal section definitions, the load +address is optional, and defaults to the start address; the start +address is also optional, and defaults to the current value of the +location counter). + + If the `NOCROSSREFS' keyword is used, and there any references among +the sections, the linker will report an error. Since the sections all +run at the same address, it normally does not make sense for one +section to refer directly to another. *Note NOCROSSREFS: Miscellaneous +Commands. + + For each section within the `OVERLAY', the linker automatically +provides two symbols. The symbol `__load_start_SECNAME' is defined as +the starting load address of the section. The symbol +`__load_stop_SECNAME' is defined as the final load address of the +section. Any characters within SECNAME which are not legal within C +identifiers are removed. C (or assembler) code may use these symbols +to move the overlaid sections around as necessary. + + At the end of the overlay, the value of the location counter is set +to the start address of the overlay plus the size of the largest +section. + + Here is an example. Remember that this would appear inside a +`SECTIONS' construct. + OVERLAY 0x1000 : AT (0x4000) + { + .text0 { o1/*.o(.text) } + .text1 { o2/*.o(.text) } + } +This will define both `.text0' and `.text1' to start at address +0x1000. `.text0' will be loaded at address 0x4000, and `.text1' will +be loaded immediately after `.text0'. The following symbols will be +defined if referenced: `__load_start_text0', `__load_stop_text0', +`__load_start_text1', `__load_stop_text1'. + + C code to copy overlay `.text1' into the overlay area might look +like the following. + + extern char __load_start_text1, __load_stop_text1; + memcpy ((char *) 0x1000, &__load_start_text1, + &__load_stop_text1 - &__load_start_text1); + + Note that the `OVERLAY' command is just syntactic sugar, since +everything it does can be done using the more basic commands. The above +example could have been written identically as follows. + + .text0 0x1000 : AT (0x4000) { o1/*.o(.text) } + PROVIDE (__load_start_text0 = LOADADDR (.text0)); + PROVIDE (__load_stop_text0 = LOADADDR (.text0) + SIZEOF (.text0)); + .text1 0x1000 : AT (0x4000 + SIZEOF (.text0)) { o2/*.o(.text) } + PROVIDE (__load_start_text1 = LOADADDR (.text1)); + PROVIDE (__load_stop_text1 = LOADADDR (.text1) + SIZEOF (.text1)); + . = 0x1000 + MAX (SIZEOF (.text0), SIZEOF (.text1)); + + +File: ld.info, Node: MEMORY, Next: PHDRS, Prev: SECTIONS, Up: Scripts + +3.7 MEMORY Command +================== + +The linker's default configuration permits allocation of all available +memory. You can override this by using the `MEMORY' command. + + The `MEMORY' command describes the location and size of blocks of +memory in the target. You can use it to describe which memory regions +may be used by the linker, and which memory regions it must avoid. You +can then assign sections to particular memory regions. The linker will +set section addresses based on the memory regions, and will warn about +regions that become too full. The linker will not shuffle sections +around to fit into the available regions. + + A linker script may contain at most one use of the `MEMORY' command. +However, you can define as many blocks of memory within it as you +wish. The syntax is: + MEMORY + { + NAME [(ATTR)] : ORIGIN = ORIGIN, LENGTH = LEN + ... + } + + The NAME is a name used in the linker script to refer to the region. +The region name has no meaning outside of the linker script. Region +names are stored in a separate name space, and will not conflict with +symbol names, file names, or section names. Each memory region must +have a distinct name within the `MEMORY' command. However you can add +later alias names to existing memory regions with the *Note +REGION_ALIAS:: command. + + The ATTR string is an optional list of attributes that specify +whether to use a particular memory region for an input section which is +not explicitly mapped in the linker script. As described in *Note +SECTIONS::, if you do not specify an output section for some input +section, the linker will create an output section with the same name as +the input section. If you define region attributes, the linker will use +them to select the memory region for the output section that it creates. + + The ATTR string must consist only of the following characters: +`R' + Read-only section + +`W' + Read/write section + +`X' + Executable section + +`A' + Allocatable section + +`I' + Initialized section + +`L' + Same as `I' + +`!' + Invert the sense of any of the attributes that follow + + If a unmapped section matches any of the listed attributes other than +`!', it will be placed in the memory region. The `!' attribute +reverses this test, so that an unmapped section will be placed in the +memory region only if it does not match any of the listed attributes. + + The ORIGIN is an numerical expression for the start address of the +memory region. The expression must evaluate to a constant and it +cannot involve any symbols. The keyword `ORIGIN' may be abbreviated to +`org' or `o' (but not, for example, `ORG'). + + The LEN is an expression for the size in bytes of the memory region. +As with the ORIGIN expression, the expression must be numerical only +and must evaluate to a constant. The keyword `LENGTH' may be +abbreviated to `len' or `l'. + + In the following example, we specify that there are two memory +regions available for allocation: one starting at `0' for 256 kilobytes, +and the other starting at `0x40000000' for four megabytes. The linker +will place into the `rom' memory region every section which is not +explicitly mapped into a memory region, and is either read-only or +executable. The linker will place other sections which are not +explicitly mapped into a memory region into the `ram' memory region. + + MEMORY + { + rom (rx) : ORIGIN = 0, LENGTH = 256K + ram (!rx) : org = 0x40000000, l = 4M + } + + Once you define a memory region, you can direct the linker to place +specific output sections into that memory region by using the `>REGION' +output section attribute. For example, if you have a memory region +named `mem', you would use `>mem' in the output section definition. +*Note Output Section Region::. If no address was specified for the +output section, the linker will set the address to the next available +address within the memory region. If the combined output sections +directed to a memory region are too large for the region, the linker +will issue an error message. + + It is possible to access the origin and length of a memory in an +expression via the `ORIGIN(MEMORY)' and `LENGTH(MEMORY)' functions: + + _fstack = ORIGIN(ram) + LENGTH(ram) - 4; + + +File: ld.info, Node: PHDRS, Next: VERSION, Prev: MEMORY, Up: Scripts + +3.8 PHDRS Command +================= + +The ELF object file format uses "program headers", also knows as +"segments". The program headers describe how the program should be +loaded into memory. You can print them out by using the `objdump' +program with the `-p' option. + + When you run an ELF program on a native ELF system, the system loader +reads the program headers in order to figure out how to load the +program. This will only work if the program headers are set correctly. +This manual does not describe the details of how the system loader +interprets program headers; for more information, see the ELF ABI. + + The linker will create reasonable program headers by default. +However, in some cases, you may need to specify the program headers more +precisely. You may use the `PHDRS' command for this purpose. When the +linker sees the `PHDRS' command in the linker script, it will not +create any program headers other than the ones specified. + + The linker only pays attention to the `PHDRS' command when +generating an ELF output file. In other cases, the linker will simply +ignore `PHDRS'. + + This is the syntax of the `PHDRS' command. The words `PHDRS', +`FILEHDR', `AT', and `FLAGS' are keywords. + + PHDRS + { + NAME TYPE [ FILEHDR ] [ PHDRS ] [ AT ( ADDRESS ) ] + [ FLAGS ( FLAGS ) ] ; + } + + The NAME is used only for reference in the `SECTIONS' command of the +linker script. It is not put into the output file. Program header +names are stored in a separate name space, and will not conflict with +symbol names, file names, or section names. Each program header must +have a distinct name. The headers are processed in order and it is +usual for them to map to sections in ascending load address order. + + Certain program header types describe segments of memory which the +system loader will load from the file. In the linker script, you +specify the contents of these segments by placing allocatable output +sections in the segments. You use the `:PHDR' output section attribute +to place a section in a particular segment. *Note Output Section +Phdr::. + + It is normal to put certain sections in more than one segment. This +merely implies that one segment of memory contains another. You may +repeat `:PHDR', using it once for each segment which should contain the +section. + + If you place a section in one or more segments using `:PHDR', then +the linker will place all subsequent allocatable sections which do not +specify `:PHDR' in the same segments. This is for convenience, since +generally a whole set of contiguous sections will be placed in a single +segment. You can use `:NONE' to override the default segment and tell +the linker to not put the section in any segment at all. + + You may use the `FILEHDR' and `PHDRS' keywords after the program +header type to further describe the contents of the segment. The +`FILEHDR' keyword means that the segment should include the ELF file +header. The `PHDRS' keyword means that the segment should include the +ELF program headers themselves. If applied to a loadable segment +(`PT_LOAD'), all prior loadable segments must have one of these +keywords. + + The TYPE may be one of the following. The numbers indicate the +value of the keyword. + +`PT_NULL' (0) + Indicates an unused program header. + +`PT_LOAD' (1) + Indicates that this program header describes a segment to be + loaded from the file. + +`PT_DYNAMIC' (2) + Indicates a segment where dynamic linking information can be found. + +`PT_INTERP' (3) + Indicates a segment where the name of the program interpreter may + be found. + +`PT_NOTE' (4) + Indicates a segment holding note information. + +`PT_SHLIB' (5) + A reserved program header type, defined but not specified by the + ELF ABI. + +`PT_PHDR' (6) + Indicates a segment where the program headers may be found. + +EXPRESSION + An expression giving the numeric type of the program header. This + may be used for types not defined above. + + You can specify that a segment should be loaded at a particular +address in memory by using an `AT' expression. This is identical to the +`AT' command used as an output section attribute (*note Output Section +LMA::). The `AT' command for a program header overrides the output +section attribute. + + The linker will normally set the segment flags based on the sections +which comprise the segment. You may use the `FLAGS' keyword to +explicitly specify the segment flags. The value of FLAGS must be an +integer. It is used to set the `p_flags' field of the program header. + + Here is an example of `PHDRS'. This shows a typical set of program +headers used on a native ELF system. + + PHDRS + { + headers PT_PHDR PHDRS ; + interp PT_INTERP ; + text PT_LOAD FILEHDR PHDRS ; + data PT_LOAD ; + dynamic PT_DYNAMIC ; + } + + SECTIONS + { + . = SIZEOF_HEADERS; + .interp : { *(.interp) } :text :interp + .text : { *(.text) } :text + .rodata : { *(.rodata) } /* defaults to :text */ + ... + . = . + 0x1000; /* move to a new page in memory */ + .data : { *(.data) } :data + .dynamic : { *(.dynamic) } :data :dynamic + ... + } + + +File: ld.info, Node: VERSION, Next: Expressions, Prev: PHDRS, Up: Scripts + +3.9 VERSION Command +=================== + +The linker supports symbol versions when using ELF. Symbol versions are +only useful when using shared libraries. The dynamic linker can use +symbol versions to select a specific version of a function when it runs +a program that may have been linked against an earlier version of the +shared library. + + You can include a version script directly in the main linker script, +or you can supply the version script as an implicit linker script. You +can also use the `--version-script' linker option. + + The syntax of the `VERSION' command is simply + VERSION { version-script-commands } + + The format of the version script commands is identical to that used +by Sun's linker in Solaris 2.5. The version script defines a tree of +version nodes. You specify the node names and interdependencies in the +version script. You can specify which symbols are bound to which +version nodes, and you can reduce a specified set of symbols to local +scope so that they are not globally visible outside of the shared +library. + + The easiest way to demonstrate the version script language is with a +few examples. + + VERS_1.1 { + global: + foo1; + local: + old*; + original*; + new*; + }; + + VERS_1.2 { + foo2; + } VERS_1.1; + + VERS_2.0 { + bar1; bar2; + extern "C++" { + ns::*; + "f(int, double)"; + }; + } VERS_1.2; + + This example version script defines three version nodes. The first +version node defined is `VERS_1.1'; it has no other dependencies. The +script binds the symbol `foo1' to `VERS_1.1'. It reduces a number of +symbols to local scope so that they are not visible outside of the +shared library; this is done using wildcard patterns, so that any +symbol whose name begins with `old', `original', or `new' is matched. +The wildcard patterns available are the same as those used in the shell +when matching filenames (also known as "globbing"). However, if you +specify the symbol name inside double quotes, then the name is treated +as literal, rather than as a glob pattern. + + Next, the version script defines node `VERS_1.2'. This node depends +upon `VERS_1.1'. The script binds the symbol `foo2' to the version +node `VERS_1.2'. + + Finally, the version script defines node `VERS_2.0'. This node +depends upon `VERS_1.2'. The scripts binds the symbols `bar1' and +`bar2' are bound to the version node `VERS_2.0'. + + When the linker finds a symbol defined in a library which is not +specifically bound to a version node, it will effectively bind it to an +unspecified base version of the library. You can bind all otherwise +unspecified symbols to a given version node by using `global: *;' +somewhere in the version script. Note that it's slightly crazy to use +wildcards in a global spec except on the last version node. Global +wildcards elsewhere run the risk of accidentally adding symbols to the +set exported for an old version. That's wrong since older versions +ought to have a fixed set of symbols. + + The names of the version nodes have no specific meaning other than +what they might suggest to the person reading them. The `2.0' version +could just as well have appeared in between `1.1' and `1.2'. However, +this would be a confusing way to write a version script. + + Node name can be omitted, provided it is the only version node in +the version script. Such version script doesn't assign any versions to +symbols, only selects which symbols will be globally visible out and +which won't. + + { global: foo; bar; local: *; }; + + When you link an application against a shared library that has +versioned symbols, the application itself knows which version of each +symbol it requires, and it also knows which version nodes it needs from +each shared library it is linked against. Thus at runtime, the dynamic +loader can make a quick check to make sure that the libraries you have +linked against do in fact supply all of the version nodes that the +application will need to resolve all of the dynamic symbols. In this +way it is possible for the dynamic linker to know with certainty that +all external symbols that it needs will be resolvable without having to +search for each symbol reference. + + The symbol versioning is in effect a much more sophisticated way of +doing minor version checking that SunOS does. The fundamental problem +that is being addressed here is that typically references to external +functions are bound on an as-needed basis, and are not all bound when +the application starts up. If a shared library is out of date, a +required interface may be missing; when the application tries to use +that interface, it may suddenly and unexpectedly fail. With symbol +versioning, the user will get a warning when they start their program if +the libraries being used with the application are too old. + + There are several GNU extensions to Sun's versioning approach. The +first of these is the ability to bind a symbol to a version node in the +source file where the symbol is defined instead of in the versioning +script. This was done mainly to reduce the burden on the library +maintainer. You can do this by putting something like: + __asm__(".symver original_foo,foo@VERS_1.1"); + in the C source file. This renames the function `original_foo' to +be an alias for `foo' bound to the version node `VERS_1.1'. The +`local:' directive can be used to prevent the symbol `original_foo' +from being exported. A `.symver' directive takes precedence over a +version script. + + The second GNU extension is to allow multiple versions of the same +function to appear in a given shared library. In this way you can make +an incompatible change to an interface without increasing the major +version number of the shared library, while still allowing applications +linked against the old interface to continue to function. + + To do this, you must use multiple `.symver' directives in the source +file. Here is an example: + + __asm__(".symver original_foo,foo@"); + __asm__(".symver old_foo,foo@VERS_1.1"); + __asm__(".symver old_foo1,foo@VERS_1.2"); + __asm__(".symver new_foo,foo@@VERS_2.0"); + + In this example, `foo@' represents the symbol `foo' bound to the +unspecified base version of the symbol. The source file that contains +this example would define 4 C functions: `original_foo', `old_foo', +`old_foo1', and `new_foo'. + + When you have multiple definitions of a given symbol, there needs to +be some way to specify a default version to which external references to +this symbol will be bound. You can do this with the `foo@@VERS_2.0' +type of `.symver' directive. You can only declare one version of a +symbol as the default in this manner; otherwise you would effectively +have multiple definitions of the same symbol. + + If you wish to bind a reference to a specific version of the symbol +within the shared library, you can use the aliases of convenience +(i.e., `old_foo'), or you can use the `.symver' directive to +specifically bind to an external version of the function in question. + + You can also specify the language in the version script: + + VERSION extern "lang" { version-script-commands } + + The supported `lang's are `C', `C++', and `Java'. The linker will +iterate over the list of symbols at the link time and demangle them +according to `lang' before matching them to the patterns specified in +`version-script-commands'. The default `lang' is `C'. + + Demangled names may contains spaces and other special characters. As +described above, you can use a glob pattern to match demangled names, +or you can use a double-quoted string to match the string exactly. In +the latter case, be aware that minor differences (such as differing +whitespace) between the version script and the demangler output will +cause a mismatch. As the exact string generated by the demangler might +change in the future, even if the mangled name does not, you should +check that all of your version directives are behaving as you expect +when you upgrade. + + +File: ld.info, Node: Expressions, Next: Implicit Linker Scripts, Prev: VERSION, Up: Scripts + +3.10 Expressions in Linker Scripts +================================== + +The syntax for expressions in the linker script language is identical to +that of C expressions. All expressions are evaluated as integers. All +expressions are evaluated in the same size, which is 32 bits if both the +host and target are 32 bits, and is otherwise 64 bits. + + You can use and set symbol values in expressions. + + The linker defines several special purpose builtin functions for use +in expressions. + +* Menu: + +* Constants:: Constants +* Symbolic Constants:: Symbolic constants +* Symbols:: Symbol Names +* Orphan Sections:: Orphan Sections +* Location Counter:: The Location Counter +* Operators:: Operators +* Evaluation:: Evaluation +* Expression Section:: The Section of an Expression +* Builtin Functions:: Builtin Functions + + +File: ld.info, Node: Constants, Next: Symbolic Constants, Up: Expressions + +3.10.1 Constants +---------------- + +All constants are integers. + + As in C, the linker considers an integer beginning with `0' to be +octal, and an integer beginning with `0x' or `0X' to be hexadecimal. +Alternatively the linker accepts suffixes of `h' or `H' for +hexadeciaml, `o' or `O' for octal, `b' or `B' for binary and `d' or `D' +for decimal. Any integer value without a prefix or a suffix is +considered to be decimal. + + In addition, you can use the suffixes `K' and `M' to scale a +constant by `1024' or `1024*1024' respectively. For example, the +following all refer to the same quantity: + + _fourk_1 = 4K; + _fourk_2 = 4096; + _fourk_3 = 0x1000; + _fourk_4 = 10000o; + + Note - the `K' and `M' suffixes cannot be used in conjunction with +the base suffixes mentioned above. + + +File: ld.info, Node: Symbolic Constants, Next: Symbols, Prev: Constants, Up: Expressions + +3.10.2 Symbolic Constants +------------------------- + +It is possible to refer to target specific constants via the use of the +`CONSTANT(NAME)' operator, where NAME is one of: + +`MAXPAGESIZE' + The target's maximum page size. + +`COMMONPAGESIZE' + The target's default page size. + + So for example: + + .text ALIGN (CONSTANT (MAXPAGESIZE)) : { *(.text) } + + will create a text section aligned to the largest page boundary +supported by the target. + + +File: ld.info, Node: Symbols, Next: Orphan Sections, Prev: Symbolic Constants, Up: Expressions + +3.10.3 Symbol Names +------------------- + +Unless quoted, symbol names start with a letter, underscore, or period +and may include letters, digits, underscores, periods, and hyphens. +Unquoted symbol names must not conflict with any keywords. You can +specify a symbol which contains odd characters or has the same name as a +keyword by surrounding the symbol name in double quotes: + "SECTION" = 9; + "with a space" = "also with a space" + 10; + + Since symbols can contain many non-alphabetic characters, it is +safest to delimit symbols with spaces. For example, `A-B' is one +symbol, whereas `A - B' is an expression involving subtraction. + + +File: ld.info, Node: Orphan Sections, Next: Location Counter, Prev: Symbols, Up: Expressions + +3.10.4 Orphan Sections +---------------------- + +Orphan sections are sections present in the input files which are not +explicitly placed into the output file by the linker script. The +linker will still copy these sections into the output file, but it has +to guess as to where they should be placed. The linker uses a simple +heuristic to do this. It attempts to place orphan sections after +non-orphan sections of the same attribute, such as code vs data, +loadable vs non-loadable, etc. If there is not enough room to do this +then it places at the end of the file. + + For ELF targets, the attribute of the section includes section type +as well as section flag. + + If an orphaned section's name is representable as a C identifier then +the linker will automatically *note PROVIDE:: two symbols: +__start_SECNAME and __end_SECNAME, where SECNAME is the name of the +section. These indicate the start address and end address of the +orphaned section respectively. Note: most section names are not +representable as C identifiers because they contain a `.' character. + + +File: ld.info, Node: Location Counter, Next: Operators, Prev: Orphan Sections, Up: Expressions + +3.10.5 The Location Counter +--------------------------- + +The special linker variable "dot" `.' always contains the current +output location counter. Since the `.' always refers to a location in +an output section, it may only appear in an expression within a +`SECTIONS' command. The `.' symbol may appear anywhere that an +ordinary symbol is allowed in an expression. + + Assigning a value to `.' will cause the location counter to be +moved. This may be used to create holes in the output section. The +location counter may not be moved backwards inside an output section, +and may not be moved backwards outside of an output section if so doing +creates areas with overlapping LMAs. + + SECTIONS + { + output : + { + file1(.text) + . = . + 1000; + file2(.text) + . += 1000; + file3(.text) + } = 0x12345678; + } + In the previous example, the `.text' section from `file1' is located +at the beginning of the output section `output'. It is followed by a +1000 byte gap. Then the `.text' section from `file2' appears, also +with a 1000 byte gap following before the `.text' section from `file3'. +The notation `= 0x12345678' specifies what data to write in the gaps +(*note Output Section Fill::). + + Note: `.' actually refers to the byte offset from the start of the +current containing object. Normally this is the `SECTIONS' statement, +whose start address is 0, hence `.' can be used as an absolute address. +If `.' is used inside a section description however, it refers to the +byte offset from the start of that section, not an absolute address. +Thus in a script like this: + + SECTIONS + { + . = 0x100 + .text: { + *(.text) + . = 0x200 + } + . = 0x500 + .data: { + *(.data) + . += 0x600 + } + } + + The `.text' section will be assigned a starting address of 0x100 and +a size of exactly 0x200 bytes, even if there is not enough data in the +`.text' input sections to fill this area. (If there is too much data, +an error will be produced because this would be an attempt to move `.' +backwards). The `.data' section will start at 0x500 and it will have +an extra 0x600 bytes worth of space after the end of the values from +the `.data' input sections and before the end of the `.data' output +section itself. + + Setting symbols to the value of the location counter outside of an +output section statement can result in unexpected values if the linker +needs to place orphan sections. For example, given the following: + + SECTIONS + { + start_of_text = . ; + .text: { *(.text) } + end_of_text = . ; + + start_of_data = . ; + .data: { *(.data) } + end_of_data = . ; + } + + If the linker needs to place some input section, e.g. `.rodata', not +mentioned in the script, it might choose to place that section between +`.text' and `.data'. You might think the linker should place `.rodata' +on the blank line in the above script, but blank lines are of no +particular significance to the linker. As well, the linker doesn't +associate the above symbol names with their sections. Instead, it +assumes that all assignments or other statements belong to the previous +output section, except for the special case of an assignment to `.'. +I.e., the linker will place the orphan `.rodata' section as if the +script was written as follows: + + SECTIONS + { + start_of_text = . ; + .text: { *(.text) } + end_of_text = . ; + + start_of_data = . ; + .rodata: { *(.rodata) } + .data: { *(.data) } + end_of_data = . ; + } + + This may or may not be the script author's intention for the value of +`start_of_data'. One way to influence the orphan section placement is +to assign the location counter to itself, as the linker assumes that an +assignment to `.' is setting the start address of a following output +section and thus should be grouped with that section. So you could +write: + + SECTIONS + { + start_of_text = . ; + .text: { *(.text) } + end_of_text = . ; + + . = . ; + start_of_data = . ; + .data: { *(.data) } + end_of_data = . ; + } + + Now, the orphan `.rodata' section will be placed between +`end_of_text' and `start_of_data'. + + +File: ld.info, Node: Operators, Next: Evaluation, Prev: Location Counter, Up: Expressions + +3.10.6 Operators +---------------- + +The linker recognizes the standard C set of arithmetic operators, with +the standard bindings and precedence levels: + precedence associativity Operators Notes + (highest) + 1 left ! - ~ (1) + 2 left * / % + 3 left + - + 4 left >> << + 5 left == != > < <= >= + 6 left & + 7 left | + 8 left && + 9 left || + 10 right ? : + 11 right &= += -= *= /= (2) + (lowest) + Notes: (1) Prefix operators (2) *Note Assignments::. + + +File: ld.info, Node: Evaluation, Next: Expression Section, Prev: Operators, Up: Expressions + +3.10.7 Evaluation +----------------- + +The linker evaluates expressions lazily. It only computes the value of +an expression when absolutely necessary. + + The linker needs some information, such as the value of the start +address of the first section, and the origins and lengths of memory +regions, in order to do any linking at all. These values are computed +as soon as possible when the linker reads in the linker script. + + However, other values (such as symbol values) are not known or needed +until after storage allocation. Such values are evaluated later, when +other information (such as the sizes of output sections) is available +for use in the symbol assignment expression. + + The sizes of sections cannot be known until after allocation, so +assignments dependent upon these are not performed until after +allocation. + + Some expressions, such as those depending upon the location counter +`.', must be evaluated during section allocation. + + If the result of an expression is required, but the value is not +available, then an error results. For example, a script like the +following + SECTIONS + { + .text 9+this_isnt_constant : + { *(.text) } + } +will cause the error message `non constant expression for initial +address'. + + +File: ld.info, Node: Expression Section, Next: Builtin Functions, Prev: Evaluation, Up: Expressions + +3.10.8 The Section of an Expression +----------------------------------- + +Addresses and symbols may be section relative, or absolute. A section +relative symbol is relocatable. If you request relocatable output +using the `-r' option, a further link operation may change the value of +a section relative symbol. On the other hand, an absolute symbol will +retain the same value throughout any further link operations. + + Some terms in linker expressions are addresses. This is true of +section relative symbols and for builtin functions that return an +address, such as `ADDR', `LOADADDR', `ORIGIN' and `SEGMENT_START'. +Other terms are simply numbers, or are builtin functions that return a +non-address value, such as `LENGTH'. One complication is that unless +you set `LD_FEATURE ("SANE_EXPR")' (*note Miscellaneous Commands::), +numbers and absolute symbols are treated differently depending on their +location, for compatibility with older versions of `ld'. Expressions +appearing outside an output section definition treat all numbers as +absolute addresses. Expressions appearing inside an output section +definition treat absolute symbols as numbers. If `LD_FEATURE +("SANE_EXPR")' is given, then absolute symbols and numbers are simply +treated as numbers everywhere. + + In the following simple example, + + SECTIONS + { + . = 0x100; + __executable_start = 0x100; + .data : + { + . = 0x10; + __data_start = 0x10; + *(.data) + } + ... + } + + both `.' and `__executable_start' are set to the absolute address +0x100 in the first two assignments, then both `.' and `__data_start' +are set to 0x10 relative to the `.data' section in the second two +assignments. + + For expressions involving numbers, relative addresses and absolute +addresses, ld follows these rules to evaluate terms: + + * Unary operations on a relative address, and binary operations on + two relative addresses in the same section or between one relative + address and a number, apply the operator to the offset part of the + address(es). + + * Unary operations on an absolute address, and binary operations on + one or more absolute addresses or on two relative addresses not in + the same section, first convert any non-absolute term to an + absolute address before applying the operator. + + The result section of each sub-expression is as follows: + + * An operation involving only numbers results in a number. + + * The result of comparisons, `&&' and `||' is also a number. + + * The result of other binary arithmetic and logical operations on two + relative addresses in the same section or two absolute addresess + (after above conversions) is also a number. + + * The result of other operations on relative addresses or one + relative address and a number, is a relative address in the same + section as the relative operand(s). + + * The result of other operations on absolute addresses (after above + conversions) is an absolute address. + + You can use the builtin function `ABSOLUTE' to force an expression +to be absolute when it would otherwise be relative. For example, to +create an absolute symbol set to the address of the end of the output +section `.data': + SECTIONS + { + .data : { *(.data) _edata = ABSOLUTE(.); } + } + If `ABSOLUTE' were not used, `_edata' would be relative to the +`.data' section. + + Using `LOADADDR' also forces an expression absolute, since this +particular builtin function returns an absolute address. + + +File: ld.info, Node: Builtin Functions, Prev: Expression Section, Up: Expressions + +3.10.9 Builtin Functions +------------------------ + +The linker script language includes a number of builtin functions for +use in linker script expressions. + +`ABSOLUTE(EXP)' + Return the absolute (non-relocatable, as opposed to non-negative) + value of the expression EXP. Primarily useful to assign an + absolute value to a symbol within a section definition, where + symbol values are normally section relative. *Note Expression + Section::. + +`ADDR(SECTION)' + Return the address (VMA) of the named SECTION. Your script must + previously have defined the location of that section. In the + following example, `start_of_output_1', `symbol_1' and `symbol_2' + are assigned equivalent values, except that `symbol_1' will be + relative to the `.output1' section while the other two will be + absolute: + SECTIONS { ... + .output1 : + { + start_of_output_1 = ABSOLUTE(.); + ... + } + .output : + { + symbol_1 = ADDR(.output1); + symbol_2 = start_of_output_1; + } + ... } + +`ALIGN(ALIGN)' +`ALIGN(EXP,ALIGN)' + Return the location counter (`.') or arbitrary expression aligned + to the next ALIGN boundary. The single operand `ALIGN' doesn't + change the value of the location counter--it just does arithmetic + on it. The two operand `ALIGN' allows an arbitrary expression to + be aligned upwards (`ALIGN(ALIGN)' is equivalent to `ALIGN(., + ALIGN)'). + + Here is an example which aligns the output `.data' section to the + next `0x2000' byte boundary after the preceding section and sets a + variable within the section to the next `0x8000' boundary after the + input sections: + SECTIONS { ... + .data ALIGN(0x2000): { + *(.data) + variable = ALIGN(0x8000); + } + ... } + The first use of `ALIGN' in this example specifies the + location of a section because it is used as the optional ADDRESS + attribute of a section definition (*note Output Section + Address::). The second use of `ALIGN' is used to defines the + value of a symbol. + + The builtin function `NEXT' is closely related to `ALIGN'. + +`ALIGNOF(SECTION)' + Return the alignment in bytes of the named SECTION, if that + section has been allocated. If the section has not been allocated + when this is evaluated, the linker will report an error. In the + following example, the alignment of the `.output' section is + stored as the first value in that section. + SECTIONS{ ... + .output { + LONG (ALIGNOF (.output)) + ... + } + ... } + +`BLOCK(EXP)' + This is a synonym for `ALIGN', for compatibility with older linker + scripts. It is most often seen when setting the address of an + output section. + +`DATA_SEGMENT_ALIGN(MAXPAGESIZE, COMMONPAGESIZE)' + This is equivalent to either + (ALIGN(MAXPAGESIZE) + (. & (MAXPAGESIZE - 1))) + or + (ALIGN(MAXPAGESIZE) + (. & (MAXPAGESIZE - COMMONPAGESIZE))) + depending on whether the latter uses fewer COMMONPAGESIZE sized + pages for the data segment (area between the result of this + expression and `DATA_SEGMENT_END') than the former or not. If the + latter form is used, it means COMMONPAGESIZE bytes of runtime + memory will be saved at the expense of up to COMMONPAGESIZE wasted + bytes in the on-disk file. + + This expression can only be used directly in `SECTIONS' commands, + not in any output section descriptions and only once in the linker + script. COMMONPAGESIZE should be less or equal to MAXPAGESIZE and + should be the system page size the object wants to be optimized + for (while still working on system page sizes up to MAXPAGESIZE). + + Example: + . = DATA_SEGMENT_ALIGN(0x10000, 0x2000); + +`DATA_SEGMENT_END(EXP)' + This defines the end of data segment for `DATA_SEGMENT_ALIGN' + evaluation purposes. + + . = DATA_SEGMENT_END(.); + +`DATA_SEGMENT_RELRO_END(OFFSET, EXP)' + This defines the end of the `PT_GNU_RELRO' segment when `-z relro' + option is used. Second argument is returned. When `-z relro' + option is not present, `DATA_SEGMENT_RELRO_END' does nothing, + otherwise `DATA_SEGMENT_ALIGN' is padded so that EXP + OFFSET is + aligned to the most commonly used page boundary for particular + target. If present in the linker script, it must always come in + between `DATA_SEGMENT_ALIGN' and `DATA_SEGMENT_END'. + + . = DATA_SEGMENT_RELRO_END(24, .); + +`DEFINED(SYMBOL)' + Return 1 if SYMBOL is in the linker global symbol table and is + defined before the statement using DEFINED in the script, otherwise + return 0. You can use this function to provide default values for + symbols. For example, the following script fragment shows how to + set a global symbol `begin' to the first location in the `.text' + section--but if a symbol called `begin' already existed, its value + is preserved: + + SECTIONS { ... + .text : { + begin = DEFINED(begin) ? begin : . ; + ... + } + ... + } + +`LENGTH(MEMORY)' + Return the length of the memory region named MEMORY. + +`LOADADDR(SECTION)' + Return the absolute LMA of the named SECTION. (*note Output + Section LMA::). + +`MAX(EXP1, EXP2)' + Returns the maximum of EXP1 and EXP2. + +`MIN(EXP1, EXP2)' + Returns the minimum of EXP1 and EXP2. + +`NEXT(EXP)' + Return the next unallocated address that is a multiple of EXP. + This function is closely related to `ALIGN(EXP)'; unless you use + the `MEMORY' command to define discontinuous memory for the output + file, the two functions are equivalent. + +`ORIGIN(MEMORY)' + Return the origin of the memory region named MEMORY. + +`SEGMENT_START(SEGMENT, DEFAULT)' + Return the base address of the named SEGMENT. If an explicit + value has been given for this segment (with a command-line `-T' + option) that value will be returned; otherwise the value will be + DEFAULT. At present, the `-T' command-line option can only be + used to set the base address for the "text", "data", and "bss" + sections, but you can use `SEGMENT_START' with any segment name. + +`SIZEOF(SECTION)' + Return the size in bytes of the named SECTION, if that section has + been allocated. If the section has not been allocated when this is + evaluated, the linker will report an error. In the following + example, `symbol_1' and `symbol_2' are assigned identical values: + SECTIONS{ ... + .output { + .start = . ; + ... + .end = . ; + } + symbol_1 = .end - .start ; + symbol_2 = SIZEOF(.output); + ... } + +`SIZEOF_HEADERS' +`sizeof_headers' + Return the size in bytes of the output file's headers. This is + information which appears at the start of the output file. You + can use this number when setting the start address of the first + section, if you choose, to facilitate paging. + + When producing an ELF output file, if the linker script uses the + `SIZEOF_HEADERS' builtin function, the linker must compute the + number of program headers before it has determined all the section + addresses and sizes. If the linker later discovers that it needs + additional program headers, it will report an error `not enough + room for program headers'. To avoid this error, you must avoid + using the `SIZEOF_HEADERS' function, or you must rework your linker + script to avoid forcing the linker to use additional program + headers, or you must define the program headers yourself using the + `PHDRS' command (*note PHDRS::). + + +File: ld.info, Node: Implicit Linker Scripts, Prev: Expressions, Up: Scripts + +3.11 Implicit Linker Scripts +============================ + +If you specify a linker input file which the linker can not recognize as +an object file or an archive file, it will try to read the file as a +linker script. If the file can not be parsed as a linker script, the +linker will report an error. + + An implicit linker script will not replace the default linker script. + + Typically an implicit linker script would contain only symbol +assignments, or the `INPUT', `GROUP', or `VERSION' commands. + + Any input files read because of an implicit linker script will be +read at the position in the command line where the implicit linker +script was read. This can affect archive searching. + + +File: ld.info, Node: Machine Dependent, Next: BFD, Prev: Scripts, Up: Top + +4 Machine Dependent Features +**************************** + +`ld' has additional features on some platforms; the following sections +describe them. Machines where `ld' has no additional functionality are +not listed. + +* Menu: + + +* H8/300:: `ld' and the H8/300 + +* i960:: `ld' and the Intel 960 family + +* ARM:: `ld' and the ARM family + +* HPPA ELF32:: `ld' and HPPA 32-bit ELF + +* M68K:: `ld' and the Motorola 68K family + +* MMIX:: `ld' and MMIX + +* MSP430:: `ld' and MSP430 + +* M68HC11/68HC12:: `ld' and the Motorola 68HC11 and 68HC12 families + +* PowerPC ELF32:: `ld' and PowerPC 32-bit ELF Support + +* PowerPC64 ELF64:: `ld' and PowerPC64 64-bit ELF Support + +* SPU ELF:: `ld' and SPU ELF Support + +* TI COFF:: `ld' and TI COFF + +* WIN32:: `ld' and WIN32 (cygwin/mingw) + +* Xtensa:: `ld' and Xtensa Processors + + +File: ld.info, Node: H8/300, Next: i960, Up: Machine Dependent + +4.1 `ld' and the H8/300 +======================= + +For the H8/300, `ld' can perform these global optimizations when you +specify the `--relax' command-line option. + +_relaxing address modes_ + `ld' finds all `jsr' and `jmp' instructions whose targets are + within eight bits, and turns them into eight-bit program-counter + relative `bsr' and `bra' instructions, respectively. + +_synthesizing instructions_ + `ld' finds all `mov.b' instructions which use the sixteen-bit + absolute address form, but refer to the top page of memory, and + changes them to use the eight-bit address form. (That is: the + linker turns `mov.b `@'AA:16' into `mov.b `@'AA:8' whenever the + address AA is in the top page of memory). + +_bit manipulation instructions_ + `ld' finds all bit manipulation instructions like `band, bclr, + biand, bild, bior, bist, bixor, bld, bnot, bor, bset, bst, btst, + bxor' which use 32 bit and 16 bit absolute address form, but refer + to the top page of memory, and changes them to use the 8 bit + address form. (That is: the linker turns `bset #xx:3,`@'AA:32' + into `bset #xx:3,`@'AA:8' whenever the address AA is in the top + page of memory). + +_system control instructions_ + `ld' finds all `ldc.w, stc.w' instructions which use the 32 bit + absolute address form, but refer to the top page of memory, and + changes them to use 16 bit address form. (That is: the linker + turns `ldc.w `@'AA:32,ccr' into `ldc.w `@'AA:16,ccr' whenever the + address AA is in the top page of memory). + + +File: ld.info, Node: i960, Next: ARM, Prev: H8/300, Up: Machine Dependent + +4.2 `ld' and the Intel 960 Family +================================= + +You can use the `-AARCHITECTURE' command line option to specify one of +the two-letter names identifying members of the 960 family; the option +specifies the desired output target, and warns of any incompatible +instructions in the input files. It also modifies the linker's search +strategy for archive libraries, to support the use of libraries +specific to each particular architecture, by including in the search +loop names suffixed with the string identifying the architecture. + + For example, if your `ld' command line included `-ACA' as well as +`-ltry', the linker would look (in its built-in search paths, and in +any paths you specify with `-L') for a library with the names + + try + libtry.a + tryca + libtryca.a + +The first two possibilities would be considered in any event; the last +two are due to the use of `-ACA'. + + You can meaningfully use `-A' more than once on a command line, since +the 960 architecture family allows combination of target architectures; +each use will add another pair of name variants to search for when `-l' +specifies a library. + + `ld' supports the `--relax' option for the i960 family. If you +specify `--relax', `ld' finds all `balx' and `calx' instructions whose +targets are within 24 bits, and turns them into 24-bit program-counter +relative `bal' and `cal' instructions, respectively. `ld' also turns +`cal' instructions into `bal' instructions when it determines that the +target subroutine is a leaf routine (that is, the target subroutine does +not itself call any subroutines). + + The `--fix-cortex-a8' switch enables a link-time workaround for an +erratum in certain Cortex-A8 processors. The workaround is enabled by +default if you are targeting the ARM v7-A architecture profile. It can +be enabled otherwise by specifying `--fix-cortex-a8', or disabled +unconditionally by specifying `--no-fix-cortex-a8'. + + The erratum only affects Thumb-2 code. Please contact ARM for +further details. + + The `--no-merge-exidx-entries' switch disables the merging of +adjacent exidx entries in debuginfo. + + +File: ld.info, Node: M68HC11/68HC12, Next: PowerPC ELF32, Prev: MSP430, Up: Machine Dependent + +4.3 `ld' and the Motorola 68HC11 and 68HC12 families +==================================================== + +4.3.1 Linker Relaxation +----------------------- + +For the Motorola 68HC11, `ld' can perform these global optimizations +when you specify the `--relax' command-line option. + +_relaxing address modes_ + `ld' finds all `jsr' and `jmp' instructions whose targets are + within eight bits, and turns them into eight-bit program-counter + relative `bsr' and `bra' instructions, respectively. + + `ld' also looks at all 16-bit extended addressing modes and + transforms them in a direct addressing mode when the address is in + page 0 (between 0 and 0x0ff). + +_relaxing gcc instruction group_ + When `gcc' is called with `-mrelax', it can emit group of + instructions that the linker can optimize to use a 68HC11 direct + addressing mode. These instructions consists of `bclr' or `bset' + instructions. + + +4.3.2 Trampoline Generation +--------------------------- + +For 68HC11 and 68HC12, `ld' can generate trampoline code to call a far +function using a normal `jsr' instruction. The linker will also change +the relocation to some far function to use the trampoline address +instead of the function address. This is typically the case when a +pointer to a function is taken. The pointer will in fact point to the +function trampoline. + + +File: ld.info, Node: ARM, Next: HPPA ELF32, Prev: i960, Up: Machine Dependent + +4.4 `ld' and the ARM family +=========================== + +For the ARM, `ld' will generate code stubs to allow functions calls +between ARM and Thumb code. These stubs only work with code that has +been compiled and assembled with the `-mthumb-interwork' command line +option. If it is necessary to link with old ARM object files or +libraries, which have not been compiled with the -mthumb-interwork +option then the `--support-old-code' command line switch should be +given to the linker. This will make it generate larger stub functions +which will work with non-interworking aware ARM code. Note, however, +the linker does not support generating stubs for function calls to +non-interworking aware Thumb code. + + The `--thumb-entry' switch is a duplicate of the generic `--entry' +switch, in that it sets the program's starting address. But it also +sets the bottom bit of the address, so that it can be branched to using +a BX instruction, and the program will start executing in Thumb mode +straight away. + + The `--use-nul-prefixed-import-tables' switch is specifying, that +the import tables idata4 and idata5 have to be generated with a zero +elememt prefix for import libraries. This is the old style to generate +import tables. By default this option is turned off. + + The `--be8' switch instructs `ld' to generate BE8 format +executables. This option is only valid when linking big-endian objects. +The resulting image will contain big-endian data and little-endian code. + + The `R_ARM_TARGET1' relocation is typically used for entries in the +`.init_array' section. It is interpreted as either `R_ARM_REL32' or +`R_ARM_ABS32', depending on the target. The `--target1-rel' and +`--target1-abs' switches override the default. + + The `--target2=type' switch overrides the default definition of the +`R_ARM_TARGET2' relocation. Valid values for `type', their meanings, +and target defaults are as follows: +`rel' + `R_ARM_REL32' (arm*-*-elf, arm*-*-eabi) + +`abs' + `R_ARM_ABS32' (arm*-*-symbianelf) + +`got-rel' + `R_ARM_GOT_PREL' (arm*-*-linux, arm*-*-*bsd) + + The `R_ARM_V4BX' relocation (defined by the ARM AAELF specification) +enables objects compiled for the ARMv4 architecture to be +interworking-safe when linked with other objects compiled for ARMv4t, +but also allows pure ARMv4 binaries to be built from the same ARMv4 +objects. + + In the latter case, the switch `--fix-v4bx' must be passed to the +linker, which causes v4t `BX rM' instructions to be rewritten as `MOV +PC,rM', since v4 processors do not have a `BX' instruction. + + In the former case, the switch should not be used, and `R_ARM_V4BX' +relocations are ignored. + + Replace `BX rM' instructions identified by `R_ARM_V4BX' relocations +with a branch to the following veneer: + + TST rM, #1 + MOVEQ PC, rM + BX Rn + + This allows generation of libraries/applications that work on ARMv4 +cores and are still interworking safe. Note that the above veneer +clobbers the condition flags, so may cause incorrect progrm behavior in +rare cases. + + The `--use-blx' switch enables the linker to use ARM/Thumb BLX +instructions (available on ARMv5t and above) in various situations. +Currently it is used to perform calls via the PLT from Thumb code using +BLX rather than using BX and a mode-switching stub before each PLT +entry. This should lead to such calls executing slightly faster. + + This option is enabled implicitly for SymbianOS, so there is no need +to specify it if you are using that target. + + The `--vfp11-denorm-fix' switch enables a link-time workaround for a +bug in certain VFP11 coprocessor hardware, which sometimes allows +instructions with denorm operands (which must be handled by support +code) to have those operands overwritten by subsequent instructions +before the support code can read the intended values. + + The bug may be avoided in scalar mode if you allow at least one +intervening instruction between a VFP11 instruction which uses a +register and another instruction which writes to the same register, or +at least two intervening instructions if vector mode is in use. The bug +only affects full-compliance floating-point mode: you do not need this +workaround if you are using "runfast" mode. Please contact ARM for +further details. + + If you know you are using buggy VFP11 hardware, you can enable this +workaround by specifying the linker option `--vfp-denorm-fix=scalar' if +you are using the VFP11 scalar mode only, or `--vfp-denorm-fix=vector' +if you are using vector mode (the latter also works for scalar code). +The default is `--vfp-denorm-fix=none'. + + If the workaround is enabled, instructions are scanned for +potentially-troublesome sequences, and a veneer is created for each +such sequence which may trigger the erratum. The veneer consists of the +first instruction of the sequence and a branch back to the subsequent +instruction. The original instruction is then replaced with a branch to +the veneer. The extra cycles required to call and return from the veneer +are sufficient to avoid the erratum in both the scalar and vector cases. + + The `--fix-arm1176' switch enables a link-time workaround for an +erratum in certain ARM1176 processors. The workaround is enabled by +default if you are targetting ARM v6 (excluding ARM v6T2) or earlier. +It can be disabled unconditionally by specifying `--no-fix-arm1176'. + + Further information is available in the "ARM1176JZ-S and ARM1176JZF-S +Programmer Advice Notice" available on the ARM documentaion website at: +http://infocenter.arm.com/. + + The `--no-enum-size-warning' switch prevents the linker from warning +when linking object files that specify incompatible EABI enumeration +size attributes. For example, with this switch enabled, linking of an +object file using 32-bit enumeration values with another using +enumeration values fitted into the smallest possible space will not be +diagnosed. + + The `--no-wchar-size-warning' switch prevents the linker from +warning when linking object files that specify incompatible EABI +`wchar_t' size attributes. For example, with this switch enabled, +linking of an object file using 32-bit `wchar_t' values with another +using 16-bit `wchar_t' values will not be diagnosed. + + The `--pic-veneer' switch makes the linker use PIC sequences for +ARM/Thumb interworking veneers, even if the rest of the binary is not +PIC. This avoids problems on uClinux targets where `--emit-relocs' is +used to generate relocatable binaries. + + The linker will automatically generate and insert small sequences of +code into a linked ARM ELF executable whenever an attempt is made to +perform a function call to a symbol that is too far away. The +placement of these sequences of instructions - called stubs - is +controlled by the command line option `--stub-group-size=N'. The +placement is important because a poor choice can create a need for +duplicate stubs, increasing the code sizw. The linker will try to +group stubs together in order to reduce interruptions to the flow of +code, but it needs guidance as to how big these groups should be and +where they should be placed. + + The value of `N', the parameter to the `--stub-group-size=' option +controls where the stub groups are placed. If it is negative then all +stubs are placed after the first branch that needs them. If it is +positive then the stubs can be placed either before or after the +branches that need them. If the value of `N' is 1 (either +1 or -1) +then the linker will choose exactly where to place groups of stubs, +using its built in heuristics. A value of `N' greater than 1 (or +smaller than -1) tells the linker that a single group of stubs can +service at most `N' bytes from the input sections. + + The default, if `--stub-group-size=' is not specified, is `N = +1'. + + Farcalls stubs insertion is fully supported for the ARM-EABI target +only, because it relies on object files properties not present +otherwise. + + +File: ld.info, Node: HPPA ELF32, Next: M68K, Prev: ARM, Up: Machine Dependent + +4.5 `ld' and HPPA 32-bit ELF Support +==================================== + +When generating a shared library, `ld' will by default generate import +stubs suitable for use with a single sub-space application. The +`--multi-subspace' switch causes `ld' to generate export stubs, and +different (larger) import stubs suitable for use with multiple +sub-spaces. + + Long branch stubs and import/export stubs are placed by `ld' in stub +sections located between groups of input sections. `--stub-group-size' +specifies the maximum size of a group of input sections handled by one +stub section. Since branch offsets are signed, a stub section may +serve two groups of input sections, one group before the stub section, +and one group after it. However, when using conditional branches that +require stubs, it may be better (for branch prediction) that stub +sections only serve one group of input sections. A negative value for +`N' chooses this scheme, ensuring that branches to stubs always use a +negative offset. Two special values of `N' are recognized, `1' and +`-1'. These both instruct `ld' to automatically size input section +groups for the branch types detected, with the same behaviour regarding +stub placement as other positive or negative values of `N' respectively. + + Note that `--stub-group-size' does not split input sections. A +single input section larger than the group size specified will of course +create a larger group (of one section). If input sections are too +large, it may not be possible for a branch to reach its stub. + + +File: ld.info, Node: M68K, Next: MMIX, Prev: HPPA ELF32, Up: Machine Dependent + +4.6 `ld' and the Motorola 68K family +==================================== + +The `--got=TYPE' option lets you choose the GOT generation scheme. The +choices are `single', `negative', `multigot' and `target'. When +`target' is selected the linker chooses the default GOT generation +scheme for the current target. `single' tells the linker to generate a +single GOT with entries only at non-negative offsets. `negative' +instructs the linker to generate a single GOT with entries at both +negative and positive offsets. Not all environments support such GOTs. +`multigot' allows the linker to generate several GOTs in the output +file. All GOT references from a single input object file access the +same GOT, but references from different input object files might access +different GOTs. Not all environments support such GOTs. + + +File: ld.info, Node: MMIX, Next: MSP430, Prev: M68K, Up: Machine Dependent + +4.7 `ld' and MMIX +================= + +For MMIX, there is a choice of generating `ELF' object files or `mmo' +object files when linking. The simulator `mmix' understands the `mmo' +format. The binutils `objcopy' utility can translate between the two +formats. + + There is one special section, the `.MMIX.reg_contents' section. +Contents in this section is assumed to correspond to that of global +registers, and symbols referring to it are translated to special +symbols, equal to registers. In a final link, the start address of the +`.MMIX.reg_contents' section corresponds to the first allocated global +register multiplied by 8. Register `$255' is not included in this +section; it is always set to the program entry, which is at the symbol +`Main' for `mmo' files. + + Global symbols with the prefix `__.MMIX.start.', for example +`__.MMIX.start..text' and `__.MMIX.start..data' are special. The +default linker script uses these to set the default start address of a +section. + + Initial and trailing multiples of zero-valued 32-bit words in a +section, are left out from an mmo file. + + +File: ld.info, Node: MSP430, Next: M68HC11/68HC12, Prev: MMIX, Up: Machine Dependent + +4.8 `ld' and MSP430 +=================== + +For the MSP430 it is possible to select the MPU architecture. The flag +`-m [mpu type]' will select an appropriate linker script for selected +MPU type. (To get a list of known MPUs just pass `-m help' option to +the linker). + + The linker will recognize some extra sections which are MSP430 +specific: + +``.vectors'' + Defines a portion of ROM where interrupt vectors located. + +``.bootloader'' + Defines the bootloader portion of the ROM (if applicable). Any + code in this section will be uploaded to the MPU. + +``.infomem'' + Defines an information memory section (if applicable). Any code in + this section will be uploaded to the MPU. + +``.infomemnobits'' + This is the same as the `.infomem' section except that any code in + this section will not be uploaded to the MPU. + +``.noinit'' + Denotes a portion of RAM located above `.bss' section. + + The last two sections are used by gcc. + + +File: ld.info, Node: PowerPC ELF32, Next: PowerPC64 ELF64, Prev: M68HC11/68HC12, Up: Machine Dependent + +4.9 `ld' and PowerPC 32-bit ELF Support +======================================= + +Branches on PowerPC processors are limited to a signed 26-bit +displacement, which may result in `ld' giving `relocation truncated to +fit' errors with very large programs. `--relax' enables the generation +of trampolines that can access the entire 32-bit address space. These +trampolines are inserted at section boundaries, so may not themselves +be reachable if an input section exceeds 33M in size. You may combine +`-r' and `--relax' to add trampolines in a partial link. In that case +both branches to undefined symbols and inter-section branches are also +considered potentially out of range, and trampolines inserted. + +`--bss-plt' + Current PowerPC GCC accepts a `-msecure-plt' option that generates + code capable of using a newer PLT and GOT layout that has the + security advantage of no executable section ever needing to be + writable and no writable section ever being executable. PowerPC + `ld' will generate this layout, including stubs to access the PLT, + if all input files (including startup and static libraries) were + compiled with `-msecure-plt'. `--bss-plt' forces the old BSS PLT + (and GOT layout) which can give slightly better performance. + +`--secure-plt' + `ld' will use the new PLT and GOT layout if it is linking new + `-fpic' or `-fPIC' code, but does not do so automatically when + linking non-PIC code. This option requests the new PLT and GOT + layout. A warning will be given if some object file requires the + old style BSS PLT. + +`--sdata-got' + The new secure PLT and GOT are placed differently relative to other + sections compared to older BSS PLT and GOT placement. The + location of `.plt' must change because the new secure PLT is an + initialized section while the old PLT is uninitialized. The + reason for the `.got' change is more subtle: The new placement + allows `.got' to be read-only in applications linked with `-z + relro -z now'. However, this placement means that `.sdata' cannot + always be used in shared libraries, because the PowerPC ABI + accesses `.sdata' in shared libraries from the GOT pointer. + `--sdata-got' forces the old GOT placement. PowerPC GCC doesn't + use `.sdata' in shared libraries, so this option is really only + useful for other compilers that may do so. + +`--emit-stub-syms' + This option causes `ld' to label linker stubs with a local symbol + that encodes the stub type and destination. + +`--no-tls-optimize' + PowerPC `ld' normally performs some optimization of code sequences + used to access Thread-Local Storage. Use this option to disable + the optimization. + + +File: ld.info, Node: PowerPC64 ELF64, Next: SPU ELF, Prev: PowerPC ELF32, Up: Machine Dependent + +4.10 `ld' and PowerPC64 64-bit ELF Support +========================================== + +`--stub-group-size' + Long branch stubs, PLT call stubs and TOC adjusting stubs are + placed by `ld' in stub sections located between groups of input + sections. `--stub-group-size' specifies the maximum size of a + group of input sections handled by one stub section. Since branch + offsets are signed, a stub section may serve two groups of input + sections, one group before the stub section, and one group after + it. However, when using conditional branches that require stubs, + it may be better (for branch prediction) that stub sections only + serve one group of input sections. A negative value for `N' + chooses this scheme, ensuring that branches to stubs always use a + negative offset. Two special values of `N' are recognized, `1' + and `-1'. These both instruct `ld' to automatically size input + section groups for the branch types detected, with the same + behaviour regarding stub placement as other positive or negative + values of `N' respectively. + + Note that `--stub-group-size' does not split input sections. A + single input section larger than the group size specified will of + course create a larger group (of one section). If input sections + are too large, it may not be possible for a branch to reach its + stub. + +`--emit-stub-syms' + This option causes `ld' to label linker stubs with a local symbol + that encodes the stub type and destination. + +`--dotsyms, --no-dotsyms' + These two options control how `ld' interprets version patterns in + a version script. Older PowerPC64 compilers emitted both a + function descriptor symbol with the same name as the function, and + a code entry symbol with the name prefixed by a dot (`.'). To + properly version a function `foo', the version script thus needs + to control both `foo' and `.foo'. The option `--dotsyms', on by + default, automatically adds the required dot-prefixed patterns. + Use `--no-dotsyms' to disable this feature. + +`--no-tls-optimize' + PowerPC64 `ld' normally performs some optimization of code + sequences used to access Thread-Local Storage. Use this option to + disable the optimization. + +`--no-opd-optimize' + PowerPC64 `ld' normally removes `.opd' section entries + corresponding to deleted link-once functions, or functions removed + by the action of `--gc-sections' or linker script `/DISCARD/'. + Use this option to disable `.opd' optimization. + +`--non-overlapping-opd' + Some PowerPC64 compilers have an option to generate compressed + `.opd' entries spaced 16 bytes apart, overlapping the third word, + the static chain pointer (unused in C) with the first word of the + next entry. This option expands such entries to the full 24 bytes. + +`--no-toc-optimize' + PowerPC64 `ld' normally removes unused `.toc' section entries. + Such entries are detected by examining relocations that reference + the TOC in code sections. A reloc in a deleted code section marks + a TOC word as unneeded, while a reloc in a kept code section marks + a TOC word as needed. Since the TOC may reference itself, TOC + relocs are also examined. TOC words marked as both needed and + unneeded will of course be kept. TOC words without any referencing + reloc are assumed to be part of a multi-word entry, and are kept or + discarded as per the nearest marked preceding word. This works + reliably for compiler generated code, but may be incorrect if + assembly code is used to insert TOC entries. Use this option to + disable the optimization. + +`--no-multi-toc' + By default, PowerPC64 GCC generates code for a TOC model where TOC + entries are accessed with a 16-bit offset from r2. This limits the + total TOC size to 64K. PowerPC64 `ld' extends this limit by + grouping code sections such that each group uses less than 64K for + its TOC entries, then inserts r2 adjusting stubs between + inter-group calls. `ld' does not split apart input sections, so + cannot help if a single input file has a `.toc' section that + exceeds 64K, most likely from linking multiple files with `ld -r'. + Use this option to turn off this feature. + + +File: ld.info, Node: SPU ELF, Next: TI COFF, Prev: PowerPC64 ELF64, Up: Machine Dependent + +4.11 `ld' and SPU ELF Support +============================= + +`--plugin' + This option marks an executable as a PIC plugin module. + +`--no-overlays' + Normally, `ld' recognizes calls to functions within overlay + regions, and redirects such calls to an overlay manager via a stub. + `ld' also provides a built-in overlay manager. This option turns + off all this special overlay handling. + +`--emit-stub-syms' + This option causes `ld' to label overlay stubs with a local symbol + that encodes the stub type and destination. + +`--extra-overlay-stubs' + This option causes `ld' to add overlay call stubs on all function + calls out of overlay regions. Normally stubs are not added on + calls to non-overlay regions. + +`--local-store=lo:hi' + `ld' usually checks that a final executable for SPU fits in the + address range 0 to 256k. This option may be used to change the + range. Disable the check entirely with `--local-store=0:0'. + +`--stack-analysis' + SPU local store space is limited. Over-allocation of stack space + unnecessarily limits space available for code and data, while + under-allocation results in runtime failures. If given this + option, `ld' will provide an estimate of maximum stack usage. + `ld' does this by examining symbols in code sections to determine + the extents of functions, and looking at function prologues for + stack adjusting instructions. A call-graph is created by looking + for relocations on branch instructions. The graph is then searched + for the maximum stack usage path. Note that this analysis does not + find calls made via function pointers, and does not handle + recursion and other cycles in the call graph. Stack usage may be + under-estimated if your code makes such calls. Also, stack usage + for dynamic allocation, e.g. alloca, will not be detected. If a + link map is requested, detailed information about each function's + stack usage and calls will be given. + +`--emit-stack-syms' + This option, if given along with `--stack-analysis' will result in + `ld' emitting stack sizing symbols for each function. These take + the form `__stack_' for global functions, and + `__stack__' for static functions. + `' is the section id in hex. The value of such symbols is + the stack requirement for the corresponding function. The symbol + size will be zero, type `STT_NOTYPE', binding `STB_LOCAL', and + section `SHN_ABS'. + + +File: ld.info, Node: TI COFF, Next: WIN32, Prev: SPU ELF, Up: Machine Dependent + +4.12 `ld''s Support for Various TI COFF Versions +================================================ + +The `--format' switch allows selection of one of the various TI COFF +versions. The latest of this writing is 2; versions 0 and 1 are also +supported. The TI COFF versions also vary in header byte-order format; +`ld' will read any version or byte order, but the output header format +depends on the default specified by the specific target. + + +File: ld.info, Node: WIN32, Next: Xtensa, Prev: TI COFF, Up: Machine Dependent + +4.13 `ld' and WIN32 (cygwin/mingw) +================================== + +This section describes some of the win32 specific `ld' issues. See +*Note Command Line Options: Options. for detailed description of the +command line options mentioned here. + +_import libraries_ + The standard Windows linker creates and uses so-called import + libraries, which contains information for linking to dll's. They + are regular static archives and are handled as any other static + archive. The cygwin and mingw ports of `ld' have specific support + for creating such libraries provided with the `--out-implib' + command line option. + +_exporting DLL symbols_ + The cygwin/mingw `ld' has several ways to export symbols for dll's. + + _using auto-export functionality_ + By default `ld' exports symbols with the auto-export + functionality, which is controlled by the following command + line options: + + * -export-all-symbols [This is the default] + + * -exclude-symbols + + * -exclude-libs + + * -exclude-modules-for-implib + + * -version-script + + When auto-export is in operation, `ld' will export all the + non-local (global and common) symbols it finds in a DLL, with + the exception of a few symbols known to belong to the + system's runtime and libraries. As it will often not be + desirable to export all of a DLL's symbols, which may include + private functions that are not part of any public interface, + the command-line options listed above may be used to filter + symbols out from the list for exporting. The `--output-def' + option can be used in order to see the final list of exported + symbols with all exclusions taken into effect. + + If `--export-all-symbols' is not given explicitly on the + command line, then the default auto-export behavior will be + _disabled_ if either of the following are true: + + * A DEF file is used. + + * Any symbol in any object file was marked with the + __declspec(dllexport) attribute. + + _using a DEF file_ + Another way of exporting symbols is using a DEF file. A DEF + file is an ASCII file containing definitions of symbols which + should be exported when a dll is created. Usually it is + named `.def' and is added as any other object file + to the linker's command line. The file's name must end in + `.def' or `.DEF'. + + gcc -o .def + + Using a DEF file turns off the normal auto-export behavior, + unless the `--export-all-symbols' option is also used. + + Here is an example of a DEF file for a shared library called + `xyz.dll': + + LIBRARY "xyz.dll" BASE=0x20000000 + + EXPORTS + foo + bar + _bar = bar + another_foo = abc.dll.afoo + var1 DATA + doo = foo == foo2 + eoo DATA == var1 + + This example defines a DLL with a non-default base address + and seven symbols in the export table. The third exported + symbol `_bar' is an alias for the second. The fourth symbol, + `another_foo' is resolved by "forwarding" to another module + and treating it as an alias for `afoo' exported from the DLL + `abc.dll'. The final symbol `var1' is declared to be a data + object. The `doo' symbol in export library is an alias of + `foo', which gets the string name in export table `foo2'. The + `eoo' symbol is an data export symbol, which gets in export + table the name `var1'. + + The optional `LIBRARY ' command indicates the _internal_ + name of the output DLL. If `' does not include a suffix, + the default library suffix, `.DLL' is appended. + + When the .DEF file is used to build an application, rather + than a library, the `NAME ' command should be used + instead of `LIBRARY'. If `' does not include a suffix, + the default executable suffix, `.EXE' is appended. + + With either `LIBRARY ' or `NAME ' the optional + specification `BASE = ' may be used to specify a + non-default base address for the image. + + If neither `LIBRARY ' nor `NAME ' is specified, + or they specify an empty string, the internal name is the + same as the filename specified on the command line. + + The complete specification of an export symbol is: + + EXPORTS + ( ( ( [ = ] ) + | ( = . )) + [ @ ] [NONAME] [DATA] [CONSTANT] [PRIVATE] [== ] ) * + + Declares `' as an exported symbol from the DLL, or + declares `' as an exported alias for `'; or + declares `' as a "forward" alias for the symbol + `' in the DLL `'. Optionally, + the symbol may be exported by the specified ordinal + `' alias. The optional `' is the to be used + string in import/export table for the symbol. + + The optional keywords that follow the declaration indicate: + + `NONAME': Do not put the symbol name in the DLL's export + table. It will still be exported by its ordinal alias + (either the value specified by the .def specification or, + otherwise, the value assigned by the linker). The symbol + name, however, does remain visible in the import library (if + any), unless `PRIVATE' is also specified. + + `DATA': The symbol is a variable or object, rather than a + function. The import lib will export only an indirect + reference to `foo' as the symbol `_imp__foo' (ie, `foo' must + be resolved as `*_imp__foo'). + + `CONSTANT': Like `DATA', but put the undecorated `foo' as + well as `_imp__foo' into the import library. Both refer to the + read-only import address table's pointer to the variable, not + to the variable itself. This can be dangerous. If the user + code fails to add the `dllimport' attribute and also fails to + explicitly add the extra indirection that the use of the + attribute enforces, the application will behave unexpectedly. + + `PRIVATE': Put the symbol in the DLL's export table, but do + not put it into the static import library used to resolve + imports at link time. The symbol can still be imported using + the `LoadLibrary/GetProcAddress' API at runtime or by by + using the GNU ld extension of linking directly to the DLL + without an import library. + + See ld/deffilep.y in the binutils sources for the full + specification of other DEF file statements + + While linking a shared dll, `ld' is able to create a DEF file + with the `--output-def ' command line option. + + _Using decorations_ + Another way of marking symbols for export is to modify the + source code itself, so that when building the DLL each symbol + to be exported is declared as: + + __declspec(dllexport) int a_variable + __declspec(dllexport) void a_function(int with_args) + + All such symbols will be exported from the DLL. If, however, + any of the object files in the DLL contain symbols decorated + in this way, then the normal auto-export behavior is + disabled, unless the `--export-all-symbols' option is also + used. + + Note that object files that wish to access these symbols must + _not_ decorate them with dllexport. Instead, they should use + dllimport, instead: + + __declspec(dllimport) int a_variable + __declspec(dllimport) void a_function(int with_args) + + This complicates the structure of library header files, + because when included by the library itself the header must + declare the variables and functions as dllexport, but when + included by client code the header must declare them as + dllimport. There are a number of idioms that are typically + used to do this; often client code can omit the __declspec() + declaration completely. See `--enable-auto-import' and + `automatic data imports' for more information. + +_automatic data imports_ + The standard Windows dll format supports data imports from dlls + only by adding special decorations (dllimport/dllexport), which + let the compiler produce specific assembler instructions to deal + with this issue. This increases the effort necessary to port + existing Un*x code to these platforms, especially for large c++ + libraries and applications. The auto-import feature, which was + initially provided by Paul Sokolovsky, allows one to omit the + decorations to achieve a behavior that conforms to that on + POSIX/Un*x platforms. This feature is enabled with the + `--enable-auto-import' command-line option, although it is enabled + by default on cygwin/mingw. The `--enable-auto-import' option + itself now serves mainly to suppress any warnings that are + ordinarily emitted when linked objects trigger the feature's use. + + auto-import of variables does not always work flawlessly without + additional assistance. Sometimes, you will see this message + + "variable '' can't be auto-imported. Please read the + documentation for ld's `--enable-auto-import' for details." + + The `--enable-auto-import' documentation explains why this error + occurs, and several methods that can be used to overcome this + difficulty. One of these methods is the _runtime pseudo-relocs_ + feature, described below. + + For complex variables imported from DLLs (such as structs or + classes), object files typically contain a base address for the + variable and an offset (_addend_) within the variable-to specify a + particular field or public member, for instance. Unfortunately, + the runtime loader used in win32 environments is incapable of + fixing these references at runtime without the additional + information supplied by dllimport/dllexport decorations. The + standard auto-import feature described above is unable to resolve + these references. + + The `--enable-runtime-pseudo-relocs' switch allows these + references to be resolved without error, while leaving the task of + adjusting the references themselves (with their non-zero addends) + to specialized code provided by the runtime environment. Recent + versions of the cygwin and mingw environments and compilers + provide this runtime support; older versions do not. However, the + support is only necessary on the developer's platform; the + compiled result will run without error on an older system. + + `--enable-runtime-pseudo-relocs' is not the default; it must be + explicitly enabled as needed. + +_direct linking to a dll_ + The cygwin/mingw ports of `ld' support the direct linking, + including data symbols, to a dll without the usage of any import + libraries. This is much faster and uses much less memory than + does the traditional import library method, especially when + linking large libraries or applications. When `ld' creates an + import lib, each function or variable exported from the dll is + stored in its own bfd, even though a single bfd could contain many + exports. The overhead involved in storing, loading, and + processing so many bfd's is quite large, and explains the + tremendous time, memory, and storage needed to link against + particularly large or complex libraries when using import libs. + + Linking directly to a dll uses no extra command-line switches + other than `-L' and `-l', because `ld' already searches for a + number of names to match each library. All that is needed from + the developer's perspective is an understanding of this search, in + order to force ld to select the dll instead of an import library. + + For instance, when ld is called with the argument `-lxxx' it will + attempt to find, in the first directory of its search path, + + libxxx.dll.a + xxx.dll.a + libxxx.a + xxx.lib + cygxxx.dll (*) + libxxx.dll + xxx.dll + + before moving on to the next directory in the search path. + + (*) Actually, this is not `cygxxx.dll' but in fact is + `xxx.dll', where `' is set by the `ld' option + `--dll-search-prefix='. In the case of cygwin, the + standard gcc spec file includes `--dll-search-prefix=cyg', so in + effect we actually search for `cygxxx.dll'. + + Other win32-based unix environments, such as mingw or pw32, may + use other `'es, although at present only cygwin makes use + of this feature. It was originally intended to help avoid name + conflicts among dll's built for the various win32/un*x + environments, so that (for example) two versions of a zlib dll + could coexist on the same machine. + + The generic cygwin/mingw path layout uses a `bin' directory for + applications and dll's and a `lib' directory for the import + libraries (using cygwin nomenclature): + + bin/ + cygxxx.dll + lib/ + libxxx.dll.a (in case of dll's) + libxxx.a (in case of static archive) + + Linking directly to a dll without using the import library can be + done two ways: + + 1. Use the dll directly by adding the `bin' path to the link line + gcc -Wl,-verbose -o a.exe -L../bin/ -lxxx + + However, as the dll's often have version numbers appended to their + names (`cygncurses-5.dll') this will often fail, unless one + specifies `-L../bin -lncurses-5' to include the version. Import + libs are generally not versioned, and do not have this difficulty. + + 2. Create a symbolic link from the dll to a file in the `lib' + directory according to the above mentioned search pattern. This + should be used to avoid unwanted changes in the tools needed for + making the app/dll. + + ln -s bin/cygxxx.dll lib/[cyg|lib|]xxx.dll[.a] + + Then you can link without any make environment changes. + + gcc -Wl,-verbose -o a.exe -L../lib/ -lxxx + + This technique also avoids the version number problems, because + the following is perfectly legal + + bin/ + cygxxx-5.dll + lib/ + libxxx.dll.a -> ../bin/cygxxx-5.dll + + Linking directly to a dll without using an import lib will work + even when auto-import features are exercised, and even when + `--enable-runtime-pseudo-relocs' is used. + + Given the improvements in speed and memory usage, one might + justifiably wonder why import libraries are used at all. There + are three reasons: + + 1. Until recently, the link-directly-to-dll functionality did _not_ + work with auto-imported data. + + 2. Sometimes it is necessary to include pure static objects within + the import library (which otherwise contains only bfd's for + indirection symbols that point to the exports of a dll). Again, + the import lib for the cygwin kernel makes use of this ability, + and it is not possible to do this without an import lib. + + 3. Symbol aliases can only be resolved using an import lib. This + is critical when linking against OS-supplied dll's (eg, the win32 + API) in which symbols are usually exported as undecorated aliases + of their stdcall-decorated assembly names. + + So, import libs are not going away. But the ability to replace + true import libs with a simple symbolic link to (or a copy of) a + dll, in many cases, is a useful addition to the suite of tools + binutils makes available to the win32 developer. Given the + massive improvements in memory requirements during linking, storage + requirements, and linking speed, we expect that many developers + will soon begin to use this feature whenever possible. + +_symbol aliasing_ + + _adding additional names_ + Sometimes, it is useful to export symbols with additional + names. A symbol `foo' will be exported as `foo', but it can + also be exported as `_foo' by using special directives in the + DEF file when creating the dll. This will affect also the + optional created import library. Consider the following DEF + file: + + LIBRARY "xyz.dll" BASE=0x61000000 + + EXPORTS + foo + _foo = foo + + The line `_foo = foo' maps the symbol `foo' to `_foo'. + + Another method for creating a symbol alias is to create it in + the source code using the "weak" attribute: + + void foo () { /* Do something. */; } + void _foo () __attribute__ ((weak, alias ("foo"))); + + See the gcc manual for more information about attributes and + weak symbols. + + _renaming symbols_ + Sometimes it is useful to rename exports. For instance, the + cygwin kernel does this regularly. A symbol `_foo' can be + exported as `foo' but not as `_foo' by using special + directives in the DEF file. (This will also affect the import + library, if it is created). In the following example: + + LIBRARY "xyz.dll" BASE=0x61000000 + + EXPORTS + _foo = foo + + The line `_foo = foo' maps the exported symbol `foo' to + `_foo'. + + Note: using a DEF file disables the default auto-export behavior, + unless the `--export-all-symbols' command line option is used. + If, however, you are trying to rename symbols, then you should list + _all_ desired exports in the DEF file, including the symbols that + are not being renamed, and do _not_ use the `--export-all-symbols' + option. If you list only the renamed symbols in the DEF file, and + use `--export-all-symbols' to handle the other symbols, then the + both the new names _and_ the original names for the renamed + symbols will be exported. In effect, you'd be aliasing those + symbols, not renaming them, which is probably not what you wanted. + +_weak externals_ + The Windows object format, PE, specifies a form of weak symbols + called weak externals. When a weak symbol is linked and the + symbol is not defined, the weak symbol becomes an alias for some + other symbol. There are three variants of weak externals: + * Definition is searched for in objects and libraries, + historically called lazy externals. + + * Definition is searched for only in other objects, not in + libraries. This form is not presently implemented. + + * No search; the symbol is an alias. This form is not presently + implemented. + As a GNU extension, weak symbols that do not specify an alternate + symbol are supported. If the symbol is undefined when linking, + the symbol uses a default value. + +_aligned common symbols_ + As a GNU extension to the PE file format, it is possible to + specify the desired alignment for a common symbol. This + information is conveyed from the assembler or compiler to the + linker by means of GNU-specific commands carried in the object + file's `.drectve' section, which are recognized by `ld' and + respected when laying out the common symbols. Native tools will + be able to process object files employing this GNU extension, but + will fail to respect the alignment instructions, and may issue + noisy warnings about unknown linker directives. + + +File: ld.info, Node: Xtensa, Prev: WIN32, Up: Machine Dependent + +4.14 `ld' and Xtensa Processors +=============================== + +The default `ld' behavior for Xtensa processors is to interpret +`SECTIONS' commands so that lists of explicitly named sections in a +specification with a wildcard file will be interleaved when necessary to +keep literal pools within the range of PC-relative load offsets. For +example, with the command: + + SECTIONS + { + .text : { + *(.literal .text) + } + } + +`ld' may interleave some of the `.literal' and `.text' sections from +different object files to ensure that the literal pools are within the +range of PC-relative load offsets. A valid interleaving might place +the `.literal' sections from an initial group of files followed by the +`.text' sections of that group of files. Then, the `.literal' sections +from the rest of the files and the `.text' sections from the rest of +the files would follow. + + Relaxation is enabled by default for the Xtensa version of `ld' and +provides two important link-time optimizations. The first optimization +is to combine identical literal values to reduce code size. A redundant +literal will be removed and all the `L32R' instructions that use it +will be changed to reference an identical literal, as long as the +location of the replacement literal is within the offset range of all +the `L32R' instructions. The second optimization is to remove +unnecessary overhead from assembler-generated "longcall" sequences of +`L32R'/`CALLXN' when the target functions are within range of direct +`CALLN' instructions. + + For each of these cases where an indirect call sequence can be +optimized to a direct call, the linker will change the `CALLXN' +instruction to a `CALLN' instruction, remove the `L32R' instruction, +and remove the literal referenced by the `L32R' instruction if it is +not used for anything else. Removing the `L32R' instruction always +reduces code size but can potentially hurt performance by changing the +alignment of subsequent branch targets. By default, the linker will +always preserve alignments, either by switching some instructions +between 24-bit encodings and the equivalent density instructions or by +inserting a no-op in place of the `L32R' instruction that was removed. +If code size is more important than performance, the `--size-opt' +option can be used to prevent the linker from widening density +instructions or inserting no-ops, except in a few cases where no-ops +are required for correctness. + + The following Xtensa-specific command-line options can be used to +control the linker: + +`--size-opt' + When optimizing indirect calls to direct calls, optimize for code + size more than performance. With this option, the linker will not + insert no-ops or widen density instructions to preserve branch + target alignment. There may still be some cases where no-ops are + required to preserve the correctness of the code. + + +File: ld.info, Node: BFD, Next: Reporting Bugs, Prev: Machine Dependent, Up: Top + +5 BFD +***** + +The linker accesses object and archive files using the BFD libraries. +These libraries allow the linker to use the same routines to operate on +object files whatever the object file format. A different object file +format can be supported simply by creating a new BFD back end and adding +it to the library. To conserve runtime memory, however, the linker and +associated tools are usually configured to support only a subset of the +object file formats available. You can use `objdump -i' (*note +objdump: (binutils.info)objdump.) to list all the formats available for +your configuration. + + As with most implementations, BFD is a compromise between several +conflicting requirements. The major factor influencing BFD design was +efficiency: any time used converting between formats is time which +would not have been spent had BFD not been involved. This is partly +offset by abstraction payback; since BFD simplifies applications and +back ends, more time and care may be spent optimizing algorithms for a +greater speed. + + One minor artifact of the BFD solution which you should bear in mind +is the potential for information loss. There are two places where +useful information can be lost using the BFD mechanism: during +conversion and during output. *Note BFD information loss::. + +* Menu: + +* BFD outline:: How it works: an outline of BFD + + +File: ld.info, Node: BFD outline, Up: BFD + +5.1 How It Works: An Outline of BFD +=================================== + +When an object file is opened, BFD subroutines automatically determine +the format of the input object file. They then build a descriptor in +memory with pointers to routines that will be used to access elements of +the object file's data structures. + + As different information from the object files is required, BFD +reads from different sections of the file and processes them. For +example, a very common operation for the linker is processing symbol +tables. Each BFD back end provides a routine for converting between +the object file's representation of symbols and an internal canonical +format. When the linker asks for the symbol table of an object file, it +calls through a memory pointer to the routine from the relevant BFD +back end which reads and converts the table into a canonical form. The +linker then operates upon the canonical form. When the link is finished +and the linker writes the output file's symbol table, another BFD back +end routine is called to take the newly created symbol table and +convert it into the chosen output format. + +* Menu: + +* BFD information loss:: Information Loss +* Canonical format:: The BFD canonical object-file format + + +File: ld.info, Node: BFD information loss, Next: Canonical format, Up: BFD outline + +5.1.1 Information Loss +---------------------- + +_Information can be lost during output._ The output formats supported +by BFD do not provide identical facilities, and information which can +be described in one form has nowhere to go in another format. One +example of this is alignment information in `b.out'. There is nowhere +in an `a.out' format file to store alignment information on the +contained data, so when a file is linked from `b.out' and an `a.out' +image is produced, alignment information will not propagate to the +output file. (The linker will still use the alignment information +internally, so the link is performed correctly). + + Another example is COFF section names. COFF files may contain an +unlimited number of sections, each one with a textual section name. If +the target of the link is a format which does not have many sections +(e.g., `a.out') or has sections without names (e.g., the Oasys format), +the link cannot be done simply. You can circumvent this problem by +describing the desired input-to-output section mapping with the linker +command language. + + _Information can be lost during canonicalization._ The BFD internal +canonical form of the external formats is not exhaustive; there are +structures in input formats for which there is no direct representation +internally. This means that the BFD back ends cannot maintain all +possible data richness through the transformation between external to +internal and back to external formats. + + This limitation is only a problem when an application reads one +format and writes another. Each BFD back end is responsible for +maintaining as much data as possible, and the internal BFD canonical +form has structures which are opaque to the BFD core, and exported only +to the back ends. When a file is read in one format, the canonical form +is generated for BFD and the application. At the same time, the back +end saves away any information which may otherwise be lost. If the data +is then written back in the same format, the back end routine will be +able to use the canonical form provided by the BFD core as well as the +information it prepared earlier. Since there is a great deal of +commonality between back ends, there is no information lost when +linking or copying big endian COFF to little endian COFF, or `a.out' to +`b.out'. When a mixture of formats is linked, the information is only +lost from the files whose format differs from the destination. + + +File: ld.info, Node: Canonical format, Prev: BFD information loss, Up: BFD outline + +5.1.2 The BFD canonical object-file format +------------------------------------------ + +The greatest potential for loss of information occurs when there is the +least overlap between the information provided by the source format, +that stored by the canonical format, and that needed by the destination +format. A brief description of the canonical form may help you +understand which kinds of data you can count on preserving across +conversions. + +_files_ + Information stored on a per-file basis includes target machine + architecture, particular implementation format type, a demand + pageable bit, and a write protected bit. Information like Unix + magic numbers is not stored here--only the magic numbers' meaning, + so a `ZMAGIC' file would have both the demand pageable bit and the + write protected text bit set. The byte order of the target is + stored on a per-file basis, so that big- and little-endian object + files may be used with one another. + +_sections_ + Each section in the input file contains the name of the section, + the section's original address in the object file, size and + alignment information, various flags, and pointers into other BFD + data structures. + +_symbols_ + Each symbol contains a pointer to the information for the object + file which originally defined it, its name, its value, and various + flag bits. When a BFD back end reads in a symbol table, it + relocates all symbols to make them relative to the base of the + section where they were defined. Doing this ensures that each + symbol points to its containing section. Each symbol also has a + varying amount of hidden private data for the BFD back end. Since + the symbol points to the original file, the private data format + for that symbol is accessible. `ld' can operate on a collection + of symbols of wildly different formats without problems. + + Normal global and simple local symbols are maintained on output, + so an output file (no matter its format) will retain symbols + pointing to functions and to global, static, and common variables. + Some symbol information is not worth retaining; in `a.out', type + information is stored in the symbol table as long symbol names. + This information would be useless to most COFF debuggers; the + linker has command line switches to allow users to throw it away. + + There is one word of type information within the symbol, so if the + format supports symbol type information within symbols (for + example, COFF, IEEE, Oasys) and the type is simple enough to fit + within one word (nearly everything but aggregates), the + information will be preserved. + +_relocation level_ + Each canonical BFD relocation record contains a pointer to the + symbol to relocate to, the offset of the data to relocate, the + section the data is in, and a pointer to a relocation type + descriptor. Relocation is performed by passing messages through + the relocation type descriptor and the symbol pointer. Therefore, + relocations can be performed on output data using a relocation + method that is only available in one of the input formats. For + instance, Oasys provides a byte relocation format. A relocation + record requesting this relocation type would point indirectly to a + routine to perform this, so the relocation may be performed on a + byte being written to a 68k COFF file, even though 68k COFF has no + such relocation type. + +_line numbers_ + Object formats can contain, for debugging purposes, some form of + mapping between symbols, source line numbers, and addresses in the + output file. These addresses have to be relocated along with the + symbol information. Each symbol with an associated list of line + number records points to the first record of the list. The head + of a line number list consists of a pointer to the symbol, which + allows finding out the address of the function whose line number + is being described. The rest of the list is made up of pairs: + offsets into the section and line numbers. Any format which can + simply derive this information can pass it successfully between + formats (COFF, IEEE and Oasys). + + +File: ld.info, Node: Reporting Bugs, Next: MRI, Prev: BFD, Up: Top + +6 Reporting Bugs +**************** + +Your bug reports play an essential role in making `ld' reliable. + + Reporting a bug may help you by bringing a solution to your problem, +or it may not. But in any case the principal function of a bug report +is to help the entire community by making the next version of `ld' work +better. Bug reports are your contribution to the maintenance of `ld'. + + In order for a bug report to serve its purpose, you must include the +information that enables us to fix the bug. + +* Menu: + +* Bug Criteria:: Have you found a bug? +* Bug Reporting:: How to report bugs + + +File: ld.info, Node: Bug Criteria, Next: Bug Reporting, Up: Reporting Bugs + +6.1 Have You Found a Bug? +========================= + +If you are not sure whether you have found a bug, here are some +guidelines: + + * If the linker gets a fatal signal, for any input whatever, that is + a `ld' bug. Reliable linkers never crash. + + * If `ld' produces an error message for valid input, that is a bug. + + * If `ld' does not produce an error message for invalid input, that + may be a bug. In the general case, the linker can not verify that + object files are correct. + + * If you are an experienced user of linkers, your suggestions for + improvement of `ld' are welcome in any case. + + +File: ld.info, Node: Bug Reporting, Prev: Bug Criteria, Up: Reporting Bugs + +6.2 How to Report Bugs +====================== + +A number of companies and individuals offer support for GNU products. +If you obtained `ld' from a support organization, we recommend you +contact that organization first. + + You can find contact information for many support companies and +individuals in the file `etc/SERVICE' in the GNU Emacs distribution. + + Otherwise, send bug reports for `ld' to +`http://www.sourceware.org/bugzilla/'. + + The fundamental principle of reporting bugs usefully is this: +*report all the facts*. If you are not sure whether to state a fact or +leave it out, state it! + + Often people omit facts because they think they know what causes the +problem and assume that some details do not matter. Thus, you might +assume that the name of a symbol you use in an example does not matter. +Well, probably it does not, but one cannot be sure. Perhaps the bug +is a stray memory reference which happens to fetch from the location +where that name is stored in memory; perhaps, if the name were +different, the contents of that location would fool the linker into +doing the right thing despite the bug. Play it safe and give a +specific, complete example. That is the easiest thing for you to do, +and the most helpful. + + Keep in mind that the purpose of a bug report is to enable us to fix +the bug if it is new to us. Therefore, always write your bug reports +on the assumption that the bug has not been reported previously. + + Sometimes people give a few sketchy facts and ask, "Does this ring a +bell?" This cannot help us fix a bug, so it is basically useless. We +respond by asking for enough details to enable us to investigate. You +might as well expedite matters by sending them to begin with. + + To enable us to fix the bug, you should include all these things: + + * The version of `ld'. `ld' announces it if you start it with the + `--version' argument. + + Without this, we will not know whether there is any point in + looking for the bug in the current version of `ld'. + + * Any patches you may have applied to the `ld' source, including any + patches made to the `BFD' library. + + * The type of machine you are using, and the operating system name + and version number. + + * What compiler (and its version) was used to compile `ld'--e.g. + "`gcc-2.7'". + + * The command arguments you gave the linker to link your example and + observe the bug. To guarantee you will not omit something + important, list them all. A copy of the Makefile (or the output + from make) is sufficient. + + If we were to try to guess the arguments, we would probably guess + wrong and then we might not encounter the bug. + + * A complete input file, or set of input files, that will reproduce + the bug. It is generally most helpful to send the actual object + files provided that they are reasonably small. Say no more than + 10K. For bigger files you can either make them available by FTP + or HTTP or else state that you are willing to send the object + file(s) to whomever requests them. (Note - your email will be + going to a mailing list, so we do not want to clog it up with + large attachments). But small attachments are best. + + If the source files were assembled using `gas' or compiled using + `gcc', then it may be OK to send the source files rather than the + object files. In this case, be sure to say exactly what version of + `gas' or `gcc' was used to produce the object files. Also say how + `gas' or `gcc' were configured. + + * A description of what behavior you observe that you believe is + incorrect. For example, "It gets a fatal signal." + + Of course, if the bug is that `ld' gets a fatal signal, then we + will certainly notice it. But if the bug is incorrect output, we + might not notice unless it is glaringly wrong. You might as well + not give us a chance to make a mistake. + + Even if the problem you experience is a fatal signal, you should + still say so explicitly. Suppose something strange is going on, + such as, your copy of `ld' is out of sync, or you have encountered + a bug in the C library on your system. (This has happened!) Your + copy might crash and ours would not. If you told us to expect a + crash, then when ours fails to crash, we would know that the bug + was not happening for us. If you had not told us to expect a + crash, then we would not be able to draw any conclusion from our + observations. + + * If you wish to suggest changes to the `ld' source, send us context + diffs, as generated by `diff' with the `-u', `-c', or `-p' option. + Always send diffs from the old file to the new file. If you even + discuss something in the `ld' source, refer to it by context, not + by line number. + + The line numbers in our development sources will not match those + in your sources. Your line numbers would convey no useful + information to us. + + Here are some things that are not necessary: + + * A description of the envelope of the bug. + + Often people who encounter a bug spend a lot of time investigating + which changes to the input file will make the bug go away and which + changes will not affect it. + + This is often time consuming and not very useful, because the way + we will find the bug is by running a single example under the + debugger with breakpoints, not by pure deduction from a series of + examples. We recommend that you save your time for something else. + + Of course, if you can find a simpler example to report _instead_ + of the original one, that is a convenience for us. Errors in the + output will be easier to spot, running under the debugger will take + less time, and so on. + + However, simplification is not vital; if you do not want to do + this, report the bug anyway and send us the entire test case you + used. + + * A patch for the bug. + + A patch for the bug does help us if it is a good one. But do not + omit the necessary information, such as the test case, on the + assumption that a patch is all we need. We might see problems + with your patch and decide to fix the problem another way, or we + might not understand it at all. + + Sometimes with a program as complicated as `ld' it is very hard to + construct an example that will make the program follow a certain + path through the code. If you do not send us the example, we will + not be able to construct one, so we will not be able to verify + that the bug is fixed. + + And if we cannot understand what bug you are trying to fix, or why + your patch should be an improvement, we will not install it. A + test case will help us to understand. + + * A guess about what the bug is or what it depends on. + + Such guesses are usually wrong. Even we cannot guess right about + such things without first using the debugger to find the facts. + + +File: ld.info, Node: MRI, Next: GNU Free Documentation License, Prev: Reporting Bugs, Up: Top + +Appendix A MRI Compatible Script Files +************************************** + +To aid users making the transition to GNU `ld' from the MRI linker, +`ld' can use MRI compatible linker scripts as an alternative to the +more general-purpose linker scripting language described in *Note +Scripts::. MRI compatible linker scripts have a much simpler command +set than the scripting language otherwise used with `ld'. GNU `ld' +supports the most commonly used MRI linker commands; these commands are +described here. + + In general, MRI scripts aren't of much use with the `a.out' object +file format, since it only has three sections and MRI scripts lack some +features to make use of them. + + You can specify a file containing an MRI-compatible script using the +`-c' command-line option. + + Each command in an MRI-compatible script occupies its own line; each +command line starts with the keyword that identifies the command (though +blank lines are also allowed for punctuation). If a line of an +MRI-compatible script begins with an unrecognized keyword, `ld' issues +a warning message, but continues processing the script. + + Lines beginning with `*' are comments. + + You can write these commands using all upper-case letters, or all +lower case; for example, `chip' is the same as `CHIP'. The following +list shows only the upper-case form of each command. + +`ABSOLUTE SECNAME' +`ABSOLUTE SECNAME, SECNAME, ... SECNAME' + Normally, `ld' includes in the output file all sections from all + the input files. However, in an MRI-compatible script, you can + use the `ABSOLUTE' command to restrict the sections that will be + present in your output program. If the `ABSOLUTE' command is used + at all in a script, then only the sections named explicitly in + `ABSOLUTE' commands will appear in the linker output. You can + still use other input sections (whatever you select on the command + line, or using `LOAD') to resolve addresses in the output file. + +`ALIAS OUT-SECNAME, IN-SECNAME' + Use this command to place the data from input section IN-SECNAME + in a section called OUT-SECNAME in the linker output file. + + IN-SECNAME may be an integer. + +`ALIGN SECNAME = EXPRESSION' + Align the section called SECNAME to EXPRESSION. The EXPRESSION + should be a power of two. + +`BASE EXPRESSION' + Use the value of EXPRESSION as the lowest address (other than + absolute addresses) in the output file. + +`CHIP EXPRESSION' +`CHIP EXPRESSION, EXPRESSION' + This command does nothing; it is accepted only for compatibility. + +`END' + This command does nothing whatever; it's only accepted for + compatibility. + +`FORMAT OUTPUT-FORMAT' + Similar to the `OUTPUT_FORMAT' command in the more general linker + language, but restricted to one of these output formats: + + 1. S-records, if OUTPUT-FORMAT is `S' + + 2. IEEE, if OUTPUT-FORMAT is `IEEE' + + 3. COFF (the `coff-m68k' variant in BFD), if OUTPUT-FORMAT is + `COFF' + +`LIST ANYTHING...' + Print (to the standard output file) a link map, as produced by the + `ld' command-line option `-M'. + + The keyword `LIST' may be followed by anything on the same line, + with no change in its effect. + +`LOAD FILENAME' +`LOAD FILENAME, FILENAME, ... FILENAME' + Include one or more object file FILENAME in the link; this has the + same effect as specifying FILENAME directly on the `ld' command + line. + +`NAME OUTPUT-NAME' + OUTPUT-NAME is the name for the program produced by `ld'; the + MRI-compatible command `NAME' is equivalent to the command-line + option `-o' or the general script language command `OUTPUT'. + +`ORDER SECNAME, SECNAME, ... SECNAME' +`ORDER SECNAME SECNAME SECNAME' + Normally, `ld' orders the sections in its output file in the order + in which they first appear in the input files. In an + MRI-compatible script, you can override this ordering with the + `ORDER' command. The sections you list with `ORDER' will appear + first in your output file, in the order specified. + +`PUBLIC NAME=EXPRESSION' +`PUBLIC NAME,EXPRESSION' +`PUBLIC NAME EXPRESSION' + Supply a value (EXPRESSION) for external symbol NAME used in the + linker input files. + +`SECT SECNAME, EXPRESSION' +`SECT SECNAME=EXPRESSION' +`SECT SECNAME EXPRESSION' + You can use any of these three forms of the `SECT' command to + specify the start address (EXPRESSION) for section SECNAME. If + you have more than one `SECT' statement for the same SECNAME, only + the _first_ sets the start address. + + +File: ld.info, Node: GNU Free Documentation License, Next: LD Index, Prev: MRI, Up: Top + +Appendix B GNU Free Documentation License +***************************************** + + Version 1.3, 3 November 2008 + + Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc. + `http://fsf.org/' + + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + 0. PREAMBLE + + The purpose of this License is to make a manual, textbook, or other + functional and useful document "free" in the sense of freedom: to + assure everyone the effective freedom to copy and redistribute it, + with or without modifying it, either commercially or + noncommercially. Secondarily, this License preserves for the + author and publisher a way to get credit for their work, while not + being considered responsible for modifications made by others. + + This License is a kind of "copyleft", which means that derivative + works of the document must themselves be free in the same sense. + It complements the GNU General Public License, which is a copyleft + license designed for free software. + + We have designed this License in order to use it for manuals for + free software, because free software needs free documentation: a + free program should come with manuals providing the same freedoms + that the software does. But this License is not limited to + software manuals; it can be used for any textual work, regardless + of subject matter or whether it is published as a printed book. + We recommend this License principally for works whose purpose is + instruction or reference. + + 1. APPLICABILITY AND DEFINITIONS + + This License applies to any manual or other work, in any medium, + that contains a notice placed by the copyright holder saying it + can be distributed under the terms of this License. Such a notice + grants a world-wide, royalty-free license, unlimited in duration, + to use that work under the conditions stated herein. The + "Document", below, refers to any such manual or work. Any member + of the public is a licensee, and is addressed as "you". You + accept the license if you copy, modify or distribute the work in a + way requiring permission under copyright law. + + A "Modified Version" of the Document means any work containing the + Document or a portion of it, either copied verbatim, or with + modifications and/or translated into another language. + + A "Secondary Section" is a named appendix or a front-matter section + of the Document that deals exclusively with the relationship of the + publishers or authors of the Document to the Document's overall + subject (or to related matters) and contains nothing that could + fall directly within that overall subject. (Thus, if the Document + is in part a textbook of mathematics, a Secondary Section may not + explain any mathematics.) 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For + works in formats which do not have any title page as such, "Title + Page" means the text near the most prominent appearance of the + work's title, preceding the beginning of the body of the text. + + The "publisher" means any person or entity that distributes copies + of the Document to the public. + + A section "Entitled XYZ" means a named subunit of the Document + whose title either is precisely XYZ or contains XYZ in parentheses + following text that translates XYZ in another language. (Here XYZ + stands for a specific section name mentioned below, such as + "Acknowledgements", "Dedications", "Endorsements", or "History".) + To "Preserve the Title" of such a section when you modify the + Document means that it remains a section "Entitled XYZ" according + to this definition. + + The Document may include Warranty Disclaimers next to the notice + which states that this License applies to the Document. These + Warranty Disclaimers are considered to be included by reference in + this License, but only as regards disclaiming warranties: any other + implication that these Warranty Disclaimers may have is void and + has no effect on the meaning of this License. + + 2. VERBATIM COPYING + + You may copy and distribute the Document in any medium, either + commercially or noncommercially, provided that this License, the + copyright notices, and the license notice saying this License + applies to the Document are reproduced in all copies, and that you + add no other conditions whatsoever to those of this License. You + may not use technical measures to obstruct or control the reading + or further copying of the copies you make or distribute. However, + you may accept compensation in exchange for copies. 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If you use the + latter option, you must take reasonably prudent steps, when you + begin distribution of Opaque copies in quantity, to ensure that + this Transparent copy will remain thus accessible at the stated + location until at least one year after the last time you + distribute an Opaque copy (directly or through your agents or + retailers) of that edition to the public. + + It is requested, but not required, that you contact the authors of + the Document well before redistributing any large number of + copies, to give them a chance to provide you with an updated + version of the Document. + + 4. MODIFICATIONS + + You may copy and distribute a Modified Version of the Document + under the conditions of sections 2 and 3 above, provided that you + release the Modified Version under precisely this License, with + the Modified Version filling the role of the Document, thus + licensing distribution and modification of the Modified Version to + whoever possesses a copy of it. In addition, you must do these + things in the Modified Version: + + A. Use in the Title Page (and on the covers, if any) a title + distinct from that of the Document, and from those of + previous versions (which should, if there were any, be listed + in the History section of the Document). You may use the + same title as a previous version if the original publisher of + that version gives permission. + + B. List on the Title Page, as authors, one or more persons or + entities responsible for authorship of the modifications in + the Modified Version, together with at least five of the + principal authors of the Document (all of its principal + authors, if it has fewer than five), unless they release you + from this requirement. + + C. State on the Title page the name of the publisher of the + Modified Version, as the publisher. + + D. Preserve all the copyright notices of the Document. + + E. Add an appropriate copyright notice for your modifications + adjacent to the other copyright notices. + + F. Include, immediately after the copyright notices, a license + notice giving the public permission to use the Modified + Version under the terms of this License, in the form shown in + the Addendum below. + + G. Preserve in that license notice the full lists of Invariant + Sections and required Cover Texts given in the Document's + license notice. + + H. Include an unaltered copy of this License. + + I. Preserve the section Entitled "History", Preserve its Title, + and add to it an item stating at least the title, year, new + authors, and publisher of the Modified Version as given on + the Title Page. If there is no section Entitled "History" in + the Document, create one stating the title, year, authors, + and publisher of the Document as given on its Title Page, + then add an item describing the Modified Version as stated in + the previous sentence. + + J. Preserve the network location, if any, given in the Document + for public access to a Transparent copy of the Document, and + likewise the network locations given in the Document for + previous versions it was based on. These may be placed in + the "History" section. You may omit a network location for a + work that was published at least four years before the + Document itself, or if the original publisher of the version + it refers to gives permission. + + K. For any section Entitled "Acknowledgements" or "Dedications", + Preserve the Title of the section, and preserve in the + section all the substance and tone of each of the contributor + acknowledgements and/or dedications given therein. + + L. Preserve all the Invariant Sections of the Document, + unaltered in their text and in their titles. Section numbers + or the equivalent are not considered part of the section + titles. + + M. Delete any section Entitled "Endorsements". Such a section + may not be included in the Modified Version. + + N. Do not retitle any existing section to be Entitled + "Endorsements" or to conflict in title with any Invariant + Section. + + O. Preserve any Warranty Disclaimers. + + If the Modified Version includes new front-matter sections or + appendices that qualify as Secondary Sections and contain no + material copied from the Document, you may at your option + designate some or all of these sections as invariant. To do this, + add their titles to the list of Invariant Sections in the Modified + Version's license notice. These titles must be distinct from any + other section titles. + + You may add a section Entitled "Endorsements", provided it contains + nothing but endorsements of your Modified Version by various + parties--for example, statements of peer review or that the text + has been approved by an organization as the authoritative + definition of a standard. + + You may add a passage of up to five words as a Front-Cover Text, + and a passage of up to 25 words as a Back-Cover Text, to the end + of the list of Cover Texts in the Modified Version. Only one + passage of Front-Cover Text and one of Back-Cover Text may be + added by (or through arrangements made by) any one entity. If the + Document already includes a cover text for the same cover, + previously added by you or by arrangement made by the same entity + you are acting on behalf of, you may not add another; but you may + replace the old one, on explicit permission from the previous + publisher that added the old one. + + The author(s) and publisher(s) of the Document do not by this + License give permission to use their names for publicity for or to + assert or imply endorsement of any Modified Version. + + 5. COMBINING DOCUMENTS + + You may combine the Document with other documents released under + this License, under the terms defined in section 4 above for + modified versions, provided that you include in the combination + all of the Invariant Sections of all of the original documents, + unmodified, and list them all as Invariant Sections of your + combined work in its license notice, and that you preserve all + their Warranty Disclaimers. + + The combined work need only contain one copy of this License, and + multiple identical Invariant Sections may be replaced with a single + copy. If there are multiple Invariant Sections with the same name + but different contents, make the title of each such section unique + by adding at the end of it, in parentheses, the name of the + original author or publisher of that section if known, or else a + unique number. Make the same adjustment to the section titles in + the list of Invariant Sections in the license notice of the + combined work. + + In the combination, you must combine any sections Entitled + "History" in the various original documents, forming one section + Entitled "History"; likewise combine any sections Entitled + "Acknowledgements", and any sections Entitled "Dedications". You + must delete all sections Entitled "Endorsements." + + 6. COLLECTIONS OF DOCUMENTS + + You may make a collection consisting of the Document and other + documents released under this License, and replace the individual + copies of this License in the various documents with a single copy + that is included in the collection, provided that you follow the + rules of this License for verbatim copying of each of the + documents in all other respects. + + You may extract a single document from such a collection, and + distribute it individually under this License, provided you insert + a copy of this License into the extracted document, and follow + this License in all other respects regarding verbatim copying of + that document. + + 7. AGGREGATION WITH INDEPENDENT WORKS + + A compilation of the Document or its derivatives with other + separate and independent documents or works, in or on a volume of + a storage or distribution medium, is called an "aggregate" if the + copyright resulting from the compilation is not used to limit the + legal rights of the compilation's users beyond what the individual + works permit. When the Document is included in an aggregate, this + License does not apply to the other works in the aggregate which + are not themselves derivative works of the Document. + + If the Cover Text requirement of section 3 is applicable to these + copies of the Document, then if the Document is less than one half + of the entire aggregate, the Document's Cover Texts may be placed + on covers that bracket the Document within the aggregate, or the + electronic equivalent of covers if the Document is in electronic + form. Otherwise they must appear on printed covers that bracket + the whole aggregate. + + 8. TRANSLATION + + Translation is considered a kind of modification, so you may + distribute translations of the Document under the terms of section + 4. Replacing Invariant Sections with translations requires special + permission from their copyright holders, but you may include + translations of some or all Invariant Sections in addition to the + original versions of these Invariant Sections. You may include a + translation of this License, and all the license notices in the + Document, and any Warranty Disclaimers, provided that you also + include the original English version of this License and the + original versions of those notices and disclaimers. In case of a + disagreement between the translation and the original version of + this License or a notice or disclaimer, the original version will + prevail. + + If a section in the Document is Entitled "Acknowledgements", + "Dedications", or "History", the requirement (section 4) to + Preserve its Title (section 1) will typically require changing the + actual title. + + 9. TERMINATION + + You may not copy, modify, sublicense, or distribute the Document + except as expressly provided under this License. Any attempt + otherwise to copy, modify, sublicense, or distribute it is void, + and will automatically terminate your rights under this License. + + However, if you cease all violation of this License, then your + license from a particular copyright holder is reinstated (a) + provisionally, unless and until the copyright holder explicitly + and finally terminates your license, and (b) permanently, if the + copyright holder fails to notify you of the violation by some + reasonable means prior to 60 days after the cessation. + + Moreover, your license from a particular copyright holder is + reinstated permanently if the copyright holder notifies you of the + violation by some reasonable means, this is the first time you have + received notice of violation of this License (for any work) from + that copyright holder, and you cure the violation prior to 30 days + after your receipt of the notice. + + Termination of your rights under this section does not terminate + the licenses of parties who have received copies or rights from + you under this License. If your rights have been terminated and + not permanently reinstated, receipt of a copy of some or all of + the same material does not give you any rights to use it. + + 10. FUTURE REVISIONS OF THIS LICENSE + + The Free Software Foundation may publish new, revised versions of + the GNU Free Documentation License from time to time. Such new + versions will be similar in spirit to the present version, but may + differ in detail to address new problems or concerns. See + `http://www.gnu.org/copyleft/'. + + Each version of the License is given a distinguishing version + number. If the Document specifies that a particular numbered + version of this License "or any later version" applies to it, you + have the option of following the terms and conditions either of + that specified version or of any later version that has been + published (not as a draft) by the Free Software Foundation. If + the Document does not specify a version number of this License, + you may choose any version ever published (not as a draft) by the + Free Software Foundation. If the Document specifies that a proxy + can decide which future versions of this License can be used, that + proxy's public statement of acceptance of a version permanently + authorizes you to choose that version for the Document. + + 11. RELICENSING + + "Massive Multiauthor Collaboration Site" (or "MMC Site") means any + World Wide Web server that publishes copyrightable works and also + provides prominent facilities for anybody to edit those works. A + public wiki that anybody can edit is an example of such a server. + A "Massive Multiauthor Collaboration" (or "MMC") contained in the + site means any set of copyrightable works thus published on the MMC + site. + + "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0 + license published by Creative Commons Corporation, a not-for-profit + corporation with a principal place of business in San Francisco, + California, as well as future copyleft versions of that license + published by that same organization. + + "Incorporate" means to publish or republish a Document, in whole or + in part, as part of another Document. + + An MMC is "eligible for relicensing" if it is licensed under this + License, and if all works that were first published under this + License somewhere other than this MMC, and subsequently + incorporated in whole or in part into the MMC, (1) had no cover + texts or invariant sections, and (2) were thus incorporated prior + to November 1, 2008. + + The operator of an MMC Site may republish an MMC contained in the + site under CC-BY-SA on the same site at any time before August 1, + 2009, provided the MMC is eligible for relicensing. + + +ADDENDUM: How to use this License for your documents +==================================================== + +To use this License in a document you have written, include a copy of +the License in the document and put the following copyright and license +notices just after the title page: + + Copyright (C) YEAR YOUR NAME. + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover + Texts. A copy of the license is included in the section entitled ``GNU + Free Documentation License''. + + If you have Invariant Sections, Front-Cover Texts and Back-Cover +Texts, replace the "with...Texts." line with this: + + with the Invariant Sections being LIST THEIR TITLES, with + the Front-Cover Texts being LIST, and with the Back-Cover Texts + being LIST. + + If you have Invariant Sections without Cover Texts, or some other +combination of the three, merge those two alternatives to suit the +situation. + + If your document contains nontrivial examples of program code, we +recommend releasing these examples in parallel under your choice of +free software license, such as the GNU General Public License, to +permit their use in free software. + + +File: ld.info, Node: LD Index, Prev: GNU Free Documentation License, Up: Top + +LD Index +******** + +[index] +* Menu: + +* ": Symbols. (line 6) +* -(: Options. (line 696) +* --accept-unknown-input-arch: Options. (line 714) +* --add-needed: Options. (line 738) +* --add-stdcall-alias: Options. (line 1583) +* --allow-multiple-definition: Options. (line 989) +* --allow-shlib-undefined: Options. (line 995) +* --architecture=ARCH: Options. (line 123) +* --as-needed: Options. (line 724) +* --audit AUDITLIB: Options. (line 112) +* --auxiliary=NAME: Options. (line 255) +* --bank-window: Options. (line 2015) +* --base-file: Options. (line 1588) +* --be8: ARM. (line 28) +* --bss-plt: PowerPC ELF32. (line 16) +* --build-id: Options. (line 1545) +* --build-id=STYLE: Options. (line 1545) +* --check-sections: Options. (line 817) +* --copy-dt-needed-entries: Options. (line 829) +* --cref: Options. (line 849) +* --default-imported-symver: Options. (line 1032) +* --default-script=SCRIPT: Options. (line 541) +* --default-symver: Options. (line 1028) +* --defsym=SYMBOL=EXP: Options. (line 877) +* --demangle[=STYLE]: Options. (line 890) +* --depaudit AUDITLIB: Options. (line 177) +* --disable-auto-image-base: Options. (line 1767) +* --disable-auto-import: Options. (line 1902) +* --disable-long-section-names: Options. (line 1598) +* --disable-new-dtags: Options. (line 1508) +* --disable-runtime-pseudo-reloc: Options. (line 1915) +* --disable-stdcall-fixup: Options. (line 1620) +* --discard-all: Options. (line 587) +* --discard-locals: Options. (line 591) +* --dll: Options. (line 1593) +* --dll-search-prefix: Options. (line 1773) +* --dotsyms: PowerPC64 ELF64. (line 33) +* --dsbt-index: Options. (line 1992) +* --dsbt-size: Options. (line 1987) +* --dynamic-linker=FILE: Options. (line 903) +* --dynamic-list-cpp-new: Options. (line 809) +* --dynamic-list-cpp-typeinfo: Options. (line 813) +* --dynamic-list-data: Options. (line 806) +* --dynamic-list=DYNAMIC-LIST-FILE: Options. (line 793) +* --dynamicbase: Options. (line 1951) +* --eh-frame-hdr: Options. (line 1499) +* --emit-relocs: Options. (line 476) +* --emit-stack-syms: SPU ELF. (line 46) +* --emit-stub-syms <1>: SPU ELF. (line 15) +* --emit-stub-syms <2>: PowerPC ELF32. (line 47) +* --emit-stub-syms: PowerPC64 ELF64. (line 29) +* --enable-auto-image-base: Options. (line 1759) +* --enable-auto-import: Options. (line 1782) +* --enable-extra-pe-debug: Options. (line 1920) +* --enable-long-section-names: Options. (line 1598) +* --enable-new-dtags: Options. (line 1508) +* --enable-runtime-pseudo-reloc: Options. (line 1907) +* --enable-stdcall-fixup: Options. (line 1620) +* --entry=ENTRY: Options. (line 187) +* --error-unresolved-symbols: Options. (line 1452) +* --exclude-all-symbols: Options. (line 1674) +* --exclude-libs: Options. (line 197) +* --exclude-modules-for-implib: Options. (line 208) +* --exclude-symbols: Options. (line 1668) +* --export-all-symbols: Options. (line 1644) +* --export-dynamic: Options. (line 221) +* --extra-overlay-stubs: SPU ELF. (line 19) +* --fatal-warnings: Options. (line 910) +* --file-alignment: Options. (line 1678) +* --filter=NAME: Options. (line 276) +* --fix-arm1176: ARM. (line 111) +* --fix-cortex-a8: i960. (line 39) +* --fix-v4bx: ARM. (line 49) +* --fix-v4bx-interworking: ARM. (line 62) +* --force-dynamic: Options. (line 485) +* --force-exe-suffix: Options. (line 915) +* --forceinteg: Options. (line 1956) +* --format=FORMAT: Options. (line 134) +* --format=VERSION: TI COFF. (line 6) +* --gc-sections: Options. (line 925) +* --got: Options. (line 2028) +* --got=TYPE: M68K. (line 6) +* --gpsize=VALUE: Options. (line 309) +* --hash-size=NUMBER: Options. (line 1517) +* --hash-style=STYLE: Options. (line 1525) +* --heap: Options. (line 1684) +* --help: Options. (line 962) +* --image-base: Options. (line 1691) +* --just-symbols=FILE: Options. (line 508) +* --kill-at: Options. (line 1700) +* --large-address-aware: Options. (line 1705) +* --ld-generated-unwind-info: Options. (line 1503) +* --leading-underscore: Options. (line 1638) +* --library-path=DIR: Options. (line 368) +* --library=NAMESPEC: Options. (line 335) +* --local-store=lo:hi: SPU ELF. (line 24) +* --major-image-version: Options. (line 1714) +* --major-os-version: Options. (line 1719) +* --major-subsystem-version: Options. (line 1723) +* --merge-exidx-entries: i960. (line 48) +* --minor-image-version: Options. (line 1728) +* --minor-os-version: Options. (line 1733) +* --minor-subsystem-version: Options. (line 1737) +* --mri-script=MRI-CMDFILE: Options. (line 158) +* --multi-subspace: HPPA ELF32. (line 6) +* --nmagic: Options. (line 439) +* --no-accept-unknown-input-arch: Options. (line 714) +* --no-add-needed: Options. (line 738) +* --no-allow-shlib-undefined: Options. (line 995) +* --no-as-needed: Options. (line 724) +* --no-bind: Options. (line 1970) +* --no-check-sections: Options. (line 817) +* --no-copy-dt-needed-entries: Options. (line 829) +* --no-define-common: Options. (line 861) +* --no-demangle: Options. (line 890) +* --no-dotsyms: PowerPC64 ELF64. (line 33) +* --no-enum-size-warning: ARM. (line 120) +* --no-export-dynamic: Options. (line 221) +* --no-fatal-warnings: Options. (line 910) +* --no-fix-arm1176: ARM. (line 111) +* --no-fix-cortex-a8: i960. (line 39) +* --no-gc-sections: Options. (line 925) +* --no-isolation: Options. (line 1963) +* --no-keep-memory: Options. (line 974) +* --no-leading-underscore: Options. (line 1638) +* --no-merge-exidx-entries <1>: Options. (line 1999) +* --no-merge-exidx-entries: i960. (line 48) +* --no-multi-toc: PowerPC64 ELF64. (line 74) +* --no-omagic: Options. (line 454) +* --no-opd-optimize: PowerPC64 ELF64. (line 48) +* --no-overlays: SPU ELF. (line 9) +* --no-print-gc-sections: Options. (line 947) +* --no-seh: Options. (line 1966) +* --no-tls-optimize <1>: PowerPC ELF32. (line 51) +* --no-tls-optimize: PowerPC64 ELF64. (line 43) +* --no-toc-optimize: PowerPC64 ELF64. (line 60) +* --no-trampoline: Options. (line 2009) +* --no-undefined: Options. (line 981) +* --no-undefined-version: Options. (line 1023) +* --no-warn-mismatch: Options. (line 1036) +* --no-warn-search-mismatch: Options. (line 1045) +* --no-wchar-size-warning: ARM. (line 127) +* --no-whole-archive: Options. (line 1049) +* --noinhibit-exec: Options. (line 1053) +* --non-overlapping-opd: PowerPC64 ELF64. (line 54) +* --nxcompat: Options. (line 1959) +* --oformat=OUTPUT-FORMAT: Options. (line 1065) +* --omagic: Options. (line 445) +* --out-implib: Options. (line 1750) +* --output-def: Options. (line 1742) +* --output=OUTPUT: Options. (line 460) +* --pic-executable: Options. (line 1078) +* --pic-veneer: ARM. (line 133) +* --plugin: SPU ELF. (line 6) +* --print-gc-sections: Options. (line 947) +* --print-map: Options. (line 402) +* --print-output-format: Options. (line 956) +* --reduce-memory-overheads: Options. (line 1531) +* --relax: Options. (line 1094) +* --relax on i960: i960. (line 31) +* --relax on PowerPC: PowerPC ELF32. (line 6) +* --relax on Xtensa: Xtensa. (line 27) +* --relocatable: Options. (line 489) +* --retain-symbols-file=FILENAME: Options. (line 1120) +* --script=SCRIPT: Options. (line 532) +* --sdata-got: PowerPC ELF32. (line 33) +* --section-alignment: Options. (line 1925) +* --section-start=SECTIONNAME=ORG: Options. (line 1276) +* --secure-plt: PowerPC ELF32. (line 26) +* --sort-common: Options. (line 1218) +* --sort-section=alignment: Options. (line 1233) +* --sort-section=name: Options. (line 1229) +* --split-by-file: Options. (line 1237) +* --split-by-reloc: Options. (line 1242) +* --stack: Options. (line 1931) +* --stack-analysis: SPU ELF. (line 29) +* --stats: Options. (line 1255) +* --strip-all: Options. (line 519) +* --strip-debug: Options. (line 523) +* --stub-group-size: PowerPC64 ELF64. (line 6) +* --stub-group-size=N <1>: HPPA ELF32. (line 12) +* --stub-group-size=N: ARM. (line 138) +* --subsystem: Options. (line 1938) +* --support-old-code: ARM. (line 6) +* --sysroot=DIRECTORY: Options. (line 1259) +* --target-help: Options. (line 966) +* --target1-abs: ARM. (line 32) +* --target1-rel: ARM. (line 32) +* --target2=TYPE: ARM. (line 37) +* --thumb-entry=ENTRY: ARM. (line 17) +* --trace: Options. (line 528) +* --trace-symbol=SYMBOL: Options. (line 597) +* --traditional-format: Options. (line 1264) +* --tsaware: Options. (line 1976) +* --undefined=SYMBOL: Options. (line 554) +* --unique[=SECTION]: Options. (line 572) +* --unresolved-symbols: Options. (line 1295) +* --use-blx: ARM. (line 74) +* --use-nul-prefixed-import-tables: ARM. (line 23) +* --verbose[=NUMBER]: Options. (line 1324) +* --version: Options. (line 581) +* --version-script=VERSION-SCRIPTFILE: Options. (line 1332) +* --vfp11-denorm-fix: ARM. (line 83) +* --warn-alternate-em: Options. (line 1444) +* --warn-common: Options. (line 1343) +* --warn-constructors: Options. (line 1411) +* --warn-multiple-gp: Options. (line 1416) +* --warn-once: Options. (line 1430) +* --warn-section-align: Options. (line 1434) +* --warn-shared-textrel: Options. (line 1441) +* --warn-unresolved-symbols: Options. (line 1447) +* --wdmdriver: Options. (line 1973) +* --whole-archive: Options. (line 1456) +* --wrap=SYMBOL: Options. (line 1470) +* -A ARCH: Options. (line 122) +* -a KEYWORD: Options. (line 105) +* -assert KEYWORD: Options. (line 745) +* -b FORMAT: Options. (line 134) +* -Bdynamic: Options. (line 748) +* -Bgroup: Options. (line 758) +* -Bshareable: Options. (line 1211) +* -Bstatic: Options. (line 765) +* -Bsymbolic: Options. (line 780) +* -Bsymbolic-functions: Options. (line 787) +* -c MRI-CMDFILE: Options. (line 158) +* -call_shared: Options. (line 748) +* -d: Options. (line 168) +* -dc: Options. (line 168) +* -dn: Options. (line 765) +* -dp: Options. (line 168) +* -dT SCRIPT: Options. (line 541) +* -dy: Options. (line 748) +* -E: Options. (line 221) +* -e ENTRY: Options. (line 187) +* -EB: Options. (line 248) +* -EL: Options. (line 251) +* -F NAME: Options. (line 276) +* -f NAME: Options. (line 255) +* -fini=NAME: Options. (line 300) +* -g: Options. (line 306) +* -G VALUE: Options. (line 309) +* -h NAME: Options. (line 317) +* -i: Options. (line 326) +* -IFILE: Options. (line 903) +* -init=NAME: Options. (line 329) +* -L DIR: Options. (line 368) +* -l NAMESPEC: Options. (line 335) +* -M: Options. (line 402) +* -m EMULATION: Options. (line 392) +* -Map=MAPFILE: Options. (line 970) +* -n: Options. (line 439) +* -N: Options. (line 445) +* -no-relax: Options. (line 1094) +* -non_shared: Options. (line 765) +* -nostdlib: Options. (line 1059) +* -O LEVEL: Options. (line 466) +* -o OUTPUT: Options. (line 460) +* -P AUDITLIB: Options. (line 177) +* -pie: Options. (line 1078) +* -q: Options. (line 476) +* -qmagic: Options. (line 1088) +* -Qy: Options. (line 1091) +* -r: Options. (line 489) +* -R FILE: Options. (line 508) +* -rpath-link=DIR: Options. (line 1156) +* -rpath=DIR: Options. (line 1134) +* -s: Options. (line 519) +* -S: Options. (line 523) +* -shared: Options. (line 1211) +* -soname=NAME: Options. (line 317) +* -static: Options. (line 765) +* -t: Options. (line 528) +* -T SCRIPT: Options. (line 532) +* -Tbss=ORG: Options. (line 1285) +* -Tdata=ORG: Options. (line 1285) +* -Ttext-segment=ORG: Options. (line 1291) +* -Ttext=ORG: Options. (line 1285) +* -u SYMBOL: Options. (line 554) +* -Ur: Options. (line 562) +* -v: Options. (line 581) +* -V: Options. (line 581) +* -x: Options. (line 587) +* -X: Options. (line 591) +* -Y PATH: Options. (line 606) +* -y SYMBOL: Options. (line 597) +* -z defs: Options. (line 981) +* -z KEYWORD: Options. (line 610) +* -z muldefs: Options. (line 989) +* .: Location Counter. (line 6) +* /DISCARD/: Output Section Discarding. + (line 21) +* :PHDR: Output Section Phdr. + (line 6) +* =FILLEXP: Output Section Fill. + (line 6) +* >REGION: Output Section Region. + (line 6) +* [COMMON]: Input Section Common. + (line 29) +* ABSOLUTE (MRI): MRI. (line 33) +* absolute and relocatable symbols: Expression Section. (line 6) +* absolute expressions: Expression Section. (line 6) +* ABSOLUTE(EXP): Builtin Functions. (line 10) +* ADDR(SECTION): Builtin Functions. (line 17) +* address, section: Output Section Address. + (line 6) +* ALIAS (MRI): MRI. (line 44) +* ALIGN (MRI): MRI. (line 50) +* align expression: Builtin Functions. (line 38) +* align location counter: Builtin Functions. (line 38) +* ALIGN(ALIGN): Builtin Functions. (line 38) +* ALIGN(EXP,ALIGN): Builtin Functions. (line 38) +* ALIGN(SECTION_ALIGN): Forced Output Alignment. + (line 6) +* aligned common symbols: WIN32. (line 424) +* ALIGNOF(SECTION): Builtin Functions. (line 64) +* allocating memory: MEMORY. (line 6) +* architecture: Miscellaneous Commands. + (line 72) +* architectures: Options. (line 122) +* archive files, from cmd line: Options. (line 335) +* archive search path in linker script: File Commands. (line 74) +* arithmetic: Expressions. (line 6) +* arithmetic operators: Operators. (line 6) +* ARM interworking support: ARM. (line 6) +* ARM1176 erratum workaround: ARM. (line 111) +* AS_NEEDED(FILES): File Commands. (line 54) +* ASSERT: Miscellaneous Commands. + (line 9) +* assertion in linker script: Miscellaneous Commands. + (line 9) +* assignment in scripts: Assignments. (line 6) +* AT(LMA): Output Section LMA. (line 6) +* AT>LMA_REGION: Output Section LMA. (line 6) +* automatic data imports: WIN32. (line 191) +* back end: BFD. (line 6) +* BASE (MRI): MRI. (line 54) +* BE8: ARM. (line 28) +* BFD canonical format: Canonical format. (line 11) +* BFD requirements: BFD. (line 16) +* big-endian objects: Options. (line 248) +* binary input format: Options. (line 134) +* BLOCK(EXP): Builtin Functions. (line 77) +* bug criteria: Bug Criteria. (line 6) +* bug reports: Bug Reporting. (line 6) +* bugs in ld: Reporting Bugs. (line 6) +* BYTE(EXPRESSION): Output Section Data. + (line 6) +* C++ constructors, arranging in link: Output Section Keywords. + (line 19) +* CHIP (MRI): MRI. (line 58) +* COLLECT_NO_DEMANGLE: Environment. (line 29) +* combining symbols, warnings on: Options. (line 1343) +* command files: Scripts. (line 6) +* command line: Options. (line 6) +* common allocation: Options. (line 861) +* common allocation in linker script: Miscellaneous Commands. + (line 20) +* common symbol placement: Input Section Common. + (line 6) +* COMMONPAGESIZE: Symbolic Constants. (line 13) +* compatibility, MRI: Options. (line 158) +* CONSTANT: Symbolic Constants. (line 6) +* constants in linker scripts: Constants. (line 6) +* constraints on output sections: Output Section Constraint. + (line 6) +* CONSTRUCTORS: Output Section Keywords. + (line 19) +* constructors: Options. (line 562) +* constructors, arranging in link: Output Section Keywords. + (line 19) +* Cortex-A8 erratum workaround: i960. (line 39) +* crash of linker: Bug Criteria. (line 9) +* CREATE_OBJECT_SYMBOLS: Output Section Keywords. + (line 9) +* creating a DEF file: WIN32. (line 158) +* cross reference table: Options. (line 849) +* cross references: Miscellaneous Commands. + (line 56) +* current output location: Location Counter. (line 6) +* data: Output Section Data. + (line 6) +* DATA_SEGMENT_ALIGN(MAXPAGESIZE, COMMONPAGESIZE): Builtin Functions. + (line 82) +* DATA_SEGMENT_END(EXP): Builtin Functions. (line 103) +* DATA_SEGMENT_RELRO_END(OFFSET, EXP): Builtin Functions. (line 109) +* dbx: Options. (line 1269) +* DEF files, creating: Options. (line 1742) +* default emulation: Environment. (line 21) +* default input format: Environment. (line 9) +* DEFINED(SYMBOL): Builtin Functions. (line 120) +* deleting local symbols: Options. (line 587) +* demangling, default: Environment. (line 29) +* demangling, from command line: Options. (line 890) +* direct linking to a dll: WIN32. (line 239) +* discarding sections: Output Section Discarding. + (line 6) +* discontinuous memory: MEMORY. (line 6) +* DLLs, creating: Options. (line 1742) +* DLLs, linking to: Options. (line 1773) +* dot: Location Counter. (line 6) +* dot inside sections: Location Counter. (line 36) +* dot outside sections: Location Counter. (line 66) +* dynamic linker, from command line: Options. (line 903) +* dynamic symbol table: Options. (line 221) +* ELF program headers: PHDRS. (line 6) +* emulation: Options. (line 392) +* emulation, default: Environment. (line 21) +* END (MRI): MRI. (line 62) +* endianness: Options. (line 248) +* entry point: Entry Point. (line 6) +* entry point, from command line: Options. (line 187) +* entry point, thumb: ARM. (line 17) +* ENTRY(SYMBOL): Entry Point. (line 6) +* error on valid input: Bug Criteria. (line 12) +* example of linker script: Simple Example. (line 6) +* exporting DLL symbols: WIN32. (line 19) +* expression evaluation order: Evaluation. (line 6) +* expression sections: Expression Section. (line 6) +* expression, absolute: Builtin Functions. (line 10) +* expressions: Expressions. (line 6) +* EXTERN: Miscellaneous Commands. + (line 13) +* fatal signal: Bug Criteria. (line 9) +* file name wildcard patterns: Input Section Wildcards. + (line 6) +* FILEHDR: PHDRS. (line 62) +* filename symbols: Output Section Keywords. + (line 9) +* fill pattern, entire section: Output Section Fill. + (line 6) +* FILL(EXPRESSION): Output Section Data. + (line 39) +* finalization function: Options. (line 300) +* first input file: File Commands. (line 82) +* first instruction: Entry Point. (line 6) +* FIX_V4BX: ARM. (line 49) +* FIX_V4BX_INTERWORKING: ARM. (line 62) +* FORCE_COMMON_ALLOCATION: Miscellaneous Commands. + (line 20) +* forcing input section alignment: Forced Input Alignment. + (line 6) +* forcing output section alignment: Forced Output Alignment. + (line 6) +* forcing the creation of dynamic sections: Options. (line 485) +* FORMAT (MRI): MRI. (line 66) +* functions in expressions: Builtin Functions. (line 6) +* garbage collection <1>: Input Section Keep. (line 6) +* garbage collection: Options. (line 925) +* generating optimized output: Options. (line 466) +* GNU linker: Overview. (line 6) +* GNUTARGET: Environment. (line 9) +* GROUP(FILES): File Commands. (line 47) +* grouping input files: File Commands. (line 47) +* groups of archives: Options. (line 696) +* H8/300 support: H8/300. (line 6) +* header size: Builtin Functions. (line 183) +* heap size: Options. (line 1684) +* help: Options. (line 962) +* holes: Location Counter. (line 12) +* holes, filling: Output Section Data. + (line 39) +* HPPA multiple sub-space stubs: HPPA ELF32. (line 6) +* HPPA stub grouping: HPPA ELF32. (line 12) +* i960 support: i960. (line 6) +* image base: Options. (line 1691) +* implicit linker scripts: Implicit Linker Scripts. + (line 6) +* import libraries: WIN32. (line 10) +* INCLUDE FILENAME: File Commands. (line 9) +* including a linker script: File Commands. (line 9) +* including an entire archive: Options. (line 1456) +* incremental link: Options. (line 326) +* INHIBIT_COMMON_ALLOCATION: Miscellaneous Commands. + (line 25) +* initialization function: Options. (line 329) +* initialized data in ROM: Output Section LMA. (line 39) +* input file format in linker script: Format Commands. (line 35) +* input filename symbols: Output Section Keywords. + (line 9) +* input files in linker scripts: File Commands. (line 19) +* input files, displaying: Options. (line 528) +* input format: Options. (line 134) +* input object files in linker scripts: File Commands. (line 19) +* input section alignment: Forced Input Alignment. + (line 6) +* input section basics: Input Section Basics. + (line 6) +* input section wildcards: Input Section Wildcards. + (line 6) +* input sections: Input Section. (line 6) +* INPUT(FILES): File Commands. (line 19) +* INSERT: Miscellaneous Commands. + (line 30) +* insert user script into default script: Miscellaneous Commands. + (line 30) +* integer notation: Constants. (line 6) +* integer suffixes: Constants. (line 15) +* internal object-file format: Canonical format. (line 11) +* invalid input: Bug Criteria. (line 14) +* K and M integer suffixes: Constants. (line 15) +* KEEP: Input Section Keep. (line 6) +* l =: MEMORY. (line 74) +* lazy evaluation: Evaluation. (line 6) +* ld bugs, reporting: Bug Reporting. (line 6) +* LD_FEATURE(STRING): Miscellaneous Commands. + (line 78) +* LDEMULATION: Environment. (line 21) +* len =: MEMORY. (line 74) +* LENGTH =: MEMORY. (line 74) +* LENGTH(MEMORY): Builtin Functions. (line 137) +* library search path in linker script: File Commands. (line 74) +* link map: Options. (line 402) +* link-time runtime library search path: Options. (line 1156) +* linker crash: Bug Criteria. (line 9) +* linker script concepts: Basic Script Concepts. + (line 6) +* linker script example: Simple Example. (line 6) +* linker script file commands: File Commands. (line 6) +* linker script format: Script Format. (line 6) +* linker script input object files: File Commands. (line 19) +* linker script simple commands: Simple Commands. (line 6) +* linker scripts: Scripts. (line 6) +* LIST (MRI): MRI. (line 77) +* little-endian objects: Options. (line 251) +* LOAD (MRI): MRI. (line 84) +* load address: Output Section LMA. (line 6) +* LOADADDR(SECTION): Builtin Functions. (line 140) +* loading, preventing: Output Section Type. + (line 22) +* local symbols, deleting: Options. (line 591) +* location counter: Location Counter. (line 6) +* LONG(EXPRESSION): Output Section Data. + (line 6) +* M and K integer suffixes: Constants. (line 15) +* M68HC11 and 68HC12 support: M68HC11/68HC12. (line 6) +* machine architecture: Miscellaneous Commands. + (line 72) +* machine dependencies: Machine Dependent. (line 6) +* mapping input sections to output sections: Input Section. (line 6) +* MAX: Builtin Functions. (line 143) +* MAXPAGESIZE: Symbolic Constants. (line 10) +* MEMORY: MEMORY. (line 6) +* memory region attributes: MEMORY. (line 34) +* memory regions: MEMORY. (line 6) +* memory regions and sections: Output Section Region. + (line 6) +* memory usage: Options. (line 974) +* MIN: Builtin Functions. (line 146) +* Motorola 68K GOT generation: M68K. (line 6) +* MRI compatibility: MRI. (line 6) +* MSP430 extra sections: MSP430. (line 11) +* NAME (MRI): MRI. (line 90) +* name, section: Output Section Name. + (line 6) +* names: Symbols. (line 6) +* naming the output file: Options. (line 460) +* NEXT(EXP): Builtin Functions. (line 150) +* NMAGIC: Options. (line 439) +* NO_ENUM_SIZE_WARNING: ARM. (line 120) +* NO_WCHAR_SIZE_WARNING: ARM. (line 127) +* NOCROSSREFS(SECTIONS): Miscellaneous Commands. + (line 56) +* NOLOAD: Output Section Type. + (line 22) +* not enough room for program headers: Builtin Functions. (line 188) +* o =: MEMORY. (line 69) +* objdump -i: BFD. (line 6) +* object file management: BFD. (line 6) +* object files: Options. (line 29) +* object formats available: BFD. (line 6) +* object size: Options. (line 309) +* OMAGIC: Options. (line 445) +* ONLY_IF_RO: Output Section Constraint. + (line 6) +* ONLY_IF_RW: Output Section Constraint. + (line 6) +* opening object files: BFD outline. (line 6) +* operators for arithmetic: Operators. (line 6) +* options: Options. (line 6) +* ORDER (MRI): MRI. (line 95) +* org =: MEMORY. (line 69) +* ORIGIN =: MEMORY. (line 69) +* ORIGIN(MEMORY): Builtin Functions. (line 156) +* orphan: Orphan Sections. (line 6) +* output file after errors: Options. (line 1053) +* output file format in linker script: Format Commands. (line 10) +* output file name in linker script: File Commands. (line 64) +* output format: Options. (line 956) +* output section alignment: Forced Output Alignment. + (line 6) +* output section attributes: Output Section Attributes. + (line 6) +* output section data: Output Section Data. + (line 6) +* OUTPUT(FILENAME): File Commands. (line 64) +* OUTPUT_ARCH(BFDARCH): Miscellaneous Commands. + (line 72) +* OUTPUT_FORMAT(BFDNAME): Format Commands. (line 10) +* OVERLAY: Overlay Description. + (line 6) +* overlays: Overlay Description. + (line 6) +* partial link: Options. (line 489) +* PE import table prefixing: ARM. (line 23) +* PHDRS: PHDRS. (line 6) +* PIC_VENEER: ARM. (line 133) +* position independent executables: Options. (line 1080) +* PowerPC ELF32 options: PowerPC ELF32. (line 16) +* PowerPC GOT: PowerPC ELF32. (line 33) +* PowerPC long branches: PowerPC ELF32. (line 6) +* PowerPC PLT: PowerPC ELF32. (line 16) +* PowerPC stub symbols: PowerPC ELF32. (line 47) +* PowerPC TLS optimization: PowerPC ELF32. (line 51) +* PowerPC64 dot symbols: PowerPC64 ELF64. (line 33) +* PowerPC64 ELF64 options: PowerPC64 ELF64. (line 6) +* PowerPC64 multi-TOC: PowerPC64 ELF64. (line 74) +* PowerPC64 OPD optimization: PowerPC64 ELF64. (line 48) +* PowerPC64 OPD spacing: PowerPC64 ELF64. (line 54) +* PowerPC64 stub grouping: PowerPC64 ELF64. (line 6) +* PowerPC64 stub symbols: PowerPC64 ELF64. (line 29) +* PowerPC64 TLS optimization: PowerPC64 ELF64. (line 43) +* PowerPC64 TOC optimization: PowerPC64 ELF64. (line 60) +* precedence in expressions: Operators. (line 6) +* prevent unnecessary loading: Output Section Type. + (line 22) +* program headers: PHDRS. (line 6) +* program headers and sections: Output Section Phdr. + (line 6) +* program headers, not enough room: Builtin Functions. (line 188) +* program segments: PHDRS. (line 6) +* PROVIDE: PROVIDE. (line 6) +* PROVIDE_HIDDEN: PROVIDE_HIDDEN. (line 6) +* PUBLIC (MRI): MRI. (line 103) +* QUAD(EXPRESSION): Output Section Data. + (line 6) +* quoted symbol names: Symbols. (line 6) +* read-only text: Options. (line 439) +* read/write from cmd line: Options. (line 445) +* region alias: REGION_ALIAS. (line 6) +* region names: REGION_ALIAS. (line 6) +* REGION_ALIAS(ALIAS, REGION): REGION_ALIAS. (line 6) +* regions of memory: MEMORY. (line 6) +* relative expressions: Expression Section. (line 6) +* relaxing addressing modes: Options. (line 1094) +* relaxing on H8/300: H8/300. (line 9) +* relaxing on i960: i960. (line 31) +* relaxing on M68HC11: M68HC11/68HC12. (line 12) +* relaxing on Xtensa: Xtensa. (line 27) +* relocatable and absolute symbols: Expression Section. (line 6) +* relocatable output: Options. (line 489) +* removing sections: Output Section Discarding. + (line 6) +* reporting bugs in ld: Reporting Bugs. (line 6) +* requirements for BFD: BFD. (line 16) +* retain relocations in final executable: Options. (line 476) +* retaining specified symbols: Options. (line 1120) +* ROM initialized data: Output Section LMA. (line 39) +* round up expression: Builtin Functions. (line 38) +* round up location counter: Builtin Functions. (line 38) +* runtime library name: Options. (line 317) +* runtime library search path: Options. (line 1134) +* runtime pseudo-relocation: WIN32. (line 217) +* scaled integers: Constants. (line 15) +* scommon section: Input Section Common. + (line 20) +* script files: Options. (line 532) +* scripts: Scripts. (line 6) +* search directory, from cmd line: Options. (line 368) +* search path in linker script: File Commands. (line 74) +* SEARCH_DIR(PATH): File Commands. (line 74) +* SECT (MRI): MRI. (line 109) +* section address: Output Section Address. + (line 6) +* section address in expression: Builtin Functions. (line 17) +* section alignment: Builtin Functions. (line 64) +* section alignment, warnings on: Options. (line 1434) +* section data: Output Section Data. + (line 6) +* section fill pattern: Output Section Fill. + (line 6) +* section load address: Output Section LMA. (line 6) +* section load address in expression: Builtin Functions. (line 140) +* section name: Output Section Name. + (line 6) +* section name wildcard patterns: Input Section Wildcards. + (line 6) +* section size: Builtin Functions. (line 167) +* section, assigning to memory region: Output Section Region. + (line 6) +* section, assigning to program header: Output Section Phdr. + (line 6) +* SECTIONS: SECTIONS. (line 6) +* sections, discarding: Output Section Discarding. + (line 6) +* segment origins, cmd line: Options. (line 1285) +* SEGMENT_START(SEGMENT, DEFAULT): Builtin Functions. (line 159) +* segments, ELF: PHDRS. (line 6) +* shared libraries: Options. (line 1213) +* SHORT(EXPRESSION): Output Section Data. + (line 6) +* SIZEOF(SECTION): Builtin Functions. (line 167) +* SIZEOF_HEADERS: Builtin Functions. (line 183) +* small common symbols: Input Section Common. + (line 20) +* SORT: Input Section Wildcards. + (line 63) +* SORT_BY_ALIGNMENT: Input Section Wildcards. + (line 54) +* SORT_BY_INIT_PRIORITY: Input Section Wildcards. + (line 58) +* SORT_BY_NAME: Input Section Wildcards. + (line 46) +* SPU: SPU ELF. (line 29) +* SPU ELF options: SPU ELF. (line 6) +* SPU extra overlay stubs: SPU ELF. (line 19) +* SPU local store size: SPU ELF. (line 24) +* SPU overlay stub symbols: SPU ELF. (line 15) +* SPU overlays: SPU ELF. (line 9) +* SPU plugins: SPU ELF. (line 6) +* SQUAD(EXPRESSION): Output Section Data. + (line 6) +* stack size: Options. (line 1931) +* standard Unix system: Options. (line 7) +* start of execution: Entry Point. (line 6) +* STARTUP(FILENAME): File Commands. (line 82) +* strip all symbols: Options. (line 519) +* strip debugger symbols: Options. (line 523) +* stripping all but some symbols: Options. (line 1120) +* STUB_GROUP_SIZE: ARM. (line 138) +* SUBALIGN(SUBSECTION_ALIGN): Forced Input Alignment. + (line 6) +* suffixes for integers: Constants. (line 15) +* symbol defaults: Builtin Functions. (line 120) +* symbol definition, scripts: Assignments. (line 6) +* symbol names: Symbols. (line 6) +* symbol tracing: Options. (line 597) +* symbol versions: VERSION. (line 6) +* symbol-only input: Options. (line 508) +* symbolic constants: Symbolic Constants. (line 6) +* symbols, from command line: Options. (line 877) +* symbols, relocatable and absolute: Expression Section. (line 6) +* symbols, retaining selectively: Options. (line 1120) +* synthesizing linker: Options. (line 1094) +* synthesizing on H8/300: H8/300. (line 14) +* TARGET(BFDNAME): Format Commands. (line 35) +* TARGET1: ARM. (line 32) +* TARGET2: ARM. (line 37) +* text segment origin, cmd line: Options. (line 1292) +* thumb entry point: ARM. (line 17) +* TI COFF versions: TI COFF. (line 6) +* traditional format: Options. (line 1264) +* trampoline generation on M68HC11: M68HC11/68HC12. (line 31) +* trampoline generation on M68HC12: M68HC11/68HC12. (line 31) +* unallocated address, next: Builtin Functions. (line 150) +* undefined symbol: Options. (line 554) +* undefined symbol in linker script: Miscellaneous Commands. + (line 13) +* undefined symbols, warnings on: Options. (line 1430) +* uninitialized data placement: Input Section Common. + (line 6) +* unspecified memory: Output Section Data. + (line 39) +* usage: Options. (line 962) +* USE_BLX: ARM. (line 74) +* using a DEF file: WIN32. (line 57) +* using auto-export functionality: WIN32. (line 22) +* Using decorations: WIN32. (line 162) +* variables, defining: Assignments. (line 6) +* verbose[=NUMBER]: Options. (line 1324) +* version: Options. (line 581) +* version script: VERSION. (line 6) +* version script, symbol versions: Options. (line 1332) +* VERSION {script text}: VERSION. (line 6) +* versions of symbols: VERSION. (line 6) +* VFP11_DENORM_FIX: ARM. (line 83) +* warnings, on combining symbols: Options. (line 1343) +* warnings, on section alignment: Options. (line 1434) +* warnings, on undefined symbols: Options. (line 1430) +* weak externals: WIN32. (line 407) +* what is this?: Overview. (line 6) +* wildcard file name patterns: Input Section Wildcards. + (line 6) +* Xtensa options: Xtensa. (line 56) +* Xtensa processors: Xtensa. (line 6) + + + +Tag Table: +Node: Top816 +Node: Overview1602 +Node: Invocation2716 +Node: Options3124 +Node: Environment94796 +Node: Scripts96556 +Node: Basic Script Concepts98290 +Node: Script Format100997 +Node: Simple Example101860 +Node: Simple Commands104956 +Node: Entry Point105462 +Node: File Commands106395 +Node: Format Commands110396 +Node: REGION_ALIAS112352 +Node: Miscellaneous Commands117184 +Node: Assignments120792 +Node: Simple Assignments121283 +Node: PROVIDE123019 +Node: PROVIDE_HIDDEN124224 +Node: Source Code Reference124468 +Node: SECTIONS128048 +Node: Output Section Description129939 +Node: Output Section Name131026 +Node: Output Section Address131902 +Node: Input Section134137 +Node: Input Section Basics134938 +Node: Input Section Wildcards138844 +Node: Input Section Common143844 +Node: Input Section Keep145326 +Node: Input Section Example145816 +Node: Output Section Data146784 +Node: Output Section Keywords149561 +Node: Output Section Discarding153130 +Node: Output Section Attributes154311 +Node: Output Section Type155412 +Node: Output Section LMA156483 +Node: Forced Output Alignment159554 +Node: Forced Input Alignment159822 +Node: Output Section Constraint160211 +Node: Output Section Region160639 +Node: Output Section Phdr161072 +Node: Output Section Fill161736 +Node: Overlay Description162878 +Node: MEMORY167181 +Node: PHDRS171516 +Node: VERSION176770 +Node: Expressions184863 +Node: Constants185792 +Node: Symbolic Constants186667 +Node: Symbols187218 +Node: Orphan Sections187965 +Node: Location Counter189129 +Node: Operators193565 +Node: Evaluation194487 +Node: Expression Section195851 +Node: Builtin Functions199508 +Node: Implicit Linker Scripts207469 +Node: Machine Dependent208244 +Node: H8/300209260 +Node: i960210885 +Node: M68HC11/68HC12213089 +Node: ARM214543 +Node: HPPA ELF32222506 +Node: M68K224129 +Node: MMIX225038 +Node: MSP430226203 +Node: PowerPC ELF32227252 +Node: PowerPC64 ELF64230088 +Node: SPU ELF234504 +Node: TI COFF237136 +Node: WIN32237662 +Node: Xtensa257787 +Node: BFD260752 +Node: BFD outline262207 +Node: BFD information loss263493 +Node: Canonical format266010 +Node: Reporting Bugs270367 +Node: Bug Criteria271061 +Node: Bug Reporting271760 +Node: MRI278799 +Node: GNU Free Documentation License283442 +Node: LD Index308598 + +End Tag Table diff --git a/ld/ld.texinfo b/ld/ld.texinfo index 800f0d4..592e38c 100644 --- a/ld/ld.texinfo +++ b/ld/ld.texinfo @@ -1258,21 +1258,20 @@ option. @itemx --no-copy-dt-needed-entries This option affects the treatment of dynamic libraries referred to by DT_NEEDED tags @emph{inside} ELF dynamic libraries mentioned on the -command line. Normally the linker will add a DT_NEEDED tag to the +command line. Normally the linker won't add a DT_NEEDED tag to the output binary for each library mentioned in a DT_NEEDED tag in an -input dynamic library. With @option{--no-copy-dt-needed-entries} +input dynamic library. With @option{--copy-dt-needed-entries} specified on the command line however any dynamic libraries that -follow it will have their DT_NEEDED entries ignored. The default -behaviour can be restored with @option{--copy-dt-needed-entries}. +follow it will have their DT_NEEDED entries added. The default +behaviour can be restored with @option{--no-copy-dt-needed-entries}. This option also has an effect on the resolution of symbols in dynamic -libraries. With the default setting dynamic libraries mentioned on -the command line will be recursively searched, following their -DT_NEEDED tags to other libraries, in order to resolve symbols -required by the output binary. With -@option{--no-copy-dt-needed-entries} specified however the searching -of dynamic libraries that follow it will stop with the dynamic -library itself. No DT_NEEDED links will be traversed to resolve +libraries. With @option{--copy-dt-needed-entries} dynamic libraries +mentioned on the command line will be recursively searched, following +their DT_NEEDED tags to other libraries, in order to resolve symbols +required by the output binary. With the default setting however +the searching of dynamic libraries that follow it will stop with the +dynamic library itself. No DT_NEEDED links will be traversed to resolve symbols. @cindex cross reference table @@ -1401,6 +1400,13 @@ default behaviour (of not listing the sections that are removed) can be restored by specifying @samp{--no-print-gc-sections} on the command line. +@kindex --print-output-format +@cindex output format +@item --print-output-format +Print the name of the default output format (perhaps influenced by +other command-line options). This is the string that would appear +in an @code{OUTPUT_FORMAT} linker script command (@pxref{File Commands}). + @cindex help @cindex usage @kindex --help @@ -2069,6 +2075,12 @@ call before the linker has a chance to wrap it to @code{malloc}. Request creation of @code{.eh_frame_hdr} section and ELF @code{PT_GNU_EH_FRAME} segment header. +@kindex --ld-generated-unwind-info +@item --no-ld-generated-unwind-info +Request creation of @code{.eh_frame} unwind info for linker +generated code sections like PLT. This option is on by default +if linker generated unwind info is supported. + @kindex --enable-new-dtags @kindex --disable-new-dtags @item --enable-new-dtags @@ -2637,6 +2649,10 @@ to @var{index}. The default is 0, which is appropriate for generating executables. If a shared library is generated with a DSBT index of 0, the @code{R_C6000_DSBT_INDEX} relocs are copied into the output file. +@kindex --no-merge-exidx-entries +The @samp{--no-merge-exidx-entries} switch disables the merging of adjacent +exidx entries in frame unwind info. + @end table @c man end @@ -3849,6 +3865,26 @@ needs to be at a particular location in memory. For example: data.o(.data) @end smallexample +To refine the sections that are included based on the section flags +of an input section, INPUT_SECTION_FLAGS may be used. + +Here is a simple example for using Section header flags for ELF sections: + +@smallexample +@group +SECTIONS @{ + .text : @{ INPUT_SECTION_FLAGS (SHF_MERGE & SHF_STRINGS) *(.text) @} + .text2 : @{ INPUT_SECTION_FLAGS (!SHF_WRITE) *(.text) @} +@} +@end group +@end smallexample + +In this example, the output section @samp{.text} will be comprised of any +input section matching the name *(.text) whose section header flags +@code{SHF_MERGE} and @code{SHF_STRINGS} are set. The output section +@samp{.text2} will be comprised of any input section matching the name *(.text) +whose section header flag @code{SHF_WRITE} is clear. + You can also specify files within archives by writing a pattern matching the archive, a colon, then the pattern matching the file, with no whitespace around the colon. @@ -6284,6 +6320,18 @@ instruction. The original instruction is then replaced with a branch to the veneer. The extra cycles required to call and return from the veneer are sufficient to avoid the erratum in both the scalar and vector cases. +@cindex ARM1176 erratum workaround +@kindex --fix-arm1176 +@kindex --no-fix-arm1176 +The @samp{--fix-arm1176} switch enables a link-time workaround for an erratum +in certain ARM1176 processors. The workaround is enabled by default if you +are targetting ARM v6 (excluding ARM v6T2) or earlier. It can be disabled +unconditionally by specifying @samp{--no-fix-arm1176}. + +Further information is available in the ``ARM1176JZ-S and ARM1176JZF-S +Programmer Advice Notice'' available on the ARM documentaion website at: +http://infocenter.arm.com/. + @cindex NO_ENUM_SIZE_WARNING @kindex --no-enum-size-warning The @option{--no-enum-size-warning} switch prevents the linker from diff --git a/ld/ldexp.c b/ld/ldexp.c index fc18601..68617d8 100644 --- a/ld/ldexp.c +++ b/ld/ldexp.c @@ -783,12 +783,15 @@ exp_fold_tree_1 (etree_type *tree) case etree_provided: if (tree->assign.dst[0] == '.' && tree->assign.dst[1] == 0) { - /* Assignment to dot can only be done during allocation. */ if (tree->type.node_class != etree_assign) einfo (_("%F%S can not PROVIDE assignment to location counter\n")); + /* After allocation, assignment to dot should not be done inside + an output section since allocation adds a padding statement + that effectively duplicates the assignment. */ if (expld.phase == lang_mark_phase_enum || expld.phase == lang_allocating_phase_enum - || (expld.phase == lang_final_phase_enum + || ((expld.phase == lang_assigning_phase_enum + || expld.phase == lang_final_phase_enum) && expld.section == bfd_abs_section_ptr)) { /* Notify the folder that this is an assignment to dot. */ @@ -829,6 +832,8 @@ exp_fold_tree_1 (etree_type *tree) } else { + etree_type *name; + struct bfd_link_hash_entry *h = NULL; if (tree->type.node_class == etree_provide) @@ -846,6 +851,23 @@ exp_fold_tree_1 (etree_type *tree) } } + name = tree->assign.src; + if (name->type.node_class == etree_trinary) + { + exp_fold_tree_1 (name->trinary.cond); + if (expld.result.valid_p) + name = (expld.result.value + ? name->trinary.lhs : name->trinary.rhs); + } + + if (name->type.node_class == etree_name + && name->type.node_code == NAME + && strcmp (tree->assign.dst, name->name.name) == 0) + /* Leave it alone. Do not replace a symbol with its own + output address, in case there is another section sizing + pass. Folding does not preserve input sections. */ + break; + exp_fold_tree_1 (tree->assign.src); if (expld.result.valid_p || (expld.phase == lang_first_phase_enum @@ -873,7 +895,8 @@ exp_fold_tree_1 (etree_type *tree) tree->type.node_class = etree_provided; /* Copy the symbol type if this is a simple assignment of - one symbol to annother. */ + one symbol to another. This could be more general + (e.g. a ?: operator with NAMEs in each branch). */ if (tree->assign.src->type.node_class == etree_name) { struct bfd_link_hash_entry *hsrc; diff --git a/ld/ldexp.h b/ld/ldexp.h index 6d98e75..4ea13c2 100644 --- a/ld/ldexp.h +++ b/ld/ldexp.h @@ -97,6 +97,7 @@ typedef enum { lang_first_phase_enum, lang_mark_phase_enum, lang_allocating_phase_enum, + lang_assigning_phase_enum, lang_final_phase_enum } lang_phase_type; diff --git a/ld/ldgram.c b/ld/ldgram.c new file mode 100644 index 0000000..2b34c63 --- /dev/null +++ b/ld/ldgram.c @@ -0,0 +1,4641 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton implementation for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* C LALR(1) parser skeleton written by Richard Stallman, by + simplifying the original so-called "semantic" parser. */ + +/* All symbols defined below should begin with yy or YY, to avoid + infringing on user name space. This should be done even for local + variables, as they might otherwise be expanded by user macros. + There are some unavoidable exceptions within include files to + define necessary library symbols; they are noted "INFRINGES ON + USER NAME SPACE" below. */ + +/* Identify Bison output. */ +#define YYBISON 1 + +/* Bison version. */ +#define YYBISON_VERSION "2.3" + +/* Skeleton name. */ +#define YYSKELETON_NAME "yacc.c" + +/* Pure parsers. */ +#define YYPURE 0 + +/* Using locations. */ +#define YYLSP_NEEDED 0 + + + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + INT = 258, + NAME = 259, + LNAME = 260, + OREQ = 261, + ANDEQ = 262, + RSHIFTEQ = 263, + LSHIFTEQ = 264, + DIVEQ = 265, + MULTEQ = 266, + MINUSEQ = 267, + PLUSEQ = 268, + OROR = 269, + ANDAND = 270, + NE = 271, + EQ = 272, + GE = 273, + LE = 274, + RSHIFT = 275, + LSHIFT = 276, + UNARY = 277, + END = 278, + ALIGN_K = 279, + BLOCK = 280, + BIND = 281, + QUAD = 282, + SQUAD = 283, + LONG = 284, + SHORT = 285, + BYTE = 286, + SECTIONS = 287, + PHDRS = 288, + INSERT_K = 289, + AFTER = 290, + BEFORE = 291, + DATA_SEGMENT_ALIGN = 292, + DATA_SEGMENT_RELRO_END = 293, + DATA_SEGMENT_END = 294, + SORT_BY_NAME = 295, + SORT_BY_ALIGNMENT = 296, + SORT_BY_INIT_PRIORITY = 297, + SIZEOF_HEADERS = 298, + OUTPUT_FORMAT = 299, + FORCE_COMMON_ALLOCATION = 300, + OUTPUT_ARCH = 301, + INHIBIT_COMMON_ALLOCATION = 302, + SEGMENT_START = 303, + INCLUDE = 304, + MEMORY = 305, + REGION_ALIAS = 306, + LD_FEATURE = 307, + NOLOAD = 308, + DSECT = 309, + COPY = 310, + INFO = 311, + OVERLAY = 312, + DEFINED = 313, + TARGET_K = 314, + SEARCH_DIR = 315, + MAP = 316, + ENTRY = 317, + NEXT = 318, + SIZEOF = 319, + ALIGNOF = 320, + ADDR = 321, + LOADADDR = 322, + MAX_K = 323, + MIN_K = 324, + STARTUP = 325, + HLL = 326, + SYSLIB = 327, + FLOAT = 328, + NOFLOAT = 329, + NOCROSSREFS = 330, + ORIGIN = 331, + FILL = 332, + LENGTH = 333, + CREATE_OBJECT_SYMBOLS = 334, + INPUT = 335, + GROUP = 336, + OUTPUT = 337, + CONSTRUCTORS = 338, + ALIGNMOD = 339, + AT = 340, + SUBALIGN = 341, + PROVIDE = 342, + PROVIDE_HIDDEN = 343, + AS_NEEDED = 344, + CHIP = 345, + LIST = 346, + SECT = 347, + ABSOLUTE = 348, + LOAD = 349, + NEWLINE = 350, + ENDWORD = 351, + ORDER = 352, + NAMEWORD = 353, + ASSERT_K = 354, + FORMAT = 355, + PUBLIC = 356, + DEFSYMEND = 357, + BASE = 358, + ALIAS = 359, + TRUNCATE = 360, + REL = 361, + INPUT_SCRIPT = 362, + INPUT_MRI_SCRIPT = 363, + INPUT_DEFSYM = 364, + CASE = 365, + EXTERN = 366, + START = 367, + VERS_TAG = 368, + VERS_IDENTIFIER = 369, + GLOBAL = 370, + LOCAL = 371, + VERSIONK = 372, + INPUT_VERSION_SCRIPT = 373, + KEEP = 374, + ONLY_IF_RO = 375, + ONLY_IF_RW = 376, + SPECIAL = 377, + INPUT_SECTION_FLAGS = 378, + EXCLUDE_FILE = 379, + CONSTANT = 380, + INPUT_DYNAMIC_LIST = 381 + }; +#endif +/* Tokens. */ +#define INT 258 +#define NAME 259 +#define LNAME 260 +#define OREQ 261 +#define ANDEQ 262 +#define RSHIFTEQ 263 +#define LSHIFTEQ 264 +#define DIVEQ 265 +#define MULTEQ 266 +#define MINUSEQ 267 +#define PLUSEQ 268 +#define OROR 269 +#define ANDAND 270 +#define NE 271 +#define EQ 272 +#define GE 273 +#define LE 274 +#define RSHIFT 275 +#define LSHIFT 276 +#define UNARY 277 +#define END 278 +#define ALIGN_K 279 +#define BLOCK 280 +#define BIND 281 +#define QUAD 282 +#define SQUAD 283 +#define LONG 284 +#define SHORT 285 +#define BYTE 286 +#define SECTIONS 287 +#define PHDRS 288 +#define INSERT_K 289 +#define AFTER 290 +#define BEFORE 291 +#define DATA_SEGMENT_ALIGN 292 +#define DATA_SEGMENT_RELRO_END 293 +#define DATA_SEGMENT_END 294 +#define SORT_BY_NAME 295 +#define SORT_BY_ALIGNMENT 296 +#define SORT_BY_INIT_PRIORITY 297 +#define SIZEOF_HEADERS 298 +#define OUTPUT_FORMAT 299 +#define FORCE_COMMON_ALLOCATION 300 +#define OUTPUT_ARCH 301 +#define INHIBIT_COMMON_ALLOCATION 302 +#define SEGMENT_START 303 +#define INCLUDE 304 +#define MEMORY 305 +#define REGION_ALIAS 306 +#define LD_FEATURE 307 +#define NOLOAD 308 +#define DSECT 309 +#define COPY 310 +#define INFO 311 +#define OVERLAY 312 +#define DEFINED 313 +#define TARGET_K 314 +#define SEARCH_DIR 315 +#define MAP 316 +#define ENTRY 317 +#define NEXT 318 +#define SIZEOF 319 +#define ALIGNOF 320 +#define ADDR 321 +#define LOADADDR 322 +#define MAX_K 323 +#define MIN_K 324 +#define STARTUP 325 +#define HLL 326 +#define SYSLIB 327 +#define FLOAT 328 +#define NOFLOAT 329 +#define NOCROSSREFS 330 +#define ORIGIN 331 +#define FILL 332 +#define LENGTH 333 +#define CREATE_OBJECT_SYMBOLS 334 +#define INPUT 335 +#define GROUP 336 +#define OUTPUT 337 +#define CONSTRUCTORS 338 +#define ALIGNMOD 339 +#define AT 340 +#define SUBALIGN 341 +#define PROVIDE 342 +#define PROVIDE_HIDDEN 343 +#define AS_NEEDED 344 +#define CHIP 345 +#define LIST 346 +#define SECT 347 +#define ABSOLUTE 348 +#define LOAD 349 +#define NEWLINE 350 +#define ENDWORD 351 +#define ORDER 352 +#define NAMEWORD 353 +#define ASSERT_K 354 +#define FORMAT 355 +#define PUBLIC 356 +#define DEFSYMEND 357 +#define BASE 358 +#define ALIAS 359 +#define TRUNCATE 360 +#define REL 361 +#define INPUT_SCRIPT 362 +#define INPUT_MRI_SCRIPT 363 +#define INPUT_DEFSYM 364 +#define CASE 365 +#define EXTERN 366 +#define START 367 +#define VERS_TAG 368 +#define VERS_IDENTIFIER 369 +#define GLOBAL 370 +#define LOCAL 371 +#define VERSIONK 372 +#define INPUT_VERSION_SCRIPT 373 +#define KEEP 374 +#define ONLY_IF_RO 375 +#define ONLY_IF_RW 376 +#define SPECIAL 377 +#define INPUT_SECTION_FLAGS 378 +#define EXCLUDE_FILE 379 +#define CONSTANT 380 +#define INPUT_DYNAMIC_LIST 381 + + + + +/* Copy the first part of user declarations. */ +#line 24 "ldgram.y" + +/* + + */ + +#define DONTDECLARE_MALLOC + +#include "sysdep.h" +#include "bfd.h" +#include "bfdlink.h" +#include "ld.h" +#include "ldexp.h" +#include "ldver.h" +#include "ldlang.h" +#include "ldfile.h" +#include "ldemul.h" +#include "ldmisc.h" +#include "ldmain.h" +#include "mri.h" +#include "ldctor.h" +#include "ldlex.h" + +#ifndef YYDEBUG +#define YYDEBUG 1 +#endif + +static enum section_type sectype; +static lang_memory_region_type *region; + +bfd_boolean ldgram_had_keep = FALSE; +char *ldgram_vers_current_lang = NULL; + +#define ERROR_NAME_MAX 20 +static char *error_names[ERROR_NAME_MAX]; +static int error_index; +#define PUSH_ERROR(x) if (error_index < ERROR_NAME_MAX) error_names[error_index] = x; error_index++; +#define POP_ERROR() error_index--; + + +/* Enabling traces. */ +#ifndef YYDEBUG +# define YYDEBUG 0 +#endif + +/* Enabling verbose error messages. */ +#ifdef YYERROR_VERBOSE +# undef YYERROR_VERBOSE +# define YYERROR_VERBOSE 1 +#else +# define YYERROR_VERBOSE 0 +#endif + +/* Enabling the token table. */ +#ifndef YYTOKEN_TABLE +# define YYTOKEN_TABLE 0 +#endif + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 62 "ldgram.y" +{ + bfd_vma integer; + struct big_int + { + bfd_vma integer; + char *str; + } bigint; + fill_type *fill; + char *name; + const char *cname; + struct wildcard_spec wildcard; + struct wildcard_list *wildcard_list; + struct name_list *name_list; + struct flag_info_list *flag_info_list; + struct flag_info *flag_info; + int token; + union etree_union *etree; + struct phdr_info + { + bfd_boolean filehdr; + bfd_boolean phdrs; + union etree_union *at; + union etree_union *flags; + } phdr; + struct lang_nocrossref *nocrossref; + struct lang_output_section_phdr_list *section_phdr; + struct bfd_elf_version_deps *deflist; + struct bfd_elf_version_expr *versyms; + struct bfd_elf_version_tree *versnode; +} +/* Line 193 of yacc.c. */ +#line 418 "ldgram.c" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + + + +/* Copy the second part of user declarations. */ + + +/* Line 216 of yacc.c. */ +#line 431 "ldgram.c" + +#ifdef short +# undef short +#endif + +#ifdef YYTYPE_UINT8 +typedef YYTYPE_UINT8 yytype_uint8; +#else +typedef unsigned char yytype_uint8; +#endif + +#ifdef YYTYPE_INT8 +typedef YYTYPE_INT8 yytype_int8; +#elif (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +typedef signed char yytype_int8; +#else +typedef short int yytype_int8; +#endif + +#ifdef YYTYPE_UINT16 +typedef YYTYPE_UINT16 yytype_uint16; +#else +typedef unsigned short int yytype_uint16; +#endif + +#ifdef YYTYPE_INT16 +typedef YYTYPE_INT16 yytype_int16; +#else +typedef short int yytype_int16; +#endif + +#ifndef YYSIZE_T +# ifdef __SIZE_TYPE__ +# define YYSIZE_T __SIZE_TYPE__ +# elif defined size_t +# define YYSIZE_T size_t +# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# else +# define YYSIZE_T unsigned int +# endif +#endif + +#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) + +#ifndef YY_ +# if defined YYENABLE_NLS && YYENABLE_NLS +# if ENABLE_NLS +# include /* INFRINGES ON USER NAME SPACE */ +# define YY_(msgid) dgettext ("bison-runtime", msgid) +# endif +# endif +# ifndef YY_ +# define YY_(msgid) msgid +# endif +#endif + +/* Suppress unused-variable warnings by "using" E. */ +#if ! defined lint || defined __GNUC__ +# define YYUSE(e) ((void) (e)) +#else +# define YYUSE(e) /* empty */ +#endif + +/* Identity function, used to suppress warnings about constant conditions. */ +#ifndef lint +# define YYID(n) (n) +#else +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static int +YYID (int i) +#else +static int +YYID (i) + int i; +#endif +{ + return i; +} +#endif + +#if ! defined yyoverflow || YYERROR_VERBOSE + +/* The parser invokes alloca or malloc; define the necessary symbols. */ + +# ifdef YYSTACK_USE_ALLOCA +# if YYSTACK_USE_ALLOCA +# ifdef __GNUC__ +# define YYSTACK_ALLOC __builtin_alloca +# elif defined __BUILTIN_VA_ARG_INCR +# include /* INFRINGES ON USER NAME SPACE */ +# elif defined _AIX +# define YYSTACK_ALLOC __alloca +# elif defined _MSC_VER +# include /* INFRINGES ON USER NAME SPACE */ +# define alloca _alloca +# else +# define YYSTACK_ALLOC alloca +# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# endif +# endif +# endif + +# ifdef YYSTACK_ALLOC + /* Pacify GCC's `empty if-body' warning. */ +# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) +# ifndef YYSTACK_ALLOC_MAXIMUM + /* The OS might guarantee only one guard page at the bottom of the stack, + and a page size can be as small as 4096 bytes. So we cannot safely + invoke alloca (N) if N exceeds 4096. Use a slightly smaller number + to allow for a few compiler-allocated temporary stack slots. */ +# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ +# endif +# else +# define YYSTACK_ALLOC YYMALLOC +# define YYSTACK_FREE YYFREE +# ifndef YYSTACK_ALLOC_MAXIMUM +# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM +# endif +# if (defined __cplusplus && ! defined _STDLIB_H \ + && ! ((defined YYMALLOC || defined malloc) \ + && (defined YYFREE || defined free))) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# ifndef YYMALLOC +# define YYMALLOC malloc +# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifndef YYFREE +# define YYFREE free +# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void free (void *); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# endif +#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ + + +#if (! defined yyoverflow \ + && (! defined __cplusplus \ + || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) + +/* A type that is properly aligned for any stack member. */ +union yyalloc +{ + yytype_int16 yyss; + YYSTYPE yyvs; + }; + +/* The size of the maximum gap between one aligned stack and the next. */ +# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) + +/* The size of an array large to enough to hold all stacks, each with + N elements. */ +# define YYSTACK_BYTES(N) \ + ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ + + YYSTACK_GAP_MAXIMUM) + +/* Copy COUNT objects from FROM to TO. The source and destination do + not overlap. */ +# ifndef YYCOPY +# if defined __GNUC__ && 1 < __GNUC__ +# define YYCOPY(To, From, Count) \ + __builtin_memcpy (To, From, (Count) * sizeof (*(From))) +# else +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ + while (YYID (0)) +# endif +# endif + +/* Relocate STACK from its old location to the new one. The + local variables YYSIZE and YYSTACKSIZE give the old and new number of + elements in the stack, and YYPTR gives the new location of the + stack. Advance YYPTR to a properly aligned location for the next + stack. */ +# define YYSTACK_RELOCATE(Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack, Stack, yysize); \ + Stack = &yyptr->Stack; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ + while (YYID (0)) + +#endif + +/* YYFINAL -- State number of the termination state. */ +#define YYFINAL 17 +/* YYLAST -- Last index in YYTABLE. */ +#define YYLAST 1887 + +/* YYNTOKENS -- Number of terminals. */ +#define YYNTOKENS 150 +/* YYNNTS -- Number of nonterminals. */ +#define YYNNTS 128 +/* YYNRULES -- Number of rules. */ +#define YYNRULES 364 +/* YYNRULES -- Number of states. */ +#define YYNSTATES 787 + +/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ +#define YYUNDEFTOK 2 +#define YYMAXUTOK 381 + +#define YYTRANSLATE(YYX) \ + ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + +/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ +static const yytype_uint8 yytranslate[] = +{ + 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 148, 2, 2, 2, 34, 21, 2, + 37, 145, 32, 30, 143, 31, 2, 33, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 16, 144, + 24, 6, 25, 15, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 146, 2, 147, 20, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 57, 19, 58, 149, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, + 5, 7, 8, 9, 10, 11, 12, 13, 14, 17, + 18, 22, 23, 26, 27, 28, 29, 35, 36, 38, + 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, + 49, 50, 51, 52, 53, 54, 55, 56, 59, 60, + 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, + 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, + 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, + 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, + 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, + 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, + 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, + 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, + 141, 142 +}; + +#if YYDEBUG +/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in + YYRHS. */ +static const yytype_uint16 yyprhs[] = +{ + 0, 0, 3, 6, 9, 12, 15, 18, 20, 21, + 26, 27, 30, 34, 35, 38, 43, 45, 47, 50, + 52, 57, 62, 66, 69, 74, 78, 83, 88, 93, + 98, 103, 106, 109, 112, 117, 122, 125, 128, 131, + 134, 135, 141, 144, 145, 149, 152, 153, 155, 159, + 161, 165, 166, 168, 172, 173, 176, 178, 181, 185, + 186, 189, 192, 193, 195, 197, 199, 201, 203, 205, + 207, 209, 211, 213, 218, 223, 228, 233, 242, 247, + 249, 251, 256, 257, 263, 268, 269, 275, 280, 285, + 289, 293, 300, 305, 307, 311, 314, 316, 320, 323, + 324, 330, 331, 339, 340, 347, 352, 355, 358, 359, + 364, 367, 368, 376, 378, 380, 382, 384, 390, 395, + 400, 408, 416, 424, 432, 441, 446, 448, 452, 457, + 460, 462, 466, 468, 470, 473, 477, 482, 487, 493, + 495, 496, 502, 505, 507, 509, 511, 516, 518, 523, + 528, 529, 538, 539, 545, 548, 550, 551, 553, 555, + 557, 559, 561, 563, 565, 568, 569, 571, 573, 575, + 577, 579, 581, 583, 585, 587, 589, 593, 597, 604, + 611, 613, 614, 619, 621, 622, 626, 628, 629, 637, + 638, 644, 648, 652, 653, 657, 659, 662, 664, 667, + 672, 677, 681, 685, 687, 692, 696, 697, 699, 701, + 702, 705, 709, 710, 713, 716, 720, 725, 728, 731, + 734, 738, 742, 746, 750, 754, 758, 762, 766, 770, + 774, 778, 782, 786, 790, 794, 798, 804, 808, 812, + 817, 819, 821, 826, 831, 836, 841, 846, 851, 856, + 863, 870, 877, 882, 889, 894, 896, 903, 910, 917, + 922, 927, 931, 932, 937, 938, 943, 944, 949, 950, + 952, 954, 956, 957, 958, 959, 960, 961, 962, 982, + 983, 984, 985, 986, 987, 1006, 1007, 1008, 1016, 1017, + 1023, 1025, 1027, 1029, 1031, 1033, 1037, 1038, 1041, 1045, + 1048, 1055, 1066, 1069, 1071, 1072, 1074, 1077, 1078, 1079, + 1083, 1084, 1085, 1086, 1087, 1099, 1104, 1105, 1108, 1109, + 1110, 1117, 1119, 1120, 1124, 1130, 1131, 1135, 1136, 1139, + 1141, 1144, 1149, 1152, 1153, 1156, 1157, 1163, 1165, 1168, + 1173, 1179, 1186, 1188, 1191, 1192, 1195, 1200, 1205, 1214, + 1216, 1218, 1222, 1226, 1227, 1237, 1238, 1246, 1248, 1252, + 1254, 1258, 1260, 1264, 1265 +}; + +/* YYRHS -- A `-1'-separated list of the rules' RHS. */ +static const yytype_int16 yyrhs[] = +{ + 151, 0, -1, 123, 167, -1, 124, 155, -1, 134, + 266, -1, 142, 261, -1, 125, 153, -1, 4, -1, + -1, 154, 4, 6, 222, -1, -1, 156, 157, -1, + 157, 158, 111, -1, -1, 106, 222, -1, 106, 222, + 143, 222, -1, 4, -1, 107, -1, 113, 160, -1, + 112, -1, 117, 4, 6, 222, -1, 117, 4, 143, + 222, -1, 117, 4, 222, -1, 116, 4, -1, 108, + 4, 143, 222, -1, 108, 4, 222, -1, 108, 4, + 6, 222, -1, 38, 4, 6, 222, -1, 38, 4, + 143, 222, -1, 100, 4, 6, 222, -1, 100, 4, + 143, 222, -1, 109, 162, -1, 110, 161, -1, 114, + 4, -1, 120, 4, 143, 4, -1, 120, 4, 143, + 3, -1, 119, 222, -1, 121, 3, -1, 126, 163, + -1, 127, 164, -1, -1, 65, 152, 159, 157, 36, + -1, 128, 4, -1, -1, 160, 143, 4, -1, 160, + 4, -1, -1, 4, -1, 161, 143, 4, -1, 4, + -1, 162, 143, 4, -1, -1, 4, -1, 163, 143, + 4, -1, -1, 165, 166, -1, 4, -1, 166, 4, + -1, 166, 143, 4, -1, -1, 168, 169, -1, 169, + 170, -1, -1, 202, -1, 177, -1, 253, -1, 213, + -1, 214, -1, 216, -1, 218, -1, 179, -1, 268, + -1, 144, -1, 75, 37, 4, 145, -1, 76, 37, + 152, 145, -1, 98, 37, 152, 145, -1, 60, 37, + 4, 145, -1, 60, 37, 4, 143, 4, 143, 4, + 145, -1, 62, 37, 4, 145, -1, 61, -1, 63, + -1, 96, 37, 173, 145, -1, -1, 97, 171, 37, + 173, 145, -1, 77, 37, 152, 145, -1, -1, 65, + 152, 172, 169, 36, -1, 91, 37, 219, 145, -1, + 127, 37, 164, 145, -1, 48, 49, 4, -1, 48, + 50, 4, -1, 67, 37, 4, 143, 4, 145, -1, + 68, 37, 4, 145, -1, 4, -1, 173, 143, 4, + -1, 173, 4, -1, 5, -1, 173, 143, 5, -1, + 173, 5, -1, -1, 105, 37, 174, 173, 145, -1, + -1, 173, 143, 105, 37, 175, 173, 145, -1, -1, + 173, 105, 37, 176, 173, 145, -1, 46, 57, 178, + 58, -1, 178, 228, -1, 178, 179, -1, -1, 78, + 37, 4, 145, -1, 200, 199, -1, -1, 115, 180, + 37, 222, 143, 4, 145, -1, 4, -1, 32, -1, + 15, -1, 181, -1, 140, 37, 185, 145, 181, -1, + 54, 37, 181, 145, -1, 55, 37, 181, 145, -1, + 54, 37, 55, 37, 181, 145, 145, -1, 54, 37, + 54, 37, 181, 145, 145, -1, 55, 37, 54, 37, + 181, 145, 145, -1, 55, 37, 55, 37, 181, 145, + 145, -1, 54, 37, 140, 37, 185, 145, 181, 145, + -1, 56, 37, 181, 145, -1, 4, -1, 183, 21, + 4, -1, 139, 37, 183, 145, -1, 185, 181, -1, + 181, -1, 186, 201, 182, -1, 182, -1, 4, -1, + 184, 4, -1, 146, 186, 147, -1, 184, 146, 186, + 147, -1, 182, 37, 186, 145, -1, 184, 182, 37, + 186, 145, -1, 187, -1, -1, 135, 37, 189, 187, + 145, -1, 200, 199, -1, 95, -1, 144, -1, 99, + -1, 54, 37, 99, 145, -1, 188, -1, 195, 37, + 220, 145, -1, 93, 37, 196, 145, -1, -1, 115, + 191, 37, 222, 143, 4, 145, 199, -1, -1, 65, + 152, 192, 194, 36, -1, 193, 190, -1, 190, -1, + -1, 193, -1, 41, -1, 42, -1, 43, -1, 44, + -1, 45, -1, 220, -1, 6, 196, -1, -1, 14, + -1, 13, -1, 12, -1, 11, -1, 10, -1, 9, + -1, 8, -1, 7, -1, 144, -1, 143, -1, 4, + 6, 220, -1, 4, 198, 220, -1, 103, 37, 4, + 6, 220, 145, -1, 104, 37, 4, 6, 220, 145, + -1, 143, -1, -1, 66, 57, 203, 58, -1, 204, + -1, -1, 204, 201, 205, -1, 205, -1, -1, 4, + 206, 210, 16, 208, 201, 209, -1, -1, 65, 152, + 207, 203, 36, -1, 92, 6, 220, -1, 94, 6, + 220, -1, -1, 37, 211, 145, -1, 212, -1, 211, + 212, -1, 4, -1, 148, 4, -1, 86, 37, 152, + 145, -1, 87, 37, 215, 145, -1, 87, 37, 145, + -1, 215, 201, 152, -1, 152, -1, 88, 37, 217, + 145, -1, 217, 201, 152, -1, -1, 89, -1, 90, + -1, -1, 4, 219, -1, 4, 143, 219, -1, -1, + 221, 222, -1, 31, 222, -1, 37, 222, 145, -1, + 79, 37, 222, 145, -1, 148, 222, -1, 30, 222, + -1, 149, 222, -1, 222, 32, 222, -1, 222, 33, + 222, -1, 222, 34, 222, -1, 222, 30, 222, -1, + 222, 31, 222, -1, 222, 29, 222, -1, 222, 28, + 222, -1, 222, 23, 222, -1, 222, 22, 222, -1, + 222, 27, 222, -1, 222, 26, 222, -1, 222, 24, + 222, -1, 222, 25, 222, -1, 222, 21, 222, -1, + 222, 20, 222, -1, 222, 19, 222, -1, 222, 15, + 222, 16, 222, -1, 222, 18, 222, -1, 222, 17, + 222, -1, 74, 37, 4, 145, -1, 3, -1, 59, + -1, 81, 37, 4, 145, -1, 80, 37, 4, 145, + -1, 82, 37, 4, 145, -1, 83, 37, 4, 145, + -1, 141, 37, 4, 145, -1, 109, 37, 222, 145, + -1, 38, 37, 222, 145, -1, 38, 37, 222, 143, + 222, 145, -1, 51, 37, 222, 143, 222, 145, -1, + 52, 37, 222, 143, 222, 145, -1, 53, 37, 222, + 145, -1, 64, 37, 4, 143, 222, 145, -1, 39, + 37, 222, 145, -1, 4, -1, 84, 37, 222, 143, + 222, 145, -1, 85, 37, 222, 143, 222, 145, -1, + 115, 37, 222, 143, 4, 145, -1, 92, 37, 4, + 145, -1, 94, 37, 4, 145, -1, 101, 25, 4, + -1, -1, 101, 37, 222, 145, -1, -1, 38, 37, + 222, 145, -1, -1, 102, 37, 222, 145, -1, -1, + 136, -1, 137, -1, 138, -1, -1, -1, -1, -1, + -1, -1, 4, 229, 244, 224, 225, 226, 230, 227, + 57, 231, 194, 58, 232, 247, 223, 248, 197, 233, + 201, -1, -1, -1, -1, -1, -1, 73, 234, 245, + 246, 224, 226, 235, 57, 236, 249, 58, 237, 247, + 223, 248, 197, 238, 201, -1, -1, -1, 97, 239, + 244, 240, 57, 178, 58, -1, -1, 65, 152, 241, + 178, 36, -1, 69, -1, 70, -1, 71, -1, 72, + -1, 73, -1, 37, 242, 145, -1, -1, 37, 145, + -1, 222, 243, 16, -1, 243, 16, -1, 40, 37, + 222, 145, 243, 16, -1, 40, 37, 222, 145, 39, + 37, 222, 145, 243, 16, -1, 222, 16, -1, 16, + -1, -1, 91, -1, 25, 4, -1, -1, -1, 248, + 16, 4, -1, -1, -1, -1, -1, 249, 4, 250, + 57, 194, 58, 251, 248, 197, 252, 201, -1, 47, + 57, 254, 58, -1, -1, 254, 255, -1, -1, -1, + 4, 256, 258, 259, 257, 144, -1, 222, -1, -1, + 4, 260, 259, -1, 101, 37, 222, 145, 259, -1, + -1, 37, 222, 145, -1, -1, 262, 263, -1, 264, + -1, 263, 264, -1, 57, 265, 58, 144, -1, 274, + 144, -1, -1, 267, 270, -1, -1, 269, 133, 57, + 270, 58, -1, 271, -1, 270, 271, -1, 57, 273, + 58, 144, -1, 129, 57, 273, 58, 144, -1, 129, + 57, 273, 58, 272, 144, -1, 129, -1, 272, 129, + -1, -1, 274, 144, -1, 131, 16, 274, 144, -1, + 132, 16, 274, 144, -1, 131, 16, 274, 144, 132, + 16, 274, 144, -1, 130, -1, 4, -1, 274, 144, + 130, -1, 274, 144, 4, -1, -1, 274, 144, 127, + 4, 57, 275, 274, 277, 58, -1, -1, 127, 4, + 57, 276, 274, 277, 58, -1, 131, -1, 274, 144, + 131, -1, 132, -1, 274, 144, 132, -1, 127, -1, + 274, 144, 127, -1, -1, 144, -1 +}; + +/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ +static const yytype_uint16 yyrline[] = +{ + 0, 168, 168, 169, 170, 171, 172, 176, 180, 180, + 190, 190, 203, 204, 208, 209, 210, 213, 216, 217, + 218, 220, 222, 224, 226, 228, 230, 232, 234, 236, + 238, 240, 241, 242, 244, 246, 248, 250, 252, 253, + 255, 254, 258, 260, 264, 265, 266, 270, 272, 276, + 278, 283, 284, 285, 290, 290, 295, 297, 299, 304, + 304, 310, 311, 316, 317, 318, 319, 320, 321, 322, + 323, 324, 325, 326, 328, 330, 332, 335, 337, 339, + 341, 343, 345, 344, 348, 351, 350, 354, 358, 359, + 361, 363, 365, 370, 373, 376, 379, 382, 385, 389, + 388, 393, 392, 397, 396, 403, 407, 408, 409, 413, + 415, 416, 416, 424, 428, 432, 439, 446, 453, 460, + 467, 474, 481, 488, 495, 502, 511, 529, 550, 563, + 572, 583, 592, 603, 612, 621, 625, 634, 638, 646, + 648, 647, 654, 655, 659, 660, 665, 670, 671, 676, + 680, 680, 684, 683, 690, 691, 694, 696, 700, 702, + 704, 706, 708, 713, 720, 722, 726, 728, 730, 732, + 734, 736, 738, 740, 745, 745, 750, 754, 762, 766, + 774, 774, 778, 781, 781, 784, 785, 790, 789, 795, + 794, 801, 809, 817, 818, 822, 823, 827, 829, 834, + 839, 840, 845, 847, 853, 855, 857, 861, 863, 869, + 872, 881, 892, 892, 898, 900, 902, 904, 906, 908, + 911, 913, 915, 917, 919, 921, 923, 925, 927, 929, + 931, 933, 935, 937, 939, 941, 943, 945, 947, 949, + 951, 953, 956, 958, 960, 962, 964, 966, 968, 970, + 972, 974, 976, 978, 987, 989, 991, 993, 995, 997, + 999, 1005, 1006, 1010, 1011, 1015, 1016, 1020, 1021, 1025, + 1026, 1027, 1028, 1031, 1035, 1038, 1044, 1046, 1031, 1053, + 1055, 1057, 1062, 1064, 1052, 1074, 1076, 1074, 1082, 1081, + 1088, 1089, 1090, 1091, 1092, 1096, 1097, 1098, 1102, 1103, + 1108, 1109, 1114, 1115, 1120, 1121, 1126, 1128, 1133, 1136, + 1149, 1153, 1158, 1160, 1151, 1168, 1171, 1173, 1177, 1178, + 1177, 1187, 1232, 1235, 1247, 1256, 1259, 1266, 1266, 1278, + 1279, 1283, 1287, 1296, 1296, 1310, 1310, 1320, 1321, 1325, + 1329, 1333, 1340, 1344, 1352, 1355, 1359, 1363, 1367, 1374, + 1378, 1382, 1386, 1391, 1390, 1404, 1403, 1413, 1417, 1421, + 1425, 1429, 1433, 1439, 1441 +}; +#endif + +#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE +/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. + First, the terminals, then, starting at YYNTOKENS, nonterminals. */ +static const char *const yytname[] = +{ + "$end", "error", "$undefined", "INT", "NAME", "LNAME", "'='", "OREQ", + "ANDEQ", "RSHIFTEQ", "LSHIFTEQ", "DIVEQ", "MULTEQ", "MINUSEQ", "PLUSEQ", + "'?'", "':'", "OROR", "ANDAND", "'|'", "'^'", "'&'", "NE", "EQ", "'<'", + "'>'", "GE", "LE", "RSHIFT", "LSHIFT", "'+'", "'-'", "'*'", "'/'", "'%'", + "UNARY", "END", "'('", "ALIGN_K", "BLOCK", "BIND", "QUAD", "SQUAD", + "LONG", "SHORT", "BYTE", "SECTIONS", "PHDRS", "INSERT_K", "AFTER", + "BEFORE", "DATA_SEGMENT_ALIGN", "DATA_SEGMENT_RELRO_END", + "DATA_SEGMENT_END", "SORT_BY_NAME", "SORT_BY_ALIGNMENT", + "SORT_BY_INIT_PRIORITY", "'{'", "'}'", "SIZEOF_HEADERS", "OUTPUT_FORMAT", + "FORCE_COMMON_ALLOCATION", "OUTPUT_ARCH", "INHIBIT_COMMON_ALLOCATION", + "SEGMENT_START", "INCLUDE", "MEMORY", "REGION_ALIAS", "LD_FEATURE", + "NOLOAD", "DSECT", "COPY", "INFO", "OVERLAY", "DEFINED", "TARGET_K", + "SEARCH_DIR", "MAP", "ENTRY", "NEXT", "SIZEOF", "ALIGNOF", "ADDR", + "LOADADDR", "MAX_K", "MIN_K", "STARTUP", "HLL", "SYSLIB", "FLOAT", + "NOFLOAT", "NOCROSSREFS", "ORIGIN", "FILL", "LENGTH", + "CREATE_OBJECT_SYMBOLS", "INPUT", "GROUP", "OUTPUT", "CONSTRUCTORS", + "ALIGNMOD", "AT", "SUBALIGN", "PROVIDE", "PROVIDE_HIDDEN", "AS_NEEDED", + "CHIP", "LIST", "SECT", "ABSOLUTE", "LOAD", "NEWLINE", "ENDWORD", + "ORDER", "NAMEWORD", "ASSERT_K", "FORMAT", "PUBLIC", "DEFSYMEND", "BASE", + "ALIAS", "TRUNCATE", "REL", "INPUT_SCRIPT", "INPUT_MRI_SCRIPT", + "INPUT_DEFSYM", "CASE", "EXTERN", "START", "VERS_TAG", "VERS_IDENTIFIER", + "GLOBAL", "LOCAL", "VERSIONK", "INPUT_VERSION_SCRIPT", "KEEP", + "ONLY_IF_RO", "ONLY_IF_RW", "SPECIAL", "INPUT_SECTION_FLAGS", + "EXCLUDE_FILE", "CONSTANT", "INPUT_DYNAMIC_LIST", "','", "';'", "')'", + "'['", "']'", "'!'", "'~'", "$accept", "file", "filename", "defsym_expr", + "@1", "mri_script_file", "@2", "mri_script_lines", "mri_script_command", + "@3", "ordernamelist", "mri_load_name_list", "mri_abs_name_list", + "casesymlist", "extern_name_list", "@4", "extern_name_list_body", + "script_file", "@5", "ifile_list", "ifile_p1", "@6", "@7", "input_list", + "@8", "@9", "@10", "sections", "sec_or_group_p1", "statement_anywhere", + "@11", "wildcard_name", "wildcard_spec", "sect_flag_list", "sect_flags", + "exclude_name_list", "file_NAME_list", "input_section_spec_no_keep", + "input_section_spec", "@12", "statement", "@13", "@14", "statement_list", + "statement_list_opt", "length", "fill_exp", "fill_opt", "assign_op", + "end", "assignment", "opt_comma", "memory", "memory_spec_list_opt", + "memory_spec_list", "memory_spec", "@15", "@16", "origin_spec", + "length_spec", "attributes_opt", "attributes_list", "attributes_string", + "startup", "high_level_library", "high_level_library_NAME_list", + "low_level_library", "low_level_library_NAME_list", + "floating_point_support", "nocrossref_list", "mustbe_exp", "@17", "exp", + "memspec_at_opt", "opt_at", "opt_align", "opt_subalign", + "sect_constraint", "section", "@18", "@19", "@20", "@21", "@22", "@23", + "@24", "@25", "@26", "@27", "@28", "@29", "@30", "type", "atype", + "opt_exp_with_type", "opt_exp_without_type", "opt_nocrossrefs", + "memspec_opt", "phdr_opt", "overlay_section", "@31", "@32", "@33", + "phdrs", "phdr_list", "phdr", "@34", "@35", "phdr_type", + "phdr_qualifiers", "phdr_val", "dynamic_list_file", "@36", + "dynamic_list_nodes", "dynamic_list_node", "dynamic_list_tag", + "version_script_file", "@37", "version", "@38", "vers_nodes", + "vers_node", "verdep", "vers_tag", "vers_defns", "@39", "@40", + "opt_semicolon", 0 +}; +#endif + +# ifdef YYPRINT +/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to + token YYLEX-NUM. */ +static const yytype_uint16 yytoknum[] = +{ + 0, 256, 257, 258, 259, 260, 61, 261, 262, 263, + 264, 265, 266, 267, 268, 63, 58, 269, 270, 124, + 94, 38, 271, 272, 60, 62, 273, 274, 275, 276, + 43, 45, 42, 47, 37, 277, 278, 40, 279, 280, + 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, + 291, 292, 293, 294, 295, 296, 297, 123, 125, 298, + 299, 300, 301, 302, 303, 304, 305, 306, 307, 308, + 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, + 319, 320, 321, 322, 323, 324, 325, 326, 327, 328, + 329, 330, 331, 332, 333, 334, 335, 336, 337, 338, + 339, 340, 341, 342, 343, 344, 345, 346, 347, 348, + 349, 350, 351, 352, 353, 354, 355, 356, 357, 358, + 359, 360, 361, 362, 363, 364, 365, 366, 367, 368, + 369, 370, 371, 372, 373, 374, 375, 376, 377, 378, + 379, 380, 381, 44, 59, 41, 91, 93, 33, 126 +}; +# endif + +/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ +static const yytype_uint16 yyr1[] = +{ + 0, 150, 151, 151, 151, 151, 151, 152, 154, 153, + 156, 155, 157, 157, 158, 158, 158, 158, 158, 158, + 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, + 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, + 159, 158, 158, 158, 160, 160, 160, 161, 161, 162, + 162, 163, 163, 163, 165, 164, 166, 166, 166, 168, + 167, 169, 169, 170, 170, 170, 170, 170, 170, 170, + 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, + 170, 170, 171, 170, 170, 172, 170, 170, 170, 170, + 170, 170, 170, 173, 173, 173, 173, 173, 173, 174, + 173, 175, 173, 176, 173, 177, 178, 178, 178, 179, + 179, 180, 179, 181, 181, 181, 182, 182, 182, 182, + 182, 182, 182, 182, 182, 182, 183, 183, 184, 185, + 185, 186, 186, 187, 187, 187, 187, 187, 187, 188, + 189, 188, 190, 190, 190, 190, 190, 190, 190, 190, + 191, 190, 192, 190, 193, 193, 194, 194, 195, 195, + 195, 195, 195, 196, 197, 197, 198, 198, 198, 198, + 198, 198, 198, 198, 199, 199, 200, 200, 200, 200, + 201, 201, 202, 203, 203, 204, 204, 206, 205, 207, + 205, 208, 209, 210, 210, 211, 211, 212, 212, 213, + 214, 214, 215, 215, 216, 217, 217, 218, 218, 219, + 219, 219, 221, 220, 222, 222, 222, 222, 222, 222, + 222, 222, 222, 222, 222, 222, 222, 222, 222, 222, + 222, 222, 222, 222, 222, 222, 222, 222, 222, 222, + 222, 222, 222, 222, 222, 222, 222, 222, 222, 222, + 222, 222, 222, 222, 222, 222, 222, 222, 222, 222, + 222, 223, 223, 224, 224, 225, 225, 226, 226, 227, + 227, 227, 227, 229, 230, 231, 232, 233, 228, 234, + 235, 236, 237, 238, 228, 239, 240, 228, 241, 228, + 242, 242, 242, 242, 242, 243, 243, 243, 244, 244, + 244, 244, 245, 245, 246, 246, 247, 247, 248, 248, + 249, 250, 251, 252, 249, 253, 254, 254, 256, 257, + 255, 258, 259, 259, 259, 260, 260, 262, 261, 263, + 263, 264, 265, 267, 266, 269, 268, 270, 270, 271, + 271, 271, 272, 272, 273, 273, 273, 273, 273, 274, + 274, 274, 274, 275, 274, 276, 274, 274, 274, 274, + 274, 274, 274, 277, 277 +}; + +/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ +static const yytype_uint8 yyr2[] = +{ + 0, 2, 2, 2, 2, 2, 2, 1, 0, 4, + 0, 2, 3, 0, 2, 4, 1, 1, 2, 1, + 4, 4, 3, 2, 4, 3, 4, 4, 4, 4, + 4, 2, 2, 2, 4, 4, 2, 2, 2, 2, + 0, 5, 2, 0, 3, 2, 0, 1, 3, 1, + 3, 0, 1, 3, 0, 2, 1, 2, 3, 0, + 2, 2, 0, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 4, 4, 4, 4, 8, 4, 1, + 1, 4, 0, 5, 4, 0, 5, 4, 4, 3, + 3, 6, 4, 1, 3, 2, 1, 3, 2, 0, + 5, 0, 7, 0, 6, 4, 2, 2, 0, 4, + 2, 0, 7, 1, 1, 1, 1, 5, 4, 4, + 7, 7, 7, 7, 8, 4, 1, 3, 4, 2, + 1, 3, 1, 1, 2, 3, 4, 4, 5, 1, + 0, 5, 2, 1, 1, 1, 4, 1, 4, 4, + 0, 8, 0, 5, 2, 1, 0, 1, 1, 1, + 1, 1, 1, 1, 2, 0, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 3, 3, 6, 6, + 1, 0, 4, 1, 0, 3, 1, 0, 7, 0, + 5, 3, 3, 0, 3, 1, 2, 1, 2, 4, + 4, 3, 3, 1, 4, 3, 0, 1, 1, 0, + 2, 3, 0, 2, 2, 3, 4, 2, 2, 2, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 5, 3, 3, 4, + 1, 1, 4, 4, 4, 4, 4, 4, 4, 6, + 6, 6, 4, 6, 4, 1, 6, 6, 6, 4, + 4, 3, 0, 4, 0, 4, 0, 4, 0, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 19, 0, + 0, 0, 0, 0, 18, 0, 0, 7, 0, 5, + 1, 1, 1, 1, 1, 3, 0, 2, 3, 2, + 6, 10, 2, 1, 0, 1, 2, 0, 0, 3, + 0, 0, 0, 0, 11, 4, 0, 2, 0, 0, + 6, 1, 0, 3, 5, 0, 3, 0, 2, 1, + 2, 4, 2, 0, 2, 0, 5, 1, 2, 4, + 5, 6, 1, 2, 0, 2, 4, 4, 8, 1, + 1, 3, 3, 0, 9, 0, 7, 1, 3, 1, + 3, 1, 3, 0, 1 +}; + +/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state + STATE-NUM when YYTABLE doesn't specify something else to do. Zero + means the default is an error. */ +static const yytype_uint16 yydefact[] = +{ + 0, 59, 10, 8, 333, 327, 0, 2, 62, 3, + 13, 6, 0, 4, 0, 5, 0, 1, 60, 11, + 0, 344, 0, 334, 337, 0, 328, 329, 0, 0, + 0, 0, 0, 79, 0, 80, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 207, 208, 0, + 0, 82, 0, 0, 0, 111, 0, 72, 61, 64, + 70, 0, 63, 66, 67, 68, 69, 65, 71, 0, + 16, 0, 0, 0, 0, 17, 0, 0, 0, 19, + 46, 0, 0, 0, 0, 0, 0, 51, 54, 0, + 0, 0, 350, 361, 349, 357, 359, 0, 0, 344, + 338, 357, 359, 0, 0, 330, 212, 173, 172, 171, + 170, 169, 168, 167, 166, 212, 108, 316, 0, 0, + 0, 0, 7, 85, 184, 0, 0, 0, 0, 0, + 0, 0, 0, 206, 209, 0, 0, 0, 0, 0, + 0, 54, 175, 174, 110, 0, 0, 40, 0, 240, + 255, 0, 0, 0, 0, 0, 0, 0, 0, 241, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 14, 0, 49, 31, + 47, 32, 18, 33, 23, 0, 36, 0, 37, 52, + 38, 39, 0, 42, 12, 9, 0, 0, 0, 0, + 345, 0, 0, 332, 176, 0, 177, 0, 0, 89, + 90, 0, 0, 62, 187, 0, 0, 181, 186, 0, + 0, 0, 0, 0, 0, 0, 201, 203, 181, 181, + 209, 0, 93, 96, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 13, 0, 0, 218, 214, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 217, 219, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 25, 0, 0, 45, 0, 0, + 0, 22, 0, 0, 56, 55, 355, 0, 0, 339, + 352, 362, 351, 358, 360, 0, 331, 213, 273, 105, + 0, 279, 285, 107, 106, 318, 315, 317, 0, 76, + 78, 335, 193, 189, 182, 180, 0, 0, 92, 73, + 74, 84, 109, 199, 200, 0, 204, 0, 209, 210, + 87, 99, 95, 98, 0, 0, 81, 0, 75, 212, + 212, 0, 88, 0, 27, 28, 43, 29, 30, 215, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 238, 237, 235, 234, 233, 228, 227, 231, 232, 230, + 229, 226, 225, 223, 224, 220, 221, 222, 15, 26, + 24, 50, 48, 44, 20, 21, 35, 34, 53, 57, + 0, 0, 346, 347, 0, 342, 340, 0, 296, 288, + 0, 296, 0, 0, 86, 0, 0, 184, 185, 0, + 202, 205, 211, 0, 103, 94, 97, 0, 83, 0, + 0, 0, 336, 41, 0, 248, 254, 0, 0, 252, + 0, 239, 216, 243, 242, 244, 245, 0, 0, 259, + 260, 247, 0, 246, 0, 58, 363, 360, 353, 343, + 341, 0, 0, 296, 0, 264, 108, 303, 0, 304, + 286, 321, 322, 0, 197, 0, 0, 195, 0, 0, + 91, 0, 0, 101, 178, 179, 0, 0, 0, 0, + 0, 0, 0, 0, 236, 364, 0, 0, 0, 290, + 291, 292, 293, 294, 297, 0, 0, 0, 0, 299, + 0, 266, 0, 302, 305, 264, 0, 325, 0, 319, + 0, 198, 194, 196, 0, 181, 190, 100, 0, 0, + 112, 249, 250, 251, 253, 256, 257, 258, 356, 0, + 363, 295, 0, 298, 0, 0, 268, 289, 268, 108, + 0, 322, 0, 0, 77, 212, 0, 104, 0, 348, + 0, 296, 0, 0, 0, 274, 280, 0, 0, 323, + 0, 320, 191, 0, 188, 102, 354, 0, 0, 263, + 0, 0, 272, 0, 287, 326, 322, 212, 0, 300, + 265, 0, 269, 270, 271, 0, 281, 324, 192, 0, + 267, 275, 310, 296, 156, 0, 0, 133, 115, 114, + 158, 159, 160, 161, 162, 0, 0, 0, 0, 0, + 143, 145, 150, 0, 0, 0, 144, 0, 116, 0, + 0, 139, 147, 155, 157, 0, 0, 0, 311, 282, + 301, 0, 0, 0, 152, 212, 0, 140, 0, 0, + 113, 0, 132, 181, 0, 134, 0, 0, 154, 276, + 212, 142, 0, 307, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 156, 0, 163, 0, 0, 126, 0, + 130, 0, 0, 135, 0, 181, 181, 0, 307, 0, + 156, 0, 262, 0, 0, 146, 0, 118, 0, 0, + 119, 125, 0, 149, 0, 113, 0, 0, 128, 0, + 129, 131, 137, 136, 181, 262, 148, 0, 306, 0, + 308, 0, 0, 0, 0, 0, 153, 0, 141, 127, + 117, 138, 308, 312, 0, 165, 0, 0, 0, 0, + 0, 0, 165, 308, 261, 212, 0, 283, 121, 120, + 0, 122, 123, 0, 277, 165, 164, 309, 181, 124, + 151, 181, 313, 284, 278, 181, 314 +}; + +/* YYDEFGOTO[NTERM-NUM]. */ +static const yytype_int16 yydefgoto[] = +{ + -1, 6, 123, 11, 12, 9, 10, 19, 90, 245, + 182, 181, 179, 190, 191, 192, 305, 7, 8, 18, + 58, 136, 213, 235, 443, 549, 502, 59, 207, 323, + 140, 648, 649, 699, 650, 701, 673, 651, 652, 697, + 653, 666, 693, 654, 655, 656, 694, 767, 115, 144, + 61, 704, 62, 216, 217, 218, 332, 437, 545, 594, + 436, 496, 497, 63, 64, 228, 65, 229, 66, 231, + 695, 205, 250, 740, 531, 566, 585, 615, 324, 428, + 602, 624, 708, 781, 430, 603, 622, 683, 778, 431, + 536, 486, 525, 484, 485, 489, 535, 712, 755, 625, + 682, 763, 785, 67, 208, 327, 432, 573, 492, 539, + 571, 15, 16, 26, 27, 103, 13, 14, 68, 69, + 23, 24, 427, 97, 98, 518, 421, 516 +}; + +/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing + STATE-NUM. */ +#define YYPACT_NINF -714 +static const yytype_int16 yypact[] = +{ + 247, -714, -714, -714, -714, -714, 79, -714, -714, -714, + -714, -714, 81, -714, -24, -714, 35, -714, 907, 1618, + 112, 103, 67, -24, -714, 109, 35, -714, 1006, 70, + 75, 188, 105, -714, 148, -714, 150, 171, 155, 195, + 205, 213, 217, 221, 224, 235, 239, -714, -714, 245, + 250, -714, 256, 265, 271, -714, 278, -714, -714, -714, + -714, 189, -714, -714, -714, -714, -714, -714, -714, 162, + -714, 313, 150, 318, 754, -714, 321, 326, 330, -714, + -714, 333, 336, 345, 754, 347, 350, 359, -714, 360, + 254, 754, -714, 365, -714, 369, 371, 332, 232, 103, + -714, -714, -714, 334, 244, -714, -714, -714, -714, -714, + -714, -714, -714, -714, -714, -714, -714, -714, 387, 391, + 393, 394, -714, -714, 43, 397, 398, 399, 150, 150, + 402, 150, 4, -714, 403, 41, 372, 150, 404, 410, + 378, -714, -714, -714, -714, 373, 32, -714, 45, -714, + -714, 754, 754, 754, 379, 392, 395, 400, 405, -714, + 414, 423, 424, 425, 426, 428, 430, 432, 433, 435, + 436, 437, 438, 439, 754, 754, 1432, 508, -714, 285, + -714, 291, 17, -714, -714, 595, 1795, 292, -714, -714, + 293, -714, 446, -714, -714, 1795, 382, 109, 109, 296, + 117, 383, 335, 117, -714, 754, -714, 258, 46, -714, + -714, -28, 319, -714, -714, 150, 419, -2, -714, 337, + 339, 342, 343, 348, 349, 352, -714, -714, 100, 108, + 25, 354, -714, -714, 444, 14, 41, 357, 476, 489, + 754, 363, -24, 754, 754, -714, 754, 754, -714, -714, + 1045, 754, 754, 754, 754, 754, 497, 500, 754, 509, + 514, 516, 517, 754, 754, 521, 522, 754, 754, 525, + -714, -714, 754, 754, 754, 754, 754, 754, 754, 754, + 754, 754, 754, 754, 754, 754, 754, 754, 754, 754, + 754, 754, 754, 754, 1795, 528, 529, -714, 531, 754, + 754, 1795, 356, 532, -714, 39, -714, 396, 406, -714, + -714, 533, -714, -714, -714, -64, -714, 1795, 1006, -714, + 150, -714, -714, -714, -714, -714, -714, -714, 537, -714, + -714, 223, 506, -714, -714, -714, 43, 540, -714, -714, + -714, -714, -714, -714, -714, 150, -714, 150, 403, -714, + -714, -714, -714, -714, 511, 48, -714, 18, -714, -714, + -714, 1452, -714, 36, 1795, 1795, 1641, 1795, 1795, -714, + 916, 1065, 1472, 1492, 1085, 408, 407, 1105, 409, 418, + 421, 429, 1512, 1532, 434, 440, 1125, 1559, 441, 1755, + 1639, 1811, 1826, 1840, 1853, 999, 999, 390, 390, 390, + 390, 314, 314, 163, 163, -714, -714, -714, 1795, 1795, + 1795, -714, -714, -714, 1795, 1795, -714, -714, -714, -714, + 545, 109, 133, 117, 496, -714, -714, -48, 633, -714, + 716, 633, 754, 412, -714, 2, 552, 43, -714, 449, + -714, -714, -714, 41, -714, -714, -714, 534, -714, 450, + 458, 569, -714, -714, 754, -714, -714, 754, 754, -714, + 754, -714, -714, -714, -714, -714, -714, 754, 754, -714, + -714, -714, 571, -714, 754, -714, 460, 561, -714, -714, + -714, 374, 541, 1667, 564, 480, -714, -714, 1775, 492, + -714, 1795, 28, 580, -714, 601, 3, -714, 515, 570, + -714, 31, 41, -714, -714, -714, 465, 1145, 1174, 1194, + 1214, 1234, 1254, 467, 1795, 117, 557, 109, 109, -714, + -714, -714, -714, -714, -714, 471, 754, 234, 602, -714, + 582, 583, 413, -714, -714, 480, 563, 590, 591, -714, + 484, -714, -714, -714, 624, 488, -714, -714, 78, 41, + -714, -714, -714, -714, -714, -714, -714, -714, -714, 491, + 460, -714, 1274, -714, 754, 603, 539, -714, 539, -714, + 754, 28, 754, 495, -714, -714, 548, -714, 86, 117, + 585, 236, 1303, 754, 607, -714, -714, 427, 1323, -714, + 1343, -714, -714, 639, -714, -714, -714, 613, 636, -714, + 1363, 754, 130, 598, -714, -714, 28, -714, 754, -714, + -714, 1383, -714, -714, -714, 604, -714, -714, -714, 1403, + -714, -714, -714, 621, 817, 51, 644, 877, -714, -714, + -714, -714, -714, -714, -714, 625, 628, 629, 150, 630, + -714, -714, -714, 631, 645, 646, -714, 84, -714, 651, + 12, -714, -714, -714, 817, 623, 653, 189, -714, -714, + -714, 242, 320, 82, -714, -714, 654, -714, 689, 82, + -714, 657, -714, -45, 84, 658, 84, 659, -714, -714, + -714, -714, 641, 674, 663, 664, 558, 665, 560, 669, + 671, 566, 576, 817, 577, -714, 754, 16, -714, -12, + -714, 22, 80, -714, 84, 135, -17, 84, 674, 578, + 817, 705, 627, 82, 82, -714, 82, -714, 82, 82, + -714, -714, 688, -714, 1579, 581, 584, 726, -714, 82, + -714, -714, -714, -714, 149, 627, -714, 673, -714, 708, + -714, 589, 592, 26, 594, 596, -714, 731, -714, -714, + -714, -714, -714, -714, 736, 104, 600, 605, 82, 606, + 611, 614, 104, -714, -714, -714, 745, -714, -714, -714, + 615, -714, -714, 189, -714, 104, -714, -714, 488, -714, + -714, 488, -714, -714, -714, 488, -714 +}; + +/* YYPGOTO[NTERM-NUM]. */ +static const yytype_int16 yypgoto[] = +{ + -714, -714, -68, -714, -714, -714, -714, 507, -714, -714, + -714, -714, -714, -714, 620, -714, -714, -714, -714, 549, + -714, -714, -714, -221, -714, -714, -714, -714, -444, -13, + -714, -105, -308, -714, -714, 47, -601, 68, -714, -714, + 110, -714, -714, -714, -653, -714, 1, -713, -714, -629, + -565, -216, -714, 340, -714, 442, -714, -714, -714, -714, + -714, -714, 274, -714, -714, -714, -714, -714, -714, -205, + -104, -714, -74, 37, 238, -714, 203, -714, -714, -714, + -714, -714, -714, -714, -714, -714, -714, -714, -714, -714, + -714, -714, -714, -459, 355, -714, -714, 71, -676, -714, + -714, -714, -714, -714, -714, -714, -714, -714, -714, -532, + -714, -714, -714, -714, 750, -714, -714, -714, -714, -714, + 546, -20, -714, 684, -11, -714, -714, 227 +}; + +/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If + positive, shift that token. If negative, reduce the rule which + number is the opposite. If zero, do what YYDEFACT says. + If YYTABLE_NINF, syntax error. */ +#define YYTABLE_NINF -336 +static const yytype_int16 yytable[] = +{ + 176, 336, 204, 100, 147, 60, 494, 494, 122, 727, + 186, 206, 345, 347, 104, 357, 675, 195, 352, 353, + 725, 297, 352, 353, 528, 349, 670, 628, 681, 230, + 670, 628, 537, 21, -183, 352, 353, 628, 243, 589, + 722, 628, 532, 419, 629, 232, 233, 214, 629, 774, + 325, 246, 445, 446, 629, 658, -183, 737, 629, 657, + 222, 223, 782, 225, 227, 425, 671, 636, 637, 237, + 671, 636, 637, 705, 617, 706, 762, 248, 249, 17, + 426, 479, 352, 353, 670, 20, 670, 775, 670, 657, + 352, 353, 25, 21, 452, 628, 480, 628, 335, 628, + 270, 271, 703, 294, 326, 22, 734, 92, 215, 659, + 765, 301, 629, 92, 629, 328, 629, 329, 91, 354, + 766, 310, 598, 354, 99, 587, 335, 116, 657, 538, + 733, 317, 117, 728, 684, 685, 354, 310, 671, 636, + 637, 335, 120, 442, 780, 657, 234, 333, 542, 226, + 495, 495, 645, 447, 122, 644, 645, 355, 676, 356, + 298, 355, 647, 448, 626, 22, 361, 729, 348, 364, + 365, 758, 367, 368, 355, 244, 547, 370, 371, 372, + 373, 374, 420, 354, 377, 121, 307, 308, 247, 382, + 383, 354, 125, 386, 387, 288, 289, 290, 389, 390, + 391, 392, 393, 394, 395, 396, 397, 398, 399, 400, + 401, 402, 403, 404, 405, 406, 407, 408, 409, 410, + 687, 355, 501, 577, 645, 414, 415, 28, 124, 355, + 93, 595, 126, 94, 95, 96, 93, 118, 119, 94, + 101, 102, 127, 335, 311, 344, 670, 312, 313, 314, + 128, 335, 429, 346, 129, 449, 450, 628, 130, 434, + 311, 131, 318, 312, 313, 477, 612, 613, 614, 29, + 30, 31, 132, 527, 629, 597, 133, 440, 335, 441, + 732, 548, 134, 32, 33, 34, 35, 135, 36, 37, + 38, 39, 335, 137, 751, 145, 684, 685, 40, 41, + 42, 43, 138, 519, 520, 521, 522, 523, 139, 44, + 45, 46, 47, 48, 49, 141, 319, 146, 60, 50, + 51, 52, 148, 320, 670, 177, 53, 54, 578, 576, + 178, 321, 142, 143, 180, 628, 43, 183, 55, 672, + 184, 686, 677, 100, 286, 287, 288, 289, 290, 185, + 56, 187, 629, 188, 483, 322, 488, 483, 491, 416, + 417, 53, 54, 189, 193, 194, 672, 57, 672, 196, + 1, 2, 3, 55, 689, 690, 200, 149, 150, 524, + 507, 4, 687, 508, 509, 197, 510, 198, 203, 5, + 199, 209, 202, 511, 512, 210, 731, 211, 212, 672, + 514, 219, 220, 221, 151, 152, 224, 230, 238, 236, + 476, 153, 154, 155, 239, 240, 251, 318, 284, 285, + 286, 287, 288, 289, 290, 156, 157, 158, 295, 252, + 242, 318, 253, 159, 296, 302, 303, 254, 160, 306, + 309, 315, 255, 519, 520, 521, 522, 523, 161, 567, + 304, 256, 562, 162, 163, 164, 165, 166, 167, 168, + 257, 258, 259, 260, 330, 261, 169, 262, 170, 263, + 264, 592, 265, 266, 267, 268, 269, 334, 320, 316, + 337, 351, 359, 171, 338, 604, 321, 339, 340, 172, + 582, 43, 320, 341, 342, 360, 588, 343, 590, 350, + 321, 375, 358, 618, 376, 43, 559, 560, 362, 600, + 322, 149, 150, 378, 292, 173, 53, 54, 379, 524, + 380, 381, 174, 175, 322, 384, 385, 611, 55, 388, + 53, 54, 411, 412, 619, 413, 418, 424, 151, 152, + 422, 433, 55, 435, 439, 153, 154, 155, 444, 475, + 423, 460, 461, 478, 463, 493, 688, 691, 692, 156, + 157, 158, 783, 464, 700, 784, 465, 159, 498, 786, + 664, 503, 160, 506, 466, 513, 709, 517, 526, 469, + 529, 530, 161, 534, 540, 470, 473, 162, 163, 164, + 165, 166, 167, 168, 500, 504, 730, 688, 149, 150, + 169, 299, 170, 505, 515, 541, 546, 544, 741, 742, + 550, 700, 557, 744, 745, 558, 561, 171, 563, 564, + 569, 565, 724, 172, 750, 151, 152, 570, 572, 574, + 575, 335, 153, 154, 155, 579, 149, 150, 730, 591, + 583, 584, 593, 596, 601, 607, 156, 157, 158, 173, + 608, 293, 609, 770, 159, 616, 174, 175, 527, 160, + 660, 621, 661, 151, 152, 662, 663, 665, 667, 161, + 481, 154, 155, 482, 162, 163, 164, 165, 166, 167, + 168, 679, 668, 669, 156, 157, 158, 169, 674, 170, + 680, 696, 159, 698, 702, -113, 707, 160, 710, 711, + 713, 714, 716, 715, 171, 717, 718, 161, 719, 738, + 172, 720, 162, 163, 164, 165, 166, 167, 168, 149, + 150, 721, 723, 736, 746, 169, -133, 170, 739, 748, + 749, 753, 487, 754, 756, 761, 173, 757, 300, 759, + 764, 760, 171, 174, 175, 768, 151, 152, 172, 777, + 769, 771, 366, 153, 154, 155, 772, 149, 150, 773, + 779, 241, 331, 743, 678, 726, 776, 156, 157, 158, + 543, 586, 752, 568, 173, 159, 105, 499, 438, 735, + 160, 174, 175, 201, 151, 152, 490, 580, 363, 0, + 161, 153, 154, 155, 0, 162, 163, 164, 165, 166, + 167, 168, 0, 0, 0, 156, 157, 158, 169, 0, + 170, 0, 0, 159, 0, 0, 0, 0, 160, 0, + 0, 627, 0, 0, 0, 171, 0, 0, 161, 0, + 0, 172, 628, 162, 163, 164, 165, 166, 167, 168, + 0, 0, 0, 0, 0, 0, 169, 0, 170, 629, + 0, 0, 0, 0, 0, 0, 0, 173, 630, 631, + 632, 633, 634, 171, 174, 175, 0, 0, 0, 172, + 0, 635, 636, 637, 0, 0, 0, 0, 0, 0, + 0, 0, 638, 106, 107, 108, 109, 110, 111, 112, + 113, 114, 0, 0, 0, 173, 0, 0, 0, 0, + 0, 0, 174, 175, 0, 0, 0, 0, 0, 0, + 639, 28, 640, 0, -113, 0, 641, 0, 0, 0, + 53, 54, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 272, 642, 273, 274, 275, 276, 277, 278, 279, + 280, 281, 282, 283, 284, 285, 286, 287, 288, 289, + 290, 0, 643, 29, 30, 31, 644, 645, 0, 0, + 0, 646, 0, 647, 0, 0, 0, 32, 33, 34, + 35, 0, 36, 37, 38, 39, 0, 0, 0, 0, + 0, 0, 40, 41, 42, 43, 0, 0, 0, 0, + 0, 0, 0, 44, 45, 46, 47, 48, 49, 0, + 0, 0, 0, 50, 51, 52, 0, 0, 0, 0, + 53, 54, 106, 107, 108, 109, 110, 111, 112, 113, + 114, 0, 55, 280, 281, 282, 283, 284, 285, 286, + 287, 288, 289, 290, 56, 0, 0, 0, 0, 0, + -335, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 57, 0, 0, 0, 0, 0, 0, 0, 454, + 272, 455, 273, 274, 275, 276, 277, 278, 279, 280, + 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, + 272, 0, 273, 274, 275, 276, 277, 278, 279, 280, + 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, + 272, 0, 273, 274, 275, 276, 277, 278, 279, 280, + 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, + 272, 0, 273, 274, 275, 276, 277, 278, 279, 280, + 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, + 272, 0, 273, 274, 275, 276, 277, 278, 279, 280, + 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, + 272, 0, 273, 274, 275, 276, 277, 278, 279, 280, + 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 272, + 369, 273, 274, 275, 276, 277, 278, 279, 280, 281, + 282, 283, 284, 285, 286, 287, 288, 289, 290, 272, + 456, 273, 274, 275, 276, 277, 278, 279, 280, 281, + 282, 283, 284, 285, 286, 287, 288, 289, 290, 272, + 459, 273, 274, 275, 276, 277, 278, 279, 280, 281, + 282, 283, 284, 285, 286, 287, 288, 289, 290, 272, + 462, 273, 274, 275, 276, 277, 278, 279, 280, 281, + 282, 283, 284, 285, 286, 287, 288, 289, 290, 272, + 471, 273, 274, 275, 276, 277, 278, 279, 280, 281, + 282, 283, 284, 285, 286, 287, 288, 289, 290, 272, + 551, 273, 274, 275, 276, 277, 278, 279, 280, 281, + 282, 283, 284, 285, 286, 287, 288, 289, 290, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 272, 552, + 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, + 283, 284, 285, 286, 287, 288, 289, 290, 272, 553, + 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, + 283, 284, 285, 286, 287, 288, 289, 290, 272, 554, + 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, + 283, 284, 285, 286, 287, 288, 289, 290, 272, 555, + 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, + 283, 284, 285, 286, 287, 288, 289, 290, 272, 556, + 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, + 283, 284, 285, 286, 287, 288, 289, 290, 272, 581, + 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, + 283, 284, 285, 286, 287, 288, 289, 290, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 272, 599, 273, + 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, + 284, 285, 286, 287, 288, 289, 290, 272, 605, 273, + 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, + 284, 285, 286, 287, 288, 289, 290, 272, 606, 273, + 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, + 284, 285, 286, 287, 288, 289, 290, 272, 610, 273, + 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, + 284, 285, 286, 287, 288, 289, 290, 272, 620, 273, + 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, + 284, 285, 286, 287, 288, 289, 290, 272, 623, 273, + 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, + 284, 285, 286, 287, 288, 289, 290, 0, 0, 0, + 0, 0, 0, 0, 272, 291, 273, 274, 275, 276, + 277, 278, 279, 280, 281, 282, 283, 284, 285, 286, + 287, 288, 289, 290, 272, 451, 273, 274, 275, 276, + 277, 278, 279, 280, 281, 282, 283, 284, 285, 286, + 287, 288, 289, 290, 0, 457, 0, 0, 0, 0, + 0, 0, 70, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 458, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 70, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 467, 71, 274, 275, 276, + 277, 278, 279, 280, 281, 282, 283, 284, 285, 286, + 287, 288, 289, 290, 0, 468, 0, 453, 0, 71, + 0, 0, 272, 72, 273, 274, 275, 276, 277, 278, + 279, 280, 281, 282, 283, 284, 285, 286, 287, 288, + 289, 290, 472, 0, 527, 0, 72, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 73, 0, + 0, 0, 747, 0, 74, 75, 76, 77, 78, -43, + 79, 80, 81, 0, 82, 83, 0, 84, 85, 86, + 0, 73, 0, 0, 87, 88, 89, 74, 75, 76, + 77, 78, 0, 79, 80, 81, 0, 82, 83, 0, + 84, 85, 86, 0, 0, 0, 0, 87, 88, 89, + 272, 474, 273, 274, 275, 276, 277, 278, 279, 280, + 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, + 272, 533, 273, 274, 275, 276, 277, 278, 279, 280, + 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, + 272, 0, 273, 274, 275, 276, 277, 278, 279, 280, + 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, + 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, + 285, 286, 287, 288, 289, 290, 276, 277, 278, 279, + 280, 281, 282, 283, 284, 285, 286, 287, 288, 289, + 290, 277, 278, 279, 280, 281, 282, 283, 284, 285, + 286, 287, 288, 289, 290, 278, 279, 280, 281, 282, + 283, 284, 285, 286, 287, 288, 289, 290 +}; + +static const yytype_int16 yycheck[] = +{ + 74, 217, 106, 23, 72, 18, 4, 4, 4, 21, + 84, 115, 228, 229, 25, 236, 4, 91, 4, 5, + 4, 4, 4, 5, 483, 230, 4, 15, 657, 4, + 4, 15, 4, 57, 36, 4, 5, 15, 6, 571, + 693, 15, 486, 4, 32, 4, 5, 4, 32, 762, + 4, 6, 4, 5, 32, 4, 58, 710, 32, 624, + 128, 129, 775, 131, 132, 129, 54, 55, 56, 137, + 54, 55, 56, 674, 606, 676, 752, 151, 152, 0, + 144, 129, 4, 5, 4, 4, 4, 763, 4, 654, + 4, 5, 57, 57, 58, 15, 144, 15, 143, 15, + 174, 175, 147, 177, 58, 129, 707, 4, 65, 58, + 6, 185, 32, 4, 32, 143, 32, 145, 6, 105, + 16, 4, 581, 105, 57, 569, 143, 57, 693, 101, + 147, 205, 57, 145, 54, 55, 105, 4, 54, 55, + 56, 143, 37, 348, 773, 710, 105, 215, 145, 145, + 148, 148, 140, 105, 4, 139, 140, 143, 146, 145, + 143, 143, 146, 145, 623, 129, 240, 145, 143, 243, + 244, 145, 246, 247, 143, 143, 145, 251, 252, 253, + 254, 255, 143, 105, 258, 37, 197, 198, 143, 263, + 264, 105, 37, 267, 268, 32, 33, 34, 272, 273, + 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, + 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, + 140, 143, 443, 145, 140, 299, 300, 4, 57, 143, + 127, 145, 37, 130, 131, 132, 127, 49, 50, 130, + 131, 132, 37, 143, 127, 145, 4, 130, 131, 132, + 37, 143, 320, 145, 37, 359, 360, 15, 37, 36, + 127, 37, 4, 130, 131, 132, 136, 137, 138, 46, + 47, 48, 37, 37, 32, 39, 37, 345, 143, 347, + 145, 502, 37, 60, 61, 62, 63, 37, 65, 66, + 67, 68, 143, 37, 145, 133, 54, 55, 75, 76, + 77, 78, 37, 69, 70, 71, 72, 73, 37, 86, + 87, 88, 89, 90, 91, 37, 58, 4, 331, 96, + 97, 98, 4, 65, 4, 4, 103, 104, 549, 545, + 4, 73, 143, 144, 4, 15, 78, 4, 115, 647, + 4, 99, 650, 363, 30, 31, 32, 33, 34, 4, + 127, 4, 32, 3, 428, 97, 430, 431, 432, 3, + 4, 103, 104, 4, 4, 111, 674, 144, 676, 4, + 123, 124, 125, 115, 54, 55, 144, 3, 4, 145, + 454, 134, 140, 457, 458, 16, 460, 16, 144, 142, + 58, 4, 58, 467, 468, 4, 704, 4, 4, 707, + 474, 4, 4, 4, 30, 31, 4, 4, 4, 37, + 421, 37, 38, 39, 4, 37, 37, 4, 28, 29, + 30, 31, 32, 33, 34, 51, 52, 53, 143, 37, + 57, 4, 37, 59, 143, 143, 143, 37, 64, 57, + 144, 58, 37, 69, 70, 71, 72, 73, 74, 36, + 4, 37, 526, 79, 80, 81, 82, 83, 84, 85, + 37, 37, 37, 37, 145, 37, 92, 37, 94, 37, + 37, 575, 37, 37, 37, 37, 37, 58, 65, 144, + 143, 37, 6, 109, 145, 58, 73, 145, 145, 115, + 564, 78, 65, 145, 145, 6, 570, 145, 572, 145, + 73, 4, 145, 607, 4, 78, 517, 518, 145, 583, + 97, 3, 4, 4, 6, 141, 103, 104, 4, 145, + 4, 4, 148, 149, 97, 4, 4, 601, 115, 4, + 103, 104, 4, 4, 608, 4, 4, 4, 30, 31, + 144, 4, 115, 37, 4, 37, 38, 39, 37, 4, + 144, 143, 145, 57, 145, 143, 661, 662, 663, 51, + 52, 53, 778, 145, 669, 781, 145, 59, 16, 785, + 638, 37, 64, 4, 145, 4, 680, 16, 37, 145, + 16, 101, 74, 91, 4, 145, 145, 79, 80, 81, + 82, 83, 84, 85, 145, 145, 701, 702, 3, 4, + 92, 6, 94, 145, 144, 4, 36, 92, 713, 714, + 145, 716, 145, 718, 719, 58, 145, 109, 16, 37, + 57, 38, 696, 115, 729, 30, 31, 37, 37, 145, + 6, 143, 37, 38, 39, 144, 3, 4, 743, 144, + 37, 102, 94, 58, 37, 6, 51, 52, 53, 141, + 37, 143, 16, 758, 59, 57, 148, 149, 37, 64, + 16, 57, 37, 30, 31, 37, 37, 37, 37, 74, + 37, 38, 39, 40, 79, 80, 81, 82, 83, 84, + 85, 58, 37, 37, 51, 52, 53, 92, 37, 94, + 37, 37, 59, 4, 37, 37, 37, 64, 57, 25, + 37, 37, 37, 145, 109, 145, 37, 74, 37, 4, + 115, 145, 79, 80, 81, 82, 83, 84, 85, 3, + 4, 145, 145, 145, 36, 92, 145, 94, 101, 145, + 4, 58, 16, 25, 145, 4, 141, 145, 143, 145, + 4, 145, 109, 148, 149, 145, 30, 31, 115, 4, + 145, 145, 245, 37, 38, 39, 145, 3, 4, 145, + 145, 141, 213, 716, 654, 697, 765, 51, 52, 53, + 496, 568, 735, 535, 141, 59, 26, 437, 336, 708, + 64, 148, 149, 99, 30, 31, 431, 560, 242, -1, + 74, 37, 38, 39, -1, 79, 80, 81, 82, 83, + 84, 85, -1, -1, -1, 51, 52, 53, 92, -1, + 94, -1, -1, 59, -1, -1, -1, -1, 64, -1, + -1, 4, -1, -1, -1, 109, -1, -1, 74, -1, + -1, 115, 15, 79, 80, 81, 82, 83, 84, 85, + -1, -1, -1, -1, -1, -1, 92, -1, 94, 32, + -1, -1, -1, -1, -1, -1, -1, 141, 41, 42, + 43, 44, 45, 109, 148, 149, -1, -1, -1, 115, + -1, 54, 55, 56, -1, -1, -1, -1, -1, -1, + -1, -1, 65, 6, 7, 8, 9, 10, 11, 12, + 13, 14, -1, -1, -1, 141, -1, -1, -1, -1, + -1, -1, 148, 149, -1, -1, -1, -1, -1, -1, + 93, 4, 95, -1, 37, -1, 99, -1, -1, -1, + 103, 104, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 15, 115, 17, 18, 19, 20, 21, 22, 23, + 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, + 34, -1, 135, 46, 47, 48, 139, 140, -1, -1, + -1, 144, -1, 146, -1, -1, -1, 60, 61, 62, + 63, -1, 65, 66, 67, 68, -1, -1, -1, -1, + -1, -1, 75, 76, 77, 78, -1, -1, -1, -1, + -1, -1, -1, 86, 87, 88, 89, 90, 91, -1, + -1, -1, -1, 96, 97, 98, -1, -1, -1, -1, + 103, 104, 6, 7, 8, 9, 10, 11, 12, 13, + 14, -1, 115, 24, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 34, 127, -1, -1, -1, -1, -1, + 133, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 144, -1, -1, -1, -1, -1, -1, -1, 143, + 15, 145, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 15, -1, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 15, -1, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 15, -1, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 15, -1, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 15, -1, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 15, + 145, 17, 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 33, 34, 15, + 145, 17, 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 33, 34, 15, + 145, 17, 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 33, 34, 15, + 145, 17, 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 33, 34, 15, + 145, 17, 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 33, 34, 15, + 145, 17, 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 33, 34, -1, + -1, -1, -1, -1, -1, -1, -1, -1, 15, 145, + 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, + 27, 28, 29, 30, 31, 32, 33, 34, 15, 145, + 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, + 27, 28, 29, 30, 31, 32, 33, 34, 15, 145, + 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, + 27, 28, 29, 30, 31, 32, 33, 34, 15, 145, + 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, + 27, 28, 29, 30, 31, 32, 33, 34, 15, 145, + 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, + 27, 28, 29, 30, 31, 32, 33, 34, 15, 145, + 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, + 27, 28, 29, 30, 31, 32, 33, 34, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 15, 145, 17, + 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 34, 15, 145, 17, + 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 34, 15, 145, 17, + 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 34, 15, 145, 17, + 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 34, 15, 145, 17, + 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 34, 15, 145, 17, + 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 34, -1, -1, -1, + -1, -1, -1, -1, 15, 143, 17, 18, 19, 20, + 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 34, 15, 143, 17, 18, 19, 20, + 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 34, -1, 143, -1, -1, -1, -1, + -1, -1, 4, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 143, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 4, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 143, 38, 18, 19, 20, + 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 34, -1, 143, -1, 36, -1, 38, + -1, -1, 15, 65, 17, 18, 19, 20, 21, 22, + 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, + 33, 34, 143, -1, 37, -1, 65, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, 100, -1, + -1, -1, 143, -1, 106, 107, 108, 109, 110, 111, + 112, 113, 114, -1, 116, 117, -1, 119, 120, 121, + -1, 100, -1, -1, 126, 127, 128, 106, 107, 108, + 109, 110, -1, 112, 113, 114, -1, 116, 117, -1, + 119, 120, 121, -1, -1, -1, -1, 126, 127, 128, + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 15, -1, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, + 29, 30, 31, 32, 33, 34, 20, 21, 22, 23, + 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, + 34, 21, 22, 23, 24, 25, 26, 27, 28, 29, + 30, 31, 32, 33, 34, 22, 23, 24, 25, 26, + 27, 28, 29, 30, 31, 32, 33, 34 +}; + +/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing + symbol of state STATE-NUM. */ +static const yytype_uint16 yystos[] = +{ + 0, 123, 124, 125, 134, 142, 151, 167, 168, 155, + 156, 153, 154, 266, 267, 261, 262, 0, 169, 157, + 4, 57, 129, 270, 271, 57, 263, 264, 4, 46, + 47, 48, 60, 61, 62, 63, 65, 66, 67, 68, + 75, 76, 77, 78, 86, 87, 88, 89, 90, 91, + 96, 97, 98, 103, 104, 115, 127, 144, 170, 177, + 179, 200, 202, 213, 214, 216, 218, 253, 268, 269, + 4, 38, 65, 100, 106, 107, 108, 109, 110, 112, + 113, 114, 116, 117, 119, 120, 121, 126, 127, 128, + 158, 6, 4, 127, 130, 131, 132, 273, 274, 57, + 271, 131, 132, 265, 274, 264, 6, 7, 8, 9, + 10, 11, 12, 13, 14, 198, 57, 57, 49, 50, + 37, 37, 4, 152, 57, 37, 37, 37, 37, 37, + 37, 37, 37, 37, 37, 37, 171, 37, 37, 37, + 180, 37, 143, 144, 199, 133, 4, 152, 4, 3, + 4, 30, 31, 37, 38, 39, 51, 52, 53, 59, + 64, 74, 79, 80, 81, 82, 83, 84, 85, 92, + 94, 109, 115, 141, 148, 149, 222, 4, 4, 162, + 4, 161, 160, 4, 4, 4, 222, 4, 3, 4, + 163, 164, 165, 4, 111, 222, 4, 16, 16, 58, + 144, 273, 58, 144, 220, 221, 220, 178, 254, 4, + 4, 4, 4, 172, 4, 65, 203, 204, 205, 4, + 4, 4, 152, 152, 4, 152, 145, 152, 215, 217, + 4, 219, 4, 5, 105, 173, 37, 152, 4, 4, + 37, 164, 57, 6, 143, 159, 6, 143, 222, 222, + 222, 37, 37, 37, 37, 37, 37, 37, 37, 37, + 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, + 222, 222, 15, 17, 18, 19, 20, 21, 22, 23, + 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, + 34, 143, 6, 143, 222, 143, 143, 4, 143, 6, + 143, 222, 143, 143, 4, 166, 57, 274, 274, 144, + 4, 127, 130, 131, 132, 58, 144, 222, 4, 58, + 65, 73, 97, 179, 228, 4, 58, 255, 143, 145, + 145, 169, 206, 152, 58, 143, 201, 143, 145, 145, + 145, 145, 145, 145, 145, 201, 145, 201, 143, 219, + 145, 37, 4, 5, 105, 143, 145, 173, 145, 6, + 6, 222, 145, 270, 222, 222, 157, 222, 222, 145, + 222, 222, 222, 222, 222, 4, 4, 222, 4, 4, + 4, 4, 222, 222, 4, 4, 222, 222, 4, 222, + 222, 222, 222, 222, 222, 222, 222, 222, 222, 222, + 222, 222, 222, 222, 222, 222, 222, 222, 222, 222, + 222, 4, 4, 4, 222, 222, 3, 4, 4, 4, + 143, 276, 144, 144, 4, 129, 144, 272, 229, 152, + 234, 239, 256, 4, 36, 37, 210, 207, 205, 4, + 152, 152, 219, 174, 37, 4, 5, 105, 145, 220, + 220, 143, 58, 36, 143, 145, 145, 143, 143, 145, + 143, 145, 145, 145, 145, 145, 145, 143, 143, 145, + 145, 145, 143, 145, 16, 4, 274, 132, 57, 129, + 144, 37, 40, 222, 243, 244, 241, 16, 222, 245, + 244, 222, 258, 143, 4, 148, 211, 212, 16, 203, + 145, 173, 176, 37, 145, 145, 4, 222, 222, 222, + 222, 222, 222, 4, 222, 144, 277, 16, 275, 69, + 70, 71, 72, 73, 145, 242, 37, 37, 243, 16, + 101, 224, 178, 16, 91, 246, 240, 4, 101, 259, + 4, 4, 145, 212, 92, 208, 36, 145, 173, 175, + 145, 145, 145, 145, 145, 145, 145, 145, 58, 274, + 274, 145, 222, 16, 37, 38, 225, 36, 224, 57, + 37, 260, 37, 257, 145, 6, 201, 145, 173, 144, + 277, 145, 222, 37, 102, 226, 226, 178, 222, 259, + 222, 144, 220, 94, 209, 145, 58, 39, 243, 145, + 222, 37, 230, 235, 58, 145, 145, 6, 37, 16, + 145, 222, 136, 137, 138, 227, 57, 259, 220, 222, + 145, 57, 236, 145, 231, 249, 243, 4, 15, 32, + 41, 42, 43, 44, 45, 54, 55, 56, 65, 93, + 95, 99, 115, 135, 139, 140, 144, 146, 181, 182, + 184, 187, 188, 190, 193, 194, 195, 200, 4, 58, + 16, 37, 37, 37, 152, 37, 191, 37, 37, 37, + 4, 54, 182, 186, 37, 4, 146, 182, 190, 58, + 37, 199, 250, 237, 54, 55, 99, 140, 181, 54, + 55, 181, 181, 192, 196, 220, 37, 189, 4, 183, + 181, 185, 37, 147, 201, 186, 186, 37, 232, 220, + 57, 25, 247, 37, 37, 145, 37, 145, 37, 37, + 145, 145, 194, 145, 222, 4, 187, 21, 145, 145, + 181, 182, 145, 147, 186, 247, 145, 194, 4, 101, + 223, 181, 181, 185, 181, 181, 36, 143, 145, 4, + 181, 145, 223, 58, 25, 248, 145, 145, 145, 145, + 145, 4, 248, 251, 4, 6, 16, 197, 145, 145, + 181, 145, 145, 145, 197, 248, 196, 4, 238, 145, + 199, 233, 197, 201, 201, 252, 201 +}; + +#define yyerrok (yyerrstatus = 0) +#define yyclearin (yychar = YYEMPTY) +#define YYEMPTY (-2) +#define YYEOF 0 + +#define YYACCEPT goto yyacceptlab +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab + + +/* Like YYERROR except do call yyerror. This remains here temporarily + to ease the transition to the new meaning of YYERROR, for GCC. + Once GCC version 2 has supplanted version 1, this can go. */ + +#define YYFAIL goto yyerrlab + +#define YYRECOVERING() (!!yyerrstatus) + +#define YYBACKUP(Token, Value) \ +do \ + if (yychar == YYEMPTY && yylen == 1) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ + YYPOPSTACK (1); \ + goto yybackup; \ + } \ + else \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ +while (YYID (0)) + + +#define YYTERROR 1 +#define YYERRCODE 256 + + +/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. + If N is 0, then set CURRENT to the empty location which ends + the previous symbol: RHS[0] (always defined). */ + +#define YYRHSLOC(Rhs, K) ((Rhs)[K]) +#ifndef YYLLOC_DEFAULT +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ + if (YYID (N)) \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ + while (YYID (0)) +#endif + + +/* YY_LOCATION_PRINT -- Print the location on the stream. + This macro was not mandated originally: define only if we know + we won't break user code: when these are the locations we know. */ + +#ifndef YY_LOCATION_PRINT +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) +# else +# define YY_LOCATION_PRINT(File, Loc) ((void) 0) +# endif +#endif + + +/* YYLEX -- calling `yylex' with the right arguments. */ + +#ifdef YYLEX_PARAM +# define YYLEX yylex (YYLEX_PARAM) +#else +# define YYLEX yylex () +#endif + +/* Enable debugging if requested. */ +#if YYDEBUG + +# ifndef YYFPRINTF +# include /* INFRINGES ON USER NAME SPACE */ +# define YYFPRINTF fprintf +# endif + +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ +} while (YYID (0)) + +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yy_symbol_print (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ +} while (YYID (0)) + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_value_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (!yyvaluep) + return; +# ifdef YYPRINT + if (yytype < YYNTOKENS) + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# else + YYUSE (yyoutput); +# endif + switch (yytype) + { + default: + break; + } +} + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (yytype < YYNTOKENS) + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + else + YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + + yy_symbol_value_print (yyoutput, yytype, yyvaluep); + YYFPRINTF (yyoutput, ")"); +} + +/*------------------------------------------------------------------. +| yy_stack_print -- Print the state stack from its BOTTOM up to its | +| TOP (included). | +`------------------------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_stack_print (yytype_int16 *bottom, yytype_int16 *top) +#else +static void +yy_stack_print (bottom, top) + yytype_int16 *bottom; + yytype_int16 *top; +#endif +{ + YYFPRINTF (stderr, "Stack now"); + for (; bottom <= top; ++bottom) + YYFPRINTF (stderr, " %d", *bottom); + YYFPRINTF (stderr, "\n"); +} + +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ +} while (YYID (0)) + + +/*------------------------------------------------. +| Report that the YYRULE is going to be reduced. | +`------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_reduce_print (YYSTYPE *yyvsp, int yyrule) +#else +static void +yy_reduce_print (yyvsp, yyrule) + YYSTYPE *yyvsp; + int yyrule; +#endif +{ + int yynrhs = yyr2[yyrule]; + int yyi; + unsigned long int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", + yyrule - 1, yylno); + /* The symbols being reduced. */ + for (yyi = 0; yyi < yynrhs; yyi++) + { + fprintf (stderr, " $%d = ", yyi + 1); + yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], + &(yyvsp[(yyi + 1) - (yynrhs)]) + ); + fprintf (stderr, "\n"); + } +} + +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ + yy_reduce_print (yyvsp, Rule); \ +} while (YYID (0)) + +/* Nonzero means print parse trace. It is left uninitialized so that + multiple parsers can coexist. */ +int yydebug; +#else /* !YYDEBUG */ +# define YYDPRINTF(Args) +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YY_STACK_PRINT(Bottom, Top) +# define YY_REDUCE_PRINT(Rule) +#endif /* !YYDEBUG */ + + +/* YYINITDEPTH -- initial size of the parser's stacks. */ +#ifndef YYINITDEPTH +# define YYINITDEPTH 200 +#endif + +/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only + if the built-in stack extension method is used). + + Do not make this value too large; the results are undefined if + YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + evaluated with infinite-precision integer arithmetic. */ + +#ifndef YYMAXDEPTH +# define YYMAXDEPTH 10000 +#endif + + + +#if YYERROR_VERBOSE + +# ifndef yystrlen +# if defined __GLIBC__ && defined _STRING_H +# define yystrlen strlen +# else +/* Return the length of YYSTR. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static YYSIZE_T +yystrlen (const char *yystr) +#else +static YYSIZE_T +yystrlen (yystr) + const char *yystr; +#endif +{ + YYSIZE_T yylen; + for (yylen = 0; yystr[yylen]; yylen++) + continue; + return yylen; +} +# endif +# endif + +# ifndef yystpcpy +# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE +# define yystpcpy stpcpy +# else +/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in + YYDEST. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static char * +yystpcpy (char *yydest, const char *yysrc) +#else +static char * +yystpcpy (yydest, yysrc) + char *yydest; + const char *yysrc; +#endif +{ + char *yyd = yydest; + const char *yys = yysrc; + + while ((*yyd++ = *yys++) != '\0') + continue; + + return yyd - 1; +} +# endif +# endif + +# ifndef yytnamerr +/* Copy to YYRES the contents of YYSTR after stripping away unnecessary + quotes and backslashes, so that it's suitable for yyerror. The + heuristic is that double-quoting is unnecessary unless the string + contains an apostrophe, a comma, or backslash (other than + backslash-backslash). YYSTR is taken from yytname. If YYRES is + null, do not copy; instead, return the length of what the result + would have been. */ +static YYSIZE_T +yytnamerr (char *yyres, const char *yystr) +{ + if (*yystr == '"') + { + YYSIZE_T yyn = 0; + char const *yyp = yystr; + + for (;;) + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; + + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; + + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } + do_not_strip_quotes: ; + } + + if (! yyres) + return yystrlen (yystr); + + return yystpcpy (yyres, yystr) - yyres; +} +# endif + +/* Copy into YYRESULT an error message about the unexpected token + YYCHAR while in state YYSTATE. Return the number of bytes copied, + including the terminating null byte. If YYRESULT is null, do not + copy anything; just return the number of bytes that would be + copied. As a special case, return 0 if an ordinary "syntax error" + message will do. Return YYSIZE_MAXIMUM if overflow occurs during + size calculation. */ +static YYSIZE_T +yysyntax_error (char *yyresult, int yystate, int yychar) +{ + int yyn = yypact[yystate]; + + if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) + return 0; + else + { + int yytype = YYTRANSLATE (yychar); + YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); + YYSIZE_T yysize = yysize0; + YYSIZE_T yysize1; + int yysize_overflow = 0; + enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; + char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + int yyx; + +# if 0 + /* This is so xgettext sees the translatable formats that are + constructed on the fly. */ + YY_("syntax error, unexpected %s"); + YY_("syntax error, unexpected %s, expecting %s"); + YY_("syntax error, unexpected %s, expecting %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); +# endif + char *yyfmt; + char const *yyf; + static char const yyunexpected[] = "syntax error, unexpected %s"; + static char const yyexpecting[] = ", expecting %s"; + static char const yyor[] = " or %s"; + char yyformat[sizeof yyunexpected + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; + char const *yyprefix = yyexpecting; + + /* Start YYX at -YYN if negative to avoid negative indexes in + YYCHECK. */ + int yyxbegin = yyn < 0 ? -yyn : 0; + + /* Stay within bounds of both yycheck and yytname. */ + int yychecklim = YYLAST - yyn + 1; + int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; + int yycount = 1; + + yyarg[0] = yytname[yytype]; + yyfmt = yystpcpy (yyformat, yyunexpected); + + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } + + yyf = YY_(yyformat); + yysize1 = yysize + yystrlen (yyf); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + + if (yysize_overflow) + return YYSIZE_MAXIMUM; + + if (yyresult) + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yyresult; + int yyi = 0; + while ((*yyp = *yyf) != '\0') + { + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } + } + } + return yysize; + } +} +#endif /* YYERROR_VERBOSE */ + + +/*-----------------------------------------------. +| Release the memory associated to this symbol. | +`-----------------------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +#else +static void +yydestruct (yymsg, yytype, yyvaluep) + const char *yymsg; + int yytype; + YYSTYPE *yyvaluep; +#endif +{ + YYUSE (yyvaluep); + + if (!yymsg) + yymsg = "Deleting"; + YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); + + switch (yytype) + { + + default: + break; + } +} + + +/* Prevent warnings from -Wmissing-prototypes. */ + +#ifdef YYPARSE_PARAM +#if defined __STDC__ || defined __cplusplus +int yyparse (void *YYPARSE_PARAM); +#else +int yyparse (); +#endif +#else /* ! YYPARSE_PARAM */ +#if defined __STDC__ || defined __cplusplus +int yyparse (void); +#else +int yyparse (); +#endif +#endif /* ! YYPARSE_PARAM */ + + + +/* The look-ahead symbol. */ +int yychar; + +/* The semantic value of the look-ahead symbol. */ +YYSTYPE yylval; + +/* Number of syntax errors so far. */ +int yynerrs; + + + +/*----------. +| yyparse. | +`----------*/ + +#ifdef YYPARSE_PARAM +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void *YYPARSE_PARAM) +#else +int +yyparse (YYPARSE_PARAM) + void *YYPARSE_PARAM; +#endif +#else /* ! YYPARSE_PARAM */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void) +#else +int +yyparse () + +#endif +#endif +{ + + int yystate; + int yyn; + int yyresult; + /* Number of tokens to shift before error messages enabled. */ + int yyerrstatus; + /* Look-ahead token as an internal (translated) token number. */ + int yytoken = 0; +#if YYERROR_VERBOSE + /* Buffer for error messages, and its allocated size. */ + char yymsgbuf[128]; + char *yymsg = yymsgbuf; + YYSIZE_T yymsg_alloc = sizeof yymsgbuf; +#endif + + /* Three stacks and their tools: + `yyss': related to states, + `yyvs': related to semantic values, + `yyls': related to locations. + + Refer to the stacks thru separate pointers, to allow yyoverflow + to reallocate them elsewhere. */ + + /* The state stack. */ + yytype_int16 yyssa[YYINITDEPTH]; + yytype_int16 *yyss = yyssa; + yytype_int16 *yyssp; + + /* The semantic value stack. */ + YYSTYPE yyvsa[YYINITDEPTH]; + YYSTYPE *yyvs = yyvsa; + YYSTYPE *yyvsp; + + + +#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) + + YYSIZE_T yystacksize = YYINITDEPTH; + + /* The variables used to return semantic value and location from the + action routines. */ + YYSTYPE yyval; + + + /* The number of symbols on the RHS of the reduced rule. + Keep to zero when no symbol should be popped. */ + int yylen = 0; + + YYDPRINTF ((stderr, "Starting parse\n")); + + yystate = 0; + yyerrstatus = 0; + yynerrs = 0; + yychar = YYEMPTY; /* Cause a token to be read. */ + + /* Initialize stack pointers. + Waste one element of value and location stack + so that they stay on the same level as the state stack. + The wasted elements are never initialized. */ + + yyssp = yyss; + yyvsp = yyvs; + + goto yysetstate; + +/*------------------------------------------------------------. +| yynewstate -- Push a new state, which is found in yystate. | +`------------------------------------------------------------*/ + yynewstate: + /* In all cases, when you get here, the value and location stacks + have just been pushed. So pushing a state here evens the stacks. */ + yyssp++; + + yysetstate: + *yyssp = yystate; + + if (yyss + yystacksize - 1 <= yyssp) + { + /* Get the current used size of the three stacks, in elements. */ + YYSIZE_T yysize = yyssp - yyss + 1; + +#ifdef yyoverflow + { + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + yytype_int16 *yyss1 = yyss; + + + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), + + &yystacksize); + + yyss = yyss1; + yyvs = yyvs1; + } +#else /* no yyoverflow */ +# ifndef YYSTACK_RELOCATE + goto yyexhaustedlab; +# else + /* Extend the stack our own way. */ + if (YYMAXDEPTH <= yystacksize) + goto yyexhaustedlab; + yystacksize *= 2; + if (YYMAXDEPTH < yystacksize) + yystacksize = YYMAXDEPTH; + + { + yytype_int16 *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss); + YYSTACK_RELOCATE (yyvs); + +# undef YYSTACK_RELOCATE + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); + } +# endif +#endif /* no yyoverflow */ + + yyssp = yyss + yysize - 1; + yyvsp = yyvs + yysize - 1; + + + YYDPRINTF ((stderr, "Stack size increased to %lu\n", + (unsigned long int) yystacksize)); + + if (yyss + yystacksize - 1 <= yyssp) + YYABORT; + } + + YYDPRINTF ((stderr, "Entering state %d\n", yystate)); + + goto yybackup; + +/*-----------. +| yybackup. | +`-----------*/ +yybackup: + + /* Do appropriate processing given the current state. Read a + look-ahead token if we need one and don't already have one. */ + + /* First try to decide what to do without reference to look-ahead token. */ + yyn = yypact[yystate]; + if (yyn == YYPACT_NINF) + goto yydefault; + + /* Not known => get a look-ahead token if don't already have one. */ + + /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ + if (yychar == YYEMPTY) + { + YYDPRINTF ((stderr, "Reading a token: ")); + yychar = YYLEX; + } + + if (yychar <= YYEOF) + { + yychar = yytoken = YYEOF; + YYDPRINTF ((stderr, "Now at end of input.\n")); + } + else + { + yytoken = YYTRANSLATE (yychar); + YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + } + + /* If the proper action on seeing token YYTOKEN is to reduce or to + detect an error, take that action. */ + yyn += yytoken; + if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) + goto yydefault; + yyn = yytable[yyn]; + if (yyn <= 0) + { + if (yyn == 0 || yyn == YYTABLE_NINF) + goto yyerrlab; + yyn = -yyn; + goto yyreduce; + } + + if (yyn == YYFINAL) + YYACCEPT; + + /* Count tokens shifted since error; after three, turn off error + status. */ + if (yyerrstatus) + yyerrstatus--; + + /* Shift the look-ahead token. */ + YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + + /* Discard the shifted token unless it is eof. */ + if (yychar != YYEOF) + yychar = YYEMPTY; + + yystate = yyn; + *++yyvsp = yylval; + + goto yynewstate; + + +/*-----------------------------------------------------------. +| yydefault -- do the default action for the current state. | +`-----------------------------------------------------------*/ +yydefault: + yyn = yydefact[yystate]; + if (yyn == 0) + goto yyerrlab; + goto yyreduce; + + +/*-----------------------------. +| yyreduce -- Do a reduction. | +`-----------------------------*/ +yyreduce: + /* yyn is the number of a rule to reduce with. */ + yylen = yyr2[yyn]; + + /* If YYLEN is nonzero, implement the default value of the action: + `$$ = $1'. + + Otherwise, the following line sets YYVAL to garbage. + This behavior is undocumented and Bison + users should not rely upon it. Assigning to YYVAL + unconditionally makes the parser a bit smaller, and it avoids a + GCC warning that YYVAL may be used uninitialized. */ + yyval = yyvsp[1-yylen]; + + + YY_REDUCE_PRINT (yyn); + switch (yyn) + { + case 8: +#line 180 "ldgram.y" + { ldlex_defsym(); } + break; + + case 9: +#line 182 "ldgram.y" + { + ldlex_popstate(); + lang_add_assignment (exp_defsym ((yyvsp[(2) - (4)].name), (yyvsp[(4) - (4)].etree))); + } + break; + + case 10: +#line 190 "ldgram.y" + { + ldlex_mri_script (); + PUSH_ERROR (_("MRI style script")); + } + break; + + case 11: +#line 195 "ldgram.y" + { + ldlex_popstate (); + mri_draw_tree (); + POP_ERROR (); + } + break; + + case 16: +#line 210 "ldgram.y" + { + einfo(_("%P%F: unrecognised keyword in MRI style script '%s'\n"),(yyvsp[(1) - (1)].name)); + } + break; + + case 17: +#line 213 "ldgram.y" + { + config.map_filename = "-"; + } + break; + + case 20: +#line 219 "ldgram.y" + { mri_public((yyvsp[(2) - (4)].name), (yyvsp[(4) - (4)].etree)); } + break; + + case 21: +#line 221 "ldgram.y" + { mri_public((yyvsp[(2) - (4)].name), (yyvsp[(4) - (4)].etree)); } + break; + + case 22: +#line 223 "ldgram.y" + { mri_public((yyvsp[(2) - (3)].name), (yyvsp[(3) - (3)].etree)); } + break; + + case 23: +#line 225 "ldgram.y" + { mri_format((yyvsp[(2) - (2)].name)); } + break; + + case 24: +#line 227 "ldgram.y" + { mri_output_section((yyvsp[(2) - (4)].name), (yyvsp[(4) - (4)].etree));} + break; + + case 25: +#line 229 "ldgram.y" + { mri_output_section((yyvsp[(2) - (3)].name), (yyvsp[(3) - (3)].etree));} + break; + + case 26: +#line 231 "ldgram.y" + { mri_output_section((yyvsp[(2) - (4)].name), (yyvsp[(4) - (4)].etree));} + break; + + case 27: +#line 233 "ldgram.y" + { mri_align((yyvsp[(2) - (4)].name),(yyvsp[(4) - (4)].etree)); } + break; + + case 28: +#line 235 "ldgram.y" + { mri_align((yyvsp[(2) - (4)].name),(yyvsp[(4) - (4)].etree)); } + break; + + case 29: +#line 237 "ldgram.y" + { mri_alignmod((yyvsp[(2) - (4)].name),(yyvsp[(4) - (4)].etree)); } + break; + + case 30: +#line 239 "ldgram.y" + { mri_alignmod((yyvsp[(2) - (4)].name),(yyvsp[(4) - (4)].etree)); } + break; + + case 33: +#line 243 "ldgram.y" + { mri_name((yyvsp[(2) - (2)].name)); } + break; + + case 34: +#line 245 "ldgram.y" + { mri_alias((yyvsp[(2) - (4)].name),(yyvsp[(4) - (4)].name),0);} + break; + + case 35: +#line 247 "ldgram.y" + { mri_alias ((yyvsp[(2) - (4)].name), 0, (int) (yyvsp[(4) - (4)].bigint).integer); } + break; + + case 36: +#line 249 "ldgram.y" + { mri_base((yyvsp[(2) - (2)].etree)); } + break; + + case 37: +#line 251 "ldgram.y" + { mri_truncate ((unsigned int) (yyvsp[(2) - (2)].bigint).integer); } + break; + + case 40: +#line 255 "ldgram.y" + { ldlex_script (); ldfile_open_command_file((yyvsp[(2) - (2)].name)); } + break; + + case 41: +#line 257 "ldgram.y" + { ldlex_popstate (); } + break; + + case 42: +#line 259 "ldgram.y" + { lang_add_entry ((yyvsp[(2) - (2)].name), FALSE); } + break; + + case 44: +#line 264 "ldgram.y" + { mri_order((yyvsp[(3) - (3)].name)); } + break; + + case 45: +#line 265 "ldgram.y" + { mri_order((yyvsp[(2) - (2)].name)); } + break; + + case 47: +#line 271 "ldgram.y" + { mri_load((yyvsp[(1) - (1)].name)); } + break; + + case 48: +#line 272 "ldgram.y" + { mri_load((yyvsp[(3) - (3)].name)); } + break; + + case 49: +#line 277 "ldgram.y" + { mri_only_load((yyvsp[(1) - (1)].name)); } + break; + + case 50: +#line 279 "ldgram.y" + { mri_only_load((yyvsp[(3) - (3)].name)); } + break; + + case 51: +#line 283 "ldgram.y" + { (yyval.name) = NULL; } + break; + + case 54: +#line 290 "ldgram.y" + { ldlex_expression (); } + break; + + case 55: +#line 292 "ldgram.y" + { ldlex_popstate (); } + break; + + case 56: +#line 296 "ldgram.y" + { ldlang_add_undef ((yyvsp[(1) - (1)].name), FALSE); } + break; + + case 57: +#line 298 "ldgram.y" + { ldlang_add_undef ((yyvsp[(2) - (2)].name), FALSE); } + break; + + case 58: +#line 300 "ldgram.y" + { ldlang_add_undef ((yyvsp[(3) - (3)].name), FALSE); } + break; + + case 59: +#line 304 "ldgram.y" + { ldlex_both(); } + break; + + case 60: +#line 306 "ldgram.y" + { ldlex_popstate(); } + break; + + case 73: +#line 327 "ldgram.y" + { lang_add_target((yyvsp[(3) - (4)].name)); } + break; + + case 74: +#line 329 "ldgram.y" + { ldfile_add_library_path ((yyvsp[(3) - (4)].name), FALSE); } + break; + + case 75: +#line 331 "ldgram.y" + { lang_add_output((yyvsp[(3) - (4)].name), 1); } + break; + + case 76: +#line 333 "ldgram.y" + { lang_add_output_format ((yyvsp[(3) - (4)].name), (char *) NULL, + (char *) NULL, 1); } + break; + + case 77: +#line 336 "ldgram.y" + { lang_add_output_format ((yyvsp[(3) - (8)].name), (yyvsp[(5) - (8)].name), (yyvsp[(7) - (8)].name), 1); } + break; + + case 78: +#line 338 "ldgram.y" + { ldfile_set_output_arch ((yyvsp[(3) - (4)].name), bfd_arch_unknown); } + break; + + case 79: +#line 340 "ldgram.y" + { command_line.force_common_definition = TRUE ; } + break; + + case 80: +#line 342 "ldgram.y" + { command_line.inhibit_common_definition = TRUE ; } + break; + + case 82: +#line 345 "ldgram.y" + { lang_enter_group (); } + break; + + case 83: +#line 347 "ldgram.y" + { lang_leave_group (); } + break; + + case 84: +#line 349 "ldgram.y" + { lang_add_map((yyvsp[(3) - (4)].name)); } + break; + + case 85: +#line 351 "ldgram.y" + { ldlex_script (); ldfile_open_command_file((yyvsp[(2) - (2)].name)); } + break; + + case 86: +#line 353 "ldgram.y" + { ldlex_popstate (); } + break; + + case 87: +#line 355 "ldgram.y" + { + lang_add_nocrossref ((yyvsp[(3) - (4)].nocrossref)); + } + break; + + case 89: +#line 360 "ldgram.y" + { lang_add_insert ((yyvsp[(3) - (3)].name), 0); } + break; + + case 90: +#line 362 "ldgram.y" + { lang_add_insert ((yyvsp[(3) - (3)].name), 1); } + break; + + case 91: +#line 364 "ldgram.y" + { lang_memory_region_alias ((yyvsp[(3) - (6)].name), (yyvsp[(5) - (6)].name)); } + break; + + case 92: +#line 366 "ldgram.y" + { lang_ld_feature ((yyvsp[(3) - (4)].name)); } + break; + + case 93: +#line 371 "ldgram.y" + { lang_add_input_file((yyvsp[(1) - (1)].name),lang_input_file_is_search_file_enum, + (char *)NULL); } + break; + + case 94: +#line 374 "ldgram.y" + { lang_add_input_file((yyvsp[(3) - (3)].name),lang_input_file_is_search_file_enum, + (char *)NULL); } + break; + + case 95: +#line 377 "ldgram.y" + { lang_add_input_file((yyvsp[(2) - (2)].name),lang_input_file_is_search_file_enum, + (char *)NULL); } + break; + + case 96: +#line 380 "ldgram.y" + { lang_add_input_file((yyvsp[(1) - (1)].name),lang_input_file_is_l_enum, + (char *)NULL); } + break; + + case 97: +#line 383 "ldgram.y" + { lang_add_input_file((yyvsp[(3) - (3)].name),lang_input_file_is_l_enum, + (char *)NULL); } + break; + + case 98: +#line 386 "ldgram.y" + { lang_add_input_file((yyvsp[(2) - (2)].name),lang_input_file_is_l_enum, + (char *)NULL); } + break; + + case 99: +#line 389 "ldgram.y" + { (yyval.integer) = add_DT_NEEDED_for_regular; add_DT_NEEDED_for_regular = TRUE; } + break; + + case 100: +#line 391 "ldgram.y" + { add_DT_NEEDED_for_regular = (yyvsp[(3) - (5)].integer); } + break; + + case 101: +#line 393 "ldgram.y" + { (yyval.integer) = add_DT_NEEDED_for_regular; add_DT_NEEDED_for_regular = TRUE; } + break; + + case 102: +#line 395 "ldgram.y" + { add_DT_NEEDED_for_regular = (yyvsp[(5) - (7)].integer); } + break; + + case 103: +#line 397 "ldgram.y" + { (yyval.integer) = add_DT_NEEDED_for_regular; add_DT_NEEDED_for_regular = TRUE; } + break; + + case 104: +#line 399 "ldgram.y" + { add_DT_NEEDED_for_regular = (yyvsp[(4) - (6)].integer); } + break; + + case 109: +#line 414 "ldgram.y" + { lang_add_entry ((yyvsp[(3) - (4)].name), FALSE); } + break; + + case 111: +#line 416 "ldgram.y" + {ldlex_expression ();} + break; + + case 112: +#line 417 "ldgram.y" + { ldlex_popstate (); + lang_add_assignment (exp_assert ((yyvsp[(4) - (7)].etree), (yyvsp[(6) - (7)].name))); } + break; + + case 113: +#line 425 "ldgram.y" + { + (yyval.cname) = (yyvsp[(1) - (1)].name); + } + break; + + case 114: +#line 429 "ldgram.y" + { + (yyval.cname) = "*"; + } + break; + + case 115: +#line 433 "ldgram.y" + { + (yyval.cname) = "?"; + } + break; + + case 116: +#line 440 "ldgram.y" + { + (yyval.wildcard).name = (yyvsp[(1) - (1)].cname); + (yyval.wildcard).sorted = none; + (yyval.wildcard).exclude_name_list = NULL; + (yyval.wildcard).section_flag_list = NULL; + } + break; + + case 117: +#line 447 "ldgram.y" + { + (yyval.wildcard).name = (yyvsp[(5) - (5)].cname); + (yyval.wildcard).sorted = none; + (yyval.wildcard).exclude_name_list = (yyvsp[(3) - (5)].name_list); + (yyval.wildcard).section_flag_list = NULL; + } + break; + + case 118: +#line 454 "ldgram.y" + { + (yyval.wildcard).name = (yyvsp[(3) - (4)].cname); + (yyval.wildcard).sorted = by_name; + (yyval.wildcard).exclude_name_list = NULL; + (yyval.wildcard).section_flag_list = NULL; + } + break; + + case 119: +#line 461 "ldgram.y" + { + (yyval.wildcard).name = (yyvsp[(3) - (4)].cname); + (yyval.wildcard).sorted = by_alignment; + (yyval.wildcard).exclude_name_list = NULL; + (yyval.wildcard).section_flag_list = NULL; + } + break; + + case 120: +#line 468 "ldgram.y" + { + (yyval.wildcard).name = (yyvsp[(5) - (7)].cname); + (yyval.wildcard).sorted = by_name_alignment; + (yyval.wildcard).exclude_name_list = NULL; + (yyval.wildcard).section_flag_list = NULL; + } + break; + + case 121: +#line 475 "ldgram.y" + { + (yyval.wildcard).name = (yyvsp[(5) - (7)].cname); + (yyval.wildcard).sorted = by_name; + (yyval.wildcard).exclude_name_list = NULL; + (yyval.wildcard).section_flag_list = NULL; + } + break; + + case 122: +#line 482 "ldgram.y" + { + (yyval.wildcard).name = (yyvsp[(5) - (7)].cname); + (yyval.wildcard).sorted = by_alignment_name; + (yyval.wildcard).exclude_name_list = NULL; + (yyval.wildcard).section_flag_list = NULL; + } + break; + + case 123: +#line 489 "ldgram.y" + { + (yyval.wildcard).name = (yyvsp[(5) - (7)].cname); + (yyval.wildcard).sorted = by_alignment; + (yyval.wildcard).exclude_name_list = NULL; + (yyval.wildcard).section_flag_list = NULL; + } + break; + + case 124: +#line 496 "ldgram.y" + { + (yyval.wildcard).name = (yyvsp[(7) - (8)].cname); + (yyval.wildcard).sorted = by_name; + (yyval.wildcard).exclude_name_list = (yyvsp[(5) - (8)].name_list); + (yyval.wildcard).section_flag_list = NULL; + } + break; + + case 125: +#line 503 "ldgram.y" + { + (yyval.wildcard).name = (yyvsp[(3) - (4)].cname); + (yyval.wildcard).sorted = by_init_priority; + (yyval.wildcard).exclude_name_list = NULL; + (yyval.wildcard).section_flag_list = NULL; + } + break; + + case 126: +#line 512 "ldgram.y" + { + struct flag_info_list *n; + n = ((struct flag_info_list *) xmalloc (sizeof *n)); + if ((yyvsp[(1) - (1)].name)[0] == '!') + { + n->with = without_flags; + n->name = &(yyvsp[(1) - (1)].name)[1]; + } + else + { + n->with = with_flags; + n->name = (yyvsp[(1) - (1)].name); + } + n->valid = FALSE; + n->next = NULL; + (yyval.flag_info_list) = n; + } + break; + + case 127: +#line 530 "ldgram.y" + { + struct flag_info_list *n; + n = ((struct flag_info_list *) xmalloc (sizeof *n)); + if ((yyvsp[(3) - (3)].name)[0] == '!') + { + n->with = without_flags; + n->name = &(yyvsp[(3) - (3)].name)[1]; + } + else + { + n->with = with_flags; + n->name = (yyvsp[(3) - (3)].name); + } + n->valid = FALSE; + n->next = (yyvsp[(1) - (3)].flag_info_list); + (yyval.flag_info_list) = n; + } + break; + + case 128: +#line 551 "ldgram.y" + { + struct flag_info *n; + n = ((struct flag_info *) xmalloc (sizeof *n)); + n->flag_list = (yyvsp[(3) - (4)].flag_info_list); + n->flags_initialized = FALSE; + n->not_with_flags = 0; + n->only_with_flags = 0; + (yyval.flag_info) = n; + } + break; + + case 129: +#line 564 "ldgram.y" + { + struct name_list *tmp; + tmp = (struct name_list *) xmalloc (sizeof *tmp); + tmp->name = (yyvsp[(2) - (2)].cname); + tmp->next = (yyvsp[(1) - (2)].name_list); + (yyval.name_list) = tmp; + } + break; + + case 130: +#line 573 "ldgram.y" + { + struct name_list *tmp; + tmp = (struct name_list *) xmalloc (sizeof *tmp); + tmp->name = (yyvsp[(1) - (1)].cname); + tmp->next = NULL; + (yyval.name_list) = tmp; + } + break; + + case 131: +#line 584 "ldgram.y" + { + struct wildcard_list *tmp; + tmp = (struct wildcard_list *) xmalloc (sizeof *tmp); + tmp->next = (yyvsp[(1) - (3)].wildcard_list); + tmp->spec = (yyvsp[(3) - (3)].wildcard); + (yyval.wildcard_list) = tmp; + } + break; + + case 132: +#line 593 "ldgram.y" + { + struct wildcard_list *tmp; + tmp = (struct wildcard_list *) xmalloc (sizeof *tmp); + tmp->next = NULL; + tmp->spec = (yyvsp[(1) - (1)].wildcard); + (yyval.wildcard_list) = tmp; + } + break; + + case 133: +#line 604 "ldgram.y" + { + struct wildcard_spec tmp; + tmp.name = (yyvsp[(1) - (1)].name); + tmp.exclude_name_list = NULL; + tmp.sorted = none; + tmp.section_flag_list = NULL; + lang_add_wild (&tmp, NULL, ldgram_had_keep); + } + break; + + case 134: +#line 613 "ldgram.y" + { + struct wildcard_spec tmp; + tmp.name = (yyvsp[(2) - (2)].name); + tmp.exclude_name_list = NULL; + tmp.sorted = none; + tmp.section_flag_list = (yyvsp[(1) - (2)].flag_info); + lang_add_wild (&tmp, NULL, ldgram_had_keep); + } + break; + + case 135: +#line 622 "ldgram.y" + { + lang_add_wild (NULL, (yyvsp[(2) - (3)].wildcard_list), ldgram_had_keep); + } + break; + + case 136: +#line 626 "ldgram.y" + { + struct wildcard_spec tmp; + tmp.name = NULL; + tmp.exclude_name_list = NULL; + tmp.sorted = none; + tmp.section_flag_list = (yyvsp[(1) - (4)].flag_info); + lang_add_wild (NULL, (yyvsp[(3) - (4)].wildcard_list), ldgram_had_keep); + } + break; + + case 137: +#line 635 "ldgram.y" + { + lang_add_wild (&(yyvsp[(1) - (4)].wildcard), (yyvsp[(3) - (4)].wildcard_list), ldgram_had_keep); + } + break; + + case 138: +#line 639 "ldgram.y" + { + (yyvsp[(2) - (5)].wildcard).section_flag_list = (yyvsp[(1) - (5)].flag_info); + lang_add_wild (&(yyvsp[(2) - (5)].wildcard), (yyvsp[(4) - (5)].wildcard_list), ldgram_had_keep); + } + break; + + case 140: +#line 648 "ldgram.y" + { ldgram_had_keep = TRUE; } + break; + + case 141: +#line 650 "ldgram.y" + { ldgram_had_keep = FALSE; } + break; + + case 143: +#line 656 "ldgram.y" + { + lang_add_attribute(lang_object_symbols_statement_enum); + } + break; + + case 145: +#line 661 "ldgram.y" + { + + lang_add_attribute(lang_constructors_statement_enum); + } + break; + + case 146: +#line 666 "ldgram.y" + { + constructors_sorted = TRUE; + lang_add_attribute (lang_constructors_statement_enum); + } + break; + + case 148: +#line 672 "ldgram.y" + { + lang_add_data ((int) (yyvsp[(1) - (4)].integer), (yyvsp[(3) - (4)].etree)); + } + break; + + case 149: +#line 677 "ldgram.y" + { + lang_add_fill ((yyvsp[(3) - (4)].fill)); + } + break; + + case 150: +#line 680 "ldgram.y" + {ldlex_expression ();} + break; + + case 151: +#line 681 "ldgram.y" + { ldlex_popstate (); + lang_add_assignment (exp_assert ((yyvsp[(4) - (8)].etree), (yyvsp[(6) - (8)].name))); } + break; + + case 152: +#line 684 "ldgram.y" + { ldlex_script (); ldfile_open_command_file((yyvsp[(2) - (2)].name)); } + break; + + case 153: +#line 686 "ldgram.y" + { ldlex_popstate (); } + break; + + case 158: +#line 701 "ldgram.y" + { (yyval.integer) = (yyvsp[(1) - (1)].token); } + break; + + case 159: +#line 703 "ldgram.y" + { (yyval.integer) = (yyvsp[(1) - (1)].token); } + break; + + case 160: +#line 705 "ldgram.y" + { (yyval.integer) = (yyvsp[(1) - (1)].token); } + break; + + case 161: +#line 707 "ldgram.y" + { (yyval.integer) = (yyvsp[(1) - (1)].token); } + break; + + case 162: +#line 709 "ldgram.y" + { (yyval.integer) = (yyvsp[(1) - (1)].token); } + break; + + case 163: +#line 714 "ldgram.y" + { + (yyval.fill) = exp_get_fill ((yyvsp[(1) - (1)].etree), 0, "fill value"); + } + break; + + case 164: +#line 721 "ldgram.y" + { (yyval.fill) = (yyvsp[(2) - (2)].fill); } + break; + + case 165: +#line 722 "ldgram.y" + { (yyval.fill) = (fill_type *) 0; } + break; + + case 166: +#line 727 "ldgram.y" + { (yyval.token) = '+'; } + break; + + case 167: +#line 729 "ldgram.y" + { (yyval.token) = '-'; } + break; + + case 168: +#line 731 "ldgram.y" + { (yyval.token) = '*'; } + break; + + case 169: +#line 733 "ldgram.y" + { (yyval.token) = '/'; } + break; + + case 170: +#line 735 "ldgram.y" + { (yyval.token) = LSHIFT; } + break; + + case 171: +#line 737 "ldgram.y" + { (yyval.token) = RSHIFT; } + break; + + case 172: +#line 739 "ldgram.y" + { (yyval.token) = '&'; } + break; + + case 173: +#line 741 "ldgram.y" + { (yyval.token) = '|'; } + break; + + case 176: +#line 751 "ldgram.y" + { + lang_add_assignment (exp_assign ((yyvsp[(1) - (3)].name), (yyvsp[(3) - (3)].etree))); + } + break; + + case 177: +#line 755 "ldgram.y" + { + lang_add_assignment (exp_assign ((yyvsp[(1) - (3)].name), + exp_binop ((yyvsp[(2) - (3)].token), + exp_nameop (NAME, + (yyvsp[(1) - (3)].name)), + (yyvsp[(3) - (3)].etree)))); + } + break; + + case 178: +#line 763 "ldgram.y" + { + lang_add_assignment (exp_provide ((yyvsp[(3) - (6)].name), (yyvsp[(5) - (6)].etree), FALSE)); + } + break; + + case 179: +#line 767 "ldgram.y" + { + lang_add_assignment (exp_provide ((yyvsp[(3) - (6)].name), (yyvsp[(5) - (6)].etree), TRUE)); + } + break; + + case 187: +#line 790 "ldgram.y" + { region = lang_memory_region_lookup ((yyvsp[(1) - (1)].name), TRUE); } + break; + + case 188: +#line 793 "ldgram.y" + {} + break; + + case 189: +#line 795 "ldgram.y" + { ldlex_script (); ldfile_open_command_file((yyvsp[(2) - (2)].name)); } + break; + + case 190: +#line 797 "ldgram.y" + { ldlex_popstate (); } + break; + + case 191: +#line 802 "ldgram.y" + { + region->origin = exp_get_vma ((yyvsp[(3) - (3)].etree), 0, "origin"); + region->current = region->origin; + } + break; + + case 192: +#line 810 "ldgram.y" + { + region->length = exp_get_vma ((yyvsp[(3) - (3)].etree), -1, "length"); + } + break; + + case 193: +#line 817 "ldgram.y" + { /* dummy action to avoid bison 1.25 error message */ } + break; + + case 197: +#line 828 "ldgram.y" + { lang_set_flags (region, (yyvsp[(1) - (1)].name), 0); } + break; + + case 198: +#line 830 "ldgram.y" + { lang_set_flags (region, (yyvsp[(2) - (2)].name), 1); } + break; + + case 199: +#line 835 "ldgram.y" + { lang_startup((yyvsp[(3) - (4)].name)); } + break; + + case 201: +#line 841 "ldgram.y" + { ldemul_hll((char *)NULL); } + break; + + case 202: +#line 846 "ldgram.y" + { ldemul_hll((yyvsp[(3) - (3)].name)); } + break; + + case 203: +#line 848 "ldgram.y" + { ldemul_hll((yyvsp[(1) - (1)].name)); } + break; + + case 205: +#line 856 "ldgram.y" + { ldemul_syslib((yyvsp[(3) - (3)].name)); } + break; + + case 207: +#line 862 "ldgram.y" + { lang_float(TRUE); } + break; + + case 208: +#line 864 "ldgram.y" + { lang_float(FALSE); } + break; + + case 209: +#line 869 "ldgram.y" + { + (yyval.nocrossref) = NULL; + } + break; + + case 210: +#line 873 "ldgram.y" + { + struct lang_nocrossref *n; + + n = (struct lang_nocrossref *) xmalloc (sizeof *n); + n->name = (yyvsp[(1) - (2)].name); + n->next = (yyvsp[(2) - (2)].nocrossref); + (yyval.nocrossref) = n; + } + break; + + case 211: +#line 882 "ldgram.y" + { + struct lang_nocrossref *n; + + n = (struct lang_nocrossref *) xmalloc (sizeof *n); + n->name = (yyvsp[(1) - (3)].name); + n->next = (yyvsp[(3) - (3)].nocrossref); + (yyval.nocrossref) = n; + } + break; + + case 212: +#line 892 "ldgram.y" + { ldlex_expression (); } + break; + + case 213: +#line 894 "ldgram.y" + { ldlex_popstate (); (yyval.etree)=(yyvsp[(2) - (2)].etree);} + break; + + case 214: +#line 899 "ldgram.y" + { (yyval.etree) = exp_unop ('-', (yyvsp[(2) - (2)].etree)); } + break; + + case 215: +#line 901 "ldgram.y" + { (yyval.etree) = (yyvsp[(2) - (3)].etree); } + break; + + case 216: +#line 903 "ldgram.y" + { (yyval.etree) = exp_unop ((int) (yyvsp[(1) - (4)].integer),(yyvsp[(3) - (4)].etree)); } + break; + + case 217: +#line 905 "ldgram.y" + { (yyval.etree) = exp_unop ('!', (yyvsp[(2) - (2)].etree)); } + break; + + case 218: +#line 907 "ldgram.y" + { (yyval.etree) = (yyvsp[(2) - (2)].etree); } + break; + + case 219: +#line 909 "ldgram.y" + { (yyval.etree) = exp_unop ('~', (yyvsp[(2) - (2)].etree));} + break; + + case 220: +#line 912 "ldgram.y" + { (yyval.etree) = exp_binop ('*', (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 221: +#line 914 "ldgram.y" + { (yyval.etree) = exp_binop ('/', (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 222: +#line 916 "ldgram.y" + { (yyval.etree) = exp_binop ('%', (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 223: +#line 918 "ldgram.y" + { (yyval.etree) = exp_binop ('+', (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 224: +#line 920 "ldgram.y" + { (yyval.etree) = exp_binop ('-' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 225: +#line 922 "ldgram.y" + { (yyval.etree) = exp_binop (LSHIFT , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 226: +#line 924 "ldgram.y" + { (yyval.etree) = exp_binop (RSHIFT , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 227: +#line 926 "ldgram.y" + { (yyval.etree) = exp_binop (EQ , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 228: +#line 928 "ldgram.y" + { (yyval.etree) = exp_binop (NE , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 229: +#line 930 "ldgram.y" + { (yyval.etree) = exp_binop (LE , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 230: +#line 932 "ldgram.y" + { (yyval.etree) = exp_binop (GE , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 231: +#line 934 "ldgram.y" + { (yyval.etree) = exp_binop ('<' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 232: +#line 936 "ldgram.y" + { (yyval.etree) = exp_binop ('>' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 233: +#line 938 "ldgram.y" + { (yyval.etree) = exp_binop ('&' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 234: +#line 940 "ldgram.y" + { (yyval.etree) = exp_binop ('^' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 235: +#line 942 "ldgram.y" + { (yyval.etree) = exp_binop ('|' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 236: +#line 944 "ldgram.y" + { (yyval.etree) = exp_trinop ('?' , (yyvsp[(1) - (5)].etree), (yyvsp[(3) - (5)].etree), (yyvsp[(5) - (5)].etree)); } + break; + + case 237: +#line 946 "ldgram.y" + { (yyval.etree) = exp_binop (ANDAND , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 238: +#line 948 "ldgram.y" + { (yyval.etree) = exp_binop (OROR , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); } + break; + + case 239: +#line 950 "ldgram.y" + { (yyval.etree) = exp_nameop (DEFINED, (yyvsp[(3) - (4)].name)); } + break; + + case 240: +#line 952 "ldgram.y" + { (yyval.etree) = exp_bigintop ((yyvsp[(1) - (1)].bigint).integer, (yyvsp[(1) - (1)].bigint).str); } + break; + + case 241: +#line 954 "ldgram.y" + { (yyval.etree) = exp_nameop (SIZEOF_HEADERS,0); } + break; + + case 242: +#line 957 "ldgram.y" + { (yyval.etree) = exp_nameop (ALIGNOF,(yyvsp[(3) - (4)].name)); } + break; + + case 243: +#line 959 "ldgram.y" + { (yyval.etree) = exp_nameop (SIZEOF,(yyvsp[(3) - (4)].name)); } + break; + + case 244: +#line 961 "ldgram.y" + { (yyval.etree) = exp_nameop (ADDR,(yyvsp[(3) - (4)].name)); } + break; + + case 245: +#line 963 "ldgram.y" + { (yyval.etree) = exp_nameop (LOADADDR,(yyvsp[(3) - (4)].name)); } + break; + + case 246: +#line 965 "ldgram.y" + { (yyval.etree) = exp_nameop (CONSTANT,(yyvsp[(3) - (4)].name)); } + break; + + case 247: +#line 967 "ldgram.y" + { (yyval.etree) = exp_unop (ABSOLUTE, (yyvsp[(3) - (4)].etree)); } + break; + + case 248: +#line 969 "ldgram.y" + { (yyval.etree) = exp_unop (ALIGN_K,(yyvsp[(3) - (4)].etree)); } + break; + + case 249: +#line 971 "ldgram.y" + { (yyval.etree) = exp_binop (ALIGN_K,(yyvsp[(3) - (6)].etree),(yyvsp[(5) - (6)].etree)); } + break; + + case 250: +#line 973 "ldgram.y" + { (yyval.etree) = exp_binop (DATA_SEGMENT_ALIGN, (yyvsp[(3) - (6)].etree), (yyvsp[(5) - (6)].etree)); } + break; + + case 251: +#line 975 "ldgram.y" + { (yyval.etree) = exp_binop (DATA_SEGMENT_RELRO_END, (yyvsp[(5) - (6)].etree), (yyvsp[(3) - (6)].etree)); } + break; + + case 252: +#line 977 "ldgram.y" + { (yyval.etree) = exp_unop (DATA_SEGMENT_END, (yyvsp[(3) - (4)].etree)); } + break; + + case 253: +#line 979 "ldgram.y" + { /* The operands to the expression node are + placed in the opposite order from the way + in which they appear in the script as + that allows us to reuse more code in + fold_binary. */ + (yyval.etree) = exp_binop (SEGMENT_START, + (yyvsp[(5) - (6)].etree), + exp_nameop (NAME, (yyvsp[(3) - (6)].name))); } + break; + + case 254: +#line 988 "ldgram.y" + { (yyval.etree) = exp_unop (ALIGN_K,(yyvsp[(3) - (4)].etree)); } + break; + + case 255: +#line 990 "ldgram.y" + { (yyval.etree) = exp_nameop (NAME,(yyvsp[(1) - (1)].name)); } + break; + + case 256: +#line 992 "ldgram.y" + { (yyval.etree) = exp_binop (MAX_K, (yyvsp[(3) - (6)].etree), (yyvsp[(5) - (6)].etree) ); } + break; + + case 257: +#line 994 "ldgram.y" + { (yyval.etree) = exp_binop (MIN_K, (yyvsp[(3) - (6)].etree), (yyvsp[(5) - (6)].etree) ); } + break; + + case 258: +#line 996 "ldgram.y" + { (yyval.etree) = exp_assert ((yyvsp[(3) - (6)].etree), (yyvsp[(5) - (6)].name)); } + break; + + case 259: +#line 998 "ldgram.y" + { (yyval.etree) = exp_nameop (ORIGIN, (yyvsp[(3) - (4)].name)); } + break; + + case 260: +#line 1000 "ldgram.y" + { (yyval.etree) = exp_nameop (LENGTH, (yyvsp[(3) - (4)].name)); } + break; + + case 261: +#line 1005 "ldgram.y" + { (yyval.name) = (yyvsp[(3) - (3)].name); } + break; + + case 262: +#line 1006 "ldgram.y" + { (yyval.name) = 0; } + break; + + case 263: +#line 1010 "ldgram.y" + { (yyval.etree) = (yyvsp[(3) - (4)].etree); } + break; + + case 264: +#line 1011 "ldgram.y" + { (yyval.etree) = 0; } + break; + + case 265: +#line 1015 "ldgram.y" + { (yyval.etree) = (yyvsp[(3) - (4)].etree); } + break; + + case 266: +#line 1016 "ldgram.y" + { (yyval.etree) = 0; } + break; + + case 267: +#line 1020 "ldgram.y" + { (yyval.etree) = (yyvsp[(3) - (4)].etree); } + break; + + case 268: +#line 1021 "ldgram.y" + { (yyval.etree) = 0; } + break; + + case 269: +#line 1025 "ldgram.y" + { (yyval.token) = ONLY_IF_RO; } + break; + + case 270: +#line 1026 "ldgram.y" + { (yyval.token) = ONLY_IF_RW; } + break; + + case 271: +#line 1027 "ldgram.y" + { (yyval.token) = SPECIAL; } + break; + + case 272: +#line 1028 "ldgram.y" + { (yyval.token) = 0; } + break; + + case 273: +#line 1031 "ldgram.y" + { ldlex_expression(); } + break; + + case 274: +#line 1035 "ldgram.y" + { ldlex_popstate (); ldlex_script (); } + break; + + case 275: +#line 1038 "ldgram.y" + { + lang_enter_output_section_statement((yyvsp[(1) - (9)].name), (yyvsp[(3) - (9)].etree), + sectype, + (yyvsp[(5) - (9)].etree), (yyvsp[(6) - (9)].etree), (yyvsp[(4) - (9)].etree), (yyvsp[(8) - (9)].token)); + } + break; + + case 276: +#line 1044 "ldgram.y" + { ldlex_popstate (); ldlex_expression (); } + break; + + case 277: +#line 1046 "ldgram.y" + { + ldlex_popstate (); + lang_leave_output_section_statement ((yyvsp[(17) - (17)].fill), (yyvsp[(14) - (17)].name), (yyvsp[(16) - (17)].section_phdr), (yyvsp[(15) - (17)].name)); + } + break; + + case 278: +#line 1051 "ldgram.y" + {} + break; + + case 279: +#line 1053 "ldgram.y" + { ldlex_expression (); } + break; + + case 280: +#line 1055 "ldgram.y" + { ldlex_popstate (); ldlex_script (); } + break; + + case 281: +#line 1057 "ldgram.y" + { + lang_enter_overlay ((yyvsp[(3) - (8)].etree), (yyvsp[(6) - (8)].etree)); + } + break; + + case 282: +#line 1062 "ldgram.y" + { ldlex_popstate (); ldlex_expression (); } + break; + + case 283: +#line 1064 "ldgram.y" + { + ldlex_popstate (); + lang_leave_overlay ((yyvsp[(5) - (16)].etree), (int) (yyvsp[(4) - (16)].integer), + (yyvsp[(16) - (16)].fill), (yyvsp[(13) - (16)].name), (yyvsp[(15) - (16)].section_phdr), (yyvsp[(14) - (16)].name)); + } + break; + + case 285: +#line 1074 "ldgram.y" + { ldlex_expression (); } + break; + + case 286: +#line 1076 "ldgram.y" + { + ldlex_popstate (); + lang_add_assignment (exp_assign (".", (yyvsp[(3) - (3)].etree))); + } + break; + + case 288: +#line 1082 "ldgram.y" + { ldlex_script (); ldfile_open_command_file((yyvsp[(2) - (2)].name)); } + break; + + case 289: +#line 1084 "ldgram.y" + { ldlex_popstate (); } + break; + + case 290: +#line 1088 "ldgram.y" + { sectype = noload_section; } + break; + + case 291: +#line 1089 "ldgram.y" + { sectype = noalloc_section; } + break; + + case 292: +#line 1090 "ldgram.y" + { sectype = noalloc_section; } + break; + + case 293: +#line 1091 "ldgram.y" + { sectype = noalloc_section; } + break; + + case 294: +#line 1092 "ldgram.y" + { sectype = noalloc_section; } + break; + + case 296: +#line 1097 "ldgram.y" + { sectype = normal_section; } + break; + + case 297: +#line 1098 "ldgram.y" + { sectype = normal_section; } + break; + + case 298: +#line 1102 "ldgram.y" + { (yyval.etree) = (yyvsp[(1) - (3)].etree); } + break; + + case 299: +#line 1103 "ldgram.y" + { (yyval.etree) = (etree_type *)NULL; } + break; + + case 300: +#line 1108 "ldgram.y" + { (yyval.etree) = (yyvsp[(3) - (6)].etree); } + break; + + case 301: +#line 1110 "ldgram.y" + { (yyval.etree) = (yyvsp[(3) - (10)].etree); } + break; + + case 302: +#line 1114 "ldgram.y" + { (yyval.etree) = (yyvsp[(1) - (2)].etree); } + break; + + case 303: +#line 1115 "ldgram.y" + { (yyval.etree) = (etree_type *) NULL; } + break; + + case 304: +#line 1120 "ldgram.y" + { (yyval.integer) = 0; } + break; + + case 305: +#line 1122 "ldgram.y" + { (yyval.integer) = 1; } + break; + + case 306: +#line 1127 "ldgram.y" + { (yyval.name) = (yyvsp[(2) - (2)].name); } + break; + + case 307: +#line 1128 "ldgram.y" + { (yyval.name) = DEFAULT_MEMORY_REGION; } + break; + + case 308: +#line 1133 "ldgram.y" + { + (yyval.section_phdr) = NULL; + } + break; + + case 309: +#line 1137 "ldgram.y" + { + struct lang_output_section_phdr_list *n; + + n = ((struct lang_output_section_phdr_list *) + xmalloc (sizeof *n)); + n->name = (yyvsp[(3) - (3)].name); + n->used = FALSE; + n->next = (yyvsp[(1) - (3)].section_phdr); + (yyval.section_phdr) = n; + } + break; + + case 311: +#line 1153 "ldgram.y" + { + ldlex_script (); + lang_enter_overlay_section ((yyvsp[(2) - (2)].name)); + } + break; + + case 312: +#line 1158 "ldgram.y" + { ldlex_popstate (); ldlex_expression (); } + break; + + case 313: +#line 1160 "ldgram.y" + { + ldlex_popstate (); + lang_leave_overlay_section ((yyvsp[(9) - (9)].fill), (yyvsp[(8) - (9)].section_phdr)); + } + break; + + case 318: +#line 1177 "ldgram.y" + { ldlex_expression (); } + break; + + case 319: +#line 1178 "ldgram.y" + { ldlex_popstate (); } + break; + + case 320: +#line 1180 "ldgram.y" + { + lang_new_phdr ((yyvsp[(1) - (6)].name), (yyvsp[(3) - (6)].etree), (yyvsp[(4) - (6)].phdr).filehdr, (yyvsp[(4) - (6)].phdr).phdrs, (yyvsp[(4) - (6)].phdr).at, + (yyvsp[(4) - (6)].phdr).flags); + } + break; + + case 321: +#line 1188 "ldgram.y" + { + (yyval.etree) = (yyvsp[(1) - (1)].etree); + + if ((yyvsp[(1) - (1)].etree)->type.node_class == etree_name + && (yyvsp[(1) - (1)].etree)->type.node_code == NAME) + { + const char *s; + unsigned int i; + static const char * const phdr_types[] = + { + "PT_NULL", "PT_LOAD", "PT_DYNAMIC", + "PT_INTERP", "PT_NOTE", "PT_SHLIB", + "PT_PHDR", "PT_TLS" + }; + + s = (yyvsp[(1) - (1)].etree)->name.name; + for (i = 0; + i < sizeof phdr_types / sizeof phdr_types[0]; + i++) + if (strcmp (s, phdr_types[i]) == 0) + { + (yyval.etree) = exp_intop (i); + break; + } + if (i == sizeof phdr_types / sizeof phdr_types[0]) + { + if (strcmp (s, "PT_GNU_EH_FRAME") == 0) + (yyval.etree) = exp_intop (0x6474e550); + else if (strcmp (s, "PT_GNU_STACK") == 0) + (yyval.etree) = exp_intop (0x6474e551); + else + { + einfo (_("\ +%X%P:%S: unknown phdr type `%s' (try integer literal)\n"), + s); + (yyval.etree) = exp_intop (0); + } + } + } + } + break; + + case 322: +#line 1232 "ldgram.y" + { + memset (&(yyval.phdr), 0, sizeof (struct phdr_info)); + } + break; + + case 323: +#line 1236 "ldgram.y" + { + (yyval.phdr) = (yyvsp[(3) - (3)].phdr); + if (strcmp ((yyvsp[(1) - (3)].name), "FILEHDR") == 0 && (yyvsp[(2) - (3)].etree) == NULL) + (yyval.phdr).filehdr = TRUE; + else if (strcmp ((yyvsp[(1) - (3)].name), "PHDRS") == 0 && (yyvsp[(2) - (3)].etree) == NULL) + (yyval.phdr).phdrs = TRUE; + else if (strcmp ((yyvsp[(1) - (3)].name), "FLAGS") == 0 && (yyvsp[(2) - (3)].etree) != NULL) + (yyval.phdr).flags = (yyvsp[(2) - (3)].etree); + else + einfo (_("%X%P:%S: PHDRS syntax error at `%s'\n"), (yyvsp[(1) - (3)].name)); + } + break; + + case 324: +#line 1248 "ldgram.y" + { + (yyval.phdr) = (yyvsp[(5) - (5)].phdr); + (yyval.phdr).at = (yyvsp[(3) - (5)].etree); + } + break; + + case 325: +#line 1256 "ldgram.y" + { + (yyval.etree) = NULL; + } + break; + + case 326: +#line 1260 "ldgram.y" + { + (yyval.etree) = (yyvsp[(2) - (3)].etree); + } + break; + + case 327: +#line 1266 "ldgram.y" + { + ldlex_version_file (); + PUSH_ERROR (_("dynamic list")); + } + break; + + case 328: +#line 1271 "ldgram.y" + { + ldlex_popstate (); + POP_ERROR (); + } + break; + + case 332: +#line 1288 "ldgram.y" + { + lang_append_dynamic_list ((yyvsp[(1) - (2)].versyms)); + } + break; + + case 333: +#line 1296 "ldgram.y" + { + ldlex_version_file (); + PUSH_ERROR (_("VERSION script")); + } + break; + + case 334: +#line 1301 "ldgram.y" + { + ldlex_popstate (); + POP_ERROR (); + } + break; + + case 335: +#line 1310 "ldgram.y" + { + ldlex_version_script (); + } + break; + + case 336: +#line 1314 "ldgram.y" + { + ldlex_popstate (); + } + break; + + case 339: +#line 1326 "ldgram.y" + { + lang_register_vers_node (NULL, (yyvsp[(2) - (4)].versnode), NULL); + } + break; + + case 340: +#line 1330 "ldgram.y" + { + lang_register_vers_node ((yyvsp[(1) - (5)].name), (yyvsp[(3) - (5)].versnode), NULL); + } + break; + + case 341: +#line 1334 "ldgram.y" + { + lang_register_vers_node ((yyvsp[(1) - (6)].name), (yyvsp[(3) - (6)].versnode), (yyvsp[(5) - (6)].deflist)); + } + break; + + case 342: +#line 1341 "ldgram.y" + { + (yyval.deflist) = lang_add_vers_depend (NULL, (yyvsp[(1) - (1)].name)); + } + break; + + case 343: +#line 1345 "ldgram.y" + { + (yyval.deflist) = lang_add_vers_depend ((yyvsp[(1) - (2)].deflist), (yyvsp[(2) - (2)].name)); + } + break; + + case 344: +#line 1352 "ldgram.y" + { + (yyval.versnode) = lang_new_vers_node (NULL, NULL); + } + break; + + case 345: +#line 1356 "ldgram.y" + { + (yyval.versnode) = lang_new_vers_node ((yyvsp[(1) - (2)].versyms), NULL); + } + break; + + case 346: +#line 1360 "ldgram.y" + { + (yyval.versnode) = lang_new_vers_node ((yyvsp[(3) - (4)].versyms), NULL); + } + break; + + case 347: +#line 1364 "ldgram.y" + { + (yyval.versnode) = lang_new_vers_node (NULL, (yyvsp[(3) - (4)].versyms)); + } + break; + + case 348: +#line 1368 "ldgram.y" + { + (yyval.versnode) = lang_new_vers_node ((yyvsp[(3) - (8)].versyms), (yyvsp[(7) - (8)].versyms)); + } + break; + + case 349: +#line 1375 "ldgram.y" + { + (yyval.versyms) = lang_new_vers_pattern (NULL, (yyvsp[(1) - (1)].name), ldgram_vers_current_lang, FALSE); + } + break; + + case 350: +#line 1379 "ldgram.y" + { + (yyval.versyms) = lang_new_vers_pattern (NULL, (yyvsp[(1) - (1)].name), ldgram_vers_current_lang, TRUE); + } + break; + + case 351: +#line 1383 "ldgram.y" + { + (yyval.versyms) = lang_new_vers_pattern ((yyvsp[(1) - (3)].versyms), (yyvsp[(3) - (3)].name), ldgram_vers_current_lang, FALSE); + } + break; + + case 352: +#line 1387 "ldgram.y" + { + (yyval.versyms) = lang_new_vers_pattern ((yyvsp[(1) - (3)].versyms), (yyvsp[(3) - (3)].name), ldgram_vers_current_lang, TRUE); + } + break; + + case 353: +#line 1391 "ldgram.y" + { + (yyval.name) = ldgram_vers_current_lang; + ldgram_vers_current_lang = (yyvsp[(4) - (5)].name); + } + break; + + case 354: +#line 1396 "ldgram.y" + { + struct bfd_elf_version_expr *pat; + for (pat = (yyvsp[(7) - (9)].versyms); pat->next != NULL; pat = pat->next); + pat->next = (yyvsp[(1) - (9)].versyms); + (yyval.versyms) = (yyvsp[(7) - (9)].versyms); + ldgram_vers_current_lang = (yyvsp[(6) - (9)].name); + } + break; + + case 355: +#line 1404 "ldgram.y" + { + (yyval.name) = ldgram_vers_current_lang; + ldgram_vers_current_lang = (yyvsp[(2) - (3)].name); + } + break; + + case 356: +#line 1409 "ldgram.y" + { + (yyval.versyms) = (yyvsp[(5) - (7)].versyms); + ldgram_vers_current_lang = (yyvsp[(4) - (7)].name); + } + break; + + case 357: +#line 1414 "ldgram.y" + { + (yyval.versyms) = lang_new_vers_pattern (NULL, "global", ldgram_vers_current_lang, FALSE); + } + break; + + case 358: +#line 1418 "ldgram.y" + { + (yyval.versyms) = lang_new_vers_pattern ((yyvsp[(1) - (3)].versyms), "global", ldgram_vers_current_lang, FALSE); + } + break; + + case 359: +#line 1422 "ldgram.y" + { + (yyval.versyms) = lang_new_vers_pattern (NULL, "local", ldgram_vers_current_lang, FALSE); + } + break; + + case 360: +#line 1426 "ldgram.y" + { + (yyval.versyms) = lang_new_vers_pattern ((yyvsp[(1) - (3)].versyms), "local", ldgram_vers_current_lang, FALSE); + } + break; + + case 361: +#line 1430 "ldgram.y" + { + (yyval.versyms) = lang_new_vers_pattern (NULL, "extern", ldgram_vers_current_lang, FALSE); + } + break; + + case 362: +#line 1434 "ldgram.y" + { + (yyval.versyms) = lang_new_vers_pattern ((yyvsp[(1) - (3)].versyms), "extern", ldgram_vers_current_lang, FALSE); + } + break; + + +/* Line 1267 of yacc.c. */ +#line 4414 "ldgram.c" + default: break; + } + YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); + + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + + *++yyvsp = yyval; + + + /* Now `shift' the result of the reduction. Determine what state + that goes to, based on the state we popped back to and the rule + number reduced by. */ + + yyn = yyr1[yyn]; + + yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; + if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yytable[yystate]; + else + yystate = yydefgoto[yyn - YYNTOKENS]; + + goto yynewstate; + + +/*------------------------------------. +| yyerrlab -- here on detecting error | +`------------------------------------*/ +yyerrlab: + /* If not already recovering from an error, report this error. */ + if (!yyerrstatus) + { + ++yynerrs; +#if ! YYERROR_VERBOSE + yyerror (YY_("syntax error")); +#else + { + YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); + if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) + { + YYSIZE_T yyalloc = 2 * yysize; + if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) + yyalloc = YYSTACK_ALLOC_MAXIMUM; + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); + yymsg = (char *) YYSTACK_ALLOC (yyalloc); + if (yymsg) + yymsg_alloc = yyalloc; + else + { + yymsg = yymsgbuf; + yymsg_alloc = sizeof yymsgbuf; + } + } + + if (0 < yysize && yysize <= yymsg_alloc) + { + (void) yysyntax_error (yymsg, yystate, yychar); + yyerror (yymsg); + } + else + { + yyerror (YY_("syntax error")); + if (yysize != 0) + goto yyexhaustedlab; + } + } +#endif + } + + + + if (yyerrstatus == 3) + { + /* If just tried and failed to reuse look-ahead token after an + error, discard it. */ + + if (yychar <= YYEOF) + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } + else + { + yydestruct ("Error: discarding", + yytoken, &yylval); + yychar = YYEMPTY; + } + } + + /* Else will try to reuse look-ahead token after shifting the error + token. */ + goto yyerrlab1; + + +/*---------------------------------------------------. +| yyerrorlab -- error raised explicitly by YYERROR. | +`---------------------------------------------------*/ +yyerrorlab: + + /* Pacify compilers like GCC when the user code never invokes + YYERROR and the label yyerrorlab therefore never appears in user + code. */ + if (/*CONSTCOND*/ 0) + goto yyerrorlab; + + /* Do not reclaim the symbols of the rule which action triggered + this YYERROR. */ + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + yystate = *yyssp; + goto yyerrlab1; + + +/*-------------------------------------------------------------. +| yyerrlab1 -- common code for both syntax error and YYERROR. | +`-------------------------------------------------------------*/ +yyerrlab1: + yyerrstatus = 3; /* Each real token shifted decrements this. */ + + for (;;) + { + yyn = yypact[yystate]; + if (yyn != YYPACT_NINF) + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } + + /* Pop the current state because it cannot handle the error token. */ + if (yyssp == yyss) + YYABORT; + + + yydestruct ("Error: popping", + yystos[yystate], yyvsp); + YYPOPSTACK (1); + yystate = *yyssp; + YY_STACK_PRINT (yyss, yyssp); + } + + if (yyn == YYFINAL) + YYACCEPT; + + *++yyvsp = yylval; + + + /* Shift the error token. */ + YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); + + yystate = yyn; + goto yynewstate; + + +/*-------------------------------------. +| yyacceptlab -- YYACCEPT comes here. | +`-------------------------------------*/ +yyacceptlab: + yyresult = 0; + goto yyreturn; + +/*-----------------------------------. +| yyabortlab -- YYABORT comes here. | +`-----------------------------------*/ +yyabortlab: + yyresult = 1; + goto yyreturn; + +#ifndef yyoverflow +/*-------------------------------------------------. +| yyexhaustedlab -- memory exhaustion comes here. | +`-------------------------------------------------*/ +yyexhaustedlab: + yyerror (YY_("memory exhausted")); + yyresult = 2; + /* Fall through. */ +#endif + +yyreturn: + if (yychar != YYEOF && yychar != YYEMPTY) + yydestruct ("Cleanup: discarding lookahead", + yytoken, &yylval); + /* Do not reclaim the symbols of the rule which action triggered + this YYABORT or YYACCEPT. */ + YYPOPSTACK (yylen); + YY_STACK_PRINT (yyss, yyssp); + while (yyssp != yyss) + { + yydestruct ("Cleanup: popping", + yystos[*yyssp], yyvsp); + YYPOPSTACK (1); + } +#ifndef yyoverflow + if (yyss != yyssa) + YYSTACK_FREE (yyss); +#endif +#if YYERROR_VERBOSE + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); +#endif + /* Make sure YYID is used. */ + return YYID (yyresult); +} + + +#line 1444 "ldgram.y" + +void +yyerror(arg) + const char *arg; +{ + if (ldfile_assumed_script) + einfo (_("%P:%s: file format not recognized; treating as linker script\n"), + ldfile_input_filename); + if (error_index > 0 && error_index < ERROR_NAME_MAX) + einfo ("%P%F:%S: %s in %s\n", arg, error_names[error_index-1]); + else + einfo ("%P%F:%S: %s\n", arg); +} + diff --git a/ld/ldgram.h b/ld/ldgram.h new file mode 100644 index 0000000..688128e --- /dev/null +++ b/ld/ldgram.h @@ -0,0 +1,339 @@ +/* A Bison parser, made by GNU Bison 2.3. */ + +/* Skeleton interface for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + INT = 258, + NAME = 259, + LNAME = 260, + OREQ = 261, + ANDEQ = 262, + RSHIFTEQ = 263, + LSHIFTEQ = 264, + DIVEQ = 265, + MULTEQ = 266, + MINUSEQ = 267, + PLUSEQ = 268, + OROR = 269, + ANDAND = 270, + NE = 271, + EQ = 272, + GE = 273, + LE = 274, + RSHIFT = 275, + LSHIFT = 276, + UNARY = 277, + END = 278, + ALIGN_K = 279, + BLOCK = 280, + BIND = 281, + QUAD = 282, + SQUAD = 283, + LONG = 284, + SHORT = 285, + BYTE = 286, + SECTIONS = 287, + PHDRS = 288, + INSERT_K = 289, + AFTER = 290, + BEFORE = 291, + DATA_SEGMENT_ALIGN = 292, + DATA_SEGMENT_RELRO_END = 293, + DATA_SEGMENT_END = 294, + SORT_BY_NAME = 295, + SORT_BY_ALIGNMENT = 296, + SORT_BY_INIT_PRIORITY = 297, + SIZEOF_HEADERS = 298, + OUTPUT_FORMAT = 299, + FORCE_COMMON_ALLOCATION = 300, + OUTPUT_ARCH = 301, + INHIBIT_COMMON_ALLOCATION = 302, + SEGMENT_START = 303, + INCLUDE = 304, + MEMORY = 305, + REGION_ALIAS = 306, + LD_FEATURE = 307, + NOLOAD = 308, + DSECT = 309, + COPY = 310, + INFO = 311, + OVERLAY = 312, + DEFINED = 313, + TARGET_K = 314, + SEARCH_DIR = 315, + MAP = 316, + ENTRY = 317, + NEXT = 318, + SIZEOF = 319, + ALIGNOF = 320, + ADDR = 321, + LOADADDR = 322, + MAX_K = 323, + MIN_K = 324, + STARTUP = 325, + HLL = 326, + SYSLIB = 327, + FLOAT = 328, + NOFLOAT = 329, + NOCROSSREFS = 330, + ORIGIN = 331, + FILL = 332, + LENGTH = 333, + CREATE_OBJECT_SYMBOLS = 334, + INPUT = 335, + GROUP = 336, + OUTPUT = 337, + CONSTRUCTORS = 338, + ALIGNMOD = 339, + AT = 340, + SUBALIGN = 341, + PROVIDE = 342, + PROVIDE_HIDDEN = 343, + AS_NEEDED = 344, + CHIP = 345, + LIST = 346, + SECT = 347, + ABSOLUTE = 348, + LOAD = 349, + NEWLINE = 350, + ENDWORD = 351, + ORDER = 352, + NAMEWORD = 353, + ASSERT_K = 354, + FORMAT = 355, + PUBLIC = 356, + DEFSYMEND = 357, + BASE = 358, + ALIAS = 359, + TRUNCATE = 360, + REL = 361, + INPUT_SCRIPT = 362, + INPUT_MRI_SCRIPT = 363, + INPUT_DEFSYM = 364, + CASE = 365, + EXTERN = 366, + START = 367, + VERS_TAG = 368, + VERS_IDENTIFIER = 369, + GLOBAL = 370, + LOCAL = 371, + VERSIONK = 372, + INPUT_VERSION_SCRIPT = 373, + KEEP = 374, + ONLY_IF_RO = 375, + ONLY_IF_RW = 376, + SPECIAL = 377, + INPUT_SECTION_FLAGS = 378, + EXCLUDE_FILE = 379, + CONSTANT = 380, + INPUT_DYNAMIC_LIST = 381 + }; +#endif +/* Tokens. */ +#define INT 258 +#define NAME 259 +#define LNAME 260 +#define OREQ 261 +#define ANDEQ 262 +#define RSHIFTEQ 263 +#define LSHIFTEQ 264 +#define DIVEQ 265 +#define MULTEQ 266 +#define MINUSEQ 267 +#define PLUSEQ 268 +#define OROR 269 +#define ANDAND 270 +#define NE 271 +#define EQ 272 +#define GE 273 +#define LE 274 +#define RSHIFT 275 +#define LSHIFT 276 +#define UNARY 277 +#define END 278 +#define ALIGN_K 279 +#define BLOCK 280 +#define BIND 281 +#define QUAD 282 +#define SQUAD 283 +#define LONG 284 +#define SHORT 285 +#define BYTE 286 +#define SECTIONS 287 +#define PHDRS 288 +#define INSERT_K 289 +#define AFTER 290 +#define BEFORE 291 +#define DATA_SEGMENT_ALIGN 292 +#define DATA_SEGMENT_RELRO_END 293 +#define DATA_SEGMENT_END 294 +#define SORT_BY_NAME 295 +#define SORT_BY_ALIGNMENT 296 +#define SORT_BY_INIT_PRIORITY 297 +#define SIZEOF_HEADERS 298 +#define OUTPUT_FORMAT 299 +#define FORCE_COMMON_ALLOCATION 300 +#define OUTPUT_ARCH 301 +#define INHIBIT_COMMON_ALLOCATION 302 +#define SEGMENT_START 303 +#define INCLUDE 304 +#define MEMORY 305 +#define REGION_ALIAS 306 +#define LD_FEATURE 307 +#define NOLOAD 308 +#define DSECT 309 +#define COPY 310 +#define INFO 311 +#define OVERLAY 312 +#define DEFINED 313 +#define TARGET_K 314 +#define SEARCH_DIR 315 +#define MAP 316 +#define ENTRY 317 +#define NEXT 318 +#define SIZEOF 319 +#define ALIGNOF 320 +#define ADDR 321 +#define LOADADDR 322 +#define MAX_K 323 +#define MIN_K 324 +#define STARTUP 325 +#define HLL 326 +#define SYSLIB 327 +#define FLOAT 328 +#define NOFLOAT 329 +#define NOCROSSREFS 330 +#define ORIGIN 331 +#define FILL 332 +#define LENGTH 333 +#define CREATE_OBJECT_SYMBOLS 334 +#define INPUT 335 +#define GROUP 336 +#define OUTPUT 337 +#define CONSTRUCTORS 338 +#define ALIGNMOD 339 +#define AT 340 +#define SUBALIGN 341 +#define PROVIDE 342 +#define PROVIDE_HIDDEN 343 +#define AS_NEEDED 344 +#define CHIP 345 +#define LIST 346 +#define SECT 347 +#define ABSOLUTE 348 +#define LOAD 349 +#define NEWLINE 350 +#define ENDWORD 351 +#define ORDER 352 +#define NAMEWORD 353 +#define ASSERT_K 354 +#define FORMAT 355 +#define PUBLIC 356 +#define DEFSYMEND 357 +#define BASE 358 +#define ALIAS 359 +#define TRUNCATE 360 +#define REL 361 +#define INPUT_SCRIPT 362 +#define INPUT_MRI_SCRIPT 363 +#define INPUT_DEFSYM 364 +#define CASE 365 +#define EXTERN 366 +#define START 367 +#define VERS_TAG 368 +#define VERS_IDENTIFIER 369 +#define GLOBAL 370 +#define LOCAL 371 +#define VERSIONK 372 +#define INPUT_VERSION_SCRIPT 373 +#define KEEP 374 +#define ONLY_IF_RO 375 +#define ONLY_IF_RW 376 +#define SPECIAL 377 +#define INPUT_SECTION_FLAGS 378 +#define EXCLUDE_FILE 379 +#define CONSTANT 380 +#define INPUT_DYNAMIC_LIST 381 + + + + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef union YYSTYPE +#line 62 "ldgram.y" +{ + bfd_vma integer; + struct big_int + { + bfd_vma integer; + char *str; + } bigint; + fill_type *fill; + char *name; + const char *cname; + struct wildcard_spec wildcard; + struct wildcard_list *wildcard_list; + struct name_list *name_list; + struct flag_info_list *flag_info_list; + struct flag_info *flag_info; + int token; + union etree_union *etree; + struct phdr_info + { + bfd_boolean filehdr; + bfd_boolean phdrs; + union etree_union *at; + union etree_union *flags; + } phdr; + struct lang_nocrossref *nocrossref; + struct lang_output_section_phdr_list *section_phdr; + struct bfd_elf_version_deps *deflist; + struct bfd_elf_version_expr *versyms; + struct bfd_elf_version_tree *versnode; +} +/* Line 1529 of yacc.c. */ +#line 332 "ldgram.h" + YYSTYPE; +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + +extern YYSTYPE yylval; + diff --git a/ld/ldgram.y b/ld/ldgram.y index 3795ffe..36ccb5b 100644 --- a/ld/ldgram.y +++ b/ld/ldgram.y @@ -72,6 +72,8 @@ static int error_index; struct wildcard_spec wildcard; struct wildcard_list *wildcard_list; struct name_list *name_list; + struct flag_info_list *flag_info_list; + struct flag_info *flag_info; int token; union etree_union *etree; struct phdr_info @@ -93,6 +95,8 @@ static int error_index; %type fill_opt fill_exp %type exclude_name_list %type file_NAME_list +%type sect_flag_list +%type sect_flags %type memspec_opt casesymlist %type memspec_at_opt %type wildcard_name @@ -150,7 +154,7 @@ static int error_index; %token INPUT_SCRIPT INPUT_MRI_SCRIPT INPUT_DEFSYM CASE EXTERN START %token VERS_TAG VERS_IDENTIFIER %token GLOBAL LOCAL VERSIONK INPUT_VERSION_SCRIPT -%token KEEP ONLY_IF_RO ONLY_IF_RW SPECIAL +%token KEEP ONLY_IF_RO ONLY_IF_RW SPECIAL INPUT_SECTION_FLAGS %token EXCLUDE_FILE %token CONSTANT %type vers_defns @@ -437,60 +441,121 @@ wildcard_spec: $$.name = $1; $$.sorted = none; $$.exclude_name_list = NULL; + $$.section_flag_list = NULL; } | EXCLUDE_FILE '(' exclude_name_list ')' wildcard_name { $$.name = $5; $$.sorted = none; $$.exclude_name_list = $3; + $$.section_flag_list = NULL; } | SORT_BY_NAME '(' wildcard_name ')' { $$.name = $3; $$.sorted = by_name; $$.exclude_name_list = NULL; + $$.section_flag_list = NULL; } | SORT_BY_ALIGNMENT '(' wildcard_name ')' { $$.name = $3; $$.sorted = by_alignment; $$.exclude_name_list = NULL; + $$.section_flag_list = NULL; } | SORT_BY_NAME '(' SORT_BY_ALIGNMENT '(' wildcard_name ')' ')' { $$.name = $5; $$.sorted = by_name_alignment; $$.exclude_name_list = NULL; + $$.section_flag_list = NULL; } | SORT_BY_NAME '(' SORT_BY_NAME '(' wildcard_name ')' ')' { $$.name = $5; $$.sorted = by_name; $$.exclude_name_list = NULL; + $$.section_flag_list = NULL; } | SORT_BY_ALIGNMENT '(' SORT_BY_NAME '(' wildcard_name ')' ')' { $$.name = $5; $$.sorted = by_alignment_name; $$.exclude_name_list = NULL; + $$.section_flag_list = NULL; } | SORT_BY_ALIGNMENT '(' SORT_BY_ALIGNMENT '(' wildcard_name ')' ')' { $$.name = $5; $$.sorted = by_alignment; $$.exclude_name_list = NULL; + $$.section_flag_list = NULL; } | SORT_BY_NAME '(' EXCLUDE_FILE '(' exclude_name_list ')' wildcard_name ')' { $$.name = $7; $$.sorted = by_name; $$.exclude_name_list = $5; + $$.section_flag_list = NULL; } | SORT_BY_INIT_PRIORITY '(' wildcard_name ')' { $$.name = $3; $$.sorted = by_init_priority; $$.exclude_name_list = NULL; + $$.section_flag_list = NULL; + } + ; + +sect_flag_list: NAME + { + struct flag_info_list *n; + n = ((struct flag_info_list *) xmalloc (sizeof *n)); + if ($1[0] == '!') + { + n->with = without_flags; + n->name = &$1[1]; + } + else + { + n->with = with_flags; + n->name = $1; + } + n->valid = FALSE; + n->next = NULL; + $$ = n; + } + | sect_flag_list '&' NAME + { + struct flag_info_list *n; + n = ((struct flag_info_list *) xmalloc (sizeof *n)); + if ($3[0] == '!') + { + n->with = without_flags; + n->name = &$3[1]; + } + else + { + n->with = with_flags; + n->name = $3; + } + n->valid = FALSE; + n->next = $1; + $$ = n; + } + ; + +sect_flags: + INPUT_SECTION_FLAGS '(' sect_flag_list ')' + { + struct flag_info *n; + n = ((struct flag_info *) xmalloc (sizeof *n)); + n->flag_list = $3; + n->flags_initialized = FALSE; + n->not_with_flags = 0; + n->only_with_flags = 0; + $$ = n; } ; @@ -541,16 +606,40 @@ input_section_spec_no_keep: tmp.name = $1; tmp.exclude_name_list = NULL; tmp.sorted = none; + tmp.section_flag_list = NULL; + lang_add_wild (&tmp, NULL, ldgram_had_keep); + } + | sect_flags NAME + { + struct wildcard_spec tmp; + tmp.name = $2; + tmp.exclude_name_list = NULL; + tmp.sorted = none; + tmp.section_flag_list = $1; lang_add_wild (&tmp, NULL, ldgram_had_keep); } | '[' file_NAME_list ']' { lang_add_wild (NULL, $2, ldgram_had_keep); } + | sect_flags '[' file_NAME_list ']' + { + struct wildcard_spec tmp; + tmp.name = NULL; + tmp.exclude_name_list = NULL; + tmp.sorted = none; + tmp.section_flag_list = $1; + lang_add_wild (NULL, $3, ldgram_had_keep); + } | wildcard_spec '(' file_NAME_list ')' { lang_add_wild (&$1, $3, ldgram_had_keep); } + | sect_flags wildcard_spec '(' file_NAME_list ')' + { + $2.section_flag_list = $1; + lang_add_wild (&$2, $4, ldgram_had_keep); + } ; input_section_spec: diff --git a/ld/ldlang.c b/ld/ldlang.c index 2c07fa4..2c56b56 100644 --- a/ld/ldlang.c +++ b/ld/ldlang.c @@ -237,6 +237,9 @@ walk_wild_consider_section (lang_wild_statement_type *ptr, { struct name_list *list_tmp; + /* Propagate the section_flag_info from the wild statement to the section. */ + s->section_flag_info = ptr->section_flag_list; + /* Don't process sections from files which were excluded. */ for (list_tmp = sec->spec.exclude_name_list; list_tmp; @@ -1130,6 +1133,7 @@ new_afile (const char *name, #ifdef ENABLE_PLUGINS p->claimed = FALSE; p->claim_archive = FALSE; + p->reload = FALSE; #endif /* ENABLE_PLUGINS */ lang_statement_append (&input_file_chain, @@ -1579,8 +1583,14 @@ lang_output_section_find_by_flags (const asection *sec, } flags ^= sec->flags; if (!(flags & (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD - | SEC_READONLY)) - && !(look->flags & (SEC_SMALL_DATA | SEC_THREAD_LOCAL))) + | SEC_READONLY | SEC_SMALL_DATA)) + || (!(flags & (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD + | SEC_READONLY)) + && !(look->flags & SEC_SMALL_DATA)) + || (!(flags & (SEC_THREAD_LOCAL | SEC_ALLOC)) + && (look->flags & SEC_THREAD_LOCAL) + && (!(flags & SEC_LOAD) + || (look->flags & SEC_LOAD)))) found = look; } } @@ -2094,9 +2104,6 @@ static bfd_boolean sort_def_symbol (struct bfd_link_hash_entry *hash_entry, void *info ATTRIBUTE_UNUSED) { - if (hash_entry->type == bfd_link_hash_warning) - hash_entry = (struct bfd_link_hash_entry *) hash_entry->u.i.link; - if (hash_entry->type == bfd_link_hash_defined || hash_entry->type == bfd_link_hash_defweak) { @@ -2253,8 +2260,11 @@ lang_add_section (lang_statement_list_type *ptr, lang_output_section_statement_type *output) { flagword flags = section->flags; + struct flag_info *sflag_info = section->section_flag_info; + bfd_boolean discard; lang_input_section_type *new_section; + bfd *abfd = link_info.output_bfd; /* Discard sections marked with SEC_EXCLUDE. */ discard = (flags & SEC_EXCLUDE) != 0; @@ -2280,6 +2290,28 @@ lang_add_section (lang_statement_list_type *ptr, return; } + if (sflag_info) + { + if (sflag_info->flags_initialized == FALSE) + bfd_lookup_section_flags (&link_info, sflag_info); + + if (sflag_info->only_with_flags != 0 + && sflag_info->not_with_flags != 0 + && ((sflag_info->not_with_flags & flags) != 0 + || (sflag_info->only_with_flags & flags) + != sflag_info->only_with_flags)) + return; + + if (sflag_info->only_with_flags != 0 + && (sflag_info->only_with_flags & flags) + != sflag_info->only_with_flags) + return; + + if (sflag_info->not_with_flags != 0 + && (sflag_info->not_with_flags & flags) != 0) + return; + } + if (section->output_section != NULL) return; @@ -2749,7 +2781,10 @@ load_symbols (lang_input_statement_type *entry, break; case bfd_object: - ldlang_add_file (entry); +#ifdef ENABLE_PLUGINS + if (!entry->reload) +#endif + ldlang_add_file (entry); if (trace_files || trace_file_tries) info_msg ("%I\n", entry); break; @@ -3016,7 +3051,7 @@ lang_get_output_target (void) /* No - has the current target been set to something other than the default? */ - if (current_target != default_target) + if (current_target != default_target && current_target != NULL) return current_target; /* No - can we determine the format of the first input file? */ @@ -3241,6 +3276,19 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode) && bfd_check_format (s->input_statement.the_bfd, bfd_archive)) s->input_statement.loaded = FALSE; +#ifdef ENABLE_PLUGINS + /* When rescanning, reload --as-needed shared libs. */ + else if ((mode & OPEN_BFD_RESCAN) != 0 + && plugin_insert == NULL + && s->input_statement.loaded + && s->input_statement.add_DT_NEEDED_for_regular + && ((s->input_statement.the_bfd->flags) & DYNAMIC) != 0 + && plugin_should_reload (s->input_statement.the_bfd)) + { + s->input_statement.loaded = FALSE; + s->input_statement.reload = TRUE; + } +#endif os_tail = lang_output_section_statement.tail; lang_list_init (&add); @@ -4048,9 +4096,8 @@ print_assignment (lang_assignment_statement_type *assignment, if (h) { value = h->u.def.value; - - if (expld.result.section != NULL) - value += expld.result.section->vma; + value += h->u.def.section->output_section->vma; + value += h->u.def.section->output_offset; minfo ("[0x%V]", value); } @@ -5606,8 +5653,9 @@ lang_do_assignments_1 (lang_statement_union_type *s, } void -lang_do_assignments (void) +lang_do_assignments (lang_phase_type phase) { + expld.phase = phase; lang_statement_iteration++; lang_do_assignments_1 (statement_list.head, abs_output_section, NULL, 0); } @@ -6403,7 +6451,7 @@ lang_relax_sections (bfd_boolean need_layout) /* Do all the assignments with our current guesses as to section sizes. */ - lang_do_assignments (); + lang_do_assignments (lang_assigning_phase_enum); /* We must do this after lang_do_assignments, because it uses size. */ @@ -6424,7 +6472,7 @@ lang_relax_sections (bfd_boolean need_layout) if (need_layout) { /* Final extra sizing to report errors. */ - lang_do_assignments (); + lang_do_assignments (lang_assigning_phase_enum); lang_reset_memory_regions (); lang_size_sections (NULL, TRUE); } @@ -6541,6 +6589,7 @@ lang_process (void) einfo (_("%P%F: %s: plugin reported error after all symbols read\n"), plugin_error_plugin ()); /* Open any newly added files, updating the file chains. */ + link_info.loading_lto_outputs = TRUE; open_input_bfds (added.head, OPEN_BFD_NORMAL); /* Restore the global list pointer now they have all been added. */ lang_list_remove_tail (stat_ptr, &added); @@ -6666,8 +6715,7 @@ lang_process (void) /* Do all the assignments, now that we know the final resting places of all the symbols. */ - expld.phase = lang_final_phase_enum; - lang_do_assignments (); + lang_do_assignments (lang_final_phase_enum); ldemul_finish (); @@ -6711,10 +6759,12 @@ lang_add_wild (struct wildcard_spec *filespec, new_stmt = new_stat (lang_wild_statement, stat_ptr); new_stmt->filename = NULL; new_stmt->filenames_sorted = FALSE; + new_stmt->section_flag_list = NULL; if (filespec != NULL) { new_stmt->filename = filespec->name; new_stmt->filenames_sorted = filespec->sorted == by_name; + new_stmt->section_flag_list = filespec->section_flag_list; } new_stmt->section_list = section_list; new_stmt->keep_sections = keep_sections; @@ -6912,11 +6962,13 @@ lang_leave_output_section_statement (fill_type *fill, const char *memspec, current_section->load_base != NULL, current_section->addr_tree != NULL); - /* If this section has no load region or base, but has the same + /* If this section has no load region or base, but uses the same region as the previous section, then propagate the previous section's load region. */ - if (!current_section->lma_region && !current_section->load_base + if (current_section->lma_region == NULL + && current_section->load_base == NULL + && current_section->addr_tree == NULL && current_section->region == current_section->prev->region) current_section->lma_region = current_section->prev->lma_region; @@ -7423,10 +7475,6 @@ lang_leave_overlay (etree_type *lma_expr, /* Version handling. This is only useful for ELF. */ -/* This global variable holds the version tree that we build. */ - -struct bfd_elf_version_tree *lang_elf_version_info; - /* If PREV is NULL, return first version pattern matching particular symbol. If PREV is non-NULL, return first version pattern matching particular symbol after PREV (previously returned by lang_vers_match). */ @@ -7768,8 +7816,8 @@ lang_register_vers_node (const char *name, if (name == NULL) name = ""; - if ((name[0] == '\0' && lang_elf_version_info != NULL) - || (lang_elf_version_info && lang_elf_version_info->name[0] == '\0')) + if (link_info.version_info != NULL + && (name[0] == '\0' || link_info.version_info->name[0] == '\0')) { einfo (_("%X%P: anonymous version tag cannot be combined" " with other version tags\n")); @@ -7778,7 +7826,7 @@ lang_register_vers_node (const char *name, } /* Make sure this node has a unique name. */ - for (t = lang_elf_version_info; t != NULL; t = t->next) + for (t = link_info.version_info; t != NULL; t = t->next) if (strcmp (t->name, name) == 0) einfo (_("%X%P: duplicate version tag `%s'\n"), name); @@ -7790,7 +7838,7 @@ lang_register_vers_node (const char *name, for (e1 = version->globals.list; e1 != NULL; e1 = e1->next) { - for (t = lang_elf_version_info; t != NULL; t = t->next) + for (t = link_info.version_info; t != NULL; t = t->next) { struct bfd_elf_version_expr *e2; @@ -7817,7 +7865,7 @@ lang_register_vers_node (const char *name, for (e1 = version->locals.list; e1 != NULL; e1 = e1->next) { - for (t = lang_elf_version_info; t != NULL; t = t->next) + for (t = link_info.version_info; t != NULL; t = t->next) { struct bfd_elf_version_expr *e2; @@ -7853,7 +7901,7 @@ lang_register_vers_node (const char *name, else version->vernum = 0; - for (pp = &lang_elf_version_info; *pp != NULL; pp = &(*pp)->next) + for (pp = &link_info.version_info; *pp != NULL; pp = &(*pp)->next) ; *pp = version; } @@ -7869,7 +7917,7 @@ lang_add_vers_depend (struct bfd_elf_version_deps *list, const char *name) ret = (struct bfd_elf_version_deps *) xmalloc (sizeof *ret); ret->next = list; - for (t = lang_elf_version_info; t != NULL; t = t->next) + for (t = link_info.version_info; t != NULL; t = t->next) { if (strcmp (t->name, name) == 0) { diff --git a/ld/ldlang.h b/ld/ldlang.h index db47af8..95f9412 100644 --- a/ld/ldlang.h +++ b/ld/ldlang.h @@ -240,6 +240,8 @@ typedef struct lang_input_statement_struct bfd *the_bfd; + struct flag_info *section_flag_list; + /* Point to the next file - whatever it is, wanders up and down archives */ union lang_statement_union *next; @@ -268,12 +270,13 @@ typedef struct lang_input_statement_struct /* Whether to search for this entry as a dynamic archive. */ unsigned int dynamic : 1; - /* Whether DT_NEEDED tags should be added for dynamic libraries in - DT_NEEDED tags from this entry. */ + /* Set if a DT_NEEDED tag should be added not just for the dynamic library + explicitly given by this entry but also for any dynamic libraries in + this entry's needed list. */ unsigned int add_DT_NEEDED_for_dynamic : 1; - /* Whether this entry should cause a DT_NEEDED tag only when - satisfying references from regular files, or always. */ + /* Set if this entry should cause a DT_NEEDED tag only when some + regular file references its symbols (ie. --as-needed is in effect). */ unsigned int add_DT_NEEDED_for_regular : 1; /* Whether to include the entire contents of an archive. */ @@ -293,6 +296,9 @@ typedef struct lang_input_statement_struct /* Set if the file was claimed from an archive. */ unsigned int claim_archive : 1; + + /* Set if reloading an --as-needed lib. */ + unsigned int reload : 1; #endif /* ENABLE_PLUGINS */ } lang_input_statement_type; @@ -337,6 +343,7 @@ struct lang_wild_statement_struct walk_wild_section_handler_t walk_wild_section_handler; struct wildcard_list *handler_data[4]; lang_section_bst_type *tree; + struct flag_info *section_flag_list; }; typedef struct lang_address_statement_struct @@ -543,7 +550,7 @@ extern void lang_for_each_file extern void lang_reset_memory_regions (void); extern void lang_do_assignments - (void); + (lang_phase_type); #define LANG_FOR_EACH_INPUT_STATEMENT(statement) \ lang_input_statement_type *statement; \ @@ -625,8 +632,6 @@ extern void lang_leave_overlay (etree_type *, int, fill_type *, const char *, lang_output_section_phdr_list *, const char *); -extern struct bfd_elf_version_tree *lang_elf_version_info; - extern struct bfd_elf_version_expr *lang_new_vers_pattern (struct bfd_elf_version_expr *, const char *, const char *, bfd_boolean); extern struct bfd_elf_version_tree *lang_new_vers_node diff --git a/ld/ldlex.c b/ld/ldlex.c new file mode 100644 index 0000000..09bd771 --- /dev/null +++ b/ld/ldlex.c @@ -0,0 +1,4279 @@ + +#line 3 "ldlex.c" + +#define YY_INT_ALIGNED short int + +/* A lexical scanner generated by flex */ + +#define FLEX_SCANNER +#define YY_FLEX_MAJOR_VERSION 2 +#define YY_FLEX_MINOR_VERSION 5 +#define YY_FLEX_SUBMINOR_VERSION 35 +#if YY_FLEX_SUBMINOR_VERSION > 0 +#define FLEX_BETA +#endif + +/* First, we deal with platform-specific or compiler-specific issues. */ + +/* begin standard C headers. */ +#include +#include +#include +#include + +/* end standard C headers. */ + +/* flex integer type definitions */ + +#ifndef FLEXINT_H +#define FLEXINT_H + +/* C99 systems have . Non-C99 systems may or may not. */ + +#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L + +/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, + * if you want the limit (max/min) macros for int types. + */ +#ifndef __STDC_LIMIT_MACROS +#define __STDC_LIMIT_MACROS 1 +#endif + +#include +typedef int8_t flex_int8_t; +typedef uint8_t flex_uint8_t; +typedef int16_t flex_int16_t; +typedef uint16_t flex_uint16_t; +typedef int32_t flex_int32_t; +typedef uint32_t flex_uint32_t; +#else +typedef signed char flex_int8_t; +typedef short int flex_int16_t; +typedef int flex_int32_t; +typedef unsigned char flex_uint8_t; +typedef unsigned short int flex_uint16_t; +typedef unsigned int flex_uint32_t; +#endif /* ! C99 */ + +/* Limits of integral types. */ +#ifndef INT8_MIN +#define INT8_MIN (-128) +#endif +#ifndef INT16_MIN +#define INT16_MIN (-32767-1) +#endif +#ifndef INT32_MIN +#define INT32_MIN (-2147483647-1) +#endif +#ifndef INT8_MAX +#define INT8_MAX (127) +#endif +#ifndef INT16_MAX +#define INT16_MAX (32767) +#endif +#ifndef INT32_MAX +#define INT32_MAX (2147483647) +#endif +#ifndef UINT8_MAX +#define UINT8_MAX (255U) +#endif +#ifndef UINT16_MAX +#define UINT16_MAX (65535U) +#endif +#ifndef UINT32_MAX +#define UINT32_MAX (4294967295U) +#endif + +#endif /* ! FLEXINT_H */ + +#ifdef __cplusplus + +/* The "const" storage-class-modifier is valid. */ +#define YY_USE_CONST + +#else /* ! __cplusplus */ + +/* C99 requires __STDC__ to be defined as 1. */ +#if defined (__STDC__) + +#define YY_USE_CONST + +#endif /* defined (__STDC__) */ +#endif /* ! __cplusplus */ + +#ifdef YY_USE_CONST +#define yyconst const +#else +#define yyconst +#endif + +/* Returned upon end-of-file. */ +#define YY_NULL 0 + +/* Promotes a possibly negative, possibly signed char to an unsigned + * integer for use as an array index. If the signed char is negative, + * we want to instead treat it as an 8-bit unsigned char, hence the + * double cast. + */ +#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) + +/* Enter a start condition. This macro really ought to take a parameter, + * but we do it the disgusting crufty way forced on us by the ()-less + * definition of BEGIN. + */ +#define BEGIN (yy_start) = 1 + 2 * + +/* Translate the current start state into a value that can be later handed + * to BEGIN to return to the state. The YYSTATE alias is for lex + * compatibility. + */ +#define YY_START (((yy_start) - 1) / 2) +#define YYSTATE YY_START + +/* Action number for EOF rule of a given start state. */ +#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) + +/* Special action meaning "start processing a new file". */ +#define YY_NEW_FILE yyrestart(yyin ) + +#define YY_END_OF_BUFFER_CHAR 0 + +/* Size of default input buffer. */ +#ifndef YY_BUF_SIZE +#define YY_BUF_SIZE 16384 +#endif + +/* The state buf must be large enough to hold one state per character in the main buffer. + */ +#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) + +#ifndef YY_TYPEDEF_YY_BUFFER_STATE +#define YY_TYPEDEF_YY_BUFFER_STATE +typedef struct yy_buffer_state *YY_BUFFER_STATE; +#endif + +#ifndef YY_TYPEDEF_YY_SIZE_T +#define YY_TYPEDEF_YY_SIZE_T +typedef size_t yy_size_t; +#endif + +extern yy_size_t yyleng; + +extern FILE *yyin, *yyout; + +#define EOB_ACT_CONTINUE_SCAN 0 +#define EOB_ACT_END_OF_FILE 1 +#define EOB_ACT_LAST_MATCH 2 + + #define YY_LESS_LINENO(n) + +/* Return all but the first "n" matched characters back to the input stream. */ +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + *yy_cp = (yy_hold_char); \ + YY_RESTORE_YY_MORE_OFFSET \ + (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ + YY_DO_BEFORE_ACTION; /* set up yytext again */ \ + } \ + while ( 0 ) + +#define unput(c) yyunput( c, (yytext_ptr) ) + +#ifndef YY_STRUCT_YY_BUFFER_STATE +#define YY_STRUCT_YY_BUFFER_STATE +struct yy_buffer_state + { + FILE *yy_input_file; + + char *yy_ch_buf; /* input buffer */ + char *yy_buf_pos; /* current position in input buffer */ + + /* Size of input buffer in bytes, not including room for EOB + * characters. + */ + yy_size_t yy_buf_size; + + /* Number of characters read into yy_ch_buf, not including EOB + * characters. + */ + yy_size_t yy_n_chars; + + /* Whether we "own" the buffer - i.e., we know we created it, + * and can realloc() it to grow it, and should free() it to + * delete it. + */ + int yy_is_our_buffer; + + /* Whether this is an "interactive" input source; if so, and + * if we're using stdio for input, then we want to use getc() + * instead of fread(), to make sure we stop fetching input after + * each newline. + */ + int yy_is_interactive; + + /* Whether we're considered to be at the beginning of a line. + * If so, '^' rules will be active on the next match, otherwise + * not. + */ + int yy_at_bol; + + int yy_bs_lineno; /**< The line count. */ + int yy_bs_column; /**< The column count. */ + + /* Whether to try to fill the input buffer when we reach the + * end of it. + */ + int yy_fill_buffer; + + int yy_buffer_status; + +#define YY_BUFFER_NEW 0 +#define YY_BUFFER_NORMAL 1 + /* When an EOF's been seen but there's still some text to process + * then we mark the buffer as YY_EOF_PENDING, to indicate that we + * shouldn't try reading from the input source any more. We might + * still have a bunch of tokens to match, though, because of + * possible backing-up. + * + * When we actually see the EOF, we change the status to "new" + * (via yyrestart()), so that the user can continue scanning by + * just pointing yyin at a new input file. + */ +#define YY_BUFFER_EOF_PENDING 2 + + }; +#endif /* !YY_STRUCT_YY_BUFFER_STATE */ + +/* Stack of input buffers. */ +static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ +static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ +static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ + +/* We provide macros for accessing buffer states in case in the + * future we want to put the buffer states in a more general + * "scanner state". + * + * Returns the top of the stack, or NULL. + */ +#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ + ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ + : NULL) + +/* Same as previous macro, but useful when we know that the buffer stack is not + * NULL or when we need an lvalue. For internal use only. + */ +#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] + +/* yy_hold_char holds the character lost when yytext is formed. */ +static char yy_hold_char; +static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */ +yy_size_t yyleng; + +/* Points to current character in buffer. */ +static char *yy_c_buf_p = (char *) 0; +static int yy_init = 0; /* whether we need to initialize */ +static int yy_start = 0; /* start state number */ + +/* Flag which is used to allow yywrap()'s to do buffer switches + * instead of setting up a fresh yyin. A bit of a hack ... + */ +static int yy_did_buffer_switch_on_eof; + +void yyrestart (FILE *input_file ); +void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ); +YY_BUFFER_STATE yy_create_buffer (FILE *file,int size ); +void yy_delete_buffer (YY_BUFFER_STATE b ); +void yy_flush_buffer (YY_BUFFER_STATE b ); +void yypush_buffer_state (YY_BUFFER_STATE new_buffer ); +void yypop_buffer_state (void ); + +static void yyensure_buffer_stack (void ); +static void yy_load_buffer_state (void ); +static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file ); + +#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER ) + +YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size ); +YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str ); +YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,yy_size_t len ); + +void *yyalloc (yy_size_t ); +void *yyrealloc (void *,yy_size_t ); +void yyfree (void * ); + +#define yy_new_buffer yy_create_buffer + +#define yy_set_interactive(is_interactive) \ + { \ + if ( ! YY_CURRENT_BUFFER ){ \ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer(yyin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ + } + +#define yy_set_bol(at_bol) \ + { \ + if ( ! YY_CURRENT_BUFFER ){\ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer(yyin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ + } + +#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) + +/* Begin user sect3 */ + +typedef unsigned char YY_CHAR; + +FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0; + +typedef int yy_state_type; + +extern int yylineno; + +int yylineno = 1; + +extern char *yytext; +#define yytext_ptr yytext + +static yy_state_type yy_get_previous_state (void ); +static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); +static int yy_get_next_buffer (void ); +static void yy_fatal_error (yyconst char msg[] ); + +/* Done after the current pattern has been matched and before the + * corresponding action - sets up yytext. + */ +#define YY_DO_BEFORE_ACTION \ + (yytext_ptr) = yy_bp; \ + yyleng = (size_t) (yy_cp - yy_bp); \ + (yy_hold_char) = *yy_cp; \ + *yy_cp = '\0'; \ + (yy_c_buf_p) = yy_cp; + +#define YY_NUM_RULES 193 +#define YY_END_OF_BUFFER 194 +/* This struct is not used in this scanner, + but its presence is necessary. */ +struct yy_trans_info + { + flex_int32_t yy_verify; + flex_int32_t yy_nxt; + }; +static yyconst flex_int16_t yy_accept[1682] = + { 0, + 0, 0, 173, 173, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 194, 193, + 191, 176, 175, 32, 191, 173, 38, 29, 44, 43, + 34, 35, 28, 36, 173, 37, 8, 8, 45, 46, + 39, 40, 27, 33, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 10, 9, 173, 117, 115, 173, + 42, 30, 41, 31, 192, 176, 32, 192, 171, 38, + 29, 44, 43, 34, 35, 28, 36, 171, 37, 8, + 8, 45, 46, 39, 40, 27, 33, 171, 171, 171, + + 171, 171, 171, 171, 171, 171, 171, 171, 171, 171, + 171, 171, 10, 9, 171, 171, 42, 30, 41, 31, + 169, 36, 169, 37, 8, 8, 169, 169, 169, 169, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 169, 169, 169, 169, 117, 115, 169, + 31, 4, 3, 2, 4, 5, 130, 32, 129, 168, + 34, 35, 28, 36, 168, 37, 8, 8, 45, 46, + 40, 33, 168, 168, 168, 168, 168, 168, 168, 168, + 168, 168, 168, 168, 10, 9, 168, 168, 168, 168, + 168, 168, 168, 168, 168, 168, 168, 31, 190, 188, + + 189, 191, 183, 182, 177, 184, 185, 181, 181, 181, + 181, 186, 187, 176, 173, 15, 0, 174, 8, 26, + 24, 22, 20, 21, 1, 23, 8, 8, 173, 18, + 17, 14, 16, 19, 173, 173, 173, 173, 173, 122, + 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 173, 173, 173, 25, 13, + 15, 171, 6, 22, 20, 21, 0, 1, 23, 8, + + 0, 7, 7, 8, 7, 14, 171, 7, 7, 7, + 171, 171, 122, 7, 171, 171, 7, 171, 171, 171, + 7, 171, 171, 171, 171, 171, 171, 171, 171, 171, + 171, 171, 171, 171, 171, 171, 171, 171, 7, 171, + 169, 8, 0, 23, 8, 0, 169, 169, 169, 169, + 169, 122, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, + + 169, 4, 4, 129, 129, 168, 6, 131, 22, 132, + 168, 7, 7, 7, 168, 168, 168, 7, 168, 7, + 7, 168, 168, 168, 168, 168, 168, 168, 168, 7, + 168, 168, 168, 7, 168, 7, 7, 168, 168, 168, + 168, 168, 168, 168, 168, 190, 189, 182, 181, 0, + 181, 181, 181, 11, 12, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 173, 173, 173, 92, 173, + 173, 173, 173, 173, 173, 173, 173, 173, 173, 71, + 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, + + 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 173, 173, 118, 116, 173, + 8, 172, 8, 171, 7, 171, 171, 171, 171, 171, + 171, 171, 171, 171, 171, 171, 171, 171, 171, 171, + 171, 171, 171, 62, 63, 171, 171, 171, 171, 171, + 171, 171, 171, 171, 171, 171, 171, 171, 8, 170, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 92, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 169, 71, 62, 169, 63, 169, 169, + + 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 169, 118, 116, 169, 4, 8, 168, + 168, 168, 168, 168, 133, 168, 168, 168, 168, 168, + 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, + 150, 168, 168, 168, 168, 168, 168, 168, 168, 168, + 168, 181, 181, 181, 173, 59, 173, 173, 173, 173, + 173, 53, 173, 99, 173, 109, 173, 173, 173, 173, + 173, 173, 173, 88, 173, 173, 173, 173, 110, 173, + 173, 173, 126, 173, 173, 173, 97, 173, 67, 173, + + 173, 173, 173, 173, 173, 173, 173, 173, 95, 173, + 173, 173, 173, 173, 173, 105, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 171, 59, 171, 171, 171, + 53, 171, 171, 109, 171, 171, 171, 171, 171, 171, + 110, 171, 126, 171, 171, 67, 171, 171, 171, 171, + 171, 171, 171, 171, 171, 171, 171, 171, 169, 59, + 169, 169, 169, 169, 169, 53, 169, 99, 169, 109, + 169, 169, 169, 169, 169, 169, 169, 88, 169, 169, + 169, 169, 110, 169, 169, 169, 126, 169, 169, 169, + 97, 169, 67, 169, 169, 169, 169, 169, 169, 169, + + 169, 169, 95, 169, 169, 169, 169, 169, 169, 105, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 168, + 168, 168, 137, 145, 136, 168, 168, 147, 140, 143, + 168, 168, 148, 168, 168, 168, 168, 168, 154, 162, + 153, 168, 168, 165, 157, 160, 168, 168, 166, 168, + 168, 181, 181, 181, 173, 86, 55, 173, 173, 173, + 52, 173, 173, 173, 173, 108, 65, 173, 173, 94, + 173, 77, 173, 173, 76, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 173, 173, 121, 173, 173, + 173, 173, 173, 98, 173, 173, 173, 96, 173, 173, + + 173, 173, 173, 173, 173, 171, 55, 171, 171, 52, + 171, 171, 171, 108, 171, 77, 171, 171, 171, 171, + 171, 171, 171, 171, 171, 171, 171, 171, 171, 171, + 171, 171, 169, 86, 55, 169, 169, 169, 52, 169, + 169, 169, 169, 108, 65, 169, 169, 94, 169, 77, + 169, 169, 76, 169, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 169, 169, 121, 169, 169, 169, 169, + 169, 98, 169, 169, 169, 96, 169, 169, 169, 169, + 169, 169, 169, 168, 138, 135, 168, 168, 147, 147, + 142, 168, 146, 168, 168, 155, 152, 168, 168, 165, + + 165, 159, 168, 164, 168, 181, 181, 179, 173, 173, + 64, 173, 87, 173, 173, 173, 173, 173, 173, 66, + 173, 173, 173, 173, 85, 173, 54, 173, 47, 173, + 173, 107, 173, 50, 75, 173, 173, 173, 173, 173, + 173, 72, 173, 173, 173, 173, 93, 73, 173, 173, + 173, 171, 171, 64, 171, 171, 171, 171, 171, 171, + 171, 54, 171, 171, 107, 171, 50, 171, 171, 171, + 72, 171, 171, 171, 171, 169, 169, 64, 169, 87, + 169, 169, 169, 169, 169, 169, 66, 169, 169, 169, + 169, 85, 169, 54, 169, 47, 169, 169, 107, 169, + + 50, 75, 169, 169, 169, 169, 169, 169, 72, 169, + 169, 169, 169, 93, 73, 169, 169, 169, 168, 168, + 66, 144, 141, 168, 168, 168, 163, 161, 158, 168, + 180, 178, 173, 61, 173, 173, 173, 173, 173, 79, + 173, 173, 120, 173, 173, 173, 173, 173, 100, 173, + 173, 102, 124, 173, 173, 173, 173, 173, 173, 114, + 89, 173, 51, 173, 173, 171, 61, 171, 171, 171, + 79, 171, 120, 171, 171, 171, 171, 111, 124, 171, + 171, 114, 171, 171, 171, 169, 61, 169, 169, 169, + 169, 169, 79, 169, 169, 120, 169, 169, 169, 169, + + 169, 100, 169, 169, 102, 124, 169, 169, 169, 169, + 169, 169, 114, 89, 169, 51, 169, 169, 168, 168, + 168, 168, 168, 168, 149, 173, 128, 173, 173, 173, + 173, 173, 173, 173, 173, 60, 173, 173, 173, 173, + 173, 173, 173, 84, 173, 173, 173, 123, 167, 173, + 149, 171, 128, 171, 171, 171, 60, 171, 171, 171, + 171, 171, 123, 167, 171, 149, 169, 128, 169, 169, + 169, 169, 169, 169, 169, 169, 60, 169, 169, 169, + 169, 169, 169, 169, 84, 169, 169, 169, 123, 167, + 169, 149, 134, 139, 167, 151, 156, 78, 173, 173, + + 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 173, 173, 173, 173, 78, + 171, 171, 171, 171, 171, 171, 171, 171, 171, 78, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 173, 173, 173, 173, 173, 173, 173, 49, 173, + 112, 113, 173, 173, 173, 173, 74, 173, 173, 173, + 173, 173, 173, 171, 171, 171, 171, 112, 113, 171, + 171, 171, 171, 169, 169, 169, 169, 169, 169, 169, + 49, 169, 112, 113, 169, 169, 169, 169, 74, 169, + + 169, 169, 169, 169, 169, 173, 173, 173, 173, 173, + 173, 173, 101, 91, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 171, 171, 171, 101, 171, 171, 171, + 171, 169, 169, 169, 169, 169, 169, 169, 101, 91, + 169, 169, 169, 169, 169, 169, 169, 169, 169, 81, + 173, 173, 127, 173, 173, 173, 173, 173, 48, 173, + 173, 173, 173, 103, 173, 171, 127, 171, 171, 171, + 171, 171, 81, 169, 169, 127, 169, 169, 169, 169, + 169, 48, 169, 169, 169, 169, 103, 169, 173, 173, + 173, 173, 173, 90, 173, 70, 173, 173, 173, 173, + + 171, 171, 171, 70, 171, 171, 169, 169, 169, 169, + 169, 90, 169, 70, 169, 169, 169, 169, 173, 173, + 173, 173, 173, 173, 173, 125, 69, 173, 173, 68, + 171, 171, 171, 171, 125, 69, 68, 169, 169, 169, + 169, 169, 169, 169, 125, 69, 169, 169, 68, 173, + 173, 173, 173, 173, 173, 173, 173, 173, 171, 171, + 171, 171, 169, 169, 169, 169, 169, 169, 169, 169, + 169, 173, 173, 58, 173, 173, 173, 173, 173, 173, + 171, 58, 171, 171, 169, 169, 58, 169, 169, 169, + 169, 169, 169, 173, 173, 173, 173, 173, 173, 104, + + 173, 171, 171, 171, 169, 169, 169, 169, 169, 169, + 104, 169, 173, 56, 173, 173, 173, 173, 173, 56, + 171, 171, 169, 56, 169, 169, 169, 169, 169, 173, + 173, 173, 173, 119, 173, 171, 119, 169, 169, 169, + 169, 119, 169, 173, 173, 173, 173, 173, 171, 169, + 169, 169, 169, 169, 80, 173, 173, 173, 106, 171, + 80, 169, 169, 169, 106, 57, 173, 173, 57, 57, + 169, 169, 82, 173, 82, 169, 173, 169, 83, 83, + 0 + } ; + +static yyconst flex_int32_t yy_ec[256] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, + 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 2, 4, 5, 6, 7, 8, 9, 1, 10, + 11, 12, 13, 14, 15, 16, 17, 18, 19, 19, + 19, 19, 19, 19, 19, 19, 19, 20, 21, 22, + 23, 24, 25, 1, 26, 27, 28, 29, 30, 31, + 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, + 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, + 52, 53, 54, 55, 56, 1, 57, 58, 59, 60, + + 61, 62, 63, 64, 65, 16, 66, 67, 68, 69, + 70, 71, 16, 72, 73, 74, 75, 16, 16, 76, + 16, 77, 78, 79, 80, 81, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1 + } ; + +static yyconst flex_int32_t yy_meta[82] = + { 0, + 1, 1, 2, 3, 1, 1, 4, 1, 1, 1, + 1, 3, 5, 6, 7, 8, 9, 10, 10, 7, + 1, 1, 6, 1, 3, 10, 10, 10, 10, 10, + 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, + 8, 7, 4, 7, 3, 8, 10, 10, 10, 10, + 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, + 9 + } ; + +static yyconst flex_int16_t yy_base[1706] = + { 0, + 0, 0, 0, 0, 81, 0, 162, 0, 243, 323, + 403, 0, 271, 273, 484, 565, 646, 727, 2606, 2607, + 2607, 2603, 2607, 2581, 2598, 791, 2607, 260, 2607, 2607, + 2579, 2578, 0, 2577, 0, 247, 321, 492, 0, 2607, + 249, 2576, 257, 0, 255, 257, 253, 259, 262, 268, + 2555, 2560, 2557, 2565, 280, 286, 274, 315, 317, 2548, + 2563, 350, 2566, 2561, 0, 0, 2532, 2528, 2516, 2522, + 2607, 290, 2607, 0, 2607, 2584, 2562, 2579, 836, 2607, + 343, 2607, 2607, 2560, 2559, 2607, 296, 0, 294, 881, + 306, 2607, 2607, 342, 2558, 344, 2607, 940, 487, 506, + + 565, 577, 571, 2537, 2540, 2548, 341, 359, 346, 476, + 2534, 488, 2607, 2607, 644, 2511, 2607, 295, 2607, 0, + 999, 477, 0, 376, 735, 747, 596, 511, 313, 567, + 478, 515, 2532, 2537, 2534, 2542, 599, 573, 517, 591, + 599, 2525, 2540, 645, 2543, 2538, 2509, 2505, 2493, 2499, + 0, 1044, 2607, 2607, 0, 2607, 2607, 2540, 2559, 1089, + 2538, 2537, 2607, 2536, 0, 2535, 0, 464, 2607, 0, + 2534, 2607, 1134, 635, 666, 647, 667, 671, 339, 2530, + 2512, 2508, 551, 2510, 2607, 2607, 685, 730, 732, 694, + 754, 455, 2495, 2479, 2475, 498, 2477, 0, 2546, 2607, + + 0, 2535, 2607, 0, 2607, 2607, 2607, 2526, 536, 534, + 630, 2607, 2607, 2543, 0, 0, 2539, 2607, 736, 2607, + 2607, 0, 0, 0, 0, 0, 757, 0, 0, 2520, + 2607, 0, 2607, 2519, 2497, 2511, 2494, 2504, 580, 0, + 2506, 2497, 2495, 2489, 641, 2503, 2487, 2500, 2500, 2484, + 669, 2491, 2487, 2483, 2485, 2487, 798, 2493, 2466, 2482, + 657, 2479, 2481, 2469, 727, 2480, 2482, 2470, 2484, 2484, + 2472, 2485, 2478, 691, 2469, 2457, 2464, 2476, 2459, 2478, + 2476, 2458, 2458, 2457, 2426, 2429, 2434, 2419, 2607, 2607, + 2607, 0, 1193, 2607, 2607, 2607, 0, 2607, 2607, 477, + + 809, 0, 2607, 2607, 0, 2607, 842, 845, 889, 0, + 2461, 712, 0, 917, 2455, 2453, 679, 949, 976, 2462, + 2463, 2450, 751, 2459, 2449, 2461, 2437, 2446, 2435, 673, + 2446, 2448, 2451, 2440, 2447, 2427, 2447, 2449, 995, 2398, + 0, 1244, 0, 0, 884, 0, 2430, 2444, 2427, 2437, + 742, 0, 2439, 2430, 2428, 2422, 721, 2436, 2420, 2433, + 2433, 2417, 733, 2424, 2420, 2416, 2418, 2420, 802, 2426, + 2399, 2415, 773, 564, 2415, 2413, 2402, 900, 2413, 2415, + 2403, 2417, 2417, 2405, 2418, 2411, 806, 2402, 2390, 2397, + 2409, 2392, 2411, 2409, 2391, 2391, 2390, 2359, 2362, 2367, + + 2352, 0, 1295, 2425, 2607, 0, 1346, 0, 0, 0, + 678, 888, 833, 0, 2393, 928, 937, 2392, 2396, 2379, + 2380, 2378, 2395, 2382, 2390, 2391, 2389, 2390, 2369, 851, + 2349, 854, 969, 2348, 2352, 2337, 2338, 2336, 2351, 2339, + 2346, 2347, 2345, 2346, 2327, 2399, 0, 0, 2380, 2379, + 794, 836, 757, 2607, 2607, 2358, 2354, 2366, 2363, 2364, + 2354, 2352, 2362, 2362, 2359, 2344, 2337, 2360, 2359, 2350, + 2355, 2339, 2344, 2350, 2342, 2352, 2349, 2330, 0, 2338, + 2334, 2339, 2326, 2341, 2329, 2338, 2336, 2338, 2334, 0, + 2325, 2319, 2320, 2325, 2321, 2310, 2327, 2317, 2314, 2313, + + 2308, 2325, 2319, 2309, 2306, 2312, 2306, 2318, 2302, 2318, + 2319, 2301, 2317, 2305, 2309, 2296, 2269, 0, 0, 2277, + 0, 0, 998, 2297, 1004, 2304, 2305, 2295, 2304, 2304, + 2287, 2280, 2303, 1049, 2300, 2290, 2280, 2288, 2284, 2277, + 2281, 2289, 2291, 0, 0, 2274, 2275, 2277, 2266, 2283, + 2271, 2266, 2274, 2281, 2282, 2283, 2238, 2246, 0, 0, + 2266, 2262, 2274, 2271, 2272, 2262, 2260, 2270, 2270, 2267, + 2252, 2245, 2268, 2267, 2258, 2263, 2247, 2252, 2258, 2250, + 2260, 2257, 2238, 0, 2246, 2242, 2247, 2234, 2249, 2237, + 2246, 2244, 2246, 2242, 0, 0, 2233, 0, 2227, 2228, + + 2233, 2229, 2218, 2235, 2225, 2222, 2221, 2216, 2233, 2227, + 2217, 2214, 2220, 2214, 2226, 2210, 2226, 2227, 2209, 2225, + 2213, 2217, 2204, 2177, 0, 0, 2185, 0, 0, 2205, + 897, 2214, 2213, 2201, 0, 2211, 2202, 2194, 2209, 2207, + 2206, 2198, 2189, 2190, 2193, 2161, 925, 2169, 2168, 2157, + 0, 2166, 2158, 2151, 2164, 2162, 2161, 2154, 2146, 2147, + 2149, 615, 722, 258, 2180, 0, 2173, 2176, 2171, 2183, + 2169, 0, 2175, 0, 2165, 0, 2164, 2152, 2168, 2161, + 2155, 2158, 2160, 0, 2157, 2171, 2159, 2153, 0, 2171, + 2152, 2153, 0, 2165, 2149, 2167, 0, 2149, 0, 2151, + + 2150, 2163, 2132, 2153, 2140, 2148, 2140, 2149, 0, 2142, + 2153, 2146, 2149, 2133, 2137, 2120, 2141, 2145, 2128, 2135, + 2137, 2140, 2135, 2101, 2097, 2129, 0, 2126, 2121, 2133, + 0, 2126, 2116, 0, 2104, 2120, 2113, 2111, 2115, 2109, + 0, 2109, 0, 2108, 2126, 0, 2111, 2124, 2093, 2114, + 2110, 2112, 2115, 2104, 2109, 2105, 2074, 2070, 2102, 0, + 2095, 2098, 2093, 2105, 2091, 0, 2097, 0, 2087, 0, + 2086, 2074, 2090, 2083, 2077, 2080, 2082, 0, 2079, 2085, + 2064, 2049, 0, 2058, 2027, 2025, 0, 2035, 2019, 2034, + 0, 2007, 0, 2000, 1990, 1998, 1952, 1973, 1960, 223, + + 328, 360, 0, 358, 463, 478, 512, 586, 613, 602, + 643, 705, 694, 760, 766, 806, 803, 773, 771, 807, + 813, 820, 0, 0, 0, 818, 847, 1414, 0, 0, + 833, 846, 0, 838, 856, 825, 828, 835, 0, 0, + 0, 833, 856, 1494, 0, 0, 863, 871, 0, 874, + 894, 936, 955, 970, 914, 0, 923, 934, 953, 957, + 0, 966, 961, 951, 981, 0, 0, 985, 976, 0, + 963, 0, 994, 1001, 982, 998, 1018, 1012, 1017, 1000, + 1007, 1026, 1024, 1020, 1016, 1020, 1041, 0, 1040, 1038, + 1046, 1040, 1042, 0, 1051, 1057, 1059, 0, 1041, 1054, + + 1062, 1045, 1051, 1017, 1033, 1050, 1057, 1053, 1069, 0, + 1074, 1065, 1080, 0, 1082, 0, 1083, 1057, 1081, 1092, + 1078, 1094, 1090, 1086, 1100, 1098, 1089, 1098, 1104, 1097, + 1057, 1071, 1088, 0, 1095, 1091, 1107, 1108, 0, 1113, + 1110, 1097, 1112, 0, 0, 1114, 1105, 0, 1089, 0, + 1125, 1121, 1101, 1113, 1133, 1133, 1139, 1119, 1126, 1146, + 1144, 1141, 1137, 1132, 1152, 0, 1150, 1141, 1148, 1142, + 1145, 0, 1154, 1159, 1161, 0, 1142, 1155, 1163, 1152, + 1159, 1125, 1139, 1156, 0, 1165, 1166, 1161, 0, 1574, + 0, 1179, 0, 1182, 1134, 0, 1145, 1145, 1141, 0, + + 1654, 0, 1157, 0, 1160, 1198, 1210, 1205, 1181, 1196, + 0, 1199, 0, 1193, 1187, 1178, 1205, 1207, 1207, 0, + 1210, 1209, 1195, 1197, 0, 1197, 0, 1214, 0, 1200, + 1200, 0, 1215, 0, 1191, 1198, 1219, 1200, 1201, 1219, + 1215, 1208, 1215, 1229, 1227, 1237, 0, 0, 1237, 1204, + 1223, 1236, 1252, 0, 1255, 1246, 1256, 1258, 1258, 1259, + 1246, 0, 1262, 1248, 0, 1262, 0, 1244, 1265, 1251, + 1241, 1261, 1267, 1226, 1251, 1263, 1278, 0, 1282, 0, + 1276, 1270, 1261, 1288, 1290, 1290, 0, 1299, 1298, 1284, + 1286, 0, 1287, 0, 1305, 0, 1291, 1291, 0, 1306, + + 0, 1282, 1289, 1310, 1285, 1286, 1304, 1299, 1289, 1296, + 1310, 1307, 1317, 0, 0, 1311, 1277, 1302, 1314, 1320, + 0, 0, 0, 1317, 1292, 1297, 0, 0, 0, 1294, + 1349, 1350, 1341, 0, 1348, 1334, 1352, 1341, 1351, 0, + 1329, 1346, 0, 1331, 1358, 1343, 1347, 1348, 0, 1336, + 1367, 0, 1338, 1369, 1367, 1353, 1343, 1367, 1345, 0, + 0, 1363, 0, 1348, 1346, 1381, 0, 1383, 1372, 1389, + 0, 1371, 0, 1399, 1387, 1388, 1376, 0, 1377, 1378, + 1407, 0, 1402, 1381, 1379, 1414, 0, 1415, 1401, 1419, + 1408, 1417, 0, 1394, 1411, 0, 1396, 1423, 1408, 1412, + + 1413, 0, 1401, 1432, 0, 1403, 1434, 1432, 1418, 1408, + 1432, 1410, 0, 0, 1428, 0, 1407, 1406, 1441, 1443, + 1443, 1413, 1415, 1415, 0, 1448, 0, 1433, 1452, 1442, + 1450, 1444, 1455, 1456, 1442, 0, 1456, 1444, 1445, 1449, + 1457, 1454, 1463, 0, 1457, 1477, 1486, 0, 0, 1448, + 0, 1481, 0, 1473, 1482, 1486, 0, 1491, 1479, 1490, + 1480, 1496, 0, 0, 1466, 0, 1499, 0, 1484, 1503, + 1493, 1501, 1495, 1506, 1507, 1493, 0, 1507, 1495, 1496, + 1500, 1508, 1505, 1509, 0, 1500, 1515, 1520, 0, 0, + 1486, 0, 0, 0, 0, 0, 0, 0, 1508, 1515, + + 1521, 1518, 1515, 1515, 1511, 1527, 1527, 1520, 1533, 1519, + 1529, 1530, 1522, 1521, 1541, 1532, 1531, 1545, 1520, 0, + 1551, 1553, 1544, 1559, 1552, 1557, 1548, 1568, 1544, 0, + 1562, 1568, 1574, 1571, 1568, 1567, 1563, 1579, 1579, 1571, + 1584, 1570, 1580, 1581, 1573, 1572, 1592, 1583, 1582, 1596, + 1566, 1581, 1595, 1587, 1590, 1588, 1592, 1597, 0, 1588, + 0, 0, 1600, 1596, 1606, 1610, 0, 1611, 1609, 1605, + 1606, 1603, 1582, 1604, 1607, 1611, 1602, 0, 0, 1618, + 1622, 1620, 1590, 1608, 1627, 1622, 1630, 1629, 1632, 1637, + 0, 1628, 0, 0, 1640, 1636, 1651, 1655, 0, 1656, + + 1654, 1650, 1651, 1648, 1627, 1644, 1661, 1645, 1661, 1653, + 1655, 1654, 0, 0, 1669, 1667, 1653, 1655, 1669, 1668, + 1656, 1672, 1642, 1659, 1675, 1666, 0, 1678, 1665, 1680, + 1650, 1668, 1685, 1669, 1685, 1677, 1679, 1678, 0, 0, + 1693, 1691, 1677, 1679, 1693, 1692, 1680, 1696, 1666, 0, + 1683, 1673, 0, 1674, 1691, 1696, 1691, 1707, 0, 1693, + 1696, 1701, 1685, 0, 1670, 1687, 0, 1705, 1715, 1701, + 1704, 1676, 0, 1704, 1694, 0, 1695, 1712, 1714, 1709, + 1725, 0, 1711, 1714, 1719, 1703, 0, 1688, 1705, 1736, + 1737, 1725, 1709, 0, 1728, 0, 1724, 1731, 1729, 1698, + + 1746, 1717, 1735, 0, 1731, 1704, 1722, 1754, 1755, 1743, + 1727, 0, 1746, 0, 1742, 1749, 1747, 1717, 1747, 1755, + 1754, 1764, 1758, 1740, 1767, 0, 0, 1769, 1757, 0, + 1764, 1763, 1773, 1773, 0, 0, 0, 1761, 1769, 1768, + 1778, 1772, 1754, 1780, 0, 0, 1782, 1770, 0, 1764, + 1781, 1787, 1780, 1781, 1793, 1783, 1782, 1788, 1789, 1795, + 1788, 1789, 1777, 1794, 1800, 1793, 1794, 1806, 1796, 1795, + 1801, 1798, 1805, 0, 1795, 1799, 1803, 1815, 1797, 1803, + 1812, 0, 1802, 1820, 1809, 1816, 0, 1806, 1810, 1814, + 1826, 1808, 1814, 1828, 1817, 1817, 1830, 1822, 1828, 0, + + 1818, 1823, 1823, 1832, 1838, 1827, 1827, 1840, 1832, 1838, + 0, 1828, 1832, 0, 1817, 1848, 1835, 1832, 1843, 0, + 1822, 1835, 1840, 0, 1825, 1856, 1843, 1840, 1851, 1849, + 1857, 1843, 1861, 0, 1845, 1861, 0, 1855, 1863, 1849, + 1867, 0, 1851, 1853, 1859, 1865, 1874, 1851, 1863, 1859, + 1865, 1871, 1880, 1857, 0, 1879, 1869, 1865, 0, 1882, + 0, 1883, 1873, 1869, 0, 0, 1876, 1882, 0, 0, + 1878, 1884, 0, 1879, 0, 1880, 1882, 1883, 0, 0, + 2607, 1922, 1932, 1942, 1952, 1962, 1970, 1980, 1987, 1994, + 2001, 2011, 2018, 2028, 2038, 2048, 2051, 2059, 2066, 1983, + + 2073, 2083, 2093, 2103, 2113 + } ; + +static yyconst flex_int16_t yy_def[1706] = + { 0, + 1682, 1682, 1681, 3, 1681, 5, 1681, 7, 1683, 1683, + 1681, 11, 1684, 1684, 1685, 1685, 1686, 1686, 1681, 1681, + 1681, 1681, 1681, 1687, 1688, 1687, 1681, 1681, 1681, 1681, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1681, + 1681, 1687, 1681, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1681, 1681, 1681, 1687, 1681, 1681, 1681, 1688, 1689, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1689, 1689, 1681, + 90, 1681, 1681, 1681, 1681, 1681, 1681, 1689, 98, 98, + + 98, 98, 98, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1681, 1681, 98, 1689, 1681, 1681, 1681, 1689, + 1690, 1681, 1690, 1690, 1681, 1681, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1691, 1681, 1681, 1691, 1681, 1681, 1681, 1692, 1693, + 1694, 1681, 1681, 1681, 1693, 1693, 90, 90, 1681, 1695, + 1681, 1681, 1693, 173, 173, 173, 173, 173, 1693, 1693, + 1693, 1693, 1693, 1693, 1681, 1681, 173, 173, 173, 173, + 173, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1681, 1681, + + 1696, 1681, 1681, 1697, 1681, 1681, 1681, 1698, 1698, 1698, + 1698, 1681, 1681, 1681, 1687, 1687, 1688, 1681, 26, 1681, + 1681, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 26, 1681, + 1681, 1687, 1681, 1681, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1681, 1681, + 1681, 1689, 1689, 1681, 1681, 1681, 1699, 1681, 1681, 90, + + 90, 301, 1681, 1681, 1700, 1681, 98, 98, 98, 1689, + 1689, 1689, 1689, 98, 1689, 1689, 1689, 98, 98, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 98, 1689, + 1690, 1690, 1701, 1690, 1681, 1700, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + + 1690, 1691, 1691, 1692, 1681, 1693, 1693, 1694, 1694, 1695, + 173, 173, 173, 1693, 1693, 173, 173, 1693, 1693, 1693, + 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 173, + 1693, 173, 173, 1693, 1693, 1693, 1693, 1693, 1693, 1693, + 1693, 1693, 1693, 1693, 1693, 1681, 1696, 1697, 1698, 1681, + 1698, 1698, 1698, 1681, 1681, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1689, 1699, 1700, 1689, 98, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 98, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1690, 1701, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1691, 1693, 1693, + 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, + 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, + 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, + 1693, 1698, 1698, 1698, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1693, + 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1702, 1693, 1693, + 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, + 1693, 1693, 1693, 1703, 1693, 1693, 1693, 1693, 1693, 1693, + 1693, 1698, 1698, 1698, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + + 1687, 1687, 1687, 1687, 1687, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1693, 1693, 1693, 1693, 1693, 1704, 1702, + 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1705, + + 1703, 1693, 1693, 1693, 1693, 1698, 1698, 1698, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1693, 1693, + 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, 1693, + 1698, 1698, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1693, 1693, + 1693, 1693, 1693, 1693, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1689, 1689, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1693, 1693, 1693, 1693, 1693, 1693, 1687, 1687, 1687, + + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1689, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1689, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + + 1690, 1690, 1690, 1690, 1690, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1689, 1689, 1689, 1689, 1689, 1689, 1689, + 1689, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1689, 1689, 1689, 1689, 1689, + 1689, 1689, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + + 1689, 1689, 1689, 1689, 1689, 1689, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1687, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1689, 1689, 1689, 1689, 1689, 1689, 1689, 1690, 1690, 1690, + 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1687, + 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1689, 1689, + 1689, 1689, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1689, 1689, 1689, 1689, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1690, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + + 1687, 1689, 1689, 1689, 1690, 1690, 1690, 1690, 1690, 1690, + 1690, 1690, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1689, + 1689, 1689, 1690, 1690, 1690, 1690, 1690, 1690, 1690, 1687, + 1687, 1687, 1687, 1687, 1687, 1689, 1689, 1690, 1690, 1690, + 1690, 1690, 1690, 1687, 1687, 1687, 1687, 1687, 1689, 1690, + 1690, 1690, 1690, 1690, 1687, 1687, 1687, 1687, 1687, 1689, + 1690, 1690, 1690, 1690, 1690, 1687, 1687, 1687, 1689, 1690, + 1690, 1690, 1687, 1687, 1690, 1690, 1687, 1690, 1687, 1690, + 0, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + + 1681, 1681, 1681, 1681, 1681 + } ; + +static yyconst flex_int16_t yy_nxt[2689] = + { 0, + 21, 22, 23, 24, 25, 21, 26, 27, 28, 29, + 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, + 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, + 50, 51, 52, 53, 35, 54, 55, 56, 57, 58, + 59, 60, 61, 62, 63, 35, 64, 35, 35, 35, + 35, 65, 35, 66, 35, 35, 67, 35, 35, 35, + 35, 35, 35, 35, 35, 35, 68, 35, 35, 69, + 35, 35, 70, 35, 35, 35, 35, 71, 72, 73, + 74, 75, 76, 23, 77, 78, 75, 79, 80, 81, + 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, + + 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, + 102, 103, 104, 88, 105, 88, 106, 107, 108, 109, + 110, 111, 88, 88, 112, 88, 88, 88, 88, 88, + 88, 88, 113, 88, 114, 75, 88, 115, 103, 103, + 103, 103, 103, 88, 88, 88, 88, 88, 88, 88, + 88, 88, 88, 116, 88, 88, 88, 88, 117, 118, + 119, 120, 75, 76, 23, 77, 78, 75, 121, 80, + 81, 82, 83, 84, 85, 86, 122, 123, 124, 125, + 126, 92, 93, 94, 95, 96, 97, 127, 128, 129, + 130, 131, 132, 133, 134, 135, 123, 136, 137, 138, + + 139, 140, 141, 142, 143, 144, 145, 123, 146, 123, + 123, 123, 123, 113, 123, 114, 75, 123, 147, 123, + 123, 123, 123, 123, 123, 123, 123, 123, 148, 123, + 123, 149, 123, 123, 150, 123, 123, 123, 123, 117, + 118, 119, 151, 75, 75, 20, 75, 75, 75, 152, + 75, 75, 75, 75, 75, 153, 75, 154, 225, 965, + 125, 126, 75, 75, 75, 156, 75, 75, 220, 226, + 230, 231, 199, 200, 199, 200, 201, 450, 201, 233, + 234, 235, 221, 236, 247, 237, 241, 202, 248, 202, + 242, 238, 245, 243, 75, 246, 75, 75, 239, 240, + + 250, 252, 249, 264, 253, 298, 244, 254, 259, 260, + 251, 262, 289, 265, 854, 263, 299, 289, 296, 261, + 75, 75, 75, 75, 75, 20, 75, 75, 75, 152, + 75, 75, 75, 75, 75, 153, 75, 154, 227, 227, + 125, 126, 75, 75, 75, 156, 75, 75, 203, 270, + 203, 220, 357, 266, 303, 358, 228, 267, 228, 271, + 268, 269, 297, 230, 231, 221, 233, 234, 290, 229, + 325, 966, 422, 290, 75, 329, 75, 75, 423, 274, + 326, 303, 275, 276, 327, 330, 228, 298, 228, 277, + 278, 279, 328, 967, 280, 281, 229, 968, 344, 282, + + 75, 75, 75, 21, 22, 157, 158, 21, 159, 160, + 27, 28, 29, 30, 161, 162, 163, 164, 165, 166, + 167, 168, 169, 170, 41, 171, 43, 172, 173, 174, + 175, 176, 177, 178, 165, 165, 165, 165, 165, 179, + 165, 180, 181, 182, 165, 165, 183, 184, 165, 165, + 165, 165, 165, 165, 185, 165, 186, 21, 165, 187, + 188, 189, 176, 190, 191, 165, 165, 165, 165, 192, + 165, 193, 194, 195, 165, 196, 197, 165, 165, 165, + 71, 72, 73, 198, 21, 199, 200, 21, 21, 201, + 969, 21, 21, 21, 21, 21, 21, 205, 21, 296, + + 202, 21, 21, 205, 205, 21, 21, 21, 21, 227, + 227, 970, 303, 314, 331, 314, 362, 335, 332, 438, + 315, 336, 333, 316, 439, 303, 363, 228, 337, 228, + 292, 292, 314, 338, 314, 21, 21, 21, 21, 303, + 353, 971, 292, 343, 354, 317, 377, 355, 364, 292, + 292, 365, 303, 450, 366, 450, 378, 228, 443, 228, + 356, 206, 21, 207, 21, 21, 199, 200, 21, 21, + 201, 444, 21, 21, 21, 21, 21, 21, 205, 21, + 427, 202, 21, 21, 205, 205, 21, 21, 21, 21, + 318, 314, 359, 314, 319, 428, 360, 314, 374, 314, + + 452, 292, 375, 314, 595, 314, 376, 292, 320, 292, + 361, 451, 596, 292, 292, 292, 21, 21, 21, 21, + 292, 292, 347, 460, 348, 321, 349, 371, 372, 379, + 972, 383, 350, 380, 450, 461, 381, 382, 373, 351, + 352, 384, 206, 21, 207, 21, 21, 199, 200, 450, + 25, 201, 973, 21, 21, 21, 21, 974, 21, 205, + 416, 413, 202, 21, 21, 205, 205, 21, 21, 21, + 314, 406, 314, 413, 387, 852, 975, 388, 389, 466, + 292, 467, 488, 406, 390, 391, 392, 292, 292, 393, + 394, 417, 413, 413, 395, 489, 473, 413, 418, 453, + + 547, 339, 406, 406, 413, 419, 209, 406, 210, 548, + 421, 413, 211, 474, 406, 420, 504, 531, 505, 532, + 413, 406, 506, 212, 21, 213, 21, 21, 199, 200, + 406, 25, 201, 976, 21, 21, 21, 21, 977, 21, + 205, 450, 430, 202, 21, 21, 205, 205, 21, 21, + 21, 431, 345, 345, 493, 527, 413, 494, 413, 571, + 578, 572, 435, 495, 345, 345, 406, 528, 406, 436, + 304, 228, 304, 228, 227, 227, 450, 579, 538, 853, + 413, 539, 304, 346, 304, 565, 432, 209, 433, 210, + 406, 540, 228, 211, 228, 434, 978, 566, 593, 979, + + 304, 228, 304, 228, 212, 21, 213, 21, 219, 219, + 346, 594, 304, 450, 304, 664, 219, 219, 219, 219, + 219, 219, 228, 437, 228, 480, 301, 301, 481, 585, + 482, 611, 586, 612, 587, 980, 981, 613, 483, 982, + 983, 484, 588, 984, 1681, 589, 1681, 219, 219, 219, + 219, 219, 219, 293, 293, 450, 985, 303, 986, 413, + 987, 293, 293, 293, 293, 293, 293, 662, 314, 406, + 314, 314, 988, 314, 1681, 991, 1681, 413, 292, 992, + 413, 292, 993, 994, 303, 292, 292, 406, 524, 292, + 406, 995, 293, 293, 293, 293, 293, 293, 300, 300, + + 996, 345, 345, 997, 998, 663, 301, 302, 301, 302, + 301, 301, 999, 303, 413, 314, 304, 525, 304, 304, + 303, 304, 821, 646, 406, 292, 648, 600, 822, 305, + 601, 630, 292, 292, 1002, 1003, 602, 301, 302, 301, + 302, 301, 301, 314, 303, 314, 304, 1004, 304, 304, + 303, 304, 1005, 292, 413, 450, 305, 307, 307, 1009, + 292, 292, 1010, 413, 406, 307, 308, 307, 309, 307, + 307, 632, 310, 406, 450, 314, 311, 314, 1011, 310, + 633, 837, 1012, 312, 313, 292, 1013, 838, 310, 450, + 1016, 1014, 292, 533, 1017, 413, 307, 314, 307, 314, + + 307, 307, 314, 310, 314, 406, 534, 1006, 1015, 310, + 1018, 1007, 292, 1019, 1020, 310, 342, 342, 1021, 292, + 292, 314, 1022, 314, 342, 342, 342, 342, 342, 342, + 314, 292, 314, 304, 1023, 304, 1008, 1024, 292, 292, + 292, 649, 1025, 1026, 1027, 1028, 727, 292, 292, 1029, + 1030, 1031, 1032, 1033, 1034, 342, 342, 342, 342, 342, + 342, 403, 403, 304, 1035, 304, 1036, 557, 1037, 403, + 403, 403, 403, 403, 403, 314, 1038, 314, 1039, 1040, + 1041, 1042, 736, 1043, 1044, 292, 1045, 1046, 1047, 1048, + 1049, 1050, 292, 292, 1051, 1052, 1053, 1054, 1055, 1056, + + 403, 403, 403, 403, 403, 403, 407, 407, 1057, 1058, + 1059, 1060, 1061, 1062, 407, 407, 407, 407, 407, 407, + 1063, 1064, 1065, 1066, 1067, 1068, 1069, 1070, 1071, 1072, + 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081, 1083, + 1084, 1085, 1086, 1087, 1088, 407, 407, 407, 407, 407, + 407, 411, 411, 1089, 1090, 1082, 1091, 1092, 1093, 411, + 412, 411, 413, 411, 411, 1094, 414, 1095, 1096, 1097, + 415, 1098, 1099, 414, 1100, 1101, 1102, 1103, 1104, 1105, + 1106, 1107, 414, 1108, 1109, 1110, 1111, 1112, 1113, 1114, + 411, 413, 411, 413, 411, 411, 1115, 414, 1116, 1117, + + 1118, 1119, 1120, 414, 1121, 1122, 1123, 1124, 1125, 414, + 293, 293, 1126, 1127, 1128, 1129, 1130, 450, 293, 293, + 293, 293, 293, 293, 450, 1133, 1134, 1135, 521, 450, + 521, 1136, 1137, 1138, 1139, 1140, 1141, 1142, 1143, 1144, + 1145, 1146, 1147, 1148, 1149, 1150, 1151, 1152, 1153, 293, + 293, 293, 293, 293, 293, 1154, 1155, 1156, 521, 1157, + 521, 342, 342, 1158, 1159, 1160, 1131, 1161, 1162, 342, + 342, 342, 342, 342, 342, 1163, 1132, 1164, 1165, 559, + 1166, 559, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, + 1175, 1176, 1177, 1178, 1179, 1180, 1181, 1182, 1183, 1184, + + 342, 342, 342, 342, 342, 342, 1185, 1186, 1187, 559, + 1188, 559, 403, 403, 1189, 1190, 1191, 1192, 1193, 1194, + 403, 403, 403, 403, 403, 403, 1195, 1196, 1197, 1198, + 628, 1199, 628, 1200, 1201, 1202, 1203, 1204, 1205, 1206, + 1207, 1208, 1209, 1210, 1211, 1212, 1213, 1214, 1215, 1216, + 1217, 403, 403, 403, 403, 403, 403, 1218, 1219, 1220, + 628, 1221, 628, 407, 407, 1222, 1223, 1224, 450, 450, + 1225, 407, 407, 407, 407, 407, 407, 1226, 1227, 1228, + 1229, 629, 1230, 629, 1231, 1232, 1233, 1234, 1235, 1236, + 1237, 1238, 1239, 1241, 1242, 1243, 1244, 1240, 1245, 1246, + + 1247, 1248, 407, 407, 407, 407, 407, 407, 1249, 1250, + 1251, 629, 1252, 629, 989, 989, 1253, 989, 989, 989, + 1254, 989, 989, 989, 989, 989, 1255, 989, 1256, 1257, + 1258, 1259, 1260, 1261, 989, 989, 989, 989, 989, 1262, + 1263, 1264, 1265, 1266, 1267, 1268, 1269, 1270, 1271, 1272, + 1273, 1274, 1275, 1276, 1277, 1278, 1279, 1280, 1282, 1283, + 1284, 1285, 1281, 1286, 1287, 1288, 1289, 1290, 989, 1291, + 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300, 1301, + 1302, 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311, + 1312, 989, 989, 989, 1000, 1000, 1313, 1000, 1000, 1000, + + 1314, 1000, 1000, 1000, 1000, 1000, 1315, 1000, 1319, 1320, + 1321, 1316, 1322, 1323, 1000, 1000, 1000, 1000, 1000, 1317, + 1324, 1325, 1326, 1327, 1318, 1328, 1329, 1330, 1331, 1332, + 1333, 1334, 1335, 1336, 1337, 1338, 1339, 1340, 1341, 1342, + 1343, 1344, 1345, 1346, 1347, 1348, 1351, 1352, 1000, 1353, + 1354, 1355, 1356, 1349, 1357, 1358, 1359, 1360, 1350, 1361, + 1363, 1364, 1365, 1366, 1367, 1368, 1369, 1362, 1370, 1371, + 1372, 1000, 1000, 1000, 989, 989, 1373, 989, 989, 989, + 1374, 989, 989, 989, 989, 989, 1375, 989, 1376, 1377, + 1380, 1378, 1381, 1382, 989, 989, 989, 989, 989, 1379, + + 1383, 1384, 1385, 1386, 1387, 1388, 1389, 1390, 1391, 1392, + 1393, 1395, 1396, 1397, 1398, 1399, 1400, 1401, 1394, 1402, + 1403, 1404, 1405, 1406, 1407, 1408, 1409, 1410, 989, 1411, + 1412, 1413, 1414, 1415, 1416, 1417, 1418, 1419, 1420, 1421, + 1422, 1423, 1424, 1425, 1426, 1427, 1428, 1429, 1430, 1431, + 1432, 989, 989, 989, 1000, 1000, 1433, 1000, 1000, 1000, + 1434, 1000, 1000, 1000, 1000, 1000, 1435, 1000, 1436, 1437, + 1438, 1439, 1440, 1441, 1000, 1000, 1000, 1000, 1000, 1442, + 1443, 1444, 1445, 1446, 1447, 1448, 1449, 1450, 1451, 1452, + 1453, 1454, 1455, 1456, 1457, 1458, 1459, 1460, 1461, 1462, + + 1463, 1464, 1465, 1466, 1467, 1468, 1469, 1470, 1000, 1471, + 1472, 1473, 1474, 1475, 1476, 1477, 1478, 1479, 1480, 1481, + 1482, 1483, 1484, 1485, 1486, 1487, 1488, 1489, 1490, 1491, + 1492, 1000, 1000, 1000, 1493, 1494, 1495, 1496, 1497, 1498, + 1499, 1500, 1501, 1502, 1503, 1504, 1505, 1506, 1507, 1508, + 1509, 1510, 1511, 1512, 1513, 1514, 1515, 1516, 1517, 1518, + 1519, 1520, 1523, 1524, 1525, 1521, 1526, 1527, 1528, 1529, + 1530, 1531, 1534, 1535, 1536, 1532, 1537, 1538, 1522, 1539, + 1542, 1543, 1544, 1540, 1545, 1546, 1547, 1548, 1533, 1549, + 1550, 1551, 1552, 1553, 1554, 1555, 1541, 1556, 1557, 1558, + + 1559, 1560, 1561, 1562, 1563, 1564, 1565, 1566, 1567, 1568, + 1569, 1570, 1571, 1572, 1573, 1574, 1575, 1576, 1577, 1578, + 1579, 1580, 1581, 1582, 1583, 1584, 1585, 1586, 1587, 1588, + 1589, 1590, 1591, 1592, 1593, 1594, 1595, 1596, 1597, 1598, + 1599, 1600, 1601, 1602, 1603, 1604, 1605, 1606, 1607, 1608, + 1609, 1610, 1611, 1612, 1613, 1614, 1615, 1616, 1617, 1618, + 1619, 1620, 1621, 1622, 1623, 1624, 1625, 1626, 1627, 1628, + 1629, 1630, 1631, 1632, 1633, 1634, 1635, 1636, 1637, 1638, + 1639, 1640, 1641, 1642, 1643, 1644, 1645, 1646, 1647, 1648, + 1649, 1650, 1651, 1652, 1653, 1654, 1655, 1656, 1657, 1658, + + 1659, 1660, 1661, 1662, 1663, 1664, 1665, 1666, 1667, 1668, + 1669, 1670, 1671, 1672, 1673, 1674, 1675, 1676, 1677, 1678, + 1679, 1680, 20, 20, 20, 20, 20, 20, 20, 20, + 20, 20, 155, 155, 155, 155, 155, 155, 155, 155, + 155, 155, 21, 21, 21, 21, 21, 21, 21, 21, + 21, 21, 204, 204, 204, 204, 204, 204, 204, 204, + 204, 204, 208, 208, 208, 208, 208, 208, 208, 208, + 208, 208, 215, 215, 215, 215, 215, 215, 215, 215, + 217, 217, 217, 217, 217, 217, 217, 217, 217, 217, + 292, 292, 523, 292, 292, 292, 292, 341, 341, 341, + + 341, 341, 341, 341, 402, 964, 963, 962, 402, 402, + 402, 404, 404, 404, 404, 404, 404, 404, 404, 404, + 404, 406, 406, 961, 406, 406, 406, 406, 408, 960, + 408, 408, 408, 408, 408, 408, 408, 408, 410, 959, + 410, 410, 410, 410, 410, 410, 410, 410, 447, 958, + 447, 447, 447, 447, 447, 447, 447, 447, 448, 957, + 448, 449, 449, 956, 955, 449, 449, 954, 449, 522, + 522, 953, 522, 522, 522, 522, 560, 560, 560, 560, + 560, 560, 560, 990, 952, 990, 990, 990, 990, 990, + 990, 990, 990, 1001, 951, 1001, 1001, 1001, 1001, 1001, + + 1001, 1001, 1001, 989, 950, 989, 989, 989, 989, 989, + 989, 989, 989, 1000, 949, 1000, 1000, 1000, 1000, 1000, + 1000, 1000, 1000, 948, 947, 946, 945, 944, 943, 942, + 941, 940, 939, 938, 937, 936, 935, 934, 933, 932, + 931, 930, 929, 928, 927, 926, 925, 924, 923, 922, + 921, 920, 919, 918, 917, 916, 915, 914, 913, 912, + 911, 910, 909, 908, 907, 906, 905, 904, 903, 902, + 901, 900, 899, 898, 897, 896, 895, 894, 893, 892, + 891, 890, 889, 888, 887, 886, 885, 884, 883, 882, + 881, 880, 879, 878, 877, 876, 875, 874, 873, 872, + + 871, 870, 869, 868, 867, 866, 865, 864, 863, 862, + 861, 860, 859, 858, 857, 856, 855, 851, 850, 849, + 848, 847, 846, 845, 844, 843, 842, 841, 840, 839, + 836, 835, 834, 833, 832, 831, 830, 829, 828, 827, + 826, 825, 824, 823, 820, 819, 818, 817, 816, 815, + 814, 813, 812, 811, 810, 809, 808, 807, 806, 805, + 804, 803, 802, 801, 800, 799, 798, 797, 796, 795, + 794, 793, 792, 791, 790, 789, 788, 787, 786, 785, + 784, 783, 782, 781, 780, 779, 778, 777, 776, 775, + 774, 773, 772, 771, 770, 769, 768, 767, 766, 765, + + 764, 763, 762, 761, 760, 759, 758, 757, 756, 755, + 754, 753, 752, 751, 750, 749, 748, 747, 746, 745, + 744, 743, 742, 741, 740, 739, 738, 737, 735, 734, + 733, 732, 731, 730, 729, 728, 726, 725, 724, 723, + 722, 721, 720, 719, 718, 717, 716, 715, 714, 713, + 712, 711, 710, 709, 708, 707, 706, 705, 704, 703, + 702, 701, 700, 699, 698, 697, 696, 695, 694, 693, + 692, 691, 690, 689, 688, 687, 686, 685, 684, 683, + 682, 681, 680, 679, 678, 677, 676, 675, 674, 673, + 672, 671, 670, 669, 668, 667, 666, 665, 449, 450, + + 446, 661, 660, 659, 658, 657, 656, 655, 654, 653, + 652, 651, 650, 647, 645, 644, 643, 642, 641, 640, + 639, 638, 637, 636, 635, 634, 631, 405, 627, 626, + 625, 624, 623, 622, 621, 620, 619, 618, 617, 616, + 615, 614, 610, 609, 608, 607, 606, 605, 604, 603, + 599, 598, 597, 592, 591, 590, 584, 583, 582, 581, + 580, 577, 576, 575, 574, 573, 570, 569, 568, 567, + 564, 563, 562, 561, 558, 556, 555, 554, 553, 552, + 551, 550, 549, 546, 545, 544, 543, 542, 541, 537, + 536, 535, 530, 529, 526, 520, 519, 518, 517, 516, + + 515, 514, 513, 512, 511, 510, 509, 508, 507, 503, + 502, 501, 500, 499, 498, 497, 496, 492, 491, 490, + 487, 486, 485, 479, 478, 477, 476, 475, 472, 471, + 470, 469, 468, 465, 464, 463, 462, 459, 458, 457, + 456, 455, 454, 218, 214, 450, 298, 446, 445, 442, + 441, 440, 429, 426, 425, 424, 306, 299, 296, 295, + 409, 405, 291, 401, 400, 399, 398, 397, 396, 386, + 385, 370, 369, 368, 367, 340, 334, 324, 323, 322, + 306, 295, 294, 218, 291, 214, 288, 287, 286, 285, + 284, 283, 273, 272, 258, 257, 256, 255, 232, 224, + + 223, 222, 218, 216, 214, 1681, 19, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681 + } ; + +static yyconst flex_int16_t yy_chk[2689] = + { 0, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 5, 5, 5, 5, 5, 5, 5, 5, 5, + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + 5, 5, 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 9, 9, 9, 9, 9, 9, 9, + 9, 9, 9, 9, 9, 9, 9, 9, 36, 800, + 9, 9, 9, 9, 9, 9, 9, 9, 28, 36, + 41, 41, 13, 13, 14, 14, 13, 664, 14, 43, + 43, 45, 28, 45, 48, 45, 46, 13, 48, 14, + 46, 45, 47, 46, 9, 47, 9, 9, 45, 45, + + 49, 50, 48, 57, 50, 89, 46, 50, 55, 55, + 49, 56, 72, 57, 664, 56, 89, 118, 87, 55, + 9, 9, 9, 10, 10, 10, 10, 10, 10, 10, + 10, 10, 10, 10, 10, 10, 10, 10, 37, 37, + 10, 10, 10, 10, 10, 10, 10, 10, 13, 59, + 14, 81, 129, 58, 91, 129, 37, 58, 37, 59, + 58, 58, 87, 94, 94, 81, 96, 96, 72, 37, + 107, 801, 179, 118, 10, 109, 10, 10, 179, 62, + 107, 91, 62, 62, 108, 109, 37, 124, 37, 62, + 62, 62, 108, 802, 62, 62, 37, 804, 124, 62, + + 10, 10, 10, 11, 11, 11, 11, 11, 11, 11, + 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, + 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, + 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, + 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, + 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, + 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, + 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, + 11, 11, 11, 11, 15, 15, 15, 15, 15, 15, + 805, 15, 15, 15, 15, 15, 15, 15, 15, 122, + + 15, 15, 15, 15, 15, 15, 15, 15, 15, 38, + 38, 806, 168, 99, 110, 99, 131, 112, 110, 192, + 99, 112, 110, 99, 192, 300, 131, 38, 112, 38, + 99, 99, 100, 112, 100, 15, 15, 15, 15, 168, + 128, 807, 100, 122, 128, 100, 139, 128, 132, 100, + 100, 132, 300, 210, 132, 209, 139, 38, 196, 38, + 128, 15, 15, 15, 15, 16, 16, 16, 16, 16, + 16, 196, 16, 16, 16, 16, 16, 16, 16, 16, + 183, 16, 16, 16, 16, 16, 16, 16, 16, 16, + 101, 101, 130, 101, 101, 183, 130, 103, 138, 103, + + 210, 101, 138, 102, 374, 102, 138, 103, 101, 101, + 130, 209, 374, 102, 103, 103, 16, 16, 16, 16, + 102, 102, 127, 239, 127, 102, 127, 137, 137, 140, + 808, 141, 127, 140, 662, 239, 140, 140, 137, 127, + 127, 141, 16, 16, 16, 16, 17, 17, 17, 211, + 17, 17, 809, 17, 17, 17, 17, 810, 17, 17, + 174, 174, 17, 17, 17, 17, 17, 17, 17, 17, + 115, 174, 115, 176, 144, 662, 811, 144, 144, 245, + 115, 245, 261, 176, 144, 144, 144, 115, 115, 144, + 144, 175, 175, 177, 144, 261, 251, 178, 175, 211, + + 330, 115, 175, 177, 411, 177, 17, 178, 17, 330, + 178, 187, 17, 251, 411, 177, 274, 317, 274, 317, + 190, 187, 274, 17, 17, 17, 17, 18, 18, 18, + 190, 18, 18, 812, 18, 18, 18, 18, 813, 18, + 18, 663, 187, 18, 18, 18, 18, 18, 18, 18, + 18, 187, 125, 125, 265, 312, 188, 265, 189, 357, + 363, 357, 190, 265, 126, 126, 188, 312, 189, 190, + 125, 219, 125, 219, 227, 227, 453, 363, 323, 663, + 191, 323, 126, 125, 126, 351, 188, 18, 189, 18, + 191, 323, 227, 18, 227, 189, 814, 351, 373, 815, + + 125, 219, 125, 219, 18, 18, 18, 18, 26, 26, + 125, 373, 126, 451, 126, 453, 26, 26, 26, 26, + 26, 26, 227, 191, 227, 257, 301, 301, 257, 369, + 257, 387, 369, 387, 369, 816, 817, 387, 257, 818, + 819, 257, 369, 820, 301, 369, 301, 26, 26, 26, + 26, 26, 26, 79, 79, 452, 821, 301, 822, 413, + 826, 79, 79, 79, 79, 79, 79, 451, 307, 413, + 307, 308, 827, 308, 301, 831, 301, 430, 307, 832, + 432, 308, 834, 835, 301, 307, 307, 430, 308, 308, + 432, 836, 79, 79, 79, 79, 79, 79, 90, 90, + + 837, 345, 345, 838, 842, 452, 90, 90, 90, 90, + 90, 90, 843, 90, 412, 309, 90, 309, 90, 345, + 90, 345, 631, 430, 412, 309, 432, 378, 631, 90, + 378, 412, 309, 309, 847, 848, 378, 90, 90, 90, + 90, 90, 90, 314, 90, 314, 90, 850, 90, 345, + 90, 345, 851, 314, 416, 852, 90, 98, 98, 855, + 314, 314, 857, 417, 416, 98, 98, 98, 98, 98, + 98, 416, 98, 417, 853, 318, 98, 318, 858, 98, + 417, 647, 859, 98, 98, 318, 860, 647, 98, 854, + 863, 862, 318, 318, 864, 433, 98, 98, 98, 98, + + 98, 98, 319, 98, 319, 433, 319, 852, 862, 98, + 865, 853, 319, 868, 869, 98, 121, 121, 871, 319, + 319, 339, 873, 339, 121, 121, 121, 121, 121, 121, + 525, 339, 525, 523, 874, 523, 854, 875, 339, 339, + 525, 433, 876, 877, 878, 879, 525, 525, 525, 880, + 881, 882, 883, 884, 885, 121, 121, 121, 121, 121, + 121, 152, 152, 523, 886, 523, 887, 339, 889, 152, + 152, 152, 152, 152, 152, 534, 890, 534, 891, 892, + 893, 895, 534, 896, 897, 534, 899, 900, 901, 902, + 903, 904, 534, 534, 905, 906, 907, 908, 909, 911, + + 152, 152, 152, 152, 152, 152, 160, 160, 912, 913, + 915, 917, 918, 919, 160, 160, 160, 160, 160, 160, + 920, 921, 922, 923, 924, 925, 926, 927, 928, 929, + 930, 931, 932, 933, 935, 936, 937, 938, 940, 941, + 942, 943, 946, 947, 949, 160, 160, 160, 160, 160, + 160, 173, 173, 951, 952, 940, 953, 954, 955, 173, + 173, 173, 173, 173, 173, 956, 173, 957, 958, 959, + 173, 960, 961, 173, 962, 963, 964, 965, 967, 968, + 969, 970, 173, 971, 973, 974, 975, 977, 978, 979, + 173, 173, 173, 173, 173, 173, 980, 173, 981, 982, + + 983, 984, 986, 173, 987, 988, 992, 994, 995, 173, + 293, 293, 997, 998, 999, 1003, 1005, 1006, 293, 293, + 293, 293, 293, 293, 1008, 1009, 1010, 1012, 293, 1007, + 293, 1014, 1015, 1016, 1017, 1018, 1019, 1021, 1022, 1023, + 1024, 1026, 1028, 1030, 1031, 1033, 1035, 1036, 1037, 293, + 293, 293, 293, 293, 293, 1038, 1039, 1040, 293, 1041, + 293, 342, 342, 1042, 1043, 1044, 1006, 1045, 1046, 342, + 342, 342, 342, 342, 342, 1049, 1007, 1050, 1051, 342, + 1052, 342, 1053, 1055, 1056, 1057, 1058, 1059, 1060, 1061, + 1063, 1064, 1066, 1068, 1069, 1070, 1071, 1072, 1073, 1074, + + 342, 342, 342, 342, 342, 342, 1075, 1076, 1077, 342, + 1079, 342, 403, 403, 1081, 1082, 1083, 1084, 1085, 1086, + 403, 403, 403, 403, 403, 403, 1088, 1089, 1090, 1091, + 403, 1093, 403, 1095, 1097, 1098, 1100, 1102, 1103, 1104, + 1105, 1106, 1107, 1108, 1109, 1110, 1111, 1112, 1113, 1116, + 1117, 403, 403, 403, 403, 403, 403, 1118, 1119, 1120, + 403, 1124, 403, 407, 407, 1125, 1126, 1130, 1131, 1132, + 1133, 407, 407, 407, 407, 407, 407, 1135, 1136, 1137, + 1138, 407, 1139, 407, 1141, 1142, 1144, 1145, 1146, 1147, + 1148, 1150, 1151, 1153, 1154, 1155, 1156, 1151, 1157, 1158, + + 1159, 1162, 407, 407, 407, 407, 407, 407, 1164, 1165, + 1166, 407, 1168, 407, 828, 828, 1169, 828, 828, 828, + 1170, 828, 828, 828, 828, 828, 1172, 828, 1174, 1175, + 1176, 1177, 1179, 1180, 828, 828, 828, 828, 828, 1181, + 1183, 1184, 1185, 1186, 1188, 1189, 1190, 1191, 1192, 1194, + 1195, 1197, 1198, 1199, 1200, 1201, 1203, 1204, 1206, 1207, + 1208, 1209, 1204, 1210, 1211, 1212, 1215, 1217, 828, 1218, + 1219, 1220, 1221, 1222, 1223, 1224, 1226, 1228, 1229, 1230, + 1231, 1232, 1233, 1234, 1235, 1237, 1238, 1239, 1240, 1241, + 1242, 828, 828, 828, 844, 844, 1243, 844, 844, 844, + + 1245, 844, 844, 844, 844, 844, 1246, 844, 1250, 1252, + 1254, 1247, 1255, 1256, 844, 844, 844, 844, 844, 1247, + 1258, 1259, 1260, 1261, 1247, 1262, 1265, 1267, 1269, 1270, + 1271, 1272, 1273, 1274, 1275, 1276, 1278, 1279, 1280, 1281, + 1282, 1283, 1284, 1286, 1287, 1288, 1291, 1299, 844, 1300, + 1301, 1302, 1303, 1288, 1304, 1305, 1306, 1307, 1288, 1308, + 1309, 1310, 1311, 1312, 1313, 1314, 1315, 1308, 1316, 1317, + 1318, 844, 844, 844, 990, 990, 1319, 990, 990, 990, + 1321, 990, 990, 990, 990, 990, 1322, 990, 1323, 1324, + 1326, 1325, 1327, 1328, 990, 990, 990, 990, 990, 1325, + + 1329, 1331, 1332, 1333, 1334, 1335, 1336, 1337, 1338, 1339, + 1340, 1341, 1342, 1343, 1344, 1345, 1346, 1347, 1340, 1348, + 1349, 1350, 1351, 1352, 1353, 1354, 1355, 1356, 990, 1357, + 1358, 1360, 1363, 1364, 1365, 1366, 1368, 1369, 1370, 1371, + 1372, 1373, 1374, 1375, 1376, 1377, 1380, 1381, 1382, 1383, + 1384, 990, 990, 990, 1001, 1001, 1385, 1001, 1001, 1001, + 1386, 1001, 1001, 1001, 1001, 1001, 1387, 1001, 1388, 1389, + 1390, 1392, 1395, 1396, 1001, 1001, 1001, 1001, 1001, 1397, + 1398, 1400, 1401, 1402, 1403, 1404, 1405, 1406, 1407, 1408, + 1409, 1410, 1411, 1412, 1415, 1416, 1417, 1418, 1419, 1420, + + 1421, 1422, 1423, 1424, 1425, 1426, 1428, 1429, 1001, 1430, + 1431, 1432, 1433, 1434, 1435, 1436, 1437, 1438, 1441, 1442, + 1443, 1444, 1445, 1446, 1447, 1448, 1449, 1451, 1452, 1454, + 1455, 1001, 1001, 1001, 1456, 1457, 1458, 1460, 1461, 1462, + 1463, 1465, 1466, 1468, 1469, 1470, 1471, 1472, 1474, 1475, + 1477, 1478, 1479, 1480, 1481, 1483, 1484, 1485, 1486, 1488, + 1489, 1490, 1491, 1492, 1493, 1490, 1495, 1497, 1498, 1499, + 1500, 1501, 1502, 1503, 1505, 1501, 1506, 1507, 1490, 1508, + 1509, 1510, 1511, 1508, 1513, 1515, 1516, 1517, 1501, 1518, + 1519, 1520, 1521, 1522, 1523, 1524, 1508, 1525, 1528, 1529, + + 1531, 1532, 1533, 1534, 1538, 1539, 1540, 1541, 1542, 1543, + 1544, 1547, 1548, 1550, 1551, 1552, 1553, 1554, 1555, 1556, + 1557, 1558, 1559, 1560, 1561, 1562, 1563, 1564, 1565, 1566, + 1567, 1568, 1569, 1570, 1571, 1572, 1573, 1575, 1576, 1577, + 1578, 1579, 1580, 1581, 1583, 1584, 1585, 1586, 1588, 1589, + 1590, 1591, 1592, 1593, 1594, 1595, 1596, 1597, 1598, 1599, + 1601, 1602, 1603, 1604, 1605, 1606, 1607, 1608, 1609, 1610, + 1612, 1613, 1615, 1616, 1617, 1618, 1619, 1621, 1622, 1623, + 1625, 1626, 1627, 1628, 1629, 1630, 1631, 1632, 1633, 1635, + 1636, 1638, 1639, 1640, 1641, 1643, 1644, 1645, 1646, 1647, + + 1648, 1649, 1650, 1651, 1652, 1653, 1654, 1656, 1657, 1658, + 1660, 1662, 1663, 1664, 1667, 1668, 1671, 1672, 1674, 1676, + 1677, 1678, 1682, 1682, 1682, 1682, 1682, 1682, 1682, 1682, + 1682, 1682, 1683, 1683, 1683, 1683, 1683, 1683, 1683, 1683, + 1683, 1683, 1684, 1684, 1684, 1684, 1684, 1684, 1684, 1684, + 1684, 1684, 1685, 1685, 1685, 1685, 1685, 1685, 1685, 1685, + 1685, 1685, 1686, 1686, 1686, 1686, 1686, 1686, 1686, 1686, + 1686, 1686, 1687, 1687, 1687, 1687, 1687, 1687, 1687, 1687, + 1688, 1688, 1688, 1688, 1688, 1688, 1688, 1688, 1688, 1688, + 1689, 1689, 1700, 1689, 1689, 1689, 1689, 1690, 1690, 1690, + + 1690, 1690, 1690, 1690, 1691, 799, 798, 797, 1691, 1691, + 1691, 1692, 1692, 1692, 1692, 1692, 1692, 1692, 1692, 1692, + 1692, 1693, 1693, 796, 1693, 1693, 1693, 1693, 1694, 795, + 1694, 1694, 1694, 1694, 1694, 1694, 1694, 1694, 1695, 794, + 1695, 1695, 1695, 1695, 1695, 1695, 1695, 1695, 1696, 792, + 1696, 1696, 1696, 1696, 1696, 1696, 1696, 1696, 1697, 790, + 1697, 1698, 1698, 789, 788, 1698, 1698, 786, 1698, 1699, + 1699, 785, 1699, 1699, 1699, 1699, 1701, 1701, 1701, 1701, + 1701, 1701, 1701, 1702, 784, 1702, 1702, 1702, 1702, 1702, + 1702, 1702, 1702, 1703, 782, 1703, 1703, 1703, 1703, 1703, + + 1703, 1703, 1703, 1704, 781, 1704, 1704, 1704, 1704, 1704, + 1704, 1704, 1704, 1705, 780, 1705, 1705, 1705, 1705, 1705, + 1705, 1705, 1705, 779, 777, 776, 775, 774, 773, 772, + 771, 769, 767, 765, 764, 763, 762, 761, 759, 758, + 757, 756, 755, 754, 753, 752, 751, 750, 749, 748, + 747, 745, 744, 742, 740, 739, 738, 737, 736, 735, + 733, 732, 730, 729, 728, 726, 725, 724, 723, 722, + 721, 720, 719, 718, 717, 716, 715, 714, 713, 712, + 711, 710, 708, 707, 706, 705, 704, 703, 702, 701, + 700, 698, 696, 695, 694, 692, 691, 690, 688, 687, + + 686, 685, 683, 682, 681, 680, 679, 678, 677, 675, + 673, 671, 670, 669, 668, 667, 665, 661, 660, 659, + 658, 657, 656, 655, 654, 653, 652, 650, 649, 648, + 646, 645, 644, 643, 642, 641, 640, 639, 638, 637, + 636, 634, 633, 632, 630, 627, 624, 623, 622, 621, + 620, 619, 618, 617, 616, 615, 614, 613, 612, 611, + 610, 609, 608, 607, 606, 605, 604, 603, 602, 601, + 600, 599, 597, 594, 593, 592, 591, 590, 589, 588, + 587, 586, 585, 583, 582, 581, 580, 579, 578, 577, + 576, 575, 574, 573, 572, 571, 570, 569, 568, 567, + + 566, 565, 564, 563, 562, 561, 558, 557, 556, 555, + 554, 553, 552, 551, 550, 549, 548, 547, 546, 543, + 542, 541, 540, 539, 538, 537, 536, 535, 533, 532, + 531, 530, 529, 528, 527, 526, 524, 520, 517, 516, + 515, 514, 513, 512, 511, 510, 509, 508, 507, 506, + 505, 504, 503, 502, 501, 500, 499, 498, 497, 496, + 495, 494, 493, 492, 491, 489, 488, 487, 486, 485, + 484, 483, 482, 481, 480, 478, 477, 476, 475, 474, + 473, 472, 471, 470, 469, 468, 467, 466, 465, 464, + 463, 462, 461, 460, 459, 458, 457, 456, 450, 449, + + 446, 445, 444, 443, 442, 441, 440, 439, 438, 437, + 436, 435, 434, 431, 429, 428, 427, 426, 425, 424, + 423, 422, 421, 420, 419, 418, 415, 404, 401, 400, + 399, 398, 397, 396, 395, 394, 393, 392, 391, 390, + 389, 388, 386, 385, 384, 383, 382, 381, 380, 379, + 377, 376, 375, 372, 371, 370, 368, 367, 366, 365, + 364, 362, 361, 360, 359, 358, 356, 355, 354, 353, + 350, 349, 348, 347, 340, 338, 337, 336, 335, 334, + 333, 332, 331, 329, 328, 327, 326, 325, 324, 322, + 321, 320, 316, 315, 311, 288, 287, 286, 285, 284, + + 283, 282, 281, 280, 279, 278, 277, 276, 275, 273, + 272, 271, 270, 269, 268, 267, 266, 264, 263, 262, + 260, 259, 258, 256, 255, 254, 253, 252, 250, 249, + 248, 247, 246, 244, 243, 242, 241, 238, 237, 236, + 235, 234, 230, 217, 214, 208, 202, 199, 197, 195, + 194, 193, 184, 182, 181, 180, 171, 166, 164, 162, + 161, 159, 158, 150, 149, 148, 147, 146, 145, 143, + 142, 136, 135, 134, 133, 116, 111, 106, 105, 104, + 95, 85, 84, 78, 77, 76, 70, 69, 68, 67, + 64, 63, 61, 60, 54, 53, 52, 51, 42, 34, + + 32, 31, 25, 24, 22, 19, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681, + 1681, 1681, 1681, 1681, 1681, 1681, 1681, 1681 + } ; + +static yy_state_type yy_last_accepting_state; +static char *yy_last_accepting_cpos; + +extern int yy_flex_debug; +int yy_flex_debug = 0; + +/* The intent behind this definition is that it'll catch + * any uses of REJECT which flex missed. + */ +#define REJECT reject_used_but_not_detected +#define yymore() yymore_used_but_not_detected +#define YY_MORE_ADJ 0 +#define YY_RESTORE_YY_MORE_OFFSET +char *yytext; +#line 1 "ldlex.l" +#line 4 "ldlex.l" + +/* Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, + 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 + Free Software Foundation, Inc. + Written by Steve Chamberlain of Cygnus Support. + + This file is part of the GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "bfd.h" +#include "safe-ctype.h" +#include "bfdlink.h" +#include "ld.h" +#include "ldmisc.h" +#include "ldexp.h" +#include "ldlang.h" +#include +#include "ldfile.h" +#include "ldlex.h" +#include "ldmain.h" +#include "libiberty.h" + +/* The type of top-level parser input. + yylex and yyparse (indirectly) both check this. */ +input_type parser_input; + +/* Line number in the current input file. + (FIXME Actually, it doesn't appear to get reset for each file?) */ +unsigned int lineno = 1; + +/* The string we are currently lexing, or NULL if we are reading a + file. */ +const char *lex_string = NULL; + +/* Support for flex reading from more than one input file (stream). + `include_stack' is flex's input state for each open file; + `file_name_stack' is the file names. `lineno_stack' is the current + line numbers. + + If `include_stack_ptr' is 0, we haven't started reading anything yet. + Otherwise, stack elements 0 through `include_stack_ptr - 1' are valid. */ + +#undef YY_INPUT +#define YY_INPUT(buf,result,max_size) result = yy_input (buf, max_size) + +#ifndef YY_NO_UNPUT +#define YY_NO_UNPUT +#endif + +#define MAX_INCLUDE_DEPTH 10 +static YY_BUFFER_STATE include_stack[MAX_INCLUDE_DEPTH]; +static const char *file_name_stack[MAX_INCLUDE_DEPTH]; +static unsigned int lineno_stack[MAX_INCLUDE_DEPTH]; +static unsigned int include_stack_ptr = 0; +static int vers_node_nesting = 0; + +static int yy_input (char *, int); +static void comment (void); +static void lex_warn_invalid (char *where, char *what); + +/* STATES + EXPRESSION definitely in an expression + SCRIPT definitely in a script + BOTH either EXPRESSION or SCRIPT + DEFSYMEXP in an argument to -defsym + MRI in an MRI script + VERS_START starting a Sun style mapfile + VERS_SCRIPT a Sun style mapfile + VERS_NODE a node within a Sun style mapfile +*/ +#define RTOKEN(x) { yylval.token = x; return x; } + +/* Some versions of flex want this. */ +#ifndef yywrap +int yywrap (void) { return 1; } +#endif + + + + + + + + +#line 1702 "ldlex.c" + +#define INITIAL 0 +#define SCRIPT 1 +#define EXPRESSION 2 +#define BOTH 3 +#define DEFSYMEXP 4 +#define MRI 5 +#define VERS_START 6 +#define VERS_SCRIPT 7 +#define VERS_NODE 8 + +#ifndef YY_NO_UNISTD_H +/* Special case for "unistd.h", since it is non-ANSI. We include it way + * down here because we want the user's section 1 to have been scanned first. + * The user has a chance to override it with an option. + */ +#include +#endif + +#ifndef YY_EXTRA_TYPE +#define YY_EXTRA_TYPE void * +#endif + +static int yy_init_globals (void ); + +/* Accessor methods to globals. + These are made visible to non-reentrant scanners for convenience. */ + +int yylex_destroy (void ); + +int yyget_debug (void ); + +void yyset_debug (int debug_flag ); + +YY_EXTRA_TYPE yyget_extra (void ); + +void yyset_extra (YY_EXTRA_TYPE user_defined ); + +FILE *yyget_in (void ); + +void yyset_in (FILE * in_str ); + +FILE *yyget_out (void ); + +void yyset_out (FILE * out_str ); + +yy_size_t yyget_leng (void ); + +char *yyget_text (void ); + +int yyget_lineno (void ); + +void yyset_lineno (int line_number ); + +/* Macros after this point can all be overridden by user definitions in + * section 1. + */ + +#ifndef YY_SKIP_YYWRAP +#ifdef __cplusplus +extern "C" int yywrap (void ); +#else +extern int yywrap (void ); +#endif +#endif + +#ifndef yytext_ptr +static void yy_flex_strncpy (char *,yyconst char *,int ); +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * ); +#endif + +#ifndef YY_NO_INPUT + +#ifdef __cplusplus +static int yyinput (void ); +#else +static int input (void ); +#endif + +#endif + +/* Amount of stuff to slurp up with each read. */ +#ifndef YY_READ_BUF_SIZE +#define YY_READ_BUF_SIZE 8192 +#endif + +/* Copy whatever the last rule matched to the standard output. */ +#ifndef ECHO +/* This used to be an fputs(), but since the string might contain NUL's, + * we now use fwrite(). + */ +#define ECHO fwrite( yytext, yyleng, 1, yyout ) +#endif + +/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, + * is returned in "result". + */ +#ifndef YY_INPUT +#define YY_INPUT(buf,result,max_size) \ + if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ + { \ + int c = '*'; \ + yy_size_t n; \ + for ( n = 0; n < max_size && \ + (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ + buf[n] = (char) c; \ + if ( c == '\n' ) \ + buf[n++] = (char) c; \ + if ( c == EOF && ferror( yyin ) ) \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + result = n; \ + } \ + else \ + { \ + errno=0; \ + while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ + { \ + if( errno != EINTR) \ + { \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + break; \ + } \ + errno=0; \ + clearerr(yyin); \ + } \ + }\ +\ + +#endif + +/* No semi-colon after return; correct usage is to write "yyterminate();" - + * we don't want an extra ';' after the "return" because that will cause + * some compilers to complain about unreachable statements. + */ +#ifndef yyterminate +#define yyterminate() return YY_NULL +#endif + +/* Number of entries by which start-condition stack grows. */ +#ifndef YY_START_STACK_INCR +#define YY_START_STACK_INCR 25 +#endif + +/* Report a fatal error. */ +#ifndef YY_FATAL_ERROR +#define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) +#endif + +/* end tables serialization structures and prototypes */ + +/* Default declaration of generated scanner - a define so the user can + * easily add parameters. + */ +#ifndef YY_DECL +#define YY_DECL_IS_OURS 1 + +extern int yylex (void); + +#define YY_DECL int yylex (void) +#endif /* !YY_DECL */ + +/* Code executed at the beginning of each rule, after yytext and yyleng + * have been set up. + */ +#ifndef YY_USER_ACTION +#define YY_USER_ACTION +#endif + +/* Code executed at the end of each rule. */ +#ifndef YY_BREAK +#define YY_BREAK break; +#endif + +#define YY_RULE_SETUP \ + YY_USER_ACTION + +/** The main scanner function which does all the work. + */ +YY_DECL +{ + register yy_state_type yy_current_state; + register char *yy_cp, *yy_bp; + register int yy_act; + +#line 120 "ldlex.l" + + + if (parser_input != input_selected) + { + /* The first token of the input determines the initial parser state. */ + input_type t = parser_input; + parser_input = input_selected; + switch (t) + { + case input_script: return INPUT_SCRIPT; break; + case input_mri_script: return INPUT_MRI_SCRIPT; break; + case input_version_script: return INPUT_VERSION_SCRIPT; break; + case input_dynamic_list: return INPUT_DYNAMIC_LIST; break; + case input_defsym: return INPUT_DEFSYM; break; + default: abort (); + } + } + +#line 1909 "ldlex.c" + + if ( !(yy_init) ) + { + (yy_init) = 1; + +#ifdef YY_USER_INIT + YY_USER_INIT; +#endif + + if ( ! (yy_start) ) + (yy_start) = 1; /* first start state */ + + if ( ! yyin ) + yyin = stdin; + + if ( ! yyout ) + yyout = stdout; + + if ( ! YY_CURRENT_BUFFER ) { + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer(yyin,YY_BUF_SIZE ); + } + + yy_load_buffer_state( ); + } + + while ( 1 ) /* loops until end-of-file is reached */ + { + yy_cp = (yy_c_buf_p); + + /* Support of yytext. */ + *yy_cp = (yy_hold_char); + + /* yy_bp points to the position in yy_ch_buf of the start of + * the current run. + */ + yy_bp = yy_cp; + + yy_current_state = (yy_start); +yy_match: + do + { + register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)]; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 1682 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + ++yy_cp; + } + while ( yy_base[yy_current_state] != 2607 ); + +yy_find_action: + yy_act = yy_accept[yy_current_state]; + if ( yy_act == 0 ) + { /* have to back up */ + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + yy_act = yy_accept[yy_current_state]; + } + + YY_DO_BEFORE_ACTION; + +do_action: /* This label is used only to access EOF actions. */ + + switch ( yy_act ) + { /* beginning of action switch */ + case 0: /* must back up */ + /* undo the effects of YY_DO_BEFORE_ACTION */ + *yy_cp = (yy_hold_char); + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + goto yy_find_action; + +case 1: +YY_RULE_SETUP +#line 138 "ldlex.l" +{ comment (); } + YY_BREAK +case 2: +YY_RULE_SETUP +#line 141 "ldlex.l" +{ RTOKEN('-');} + YY_BREAK +case 3: +YY_RULE_SETUP +#line 142 "ldlex.l" +{ RTOKEN('+');} + YY_BREAK +case 4: +YY_RULE_SETUP +#line 143 "ldlex.l" +{ yylval.name = xstrdup (yytext); return NAME; } + YY_BREAK +case 5: +YY_RULE_SETUP +#line 144 "ldlex.l" +{ RTOKEN('='); } + YY_BREAK +case 6: +YY_RULE_SETUP +#line 146 "ldlex.l" +{ + yylval.integer = bfd_scan_vma (yytext + 1, 0, 16); + yylval.bigint.str = NULL; + return INT; + } + YY_BREAK +case 7: +YY_RULE_SETUP +#line 152 "ldlex.l" +{ + int ibase ; + switch (yytext[yyleng - 1]) { + case 'X': + case 'x': + case 'H': + case 'h': + ibase = 16; + break; + case 'O': + case 'o': + ibase = 8; + break; + case 'B': + case 'b': + ibase = 2; + break; + default: + ibase = 10; + } + yylval.integer = bfd_scan_vma (yytext, 0, + ibase); + yylval.bigint.str = NULL; + return INT; + } + YY_BREAK +case 8: +YY_RULE_SETUP +#line 177 "ldlex.l" +{ + char *s = yytext; + int ibase = 0; + + if (*s == '$') + { + ++s; + ibase = 16; + } + yylval.integer = bfd_scan_vma (s, 0, ibase); + yylval.bigint.str = NULL; + if (yytext[yyleng - 1] == 'M' + || yytext[yyleng - 1] == 'm') + { + yylval.integer *= 1024 * 1024; + } + else if (yytext[yyleng - 1] == 'K' + || yytext[yyleng - 1]=='k') + { + yylval.integer *= 1024; + } + else if (yytext[0] == '0' + && (yytext[1] == 'x' + || yytext[1] == 'X')) + { + yylval.bigint.str = xstrdup (yytext + 2); + } + return INT; + } + YY_BREAK +case 9: +YY_RULE_SETUP +#line 206 "ldlex.l" +{ RTOKEN(']');} + YY_BREAK +case 10: +YY_RULE_SETUP +#line 207 "ldlex.l" +{ RTOKEN('[');} + YY_BREAK +case 11: +YY_RULE_SETUP +#line 208 "ldlex.l" +{ RTOKEN(LSHIFTEQ);} + YY_BREAK +case 12: +YY_RULE_SETUP +#line 209 "ldlex.l" +{ RTOKEN(RSHIFTEQ);} + YY_BREAK +case 13: +YY_RULE_SETUP +#line 210 "ldlex.l" +{ RTOKEN(OROR);} + YY_BREAK +case 14: +YY_RULE_SETUP +#line 211 "ldlex.l" +{ RTOKEN(EQ);} + YY_BREAK +case 15: +YY_RULE_SETUP +#line 212 "ldlex.l" +{ RTOKEN(NE);} + YY_BREAK +case 16: +YY_RULE_SETUP +#line 213 "ldlex.l" +{ RTOKEN(GE);} + YY_BREAK +case 17: +YY_RULE_SETUP +#line 214 "ldlex.l" +{ RTOKEN(LE);} + YY_BREAK +case 18: +YY_RULE_SETUP +#line 215 "ldlex.l" +{ RTOKEN(LSHIFT);} + YY_BREAK +case 19: +YY_RULE_SETUP +#line 216 "ldlex.l" +{ RTOKEN(RSHIFT);} + YY_BREAK +case 20: +YY_RULE_SETUP +#line 217 "ldlex.l" +{ RTOKEN(PLUSEQ);} + YY_BREAK +case 21: +YY_RULE_SETUP +#line 218 "ldlex.l" +{ RTOKEN(MINUSEQ);} + YY_BREAK +case 22: +YY_RULE_SETUP +#line 219 "ldlex.l" +{ RTOKEN(MULTEQ);} + YY_BREAK +case 23: +YY_RULE_SETUP +#line 220 "ldlex.l" +{ RTOKEN(DIVEQ);} + YY_BREAK +case 24: +YY_RULE_SETUP +#line 221 "ldlex.l" +{ RTOKEN(ANDEQ);} + YY_BREAK +case 25: +YY_RULE_SETUP +#line 222 "ldlex.l" +{ RTOKEN(OREQ);} + YY_BREAK +case 26: +YY_RULE_SETUP +#line 223 "ldlex.l" +{ RTOKEN(ANDAND);} + YY_BREAK +case 27: +YY_RULE_SETUP +#line 224 "ldlex.l" +{ RTOKEN('>');} + YY_BREAK +case 28: +YY_RULE_SETUP +#line 225 "ldlex.l" +{ RTOKEN(',');} + YY_BREAK +case 29: +YY_RULE_SETUP +#line 226 "ldlex.l" +{ RTOKEN('&');} + YY_BREAK +case 30: +YY_RULE_SETUP +#line 227 "ldlex.l" +{ RTOKEN('|');} + YY_BREAK +case 31: +YY_RULE_SETUP +#line 228 "ldlex.l" +{ RTOKEN('~');} + YY_BREAK +case 32: +YY_RULE_SETUP +#line 229 "ldlex.l" +{ RTOKEN('!');} + YY_BREAK +case 33: +YY_RULE_SETUP +#line 230 "ldlex.l" +{ RTOKEN('?');} + YY_BREAK +case 34: +YY_RULE_SETUP +#line 231 "ldlex.l" +{ RTOKEN('*');} + YY_BREAK +case 35: +YY_RULE_SETUP +#line 232 "ldlex.l" +{ RTOKEN('+');} + YY_BREAK +case 36: +YY_RULE_SETUP +#line 233 "ldlex.l" +{ RTOKEN('-');} + YY_BREAK +case 37: +YY_RULE_SETUP +#line 234 "ldlex.l" +{ RTOKEN('/');} + YY_BREAK +case 38: +YY_RULE_SETUP +#line 235 "ldlex.l" +{ RTOKEN('%');} + YY_BREAK +case 39: +YY_RULE_SETUP +#line 236 "ldlex.l" +{ RTOKEN('<');} + YY_BREAK +case 40: +YY_RULE_SETUP +#line 237 "ldlex.l" +{ RTOKEN('=');} + YY_BREAK +case 41: +YY_RULE_SETUP +#line 238 "ldlex.l" +{ RTOKEN('}') ; } + YY_BREAK +case 42: +YY_RULE_SETUP +#line 239 "ldlex.l" +{ RTOKEN('{'); } + YY_BREAK +case 43: +YY_RULE_SETUP +#line 240 "ldlex.l" +{ RTOKEN(')');} + YY_BREAK +case 44: +YY_RULE_SETUP +#line 241 "ldlex.l" +{ RTOKEN('(');} + YY_BREAK +case 45: +YY_RULE_SETUP +#line 242 "ldlex.l" +{ RTOKEN(':'); } + YY_BREAK +case 46: +YY_RULE_SETUP +#line 243 "ldlex.l" +{ RTOKEN(';');} + YY_BREAK +case 47: +YY_RULE_SETUP +#line 244 "ldlex.l" +{ RTOKEN(MEMORY);} + YY_BREAK +case 48: +YY_RULE_SETUP +#line 245 "ldlex.l" +{ RTOKEN(REGION_ALIAS);} + YY_BREAK +case 49: +YY_RULE_SETUP +#line 246 "ldlex.l" +{ RTOKEN(LD_FEATURE);} + YY_BREAK +case 50: +YY_RULE_SETUP +#line 247 "ldlex.l" +{ RTOKEN(ORIGIN);} + YY_BREAK +case 51: +YY_RULE_SETUP +#line 248 "ldlex.l" +{ RTOKEN(VERSIONK);} + YY_BREAK +case 52: +YY_RULE_SETUP +#line 249 "ldlex.l" +{ RTOKEN(BLOCK);} + YY_BREAK +case 53: +YY_RULE_SETUP +#line 250 "ldlex.l" +{ RTOKEN(BIND);} + YY_BREAK +case 54: +YY_RULE_SETUP +#line 251 "ldlex.l" +{ RTOKEN(LENGTH);} + YY_BREAK +case 55: +YY_RULE_SETUP +#line 252 "ldlex.l" +{ RTOKEN(ALIGN_K);} + YY_BREAK +case 56: +YY_RULE_SETUP +#line 253 "ldlex.l" +{ RTOKEN(DATA_SEGMENT_ALIGN);} + YY_BREAK +case 57: +YY_RULE_SETUP +#line 254 "ldlex.l" +{ RTOKEN(DATA_SEGMENT_RELRO_END);} + YY_BREAK +case 58: +YY_RULE_SETUP +#line 255 "ldlex.l" +{ RTOKEN(DATA_SEGMENT_END);} + YY_BREAK +case 59: +YY_RULE_SETUP +#line 256 "ldlex.l" +{ RTOKEN(ADDR);} + YY_BREAK +case 60: +YY_RULE_SETUP +#line 257 "ldlex.l" +{ RTOKEN(LOADADDR);} + YY_BREAK +case 61: +YY_RULE_SETUP +#line 258 "ldlex.l" +{ RTOKEN(ALIGNOF); } + YY_BREAK +case 62: +YY_RULE_SETUP +#line 259 "ldlex.l" +{ RTOKEN(MAX_K); } + YY_BREAK +case 63: +YY_RULE_SETUP +#line 260 "ldlex.l" +{ RTOKEN(MIN_K); } + YY_BREAK +case 64: +YY_RULE_SETUP +#line 261 "ldlex.l" +{ RTOKEN(ASSERT_K); } + YY_BREAK +case 65: +YY_RULE_SETUP +#line 262 "ldlex.l" +{ RTOKEN(ENTRY);} + YY_BREAK +case 66: +YY_RULE_SETUP +#line 263 "ldlex.l" +{ RTOKEN(EXTERN);} + YY_BREAK +case 67: +YY_RULE_SETUP +#line 264 "ldlex.l" +{ RTOKEN(NEXT);} + YY_BREAK +case 68: +YY_RULE_SETUP +#line 265 "ldlex.l" +{ RTOKEN(SIZEOF_HEADERS);} + YY_BREAK +case 69: +YY_RULE_SETUP +#line 266 "ldlex.l" +{ RTOKEN(SIZEOF_HEADERS);} + YY_BREAK +case 70: +YY_RULE_SETUP +#line 267 "ldlex.l" +{ RTOKEN(SEGMENT_START);} + YY_BREAK +case 71: +YY_RULE_SETUP +#line 268 "ldlex.l" +{ RTOKEN(MAP);} + YY_BREAK +case 72: +YY_RULE_SETUP +#line 269 "ldlex.l" +{ RTOKEN(SIZEOF);} + YY_BREAK +case 73: +YY_RULE_SETUP +#line 270 "ldlex.l" +{ RTOKEN(TARGET_K);} + YY_BREAK +case 74: +YY_RULE_SETUP +#line 271 "ldlex.l" +{ RTOKEN(SEARCH_DIR);} + YY_BREAK +case 75: +YY_RULE_SETUP +#line 272 "ldlex.l" +{ RTOKEN(OUTPUT);} + YY_BREAK +case 76: +YY_RULE_SETUP +#line 273 "ldlex.l" +{ RTOKEN(INPUT);} + YY_BREAK +case 77: +YY_RULE_SETUP +#line 274 "ldlex.l" +{ RTOKEN(GROUP);} + YY_BREAK +case 78: +YY_RULE_SETUP +#line 275 "ldlex.l" +{ RTOKEN(AS_NEEDED);} + YY_BREAK +case 79: +YY_RULE_SETUP +#line 276 "ldlex.l" +{ RTOKEN(DEFINED);} + YY_BREAK +case 80: +YY_RULE_SETUP +#line 277 "ldlex.l" +{ RTOKEN(CREATE_OBJECT_SYMBOLS);} + YY_BREAK +case 81: +YY_RULE_SETUP +#line 278 "ldlex.l" +{ RTOKEN( CONSTRUCTORS);} + YY_BREAK +case 82: +YY_RULE_SETUP +#line 279 "ldlex.l" +{ RTOKEN(FORCE_COMMON_ALLOCATION);} + YY_BREAK +case 83: +YY_RULE_SETUP +#line 280 "ldlex.l" +{ RTOKEN(INHIBIT_COMMON_ALLOCATION);} + YY_BREAK +case 84: +YY_RULE_SETUP +#line 281 "ldlex.l" +{ RTOKEN(SECTIONS);} + YY_BREAK +case 85: +YY_RULE_SETUP +#line 282 "ldlex.l" +{ RTOKEN(INSERT_K);} + YY_BREAK +case 86: +YY_RULE_SETUP +#line 283 "ldlex.l" +{ RTOKEN(AFTER);} + YY_BREAK +case 87: +YY_RULE_SETUP +#line 284 "ldlex.l" +{ RTOKEN(BEFORE);} + YY_BREAK +case 88: +YY_RULE_SETUP +#line 285 "ldlex.l" +{ RTOKEN(FILL);} + YY_BREAK +case 89: +YY_RULE_SETUP +#line 286 "ldlex.l" +{ RTOKEN(STARTUP);} + YY_BREAK +case 90: +YY_RULE_SETUP +#line 287 "ldlex.l" +{ RTOKEN(OUTPUT_FORMAT);} + YY_BREAK +case 91: +YY_RULE_SETUP +#line 288 "ldlex.l" +{ RTOKEN( OUTPUT_ARCH);} + YY_BREAK +case 92: +YY_RULE_SETUP +#line 289 "ldlex.l" +{ RTOKEN(HLL);} + YY_BREAK +case 93: +YY_RULE_SETUP +#line 290 "ldlex.l" +{ RTOKEN(SYSLIB);} + YY_BREAK +case 94: +YY_RULE_SETUP +#line 291 "ldlex.l" +{ RTOKEN(FLOAT);} + YY_BREAK +case 95: +YY_RULE_SETUP +#line 292 "ldlex.l" +{ RTOKEN( QUAD);} + YY_BREAK +case 96: +YY_RULE_SETUP +#line 293 "ldlex.l" +{ RTOKEN( SQUAD);} + YY_BREAK +case 97: +YY_RULE_SETUP +#line 294 "ldlex.l" +{ RTOKEN( LONG);} + YY_BREAK +case 98: +YY_RULE_SETUP +#line 295 "ldlex.l" +{ RTOKEN( SHORT);} + YY_BREAK +case 99: +YY_RULE_SETUP +#line 296 "ldlex.l" +{ RTOKEN( BYTE);} + YY_BREAK +case 100: +YY_RULE_SETUP +#line 297 "ldlex.l" +{ RTOKEN(NOFLOAT);} + YY_BREAK +case 101: +YY_RULE_SETUP +#line 298 "ldlex.l" +{ RTOKEN(NOCROSSREFS);} + YY_BREAK +case 102: +YY_RULE_SETUP +#line 299 "ldlex.l" +{ RTOKEN(OVERLAY); } + YY_BREAK +case 103: +YY_RULE_SETUP +#line 300 "ldlex.l" +{ RTOKEN(SORT_BY_NAME); } + YY_BREAK +case 104: +YY_RULE_SETUP +#line 301 "ldlex.l" +{ RTOKEN(SORT_BY_ALIGNMENT); } + YY_BREAK +case 105: +YY_RULE_SETUP +#line 302 "ldlex.l" +{ RTOKEN(SORT_BY_NAME); } + YY_BREAK +case 106: +YY_RULE_SETUP +#line 303 "ldlex.l" +{ RTOKEN(SORT_BY_INIT_PRIORITY); } + YY_BREAK +case 107: +YY_RULE_SETUP +#line 304 "ldlex.l" +{ RTOKEN(NOLOAD);} + YY_BREAK +case 108: +YY_RULE_SETUP +#line 305 "ldlex.l" +{ RTOKEN(DSECT);} + YY_BREAK +case 109: +YY_RULE_SETUP +#line 306 "ldlex.l" +{ RTOKEN(COPY);} + YY_BREAK +case 110: +YY_RULE_SETUP +#line 307 "ldlex.l" +{ RTOKEN(INFO);} + YY_BREAK +case 111: +YY_RULE_SETUP +#line 308 "ldlex.l" +{ RTOKEN(OVERLAY);} + YY_BREAK +case 112: +YY_RULE_SETUP +#line 309 "ldlex.l" +{ RTOKEN(ONLY_IF_RO); } + YY_BREAK +case 113: +YY_RULE_SETUP +#line 310 "ldlex.l" +{ RTOKEN(ONLY_IF_RW); } + YY_BREAK +case 114: +YY_RULE_SETUP +#line 311 "ldlex.l" +{ RTOKEN(SPECIAL); } + YY_BREAK +case 115: +YY_RULE_SETUP +#line 312 "ldlex.l" +{ RTOKEN(ORIGIN);} + YY_BREAK +case 116: +YY_RULE_SETUP +#line 313 "ldlex.l" +{ RTOKEN(ORIGIN);} + YY_BREAK +case 117: +YY_RULE_SETUP +#line 314 "ldlex.l" +{ RTOKEN( LENGTH);} + YY_BREAK +case 118: +YY_RULE_SETUP +#line 315 "ldlex.l" +{ RTOKEN( LENGTH);} + YY_BREAK +case 119: +YY_RULE_SETUP +#line 316 "ldlex.l" +{ RTOKEN(INPUT_SECTION_FLAGS); } + YY_BREAK +case 120: +YY_RULE_SETUP +#line 317 "ldlex.l" +{ RTOKEN(INCLUDE);} + YY_BREAK +case 121: +YY_RULE_SETUP +#line 318 "ldlex.l" +{ RTOKEN (PHDRS); } + YY_BREAK +case 122: +YY_RULE_SETUP +#line 319 "ldlex.l" +{ RTOKEN(AT);} + YY_BREAK +case 123: +YY_RULE_SETUP +#line 320 "ldlex.l" +{ RTOKEN(SUBALIGN);} + YY_BREAK +case 124: +YY_RULE_SETUP +#line 321 "ldlex.l" +{ RTOKEN(PROVIDE); } + YY_BREAK +case 125: +YY_RULE_SETUP +#line 322 "ldlex.l" +{ RTOKEN(PROVIDE_HIDDEN); } + YY_BREAK +case 126: +YY_RULE_SETUP +#line 323 "ldlex.l" +{ RTOKEN(KEEP); } + YY_BREAK +case 127: +YY_RULE_SETUP +#line 324 "ldlex.l" +{ RTOKEN(EXCLUDE_FILE); } + YY_BREAK +case 128: +YY_RULE_SETUP +#line 325 "ldlex.l" +{ RTOKEN(CONSTANT);} + YY_BREAK +case 129: +/* rule 129 can match eol */ +YY_RULE_SETUP +#line 326 "ldlex.l" +{ ++ lineno; } + YY_BREAK +case 130: +/* rule 130 can match eol */ +YY_RULE_SETUP +#line 327 "ldlex.l" +{ ++ lineno; RTOKEN(NEWLINE); } + YY_BREAK +case 131: +YY_RULE_SETUP +#line 328 "ldlex.l" +{ /* Mri comment line */ } + YY_BREAK +case 132: +YY_RULE_SETUP +#line 329 "ldlex.l" +{ /* Mri comment line */ } + YY_BREAK +case 133: +YY_RULE_SETUP +#line 330 "ldlex.l" +{ RTOKEN(ENDWORD); } + YY_BREAK +case 134: +YY_RULE_SETUP +#line 331 "ldlex.l" +{ RTOKEN(ALIGNMOD);} + YY_BREAK +case 135: +YY_RULE_SETUP +#line 332 "ldlex.l" +{ RTOKEN(ALIGN_K);} + YY_BREAK +case 136: +YY_RULE_SETUP +#line 333 "ldlex.l" +{ RTOKEN(CHIP); } + YY_BREAK +case 137: +YY_RULE_SETUP +#line 334 "ldlex.l" +{ RTOKEN(BASE); } + YY_BREAK +case 138: +YY_RULE_SETUP +#line 335 "ldlex.l" +{ RTOKEN(ALIAS); } + YY_BREAK +case 139: +YY_RULE_SETUP +#line 336 "ldlex.l" +{ RTOKEN(TRUNCATE); } + YY_BREAK +case 140: +YY_RULE_SETUP +#line 337 "ldlex.l" +{ RTOKEN(LOAD); } + YY_BREAK +case 141: +YY_RULE_SETUP +#line 338 "ldlex.l" +{ RTOKEN(PUBLIC); } + YY_BREAK +case 142: +YY_RULE_SETUP +#line 339 "ldlex.l" +{ RTOKEN(ORDER); } + YY_BREAK +case 143: +YY_RULE_SETUP +#line 340 "ldlex.l" +{ RTOKEN(NAMEWORD); } + YY_BREAK +case 144: +YY_RULE_SETUP +#line 341 "ldlex.l" +{ RTOKEN(FORMAT); } + YY_BREAK +case 145: +YY_RULE_SETUP +#line 342 "ldlex.l" +{ RTOKEN(CASE); } + YY_BREAK +case 146: +YY_RULE_SETUP +#line 343 "ldlex.l" +{ RTOKEN(START); } + YY_BREAK +case 147: +YY_RULE_SETUP +#line 344 "ldlex.l" +{ RTOKEN(LIST); /* LIST and ignore to end of line */ } + YY_BREAK +case 148: +YY_RULE_SETUP +#line 345 "ldlex.l" +{ RTOKEN(SECT); } + YY_BREAK +case 149: +YY_RULE_SETUP +#line 346 "ldlex.l" +{ RTOKEN(ABSOLUTE); } + YY_BREAK +case 150: +YY_RULE_SETUP +#line 347 "ldlex.l" +{ RTOKEN(ENDWORD); } + YY_BREAK +case 151: +YY_RULE_SETUP +#line 348 "ldlex.l" +{ RTOKEN(ALIGNMOD);} + YY_BREAK +case 152: +YY_RULE_SETUP +#line 349 "ldlex.l" +{ RTOKEN(ALIGN_K);} + YY_BREAK +case 153: +YY_RULE_SETUP +#line 350 "ldlex.l" +{ RTOKEN(CHIP); } + YY_BREAK +case 154: +YY_RULE_SETUP +#line 351 "ldlex.l" +{ RTOKEN(BASE); } + YY_BREAK +case 155: +YY_RULE_SETUP +#line 352 "ldlex.l" +{ RTOKEN(ALIAS); } + YY_BREAK +case 156: +YY_RULE_SETUP +#line 353 "ldlex.l" +{ RTOKEN(TRUNCATE); } + YY_BREAK +case 157: +YY_RULE_SETUP +#line 354 "ldlex.l" +{ RTOKEN(LOAD); } + YY_BREAK +case 158: +YY_RULE_SETUP +#line 355 "ldlex.l" +{ RTOKEN(PUBLIC); } + YY_BREAK +case 159: +YY_RULE_SETUP +#line 356 "ldlex.l" +{ RTOKEN(ORDER); } + YY_BREAK +case 160: +YY_RULE_SETUP +#line 357 "ldlex.l" +{ RTOKEN(NAMEWORD); } + YY_BREAK +case 161: +YY_RULE_SETUP +#line 358 "ldlex.l" +{ RTOKEN(FORMAT); } + YY_BREAK +case 162: +YY_RULE_SETUP +#line 359 "ldlex.l" +{ RTOKEN(CASE); } + YY_BREAK +case 163: +YY_RULE_SETUP +#line 360 "ldlex.l" +{ RTOKEN(EXTERN); } + YY_BREAK +case 164: +YY_RULE_SETUP +#line 361 "ldlex.l" +{ RTOKEN(START); } + YY_BREAK +case 165: +YY_RULE_SETUP +#line 362 "ldlex.l" +{ RTOKEN(LIST); /* LIST and ignore to end of line */ } + YY_BREAK +case 166: +YY_RULE_SETUP +#line 363 "ldlex.l" +{ RTOKEN(SECT); } + YY_BREAK +case 167: +YY_RULE_SETUP +#line 364 "ldlex.l" +{ RTOKEN(ABSOLUTE); } + YY_BREAK +case 168: +YY_RULE_SETUP +#line 366 "ldlex.l" +{ +/* Filename without commas, needed to parse mri stuff */ + yylval.name = xstrdup (yytext); + return NAME; + } + YY_BREAK +case 169: +YY_RULE_SETUP +#line 373 "ldlex.l" +{ + yylval.name = xstrdup (yytext); + return NAME; + } + YY_BREAK +case 170: +YY_RULE_SETUP +#line 377 "ldlex.l" +{ + yylval.name = xstrdup (yytext + 2); + return LNAME; + } + YY_BREAK +case 171: +YY_RULE_SETUP +#line 381 "ldlex.l" +{ + yylval.name = xstrdup (yytext); + return NAME; + } + YY_BREAK +case 172: +YY_RULE_SETUP +#line 385 "ldlex.l" +{ + yylval.name = xstrdup (yytext + 2); + return LNAME; + } + YY_BREAK +case 173: +YY_RULE_SETUP +#line 389 "ldlex.l" +{ + /* Annoyingly, this pattern can match comments, and we have + longest match issues to consider. So if the first two + characters are a comment opening, put the input back and + try again. */ + if (yytext[0] == '/' && yytext[1] == '*') + { + yyless (2); + comment (); + } + else + { + yylval.name = xstrdup (yytext); + return NAME; + } + } + YY_BREAK +case 174: +/* rule 174 can match eol */ +YY_RULE_SETUP +#line 406 "ldlex.l" +{ + /* No matter the state, quotes + give what's inside */ + yylval.name = xstrdup (yytext + 1); + yylval.name[yyleng - 2] = 0; + return NAME; + } + YY_BREAK +case 175: +/* rule 175 can match eol */ +YY_RULE_SETUP +#line 413 "ldlex.l" +{ lineno++;} + YY_BREAK +case 176: +YY_RULE_SETUP +#line 414 "ldlex.l" +{ } + YY_BREAK +case 177: +YY_RULE_SETUP +#line 416 "ldlex.l" +{ return *yytext; } + YY_BREAK +case 178: +YY_RULE_SETUP +#line 418 "ldlex.l" +{ RTOKEN(GLOBAL); } + YY_BREAK +case 179: +YY_RULE_SETUP +#line 420 "ldlex.l" +{ RTOKEN(LOCAL); } + YY_BREAK +case 180: +YY_RULE_SETUP +#line 422 "ldlex.l" +{ RTOKEN(EXTERN); } + YY_BREAK +case 181: +YY_RULE_SETUP +#line 424 "ldlex.l" +{ yylval.name = xstrdup (yytext); + return VERS_IDENTIFIER; } + YY_BREAK +case 182: +YY_RULE_SETUP +#line 427 "ldlex.l" +{ yylval.name = xstrdup (yytext); + return VERS_TAG; } + YY_BREAK +case 183: +YY_RULE_SETUP +#line 430 "ldlex.l" +{ BEGIN(VERS_SCRIPT); return *yytext; } + YY_BREAK +case 184: +YY_RULE_SETUP +#line 432 "ldlex.l" +{ BEGIN(VERS_NODE); + vers_node_nesting = 0; + return *yytext; + } + YY_BREAK +case 185: +YY_RULE_SETUP +#line 436 "ldlex.l" +{ return *yytext; } + YY_BREAK +case 186: +YY_RULE_SETUP +#line 437 "ldlex.l" +{ vers_node_nesting++; return *yytext; } + YY_BREAK +case 187: +YY_RULE_SETUP +#line 438 "ldlex.l" +{ if (--vers_node_nesting < 0) + BEGIN(VERS_SCRIPT); + return *yytext; + } + YY_BREAK +case 188: +/* rule 188 can match eol */ +YY_RULE_SETUP +#line 443 "ldlex.l" +{ lineno++; } + YY_BREAK +case 189: +YY_RULE_SETUP +#line 445 "ldlex.l" +{ /* Eat up comments */ } + YY_BREAK +case 190: +YY_RULE_SETUP +#line 447 "ldlex.l" +{ /* Eat up whitespace */ } + YY_BREAK +case YY_STATE_EOF(INITIAL): +case YY_STATE_EOF(SCRIPT): +case YY_STATE_EOF(EXPRESSION): +case YY_STATE_EOF(BOTH): +case YY_STATE_EOF(DEFSYMEXP): +case YY_STATE_EOF(MRI): +case YY_STATE_EOF(VERS_START): +case YY_STATE_EOF(VERS_SCRIPT): +case YY_STATE_EOF(VERS_NODE): +#line 449 "ldlex.l" +{ + include_stack_ptr--; + + if (include_stack_ptr == 0) + { + yyterminate (); + } + else + { + yy_switch_to_buffer (include_stack[include_stack_ptr]); + } + + ldfile_input_filename = file_name_stack[include_stack_ptr - 1]; + lineno = lineno_stack[include_stack_ptr]; + + return END; +} + YY_BREAK +case 191: +YY_RULE_SETUP +#line 467 "ldlex.l" +lex_warn_invalid (" in script", yytext); + YY_BREAK +case 192: +YY_RULE_SETUP +#line 468 "ldlex.l" +lex_warn_invalid (" in expression", yytext); + YY_BREAK +case 193: +YY_RULE_SETUP +#line 470 "ldlex.l" +ECHO; + YY_BREAK +#line 3091 "ldlex.c" + + case YY_END_OF_BUFFER: + { + /* Amount of text matched not including the EOB char. */ + int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; + + /* Undo the effects of YY_DO_BEFORE_ACTION. */ + *yy_cp = (yy_hold_char); + YY_RESTORE_YY_MORE_OFFSET + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) + { + /* We're scanning a new file or input source. It's + * possible that this happened because the user + * just pointed yyin at a new source and called + * yylex(). If so, then we have to assure + * consistency between YY_CURRENT_BUFFER and our + * globals. Here is the right place to do so, because + * this is the first action (other than possibly a + * back-up) that will match for the new input source. + */ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; + } + + /* Note that here we test for yy_c_buf_p "<=" to the position + * of the first EOB in the buffer, since yy_c_buf_p will + * already have been incremented past the NUL character + * (since all states make transitions on EOB to the + * end-of-buffer state). Contrast this with the test + * in input(). + */ + if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + { /* This was really a NUL. */ + yy_state_type yy_next_state; + + (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + /* Okay, we're now positioned to make the NUL + * transition. We couldn't have + * yy_get_previous_state() go ahead and do it + * for us because it doesn't know how to deal + * with the possibility of jamming (and we don't + * want to build jamming into it because then it + * will run more slowly). + */ + + yy_next_state = yy_try_NUL_trans( yy_current_state ); + + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + + if ( yy_next_state ) + { + /* Consume the NUL. */ + yy_cp = ++(yy_c_buf_p); + yy_current_state = yy_next_state; + goto yy_match; + } + + else + { + yy_cp = (yy_c_buf_p); + goto yy_find_action; + } + } + + else switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_END_OF_FILE: + { + (yy_did_buffer_switch_on_eof) = 0; + + if ( yywrap( ) ) + { + /* Note: because we've taken care in + * yy_get_next_buffer() to have set up + * yytext, we can now set up + * yy_c_buf_p so that if some total + * hoser (like flex itself) wants to + * call the scanner after we return the + * YY_NULL, it'll still work - another + * YY_NULL will get returned. + */ + (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; + + yy_act = YY_STATE_EOF(YY_START); + goto do_action; + } + + else + { + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; + } + break; + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = + (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_match; + + case EOB_ACT_LAST_MATCH: + (yy_c_buf_p) = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_find_action; + } + break; + } + + default: + YY_FATAL_ERROR( + "fatal flex scanner internal error--no action found" ); + } /* end of action switch */ + } /* end of scanning one token */ +} /* end of yylex */ + +/* yy_get_next_buffer - try to read in a new buffer + * + * Returns a code representing an action: + * EOB_ACT_LAST_MATCH - + * EOB_ACT_CONTINUE_SCAN - continue scanning from current position + * EOB_ACT_END_OF_FILE - end of file + */ +static int yy_get_next_buffer (void) +{ + register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; + register char *source = (yytext_ptr); + register int number_to_move, i; + int ret_val; + + if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) + YY_FATAL_ERROR( + "fatal flex scanner internal error--end of buffer missed" ); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) + { /* Don't try to fill the buffer, so this is an EOF. */ + if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) + { + /* We matched a single character, the EOB, so + * treat this as a final EOF. + */ + return EOB_ACT_END_OF_FILE; + } + + else + { + /* We matched some text prior to the EOB, first + * process it. + */ + return EOB_ACT_LAST_MATCH; + } + } + + /* Try to read more data. */ + + /* First move last chars to start of buffer. */ + number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; + + for ( i = 0; i < number_to_move; ++i ) + *(dest++) = *(source++); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) + /* don't do the read, it's not guaranteed to return an EOF, + * just force an EOF + */ + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; + + else + { + yy_size_t num_to_read = + YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; + + while ( num_to_read <= 0 ) + { /* Not enough room in the buffer - grow it. */ + + /* just a shorter name for the current buffer */ + YY_BUFFER_STATE b = YY_CURRENT_BUFFER; + + int yy_c_buf_p_offset = + (int) ((yy_c_buf_p) - b->yy_ch_buf); + + if ( b->yy_is_our_buffer ) + { + yy_size_t new_size = b->yy_buf_size * 2; + + if ( new_size <= 0 ) + b->yy_buf_size += b->yy_buf_size / 8; + else + b->yy_buf_size *= 2; + + b->yy_ch_buf = (char *) + /* Include room in for 2 EOB chars. */ + yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); + } + else + /* Can't grow it, we don't own it. */ + b->yy_ch_buf = 0; + + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( + "fatal error - scanner input buffer overflow" ); + + (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; + + num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - + number_to_move - 1; + + } + + if ( num_to_read > YY_READ_BUF_SIZE ) + num_to_read = YY_READ_BUF_SIZE; + + /* Read in more data. */ + YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), + (yy_n_chars), num_to_read ); + + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + if ( (yy_n_chars) == 0 ) + { + if ( number_to_move == YY_MORE_ADJ ) + { + ret_val = EOB_ACT_END_OF_FILE; + yyrestart(yyin ); + } + + else + { + ret_val = EOB_ACT_LAST_MATCH; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = + YY_BUFFER_EOF_PENDING; + } + } + + else + ret_val = EOB_ACT_CONTINUE_SCAN; + + if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { + /* Extend the array by 50%, plus the number we really need. */ + yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); + if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); + } + + (yy_n_chars) += number_to_move; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; + + (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; + + return ret_val; +} + +/* yy_get_previous_state - get the state just before the EOB char was reached */ + + static yy_state_type yy_get_previous_state (void) +{ + register yy_state_type yy_current_state; + register char *yy_cp; + + yy_current_state = (yy_start); + + for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) + { + register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1); + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 1682 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + } + + return yy_current_state; +} + +/* yy_try_NUL_trans - try to make a transition on the NUL character + * + * synopsis + * next_state = yy_try_NUL_trans( current_state ); + */ + static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) +{ + register int yy_is_jam; + register char *yy_cp = (yy_c_buf_p); + + register YY_CHAR yy_c = 1; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 1682 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + yy_is_jam = (yy_current_state == 1681); + + return yy_is_jam ? 0 : yy_current_state; +} + +#ifndef YY_NO_INPUT +#ifdef __cplusplus + static int yyinput (void) +#else + static int input (void) +#endif + +{ + int c; + + *(yy_c_buf_p) = (yy_hold_char); + + if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) + { + /* yy_c_buf_p now points to the character we want to return. + * If this occurs *before* the EOB characters, then it's a + * valid NUL; if not, then we've hit the end of the buffer. + */ + if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + /* This was really a NUL. */ + *(yy_c_buf_p) = '\0'; + + else + { /* need more input */ + yy_size_t offset = (yy_c_buf_p) - (yytext_ptr); + ++(yy_c_buf_p); + + switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_LAST_MATCH: + /* This happens because yy_g_n_b() + * sees that we've accumulated a + * token and flags that we need to + * try matching the token before + * proceeding. But for input(), + * there's no matching to consider. + * So convert the EOB_ACT_LAST_MATCH + * to EOB_ACT_END_OF_FILE. + */ + + /* Reset buffer status. */ + yyrestart(yyin ); + + /*FALLTHROUGH*/ + + case EOB_ACT_END_OF_FILE: + { + if ( yywrap( ) ) + return 0; + + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; +#ifdef __cplusplus + return yyinput(); +#else + return input(); +#endif + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = (yytext_ptr) + offset; + break; + } + } + } + + c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ + *(yy_c_buf_p) = '\0'; /* preserve yytext */ + (yy_hold_char) = *++(yy_c_buf_p); + + return c; +} +#endif /* ifndef YY_NO_INPUT */ + +/** Immediately switch to a different input stream. + * @param input_file A readable stream. + * + * @note This function does not reset the start condition to @c INITIAL . + */ + void yyrestart (FILE * input_file ) +{ + + if ( ! YY_CURRENT_BUFFER ){ + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer(yyin,YY_BUF_SIZE ); + } + + yy_init_buffer(YY_CURRENT_BUFFER,input_file ); + yy_load_buffer_state( ); +} + +/** Switch to a different input buffer. + * @param new_buffer The new input buffer. + * + */ + void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ) +{ + + /* TODO. We should be able to replace this entire function body + * with + * yypop_buffer_state(); + * yypush_buffer_state(new_buffer); + */ + yyensure_buffer_stack (); + if ( YY_CURRENT_BUFFER == new_buffer ) + return; + + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + YY_CURRENT_BUFFER_LVALUE = new_buffer; + yy_load_buffer_state( ); + + /* We don't actually know whether we did this switch during + * EOF (yywrap()) processing, but the only time this flag + * is looked at is after yywrap() is called, so it's safe + * to go ahead and always set it. + */ + (yy_did_buffer_switch_on_eof) = 1; +} + +static void yy_load_buffer_state (void) +{ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; + yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; + (yy_hold_char) = *(yy_c_buf_p); +} + +/** Allocate and initialize an input buffer state. + * @param file A readable stream. + * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. + * + * @return the allocated buffer state. + */ + YY_BUFFER_STATE yy_create_buffer (FILE * file, int size ) +{ + YY_BUFFER_STATE b; + + b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_buf_size = size; + + /* yy_ch_buf has to be 2 characters longer than the size given because + * we need to put in 2 end-of-buffer characters. + */ + b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 ); + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_is_our_buffer = 1; + + yy_init_buffer(b,file ); + + return b; +} + +/** Destroy the buffer. + * @param b a buffer created with yy_create_buffer() + * + */ + void yy_delete_buffer (YY_BUFFER_STATE b ) +{ + + if ( ! b ) + return; + + if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ + YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; + + if ( b->yy_is_our_buffer ) + yyfree((void *) b->yy_ch_buf ); + + yyfree((void *) b ); +} + +#ifndef __cplusplus +extern int isatty (int ); +#endif /* __cplusplus */ + +/* Initializes or reinitializes a buffer. + * This function is sometimes called more than once on the same buffer, + * such as during a yyrestart() or at EOF. + */ + static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file ) + +{ + int oerrno = errno; + + yy_flush_buffer(b ); + + b->yy_input_file = file; + b->yy_fill_buffer = 1; + + /* If b is the current buffer, then yy_init_buffer was _probably_ + * called from yyrestart() or through yy_get_next_buffer. + * In that case, we don't want to reset the lineno or column. + */ + if (b != YY_CURRENT_BUFFER){ + b->yy_bs_lineno = 1; + b->yy_bs_column = 0; + } + + b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0; + + errno = oerrno; +} + +/** Discard all buffered characters. On the next scan, YY_INPUT will be called. + * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. + * + */ + void yy_flush_buffer (YY_BUFFER_STATE b ) +{ + if ( ! b ) + return; + + b->yy_n_chars = 0; + + /* We always need two end-of-buffer characters. The first causes + * a transition to the end-of-buffer state. The second causes + * a jam in that state. + */ + b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; + b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; + + b->yy_buf_pos = &b->yy_ch_buf[0]; + + b->yy_at_bol = 1; + b->yy_buffer_status = YY_BUFFER_NEW; + + if ( b == YY_CURRENT_BUFFER ) + yy_load_buffer_state( ); +} + +/** Pushes the new state onto the stack. The new state becomes + * the current state. This function will allocate the stack + * if necessary. + * @param new_buffer The new state. + * + */ +void yypush_buffer_state (YY_BUFFER_STATE new_buffer ) +{ + if (new_buffer == NULL) + return; + + yyensure_buffer_stack(); + + /* This block is copied from yy_switch_to_buffer. */ + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + /* Only push if top exists. Otherwise, replace top. */ + if (YY_CURRENT_BUFFER) + (yy_buffer_stack_top)++; + YY_CURRENT_BUFFER_LVALUE = new_buffer; + + /* copied from yy_switch_to_buffer. */ + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; +} + +/** Removes and deletes the top of the stack, if present. + * The next element becomes the new top. + * + */ +void yypop_buffer_state (void) +{ + if (!YY_CURRENT_BUFFER) + return; + + yy_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + if ((yy_buffer_stack_top) > 0) + --(yy_buffer_stack_top); + + if (YY_CURRENT_BUFFER) { + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; + } +} + +/* Allocates the stack if it does not exist. + * Guarantees space for at least one push. + */ +static void yyensure_buffer_stack (void) +{ + yy_size_t num_to_alloc; + + if (!(yy_buffer_stack)) { + + /* First allocation is just for 2 elements, since we don't know if this + * scanner will even need a stack. We use 2 instead of 1 to avoid an + * immediate realloc on the next call. + */ + num_to_alloc = 1; + (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc + (num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); + + memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); + + (yy_buffer_stack_max) = num_to_alloc; + (yy_buffer_stack_top) = 0; + return; + } + + if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ + + /* Increase the buffer to prepare for a possible push. */ + int grow_size = 8 /* arbitrary grow size */; + + num_to_alloc = (yy_buffer_stack_max) + grow_size; + (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc + ((yy_buffer_stack), + num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); + + /* zero only the new slots.*/ + memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); + (yy_buffer_stack_max) = num_to_alloc; + } +} + +/** Setup the input buffer state to scan directly from a user-specified character buffer. + * @param base the character buffer + * @param size the size in bytes of the character buffer + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size ) +{ + YY_BUFFER_STATE b; + + if ( size < 2 || + base[size-2] != YY_END_OF_BUFFER_CHAR || + base[size-1] != YY_END_OF_BUFFER_CHAR ) + /* They forgot to leave room for the EOB's. */ + return 0; + + b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); + + b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ + b->yy_buf_pos = b->yy_ch_buf = base; + b->yy_is_our_buffer = 0; + b->yy_input_file = 0; + b->yy_n_chars = b->yy_buf_size; + b->yy_is_interactive = 0; + b->yy_at_bol = 1; + b->yy_fill_buffer = 0; + b->yy_buffer_status = YY_BUFFER_NEW; + + yy_switch_to_buffer(b ); + + return b; +} + +/** Setup the input buffer state to scan a string. The next call to yylex() will + * scan from a @e copy of @a str. + * @param yystr a NUL-terminated string to scan + * + * @return the newly allocated buffer state object. + * @note If you want to scan bytes that may contain NUL values, then use + * yy_scan_bytes() instead. + */ +YY_BUFFER_STATE yy_scan_string (yyconst char * yystr ) +{ + + return yy_scan_bytes(yystr,strlen(yystr) ); +} + +/** Setup the input buffer state to scan the given bytes. The next call to yylex() will + * scan from a @e copy of @a bytes. + * @param bytes the byte buffer to scan + * @param len the number of bytes in the buffer pointed to by @a bytes. + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len ) +{ + YY_BUFFER_STATE b; + char *buf; + yy_size_t n, i; + + /* Get memory for full buffer, including space for trailing EOB's. */ + n = _yybytes_len + 2; + buf = (char *) yyalloc(n ); + if ( ! buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); + + for ( i = 0; i < _yybytes_len; ++i ) + buf[i] = yybytes[i]; + + buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; + + b = yy_scan_buffer(buf,n ); + if ( ! b ) + YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); + + /* It's okay to grow etc. this buffer, and we should throw it + * away when we're done. + */ + b->yy_is_our_buffer = 1; + + return b; +} + +#ifndef YY_EXIT_FAILURE +#define YY_EXIT_FAILURE 2 +#endif + +static void yy_fatal_error (yyconst char* msg ) +{ + (void) fprintf( stderr, "%s\n", msg ); + exit( YY_EXIT_FAILURE ); +} + +/* Redefine yyless() so it works in section 3 code. */ + +#undef yyless +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + yytext[yyleng] = (yy_hold_char); \ + (yy_c_buf_p) = yytext + yyless_macro_arg; \ + (yy_hold_char) = *(yy_c_buf_p); \ + *(yy_c_buf_p) = '\0'; \ + yyleng = yyless_macro_arg; \ + } \ + while ( 0 ) + +/* Accessor methods (get/set functions) to struct members. */ + +/** Get the current line number. + * + */ +int yyget_lineno (void) +{ + + return yylineno; +} + +/** Get the input stream. + * + */ +FILE *yyget_in (void) +{ + return yyin; +} + +/** Get the output stream. + * + */ +FILE *yyget_out (void) +{ + return yyout; +} + +/** Get the length of the current token. + * + */ +yy_size_t yyget_leng (void) +{ + return yyleng; +} + +/** Get the current token. + * + */ + +char *yyget_text (void) +{ + return yytext; +} + +/** Set the current line number. + * @param line_number + * + */ +void yyset_lineno (int line_number ) +{ + + yylineno = line_number; +} + +/** Set the input stream. This does not discard the current + * input buffer. + * @param in_str A readable stream. + * + * @see yy_switch_to_buffer + */ +void yyset_in (FILE * in_str ) +{ + yyin = in_str ; +} + +void yyset_out (FILE * out_str ) +{ + yyout = out_str ; +} + +int yyget_debug (void) +{ + return yy_flex_debug; +} + +void yyset_debug (int bdebug ) +{ + yy_flex_debug = bdebug ; +} + +static int yy_init_globals (void) +{ + /* Initialization is the same as for the non-reentrant scanner. + * This function is called from yylex_destroy(), so don't allocate here. + */ + + (yy_buffer_stack) = 0; + (yy_buffer_stack_top) = 0; + (yy_buffer_stack_max) = 0; + (yy_c_buf_p) = (char *) 0; + (yy_init) = 0; + (yy_start) = 0; + +/* Defined in main.c */ +#ifdef YY_STDINIT + yyin = stdin; + yyout = stdout; +#else + yyin = (FILE *) 0; + yyout = (FILE *) 0; +#endif + + /* For future reference: Set errno on error, since we are called by + * yylex_init() + */ + return 0; +} + +/* yylex_destroy is for both reentrant and non-reentrant scanners. */ +int yylex_destroy (void) +{ + + /* Pop the buffer stack, destroying each element. */ + while(YY_CURRENT_BUFFER){ + yy_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + yypop_buffer_state(); + } + + /* Destroy the stack itself. */ + yyfree((yy_buffer_stack) ); + (yy_buffer_stack) = NULL; + + /* Reset the globals. This is important in a non-reentrant scanner so the next time + * yylex() is called, initialization will occur. */ + yy_init_globals( ); + + return 0; +} + +/* + * Internal utility routines. + */ + +#ifndef yytext_ptr +static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) +{ + register int i; + for ( i = 0; i < n; ++i ) + s1[i] = s2[i]; +} +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * s ) +{ + register int n; + for ( n = 0; s[n]; ++n ) + ; + + return n; +} +#endif + +void *yyalloc (yy_size_t size ) +{ + return (void *) malloc( size ); +} + +void *yyrealloc (void * ptr, yy_size_t size ) +{ + /* The cast to (char *) in the following accommodates both + * implementations that use char* generic pointers, and those + * that use void* generic pointers. It works with the latter + * because both ANSI C and C++ allow castless assignment from + * any pointer type to void*, and deal with argument conversions + * as though doing an assignment. + */ + return (void *) realloc( (char *) ptr, size ); +} + +void yyfree (void * ptr ) +{ + free( (char *) ptr ); /* see yyrealloc() for (char *) cast */ +} + +#define YYTABLES_NAME "yytables" + +#line 470 "ldlex.l" + + + + +/* Switch flex to reading script file NAME, open on FILE, + saving the current input info on the include stack. */ + +void +lex_push_file (FILE *file, const char *name) +{ + if (include_stack_ptr >= MAX_INCLUDE_DEPTH) + { + einfo ("%F:includes nested too deeply\n"); + } + file_name_stack[include_stack_ptr] = name; + lineno_stack[include_stack_ptr] = lineno; + include_stack[include_stack_ptr] = YY_CURRENT_BUFFER; + + include_stack_ptr++; + lineno = 1; + yyin = file; + yy_switch_to_buffer (yy_create_buffer (yyin, YY_BUF_SIZE)); +} + +/* Return a newly created flex input buffer containing STRING, + which is SIZE bytes long. */ + +static YY_BUFFER_STATE +yy_create_string_buffer (const char *string, size_t size) +{ + YY_BUFFER_STATE b; + + /* Calls to m-alloc get turned by sed into xm-alloc. */ + b = malloc (sizeof (struct yy_buffer_state)); + b->yy_input_file = 0; + b->yy_buf_size = size; + + /* yy_ch_buf has to be 2 characters longer than the size given because + we need to put in 2 end-of-buffer characters. */ + b->yy_ch_buf = malloc ((unsigned) (b->yy_buf_size + 3)); + + b->yy_ch_buf[0] = '\n'; + strcpy (b->yy_ch_buf+1, string); + b->yy_ch_buf[size+1] = YY_END_OF_BUFFER_CHAR; + b->yy_ch_buf[size+2] = YY_END_OF_BUFFER_CHAR; + b->yy_n_chars = size+1; + b->yy_buf_pos = &b->yy_ch_buf[1]; + + b->yy_is_our_buffer = 1; + b->yy_is_interactive = 0; + b->yy_at_bol = 1; + b->yy_fill_buffer = 0; + + /* flex 2.4.7 changed the interface. FIXME: We should not be using + a flex internal interface in the first place! */ +#ifdef YY_BUFFER_NEW + b->yy_buffer_status = YY_BUFFER_NEW; +#else + b->yy_eof_status = EOF_NOT_SEEN; +#endif + + return b; +} + +/* Switch flex to reading from STRING, saving the current input info + on the include stack. */ + +void +lex_redirect (const char *string) +{ + YY_BUFFER_STATE tmp; + + yy_init = 0; + if (include_stack_ptr >= MAX_INCLUDE_DEPTH) + { + einfo("%F: macros nested too deeply\n"); + } + file_name_stack[include_stack_ptr] = "redirect"; + lineno_stack[include_stack_ptr] = lineno; + include_stack[include_stack_ptr] = YY_CURRENT_BUFFER; + include_stack_ptr++; + lineno = 1; + tmp = yy_create_string_buffer (string, strlen (string)); + yy_switch_to_buffer (tmp); +} + +/* Functions to switch to a different flex start condition, + saving the current start condition on `state_stack'. */ + +static int state_stack[MAX_INCLUDE_DEPTH * 2]; +static int *state_stack_p = state_stack; + +void +ldlex_script (void) +{ + *(state_stack_p)++ = yy_start; + BEGIN (SCRIPT); +} + +void +ldlex_mri_script (void) +{ + *(state_stack_p)++ = yy_start; + BEGIN (MRI); +} + +void +ldlex_version_script (void) +{ + *(state_stack_p)++ = yy_start; + BEGIN (VERS_START); +} + +void +ldlex_version_file (void) +{ + *(state_stack_p)++ = yy_start; + BEGIN (VERS_SCRIPT); +} + +void +ldlex_defsym (void) +{ + *(state_stack_p)++ = yy_start; + BEGIN (DEFSYMEXP); +} + +void +ldlex_expression (void) +{ + *(state_stack_p)++ = yy_start; + BEGIN (EXPRESSION); +} + +void +ldlex_both (void) +{ + *(state_stack_p)++ = yy_start; + BEGIN (BOTH); +} + +void +ldlex_popstate (void) +{ + yy_start = *(--state_stack_p); +} + + +/* Place up to MAX_SIZE characters in BUF and return + either the number of characters read, or 0 to indicate EOF. */ + +static int +yy_input (char *buf, int max_size) +{ + int result = 0; + if (YY_CURRENT_BUFFER->yy_input_file) + { + if (yyin) + { + result = fread (buf, 1, max_size, yyin); + if (result < max_size && ferror (yyin)) + einfo ("%F%P: read in flex scanner failed\n"); + } + } + return result; +} + +/* Eat the rest of a C-style comment. */ + +static void +comment (void) +{ + int c; + + while (1) + { + c = input(); + while (c != '*' && c != EOF) + { + if (c == '\n') + lineno++; + c = input(); + } + + if (c == '*') + { + c = input(); + while (c == '*') + c = input(); + if (c == '/') + break; /* found the end */ + } + + if (c == '\n') + lineno++; + + if (c == EOF) + { + einfo( "%F%P: EOF in comment\n"); + break; + } + } +} + +/* Warn the user about a garbage character WHAT in the input + in context WHERE. */ + +static void +lex_warn_invalid (char *where, char *what) +{ + char buf[5]; + + /* If we have found an input file whose format we do not recognize, + and we are therefore treating it as a linker script, and we find + an invalid character, then most likely this is a real object file + of some different format. Treat it as such. */ + if (ldfile_assumed_script) + { + bfd_set_error (bfd_error_file_not_recognized); + einfo ("%F%s: file not recognized: %E\n", ldfile_input_filename); + } + + if (! ISPRINT (*what)) + { + sprintf (buf, "\\%03o", *(unsigned char *) what); + what = buf; + } + + einfo ("%P:%S: ignoring invalid character `%s'%s\n", what, where); +} + diff --git a/ld/ldlex.l b/ld/ldlex.l index 013c07e..4e859b0 100644 --- a/ld/ldlex.l +++ b/ld/ldlex.l @@ -313,6 +313,7 @@ V_IDENTIFIER [*?.$_a-zA-Z\[\]\-\!\^\\]([*?.$_a-zA-Z0-9\[\]\-\!\^\\]|::)* "org" { RTOKEN(ORIGIN);} "l" { RTOKEN( LENGTH);} "len" { RTOKEN( LENGTH);} +"INPUT_SECTION_FLAGS" { RTOKEN(INPUT_SECTION_FLAGS); } "INCLUDE" { RTOKEN(INCLUDE);} "PHDRS" { RTOKEN (PHDRS); } "AT" { RTOKEN(AT);} diff --git a/ld/ldmain.c b/ld/ldmain.c index 0de7890..7aacf0f 100644 --- a/ld/ldmain.c +++ b/ld/ldmain.c @@ -105,7 +105,7 @@ bfd_boolean add_DT_NEEDED_for_regular; /* True means create DT_NEEDED entries for dynamic libraries that are DT_NEEDED by dynamic libraries specifically mentioned on the command line. */ -bfd_boolean add_DT_NEEDED_for_dynamic = TRUE; +bfd_boolean add_DT_NEEDED_for_dynamic; /* TRUE if we should demangle symbol names. */ bfd_boolean demangling; @@ -150,7 +150,8 @@ static bfd_boolean reloc_dangerous static bfd_boolean unattached_reloc (struct bfd_link_info *, const char *, bfd *, asection *, bfd_vma); static bfd_boolean notice - (struct bfd_link_info *, const char *, bfd *, asection *, bfd_vma); + (struct bfd_link_info *, struct bfd_link_hash_entry *, + bfd *, asection *, bfd_vma, flagword, const char *); static struct bfd_link_callbacks link_callbacks = { @@ -296,73 +297,13 @@ main (int argc, char **argv) if (config.hash_table_size != 0) bfd_hash_set_default_size (config.hash_table_size); - ldemul_set_symbols (); - - if (link_info.relocatable) - { - if (command_line.check_section_addresses < 0) - command_line.check_section_addresses = 0; - if (link_info.shared) - einfo (_("%P%F: -r and -shared may not be used together\n")); - } - - /* We may have -Bsymbolic, -Bsymbolic-functions, --dynamic-list-data, - --dynamic-list-cpp-new, --dynamic-list-cpp-typeinfo and - --dynamic-list FILE. -Bsymbolic and -Bsymbolic-functions are - for shared libraries. -Bsymbolic overrides all others and vice - versa. */ - switch (command_line.symbolic) - { - case symbolic_unset: - break; - case symbolic: - /* -Bsymbolic is for shared library only. */ - if (link_info.shared) - { - link_info.symbolic = TRUE; - /* Should we free the unused memory? */ - link_info.dynamic_list = NULL; - command_line.dynamic_list = dynamic_list_unset; - } - break; - case symbolic_functions: - /* -Bsymbolic-functions is for shared library only. */ - if (link_info.shared) - command_line.dynamic_list = dynamic_list_data; - break; - } - - switch (command_line.dynamic_list) - { - case dynamic_list_unset: - break; - case dynamic_list_data: - link_info.dynamic_data = TRUE; - case dynamic_list: - link_info.dynamic = TRUE; - break; - } - - if (! link_info.shared) - { - if (command_line.filter_shlib) - einfo (_("%P%F: -F may not be used without -shared\n")); - if (command_line.auxiliary_filters) - einfo (_("%P%F: -f may not be used without -shared\n")); - } - - if (! link_info.shared || link_info.pie) - link_info.executable = TRUE; +#ifdef ENABLE_PLUGINS + /* Now all the plugin arguments have been gathered, we can load them. */ + if (plugin_load_plugins ()) + einfo (_("%P%F: %s: error loading plugin\n"), plugin_error_plugin ()); +#endif /* ENABLE_PLUGINS */ - /* Treat ld -r -s as ld -r -S -x (i.e., strip all local symbols). I - don't see how else this can be handled, since in this case we - must preserve all externally visible symbols. */ - if (link_info.relocatable && link_info.strip == strip_all) - { - link_info.strip = strip_debugger; - if (link_info.discard == discard_sec_merge) - link_info.discard = discard_all; - } + ldemul_set_symbols (); /* If we have not already opened and parsed a linker script, try the default script from command line first. */ @@ -426,11 +367,14 @@ main (int argc, char **argv) info_msg ("\n==================================================\n"); } + if (command_line.print_output_format) + info_msg ("%s\n", lang_get_output_target ()); + lang_final (); if (!lang_has_input_file) { - if (version_printed) + if (version_printed || command_line.print_output_format) xexit (0); einfo (_("%P%F: no input files\n")); } @@ -487,7 +431,7 @@ main (int argc, char **argv) einfo (_("%P: link errors found, deleting executable `%s'\n"), output_filename); - /* The file will be removed by remove_output. */ + /* The file will be removed by ld_cleanup. */ xexit (1); } else @@ -560,7 +504,7 @@ main (int argc, char **argv) fflush (stderr); } - /* Prevent remove_output from doing anything, after a successful link. */ + /* Prevent ld_cleanup from doing anything, after a successful link. */ output_filename = NULL; xexit (0); @@ -804,12 +748,12 @@ add_archive_element (struct bfd_link_info *info, BFD, but we still want to output the original BFD filename. */ orig_input = *input; #ifdef ENABLE_PLUGINS - if (bfd_my_archive (abfd) != NULL - && plugin_active_plugins_p () - && !no_more_claiming) + if (plugin_active_plugins_p () && !no_more_claiming) { /* We must offer this archive member to the plugins to claim. */ - int fd = open (bfd_my_archive (abfd)->filename, O_RDONLY | O_BINARY); + const char *filename = (bfd_my_archive (abfd) != NULL + ? bfd_my_archive (abfd)->filename : abfd->filename); + int fd = open (filename, O_RDONLY | O_BINARY); if (fd >= 0) { struct ld_plugin_input_file file; @@ -818,7 +762,7 @@ add_archive_element (struct bfd_link_info *info, member, not the whole file, and must exclude the header. Fortunately for us, that is how the data is stored in the origin field of the bfd and in the arelt_data. */ - file.name = bfd_my_archive (abfd)->filename; + file.name = filename; file.offset = abfd->origin; file.filesize = arelt_size (abfd); file.fd = fd; @@ -1398,7 +1342,7 @@ reloc_overflow (struct bfd_link_info *info ATTRIBUTE_UNUSED, if (overflow_cutoff_limit == -1) return TRUE; - einfo ("%X%C:", abfd, section, address); + einfo ("%X%H:", abfd, section, address); if (overflow_cutoff_limit >= 0 && overflow_cutoff_limit-- == 0) @@ -1450,7 +1394,7 @@ reloc_dangerous (struct bfd_link_info *info ATTRIBUTE_UNUSED, asection *section, bfd_vma address) { - einfo (_("%X%C: dangerous relocation: %s\n"), + einfo (_("%X%H: dangerous relocation: %s\n"), abfd, section, address, message); return TRUE; } @@ -1465,7 +1409,7 @@ unattached_reloc (struct bfd_link_info *info ATTRIBUTE_UNUSED, asection *section, bfd_vma address) { - einfo (_("%X%C: reloc refers to symbol `%T' which is not being output\n"), + einfo (_("%X%H: reloc refers to symbol `%T' which is not being output\n"), abfd, section, address, name); return TRUE; } @@ -1479,18 +1423,23 @@ unattached_reloc (struct bfd_link_info *info ATTRIBUTE_UNUSED, static bfd_boolean notice (struct bfd_link_info *info, - const char *name, + struct bfd_link_hash_entry *h, bfd *abfd, asection *section, - bfd_vma value) + bfd_vma value, + flagword flags ATTRIBUTE_UNUSED, + const char *string ATTRIBUTE_UNUSED) { - if (name == NULL) + const char *name; + + if (h == NULL) { if (command_line.cref || nocrossref_list != NULL) return handle_asneeded_cref (abfd, (enum notice_asneeded_action) value); return TRUE; } + name = h->root.string; if (info->notice_hash != NULL && bfd_hash_lookup (info->notice_hash, name, FALSE, FALSE) != NULL) { diff --git a/ld/ldmisc.c b/ld/ldmisc.c index d5001d1..12cb726 100644 --- a/ld/ldmisc.c +++ b/ld/ldmisc.c @@ -47,6 +47,7 @@ %E current bfd error or errno %F error is fatal %G like %D, but only function name + %H like %C but in addition emit section+offset %I filename from a lang_input_statement_type %P print program name %R info about a relent @@ -262,6 +263,7 @@ vfinfo (FILE *fp, const char *fmt, va_list arg, bfd_boolean is_warning) case 'C': case 'D': case 'G': + case 'H': /* Clever filename:linenumber with function name if possible. The arguments are a BFD, a section, and an offset. */ { @@ -276,6 +278,7 @@ vfinfo (FILE *fp, const char *fmt, va_list arg, bfd_boolean is_warning) const char *functionname; unsigned int linenumber; bfd_boolean discard_last; + bfd_boolean done; abfd = va_arg (arg, bfd *); section = va_arg (arg, asection *); @@ -296,14 +299,15 @@ vfinfo (FILE *fp, const char *fmt, va_list arg, bfd_boolean is_warning) We do not always have a line number available so if we cannot find them we print out the section name and - offset instread. */ + offset instead. */ discard_last = TRUE; if (abfd != NULL && bfd_find_nearest_line (abfd, section, asymbols, offset, &filename, &functionname, &linenumber)) { - if (functionname != NULL && fmt[-1] == 'C') + if (functionname != NULL + && (fmt[-1] == 'C' || fmt[-1] == 'H')) { /* Detect the case where we are printing out a message for the same function as the last @@ -343,15 +347,21 @@ vfinfo (FILE *fp, const char *fmt, va_list arg, bfd_boolean is_warning) if (filename != NULL) fprintf (fp, "%s:", filename); + done = fmt[-1] != 'H'; if (functionname != NULL && fmt[-1] == 'G') lfinfo (fp, "%T", functionname); else if (filename != NULL && linenumber != 0) - fprintf (fp, "%u", linenumber); + fprintf (fp, "%u%s", linenumber, ":" + done); else - lfinfo (fp, "(%A+0x%v)", section, offset); + done = FALSE; } else - lfinfo (fp, "%B:(%A+0x%v)", abfd, section, offset); + { + lfinfo (fp, "%B:", abfd); + done = FALSE; + } + if (!done) + lfinfo (fp, "(%A+0x%v)", section, offset); if (discard_last) { diff --git a/ld/lexsup.c b/ld/lexsup.c index 4f6a77b..20e0271 100644 --- a/ld/lexsup.c +++ b/ld/lexsup.c @@ -1,6 +1,6 @@ /* Parse options for the GNU linker. Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, - 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 + 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2011 Free Software Foundation, Inc. This file is part of the GNU Binutils. @@ -175,6 +175,7 @@ enum option_values OPTION_PLUGIN_OPT, #endif /* ENABLE_PLUGINS */ OPTION_DEFAULT_SCRIPT, + OPTION_PRINT_OUTPUT_FORMAT, }; /* The long options. This structure is used for both the option @@ -454,7 +455,7 @@ static const struct ld_option ld_options[] = '\0', NULL, N_("Do not allow unresolved references in object files"), TWO_DASHES }, { {"allow-shlib-undefined", no_argument, NULL, OPTION_ALLOW_SHLIB_UNDEFINED}, - '\0', NULL, N_("Allow unresolved references in shared libaries"), + '\0', NULL, N_("Allow unresolved references in shared libraries"), TWO_DASHES }, { {"no-allow-shlib-undefined", no_argument, NULL, OPTION_NO_ALLOW_SHLIB_UNDEFINED}, @@ -491,6 +492,8 @@ static const struct ld_option ld_options[] = { {"oformat", required_argument, NULL, OPTION_OFORMAT}, '\0', N_("TARGET"), N_("Specify target of output file"), EXACTLY_TWO_DASHES }, + { {"print-output-format", no_argument, NULL, OPTION_PRINT_OUTPUT_FORMAT}, + '\0', NULL, N_("Print default output format"), TWO_DASHES }, { {"qmagic", no_argument, NULL, OPTION_IGNORE}, '\0', NULL, N_("Ignored for Linux compatibility"), ONE_DASH }, { {"reduce-memory-overheads", no_argument, NULL, @@ -1059,6 +1062,9 @@ parse_args (unsigned argc, char **argv) case OPTION_OFORMAT: lang_add_output_format (optarg, NULL, NULL, 0); break; + case OPTION_PRINT_OUTPUT_FORMAT: + command_line.print_output_format = TRUE; + break; #ifdef ENABLE_PLUGINS case OPTION_PLUGIN: if (plugin_opt_plugin (optarg)) @@ -1558,11 +1564,71 @@ parse_args (unsigned argc, char **argv) /* FIXME: Should we allow emulations a chance to set this ? */ link_info.unresolved_syms_in_shared_libs = how_to_report_unresolved_symbols; -#ifdef ENABLE_PLUGINS - /* Now all the plugin arguments have been gathered, we can load them. */ - if (plugin_load_plugins ()) - einfo (_("%P%F: %s: error loading plugin\n"), plugin_error_plugin ()); -#endif /* ENABLE_PLUGINS */ + if (link_info.relocatable) + { + if (command_line.check_section_addresses < 0) + command_line.check_section_addresses = 0; + if (link_info.shared) + einfo (_("%P%F: -r and -shared may not be used together\n")); + } + + /* We may have -Bsymbolic, -Bsymbolic-functions, --dynamic-list-data, + --dynamic-list-cpp-new, --dynamic-list-cpp-typeinfo and + --dynamic-list FILE. -Bsymbolic and -Bsymbolic-functions are + for shared libraries. -Bsymbolic overrides all others and vice + versa. */ + switch (command_line.symbolic) + { + case symbolic_unset: + break; + case symbolic: + /* -Bsymbolic is for shared library only. */ + if (link_info.shared) + { + link_info.symbolic = TRUE; + /* Should we free the unused memory? */ + link_info.dynamic_list = NULL; + command_line.dynamic_list = dynamic_list_unset; + } + break; + case symbolic_functions: + /* -Bsymbolic-functions is for shared library only. */ + if (link_info.shared) + command_line.dynamic_list = dynamic_list_data; + break; + } + + switch (command_line.dynamic_list) + { + case dynamic_list_unset: + break; + case dynamic_list_data: + link_info.dynamic_data = TRUE; + case dynamic_list: + link_info.dynamic = TRUE; + break; + } + + if (! link_info.shared) + { + if (command_line.filter_shlib) + einfo (_("%P%F: -F may not be used without -shared\n")); + if (command_line.auxiliary_filters) + einfo (_("%P%F: -f may not be used without -shared\n")); + } + + if (! link_info.shared || link_info.pie) + link_info.executable = TRUE; + + /* Treat ld -r -s as ld -r -S -x (i.e., strip all local symbols). I + don't see how else this can be handled, since in this case we + must preserve all externally visible symbols. */ + if (link_info.relocatable && link_info.strip == strip_all) + { + link_info.strip = strip_debugger; + if (link_info.discard == discard_sec_merge) + link_info.discard = discard_all; + } } /* Add the (colon-separated) elements of DIRLIST_PTR to the diff --git a/ld/mri.c b/ld/mri.c index ce1406a..91b40dc 100644 --- a/ld/mri.c +++ b/ld/mri.c @@ -215,6 +215,7 @@ mri_draw_tree (void) tmp->spec.name = p->name; tmp->spec.exclude_name_list = NULL; tmp->spec.sorted = none; + tmp->spec.section_flag_list = NULL; lang_add_wild (NULL, tmp, FALSE); /* If there is an alias for this section, add it too. */ @@ -226,6 +227,7 @@ mri_draw_tree (void) tmp->spec.name = aptr->name; tmp->spec.exclude_name_list = NULL; tmp->spec.sorted = none; + tmp->spec.section_flag_list = NULL; lang_add_wild (NULL, tmp, FALSE); } diff --git a/ld/pe-dll.c b/ld/pe-dll.c index c8abf4d..ce0ab5d 100644 --- a/ld/pe-dll.c +++ b/ld/pe-dll.c @@ -1,6 +1,6 @@ /* Routines to help build PEI-format DLLs (Win32 etc) Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, - 2008, 2009, 2010 Free Software Foundation, Inc. + 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by DJ Delorie This file is part of the GNU Binutils. @@ -718,13 +718,10 @@ process_def_file_and_drectve (bfd *abfd ATTRIBUTE_UNUSED, struct bfd_link_info * bfd_boolean would_export = symbols[j]->section != &bfd_und_section && ((symbols[j]->flags & BSF_GLOBAL) || (symbols[j]->flags == 0)); - if (lang_elf_version_info && would_export) - { - bfd_boolean hide = 0; - (void) bfd_find_version_for_sym (lang_elf_version_info, - symbols[j]->name, &hide); - would_export = !hide; - } + if (link_info.version_info && would_export) + would_export + = !bfd_hide_sym_by_version (link_info.version_info, + symbols[j]->name); if (would_export) { const char *sn = symbols[j]->name; @@ -1398,6 +1395,15 @@ generate_reloc (bfd *abfd, struct bfd_link_info *info) else if (!blhe || blhe->type != bfd_link_hash_defined) continue; } + /* Nor for Dwarf FDE references to discarded sections. */ + else if (bfd_is_abs_section (sym->section->output_section)) + { + /* We only ignore relocs from .eh_frame sections, as + they are discarded by the final link rather than + resolved against the kept section. */ + if (!strcmp (s->name, ".eh_frame")) + continue; + } reloc_data[total_relocs].vma = sec_vma + relocs[i]->address; @@ -3232,7 +3238,7 @@ pe_dll_fill_sections (bfd *abfd, struct bfd_link_info *info) ldemul_after_allocation (); /* Do the assignments again. */ - lang_do_assignments (); + lang_do_assignments (lang_final_phase_enum); } fill_edata (abfd, info); @@ -3264,7 +3270,7 @@ pe_exe_fill_sections (bfd *abfd, struct bfd_link_info *info) ldemul_after_allocation (); /* Do the assignments again. */ - lang_do_assignments (); + lang_do_assignments (lang_final_phase_enum); } reloc_s->contents = reloc_d; } diff --git a/ld/plugin.c b/ld/plugin.c index f45064e..91fe48b 100644 --- a/ld/plugin.c +++ b/ld/plugin.c @@ -90,13 +90,6 @@ static plugin_t *called_plugin = NULL; /* Last plugin to cause an error, if any. */ static const char *error_plugin = NULL; -/* A hash table that records symbols referenced by non-IR files. Used - at get_symbols time to determine whether any prevailing defs from - IR files are referenced only from other IR files, so tthat we can - we can distinguish the LDPR_PREVAILING_DEF and LDPR_PREVAILING_DEF_IRONLY - cases when establishing symbol resolutions. */ -static struct bfd_hash_table *non_ironly_hash = NULL; - /* State of linker "notice" interface before we poked at it. */ static bfd_boolean orig_notice_all; @@ -123,6 +116,7 @@ static const enum ld_plugin_tag tv_header_tags[] = LDPT_GET_INPUT_FILE, LDPT_RELEASE_INPUT_FILE, LDPT_GET_SYMBOLS, + LDPT_GET_SYMBOLS_V2, LDPT_ADD_INPUT_FILE, LDPT_ADD_INPUT_LIBRARY, LDPT_SET_EXTRA_LIBRARY_PATH @@ -132,19 +126,9 @@ static const enum ld_plugin_tag tv_header_tags[] = static const size_t tv_header_size = ARRAY_SIZE (tv_header_tags); /* Forward references. */ -static bfd_boolean plugin_notice (struct bfd_link_info *info, - const char *name, bfd *abfd, - asection *section, bfd_vma value); -static bfd_boolean plugin_multiple_definition (struct bfd_link_info *info, - struct bfd_link_hash_entry *h, - bfd *nbfd, - asection *nsec, - bfd_vma nval); -static bfd_boolean plugin_multiple_common (struct bfd_link_info *info, - struct bfd_link_hash_entry *h, - bfd *nbfd, - enum bfd_link_hash_type ntype, - bfd_vma nsize); +static bfd_boolean plugin_notice (struct bfd_link_info *, + struct bfd_link_hash_entry *, bfd *, + asection *, bfd_vma, flagword, const char *); #if !defined (HAVE_DLFCN_H) && defined (HAVE_WINDOWS_H) @@ -256,7 +240,7 @@ plugin_get_ir_dummy_bfd (const char *name, bfd *srctemplate) { flagword flags; - /* Create sections to own the symbols. */ + /* Create section to own the symbols. */ flags = (SEC_CODE | SEC_HAS_CONTENTS | SEC_READONLY | SEC_ALLOC | SEC_LOAD | SEC_KEEP | SEC_EXCLUDE); if (bfd_make_section_anyway_with_flags (abfd, ".text", flags)) @@ -301,7 +285,27 @@ asymbol_from_plugin_symbol (bfd *abfd, asymbol *asym, /* FALLTHRU */ case LDPK_DEF: flags |= BSF_GLOBAL; - section = bfd_get_section_by_name (abfd, ".text"); + if (ldsym->comdat_key) + { + char *name = concat (".gnu.linkonce.t.", ldsym->comdat_key, + (const char *) NULL); + section = bfd_get_section_by_name (abfd, name); + if (section != NULL) + free (name); + else + { + flagword sflags; + + sflags = (SEC_CODE | SEC_HAS_CONTENTS | SEC_READONLY + | SEC_ALLOC | SEC_LOAD | SEC_KEEP | SEC_EXCLUDE + | SEC_LINK_ONCE | SEC_LINK_DUPLICATES_DISCARD); + section = bfd_make_section_anyway_with_flags (abfd, name, sflags); + if (section == NULL) + return LDPS_ERR; + } + } + else + section = bfd_get_section_by_name (abfd, ".text"); break; case LDPK_WEAKUNDEF: @@ -397,12 +401,15 @@ add_symbols (void *handle, int nsyms, const struct ld_plugin_symbol *syms) asymbol **symptrs; bfd *abfd = handle; int n; + ASSERT (called_plugin); symptrs = xmalloc (nsyms * sizeof *symptrs); for (n = 0; n < nsyms; n++) { enum ld_plugin_status rv; - asymbol *bfdsym = bfd_make_empty_symbol (abfd); + asymbol *bfdsym; + + bfdsym = bfd_make_empty_symbol (abfd); symptrs[n] = bfdsym; rv = asymbol_from_plugin_symbol (abfd, bfdsym, syms + n); if (rv != LDPS_OK) @@ -435,17 +442,19 @@ release_input_file (const void *handle) /* Return TRUE if a defined symbol might be reachable from outside the universe of claimed objects. */ static inline bfd_boolean -is_visible_from_outside (struct ld_plugin_symbol *lsym, asection *section, +is_visible_from_outside (struct ld_plugin_symbol *lsym, struct bfd_link_hash_entry *blhe) { - /* Section's owner may be NULL if it is the absolute - section, fortunately is_ir_dummy_bfd handles that. */ - if (!is_ir_dummy_bfd (section->owner)) - return TRUE; + struct bfd_sym_chain *sym; + if (link_info.relocatable) return TRUE; - if (link_info.export_dynamic || link_info.shared) + if (link_info.export_dynamic || !link_info.executable) { + /* Check if symbol is hidden by version script. */ + if (bfd_hide_sym_by_version (link_info.version_info, + blhe->root.string)) + return FALSE; /* Only ELF symbols really have visibility. */ if (bfd_get_flavour (link_info.output_bfd) == bfd_target_elf_flavour) { @@ -466,21 +475,30 @@ is_visible_from_outside (struct ld_plugin_symbol *lsym, asection *section, return (lsym->visibility == LDPV_DEFAULT || lsym->visibility == LDPV_PROTECTED); } + + for (sym = &entry_symbol; sym != NULL; sym = sym->next) + if (sym->name + && strcmp (sym->name, blhe->root.string) == 0) + return TRUE; + return FALSE; } /* Get the symbol resolution info for a plugin-claimed input file. */ static enum ld_plugin_status -get_symbols (const void *handle, int nsyms, struct ld_plugin_symbol *syms) +get_symbols (const void *handle, int nsyms, struct ld_plugin_symbol *syms, + int def_ironly_exp) { const bfd *abfd = handle; int n; + ASSERT (called_plugin); for (n = 0; n < nsyms; n++) { struct bfd_link_hash_entry *blhe; - bfd_boolean ironly; asection *owner_sec; + int res; + if (syms[n].def != LDPK_UNDEF) blhe = bfd_link_hash_lookup (link_info.hash, syms[n].name, FALSE, FALSE, TRUE); @@ -489,7 +507,7 @@ get_symbols (const void *handle, int nsyms, struct ld_plugin_symbol *syms) syms[n].name, FALSE, FALSE, TRUE); if (!blhe) { - syms[n].resolution = LDPR_UNKNOWN; + res = LDPR_UNKNOWN; goto report_symbol; } @@ -497,7 +515,7 @@ get_symbols (const void *handle, int nsyms, struct ld_plugin_symbol *syms) if (blhe->type == bfd_link_hash_undefined || blhe->type == bfd_link_hash_undefweak) { - syms[n].resolution = LDPR_UNDEF; + res = LDPR_UNDEF; goto report_symbol; } if (blhe->type != bfd_link_hash_defined @@ -516,13 +534,6 @@ get_symbols (const void *handle, int nsyms, struct ld_plugin_symbol *syms) ? blhe->u.c.p->section : blhe->u.def.section); - /* We need to know if the sym is referenced from non-IR files. Or - even potentially-referenced, perhaps in a future final link if - this is a partial one, perhaps dynamically at load-time if the - symbol is externally visible. */ - ironly = (!is_visible_from_outside (&syms[n], owner_sec, blhe) - && !bfd_hash_lookup (non_ironly_hash, syms[n].name, - FALSE, FALSE)); /* If it was originally undefined or common, then it has been resolved; determine how. */ @@ -531,49 +542,67 @@ get_symbols (const void *handle, int nsyms, struct ld_plugin_symbol *syms) || syms[n].def == LDPK_COMMON) { if (owner_sec->owner == link_info.output_bfd) - syms[n].resolution = LDPR_RESOLVED_EXEC; + res = LDPR_RESOLVED_EXEC; else if (owner_sec->owner == abfd) - syms[n].resolution = (ironly - ? LDPR_PREVAILING_DEF_IRONLY - : LDPR_PREVAILING_DEF); + res = LDPR_PREVAILING_DEF_IRONLY; else if (is_ir_dummy_bfd (owner_sec->owner)) - syms[n].resolution = LDPR_RESOLVED_IR; + res = LDPR_RESOLVED_IR; else if (owner_sec->owner != NULL && (owner_sec->owner->flags & DYNAMIC) != 0) - syms[n].resolution = LDPR_RESOLVED_DYN; + res = LDPR_RESOLVED_DYN; else - syms[n].resolution = LDPR_RESOLVED_EXEC; - goto report_symbol; + res = LDPR_RESOLVED_EXEC; } /* Was originally def, or weakdef. Does it prevail? If the owner is the original dummy bfd that supplied it, then this is the definition that has prevailed. */ - if (owner_sec->owner == link_info.output_bfd) - syms[n].resolution = LDPR_PREEMPTED_REG; + else if (owner_sec->owner == link_info.output_bfd) + res = LDPR_PREEMPTED_REG; else if (owner_sec->owner == abfd) - { - syms[n].resolution = (ironly - ? LDPR_PREVAILING_DEF_IRONLY - : LDPR_PREVAILING_DEF); - goto report_symbol; - } + res = LDPR_PREVAILING_DEF_IRONLY; /* Was originally def, weakdef, or common, but has been pre-empted. */ - syms[n].resolution = (is_ir_dummy_bfd (owner_sec->owner) - ? LDPR_PREEMPTED_IR - : LDPR_PREEMPTED_REG); + else if (is_ir_dummy_bfd (owner_sec->owner)) + res = LDPR_PREEMPTED_IR; + else + res = LDPR_PREEMPTED_REG; + + if (res == LDPR_PREVAILING_DEF_IRONLY) + { + /* We need to know if the sym is referenced from non-IR files. Or + even potentially-referenced, perhaps in a future final link if + this is a partial one, perhaps dynamically at load-time if the + symbol is externally visible. */ + if (blhe->non_ir_ref) + res = LDPR_PREVAILING_DEF; + else if (is_visible_from_outside (&syms[n], blhe)) + res = def_ironly_exp; + } report_symbol: + syms[n].resolution = res; if (report_plugin_symbols) einfo (_("%P: %B: symbol `%s' " "definition: %d, visibility: %d, resolution: %d\n"), abfd, syms[n].name, - syms[n].def, syms[n].visibility, syms[n].resolution); + syms[n].def, syms[n].visibility, res); } return LDPS_OK; } +static enum ld_plugin_status +get_symbols_v1 (const void *handle, int nsyms, struct ld_plugin_symbol *syms) +{ + return get_symbols (handle, nsyms, syms, LDPR_PREVAILING_DEF); +} + +static enum ld_plugin_status +get_symbols_v2 (const void *handle, int nsyms, struct ld_plugin_symbol *syms) +{ + return get_symbols (handle, nsyms, syms, LDPR_PREVAILING_DEF_IRONLY_EXP); +} + /* Add a new (real) input file generated by a plugin. */ static enum ld_plugin_status add_input_file (const char *pathname) @@ -641,7 +670,7 @@ message (int level, const char *format, ...) } /* Helper to size leading part of tv array and set it up. */ -static size_t +static void set_tv_header (struct ld_plugin_tv *tv) { size_t i; @@ -650,9 +679,6 @@ set_tv_header (struct ld_plugin_tv *tv) static const unsigned int major = (unsigned)(BFD_VERSION / 100000000UL); static const unsigned int minor = (unsigned)(BFD_VERSION / 1000000UL) % 100; - if (!tv) - return tv_header_size; - for (i = 0; i < tv_header_size; i++) { tv[i].tv_tag = tv_header_tags[i]; @@ -671,7 +697,7 @@ set_tv_header (struct ld_plugin_tv *tv) case LDPT_LINKER_OUTPUT: TVU(val) = (link_info.relocatable ? LDPO_REL - : (link_info.shared ? LDPO_DYN : LDPO_EXEC)); + : link_info.executable ? LDPO_EXEC : LDPO_DYN); break; case LDPT_OUTPUT_NAME: TVU(string) = output_filename; @@ -695,7 +721,10 @@ set_tv_header (struct ld_plugin_tv *tv) TVU(release_input_file) = release_input_file; break; case LDPT_GET_SYMBOLS: - TVU(get_symbols) = get_symbols; + TVU(get_symbols) = get_symbols_v1; + break; + case LDPT_GET_SYMBOLS_V2: + TVU(get_symbols) = get_symbols_v2; break; case LDPT_ADD_INPUT_FILE: TVU(add_input_file) = add_input_file; @@ -713,7 +742,6 @@ set_tv_header (struct ld_plugin_tv *tv) } #undef TVU } - return tv_header_size; } /* Append the per-plugin args list and trailing LDPT_NULL to tv. */ @@ -740,27 +768,6 @@ plugin_active_plugins_p (void) return plugins_list != NULL; } -/* Init the non_ironly hash table. */ -static void -init_non_ironly_hash (void) -{ - struct bfd_sym_chain *sym; - - non_ironly_hash - = (struct bfd_hash_table *) xmalloc (sizeof (struct bfd_hash_table)); - if (!bfd_hash_table_init_n (non_ironly_hash, - bfd_hash_newfunc, - sizeof (struct bfd_hash_entry), - 61)) - einfo (_("%P%F: bfd_hash_table_init failed: %E\n")); - - for (sym = &entry_symbol; sym != NULL; sym = sym->next) - if (sym->name - && !bfd_hash_lookup (non_ironly_hash, sym->name, TRUE, TRUE)) - einfo (_("%P%X: hash table failure adding symbol %s\n"), - sym->name); -} - /* Load up and initialise all plugins after argument parsing. */ int plugin_load_plugins (void) @@ -814,7 +821,6 @@ plugin_load_plugins (void) plugin_callbacks.notice = &plugin_notice; link_info.notice_all = TRUE; link_info.callbacks = &plugin_callbacks; - init_non_ironly_hash (); return 0; } @@ -888,9 +894,6 @@ plugin_call_all_symbols_read (void) /* Disable any further file-claiming. */ no_more_claiming = TRUE; - plugin_callbacks.multiple_definition = &plugin_multiple_definition; - plugin_callbacks.multiple_common = &plugin_multiple_common; - while (curplug) { if (curplug->all_symbols_read_handler) @@ -934,88 +937,91 @@ plugin_call_cleanup (void) /* To determine which symbols should be resolved LDPR_PREVAILING_DEF and which LDPR_PREVAILING_DEF_IRONLY, we notice all the symbols as - the linker adds them to the linker hash table. If we see a symbol - being referenced from a non-IR file, we add it to the non_ironly hash - table. If we can't find it there at get_symbols time, we know that - it was referenced only by IR files. We have to notice_all symbols, - because we won't necessarily know until later which ones will be - contributed by IR files. */ + the linker adds them to the linker hash table. Mark those + referenced from a non-IR file with non_ir_ref. We have to + notice_all symbols, because we won't necessarily know until later + which ones will be contributed by IR files. */ static bfd_boolean plugin_notice (struct bfd_link_info *info, - const char *name, + struct bfd_link_hash_entry *h, bfd *abfd, asection *section, - bfd_vma value) + bfd_vma value, + flagword flags, + const char *string) { - if (name != NULL) + if (h != NULL) { + bfd *sym_bfd; + /* No further processing if this def/ref is from an IR dummy BFD. */ if (is_ir_dummy_bfd (abfd)) return TRUE; - /* We only care about refs, not defs, indicated by section - pointing to the undefined section (according to the bfd - linker notice callback interface definition). */ - if (bfd_is_und_section (section)) + /* Making an indirect symbol counts as a reference unless this + is a brand new symbol. */ + if (bfd_is_ind_section (section) + || (flags & BSF_INDIRECT) != 0) + { + if (h->type != bfd_link_hash_new) + { + struct bfd_link_hash_entry *inh; + + h->non_ir_ref = TRUE; + inh = bfd_wrapped_link_hash_lookup (abfd, info, string, FALSE, + FALSE, FALSE); + if (inh != NULL) + inh->non_ir_ref = TRUE; + } + } + + /* Nothing to do here for warning symbols. */ + else if ((flags & BSF_WARNING) != 0) + ; + + /* Nothing to do here for constructor symbols. */ + else if ((flags & BSF_CONSTRUCTOR) != 0) + ; + + /* If this is a ref, set non_ir_ref. */ + else if (bfd_is_und_section (section)) + h->non_ir_ref = TRUE; + + /* Otherwise, it must be a new def. Ensure any symbol defined + in an IR dummy BFD takes on a new value from a real BFD. + Weak symbols are not normally overridden by a new weak + definition, and strong symbols will normally cause multiple + definition errors. Avoid this by making the symbol appear + to be undefined. */ + else if (((h->type == bfd_link_hash_defweak + || h->type == bfd_link_hash_defined) + && is_ir_dummy_bfd (sym_bfd = h->u.def.section->owner)) + || (h->type == bfd_link_hash_common + && is_ir_dummy_bfd (sym_bfd = h->u.c.p->section->owner))) { - /* This is a ref from a non-IR file, so note the ref'd - symbol in the non-IR-only hash. */ - if (!bfd_hash_lookup (non_ironly_hash, name, TRUE, TRUE)) - einfo (_("%P%X: %s: hash table failure adding symbol %s\n"), - abfd->filename, name); + h->type = bfd_link_hash_undefweak; + h->u.undef.abfd = sym_bfd; } } /* Continue with cref/nocrossref/trace-sym processing. */ - if (name == NULL + if (h == NULL || orig_notice_all || (info->notice_hash != NULL - && bfd_hash_lookup (info->notice_hash, name, FALSE, FALSE) != NULL)) - return (*orig_callbacks->notice) (info, name, abfd, section, value); + && bfd_hash_lookup (info->notice_hash, h->root.string, + FALSE, FALSE) != NULL)) + return (*orig_callbacks->notice) (info, h, + abfd, section, value, flags, string); return TRUE; } -/* When we add new object files to the link at all symbols read time, - these contain the real code and symbols generated from the IR files, - and so duplicate all the definitions already supplied by the dummy - IR-only BFDs that we created at claim files time. We use the linker's - multiple-definitions callback hook to fix up the clash, discarding - the symbol from the IR-only BFD in favour of the symbol from the - real BFD. We return true if this was not-really-a-clash because - we've fixed it up, or anyway if --allow-multiple-definition was in - effect (before we disabled it to ensure we got called back). */ -static bfd_boolean -plugin_multiple_definition (struct bfd_link_info *info, - struct bfd_link_hash_entry *h, - bfd *nbfd, asection *nsec, bfd_vma nval) -{ - if (h->type == bfd_link_hash_defined - && is_ir_dummy_bfd (h->u.def.section->owner)) - { - /* Replace it with new details. */ - h->u.def.section = nsec; - h->u.def.value = nval; - return TRUE; - } - - return (*orig_callbacks->multiple_definition) (info, h, nbfd, nsec, nval); -} - -static bfd_boolean -plugin_multiple_common (struct bfd_link_info *info, - struct bfd_link_hash_entry *h, - bfd *nbfd, enum bfd_link_hash_type ntype, bfd_vma nsize) -{ - if (h->type == bfd_link_hash_common - && is_ir_dummy_bfd (h->u.c.p->section->owner) - && ntype == bfd_link_hash_common - && !is_ir_dummy_bfd (nbfd)) - { - /* Arrange to have it replaced. */ - ASSERT (nsize != 0); - h->u.c.size = 0; - return TRUE; - } +/* Return true if bfd is a dynamic library that should be reloaded. */ - return (*orig_callbacks->multiple_common) (info, h, nbfd, ntype, nsize); +bfd_boolean +plugin_should_reload (bfd *abfd) +{ + return ((abfd->flags & DYNAMIC) != 0 + && bfd_get_flavour (abfd) == bfd_target_elf_flavour + && bfd_get_format (abfd) == bfd_object + && (elf_dyn_lib_class (abfd) & DYN_AS_NEEDED) != 0); } diff --git a/ld/plugin.h b/ld/plugin.h index ee29b7c..dc32295 100644 --- a/ld/plugin.h +++ b/ld/plugin.h @@ -66,4 +66,7 @@ extern void plugin_call_cleanup (void); add_symbols hook has been called so that it can be read when linking. */ extern bfd *plugin_get_ir_dummy_bfd (const char *name, bfd *template); +/* Return true if bfd is a dynamic library that should be reloaded. */ +extern bfd_boolean plugin_should_reload (bfd *); + #endif /* !def GLD_PLUGIN_H */ diff --git a/ld/po/.cvsignore b/ld/po/.cvsignore deleted file mode 100644 index becd153..0000000 --- a/ld/po/.cvsignore +++ /dev/null @@ -1 +0,0 @@ -*.gmo diff --git a/ld/po/bg.gmo b/ld/po/bg.gmo new file mode 100644 index 0000000000000000000000000000000000000000..7562e74e8cb667681decc1bb38eae008a0761cda GIT binary patch literal 71843 zcmcJY37j2OmH#U`F2n^_L_sa04T>& z-~tE;vIfv`95=Q=BrNWK9UXZYopBk_QAcOd(Q(|y`8)sle}CuPTgzLzJE;9h<@c)U zuIHZZo_nk6yD#{&>l6O|d0LVj2(H~XN#6aGBze~>bTvsnH8V*L06z`x4?Ypje*?af z^B2rYl9zyUz?Xw3gR8;K0Y4dV`fHM8IoH>LtH2L}*Mh$WPX(_yG)Y#1-vloO51ySQ zSArh_PXJ$ANs<-dR`B1z&w-=hC%Tj5DsaYOv>Ut^yahbr@Fck$d;_ z{P3927ggUi5ggYN_nI-0(N9|M4*$AgeOxdeO$_;GN5@B#23@Ntl$l3#!?01qWI zq)rxqYWE7$>Ns?I< z`ZDlbkReIV2VVt#9Mt{41-rm~j(0o^d^P8%fv{Ne7EtAV0IY*ggzK+A!TIxiP~}_; zs-1rgz5@Iy_;T=B3zGy^OJ;$(emcm|C*$Bj;DzUdUikRk8?tC3rEY ze%}cm06qq)yng^y&wq#W{TU3k{}@pHd;Q@Ie#mt`!|5ZCU67i?*_$x{{gC;0}v+BE2K+iGy8IGUds2i(`4@vq zKL9c$$$P*B^HmqGRSx1h?ayx#d>Ehu`u3sn2>1;sD_3cd#1 zXN~K-qd@V&TLRtyif;FVF9iQ3T>m|&e!jHFx2R{Zr8~iSKB={3h z?S181AGejD${7Wf?`m*9_!&^`OiputI|f|H=}q9@f!_g-2Jb!H_36KWOE`b^89tr^ zp!om&AS{#Y0afpTXC}!^@MKW@QU}$}2f(Aie+Ksj4?N5D=4?>ocRY9)cs8i6#c&ms-9niDtG@k zI6tfgMdwja<8~W}C?#J4MXwj0Idg@el@7^_-eqP zfUoBKnGi+gS3r%!>p|t;46401fvV^8pycQ0;ETam4|u(ELCM|O;KATKz(c@KgzMh` z_u>3$Z}Rcn7wqEv08r@{g5s;qp!&B1{4;Pj_)PFq;B&w)flmX!0V@9!;0*AoTfBV- zgVQ-*4Qia$f#T~iP~&qoxD$K?dPqBX;A(77N~yy3Vc3zz_9nP0zQlLIiU310`P2b415vzI4HXP z6R7fk25S6%4XV5s)SM2l14Xa(pwjh&)=p64S_cmTZvfT4Pl9U4H$aWkzk=eY=a2aP zLqWBBIjD5~;0wU>K=tbiQ2cfWsB!x=D8Bd|csSVoX6O6$pz^%~R6A}4HExfA`+`3L zHJ-l))&Bnrs{NWQJRf)lsCK**)c70)&IEfvjq3%V=y7AfodN$g-2XZFJnlcM?)-Tm z_#Dnp2GyQ3L6vs_D0+Vo6kQ(zRsZ+FZt#}@XN>tcy&ilG*DnW^|6WjZ{fBV=J5Y3; zF&^pzmF`SX2$Z=_IuCXawM+O_a9bSUTdygf<24)#*ngWzl5L4UdbGw^eq z|MCiSHs`ypG|@?>zbi>-O7d1v?ff6`b>PMCMux$MK}0?|@;&G>@GkINaNnz-2RH&= z0R9GC57w_vl1IU>fhzaC*CYvDPG0a{FaH`)`S!aOnt``~G&y-WojwWt0Js_acaU4j z>DPPye*=3tA9x?M1iuWbJxAVv4+7o}(zRrNhzm<4cY=s?a^U;DzN8N-k1YQFPsIw0lXAk2Yw$s9h|?z+i@MJ^Dlt&z?a|QbT}K-`NQCG z;P1e>;L&$_oL~fmM9IV8H^H8}{QB$2_-_sQjBj_2XJleDXv%f7t_WC;Gv&xc(*ZB=A)adK_sG9OV3NQ2AfJ z%jJC&_$JQ32(AH-{G`+C?cmXze;X9NpZAcD?-(dL?*NYne+#OfV|IIcF9c8J{A1uz z;O{}v?TCl5N#HtgA^0_LHTdF3ynh?PLpZ+;IW)P42n*_244Xl`gtG6lfhSWUI%A@H-am`-QZgAnO|^ycMkXh z&OZ-|uHOVz?_vMP`D!az;rvlh^!q8O@$LVj)A>>GJ)A%1OCC?X1ss?Lul%*AzwXPf z@1Ok@*PEAs=aK$5;4nD!H%UT~$#=kh@B?3U`tI|%)1e0xUwjp;fd@6*j$Q+%oPPq; zcr`$!d+HwN%hSPb&aVX*fS&>108abcB-seQ5u68p9#p=ke9ilP8rZ}6t)Tk#i*WtI zuRH&K5j>IWNB^Dk)muT)^F!eA;P1iLf%E>}9d_CvqfnDGi!TI3Nz(c{=-*f&t6FiRd z^Fi_5gWv(+cfjf3e}VgfPyI*tFJA_}jq`)R_23-=r+we)*b6Syb#N2-L+~E(lplC| z{s(*>=c|6``tw|{m-9W~O7O^ka(Y|@K9ln&z-8c%L5*MKN3PGuLF*6L&-K|q_Ij@Y z#phoGk5~GC4)P41%K2`v4o?3Uw|jpMzKHX?!9noz;DO+re|7z|3Y^FJjoyKj$}t;?MiR)!;M# z)9vS3;0c^R4n7ln-Y?y6c`2xTv%r18Mc^6W3UC?t0k8-B3HTiF_+L5wSAwGZRp3hS zageSiFaNcdH~lxRPhSO!o*O}>{~)*){1I3O=l<5|{Bcn2dj5ZTyI%(G%lQ`Yx#0QW zLhwp(1^AVKFa4eK$wu%fu73}FI{2dhcD;E3_*Txl!4H5R1tkZs|G&J_iVL0Fa|9Su43@+#T-Jt0C z-{9fkssHQt;ceh+INu41|NjxZ3Y?itvvsgtp!jjwv}q;>9|q@f{@kZbv+_;>b^mto zCE!z@I?d*hF9V;=`D{>hd0n`E0(dOvYrxaNcY>0yAArYzCo*}^{kH|&1uo|N7vPcL z(NCLZ^SJ@=LeAeE&Y%1AX{L|nfERH6Qt)-)v}a7S`M`1D!JIz?ihkb*rSDFD<}|Z6 zJHP?X_uXfj`4!tiwc`o!&ES61r>K9Klef&;v0p~vfp9Q{VziB3)uLUJHOTzhD@YS4e0QUzk2i5-_pvLhYQ2qH4 z_*(EqFPUcc`V>&<{u~tFTm`-od>{CH@BvW#`bALk_)Bm#c*6dE{~8do+TRi3$Co*K zHNO{d{3u-e0{BQsCpakl{sQ`~2`5_D#MTet(CAmvb!P zct6+P8!{fi?=g;H&VS4?7_MK>wZG!Hoa1je4(IyMInLwvXF{5#{QgURcY*N_m6P1f z`4G4zTtAiH5A*x)VR_fM0#d6 z$4u_)Z#M^Gnmi+%@5ec6Jo$6ZrTc!uf%-Fj%g^jje6K(05&b>Nk@EX?P%?Bc$4@yv z#JPC?hB!XU?~j9*aOm%E!PCO;_koK!B!9a&z8S7R0-`>We+uW)GZl`% z;QY-TsK(?S9QSZde{bdY4i5cwgCF4dTR$}&sh{Iqlm5ChTwlWZT7JIt zzeu;V-vFKg z-o|kWzcEqC_jQxM8T>wrrV^#FCq6UIlq?U29Bre;JSQ;9)5qFV?M{=fIr$CvT#f@dUeEd0K>eK>(!S77?f-}P|2mHQxc4EBPw;ye zI1hX=hyK3GF^l6@9Pi=Y;~e^X4#zvgZ@a*MkB1*$I{Cg4Smldwf=jJh-e-8X2$L-iGdF^BWlhDh*L@ zbz^n3I^0)H*Y<80tWM{~l7V_(?`VIuKOGnz86QjQ)xNQT+HhU>RtyYpsg9=gzR`h^ zv9x!%KOL$L)ke3cL%k!qztYbZ*M>I^Y#JY>>e{fb_f*Hy=D!|m3U`}tv^`(Ct#5F= zzna!IyovVIXQ#cReVYf)tEvGTs-yLE<7jOt?HwPhO|ii0wvpQC*z9y*n$Y^!rz_xU#)?f7kd;9w<^|AiG-oe32@8CdhJuk|CEwvWLAxpOojBPfO>qm`& zIbnF%OWM#|udd%XFj!6J>8E}zC>3^Mb-2o4RMXy62~tbDu{N5HR*gY4^y!inE8q)t z6&x+EIVsW8QOBSwOm=26phXS+Z1dF8&*5HjGFO}imp=un{Q>*78 zHsiEONz%oumMx2Nm0G&lDJh1hO0a?9AO|**Vbo$HM#qQ828ODYk$QE!zgDp!wywo4 z_4lVCO207z+^(Z6WeB4OV1t7=L`ENZuv2;X@>7!&}nzh)Rm^2{VrF z9~>+uZ~ZM{%ZFF_$2M2fFvjXbft@LgL6N?wxDd{tS05WijH8g8vAH^Ijgg}4-_C#x zNGi9h*xpoa2_iRT!VCvFKz?T1u*VurKsDkEx+!<6(rGc%z@sf;v z_Sq+0E;(_LN85~6QTRi>+tUrzDEJK9c%5EPC-pvo$}weqM2c~+ce`}WD7wBjH1HN< zl62<6o)v3?BvpqemdkV@5;;UZCuxgl=7ZHb%5ATV4-cv%2or{Aq}n&IaR5214F|Pa zZcnRVOS0>=k zYOVCN&I-%)6((}3&8lvz_KlC3p>esD4Js3sEuyH;MXvx#ct5ip@FfWw>E5_ zYExivjdvT}hlJDy&x0p=$EI3XXmn6~VYoZ$y;KfVWV5L9qIOBKrNgu=QpG(Ud;`>% zyKP0rNz>>OksxytGB3y^PW}kW*>yuTl!xx9OM%SR(cRsh6&lOqI{uG@Y6_*{&x|vW z6(k@!3|yM6gR;vt$6kQ5b!3&tnqz_q>s60B6QxPrH~~_TXwzVAL+@Z+N*$^2mWc`F zd~F&Yst%8(^Xda{DZ5UxGv+O2i9*KOXkQhlvAPMpxfq{L9%OaX=)lQC<0BfpdV1c#=-4=Y4B5~FS*;WQ*kqpKC`9QUPUobX1~&C>*gh8Z$WZT_j0@!) zqEPEhKGJ!^>mQH&e%ps@2<-r=;w6dN=4`cbEi&jk5-Y3(=a)C^< zHVh2+%O432t4Xp6pkryj&kp=z)r87KDJ!gA z-JE+&{WX-IW)t$*dzPNmot|0)Q@E~w5Vr#-s^~G{PszD~0dUk>8oJGAM_D83M`6BX zv%3D?v0ikwETniAUysRv&7Bj?$8ZOtZk;D(RF-&{F`M7zvoFnHy>sqN;CXCJC&}HL zb}w1FET0`p^~n7g%N1sv++^yoS)ZBy@rVIhHz-zb2x_TsOLO|7yj$La+C#it6)IyW zBgztjEiZcA+<8Hu7o1~7sf?mLW}KO>J2(o{Ik7BLN0r)OKT}>*c=KP6>nl_3qg(Mo z;8r7Dd1=yoP2+lTTIR(~`Ob}t>NVP<5(V7ax*69WyF z$-C8D7V)0EICXKdB2|_$h2rXMl)8%X$pzfJwmOO?M4k6kM;VON(tBokG?o5w1x4_+ zD{eyKq*#TVL4ve*gQgf+vf#DUgZHqtf2e{A zilty6I^tLz8g~s*pQ{AJwfst)I`pNr5esjrHtZ1`S5sd?WJKbK6&&3-Slh}Z19wwX z2J=r;zsnXm2W!1}jbV;;__nUolVS;Dc!@sQVCXgujLl8E@DDciD#DbW+qL$Psi*d_ zu}qro4h*~2=~|e@6VO3ji>6+nbfyRL7zwjYQ2 zr5v%vL=qH1s?(vR9TIq{S&F&oa{LL%VVX{TXK1<>&2_Eg#rD-U4WkD7W2tjdxMM{7 zXbJ8Vzw2`?OYoP~CJS!Di<_AvdwI<_af4Kwjppb;f4`rm!7dh}%{zKTN? zibkZy21bbV1)_&0HKmdX8>o$&sZ-p!eG|$Q>5wRA(5#8Eg;ctDZo0U4SbVbyO&QD+ zZNnQM#?!2n=8H^$swVB8@jPZZHX}VmjM3Mtm=ub&6xQlaR}=Kb4KQw(%=g#&#x+~; zP>5#!gZ+n46Y9Gd39-n7?)F#5dItuj&D7Y8Ehp~Q5(&g8+M$UrxSo};7X!FV64oTS zWx=!*Hq&VCLb$Q1 zg;biQusFnexfdN$jaG^6_pcw>+&|hT1)QSBhp=@W>y~q#yb=osbuo?i&V=M6SP`^W zx_T)lN8xyEi{e%gXxJ`#(8tE$kgi3Ch+&LY5PZ0rv36^>kY9$yf~l=HH7y<0{p#o_ zWXA4vF&p)Q2ZqnXMe9!&EnAW@Wt0FF2^w#kcdBuyitU>-dwjX&Hnuh{91+Q{;|MaC zC>D`4qs;j5mf_mgVVHcVcX$&$KuL~mN4KaM-pH<=x!&}-awl06aFMcDeq4MSt!{#r zp<#s#VQtE9TbY*I%TX1`a&Yvk+lU9YmcXP=#xYaArP>{GM zJ*?^6DIqe77QQ&g=p&gLCWOET1h=9-pvA6@%sLjYUB2qnP#&yg^0a!*s?(P*SsEzY zsk}Us*wtq9Emg)f9HNBg)pVV%mUW#@h|qcvn>2CDJ@H&)WpppxKo4Oz1`Bm1FChl6 zqmP6usCcyeD~)JW+(Bv>bfh9HsVQ-uC|9B@m#$p3<}4}_EBIJvmD;>4FC#WK&m3zv zp4f|QzQ{MlT+ZrQpC-$-TFzD%ev=EX98Af_$l&-UqOM6-b{|4jmabqu$yBeOc0fl7lJ*8e!&&eCyXN zU9oEM`o(Kkt-(!dX~5#l4|WqB{h@*v9sE}tsbyv_C0oI4$W)DLCF`U(r&F&3W1 zo_(Gqo{X)rq=7^HZksz5?u0p3>Fy{i#+#dOL=z56YU4t5Gn{5-9-PSwZHQS)R)4QE z6o)Ev6Jn8>dt%zE==j*sX6ZY*6eZajoq^c2Af9*^Wm6m%0-2jLT2hwg*cTOhEW*iI;E)ill0q(aY*Sxc z%CAF7i}2RdDtj-aGKWJzhRXO|uq4Kxv8qihS&fiVn`t&wX&K7|(vF+RGqY0JTpfg7 z6fs^WWG#zp6wOTT=q8(JNO)bm(ixT5Cbo_czw2mwiA}5Q#!5CWi1G)_Zv;AcOI1B(_;f9&NkPI1x3%BL6wEK-JED>s>fM4Zv@Kso z_kw&DlSz}=jB^ZG9v`i?CPN!`QgLE2_fYVX2mBry|l|_IDl?uPf z*BPmqtd-lG=dzC3E)Da(%gL6PC#5*-z9Y)KM6FHR{<|n6IY~~--7sGt?Q(rzEi=SuN!Wy#eQDX z2|=xDZj`M}SS!R}V#Gos0^m`hMoXIo|7JTw5P%3f7ZyY}FJE+1{D|_ha3MWWSX7G+ zK{3TV_2bfh!a!{Fl7K4=R9Sm`Q|?15mBPXjtu?Kur4fSZBFiBakutDTRw+?Y+k#Sw zfxG5uhbcbX3KvrL^~RPAAzKQndUhrRk)4}c79$FA$}~`y@0$r0mxp?{**g7*cEd^g zHTA6!@KsMxlK5!&zP&6`oX0GrFp+H+d5 z+!i;{B6uoha&W@g2Ax?ExWxC+sxfHSuG9A>uha{A+Jv!X)=^;7Vgroh!W<=QMsuYs z$`cV$w+0NmI|B>?CKdLZF!hmgh<5 zN^mt4{Z)cEAtqDKpqQubncWgSTT7s!J?Tj+R;0o3*?G@dJu8+I{C8W(r8Cl*=4u2| zm@#CaWF^nkdctoUMSU#)J<<(LIezk;KHxIx|LG^85-xxD8 zi}uG#C+ix^K6^ziIV_7ZL9jv3oDbHYWi$(sQfmcSq9$ei`aF@PxropKdAA)3AQriO zNaT--XRMbMN?$I~E}7a8n|XphO=~ulE~JzNJX1p2E}}wvaM0NgXA^t(@q%Mvd8j2g z`3mO+O%;7VW0P!p@99;T#hJ=0JlW08ff`Fv+O7~o*+yw-6Fa3jT0XmJ$`=!fM#>m_ zA7UJN1#R59n6@yA***p7A?ZDV>piQupcWM$Ar)F~UDxTeyG}pH@(%WnV5mYg1aF}w zRjf3ovECLJcNB`Yl@x_HwT}77 z^ip4KWYR44+Bo|!#mp0=wx!)}_cU?}$XTKv8B@k7^B_8AT%N?_gDpk8`lKamdd%C_ z_7qN-YBj~Q-NPIi9iWe^*REf&YT*)X`P3su?7wHv6oR5KhK5l^M*5qhf)p{0(^zHl zE8inra{jQqWQl4@cWBR}DiR$0}l)`UUrx{0H)wqh`Gx)>PgoNDW+ zp4zeL;LI+(DlMX#8M8?mK5N|JlrBAU^{O>%!zQs&9AkDIt5?jP+T)id(A_cB zo-Ngxtx)7sCayN!3a%Ubg19$U8)F$o4?&4gnibN6!T#>9!(XdfkHZ0y`{g@Cde0-E z@5?arxb9Q?1dR~$+dgbx zT(v)0$P-sfmakzYS4))WzdXXB%!E|OHd`VmkIAL^5OLBp$l|mT$jnHW#o>id6#AgV zWTCd|wDWK3;Z~G=^nNDo3R^KXksqiw*`|MzZ|&Xg1ut2<{?w&Qmn>akv$VW5@%aGx z!UW97&GI|D`6m2po*5+z6;;cg;G`+`gr_3qeZ64~%)%ZsU8ZO8sOZ8m9^7I-Z z3humBSWgzOI_=c8$zn=P{h3A?Tq){`ShM*Cv%>tAo*>9ZIk;sooVutfw^{1!iN<7c z@!8%m2IhH}#zVA(go|Z0^MRFg@KjhfkRgz>q-Rx_2l*y2%QiZ&Y4cb*=kOyAPnV5W z*%@8iIL17qnl4kY#q9EIw)gch6J3l=wdYM0CbX@7kUtoDDfajuek< z?2FO9=yYIX4D!_a`o>3N(&+MqQ4j9L#CMIN*(};~GH`0Vob)KCBAqM7OpKEyJ{M+` zG8wkgdf1dcil?j)DWzB`eq zEYuFHWT|=8wxpYw*98q(^s${=R6*RJPaB#j%dA#ceQK$uPc4~iDuu+ug9zmF_XEhj zMAIBKnC*nuf2S^7xindZhvP1(V(ZIf2lW3GjOH>uy(U#wcz1;OfVsR2Qh(w}Hu)O{ zw0eerVg#^7FlJRq)A&Z708dUl^)$B1rg9gv2UawZ=+|7-!YB3oMu^|oOvNoga*`Yz zkJD`m+{mgU4g{Rvol(H&ua=mG`V%|Z#D|IkiFoXBp0>Bw`WFzGnLDZX;$ba4cQ~82 zD(vdN!*y0$Toc-2OMUiK%hM{2`Ck}#F zn8(t})(9JIFVhg~c(b!zL(=vp5AK}NBtjT->9U@T)eU@3q6<=nI)lVqm|2LRGiNz@ z93^P#G7y^;GPdsWh@7IG+h?bBZIVR?RVua%XjXE{(zDK3wPs0jO0_zIFUh0#F{fN# z6X4W%nh2w@^or{6CY)wy!-K)$L5dcgY-pIL!a(Lhns^nmVgoS zLUfBMu->R(qn@n7O<`5Y7yg5NfiU&a8k2fi0@azUUbyz8Wc7;EPF#L!!hY5h*YJI) z)rza+rg1j%&IW+8@mozr3eShFMm8u!Jmd}qMG;c?yJ&20jTQ&S;G}`Rdg6C|j!Bqh za3ov_zLkY)@=0l-k4@={ch=}pn3ZdmOCYg1Mh2!NzH2J6yO9o(i{@MY)&_Dh&9lU9 z5`{^zul`6DrhC%Z>_T($ddt>Yg6kfpPnRP@`7==Q?GAOywR|D&uL*~uQLN43%-4C# zi+o0t{-JSZuL?L+N6DlY^As&@yZJGWafqXlp}j%Zfb!%~2;J6ak{{0eJ#F?($2VqnJj$ z)Pp`DB4CPfu(v)|(WEZd500i2)F9Zs z=8Psg9dfz?>u@t<+@z_YS1F4SHo@41$kBxjC^qZ#2Sn(|yi-qGxoGK{1(rG!DLcy+ z_tgdqX=G6doBpXA5(1Cnlr%fGA)j(tVFiU|O4%;PSKLgJx3momzMsT;E;C0ANxzFm&YLhR>A`DI2}NfLku-fLGN?J9_=IhorT#q`S z{YSnWyV{Lw1bU|r+GA219K${?=|NL> zC$=Mi`NAf4QfgIjqk<{*5KKAF_F?EXJxsQ!+2dW>J|tr4)dw<&qr8NwwsE>ns zJ(#W@-@v1`=?WsrJWrJ^LmjDSF=k?y*y2G1$!z{CEfEl-8I7sJPKDSmEiUwK!0RL0 zhQ^1j(V6T%9NSKKXYHuo4PyjiCS&rMw~$6sCo^D zdz{H>ylKdKS!D+r7KO61Z6HBeCZ}n`tRgb$x?mU2vDVltM^2;Xl?t@e-n!kez z<_b4d1qtmk7R58QeSb?!o@hKg*WyDDg`|3*3nH_1n@Avgj*5yMtFGdeP-_UX)CIL4 z?h;T|9FApPGy+D%)_ZB|mUQ`Ht1Q2H&B4K7aI_G{Q z`NTM1t|%*`#L}R{GGE#D!t`pUNNrVnuq5uvRtzA^(7LCgUI>W7NCXM%Y^ljI1g#vR zN8&Zyb#qCd74#`8d#((1Kl*g$Qxlr}v za<8p}HoxHMqG~E)SbD-*o3W{0L5m z{X|U~ddzR#{N6gUtB}M6M3lqNbCSHP+5IFuBq>VRG8)q0%i`19-KvkXfWg)dA^`qQ z2ef3#&79jco`mHK1x1>+{7+Bv<|MK}_TL40yJYuVm8vml+43U;(-ZeRiDUWmh~>J& z-OMd$y1O+J9Ur_VKeMvDzjC^7Zkns0!kq3ohj+j3@agUtR#w(G4fIzQ;W1X$GJC~! z)JsKpyT)MsgiXWa-RyFkzIxT#ibr}`oLmBX&$ZBY<%lCHhaa6Dam3ssk2;i4_u(Y0 ztO@T_X-Y>Re9oM?M;&wM;d4m0LjE3_ak!3Nt&Pr2*VMEPJzZVJi8wEvr@hqZdqHxqRi)yyr)B zA3lAtuVhu$qFPw{g20Cn*Bux>PU13Jua3<>ZSAtkv3WW*gI#5nr9`j9XmitJSy`OE zdXN`(4px>igTXEiGq2^eK7Y<}n&R?v{>}>4bb5-M! z#?F-g?oJzzHtyMTMPpam*wuKLn_N@cJ4t&_V|QcMp0_KJrF>}5g?p~tbJ3oQ8;|a} zi2IKy*S)&fc(CzMV;3tG(;K(#xp>cIT)lG7g=ANGmgq9-x!+E>emCi@AtBG5q%Kjg zs8+hNYl8H*(7Z=gu66O=#-oL$n8qDO9xgU^Q+VM{=bw!mjV!zOyl2nl>V}cpdU|nV z*X$JX?s5`C&Wow_a;FvJ5fhO^G`SmMKy$ixH@M3ZK04J#?4l8j9(}Swr`~&0EEowtF8h#Jl+J4q4RUTC3lvNw!{xXhhE@nN)@{%n*A1Pbhw34=8S-qWBw z*!KOc+!906kM(fd-HlH+b{AjX(zwIq<9^YXBNx0ZTN<+k0!s#V8Z)bF%A~Vhh1X+x zXfVEDsHsOfEmuk(Xv4i(k?Nd;ETf@>t98J+7zcdMRTN>&G37VJs!kNkqp1y^*vDES z$u~-*;oY$ez%7mI7X(I%E?|gG;xab9Gq!P^cu-VCNk}cwMw%}9?jR}Zng+UZuldzbn(81hD(-G-l!Z1*L~m|XCL$fhH#IUmLM2dHQqFeZiu7%{#*XiK zY_3scpeK}IDpU2|&zSFS+@}h1Zl=P!?a7TvCqkivfmA_VqdxAZxd^i9kz7})ACZkE z3XPrRj&yucWaAnWER52X(!CY40A=o{>^)aevyBw?#)ZQL)tYyYDA>4r@(6zDlQTnG zwd(2(6F?<4HsV$rrX~jM_`b-{p>`%rv|sOokz(+!MA3!QslP?HaTj7Fby(D#xe5}g zBnS74Op|H>Pj;zt zshX(tFR~Z&(gIZJRQXTsP`W}4FACuH2EzfuK&FAARl82Ls`zw z)ufzx6*uKBPnA#dHxmaZ*!W#6s-eQY4qTrpq*A*(zpc2jL+m65yF5k{*^;mi39{&V!vAw_1*NxpNcJw=)j=Z>_CmN1=Z4ue$tz1>PJ zT_V#$%eZ6SNHEZWBRg8l)V#a`i>tXoH?}vEQZRbJajJcSLK52cX3~r^)Y?t8!S@P| zqV=cDfgLSn+PGb#s3GFeB(CgFKFT~tt&q8N1~v5|b!lVS&fb}1Otp_C(!236cfd4d zHg~YPCbi~MuJh605Ex}`&=CYi5<_j&K*M?etna}S2)4RyXt3zGHSQ>iZ#2e1aO0`o zrb`#){>QfLxg`9O07(@pi2)hK_|^{7!IRMzZB${d{MA_X54QNr{YG+X3UiqXi<_@Y`MwH+f%{QfD!sTL|%{b^BqmnVSmv8Te zoal|+R(>=99w&-!zvh8Z^#RfBUK9<%6vQu3Jk3eP)H4p%Bq;S;frH!#DU@JpVou66 zf^8Hj-|mwdCU1V*mwYqqyU=_vSQw;EW23+qauH=qzfEJt$lv6{)B0xcmdYpK4O!fK z7&fuI#sxakXDNN180Q*ko7;6;5YCfB#s~&uI}9-ay9N(2H*{Z)w5=t!O3%PC)ZWaH-U~z%}_; zbb9xBsU4ljFtrBwSWMWA!W+{Yx5ao=^fDwkGTX?91>a4pw@fsgx0>Fmo)@O^@P-uR zUu{y1$iijP|3p>L>|yRGdw^t_`YEK#DhlsgFV|s4MCGco5PeGR{p;8oiYiS{^U~2o zSQ<28aa!85G_={)6drI>bgu%4k5YluOe9rkQ~sXza--A__^=f5{?7V0Xnhj3cxT82t(hyH6oZ%hx{T%)t_|7$4Yc42~@8g>C zLikEd?UP2MhRdw`t8PP?X?ZP_@Tl^I?~-=S_wZx;V3VrGuK zE}4gQV%35wKBrj;g~#LCynNpK&P0ZZp=FU)j%V<)$Wxf=ZI% zbR%erBQI{JI)s2JxDdiJbQ2!pAl@l+CL{R{Zax%?G2%#FNzk)aMW=`LOj?gxr7^yc z`Jg7bBsEp5>as~mU~O8L4Tw+1{38TmoXS-NHw$J*Cqzbn6!UF;lq{HzznAVRu!#W8 zO|{pGs|@;{EB0K%yZ`jjf7>jx5DURd#`Ym;m2 zmbNe`<|aa6CyKtDV9NFq&0u(h*}j?}B03{8rP07Tm37hP%P1m^if+wlOVtp5o53a| zJ&V1!g*r){s~UI5LguE8_rjJi*`+YpBgm;oWi`5b`kI%tMB9&Dv$J}jdTS;lmkqGSQT+-UAF%v@|+S9faL7(9hl5p=4Rq7lCYy3=e^ zv!>_t%k3vS2-#!Y`uz^Ki00E!IXYTIXj#R=0Wf;2R&63O??@`GJu6Q-cD(Hg9t#r@ z8VMa+tsoMwV{Oy5L*LP~pn3ex=v9SUwFO!mdz^+!you)X01@gS<|P zDr`}dVMFwa`yQyM&?uC&y)(*c$ljP0-dS$V+#^Twu{~F11nBT;tqBtsKZVjUp{Ybx zVNGG+MC_!$?$$b`qQ_vWBvRO2Z0n^wPVut>Em>$GaFM&E_L3PVW+x_;r)^|JE$>Qa ztX?{!VuaTi*?P0wcq1z*Lkw0VjVuX47ac<5G{sfG8D6rgc3N2ya<9LI9hE`jtKO3% zW-SLSii2R}QXY4&C*f#F)5IO6vUJZjCzv&&EUnyXeO@zL9BX@@YDPJ$S~DT7n~NBF zTbhm7?h-?(Bc-%PDFzAi8Puo`jO+@DF&!C!rkvFkrlcsJ2jQ0mI=ely561XNKnS|0 zObYfZNJFC-R3m(_Q_amFQE*Xh?9t&!RMv9s0J0ruaqKb%3F^ye;tkT9w~DmIH)gGs z1}Ij9zVkvwdpZ8PDlaaqE9ocvBuk>zB$-uhB?%l8y4CWQt zw?tdD7xPhks>{OwN6wO{DWGhdn^L9S!tk(*Q_E&bHZ1K>}nKp7dM2B39AV<{ZZg1?{wsIC{w}}oNX59K<@Wps0LDqEZX>?X{y71j4u|ZqE zTsqEGpLv!swv zaGDu!q|^-UW%A`J#!1;SZn0&?Gr2=&qF)+xC$p7hD!8mhOtc!Mt!sgxE&y$I&tsYx zl44L#Zl--^D#Re#-xHHg$R61knV5;X9*%7HIVz|rJ@3tr9&d9#e>ck%lj%cMlP0zI z)x=cUq>D$?{c}}Lx-jjEtkP~ylQ%vqq}|Nzk5ELB?Ix+qjVU_uVHsEHM)jv{0rox^ z|AJ|##GE1&aUNtpfqGf`N9Z_lKy)L5aCXkHLh>970|$pVVPS1O&J}{^Nm%4OH@_{xDL1;VU14_qre&DurbZ1X&RxzL{0vLOs#n* zwo9w*UzRFU!-`B>V8T{a-mHF$qr=z6C@KrLs!bxlCb}kxGJ?T74us6kWxPtJNL-fr zfEkaWByo7?sCYBAE*8QiCVp~tsaUKbh7{4{D(PWT&lNvfrd#q{bvHg3aks)o_ev(Z{6 zu{riRh|PFNAlp-DZgflMc1pH`NP8}kiO3Q2L`a;)_VQw^ZHh}7zZrcri(@Loj>HmM zwQX5m&?IU1h9E_zn~*pfLv^e1m^&tc#@cQ!Z6`lL;ieWcMc2ggTc|?(hbFU}?qnd3 zmqJPHB=()dl$RBxC4$FDZLYecvW1EAZ@fug$HZc>rsQI76Yq>))RxX))uT_+;e`bw z&Uf*C)`j*ZxTq|>(OH9o$_Zj>IXa{aQ>N^BcHiQdt(8K~a;&tZTw8TwaV(`BT+(ck z!{8OhM#hsZE=+c$awNprY{(*?SWg^KNF~ik8b!5byB^N^Cca_woe|yI?gvC z!YC$fx2w0%vsNt{7*q~+}q_L%5O`^V%$KGYZ`l=28Hn|!he5odsoP^+HNJu)fc~?J79!hCLZc)e` zI0h^9CUBIEhZ(I9V5E(@hO*>Pm|Zgi#!-4ht)-ne&_avGqu>4gB1!;fXn#)j?4txorRd8El>YhrPrz{u#`!zwc1A2JA|SO?^hAWMf!?lzACI% zcPIebAgxY~wiyp;{{cx;K<-mq#pnLC{xp^8C?}+O+(}R|< zupd`iVWMJ0x!lhx$cuACo88Se2zgyik0wY_ML9|rz*v;-i@fa;daq30wWUD3RjQYL zL$JDyKo&oD4k(0A3WXf!^K{ovdJg}Q{Og_Nl8ts@NkL(~HlOqi8SXR6Yr<9fs^`ST zHNT`$3MMK9BT2p<;9cIOd4cg}!Fs^$nd^fg)V8cnUjUuBIdmaBx2f@#xM-xkQF7OU z;2Xj0wrO*lmbzZ&qC#DP4K-1}Fz8GsJa$zHc&MtwC?X-U5N!7=ZGuZxx#qtzb3_nA zNyP2LyfF{V!C09q-hO+UX#p+K$r3$6;;hXmukPuMJGrG{v`T_GGLx+7v{*$g@udb@ zWuq0fkIK_lrPd`tbHt1W7=8L-vx49ZSbJ^eM>T4g<_;7S7ddH+yei+?0RhaMXn@R1 zXiG7BSCzfasI9y-b2ZKONKr99qrRxFIE3mw7E~b!e}9KJHd4`pUHPX{+l_F$dTngo zy2)rsK{Bp!(qSjjk49_}ilVY8?FdOL+2>U!VRH$Y{*|ijTxno3QsW-Ak4QIbq^b4P z##@A=Q>D_4-`YJ^<7%CUA~JPdQiLtl>Mo;beoqkTLQR?-dDT&5O~<-2wXeV;VA+$z zt$MemIwNeRi*l({MIMJoUNp#M?IorUyT>e!s^lKl(&V)GoN+c~q8IQX>FAY=NoGM5 zkEPKw)lKOKZ+;dcvw-Vlqb0I1)Yy2h09J7_OB_6MXQlI>D#z!E3@7g{cP2|?qs^^N zu?r~^i^moe1|2pHK?~w6ce3V2Em+WfB9Bu#Y`NeR5`|DwAQ|axFeV7tV_18dtEVHD zEtZ^*KrFs&HPl1-`-rwFh1L>V_(--dZmTjC(8lMN0BhunZ7KFKjDvr4SBXV@drA*7 z#Mboi&Sm=qZ>I!&ke3SbX<}iZ#bIVd3ey>}mwkAbnx6F5Va*82JM+CrY3Wu%Kz_-K zcunkTGoRA7cKg(>GIC!JNlAkm(IPj8xnA%AJ^9|uy?h+BUT?kEHhQsQnEYwnRVO2W z3cyd70O|QLS<7~fr#I3-!Qk1)fNi>y72dY>Dzs!XV*ze45zDo4qiVL>lqNY}c#KNR zY_?azN${k}&Cc@j2x^3$G&fkcae4W&aNtB&(z%dP8QqY~g#D44I@kyo_glqspnGug z6oN_Z!^Pqt+sEBf1C}US%ZbV~6PfuY*|>_sirdjjE<^`oL2ryPkx_&jUy9bE66uOF zdMq<~Pg$9^jnzKeo2}XBOYZbT%ECT}Op^-F_lF+ZtS;a9ZRL1`-AL>7^(ji(>o6{6 zyG*2%n?D#kGkrS%BAsw|1sXv z9N!XTUyh137dhTo+a*MzVYlL}Upw_iXQz%e z&|RBs(hwj2krL~ay={G^2Fuk6`?WJw1{Y|S+q^%S-2p9Mj&`wazq6d!ZVIOc)m{6S`4B zpd9^=lizSRtor(JxUhzAXRACj<2hfOfQN^cWC|t0Sa^#BO3WwBDWg-!8-r93x-d(L zb!G)qZ09YH1;OC8aM>=T=x=q*D2G+l5-+q3{hMFqgmbEE)hByxfG9rovaJ}&SZ?rJ zeNAm7eR5?M*z-x0VPXo~(Ya_IY><7~L*EJCbJ1ZuVjn&+UX0>1aLqO(d~jTBEcTXV zg0VCl_Q~;yiYla!zM~Z%Uc4gtR+oGq&p>Fe4WV3(sLR+t>kdmnbvo8>@Md_pSvi3CA}k~7R`#8YwfSo)Aw|nH@!1x@DocRQ!7AyK@r#{45H$$ zeRk@@oS9f=B?c{J>>)C`wd058*4ek%P2O4-`6N25`^m&g4Ff1plp4`|UFZ42&}xl9 zPC;qA=CtA=?_s;NZfWfe0V0A$6U0K9&UPn}R>mM@KHDpP-kp|ZyMRpEnvLT0L~l{f zUc!mXV4P=<8!Sk880fmj4ju-&LqB&kKFI4y?&S0){=bX!tNrq|iM4;S3=DfxTC!%#jka+q*h9zmlFQ3FY*#`vHBBM{pt#a?G*hisGjHS9jg3!azLp7a z40X0!z>&;yh;U+3gsxF8ztBI^uIefY;iED$DRWk>?@mx)K`X|l<)qO?Z#Ec%S6<3IsGWzsoSQ8Nnf`p z^+v_=Izu~c+~fzusJF_u^$vWcr12q`K`D*oVUz>EI;ABo{s?v`(A^}tK{?mYq~9o= zS$yZDakVX*z-A06*2LL2PGo$Kk#CSjWY}2gY#KzqG|MHo&!#g@^!BwI4GDR!qd<4C{D5`gp z5=JGw2v!4VkI^Zx0AZN3943C0$XKjF3rz~YifAt3QrZbGhTnmjcz!zsJDJ0`s?ufpl3-8x zl3==wkCXFpP`=1FJLQwlET1**uttcN0>Q&zt3BFnE<3O1nUQSt5nivWbQiI}Mv$5GD% zFLZ94$hOzTWp0$#g>6Oz2GyQvw9a+5p`N>=?K}X)l{BbwSOFt`_`K zdh;bjN3%dLie=7m2LzBG$UyA5C<$K$Yi2I%l+?Z43L7+&s9b)tUh8#-G*x7cvye}c zhta(i=Km17>eh3T%v*0V{bJWvGtVFvh7~b~3fVWsN-jd_xz2)C4_p9MVAF}R7b6Qa zxqT6nDGMI3Qp|cK+tGE;n7Uoxl9ZHC^fVw z2q@Re;%2ZihkY;XgGuoe?1R`7RuNCSE|3lm3LSp`V{7tj7$rUdP-52-GiFV8LDV>) zsGvC6$h9x$Y9z%Jj$7g^`aIAjtCG4uk}?9h*vF+h#QxHV!k={ztyFDjU0D)qptv50etCN^kL z5nFDx`l`E;)M3Vfdo6`yjf)OTHi$C(sKkOwvN9|TnazV*Nn-?7g>m~31&8?!6LbG1 z^933@t zuUrNpwZxAsN#l-8Q)ub@Gjab7Fr)eF}?3%dojzG!-wi)kImbaZ@pq4_43y9oc{f^lc!hPZF>8 z(h`_R23>9P!7KMR`ge?mDg4PQ5wDrAZd@Jq$&|?%>o2<%owWY#_~q9b$=?Ur-^+1p z<9gg}2u{o_c&{+E*xuQND299!I4IUDN2SR3SqsCmzHf|+sm0Top(B81Hs5<9eijqM zpOcs8B4-M%R32V9PQ)Lvz@ULNra4Wm6QYrKj%5a$=y93hE(S(QUQan-BQAtB5gE}W zX~dW9QW9TTT%VucDt(we_3q=Z*G`eb0-N^hPdTO6>x8s8Bn_y?o7Q%w^mh13 zOT*2@n56hay1MecL=GPWMOj%s3rb**kSoJP_oLFJqMyDCcy`|UHti@MvYNPu6&ERa7 z)8mJCW~bpgtLy%Waa&xU!Z+aZeExQkioSj1K?$?%*2nDmkd8O}Yh$@Is>gBS}l zT$4#uv8Q3NnGQ>JNL)g!j5B>AH2O@HioNv%THVyRx$*JFhkTx^y({v7J%|_^7A#W6 z;#Qa0cS%QlW1U(k&o9%c*Fdss8aJxk=V;MAq2sb_p-eRzld9J!a@%&DN-rsFN-RjEZcpJhg)vxq>f`>-h23aWEKGMH zeHgD8`C;(PbtxF#VxlKG+qglUr1Lh<&e#LF^f9GUvt&ipF3v_@6?{6*)LQuOu8`0| z=9pMY(eUgn&K*skwunv}s~cv(-8R(^^9<)#E7BNB10SL!ZrlqOOpr+$vKl>Gx!eTT zDBEVnJ*n=sL6Pk+i($@!)g#xv{hGpUP!t!6yK;C7bC)>Y5G`i}TaC!#i#HWY-NlNd z1@rYW)xac9f-HYI-mQ^9pcR9)QIgNzKJd|0jOYlfxl2Q)Ccckc*zWEBp-(LjgnP?b zprk`tFq9)qT{C_q6 znO%rQ?(O`UeuW8GnDkmyBruaPacRC=5@DC#Oc*pZyO2?rpq5rSNl+Z@!gFhXV8NcfpaaA>&R|HLH-sxq9IODu$~DV18j8#+SaI=_Es45| zT`O%ZZ7ow)S7Rb=pzw+9WQ6b5Rai?mCO#_!Z1r6s*Yhg)Zhf5r(3wjDbDEDzaHv0&yb0jHgW?OL1QjwM~0W z%*ypyaIhd2NWOfN!Us_B!^KHWd_(;Vwz=t2jtVA(7o<~u1x+UZh38&GWj#&ZF6^H_ z7=`Z<6g?eBSg26c@=ZB~*LFyiw7ieP2J#OJt(Xnequm-D3%!))PK{l1w7Df?Cw-y^ ze9Uh|g}Z+v_Oen6K8g>x&Hi?f3BpJdW)6l7OY|{|@q}np=zoFk!CYmIWzuL{W}!%p z3rqRb=f4U8!Kqh~g}UZrRTPN1UfW{sfEvVQ*5k99->SwaC1HWa4vhyt0?g;^2EUy& z?vxKnr)(}2R z$qhxAsF&8O(q{V^#xpl0xwG#@*}Op#7&Mr|4ut^=cBfQ{csg{u5a5>(t8X;h=H6-d zhB}kZ8@Lh~Zi@L>?d^S18OQkM_Y^atM9k@pd|YaJn=&TsXiL2|w(VrRt$Xc6GyQ6o zr=$6CqKglh&=8fym|J{8B1>(|NHx<@?Ds(#9}VrJ#3r=jcn6cd+t?LW7>;5!B?F$N zk*gz(si}#-76h&|!iAPJ&)eY7HiFPxt4a)(+};{i7A4M*1m_`V{I-P#N)>k183VSc z_@>H>tq;n&AR?LLEf#OeshQ)Ss@ZPR%-T>fm9rnOsd{>+#Q{cFK8A$K28HG7yG)R! z4eXxsb{HO;2)FEz3qv7)r9-Ueq}7L=cBZW@(lkwxWY`#_;%kH;} zx7t-_Wd+?OJ4gi?vxj#U${i^`TTha94S@7GT=4S*oS+>l`jmdCS|7cyCHd)U* zI~b)ptoQtfD#*O3P^|i12%>5(vcpCz1W5~7o0Dq7qgFIiNA;i^WCShv8a84<4pQ2q z2{xH=^TCASk6&ZKR?8>WGiq|rY~#$WnXoWG)>IrCxe)4l@n-bUjpv)xCu3Dt|tUNKjhK@P3#m+pTsR&UuEln7-qPA1Pm2JeK}8jVa&!fg#khgm~`Gf)cV*O<-_7q?wR;FF@8 zYlAG$jP`9FIIrpppYA;3A4!Gswp8nG=}EQhoiEv96NXxJv8EA_)_yn4RW`F{%{>sP zyIZ>)uM>MIYSt_WyiTTnpx(QIHr2=a`&c$&VQAa<2qGgZ;(TctWe0sd3w}hxXeE}w zc%?IeCaF4nVC+v+b4Oi5uOjzykTF^UQq+p*)7!b+Dw9NRq}8-3d>c#whm7WN?B?6nlzc*Fr=r z=X~Q=seM$KRIg-;|KXh$tr+~0rohPrl^-HaCLL$;Pw@8;_!^}aKFq0J8kd%=Xq)-H zD4^Cvs)W%r?^wiW-AQ(PC!SVOVVz8E^ChyN@gcLh2KU+LH|&!f7TXG~R46gLpgWr2 zwrxfB3M(7XSDNJtr)#0LD!OT-dt+DIt?mlRP0*oYeP&+hm05eM%)5y8z^Biwyq0j* zE^2B>Tfmqd^L269ES z0+rN@4r>(2y7>gGwD|J=bCUV|$bx3NQ}DLW(RpDfGiPXrxPpb9x#9xqrXJi-&9%6| zyvvxB{4MHw@%gi-re3BkIR(U5oxY=Bm39^!5&IDonu?fG Zx7FZIQYf2X-pt+=C~c96Ag?Y;{y(RX)xrP( literal 0 HcmV?d00001 diff --git a/ld/po/da.gmo b/ld/po/da.gmo new file mode 100644 index 0000000000000000000000000000000000000000..f54a23fbd79c89baa43d73593043bb8ff1b47b2c GIT binary patch literal 34929 zcmchf3wT^tb?*<&TLcIMl8}((#ED{?cw{>d;wZMUY|FM{*)kg0aT07fI-sjAj zhh(MS{jR?3{O6prpKGtZ*4k_Do&~Z2Ur1b0{;*k27dvnKie;N^}GR8 zzHfp1z?D}7!6xu1sQx?%-Uy!39|YUL=YnegUT_!q1#k$w;7T{HTS4W!9~6E55u{7O z=_`ZaY2YgGT<}IP1jj&qp9jwae;tHm!Tq2}{%QaGb?`c#e-3KAYga*2a0a{({4MZm z@L`al1pf%qwcx3%9bOMIl;Czyzhm$k@P1I`zX7Vfe*-nIYnap!+zIOY3@AFj0@V0_7Zjg-9UKII=)dQv6jB7c zLDjPWs@xku_2&a1tQ341q)71ZpvJWh;s|dBHU5`?YWM9Rqze87RKLFuD&G}6To3LB zMW1`YVeo!X^!_K0XVY1l2v&pVg13YE{z6dwdJQN(d>;sl1fK*ULGS|*5(X=1&NSA}YO>SLn12un#K+*jbpvL_GsCFL()!zA=9bLA8 zT5kpLS>UgL>gPK^jrUVv2tEQ{2>u*A4}3a{QTeU{F97#~XMiQ}RImn${tfVA@U5WA zKLl!AUj+NW)3&&AodaIN^A->h5*z|g178KI{?~yje?KUG`y{A!^dsKIHKcP~-bKDEWKw9>*_x zLG|+~DJpK&4^$D!WF_(XSpQj6`e!UY^J%0+S+_yodIC#SIur0uwz}JJH0FQzP z#*rc57r-sx-n_GqUJJg7=Tj!IVZgV6OjYp0{qFlmz&g+C4!C;X32xx|qMMzbm;lx8 zeIP6m9P`g>4>~*XD0mm|KLR$v>u+)T=>hOXJpT~f1Xgc#^}G+%^G`sQaB$6SuHOqF zBneJ{ER|sA^Ml~U;A_Dx;Mupk`P~DGK2`7n@Ylg}!1sch*N^z`e+Qn=^O-Mjd=rAt z;CYjO&Vw6xo(FFP@AuEg{P#-^x$ifEYOeuGe!T@$J0JG%zYS^}XWZfFxd&9gJ`Sqf zSHVlbUx3dBFD^KFw+qxdYl3=zpMU;SaERycgKBTxq?3DjQ1!kP)H-+zcp>;9@G|f( z!4Ui*D0-Yb<>bf};1-^*1+N90pvL_kQ0w#Cpvs?Jbb5WjV+2Zn-v_Fnf9dgO;8i?d z61nzn0!6=BQ19OjYCK;8OW-fSXM)qyuAX~9$?tcA%J)@JpPx<#h0$1{U!HlbC3%HTzS@1gW_rNQ`Z-O^~r}2iI0kOvc@`A?-{;?d2Gl$p11|-GStl<;@Yy_$f$Ha7pxS*0xC;C; za1i`wQ2kv~adepkMfW#?djA=47x*9G<>0P4S5F00e}5f3Px(N#|1B^CgR1M-WuW@8 z5tLn40>uY!2E`|z1vMYv0M)N^YL4DFfLbrl2bI4LUJt(8KR*iYe?NT<}>hbp2ZghCJ^C#cwm9+IKIO25tdg1&Ypp z0bULM(qT7_>%i4K9{^SU9&io#cJMs#bN>C`f#Tm&k2tgMxWQ2bj2bKt$;Y2f=o@#RCH%6}2u0Dcb?efk%i ze0(0LewV?Ez&C;F&j &BNeR!DFEK{%4@p&C~C4?OhFOymx@2&k<1dyvM))G${If z1Jro_9o!6F`Xblw7l7jHyFvBiw?WPK=l%Pif@kr3;fsUd$>0^B*3mVf^4$Vn5B@T! z`u`Xd9lr)@9FKzP|98Ms!JmT~*DpY|xB6~BkD$#XC_23zRJ&gRH6Pyw)o$NQyj%uF z$2_R^UkZxf9s+L!kP15BL=DS3vdqjiAQ; zZm`&WdS@Lycc{D_$u%c@Gan4@F7tB_zw6i@RXN148f4+O`yj0 z0#N1Wz!l(&K&`*u1kVLO2Wp=F22?+ve6N$6mx7ylz7@P2d@HDNeH7HZeA(j@{)_8> z4%EDF0#)w}sCjrXsD8g0)Oa2QPXRv)D&NP!3&1af%Kv?jXZ?z6?+Wm_yx$0_KQ9JX zf*%G&$8US=d%5f9dQfs_Kez>a6}STY3sB|052`=sy}~_T2WtLq2gO%4P<(I{JR7_h zJOg|kcp3N>P~{&6#V23!&p!f{|7ovu>-ADl^Zy)B^D_ZH0o31+gW$J8t?lIR5;FX+ z0ndjg1zn>0XmsG}Y@w5IAJ@)q_kD_PtcP05(`G*Q95O@G&de+K@5^hEz|#N!^` zok^M?{SHa=I@^DHF8E)0{tHs}?<(G}CyD0z6Oa4>>3rUm!OOtp@Avqzf@jUg-}{${ zr{Mjh8tHFHtNFf*G|TUIlKzUcm2?sBz6~BG{VNIa9Q5&SBk9fj{-31pkp_9z-x|_S zNxx4zo%B}HI=;OJ)Zc%QR{Fe81#jZ{cS!^O9Y2G2kbXwGl=MryU**3&3H%iAP9r6M zf5MNQq#u(0owS~Gh;%b)n)Ht({cR-u1L==REScbckbaf)holYE`zr7ulK!M;{)JQ_ z{SxU)lK$RHD%vmP6!>$}zxn5F)bTXZ?L0U9yHA2&Bz=W6%s2h5BYl+g3DSQj{WsD} zN%~tuo|n0w0n5quTYCHr(i`+6^Y=!6-$%NfG)j7uR3LqU^cIr-RyeT#{}ccJ8tD=L zuFvC*w0V~An_fMGbb|C42~lKwLBReV;Qt@-zh4eMleCqxw}IDydGNcWTSzY;eTk&M zoUi|z?$OQ%e&K%)dVCn%NxtWip5ya>*?$u}gLgxuJN>)wgJ<&meDF_6yZJp1-c8cq zA2~1?yVC!DA1E1bf8^iAj}88D3wQ{hjY1crx#9<#(NQ zoD`C7;@yMb8A|+q0_l3v-}2lf>2D9uF?cQMGo&p%e-_*f>hJZWKeu1l-X32Bev5P( zc@Bb?gUF-ML!`}m$={D11UvZtfBf(B_s{mA@%oZlCd zSATCJ{e*OkbdG;_55F(v_YGkB*EdwD)TRoJah%hlPa9>!Dk@_ZvKREyzUG*_!HgmZ;?ec$7rw$-ZBN)&F?PyO25R@u&|8qu>TEQHDsTHfheJ*-DY5sfw6J~|2^)H8@P zUufjYbMuw*WLri4VOu>?ZIgwm*&~H|QPiYBS+!6|ou*)XV_&bbJ>E^Z>JA;E@S%tGIL$e73snwdzU{ zr8*lPg6G0U%`lz8Vx^MJ-u+wL)EbV;H)f*Hk15ntwx%ztE={R$2pY{XUt+z5u!~r& z>bm>U^G&l_iC8?%SnFgynkrA1qd2TpBS&lBpXg|#UdYWyxneZgEM+Siwho7fqxz(# z&3%W%=V9_AGf_31Y?doUmhEyG3UY|nTIf(plnGZw@%(_}4mX{i5q#$sow-o!zjM-T zEouqE{Z(4=>n1unRcRKZoS0uLV2#qiz(6|IVV6PQ>V>+9WQ-)9wfP7mTk@W4zBVtT zBnQ?gr4=T%B^j2iOB{}vspOK}X{YQ*J4?83gk%p(mD*&X5_>wjo=JR2WRxGs=6hssb;a1cT5gmJl~A>YwP|B?6?9c(mi|U0XdT9DmvyQl zZWNF~{&P}CbTpc3HcYGsl5(?U3EplYo%UuN$$mJJn03?Ss1g+uiR?NwSGcoQ_Yw&X zjuHRi#%gnJGOD|dsYA&J_kOV+xvFY$F3H|j5B*YAbLDDzt~rP3eqpm*r#EByr21@! z;^t($5F@O*D_g9Vv`9yN@DlJW1(7IIw+qM@#=oh)cLNB&1wraWo|pV)6B54DK?q zLj5B2WgBSZr52c#&8#bU$*naN^mQbR0~Z(OqRqDrZuIQ9`F2|xsw2yM=`@75U72vs z?MYqpCUPKpI6WM0yPz1B0=v7GU^5wcKT5b)E8J1)Y zaaCW~w9(1HZn>f9uq@$xjV?*(O=1eFC{#7$ZL=Gh1b?pB#6ZHJjB-viWG%Rx$q*JM zr6kg9UcAR<()f``#jGPtU5^2@`Y17<9fWG_*@?Ce zhP~+mk2K2j7}%bAzV43U%uB4*nsJh=cU|p6%QU!cFx*zCYFbOuqF%^M)mWX?MjYm{ z_7luJ6&X{~2MQj>ps{_#O3m9;K?X02$Lw(@G^64`xUUjv17gf*7Hn;*DI>!8-we-6 zaV0IWQnN;^+2^uyi&3Lcu4ozbZxW6Du~lE88rCN7gm(0CNB_RTaB{kMXr>U)9IDi6 zv+N5xs>|ju^W>0te34xBXsT8(9-5yi)_dfD>gvIKRM*N2_YEU9wDFVVz#gZ2ReR}7 zYoox*{;exTP3tMctw!m*clQ%ILloP_bbmA%uJ5c^W~x69`-@4%-vYBJedvvV=KzW;!V)j<)9>q*U8r_#s%FSBZt&_F2PwFhU1Gme9 zks8^;hO?M%#d7gX0dtsMxt!C>&RI9FiZ9<)s!@Ymk@IQAt{v-xH%nTrioZ2;5pE(| z27_YxL*v7vW7`gGn;091$X$hYn0V3jdPj(a1%kGK3UODd?o!)mTwpRy-j1aIF$x93m98Y zHFkfFr8l#?&rB0q?8xJ)2~hgrU5X}#`xB!qX)4W(o6%WYi)V5Bk0o-|BQ1GED%>s0 z%*n>2Yo&S(tpv-mnkFN70aYg5T|%g>%H?LF3O!)HnlWBC$sg-uDuC)G)8OJGXQYNJ zayd^R9GvXLS9F${iH?STqo`%S#AmgO8k;ZF*^5XNuk4Y3iK<$glg7e)1kZQ26)#|X z9F=67t`y|Raig0nBO%cw=&E#dxw*x@u8M6Loox76_T{RaTAK2-sbu!dR@SQYTD&!B zi8z+OjyY-#0(;O|Q)VAw{m1MkOGz(d{B6}zgpsQ8P1`bGoS0rM)4o`58qJr=(nQ00 zG0{QEW>rRs+XIBTLc#>uiS5V|Yu)$Ehj^1!=$X#bGvz%Sg?1Fk3_nOMie&Z96=so+ zW_lTgGpjS3O-s~Fwg!v1S&zE2VYx20j#ZI~XA>1I*=5~1NL6uItVNE7UVgewm%eBq zs@P8;*|(RcO}RpiR=>SCHY0w%W^A}vDUb}v)c%%=a!$DZVn^52ak=BQLQEjqlnhF29Kow*9Hia6JF`f)F0HMRG5=sVY?h*o zY}I6f@D9JelaEL0cqqC*-jS0sw~I``9XV8_PHXPSaev1!P=&1vAkqUTa^xTriJ*4 zMY;yVw-Q+cEf1&JVB*O^%*#xl5^KzO^5hImj z$vcK=;6`mqb=;&j&2E1@WyPf|Wh>leOk_se+T>av3e^R_xx!sP1GkwUMvA@6zECGL z-fibMS6RY2H$NL5HVO6SRKw=q3~V}{4|k1@hHQ{94aB(lFn>#abcD@s`s(IzmHF$v z{a`|YvCCRGDDOZI8IZU~k}UJ}+Dv(p^EDiQb{Ly(Je>O-E`^fDhRJ$3sL3y|xmlQ# z(<7O}Mgd2Q+X}NwfYB$-Kj8d|vgNZm#gbM}YNBRLPBwZ7dd?usv(dKawKBBgm4z&S zKj+B~*LoYT^pe5lS7m7N+ElyEn|@r}lC>;tuEb;)cZacgH64_6eM?Jrl*`gc1(VVH z-Ab#09`ZHGo7f}Pu-kw#X$+T{z!h5N*a1`1d=%Lxn(mm7e8#RxPl^#XF%G_|g+yvu zms`2bW|l-MMlox`xr#J1wfU14iEGU|r}<0gHgD8G;=@fwm$Q72YV1*58oC2YNw zXif&wO?U08lj^V>y)uzDcsUafY&Fe64!xxBeRJlKB$DaPeG6>NN>HncJ)Sk*o3pnH(@}kGe{{ z=Hc+cePiPj&PZTeCg&2JVx9La=X1DSf8$7bN|swuD%;wKTW#ol4oTuIFQ$m|b&V`* z+3Xu0=`;gHB|4CyVe7Vpsjl{q-f)LpAp+6r_9s2U8lOf$} zx3coKb<4d96BD?CUdIbJsD>6t#W+0nu{?*jYhpZ*=$6VZXPXjEe5qpCT;!9d^RUf zVl8|AHR&8|l^*tbEL9!YTU`0!nnSQvcL<451=Dw`O6Ba6z1V>uP0Uq+p@Qi{F#`k(d2y0P&9%x z+uSV~9Hfp0eyY;JVd6^asC7Bd#Af$ZjV~=qq zAI&H)l(2_6j%b@6?sz1b=A|>tat$RR7I}?)bQhUyH{0OS3{tF6tW{xQ#?&apvtfnF zb#8d(lDD!!xPs(piV@gGGyi=q!t0Ktko(~_@4OCQ9MJ~XT5 zV)gu->nMHqdXWkJ!ihAz%)UOW$GR56vFzOl2;n$ zG?~yJFE3Z$^0FBR+iuIBGE>f7uM-m%7hu!!RLX`sMn;DN{crEk9)2J@os!bFZHHE) z{=W>7w4)~Dg9VehYbc?KRqB|n7`QAYcR^471f;AHz^qk_5>`@knhRw?dIdpePesX5 zxBCxvN&Y(HzhpMDe0_BtNL9mubZE|F8H_lSJwc<(Xt~-v+Oe*EKDY7@j9bG_q%Snhw%0t&`WV4p9b_;vcJu+|!fB1xl%60LFIHvF5mEFv zHCbr3>YSJ%1G28jeHd+B7S@C@Vn;U!bIxDAI@mpY%gtls+k@RvG|y2O_ui6{71^ui zKCx+MUt_aA8dXauKWH->F1obs>twmaaium{UN6P26!NjbMX8QYd+AxQx0W>D7mRU; zI%jt>TH@PYvKPZT7^{~{V*j;h&5linUc26-BFH-w?6t98v8Y zAKDY_3FCpx$N{vlEd9^HRrD#zCo_?RP4Wc7oB{>{!L;H%dTyiJ((_b z1$!#qS*Dfqm6LI$k9$W@>5`vD39KIi}HaU&3pTcr|sK3l;CF ztsrScFC;f522*|)tP$i#ZXFJsRp4P0W~?kK3Awz}nX*(86`Sx=9(&2tUW{pn-(Kwa zF~RAGTk2@Lx;8M0>E$JG*EeTs`la1j(3Hm_C8d_R$d)ZBW6irnt(|o8>?!qBsic{L z?N*2y*EpO-+NJ~LV@yp6t1N4%s6KmH=d4xM>`BVDIYfedTQ3ko_+e@llUlp>t=)gH zLoDTWsl(K-^K43LU?pEd6yt@psYcX@gS<{vu(_Nzbx)=*T1U941uOxY@GG|UyoqEl`>057?7}TV zhJ$l6+GxPtw}M4dF3@%)?`*t@q4Ax=6Tw8ifOa!wr4487U&yWBb~M?0GI4!yf{ z&1n4xEip3MYnHPs)bqM;R~hdZ^rh@_v%mB&smASp^miFUY-H`2)oa?u%Pa;b7X|9q zEo;kgq+XckCPsRd%Iyd|b#881QLVjkyU`F>9+RPu-h+ zx7qNYPonhuf}3&vYj2Tgso=Ivwq9=MhZoQGlcizkwiktlwhy*DHAe_clpOc=_!Kv% zrlJUQsxNRiG5u~jRWgJ9&0xy8PRwuBer($pNPf6ct2Ieg7b;>4LyE-heX!)+X-u02 z8}wgO@!IiqU%jTQM7fb-?tr^oJQ%W#y?Ws4bpto7>vL)=wc=fvV>vHSY=hj^pu3tZR&9ztYypD{y zaete)m5)s8bL-cI>&Um>HOy|Y|L00|1W!~QD9&!~+cUCfxHahY1MB*>Id?{G z0^br25GcBqJz%+dBQXqxdK@)2mE&4&!-nf_$gOW>Ru4I3%MG*JP!PdjxB=e~5jsOy zqSz8zmd80*Ma$YW>Z(WI?)pM8PGu-oR#Z_?&**VkAMvck0@X_4Omi0FUKcJ|XFkua z*1OrxprD;LzP88$zwYX|^ywi3RR1uN2jm6+1M>RRnGq6iUq^w8O!a2^*T^ce&Pxpz*SUhZuRy zs;rgbV_|y?5xPQsN;HMvL!enYVuubKuW%$b%kl9f$Cpvj+_0*rFnEzR2AvR+6i+g4`rhfI&##=U58i`dyU?V^%k0sVL! zVM)iC$`;8GIIUg8<6x#N1GQiL?4GO8CaX2nZ2L0Md|iuEsqKr_4iObNIK#<$lWW5A znu!sRRp{_~_*m8Pknh&wK}=gI&KjIPQRhy6I33+tiBE7Tg5aQL(aiM2sF=347k`*s zu##Z`{~i3uW`c=QU0BzZ$2r1P<@h)^+)`%t5qfN*wKRI#L)nfQi*#~_lQo4RcYb5K z=c~#_KWQbevHzvvO5uJEs@dPAi=1P)P-RZE1%)(D)DgmQCh{uJY9!m8I7cGw`dvXE zbk&``)v^lO#d_R|ags5dKZYfNzVj=fJ@QH?0-2_*E>&apX2A{&SV~%uQcJTZOjEcH zoiy-j$DLS8KJKazMvk5=O)fGd6X|MNEcOa#r;oj&N8UXUbFk0*-d*Y$d6m|};54*K z0dE!d=xqJ?VN}>yK8ZWZb|$?ukbJaYFsmwCNA*Mz2Ysf9epJ5c zMMAXF5vXY^orFDQsIlA*bj>4jlfbZ!V6L>uMTwSlA=~x;UsP*vn>~6q>Z{X0YMDqb zejycHuIFxtpGJKxUK;*a)R(R(8TTRGbpd|Kh_7T3`dV#eVHRj#-Lbq`a2E5`QKGfD z9rLy=>(*K?^osgATxd>ZeoF<};Nk2t!o?n6J(;^iiv*296|4tt%9i4JWF_7iQ_+RSa!GRdIHm`NrUvjh zL(GPxe?tP%i%t9>ja(`y&H5Z>4{urknTM~_Eq}NG3c5Hm6a@5>f5)=L{s>LRkFLV1 z5{6be9-9&4MS7UVn^ko$UN`I_1!`EZ*=&<*M$UYqn4)}agQbSp9=2l6I`bt$J;_7V znLH)N?sRcQ|HO(+*qJxb=)A7kH(G_<`4b(|D&xV0ojEHdst_&Yc6rca<}qF8Crqg8 zW7%5M9O|xLEPny64~`aeHporHB=T(81>L&yZ7;9U<1|`NtWwwM&VugrNE@jhLuvJu zYUsP@myXC)-n-VezT%?mRrxgB0)ZVV9kn_;2lb=UG3F-C*SjijcXv(;x5ajIlwwx+ z^f6pFEHQjqPWZu*_z4L^5I=Lz3-%~yY)Eh1(xXg7n&Y5wHmTG{qhY~hN)Cjh$8~pi zwiS*>-LhX!9*|bSUSYXdMB0f~L|SWlEN1K^T%QJ|_2zH;T$qk4O}Im(tu)<^fP>e{ z0*e-I^-IA=s1+;GoJFYNx|?M$!_6PR&*Z1uWzy%K5o*2a)a}jIw77J8LQ!#2L!;B|*zi(LNwyw_-vgVmXw^O@Fp$mdpswEq#Me;g7 zoNeFaeAa=lYo}RSz>`&KD4r)bcdWvyiWS#jo$w#+U?D!D(u=jG^jgnkXJ;lZ0P$^QnssNtRg)5P|vmO57L~S<`ln4 z)g;3Xd=yYe49$E=sPu?d(~hG@**&eLX55I7HZL5EpzsLi4D}rukx9X9!%!C|cy0aVpuGWrCVi0QT5~sPm7z$?SS)t`N){)d-DwA`mEm@hu zr!YblV8MA7*QU7JB}<^iZ2qtzbUGDLzyy*-iQu;d>?3l(RNF88Cs9EtvYIY?dH4W`OI~ zG}|C;6r{0|+P#Qzm34;9dGS*)(bGQl$tMev>;7)?)04D=H@Q5QcHQ?vYbd2zvhLVOjhLb7VDc~ zIvts}V&+m_OkV5yekS6s`@0n{d%E_hH{r}Amd++gHvc3ixR6mqfPv7acXo!|og^!q z;8=|lcWE$*4tArq($|F3@=;U2w1xL>+g_zbUo0M3uB}+ZnVQ`J(LHdaOmg^%--rIG zoBq5=izR8;c}5Tr?BElbD)WcMWO@>1>L%Pvo0c~xX&w5QbSE;;NfybDRN}NeAdDz; za=@SzZP(#&rqvaLDDarm&TQBF4s^jzI z=zxf*V?G#G@${N>ovuM&&da-n$XiHj-Nmi~d`6^JLli)?z9 z22#xXfn&=n&2JT@=5@warhDyONmf7)gWD=e*~MwIt@-Wx=Lqb8-f3<(hIoaSAy&x3 z{Wz^7LNBANI&+-FFt?hDwMlM-q#IWW21H6S-gaHxRv^jZ$ma!$<U2 zPiYo`!&pskY0S2<#sJmDXY73B^Zd-=Vj>i*rIdD#t&=Vlre}_GFkYHr{<0lQvzrMI z=hza^jMe7LEQqD^av)fY$3HpY$DA;c7kDwD1>Eki zJ}fx_E?O@k95;%>$z#xlUeREuADk*_K6C#klczRUr=WEskKC=Ch-GGSHflF^Tt^o7 zP#oNyI4X^p3gffr_No`<{`NFW%T+knZeq1X}ELkeen48XI_k@LnDVdD){#q18Oow)Tce~J* z^%Xl4E6J?=OiL0Io5w^@M@vU{oVfT19t}#nA0cj40m%cX>@F-EzZ>BjWJggkIP-tAp|+w zm8uk6x(cBg$8_#EOcm+sN4L@;MiAdLd?9BwMv(#p#W2)_xvY>OGh9(=wsx{1g2=Am z7O4=Zt^*TE9hb`#gGK$Dt)6TS$e)Q3)bW)6hpq7O*Vs8Wf~^ZBf5VnjemNeUCXRFd zj;+*kVtCbqp}mkL*v*#HU$8bSt|bS$J~b0566|*O)GNBi=dCP%z~;u`V+CcDGqTpb zvS3H{rlLRNZSh!g=nF--PdH}R;vl98{&eD!_bh~D%Z=^M-MJb530Jqrft1K&U6*i~ zMc%Z$xZJH6&lf@7YgNw?HWNNt5dW>a+_% z9dk2+H7l{>hvRCpzG_TSVArVZtwfh5M0X9-+m05{lw1R}+hWnQh;Cb3okZ48o?}g@ z{jRmarXAJJ#-vGP@bQ>Sn!$eEOiM+A)>m!5gjHH)yIE*DQd(JO!SO6 zogWZD2&)`N6W68W6h`ROXFYItcr15Q6UungkJ(unvO{dkr$cJ|T6WKeRg}7eEQoM; zd}Qy=AkXoa6tde&2a^3EE&wXm25K_mZhO&ALY&wz$?bC0=HmvGUpyNzeX8xG`HZ{m zm`Hndod*xME_~^hmy5WgS1Ge9lu&8!(1E?d9`8AKMzD`4Y!4_jzFAy|O<0tiKQ>Jl zgbX{xt=%U`RDUrFTxK>Uh*i^zUZ6@9%k;xL!}S!x41=A@BOZi=(VaF6S@%e=>#)o^ zso~HW>!zJz1SgWz0uE)_W03if!^9x-p@vBH)-NMsyJ)aI!Kfk;Po6DLKw?L(yn+xr zrOk*b6vkvCr0r(y^ofccdHBQ8x{pE>8{5BKDMo>uw(~c|*YAT6+0!ZX!yO`H>)6WH zLQ7|2l?l>Ww11^mTBExvifV$p(_qBCkL(;BRy5*Pvtw)b>R2pW z%~LKm@_MDm9xX7@8_6@C+4eX)EEP#X{*j%-Nc}WGQH5*~pl{5w@LGnxScNEJW};D^ zb(%h7ic8*DmYF+`^KaKdc{x4oO|p^6$z7FNT3OF&TeeJhAs}v~%uxmtM5tm80SHTU zeYF=pP(W)fX*gS>laW2dBhndNjNcS}MQmc~!=9Fe(n80??08!?D%eifmb7xY$ckD1 z;Z*`E6wqiwn}9}zD-H+SheyR-L4M+qasGu$-Xw8i_KzNH+P{5b{FdE8{sfdVZPZd& z9D^r(ndb^r64xju*DkIl0v*A4>D;Rkp=IPxE)y|Mg*T>>qVt+ z*$l$9%c%ekuQxocFtQd9$Ih4D)!t(A)M6lsMmD|FwjFUoO75!YYY^91zx-H|7uGabc~3Y(-MoHZR* z5nEH;ku-(uJgjXSyQrSo*f9m>?BZXZX%%t@!OluTC?rf=4Ufxv8Mp0I(~G&;3fz`= z=e`_#-sI; zXjCF7Z3((iN>dCjgwpE*_n tyo~Mx%ZGl-iQ+sJo)Bu83GU2eNv5k#=y^Jl{YI(=DEXy8Aqs2%XSu^s25OU8<�}L?x7bg z#w374*ug-6uw%Ahzz{G7Y(iMZA((v!vqJ)b5JK2rmc0Bv-*c+&z1`C@8j;^0?>x_) zZ{K@sJ$35TsZ&+we*4G=z9ixA-|v?sCxF9;CCT&dpCr#cQBRZP!;6#Tc<>|OvEaAD z{cpgNxIc19k{kn`2R<6S65Imr3V2t*MQ0|-2A*#R2f;UiF9v@NZU&!qR+4N2zXtv_ zc>2;Lc{cbq@CxuTr6k!1?gjq?ya#N6?_8E7F91(Dn{tEi244kUaZZvv1N;_vFIYJ@ zNgfNHeV*t4Bybb=p9IM=IqrOaKLG0a3&D%Q?|>J8$MSC#xCvA}ZUNVVUk9H9o_ry7 z2X6-l!2biPo+}^Y={_H{@Sx~(@;CsQ7!OwyumHZq$ z5s%Xz&@~{?#C)N$v)zQu5y* zBuSQ#=%c{vL7F6a5_l^34p8sE0QP~0T<&-_cpCTHKv*of5mb6_1e@Tu!t<-HaQ=J} zsB~Tos+^wyPXzxHd^C7yf0Dpz$r4b{uLf!Qqz#@7-UcfFPlo%SgRow56pckz$tv(9 z@M)mx{d(|t@I#=|`v$0dejo0Sr7=|gi$K-$@gS_4JOw1_X#D^vDG;klN_pb(3|F46h{}C{wa2=>}KN(c`SA(!%@=;Lr z`#mW7E?MU|1RlrzlR>?I8L0Yx3{-jkH9S8SraXoFbpdYxN4S3;DE|9zQ0W{`XA)g5 z1jUC#pxS>D6g^%Go(z5tq-!U?0QD0<%+@JpcR@=H+VN$E6- zzZz8dDoB$g&j-%{KOgRY2Z}x`=zQXX2B`A98C3dT1y!Ekfa2TJ5gJRtelP`hg9`Ut zQ1yEoDEi+U?$tSu=Ke&GE}C2bDqI~bfzJb#?gzs2uYfB5uRxXa7=(-HbU7$GGy=XH z6umwSD*x|;kUF{F7H_XB!Be^44=SHmgJ*%C1XbVPf=aJ+mGi+cD0)2?RQcZxieG*V zo(UeZ)#cpfr%|8fwPNj?uM-xID)lEvVap!lT;s+{iyF981?JPbVHI+vSELABrI;Mw5gK(*hq zLDBE_aQ|sg`TaMje!BQ^9!=-G&nrRYw=dkk4OIH~fog|Co{%IoVR9LGDR>Kb zG59G^eDk249)2l!Jok?WMYnyR`1V#%{B$pm+w08(cC{BRDN#&#jjrl zj{^Syo&X+J_IfS_kK}$3Ou-TGQQ*zsBf-~zqQ{-!vEbLhL&2Ye4*~xNd?5IsktBHl zxCmShJ_3|{*Z`(r4OF>a04n|4!DZmb!Cl~QLDB8{QPKck42o{A0afqMfG2{#0Y(3# z$H)`B0#v!yf=YKMsB~`xmx8x}YM-x!=MS$qJy(Fo@Vo*ly(fbz-&;VH<71%G`yF@) z_!r~ez9)i*ala8f6?{CXa8Ch`178VBj@=2K1bzopdVd1dUgu4CJB@*taeoV__V`S| zpMa-v|4@jc^h==H;VMw^cY!MJD?sJ*&!GCx&%mR>)2g2Da!~#5ap39TGr=>!cZTO* z1rOo=K{t4N9tQSte>|x0{h;`27pVHZ4tyZ^0q~*Vhrx$~_ks@szX~e;x4=`t2kiFp zoenPIeha8}+761ZTcFzK7Vu8+gWyBJ=A@VZNub*MmErzw@GS1X4vL-+o^pCz0xI5a zFa?|8{%^qtbN?z(?fM2#?fnr@^|=pJJ%0rr0UlrT`jx;#xjzq-oLdP#4s3yc0e%(~ z-Tn$ zzds99xi^3cHwGRF?g3S=XMy6kTS2wkM?mq#@4$1wWlwaz-w7(-GeMQ(m7v<~L*QZH z4?wl&uR)dn51`7g$-)u9LqL_|I8g0#0k{|(0@bcJfuhIX1-vuh7sC6Wfrs<{(5Ca} z3E;!IzYg(7{{&wP-t<)07fyH@wBddS_($-);9J2vZf2|ipYYd7^0(kap6+t&Rp86H-}*Pm zLhwJq_24I-!Po{K^-NE%1xlWM8oV0(9r!qK%d=c>dK_r;Dygll54=HgPXu_ zfzJcadXC4x3*5&2;m>vc90wKtlc3T+mB1D7Mz9b3F1QhV@bizB1s?)2 zhV&fV4E{a13H%KxIM|Br2W7bfNQ|tfJ*Pu7dd}E16;)YU7+~p z9&j1>ZEzj<@E7~@ZQ%Lb*TL(-H-Jj#fe`x<;1*Evc7msa&j*#>ouI~_&w`Hve*vBd zKKv!Fmn;QUt_g50_;&Eo;4i@o!6RPka%mlSIrnYwH1JMvG5B@xZ14dub3QyDyqfzR zAgqwQCp^F8?>yg8Q0Y7k6x}}xD!m_pD(Aytmh-@Kz_Y+na25Ch@MQ1{pyK^1+&}6S zp56*j`Q8MI4qpTn{{FA@dY=X={mVhoX9O&P&jMAC_km}E-vuuN4}F#M=>|}Ac@cO7 zcprE;_>=JbkKhLGSHIfZ<9VRyb|0wzbl7WrT(5%)_bPBT_``r_(z!(c8Ynv40iFwf z4O|Z{dY!k^5NPch@J{g9g!u=!6#O-KJb22jp8iVkG2A~56g}<&MYkV;qu?W6?{c#N zp2Yndz*E5)@I>(6!Hd8LzrpLX5pQc&rA5>&Z<4yNF-Z}j(n>spzH9OM3>@A34fK(*^TKt2C2@Dgz7PUrXMflBXgP;`F8d!1hE zz@xao8GI!8GSJ!&T+aQMK+)&0_j$c907a*(!N-7421VcZfC~3NpyHkKey{%y@G94~ibg|D&h39eh0ZuK`7eKY;7N!4G=)mw{Ju|2a_ndi+0mx@$n?`&95E@ZF%= z;XlIt(hoU5je+8imxGT5?*Y#M5C5>!_hL}|w-HL3I{#~`~uhy z4$ZiJ^%79`uLZ@w-viGAkGaR|zZ!fn_fG=VZchVM{@cLS;1@yh@iG7G^t=*OIbH&a z|L*}+pI?CIf=7JJ>$w_S#r-7M2fh?A5<-Y`6%>5{+`aTy_`@A2#0{jYS_4k2ZfcJsQ_m7~;asDS=K8%2>?@Pf&;K#wk!7qa1uYU{gkN%YRr*+`zJii5e z2>8B$9|9l2{l9<@1-}BSUf%)F0+0Q4Xm3#Y>;XmZr-I_E*MVn)cY$=ZU z^?xUL2KQeJ_sM6Szn6e&-zR`-r`LlI2Y&#n-~AFi1T1~d%XJZ`cDw>S4jczh0G|S` z2VV`UJU;{<4E_l`0(|i2U0*#G+{^tgQ04zFsQUZ~RQN?-@bVr3F6DkXcrG{rJ`j94 zsBo_VMW;7`>KE?-mw`V9jb2~$a;*VXk1{B_zY;tX{3s}T{1kj7c=VUNpDqPeuk~OF z9050hw}6*}-v(EJCw|%Kw;lWoy$6-=n?R-idGILkkD%K5@UJ)?3#!~HsP{`i@#AHn z^4kt7{bzwn?_;3o@QZ*aebw7}BdG8OdqAc8bx`$5zU}2Z z6I8jX;BxTwpy=~0P~i_Hah3mEP;`9)xEOpkcnNq1X!QZbM<;*R<--k6x;?b0?Xm~B&hoD3GbgD-oFAok>_s$PX+G*PXd1gsvHmf zzNdE)D863}9tmCvital=(Ps)2KR+kn9iaH`8{qvw{hb?re3IX%@p~oL55lvLfgiL` z{_o`Q`(xnyc()JKTJ}#t@%tI-KLGqp_)U}An(-R&)hOh*QdG8;rY+F_VD|oAm zAFjXTUb5*YTo2^;5Lo=%5^mOqc>lzG%J0{LhjYD~>p!_}=h@rA>$%3b^!G@fO>xce z`yJrTT>AS0xGnsCDY%+T{qy}?UklGa2p-AxZ{hwX-bwbnnfoVlE#i76*SmP8zbEti zbzJ&e2ELJtVaxs`EA`jrSp|H(-Jw%+Kg{nl!5g{m$Mp{GzXM(kUJL#W7vj$LP22#! zn(NnG|Hbw1T(9K)PAu@XO#X zuK4$N{CF|fKl5xuczz`~&NGb#f6etz+2~hOqA{r1cu!t>XSA zVElVac>jNS@bN;}SM&S5JbNP7v4!U??w4?XKG(hB`8U7^@O&j#jo*(7&mR=t$RI*2Oc8i9`JU64zy1pXUCr!4tV2#P2V0>2I4uGRSlNeGa?>yd>Q3;P)%I z4&(ke;3K#+eqP1>7eW1P4q=b-Tl;@E|NoZj4&MDe*E{+BesBeNG?)H9!?lF#S6t8M z-DkP<_i(P~gx~gnf1eFMzR2^x<2sqE&h=fce~f{^W#RY!fX@d1!1XV>C#?PkxxT@5 zt#0^hgy;JGyzu*U@FU#+E7$$`{Z_r?@3G#(uya{Yqq5!~Mn9?PY_2XfuY zv-`mJg2lhT;Qr}_XP5EvBJS@2KhE{q@b1n0?hn6D2+PVnnopX54^`^SVxj{?u* znf|tdpXd5M*QfkZ@=$&s8h#%GPIA8(d^C6|*PHnLLhuHzuk(8&SB2kafY))I!|(q9 z8(hhv{>jPuXt`CbO{Amssi}G`ZSJ2MsZTZ+C5u)!>dj`lwK865RBEG@bhtb+Sy{x3 zHPz;5xiMB5ORKf%b}MaGMqAZ-t*Lh#tF_&gM%o;0RHs{Mxi*$gRi^5V{pnPBTJJac z-RgR6ygJctkafML=R=iN+Wj|VMd5Ati=Oub`$i|*W0kZ%as%aQE=|jg(OuO&6%}Bl z(rBjRjrvqtZnx?SOt7+Vy549lO{XWz)V^A4)zj*f9;K7jkw%$1Rcp;wr98Gw36@IR zYxUBON$#O$sa+c*&(V6Lk{4EWB+<$0XceMa<KsM9c4)M}p6NV!?rIbNNtq$~7OzgBi6wysjE z&={4poGL(SVaMx@v{5kzQPZbuHg1G3R8@Foy4)&34oK0FP`Fv$s3^6O^62ipu!@+A z2vwz$)3ABzqF!-(JR9}ocJ3td&J{z~ZCW+Bab*fY_Esh*1Nq0QO_j2w7N%t7iAu?; zk|npMp4RH{q~4G2s@JKe1+yA2OBat-#>?%=))KE`S8~?wSyK8@OfJ-EP5*FzT5VOP z0<+}=i>Xc4;f>H=O11J-CAR72${xB+n=&a#x_WT!+SspB3%4{SL~Wr2tJXq4u$Bz1 z77Nj6*IL!7N@==TX^+)Q*2Gq|Sf#PCG=xcuVXU)KwR&Tr#RzR7;vp?Wp037<><#0$ zr;FrWQ?H$&j#k^9?xd@vbUtCm(PNX7#o)7ltFz_JtN5*5l{B=m>QG>35~EQhFG}7C zFI&-UHR#5%lU%c_QnSKHP>$`VL8|JN`;}}tRarupTQFg2p&!tHmRhsN9Ib<@#aAvP z-G!z{d#mI@Qd26@?Mx{RZ0&_t&p70eL(&cEC*I|eHjN4bf2zDc9jU~QPqVd~)Or!2 z4+&I`A)C_@jFaX4k~IxveSNBWqcKUkxPNHl*3gqGwfXyH+E0(1BA%0UR@clMYj!L5 zeA2E>sv>kI2BPW8Xmz|wKdaY*SnVv&?2fIT-Kk#==bW6nYg z1?$He!6=eZ>EcRrdYMZ`7iFDIH>cD}x6LiEOkOcWF0@#ceU;I6%LW?nw;F>wi8QC+ zO0TImb~E7D8BUAUprTXNR*+jG`xjai7+me$L-x@_>XUomiE?Y9iG@N3!55l)PPvy# zfr@MvMP8IHDPw7kl0~Yx#)EEv_;R(a$T(>lRU!gpN7+qcCK}b&{&aL#WpsBFeyyaH8gv=0jCrJ8mGX3tJhBEzZB(mOTh%fxN>L<} zG_EP4Ct-cZHJ=qhP{&cslTi}QRv9%m%JGm!-T^(O-BszGv(@sfG+WW-(XSbkoe!Lp zbdJzUp3G#qfhrdADwSd3f=aBk2J(*IY)`B4n(3Zuqt&L4AsTWZ%XR)A6Q(IPAWFHG zo|jHkC(0xHTTzZom2WUElyZnbZ8G^tSJc{?A2^XjocO|@M+$dS$CIizd#6JomDE(V zR-I~3A@rZvt~Q{|;80B7iQ}m>+at~WOeLmfCpK3qS(L8ysim*1}pJ_Ti-D;t$5H`ML z1Z|~bK0EM-73);im9oT|m0h{UG*(CWX*MB^eQ03)vUGDDOyRn*Nz@LMsG`P%J|*P_ z20&4pRnUDtJIV@4Jqq(Bo7Ih#TV-UmMo952x*n4On>#0(kD(4k*}6i)sI$kzjM@Ay zpM7Zt>y>k50?lJQJwWVox@^tB+I)5>(IfSvl?%)`xyi&~w>&fX;}!#?ZV;?q5X92x z?(Xo#{%&y#Vvp|SqEHb-8nG|Yv86?CU%n!A=#@JxDWy^Dj~QpC+fR?3X-7=U#8Ig} zImVP15#IebnX<_fllT#HBl% q>x;*hfr5CKDmIKhbs*vA>w?f z(x5R?3-6Jo(Uiv8GK!#UmwX6`lVT-u4FS^fh^81>u%NXxgZ8j@Y-+55rKcf@U_aC? z8ONc@HETARMP*XiU9on<#sM%8o$gqfYP*DJE?0nBJ%19X4x?#(+RR(ZjqwPMtE(=- zGNSItDA*XEtnX!#fx4+FgXt&A-}@FZC+lUj#xTb^XJ6mdNil^MTB1)jXu9!gYkAs- zelSs%g(zQVeO+Ns8jrIF1IK_UsjpSxCt-rVvg+Tb-zRnQf}6ojq2E#rdIo% zgx2N<6U&sIM#y$S5mol)lm>}8qQyq&Q2~2pWt6s3tb|hax_1?#qks&Bz3777wqgcK zZ~c7cD*0l$jMuRr@9j#OF4d||W9bV-4@K$@daKiXTQ|6w4wKvMguZ4?({Jm^@OXnJ*a47>8iDBQl^aRKt+Pa*QTAS9V%k`?#OOm zp7olsHZB}t$#0?v(wGPqku;-BySBSl-&=#pr^>YnYJiYz?MJq#7+%P}q2*rm)_QJ)(iy7&XrysN$hH~`B_=UH5{yjrq%Rat&;U!jfv1|5Q{W_$vyCLV`XG7 z+&~RsHyR6ZB`qNuucMBHDkyuj^eeS!6x^ZL(CGAvETyi%d7xZ~ZW`D$xb-?R5-WIH zXPMf(EKegAHjf;0H=a0%Xuim|z*x@eS)C3PYm1bvKJ+H@0~6cv3eGi;WcyRZvo375tf9CEr^F@_IQtU?-;8?!)2c~*L@I?@bXDl43qpm$o5 zf9eMn5;Vdr7x{K>9oRUydgtol!L6uCvkI^}(}R78j`~nRiw^p$wbWW0FV(lgu%V#} zsjEfz&`ulB4kwV*GCG)6g@6j28G~#stk*^>zfDN<=}NHLYN)}whrD0hw`z& zaL{fnFuOo}9yfOopE1u93K0eCX@s0AYtHA&KrCA5o@f`HLvdUPWNuDtNm!aZRue2)O%qa^X+|oP zjAa5z#|h#rE|qpwCZQKew40c$HR2jYvmv)JVG|8?UhiJ%DWzB@wvJ%rKczcPn3TnO zH<9-0HnaO~%w$((Um6U>B0zU~h1V)5y6begfr_hf>2iwB}?Hs2i@?%z7RZHuvPmL-hn zyQI`JvZs;BGZ`E@NzU7m7{P9w%QI%yKHIeUqZyM~F^+X$-vWxV7KBv$aTDruH%idy z83WXvZLSp)ikdf#s$rsw&XWGo2$Pn|k^71a(iNns*;~(W3}%`&2W}74&Y0e6p(3~f zFaDS8h(d0vyqmGmwtN}g3;nYgOp?rIoGtotyHS}P3~4x*xKlzl7@I`RMZA&fT9VRI z9+D`et)V$@ax~3VXUK3-MO)1_LD`T@yl5VTJw2gpz7d99iRk*MvJgd7!oUd@+~`2b znSqR@8@5IbPyJ3DAHw8{gpCwb-|U$5gP@A^HA86H0Hvd3D~q*Cg+-FG`hKOs1UvSb zSnD;_aZ}l8)SUb(rOa>Ab*Agq*E-9b$FhpqE)CPZJA-ZLoRp%l`;I8n616sM`|n~O z$w{&;SHpaLw9n;zXX-(~BQ>cSoh5XGFhq=|HlL*xeK1>PHQuLo#zKJdlM~u|#TeA{ zx2`lJb%M?_N?)xZ;1@HyMYfNb1Ye%6v8`$nL^c2$Z!eeN-^-G#bw#Zu_(DP^UGjOR zNs;C0fX&xsY*9*9*6V}7jW74I+}z{k_3Zh=h!e8+0m8hnzjwcH;@^%>8V+q zI0M9f7)KwQMo&S1mnxZxzZ^9oh*iyvvb6~-g&0hXSO|mxJPOn}(q_iLrOpr-Ai~at zl~K*h7u{q(BE8I9NKIrG)uKZXOfgRL(sT?n5F5SJ!DR+24PV|B`;1blu&_jFP3mcB z1Y^3$az;s{4D6I;idEFMpp>HFu6x>Hf)BOAJ1P5mV@amyTQaJ8bS4Cmox4jGEedhU zRBcN4%{ms3r^@?moqk%o;UxXK>Q*rLswN0YbTo9|GK&;@n1vK3vb~JFx$cP|(^w}Z zOx;WDylm01R<4`u*k#$oI)2!|hCo1{(S9Rq7`K@OTU(=Tx{Ez9R)Tm7Qi?z%u%vpbZ5$O65+kov6>F5r*HQef2uCd+I zY@k|ML>w{BjqZ}}Ud7t04ToV45Nx2uo;60*WL-na4?Cj8Ky;;i?oz0r??X~wM4O|X zO`Mp$q^o9s?j&cqOrTj0?3^cEua2vx7^`5!2{xI|2(o$VosCyZIh9$Tx$aJH=t2%faR_wK5~OF{IFuy2eRnOXZ|rU$AT%RUE1Eh#LkvW{Slo+%%!KWoq|SW2xF zM2V7=_3J$%OLr2X0@7~hNB~>p{wa|^3Z7P(6-r+&(Jq<#6q|X1JWcC1l`e$T2zaeJ zX)lWkAiW9@^DBhR3RIv2whS~1(FAUPztCvdrE85hK&>?4Fi z%5CqvdTHO)J1p*Gd76PLSVPbjW`&BG#xPdf;^K}>(YBHz^NlT@73~ap1<5Al|Zm&DJ5)wzWNl8>U)aHf`51ryEu3xMg_f#=-tI+VZI*M(n?5 z&lDX+W(+l>l8p2>MTK6(G)`@m^bh+#>aL6knT(sgRB~-!(=~tZ zVAgbu2<)kp6bb9RD%*U)#29f&ShEqrueSbbZM%#apDDCaRP#<_l($H#iCMJ#ghyIs zRi$PJ3}V-ZI0|bk2J?rDhLO2L?QQ7Pj!g#__n}p35!Hq3kUs zU`XN4AgOvEXqb^Ki_Ht4$n-&qNx!!0^wMvd;Z^MW$o;Ih%WTEeM0%jgWSjm8zPG&J z6J9gCbMwH!nt?SoOUp|W&j&~s#$ZNlmfzXUH}7Bf%qZ!XRV_QgNm1;Cr!3{8<*){3 zW{<_*r3QdzdrrExQDJ9veZ0jyqmr(bvBk#arEKpTWhT0sG1bnS%1mfm{UCoB z=q1?WVW2!<&W1AnWzX3-RM;1zebH%kJQ{iGqoeIc3>sCw(CR_GnE$O&G@C_xOd3vw zmy#a)sYvI7G3&<38lMZ(N?9Ma)P~rU-au29iIh}EVA9rpg_dor9A?wp+m08^5k3mL zpx$nW@zSB;>oyMTNMuK}UY*YlVx@ScGupOvZ;Ts_1BzsCw128@X4H=N`8imH@v*0QRQON zVINXwtHhUPU5uM{^EyCdj!NZ$*t6HLlQSHxtl7XGq;(d?%ur^!GgEYo+VvQ%!p|(& z8c2&1grr*@tJjcGp)NYbIvrbHqI@hny5F5=ODr9Y0@(do$&`H=y(Dy-B{5M+-rR1T zvg)y`R()a{>BBI?K+#5>w%ziQFpAVFH+QF#^i1D_M!(^y=3=2V=)U_Adq~$<)bQS| z^FE+%5Br?bo7grqjY(%m?z_e;x(oIb3f`%;m*v>7oz-}tic1 z%q%~k_TpwOojY7gS!H(h-{Co{EiMUdv8B0mq3LOr#`Lce4A)FHxbZBaHTuSCt-Y^n zI0@l=z`1(s1@pab*Ep8eIT|rWn==iuju$)IH6&?o{lS$pii8PcIaSulSiL~!#JV71 zs5?l^gT)04I&+pQ+Xz7umx0)O)`3&wX)KJ!(iN0aEQaM4 zhd*b%np=KruP!Hh5uC|JO}8~>)9-CVUb2~+WHXyyU3*`Y3|cMF&hw#4>YJ-mB3oZk!m`QTU=;3AcM_Pw+Gqz&Ix{uA-O`8=plw^rdoq&chy=l=r6lX zpRPlPmy>mtfa&H1>lRaBc~r1gPXuDQu;d^06GW1Eo3C~eAsGaje^BP>QE3AA%y#)vAs1~9B9Ew z)zN0+Z+(u5nPqZ1JPEp$nQHP$X`zl?;fimz>L|>ntsB%K8FP#bOi6s#RAO%<9n>$n zU%A%?VlmCLz&!$mNwKf~s4pz?pt0D6;^g^uj@Ih9u3`FgIWm-=fr{Q8nxt#-g56&e z4q2mEn?spz;^jp;qxJr&HnUe594ZYW$uUoHr0q37MllX{G$QmK(AA)vJPM}U<`M$h zUKqB)nAF$!5grxhv{7DUn$7%SH2lM_%_Qg@m&N)1(0W8nGPL1w1Bp-C0$he=M+O0D z0z33C78CvsKchE|(HR$b-P^l7H%>xfn3MK%mn7$)e)`_p%Wt z{z0dk_0FvZVchGEXnkjnm@dHPco`y2Xlm$LYD5T|VC+HU=)wjRn|1mD5h}7`^R`W^ z2DYxW&{>zVyKHe^WiXRQW`(fnpQ@ow;8vUt$!2(3XW6qPBuq{%yx zIo&REOmJy}G}G?S9Ud#{^XkG*GMz&9W$i3}GGuYHDP8AyQ`CXG0wT)`G$a|FXbDfU zoYC+xwwO^PYHRZaR2NF?qpeDdPG(E9<(>>!WRW9%Vr9nb44*=A|=ctSCF;kR_3@xo_RTa5Aj%CK#DxauUlfcHeEJ|g z4mbu!vyb=mAgPxnwj+S~!UQ`hwJJC+V@fj^Q!cfA7;@9YWQ&~L-lgqBB9>eqXh3Y> zgsMKiNHOw{V* z<0ygHQRRliHO^!ko`$TJ6?UL8qL5a$4I~K5WSch3$|93)598tvD~-7v*+$JvC1|I~ zL*`=5eNe$%;f1mwpgm?p@kl-Wx6FzY2M>?6`mD1csSb2OWVUW&31rVvQLr($7T>hypkUBAS_otE(fWQ9Ws^RDZ?3rgDT|^0kgf5r+mdpe zN|p;{-V@9!3d&OLio$1Q+Lg4YL_5-m!uVRN1geo;|PwqItl za|b_y(qTUllZI~d+kRQON#B)8;wCK0;pdJduWI%_35O&_30p>^H~6ynqF%3>Z5A-t z+JObYeL5f|JJihOeeEPHU&tuZwdH?Nk{2h@2xR|m%FCs3&qb*UgOu$&GO#Fd%@aG8 zpGWM>JG{-*g08oFBhk^p>(Vnz8^%gk`{t(QGAf+6?7VZ9U2@JMR}4#=niJKr(ke8@ z(lE1ER7W`#!Mny}^NNXDdl|dj7Ht_EF1e+b#mP0W_i{6Bm(D%6bk2q8x#uoF|AMnH zb)Q4P($?TpB@aiSi%aKSpl}!R`!R&uD18sfSZg9z>kU@Rumj`3qLvP}cFo*TOE^P<*k@zot=2A8*J(5>t;@CzuPt4ihf`_UVOAQz zk|m~Fo?gr6}P@@a4ZnSUY;Dvb# z9jc6uG8Cw@()D4JF$I@xx)p=0Yga`T#3hEb$udz9pyo={QZ`vwEwf~y;<`W4(GY`? zE8QennZ3UOJ6yfE-Z2zPP5k2HIe(iEs{QDqYMpGuAH1`RD+8ETbJV4QjHj z6;BtqBAvM%U!+!Q&eV)oZ?K=SIi=lVnqw_*Ka}@;SZc}!Oxlb#?fP?@Bg+^Co~Y4i zs6##dk&d(Ri49p=EG{@9adidJ%kXRO-AAF0mbk~dMx{Lhsi+amwqTc}1v*-*6$zPX z?j*^mHd-yS8rPV)_29gevc;l8Gd9!ct90gha#lLHGPF}vI)Xh6C8f(t>1G-Rzp=7% z54E110cweIg8A0SRiW`R zzcaV5G4VP50dAHT69!UF4X}|5lc3UIZ1!GhTlnR8g3fb5%{UagJae~BQbjgEakSpo zS=l-L0#eyB9>FHcxi3Fsn;>{taG1i7K#dn#9I7KLM%ydo?ASky`BaS+=sH%9j%gyj z=JfWb#x}v`9{<$e4$jMI-m4K3=C8_m14B&48FnBGA=1&3vpt@U!nw6_?1TMLPqPuIPh)E-+fylX@PiSa!KdIi z)y6S7O|6=k4Vl^yxLB*!I5?QOjTz^`_)Z;|LsoRNg9K;B0v!Tj?i*CoN)2Ja+MWiD zcC*b&ro@vQAoN&`Z#3=U+N3k#^_maHQCxFbX+E^Kk-}X3E|`sSud3DoRjp_o(10Y_ z)lsOqeXI7{{(ZGxrhvdY)A%L#W|U`^$w|}^W)d0=wSl9$VDHDVb8`aJ2Q9TSMQ$y# zku?kf649Pr5aEH8a|+p%x$S}EYbv?9z+O|7t}uR;;Y*8kEM7{|`Bs$1wXr6=b84b%EsyqFdc7^Tb+|-V878$|Q@+3r;T+_mU5}91lZtTpi3fU% zYLkLxTq@RsDuNRsEuLxlFCIxLCKLR!qDi(;!?cSQ%WbADx#)2NQ{cjaA`sf4=%^K; zx>Q%@E0w&Ws+tR28;Rlbg(ZxBc){u+m}Uo) z(G*!)Q_TBmMn*EmRn|snB^qRC&`CG9pV*jqUf2VtsuNxezw9vU%%rFD*qDKMGtY#w z6(~~V`(hi0!q0XjTTHYgT?(Hkb^w~p=~yok$<9HPg16aRTdyD|f_msx>~c1{ zF}_9PX;rb-AwsGceXtlX*IkeW#=gy3 zP{9MOP1%d$Cwic@nL|D*DUsqF-0Sb_O3@$fd}+mLp}VCG+Mon}rmT$x{WKVe=Mn!M z%u*2eDkBXPXR%&H+JAmewRvjvlqkPFrD=APM^PS9EBLInnNQ}m7Aa$HYdexFaO(E` znFQI9i4KHtQFesw@jaZ+s!Q|N?}FA$tF}%d50v;E^AQVMe~VA`gpq6R#11Bv!a-rY z*;WhQY&$ACZ6-UYMz3i|3%3@Api!j=E^aLeCuL{KL96QE#6L5Km{iDSE}yq~chVMe z?3-ny<#4A5Tu($c>v?_O_M=q7d3EN(x#H#~Q$J6FDK#jsMIX2WHdoQQw8;R;4QQsL z?2~mI;^NQ1T;Z->Kd^O>p98FiL~Y&1Tn3-a9qulc8SB$Qm$#YU%2 zDUeBWe_KViNf~Hza(^sHJPRG>%wd8&hAJaJx=5YS!RT|=TRXKA?7^6CqQl&v|7-Ad zm${KC$~Um3tc*#$Pf|?m!s#n_n|m;Eio9h9GqJ9rAIVy3;xI~qw69-J+>P%4Dg&8N zJd=j`)Gbd=;FbalB4=C7oi36;N_&b>VL{3#yoIR{wbt>QIfBQ|f@Q&j;T^&%V;m|{ zs;0rouIDB%1T}W6if@7%oJaNrMuf~LzNSan#f6?5{O#H-h_gn%gQ3!F&D@%npV*$c zU8Uprs3u7)Oo%^ij{_}lRHlN)<lf|>0O$xvPYWDS^B)-6w-;4_XUc;Y3$88?_>Do zI2PP**}!tvD}(5W#=80Ry1rBy|?o*QziGf)R$Lo;LpT`X5 zn72p|lQ7*PqY!Ft(cm6{F?!G+)JSaclz9*NS)L5i!-DWGtehb~O+Dp1AGWo_bYcbs zx^Oh}yC2$O0kx%G^4(n38g)B814AWgGMXK$7@5h@IuRyEpXqw~OfKEFEhhnXzS{ih zj(a7tL+0-0FRKIR&$~mImCXDF&k;&w3;u$OA&M2_@H&;E$Zq|ntuv*Qa_+&2N*wI^ zG&opE3-NVepCR-{(l8}1jM;cj(F`Dyh5423dgL_PC8%0md0X3yD3);K}8?LFisW4iRz=&aNe~NN~c>JCMm9$ zKu51bZ-m0=NXDK}QHQKG(2_=2w2q^kmhM9N3$fK8@;7WVj~ULMHr>7SnCk_r(4-$maIyNCmZVmi3$oQDjCFv-=d}dW>4^0nGdwDPEUFmo5*> zvxBjTZmwX#5?jL8a*u3Kxs{LYui?awcIfoXET-Z+`(i?oI1EsHW*F9IXy?$D$y>-P zH{aso5V_Oqa!g}$q1Q*fx5!-Rx!Oix)0~21+ObjKxh1vMF^}J!^}$1-y#&x#dv5^IM!(v5=EbVj4%e353Ub=^s87h=&3&>V?%`fH9& zF_KQ<-aywY@ZwxSQDS`imxb;em3#rHSE-qgczv#Ty|NCA^m9i-7;&O7CBiE+COC~Kv3@~8^D@T04A?r&G#y7r z70`DN&K`#;Cs^PJ}LN}raqSt=@AGz=#gy>}Iv#di42yenTIn1=&QR|ryxoXbS21$4*QMG3`01c~%4Eq4QNE!#l>+M}~4hjK|idXC-*KBZDy z1@Y^~kAf`fj?p<`vv9Y%;A(>J`}-(V-j~o9`bFED}6x7pdGa&_#`2 zzM{LlapyJfrEE%F@-3@2?q=!q^>)#XLkaD;VtB};fE;$u+=j<)?>3Zlt#?s~R&|fv z5D4DsE041I_O|yF9$j7iF*?kaa^$r>M2YX*Af}l zZ1NC|I!5+R!5v+Hs}(62Lw}*;M=4VXL_s(}*s0~kV7UM8;aO7OoUv7VTf{I|;doih z9EJDp6W)%Uaw+dI^t4Xr;d3Pd;TVBzv^h|UQBuYB2*yXViI`V$8-U4~Ll8`tXh_M0 zg@@Mg9m@bgvdYjypu6olg4ZR6`_FE)`q-h+SF<=8}%-4ClFx`KQ^V%fzOGM5I~VOH9L%{wU8TgntW5NSu% zq7NtdkWsrS!V0x)_nD9L(69%cq({gUE|t2IGxFJa))^L*iO1s*vpxbH`)nvB_24+i z2uGZ#YzRnI$ve}~>2RuMmvi)aYpGMOva`jmVJ6eCNx+t&ZMqXSIQmvNYwGLW#ZKkM z@NIyQ2}Sb_K$I3+J{GS|lYKVF?GiU8;oD7ulY;SE@VXezAa~IsHh>>$_+J?U%=c~w ziF`?lqCnanwuP+ZT}w9RUA<^Tm^paHYdQ_S++F7||MY7za zj=1M_9bt=|Q!81sSLk_U61lLmz@p}{dPK7HS=i4MN9ozq74~FvjxtWG&0G2$Dh^de zR_4yw3%QN@;ZpfolYe$JNW#L#q3ChAw$!cKg(WIzNJ=ukNd1k1$Z|3+YV*_?Ws2kC zSY`5xgwHQ9Me*R0ufYgyf#jL}&!i^9Uq_c*MGihpaPm=-smNA=m&}tlu?j-OytQ|C z?^PlVRiZX1mAP7Fl=0Qdt`ym4>c>wrXVm5I*Q;GyL)l#2+_EWJCDKe`V9c|tA$ixC@ z3K$t8iV#cJWrpq03u3;@7d%BQ4h3fO^!h}H@U~&gXAiSRj@iLuLCDzFRb3=zSy-Xy zW9AY*Zb|SJaJ`DLJK8cI$GS-6KBPA!UjcY2iMUROZUI z5RNd3D~1^i|utXZz-eqwP!9C5n`e?qgz+CvjreF5eK;!-55B!HlJW#i`~? zQhZ1n5A#E;(aA#?Khx1R8|3t<;UI)J22U%gB%MjipI~E{bIaAJvj|Q5%zJ#YQUq($>F>YrKo)UC`1A zuI7953rWTeNJQo?>^@SZ4k98(m)H#>$I=IVBNIt&E-XsUTFj6``!JL02uL+_98i0k z)NVQjE9MH1z1GoyY@NH9OGo4=7K$tDBF&r;oK{d>EbSB3n8v*E%qWuS-I}k&Xw2z* zxU>%r@G}wR|nC#uGDwl zki}t-Iv4GpM2#vSZ`7fET9!H6*A(83c{=6WbFX*sx*s-wTVSg&8W+hY;@mh2(;sxU zK%y=<-p6Hz)~U?@z8E{W^?)v2?)SCwApJ7z^VH$$8cs0SfWU75_<_BZiMiWeybWt;p=DRM$+$I17POp&wIll<0~!N;6$vt z9xoT*PXc8kfPK&3Ar4x@&n8BjS*wrG*h z1|4lp56u-V1{K^_hWEK@Oe#@wGBS#J3k8-$W+0Tw6+dihAD_DiZy~vJQX4I`XjzP$ zRph{j^RN-vmVfe55vXUdyg|)qUr2_udz0g{`>AU|PD`xBJ)$^w(*{9AK@`7>BeDGp z0Ok;_-ZT%!*b2+xI{?|*SY~&R(X5S(XXy|bIY^g)qv^X*W%4g+iJNi%#npkhUW|J{ZnYhuA&mf~$2*gV{yY}7U&kzy$L8PV_H z(?VQoV=mrk4-m}fkL-d<`UzW)DM$$?>*%dYJ*614qUDMD%=Q{*iKPebx zFoog02&bAtL+>^bC?*Te^>T;L^JXUV!ki993gE&dS$9dy>5 zFMQu1S)-k&auJbLh)2GGR$WT7&&)@RZu2s44`aOaQVKgTG`wNs;0`%YW>1#MJ|mYg zVqv*`C4+Zu=5GxY?N~G zv(RXHqZI@e@*5J_@!5mz!HVe97g6PZ-3Lj{OdztR;0}=8Aa3ppUsX_Uh#cEXJwGcb zr0WP`EvcpR)I6AGx+Iktq|F2dBa@D*Ym_5VzNNrTK?Cw73U!lt-!9ceNDJy>Ou0`p zVT7@f9pZS`;@i^YP&?=O>IM23T!l3KQeL7)4%MrI7r8J5hfvHRlGQVJW2B(Z1k0p04L0^fb6sYYir={8&9s+r#+Wsa7xJa}hJQY2;an#{U1x_ab25C}+fH@wXZMdW_v0^(l#k1RUa< z5(^5ak4x~02&wc%hc}UJU?<}XPMDjzg@@8GZ?o@8;49yZ9>FXmhd+3SSXJ=_6b#ha3<*5s=3_PJ2q%6kGzC5v|e`Eiut^Mihjr~^- zn7(eTf)y$_MC;^h^3n`Xwh5_uli1n3w{0HWv})_XDtyOp#2ua34Df3C$OnW*uP?G8x=&* zN`I5Q)nq-RE&|P|4jJfd43)VqpUojT+Y=kSIHE@>rMX5`!h_}3TC&YeJ`4gyn&(Yt zf~b(p0sX|}>))ZBdQV0N{eu`%rgHjZf{9OK_~bi$8w2OXIn8rvS=9c*5>+z`sP7}l z8HDXKbn_nH$8z7;Obo6mql_10xH*xtH)|*9ViY@Uug)j|iOc)jZcd5nb@62m@Lql<@Ag>^9`sQ5tSd30k~?&L$)mTOuP}oNsoA{0EX6j&$Qy4d`ApIbH!|U3 za3pbC>0}vzNhhU&w^0M4KvyG0^>DT!4&kf8Np1&FW|HVws?+KarI#G(;V7Xk?}R4( zI6sd43*XX6VA>)Lq|_1nt|7D$Bq>cLH0_*B5A z{+SmJA_v|1YxX02BgD*=t8DKUjhhRuG#?`d*n#h>ANj^kXl;A6DR2+DsY@T_=Cfum3ETlta z3xX&o0_nTOgYJx>nFO4|h4wd%%uKPJ=^e=Etfr1OT#e`61HHr95Ynp@5*%^fLP=Z! z`2Q{6%u8-(ik9s@>Zkr_9TW+L3*gG_Q@4K$zgu{jGT0PH@5R-KODzO(Sy(^ z68VsCiXL^>*Z=B4*NY!u8MLD-y{9UsGZ%LbT`4Vupc}9{w?3xL?ylA0Jey*9vus4@Mk4hF? zx#pqraljPcPBP>cnSq{Oky1pt`?^mCS6w+Uyy5D>WSFt9Fyg~%zK9#txvu$gT;ey6 z#|)VV)>U&lxI{<3L~HRfbuLbe`UmxvLLPRcy;*Jc@%1vya7K4;m>mo7Thy z^AQ$RjiWfpA!Yk8jMhB1%-pRn#gtQ@L|f<7hh$>bDW8mC&c)0e1uFPoSz@gkLoC8< zj-2D0^|ouYP)vHHZxslij|megS(?NatV5syGyJgycq^Ywkj(2p3qMCE^SQn@ z<7$#VH)D2`1AcMF=0xZ|zWpC_62qojb)g^iMTgPHVX}R?o!-QI#HKM_Nm0ZiYsN)K zm068%)+6)+qnLetCjUCkJW=B@2nkvx#b;|QH1sFYcy5yKG-%t~z}Z6z1MiL2EmS6X zqjIg;HV=K0E-l5rTjPPl9%C2l zR2WONRWj__jZ2``E%E^+&o9iJ^?4g>-h6pjDX!ZRL)t`LeNIZe#wnBkk%Gm&BNhWA zN%!^*Uo=w5@$5ymFw@*d8cdXS+{9LeqVA!Yq`rM)gHHJPjTvM0JB%p$8JB_P`2tRK z(wq1&2XE5dp6Q+l`+E(CJeH6zv3>UMR z?N_PADw1PJLs@E`BcGruo$Cbw^s$_*3M5)It0cYBq8{v7l?NGbaOD{?LZ=QoX0fod N!}YFIQuYQ-{y%~xUMm0q literal 0 HcmV?d00001 diff --git a/ld/po/es.po b/ld/po/es.po index 544e953..8e371d0 100644 --- a/ld/po/es.po +++ b/ld/po/es.po @@ -1,29 +1,30 @@ -# Mensajes en español para ld 2.20.90. -# Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +# Mensajes en español para ld 2.20.90. +# Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. # This file is distributed under the same license as the binutils package. -# Cristian Othón Martínez Vera , 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010. +# Cristian Othón Martínez Vera , 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011. # msgid "" msgstr "" "Project-Id-Version: ld 2.20.90\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" "POT-Creation-Date: 2010-11-05 11:34+0100\n" -"PO-Revision-Date: 2010-11-18 12:31-0600\n" -"Last-Translator: Cristian Othón Martínez Vera \n" +"PO-Revision-Date: 2011-08-24 11:51-0600\n" +"Last-Translator: Cristian Othón Martínez Vera \n" "Language-Team: Spanish \n" +"Language: es\n" "MIME-Version: 1.0\n" -"Content-Type: text/plain; charset=ISO-8859-1\n" +"Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" #: emultempl/armcoff.em:73 #, c-format msgid " --support-old-code Support interworking with old code\n" -msgstr " --support-old-code Admite interoperar con código antiguo\n" +msgstr " --support-old-code Admite interoperar con código antiguo\n" #: emultempl/armcoff.em:74 #, c-format msgid " --thumb-entry= Set the entry point to be Thumb symbol \n" -msgstr " --thumb-entry= Establece el punto de entrada para el símbolo Thumb \n" +msgstr " --thumb-entry= Establece el punto de entrada para el símbolo Thumb \n" #: emultempl/armcoff.em:122 #, c-format @@ -36,16 +37,16 @@ msgstr "%P: aviso: '--thumb-entry %s' se impone a '-e %s'\n" #: emultempl/armcoff.em:195 emultempl/pe.em:1817 msgid "%P: warning: cannot find thumb start symbol %s\n" -msgstr "%P: aviso: no se puede encontrar el símbolo de inicio thumb %s\n" +msgstr "%P: aviso: no se puede encontrar el símbolo de inicio thumb %s\n" #: emultempl/pe.em:418 #, c-format msgid " --base_file Generate a base file for relocatable DLLs\n" msgstr " --base_file Genera un fichero base para DLLs reubicables\n" -# DLL son las siglas en inglés de `Biblioteca de Enlace Dinámico'. -# El problema es que las siglas en español (BED) no están muy extendidas. -# Se dejó `DLL' sin traducir en todas las ocasiones. cfuga +# DLL son las siglas en inglés de `Biblioteca de Enlace Dinámico'. +# El problema es que las siglas en español (BED) no están muy extendidas. +# Se dejó `DLL' sin traducir en todas las ocasiones. cfuga #: emultempl/pe.em:419 #, c-format msgid " --dll Set image base to the default for DLLs\n" @@ -54,82 +55,82 @@ msgstr " --dll Establece la imagen base por defect #: emultempl/pe.em:420 #, c-format msgid " --file-alignment Set file alignment\n" -msgstr " --file-alignment Establece el fichero de alineación\n" +msgstr " --file-alignment Establece el fichero de alineación\n" #: emultempl/pe.em:421 #, c-format msgid " --heap Set initial size of the heap\n" -msgstr " --heap Establece el tamaño inicial del montón\n" +msgstr " --heap Establece el tamaño inicial del montón\n" #: emultempl/pe.em:422 #, c-format msgid " --image-base
Set start address of the executable\n" -msgstr " --image-base Establece la dirección de inicio del ejecutable\n" +msgstr " --image-base Establece la dirección de inicio del ejecutable\n" #: emultempl/pe.em:423 #, c-format msgid " --major-image-version Set version number of the executable\n" -msgstr " --major-image-version Establece el número de versión del ejecutable\n" +msgstr " --major-image-version Establece el número de versión del ejecutable\n" #: emultempl/pe.em:424 #, c-format msgid " --major-os-version Set minimum required OS version\n" -msgstr " --major-os-version Establece la versión mínima requerida del SO\n" +msgstr " --major-os-version Establece la versión mínima requerida del SO\n" #: emultempl/pe.em:425 #, c-format msgid " --major-subsystem-version Set minimum required OS subsystem version\n" -msgstr " --major-subsystem-version Establece la versión mínima requerida del subsistema del SO\n" +msgstr " --major-subsystem-version Establece la versión mínima requerida del subsistema del SO\n" #: emultempl/pe.em:426 #, c-format msgid " --minor-image-version Set revision number of the executable\n" -msgstr " --minor-image-version Establece el número de revisión del ejecutable\n" +msgstr " --minor-image-version Establece el número de revisión del ejecutable\n" #: emultempl/pe.em:427 #, c-format msgid " --minor-os-version Set minimum required OS revision\n" -msgstr " --minor-os-version Establece la revisión mínima requerida del SO\n" +msgstr " --minor-os-version Establece la revisión mínima requerida del SO\n" #: emultempl/pe.em:428 #, c-format msgid " --minor-subsystem-version Set minimum required OS subsystem revision\n" -msgstr " --minor-subsystem-version Establece la revisión mínima requerida del subsistema del SO\n" +msgstr " --minor-subsystem-version Establece la revisión mínima requerida del subsistema del SO\n" #: emultempl/pe.em:429 #, c-format msgid " --section-alignment Set section alignment\n" -msgstr " --section-alignment Establece la alineación de la sección\n" +msgstr " --section-alignment Establece la alineación de la sección\n" #: emultempl/pe.em:430 #, c-format msgid " --stack Set size of the initial stack\n" -msgstr " --stack Establece el tamaño de la pila inicial\n" +msgstr " --stack Establece el tamaño de la pila inicial\n" #: emultempl/pe.em:431 #, c-format msgid " --subsystem [:] Set required OS subsystem [& version]\n" -msgstr " --subsystem [:] Establece el subsistema [y versión] requeridos del SO\n" +msgstr " --subsystem [:] Establece el subsistema [y versión] requeridos del SO\n" #: emultempl/pe.em:432 #, c-format msgid " --support-old-code Support interworking with old code\n" -msgstr " --support-old-code Admite interoperar con código antiguo\n" +msgstr " --support-old-code Admite interoperar con código antiguo\n" #: emultempl/pe.em:433 #, c-format msgid " --[no-]leading-underscore Set explicit symbol underscore prefix mode\n" -msgstr " --[no-]leading-underscore Establece el modo explícito de prefijo de símbolo con subrayado\n" +msgstr " --[no-]leading-underscore Establece el modo explícito de prefijo de símbolo con subrayado\n" #: emultempl/pe.em:434 #, c-format msgid " --thumb-entry= Set the entry point to be Thumb \n" -msgstr " --thumb-entry= Establece el punto de entrada para el símbolo Thumb \n" +msgstr " --thumb-entry= Establece el punto de entrada para el símbolo Thumb \n" #: emultempl/pe.em:436 #, c-format msgid " --add-stdcall-alias Export symbols with and without @nn\n" -msgstr " --add-stdcall-alias Exporta símbolos con y sin @nn\n" +msgstr " --add-stdcall-alias Exporta símbolos con y sin @nn\n" #: emultempl/pe.em:437 #, c-format @@ -144,17 +145,17 @@ msgstr " --enable-stdcall-fixup Enlaza _sym con _sym@nn sin avisos\ #: emultempl/pe.em:439 #, c-format msgid " --exclude-symbols sym,sym,... Exclude symbols from automatic export\n" -msgstr " --exclude-symbols sim,sim,... Excluye símbolos de la exportación automática\n" +msgstr " --exclude-symbols sim,sim,... Excluye símbolos de la exportación automática\n" #: emultempl/pe.em:440 #, c-format msgid " --exclude-all-symbols Exclude all symbols from automatic export\n" -msgstr " --exclude-all-symbols Excluye todos los símbolos de la exportación automática\n" +msgstr " --exclude-all-symbols Excluye todos los símbolos de la exportación automática\n" #: emultempl/pe.em:441 #, c-format msgid " --exclude-libs lib,lib,... Exclude libraries from automatic export\n" -msgstr " --exclude-libs bib,bib,... Excluye bibliotecas de la exportación automática\n" +msgstr " --exclude-libs bib,bib,... Excluye bibliotecas de la exportación automática\n" #: emultempl/pe.em:442 #, c-format @@ -164,27 +165,27 @@ msgstr " --exclude-modules-for-implib mod,mod,...\n" #: emultempl/pe.em:443 #, c-format msgid " Exclude objects, archive members from auto\n" -msgstr " Excluye objetos, miembros de archivo de la exportación\n" +msgstr " Excluye objetos, miembros de archivo de la exportación\n" #: emultempl/pe.em:444 #, c-format msgid " export, place into import library instead.\n" -msgstr " automática, los coloca en la biblioteca de importación.\n" +msgstr " automática, los coloca en la biblioteca de importación.\n" #: emultempl/pe.em:445 #, c-format msgid " --export-all-symbols Automatically export all globals to DLL\n" -msgstr " --export-all-symbols Exporta automáticamente todos los globales a la DLL\n" +msgstr " --export-all-symbols Exporta automáticamente todos los globales a la DLL\n" #: emultempl/pe.em:446 #, c-format msgid " --kill-at Remove @nn from exported symbols\n" -msgstr " --kill-at Elimina @nn de los símbolos exportados\n" +msgstr " --kill-at Elimina @nn de los símbolos exportados\n" #: emultempl/pe.em:447 #, c-format msgid " --out-implib Generate import library\n" -msgstr " --out-implib Genera una biblioteca de importación\n" +msgstr " --out-implib Genera una biblioteca de importación\n" #: emultempl/pe.em:448 #, c-format @@ -202,8 +203,8 @@ msgid "" " --compat-implib Create backward compatible import libs;\n" " create __imp_ as well.\n" msgstr "" -" --compat-implib Crea bibliotecas de importación compatibles hacia atrás;\n" -" crea además __imp_.\n" +" --compat-implib Crea bibliotecas de importación compatibles hacia atrás;\n" +" crea además __imp_.\n" #: emultempl/pe.em:452 #, c-format @@ -211,13 +212,13 @@ msgid "" " --enable-auto-image-base Automatically choose image base for DLLs\n" " unless user specifies one\n" msgstr "" -" --enable-auto-image-base Escoge automáticamente la imagen base para las DLLs\n" +" --enable-auto-image-base Escoge automáticamente la imagen base para las DLLs\n" " a menos que el usuario especifique una\n" #: emultempl/pe.em:454 #, c-format msgid " --disable-auto-image-base Do not auto-choose image base. (default)\n" -msgstr " --disable-auto-image-base No escoge automáticamente una imagen base. (por defecto)\n" +msgstr " --disable-auto-image-base No escoge automáticamente una imagen base. (por defecto)\n" #: emultempl/pe.em:455 #, c-format @@ -226,8 +227,8 @@ msgid "" " an importlib, use .dll\n" " in preference to lib.dll \n" msgstr "" -" --dll-search-prefix= Al enlazar dinámicamente con una dll sin una\n" -" biblioteca de importación, usa .dll \n" +" --dll-search-prefix= Al enlazar dinámicamente con una dll sin una\n" +" biblioteca de importación, usa .dll \n" " en lugar de lib.dll \n" #: emultempl/pe.em:458 @@ -242,7 +243,7 @@ msgstr "" #: emultempl/pe.em:460 #, c-format msgid " --disable-auto-import Do not auto-import DATA items from DLLs\n" -msgstr " --disable-auto-import No importa automáticamente elementos DATA de las DLLs\n" +msgstr " --disable-auto-import No importa automáticamente elementos DATA de las DLLs\n" #: emultempl/pe.em:461 #, c-format @@ -251,9 +252,9 @@ msgid "" " adding pseudo-relocations resolved at\n" " runtime.\n" msgstr "" -" --enable-runtime-pseudo-reloc Evita limitaciones de autoimportación\n" +" --enable-runtime-pseudo-reloc Evita limitaciones de autoimportación\n" " agregando pseudo-reubicaciones resueltas\n" -" al momento de ejecución.\n" +" al momento de ejecución.\n" #: emultempl/pe.em:464 #, c-format @@ -262,7 +263,7 @@ msgid "" " auto-imported DATA.\n" msgstr "" " --disable-runtime-pseudo-reloc No agrega pseudo-reubicaciones al momento\n" -" de ejecución para DATOS autoimportados.\n" +" de ejecución para DATOS autoimportados.\n" #: emultempl/pe.em:466 #, c-format @@ -270,8 +271,8 @@ msgid "" " --enable-extra-pe-debug Enable verbose debug output when building\n" " or linking to DLLs (esp. auto-import)\n" msgstr "" -" --enable-extra-pe-debug Activa la salida de depuración detallada al construir\n" -" o enlazar a DLLs (en part. con auto-importación)\n" +" --enable-extra-pe-debug Activa la salida de depuración detallada al construir\n" +" o enlazar a DLLs (en part. con auto-importación)\n" #: emultempl/pe.em:469 #, c-format @@ -288,8 +289,8 @@ msgid "" " --enable-long-section-names Use long COFF section names even in\n" " executable image files\n" msgstr "" -" --enable-long-section-names Usa nombres de sección COFF largos aún\n" -" en ficheros de imágenes ejecutables\n" +" --enable-long-section-names Usa nombres de sección COFF largos aún\n" +" en ficheros de imágenes ejecutables\n" #: emultempl/pe.em:473 #, c-format @@ -297,8 +298,8 @@ msgid "" " --disable-long-section-names Never use long COFF section names, even\n" " in object files\n" msgstr "" -" --disable-long-section-names Nunca usa nombres de sección COFF largos,\n" -" aún en ficheros objeto\n" +" --disable-long-section-names Nunca usa nombres de sección COFF largos,\n" +" aún en ficheros objeto\n" #: emultempl/pe.em:475 #, c-format @@ -306,24 +307,24 @@ msgid "" " --dynamicbase\t\t\t Image base address may be relocated using\n" "\t\t\t\t address space layout randomization (ASLR)\n" msgstr "" -" --dynamicbase\t\t\t La dirección base de la imagen se puede\n" -"\t\t\t\t reubicar usando la disposición aleatoria\n" -"\t\t\t\t del espacio de direcciones (en inglés: ASLR)\n" +" --dynamicbase\t\t\t La dirección base de la imagen se puede\n" +"\t\t\t\t reubicar usando la disposición aleatoria\n" +"\t\t\t\t del espacio de direcciones (en inglés: ASLR)\n" #: emultempl/pe.em:477 #, c-format msgid " --forceinteg\t\t Code integrity checks are enforced\n" -msgstr " --forceinteg\t\t Activa la revisión de integridad de código\n" +msgstr " --forceinteg\t\t Activa la revisión de integridad de código\n" #: emultempl/pe.em:478 #, c-format msgid " --nxcompat\t\t Image is compatible with data execution prevention\n" -msgstr " --nxcompat\t\t La imagen es compatible con la prevención de ejecución de datos\n" +msgstr " --nxcompat\t\t La imagen es compatible con la prevención de ejecución de datos\n" #: emultempl/pe.em:479 #, c-format msgid " --no-isolation\t\t Image understands isolation but do not isolate the image\n" -msgstr " --no-isolation\t\t La imagen entiende aislamiento, pero no aísla la imagen\n" +msgstr " --no-isolation\t\t La imagen entiende aislamiento, pero no aísla la imagen\n" #: emultempl/pe.em:480 #, c-format @@ -351,19 +352,19 @@ msgstr " --tsaware La imagen funciona con Terminal Server\n" #: emultempl/pe.em:613 msgid "%P: warning: bad version number in -subsystem option\n" -msgstr "%P: aviso: número de versión erróneo en la opción -subsystem\n" +msgstr "%P: aviso: número de versión erróneo en la opción -subsystem\n" #: emultempl/pe.em:638 msgid "%P%F: invalid subsystem type %s\n" -msgstr "%P%F: tipo de subsistema %s inválido\n" +msgstr "%P%F: tipo de subsistema %s inválido\n" #: emultempl/pe.em:659 msgid "%P%F: invalid hex number for PE parameter '%s'\n" -msgstr "%P%F: número hexadecimal inválido para el parámetro PE '%s'\n" +msgstr "%P%F: número hexadecimal inválido para el parámetro PE '%s'\n" #: emultempl/pe.em:676 msgid "%P%F: strange hex info for PE parameter '%s'\n" -msgstr "%P%F: información hexadecimal extraña para el parámetro PE '%s'\n" +msgstr "%P%F: información hexadecimal extraña para el parámetro PE '%s'\n" #: emultempl/pe.em:693 #, c-format @@ -372,11 +373,11 @@ msgstr "%s: No se puede abrir el fichero base %s\n" #: emultempl/pe.em:969 msgid "%P: warning, file alignment > section alignment.\n" -msgstr "%P: aviso, alineación del fichero > alineación de la sección.\n" +msgstr "%P: aviso, alineación del fichero > alineación de la sección.\n" #: emultempl/pe.em:982 msgid "%P: warning: --export-dynamic is not supported for PE targets, did you mean --export-all-symbols?\n" -msgstr "%P: aviso: --export-dynamic no se admite para objetivos PE, ¿quiso decir --export-all-symbols?\n" +msgstr "%P: aviso: --export-dynamic no se admite para objetivos PE, ¿quiso decir --export-all-symbols?\n" #: emultempl/pe.em:1058 emultempl/pe.em:1085 #, c-format @@ -394,26 +395,26 @@ msgstr "Use --disable-stdcall-fixup para desactivar estas composturas\n" #: emultempl/pe.em:1110 #, c-format msgid "%C: Cannot get section contents - auto-import exception\n" -msgstr "%C: No se puede obtener el contenido de la sección - excepción de auto-importación\n" +msgstr "%C: No se puede obtener el contenido de la sección - excepción de auto-importación\n" #: emultempl/pe.em:1150 #, c-format msgid "Info: resolving %s by linking to %s (auto-import)\n" -msgstr "Información: se resuelve %s al enlazar con %s (auto-importación)\n" +msgstr "Información: se resuelve %s al enlazar con %s (auto-importación)\n" #: emultempl/pe.em:1157 msgid "" "%P: warning: auto-importing has been activated without --enable-auto-import specified on the command line.\n" "This should work unless it involves constant data structures referencing symbols from auto-imported DLLs.\n" msgstr "" -"%P: aviso: la importación automática se activó sin especificar --enable-auto-import en la línea de órdenes.\n" -"Esto debe funcionar a menos que involucre estructuras de datos constantes que referencíen símbolos de DLLs auto-importadas.\n" +"%P: aviso: la importación automática se activó sin especificar --enable-auto-import en la línea de órdenes.\n" +"Esto debe funcionar a menos que involucre estructuras de datos constantes que referencíen símbolos de DLLs auto-importadas.\n" #: emultempl/pe.em:1164 emultempl/pe.em:1369 emultempl/pe.em:1575 ldcref.c:490 #: ldcref.c:588 ldmain.c:1183 ldmisc.c:286 pe-dll.c:705 pe-dll.c:1253 #: pe-dll.c:1348 msgid "%B%F: could not read symbols: %E\n" -msgstr "%B%F: no se pueden leer símbolos: %E\n" +msgstr "%B%F: no se pueden leer símbolos: %E\n" #: emultempl/pe.em:1245 msgid "%F%P: cannot perform PE operations on non PE output file '%B'.\n" @@ -432,19 +433,19 @@ msgstr "Se encontraron errores al procesar el fichero %s para interoperabilidad\ #: emultempl/pe.em:1701 ldexp.c:542 ldlang.c:3323 ldlang.c:3358 ldlang.c:6804 #: ldlang.c:6835 ldmain.c:1128 msgid "%P%F: bfd_link_hash_lookup failed: %E\n" -msgstr "%P%F: falló bfd_link_hash_lookup: %E\n" +msgstr "%P%F: falló bfd_link_hash_lookup: %E\n" #: ldcref.c:168 msgid "%X%P: bfd_hash_table_init of cref table failed: %E\n" -msgstr "%X%P: falló bfd_hash_table_init de la tabla cref: %E\n" +msgstr "%X%P: falló bfd_hash_table_init de la tabla cref: %E\n" #: ldcref.c:174 msgid "%X%P: cref_hash_lookup failed: %E\n" -msgstr "%X%P: falló cref_hash_lookup: %E\n" +msgstr "%X%P: falló cref_hash_lookup: %E\n" #: ldcref.c:184 msgid "%X%P: cref alloc failed: %E\n" -msgstr "%X%P: falló la reubicación cref: %E\n" +msgstr "%X%P: falló la reubicación cref: %E\n" #: ldcref.c:366 #, c-format @@ -459,7 +460,7 @@ msgstr "" #: ldcref.c:367 msgid "Symbol" -msgstr "Símbolo" +msgstr "Símbolo" #: ldcref.c:375 #, c-format @@ -469,11 +470,11 @@ msgstr "Fichero\n" #: ldcref.c:379 #, c-format msgid "No symbols\n" -msgstr "No hay símbolos\n" +msgstr "No hay símbolos\n" #: ldcref.c:532 msgid "%P: symbol `%T' missing from main hash table\n" -msgstr "%P: falta el símbolo `%T' de la tabla principal de dispersión\n" +msgstr "%P: falta el símbolo `%T' de la tabla principal de dispersión\n" #: ldcref.c:650 ldcref.c:657 ldmain.c:1217 ldmain.c:1224 msgid "%B%F: could not read relocs: %E\n" @@ -497,11 +498,11 @@ msgstr "%P%X: Formatos diferentes de fichero objeto componen al conjunto %s\n" #: ldctor.c:281 ldctor.c:295 msgid "%P%X: %s does not support reloc %s for set %s\n" -msgstr "%P%X: %s no se admite la reubicación %s para el conjunto %s\n" +msgstr "%P%X: %s no se admite la reubicación %s para el conjunto %s\n" #: ldctor.c:316 msgid "%P%X: Unsupported size %d for set %s\n" -msgstr "%P%X: No se admite el tamaño %d para el conjunto %s\n" +msgstr "%P%X: No se admite el tamaño %d para el conjunto %s\n" #: ldctor.c:337 msgid "" @@ -510,7 +511,7 @@ msgid "" "\n" msgstr "" "\n" -"Conjunto Símbolo\n" +"Conjunto Símbolo\n" "\n" #: ldemul.c:265 @@ -525,7 +526,7 @@ msgstr "%S se descarta HLL\n" #: ldemul.c:291 msgid "%P: unrecognised emulation mode: %s\n" -msgstr "%P: no se reconoce el modo de emulación: %s\n" +msgstr "%P: no se reconoce el modo de emulación: %s\n" #: ldemul.c:292 msgid "Supported emulations: " @@ -534,11 +535,11 @@ msgstr "Emulaciones admitidas: " #: ldemul.c:334 #, c-format msgid " no emulation specific options.\n" -msgstr " no hay opciones específicas de emulación.\n" +msgstr " no hay opciones específicas de emulación.\n" #: ldexp.c:313 msgid "%P: warning: address of `%s' isn't multiple of maximum page size\n" -msgstr "%P: aviso: la dirección de `%s' no es un múltiplo del tamaño máximo de página\n" +msgstr "%P: aviso: la dirección de `%s' no es un múltiplo del tamaño máximo de página\n" #: ldexp.c:351 #, c-format @@ -553,69 +554,69 @@ msgstr "%F%S / por cero\n" #: ldexp.c:552 #, c-format msgid "%X%S: unresolvable symbol `%s' referenced in expression\n" -msgstr "%X%S: se referencía el símbolo sin resolución `%s' en la expresión\n" +msgstr "%X%S: se referencía el símbolo sin resolución `%s' en la expresión\n" #: ldexp.c:564 #, c-format msgid "%F%S: undefined symbol `%s' referenced in expression\n" -msgstr "%F%S: se referencía el símbolo sin definir `%s' en la expresión\n" +msgstr "%F%S: se referencía el símbolo sin definir `%s' en la expresión\n" #: ldexp.c:585 ldexp.c:602 ldexp.c:629 #, c-format msgid "%F%S: undefined section `%s' referenced in expression\n" -msgstr "%F%S: se referencía la sección sin definir `%s' en la expresión\n" +msgstr "%F%S: se referencía la sección sin definir `%s' en la expresión\n" #: ldexp.c:656 ldexp.c:670 #, c-format msgid "%F%S: undefined MEMORY region `%s' referenced in expression\n" -msgstr "%F%S: se referencía la región MEMORY sin definir `%s' en la expresión\n" +msgstr "%F%S: se referencía la región MEMORY sin definir `%s' en la expresión\n" #: ldexp.c:681 #, c-format msgid "%F%S: unknown constant `%s' referenced in expression\n" -msgstr "%F%S: se referencía la constante sin definir `%s' en la expresión\n" +msgstr "%F%S: se referencía la constante sin definir `%s' en la expresión\n" #: ldexp.c:743 #, c-format msgid "%F%S can not PROVIDE assignment to location counter\n" -msgstr "%F%S no se puede hacer una asignación PROVIDE al contador de ubicación\n" +msgstr "%F%S no se puede hacer una asignación PROVIDE al contador de ubicación\n" #: ldexp.c:757 #, c-format msgid "%F%S invalid assignment to location counter\n" -msgstr "%F%S asignación inválida al contador de ubicación\n" +msgstr "%F%S asignación inválida al contador de ubicación\n" #: ldexp.c:760 #, c-format msgid "%F%S assignment to location counter invalid outside of SECTION\n" -msgstr "%F%S asignación al contador de ubicación inválida fuera de SECTION\n" +msgstr "%F%S asignación al contador de ubicación inválida fuera de SECTION\n" #: ldexp.c:773 msgid "%F%S cannot move location counter backwards (from %V to %V)\n" -msgstr "%F%S no se puede mover el contador de ubicación hacia atrás (de %V a %V)\n" +msgstr "%F%S no se puede mover el contador de ubicación hacia atrás (de %V a %V)\n" #: ldexp.c:812 msgid "%P%F:%s: hash creation failed\n" -msgstr "%P%F:%s: falló la creación de la dispersión\n" +msgstr "%P%F:%s: falló la creación de la dispersión\n" #: ldexp.c:1119 ldexp.c:1144 ldexp.c:1204 #, c-format msgid "%F%S: nonconstant expression for %s\n" -msgstr "%F%S: la expresión no es constante para %s\n" +msgstr "%F%S: la expresión no es constante para %s\n" #: ldfile.c:141 #, c-format msgid "attempt to open %s failed\n" -msgstr "falló el intento de abrir %s\n" +msgstr "falló el intento de abrir %s\n" #: ldfile.c:143 #, c-format msgid "attempt to open %s succeeded\n" -msgstr "tuvo éxito el intento de abrir %s\n" +msgstr "tuvo éxito el intento de abrir %s\n" #: ldfile.c:149 msgid "%F%P: invalid BFD target `%s'\n" -msgstr "%F%P: objetivo BFD inválido `%s'\n" +msgstr "%F%P: objetivo BFD inválido `%s'\n" #: ldfile.c:266 ldfile.c:295 msgid "%P: skipping incompatible %s when searching for %s\n" @@ -623,11 +624,11 @@ msgstr "%P: se salta el %s incompatible mientras se busca %s\n" #: ldfile.c:279 msgid "%F%P: attempted static link of dynamic object `%s'\n" -msgstr "%F%P: se intentó el enlazado estático del objeto dinámico `%s'\n" +msgstr "%F%P: se intentó el enlazado estático del objeto dinámico `%s'\n" #: ldfile.c:332 ldmain.c:832 msgid "%P%F: %s: plugin reported error claiming file\n" -msgstr "%P%F: %s: el plugin reportó error al reclamar el fichero\n" +msgstr "%P%F: %s: el plugin reportó error al reclamar el fichero\n" #: ldfile.c:447 msgid "%P: cannot find %s (%s): %E\n" @@ -648,48 +649,48 @@ msgstr "%P: no se puede encontrar %s\n" #: ldfile.c:507 ldfile.c:525 #, c-format msgid "cannot find script file %s\n" -msgstr "no se puede encontrar el fichero de guión %s\n" +msgstr "no se puede encontrar el fichero de guión %s\n" #: ldfile.c:509 ldfile.c:527 #, c-format msgid "opened script file %s\n" -msgstr "fichero de guión %s abierto\n" +msgstr "fichero de guión %s abierto\n" #: ldfile.c:657 msgid "%P%F: cannot open linker script file %s: %E\n" -msgstr "%P%F: no se puede abrir el fichero de guión del enlazador %s: %E\n" +msgstr "%P%F: no se puede abrir el fichero de guión del enlazador %s: %E\n" #: ldfile.c:722 msgid "%P%F: cannot represent machine `%s'\n" -msgstr "%P%F: no se puede representar la máquina `%s'\n" +msgstr "%P%F: no se puede representar la máquina `%s'\n" #: ldlang.c:1160 ldlang.c:1202 ldlang.c:3048 msgid "%P%F: can not create hash table: %E\n" -msgstr "%P%F: no se puede crear la tabla de dispersión: %E\n" +msgstr "%P%F: no se puede crear la tabla de dispersión: %E\n" #: ldlang.c:1253 msgid "%P:%S: warning: redeclaration of memory region `%s'\n" -msgstr "%P:%S: aviso: redeclaración de la región de memoria `%s'\n" +msgstr "%P:%S: aviso: redeclaración de la región de memoria `%s'\n" #: ldlang.c:1259 msgid "%P:%S: warning: memory region `%s' not declared\n" -msgstr "%P:%S: aviso: no se declaró la región de memoria `%s'\n" +msgstr "%P:%S: aviso: no se declaró la región de memoria `%s'\n" #: ldlang.c:1293 msgid "%F%P:%S: error: alias for default memory region\n" -msgstr "%F%P:%S: aviso: alias para la región de memoria por defecto\n" +msgstr "%F%P:%S: aviso: alias para la región de memoria por defecto\n" #: ldlang.c:1304 msgid "%F%P:%S: error: redefinition of memory region alias `%s'\n" -msgstr "%F%P:%S: aviso: redefinición del alias de la región de memoria '%s'\n" +msgstr "%F%P:%S: aviso: redefinición del alias de la región de memoria '%s'\n" #: ldlang.c:1311 msgid "%F%P:%S: error: memory region `%s' for alias `%s' does not exist\n" -msgstr "%F%P:%S: aviso: no existe la región de memoria `%s' para el alias `%s'\n" +msgstr "%F%P:%S: aviso: no existe la región de memoria `%s' para el alias `%s'\n" #: ldlang.c:1363 ldlang.c:1402 msgid "%P%F: failed creating section `%s': %E\n" -msgstr "%P%F: falló la creación de la sección `%s': %E\n" +msgstr "%P%F: falló la creación de la sección `%s': %E\n" #: ldlang.c:1958 #, c-format @@ -709,7 +710,7 @@ msgid "" "\n" msgstr "" "\n" -"Configuración de la Memoria\n" +"Configuración de la Memoria\n" "\n" #: ldlang.c:1968 @@ -736,16 +737,16 @@ msgid "" "\n" msgstr "" "\n" -"Guión del enlazador y mapa de memoria\n" +"Guión del enlazador y mapa de memoria\n" "\n" #: ldlang.c:2074 msgid "%P%F: Illegal use of `%s' section\n" -msgstr "%P%F: Uso ilegal de la sección `%s'\n" +msgstr "%P%F: Uso ilegal de la sección `%s'\n" #: ldlang.c:2083 msgid "%P%F: output format %s cannot represent section called %s\n" -msgstr "%P%F: el formato de salida %s no puede representar la sección llamada %s\n" +msgstr "%P%F: el formato de salida %s no puede representar la sección llamada %s\n" #: ldlang.c:2636 msgid "%B: file not recognized: %E\n" @@ -765,15 +766,15 @@ msgstr "%F%B: el miembro %B en el archivo no es un objeto\n" #: ldlang.c:2730 ldlang.c:2744 msgid "%F%B: could not read symbols: %E\n" -msgstr "%F%B: no se puede leer símbolos: %E\n" +msgstr "%F%B: no se puede leer símbolos: %E\n" #: ldlang.c:3018 msgid "%P: warning: could not find any targets that match endianness requirement\n" -msgstr "%P: aviso: no se puede encontrar ningún objetivo que coincida con los requerimientos de `endianez'\n" +msgstr "%P: aviso: no se puede encontrar ningún objetivo que coincida con los requerimientos de `endianez'\n" #: ldlang.c:3032 msgid "%P%F: target %s not found\n" -msgstr "%P%F: no se encontró el objetivo %s\n" +msgstr "%P%F: no se encontró el objetivo %s\n" #: ldlang.c:3034 msgid "%P%F: cannot open output file %s: %E\n" @@ -789,15 +790,15 @@ msgstr "%P%F:%s: no se puede establecer la arquitectura: %E\n" #: ldlang.c:3185 msgid "%P: warning: %s contains output sections; did you forget -T?\n" -msgstr "%P: aviso: %s contiene secciones de salida. ¿Olvidó -T?\n" +msgstr "%P: aviso: %s contiene secciones de salida. ¿Olvidó -T?\n" #: ldlang.c:3215 msgid "%P%F: bfd_hash_lookup failed creating symbol %s\n" -msgstr "%P%F: falló bfd_hash_lookup al crear el símbolo %s\n" +msgstr "%P%F: falló bfd_hash_lookup al crear el símbolo %s\n" #: ldlang.c:3233 msgid "%P%F: bfd_hash_allocate failed creating symbol %s\n" -msgstr "%P%F: falló bfd_hash_allocate al crear el símbolo %s\n" +msgstr "%P%F: falló bfd_hash_allocate al crear el símbolo %s\n" #: ldlang.c:3688 msgid "%F%P: %s not found for insert\n" @@ -805,94 +806,94 @@ msgstr "%F%P: no se puede encontrar %s para insert\n" #: ldlang.c:3903 msgid " load address 0x%V" -msgstr " dirección de carga 0x%V" +msgstr " dirección de carga 0x%V" #: ldlang.c:4179 msgid "%W (size before relaxing)\n" -msgstr "%W (tamaño antes de la relajación)\n" +msgstr "%W (tamaño antes de la relajación)\n" #: ldlang.c:4270 #, c-format msgid "Address of section %s set to " -msgstr "La dirección de la sección %s se estableció a " +msgstr "La dirección de la sección %s se estableció a " #: ldlang.c:4423 #, c-format msgid "Fail with %d\n" -msgstr "Falló con %d\n" +msgstr "Falló con %d\n" #: ldlang.c:4710 msgid "%X%P: section %s loaded at [%V,%V] overlaps section %s loaded at [%V,%V]\n" -msgstr "%X%P: la sección %s cargada en [%V,%V] sobreescribe la sección %s cargada en [%V,%V]\n" +msgstr "%X%P: la sección %s cargada en [%V,%V] sobreescribe la sección %s cargada en [%V,%V]\n" #: ldlang.c:4726 msgid "%X%P: region `%s' overflowed by %ld bytes\n" -msgstr "%X%P: la región `%s' se desborda por %ld bytes\n" +msgstr "%X%P: la región `%s' se desborda por %ld bytes\n" #: ldlang.c:4749 msgid "%X%P: address 0x%v of %B section `%s' is not within region `%s'\n" -msgstr "%X%P: la dirección 0x%v de la sección %B %s no está dentro de la región `%s'\n" +msgstr "%X%P: la dirección 0x%v de la sección %B %s no está dentro de la región `%s'\n" #: ldlang.c:4760 msgid "%X%P: %B section `%s' will not fit in region `%s'\n" -msgstr "%X%P: la sección %B `%s' no cabe en la región `%s'\n" +msgstr "%X%P: la sección %B `%s' no cabe en la región `%s'\n" #: ldlang.c:4816 #, c-format msgid "%F%S: non constant or forward reference address expression for section %s\n" -msgstr "%F%S: expresión de dirección de referencia hacia adelante o no constante para la sección %s\n" +msgstr "%F%S: expresión de dirección de referencia hacia adelante o no constante para la sección %s\n" #: ldlang.c:4841 msgid "%P%X: Internal error on COFF shared library section %s\n" -msgstr "%P%X: Error interno en la sección de biblioteca compartida COFF %s\n" +msgstr "%P%X: Error interno en la sección de biblioteca compartida COFF %s\n" #: ldlang.c:4900 msgid "%P%F: error: no memory region specified for loadable section `%s'\n" -msgstr "%P%F: aviso: no se especificó una región de memoria para la sección cargable `%s'\n" +msgstr "%P%F: aviso: no se especificó una región de memoria para la sección cargable `%s'\n" #: ldlang.c:4905 msgid "%P: warning: no memory region specified for loadable section `%s'\n" -msgstr "%P: aviso: no se especificó una región de memoria para la sección cargable `%s'\n" +msgstr "%P: aviso: no se especificó una región de memoria para la sección cargable `%s'\n" #: ldlang.c:4927 msgid "%P: warning: changing start of section %s by %lu bytes\n" -msgstr "%P: aviso: se cambia el inicio de la sección %s por %lu bytes\n" +msgstr "%P: aviso: se cambia el inicio de la sección %s por %lu bytes\n" #: ldlang.c:5004 msgid "%P: warning: dot moved backwards before `%s'\n" -msgstr "%P: aviso: el punto se movió hacia atrás antes de `%s'\n" +msgstr "%P: aviso: el punto se movió hacia atrás antes de `%s'\n" #: ldlang.c:5170 msgid "%P%F: can't relax section: %E\n" -msgstr "%P%F: no se puede relajar la sección: %E\n" +msgstr "%P%F: no se puede relajar la sección: %E\n" #: ldlang.c:5497 msgid "%F%P: invalid data statement\n" -msgstr "%F%P: declaración de datos inválida\n" +msgstr "%F%P: declaración de datos inválida\n" #: ldlang.c:5530 msgid "%F%P: invalid reloc statement\n" -msgstr "%F%P: declaración de reubicación inválida\n" +msgstr "%F%P: declaración de reubicación inválida\n" #: ldlang.c:5648 msgid "%P%F: gc-sections requires either an entry or an undefined symbol\n" -msgstr "%P%F: las secciones-gc requieren de una entrada o un símbolo indefinido\n" +msgstr "%P%F: las secciones-gc requieren de una entrada o un símbolo indefinido\n" #: ldlang.c:5673 msgid "%P%F:%s: can't set start address\n" -msgstr "%P%F:%s: no se puede establecer la dirección de inicio\n" +msgstr "%P%F:%s: no se puede establecer la dirección de inicio\n" #: ldlang.c:5686 ldlang.c:5705 msgid "%P%F: can't set start address\n" -msgstr "%P%F: no se puede establecer la dirección de inicio\n" +msgstr "%P%F: no se puede establecer la dirección de inicio\n" #: ldlang.c:5698 msgid "%P: warning: cannot find entry symbol %s; defaulting to %V\n" -msgstr "%P: aviso: no se puede encontrar el símbolo de entrada %s; se usa por defecto %V\n" +msgstr "%P: aviso: no se puede encontrar el símbolo de entrada %s; se usa por defecto %V\n" #: ldlang.c:5710 msgid "%P: warning: cannot find entry symbol %s; not setting start address\n" -msgstr "%P: aviso: no se puede encontrar el símbolo de entrada %s; no se establece la dirección de inicio\n" +msgstr "%P: aviso: no se puede encontrar el símbolo de entrada %s; no se establece la dirección de inicio\n" #: ldlang.c:5760 msgid "%P%F: Relocatable linking with relocations from format %s (%B) to format %s (%B) is not supported\n" @@ -904,11 +905,11 @@ msgstr "%P%X: la arquitectura %s del fichero de entrada `%B' es incompatible con #: ldlang.c:5792 msgid "%P%X: failed to merge target specific data of file %B\n" -msgstr "%P%X: falló la mezcla de datos específicos de objetivo del fichero %B\n" +msgstr "%P%X: falló la mezcla de datos específicos de objetivo del fichero %B\n" #: ldlang.c:5863 msgid "%P%F: Could not define common symbol `%T': %E\n" -msgstr "%P%F: No se puede definir el símbolo común `%T': %E\n" +msgstr "%P%F: No se puede definir el símbolo común `%T': %E\n" #: ldlang.c:5875 msgid "" @@ -916,35 +917,35 @@ msgid "" "Allocating common symbols\n" msgstr "" "\n" -"Se asignan símbolos comunes\n" +"Se asignan símbolos comunes\n" #: ldlang.c:5876 msgid "" "Common symbol size file\n" "\n" msgstr "" -"Símbolo común tamaño fichero\n" +"Símbolo común tamaño fichero\n" "\n" #: ldlang.c:6022 msgid "%P%F: invalid syntax in flags\n" -msgstr "%P%F: sintaxis inválida en los interruptores\n" +msgstr "%P%F: sintaxis inválida en los interruptores\n" #: ldlang.c:6415 msgid "%P%F: Failed to create hash table\n" -msgstr "%P%F: Falló al crear la tabla de dispersión\n" +msgstr "%P%F: Falló al crear la tabla de dispersión\n" #: ldlang.c:6430 msgid "%P%F: %s: plugin reported error after all symbols read\n" -msgstr "%P%F: %s: el plugin reportó error después de leer todos los símbolos\n" +msgstr "%P%F: %s: el plugin reportó error después de leer todos los símbolos\n" #: ldlang.c:6717 msgid "%P%F: multiple STARTUP files\n" -msgstr "%P%F: ficheros STARTUP múltiples\n" +msgstr "%P%F: ficheros STARTUP múltiples\n" #: ldlang.c:6765 msgid "%X%P:%S: section has both a load address and a load region\n" -msgstr "%X%P:%S: la sección tiene tanto una dirección de carga como una región de carga\n" +msgstr "%X%P:%S: la sección tiene tanto una dirección de carga como una región de carga\n" #: ldlang.c:6950 msgid "%X%P:%S: PHDRS and FILEHDR are not supported when prior PT_LOAD headers lack them\n" @@ -956,35 +957,35 @@ msgstr "%F%P: no se asignaron secciones a phdrs\n" #: ldlang.c:7060 msgid "%F%P: bfd_record_phdr failed: %E\n" -msgstr "%F%P: falló bfd_record_phdr: %E\n" +msgstr "%F%P: falló bfd_record_phdr: %E\n" #: ldlang.c:7080 msgid "%X%P: section `%s' assigned to non-existent phdr `%s'\n" -msgstr "%X%P: se asignó la sección `%s' al phdr que no existe `%s'\n" +msgstr "%X%P: se asignó la sección `%s' al phdr que no existe `%s'\n" #: ldlang.c:7481 msgid "%X%P: unknown language `%s' in version information\n" -msgstr "%X%P: lenguaje `%s' desconocido en la información de la versión\n" +msgstr "%X%P: lenguaje `%s' desconocido en la información de la versión\n" #: ldlang.c:7626 msgid "%X%P: anonymous version tag cannot be combined with other version tags\n" -msgstr "%X%P: la marca de versión anónima no se puede combinar con otras marcas de versión\n" +msgstr "%X%P: la marca de versión anónima no se puede combinar con otras marcas de versión\n" #: ldlang.c:7635 msgid "%X%P: duplicate version tag `%s'\n" -msgstr "%X%P: marca de versión `%s' duplicada\n" +msgstr "%X%P: marca de versión `%s' duplicada\n" #: ldlang.c:7656 ldlang.c:7665 ldlang.c:7683 ldlang.c:7693 msgid "%X%P: duplicate expression `%s' in version information\n" -msgstr "%X%P: expresión `%s' duplicada en la información de la versión\n" +msgstr "%X%P: expresión `%s' duplicada en la información de la versión\n" #: ldlang.c:7733 msgid "%X%P: unable to find version dependency `%s'\n" -msgstr "%X%P: no se puede encontrar la dependencia de versión `%s'\n" +msgstr "%X%P: no se puede encontrar la dependencia de versión `%s'\n" #: ldlang.c:7756 msgid "%X%P: unable to read .exports section contents\n" -msgstr "%X%P: no se pueden leer los contenidos de la sección .exports\n" +msgstr "%X%P: no se pueden leer los contenidos de la sección .exports\n" #: ldmain.c:239 msgid "%X%P: can't set BFD default target to `%s': %E\n" @@ -1004,11 +1005,11 @@ msgstr "%P%F: no se puede usar -f sin -shared\n" #: ldmain.c:400 msgid "using external linker script:" -msgstr "se usa el guión externo del enlazador:" +msgstr "se usa el guión externo del enlazador:" #: ldmain.c:402 msgid "using internal linker script:" -msgstr "se usa el guión interno del enlazador:" +msgstr "se usa el guión interno del enlazador:" #: ldmain.c:436 msgid "%P%F: no input files\n" @@ -1032,7 +1033,7 @@ msgstr "%P: se encontraron errores de enlace, se borra el ejecutable `%s'\n" #: ldmain.c:503 msgid "%F%B: final close failed: %E\n" -msgstr "%F%B: falló el cerrado final: %E\n" +msgstr "%F%B: falló el cerrado final: %E\n" #: ldmain.c:529 msgid "%X%P: unable to open for source of copy `%s'\n" @@ -1059,7 +1060,7 @@ msgstr "%s: tiempo total de enlazado: %ld.%06ld\n" #: ldmain.c:563 #, c-format msgid "%s: data size %ld\n" -msgstr "%s: tamaño de los datos %ld\n" +msgstr "%s: tamaño de los datos %ld\n" #: ldmain.c:646 msgid "%P%F: missing argument to -m\n" @@ -1067,19 +1068,19 @@ msgstr "%P%F: falta el argumento para -m\n" #: ldmain.c:694 ldmain.c:714 ldmain.c:746 plugin.c:772 msgid "%P%F: bfd_hash_table_init failed: %E\n" -msgstr "%P%F: falló bfd_hash_table_init: %E\n" +msgstr "%P%F: falló bfd_hash_table_init: %E\n" #: ldmain.c:698 ldmain.c:718 msgid "%P%F: bfd_hash_lookup failed: %E\n" -msgstr "%P%F: falló bfd_hash_lookup: %E\n" +msgstr "%P%F: falló bfd_hash_lookup: %E\n" #: ldmain.c:732 msgid "%X%P: error: duplicate retain-symbols-file\n" -msgstr "%X%P: error: fichero de símbolos a retener duplicado\n" +msgstr "%X%P: error: fichero de símbolos a retener duplicado\n" #: ldmain.c:776 msgid "%P%F: bfd_hash_lookup for insertion failed: %E\n" -msgstr "%P%F: falló bfd_hash_lookup para la inserción: %E\n" +msgstr "%P%F: falló bfd_hash_lookup para la inserción: %E\n" #: ldmain.c:781 msgid "%P: `-retain-symbols-file' overrides `-s' and `-S'\n" @@ -1091,66 +1092,66 @@ msgid "" "Archive member included because of file (symbol)\n" "\n" msgstr "" -"Se incluyó el miembro del archivo debido al fichero (símbolo)\n" +"Se incluyó el miembro del archivo debido al fichero (símbolo)\n" "\n" #: ldmain.c:975 msgid "%X%C: multiple definition of `%T'\n" -msgstr "%X%C: definiciones múltiples de `%T'\n" +msgstr "%X%C: definiciones múltiples de `%T'\n" #: ldmain.c:978 msgid "%D: first defined here\n" -msgstr "%D: primero se definió aquí\n" +msgstr "%D: primero se definió aquí\n" #: ldmain.c:982 msgid "%P: Disabling relaxation: it will not work with multiple definitions\n" -msgstr "%P: Se desactiva la relajación: no funcionará con definiciones múltiples\n" +msgstr "%P: Se desactiva la relajación: no funcionará con definiciones múltiples\n" -# FIXME: Revisar en el código fuente si `common' se refiere a una orden o -# se puede sustituir por `común'. cfuga +# FIXME: Revisar en el código fuente si `common' se refiere a una orden o +# se puede sustituir por `común'. cfuga #: ldmain.c:1012 msgid "%B: warning: definition of `%T' overriding common\n" -msgstr "%B: aviso: la definición de `%T' se impone a common\n" +msgstr "%B: aviso: la definición de `%T' se impone a common\n" #: ldmain.c:1015 msgid "%B: warning: common is here\n" -msgstr "%B: aviso: common está aquí\n" +msgstr "%B: aviso: common está aquí\n" #: ldmain.c:1022 msgid "%B: warning: common of `%T' overridden by definition\n" -msgstr "%B: aviso: el common de `%T' se sobrepasa por definición\n" +msgstr "%B: aviso: el common de `%T' se sobrepasa por definición\n" #: ldmain.c:1025 msgid "%B: warning: defined here\n" -msgstr "%B: aviso: se definió aquí\n" +msgstr "%B: aviso: se definió aquí\n" #: ldmain.c:1032 msgid "%B: warning: common of `%T' overridden by larger common\n" -msgstr "%B: aviso: el common de `%T' se sobrepasa con un common más grande\n" +msgstr "%B: aviso: el common de `%T' se sobrepasa con un common más grande\n" #: ldmain.c:1035 msgid "%B: warning: larger common is here\n" -msgstr "%B: aviso: el common más grande está aquí\n" +msgstr "%B: aviso: el common más grande está aquí\n" #: ldmain.c:1039 msgid "%B: warning: common of `%T' overriding smaller common\n" -msgstr "%B: aviso: el common de `%T' se sobrepasa con un common más pequeño\n" +msgstr "%B: aviso: el common de `%T' se sobrepasa con un common más pequeño\n" #: ldmain.c:1042 msgid "%B: warning: smaller common is here\n" -msgstr "%B: aviso: el common más pequeño está aquí\n" +msgstr "%B: aviso: el common más pequeño está aquí\n" #: ldmain.c:1046 msgid "%B: warning: multiple common of `%T'\n" -msgstr "%B: aviso: common múltiple de `%T'\n" +msgstr "%B: aviso: common múltiple de `%T'\n" #: ldmain.c:1048 msgid "%B: warning: previous common is here\n" -msgstr "%B: aviso: el common previo está aquí\n" +msgstr "%B: aviso: el common previo está aquí\n" #: ldmain.c:1068 ldmain.c:1106 msgid "%P: warning: global constructor %s used\n" -msgstr "%P: aviso: se usó el constructor global %s\n" +msgstr "%P: aviso: se usó el constructor global %s\n" #: ldmain.c:1116 msgid "%P%F: BFD backend error: BFD_RELOC_CTOR unsupported\n" @@ -1163,11 +1164,11 @@ msgstr "aviso: " #: ldmain.c:1273 msgid "%F%P: bfd_hash_table_init failed: %E\n" -msgstr "%F%P: falló bfd_hash_table_init: %E\n" +msgstr "%F%P: falló bfd_hash_table_init: %E\n" #: ldmain.c:1280 msgid "%F%P: bfd_hash_lookup failed: %E\n" -msgstr "%F%P: falló bfd_hash_lookup: %E\n" +msgstr "%F%P: falló bfd_hash_lookup: %E\n" #: ldmain.c:1301 msgid "%X%C: undefined reference to `%T'\n" @@ -1179,11 +1180,11 @@ msgstr "%C: aviso: referencia a `%T' sin definir\n" #: ldmain.c:1310 msgid "%X%D: more undefined references to `%T' follow\n" -msgstr "%X%D: más referencias a `%T' sin definir a continuación\n" +msgstr "%X%D: más referencias a `%T' sin definir a continuación\n" #: ldmain.c:1313 msgid "%D: warning: more undefined references to `%T' follow\n" -msgstr "%D: aviso: más referencias a `%T' sin definir a continuación\n" +msgstr "%D: aviso: más referencias a `%T' sin definir a continuación\n" #: ldmain.c:1324 msgid "%X%B: undefined reference to `%T'\n" @@ -1195,50 +1196,50 @@ msgstr "%B: aviso: referencia a `%T' sin definir\n" #: ldmain.c:1333 msgid "%X%B: more undefined references to `%T' follow\n" -msgstr "%X%B: más referencias a `%T' sin definir a continuación\n" +msgstr "%X%B: más referencias a `%T' sin definir a continuación\n" #: ldmain.c:1336 msgid "%B: warning: more undefined references to `%T' follow\n" -msgstr "%B: aviso: más referencias a `%T' sin definir a continuación\n" +msgstr "%B: aviso: más referencias a `%T' sin definir a continuación\n" #: ldmain.c:1375 msgid " additional relocation overflows omitted from the output\n" -msgstr " se omitieron desbordamientos de reubicación adicionales de la salida\n" +msgstr " se omitieron desbordamientos de reubicación adicionales de la salida\n" #: ldmain.c:1388 msgid " relocation truncated to fit: %s against undefined symbol `%T'" -msgstr " reubicación truncada para ajustar: %s contra el símbolo `%T' sin definir" +msgstr " reubicación truncada para ajustar: %s contra el símbolo `%T' sin definir" #: ldmain.c:1393 msgid " relocation truncated to fit: %s against symbol `%T' defined in %A section in %B" -msgstr " reubicación truncada para ajustar: %s contra el símbolo `%T' definido en la sección %A en %B" +msgstr " reubicación truncada para ajustar: %s contra el símbolo `%T' definido en la sección %A en %B" #: ldmain.c:1405 msgid " relocation truncated to fit: %s against `%T'" -msgstr " reubicación truncada para ajustar: %s contra `%T'" +msgstr " reubicación truncada para ajustar: %s contra `%T'" #: ldmain.c:1422 #, c-format msgid "%X%C: dangerous relocation: %s\n" -msgstr "%X%C: reubicación peligrosa: %s\n" +msgstr "%X%C: reubicación peligrosa: %s\n" #: ldmain.c:1437 msgid "%X%C: reloc refers to symbol `%T' which is not being output\n" -msgstr "%X%C: la reubicación se refiere al símbolo `%T' el cual no se muestra\n" +msgstr "%X%C: la reubicación se refiere al símbolo `%T' el cual no se muestra\n" #: ldmisc.c:149 #, c-format msgid "no symbol" -msgstr "no hay símbolo" +msgstr "no hay símbolo" #: ldmisc.c:246 #, c-format msgid "built in linker script:%u" -msgstr "guión interno del enlazador:%u" +msgstr "guión interno del enlazador:%u" #: ldmisc.c:324 msgid "%B: In function `%T':\n" -msgstr "%B: En la función `%T':\n" +msgstr "%B: En la función `%T':\n" #: ldmisc.c:451 msgid "%F%P: internal error %s %d\n" @@ -1246,11 +1247,11 @@ msgstr "%F%P: error interno %s %d\n" #: ldmisc.c:500 msgid "%P: internal error: aborting at %s line %d in %s\n" -msgstr "%P: error interno: se aborta en %s línea %d en %s\n" +msgstr "%P: error interno: se aborta en %s línea %d en %s\n" #: ldmisc.c:503 msgid "%P: internal error: aborting at %s line %d\n" -msgstr "%P: error interno: se aborta en %s línea %d\n" +msgstr "%P: error interno: se aborta en %s línea %d\n" #: ldmisc.c:505 msgid "%P%F: please report this bug\n" @@ -1274,10 +1275,10 @@ msgid "" "the GNU General Public License version 3 or (at your option) a later version.\n" "This program has absolutely no warranty.\n" msgstr "" -"Este programa es software libre; se puede redistribuir bajo los términos de\n" -"la Licencia Pública General de GNU versión 3 o (a su elección) una versión\n" +"Este programa es software libre; se puede redistribuir bajo los términos de\n" +"la Licencia Pública General de GNU versión 3 o (a su elección) una versión\n" "posterior.\n" -"Este programa no tiene absolutamente ninguna garantía.\n" +"Este programa no tiene absolutamente ninguna garantía.\n" #: ldver.c:54 #, c-format @@ -1286,24 +1287,24 @@ msgstr " Emulaciones admitidas:\n" #: ldwrite.c:62 ldwrite.c:207 msgid "%P%F: bfd_new_link_order failed\n" -msgstr "%P%F: falló bfd_new_link_order\n" +msgstr "%P%F: falló bfd_new_link_order\n" #: ldwrite.c:365 msgid "%F%P: cannot create split section name for %s\n" -msgstr "%F%P: no se puede crear el nombre de sección dividida para %s\n" +msgstr "%F%P: no se puede crear el nombre de sección dividida para %s\n" #: ldwrite.c:377 msgid "%F%P: clone section failed: %E\n" -msgstr "%F%P: falló la clonación de la sección: %E\n" +msgstr "%F%P: falló la clonación de la sección: %E\n" #: ldwrite.c:418 #, c-format msgid "%8x something else\n" -msgstr "%8x algo más\n" +msgstr "%8x algo más\n" #: ldwrite.c:588 msgid "%F%P: final link failed: %E\n" -msgstr "%F%P: falló el enlace final: %E\n" +msgstr "%F%P: falló el enlace final: %E\n" #: lexsup.c:219 lexsup.c:368 msgid "KEYWORD" @@ -1336,23 +1337,23 @@ msgstr "FICHERO" #: lexsup.c:227 msgid "Read MRI format linker script" -msgstr "Lee el guión del enlazador de formato MRI" +msgstr "Lee el guión del enlazador de formato MRI" #: lexsup.c:229 msgid "Force common symbols to be defined" -msgstr "Fuerza que se definan los símbolos comunes" +msgstr "Fuerza que se definan los símbolos comunes" #: lexsup.c:233 lexsup.c:545 lexsup.c:547 lexsup.c:549 lexsup.c:551 msgid "ADDRESS" -msgstr "DIRECCIÓN" +msgstr "DIRECCIÓN" #: lexsup.c:233 msgid "Set start address" -msgstr "Establece la dirección de inicio" +msgstr "Establece la dirección de inicio" #: lexsup.c:235 msgid "Export all dynamic symbols" -msgstr "Exporta todos los símbolos dinámicos" +msgstr "Exporta todos los símbolos dinámicos" #: lexsup.c:237 msgid "Undo the effect of --export-dynamic" @@ -1372,11 +1373,11 @@ msgstr "BIBCOMP" #: lexsup.c:243 msgid "Auxiliary filter for shared object symbol table" -msgstr "Filtro auxiliar para la tabla de símbolos de objetos compartidos" +msgstr "Filtro auxiliar para la tabla de símbolos de objetos compartidos" #: lexsup.c:246 msgid "Filter for shared object symbol table" -msgstr "Filtro para la tabla de símbolos de objetos compartidos" +msgstr "Filtro para la tabla de símbolos de objetos compartidos" #: lexsup.c:249 msgid "Ignored" @@ -1384,11 +1385,11 @@ msgstr "Se descarta" #: lexsup.c:251 msgid "SIZE" -msgstr "TAMAÑO" +msgstr "TAMAÑO" #: lexsup.c:251 msgid "Small data size (if no size, same as --shared)" -msgstr "Tamaño de los datos small (si no se especifica, es el mismo que --shared)" +msgstr "Tamaño de los datos small (si no se especifica, es el mismo que --shared)" #: lexsup.c:254 msgid "FILENAME" @@ -1404,7 +1405,7 @@ msgstr "PROGRAMA" #: lexsup.c:256 msgid "Set PROGRAM as the dynamic linker to use" -msgstr "Establece el PROGRAMA como el enlazador dinámico a utilizar" +msgstr "Establece el PROGRAMA como el enlazador dinámico a utilizar" #: lexsup.c:259 msgid "LIBNAME" @@ -1420,23 +1421,23 @@ msgstr "DIRECTORIO" #: lexsup.c:261 msgid "Add DIRECTORY to library search path" -msgstr "Agrega el DIRECTORIO a la ruta de búsqueda de bibliotecas" +msgstr "Agrega el DIRECTORIO a la ruta de búsqueda de bibliotecas" #: lexsup.c:264 msgid "Override the default sysroot location" -msgstr "Sobreescribe la ubicación de sysroot por defecto" +msgstr "Sobreescribe la ubicación de sysroot por defecto" #: lexsup.c:266 msgid "EMULATION" -msgstr "EMULACIÓN" +msgstr "EMULACIÓN" #: lexsup.c:266 msgid "Set emulation" -msgstr "Establece la emulación" +msgstr "Establece la emulación" #: lexsup.c:268 msgid "Print map file on standard output" -msgstr "Muestra el fichero mapa en la salida estándar" +msgstr "Muestra el fichero mapa en la salida estándar" #: lexsup.c:270 msgid "Do not page align data" @@ -1444,11 +1445,11 @@ msgstr "No pagina los datos alineados" #: lexsup.c:272 msgid "Do not page align data, do not make text readonly" -msgstr "No pagina los datos alineados, no hace el texto de sólo lectura" +msgstr "No pagina los datos alineados, no hace el texto de sólo lectura" #: lexsup.c:275 msgid "Page align data, make text readonly" -msgstr "Pagina los datos alineados, hace el texto de sólo lectura" +msgstr "Pagina los datos alineados, hace el texto de sólo lectura" #: lexsup.c:278 msgid "Set output file name" @@ -1472,7 +1473,7 @@ msgstr "ARG" #: lexsup.c:285 msgid "Send arg to last-loaded plugin" -msgstr "Envía el argumento al último plugin cargado" +msgstr "Envía el argumento al último plugin cargado" #: lexsup.c:288 msgid "Ignored for SVR4 compatibility" @@ -1484,23 +1485,23 @@ msgstr "Genera salida reubicable" #: lexsup.c:296 msgid "Just link symbols (if directory, same as --rpath)" -msgstr "Sólo enlaza símbolos (si es un directorio, es igual que --rpath)" +msgstr "Sólo enlaza símbolos (si es un directorio, es igual que --rpath)" #: lexsup.c:299 msgid "Strip all symbols" -msgstr "Descarta todos los símbolos" +msgstr "Descarta todos los símbolos" #: lexsup.c:301 msgid "Strip debugging symbols" -msgstr "Descarta los símbolos de depuración" +msgstr "Descarta los símbolos de depuración" #: lexsup.c:303 msgid "Strip symbols in discarded sections" -msgstr "Descarta símbolos en las secciones descartadas" +msgstr "Descarta símbolos en las secciones descartadas" #: lexsup.c:305 msgid "Do not strip symbols in discarded sections" -msgstr "No descarta símbolos en las secciones descartadas" +msgstr "No descarta símbolos en las secciones descartadas" #: lexsup.c:307 msgid "Trace file opens" @@ -1508,28 +1509,28 @@ msgstr "Rastrea la apertura de ficheros" #: lexsup.c:309 msgid "Read linker script" -msgstr "Lee el guión del enlazador" +msgstr "Lee el guión del enlazador" #: lexsup.c:311 msgid "Read default linker script" -msgstr "Lee el guión del enlazador por defecto" +msgstr "Lee el guión del enlazador por defecto" #: lexsup.c:315 lexsup.c:333 lexsup.c:418 lexsup.c:439 lexsup.c:538 #: lexsup.c:566 lexsup.c:605 msgid "SYMBOL" -msgstr "SÍMBOLO" +msgstr "SÍMBOLO" #: lexsup.c:315 msgid "Start with undefined reference to SYMBOL" -msgstr "Inicia con una referencia sin definir hacia el SÍMBOLO" +msgstr "Inicia con una referencia sin definir hacia el SÍMBOLO" #: lexsup.c:318 msgid "[=SECTION]" -msgstr "[=SECCIÓN]" +msgstr "[=SECCIÓN]" #: lexsup.c:319 msgid "Don't merge input [SECTION | orphan] sections" -msgstr "No mezcla secciones de entrada [SECCIÓN | huérfanas]" +msgstr "No mezcla secciones de entrada [SECCIÓN | huérfanas]" #: lexsup.c:321 msgid "Build global constructor/destructor tables" @@ -1537,27 +1538,27 @@ msgstr "Construye tablas globales de constructores/destructores" #: lexsup.c:323 msgid "Print version information" -msgstr "Muestra la información de la versión" +msgstr "Muestra la información de la versión" #: lexsup.c:325 msgid "Print version and emulation information" -msgstr "Muestra la información de la versión y de la emulación" +msgstr "Muestra la información de la versión y de la emulación" #: lexsup.c:327 msgid "Discard all local symbols" -msgstr "Descarta todos los símbolos locales" +msgstr "Descarta todos los símbolos locales" #: lexsup.c:329 msgid "Discard temporary local symbols (default)" -msgstr "Descarta los símbolos locales temporales (por defecto)" +msgstr "Descarta los símbolos locales temporales (por defecto)" #: lexsup.c:331 msgid "Don't discard any local symbols" -msgstr "No descarta ningún símbolo local" +msgstr "No descarta ningún símbolo local" #: lexsup.c:333 msgid "Trace mentions of SYMBOL" -msgstr "Rastrea las menciones del SÍMBOLO" +msgstr "Rastrea las menciones del SÍMBOLO" #: lexsup.c:335 lexsup.c:503 lexsup.c:505 msgid "PATH" @@ -1565,7 +1566,7 @@ msgstr "RUTA" #: lexsup.c:335 msgid "Default search path for Solaris compatibility" -msgstr "Ruta de búsqueda por defecto para compatibilidad con Solaris" +msgstr "Ruta de búsqueda por defecto para compatibilidad con Solaris" #: lexsup.c:338 msgid "Start a group" @@ -1585,15 +1586,15 @@ msgstr "Rechaza ficheros de entrada cuya arquitectura es desconocida" #: lexsup.c:361 msgid "Only set DT_NEEDED for following dynamic libs if used" -msgstr "Sólo establece DT_NEEDED para las siguientes bibliotecas dinámicas si se usan" +msgstr "Sólo establece DT_NEEDED para las siguientes bibliotecas dinámicas si se usan" #: lexsup.c:364 msgid "" "Always set DT_NEEDED for dynamic libraries mentioned on\n" " the command line" msgstr "" -"Siempre establece DT_NEEDED para las bibliotecas dinámicas\n" -" mencionadas en la línea de órdenes" +"Siempre establece DT_NEEDED para las bibliotecas dinámicas\n" +" mencionadas en la línea de órdenes" #: lexsup.c:368 msgid "Ignored for SunOS compatibility" @@ -1613,7 +1614,7 @@ msgstr "Asocia localmente las referencias globlales" #: lexsup.c:386 msgid "Bind global function references locally" -msgstr "Asocia localmente las referencias a función globales" +msgstr "Asocia localmente las referencias a función globales" #: lexsup.c:388 msgid "Check section addresses for overlaps (default)" @@ -1625,11 +1626,11 @@ msgstr "No revisa las direcciones de las secciones por traslapes" #: lexsup.c:395 msgid "Copy DT_NEEDED links mentioned inside DSOs that follow" -msgstr "Copia los enlaces DT_NEEDED mencionados dentro de los DSOs a continuación" +msgstr "Copia los enlaces DT_NEEDED mencionados dentro de los DSOs a continuación" #: lexsup.c:399 msgid "Do not copy DT_NEEDED links mentioned inside DSOs that follow" -msgstr "No copia los enlaces DT_NEEDED mencionados dentro de los DSOs a continuación" +msgstr "No copia los enlaces DT_NEEDED mencionados dentro de los DSOs a continuación" #: lexsup.c:403 msgid "Output cross reference table" @@ -1637,11 +1638,11 @@ msgstr "Muestra la tabla de referencias cruzadas" #: lexsup.c:405 msgid "SYMBOL=EXPRESSION" -msgstr "SÍMBOLO=EXPRESIÓN" +msgstr "SÍMBOLO=EXPRESIÓN" #: lexsup.c:405 msgid "Define a symbol" -msgstr "Define un símbolo" +msgstr "Define un símbolo" #: lexsup.c:407 msgid "[=STYLE]" @@ -1649,12 +1650,12 @@ msgstr "[=ESTILO]" #: lexsup.c:407 msgid "Demangle symbol names [using STYLE]" -msgstr "Desenreda los nombres de los símbolos [utilizando el ESTILO]" +msgstr "Desenreda los nombres de los símbolos [utilizando el ESTILO]" -# No me convence mucho la traducción de `embedded' por imbuído. cfuga +# No me convence mucho la traducción de `embedded' por imbuído. cfuga #: lexsup.c:410 msgid "Generate embedded relocs" -msgstr "Genera reubicaciones imbuídas" +msgstr "Genera reubicaciones imbuídas" #: lexsup.c:412 msgid "Treat warnings as errors" @@ -1666,11 +1667,11 @@ msgstr "No trata los avisos como errores (por defecto)" #: lexsup.c:418 msgid "Call SYMBOL at unload-time" -msgstr "Llama al SÍMBOLO al momento de descargar" +msgstr "Llama al SÍMBOLO al momento de descargar" #: lexsup.c:420 msgid "Force generation of file with .exe suffix" -msgstr "Fuerza la generación del fichero con sufijo .exe" +msgstr "Fuerza la generación del fichero con sufijo .exe" #: lexsup.c:422 msgid "Remove unused sections (on some targets)" @@ -1682,7 +1683,7 @@ msgstr "No elimina las secciones sin uso (por defecto)" #: lexsup.c:428 msgid "List removed unused sections on stderr" -msgstr "Muestra las secciones sin uso eliminadas en la salida de error estándar" +msgstr "Muestra las secciones sin uso eliminadas en la salida de error estándar" #: lexsup.c:431 msgid "Do not list removed unused sections" @@ -1690,7 +1691,7 @@ msgstr "No muestra las secciones sin uso eliminadas" #: lexsup.c:434 msgid "Set default hash table size close to " -msgstr "Establece el tamaño de de la tabla de dispersión cercano al " +msgstr "Establece el tamaño de de la tabla de dispersión cercano al " #: lexsup.c:437 msgid "Print option help" @@ -1698,7 +1699,7 @@ msgstr "Muestra la ayuda de opciones" #: lexsup.c:439 msgid "Call SYMBOL at load-time" -msgstr "Llama al SÍMBOLO al momento de cargar" +msgstr "Llama al SÍMBOLO al momento de cargar" #: lexsup.c:441 msgid "Write a map file" @@ -1710,11 +1711,11 @@ msgstr "No define almacenamiento Common" #: lexsup.c:445 msgid "Do not demangle symbol names" -msgstr "No desenreda los nombres de los símbolos" +msgstr "No desenreda los nombres de los símbolos" #: lexsup.c:447 msgid "Use less memory and more disk I/O" -msgstr "Usa menos memoria y más E/S de disco" +msgstr "Usa menos memoria y más E/S de disco" #: lexsup.c:449 msgid "Do not allow unresolved references in object files" @@ -1730,7 +1731,7 @@ msgstr "No permite referencias sin resolver en bibliotecas compartidas" #: lexsup.c:460 msgid "Allow multiple definitions" -msgstr "Permite definiciones múltiples" +msgstr "Permite definiciones múltiples" #: lexsup.c:462 msgid "Disallow undefined version" @@ -1738,11 +1739,11 @@ msgstr "No permite versiones sin definir" #: lexsup.c:464 msgid "Create default symbol version" -msgstr "Crea la versión de símbolo por defecto" +msgstr "Crea la versión de símbolo por defecto" #: lexsup.c:467 msgid "Create default symbol version for imported symbols" -msgstr "Crea la versión de símbolo por defecto para símbolos importados" +msgstr "Crea la versión de símbolo por defecto para símbolos importados" #: lexsup.c:470 msgid "Don't warn about mismatched input files" @@ -1758,7 +1759,7 @@ msgstr "Apaga --whole-archive" #: lexsup.c:478 msgid "Create an output file even if errors occur" -msgstr "Crea un fichero de salida aún si ocurren errores" +msgstr "Crea un fichero de salida aún si ocurren errores" #: lexsup.c:483 msgid "" @@ -1766,7 +1767,7 @@ msgid "" " the command line" msgstr "" "Utiliza solamente los directorios de bibliotecas\n" -" especificados en la línea de órdenes" +" especificados en la línea de órdenes" #: lexsup.c:487 msgid "Specify target of output file" @@ -1778,27 +1779,27 @@ msgstr "Se descarta por compatibilidad con Linux" #: lexsup.c:493 msgid "Reduce memory overheads, possibly taking much longer" -msgstr "Reduce las saturaciones de memoria, tal vez tomando más tiempo" +msgstr "Reduce las saturaciones de memoria, tal vez tomando más tiempo" #: lexsup.c:496 msgid "Reduce code size by using target specific optimizations" -msgstr "Reduce el tamaño del código usando optimizaciones específicas del objetivo" +msgstr "Reduce el tamaño del código usando optimizaciones específicas del objetivo" #: lexsup.c:498 msgid "Do not use relaxation techniques to reduce code size" -msgstr "No utiliza técnicas de relajación para reducir el tamaño del código" +msgstr "No utiliza técnicas de relajación para reducir el tamaño del código" #: lexsup.c:501 msgid "Keep only symbols listed in FILE" -msgstr "Conserva solamente los símbolos enlistados en el FICHERO" +msgstr "Conserva solamente los símbolos enlistados en el FICHERO" #: lexsup.c:503 msgid "Set runtime shared library search path" -msgstr "Establece la ruta de búsqueda de bibliotecas compartidas en tiempo de ejecución" +msgstr "Establece la ruta de búsqueda de bibliotecas compartidas en tiempo de ejecución" #: lexsup.c:505 msgid "Set link time shared library search path" -msgstr "Establece la ruta de búsqueda de bibliotecas compartidas en tiempo de enlace" +msgstr "Establece la ruta de búsqueda de bibliotecas compartidas en tiempo de enlace" #: lexsup.c:508 msgid "Create a shared library" @@ -1806,7 +1807,7 @@ msgstr "Crea una biblioteca compartida" #: lexsup.c:512 msgid "Create a position independent executable" -msgstr "Crea un ejecutable independiente de posición" +msgstr "Crea un ejecutable independiente de posición" #: lexsup.c:516 msgid "[=ascending|descending]" @@ -1814,15 +1815,15 @@ msgstr "[=ascending|descending]" #: lexsup.c:517 msgid "Sort common symbols by alignment [in specified order]" -msgstr "Ordena los símbolos comunes por alineación [en orden específico]" +msgstr "Ordena los símbolos comunes por alineación [en orden específico]" #: lexsup.c:522 msgid "name|alignment" -msgstr "nombre|alineación" +msgstr "nombre|alineación" #: lexsup.c:523 msgid "Sort sections by name or maximum alignment" -msgstr "Ordena secciones por nombre o alineación máxima" +msgstr "Ordena secciones por nombre o alineación máxima" #: lexsup.c:525 msgid "COUNT" @@ -1830,15 +1831,15 @@ msgstr "CUENTA" #: lexsup.c:525 msgid "How many tags to reserve in .dynamic section" -msgstr "Cúantas marcas reserva en la sección .dynamic" +msgstr "Cúantas marcas reserva en la sección .dynamic" #: lexsup.c:528 msgid "[=SIZE]" -msgstr "[=TAMAÑO]" +msgstr "[=TAMAÑO]" #: lexsup.c:528 msgid "Split output sections every SIZE octets" -msgstr "Divide las secciones de salida cada TAMAÑO octetos" +msgstr "Divide las secciones de salida cada TAMAÑO octetos" #: lexsup.c:531 msgid "[=COUNT]" @@ -1850,11 +1851,11 @@ msgstr "Divide las secciones de salida cada CUENTA reubicaciones" #: lexsup.c:534 msgid "Print memory usage statistics" -msgstr "Muestra las estadísticas de uso de memoria" +msgstr "Muestra las estadísticas de uso de memoria" #: lexsup.c:536 msgid "Display target specific options" -msgstr "Muestra las opciones específicas del objetivo" +msgstr "Muestra las opciones específicas del objetivo" #: lexsup.c:538 msgid "Do task level linking" @@ -1866,27 +1867,27 @@ msgstr "Usa el mismo formato que el enlazador nativo" #: lexsup.c:542 msgid "SECTION=ADDRESS" -msgstr "SECCIÓN=DIRECCIÓN" +msgstr "SECCIÓN=DIRECCIÓN" #: lexsup.c:542 msgid "Set address of named section" -msgstr "Establece la dirección de la sección nombrada" +msgstr "Establece la dirección de la sección nombrada" #: lexsup.c:545 msgid "Set address of .bss section" -msgstr "Establece la dirección de la sección .bss" +msgstr "Establece la dirección de la sección .bss" #: lexsup.c:547 msgid "Set address of .data section" -msgstr "Establece la dirección de la sección .data" +msgstr "Establece la dirección de la sección .data" #: lexsup.c:549 msgid "Set address of .text section" -msgstr "Establece la dirección de la sección .text" +msgstr "Establece la dirección de la sección .text" #: lexsup.c:551 msgid "Set address of text segment" -msgstr "Establece la dirección del segmento de texto" +msgstr "Establece la dirección del segmento de texto" #: lexsup.c:554 msgid "" @@ -1894,45 +1895,45 @@ msgid "" " ignore-all, report-all, ignore-in-object-files,\n" " ignore-in-shared-libs" msgstr "" -"Cómo manejar símbolos sin resolver. es:\n" +"Cómo manejar símbolos sin resolver. es:\n" " ignore-all, report-all, ignore-in-object-files,\n" " ignore-in-shared-libs" #: lexsup.c:559 msgid "Output lots of information during link" -msgstr "Muestra mucha información durante el enlace" +msgstr "Muestra mucha información durante el enlace" #: lexsup.c:563 msgid "Read version information script" -msgstr "Lee la información de la versión del guión" +msgstr "Lee la información de la versión del guión" #: lexsup.c:566 msgid "" "Take export symbols list from .exports, using\n" " SYMBOL as the version." msgstr "" -"Toma la lista de exportación de símbolos de .exports, usando\n" -" el SÍMBOLO como la versión." +"Toma la lista de exportación de símbolos de .exports, usando\n" +" el SÍMBOLO como la versión." #: lexsup.c:570 msgid "Add data symbols to dynamic list" -msgstr "Agrega símbolos de datos a la lista dinámica" +msgstr "Agrega símbolos de datos a la lista dinámica" #: lexsup.c:572 msgid "Use C++ operator new/delete dynamic list" -msgstr "Usa la lista dinámica de los operadores de C++ new/delete" +msgstr "Usa la lista dinámica de los operadores de C++ new/delete" #: lexsup.c:574 msgid "Use C++ typeinfo dynamic list" -msgstr "Usa la lista dinámica de tipo de dato de C++" +msgstr "Usa la lista dinámica de tipo de dato de C++" #: lexsup.c:576 msgid "Read dynamic list" -msgstr "Lee la lista dinámica" +msgstr "Lee la lista dinámica" #: lexsup.c:578 msgid "Warn about duplicate common symbols" -msgstr "Avisa sobre símbolos comunes duplicados" +msgstr "Avisa sobre símbolos comunes duplicados" #: lexsup.c:580 msgid "Warn if global constructors/destructors are seen" @@ -1940,15 +1941,15 @@ msgstr "Avisa si se ven constructores/destructores globales" #: lexsup.c:583 msgid "Warn if the multiple GP values are used" -msgstr "Avisa si se usan valores múltiples de GP" +msgstr "Avisa si se usan valores múltiples de GP" #: lexsup.c:585 msgid "Warn only once per undefined symbol" -msgstr "Avisa sólo una vez por cada símbolo sin definir" +msgstr "Avisa sólo una vez por cada símbolo sin definir" #: lexsup.c:587 msgid "Warn if start of section changes due to alignment" -msgstr "Avisa si el inicio de la sección cambia debido a la alineación" +msgstr "Avisa si el inicio de la sección cambia debido a la alineación" #: lexsup.c:590 msgid "Warn if shared object has DT_TEXTREL" @@ -1956,15 +1957,15 @@ msgstr "Avisa si el objeto compartido tiene DT_TEXTREL" #: lexsup.c:593 msgid "Warn if an object has alternate ELF machine code" -msgstr "Avisa si el objeto tiene código máquina ELF alternativo" +msgstr "Avisa si el objeto tiene código máquina ELF alternativo" #: lexsup.c:597 msgid "Report unresolved symbols as warnings" -msgstr "Reporta símbolos sin resolver como avisos" +msgstr "Reporta símbolos sin resolver como avisos" #: lexsup.c:600 msgid "Report unresolved symbols as errors" -msgstr "Reporta símbolos sin resolver como errores" +msgstr "Reporta símbolos sin resolver como errores" #: lexsup.c:602 msgid "Include all objects from following archives" @@ -1972,23 +1973,23 @@ msgstr "Incluye todos los objetos de los siguientes ficheros" #: lexsup.c:605 msgid "Use wrapper functions for SYMBOL" -msgstr "Usa funciones de envoltura para el SÍMBOLO" +msgstr "Usa funciones de envoltura para el SÍMBOLO" #: lexsup.c:754 msgid "%P: unrecognized option '%s'\n" -msgstr "%P: no se reconoce la opción `%s'\n" +msgstr "%P: no se reconoce la opción `%s'\n" #: lexsup.c:758 msgid "%P%F: use the --help option for usage information\n" -msgstr "%P%F: use la opción --help para información de modo de empleo\n" +msgstr "%P%F: use la opción --help para información de modo de empleo\n" #: lexsup.c:776 msgid "%P%F: unrecognized -a option `%s'\n" -msgstr "%P%F: no se reconoce la opción -a `%s'\n" +msgstr "%P%F: no se reconoce la opción -a `%s'\n" #: lexsup.c:789 msgid "%P%F: unrecognized -assert option `%s'\n" -msgstr "%P%F: no se reconoce la opción -assert `%s'\n" +msgstr "%P%F: no se reconoce la opción -assert `%s'\n" #: lexsup.c:832 msgid "%F%P: unknown demangling style `%s'" @@ -1996,19 +1997,19 @@ msgstr "%F%P: estilo de desenredo `%s' desconocido" #: lexsup.c:898 msgid "%P%F: invalid number `%s'\n" -msgstr "%P%F: número `%s' inválido\n" +msgstr "%P%F: número `%s' inválido\n" #: lexsup.c:996 msgid "%P%F: bad --unresolved-symbols option: %s\n" -msgstr "%P%F: opción --unresolved-symbols errónea: %s\n" +msgstr "%P%F: opción --unresolved-symbols errónea: %s\n" #: lexsup.c:1059 msgid "%P%F: bad -plugin option\n" -msgstr "%P%F: opción -plugin errónea\n" +msgstr "%P%F: opción -plugin errónea\n" #: lexsup.c:1063 msgid "%P%F: bad -plugin-opt option\n" -msgstr "%P%F: opción -plugin-opt errónea\n" +msgstr "%P%F: opción -plugin-opt errónea\n" #. This can happen if the user put "-rpath,a" on the command #. line. (Or something similar. The comma is important). @@ -2020,7 +2021,7 @@ msgstr "%P%F: opci #. and will seg-fault the next time around. #: lexsup.c:1080 msgid "%P%F: bad -rpath option\n" -msgstr "%P%F: opción -rpath errónea\n" +msgstr "%P%F: opción -rpath errónea\n" #: lexsup.c:1194 msgid "%P%F: -shared not supported\n" @@ -2040,7 +2041,7 @@ msgstr "ascendente" #: lexsup.c:1216 msgid "%P%F: invalid common section sorting option: %s\n" -msgstr "%P%F: opción de ordenado de sección común inválida: %s\n" +msgstr "%P%F: opción de ordenado de sección común inválida: %s\n" #: lexsup.c:1220 msgid "name" @@ -2048,27 +2049,27 @@ msgstr "nombre" #: lexsup.c:1222 msgid "alignment" -msgstr "alineación" +msgstr "alineación" #: lexsup.c:1225 msgid "%P%F: invalid section sorting option: %s\n" -msgstr "%P%F: opción de ordenado de sección inválida: %s\n" +msgstr "%P%F: opción de ordenado de sección inválida: %s\n" #: lexsup.c:1259 msgid "%P%F: invalid argument to option \"--section-start\"\n" -msgstr "%P%F: argumento inválido para la opción \"--section-start\"\n" +msgstr "%P%F: argumento inválido para la opción \"--section-start\"\n" #: lexsup.c:1266 msgid "%P%F: missing argument(s) to option \"--section-start\"\n" -msgstr "%P%F: falta(n) argumento(s) para la opción \"--section-start\"\n" +msgstr "%P%F: falta(n) argumento(s) para la opción \"--section-start\"\n" #: lexsup.c:1490 msgid "%P%F: group ended before it began (--help for usage)\n" -msgstr "%P%F: el grupo terminó antes de empezar (--help para modo de empleo)\n" +msgstr "%P%F: el grupo terminó antes de empezar (--help para modo de empleo)\n" #: lexsup.c:1518 msgid "%P%X: --hash-size needs a numeric argument\n" -msgstr "%P%X: --hash-size necesita un argumento numérico\n" +msgstr "%P%X: --hash-size necesita un argumento numérico\n" #: lexsup.c:1547 msgid "%P%F: %s: error loading plugin\n" @@ -2076,7 +2077,7 @@ msgstr "%P%F: %s: error al cargar el plugin\n" #: lexsup.c:1578 lexsup.c:1591 msgid "%P%F: invalid hex number `%s'\n" -msgstr "%P%F: número hexadecimal `%s' inválido\n" +msgstr "%P%F: número hexadecimal `%s' inválido\n" #: lexsup.c:1627 #, c-format @@ -2113,7 +2114,7 @@ msgstr "%s: emulaciones admitidas: " #: lexsup.c:1728 #, c-format msgid "%s: emulation specific options:\n" -msgstr "%s: opciones específicas de emulación:\n" +msgstr "%s: opciones específicas de emulación:\n" #: lexsup.c:1733 #, c-format @@ -2132,7 +2133,7 @@ msgstr "%XNo se admite la arquitectura PEI: %s\n" #: pe-dll.c:788 #, c-format msgid "%XCannot export %s: invalid export name\n" -msgstr "%XNo se puede exportar %s: nombre de exportación inválido\n" +msgstr "%XNo se puede exportar %s: nombre de exportación inválido\n" #: pe-dll.c:844 #, c-format @@ -2147,17 +2148,17 @@ msgstr "Aviso, EXPORT duplicado: %s\n" #: pe-dll.c:938 #, c-format msgid "%XCannot export %s: symbol not defined\n" -msgstr "%XNo se puede exportar %s: símbolo sin definir\n" +msgstr "%XNo se puede exportar %s: símbolo sin definir\n" #: pe-dll.c:944 #, c-format msgid "%XCannot export %s: symbol wrong type (%d vs %d)\n" -msgstr "%XNo se puede exportar %s: tipo erróneo del símbolo (%d vs %d)\n" +msgstr "%XNo se puede exportar %s: tipo erróneo del símbolo (%d vs %d)\n" #: pe-dll.c:951 #, c-format msgid "%XCannot export %s: symbol not found\n" -msgstr "%XNo se puede exportar %s: no se encuentra el símbolo\n" +msgstr "%XNo se puede exportar %s: no se encuentra el símbolo\n" #: pe-dll.c:1065 #, c-format @@ -2167,7 +2168,7 @@ msgstr "%XError, ordinal utilizado dos veces: %d (%s vs %s)\n" #: pe-dll.c:1446 #, c-format msgid "%XError: %d-bit reloc in dll\n" -msgstr "%XError: reubicación de %d-bit en la dll\n" +msgstr "%XError: reubicación de %d-bit en la dll\n" #: pe-dll.c:1574 #, c-format @@ -2181,7 +2182,7 @@ msgstr "; no hay contenido disponible\n" #: pe-dll.c:2652 msgid "%C: variable '%T' can't be auto-imported. Please read the documentation for ld's --enable-auto-import for details.\n" -msgstr "%C: no se puede auto-importar la variable '%T'. Por favor lea la documentación para --enable-auto-import de ld para más detalles.\n" +msgstr "%C: no se puede auto-importar la variable '%T'. Por favor lea la documentación para --enable-auto-import de ld para más detalles.\n" #: pe-dll.c:2682 #, c-format @@ -2211,7 +2212,7 @@ msgstr "%X%s(%s): no se puede encontrar el miembro en el archivo" #: pe-dll.c:3177 #, c-format msgid "%XError: can't use long section names on this arch\n" -msgstr "%XError: no se pueden usar nombres de sección largos en esta arquitectura\n" +msgstr "%XError: no se pueden usar nombres de sección largos en esta arquitectura\n" #: plugin.c:178 plugin.c:212 msgid "" @@ -2219,19 +2220,19 @@ msgstr "" #: plugin.c:308 msgid "%P%F: %s: non-ELF symbol in ELF BFD!" -msgstr "%P%F: %s: ¡Símbolo que no es ELF en el BFD ELF!" +msgstr "%P%F: %s: ¡Símbolo que no es ELF en el BFD ELF!" #: plugin.c:800 msgid "%P%X: %s: hash table failure adding symbol %s" -msgstr "%P%X: %s: falló la tabla de dispersión al agregar el símbolo %s" +msgstr "%P%X: %s: falló la tabla de dispersión al agregar el símbolo %s" #: plugin.c:833 msgid "%P%X: %s: can't find IR symbol '%s'" -msgstr "%P%X: %s: no se puede encontrar el símbolo IR '%s'" +msgstr "%P%X: %s: no se puede encontrar el símbolo IR '%s'" #: plugin.c:836 msgid "%P%x: %s: bad IR symbol type %d" -msgstr "%P%x: %s: tipo de símbolo IR %d erróneo" +msgstr "%P%x: %s: tipo de símbolo IR %d erróneo" #~ msgid "%F%P: %s (%s): No such file: %E\n" #~ msgstr "%F%P: %s (%s): No hay tal fichero: %E\n" @@ -2244,17 +2245,17 @@ msgstr "%P%x: %s: tipo de s #~ " following dynamic libs" #~ msgstr "" #~ "Establece marcas DT_NEEDED para entradas DT_NEEDED en\n" -#~ " las siguientes bibliotecas dinámicas" +#~ " las siguientes bibliotecas dinámicas" #~ msgid "" #~ "Do not set DT_NEEDED tags for DT_NEEDED entries\n" #~ " in following dynamic libs" #~ msgstr "" #~ "No establece marcas DT_NEEDED para entradas DT_NEEDED en\n" -#~ " las siguientes bibliotecas dinámicas" +#~ " las siguientes bibliotecas dinámicas" #~ msgid "Always set DT_NEEDED for following dynamic libs" -#~ msgstr "Siempre establece DT_NEEDED para las siguientes bibliotecas dinámicas" +#~ msgstr "Siempre establece DT_NEEDED para las siguientes bibliotecas dinámicas" #~ msgid "Relax branches on certain targets" #~ msgstr "Relaja ramificaciones en ciertos objetivos" @@ -2266,22 +2267,22 @@ msgstr "%P%x: %s: tipo de s #~ msgstr "%P%F: no se pueden usar juntos -relax y -r\n" #~ msgid " --support-old-code Support interworking with old code\n" -#~ msgstr " --support-old-code Admite interoperar con código antiguo\n" +#~ msgstr " --support-old-code Admite interoperar con código antiguo\n" #~ msgid "%B%F: could not read symbols; %E\n" -#~ msgstr "%B%F: no se pueden leer símbolos; %E\n" +#~ msgstr "%B%F: no se pueden leer símbolos; %E\n" #~ msgid "%F%S nonconstant expression for %s\n" -#~ msgstr "%F%S expresión no constante para %s\n" +#~ msgstr "%F%S expresión no constante para %s\n" #~ msgid "%B%F: could not read symbols\n" -#~ msgstr "%B%F: no se pueden leer los símbolos\n" +#~ msgstr "%B%F: no se pueden leer los símbolos\n" #~ msgid "%F%S non constant expression for %s\n" -#~ msgstr "%F%S expresión no constante para %s\n" +#~ msgstr "%F%S expresión no constante para %s\n" #~ msgid "%P%F: out of memory during initialization" -#~ msgstr "%P%F: memoria agotada durante la inicialización" +#~ msgstr "%P%F: memoria agotada durante la inicialización" #~ msgid "%P%F: -static and -shared may not be used together\n" #~ msgstr "%P%F: no se pueden usar juntos -static y -shared\n" @@ -2290,10 +2291,10 @@ msgstr "%P%x: %s: tipo de s #~ msgstr "%P%X: generado" #~ msgid "%F%P: %s uses undefined section %s\n" -#~ msgstr "%F%P: %s usa la sección sin definir %s\n" +#~ msgstr "%F%P: %s usa la sección sin definir %s\n" #~ msgid "%F%P: %s forward reference of section %s\n" -#~ msgstr "%F%P: %s es una referencia hacia adelante de la sección %s\n" +#~ msgstr "%F%P: %s es una referencia hacia adelante de la sección %s\n" #~ msgid "%F%P: cannot open %s for %s: %E\n" #~ msgstr "%F%P: no se puede abrir %s para %s: %E\n" @@ -2308,10 +2309,10 @@ msgstr "%P%x: %s: tipo de s #~ msgstr "%P%F: arquitectura destino reespecificada\n" #~ msgid "%P: %B: warning: ignoring duplicate `%s' section symbol `%s'\n" -#~ msgstr "%P: %B: aviso: ignorando el símbolo duplicado `%s' de la sección `%s'\n" +#~ msgstr "%P: %B: aviso: ignorando el símbolo duplicado `%s' de la sección `%s'\n" #~ msgid "%P: %B: warning: duplicate section `%s' has different size\n" -#~ msgstr "%P: %B: aviso: la sección duplicada `%s' tiene tamaño diferente\n" +#~ msgstr "%P: %B: aviso: la sección duplicada `%s' tiene tamaño diferente\n" #~ msgid "%P: no [COMMON] command, defaulting to .bss\n" #~ msgstr "%P: no hay una orden [COMMON], usando .bss por defecto\n" @@ -2320,10 +2321,10 @@ msgstr "%P%x: %s: tipo de s #~ msgstr "%P%F: no se pueden usar juntos -r y --mpc860c0\n" #~ msgid "Allow no undefined symbols" -#~ msgstr "No permitir símbolos sin definir" +#~ msgstr "No permitir símbolos sin definir" #~ msgid "Allow undefined symbols in shared objects (the default)" -#~ msgstr "Permitir símbolos sin definir en objetos compartidos (por defecto)" +#~ msgstr "Permitir símbolos sin definir en objetos compartidos (por defecto)" #~ msgid "[=WORDS]" #~ msgstr "[=PALABRAS]" @@ -2332,23 +2333,23 @@ msgstr "%P%x: %s: tipo de s #~ "Modify problematic branches in last WORDS (1-10,\n" #~ "\t\t\t\tdefault 5) words of a page" #~ msgstr "" -#~ "Modificar las ramificaciones problemáticas en las últimas PALABRAS (1-10,\n" -#~ "\t\t\t5 por defecto) palabras de una página" +#~ "Modificar las ramificaciones problemáticas en las últimas PALABRAS (1-10,\n" +#~ "\t\t\t5 por defecto) palabras de una página" #~ msgid "%P%F: invalid argument to option \"mpc860c0\"\n" -#~ msgstr "%P%F: Argumento inválido para la opción \"mpc860c0\"\n" +#~ msgstr "%P%F: Argumento inválido para la opción \"mpc860c0\"\n" #~ msgid " create __imp_ as well.\n" -#~ msgstr " creando también __imp_.\n" +#~ msgstr " creando también __imp_.\n" #~ msgid " --dll-search-prefix= When linking dynamically to a dll witout an\n" -#~ msgstr " --dll-search-prefix= Al enlazar dinámicamente con una dll sin una\n" +#~ msgstr " --dll-search-prefix= Al enlazar dinámicamente con una dll sin una\n" #~ msgid " importlib, use .dll \n" -#~ msgstr " biblioteca de importación, usar .dll\n" +#~ msgstr " biblioteca de importación, usar .dll\n" #~ msgid "Archive member included" -#~ msgstr "Se incluyó el fichero miembro" +#~ msgstr "Se incluyó el fichero miembro" #~ msgid "Don't merge orphan sections with the same name" -#~ msgstr "No mezclar secciones huérfanas con el mismo nombre" +#~ msgstr "No mezclar secciones huérfanas con el mismo nombre" diff --git a/ld/po/fi.gmo b/ld/po/fi.gmo new file mode 100644 index 0000000000000000000000000000000000000000..1d4f6d6643154d75b9dc81abd397d7281b85dca8 GIT binary patch literal 57441 zcmb`Q34B~vb^jk*LmX%l0wf{Z%c8_49%qL{u}x%Kjup$6v1Dg4!5K?qX{^zVn8mh| zP?kd30;Hut1B5~wD3k^YB`Hg338rjer-iZ?C=~v*1zMI;y8OStbMAfb%}BE4eyY#s z>G$q?_uhAxbIv{I+-1J;n1{bI;qMUBpKrQE^q{V6Zi`7XW&-wMHeQ?7Vz)D z=Yi+1Op+IaZv(FZpHxbcVekO>|G*D}P4FG7lH}#!ITulG@Lk~Rz-ul}k{5tq2R{y0 zE=iKj;6<1E_iqEY5PlHklgX)<`TIdo&wm@d68t83Id}^H)`43<)#FZZBls2YCE(dt zPRoHQ@6>y*~tA4W4jS zlB@@ZLDlC@a1;17Z~*M<_ve$K+V#)C)!;)(taMKSY4YSZ!DGO;gQtM^gJ*-E0m&-) z3HTWBLK4%|$y!k5u7PX84}d3u{|Tnx2^3c8F99D9j)JFy`@qM6F9_kgL7FCcA4rvw zAA>YWvVu&X0Nw)9CCP2zx!~JDz5hJe2Oj$r$BV%82=4$PvE)`z`P~Dyz^{krPrb(J z^EOcVyaH4?KLMTz{u6ixc-%meKx)YfP|tUQbbZnR&j#NL>iZ9d@J~QUFFA?M;#0{w z@GS7Tpz8ex;A!Arfy(czpuY1TA$$s*q4GZ&R6U;tLaNELL9$NX3929d4LkuXZAg;i z!L^{iw-to+l9z#WL2?LG`9*x9!xDHNco5Y4yFu0eE1=r{M2Jy%EvRxo6IA@WK}az9 z5UBe72dMU4ajoMhcq-v%f_ndIQ1$%?sPcR#JU<1ZJcsbL0r!D>2)`5*{rwnJKBvJ< zYL_cO(cvhl{;z>*kKYH+20shJ+R49yec(A%@_cX;n1T&Z<-ZeDd*2uEZ$P!nzkw=G z3ezb4dQkDJAYGEY47>pRTnPUXRQs%k`9udzP~~|usQkYKsysgjMYrc8G**BEUZtSOlRi4ZIk<7km`> z4e&DXhoH)P)|mI(7Et*#L8ZGBTmyaxR5_C!PH#^J2ME3f{9EvA;1%GzcDg+MKDdGK zdDnY?RzcDKT_7Zrd=AuiPro5amV?)UqL&t^a^4SK4*nx}Jb3zzE;m<#>c6Le7lAi{ z>c1C*YQK9!_*0<1_hV3ey8I@OR{@poh2W*&d%$bJAA+!0vT~QVOB+ z2JZx~1V0IiZXU7Q`9V`fy=;t@Yg}fhaoTp>!8Z@a!~o-3$6k`22O#$0M%}{jFSiW3Q+C#dQkQLG<{r-H8qCCBaq&jP;*D!=~$)nAuRdOuBoYY5*7 zsy{v*@Q2`egda(xDE|_uet0UV^i!b9`x;Q+`D;-8^CR$a;CWU5Za*l#y9qoWd?9!N z_>S=WOW?7DAFHiX{?UP$;WpxX1-X1qPF z0+ntWOu<$N|1S7zgkJ}$U;hwPe?I`KK3@h^&!2)Pf~VEJekJfY!k2=Qb8Eqyz&7|; z@H3#=?H@qp|1Y5W?`NR$drZUI;VMw=wHs8t3DC+3s$W~++2E@|mG8Zv%JC&o{qzG+ z^mO8^zrPSvxrac-n*bjJ?gv$`7lER;H-hT72SCxqFTsn!RnKs`-wi6=3qh6RwV?X# zufXHM?}F;jpMfg>uRxVw#=?ofF`&wEDyaUs99#~Lg6h}XLAA&41-vid=fnFSfhX|( zxR%rB>ENRYUk9o@H-O6Tc2Mp8CQ$AAK2YEP7Pt!hw}9ugy`P>6K9T1y0G0k-pxX7T zA^b~F?Rripd=FH-8$jjz98m4}3Q*;E8z{c}45<2lFW^6e6NG;XJ^T}L{%gQ<=UiTl zftT=n4pcqg1}gp+K=sov!t=-9>g8PvK9c7np!o9!Q1m$-o=<}(6K;c|_d5c<3VZ_L zH-Kv2_k*W`Uk26x{{||*<8O2Nc>?(BgwFz%&ni&udL^jzBLQc^`2{;$<3*ZRh(zBA}dhnUxtH8en6|eSe zY!&b$;O~KFJcls=ydN9`cR$zln0JH6P_F+0U(WMmo`;PBz8X}z{^uvjUw~f#UkTp% zTW)8c{{r$LeBuikE5K)f`rfBO^;h4EOw~%R2UVVX!G7?V7dx&4R}+3FsPeoIycRtE zCCD`JdTPgt^v=!Gf5`F-QYIxqu>yD%5S?Ky9XR0{1)&!@ZZ5r;QHTjd4C6Z9O3tZ zj|2Z2R6lU%E(ZvuY~o(Mkmcb#v>L8ZR~6dk@3lstPdgnts= zA4jLCT`vX)z-dt5yBAdaAApyG$3q+?a0567Ho@iKN5NI#kHh=3UhVy|1ynvS2I>0b zBjNclM4@yq0+r9ZK=I=-cR7Dv2GP;A-%gH@Y0y0InfC30?)h2~<0M6I=;C5+Jy7*L<4?T*c7kfJ-v!r! zp8(GTAAPUOrAxu{2{*w@!Mi~5)hEFxf@i7e@I<={c^ec%@GviG~4`W#U8ybo0W z{sX9dPyP!}e=Rsp_#k){_%%>`@c0jSyc@uN!Y>5R0S|%t{`bQ3lm624*$Q6E^Jjr- z|Br%KgU9`q_wTi!@~wf&=k4H0;O9Wm^>;zh`LQ4Laq2Qq&o_c6gZn_me=c|-_$u&B z@I&CE!Eb@T2L1><2K+g=4E%3U{eA2M&bQk@mH!}^f^Py(2R{N{34RCcfTw@R!@mO_ zNBBXo1bzt=|3Bi8r!RqO&#mC2z~2B>u9t-Oe+)i_@PpvR;Bg=J{#gyGUtSEVKJNup zzwd%i0)Gjr-WUJ1x63B*48l$DSny6z-+c}ESnv~|=-`{6@>}*1Z}%sG>i1pX+2G4S z^~;}vYr%g4*MJv()b*z-cpl*of~SGs1y%2de9X&r5qJvWz2E@&EKu$FK)`%DD@}2u>FW2>;_~#9vzW)`__zip%;gdh(^m!hrd@ckpM%Qhi{LrnKZByP6F%?l)dxO-@U@`mVGk(!y$uxoyc|^ecZ1h} z4}yc>qrTwsZ9Ay`e>wOZ@T1^LaOiKGuJ?ng*PFpdfPV(6J>Cnd+f_)_p1@D1SOz;A*2 z-Y-CvirE+@lN=L%hRht z(MLOk?*did&x7jE?}MVxe+O01hfpbnj|J6Ej{$!T>;v_FC3q%yId}m$3aWg!h39Vs z74L(f=;veLap0!{ei=NS@OMGUi--Qbm-j+&8R4DaLqPpq5^fM7$$8wb<@#=T_7U&{ z7R&#g9qtjY$)EG?AgHaqZ{+Lm|!}_iy384~&1mzld;)`&V

k%ewtHuJ7^g-QZh6{fQ>@_fW1s;(C?> z;qOXtW4IqDel?_d8Yr4L0elzNC%C_m>jxq3b9r_r*EJ!0TELHkV?6&ut}^%E0N=!Q zJJ)@Lj|JZt;yx1`;5wh{uXuhsm-ym!;Ip_SYl?s41gcz;Ny~Y!zxQ*U$o(-P{CL9u z#q}G6*MmRgdN}u^VDWET2y6=J{*rLY{qKV(aJ`G`pSbSj*`I*7a7}RO@9{jF;X1_q z+ri)D(%W%)zYEVl06vE6A42$c-bog}nea2XmT|q1>zzE)-!r*? z1DF0*f%kBI-h-wS>9)hO3it=%`3Ayc+&>Y#mFpo~Zzudsa3^>J_*-0v9a}fC54@Y} zXI%fn^^aVy<^681%edFy2f2S7*A-l!BfJsZ%k^chS;FTk5`WL-dMekk3WUFth@-#Z zfFAPyyMYtA{yaRK1|LPdCxR|ui*M?o(+ZP*MWO^*3b1kuD>MwrSOhmatrrQ1Fr{P&-I(!9|wL*FZnx%`y07_ zi+hGX^C8|xxcBc49vlkK|BCy+=lX4~JGmss^(VRiKU^;--g83ScNX$`J@3{LekBPlr!}G6#599e-t~&Qm2+to8@cTU1-&urT z!S!mcU(?02tGGtF{~N9~T%RKRJn&4eM{xf)T>9JLkc{wLf1d^a47@6YZ|43rT*njs zIr!^b8n2#8_zR%^wuZPTdC>m9kN>~R^=G{MBd&LF{~mBP_&6^8eVS_p*H5`##=FmO z>F?28FA4YdfPbF}H(%iS?{S^Y)!_PjuD^(pz*XUXF5rv7UvYg@VdCmeg zGd$P*OT+#7-~)ue!}U<^|5z{i+Z^71koze;2!DUV^QVV*e;pr!d$=ZeeiwK$_-L-* z;ku6SJzV;G8{t3oThmQGMEExd-^BI1+`o_Ob>aQD!5?#7$g}O>5ZAl8e;fE5F8%!j z*KJ(?$#p94`nh&;9pw52&)&dwJ=cG5y_{<^*BM+-=F;D5xf)!jD!||K9ZU~<8TYf~ z^K9@M@M~OUF8y5_aFY8D*8_xq0v-TYb3Kat7jpe8*RK=47d(Yae-Gz+BhS7J-VYZ4 z9!vQ7g=cGc`DDT$20zC2`{CW2xgQAkXLA1{F8$pcp6%!U{o#HO_(*%}|Go=+E4*9B zeadwX*C%;)CD)6&T3o$rLGMHn@-LE8GurRk*(Zypii-?*AXyC1cPIj7n zx>48j(Mmh*{TsES@V58Gg5kk~?YTj}0rV^3ygdIOr& z`|+tpgKAndtMRII`9x)Jxl?Pe@GACXXZ@aKrJG`Qp-vkH#s<=AyD}4qEpM=xTde_Y z1b!*i%QKbOr&}xgVVe$RQj~Q4$i|J4uTqP*G9^ZRsSQ@G2R^W#480Z$(d^XQ)tO3Z zwpHm&G)mURR<&5AiHS7CNsDoeS*cp1xzu8WzEI;KEz~?cofXL&!tcx$n|DK_et{UR zKArA{RZ^Hwm{IgZtyYXa|6a_Ncdyd7rz&aaW7VNR&SXZXNM4kj3D>M{wVSYUWRmNr zDs?N21m(mW9a0rn&MDh+s*mOvI;w+D}X;u*UGv&E-PbD%w-PUPQ>t)0~Hneh#*_xGLtd-{^ zYnsUV#!U5ABa(Fa!07Pyz)6+*;rTKhfFox}=S@0~HS^Az-^&X=>C|hg2+YJlG+P<3 z?ybUSjd~EP-Q}6j*y8L~V|J?AYBMy_0HQ*5d}D8<#ie$O3oOyE5uC(B)=PmYLuo1p z+s$%mwo;m??CDGvt2JoNmm(haNM!kYT3jRV0nz22PPL{nXQ_pP^ka=66v?P`d8IYG z$|a+VvhJ>1RBEL=78h71uNWeiTCB>!%6O-31C8^o#-Q#-T2yeQ*EgEe4EPO((_%HK z=uEX8nQ0O4|LU%7J_fjcPk<6mVi_#@!EUi}kzmO3cj9Y_VLjBt7|6>qo9&v$DTxRX;)vEwBGY4P*YHik3}Q-v3P% zyEDYh+EcAhNFNCbtAg}+wdES0f0t-ggtZC(Ow)05tBtNg-1wFew4F}4b>I&x##F{i zS!S)uRIV{iG!TBWCZw^C4sKeNZf$@mR5wvW?LdhtYE0-;Qf?ps6t#H;J?Pd^R!Hhm zu$RoLn<%%-$ZCy{qFHo3i~+Nq6WL>^15viFmN4q(c!)8x?{e!)7OYp!l?gPDz3CBB zm(x`n1~=x`p+t|=k9ICFqj8go!(Mr2^2a>}NZlY+Z32@Q5#IYZ>hj7&d-DJ~ zh|~t_Fp|)T(UK2xZGnuInnQaEDOIA+n{yZ^b2E7lt3K)ndza2O7-lqrL2_eC6CDkf z$g96j3fZ+55bDatjSHxGtkOghBF;xEO*$jB_?}oAO=+SdrwF=s z$%l|=6f2YKiIA4}$i&E^1+AqOw1)!|GZRfbJxxgjyAfM5j?*gFZ`fiUm6|?x&BmeO zK`=Br>{yxUxP)l+D?+`IKZ&Npc-ojX_m;lKcm%~YRF~ix5j!#pHuu&V2QV^FH)S%I zexmO?Z;`UrD5Et78|&hOeLIt44sEnVH#X?Hz14Pq+J}BHS(b+>y`^vLf~CjyzOh6y zcdK=mI(-9~KLHukw{GbfN@jXCg{+glD-U8N%~X(P(0rxV!n*2P*SE1BvhP6r5{`_; zcoO76YEhxVMIv~vS&aU42z`R)FiEGn(=~nT`d#XHw&RV-I$~fV=Gu?IZR72uB&bu| zxB4wf(3e#vb8bS5Q`pF!U++uQAbrhxvss;(kZCpNO=x|7G^tGKX@<`(DWS^Vn$aM! zNV3=o3sk^fSsA6R6f2=zz3x4Q=qeyX;X>_#-?m~7O7H#La+Q3suk3B$KR(ctH7wPx z&f@6{jUI~B6H7x_wb8MmPJZWwi_qO7i$ux^G%I2(As=1epRO<0MK_a3$}l`pHnj0N znr5lXUc>~d7`J=E{a86>kzOFe7%$5wg<$P+YpqJR;q*lfFlraiPc+6mvKHJGBFn!v zaRFaKd>1_-=6TTDiAuX%tx1}xuo+n%zFHf^5KW{*4_)v)%i$&RRhqW<8Wi|)@``dSynG<)_=?4ByOrgqmFjcMGCJtgF$Sq$?- z?3Q}5NUUZB-~Pnz*{O-<0x_Tz6+XDFTa0cwzgqAw-D1wv`7dRbHub*JY|_k(JAGKA zo^iFl9~EsPUAJ*VipeMjDmG|*ZQ7~&p(3*HP3->Vd9N93{Ou0Tu4G@y;Ib@59;f3rQ?f0VhOPyp+z*)+C`El~8S(&6QL%|9O!rYX< zwmdDh=c7-+%R$kv9K;_uKL?CD4UU=c?andJ$Wo4`eSI2JZml$#grbQ@(~Ek--V$m? zwS`a4(fe?wx(O!m4neJGRW;eQ7pr6a*wDzLPs3GJ=XCbbnB}C_S)R9mH<&Tzr zr5=rfJ8%u14p(G3^+e7i7Dw8;gL8iOb*`b6f~EVZWa3uPIX_AWW* zY_(zpA55%59+VrmK*)Jse(eU*3|%TKoR?tXyd?j`2Ng23hUr)H?cP2(JhFcG`mvGi zs7dn*us+j+eTa_wP(h0h`m6QSMjJ21TVdGHP=(ahqP6rudRj}ynD#|<$dc`=({~n!pJTf+6Kt%mw@qe@r+Qz+Asmv_!iA`2c$?Yq;6z?1Lrl^&>K}E2VpnBqLd-H# zPfS`B6(8%`EdF9@MHWk4wz!UxMXOg1?6#=rAn>OT>ap?S5HOF7id7&Ix-3Ld#*A}s z%>36aDa=Jzap4o;5=v(7S%HIgW06?};&$BPQQTraOe{ncq^A*b zrYxJ!m4R5az@BIq-9vGl2*ft0wl9vB~i`mEWQz&BNPD zE3Cbc$gBs43?JjZFp?O3#!pQ$Wi?AoEvDI1p=3-GNIFiEW_hVJRjJWlWYKBivet-e zEt(Cv%}Fyf#JtX4={coXCYFxi1E1&cI~;@Nj zhAYi1_I7#8#Nv@!HnVp}#|E~K?bv3dn|%^O^i@*gjO=M7@=OK?Cdp|#Hb(Fp=kg58 z+O18qAI+J}jB%_3>lRRyH6f(h?=_*mc&7xNo-sh|Y_?X+C~Dqxs)mW4c9!&yPMEY* zj?`Bqke(3Cc1HA83l+f?c+tOPM-*~1V?Uf|DSG)XeE zINR`Yr&*aF4QaTTxKlRMJS0)bTSIf+4_AL8VSgpCwb-~5>H zK~P2dS|K)lfYMR2nZ(@1f6FbUaceGmt)-`+b2wd_oo|d zshR|l4Zud*{Sy2Km~u5%)Lep3BxKShw=+$O^rwSnuglq@oUE+31c4i09$>n8ftR&?8$bB4f>aiTg$d>%vL% zRNdYPO!_@xfO1t8rH4GsPN2cMh-9(2M9aP^oyiq=@e_mcN<0g-inUQb!3)d!IEPzV zvp%uRt?BCQteUfnm0?X=hT{v!thM3PEKRfk@gK&~$IR#%+TW#0rsDUbCIqo6+bElx zuu_P?M2Lk*IKZPojU#R5{9EY+fde9}Tv!{`ynND4{v-0s+=bLcZc$A-1i=*3w60Dk za09W>OAIbIP-*NbJ*h7!l?oF}l-8u4rbck4t6456sVM_FWgo>WYD-W`(Q(&nc9`Hp zt#Bq~U2iPO47??$swc-Fh~(T`vglEWCR4Q~-8W+_9?z5y+C2TNR>Mj9_0+B4@KsF^ zlIUpYzGWsU_G5(<4B3U8yt(d)Ak$bUB~0uka$dD;Of%OlR_rouVvHXaupto8XSCkP zI>vn_!PnO8*f=J|(;X)&S8&+ot8z3c?B=|ddG+?UWEtI4TnYe9mU89F$Ksy02%3rw zIVj;QgU&_~sKnRMsxU~`zMV&tR^kOYZOk~&>L`$Du>eMK!A8l7(fd&* zbay^($otk;>j1V!q>CMLZ@AU9TxYqb`9L+Zh&W=L8=sQyUd7w11&6@~2tLpvXH8Hw zdDl?#!-{AT5UiBjE`7$VJvIB^8ae%Pfo2@oZ71C###L8LRB+-1 zpGm zk2s3?3yYsyS&=Ik+kL9avSfB;LfSD#mwGF@I)iAvL9;KJRLF;0ceRX3a9NbuW@DFk5fuNEWFt3^C8RfU#<=-b1(F)T9k_Q#JNscKC7 z993&cVOf_kf^~YPd@%p4L9^f~wNj8IN>b*p_p4cYvj`QCcDqOh_#)?K)cjHKw9Cv; z`gDm_$uwqI%oF5k+AveP5K|-I4Pw%TJSvn21)cS9X4t!q7ZeLi!&icmFLz#$R8jXc zGRe$)kFU(k&(uA`lf7KrQDafMmMcV8wzV{E6DuVfEw^rZ(#1$>BPEQr4?d3k0}H5g zF>aw3vvmrRLy~&}mwWc%f>@M)gjh(qU41)O_U*jc($>ne3{=4zg0?U(R{Us;W3??# z?#LBwGbwW4*yLHUUL9ZROkbG9jn$v1;AdhwetfR074q2TTB054)E2`>CYQz=vqwzQ zYIInCDPlfMY@6C$<(fv`0#cT!M@E#PBT5+usxwxCk>&eUBG{J zFnV>}Hx_kQMubep&7Uf{p|9ndzcZM19U}s3DkVk2Jg>@jxM(7bI3+A=g!t=?U#)Lf zVey$l8$~tmG)8%kq%zE+=O;YUEUPLtKVlHOKEzR2n=v?iyyzHNJl27xcI}usxV#Uo zN|UHIjG2*!&Kg%ZrGqzY8`(Y<7Kt@cj9GE4T46mckPiQ@&E48$N&7%`T%L;wSz7ju zR{jk=XI-TEba5Ea^4dN^3s?!Fqd+qUw!tV;h}y~Kn9Y%-9#ER18NF?AsLQ<(yFemX zog-U^XM>~z3!SDtCT@k8<imBFY>6_UMMQ$?j zwC7b&-B=gIyLO|^G>SGssi9;QQiIyWs=kY#q_19$0wndzSBRAN)PK!{7$9((=;8{Q=U2ahQ>s>33H19rmx+ zGD-&IRm*m8QWV?aDNp%$In05X+he)&^a{3$4z$_0#d_Wfwdx$KvLFBhg-CKoYlH}O z2`;N33ru53*2%RIbnk5aS)nDQF0$vVE8aq{wH+tsQ_$fr(%=--dHY~1SwFI4>sYd$ zTvOlEr~y}kx+K!x+APLm!yt-PIpzOPX-K zM$Noq#U1Pl%Q`YRayE>P1UtwVfmyO^An7oAr3Mkh~We7w_) zQKQNidOfHYhkt7=npx4Fl8#g1rKCqbRnxg(%-A^D;I=Tml<~0THp-&(CYrKbq~x*( zB5ltpwtQRVU`-RY6)(6Wd=z#;y~{S^rK4jv4iDa($d71Tom&U7QoPb0ZJW9`!i~-W zC9*eKKh-cdYS;UGAFN`s_c>a<^VY*Aal2?JLYxooksbx_aBGQ4@}AC8*p`_i5PZzt z6uF}(;7}c?L>&=X2J0JDE@mCpA$9jkd}-drxM(-818vM!sXP*E_L{bHhOL!#8`y)i z&f=IG%3OEmijGNp9-~$Go&}o&X|scne9IG!Ix;HMMY~vMW6w*JPh?y7d%xKhNk^vu zet%{%W-7^>`>j)EJ*Mi_XLOK03^NQA9n@)CEiVb9MD22GI<3K(z6K4x z;i+t~P#SdKIm8~)H5N6zckjFpsJp^Cr}TD~4b9@xxj9mUn$0J(Z2?nHn|767(d73C z3(9fGniGfNsW57X>@1!ZA0d~->Np#_{Jw$plff-Jh6l6)D;YGc+NN|9)4FIwCVgz> z7N5XxFs=nn2iWq?NE3-ine-C|G<$}AVhv!EU|3afQ)e$bz>{mY z?qI2GDs?g2up&cZLbj;6Pg?nl;J-0T#Ycc-lN22H(@h3yWY!S{0?J>NwSe2N7MX(j zj-AZ#;X|Q`*!H+u%i9|hYjMorS0*Y2Bj{W3(NnA=2?;XRC%J?TsH? zIipCpF#4&ocE;)jIw#%*2}6ZwVje6nc+jy~uInHKONVyKIq@w{vb~+R`Ff zWKgMOtAJJ{n+I>aeq{TGWOJo5i!RC5`wPRNP4(ZpG0YUIb?{EOT39Hhgaj@{+9tlC3Oyb?tpw zGGetrJI{wIsc)`Msp%rcs^g{8Xsqy562VdRh^?mWxW$QvBNEs=b$f)B@9f~m8Imhh zi5}vJ#?%@?yQ|id5r5h1`g9#SysR~t0*1{C-YraEov2{Fo{XTTFe~H}|6zQgVOq@w zM!iM?eKXlMFt#b#HoW87p{)t)S+CvB??Y{qUnL(JSHkZs0O%h4w(%jk=fhGX>l8d5 zQip<|2r>LD8e3bV$$>VMR2^?6{?=_w+$^=(@FeI~=Bmk!(n1}3;uYU)*H)M<+lR!E zj5*c}m?XYxDzUe*9mE&Cul&>oQeoy< zM}qP_Q1Nt!7WrDb;P;ooA#W6Ob13sIPI-~eXxu;3!FrX$q0%Ig4(2J2v`kU!$Ud!|rB6mJZD!JSk2ggf zxF;gAywHYZqa7{bN%mzle4H)j)QH;J;UbEK(#CkZ(uT=wYPOuZ^6Vi~4|B^lbG1mN zh@5BkjhZ-cHyO#|u|raP&euoV@I1s>o9ao55^W> zc7K+q^nnJ%CWlZp_AXOEYPIXrwRBr&4_j^1VLZv~r^=?GF4JC&<%~-#@xX&* zWBv+F5#Xa~##mvcLM)di7s`9k`tY_P@gZwuCaVwIbGUcLnmQZE)OO{;i=YNcp*)y4P7)c zOSka^vgW8L*csK8y&`H3K_hiR?1#5Fl;wwGniq+{AY${qlyy2Cx@g4Go7Nl@3_3>> zVHiKIDp-UA&GIY-$+p+J!!UHj^|@i3Pgiscqr~DM!!ljj*20u!De|?7Z7hkavgHHF z63k!I&?-1YAtaoHEtb?|34&A(-XqZ(YVz3N4P$J&$RnB9p#Osm;$#)g@3&Ak;Q`L( zip!s}6yk?$j{n+iDch;!xzOi3Qm?IoW?!(osFJF&auMYGZgF7l`LjCi0aO;eK7vWK zEV-V=d2;wgMK#&A#$@Ns+yte=ZV{7)?(^HVrrd&e<&wA^k8-%ZImxSNwtJc zqrnY6Exv4_SFH{c7%c6;1K?*mASJuh%>KSk5~eTY6zN&=zbwg%lV}98f4Ar5(zxfM zRE0sxc5fM2mbm7LAItY6c7Hp(&D4UPw+CXQqk}i3XO@O0N;`dVQ@@-Fm#(_>;#F5& zyv!BD(w5d_b)vKmjj=R_^@{4KLq#}Uqt?1+vff$6Dz|0ZM#f6+>1A?q1LWOruIv`E5LfrbL@aF&XR7qX!x4VTRsC07apA?65^q@g9+I)%LasKN{pocw z2GY&t=6>c#IErRE+^yo6nwj!7lPnUft%3#DlGNvvOJkMtOnwSu=G=|J!QjC_r2#0UA zezo|h*{ZbH>=@fvx-yTakFngWG>BVE6xg3$$&}-=8%n`lqdIL~SKfoC?~+xQT(as? zUTteIO0`R|0$JJfS8SBhIx^l2Z5lvYLoNpy)ev9xA#(-WZ6!wJt`xEW;#^0 zT2AMt+7*`e8+BD!LyP-r*>=6!Uxmlo9P8L&Vq@8+x!R$7+H)*3n>%zrgH~f|y3y8) zVL2<>bFJ32jxDXG``}8;nht5V%ZjqaKSiT-runBw*EKrR(~Yhvlyua}P~~;^^F>0} zQJzEh=+q8|M3zxcx2v2uTIL{;R=ct9&^>H(k)Ce{Hupi8jYgeudr1eG4$uG`M>DOB%`IA(sSsuARmZtn zE7R`#%QRKZ+MnrD&zXs;Y`8@*Ak=&QcCwo<q31#1 z8q=z6)QN7gsiMZwI9A&-$DN{4wL4lspf2yp+05y#YJ1KQjGf|%XLGu01f@n4iS>T0 zJKIGM5cF)PRV=!C`p`Xd#tzl?bd@}{<{$eQF69_49&iR~HD!ca@@Zg^r2<(XA_C#W z`Yw8+pcf4CHqztRuyS>}46&EvsenCHg%c?>$q{w_(5}6`L)*4H9mtYXBKymc7h^#e zJuom9R05193(QmYBLqVT0zJCJQ=P$cddYajhz6>kZdF4M&p$eqS)1u;SgmesxS1+x ztd<;BTQUcQGm8UMCCaK=q+;C7Hu^{TP<5YRO z)Gy3bE45B_hE2@rbccT=#g#KZzlG0L-3hDFOl$X8 z@e0gf=SUNFVJ0O3{lU}*3BypZ#gAki#p6)LHr`+1@L!$RT4JPQ++kVkH2pKvX=oH; zj64d0E|Xywn@F-c!z^e2ReLTlOqbYbm2IqHly8-TBoBpORN|(ak04~j2-NB{WS`hz zDY4nzHH(H!X2fAQm$#u*i;CNHbCnqZy1H0BS5UB}I9yojiz{A>e!BZb5Zw@9O=Dsv z!AeVoG#Zy|L!MNe2 zyXHZsq=JayI3TdvRyt;}c_lJ(9nr;k%-p7&_&4te*qC|H8ILmCh0lUTOVn|&f~B7b z8wwJdZOP?`^Rf#!T`K)EG#sbQusopCX}3H3(CNBcu4=;3*wY(Mo-VW^CVS0KyL!4Y zook`$A0JX9XRsuq+`*|Naf6ALpA@^fA;T)IOjS4#)a?KxdscN(2sFF>4J(i*_48uq zeJiI2|LSywDU)(dbktI0Ph31H)(4tQZT1X2aZwO3B*hx+<342Ri9ORJ9vZt1GKBC% z;1J&gVl7u&XmGb~N+mm=>~N>Xj^^?SAs7@qq~SE4Qa?SG-msD(+S}zL&$ow0+t)xe zcx$&hY?YmvMMRhe;HSwVGdh727duUs{UzR#M{L00@YN36&?yTZE1P9V89h%xpny`M3+xepOnsUi40ckh?O9W-m%A4R_E_-fae;(mtktwj!@&8neqN&P91 z779-6MD0BB18S{Z>cvcZPNU6oJi3PI`9kpn+2*&db87!DTBxg1{>j2gwywsrMHai# zeF8p`22$%e%vS1UE1jF6lbfbhvseq>kycb^N*tMmd5)>1hYWtbS%sr)J(sAl5pQ&` zg!0C6Oz1})eCVE43p^v|qPp6mBd0lzsskI6xD~!fQ8H_*o}X~*-$WeAVy;*A%X&tV zXok|M0WT~De7Bj;L{qfIS4S%8l2vAocR4e>fqjO`Pqtk&p^mg=!L54^Os-4e;H;mv zSt#B29nL zx88Eny{8*flxEBh$qgz2CMrh>b5gE%UvDm)Ut8^>AV! zkwbg2Q*Sd0hoopKQ8zv!c)Ef<#-62F#&Fn+Z5MH@lkfVlXW-)RWbB5`C=|ozG?O@G z)>F#Ary&zI^)eL?!X4PhdYd>d@OhntTheT_>yg)t4GnG>866v;GIU6rEeo3Tq`aJE zXJ_F`e)tnyglb;%ezjSA$t zL+S_O_U2?+Fd;@A88DdE$G7mEWflS+X z^7In&RvBcscF|+&w*9o-V5%@@Zh}ITk4PiF+h8hVKN7?286w56m$KMKI8tW{jWs9p z?I@Dg%H@3(cGu%-2=WR?!IE>p8icDzFGrP&I}vMl!DH!+LXKR$7@a|N4oL}bWF?!I zwU>Ujy0jJyHg2)GDtxUCamihZ9&C;cF`qctSubmM{4x9ho6%UYTNr>PYr1=ob zx^It+>XkeeX9*I<;?)|nvz=C_HeJF03W1TgdJPX7qAiFbix_6g>M7c)+^uX#S6pOQ zaQ)M;c0?|H#C|*InmKS{)DGQ0H^G2nGeYJ(rBzT!WAr)qeN`cp%w6rvgOQy+=Ct4t zts1pyIWm^_PO}y9WA(3n1ve32-mQ3B_#}Ao)t5i#RV7^Wc&2f!64kYVn57DtVHDn~YHoAgo#Ef`J41`Y-U-GZ-u zbnSZIEj{goV)ed?O#AsHC)$G5cb_DxH3HPiCM#z8-Jiq!a(iwL$1zF!R5*{O{n}QG zcz&_XvEX@v-1(WGPKDaVf)?WD??u%yOIhZcl~lK8&q6WDcZR+Av3P~NGQBH`4I8TR zFD#I$)zQu~uH*IBXd9kf#6qyH2a(4zW@FXsG`cBl)YW-m$xE2;OJV-TY=<)ESqJJI z*g7`Aj~V2w8*j6WLs3F}W~hUa+!GOlwJ?RdTx&1jXHKnQ0)9XATR7yntE4fTtPDLL zMiy5Q@63?$0h_R-J1TV>zFglm;$j`45ln#vA%!eyjN`P|9m(I}>JsxQUxZMX)|9CM z=Aumf>|-=Ws7dN~MjPHzu%ftu@o=dbTES_dNMnc3C%D_i3;Lx$M#P|X7ewjdbBL@I zl3U|;f8Gwp)ZT9EDk=n*x64)^8|E6Q0(>KjMmuu~a&QADTD;Vz3&lQs+k{pvCw(tD0#?k$}eMuX9UiXslV!XW4>e(1Se z`3owBwY{=)-9sJ4cxnW!CG9FsP0nDaDoSo*JxZ`HnGq&M?~jppbT3NjwBk4@Wj&L} zLDHaSA_e2TqUkVpW;4c@mhEUnv@k_gpJXNKDuJ4Kfm56HIH;m#SH}X*OY7U1iqVe{ zRp&Y{DY|X(S}10wLNUJhY0r6QxQ*K-P1G>4Oj*)}w6ClevyNY4!XjPte1YwG(DNdC zj1f|nz_v>Hk4tpbr#E+zMAsQZT5J?(vDzEC=Sb+TjANtl(AFRXt*}7D#oRnr%CQ$s zsemTxqyHdsgjCCN@ZxvP0wHs|zovYmc8ot7G3jgUqL5RkE&O#-u{1XG%pNvkk50Ns zTy`x62=a=Ldu;~X5B!b#@r^H$_xRk0FH$f}>DQ;AwfZ zsdzkEx-p9rt)kUDtRC=$U3{O98k9(j%5YnTw#XggWY`p=FPKC0p?EtoG?w?-^g`!| zGG~fnu``NKmie@uLfgn%ZNYCXm;!?(97x^N3Xj9*u#~SjK^(3cJ2gJhPG+-E_O7Wi zOaKlMEl8@a2Dfvo=?-iP3}DmMtvhFJ9(q5Hh;VW>I!LY<=0{j(uQdpJB9x0IcU|!P zgoCUz)-#hPvc9jKjqIDh3M^=2l18K;Mk3ES*{_74>&&leE=^jTc8mX$qs=p#-{L5o3NT|CLVQA3MZ5kDk7m8dZ1mI znjo*9wU9-LUWl9tbuFPIB})?d39N#US}3lsEO65%mw$?BLkv0-%ZyEKW=DVc(5Sn)_{vQPsLwnMaH*(puo)N6}cAWyq+iZIZ-1mQaooj`Ghxnp1yf zPnLq#>TZHWp4bi!cWS`-{MaXh zI&E$aK^prg5`^(HCttiEwg7XkWn+&mr?#rkRkg7l8g=R@u3E`RRE=utp*O0Q>;{5Y zq0!s%8le2*b&y6Bw+d+H+=9eSuT(J47=6}ix+o@*S?gV|!=)YPX>F#Fm4W|J~L zg>rO_R@r>6iYE?PC{k3+dTJDB4OV7V_BCwjT378nBnL3v5F_gw-X~1Sh{1#0Ho>v4 zd^LOPFydM5-^i5|rc2`4;(0bA*`DLYRqtLpx51+%QN!EbqV(<&%|#TdgY|n~~v6g#8Fx=@fXyIou(3Po76U!6Z%H zm$yrjl$me9*jmuL7xaU$;IuHeq}GbOFPG7DLyHnw&+FX6KHfw3U>zV2MdZxuvqMl* z`uvQm7H}iroLj|N=4z7w_9Zd4mJXS&MRGR1SeAX)J3pohuxyf=#7#C%vXv_50?(t7 zE)BT2B+evNwgN`A%2Zj{wzq$cwtNqgcrO=2Y^c(PB?LR2VylRyVaLPC^FBCC2DFOh z5f|um={iMv_hlx*B+lFm6x}E!FH>*fIb%}ZEEUq2!(=7~8n0mpm1S>}{9l;ib{cNp!(C>2R?duFnaq;gRWco6L8$-R_ZvF|ROaW+Qjubak5xiDxKk42@~T z3*-jFgdxa8u%#@NY>Dl_B>MkdPr%SN_`rS4URzx=ic)!J%2N{^~7x@Oj073-d+44DVorQ_p7c9Ax6GsT;fDQ29X zVWDd5lUM?$Cu-{MY37>cVU4lGLN>Rw#ONqW#J5$jQcJo@Wh?gLxiE2V$l2GHDaH8k zOk6D>p_nfdh&& zSG2Us_LR)E+&!+jNHgpf%p;Gj-KoJi=X zRAZ8kC+R-bKJ;mj6~&VVf|XC_cE#c3v)*-5c}!VTNI5jUt~2ggd!4Pch9@&qN6WEA zJt}(lGVQeZ+?5C|#U-wC*A8LrT90lGb9%{v)pgQ+CW$nrizsm=Yl_{hjnzCeO$YDU z+GJ#OWN2)Vv+g$!Y2i5MVeQy5xOHr7DA_azjZL?7D5nnAhz!P27I?Dwvv_LAU|1ppvxRzm4?(0&Ea=_I zu&sHcd$U1J)}Is!H@6bs%^UR9SRfKhO${%*#TIspnZDS<6xO_=8s4+QDv%7wEt4&T@-2!sxs)2saWl3UA# zbMrX>r|r#)my70Qgtz*syulA05}6Li<78BOmdv!{(0r{d_qNffBI?6duwB}Pc#A~X zqNU_gI4m>L7fr=*Sd^KK_GyZ_WAlzJhn{!ndD{;?FWIaeNa0AaAxIv|=(MIP?P-KG z-PrSbKf5rrX+DoI=7J(jcb80^HbbOK-)YTh%`fyN1+qp_<0%@+jkxjXcW+R3qv_9B z+;7AG*aaL9vsoGk+eqUND6oD&ha}{Lfa1@XB4Oq0v^C148%9Tht4dszd1;RJ@O|x< zQtxoQjVVb!nYEx}Gf`Y$KbldjJ&Sgf)Dm`V#ckt|HiFD_4ozmx&G}58SjCbdVl;{1 z4dsg3V$bD8LL_=z+n=wPc7#Hlfrt(2;yaTY$%uU=lNtOFft|TubiT$7Oj`DvY?0i_ z&MEN1C4+3j6^DnyGIxbZl_4;o;IQA`U&dT&w7pJzS=Fsl&2aD7Y!1*-ZhH9kf`!qeE) zp-AQMZEeUd(t>Fj;hl4?T0ShugEE|BG))(F%I}Lgg`o*c%BK{xy*x`vS+d<5rp{!^ z5jp87`xTaCLe4(PxE5Upn7IPz5Vh+dvWM^PA3geS3VQ03L zLVcEX0+Nn~qJ89+MjUE1WQwa==aZQ{^rp22;W3I+@MTq|u`uLbr_S0mXkKyK8X~1W z%wZ>ER&x0>Ww4Z6D6w&FhG(H96w~==M#9D1*>S+3Oj&h8?C7fCg;bPX!y}tEkNA%X zG;Z#0YU`N8_DOF&y)k_8f{|0!kJj?tT2Y}fW4e4!C@hghfCjpu=9+$+Q`0Cj`@MmY zp{;0L!zik>qc8PIhP9;utw&xj?+{{(u-s#*8EQ>YM~NwQG#LxRTY)U9&Y2{lNpEy* z>szu~mY9}qI!}0a*v!M)%I@8wzQ%ye5Yr9$% zsj0tMk7dc|Qq`7iWzK$!8?oZ2GuiFNauw?4#BqzL-zngyQTd$$9>zwLqKSJKc@ciQ zAnY2aIhQ58N>N!+GmXW~plP`S0It@s+T%baB8(Cpl;|vI1gOZ2fqH05Clp0qiuh{= z+(wrIwB(CGC`?Ei`$xiHp3Ke|#DD036>)ZGz*<`Q$Uk;~F|CS~OVPcJ(a1q^D8Bso zL0N}vG^+M!nz_^Yk>?FCOF5unem2=yQ;OVTLzO5+h0A>JMmt?k(qa8(!aQ|gfrz90 zc*2t6=~ooyM;w(&!>>jeFG}O0Y~h^0Os~^`=mVohgtDl)tzT4#htx191beywBp+mp z&3QWu*m8be+b=BSTin`O(MKgwDd~J>m$D^-?R5D*4i7*#(i-)4!_J{b+Ubz1?B^B+ zb`A_}9Ua&@kZh|?^kz^PZ8ey|E1fj5s!X5FL))(#z~}LTEM%C3`k*1@Kh02h?^a(nv|=sC&qaaEaN-^gKK{ zxT4*gY-Ow$VPp)$uZ)>-m+9`IeQi4>Cs$w!MzLmrB5|tiIGL9%8?>qwE*y)NY!2$1 z^;Jxg^^*K}(L^jtsktK_ThwbJj_6k&usnM7_he@|Ebx@SVE{whX8kyY*;ZQhIPb$_ z^tN)16@402Y=@W=shvZC?aRU}sKIxi295dwtL;M_j9PNmfvJ$_sM`jA@@tsh8^13>!3K-eUWVb z*bbE~q2cBG<83@Bq_imE;V>)F_~D0=t=qDBv(QNKv{8lvjB7JkGA$=8lD1comXH!b zcSI{ynuYSowf$_Qmw1WniA*42Fh$g7@k86R?YS-$E~sT%##LaRC~-2&0u@UKYePx6 ztr^eq47^#*h)0EHx>P^XF*U)$JNE=2oV9#XV|Sn)9C*IvIyZZ|Ri;H8Npf!HZu4ZD ziO*uGO_wgPJd#fw$xlDd#YtX}W8I^Ui<0V)Mx6 zk?^w>LlM^u59}Bn+&q|UDo=BuP*6YR`00}8!#GwYvKX-@ZLhQKhQczYvBK;T(+yF0 zmg_-Q2ENV&Ba2pyepw7-hJ%qB+Kp-aQoCHlO4Z?)EedLmPjnVu%N9D^dmU@M*n6|+ z=P0iG2)puDx~N-qyL zRQb)ZW3oc-><~-rK8;sPaurSrp1ESO%-<1G^oaPnExQiy@&oafkdYRmgf_TNtJ8A& z&?a{&7xv>9^VAWw+;gkV*95ijC4e3NQaffT3i&c?P_sxqaqOIXbaU z%hzaS4$h8#D}NV*xhp{yWpE|f2;4iB5q@Q(nrt4~v|%tAq1ZmHmSrVT;J>@!;vjhV z8QrqeUyrB@g?f>MW;c}Jiv!gGx z9%J#J)>sxkkzQsbw_F1=h8%8pC$<&lFx5KpRyb}XCScJ$C)jKMfsqaF8(XkveH4nR zv6HD87WOlivImYhKB1`6$rA#j>HHX$+Fj>eM4?R|p+2_0S#;knybLYFSLJo)blEnF z+hIICA~zfU!r|q;ztORcb8q4PpiA0Gs0Lcoq0eckVPwt{gdYwm zoB``?KWne_v3wyQN;$-kF#$v^65*TgfRLIx@&MC+O&Y2174~Q zYj*sXBmS+r__yxA)(EL=%(JFuKUZk>r4dj z=EPd5m4xSsPF7(#QrUKe!tsc);MQYD?=pMMkR~T)7DWq>{BXl)LM%&6L!$F-RkC(- zvNhYh1KE!_=+{cf+!sqMwCfZPotH5&B}@Nq4}~RN75yf-Q!-g zm^EM^G7$C{0s&(}uxub0NCI&JJccDKc>!LY*&i>2BoD|VKte*uOZb0(=TzN$yQgO~ zCi&0D*T25^R@JRKb?Tf`r>c(r*RhX$Q^MbeAC@Ff1^?u6NpkhWljJ!k>uHkw#xs*d zKM#RV2Hzd-KL$RX`)`0Jg1-Qt1|B<@BwNAt;3#+-_y+Lv;12M)rzgpF@O|JN;J<;F zgD+o|B-_BxfE(S1)cq-I{r(p4 zBJMu|ZUlbiu0%<(+d@NDuDh{?p)P;0f!! zz7yaj+`kjt1b!P-zEjUmk}JVEa0vWEa5MN5P;|K998do;@G;zf4itUA44w-90K6DH z`dnxVZUL!kay_^cdV1j-(X~k>;2j{WkbD57%aZ>Is=Qx< zE%2fX{rP)A@y&xEuaX~us_!6)PXVt0)sAV9u1jtQQ}BLJ{P-1+rYAoFmG3l&rFv`z zt=%A9n7j%+9(({4zkV5f7Wk8Je>R;XdORCcxph$AzXR0w4~P5Df@=5Qg2#XZbovv( zlR=etCI|_Wz2K$bU7+gyZBY3Jcql$w2Z}xiL8W^;|5N+F2}0WBSeQ$AC8+wp5ELEX z7x1g#N!&k-&e!{s!KZ>(f%^UocpCV&fFB1Zx&JQ6kV!_U?32NHQ2lubgk_UI0Y$g} z3&P^b6E1gpJ_}@sCRH#6Uj?fE?*mT(zY_2#pxS%Puz&wDQ2lW;sPr!fH4g6s8RE&0 zK(+G(9;zR=fhzCCpuYbO@G0P5fNK8_z!W@=L8f%)gBlML;M2gDfTH7F;r^?j`u%4h zU6%aXW>2>TRK5zR@?RgGzYjc(`!9f2KTz~J0imGwZw)vPp3425pz85aP~-e-p!(xf zgv*)WPEhT8KB)X31Yz;y>);^x#4EhM7lLF>>Y)1Z!vVhx8h?W-?=(Jw=ty>e>aQ1r zM}zl+O7}5P?fNPBOfW^*i7q3c@=bxF&znHi>x&?)nLHe(q^ZdUQ1yE$DEdDD@?Y{p z{-<&;K&Y(-D7mB<-OoDz|VuK|Bpb`|JTNye(S)L`(aRYoCHq*UjQoI8$pfZKLQ^E zehGXe_%%@c{%ufv@Z=eJ-f-o)4}A?*!G(&w%HE{|pX*Yj*kb^FXz$0*c>X z1)c%k2R;gX5L7+B1*+VifhzZyYg`^Y3)KBAC_23rJQ4g9sB*pqs$P$|*1taps+{Y< z$AT?T{qX|u3E+L8==K1pbl(9b4}Sr!0gt=R`D+8H_B2sQNzk2A3=6f#Tz7S@ci#Uwd433>09vW zp!nlVQ0boyUH~2dp920qsDAuBcog^-;N!rrfui@{g3AB*p!nd}=Xkr%2i0%8!6$>a zfG2}51=oV_0AB!p5fr~%b(7bB3{<~1!~N?((dm9r^!qj_Ivn#{&$kgwxxXsh?*$*t zeG7aVcpG>k_-0V;`2eVPegRawehP{X{{o&5K4Q1qF&Bf!aen|5y^ z&I6#@|6Ne!9d)zU>v5p^?|4w-{$fz|xe6AxQf&F zGEj6J1C1`A#^);o{xK-N`93Iqe^k};uLni1>%;wiQ1rYD)c5`@Jbw^WxxWNOzb8(6 zJ=TC4SKGlygOz}L!7I6Mf^P&L0M(wIGtS55fVTyF11LJY7gT?I4iq2#2dH+Qx5w*w z6R7@q9+-l^6Yyi8=<*#<{rHHQkN@+)v$?+>Tm`-oRJsp=r+{A#&;J=z{Z6^X$LCp~ z#@$8WW57+}`PJZKxt{>lug?WVzk{Io?@my3z8`!f_~+o`!LNYI_gA3k^+Qnk9=_Kx z1@(Rd*m)SV1J%xt%{rg{Z&3Hioa^b+Kz*+YsvR!^QMt+6L55)RL-0ZHs=C{Wr#48- z{q5lW;19sdz_-mO2`VM|2KXP~x?8aU!BP_&8T=;rFzWNNR+9V;_pfNX+??wmlem8X zL_{Yi?@N+vz!ta_{5&`c9=G40S3uS80q~vRQ3uck;JqNENFH$zn-Z*pH-LWu>iHSB z`SUk{JGlR6a2Gi8JpayHL4D_MKty12{`38NuLn19|9w#JSHHmPc>tW?{!8EhIQYUa z4#6|H-v(X{?hnrwK=I>uK!$E|+>5;4`@yGh|0VED@P}Xup7>(tyNd$e1U{YTF9Dwh z-VHt(`~)}%ejVHh{t^`ZHvYQfTR`ReF?bnx%uC!(*#SPA`#V7K^|wHc^T)r`-(Ln^ z$o)ZZBX~dfV(_29i@?t9J`Uaws+512ar-PpcPX+%T+yFlQ z<(_XlxSIQBxPL3C?|%Y33H&*D7I^F{oL@GAr*VHbxEB00cry6Y@ci+=;pLqTs$DmL z;+sRD<{l5!d3_j*HUhiRW4fnTz&j8;Dt^+>;t^)rKJPUlnYkeF%3ltp=fvU$B zK)wHWP<&N-owwt5@DlDn2&x@F0@s48Uhj060L6EAf_nZ(py>F$fRB5F+o2bLDbH^O z#SgCsPX)gWo&x?OD84=Rjb7ePQ0<)uMYj)wDfnej{qj@rOz@;PdH;=oqW^8+dhj0b z9PsPm{n5YW<9QeqpT7k>7yK5e?;LZd(_;d>lKbBRmH#{77Vy|NJ3n3zp2z)1LFNAu zsPw13#h>p5hq%8BRKI-_JQ_@Y+n<*}eSZ(AcH9Sw4qpL>!G8ipp9|jV^PCPi&i$W) zHSmdV^ZGmwRJ}h5z65;q@3{SV2)vN{Pk=XqKL;-cC*JP!%ijc_!2Mr>$AaGjPXhl1 zRDGZL4yWrip!n=1p!n)N;N{?#!7IRH@A7mvfXerBa4Yx)unZpmPXF$HQ1!eYd^-3u za8U2>_Vky47jXYFQ1tv0P<-@b@LAx~-sOC86FAKMTfs}fZ-eK9C;hI|brjV5JHTDw z7r~9-Y47&$RYCE`D?zpAqoBU?*WeI%%JFd9|undzaQ?8d5@Pj1U`-D zH-oFd7l!-a15f1sQ=rDvx4@IZqwjIMU^Vzi?$?9Q2G0jKfUf{WhtGhk!G8yz37&q~ z^~==(?*x_puffNHr`_xHSqrM4Zvh9v-vz}7p9huh;rF?|IvNxmE(AxwDyVwi2TERi zGu#in*X8aIcqz|s0#&cy1~-EX;2Gdi?{ho;Tu}9T7WgFah2ReG^`PkYS6~Vr^?s-K z8c^j`z%AgbLDAzc!OOwZf8W191M2<`Q2qM_P~Umn2R#2aQ2pHjn|cq5jvMX|`U_me z{rkbozz0FSKkkFhe^-Ml_f6mc_*L*&@VlVK`OiS5KjTB*o-%kQ_a6Ws1AYs9Jor8E z3E)41M}d#{u*;95!4mh+0>!U$puY1iQ0;#|cpCUsP<;3c@DOihoyiXVOss-EZkkv|^-HGVdMqWg=$ZQy4>@xzloLfygZ z!N-9&fj5AALCKTPfTw_`ebo7C7*zRJgKNQY@FMWV;Mw3u!AFBX1jUCx1@)c(2P)mh zKlXY)4}3EBe*m5f{&!IP|L_N#{;NPee=c|;_c6|eM}Z#%Rqv00YTw5}@x^DsLGT;ktzhyo&))>q zKlgy@uP+DuH&EXn{J6{6o!|!UZvmeU9tK5+&w>p9>U_qT&e_f=5&{skNb zFZgd>kC%h0|9io!!0(3VrBAw?9tSVu`CCEN|LdUW`1jybz;wasdif5WmxCVx)erv)ie6`b z#>dGGpxW_jQ1w^<*Mt8E4ujA9tf!v_w{rg)Q0@3SDEd9_&zujofGTGWOu=`7M}waN z2f#0b;=^x&M}dDEp8o@=e)|Qe{(9!;ydI;V?q38x0=yU0cz-{r@$skN)4(r)=YZc2 z_|(rkKaGM9{ z9Xt=b3;ZjtKjr!wm;MHM{wl8ba=nl14LlQX?%+Da^#Y#h@3**y_&v#W1=kkt&(I70 z-Wt;UAHTIVzTf8ex4EXdM9cX1_Bz=AMgJ|Nxf;~^rT!{hU**~w?oZQ0 z{w5ug(|E4&b~6`Ul7j$ECmj#&x&-^06WL{+C=gg*<=5 z@27>|H-Hc4emmDYxTd(j0UQHwrXs)nBUid zbK%(xSPs8$QzHJJ>yZ2lSm)i_xZcC>7jv!V+8fgI)5iI$^n<@OJpTi*1iqe2WBdPc z?dQ_pJv@7=|Fr+VG5r4B!n5y&-@gN1Ncz`tJ(6pGQhLm zzyHaDwLE_c*R#1U;QB|NeKI6m#rt^uG z@a$ah0QZtvo5M4~&$#O0{{Dc1-yv_uF^$Nf>@A8|d4-(%oALYjwxALV`x*JWJ#dkfe9;(A3$^VfP9{%#D|y@mG+@gX=HeqRV)$2&!2Q|b*~fVH zA6)+y-U;5tbuHIZLz?a2xVCby zzh7{DgzMEj`z@}&<@d9>^f$r1{>ogpbDf|Y{;uWuS>fGp1{~t~z2Ubd;(zbvTF0|X zxUS~9mFpNT{k?$eOn$!_Z0iAk2e>}RwVvnS0nY`$0M2v8zef0R5$}E)9|n93&*I<1 z`MojTgYV&bBG(`ZuH-r+yn8hGT(0MbjE@g^75H+VzYu&E_)p=v{Gajf`Gw!V$HN-; zujHEJ_rHcj-vmz%zdsJ{DCGG%_s4SW;o1ASp2+VHbKS@FDDHm@{sz}huHWRkhwIn4 z^!MvrKj3;i=^hJy2&{n>@O|LrT=DO8o?Xh#HQ+GUWnB8(7VrwcH5*qyPvY9hb*pap zyN2u2T%X{29oH@78wK_E#!!ZSe}ijAKluA+u9Rz@_YJNOa-GWkuYunJf6jF&zfa^k zp6l&g`nxmWDd3y@QSyE8_V9cs_!_SJx$fe6Czt*{0DcNQ3OtVMk^J5a?&2EY_dB`t z_jg=Z@$C0?GcY_m+n6f1YxS9Qsxdd$sHd%ibCZqP)<80_so7|?(y{7vwOOrCRnv*` zBez&PnpRUbxntZxZ*YojeJMH}&x2o_qO-rS6rBZ6OD^um!*;0A7R&MpC9yu`I zXi^!kf4aZc-ecd_j|R28yk7T`Cd;kr?&;cWHN8|n^=m^{VOLb^RccmE%c&BimUg<) zOq*4smgtaf-nI=Qsb&yvzT7U==H_Q>lU)Ucn@!ECN}DWC?cEREL}@bAR0^3?X)?Ah z8R(a{&$B5nZuf37@4j^W`t2J>w{1uv$o}f=>^iSgrPfj{OXW_xLCwlD)si(OD{gZm ztvBc(y`S3CXwXbcW-VTquC7$4%bnTwn!d$ZowK6!qgY&M)8^rc;k4GS&b89%W@D~E zuvocfr{1p3RZH`&YNygD8Fj7HSX!l$hBRq0jWG?SHkvCXSs;Vz4cDq>J#>nkHC;Q< znJ>0%bECdW{ZrqY?uNC}cEd1ZrpoMWG5O-(V(gr<%HQ5oO#^w=h9Y6$?N+tioZ3^G zZ^D=dF1xhVZZbF{e_p$%TDQt*z*Y{{%X2jih=VG&oT@H?+gD7OdSF2~aBbRw3*r}T zZ192VhIN#?((-EcR5cG0gIZB;cS)&pRJFc5f2PB5<{Ulk?OVj6Ipr3Uyzi4veYT1? zqlrkT`RY_{x>jwaje50TeHJsgIK0)E-&1R~k(V%$SVFzfn2wCGQX2Wd6*F1yYnWst z3nC>@r+T2>ESKi1rAl?OGgEBVh>7E3FiK7+XZI zNw}q}tF8HUE+KqK2VoE@x8&$euWdB$&!OVl{Smr8^?VdVkxq`PR(MM9hjQ!RH`M3a&i4yUF+7Z z%X)3Z6X;#D+!XVfSQLSb&(o?Yu)vO?w5ZL%wYstbV`(wLvSo>#QJM&spd7PG*^lm_ z=G90^p3clRCd;!eNf$W6YbIqV1w2!qtJd3yi`s47>Qe&GG-j5_Gw!LD=ldkjt74L} zUTfFNv#Cne(2}fFMlYhE$S#E~=>Jxfj9!e2Xtm2|)bKi%Q9V$d>a@*(Nu;y))?`L3 zHaW7|jA5tjtIBBbZgQ%?Yk`Dbq1kd1%^JQ{D#H=gtOWZpl6^OAb>`I%t#n_l+3wKB zkgeKUDf7;l;%`Efay>mKovF=~Cl9vCZ%vvj-_mFXU5{L7VOXV?);n{P)ut0k#ECEb z`BK#Jq8hDIOx{%v4O3BbwR&x?Gl%TDwNqgW$7ue zRzGqBo7H_aYx)sdXl4BhEsW)dCR#CBeSeiEb{B{UkA~!>iw#pKpV_9l<%l#n=+$ur zfVP-UkC3~ZuG>7aCAVxf&ZIKh`9Kd={nBII2AiAyNQ)p4ydsRjslCe$cFS8BylC_h} zwUju>8t6!BZ%A(;Ow|@kz~zcmS<2+aNrjav9VRX^YDzBTiZiQgNsyK&HGj&I1x3{| zC3^Xmt=mSDjDU!N>Re~mmHd!CQg7r>qTw}_Hs)={s3H)9^nIg_L=5vQNiKwMb9%P1 z9}^9uK?av;I5o|=oSd_bGP>XOK)U|G;5A9Hgf_a~O*Ke5U26}egRQhYQ?Aup?eyls ziB&64?KHDYvfOKRs)MCFI2@sGTp$Xv%jaJ49RwF9)Ck1dZTO0`|C%}T_nvKfOd->l6V z5KW{@4`1*+E8!t@;1-Rro{`@@bS;J1+I`1hcrD2~HLGdjG;PX8sJ+EGhkck1Zj=O* z#zt^sgm1ybtyS@Zlhc*md&;dnyJs7Xz4&E%>Q9xj6lUA+mKm``s%CYn(X8yA z-&1M!NdX_J$-%YOLLugSDeJ>nW>5mv8XA(L2`Xrn{!gK3tA?qu=>0sJ4T+fU96=4r z(TGr$Cjz3^?V(TOtzTCSZd@fM^smn1uE>VVVq#Doy4rkIi(i^$qxaQj69z{Y4pw5p zwfa5`xJtTl%jT5XlLlq68{+Fqxm~v2t7<6qW_I_TI=Aa}r@pt|*k5N%%$4giR1TTi zK8PsN7u2xvbZ}5o{kCeeVP%e|XZ75dTdg?XM9jIz8d@Q5>ckAK5gq zb#zB4kM1&#-Z?gU&DPB$_)3>6FV7^Fuxa3;PexxZUJ|oQ2CtEL8@vV=i8U!!X+>Y6 z-;sS#4)YHaOw(HFS;?WmJmW*g99b&f@D`yWTOfMdq9xQ*L=>-GMP()RB+e7%qHg=h z_R+EH`Ou7O|JJJfqh<%?Wq9j{3K}YYUA_HKvYC}?JhFmZ&S6=bj`XdaGO0@PH|4Xhu)4!#tQ2t(Yt7qDw7pK@Y(p0K*Sw`R9Zc_agDy)^Cak` zMHQXI94?hQ_2>)CTwFfGkkX2^v7}8_UiO6PNA@DB8B9H`hDAl`Z8wSK>{uu(X6e#Q z4>?0np2jzsDvL!j$WbBHrWxH`0=+x^QmQXYCDJdgN3&%0>i*r96g`Pl^)E&mMG?A) z9g0mL5!RTGtH272U$7TJ)L7(n);I zxJ;^MRdN@##$eN|#r0FHS{OIXWy5M_5QcFff!Qg&rTM6trbVF_i*RxlI3##ZB&>== zn!#^Ak4HeutCLlV#U7J|JA)2eT`KLV&eB*u)@iY*Cv{`w$n;Hf#_U{;ARhtgX(iT_ zZ05%LDX!7edh_h59!P_?OqE&YwZ4nhGGA_D5=rx}>XUw%q9R>d_(3(S7LU=`j@*~i zJ~$t2sIG>#4r0t7kkvXpTb2*r=@7+uy^0xbq(q`DNwv8enwENC@?=yi&1Gfvyj|Tg z!E_|DW^=9aiQ%z{T|15GvI@dNzGyC<&Ynj0%%oso@0=?m>9iaMXXKKIS)I>xZ0>^V zpoJrECbog)L#!_O&_%0h6RS&iVX*y>!WxLvTEK|~MKcZ-kf84A70KV|07y&a$a+O~ z>Pga)VC$O>b)p$t=(IrXjN`2pssgr1sGCN86i;*Iy=WtwwG?M3Vx3|#$sn8Uv>6$l zX0 zay!HqfCgQzc9$LmDFTkB!P4p-mK``0?U1?g14CEg2X`<;h@e(6_EmO4Fs#QK; zEi((;NjN9JxpUi4+S*&2pI1A(*ci67#b@8cU}S(xvpmtJ$8QrQuNi-H5XMJTW?*Ux z5k!it@yw^pbgZJ$8agCPgyS&^lc zV^&US+>mP6s*;EidMe8%6Em)v1wBa9O1U<3an|#(AneVXfCa*4so)hJY+WK>k~ZS# zo3Q-gH4i1P%?GM&%e=_sDztWr1;rVC!4olfqPn3+nVJvIb^u#x?4lAgE>je8gBZC& z0a^8XE1S8ot*zxc8&}NTz!LKwxEkSuR|(svhC4>PHNx^va5oe?s1l~;7)fDU6*YBp z>E^}#;tSdGFrpAUQ*Gl)o9Ok_@K?3)h6b6UXKc`IBtk<`sZyQ7!|QXr?&LhQcP5pj zF1qsvh8|C^+_o*n4}wXkQ9quJUq8NWE1tXT(Y5Jnlm3AaChF)`S&7%lnfMT#kCs07 z0pwl=m{5LZD-zdeMdk%2tNJQ>Ny7NNPOj5F!qjJrc@gu?#-7?F>XL;v+j5wH%zZ1i z0l}QxQGQv`_CY?2BC`~M>n!2^JvBHfOd2Pv;_XbgTIM4)4WI2pq87Xv{V%LU?Nb|Z zsuqS(sEaf`tqAi6lVjIuOqFp09h?&#qx@)>StoF}Bu)ub@}#XhnW@l_YoeG^^3cl3 zW|4(iA$7r2VKaqIPP%52mWQtdb4R{{AaJ5ywf@egD4t%0*<88XlbXF;da`Lrx>gdS zw@af|`YASF)@p9&_2i3*M58d=Ek&58SMYsoC;;tN-ixk(k$7=gvUb9GcSIEVr_oOjAyCN*CMF@$FrtGeH@fTd6WP zW)W=aU{|a2)HWTKWmsYUgE!b*2kQRD{1LOX8l5J)e3wsc3o7ey_}NaD*gE8@t=z;` z$H~Gh!lA=7)oQzZ=SqIY;xJ>=Nmv~FwQGr2=23X$ooC-8qs#zp1@p;wG&A6*Op+}2 zQ(m{pxZWtX4x7}BgebXqCz0*#Ol9!LiD`JGH35Bnal#;lT;kJvCaafE7bjXvr`q3a zNdIdpym}B5L(Y5SPqRp|+~N{`I&$64(XolJb)ku=!u~CrlJw1or^nU|+~v8yHYMAt z!Z#2@e4~|rL(fYHX&3YAOYI7U0!5>J=g8KssZSs$6(|sUQqxs8&Ly?FUxtY=GN?O= zFFk0($l$D$AGvayFf;w#x@u{0ngp4zFi*#&CU~QUr?M54iruHPOf%1jXg4xQt z!SxsDtCuipWkdKXWqBX7K5^VYGQ4^7*vR;JGCa2F%4B#->y;Fsy_jmJjAE_6bxjJV zGRe+TW3|aLD@XJ4ubu#z~c_XYcraTkVHd#Y@gik%hg2>3=#)SScgOtvLI*;G8KVOyb6 zpD%~s4x%L_+=S?F)@Js!({t9ZzcAg>tX9+U#&jEFwVH0x#Lu+ETDEvhF$>ycdkhh? zasZh6fQ~`!NFc^-lzGDLX?^yb#pA*{W_2G<-P*J-K){+)Q=Mi^8V!!neL>kR|JF$3 zTj1az&q)uc^5VNVZbSnYLfNoNHv5DMa%W@8N*ixro?{9`w+!6YKB&~1XS42Uqm6r8 z#$*}R)r=HDE4{H}9)a$i>El*rj&qbxTvW21PbqcgU<);KV$dwio+@`kqb**YgX zVZ$iTyPuTvvn*HjIzEE*OXBH?Pz6_wi$-(7@6%dgmb|C498)Xc+*msOEK)}9WfF#I zkiYCh*Z5MBINQ3F*TT0^=ZSFnHf`H(1&hE`S{PDUb?0S_*reawL@{g6WAv$?jxldy zn_c*nTdp+fh>Jj6Nz+{DVTSr(%^ztV&mQlA$MT2lTtXzq(nvd>^|W+rcEYOIf_AyJ zH=SiD`654zPIY9uhvZBmdblRMcSo6Pq#MK1c>4Ub(VS=Ee^V4ZqLQ!Q*qV0_3G*XC zA(>{oVQV1X9GkksWCgWXOsC~+1c}Bb>lj^5qcB#Jk?p&-4QtUp88JK0y!VM2I4yhv zVX>c2FkhU~5;DO-B4=nFM=OXi?(W?nnJ^$ME)%WD6F7 zn_lwEZIJ-h|5u=`wlrjWBYFx)@T9Jp`T4M^B%Wl(&!)-ijDENF+l&yK9GTRa=Fm`b z#g1JmN=uW=Y`d`b`BbEBZPwh%UxaD9na(b;lPhH)xN`=+rWS~hYEv77>gl?S0=}kX ziAe$@RoK)~FdhPlH~?{}wlp>>8<=Pf`G7Ewg-#@_rEJY5{I`2DO1Mc~I+>TWwYHc? zE>u(ccF-c(>b{SN)_2=#_0EAFF&@&npucA9yyaeZ>g;6i)&l58*(xTsy=shi9cs(R zwOM!jFjTfOaUBxLn2?A^vAuAiNrdSRQt@DQVY?bO_EjB3mkGH{+M_Eg?5dZm>fqY6 zr7cLzirBOu8*oi>^~m+tj*e|kuC7++**e4tu$WUOppC=ScoPSavF5gFeFozZ+AJeU z?d@c3hFx)T!3Ddj<+)IYZH|5{dbPCF)t)BK)-WkgcF=%i2iwM6n++tRR_87$Dr+aF zXXG=)1J>uXIqN)^Y{jVHBaL*NCSQzYX-INc%Sakhnm0n-YBI_`!a3V@o|`825WgUk zhEeRKT0I%{m%Y9yH!H)-*#^rb48Veyf=QT;>RCS~qbPhl#lDoq2$l<%#ZNvGsr_jnytxC;x7xgG3FUR2k76BdWC4%C2p3^j7AR4ahld zWMpFo;}7Mhp%PGH44C=eg<_LNEk-(pc8iaz>a}lA^ydRoAiAJEmJh zLR-LP?bbxDgm-wfSf)x8z+a7KYxy+6A>B%X&c7^9RL8GGE+peyZx~5@suJKb+y|P; zN(+y>eXLO#M_Uvo<6Yx+Y3m0{+Cc0-s`)}Y4cxC5X}IR2-Z%wm$!NEP(Ywl^TQ|w< zHW)^W-ucuxC?|cPn9)Yl5;o1uK(<-2RC?4>()ZQnRDw!u^Vukr&clEFG>|s1AeT2MS3qi?vS1k~i z*sYCO)00>3JZsl=J&JH#+u?nQ)m9o-BbjlE=yy>|c@@?q}e)jHhGW6(Q*kj zXqdmYt8IoAqZ|hFjV9sFtg(FJm$?+A`QunKb6)5t~boau20D)T%N?HqCkWY?zRu&w3uj?k@aQ_%b(i{543EEp=^pe zkbZ)R9E<+pfG^VF9vGCUEh^u?6l3m(oB_Be1V^Bjk*_SwpJHShARH3Od zpR@239z=lt4lmSh653C7`(<<^#QgfiRpa6++SUzD0CQ5CO* z@)k=m7G!F8YX{+jW|VDY3tiN8Z@TrYQOj@kX3*ylUJD7B|E`%W!Tx4>o{D6Lf_(ZL zh+-E*77(jYt*ugtazt~KqX(T?|OJ&J1lfYgbdXJs;#gqAU%= zXR$lpT~KN=ua7V{7)Y*V3yC~V(acM3yv(H2P5cOo+g$| zAu7|x{bhJoe4|kJ2gBP;WA?laV*(ksv)PcrR@z!AUE?R7+1FA@&slf&h3hU}Kj8LL zX?ts?Rw-@7uqsV3GaJ}BI#F^@A!~4(+3q`JuF=x^3rgo)n4W#X(0S*bx&GpF*ORa` z7LF6==`Jd*Keu$w#bg;e_uMnr^Ea@q+-jGQLG=~~9~;dfoUG;g!h0IER_VI(z8b8u zsln_KRdMO`0sI*HdHD>xUS`)ZDmIYcm&r;K)$*Kj?J3~gt-%#{xla3PcIzy_(4plYORIC_@s&U;}L_>$|^a^77ka_g~JLDQRk<{5gK=f zp@`X43x_!&TJ5mPuiF{|-XnOitK*I?ePk3gC{#!%Or5fscE61(Ux zcYUdhD~dMcx|FWf`i}EDKg#>6Qz?dA3nKRoI5f?+1Q=p>rMg?|VBzfU%)((B-ZYsa zJz;6oGFvOt7jzMV!3`9~nJFA7y`uO-QzEdf38#}xeQGSNF5Gjg#9L*R`_OF(z-qtJ zSOoMno(Q&WU{Wm{Mougum!vB$z$?`o#i+yV%$pUpYH*dHg?mC6;Y*%J{1Y06 z6aO5T2!S+cm=r&J<6(Cq8CSDyIjz8tB*f<;%01Lih}+>r>=%U)DxNu9INVAX?$XZa zHdRr&JU&#PBZfuB_olocFZg@zLnBfX;swhs_KD-!vw$3@R(S$LZ;$a>v-b&{d&Eiz6c; z-xl6qk3)zld~C0Y3lmP}TYw*o4kkBb$D+9HBO0VDrKS%P=4zP8ZFpW$gf5LW=nZhx z-MdTPsh^AT5jygL-omUyx>;!PP*}wLaZvQqH)8x7sO8Sj=g z0rz!fF))*m3jlXW7VL}gcKr(D|6XPWOJl)CwG$-9h<1(Da)&r8a)zS7LKI4YgK<+y^BN+_)u z>d7=}9+$}~$B}jHC-Drv|89+Ib(Bn&w=byOTyb@m?`DOW7u~_1isfgvhYhDAlpB{? z;x_aiQf5X?uP$wCW1?DP(=}FCTuys+Wz@5N!{UwU-Ai?HzAL0+F7M%@RhH5@66OxZ zj+f*iq88=PYuQy&8Rx0KgqM+>3UIjw3+rc7)pEzn>y8(tO);6e@G`r~TUEAwGbVko z6L4L)hzk1CxB9FocvO{GbFht3OcA8ItYjxLyzOhn-njMnU zu}_$(LaFr75(US|Q^gN-Fv45yg?sR=GN(8&KideQ=8A2|_Td)-HH9xev`;Y{7()KN z@PWR;sS3?m;sdk+ITvD9EkUNmv8oE?{@0Re$#_=(MP$OlEyTC7c}{oyqI@cZTJ4gZ z-IEoky8Citz^mnp%O_SA`YH?>vjl_EWg47ld*!7&fbmXc*BJ zH!JrfFp4IM;j^$`mye*;trS*TdWfV|U1=ySHzZIB*+ivFS&MqnTS}jZe~7KM>B_Am zWBgn=gmW@jS%G@;lvsqVa%T$DJ05?E2DwdpaGk__c&j!0uu06+7ybVilb~WxJ(8o zV(hGyWim6DItJq>9h|V4JzeKUn@sZH5h6$zXH?kCoQ3B);wJ(t$Khzz?ENC1P+ST6 zAaz&ZF6ccgnltl)Y-SyMR4WCW&e;9l;BQdki2mZ6XWHHJj;WObG1!53JA?dzCB1B7%S@bJ3n8!rZOL`?b?^&hJO6CliPM0j7LWfFF@GP^cZ)@dR z3$bfkw@j1sY?XaDEa&Rs&3@3;VuNMp{zCMa#qFaOSt46H@n~sFCX~pJ0n_>>iv1Fn z7obd?9g&5x(3-Ll*A2DIK*%6a_ zJT`60M#ZZG)%Bfy3~{p)J1H)}dJB_WX1-MMocqANB9djQWfsd#DQ=Soz{-!&+zJoM z)?IRN;zrU!k{0)j?R6$6tajvNfT)$~o@h0f)9%=Ak(;)R?i$;%Rl%%~qbwrLgwv19 zd?M5@mH>HKI%NZ2uvz+7ORb|ualuR5;yDlMS}>3QmNzl$rz2N{`G8Dn5vHKAT8+#bv{r-!#-RE5!C0IISRy zJjOP%#gbiREL}uKV%p+nZvPVc*TTXQ#b|P@{Sr*hIm)afSL{Ass2!~1OV3o_Gj8dz z0b)|0$SjU67rC{&;QpyCzFeld@_A$SaafrOhb=V^rPeVEJ(m?5OO*@@l8&)~n*e{E ztFwI2gn)F!677jaCtg@oqHAhN2)#)IwKp3M*-bREOI=SglnWDU#e8Mb0;Gq2WT)x>_$ z>|{X1YKAO+62L}xoSelJnVM&dp~th!R9EhOV5upmWha|RXP?Om=`|>pDk7hZAGwTR z8rcXq(uYhEW`Xef=3K^{$v&Y?L|t(SGMe-j*%JpZOBcx-M_^|6Xrd=pq4NS87K@C@ z;h}}Qu{cpL84vbL*X4i8WIJU`Ke4}{w;IyaJ{^g+Cux1Zm06_u{ux!!msMqs+C<*S z6KmMFq~aheY_xd@B?NP;e-4iSNNQtfIALP+z23n&GB!4{Ym7JGX_Ni(;TT|GqDjv&`y( zK1Sfm?V6A*jOQi8^kGzMQbGi`GT)hEO=~tUV^MpSOKcy+Ooxlga|`!q#)*BrL=lukn0T<1q&m%Orq>ED%3-Iih3ALPC${r?otb*i&KrvB6;B(9YqpiQM6l zF@d-@pNhoIZ}D|d97Zo~D3Dtd;uF^A7mR4v%vCU9u2SpC@9p&4;Pk=HPf45;kQYGX=1#YG%g!hY9o$-ru! zw#P7w-*iP!n?t-nYX;Ugd+5X(tI8b0Dn%&~GD#9evc`d*&)jX6T^RMn)IGAfa6V*Z z8M+pj3&LFAD5&GUrcFNov}O?S&%6^c${>A$Xv$PTWGy4E&2r6whJBj_9rOho#H3G$ zLpOQcLC6z~6{sl31(LDH2;zfbTtu5T4(Fa&gskILS)#Ey4RsEoHhq;?BRDpvLQFzt ziKqhGO|G+KjD&1Zx%Wf$Z?JPq`}_KQH!q{Q$jKgdZfV^ln+wE^pn2na=IAbla$Q1= zx>qIDi)B_V*>tZUhj~Hn{I!9S+kJ|z(wAx@3iz1YxzlWrmSRy=<5s=G$_~38M$Akq3%oqJQMVIKsZ^Ya23lTisGDb7Ex6 zSS%o9&b0yu7S+b$Oe{>X!B?R-i(K2Chr51J6E&|>Znn?bQi@9nrh6o}Ngq=h{T_GE z$s)Il#!Zvi6aVlba)EQMZ8@0+VR3v0h+KJOR+4Fu!-O%5^ON^|Y%HDQ=2n!Gq=&W^ zG{pPX=Cd@#|6#H&F{tQcWY0<@YQ!ADX^`8Js@V`$t#ii+^8kb%m%bdcM$2Bb)#6U3 z*uofCJcq)$%SUSS%$S@MR+UO&EwMQ3h}wQAifety`k^S}y`V1d@LE5Gku63>(ZxSy zYGjRzltIz;DPhR^xhGI#kv+r)rbNw$MyGaF02-G&us+JH&yE%MHv|=wM{w+0ji^kb zN0YfgBzwLrtzeEpTbUD$ajLDzSxCp8x~;fOb1SnRZ+oDk^GvL_#N1&q6*va~@q@U) z0hsN5%54neC_F21Uyw$~5*5Z!krX#CTBL#phon-JErFSF=aI|EM4h~}7y-6)jQE$V z8juK-)nQ{TZphJa_Ij$;><%CjE;~*&L&F`0aiVY@+5yqGFMT(`>UC?ZuJ{AByWK4P z$k=_enGZ?vfaJ;yhng4$Qo7Nj(>LFL;e5t|O7;+R(L9MdX%1MKBYY(K4s8~PEoW{`G5s6w{VmH+0`N|gf?X-PL^5F%OgnU9%pnt zr@*V6_XuFKS6wdUQ;jywFqoDBSspA|xiJOfNTFv?CesFxEjV!{kCJ#E3&(Gk;UTYvfgB zvlcSKLS<%7pJ3Np-Qw3XSt}ujAI(GyVojsUM7lhn2%$JQie*^o=9kOu`QG=-x~aM% zVHWI&%zGcd8g1Nc!@Aj%k))9tg)K+cVQBeCykZB$LSr_!l35oHfd{Q3QklyI+zi4a zh(!X|D;(5A3c87Hvk!@hg;Vg7mhd2jWvK=Jh$fHS6wxv_uB z^UhEMir3tZ93{eDX2_@rf5VcgSMu^YukpLzGUw+~G9I+A|*xoltPdEbc5=!_GmP zk~l(2qAtsVeWStT?{H}CSX2NiSE~^OQk5TsDiPK6yu7TU5!2KXGHDLp&TK8 zhL(29FVf`~VvH43CgRH%WYeB4=W3aH51V`Bd_bD>JIpA1kFt37 zP@lk>CK5AhyBuIaU&=h5#UnhaR&Y(d7eo?FnW^dhL!l+1*>TElQE%*y_7{9Uqhv7)aJ>+n!3`B*JVE;w# z38FKK;aA<{5ML4DG^AhB4Vfp2LP87^e7tiD_i{j{RkOZ!8%|8yWY0eT;6l9}Gv^B4 zGKVb|1rvA034^y2#>n{8&mS@{t&q&^5dA;YwrhyGiYSPvWRuIMLUmNjTvmC%%Gl~U zqdx8dUg15P&>7W3rIIn<@f27Yjp>RbtFvZFu$PI8?(I)EhOGvYys)qbOwsTT;cCK=AwKzP+x-MRKk7S*+9 z&`TT!;R{jXs+@V_bLrVyK`{j@PI4la)YaL2O5C^9IEJNsk3X6G1YGw>j#UbkHxbin zH>UQ=)b;TklfXNf-66%X;_i9uUQe|-c=^q zvKA84($1aB`Y=nRS;KpsXD5U$^BLOMeH@982iqrpXW4`n6JV`Pvti%tn6|=-*oxt- zwppTrTGfspDvqTVHKzC{pGC47ngs{XG-xnb3hylDl(v-H(#~Rn%$J7K%Npcb0V*X9*`7ZU(6 zO@6mmC5EgXWC_;=WJ%*%rV+kSPA5Bv~~x-AM8+{5-R&rIaFb1aJN5H}c&KI2hl zvSvgwTb<}jj~-l26-u}(hHw_0MkA+t6&U5<`!J-=ugDT=W*^J z4I^7Zl41xeNLn{qO>kr;ZwijQCZ8c4xfqG#SdOnmt@d!rSz(#ErsE18G+DE}BUu7? z(d2!|jDf}+(`M~4@{utBo3L_GrWlBxY3+V0xl71X-#A|{Fp(w>xfPP^ih*z_mnmG< znFWrpcK4JVT`uZo8arUE)XF;~k`z-Uf)J@$NB37NY7Sj=H?$A+F0J&rPzectAnb2@#zOmba-yEyw8KA_DKqk?mV| z#30YxM-&v_BQLRUziXWv!;BG>nOdB_m7BoU-WQu)Sqr+!Q`n$s$6m6{Jsc#mFwuF_ zZPav)z_!QOJ2Vp$?r^#W9sV&FV82#$- z%$;%qB+)p-+~uU&WbloK8!}Y=pngHZP*k zaG+(o7flw+shg+JsO_uyO@2s_Fm#$`Zqod$;4Vc|G#G3`S8-D+*=R>Y-1UOhG<`Ia4O9kry%KwuG(XE_!f9 ziC>=;WuiY<9+Jbw?Ig4;v(E^|y|RRg%)PRd5`rsA$xI#j_PtC6&2M%05aHIn=R^pNd(&~ z*qafiS%JshB#Pya9*;#Ds;4V-EQ*D!+{a8O2Njy}pjZ7@u0cL&&Ko6S7uf|0vp=4H zYO4@@GH;A4eoYBK40oC_4Qm#oOIjpyT>XVZ^)|?(Z$tm=X*?MaoU^%=vB)Zo!O17s zzusfeYDf^l)Y!rcB9wHE5o)p{PUY!FnI$4E8;ZI-E*87IJWHr?On~5h&UOeyGZQ|W zu>zxY?v2)?OhD)J@m*k8a(O?&N^O)=j&%5ub+h(xW=b?b~^~xLBt| zI8y5Y*}WaougpJ9(#8&-D8v}-Qp6Ytrlo>Pms3Yf<{O;p-<3scH&=@XY>#u6JosyO zP(Y(@tlvlEH&+=v@~jx_TjMeBo2jz+{N(r(qtg91TdOVn}qGzHmPcNwnl2H{fuDUn`qXibFy~cR4cCP(vIDL1#hCCh_6I1ENxuI> zz8&BG;VWleen@8Lw~y=s8bE|HMM2aRR1Or$=ao|$CDUOLO%dryKGLo`klKAT0E9u5p_lmp3 zb_ih$O9-Lt&_W=rg#ayUDTK1Lr7VR96J-uL%E=giDqB+KdN z>67vA&dixJ=lsuqKW9#UaO`7V7xDMe--)7A!B0IQimrWB6g~44U5%obJ~fK;^B(Xd z@Lm4=)8HALe-}IvJP4i!9@`&9Bj9>)47>w;4fthn2YAalQM4WW0QfTSH{ey^i&sU_ zDEI~Nr{Hm`qv-d*--7pnzqcle-VC00ZWMh9{3LiSc=vg(zOREiKYgt`zYV;M^FIYQ zgTDgRt_`^;+6vwU-V1&nyas&wx+oe3-wdkVKLS(I61;-* zw}C_8_dz{(<^@r-4V(i9z&`=EfWHDohf6MWl1 zF9(kY9|Fa%e*-=Z{FOhyfWZ+xo(`(sDya9r4AlGI>(9Rcs^32bj{*A_^rOL3K-G61 z2nnM-;70HPQ0@LcsOS2)C_Y;Uiaz^6m3s^SsQ=#sA#HRl%q83gs{MC?qT>fVej7ZQ z^WS0cb^jFbRPY*5@1FtB0^jWMGvE~GKLQb%Xqd*H1kQsR&wD^vHu@AOx-EjRcy#nt zj-F2g5z(jw#^B3Awf_U)>EJg!{t8roj~R6DzY^4V>;_f-#h~QyeIOzp{Q^`!PvD}) zaTHX2&ja=Tw}MXrzXq!RKLum(ID|~)E(RqJli+FK3qaBF0e}8&P~-k@AVU^CZi_3o z71VP@Q1!psU;hAj7UzErTKhoJ=LD33`aj}v9z2utH-Ku#CqT*hcR-EDnJAa@z@4D_ zcPFUlKMca+(cgmo;FGR)?Y$J_(WnY)96##uZ$RU3Q1zX~OHdur4p8IuJn-@0hd`D4 zG^l?43;0wpM%jrj!=RokfTGXqK(*^DAgmcZ3Z|s1(I!ysdm$+LKLqk$^fUfZy_cZW zR)a;5p@{AS)!(m!;=A91M}r$ioxa)vioQ31s;>@;zHbN506*`~{}I%CkKFF$;VMw& zo&)N+2mJM~gODP6!VcHp>pBf5m)cKv@`QU?~==)tz&pq+!PM=)^p2GPHLDl;uvCgdj1YnyNUhrh_BcSeo6;wNa2CCd+^G^Ow0@aW6 zz%#%ha06HX*Mn~a&jh~&im!hL9t$2f<=U|dR6DN)#kbD_HGafg&jz4tYs z+VL)MEBIMZ^&U}hO7JLX)e|F9|KF)i*!{ci}(c%4|#^Xz%_~^et^>f3lYv;|N#^>2! z4BqeY)1c_`Lr~-R=(3al4d4Zw-vq7#?*&!vBjD-axBc~BgKFRDw>kMdAC%l(1|9(p z`Rmt$M{zz0YFuvtMZf)^`0ov%==>q@G2mChCxYJq_1pp|di@O4bC25NFa~vh6L{nA zKs)dp&fivXdg+UxiehVA~kGtK)UDt!#IDa?zO7NH9cJO(7UEK3OKvZ#b#y)qxAJqLXgL=@h-@Db@G8z<3!V;s6MP!@ui$y$hUdBayTLO!e;ar%_&HGbe-4UIPI|uU z|1b!tqL+fY{-_r?zC9njit}qg(-WZD^+{0t^=+^p{0*r7pZP*ZpD}QV^L^mi;HNp_*@4?Y!q6R2{Z1&;-P z0!j}Z1jSE}f3dSO*MT~JEvWJPJ{W_?yu``F1)#M9+{*O_z$?L@fLDS2FLm^q1~23M zz2L>*k361qkL%A4Q1|zMqW?R=E5N@5)qW*EG!AEjyTLI~~q> zg5vj+U+LnX^TCTaZ-E=Z_kxmxAA{nbN4?6?@f=X&y%ih)_keot-QfA)cRlvK+R&e_Q_i{oo+yKLqvuGvDg?u?VVv_ktRS z&x0DT-+WEbVgVo$dx71AZJ-dp-r84gLU>oIL7X?)eKn=0RP5C8&0P)?fcFD1C6$ zyPbX90IHrBfPLV*!7bp2K+)ybpxX7gKXmUM09SGTOmHK3Hz@jl4pci2fEt%`-s9-~ zOi=xQK6n=R0C)=c7oh0%LvR&%!h4bVR&2fPXt zAJ2emz_)|Pf?ok8S3mUl@1V*Z{Q;Nfz6KN>zXPg$i=g=OoIi5sw}3i-gFpWocopYI z{;_M%2&jHef{y{83qBgW8x()O)Z^Pg(dm<*=<~lol|S->u0Kxzw{w0fI1b(h>iItd z`@nB`TmYZK`Om@gz#~57`g;*5I^7Ja-XbWvm%;Vmd%&lHe+!E5{|j6Pp88>DKd%LK zf7auDpx*ysQ1tn0Q1AVFQ2h8C@EY)pk2t=%4HVzs4_*L%2GqFx3OpY?>7x#}fluUo zANafAOF*^vKJZBJ)&BmQz*9MY5S#+P0E!>Z{h0F~c7l4}vpl{A)cucv8t?Cc>i+@o z81TYBae96T)cEfM#pfRZHNIa1H9kjt+>QI0;2`JE0L4#l26NzFfuh^Lf}-Quf9m*l z5R{x$!6$&P2UY%^p!)F*Q1bOlP~&#&C*1otf$H}&K#gAk+yUMO{vr4Y@HjC4N!PF2 zLB01C;K|_oLFvQ40*AmKgHHp`eaN-vHc)hVHK_LdDX8)IF{trA;Zsh|uK+LQybi7f z9|T3eZ-X0D?$4ZGb}e`+=l6i3%e%qj!LNgo#~*`7fxqzQ|KTzEw7Y*KsQw%SijVri zQ@{~W?JR-fhkL=tgRk^>KdARU2&&y*0QLOOLA~#o&yb@B#e2Wvcnv2n0>8mQSMBd) zuHDQpwfC1CSLp%%V(^8a=yx&4*EvvA_V-GUf@e}rwE3SLf6VVwIJR-eU5343;lJ$Nxp1@-%s(^ z_jnYX#<7($*MgeA)L)U~+Z-eQTs*En$*lg);`&YCZjLW=?B!hJKgprLi~Vyi=J#K5 zOmIA#Lw}#+c)R^_x

zc_C8&-^35PxHT@0X~ZJ?Hq6AC~*D^a2&jY<7@oBmqUM# zb`TxK^>6X}3~;}{b~eBD_XLjj^7}?`&R?4W^Zxf8D#YI{4x)bttK54thvfEo9IH9@ z`11TT`FOd0@VAERsHP|fzMA87e*Yhiy&U>`57)%+;qSHn$2-FX@JIgl{otjPe-+1L zI0iFiO8ou`#~9aV!9{=XgJ2)mI{&`Og|%FN3dhqqF5x)9wLkX-S8@JQjyG|>p5td6 zkLO%}7lQBP_#<~39nJ4w@Ow9Sp1*bxxQ}z`tS$bU;NLi^{`^B81@}|7$?*k#w>VzS z@n(*79Gkc(@p%lvO$^nbfN*12~V$CEk!ufKLS_$iL-IF9kx-p>7dIDX6dF!&aKUHUEj z{XIXP%<=o&|BG-DtoYxTf;Vzcf0uE*i{AzC`QTT(v(J_-B-Uyh&l_eqbJfRE*P z9rs_rAv>VIiZ6dF_y*30IbOu?pX;XoTg~|w`F$*SqQCYJ;2SyK&v7}|Z{oPk-}^AQ zi}Ubzh5zwBf9pId1pY zH}LzJ93SD>&$a&nHo%v03~`KbuD^pEf68$m*Iv)@V}3uKLw}Q;>o3o7H^&J&;qL~n zpYQLz!s7tfAN0Si5dXZ3V;$G7;JB9KSscf3=nD|{@!E3TR86Y4?fZ3HQ9*)Ox=EP?!rRZVsZhw6z_GJ0kKy+g@H&n@e!q=Fe?Q^4hHHPUlfJ=9rB=u{%hj2;86kHdL!lmuFgaUR|r|`b4Q2cm7RSQ@9()xm>POEvQnInRUo#q)3thBFB!E&hj`2AC`3}rAl!VunJdrDSISdu75S5)dP%iS z)9UH3a+|aZ{^`zH%{ENee>AprWk_kEmbP(T$_sJ zhFY1+x0*FtmY*r*tSd=%TWWE&#sKMlVYXJIn^w$vye?i{EKTQImFAkB)mfX9s`MjU zo$u3@!O6k6+$_yC;^}&AE<>=;xO%JFEYFp4^NmugSj!o8t=3Rmu^9U@akh*x4Yk(l zD9Jn@a!3E)sCL6q+G{A{_=L|?*0VhN2x zZ8|WdeAYbM*RVIyCBd#OGp(RKIHa#F{8 z#UxX$a-~T7R@x}|F!YE~lX8n!mm2fyoQ7~B?UjLV+>+88-%zXXiSzYZ3+PRXKwS@x9 z)+KhvXrf%aaZDOzKiWmjH6x~YJX5JnH$ifPJfxmnIvV$~|qlCIQ)u8NEy+X!1Q{*9m+T{Wtr(ad8}{q0ak zXwpWM>502!< zZpReLC%$RwIigMWyXH6pfVG&85Ak$9Ubkgl)Z8$CO2y4hq)b!3?@8HRY*Ie~L-4t1IA zG;V2;>YM?aNsyHJ*pqEr@>6PGk72?{wMU1KfHOSc4 zs%S(XUrBSJeCyMd+Fo2VoCY~uX5rK|$K^a(spYZ#&JM)u_w`>NWou|+>z%6xNvF%r zfw;dB=V$WeYNHwN?w?$>^3slG_K-aHa+T)b>GltX(AUm3ue?G$BVSFXYCgl*hmSc| zYR-!LN|gpo*T1=c>i`Vcf(;e0VFCz>6o)qG(C`ukT&);}o{#&xhkpJF|Av8h1TzRZ zHBLqbhPHq6fYTqYS%un66@e~>S_g>un+59$ZZ5wY1NMmbn$#!DHL^9zc6+(j zYJ^g~o6t^?CED4eiJ^tObZ8(R%2&lVGiX3>Xm~5iw~B+5Yl|96`wAt~7Vg2@@trLJ zvr3Fn$SXWYVP@itQgL0pvroeYh&tM(gD<$A)NmLBxK$F?A^Gj1YbDIr?kR)*wlr&@qA+oqJ|z-r zcS+9SAIANgrNNYVDC6`p?y3(bvo>`b1|A}8?cZtob9H}X%|N_^Sh!V~HSzcI?h7n^ zFOL$Ro0lTTIUuaJa8t73(-{6;FmYp5c;VD^@z&XVWA@fct+t1}Oh@}^Qc}Wv`&;Ek zEK#anD%9%5Tjyts^&TbQBX!xQ)*2YZlrQCd7|Zlap;||MaV$X*tJ3=_6m67oHM;K4 zW7*J%@y=n)pc0KJRb?U|dettvFy6*>RsZHyVnX-U3h9bOT)K%ta~NvNRdwGq&qnu4 z^*RiWE$lCbip$m8ao~#a=B-;|q9+Mub{N9#V!oNT(JM)mIv;lFI}L8z?N)V9wYIm4 zOw8r0Gc*pJ+T4#S(i_yViMYRCTK$evy=HYz#OHUM=NpX>Z=&X0#u{278*tnc#qj!#vT|csAm|W>{^`#GqB`gf=dS%Gvk|i;}r2l%UxBlx% zkyw{PlUDR5#vR=U<#7LS!4%fY&Poq?=9w5U=159$hr1{h`2r!^7CfPjDuQ}#t179f zqi|X%Rdw5kw~vkA#EWK}^>3_7Uuu3(T8HcXK*mCaw`;Ty=P~nAjYn4Sl;g0ZPltNf zPPtS$<(u>SY>FUP$648LEP^Q^MOb7skpk>GJ#xjjb`=Q|3%SNDaleGgm7HF2$@y~0 zUh1QYOdWOCE?09`eO-<7<;1UDbxEkjt|fGp$^L-k{MPZ|(XpXhhbG6y8Lh5|wwk37 zPkWUpHH>c143O{V2!7EF`b0@%^CuW!KiZ+lcxJvNWEU-{GF{;npUICDBIy{k((3-r zYxLfZE8Zq`HFOGhIG1ZxLoP5$ak&UXMk}<&iq@HVnf2jEawC`-Ts_T(1w-ljZW_z6 zW2Ua~NSkFk><7H@G`>kpS*Q{r$ApyX=5)6y^!D;gnZBfyNWZilO^Q`ZdvCR(*h#di zdt;zcP@!GyknIA6@Wz~6c~0Qhk!ltOj*{9GnFE_-pem2u9!!VIRbjoNc9yQlAtMoz@j+_|| z@tG4Tt1OXb$eYiT5zzGNREcWw$K>J8V8d4Da^6j_s4YhrS6eDb=T#&k&oVIenZE}l-V2KG#}pl9!tD+B2?9R_Elnuw^* zMLHI{kUD6P$eRg$VEPcROF4AWYTDH5(nIKdKeVs}aat2Np`zf%!2(j$9it-s8xjC< zE+1Gg%T66d8d7XM%VACwvH3ys)J{0wdZ8xZi}VtZk%kRM&S=5q^PQ*IdV$wkt z?KF{$R=t!FKwk_!wv?h$2{VVL3(ZqAYiZ57k*Y{DDU$Ma%Q&V(j!Uz7l_IP%K3}p7 zz>Ff#h13?z>?$hON^UT`;gfQ$74!;GL@o53KyfIBk@y(6 zx|fL{<8~!|UB)*N;53J0f;tcnTj-=%S~b}Vc6$vNZtks<^y$928*h`0LN&N2IX#@@ zwHV{wIou~Lm)V`0FcnPe+Q>MdG^|sb&QYQ_C`J>|m6oMSPwoL1CYoInFCpn`3DGJg zYkWFeW*)dB;hgg3j@t&}#-8&0y!zS3#;~PLKD#vxMh3Vvc_#Su*!Z?Xa z9884}UZuzzPjbqHV?{};ACROFiN~N!f=x=2E^FOLB~ujfriAyBYl^X9lO#>EDwoTo z+IgSJtdi2CA=R-}IT6E;RPvZy%rIx>?I2ytrPj=;vyPW}WpCL8JP;O3`K)k%;|k@H zv=B${gys9MKb&VR9w;^K;Vzde)7t_QiZgnHD}?X_bHj)dn)g>)fXy_vQHhAl429Al zMlN4L()`ZGCTVQzYre|D6-zfT#XJjFqkPCJ;roNpWgB5hU@?peQ1u8^ zQs*x1?j9F6k*y3P2C-FW8dqAN*U`d9>fsIa6QU<<(C#EcLs6+%Dv;rIFWv zwgADB+d+R>)%HSOiy^ZTp6jgO-q|voH?==?i*T-9V{i2*f7SE!+T751A2jQp3<>25}d8 zzT76X@Xa1;n*Zh05wOi_mJ7E8p& zOoA2mxAi(LZQ-yy!y@qy*ohyL@SzP+3R9&sMU8-l11*<|gzy z1Pc|ELyIugTD$z1utCueq0?XA~j z{}l?a?#IPY^4|E_7o|uRR$A`8>g9Xi3Qi0ZDs-JR-HT%{U6c!TA z&QxQm&SI)kF&bpS^Oliu<}Q?QNBYxPNe`2FY0g?9M-F3jGkswWt%5>P0V!2Ua*!y- zQ$Z9pMuVCj?q!x6{#Fns^i(1~3Rg4nn=N0Y_}=_}SMip~TXzf(ZyDZVVX2#fmd#Du zHAVG)deP505;w1$QMgH4t{Pqpwoqruj`GRyvPjwz(vlLf$* zc@HtH7ddUmDiClJ>$zG&FYIj!E{c z!jiZ}`K(Jd1(p*>b>3h-GU-BpYqrF4sW4dHkAQE~Ma3LuXOboP(NOkF4OR3tWT~pd7PQYEZt60w><48AYjcxp;Zq>gTvv6&l|ht?;2^`5;!=> zJ;?~D@#4E6H===4LWx*KTUp+BmmqOr~L- znUNuA#JgIS5tx{~X>|DJNXZ71ved~8o#K{0ow3!m#(_!O!yV0%*R-V1<~dmj>!my$ zeoD?)n6Bzfe0c2_g|8=k6P#)6lIBd_r?J9E(veP{D6D{UL+y;SNEx`7APmtiq?> ze6dzVU3lV3o2E(+H`EDhdP#9SYrOl8;t$=qgh~vxQFcBVY1!7~3#)7on)$|_xPmCT zNq!ie=E!yT#R(!hxW?aii85!AcKNCC_|CXipC|CYIVc`c$<5!`oOcHa(@%nYF-5z6 zX&~7g3*BL|jM>YU({wh9M6$^|MqARz%W5>d{kqXXP1;Ap=I2@VJ~9WVK~BI=_VWtj z#e$~Dsmts|e`95(`c_uVsTSql{5sHR*nL?h#U2b=&^WgGQUB~1+&&y_#UpU8m-2F3 zrGWMC3ar)EntX3mPv#RmnQJ0HCpN{%6`670rYY-;eYgHwM2Jt0PHIi_(NJ{tj_YEK zmV(PcwIsPH>YHUDFP!E zS=5nn9z2Qo0Aiz-G}eln2($*AKv>2?UnH!hZp9Mrx65SYNRvA4WLeV2+Uzq*p_eo^w)SFxEO)zAWhHyN6~H#iS24BinufgVqqbD8&AYoD zM`eV-bwDH|AQ6w^dyztu3ey>+;==08ay5MHYg(u-Q*w#6$5s|uRj*Xl{Z-X;YqoGCWo={CJ7>A&CybI2ImplETc*7?o@e( zRdGtedB3XRp28e9`Shdf*3w#6Ynu4BhM+v!K?kB8EE{vytS=g~Hn(X}c{?dR1D~ND z@II$4S?8XTuNVw`ppibONhf2O8j{}CG?GM0aU;|%MPsZZoU>KuscT{v$qN!RjNvDh ztI?Rd*_n%SZl%9jsWDB00A{ij1Y!DA&&Dwt!{C!Cc2ikMuu`~mzEQ6cR)#!Tv~zHB zTg0NItH%eoM?2eX(^^E3xvX~Uvy(R{P3q^njlT3w9)*`(U&4K5YjecP$u?n%a-k8q zyUtNyPOviXuXy*wCLq$dD$}`+a@jlMT9Lecd_=N^6|nx}p1Z00$nFLLh{Zc^xsMom zipa$Z_bB8&8z*vN>poXBG&|Fr^u5Iv8r5e~-=1;^9it2a056g(sYU zEU66A7L>_Eo7^t#{Xj_*#NJZP8=A4_e)UM=no7NK3fdBBw}K(NiqNf_BD(dCQP({e z8hhiUH)J0)X9v}r8djs3Ns8!q)=If1tcfNt?WTgo?mm#g7^=9t7u;K!NJkhg z#oK2emL-#O(S&`kn?yYAh9c{6b`*qHGL)hkE$j7Hk~iZ|6Kq-V9-O1)3QA~*Uz?>S zVuh5$U~Zv_KQnJE4g8Xnf-HZKHFNhxNKX?URRCaL@w$09M=O6lP_B1iFyTI3f_D>! zQ<`hSs)$&Fa`o_JG$~u+bC;nysa&U0Lqb!L|5Fu?<#VF{2W z&XrGS_Ri-HytBmweIXtt z3CXHA+{U(7DJPtt!l$A_ls7zwazpPn_mi}ktmo17<_s&J+wd1OZHS|6hT4;Ul0c40 zfB)rfMvqRmh-PZj)3{h<>-34M%T`6#X`PjF2=Oj&hHkbu@g;5_H?>fOuF8E*wx@8L z2r%CMhWbrGyNp_Q5B2=^xa*nFQuox*dFL_9ttI0qWtQuagkr`%t2HsAs$K<^EtX-- z=v05#K7{v{QNEE)bkWv5@yPjO_PqI<-kw8vO(fv{JIibZ_SWb$c4Y2$Ty^s zVVan3k8L6=gYxK}nQdfJYg$R874M~L@_^TFK7Ap!An2YPzHyQTt!W_>OvK+yd2BP> zSmZ^x=0&@%H0^XVKfEEgpC}?jmvl4Rw;zm&s9YPD zFC(+!77De$(BDlgX2)GG6X>{|^_m>E+(R=G(cv%Z~UlR1|uWDaf%%Y6qdHJV$0N$$c+;|nes*s$Te^_O3?o`Sh?|2c76 zxyy3vFODy`Y~Z5H`LTX|-)O$k%%Ov-4L*FV)d%8hd8!&uh-z%f5^vl?(vP24&9Ks? zvJOeu#4~PcEH_!o&+&a7naA09<4nF(uJA?qOtnR)Tl=n(j&7`TQ*+4UOle)U)ZEm! zePsJ^+T{z@t?wIh(-OH!q@IZkD0@Ch!gBQrv3|W#YF;@qF_ydRvWqXzU62-5o0&e( z4U=9`a%LdDj5!`{$5Up$nZ_<+y-5S3XY=s_xhH0?i?a(PHuA+;icKy|Rr0Ym3c?A* z7S86$IQNay*#!uI?k&u=bQNx%nw@T0304X`TrT2smuf0J;W(q3ZxjyHDLBIvIGmr4 z3$60pEZcKXW~en+&o9;rB(aBP)60{2a;a@OZ@xqI4d=0y?HZJC%pa&X=@MQ^=yL^U z#u}nUx5-v7nz#!42JtQAY;A5fPf{cOyP7^vC3loWWY+{}k;f0t5wuzSLmx>Crhq3ig zXjIsJXk={r=D`v6ADXV0`0&1pQB?PWN%VOROlZgcLpv5?oQT<~^$?gt}`D%swLDD5XUSP3PIuiWi1+#%z4DQ?_mR|(a=0EX)WMn#D z)?WLPdz?@^{7IC1u$cElyEw;$^<2)BH-fU_T^-1p&E^>k$%HjdeNS87EOn4{$=yn5 zlcdP)S3<4YuP9;OL+?`raeE8~DGbDwt*??1$fE=FL1iGJr&#yaMa>f3@_SFj@t_1- z?L%|G(zaQV#4E$yE9K@uoJxLee6X>=hie=CyEei}D80GE-LnWyMG}KhtgV8TZdEkC z1S4lgcBNfIVc>?K2c<4yTSNsMS{BhnI+HCO^XM! zHld3vZI7vEQEP$L9GF3WuZ^n*#8?UPmHO|*d8q+MR^c%m<< z7vhNpCq>N?(_6Bd*(y=m&HCa>8`YR?S1!n5(`1iDPXu35G%KwNYbuIMEqQIyGyKRB zWk(NH5=&s~vPLK?KkOYF6`44%b^qFCMZ;KyZZmcu=BtHZc(cmBcdatbYwaJu0a8+H zYP1hoWte9OYp}Du<@a#fpc%1cs2S2>miPyHV?o3e;+5WpLk=!;8BAm-_+;h-S10Qt zF!k=$temTA`Jl2RxDl?~Zi}R@XVQiyPoo#+W~p1VX*hW0dezmC-65$_Vn(|-+xGhO z{r)adf)`3vRDs)ZR*bbGnb||`leAgMPVJI(fb}7al5-lQ z1addTzwEQ*iru^%!})c1**%lQX6c_q-vv6R4VnLy>o1OzP&f^s8I}WHP4=kpaI46C z+`(o{=&em@7Zb(L>c|6S7L51;a|E07m;sgsD70&4O~@>fg(4Y5XUUB^E@o$!*+n;AX|aZUYqLXqspQA7eDLs|D;Nu> zb$TbEqY}NzoDt)gv^1UVSwW?<6>0NO_}!gL>Tly2vdx}FyI#}LzMhT1)#>#vyo)BG zB#IhtSDMZOH=;P}TRYbhOW`ziysTU?=hr0x^-#zC&c@Vhcu{f|y8GQ()Tl2Ps7G1f zRAm}^w3IgRb(Z%RZ+h zvSmry#-j+bHWa5l1krO3=Zgp9vns{2G-y4yks{)^HT@ZmAe1gkLca*$bb2P2S6AI$FTL zV zaU1!@=4@45xdRp*r|H8tdDNnBVf;ge3J>{-(( z4@mcr74@c>ui-u9=UUQ7uWI2jB2^f?K@rD|yxj)_p&a<5~p9nDXTrYsRTxEW?q;-TwCwr|@p zY;0v&v5dhlyGDdo_pHW=s<`A4Je?$39_j1h1XMDMicosXx54&Yfh&}FF8TmL`Do+E zWD6~&_Sr)VzQaa2PuCtKtZU9rYht5$kgwq3Kc<57K4*`OepnHO5AkwaA=u$RH65O! zk#s8!V&WXTYh`Zs?g0#JjrVQq>Ops{u4Je<)kbhGoxzx)ZMt^Yl9y!>mgX?Svy;J4 z1|80*G;&Q%sfHrowb>05BG-O%e`Tjq1`1_&bP^ya(d^`-#wbJ^%vT-2NpikAVy5q3 z*GP=L`yMWZ7Zh1{KWl@J!;>yb4Cz#Kxg^zwFk94CEQcG3l27a=By)Ri1&>3ol`~*= zZRzLyE?JN0DQ|YHsogE|H5;Y8Vv!3cqp|#hUFN;}1zO6G{W^Nd3fnj13S@vCy}t`X zrRSm!D*>?;3gCh5<3{1B>nJQO(dIHX{ zI=efck-pxfm)~Nh1DY}idXVJ|78Ow%XD!{5>Pn{z^_i`;)=8JiyZ2pK$b_0~EWL}D zPtsQ3S)X@18A2(blbJp?kHOf>84|A^m*WuckJA*FD)KRiRqTg6 z^`U*Y!ahUdFvmh^kz9VDO)9(Z+ty<3h1@Cuy6Q^j+%|d^p{KbK={_XQCk}k)6;-B` z_ezX-$j#SKI7EgSt=IkxZ(-5{Sj}G*4-<6I-x*frwM`mtEpI`$BV>obL7cV}(vhJw2Wn z?v5yZkFrxi+QN*l)trq;`?p;QiGIEihyIC&=OhSHWE++^8n7KJAqY{4%R*jAiU*Yh zc{N8bq4aWdz;~OM_^r$~yVz?1&LiSfRis~FQ3dIxnsij-VH*-mpPM`hsZtpc)MGnT^j5=ZTQrphL=qm>=MuU$m410mNFiN?%AOpFJ()?BEe; z&4Z{hcOY!QIKa3Qj9X-lAec$g|4uKH^>zUUH(5T(0!~jSKU0nbYDOYsUk>m;P@9FK zBvRVN*}XQ^gEC%<;erY6)|A0cCmF)E(go?F0~nY8ZJ@tmjBU&J)WamDm<(u-4bhw~ zZQBSfdCmd=?;O|^A<-T)Es7j7+o3sPBoC!}Hu37iJe$TnWU#JqPSZ3)r@Vt@?a(w6kYbfGe!i}ACv!ZvME$k*^Kq)p`ekrbIbz{d>!T;CPKZ|rl>TI_g<(mH$} zS2e$2rf`t|A&XM^iMh@6-VCZ~StgQ|PC&OPTO}O=|NEsfPEBSW`|mm7wrg6#Eu9`b z#M4+!AK=pz>zK9_N=h?2)2tKI3S+T~%i;v*KiOezJfwU~lC@rUPUYEnjT$H7C2qTY z*eJpNYnq1lWb;`v@qz88_J}58+>>tBMrNh=RETY9Mi*(ZCf%ydgG}{uJc*L+cS?X)i?4fkC1k#GE1%cu-0~FLtil8kQj1A!MU}lC(jnXul8^z-X?#| zHc>&FId2vxTe%8kOIxAi7ZoUDl9m+oQ@^%9S>gjE>5nvLKp(Z3K8%K6Hm`6oOs`lK zsTxV0gbvkb32#gKqPCRK*^No}{$_hKlC}J{L0r!w+BvRA#=`1x$=0yCz+Qvtjzw*K zbHXHrqk?91>;X|HAq*adTb2+Mj1}<)8PVXDbH4w!r2}--y z18xcfW;jruCn&~Q(rejQ*=1O|ADM>Mth2xttoRXAb((XNBwO!jS@;r=cZHP&j$@3& zDJe~_*$!*aa$_y+%kTtqn#rk{vl)ghbDb$bM`Y`sly}g^86AFv9l4ahrwQb%KA_mo%7Bln9#E@T?DlZZFw)gmiM7U}GbLItIPbLnGxevhsmk+Vx zr;_Qq6+NNAZrsjQ7wt4{6ICb)BP-E zbK#&o@ixI|E7m)W$S6?CEVU27l1=53=tQ0r!zNXZ*ebL(cYDA+>(7)=>R37D_m@k3 zGmD7P`)-FheKcE}lcG}Q6vv6qwQVqGQ;M2;ov`cql!XH5`W47C@DJz8k?mm4^;Du)<<)1ZGD2& zD)OZ7=?Fcs2%5-Lp3;2j8H9~_AI2)MB)jmsmC)M5Zc+`N<$L#nIY_t&2l*~Q%MJ7) zh1vX2oO}4sSo30DoyVsjUy^jb&9^2?WlOS3GDel!%mQ^D`k74GN$in%9B!3X;H zNj&;`{(KkvHc9eFqhDoP2)M2$j$n@n`|?XcIb5CU@uf->7c*r>358Ru%x7(8D73yH za7x=ZU(rMen5~^|DUu0r+d509=b`ywZ+aIN|7L@Kt;=?CfHUA4VdBwzk$vWp@{Cu8 zwK8{7)iX_CHpkK&1iIo@m3bcrHcKip*8n@*@tIY^8HZ8SbV67v87f$mSb4+NWHUnA ztuLO!T4!VI1sGTjlD|n>KGh5qH-*sIx>P}sTF~qYHi(LoFAY%!s0F{VUNjMeTmtXM zGuq-;O`vXc8+v1alG~+tR|xMXCcip*bENO?g3|CLYqzk`kaRPO0s#vz3GyL(!~YMX zJkNBIFBgiS#t>rUPH*?(lr7%=2_oAmum@jh0sm(SgVC15L&dZ;JdtQMy;Gg>X^pr5 z4Up~YvX3OANWibBlxJF2xKzlgVGRYcjg67=^6N2mJFI3|Vq8>27EI%-A@6Jgt9t{1 zu%IH8Ns@UFwr&Z}pDQFQ#W#MBD8+`Bj#8^!W;BdG^&>wp;moXFy^?Z#4@Nf#R^#Tw z`2xDV%1nsf%{Qj(@VWW+>=-$z24yaJ8dqN?Qv@IIt+@vg>6FR#Y5th z+x)6y=tAwTRj^*PMa>mm-LjKL0h2tXB^9d3R#U{5`U%=F%g`!8Hkj}|(V_GJ5w%Ei zms=*pu7BuZ+Rju&-o!}*kvz~gNbMS!>WNipY`W5%muUgB+@q`uVynQ+6efzm*s}9+ za~rK(zNlq?J=3RnJd@kTM<$%tk<6>|PMgt-CQYk`Rbe<}N+>%!AkT0?+0+B1Ng@B? zl*MeXyket3P`G+`#}^FwXgCQfIy6%e%7wLtUg3He9NDownq(=ZTq3%w6>dYOwebdn zD{%-HLjD~K&&)B?>Y#b z{=2&o?hxxEA?)zp(&s&xG&U6rQLG7<&ncGc%UR4(?fvjb9-Lrn!$Ov4< zQwt9psU%lZ%#4TwlWh=3$HuSTx@~M|aMTo}R>g{KW&G91ge~OC;oJK!Ure;N;>X$h zsZVuh^|`xYR=6#9jv7;o-Ho;^dp_$Dtk~iW;_*aRBQ;4&p-ILrrB+8hI*dSuBtJBq zSx{{x5Vc;`(?nf$>Q=s)6gp0+d4JGr){HLERow&wmBDn8WtG^GQyBtDF`Fn7J{p-V z100tBM&o{6ATjdhR@Hwg6%9(@k>>8~W`<;nOZZ?~`_we5EO#-Dm;I1Cn(*IMi&(ZI zR-@qegfQ(Ac2`7w?id^ykA_A+Hy#Zh+MQsxo+W*R2{*T?1ev3o+nEHqa0O0~dcrEt z%og2BWbKkj^4(0mK4-TN?iby36((aQ}7M@+9q?}TF62U#J>Aw{Yr)1rCB_{NT3t+ zu8fzW(|k5L5;B_+^XuBtk$fuN1V%GW<#;m`ZC=`C>iGcs;L*!u)s0o_w>*$8Rp&IZ zjnCm7EFT{t#Fj!0-d*I<{j6 zCP5h>Xf9n4)CIQFRA`cH`TyrXf7f)EWZ6Bt(W`sf+=AosyV_J5j;(mwkjtxYH2Oq2|iwCu6U+6?#ov3YP&aU8GJZHc9XpUHNsjJ9j~RiF9ug`kTdS7*0VG2$aR zJv<7xt{YM9+6^l8l|wYDYG}SM88|K6H3~87&hXn}ix%61iGX|pCPm~I_Bd;vRY_1G z$wYP)7dv@N3&qFf=_D-fERp<8bKaDu3;s7Fw0vPne{Aa&qDjB#*9TVq3`Oaa4`Rrm zCoB`2L<|SDQDq2n+Z-=GJcLl`&BW1Z-}R+;ktKrUK_>#J(eC8?gx8hP#Ln@Nu_2!$ z_jzejw`l|vrgD(c66@f@#FqjYxBq3xZ)&*&T!`{r7mW~WDazD??A#gC zbhEkryMn2|+51VhIi}Oy>0V&%8&_fVq|6nI)td(k%E|bsB3;+k7lk@{ZdVhkNE+@W zsQdYDzlB^wvU?_*W%~E@D3|P_nU*sDLh8x+B+e;wPR9Xu&>X}xiS)kC;A#~#_dM^5Pa<7idZPF%!FHrEn`JHs&jXS#>mSIYC57pnzP^?U6u4j{+$iX eElpGV(jdc+&p;@YaZY?pk&NL$BWdi>f@b7R2)SpvHPfD%?x7b; zA`l?KEM|{m784AZHJGsPF*}4Um@R}Q4+wcAJP0o#Aun-A0`L1fr|RC@Jw4Kxygy!l zRQlbes&3V(Q>RXysyg$7M;&!r!tXEcmn0{FcRwsi4%|OUo_w;NCdtJsljKD367X^0 z?r>iRPv!m=@Uh_AK_&S#xD)*Afa_Kz$td@~2krp>9K01gX?2op2j2~D1AhZP2i$fx zd4k^nuK@R+lO$u{9pKNvzXzM(U#>}#mx80EBzZCTUGR^<>A@s<9(dHbN%BSTMc`H7 z)ocAbcY?<0r^z&T~O&Bc1e;z%48S#K=2vh=7PrQqehok!-#ZkZzY{#2`|k%7^G|Yr1}Oe}E-1cx52*J35~%w97kC;t zxCLGScY*`pv%s^!w}2`574S^(A3(L^adZOVd7$d~Bv9Y~T~O)Y04o0HK}eGP99#*W zJL>n>fa1&BLACSOK$Yhxh^2fl1XZ31P<;9va5eZkFa^H|D&EgP^_OGm^lHy1fTHW} zaQ`Au{o(B(T_*Wtc>W)t(w#8o`ELQ0eiBqYo&~DBZv;iJFN31TuLBNjbGnUzDn}ip ziph&XwbNgM=YU5e6jaZ3pwdr+h>YYVpy>2xpvwDmkfuw{K!~Y*YXP4Niau`ymEX5P zL}T)RoldU{!H00aA5^>+SOVV)ivHgMRj*%xO82-YxtzNa)OVi`icdZPehWN(mzVcm z5D}3KjwcB$nA`}S3%(0f`F{vP`sA?_{=G?X756U#)!rWg*Mk2EUI3PMdw-b(AH{tW zRJ+~`D&NbESfaI^TCgT ziuVto=z7Yvp8its3EV#g6#u^h6n#Goo(=vOge8-QU*~kX4isHq2I_ks5BL8BD*scj z_wVfhMYrDvF9tsWs@?AeE#4lNLpwmxYZerr{UIoRxEovt{tc+|J^IOBt}#&Uco0;* zUICr~ehEAd{0HzP@cw(fey4(>^9C>lcY}`yZvr0!z8n-C-v&Mo{4)4J@W~PZ}5E21lMps9`2t7if-=$9}9j5R6f4|Rjw1u{{2fp=Vw9j%|C;p+X+>FJ`Acp4e-I>A#eb^8C3kc zK=I8tK-Fu-es9kK@Il<44L%e+A3Pcy1_!_`;OXEzxEg#JxB~nrsCM}rcp~@%Q0?(6 z@B`q=Y3G~ogDU^uf@a!6%3w#QA6nHZzI@|(Y2)+Wm9{h9g(csD(onGrf<+~YFyKMuN&yAq!|8h|I zeF#*!?gq~QKMS4){x4AFSuvX=j|5kNE5RX9d@~8^{nJ5}^L9}2J^-p8ejZdkz6Xj< z{|rhlK5EY8wlY{xeW~^-J(r@WD4Z9uKPhPX$%pAy9mJEvWWwg39kDp!nz2;KRT>K;`o% z;A6lKfl7Z*z@LM9zv4iWbnZvngQC|h2R;9{g3A9>py=>@@ObckhdiIhg4?;j5PUND z9B>QxBd`pvej0g!F9a3uF~8&Uu`2i)?%xak0l59?KEL}Bcop}np22^Vrwx)-()rya zc_sLd;48rAJ(INHDbGT-fnNu|2~Iv6-4(p(_xyX$2hZXD+u&C40l)8h&KNkv{VTzX z!Eb;Yzz09a%ds8Y#QkmH^T6+cBjDuCJ}-S6IL`gO;AU{_xt{N>pq~E#901QF@ow;1 zkgk%v6C43gdA{py6>talcY-Rz~)!-`dOQ7id%W!}3OZ|Ig zQ14#=s=V(7F9&}D!ZOKOG`gPO37!Ui8&p334vOxVzufz8CE(5Ac|3m$xEA~_D0-}b z`OX2?fujFjFa=))o(X;=-2VVny?z5q-d}jD%e~#8+TmH?>EM^Z6T$x-@Yp}}=L2BM z^R1xDR|D68F9lW4yTNn8zXes#<8Sl%=>&Kj_b&k-1>Ok`gC77@-hTtdPv_Ao2El{i z82DCD_4^l4g2I{vIrWrB^xb0Uyu(3&8WiH-VBD-vKWI{}ntNEWO(4 za4oo+`-9*<@J>+q-T!u{!&*@E9s^arXMidAj_~{|py>Q-P;@!tHJ4}6}S#8-Rbq&2dX@`flB`cQ1$&c zQ1m+Yjm}?B21TdWfXeTu0Uz`xPrnirKVA>2Jhy-sfS&;$0^SR%9gcppxA!o32KNo{ zRPa_%^nD*V0{#>fKb`v)bP;e0{1NyKQ2D(7tuEJo0q)}d;D)gVTn|1I z+zj3gD&7O$;pqlJeWwPhTyF*?kADn`K5PEO%U1^Vz1zXlzz>6Z|2qby?J^+fJUId;9 z-UXfjejZdgeguln4|>1rcjtf);Ql;N^t=c>AMAiD!9NB?udjp3=bykUzz2W8>oFGa zncxF?{$6k`_)%~*`1hc`cl-za{$lVL?k7Q&uLi1}ZU)zZZv;i(Zv{N+Lr#bD!IbCM zfaie+L6zq&Q04s`sQmsNJQh6u!`^>R1r=`xD03c z;&k5)s$8!HmHw-szVk~^<$U-@gWLii!+i@>`ECIl;K#so!P1|4K6}BG`+@Y&!az!!tc z=MGTq`W8_2z6aEI{{>tDp80XF$GM>RWixm&I1m0A_!dy~o&SW_;{YiBcvZOnFsT0e zT~OsZ>XVLFfXe^rpvwO|@Im0aL6z$xpy=@_@bTb}!IQz?fKLEV{*>$0yTM0te?52^ zI0rVsw}VRe_)mNJE(DL_{)u1;ZUR-$DtHoj8+bJMUQp%uFnA{TDNuC%J5cm_#Alp; zE&_GGGu+<nW;sCs-0)c03>!Q1Ka;1jvu1#SiZ z091eYtAG#tqVvZvSmOB{D0<%x>ieGs75|%{=yA-KoF7jFS8;zH_*ifccnsJI_%v{a z`)7my1N<4Nc%T2W)BlIy8QlK{JOw=C&z)WyKs}!VH-OIz_$5&N`=MX)_v=BG^9E4# zxFtOQAb2+S-vh4zkG{w0uo+Z6eis}9-vh1ze-5fYo$ytcH@iT|uQn*Uz70GU{8Yd% z2mBWJK%V~)RK0!@p8qD`v0n>(2By3}A5=R}fGfc!sPwmkM}c>O4+Gx{J_P(AsQ&XA zQ1O2No&_HBb$?$1@5jAkcY%^!yN zD?#yR{B7pqvphSSa1lXmI|1I0px=AIHxlTU$-3~Y!u8c$i+;Poml3vb4QnMS*J{TX z5cGRI_btLEu76B;5aCS(#EY%>?&IBy2-^uyBg_!mgc3n~6@UNE#YsFnNYL-y;5~#2 z;nwi%y*&S2u1^p5iuYl{?{NPl!UOey-?3az6OJe7_XiHP?syB&Xlnc2#s350`ZGMg zknpW=FBsx}zHq;d`x^`Q-{pFYXZr0VyvwfOU!Ki{=d(P!m+&a=KS;Pg*H?#lk~g2? z*;~N_A^snL&kpaO8L-K-8^Zf9fN6LxkWJ-i@R{H(;rZtS9>X*Jo*&TfpdlBMnfkq+ zcawxy5H=EC<&TqhfTt6lNBG}_Hxqu3@H4^_h$mTeIpH;2->z$rp&;1=4ubzccoN}H z2>S`~_b}cc6K?(xoZ|jJz!Kr3T=)Ck5uX2$mutAbjIfpPY{JJ0?;=Ph#@}R@cb76Z|9kQqhJ%fgRq0}XWVZ9?*ym7;_n)6-bi==;bz_+M~J@~ z*Pr9&BjMRMz+ZF!YEbfCzf%cc<^GG{A;NhC{r-Yy*At%4^?L|!;rh9H5q@6+{}&=a9ss206zr& z5%?H_eyIjze4z8h^weSCA^QYj&Kdn-$Zy0*DoYIS!qJtw}D6T?C%IC6ZCs5;mtfh zk8ms3+X(Bqz7l*p_#^N%!o`I6+sX4k4L836&*1(h@Hd1q*ZRE`90&h`@C-fRH%7RQ z@G{+m-=o1lC+>d2?}fB_^(eyc=z`xM&+i6bSa@$Q`0t@Sn$|~665dJpH}0QB zxQpw*1`|-f_X<}G&&@Ta%I#WxI-P3F&o}C6>(KmUW3II#S+TL%XtmN^)&13GwLVo% zC(4s^)fK$hRBKI@o0V!Mt<@Jg?X*>$YS$X|mfnrk>a*2m+L~(C7TRgKUPVIJuzGNz(QL0t7v{>;zE*EH(%QTprE|5(W|=zG>aBLQ zTp3h`rBb<4DYe>_sq)-hsXSLJw|a{?Vi`sXrw3~78KaOc8qo2IdfjuHEVrur_SfdB z>3Uu2>hiA4wp8m?Xje_ksUoBncYmXqHmla2YN>S7*ci>IlF_sa<#vhEQ}V8i!p+8J zRk=-;r)Ce(vf>32)RaqJ<<_Mu`lapjY|69Sw~xg8){kGeZNrYS%Tow)pgK1fs8y-8 zRLYVXgp!q~t0k*SmffaCT5rHYdOtPOXi!ayW;Gs6S5>O}%bmIQYOi8XcGgT;R=Ox= z7wWWWcw#uMwX5@iH*$i-+~ykf=~7_tQoTH1jcvNUdJ|mUp-hUBZrrhXbLYY^>%H(T3TpTJC#Psn%Jrqt5m6^Ax>J1V||ONHJZyUMraEW zkIpUf^fXpv@BOudorNNKH#O=j)i3I^={_V#N?#FX99@~4D@I>@t^S`kuhO??s%dCr z)uF)7WJaT?dzTiP^p1mOUtuT^nl|wX0O}+AvvMr}7OXzaTCQLo_ z1NzSzYxej>>!51!%LmDKx%tuFDtQpBl!|=2b4mkSd*RhHjy?9+bX5JsyFAjSSw%k2 zmk*_r)!6ZAwoZ#$uORlZfyyyvYe8~su6#(crio~7%-5b~Op>k|9v|BkdQ!E1_W1%`#+h3!fHR@F-L3eo;cWm|SR%2nN)@n17 zK>%@~8oseV^5Sxv#RZo5*BDOXA#0`3DMM+h2iwhZX`x!GR3|&r#cGWh`BKEgq(qj# zhvFJ24~Q=(JGHrrny8rSFxRkttPzYN8I`W8wiX6mGP)@1Zn`Cfo1ZF5pB7} zsvfLPb=o%2c)!&c)J>!%1y_1aqdCj?+~}Ym6od{Hov*cn+?qVJ+@iqXYVSU>j~>#P zy9u5sx0jn)D0C2fp}Ciod#UuD$YxRGMd^|3vjCHi_x9e$0%;NW1^_ECf3 zIqHQvL8h`;e@k5>3Ed*(Hs7dpAbbgqjRQQ7)+ms7cU(AIx}7wTH453sDuu!Hb*{J)NFwOqTh&bFr69Oe1A!x;|g6x6}2l+S9sK9gPd7-DHtM z!bWqdicVIYM$T<)p!eBLv(`S8PR&%OW?S%AHLcd6%T%@EiDs(hg+AZN%WtDlz1FUk z=Ta3#GDPE$5_%TK>#nJ+4}vw0I-ZTPXtm2|iBax`Jn|0XInCCjCoa}{v(oHBRYrYf z40S$mQo_uE?w-wDxryo&zEvv2a@8ycyBNtkYOAxL#%rZF)tc=NbqvYqx7}%$yqh-7 zt_e}f_4K@Sx;9;&Jk*Z;e!hI8aiNqs1Yir@K3!k$Nd0yqi8%3vKaUjdrH*ISX!XyB z@+qtNTD>;knMX)JwNqfFV1YKT(TrR`PJ%2u3)ozQ_ZS= zgc@32zeNpW{-KJNO;+CDri$Ge)*GeCTD>CuAt;!-rNwJ4*Und}o2`D{9 z4F~;4$_NaAVzsEC2Yoh^6_R=s<~KGAtCZViq^m|W@hrL-%DYWX6V0C(zN2hiFJaW( z<6*{ZK9T)``X=HOgo0I5~y3p3J@0rEPNG1+@<(bJJpO7PU zgJ2D5+syBJ;}^TSr7eg(x|fSWB@B7QzC_2C*1KnDedy4a@3pLyN3lOTC#p>( zAYy#H+N2Rui|2`?d6X(0=KIo#OFneO$*an64H44vq^1H{w4h(Kg4S@LGGA$8Kxs-6 z*oC?y<2Tf}X4AG56{9+*&t0*3bZi6+#HJfo=Q}PLT0@FZZ{$y+ia(V$7R+j-uQ3k6 zX${pSSTNKL8U333=Nbo?44@WDwKu&)-}gR6%DF}v?JmrP)*c+VIw|JRMw|0V0Zq2Q z)*ea+&f;sYB7HV?t>9hhE1kujJVzbrj1Dm1c01kW{#F_ey?M?emfaH=~^Gq7RE zrHyAh)tIi+{VOroAp~t3BN`<^jpDjBWJ!Wvt1_9*5Q#d&T-NjJeTn*`uUTt0Yn6(o zK!==!*5>yml_@*T@Y!W0RM}he8XT5L78{{Y1?-iTQCdo|63W%<-cyLK0x|^lqYLKH zYMQrxKEsq;v9IiJV3s}5lQmtcU0c8+7lpAx`Gp{zd4f$P$tI6fu^N zk8T`FHSFCn&z77Mcw=xwFiF4yKH%~aToEe~IDvdxYe~kbIT;l8Q>Uzl+FQ48BYUL%M58zD zuKdu_-5w4RHV^DH`L}AIwR%VjRjV^KW8FXW_ZUG5_uJfDWJFe0o9#UP(n-t6==lZ7 zX;eV$LuR*7*9j)LXyd$LptUmQH@UyEZ>HRu**Di{%wkjQsU9WHVwkaEpLCKXVl}H% zjb>%v!c3*vCkAY$iUr$ri=i=RTd6W;^BG{S?t}`_kNlYcR?-cdH>J!@)n|*%5MP@jtk$clr}ZXw)AOR&4DWFX2qS+Bof8&7 zmZ>2!%600q^~QlZ{c65kpQZ-L<@O=OnTp|s92g(+q7O-PWx2q6v6=bfGE%cT4J|{# z3JJn0lfSk+Ew$&PParct{qp8ZW;-cT`Ipk zk(k^J2a7%#mv=BAnj$rDwMsT{HP%C`K`heYOYV_}jFl1hn(ehy*p0?QLP{}-cI~K^ zp?%6!EtO6!8pn#zYiM+OMV3=fTs|WU3R7Q0qrVn_LMo~O2VuxZCh=giMz4G_qQ$oG3H3%sa9>TN z3}Ih`4cr59Ze;}y`hrDfuY*skmX6{R*u%tXRwXnwdd!zK1@nP27A zjGvljrDuVd+A=a(rDRy^CFQ0`v#L~@sm?(!vgow19BVW(ie|%6bK3NNbwck%>FK3d zCU#t4Yd^g=O_(FadbhB8tJ^H@gYhFX)q`oU*NOnW`4wKPpy+iAkwu2>uQtfXyou%#!a>T zrmE5eIkA+dEM3w^78=$wy1$U8vSQfA1=Bjaqm6b?#!ys!laOh0TK=^iWRauu3hd5R zC0~LZa9Q4+dl248M5+dB2c`|;e=4*cQm-tP3M(O$)_S~b`dEQQmX#%uGPHB{QOtR^O|le? zM!kx*b$SM1XL&C}Mu{mdtu1Qzfup3BWV+;)?eg0aR!S93F+~Vi6iP$R`=X{04 zvc#xgkzU8-Lai0eT|qEjE2Dp(QOr#P6B0WXWue)asZFA%u%K)k-t&*Sk<2zM*|JO= zI4qrg(EF>!DA+BK|223i2(C%CDKYafi*Nksk*daO!+oL_+==-=b_8qmY)og_Q$t?C zT4tpnNwm+gY-rA0)M}@t;VVHsmH8=1s;CDUn`F~ikFU(kp3=QGkiA^m zAYoCuR>`9|(q=d01VJ@G4ppTXm;}%*mTOOAjlH3!x+_Miy zZeSFb9e`L!xjh3{uNk;{uce(UFECJrS%1G+@uM-0)wXEhr}-JJv8KyRVaqPXdUbp! zENx*DH&(w=#h$_{@YJC$D&(=vgaRFD)E2`>CYPof3r9@SYINA{CuTlOY+FAcbTuQV zfK(mokuhbQ?9Cx#I@)%9Iyp0+wg~(X~fGib8ngjcHUSq0~6-R&|3-R1*>3 znLt`>+rD<7<*Rw#8;s6~Z}!`%%ZIftwMn_w0GfRB?Ky6ABr3Q1A!GX0G>8qEbtw>k$T?FNuurj-ie|XcTT_fY;$?&d?Ta)1_ z?I$1u?Wz~gYR;wA@h+RgR5lQ?6~OjNRV&Fbr)4&c?qaD;Ye)#Ed@8QQ*!9{o7RkwB z{m=&ZI3Jlq-YJ5{012AdobZL_=;W9TYx_n&<)al|#lDVE&U&}3A@*<=$S-y$N-A}`k@*~{jVop~ciI}<0X>r^?ci`a~Pm3PI}9IhK~ zb9RO;npIMF4%S$B#hyzfnKmVbLy>}sBy?dLm6Hux91r?!wza5GA*o~>yXlJ8@3l@u z#C!^R^0^uSg34?kY$Y3a?A|_+Y$R9oPaP}MpeFfR5=ZsEVCI#-(x&jNv4ZLY->8b3 zl-g*R9V$yU7EeR6Urs;MZv8U+FIqyvjf_mq+Vo62J#X#WOVZ8FD!W!2``akx)pWD$ z3O0zXVGGt2)3%L%Jg&@c!j>;LL&q>GO0dR*6?w#*Eo3#yp0l~5u#rG}R@2&kUxI@* zr=~j17&Yogq4~mCeE7FUnrzDHDQN)}UVIn(jcDM4DeG3rCZ9M$?yOH)ZsTkiZlYGo zwni?Ka9jJ3V#|zE4l`cvZHoZ=Abb>bLAl2cHl^be*Nu(rO=QcmUY4uUu~NL!@l+{$ zum&6$XVOY!Z?sLNVfMGK_xYJZ#pKv$oFXpTvzWxAccBPAaxd!51+!vnnMv}N&QjQM zh9hup%$;@?DI@nX*+g^6U-qGEd?`tsZH>%J0hKt2l1E}ip=sw5IA~V4p)tt6EY5;- zC9^Y`6*4C6dCa)%JHpLa-R3+M`IakF0&LSdnh_Y=who?{C2rDo6gZ8eXkDPg{PXYgp4tA z9_r;yd+*j-Hs}=^& zke$WTCJn@qdN}5^F3V=<@yW=x-DAVrsgjJCGHXjri77jf1Cze(aN!fot*5l{gS>3i z8E7pp){5mta{(m-ao8J9IzM8qt{=z6D7b8svi{pXylo`ejAG%MpsdH6CCByuG6ucP zI#47DRyZxMQJ?v)_r6NvQKtQnw$?^a6N~^h4`$|pXzT3f;A*mE`)+nIrqa@~GX&D# zE1IvFiJ_Ih2sRFzAh_U9wo1=%TNd4eQXq-68C*;}m{Gvzcovx`euyHQZ}6c&B2J>M z*UsZc<#LP{Lr3mcX8O@lur+*Frb)kclTZmmzY9RK^S9P4H$N>9m>Og!<&sf1Fh#UR zAFI_n2YW`55YNY%t9M;+xYwOJCxyBPA%>;LE<}*7`;cE3{hrjGK2D-)@Ud}aG zAf!_l>^;mgbp+koIN5)WV)+#w zH5R*2ocz0$4pKUpvZdd1gtNk85h`~JzZTN$th3H*545J`)h3zBb4YPu>^G}KeGR4| z5@=%)E4g)aG@Hs#v7oPoyfEb@M*k67P1m5qhj^=rXj>Q9wP0dg144LIm@7sBkZB!< zkE8J%mTV|*p~tr(Gm`Pq>qiowMFqGF3yCJ#8rsKQbyts#ntl{C<6V7vX~hgm z9S_?(~$-=$|dl32G_Di@u+oqDfp`VJZ-@bd>hLK&DTkNa@+FiE(tumOo zA+r$JR8ZAWmvM_qm)_2Rkx#!Yvx3|+FD3Rcx(+!)+O9RcWW1{s45g^zjX4{8x9&W5 z_q9EP>$pzf_@)G_xyC;1Ji0E9d|rgr$vCQnawuw846ym)^&YxdVJy)0z`dR->gyVi zon$&KdeDvuXX%r1b2E`m@4APjqGH?=5e_TRkZg2_AUw&wjM|R{#Vi$3g*#kCbweiW z?P{BjiadZVebZLBGo3M?dUN4>_9&nC`&8v9r1M!L2u*>ma6&Ll@8 z(=n{N9B;|iZ_d|7##M}B>}$dtaIsoe z*~Y}U1#@P*AA+z^P(w7D7W@lh2m(rGsu^lvo^O zSf)VRCX%wIk9@6~j*MwDzi->sG36}5;>`f9f|XNy=5+d}TF(*$sT?dx;x+6a6C>A7 zu)98wWMYH%4>AZ37+M%_p_9@F@Ocz>{bVWBAF{>qEjv@rqI8I_&v)2sr=@VR37qXvFIy%#&6m*RWYk#=of6CVMV3*}0dCpt#s2V$#s6rak$)@{3dH20BSt zT9BorXHWQwBri^)5y<{~dR{J#doD^<80i)6E6;?4^gg$9ViEJhT;1OeZ!@)^=WXb5 zi0hrrhP2tzXr*+u?+RkOTO~bj@VvDvT(c}~YfaZGr46W@r3vP<=$`WYfD44V))mwB z&LBIxR_xp{QF4-#Emk^8f7DBbr97>0qbfghHJan)l&7cfnaooR;rfoK^I8?^*+aR6q za?<%SY-yrep4VY!Y=za9rm*X^y;r#*QA_yan=jQWS7Eeqoyri@)kE}1UQ>!$B zwM#rWlwQmNp!qkfa|Wd`TW-~6DO;ai1HBs;f6xW%(=(mP4pU5ay>N@i3X_60#knf_QzX~?sg%Rs-?){C zG`%nS-Vb{*%uFzgOU3&1H0yW1%!W*5>RGd6yUWb3I?F6)4VKZ#+6&H- zdA3?9&oRy;YZfq;l=aM39~efL?_M!doDBv#T_93%Ky9IXADk<0=%4_!@asi`u#!$w zl1-~D3E1w;YVTco2tx3XlA8%9Yi}>981W(vi6l3|wByYI0;7V`z=Z@{ICvjth;fF?P0x zZcDl_3uSAU=R;O;8r8=OneojLb>L94g4vL<;lB7_3`KGwq1u@zM%48C?upU)-Tk_e zL7c#59e`0vUGj*I7_VY0^{nJnlwB$oN=lQ~V{-+o5p?_5*W{Pc`s#8?75b?08J%WL z8rkE&=bX`*Vzw$#OmQh7nakUaSPnVho*tb5-R>EOkzW!CCM}$L^9XDVO$9MgWaOd~ zqv)8iBiSNJNKU8#sJM7PX)&JMH!qDl+(~0AU0{)QrmIX@GcK3Vv#dy?z}Ofh8mkIS zzgu`}36UJ`e?MZ>LBr-%DtCygMhd<<+?8ABjm z(f0+b1?pUZl1oa*bjuNhAp>kKleIzPF2Xn`ksYrCK<>q>zJlpP+ZlrV7gPiX>kL_aEt)_GJ5vM_~ zV01$Nqr&w-rR92g%=H{7WqjX=UDoU>-Pv*QrdFrPxp^zc}rTKVvSajd-D zz7ceCHIEZxncf{6*k1x|MAo|Q-BRY+^pd2HW5+@kw2^W#3t;Bn(Y0;uQR|pM!w5Em zt4D9_rCmIFw#qL0iS%q)`qiNr#+>SW(B!kcL!N!zJQj+X*VKI{E>YFR9v%yMbXAoy z#X|PfwpgON##VpUDzAbndjQ&@G(yqbvX0-IAQs5h&>(8oj-~|Ma5|n?Fbpb z6kvLqO&zYj_12=-38YcEF!c)a#W>=T3)9@g`GItq)gu*bV%H_uO*wT+`Z|I8fm}Lu z_r%luLAqK4&26%m&7Xp?Z)xc&E)A2U9?{D5TAm=67LiICB%}$ZC?+kTS10d7rWfW&kx+ER`smz_o7=wgpUNE1+P z_HDxG!Ca#`j1Q?3<`Z&BXOI@Dn`cDnMY+XnJib?|-QN#n))na`QY0t3okDtAnFSB) z4svJEVx;G&FU!24ee+W9eVHdHOnsa}GO%Y8bMpx)?~wZL6|8AqH9XGM2)1VB6l9x^ zQsx@cJHC3j%~SY%oLKnkQ>&&A`!t)E+5%-|(vrS>L(=hssmx_?RNqMyM(4@uBnflZ zkd_>AfyzTI*}%>q$*ymfxUdT|^3G70g;WQ=+?V6>;)nLPb7Ew|jM=(OkVc^w;w;jo zQ}h%0TjXsLvG4`=7|CR{jEpt<%6iG}d~+J<*T5L*R)oA&BH78&I)`mQFPc$p$%xA+ zIHll3r)vb2g)*87q=Q?G8(<)4YBuy`c%H=6YMv*Hy`wN!mGjAohMm>14pYH1p=K|V zU_KVJkdjT%3kl;}GjGo!7H7)~kOv8-q8B-PdG+NOD2Wh$qHyFLiRg^p9wSUZS>UlR zFC+6VE-){WMOs8j(Io*a*5UfPMZm0snvO1(mS<;b&2$=XyK_MpSOjTlT0-EksmsE! zoXzr+Y8KQVv&BNT=#tV;xq0Jjun6U7acTn3KA4v~**A0+7C~-&k5^&#FeqPdx5d6J zmzyQ+KgFLf5Z!VEE839M0Mn4H#59asHE;0qomTwpbZhXV)lHHmj=%PeRCI8;C_--o zYGEK4Ev;X;$4jS!mKmM4-KpwQRV@iY5#HTBkKN7QsIv6u%i(TE`F{h=36kKD5X7Rz)O6uh=c)Wx_ z7(l!|!x!kc4F=0eNFORwh~FK@D({IsqXIQ3^Wx-k6OidNe55p1pxXP~z`nmlL%5VJGe59@74=D5S!4NjhWQ`$!q}_0 z)=vtY5@WJoTJ9|E0EkBCxI7pvo^_CtkB(xb!8;QcRz~A0}1@WAH zyNN?j$nQ#im#Ji9!5N>%(%2CfdG+j3tBlWMWMxT@ z)o2&0Zj(|ku_5AaCIZN0;SQ8*f2A;DUB^&<_=Wt zlY0YQ{4UmUQQPI^2!FOBbk^VyG`{xYg?E7ykS1eGR zXU3viOXg#iw~tg5W-T#JBwZ=CUwGfemU$$17TT3lSInruWGURQZX7tQFw`*bilH3l zl*4DsnKmGa9@@m_wFQZ?IJ%2$9M83@EU&Yp)69w@>{4+TiFZZRz5%{V>)1J&e8h>~ zMB@isz365cC@~o)bBkAX3LIpW_8gs*^9)OvO>3E1RITbn(@+#dNRMYxQ-*>l4H7f< z7k4)5iUg@P`>D7hF-2KU_?j)@P^ZzUR)$nvfaJ_Uf^L@Rr^*xjx~t!vi6{=6NOF?$1R$L>9VPBp|%6T z@94HFE{528;TvpR51_|tq8^tFZCBr9wQEr)vqr{=r`j&M7)4W%ohfqZ4MCC@U$X^x z@#`ggkkX)L<~0wbXz1m`xFA*IQ`I?>IHD*MZaK9uBf}!|1D@QLj2~pUw@J|(Df5wF zxZ)fr1Ko^m6Udj+VfW}bv&$nX%*-w-+fM7;UFZvxGuy<(AH`xO>s%hco=wZ}Od908 zHD<2arHr;dEs=XVHeT5IAY@9HP>KT@Jz6`@#3(LZf-xg^O`01-*Tjaxj*$5$4IG?3 zk{K29=Be~0B`g?!V^6;{MV8I7Yt)8E$bv~y?UlJHE#}h4Q)%RfE+3`EG{uuP{B`N9 zj$M5y^pKq+?40)E*aD5034ZIC8QI;PGSP^eZGykj;^zuRW=)znX++&v`ih+@%vwuf zKT{z(v0@L6qogcEVp#hCbLPPnqjW^pDfr^-UoQ7@YIB@W#MlLkEv|0gVF#a2hK!7%L%{UGjyBNk>$I4B ziBG%r6GAO8?7)oJp;(rS`T4Fs)Qg35wiW;C1CYLNOEYpT95R1i|d zl7%BsX2KEwuw6(siUyd)t>P+Ts5~80CeB4n?XoNmdNy4Oe_O~hlpVBKi0<4ZP4gaH zos~CK(98~@q} z=DhlCR+lP^VyqKHI_Etzv2`)oZD5)`!H@-3k_LxyPApN9@ncOx{0-U&81Mv zqvzG|E^|58FH%;8g0a2N>X8${T7~VQS=;tBQ&`fA4(3qToE}B4>`uZw3=5e{)OP1a z4kS3MGIfm0a?4BHvOoQOpAu_>Ny%4p(^xI z^wL==L9E?|{^*;8WSS4{V-M`Bqzob`P${bBfd~7pHrQW0(+-Qw^=dbXqmB|+!@cbB zWcPhb6=qvDOlF6}2dr@@#KtW?)>N;Z2WudpG* zu(}l6Qc_)qio5;77Kz!z2!2w@hGD33n22#+1u6Z{F~&4Od9k^F<~BC!>~Z1|CyK#o zY@9X*9W(3(bg!{t%GCWTF+-9$joiXHALj_ z*zmUD3B1UTClkyZ*;y0%M4ToB6{FAuf!5YR#HBg~TCOJ(*#Q;#y}Sx{vZKyo@?kNLQrv{hHl z9n3C%S9CwS(@(F&)(pc=9Ah~HU7yB)H;X2y<(za?z9tXF`1vbujr5GW!aV99R@s>N9Wx83C z_PeoM33)~#;);lKg@3Kzn{K8ElEL=XC)?a+92qPaJ6#-Ry)wD7r%Q^yAyc!DnHyTF z9lX=JKU$O!^{`;w4Q0$c)0*J+hv}YZdEYX8-SFOI%x6JC>9j$Z%4Z!ko~Vy!ra~r~ ze9a}h1V{xq6xSWwiw&nztvLK|9-i+R+7 zs98?>zD$yrMaQ?6(E;L@Bgw3ynp3KmP!sitJWgoaLuop3y3IAGiiLp zLtUb<@EbyhyZ>qqw0Zv<~jtu2&=riLO&z(G>cZ7n(??qxLy~pc6_6LGg= z!&5pilVSXq$Srl~rBOx&J_tM*-S8$G)KkoU1)rHbz~~+{oj6QD=5VZe(0uW-%5phw z3K>gh{(teuyD1*H$wn)$e%DYsCI`KTi!hFd-ow6^i{4~g&?6)Fg-zB{i=(nhlbcu@ zHJ`jPA95s-zh#se$1a{V~*%@z1yZbSp1(==Ju#^!8}3bjes zBzf+p7as$qt9EbSIEqA=F3Y_Y9RP5!CYf@=*f4=2p!WdKYDX)?AOsn5A=LTt@VUWEcb(F*zZM)UW zFaSkuCYm!v!6OcQ-78zc<*#|q2(lq|@MNd2PBJGQ#+HDah21Z54Qw9HtOQOTkC4%%$G=s0+dU(;Ec@pZOK&59_b>(>GbH+-T1;dKF7T$f;?p?#%6Q3prxJ<@4ybF&e8zsMe&>)}8I+B_eVV;S*q)TCl%@pA5 z=&h+-N0bWIH8o5yVVC8iS0^6lgRwJaRLK?AEWSx5Tj|Lxgyut6qN>BTvLjzLWK* z`z51TZ1_Prq3eFj%YvzJ(Ys*T&eLVaLW>%0bis7z^366`F*dT6iHML@Y5n#c+jbP4 z5Tg@`F!tr_OpW!Su4ZG%3YH`NsR=d&q~6QBg?fn9Yag>OM8V~s@?K>x3JzPApIc$~ zaI&+=U$F=>4a!?_L2n6viv}Zrxi3z3`{pRK()r0n*9Lq}sPWK=+N%^q55~LMnW`B< z=zONdMy)h#aY^_1bRleF?K|l0O=3ntD1WiloF~JX6BU~T z>6Y)fvXzg;uxYTpc}viwaZ(U{8+T1q7CS;Vg*(PQ^6Ym++nE_aLi1#{>T%B}ctalM z?_BEGgBfu{oBQI4(a=}1d@EPbeU2!yLN((A+XmLbWH_G5*OnZg7cgTE=k(2Z$Id71 z2=;?2>fa3ivbCByOR5{2I_M!Yn&Zlp4U?*jE5>NTIu+fm1KH*tdDc88y9RK+pHo^z zhT>O^<$kDKA6p%m%cDves^8d=SF6DlUFG#AV_fz1w`m#5_#z`9Gk&%NP0(~L{)$2z zSJhuJB;?NnO=4HkCST3S=;TK-O+-aD?w9K8OId!D!)eaq_AdOKO!1AVKFPY6?g>iA z-cVNar@SQ`AzI3(ayCsY?1n^=1{a&OD1QVd%OdRLLK)ZJP~%Ui9AvlS5;;U`Oji~g z&soCVa<^g?zo_WB)8%5EsjO65Lz&eU|F8)M-f^7>CUf`8F}I-n=@=8^DV1c1DU7GA z;m&2b1{;2K%ItLvssl}Hm6I&hM9!=;`TAZ#yow95s5a{erdyvAWn5>jLi}ikyfjCj z&9(iDGw8o25S9cqG1KnzUoJRqUQ|{avrJY5(Tdo$-Ctn^C714tlGd4? zpvT6QAe=epx=Ar|n3yu$BUppD4)j|rOJl-veNDj;h%cwQc|DJz9j?onb<@E++LIgF zB@8T@%i!tR2M#%Sc70M;K0fHmE$c`2`3#G=%`xH1&TGdWOV literal 0 HcmV?d00001 diff --git a/ld/po/ja.gmo b/ld/po/ja.gmo new file mode 100644 index 0000000000000000000000000000000000000000..bfbd0c9d1f4ca1f72de27ce4160f46a258924a73 GIT binary patch literal 32271 zcmd6v37k~bo$qg65|eaxqcNMwO=1UBss+>pTR>SO3PPk+5_O=uySlrix~fx)K$Zzz zEjx&!pooGCf`Bx*jR*)cCX<;gle|n`mdShBK1KDCy!m{RH_J=jXOel}|NoqG>)z_> z1vB&cOno^0t6TS;?SKCJIhUWE`-bfvpPy4cL^; z-v|DSy?)1gJnti1UjkkLUJot;o56YD^WZ}858(aag7ZA@M(~&50&wE_o_9C+=io;0 z_3!n(Yr%WK`QUfKUx6Q@@vY#S=zI(KAovJa|9;O~2fhk^1HAqNo_7Oy9)p#Bmx0pH zQSegmkD%PYgh|TpcY#yDuYp&9e*kBKlP@&mFMxBoJ`HXH&-pNYfZM=1;7>v6=i?AT z+RcIbJScQH$2aZW3QpttVNmAvWAJLQ{-d5Z3ygzO|0(b~@VDR$u<>K&_b-7$x4#9a zf){+;)N2AS;rbzvD&AK?A1vGJb1w2cNa&3RnVNSE2&ui>L78_Jlyy49BpwQ!eRANeABgjy_WuT029VqjD1{C^y3zYtT z2g>swywp551Dwfq8^{#A1EAFV9(Wn}8xWTDd>Zk=t3kPcJ1FD(qQ#w{tlLZW`tQIP z*S`j({`|J zMLwPe<+-nc((dm-Y4?0OmvK!2eeecQ)-eUX7hDI*bGyMh@UK9Y+WR&r&;1@0K0A+2 zrN2gypS(Euc5o;7MsPp)B6t{t)w~vj5fXY^!E?Y@!8d^40N)CJ2Yd_o6HwYc1HK!4 zYol5B3qhgdm7t9OW>Dn51C;S>24&vQfimCkSp2ocH$yDBUk}PWXMi$}C7?XN6l4j! zFM*KOdlr;+?FWUQ-Z$0o(KJxxDFaIX58CS!pp3r+egOPOQ26i7Fx>~iPk=(tnV>wk z0F-gu3SJ1NEp7(4zs~axf~W%TT9lsDzY~;x*Mcmi*9!_A%3vq>J1_;dUCUa4-v?g+ zubkm|3Gi3o9pIvw=z6dh+zmF(f(GC}f$iXYn7xkvUjX-WeR__m*FM+tj&c3h;9>C3 zKka#c2~I$$rT#yH9pKz~My`&4vhL?z4{gEeU=iF6Qq}wD4Mu*F;3BS{0dEKY0LnN% zH{bOCDk$~uT!0P)zX@i+OK&v4?*`@fKY|5t=|VG}AApOwZlLi$1B)PCd%pywp9!Dw zyj9=^@U!6SZ}L3;d3W%q1w0D2g6GkQ&}|hc^?n3GI`4`mV-Ht=!Y?m?GOu5O=Yx}P zHtTd9cmda60i~Y@L6PI%f{2Fq(OV3D4!n}<`#~A!H$b85dAFK+o#2PK{u^*2cm_m7 zyz_ZT#9ZEWZpl67lMs+dI7iul;^uZxqlFZl-_T^so?a_nRWXjNY~!az)yi! z-e#~9lzyKAVNLIc;N{?X5CvB8t^=`CxZzv20jF`)ZW)Y zSj9V+MUwV!2elng=5}z)QhXpp5fZp!EO#X7l@vp#1&?kR|gDfHIzc2Zc|r=8w#O4=BH% z0j0hV^T>E_2AQI_4rB^m8H5GB*$K1G+d-NCFF+r>q|M0v4WQ7Y0A2*{1DT@tE%4po zr3i_%I}Mb1?gD3mKLLf#7b1+ZzKgq`SzCG!AkAn+Ame~6(c+TsP`#aG^TrXa3 zQfj=YZYdG;lpQ1^l|b{&!I5JuPqKPb|J;mARe?%Kf`Q8TSG3ZQuatgZ~1;dft1#VCecKQ26|p z;0@rXzG&8|2NZhzy}f?dmkb{-1>eH&N5OjVxW!+9Q@B3o%f{|q1IoOv2d@N^;HSVn z7Jmf7hWgpdU#8*xjk#2LmNjI_^&{&jG!wp)&!q@B1GJw@i|KHK=hwABu61raUPRi{Du z+)ojnM@04WR*TPo>nVRr`Jw%7Ja~`&&Qf^aqre)?2S@ui#c9OY5UXDIT?8qmKl^Y`na>s|KyW^gCvG0I<4UZ8BD z$Om>-eRmP~QOYMNZ=^g#iBsHX9A9puoJYBp@^=*B%Xt*}^isY;d4=*kgVki9|zx0d4lo@$}N=tPMJ)(o06c&XCmdNl$2cXSz|!|PUmlnz5X-sX8V03c!F{- zTu@b@S7`m3N% z`If!D)1reP*e^x!W0bj+!;}pa`G{=aLHR7@e^EY1d4O_~BA@FiS5xZbg3m_`czkxFG+;`wB{-EYZsc4pFk zZdGSSkp#xtxDfqAih4q+1exQ@lBqsN=@$WUeKiZB4ZL$#hpC@8=RN`D7-Y zlY8@%>E(&6pKHk`yYhZK-RgHHIy2c-erLQ(?k_M`voh(nWP2e?*O@fG`+h8TTRIcF zBbA7^GMZQ+-I~beS~A&$AAA-k@_u4vS1Q?(q*EQIA9}7Un`ld}^gA=H3DaP_wKbN@ zx3SH?N27i2OqAgxX(tzoT3dblj30hRnVqR+ zvSS^FT?-)|(kA4oS}e!jFn*ycOy1d<^f+OX^m2bGqT=T>iUCKrrc&X@hkh4ft1Pe7 z&vztzyT&qy@aiC7xkNnM(h)O4IBjY!pGAzFklfmlNb6uk(X_5&L6RbstEAbuFJrMH zH)g`5tsEc*6Li^Kk1C+D;?o;wcdYHP-ZFBl=@=F5MqBa?TPM;Z3yD7i@#tiw&HRSQ zNriGlNnZ1pLOPW|4a3=J)viQKvMmYIXVO;3MaMH#%0$d^nXZmxE{~pviG(F&6*6s( zF~&+GqdkO~boE761Cm(@v7%xB}Vu0*Ug(OhT`Piu~n&qr39MSqz4s9G^2D}+g! z3(1rifUyn=K6Eo;)kMSk;}f~A2BW5oUa=a<4sKW#;@>>H_E6=4xf|=S5-Sreg}iEg zBSc~lqC^^2i}<%@vdjH=HiK;oPlJheCi7N_G_M-#P_Tls-Zd0aHj&Gu?t&-c`LQ-; z2W_>GrRcCq$QN(Gv6<69PSkx2TbhwMs;q2D6S7tOkQL5C9A%K#oJ(X#Wr*fiUkqR?1VM6hQ+S8qhbl#tuOMW5h z$B5Eb*Clw!R?K8u63KKv(f*dV__J`Z5Ctx>$^0t6r6bX@JO{rf{6reMv?N+hrH(|r zt41He0{CiT(#d=>&WbV=(Me)tq@rme2%Rl5#FeTuy{dmQVAW z=gh5yHX^EGuJaWI<2>^~eN@Z8%Bu+%(Nb0snSmh2Ez7H)4-1CY4XFv((WnloXxnhS zhaiXxcw6ICD*)5)(59q~F#iTC>EHGV$9#9Vwp4s$nN%zB8Y-{)v)IVDs>19FY_^zL zT`;P!h%OAZdZ0!_V{IYdfmFv>^Xw`->s6hV6_)wPI_N#WD}!1Vjo(bPE_Ga#td-2P zs@o#iuQVr99IZ)dODfssay68oG!t-hQzDDzK>aOFWLXSfpEs4o1BkU2B%;SRjTx2e zB06d0Rvz%<%@T_Tk6A09v(|P+YiDaVNyA9cZ2cm>GIkHD+&X)KrUO#aT{`0@ItwZF zpPVP%;%B-vbwOkGGwbIzvTOwwPvTs3FJYX7@3}_5e$FrtSnJ@PX!Pe{KMHA0i1^Fu zo5nRt#YQ7FrrDNEdm1)wt<=GLY3UH|!F=*P*XY&HYV>Et(^8?GCAMBy=A1HCy`1<{%hpiZoifgP?}r=gKImW)~g2KB3mX<~Z$bS;>}^IPYz7l#QE( z-X+z8@$u_tA`>_S%n6H%LX-BeU?!s0u`FuD>BL5KNl1d^6ECSBF9yoShb{nLR-YT^ z>a-Y=bS1JvDSy!%)=%;-l6@j3qNB9_XaWkI%eeZP<79Q`*3+kWEm@gCBAX?0sL%QJ zI4kbnU1+3Mf9BlTJ|2aTJ=}F6y*!;+k%p|D@pL;eM?2$QMLtFzGELMkZZr)uIZZb) z$RJ|2X|QafT{2!nDnxE;n;K=AcBBixH3L@*B@-(N=7zR_MV1vuCqe|s7;UlAkk(x6 z*Vp^atNbq{vKjlsWzp+KO|2Oga_pz$2x2}-|A{b)SLWsf1tcS9tCHcZ%>epcsX{vemscO$XLVz9=9AYk?b5qkv0fhyJ!GmOxZ-=kT&B@@8w(!^9Ynmt zjn}T%l8O^_iDbg-?(x`MvYD%NEl{**o7NzviRC(Q34?}XEW;R|>`ErIMQbfWZ7^;E zLEG|>_VO7x6&Vi(XGT!FtyzI~Gi!uG2qk@uzB0N_i9S~)Tnvg$Aa=xa9SDcyfi21B zrBaD@1PUq$)9G4Uc5#n1qeo*TbX~X^gm*^w%GyUBwJTxn*0>Ynj@8?dyIC@%9o0A5 zT9?Y8ml8EfqT6XLGa(gX!%U$uxGJekW;sbUqvp=Kg4OOy$7a{0l5VL8X;ga#Pf0Gr z3^>wzxG{8~F7A*esd|X?UrtO%I689lvU(KdY0`3%TQV7Y)tMrUYVmYj;fKlM8&fv? zBQ~2ed_#yPtbiGVm&NQE73zkj^4iD@s}z{aeYL7y6eXeAm9T1ZO$=Ev>u?Hlh9{Ox z8;#$QSn1p7K^}3<)VM7Q9i!6~&*EK*Mj2P*`4O6`xSRP^U5OCmyS{R(()svGQLJsL zxTHpm_UlZdV$njFrGkd;h-9oYxJ%YO*@Y=u+%)5+rkfY(3I%ncq}isC6$yUj@i-!D z)FjRlR+?0uYmw|NMouDe8B1G6X+G@4t+m9Oig{|2yp?N6)Pi_ou~3qK}ouHHtTg)U?hLmwMK7Nj9nYbsA-I}Q8j z43^N8q&8qv+qNjV3OUhtGslUClT3$pXfy_(o{0zo?YKfLJhFNw)V3!HFNvVX+qLR1? zO;q;uf>v|OlU-dh;Rw+gnkJCVK7`UkJv>7x>oSN#P9DPulcwD|p^#bsz^sW2lTE0X zE~dQ_G{`7~Axx9OL%8yev7I_-bji&LMqA>2*__+-V1bgA`N`rEjZ87Rt~qGsBWCDnc@&yu@XVuha}vm#7BG2v*H4v>hfh zL2Uiz1STv_xOJEAZrE)k8Bb)RMw~$x^vQCiRV#`2BLVRB@7lA1|lP%&MalR-@uRO94Oq-OI-#%05*N`QSpRAToM*b6a8BruNN*cTd^`2EJgh-RdgJ&t|$OBstV%}=V6!uD92e>BN#?? zrzA0P=p}5Dd@alEY&W7yC{mv)0Gi#5h{J331R5nA3-~)44JrT0L|YSh_|{>MR*-N? z?wNdnFsC`WU;;R&n-=@m&7bch+#FO8qqo>!{Mp6x=Mex0KP{11zE#XAJ37KB=EOxN zZB>ch52PR(!->A4Rehu@o9Re4V~5Bs>B$Voa`?2eSq>FhYt?YDk7}tULdaUqC)2^) zk!@EW${0MWp0y4PVojz*!emK0hxcjqkxFvM2|_;J?r5w} zgvhQYtSyyU0VR}g1PtHkqXo0a$S^g9)8Nudj@?`mMF|UmTx6eOjS8Z9jCM)~LMa|l z#YvGqgtc6As)aIga)hG?h_X|2qFC%tLD0WMD!NF>_^)G&k(boxjNvsaqsAD9lxz!& zZBs2U$}C+t_3ImODb)HnK2ujhO*U&Qj+vg6aMRF35=Jqi2Bk&lgKrdSv2wCSxhs0p zy8ZBq3lL0wqbMb9Tb~jMp;pDBTBklp!%4D?2P#G(4l;H4weIvvloan!viqse3oa)J#P%y;`c4yN(Y)xXS57;Agt zn5yd=gSI(uURt+*HAQ3Ev-`1a86x);LQ~7-@@!kCk+I0`wcIfFLl#}Gm^(j=5BUo0 z|IbgP+w&dXjf8F9jhu*3sl$<5Xwtv%-9nQyOl8Qfq8>vsPwH9DvM5)1H%V65`A8`e zapo6eqV169&YM4{&iwAwS-3e9X>(tl5~40u+#*u;r=e>mN40Rgn0FL$sq^Bw zmPA?(ig-3JFGEs0!m_xCxW=tqp`|5(tAzT&GzGz9G@DfCK|a?${+tm%PnwsJMlw%z zUO_b|d}mViBG=5!Jk@CL28sNtyNj|JIkgv?*BZOUY>7Aexbu@6CQod*YGR!cu-JlJ zd$Kh)6UmD;p-B+ISaUMX?rJJ`ZF{=VKx|dFXkk;#sDHA~vk5L5{mBz2O^i*N6q|UZ zKWS3qQ<>?FmS$U|X1q4s56oDikr%7o*i8MaH;rGspt7p&m*OtLp<5P>)4s&+sa#u z{cHA@de)YDPL_Ih$St||*b9A6-d*b6UMg-bb?+&!d8)i|SE+cSR6L@sP~mxbuGDi- znk*hF6gTOXb9fa0#z$=j8ScMkFZ3F8LmN#u5>^|1FaknnP z!BY3#{`gYQIwcgtJ_Hwz`FykzdsC^nK@a}=gO9E0-vw1{H`U~kC71pTAGtXUd)Tp5 zL@0L11d4D8GO|9rnB}!=lzWPU+h3A7Xr{7S(rPSct)I&GZqda$-TweAS#y-b9);8c z;qZc??2suRDjzvz*sa{VXW;S8eLIW&JMKGk@?^lcW917W>*JeC#jUl77AbJUa7 zrEXm#`7VdYO5Mj)M2reTG1Y2#w8PgC4hst$5+4X*gsW<56AnO+d@j41qE#~1y;+sX z-FiZsnZVsfaXAfp#84l)pM?zK?^hkIhG1t-JSo&KZe$`H0y3w^qmP}%TAq2ua9c&F zqv^n*GVPbwAAmszR>Sz4`!=t`00hiBxbt2H77$+aQVr=J>+lRO8#+2&G2A#cLI^P& zUsWWGeH5}oEyIOyM&*DuKUXc0Q45v|!=KL%nCpI3RvSv)2-u!dw=tsF)FYGkk2&IOL{;06MI2VG`GLA(+Ep4$mJTNc_vqd&Q> zJVe){rJlp;3?jDhT7=A2$r;1SD(*8xv08sbZ&FfTBOWdfI~aZ2UnsACP}Ws_?eNMG zwp7lVmx_3R>N&%*y_=bZc!@pT;5U9UBX&Hm(1&-Blncn{R+b5w_WJ+VzMMC4io!2--!?CrZEJ9() zsOQ>ijgz1Rb~YY4tnqyR_JifEFV$qQQ4hQKJ+iud6i={sU|)CNv)EWAc5#y&c(3Ya zgbsrJyP=1~N9;g|gk#RwiLVHN9~)DbqaBqWhGy9B`!$Lgjb@`ApC55b5`b5_sZF!d z4%Uy7JDoO!8+_=wzQa#odMlwS0qE&ROWo)Ug6e7> zW;et|y|qu(Yj-0>w?l(zv%@mNN&UY4oBEI7vZ2-XSVb(w<#)3;CK!G4GL*Io9gVz~L;(2=#IAofQ}w&s;m1L@-D#`y6W!L9<*xhPKJBKKv@RgU{9%Mqk1wd zFqb5t_Ph8``KX8xghIBcv61Zmh_4_FuG=!OcbyTcT88-0;12YHx=Pmnt;7N0cN64Y z1kD4YSMa*XUR6R=^$(0JF#3=&RQfT$r^I~_b%e7fn!3E}c;6#PI`hNZhT~XByeWIP zw7SSXs=m$;BtnFt4-)vC9ymoaVb7Hn4y+md7^xBt9ePHN-2qp za_sQHaiMT|>yGj%rWR?MHz%B*A4xBsIkib62p--E8F-6AXDaj&%d;L$e~6qw|EU8m z|4fiV4p;I|Jg=`m3{SS<>1`_Zpz2&6b&NF8iZZlQECt$)2wlB;JXl7$_u0PfOr3uW zFtog;)~;ja(B53t`^j=q*PtT@OrgpPbC? zyMGG_UB)ZfylxD$9j_6IxpE$cc@OpwMxq4C$exsKN7+0#FM*KnDsLniaZq0au^OiM zoS3Gb^=?v@N3^vw$F`8sr-BLB%cl;M*YwE$g`sbWBrf(1vxciy-u(y$0k?_20ToC2Akt!gqAZh5YHT=q z=9Qg&Cm-nVeNg*|+$CTMerF~p@xk}otsuAQ)Az_h+e38UM~7fq9Hyolm^$;4VnBM0 z@~lL_t`$A^F6T-_txBTcsI`*B1c4UqKCP)FW@cFlp6=hta*;2q2p(e!TC=aK2n#}y z!AE!N3oH?}(GA-MlD0GaVoNB3uM9Xm8r1}(U8+V*R@;pao%qJ?Kqb#Cd*ow2uW1tSukg!l|H4OttCl-zzR9itr$9K@&P<{nOAR1T)NL*=vL6(R5jY3ZYku#25}|_=8GvU?OrFbJSX4Rts;*!>^9#BK#U2=7=eT5`tccC1EFbX9V1M?0e42vaohjLKWO%WDn~ zu71uq_v&P@lH!yolZofnbDug__#2W!(YK_SK*brX*;wG)XfwehbW>iv*9|w^Q}Br9 ze<}&H^6pK_ArU<$jG&fWjqm=TE=iNV9qXcf$2udUEuY-ZAfR%{G+QT0he~{?_j`jE zu)6466%r8MSS>vu(F~( zYj6;v;|K;^?F<{i7}!T6ScpyG=pe9IZbZh0_C3!iO}s2Ia-Z#uc$Wt7#uyZyf_YP{ zT8CExW;6OBvsQ0yNE{Mbh|%?xX#^h`wnZe@ssidR^{_V`WTGNkD#osHuTKCV%COd$p{7IuzSU~s>LRcZI3aDV8+Fr2exsVQDW}FeUIEf500P2w!Hw~_S!0pgFxAiO= z?Ayf&j4hJq7`ulKNo&6@CoHKi%2k|1d0kG-4?7~JE9dU3sK60wF=`5i$b&v0hxySl zn`=I0nTplsn=G%17kt)!3{8*HDs5JRaA$&Qt{E}&&|QPT$hrL`BaTQfezhe)aNG@2 z7_PPRfM|X9JkkGxO_+($lbn{1Rud7w*qK0QzUWo6 zg;AL>hQ=q`8WlAAyHbkr;f<@Xgh=jMQ{F?N9_ZdZG6bWjLA^f>{aC`3sw|AU4Hh)^z9`jh+(ahmLjoxOiNo-q@$; zd05BJF}fE;SxWY;x4e3b`U9rzAewg;y|VT--%^xe$qoVzEPn$n{Je4T@LQDi_t(r~ zvcM>A&0w+2oPxo~TTzh=*f4br3Eh@aL~?``%voIBpd~()nYq0&e5b+HI3HoI68SL) zro?NJgStmZ5@Oe!+zQWGsj(sudeyO-6QM=TeO-1Vh)ZR9VW-UMAIDpop@4?O4v-?G z4o1+>46ZsAC;Ca5vHlk2Xq&hV1%Ov3g#ZXOv|Ljmk-@OYGk%NytRNk}41qYkUy-yB2y?RK7 zKA@fCGXw5$>CoynB!^kE8JVhi;S;7t5C`^gG?qaIEEVhXy7(f=CnXe6atCgsYgB0=FSmz*H z5w(amhZ@`sb}r5wdz>@=VkIKm45kwVvSyy&o_iFDz&8}564BsFc^##FFBVVS?P)PU z*a5xIUTSRzo7wsLdTcl#!PIG%hse^LvBa`ebDp?+OVq5ePjeFIO&&F#!H|eiT?=!5 zzG@Yt$3`Q4(7x_E)Of+d7ppZS>18SyZ_nz7aF7+MGwi%vpKL%$wkGgo{!?Gr6_d;w z$wnZa$|n6MS?2ziwvvk-+;KnhT6urB{OoSd{dqMq=k`!)WzeBhs^Qh;ZJz3QHbf`r z>LPEk^y(Z+JYzika65Jt%Io&^-@A6m{?DPo?!$xK>zu12B2BmGRlB)6a_yRNbL0dG zyk>XvVDdky+2D{0o1d`p{-KFuAy}o0I?qX@u@XomizX`;mP_bZ>Sl)=kyvjIMfGhU zpR`sUCib((>LvMupH+Dc8B?hz3~8}fUkTgzU*)xAMgtp}1 z=IGlrIL?GxsOI7(&!}IR$prAMUBLWG3#)K=9I8ol=VQ=S+8xm&TBw_bUe(QZ z&+J8e;gvCQ18W)$^*EFf490MCd9S+o%+;jlG@Z>GYm(7sDt5zP9BPgy%9){%9a>%8 zJhy#$8yXIS0XBpmm5w8au3Uda`k}0Ub^BsCB?n51NpmM6Vzlf}t>=G+me8@X!MTrD z@l0Y=B98vkCkCE=o+tFYj*{K9)qUhF-lVMRA)I~Hu*R)dZL`I=1LL8=yez95v66Sx z`o?>$U0L7quCg`GJh{LXdWKFndky;X_gU7_SG&)yj(Ju5?CMmyA>uR^9r1|9;Z@Tq z6^BU;$QiIvaytA66Jdezf}FJ&fm&~-+xWJKCg?qLx>vSP;Y)jfMPhI5e;6Gdw;cJW8+rRLikBX&Y2gD^^Mf*!_{keTE!sg~21iN9`S z-Tf4CtBehBIXuUnMpu|L^3bF_FD+GGkVk4m`GZhCFw&MiZEDYv;A>WSr7mivEgPg7 zJ4K?0@Lkf2k>)B}HoRBQ_7Y=oOJM4$4=~(dY6W7|E-EdmM~w=4K*w;1BW%2EBOJ^r zywF)e&s_Y6nTPPp{89gpo@+!#;{W-uhx2~rDPF8CZ>&1UGTMghFwS=5<^QmRISOsm y9F@fA2w+tEha3=fo$N*|!VGbPn45!pa-z!`Rjg>Vk!tC(x#~vGZd{yoz5fs7+H9c! literal 0 HcmV?d00001 diff --git a/ld/po/ld.pot b/ld/po/ld.pot index 7ab762b..ef25380 100644 --- a/ld/po/ld.pot +++ b/ld/po/ld.pot @@ -8,10 +8,11 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" -"POT-Creation-Date: 2010-11-05 10:29+0100\n" +"POT-Creation-Date: 2011-06-02 14:30+0100\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" +"Language: \n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=CHARSET\n" "Content-Transfer-Encoding: 8bit\n" @@ -32,200 +33,200 @@ msgstr "" msgid "Errors encountered processing file %s" msgstr "" -#: emultempl/armcoff.em:190 emultempl/pe.em:1812 +#: emultempl/armcoff.em:192 emultempl/pe.em:1813 msgid "%P: warning: '--thumb-entry %s' is overriding '-e %s'\n" msgstr "" -#: emultempl/armcoff.em:195 emultempl/pe.em:1817 +#: emultempl/armcoff.em:197 emultempl/pe.em:1818 msgid "%P: warning: cannot find thumb start symbol %s\n" msgstr "" -#: emultempl/pe.em:418 +#: emultempl/pe.em:419 #, c-format msgid "" " --base_file Generate a base file for relocatable " "DLLs\n" msgstr "" -#: emultempl/pe.em:419 +#: emultempl/pe.em:420 #, c-format msgid "" " --dll Set image base to the default for DLLs\n" msgstr "" -#: emultempl/pe.em:420 +#: emultempl/pe.em:421 #, c-format msgid " --file-alignment Set file alignment\n" msgstr "" -#: emultempl/pe.em:421 +#: emultempl/pe.em:422 #, c-format msgid " --heap Set initial size of the heap\n" msgstr "" -#: emultempl/pe.em:422 +#: emultempl/pe.em:423 #, c-format msgid "" " --image-base
Set start address of the executable\n" msgstr "" -#: emultempl/pe.em:423 +#: emultempl/pe.em:424 #, c-format msgid "" " --major-image-version Set version number of the executable\n" msgstr "" -#: emultempl/pe.em:424 +#: emultempl/pe.em:425 #, c-format msgid " --major-os-version Set minimum required OS version\n" msgstr "" -#: emultempl/pe.em:425 +#: emultempl/pe.em:426 #, c-format msgid "" " --major-subsystem-version Set minimum required OS subsystem " "version\n" msgstr "" -#: emultempl/pe.em:426 +#: emultempl/pe.em:427 #, c-format msgid "" " --minor-image-version Set revision number of the executable\n" msgstr "" -#: emultempl/pe.em:427 +#: emultempl/pe.em:428 #, c-format msgid " --minor-os-version Set minimum required OS revision\n" msgstr "" -#: emultempl/pe.em:428 +#: emultempl/pe.em:429 #, c-format msgid "" " --minor-subsystem-version Set minimum required OS subsystem " "revision\n" msgstr "" -#: emultempl/pe.em:429 +#: emultempl/pe.em:430 #, c-format msgid " --section-alignment Set section alignment\n" msgstr "" -#: emultempl/pe.em:430 +#: emultempl/pe.em:431 #, c-format msgid " --stack Set size of the initial stack\n" msgstr "" -#: emultempl/pe.em:431 +#: emultempl/pe.em:432 #, c-format msgid "" " --subsystem [:] Set required OS subsystem [& version]\n" msgstr "" -#: emultempl/pe.em:432 +#: emultempl/pe.em:433 #, c-format msgid "" " --support-old-code Support interworking with old code\n" msgstr "" -#: emultempl/pe.em:433 +#: emultempl/pe.em:434 #, c-format msgid "" " --[no-]leading-underscore Set explicit symbol underscore prefix " "mode\n" msgstr "" -#: emultempl/pe.em:434 +#: emultempl/pe.em:435 #, c-format msgid "" " --thumb-entry= Set the entry point to be Thumb " "\n" msgstr "" -#: emultempl/pe.em:436 +#: emultempl/pe.em:437 #, c-format msgid "" " --add-stdcall-alias Export symbols with and without @nn\n" msgstr "" -#: emultempl/pe.em:437 +#: emultempl/pe.em:438 #, c-format msgid " --disable-stdcall-fixup Don't link _sym to _sym@nn\n" msgstr "" -#: emultempl/pe.em:438 +#: emultempl/pe.em:439 #, c-format msgid "" " --enable-stdcall-fixup Link _sym to _sym@nn without warnings\n" msgstr "" -#: emultempl/pe.em:439 +#: emultempl/pe.em:440 #, c-format msgid "" " --exclude-symbols sym,sym,... Exclude symbols from automatic export\n" msgstr "" -#: emultempl/pe.em:440 +#: emultempl/pe.em:441 #, c-format msgid "" " --exclude-all-symbols Exclude all symbols from automatic " "export\n" msgstr "" -#: emultempl/pe.em:441 +#: emultempl/pe.em:442 #, c-format msgid "" " --exclude-libs lib,lib,... Exclude libraries from automatic " "export\n" msgstr "" -#: emultempl/pe.em:442 +#: emultempl/pe.em:443 #, c-format msgid " --exclude-modules-for-implib mod,mod,...\n" msgstr "" -#: emultempl/pe.em:443 +#: emultempl/pe.em:444 #, c-format msgid "" " Exclude objects, archive members from " "auto\n" msgstr "" -#: emultempl/pe.em:444 +#: emultempl/pe.em:445 #, c-format msgid "" " export, place into import library " "instead.\n" msgstr "" -#: emultempl/pe.em:445 +#: emultempl/pe.em:446 #, c-format msgid "" " --export-all-symbols Automatically export all globals to " "DLL\n" msgstr "" -#: emultempl/pe.em:446 +#: emultempl/pe.em:447 #, c-format msgid " --kill-at Remove @nn from exported symbols\n" msgstr "" -#: emultempl/pe.em:447 +#: emultempl/pe.em:448 #, c-format msgid " --out-implib Generate import library\n" msgstr "" -#: emultempl/pe.em:448 +#: emultempl/pe.em:449 #, c-format msgid "" " --output-def Generate a .DEF file for the built DLL\n" msgstr "" -#: emultempl/pe.em:449 +#: emultempl/pe.em:450 #, c-format msgid " --warn-duplicate-exports Warn about duplicate exports.\n" msgstr "" -#: emultempl/pe.em:450 +#: emultempl/pe.em:451 #, c-format msgid "" " --compat-implib Create backward compatible import " @@ -233,7 +234,7 @@ msgid "" " create __imp_ as well.\n" msgstr "" -#: emultempl/pe.em:452 +#: emultempl/pe.em:453 #, c-format msgid "" " --enable-auto-image-base Automatically choose image base for " @@ -241,14 +242,14 @@ msgid "" " unless user specifies one\n" msgstr "" -#: emultempl/pe.em:454 +#: emultempl/pe.em:455 #, c-format msgid "" " --disable-auto-image-base Do not auto-choose image base. " "(default)\n" msgstr "" -#: emultempl/pe.em:455 +#: emultempl/pe.em:456 #, c-format msgid "" " --dll-search-prefix= When linking dynamically to a dll " @@ -258,21 +259,21 @@ msgid "" " in preference to lib.dll \n" msgstr "" -#: emultempl/pe.em:458 +#: emultempl/pe.em:459 #, c-format msgid "" -" --enable-auto-import Do sophistcated linking of _sym to\n" +" --enable-auto-import Do sophisticated linking of _sym to\n" " __imp_sym for DATA references\n" msgstr "" -#: emultempl/pe.em:460 +#: emultempl/pe.em:461 #, c-format msgid "" " --disable-auto-import Do not auto-import DATA items from " "DLLs\n" msgstr "" -#: emultempl/pe.em:461 +#: emultempl/pe.em:462 #, c-format msgid "" " --enable-runtime-pseudo-reloc Work around auto-import limitations by\n" @@ -281,7 +282,7 @@ msgid "" " runtime.\n" msgstr "" -#: emultempl/pe.em:464 +#: emultempl/pe.em:465 #, c-format msgid "" " --disable-runtime-pseudo-reloc Do not add runtime pseudo-relocations " @@ -289,7 +290,7 @@ msgid "" " auto-imported DATA.\n" msgstr "" -#: emultempl/pe.em:466 +#: emultempl/pe.em:467 #, c-format msgid "" " --enable-extra-pe-debug Enable verbose debug output when " @@ -298,21 +299,21 @@ msgid "" "import)\n" msgstr "" -#: emultempl/pe.em:469 +#: emultempl/pe.em:470 #, c-format msgid "" " --large-address-aware Executable supports virtual addresses\n" " greater than 2 gigabytes\n" msgstr "" -#: emultempl/pe.em:471 +#: emultempl/pe.em:472 #, c-format msgid "" " --enable-long-section-names Use long COFF section names even in\n" " executable image files\n" msgstr "" -#: emultempl/pe.em:473 +#: emultempl/pe.em:474 #, c-format msgid "" " --disable-long-section-names Never use long COFF section names, " @@ -320,107 +321,106 @@ msgid "" " in object files\n" msgstr "" -#: emultempl/pe.em:475 +#: emultempl/pe.em:476 #, c-format msgid "" " --dynamicbase\t\t\t Image base address may be relocated using\n" "\t\t\t\t address space layout randomization (ASLR)\n" msgstr "" -#: emultempl/pe.em:477 +#: emultempl/pe.em:478 #, c-format msgid " --forceinteg\t\t Code integrity checks are enforced\n" msgstr "" -#: emultempl/pe.em:478 +#: emultempl/pe.em:479 #, c-format msgid " --nxcompat\t\t Image is compatible with data execution prevention\n" msgstr "" -#: emultempl/pe.em:479 +#: emultempl/pe.em:480 #, c-format msgid "" " --no-isolation\t\t Image understands isolation but do not isolate the " "image\n" msgstr "" -#: emultempl/pe.em:480 +#: emultempl/pe.em:481 #, c-format msgid "" " --no-seh\t\t\t Image does not use SEH. No SE handler may\n" "\t\t\t\t be called in this image\n" msgstr "" -#: emultempl/pe.em:482 +#: emultempl/pe.em:483 #, c-format msgid " --no-bind\t\t\t Do not bind this image\n" msgstr "" -#: emultempl/pe.em:483 +#: emultempl/pe.em:484 #, c-format msgid " --wdmdriver\t\t Driver uses the WDM model\n" msgstr "" -#: emultempl/pe.em:484 +#: emultempl/pe.em:485 #, c-format msgid " --tsaware Image is Terminal Server aware\n" msgstr "" -#: emultempl/pe.em:613 +#: emultempl/pe.em:614 msgid "%P: warning: bad version number in -subsystem option\n" msgstr "" -#: emultempl/pe.em:638 +#: emultempl/pe.em:639 msgid "%P%F: invalid subsystem type %s\n" msgstr "" -#: emultempl/pe.em:659 +#: emultempl/pe.em:660 msgid "%P%F: invalid hex number for PE parameter '%s'\n" msgstr "" -#: emultempl/pe.em:676 +#: emultempl/pe.em:677 msgid "%P%F: strange hex info for PE parameter '%s'\n" msgstr "" -#: emultempl/pe.em:693 -#, c-format -msgid "%s: Can't open base file %s\n" +#: emultempl/pe.em:692 +msgid "%F%P: cannot open base file %s\n" msgstr "" -#: emultempl/pe.em:969 +#: emultempl/pe.em:965 msgid "%P: warning, file alignment > section alignment.\n" msgstr "" -#: emultempl/pe.em:982 +#: emultempl/pe.em:978 msgid "" "%P: warning: --export-dynamic is not supported for PE targets, did you mean " "--export-all-symbols?\n" msgstr "" -#: emultempl/pe.em:1058 emultempl/pe.em:1085 +#: emultempl/pe.em:1054 emultempl/pe.em:1081 #, c-format msgid "Warning: resolving %s by linking to %s\n" msgstr "" -#: emultempl/pe.em:1063 emultempl/pe.em:1090 +#: emultempl/pe.em:1059 emultempl/pe.em:1086 msgid "Use --enable-stdcall-fixup to disable these warnings\n" msgstr "" -#: emultempl/pe.em:1064 emultempl/pe.em:1091 +#: emultempl/pe.em:1060 emultempl/pe.em:1087 msgid "Use --disable-stdcall-fixup to disable these fixups\n" msgstr "" -#: emultempl/pe.em:1110 +#: emultempl/pe.em:1106 #, c-format msgid "%C: Cannot get section contents - auto-import exception\n" msgstr "" -#: emultempl/pe.em:1150 +#: emultempl/pe.em:1146 #, c-format msgid "Info: resolving %s by linking to %s (auto-import)\n" msgstr "" -#: emultempl/pe.em:1157 +#: emultempl/pe.em:1153 msgid "" "%P: warning: auto-importing has been activated without --enable-auto-import " "specified on the command line.\n" @@ -428,28 +428,28 @@ msgid "" "symbols from auto-imported DLLs.\n" msgstr "" -#: emultempl/pe.em:1164 emultempl/pe.em:1369 emultempl/pe.em:1575 ldcref.c:490 -#: ldcref.c:588 ldmain.c:1183 ldmisc.c:286 pe-dll.c:705 pe-dll.c:1253 -#: pe-dll.c:1348 +#: emultempl/pe.em:1160 emultempl/pe.em:1367 emultempl/pe.em:1574 ldcref.c:490 +#: ldcref.c:588 ldmain.c:1215 ldmisc.c:290 pe-dll.c:706 pe-dll.c:1257 +#: pe-dll.c:1352 msgid "%B%F: could not read symbols: %E\n" msgstr "" -#: emultempl/pe.em:1245 +#: emultempl/pe.em:1243 msgid "%F%P: cannot perform PE operations on non PE output file '%B'.\n" msgstr "" -#: emultempl/pe.em:1616 +#: emultempl/pe.em:1617 #, c-format msgid "Errors encountered processing file %s\n" msgstr "" -#: emultempl/pe.em:1639 +#: emultempl/pe.em:1640 #, c-format msgid "Errors encountered processing file %s for interworking\n" msgstr "" -#: emultempl/pe.em:1701 ldexp.c:542 ldlang.c:3323 ldlang.c:3358 ldlang.c:6804 -#: ldlang.c:6835 ldmain.c:1128 +#: emultempl/pe.em:1702 ldexp.c:581 ldlang.c:3416 ldlang.c:6947 ldlang.c:6978 +#: ldmain.c:1160 msgid "%P%F: bfd_link_hash_lookup failed: %E\n" msgstr "" @@ -491,7 +491,7 @@ msgstr "" msgid "%P: symbol `%T' missing from main hash table\n" msgstr "" -#: ldcref.c:650 ldcref.c:657 ldmain.c:1217 ldmain.c:1224 +#: ldcref.c:650 ldcref.c:657 ldmain.c:1249 ldmain.c:1256 msgid "%B%F: could not read relocs: %E\n" msgstr "" @@ -549,162 +549,158 @@ msgstr "" msgid " no emulation specific options.\n" msgstr "" -#: ldexp.c:313 +#: ldexp.c:314 msgid "%P: warning: address of `%s' isn't multiple of maximum page size\n" msgstr "" -#: ldexp.c:351 +#: ldexp.c:407 #, c-format msgid "%F%S %% by zero\n" msgstr "" -#: ldexp.c:359 +#: ldexp.c:417 #, c-format msgid "%F%S / by zero\n" msgstr "" -#: ldexp.c:552 +#: ldexp.c:591 #, c-format msgid "%X%S: unresolvable symbol `%s' referenced in expression\n" msgstr "" -#: ldexp.c:564 +#: ldexp.c:605 #, c-format msgid "%F%S: undefined symbol `%s' referenced in expression\n" msgstr "" -#: ldexp.c:585 ldexp.c:602 ldexp.c:629 +#: ldexp.c:626 ldexp.c:643 ldexp.c:670 #, c-format msgid "%F%S: undefined section `%s' referenced in expression\n" msgstr "" -#: ldexp.c:656 ldexp.c:670 +#: ldexp.c:697 ldexp.c:711 #, c-format msgid "%F%S: undefined MEMORY region `%s' referenced in expression\n" msgstr "" -#: ldexp.c:681 +#: ldexp.c:722 #, c-format msgid "%F%S: unknown constant `%s' referenced in expression\n" msgstr "" -#: ldexp.c:743 +#: ldexp.c:787 #, c-format msgid "%F%S can not PROVIDE assignment to location counter\n" msgstr "" -#: ldexp.c:757 +#: ldexp.c:805 #, c-format msgid "%F%S invalid assignment to location counter\n" msgstr "" -#: ldexp.c:760 +#: ldexp.c:808 #, c-format msgid "%F%S assignment to location counter invalid outside of SECTION\n" msgstr "" -#: ldexp.c:773 +#: ldexp.c:821 msgid "%F%S cannot move location counter backwards (from %V to %V)\n" msgstr "" -#: ldexp.c:812 +#: ldexp.c:882 msgid "%P%F:%s: hash creation failed\n" msgstr "" -#: ldexp.c:1119 ldexp.c:1144 ldexp.c:1204 +#: ldexp.c:1191 ldexp.c:1216 ldexp.c:1276 #, c-format msgid "%F%S: nonconstant expression for %s\n" msgstr "" -#: ldfile.c:141 +#: ldfile.c:142 #, c-format msgid "attempt to open %s failed\n" msgstr "" -#: ldfile.c:143 +#: ldfile.c:144 #, c-format msgid "attempt to open %s succeeded\n" msgstr "" -#: ldfile.c:149 +#: ldfile.c:150 msgid "%F%P: invalid BFD target `%s'\n" msgstr "" -#: ldfile.c:266 ldfile.c:295 +#: ldfile.c:267 ldfile.c:296 msgid "%P: skipping incompatible %s when searching for %s\n" msgstr "" -#: ldfile.c:279 +#: ldfile.c:280 msgid "%F%P: attempted static link of dynamic object `%s'\n" msgstr "" -#: ldfile.c:332 ldmain.c:832 -msgid "%P%F: %s: plugin reported error claiming file\n" -msgstr "" - -#: ldfile.c:447 +#: ldfile.c:426 msgid "%P: cannot find %s (%s): %E\n" msgstr "" -#: ldfile.c:450 +#: ldfile.c:429 msgid "%P: cannot find %s: %E\n" msgstr "" -#: ldfile.c:485 +#: ldfile.c:464 msgid "%P: cannot find %s inside %s\n" msgstr "" -#: ldfile.c:488 +#: ldfile.c:467 msgid "%P: cannot find %s\n" msgstr "" -#: ldfile.c:507 ldfile.c:525 +#: ldfile.c:486 ldfile.c:504 #, c-format msgid "cannot find script file %s\n" msgstr "" -#: ldfile.c:509 ldfile.c:527 +#: ldfile.c:488 ldfile.c:506 #, c-format msgid "opened script file %s\n" msgstr "" -#: ldfile.c:657 +#: ldfile.c:636 msgid "%P%F: cannot open linker script file %s: %E\n" msgstr "" -#: ldfile.c:722 +#: ldfile.c:701 msgid "%P%F: cannot represent machine `%s'\n" msgstr "" -#: ldlang.c:1160 ldlang.c:1202 ldlang.c:3048 +#: ldlang.c:1217 ldlang.c:1259 ldlang.c:3114 msgid "%P%F: can not create hash table: %E\n" msgstr "" -#: ldlang.c:1253 +#: ldlang.c:1310 msgid "%P:%S: warning: redeclaration of memory region `%s'\n" msgstr "" -#: ldlang.c:1259 +#: ldlang.c:1316 msgid "%P:%S: warning: memory region `%s' not declared\n" msgstr "" -#: ldlang.c:1293 +#: ldlang.c:1350 msgid "%F%P:%S: error: alias for default memory region\n" msgstr "" -#: ldlang.c:1304 +#: ldlang.c:1361 msgid "%F%P:%S: error: redefinition of memory region alias `%s'\n" msgstr "" -#: ldlang.c:1311 +#: ldlang.c:1368 msgid "%F%P:%S: error: memory region `%s' for alias `%s' does not exist\n" msgstr "" -#: ldlang.c:1363 ldlang.c:1402 +#: ldlang.c:1420 ldlang.c:1459 msgid "%P%F: failed creating section `%s': %E\n" msgstr "" -#: ldlang.c:1958 +#: ldlang.c:2021 #, c-format msgid "" "\n" @@ -712,30 +708,30 @@ msgid "" "\n" msgstr "" -#: ldlang.c:1966 +#: ldlang.c:2029 msgid "" "\n" "Memory Configuration\n" "\n" msgstr "" -#: ldlang.c:1968 +#: ldlang.c:2031 msgid "Name" msgstr "" -#: ldlang.c:1968 +#: ldlang.c:2031 msgid "Origin" msgstr "" -#: ldlang.c:1968 +#: ldlang.c:2031 msgid "Length" msgstr "" -#: ldlang.c:1968 +#: ldlang.c:2031 msgid "Attributes" msgstr "" -#: ldlang.c:2008 +#: ldlang.c:2071 #, c-format msgid "" "\n" @@ -743,258 +739,262 @@ msgid "" "\n" msgstr "" -#: ldlang.c:2074 +#: ldlang.c:2140 msgid "%P%F: Illegal use of `%s' section\n" msgstr "" -#: ldlang.c:2083 +#: ldlang.c:2149 msgid "%P%F: output format %s cannot represent section called %s\n" msgstr "" -#: ldlang.c:2636 +#: ldlang.c:2702 msgid "%B: file not recognized: %E\n" msgstr "" -#: ldlang.c:2637 +#: ldlang.c:2703 msgid "%B: matching formats:" msgstr "" -#: ldlang.c:2644 +#: ldlang.c:2710 msgid "%F%B: file not recognized: %E\n" msgstr "" -#: ldlang.c:2715 +#: ldlang.c:2781 msgid "%F%B: member %B in archive is not an object\n" msgstr "" -#: ldlang.c:2730 ldlang.c:2744 +#: ldlang.c:2796 ldlang.c:2810 msgid "%F%B: could not read symbols: %E\n" msgstr "" -#: ldlang.c:3018 +#: ldlang.c:3084 msgid "" "%P: warning: could not find any targets that match endianness requirement\n" msgstr "" -#: ldlang.c:3032 +#: ldlang.c:3098 msgid "%P%F: target %s not found\n" msgstr "" -#: ldlang.c:3034 +#: ldlang.c:3100 msgid "%P%F: cannot open output file %s: %E\n" msgstr "" -#: ldlang.c:3040 +#: ldlang.c:3106 msgid "%P%F:%s: can not make object file: %E\n" msgstr "" -#: ldlang.c:3044 +#: ldlang.c:3110 msgid "%P%F:%s: can not set architecture: %E\n" msgstr "" -#: ldlang.c:3185 +#: ldlang.c:3267 msgid "%P: warning: %s contains output sections; did you forget -T?\n" msgstr "" -#: ldlang.c:3215 +#: ldlang.c:3308 msgid "%P%F: bfd_hash_lookup failed creating symbol %s\n" msgstr "" -#: ldlang.c:3233 +#: ldlang.c:3326 msgid "%P%F: bfd_hash_allocate failed creating symbol %s\n" msgstr "" -#: ldlang.c:3688 +#: ldlang.c:3722 msgid "%F%P: %s not found for insert\n" msgstr "" -#: ldlang.c:3903 +#: ldlang.c:3937 msgid " load address 0x%V" msgstr "" -#: ldlang.c:4179 +#: ldlang.c:4212 msgid "%W (size before relaxing)\n" msgstr "" -#: ldlang.c:4270 +#: ldlang.c:4303 #, c-format msgid "Address of section %s set to " msgstr "" -#: ldlang.c:4423 +#: ldlang.c:4456 #, c-format msgid "Fail with %d\n" msgstr "" -#: ldlang.c:4710 +#: ldlang.c:4743 msgid "" "%X%P: section %s loaded at [%V,%V] overlaps section %s loaded at [%V,%V]\n" msgstr "" -#: ldlang.c:4726 +#: ldlang.c:4759 msgid "%X%P: region `%s' overflowed by %ld bytes\n" msgstr "" -#: ldlang.c:4749 +#: ldlang.c:4782 msgid "%X%P: address 0x%v of %B section `%s' is not within region `%s'\n" msgstr "" -#: ldlang.c:4760 +#: ldlang.c:4793 msgid "%X%P: %B section `%s' will not fit in region `%s'\n" msgstr "" -#: ldlang.c:4816 +#: ldlang.c:4850 #, c-format msgid "" "%F%S: non constant or forward reference address expression for section %s\n" msgstr "" -#: ldlang.c:4841 +#: ldlang.c:4875 msgid "%P%X: Internal error on COFF shared library section %s\n" msgstr "" -#: ldlang.c:4900 +#: ldlang.c:4932 msgid "%P%F: error: no memory region specified for loadable section `%s'\n" msgstr "" -#: ldlang.c:4905 +#: ldlang.c:4937 msgid "%P: warning: no memory region specified for loadable section `%s'\n" msgstr "" -#: ldlang.c:4927 +#: ldlang.c:4959 msgid "%P: warning: changing start of section %s by %lu bytes\n" msgstr "" -#: ldlang.c:5004 +#: ldlang.c:5036 msgid "%P: warning: dot moved backwards before `%s'\n" msgstr "" -#: ldlang.c:5170 +#: ldlang.c:5202 msgid "%P%F: can't relax section: %E\n" msgstr "" -#: ldlang.c:5497 +#: ldlang.c:5531 msgid "%F%P: invalid data statement\n" msgstr "" -#: ldlang.c:5530 +#: ldlang.c:5564 msgid "%F%P: invalid reloc statement\n" msgstr "" -#: ldlang.c:5648 +#: ldlang.c:5683 msgid "%P%F: gc-sections requires either an entry or an undefined symbol\n" msgstr "" -#: ldlang.c:5673 +#: ldlang.c:5708 msgid "%P%F:%s: can't set start address\n" msgstr "" -#: ldlang.c:5686 ldlang.c:5705 +#: ldlang.c:5721 ldlang.c:5740 msgid "%P%F: can't set start address\n" msgstr "" -#: ldlang.c:5698 +#: ldlang.c:5733 msgid "%P: warning: cannot find entry symbol %s; defaulting to %V\n" msgstr "" -#: ldlang.c:5710 +#: ldlang.c:5745 msgid "%P: warning: cannot find entry symbol %s; not setting start address\n" msgstr "" -#: ldlang.c:5760 +#: ldlang.c:5800 msgid "" "%P%F: Relocatable linking with relocations from format %s (%B) to format %s " "(%B) is not supported\n" msgstr "" -#: ldlang.c:5770 +#: ldlang.c:5810 msgid "" "%P%X: %s architecture of input file `%B' is incompatible with %s output\n" msgstr "" -#: ldlang.c:5792 +#: ldlang.c:5832 msgid "%P%X: failed to merge target specific data of file %B\n" msgstr "" -#: ldlang.c:5863 +#: ldlang.c:5903 msgid "%P%F: Could not define common symbol `%T': %E\n" msgstr "" -#: ldlang.c:5875 +#: ldlang.c:5915 msgid "" "\n" "Allocating common symbols\n" msgstr "" -#: ldlang.c:5876 +#: ldlang.c:5916 msgid "" "Common symbol size file\n" "\n" msgstr "" -#: ldlang.c:6022 +#: ldlang.c:6062 msgid "%P%F: invalid syntax in flags\n" msgstr "" -#: ldlang.c:6415 +#: ldlang.c:6524 msgid "%P%F: Failed to create hash table\n" msgstr "" -#: ldlang.c:6430 +#: ldlang.c:6547 msgid "%P%F: %s: plugin reported error after all symbols read\n" msgstr "" -#: ldlang.c:6717 +#: ldlang.c:6860 msgid "%P%F: multiple STARTUP files\n" msgstr "" -#: ldlang.c:6765 +#: ldlang.c:6906 msgid "%X%P:%S: section has both a load address and a load region\n" msgstr "" -#: ldlang.c:6950 +#: ldlang.c:7093 msgid "" "%X%P:%S: PHDRS and FILEHDR are not supported when prior PT_LOAD headers lack " "them\n" msgstr "" -#: ldlang.c:7022 +#: ldlang.c:7165 msgid "%F%P: no sections assigned to phdrs\n" msgstr "" -#: ldlang.c:7060 +#: ldlang.c:7203 msgid "%F%P: bfd_record_phdr failed: %E\n" msgstr "" -#: ldlang.c:7080 +#: ldlang.c:7223 msgid "%X%P: section `%s' assigned to non-existent phdr `%s'\n" msgstr "" -#: ldlang.c:7481 +#: ldlang.c:7636 msgid "%X%P: unknown language `%s' in version information\n" msgstr "" -#: ldlang.c:7626 +#: ldlang.c:7781 msgid "" "%X%P: anonymous version tag cannot be combined with other version tags\n" msgstr "" -#: ldlang.c:7635 +#: ldlang.c:7790 msgid "%X%P: duplicate version tag `%s'\n" msgstr "" -#: ldlang.c:7656 ldlang.c:7665 ldlang.c:7683 ldlang.c:7693 +#: ldlang.c:7811 ldlang.c:7820 ldlang.c:7838 ldlang.c:7848 msgid "%X%P: duplicate expression `%s' in version information\n" msgstr "" -#: ldlang.c:7733 +#: ldlang.c:7888 msgid "%X%P: unable to find version dependency `%s'\n" msgstr "" -#: ldlang.c:7756 +#: ldlang.c:7911 msgid "%X%P: unable to read .exports section contents\n" msgstr "" +#: ldlang.c:8035 +msgid "%X%P: unknown feature `%s'\n" +msgstr "" + #: ldmain.c:239 msgid "%X%P: can't set BFD default target to `%s': %E\n" msgstr "" @@ -1031,235 +1031,230 @@ msgstr "" msgid "%P%F: cannot open map file %s: %E\n" msgstr "" -#: ldmain.c:485 -msgid "%P: %s: error in plugin cleanup (ignored)\n" -msgstr "" - -#: ldmain.c:494 +#: ldmain.c:488 msgid "%P: link errors found, deleting executable `%s'\n" msgstr "" -#: ldmain.c:503 +#: ldmain.c:497 msgid "%F%B: final close failed: %E\n" msgstr "" -#: ldmain.c:529 +#: ldmain.c:523 msgid "%X%P: unable to open for source of copy `%s'\n" msgstr "" -#: ldmain.c:532 +#: ldmain.c:526 msgid "%X%P: unable to open for destination of copy `%s'\n" msgstr "" -#: ldmain.c:539 +#: ldmain.c:533 msgid "%P: Error writing file `%s'\n" msgstr "" -#: ldmain.c:544 pe-dll.c:1729 +#: ldmain.c:538 pe-dll.c:1733 #, c-format msgid "%P: Error closing file `%s'\n" msgstr "" -#: ldmain.c:560 +#: ldmain.c:555 #, c-format msgid "%s: total time in link: %ld.%06ld\n" msgstr "" -#: ldmain.c:563 +#: ldmain.c:558 #, c-format msgid "%s: data size %ld\n" msgstr "" -#: ldmain.c:646 +#: ldmain.c:642 msgid "%P%F: missing argument to -m\n" msgstr "" -#: ldmain.c:694 ldmain.c:714 ldmain.c:746 plugin.c:772 +#: ldmain.c:690 ldmain.c:710 ldmain.c:742 msgid "%P%F: bfd_hash_table_init failed: %E\n" msgstr "" -#: ldmain.c:698 ldmain.c:718 +#: ldmain.c:694 ldmain.c:714 msgid "%P%F: bfd_hash_lookup failed: %E\n" msgstr "" -#: ldmain.c:732 +#: ldmain.c:728 msgid "%X%P: error: duplicate retain-symbols-file\n" msgstr "" -#: ldmain.c:776 +#: ldmain.c:772 msgid "%P%F: bfd_hash_lookup for insertion failed: %E\n" msgstr "" -#: ldmain.c:781 +#: ldmain.c:777 msgid "%P: `-retain-symbols-file' overrides `-s' and `-S'\n" msgstr "" -#: ldmain.c:895 +#: ldmain.c:877 #, c-format msgid "" "Archive member included because of file (symbol)\n" "\n" msgstr "" -#: ldmain.c:975 +#: ldmain.c:983 msgid "%X%C: multiple definition of `%T'\n" msgstr "" -#: ldmain.c:978 +#: ldmain.c:986 msgid "%D: first defined here\n" msgstr "" -#: ldmain.c:982 +#: ldmain.c:990 msgid "%P: Disabling relaxation: it will not work with multiple definitions\n" msgstr "" -#: ldmain.c:1012 +#: ldmain.c:1044 msgid "%B: warning: definition of `%T' overriding common\n" msgstr "" -#: ldmain.c:1015 +#: ldmain.c:1047 msgid "%B: warning: common is here\n" msgstr "" -#: ldmain.c:1022 +#: ldmain.c:1054 msgid "%B: warning: common of `%T' overridden by definition\n" msgstr "" -#: ldmain.c:1025 +#: ldmain.c:1057 msgid "%B: warning: defined here\n" msgstr "" -#: ldmain.c:1032 +#: ldmain.c:1064 msgid "%B: warning: common of `%T' overridden by larger common\n" msgstr "" -#: ldmain.c:1035 +#: ldmain.c:1067 msgid "%B: warning: larger common is here\n" msgstr "" -#: ldmain.c:1039 +#: ldmain.c:1071 msgid "%B: warning: common of `%T' overriding smaller common\n" msgstr "" -#: ldmain.c:1042 +#: ldmain.c:1074 msgid "%B: warning: smaller common is here\n" msgstr "" -#: ldmain.c:1046 +#: ldmain.c:1078 msgid "%B: warning: multiple common of `%T'\n" msgstr "" -#: ldmain.c:1048 +#: ldmain.c:1080 msgid "%B: warning: previous common is here\n" msgstr "" -#: ldmain.c:1068 ldmain.c:1106 +#: ldmain.c:1100 ldmain.c:1138 msgid "%P: warning: global constructor %s used\n" msgstr "" -#: ldmain.c:1116 +#: ldmain.c:1148 msgid "%P%F: BFD backend error: BFD_RELOC_CTOR unsupported\n" msgstr "" #. We found a reloc for the symbol we are looking for. -#: ldmain.c:1170 ldmain.c:1172 ldmain.c:1174 ldmain.c:1192 ldmain.c:1237 +#: ldmain.c:1202 ldmain.c:1204 ldmain.c:1206 ldmain.c:1224 ldmain.c:1269 msgid "warning: " msgstr "" -#: ldmain.c:1273 +#: ldmain.c:1305 msgid "%F%P: bfd_hash_table_init failed: %E\n" msgstr "" -#: ldmain.c:1280 +#: ldmain.c:1312 msgid "%F%P: bfd_hash_lookup failed: %E\n" msgstr "" -#: ldmain.c:1301 +#: ldmain.c:1333 msgid "%X%C: undefined reference to `%T'\n" msgstr "" -#: ldmain.c:1304 +#: ldmain.c:1336 msgid "%C: warning: undefined reference to `%T'\n" msgstr "" -#: ldmain.c:1310 +#: ldmain.c:1342 msgid "%X%D: more undefined references to `%T' follow\n" msgstr "" -#: ldmain.c:1313 +#: ldmain.c:1345 msgid "%D: warning: more undefined references to `%T' follow\n" msgstr "" -#: ldmain.c:1324 +#: ldmain.c:1356 msgid "%X%B: undefined reference to `%T'\n" msgstr "" -#: ldmain.c:1327 +#: ldmain.c:1359 msgid "%B: warning: undefined reference to `%T'\n" msgstr "" -#: ldmain.c:1333 +#: ldmain.c:1365 msgid "%X%B: more undefined references to `%T' follow\n" msgstr "" -#: ldmain.c:1336 +#: ldmain.c:1368 msgid "%B: warning: more undefined references to `%T' follow\n" msgstr "" -#: ldmain.c:1375 +#: ldmain.c:1407 msgid " additional relocation overflows omitted from the output\n" msgstr "" -#: ldmain.c:1388 +#: ldmain.c:1420 msgid " relocation truncated to fit: %s against undefined symbol `%T'" msgstr "" -#: ldmain.c:1393 +#: ldmain.c:1425 msgid "" " relocation truncated to fit: %s against symbol `%T' defined in %A section " "in %B" msgstr "" -#: ldmain.c:1405 +#: ldmain.c:1437 msgid " relocation truncated to fit: %s against `%T'" msgstr "" -#: ldmain.c:1422 -#, c-format -msgid "%X%C: dangerous relocation: %s\n" +#: ldmain.c:1454 +msgid "%X%H: dangerous relocation: %s\n" msgstr "" -#: ldmain.c:1437 -msgid "%X%C: reloc refers to symbol `%T' which is not being output\n" +#: ldmain.c:1469 +msgid "%X%H: reloc refers to symbol `%T' which is not being output\n" msgstr "" -#: ldmisc.c:149 +#: ldmisc.c:151 #, c-format msgid "no symbol" msgstr "" -#: ldmisc.c:246 +#: ldmisc.c:248 #, c-format msgid "built in linker script:%u" msgstr "" -#: ldmisc.c:324 +#: ldmisc.c:329 msgid "%B: In function `%T':\n" msgstr "" -#: ldmisc.c:451 +#: ldmisc.c:464 msgid "%F%P: internal error %s %d\n" msgstr "" -#: ldmisc.c:500 +#: ldmisc.c:513 msgid "%P: internal error: aborting at %s line %d in %s\n" msgstr "" -#: ldmisc.c:503 +#: ldmisc.c:516 msgid "%P: internal error: aborting at %s line %d\n" msgstr "" -#: ldmisc.c:505 +#: ldmisc.c:518 msgid "%P%F: please report this bug\n" msgstr "" @@ -1271,7 +1266,7 @@ msgstr "" #: ldver.c:43 #, c-format -msgid "Copyright 2010 Free Software Foundation, Inc.\n" +msgid "Copyright 2011 Free Software Foundation, Inc.\n" msgstr "" #: ldver.c:44 @@ -1309,7 +1304,7 @@ msgstr "" msgid "%F%P: final link failed: %E\n" msgstr "" -#: lexsup.c:219 lexsup.c:368 +#: lexsup.c:219 lexsup.c:373 msgid "KEYWORD" msgstr "" @@ -1325,7 +1320,7 @@ msgstr "" msgid "Set architecture" msgstr "" -#: lexsup.c:224 lexsup.c:487 +#: lexsup.c:224 lexsup.c:492 msgid "TARGET" msgstr "" @@ -1333,8 +1328,8 @@ msgstr "" msgid "Specify target for following input files" msgstr "" -#: lexsup.c:227 lexsup.c:278 lexsup.c:296 lexsup.c:309 lexsup.c:311 -#: lexsup.c:441 lexsup.c:501 lexsup.c:563 lexsup.c:576 +#: lexsup.c:227 lexsup.c:278 lexsup.c:302 lexsup.c:315 lexsup.c:317 +#: lexsup.c:446 lexsup.c:506 lexsup.c:569 lexsup.c:582 msgid "FILE" msgstr "" @@ -1346,7 +1341,7 @@ msgstr "" msgid "Force common symbols to be defined" msgstr "" -#: lexsup.c:233 lexsup.c:545 lexsup.c:547 lexsup.c:549 lexsup.c:551 +#: lexsup.c:233 lexsup.c:550 lexsup.c:552 lexsup.c:554 lexsup.c:556 msgid "ADDRESS" msgstr "" @@ -1478,416 +1473,420 @@ msgstr "" msgid "Send arg to last-loaded plugin" msgstr "" -#: lexsup.c:288 +#: lexsup.c:287 lexsup.c:290 +msgid "Ignored for GCC LTO option compatibility" +msgstr "" + +#: lexsup.c:294 msgid "Ignored for SVR4 compatibility" msgstr "" -#: lexsup.c:292 +#: lexsup.c:298 msgid "Generate relocatable output" msgstr "" -#: lexsup.c:296 +#: lexsup.c:302 msgid "Just link symbols (if directory, same as --rpath)" msgstr "" -#: lexsup.c:299 +#: lexsup.c:305 msgid "Strip all symbols" msgstr "" -#: lexsup.c:301 +#: lexsup.c:307 msgid "Strip debugging symbols" msgstr "" -#: lexsup.c:303 +#: lexsup.c:309 msgid "Strip symbols in discarded sections" msgstr "" -#: lexsup.c:305 +#: lexsup.c:311 msgid "Do not strip symbols in discarded sections" msgstr "" -#: lexsup.c:307 +#: lexsup.c:313 msgid "Trace file opens" msgstr "" -#: lexsup.c:309 +#: lexsup.c:315 msgid "Read linker script" msgstr "" -#: lexsup.c:311 +#: lexsup.c:317 msgid "Read default linker script" msgstr "" -#: lexsup.c:315 lexsup.c:333 lexsup.c:418 lexsup.c:439 lexsup.c:538 -#: lexsup.c:566 lexsup.c:605 +#: lexsup.c:321 lexsup.c:339 lexsup.c:423 lexsup.c:444 lexsup.c:543 +#: lexsup.c:572 lexsup.c:611 msgid "SYMBOL" msgstr "" -#: lexsup.c:315 +#: lexsup.c:321 msgid "Start with undefined reference to SYMBOL" msgstr "" -#: lexsup.c:318 +#: lexsup.c:324 msgid "[=SECTION]" msgstr "" -#: lexsup.c:319 +#: lexsup.c:325 msgid "Don't merge input [SECTION | orphan] sections" msgstr "" -#: lexsup.c:321 +#: lexsup.c:327 msgid "Build global constructor/destructor tables" msgstr "" -#: lexsup.c:323 +#: lexsup.c:329 msgid "Print version information" msgstr "" -#: lexsup.c:325 +#: lexsup.c:331 msgid "Print version and emulation information" msgstr "" -#: lexsup.c:327 +#: lexsup.c:333 msgid "Discard all local symbols" msgstr "" -#: lexsup.c:329 +#: lexsup.c:335 msgid "Discard temporary local symbols (default)" msgstr "" -#: lexsup.c:331 +#: lexsup.c:337 msgid "Don't discard any local symbols" msgstr "" -#: lexsup.c:333 +#: lexsup.c:339 msgid "Trace mentions of SYMBOL" msgstr "" -#: lexsup.c:335 lexsup.c:503 lexsup.c:505 +#: lexsup.c:341 lexsup.c:508 lexsup.c:510 msgid "PATH" msgstr "" -#: lexsup.c:335 +#: lexsup.c:341 msgid "Default search path for Solaris compatibility" msgstr "" -#: lexsup.c:338 +#: lexsup.c:344 msgid "Start a group" msgstr "" -#: lexsup.c:340 +#: lexsup.c:346 msgid "End a group" msgstr "" -#: lexsup.c:344 +#: lexsup.c:350 msgid "Accept input files whose architecture cannot be determined" msgstr "" -#: lexsup.c:348 +#: lexsup.c:354 msgid "Reject input files whose architecture is unknown" msgstr "" -#: lexsup.c:361 +#: lexsup.c:366 msgid "Only set DT_NEEDED for following dynamic libs if used" msgstr "" -#: lexsup.c:364 +#: lexsup.c:369 msgid "" "Always set DT_NEEDED for dynamic libraries mentioned on\n" " the command line" msgstr "" -#: lexsup.c:368 +#: lexsup.c:373 msgid "Ignored for SunOS compatibility" msgstr "" -#: lexsup.c:370 +#: lexsup.c:375 msgid "Link against shared libraries" msgstr "" -#: lexsup.c:376 +#: lexsup.c:381 msgid "Do not link against shared libraries" msgstr "" -#: lexsup.c:384 +#: lexsup.c:389 msgid "Bind global references locally" msgstr "" -#: lexsup.c:386 +#: lexsup.c:391 msgid "Bind global function references locally" msgstr "" -#: lexsup.c:388 +#: lexsup.c:393 msgid "Check section addresses for overlaps (default)" msgstr "" -#: lexsup.c:391 +#: lexsup.c:396 msgid "Do not check section addresses for overlaps" msgstr "" -#: lexsup.c:395 +#: lexsup.c:400 msgid "Copy DT_NEEDED links mentioned inside DSOs that follow" msgstr "" -#: lexsup.c:399 +#: lexsup.c:404 msgid "Do not copy DT_NEEDED links mentioned inside DSOs that follow" msgstr "" -#: lexsup.c:403 +#: lexsup.c:408 msgid "Output cross reference table" msgstr "" -#: lexsup.c:405 +#: lexsup.c:410 msgid "SYMBOL=EXPRESSION" msgstr "" -#: lexsup.c:405 +#: lexsup.c:410 msgid "Define a symbol" msgstr "" -#: lexsup.c:407 +#: lexsup.c:412 msgid "[=STYLE]" msgstr "" -#: lexsup.c:407 +#: lexsup.c:412 msgid "Demangle symbol names [using STYLE]" msgstr "" -#: lexsup.c:410 +#: lexsup.c:415 msgid "Generate embedded relocs" msgstr "" -#: lexsup.c:412 +#: lexsup.c:417 msgid "Treat warnings as errors" msgstr "" -#: lexsup.c:415 +#: lexsup.c:420 msgid "Do not treat warnings as errors (default)" msgstr "" -#: lexsup.c:418 +#: lexsup.c:423 msgid "Call SYMBOL at unload-time" msgstr "" -#: lexsup.c:420 +#: lexsup.c:425 msgid "Force generation of file with .exe suffix" msgstr "" -#: lexsup.c:422 +#: lexsup.c:427 msgid "Remove unused sections (on some targets)" msgstr "" -#: lexsup.c:425 +#: lexsup.c:430 msgid "Don't remove unused sections (default)" msgstr "" -#: lexsup.c:428 +#: lexsup.c:433 msgid "List removed unused sections on stderr" msgstr "" -#: lexsup.c:431 +#: lexsup.c:436 msgid "Do not list removed unused sections" msgstr "" -#: lexsup.c:434 +#: lexsup.c:439 msgid "Set default hash table size close to " msgstr "" -#: lexsup.c:437 +#: lexsup.c:442 msgid "Print option help" msgstr "" -#: lexsup.c:439 +#: lexsup.c:444 msgid "Call SYMBOL at load-time" msgstr "" -#: lexsup.c:441 +#: lexsup.c:446 msgid "Write a map file" msgstr "" -#: lexsup.c:443 +#: lexsup.c:448 msgid "Do not define Common storage" msgstr "" -#: lexsup.c:445 +#: lexsup.c:450 msgid "Do not demangle symbol names" msgstr "" -#: lexsup.c:447 +#: lexsup.c:452 msgid "Use less memory and more disk I/O" msgstr "" -#: lexsup.c:449 +#: lexsup.c:454 msgid "Do not allow unresolved references in object files" msgstr "" -#: lexsup.c:452 -msgid "Allow unresolved references in shared libaries" +#: lexsup.c:457 +msgid "Allow unresolved references in shared libraries" msgstr "" -#: lexsup.c:456 +#: lexsup.c:461 msgid "Do not allow unresolved references in shared libs" msgstr "" -#: lexsup.c:460 +#: lexsup.c:465 msgid "Allow multiple definitions" msgstr "" -#: lexsup.c:462 +#: lexsup.c:467 msgid "Disallow undefined version" msgstr "" -#: lexsup.c:464 +#: lexsup.c:469 msgid "Create default symbol version" msgstr "" -#: lexsup.c:467 +#: lexsup.c:472 msgid "Create default symbol version for imported symbols" msgstr "" -#: lexsup.c:470 +#: lexsup.c:475 msgid "Don't warn about mismatched input files" msgstr "" -#: lexsup.c:473 +#: lexsup.c:478 msgid "Don't warn on finding an incompatible library" msgstr "" -#: lexsup.c:476 +#: lexsup.c:481 msgid "Turn off --whole-archive" msgstr "" -#: lexsup.c:478 +#: lexsup.c:483 msgid "Create an output file even if errors occur" msgstr "" -#: lexsup.c:483 +#: lexsup.c:488 msgid "" "Only use library directories specified on\n" " the command line" msgstr "" -#: lexsup.c:487 +#: lexsup.c:492 msgid "Specify target of output file" msgstr "" -#: lexsup.c:490 +#: lexsup.c:495 msgid "Ignored for Linux compatibility" msgstr "" -#: lexsup.c:493 +#: lexsup.c:498 msgid "Reduce memory overheads, possibly taking much longer" msgstr "" -#: lexsup.c:496 +#: lexsup.c:501 msgid "Reduce code size by using target specific optimizations" msgstr "" -#: lexsup.c:498 +#: lexsup.c:503 msgid "Do not use relaxation techniques to reduce code size" msgstr "" -#: lexsup.c:501 +#: lexsup.c:506 msgid "Keep only symbols listed in FILE" msgstr "" -#: lexsup.c:503 +#: lexsup.c:508 msgid "Set runtime shared library search path" msgstr "" -#: lexsup.c:505 +#: lexsup.c:510 msgid "Set link time shared library search path" msgstr "" -#: lexsup.c:508 +#: lexsup.c:513 msgid "Create a shared library" msgstr "" -#: lexsup.c:512 +#: lexsup.c:517 msgid "Create a position independent executable" msgstr "" -#: lexsup.c:516 +#: lexsup.c:521 msgid "[=ascending|descending]" msgstr "" -#: lexsup.c:517 +#: lexsup.c:522 msgid "Sort common symbols by alignment [in specified order]" msgstr "" -#: lexsup.c:522 +#: lexsup.c:527 msgid "name|alignment" msgstr "" -#: lexsup.c:523 +#: lexsup.c:528 msgid "Sort sections by name or maximum alignment" msgstr "" -#: lexsup.c:525 +#: lexsup.c:530 msgid "COUNT" msgstr "" -#: lexsup.c:525 +#: lexsup.c:530 msgid "How many tags to reserve in .dynamic section" msgstr "" -#: lexsup.c:528 +#: lexsup.c:533 msgid "[=SIZE]" msgstr "" -#: lexsup.c:528 +#: lexsup.c:533 msgid "Split output sections every SIZE octets" msgstr "" -#: lexsup.c:531 +#: lexsup.c:536 msgid "[=COUNT]" msgstr "" -#: lexsup.c:531 +#: lexsup.c:536 msgid "Split output sections every COUNT relocs" msgstr "" -#: lexsup.c:534 +#: lexsup.c:539 msgid "Print memory usage statistics" msgstr "" -#: lexsup.c:536 +#: lexsup.c:541 msgid "Display target specific options" msgstr "" -#: lexsup.c:538 +#: lexsup.c:543 msgid "Do task level linking" msgstr "" -#: lexsup.c:540 +#: lexsup.c:545 msgid "Use same format as native linker" msgstr "" -#: lexsup.c:542 +#: lexsup.c:547 msgid "SECTION=ADDRESS" msgstr "" -#: lexsup.c:542 +#: lexsup.c:547 msgid "Set address of named section" msgstr "" -#: lexsup.c:545 +#: lexsup.c:550 msgid "Set address of .bss section" msgstr "" -#: lexsup.c:547 +#: lexsup.c:552 msgid "Set address of .data section" msgstr "" -#: lexsup.c:549 +#: lexsup.c:554 msgid "Set address of .text section" msgstr "" -#: lexsup.c:551 +#: lexsup.c:556 msgid "Set address of text segment" msgstr "" -#: lexsup.c:554 +#: lexsup.c:559 msgid "" "How to handle unresolved symbols. is:\n" " ignore-all, report-all, ignore-in-object-" @@ -1895,113 +1894,117 @@ msgid "" " ignore-in-shared-libs" msgstr "" -#: lexsup.c:559 +#: lexsup.c:564 +msgid "[=NUMBER]" +msgstr "" + +#: lexsup.c:565 msgid "Output lots of information during link" msgstr "" -#: lexsup.c:563 +#: lexsup.c:569 msgid "Read version information script" msgstr "" -#: lexsup.c:566 +#: lexsup.c:572 msgid "" "Take export symbols list from .exports, using\n" " SYMBOL as the version." msgstr "" -#: lexsup.c:570 +#: lexsup.c:576 msgid "Add data symbols to dynamic list" msgstr "" -#: lexsup.c:572 +#: lexsup.c:578 msgid "Use C++ operator new/delete dynamic list" msgstr "" -#: lexsup.c:574 +#: lexsup.c:580 msgid "Use C++ typeinfo dynamic list" msgstr "" -#: lexsup.c:576 +#: lexsup.c:582 msgid "Read dynamic list" msgstr "" -#: lexsup.c:578 +#: lexsup.c:584 msgid "Warn about duplicate common symbols" msgstr "" -#: lexsup.c:580 +#: lexsup.c:586 msgid "Warn if global constructors/destructors are seen" msgstr "" -#: lexsup.c:583 +#: lexsup.c:589 msgid "Warn if the multiple GP values are used" msgstr "" -#: lexsup.c:585 +#: lexsup.c:591 msgid "Warn only once per undefined symbol" msgstr "" -#: lexsup.c:587 +#: lexsup.c:593 msgid "Warn if start of section changes due to alignment" msgstr "" -#: lexsup.c:590 +#: lexsup.c:596 msgid "Warn if shared object has DT_TEXTREL" msgstr "" -#: lexsup.c:593 +#: lexsup.c:599 msgid "Warn if an object has alternate ELF machine code" msgstr "" -#: lexsup.c:597 +#: lexsup.c:603 msgid "Report unresolved symbols as warnings" msgstr "" -#: lexsup.c:600 +#: lexsup.c:606 msgid "Report unresolved symbols as errors" msgstr "" -#: lexsup.c:602 +#: lexsup.c:608 msgid "Include all objects from following archives" msgstr "" -#: lexsup.c:605 +#: lexsup.c:611 msgid "Use wrapper functions for SYMBOL" msgstr "" -#: lexsup.c:754 +#: lexsup.c:760 msgid "%P: unrecognized option '%s'\n" msgstr "" -#: lexsup.c:758 +#: lexsup.c:764 msgid "%P%F: use the --help option for usage information\n" msgstr "" -#: lexsup.c:776 +#: lexsup.c:782 msgid "%P%F: unrecognized -a option `%s'\n" msgstr "" -#: lexsup.c:789 +#: lexsup.c:795 msgid "%P%F: unrecognized -assert option `%s'\n" msgstr "" -#: lexsup.c:832 +#: lexsup.c:838 msgid "%F%P: unknown demangling style `%s'" msgstr "" -#: lexsup.c:898 +#: lexsup.c:904 lexsup.c:1335 msgid "%P%F: invalid number `%s'\n" msgstr "" -#: lexsup.c:996 +#: lexsup.c:1002 msgid "%P%F: bad --unresolved-symbols option: %s\n" msgstr "" -#: lexsup.c:1059 -msgid "%P%F: bad -plugin option\n" +#: lexsup.c:1065 lexsup.c:1564 +msgid "%P%F: %s: error loading plugin\n" msgstr "" -#: lexsup.c:1063 +#: lexsup.c:1070 msgid "%P%F: bad -plugin-opt option\n" msgstr "" @@ -2013,104 +2016,100 @@ msgstr "" #. an error message here. We cannot just make this a warning, #. increment optind, and continue because getopt is too confused #. and will seg-fault the next time around. -#: lexsup.c:1080 +#: lexsup.c:1087 msgid "%P%F: bad -rpath option\n" msgstr "" -#: lexsup.c:1194 +#: lexsup.c:1201 msgid "%P%F: -shared not supported\n" msgstr "" -#: lexsup.c:1203 +#: lexsup.c:1210 msgid "%P%F: -pie not supported\n" msgstr "" -#: lexsup.c:1211 +#: lexsup.c:1218 msgid "descending" msgstr "" -#: lexsup.c:1213 +#: lexsup.c:1220 msgid "ascending" msgstr "" -#: lexsup.c:1216 +#: lexsup.c:1223 msgid "%P%F: invalid common section sorting option: %s\n" msgstr "" -#: lexsup.c:1220 +#: lexsup.c:1227 msgid "name" msgstr "" -#: lexsup.c:1222 +#: lexsup.c:1229 msgid "alignment" msgstr "" -#: lexsup.c:1225 +#: lexsup.c:1232 msgid "%P%F: invalid section sorting option: %s\n" msgstr "" -#: lexsup.c:1259 +#: lexsup.c:1266 msgid "%P%F: invalid argument to option \"--section-start\"\n" msgstr "" -#: lexsup.c:1266 +#: lexsup.c:1273 msgid "%P%F: missing argument(s) to option \"--section-start\"\n" msgstr "" -#: lexsup.c:1490 +#: lexsup.c:1507 msgid "%P%F: group ended before it began (--help for usage)\n" msgstr "" -#: lexsup.c:1518 +#: lexsup.c:1535 msgid "%P%X: --hash-size needs a numeric argument\n" msgstr "" -#: lexsup.c:1547 -msgid "%P%F: %s: error loading plugin\n" -msgstr "" - -#: lexsup.c:1578 lexsup.c:1591 +#: lexsup.c:1595 lexsup.c:1608 msgid "%P%F: invalid hex number `%s'\n" msgstr "" -#: lexsup.c:1627 +#: lexsup.c:1644 #, c-format msgid "Usage: %s [options] file...\n" msgstr "" -#: lexsup.c:1629 +#: lexsup.c:1646 #, c-format msgid "Options:\n" msgstr "" -#: lexsup.c:1707 +#: lexsup.c:1724 #, c-format msgid " @FILE" msgstr "" -#: lexsup.c:1710 +#: lexsup.c:1727 #, c-format msgid "Read options from FILE\n" msgstr "" #. Note: Various tools (such as libtool) depend upon the #. format of the listings below - do not change them. -#: lexsup.c:1715 +#: lexsup.c:1732 #, c-format msgid "%s: supported targets:" msgstr "" -#: lexsup.c:1723 +#: lexsup.c:1740 #, c-format msgid "%s: supported emulations: " msgstr "" -#: lexsup.c:1728 +#: lexsup.c:1745 #, c-format msgid "%s: emulation specific options:\n" msgstr "" -#: lexsup.c:1733 +#: lexsup.c:1750 #, c-format msgid "Report bugs to %s\n" msgstr "" @@ -2119,113 +2118,122 @@ msgstr "" msgid "%P%F: unknown format type %s\n" msgstr "" -#: pe-dll.c:430 +#: pe-dll.c:431 #, c-format msgid "%XUnsupported PEI architecture: %s\n" msgstr "" -#: pe-dll.c:788 +#: pe-dll.c:791 #, c-format msgid "%XCannot export %s: invalid export name\n" msgstr "" -#: pe-dll.c:844 +#: pe-dll.c:848 #, c-format msgid "%XError, duplicate EXPORT with ordinals: %s (%d vs %d)\n" msgstr "" -#: pe-dll.c:851 +#: pe-dll.c:855 #, c-format msgid "Warning, duplicate EXPORT: %s\n" msgstr "" -#: pe-dll.c:938 +#: pe-dll.c:942 #, c-format msgid "%XCannot export %s: symbol not defined\n" msgstr "" -#: pe-dll.c:944 +#: pe-dll.c:948 #, c-format msgid "%XCannot export %s: symbol wrong type (%d vs %d)\n" msgstr "" -#: pe-dll.c:951 +#: pe-dll.c:955 #, c-format msgid "%XCannot export %s: symbol not found\n" msgstr "" -#: pe-dll.c:1065 +#: pe-dll.c:1069 #, c-format msgid "%XError, ordinal used twice: %d (%s vs %s)\n" msgstr "" -#: pe-dll.c:1446 +#: pe-dll.c:1450 #, c-format msgid "%XError: %d-bit reloc in dll\n" msgstr "" -#: pe-dll.c:1574 +#: pe-dll.c:1578 #, c-format msgid "%s: Can't open output def file %s\n" msgstr "" -#: pe-dll.c:1725 +#: pe-dll.c:1729 #, c-format msgid "; no contents available\n" msgstr "" -#: pe-dll.c:2652 +#: pe-dll.c:2656 msgid "" "%C: variable '%T' can't be auto-imported. Please read the documentation for " "ld's --enable-auto-import for details.\n" msgstr "" -#: pe-dll.c:2682 +#: pe-dll.c:2686 #, c-format msgid "%XCan't open .lib file: %s\n" msgstr "" -#: pe-dll.c:2687 +#: pe-dll.c:2691 #, c-format msgid "Creating library file: %s\n" msgstr "" -#: pe-dll.c:2716 +#: pe-dll.c:2720 #, c-format msgid "%Xbfd_openr %s: %E\n" msgstr "" -#: pe-dll.c:2728 +#: pe-dll.c:2732 #, c-format msgid "%X%s(%s): can't find member in non-archive file" msgstr "" -#: pe-dll.c:2740 +#: pe-dll.c:2744 #, c-format msgid "%X%s(%s): can't find member in archive" msgstr "" -#: pe-dll.c:3177 +#: pe-dll.c:3183 #, c-format msgid "%XError: can't use long section names on this arch\n" msgstr "" -#: plugin.c:178 plugin.c:212 +#: plugin.c:176 plugin.c:210 msgid "" msgstr "" -#: plugin.c:308 -msgid "%P%F: %s: non-ELF symbol in ELF BFD!" +#: plugin.c:249 +#, c-format +msgid "could not create dummy IR bfd: %F%E\n" +msgstr "" + +#: plugin.c:322 +msgid "%P%F: %s: non-ELF symbol in ELF BFD!\n" +msgstr "" + +#: plugin.c:326 +msgid "%P%F: unknown ELF symbol visibility: %d!\n" msgstr "" -#: plugin.c:800 -msgid "%P%X: %s: hash table failure adding symbol %s" +#: plugin.c:559 +msgid "%P: %B: symbol `%s' definition: %d, visibility: %d, resolution: %d\n" msgstr "" -#: plugin.c:833 -msgid "%P%X: %s: can't find IR symbol '%s'" +#: plugin.c:825 +msgid "%P%F: %s: plugin reported error claiming file\n" msgstr "" -#: plugin.c:836 -msgid "%P%x: %s: bad IR symbol type %d" +#: plugin.c:896 +msgid "%P: %s: error in plugin cleanup (ignored)\n" msgstr "" diff --git a/ld/po/sv.gmo b/ld/po/sv.gmo new file mode 100644 index 0000000000000000000000000000000000000000..f7038a8a951b9dd394c46e2ad1a07b221f5c3730 GIT binary patch literal 43131 zcmchg37A|*b?>ji*dXi}8@zAVvd5BawJgc|*fJVPBYCWmW~?4dHbTff(>*io>FFN# z?H*~2SeQ*TRo&9JPC52f5x@J6iK27ByHALsa~~B&-#kNiqiFPkC^{Rw8Pu&= z@O8m^1rCh(2m5cnN% zD|pEzQFIe{CpZXx98`TDb*U?77pQb^0!P8a;0Exj)vlfm@H(zP1#Sla54as1$VJhO z;7h=M@T=e!@Z>eF{kuV>e;X(|ejkKX(W5SlqHDp6z*E4dfmefff{-YB7x+Z*ufZ7n zCs6c$)LNH6_P7aD{}sVg!Fxce5WO0V!3X{Ghrlbje)Kv=r)$BhxUPd|f$sv>gP#TU z{{IB&is)=^3I{;CD4GIA=lj4Id=N~)hd}YgQ!aP!uY)T8&7j)*HSj#}m!R5l#uZTn z38Sk(x+t0e_1>3&de8en<@+kA_y59QpGPCq&W)h>aW@!)^Wd4_tNs1=fuhUbf#TyI zgL?lmDy8?Y0(HF&)O#nvCxG{YCxNdApA0?#^6Kbc!Rx`8PEx)1fvV@dpz{9_$Sa~R zd3+p1qN}4PgKA&Z<7+_G^V1+Cj=l*h-EYARs_zC+?|TZ!5Q<*v@%`X9*Ixn80Iz}B zM4y{MSR+b6(dn%qLnit>7=u3r_5PD#UbXi+k52*Bjs;Nfc{`~5p9j^hpMV-iPomLk z*B+3ri(UdM-={#8_hV4+Kas(57PtY7!COH+UjW6AuK~{mKLao7pQb+(K)L3H6WrP+6%&h(Q`qi|DeZz1VyJ~H@f;<44%#P zASk*QK(+5>pz?hVqzj`Tfucv>fa8blAS8+Qf>b?vHK_jk3OEQJ53$YxcX+%56un*u zB1)ol`>Q3E^){1A8w_!pq){ta+B_;XP7IAfdR z|51>C(M$NF`hEpe`Hw>gD*d&f(mxfv0K6Ym`#%V-1iuTao{t}L_1gxjz0U;IfA8_v z-v(9giBwwe*#IivoghOddM|i3_z<`Pd=$dC54;2voku~{<2m4^;738x@geX+@YrG3 zUn@b?dk|Fnr@?7D(@%Y8gSW&Ja10cEilEZH2s{&fE4T{$Gw^)yd*E8| z_?sPluK~sXMUVG@YX6%+(eE?hI`A8y>T$v@H~y~%Ro)Iz^_T@O244@VUq211o<9H| z5B>+Jeva}k-Nm5zd=Fb3b{ufG5u$MxTX z;*YO`>Zkt%)sB;PyK#OAsP^0is{PLb5rNT*!6$)V07ai~gDUU)p!(sbpy+tw9+&?L zQ1!SLRR0cu8lNRl?|&h9GWa%7bpH^je*d{0~s?`xU76o_L$fzY-MPZwA$lS&#R6dg7o(iaO@l22J1@)e9g39*`P;|Ipue*LSC^}4ode6)J{WpOs z?=Qg9!LNgQ|IfhFz*C><+PB){<=~Cn?+5P(p9`w~XY6x)w#wrsk9)y$c-{c70ACJX z34RU~o&Ot*!SkNx@X4Uwe>$3sgPs0v`*$7?k|E zA3PrXJ%9fl9{(6Ti~An|&jr5>o(cXNcs6*#?e2OdD1O`oiXOwD(ocB22V8Ru<%8!( z$kT$813w1O z@E^HeIY}Ra$4xo^7PFbw{iU| z5ET$@t~fv7W#A63zv-_pnRWG@2k+wk&q1Z1tGfFB8F&NN8)}X}?glq<{UCS~c-$Og z61*841iubm4W54|JPGarp96jp+z4*2JNiElyol>Jf&JiTK=s4_fE&S66E_ZagOVT5 z2QLL*2dY0l2a2B_^0=(w_;C$*D)+a8mxBdR>0Sk@pFRSreqRHx2Ty7`|7I8zKfeIf z^S6Sk-#>tTpoqK@xER#^5pXNm09F3SK#GjM4T|5!=p4Pj3T^`50xI2MQ2g__gHB$r z1an;90;>Gyf~&yy_~%~*S8)AkI#=z#6x8(|@C@)-;054oK$ZVdQ0@4Zzy1}deCN}- zO1~Y{^CEaUcn`Q7d@U%tejGd*{3iGW@W-I)|7-9%aMROWe?1daxgP=b{=*)RzuW1R zRp7PUe<~4(3qix_> z;QK+*;LkzTYbAqC`NlxW*L%RV;5+^G*Fo#oXS;M4gG!eNRnNP?OTf2+o53%F z8^KfVar}`7Ro;t1mGg0b|GS{*eAaUupIi=}&-Ja~Rp3GJJn)aeE5R><>W5>W>*#zA zcsAGj!42Tk!E?cnfNJO0{PSOfqSM*WbLp=HW3F!ouLkR&+VO5s^!Sp${xzs_RzBbL z`zUw~*9j>4z6TT?zX4tWp7;WHe-n5T*K?ry_1U26_fhaN@E70+xblUr-3L9s5mY-r z4XQrB0QH^=UgYR80-nJ23&4%wD?z>g%b@6g{BOJVuLs31qoDX?3fu|49#lPl;P0P* zuam=hP;%^zpy>VsPp{J5 zzsLK*%eekLI0F6>6#a)@=IZxCP;`DLD8Bp_H~^mXa@W5%gZ*6J3tkL92rdVI2&#T3 zy~6d&W#E&z-UnU))XK{{fE!<5wc9z!jkAekr&L90&Wr z`#_D4_k+s!m!RnPBXAwK?tZ7|CqT8M0&2Xx5nKa)9DEG;ub}GnGw>Yn#8^@Z zB~a;K4ywJM1T|j12dX~D{I0vc6g-~mK~VR1fKLPufTGKbJw5@j75Gk2bp1A{emLfJu6>UIPvQDR@K`VgmA?-ZUyb_fXM;-j z0I2tV0u-No7gYI=dA+X(D7tP1)vvRl(!CNC9X|*@8T<}-IT*jeCnd9e)Mx27e5y-h*#+?Y{}!$n|ZY>iatI1n|9}`0%6P8Q`Zt)$<$v z{xNTI^mr_&dOiU>7wiXBuUo-W!DoOP$FBrc&d0&C!LNX#|Ia|RH~KxtZx@29?+B=J z?*zAkuLqU>yP){&XC8kEs-DNZ**$+OcplfMgV%vqf#-vDFa}@Y@dKdh`DIXi`b*II z_4i$UV^HI02vohF4r)By4?YR}BzP_O74RDHq_?>G-Uwd6bsannydTVg4}jvYuY)In z$Gp|?&B>tXbUi4#>;hGJ^40DLs~esC20Aov>a_&;#Tbs4+}d^adM{|%`6{nFpR;O%bwYz5WM1uzCb0E!M@2KBz^9Zo)+ z1B!mzLGk0$z-8c+$2xdC*Utct1D_9yPWOT0n?D3ahra^Vf8Pbwj$_{G`0*T2?O6q$ z0}gn68h8xXEBN!*;53JRALi({Gxz6b{(Nudo=!zm{XWBShYI4S{?+ezuKxx6o?Rge zKx;GjCmhRsdOiMAjxTb2hvO#hKLyn9cQ`)9A)n*py20-+Im9#KJN^EX;|X>aMZfLw z3epd7==Xh&dCs2+HaM>5{Nmt;DsEo(hYv1&q40*;5daN{Lb~~F96qboWQY* zV~FF?9M_TXYauaM<=#Gy$8-E!=Kd__FW}h6ae(7eo*&Cm2W)_f#X9Qn@Rr@f4`q|@$zo)^WZ^_ z1{FvimjyaBh;(!&S3daP8e$OHOR`6tw zyE)hIJn$@zXK?;mj+;5I-=?@>zy1| zbNmH|eses_gU#SzY~cRMKF={8 zB}4y}L%;v+Kq}ULzvAz+eY#h3{shkd%005bkKyl={qu`Bf3JV`9#FQyANuPHNHfa$ z7{>~Z)3`2z|HTo04es5_#m_mGbN=S=z+(dbFOEYT|Ht3E5_~(y*`z<6W1jOW$88*s z;~3@`=g9v4**BpX2cyxA08AqQ{M#e?vF;y_kC=9MWY!+5;``y3~6z22vt^3Pt+^?uHu4Zf7){T%P&P#kUnyac=qd@9F(b6msq-QeY5 ziQ~DP-vC|({uWpOw}blK$nm!vqg?;7Zt$yfKErV$$0Ub-F~?TU&*Zp?^C$WHoJRl7 z@j;HaaQq#|@f^?1JU@x+w{iRr$7=5X0{l8h_`Q~sJ2^haahT&-9LJGvnBziU&T8(R z%K5jz`#99BVjU>>s=pd>_X~^1i{}D|7xP&PV+9xx!@wl}c@*&?r}@ z;)&YqY^@q63$x?3O0q0kwz*zQl6Y5XvQ#fsCra^HVZ2gW#)IKBFK@5oX&mQrg<>(6G>Q|2N+nmQ zlnY5`>cN9^wR$7eF+NakOxyc)QfoHijn%3vX}pk>_D_~8rTBWC>gQQD*||!2ysaRAvAJGSY2$^7nFED-QPd_#qHlu=Ka^_Z`-kHWcY>{f*dGSDr;PwiseML%oUoA8Z|3S zm2%dUw74y`xLTuw^n7BvR->7g%v!uAURf+n7MhjDs;!4HMtjY4h=3KUATWZx6>YwUNydUUnF?Nfx%HNnS#h$!sLzXb` zc2X+TC#G|Abr|#DhU=3?odFp5bI)|CYL(HTEG|?Fvt2F6$_joiQ$ zGgp6PkJ+=BwT&UNYNdL^p;{~(jh9A7+3rnpT zf?ss*A^_^8q*j@yFA9yN7UnDMN55}L&%qx{n}zNT<30?r7+GGWW}(XtPE?x3Qcj{= zT)$e!nl)?EUK?}?^sHW}i}_3}ia^Haamf^zXGdR}*SOMZt97IWhSEZUBbFt0Mrk5k zoB~hl3e6VosMWoGWh^EbGx7D+=InT>?kc7V zg$M3_uNt|cYDq36Z!3p-si@gcNIn#wtx(b&PZknX@8ZIGm6B%Z zD6d>SdIRgF`LZ?rC@r+IeuEZ<@_iGnn6$pXNfX-(L~I7*?fS*WAe2w-!Irhg2wrg2 zaY7dfJsBS*cOhQ0WpHcDniOwKOgCDCD=AILAnrZBjKN(ZMyMZzt|IXL#LSTfnB~ok zD|pF`HD&Z=1jd1jrTX{wU+>xRhJ7|PR7RHh(r$?NUK}`QUnpzNcV&2SlvS1_^y=qQex?HB9rDknRGZu5msrmw@)WR%-QY{eW?Pfez z1zyid0$3lyx~*=EHl)P5CSt+nn1BWEJ6&55Tht8}R@kg(pDk;FpK)h8>p1DHc7 zXc;%AP1GdE-IQIa70|Oz=EiFe_U(>b3H-&{GZo=l8QB?-!%uZwq{F>Y2_?c5?G;cQ{UEp*rEw@$aTRB!aa~j zmXK|*M*>$VbadD3{^`;4U+3S@?}o2?|3q!7%6KY)@S0Qf8*c0O!xh8A)+6Pq0{%#3FI+wuP9ioMKSeOxaWi!u!t zL`_&ZG=kgT8Xv_iu<}0 z%ZO=|=Wx9}^?cbK&B2M8FV~t$NY%Zp_NHZCxVb;xT&RjmrVuw?s#6w{uG&cAT$@>3 zIyh0XAxa&{*o9Ft{ZE2ils)OT#?l1+aj*7Cx|1@!Je$#e*~;O*mo=CP$okFzMn0@ zOfj~aQOG%D6LGQ7D5$&5fb84E%eQJwbd37;VQVQYL)T&HA4}#}X5;SH;O>#CUYe-Y zi~HxMi}fxk;3g3f=}@Gh;r;D*AyQICpD%h&L#m!UKuTb$=L_%&+MZN!!Bg5TZWuM8 z<1GHN_@P-2dX8*^Wu-fcq0Z&%JO)xR-n4Z~;IiBMk`a%>@*C#o9SE*jJGV}3e9oK~<2|g5~!9`l>dN^I? z5HxnxM{63fVX*w*=CPrXoxVIsYHDzF*U0XnErZ1Wj#OSNle*Vjn?ECb2Q{4$@&?VdKbGldU1q;u$9|UO!rzej5;Js$hY1l-Mz@@>waG znkC7Kmg+5Pq_+y8g`=`AatcBg4qDteS4W*M7>$vx3}lHdgcZUsO}=$ek`QgqCDR2Q zv^3@9l2gu=OZHN4_GZecyL#nj=O(VXYVE|@MMW;EpU>gya`faromgbi+cl2FAtfY( z4Yz&`t^K9?J42FP znXr2ZQkkD%!_$jSV_9c*Nf4~;+q6pT+i}MW^+gpO$Ck|1iONrVb2+>_6|CJvukp;H z6mU2avQ(EyZx^xc>3fOlG?m)gTkfaHs-*+_Eh%yx$>GFgsDBU>p8iS~w>rT~Vk?T2 z7!r>EeFrRloXDKX23Ruh5!;xA*Gs5~p96BLJg9^4sx&e4LSEbVOyWF;Bc!UABwvu< zu(<4RCx}DUJh$Q;`KhRSX-ZuaqQJO2beS9+v#NqD@!G;FJVh{b4wtcr5Ew6!9P>a% z*Azl{WiB^es?Z1uX(r6HNM2g5RAAPp%=8jJI%h0io+Hrje0?M5@}=Yn<9<=%>C(a2 z$6m6v4)4!ARwc16<_dM(d+C`KPA9h2_XtI`{QbtloHqg5@+J$Im&5**%C zX|Yt`2TerK{ieLE$v6?t!Zw>3S2ZD=GZkvd#0|EAqL-q^q)DRQr1y3(@7KVXROmbu zd}!T zk%a4-4nZ!5!}qQ)DIFa~3{`<4=!=%E806G!VFo>52Df!oMg(P(Ne*?iR1pC6i%*6u z>m{s|!epQc#g>$I1*8sQer#aZ*e#n5*7Br|IhdZI?^rJm{}-%_5m z$uKC@YLn6_I)H)1^sjMxuUuBN&03ko(w=NcmSW5NMWk&W*}66MTHMVuECgkmsnjhk zMePFZeNF_nmp5hJ2$Tud9R5WXndkr$)4rYX%#Y|Ao- zk}~Gn(sGB4D#hj4Vw2x`hiNlowSEcg14R98fGOJOLXBx}x55oJWcuSl^C{#qswC55 ztyj2*2kJ!A7C*clD-!3q8m3!v%DlqDY=mH7p4)R!OKT%;&*goc+g+J{#s4rMD4Veg zXQ5J&wl>&lNn5}7N=q_wI*ORuH$5mOMYycScd3-@1+A%(bhyi}4-OvvhveM5d1S|q zk)8X*viLlf-xdg{im0_U(*eY(zpCfKy3o82~=F;+tL(mp4i5oEvF zbF)w}W3ITyq=HB$c^Uz=DrS?rzKgz zBb&9QR-oXf6^b0RHQsDh@`VU!TX`#TxlDkW`dfYJ2VY zTi8Sna$l3bjgs%gw6*wurWX~KFlzbyY3)1fnnsDOsf8*lBrMWIpn94Sh4dvnjXhT; z-l1gyeon*30J8n<=0KeUNq`Qaf#Q4*AP zYfrq==0m;ZX+jMe%Feu15yLJr%(+ry;u=dbSFcT%$61ZT#ELE5N`ufY)(>|wiY>?* z#Kx^+)8KCt@t;?jgvf%tC5!i_#NXudX0?q#ml^+lVOCMpz^RP_ky{sH!ly<)j9Wz9 z21rewbvC7#z{*KItc=G*UC`c45Sz{378@y`)Da<9^ABUHOysD&+EWtUDjUHvjibXJTwk(F2ZAa6sN+F#M zyU^TXiNGK;4-*S*t!||@uTjPm$`KJ_3R~PZQJXtzmZa9KvjFkPsVxe=hHgWtwwjJq zv3PuFbuf`D$fzcc+!8vsFW(}x%%5?%n3Y&TQ?hH8^zXO;+Y2XYERE3CS5yG8r02|s=GdTua_S&U2r~nr#eutN$bl2T-k>j zQrOkl&a5I#i!iwv58gUDvTMvw>egAu!)g*$wtGI}7Z&Yxv9<%{i4tjxq(y-6j->St z-OnM;yy?yO(;78emNjih2Z!2JwWksl$k4F0z|-Vb`$O*>LOEwBgd{F#tf}*cBGM!bIQ+V%0)dZ`rWYm*Hu zwNkuQo`nhT)$ry7mh)z}RJp)9i^LWl&|N_rNKS=CS*?Wa&TD#~NjSH-(fX=1&qPys z(#4@+vx$jj-6fT288}i&-Iz}qHrnFY0_vpPYF(PIF?WnY4K53v-dIp-`CSDsM!B~6 z9_FjOSS5&-#Cx0OA?C+!8y?&j$@w$}Z?US^gL*WfX+!m?afB}?NuMwag^CipwLNbw z$5zU@3eyrkD%2@#qOf$jqYAFV@=H2KOUN*>1f~gTohFF`<6sh_EL#t|&?r1KKeRA~ zS4SAIt*coN84}G&^_u@>)4@G%qh{O^c8eG_SSpJ$C=_c|hM6aV)=tj_8ms9=*8z-v zKRWE4jY2XLSKui(&j<@qfUHNK98bNYKm2nyh3&k*y?%BszB{hf=kRj&W#8c<>o)Dy zteScY707n2y;MGrU;TqCY>o=`ZMm39G`QoI;Q`GAMuTQqSU5E@-J9Uk_!&epVf0UE z+Kn+`!={hC3ThlJ)v~1}vw>r=2)}qM8g!pvh`;^f^g#V+>(KC^{n4d%D(7O9F~g6fOkUdSKTqQ_$xdPAEk;N}o9=bIKek%|_IjD}Ths)LG!4Bc$(>d|9d)F05dfcqC5VT!(A%LamOxOg?=;z2J8^jc*?dKVILpUw{ zG*rf@9-yr8#Wh%U1$DWxGPAw}L+qv|BiM#>5G^Ya$VC>V%0*sS9Vf^}eU!qKs%(N) z(e}aH_KfV>5^XP)=2+;!M++fmMgD}Dy2d3qzs4lPrRo&M1hio_c`un^PshtsEMt)~ z@0D`mav{VUtXA%Lw4+9lazUemE>s|TB4$N)6$xnau~MLAs%bu6xh}VE?doNZ;|Fso zI1*pEDu&yOX4|0FB=~mH(r7222RKV*Su~=?$+ifZD3C>qzSF=xG_aCot%#rHCP2_q zG(zls*4AmZRG!^rIvo>l1pQmCMkDTFr#J7+5dW}J!`p%TGfpYSxkX>qb>AQQp*M{wG1T1bqkF2xcH9bY%#_s1qUAnW zk=xBW##r$FBJa?efs}`!$^>&GD7g@HB1L!EF9Nd6F{E2XLYqut9?9g0B$8Jw8-fL& zzmWkF<%ga!7&*hx!v>r!nfOu+d1v0pSPeWFMpYgw+;_Q#r`gKxL!v-A#yiYQ8EvcR z72ypkZP7F55P1RDnbBCt>$}dJT4kJSWA{+@x}WE=8!127RT}$NPIEAvG47jbY1G}$ zZ)!6!G!>FseU{MitWypu&u)e<&W@6|Ey@|?+iJmhCb(LwnC!lB^s-xS?GVm+t%-Dt z-OSXM?8NKQc~)||Dy)j~ge^=)h+mwPk$_h6C~p&isX?eNcdJPyy0d0OM?%Cxruh_u zunc!n;{>A!Thv^Upa+kXP)vz6-Y7MaD365-1G&jwe`N}|Wf!Lol2lCKWwY5t9p6y0 z%8IiuoLuDCJB03jAV+uWF5lhh&RY=?^LyI{$D%RGIUh3##YrW($Y_Wf>FYR1Y9c#0 zWN!F)QL-i)(-bgjWs1pli_XbAO1yV;UA$0hB03i!B!;E;Ff}VBg4Asw%FC9(UZzng zFe4_K(+!s3K)o=>TFf-4;#_7=ojonPycOSSw?iXK!%$v4XOLt( zd`%!}$z!RSW^lqJ6E3lN60C({6Xn3So#9iDG>14Ojr(sKWl?aYNqUux@GiP^W@WL) zt`w_Tt%2vb+|t0(ivxDfYgTJ`d=$fQS+s{)P&vuLEQt1QFp05`6R*7N6yad#{N%kG z%*NWs#*6ZLEi`0NO}Hs6Ve0ZIX%f3CVV5t9+_y6f{5JL8-`9+MTMMMbU3 zU^$QGeB@+n6u9UB zJ{0Sh>#=^#x+|#1+RN8oy>9)o(UGy7g-obZZVPKt`xR!nJh%4h+`4t~y36~oyynui z*IvGsgt=Y*qpMcBD{>@Vzdl}fW&h>tFI~HC?b>C-*s?h!KsDhrky@R|=QL3czWS-g zyAKGDu~K2SKh7VJz?$ZhnE8#B@|s$G>V{=IhIS0L8nSN9 z+GU$vFg-U$SeV!)RJx2nMY(!i3@_J-{cR{GwcIt=TzPG7T`RGw#sZ1lAa1KZ^X!kW zA*{=O00THF*ldM5E9j{lV|O-$VYL2o*>>DmuRj<(<9zw9T?B>?RcDeJ+j^izFp`j^ z796FIci8nz=iUR`>ZpmfXcwOe87Dlly$7hS=O9L#>>Aa9uMVrd_8x$<+P@_7-{w8)HA*u}-l;(CPprg4irBU9Sb&O9m4brs?j;JPW2b`Mhbnhq$Y=uvf~U~LzI2e^ zmdq^qyWf>?f%z$`y1&+}?lu+}vYi>!6ZUTH8IY47JtMo|a5a#%El=+YwJub-t=T=l zq8>gpCHswLH?(TSeg53uzlA081q_s-neR^>(=zAkZ=*&klG_u2h$)Ya%EF5a>voKJdKZFgTy%2O)I~d>} zRBbB+EIU=Iv}E2B`EgI$3z_HB1Q!`fW|l_#IIciXX=Eo;SZ&ccFx`l1|Db2_fQoHI zWjHb=u4?M()SH#to+O89i0|Wq5e*B3_@#6#BCK1577w-fmWJMpr7YbfsZS&%w6!qr zKfs51mP)A14hw3LhHlUmK@xf*_1QQms+9mg(=0f z=lPUTpTeb$Gj4ul6knMfsnT~{?NSa?hl!a^!QP2j3O!rS z6u7i@`Ol$=w6eVmwi@l4nktyQT3P|!g_=SlapmFg<>Of=}*NLV@Qpt@h zKCp8%@$}5@>>wq$+Ww?lF~oxhXB28hRirA?>4;VjEsY+rcSGCX>x@!@FN^np2=8@C z;4D*3|F5sr2;~#>UfV^uD8HK9dJ)`MskE%0r8YP4ziY4z?Y2+fFj;9}nhg~`CTTEycyY+f2EG-8mM3B!Wx{-Ji zU`&(8u%WCjSJ+W^nHYm*6x(szOkh>GFoYyvm}CqBtJhW&OhUODrWNz?h=gTIoX1BrU zV0#*4!6*%TC-+lX=c@05iRnHVN65}-(MA|r6>ZEZ<%lU7Hkk3j$KHYqIfzcpWjNQ|PXpo~={u>ZT3y)}2!+YmR1~k>)k~5& zIZq1k9-6I6JD8?-mZ(%$xmr17mR#aglHa4Fy%a)T`Wi)173W7;kOLYl?;Bfg^)-i6 z5fm2OHHpJ?R3p}g9nL_P!c#}j@i}n8V!(dij_TnlLP0baFMt>;tKV$njv0*!V^Pe+ zgfEQRLKOvKQ>{HbI@1R8rdL_v`BKVg-^qhzL~^mq=>HkiTPT1v)mkA=$N)myw4&R| zW0KyZ>bBCL%qfpsj)kMCk#h3k${kYN`f4VVI!)Y4>e6_Nvp)@X#fR$g^dVou;-_WT zV~6=Pyp||RN>F6pEr76PR=rB?o)0Fi!*L8NaXLb-klB@j7u4ew|fEL@s8tfk3m3%VEA(acsN7T<3tyk|T#d6;Qj zLN-M9omx_`ar!W$Hm48^(=qn6Wixv{N~I{~s9ch6{86g-@j4UU?DR40*cKXF6AvHK z$7(aJZ9f?48n%^Uf3J-{oE2LT_acyN=Z}Zeoj;7@eOGEvkViTgYzGj1-&0wbm|^TB zrlllAlFDH%7-0=WJbSnjWTTrPE!&h5-!i4Uf%Fm&e)OjMfpj0-_P8*gFk5EhJ82N& zv9L~<+4yj-#*|YvrW}Jc0S|NdRJYz=Wp z=t3q8fNb~sw3(EngE^)o+$JF;#$1u@B>iG_pf00>>aMPvg>-Ed-v@O2s^Um#vm1x> zN|&-EQ}{Ryt+p!@&&{D=H46kYY8|xc1#4PbN=Vc8kex&V>3Y>K)9q;t zrdL{#w$5r70zaya7OFV{*QSWRl&2cn{~!muBDxZNl5JJ=4~=z^%*-0K-)~oYsLo6h zX&{&ddrj<^5DRloaCH1Nokb2a z2H06d=1gmEkx;24w!pupjD5}=4u(3t(`2nS(!?{%Qd95^WwsD!GG&WeG+y& zC5n^fsa++RRt|L{LhQas#`I>6k0nAf@!3`+rIU}CvWx&~IQb`rv9HT>Tf3yQ$)v?w zi!3g%YeMZTVg{*+jr2vZgzDAWR%CH;-RkGF`DHRo%i|L-uEbUbS=k1Z-(zIa?jnox z?C7dVY`RHbcl&8SPtFlF;jmm3M|2w_ZGzd4Vk7=Yn{ldnv{ua4CiZ57_~41Lw6hXX z42TN1_lOvL(cQ(ZsM)A@izIXA3lKbVERafQzxPNNNoBR|Os7%p{4)ERHfUQfEZei# zdO^2e)RBtUYN?GQDC(i0f$FDVykR$*e3ZPib8DC#cfV(#DD{K4K|Bg}JyE z8MHu(c(oXoU??gc4h_YdN@k)g(|gpyNkF_j)6l)U2Rq8u$t*|Hqu5`eY@W*SX6=Et zKY^M3?kDoVS;CfX4daAqD=Fi+)rBT#U47KoolkNFFMiwE&537%94zVWmcWe|#}5pL zu%}JiSYqK|N(bL036GTgP6#?T!bC5>N^4rSg4Yddc55 zUEvCJ9v+4Xlm3eQ`yEkiKMTiJZbuYpHKevVBkcyRNmJ|kAcs8J$v9Fe6aGqD?I?ut zGzIN?rfyTrC|_?vVLU9(GL*64%P=hFsO^x#m!p0qOYqAAGf=C%iwUdZ?26J>l}_V{ z)WnS}pw`+XB@NaTU3joHn#@vUEfjT@2u|FKL}|L4KvA00efh5_oi9T3SuElN^h(J`cM90T&06v|8)*-GrU=r=RLu)KF&3v}1=O zjnm#?`;?rhOVpvZ+A}WIlpmunC{T7wAb*jazRK~fpUo^oXzLUV@L(DWRt-1%H>7J_BrRg*5;~90eTAt3mKoISo z(lH}bswytQi&Ez9OISXf5#{BKs*=XuwA{s3GA$MBktq&ng=dqr z4s@!fNpRu)94Rp-Z_c!KQ0aJ4Dy&^-gMQV#M@njKpyFhay3`{7u3K?(A9+a(BwHwA zqj0een;|D50|^Qf@d^yJ#0~smgmXKp9JvmfsF9iMnv*h8O0Z1C%{8AOzhuH;7lm@c zava-wLCi}v+$UGeo_D<0uZ%WZq28Q91oE;#xX#3G?EEH{Z+24^vk|C9$Hpq*wl-Js z(}2!2&PYVta6r-7jNogJSW~X;uY#f&zk@X(NQKP8ROcGfKslfAHlxu?7u)tDT|8jB ztMFt~5c1MKNg88hmU$Kti1 z;z7UlN$Ngkd_km1wjn`iwAl#WNU^%4?={XfziU%|3#VQt-+)VPW|+2Hf2Ad@+dU z_TF%VHFP_BT-R*2BTIy|=bU>hi$}xS7+_8d#gCGB21!N45{|X1&D45lvU$HSD*`K* z{8U;$(7b)*Ui=k z3ijbOvj$CeiubNtbEQWN_}#i4nwi{o1l1-jW-$A&4EkCL!pyOv-C?U1YD|Ay{?_!F zDwP)7BUdm|Ebme>@ETcZSQ7Gvw2=$OET3YqRgB-xWoxOTZ$mWf!cH#YUcXICNmI58 zcJ;^@l7)y{2{AZ-IF{P9tZrkM);rxO;++(0o4fGU08%fzpdC&qx_w^Q+oj!%Xa&|( zE7}i5QZlwQc(%n>?_(l#1>9;*@0=U1B1Q$0-bb78DSP9tiutZ1>y0$f(am z31p$6iBr?e@t~wbVIGgHz$evOk#2*0J1c63N4B|()R{_HA3KlzSY`hgEu4dPod$_% z2QS2;G3s|1qur(vjqFahh6l8$W3Js>TlJ74Gi#PcM{ELa{YAef7ZfY#l|qq z&IS0TyMEgC=5ZmaWUaFwt#HI_R48gn z7PuGB_^o1+TB@&{rzL_%J{j`c`SU6Fg(p=E1Rwf}?W+^UoP-<=W7bH%txJi92vGnH zbSE`DV@G*!w>XYAqWB$R8eH3kVqQFZsoZ4+~dmv%hQ_SJ5_yv)v~rz?$my}$Pm zYGWCz_7eCeLmJBxR%66?T3Ub}$mGg1?J8O!X40=lq>KDON;}JTo^Z0O!JZ!o<+wB{ zcmED8jN+TbzM&s4HQEC>eTgNd-ADsARIzkgKE=Ed>%c-VNQzfQ9zC56IaS)PXY^aksNZd& zdH8fDGc?#cL>tVob;!u)6(LGVeN%J|mGD#ToCZDQkdwm)v$%O?7)`SYzUYzXEvWJ_LSvj&YXsaUDM zYfE+y8*W*oasCkhQG|A~!9<5A5m@|1a2B+cO%+PRKcR^jj_zAH-}F=t^F|{a-Ju5P zi?75sN1!h|5A-Ii`=lP?!tY?5J0O`W*!D(S6!XIx@@(h6a$h4mT~uwb9!$%N>9Z7&UF`|Ys*mrOd5JNPFO z_KvaqopzC*-D^j}s+;0>hNjPsU}T<0F1&mut@t)=l^I>_DN^D@TZrU&Vc0U+FeqYk z>^jtY@6?|08L&7aBDUz(vfWIqn$FJp80n%^8(m@N7eAESzTry;IAb<^`5LrB`Yhb& zY8VfOX{CrwBy0yXp}8D7*pDA$4xQ1=vG>+Spp$SC<$sR#tp&X`fA8}akmC) z*~&w|2@m3IvR)2*^2lae6K`o+lpGtCQO)iHwiAzfT+ww~{jqGG$OMWA1}YzM8=m%; zDeCAMj1>v&ZiX{~|I8}IGLvBWxx>5z1*2dT$uQ{Lt=eoA&&BSD&3%_(aKKLR36=H_ z)lT}t`~?!`I(Or7idu=~%*K1Y8nP{UY)2lKfQ(_!h4wG^#m2T6TeHKqz>44l!X8Sn z<(&VjCAA0A?~IpLNZO3F0F)?l(}iJ8H{zOWSD=}kHtg|rb^Ct!r2!&9xjJ2%l^FJ7 znP8K%PYB_#t-1V-Bn^+baE7Po?#>T)x{UD1CE`79qN*(#Q>tg8G1S!}u1PD)xY;pg zKX^xtSg!0eQw?cQDV;HG<#ZviZKFA}%tF946zwf9xKXiF+sY?9qTN`r!f1R)z}AH| z)GA|(rI^pKs%GdVNK&JSoqS9-xh;K64ZE#;O!c}`MK<Pl=)*@O%9;^)!mkxHO6`2G0a9 z1iL~0i#GC)lDr7K1Uw9G2j2z`f?oyi1AF2q+6{gV+y$O{Srok0{EQnDB1yj8&rAMUg_>%1?v9Kz#G74uZW_4a4)EK zy#w3=ejU6OT(vTa2EaO~_I?^vxm~MVx_#gt?%xA$0KW&SovWW0MK^)7;3n{spz{3` z+y)L@6-B+^o59WC7eMv@?A0#)K~QvjFG$y;PlGptUk1+uFUUpF^TAc%)4@C#gAGu0 zegIUyPk4MB)VTcwJRdy2$K78AUdR15Q1o~ics=+j@LAyZz^lPC*F+H{j@E;aG`iE{ zYe7gJeH2vw$G{rcwbqUM%Rsf`0q{BC?}BRIUx9Qb`Vpx7m#=f_wt_0Z=uKc~|;@!b`m%D)9v`G@@dFN13LyTNn7&wx(@9|La&zXo0lUUm(A1NVVy z*L|Sc^%+q4{~i>b&LlA;iEaiN>Zt7T9pFXWf6l-EGN|@Fg-ra6R)Vl>bkO4~z)|ks z4{DrGgXp5ur644X`asd)E)Z6Y-VVm#BcSU2J5c>S6DAO@1l8`Xpz5iE%Kvsy{rCe= zeExNiDx+=&i!Mb6K;?f6sCqvJYTUmH#^6u=`)9#?uugO%DEdx-G$FbhJRdv(il4va z-=D>e(q9Fty#1i^)j_rIUXUpkeG+5{qOXAJ=Q&Io;qyV!<3*s__X_Z0@E9oi|30XG z{3EFJF@s0fqOG9%{c=#_{F~qa_(|~D;Q#h`;Re_L>p-SnR0LtE=zb8EjQ$9GD)} z@qIPe4Soa^ogM?#jwfz$_1^@FjuYT>!Mj0?(}zH{`wzkM!0&)D_#dF?a0#8g0K5TI zx61r|W{uL3>?JO(1Nqes9e zgWmyF&%c1mf5vvlkIw})|AxSo;LE{hf*%Bx|1+S{{}Xs7cp8H)dY%JnoHv5%|87v} zs^CT7o4{4zgW#p$W1#r;UqR97k{u3vLG|x8P;_}ID0<%qJ`a2p)I9w@sB%u*>FU1{ zypsD7a0U1hQ0;p^_!RKBK#kw;flBvxp!nmoU9O!QK+*Yj@C@)EcosMgie7b4`R725 z({F(4&pfDc{VphaO8JRzE&^AB*MX;lqoCURVo>ApdVl{R@G9=V0BZbx1ggI)2VK59 zz?l0{fB$OmH16L3YW(j7H9p5d(fjkD`tc1={r)z{RE~ZKJ_EdFkE6>rP~{APqW^wS zbU6$v|9e2S`+cCs^TVL#+n<4|_xs?v;Mp&5^o~J|^EOcLM?ul$6`=ZkAGj9$IH+>I z35vf?8*=H^fKTJT9~8ZZKpPKG?K}vc3l>22^DwCVZv{o~PlM{m;~szD@tk3&FLU5o zyx$0_KRZF?p8-XecY^Bw$3WHdmtYV0EsqzBxOxUa<;#QW=j;9b2SM@OW1#B!segX@ zURT~)P~+4Os{T7b@%PI>_3wU2T7vEMyE2h{jn1d2Y_f){~9pvI}>?_URMe!dU90Q@MZ^z$CS29}EK2p!$0scp3O1 zum}8O@CxwX{rgL+uD+H-l$^=k{LdTQY1 z;Qbzd7hKQ%--6ErFRVL#w#nmNpytytQ13qtYW)5lR6S2@xb|!W*Kj`uGQ`n+U=02o zRDa{cF8wy}D(+tmir&8ssvlnlbKnz?xOT1sH4ekz_24Y1e8)lM`?7z3=26GbYrt!H z{&GYdI|}Okd%$(zqoBt1$KWRLf;q=mcYxxXI;j4A0=xnI zCaCeai_*cnA18a2xmyQ01+DrJK)F9zO+&?oWJ`vrD&tFW~-VpvLQq;2`)j z@EPE)S3?VM6pX<+P~-hB@MiF{;7;%fuW`5=6g}Pr-U$8`D0-fIx3iynLEV=@_2=y# zKL@Ja-vz}-*T2@`G^la;04O?r3A`HorF$GbuLE~;UjR3N9|tc3{}t5uKK*sBo(CO`z!X8c_B84tP2E*P!_0Km7Bn-{kc0eo*r%51s?w2j;*JfNIy5z~_Mf=AWPY zW=Ef!LD7EMaH9tQHt_8mat^v>c zRc9~sgQEK`P;|Hx>;~@!HO?OaRo{0&(fgdYI{IAzKAro^!PCI&L6y4!6rHC*$)ERv zD*tg%<$nhhz0SVZwPziu_oJZRH^AqDzvk~B0oQT=4N(0!|2{V#c7sph{>@;I(t}S0 zzW|;NJ`SqgUj;?yC%?_jt8P&J*a9m5PViRnc2M+sKX?}SSy27@b5P|x?(t{f6S=?Q zepk;*Q1!0`uLci+SAq9}s`n9a75G)~V(^Ry+&EnUYQFCRHU0^BE%+Kx{r^4i8t^ON zD0uGMUAyX_+W#t#uLIT2H~aVZgBt($gOUr6f}-osL5=Gb?{Ii4sOK}_dEouv`QQh^ zwcsP5u01~omG4>aarEp5bKK`a zJ%06N74>GOp5zvS<)0AbfC4^D@dAS91o zn7J2!PI0XvU72gYfA_Z@pUAWD*Ut~l&&@pB1%8X`16;Rog}&F2fa-pjR$ z^!nQl{<-^U|B5$0o4Nm*|NS)5Y2NDZ41RwU+{^V%u5m8?-N7};^-iv&^Tg z0RIit-|M*ca=(RZlq<&-bIHH^1Kx@M?&Eqj*BHOyZ@Bi(e4}*x5=s*1Z z=RCd$e1T8j%kNil-Ol|5T(|o)TFcVkqyv+CxA5#d?r#IX07~YK`uBpjah;X9zs{GT zM{``4XYTcE6ZfZq&(IBjr*nOu>pfg|bFJjcb6v;PN7~E4zv22{T>86#XAgjVT+ico z!u6Ya!QYD=MCbAB>HK~J*IoR+(LcYF-}4hr!=0@q8p{)+3LxIW1h{uca? zXM$hk>Y=P#!Lone@EG93{HSwX?CZRq-y8Y;Ch(8A9^%s9`CK>IFYH;~zmMNf059|T z{+oX%_+73d*J0i8_jax`eY$t>dmF#M2mT+ftNil^`MrYQ-CzVB1iqo){QV18foB)l zozn~Yc_YtIKhZUy{@&ssItotnY!A2#oaEZUb%0BMpW%8v*O$5end?RV`38RfJ=bpT z4|1K&@AX_W{(TqtOWglH*NgqLU+4EDT>5(!*VnlwxTgI3i@=|Ae#JPna1C*VzyINX z{5!alE9dWLz}vWfh3hGlb2`_h{Jw`ve%XNrrJ@54Q zhg?tM_ga7d$J~F2Yc1E){j&?fN4dX~>or_aS6``A8Ozs;<%xK#GCf@>$Fc+xNqH=ZNAjbkq>C3ji{+`L8rR0E#hH4XFBjtJWV%wFji>W7dcVuv zZK{;VixZ71#aGIDKAhC!_P=4Pj<<1~%jFA&T&-Rh%a=;Ie5shPwWl69I#a3ELmT5G z#rmYxuOF30J-($}b|sDGYssPUVkwE&>!*HgY$D|7iqy+X_K6G_gxk`}kQ5|=9sklv3? zRw{JUl39;?;+2JDJl`nQS9L7T+ME`pAKBu3pEmc6^u@(`GF^+utCi^t!9wGzjdHy> zo#bX}NuyB78Fj7HP+Fl7`!sPjjWG?SR;tS-nJ0tVofKlVtc^~Av&M@@8#CFSZLXA8 zXne|3@gdkhu2&3GW-63Q+2o6Vi?N%ORsQ;95_|Hh4_U&%+qEQL9h=O}RAJ1c8`jtA zRVHBI&)X)GvNcANvM^iDPZu>IW>suHR$Dx`FPkuB&w_B^>bLhjN!& zUa=gjTcbd!*b9g6@czWVBH%6=>gb8wDSR9x-YXZt=>bHq+xI zgqzY{82H95IeX*VD%GhtU#&Ed{+XFa1=Gd4pS+{9%WWBgUv%yu0IEr?Qaa37`!K~~WO zJ`;-~knwq(m;&?c=u7h&S6XeguC%~VT1arxvc%3PO@xb6;AxxOkJhQ?nh}#co+wpD z^QD@k3moBECS@oEJW-xb%5}s=ajsQ;O5mBsOcS|`lSzK2L-J-@Oj4GM^>Bcnj;;u%qN^1s(L-E-L)f%I<*&3>MabZi9l4fZuuUI~H2dl~9qILZgJ+!j^ z6Fm&&`z~5BX?y=OU2H87u^EiF^^1)`D4*JcO>2!AJnNd{gf0?#JU&J4eB85nU`x}Q z6mLsR*PD~8mW;_DUV45RgS$k`P(KM>L*V{=r&20lA{UZ$YK0%e4NDLg%k`vs1f3x*iHP>9aT&AGqX01;$7jwv|>MW+z>@<^7JrL#XVLVfzcFDIAG6^BX#n+I6J8 z5L}?eQs-nvsw`!4#Yt`C3JshE84@`sShC*CZ6t{Eqw-nOWL`PcOmX?%GyRk4M#(AE zUKL)hG@k?`XDqJFh^H*8bg6ETu-=!E#6r+j$4iwXm_sON88@a))FsE=lwGRi(X&qG z#%qsu?~7as{EM|`D#GaLh$}bgGP!p0U>-CtIAs?WS)bquX zW@z_jabdN_)E8GY2V;x)scnL^a=4{1!>c0)``4QKV6h`qj_lKmhL^h@ty$$i^3$5E%;H)+p-?21?q?;8XYejn#|WG50xsF zDIDvzIw>YiVaC}ZO@t*nIL-nfJf=rRgobXEHO0-L<&85GpQ~52Kz7asQUhG4`k!@6PVpiuTuqd_6CN z6;lm%X@BbiB8y%(%2Vaakun@Ioi9(&IHq-dmPw=<)bZiCyIX=~E~!?m%;9)V+kL)P z3l_Ybbc^#belVDnF@$o>M`jzvn3ux?n?|+|?)K$DSQFHHh6eX--#kF{>15?KGii*> zuwGPUh>qcRn)d15C$-$Y52w?*6q>ZGn#7Ata7c%CN5jffkfzgQ^P@j3hCNl9-WVU& zPsCKc)mAvAr@&`HQ>9q}ZQUbHmQye*f7IfSxhkq-)~JQ#ApTIGV=x5bFipN?QIZg~ z%+)6I82V|-@nxr+DJE8_H=i0z~(cJ0uy(1Y<+!!mLM| zHeN0nD>;R&3A(bof0gQOd*Wr>qK1xQh2*NlYA3xB73xlHs*;zj z@~budQgSd&rM@mLRMTYTGNGXfu|bSrhD>I!>HlChcqwiTo*=|EgCkL3N{=QaM_bA~m_RtL%;hGN z5}lxsMveHp>a#OmWwzw4&0^mimG~PkS+OWVbX1q%lc-x@KC1Hpaab`qKPgs{R zP@Q>a1{;1$4ZnRNw2}xtYFJ?^QDfYM%hIIx#sKw;*T)qj4Fv_g&d}js#BFqMlw|-p zrzFnh1IuLDpe;#F(xziNgsRL`KP;Y}DW_U5)C8u3Z<}UekQvkYDP*$Qf=1ztILIcG zOfVa=4o5et$>LVblkK+q7$@J9651X*rciu82sb#}YSc?~=>Z8bJ?DX|Kg0pVbn z)0}CAsT^zc# zzRD&{Lpjz8v2j}>f)Qad2U(s*7*@NHN+W{t#+0ejXL8EuqhGbKd6J!hH zknh*hc{8t|KpM))mbW68%S6g(zvcI#4iRcaPQ>*ipEg4_RtR}}eFUj;P5tA1rkSy%IAmU_*dB;q#7Btb|KXTt<3;{R%W(+6k0 zJDD9Hx0vJHqH1HTZftA*NL!u%Nt0+e-nMgRj8};rq$xWb5APq|xt(A_`slWJr7i4u zW69(cG?Zy{yP_=}#8L=1g(Nf8%4BhrZ3RS#Z4XMibn1eZP@gfk2^b{7?PB{(=<=}2 zB*>8&Fz*0}zscn-L7RatGp^$7v?5S}Q|o!6UM}Q-Q-^#QwP1}+kcwQpY)UbKm6JLJ z86%&zpyXKTGBdL!%3yh@#VbnrTAsB-Ou@QZTj6!9OHW}-y9bt}C8``;<2!A_meY32 zlxZ3PZTYffP{zNk*L5y(<`O? zOs(_lP)W#Zy>p=hI0v#ZqJ-XA&6j^*F{Nxj8g6-=bT;imcMA!Q3{l&$*`PFxF3r^D z=*Y%E-yuRw2aDUrDl@0dQmZto?4&w*Y6~&;gf)ZEyAaC^y$+US2^rPE_psJVGlq^V z9^CHXCZVys;!(JmEhQ~sf9Y=j$PJ#=M@A_!EyX)eDd@nH$4PGAWQ=VT>%kH-4d&IJ z-bqZle#Wu}y@1qHACOVyCruZO>!nj2saB*TMdMg54#_Y;ra25bp`63rH+6*+{tMIHpmW zlx%IUypm##gm?8yoluUpdWi=WY@pkvLQnVF>s9MbOh&0C7mm*#CORZW>Wca{Zyp*L z9*+8kHf@Xg#uS*(m?$#D6vu8cV#ZRLOiVqgvR1hK)W=@PBc1e9E$Z`uavwd%VA4JiMFht3K73_n^h(FVtJu%j zS7%q(Xan;g>T4V=vYQbDhD7qy%|o%6UvNk~>zjgz`eiwIRi3IoEM+3N>;sGXwe2Uo zx9Fx*^=l-MywEB&snc< z+o6p3$zdW;#c>y-WRSDc0feXzQd;>pum(zMRrX8aiBpYI1 zPAz@I$^lUc@lVV9<_1osoGB52_K}D7SsnS!mSf8p)R5Lm;5ZB{rX)(H`LaWo!%K@a z<|pum2oJT492=rSq8X_y^IKvGs3jgFp4}c+3rN)2D~Axx7b<0@f$x(xPtF9AN%j;R zJ(-=Jd#%oTzBUz?U=g>}14mGRtS+A%r?ri|{{3{q%8nOF2mAs_{L;8moxwXen61MF zQEla;Q8u*@8ju|+t5m*%U;f91Gy|XZHeIt?G_Y&$&OR;1L<6RgEzA~~&Z^-H_(dEt zVJwenh`S+(v)wR52HV@2&_q#Wu0k;QR?CN)?2I@y!w(lIUe|Gon;s-+B zX;ZoPTQv9e?=l47mWr$-W?g1Ox0fSr<;AW7+R1ZcM+cE3%iFewSU{mm}r}ngLBR%%mGp0xvJIEa@>wZROw>Fh)s36QS^cBRR+oLwE)5Ovy> z&RUoh?5b$T!2a6?hc-t$l4OPjV|FcvoF&=e7CtjB!D%!m*_o6l(9F<=?W9Y|40}6T zoM3HTPOw*+HJ1ySTxYvt+pFEQEZWU}UX#g;`JfsjT^$rb=!SM_HWvg4hn~rwLZ{+C znZpnui3Zs)Fl`&Fni|I*vI2?GG*~SXDToH$%XY8TsdfLdR3YXFw`S~fj8N?WH&RD? z`bM@zthsI->f06VX%&;J;Xop@t%7h5c@-t_t0`LFU`@0jo#I*7r*OwIY^6d;>WoNn ztQNVqK0>So4gVy}7||d#1GCL;OPA?TG^EWvyN0%lu@P_9GYlWMFy!8fui74k8Z#v| zvuI;NRz!9(4bj!!FQN`D&aw@+jMjtTEEW?gSBTErt)%EIt3^QeE`@ZfNN9@!tOwY< zmjv;OU_&rphquAd(eU;=1|nx@dDwtcA^TQ>eArnRGX4S&hFLI-3F?Pj(@ESHB#I{! z^AqN!jFxS$J)>B&Udt?c=L~-@klHgE3oVgT2283wU9qx%eURTCr2JraX^2-j&AN8R zt?#C#Q9qo2&|(rOGM*Y;meBF66Xq(<9)=?#r^wq9&5MRxTEToKh*&9^tlhR}&EDJF zgz2#MO_?>~;_;Gocr7wxvy#p=VO2D&Lp^Oe3W2KR(XbspNbNBVc~c^1)qGn*#6qU~ z6oYUJPf}w7BL-8@O#7g>PL@zii7{MH>a}PX-iLwQqMg4ph1oPqQ-?z;A@H) zr(~7YWk(WRgw%;y|2)Y2&eqs)XXkR*S<@`{Y~}k}Ba(AIHV}%F3UTT!L`QU-1;J?| zJ2*IQ`gl>&6OCvo4I zBH4v&uxzX5&IR?qw602LyiRZZ7(!kP-15?gvRd0BG3PY|dx{U=q`KZAxhz@KpiE)r0UU}J1 zgoB}TQ}gT$o+biA?<{Bs6NODB9bVNM#A_1F=dQ@@ac91_X!YLiM&zS47GrJQ7t$3K zw5ZMo3oU7c&0?;blDkeGs2$Qq?y#v%87W}rUE>hCwb#~a{o7P6wY}X_t;m?jZ7<~Z zxdR=nBNpPTd)8gobK~`0PTl8r)h3FCTt7-bH-h2ZwP$c7XORnLXl^sx`Fi84*RH)T zxAq$Ti?3eSyY{-P)~&r}EeUf&{saYp?CS_J*t0lCx`PzE;m63CcD0cUP*c z?j~$Uj{ByjAjl5vmVCUPKy-2L7B+ay=F2@W_C|8KcyDeb$xrvjh=HjhJFC`DlpDEv zHP={ob^aC!%36;LHZ!*-lAdx>-`KTl`>ugzkJt6A?b_rba=8)0qr~ta=NjS&#qv!t zyj~?RwqftcmfQ`^bZRY2>A3+sP#xLojc*{b*>!u)yHx7Nj{f{8ZuYvK8++Dq>UR*U zOOYgPk7rvl=OH-4nqckERu>*BEj%>K5znY={+|3yH9r^k=N~58e4dX-1XwZu_FFlC@6XKSc$!rwW6hUh4;6GW6TRC^4!%$`iV>Z9Mz9RE9heIzGpPMce=O&ux68noR z$(2epzXKmvN;uB7g@@)A9x5-dcCGGA7pFWe$`CxMmGcyVXT7`<@P5|YEY24e9 zf30JlPSwuk2D#YUQuC@?>uQ-7qh1%7AopU?@#-?iFg=AWrZC}Mm_IR>%%%*k;baQU z=GjB(c-^;f=~LOh-$|?@UrBpjSdEqFIVnKJzgD@El69h)h^sdFfc%Jc4WmZETfF@x)nD*2QS? zHu1!4iRT}r3Fu%1AANQ5YI#k`N;RoQ2{xW#J+wA5US4sILI@Q+eHjNDdw49BF}{CG z3Q7}^Et0Z{&FN$cQvk*7MmDh1Nl%RL@T!)OsnLUB_az;{I=U8)Ffx#!n zu3D`tJv5%NRF+qsW+8`BmpVA!KYs$H%mIkQdk1o4lYlAJZuZDJrzkc9$&=;N zE0x(sJ!|%CmK_vN7U!V=!-B-DUUF0UnGSsyLUI^|jNh2w!3rr#M7XYT6!pUlJ} zvw&%;arPs*)VXp@9oO2HHrD1(U>{9uXE+J`RBvfw$HV1mVUUp317}*&q&z2*alM#N z#n=~(<%MNltTMoEC|rT*CcTzJ*j6qDs+=0$Mlzi#Caq;^{seRX#8jwinX}Y)wI(^} zd)n5rB~GlTy=@_#H?*;fvL&|CuG6vgv@~e9)ziw8j-IEbidQ-{?<9mXX~D~+ z){;~rl9--(U*v#jN-Z2;Z16X=nqvYNj&w)gI~Fn+)L>~E2Sk#=bD154w=9g|^7_(V zxes}^iImJ-?w^0Sq*-w?i9#4hXXcj{DPE$WL0cqB>zJma8L#I%2-7+>@8^v_HQ(fs z!Qs`K7k*mcCN4F>{Lc04p?3{S^KXFt$?;T$RWtlej&0&sSCJz@$1*)&Lna?u(a+fq zMOq=Vc`RR4Ga=CB7M0oP%eneQ=jyj&Q832k$`s4#PJNEJ1NA2EkRUFh_t&sxe6!li zT6DaA$&yu|rCwB~B8?|KV~;~1={ugEE9JeeLeFB4G?jMI+PB%$P}a%(!?Q@OvRNxt zJ8<88lJFK&$}D9}nJI$DQ&Kqkm36=B=o4>YIH?b7q4qG16;v*kSY0WSZ5GKWKh3Kg zf8w5!nzChenjif{m>P?~w!J!{&`uplCLTjnMm9*%VktU&FO@dMr_HeRaq#(!g*!gq zQn+byj_l&+$U`CUHW1RK>ML%(KiRue*-`YkSY}Y&Hx)GqYOh4ioT39n$ zy48_nq497?bCS3UbRfR98Db-tcPv31Ej!NYjmq}M=&HM$~^yZNWW>Y znqrbOB;8@B^zCrI*NwPL79GlEVk(Mv#5*xo$KfENxy}eF%sqB`e}Q?;E>GU|vY<)~|;{v;uo@gh>EdFWq) zMoS8FCXN}CS$2(tel%aUsEgJ_Sr*Yy(G}Z@fd00c(!>Ao#yHMINwQGi14!=?Y7e7h z{9}oH?A|=FpE99^I>Mfr_`uHjckfyuzYfX&D3M1q2;l68OIp6xsPcJk zO+Ee#rPks8VBVFdy`*<7)X|f);*+<~x2|(R;^KUDDvu7FGiHa07M$Co03C#ujRsup!)?q|r*@W`HBDzb#N3xrma0Z+ zwUF6z@aJTS+rAEvO`3L*K!5YdVyBVx645&9r7S~u7(1-<_r72FGHA=1e0n=5?2?ddqkaCtv%c~F;ZKhu;v2iI1gNVP1 z#ZJek!cI?GCY|`D*9j13xtFzWhh@}MK7R1s5@hqSd6JNejS%SDK!u4a9~RJ{SXZ&^ z5qR}tyb_z18HA%|%Yg3u_NtI+(boflGXme@3^XSf2MEpXF+EgjsW+W~`bHS83F?gX zS%nd-ccH50mjx6Mvu_LdHZ^NmR6@wyOtQG(=DVhsOo);279$!87-e}luefMdFX2f) zJjb$#)2YT3q9Uo{*#?^}jL}d%CnaGnkTxZeBDZ`T&x!O?P}tHUGaYqTQuV41B*v&N zHu(-WF_fO=OE2V%jTvz?FlJqoYlx}U*g%aM)0(Gm9nlUma7P;~S_GF~oC)J9nhi&? zueDeX=}$6%^!1Why6bs}Coe$6B~PD-T0wS~npwoZXe2sf^f|h zSfZJa+QJJD#SYc0hOKy1(p@6o! z(;+AYpEl&RPb18*)`i@2OY`Y|1MKx+#jEIGez){k{S1wF@-cML#}tV2i7qq#x zUTE;Bmq4!RE;O~)$uQKzN*VK}SKh-E8zF+(h;g0Tf6cI)O-8Q?Qe9-8o5@mJ(9@I* zR*~A$o;*z6r4o1k&O&x_WIwbJ_}_f$wy=jHgQ`E!6TYdfDCF^|*i@BA{NrZI_-6|` z|M79ghNE~(4$7Z%=MxPfRK@`xR-Q6Ot2*r^ zGtF&^t7g2z} z^O~$S$QsDDrJL4v&@+XP(-C2uGs@*Ag_!)zqbN>+2SJXATGW(Nm9>;)Mj$OJOYKNS zk9^{0W|^n@%tL-wXOhE)Eh*X7uDS0#H1iQVSfZP)`9i#KO^DbLnm_>INo#4Yq@8Zk zXo~yDCRPC0)N+<^ttEzaTByfaP&kIkL>iJ62FGI9F z=kpK~K?KXY3t>eq!GuKV|7M1AOgH-FTxE;wuP|@^XMl>OeDD_Te$OtRc z_zA>;5Z$)7P{Si>$C_*X-)2U`32*~rb z0WC558Gw5<#l>dlg=31qv^=)Zr!B;2xz+8|kTWICVuht&i@+t5oLZ)zXnEz+x6GtW zmXShMMg7xSPvu=&!q6LUi%9~s43n{y#bDT!=?ia35DExXQihOFvZNP% z;y<3u0>`2+4uz!IiHq1};^^}d*{6=9G|rhh9%nu=vD9;o4*S@!Yaczv8iDqxIwD!$ zQgNYJc^aikKQUo(wltpKN-{idXZRr1Y>TB8n9lH~t8CfaOTH{&o~fG=P5@+`*_O6V z`P8O42QCIh@RHfpVodjGu#b*8q~JtvcoZqy1qD((n_Lh zT8z@Z^0nGtI3{YoQ@#mVsV+2kyUGf2z3h%6x0qx#2a$^>9Oin+ZJ(b=t+g!i#2ZEs zOq|Rf4j0;RC3=GpP3vapNm6DM+NlZ+N>jcQo!3_;u%qS1`!7^%Vt%8OK_PS+d7P6m` zrn&D|u!XF}$xscO!_ui61%1ULHC8-f@qU&q4#{EPN*ihIl8(5`3~dy@E;K)P3?jJ($>XvW+_HajnVDi0gk2G3~o!tpy6 zj_+pwP}rBP|Luxd!N@yIT3h_5t(keIIqbGEnV`2Z<)adrg+8Z8SrylYH4(MSCoZ(K z#Olzj=A5%(6&9v2Y1EZ&CfH_W(#rtqisl~(I}59vRLwed&ZA6ck8S05ic?Hi9wV^9 zX0duTi3a?>vUJ886~t&->^1UNn~9uJvxZQ?D4Z8`=NOw}bzHz@om60i`B069`}S{- z_J?J5rmx#M#aIs8Ms*fIWE@BgYhPB>Ut!rzYe!*owRCUiq^;Y_)3r?_yZ63>`beX~ zQ~m&=cJ6XwxOprh?D&xP+WKeX0Hyb9e}P-HLVHLMr4CeZGuipyHV93QN!{RTB$)th zT&^0Xg||aef1)}6GP%;7iXGmT8mLD%**&*%Hj*lI7}pLKcwuAl%ofX}$;ce?)HaW% z=N%p3AmANdFv(`orxq-Uw%>RP+iqSy0#}VjOmrAsylp`Q!812@RTOqHI<|5psSvrI z48~UCQ$@I_^J{IPZF(lFqHS9D>mY4d{PLk=SjjmQZXTYJAz0&^^Blp4P%0~Cn=uGh zn*wnb_gvXpCtf<{41m^=b#eyrH5cupx3ly&KRb>akvgJFzu>HSQpfq=!zFd?0%@SP z^D`={PeEe^tX&`Jovlb`saly;!mUh!>2yD8$5}1^X zin_K{t}y!NfM2lWyBnwu;E-~Bpxv)wlSs>#+C*tOG9 zB;(#rO}QwE94A#U|G@qo^Y7lxB5Jf%aeTRL7I`o^f;3J|4O?L^7Z(M3B(hJLNb0MZ zDlGIhLs3DbYGtHT9f9q`VTQ~QrM3?2zj<(Yf1mqz;rQ^bh2s&nh|Civl#6c5-`%XZ zMpqlZokY-k0q-`9G;7uYd~8!4%Q4HDIuyCqhKD+v-Gr_xGhp49Joth?rivt0Dw7yX zpR?wbg#XY-@GWH3!GNqg5;SiyTwvH{IaMcH&9z6c_xr`kbT7}I9U7hC5CFw z%V#Uo>uvt`a_0SN$p*Kg#yNWbr4SoSd=rjlMSZ*bwju0?=O4Hul*Q3U<4Hvp!|EC8 zugOGiOMJ9r;rK}3o}Jrw^ljcA?VaNTR*k7P2JI*iP1*acUoPU(q(`thcKFT9xup^; z97huc*=&(SPYGH-Rhj1F)Y4X zt6{gEqIfSRE*~FxF&`fZM<`R*$7~`32#r*?%P8s(61aJuNjn(Lm(M7${ewHB{e5?A z-?@EPXWdcltRSeNeW6xOXBRHU6f-=8Ezv;)!HGyY%ge2qhW_iMzW+dpk7;LG7CKLU zTPbz&qp5m_eXNBo5>4m8_0Kl;FHRZa7+D3bkC!yJA%xk`T(I`;afY7ZWU5n^QD}xQ z96q*#tBf)Us=tswz{d%+okewN8&GgjkU#|vZdh=A!mr6!qm}K6R;6s!S^rV){+6{w zD^Y`n^6|$ZlGR-V1r8Iyb+O*ysrX~Zx4_*K5+^;JHs=3R>&{RpD&&?UiFJDw&KFbU z7P;@G^bhXeI}$kq+rx&1<6HVR546ne)b)`-Q@fB!wAnG|3ho2jI9VK&oflwk$eMw# zYGhwc@lqW3rs*y*Ha1P^NYrDWPdQ~O`;N+~QkkScwKUTO5@jmf;};!?Hv3~3SQ)`r zMT4bJI~#mP8wqoYc2r6;q%%Go8C_}t4!X)RlVh1}MY||kT*KmXUwm*e>kl@?UFSOb zZ68F-LMnrS1%ioapK4jG?v|>+ds*`*q9DP|gmGa5uaM+u8F|uO8BRC(%~CQnymHFA zX%f;_3~PG`5q&QL@g;96YEifCF1@$XT-+`ll}-}gNB5-)(sbLfR^-UGm@sBb2T>aM zO6?QXut7|yDyK~`6z3Exowk~Q&^T2-vuLG7;7Dmo?*WJHbaZ+SdFVIJiB^`@7FJS6 zE2FAw6$G{Uoz^rv*_ct~wAiIsmRmtdY0L?Wpef+#JYOgsHXkwCHo*UdF$!n0GHtQ1 zkeL<;u}@449fzWyeB{S#4ks+!S7j_vU~4~ZD!PXcajr(f>3=q0(Fo}?TbG=cR=X+v zR!oVHIZQYBP7Eg>p`F>d(({aw&WSKtv2wx|H&%V7x^x~D(Mi#VlQnj@lt>Yd5W6+a zs6(;qt@^>H=dS+DW)Mn4KUD3@<<__fCLCXtA*O?g!uJ6X#S6z-^(HEjx*skani*<| zM1{NDrxx&vjr9pwuw}#)(O!mBPN4cAM*(A*dZyfd;%e0PO&TZ^HrFxQZ42+!Xot6Y z2vnKObfVLHl?O{q!C`pH$FXY%Pfsn0}@$^@W?DC)gQ6S#A-`^&wMIQAat` zf;t`v&6H!O2>5OV(^Vg}z~-=R@b1t__|i?Ppv>7w<63_ETPkgWy^%@ork-z2O}?jg ztT-|sHX4Ms5CdtA19PmC0ZDnk&532)T-+~>zbzG7qZYT?*r*aNazyiaxA}vd)H2Fu zICr+l2R@wqkVMxSYG7}^DbiZR{5`hgf{*1WiD$IXC(X)5b3pE7jxLqV;Ba_X}y5a#9k z2WByKMKF1i!!rsvSsO^o=hT1FeF;khU=`S8S6{25fPtTU`!&JB!DP{fFzTrd77DoAjWWJ=49rOnRCW-W9uFdF69-H%ZQ#og~i!&jz0X zZVuOV@OfNc4W0nLA5@mlf*ZlV4|v*~Bw5Y%8^8_Vm%+D#&z_qk>%k9#>%jj8uLRe< zkTStMG<8A-An z{3@vS9ZzPJTLmpWD0=)7d;z%nOmELPcoEm11ofU1Uz{Z8g0BSC-kZR4z<&aJ!INL& zwYz6a!A@@f8i zD)=i9QYKGY5@pAMV^ihs@qj|aDe>rs#xUp9B6i2n!{@1XHm4rT%;c_$;ogAYGbV4l4hHpz8DOaQzz)R!g3D zzPEQh_&lzMKprJmhUqiNEJLpz5(WT)zTT`}TmM!+StjH2EyZzvLJE zr+zvUW_b$O0Dm8RJ*f9x531k4212Uj7&>3=TMCL#8=%VH59;~ffuhf|mwEs61$+xA z`aTr!pTQHkJ`N^VdwW2&=arz|w2zG<72VVgG37CR^4xR%31XMpBhY$!)2i4A(gL?n#K;_>DD*fj{NRs>* zoDD8m?bjE8;>(*r_4C(2)#tGgOXZ#ksy_Xo`1DF}E_f@Lf?oiY?nj{HWfnrO{(K22 zx^52FZv`a}?*|c?);HQ0;gL5)_t_9Uke+ixn9)nU)J5K|Ze;7n%ByR&nr$<25_s1Yzmz<0eQ~%Ziz6lh4?f_NZ zw?R~6@|cZIuQS0Xa=imox)#_2-UW*O-vZUHUxCW^jF-Efdl{(rz8MssJOq9VJZY2H z_m?0lBAMTpB(Pv|3Ag~fA5{JS4utf{3H|=Q0dNl2*MsWskAn-r{{&wI_H1@}833Qk zbrV#-z7bTpw}GPj*FeefFT(Y4Tl{@51|>IjQ0eXgmG3K{`scsE^TE?DND^2yX@X~f z`$47q2`IWgcdO?=2Yd2x6|x?T_JeV+=~KLb_% z^IqZa+W?AgSAb`M4}t3UUxJqIBG*G3K+$U_C_Z}!D1P_^cpCV9Q1yG-E4^N8LG|Nq zQ0;mrcry4!@Hp@%;IqL;Z}av&4-}o3f+@Hed?vUHd^)%n6dm6OJ_Gy`_;~OK;A6ob zgNwkQf#RciukvzU4nBwLCaChR2j_$LfNI}ggQ8E@b`J1dQ1@4XYUgh7x!`S}==>0P z4EQ5Z_4rp%<<7d;%RL30$8}%0emy9<-4C7seg{-J{|c&J&#L(Q&jwY_C^!qe3RM5? z1%DrW2o(Lk3M$<%z!SkI54fJ013r)IO`zJ-1l2Ehf+mNc=>3>M#}pKu&IMKO04O@Y z2~@sYz#8~fQ1v}~$lo&r9?$jLK)vt1pz8TBD8BhQD7u|k_4`XewWk3-0o((2gKq?t z{vJ?#^9@k#>e}J`*$w_4*DnO01fBsN11uzsCwQ6D&2#i zL0C0ufGYPJp!)IGpy+Ty-SI^MUk>Vd9efISHP{2*3_c0`0;u|Y8&r9}21Vyn8cxr% zLB0QCa6Z@!xDQnSd<}dd__%S;e;O#dy&_!i21VC>puI2L|2C*{lUF+(p9-oTF9aoL z>p``@8gLXubdnbM8Sp#cQ^1>=&d>J*d^q5DL6!IKpy=|aTwWQ}78Bj`Kj3vkqJczB=IT;3-`H1$Y|xOHl26;iRYE1WImpfx3SKsQP{q{5|k1 zU>Epp@bTdH!~GwD;;UbPv%n|pay%YX|342@eHVe^)2*QTw+X7ew}IlH8^I@o?*UcL zec;oFf!B@T3`}t47k8=H-*I`@0 zZ-S5{nf${fp~&Q4z+1r`uct4;$6d}C4s3xV;OsYey6eF+xqbpKql(EAa0_?<+yFlH zN*}KdfZMqKAb1h@fEWUhpPt2-nwv>%i}WRdC@|^ac1%un+txcq-WY zW*=uZK(+q>*bhGQEk2%YfGY2!;979j)s9<0z4s1qG5CAeI4%cO?>7Ye2B>l10(>I)bMO@KzrnM>Q?A9g2e*OG0PhFaf`0}=s^s{$c|ZO!cpTS{xz68v0=R(d ze(*%_O7LXxJ>c`e&w@SR_rcBJQ?B>+?f^xP&w=y76Zg6wwhB~z{s({NI+W$Im33vy12KYlz z^*!;OUaytlGOl-lr-BDSmGe*G`UIHt#a#D--Qa7$7lOBeTfr}ZF91*ZV=r$FC^>r# zI1l_|Q1bFQa3T0pQ1nZ0bp5dmd1K-Kp#H+erT2T$PoRiOA{7q}7p8*l?S z?`HRxF9R>+`jg;n@Pv0WMgd<6svqtGF93fHt^xaQF%_KL3hw0k*!Ot5UkfVVec%nuu2f&lTpMh%U@prp?oe!#AuLVcIhrmVP9Ed8p83e^2e*``g{3192{t&c& zxySqSMzE^;;3ja*z22_(fJ?dl2k_3JK^8E;03@-V&^U>=-@zpm#_20t%VY~{a zT<-@Z|9=CDj=y)n`DP9Ha;_)C_2)tL+s{C?_kvHjUf&1meLn@oKl486`7Qy)ub%+V z2Osq*=gXzwXf018Q^oc9t2MSF9#(bH-e{tUjd&8{vu#9<^A>~ z@LcY%0>yuC0+sL6pz{46a5?zQhn-I@2G!orgHHng16%<<{&TK})`JVVz7kY94}wns ze*~uBzk}W236D4(&jr=)*MUpH4}t2Ze*@K?6`%KVhCs>7jiC7YbKncWXZ)G_VJ`*O za{V$;`Q8OC03QTZpC5wH2cP~0Z|_;)i@DwfZUFBC*MYwQ&jQzc(dm69coNqi2GyQ# zfs4SdFL`~IgBNi9YOn@=0aSa=__EVu2dMYH8$22O6sZ3DKB#hz{c|sOEqET+mxE6L zKMfuWei;akySy|x_G z^Vfp2!8e1d_Xk1s!#{whJqj9s&HH)l*S+35z#g985U!^{@%zugi^2KdaD8zdsPcaR zs=S|qPXSN=3-_0MLA7TUcse*4@O|J*x&9mQvEZ}5>Fr6uNv>Z4_Jj9;WfQ2cb}cbpIFpzhxaD&OCNF9LrJiXRsKmCO51 zQ0@6cP;_`BD0*HEJ_Eb~oCAIUybSy{D7y9kwe#gWK$Z7t@NDqc;9T&`zwzhW!Q;5T z22{RV!4ts0167~@3vLAG{jHBnUJI__`X(?1{}EgTKK{Gzzi$MWaeXhi1pFEJV(^Ub zIsaY)p3n95;Hlu(!KZ@10hRA5f9LJm42u4BZ~?d%d@lGIQ0@PF@NwY3fEDoP;Os}y z?!Wi^mmT!_-T*4!hru(zuY+pWG2i!oTm-J=dK6p^ejF4Z{x>)uJpCWM-zwl@u5SW$ z|Jwl{_XF1>XM&<{3tS4`2d)7B6;%6Q@mOZi&j2OIOTov3 zYeDgAf50K|iCj;B$AFiEPXn(4j|blkc7q=VC0E}89|s=uPtHG21drwVSWxLt22Tdh z2Bjajfui@@z$b&B0v`qHPxXZzY&@VkeVO9}99M8WB_`th1swY8=NRYs2+zhje#-e{ zL0H26c5!|S$IrPsk)y%!GOpv_D>#|pm>ce`=ln0i`6kXcaQ+DRT##yJf3rEeEnK}L zq!(|zG)v)q@i6yZ$njzh@nS#tC=UI72)u*iVa}!h^f$z@g>%tmGk876O3uH;k#a71 zd<%#Ep2>BKV;SeLfW;o(3x1a4I*#o;dn?C!j@NLEa7=LYa7b^&zyILm+1%UBp}!A; zU*Qqc;f3r9r<~W{1e}Cj)^Nv?@57ljd_wc`X zNPkn@Ka&IXnEfr{dMvxbUUGd&;rg#QU&}rHNq5|DXYe`qM#KG`-1{ZRQ@Q>q$D=vl z64FTze};Q^ftQB#e*|70p8sLMCigB5&;JZe!+pUd*T;Z=2wolTe?H*jxTn822lOjw z$jP(9#cezr;CLrTFUKE;`}cw;aa_gmzd7#Ycmv0eI9@`!5%4^Yn>oKp=in5$44e=C zgyZEL_i^mth<{J!x#U!T@8B5Z`q!Xr&wkE3{kOpy@cZyjwf(b zIR1p=(;N#p;$K%d`6T%JmAkk>|&8#J?KnpX1`=;odjE|Kj>aQ1(ZE(*IxO`U~J5j?+2x_f77-g5%Ace~9Bx zIDeBKgugF>|BK^hj<@kle-8%ybilK@*WmpBfbUZR{@&_fsB!OZ@LKTCIld6mD(OFSJiu`p#|7MfFUOUfU&HZAo^v3{xb0W;6d>D9A|OFzm42K5H5ZNp3L8(5BTp% z+#BQg8t0z?kLCCP$N%N}^&Izb{`X)4>hHtCt|gPotLn~hd0-BjICZC2}p)wI7dFk0>6!LnLwu+ki=4yCpF_~b;|st!)n8ugZ*t*zB} zR-0*Suvr_QNGtWBbgVkoXzoeJD&u;-&aZkK^&Pe0$tJIE)OEkFI+3>j^;uPT+Ww&9 z_43_=qmx6`v@viA^=ZvZE6u@?+ODc9Fi>r_(jCplSX!B!XdGdI)!pNb=ES^oe6&LA zYxRjnS{u`?bhI|mtk9-fy){v-49!=8Jw277p`O;n&|qbBw5Kv!tF+pyx!ekj6izR# zO^g_Ybkcy1=hy3A(m%Nl9D0SoE*;7FrEGcB35 zcz!x(sJf#vIXW@do7h&IbyHT9PKw2aHZ5Dyza*_qRL25uXor- z?9=ttU2yp%byAYFcf*PmQ4CT`H!mec{YVK`s|U8Vo(#PfE76>+Pt?Y$J>#wF zy4ac)n=~|(hBRq0jmZ{GYc!9v8lf*lJcL{1Y3r=W-aBf$C&!EAUDl}2mR!_#rrXgV zDY7EWIC^Mww3vMQx#U0ZUge({sivWi)rJB)Qy85h@$MOKA|1QWUEG>zqQjz)Trg6t zTV@bqu|qRlPy}^Me13B$}weYTzYJ@vPZh6 ziE3_))m~#vlFnJuw{}yIq-y=pa+xkcBFD(*B%LOjd1p=U<&JkI>!WH2!i3!zuMXCB z)R41Az3L<=*Jrw5OR`&y@sV0<0!sz~#D(hk#*WB~N7^l}u*AQ{a8eIhF9o3twW;o& zXjXd0t35;2fyv=wvz8nAQq;qMRF*%7;xd$%iZ2HyYokNzqGGN?oWuIDMKFqVR63{H z8lUf)(N$Tw>t@ti>E@Xgmgy@j+L2bPy1P0!IbnvzF{V{pu*doi@j!I z8aYeD^|5MwB3<07y{7Ey$S#<7lO+ln8_mHgK3R1bJ=fd7@3V_$ZDLP4I8q(l*@C~S zX|)br2CGA!X{1^i@9>Vi{$_>hwTW6~G*wlkLu7}P(Tgx%cTZ(;P^{7FcrhxXHBrG! zjCwbekqeBMw6i8Zak|%=)n*f}GVUuj)cL?k2{Q+}doiPxCazO>S5F0&t7awG$?{xK zTa)AJyjHra)|{B6jUgLyTh24%)v$SXO^8ydr>CdGwc*OZo{1>;W0gyc3+2qA09*L> z>EimN+;1n6h!Y?9{Yc?<>UdF&R_Ai4pNbl*)oWvuV<_oYPu7}HWY#l6yEq z4V0g}e|gw_%U8`$*Ehfvt{WP~O~C0XdN}w$azG|~78^Br~TVkx7t#KVl)cq|_+X@KaBbK{Svup>Q8?n*j;+42?n zXilm}?!tu3z84k;BbhpE*Jq}Gd_a!Y4T?47onU;|p1vsRmbakx5HDAS${5OsvV>sE z>%C~v;vmrHZL^|OMo}I!&P*?QK@_HKu`E+ZJ&n;JhN!6U_P;*YSEkyVm*O+X%v*<% zg-#p_E@IGY9SShyy zFAI~K7pEp3u1J-oOrf||QK=WXxWC#&1ER+Js!ci}wRE0Io=4BnB;$Sg#6500;^0+v zxPSy{Wk5rLELrd`TET0$bZBg-NdToOO<*SyN9;G$xM1136c?j9s@I*rV)fePU?4VP zSRI>m&Cpt;1ocLKC%X89X=B`?MtU1|2u^FLEg^y-F~s^ccZ@bJWiWtSDA(Tn620GL zikzd33f^593oYE;y(KA@Fo8Gcg95s2M{QzJ+Kpc@Tv6aAy|}x7_K~OdKCw(1me%U7 zZMv6a<9>8c_tGOTP`c8KDHNS_pS7FO%vcpI2Cr8~Td;Wd((V(M}LVqb9gfoVONP zmf+W_P8KsnqmD3^_43*u;{NDu)|<`R(2#~edz^&U=SP#voSkNP?Ga^E-CJWa4l`tn zozS5H_Q>ieFQwQBmFjJ8t3;`Sn7~eSAskvw^WM)#n9?iumK_bkvX{0MjYv(@#)-%U zqK7KArIP8YH73o(DV*E63T2ASkf=iyV-0y}@1nG~QWxJ0qalM?qHeh4bv(?T(zvd= zd$4NK?iqJ6y0MYtY%#`QMX@6kYGEW;9h#qR9IX=eaBi2(4>blSHA?W1g+}P3L$i4k zYP%S*un2*k4pk>AwNYs^RW@VGLpN)g1OgW(lkvb8+|NoliVj>M32T$wvS3;Y8{u@6 z!SGm`ad1=tg&njhlTdr=@ojXEyq_5Krr%W_Ub@G_A;OC8ji&$RbhqX%l0(&+92_z6 z5Aq%pDB}(rn~RL-%4%~W&p&h43OaghTzVQ8kob_rEhIW21Q%nR7k9U2$MObt3~e8& zv_`g%HX1vLDYi9_8fPgi*sxtb$qcEQ)xkz{X#4ocP_sh{*h~!zvFR43F=t!3G8Xgc zW~}an3dzyXLl}+DcSV~Te#^Ay;}|X!X1Z}XR!)(6%$Y)3^hw=rdOXOweRlWK+2T>7 zK7CxTX3{jB7*q#NusG}VhZ+Gl^}O0_(s7u&ZU(+yaIL-zZ*VAGx?)+%=u|RW?1uQ* z9AWidRg%`8*+b9M9%J6)6c9oF7Ct8|fG$%+N;R z*KOEzAukducwc8PwIN_$Myza}IlkR^;wZA2OMav;b5_sVbhvkIlz-Q=!eaUAK5QYL z_D~i_>}ib<){!iG${k0Xa=cbGCJG~@LKzGf&}^aPY2{5c&=8ou?3G@F&Sgobh_|W~ zXsTzC)Xerx%hzt`-QL^3VH4iYv@nk;g2tik=Z-R5^&^g^p=jy#}cY=YP)~*43 z^PZl`dJH{hQBoi7$O6aOSkfjFts`M9ls$+>5x-T_^U>;i+f8*kI~K}{SxR>Fs52Bv zo*CX)WabQ*Bp3Y<>!K|EOolp3CDPAq^|NI4>ZRK)DOMeg=>{*-D5}S4>`-h1iEu6H z+zO*A4~k5G+>-xVjMx@lA!)>d`)ne02Er=PGw``{3{24=KdP{?2^RtUeFBakCEO1B&8cA6di8MSIXTV!f z(gLlmw91kN$bpHXhOC6(Wt&7choJLvl*&Wg!qNpRUQyw~-*fSoy%o1fHHW$NqZ`hSBvb_mZYVTRmXIgFb#P_rv++fB4Vvj72FjT zPe{{5l{i+}i3PM}P{rY0dot-g8!k>D`IF6RLFhwi=+2pxqf(d&HvO9$1S8c}iqiZW zdMlJIgPeCcZq(A*iaONr`?8frW{AlbV|y^O7nFJK!PrWnHwN_zQA9NioIr9YhGWoU zlXvxMm3fGYBT*`Y;sF4?&&iXOzlc!WMDWDRJl86xCbak^Nf!)Eky=? zS>yw0v!&uC%-1}|r=wM?d_E%yyShan9;#^y@2o{>YiDhITGn;JbZ1}Z7?wE9Az+g%&P7WU&r`HK2xZLEIwu_>n7~RRiHm{>J^e3j%RRfNr!W&jZB618 z(adU{bG$&01%fa%&v+5P%g!v*6%|XKb^s-g~wfB}r6A-sJ^9)DzQs#h%jXZMv zWLI(>st8Q?=pv@cz?c5RCCpp{a$eQDo?eQQ?}bIxvEkj^o)8%SX`hK`ay zzg1!IqX?T@`g}AIr2;$WGbC0dLH!~5bqp@lTQS@f6ysI}{X1AO4-NE7?O2lWW@Dr_ zfSXDEQc-JUU#KPsMy3KL@< zXxE~Q#u#fypscxe4I45RQp$d9m5_Fd98e!zOO{{R0M`8-TB+Gi%fnlOd#dnL&{WY6 zGB(MEv7TOqSv;jYH;_G?IUr$4O0(oKoN1JXHnC9}UF3dwTfUe`G*ZUck}#IfU(mrz zifIeIm`#sM4@vI{T<_V7BR62h6$c;{TJECmE%Um!Y_q(hm2nJJ81;8b6<-?DSZj*` ze!3rPO*CC$3Y&H*wrkQ?!qOL}abxp`s>D;61s>c}qC%e9LMYIYPHka6GQBj|7(Z;5 zR%4Roeq!cBq_+9<`R-=q6p*V!J2Iw>gS}C7%%qlGAHK7th$FGgtAOPhf0WiJ$WaKl zyfcl;WRx4H)v6w_iEbk5J5xy0W7}K1TRxlT(qME(eY4(9A|K`gB`}9dre2KGhVsZs z-)q8U9WkGwiusOFukuU=#mSdy92jFL;g%-T)TrqRgN}52L}ksA96DVbf6tui(x$$^ zu(9}@Zd@SEdYR3!feP+nTm_RZ-@0+brv9Len)slsMpdf_@pi~Z(9tH_ED}F)X>Cvg zpe$A24_ zuP%+EV;4wYs&h1~;GT3MSm-o;FW?Tp4HC)^L!1SbSx(}$OcH!#O{PIG)AYyWQmqN^-CCrQ1h<%QW;#@wiTQb47Gc3`pl6!J@jfq#{xg=6(Q(8DwDTGLZ2%A+-mTGc5 z__x{8qC$h@lJVJ1DP5<>`XVBhQ}B})$N&VF*jU4Yi5ireHOxLLOL~i6L$Y2@f9Bo#Y4~5XgoM3VreSUjIC zHOlU@xTCO;KxSCz~;8^p8UK1zUXRr$(A=$mu!h0aadn7v)AYaK)5~ zRkF+nj*vT(DJ!jy1;b6;O2yVFWdLrQ*rU`6<5a?kmup)hz&Z%Gg03hpvJacmzWxi> zF5i|YmSs|wyV9{yJksZ>a`s>iI53W+mC2rHnM%XrZ>8t?H-$>cXPVV^S`hI3=-^s`7AxtGBvo=g6)16|`oY2s{YWL^uX#D^$( zB4!kt_FV!Wn$^uT2K|?%8JDkQaVCpG#;k3(vCF<9+=A5;d{0HWm7zu*brFawZJH}R zyk-~H{FdSsRPM0fE}&OuP?zydlrtW=L~3{_`@*@sbrWL$INBz-%v6}-q4*F%#OA8{ z6P4D^bQFQ~wK|9kcQsxK1ry}l)6Sdr+@rZ}*Dea{LDI{ZUK=Ouu`M!zXzdf5w$P)k zBT7|KGQ|eMT3map5qc8ON1B+Jd2wJD~= zoE^wPNZ(et@CwG(gIf4OS!Q**TSu0v>&TM1f>MAutPLlhe_}1sk9ILCE?cCm|JE;A zw>(*aW8t2lqQ@(w$Myda7`+wxphz05@U^_GKI2`NzM;gE4Esmgnj67QFap>(n2`sn zZE^=6t|lwjZ)O!^DlaYjhCu%Nkj85kVrb?U@&-k!!|D>FJ@EuNJ3$|W6u!xZEvHa8 zeFBE54Ym@08fKHV>LT0;o|8?zREhf-cCklpkb5UlVy@$V-aO7Fu1`K;T2V zxg@lu3#?i&H7B`*a+nO z0S4v4XPfrSNA$rM>J7z=CTTO|)Bpr4**Ry(IIM{xe`R6agWZVyZ|fyIo^3-(U(ioO z7O&sDZt3z(=UM7Z0PQN9|5hC=+>k{GY$&K^NMt;sQu5m|82Rwa3M=S6+oi;A#;rpR zleaX7m-LltfholmZ;YDlUA1w+=B;hUwNGE*_@V@BxojVC9-S90pI2dS(uXUd5{e!c z1~#9(z6cR3*a9sN+~&EWzb=F9B-7WTyX`aKEPv8x+e~D`yRum-I>v1Y;jjV?DMlX= zgge=rar=p&SfnDlaED4LF=VhlQJp|g(Fd@lFWL%M<}>D_+$??~KO;)7jbB9KpdrYr z5shs=;gh9ql*9d~M>>ym`uwX)I6h-V#q|2Dh=lcAE0^~t{jyFW;2VpR5_csXgX`KW z1r2mqEf8ZlF6lw9&rfVBok7GfOYJnBwnKrHRtT(|W6KY;){Tf6Z}uRTma~Xh`b1sk zv&rT@jU8ROkgx4d_Gr3sa)3`G)3ro(`Mf2Yzd1t-8RuZdSlK{W$Ua$`t8hK50-7;Z znBtH1QlP&wfGbD{4Z8wcqjxb06MG2t^f$HViuwKu*tWtA=?caL=0k)&?4My^neD4ldTpD$AI#TQFy~`XMOGWV2RODms&16s+hrtBq|9v6+_l z^gug}D6*}qd~Y9^D?HFENNBgQN}j3Xz8KT;L<8ixdQUwSlIm+1h|Jnv!h0;WDJph+ z02QxIEAtzq!)E9iekHgT#o)9ScivX|pm; zMY7K!J+Kfu;(~m%oKGE;l~H18&|#SaZHq`M8b0#2YPx)_7W4bEU45pUWthGgpjC)+ zYR#O!{;Afp3_&Z0NRoJs_(%Wpt^KU7&l8#2p#OsoVh0ROjJNPfkpcERimQII9Fm7@ za(v~+ly6ZcNw3#WvewAc*`R|@GpebGm8&3^cT0nCPoH7&XrO4som*)kyNXj>MwmF9ZcFl}X3vxGU79FiQ(8!a&nI_v zdc;?8gDf1>+?0QNkCrSsrHi^JlQ6ZQNJ-n8@UA4UP9h6r|6P{XOLosysVXDC!uQHE zB_Y4hx)vl7xkQedV2cli%vi5)P-lCv9N1xr8UumVyw4NtBocT zSEG9-_)evdkAr2y77yC>`S!^(z<*mC5tS=~J;i{ng6YqI65GIw1<9G8XTu z^=w&x{&1r)%ts(vZr+-Y%%0b^ZuPq5IRQ?azp$&iI3{VRIT%G0T)tjg+HPGn2`wkSP|$-b_QqikO|+OvXT59YBxZkMfdPdkSV1NG$G zh39l_?FmsGHFIraa0N@u80|0TYjXYe6?cjl{Cexv*k1NHuvHzh-aO&;`6A@h-M-J}4i|@vO z`^M9Og9oljM-CpiYmc67dH4!AnG)-acxqGcuctf7%!Vvex23H|_N5Q+J$T^l%5$Ug zAGle0da2fAIx=-HdCE`v?G2>6qqGs6O^mF`>P{J@36q&F);13A-&ac~ngQ=`x6Hbe8`Hw5en{} zq;c%;sCHi=D#)5X@*m`5|oUU1epSxT4 zt!A_$?D7b|Zg+k?FO7|gu0;ri;ffUZczpPJI@?Mrbc#Cl+G6w6#*uW+*uniD8;mU@ zo~Ax%E8Ygs-rXIG4npC~v`m}3!4CK2TdTz4X52n)jrZO_rNPEW2M^qm)+IzPofA48 zcj>c*-a}Kj)#i20st?0B2=^WEwyjghdQiPo;PP^lX4*O}YuL!t`^VB&Wan~kt9HE5 zIC^wy|DYsg|2}ri39p1NZm!w(ju6zlRiwxzBTz~O1a^+~HXQKttF zysKtAv#c4Zl{BL0Bn=U2&1ze8PA0iQSk&Q8D7x91faWcZLG z6#ZUkI&~i_)DIrGyzXKbUwu@2MfMljY6jVk3aoCX%oWWowIEl4?!)v@bLv4S%k(wb zvu3R=7&P=FpN3LeOSW7#R<|wvRLYy zPAx%HL=*J~Jt!U5HS5qyE>mEyp4?;f&DdV{yrBJpBI`JCE$W{lBOOM8rDJ$bQ874) z2B!Ae_R<=N+kBGm_9&IH-TjKw<`phZk6SR7{2zH=_scLAy^*Qg_C&|W3Zfs1vgJG% z1>7P&fBm}Jpstshl=8aQS5tPSDE5clxN@bci4nOjcXA`^M%FHH%ENo7?g+lP*WLC|n!clD zf95&m6-wO~rGoD=C*Y2OLKMOxS zfmvC$`=yr>42pY{w)f>4_dVUe!>d5|;hkwn{%S^=3;{>cyM4>KsS!qA)4=NWYy(Vx zLEFgAM*~*r`mjO-8m)-+OzPDp2EzqU$m`6cN46!VNr4SmbG_wf$gB@vOQsC-e_z;6 z*XK@rZ_K=ynTNf$KW20oU328Vl-Df8Ko6(+1BZBjl+?bD;zD7*Wo9Qe9SSIDW)}wa zw8X8bQ$u0--kEa1w0EXUYZxMIi@LcZkERzXP*W7|ZPT;_+ambnO>ryCS*vpO=n)@h zY43OplC&r_{2yf|cj0T#b1}AgI3NwAGJ}nU451bqzZDEYzwM`)i`ehHywXORE(tMYO+sgiT*xC-QI`k95nLDq zn4n&e(0r%OP=n~&FjzQv0FiWMzyOz#8e4CQoz6$L?%lY(fAxAU)=hmxUdVy#jPJq# zkn3m_Z5PhyscNV=^>J;JjViIhoyHgwP1947EqudR8Wps`k*NpjjH4y~E{`kG6^cgG z@medg``5VfrxDTYJKJSGDkHsp<6cl4Rr=PQ_L>eaaO#`SrSarbDm@%&buF&Evl7sM)0;P<(kJE9-J$k@584fm_u# zw_~7f)5U`Lbx7^HI@Z#;mfY{t*{wu_?Ehjf|1L_MR_EL|{cVc3`c5lTF7|ci?{+G4 zI`oQJel|0p)($3>!~uILa!-0 zkxU9;?oik_5@%ytDKyem*diiV`#(0$@YN?};DM_`q*L;^|854K5Q)OF4z1WmwU3e@_Bh|@YKCTXLtjw zPceGI6)20T_rYBR3+e5!0q#*1ZVFY#^}bRVcjDo@asJvGVb_{ikTz-A6o|i*>+Bo& zu-hJdY>tZ2wb+_sT3bx$TjCxreQ|T#8Pi5e(VQz}qH$e|p<*{42lpRP&p>UJjl^LdBqSz@u4QViDSj8A(@K2> zEeLf)vA-SGflC>Z8L10}wyRt`2knXEHk7YDte(m}%&IKTt|TPxcazxbNt9W*z*JT{nIS7=$Z?FT$(&Vq1Q+S`_|U%rmCx8;P0efVTEa4HMeGT{e6>2Q&#z(6Oy0DJt-7p#zP{6vGK_k9DTk%6$?G>kp>`4_`6X_72woQ+JQs zIML^xBcBDqqY=^fDso9)ZFmna)Yp}jd^)jU@mUAs>kf&j!wyePd&c`A!a-eZhv}A9 z0d{^S@5QRx&Ip~hnWjftl^T?jP4Ae?cbxWgF^y9f(sXb`C5le>LU-lG{|~Zuejl1w z%hni9Oz;2BIYhSL$``W~6CcJ?HbRB;T2fou3<^?pu2aa+woi2_c_eU2`%UBGVy#Ol zM<2m)AzbFXJ7Y2kpfys)KGAHtldC6pO?IpWqu*N#zVogbmWO6r%oL@?wRl?z`6ALI z&lAGohsdB7K!hR8GZRr`Q@AS7y(GecS={u6r9#02&CPhxJ7||=4@h?`Hn4u1@+kI1 zaf58;`+e?~MYBXth^s>*7H;xCGYTOhQF>C4sp+OW_FH{q>VdJax`0w$nt-{6j*=iBEL?o6p#Toi(nF=%+oZ1i7rkFdKp2|H=i=h+S zz9n)_NSND2Xesx?5;|LX&(=pOlfMP;_zH!|$R*wbHYyhzYVBvNNvD*7^Ny0YB)u_Q ziz@Yb1U828oyO;A&VUfU4{I_ekAxs^o+k)o2>%!lsY)7A2lJfir$}_ipezfzORTO%+orD$$*G}96Q!_=#TxQTgfxZm zd|LyjB`w7H3c?=PRh?Rq``IoE;XQ}X?0cSfD8a}D|8yJ|=)-_JwAgq5xL(~!zXeKb zaXkEV`E&;`5M8DwQVveZ;#?Uc1*VLj9~4ymw5(zSG#tcHP@DPD{ewr4+;W?HXt zUI~su^mEzYy!a{^!S)3>fuq$u3VdZPEwAQxfh*3+MlItzt_S)+o;aF0jNhx8NU<6b z$%cjwj75P(HR+v~ZP88*iFsoM!b+#I9?=qQ*4Ig?Sm#mJN(k=Gy(KM3YA)4n9Vi+Q zGcW}wYsm}wrUiDn4KeRr<6dRpwLZx)J-`-=%LY9@dT|}xxyT^=G)VTE*n;;#R2_`7 z;)f^2k&t~#kW+GvNjH7IFLrEJgF;_*vz6_Po#FNHE)uic$)-ewaHDawyBD$&6cfUi z?TpqPHkE&PuLdr(nTTqUNrLCfmr-b3%>E~1jphCDk&`+}p>QWdROi&LZN5<*A7`Yz z?&?D-rFn+D&x`tKdUE-MGo@|k&JMe;N|5I0lMhydo8HgM%H21@M6^`PkQGK6BuZ^- z4#n^m)QJQ3zF-rhj2FVjA{JpRI_IuEVv_4rY0M1LH8k~M+G{~&$T5wXjv!|-$lgZL z;`(!|!ESv9kTu|FKO2EuF$4+>!cI9E$>oq58`a@$m_V_~sNbk8#TkmqP)5?bJnO=-%G ztqi0xD80iP;*<^dr#*G)xAA?cq*PV0g6@uEzc9CPj+}iW_%;>u>PfMSILt`$Qg3c~ z5>Zc!OS4okJ^2K^V0~J>9D?uf-h1>bUD6i1;{r{;D zmL9^pOd^YXQOTwNHtBy0j84U{f3^bNCoGItO|Zmy3}CYg`8O|tauTy(oa9NA^m0aA zTXw6emtwRNJU{Ne&rE~W@ZrD z+4RisChlXujZkJCFMg*Y@xGX|Ftu4~h^8OQS@TTpH_R~e=s&JNlf%kMj3ngFeqy2h z0Y9`*SaqBcRn{|jU6L{T4TazR;;B&VQLVqS+OU*nCXZSl%J}MezUsHmwVzlhO%>!G zqJ|5iyKG)8Ik36x3;`0t|0V5+GjO*CCz`vog&)NwNI{9^ubruur6Q**+*qaJS79#4 znPh}uLQ}nKE$mceR!+xo;MQ*DVg7&gDlQ=-#-LduTjS2+2qI>DL6fbpbtaBUtSMxc zp2|K?wO^D#SMi}pheAVVVf#L$&!zOyLgz9S6FESg3g6xAVr{Z5G6;nf7qn+|_Ay0= z++?zavGxNAv>==9C{GV~{@_m9uTYo>26dDF21TfYEaVlYp)Ce)W3=+e$Xfdm2Aq*@ zkXx&4ttR#gd>%HB@BAV%Da~PLC9Jg4tTXgAbroM5=v@ew6v-Pa)PZzu<;0YMCKUhM zkDI*cSYnwKoFMVXE!3LZ>M><*2D6^`KtAz5`=tw3D)5a2y<-tiQv$Y5;D|D|y(J@H z_O5KXh5hnH5HS4r~t+yJM*LLSl17dSswAl56EX3S?Z zF$FK%^BV`_sM*Kn(cqS&-;v5_mo$?zh{oc<7US{oEfTdLcfsY%sH@L6>`U&f z-(yGQ9#2V)hp}jJJ&Tneeu5(wTwns99P)f|lM~hG$a3Vvbc!Z0RVZOiam}x>NS;{z z!u|u+Cxx%GSXt?ou#~sdX(Uigj{#8mc4!$a73OEu?86i@-NqF<;Ry1FcXl2(97+EC zi)D>xLX=y-2a=h)@M|J#iG?yD9ezV3XhSy?;ll;3A5vT~8!m~I_S+&I%hICbX<0HR zb1zuzi|2TkzLM~t9?6UHA0P?Un#pGgKTP7hRsL0yNIFviDnMj+Qmdlmpi4% zbC|@4-Afr+ptukVXNl(O$WNVrv!uixZ5*2K_+cCg(;X@`n`}mYjL8d5axui2{klnU z+$w)=#;>5lkDU}kMH=JB7Kh(E3B#)5gTy3-@f#kF_=3>pur^)x?kGgvAX4!sP(s&8 zixt!=LDUCv!!UruU5P$Xy?RO7yXxS9Hz#XWAKd?`^=bd6shfI}UJb_xKLGdfDvQW# zQp9d3bj~7{VjqQ;yz7*etEkx)Fnj_>k zVJIllBIT_(^WIu$DqkK=4A>fz`Hs=_+29ia%0$Ati0Nbx+|$nJ>*qs*_TX_LQKq90 zT%{qa;ysiUmAm&yp)~||Si7!)EcIJEDZ4c4|2sj=Gew8yzeXVA#^|pwm$9sWuJ11b z>8EYzAgiSKckat4d^i90F*!Wh8hPn*ZSt6PA_Kp;#e#mjg-<5UU9kNIlBLRtLxwe` zkQ>-z-ddn#seFpa$5dHfh)QS&$+jUokBY5*_Dgh0;4%x!?Cu?M>ecJ|6CF8@QD?$I|E@azYRLPp0to|jMefwNcKK?Cq z)`{vj8R{5z{p{UZYc}S;9pl{JukMrMN`P}CtOiq|9Qjs-2YmIWU77ktpaN%@T$3~| zT$8@ZWAs7DX;Z<;G;zd)T_X*DUn~*P=r9u%pJtpGY`;bd_vxz{7JoxeIKy2z8yAF3 z#Suo42}@(7qe;u_!lpeXmY$;Rs*aXN$h(9m!`xJfQUxh@spgFF+EmwXTiy(8F1xDQVc(8QD`eFu1+8$akYE$!N}G=L*Az`qnF+E2 z3vNR0looinW4X3zmDuh5-ZMd&1vTL8g$}&Nhc?oN+51%6Yzv&C^)^ez?l!?-dmkP) zt$$mm#B`kE>9)?$N2dDD%U;KxM6l^#Z0X<(+J9 z!PdrpHVep?ngs#z{DERdBq(y%o>;lva+S5?MlsZ@mYB+$CMCuFq}-8~fg?aE<$%7p zGb6mcrC5<%5VJH|2XkZQod*J3v~ktJ{eQBa-wBc|-c#9@CAWdA**cTYPF&C~)sZm8 z)=^D9zRV;ryw(Oxyzu7n?0v;d*<@~!R|5l<)n>A8>K!RN|Z-)3IV_Ikp(- zdpD-qqoIH5Y8>?Z64qwr1!Ax-F0ItuJ_&p^TUXJU6UQH&3pe!^Hh*>3u%wULRejOz zE98N&n5N=a`ZjE!&U_L;7=3Su>ga=p;!hY+ea|=3aFh<+?_}|Gr4>l>V8p-{N^Se9 zO^%;UMe5r_^M^{yF)W50xLbjZ_*)V3$wObvO}QeqFe_MmTZcJUpQ`dhN#B3{?cs;8^$SR|_%or?Vh3nRM@uj~S^h&wN{0T=mIt<{ z?EEuIg_5n+*rSDv4uU_S)JmCcQ`Y!G>KLMHN&(j+ba|dr!oP*31=Sz=^2o<1)!gd81@r zqKPAt=sURV1Ndl%vXEvk?|n<#mm>noY3Mre5YB=!z zbj_*_Qyu>!dXl28$^uPA^*evS3>&SA@w!XxXaqH>7Hg&{aO+Q{$wA?mC%IL)J zaC$$v03qmYg}0(1vw&OV(-Ko;qp+?lf1KfVLKIh@h&!ONHpjLd zTyv%1!!*oKwyuR>7SgkKFdDC5Su!VFV>p{IjR{y3fCh^}mY}f|QOeD1!AHdxh}(jQ zAs9}_FJR;EU(LZQ*{g3j^K~I}5o3klEJuBWG9J1A;DL9qUzsjDxc~j@lU_LWk=wW= z#P!zotDJ@ms%)Fa&OWO7orm)`R~G|h`R6OLe0**$M+EJ6O^hotx@TBf=jY$dHqrns z+K)bV>DvnB3)`s2lhfZz27!jbEKIaJ}j_cd`<*vi! zXz!YX3NXzO#hdxX@hv9zMLlP#+BB0kv+~GhTQLQmD-L?42>0I+B4!ezo7v2SCHIr_ z%rdwy!T3TeuAGT=L9{{(GbJ+2s;U!-gJnjPVq{NERm>12T^qj1!kO7;i)J)%LzgqW zN2>S2#5Myg=RxNWNZi7HnAZ4?UbxHjv{L3Kwm(WBK;bI_`Gksd_ZJ+9f`OUl)r8L( zLRjYLG8Me~#D^N^YLsyGlI^cM*pgV2j16+4f}g5iE5n68qO|twWpZc>`fl!#WwoCuQ`UU! zeFQnpAD8(&Z1wVDW7^^jLv}A;ydG?hKHx2DemdKhq=0p^OM8>W&gf8vJ+YnuCSOOjQmDZq2a;{_TnQIUCrm}=|+{|ul z_Ki8e?M98`7l5V?3tFqtPgI`GkEFuymNPGBoA7S%fTkA`WXdy1A8YBPF^oxGbQLHG zZI9ERtR#@2kD`LImO9N8L%T63j2+sunLtnL^{rA^p-Lf6-s0;zv=dt-iKoL9#!L(1 zl0z0CMeF_rF{Cj@PB{zE20j!m-|~1x=HBHo)>33ZEX3HRpuhViAVkKfbt!|P+!$QG3{Bc-s~3B1gi1%ts_?sY^WxXU#X6>E zbh)Z4WmP@1qg3U0#9DLxuPQ zYu#~}MFMDZYqG^IZS_K!6UylggC8o0syG;Gtx$OdoZ5c>j;>@JZhOBoz{gRtQ>V4Z zm27w9V0112v~L!YUK`}2DB@sDGeRjp%JK0%wqg3U_4C|0)b_@s&COexN5nn-W)um0F3Ro&FZsQcq|u-DB$G&p=&1#hfWNe zf6T)dJsRxLP<~!7ytqRaoA;Pp5FAd8@|4_vXKE~+Vq3j@WMh7`d~LqO*|K00&3>5A zRpLO=oNRBP?E`02DSWTzvM|k;f=aha{O_Ms%rAC}lhG!f_47OAVu&E6UErx+7!rMu zZ@4>?Ww8~JNin(4T#9TO48%!sV`Y?)?Kz;I^h1e;UxDh78<&MJwY7&X(iet`hEAWt zKKy%&W>9s2Kk^^_lfT%p2t0tYgK4!@oA`WyMFhr!MQhlhnAmrPk1P0bz$^e^6)R

@@(5K}bLVFGo8I!a&u zWkY=ZwqS0D^}B*Tu+f?9tFS!%deONP`k}GQhHcEbEh$mb9wk0SA)kd`&Ji1HfMzGb zs~t48uDdgh&eh$v&IcMyCULf;uvRelHHt;3NUvBTKh*xaEYxtjf+Vphm7jM@VosIU sFmrm^%k>bc^JMW^!3Rd>aJhUBvqcoDS@$EzVBWx@1Zm0SmbFy>4{#99rvLx| literal 0 HcmV?d00001 diff --git a/ld/po/zh_CN.gmo b/ld/po/zh_CN.gmo new file mode 100644 index 0000000000000000000000000000000000000000..39d17940d04b082a59ffaff7915a2ff1ce97ab19 GIT binary patch literal 24785 zcmbW733yb;mG5t65<6BVagrCuvExau?a08G#^5D(WFQtGY+^73fsI2LyQOYP9i(oh z7eIbVM#cujDq;4`fLXmDffp8uB~IeWB%T?+dCALUnKv_WbX%>=WO>==%l3Y!PTkwL zwSY4Hsr0}1R@JGhQ>V^3b*ldLy>H#(@cRwvI?}&f?l||q#c_6DDPJAu@80J)9|XS! zegO2qtHD2jGr;#>9IRCV4<=jpmr0m3ThQBc}_5)?Z7K^OcADC74)nRj8L@b7Bya&SEO zR`4!RoPEh7E4hlclfzpqc!FPb?LE-P$K`HlBQ2Ki{gBO0?3cek@ z6O{4a14{YnpzyyDl>WAZ?*-3*GJk&$ejY4}9u&Ub2@0R*gVN6?Q2N;h%6Qg;lffMzD$@BjDC7MRD0F@eiv0Wml<|HL z=1To3ptN@{DDyHK6uHcR((V@UJ>W~=DDX8<=Ici`|8j)?y}Xx$!vDKKhT<#$h0bbF z*S(%sSdCqd!M>!7svGZ2w*-ilI@a<_rPk57X_=P^*q zwSh7(J3*oQBKUsrTcGs+M;3npZsz^Bp!BQbPF<(_Ep~%4j&Fc;-T5g<7o2jGgYa=7 zDD*#XaX%>X^cpDidcn7YzXZ#`KY%i?SA0yrzXud~xE2&Xegu^9d>p(6Tm%X~m)iGD zpv=QD@Lk}GpwxdAd_VX)DD~g8D9T0hKLmdAE$|E!zCL!h&U-s}CGXFG)4> z*Mrp))lPmNl>7;k)V?hPXYhU&JOf^akW0NUf?L6BKkhjDz!P9KIQJf(+J z!TT%KAJ}H`+u%&TUo%DRc^&v^-k$~U123D(IKbK9r@;N-1K{t#hrs)%p_9P_AXDYM zwMxrR1n=Q}gT*(%g}lF;L45*j1R0`p3Z$y@3-BuNWB2O3%m#(8pRw2mevtRWAS%)M z68Hu1C-!@i&W_=I4fql8Wl;G39q?N4$DpjcD`2AV|2mK%I%7em$Vq{t!RNp+;5RJ( z9+Y_=MW^NaWbhiW0hD#I9F%^Z0L#HQ?Dt=Sq6a<#(_L^HDCOgzw6hsRG@Wzy{a4_1 zynmRBQgP6lN@YCxg87Zg5y&E|gxjPU+@P{w)lY{gGnTnZwZ&K}SOzX!@Z{LbR_ zb95Zj!Rz^62i^p>fikaM;ML&k7JmQ=pMMKp23~~_3SI~P6?mh?2SAzE77$hHtOKRo z7w!93LE*=5?e`DORlQOU$~=4u6nam9B7dEr^ye$~`@h@wcd)30?kMoR;5hImuo9H= z4d4gBCqWn7W51sVQFYFD!P~(1uo$JCDp2&+LQwJ_1BG8FK%w_7a6I@k&;@Utul<|` zNAOCq<;R1vE@pzl=Ov)b*G7vcLFwoBK;c6kl>YwI;;+GX^Zo}= z`hVp@?PobC?L7!y1Ewslw%-qcGB0OAnYVug{{s9SDD!m1r*)j8L7_XxzSn^=-VGoo z!PyT=f4>iY5WH-W%Fhj;w12C``#~9Z4E!J9N>IkJ)8c;cbG#n~rC#}8YrB)d_wzmv z6nR_>-T|%!ZwFrmg@3;Sr62AiI-V*}%4b07*CtT-*9A(uXYBhIEq>j8|0Z}f`QNkn zbBphIRQY%#DE*rR3Y`Z*k*`Id@NY3F{apr1yX_XA2c`Y5f^Px8L3)Ms8B+LH&&y{? zCrOh@dq^Fme1(7FB>DY4$;bvMGAX~&3dYCz70+T*W|97k zG?ui16eA@`uaowZ4v_jtzah!*KS(c`C;j&#a4m_YYkoKJU*?=8XMQ3F%Siu6U(J7! zg{Mgc`|V2>b6}@^_F*LtciER6;5ky7G?TQKB)|Vn!bAo?mYZ1zn?SKc^83FE4kBxQ z+b!+`A0izi$(o-)lHdDC-#1VAOW>WP<)roYn-2;5@aN$FBhB$Mz(pjNBsRnU?Y0k> zgBwX7BmKyJ6BuQmcY;@udP(0Rb&>v#B)_R7(FeaEts^~1x`!mcUy^D_XXS<8cSz5Y z8b}`^eUbFROCVi9i zL((+TZKUs#{)QyK50k!5x20KUk;aprA!SJaNcv||8Oi@0;^BXizCijsDMC6;T1r|->LHyc-A;Og z^mft=QY%S*?^bXcEq)NZk+g=CBE3NRHc5VUq?bug$_u~$rC{{^IG#UF`d9nyKP_GX z9wd3BEu;^Sen67nC*)sQWn*KiHkwT&>)qN^Q&TGGW?GtRQjM81r)+9EmC3ks<8|?L zJXsre=S6E8<7H&biZ`XwE$-A*vMy1dOH)0SaW zmNlo+S-%x`X(HR;Mw2n~kjiD6q|?3JIY? zCFwL3Gk2E_RdQX`f<=jPx=R&1F;cELtCr zn4tvZrls6uD(jm3+J;n$VVYuQ#N*u2v3OlH*O(nMBstUPfRsFh$=NYYtDINqCbIFS zj9ZsZHH8@Fcg~;Ay2P?vbC}$;RC1IsCArvr1gUYeDTBcb#u^*L#RorE$Frf~Nd0U> z+_htJWh#r)2eC*d9!=LaM4Hn`!?H;eGubq9>kGw04e_MujL34VB^hl>h!nO6*{Cah z5m`gTMmmAfq@8!BeXN^<^?r*+AZZ{zc^q^{N-vRgrRR1r(JSbdQgU?~czg8DiSaG{7tLqh zo6#;yMM!FLiN+XGGSW^Vha%)6SInA-q&qsEX&$G`QrD4PfwptQE*W>`5Ua%(Oc%A2 zq!oXl%W4~Qv3NwZj>yVbN#n+i3&vWd1tc#WP0N&-6)eiaNQWCYy4FsjrDoN;DB!V@ z0)jp@zraOli4dUQS(0ikfX%+B`(@Vqc7YNhY$1Xrn7sT?A4zj8s$-A)PxB)0Ji!`1(Z22#HKK zit@MFK8^UYcx^6gETSXkWpP3*Ubfiyz^Azw%_VWMZ#qrN6;_L7p?0V-n#Ks&wjxm^ zB3??UDrncui%yuVGf}izQJ6|B6R#Cdarm`v z7Mm7ATUdo)>t=DwF1FZB-Ow6GmUP`qMN7jM9Hdx`_ri*aRvafUGK)-TgoQ7d26y32 zzT_VbNj1jsEMo%}sR*<#PB)Rv#?wnvX=6T&w@Vd#%a}E;b`ggOjkKzmi%2Yo zKPzT8q6#JKa6d!=H(J9axH3Ew2)a6~1+=5C<=jq|F9gp#fRB zq@Nj>eX$kN1SO|dxJxi}#<3s8C$}~#9%v0)0Ck{69mZqh+&PVL*%6q28<#Rwn-k+= zMrd4%#@MI~TD#QMGOmp{9T( zVSpX6Eiil@oflTYix`Ax%G5COl0=!u(`kA_3*|ABSM8RUyEQHDWASv#ez>Ldy}~WB zZ&uZ;*>fL;1NEY{A1%*};@SG1F@#dYK&+kY+@$5|aAmbfm#j5Mq$CnyyA@q#_HdE3 z+Z1gvBEy{EPR5wL`ZzO?rV%YZeNYkWmb;Nm1J+Ikt0n73T(UV4H;vl06rz#VektWa z^agd#mXm22Oba&vm-|m5I2|c6OmOXPupydhaIM#%!<^CB7_Vo#Wq*NtVrI%JN}m%o ztiDJjmt?+DjZ5Neu&vXTY8HJeVpvi%&9=3{)l5G_S4w7}HxtU1L8qGS9!fR>wdq8& zb-cwWJ$~`pgLrctDX18#I|D znRO#6K|=_S=($LwA>P>Rmk>>s%Metc@7e`j?J|inSIna>8>B)u)Wt8vt}PJ#Ah{9aekbGcScc6w^A}IcQnI4qm#w!EofzD$aI1_0 ztZhu0i8T`D^Ty9ynr2Rzn*o`RqLWbINq?b4B!85P`<+fFV(gP1ji3)D>hx%&+DKOg zEW%C)dbdK%X4=qZ;!whD0GT_ZoGRQVG5EUZL~Vwq(ay~%E3_4&SM9EjYAR1wCqq=0 zTr6IT&u>)L0IHtY18IbRaZNebEn?tRMytUQLG`oLs&v072!1~i&Gef9mN@mr`a3DV@_o(=1!Y2 zw`%GxBJ2pVs*LNY$|;V z%g;Wl9n3gWXU~6No-;KZeKy{>t9y3)tRS;Tq ztl2J47a1~2dMtiwEl!+`>_**Ybcs=(_*`*pT}%QF#hrYyV38BTUjIAtBhglWq;_dt zJl8Nvw^m4zwcJ`oG?&J13|B?(BGMwJsxKpL%67zNU|$CC(dJ|Oj7b)^V_`LG zdB*Gq+|RkGbTd(yMFXj&HEfhi8h6@nDm*2oQ86-htA{Iuw^7?b&q6xJshTx^W~H>{ zRAKm{ZhbnHYj%v0&A6QJuxeP>RBBGAYGr5O+tu>S$V!ztReH7~0%im7KEs^pGiFwq ze-Bj7;z5?N{2zfPnVw2>_EdT}C92P8Mq^bREn>X~aY1n2M7Z>HX&eh2MPA35fphNz z^Ii0kZxm&{1@VvYv5^`K=ROoEO))PqsD<>VT{*;JCpNLaNyR3+32ep{{0Lj5(h|^Y z9E%W%U#QRaJ6?&3zi~=3W5adCV=;Rm6Z3Uu7)mi8jV2*}oLeT`Fh^6UD;967_7#V+mYSWm86LG0-ew z;sIF?&@)H&-u{{8Z0U?_rF^~W4@08k{?SH^J{z`+%PfK=o*)c}JF{`En@kW%j|)VI z%ts6uA&%MDoJ7)@t(mpvcr@gtiLLiD8&h}yh+)X{#wjx!31PJ}r*htX&YZck@10vY z%b8QEq{gyQ9i)clP?r!X5pN^e2sv9P>>LW+3ac%lPNw?(X3Lsk*P3xO*ZQZjOR!)3 zr64>gx|ENPh|gQ^>V--o{YS?BUqHnd1pj4ffOEbuX*I z#Ak%QsWx;O>-uLLtL7*9j$rkDEDfi6#;2+rJsGwzscOL-@f1Z(SF2AayEtE({q-b) zN-I3l6%*pp6Hk$2nFF*I%K#cB2N&aNIOel9WKf>i$6+&#O&q4C1XBYmsANOCN%O(? zoQm-eb?#($#~h^Gi4V-5HKl6qWK%kjL-Q8w%%mMzQzf>(#gvgzyR2Oly-}b6$HI=W zFvIQy%o-AUrgj?BH-fq*R^cDAIMq$Y&KahO$`GZA`!5^au*%f_jB%>XxoY4!$*k6; z#7)xJLJ)%(Sdj6C`s`HeS(LTj)y652e)z7OelcgBsH*w_-+cu?wEI#$^k%2pC|74* z<=lI@|2j`%9JmPe>1Y!+kFzX%?~L`m?{-^KITL2Xk-!w_?t$wCX3r|;OyXUoxoeQB zE0Y(o$7+BZ-8s1$BH8ZDL~T5oiDOzznnH5$Z`ii59YM##X%-jjKHGwWKQA4{M^MFx zTc6Hx+~BIxmNxl&Y)4n6c@SgGUk7C2?oI1WLpMcNeOX%q%hlIUg+}Q(`NO zNK|}qzeO)ZAiOq1hDSm38SSB!hCC4-RL55oTFacq+h~F4Wp3NBk4t10yEAT??L1U; z^@`j4QvXQH7|WcJn>)>DgyM!krNERyMDTt6BLo-iGkfkl-G@9xYz4C)m>g%}B(qan z#Di65<`ErcQ1>6k)s|4Z6V1wYf~c2-{Rk_AHWTB1V|2hmd_M6|?qRFvl& zyC*gg^V0BSnG<7cL}Wad!RgW~O@3t5EOYtyxnk#Jp{iI*-$Z+rL_5nI-Bhs=(4bIh zS8Q&emeGozVogf)`PaK@8LSGcqA$J|d4HJ|ucZdr?*!`#DxNj4U38HXTE zrb4nl$9jm&i$|LXvozowA=#rdY-Ahdc1UcDJ25fgu4Lq~hI{H$DK@2MJCV`qvu4by zDh_zUxbbCN6_cPyWF8^V3bVnwg?(fqdAD1Oz9zOfDVME_+*K?mo#nV9QpLtZ?rK!H zchw}a+&%N!R`#!0@2z;jTXCZAg~ML^DL(dgAN1N+duO-wZ9ZDqe^l14UQF}$c6)nT^IKQ-_M9xe zH_&^!+iUOYU$x%r+}V3>JtX8D)a~26H{aILd%Csv^mF0LdZ?&=xqn<+68O*;t?qSf z@H#enE6#eIXCN%SUUA6l-t?2RyGDBO?{%!pZ#${vTzf@L$2j>1t;@AHzPht#Ya$LN z$QJYq78O=K=dC%~-?}=#_SyXQeT5VIWmLP5!xiX^?(f-N=sY;m+iB2)ZH7-uS4ZZW zD{B4w&y;p+*gG~dbH`We&7=NJ=kps56;{3UC*Djebe?D8bjo%pR=+9p4zt9`o^&v+H`#T|kCMIE@pFO-+RF`Q0yg z9qY}VG@%b4^4q(_6B>}IJuf}_96Y;j|Bi$Gd!D8@`Lj$( zIILj1J}bgw#Ei+6BAxHPo*hst96Ri7Tw`g5FOi`m#!3qAe3{vRswkxHU1a4qJjJwo zyN`wk+1qo-JGix!o?6e0t4d?61xq-fsGmnb)DM&RCpM+>;@aLEUzuOsn%}+JTXEDo z(b~VNT@|)0@8FV&IDz3CCf>m#-tl&SDH^)ExK(R=U1$2wbrjB@>D#hSN2s^ThNxET zlM?Xu$uxRxd%PoSwYU-p-zig7Skk(Xu>{(?@~e*&_OH{fh)le4N{AW#sl+aMt*p0a zgK|N6-Fy02-;o|~Lr?J{^(C*AVW`6W$Zzh-uX~&k^>%OIQrNvyT0${FdXzArCj!zSV7_u*80gRULdotb|IDXw$bex)`hUF*5fw|nnT&hF$Wm-}WsJ#l-i0;#}dG=fj4QAr`t$^>1In z7?=y$>J53ttZ&z8Z^cU@09#k(_aDH%7B-w>(D_|22kt@dh5h-*yA0FHr_p@h3ol@$ z^DpclFb*z_k;~>_1vKe_jOm^f5>T{DMvAjs9LIkvMk%o!z*N&8st}w4{ z7pgVC<$%|=O?J!vh?qy8p{gZu|5=a&IW*KwGLwd9Rye$} zZ`an|?v+x+D9@+X$z!#ZKhr=_UGpl=JW8A028!FwZ$`^LVY`CbX725*Q`9a=f6fO_ zAZ3g~F4|8MY*TeEt%$Nea6G?#11)f?O?q<)3(Li}5tS0wsfU3ys+*MGx2n)-Tm!rM zxZg%8JBlL*@=te2SraStIeigZvmmT+TyxD$XA+u5uPsnbtsV}e<+~COOq`5*aG}7c z2EL6H3j85+&8;ZZ93X^5Ue#YXVyM$qTohVDHJ;r0as#zz38}x;xB3k3jZP^Y_ZuG~u1wg5J%a>had>!}*YSM91#Fm!Bz|>hjJ%iBI5oD;_U&p7svz zl=!J}<@`^(k7^%v*pwyuE3T4iC0`2Eqj0zprK91sbkg^<%oteJ2v~(M6HJ|nm={`Hfs|yVI~%Cmx@lQqZ6g=D?z7l zRU(pcNC9)-ks?l$AUXK^&wLiyZ#8g|o8GjtFTKOZQy=FOG4CY=6 zS>E;Z^q$)i=A9wX(dL~w$y6a7OcS-$Nz%2}JJevw_`)HA=)2Y=KgIO@G zbxU{GosnajQl;RvZww-tj%p>RuV+(!&t5A>Jx@B`!6*AVRt9=bqO|>wuY#NEeJUH7t_ZY*hYQzsGOPh~SK;d{lMNqr6*G2iP*tC6Zme<2 z(|5Mjzp3^eOqMP zi8L$!5olSoZQGEO;<`Ysi6r!Ix!`plc7|B9`lc5bOnHfN zwAOdzxTAJf2Z(v4!{%_v+jy?G=OB)pEM5~}p&j~2Qy5UE_w06W-BuL_E6pKupWkyR z-`(M8_JCtk+dphw-_f-Y*Fu;p;vT9e)gyP*9y^rsy4%Hk52vnV7J3fqg<9c?DkGSK zGvTdTX?t;cjW{psk6X^}I&ZtJU+s>@44r^4#?>lt9hG;w6Z`Dzbd4!LMXM5AvfZ`% z-sJfsFhM4Bcg^m6IOWr`LbJJaGzvAuCtZk2rl4i>YoF@t*`vM8V9i!35^uz}^3qnwv$ZsJIjHc9!qM7=3mtMq zbm`imvm_^KcX8BRI zf2_3r$6xWzKW8qZ^|$V1SEGhob{g$ng)RxCqs{Z}T-;d8s>L@E8|u>*7pCL+UgI;B z<=3vjteCKE;nd!OAA{B1na2BNVd!GxFgdh3P0#>~ReCRt-e9VYL+vh9mAA-l7tGZ( zT}@Q;uWOVZAEWR4IBVcq3=!e(T{zu1>}5_+Ysl+q11f1}ae;Qd%+8B7X;<)p$NP3| zmn&(-+Xkwv#pVZ_^so~YKA)CC`7R>8trA-aMTb=i#8#MdYzh$dcJu{41cdEvHM`f) zc#2XRXh;@L(k+?XQ$rUBsQAm1ZZ{S=>TILj#Ghe&-sGw`MPzm)&nq zci2!!hjLD^+gBr@tJ?T)-ue^$JDx?RWF*FU^M{~jUvP8JyCdLl&pU$P3UKlVg5c(N2Eh}b(%m4q_qrhXG&l+T z1egM^2EPV=9NY$83BCzV0{<4A23~c25WEOBgHyqGmIc8S@IG(_xE;J3{LBrs2|fz` z6g&a00e1}!g4N*7LxNxn_{ZS?0RL!c5PSg~@)@hI71Z^g`0Eee7zDR-{Y7vb*a3>J z?}HP;Ylj8FO0WU^Jov9*C3tta(fus=1+M=Nboqw|!F1&Z$ABk6(ffbFJHg7Ef?zzj z7*x4G1MdYd9T5Z-;KSequmhY5{t#6Dp(BIfVz3DmU)#WIz~{g_z$4&Cz@LJU68r}^ z9lUW=5Znbm0e%!b1%}{vL5;)z235}oZ#EnOevIoGpvHF|cp3PNzupAi%Jp$jeES7> z8+gMlK_C&B15#zM5M*eB{h*$I7i0*7izqA{1~Sya43HrT7J#a6Czu6)=~`D%XzsOzbq`rQP67HaY z75H9e?SAttW$<0ZB{cBL;`ym>IwLuxEe2;)C_cc)UAMp3T1zyW_4s`S} z8O5Iwp!#3yaRqn{*GECo@i(Bx;Wyxo;58GhUsFJpdm2OpgMFa*@ncYQUQ%iL<#XT_ zTrctXGAMqW16AK|L8f?cHA+Y0bRYPB@F`IF)`05IH^A$`UxVuB<@Z>*Tfk{t*Mn;J zO;Gan3lLEXu0tt7QZN@3ox4Ht|3{$Y^8F~uA>acbtO?pd_4gZ~lW*`tTn{GmN5Id5 z;_K%@)sq6n*ADP%@PxnqKB)Ho03w>f%_vFbYXMd6MNs#@0Ya)%uIlf-lkNEvpzK9lc{gW})q z;N@TysC-`nHE&mg7lV7icY}vO$@ei(eHX zzXy~&f3nK-#O>gFxUL1&ZUZQ~o&r_hR&W^j9e@3MP<$CO)Aaa#;AgmQ07cI_Q0=}B zs-7J9UND$t{2v5Q7egOO^DE?jps{CM3<2(gaKU=_$fSbTifCs@(gWm+j z_aB2_1wZt#$-`<;ba#Ln$2a`---43Ee*wj>aJKco3X~iz0Yh-Lzdi(B#Pyq?#_bIF zaqu6&Pl3M$)t?W3(fa>U@K&y`2JZrAfgc0cf#TC^pz1pYUICs2#izdq)$jiVRp0e< zjGm#O#(yNJ`8*4}5?laY3U+{+cdvq<1iuSj3HE^E*TsKi^nMByKSqJKfHS}m;8IZa zo&Y7UKLl0oU30D7%R$jq0ZJYp0X0r7py+%IRDZq#ik_!H@ns!25j+g4-rs?r2Csg^ z`hBOz2R*id9}a@x1yFLf3zS^^6{!CI6R3LLRc-tn28wTELA5&{)I5CL<7=SW`#z|7 z_b;HzUtMGTxfj%RJt+RI0oC4dfB(-w)%#0O;~mr*9iIR%=W;Zteph*X7`&J3YH%I6 z4^)3XS7-7%-D88tr@$+Cz8TbboB$;^zW}cRuS=O6R(h-lujBqwP~)~AydL}!I1+qE zz4hZ}Q2AzqSAkFZ``bX#^G)y)@b5wCyMG2H_doOZe+x=Z{~gpgUNq16bqy%_`Wz^} zJ_NoSYy&?CJ`Sqfa!~wv5tJP6^Z0H5JP$tp4(xAG^WxD4leczou*&)CQ((yTUxE|C zUx7^V;I=QBzqA&d!S(fz+VchAe6G)e zOcq-O+zg_6f?t4$NN{hf`AY{tJ^v{v`bW1Jwu37Fr{EOu+Q-bEZUM(|eFU5Y{t}!3 z-oC)b;j7?fTrUN$2DgIc;2H3v;LkwKm;VAq&+vuTzvbYiT>m*JIs6eQIrvXd^?Y)X z;T@pl;UQ3RoCQ_yT2SS7gQLK2f}->H9zXlI$xjNyQc{{O|}N55+8$tZ9r_h*42_#}8GxC0b_ z&VnPrpM%$eSANatxEs{-;}5`lxc&nuxf#FM?4PBe`0^*9 z`uj7Fmpx^4e-701`@v6wPlDp>M(}FzJD}+PIVk!1@YDAEVel%hSNrP&p!oGq;I+#4 zjE(Ef;0;`-K=Ef4cpdn4@EY*@pz8TIQ0;wkiPe7xsB(=SUj&u^BzQ0QBT#ggJ!|Xh zRPc7LSA*i$H$jd6uR+y6bgAXP7ZiP8_Sfsco47s$ehU1BzrJLd@#A(-_h*2&fldB; zH>mp0f#Tc$0YmW8<;Lexpyt&VLCN<@a4>iVR6lZ{=(u==mHP}RdHMoa1}+3uZX2la z_#UYKy=$e_KN`H1>v~Z1ZvlsZ-|_gb;25s2T4nR)i=fIc14Z{AgC7Kc52~F@R$IOb z@CL5yL5r3I_g2uw;Q|>{3fXOe&g{I>#f{fpvJ2Wycs+MD*unc5d7cHRKH&K&%f>Of7j#BK+%2iCaZ5aDEX}gHO{L*_2(!k zy1oT|0{jgqxq07a>(3pa`Y{{S{Tfj8t_4;9F7VUfpMxr&2Sf0`{QYo?^=mYE2lum} z_;e6d```7L169u-K*`_7w_5(&z(=@l0Y&#;fokV>pz?oco5|;mpyX^msQ#=1MfY*= z{oq+p`tL8m5d0aa@qYhytM7JD`R@aj|3UBrU<$k#%!2CwSHP>l*Fd%NZSYd?x1i{H z&klQj6{ztW12ScUMo{(t0lWfy=T4*lYEajAg6iLc;Arrxpyc5s_+IeWpxXNb_#yCy zm#x0rK(#vt)bsm2F80q4fP=Vy43vI33yuOW+GYH|1Jv_rpy+$p->(LxPZxlqYrB8` zryl!BJc+8uL4EyF^}H?HI6w@^6`#WOg`=eb$<@1 z`MwDJ6u1k#9z5&uC!ogZl0C+k%R%+y29M?7hq=B5RJlrU4)`Td^YGiC+W9@Gak%VN z!%?8_PXjf+kAmXwS3$|gUQqSD0ZJ}@2&!L~?6vD_K=EN3C^@JBKL0@M`dD;H}^`Q2OX^!5hK%9x!@u1w*dqfa1f~z|VraK=Jh-K#k}7 z4_dj2p!k#lHGg*a>vN#!`33l1FgRp5$m7R6UInUOL%@%NH+j4Vlw8aOMfc;N@@)b? z0PX};?_vM^El_;?fyY1i=T{y^_P9TWfA0qM_X59LNaFVr($oC@8tF+=@~?-B%emJC zK1_PaKfjOPe?_X{`eM>j(#J_VNT<24zxVU|U0@yQ8q%|*ACdkalK%dQ^i5JZN&V5^ z^OX6b{R|!ef9!uh=TYz;(jWZw7s#(Mx&yqQq`$Rbx&N)}&yiN@2Y(v31w7kCdd26t z9_-|PqcZUK3(`{37j(hjtvsJ#Kb?MhKflX-*-8Gs^u_=3zXj7sCrAyX`Q&9O55D5d zbb#x*9#7KWgIv!5N0Khl4gWXDEBb_*v$Q9;2P5ZAiYkC{{EaFe@FU9(kICG6e+{+I`AjpJ)}{jyGXw$E#m%5 z;2F|Fet!ql-+TC-{6kF#e?gi>8k%_U$NYYr^q{||xrPWko4py#`TJWuR)LpL_i)nJ z`TZ->ExxVY{QeE;2tH20-bq(?vI z@74SIb@?2>rHl2KB~>M!>0V0z`1=UyVgGC!zyFBeJHZOlu97k@`|FFqlRQVg27~$C zBC^i^(N2WCk6dl&d;;54ur zTnT;~Yz6hViWK_ack_Eb=^B5%pWh$j_YiOlX$9#h>7yk5rFb@h)Wz>(?hdj8j^o~T z@EqyA{(cR(ne?yzTJR$2%jBKu@2%ta{ruhtMt`5>$6V4j?lqJCh~MK#SChU+Y9&>2 ze`h;%K#_4iZKH%P-sH*&89Yy>|^TJ7_^&*Nvn zH+inVPZ0Nj*R5Acmy%}qdt>>%mUJ7blJpvBE6=U~pCJt=y+Rtsy=A0Nlk`_l zdW7F!2LC_OJbsTP-Olf?kPeex^m+Li{1@q?Tpt80z&+qqq^C(!eZF^qmvJ5awfp=3 z&W%q-H^Do(KgU12%j0F>U-E3IzgG6U`8{1f`1?G+uOMw8J>u@zzqwrBL|X3e-KO89 z=(lfx{}}e`zpWh1hhOq_f#@MyfuQNj2A|!kN`Ijj2IAnB36(XetwCYcmZk ztzmU@UD%XrN@o^@P1P-WKE~==Cx(0KHaSQRjJmn^smY_$I~z@FR!kvE6=vp z)mAq)mRC16RA)mRGm6rlG8QUaH)6C9ZBlI&4leKzd#~Kb@wVE}QG|@Nh_7s=m6dv2|#l)j68u zs`MjSo$u3xu`|bp4XvrBY*?R3HzgPr5tnIeZf$5vmA7P5ZFT8#$6Z%zR9jtL=<|fh zJWgn+HJuqK%RC!Icd9NFWhH!yB&)t*VOvYGXA{!RgEcQm! z-oGW-1-<#c*{ePz8G~$RQ`MQ;`QH$ zN;RKfKEts{W)mZA{p%&71zho;#_9t(ofbmQ;CNs-|sTvRjpo zec@xNOpT_lJx9y6py(DzNNU;|8tb5MphO{uQI8lkDYtM)D%&#LG=xoQuM9kK{m$O- zfpq54usV}&L;ELY9t|`#wED?gvuL1{q4>q;J`_MEl}$H3##mIh4zw~)w4eRHC;d+T zP^(!qywSXmrdWtBZ-%mH$QIT%w$-J|rOGAs!<2>(A0CfdrDf2wOm#-W=hUJY3wTVE{V1MlMn*{Xa9(4&rn)gJ?Se!Y zWm*ii0MBb~N;S8lE*c&$UOuJp+=>}zvV!wd)h&HwFVNyNWphJoLv>@QS~az#D^<{{ zNGxQd5evpY8)-(XMpa~6t65R~Ufkz)pEAC8NQH z$+&{7c@`Q$jnx@eR^L{6H4>4EYj8g*<95SrTZ_ga8$Q;MX>FsAzE~Q}vh98Nb$}7qS>u;ppbJrkYg7m?Y*z5A1$_+_9?C+43lR zQ9X1_RW&sj>#vr$NJ)JS%@^)qCiPf@ z>-q(H=<51!^f0R5chOZ7)BE4)VsVA2@W_xH-PcV!cE99gn?uY$gg zNN|v1nIW?)MtgC*YmS>+sv{|U@i2t5Z-^vkPE?nhd*$iII?VODl1VCow#gYbG`FTQ z3s}FjtpU$hrRq{4t4>Q;d0iWhi;S9bQ*ueq>H#u@)iv^;;%t7Q%DP4L z?unBoR|YWyQ3I)_wnkgzE7VAHx^O2lylTUAi)71Hff{7&)6Hl^?_WuCp?ov-jp+rL zXc!GLxZDb-u9=imcVoJmwcpl(aKys0`-5Z+t*rHCs=?CwhSrL(EE`tOt8Qq{wuXVlBym^c23{eSk*_9Ebx?NuLTt>YRO@_6U#c;S(3OoV zn^=JWwjqXc*jNH^isXl8=}=`q8LU7|QpS>Tl{%f3^EMyw$>SWd~ zvH@@sqwWo~lv}AYzS#j4)EH!&FoSRyjM|c7(Gd300r$w!s3kVp3Dw$XZAAozee;Dt zN-8YKPQh!C)^M%VrwQ6DC?S*y+1k)Tw81molT?xmzwNPxbXzvc)i(*n9O;M7K1hrx zq|xye;rQxi$;~|UUo?Yi)2QBN%%k!mpCPrdHsy4M6?_cK*@a&QOE7Ay<(#7~6JAED zZg@DoF{QYTn=8^7b?MqRS*uPhIj^g+ZZIvOjgwxe^ZMkI)umdi8ycmZM69>-EBfMm zqFWO*Au{Ne61m`hT*KQKz=@LWl6hY|aa|5)Y4F@+0>Dj?inVR~#x$~>D^XE3E z(~lCmDd{A1$2pw&KUbDUKe;lg+H|IFZp-|-OdmNAHu1$r-?FTk1>u!};^eAKI@fi^ zXJ@gfW8vxhE^N;>V2vc6HxiME=S1($P#xpx!cn~+I^#vpQ<)4>%yL&&7d70_{1`S` zT{v#ygb)WwGcU=;=y6?jYqjHkO7o?(utn%JI7N@!njdXWFK9;ao2r}VK^%&+brJeT zEr=aeVOg0}_v5Kd+SOSV-c)j3oy|rrCA!Q4ξUKo%K{GV)pb9mf!gs><;*Crz8` z>x11+Y^TqdcK@Uam4rjjS6`u!hSYg_y_$@|wFE+(=}~sSCVScaL_u7aB9aEwlEfVi z2kS8LFtg;kYAuzv@uOd*IdP#p6>j3hxhPEys2AA;QPeH6h)SA?6m8U8QlCw!oHA|3 zL)0hVQQqo>E-+u7!AMx-Mhz8CV6F}ZBbcnG zG-BB&_R124^UJgI@wO%3ma~4qIa?Z1u2FBxC+f%;T~>3i`g#%P^GSqy)unkR2}&{j z-E^$b)SEk_a`LqCbH~q|HiOlqSD}ecLrcuOmXT&-x@vF5_j3~V$ULUFLbYxkhv|M~ zqbxHLyA)AO&$%*g`g#@YMA}R+GmOuDC@gZBF{AP)J5WtKm(Vhv9q%9QG{X zvw2Y;*tEkCQsi2^s&{I&{~`3|811X^dTpCT6-Aa6B7hGamW+z@Z{&D~<<*hsCB>;E zOIC`l&wMN=@|66bd2YuN?|LB;Fb_O!n)Q)-YN~#e)yR1Zj>CzWmCPm`FyKY(PXqpYpvZl9q! zm8v5&r0JN-;C4iU8C5-@q2Ae6aIVlt)v36K+~tL`je3Rj;R1F|oRBI)YT?m%-W5U~ZhlpSmCgx~>#3St1CMyc6+K*# zAx6^s;UgG{IN;5ZRZ*_OaTtg(exw|$M`ueODX)?z2+hU5PlaNZrtO$E2mmWA`pnI% zf##)3&+ZCyxZH9iSz>|?!`W#}IpPajOOZzfIZX;Oo3vGg*+&~%TGY=5?ECoW2UNM8 zTHEkPgGp9yeAb|bd`OFfO89^OPpaxb!9hLBVD?SjA9B|tgHitITR@>_2 z)_HIxZT@#nw~Df=1c!>PKe(cP*QII+nVR!foSmEQnbTVm#^Ul`T`L?|r2^*}hptqv7VvTjO8?Z&i{U{>g zXRv$Thq^U4aHeL1%hHlb&u^&V;1&B;?v!33GGK8Gx1aA6OQhjkIoBY~veda8v0G1| zb;0}wWW#%dH7QAJJab*)3w4bk=-c8J(iVj=*w}eYeI!bmm>8ZG=@EM29RsK79@H$U zCYG|ONqmenLTfdFceC$^HlT-V+%}F=L}|qwk~yU@T|KdTm~i)?1sjC33C`;%auHn_ zTJd&_f&gBHL@O_9^=OfbdMHb?V560ki!zA~Dj0Rp z`&fkr`dE6SyfK$03H5E*0)!0`gJKf{?kC1+Hes{!yHK5T+%`^QbxXGI$5A6uS=T#@ zts%*f=pVAw%phuW!MFZg**9lW+~=dwCNpI zJ~(~ajG2D3KZAY2i6`}{?{Y+GTnOI6l?xhb<;B#I7fnMO*+Lt-UydF&O|G%jIZ8N? zwA`mxPAamUJUbyE!R#8jnr5L(F%>`bPAqDsIEzK{b;P2qQR^F}3Wi~9|C>paWv5;l z;y7O+D|bsCd82{-T%NV2TM0($6t6m{I2JuFb2j0lx$}HvUr@cs zDxNTN?$pZ436&F^>uI~PS~a7cEXbsKzvJe&;V_VOf=~gd+G-!)b)!DSX2?)Z!jEm` zJaA1L)?hHUZD9lF;4xUqq_B{4a$Qh7@>BiHatl>3PKKhl+!FnemB9((V4Mz&M$g>_ zgIRVrNiljO&sCHS#!s6yb!IT0V%SVNea-<)r+3OF2&E4=cuR!NKboK7Tu?L!euYn& ze=hspEf4Y8^I&}PwF7tNCp2Hz|27bhV9j_mcBWz8{MK;Ph!MAj6Emq)Se34C#Xm@e z6XmoyRzw@jxe9<6n^}Ndx+%t7n z$PyEo=5p5J)2up(Qm3`gd7;_D1MdbqJJs}TaIcnY3tu3yP{YJeWpr|-IUF8y!bHwx zCJQ1`$AN^zQtnyB`TWs3ahI;U3$LcaMBPOIbYOlMbt}Sezb!IQPGHh>ii=BThb7A> zXz7+<_Z~nn$zll+x-p#G(A>7LMEUxBrk?Mgam)E0w>5Lnx>$F!qRDb_%GO9@ChMK6 z!i;sM)MJ6mLs;SJIP|U1 z&!S;rR>xm(LD=1w!8J7aLghmbOq($w_(Cex!f78~P>M=6%7Jsfg_BVNE>1)zr<&(s zsll7`=s)+grePk(wiKlDR!-JRv52+uWbzd#C~QZvIU-f5jTFrpd0((C6-?sO-RX8om8F%@ zZm7)$_SDvGcEuW7{GCV_h*JgcB+bP{&Tj7gd_C~nt(tYF)`4%}18Y{@Ne zJJ|G)2oAEW5haNh3RTs$p#^;uQD!P{q|{}H$#Tr{7N-mpH+hrzQhNFB#$>??^*^qSVQHs{z z>aG7YZCwl~d;UB=%AO7U$~z|V;HvIr4hL0}9-Q4PXqS8WZ=mlCm(hMw2WG4h@HYTvk7)2JDN5gCI3%zyF>zTRGej!l{ z$%1Zz^ixu{a%}ZjwQ}|Rwx_!h&CS9IAMoWU1=lKe+O|?u4;7-kkvWtbdbf2EVS$;MYIMCbU=`@h`WxB=!?<;8uV?*C z`QXteC^g1eqMY_HobBHjO-j=jDPcTb|hvcP)v;8tO$F;;uor8F&(-(AArf&SD z1A8Bx@%9hYZ!)^usC6sU=WDFJ%0wF6O1YPz{gS5D*X_>G$fMz;o2I#Xol)o4RywE9 zI5xH|sV>8UOmz!qy5ko^%zO0Qd7$7}6+*4Wjzr+{Fzb77CuS2-Cv7h4NOY<>F5uOY z_v|&E_^dN4ADqeY%0ebLqnNjTdWLSJm8G?=4bkC!`RJ9kxP-(gjsxB^J>ebyK1GUYMOW6wq8^HDr;4(+z{g+R_Db;y z!9jsrIP~v{0twRPrZ_}_)Qo)-#LX?)Bo;~{Fk$CkiW~G#4>oc3wkW`8X`1@|n0lgQicLS#Cizc9kY@__RV% z!`sS7++05D)^OzQ6*u2@<c$bblW%f$wzVAP z(VXSww{)f=d?3|OKDmw4JoBqr%#pqHf>c9eTl3v5wH)DS9L`)A-n!r}3fhiO`OH*x z6JdXyf@Fpd;RspuUfj@d^yBl(8%K_4z8f~QEgYWC%yVU@Oqx{X!`zz)p*1w$De2D;@EJ2}=EU;b3;9GbJHF+WL^5=?q9VMVJ&Qrp8~HX%WBEi( zYgT~f7I&E)GxE;RevTP&Cm(I;S+ct8%%R+p1GyzfyAJH>-ngBcohNta)-2DhdAe)K ztKB>I>f?oO5<*a^v|XN+IHc^Ow$`u&&O!3~`!UXNsu(a0}ZSs+EVcDJwU zI(;&C~htdR6C{b8u;Zf-~B;Hkx71Z#j@#ySi)dQTP29wE{QtFCAuKsOkOO z=r4YquD3{qJsWrTY~5xwb+<3cuUZOka%=bGmM=}pTEwmX_*C3ZZ#fG!OAqhqJhR0_ z%al>fjqcq`dp2)DNb>97(%kYxJU}Le1@^~Zaw+P5|6gtC>Uh&8Wq#TELM<9Z25U&} z$nM;dH_4L}XdVpBb!;E_7>3=i9qan~5qc+PuR7d)`UJYKh`@d)R+wA%8ZG6v>@Au; zZm#8yzux`ouKc#Onq0*bYM_kkJo{{J@g~M5*}^dv))Kh_azsXk5H zpr+A_xuXah2)o7V)Z(#@axCzdlF610(!mk7g{POnv zmgTu6jN$Ky1q-N$m3*EtpMRFP|=S+;gp0kGqyHLn&Ks>v8Yzw3OB*u`mW6 zS&cf(zjCna*r~2Jj#^z1o8QvjdFHw9J&W^4y1RS_QjX}O0yQ8I@z^jJ8+;w65l|58SEweZgFGFD&%by(gb%>j(EIPdNK(9X_iSlLgsCAZ8^gi31g27$|S*~sH)tuBiM0P+i0KP`XR6Syq|;7P%mAL z{p9s%Vr}(H_T45+u*En4zw&!`q7Q#{dXpLnyPnzEwfrs2KHLgS{`k2skB&Brg+;7u z%i^w%SIE(`b2V#gY{2JFzKl{;ZQZ9?=3X%k>%RaK=9lfuuRk7VX3@i=qMHyv6r^YA zRyy&M_Elvwf6~5MWDX!ZOTCUCYr$X+@!6N0lYP534n{SSfxdN}eQkhM=eO*${1hy% z$$bt6gRt||`ux_T-LIVEjGp@#3>?Hn>ORz-TT|ePddFUta_}>m#cJ)VustDr;zKgM zOX7F>=j4=W=p53hzwm%YD?%G~U;6Cc?t?GI6jg+|Rd3hiHyG3k8SegS4MXh$NJ8JonlI}gv<__;KDdJ-iMJ2jVKaGOX04+I+hs>mUyQPn; z>9;f;iRraY7=a~p#T|&m#HdfQpriycUP^YKOzJ+qz5DqM`OR1(o039>@6+A>G;=;` zx}^T-wtBXElcr6?osx{X<*R*sBg)Vx9gf~&M)jHRLNxL+gh>-po;$n2W?XK`tHeh5 zL`=c*CJNATBzNKj)Q;C6ID0qlluZ>E#xVC7HPgL+rA;2RyF!KZ939?=Pl?{>*{~(Q zere|^X5lMct6zr}I2?OeL>s#Iu5g-5FK@&G5cjPw=1+jit^)_)W&Xg<5~=4kiMW!t zGobEkE`3d1Qwr{J|1;DcZ)qp~1TW}v&-&%L-AD5s8#FzgTCpt4*5+Q^8KMc@h@PNE zrhn&&J^1up%U^>_41)g@jQdoKC_1>?8ctNj8v;5z-2YRmr%JssYh^o6tT5|ew`_?w zrn|puPiEUhlv(Ed^0UlW@)zHRD`DBF>#1eQt36NejdG2= zKF-&9>Rk7(Gk&U+4j{e4*!N>>0oh(z7$mD)frEX!MY4{J*`SKJj%AuHdatEx^P&9S zjis!O^H?A*-|?&zF@r ztvHGMxKh#3WR*iOVR+w#SPDZJe=Q~^#;PwVchQgIM} zbvx09Xt3T^9R;(;Pg3{Ef#^#y>=cB2DF)f-e) zbASAf{Fc*>qP#n2t2DHA$!{Ql#4XiAi~%uyAZI+C3Ihi!^M zRUvQj7h<9!rZk9H=HFVuh6)iuQ#1Z~#B&>Q8*S{vB$Fy&$DX(up|q z(9ij$%P*MCyLfJYtY{au0M9;Afy$S|{ zV86wnP3mc=T(A8SF4sM9(9Y9vUhG06O z!YN(!{TOSI_AgkitQCUPxsz-9n&WXjanvQZZ6yX-LJh#b{Dut}4O&c=p6pt4HZIh? zZyOAY`hvbtob~w2T`SwW9P7`=UsgP~{S}rsX{|FpT2-+Ad`!1pGspL+Y3~AcY?uA$ z#51lb|N09=)g`&;gTy0DcDKb+(4guT4!RRz*>`Mt+B$548P|v-lG|~VeF=mO{Y&Ju@5=O(-Bu!8EcX>9%M`m)elO5DQoi?*ZvYE-ol%%=^C6M#Sf12niF_`^ zo!|Cm{?(P|%h89zE6Y-#M4u*>SNpJxc;~DETNB-A+SapcIO1Z-XJsrXsd?2-;6t<9 zb&y;dqqXw2l3lZL$-i)fXol(MM7_+N_#VX%61gzWQHj+SFV|5c+LCaelF{Leb$cy> z$vFZOLe~f6%efK>;WO&2w-%1o>#ZhqF$GZ*xwXqW&%9x>7U_Jq1!56C?*k<56=Fe) zWs=$YB-UHZ!G+A&5i=o-Vyk+S-`r8FJyLoo>8_2ZIdD-RoQedaK=GSh?9a-s>hM7{` z$B*?aeh#ULPnw8)tDsd{)!0+2QlXYG9uhFbne<1u(`F!LJg< z(pyUuf*z}EoaN=6S;41gOjhmEJbt)Zh>#?7arg+XF&~-{Ax;k%cjXe$In&T_myQ0o z9=<2j>w`1-El+p9xDq}Ue{3c$llZKR*J#nArdFJR9Pc@>ZBWvpvBZxuL2xvjJ3a-i zcXAL$XKLK4;XgPNw|d@kp3hDtm1?>K*O+C-R#;`mj5vfsc3+y2Gq~hwtQ`f?Hh;Z@ zZXc2}!fgk^s))%iDUc+%^VF%%GackaZRC!el_9aEooz?W0JmI~lr;rs+t_GmbUU_% z7pp{n)Wm<+3UnWiiMd$@_}*kS}H5naQ0y z!&U|zj6X9I-{C7WrVY)egd3)J-IoN)6bFABkzMzlnWTf>R|L|1u_d?qXwRm7l7Yz2 zW2(B4lO9X0NCP-(TvXU;XgXkp6^im|%!NCo$rSL=EaZDJUF;_xe3`=WVL)QgQQ^2j zqYY{a;n)nNM6m{n%EVpjyFZGXzAY}HMl9^1T_cTJ_?W_)&J}Re!38yC@w>Q&yM@WW z~;Y- zuO{5gf%VZspiz`-*7v7nirr3^hfaD;<&3b{IA@sH=!3#I2oyD8wbM|XCE3~HTrA)& zl<0HsI>UMXUf*_$$Sp9N(?lFFZ4 z+jmymwg{tlETZMnZHh#s_BWg?OJ@J$YjyAC@MatnmlQ~|8SCuqsPl9Rd#gIG8@bkm z`CMC73@MGp(jmcdhkoULm}wB57c0zZAK`n@FC@mM(0xs&VBjmB{h*9wB7U~f%>1J@ z)#?J!b~6s0_nFtNr?J}Tr^bT6k!4_MQ{WSj<;x zQtUc2+bWo&V__%PVEaQqy*OV%%NMPBudzGi%GBxGGErmpeVMp14S+k-;mpapa$CKj zfPEz*cTun7t$6lNCWQq*NsNvdd#u9-BYAomg8Rr}s#-6A`|TN@4IS)G-$rhOeRhUE zm}O`_ff-BO^cBaXStcGp5<3;n-Ljd3dW~+IMcj4b3?4ww`WLyK{MrmV)#jvQBg^A) z?hX5eg96j_f%QDdKle&*%?3ZGkDe5-mb_`tD5LI09)5ta#7trO_N-#_*&jPbzzb&q zoqgSX{BZ8<^9({z&_7gV&6?Y!)iKB|S=_z%Xwv72Zn4rVIogSL79IE2bTXY(JeO<% z3~U3`dt?)4`j5?+o!@z4CBZXw-)(}$RR(OEE2QZ>=^-Z8LpddxTeT#&cE2L~2eqe{ zciVg%zRw*!fPxFWb@kNA{Pwj*q;0EN1uSHaY3p(;Uc+3@pF2y)j-u^sQRTKA>3VCw zj{du|h@NzX(oUT$vFmQq@lPzg(`#&H3~Y-gK)_A&*ofzzKb>2%-&)qQ-0BlN?&Dd0 z-^=;!J`!ld;5I(?*g_GVTZj9FcNaLE690J_j<5B@_y%9J0vuR@3yzkwkIgU|@V5KZ zcD>H9{bbM5=kXt4pgVU(^Xv~HZn&}AW{7|GoEgS*5~M{+DO)&%oRn!u((fMTi?t}9 zS5O^E794SsntSH;?hR{nw>J}Y*N5y;P{nk(dX6mh3fj5X9E|GOvDi-ZUf{7#&NCRC zEMC8q*t2=3xpjxJM;s{@1uJ|v29A20*tRbVPZ%+rJ|`*idfn@xaIHU$C5@_zj-dDs6?#`z(wO-2@7^ecv zAIe8@QhPLLKnq1;iEz=jqyn~GTvHf<1><0!-`k5K!1m^kY~WOgED}hFJ}hIZ!5Jfd zXXlMo=scE`*dSsB)O%W}U~V}t-M_?T3N_HN`Q4j%m&U{wecO3%YgflcM6~c}85?AY zW^T_@L^N!e7-h^=tzzyK36o1=R-^5WhPy)6AM~h6{F1#|9bHV|C+%$QxXaDk*bUHS zLitGZMA@RrQZlvUEP>^eehw$QkIclXnPE*ltkM@|`g`U+FVn|EZzMR=!Uo(Xph=8b z1OfVm15tFdd&6=T#8?~IxfN_-@#iSpA&M6aNgm?Dh|WE|#M^gH@WLUmH@|I*&Z;{5 z3oYb!`0XPzt^;dV4Gk0^Ui}855aibEi-$`~iL-N<$>Pwm4cc-l=!?kA@&et{aXfc& zPY@Ga!ejrSXa7qq<}xQ-h)n8!xk4n#wZdoRQ2m9o`o=L0OkCiB>vF75x?ej=uj!Zk zu~IFIDc7IgbgXc1e%TwBbYG+8j_X3NNm9fD<1Vt#mcp^zs`W+2MZ#V;&or>dabU;Z z@{Aa?_&N3&Xv#8SMfEIQgD^2hCK`TPTa4WsA^6La#4&2cdkj=-#eIPm8g|He_QPyfsqK$sHy*55KkgHLQq+xN^H z7WR^cn+JjS*Y%Ma+uecpUc?gb!uo7|JRr0-+X$UwRT(iT_CxKQfigO*`S{J+pl2fz z`dr*4J3HO|`i}gI>zphdMolTYz2a#1>!si_Tx_ACe zenB-YJw}stYddy+k#iN8eII!1!C*`r$_UJYjjdpr1<`D=Ig3`oL$NnI<4=7ux&t$N zkWM!R`tAI^2EHroV^oi#B~f z%q=-izx#d`j-Niu#}qsbHm~D7BjYtrclWvH!_jum;4Yuln>|Kf$snnZZhO+JNy}s% zmi19Qq+));7x(oiby-n0{%x{>R+D(yEb@Qsn>O)E>8LH*Xw5(OD%*(+7bWMfdgy!q2*s#)t>eib%}irL`{3?{`k+!C2Tu_U+tP(UEk`ljQ39PuPK zJI>C?m(F%)Hf-!76U~|BCVk>i6z-r8elnZSZ`_OTdY!4b=ixQ8%|V|N+g5tJbD0jd zdfo4$w4zO!tp{^*OZH15-RjwQe!rdMPJILz3`M@5>$F7?EMH)rfww{2W3P?v0p>Y6 z!L{OgOP-Vm)D+PCFij7_9rYfNx^wUX~dK(k7{!;cQ#2=J>z~ue~Y|r`ORb7JVzA_}zQSgq;s)-^j|s z%X35}5~ccl9k`^B>HnyZ-kvz}y!sTMRAt?EZ%K6RTHN*WcK5v-BMa*?_Z+WU7Y@GJ z9Hg`@-=2I-;qF~q{fgjTXpRP1x`7E{`zA@(Cixb!H}bl+tmLRz_a1hY^r9|-7u(@1 zM8e$hvclWTz8rc_3c#JWR{*N;>6@^h0&XVK2|u@75YW^E!9UyQ?YpG0MY}5Qlt#!m zahzu1)LViq`pgu!2v1+rb)St083<_ycEKDGp9*nuM8=oiIMWF zZuB)1$$MMi1Iq63er%2zRjzA({V{mLw;$X70b5=+4;iVxirZl5J-Da$#;bmuQCiC9 Qup>RaKDnYCF?WOiA63RpF#rGn literal 0 HcmV?d00001 diff --git a/ld/scripttempl/alphavms.sc b/ld/scripttempl/alphavms.sc index 406a601..81f94ad 100644 --- a/ld/scripttempl/alphavms.sc +++ b/ld/scripttempl/alphavms.sc @@ -21,7 +21,7 @@ SECTIONS } /* RO, executable code. */ \$CODE\$ ALIGN (${PAGESIZE}) : { - *(\$CODE\$) + *(\$CODE\$ *\$CODE*) } /* RO initialized data. */ \$LITERAL\$ ALIGN (${PAGESIZE}) : { @@ -42,6 +42,33 @@ SECTIONS *(LIB\$INITIALIZE$) /* End marker. */ } + \$DWARF\$ ALIGN (${PAGESIZE}) : { + \$dwarf2.debug_pubtypes = .; + *(debug_pubtypes) + \$dwarf2.debug_ranges = .; + *(debug_ranges) + + \$dwarf2.debug_abbrev = .; + *(debug_abbrev) + \$dwarf2.debug_aranges = .; + *(debug_aranges) + \$dwarf2.debug_frame = .; + *(debug_frame) + \$dwarf2.debug_info = .; + *(debug_info) + \$dwarf2.debug_line = .; + *(debug_line) + \$dwarf2.debug_loc = .; + *(debug_loc) + \$dwarf2.debug_macinfo = .; + *(debug_macinfo) + \$dwarf2.debug_pubnames = .; + *(debug_pubnames) + \$dwarf2.debug_str = .; + *(debug_str) + \$dwarf2.debug_zzzzzz = .; + } + \$DST\$ 0 : { *(\$DST\$) } diff --git a/ld/scripttempl/epocpe.sc b/ld/scripttempl/epocpe.sc index 0651c01..441d31e 100644 --- a/ld/scripttempl/epocpe.sc +++ b/ld/scripttempl/epocpe.sc @@ -74,7 +74,7 @@ SECTIONS on fork. This used to be named ".data$nocopy". The linker used to include this between __data_start__ and __data_end__, but that breaks building the cygwin32 dll. Instead, we name the section - ".data_cygwin_nocopy" and explictly include it after __data_end__. */ + ".data_cygwin_nocopy" and explicitly include it after __data_end__. */ .data ${RELOCATING+BLOCK(__section_alignment__)} : { diff --git a/ld/scripttempl/i386beos.sc b/ld/scripttempl/i386beos.sc index f507acc..522b432 100644 --- a/ld/scripttempl/i386beos.sc +++ b/ld/scripttempl/i386beos.sc @@ -68,7 +68,7 @@ SECTIONS on fork. This used to be named ".data$nocopy". The linker used to include this between __data_start__ and __data_end__, but that breaks building the cygwin32 dll. Instead, we name the section - ".data_cygwin_nocopy" and explictly include it after __data_end__. */ + ".data_cygwin_nocopy" and explicitly include it after __data_end__. */ .data ${RELOCATING+BLOCK(__section_alignment__)} : { diff --git a/ld/scripttempl/mcorepe.sc b/ld/scripttempl/mcorepe.sc index 511fdb1..0817fe8 100644 --- a/ld/scripttempl/mcorepe.sc +++ b/ld/scripttempl/mcorepe.sc @@ -74,7 +74,7 @@ SECTIONS on fork. This used to be named ".data$nocopy". The linker used to include this between __data_start__ and __data_end__, but that breaks building the cygwin32 dll. Instead, we name the section - ".data_cygwin_nocopy" and explictly include it after __data_end__. */ + ".data_cygwin_nocopy" and explicitly include it after __data_end__. */ .data ${RELOCATING+BLOCK(__section_alignment__)} : { diff --git a/ld/scripttempl/pe.sc b/ld/scripttempl/pe.sc index 7d52cc5..3cb77ab 100644 --- a/ld/scripttempl/pe.sc +++ b/ld/scripttempl/pe.sc @@ -90,7 +90,7 @@ SECTIONS on fork. This used to be named ".data$nocopy". The linker used to include this between __data_start__ and __data_end__, but that breaks building the cygwin32 dll. Instead, we name the section - ".data_cygwin_nocopy" and explictly include it after __data_end__. */ + ".data_cygwin_nocopy" and explicitly include it after __data_end__. */ .data ${RELOCATING+BLOCK(__section_alignment__)} : { @@ -106,16 +106,19 @@ SECTIONS .rdata ${RELOCATING+BLOCK(__section_alignment__)} : { ${R_RDATA} - ${RELOCATING+___RUNTIME_PSEUDO_RELOC_LIST__ = .;} - ${RELOCATING+__RUNTIME_PSEUDO_RELOC_LIST__ = .;} + ${RELOCATING+__rt_psrelocs_start = .;} *(.rdata_runtime_pseudo_reloc) - ${RELOCATING+___RUNTIME_PSEUDO_RELOC_LIST_END__ = .;} - ${RELOCATING+__RUNTIME_PSEUDO_RELOC_LIST_END__ = .;} + ${RELOCATING+__rt_psrelocs_end = .;} } + ${RELOCATING+__rt_psrelocs_size = __rt_psrelocs_end - __rt_psrelocs_start;} + ${RELOCATING+___RUNTIME_PSEUDO_RELOC_LIST_END__ = .;} + ${RELOCATING+__RUNTIME_PSEUDO_RELOC_LIST_END__ = .;} + ${RELOCATING+___RUNTIME_PSEUDO_RELOC_LIST__ = . - __rt_psrelocs_size;} + ${RELOCATING+__RUNTIME_PSEUDO_RELOC_LIST__ = . - __rt_psrelocs_size;} .eh_frame ${RELOCATING+BLOCK(__section_alignment__)} : { - *(.eh_frame) + *(.eh_frame*) } .pdata ${RELOCATING+BLOCK(__section_alignment__)} : @@ -250,7 +253,7 @@ SECTIONS .debug_frame ${RELOCATING+BLOCK(__section_alignment__)} ${RELOCATING+(NOLOAD)} : { - *(.debug_frame) + *(.debug_frame*) } .debug_str ${RELOCATING+BLOCK(__section_alignment__)} ${RELOCATING+(NOLOAD)} : @@ -289,6 +292,11 @@ SECTIONS *(.debug_varnames) } + .debug_macro ${RELOCATING+BLOCK(__section_alignment__)} ${RELOCATING+(NOLOAD)} : + { + *(.debug_macro) + } + /* DWARF 3. */ .debug_ranges ${RELOCATING+BLOCK(__section_alignment__)} ${RELOCATING+(NOLOAD)} : { diff --git a/ld/scripttempl/pep.sc b/ld/scripttempl/pep.sc index 8fa5f05..60515ef 100644 --- a/ld/scripttempl/pep.sc +++ b/ld/scripttempl/pep.sc @@ -91,7 +91,7 @@ SECTIONS on fork. This used to be named ".data$nocopy". The linker used to include this between __data_start__ and __data_end__, but that breaks building the cygwin32 dll. Instead, we name the section - ".data_cygwin_nocopy" and explictly include it after __data_end__. */ + ".data_cygwin_nocopy" and explicitly include it after __data_end__. */ .data ${RELOCATING+BLOCK(__section_alignment__)} : { @@ -107,16 +107,19 @@ SECTIONS .rdata ${RELOCATING+BLOCK(__section_alignment__)} : { ${R_RDATA} - ${RELOCATING+___RUNTIME_PSEUDO_RELOC_LIST__ = .;} - ${RELOCATING+__RUNTIME_PSEUDO_RELOC_LIST__ = .;} + ${RELOCATING+__rt_psrelocs_start = .;} *(.rdata_runtime_pseudo_reloc) - ${RELOCATING+___RUNTIME_PSEUDO_RELOC_LIST_END__ = .;} - ${RELOCATING+__RUNTIME_PSEUDO_RELOC_LIST_END__ = .;} + ${RELOCATING+__rt_psrelocs_end = .;} } + ${RELOCATING+__rt_psrelocs_size = __rt_psrelocs_end - __rt_psrelocs_start;} + ${RELOCATING+___RUNTIME_PSEUDO_RELOC_LIST_END__ = .;} + ${RELOCATING+__RUNTIME_PSEUDO_RELOC_LIST_END__ = .;} + ${RELOCATING+___RUNTIME_PSEUDO_RELOC_LIST__ = . - __rt_psrelocs_size;} + ${RELOCATING+__RUNTIME_PSEUDO_RELOC_LIST__ = . - __rt_psrelocs_size;} .eh_frame ${RELOCATING+BLOCK(__section_alignment__)} : { - *(.eh_frame) + *(.eh_frame*) } .pdata ${RELOCATING+BLOCK(__section_alignment__)} : @@ -256,7 +259,7 @@ SECTIONS .debug_frame ${RELOCATING+BLOCK(__section_alignment__)} ${RELOCATING+(NOLOAD)} : { - *(.debug_frame) + *(.debug_frame*) } .debug_str ${RELOCATING+BLOCK(__section_alignment__)} ${RELOCATING+(NOLOAD)} : @@ -295,6 +298,11 @@ SECTIONS *(.debug_varnames) } + .debug_macro ${RELOCATING+BLOCK(__section_alignment__)} ${RELOCATING+(NOLOAD)} : + { + *(.debug_macro) + } + /* DWARF 3. */ .debug_ranges ${RELOCATING+BLOCK(__section_alignment__)} ${RELOCATING+(NOLOAD)} : { diff --git a/ld/scripttempl/v850.sc b/ld/scripttempl/v850.sc index 7359975..a5a04bb 100644 --- a/ld/scripttempl/v850.sc +++ b/ld/scripttempl/v850.sc @@ -180,6 +180,7 @@ SECTIONS ${RELOCATING+_end = . ;} ${RELOCATING+PROVIDE (end = .);} + ${RELOCATING+PROVIDE (_heap_start = .);} /* Stabs debugging sections. */ .stab 0 : { *(.stab) } diff --git a/ld/testplug.c b/ld/testplug.c index f04df10..3be1ed4 100644 --- a/ld/testplug.c +++ b/ld/testplug.c @@ -83,6 +83,7 @@ static const tag_name_t tag_names[] = ADDENTRY(LDPT_REGISTER_CLEANUP_HOOK), ADDENTRY(LDPT_ADD_SYMBOLS), ADDENTRY(LDPT_GET_SYMBOLS), + ADDENTRY(LDPT_GET_SYMBOLS_V2), ADDENTRY(LDPT_ADD_INPUT_FILE), ADDENTRY(LDPT_MESSAGE), ADDENTRY(LDPT_GET_INPUT_FILE), @@ -99,6 +100,7 @@ static ld_plugin_register_all_symbols_read tv_register_all_symbols_read = 0; static ld_plugin_register_cleanup tv_register_cleanup = 0; static ld_plugin_add_symbols tv_add_symbols = 0; static ld_plugin_get_symbols tv_get_symbols = 0; +static ld_plugin_get_symbols tv_get_symbols_v2 = 0; static ld_plugin_add_input_file tv_add_input_file = 0; static ld_plugin_message tv_message = 0; static ld_plugin_get_input_file tv_get_input_file = 0; @@ -361,6 +363,7 @@ dump_tv_tag (size_t n, struct ld_plugin_tv *tv) case LDPT_REGISTER_CLEANUP_HOOK: case LDPT_ADD_SYMBOLS: case LDPT_GET_SYMBOLS: + case LDPT_GET_SYMBOLS_V2: case LDPT_ADD_INPUT_FILE: case LDPT_MESSAGE: case LDPT_GET_INPUT_FILE: @@ -418,6 +421,9 @@ parse_tv_tag (struct ld_plugin_tv *tv) case LDPT_GET_SYMBOLS: SETVAR(tv_get_symbols); break; + case LDPT_GET_SYMBOLS_V2: + tv_get_symbols_v2 = tv->tv_u.tv_get_symbols; + break; case LDPT_ADD_INPUT_FILE: SETVAR(tv_add_input_file); break; @@ -562,6 +568,7 @@ onall_symbols_read (void) "LDPR_RESOLVED_IR", "LDPR_RESOLVED_EXEC", "LDPR_RESOLVED_DYN", + "LDPR_PREVAILING_DEF_IRONLY_EXP", }; claim_file_t *claimfile = dumpresolutions ? claimfiles_list : NULL; add_file_t *addfile = addfiles_list; @@ -570,12 +577,12 @@ onall_symbols_read (void) { enum ld_plugin_status rv; int n; - if (claimfile->n_syms_used && !tv_get_symbols) + if (claimfile->n_syms_used && !tv_get_symbols_v2) return LDPS_ERR; else if (!claimfile->n_syms_used) continue; - rv = tv_get_symbols (claimfile->file.handle, claimfile->n_syms_used, - claimfile->symbols); + rv = tv_get_symbols_v2 (claimfile->file.handle, claimfile->n_syms_used, + claimfile->symbols); if (rv != LDPS_OK) return rv; for (n = 0; n < claimfile->n_syms_used; n++) diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index a9f6083..233d962 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,696 @@ +2011-11-10 Matthew Gretton-Dann + + Apply mainline patches. + 2011-11-09 Matthew Gretton-Dann + * ld-arm/jump-reloc-veneers.s: Update for changes to assembler output. + +2011-11-08 Alan Modra + + * ld-powerpc/powerpc.exp: Expect ld warnings for tocopt test. + * ld-powerpc/tocopt.out: New file. + +2011-10-25 Alan Modra + + Apply mainline patches + 2011-10-10 Alan Modra + * ld-powerpc/relbrlt.d: Update for stub alignment change. + * ld-powerpc/tlsexe.g: Likewise. + * ld-powerpc/tlsexe.r: Likewise. + * ld-powerpc/tlsexetoc.g: Likewise. + * ld-powerpc/tlsexetoc.r: Likewise. + * ld-powerpc/tlsso.g: Likewise. + * ld-powerpc/tlsso.r: Likewise. + + 2011-10-08 H.J. Lu + PR ld/13250 + * ld-elf/shared.exp (build_tests): Add tests for PR ld/13250. + (run_tests): Likewise. + * ld-elf/pr13250-1.c: New. + * ld-elf/pr13250-2.c: Likewise. + * ld-elf/pr13250-3.c: Likewise. + + 2011-10-06 Alan Modra + * ld-plugin/plugin-1.d, * ld-plugin/plugin-2.d, * ld-plugin/plugin-3.d, + * ld-plugin/plugin-4.d, * ld-plugin/plugin-5.d, * ld-plugin/plugin-6.d, + * ld-plugin/plugin-7.d, * ld-plugin/plugin-8.d, * ld-plugin/plugin-9.d, + * ld-plugin/plugin-10.d, * ld-plugin/plugin-11.d: Update. + + 2011-09-30 Alan Modra + * ld-powerpc/tocopt.d: Update. + * ld-powerpc/tocopt5.d, * ld-powerpc/tocopt5.s: New test. + * ld-powerpc/powerpc.exp: Run new test. + +2011-10-18 David S. Miller + + * ld-sparc/tlssunbin32.dd: Update for TLS call relaxation fix + for PR 13301. + * ld-sparc/tlssunbin64.dd: Likewise. + * ld-sparc/tlssunpic32.dd: Likewise. + * ld-sparc/tlssunpic64.dd: Likewise. + +2011-10-18 H.J. Lu + + PR ld/13177 + * ld-elf/pr13177.d: Removed. + * ld-elf/pr13177.s: Likewise. + +2011-10-14 Hans-Peter Nilsson + + * ld-cris/pic-gc-72.d: Adjust for dropping unused undefined + dynamic symbol "dsofn". + +2011-09-29 H.J. Lu + + PR ld/13195 + * ld-elf/elf.exp: Add a C link testcase for PR ld/13195. + + * ld-elf/pr13195.c: New. + * ld-elf/pr13195.d: Likewise. + * ld-elf/pr13195.s: Likewise. + * ld-elf/pr13195.t: Likewise. + +2011-09-16 H.J. Lu + + * ld-elf/pr12975.d: Only run for *-*-linux* and *-*-gnu* + targets. + * ld-elf/pr13177.d: Likewise. + + * ld-elf/pr13177.s: Avoid relocations in text sections. + +2011-09-15 H.J. Lu + + PR ld/13177 + * ld-elf/pr13177.d: New. + * ld-elf/pr13177.s: Likewise. + +2011-09-15 H.J. Lu + + PR ld/12975 + * ld-elf/pr12975.d: New. + * ld-elf/pr12975.s: Likewise. + * ld-elf/pr12975.t: Likewise. + +2011-09-12 H.J. Lu + + PR ld/13178 + * ld-ifunc/ifunc-13-i386.d: Updated. + * ld-ifunc/ifunc-13-x86-64.d: Likewise. + * ld-ifunc/ifunc-3a-x86.d: Likewise. + * ld-x86-64/pr13082-5a.d: Likewise. + + * ld-ifunc/ifunc-15-i386.d: New. + * ld-ifunc/ifunc-15-i386.s: Likewise. + * ld-ifunc/ifunc-15-x86-64.d: Likewise. + * ld-ifunc/ifunc-15-x86-64.s: Likewise. + +2011-09-01 Christophe Lyon + + * ld-arm/arm-elf.exp: Add new rodata-merge-map test. + * ld-arm/rodata-merge-map.ld: New file. + * ld-arm/rodata-merge-map.sym: Likewise. + * ld-arm/rodata-merge-map1.s Likewise. + * ld-arm/rodata-merge-map2.s: Likewise. + * ld-arm/rodata-merge-map3.s: Likewise. + +2011-08-22 Alan Modra + + * ld-powerpc/tocopt4a.s, * ld-powerpc/tocopt4b.s, + * ld-powerpc/tocopt4.d: New test. + * ld-powerpc/powerpc.exp: Run it. + +2011-08-12 H.J. Lu + + PR ld/13082 + * ld-x86-64/pr13082-1.s: New. + * ld-x86-64/pr13082-1a.d: Likewise. + * ld-x86-64/pr13082-1b.d: Likewise. + * ld-x86-64/pr13082-2.s: Likewise. + * ld-x86-64/pr13082-2a.d: Likewise. + * ld-x86-64/pr13082-2b.d: Likewise. + * ld-x86-64/pr13082-3.s: Likewise. + * ld-x86-64/pr13082-3a.d: Likewise. + * ld-x86-64/pr13082-3b.d: Likewise. + * ld-x86-64/pr13082-4.s: Likewise. + * ld-x86-64/pr13082-4a.d: Likewise. + * ld-x86-64/pr13082-4b.d: Likewise. + * ld-x86-64/pr13082-5.s: Likewise. + * ld-x86-64/pr13082-5a.d: Likewise. + * ld-x86-64/pr13082-5b.d: Likewise. + * ld-x86-64/pr13082-6.s: Likewise. + * ld-x86-64/pr13082-6a.d: Likewise. + * ld-x86-64/pr13082-6b.d: Likewise. + + * ld-x86-64/x86-64.exp: Run pr13082-[1-6][ab]. + +2011-08-09 Matthew Gretton-Dann + + * ld-arm/arm-elf.exp (armelftests): Update for new command-line + options. + (armeabitests): Update for new command-line options, and add + new test cases. + * ld-arm/fix-arm1176.s: Add test case. + * ld-arm/fix-arm1176-off.d: Likewise. + * ld-arm/fix-arm1176-on.d: Likewise. + +2011-08-05 Alan Modra + + * ld-powerpc/tlsexe.r: Update for stripped .branch_lt. + * ld-powerpc/tlsexetoc.r: Likewise. + * ld-powerpc/tlsso.r: Likewise. + * ld-powerpc/tlstocso.r: Likewise. + +2011-08-01 H.J. Lu + + PR ld/13048 + * ld-x86-64/ilp32-6.d: New. + * ld-x86-64/ilp32-6.s: Likewise. + * ld-x86-64/ilp32-7.d: Likewise. + * ld-x86-64/ilp32-7.s: Likewise. + * ld-x86-64/ilp32-8.d: Likewise. + * ld-x86-64/ilp32-8.s: Likewise. + * ld-x86-64/ilp32-9.d: Likewise. + * ld-x86-64/ilp32-9.s: Likewise. + + * ld-x86-64/x86-64.exp: Run ilp32-6, ilp32-7, ilp32-8 and ilp32-9. + +2011-07-27 Roland McGrath + + * ld-i386/vxworks1-lib.rd: Swap order of sections expected in output. + +2011-07-26 Alan Modra + + * ld-powerpc/powerpc.exp: Use --no-ld-generated-unwind-info + with some tests. + * ld-powerpc/relbrlt.d: Likewise. + +2011-07-25 Hans-Peter Nilsson + + PR ld/12815 + * ld-mmix/pr12815-1.d, ld-mmix/pr12815-1.s, ld-mmix/pr12815-1.ld, + ld-mmix/pr12815-2.d, ld-mmix/pr12815-2.s: New tests. + +2011-07-24 Catherine Moore + Chao-ying Fu + Maciej W. Rozycki + + * lib/ld-lib.exp (run_dump_test): Support distinct assembler + flags for the same source named multiple times. + * ld-mips-elf/jalx-1.s: New test source. + * ld-mips-elf/jalx-1.d: New test output. + * ld-mips-elf/jalx-1.ld: New test linker script. + * ld-mips-elf/jalx-2-main.s: New test source. + * ld-mips-elf/jalx-2-ex.s: Likewise. + * ld-mips-elf/jalx-2-printf.s: Likewise. + * ld-mips-elf/jalx-2.dd: New test output. + * ld-mips-elf/jalx-2.ld: New test linker script. + * ld-mips-elf/mips16-and-micromips.d: New test. + * ld-mips-elf/mips-elf.exp: Run the new tests + +2011-07-22 H.J. Lu + + * ld-x86-64/abs-k1om.d: New. + * ld-x86-64/protected2-k1om.d: Likewise. + * ld-x86-64/protected3-k1om.d: Likewise. + + * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and + protected3-k1om. + +2011-07-14 H.J. Lu + + * ld-elf/binutils.exp (binutils_test): Also check ignored + "-z relro". + +2011-07-14 Alan Modra + + * ld-scripts/section-flags.exp: Pass --local-store 0:0 for + spu. Rewrite using foreach. + +2011-07-14 Alan Modra + + * ld-powerpc/tlsexe.d, * ld-powerpc/tlsexe.g. *ld-powerpc/tlsexe.r, + * ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g, + * ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.d, + * ld-powerpc/tlstocso.d: Update for plt stub change. + +2011-07-11 Catherine Moore + + * ld-scripts/section-flags-1.s: New. + * ld-scripts/section-flags-1.t: New. + * ld-scripts/section-flags-2.s: New. + * ld-scripts/section-flags-2.t: New. + * ld-scripts/section-flags.exp: New. + +2011-07-11 Alan Modra + + * ld-powerpc/tocopt2.s, * ld-powerpc/tocopt2.out, + * ld-powerpc/tocopt2.d: New test. + * ld-powerpc/tocopt3.s, * ld-powerpc/tocopt3.d: New test. + * ld-powerpc/powerpc.exp (ppc64elftests) Run them. + +2011-07-03 Samuel Thibault + Thomas Schwinge + + PR binutils/12913 + * ld-ifunc/ifunc.exp: Update for changed output. + * ld-unique/unique.exp: Likewise. + +2011-06-27 Nick Clifton + + * ld-elf/elf.exp: Exlcude all v850 targets from note-3 test. + +2011-06-27 Alan Modra + + * ld-elf/elf.exp: Exclude more targets from note-3 test. + +2011-06-24 H.J. Lu + + PR ld/12921 + * ld-i386/i386.exp: Run pr12921. + * ld-x86-64/x86-64.exp: Likewise. + + * ld-i386/pr12921.d: New. + * ld-i386/pr12921.s: Likewise. + * ld-x86-64/pr12921.d: Likewise. + * ld-x86-64/pr12921.s: Likewise. + +2011-06-22 Thomas Schwinge + + * ld-elf/elf.exp: Execute array_tests_pie tests on *-*-gnu*, too. + +2011-06-20 H.J. Lu + + * ld-ifunc/ifunc-1-local-x86.d: Adjusted. + * ld-ifunc/ifunc-1-x86.d: Likewise. + * ld-ifunc/ifunc-3a-x86.d: Likewise. + +2011-06-20 H.J. Lu + + * ld-elf/eh1.d: Revert x32 change. + * ld-elf/eh2.d: Likewise. + * ld-elf/eh3.d: Likewise. + * ld-elf/eh4.d: Likewise. + +2011-06-20 Jakub Jelinek + + PR ld/12570 + * ld-x86-64/x86-64.exp: Link some testcases with + --no-ld-generated-unwind-info. + * ld-x86-64/tlsbin.rd: Add --no-ld-generated-unwind-info to ld + comment. + * ld-x86-64/tlsdesc.dd: Likewise. + * ld-x86-64/tlspic.dd: Likewise. + * ld-x86-64/tlsdesc.sd: Likewise. + * ld-x86-64/tlspic.rd: Likewise. + * ld-x86-64/tlsbindesc.rd: Likewise. + * ld-x86-64/tlsbindesc.sd: Likewise. + * ld-x86-64/tlsbin.td: Likewise. + * ld-x86-64/tlsdesc.pd: Likewise. + * ld-x86-64/tlsdesc.td: Likewise. + * ld-x86-64/tlsbindesc.dd: Likewise. + * ld-x86-64/tlsbin.dd: Likewise. + * ld-x86-64/tlsgdesc.rd: Likewise. + * ld-x86-64/tlspic.sd: Likewise. + * ld-x86-64/tlsbindesc.td: Likewise. + * ld-x86-64/tlspic.td: Likewise. + * ld-x86-64/tlsbin.sd: Likewise. + * ld-x86-64/ilp32-4.d: Likewise. + * ld-x86-64/tlsgdesc.dd: Add --no-ld-generated-unwind-info to ld + comment. Adjust. + * ld-x86-64/tlsdesc.rd: Likewise. + * ld-x86-64/tlsgd6.dd: Adjust. + * ld-x86-64/tlsgd5.dd: Likewise. + * ld-i386/i386.exp: Link some testcases with + --no-ld-generated-unwind-info. + * ld-i386/tlsbin.rd: Add --no-ld-generated-unwind-info to ld + comment.. + * ld-i386/tlsdesc.dd: Likewise. + * ld-i386/tlspic.dd: Likewise. + * ld-i386/tlsdesc.sd: Likewise. + * ld-i386/tlsgdesc.dd: Likewise. + * ld-i386/tlsnopic.sd: Likewise. + * ld-i386/tlspic.rd: Likewise. + * ld-i386/tlsdesc.rd: Likewise. + * ld-i386/tlsbindesc.rd: Likewise. + * ld-i386/tlsbindesc.sd: Likewise. + * ld-i386/tlsbin.td: Likewise. + * ld-i386/tlsdesc.td: Likewise. + * ld-i386/tlsnopic.dd: Likewise. + * ld-i386/tlsbindesc.dd: Likewise. + * ld-i386/tlsbin.dd: Likewise. + * ld-i386/tlsgdesc.rd: Likewise. + * ld-i386/tlspic.sd: Likewise. + * ld-i386/tlsnopic.rd: Likewise. + * ld-i386/tlsbindesc.td: Likewise. + * ld-i386/tlspic.td: Likewise. + * ld-i386/tlsbin.sd: Likewise. + +2011-06-19 H.J. Lu + + * ld-elf/eh1.d: Skip x32. + * ld-elf/eh2.d: Likewise. + * ld-elf/eh3.d: Likewise. + * ld-elf/eh4.d: Likewise. + + * ld-elfvsb/elfvsb.exp: Only xfail 64bit x86_64-*-linux*. + * ld-shared/shared.exp: Likewise. + + * ld-ifunc/ifunc-1-local-x86.d: Support x32. + * ld-ifunc/ifunc-1-x86.d: Likewise. + * ld-ifunc/ifunc-3a-x86.d: Likewise. + * ld-x86-64/pcrel16.d: Likewise. + + * ld-x86-64/x86-64.exp (x86_64tests): Add missing -melf_x86_64. + +2011-06-16 Alan Modra + + * ld-elfvers/vers2.ver: Don't assume any particular index for + version reference. + * ld-elfvers/vers3.ver: Likewise. + * ld-elfvers/vers19.ver: Likewise. + * ld-elfvers/vers22.ver: Likewise. + * ld-elfvers/vers27d4.ver: Likewise. + * ld-elfvers/vers28c.ver: Likewise. + +2011-06-14 Alan Modra + + * ld-elf/elf.exp: Don't attempt to build symbol3.a for hppa64-hpux. + * ld-elf/warn3.d: Correct target selection and comment. + + * ld-elf/pr12851.d: Correct target selection and comment. + +2011-06-13 Walter Lee + + * ld-elf/eh5.d: Don't run on tile*. + * ld-srec/srec.exp: xfail on tile*. + * ld-tilegx/external.s: New file. + * ld-tilegx/reloc.d: New file. + * ld-tilegx/reloc.s: New file. + * ld-tilegx/tilegx.exp: New file. + * ld-tilepro/external.s: New file. + * ld-tilepro/reloc.d: New file. + * ld-tilepro/reloc.s: New file. + * ld-tilepro/tilepro.exp: New file. + +2011-06-10 Nick Clifton + + * ld-elf/elf.exp: Add test for linking a shared library with a + broken linker script that marks dynamic sections as being notes. + * ld-elf/note-3.s: New test source file. + * ld-elf/note-3.t: New test linker script. + * ld-elf/note-3.l: Expected output from the linker. + * lib/ld-lib.exp (run_ld_link_tests): Improve description. + +2011-06-08 H.J. Lu + + * ld-x86-64/x86-64.exp: Build x32 DSO from x86-64 object file + only for native. + +2011-06-08 H.J. Lu + + * ld-x86-64/simple.c: New. + * ld-x86-64/x86-64-x32.rd: Likewise. + + * ld-x86-64/x86-64.exp: Check building x32 DSO from x86-64 + object file. + +2011-06-08 H.J. Lu + + PR ld/12851 + * ld-elf/pr12851.d: New. + * ld-elf/pr12851.s: Likewise. + +2011-06-07 H.J. Lu + + * ld-elf/elf.exp: Build symbol3.a and symbol3w.a. + + * ld-elf/symbol3.s: New. + * ld-elf/symbol3w.s: Likewise. + * ld-elf/warn3.d: Likewise. + +2011-06-02 Nathan Sidwell + + Adjust tests for zero offset formatting. + * ld-arm/cortex-a8-fix-bcc-plt.d: Adjust. + * ld-arm/farcall-arm-arm-pic-veneer.d: Adjust. + * ld-arm/farcall-arm-thumb.d: Adjust. + * ld-arm/farcall-group-size2.d: Adjust. + * ld-arm/farcall-group.d: Adjust. + * ld-arm/farcall-mix.d: Adjust. + * ld-arm/farcall-mix2.d: Adjust. + * ld-arm/farcall-mixed-lib-v4t.d: Adjust. + * ld-arm/farcall-mixed-lib.d: Adjust. + * ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust. + * ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust. + * ld-arm/farcall-thumb-thumb.d: Adjust. + * ld-arm/ifunc-10.dd: Adjust. + * ld-arm/ifunc-3.dd: Adjust. + * ld-arm/ifunc-4.dd: Adjust. + * ld-arm/ifunc-5.dd: Adjust. + * ld-arm/ifunc-6.dd: Adjust. + * ld-arm/ifunc-7.dd: Adjust. + * ld-arm/ifunc-8.dd: Adjust. + * ld-arm/jump-reloc-veneers-long.d: Adjust. + * ld-arm/tls-longplt-lib.d: Adjust. + * ld-arm/tls-thumb1.d: Adjust. + +2011-05-31 Paul Brook + + * ld-arm/cortex-a8-far.d: Adjust expected output. + * ld-arm/arm-call1.s: Give function symbol correct type. + * ld-arm/arm-call2.s: Ditto. + * ld-arm/farcall-group4.s: Ditto. + * ld-arm/arm-elf.exp (cortex-a8-far): Define far symbols with correct + type via assembly file. + * ld-arm/cortex-a8-far-3.s: New file. + * ld-arm/abs-call-1.s: Add Thumb tests + +2011-05-31 Paul Brook + Nathan Sidwell + + * ld-arm/abs-call-1.d: New. + * ld-arm/abs-call-1.s: New. + * ld-arm/arm-elf.exp: Add it. + +2011-05-31 Paul Brook + + * ld-arm/tls-longplt.d: Update expected output. + * ld-arm/tls-thumb1.d: Ditto. + +2011-05-26 H.J. Lu + + PR ld/12809 + * ld-x86-64/tlsbin.s: Add a test for LE with large model. + + * ld-x86-64/tlsbin.dd: Updated. + * ld-x86-64/tlsbin.rd: Likewise. + * ld-x86-64/tlsbin.sd: Likewise. + * ld-x86-64/tlsbin.td: Likewise. + * ld-x86-64/tlsbindesc.dd: Likewise. + * ld-x86-64/tlsbindesc.rd: Likewise. + * ld-x86-64/tlsbindesc.sd: Likewise. + * ld-x86-64/tlsbindesc.td: Likewise. + +2011-05-24 Hans-Peter Nilsson + + * ld-cris/tls-e-tpoffcomm1.d: Adjust for second PR12763 change, + setting TLS file offset. + +2011-05-23 Nick Clifton + + * ld-elf/shared.exp: Revert previous delta. Do not build + libraries in a non-native environment. + +2011-05-23 Alan Modra + + PR 12763 + * ld-elf/binutils.exp: Don't run tdata3 for hppa64. + +2011-05-21 Hans-Peter Nilsson + + * ld-cris/tls-e-tpoffcomm1.d: Adjust for PR12763 change removing + empty program header. + +2011-05-21 Alan Modra + + PR 12763 + * ld-elf/tdata3.s: New test. + * ld-elf/tbss3.s: New test. + * ld-elf/binutils.exp: Consolidate tbss and tdata tests. + +2011-05-20 Bernd Schmidt + + * ld-tic6x/pcr-reloc.d: New test. + * ld-tic6x/pcr-reloc.s: New test. + +2011-05-18 Nick Clifton + + PR ld/12761 + * lib/ld-lib.exp (run_cc_link_tests): Add an optional 8th + parameter - an expected warning message from the linker. + * ld-elf/shared.exp (build_tests): Expect a warning message when + building the libbarw.so library. + + * ld-elf/shared.exp: Run library building tests even when not + building a native toolchain. + +2011-05-16 H.J. Lu + + * ld-scripts/phdrs.exp: Replace --private with + --private-headers for objdump. + * ld-scripts/phdrs2.exp: Likewise. + +2011-05-15 Richard Sandiford + + * lib/ld-lib.exp (run_ld_link_tests): Simplify pass/fail logic. + Fail if the link command fails and if no test rules are defined. + * ld-mips-elf/reloc-6a.s, ld-mips-elf/reloc-6b.s: New tests. + * ld-mips-elf/mips-elf.exp: Run them. + +2011-05-13 Bernd Schmidt + + * ld-tic6x/dsbt.ld (OUTPUT_FORMAT): Add. + * ld-tic6x/tic6x.exp: Add OSABI tests. + +2011-05-13 Alan Modra + + * ld-elf/flags1.d: Don't xfail tic6x. + * ld-scripts/weak.exp: Correct comments. Don't xfail sh-pe. Remove + redundant xfail. + * ld-selective/sel-dump.exp: Don't xfail alpha. + * ld-selective/selective.exp: Run for alpha. + * ld-undefined/weak-undef.exp: Don't xfail hppa64. + +2011-05-12 Bernd Schmidt + + * config/default.exp (ld_assemble): Pass flags parameter to + default_ld_assemble. + (ld_assemble_flags): New function. + * ld-elf/frame.exp: Pass -mpic and -mpid flags to the assembler on + tic6x. + * ld-elf/exclude.exp: Likewise. + * lib/ld-lib.exp (default_ld_assemble): Take extra argument in_flags + and pass it to the assembler. + +2011-05-11 Richard Sandiford + + * ld-mips-elf/mips-elf.exp: Add missing $has_newabi tests. + +2011-05-09 H.J. Lu + + * ld-elf/elf.exp (array_tests): Remove "pr12730". + (array_tests_pie): Remove "PIE pr12730". + (array_tests_static): Remove "static pr12730". + + * ld-elf/pr12730.cc: Removed. + * ld-elf/pr12730.out: Likewise. + +2011-05-09 Paul Brook + + * ld-tic6x/discard-unwind.ld: New. + * ld-tic6x/unwind.ld: New. + * ld-tic6x/unwind-1.d: New test. + * ld-tic6x/unwind-1.s: New test. + * ld-tic6x/unwind-2.d: New test. + * ld-tic6x/unwind-2.s: New test. + * ld-tic6x/unwind-3.d: New test. + * ld-tic6x/unwind-3.s: New test. + * ld-tic6x/unwind-4.d: New test. + * ld-tic6x/unwind-4.s: New test. + * ld-tic6x/unwind-5.d: New test. + * ld-tic6x/unwind-5.s: New test. + * ld-tic6x/unwind-6.d: New test. + +2011-05-07 Dave Korn + + PR ld/12365 + * ld-plugin/plugin-7.d: Allow underscore in error message. + * ld-plugin/plugin-8.d: Likewise. + +2011-05-07 H.J. Lu + + PR ld/12730 + * ld-elf/elf.exp (array_tests): Add "pr12730". + (array_tests_pie): New. + (array_tests_static): Add -static for "static init array mixed". + Add "static pr12730". Run array_tests_pie for Linux. + + * ld-elf/init-mixed.c (ctor1007): Renamed to ... + (ctor1007a): This. + (ctor1007b): New. + (ctors1007): Remove ctor1007. Add ctor1007b and ctor1007a. + (dtor1007): Renamed to ... + (dtor1007a): This. + (dtor1007b): New. + (dtors1007): Remove dtor1007. Add dtor1007b and dtor1007a. + (ctor65535): Renamed to ... + (ctor65535a): This. + (ctor65535b): New. + (ctors65535): Remove ctor65535. Add ctor65535b and ctor65535a. + (dtor65535): Renamed to ... + (dtor65535a): This. + (dtor65535b): New. + (dtors65535): Remove dtor65535. Add dtor65535b and dtor65535a. + + * ld-elf/pr12730.cc: New. + * ld-elf/pr12730.out: Likewise. + +2011-05-06 Richard Sandiford + + * ld-arm/cortex-a8-fix-b-plt.s, ld-arm/cortex-a8-fix-b-plt.d, + ld-arm/cortex-a8-fix-bcc-plt.s, ld-arm/cortex-a8-fix-bcc-plt.d, + ld-arm/cortex-a8-fix-bl-plt.s, ld-arm/cortex-a8-fix-bl-plt.d, + ld-arm/cortex-a8-fix-blx-plt.s, ld-arm/cortex-a8-fix-blx-plt.d, + ld-arm/cortex-a8-fix-plt.ld: New tests. + * ld-arm/arm-elf.exp: Run them. + +2011-05-05 Bernd Schmidt + + * ld-tic6x/shared-nopic.d: New test. + * ld-tic6x/shared-nopid.d: New test. + * ld-tic6x/attr-pid-21.d: Don't expect a warning; check readelf + output instead. + * ld-tic6x/attr-pid-12.d: Likewise. + * ld-tic6x/attr-pic-01.d: Likewise. + * ld-tic6x/attr-pic-10.d: Likewise. + * ld-tic6x/attr-pid-01.d: Likewise. + * ld-tic6x/attr-pid-10.d: Likewise. + * ld-tic6x/attr-pid-02.d: Likewise. + * ld-tic6x/attr-pid-20.d: Likewise. + * ld-tic6x/got-reloc-inrange.d: Pass -mpic and -mpid options to gas. + +2011-05-03 Paul Brook + + * ld-tic6x/ehtype-reloc-1-rel.d: New test. + * ld-tic6x/ehtype-reloc-1.d: New test. + * ld-tic6x/ehtype-reloc-1.s: New test. + +2011-05-01 H.J. Lu + + PR ld/12718 + * ld-i386/i386.exp: Run pr12718. + * ld-x86-64/x86-64.exp: Likewise. + + * ld-i386/pr12718.d: New. + * ld-i386/pr12718.s: Likewise. + * ld-x86-64/pr12718.d: Likewise. + * ld-x86-64/pr12718.s: Likewise. + +2011-04-26 Kai Tietz + + * ld-pe/pe.exp: Add cfi/cfi32 tests. + * ld-pe/cfi.d: New. + * ld-pe/cfi32.d: New. + * ld-pe/cfia.s: New. + * ld-pe/cfib.s: New. + +2011-04-21 H.J. Lu + + PR ld/12694 + * ld-ifunc/ifunc-14-i386.d: New. + * ld-ifunc/ifunc-14-x86-64.d: Likewise. + * ld-ifunc/ifunc-14a.s: Likewise. + * ld-ifunc/ifunc-14b.s: Likewise. + 2011-04-19 H.J. Lu * ld-plugin/plugin-ignore.d: Removed. diff --git a/ld/testsuite/config/default.exp b/ld/testsuite/config/default.exp index 043a885..26a7a0c 100644 --- a/ld/testsuite/config/default.exp +++ b/ld/testsuite/config/default.exp @@ -205,7 +205,15 @@ proc ld_compile { cc source object } { # assemble a file # proc ld_assemble { as source object } { - default_ld_assemble $as $source $object + default_ld_assemble $as "" $source $object +} + +# +# ld_assemble_flags +# assemble a file with extra flags +# +proc ld_assemble_flags { as flags source object } { + default_ld_assemble $as $flags $source $object } # diff --git a/ld/testsuite/ld-arm/abs-call-1.d b/ld/testsuite/ld-arm/abs-call-1.d new file mode 100644 index 0000000..7214e3a --- /dev/null +++ b/ld/testsuite/ld-arm/abs-call-1.d @@ -0,0 +1,14 @@ +.*: file format elf32-.* + + +Disassembly of section .text: + +00008000 : + 8000: eb03dffe bl 100000 + 8004: ea03dffd b 100000 + 8008: fa03dffc blx 100000 + 800c: eb03dffb bl 100000 +00008010 : + 8010: f0f7 fff6 bl 100000 + 8014: f0f7 bff4 b\.w 100000 + 8018: f0f7 eff2 blx 100000 diff --git a/ld/testsuite/ld-arm/abs-call-1.s b/ld/testsuite/ld-arm/abs-call-1.s new file mode 100644 index 0000000..ab1ac3d --- /dev/null +++ b/ld/testsuite/ld-arm/abs-call-1.s @@ -0,0 +1,15 @@ + + .type foo, %function + .set foo, 0x100000 + +arm: bl 0x100000 + b 0x100000 + blx 0x100000 + bl foo + + .syntax unified + .thumb +thumb: bl 0x100000 + b 0x100000 + blx 0x100000 + @ bl foo is broken - gas fails to preserve the symbol reference diff --git a/ld/testsuite/ld-arm/arm-call1.s b/ld/testsuite/ld-arm/arm-call1.s index e6ea1f2..e4ab1c2 100644 --- a/ld/testsuite/ld-arm/arm-call1.s +++ b/ld/testsuite/ld-arm/arm-call1.s @@ -2,6 +2,7 @@ .text .arch armv5t .global _start + .type _start, %function _start: bl arm bl t1 diff --git a/ld/testsuite/ld-arm/arm-call2.s b/ld/testsuite/ld-arm/arm-call2.s index 30ae349..02aa379 100644 --- a/ld/testsuite/ld-arm/arm-call2.s +++ b/ld/testsuite/ld-arm/arm-call2.s @@ -4,6 +4,7 @@ .global t1 .global t2 .global t5 + .type arm, %function arm: bx lr .thumb diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp index 5b50da5..c7a0b2c 100644 --- a/ld/testsuite/ld-arm/arm-elf.exp +++ b/ld/testsuite/ld-arm/arm-elf.exp @@ -137,7 +137,7 @@ set armelftests { {"arm-rel32" "-shared -T arm-dyn.ld" "" {arm-rel32.s} {{objdump -Rsj.data arm-rel32.d}} "arm-rel32"} - {"arm-call" "-static -T arm.ld" "-meabi=4" {arm-call1.s arm-call2.s} + {"arm-call" "--no-fix-arm1176 -static -T arm.ld" "-meabi=4" {arm-call1.s arm-call2.s} {{objdump -d arm-call.d}} "arm-call"} {"TLS shared library" "-shared -T arm-lib.ld" "" {tls-lib.s} @@ -149,16 +149,16 @@ set armelftests { {"TLS gnu shared library got" "-shared -T arm-dyn.ld" "" {tls-gdesc-got.s} {{objdump "-fDR -j .got" tls-gdesc-got.d}} "tls-lib2-got.so"} - {"TLS gnu shared library inlined trampoline" "-shared -T arm-dyn.ld" "" {tls-descseq.s} + {"TLS gnu shared library inlined trampoline" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" {tls-descseq.s} {{objdump -fdw tls-descseq.d} {objdump -Rw tls-descseq.r}} "tls-lib2inline.so"} - {"TLS shared library gdesc local" "-shared -T arm-dyn.ld" "" {tls-lib-loc.s} + {"TLS shared library gdesc local" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" {tls-lib-loc.s} {{objdump -fdw tls-lib-loc.d} {objdump -Rw tls-lib-loc.r}} "tls-lib-loc.so"} {"TLS gnu GD to IE relaxation" "-static -T arm-dyn.ld" "" {tls-gdierelax.s} {{objdump -fdw tls-gdierelax.d}} "tls-app-rel-ie"} - {"TLS gnu GD to IE shared relaxation" "-shared -T arm-dyn.ld" "" {tls-gdierelax2.s} + {"TLS gnu GD to IE shared relaxation" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" {tls-gdierelax2.s} {{objdump -fdw tls-gdierelax2.d}} "tls-app-rel-ie2"} {"TLS gnu GD to LE relaxation" "-T arm-dyn.ld" "" {tls-gdlerelax.s} @@ -210,18 +210,38 @@ set armelftests { "-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-b.s} {{objdump -dr cortex-a8-fix-b.d}} "cortex-a8-fix-b"} + {"Cortex-A8 erratum fix, b.w to PLT" + "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL" + {cortex-a8-fix-b-plt.s} + {{objdump -dr cortex-a8-fix-b-plt.d}} + "cortex-a8-fix-b-plt"} {"Cortex-A8 erratum fix, bl.w" "-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-bl.s} {{objdump -dr cortex-a8-fix-bl.d}} "cortex-a8-fix-bl"} + {"Cortex-A8 erratum fix, bl.w to PLT" + "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL" + {cortex-a8-fix-bl-plt.s} + {{objdump -dr cortex-a8-fix-bl-plt.d}} + "cortex-a8-fix-bl-plt"} {"Cortex-A8 erratum fix, bcc.w" "-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-bcc.s} {{objdump -dr cortex-a8-fix-bcc.d}} "cortex-a8-fix-bcc"} + {"Cortex-A8 erratum fix, bcc.w to PLT" + "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL" + {cortex-a8-fix-bcc-plt.s} + {{objdump -dr cortex-a8-fix-bcc-plt.d}} + "cortex-a8-fix-bcc-plt"} {"Cortex-A8 erratum fix, blx.w" "-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-blx.s} {{objdump -dr cortex-a8-fix-blx.d}} "cortex-a8-fix-blx"} + {"Cortex-A8 erratum fix, blx.w to PLT" + "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL" + {cortex-a8-fix-blx-plt.s} + {{objdump -dr cortex-a8-fix-blx-plt.d}} + "cortex-a8-fix-blx-plt"} {"Cortex-A8 erratum fix, relocate b.w to ARM" "-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-arm-target.s cortex-a8-fix-b-rel.s} {{objdump -dr cortex-a8-fix-b-rel-arm.d}} @@ -256,8 +276,8 @@ set armelftests { {{objdump -dr cortex-a8-fix-blx-rel-thumb.d}} "cortex-a8-fix-blx-rel-thumb"} {"Cortex-A8 erratum fix, relocate bl.w and far call" - "-EL -Ttext=0x00 --fix-cortex-a8 --defsym far_fn1=0x80000000 --defsym far_fn2=0x80000004 --defsym far_fn=0x7fff0000 --defsym _start=0" - "-EL -mcpu=cortex-a8" {cortex-a8-far-1.s cortex-a8-far-2.s} + "-EL -Ttext=0x00 --fix-cortex-a8 --defsym _start=0" + "-EL -mcpu=cortex-a8" {cortex-a8-far-1.s cortex-a8-far-2.s cortex-a8-far-3.s} {{objdump -dr cortex-a8-far.d}} "cortex-a8-far"} {"Cortex-A8 erratum fix, headers" @@ -303,6 +323,9 @@ set armelftests { {"Data only mapping symbols" "-T data-only-map.ld -Map map" "" {data-only-map.s} {{objdump -dr data-only-map.d}} "data-only-map"} + {"Data only mapping symbols for merged sections" "-T rodata-merge-map.ld" "" {rodata-merge-map1.s rodata-merge-map2.s rodata-merge-map3.s} + {{readelf -s rodata-merge-map.sym}} + "rodata-merge-map"} {"GOT relocations in executables (setup)" "-shared" "" {exec-got-1a.s} {} @@ -393,6 +416,9 @@ set armelftests { {objdump {-s -j.data -j.got} ifunc-16.gd} {readelf -r ifunc-16.rd}} "ifunc-16"} + {"abs call" "-T arm.ld" "" {abs-call-1.s} + {{objdump -d abs-call-1.d}} + "abs-call-1"} } run_ld_link_tests $armelftests @@ -484,7 +510,7 @@ set armeabitests { {"MOVW/MOVT against shared libraries" "tmpdir/arm-lib.so" "" {arm-app-movw.s} {{objdump -Rw arm-app.r}} "arm-app-movw"} - {"Thumb-2-as-Thumb-1 BL" "-Ttext 0x1000 --section-start .foo=0x100100c" "" {thumb2-bl-as-thumb1-bad.s} + {"Thumb-2-as-Thumb-1 BL" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x100100c" "" {thumb2-bl-as-thumb1-bad.s} {{objdump -d thumb2-bl-as-thumb1-bad.d}} "thumb2-bl-as-thumb1-bad"} {"Thumb-2 BL" "-Ttext 0x1000 --section-start .foo=0x100100c" "" {thumb2-bl-bad.s} @@ -507,7 +533,7 @@ set armeabitests { {"ARM-Thumb farcall" "-Ttext 0x1000 --section-start .foo=0x2001014" "" {farcall-arm-thumb.s} {{objdump -d farcall-arm-thumb.d}} "farcall-arm-thumb"} - {"ARM-Thumb farcall with BLX" "-Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv5t" {farcall-arm-thumb.s} + {"ARM-Thumb farcall with BLX" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv5t" {farcall-arm-thumb.s} {{objdump -d farcall-arm-thumb-blx.d}} "farcall-arm-thumb-blx"} {"ARM-Thumb farcall (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "" {farcall-arm-thumb.s} @@ -517,7 +543,7 @@ set armeabitests { {{objdump -d farcall-arm-thumb-blx-pic-veneer.d}} "farcall-arm-thumb-blx-pic-veneer"} - {"Thumb-Thumb farcall with BLX" "-Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv5t" {farcall-thumb-thumb.s} + {"Thumb-Thumb farcall with BLX" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv5t" {farcall-thumb-thumb.s} {{objdump -d farcall-thumb-thumb-blx.d}} "farcall-thumb-thumb-blx"} {"Thumb-Thumb farcall M profile" "-Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv7-m" {farcall-thumb-thumb.s} @@ -529,7 +555,7 @@ set armeabitests { {"Thumb-Thumb farcall" "-Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv4t" {farcall-thumb-thumb.s} {{objdump -d farcall-thumb-thumb.d}} "farcall-thumb-thumb"} - {"Thumb-Thumb farcall with BLX (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "-march=armv5t" {farcall-thumb-thumb.s} + {"Thumb-Thumb farcall with BLX (PIC veneer)" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "-march=armv5t" {farcall-thumb-thumb.s} {{objdump -d farcall-thumb-thumb-blx-pic-veneer.d}} "farcall-thumb-thumb-blx-pic-veneer"} {"Thumb-Thumb farcall M profile (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "-march=armv7-m" {farcall-thumb-thumb.s} @@ -551,10 +577,10 @@ set armeabitests { {"Thumb-ARM (short) call" "-Ttext 0x1000 --section-start .foo=0x0002014" "-W" {farcall-thumb-arm-short.s} {{objdump -d farcall-thumb-arm-short.d}} "farcall-thumb-arm-short"} - {"Thumb-ARM farcall with BLX" "-Ttext 0x1c01010 --section-start .foo=0x2001014" "-W -march=armv5t" {farcall-thumb-arm.s} + {"Thumb-ARM farcall with BLX" "--no-fix-arm1176 -Ttext 0x1c01010 --section-start .foo=0x2001014" "-W -march=armv5t" {farcall-thumb-arm.s} {{objdump -d farcall-thumb-arm-blx.d}} "farcall-thumb-arm-blx"} - {"Thumb-ARM farcall with BLX (PIC veneer)" "-Ttext 0x1c01010 --section-start .foo=0x2001014 --pic-veneer" "-W -march=armv5t" {farcall-thumb-arm.s} + {"Thumb-ARM farcall with BLX (PIC veneer)" "--no-fix-arm1176 -Ttext 0x1c01010 --section-start .foo=0x2001014 --pic-veneer" "-W -march=armv5t" {farcall-thumb-arm.s} {{objdump -d farcall-thumb-arm-blx-pic-veneer.d}} "farcall-thumb-arm-blx-pic-veneer"} {"Thumb-ARM farcall (PIC veneer)" "-Ttext 0x1c01010 --section-start .foo=0x2001014 --pic-veneer" "-W" {farcall-thumb-arm.s} @@ -594,7 +620,7 @@ set armeabitests { {{objdump -fdw farcall-mixed-lib-v4t.d}} "farcall-mixed-lib.so"} - {"Mixed ARM/Thumb shared library with long branches (v5t)" "-shared -T arm-lib.ld" "-march=armv5t" + {"Mixed ARM/Thumb shared library with long branches (v5t)" "--no-fix-arm1176 -shared -T arm-lib.ld" "-march=armv5t" {farcall-mixed-lib1.s farcall-mixed-lib2.s} {{objdump -fdw farcall-mixed-lib.d}} "farcall-mixed-lib.so"} @@ -604,24 +630,24 @@ set armeabitests { "farcall-data"} {"R_ARM_THM_JUMP24 Relocation veneers: Short 1" - "--section-start destsect=0x00009000 --section-start .text=0x8000" + "--no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000" "-march=armv7-a -mthumb" {jump-reloc-veneers.s} {{objdump -d jump-reloc-veneers-short1.d}} "jump-reloc-veneers-short1"} {"R_ARM_THM_JUMP24 Relocation veneers: Short 2" - "--section-start destsect=0x00900000 --section-start .text=0x8000" + "--no-fix-arm1176 --section-start destsect=0x00900000 --section-start .text=0x8000" "-march=armv7-a -mthumb" {jump-reloc-veneers.s} {{objdump -d jump-reloc-veneers-short2.d}} "jump-reloc-veneers-short2"} {"R_ARM_THM_JUMP24 Relocation veneers: Long" - "--section-start destsect=0x09000000 --section-start .text=0x8000" + "--no-fix-arm1176 --section-start destsect=0x09000000 --section-start .text=0x8000" "-march=armv7-a -mthumb" {jump-reloc-veneers.s} {{objdump -d jump-reloc-veneers-long.d}} "jump-reloc-veneers-long"} - {"TLS gnu shared library" "-shared -T arm-dyn.ld" "" {tls-gdesc.s} + {"TLS gnu shared library" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" {tls-gdesc.s} {{objdump -fdw tls-gdesc.d} {objdump -Rw tls-gdesc.r}} "tls-lib2.so"} {"TLS gnu shared library non-lazy" "-z now -shared -T arm-dyn.ld" "" {tls-gdesc.s} @@ -636,6 +662,31 @@ set armeabitests { {"TLS thumb1" "-shared -T arm-dyn.ld --section-start .foo=0x4001000" "" {tls-thumb1.s} {{objdump -fdw tls-thumb1.d}} "tls-thumb1"} + + {"erratum 760522 fix (default for v6z)" "--section-start=.foo=0x2001014" + "-march=armv6z" {fix-arm1176.s} + {{objdump -d fix-arm1176-on.d}} + "fix-arm1176-1"} + {"erratum 760522 fix (explicitly on at v6z)" "--section-start=.foo=0x2001014 --fix-arm1176" + "-march=armv6z" {fix-arm1176.s} + {{objdump -d fix-arm1176-on.d}} + "fix-arm1176-2"} + {"erratum 760522 fix (explicitly off at v6z)" "--section-start=.foo=0x2001014 --no-fix-arm1176" + "-march=armv6z" {fix-arm1176.s} + {{objdump -d fix-arm1176-off.d}} + "fix-arm1176-3"} + {"erratum 760522 fix (default for v5)" "--section-start=.foo=0x2001014 " + "-march=armv5te" {fix-arm1176.s} + {{objdump -d fix-arm1176-on.d}} + "fix-arm1176-4"} + {"erratum 760522 fix (default for v7-a)" "--section-start=.foo=0x2001014 " + "-march=armv7-a" {fix-arm1176.s} + {{objdump -d fix-arm1176-off.d}} + "fix-arm1176-5"} + {"erratum 760522 fix (default for ARM1156)" "--section-start=.foo=0x2001014 " + "-mcpu=arm1156t2f-s" {fix-arm1176.s} + {{objdump -d fix-arm1176-off.d}} + "fix-arm1176-6"} } run_ld_link_tests $armeabitests diff --git a/ld/testsuite/ld-arm/cortex-a8-far-3.s b/ld/testsuite/ld-arm/cortex-a8-far-3.s new file mode 100644 index 0000000..48241a5 --- /dev/null +++ b/ld/testsuite/ld-arm/cortex-a8-far-3.s @@ -0,0 +1,9 @@ +.globl far_fn +.type far_fn, %function +.set far_fn, 0x7fff0000 +.globl far_fn1 +.type far_fn1, %function +.set far_fn1, 0x80000000 +.globl far_fn2 +.type far_fn2, %function +.set far_fn2, 0x80000004 diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d new file mode 100644 index 0000000..59efecb --- /dev/null +++ b/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d @@ -0,0 +1,30 @@ + +.* + + +Disassembly of section \.plt: + +00008000 <\.plt>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00000ffc \.word 0x00000ffc + 8014: 4778 bx pc + 8016: 46c0 nop ; \(mov r8, r8\) + 8018: e28fc600 add ip, pc, #0 + 801c: e28cca00 add ip, ip, #0 + 8020: e5bcfff8 ldr pc, \[ip, #4088\]! ; 0xff8 + +Disassembly of section \.text: + +00008ff0 : + 8ff0: 46c0 nop ; \(mov r8, r8\) + 8ff2: f240 0000 movw r0, #0 + 8ff6: f240 0000 movw r0, #0 + 8ffa: f240 0000 movw r0, #0 + 8ffe: f000 b803 b\.w 9008 + 9002: 0000 movs r0, r0 + 9004: 0000 movs r0, r0 + 9006: 0000 movs r0, r0 + 9008: f7ff b804 b\.w 8014 diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.s b/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.s new file mode 100644 index 0000000..afd340d --- /dev/null +++ b/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.s @@ -0,0 +1,10 @@ + .syntax unified + .globl foo + .type foo,%function + .thumb_func +foo: + nop @ 0x00 + movw r0,#0 @ 0x02 + movw r0,#0 @ 0x06 + movw r0,#0 @ 0x0a + b.w bar(PLT) @ 0x0e diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d new file mode 100644 index 0000000..7862008 --- /dev/null +++ b/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d @@ -0,0 +1,32 @@ + +.* + + +Disassembly of section \.plt: + +00008000 <\.plt>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00001004 \.word 0x00001004 + 8014: 4778 bx pc + 8016: 46c0 nop ; \(mov r8, r8\) + 8018: e28fc600 add ip, pc, #0 + 801c: e28cca01 add ip, ip, #4096 ; 0x1000 + 8020: e5bcf000 ldr pc, \[ip, #0\]! + +Disassembly of section \.text: + +00008ff0 : + 8ff0: 46c0 nop ; \(mov r8, r8\) + 8ff2: f240 0000 movw r0, #0 + 8ff6: f240 0000 movw r0, #0 + 8ffa: f240 0000 movw r0, #0 + 8ffe: f000 b803 b\.w 9008 + 9002: 0000 movs r0, r0 + 9004: 0000 movs r0, r0 + 9006: 0000 movs r0, r0 + 9008: d001 beq\.n 900e + 900a: f7ff bffa b\.w 9002 + 900e: f7ff b801 b\.w 8014 diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.s b/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.s new file mode 100644 index 0000000..026fa95 --- /dev/null +++ b/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.s @@ -0,0 +1,10 @@ + .syntax unified + .globl foo + .type foo,%function + .thumb_func +foo: + nop @ 0x00 + movw r0,#0 @ 0x02 + movw r0,#0 @ 0x06 + movw r0,#0 @ 0x0a + beq.w bar(PLT) @ 0x0e diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d new file mode 100644 index 0000000..17cb9ac --- /dev/null +++ b/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d @@ -0,0 +1,28 @@ + +.* + + +Disassembly of section \.plt: + +00008000 <\.plt>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00000ffc \.word 0x00000ffc + 8014: e28fc600 add ip, pc, #0 + 8018: e28cca00 add ip, ip, #0 + 801c: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc + +Disassembly of section \.text: + +00008ff0 : + 8ff0: 46c0 nop ; \(mov r8, r8\) + 8ff2: f240 0000 movw r0, #0 + 8ff6: f240 0000 movw r0, #0 + 8ffa: f240 0000 movw r0, #0 + 8ffe: f000 e804 blx 9008 + 9002: 0000 movs r0, r0 + 9004: 0000 movs r0, r0 + 9006: 0000 movs r0, r0 + 9008: eafffc01 b 8014 diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.s b/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.s new file mode 100644 index 0000000..7f2db05 --- /dev/null +++ b/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.s @@ -0,0 +1,10 @@ + .syntax unified + .globl foo + .type foo,%function + .thumb_func +foo: + nop @ 0x00 + movw r0,#0 @ 0x02 + movw r0,#0 @ 0x06 + movw r0,#0 @ 0x0a + bl bar(PLT) @ 0x0e diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d new file mode 100644 index 0000000..17cb9ac --- /dev/null +++ b/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d @@ -0,0 +1,28 @@ + +.* + + +Disassembly of section \.plt: + +00008000 <\.plt>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00000ffc \.word 0x00000ffc + 8014: e28fc600 add ip, pc, #0 + 8018: e28cca00 add ip, ip, #0 + 801c: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc + +Disassembly of section \.text: + +00008ff0 : + 8ff0: 46c0 nop ; \(mov r8, r8\) + 8ff2: f240 0000 movw r0, #0 + 8ff6: f240 0000 movw r0, #0 + 8ffa: f240 0000 movw r0, #0 + 8ffe: f000 e804 blx 9008 + 9002: 0000 movs r0, r0 + 9004: 0000 movs r0, r0 + 9006: 0000 movs r0, r0 + 9008: eafffc01 b 8014 diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.s b/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.s new file mode 100644 index 0000000..1932034 --- /dev/null +++ b/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.s @@ -0,0 +1,10 @@ + .syntax unified + .globl foo + .type foo,%function + .thumb_func +foo: + nop @ 0x00 + movw r0,#0 @ 0x02 + movw r0,#0 @ 0x06 + movw r0,#0 @ 0x0a + blx bar @ 0x0e diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-plt.ld b/ld/testsuite/ld-arm/cortex-a8-fix-plt.ld new file mode 100644 index 0000000..3103f67 --- /dev/null +++ b/ld/testsuite/ld-arm/cortex-a8-fix-plt.ld @@ -0,0 +1,18 @@ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x07000; + .hash : { *(.hash) } + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.dyn : { *(.rel.dyn) } + .rel.plt : { *(.rel.plt) } + . = 0x08000; + .plt : { *(.plt) } + . = 0x08ff0; + .text : { *(.text) } + . = 0x10000; + .dynamic : { *(.dynamic) } +} diff --git a/ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d b/ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d index f5ff227..881a0ae 100644 --- a/ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d +++ b/ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d @@ -7,7 +7,7 @@ Disassembly of section .text: 1004: 00000000 andeq r0, r0, r0 00001008 <__bar_veneer>: - 1008: e59fc000 ldr ip, \[pc, #0\] ; 1010 <__bar_veneer\+0x8> + 1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_veneer\+0x8> 100c: e08ff00c add pc, pc, ip 1010: 0200000c .word 0x0200000c 1014: 00000000 .word 0x00000000 diff --git a/ld/testsuite/ld-arm/farcall-arm-thumb.d b/ld/testsuite/ld-arm/farcall-arm-thumb.d index 8291be3..3fc02e3 100644 --- a/ld/testsuite/ld-arm/farcall-arm-thumb.d +++ b/ld/testsuite/ld-arm/farcall-arm-thumb.d @@ -7,7 +7,7 @@ Disassembly of section .text: 1004: 00000000 andeq r0, r0, r0 00001008 <__bar_from_arm>: - 1008: e59fc000 ldr ip, \[pc, #0\] ; 1010 <__bar_from_arm\+0x8> + 1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_from_arm\+0x8> 100c: e12fff1c bx ip 1010: 02001015 .word 0x02001015 1014: 00000000 .word 0x00000000 diff --git a/ld/testsuite/ld-arm/farcall-group-size2.d b/ld/testsuite/ld-arm/farcall-group-size2.d index 8b1f765..d70bcac 100644 --- a/ld/testsuite/ld-arm/farcall-group-size2.d +++ b/ld/testsuite/ld-arm/farcall-group-size2.d @@ -8,7 +8,7 @@ Disassembly of section .text: 1004: eb000002 bl 1014 <__bar2_veneer> 00001008 <__bar_from_arm>: - 1008: e59fc000 ldr ip, \[pc, #0\] ; 1010 <__bar_from_arm\+0x8> + 1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_from_arm\+0x8> 100c: e12fff1c bx ip 1010: 02003021 .word 0x02003021 @@ -24,12 +24,12 @@ Disassembly of section .text: 102c: 00000000 andeq r0, r0, r0 00001030 <__bar5_from_arm>: - 1030: e59fc000 ldr ip, \[pc, #0\] ; 1038 <__bar5_from_arm\+0x8> + 1030: e59fc000 ldr ip, \[pc\] ; 1038 <__bar5_from_arm\+0x8> 1034: e12fff1c bx ip 1038: 0200302f .word 0x0200302f 0000103c <__bar4_from_arm>: - 103c: e59fc000 ldr ip, \[pc, #0\] ; 1044 <__bar4_from_arm\+0x8> + 103c: e59fc000 ldr ip, \[pc\] ; 1044 <__bar4_from_arm\+0x8> 1040: e12fff1c bx ip 1044: 0200302d .word 0x0200302d diff --git a/ld/testsuite/ld-arm/farcall-group.d b/ld/testsuite/ld-arm/farcall-group.d index f20b785..75514f4 100644 --- a/ld/testsuite/ld-arm/farcall-group.d +++ b/ld/testsuite/ld-arm/farcall-group.d @@ -14,12 +14,12 @@ Disassembly of section .text: 1014: 00000000 andeq r0, r0, r0 00001018 <__bar5_from_arm>: - 1018: e59fc000 ldr ip, \[pc, #0\] ; 1020 <__bar5_from_arm\+0x8> + 1018: e59fc000 ldr ip, \[pc\] ; 1020 <__bar5_from_arm\+0x8> 101c: e12fff1c bx ip 1020: 0200302f .word 0x0200302f 00001024 <__bar4_from_arm>: - 1024: e59fc000 ldr ip, \[pc, #0\] ; 102c <__bar4_from_arm\+0x8> + 1024: e59fc000 ldr ip, \[pc\] ; 102c <__bar4_from_arm\+0x8> 1028: e12fff1c bx ip 102c: 0200302d .word 0x0200302d @@ -28,7 +28,7 @@ Disassembly of section .text: 1034: 02003028 .word 0x02003028 00001038 <__bar_from_arm>: - 1038: e59fc000 ldr ip, \[pc, #0\] ; 1040 <__bar_from_arm\+0x8> + 1038: e59fc000 ldr ip, \[pc\] ; 1040 <__bar_from_arm\+0x8> 103c: e12fff1c bx ip 1040: 02003021 .word 0x02003021 diff --git a/ld/testsuite/ld-arm/farcall-group4.s b/ld/testsuite/ld-arm/farcall-group4.s index 17f503b..95ad035 100644 --- a/ld/testsuite/ld-arm/farcall-group4.s +++ b/ld/testsuite/ld-arm/farcall-group4.s @@ -8,6 +8,7 @@ myfunc: bl bar .section .far, "xa" + .type bar, %function .global bar bar: bx lr diff --git a/ld/testsuite/ld-arm/farcall-mix.d b/ld/testsuite/ld-arm/farcall-mix.d index 97e062c..227cd83 100644 --- a/ld/testsuite/ld-arm/farcall-mix.d +++ b/ld/testsuite/ld-arm/farcall-mix.d @@ -12,18 +12,18 @@ Disassembly of section .text: 1014: 00000000 andeq r0, r0, r0 00001018 <__bar_from_arm>: - 1018: e59fc000 ldr ip, \[pc, #0\] ; 1020 <__bar_from_arm\+0x8> + 1018: e59fc000 ldr ip, \[pc\] ; 1020 <__bar_from_arm\+0x8> 101c: e12fff1c bx ip 1020: 02002021 .word 0x02002021 00001024 <__bar3_veneer>: 1024: e51ff004 ldr pc, \[pc, #-4\] ; 1028 <__bar3_veneer\+0x4> 1028: 02002028 .word 0x02002028 0000102c <__bar5_from_arm>: - 102c: e59fc000 ldr ip, \[pc, #0\] ; 1034 <__bar5_from_arm\+0x8> + 102c: e59fc000 ldr ip, \[pc\] ; 1034 <__bar5_from_arm\+0x8> 1030: e12fff1c bx ip 1034: 0200202f .word 0x0200202f 00001038 <__bar4_from_arm>: - 1038: e59fc000 ldr ip, \[pc, #0\] ; 1040 <__bar4_from_arm\+0x8> + 1038: e59fc000 ldr ip, \[pc\] ; 1040 <__bar4_from_arm\+0x8> 103c: e12fff1c bx ip 1040: 0200202d .word 0x0200202d diff --git a/ld/testsuite/ld-arm/farcall-mix2.d b/ld/testsuite/ld-arm/farcall-mix2.d index c79ddea..f9b66a3 100644 --- a/ld/testsuite/ld-arm/farcall-mix2.d +++ b/ld/testsuite/ld-arm/farcall-mix2.d @@ -8,7 +8,7 @@ Disassembly of section .text: 1004: eb000002 bl 1014 <__bar2_veneer> 00001008 <__bar_from_arm>: - 1008: e59fc000 ldr ip, \[pc, #0\] ; 1010 <__bar_from_arm\+0x8> + 1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_from_arm\+0x8> 100c: e12fff1c bx ip 1010: 02003021 .word 0x02003021 00001014 <__bar2_veneer>: @@ -28,12 +28,12 @@ Disassembly of section .mytext: 2014: 02003028 .word 0x02003028 00002018 <__bar4_from_arm>: - 2018: e59fc000 ldr ip, \[pc, #0\] ; 2020 <__bar4_from_arm\+0x8> + 2018: e59fc000 ldr ip, \[pc\] ; 2020 <__bar4_from_arm\+0x8> 201c: e12fff1c bx ip 2020: 0200302d .word 0x0200302d 00002024 <__bar5_from_arm>: - 2024: e59fc000 ldr ip, \[pc, #0\] ; 202c <__bar5_from_arm\+0x8> + 2024: e59fc000 ldr ip, \[pc\] ; 202c <__bar5_from_arm\+0x8> 2028: e12fff1c bx ip 202c: 0200302f .word 0x0200302f ... diff --git a/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d b/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d index 0863e9d..feb109d 100644 --- a/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d +++ b/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d @@ -62,28 +62,28 @@ Disassembly of section .text: .* <__app_func_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) - .*: e59fc000 ldr ip, \[pc, #0\] ; 100033c <__app_func_from_thumb\+0xc> + .*: e59fc000 ldr ip, \[pc\] ; 100033c <__app_func_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff68 .word 0xfeffff68 .* <__lib_func4_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) - .*: e59fc000 ldr ip, \[pc, #0\] ; 100034c <__lib_func4_from_thumb\+0xc> + .*: e59fc000 ldr ip, \[pc\] ; 100034c <__lib_func4_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff88 .word 0xfeffff88 .* <__app_func_weak_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) - .*: e59fc000 ldr ip, \[pc, #0\] ; 100035c <__app_func_weak_from_thumb\+0xc> + .*: e59fc000 ldr ip, \[pc\] ; 100035c <__app_func_weak_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff58 .word 0xfeffff58 .* <__lib_func3_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) - .*: e59fc000 ldr ip, \[pc, #0\] ; 100036c <__lib_func3_from_thumb\+0xc> + .*: e59fc000 ldr ip, \[pc\] ; 100036c <__lib_func3_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff58 .word 0xfeffff58 ... @@ -99,14 +99,14 @@ Disassembly of section .text: .* <__app_func_weak_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) - .*: e59fc000 ldr ip, \[pc, #0\] ; 200038c <__app_func_weak_from_thumb\+0xc> + .*: e59fc000 ldr ip, \[pc\] ; 200038c <__app_func_weak_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: fdffff28 .word 0xfdffff28 .* <__app_func_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) - .*: e59fc000 ldr ip, \[pc, #0\] ; 200039c <__app_func_from_thumb\+0xc> + .*: e59fc000 ldr ip, \[pc\] ; 200039c <__app_func_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: fdffff08 .word 0xfdffff08 diff --git a/ld/testsuite/ld-arm/farcall-mixed-lib.d b/ld/testsuite/ld-arm/farcall-mixed-lib.d index 2b0b9ac..e7cdbc9 100644 --- a/ld/testsuite/ld-arm/farcall-mixed-lib.d +++ b/ld/testsuite/ld-arm/farcall-mixed-lib.d @@ -52,22 +52,22 @@ Disassembly of section .text: .*: 46c0 nop ; \(mov r8, r8\) .* <__lib_func3_from_thumb>: - .*: e59fc000 ldr ip, \[pc, #0\] ; 1000328 <__lib_func3_from_thumb\+0x8> + .*: e59fc000 ldr ip, \[pc\] ; 1000328 <__lib_func3_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff90 .word 0xfeffff90 .* <__app_func_weak_from_thumb>: - .*: e59fc000 ldr ip, \[pc, #0\] ; 1000334 <__app_func_weak_from_thumb\+0x8> + .*: e59fc000 ldr ip, \[pc\] ; 1000334 <__app_func_weak_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff78 .word 0xfeffff78 .* <__lib_func4_from_thumb>: - .*: e59fc000 ldr ip, \[pc, #0\] ; 1000340 <__lib_func4_from_thumb\+0x8> + .*: e59fc000 ldr ip, \[pc\] ; 1000340 <__lib_func4_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff84 .word 0xfeffff84 .* <__app_func_from_thumb>: - .*: e59fc000 ldr ip, \[pc, #0\] ; 100034c <__app_func_from_thumb\+0x8> + .*: e59fc000 ldr ip, \[pc\] ; 100034c <__app_func_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff54 .word 0xfeffff54 ... @@ -81,12 +81,12 @@ Disassembly of section .text: .*: 46c0 nop ; \(mov r8, r8\) .* <__app_func_weak_from_thumb>: - .*: e59fc000 ldr ip, \[pc, #0\] ; 2000378 <__app_func_weak_from_thumb\+0x8> + .*: e59fc000 ldr ip, \[pc\] ; 2000378 <__app_func_weak_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: fdffff34 .word 0xfdffff34 .* <__app_func_from_thumb>: - .*: e59fc000 ldr ip, \[pc, #0\] ; 2000384 <__app_func_from_thumb\+0x8> + .*: e59fc000 ldr ip, \[pc\] ; 2000384 <__app_func_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: fdffff1c .word 0xfdffff1c ... diff --git a/ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d b/ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d index a0d1f36..ba10356 100644 --- a/ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d +++ b/ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d @@ -8,7 +8,7 @@ Disassembly of section .text: 1f01014: f0ff effe blx 2001014 01f01018 <__bar_from_thumb>: - 1f01018: e59fc000 ldr ip, \[pc, #0\] ; 1f01020 <__bar_from_thumb\+0x8> + 1f01018: e59fc000 ldr ip, \[pc\] ; 1f01020 <__bar_from_thumb\+0x8> 1f0101c: e08ff00c add pc, pc, ip 1f01020: 000ffff0 .word 0x000ffff0 1f01024: 00000000 .word 0x00000000 diff --git a/ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d b/ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d index eb8da17..aff4df7 100644 --- a/ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d +++ b/ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d @@ -10,7 +10,7 @@ Disassembly of section .text: 01f01018 <__bar_from_thumb>: 1f01018: 4778 bx pc 1f0101a: 46c0 nop ; \(mov r8, r8\) - 1f0101c: e59fc000 ldr ip, \[pc, #0\] ; 1f01024 <__bar_from_thumb\+0xc> + 1f0101c: e59fc000 ldr ip, \[pc\] ; 1f01024 <__bar_from_thumb\+0xc> 1f01020: e08cf00f add pc, ip, pc 1f01024: 000fffec .word 0x000fffec diff --git a/ld/testsuite/ld-arm/farcall-thumb-thumb.d b/ld/testsuite/ld-arm/farcall-thumb-thumb.d index ffbc6df..4f4c2c9 100644 --- a/ld/testsuite/ld-arm/farcall-thumb-thumb.d +++ b/ld/testsuite/ld-arm/farcall-thumb-thumb.d @@ -10,7 +10,7 @@ Disassembly of section .text: 00001008 <__bar_veneer>: 1008: 4778 bx pc 100a: 46c0 nop ; \(mov r8, r8\) - 100c: e59fc000 ldr ip, \[pc, #0\] ; 1014 <__bar_veneer\+0xc> + 100c: e59fc000 ldr ip, \[pc\] ; 1014 <__bar_veneer\+0xc> 1010: e12fff1c bx ip 1014: 02001015 .word 0x02001015 Disassembly of section .foo: diff --git a/ld/testsuite/ld-arm/fix-arm1176-off.d b/ld/testsuite/ld-arm/fix-arm1176-off.d new file mode 100644 index 0000000..3b45a3b --- /dev/null +++ b/ld/testsuite/ld-arm/fix-arm1176-off.d @@ -0,0 +1,17 @@ + +.*: file format elf32-littlearm + + +Disassembly of section .foo: + +[0-9a-f]+ <_start>: + [0-9a-f]+: f000 e800 blx 2001018 <__func_to_branch_to_veneer> + +[0-9a-f]+ <__func_to_branch_to_veneer>: + [0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; 200101c <__func_to_branch_to_veneer\+0x4> + [0-9a-f]+: 00008000 .word 0x00008000 + +Disassembly of section .text: + +[0-9a-f]+ : + [0-9a-f]+: e12fff1e bx lr diff --git a/ld/testsuite/ld-arm/fix-arm1176-on.d b/ld/testsuite/ld-arm/fix-arm1176-on.d new file mode 100644 index 0000000..c4e7870 --- /dev/null +++ b/ld/testsuite/ld-arm/fix-arm1176-on.d @@ -0,0 +1,20 @@ + +.+: file format elf32-littlearm + + +Disassembly of section .foo: + +[0-9a-f]+ <_start>: + [0-9a-f]+: f000 f800 bl 2001018 <__func_to_branch_to_veneer> + +[0-9a-f]+ <__func_to_branch_to_veneer>: + [0-9a-f]+: 4778 bx pc + [0-9a-f]+: 46c0 nop ; \(mov r8, r8\) + [0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; 2001020 <__func_to_branch_to_veneer\+0x8> + [0-9a-f]+: 00008000 .word 0x00008000 + [0-9a-f]+: 00000000 .word 0x00000000 + +Disassembly of section .text: + +[0-9a-f]+ : + [0-9a-f]+: e12fff1e bx lr diff --git a/ld/testsuite/ld-arm/fix-arm1176.s b/ld/testsuite/ld-arm/fix-arm1176.s new file mode 100644 index 0000000..96e0328 --- /dev/null +++ b/ld/testsuite/ld-arm/fix-arm1176.s @@ -0,0 +1,15 @@ + .syntax unified + .globl _start + .globl func_to_branch_to + + .arm + .text +func_to_branch_to: + bx lr + + .thumb + .section .foo, "xa" + .thumb_func +_start: + bl func_to_branch_to + diff --git a/ld/testsuite/ld-arm/ifunc-10.dd b/ld/testsuite/ld-arm/ifunc-10.dd index 5f876fb..f9bfd09 100644 --- a/ld/testsuite/ld-arm/ifunc-10.dd +++ b/ld/testsuite/ld-arm/ifunc-10.dd @@ -268,8 +268,8 @@ Disassembly of section \.text: a028: eb0017f4 bl 10000 a02c: ea0017f3 b 10000 a030: 0a0017f2 beq 10000 - a034: e59f4000 ldr r4, \[pc, #0\] ; a03c <_start\+0x14> - a038: e59f4000 ldr r4, \[pc, #0\] ; a040 <_start\+0x18> + a034: e59f4000 ldr r4, \[pc\] ; a03c <_start\+0x14> + a038: e59f4000 ldr r4, \[pc\] ; a040 <_start\+0x18> #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ @@ -290,8 +290,8 @@ Disassembly of section \.text: #------ aaf1's .iplt entry #------------------------------------------------------------------------------ a04c: 0afffc1c beq 90c4 - a050: e59f4000 ldr r4, \[pc, #0\] ; a058 <_start\+0x30> - a054: e59f4000 ldr r4, \[pc, #0\] ; a05c <_start\+0x34> + a050: e59f4000 ldr r4, \[pc\] ; a058 <_start\+0x30> + a054: e59f4000 ldr r4, \[pc\] ; a05c <_start\+0x34> #------------------------------------------------------------------------------ #------ .got offset for aaf1's .iplt entry #------------------------------------------------------------------------------ @@ -312,8 +312,8 @@ Disassembly of section \.text: #------ taf1's .iplt entry #------------------------------------------------------------------------------ a068: 0afffc20 beq 90f0 - a06c: e59f4000 ldr r4, \[pc, #0\] ; a074 <_start\+0x4c> - a070: e59f4000 ldr r4, \[pc, #0\] ; a078 <_start\+0x50> + a06c: e59f4000 ldr r4, \[pc\] ; a074 <_start\+0x4c> + a070: e59f4000 ldr r4, \[pc\] ; a078 <_start\+0x50> #------------------------------------------------------------------------------ #------ .got offset for taf1's .iplt entry #------------------------------------------------------------------------------ @@ -334,8 +334,8 @@ Disassembly of section \.text: #------ abf1's .iplt entry #------------------------------------------------------------------------------ a084: 0afffc16 beq 90e4 - a088: e59f4000 ldr r4, \[pc, #0\] ; a090 <_start\+0x68> - a08c: e59f4000 ldr r4, \[pc, #0\] ; a094 <_start\+0x6c> + a088: e59f4000 ldr r4, \[pc\] ; a090 <_start\+0x68> + a08c: e59f4000 ldr r4, \[pc\] ; a094 <_start\+0x6c> #------------------------------------------------------------------------------ #------ .got offset for abf1's .iplt entry #------------------------------------------------------------------------------ @@ -356,8 +356,8 @@ Disassembly of section \.text: #------ tbf1's .iplt entry #------------------------------------------------------------------------------ a0a0: 0afffc1a beq 9110 - a0a4: e59f4000 ldr r4, \[pc, #0\] ; a0ac <_start\+0x84> - a0a8: e59f4000 ldr r4, \[pc, #0\] ; a0b0 <_start\+0x88> + a0a4: e59f4000 ldr r4, \[pc\] ; a0ac <_start\+0x84> + a0a8: e59f4000 ldr r4, \[pc\] ; a0b0 <_start\+0x88> #------------------------------------------------------------------------------ #------ .got offset for tbf1's .iplt entry #------------------------------------------------------------------------------ @@ -378,8 +378,8 @@ Disassembly of section \.text: #------ aaf2's .plt entry #------------------------------------------------------------------------------ a0bc: 0afffbe6 beq 905c - a0c0: e59f4000 ldr r4, \[pc, #0\] ; a0c8 <_start\+0xa0> - a0c4: e59f4000 ldr r4, \[pc, #0\] ; a0cc <_start\+0xa4> + a0c0: e59f4000 ldr r4, \[pc\] ; a0c8 <_start\+0xa0> + a0c4: e59f4000 ldr r4, \[pc\] ; a0cc <_start\+0xa4> #------------------------------------------------------------------------------ #------ .got offset for aaf2 #------------------------------------------------------------------------------ @@ -400,8 +400,8 @@ Disassembly of section \.text: #------ taf2's .plt entry #------------------------------------------------------------------------------ a0d8: 0afffbdc beq 9050 - a0dc: e59f4000 ldr r4, \[pc, #0\] ; a0e4 <_start\+0xbc> - a0e0: e59f4000 ldr r4, \[pc, #0\] ; a0e8 <_start\+0xc0> + a0dc: e59f4000 ldr r4, \[pc\] ; a0e4 <_start\+0xbc> + a0e0: e59f4000 ldr r4, \[pc\] ; a0e8 <_start\+0xc0> #------------------------------------------------------------------------------ #------ .got offset for taf2 #------------------------------------------------------------------------------ @@ -422,8 +422,8 @@ Disassembly of section \.text: #------ abf2's .plt entry #------------------------------------------------------------------------------ a0f4: 0afffbef beq 90b8 - a0f8: e59f4000 ldr r4, \[pc, #0\] ; a100 <_start\+0xd8> - a0fc: e59f4000 ldr r4, \[pc, #0\] ; a104 <_start\+0xdc> + a0f8: e59f4000 ldr r4, \[pc\] ; a100 <_start\+0xd8> + a0fc: e59f4000 ldr r4, \[pc\] ; a104 <_start\+0xdc> #------------------------------------------------------------------------------ #------ .got offset for abf2 #------------------------------------------------------------------------------ @@ -444,8 +444,8 @@ Disassembly of section \.text: #------ tbf2's .plt entry #------------------------------------------------------------------------------ a110: 0afffbcb beq 9044 - a114: e59f4000 ldr r4, \[pc, #0\] ; a11c <_start\+0xf4> - a118: e59f4000 ldr r4, \[pc, #0\] ; a120 <_start\+0xf8> + a114: e59f4000 ldr r4, \[pc\] ; a11c <_start\+0xf4> + a118: e59f4000 ldr r4, \[pc\] ; a120 <_start\+0xf8> #------------------------------------------------------------------------------ #------ .got offset for tbf2 #------------------------------------------------------------------------------ @@ -457,8 +457,8 @@ Disassembly of section \.text: a124: ebfffc0f bl 9168 a128: eafffc0e b 9168 a12c: 0afffc0d beq 9168 - a130: e59f4000 ldr r4, \[pc, #0\] ; a138 <_start\+0x110> - a134: e59f4000 ldr r4, \[pc, #0\] ; a13c <_start\+0x114> + a130: e59f4000 ldr r4, \[pc\] ; a138 <_start\+0x110> + a134: e59f4000 ldr r4, \[pc\] ; a13c <_start\+0x114> #------------------------------------------------------------------------------ #------ .got offset for aaf3 #------------------------------------------------------------------------------ @@ -470,8 +470,8 @@ Disassembly of section \.text: a140: ebfffc05 bl 915c a144: eafffc04 b 915c a148: 0afffc03 beq 915c - a14c: e59f4000 ldr r4, \[pc, #0\] ; a154 <_start\+0x12c> - a150: e59f4000 ldr r4, \[pc, #0\] ; a158 <_start\+0x130> + a14c: e59f4000 ldr r4, \[pc\] ; a154 <_start\+0x12c> + a150: e59f4000 ldr r4, \[pc\] ; a158 <_start\+0x130> #------------------------------------------------------------------------------ #------ .got offset for taf3 #------------------------------------------------------------------------------ @@ -483,8 +483,8 @@ Disassembly of section \.text: a15c: ebfffbf3 bl 9130 a160: eafffbf2 b 9130 a164: 0afffbf1 beq 9130 - a168: e59f4000 ldr r4, \[pc, #0\] ; a170 <_start\+0x148> - a16c: e59f4000 ldr r4, \[pc, #0\] ; a174 <_start\+0x14c> + a168: e59f4000 ldr r4, \[pc\] ; a170 <_start\+0x148> + a16c: e59f4000 ldr r4, \[pc\] ; a174 <_start\+0x14c> #------------------------------------------------------------------------------ #------ .got offset for abf3 #------------------------------------------------------------------------------ @@ -496,8 +496,8 @@ Disassembly of section \.text: a178: ebfffbf4 bl 9150 a17c: eafffbf3 b 9150 a180: 0afffbf2 beq 9150 - a184: e59f4000 ldr r4, \[pc, #0\] ; a18c <_start\+0x164> - a188: e59f4000 ldr r4, \[pc, #0\] ; a190 <_start\+0x168> + a184: e59f4000 ldr r4, \[pc\] ; a18c <_start\+0x164> + a188: e59f4000 ldr r4, \[pc\] ; a190 <_start\+0x168> #------------------------------------------------------------------------------ #------ .got offset for tbf3 #------------------------------------------------------------------------------ @@ -518,8 +518,8 @@ Disassembly of section \.text: #------ aaf4's .plt entry #------------------------------------------------------------------------------ a19c: 0afffba0 beq 9024 - a1a0: e59f4000 ldr r4, \[pc, #0\] ; a1a8 <_start\+0x180> - a1a4: e59f4000 ldr r4, \[pc, #0\] ; a1ac <_start\+0x184> + a1a0: e59f4000 ldr r4, \[pc\] ; a1a8 <_start\+0x180> + a1a4: e59f4000 ldr r4, \[pc\] ; a1ac <_start\+0x184> #------------------------------------------------------------------------------ #------ .got offset for aaf4 #------------------------------------------------------------------------------ @@ -540,8 +540,8 @@ Disassembly of section \.text: #------ taf4's .plt entry #------------------------------------------------------------------------------ a1b8: 0afffbba beq 90a8 - a1bc: e59f4000 ldr r4, \[pc, #0\] ; a1c4 <_start\+0x19c> - a1c0: e59f4000 ldr r4, \[pc, #0\] ; a1c8 <_start\+0x1a0> + a1bc: e59f4000 ldr r4, \[pc\] ; a1c4 <_start\+0x19c> + a1c0: e59f4000 ldr r4, \[pc\] ; a1c8 <_start\+0x1a0> #------------------------------------------------------------------------------ #------ .got offset for taf4 #------------------------------------------------------------------------------ @@ -562,8 +562,8 @@ Disassembly of section \.text: #------ abf4's .plt entry #------------------------------------------------------------------------------ a1d4: 0afffba4 beq 906c - a1d8: e59f4000 ldr r4, \[pc, #0\] ; a1e0 <_start\+0x1b8> - a1dc: e59f4000 ldr r4, \[pc, #0\] ; a1e4 <_start\+0x1bc> + a1d8: e59f4000 ldr r4, \[pc\] ; a1e0 <_start\+0x1b8> + a1dc: e59f4000 ldr r4, \[pc\] ; a1e4 <_start\+0x1bc> #------------------------------------------------------------------------------ #------ .got offset for abf4 #------------------------------------------------------------------------------ @@ -584,8 +584,8 @@ Disassembly of section \.text: #------ tbf4's .plt entry #------------------------------------------------------------------------------ a1f0: 0afffba1 beq 907c - a1f4: e59f4000 ldr r4, \[pc, #0\] ; a1fc <_start\+0x1d4> - a1f8: e59f4000 ldr r4, \[pc, #0\] ; a200 <_start\+0x1d8> + a1f4: e59f4000 ldr r4, \[pc\] ; a1fc <_start\+0x1d4> + a1f8: e59f4000 ldr r4, \[pc\] ; a200 <_start\+0x1d8> #------------------------------------------------------------------------------ #------ .got offset for tbf4 #------------------------------------------------------------------------------ diff --git a/ld/testsuite/ld-arm/ifunc-3.dd b/ld/testsuite/ld-arm/ifunc-3.dd index 1a4f52c..824d516 100644 --- a/ld/testsuite/ld-arm/ifunc-3.dd +++ b/ld/testsuite/ld-arm/ifunc-3.dd @@ -58,8 +58,8 @@ Disassembly of section \.text: 0000a010 : a010: eb0017fa bl 10000 - a014: e59f4000 ldr r4, \[pc, #0\] ; a01c - a018: e59f4000 ldr r4, \[pc, #0\] ; a020 + a014: e59f4000 ldr r4, \[pc\] ; a01c + a018: e59f4000 ldr r4, \[pc\] ; a020 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ @@ -72,8 +72,8 @@ Disassembly of section \.text: #------ f1's .iplt entry #------------------------------------------------------------------------------ a024: ebfffbfd bl 9020 - a028: e59f4000 ldr r4, \[pc, #0\] ; a030 - a02c: e59f4000 ldr r4, \[pc, #0\] ; a034 + a028: e59f4000 ldr r4, \[pc\] ; a030 + a02c: e59f4000 ldr r4, \[pc\] ; a034 #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ @@ -86,8 +86,8 @@ Disassembly of section \.text: #------ f2's .plt entry #------------------------------------------------------------------------------ a038: ebfffbf5 bl 9014 - a03c: e59f4000 ldr r4, \[pc, #0\] ; a044 - a040: e59f4000 ldr r4, \[pc, #0\] ; a048 + a03c: e59f4000 ldr r4, \[pc\] ; a044 + a040: e59f4000 ldr r4, \[pc\] ; a048 #------------------------------------------------------------------------------ #------ .got offset for f2 #------------------------------------------------------------------------------ @@ -100,8 +100,8 @@ Disassembly of section \.text: #------ f3's .iplt entry #------------------------------------------------------------------------------ a04c: ebfffbf6 bl 902c - a050: e59f4000 ldr r4, \[pc, #0\] ; a058 - a054: e59f4000 ldr r4, \[pc, #0\] ; a05c + a050: e59f4000 ldr r4, \[pc\] ; a058 + a054: e59f4000 ldr r4, \[pc\] ; a05c #------------------------------------------------------------------------------ #------ GP-relative offset of f3's .igot.plt entry #------------------------------------------------------------------------------ @@ -114,8 +114,8 @@ Disassembly of section \.text: #------ f4's .iplt entry #------------------------------------------------------------------------------ a060: ebfffbf4 bl 9038 - a064: e59f4000 ldr r4, \[pc, #0\] ; a06c - a068: e59f4000 ldr r4, \[pc, #0\] ; a070 + a064: e59f4000 ldr r4, \[pc\] ; a06c + a068: e59f4000 ldr r4, \[pc\] ; a070 #------------------------------------------------------------------------------ #------ .got offset for f4 #------------------------------------------------------------------------------ diff --git a/ld/testsuite/ld-arm/ifunc-4.dd b/ld/testsuite/ld-arm/ifunc-4.dd index f000835..afac397 100644 --- a/ld/testsuite/ld-arm/ifunc-4.dd +++ b/ld/testsuite/ld-arm/ifunc-4.dd @@ -324,8 +324,8 @@ Disassembly of section \.text: a050: eb0017ea bl 10000 a054: ea0017e9 b 10000 a058: 0a0017e8 beq 10000 - a05c: e59f4000 ldr r4, \[pc, #0\] ; a064 - a060: e59f4000 ldr r4, \[pc, #0\] ; a068 + a05c: e59f4000 ldr r4, \[pc\] ; a064 + a060: e59f4000 ldr r4, \[pc\] ; a068 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ @@ -346,8 +346,8 @@ Disassembly of section \.text: #------ aaf1's .iplt entry #------------------------------------------------------------------------------ a074: 0afffbfc beq 906c - a078: e59f4000 ldr r4, \[pc, #0\] ; a080 - a07c: e59f4000 ldr r4, \[pc, #0\] ; a084 + a078: e59f4000 ldr r4, \[pc\] ; a080 + a07c: e59f4000 ldr r4, \[pc\] ; a084 #------------------------------------------------------------------------------ #------ GP-relative offset of aaf1's .igot.plt entry #------------------------------------------------------------------------------ @@ -368,8 +368,8 @@ Disassembly of section \.text: #------ taf1's .iplt entry #------------------------------------------------------------------------------ a090: 0afffc00 beq 9098 - a094: e59f4000 ldr r4, \[pc, #0\] ; a09c - a098: e59f4000 ldr r4, \[pc, #0\] ; a0a0 + a094: e59f4000 ldr r4, \[pc\] ; a09c + a098: e59f4000 ldr r4, \[pc\] ; a0a0 #------------------------------------------------------------------------------ #------ GP-relative offset of taf1's .igot.plt entry #------------------------------------------------------------------------------ @@ -390,8 +390,8 @@ Disassembly of section \.text: #------ abf1's .iplt entry #------------------------------------------------------------------------------ a0ac: 0afffbf6 beq 908c - a0b0: e59f4000 ldr r4, \[pc, #0\] ; a0b8 - a0b4: e59f4000 ldr r4, \[pc, #0\] ; a0bc + a0b0: e59f4000 ldr r4, \[pc\] ; a0b8 + a0b4: e59f4000 ldr r4, \[pc\] ; a0bc #------------------------------------------------------------------------------ #------ GP-relative offset of abf1's .igot.plt entry #------------------------------------------------------------------------------ @@ -412,8 +412,8 @@ Disassembly of section \.text: #------ tbf1's .iplt entry #------------------------------------------------------------------------------ a0c8: 0afffbfa beq 90b8 - a0cc: e59f4000 ldr r4, \[pc, #0\] ; a0d4 - a0d0: e59f4000 ldr r4, \[pc, #0\] ; a0d8 + a0cc: e59f4000 ldr r4, \[pc\] ; a0d4 + a0d0: e59f4000 ldr r4, \[pc\] ; a0d8 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf1's .igot.plt entry #------------------------------------------------------------------------------ @@ -434,8 +434,8 @@ Disassembly of section \.text: #------ aaf2's .plt entry #------------------------------------------------------------------------------ a0e4: 0afffbd9 beq 9050 - a0e8: e59f4000 ldr r4, \[pc, #0\] ; a0f0 - a0ec: e59f4000 ldr r4, \[pc, #0\] ; a0f4 + a0e8: e59f4000 ldr r4, \[pc\] ; a0f0 + a0ec: e59f4000 ldr r4, \[pc\] ; a0f4 #------------------------------------------------------------------------------ #------ .got offset for aaf2 #------------------------------------------------------------------------------ @@ -456,8 +456,8 @@ Disassembly of section \.text: #------ taf2's .plt entry #------------------------------------------------------------------------------ a100: 0afffbcf beq 9044 - a104: e59f4000 ldr r4, \[pc, #0\] ; a10c - a108: e59f4000 ldr r4, \[pc, #0\] ; a110 + a104: e59f4000 ldr r4, \[pc\] ; a10c + a108: e59f4000 ldr r4, \[pc\] ; a110 #------------------------------------------------------------------------------ #------ .got offset for taf2 #------------------------------------------------------------------------------ @@ -478,8 +478,8 @@ Disassembly of section \.text: #------ abf2's .plt entry #------------------------------------------------------------------------------ a11c: 0afffbcf beq 9060 - a120: e59f4000 ldr r4, \[pc, #0\] ; a128 - a124: e59f4000 ldr r4, \[pc, #0\] ; a12c + a120: e59f4000 ldr r4, \[pc\] ; a128 + a124: e59f4000 ldr r4, \[pc\] ; a12c #------------------------------------------------------------------------------ #------ .got offset for abf2 #------------------------------------------------------------------------------ @@ -500,8 +500,8 @@ Disassembly of section \.text: #------ tbf2's .plt entry #------------------------------------------------------------------------------ a138: 0afffbbe beq 9038 - a13c: e59f4000 ldr r4, \[pc, #0\] ; a144 - a140: e59f4000 ldr r4, \[pc, #0\] ; a148 + a13c: e59f4000 ldr r4, \[pc\] ; a144 + a140: e59f4000 ldr r4, \[pc\] ; a148 #------------------------------------------------------------------------------ #------ .got offset for tbf2 #------------------------------------------------------------------------------ @@ -522,8 +522,8 @@ Disassembly of section \.text: #------ aaf3's .iplt entry #------------------------------------------------------------------------------ a154: 0afffbfc beq 914c - a158: e59f4000 ldr r4, \[pc, #0\] ; a160 - a15c: e59f4000 ldr r4, \[pc, #0\] ; a164 + a158: e59f4000 ldr r4, \[pc\] ; a160 + a15c: e59f4000 ldr r4, \[pc\] ; a164 #------------------------------------------------------------------------------ #------ GP-relative offset of aaf3's .igot.plt entry #------------------------------------------------------------------------------ @@ -544,8 +544,8 @@ Disassembly of section \.text: #------ taf3's .iplt entry #------------------------------------------------------------------------------ a170: 0afffbe6 beq 9110 - a174: e59f4000 ldr r4, \[pc, #0\] ; a17c - a178: e59f4000 ldr r4, \[pc, #0\] ; a180 + a174: e59f4000 ldr r4, \[pc\] ; a17c + a178: e59f4000 ldr r4, \[pc\] ; a180 #------------------------------------------------------------------------------ #------ GP-relative offset of taf3's .igot.plt entry #------------------------------------------------------------------------------ @@ -566,8 +566,8 @@ Disassembly of section \.text: #------ abf3's .iplt entry #------------------------------------------------------------------------------ a18c: 0afffbd4 beq 90e4 - a190: e59f4000 ldr r4, \[pc, #0\] ; a198 - a194: e59f4000 ldr r4, \[pc, #0\] ; a19c + a190: e59f4000 ldr r4, \[pc\] ; a198 + a194: e59f4000 ldr r4, \[pc\] ; a19c #------------------------------------------------------------------------------ #------ GP-relative offset of abf3's .igot.plt entry #------------------------------------------------------------------------------ @@ -588,8 +588,8 @@ Disassembly of section \.text: #------ tbf3's .iplt entry #------------------------------------------------------------------------------ a1a8: 0afffbd5 beq 9104 - a1ac: e59f4000 ldr r4, \[pc, #0\] ; a1b4 - a1b0: e59f4000 ldr r4, \[pc, #0\] ; a1b8 + a1ac: e59f4000 ldr r4, \[pc\] ; a1b4 + a1b0: e59f4000 ldr r4, \[pc\] ; a1b8 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf3's .igot.plt entry #------------------------------------------------------------------------------ @@ -610,8 +610,8 @@ Disassembly of section \.text: #------ aaf4's .iplt entry #------------------------------------------------------------------------------ a1c4: 0afffbbe beq 90c4 - a1c8: e59f4000 ldr r4, \[pc, #0\] ; a1d0 - a1cc: e59f4000 ldr r4, \[pc, #0\] ; a1d4 + a1c8: e59f4000 ldr r4, \[pc\] ; a1d0 + a1cc: e59f4000 ldr r4, \[pc\] ; a1d4 #------------------------------------------------------------------------------ #------ .got offset for aaf4 #------------------------------------------------------------------------------ @@ -632,8 +632,8 @@ Disassembly of section \.text: #------ taf4's .iplt entry #------------------------------------------------------------------------------ a1e0: 0afffbe0 beq 9168 - a1e4: e59f4000 ldr r4, \[pc, #0\] ; a1ec - a1e8: e59f4000 ldr r4, \[pc, #0\] ; a1f0 + a1e4: e59f4000 ldr r4, \[pc\] ; a1ec + a1e8: e59f4000 ldr r4, \[pc\] ; a1f0 #------------------------------------------------------------------------------ #------ .got offset for taf4 #------------------------------------------------------------------------------ @@ -654,8 +654,8 @@ Disassembly of section \.text: #------ abf4's .iplt entry #------------------------------------------------------------------------------ a1fc: 0afffbc7 beq 9120 - a200: e59f4000 ldr r4, \[pc, #0\] ; a208 - a204: e59f4000 ldr r4, \[pc, #0\] ; a20c + a200: e59f4000 ldr r4, \[pc\] ; a208 + a204: e59f4000 ldr r4, \[pc\] ; a20c #------------------------------------------------------------------------------ #------ .got offset for abf4 #------------------------------------------------------------------------------ @@ -676,8 +676,8 @@ Disassembly of section \.text: #------ tbf4's .iplt entry #------------------------------------------------------------------------------ a218: 0afffbc4 beq 9130 - a21c: e59f4000 ldr r4, \[pc, #0\] ; a224 - a220: e59f4000 ldr r4, \[pc, #0\] ; a228 + a21c: e59f4000 ldr r4, \[pc\] ; a224 + a220: e59f4000 ldr r4, \[pc\] ; a228 #------------------------------------------------------------------------------ #------ .got offset for tbf4 #------------------------------------------------------------------------------ diff --git a/ld/testsuite/ld-arm/ifunc-5.dd b/ld/testsuite/ld-arm/ifunc-5.dd index 90d7b21..0fe8255 100644 --- a/ld/testsuite/ld-arm/ifunc-5.dd +++ b/ld/testsuite/ld-arm/ifunc-5.dd @@ -37,8 +37,8 @@ Disassembly of section \.text: 0000a00c <_start>: a00c: eb0017fb bl 10000 - a010: e59f4000 ldr r4, \[pc, #0\] ; a018 <_start\+0xc> - a014: e59f4000 ldr r4, \[pc, #0\] ; a01c <_start\+0x10> + a010: e59f4000 ldr r4, \[pc\] ; a018 <_start\+0xc> + a014: e59f4000 ldr r4, \[pc\] ; a01c <_start\+0x10> #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ @@ -51,8 +51,8 @@ Disassembly of section \.text: #------ f1's .iplt entry #------------------------------------------------------------------------------ a020: ebfffbf6 bl 9000 <__irel_end\+0xfe8> - a024: e59f4000 ldr r4, \[pc, #0\] ; a02c <_start\+0x20> - a028: e59f4000 ldr r4, \[pc, #0\] ; a030 <_start\+0x24> + a024: e59f4000 ldr r4, \[pc\] ; a02c <_start\+0x20> + a028: e59f4000 ldr r4, \[pc\] ; a030 <_start\+0x24> #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ @@ -65,8 +65,8 @@ Disassembly of section \.text: #------ f2's .iplt entry #------------------------------------------------------------------------------ a034: ebfffbf7 bl 9018 <__irel_end\+0x1000> - a038: e59f4000 ldr r4, \[pc, #0\] ; a040 <_start\+0x34> - a03c: e59f4000 ldr r4, \[pc, #0\] ; a044 <_start\+0x38> + a038: e59f4000 ldr r4, \[pc\] ; a040 <_start\+0x34> + a03c: e59f4000 ldr r4, \[pc\] ; a044 <_start\+0x38> #------------------------------------------------------------------------------ #------ GP-relative offset of f2's .igot.plt entry #------------------------------------------------------------------------------ @@ -79,8 +79,8 @@ Disassembly of section \.text: #------ f3's .iplt entry #------------------------------------------------------------------------------ a048: ebfffbef bl 900c <__irel_end\+0xff4> - a04c: e59f4000 ldr r4, \[pc, #0\] ; a054 <_start\+0x48> - a050: e59f4000 ldr r4, \[pc, #0\] ; a058 <_start\+0x4c> + a04c: e59f4000 ldr r4, \[pc\] ; a054 <_start\+0x48> + a050: e59f4000 ldr r4, \[pc\] ; a058 <_start\+0x4c> #------------------------------------------------------------------------------ #------ GP-relative offset of f3's .igot.plt entry #------------------------------------------------------------------------------ diff --git a/ld/testsuite/ld-arm/ifunc-6.dd b/ld/testsuite/ld-arm/ifunc-6.dd index 6715dce..c78c8d4 100644 --- a/ld/testsuite/ld-arm/ifunc-6.dd +++ b/ld/testsuite/ld-arm/ifunc-6.dd @@ -15,7 +15,7 @@ Disassembly of section \.iplt: #------------------------------------------------------------------------------ 9004: e28fc600 add ip, pc, #0 9008: e28cca08 add ip, ip, #32768 ; 0x8000 - 900c: e5bcf000 ldr pc, \[ip\]! + 900c: e5bcf000 ldr pc, \[ip, #0\]! #------------------------------------------------------------------------------ #------ f2's .iplt entry #------------------------------------------------------------------------------ @@ -60,8 +60,8 @@ Disassembly of section \.text: a010: eb0017fa bl 10000 a014: ea0017f9 b 10000 a018: 0a0017f8 beq 10000 - a01c: e59f4000 ldr r4, \[pc, #0\] ; a024 <_start\+0x14> - a020: e59f4000 ldr r4, \[pc, #0\] ; a028 <_start\+0x18> + a01c: e59f4000 ldr r4, \[pc\] ; a024 <_start\+0x14> + a020: e59f4000 ldr r4, \[pc\] ; a028 <_start\+0x18> #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ @@ -82,8 +82,8 @@ Disassembly of section \.text: #------ f1's .iplt entry #------------------------------------------------------------------------------ a034: 0afffbfc beq 902c <__irel_end\+0x100c> - a038: e59f4000 ldr r4, \[pc, #0\] ; a040 <_start\+0x30> - a03c: e59f4000 ldr r4, \[pc, #0\] ; a044 <_start\+0x34> + a038: e59f4000 ldr r4, \[pc\] ; a040 <_start\+0x30> + a03c: e59f4000 ldr r4, \[pc\] ; a044 <_start\+0x34> #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ @@ -104,8 +104,8 @@ Disassembly of section \.text: #------ f2's .iplt entry #------------------------------------------------------------------------------ a050: 0afffbee beq 9010 <__irel_end\+0xff0> - a054: e59f4000 ldr r4, \[pc, #0\] ; a05c <_start\+0x4c> - a058: e59f4000 ldr r4, \[pc, #0\] ; a060 <_start\+0x50> + a054: e59f4000 ldr r4, \[pc\] ; a05c <_start\+0x4c> + a058: e59f4000 ldr r4, \[pc\] ; a060 <_start\+0x50> #------------------------------------------------------------------------------ #------ GP-relative offset of f2's .igot.plt entry #------------------------------------------------------------------------------ diff --git a/ld/testsuite/ld-arm/ifunc-7.dd b/ld/testsuite/ld-arm/ifunc-7.dd index c64e748..5db88fb 100644 --- a/ld/testsuite/ld-arm/ifunc-7.dd +++ b/ld/testsuite/ld-arm/ifunc-7.dd @@ -52,8 +52,8 @@ Disassembly of section \.text: 0000a008 : a008: eb0017fc bl 10000 - a00c: e59f4000 ldr r4, \[pc, #0\] ; a014 - a010: e59f4000 ldr r4, \[pc, #0\] ; a018 + a00c: e59f4000 ldr r4, \[pc\] ; a014 + a010: e59f4000 ldr r4, \[pc\] ; a018 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ @@ -66,8 +66,8 @@ Disassembly of section \.text: #------ f1's .iplt entry #------------------------------------------------------------------------------ a01c: ebfffc02 bl 902c - a020: e59f4000 ldr r4, \[pc, #0\] ; a028 - a024: e59f4000 ldr r4, \[pc, #0\] ; a02c + a020: e59f4000 ldr r4, \[pc\] ; a028 + a024: e59f4000 ldr r4, \[pc\] ; a02c #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ @@ -80,8 +80,8 @@ Disassembly of section \.text: #------ f2's .plt entry #------------------------------------------------------------------------------ a030: ebfffbf7 bl 9014 - a034: e59f4000 ldr r4, \[pc, #0\] ; a03c - a038: e59f4000 ldr r4, \[pc, #0\] ; a040 + a034: e59f4000 ldr r4, \[pc\] ; a03c + a038: e59f4000 ldr r4, \[pc\] ; a040 #------------------------------------------------------------------------------ #------ .got offset for f2 #------------------------------------------------------------------------------ @@ -94,8 +94,8 @@ Disassembly of section \.text: #------ f3's .iplt entry #------------------------------------------------------------------------------ a044: ebfffbfb bl 9038 - a048: e59f4000 ldr r4, \[pc, #0\] ; a050 - a04c: e59f4000 ldr r4, \[pc, #0\] ; a054 + a048: e59f4000 ldr r4, \[pc\] ; a050 + a04c: e59f4000 ldr r4, \[pc\] ; a054 #------------------------------------------------------------------------------ #------ GP-relative offset of f3's .igot.plt entry #------------------------------------------------------------------------------ @@ -108,8 +108,8 @@ Disassembly of section \.text: #------ f4's .plt entry #------------------------------------------------------------------------------ a058: ebfffbf0 bl 9020 - a05c: e59f4000 ldr r4, \[pc, #0\] ; a064 - a060: e59f4000 ldr r4, \[pc, #0\] ; a068 + a05c: e59f4000 ldr r4, \[pc\] ; a064 + a060: e59f4000 ldr r4, \[pc\] ; a068 #------------------------------------------------------------------------------ #------ .got offset for f4 #------------------------------------------------------------------------------ diff --git a/ld/testsuite/ld-arm/ifunc-8.dd b/ld/testsuite/ld-arm/ifunc-8.dd index 67978bb..f14ab34 100644 --- a/ld/testsuite/ld-arm/ifunc-8.dd +++ b/ld/testsuite/ld-arm/ifunc-8.dd @@ -286,8 +286,8 @@ Disassembly of section \.text: a028: eb0017f4 bl 10000 a02c: ea0017f3 b 10000 a030: 0a0017f2 beq 10000 - a034: e59f4000 ldr r4, \[pc, #0\] ; a03c - a038: e59f4000 ldr r4, \[pc, #0\] ; a040 + a034: e59f4000 ldr r4, \[pc\] ; a03c + a038: e59f4000 ldr r4, \[pc\] ; a040 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ @@ -308,8 +308,8 @@ Disassembly of section \.text: #------ aaf1's .iplt entry #------------------------------------------------------------------------------ a04c: 0afffc1c beq 90c4 - a050: e59f4000 ldr r4, \[pc, #0\] ; a058 - a054: e59f4000 ldr r4, \[pc, #0\] ; a05c + a050: e59f4000 ldr r4, \[pc\] ; a058 + a054: e59f4000 ldr r4, \[pc\] ; a05c #------------------------------------------------------------------------------ #------ GP-relative offset of aaf1's .igot.plt entry #------------------------------------------------------------------------------ @@ -330,8 +330,8 @@ Disassembly of section \.text: #------ taf1's .iplt entry #------------------------------------------------------------------------------ a068: 0afffc20 beq 90f0 - a06c: e59f4000 ldr r4, \[pc, #0\] ; a074 - a070: e59f4000 ldr r4, \[pc, #0\] ; a078 + a06c: e59f4000 ldr r4, \[pc\] ; a074 + a070: e59f4000 ldr r4, \[pc\] ; a078 #------------------------------------------------------------------------------ #------ GP-relative offset of taf1's .igot.plt entry #------------------------------------------------------------------------------ @@ -352,8 +352,8 @@ Disassembly of section \.text: #------ abf1's .iplt entry #------------------------------------------------------------------------------ a084: 0afffc16 beq 90e4 - a088: e59f4000 ldr r4, \[pc, #0\] ; a090 - a08c: e59f4000 ldr r4, \[pc, #0\] ; a094 + a088: e59f4000 ldr r4, \[pc\] ; a090 + a08c: e59f4000 ldr r4, \[pc\] ; a094 #------------------------------------------------------------------------------ #------ GP-relative offset of abf1's .igot.plt entry #------------------------------------------------------------------------------ @@ -374,8 +374,8 @@ Disassembly of section \.text: #------ tbf1's .iplt entry #------------------------------------------------------------------------------ a0a0: 0afffc1a beq 9110 - a0a4: e59f4000 ldr r4, \[pc, #0\] ; a0ac - a0a8: e59f4000 ldr r4, \[pc, #0\] ; a0b0 + a0a4: e59f4000 ldr r4, \[pc\] ; a0ac + a0a8: e59f4000 ldr r4, \[pc\] ; a0b0 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf1's .igot.plt entry #------------------------------------------------------------------------------ @@ -396,8 +396,8 @@ Disassembly of section \.text: #------ aaf2's .plt entry #------------------------------------------------------------------------------ a0bc: 0afffbe6 beq 905c - a0c0: e59f4000 ldr r4, \[pc, #0\] ; a0c8 - a0c4: e59f4000 ldr r4, \[pc, #0\] ; a0cc + a0c0: e59f4000 ldr r4, \[pc\] ; a0c8 + a0c4: e59f4000 ldr r4, \[pc\] ; a0cc #------------------------------------------------------------------------------ #------ .got offset for aaf2 #------------------------------------------------------------------------------ @@ -418,8 +418,8 @@ Disassembly of section \.text: #------ taf2's .plt entry #------------------------------------------------------------------------------ a0d8: 0afffbdc beq 9050 - a0dc: e59f4000 ldr r4, \[pc, #0\] ; a0e4 - a0e0: e59f4000 ldr r4, \[pc, #0\] ; a0e8 + a0dc: e59f4000 ldr r4, \[pc\] ; a0e4 + a0e0: e59f4000 ldr r4, \[pc\] ; a0e8 #------------------------------------------------------------------------------ #------ .got offset for taf2 #------------------------------------------------------------------------------ @@ -440,8 +440,8 @@ Disassembly of section \.text: #------ abf2's .plt entry #------------------------------------------------------------------------------ a0f4: 0afffbef beq 90b8 - a0f8: e59f4000 ldr r4, \[pc, #0\] ; a100 - a0fc: e59f4000 ldr r4, \[pc, #0\] ; a104 + a0f8: e59f4000 ldr r4, \[pc\] ; a100 + a0fc: e59f4000 ldr r4, \[pc\] ; a104 #------------------------------------------------------------------------------ #------ .got offset for abf2 #------------------------------------------------------------------------------ @@ -462,8 +462,8 @@ Disassembly of section \.text: #------ tbf2's .plt entry #------------------------------------------------------------------------------ a110: 0afffbcb beq 9044 - a114: e59f4000 ldr r4, \[pc, #0\] ; a11c - a118: e59f4000 ldr r4, \[pc, #0\] ; a120 + a114: e59f4000 ldr r4, \[pc\] ; a11c + a118: e59f4000 ldr r4, \[pc\] ; a120 #------------------------------------------------------------------------------ #------ .got offset for tbf2 #------------------------------------------------------------------------------ @@ -484,8 +484,8 @@ Disassembly of section \.text: #------ aaf3's .iplt entry #------------------------------------------------------------------------------ a12c: 0afffc0d beq 9168 - a130: e59f4000 ldr r4, \[pc, #0\] ; a138 - a134: e59f4000 ldr r4, \[pc, #0\] ; a13c + a130: e59f4000 ldr r4, \[pc\] ; a138 + a134: e59f4000 ldr r4, \[pc\] ; a13c #------------------------------------------------------------------------------ #------ GP-relative offset of aaf3's .igot.plt entry #------------------------------------------------------------------------------ @@ -506,8 +506,8 @@ Disassembly of section \.text: #------ taf3's .iplt entry #------------------------------------------------------------------------------ a148: 0afffc03 beq 915c - a14c: e59f4000 ldr r4, \[pc, #0\] ; a154 - a150: e59f4000 ldr r4, \[pc, #0\] ; a158 + a14c: e59f4000 ldr r4, \[pc\] ; a154 + a150: e59f4000 ldr r4, \[pc\] ; a158 #------------------------------------------------------------------------------ #------ GP-relative offset of taf3's .igot.plt entry #------------------------------------------------------------------------------ @@ -528,8 +528,8 @@ Disassembly of section \.text: #------ abf3's .iplt entry #------------------------------------------------------------------------------ a164: 0afffbf1 beq 9130 - a168: e59f4000 ldr r4, \[pc, #0\] ; a170 - a16c: e59f4000 ldr r4, \[pc, #0\] ; a174 + a168: e59f4000 ldr r4, \[pc\] ; a170 + a16c: e59f4000 ldr r4, \[pc\] ; a174 #------------------------------------------------------------------------------ #------ GP-relative offset of abf3's .igot.plt entry #------------------------------------------------------------------------------ @@ -550,8 +550,8 @@ Disassembly of section \.text: #------ tbf3's .iplt entry #------------------------------------------------------------------------------ a180: 0afffbf2 beq 9150 - a184: e59f4000 ldr r4, \[pc, #0\] ; a18c - a188: e59f4000 ldr r4, \[pc, #0\] ; a190 + a184: e59f4000 ldr r4, \[pc\] ; a18c + a188: e59f4000 ldr r4, \[pc\] ; a190 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf3's .igot.plt entry #------------------------------------------------------------------------------ @@ -572,8 +572,8 @@ Disassembly of section \.text: #------ aaf4's .plt entry #------------------------------------------------------------------------------ a19c: 0afffba0 beq 9024 - a1a0: e59f4000 ldr r4, \[pc, #0\] ; a1a8 - a1a4: e59f4000 ldr r4, \[pc, #0\] ; a1ac + a1a0: e59f4000 ldr r4, \[pc\] ; a1a8 + a1a4: e59f4000 ldr r4, \[pc\] ; a1ac #------------------------------------------------------------------------------ #------ .got offset for aaf4 #------------------------------------------------------------------------------ @@ -594,8 +594,8 @@ Disassembly of section \.text: #------ taf4's .plt entry #------------------------------------------------------------------------------ a1b8: 0afffbba beq 90a8 - a1bc: e59f4000 ldr r4, \[pc, #0\] ; a1c4 - a1c0: e59f4000 ldr r4, \[pc, #0\] ; a1c8 + a1bc: e59f4000 ldr r4, \[pc\] ; a1c4 + a1c0: e59f4000 ldr r4, \[pc\] ; a1c8 #------------------------------------------------------------------------------ #------ .got offset for taf4 #------------------------------------------------------------------------------ @@ -616,8 +616,8 @@ Disassembly of section \.text: #------ abf4's .plt entry #------------------------------------------------------------------------------ a1d4: 0afffba4 beq 906c - a1d8: e59f4000 ldr r4, \[pc, #0\] ; a1e0 - a1dc: e59f4000 ldr r4, \[pc, #0\] ; a1e4 + a1d8: e59f4000 ldr r4, \[pc\] ; a1e0 + a1dc: e59f4000 ldr r4, \[pc\] ; a1e4 #------------------------------------------------------------------------------ #------ .got offset for abf4 #------------------------------------------------------------------------------ @@ -638,8 +638,8 @@ Disassembly of section \.text: #------ tbf4's .plt entry #------------------------------------------------------------------------------ a1f0: 0afffba1 beq 907c - a1f4: e59f4000 ldr r4, \[pc, #0\] ; a1fc - a1f8: e59f4000 ldr r4, \[pc, #0\] ; a200 + a1f4: e59f4000 ldr r4, \[pc\] ; a1fc + a1f8: e59f4000 ldr r4, \[pc\] ; a200 #------------------------------------------------------------------------------ #------ .got offset for tbf4 #------------------------------------------------------------------------------ diff --git a/ld/testsuite/ld-arm/jump-reloc-veneers-long.d b/ld/testsuite/ld-arm/jump-reloc-veneers-long.d index 0dba9ec..c69e688 100644 --- a/ld/testsuite/ld-arm/jump-reloc-veneers-long.d +++ b/ld/testsuite/ld-arm/jump-reloc-veneers-long.d @@ -16,6 +16,6 @@ Disassembly of section .text: 000080.. <[^>]*>: 80..: 4778 bx pc 80..: 46c0 nop ; \(mov r8, r8\) - 80..: e59fc000 ldr ip, \[pc, #0\] ; 80.. <__dest_veneer\+0xc> + 80..: e59fc000 ldr ip, \[pc\] ; 80.. <__dest_veneer\+0xc> 80..: e12fff1c bx ip 80..: 09000001 .word 0x09000001 diff --git a/ld/testsuite/ld-arm/jump-reloc-veneers.s b/ld/testsuite/ld-arm/jump-reloc-veneers.s index d307c08..c646e71 100644 --- a/ld/testsuite/ld-arm/jump-reloc-veneers.s +++ b/ld/testsuite/ld-arm/jump-reloc-veneers.s @@ -9,4 +9,4 @@ _start: .section destsect, "x" .thumb_func dest: - b dest + b.n dest diff --git a/ld/testsuite/ld-arm/rodata-merge-map.ld b/ld/testsuite/ld-arm/rodata-merge-map.ld new file mode 100644 index 0000000..0790bcb --- /dev/null +++ b/ld/testsuite/ld-arm/rodata-merge-map.ld @@ -0,0 +1,9 @@ +/* Script for ld testsuite */ +OUTPUT_ARCH(arm) +SECTIONS +{ + .rodata : + { + *(.rodata*) + } +} diff --git a/ld/testsuite/ld-arm/rodata-merge-map.sym b/ld/testsuite/ld-arm/rodata-merge-map.sym new file mode 100644 index 0000000..b1070a3 --- /dev/null +++ b/ld/testsuite/ld-arm/rodata-merge-map.sym @@ -0,0 +1,8 @@ + +Symbol table '.symtab' contains 5 entries: + Num: Value Size Type Bind Vis Ndx Name + 0: 00000000 0 NOTYPE LOCAL DEFAULT UND + 1: 00000000 0 SECTION LOCAL DEFAULT 1 + 2: 00000000 0 SECTION LOCAL DEFAULT 2 + 3: 00000000 0 NOTYPE LOCAL DEFAULT 1 \$d + 4: 0000000c 0 NOTYPE LOCAL DEFAULT 1 \$d diff --git a/ld/testsuite/ld-arm/rodata-merge-map1.s b/ld/testsuite/ld-arm/rodata-merge-map1.s new file mode 100644 index 0000000..df57c4b --- /dev/null +++ b/ld/testsuite/ld-arm/rodata-merge-map1.s @@ -0,0 +1,8 @@ +@ Test to ensure that no nameless mapping symbol is inserted +@ within a merged section. +@ This file contains the 1st contribution, which is expected to +@ generate a $d symbol at its beginning. + + .section .rodata.str1.1,"aMS",%progbits,1 +.LC0: + .string "Hello world" diff --git a/ld/testsuite/ld-arm/rodata-merge-map2.s b/ld/testsuite/ld-arm/rodata-merge-map2.s new file mode 100644 index 0000000..7136774 --- /dev/null +++ b/ld/testsuite/ld-arm/rodata-merge-map2.s @@ -0,0 +1,9 @@ +@ This file contains the 2nd contribution, which is expected to +@ be fully merged into the 1st contribution (from +@ rodata-merge-map1.s), and generate no mapping symbol (which +@ would otherwise be converted in a symbol table entry with no +@ name). + + .section .rodata.str1.1,"aMS",%progbits,1 +.LC0: + .string "world" diff --git a/ld/testsuite/ld-arm/rodata-merge-map3.s b/ld/testsuite/ld-arm/rodata-merge-map3.s new file mode 100644 index 0000000..45aaef0 --- /dev/null +++ b/ld/testsuite/ld-arm/rodata-merge-map3.s @@ -0,0 +1,9 @@ +@ This file contains the 3rd contribution, which is expected to +@ be partially merged into the 1st contribution (from +@ rodata-merge-map1.s), and generate a (redundant, but harmless) +@ $d mapping symbol. + + .section .rodata.str1.1,"aMS",%progbits,1 +.LC0: + .string "foo" + .string "world" diff --git a/ld/testsuite/ld-arm/tls-longplt-lib.d b/ld/testsuite/ld-arm/tls-longplt-lib.d index 9032c61..2c81fbe 100644 --- a/ld/testsuite/ld-arm/tls-longplt-lib.d +++ b/ld/testsuite/ld-arm/tls-longplt-lib.d @@ -53,7 +53,7 @@ Disassembly of section .foo: 400102c: 00000000 .word 0x00000000 04001030 <__unnamed_veneer>: - 4001030: e59f1000 ldr r1, \[pc, #0\] ; .* + 4001030: e59f1000 ldr r1, \[pc\] ; .* 4001034: e08ff001 add pc, pc, r1 4001038: fc007170 .word 0xfc007170 400103c: 00000000 .word 0x00000000 diff --git a/ld/testsuite/ld-arm/tls-longplt.d b/ld/testsuite/ld-arm/tls-longplt.d index 8729e74..175c561 100644 --- a/ld/testsuite/ld-arm/tls-longplt.d +++ b/ld/testsuite/ld-arm/tls-longplt.d @@ -47,7 +47,7 @@ Disassembly of section .foo: 4001018: e1a00000 nop ; .* 400101c: fc00f2a0 .word 0xfc00f2a0 4001020: 4801 ldr r0, \[pc, #4\] ; .* - 4001022: f000 e80a blx 4001038 .* + 4001022: f000 f809 bl 4001038 .* 4001026: 46c0 nop ; .* 4001028: fc00f291 .word 0xfc00f291 400102c: 00000000 .word 0x00000000 diff --git a/ld/testsuite/ld-arm/tls-thumb1.d b/ld/testsuite/ld-arm/tls-thumb1.d index 26b65bb..808baa8 100644 --- a/ld/testsuite/ld-arm/tls-thumb1.d +++ b/ld/testsuite/ld-arm/tls-thumb1.d @@ -31,7 +31,7 @@ Disassembly of section .text: 81b0: e1a00000 nop ; .* 81b4: 000080c0 .word 0x000080c0 81b8: 4801 ldr r0, \[pc, #4\] ; .* - 81ba: f000 e806 blx 81c8 .* + 81ba: f000 f805 bl 81c8 .* 81be: 46c0 nop ; .* 81c0: 000080b1 .word 0x000080b1 81c4: 00000000 .word 0x00000000 @@ -39,7 +39,7 @@ Disassembly of section .text: 000081c8 <__unnamed_veneer>: 81c8: 4778 bx pc 81ca: 46c0 nop ; .* - 81cc: e59f1000 ldr r1, \[pc, #0\] ; .* + 81cc: e59f1000 ldr r1, \[pc\] ; .* 81d0: e081f00f add pc, r1, pc 81d4: ffffffa0 .word 0xffffffa0 @@ -55,20 +55,20 @@ Disassembly of section .foo: 4001018: e1a00000 nop ; .* 400101c: fc00f260 .word 0xfc00f260 4001020: 4801 ldr r0, \[pc, #4\] ; .* - 4001022: f000 e80c blx 400103c .* + 4001022: f000 f80b bl 400103c .* 4001026: 46c0 nop ; .* 4001028: fc00f249 .word 0xfc00f249 400102c: 00000000 .word 0x00000000 04001030 <__unnamed_veneer>: - 4001030: e59f1000 ldr r1, \[pc, #0\] ; .* + 4001030: e59f1000 ldr r1, \[pc\] ; .* 4001034: e08ff001 add pc, pc, r1 4001038: fc00713c .word 0xfc00713c 0400103c <__unnamed_veneer>: 400103c: 4778 bx pc 400103e: 46c0 nop ; .* - 4001040: e59f1000 ldr r1, \[pc, #0\] ; .* + 4001040: e59f1000 ldr r1, \[pc\] ; .* 4001044: e081f00f add pc, r1, pc 4001048: fc00712c .word 0xfc00712c 400104c: 00000000 .word 0x00000000 diff --git a/ld/testsuite/ld-cris/pic-gc-72.d b/ld/testsuite/ld-cris/pic-gc-72.d index 7c30980c..7e72752 100644 --- a/ld/testsuite/ld-cris/pic-gc-72.d +++ b/ld/testsuite/ld-cris/pic-gc-72.d @@ -19,10 +19,11 @@ Contents of section .dynsym: Contents of section .dynstr: #... Contents of section .text: - 0188 0f050f05 .* + 016e 0f050f05 .* Contents of section .dynamic: + 2174 .* #... Contents of section .got: - 21e4 8c210000 00000000 00000000 .* + 21cc 74210000 00000000 00000000 .* Contents of section .data: - 21f0 00000000 .* + 21d8 00000000 .* diff --git a/ld/testsuite/ld-cris/tls-e-tpoffcomm1.d b/ld/testsuite/ld-cris/tls-e-tpoffcomm1.d index 69780cf..23d52ee 100644 --- a/ld/testsuite/ld-cris/tls-e-tpoffcomm1.d +++ b/ld/testsuite/ld-cris/tls-e-tpoffcomm1.d @@ -11,35 +11,33 @@ Program Header: LOAD off 0x0+ vaddr 0x0+80000 paddr 0x0+80000 align 2\*\*13 - filesz 0x0+a4 memsz 0x0+a4 flags r-x - LOAD off 0x0+a4 vaddr 0x0+820a4 paddr 0x0+820a4 align 2\*\*13 - filesz 0x0+ memsz 0x0+ flags rw- - TLS off 0x0+a4 vaddr 0x0+820a4 paddr 0x0+820a4 align 2\*\*2 + filesz 0x0+84 memsz 0x0+84 flags r-x + TLS off 0x0+84 vaddr 0x0+82084 paddr 0x0+82084 align 2\*\*2 filesz 0x0+ memsz 0x0+8 flags r-- private flags = 0: Sections: Idx Name Size VMA LMA File off Algn - 0 .text 0+10 0+80094 0+80094 0+94 2\*\*1 + 0 .text 0+10 0+80074 0+80074 0+74 2\*\*1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 1 .tbss 0+8 0+820a4 0+820a4 0+a4 2\*\*2 + 1 .tbss 0+8 0+82084 0+82084 0+84 2\*\*2 ALLOC, THREAD_LOCAL SYMBOL TABLE: -0+80094 l d .text 0+ .text -0+820a4 l d .tbss 0+ .tbss -0+80098 l F .text 0+c do_test -0+80094 g .text 0+ _start -0+820a4 g \*ABS\* 0+ __bss_start +0+80074 l d .text 0+ .text +0+82084 l d .tbss 0+ .tbss +0+80078 l F .text 0+c do_test +0+80074 g .text 0+ _start +0+82084 g \*ABS\* 0+ __bss_start 0+ g .tbss 0+4 foo -0+820a4 g \*ABS\* 0+ _edata -0+820c0 g \*ABS\* 0+ _end +0+82084 g \*ABS\* 0+ _edata +0+820a0 g \*ABS\* 0+ _end 0+4 g .tbss 0+4 bar #... Disassembly of section .text: -00080094 <_start>: - 80094: 41b2 moveq 1,\$r11 +00080074 <_start>: + 80074: 41b2 moveq 1,\$r11 #... -00080098 : - 80098: 2f0e f8ff ffff add.d 0xfffffff8,\$r0 - 8009e: 2f1e fcff ffff add.d 0xfffffffc,\$r1 +00080078 : + 80078: 2f0e f8ff ffff add.d 0xfffffff8,\$r0 + 8007e: 2f1e fcff ffff add.d 0xfffffffc,\$r1 diff --git a/ld/testsuite/ld-elf/binutils.exp b/ld/testsuite/ld-elf/binutils.exp index 6f881f3..382d50f 100644 --- a/ld/testsuite/ld-elf/binutils.exp +++ b/ld/testsuite/ld-elf/binutils.exp @@ -53,7 +53,8 @@ proc binutils_test { prog_name ld_options test } { if { ![ld_simple_link $ld tmpdir/$test "$ld_options tmpdir/$test.o"] } { if { [string match "*not supported*" $link_output] - || [string match "*unrecognized option*" $link_output] } { + || [string match "*unrecognized option*" $link_output] + || [string match "*-z relro ignored*" $link_output] } { unsupported "$ld_options is not supported by this target" } else { unresolved "$test_name" @@ -121,35 +122,22 @@ if { ([istarget "i?86-*-elf*"] binutils_test strip "-T ${srcdir}/${subdir}/lma.lnk" lma +set tls_tests { "tdata1" "tdata2" } # hppa64 has its own .tbss section, with different flags. if { ![istarget "hppa64-*-*"] } { - binutils_test objcopy "" tbss1 - binutils_test objcopy "-z relro" tbss1 - binutils_test objcopy "-shared" tbss1 - binutils_test objcopy "-shared -z relro" tbss1 - binutils_test objcopy "-z max-page-size=0x100000" tbss1 - binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tbss1 + lappend tls_tests "tdata3" "tbss1" "tbss2" "tbss3" } - -binutils_test objcopy "" tdata1 -binutils_test objcopy "-z relro" tdata1 -binutils_test objcopy "-shared" tdata1 -binutils_test objcopy "-shared -z relro" tdata1 -binutils_test objcopy "-z max-page-size=0x100000" tdata1 -binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tdata1 - -if { ![istarget "hppa64-*-*"] } { - binutils_test objcopy "" tbss2 - binutils_test objcopy "-z relro" tbss2 - binutils_test objcopy "-shared" tbss2 - binutils_test objcopy "-shared -z relro" tbss2 - binutils_test objcopy "-z max-page-size=0x100000" tbss2 - binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tbss2 +set tls_opts { + "" + "-z relro" + "-shared" + "-shared -z relro" + "-z max-page-size=0x100000" + "-z max-page-size=0x100000 -z common-page-size=0x1000" } -binutils_test objcopy "" tdata2 -binutils_test objcopy "-z relro" tdata2 -binutils_test objcopy "-shared" tdata2 -binutils_test objcopy "-shared -z relro" tdata2 -binutils_test objcopy "-z max-page-size=0x100000" tdata2 -binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tdata2 +foreach testitem $tls_tests { + foreach testopt $tls_opts { + binutils_test objcopy $testopt $testitem + } +} diff --git a/ld/testsuite/ld-elf/eh5.d b/ld/testsuite/ld-elf/eh5.d index bc25639..f862382 100644 --- a/ld/testsuite/ld-elf/eh5.d +++ b/ld/testsuite/ld-elf/eh5.d @@ -4,7 +4,7 @@ #ld: #readelf: -wf #target: cfi -#notarget: alpha* hppa64* +#notarget: alpha* hppa64* tile* Contents of the .eh_frame section: diff --git a/ld/testsuite/ld-elf/elf.exp b/ld/testsuite/ld-elf/elf.exp index 73a417c..866c866 100644 --- a/ld/testsuite/ld-elf/elf.exp +++ b/ld/testsuite/ld-elf/elf.exp @@ -1,5 +1,6 @@ # Expect script for various ELF tests. -# Copyright 2002, 2003, 2005, 2007, 2009, 2010 Free Software Foundation, Inc. +# Copyright 2002, 2003, 2005, 2007, 2009, 2010, 2011 +# Free Software Foundation, Inc. # # This file is part of the GNU Binutils. # @@ -40,6 +41,67 @@ if { [is_remote host] } then { remote_download host merge.ld } +if { ![istarget hppa64*-hpux*] } { + run_ld_link_tests { + {"Build symbol3.a" + "" "" + {symbol3.s} {} "symbol3.a"} + {"Build symbol3w.a" + "" "" + {symbol3w.s} {} "symbol3w.a"} + } +} + +# Run a test to check linking a shared library with a broken linker +# script that accidentally marks dynamic sections as notes. The +# resulting executable is not expected to work, but the linker +# should not seg-fault whilst creating the binary. +# +# Only run the test on targets thats support creating shared libraries. +if { ! [istarget arc-*-*] + && ! [istarget avr-*-*] + && ! [istarget cr16-*-*] + && ! [istarget cris*-*-*] + && ! [istarget crx-*-*] + && ! [istarget d10v-*-*] + && ! [istarget d30v-*-*] + && ! [istarget dlx-*-*] + && ! [istarget fr30-*-*] + && ! [istarget frv-*-*] + && ! [istarget h8300-*-*] + && ! [istarget i860-*-*] + && ! [istarget i960-*-*] + && ! [istarget ip2k-*-*] + && ! [istarget iq2000-*-*] + && ! [istarget lm32-*-*] + && ! [istarget m32c-*-*] + && ! [istarget m32r-*-*] + && ! [istarget mcore*-*-*] + && ! [istarget mep-*-*] + && ! [istarget microblaze-*-*] + && ! [istarget mn10200-*-*] + && ! [istarget moxie-*-*] + && ! [istarget ms1-*-*] + && ! [istarget msp430-*-*] + && ! [istarget openrisc-*-*] + && ! [istarget or32-*-*] + && ! [istarget pj-*-*] + && ! [istarget rx-*-*] + && ! [istarget spu-*-*] + && ! [istarget v850*-*-*] + && ! [istarget xstormy16-*-*] + && ! [istarget *-*-irix*] + && ! [istarget *-*-rtems] } { + run_ld_link_tests { + {"Build shared library for next test" + "-shared" "" "note-3.s" {} "note-3.so" } + {"Link using broken linker script" + "--script note-3.t tmpdir/note-3.so" "" "" + { { ld "note-3.l" } } + "a.out" } + } +} + set test_list [lsort [glob -nocomplain $srcdir/$subdir/*.d]] foreach t $test_list { # We need to strip the ".d", but can leave the dirname. @@ -76,22 +138,39 @@ if ![isnative] { return } +run_cc_link_tests { + {"PR ld/13195" "-Wl,--gc-sections" "" + {pr13195.c} {} "pr13195"} +} + set array_tests { {"preinit array" "" "" {preinit.c} "preinit" "preinit.out"} {"init array" "" "" {init.c} "init" "init.out"} {"fini array" "" "" {fini.c} "fini" "fini.out"} {"init array mixed" "" "" {init-mixed.c} "init-mixed" "init-mixed.out" "-I."} } +set array_tests_pie { + {"PIE preinit array" "-pie" "" {preinit.c} "preinit" "preinit.out" "-fPIE" } + {"PIE init array" "-pie" "" {init.c} "init" "init.out" "-fPIE"} + {"PIE fini array" "-pie" "" {fini.c} "fini" "fini.out" "-fPIE"} + {"PIE init array mixed" "-pie" "" {init-mixed.c} "init-mixed" "init-mixed.out" "-I. -fPIE"} +} set array_tests_static { {"static preinit array" "-static" "" {preinit.c} "preinit" "preinit.out"} {"static init array" "-static" "" {init.c} "init" "init.out"} {"static fini array" "-static" "" {fini.c} "fini" "fini.out"} - {"static init array mixed" "" "" {init-mixed.c} "init-mixed" "init-mixed.out" "-I."} + {"static init array mixed" "-static" "" {init-mixed.c} "init-mixed" "init-mixed.out" "-I."} } # NetBSD ELF systems do not currently support the .*_array sections. set xfails [list "*-*-netbsdelf*"] run_ld_link_exec_tests $xfails $array_tests + +if { [istarget *-*-linux*] + || [istarget *-*-gnu*] } { + run_ld_link_exec_tests $xfails $array_tests_pie +} + # Be cautious to not XFAIL for *-*-linux-gnu*, *-*-kfreebsd-gnu*, etc. switch -regexp $target_triplet { ^\[^-\]*-\[^-\]*-gnu.*$ { diff --git a/ld/testsuite/ld-elf/exclude.exp b/ld/testsuite/ld-elf/exclude.exp index 124549f..28a34ab 100644 --- a/ld/testsuite/ld-elf/exclude.exp +++ b/ld/testsuite/ld-elf/exclude.exp @@ -31,6 +31,14 @@ if { [istarget "mcore-*-*"] } { return } +set as_opt "" + +# This target requires extra as options when building code for shared +# libraries. +if { [istarget "tic6x-*-*"] } { + set as_opt "-mpic -mpid=near" +} + global ar global as global ld @@ -47,8 +55,8 @@ set test7 "ld exclude symbols from archive - --exclude-libs foo:libexclude.a" set test8 "ld exclude symbols from archive - --exclude-libs foo,libexclude.a" set test9 "ld don't exclude symbols from archive - --exclude-libs foo:bar" -if { ![ld_assemble $as $srcdir/$subdir/exclude1.s tmpdir/exclude1.o ] - || ![ld_assemble $as $srcdir/$subdir/exclude2.s tmpdir/exclude2.o] } { +if { ![ld_assemble_flags $as $as_opt $srcdir/$subdir/exclude1.s tmpdir/exclude1.o ] + || ![ld_assemble_flags $as $as_opt $srcdir/$subdir/exclude2.s tmpdir/exclude2.o] } { unresolved $test1 return } diff --git a/ld/testsuite/ld-elf/flags1.d b/ld/testsuite/ld-elf/flags1.d index 2053de0..e6bb001 100644 --- a/ld/testsuite/ld-elf/flags1.d +++ b/ld/testsuite/ld-elf/flags1.d @@ -3,10 +3,10 @@ #objcopy_linked_file: --set-section-flags .post_text_reserve=contents,alloc,load,readonly,code #readelf: -l --wide #xfail: "avr-*-*" "dlx-*-*" "h8300-*-*" "i960-*-*" "ip2k-*-*" "m32r-*-*" -#xfail: "moxie-*-*" "mt-*-*" "msp430-*-*" "tic6x-*-*" +#xfail: "moxie-*-*" "mt-*-*" "msp430-*-*" #xfail: "*-*-hpux*" "hppa*64*-*-*" -# Fails on the AVR, DLX, H8300, I960, IP2K, M32R, MOXIE, MT, MSP430 and -# TI C6X because the two sections are not merged into one segment. +# Fails on the AVR, DLX, H8300, I960, IP2K, M32R, MOXIE, MT, and MSP430 +# because the two sections are not merged into one segment. # (There is no good reason why they have to be). # Fails on HPUX systems because the .type pseudo-op behaves differently. # Fails on hppa64 because a PHDR is always added. diff --git a/ld/testsuite/ld-elf/frame.exp b/ld/testsuite/ld-elf/frame.exp index 0a69024..66e6ac5 100644 --- a/ld/testsuite/ld-elf/frame.exp +++ b/ld/testsuite/ld-elf/frame.exp @@ -44,14 +44,22 @@ if { [istarget "hppa64-*-*"] || [istarget "v850-*-*"] } { return } +set as_opt "" + +# This target requires extra as options when building code for shared +# libraries. +if { [istarget "tic6x-*-*"] } { + set as_opt "-mpic -mpid=near" +} + set test1 "read-only .eh_frame section" set test2 "read-only .gcc_except_table section" global as global ld -if { ![ld_assemble $as $srcdir/$subdir/tbss.s tmpdir/tbss.o ] - || ![ld_assemble $as $srcdir/$subdir/frame.s tmpdir/frame.o] } { +if { ![ld_assemble_flags $as $as_opt $srcdir/$subdir/tbss.s tmpdir/tbss.o ] + || ![ld_assemble_flags $as $as_opt $srcdir/$subdir/frame.s tmpdir/frame.o] } { unresolved "$test1" return } @@ -66,7 +74,7 @@ if { [ld_simple_link $ld tmpdir/frame.so "--shared tmpdir/frame.o tmpdir/tbss.o" } } -if ![ld_assemble $as $srcdir/$subdir/table.s tmpdir/table.o ] { +if ![ld_assemble_flags $as $as_opt $srcdir/$subdir/table.s tmpdir/table.o ] { unresolved "$test2" return } diff --git a/ld/testsuite/ld-elf/init-mixed.c b/ld/testsuite/ld-elf/init-mixed.c index 1d0c727..770a4b5 100644 --- a/ld/testsuite/ld-elf/init-mixed.c +++ b/ld/testsuite/ld-elf/init-mixed.c @@ -27,25 +27,39 @@ void (*const fini_array1005[]) () = { fini1005 }; static void -ctor1007 () +ctor1007a () { if (count != 1005) abort (); + count = 1006; +} +static void +ctor1007b () +{ + if (count != 1006) + abort (); count = 1007; } void (*const ctors1007[]) () __attribute__ ((section (".ctors.64528"), aligned (sizeof (void *)))) - = { ctor1007 }; + = { ctor1007b, ctor1007a }; static void -dtor1007 () +dtor1007a () { - if (count != 1007) + if (count != 1006) abort (); count = 1005; } +static void +dtor1007b () +{ + if (count != 1007) + abort (); + count = 1006; +} void (*const dtors1007[]) () __attribute__ ((section (".dtors.64528"), aligned (sizeof (void *)))) - = { dtor1007 }; + = { dtor1007b, dtor1007a }; static void init65530 () @@ -69,17 +83,31 @@ void (*const fini_array65530[]) () = { fini65530 }; static void -ctor65535 () +ctor65535a () { if (count != 65530) abort (); count = 65535; } +static void +ctor65535b () +{ + if (count != 65535) + abort (); + count = 65536; +} void (*const ctors65535[]) () __attribute__ ((section (".ctors"), aligned (sizeof (void *)))) - = { ctor65535 }; + = { ctor65535b, ctor65535a }; +static void +dtor65535b () +{ + if (count != 65536) + abort (); + count = 65535; +} static void -dtor65535 () +dtor65535a () { if (count != 65535) abort (); @@ -87,7 +115,7 @@ dtor65535 () } void (*const dtors65535[]) () __attribute__ ((section (".dtors"), aligned (sizeof (void *)))) - = { dtor65535 }; + = { dtor65535b, dtor65535a }; #endif int diff --git a/ld/testsuite/ld-elf/note-3.l b/ld/testsuite/ld-elf/note-3.l new file mode 100644 index 0000000..551ebaa --- /dev/null +++ b/ld/testsuite/ld-elf/note-3.l @@ -0,0 +1,2 @@ +.*warning: section '.hash' is being made into a note +.* diff --git a/ld/testsuite/ld-elf/note-3.s b/ld/testsuite/ld-elf/note-3.s new file mode 100644 index 0000000..3a1d190 --- /dev/null +++ b/ld/testsuite/ld-elf/note-3.s @@ -0,0 +1,10 @@ + .globl _entry + .text +_entry: + .byte 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 + .global foo +foo: + .byte 9 + + .section .note,"",%note + .byte 0 diff --git a/ld/testsuite/ld-elf/note-3.t b/ld/testsuite/ld-elf/note-3.t new file mode 100644 index 0000000..13324ae --- /dev/null +++ b/ld/testsuite/ld-elf/note-3.t @@ -0,0 +1,22 @@ +PHDRS +{ + text PT_LOAD FILEHDR PHDRS ; + note PT_NOTE; +} +SECTIONS +{ + . = . + SIZEOF_HEADERS ; + .text : { *(.text) *(.rodata) } :text + .note : { *(.note) } :note :text + + /* BUG: This linker script is broken here. It has not reset the + output segment for the following sections, so they are all + treated as notes... */ + + .hash : { *(.hash) } + + .dynstr : { *(.dynstr) } + .dynsym : { *(.dynsym) } + .got.plt : { *(.got.plt) *(.igot.plt) } + /DISCARD/ : { *(*) } +} diff --git a/ld/testsuite/ld-elf/pr12851.d b/ld/testsuite/ld-elf/pr12851.d new file mode 100644 index 0000000..fb61c5a --- /dev/null +++ b/ld/testsuite/ld-elf/pr12851.d @@ -0,0 +1,11 @@ +#source: pr12851.s +#source: start.s +#ld: --gc-sections +#readelf: -s --wide +#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-* +#notarget: hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-* +# generic linker targets don't support --gc-sections, nor do a bunch of others + +#... + +.* _.stapsdt.base +#pass diff --git a/ld/testsuite/ld-elf/pr12851.s b/ld/testsuite/ld-elf/pr12851.s new file mode 100644 index 0000000..784b91f --- /dev/null +++ b/ld/testsuite/ld-elf/pr12851.s @@ -0,0 +1,5 @@ + .section .note.stapsdt,"?","note" + .dc.a _.stapsdt.base + .section .stapsdt.base,"a","progbits" +_.stapsdt.base: .space 1 + .size _.stapsdt.base,1 diff --git a/ld/testsuite/ld-elf/pr12975.d b/ld/testsuite/ld-elf/pr12975.d new file mode 100644 index 0000000..b361cc2 --- /dev/null +++ b/ld/testsuite/ld-elf/pr12975.d @@ -0,0 +1,11 @@ +#ld: --gc-sections -shared -version-script pr12975.t +#readelf: -s --wide +#target: *-*-linux* *-*-gnu* +#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-* +#notarget: hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-* +# generic linker targets don't support --gc-sections, nor do a bunch of others + +#failif +#... + +[0-9]+: +[0-9a-f]+ +[0-9]+ +FUNC +LOCAL +DEFAULT +[1-9]+ bar +#... diff --git a/ld/testsuite/ld-elf/pr12975.s b/ld/testsuite/ld-elf/pr12975.s new file mode 100644 index 0000000..7429121 --- /dev/null +++ b/ld/testsuite/ld-elf/pr12975.s @@ -0,0 +1,10 @@ + .section .text.foo,"ax",%progbits + .globl foo + .type foo, %function +foo: + .byte 0 + .section .text.bar,"ax",%progbits + .type bar, %function + .globl bar +bar: + .byte 0 diff --git a/ld/testsuite/ld-elf/pr12975.t b/ld/testsuite/ld-elf/pr12975.t new file mode 100644 index 0000000..902c1f7 --- /dev/null +++ b/ld/testsuite/ld-elf/pr12975.t @@ -0,0 +1,6 @@ +{ +global: + foo; +local: + *; +}; diff --git a/ld/testsuite/ld-elf/pr13195.c b/ld/testsuite/ld-elf/pr13195.c new file mode 100644 index 0000000..a9bce4a --- /dev/null +++ b/ld/testsuite/ld-elf/pr13195.c @@ -0,0 +1,5 @@ +int +main () +{ + return 0; +} diff --git a/ld/testsuite/ld-elf/pr13195.d b/ld/testsuite/ld-elf/pr13195.d new file mode 100644 index 0000000..796102b --- /dev/null +++ b/ld/testsuite/ld-elf/pr13195.d @@ -0,0 +1,10 @@ +#ld: --gc-sections -shared -version-script pr13195.t +#readelf: -s --wide -D +#target: *-*-linux* *-*-gnu* +#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-* +#notarget: hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-* +# generic linker targets don't support --gc-sections, nor do a bunch of others + +#... + +[0-9]+ +[0-9]+: +[0-9a-f]+ +[0-9]+ +FUNC +GLOBAL +DEFAULT +[1-9]+ foo +#pass diff --git a/ld/testsuite/ld-elf/pr13195.s b/ld/testsuite/ld-elf/pr13195.s new file mode 100644 index 0000000..409b5af --- /dev/null +++ b/ld/testsuite/ld-elf/pr13195.s @@ -0,0 +1,6 @@ + .section .text.new_foo,"ax",%progbits + .globl new_foo + .type new_foo, %function +new_foo: + .byte 0 + .symver new_foo,foo@@VERS_2.0 diff --git a/ld/testsuite/ld-elf/pr13195.t b/ld/testsuite/ld-elf/pr13195.t new file mode 100644 index 0000000..2b82842 --- /dev/null +++ b/ld/testsuite/ld-elf/pr13195.t @@ -0,0 +1,6 @@ +VERS_2.0 { +global: + foo; +local: + *; +}; diff --git a/ld/testsuite/ld-elf/pr13250-1.c b/ld/testsuite/ld-elf/pr13250-1.c new file mode 100644 index 0000000..e43ebe0 --- /dev/null +++ b/ld/testsuite/ld-elf/pr13250-1.c @@ -0,0 +1,8 @@ +int common1[8]; +void +foo () +{ + int i; + for (i = 0; i < sizeof (common1)/ sizeof (common1[0]); i++) + common1[i] = -1; +} diff --git a/ld/testsuite/ld-elf/pr13250-2.c b/ld/testsuite/ld-elf/pr13250-2.c new file mode 100644 index 0000000..af8268b --- /dev/null +++ b/ld/testsuite/ld-elf/pr13250-2.c @@ -0,0 +1,10 @@ +extern int common1[8]; + +extern void foo (); + +int +bar () +{ + foo (); + return common1[4]; +} diff --git a/ld/testsuite/ld-elf/pr13250-3.c b/ld/testsuite/ld-elf/pr13250-3.c new file mode 100644 index 0000000..a227670 --- /dev/null +++ b/ld/testsuite/ld-elf/pr13250-3.c @@ -0,0 +1,22 @@ +#include +#include + +int common1[1]; +char common2[2]; + +extern int bar (); + +int +main () +{ + int i; + if (bar () != -1) + abort (); + if (common1[0] != -1) + abort (); + for (i = 0; i < sizeof (common2)/ sizeof (common2[0]); i++) + if (common2[i] != 0) + abort (); + printf ("PASS\n"); + return 0; +} diff --git a/ld/testsuite/ld-elf/shared.exp b/ld/testsuite/ld-elf/shared.exp index d0c3478..9cd0221 100644 --- a/ld/testsuite/ld-elf/shared.exp +++ b/ld/testsuite/ld-elf/shared.exp @@ -21,16 +21,18 @@ # Exclude non-ELF targets. -if ![is_elf_format] { +# The following tests require running the executable generated by ld, +# or enough of a build environment to create a fully linked executable. +# This is not commonly available when testing a cross-built linker. +if ![isnative] { return } -# The following tests require running the executable generated by ld. -if ![isnative] { +if ![is_elf_format] { return } -# Check if compiler works +# Check to see if the C compiler works if { [which $CC] == 0 } { return } @@ -47,7 +49,8 @@ set build_tests { {begin.c end.c} {} "libbar.so"} {"Build warn libbar.so" "-shared" "-fPIC" - {beginwarn.c end.c} {} "libbarw.so"} + {beginwarn.c end.c} {} "libbarw.so" + "C" "^.*\\\): warning: function foo is deprecated$"} {"Build hidden libbar.so" "-shared" "-fPIC" {begin.c endhidden.c} {} "libbarh.so"} @@ -154,8 +157,19 @@ set build_tests { {"Build libpr11138-2.o" "-r -nostdlib" "" {pr11138-2.c} {} "libpr11138-2.o"} + {"Build pr13250-1.so" + "-shared" "-fPIC" + {pr13250-1.c} {} "libpr13250-1.so"} + {"Build pr13250-2.so with libpr13250-1.so" + "-shared tmpdir/libpr13250-1.so" "-fPIC" + {pr13250-2.c} {} "libpr13250-2.so"} + {"Build libpr13250-3.o" + "-r -nostdlib" "" + {pr13250-3.c} {} "libpr13250-3.o"} } +run_cc_link_tests $build_tests + set run_tests { {"Run normal with libfoo.so" "tmpdir/begin.o tmpdir/libfoo.so tmpdir/end.o" "" @@ -278,13 +292,15 @@ set run_tests { {"Run with libpr11138-1.so pr11138-2.c" "--version-script=pr11138-2.map tmpdir/libpr11138-1.so tmpdir/pr11138-2.o" "" {dummy.c} "pr11138b" "pr11138.out"} + {"Run with pr13250-3.c, libpr13250-1.so and libpr13250-2.so" + "--as-needed tmpdir/pr13250-3.o tmpdir/libpr13250-1.so tmpdir/libpr13250-2.so" "" + {dummy.c} "pr13250" "pass.out"} } -run_cc_link_tests $build_tests # NetBSD ELF systems do not currently support the .*_array sections. run_ld_link_exec_tests [list "*-*-netbsdelf*"] $run_tests -# Check if compiler works +# Check to see if the C++ compiler works if { [which $CXX] == 0 } { return } diff --git a/ld/testsuite/ld-elf/symbol3.s b/ld/testsuite/ld-elf/symbol3.s new file mode 100644 index 0000000..4fd76d5 --- /dev/null +++ b/ld/testsuite/ld-elf/symbol3.s @@ -0,0 +1 @@ + .comm badsym,4 diff --git a/ld/testsuite/ld-elf/symbol3w.s b/ld/testsuite/ld-elf/symbol3w.s new file mode 100644 index 0000000..33262a6 --- /dev/null +++ b/ld/testsuite/ld-elf/symbol3w.s @@ -0,0 +1,4 @@ + .data + .dc.a badsym + .section .gnu.warning.badsym,"",%progbits + .string "badsym warning" diff --git a/ld/testsuite/ld-elf/tbss3.s b/ld/testsuite/ld-elf/tbss3.s new file mode 100644 index 0000000..f5530a3 --- /dev/null +++ b/ld/testsuite/ld-elf/tbss3.s @@ -0,0 +1,17 @@ + .globl main + .globl start + .globl _start + .globl __start + .text +main: +start: +_start: +__start: + .byte 0 + + .section .tbss,"awT",%nobits + .p2align 10 + .type tbss, %object + .size tbss, 1024 +tbss: + .zero 1024 diff --git a/ld/testsuite/ld-elf/tdata3.s b/ld/testsuite/ld-elf/tdata3.s new file mode 100644 index 0000000..8886360 --- /dev/null +++ b/ld/testsuite/ld-elf/tdata3.s @@ -0,0 +1,23 @@ + .globl main + .globl start + .globl _start + .globl __start + .text +main: +start: +_start: +__start: + .byte 0 + + .section .tdata,"awT",%progbits + .type tdata,%object + .size tdata,1 +tdata: + .byte 17 + + .section .tbss,"awT",%nobits + .p2align 10 + .type tbss, %object + .size tbss, 1024 +tbss: + .zero 1024 diff --git a/ld/testsuite/ld-elf/warn3.d b/ld/testsuite/ld-elf/warn3.d new file mode 100644 index 0000000..53dee18 --- /dev/null +++ b/ld/testsuite/ld-elf/warn3.d @@ -0,0 +1,14 @@ +#source: start.s +#ld: tmpdir/symbol3w.o tmpdir/symbol3.a +#warning: .*: warning: badsym warning$ +#readelf: -s +#notarget: hppa64*-hpux* +#xfail: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-* +# generic linker targets don't support .gnu.warning sections. + +# Check that warnings are generated for the symbols in .gnu.warning +# construct and that the symbol still appears as expected. + +#... + +[0-9]+: +[0-9a-f]+ +4 +OBJECT +GLOBAL +DEFAULT +[1-9] badsym +#pass diff --git a/ld/testsuite/ld-elfvers/vers19.ver b/ld/testsuite/ld-elfvers/vers19.ver index 28a52c4..fb7bfe9 100644 --- a/ld/testsuite/ld-elfvers/vers19.ver +++ b/ld/testsuite/ld-elfvers/vers19.ver @@ -1,3 +1,3 @@ Version References: required from tmpdir/vers18.so: - 0x0a7922b0 0x00 0[23] VERS_2.0 + 0x0a7922b0 0x00 ?? VERS_2.0 diff --git a/ld/testsuite/ld-elfvers/vers2.ver b/ld/testsuite/ld-elfvers/vers2.ver index ea992ff..e199bfc 100644 --- a/ld/testsuite/ld-elfvers/vers2.ver +++ b/ld/testsuite/ld-elfvers/vers2.ver @@ -4,5 +4,5 @@ Version definitions: Version References: required from tmpdir/vers1.so: - 0x0a7922b0 0x00 03 VERS_2.0 + 0x0a7922b0 0x00 ?? VERS_2.0 diff --git a/ld/testsuite/ld-elfvers/vers22.ver b/ld/testsuite/ld-elfvers/vers22.ver index 05afce7..1b3e7ea 100644 --- a/ld/testsuite/ld-elfvers/vers22.ver +++ b/ld/testsuite/ld-elfvers/vers22.ver @@ -1,4 +1,4 @@ Version References: required from tmpdir/vers22b.so: - 0x05aa7610 0x00 02 VERS.0 + 0x05aa7610 0x00 ?? VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers27d4.ver b/ld/testsuite/ld-elfvers/vers27d4.ver index 12c79c9..61fb539 100644 --- a/ld/testsuite/ld-elfvers/vers27d4.ver +++ b/ld/testsuite/ld-elfvers/vers27d4.ver @@ -1,3 +1,3 @@ Version References: required from tmpdir/vers27a.so: - 0x05aa7610 0x00 02 VERS.0 + 0x05aa7610 0x00 ?? VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers28c.ver b/ld/testsuite/ld-elfvers/vers28c.ver index 1462686..18667de 100644 --- a/ld/testsuite/ld-elfvers/vers28c.ver +++ b/ld/testsuite/ld-elfvers/vers28c.ver @@ -1,4 +1,4 @@ Version References: required from tmpdir/vers28b.so: - 0x05aa7610 0x00 02 VERS.0 + 0x05aa7610 0x00 ?? VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers3.ver b/ld/testsuite/ld-elfvers/vers3.ver index 41dad48..5b47f6b 100644 --- a/ld/testsuite/ld-elfvers/vers3.ver +++ b/ld/testsuite/ld-elfvers/vers3.ver @@ -1,4 +1,4 @@ Version References: required from tmpdir/vers1.so: - 0x0a7922b0 0x00 0[23] VERS_2.0 + 0x0a7922b0 0x00 ?? VERS_2.0 diff --git a/ld/testsuite/ld-elfvsb/elfvsb.exp b/ld/testsuite/ld-elfvsb/elfvsb.exp index d288774..3c64783 100644 --- a/ld/testsuite/ld-elfvsb/elfvsb.exp +++ b/ld/testsuite/ld-elfvsb/elfvsb.exp @@ -302,7 +302,9 @@ proc visibility_run {visibility} { setup_xfail "sparc*-*-linux*" } } - setup_xfail "x86_64-*-linux*" + if { [is_elf64 $tmpdir/mainnp.o] } { + setup_xfail "x86_64-*-linux*" + } if { ![istarget hppa*64*-*-linux*] } { setup_xfail "hppa*-*-linux*" } @@ -343,7 +345,9 @@ proc visibility_run {visibility} { setup_xfail "alpha*-*-linux*" setup_xfail "mips*-*-linux*" } - setup_xfail "x86_64-*-linux*" + if { [is_elf64 $tmpdir/mainnp.o] } { + setup_xfail "x86_64-*-linux*" + } if { ![istarget hppa*64*-*-linux*] } { setup_xfail "hppa*-*-linux*" } @@ -415,7 +419,9 @@ proc visibility_run {visibility} { setup_xfail "sparc*-*-linux*" } } - setup_xfail "x86_64-*-linux*" + if { [is_elf64 $tmpdir/mainp.o] } { + setup_xfail "x86_64-*-linux*" + } if { ![istarget hppa*64*-*-linux*] } { setup_xfail "hppa*-*-linux*" } diff --git a/ld/testsuite/ld-i386/i386.exp b/ld/testsuite/ld-i386/i386.exp index cc82e15..68b71fb 100644 --- a/ld/testsuite/ld-i386/i386.exp +++ b/ld/testsuite/ld-i386/i386.exp @@ -118,12 +118,14 @@ if { !([istarget "i?86-*-elf*"] # readelf: Apply readelf options on result. Compare with regex (last arg). set i386tests { - {"TLS -fpic -shared transitions" "-shared -melf_i386" + {"TLS -fpic -shared transitions" + "-shared -melf_i386 --no-ld-generated-unwind-info" "--32" {tlspic1.s tlspic2.s} {{readelf -Ssrl tlspic.rd} {objdump -drj.text tlspic.dd} {objdump -sj.got tlspic.sd} {objdump -sj.tdata tlspic.td}} "libtlspic.so"} - {"TLS descriptor -fpic -shared transitions" "-shared -melf_i386" + {"TLS descriptor -fpic -shared transitions" + "-shared -melf_i386 --no-ld-generated-unwind-info" "--32" {tlsdesc.s tlspic2.s} {{readelf -Ssrl tlsdesc.rd} {objdump -drj.text tlsdesc.dd} {objdump "-s -j.got -j.got.plt" tlsdesc.sd} {objdump -sj.tdata tlsdesc.td}} @@ -131,21 +133,24 @@ set i386tests { {"Helper shared library" "-shared -melf_i386" "--32" {tlslib.s} {} "libtlslib.so"} {"TLS -fpic and -fno-pic exec transitions" - "-melf_i386 tmpdir/libtlslib.so" "--32" {tlsbinpic.s tlsbin.s} + "-melf_i386 tmpdir/libtlslib.so --no-ld-generated-unwind-info" + "--32" {tlsbinpic.s tlsbin.s} {{readelf -Ssrl tlsbin.rd} {objdump -drj.text tlsbin.dd} {objdump -sj.got tlsbin.sd} {objdump -sj.tdata tlsbin.td}} "tlsbin"} {"TLS descriptor -fpic and -fno-pic exec transitions" - "-melf_i386 tmpdir/libtlslib.so" "--32" {tlsbindesc.s tlsbin.s} + "-melf_i386 tmpdir/libtlslib.so --no-ld-generated-unwind-info" + "--32" {tlsbindesc.s tlsbin.s} {{readelf -Ssrl tlsbindesc.rd} {objdump -drj.text tlsbindesc.dd} {objdump -sj.got tlsbindesc.sd} {objdump -sj.tdata tlsbindesc.td}} "tlsbindesc"} - {"TLS -fno-pic -shared" "-shared -melf_i386" + {"TLS -fno-pic -shared" "-shared -melf_i386 --no-ld-generated-unwind-info" "--32" {tlsnopic1.s tlsnopic2.s} {{readelf -Ssrl tlsnopic.rd} {objdump -drj.text tlsnopic.dd} {objdump -sj.got tlsnopic.sd}} "libtlsnopic.so"} {"TLS with global dynamic and descriptors" - "-shared -melf_i386" "--32" {tlsgdesc.s} + "-shared -melf_i386 --no-ld-generated-unwind-info" + "--32" {tlsgdesc.s} {{readelf -Ssrl tlsgdesc.rd} {objdump -drj.text tlsgdesc.dd}} "libtlsgdesc.so"} {"TLS in debug sections" "-melf_i386" @@ -194,6 +199,8 @@ run_dump_test "tlspie2" run_dump_test "nogot1" run_dump_test "nogot2" run_dump_test "discarded1" +run_dump_test "pr12718" +run_dump_test "pr12921" if { !([istarget "i?86-*-linux*"] || [istarget "i?86-*-gnu*"] diff --git a/ld/testsuite/ld-i386/pr12718.d b/ld/testsuite/ld-i386/pr12718.d new file mode 100644 index 0000000..57eea4e --- /dev/null +++ b/ld/testsuite/ld-i386/pr12718.d @@ -0,0 +1,19 @@ +#name: PR ld/12718 +#as: --32 +#ld: -melf_i386 +#readelf: -S + +There are 5 section headers, starting at offset 0x7c: + +Section Headers: + \[Nr\] Name Type Addr Off Size ES Flg Lk Inf Al + \[ 0\] NULL 00000000 000000 000000 00 0 0 0 + \[ 1\] .text PROGBITS 08048054 000054 000006 00 AX 0 0 4 + \[ 2\] .shstrtab STRTAB 00000000 00005a 000021 00 0 0 1 + \[ 3\] .symtab SYMTAB 00000000 000144 000070 10 4 2 4 + \[ 4\] .strtab STRTAB 00000000 0001b4 000024 00 0 0 1 +Key to Flags: + W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\) + I \(info\), L \(link order\), G \(group\), T \(TLS\), E \(exclude\), x \(unknown\) + O \(extra OS processing required\) o \(OS specific\), p \(processor specific\) +#pass diff --git a/ld/testsuite/ld-i386/pr12718.s b/ld/testsuite/ld-i386/pr12718.s new file mode 100644 index 0000000..162704e --- /dev/null +++ b/ld/testsuite/ld-i386/pr12718.s @@ -0,0 +1,4 @@ +.globl foo +foo: ret +.globl _start +_start: call foo diff --git a/ld/testsuite/ld-i386/pr12921.d b/ld/testsuite/ld-i386/pr12921.d new file mode 100644 index 0000000..4b75888 --- /dev/null +++ b/ld/testsuite/ld-i386/pr12921.d @@ -0,0 +1,21 @@ +#name: PR ld/12921 +#as: --32 +#ld: -melf_i386 +#readelf: -S --wide + +There are 7 section headers, starting at offset 0x204c: + +Section Headers: + \[Nr\] Name Type Addr Off Size ES Flg Lk Inf Al + \[ 0\] NULL 00000000 000000 000000 00 0 0 0 + \[ 1\] .text PROGBITS 08049000 001000 000001 00 AX 0 0 4096 + \[ 2\] .data PROGBITS 0804b000 002000 000020 00 WA 0 0 4096 + \[ 3\] .bss NOBITS 0804c000 002020 010000 00 WA 0 0 4096 + \[ 4\] .shstrtab STRTAB 00000000 002020 00002c 00 0 0 1 + \[ 5\] .symtab SYMTAB 00000000 002164 0000c0 10 6 6 4 + \[ 6\] .strtab STRTAB 00000000 002224 000037 00 0 0 1 +Key to Flags: + W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\) + I \(info\), L \(link order\), G \(group\), T \(TLS\), E \(exclude\), x \(unknown\) + O \(extra OS processing required\) o \(OS specific\), p \(processor specific\) +#pass diff --git a/ld/testsuite/ld-i386/pr12921.s b/ld/testsuite/ld-i386/pr12921.s new file mode 100644 index 0000000..9c4966f --- /dev/null +++ b/ld/testsuite/ld-i386/pr12921.s @@ -0,0 +1,25 @@ + .text + .balign 4096 +vtext: + .p2align 4,,15 + .globl _start + .type _start, @function +_start: + ret + .size _start, .-_start + .globl vdata + .data + .align 4096 + .type vdata, @object + .size vdata, 4 +vdata: + .long 5 + .comm vbss,65536,4096 + .align 16 + .type local, @object + .size local, 24 +local: + .byte 77 + .zero 7 + .dc.a local + .dc.a 0 diff --git a/ld/testsuite/ld-i386/tlsbin.dd b/ld/testsuite/ld-i386/tlsbin.dd index 9cf14a5..6f6c0e4 100644 --- a/ld/testsuite/ld-i386/tlsbin.dd +++ b/ld/testsuite/ld-i386/tlsbin.dd @@ -1,7 +1,7 @@ #source: tlsbinpic.s #source: tlsbin.s #as: --32 -#ld: -melf_i386 tmpdir/libtlslib.so +#ld: -melf_i386 tmpdir/libtlslib.so --no-ld-generated-unwind-info #objdump: -drj.text #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsbin.rd b/ld/testsuite/ld-i386/tlsbin.rd index 84cec78..5579334 100644 --- a/ld/testsuite/ld-i386/tlsbin.rd +++ b/ld/testsuite/ld-i386/tlsbin.rd @@ -1,7 +1,7 @@ #source: tlsbinpic.s #source: tlsbin.s #as: --32 -#ld: -melf_i386 tmpdir/libtlslib.so +#ld: -melf_i386 tmpdir/libtlslib.so --no-ld-generated-unwind-info #readelf: -Ssrl #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsbin.sd b/ld/testsuite/ld-i386/tlsbin.sd index 2fa7a89..99dc4c5 100644 --- a/ld/testsuite/ld-i386/tlsbin.sd +++ b/ld/testsuite/ld-i386/tlsbin.sd @@ -1,7 +1,7 @@ #source: tlsbinpic.s #source: tlsbin.s #as: --32 -#ld: -melf_i386 tmpdir/libtlslib.so +#ld: -melf_i386 tmpdir/libtlslib.so --no-ld-generated-unwind-info #objdump: -sj.got #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsbin.td b/ld/testsuite/ld-i386/tlsbin.td index bb29455..a1ed433 100644 --- a/ld/testsuite/ld-i386/tlsbin.td +++ b/ld/testsuite/ld-i386/tlsbin.td @@ -1,7 +1,7 @@ #source: tlsbinpic.s #source: tlsbin.s #as: --32 -#ld: -melf_i386 tmpdir/libtlslib.so +#ld: -melf_i386 tmpdir/libtlslib.so --no-ld-generated-unwind-info #objdump: -sj.tdata #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsbindesc.dd b/ld/testsuite/ld-i386/tlsbindesc.dd index f77d1c8..db54764 100644 --- a/ld/testsuite/ld-i386/tlsbindesc.dd +++ b/ld/testsuite/ld-i386/tlsbindesc.dd @@ -1,7 +1,7 @@ #source: tlsbindesc.s #source: tlsbin.s #as: --32 -#ld: -melf_i386 tmpdir/libtlslib.so +#ld: -melf_i386 tmpdir/libtlslib.so --no-ld-generated-unwind-info #objdump: -drj.text #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsbindesc.rd b/ld/testsuite/ld-i386/tlsbindesc.rd index c2cea19..a334e56 100644 --- a/ld/testsuite/ld-i386/tlsbindesc.rd +++ b/ld/testsuite/ld-i386/tlsbindesc.rd @@ -1,7 +1,7 @@ #source: tlsbindesc.s #source: tlsbin.s #as: --32 -#ld: -melf_i386 tmpdir/libtlslib.so +#ld: -melf_i386 tmpdir/libtlslib.so --no-ld-generated-unwind-info #readelf: -Ssrl #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsbindesc.sd b/ld/testsuite/ld-i386/tlsbindesc.sd index a87f5da..7d56466 100644 --- a/ld/testsuite/ld-i386/tlsbindesc.sd +++ b/ld/testsuite/ld-i386/tlsbindesc.sd @@ -1,7 +1,7 @@ #source: tlsbindesc.s #source: tlsbin.s #as: --32 -#ld: -melf_i386 tmpdir/libtlslib.so +#ld: -melf_i386 tmpdir/libtlslib.so --no-ld-generated-unwind-info #objdump: -sj.got #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsbindesc.td b/ld/testsuite/ld-i386/tlsbindesc.td index 726df3e..64859dd 100644 --- a/ld/testsuite/ld-i386/tlsbindesc.td +++ b/ld/testsuite/ld-i386/tlsbindesc.td @@ -1,7 +1,7 @@ #source: tlsbindesc.s #source: tlsbin.s #as: --32 -#ld: -melf_i386 tmpdir/libtlslib.so +#ld: -melf_i386 tmpdir/libtlslib.so --no-ld-generated-unwind-info #objdump: -sj.tdata #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsdesc.dd b/ld/testsuite/ld-i386/tlsdesc.dd index bca0090..85db8dd 100644 --- a/ld/testsuite/ld-i386/tlsdesc.dd +++ b/ld/testsuite/ld-i386/tlsdesc.dd @@ -1,7 +1,7 @@ #source: tlsdesc.s #source: tlspic2.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #objdump: -drj.text #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsdesc.rd b/ld/testsuite/ld-i386/tlsdesc.rd index 42edd44..c7c41c6 100644 --- a/ld/testsuite/ld-i386/tlsdesc.rd +++ b/ld/testsuite/ld-i386/tlsdesc.rd @@ -1,7 +1,7 @@ #source: tlsdesc.s #source: tlspic2.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #readelf: -Ssrl #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsdesc.sd b/ld/testsuite/ld-i386/tlsdesc.sd index 656c409..ad3d1e3 100644 --- a/ld/testsuite/ld-i386/tlsdesc.sd +++ b/ld/testsuite/ld-i386/tlsdesc.sd @@ -1,7 +1,7 @@ #source: tlsdesc.s #source: tlspic2.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #objdump: -s -j.got -j.got.plt #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsdesc.td b/ld/testsuite/ld-i386/tlsdesc.td index f3612b3..12cc43c 100644 --- a/ld/testsuite/ld-i386/tlsdesc.td +++ b/ld/testsuite/ld-i386/tlsdesc.td @@ -1,7 +1,7 @@ #source: tlsdesc.s #source: tlspic2.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #objdump: -sj.tdata #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsgdesc.dd b/ld/testsuite/ld-i386/tlsgdesc.dd index 25659de..92062ce 100644 --- a/ld/testsuite/ld-i386/tlsgdesc.dd +++ b/ld/testsuite/ld-i386/tlsgdesc.dd @@ -1,6 +1,6 @@ #source: tlsgdesc.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #objdump: -drj.text #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsgdesc.rd b/ld/testsuite/ld-i386/tlsgdesc.rd index 3a224a2..fa0eeb9 100644 --- a/ld/testsuite/ld-i386/tlsgdesc.rd +++ b/ld/testsuite/ld-i386/tlsgdesc.rd @@ -1,6 +1,6 @@ #source: tlsgdesc.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #readelf: -Ssrl #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsnopic.dd b/ld/testsuite/ld-i386/tlsnopic.dd index a0a8853..995cdaa 100644 --- a/ld/testsuite/ld-i386/tlsnopic.dd +++ b/ld/testsuite/ld-i386/tlsnopic.dd @@ -1,7 +1,7 @@ #source: tlsnopic1.s #source: tlsnopic2.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #objdump: -drj.text #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsnopic.rd b/ld/testsuite/ld-i386/tlsnopic.rd index 2590a9f..2396fc5 100644 --- a/ld/testsuite/ld-i386/tlsnopic.rd +++ b/ld/testsuite/ld-i386/tlsnopic.rd @@ -1,7 +1,7 @@ #source: tlsnopic1.s #source: tlsnopic2.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #readelf: -Ssrl #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlsnopic.sd b/ld/testsuite/ld-i386/tlsnopic.sd index fdfaacf..925c5d5 100644 --- a/ld/testsuite/ld-i386/tlsnopic.sd +++ b/ld/testsuite/ld-i386/tlsnopic.sd @@ -1,7 +1,7 @@ #source: tlsnopic1.s #source: tlsnopic2.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #objdump: -sj.got #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlspic.dd b/ld/testsuite/ld-i386/tlspic.dd index dd436d2..b0c046d 100644 --- a/ld/testsuite/ld-i386/tlspic.dd +++ b/ld/testsuite/ld-i386/tlspic.dd @@ -1,7 +1,7 @@ #source: tlspic1.s #source: tlspic2.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #objdump: -drj.text #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlspic.rd b/ld/testsuite/ld-i386/tlspic.rd index 46b8ed5..7fe042e 100644 --- a/ld/testsuite/ld-i386/tlspic.rd +++ b/ld/testsuite/ld-i386/tlspic.rd @@ -1,7 +1,7 @@ #source: tlspic1.s #source: tlspic2.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #readelf: -Ssrl #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlspic.sd b/ld/testsuite/ld-i386/tlspic.sd index f9c9627..15b3b93 100644 --- a/ld/testsuite/ld-i386/tlspic.sd +++ b/ld/testsuite/ld-i386/tlspic.sd @@ -1,7 +1,7 @@ #source: tlspic1.s #source: tlspic2.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #objdump: -sj.got #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/tlspic.td b/ld/testsuite/ld-i386/tlspic.td index 1291584..a96d6f6 100644 --- a/ld/testsuite/ld-i386/tlspic.td +++ b/ld/testsuite/ld-i386/tlspic.td @@ -1,7 +1,7 @@ #source: tlspic1.s #source: tlspic2.s #as: --32 -#ld: -shared -melf_i386 +#ld: -shared -melf_i386 --no-ld-generated-unwind-info #objdump: -sj.tdata #target: i?86-*-* diff --git a/ld/testsuite/ld-i386/vxworks1-lib.rd b/ld/testsuite/ld-i386/vxworks1-lib.rd index b899b73..61ff293 100644 --- a/ld/testsuite/ld-i386/vxworks1-lib.rd +++ b/ld/testsuite/ld-i386/vxworks1-lib.rd @@ -1,12 +1,12 @@ +Relocation section '\.rel\.plt' at offset .* contains 2 entries: + Offset Info Type Sym\.Value Sym\. Name +0008140c .*07 R_386_JUMP_SLOT 00000000 sexternal +00081410 .*07 R_386_JUMP_SLOT 00080c27 sglobal + Relocation section '\.rel\.dyn' at offset .* contains 4 entries: Offset Info Type Sym\.Value Sym\. Name 00081800 00000008 R_386_RELATIVE * 00080c03 .*01 R_386_32 00000000 __GOTT_BASE__ 00080c09 .*01 R_386_32 00000000 __GOTT_INDEX__ 00081414 .*06 R_386_GLOB_DAT 00081c00 x - -Relocation section '\.rel\.plt' at offset .* contains 2 entries: - Offset Info Type Sym\.Value Sym\. Name -0008140c .*07 R_386_JUMP_SLOT 00000000 sexternal -00081410 .*07 R_386_JUMP_SLOT 00080c27 sglobal diff --git a/ld/testsuite/ld-ifunc/ifunc-1-local-x86.d b/ld/testsuite/ld-ifunc/ifunc-1-local-x86.d index 80cbe41..5408668 100644 --- a/ld/testsuite/ld-ifunc/ifunc-1-local-x86.d +++ b/ld/testsuite/ld-ifunc/ifunc-1-local-x86.d @@ -3,5 +3,5 @@ #target: x86_64-*-* i?86-*-* #... -[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x200|)@plt> +[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x170|\+0x200|)@plt> #pass diff --git a/ld/testsuite/ld-ifunc/ifunc-1-x86.d b/ld/testsuite/ld-ifunc/ifunc-1-x86.d index 1fa2d56..8d223db 100644 --- a/ld/testsuite/ld-ifunc/ifunc-1-x86.d +++ b/ld/testsuite/ld-ifunc/ifunc-1-x86.d @@ -3,5 +3,5 @@ #target: x86_64-*-* i?86-*-* #... -[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x220|)@plt> +[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x190|\+0x220|)@plt> #pass diff --git a/ld/testsuite/ld-ifunc/ifunc-13-i386.d b/ld/testsuite/ld-ifunc/ifunc-13-i386.d index 162c3e4..55cca22 100644 --- a/ld/testsuite/ld-ifunc/ifunc-13-i386.d +++ b/ld/testsuite/ld-ifunc/ifunc-13-i386.d @@ -5,15 +5,14 @@ #readelf: -r --wide #target: x86_64-*-* i?86-*-* -Relocation section '.rel.got' at .* +Relocation section '.rel.got' at offset 0x[0-9a-f]+ contains 1 entries: [ ]+Offset[ ]+Info[ ]+Type[ ]+.* -#... -[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_386_GLOB_DAT[ ]+ifunc\(\)[ ]+ifunc -#... -Relocation section '.rel.ifunc' at .* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_386_RELATIVE[ ]+ + +Relocation section '.rel.ifunc' at offset 0x[0-9a-f]+ contains 1 entries: [ ]+Offset[ ]+Info[ ]+Type[ ]+.* [0-9a-f]+[ ]+[0-9a-f]+[ ]+R_386_32[ ]+ifunc\(\)[ ]+ifunc -#... -Relocation section '.rel.plt' at .* + +Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 1 entries: [ ]+Offset[ ]+Info[ ]+Type[ ]+.* [0-9a-f]+[ ]+[0-9a-f]+[ ]+R_386_JUMP_SLOT[ ]+ifunc\(\)[ ]+ifunc diff --git a/ld/testsuite/ld-ifunc/ifunc-13-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-13-x86-64.d index d0c0647..b01c735 100644 --- a/ld/testsuite/ld-ifunc/ifunc-13-x86-64.d +++ b/ld/testsuite/ld-ifunc/ifunc-13-x86-64.d @@ -5,14 +5,10 @@ #readelf: -r --wide #target: x86_64-*-* -Relocation section '.rela.got' at .* -[ ]+Offset[ ]+Info[ ]+Type[ ]+.* -[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_X86_64_GLOB_DAT[ ]+ifunc\(\)[ ]+ifunc \+ 0 -#... -Relocation section '.rela.ifunc' at .* +Relocation section '.rela.ifunc' at offset 0x[0-9a-f]+ contains 1 entries: [ ]+Offset[ ]+Info[ ]+Type[ ]+.* [0-9a-f]+[ ]+[0-9a-f]+[ ]+R_X86_64_64[ ]+ifunc\(\)[ ]+ifunc \+ 0 -#... -Relocation section '.rela.plt' at .* + +Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 1 entries: [ ]+Offset[ ]+Info[ ]+Type[ ]+.* [0-9a-f]+[ ]+[0-9a-f]+[ ]+R_X86_64_JUMP_SLOT[ ]+ifunc\(\)[ ]+ifunc \+ 0 diff --git a/ld/testsuite/ld-ifunc/ifunc-14-i386.d b/ld/testsuite/ld-ifunc/ifunc-14-i386.d new file mode 100644 index 0000000..0edc9fb --- /dev/null +++ b/ld/testsuite/ld-ifunc/ifunc-14-i386.d @@ -0,0 +1,11 @@ +#source: ifunc-14a.s +#source: ifunc-14b.s +#ld: -shared -m elf_i386 -z nocombreloc +#as: --32 +#readelf: -d --wide +#target: x86_64-*-* i?86-*-* + +#failif +#... +.*\(TEXTREL\).* +#... diff --git a/ld/testsuite/ld-ifunc/ifunc-14-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-14-x86-64.d new file mode 100644 index 0000000..2c4ebbb --- /dev/null +++ b/ld/testsuite/ld-ifunc/ifunc-14-x86-64.d @@ -0,0 +1,11 @@ +#source: ifunc-14a.s +#source: ifunc-14b.s +#ld: -shared -m elf_x86_64 -z nocombreloc +#as: --64 +#readelf: -d +#target: x86_64-*-* + +#failif +#... +.*\(TEXTREL\).* +#... diff --git a/ld/testsuite/ld-ifunc/ifunc-14a.s b/ld/testsuite/ld-ifunc/ifunc-14a.s new file mode 100644 index 0000000..9f20604 --- /dev/null +++ b/ld/testsuite/ld-ifunc/ifunc-14a.s @@ -0,0 +1,7 @@ + .text + .globl bar + .type bar, @function +bar: + jmp foo + .size bar, .-bar + .hidden foo diff --git a/ld/testsuite/ld-ifunc/ifunc-14b.s b/ld/testsuite/ld-ifunc/ifunc-14b.s new file mode 100644 index 0000000..bac22eb --- /dev/null +++ b/ld/testsuite/ld-ifunc/ifunc-14b.s @@ -0,0 +1,5 @@ + .type foo, %gnu_indirect_function + .globl foo +foo: + ret + .size foo, .-foo diff --git a/ld/testsuite/ld-ifunc/ifunc-15-i386.d b/ld/testsuite/ld-ifunc/ifunc-15-i386.d new file mode 100644 index 0000000..c37dd51 --- /dev/null +++ b/ld/testsuite/ld-ifunc/ifunc-15-i386.d @@ -0,0 +1,13 @@ +#source: ifunc-15-i386.s +#ld: -shared -m elf_i386 -z nocombreloc +#as: --32 +#readelf: -r --wide +#target: x86_64-*-* i?86-*-* + +Relocation section '.rel.got' at offset 0x[0-9a-f]+ contains 1 entries: +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_386_GLOB_DAT[ ]+ifunc\(\)[ ]+ifunc + +Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 1 entries: +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_386_JUMP_SLOT[ ]+ifunc\(\)[ ]+ifunc diff --git a/ld/testsuite/ld-ifunc/ifunc-15-i386.s b/ld/testsuite/ld-ifunc/ifunc-15-i386.s new file mode 100644 index 0000000..5ee4fab --- /dev/null +++ b/ld/testsuite/ld-ifunc/ifunc-15-i386.s @@ -0,0 +1,10 @@ + .text + .type foo, @function + .global +foo: + movl ifunc@GOT(%ebx), %eax + ret + .type ifunc, @gnu_indirect_function + .globl ifunc +ifunc: + ret diff --git a/ld/testsuite/ld-ifunc/ifunc-15-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-15-x86-64.d new file mode 100644 index 0000000..a4a5cb1 --- /dev/null +++ b/ld/testsuite/ld-ifunc/ifunc-15-x86-64.d @@ -0,0 +1,13 @@ +#source: ifunc-15-x86-64.s +#ld: -shared -m elf_x86_64 -z nocombreloc +#as: --64 +#readelf: -r --wide +#target: x86_64-*-* + +Relocation section '.rela.got' at offset 0x[0-9a-f]+ contains 1 entries: +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_X86_64_GLOB_DAT[ ]+ifunc\(\)[ ]+ifunc \+ 0 + +Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 1 entries: +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_X86_64_JUMP_SLOT[ ]+ifunc\(\)[ ]+ifunc \+ 0 diff --git a/ld/testsuite/ld-ifunc/ifunc-15-x86-64.s b/ld/testsuite/ld-ifunc/ifunc-15-x86-64.s new file mode 100644 index 0000000..ee336de --- /dev/null +++ b/ld/testsuite/ld-ifunc/ifunc-15-x86-64.s @@ -0,0 +1,10 @@ + .text + .type foo, @function + .global +foo: + movl ifunc@GOTPCREL(%rip), %eax + ret + .type ifunc, @gnu_indirect_function + .globl ifunc +ifunc: + ret diff --git a/ld/testsuite/ld-ifunc/ifunc-3a-x86.d b/ld/testsuite/ld-ifunc/ifunc-3a-x86.d index 3924dda..24be639 100644 --- a/ld/testsuite/ld-ifunc/ifunc-3a-x86.d +++ b/ld/testsuite/ld-ifunc/ifunc-3a-x86.d @@ -4,5 +4,5 @@ #target: x86_64-*-* i?86-*-* #... -[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x258|)@plt> +[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x1b0|\+0x240|)@plt> #pass diff --git a/ld/testsuite/ld-ifunc/ifunc.exp b/ld/testsuite/ld-ifunc/ifunc.exp index 6c20dc0..60599ff 100644 --- a/ld/testsuite/ld-ifunc/ifunc.exp +++ b/ld/testsuite/ld-ifunc/ifunc.exp @@ -244,19 +244,19 @@ if { $fails == 0 } { # Check the executables and shared libraries # # The linked ifunc using executables and the shared library containing -# ifunc should have an OSABI field of LINUX. The linked non-ifunc using +# ifunc should have an OSABI field of GNU. The linked non-ifunc using # executable should have an OSABI field of NONE (aka System V). -if {! [check_osabi tmpdir/libshared_ifunc.so {UNIX - Linux}]} { - fail "Shared libraries containing ifunc does not have an OS/ABI field of LINUX" +if {! [check_osabi tmpdir/libshared_ifunc.so {UNIX - GNU}]} { + fail "Shared libraries containing ifunc does not have an OS/ABI field of GNU" set fails [expr $fails + 1] } -if {! [check_osabi tmpdir/local_prog {UNIX - Linux}]} { - fail "Local ifunc-using executable does not have an OS/ABI field of LINUX" +if {! [check_osabi tmpdir/local_prog {UNIX - GNU}]} { + fail "Local ifunc-using executable does not have an OS/ABI field of GNU" set fails [expr $fails + 1] } -if {! [check_osabi tmpdir/static_prog {UNIX - Linux}]} { - fail "Static ifunc-using executable does not have an OS/ABI field of LINUX" +if {! [check_osabi tmpdir/static_prog {UNIX - GNU}]} { + fail "Static ifunc-using executable does not have an OS/ABI field of GNU" set fails [expr $fails + 1] } if {! [check_osabi tmpdir/dynamic_prog {UNIX - System V}]} { diff --git a/ld/testsuite/ld-mips-elf/jalx-1.d b/ld/testsuite/ld-mips-elf/jalx-1.d new file mode 100644 index 0000000..f082628 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/jalx-1.d @@ -0,0 +1,16 @@ +#name: MIPS jalx-1 +#source: jalx-1.s +#ld: -T jalx-1.ld +#objdump: -d + +.*: +file format .*mips.* + +Disassembly of section \.text: + +88000000 : +88000000: f200 0002 jalx 88000008 +88000004: 0000 0000 nop + +88000008 : +88000008: 00851821 addu v1,a0,a1 + \.\.\. diff --git a/ld/testsuite/ld-mips-elf/jalx-1.ld b/ld/testsuite/ld-mips-elf/jalx-1.ld new file mode 100644 index 0000000..3ee8e31 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/jalx-1.ld @@ -0,0 +1,8 @@ +ENTRY (test) +_start_text_phys = 0x88000000; +_start_text = _start_text_phys; + +SECTIONS +{ + .text _start_text : AT (ADDR (.text)) { *(.text) } +} diff --git a/ld/testsuite/ld-mips-elf/jalx-1.s b/ld/testsuite/ld-mips-elf/jalx-1.s new file mode 100644 index 0000000..96bf01b --- /dev/null +++ b/ld/testsuite/ld-mips-elf/jalx-1.s @@ -0,0 +1,15 @@ + .set noreorder + .set micromips + .ent test + .globl test +test: + jalx test1 + nop + + .set nomicromips +test1: + addu $3, $4, $5 + .end test + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff --git a/ld/testsuite/ld-mips-elf/jalx-2-ex.s b/ld/testsuite/ld-mips-elf/jalx-2-ex.s new file mode 100644 index 0000000..f42925c --- /dev/null +++ b/ld/testsuite/ld-mips-elf/jalx-2-ex.s @@ -0,0 +1,34 @@ + .file 1 "jalx-2-ex.c" + .section .mdebug.abi32 + .previous + .gnu_attribute 4, 1 + .abicalls + .option pic0 + .text + .align 2 + .globl external_function + .set nomips16 + .set nomicromips + .ent external_function + .type external_function, @function +external_function: + .frame $fp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0 + .mask 0x40000000,-4 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + addiu $sp,$sp,-8 + sw $fp,4($sp) + move $fp,$sp + move $sp,$fp + lw $fp,4($sp) + addiu $sp,$sp,8 + j $31 + nop + + .set macro + .set reorder + .end external_function + .size external_function, .-external_function + .ident "GCC: (Sourcery G++ Lite 4.4-999999 - Preview) 4.4.1" diff --git a/ld/testsuite/ld-mips-elf/jalx-2-main.s b/ld/testsuite/ld-mips-elf/jalx-2-main.s new file mode 100644 index 0000000..86e365f --- /dev/null +++ b/ld/testsuite/ld-mips-elf/jalx-2-main.s @@ -0,0 +1,74 @@ + .file 1 "jalx-2-main.c" + .section .mdebug.abi32 + .previous + .gnu_attribute 4, 1 + .abicalls + .option pic0 + .text + .align 2 + .globl internal_function + .set nomips16 + .set micromips + .ent internal_function + .type internal_function, @function +internal_function: + .frame $fp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0 + .mask 0x40000000,-4 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + addiu $sp,$sp,-8 + sw $fp,4($sp) + move $fp,$sp + move $sp,$fp + lw $fp,4($sp) + jraddiusp 8 + .set macro + .set reorder + .end internal_function + .size internal_function, .-internal_function + .rdata + .align 2 +$LC0: + .ascii "hello world\012\000" + .text + .align 2 + .globl main + .set nomips16 + .set micromips + .ent main + .type main, @function +main: + .frame $fp,32,$31 # vars= 0, regs= 2/0, args= 16, gp= 8 + .mask 0xc0000000,-4 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + addiu $sp,$sp,-32 + sw $31,28($sp) + sw $fp,24($sp) + move $fp,$sp + sw $4,32($fp) + sw $5,36($fp) + lui $2,%hi($LC0) + addiu $4,$2,%lo($LC0) + jal printf + nop + + jal internal_function + nop + + jal external_function + nop + + move $sp,$fp + lw $31,28($sp) + lw $fp,24($sp) + jraddiusp 32 + .set macro + .set reorder + .end main + .size main, .-main + .ident "GCC: (Sourcery G++ Lite 4.4-999999 - Preview) 4.4.1" diff --git a/ld/testsuite/ld-mips-elf/jalx-2-printf.s b/ld/testsuite/ld-mips-elf/jalx-2-printf.s new file mode 100644 index 0000000..5ba2566 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/jalx-2-printf.s @@ -0,0 +1,35 @@ + .file 1 "jalx-2-printf.c" + .section .mdebug.abi32 + .previous + .gnu_attribute 4, 1 + .abicalls + .text + .align 2 + .globl printf + .set nomips16 + .set micromips + .ent printf + .type printf, @function +printf: + .frame $fp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0 + .mask 0x40000000,-4 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + addiu $sp,$sp,-8 + sw $fp,4($sp) + move $fp,$sp + sw $5,12($fp) + sw $6,16($fp) + sw $7,20($fp) + sw $4,8($fp) + move $2,$0 + move $sp,$fp + lw $fp,4($sp) + jraddiusp 8 + .set macro + .set reorder + .end printf + .size printf, .-printf + .ident "GCC: (Sourcery G++ Lite 4.4-999999 - Preview) 4.4.1" diff --git a/ld/testsuite/ld-mips-elf/jalx-2.dd b/ld/testsuite/ld-mips-elf/jalx-2.dd new file mode 100644 index 0000000..c08d954 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/jalx-2.dd @@ -0,0 +1,58 @@ +.*: +file format .*mips.* + +Disassembly of section \.text: + +04400000 : + 4400000: 27bdfff8 addiu sp,sp,-8 + 4400004: afbe0004 sw s8,4\(sp\) + 4400008: 03a0f021 move s8,sp + 440000c: 03c0e821 move sp,s8 + 4400010: 8fbe0004 lw s8,4\(sp\) + 4400014: 27bd0008 addiu sp,sp,8 + 4400018: 03e00008 jr ra + 440001c: 00000000 nop + +04400020 : + 4400020: 4fb0 addiu sp,sp,-8 + 4400022: cbc1 sw s8,4\(sp\) + 4400024: 0fdd move s8,sp + 4400026: 0fbe move sp,s8 + 4400028: 4bc1 lw s8,4\(sp\) + 440002a: 4702 jraddiusp 8 + +0440002c

: + 440002c: 4ff1 addiu sp,sp,-32 + 440002e: cbe7 sw ra,28\(sp\) + 4400030: cbc6 sw s8,24\(sp\) + 4400032: 0fdd move s8,sp + 4400034: f89e 0020 sw a0,32\(s8\) + 4400038: f8be 0024 sw a1,36\(s8\) + 440003c: 41a2 0440 lui v0,0x440 + 4400040: 3082 02a0 addiu a0,v0,672 + 4400044: f110 0028 jalx 44000a0 <_PROCEDURE_LINKAGE_TABLE_\+0x20> + 4400048: 0000 0000 nop + 440004c: f620 0010 jal 4400020 + 4400050: 0000 0000 nop + 4400054: f110 0000 jalx 4400000 + 4400058: 0000 0000 nop + 440005c: 0fbe move sp,s8 + 440005e: 4be7 lw ra,28\(sp\) + 4400060: 4bc6 lw s8,24\(sp\) + 4400062: 4708 jraddiusp 32 + \.\.\. + +Disassembly of section \.plt: + +04400080 <_PROCEDURE_LINKAGE_TABLE_>: + 4400080: 3c1c0440 lui gp,0x440 + 4400084: 8f9900d8 lw t9,216\(gp\) + 4400088: 279c00d8 addiu gp,gp,216 + 440008c: 031cc023 subu t8,t8,gp + 4400090: 03e07821 move t7,ra + 4400094: 0018c082 srl t8,t8,0x2 + 4400098: 0320f809 jalr t9 + 440009c: 2718fffe addiu t8,t8,-2 + 44000a0: 3c0f0440 lui t7,0x440 + 44000a4: 8df900e0 lw t9,224\(t7\) + 44000a8: 03200008 jr t9 + 44000ac: 25f800e0 addiu t8,t7,224 diff --git a/ld/testsuite/ld-mips-elf/jalx-2.ld b/ld/testsuite/ld-mips-elf/jalx-2.ld new file mode 100644 index 0000000..1c5562b --- /dev/null +++ b/ld/testsuite/ld-mips-elf/jalx-2.ld @@ -0,0 +1,8 @@ +ENTRY (internal_function) +_start_text_phys = 0x4400000; +_start_text = _start_text_phys; + +SECTIONS +{ + .text _start_text : AT (ADDR (.text)) { *(.text) } +} diff --git a/ld/testsuite/ld-mips-elf/mips-elf.exp b/ld/testsuite/ld-mips-elf/mips-elf.exp index 71c8bcc..ce448cf 100644 --- a/ld/testsuite/ld-mips-elf/mips-elf.exp +++ b/ld/testsuite/ld-mips-elf/mips-elf.exp @@ -123,6 +123,31 @@ run_dump_test "mips16-1" # MIPS branch offset final link checking. run_dump_test "branch-misc-1" +# Jalx test +run_dump_test "jalx-1" + +if { $linux_gnu } { + run_ld_link_tests [list \ + [list "Dummy shared library for JALX test 2" \ + "-shared -nostdlib -melf32btsmip" \ + "-G0 -EB -mmicromips -no-mdebug -mabi=32 -march=mips32r2 -KPIC" \ + { jalx-2-printf.s } \ + {} \ + "libjalx-2.so"] \ + [list "Dummy external function for JALX test 2" \ + "-r -melf32btsmip" \ + "-G0 -EB -no-mdebug -mabi=32 -march=mips32r2 -mno-shared -call_nonpic" \ + { jalx-2-ex.s } \ + {} \ + "jalx-2-ex.o.r"] \ + [list "MIPS JALX test 2" \ + "-nostdlib -T jalx-2.ld tmpdir/libjalx-2.so tmpdir/jalx-2-ex.o.r -melf32btsmip" \ + "-G0 -EB -mmicromips -no-mdebug -mabi=32 -march=mips32r2 -mno-shared -call_nonpic" \ + { jalx-2-main.s } \ + { { objdump -d jalx-2.dd } } \ + "jalx-2"]] +} + # Test multi-got link. We only do this on GNU/Linux because it requires # the "traditional" emulations. if { $linux_gnu } { @@ -160,8 +185,10 @@ if $has_newabi { if { $linux_gnu } { run_dump_test "rel32-o32" - run_dump_test "rel32-n32" - run_dump_test "rel64" + if { $has_newabi } { + run_dump_test "rel32-n32" + run_dump_test "rel64" + } # The first test checks that a mixed PIC/non-PIC relocatable link # will not introduce any stubs itself, but will flag PIC functions # for the final link. @@ -296,6 +323,18 @@ if {$has_newabi} { } run_dump_test "reloc-4" run_dump_test "reloc-5" +if { $has_newabi } { + run_ld_link_tests { + {"reloc test 6a" "-shared" + "-n32" "reloc-6a.s" + {} + "reloc-6a.so"} + {"reloc test 6b" "tmpdir/reloc-6a.so" + "-n32" "reloc-6b.s" + {} + "reloc-6b"} + } +} if {$has_newabi && $linux_gnu} { run_dump_test "eh-frame1-n32" @@ -333,7 +372,9 @@ if {$has_newabi} { } if { $linux_gnu } { - run_dump_test "textrel-1" + if { $has_newabi } { + run_dump_test "textrel-1" + } run_dump_test "got-page-1" if $has_newabi { run_dump_test "got-page-2" @@ -533,3 +574,6 @@ if { $linux_gnu } { run_dump_test "jr-to-b-1" run_dump_test "jr-to-b-2" } + +# MIPS16 and microMIPS interlinking test. +run_dump_test "mips16-and-micromips" diff --git a/ld/testsuite/ld-mips-elf/mips16-and-micromips.d b/ld/testsuite/ld-mips-elf/mips16-and-micromips.d new file mode 100644 index 0000000..6d740fe --- /dev/null +++ b/ld/testsuite/ld-mips-elf/mips16-and-micromips.d @@ -0,0 +1,5 @@ +#name: MIPS16 and microMIPS interlink +#source: ../../../gas/testsuite/gas/mips/nop.s -mips16 +#source: ../../../gas/testsuite/gas/mips/nop.s -mmicromips +#ld: -e0 +#error: \A.*: .*\.o: ASE mismatch: linking microMIPS module with previous MIPS16 modules[\n\r]+.*: failed to merge target specific data of file .*\.o\Z diff --git a/ld/testsuite/ld-mips-elf/reloc-6a.s b/ld/testsuite/ld-mips-elf/reloc-6a.s new file mode 100644 index 0000000..4d84e83 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/reloc-6a.s @@ -0,0 +1,11 @@ + .globl us + .globl gs +us: +gs: +ls: + lw $4,%got_page(us)($gp) + addiu $4,$4,%got_ofst(us) + lw $4,%got_page(gs)($gp) + addiu $4,$4,%got_ofst(gs) + lw $4,%got_page(ls)($gp) + addiu $4,$4,%got_ofst(ls) diff --git a/ld/testsuite/ld-mips-elf/reloc-6b.s b/ld/testsuite/ld-mips-elf/reloc-6b.s new file mode 100644 index 0000000..aa2a726 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/reloc-6b.s @@ -0,0 +1,11 @@ + .globl __start + .globl gs +__start: +gs: +ls: + lw $4,%got_page(us)($gp) + addiu $4,$4,%got_ofst(us) + lw $4,%got_page(gs)($gp) + addiu $4,$4,%got_ofst(gs) + lw $4,%got_page(ls)($gp) + addiu $4,$4,%got_ofst(ls) diff --git a/ld/testsuite/ld-mmix/pr12815-1.d b/ld/testsuite/ld-mmix/pr12815-1.d new file mode 100644 index 0000000..41680b9 --- /dev/null +++ b/ld/testsuite/ld-mmix/pr12815-1.d @@ -0,0 +1,7 @@ +#as: -no-predefined-syms -x +#ld: -e 0x1000 -m elf64mmix -T $srcdir/$subdir/pr12815-1.ld +#error: invalid input relocation.*objcopy.*"-mno-base-addresses".*truncated + +# Check that we emit a meaningful error message rather than SEGV when +# someone attempts linking to the "binary" output format with +# -mbase-addresses in effect. diff --git a/ld/testsuite/ld-mmix/pr12815-1.ld b/ld/testsuite/ld-mmix/pr12815-1.ld new file mode 100644 index 0000000..1658cd3 --- /dev/null +++ b/ld/testsuite/ld-mmix/pr12815-1.ld @@ -0,0 +1,14 @@ +OUTPUT_FORMAT("binary") +ENTRY(start) +SECTIONS +{ + . = 0x8000000000100000; + .text : AT(ADDR(.text) - 0x8000000000100000) + { + *(.text) + *(.data) + *(.rodata*) + *(COMMON*) + *(.bss*) + } +} diff --git a/ld/testsuite/ld-mmix/pr12815-1.s b/ld/testsuite/ld-mmix/pr12815-1.s new file mode 100644 index 0000000..b03fa61 --- /dev/null +++ b/ld/testsuite/ld-mmix/pr12815-1.s @@ -0,0 +1,26 @@ +# 1 "m.c" +! mmixal:= 8H LOC Data_Section + .text ! mmixal:= 9H LOC 8B + .data ! mmixal:= 8H LOC 9B + .p2align 2 + LOC @+(4-@)&3 +foo IS @ + TETRA #2 + .text ! mmixal:= 9H LOC 8B + .p2align 2 + LOC @+(4-@)&3 + .global main +main IS @ + SUBU $254,$254,8 + STOU $253,$254,0 + ADDU $253,$254,8 + LDT $0,foo + ADDU $0,$0,1 + SET $0,$0 + STTU $0,foo + SETL $0,0 + LDO $253,$254,0 + ADDU $254,$254,8 + POP 1,0 + + .data ! mmixal:= 8H LOC 9B diff --git a/ld/testsuite/ld-mmix/pr12815-2.d b/ld/testsuite/ld-mmix/pr12815-2.d new file mode 100644 index 0000000..47966a3 --- /dev/null +++ b/ld/testsuite/ld-mmix/pr12815-2.d @@ -0,0 +1,7 @@ +#as: -no-predefined-syms -x +#ld: -e 0x1000 --defsym bar=0x100000000 -m elf64mmix -T $srcdir/$subdir/pr12815-1.ld +#error: invalid input relocation.*objcopy.*"-no-expand".*truncated + +# Check that we emit a meaningful error message rather than SEGV when +# someone attempts linking to the "binary" output format with +# expanding PUSHJ insns, expecting relaxation to work. diff --git a/ld/testsuite/ld-mmix/pr12815-2.s b/ld/testsuite/ld-mmix/pr12815-2.s new file mode 100644 index 0000000..16d9ad9 --- /dev/null +++ b/ld/testsuite/ld-mmix/pr12815-2.s @@ -0,0 +1,14 @@ +# 1 "m.c" +! mmixal:= 8H LOC Data_Section + .text ! mmixal:= 9H LOC 8B + .p2align 2 + LOC @+(4-@)&3 + .global main +main IS @ + GET $0,rJ + PUSHJ $1,bar + PUSHJ $1,bar + PUT rJ,$0 + POP 1,0 + + .data ! mmixal:= 8H LOC 9B diff --git a/ld/testsuite/ld-pe/cfi.d b/ld/testsuite/ld-pe/cfi.d new file mode 100644 index 0000000..6c5042b --- /dev/null +++ b/ld/testsuite/ld-pe/cfi.d @@ -0,0 +1,36 @@ +#source: cfia.s +#source: cfib.s +#ld: --file-align 1 --section-align 1 +#objdump: -Wf + +#... +00000004 00000014 ffffffff CIE + Version: 1 + Augmentation: "" + Code alignment factor: 1 + Data alignment factor: \-8 + Return address column: 32 + + DW_CFA_def_cfa: r7 \(rsp\) ofs 8 + DW_CFA_offset: r32 \(xmm15\) at cfa\-8 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + +0000001c 00000024 00000004 FDE cie=00000004 pc=.* + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa_offset: 16 + DW_CFA_offset: r6 \(rbp\) at cfa\-16 + DW_CFA_advance_loc: 4 to .* +^ DW_CFA_def_cfa: r7 \(rsp\) ofs 8 + DW_CFA_restore: r6 \(rbp\) + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop +#pass diff --git a/ld/testsuite/ld-pe/cfi32.d b/ld/testsuite/ld-pe/cfi32.d new file mode 100644 index 0000000..d13fb1a --- /dev/null +++ b/ld/testsuite/ld-pe/cfi32.d @@ -0,0 +1,28 @@ +#source: cfia.s +#source: cfib.s +#ld: --file-align 1 --section-align 1 +#objdump: -Wf + +#... +00000000 00000010 ffffffff CIE + Version: 1 + Augmentation: "" + Code alignment factor: 1 + Data alignment factor: \-4 + Return address column: 8 + + DW_CFA_def_cfa: r4 \(esp\) ofs 4 + DW_CFA_offset: r8 \(eip\) at cfa\-4 + DW_CFA_nop + DW_CFA_nop + +00000014 00000018 00000000 FDE cie=00000000 pc=.* + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa_offset: 16 + DW_CFA_offset: r6 \(esi\) at cfa\-16 + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa: r7 \(edi\) ofs 8 + DW_CFA_restore: r6 \(esi\) + DW_CFA_nop + DW_CFA_nop +#pass diff --git a/ld/testsuite/ld-pe/cfia.s b/ld/testsuite/ld-pe/cfia.s new file mode 100644 index 0000000..d1ea51d --- /dev/null +++ b/ld/testsuite/ld-pe/cfia.s @@ -0,0 +1,26 @@ + .globl _mainCRTStartup + .globl _start + .text +_mainCRTStartup: +mainCRTStartup: +_start: +start: + .long -1 + + .cfi_sections .debug_frame + .section .text$abc,"x" + .linkonce discard + .align 2 + .globl _tst + .def _tst; .scl 2; .type 32; .endef +_tst: + .cfi_startproc + .long 0 + .cfi_def_cfa_offset 16 + .cfi_offset 6, -16 + .long 1 + .cfi_def_cfa 7, 8 + .cfi_restore 6 + .long 2 + .cfi_endproc + diff --git a/ld/testsuite/ld-pe/cfib.s b/ld/testsuite/ld-pe/cfib.s new file mode 100644 index 0000000..9b761cf --- /dev/null +++ b/ld/testsuite/ld-pe/cfib.s @@ -0,0 +1,16 @@ + .cfi_sections .debug_frame + .section .text$abc,"x" + .linkonce discard + .align 2 + .globl _tst + .def _tst; .scl 2; .type 32; .endef +_tst: + .cfi_startproc + .long 0 + .cfi_def_cfa_offset 16 + .cfi_offset 6, -16 + .long 1 + .cfi_def_cfa 7, 8 + .cfi_restore 6 + .long 2 + .cfi_endproc diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp index 183c5c6..c72c3b1 100644 --- a/ld/testsuite/ld-pe/pe.exp +++ b/ld/testsuite/ld-pe/pe.exp @@ -77,6 +77,12 @@ run_dump_test "longsecn-5" run_dump_test "orphan" run_dump_test "orphan_nu" +if {[istarget x86_64-*-mingw*] } { + run_dump_test "cfi" +} elseif {[istarget i*86-*-cygwin*] || [istarget i*86-*-mingw*] } { + run_dump_test "cfi32" +} + set foreign_sym_test { {"non-C aligned common" "" "" {non-c-lang-syms.s} {{nm -C non-c-lang-syms.d}} "non-c-lang-syms.x"} diff --git a/ld/testsuite/ld-plugin/plugin-1.d b/ld/testsuite/ld-plugin/plugin-1.d index 0ce0794..49229f4 100644 --- a/ld/testsuite/ld-plugin/plugin-1.d +++ b/ld/testsuite/ld-plugin/plugin-1.d @@ -1,18 +1,19 @@ Hello from testplugin. -tv\[0\]: LDPT_MESSAGE func@0x.* -tv\[1\]: LDPT_API_VERSION value 0x1 \(1\) -tv\[2\]: LDPT_GNU_LD_VERSION value 0x.* -tv\[3\]: LDPT_LINKER_OUTPUT value 0x1 \(1\) -tv\[4\]: LDPT_OUTPUT_NAME 'tmpdir/main.x' -tv\[5\]: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* -tv\[6\]: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* -tv\[7\]: LDPT_REGISTER_CLEANUP_HOOK func@0x.* -tv\[8\]: LDPT_ADD_SYMBOLS func@0x.* -tv\[9\]: LDPT_GET_INPUT_FILE func@0x.* -tv\[10\]: LDPT_RELEASE_INPUT_FILE func@0x.* -tv\[11\]: LDPT_GET_SYMBOLS func@0x.* -tv\[12\]: LDPT_ADD_INPUT_FILE func@0x.* -tv\[13\]: LDPT_ADD_INPUT_LIBRARY func@0x.* -tv\[14\]: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* -tv\[15\]: LDPT_NULL value 0x0 \(0\) +.*: LDPT_MESSAGE func@0x.* +.*: LDPT_API_VERSION value 0x1 \(1\) +.*: LDPT_GNU_LD_VERSION value 0x.* +.*: LDPT_LINKER_OUTPUT value 0x1 \(1\) +.*: LDPT_OUTPUT_NAME 'tmpdir/main.x' +.*: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* +.*: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* +.*: LDPT_REGISTER_CLEANUP_HOOK func@0x.* +.*: LDPT_ADD_SYMBOLS func@0x.* +.*: LDPT_GET_INPUT_FILE func@0x.* +.*: LDPT_RELEASE_INPUT_FILE func@0x.* +.*: LDPT_GET_SYMBOLS func@0x.* +.*: LDPT_GET_SYMBOLS_V2 func@0x.* +.*: LDPT_ADD_INPUT_FILE func@0x.* +.*: LDPT_ADD_INPUT_LIBRARY func@0x.* +.*: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* +.*: LDPT_NULL value 0x0 \(0\) #... diff --git a/ld/testsuite/ld-plugin/plugin-10.d b/ld/testsuite/ld-plugin/plugin-10.d index 7e3c3bb..37c9d9d 100644 --- a/ld/testsuite/ld-plugin/plugin-10.d +++ b/ld/testsuite/ld-plugin/plugin-10.d @@ -1,28 +1,29 @@ Hello from testplugin. -tv\[0\]: LDPT_MESSAGE func@0x.* -tv\[1\]: LDPT_API_VERSION value 0x1 \(1\) -tv\[2\]: LDPT_GNU_LD_VERSION value 0x.* -tv\[3\]: LDPT_LINKER_OUTPUT value 0x1 \(1\) -tv\[4\]: LDPT_OUTPUT_NAME 'tmpdir/main.x' -tv\[5\]: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* -tv\[6\]: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* -tv\[7\]: LDPT_REGISTER_CLEANUP_HOOK func@0x.* -tv\[8\]: LDPT_ADD_SYMBOLS func@0x.* -tv\[9\]: LDPT_GET_INPUT_FILE func@0x.* -tv\[10\]: LDPT_RELEASE_INPUT_FILE func@0x.* -tv\[11\]: LDPT_GET_SYMBOLS func@0x.* -tv\[12\]: LDPT_ADD_INPUT_FILE func@0x.* -tv\[13\]: LDPT_ADD_INPUT_LIBRARY func@0x.* -tv\[14\]: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* -tv\[15\]: LDPT_OPTION 'registerclaimfile' -tv\[16\]: LDPT_OPTION 'registerallsymbolsread' -tv\[17\]: LDPT_OPTION 'registercleanup' -tv\[18\]: LDPT_OPTION 'claim:tmpdir/func.o' -tv\[19\]: LDPT_OPTION 'sym:_?func::0:0:0' -tv\[20\]: LDPT_OPTION 'sym:_?func2::0:0:0' -tv\[21\]: LDPT_OPTION 'dumpresolutions' -tv\[22\]: LDPT_OPTION 'add:tmpdir/func.o' -tv\[23\]: LDPT_NULL value 0x0 \(0\) +.*: LDPT_MESSAGE func@0x.* +.*: LDPT_API_VERSION value 0x1 \(1\) +.*: LDPT_GNU_LD_VERSION value 0x.* +.*: LDPT_LINKER_OUTPUT value 0x1 \(1\) +.*: LDPT_OUTPUT_NAME 'tmpdir/main.x' +.*: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* +.*: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* +.*: LDPT_REGISTER_CLEANUP_HOOK func@0x.* +.*: LDPT_ADD_SYMBOLS func@0x.* +.*: LDPT_GET_INPUT_FILE func@0x.* +.*: LDPT_RELEASE_INPUT_FILE func@0x.* +.*: LDPT_GET_SYMBOLS func@0x.* +.*: LDPT_GET_SYMBOLS_V2 func@0x.* +.*: LDPT_ADD_INPUT_FILE func@0x.* +.*: LDPT_ADD_INPUT_LIBRARY func@0x.* +.*: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* +.*: LDPT_OPTION 'registerclaimfile' +.*: LDPT_OPTION 'registerallsymbolsread' +.*: LDPT_OPTION 'registercleanup' +.*: LDPT_OPTION 'claim:tmpdir/func.o' +.*: LDPT_OPTION 'sym:_?func::0:0:0' +.*: LDPT_OPTION 'sym:_?func2::0:0:0' +.*: LDPT_OPTION 'dumpresolutions' +.*: LDPT_OPTION 'add:tmpdir/func.o' +.*: LDPT_NULL value 0x0 \(0\) #... hook called: claim_file tmpdir/main.o \[@0/.* not claimed hook called: claim_file tmpdir/func.o \[@0/.* CLAIMED diff --git a/ld/testsuite/ld-plugin/plugin-11.d b/ld/testsuite/ld-plugin/plugin-11.d index 927cffd..b920429 100644 --- a/ld/testsuite/ld-plugin/plugin-11.d +++ b/ld/testsuite/ld-plugin/plugin-11.d @@ -1,31 +1,32 @@ Hello from testplugin. -tv\[0\]: LDPT_MESSAGE func@0x.* -tv\[1\]: LDPT_API_VERSION value 0x1 \(1\) -tv\[2\]: LDPT_GNU_LD_VERSION value 0x.* -tv\[3\]: LDPT_LINKER_OUTPUT value 0x1 \(1\) -tv\[4\]: LDPT_OUTPUT_NAME 'tmpdir/main.x' -tv\[5\]: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* -tv\[6\]: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* -tv\[7\]: LDPT_REGISTER_CLEANUP_HOOK func@0x.* -tv\[8\]: LDPT_ADD_SYMBOLS func@0x.* -tv\[9\]: LDPT_GET_INPUT_FILE func@0x.* -tv\[10\]: LDPT_RELEASE_INPUT_FILE func@0x.* -tv\[11\]: LDPT_GET_SYMBOLS func@0x.* -tv\[12\]: LDPT_ADD_INPUT_FILE func@0x.* -tv\[13\]: LDPT_ADD_INPUT_LIBRARY func@0x.* -tv\[14\]: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* -tv\[15\]: LDPT_OPTION 'registerclaimfile' -tv\[16\]: LDPT_OPTION 'registerallsymbolsread' -tv\[17\]: LDPT_OPTION 'registercleanup' -tv\[18\]: LDPT_OPTION 'claim:tmpdir/func.o' -tv\[19\]: LDPT_OPTION 'sym:_?func::0:0:0' -tv\[20\]: LDPT_OPTION 'sym:_?func2::0:0:0' -tv\[21\]: LDPT_OPTION 'dumpresolutions' -tv\[22\]: LDPT_OPTION 'add:tmpdir/func.o' -tv\[23\]: LDPT_OPTION 'claim:tmpdir/libtext.a' -tv\[24\]: LDPT_OPTION 'sym:_?text::0:0:0' -tv\[25\]: LDPT_OPTION 'add:tmpdir/text.o' -tv\[26\]: LDPT_NULL value 0x0 \(0\) +.*: LDPT_MESSAGE func@0x.* +.*: LDPT_API_VERSION value 0x1 \(1\) +.*: LDPT_GNU_LD_VERSION value 0x.* +.*: LDPT_LINKER_OUTPUT value 0x1 \(1\) +.*: LDPT_OUTPUT_NAME 'tmpdir/main.x' +.*: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* +.*: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* +.*: LDPT_REGISTER_CLEANUP_HOOK func@0x.* +.*: LDPT_ADD_SYMBOLS func@0x.* +.*: LDPT_GET_INPUT_FILE func@0x.* +.*: LDPT_RELEASE_INPUT_FILE func@0x.* +.*: LDPT_GET_SYMBOLS func@0x.* +.*: LDPT_GET_SYMBOLS_V2 func@0x.* +.*: LDPT_ADD_INPUT_FILE func@0x.* +.*: LDPT_ADD_INPUT_LIBRARY func@0x.* +.*: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* +.*: LDPT_OPTION 'registerclaimfile' +.*: LDPT_OPTION 'registerallsymbolsread' +.*: LDPT_OPTION 'registercleanup' +.*: LDPT_OPTION 'claim:tmpdir/func.o' +.*: LDPT_OPTION 'sym:_?func::0:0:0' +.*: LDPT_OPTION 'sym:_?func2::0:0:0' +.*: LDPT_OPTION 'dumpresolutions' +.*: LDPT_OPTION 'add:tmpdir/func.o' +.*: LDPT_OPTION 'claim:tmpdir/libtext.a' +.*: LDPT_OPTION 'sym:_?text::0:0:0' +.*: LDPT_OPTION 'add:tmpdir/text.o' +.*: LDPT_NULL value 0x0 \(0\) #... hook called: claim_file tmpdir/main.o \[@0/.* not claimed hook called: claim_file tmpdir/func.o \[@0/.* CLAIMED diff --git a/ld/testsuite/ld-plugin/plugin-2.d b/ld/testsuite/ld-plugin/plugin-2.d index 677f8fb..0ce111f 100644 --- a/ld/testsuite/ld-plugin/plugin-2.d +++ b/ld/testsuite/ld-plugin/plugin-2.d @@ -1,21 +1,22 @@ Hello from testplugin. -tv\[0\]: LDPT_MESSAGE func@0x.* -tv\[1\]: LDPT_API_VERSION value 0x1 \(1\) -tv\[2\]: LDPT_GNU_LD_VERSION value 0x.* -tv\[3\]: LDPT_LINKER_OUTPUT value 0x1 \(1\) -tv\[4\]: LDPT_OUTPUT_NAME 'tmpdir/main.x' -tv\[5\]: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* -tv\[6\]: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* -tv\[7\]: LDPT_REGISTER_CLEANUP_HOOK func@0x.* -tv\[8\]: LDPT_ADD_SYMBOLS func@0x.* -tv\[9\]: LDPT_GET_INPUT_FILE func@0x.* -tv\[10\]: LDPT_RELEASE_INPUT_FILE func@0x.* -tv\[11\]: LDPT_GET_SYMBOLS func@0x.* -tv\[12\]: LDPT_ADD_INPUT_FILE func@0x.* -tv\[13\]: LDPT_ADD_INPUT_LIBRARY func@0x.* -tv\[14\]: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* -tv\[15\]: LDPT_OPTION 'failonload' -tv\[16\]: LDPT_NULL value 0x0 \(0\) +.*: LDPT_MESSAGE func@0x.* +.*: LDPT_API_VERSION value 0x1 \(1\) +.*: LDPT_GNU_LD_VERSION value 0x.* +.*: LDPT_LINKER_OUTPUT value 0x1 \(1\) +.*: LDPT_OUTPUT_NAME 'tmpdir/main.x' +.*: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* +.*: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* +.*: LDPT_REGISTER_CLEANUP_HOOK func@0x.* +.*: LDPT_ADD_SYMBOLS func@0x.* +.*: LDPT_GET_INPUT_FILE func@0x.* +.*: LDPT_RELEASE_INPUT_FILE func@0x.* +.*: LDPT_GET_SYMBOLS func@0x.* +.*: LDPT_GET_SYMBOLS_V2 func@0x.* +.*: LDPT_ADD_INPUT_FILE func@0x.* +.*: LDPT_ADD_INPUT_LIBRARY func@0x.* +.*: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* +.*: LDPT_OPTION 'failonload' +.*: LDPT_NULL value 0x0 \(0\) #... .*ld.*:.*ldtestplug.*: error loading plugin #... diff --git a/ld/testsuite/ld-plugin/plugin-3.d b/ld/testsuite/ld-plugin/plugin-3.d index 73aba1b..a4b6a7f 100644 --- a/ld/testsuite/ld-plugin/plugin-3.d +++ b/ld/testsuite/ld-plugin/plugin-3.d @@ -1,22 +1,23 @@ Hello from testplugin. -tv\[0\]: LDPT_MESSAGE func@0x.* -tv\[1\]: LDPT_API_VERSION value 0x1 \(1\) -tv\[2\]: LDPT_GNU_LD_VERSION value 0x.* -tv\[3\]: LDPT_LINKER_OUTPUT value 0x1 \(1\) -tv\[4\]: LDPT_OUTPUT_NAME 'tmpdir/main.x' -tv\[5\]: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* -tv\[6\]: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* -tv\[7\]: LDPT_REGISTER_CLEANUP_HOOK func@0x.* -tv\[8\]: LDPT_ADD_SYMBOLS func@0x.* -tv\[9\]: LDPT_GET_INPUT_FILE func@0x.* -tv\[10\]: LDPT_RELEASE_INPUT_FILE func@0x.* -tv\[11\]: LDPT_GET_SYMBOLS func@0x.* -tv\[12\]: LDPT_ADD_INPUT_FILE func@0x.* -tv\[13\]: LDPT_ADD_INPUT_LIBRARY func@0x.* -tv\[14\]: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* -tv\[15\]: LDPT_OPTION 'registerallsymbolsread' -tv\[16\]: LDPT_OPTION 'failallsymbolsread' -tv\[17\]: LDPT_NULL value 0x0 \(0\) +.*: LDPT_MESSAGE func@0x.* +.*: LDPT_API_VERSION value 0x1 \(1\) +.*: LDPT_GNU_LD_VERSION value 0x.* +.*: LDPT_LINKER_OUTPUT value 0x1 \(1\) +.*: LDPT_OUTPUT_NAME 'tmpdir/main.x' +.*: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* +.*: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* +.*: LDPT_REGISTER_CLEANUP_HOOK func@0x.* +.*: LDPT_ADD_SYMBOLS func@0x.* +.*: LDPT_GET_INPUT_FILE func@0x.* +.*: LDPT_RELEASE_INPUT_FILE func@0x.* +.*: LDPT_GET_SYMBOLS func@0x.* +.*: LDPT_GET_SYMBOLS_V2 func@0x.* +.*: LDPT_ADD_INPUT_FILE func@0x.* +.*: LDPT_ADD_INPUT_LIBRARY func@0x.* +.*: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* +.*: LDPT_OPTION 'registerallsymbolsread' +.*: LDPT_OPTION 'failallsymbolsread' +.*: LDPT_NULL value 0x0 \(0\) #... .*ld.*:.*ldtestplug.*: plugin reported error after all symbols read #... diff --git a/ld/testsuite/ld-plugin/plugin-4.d b/ld/testsuite/ld-plugin/plugin-4.d index 580cbac..e17565e 100644 --- a/ld/testsuite/ld-plugin/plugin-4.d +++ b/ld/testsuite/ld-plugin/plugin-4.d @@ -1,22 +1,23 @@ Hello from testplugin. -tv\[0\]: LDPT_MESSAGE func@0x.* -tv\[1\]: LDPT_API_VERSION value 0x1 \(1\) -tv\[2\]: LDPT_GNU_LD_VERSION value 0x.* -tv\[3\]: LDPT_LINKER_OUTPUT value 0x1 \(1\) -tv\[4\]: LDPT_OUTPUT_NAME 'tmpdir/main.x' -tv\[5\]: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* -tv\[6\]: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* -tv\[7\]: LDPT_REGISTER_CLEANUP_HOOK func@0x.* -tv\[8\]: LDPT_ADD_SYMBOLS func@0x.* -tv\[9\]: LDPT_GET_INPUT_FILE func@0x.* -tv\[10\]: LDPT_RELEASE_INPUT_FILE func@0x.* -tv\[11\]: LDPT_GET_SYMBOLS func@0x.* -tv\[12\]: LDPT_ADD_INPUT_FILE func@0x.* -tv\[13\]: LDPT_ADD_INPUT_LIBRARY func@0x.* -tv\[14\]: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* -tv\[15\]: LDPT_OPTION 'failcleanup' -tv\[16\]: LDPT_OPTION 'registercleanup' -tv\[17\]: LDPT_NULL value 0x0 \(0\) +.*: LDPT_MESSAGE func@0x.* +.*: LDPT_API_VERSION value 0x1 \(1\) +.*: LDPT_GNU_LD_VERSION value 0x.* +.*: LDPT_LINKER_OUTPUT value 0x1 \(1\) +.*: LDPT_OUTPUT_NAME 'tmpdir/main.x' +.*: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* +.*: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* +.*: LDPT_REGISTER_CLEANUP_HOOK func@0x.* +.*: LDPT_ADD_SYMBOLS func@0x.* +.*: LDPT_GET_INPUT_FILE func@0x.* +.*: LDPT_RELEASE_INPUT_FILE func@0x.* +.*: LDPT_GET_SYMBOLS func@0x.* +.*: LDPT_GET_SYMBOLS_V2 func@0x.* +.*: LDPT_ADD_INPUT_FILE func@0x.* +.*: LDPT_ADD_INPUT_LIBRARY func@0x.* +.*: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* +.*: LDPT_OPTION 'failcleanup' +.*: LDPT_OPTION 'registercleanup' +.*: LDPT_NULL value 0x0 \(0\) #... hook called: cleanup. .*ld.*:.*ldtestplug.*: error in plugin cleanup \(ignored\) diff --git a/ld/testsuite/ld-plugin/plugin-5.d b/ld/testsuite/ld-plugin/plugin-5.d index c0ffa66..c0c55c2 100644 --- a/ld/testsuite/ld-plugin/plugin-5.d +++ b/ld/testsuite/ld-plugin/plugin-5.d @@ -1,23 +1,24 @@ Hello from testplugin. -tv\[0\]: LDPT_MESSAGE func@0x.* -tv\[1\]: LDPT_API_VERSION value 0x1 \(1\) -tv\[2\]: LDPT_GNU_LD_VERSION value 0x.* -tv\[3\]: LDPT_LINKER_OUTPUT value 0x1 \(1\) -tv\[4\]: LDPT_OUTPUT_NAME 'tmpdir/main.x' -tv\[5\]: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* -tv\[6\]: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* -tv\[7\]: LDPT_REGISTER_CLEANUP_HOOK func@0x.* -tv\[8\]: LDPT_ADD_SYMBOLS func@0x.* -tv\[9\]: LDPT_GET_INPUT_FILE func@0x.* -tv\[10\]: LDPT_RELEASE_INPUT_FILE func@0x.* -tv\[11\]: LDPT_GET_SYMBOLS func@0x.* -tv\[12\]: LDPT_ADD_INPUT_FILE func@0x.* -tv\[13\]: LDPT_ADD_INPUT_LIBRARY func@0x.* -tv\[14\]: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* -tv\[15\]: LDPT_OPTION 'registerclaimfile' -tv\[16\]: LDPT_OPTION 'registerallsymbolsread' -tv\[17\]: LDPT_OPTION 'registercleanup' -tv\[18\]: LDPT_NULL value 0x0 \(0\) +.*: LDPT_MESSAGE func@0x.* +.*: LDPT_API_VERSION value 0x1 \(1\) +.*: LDPT_GNU_LD_VERSION value 0x.* +.*: LDPT_LINKER_OUTPUT value 0x1 \(1\) +.*: LDPT_OUTPUT_NAME 'tmpdir/main.x' +.*: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* +.*: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* +.*: LDPT_REGISTER_CLEANUP_HOOK func@0x.* +.*: LDPT_ADD_SYMBOLS func@0x.* +.*: LDPT_GET_INPUT_FILE func@0x.* +.*: LDPT_RELEASE_INPUT_FILE func@0x.* +.*: LDPT_GET_SYMBOLS func@0x.* +.*: LDPT_GET_SYMBOLS_V2 func@0x.* +.*: LDPT_ADD_INPUT_FILE func@0x.* +.*: LDPT_ADD_INPUT_LIBRARY func@0x.* +.*: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* +.*: LDPT_OPTION 'registerclaimfile' +.*: LDPT_OPTION 'registerallsymbolsread' +.*: LDPT_OPTION 'registercleanup' +.*: LDPT_NULL value 0x0 \(0\) #... hook called: claim_file tmpdir/main.o \[@0/.* hook called: claim_file tmpdir/func.o \[@0/.* diff --git a/ld/testsuite/ld-plugin/plugin-6.d b/ld/testsuite/ld-plugin/plugin-6.d index d107d29..f3e13fe 100644 --- a/ld/testsuite/ld-plugin/plugin-6.d +++ b/ld/testsuite/ld-plugin/plugin-6.d @@ -1,24 +1,25 @@ Hello from testplugin. -tv\[0\]: LDPT_MESSAGE func@0x.* -tv\[1\]: LDPT_API_VERSION value 0x1 \(1\) -tv\[2\]: LDPT_GNU_LD_VERSION value 0x.* -tv\[3\]: LDPT_LINKER_OUTPUT value 0x1 \(1\) -tv\[4\]: LDPT_OUTPUT_NAME 'tmpdir/main.x' -tv\[5\]: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* -tv\[6\]: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* -tv\[7\]: LDPT_REGISTER_CLEANUP_HOOK func@0x.* -tv\[8\]: LDPT_ADD_SYMBOLS func@0x.* -tv\[9\]: LDPT_GET_INPUT_FILE func@0x.* -tv\[10\]: LDPT_RELEASE_INPUT_FILE func@0x.* -tv\[11\]: LDPT_GET_SYMBOLS func@0x.* -tv\[12\]: LDPT_ADD_INPUT_FILE func@0x.* -tv\[13\]: LDPT_ADD_INPUT_LIBRARY func@0x.* -tv\[14\]: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* -tv\[15\]: LDPT_OPTION 'registerclaimfile' -tv\[16\]: LDPT_OPTION 'registerallsymbolsread' -tv\[17\]: LDPT_OPTION 'registercleanup' -tv\[18\]: LDPT_OPTION 'claim:tmpdir/func.o' -tv\[19\]: LDPT_NULL value 0x0 \(0\) +.*: LDPT_MESSAGE func@0x.* +.*: LDPT_API_VERSION value 0x1 \(1\) +.*: LDPT_GNU_LD_VERSION value 0x.* +.*: LDPT_LINKER_OUTPUT value 0x1 \(1\) +.*: LDPT_OUTPUT_NAME 'tmpdir/main.x' +.*: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* +.*: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* +.*: LDPT_REGISTER_CLEANUP_HOOK func@0x.* +.*: LDPT_ADD_SYMBOLS func@0x.* +.*: LDPT_GET_INPUT_FILE func@0x.* +.*: LDPT_RELEASE_INPUT_FILE func@0x.* +.*: LDPT_GET_SYMBOLS func@0x.* +.*: LDPT_GET_SYMBOLS_V2 func@0x.* +.*: LDPT_ADD_INPUT_FILE func@0x.* +.*: LDPT_ADD_INPUT_LIBRARY func@0x.* +.*: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* +.*: LDPT_OPTION 'registerclaimfile' +.*: LDPT_OPTION 'registerallsymbolsread' +.*: LDPT_OPTION 'registercleanup' +.*: LDPT_OPTION 'claim:tmpdir/func.o' +.*: LDPT_NULL value 0x0 \(0\) #... hook called: claim_file tmpdir/main.o \[@0/.* not claimed hook called: claim_file tmpdir/func.o \[@0/.* CLAIMED diff --git a/ld/testsuite/ld-plugin/plugin-7.d b/ld/testsuite/ld-plugin/plugin-7.d index 04f4139..357a89b 100644 --- a/ld/testsuite/ld-plugin/plugin-7.d +++ b/ld/testsuite/ld-plugin/plugin-7.d @@ -1,31 +1,32 @@ Hello from testplugin. -tv\[0\]: LDPT_MESSAGE func@0x.* -tv\[1\]: LDPT_API_VERSION value 0x1 \(1\) -tv\[2\]: LDPT_GNU_LD_VERSION value 0x.* -tv\[3\]: LDPT_LINKER_OUTPUT value 0x1 \(1\) -tv\[4\]: LDPT_OUTPUT_NAME 'tmpdir/main.x' -tv\[5\]: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* -tv\[6\]: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* -tv\[7\]: LDPT_REGISTER_CLEANUP_HOOK func@0x.* -tv\[8\]: LDPT_ADD_SYMBOLS func@0x.* -tv\[9\]: LDPT_GET_INPUT_FILE func@0x.* -tv\[10\]: LDPT_RELEASE_INPUT_FILE func@0x.* -tv\[11\]: LDPT_GET_SYMBOLS func@0x.* -tv\[12\]: LDPT_ADD_INPUT_FILE func@0x.* -tv\[13\]: LDPT_ADD_INPUT_LIBRARY func@0x.* -tv\[14\]: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* -tv\[15\]: LDPT_OPTION 'registerclaimfile' -tv\[16\]: LDPT_OPTION 'registerallsymbolsread' -tv\[17\]: LDPT_OPTION 'registercleanup' -tv\[18\]: LDPT_OPTION 'claim:tmpdir/func.o' -tv\[19\]: LDPT_OPTION 'sym:_?func::0:0:0' -tv\[20\]: LDPT_NULL value 0x0 \(0\) +.*: LDPT_MESSAGE func@0x.* +.*: LDPT_API_VERSION value 0x1 \(1\) +.*: LDPT_GNU_LD_VERSION value 0x.* +.*: LDPT_LINKER_OUTPUT value 0x1 \(1\) +.*: LDPT_OUTPUT_NAME 'tmpdir/main.x' +.*: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* +.*: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* +.*: LDPT_REGISTER_CLEANUP_HOOK func@0x.* +.*: LDPT_ADD_SYMBOLS func@0x.* +.*: LDPT_GET_INPUT_FILE func@0x.* +.*: LDPT_RELEASE_INPUT_FILE func@0x.* +.*: LDPT_GET_SYMBOLS func@0x.* +.*: LDPT_GET_SYMBOLS_V2 func@0x.* +.*: LDPT_ADD_INPUT_FILE func@0x.* +.*: LDPT_ADD_INPUT_LIBRARY func@0x.* +.*: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* +.*: LDPT_OPTION 'registerclaimfile' +.*: LDPT_OPTION 'registerallsymbolsread' +.*: LDPT_OPTION 'registercleanup' +.*: LDPT_OPTION 'claim:tmpdir/func.o' +.*: LDPT_OPTION 'sym:_?func::0:0:0' +.*: LDPT_NULL value 0x0 \(0\) #... hook called: claim_file tmpdir/main.o \[@0/.* not claimed hook called: claim_file tmpdir/func.o \[@0/.* CLAIMED hook called: claim_file tmpdir/text.o \[@0/.* not claimed #... hook called: all symbols read. -`func' referenced in section `\.text.*' of tmpdir/main.o: defined in discarded section .* +`_?func' referenced in section `\.text.*' of tmpdir/main.o: defined in discarded section .* hook called: cleanup. #... diff --git a/ld/testsuite/ld-plugin/plugin-8.d b/ld/testsuite/ld-plugin/plugin-8.d index 003537c..72c86c6 100644 --- a/ld/testsuite/ld-plugin/plugin-8.d +++ b/ld/testsuite/ld-plugin/plugin-8.d @@ -1,27 +1,28 @@ Hello from testplugin. -tv\[0\]: LDPT_MESSAGE func@0x.* -tv\[1\]: LDPT_API_VERSION value 0x1 \(1\) -tv\[2\]: LDPT_GNU_LD_VERSION value 0x.* -tv\[3\]: LDPT_LINKER_OUTPUT value 0x1 \(1\) -tv\[4\]: LDPT_OUTPUT_NAME 'tmpdir/main.x' -tv\[5\]: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* -tv\[6\]: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* -tv\[7\]: LDPT_REGISTER_CLEANUP_HOOK func@0x.* -tv\[8\]: LDPT_ADD_SYMBOLS func@0x.* -tv\[9\]: LDPT_GET_INPUT_FILE func@0x.* -tv\[10\]: LDPT_RELEASE_INPUT_FILE func@0x.* -tv\[11\]: LDPT_GET_SYMBOLS func@0x.* -tv\[12\]: LDPT_ADD_INPUT_FILE func@0x.* -tv\[13\]: LDPT_ADD_INPUT_LIBRARY func@0x.* -tv\[14\]: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* -tv\[15\]: LDPT_OPTION 'registerclaimfile' -tv\[16\]: LDPT_OPTION 'registerallsymbolsread' -tv\[17\]: LDPT_OPTION 'registercleanup' -tv\[18\]: LDPT_OPTION 'claim:tmpdir/func.o' -tv\[19\]: LDPT_OPTION 'sym:_?func::0:0:0' -tv\[20\]: LDPT_OPTION 'sym:_?func2::0:0:0' -tv\[21\]: LDPT_OPTION 'dumpresolutions' -tv\[22\]: LDPT_NULL value 0x0 \(0\) +.*: LDPT_MESSAGE func@0x.* +.*: LDPT_API_VERSION value 0x1 \(1\) +.*: LDPT_GNU_LD_VERSION value 0x.* +.*: LDPT_LINKER_OUTPUT value 0x1 \(1\) +.*: LDPT_OUTPUT_NAME 'tmpdir/main.x' +.*: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* +.*: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* +.*: LDPT_REGISTER_CLEANUP_HOOK func@0x.* +.*: LDPT_ADD_SYMBOLS func@0x.* +.*: LDPT_GET_INPUT_FILE func@0x.* +.*: LDPT_RELEASE_INPUT_FILE func@0x.* +.*: LDPT_GET_SYMBOLS func@0x.* +.*: LDPT_GET_SYMBOLS_V2 func@0x.* +.*: LDPT_ADD_INPUT_FILE func@0x.* +.*: LDPT_ADD_INPUT_LIBRARY func@0x.* +.*: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* +.*: LDPT_OPTION 'registerclaimfile' +.*: LDPT_OPTION 'registerallsymbolsread' +.*: LDPT_OPTION 'registercleanup' +.*: LDPT_OPTION 'claim:tmpdir/func.o' +.*: LDPT_OPTION 'sym:_?func::0:0:0' +.*: LDPT_OPTION 'sym:_?func2::0:0:0' +.*: LDPT_OPTION 'dumpresolutions' +.*: LDPT_NULL value 0x0 \(0\) #... hook called: claim_file tmpdir/main.o \[@0/.* not claimed hook called: claim_file tmpdir/func.o \[@0/.* CLAIMED @@ -30,6 +31,6 @@ hook called: claim_file tmpdir/text.o \[@0/.* not claimed hook called: all symbols read. Sym: '_?func' Resolution: LDPR_PREVAILING_DEF Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY -`func' referenced in section `\.text.*' of tmpdir/main.o: defined in discarded section .* +`_?func' referenced in section `\.text.*' of tmpdir/main.o: defined in discarded section .* hook called: cleanup. #... diff --git a/ld/testsuite/ld-plugin/plugin-9.d b/ld/testsuite/ld-plugin/plugin-9.d index b74f4a6..c2ebc6b 100644 --- a/ld/testsuite/ld-plugin/plugin-9.d +++ b/ld/testsuite/ld-plugin/plugin-9.d @@ -1,28 +1,29 @@ Hello from testplugin. -tv\[0\]: LDPT_MESSAGE func@0x.* -tv\[1\]: LDPT_API_VERSION value 0x1 \(1\) -tv\[2\]: LDPT_GNU_LD_VERSION value 0x.* -tv\[3\]: LDPT_LINKER_OUTPUT value 0x1 \(1\) -tv\[4\]: LDPT_OUTPUT_NAME 'tmpdir/main.x' -tv\[5\]: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* -tv\[6\]: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* -tv\[7\]: LDPT_REGISTER_CLEANUP_HOOK func@0x.* -tv\[8\]: LDPT_ADD_SYMBOLS func@0x.* -tv\[9\]: LDPT_GET_INPUT_FILE func@0x.* -tv\[10\]: LDPT_RELEASE_INPUT_FILE func@0x.* -tv\[11\]: LDPT_GET_SYMBOLS func@0x.* -tv\[12\]: LDPT_ADD_INPUT_FILE func@0x.* -tv\[13\]: LDPT_ADD_INPUT_LIBRARY func@0x.* -tv\[14\]: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* -tv\[15\]: LDPT_OPTION 'registerclaimfile' -tv\[16\]: LDPT_OPTION 'registerallsymbolsread' -tv\[17\]: LDPT_OPTION 'registercleanup' -tv\[18\]: LDPT_OPTION 'claim:tmpdir/func.o' -tv\[19\]: LDPT_OPTION 'sym:_?func::0:0:0' -tv\[20\]: LDPT_OPTION 'sym:_?func2::0:0:0' -tv\[21\]: LDPT_OPTION 'dumpresolutions' -tv\[22\]: LDPT_OPTION 'add:tmpdir/func.o' -tv\[23\]: LDPT_NULL value 0x0 \(0\) +.*: LDPT_MESSAGE func@0x.* +.*: LDPT_API_VERSION value 0x1 \(1\) +.*: LDPT_GNU_LD_VERSION value 0x.* +.*: LDPT_LINKER_OUTPUT value 0x1 \(1\) +.*: LDPT_OUTPUT_NAME 'tmpdir/main.x' +.*: LDPT_REGISTER_CLAIM_FILE_HOOK func@0x.* +.*: LDPT_REGISTER_ALL_SYMBOLS_READ_HOOK func@0x.* +.*: LDPT_REGISTER_CLEANUP_HOOK func@0x.* +.*: LDPT_ADD_SYMBOLS func@0x.* +.*: LDPT_GET_INPUT_FILE func@0x.* +.*: LDPT_RELEASE_INPUT_FILE func@0x.* +.*: LDPT_GET_SYMBOLS func@0x.* +.*: LDPT_GET_SYMBOLS_V2 func@0x.* +.*: LDPT_ADD_INPUT_FILE func@0x.* +.*: LDPT_ADD_INPUT_LIBRARY func@0x.* +.*: LDPT_SET_EXTRA_LIBRARY_PATH func@0x.* +.*: LDPT_OPTION 'registerclaimfile' +.*: LDPT_OPTION 'registerallsymbolsread' +.*: LDPT_OPTION 'registercleanup' +.*: LDPT_OPTION 'claim:tmpdir/func.o' +.*: LDPT_OPTION 'sym:_?func::0:0:0' +.*: LDPT_OPTION 'sym:_?func2::0:0:0' +.*: LDPT_OPTION 'dumpresolutions' +.*: LDPT_OPTION 'add:tmpdir/func.o' +.*: LDPT_NULL value 0x0 \(0\) #... hook called: claim_file tmpdir/main.o \[@0/.* not claimed hook called: claim_file tmpdir/func.o \[@0/.* CLAIMED diff --git a/ld/testsuite/ld-powerpc/powerpc.exp b/ld/testsuite/ld-powerpc/powerpc.exp index ef0a6e1..566272d 100644 --- a/ld/testsuite/ld-powerpc/powerpc.exp +++ b/ld/testsuite/ld-powerpc/powerpc.exp @@ -113,11 +113,11 @@ set ppcelftests { "tls32"} {"TLS32 helper shared library" "-shared -melf32ppc tmpdir/tlslib32.o" "" {} {} "libtlslib32.so"} - {"TLS32 dynamic exec" "-melf32ppc tmpdir/tls32.o tmpdir/libtlslib32.so" "" {} + {"TLS32 dynamic exec" "-melf32ppc --no-ld-generated-unwind-info tmpdir/tls32.o tmpdir/libtlslib32.so" "" {} {{readelf -WSsrl tlsexe32.r} {objdump -dr tlsexe32.d} {objdump -sj.got tlsexe32.g} {objdump -sj.tdata tlsexe32.t}} "tlsexe32"} - {"TLS32 shared" "-shared -melf32ppc tmpdir/tls32.o" "" {} + {"TLS32 shared" "-shared -melf32ppc --no-ld-generated-unwind-info tmpdir/tls32.o" "" {} {{readelf -WSsrl tlsso32.r} {objdump -dr tlsso32.d} {objdump -sj.got tlsso32.g} {objdump -sj.tdata tlsso32.t}} "tls32.so"} @@ -156,15 +156,15 @@ set ppc64elftests { {} "libtlslib.so"} {"TLS helper old shared lib" "-shared -melf64ppc" "-a64" {oldtlslib.s} {} "liboldlib.so"} - {"TLS dynamic exec" "-melf64ppc tmpdir/tls.o tmpdir/libtlslib.so" "" {} + {"TLS dynamic exec" "-melf64ppc --no-ld-generated-unwind-info tmpdir/tls.o tmpdir/libtlslib.so" "" {} {{readelf -WSsrl tlsexe.r} {objdump -dr tlsexe.d} {objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}} "tlsexe"} - {"TLS dynamic old" "-melf64ppc tmpdir/tls.o tmpdir/liboldlib.so" "" {} + {"TLS dynamic old" "-melf64ppc --no-ld-generated-unwind-info tmpdir/tls.o tmpdir/liboldlib.so" "" {} {{readelf -WSsrl tlsexe.r} {objdump -dr tlsexe.d} {objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}} "tlsexeold"} - {"TLS shared" "-shared -melf64ppc tmpdir/tls.o" "" {} + {"TLS shared" "-shared -melf64ppc --no-ld-generated-unwind-info tmpdir/tls.o" "" {} {{readelf -WSsrl tlsso.r} {objdump -dr tlsso.d} {objdump -sj.got tlsso.g} {objdump -sj.tdata tlsso.t}} "tls.so"} @@ -172,17 +172,17 @@ set ppc64elftests { {{objdump -dr tlstoc.d} {objdump -sj.got tlstoc.g} {objdump -sj.tdata tlstoc.t}} "tlstoc"} - {"TLSTOC dynamic exec" "-melf64ppc tmpdir/tlstoc.o tmpdir/libtlslib.so" + {"TLSTOC dynamic exec" "-melf64ppc --no-ld-generated-unwind-info tmpdir/tlstoc.o tmpdir/libtlslib.so" "" {} {{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetoc.d} {objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}} "tlsexetoc"} - {"TLSTOC dynamic old" "-melf64ppc tmpdir/tlstoc.o tmpdir/liboldlib.so" + {"TLSTOC dynamic old" "-melf64ppc --no-ld-generated-unwind-info tmpdir/tlstoc.o tmpdir/liboldlib.so" "" {} {{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetoc.d} {objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}} "tlsexetocold"} - {"TLSTOC shared" "-shared -melf64ppc tmpdir/tlstoc.o" "" {} + {"TLSTOC shared" "-shared -melf64ppc --no-ld-generated-unwind-info tmpdir/tlstoc.o" "" {} {{readelf -WSsrl tlstocso.r} {objdump -dr tlstocso.d} {objdump -sj.got tlstocso.g} {objdump -sj.tdata tlstocso.t}} "tlstoc.so"} @@ -204,7 +204,15 @@ set ppc64elftests { {"sym@tocbase" "-shared -melf64ppc" "-a64" {symtocbase-1.s symtocbase-2.s} {{objdump -dj.data symtocbase.d}} "symtocbase.so"} {"TOC opt" "-melf64ppc" "-a64" {tocopt.s} - {{objdump -s tocopt.d}} "tocopt"} + {{ld tocopt.out} {objdump -s tocopt.d}} "tocopt"} + {"TOC opt2" "-melf64ppc --defsym x=2" "-a64" {tocopt2.s} + {{ld tocopt2.out} {objdump -s tocopt2.d}} "tocopt2"} + {"TOC opt3" "-melf64ppc -no-keep-memory --defsym x=2" "-a64" {tocopt3.s} + {{objdump -s tocopt3.d}} "tocopt3"} + {"TOC opt4" "-melf64ppc -no-keep-memory --defsym x=2" "-a64" + {tocopt4a.s tocopt4b.s} {{objdump -s tocopt4.d}} "tocopt4"} + {"TOC opt5" "-melf64ppc" "-a64" {tocopt5.s} + {{objdump -s tocopt5.d}} "tocopt5"} } diff --git a/ld/testsuite/ld-powerpc/relbrlt.d b/ld/testsuite/ld-powerpc/relbrlt.d index 69321eb..0f0aae0 100644 --- a/ld/testsuite/ld-powerpc/relbrlt.d +++ b/ld/testsuite/ld-powerpc/relbrlt.d @@ -1,13 +1,13 @@ #source: relbrlt.s #as: -a64 -#ld: -melf64ppc --emit-relocs +#ld: -melf64ppc --no-ld-generated-unwind-info --emit-relocs #objdump: -Dr .*: file format elf64-powerpc Disassembly of section \.text: -0*100000b0 <_start>: +0*100000c0 <_start>: [0-9a-f ]*: 49 bf 00 2d bl .* [0-9a-f ]*: R_PPC64_REL24 \.text\+0x37e003c [0-9a-f ]*: 60 00 00 00 nop @@ -23,38 +23,38 @@ Disassembly of section \.text: [0-9a-f ]*<.*plt_branch.*>: [0-9a-f ]*: e9 62 80 00 ld r11,-32768\(r2\) -[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00d8 +[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00e8 [0-9a-f ]*: 7d 69 03 a6 mtctr r11 [0-9a-f ]*: 4e 80 04 20 bctr [0-9a-f ]*<.*long_branch.*>: [0-9a-f ]*: 49 bf 00 10 b .* -[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00ec +[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00fc [0-9a-f ]*<.*plt_branch.*>: [0-9a-f ]*: e9 62 80 08 ld r11,-32760\(r2\) -[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00e0 +[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00f0 [0-9a-f ]*: 7d 69 03 a6 mtctr r11 [0-9a-f ]*: 4e 80 04 20 bctr \.\.\. -0*137e00ec : +0*137e00fc : [0-9a-f ]*: 4e 80 00 20 blr \.\.\. -0*13bf00d0 : +0*13bf00e0 : [0-9a-f ]*: 4e 80 00 20 blr \.\.\. -0*157e00d4 : +0*157e00e4 : [0-9a-f ]*: 4e 80 00 20 blr Disassembly of section \.branch_lt: -0*157f00d8 <\.branch_lt>: +0*157f00e8 <\.branch_lt>: [0-9a-f ]*: 00 00 00 00 .* -[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00d0 -[0-9a-f ]*: 13 bf 00 d0 .* +[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00e0 +[0-9a-f ]*: 13 bf 00 e0 .* [0-9a-f ]*: 00 00 00 00 .* -[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00d4 -[0-9a-f ]*: 15 7e 00 d4 .* +[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00e4 +[0-9a-f ]*: 15 7e 00 e4 .* diff --git a/ld/testsuite/ld-powerpc/tlsexe.d b/ld/testsuite/ld-powerpc/tlsexe.d index 54db23d..aa1595e 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.d +++ b/ld/testsuite/ld-powerpc/tlsexe.d @@ -21,7 +21,6 @@ Disassembly of section \.text: .* f8 41 00 28 std r2,40\(r1\) .* e9 62 80 48 ld r11,-32696\(r2\) .* 7d 69 03 a6 mtctr r11 -.* e9 62 80 58 ld r11,-32680\(r2\) .* e8 42 80 50 ld r2,-32688\(r2\) .* 4e 80 04 21 bctrl .* e9 61 00 20 ld r11,32\(r1\) @@ -34,7 +33,7 @@ Disassembly of section \.text: .* 60 00 00 00 nop .* 7c 63 6a 14 add r3,r3,r13 .* 38 62 80 18 addi r3,r2,-32744 -.* 4b ff ff a5 bl .* +.* 4b ff ff a9 bl .* .* 60 00 00 00 nop .* 3c 6d 00 00 addis r3,r13,0 .* 60 00 00 00 nop @@ -68,7 +67,6 @@ Disassembly of section \.text: .* e9 4d 90 2a lwa r10,-28632\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* a9 49 90 30 lha r10,-28624\(r9\) -.* 60 00 00 00 nop .* 00 00 00 00 .* .* 00 01 02 00 .* .* <__glink_PLTresolve>: diff --git a/ld/testsuite/ld-powerpc/tlsexe.g b/ld/testsuite/ld-powerpc/tlsexe.g index c68175f..4fc913a 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.g +++ b/ld/testsuite/ld-powerpc/tlsexe.g @@ -7,6 +7,6 @@ .*: +file format elf64-powerpc Contents of section \.got: -.* 00000000 10018618 ffffffff ffff8018 .* +.* 00000000 10018620 ffffffff ffff8018 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-powerpc/tlsexe.r b/ld/testsuite/ld-powerpc/tlsexe.r index 68b36bb..fa67483 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.r +++ b/ld/testsuite/ld-powerpc/tlsexe.r @@ -16,11 +16,10 @@ Section Headers: +\[[ 0-9]+\] \.dynstr +.* +\[[ 0-9]+\] \.rela\.dyn +.* +\[[ 0-9]+\] \.rela\.plt +.* - +\[[ 0-9]+\] \.text +PROGBITS .* 0+130 0+ +AX +0 +0 +8 + +\[[ 0-9]+\] \.text +PROGBITS .* 0+128 0+ +AX +0 +0 +32 +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8 - +\[[ 0-9]+\] \.branch_lt + PROGBITS .* 0+ 0+ +WA +0 +0 +8 +\[[ 0-9]+\] \.got +PROGBITS .* 0+30 08 +WA +0 +0 +8 +\[[ 0-9]+\] \.plt +.* +\[[ 0-9]+\] \.shstrtab +.* @@ -47,7 +46,7 @@ Program Headers: +0+ + +01 +\.interp +02 +\.interp \.hash \.dynsym \.dynstr \.rela\.dyn \.rela\.plt \.text - +03 +\.tdata \.dynamic (\.branch_lt |)\.got \.plt + +03 +\.tdata \.dynamic \.got \.plt +04 +\.dynamic +05 +\.tdata \.tbss @@ -87,7 +86,6 @@ Symbol table '\.symtab' contains [0-9]+ entries: .* SECTION +LOCAL +DEFAULT +10 .* SECTION +LOCAL +DEFAULT +11 .* SECTION +LOCAL +DEFAULT +12 -.* SECTION +LOCAL +DEFAULT +13 .* TLS +LOCAL +DEFAULT +8 gd4 .* TLS +LOCAL +DEFAULT +8 ld4 .* TLS +LOCAL +DEFAULT +8 ld5 diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d index 8354e2d..2b8ce24 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.d +++ b/ld/testsuite/ld-powerpc/tlsexetoc.d @@ -21,7 +21,6 @@ Disassembly of section \.text: .* f8 41 00 28 std r2,40\(r1\) .* e9 62 80 70 ld r11,-32656\(r2\) .* 7d 69 03 a6 mtctr r11 -.* e9 62 80 80 ld r11,-32640\(r2\) .* e8 42 80 78 ld r2,-32648\(r2\) .* 4e 80 04 21 bctrl .* e9 61 00 20 ld r11,32\(r1\) @@ -31,10 +30,10 @@ Disassembly of section \.text: .* <_start>: .* 38 62 80 08 addi r3,r2,-32760 -.* 4b ff ff b1 bl .* +.* 4b ff ff b5 bl .* .* 60 00 00 00 nop .* 38 62 80 18 addi r3,r2,-32744 -.* 4b ff ff a5 bl .* +.* 4b ff ff a9 bl .* .* 60 00 00 00 nop .* 3c 6d 00 00 addis r3,r13,0 .* 60 00 00 00 nop @@ -52,7 +51,6 @@ Disassembly of section \.text: .* 89 4d 90 60 lbz r10,-28576\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* 99 49 90 68 stb r10,-28568\(r9\) -.* 60 00 00 00 nop .* 00 00 00 00 .* .* 00 01 02 28 .* .* <__glink_PLTresolve>: diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.g b/ld/testsuite/ld-powerpc/tlsexetoc.g index 387e9cd..556b216 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.g +++ b/ld/testsuite/ld-powerpc/tlsexetoc.g @@ -7,7 +7,7 @@ .*: +file format elf64-powerpc Contents of section \.got: -.* 00000000 100185b0 00000000 00000000 .* +.* 00000000 100185c0 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000001 .* .* 00000000 00000000 00000000 00000001 .* diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.r b/ld/testsuite/ld-powerpc/tlsexetoc.r index 8ba8503..6af3e98 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.r +++ b/ld/testsuite/ld-powerpc/tlsexetoc.r @@ -16,11 +16,10 @@ Section Headers: +\[[ 0-9]+\] \.dynstr +.* +\[[ 0-9]+\] \.rela\.dyn +.* +\[[ 0-9]+\] \.rela\.plt +.* - +\[[ 0-9]+\] \.text +PROGBITS .* 0+f0 0+ +AX +0 +0 +8 + +\[[ 0-9]+\] \.text +PROGBITS .* 0+e8 0+ +AX +0 +0 +32 +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8 - +\[[ 0-9]+\] \.branch_lt +PROGBITS .* 0+ 0+ +WA +0 +0 +8 +\[[ 0-9]+\] \.got +PROGBITS .* 0+58 08 +WA +0 +0 +8 +\[[ 0-9]+\] \.plt +.* +\[[ 0-9]+\] \.shstrtab +.* @@ -47,7 +46,7 @@ Program Headers: +0+ + +01 +\.interp +02 +\.interp \.hash \.dynsym \.dynstr \.rela\.dyn \.rela\.plt \.text - +03 +\.tdata \.dynamic (\.branch_lt |)\.got \.plt + +03 +\.tdata \.dynamic \.got \.plt +04 +\.dynamic +05 +\.tdata \.tbss @@ -86,7 +85,6 @@ Symbol table '\.symtab' contains [0-9]+ entries: .* SECTION +LOCAL +DEFAULT +10 .* SECTION +LOCAL +DEFAULT +11 .* SECTION +LOCAL +DEFAULT +12 -.* SECTION +LOCAL +DEFAULT +13 .* TLS +LOCAL +DEFAULT +8 gd4 .* TLS +LOCAL +DEFAULT +8 ld4 .* TLS +LOCAL +DEFAULT +8 ld5 @@ -94,7 +92,7 @@ Symbol table '\.symtab' contains [0-9]+ entries: .* TLS +LOCAL +DEFAULT +8 ie4 .* TLS +LOCAL +DEFAULT +8 le4 .* TLS +LOCAL +DEFAULT +8 le5 -.* NOTYPE +LOCAL +DEFAULT +12 \.Lie0 +.* NOTYPE +LOCAL +DEFAULT +11 \.Lie0 .* OBJECT +LOCAL +DEFAULT +10 _DYNAMIC .* (NOTYPE +LOCAL +DEFAULT +7 00000010\.plt_call\.__tls_get_addr(|_opt)\+0|(FUNC|NOTYPE) +LOCAL +DEFAULT +UND \.__tls_get_addr(|_opt)) .* (NOTYPE +LOCAL +DEFAULT +7 __glink_PLTresolve|NOTYPE +LOCAL +DEFAULT +7 00000010\.plt_call\.__tls_get_addr(|_opt)\+0) diff --git a/ld/testsuite/ld-powerpc/tlsso.d b/ld/testsuite/ld-powerpc/tlsso.d index 4a3b045..a5d28e5 100644 --- a/ld/testsuite/ld-powerpc/tlsso.d +++ b/ld/testsuite/ld-powerpc/tlsso.d @@ -12,22 +12,21 @@ Disassembly of section \.text: .* f8 41 00 28 std r2,40\(r1\) .* e9 62 80 78 ld r11,-32648\(r2\) .* 7d 69 03 a6 mtctr r11 -.* e9 62 80 88 ld r11,-32632\(r2\) .* e8 42 80 80 ld r2,-32640\(r2\) .* 4e 80 04 20 bctr .* <_start>: .* 38 62 80 20 addi r3,r2,-32736 -.* 4b ff ff e5 bl .* +.* 4b ff ff e9 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 50 addi r3,r2,-32688 -.* 4b ff ff d9 bl .* +.* 4b ff ff dd bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 38 addi r3,r2,-32712 -.* 4b ff ff cd bl .* +.* 4b ff ff d1 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 50 addi r3,r2,-32688 -.* 4b ff ff c1 bl .* +.* 4b ff ff c5 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 39 23 80 40 addi r9,r3,-32704 .* 3d 23 00 00 addis r9,r3,0 @@ -40,10 +39,10 @@ Disassembly of section \.text: .* 3d 2d 00 00 addis r9,r13,0 .* 99 49 00 00 stb r10,0\(r9\) .* 38 62 80 08 addi r3,r2,-32760 -.* 4b ff ff 8d bl .* +.* 4b ff ff 91 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 50 addi r3,r2,-32688 -.* 4b ff ff 81 bl .* +.* 4b ff ff 85 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* f9 43 80 08 std r10,-32760\(r3\) .* 3d 23 00 00 addis r9,r3,0 @@ -55,6 +54,7 @@ Disassembly of section \.text: .* e9 4d 00 02 lwa r10,0\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* a9 49 00 00 lha r10,0\(r9\) +.* 60 00 00 00 nop .* 00 00 00 00 .* .* 00 01 02 20 .* .* <__glink_PLTresolve>: diff --git a/ld/testsuite/ld-powerpc/tlsso.g b/ld/testsuite/ld-powerpc/tlsso.g index 330cb18..82ccc8d 100644 --- a/ld/testsuite/ld-powerpc/tlsso.g +++ b/ld/testsuite/ld-powerpc/tlsso.g @@ -7,7 +7,7 @@ .*: +file format elf64-powerpc Contents of section \.got: -.* 00000000 00018778 00000000 00000000 .* +.* 00000000 00018780 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-powerpc/tlsso.r b/ld/testsuite/ld-powerpc/tlsso.r index 99c3659..4167b3a 100644 --- a/ld/testsuite/ld-powerpc/tlsso.r +++ b/ld/testsuite/ld-powerpc/tlsso.r @@ -18,7 +18,6 @@ Section Headers: +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.dynamic .* - +\[[ 0-9]+\] \.branch_lt .* +\[[ 0-9]+\] \.got .* +\[[ 0-9]+\] \.plt .* +\[[ 0-9]+\] \.shstrtab .* @@ -40,7 +39,7 @@ Program Headers: Section to Segment mapping: +Segment Sections\.\.\. +0+ +\.hash \.dynsym \.dynstr \.rela\.dyn \.rela\.plt \.text - +01 +\.tdata \.dynamic (\.branch_lt |)\.got \.plt + +01 +\.tdata \.dynamic .got \.plt +02 +\.dynamic +03 +\.tdata \.tbss @@ -49,9 +48,9 @@ Relocation section '\.rela\.dyn' at offset .* contains 16 entries: [0-9a-f ]+R_PPC64_TPREL16 +0+60 le0 \+ 0 [0-9a-f ]+R_PPC64_TPREL16_HA +0+68 le1 \+ 0 [0-9a-f ]+R_PPC64_TPREL16_LO +0+68 le1 \+ 0 -[0-9a-f ]+R_PPC64_TPREL16_DS +0+105f0 \.tdata \+ 28 -[0-9a-f ]+R_PPC64_TPREL16_HA +0+105f0 \.tdata \+ 30 -[0-9a-f ]+R_PPC64_TPREL16_LO +0+105f0 \.tdata \+ 30 +[0-9a-f ]+R_PPC64_TPREL16_DS +0+105f8 \.tdata \+ 28 +[0-9a-f ]+R_PPC64_TPREL16_HA +0+105f8 \.tdata \+ 30 +[0-9a-f ]+R_PPC64_TPREL16_LO +0+105f8 \.tdata \+ 30 [0-9a-f ]+R_PPC64_DTPMOD64 +0+ [0-9a-f ]+R_PPC64_DTPREL64 +0+ [0-9a-f ]+R_PPC64_DTPREL64 +0+18 @@ -101,7 +100,6 @@ Symbol table '\.symtab' contains [0-9]+ entries: .* SECTION +LOCAL +DEFAULT +9 .* SECTION +LOCAL +DEFAULT +10 .* SECTION +LOCAL +DEFAULT +11 -.* SECTION +LOCAL +DEFAULT +12 .* TLS +LOCAL +DEFAULT +7 gd4 .* TLS +LOCAL +DEFAULT +7 ld4 .* TLS +LOCAL +DEFAULT +7 ld5 diff --git a/ld/testsuite/ld-powerpc/tlstocso.d b/ld/testsuite/ld-powerpc/tlstocso.d index 0b84311..cf9cd08 100644 --- a/ld/testsuite/ld-powerpc/tlstocso.d +++ b/ld/testsuite/ld-powerpc/tlstocso.d @@ -12,22 +12,21 @@ Disassembly of section \.text: .* f8 41 00 28 std r2,40\(r1\) .* e9 62 80 70 ld r11,-32656\(r2\) .* 7d 69 03 a6 mtctr r11 -.* e9 62 80 80 ld r11,-32640\(r2\) .* e8 42 80 78 ld r2,-32648\(r2\) .* 4e 80 04 20 bctr .* <_start>: .* 38 62 80 08 addi r3,r2,-32760 -.* 4b ff ff e5 bl .* +.* 4b ff ff e9 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 18 addi r3,r2,-32744 -.* 4b ff ff d9 bl .* +.* 4b ff ff dd bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 28 addi r3,r2,-32728 -.* 4b ff ff cd bl .* +.* 4b ff ff d1 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 38 addi r3,r2,-32712 -.* 4b ff ff c1 bl .* +.* 4b ff ff c5 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 39 23 80 40 addi r9,r3,-32704 .* 3d 23 00 00 addis r9,r3,0 @@ -39,6 +38,7 @@ Disassembly of section \.text: .* 89 4d 00 00 lbz r10,0\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* 99 49 00 00 stb r10,0\(r9\) +.* 60 00 00 00 nop .* 00 00 00 00 .* .* 00 01 02 18 .* .* <__glink_PLTresolve>: diff --git a/ld/testsuite/ld-powerpc/tlstocso.r b/ld/testsuite/ld-powerpc/tlstocso.r index d04cf70..040d69f 100644 --- a/ld/testsuite/ld-powerpc/tlstocso.r +++ b/ld/testsuite/ld-powerpc/tlstocso.r @@ -18,7 +18,6 @@ Section Headers: +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.dynamic .* - +\[[ 0-9]+\] \.branch_lt .* +\[[ 0-9]+\] \.got .* +\[[ 0-9]+\] \.plt .* +\[[ 0-9]+\] \.shstrtab .* @@ -40,7 +39,7 @@ Program Headers: Section to Segment mapping: +Segment Sections\.\.\. +0+ +\.hash \.dynsym \.dynstr \.rela\.dyn \.rela\.plt \.text - +01 +\.tdata \.dynamic (\.branch_lt |)\.got \.plt + +01 +\.tdata \.dynamic \.got \.plt +02 +\.dynamic +03 +\.tdata \.tbss @@ -96,7 +95,6 @@ Symbol table '\.symtab' contains [0-9]+ entries: .* SECTION +LOCAL +DEFAULT +9 .* SECTION +LOCAL +DEFAULT +10 .* SECTION +LOCAL +DEFAULT +11 -.* SECTION +LOCAL +DEFAULT +12 .* TLS +LOCAL +DEFAULT +7 gd4 .* TLS +LOCAL +DEFAULT +7 ld4 .* TLS +LOCAL +DEFAULT +7 ld5 @@ -104,7 +102,7 @@ Symbol table '\.symtab' contains [0-9]+ entries: .* TLS +LOCAL +DEFAULT +7 ie4 .* TLS +LOCAL +DEFAULT +7 le4 .* TLS +LOCAL +DEFAULT +7 le5 -.* NOTYPE +LOCAL +DEFAULT +11 \.Lie0 +.* NOTYPE +LOCAL +DEFAULT +10 \.Lie0 .* OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC .* NOTYPE +LOCAL +DEFAULT +6 00000010\.plt_call\.__tls_get_addr\+0 .* NOTYPE +LOCAL +DEFAULT +6 __glink_PLTresolve diff --git a/ld/testsuite/ld-powerpc/tocopt.d b/ld/testsuite/ld-powerpc/tocopt.d index 9168661..f447f70 100644 --- a/ld/testsuite/ld-powerpc/tocopt.d +++ b/ld/testsuite/ld-powerpc/tocopt.d @@ -2,10 +2,10 @@ .*: file format .* Contents of section \.text: - 100000b0 60000000 e9228018 60000000 38a28020 .* - 100000c0 e8c50000 60000000 3ba08028 7c62e82a .* - 100000d0 60000000 39228033 60000000 38a28008 .* - 100000e0 e8c50000 60000000 3ba08010 7c62e82a .* + 100000b0 3d220000 e9298018 3c820000 38a48020 .* + 100000c0 e8c50000 3fa00000 3bbd8028 7c62e82a .* + 100000d0 3d220000 39298033 3c820000 38a48008 .* + 100000e0 e8c50000 3fa00000 3bbd8010 7c62e82a .* Contents of section \.got: 100100f0 00000000 100180f0 00000000 10010124 .* 10010100 00000000 10010125 00000000 10010120 .* diff --git a/ld/testsuite/ld-powerpc/tocopt.out b/ld/testsuite/ld-powerpc/tocopt.out new file mode 100644 index 0000000..6df909f --- /dev/null +++ b/ld/testsuite/ld-powerpc/tocopt.out @@ -0,0 +1,4 @@ +.* +\(\.text\+0x14\): .* 0x3fa00000 .* +.* +\(\.text\+0x34\): .* 0x3fa00010 .* diff --git a/ld/testsuite/ld-powerpc/tocopt2.d b/ld/testsuite/ld-powerpc/tocopt2.d new file mode 100644 index 0000000..174af27 --- /dev/null +++ b/ld/testsuite/ld-powerpc/tocopt2.d @@ -0,0 +1,5 @@ + +.*: file format .* + +Contents of section \.text: + 100000b0 3d22effe 39297f4a .* diff --git a/ld/testsuite/ld-powerpc/tocopt2.out b/ld/testsuite/ld-powerpc/tocopt2.out new file mode 100644 index 0000000..9f29071 --- /dev/null +++ b/ld/testsuite/ld-powerpc/tocopt2.out @@ -0,0 +1 @@ +.*: xt defined on removed toc entry diff --git a/ld/testsuite/ld-powerpc/tocopt2.s b/ld/testsuite/ld-powerpc/tocopt2.s new file mode 100644 index 0000000..8d07de0 --- /dev/null +++ b/ld/testsuite/ld-powerpc/tocopt2.s @@ -0,0 +1,10 @@ + .globl xt + .section .toc,"aw" +xt: + .quad x + + .globl _start + .text +_start: + addis 9,2,xt@toc@ha + ld 9,xt@toc@l(9) diff --git a/ld/testsuite/ld-powerpc/tocopt3.d b/ld/testsuite/ld-powerpc/tocopt3.d new file mode 100644 index 0000000..174af27 --- /dev/null +++ b/ld/testsuite/ld-powerpc/tocopt3.d @@ -0,0 +1,5 @@ + +.*: file format .* + +Contents of section \.text: + 100000b0 3d22effe 39297f4a .* diff --git a/ld/testsuite/ld-powerpc/tocopt3.s b/ld/testsuite/ld-powerpc/tocopt3.s new file mode 100644 index 0000000..abadbfa --- /dev/null +++ b/ld/testsuite/ld-powerpc/tocopt3.s @@ -0,0 +1,9 @@ + .section .toc,"aw" +0: + .quad x + + .globl _start + .text +_start: + addis 9,2,0b@toc@ha + ld 9,0b@toc@l(9) diff --git a/ld/testsuite/ld-powerpc/tocopt4.d b/ld/testsuite/ld-powerpc/tocopt4.d new file mode 100644 index 0000000..4f450e4 --- /dev/null +++ b/ld/testsuite/ld-powerpc/tocopt4.d @@ -0,0 +1,7 @@ + +.*: file format .* + +Contents of section \.text: + 100000b0 e9298000 .* +Contents of section \.got: + 100100b8 00000000 00000002 .* diff --git a/ld/testsuite/ld-powerpc/tocopt4a.s b/ld/testsuite/ld-powerpc/tocopt4a.s new file mode 100644 index 0000000..3d6f28e --- /dev/null +++ b/ld/testsuite/ld-powerpc/tocopt4a.s @@ -0,0 +1,4 @@ + .globl _start + .text +_start: + ld 9,xt@toc(9) diff --git a/ld/testsuite/ld-powerpc/tocopt4b.s b/ld/testsuite/ld-powerpc/tocopt4b.s new file mode 100644 index 0000000..ee77d10 --- /dev/null +++ b/ld/testsuite/ld-powerpc/tocopt4b.s @@ -0,0 +1,17 @@ + .section .toc,"aw" + .globl xt +xt: + .quad x +# +# This testcase will fail with a warning "xt defined on removed toc entry" +# if a large-toc access like the following is added to this file, because +# toc analysis only considers toc accesses from the current object file. +# The small-toc access from tocopt4a.s doesn't cause xt entry to be marked +# !can_optimize. The testcase only passes because toc analysis considers +# *no* access from the current file as being sufficiently unusual to +# warrant keeping the toc entry. So, if you use global symbols on toc +# entries, don't mix code models. +# +# .text +# addis 9,2,xt@toc@ha +# ld 9,xt@toc@l(9) diff --git a/ld/testsuite/ld-powerpc/tocopt5.d b/ld/testsuite/ld-powerpc/tocopt5.d new file mode 100644 index 0000000..8f03c07 --- /dev/null +++ b/ld/testsuite/ld-powerpc/tocopt5.d @@ -0,0 +1,13 @@ + +.*: file format .* + +Contents of section \.text: + 100000b0 60000000 e9228018 60000000 38a28020 .* + 100000c0 e8c50000 60000000 3922802b 60000000 .* + 100000d0 38a28008 e8c50000 .* +Contents of section \.got: + 100100d8 00000000 100180d8 00000000 10010104 .* + 100100e8 00000000 10010105 00000000 10010100 .* + 100100f8 00000000 10010101 .* +Contents of section \.sdata: + 10010100 01020304 0506 .* diff --git a/ld/testsuite/ld-powerpc/tocopt5.s b/ld/testsuite/ld-powerpc/tocopt5.s new file mode 100644 index 0000000..67da1a9 --- /dev/null +++ b/ld/testsuite/ld-powerpc/tocopt5.s @@ -0,0 +1,43 @@ + .section .toc,"aw" +x4t: + .quad x4 +x5t: + .quad x5 +x6t: + .quad x6 + + .section .sdata,"aw" +x1: + .byte 1 +x2: + .byte 2 +x3: + .byte 3 +x4: + .byte 4 +x5: + .byte 5 +x6: + .byte 6 + + .globl _start + .text +_start: +# no need for got entry, optimise to nop,addi +# note: ld doesn't yet do got optimisation, so we get nop,ld + addis 9,2,x1@got@ha + ld 9,x1@got@l(9) +# must keep got entry, optimise to nop,addi,ld + addis 4,2,x2@got@ha + addi 5,4,x2@got@l + ld 6,0(5) + +# no need for toc entry, optimise to nop,addi + addis 9,2,x4t@toc@ha + ld 9,x4t@toc@l(9) +# must keep toc entry, optimise to nop,addi,ld +# if we had a reloc tying the ld to x5/x5t then we could throw away +# the toc entry and optimise to nop,nop,addi + addis 4,2,x5t@toc@ha + addi 5,4,x5t@toc@l + ld 6,0(5) diff --git a/ld/testsuite/ld-scripts/phdrs.exp b/ld/testsuite/ld-scripts/phdrs.exp index a112d3a..c4e5699 100644 --- a/ld/testsuite/ld-scripts/phdrs.exp +++ b/ld/testsuite/ld-scripts/phdrs.exp @@ -56,7 +56,7 @@ if ![ld_simple_link $ld tmpdir/phdrs $ldopt] { unresolved $testname return } - set exec_output [run_host_cmd "$objdump" "--private tmpdir/phdrs"] + set exec_output [run_host_cmd "$objdump" "--private-headers tmpdir/phdrs"] set exec_output [prune_warnings $exec_output] verbose -log $exec_output diff --git a/ld/testsuite/ld-scripts/phdrs2.exp b/ld/testsuite/ld-scripts/phdrs2.exp index e75acfb..b680d85 100644 --- a/ld/testsuite/ld-scripts/phdrs2.exp +++ b/ld/testsuite/ld-scripts/phdrs2.exp @@ -63,7 +63,7 @@ if ![ld_simple_link $ld tmpdir/phdrs2 $ldopt] { return } - set exec_output [run_host_cmd "$objdump" "--private tmpdir/phdrs2"] + set exec_output [run_host_cmd "$objdump" "--private-headers tmpdir/phdrs2"] set exec_output [prune_warnings $exec_output] verbose -log $exec_output diff --git a/ld/testsuite/ld-scripts/section-flags-1.s b/ld/testsuite/ld-scripts/section-flags-1.s new file mode 100644 index 0000000..566e3c6 --- /dev/null +++ b/ld/testsuite/ld-scripts/section-flags-1.s @@ -0,0 +1,2 @@ + .text + .space 16 diff --git a/ld/testsuite/ld-scripts/section-flags-1.t b/ld/testsuite/ld-scripts/section-flags-1.t new file mode 100644 index 0000000..3380489 --- /dev/null +++ b/ld/testsuite/ld-scripts/section-flags-1.t @@ -0,0 +1,21 @@ +MEMORY +{ + ram (rwx) : ORIGIN = 0x100000, LENGTH = 144M +} + +SECTIONS +{ + .text : + { + INPUT_SECTION_FLAGS (!SHF_TLS) *(.text .text.* .text_* .gnu.linkonce.t.*) + } >ram + + .text_vle : + { + INPUT_SECTION_FLAGS (SHF_MERGE & SHF_STRINGS & SHF_LINK_ORDER) *(.text .text.* .text_* .gnu.linkonce.t.*) + } >ram + .text_other : + { + INPUT_SECTION_FLAGS (SHF_MERGE & !SHF_STRINGS) *(.text .text.* .text_* .gnu.linkonce.t.*) + } +} diff --git a/ld/testsuite/ld-scripts/section-flags-2.s b/ld/testsuite/ld-scripts/section-flags-2.s new file mode 100644 index 0000000..566e3c6 --- /dev/null +++ b/ld/testsuite/ld-scripts/section-flags-2.s @@ -0,0 +1,2 @@ + .text + .space 16 diff --git a/ld/testsuite/ld-scripts/section-flags-2.t b/ld/testsuite/ld-scripts/section-flags-2.t new file mode 100644 index 0000000..ca5ae63 --- /dev/null +++ b/ld/testsuite/ld-scripts/section-flags-2.t @@ -0,0 +1,12 @@ +MEMORY +{ + ram (rwx) : ORIGIN = 0x100000, LENGTH = 144M +} + +SECTIONS +{ + .text : + { + INPUT_SECTION_FLAGS (!SHF_TLS) *(EXCLUDE_FILE (section-flags-1.o) .text .text.* .text_* .gnu.linkonce.t.*) + } >ram +} diff --git a/ld/testsuite/ld-scripts/section-flags.exp b/ld/testsuite/ld-scripts/section-flags.exp new file mode 100644 index 0000000..4186449 --- /dev/null +++ b/ld/testsuite/ld-scripts/section-flags.exp @@ -0,0 +1,41 @@ +# Test SECTION_FLAGS in a linker script. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +# These tests only work for ELF targets +if {! [is_elf_format]} { + return +} + +set ldcmd $ld +if { [istarget spu*-*-*] } { + set ldcmd "$ldcmd --local-store 0:0" +} + +foreach test {"section-flags-1" "section-flags-2"} { + if ![ld_assemble $as $srcdir/$subdir/$test.s tmpdir/$test.o] { + unresolved $test + } else { + if ![ld_simple_link $ldcmd tmpdir/$test \ + "-T $srcdir/$subdir/$test.t tmpdir/$test.o"] { + fail $test + } else { + pass $test + } + } +} diff --git a/ld/testsuite/ld-scripts/weak.exp b/ld/testsuite/ld-scripts/weak.exp index d021df7..cba6e25 100644 --- a/ld/testsuite/ld-scripts/weak.exp +++ b/ld/testsuite/ld-scripts/weak.exp @@ -1,6 +1,6 @@ # Test weak symbols. # By Ian Lance Taylor, Cygnus Solutions. -# Copyright 1999, 2000, 2002, 2004, 2005, 2006, 2007, 2009 +# Copyright 1999, 2000, 2002, 2004, 2005, 2006, 2007, 2009, 2011 # Free Software Foundation, Inc. # # This file is part of the GNU Binutils. @@ -22,17 +22,16 @@ set testname "weak symbols" -# This test only works for ELF targets. +# This test only works for ELF targets and some PE targets. # It ought to work for some a.out targets, but it doesn't. if {! [is_elf_format] && ! [is_pecoff_format]} { unsupported $testname return } -# Weak symbols are broken for non-i386 PE targets. -if {! [istarget i?86-*-*]} { +# Weak symbols are broken for most PE targets. +if {! [istarget i?86-*-*] && ! [istarget sh-*-*]} { setup_xfail *-*-pe* - setup_xfail x86_64-*-pe* } # hppa64 and or32 are incredibly broken diff --git a/ld/testsuite/ld-selective/sel-dump.exp b/ld/testsuite/ld-selective/sel-dump.exp index 5003d31..c78bd6e 100644 --- a/ld/testsuite/ld-selective/sel-dump.exp +++ b/ld/testsuite/ld-selective/sel-dump.exp @@ -1,5 +1,5 @@ # Expect script for ld selective linking tests running run_dump_test -# Copyright 2002, 2005, 2004, 2007 Free Software Foundation, Inc. +# Copyright 2002, 2005, 2004, 2007, 2011 Free Software Foundation, Inc. # # This file is part of the GNU Binutils. # @@ -28,7 +28,7 @@ set test_list [lsort [glob -nocomplain $srcdir/$subdir/*.d]] for { set i 0 } { $i < [llength $test_list] } { incr i } { # We need to strip the ".d", but can leave the dirname. verbose [file rootname [lindex $test_list $i]] - setup_xfail "alpha*-*" "am33*-*" "arc*-*" "d30v*-*" "dlx*-*" + setup_xfail "am33*-*" "arc*-*" "d30v*-*" "dlx*-*" setup_xfail "hppa*64-*-*" "i370*-*" "i860*-*" "i960*-*" "ia64*-*" setup_xfail "m88*-*" "mn10200-*" "mep-*" "or32-*" "pj-*" run_dump_test [file rootname [lindex $test_list $i]] diff --git a/ld/testsuite/ld-selective/selective.exp b/ld/testsuite/ld-selective/selective.exp index 505db65..d4d30ec 100644 --- a/ld/testsuite/ld-selective/selective.exp +++ b/ld/testsuite/ld-selective/selective.exp @@ -28,7 +28,7 @@ if ![is_elf_format] { } # These targets do not support selective linking -if {[istarget "alpha*-*-*"] || [istarget "am33*-*-*"] || +if {[istarget "am33*-*-*"] || [istarget "arc-*-*"] || [istarget "d30v-*-*"] || [istarget "dlx-*-*"] || [istarget "hppa*64*-*-*"] || [istarget "i370-*-*"] || [istarget "i860-*-*"] || diff --git a/ld/testsuite/ld-shared/shared.exp b/ld/testsuite/ld-shared/shared.exp index b77b9ce..1d25d51 100644 --- a/ld/testsuite/ld-shared/shared.exp +++ b/ld/testsuite/ld-shared/shared.exp @@ -234,7 +234,9 @@ if ![ld_compile "$CC $CFLAGS $SHCFLAG" $srcdir/$subdir/main.c $tmpdir/mainnp.o] if { [istarget sparc*-*-linux*] && [is_elf64 $tmpdir/mainnp.o] } { setup_xfail "sparc*-*-linux*" } - setup_xfail "x86_64-*-linux*" + if { [is_elf64 $tmpdir/mainnp.o] } { + setup_xfail "x86_64-*-linux*" + } setup_xfail "s390x-*-linux*" if [ string match $shared_needs_pic "yes" ] { setup_xfail "arm*-*-linux*" @@ -257,7 +259,9 @@ if ![ld_compile "$CC $CFLAGS $SHCFLAG" $srcdir/$subdir/main.c $tmpdir/mainnp.o] if { [istarget sparc*-*-linux*] && [is_elf64 $tmpdir/mainnp.o] } { setup_xfail "sparc*-*-linux*" } - setup_xfail "x86_64-*-linux*" + if { [is_elf64 $tmpdir/mainnp.o] } { + setup_xfail "x86_64-*-linux*" + } setup_xfail "s390x-*-linux*" if [ string match $shared_needs_pic "yes" ] { setup_xfail "arm*-*-linux*" @@ -310,7 +314,9 @@ if ![ld_compile "$CC $CFLAGS $SHCFLAG $picflag" $srcdir/$subdir/main.c $tmpdir/m if { [istarget sparc*-*-linux*] && [is_elf64 $tmpdir/mainp.o] } { setup_xfail "sparc*-*-linux*" } - setup_xfail "x86_64-*-linux*" + if { [is_elf64 $tmpdir/mainp.o] } { + setup_xfail "x86_64-*-linux*" + } setup_xfail "s390x-*-linux*" if [ string match $shared_needs_pic "yes" ] { setup_xfail "arm*-*-linux*" diff --git a/ld/testsuite/ld-sparc/tlssunbin32.dd b/ld/testsuite/ld-sparc/tlssunbin32.dd index 37c1d04..c31d190 100644 --- a/ld/testsuite/ld-sparc/tlssunbin32.dd +++ b/ld/testsuite/ld-sparc/tlssunbin32.dd @@ -27,8 +27,8 @@ Disassembly of section .text: +11034: 01 00 00 00 nop * +11038: d0 05 c0 12 ld \[ %l7 \+ %l2 \], %o0 +1103c: 01 00 00 00 nop * - +11040: 90 01 c0 08 add %g7, %o0, %o0 - +11044: 01 00 00 00 nop * + +11040: 01 00 00 00 nop * + +11044: 90 01 c0 08 add %g7, %o0, %o0 +11048: 01 00 00 00 nop * +1104c: 01 00 00 00 nop * +11050: 01 00 00 00 nop * @@ -36,8 +36,8 @@ Disassembly of section .text: +11058: 11 00 00 00 sethi %hi\(0\), %o0 +1105c: 92 02 20 08 add %o0, 8, %o1 ! 8 <.*> +11060: d0 05 c0 09 ld \[ %l7 \+ %o1 \], %o0 - +11064: 90 01 c0 08 add %g7, %o0, %o0 - +11068: 01 00 00 00 nop * + +11064: 01 00 00 00 nop * + +11068: 90 01 c0 08 add %g7, %o0, %o0 +1106c: 01 00 00 00 nop * +11070: 01 00 00 00 nop * +11074: 01 00 00 00 nop * diff --git a/ld/testsuite/ld-sparc/tlssunbin64.dd b/ld/testsuite/ld-sparc/tlssunbin64.dd index 0585ae6..cd7db1c 100644 --- a/ld/testsuite/ld-sparc/tlssunbin64.dd +++ b/ld/testsuite/ld-sparc/tlssunbin64.dd @@ -27,8 +27,8 @@ Disassembly of section .text: +101034: 01 00 00 00 nop * +101038: d0 5d c0 12 ldx \[ %l7 \+ %l2 \], %o0 +10103c: 01 00 00 00 nop * - +101040: 90 01 c0 08 add %g7, %o0, %o0 - +101044: 01 00 00 00 nop * + +101040: 01 00 00 00 nop * + +101044: 90 01 c0 08 add %g7, %o0, %o0 +101048: 01 00 00 00 nop * +10104c: 01 00 00 00 nop * +101050: 01 00 00 00 nop * @@ -36,8 +36,8 @@ Disassembly of section .text: +101058: 11 00 00 00 sethi %hi\(0\), %o0 +10105c: 92 02 20 10 add %o0, 0x10, %o1 ! 10 <.*> +101060: d0 5d c0 09 ldx \[ %l7 \+ %o1 \], %o0 - +101064: 90 01 c0 08 add %g7, %o0, %o0 - +101068: 01 00 00 00 nop * + +101064: 01 00 00 00 nop * + +101068: 90 01 c0 08 add %g7, %o0, %o0 +10106c: 01 00 00 00 nop * +101070: 01 00 00 00 nop * +101074: 01 00 00 00 nop * diff --git a/ld/testsuite/ld-sparc/tlssunpic32.dd b/ld/testsuite/ld-sparc/tlssunpic32.dd index c34d514..5589771 100644 --- a/ld/testsuite/ld-sparc/tlssunpic32.dd +++ b/ld/testsuite/ld-sparc/tlssunpic32.dd @@ -37,8 +37,8 @@ Disassembly of section .text: +1058: 11 00 00 00 sethi %hi\(0\), %o0 +105c: 92 02 20 3c add %o0, 0x3c, %o1 ! 3c <.*> +1060: d0 05 c0 09 ld \[ %l7 \+ %o1 \], %o0 - +1064: 90 01 c0 08 add %g7, %o0, %o0 - +1068: 01 00 00 00 nop * + +1064: 01 00 00 00 nop * + +1068: 90 01 c0 08 add %g7, %o0, %o0 +106c: 01 00 00 00 nop * +1070: 01 00 00 00 nop * +1074: 01 00 00 00 nop * @@ -55,8 +55,8 @@ Disassembly of section .text: +10a0: 11 00 00 00 sethi %hi\(0\), %o0 +10a4: 90 02 20 0c add %o0, 0xc, %o0 ! c <.*> +10a8: d0 05 c0 08 ld \[ %l7 \+ %o0 \], %o0 - +10ac: 90 01 c0 08 add %g7, %o0, %o0 - +10b0: 01 00 00 00 nop * + +10ac: 01 00 00 00 nop * + +10b0: 90 01 c0 08 add %g7, %o0, %o0 +10b4: 01 00 00 00 nop * +10b8: 01 00 00 00 nop * +10bc: 01 00 00 00 nop * @@ -73,8 +73,8 @@ Disassembly of section .text: +10e8: 11 00 00 00 sethi %hi\(0\), %o0 +10ec: 90 02 20 48 add %o0, 0x48, %o0 ! 48 <.*> +10f0: d0 05 c0 08 ld \[ %l7 \+ %o0 \], %o0 - +10f4: 90 01 c0 08 add %g7, %o0, %o0 - +10f8: 01 00 00 00 nop * + +10f4: 01 00 00 00 nop * + +10f8: 90 01 c0 08 add %g7, %o0, %o0 +10fc: 01 00 00 00 nop * +1100: 01 00 00 00 nop * +1104: 01 00 00 00 nop * @@ -91,8 +91,8 @@ Disassembly of section .text: +1130: 11 00 00 00 sethi %hi\(0\), %o0 +1134: 90 02 20 24 add %o0, 0x24, %o0 ! 24 <.*> +1138: d0 05 c0 08 ld \[ %l7 \+ %o0 \], %o0 - +113c: 90 01 c0 08 add %g7, %o0, %o0 - +1140: 01 00 00 00 nop * + +113c: 01 00 00 00 nop * + +1140: 90 01 c0 08 add %g7, %o0, %o0 +1144: 01 00 00 00 nop * +1148: 01 00 00 00 nop * +114c: 01 00 00 00 nop * diff --git a/ld/testsuite/ld-sparc/tlssunpic64.dd b/ld/testsuite/ld-sparc/tlssunpic64.dd index 0b41b68..5e94858 100644 --- a/ld/testsuite/ld-sparc/tlssunpic64.dd +++ b/ld/testsuite/ld-sparc/tlssunpic64.dd @@ -37,8 +37,8 @@ Disassembly of section .text: +1058: 11 00 00 00 sethi %hi\(0\), %o0 +105c: 92 02 20 78 add %o0, 0x78, %o1 ! 78 <.*> +1060: d0 5d c0 09 ldx \[ %l7 \+ %o1 \], %o0 - +1064: 90 01 c0 08 add %g7, %o0, %o0 - +1068: 01 00 00 00 nop * + +1064: 01 00 00 00 nop * + +1068: 90 01 c0 08 add %g7, %o0, %o0 +106c: 01 00 00 00 nop * +1070: 01 00 00 00 nop * +1074: 01 00 00 00 nop * @@ -55,8 +55,8 @@ Disassembly of section .text: +10a0: 11 00 00 00 sethi %hi\(0\), %o0 +10a4: 90 02 20 18 add %o0, 0x18, %o0 ! 18 <.*> +10a8: d0 5d c0 08 ldx \[ %l7 \+ %o0 \], %o0 - +10ac: 90 01 c0 08 add %g7, %o0, %o0 - +10b0: 01 00 00 00 nop * + +10ac: 01 00 00 00 nop * + +10b0: 90 01 c0 08 add %g7, %o0, %o0 +10b4: 01 00 00 00 nop * +10b8: 01 00 00 00 nop * +10bc: 01 00 00 00 nop * @@ -73,8 +73,8 @@ Disassembly of section .text: +10e8: 11 00 00 00 sethi %hi\(0\), %o0 +10ec: 90 02 20 90 add %o0, 0x90, %o0 ! 90 <.*> +10f0: d0 5d c0 08 ldx \[ %l7 \+ %o0 \], %o0 - +10f4: 90 01 c0 08 add %g7, %o0, %o0 - +10f8: 01 00 00 00 nop * + +10f4: 01 00 00 00 nop * + +10f8: 90 01 c0 08 add %g7, %o0, %o0 +10fc: 01 00 00 00 nop * +1100: 01 00 00 00 nop * +1104: 01 00 00 00 nop * @@ -91,8 +91,8 @@ Disassembly of section .text: +1130: 11 00 00 00 sethi %hi\(0\), %o0 +1134: 90 02 20 48 add %o0, 0x48, %o0 ! 48 <.*> +1138: d0 5d c0 08 ldx \[ %l7 \+ %o0 \], %o0 - +113c: 90 01 c0 08 add %g7, %o0, %o0 - +1140: 01 00 00 00 nop * + +113c: 01 00 00 00 nop * + +1140: 90 01 c0 08 add %g7, %o0, %o0 +1144: 01 00 00 00 nop * +1148: 01 00 00 00 nop * +114c: 01 00 00 00 nop * diff --git a/ld/testsuite/ld-srec/srec.exp b/ld/testsuite/ld-srec/srec.exp index 3051026..25dfb06 100644 --- a/ld/testsuite/ld-srec/srec.exp +++ b/ld/testsuite/ld-srec/srec.exp @@ -364,6 +364,13 @@ setup_xfail "score-*-*" # The S-record linker doesn't support Blackfin ELF FDPIC ABI. setup_xfail "bfin-*-linux-uclibc" +# On tile, we appear to be getting some random-seeming zeroing or 24-bit +# rightshifts (!) in the output when directly generating S-records from +# the linker. Not clear what could be causing this but we don't +# anticipate creating s-records (and could always use objcopy to +# generate the format if need be). +setup_xfail "tile*-*-*" + run_srec_test $test1 "tmpdir/sr1.o tmpdir/sr2.o" # Now try linking a C++ program with global constructors and @@ -393,5 +400,6 @@ setup_xfail "ia64-*-*" setup_xfail "*-*-cygwin*" "*-*-mingw*" "*-*-pe*" "*-*-winnt*" setup_xfail "score-*-*" setup_xfail "bfin-*-linux-uclibc" +setup_xfail "tile*-*-*" run_srec_test $test2 "tmpdir/sr3.o" diff --git a/ld/testsuite/ld-tic6x/attr-pic-01.d b/ld/testsuite/ld-tic6x/attr-pic-01.d index a04713f..91fb599 100644 --- a/ld/testsuite/ld-tic6x/attr-pic-01.d +++ b/ld/testsuite/ld-tic6x/attr-pic-01.d @@ -3,4 +3,8 @@ #ld: -r -melf32_tic6x_le #source: attr-pic-0.s #source: attr-pic-1.s -#warning: .*differ in position-dependence of code addressing +#readelf: -A + +Attribute Section: c6xabi +File Attributes + Tag_ISA: C674x diff --git a/ld/testsuite/ld-tic6x/attr-pic-10.d b/ld/testsuite/ld-tic6x/attr-pic-10.d index bc781c4..ff52a7a 100644 --- a/ld/testsuite/ld-tic6x/attr-pic-10.d +++ b/ld/testsuite/ld-tic6x/attr-pic-10.d @@ -3,4 +3,8 @@ #ld: -r -melf32_tic6x_le #source: attr-pic-1.s #source: attr-pic-0.s -#warning: .*differ in position-dependence of code addressing +#readelf: -A + +Attribute Section: c6xabi +File Attributes + Tag_ISA: C674x diff --git a/ld/testsuite/ld-tic6x/attr-pid-01.d b/ld/testsuite/ld-tic6x/attr-pid-01.d index 5c32e15..a5449dc 100644 --- a/ld/testsuite/ld-tic6x/attr-pid-01.d +++ b/ld/testsuite/ld-tic6x/attr-pid-01.d @@ -3,4 +3,9 @@ #ld: -r -melf32_tic6x_le #source: attr-pid-0.s #source: attr-pid-1.s -#warning: .*differ in position-dependence of data addressing +#readelf: -A + +Attribute Section: c6xabi +File Attributes + Tag_ISA: C674x + diff --git a/ld/testsuite/ld-tic6x/attr-pid-02.d b/ld/testsuite/ld-tic6x/attr-pid-02.d index d155b56..2a7bfd1 100644 --- a/ld/testsuite/ld-tic6x/attr-pid-02.d +++ b/ld/testsuite/ld-tic6x/attr-pid-02.d @@ -3,4 +3,9 @@ #ld: -r -melf32_tic6x_le #source: attr-pid-0.s #source: attr-pid-2.s -#warning: .*differ in position-dependence of data addressing +#readelf: -A + +Attribute Section: c6xabi +File Attributes + Tag_ISA: C674x + diff --git a/ld/testsuite/ld-tic6x/attr-pid-10.d b/ld/testsuite/ld-tic6x/attr-pid-10.d index edb8a65..a421d40 100644 --- a/ld/testsuite/ld-tic6x/attr-pid-10.d +++ b/ld/testsuite/ld-tic6x/attr-pid-10.d @@ -3,4 +3,9 @@ #ld: -r -melf32_tic6x_le #source: attr-pid-1.s #source: attr-pid-0.s -#warning: .*differ in position-dependence of data addressing +#readelf: -A + +Attribute Section: c6xabi +File Attributes + Tag_ISA: C674x + diff --git a/ld/testsuite/ld-tic6x/attr-pid-12.d b/ld/testsuite/ld-tic6x/attr-pid-12.d index 138ae88..af7a765 100644 --- a/ld/testsuite/ld-tic6x/attr-pid-12.d +++ b/ld/testsuite/ld-tic6x/attr-pid-12.d @@ -3,4 +3,10 @@ #ld: -r -melf32_tic6x_le #source: attr-pid-1.s #source: attr-pid-2.s -#warning: .*differ in position-dependence of data addressing +#readelf: -A + +Attribute Section: c6xabi +File Attributes + Tag_ISA: C674x + Tag_ABI_PID: Data addressing position-independent, GOT near DP + diff --git a/ld/testsuite/ld-tic6x/attr-pid-20.d b/ld/testsuite/ld-tic6x/attr-pid-20.d index ce319bd..e2cd0bc 100644 --- a/ld/testsuite/ld-tic6x/attr-pid-20.d +++ b/ld/testsuite/ld-tic6x/attr-pid-20.d @@ -3,4 +3,8 @@ #ld: -r -melf32_tic6x_le #source: attr-pid-2.s #source: attr-pid-0.s -#warning: .*differ in position-dependence of data addressing +#readelf: -A + +Attribute Section: c6xabi +File Attributes + Tag_ISA: C674x diff --git a/ld/testsuite/ld-tic6x/attr-pid-21.d b/ld/testsuite/ld-tic6x/attr-pid-21.d index 7097db6..c0f71df 100644 --- a/ld/testsuite/ld-tic6x/attr-pid-21.d +++ b/ld/testsuite/ld-tic6x/attr-pid-21.d @@ -3,4 +3,9 @@ #ld: -r -melf32_tic6x_le #source: attr-pid-2.s #source: attr-pid-1.s -#warning: .*differ in position-dependence of data addressing +#readelf: -A + +Attribute Section: c6xabi +File Attributes + Tag_ISA: C674x + Tag_ABI_PID: Data addressing position-independent, GOT near DP diff --git a/ld/testsuite/ld-tic6x/discard-unwind.ld b/ld/testsuite/ld-tic6x/discard-unwind.ld new file mode 100644 index 0000000..00582c1 --- /dev/null +++ b/ld/testsuite/ld-tic6x/discard-unwind.ld @@ -0,0 +1,15 @@ +/* Script for unwinding ld tests */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = 0x8000; + .text : + { + *(.before) + *(.text) + *(.after) + *(.c6xabi.extab*) + } =0 + /DISCARD/ : { *(.c6xabi.exidx*) } + .c6xabi.attribues 0 : { *(.c6xabi.atttributes) } +} diff --git a/ld/testsuite/ld-tic6x/dsbt.ld b/ld/testsuite/ld-tic6x/dsbt.ld index fd41608..ff162f3 100644 --- a/ld/testsuite/ld-tic6x/dsbt.ld +++ b/ld/testsuite/ld-tic6x/dsbt.ld @@ -1,3 +1,5 @@ +OUTPUT_FORMAT("elf32-tic6x-le", "elf32-tic6x-le", + "elf32-tic6x-le") EXTERN (__c6xabi_DSBT_BASE); SECTIONS { diff --git a/ld/testsuite/ld-tic6x/ehtype-reloc-1-rel.d b/ld/testsuite/ld-tic6x/ehtype-reloc-1-rel.d new file mode 100644 index 0000000..c29ae68 --- /dev/null +++ b/ld/testsuite/ld-tic6x/ehtype-reloc-1-rel.d @@ -0,0 +1,14 @@ +#name: EHTYPE relocations (REL) +#as: -mlittle-endian -mgenerate-rel +#ld: -melf32_tic6x_le --defsym s1=0x2a -Tdsbt-inrange.ld +#source: ehtype-reloc-1.s +#objdump: -s -j.data -j.text -j.got + +.*: *file format elf32-tic6x-le + +Contents of section .data: + 8018 78563412 .* +Contents of section .text: + 10000000 08000000 0c000000 .* +Contents of section .got: + 2001fff4 00000000 00000000 2a000000 18800000 .* diff --git a/ld/testsuite/ld-tic6x/ehtype-reloc-1.d b/ld/testsuite/ld-tic6x/ehtype-reloc-1.d new file mode 100644 index 0000000..c14eeef --- /dev/null +++ b/ld/testsuite/ld-tic6x/ehtype-reloc-1.d @@ -0,0 +1,14 @@ +#name: EHTYPE relocations (RELA) +#as: -mlittle-endian +#ld: -melf32_tic6x_le --defsym s1=0x2a -Tdsbt-inrange.ld +#source: ehtype-reloc-1.s +#objdump: -s -j.data -j.text -j.got + +.*: *file format elf32-tic6x-le + +Contents of section .data: + 8018 78563412 .* +Contents of section .text: + 10000000 08000000 0c000000 .* +Contents of section .got: + 2001fff4 00000000 00000000 2a000000 18800000 .* diff --git a/ld/testsuite/ld-tic6x/ehtype-reloc-1.s b/ld/testsuite/ld-tic6x/ehtype-reloc-1.s new file mode 100644 index 0000000..46c6de4 --- /dev/null +++ b/ld/testsuite/ld-tic6x/ehtype-reloc-1.s @@ -0,0 +1,9 @@ +.globl s2 +.globl _start +.text +_start: +.ehtype s1 +.ehtype s2 +.data +s2: +.word 0x12345678 diff --git a/ld/testsuite/ld-tic6x/got-reloc-inrange.d b/ld/testsuite/ld-tic6x/got-reloc-inrange.d index e4fed04..4260444 100644 --- a/ld/testsuite/ld-tic6x/got-reloc-inrange.d +++ b/ld/testsuite/ld-tic6x/got-reloc-inrange.d @@ -1,5 +1,5 @@ #name: C6X GOT relocations, no overflow -#as: -mlittle-endian -mdsbt +#as: -mlittle-endian -mdsbt -mpic -mpid=near #ld: -melf32_tic6x_le -Tdsbt-inrange.ld --dsbt-index 4 -shared #source: got-reloc-global.s #objdump: -dr diff --git a/ld/testsuite/ld-tic6x/pcr-reloc.d b/ld/testsuite/ld-tic6x/pcr-reloc.d new file mode 100644 index 0000000..8c35e04 --- /dev/null +++ b/ld/testsuite/ld-tic6x/pcr-reloc.d @@ -0,0 +1,39 @@ +#name: C6X PCR relocations +#as: -mlittle-endian +#ld: -melf32_tic6x_le -Tgeneric.ld +#source: pcr-reloc.s +#objdump: -dr + +.*: *file format elf32-tic6x-le + + +Disassembly of section \.text: + +10000000 <[^>]*>: +10000000:[ \t]+00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1 +10000004:[ \t]+00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1 +10000008:[ \t]+00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1 + +1000000c <[^>]*>: +1000000c:[ \t]+004003e2[ \t]+mvc \.S2 pce1,b0 +10000010:[ \t]+01000264[ \t]+ldw \.D1T1 \*\+a0\(0\),a2 +10000014:[ \t]+01001a2a[ \t]+mvk \.S2 52,b2 +10000018:[ \t]+0100006a[ \t]+mvkh \.S2 0,b2 +1000001c:[ \t]+01000a2a[ \t]+mvk \.S2 20,b2 +10000020:[ \t]+0100006a[ \t]+mvkh \.S2 0,b2 +10000024:[ \t]+01001e2a[ \t]+mvk \.S2 60,b2 +10000028:[ \t]+0100006a[ \t]+mvkh \.S2 0,b2 +1000002c:[ \t]+01000e2a[ \t]+mvk \.S2 28,b2 +10000030:[ \t]+0100006a[ \t]+mvkh \.S2 0,b2 + +10000034 <[^>]*>: +10000034:[ \t]+00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1 + +10000038 <[^>]*>: +10000038:[ \t]+004003e2[ \t]+mvc \.S2 pce1,b0 + +1000003c <[^>]*>: +1000003c:[ \t]+00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1 +10000040:[ \t]+017ff02a[ \t]+mvk \.S2 -32,b2 +10000044:[ \t]+017fffea[ \t]+mvkh \.S2 4294901760,b2 +[ \t]*\.\.\. diff --git a/ld/testsuite/ld-tic6x/pcr-reloc.s b/ld/testsuite/ld-tic6x/pcr-reloc.s new file mode 100644 index 0000000..00362ff --- /dev/null +++ b/ld/testsuite/ld-tic6x/pcr-reloc.s @@ -0,0 +1,28 @@ + .text + .align 5 +_start: +L0: + ldw .d1t1 *a0,a1 + ldw .d1t1 *a0,a1 + ldw .d1t1 *a0,a1 +L1: + MVC .s2 PCE1, b0 + ldw .d1t1 *a0,a2 + mvk .s2 $PCR_OFFSET (S0,L1), b2 + mvkh .s2 $PCR_OFFSET (S0,L1), b2 + mvk .s2 $PCR_OFFSET (S0,L2), b2 + mvkh .s2 $PCR_OFFSET (S0,L2), b2 + mvk .s2 $PCR_OFFSET (S1,L1), b2 + mvkh .s2 $PCR_OFFSET (S1,L1), b2 + mvk .s2 $PCR_OFFSET (S1,L2), b2 + mvkh .s2 $PCR_OFFSET (S1,L2), b2 + +S0: + ldw .d1t1 *a0,a1 +L2: + MVC .s2 PCE1, b0 + +S1: + ldw .d1t1 *a0,a1 + mvkl .s2 $PCR_OFFSET (L0,L2), b2 + mvkh .s2 $PCR_OFFSET (L0,L2), b2 diff --git a/ld/testsuite/ld-tic6x/shared-nopic.d b/ld/testsuite/ld-tic6x/shared-nopic.d new file mode 100644 index 0000000..8748f10 --- /dev/null +++ b/ld/testsuite/ld-tic6x/shared-nopic.d @@ -0,0 +1,5 @@ +#name: C6X shared library without PIC code +#as: -mlittle-endian -mdsbt -mpid=near +#ld: -melf32_tic6x_le -Tdsbt-inrange.ld --dsbt-index 4 -shared +#source: got-reloc-global.s +#warning: non-PIC code diff --git a/ld/testsuite/ld-tic6x/shared-nopid.d b/ld/testsuite/ld-tic6x/shared-nopid.d new file mode 100644 index 0000000..7f366f3 --- /dev/null +++ b/ld/testsuite/ld-tic6x/shared-nopid.d @@ -0,0 +1,5 @@ +#name: C6X shared library without PIC code +#as: -mlittle-endian -mdsbt -mpic +#ld: -melf32_tic6x_le -Tdsbt-inrange.ld --dsbt-index 4 -shared +#source: got-reloc-global.s +#warning: non-PID code diff --git a/ld/testsuite/ld-tic6x/tic6x.exp b/ld/testsuite/ld-tic6x/tic6x.exp index 9bcb554..5d7b107 100644 --- a/ld/testsuite/ld-tic6x/tic6x.exp +++ b/ld/testsuite/ld-tic6x/tic6x.exp @@ -112,3 +112,69 @@ set shlibtests { } run_ld_link_tests $shlibtests + +if { [istarget tic6x-*-elf] } { + set expected_osabi "Bare-metal C6000" +} elseif { [istarget tic6x-*-uclinux] } { + set expected_osabi "Linux C6000" +} else { + return +} + +if { ![ld_assemble_flags $as "-mpic -mpid=near" $srcdir/$subdir/shlib-1.s tmpdir/shlib-1.o] + || ![ld_assemble_flags $as "-mpic -mpid=near" $srcdir/$subdir/shlib-2.s tmpdir/shlib-2.o] + || ![ld_assemble $as $srcdir/$subdir/shlib-app-1.s tmpdir/shlib-app-1.o] + || ![ld_assemble_flags $as "-mpic -mpid=near -mbig-endian" $srcdir/$subdir/shlib-1.s tmpdir/shlib-1b.o] + || ![ld_assemble_flags $as "-mpic -mpid=near -mbig-endian" $srcdir/$subdir/shlib-2.s tmpdir/shlib-2b.o] + || ![ld_assemble_flags $as -mbig-endian $srcdir/$subdir/shlib-app-1.s tmpdir/shlib-app-1b.o] + || ![ld_simple_link $ld tmpdir/libtest.so "-shared tmpdir/shlib-1.o tmpdir/shlib-2.o"] + || ![ld_simple_link $ld tmpdir/libtestb.so "-shared -EB tmpdir/shlib-1b.o tmpdir/shlib-2b.o"] + || ![ld_simple_link $ld tmpdir/shlib.o "-r tmpdir/shlib-1.o tmpdir/shlib-2.o"] + || ![ld_simple_link $ld tmpdir/shlibb.o "-r -EB tmpdir/shlib-1b.o tmpdir/shlib-2b.o"] + || ![ld_simple_link $ld tmpdir/dynapp-1 "tmpdir/libtest.so tmpdir/shlib-app-1.o"] + || ![ld_simple_link $ld tmpdir/dynapp-1b "-EB tmpdir/libtestb.so tmpdir/shlib-app-1b.o"] } { + unresolved "TIC6X OSABI tests" + return +} + +# A procedure to check the OS/ABI field in the ELF header of a binary file. +proc check_osabi_tic6x { test_name binary_file } { + global READELF + global READELFFLAGS + global expected_osabi + + set cmd "$READELF $READELFFLAGS --file-header $binary_file" + send_log "$cmd\n" + set got [remote_exec host [concat sh -c [list "$cmd >dump.out"]] "" "/dev/null"] + + if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then { + send_log "$got\n" + unresolved "$test_name" + remote_file build delete "dump.out" + return + } + remote_upload host "dump.out" + + if { ![regexp "\n\[ \]*OS/ABI:\[ \]*(.+)\n\[ \]*ABI" \ + [file_contents dump.out] nil osabi] } { + verbose "proc check_osabi_tic6x: Readelf failed to extract an ELF header from $binary_file" + unresolved "$test_name" + } elseif { $osabi == $expected_osabi } { + pass "$test_name" + } else { + verbose "Expected OSABI: $expected_osabi, Obtained osabi: $osabi" + fail "$test_name" + } + remote_file build delete "dump.out" + remote_file host delete "dump.out" +} + +check_osabi_tic6x "C6X shared library OSABI, LE" tmpdir/libtest.so +check_osabi_tic6x "C6X shared library OSABI, BE" tmpdir/libtestb.so +check_osabi_tic6x "C6X dynamic app OSABI, LE" tmpdir/dynapp-1 +check_osabi_tic6x "C6X dynamic app OSABI, BE" tmpdir/dynapp-1b + +set expected_osabi "UNIX - System V" + +check_osabi_tic6x "C6X relocatable link OSABI, LE" tmpdir/shlib.o +check_osabi_tic6x "C6X relocatable link OSABI, BE" tmpdir/shlibb.o diff --git a/ld/testsuite/ld-tic6x/unwind-1.d b/ld/testsuite/ld-tic6x/unwind-1.d new file mode 100644 index 0000000..11a24d4 --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind-1.d @@ -0,0 +1,10 @@ +#ld: -T unwind.ld +#objdump: -s + +.*: file format.* + +#... +Contents of section .c6xabi.exidx: + 9000 (00f8ff7f 07020083 1cf8ff7f 01000000|7ffff800 83000207 7ffff81c 00000001) .* +Contents of section .far: +#... diff --git a/ld/testsuite/ld-tic6x/unwind-1.s b/ld/testsuite/ld-tic6x/unwind-1.s new file mode 100644 index 0000000..5783a40 --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind-1.s @@ -0,0 +1,25 @@ + .cfi_sections .c6xabi.exidx + .text + .global _start + .type _start, %function +_start: + .cfi_startproc + .cfi_offset B3, 0 + .cfi_def_cfa_offset 8 + nop + .p2align 6 + .cfi_endproc + .personalityindex 3 + .endp + + # Section with no unwinding information. + # Linker should insert a cantunwind entry. + .section .after, "xa" + .global __c6xabi_unwind_cpp_pr3 + .type __c6xabi_unwind_cpp_pr3, %function +__c6xabi_unwind_cpp_pr3: + nop + .p2align 6 + + .section .far + .word 0 diff --git a/ld/testsuite/ld-tic6x/unwind-2.d b/ld/testsuite/ld-tic6x/unwind-2.d new file mode 100644 index 0000000..11a24d4 --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind-2.d @@ -0,0 +1,10 @@ +#ld: -T unwind.ld +#objdump: -s + +.*: file format.* + +#... +Contents of section .c6xabi.exidx: + 9000 (00f8ff7f 07020083 1cf8ff7f 01000000|7ffff800 83000207 7ffff81c 00000001) .* +Contents of section .far: +#... diff --git a/ld/testsuite/ld-tic6x/unwind-2.s b/ld/testsuite/ld-tic6x/unwind-2.s new file mode 100644 index 0000000..dbfd3bd --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind-2.s @@ -0,0 +1,23 @@ + .cfi_sections .c6xabi.exidx + .text + + .global __c6xabi_unwind_cpp_pr3 + .type __c6xabi_unwind_cpp_pr3, %function +__c6xabi_unwind_cpp_pr3: + .global _start + .type _start, %function +_start: + .cfi_startproc + .cfi_offset B3, 0 + .cfi_def_cfa_offset 8 + nop + .p2align 6 + .cfi_endproc + .personalityindex 3 + .endp + + # last text section has unwind information. Linker should append a + # terminating cantunwind entry. + + .section .far + .word 0 diff --git a/ld/testsuite/ld-tic6x/unwind-3.d b/ld/testsuite/ld-tic6x/unwind-3.d new file mode 100644 index 0000000..9ec69a0 --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind-3.d @@ -0,0 +1,11 @@ +#ld: -T unwind.ld +#objdump: -s + +.*: file format.* + +#... +Contents of section .c6xabi.exidx: + 9000 (00f8ff7f 07020083 1cf8ff7f 01000000|7ffff800 83000207 7ffff81c 00000001) .* + 9010 (38f8ff7f 07040083 54f8ff7f 01000000|7ffff838 82000407 7ffff854 00000001) .* +Contents of section .far: +#... diff --git a/ld/testsuite/ld-tic6x/unwind-3.s b/ld/testsuite/ld-tic6x/unwind-3.s new file mode 100644 index 0000000..480ee49 --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind-3.s @@ -0,0 +1,39 @@ + .cfi_sections .c6xabi.exidx + .text + # section without unwind info + .global _start + .type _start, %function +_start: + b .s2 _before + nop 5 + .p2align 6 + + # Section that will be placed first + .section .before, "xa" + .type _before, %function +_before: + .cfi_startproc + .cfi_offset B3, 0 + .cfi_def_cfa_offset 8 + nop + .p2align 6 + .cfi_endproc + .personalityindex 3 + .endp + + # section that will be placed last + .section .after, "xa" + .global __c6xabi_unwind_cpp_pr3 + .type __c6xabi_unwind_cpp_pr3, %function +__c6xabi_unwind_cpp_pr3: + .cfi_startproc + .cfi_offset B10, 0 + .cfi_def_cfa_offset 8 + nop + .p2align 6 + .cfi_endproc + .personalityindex 3 + .endp + + .section .far + .word 0 diff --git a/ld/testsuite/ld-tic6x/unwind-4.d b/ld/testsuite/ld-tic6x/unwind-4.d new file mode 100644 index 0000000..e5c628e --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind-4.d @@ -0,0 +1,11 @@ +#ld: -T unwind.ld +#objdump: -s + +.*: file format.* + +#... +Contents of section .c6xabi.exidx: + 9000 (00f8ff7f 07020083 1cf8ff7f 7af8ff7f|7ffff800 83000207 7ffff81c 7ffff87a) .* + 9010 (38f8ff7f 07020083 56f8ff7f 01000000|7ffff838 83000207 7ffff856 00000001) .* +Contents of section .far: +#... diff --git a/ld/testsuite/ld-tic6x/unwind-4.s b/ld/testsuite/ld-tic6x/unwind-4.s new file mode 100644 index 0000000..83f3d0d --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind-4.s @@ -0,0 +1,68 @@ + .cfi_sections .c6xabi.exidx + .text + # out of line table entry + .global _start + .type _start, %function +_start: + .cfi_startproc + .cfi_offset B3, 0 + .cfi_def_cfa_offset 8 + nop + .p2align 6 + .cfi_endproc + .personalityindex 3 + .handlerdata + .word 0 + .endp + + # entry that can be merged + .cfi_startproc + .cfi_offset B3, 0 + .cfi_def_cfa_offset 8 + nop + .p2align 6 + .cfi_endproc + .personalityindex 3 + .endp + + # Section that will be placed first + .section .before, "xa" + .type _before, %function +_before: + .cfi_startproc + .cfi_offset B3, 0 + .cfi_def_cfa_offset 8 + nop + .p2align 6 + .cfi_endproc + .personalityindex 3 + .endp + + # section that will be placed last + .section .after, "xa" + .global __c6xabi_unwind_cpp_pr3 + .type __c6xabi_unwind_cpp_pr3, %function +__c6xabi_unwind_cpp_pr3: + # entry that can be merged + .cfi_startproc + .cfi_offset B3, 0 + .cfi_def_cfa_offset 8 + nop + .cfi_endproc + .personalityindex 3 + .endp + + # final function is cantunwind, so output table size is smaller + # than sum of input sections + .global foo + .type foo, %function +foo: + .cfi_startproc + nop + .p2align 6 + .cfi_endproc + .cantunwind + .endp + + .section .far + .word 0 diff --git a/ld/testsuite/ld-tic6x/unwind-5.d b/ld/testsuite/ld-tic6x/unwind-5.d new file mode 100644 index 0000000..4928874 --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind-5.d @@ -0,0 +1,7 @@ +#ld: -T discard-unwind.ld +#objdump: -s + +.*: file format.* + +# Check we don't crash when discarding unwind info. +#... diff --git a/ld/testsuite/ld-tic6x/unwind-5.s b/ld/testsuite/ld-tic6x/unwind-5.s new file mode 100644 index 0000000..b4fc213 --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind-5.s @@ -0,0 +1,16 @@ + .cfi_sections .c6xabi.exidx + .text + .global __c6xabi_unwind_cpp_pr3 + .type __c6xabi_unwind_cpp_pr3, %function +__c6xabi_unwind_cpp_pr3: + .global _start + .type _start, %function +_start: + .cfi_startproc + .cfi_offset B3, 0 + .cfi_def_cfa_offset 8 + nop + .p2align 6 + .cfi_endproc + .personalityindex 3 + .endp diff --git a/ld/testsuite/ld-tic6x/unwind-6.d b/ld/testsuite/ld-tic6x/unwind-6.d new file mode 100644 index 0000000..5de8ee6 --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind-6.d @@ -0,0 +1,13 @@ +#ld: -T unwind.ld +#source unwind-4.s +#as: -mgenerate-rel +#objdump: -s + +.*: file format.* + +#... +Contents of section .c6xabi.exidx: + 9000 (00f8ff7f 07020083 1cf8ff7f 7af8ff7f|7ffff800 83000207 7ffff81c 7ffff87a) .* + 9010 (38f8ff7f 07020083 56f8ff7f 01000000|7ffff838 83000207 7ffff856 00000001) .* +Contents of section .far: +#... diff --git a/ld/testsuite/ld-tic6x/unwind.ld b/ld/testsuite/ld-tic6x/unwind.ld new file mode 100644 index 0000000..a4f8722 --- /dev/null +++ b/ld/testsuite/ld-tic6x/unwind.ld @@ -0,0 +1,20 @@ +/* Script for unwinding ld tests */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = 0x8000; + .text : + { + *(.before) + *(.text) + *(.after) + *(.c6xabi.extab*) + } =0 + . = 0x9000; + .c6xabi.exidx : { *(.c6xabi.exidx*) } + . = 0xa000; + .got : { *(.got) *(.got.plt)} + . = 0x12340000; + .far : { *(.far) } + .c6xabi.attribues 0 : { *(.c6xabi.atttributes) } +} diff --git a/ld/testsuite/ld-tilegx/external.s b/ld/testsuite/ld-tilegx/external.s new file mode 100644 index 0000000..ab681bc --- /dev/null +++ b/ld/testsuite/ld-tilegx/external.s @@ -0,0 +1,43 @@ + .text + .global external1 +external1: + j external1 + + .global external2 +external2: + j external1 + + .global external_5a +external_5a = 19 + .global external_5b +external_5b = 31 + + .global external_8a +external_8a = 17 + .global external_8b +external_8b = 119 + + .global external_16a +external_16a = -32134 + .global external_16b +external_16b = 19300 + + .global external_32a +external_32a = 0x12345678 + .global external_32b +external_32b = -0x76543210 + + .global external_48a +external_48a = 0x123456789abc + .global external_48b +external_48b = 0x76543210fedc + + .global external_64a +external_64a = 0x123456789abcdef0 + .global external_64b +external_64b = 0xfedcba9876543210 + + .data + + .global external_data1 +external_data1: diff --git a/ld/testsuite/ld-tilegx/reloc.d b/ld/testsuite/ld-tilegx/reloc.d new file mode 100644 index 0000000..c9acdac --- /dev/null +++ b/ld/testsuite/ld-tilegx/reloc.d @@ -0,0 +1,70 @@ + +.*: file format elf64-tilegx.* + +Contents of section .text: + 100b0 .* + 100c0 .* + 100d0 .* + 100e0 .* + 100f0 .* + 10100 .* + 10110 .* + 10120 .* + 10130 .* + 10140 .* + 10150 .* + 10160 .* + 10170 .* + 10180 .* + 10190 .* + 101a0 .* + 101b0 .* + 101c0 .* +Contents of section .data: + 201e0 b8010100 c0010100 7a82644b 11773200 .* + 201f0 00002e00 2c7a8234 12785634 127856bc .* + 20200 9a341278 56bc9af0 de000000 00000000 .* + 20210 00000000 00000000 00000000 00000000 .* + +Disassembly of section .text: + +00000000000100b0 <_start>: + 100b0: [0-9a-f]* { add r2, zero, zero } + 100b8: [0-9a-f]* { j 101b8 } + 100c0: [0-9a-f]* { add r3, r2, r2 } + 100c8: [0-9a-f]* { beqzt zero, 101c0 } + 100d0: [0-9a-f]* { movei r2, 17 ; movei r3, 119 } + 100d8: [0-9a-f]* { movei r2, 17 ; movei r3, 119 ; ld zero, zero } + 100e0: [0-9a-f]* { mtspr 17, zero } + 100e8: [0-9a-f]* { mfspr zero, 17 } + 100f0: [0-9a-f]* { moveli r2, -32134 ; moveli r3, 19300 } + 100f8: [0-9a-f]* { moveli r2, 4660 ; moveli r3, -30293 } + 10100: [0-9a-f]* { shl16insli r2, r2, 22136 ; shl16insli r3, r3, -12816 } + 10108: [0-9a-f]* { moveli r2, 4660 ; moveli r3, 30292 } + 10110: [0-9a-f]* { shl16insli r2, r2, 22136 ; shl16insli r3, r3, 12816 } + 10118: [0-9a-f]* { shl16insli r2, r2, -25924 ; shl16insli r3, r3, -292 } + 10120: [0-9a-f]* { moveli r2, 4660 ; moveli r3, -292 } + 10128: [0-9a-f]* { shl16insli r2, r2, 22136 ; shl16insli r3, r3, -17768 } + 10130: [0-9a-f]* { shl16insli r2, r2, -25924 ; shl16insli r3, r3, 30292 } + 10138: [0-9a-f]* { shl16insli r2, r2, -8464 ; shl16insli r3, r3, 12816 } + 10140: [0-9a-f]* { ld_add r0, r0, 17 } + 10148: [0-9a-f]* { st_add r0, r0, 17 } + 10150: [0-9a-f]* { mm r2, r3, 19, 31 } + 10158: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 } + 10160: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 ; ld zero, zero } + 10168: [0-9a-f]* { moveli r0, 80 ; moveli r1, 80 } + 10170: [0-9a-f]* { moveli r0, 1 ; moveli r1, 1 } + 10178: [0-9a-f]* { moveli r0, 168 ; moveli r1, 168 } + 10180: [0-9a-f]* { moveli r0, 4096 ; moveli r1, 4096 } + 10188: [0-9a-f]* { moveli r0, 1 ; moveli r1, 1 } + 10190: [0-9a-f]* { moveli r0, 144 ; moveli r1, 144 } + 10198: [0-9a-f]* { moveli r0, 4096 ; moveli r1, 4096 } + 101a0: [0-9a-f]* { moveli r0, 0 ; moveli r1, 0 } + 101a8: [0-9a-f]* { moveli r0, 1 ; moveli r1, 1 } + 101b0: [0-9a-f]* { moveli r0, 112 ; moveli r1, 112 } + +00000000000101b8 : + 101b8: [0-9a-f]* { j 101b8 } + +00000000000101c0 : + 101c0: [0-9a-f]* { j 101b8 } diff --git a/ld/testsuite/ld-tilegx/reloc.s b/ld/testsuite/ld-tilegx/reloc.s new file mode 100644 index 0000000..4a19388 --- /dev/null +++ b/ld/testsuite/ld-tilegx/reloc.s @@ -0,0 +1,77 @@ + .text + .global _start +_start: + add r2,zero,zero + j external1 + + add r3,r2,r2 + beqzt zero,external2 + + { movei r2,external_8a; movei r3,external_8b } + { movei r2,external_8a; movei r3,external_8b; ld zero,zero } + { mtspr external_8a,zero } + { mfspr zero,external_8a } + { moveli r2,external_16a; moveli r3,external_16b } + + { moveli r2,hw1_last(external_32a); moveli r3,hw1_last(external_32b) } + { shl16insli r2,r2,hw0(external_32a); shl16insli r3,r3,hw0(external_32b) } + + { moveli r2,hw2_last(external_48a); moveli r3,hw2_last(external_48b) } + { shl16insli r2,r2,hw1(external_48a); shl16insli r3,r3,hw1(external_48b) } + { shl16insli r2,r2,hw0(external_48a); shl16insli r3,r3,hw0(external_48b) } + + { moveli r2,hw3_last(external_64a); moveli r3,hw3_last(external_64b) } + { shl16insli r2,r2,hw2(external_64a); shl16insli r3,r3,hw2(external_64b) } + { shl16insli r2,r2,hw1(external_64a); shl16insli r3,r3,hw1(external_64b) } + { shl16insli r2,r2,hw0(external_64a); shl16insli r3,r3,hw0(external_64b) } + + { ld_add r0,r0,external_8a } + { st_add r0,r0,external_8a } + { mm r2,r3,external_5a,external_5b } + { shli r2,r3,external_5a; shli r4,r5,external_5b } + { shli r2,r3,external_5a; shli r4,r5,external_5b; ld zero,zero } + + { moveli r0, external1 - .; moveli r1, external1 - . } + { moveli r0, hw1_last(external_data1 - .) + moveli r1, hw1_last(external_data1 - .) } + { moveli r0, hw0(external_data1 - .) + moveli r1, hw0(external_data1 - .) } + { moveli r0, hw2_last(external_data1 - . + 0x100000000000) + moveli r1, hw2_last(external_data1 - . + 0x100000000000) } + { moveli r0, hw1(external_data1 - . + 0x100000000000) + moveli r1, hw1(external_data1 - . + 0x100000000000) } + { moveli r0, hw0(external_data1 - . + 0x100000000000) + moveli r1, hw0(external_data1 - . + 0x100000000000) } + { moveli r0, hw3_last(external_data1 - . + 0x1000000000000000) + moveli r1, hw3_last(external_data1 - . + 0x1000000000000000) } + { moveli r0, hw2(external_data1 - . + 0x1000000000000000) + moveli r1, hw2(external_data1 - . + 0x1000000000000000) } + { moveli r0, hw1(external_data1 - . + 0x1000000000000000) + moveli r1, hw1(external_data1 - . + 0x1000000000000000) } + { moveli r0, hw0(external_data1 - . + 0x1000000000000000) + moveli r1, hw0(external_data1 - . + 0x1000000000000000) } + + .data + .align 0x20 + .int external1 + .int external2 + .short external_16a, external_16b + .byte external_8a, external_8b + + .int (external_data1-.) + .short (external_data1-.) + .byte (external_data1-.) + + .short hw0_last(external_16a) + + .short hw1_last(external_32a) + .short hw0(external_32a) + + .short hw2_last(external_48a) + .short hw1(external_48a) + .short hw0(external_48a) + + .short hw3(external_64a) + .short hw2(external_64a) + .short hw1(external_64a) + .short hw0(external_64a) diff --git a/ld/testsuite/ld-tilegx/tilegx.exp b/ld/testsuite/ld-tilegx/tilegx.exp new file mode 100644 index 0000000..856b41e --- /dev/null +++ b/ld/testsuite/ld-tilegx/tilegx.exp @@ -0,0 +1,37 @@ +# Expect script for TILE-Gx linker tests. +# Copyright 2011 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +if {!([istarget "tilegx-*-*"]) } { + return +} + +# Set up a list as described in ld-lib.exp + +set tilepro_tests { + { "tilegx relocation resolution linker test" + "" + "" + { "reloc.s" "external.s" } + { {objdump -ds reloc.d} } + "reloc" + } +} + +run_ld_link_tests $tilepro_tests diff --git a/ld/testsuite/ld-tilepro/external.s b/ld/testsuite/ld-tilepro/external.s new file mode 100644 index 0000000..93d7556 --- /dev/null +++ b/ld/testsuite/ld-tilepro/external.s @@ -0,0 +1,33 @@ + .text + .global external1 +external1: + j external1 + + .global external2 +external2: + j external1 + + .global external_5a +external_5a = 19 + .global external_5b +external_5b = 31 + + .global external_8a +external_8a = 17 + .global external_8b +external_8b = 119 + + .global external_16a +external_16a = -32134 + .global external_16b +external_16b = 19300 + + .global external_32a +external_32a = 0x87654321 + .global external_32b +external_32b = 0xfedcba98 + + .data + + .global external_data1 +external_data1: diff --git a/ld/testsuite/ld-tilepro/reloc.d b/ld/testsuite/ld-tilepro/reloc.d new file mode 100644 index 0000000..35f0436 --- /dev/null +++ b/ld/testsuite/ld-tilepro/reloc.d @@ -0,0 +1,52 @@ + +.*: file format elf32-tilepro.* + +Contents of section .text: + 10078 .* + 10088 .* + 10098 .* + 100a8 .* + 100b8 .* + 100c8 .* + 100d8 .* + 100e8 .* + 100f8 .* + 10108 .* + 10118 .* + 10128 .* +Contents of section .data: + 20140 20010100 28010100 7a82644b 11773200 .* + 20150 00002e00 2c214398 ba6587dc fe6587dd .* + 20160 fe000000 00000000 00000000 00000000 .* + 20170 00000000 00000000 00000000 00000000 .* +Disassembly of section .text: + +00010078 <_start>: + 10078: [0-9a-f]* { add r2, zero, zero } + 10080: [0-9a-f]* { j 10120 } + 10088: [0-9a-f]* { add r3, r2, r2 } + 10090: [0-9a-f]* { bzt zero, 10128 } + 10098: [0-9a-f]* { movei r2, 17 ; movei r3, 119 } + 100a0: [0-9a-f]* { movei r2, 17 ; movei r3, 119 ; lw zero, zero } + 100a8: [0-9a-f]* { mtspr 17, zero } + 100b0: [0-9a-f]* { mfspr zero, 17 } + 100b8: [0-9a-f]* { moveli r2, -32134 ; moveli r3, 19300 } + 100c0: [0-9a-f]* { moveli r2, 17185 ; moveli r3, -17768 } + 100c8: [0-9a-f]* { addli r2, r2, -30875 ; addli r3, r3, -292 } + 100d0: [0-9a-f]* { auli r2, r2, -30875 ; auli r3, r3, -291 } + 100d8: [0-9a-f]* { swadd r0, r0, 17 } + 100e0: [0-9a-f]* { mm r2, r3, r4, 19, 31 } + 100e8: [0-9a-f]* { nop ; mm r5, r6, r7, 19, 31 } + 100f0: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 } + 100f8: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 ; lw zero, zero } + 10100: [0-9a-f]* { moveli r0, 32 } + 10108: [0-9a-f]* { moveli r0, 120 } + 10110: [0-9a-f]* { moveli r0, 1 } + 10118: [0-9a-f]* { moveli r0, 1 } + + +00010120 : + 10120: [0-9a-f]* { j 10120 } + +00010128 : + 10128: [0-9a-f]* { j 10120 } diff --git a/ld/testsuite/ld-tilepro/reloc.s b/ld/testsuite/ld-tilepro/reloc.s new file mode 100644 index 0000000..cc9ed0e --- /dev/null +++ b/ld/testsuite/ld-tilepro/reloc.s @@ -0,0 +1,47 @@ + .text + .global _start +_start: + add r2,zero,zero + j external1 + + add r3,r2,r2 + bzt zero,external2 + + { movei r2,external_8a; movei r3,external_8b } + { movei r2,external_8a; movei r3,external_8b; lw zero,zero } + { mtspr external_8a,zero } + { mfspr zero,external_8a } + { moveli r2,external_16a; moveli r3,external_16b } + + { moveli r2,lo16(external_32a); moveli r3,lo16(external_32b) } + { addli r2,r2,hi16(external_32a); addli r3,r3,hi16(external_32b) } + { auli r2,r2,ha16(external_32a); auli r3,r3,ha16(external_32b) } + + { swadd r0,r0,external_8a } + { mm r2,r3,r4,external_5a,external_5b } + { nop; mm r5,r6,r7,external_5a,external_5b } + { shli r2,r3,external_5a; shli r4,r5,external_5b } + { shli r2,r3,external_5a; shli r4,r5,external_5b; lw zero,zero } + + moveli r0, external1 - . + moveli r0, lo16(external_data1 - .) + moveli r0, hi16(external_data1 - . + 30000) + moveli r0, ha16(external_data1 - . + 30000) + + .data + .align 0x20 + .int external1 + .int external2 + .short external_16a, external_16b + .byte external_8a, external_8b + + .int (external_data1-.) + .short (external_data1-.) + .byte (external_data1-.) + + .short lo16(external_32a) + .short lo16(external_32b) + .short hi16(external_32a) + .short hi16(external_32b) + .short ha16(external_32a) + .short ha16(external_32b) diff --git a/ld/testsuite/ld-tilepro/tilepro.exp b/ld/testsuite/ld-tilepro/tilepro.exp new file mode 100644 index 0000000..1cb4fde --- /dev/null +++ b/ld/testsuite/ld-tilepro/tilepro.exp @@ -0,0 +1,37 @@ +# Expect script for TILEPro linker tests. +# Copyright 2011 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +if {!([istarget "tilepro-*-*"]) } { + return +} + +# Set up a list as described in ld-lib.exp + +set tilepro_tests { + { "tilepro relocation resolution linker test" + "" + "" + { "reloc.s" "external.s" } + { {objdump -ds reloc.d} } + "reloc" + } +} + +run_ld_link_tests $tilepro_tests diff --git a/ld/testsuite/ld-undefined/weak-undef.exp b/ld/testsuite/ld-undefined/weak-undef.exp index e7e949a..2f70eeb 100644 --- a/ld/testsuite/ld-undefined/weak-undef.exp +++ b/ld/testsuite/ld-undefined/weak-undef.exp @@ -1,5 +1,5 @@ # Test handling of weak undefined symbols -# Copyright 2001, 2002, 2004, 2005, 2007, 2010 +# Copyright 2001, 2002, 2004, 2005, 2007, 2010, 2011 # Free Software Foundation, Inc. # # This file is part of the GNU Binutils. @@ -50,7 +50,7 @@ if {! [istarget i?86-*-*]} { setup_xfail *-*-pe* } -setup_xfail hppa64-*-* pj-*-* +setup_xfail pj-*-* if {! [ld_assemble $as $srcdir/$subdir/weak-undef.s tmpdir/weak-undef.o]} then { # It's OK if .weak doesn't work on this target. diff --git a/ld/testsuite/ld-unique/unique.exp b/ld/testsuite/ld-unique/unique.exp index 4d73e32..d9e93ca 100644 --- a/ld/testsuite/ld-unique/unique.exp +++ b/ld/testsuite/ld-unique/unique.exp @@ -149,8 +149,8 @@ if { $fails != 0 } { } # Check the object file. -if {! [check_osabi tmpdir/unique.o {UNIX - Linux}]} { - fail "Object containing unique does not have an OS/ABI field of LINUX" +if {! [check_osabi tmpdir/unique.o {UNIX - GNU}]} { + fail "Object containing unique does not have an OS/ABI field of GNU" set fails [expr $fails + 1] } @@ -164,8 +164,8 @@ if { $fails == 0 } { } # Check the executable. -if {! [check_osabi tmpdir/unique_prog {UNIX - Linux}]} { - fail "Executable containing unique does not have an OS/ABI field of LINUX" +if {! [check_osabi tmpdir/unique_prog {UNIX - GNU}]} { + fail "Executable containing unique does not have an OS/ABI field of GNU" set fails [expr $fails + 1] } @@ -194,8 +194,8 @@ if { $fails == 0 } { } # Check the unique PIC file. -if {! [check_osabi tmpdir/unique_shared.o {UNIX - Linux}]} { - fail "PIC Object containing unique does not have an OS/ABI field of LINUX" +if {! [check_osabi tmpdir/unique_shared.o {UNIX - GNU}]} { + fail "PIC Object containing unique does not have an OS/ABI field of GNU" set fails [expr $fails + 1] } @@ -209,8 +209,8 @@ if { $fails == 0 } { } # Check the unique shared library. -if {! [check_osabi tmpdir/libunique_shared.so {UNIX - Linux}]} { - fail "Shared library containing unique does not have an OS/ABI field of LINUX" +if {! [check_osabi tmpdir/libunique_shared.so {UNIX - GNU}]} { + fail "Shared library containing unique does not have an OS/ABI field of GNU" set fails [expr $fails + 1] } diff --git a/ld/testsuite/ld-x86-64/abs-k1om.d b/ld/testsuite/ld-x86-64/abs-k1om.d new file mode 100644 index 0000000..2c26639 --- /dev/null +++ b/ld/testsuite/ld-x86-64/abs-k1om.d @@ -0,0 +1,11 @@ +#name: Absolute non-overflowing relocs +#source: ../ld-i386/abs.s +#source: ../ld-i386/zero.s +#as: --64 -march=k1om +#ld: -m elf_k1om +#objdump: -rs -j .text + +.*: file format .* + +Contents of section \.text: +[ ][0-9a-f]+ c800fff0 c8000110 c9c3.* diff --git a/ld/testsuite/ld-x86-64/ilp32-4.d b/ld/testsuite/ld-x86-64/ilp32-4.d index e8690b3..84dc7b2 100644 --- a/ld/testsuite/ld-x86-64/ilp32-4.d +++ b/ld/testsuite/ld-x86-64/ilp32-4.d @@ -1,6 +1,6 @@ #source: start.s #as: --x32 -#ld: -m elf32_x86_64 -shared +#ld: -m elf32_x86_64 -shared --no-ld-generated-unwind-info #readelf: -d -S --wide There are 10 section headers, starting at offset 0x22c: diff --git a/ld/testsuite/ld-x86-64/ilp32-6.d b/ld/testsuite/ld-x86-64/ilp32-6.d new file mode 100644 index 0000000..dbd808e --- /dev/null +++ b/ld/testsuite/ld-x86-64/ilp32-6.d @@ -0,0 +1,3 @@ +#as: --x32 +#ld: -m elf32_x86_64 -Ttext-segment 0xe0000000 +#error: .*relocation truncated to fit: R_X86_64_32S.* diff --git a/ld/testsuite/ld-x86-64/ilp32-6.s b/ld/testsuite/ld-x86-64/ilp32-6.s new file mode 100644 index 0000000..f49edf7 --- /dev/null +++ b/ld/testsuite/ld-x86-64/ilp32-6.s @@ -0,0 +1,3 @@ + .globl _start +_start: + mov $_start,%rax diff --git a/ld/testsuite/ld-x86-64/ilp32-7.d b/ld/testsuite/ld-x86-64/ilp32-7.d new file mode 100644 index 0000000..dbd808e --- /dev/null +++ b/ld/testsuite/ld-x86-64/ilp32-7.d @@ -0,0 +1,3 @@ +#as: --x32 +#ld: -m elf32_x86_64 -Ttext-segment 0xe0000000 +#error: .*relocation truncated to fit: R_X86_64_32S.* diff --git a/ld/testsuite/ld-x86-64/ilp32-7.s b/ld/testsuite/ld-x86-64/ilp32-7.s new file mode 100644 index 0000000..397aba3 --- /dev/null +++ b/ld/testsuite/ld-x86-64/ilp32-7.s @@ -0,0 +1,3 @@ + .globl _start +_start: + mov _start,%rax diff --git a/ld/testsuite/ld-x86-64/ilp32-8.d b/ld/testsuite/ld-x86-64/ilp32-8.d new file mode 100644 index 0000000..2fe2c60 --- /dev/null +++ b/ld/testsuite/ld-x86-64/ilp32-8.d @@ -0,0 +1,13 @@ +#as: --x32 +#ld: -m elf32_x86_64 -Ttext-segment 0xe0000000 +#objdump: -dw + +.*: +file format elf32-x86-64 + + +Disassembly of section .text: + +e0000054 <_start>: +[ ]*[a-f0-9]+: 48 b8 54 00 00 e0 00 00 00 00 movabs \$0xe0000054,%rax +[ ]*[a-f0-9]+: 48 a1 54 00 00 e0 00 00 00 00 movabs 0xe0000054,%rax +#pass diff --git a/ld/testsuite/ld-x86-64/ilp32-8.s b/ld/testsuite/ld-x86-64/ilp32-8.s new file mode 100644 index 0000000..c466a6c --- /dev/null +++ b/ld/testsuite/ld-x86-64/ilp32-8.s @@ -0,0 +1,5 @@ + .text + .globl _start +_start: + movabs $_start,%rax + movabs _start,%rax diff --git a/ld/testsuite/ld-x86-64/ilp32-9.d b/ld/testsuite/ld-x86-64/ilp32-9.d new file mode 100644 index 0000000..8fced17 --- /dev/null +++ b/ld/testsuite/ld-x86-64/ilp32-9.d @@ -0,0 +1,9 @@ +#as: --x32 +#ld: -m elf32_x86_64 -Ttext-segment 0xe0000000 +#objdump: -s -j .text + +.*: +file format .* + +Contents of section .text: + e0000054 540000e0 00000000 T....... +#pass diff --git a/ld/testsuite/ld-x86-64/ilp32-9.s b/ld/testsuite/ld-x86-64/ilp32-9.s new file mode 100644 index 0000000..432a458 --- /dev/null +++ b/ld/testsuite/ld-x86-64/ilp32-9.s @@ -0,0 +1,4 @@ + .text + .globl _start +_start: + .quad _start diff --git a/ld/testsuite/ld-x86-64/pcrel16.d b/ld/testsuite/ld-x86-64/pcrel16.d index f593657..5bbbb3e 100644 --- a/ld/testsuite/ld-x86-64/pcrel16.d +++ b/ld/testsuite/ld-x86-64/pcrel16.d @@ -3,7 +3,7 @@ #ld: -Ttext 0x0 #objdump: -drj.text -m i8086 -.*: +file format elf64-x86-64 +.*: +file format elf.*-x86-64 Disassembly of section .text: diff --git a/ld/testsuite/ld-x86-64/pr12718.d b/ld/testsuite/ld-x86-64/pr12718.d new file mode 100644 index 0000000..ed04fd6 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr12718.d @@ -0,0 +1,19 @@ +#name: PR ld/12718 +#as: --64 +#ld: -melf_x86_64 +#readelf: -S --wide + +There are 5 section headers, starting at offset 0xa0: + +Section Headers: + \[Nr\] Name Type Address Off Size ES Flg Lk Inf Al + \[ 0\] NULL 0000000000000000 000000 000000 00 0 0 0 + \[ 1\] .text PROGBITS 0000000000400078 000078 000006 00 AX 0 0 4 + \[ 2\] .shstrtab STRTAB 0000000000000000 00007e 000021 00 0 0 1 + \[ 3\] .symtab SYMTAB 0000000000000000 0001e0 0000a8 18 4 2 8 + \[ 4\] .strtab STRTAB 0000000000000000 000288 000024 00 0 0 1 +Key to Flags: + W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\), l \(large\) + I \(info\), L \(link order\), G \(group\), T \(TLS\), E \(exclude\), x \(unknown\) + O \(extra OS processing required\) o \(OS specific\), p \(processor specific\) +#pass diff --git a/ld/testsuite/ld-x86-64/pr12718.s b/ld/testsuite/ld-x86-64/pr12718.s new file mode 100644 index 0000000..162704e --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr12718.s @@ -0,0 +1,4 @@ +.globl foo +foo: ret +.globl _start +_start: call foo diff --git a/ld/testsuite/ld-x86-64/pr12921.d b/ld/testsuite/ld-x86-64/pr12921.d new file mode 100644 index 0000000..c0fe8ab --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr12921.d @@ -0,0 +1,21 @@ +#name: PR ld/12921 +#as: --64 +#ld: -melf_x86_64 +#readelf: -S --wide + +There are 7 section headers, starting at offset 0x2058: + +Section Headers: + \[Nr\] Name Type Address Off Size ES Flg Lk Inf Al + \[ 0\] NULL 0000000000000000 000000 000000 00 0 0 0 + \[ 1\] .text PROGBITS 0000000000401000 001000 000001 00 AX 0 0 4096 + \[ 2\] .data PROGBITS 0000000000602000 002000 000028 00 WA 0 0 4096 + \[ 3\] .bss NOBITS 0000000000603000 002028 010000 00 WA 0 0 4096 + \[ 4\] .shstrtab STRTAB 0000000000000000 002028 00002c 00 0 0 1 + \[ 5\] .symtab SYMTAB 0000000000000000 002218 000120 18 6 6 8 + \[ 6\] .strtab STRTAB 0000000000000000 002338 000037 00 0 0 1 +Key to Flags: + W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\), l \(large\) + I \(info\), L \(link order\), G \(group\), T \(TLS\), E \(exclude\), x \(unknown\) + O \(extra OS processing required\) o \(OS specific\), p \(processor specific\) +#pass diff --git a/ld/testsuite/ld-x86-64/pr12921.s b/ld/testsuite/ld-x86-64/pr12921.s new file mode 100644 index 0000000..9c4966f --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr12921.s @@ -0,0 +1,25 @@ + .text + .balign 4096 +vtext: + .p2align 4,,15 + .globl _start + .type _start, @function +_start: + ret + .size _start, .-_start + .globl vdata + .data + .align 4096 + .type vdata, @object + .size vdata, 4 +vdata: + .long 5 + .comm vbss,65536,4096 + .align 16 + .type local, @object + .size local, 24 +local: + .byte 77 + .zero 7 + .dc.a local + .dc.a 0 diff --git a/ld/testsuite/ld-x86-64/pr13082-1.s b/ld/testsuite/ld-x86-64/pr13082-1.s new file mode 100644 index 0000000..6c03e98 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-1.s @@ -0,0 +1,10 @@ + .text + .globl _start +_start: + lea .Ljmp(%rip), %rax +.L1: + jmp *(%rax) + .section .data.rel.ro.local,"aw",@progbits + .align 8 +.Ljmp: + .quad .L1 diff --git a/ld/testsuite/ld-x86-64/pr13082-1a.d b/ld/testsuite/ld-x86-64/pr13082-1a.d new file mode 100644 index 0000000..f0e98ff --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-1a.d @@ -0,0 +1,9 @@ +#source: pr13082-1.s +#name: PR ld/13082-1 (a) +#as: --x32 +#ld: -shared -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE64 +[0-9a-f]+ diff --git a/ld/testsuite/ld-x86-64/pr13082-1b.d b/ld/testsuite/ld-x86-64/pr13082-1b.d new file mode 100644 index 0000000..f10481f --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-1b.d @@ -0,0 +1,9 @@ +#source: pr13082-1.s +#name: PR ld/13082-1 (b) +#as: --x32 +#ld: -pie -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE64 +[0-9a-f]+ diff --git a/ld/testsuite/ld-x86-64/pr13082-2.s b/ld/testsuite/ld-x86-64/pr13082-2.s new file mode 100644 index 0000000..d1847a6 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-2.s @@ -0,0 +1,9 @@ + .text + .globl _start +_start: + lea .Ljmp(%rip), %rax + jmp *(%rax) + .section .data.rel.ro.local,"aw",@progbits + .align 8 +.Ljmp: + .quad _start diff --git a/ld/testsuite/ld-x86-64/pr13082-2a.d b/ld/testsuite/ld-x86-64/pr13082-2a.d new file mode 100644 index 0000000..aed33c2 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-2a.d @@ -0,0 +1,9 @@ +#source: pr13082-2.s +#name: PR ld/13082-2 (a) +#as: --x32 +#ld: -shared -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_32 +[0-9a-f]+ +_start \+ 0 diff --git a/ld/testsuite/ld-x86-64/pr13082-2b.d b/ld/testsuite/ld-x86-64/pr13082-2b.d new file mode 100644 index 0000000..b000e85 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-2b.d @@ -0,0 +1,9 @@ +#source: pr13082-2.s +#name: PR ld/13082-2 (b) +#as: --x32 +#ld: -pie -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9a-f]+ diff --git a/ld/testsuite/ld-x86-64/pr13082-3.s b/ld/testsuite/ld-x86-64/pr13082-3.s new file mode 100644 index 0000000..b76eb0f --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-3.s @@ -0,0 +1,10 @@ + .text + .globl _start +_start: + lea .Ljmp(%rip), %rax + jmp *(%rax) + .section .data.rel.ro.local,"aw",@progbits + .weak func + .align 8 +.Ljmp: + .quad func diff --git a/ld/testsuite/ld-x86-64/pr13082-3a.d b/ld/testsuite/ld-x86-64/pr13082-3a.d new file mode 100644 index 0000000..bf176f9 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-3a.d @@ -0,0 +1,9 @@ +#source: pr13082-3.s +#name: PR ld/13082-3 (a) +#as: --x32 +#ld: -shared -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_32 +[0-9a-f]+ +func \+ 0 diff --git a/ld/testsuite/ld-x86-64/pr13082-3b.d b/ld/testsuite/ld-x86-64/pr13082-3b.d new file mode 100644 index 0000000..12efaf0 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-3b.d @@ -0,0 +1,9 @@ +#source: pr13082-3.s +#name: PR ld/13082-3 (b) +#as: --x32 +#ld: -pie -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_32 +[0-9a-f]+ +func \+ 0 diff --git a/ld/testsuite/ld-x86-64/pr13082-4.s b/ld/testsuite/ld-x86-64/pr13082-4.s new file mode 100644 index 0000000..ed8506d --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-4.s @@ -0,0 +1,10 @@ + .text + .globl _start +_start: + lea .Ljmp(%rip), %rax + jmp *(%rax) + .section .data.rel.ro.local,"aw",@progbits + .weak func + .align 8 +.Ljmp: + .quad func + 1 diff --git a/ld/testsuite/ld-x86-64/pr13082-4a.d b/ld/testsuite/ld-x86-64/pr13082-4a.d new file mode 100644 index 0000000..bb2c573 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-4a.d @@ -0,0 +1,9 @@ +#source: pr13082-4.s +#name: PR ld/13082-4 (a) +#as: --x32 +#ld: -shared -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_64 +[0-9a-f]+ +func \+ 1 diff --git a/ld/testsuite/ld-x86-64/pr13082-4b.d b/ld/testsuite/ld-x86-64/pr13082-4b.d new file mode 100644 index 0000000..cb4d90a --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-4b.d @@ -0,0 +1,9 @@ +#source: pr13082-4.s +#name: PR ld/13082-4 (b) +#as: --x32 +#ld: -pie -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_64 +[0-9a-f]+ +func \+ 1 diff --git a/ld/testsuite/ld-x86-64/pr13082-5.s b/ld/testsuite/ld-x86-64/pr13082-5.s new file mode 100644 index 0000000..9757fcb --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-5.s @@ -0,0 +1,12 @@ + .text + .globl _start + .globl ifunc + .type ifunc, @gnu_indirect_function +_start: + lea .Ljmp(%rip), %rax +ifunc: + jmp *(%rax) + .section .data.rel.ro.local,"aw",@progbits + .align 8 +.Ljmp: + .quad ifunc diff --git a/ld/testsuite/ld-x86-64/pr13082-5a.d b/ld/testsuite/ld-x86-64/pr13082-5a.d new file mode 100644 index 0000000..191c29e --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-5a.d @@ -0,0 +1,13 @@ +#source: pr13082-5.s +#name: PR ld/13082-5 (a) +#as: --x32 +#ld: -shared -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_32 +ifunc\(\)+ +ifunc \+ 0 + +Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_JUMP_SLOT +ifunc\(\)+ +ifunc \+ 0 diff --git a/ld/testsuite/ld-x86-64/pr13082-5b.d b/ld/testsuite/ld-x86-64/pr13082-5b.d new file mode 100644 index 0000000..1c5a5e7 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-5b.d @@ -0,0 +1,13 @@ +#source: pr13082-5.s +#name: PR ld/13082-5 (b) +#as: --x32 +#ld: -pie -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_IRELATIVE +[0-9a-f]+ + +Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_IRELATIVE +[0-9a-f]+ diff --git a/ld/testsuite/ld-x86-64/pr13082-6.s b/ld/testsuite/ld-x86-64/pr13082-6.s new file mode 100644 index 0000000..eb88fb6 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-6.s @@ -0,0 +1,11 @@ + .text + .globl _start + .type ifunc, @gnu_indirect_function +_start: + lea .Ljmp(%rip), %rax +ifunc: + jmp *(%rax) + .section .data.rel.ro.local,"aw",@progbits + .align 8 +.Ljmp: + .quad ifunc diff --git a/ld/testsuite/ld-x86-64/pr13082-6a.d b/ld/testsuite/ld-x86-64/pr13082-6a.d new file mode 100644 index 0000000..9a1a655 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-6a.d @@ -0,0 +1,13 @@ +#source: pr13082-6.s +#name: PR ld/13082-6 (a) +#as: --x32 +#ld: -shared -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_IRELATIVE +[0-9a-f]+ + +Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_IRELATIVE +[0-9a-f]+ diff --git a/ld/testsuite/ld-x86-64/pr13082-6b.d b/ld/testsuite/ld-x86-64/pr13082-6b.d new file mode 100644 index 0000000..792c348 --- /dev/null +++ b/ld/testsuite/ld-x86-64/pr13082-6b.d @@ -0,0 +1,13 @@ +#source: pr13082-6.s +#name: PR ld/13082-6 (b) +#as: --x32 +#ld: -pie -melf32_x86_64 +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_IRELATIVE +[0-9a-f]+ + +Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_IRELATIVE +[0-9a-f]+ diff --git a/ld/testsuite/ld-x86-64/protected2-k1om.d b/ld/testsuite/ld-x86-64/protected2-k1om.d new file mode 100644 index 0000000..4e03599 --- /dev/null +++ b/ld/testsuite/ld-x86-64/protected2-k1om.d @@ -0,0 +1,17 @@ +#source: protected2.s +#as: --64 -march=k1om +#ld: -shared -melf_k1om +#objdump: -drw + +.*: +file format .* + + +Disassembly of section .text: + +0+[a-f0-9]+ : +[ ]*[a-f0-9]+: c3 retq + +0+[a-f0-9]+ : +[ ]*[a-f0-9]+: e8 fa ff ff ff callq [a-f0-9]+ +[ ]*[a-f0-9]+: c3 retq +#pass diff --git a/ld/testsuite/ld-x86-64/protected3-k1om.d b/ld/testsuite/ld-x86-64/protected3-k1om.d new file mode 100644 index 0000000..36d6656 --- /dev/null +++ b/ld/testsuite/ld-x86-64/protected3-k1om.d @@ -0,0 +1,16 @@ +#source: protected3.s +#as: --64 -march=k1om +#ld: -shared -melf_k1om +#readelf: -h + +ELF Header: + Magic: 7f 45 4c 46 02 01 01 00 00 00 00 00 00 00 00 00 + Class: ELF64 + Data: 2's complement, little endian + Version: 1 \(current\) + OS/ABI: UNIX - System V + ABI Version: 0 + Type: DYN \(Shared object file\) + Machine: Intel K1OM + Version: 0x1 +#pass diff --git a/ld/testsuite/ld-x86-64/simple.c b/ld/testsuite/ld-x86-64/simple.c new file mode 100644 index 0000000..4ce3e8f --- /dev/null +++ b/ld/testsuite/ld-x86-64/simple.c @@ -0,0 +1,5 @@ +int +foo (int x) +{ + return x * 4; +} diff --git a/ld/testsuite/ld-x86-64/tlsbin.dd b/ld/testsuite/ld-x86-64/tlsbin.dd index 6d0de98..5bb5979 100644 --- a/ld/testsuite/ld-x86-64/tlsbin.dd +++ b/ld/testsuite/ld-x86-64/tlsbin.dd @@ -1,7 +1,7 @@ #source: tlsbinpic.s #source: tlsbin.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -drj.text #target: x86_64-*-* @@ -24,7 +24,7 @@ Disassembly of section .text: # GD -> IE because variable is not defined in executable 401004: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax 40100b: 00 00 * - 40100d: 48 03 05 d4 03 20 00[ ]+add 0x2003d4\(%rip\),%rax +# 6013e8 <.*> + 40100d: 48 03 05 dc 03 20 00[ ]+add 0x2003dc\(%rip\),%rax +# 6013f0 <.*> # -> R_X86_64_TPOFF64 sG1 401014: 90[ ]+nop * 401015: 90[ ]+nop * @@ -34,7 +34,7 @@ Disassembly of section .text: # the variable is referenced through IE too 401018: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax 40101f: 00 00 * - 401021: 48 03 05 b0 03 20 00[ ]+add 0x2003b0\(%rip\),%rax +# 6013d8 <.*> + 401021: 48 03 05 b8 03 20 00[ ]+add 0x2003b8\(%rip\),%rax +# 6013e0 <.*> # -> R_X86_64_TPOFF64 sG2 401028: 90[ ]+nop * 401029: 90[ ]+nop * @@ -102,7 +102,7 @@ Disassembly of section .text: 4010b3: 00 00 * 4010b5: 90[ ]+nop * 4010b6: 90[ ]+nop * - 4010b7: 4c 03 0d 1a 03 20 00[ ]+add 0x20031a\(%rip\),%r9 +# 6013d8 <.*> + 4010b7: 4c 03 0d 22 03 20 00[ ]+add 0x200322\(%rip\),%r9 +# 6013e0 <.*> # -> R_X86_64_TPOFF64 sG2 4010be: 90[ ]+nop * 4010bf: 90[ ]+nop * @@ -143,7 +143,7 @@ Disassembly of section .text: 401103: 90[ ]+nop * # Direct access through %fs # IE against global var - 401104: 48 8b 0d c5 02 20 00[ ]+mov 0x2002c5\(%rip\),%rcx +# 6013d0 <.*> + 401104: 48 8b 0d cd 02 20 00[ ]+mov 0x2002cd\(%rip\),%rcx +# 6013d8 <.*> # -> R_X86_64_TPOFF64 sG5 40110b: 90[ ]+nop * 40110c: 90[ ]+nop * @@ -186,7 +186,7 @@ Disassembly of section .text: 401147: 00 00 * 401149: 90[ ]+nop * 40114a: 90[ ]+nop * - 40114b: 4c 03 1d 8e 02 20 00[ ]+add 0x20028e\(%rip\),%r11 +# 6013e0 <.*> + 40114b: 4c 03 1d 96 02 20 00[ ]+add 0x200296\(%rip\),%r11 +# 6013e8 <.*> # -> R_X86_64_TPOFF64 sG6 401152: 90[ ]+nop * 401153: 90[ ]+nop * @@ -306,5 +306,8 @@ Disassembly of section .text: 401225: 90[ ]+nop * 401226: 90[ ]+nop * 401227: 90[ ]+nop * - 401228: c9[ ]+leaveq * - 401229: c3[ ]+retq * +# LE, large model + 401228: 48 ba a5 ff ff ff ff[ ]+movabs \$0xffffffffffffffa5,%rdx + 40122f: ff ff ff * + 401232: c9[ ]+leaveq * + 401233: c3[ ]+retq * diff --git a/ld/testsuite/ld-x86-64/tlsbin.rd b/ld/testsuite/ld-x86-64/tlsbin.rd index 03e5efc..9bfa3cc 100644 --- a/ld/testsuite/ld-x86-64/tlsbin.rd +++ b/ld/testsuite/ld-x86-64/tlsbin.rd @@ -1,7 +1,7 @@ #source: tlsbinpic.s #source: tlsbin.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #readelf: -WSsrl #target: x86_64-*-* @@ -17,12 +17,12 @@ Section Headers: +\[[ 0-9]+\] .rela.dyn +.* +\[[ 0-9]+\] .rela.plt +.* +\[[ 0-9]+\] .plt +.* - +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+22a 00 +AX +0 +0 +4096 - +\[[ 0-9]+\] .tdata +PROGBITS +0+60122a 0+122a 0+60 00 WAT +0 +0 +1 - +\[[ 0-9]+\] .tbss +NOBITS +0+60128a 0+128a 0+40 00 WAT +0 +0 +1 - +\[[ 0-9]+\] .dynamic +DYNAMIC +0+601290 0+1290 0+140 10 +WA +4 +0 +8 - +\[[ 0-9]+\] .got +PROGBITS +0+6013d0 0+13d0 0+20 08 +WA +0 +0 +8 - +\[[ 0-9]+\] .got.plt +PROGBITS +0+6013f0 0+13f0 0+20 08 +WA +0 +0 +8 + +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+234 00 +AX +0 +0 +4096 + +\[[ 0-9]+\] .tdata +PROGBITS +0+601234 0+1234 0+60 00 WAT +0 +0 +1 + +\[[ 0-9]+\] .tbss +NOBITS +0+601294 0+1294 0+40 00 WAT +0 +0 +1 + +\[[ 0-9]+\] .dynamic +DYNAMIC +0+601298 0+1298 0+140 10 +WA +4 +0 +8 + +\[[ 0-9]+\] .got +PROGBITS +0+6013d8 0+13d8 0+20 08 +WA +0 +0 +8 + +\[[ 0-9]+\] .got.plt +PROGBITS +0+6013f8 0+13f8 0+20 08 +WA +0 +0 +8 +\[[ 0-9]+\] .shstrtab +.* +\[[ 0-9]+\] .symtab +.* +\[[ 0-9]+\] .strtab +.* @@ -40,10 +40,10 @@ Program Headers: +PHDR.* +INTERP.* .*Requesting program interpreter.* - +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+122a 0x0+122a R E 0x200000 - +LOAD +0x0+122a 0x0+60122a 0x0+60122a 0x0+1e6 0x0+1e6 RW +0x200000 - +DYNAMIC +0x0+1290 0x0+601290 0x0+601290 0x0+140 0x0+140 RW +0x8 - +TLS +0x0+122a 0x0+60122a 0x0+60122a 0x0+60 0x0+a0 R +0x1 + +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+1234 0x0+1234 R E 0x200000 + +LOAD +0x0+1234 0x0+601234 0x0+601234 0x0+1e4 0x0+1e4 RW +0x200000 + +DYNAMIC +0x0+1298 0x0+601298 0x0+601298 0x0+140 0x0+140 RW +0x8 + +TLS +0x0+1234 0x0+601234 0x0+601234 0x0+60 0x0+a0 R +0x1 Section to Segment mapping: +Segment Sections... diff --git a/ld/testsuite/ld-x86-64/tlsbin.s b/ld/testsuite/ld-x86-64/tlsbin.s index eb9bfbc..1184740 100644 --- a/ld/testsuite/ld-x86-64/tlsbin.s +++ b/ld/testsuite/ld-x86-64/tlsbin.s @@ -93,5 +93,8 @@ _start: movq %fs:1+sh3@tpoff, %rdx nop;nop;nop;nop + /* LE, large model */ + movabsq $sh2@tpoff+1, %rdx + leave ret diff --git a/ld/testsuite/ld-x86-64/tlsbin.sd b/ld/testsuite/ld-x86-64/tlsbin.sd index 7fbc565..7fa7904 100644 --- a/ld/testsuite/ld-x86-64/tlsbin.sd +++ b/ld/testsuite/ld-x86-64/tlsbin.sd @@ -1,12 +1,12 @@ #source: tlsbinpic.s #source: tlsbin.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -sj.got #target: x86_64-*-* .*: +file format elf64-x86-64 Contents of section .got: - 6013d0 00000000 00000000 00000000 00000000 .* - 6013e0 00000000 00000000 00000000 00000000 .* + 6013d8 00000000 00000000 00000000 00000000 .* + 6013e8 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-x86-64/tlsbin.td b/ld/testsuite/ld-x86-64/tlsbin.td index b3851de..6f87a19 100644 --- a/ld/testsuite/ld-x86-64/tlsbin.td +++ b/ld/testsuite/ld-x86-64/tlsbin.td @@ -1,16 +1,16 @@ #source: tlsbinpic.s #source: tlsbin.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -sj.tdata #target: x86_64-*-* .*: +file format elf64-x86-64 Contents of section .tdata: - 60122a 11000000 12000000 13000000 14000000 .* - 60123a 15000000 16000000 17000000 18000000 .* - 60124a 41000000 42000000 43000000 44000000 .* - 60125a 45000000 46000000 47000000 48000000 .* - 60126a 01010000 02010000 03010000 04010000 .* - 60127a 05010000 06010000 07010000 08010000 .* + 601234 11000000 12000000 13000000 14000000 .* + 601244 15000000 16000000 17000000 18000000 .* + 601254 41000000 42000000 43000000 44000000 .* + 601264 45000000 46000000 47000000 48000000 .* + 601274 01010000 02010000 03010000 04010000 .* + 601284 05010000 06010000 07010000 08010000 .* diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.dd b/ld/testsuite/ld-x86-64/tlsbindesc.dd index 9e82eab..b1cfacb 100644 --- a/ld/testsuite/ld-x86-64/tlsbindesc.dd +++ b/ld/testsuite/ld-x86-64/tlsbindesc.dd @@ -1,7 +1,7 @@ #source: tlsbindesc.s #source: tlsbin.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -drj.text #target: x86_64-*-* @@ -22,7 +22,7 @@ Disassembly of section .text: [0-9a-f]+: 55[ ]+push %rbp [0-9a-f]+: 48 89 e5[ ]+mov %rsp,%rbp # GD -> IE because variable is not defined in executable - [0-9a-f]+: 48 8b 05 65 03 20 00[ ]+mov 0x200365\(%rip\),%rax +# 601370 <.*> + [0-9a-f]+: 48 8b 05 6d 03 20 00[ ]+mov 0x20036d\(%rip\),%rax +# 601378 <.*> # -> R_X86_64_TPOFF64 sG1 [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * @@ -31,7 +31,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is not defined in executable where # the variable is referenced through IE too - [0-9a-f]+: 48 8b 05 48 03 20 00[ ]+mov 0x200348\(%rip\),%rax +# 601360 <.*> + [0-9a-f]+: 48 8b 05 50 03 20 00[ ]+mov 0x200350\(%rip\),%rax +# 601368 <.*> # -> R_X86_64_TPOFF64 sG2 [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * @@ -93,7 +93,7 @@ Disassembly of section .text: [0-9a-f]+: 00 00 * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 4c 03 0d d6 02 20 00[ ]+add 0x2002d6\(%rip\),%r9 +# 601360 <.*> + [0-9a-f]+: 4c 03 0d de 02 20 00[ ]+add 0x2002de\(%rip\),%r9 +# 601368 <.*> # -> R_X86_64_TPOFF64 sG2 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -134,7 +134,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # Direct access through %fs # IE against global var - [0-9a-f]+: 48 8b 0d 81 02 20 00[ ]+mov 0x200281\(%rip\),%rcx +# 601358 <.*> + [0-9a-f]+: 48 8b 0d 89 02 20 00[ ]+mov 0x200289\(%rip\),%rcx +# 601360 <.*> # -> R_X86_64_TPOFF64 sG5 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -177,7 +177,7 @@ Disassembly of section .text: [0-9a-f]+: 00 00 * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 4c 03 1d 4a 02 20 00[ ]+add 0x20024a\(%rip\),%r11 +# 601368 <.*> + [0-9a-f]+: 4c 03 1d 52 02 20 00[ ]+add 0x200252\(%rip\),%r11 +# 601370 <.*> # -> R_X86_64_TPOFF64 sG6 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -297,5 +297,8 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * +# LE, large model + [0-9a-f]+: 48 ba a5 ff ff ff ff[ ]+movabs \$0xffffffffffffffa5,%rdx + [0-9a-f]+: ff ff ff * [0-9a-f]+: c9[ ]+leaveq * [0-9a-f]+: c3[ ]+retq * diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.rd b/ld/testsuite/ld-x86-64/tlsbindesc.rd index 7e94022..3527495 100644 --- a/ld/testsuite/ld-x86-64/tlsbindesc.rd +++ b/ld/testsuite/ld-x86-64/tlsbindesc.rd @@ -1,7 +1,7 @@ #source: tlsbindesc.s #source: tlsbin.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #readelf: -WSsrl #target: x86_64-*-* @@ -15,12 +15,12 @@ Section Headers: +\[[ 0-9]+\] .dynsym +.* +\[[ 0-9]+\] .dynstr +.* +\[[ 0-9]+\] .rela.dyn +.* - +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+1f6 00 +AX +0 +0 +4096 - +\[[ 0-9]+\] .tdata +PROGBITS +0+6011f6 0+11f6 0+60 00 WAT +0 +0 +1 - +\[[ 0-9]+\] .tbss +NOBITS +0+601256 0+1256 0+40 00 WAT +0 +0 +1 - +\[[ 0-9]+\] .dynamic +DYNAMIC +0+601258 0+1258 0+100 10 +WA +4 +0 +8 - +\[[ 0-9]+\] .got +PROGBITS +0+601358 0+1358 0+20 08 +WA +0 +0 +8 - +\[[ 0-9]+\] .got.plt +PROGBITS +0+601378 0+1378 0+18 08 +WA +0 +0 +8 + +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+200 00 +AX +0 +0 +4096 + +\[[ 0-9]+\] .tdata +PROGBITS +0+601200 0+1200 0+60 00 WAT +0 +0 +1 + +\[[ 0-9]+\] .tbss +NOBITS +0+601260 0+1260 0+40 00 WAT +0 +0 +1 + +\[[ 0-9]+\] .dynamic +DYNAMIC +0+601260 0+1260 0+100 10 +WA +4 +0 +8 + +\[[ 0-9]+\] .got +PROGBITS +0+601360 0+1360 0+20 08 +WA +0 +0 +8 + +\[[ 0-9]+\] .got.plt +PROGBITS +0+601380 0+1380 0+18 08 +WA +0 +0 +8 +\[[ 0-9]+\] .shstrtab +.* +\[[ 0-9]+\] .symtab +.* +\[[ 0-9]+\] .strtab +.* @@ -38,10 +38,10 @@ Program Headers: +PHDR.* +INTERP.* .*Requesting program interpreter.* - +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+11f6 0x0+11f6 R E 0x200000 - +LOAD +0x0+11f6 0x0+6011f6 0x0+6011f6 0x0+19a 0x0+19a RW +0x200000 - +DYNAMIC +0x0+1258 0x0+601258 0x0+601258 0x0+100 0x0+100 RW +0x8 - +TLS +0x0+11f6 0x0+6011f6 0x0+6011f6 0x0+60 0x0+a0 R +0x1 + +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+1200 0x0+1200 R E 0x200000 + +LOAD +0x0+1200 0x0+601200 0x0+601200 0x0+198 0x0+198 RW +0x200000 + +DYNAMIC +0x0+1260 0x0+601260 0x0+601260 0x0+100 0x0+100 RW +0x8 + +TLS +0x0+1200 0x0+601200 0x0+601200 0x0+60 0x0+a0 R +0x1 Section to Segment mapping: +Segment Sections... @@ -54,10 +54,10 @@ Program Headers: Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries: +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend -0+601358 +0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0 -0+601360 +0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0 -0+601368 +0+400000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0 -0+601370 +0+500000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0 +0+601360 +0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0 +0+601368 +0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0 +0+601370 +0+400000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0 +0+601378 +0+500000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0 Symbol table '\.dynsym' contains [0-9]+ entries: +Num: +Value +Size +Type +Bind +Vis +Ndx +Name @@ -101,8 +101,8 @@ Symbol table '\.symtab' contains [0-9]+ entries: +[0-9]+: 0+98 +0 +TLS +LOCAL +DEFAULT +8 bl7 +[0-9]+: 0+9c +0 +TLS +LOCAL +DEFAULT +8 bl8 +[0-9]+: 0+a0 +0 +TLS +LOCAL +DEFAULT +7 _TLS_MODULE_BASE_ - +[0-9]+: 0+601258 +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC - +[0-9]+: 0+601378 +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_ + +[0-9]+: 0+601260 +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC + +[0-9]+: 0+601380 +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_ +[0-9]+: 0+1c +0 +TLS +GLOBAL +DEFAULT +7 sg8 +[0-9]+: 0+7c +0 +TLS +GLOBAL +DEFAULT +8 bg8 +[0-9]+: 0+74 +0 +TLS +GLOBAL +DEFAULT +8 bg6 diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.sd b/ld/testsuite/ld-x86-64/tlsbindesc.sd index f622bc4..dbea32d 100644 --- a/ld/testsuite/ld-x86-64/tlsbindesc.sd +++ b/ld/testsuite/ld-x86-64/tlsbindesc.sd @@ -1,12 +1,12 @@ #source: tlsbindesc.s #source: tlsbin.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -sj.got #target: x86_64-*-* .*: +file format elf64-x86-64 Contents of section .got: - 601358 00000000 00000000 00000000 00000000 .* - 601368 00000000 00000000 00000000 00000000 .* + 601360 00000000 00000000 00000000 00000000 .* + 601370 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.td b/ld/testsuite/ld-x86-64/tlsbindesc.td index b2a3ebe..1dc6c28 100644 --- a/ld/testsuite/ld-x86-64/tlsbindesc.td +++ b/ld/testsuite/ld-x86-64/tlsbindesc.td @@ -1,16 +1,16 @@ #source: tlsbindesc.s #source: tlsbin.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -sj.tdata #target: x86_64-*-* .*: +file format elf64-x86-64 Contents of section .tdata: - 6011f6 11000000 12000000 13000000 14000000 .* - 601206 15000000 16000000 17000000 18000000 .* - 601216 41000000 42000000 43000000 44000000 .* - 601226 45000000 46000000 47000000 48000000 .* - 601236 01010000 02010000 03010000 04010000 .* - 601246 05010000 06010000 07010000 08010000 .* + 601200 11000000 12000000 13000000 14000000 .* + 601210 15000000 16000000 17000000 18000000 .* + 601220 41000000 42000000 43000000 44000000 .* + 601230 45000000 46000000 47000000 48000000 .* + 601240 01010000 02010000 03010000 04010000 .* + 601250 05010000 06010000 07010000 08010000 .* diff --git a/ld/testsuite/ld-x86-64/tlsdesc.dd b/ld/testsuite/ld-x86-64/tlsdesc.dd index 9b0ae61..2507e42 100644 --- a/ld/testsuite/ld-x86-64/tlsdesc.dd +++ b/ld/testsuite/ld-x86-64/tlsdesc.dd @@ -1,7 +1,7 @@ #source: tlsdesc.s #source: tlspic2.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -drj.text #target: x86_64-*-* diff --git a/ld/testsuite/ld-x86-64/tlsdesc.pd b/ld/testsuite/ld-x86-64/tlsdesc.pd index bf3bc2f..2176576 100644 --- a/ld/testsuite/ld-x86-64/tlsdesc.pd +++ b/ld/testsuite/ld-x86-64/tlsdesc.pd @@ -1,7 +1,7 @@ #source: tlsdesc.s #source: tlspic2.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -drj.plt #target: x86_64-*-* diff --git a/ld/testsuite/ld-x86-64/tlsdesc.rd b/ld/testsuite/ld-x86-64/tlsdesc.rd index 662b639..df8d466 100644 --- a/ld/testsuite/ld-x86-64/tlsdesc.rd +++ b/ld/testsuite/ld-x86-64/tlsdesc.rd @@ -1,7 +1,7 @@ #source: tlsdesc.s #source: tlspic2.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #readelf: -WSsrld #target: x86_64-*-* @@ -15,7 +15,7 @@ Section Headers: +\[[ 0-9]+\] .dynstr +.* +\[[ 0-9]+\] .rela.dyn +.* +\[[ 0-9]+\] .rela.plt +.* - +\[[ 0-9]+\] .plt +PROGBITS +0+450 0+450 0+20 10 +AX +0 +0 +4 + +\[[ 0-9]+\] .plt +PROGBITS +0+450 0+450 0+20 10 +AX +0 +0 +(4|16) +\[[ 0-9]+\] .text +PROGBITS +0+1000 0+1000 0+154 00 +AX +0 +0 4096 +\[[ 0-9]+\] .tdata +PROGBITS +0+201154 0+1154 0+60 00 WAT +0 +0 +1 +\[[ 0-9]+\] .tbss +NOBITS +0+2011b4 0+11b4 0+20 00 WAT +0 +0 +1 diff --git a/ld/testsuite/ld-x86-64/tlsdesc.sd b/ld/testsuite/ld-x86-64/tlsdesc.sd index 7eb474a..89e2a39 100644 --- a/ld/testsuite/ld-x86-64/tlsdesc.sd +++ b/ld/testsuite/ld-x86-64/tlsdesc.sd @@ -1,7 +1,7 @@ #source: tlsdesc.s #source: tlspic2.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -s -j.got -j.got.plt #target: x86_64-*-* diff --git a/ld/testsuite/ld-x86-64/tlsdesc.td b/ld/testsuite/ld-x86-64/tlsdesc.td index 6b8098c..479cb84 100644 --- a/ld/testsuite/ld-x86-64/tlsdesc.td +++ b/ld/testsuite/ld-x86-64/tlsdesc.td @@ -1,7 +1,7 @@ #source: tlsdesc.s #source: tlspic2.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -sj.tdata #target: x86_64-*-* diff --git a/ld/testsuite/ld-x86-64/tlsgd5.dd b/ld/testsuite/ld-x86-64/tlsgd5.dd index 7ca953a..ad9cd6e 100644 --- a/ld/testsuite/ld-x86-64/tlsgd5.dd +++ b/ld/testsuite/ld-x86-64/tlsgd5.dd @@ -10,5 +10,5 @@ Disassembly of section .text: [a-f0-9]+ <_start>: [ ]*[a-f0-9]+: 64 48 8b 04 25 00 00 00 00 mov %fs:0x0,%rax -[ ]*[a-f0-9]+: 48 03 05 00 01 20 00 add 0x200100\(%rip\),%rax # 600368 <_DYNAMIC\+0x100> +[ ]*[a-f0-9]+: 48 03 05 40 01 20 00 add 0x200140\(%rip\),%rax # 6003a8 <_DYNAMIC\+0x100> #pass diff --git a/ld/testsuite/ld-x86-64/tlsgd6.dd b/ld/testsuite/ld-x86-64/tlsgd6.dd index e1d8238..8bdb468 100644 --- a/ld/testsuite/ld-x86-64/tlsgd6.dd +++ b/ld/testsuite/ld-x86-64/tlsgd6.dd @@ -10,5 +10,5 @@ Disassembly of section .text: [a-f0-9]+ <_start>: [ ]*[a-f0-9]+: 64 8b 04 25 00 00 00 00 mov %fs:0x0,%eax -[ ]*[a-f0-9]+: 48 03 05 81 00 20 00 add 0x200081\(%rip\),%rax # 60022c <_DYNAMIC\+0x80> +[ ]*[a-f0-9]+: 48 03 05 c5 00 20 00 add 0x2000c5\(%rip\),%rax # 600270 <_DYNAMIC\+0x80> #pass diff --git a/ld/testsuite/ld-x86-64/tlsgdesc.dd b/ld/testsuite/ld-x86-64/tlsgdesc.dd index 75e8da4..fa467a5 100644 --- a/ld/testsuite/ld-x86-64/tlsgdesc.dd +++ b/ld/testsuite/ld-x86-64/tlsgdesc.dd @@ -1,6 +1,6 @@ #source: tlsgdesc.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -drj.text #target: x86_64-*-* @@ -20,7 +20,7 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 03 0d 5e 02 20 00[ ]+add 0x20025e\(%rip\),%rcx +# 200660 <.*> + +[0-9a-f]+: 48 03 0d 5e 02 20 00[ ]+add 0x20025e\(%rip\),%rcx +# 200668 <.*> # -> R_X86_64_TPOFF64 sG3 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -31,14 +31,14 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 03 0d 68 02 20 00[ ]+add 0x200268\(%rip\),%rcx +# 200680 <.*> + +[0-9a-f]+: 48 03 0d 68 02 20 00[ ]+add 0x200268\(%rip\),%rcx +# 200688 <.*> # -> R_X86_64_TPOFF64 sG4 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD, gd first - +[0-9a-f]+: 66 48 8d 3d 6c 02 20[ ]+data32 lea 0x20026c\(%rip\),%rdi +# 200690 <.*> + +[0-9a-f]+: 66 48 8d 3d 6c 02 20[ ]+data32 lea 0x20026c\(%rip\),%rdi +# 200698 <.*> +[0-9a-f]+: 00 * # -> R_X86_64_DTPMOD64 sG1 +[0-9a-f]+: 66 66 48 e8 9c ff ff[ ]+data32 data32 callq [0-9a-f]+ <.*> @@ -48,7 +48,7 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 8d 05 a1 02 20 00[ ]+lea 0x2002a1\(%rip\),%rax +# 2006d8 <.*> + +[0-9a-f]+: 48 8d 05 a1 02 20 00[ ]+lea 0x2002a1\(%rip\),%rax +# 2006e0 <.*> # -> R_X86_64_TLSDESC sG1 +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) +[0-9a-f]+: 90[ ]+nop * @@ -56,14 +56,14 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD, desc first - +[0-9a-f]+: 48 8d 05 84 02 20 00[ ]+lea 0x200284\(%rip\),%rax +# 2006c8 <.*> + +[0-9a-f]+: 48 8d 05 84 02 20 00[ ]+lea 0x200284\(%rip\),%rax +# 2006d0 <.*> # -> R_X86_64_TLSDESC sG2 +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 66 48 8d 3d 1e 02 20[ ]+data32 lea 0x20021e\(%rip\),%rdi +# 200670 <.*> + +[0-9a-f]+: 66 48 8d 3d 1e 02 20[ ]+data32 lea 0x20021e\(%rip\),%rdi +# 200678 <.*> +[0-9a-f]+: 00 * # -> R_X86_64_DTPMOD64 sG2 +[0-9a-f]+: 66 66 48 e8 6e ff ff[ ]+data32 data32 callq [0-9a-f]+ <.*> @@ -76,13 +76,13 @@ Disassembly of section .text: # GD -> IE, gd first, after IE use +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +[0-9a-f]+: 00 00 * - +[0-9a-f]+: 48 03 05 f2 01 20 00[ ]+add 0x2001f2\(%rip\),%rax +# 200660 <.*> + +[0-9a-f]+: 48 03 05 f2 01 20 00[ ]+add 0x2001f2\(%rip\),%rax +# 200668 <.*> # -> R_X86_64_TPOFF64 sG3 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 8b 05 e7 01 20 00[ ]+mov 0x2001e7\(%rip\),%rax +# 200660 <.*> + +[0-9a-f]+: 48 8b 05 e7 01 20 00[ ]+mov 0x2001e7\(%rip\),%rax +# 200668 <.*> # -> R_X86_64_TPOFF64 sG3 +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * @@ -90,7 +90,7 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD -> IE, desc first, after IE use - +[0-9a-f]+: 48 8b 05 fa 01 20 00[ ]+mov 0x2001fa\(%rip\),%rax +# 200680 <.*> + +[0-9a-f]+: 48 8b 05 fa 01 20 00[ ]+mov 0x2001fa\(%rip\),%rax +# 200688 <.*> # -> R_X86_64_TPOFF64 sG4 +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * @@ -99,7 +99,7 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +[0-9a-f]+: 00 00 * - +[0-9a-f]+: 48 03 05 e4 01 20 00[ ]+add 0x2001e4\(%rip\),%rax +# 200680 <.*> + +[0-9a-f]+: 48 03 05 e4 01 20 00[ ]+add 0x2001e4\(%rip\),%rax +# 200688 <.*> # -> R_X86_64_TPOFF64 sG4 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -108,13 +108,13 @@ Disassembly of section .text: # GD -> IE, gd first, before IE use +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +[0-9a-f]+: 00 00 * - +[0-9a-f]+: 48 03 05 b8 01 20 00[ ]+add 0x2001b8\(%rip\),%rax +# 200668 <.*> + +[0-9a-f]+: 48 03 05 b8 01 20 00[ ]+add 0x2001b8\(%rip\),%rax +# 200670 <.*> # -> R_X86_64_TPOFF64 sG5 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 8b 05 ad 01 20 00[ ]+mov 0x2001ad\(%rip\),%rax +# 200668 <.*> + +[0-9a-f]+: 48 8b 05 ad 01 20 00[ ]+mov 0x2001ad\(%rip\),%rax +# 200670 <.*> # -> R_X86_64_TPOFF64 sG5 +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * @@ -122,7 +122,7 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD -> IE, desc first, before IE use - +[0-9a-f]+: 48 8b 05 c0 01 20 00[ ]+mov 0x2001c0\(%rip\),%rax +# 200688 <.*> + +[0-9a-f]+: 48 8b 05 c0 01 20 00[ ]+mov 0x2001c0\(%rip\),%rax +# 200690 <.*> # -> R_X86_64_TPOFF64 sG6 +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * @@ -131,7 +131,7 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +[0-9a-f]+: 00 00 * - +[0-9a-f]+: 48 03 05 aa 01 20 00[ ]+add 0x2001aa\(%rip\),%rax +# 200688 <.*> + +[0-9a-f]+: 48 03 05 aa 01 20 00[ ]+add 0x2001aa\(%rip\),%rax +# 200690 <.*> # -> R_X86_64_TPOFF64 sG6 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -142,7 +142,7 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 03 0d 74 01 20 00[ ]+add 0x200174\(%rip\),%rcx +# 200668 <.*> + +[0-9a-f]+: 48 03 0d 74 01 20 00[ ]+add 0x200174\(%rip\),%rcx +# 200670 <.*> # -> R_X86_64_TPOFF64 sG5 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -153,7 +153,7 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 03 0d 7e 01 20 00[ ]+add 0x20017e\(%rip\),%rcx +# 200688 <.*> + +[0-9a-f]+: 48 03 0d 7e 01 20 00[ ]+add 0x20017e\(%rip\),%rcx +# 200690 <.*> # -> R_X86_64_TPOFF64 sG6 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * diff --git a/ld/testsuite/ld-x86-64/tlsgdesc.rd b/ld/testsuite/ld-x86-64/tlsgdesc.rd index 61d2fa8..1e24693 100644 --- a/ld/testsuite/ld-x86-64/tlsgdesc.rd +++ b/ld/testsuite/ld-x86-64/tlsgdesc.rd @@ -1,6 +1,6 @@ #source: tlsgdesc.s #as: --64 -#ld: -shared -melf64_x86_64 +#ld: -shared -melf64_x86_64 --no-ld-generated-unwind-info #readelf: -WSsrl #target: x86_64-*-* diff --git a/ld/testsuite/ld-x86-64/tlspic.dd b/ld/testsuite/ld-x86-64/tlspic.dd index e1b64fc..6f55456 100644 --- a/ld/testsuite/ld-x86-64/tlspic.dd +++ b/ld/testsuite/ld-x86-64/tlspic.dd @@ -1,7 +1,7 @@ #source: tlspic1.s #source: tlspic2.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -drj.text #target: x86_64-*-* diff --git a/ld/testsuite/ld-x86-64/tlspic.rd b/ld/testsuite/ld-x86-64/tlspic.rd index 798703e..177f206 100644 --- a/ld/testsuite/ld-x86-64/tlspic.rd +++ b/ld/testsuite/ld-x86-64/tlspic.rd @@ -1,7 +1,7 @@ #source: tlspic1.s #source: tlspic2.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #readelf: -WSsrl #target: x86_64-*-* diff --git a/ld/testsuite/ld-x86-64/tlspic.sd b/ld/testsuite/ld-x86-64/tlspic.sd index 666c774..36c1b52 100644 --- a/ld/testsuite/ld-x86-64/tlspic.sd +++ b/ld/testsuite/ld-x86-64/tlspic.sd @@ -1,7 +1,7 @@ #source: tlspic1.s #source: tlspic2.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -sj.got #target: x86_64-*-* diff --git a/ld/testsuite/ld-x86-64/tlspic.td b/ld/testsuite/ld-x86-64/tlspic.td index 67eb4f2..36a7f8e 100644 --- a/ld/testsuite/ld-x86-64/tlspic.td +++ b/ld/testsuite/ld-x86-64/tlspic.td @@ -1,7 +1,7 @@ #source: tlspic1.s #source: tlspic2.s #as: --64 -#ld: -shared -melf_x86_64 +#ld: -shared -melf_x86_64 --no-ld-generated-unwind-info #objdump: -sj.tdata #target: x86_64-*-* diff --git a/ld/testsuite/ld-x86-64/x86-64-x32.rd b/ld/testsuite/ld-x86-64/x86-64-x32.rd new file mode 100644 index 0000000..7118cb9 --- /dev/null +++ b/ld/testsuite/ld-x86-64/x86-64-x32.rd @@ -0,0 +1,5 @@ +Symbol table '\.dynsym' contains [0-9]+ entries: + +Num: +Value +Size Type +Bind +Vis +Ndx Name +#... + +[0-9]+: +[0-9a-f]+ +[0-9a-f]+ +FUNC +GLOBAL +DEFAULT +[0-9]+ +foo +#... diff --git a/ld/testsuite/ld-x86-64/x86-64.exp b/ld/testsuite/ld-x86-64/x86-64.exp index 8e97729..77b081b 100644 --- a/ld/testsuite/ld-x86-64/x86-64.exp +++ b/ld/testsuite/ld-x86-64/x86-64.exp @@ -38,12 +38,14 @@ if { !([istarget "x86_64-*-elf*"] # readelf: Apply readelf options on result. Compare with regex (last arg). set x86_64tests { - {"TLS -fpic -shared transitions" "-shared -melf_x86_64" + {"TLS -fpic -shared transitions" + "-shared -melf_x86_64 --no-ld-generated-unwind-info" "--64" {tlspic1.s tlspic2.s} {{readelf -WSsrl tlspic.rd} {objdump -drj.text tlspic.dd} {objdump -sj.got tlspic.sd} {objdump -sj.tdata tlspic.td}} "libtlspic.so"} - {"TLS descriptor -fpic -shared transitions" "-shared -melf_x86_64" + {"TLS descriptor -fpic -shared transitions" + "-shared -melf_x86_64 --no-ld-generated-unwind-info" "--64" {tlsdesc.s tlspic2.s} {{readelf -WSsrld tlsdesc.rd} {objdump -drj.text tlsdesc.dd} {objdump "-s -j.got -j.got.plt" tlsdesc.sd} {objdump -sj.tdata tlsdesc.td} @@ -51,17 +53,20 @@ set x86_64tests { {"Helper shared library" "-shared -melf_x86_64" "--64" {tlslib.s} {} "libtlslib.so"} {"TLS -fpic and -fno-pic exec transitions" - "-melf_x86_64 tmpdir/libtlslib.so" "--64" {tlsbinpic.s tlsbin.s} + "-melf_x86_64 tmpdir/libtlslib.so --no-ld-generated-unwind-info" + "--64" {tlsbinpic.s tlsbin.s} {{readelf -WSsrl tlsbin.rd} {objdump -drj.text tlsbin.dd} {objdump -sj.got tlsbin.sd} {objdump -sj.tdata tlsbin.td}} "tlsbin"} {"TLS descriptor -fpic and -fno-pic exec transitions" - "-melf_x86_64 tmpdir/libtlslib.so" "--64" {tlsbindesc.s tlsbin.s} + "-melf_x86_64 tmpdir/libtlslib.so --no-ld-generated-unwind-info" + "--64" {tlsbindesc.s tlsbin.s} {{readelf -WSsrl tlsbindesc.rd} {objdump -drj.text tlsbindesc.dd} {objdump -sj.got tlsbindesc.sd} {objdump -sj.tdata tlsbindesc.td}} "tlsbindesc"} {"TLS with global dynamic and descriptors" - "-shared -melf_x86_64" "--64" {tlsgdesc.s} + "-shared -melf_x86_64 --no-ld-generated-unwind-info" + "--64" {tlsgdesc.s} {{readelf -WSsrl tlsgdesc.rd} {objdump -drj.text tlsgdesc.dd}} "libtlsgdesc.so"} {"TLS in debug sections" "-melf_x86_64" @@ -84,7 +89,7 @@ set x86_64tests { "--64" {mixed2a.s} {} "libmixe2a.o"} {"Helper 32bit object 2" "-r -melf_i386" "--32" {mixed2b.s} {} "libmixe2b.o"} - {"Split by file with 'l' flag on section." "-split-by-file -r" + {"Split by file with 'l' flag on section." "-split-by-file -r -melf_x86_64" "--64" {split-by-file1.s split-by-file2.s} {{readelf -SW split-by-file.rd}} "split-by-file.o"} {"TLS X32 IE->LE transition" "-melf32_x86_64" @@ -155,6 +160,8 @@ run_dump_test "unique1" run_dump_test "nogot1" run_dump_test "nogot2" run_dump_test "discarded1" +run_dump_test "pr12718" +run_dump_test "pr12921" if { ![istarget "x86_64-*-linux*"] } { return @@ -196,9 +203,48 @@ run_dump_test "ilp32-2" run_dump_test "ilp32-3" run_dump_test "ilp32-4" run_dump_test "ilp32-5" +run_dump_test "ilp32-6" +run_dump_test "ilp32-7" +run_dump_test "ilp32-8" +run_dump_test "ilp32-9" run_dump_test "ia32-1" run_dump_test "ia32-2" run_dump_test "ia32-3" run_dump_test "lp64-1" run_dump_test "lp64-2" run_dump_test "lp64-3" +run_dump_test "pr13082-1a" +run_dump_test "pr13082-1b" +run_dump_test "pr13082-2a" +run_dump_test "pr13082-2b" +run_dump_test "pr13082-3a" +run_dump_test "pr13082-3b" +run_dump_test "pr13082-4a" +run_dump_test "pr13082-4b" +run_dump_test "pr13082-5a" +run_dump_test "pr13082-5b" +run_dump_test "pr13082-6a" +run_dump_test "pr13082-6b" + +# Must be native with the C compiler +if { [isnative] && [which $CC] != 0 } { + run_cc_link_tests { + {"Helper X32 DSO from x86-64 object" "" "-m64 -fPIC -g" + {simple.c} {} "libsimple.a"} + } + + set convertx32 "$objcopy -O elf32-x86-64 tmpdir/simple.o tmpdir/simple-x32.o" + send_log "$convertx32\n" + set got [remote_exec host "$convertx32"] + if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then { + send_log "$got\n" + fail "Convert x86-64 object to x32" + return + } + + run_ld_link_tests { + {"X32 DSO from x86-64 object" + "-shared -melf32_x86_64 tmpdir/simple-x32.o" "--x32" + {dummy.s} {{readelf {-s --wide} x86-64-x32.rd}} "x86-64-x32"} + } +} diff --git a/ld/testsuite/lib/ld-lib.exp b/ld/testsuite/lib/ld-lib.exp index 0591e8b..3e77a5a 100644 --- a/ld/testsuite/lib/ld-lib.exp +++ b/ld/testsuite/lib/ld-lib.exp @@ -295,14 +295,14 @@ proc default_ld_compile { cc source object } { # Assemble a file. # -proc default_ld_assemble { as source object } { +proc default_ld_assemble { as in_flags source object } { global ASFLAGS global host_triplet if ![info exists ASFLAGS] { set ASFLAGS "" } set flags [big_or_little_endian] - set exec_output [run_host_cmd "$as" "$flags $ASFLAGS -o $object $source"] + set exec_output [run_host_cmd "$as" "$flags $in_flags $ASFLAGS -o $object $source"] set exec_output [prune_warnings $exec_output] if [string match "" $exec_output] then { return 1 @@ -552,7 +552,6 @@ proc run_dump_test { name } { set opts(error) {} set opts(warning) {} set opts(objcopy_linked_file) {} - set asflags(${file}.s) {} foreach i $opt_array { set opt_name [lindex $i 0] @@ -570,13 +569,13 @@ proc run_dump_test { name } { warning {} error {} source { - # Move any source-specific as-flags to a separate array to + # Move any source-specific as-flags to a separate list to # simplify processing. if { [llength $opt_val] > 1 } { - set asflags([lindex $opt_val 0]) [lrange $opt_val 1 end] + lappend asflags [lrange $opt_val 1 end] set opt_val [lindex $opt_val 0] } else { - set asflags($opt_val) {} + lappend asflags {} } } default { @@ -669,6 +668,7 @@ proc run_dump_test { name } { if { $opts(source) == "" } { set sourcefiles [list ${file}.s] + set asflags [list ""] } else { set sourcefiles {} foreach sf $opts(source) { @@ -677,8 +677,6 @@ proc run_dump_test { name } { } else { lappend sourcefiles "$srcdir/$subdir/$sf" } - # Must have asflags indexed on source name. - set asflags($srcdir/$subdir/$sf) $asflags($sf) } } @@ -691,11 +689,12 @@ proc run_dump_test { name } { set objfiles {} for { set i 0 } { $i < [llength $sourcefiles] } { incr i } { set sourcefile [lindex $sourcefiles $i] + set sourceasflags [lindex $asflags $i] set objfile "tmpdir/dump$i.o" catch "exec rm -f $objfile" exec_output lappend objfiles $objfile - set cmd "$AS $ASFLAGS $opts(as) $asflags($sourcefile) -o $objfile $sourcefile" + set cmd "$AS $ASFLAGS $opts(as) $sourceasflags -o $objfile $sourcefile" send_log "$cmd\n" set cmdret [remote_exec host [concat sh -c [list "$cmd 2>&1"]] "" "/dev/null" "ld.tmp"] @@ -903,18 +902,24 @@ proc ar_simple_create { ar aropts target objects } { # List contains test-items with 3 items followed by 2 lists, one item and # one optional item: -# 0:name 1:ld/ar options 2:assembler options -# 3:filenames of assembler files 4: action and options. 5: name of output file -# 6:compiler flags (optional) +# 0:name +# 1:ld/ar options +# 2:assembler options +# 3:filenames of assembler files +# 4:list of actions, options and expected outputs. +# 5:name of output file +# 6:compiler flags (optional) # -# Actions: -# objdump: Apply objdump options on result. Compare with regex (last arg). -# nm: Apply nm options on result. Compare with regex (last arg). -# readelf: Apply readelf options on result. Compare with regex (last arg). -# ld: Don't apply anything on result. Compare output during linking with -# regex (second arg). Note that this *must* be the first action if it -# is to be used at all; in all other cases, any output from the linker -# during linking is treated as a sign of an error and FAILs the test. +# Actions: { command command-line-options file-containg-expected-output-regexps } +# Commands: +# objdump: Apply objdump options on result. +# nm: Apply nm options on result. +# readelf: Apply readelf options on result. +# ld: Don't apply anything on result. Compare output during linking with +# the file containing regexps (which is the second arg, not the third). +# Note that this *must* be the first action if it is to be used at all; +# in all other cases, any output from the linker during linking is +# treated as a sign of an error and FAILs the test. # proc run_ld_link_tests { ldtests } { global ld @@ -978,26 +983,21 @@ proc run_ld_link_tests { ldtests } { } # Catch assembler errors. - if { $is_unresolved != 0 } { + if { $is_unresolved } { unresolved $testname continue } if { [regexp ".*\\.a$" $binfile] } { if { ![ar_simple_create $ar $ld_options $binfile "$objfiles"] } { - fail $testname set failed 1 - } else { - set failed 0 } } elseif { ![ld_simple_link $ld $binfile "-L$srcdir/$subdir $ld_options $objfiles"] } { set maybe_failed 1 set ld_output "$exec_output" - } else { - set failed 0 } - if { $failed == 0 } { + if { !$failed } { foreach actionlist $actions { set action [lindex $actionlist 0] set progopts [lindex $actionlist 1] @@ -1024,20 +1024,17 @@ proc run_ld_link_tests { ldtests } { } if { $action == "ld" } { - set dumpfile [lindex $actionlist 1] - verbose "dumpfile is $dumpfile" + set regexpfile $progopts + verbose "regexpfile is $srcdir/$subdir/$regexpfile" set_file_contents "tmpdir/ld.messages" "$ld_output" verbose "ld.messages has '[file_contents tmpdir/ld.messages]'" - if { [regexp_diff "tmpdir/ld.messages" "$srcdir/$subdir/$dumpfile"] } then { + if { [regexp_diff "tmpdir/ld.messages" "$srcdir/$subdir/$regexpfile"] } then { verbose "output is $ld_output" 2 set failed 1 break } set maybe_failed 0 - } elseif { $maybe_failed != 0 } { - set failed 1 - break - } elseif { $dump_prog != "" } { + } elseif { !$maybe_failed && $dump_prog != "" } { set dumpfile [lindex $actionlist 2] set binary $dump_prog @@ -1079,18 +1076,14 @@ proc run_ld_link_tests { ldtests } { remote_file host delete "dump.out" } } - - if { $failed != 0 } { - fail $testname - } else { if { $is_unresolved == 0 } { - pass $testname - } } } - # Catch action errors. - if { $is_unresolved != 0 } { + if { $is_unresolved } { unresolved $testname - continue + } elseif { $maybe_failed || $failed } { + fail $testname + } else { + pass $testname } } } @@ -1255,6 +1248,7 @@ proc run_ld_link_exec_tests { targets_to_xfail ldtests } { # 4:action and options. # 5:name of output file # 6:language (optional) +# 7:linker warnings (optional) # # Actions: # objdump: Apply objdump options on result. Compare with regex (last arg). @@ -1273,6 +1267,7 @@ proc run_cc_link_tests { ldtests } { global CFLAGS global CXXFLAGS global ar + global exec_output foreach testitem $ldtests { set testname [lindex $testitem 0] @@ -1282,6 +1277,7 @@ proc run_cc_link_tests { ldtests } { set actions [lindex $testitem 4] set binfile tmpdir/[lindex $testitem 5] set lang [lindex $testitem 6] + set warnings [lindex $testitem 7] set objfiles {} set is_unresolved 0 set failed 0 @@ -1318,8 +1314,18 @@ proc run_cc_link_tests { ldtests } { set failed 0 } } elseif { ![ld_simple_link $cc_cmd $binfile "-L$srcdir/$subdir $ldflags $objfiles"] } { - fail $testname - set failed 1 + # Check if exec_output is expected. + if { $warnings != "" } then { + verbose -log "returned with: <$exec_output>, expected: <$warnings>" + if { [regexp $warnings $exec_output] } then { + set failed 0 + } else { + set failed 1 + } + } else { + fail $testname + set failed 1 + } } else { set failed 0 } diff --git a/libiberty/.gitignore b/libiberty/.gitignore new file mode 100644 index 0000000..ca2fba5 --- /dev/null +++ b/libiberty/.gitignore @@ -0,0 +1,2 @@ +/required-list +/xhost-mkfrag diff --git a/libiberty/ChangeLog b/libiberty/ChangeLog index 0e88ea3..844b1ee 100644 --- a/libiberty/ChangeLog +++ b/libiberty/ChangeLog @@ -1,3 +1,102 @@ +2011-08-22 Rainer Orth + + * aclocal.m4: Include ../config/picflag.m4. + * configure.ac (GCC_PICFLAG): Call it. + (enable_shared): Clear PICFLAG unless shared. + * configure: Regenerate. + +2011-08-12 Steve Ellcey + + * md5.c (md5_read_ctx): Handle mis-aligned resbuf pointer. + +2011-08-06 Uros Bizjak + + * testsuite/test-expandargv.c (writeout_test): Check result of fwrite. + +2011-08-01 Jason Merrill + + PR c++/49932 + * cp-demangle.c (d_prefix): Handle decltype. + * testsuite/demangle-expected: Test it. + +2011-07-26 H.J. Lu + + * testsuite/demangle-expected: Remove an extra line. + +2011-07-26 Ian Lance Taylor + + * cp-demangle.c (d_print_init): Initialize pack_index field. + (d_print_comp): Check for NULL template argument. + * testsuite/demangle-expected: Add test case. + +2011-07-22 Gerald Pfeifer + + PR target/49817 + * stack-limit.c: Include . + +2011-07-22 Jakub Jelinek + + PR c++/49756 + * stack-limit.c: New file. + * Makefile.in: Regenerate deps. + (CFILES): Add stack-limit.c. + (REQUIRED_OFILES): Add ./stack-limit.$(objext). + * configure.ac (checkfuncs): Add getrlimit and setrlimit. + (AC_CHECK_FUNCS): Likewise. + * configure: Regenerated. + * config.in: Regenerated. + +2011-07-04 Jason Merrill + + * cp-demangle.c (d_expression): Handle 'this'. + (d_print_comp) [DEMANGLE_COMPONENT_FUNCTION_PARAM]: Likewise. + +2011-07-01 Joel Brobecker + + * filename_cmp.c (filename_cmp, filename_ncmp): Add handling of + HAVE_CASE_INSENSITIVE_FILE_SYSTEM. + +2011-07-01 Jan Kratochvil + + PR debug/49408 + * cp-demangle.c (d_print_comp): Suppress argument list for function + references by the '&' unary operator. Keep also already processed + variant without the argument list. Suppress argument list types for + function call used in an expression. + * testsuite/demangle-expected: Fix excessive argument list types in + `test for typed function in decltype'. New testcase for no argument + list types printed. 3 new testcases for function references by the + '&' unary operator.. + +2011-06-20 Jason Merrill + + PR c++/37089 + * cp-demangle.c (d_print_comp): Handle reference smashing. + * testsuite/demangle-expected: Test it. + +2011-06-13 Jan Kratochvil + + * cp-demangle.c (d_print_comp) : + Suppress d_print_mod for DMGL_RET_POSTFIX. + * testsuite/demangle-expected: New testcases for --ret-postfix. + +2011-06-13 Jan Kratochvil + + * cp-demangle.c (d_print_comp) : Do + not pass DMGL_RET_POSTFIX or DMGL_RET_DROP. Support DMGL_RET_DROP. + * testsuite/demangle-expected: New testcases for --ret-drop. + * testsuite/test-demangle.c: Document --ret-drop in a comment. + (main): New variable ret_drop, fill it, call cplus_demangle with it. + +2011-06-13 Jan Kratochvil + + * cp-demangle.c (struct d_print_info): Remove field options. + (d_print_init): Remove parameter options. + (cplus_demangle_print_callback): Update all the callers. + (d_print_comp, d_print_mod_list, d_print_mod, d_print_function_type) + (d_print_array_type, d_print_expr_op, d_print_cast, d_print_subexpr): + Add parameter options, update all the callers. + 2011-04-20 Jim Meyering * cp-demint.c (cplus_demangle_v3_components): Remove useless @@ -498,7 +597,7 @@ 2009-05-29 Kai Tietz - * pex-win32.c (pex_win32_fdopenr): Set INHERIT to false. + * pex-win32.c (pex_win32_fdopenr): Set INHERIT to false. 2009-05-29 Michael Matz @@ -529,7 +628,7 @@ 2009-04-29 Julian Brown - * pex-win32.c (pex_win32_pipe): Add _O_NOINHERIT. + * pex-win32.c (pex_win32_pipe): Add _O_NOINHERIT. (pex_win32_exec_child): Ensure each process has only one handle open on pipe endpoints. Close standard input after creating child for symmetry with standard output/standard error. @@ -547,22 +646,22 @@ section, so that the native build does detect them at configure time. * configure: Regenerated. - + 2009-04-13 Ozkan Sezer - PR target/39397 - * pex-common.h (struct pex_obj): Store pid values as pid_t, - not as long (members *children and (*wait)) - * pex-common.c (pex_run_in_environment): Likewise. - * pex-win32.c (pex_win32_wait): Return pid_t and properly check - returned pid value. - * pex-djgpp.c (pex_djgpp_wait): Return pid_t. - * pex-msdos.c (pex_msdos_wait): Likewise. + PR target/39397 + * pex-common.h (struct pex_obj): Store pid values as pid_t, + not as long (members *children and (*wait)) + * pex-common.c (pex_run_in_environment): Likewise. + * pex-win32.c (pex_win32_wait): Return pid_t and properly check + returned pid value. + * pex-djgpp.c (pex_djgpp_wait): Return pid_t. + * pex-msdos.c (pex_msdos_wait): Likewise. 2009-04-07 Arnaud Patard - * libiberty/configure.ac: Fix Linux/MIPS matching rule. - * libiberty/configure: Regenerate. + * libiberty/configure.ac: Fix Linux/MIPS matching rule. + * libiberty/configure: Regenerate. 2009-03-27 Ian Lance Taylor @@ -647,7 +746,7 @@ 2008-10-08 David Edelsohn * xstrdup.c: Include after "config.h" - + 2008-10-07 Jan Kratochvil * configure.ac: Call AC_SYS_LARGEFILE. diff --git a/libiberty/Makefile.in b/libiberty/Makefile.in index ef35453..bcd03fd 100644 --- a/libiberty/Makefile.in +++ b/libiberty/Makefile.in @@ -2,7 +2,7 @@ # Originally written by K. Richard Pixley . # # Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, -# 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 +# 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 # Free Software Foundation # # This file is part of the libiberty library. @@ -148,10 +148,10 @@ CFILES = alloca.c argv.c asprintf.c atexit.c \ simple-object.c simple-object-coff.c simple-object-elf.c \ simple-object-mach-o.c \ snprintf.c sort.c \ - spaces.c splay-tree.c stpcpy.c stpncpy.c strcasecmp.c \ - strchr.c strdup.c strerror.c strncasecmp.c strncmp.c \ - strrchr.c strsignal.c strstr.c strtod.c strtol.c strtoul.c \ - strndup.c strverscmp.c \ + spaces.c splay-tree.c stack-limit.c stpcpy.c stpncpy.c \ + strcasecmp.c strchr.c strdup.c strerror.c strncasecmp.c \ + strncmp.c strrchr.c strsignal.c strstr.c strtod.c strtol.c \ + strtoul.c strndup.c strverscmp.c \ tmpnam.c \ unlink-if-ordinary.c \ vasprintf.c vfork.c vfprintf.c vprintf.c vsnprintf.c vsprintf.c \ @@ -183,7 +183,8 @@ REQUIRED_OFILES = \ ./simple-object.$(objext) ./simple-object-coff.$(objext) \ ./simple-object-elf.$(objext) ./simple-object-mach-o.$(objext) \ ./sort.$(objext) ./spaces.$(objext) \ - ./splay-tree.$(objext) ./strerror.$(objext) \ + ./splay-tree.$(objext) ./stack-limit.$(objext) \ + ./strerror.$(objext) \ ./strsignal.$(objext) ./unlink-if-ordinary.$(objext) \ ./xatexit.$(objext) ./xexit.$(objext) ./xmalloc.$(objext) \ ./xmemdup.$(objext) ./xstrdup.$(objext) ./xstrerror.$(objext) \ @@ -1033,6 +1034,12 @@ $(CONFIGURED_OFILES): stamp-picdir else true; fi $(COMPILE.c) $(srcdir)/splay-tree.c $(OUTPUT_OPTION) +./stack-limit.$(objext): $(srcdir)/stack-limit.c config.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/stack-limit.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/stack-limit.c $(OUTPUT_OPTION) + ./stpcpy.$(objext): $(srcdir)/stpcpy.c $(INCDIR)/ansidecl.h if [ x"$(PICFLAG)" != x ]; then \ $(COMPILE.c) $(PICFLAG) $(srcdir)/stpcpy.c -o pic/$@; \ diff --git a/libiberty/aclocal.m4 b/libiberty/aclocal.m4 index f2091c9..a528604 100644 --- a/libiberty/aclocal.m4 +++ b/libiberty/aclocal.m4 @@ -1,6 +1,7 @@ sinclude(../config/acx.m4) sinclude(../config/no-executables.m4) sinclude(../config/override.m4) +sinclude(../config/picflag.m4) sinclude(../config/warnings.m4) dnl See whether strncmp reads past the end of its string parameters. diff --git a/libiberty/config.in b/libiberty/config.in index e4f1f16..17c4c2e 100644 --- a/libiberty/config.in +++ b/libiberty/config.in @@ -109,6 +109,9 @@ /* Define to 1 if you have the `getpagesize' function. */ #undef HAVE_GETPAGESIZE +/* Define to 1 if you have the `getrlimit' function. */ +#undef HAVE_GETRLIMIT + /* Define to 1 if you have the `getrusage' function. */ #undef HAVE_GETRUSAGE @@ -205,6 +208,9 @@ /* Define to 1 if you have the `setproctitle' function. */ #undef HAVE_SETPROCTITLE +/* Define to 1 if you have the `setrlimit' function. */ +#undef HAVE_SETRLIMIT + /* Define to 1 if you have the `sigsetmask' function. */ #undef HAVE_SIGSETMASK diff --git a/libiberty/configure b/libiberty/configure index bdabe8d..c798937 100755 --- a/libiberty/configure +++ b/libiberty/configure @@ -4840,6 +4840,86 @@ if [ -n "${frag}" ]; then frag=${libiberty_topdir}/libiberty/config/$frag fi + + + + +case "${host}" in + # PIC is the default on some targets or must not be used. + *-*-darwin*) + # PIC is the default on this platform + # Common symbols not allowed in MH_DYLIB files + PICFLAG=-fno-common + ;; + alpha*-dec-osf5*) + # PIC is the default. + ;; + hppa*64*-*-hpux*) + # PIC is the default for 64-bit PA HP-UX. + ;; + i[34567]86-*-cygwin* | i[34567]86-*-mingw* | x86_64-*-mingw*) + ;; + i[34567]86-*-interix3*) + # Interix 3.x gcc -fpic/-fPIC options generate broken code. + # Instead, we relocate shared libraries at runtime. + ;; + i[34567]86-*-nto-qnx*) + # QNX uses GNU C++, but need to define -shared option too, otherwise + # it will coredump. + PICFLAG='-fPIC -shared' + ;; + i[34567]86-pc-msdosdjgpp*) + # DJGPP does not support shared libraries at all. + ;; + ia64*-*-hpux*) + # On IA64 HP-UX, PIC is the default but the pic flag + # sets the default TLS model and affects inlining. + PICFLAG=-fPIC + ;; + mips-sgi-irix6*) + # PIC is the default. + ;; + rs6000-ibm-aix* | powerpc-ibm-aix*) + # All AIX code is PIC. + ;; + + # Some targets support both -fPIC and -fpic, but prefer the latter. + # FIXME: Why? + i[34567]86-*-* | x86_64-*-*) + PICFLAG=-fpic + ;; + m68k-*-*) + PICFLAG=-fpic + ;; + s390*-*-*) + PICFLAG=-fpic + ;; + # FIXME: Override -fPIC default in libgcc only? + sh-*-linux* | sh[2346lbe]*-*-linux*) + PICFLAG=-fpic + ;; + # FIXME: Simplify to sh*-*-netbsd*? + sh-*-netbsdelf* | shl*-*-netbsdelf* | sh5-*-netbsd* | sh5l*-*-netbsd* | \ + sh64-*-netbsd* | sh64l*-*-netbsd*) + PICFLAG=-fpic + ;; + # Default to -fPIC unless specified otherwise. + *) + PICFLAG=-fPIC + ;; +esac + +# If the user explicitly uses -fpic/-fPIC, keep that. +case "${CFLAGS}" in + *-fpic*) + PICFLAG=-fpic + ;; + *-fPIC*) + PICFLAG=-fPIC + ;; +esac + + # If they didn't specify --enable-shared, don't generate shared libs. case "${enable_shared}" in yes) shared=yes ;; @@ -4847,27 +4927,8 @@ case "${enable_shared}" in "") shared=no ;; *) shared=yes ;; esac -if [ "${shared}" = "yes" ]; then - case "${host}" in - *-*-cygwin*) ;; - alpha*-*-linux*) PICFLAG=-fPIC ;; - arm*-*-*) PICFLAG=-fPIC ;; - hppa*-*-*) PICFLAG=-fPIC ;; - i370-*-*) PICFLAG=-fPIC ;; - ia64-*-*) PICFLAG=-fpic ;; - i[34567]86-*-* | x86_64-*-*) - PICFLAG=-fpic ;; - m68k-*-*) PICFLAG=-fpic ;; - mips*-*-linux*) PICFLAG=-fPIC ;; - powerpc*-*-aix*) ;; - powerpc*-*-*) PICFLAG=-fPIC ;; - sparc*-*-*) case "${CFLAGS}" in - *-fpic* ) PICFLAG=-fpic ;; - * ) PICFLAG=-fPIC ;; - esac ;; - s390*-*-*) PICFLAG=-fpic ;; - sh*-*-*) PICFLAG=-fPIC ;; - esac +if [ "${shared}" != "yes" ]; then + PICFLAG= fi @@ -5293,10 +5354,10 @@ funcs="$funcs setproctitle" vars="sys_errlist sys_nerr sys_siglist" -checkfuncs="__fsetlocking canonicalize_file_name dup3 getrusage getsysinfo \ - gettimeofday on_exit psignal pstat_getdynamic pstat_getstatic realpath \ - sbrk spawnve spawnvpe strerror strsignal sysconf sysctl sysmp table \ - times wait3 wait4" +checkfuncs="__fsetlocking canonicalize_file_name dup3 getrlimit getrusage \ + getsysinfo gettimeofday on_exit psignal pstat_getdynamic pstat_getstatic \ + realpath setrlimit sbrk spawnve spawnvpe strerror strsignal sysconf sysctl \ + sysmp table times wait3 wait4" # These are neither executed nor required, but they help keep # autoheader happy without adding a bunch of text to acconfig.h. @@ -5306,13 +5367,13 @@ if test "x" = "y"; then calloc canonicalize_file_name clock \ dup3 \ ffs __fsetlocking \ - getcwd getpagesize getrusage getsysinfo gettimeofday \ + getcwd getpagesize getrlimit getrusage getsysinfo gettimeofday \ index insque \ memchr memcmp memcpy memmem memmove memset mkstemps \ on_exit \ psignal pstat_getdynamic pstat_getstatic putenv \ random realpath rename rindex \ - sbrk setenv setproctitle sigsetmask snprintf spawnve spawnvpe \ + sbrk setenv setproctitle setrlimit sigsetmask snprintf spawnve spawnvpe \ stpcpy stpncpy strcasecmp strchr strdup \ strerror strncasecmp strndup strrchr strsignal strstr strtod strtol \ strtoul strverscmp sysconf sysctl sysmp \ diff --git a/libiberty/configure.ac b/libiberty/configure.ac index 9f1ff04..754b66a 100644 --- a/libiberty/configure.ac +++ b/libiberty/configure.ac @@ -191,6 +191,8 @@ if [[ -n "${frag}" ]]; then frag=${libiberty_topdir}/libiberty/config/$frag fi +GCC_PICFLAG + # If they didn't specify --enable-shared, don't generate shared libs. case "${enable_shared}" in yes) shared=yes ;; @@ -198,27 +200,8 @@ case "${enable_shared}" in "") shared=no ;; *) shared=yes ;; esac -if [[ "${shared}" = "yes" ]]; then - case "${host}" in - *-*-cygwin*) ;; - alpha*-*-linux*) PICFLAG=-fPIC ;; - arm*-*-*) PICFLAG=-fPIC ;; - hppa*-*-*) PICFLAG=-fPIC ;; - i370-*-*) PICFLAG=-fPIC ;; - ia64-*-*) PICFLAG=-fpic ;; - i[[34567]]86-*-* | x86_64-*-*) - PICFLAG=-fpic ;; - m68k-*-*) PICFLAG=-fpic ;; - mips*-*-linux*) PICFLAG=-fPIC ;; - powerpc*-*-aix*) ;; - powerpc*-*-*) PICFLAG=-fPIC ;; - sparc*-*-*) case "${CFLAGS}" in - *-fpic* ) PICFLAG=-fpic ;; - * ) PICFLAG=-fPIC ;; - esac ;; - s390*-*-*) PICFLAG=-fpic ;; - sh*-*-*) PICFLAG=-fPIC ;; - esac +if [[ "${shared}" != "yes" ]]; then + PICFLAG= fi AC_SUBST(PICFLAG) @@ -358,10 +341,10 @@ funcs="$funcs setproctitle" vars="sys_errlist sys_nerr sys_siglist" -checkfuncs="__fsetlocking canonicalize_file_name dup3 getrusage getsysinfo \ - gettimeofday on_exit psignal pstat_getdynamic pstat_getstatic realpath \ - sbrk spawnve spawnvpe strerror strsignal sysconf sysctl sysmp table \ - times wait3 wait4" +checkfuncs="__fsetlocking canonicalize_file_name dup3 getrlimit getrusage \ + getsysinfo gettimeofday on_exit psignal pstat_getdynamic pstat_getstatic \ + realpath setrlimit sbrk spawnve spawnvpe strerror strsignal sysconf sysctl \ + sysmp table times wait3 wait4" # These are neither executed nor required, but they help keep # autoheader happy without adding a bunch of text to acconfig.h. @@ -371,13 +354,13 @@ if test "x" = "y"; then calloc canonicalize_file_name clock \ dup3 \ ffs __fsetlocking \ - getcwd getpagesize getrusage getsysinfo gettimeofday \ + getcwd getpagesize getrlimit getrusage getsysinfo gettimeofday \ index insque \ memchr memcmp memcpy memmem memmove memset mkstemps \ on_exit \ psignal pstat_getdynamic pstat_getstatic putenv \ random realpath rename rindex \ - sbrk setenv setproctitle sigsetmask snprintf spawnve spawnvpe \ + sbrk setenv setproctitle setrlimit sigsetmask snprintf spawnve spawnvpe \ stpcpy stpncpy strcasecmp strchr strdup \ strerror strncasecmp strndup strrchr strsignal strstr strtod strtol \ strtoul strverscmp sysconf sysctl sysmp \ diff --git a/libiberty/cp-demangle.c b/libiberty/cp-demangle.c index 7e951cc..d67a9e7 100644 --- a/libiberty/cp-demangle.c +++ b/libiberty/cp-demangle.c @@ -1,5 +1,5 @@ /* Demangler for g++ V3 ABI. - Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Written by Ian Lance Taylor . @@ -278,8 +278,6 @@ struct d_growable_string enum { D_PRINT_BUFFER_LENGTH = 256 }; struct d_print_info { - /* The options passed to the demangler. */ - int options; /* Fixed-length allocated buffer for demangled data, flushed to the callback with a NUL termination once full. */ char buf[D_PRINT_BUFFER_LENGTH]; @@ -436,7 +434,7 @@ static void d_growable_string_callback_adapter (const char *, size_t, void *); static void -d_print_init (struct d_print_info *, int, demangle_callbackref, void *); +d_print_init (struct d_print_info *, demangle_callbackref, void *); static inline void d_print_error (struct d_print_info *); @@ -454,32 +452,32 @@ static inline void d_append_string (struct d_print_info *, const char *); static inline char d_last_char (struct d_print_info *); static void -d_print_comp (struct d_print_info *, const struct demangle_component *); +d_print_comp (struct d_print_info *, int, const struct demangle_component *); static void d_print_java_identifier (struct d_print_info *, const char *, int); static void -d_print_mod_list (struct d_print_info *, struct d_print_mod *, int); +d_print_mod_list (struct d_print_info *, int, struct d_print_mod *, int); static void -d_print_mod (struct d_print_info *, const struct demangle_component *); +d_print_mod (struct d_print_info *, int, const struct demangle_component *); static void -d_print_function_type (struct d_print_info *, +d_print_function_type (struct d_print_info *, int, const struct demangle_component *, struct d_print_mod *); static void -d_print_array_type (struct d_print_info *, +d_print_array_type (struct d_print_info *, int, const struct demangle_component *, struct d_print_mod *); static void -d_print_expr_op (struct d_print_info *, const struct demangle_component *); +d_print_expr_op (struct d_print_info *, int, const struct demangle_component *); static void -d_print_cast (struct d_print_info *, const struct demangle_component *); +d_print_cast (struct d_print_info *, int, const struct demangle_component *); static int d_demangle_callback (const char *, int, demangle_callbackref, void *); @@ -1282,6 +1280,7 @@ d_nested_name (struct d_info *di) /* ::= ::= ::= + ::= ::= ::= @@ -1310,10 +1309,19 @@ d_prefix (struct d_info *di) here. */ comb_type = DEMANGLE_COMPONENT_QUAL_NAME; - if (IS_DIGIT (peek) + if (peek == 'D') + { + char peek2 = d_peek_next_char (di); + if (peek2 == 'T' || peek2 == 't') + /* Decltype. */ + dc = cplus_demangle_type (di); + else + /* Destructor name. */ + dc = d_unqualified_name (di); + } + else if (IS_DIGIT (peek) || IS_LOWER (peek) || peek == 'C' - || peek == 'D' || peek == 'U' || peek == 'L') dc = d_unqualified_name (di); @@ -2740,10 +2748,18 @@ d_expression (struct d_info *di) /* Function parameter used in a late-specified return type. */ int index; d_advance (di, 2); - index = d_compact_number (di); - if (index < 0) - return NULL; - + if (d_peek_char (di) == 'T') + { + /* 'this' parameter. */ + d_advance (di, 1); + index = 0; + } + else + { + index = d_compact_number (di) + 1; + if (index == 0) + return NULL; + } return d_make_function_param (di, index); } else if (IS_DIGIT (peek) @@ -3293,14 +3309,14 @@ d_growable_string_callback_adapter (const char *s, size_t l, void *opaque) /* Initialize a print information structure. */ static void -d_print_init (struct d_print_info *dpi, int options, - demangle_callbackref callback, void *opaque) +d_print_init (struct d_print_info *dpi, demangle_callbackref callback, + void *opaque) { - dpi->options = options; dpi->len = 0; dpi->last_char = '\0'; dpi->templates = NULL; dpi->modifiers = NULL; + dpi->pack_index = 0; dpi->flush_count = 0; dpi->callback = callback; @@ -3392,9 +3408,9 @@ cplus_demangle_print_callback (int options, { struct d_print_info dpi; - d_print_init (&dpi, options, callback, opaque); + d_print_init (&dpi, callback, opaque); - d_print_comp (&dpi, dc); + d_print_comp (&dpi, options, dc); d_print_flush (&dpi); @@ -3537,7 +3553,7 @@ d_pack_length (const struct demangle_component *dc) if needed. */ static void -d_print_subexpr (struct d_print_info *dpi, +d_print_subexpr (struct d_print_info *dpi, int options, const struct demangle_component *dc) { int simple = 0; @@ -3546,7 +3562,7 @@ d_print_subexpr (struct d_print_info *dpi, simple = 1; if (!simple) d_append_char (dpi, '('); - d_print_comp (dpi, dc); + d_print_comp (dpi, options, dc); if (!simple) d_append_char (dpi, ')'); } @@ -3554,9 +3570,13 @@ d_print_subexpr (struct d_print_info *dpi, /* Subroutine to handle components. */ static void -d_print_comp (struct d_print_info *dpi, +d_print_comp (struct d_print_info *dpi, int options, const struct demangle_component *dc) { + /* Magic variable to let reference smashing skip over the next modifier + without needing to modify *dc. */ + const struct demangle_component *mod_inner = NULL; + if (dc == NULL) { d_print_error (dpi); @@ -3568,7 +3588,7 @@ d_print_comp (struct d_print_info *dpi, switch (dc->type) { case DEMANGLE_COMPONENT_NAME: - if ((dpi->options & DMGL_JAVA) == 0) + if ((options & DMGL_JAVA) == 0) d_append_buffer (dpi, dc->u.s_name.s, dc->u.s_name.len); else d_print_java_identifier (dpi, dc->u.s_name.s, dc->u.s_name.len); @@ -3576,12 +3596,12 @@ d_print_comp (struct d_print_info *dpi, case DEMANGLE_COMPONENT_QUAL_NAME: case DEMANGLE_COMPONENT_LOCAL_NAME: - d_print_comp (dpi, d_left (dc)); - if ((dpi->options & DMGL_JAVA) == 0) + d_print_comp (dpi, options, d_left (dc)); + if ((options & DMGL_JAVA) == 0) d_append_string (dpi, "::"); else d_append_char (dpi, '.'); - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_right (dc)); return; case DEMANGLE_COMPONENT_TYPED_NAME: @@ -3671,7 +3691,7 @@ d_print_comp (struct d_print_info *dpi, } } - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_right (dc)); if (typed_name->type == DEMANGLE_COMPONENT_TEMPLATE) dpi->templates = dpt.next; @@ -3684,7 +3704,7 @@ d_print_comp (struct d_print_info *dpi, if (! adpm[i].printed) { d_append_char (dpi, ' '); - d_print_mod (dpi, adpm[i].mod); + d_print_mod (dpi, options, adpm[i].mod); } } @@ -3707,7 +3727,7 @@ d_print_comp (struct d_print_info *dpi, dcl = d_left (dc); - if ((dpi->options & DMGL_JAVA) != 0 + if ((options & DMGL_JAVA) != 0 && dcl->type == DEMANGLE_COMPONENT_NAME && dcl->u.s_name.len == 6 && strncmp (dcl->u.s_name.s, "JArray", 6) == 0) @@ -3715,16 +3735,16 @@ d_print_comp (struct d_print_info *dpi, /* Special-case Java arrays, so that JArray appears instead as TYPE[]. */ - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_right (dc)); d_append_string (dpi, "[]"); } else { - d_print_comp (dpi, dcl); + d_print_comp (dpi, options, dcl); if (d_last_char (dpi) == '<') d_append_char (dpi, ' '); d_append_char (dpi, '<'); - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_right (dc)); /* Avoid generating two consecutive '>' characters, to avoid the C++ syntactic ambiguity. */ if (d_last_char (dpi) == '>') @@ -3759,7 +3779,7 @@ d_print_comp (struct d_print_info *dpi, hold_dpt = dpi->templates; dpi->templates = hold_dpt->next; - d_print_comp (dpi, a); + d_print_comp (dpi, options, a); dpi->templates = hold_dpt; @@ -3767,79 +3787,79 @@ d_print_comp (struct d_print_info *dpi, } case DEMANGLE_COMPONENT_CTOR: - d_print_comp (dpi, dc->u.s_ctor.name); + d_print_comp (dpi, options, dc->u.s_ctor.name); return; case DEMANGLE_COMPONENT_DTOR: d_append_char (dpi, '~'); - d_print_comp (dpi, dc->u.s_dtor.name); + d_print_comp (dpi, options, dc->u.s_dtor.name); return; case DEMANGLE_COMPONENT_VTABLE: d_append_string (dpi, "vtable for "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_VTT: d_append_string (dpi, "VTT for "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_CONSTRUCTION_VTABLE: d_append_string (dpi, "construction vtable for "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); d_append_string (dpi, "-in-"); - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_right (dc)); return; case DEMANGLE_COMPONENT_TYPEINFO: d_append_string (dpi, "typeinfo for "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_TYPEINFO_NAME: d_append_string (dpi, "typeinfo name for "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_TYPEINFO_FN: d_append_string (dpi, "typeinfo fn for "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_THUNK: d_append_string (dpi, "non-virtual thunk to "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_VIRTUAL_THUNK: d_append_string (dpi, "virtual thunk to "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_COVARIANT_THUNK: d_append_string (dpi, "covariant return thunk to "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_JAVA_CLASS: d_append_string (dpi, "java Class for "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_GUARD: d_append_string (dpi, "guard variable for "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_REFTEMP: d_append_string (dpi, "reference temporary for "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_HIDDEN_ALIAS: d_append_string (dpi, "hidden alias for "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_SUB_STD: @@ -3866,22 +3886,50 @@ d_print_comp (struct d_print_info *dpi, break; if (pdpm->mod->type == dc->type) { - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; } } } } + goto modifier; + + case DEMANGLE_COMPONENT_REFERENCE: + case DEMANGLE_COMPONENT_RVALUE_REFERENCE: + { + /* Handle reference smashing: & + && = &. */ + const struct demangle_component *sub = d_left (dc); + if (sub->type == DEMANGLE_COMPONENT_TEMPLATE_PARAM) + { + struct demangle_component *a = d_lookup_template_argument (dpi, sub); + if (a && a->type == DEMANGLE_COMPONENT_TEMPLATE_ARGLIST) + a = d_index_template_argument (a, dpi->pack_index); + + if (a == NULL) + { + d_print_error (dpi); + return; + } + + sub = a; + } + + if (sub->type == DEMANGLE_COMPONENT_REFERENCE + || sub->type == dc->type) + dc = sub; + else if (sub->type == DEMANGLE_COMPONENT_RVALUE_REFERENCE) + mod_inner = d_left (sub); + } /* Fall through. */ + case DEMANGLE_COMPONENT_RESTRICT_THIS: case DEMANGLE_COMPONENT_VOLATILE_THIS: case DEMANGLE_COMPONENT_CONST_THIS: case DEMANGLE_COMPONENT_VENDOR_TYPE_QUAL: case DEMANGLE_COMPONENT_POINTER: - case DEMANGLE_COMPONENT_REFERENCE: - case DEMANGLE_COMPONENT_RVALUE_REFERENCE: case DEMANGLE_COMPONENT_COMPLEX: case DEMANGLE_COMPONENT_IMAGINARY: + modifier: { /* We keep a list of modifiers on the stack. */ struct d_print_mod dpm; @@ -3892,12 +3940,15 @@ d_print_comp (struct d_print_info *dpi, dpm.printed = 0; dpm.templates = dpi->templates; - d_print_comp (dpi, d_left (dc)); + if (!mod_inner) + mod_inner = d_left (dc); + + d_print_comp (dpi, options, mod_inner); /* If the modifier didn't get printed by the type, print it now. */ if (! dpm.printed) - d_print_mod (dpi, dc); + d_print_mod (dpi, options, dc); dpi->modifiers = dpm.next; @@ -3905,7 +3956,7 @@ d_print_comp (struct d_print_info *dpi, } case DEMANGLE_COMPONENT_BUILTIN_TYPE: - if ((dpi->options & DMGL_JAVA) == 0) + if ((options & DMGL_JAVA) == 0) d_append_buffer (dpi, dc->u.s_builtin.type->name, dc->u.s_builtin.type->len); else @@ -3914,16 +3965,21 @@ d_print_comp (struct d_print_info *dpi, return; case DEMANGLE_COMPONENT_VENDOR_TYPE: - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_FUNCTION_TYPE: { - if ((dpi->options & DMGL_RET_POSTFIX) != 0) - d_print_function_type (dpi, dc, dpi->modifiers); + if ((options & DMGL_RET_POSTFIX) != 0) + d_print_function_type (dpi, + options & ~(DMGL_RET_POSTFIX | DMGL_RET_DROP), + dc, dpi->modifiers); /* Print return type if present */ - if (d_left (dc) != NULL) + if (d_left (dc) != NULL && (options & DMGL_RET_POSTFIX) != 0) + d_print_comp (dpi, options & ~(DMGL_RET_POSTFIX | DMGL_RET_DROP), + d_left (dc)); + else if (d_left (dc) != NULL && (options & DMGL_RET_DROP) == 0) { struct d_print_mod dpm; @@ -3935,7 +3991,8 @@ d_print_comp (struct d_print_info *dpi, dpm.printed = 0; dpm.templates = dpi->templates; - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options & ~(DMGL_RET_POSTFIX | DMGL_RET_DROP), + d_left (dc)); dpi->modifiers = dpm.next; @@ -3944,12 +4001,14 @@ d_print_comp (struct d_print_info *dpi, /* In standard prefix notation, there is a space between the return type and the function signature. */ - if ((dpi->options & DMGL_RET_POSTFIX) == 0) + if ((options & DMGL_RET_POSTFIX) == 0) d_append_char (dpi, ' '); } - if ((dpi->options & DMGL_RET_POSTFIX) == 0) - d_print_function_type (dpi, dc, dpi->modifiers); + if ((options & DMGL_RET_POSTFIX) == 0) + d_print_function_type (dpi, + options & ~(DMGL_RET_POSTFIX | DMGL_RET_DROP), + dc, dpi->modifiers); return; } @@ -4002,7 +4061,7 @@ d_print_comp (struct d_print_info *dpi, pdpm = pdpm->next; } - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_right (dc)); dpi->modifiers = hold_modifiers; @@ -4012,10 +4071,10 @@ d_print_comp (struct d_print_info *dpi, while (i > 1) { --i; - d_print_mod (dpi, adpm[i].mod); + d_print_mod (dpi, options, adpm[i].mod); } - d_print_array_type (dpi, dc, dpi->modifiers); + d_print_array_type (dpi, options, dc, dpi->modifiers); return; } @@ -4031,12 +4090,12 @@ d_print_comp (struct d_print_info *dpi, dpm.printed = 0; dpm.templates = dpi->templates; - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_right (dc)); /* If the modifier didn't get printed by the type, print it now. */ if (! dpm.printed) - d_print_mod (dpi, dc); + d_print_mod (dpi, options, dc); dpi->modifiers = dpm.next; @@ -4050,7 +4109,7 @@ d_print_comp (struct d_print_info *dpi, if (dc->u.s_fixed.length->u.s_builtin.type != &cplus_demangle_builtin_types['i'-'a']) { - d_print_comp (dpi, dc->u.s_fixed.length); + d_print_comp (dpi, options, dc->u.s_fixed.length); d_append_char (dpi, ' '); } if (dc->u.s_fixed.accum) @@ -4062,7 +4121,7 @@ d_print_comp (struct d_print_info *dpi, case DEMANGLE_COMPONENT_ARGLIST: case DEMANGLE_COMPONENT_TEMPLATE_ARGLIST: if (d_left (dc) != NULL) - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); if (d_right (dc) != NULL) { size_t len; @@ -4074,7 +4133,7 @@ d_print_comp (struct d_print_info *dpi, d_append_string (dpi, ", "); len = dpi->len; flush_count = dpi->flush_count; - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_right (dc)); /* If that didn't print anything (which can happen with empty template argument packs), remove the comma and space. */ if (dpi->flush_count == flush_count && dpi->len == len) @@ -4097,24 +4156,63 @@ d_print_comp (struct d_print_info *dpi, case DEMANGLE_COMPONENT_EXTENDED_OPERATOR: d_append_string (dpi, "operator "); - d_print_comp (dpi, dc->u.s_extended_operator.name); + d_print_comp (dpi, options, dc->u.s_extended_operator.name); return; case DEMANGLE_COMPONENT_CAST: d_append_string (dpi, "operator "); - d_print_cast (dpi, dc); + d_print_cast (dpi, options, dc); return; case DEMANGLE_COMPONENT_UNARY: - if (d_left (dc)->type != DEMANGLE_COMPONENT_CAST) - d_print_expr_op (dpi, d_left (dc)); + if (d_left (dc)->type == DEMANGLE_COMPONENT_OPERATOR + && d_left (dc)->u.s_operator.op->len == 1 + && d_left (dc)->u.s_operator.op->name[0] == '&' + && d_right (dc)->type == DEMANGLE_COMPONENT_TYPED_NAME + && d_left (d_right (dc))->type == DEMANGLE_COMPONENT_QUAL_NAME + && d_right (d_right (dc))->type == DEMANGLE_COMPONENT_FUNCTION_TYPE) + { + /* Address of a function (therefore in an expression context) must + have its argument list suppressed. + + unary operator ... dc + operator & ... d_left (dc) + typed name ... d_right (dc) + qualified name ... d_left (d_right (dc)) + + function type ... d_right (d_right (dc)) + argument list + */ + + d_print_expr_op (dpi, options, d_left (dc)); + d_print_comp (dpi, options, d_left (d_right (dc))); + return; + } + else if (d_left (dc)->type == DEMANGLE_COMPONENT_OPERATOR + && d_left (dc)->u.s_operator.op->len == 1 + && d_left (dc)->u.s_operator.op->name[0] == '&' + && d_right (dc)->type == DEMANGLE_COMPONENT_QUAL_NAME) + { + /* Keep also already processed variant without the argument list. + + unary operator ... dc + operator & ... d_left (dc) + qualified name ... d_right (dc) + */ + + d_print_expr_op (dpi, options, d_left (dc)); + d_print_comp (dpi, options, d_right (dc)); + return; + } + else if (d_left (dc)->type != DEMANGLE_COMPONENT_CAST) + d_print_expr_op (dpi, options, d_left (dc)); else { d_append_char (dpi, '('); - d_print_cast (dpi, d_left (dc)); + d_print_cast (dpi, options, d_left (dc)); d_append_char (dpi, ')'); } - d_print_subexpr (dpi, d_right (dc)); + d_print_subexpr (dpi, options, d_right (dc)); return; case DEMANGLE_COMPONENT_BINARY: @@ -4132,18 +4230,32 @@ d_print_comp (struct d_print_info *dpi, && d_left (dc)->u.s_operator.op->name[0] == '>') d_append_char (dpi, '('); - d_print_subexpr (dpi, d_left (d_right (dc))); + if (strcmp (d_left (dc)->u.s_operator.op->code, "cl") == 0 + && d_left (d_right (dc))->type == DEMANGLE_COMPONENT_TYPED_NAME) + { + /* Function call used in an expression should not have printed types + of the function arguments. Values of the function arguments still + get printed below. */ + + const struct demangle_component *func = d_left (d_right (dc)); + + if (d_right (func)->type != DEMANGLE_COMPONENT_FUNCTION_TYPE) + d_print_error (dpi); + d_print_subexpr (dpi, options, d_left (func)); + } + else + d_print_subexpr (dpi, options, d_left (d_right (dc))); if (strcmp (d_left (dc)->u.s_operator.op->code, "ix") == 0) { d_append_char (dpi, '['); - d_print_comp (dpi, d_right (d_right (dc))); + d_print_comp (dpi, options, d_right (d_right (dc))); d_append_char (dpi, ']'); } else { if (strcmp (d_left (dc)->u.s_operator.op->code, "cl") != 0) - d_print_expr_op (dpi, d_left (dc)); - d_print_subexpr (dpi, d_right (d_right (dc))); + d_print_expr_op (dpi, options, d_left (dc)); + d_print_subexpr (dpi, options, d_right (d_right (dc))); } if (d_left (dc)->type == DEMANGLE_COMPONENT_OPERATOR @@ -4165,11 +4277,11 @@ d_print_comp (struct d_print_info *dpi, d_print_error (dpi); return; } - d_print_subexpr (dpi, d_left (d_right (dc))); - d_print_expr_op (dpi, d_left (dc)); - d_print_subexpr (dpi, d_left (d_right (d_right (dc)))); + d_print_subexpr (dpi, options, d_left (d_right (dc))); + d_print_expr_op (dpi, options, d_left (dc)); + d_print_subexpr (dpi, options, d_left (d_right (d_right (dc)))); d_append_string (dpi, " : "); - d_print_subexpr (dpi, d_right (d_right (d_right (dc)))); + d_print_subexpr (dpi, options, d_right (d_right (d_right (dc)))); return; case DEMANGLE_COMPONENT_TRINARY_ARG1: @@ -4200,7 +4312,7 @@ d_print_comp (struct d_print_info *dpi, { if (dc->type == DEMANGLE_COMPONENT_LITERAL_NEG) d_append_char (dpi, '-'); - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_right (dc)); switch (tp) { default: @@ -4250,13 +4362,13 @@ d_print_comp (struct d_print_info *dpi, } d_append_char (dpi, '('); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); d_append_char (dpi, ')'); if (dc->type == DEMANGLE_COMPONENT_LITERAL_NEG) d_append_char (dpi, '-'); if (tp == D_PRINT_FLOAT) d_append_char (dpi, '['); - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_right (dc)); if (tp == D_PRINT_FLOAT) d_append_char (dpi, ']'); } @@ -4268,12 +4380,12 @@ d_print_comp (struct d_print_info *dpi, case DEMANGLE_COMPONENT_JAVA_RESOURCE: d_append_string (dpi, "java resource "); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); return; case DEMANGLE_COMPONENT_COMPOUND_NAME: - d_print_comp (dpi, d_left (dc)); - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_left (dc)); + d_print_comp (dpi, options, d_right (dc)); return; case DEMANGLE_COMPONENT_CHARACTER: @@ -4282,7 +4394,7 @@ d_print_comp (struct d_print_info *dpi, case DEMANGLE_COMPONENT_DECLTYPE: d_append_string (dpi, "decltype ("); - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); d_append_char (dpi, ')'); return; @@ -4296,7 +4408,7 @@ d_print_comp (struct d_print_info *dpi, /* d_find_pack won't find anything if the only packs involved in this expansion are function parameter packs; in that case, just print the pattern and "...". */ - d_print_subexpr (dpi, d_left (dc)); + d_print_subexpr (dpi, options, d_left (dc)); d_append_string (dpi, "..."); return; } @@ -4306,7 +4418,7 @@ d_print_comp (struct d_print_info *dpi, for (i = 0; i < len; ++i) { dpi->pack_index = i; - d_print_comp (dpi, dc); + d_print_comp (dpi, options, dc); if (i < len-1) d_append_string (dpi, ", "); } @@ -4314,24 +4426,32 @@ d_print_comp (struct d_print_info *dpi, return; case DEMANGLE_COMPONENT_FUNCTION_PARAM: - d_append_string (dpi, "{parm#"); - d_append_num (dpi, dc->u.s_number.number + 1); - d_append_char (dpi, '}'); + { + long num = dc->u.s_number.number; + if (num == 0) + d_append_string (dpi, "this"); + else + { + d_append_string (dpi, "{parm#"); + d_append_num (dpi, num); + d_append_char (dpi, '}'); + } + } return; case DEMANGLE_COMPONENT_GLOBAL_CONSTRUCTORS: d_append_string (dpi, "global constructors keyed to "); - d_print_comp (dpi, dc->u.s_binary.left); + d_print_comp (dpi, options, dc->u.s_binary.left); return; case DEMANGLE_COMPONENT_GLOBAL_DESTRUCTORS: d_append_string (dpi, "global destructors keyed to "); - d_print_comp (dpi, dc->u.s_binary.left); + d_print_comp (dpi, options, dc->u.s_binary.left); return; case DEMANGLE_COMPONENT_LAMBDA: d_append_string (dpi, "{lambda("); - d_print_comp (dpi, dc->u.s_unary_num.sub); + d_print_comp (dpi, options, dc->u.s_unary_num.sub); d_append_string (dpi, ")#"); d_append_num (dpi, dc->u.s_unary_num.num + 1); d_append_char (dpi, '}'); @@ -4405,7 +4525,7 @@ d_print_java_identifier (struct d_print_info *dpi, const char *name, int len) qualifiers on this after printing a function. */ static void -d_print_mod_list (struct d_print_info *dpi, +d_print_mod_list (struct d_print_info *dpi, int options, struct d_print_mod *mods, int suffix) { struct d_print_template *hold_dpt; @@ -4419,7 +4539,7 @@ d_print_mod_list (struct d_print_info *dpi, || mods->mod->type == DEMANGLE_COMPONENT_VOLATILE_THIS || mods->mod->type == DEMANGLE_COMPONENT_CONST_THIS))) { - d_print_mod_list (dpi, mods->next, suffix); + d_print_mod_list (dpi, options, mods->next, suffix); return; } @@ -4430,13 +4550,13 @@ d_print_mod_list (struct d_print_info *dpi, if (mods->mod->type == DEMANGLE_COMPONENT_FUNCTION_TYPE) { - d_print_function_type (dpi, mods->mod, mods->next); + d_print_function_type (dpi, options, mods->mod, mods->next); dpi->templates = hold_dpt; return; } else if (mods->mod->type == DEMANGLE_COMPONENT_ARRAY_TYPE) { - d_print_array_type (dpi, mods->mod, mods->next); + d_print_array_type (dpi, options, mods->mod, mods->next); dpi->templates = hold_dpt; return; } @@ -4452,10 +4572,10 @@ d_print_mod_list (struct d_print_info *dpi, hold_modifiers = dpi->modifiers; dpi->modifiers = NULL; - d_print_comp (dpi, d_left (mods->mod)); + d_print_comp (dpi, options, d_left (mods->mod)); dpi->modifiers = hold_modifiers; - if ((dpi->options & DMGL_JAVA) == 0) + if ((options & DMGL_JAVA) == 0) d_append_string (dpi, "::"); else d_append_char (dpi, '.'); @@ -4475,23 +4595,23 @@ d_print_mod_list (struct d_print_info *dpi, || dc->type == DEMANGLE_COMPONENT_CONST_THIS) dc = d_left (dc); - d_print_comp (dpi, dc); + d_print_comp (dpi, options, dc); dpi->templates = hold_dpt; return; } - d_print_mod (dpi, mods->mod); + d_print_mod (dpi, options, mods->mod); dpi->templates = hold_dpt; - d_print_mod_list (dpi, mods->next, suffix); + d_print_mod_list (dpi, options, mods->next, suffix); } /* Print a modifier. */ static void -d_print_mod (struct d_print_info *dpi, +d_print_mod (struct d_print_info *dpi, int options, const struct demangle_component *mod) { switch (mod->type) @@ -4510,11 +4630,11 @@ d_print_mod (struct d_print_info *dpi, return; case DEMANGLE_COMPONENT_VENDOR_TYPE_QUAL: d_append_char (dpi, ' '); - d_print_comp (dpi, d_right (mod)); + d_print_comp (dpi, options, d_right (mod)); return; case DEMANGLE_COMPONENT_POINTER: /* There is no pointer symbol in Java. */ - if ((dpi->options & DMGL_JAVA) == 0) + if ((options & DMGL_JAVA) == 0) d_append_char (dpi, '*'); return; case DEMANGLE_COMPONENT_REFERENCE: @@ -4532,22 +4652,22 @@ d_print_mod (struct d_print_info *dpi, case DEMANGLE_COMPONENT_PTRMEM_TYPE: if (d_last_char (dpi) != '(') d_append_char (dpi, ' '); - d_print_comp (dpi, d_left (mod)); + d_print_comp (dpi, options, d_left (mod)); d_append_string (dpi, "::*"); return; case DEMANGLE_COMPONENT_TYPED_NAME: - d_print_comp (dpi, d_left (mod)); + d_print_comp (dpi, options, d_left (mod)); return; case DEMANGLE_COMPONENT_VECTOR_TYPE: d_append_string (dpi, " __vector("); - d_print_comp (dpi, d_left (mod)); + d_print_comp (dpi, options, d_left (mod)); d_append_char (dpi, ')'); return; default: /* Otherwise, we have something that won't go back on the modifier stack, so we can just print it. */ - d_print_comp (dpi, mod); + d_print_comp (dpi, options, mod); return; } } @@ -4555,7 +4675,7 @@ d_print_mod (struct d_print_info *dpi, /* Print a function type, except for the return type. */ static void -d_print_function_type (struct d_print_info *dpi, +d_print_function_type (struct d_print_info *dpi, int options, const struct demangle_component *dc, struct d_print_mod *mods) { @@ -4615,7 +4735,7 @@ d_print_function_type (struct d_print_info *dpi, hold_modifiers = dpi->modifiers; dpi->modifiers = NULL; - d_print_mod_list (dpi, mods, 0); + d_print_mod_list (dpi, options, mods, 0); if (need_paren) d_append_char (dpi, ')'); @@ -4623,11 +4743,11 @@ d_print_function_type (struct d_print_info *dpi, d_append_char (dpi, '('); if (d_right (dc) != NULL) - d_print_comp (dpi, d_right (dc)); + d_print_comp (dpi, options, d_right (dc)); d_append_char (dpi, ')'); - d_print_mod_list (dpi, mods, 1); + d_print_mod_list (dpi, options, mods, 1); dpi->modifiers = hold_modifiers; } @@ -4635,7 +4755,7 @@ d_print_function_type (struct d_print_info *dpi, /* Print an array type, except for the element type. */ static void -d_print_array_type (struct d_print_info *dpi, +d_print_array_type (struct d_print_info *dpi, int options, const struct demangle_component *dc, struct d_print_mod *mods) { @@ -4669,7 +4789,7 @@ d_print_array_type (struct d_print_info *dpi, if (need_paren) d_append_string (dpi, " ("); - d_print_mod_list (dpi, mods, 0); + d_print_mod_list (dpi, options, mods, 0); if (need_paren) d_append_char (dpi, ')'); @@ -4681,7 +4801,7 @@ d_print_array_type (struct d_print_info *dpi, d_append_char (dpi, '['); if (d_left (dc) != NULL) - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); d_append_char (dpi, ']'); } @@ -4689,24 +4809,24 @@ d_print_array_type (struct d_print_info *dpi, /* Print an operator in an expression. */ static void -d_print_expr_op (struct d_print_info *dpi, +d_print_expr_op (struct d_print_info *dpi, int options, const struct demangle_component *dc) { if (dc->type == DEMANGLE_COMPONENT_OPERATOR) d_append_buffer (dpi, dc->u.s_operator.op->name, dc->u.s_operator.op->len); else - d_print_comp (dpi, dc); + d_print_comp (dpi, options, dc); } /* Print a cast. */ static void -d_print_cast (struct d_print_info *dpi, +d_print_cast (struct d_print_info *dpi, int options, const struct demangle_component *dc) { if (d_left (dc)->type != DEMANGLE_COMPONENT_TEMPLATE) - d_print_comp (dpi, d_left (dc)); + d_print_comp (dpi, options, d_left (dc)); else { struct d_print_mod *hold_dpm; @@ -4724,14 +4844,14 @@ d_print_cast (struct d_print_info *dpi, dpi->templates = &dpt; dpt.template_decl = d_left (dc); - d_print_comp (dpi, d_left (d_left (dc))); + d_print_comp (dpi, options, d_left (d_left (dc))); dpi->templates = dpt.next; if (d_last_char (dpi) == '<') d_append_char (dpi, ' '); d_append_char (dpi, '<'); - d_print_comp (dpi, d_right (d_left (dc))); + d_print_comp (dpi, options, d_right (d_left (dc))); /* Avoid generating two consecutive '>' characters, to avoid the C++ syntactic ambiguity. */ if (d_last_char (dpi) == '>') diff --git a/libiberty/filename_cmp.c b/libiberty/filename_cmp.c index 0eed120..5179f8d 100644 --- a/libiberty/filename_cmp.c +++ b/libiberty/filename_cmp.c @@ -50,19 +50,27 @@ and backward slashes are equal. int filename_cmp (const char *s1, const char *s2) { -#ifndef HAVE_DOS_BASED_FILE_SYSTEM +#if !defined(HAVE_DOS_BASED_FILE_SYSTEM) \ + && !defined(HAVE_CASE_INSENSITIVE_FILE_SYSTEM) return strcmp(s1, s2); #else for (;;) { - int c1 = TOLOWER (*s1); - int c2 = TOLOWER (*s2); + int c1 = *s1; + int c2 = *s2; +#if defined (HAVE_CASE_INSENSITIVE_FILE_SYSTEM) + c1 = TOLOWER (c1); + c2 = TOLOWER (c2); +#endif + +#if defined (HAVE_DOS_BASED_FILE_SYSTEM) /* On DOS-based file systems, the '/' and the '\' are equivalent. */ if (c1 == '/') c1 = '\\'; if (c2 == '/') c2 = '\\'; +#endif if (c1 != c2) return (c1 - c2); @@ -100,21 +108,29 @@ and backward slashes are equal. int filename_ncmp (const char *s1, const char *s2, size_t n) { -#ifndef HAVE_DOS_BASED_FILE_SYSTEM +#if !defined(HAVE_DOS_BASED_FILE_SYSTEM) \ + && !defined(HAVE_CASE_INSENSITIVE_FILE_SYSTEM) return strncmp(s1, s2, n); #else if (!n) return 0; for (; n > 0; --n) { - int c1 = TOLOWER (*s1); - int c2 = TOLOWER (*s2); + int c1 = *s1; + int c2 = *s2; +#if defined (HAVE_CASE_INSENSITIVE_FILE_SYSTEM) + c1 = TOLOWER (c1); + c2 = TOLOWER (c2); +#endif + +#if defined (HAVE_DOS_BASED_FILE_SYSTEM) /* On DOS-based file systems, the '/' and the '\' are equivalent. */ if (c1 == '/') c1 = '\\'; if (c2 == '/') c2 = '\\'; +#endif if (c1 == '\0' || c1 != c2) return (c1 - c2); diff --git a/libiberty/md5.c b/libiberty/md5.c index 9de9d88..11920e1 100644 --- a/libiberty/md5.c +++ b/libiberty/md5.c @@ -76,15 +76,19 @@ md5_init_ctx (struct md5_ctx *ctx) /* Put result from CTX in first 16 bytes following RESBUF. The result must be in little endian byte order. - IMPORTANT: On some systems it is required that RESBUF is correctly - aligned for a 32 bits value. */ + IMPORTANT: RESBUF may not be aligned as strongly as MD5_UNIT32 so we + put things in a local (aligned) buffer first, then memcpy into RESBUF. */ void * md5_read_ctx (const struct md5_ctx *ctx, void *resbuf) { - ((md5_uint32 *) resbuf)[0] = SWAP (ctx->A); - ((md5_uint32 *) resbuf)[1] = SWAP (ctx->B); - ((md5_uint32 *) resbuf)[2] = SWAP (ctx->C); - ((md5_uint32 *) resbuf)[3] = SWAP (ctx->D); + md5_uint32 buffer[4]; + + buffer[0] = SWAP (ctx->A); + buffer[1] = SWAP (ctx->B); + buffer[2] = SWAP (ctx->C); + buffer[3] = SWAP (ctx->D); + + memcpy (resbuf, buffer, 16); return resbuf; } diff --git a/libiberty/stack-limit.c b/libiberty/stack-limit.c new file mode 100644 index 0000000..e64cac2 --- /dev/null +++ b/libiberty/stack-limit.c @@ -0,0 +1,62 @@ +/* Increase stack size limit if possible. + Copyright (C) 2011 Free Software Foundation, Inc. + +This file is part of the libiberty library. This library is free +software; you can redistribute it and/or modify it under the +terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) +any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. + +As a special exception, if you link this library with files +compiled with a GNU compiler to produce an executable, this does not cause +the resulting executable to be covered by the GNU General Public License. +This exception does not however invalidate any other reasons why +the executable file might be covered by the GNU General Public License. */ + +/* + +@deftypefn Extension void stack_limit_increase (unsigned long @var{pref}) + +Attempt to increase stack size limit to @var{pref} bytes if possible. + +@end deftypefn + +*/ + +#include "config.h" + +#ifdef HAVE_STDINT_H +#include +#endif +#ifdef HAVE_SYS_RESOURCE_H +#include +#endif + +void +stack_limit_increase (unsigned long pref) +{ +#if defined(HAVE_SETRLIMIT) && defined(HAVE_GETRLIMIT) \ + && defined(RLIMIT_STACK) && defined(RLIM_INFINITY) + struct rlimit rlim; + if (getrlimit (RLIMIT_STACK, &rlim) == 0 + && rlim.rlim_cur != RLIM_INFINITY + && rlim.rlim_cur < pref + && (rlim.rlim_max == RLIM_INFINITY || rlim.rlim_cur < rlim.rlim_max)) + { + rlim.rlim_cur = pref; + if (rlim.rlim_max != RLIM_INFINITY && rlim.rlim_cur > rlim.rlim_max) + rlim.rlim_cur = rlim.rlim_max; + setrlimit (RLIMIT_STACK, &rlim); + } +#endif +} diff --git a/libiberty/testsuite/demangle-expected b/libiberty/testsuite/demangle-expected index 5ce0377..3737cfd 100644 --- a/libiberty/testsuite/demangle-expected +++ b/libiberty/testsuite/demangle-expected @@ -3901,10 +3901,18 @@ java resource java/util/iso4217.properties --format=gnu-v3 _Z3addIidEDTplfp_fp0_ET_T0_ decltype ({parm#1}+{parm#2}) add(int, double) +# decltype scope test +--format=gnu-v3 +_Z1fI1SENDtfp_E4typeET_ +decltype ({parm#1})::type f(S) # decltype/fn call test --format=gnu-v3 _Z4add3IidEDTclL_Z1gEfp_fp0_EET_T0_ decltype (g({parm#1}, {parm#2})) add3(int, double) +# 'this' test +--format=gnu-v3 +_ZN1A1fIiEEDTcldtdtdefpT1b1fIT_EEEv +decltype ((((*this).b).(f))()) A::f() # new (2008) built in types test --format=gnu-v3 _Z1fDfDdDeDhDsDi @@ -3920,7 +3928,11 @@ decltype (({parm#1}.(g))()) h, double>(A, double) # test for typed function in decltype --format=gnu-v3 _ZN1AIiE1jIiEEDTplfp_clL_Z1xvEEET_ -decltype ({parm#1}+((x())())) A::j(int) +decltype ({parm#1}+(x())) A::j(int) +# typed function in decltype with an argument list +--format=gnu-v3 +_Z1tIlEDTplcvT_Li5EclL_Z1qsELi6EEEv +decltype (((long)(5))+(q(6))) t() # test for expansion of function parameter pack --format=gnu-v3 _Z1gIIidEEDTclL_Z1fEspplfp_Li1EEEDpT_ @@ -3957,8 +3969,55 @@ decltype (({parm#1}.(operator-))()) h(A) _Z1fDn f(decltype(nullptr)) --format=gnu-v3 +_Z1fIRiEvOT_b +void f(int&, bool) +--format=gnu-v3 _ZN5aaaaa6bbbbbb5cccccIN23ddddddddddddddddddddddd3eeeENS2_4ffff16ggggggggggggggggENS0_9hhhhhhhhhES6_S6_S6_S6_S6_S6_S6_EE aaaaa::bbbbbb::ccccc +--format=gnu-v3 +_Z5outerIsEcPFilE +char outer(int (*)(long)) +--format=gnu-v3 +_Z5outerPFsiEl +outer(short (*)(int), long) +--format=gnu-v3 +_Z6outer2IsEPFilES1_ +int (*outer2(int (*)(long)))(long) +--format=gnu-v3 --ret-postfix +_Z5outerIsEcPFilE +outer(int (*)(long))char +--format=gnu-v3 --ret-postfix +_Z5outerPFsiEl +outer(short (*)(int), long) +--format=gnu-v3 --ret-postfix +_Z6outer2IsEPFilES1_ +outer2(int (*)(long))int (*)(long) +--format=gnu-v3 --ret-drop +_Z5outerIsEcPFilE +outer(int (*)(long)) +--format=gnu-v3 --ret-drop +_Z5outerPFsiEl +outer(short (*)(int), long) +--format=gnu-v3 --ret-drop +_Z6outer2IsEPFilES1_ +outer2(int (*)(long)) +# +--format=gnu-v3 --no-params +_ZN1KIXadL_ZN1S1mEiEEE1fEv +K<&S::m>::f() +K<&S::m>::f +--format=gnu-v3 +_ZN1KILi1EXadL_ZN1S1mEiEEE1fEv +K<1, &S::m>::f() +# Here the `(int)' argument list of `S::m' is already removed. +--format=gnu-v3 +_ZN1KILi1EXadL_ZN1S1mEEEE1fEv +K<1, &S::m>::f() +# +# Used to crash -- binutils PR 13030. +--format=gnu-v3 +_ZSt10_ConstructI10CellBorderIS0_EEvPT_DpOT0_ +_ZSt10_ConstructI10CellBorderIS0_EEvPT_DpOT0_ # # Ada (GNAT) tests. # @@ -4091,4 +4150,4 @@ DFA # http://sourceware.org/bugzilla/show_bug.cgi?id=11572 --format=auto _ZN3Psi7VariantIIcPKcEE5visitIIRZN11VariantTest9TestVisit11test_methodEvEUlS2_E0_RZNS6_11test_methodEvEUlcE1_RZNS6_11test_methodEvEUlNS_4NoneEE_EEENS_13VariantDetail19SelectVisitorResultIIDpT_EE4typeEDpOSG_ -Psi::VariantDetail::SelectVisitorResult::type Psi::Variant::visit((VariantTest::TestVisit::test_method()::{lambda(Psi::None)#1}&&&)...) +Psi::VariantDetail::SelectVisitorResult::type Psi::Variant::visit((VariantTest::TestVisit::test_method()::{lambda(Psi::None)#1}&)...) diff --git a/libiberty/testsuite/test-demangle.c b/libiberty/testsuite/test-demangle.c index 1c982d6..11d9729 100644 --- a/libiberty/testsuite/test-demangle.c +++ b/libiberty/testsuite/test-demangle.c @@ -159,6 +159,7 @@ exp: %s\n", output is an integer representing ctor_kind. --is-v3-dtor Likewise, but for dtors. --ret-postfix Passes the DMGL_RET_POSTFIX option + --ret-drop Passes the DMGL_RET_DROP option For compatibility, just in case it matters, the options line may be empty, to mean --format=auto. If it doesn't start with --, then it @@ -174,7 +175,7 @@ main(argc, argv) int no_params; int is_v3_ctor; int is_v3_dtor; - int ret_postfix; + int ret_postfix, ret_drop; struct line format; struct line input; struct line expect; @@ -209,6 +210,7 @@ main(argc, argv) no_params = 0; ret_postfix = 0; + ret_drop = 0; is_v3_ctor = 0; is_v3_dtor = 0; if (format.data[0] == '\0') @@ -265,6 +267,8 @@ main(argc, argv) is_v3_dtor = 1; else if (strcmp (opt, "--ret-postfix") == 0) ret_postfix = 1; + else if (strcmp (opt, "--ret-drop") == 0) + ret_drop = 1; else { printf ("FAIL at line %d: unrecognized option %s\n", @@ -307,9 +311,9 @@ main(argc, argv) cplus_demangle_set_style (style); - result = cplus_demangle (inp, - DMGL_PARAMS|DMGL_ANSI|DMGL_TYPES - |(ret_postfix ? DMGL_RET_POSTFIX : 0)); + result = cplus_demangle (inp, (DMGL_PARAMS | DMGL_ANSI | DMGL_TYPES + | (ret_postfix ? DMGL_RET_POSTFIX : 0) + | (ret_drop ? DMGL_RET_DROP : 0))); if (result ? strcmp (result, expect.data) diff --git a/libiberty/testsuite/test-expandargv.c b/libiberty/testsuite/test-expandargv.c index 57b96b3..dff20d4 100644 --- a/libiberty/testsuite/test-expandargv.c +++ b/libiberty/testsuite/test-expandargv.c @@ -189,7 +189,7 @@ writeout_test (int test, const char * test_data) { char filename[256]; FILE *fd; - size_t len; + size_t len, sys_fwrite; char * parse; /* Unique filename per test */ @@ -208,7 +208,10 @@ writeout_test (int test, const char * test_data) /* Run all possible replaces */ run_replaces (parse); - fwrite (parse, len, sizeof (char), fd); + sys_fwrite = fwrite (parse, sizeof (char), len, fd); + if (sys_fwrite != len) + fatal_error (__LINE__, "Failed to write to test file.", errno); + free (parse); fclose (fd); } diff --git a/md5.sum b/md5.sum new file mode 100644 index 0000000..92e2efb --- /dev/null +++ b/md5.sum @@ -0,0 +1,12857 @@ +59530bdf33659b29e73d4adb9f9f6552 COPYING +9f604d8a4f8e74f4f5140845a21b6674 COPYING.LIB +d32239bcb673463ab874e80d47fae504 COPYING3 +6a6a8e020838b23406c81b19c1d46df6 COPYING3.LIB +2f8e9644db486186e7a4b0ad62c39eab ChangeLog +8604252784712dfd4447a5b0183c15d8 MAINTAINERS +99d9a540fab7b2404f7b1e89bcac0d51 Makefile.def +92a164cccf605af7736e9c5e85259030 Makefile.in +02397e834204ac5b5186fb1c23bad302 Makefile.tpl +07c33a285703b40cd6f93a478e97e03b README +72b7803505f14cf31e291a59f538c6c8 README-maintainer-mode +408ef1462276b75d3708877103c85eb8 bfd/.gitignore +6fa0d57c29b1872c3829bb251d8898f9 bfd/acinclude.m4 +3381b54a88e28dc216f5a2c7f4d30c32 bfd/aclocal.m4 +d8ddebc6a89593388d3c07405644a845 bfd/aix386-core.c +b3575c73467ebc45473c2ea0875c1b4e bfd/aix5ppc-core.c +c9ec7d24e6be9796656156d1c44d295c bfd/aout-adobe.c +20b9909bfd2ddd02d26b99dc37b194fa bfd/aout-arm.c +d3a602dd8c8525c314571b8122935fc6 bfd/aout-cris.c +839d08c624b51cc73a2e2e28741f0fb1 bfd/aout-ns32k.c +31a4784a448794bed0bf31a191a8d669 bfd/aout-sparcle.c +b6a4558a2c7d319f6d570a23ce81b1db bfd/aout-target.h +22e4eb1022de9eb752738eebd980b1c9 bfd/aout-tic30.c +a840f061d05ebff08fc9b147c0bd2c3f bfd/aout0.c +c13beca7dc743efbb13bd2c0091a2d41 bfd/aout32.c +e028cead3cc51cc3eb131e35b66c8813 bfd/aout64.c +1aec204d64d5b321d35def886f46e078 bfd/aoutf1.h +5a92a9bb5c133fb99f62d2504c8a6437 bfd/aoutx.h +8087ea866defe89564193c80f6ad2fed bfd/archive.c +15c4097aac815e15f674c0609aab3f4e bfd/archive64.c +5f4c48c9ba3717caec074caeaf4aa702 bfd/archures.c +5ed657bb294400d6c36a8c00ee83ad48 bfd/armnetbsd.c +f651d74c3bff7ce51478ec90f1763bf8 bfd/bfd-in.h +857e544780d8c41865431f810a442e69 bfd/bfd-in2.h +eaaca5af5a36653c14b81fa04ef705ae bfd/bfd.c +5f01e2a009218852c42c63d1a20bcdb9 bfd/bfd.m4 +7fb120c19da2c4d96d86e53e105ae059 bfd/bfdio.c +da4c12f9e0f77a2d235b154c536a439a bfd/bfdwin.c +91164da037fb2dd5a84678adde4ac3cb bfd/binary.c +cea32a666a0713e7835609a9bcc6d907 bfd/bout.c +86c96e8a5c3afb021ed2bcb18a31675d bfd/cache.c +c97717d51efe6661f46119e4e1ea4db4 bfd/cf-i386lynx.c +18f09a3a9b17fa7bff19b95588827a37 bfd/cf-sparclynx.c +034104b33e708daea80a68cd7638e76f bfd/ChangeLog +daabeea83b81f2707d48d2c04dcc37c4 bfd/ChangeLog-0001 +0a3e33c0b179772334e34175da11b64f bfd/ChangeLog-0203 +d20549a2f701cd99318d0af070416bf3 bfd/ChangeLog-2004 +aa4c260fc770839ccd0776dec1c2353d bfd/ChangeLog-2005 +57633b8d529989fe966891285e127e78 bfd/ChangeLog-2006 +6ffeb475fe9699cb8c90e32a25d8e148 bfd/ChangeLog-2007 +6e40d764a9749e6638d7d7c9c1301c76 bfd/ChangeLog-2008 +e343d8f85c4b1f246b783db27f797934 bfd/ChangeLog-2009 +30e074bff91d690e7c55999f9df5edbb bfd/ChangeLog-2010 +8dcb7ce2e45911e21ceb6e457e69eacf bfd/ChangeLog-9193 +6d37ec6ee5f57a1188a0717f2fa5deb0 bfd/ChangeLog-9495 +b7ad288235bf6a3e015e01cb6096cbe7 bfd/ChangeLog-9697 +dbb0d89c90d6c0ec79eb003a5b63f923 bfd/ChangeLog-9899 +8501ee115266f28cdb1105eae2f7f520 bfd/cisco-core.c +a273ad57cbee716afe73dd5b2ebaf817 bfd/coff-alpha.c +b2c01d9e98c123ddf643f51d22752aff bfd/coff-apollo.c +4ed770f7721bc206fd80e8ccf1ba68d1 bfd/coff-arm.c +aa42b42d63542892d67c2c0ede9dd6f2 bfd/coff-aux.c +f5b2082a5a1a29c38e706e3d9c0a8af7 bfd/coff-go32.c +7ddfa118cf2d72e10c168401199d0dd6 bfd/coff-h8300.c +4a232faf6edb35141b68834d82bb444c bfd/coff-h8500.c +227af7ae6cd2d71d3c540cd9c8fa4c55 bfd/coff-i386.c +5b8269256cd88c3dff19f7fe4d360133 bfd/coff-i860.c +88c3e03e382595443e0dc771b7f2b8fc bfd/coff-i960.c +0a8f5c6759e6065b6819d9a4e6e08d21 bfd/coff-ia64.c +4c9e31191b7a19aa9472ca3620c5d029 bfd/coff-m68k.c +f2a7f3c126540e19b45d69c87d18d4e6 bfd/coff-m88k.c +57fe1aeff47ff2dd8d1cf5c95e8ea7d1 bfd/coff-mcore.c +e91ded3cde01135aea6fe90387fa6224 bfd/coff-mips.c +530adaceacad1b71056d11d45b68fa62 bfd/coff-or32.c +1ec92d761b8a010714f50e07c9ea50cd bfd/coff-ppc.c +ea14de11175928a0dd9c002dc5d963a5 bfd/coff-rs6000.c +3ae7c591751dfaf16f40033b20b1e5b5 bfd/coff-sh.c +cb5ae8ecdedba094ce170c3d3cb895c9 bfd/coff-sparc.c +12729aa3dbc470a175f0a1a39b2e9952 bfd/coff-stgo32.c +d875c398d7e93cf42aec58884a374a37 bfd/coff-svm68k.c +7069bf46919a4a7c88a33483a2813a40 bfd/coff-tic30.c +ee9a930e5bc9ca7ec06a7d698d6d3a22 bfd/coff-tic4x.c +6ab56b6584158b01d2dc3e0460a493bf bfd/coff-tic54x.c +308b9b8b5dbf0373f664dab323a75a6f bfd/coff-tic80.c +6cd06305505a30c517e919d2e55a1ada bfd/coff-u68k.c +81a19edd9de0c77a9148f421d84a2aed bfd/coff-w65.c +4f9c0de80ce9266b55bb00bed21c9389 bfd/coff-we32k.c +76d38bbfad6e0f7805310cb3688073c2 bfd/coff-x86_64.c +8277a49e1403d5308d984580784a3275 bfd/coff-z80.c +7d0efdbb284f00939c3d7f6de24235da bfd/coff-z8k.c +a193f92a3d6988382254678ca0ed6776 bfd/coff64-rs6000.c +aae1d6bee1ba23f9b236785eff8ac180 bfd/coffcode.h +cdf5994c020034d54989025b49d4fb73 bfd/coffgen.c +046e29da876c15400afefd42e346e61c bfd/cofflink.c +8b735739122823a277e225a45fd2fa80 bfd/coffswap.h +32c9c99c1e104818523f13d4011113e3 bfd/compress.c +af778e87dc323876819f057b73dc45f7 bfd/config.bfd +d7a8c5a505ff94107d2f8f53d787283d bfd/config.in +dfeaed6167bd65ad197f2d72f80d7747 bfd/configure +62648cd0ae8a4495a8ccd686cf18e445 bfd/configure.com +15a3950292cca2571a79f5abf7c01e95 bfd/configure.host +7a6bb5c152f96f7ab9dbe77c2ee14cd8 bfd/configure.in +d32239bcb673463ab874e80d47fae504 bfd/COPYING +0ad57f9869ce6685635952c413d30c3b bfd/corefile.c +89ae5a994f899638bc8effdc8bfeac34 bfd/cpu-alpha.c +3d9623ebd0055cc23a9f84929db2cf0f bfd/cpu-arc.c +2704edffe71c370ccbe87e05a4f7cb95 bfd/cpu-arm.c +af052e4ae39ea5e5ab22aba781f37417 bfd/cpu-avr.c +e5359870df01083e350eec26574fc25f bfd/cpu-bfin.c +6ae40f951ba2fe744d05c06bc8d64f80 bfd/cpu-cr16.c +e17372c3409e4b59e5448e1e7d3b65b0 bfd/cpu-cr16c.c +069151362a6520c1de16762c0e32d588 bfd/cpu-cris.c +560c01c276ce3d26a8a1ec6136889299 bfd/cpu-crx.c +5926f1162d10b02d270d85e11695e618 bfd/cpu-d10v.c +f39f657b7b404cedd71c44b3254d4fa8 bfd/cpu-d30v.c +95ff9999519ba7119f67bb87196b9678 bfd/cpu-dlx.c +d864f35a009e75e369acd1925a7d1056 bfd/cpu-fr30.c +8dcd1222ed2acbca6844dc6cfd246310 bfd/cpu-frv.c +86fbd5e47ed20f51b600f454f2c78600 bfd/cpu-h8300.c +092d206aa16c5f74936f5dacc4375a4d bfd/cpu-h8500.c +b1e25b270596278333ccbe5a8cb86ada bfd/cpu-hppa.c +3f79e3c79d70b495d1de3c4e132d60c8 bfd/cpu-i370.c +4d40f51e511b7105d8586c2a77cc4609 bfd/cpu-i386.c +826adfd8cdf1ebd3ba4c77f8b84c1654 bfd/cpu-i860.c +2d8e643f66d80ec33b312b2ccd7476cd bfd/cpu-i960.c +5198b542f07fd7f52a9c9c827af5616b bfd/cpu-ia64-opc.c +5839e4309c4859d3a174765ed3522a85 bfd/cpu-ia64.c +4524bde19eeefda082bbccf768e5df5d bfd/cpu-ip2k.c +a2acba4eacfcc83d555068c6f0747bfe bfd/cpu-iq2000.c +c6206efb34e3f17af565d0d90217d49e bfd/cpu-k1om.c +d9b66debce1820c2ebda6ae3d325034f bfd/cpu-l1om.c +b44557a52ae7803692123f34d71373d0 bfd/cpu-lm32.c +8477d902c2e995b5c9c3a6cd7370d100 bfd/cpu-m10200.c +ca560e934ed5d367ab80dfaa757b7d8d bfd/cpu-m10300.c +5d1039c31606332304242ec3758ec79a bfd/cpu-m32c.c +774bd19ed65dd7505c28891bd4407b7b bfd/cpu-m32r.c +6ab713aa0b98d8a7be5910d74bb75602 bfd/cpu-m68hc11.c +0266f22c1e79ae970ac54fc740c74147 bfd/cpu-m68hc12.c +e759187831ad93284a9e4fafa69abe16 bfd/cpu-m68k.c +6ed4ee0ee7447a9ab467d28742627be5 bfd/cpu-m88k.c +c30d43d274800c9418fb244acf5b9641 bfd/cpu-mcore.c +45df80823f40d77dd8495b7d52f1ebab bfd/cpu-mep.c +d0466065fbf0bc773645f7dac657355d bfd/cpu-microblaze.c +212e2a324d2bfce0548646a3e30f54c9 bfd/cpu-mips.c +33e393cb256971b30a150f50f9ceba7d bfd/cpu-mmix.c +0e566a384c3cb42d225def6d79d9105c bfd/cpu-moxie.c +f959ee5623b67d571f8c6ef764638591 bfd/cpu-msp430.c +d87f62d816eab577e24ed00e8a1dc82b bfd/cpu-mt.c +07ba0d23ca8f838e8ba9b1e2f69cec8b bfd/cpu-ns32k.c +c204abe1385d8544a04782cd3e547a8e bfd/cpu-openrisc.c +6a9152a776286e937d03812caffd06b0 bfd/cpu-or32.c +5bc8a2a42fd38ca10cd19c8ff17017ee bfd/cpu-pdp11.c +fca5332e71878803a9b05ba6d7ba6bcf bfd/cpu-pj.c +1fc49dc67fe8b86991f8e70759801a6e bfd/cpu-plugin.c +32730f9ced53f4ea96609868534c5024 bfd/cpu-powerpc.c +639cb93eba287cb8262c9bab69aa1de7 bfd/cpu-rs6000.c +ecb4883b6df0b09e6a32f0f40b4915f6 bfd/cpu-rx.c +f5bbc07515c3e51d4c91b68abc89226b bfd/cpu-s390.c +749c338af5feda4b61c32ac7cef3c728 bfd/cpu-score.c +15511c9f15aaea5a8fc8cb8e0616feeb bfd/cpu-sh.c +26bd80a3fd973f6d0e39f7d58bbea060 bfd/cpu-sparc.c +21a1cb9748c501a39e5542af1f33b611 bfd/cpu-spu.c +0d01e90a8372e857cf93e1915267d99a bfd/cpu-tic30.c +5192f963df80aaa7f8f36fcc8d7e1f89 bfd/cpu-tic4x.c +d7ee6d0c52826b6aa0c140bf6927cdc8 bfd/cpu-tic54x.c +d25b25f15f2f89a009660d3777f11223 bfd/cpu-tic6x.c +74924c54241882e67602fa5cf483a8e6 bfd/cpu-tic80.c +68faf06d37979aae8db77c6c2de50262 bfd/cpu-tilegx.c +6468a45886e5ff9b0db680d6d6433cae bfd/cpu-tilepro.c +948c2e6044fe797fb4e11a1db823b5b9 bfd/cpu-v850.c +669042112776344f813a6a91ce53a409 bfd/cpu-vax.c +966c37d73c083aeee8959e51c49f28c9 bfd/cpu-w65.c +d5271485a1353b275cc69acf7332b4ff bfd/cpu-we32k.c +11a6c47e1d51c8bf25715e420f9df31f bfd/cpu-xc16x.c +4124b3a9995f1e85b9a3bafe5059b4b9 bfd/cpu-xstormy16.c +db4d0b1da7361125abfd80f312a43052 bfd/cpu-xtensa.c +e17e159f98955683b8194c5d5df31e96 bfd/cpu-z80.c +427e6473e9ad2e878ec987152e3cff2a bfd/cpu-z8k.c +1870cebc00e9a18f8aed220ba7c8cef9 bfd/demo64.c +dad496c68df8395b3cdb8e3187c37eb1 bfd/dep-in.sed +b1848292a4811cd7301fc6201debe63a bfd/doc/aoutx.texi +1ec269e34cd7de48135ce9d4aefb98b6 bfd/doc/archive.texi +a97dd390d551809a3521ac155ad821a2 bfd/doc/archures.texi +564650551cd91ba7305a5814bc4f8f4d bfd/doc/bfd.info +81652cb38f512353656fd8f29f2e9df6 bfd/doc/bfd.texinfo +fbccdbd05f0690694c015fba7c392d45 bfd/doc/bfdint.texi +7edf511939deb638e8291f264c4249e1 bfd/doc/bfdio.texi +5ee7f8ae8b0ec33c7baf2e004084aaa1 bfd/doc/bfdsumm.texi +ed2f6de3413bab723db72b9cfba36f85 bfd/doc/bfdt.texi +8ec611d97620e190243c23b882d8a88e bfd/doc/bfdver.texi +236e856bb13ee47adc5d7d253037640d bfd/doc/bfdwin.texi +2afdf80182d7d816eb993fe194d378a3 bfd/doc/cache.texi +1866a5dccdd2353d75ef69ef21077d14 bfd/doc/ChangeLog +42b5ebab441fcbf65e95c2aa31262147 bfd/doc/ChangeLog-9103 +42b97469de7550820862b7c27dda849b bfd/doc/chew.c +232d094e3d6da6e3294d39c0149901d2 bfd/doc/coffcode.texi +6dd9da257666139a061d6905349d9614 bfd/doc/core.texi +e67d8b07516154c4ddbee2e3bab3d75e bfd/doc/doc.str +51139f6af786e74446d01ec49807fc28 bfd/doc/elf.texi +d41d8cd98f00b204e9800998ecf8427e bfd/doc/elfcode.texi +072910d553f79906db69fa7c0e956bba bfd/doc/fdl.texi +930173859dab35d4c1c03efd5ddb18e3 bfd/doc/format.texi +d2b923f7732c26442570c16fd1dfac5a bfd/doc/hash.texi +39f61ac0fb56eced56e6894e7bc47cef bfd/doc/header.sed +37ba364fb34b96a1dbb55b0f6f612432 bfd/doc/init.texi +0fc22c68d543f8dc7cc4548a3fad3557 bfd/doc/libbfd.texi +ebb7107f0b9aa8607e4fb3af643e6171 bfd/doc/linker.texi +d2c072a60c85bbcf23800ed64bd45f83 bfd/doc/Makefile.am +40319bd6a8a254e8a40c97442f5dfff3 bfd/doc/Makefile.in +5fa24958e8a60b2f879af658e615ccc0 bfd/doc/makefile.vms +58f9e78e71f2d034a79e172899e792f6 bfd/doc/mmo.texi +0a434fb4ed336b3267a07a0eee83a714 bfd/doc/opncls.texi +d7a37304ccd7b245f93df4be02797477 bfd/doc/proto.str +095a05e08cb77bf7d9f718de19befe84 bfd/doc/reloc.texi +7cda9a06854f5529e7a27ed951aace6b bfd/doc/section.texi +f335289247e38d4dce82697113a6bce5 bfd/doc/syms.texi +bf5eee2282a29e48a8bea259d0cfc44f bfd/doc/targets.texi +35a51081f68984bab0850ecc54b062cc bfd/dwarf1.c +f55f39ae32c808e7a091f261e75b7850 bfd/dwarf2.c +0ce39c90208b12ef2a4c178187c4db54 bfd/ecoff.c +d2787db8fdda32e6f28c6635fed02cdf bfd/ecofflink.c +67df9e1bdfc0782dd9e6ad00f505f687 bfd/ecoffswap.h +f51b03b3f2dc74522822ae4dc9ff1eac bfd/elf-attrs.c +aa93878aeb61a6769ea0459f8c7aaf40 bfd/elf-bfd.h +eb6e0c9a65e4ef6e60ddb8d84c42fc85 bfd/elf-eh-frame.c +ab61804e1d5adeef7a190158af639583 bfd/elf-hppa.h +9cae244d87acec3e44ecb339cd364e13 bfd/elf-ifunc.c +7b1fa717b0323857568400b252902312 bfd/elf-m10200.c +8def5a64b51822df5e274b9353cd69b1 bfd/elf-m10300.c +299214fa9cc7a7bac4c32e3ad1028389 bfd/elf-strtab.c +42ee16947225b1bc6c90ba81f1869381 bfd/elf-vxworks.c +558028f73662a4a2a2df3932d23a30b9 bfd/elf-vxworks.h +c7da7c2abd35705ef7a36abb2f214564 bfd/elf.c +87f5612eba792da8c039b1c0e59ee24a bfd/elf32-am33lin.c +9d03e5cc8b0719b6fdb483746ba834a0 bfd/elf32-arc.c +0fda5d99f18fc1cd05b655488f70571a bfd/elf32-arm.c +8a04ed7a1f6cd6dc97f5448e168f8a90 bfd/elf32-avr.c +f6846e8628e2f26f82fea28151906429 bfd/elf32-avr.h +3361a5cdb5fde551b49e908f2204bf42 bfd/elf32-bfin.c +80c3d3a4891d10d7ad684e8466c1935c bfd/elf32-cr16.c +2cb217d76cc527cd60817ecd017cfb10 bfd/elf32-cr16c.c +f6f189a60ecc9ca0b375cc027830e308 bfd/elf32-cris.c +4199171d3be10b6d06353d086c2f1a15 bfd/elf32-crx.c +0778b06b2ee2d9f31f428d7302e95cd4 bfd/elf32-d10v.c +e9aa232096cc8fe8d530c39db7358897 bfd/elf32-d30v.c +9dc2c3083007d055584a29f2c4bc0e08 bfd/elf32-dlx.c +d78a2835c4d0bceffddaa93868b67074 bfd/elf32-fr30.c +d3feec9d76912557cf2662ff8e5a3cfa bfd/elf32-frv.c +2fbdc5d0b99c7ed22cbbc0b5082feb95 bfd/elf32-gen.c +7b9f8da8c6251fe91c970cfcb78f6482 bfd/elf32-h8300.c +c887ef4e762be76ab59328bb98de1ea1 bfd/elf32-hppa.c +0f3b87f69654d5b2726d626a709cc9b3 bfd/elf32-hppa.h +5a8acd43eb2d3729383c2114eab34050 bfd/elf32-i370.c +fb381e522c3553f60fc2295b1b58f98e bfd/elf32-i386.c +ee57a120f5721538749d61aaf9191a97 bfd/elf32-i860.c +af76e3dde2241645d746bcb82f2f86ed bfd/elf32-i960.c +7135d21aa3600609ccc0d7fa3535013e bfd/elf32-ip2k.c +c98d5aea99470a393a8ae31c4980f4d4 bfd/elf32-iq2000.c +6dc69d4caebdcade1797a640339a7154 bfd/elf32-lm32.c +07646154bfb59e81a76168ad0a88aabf bfd/elf32-m32c.c +e23f17f2cfb0d420b4288611aa0cd8d4 bfd/elf32-m32r.c +6428c04385c66ae14d4bca296623bac5 bfd/elf32-m68hc11.c +51df867fbf4d0ae3b47d176786169d58 bfd/elf32-m68hc12.c +77443960526ec549d2209447c26a1627 bfd/elf32-m68hc1x.c +494e09c13f3a731ad18d5190e4443db1 bfd/elf32-m68hc1x.h +55c77bb3024e9a5b3fa6f10791b0e479 bfd/elf32-m68k.c +24c6dfe183b600fba2f348e08fe8b3c5 bfd/elf32-m88k.c +21fb6613e678ec26d3b4570c8f2c0cec bfd/elf32-mcore.c +51d8efff5c1ef19d9f00d5a3254f0d38 bfd/elf32-mep.c +88182211b25497f444b6a7afc35acf90 bfd/elf32-microblaze.c +0c5b2d824b73533f8de8e1998a3eae9c bfd/elf32-mips.c +b4fc78e1f9a3a0e45fbd692fdeb30584 bfd/elf32-moxie.c +624f58a4f62a23ad6acf2ed1ec669282 bfd/elf32-msp430.c +68f00b7ffa1d86f18e630f7c48693457 bfd/elf32-mt.c +018af022914aed2c14aea3f6e1b7a8a5 bfd/elf32-openrisc.c +468e5e58c80e985dfbfa201ce07fe4ba bfd/elf32-or32.c +140b65ea1bdd039c81067900b5124da8 bfd/elf32-pj.c +a517cc13988b19242e8636aa64b3ea47 bfd/elf32-ppc.c +365a056a6b67a82bc90fd684ae12a82c bfd/elf32-ppc.h +632e98e35f700b640df3c454565c729e bfd/elf32-rx.c +d35146f1c1fe1ed70cd724eae86983b6 bfd/elf32-s390.c +8d87a8b0caa7f8f4f48b4f959bd52e49 bfd/elf32-score.c +0ae85011185c7162178de9dc0acabc90 bfd/elf32-score.h +b99fa646f5da8708b636b46b8b162faf bfd/elf32-score7.c +1452b80dbcae3a156632f017e6a9e1b8 bfd/elf32-sh-relocs.h +70d7820e62a8d4c8da02a1ce5f0fe3db bfd/elf32-sh-symbian.c +0640f3ccfd32f9f69a916c2045c4ed25 bfd/elf32-sh.c +c3e727bdfb7a73954c1f7ea914d5de0e bfd/elf32-sh64-com.c +a1e9a3c25fd579771da3e57df20efbdc bfd/elf32-sh64.c +1fa268e389df0b3304de7d965589da01 bfd/elf32-sh64.h +23b143cc38a09a53a9410a8cea1f96b6 bfd/elf32-sparc.c +28fa20f7933cb94983ec0f2643e9716b bfd/elf32-spu.c +e48841dba20a31a21c00d16af64ee8f8 bfd/elf32-spu.h +52c5196f2718ad68df91e44bbf7179a2 bfd/elf32-tic6x.c +e24c26414c8cffc67b83fcb4bcfb2a55 bfd/elf32-tic6x.h +8d590e9b423120035e03e29ea8ff74c6 bfd/elf32-tilegx.c +5a56e51411354a0c6dc6fd74f5896da3 bfd/elf32-tilegx.h +7eda65fbfc21b0c25172b27a2680ed8f bfd/elf32-tilepro.c +b1166d035ecbc003403a55552fbda550 bfd/elf32-tilepro.h +db7c5d5a4b5687078101c68578e80875 bfd/elf32-v850.c +73b985af7662709f58504440b0a1ddf6 bfd/elf32-vax.c +1e2e75212cde3fa3a9263dd49dd3a972 bfd/elf32-xc16x.c +f759e10eba5ac63622f6a60717b69b7f bfd/elf32-xstormy16.c +513e93182d83eb04fcf31352b96c31f5 bfd/elf32-xtensa.c +19711956ec075d032f0d0b894b11a1ce bfd/elf32.c +f1ccd1d1b78289cbd32f34aa9e2c9b14 bfd/elf64-alpha.c +cb5514787c5264ee0bc353a2c981561f bfd/elf64-gen.c +30bddabed647a2c091e7d6b1dd59c433 bfd/elf64-hppa.c +9cff3ac6c428477bd9e305540d95e47a bfd/elf64-hppa.h +da0371ca4804af1529f3a72f6d0ac7ec bfd/elf64-mips.c +513dd5792664b734fc2b09c3f3ac6fa9 bfd/elf64-mmix.c +1d3bbb21c0303d3c94c0f18c724eb22a bfd/elf64-ppc.c +5596457fac5cbdd67b8c273d8bb890c9 bfd/elf64-ppc.h +63d9b5308b9c75737792c23f4530e1ff bfd/elf64-s390.c +46f04581d21f6927dad1d007109c8694 bfd/elf64-sh64.c +c4873a109e3134d9a9f2a3784ee34d86 bfd/elf64-sparc.c +4c71d0b2f5f315b45c6b3319ebb770cf bfd/elf64-tilegx.c +fcf3f7fff3f72094447832681d4e23e3 bfd/elf64-tilegx.h +e1750f4ed4b6ea17e932fee12781160c bfd/elf64-x86-64.c +72144adaba3f8c119f115d7af46b2502 bfd/elf64.c +ac1c1025d0ef7ec8d77e95ce79477c86 bfd/elfcode.h +16571e24f21c320a2fac42e3b98494de bfd/elfcore.h +3e21cbb3432875f08edc1ecebdaefe55 bfd/elflink.c +564d764e21ddfe77383d3cb95056ff04 bfd/elfn32-mips.c +6bde5bc7002aa7e1264f3034b55f1cde bfd/elfnn-ia64.c +96944bd725981974ba76e887c9dba7a5 bfd/elfxx-ia64.c +4155caaab977fb465c3e89f068183ee3 bfd/elfxx-ia64.h +ad915022ae9a3b9ccd4146a03fef412d bfd/elfxx-mips.c +b67886d2b2b2684ff187bcbaf9410b0d bfd/elfxx-mips.h +e4c75c19d68bcffcf86cd2e91b831c72 bfd/elfxx-sparc.c +3608d55b3d3531e3572ac1f1acb0df35 bfd/elfxx-sparc.h +6e620ce23dff38fdedef80039402508b bfd/elfxx-target.h +ea5f26b0f97042c651b14a2c2b309ef9 bfd/elfxx-tilegx.c +2ac78eb0e9567bd2222495c6f4db43c8 bfd/elfxx-tilegx.h +efebf716233c08ae64f74104709dc5fb bfd/epoc-pe-arm.c +e5062a411407a4e8f94cfe0e931990f8 bfd/epoc-pei-arm.c +422ecc607bdbf1398914705cc25a7b9e bfd/format.c +fc8bec4190b9d8fb626bb9395d8c1af0 bfd/freebsd.h +c3348a714f44a96cc2032f62ee507728 bfd/gen-aout.c +b0682558ad69d3671cc55f83abebf32d bfd/genlink.h +663a6979bd331c91d1385445edeca7b0 bfd/go32stub.h +6c011e2cc19ef4e5e27d334684ae1fda bfd/hash.c +5078b3985212bed5ac3c79b3b9497571 bfd/host-aout.c +065b0a6c7a8a5427098e677cef40f6ab bfd/hosts/alphalinux.h +0c52204c0eb0530561da8699dcfa3452 bfd/hosts/alphavms.h +b456ff19a38c6a50a7b6fcf23fd9e1f0 bfd/hosts/decstation.h +2922cfb45e02c6edf595bb1d620ef78c bfd/hosts/delta68.h +05c0edd67951513bd03cc042835684b6 bfd/hosts/dpx2.h +c1e482f851c42ca2f436d33d928fa4a0 bfd/hosts/hp300bsd.h +76a5586b3812d98ca98bf4c45cce3a55 bfd/hosts/i386bsd.h +81aeb95fc7b74ab9b9f8c5fc80d0decd bfd/hosts/i386linux.h +edaa62376a9b603f40be272ad9a1f8db bfd/hosts/i386mach3.h +512b359313f0c3bf22ddde09f931f9ad bfd/hosts/i386sco.h +402e13c6d261e86aaf96c67e3b3cc875 bfd/hosts/i860mach3.h +670afabed36b3d49e3c7e5fee2cdbb99 bfd/hosts/m68kaux.h +678db628d91ca1b6e6ab88cc57ea0bda bfd/hosts/m68klinux.h +bf8a891bfa8c0536883b8922eeab45cb bfd/hosts/m88kmach3.h +c02b894dd2e75ac9c268ece62fc47eda bfd/hosts/mipsbsd.h +dbaab9a86bc5130ad99189c8ddceea5f bfd/hosts/mipsmach3.h +23b460b9b9ee4bbbc5b43b099d39866e bfd/hosts/news-mips.h +68f97cde664f22f1ebe7ffce83564ec9 bfd/hosts/news.h +495f5ce083fe90efb267ffbbe968e20b bfd/hosts/pc532mach.h +55b9dd83897834c020f30e2fa4b150cf bfd/hosts/riscos.h +9c4e42b51ed4ef3624d6632d97c5680a bfd/hosts/symmetry.h +d210f558099621a92ad1d868d9a94618 bfd/hosts/tahoe.h +e77a36f7eeeee139ec033b09e37ec02f bfd/hosts/vaxbsd.h +10456e8f19a2aec712bdfff904c7c7b3 bfd/hosts/vaxlinux.h +95385f49273928ccd97630efcf35c91f bfd/hosts/vaxult.h +95385f49273928ccd97630efcf35c91f bfd/hosts/vaxult2.h +59a50941a3ba41d5eeaddfa608ed9155 bfd/hosts/x86-64linux.h +eb81ed101d0ee1fbe13af6f4e02f7253 bfd/hp300bsd.c +9a21e2388efe0083ae8b8a00106d205c bfd/hp300hpux.c +da4091ca346b311435b728ac95b2f8bc bfd/hppabsd-core.c +890ee98a8f03c08fb1f4afa968ae7029 bfd/hpux-core.c +f7b33e7dcd153dc5e4a4905f65772e08 bfd/i386aout.c +eb3bd341db7f74b0dca2de96ac2407be bfd/i386bsd.c +4f2221b958ece4a1135c89d376459724 bfd/i386dynix.c +5ea4b70fac02927d272892127e65a114 bfd/i386freebsd.c +466e000ec97f9ea53439fe3c4a8d648b bfd/i386linux.c +55e553007461b9d12c9723738ce6f6a6 bfd/i386lynx.c +184fcf53ece8dbc8c3e5452ea60fdadc bfd/i386mach3.c +c1e79054ff4fb9e6eb269d78759bc544 bfd/i386msdos.c +5b4ae611feaf9f968c4d95cc67c705bd bfd/i386netbsd.c +e56f8de796808ae21194c7f6825d1c6e bfd/i386os9k.c +5172fbc7af7cf6e98fa68a89ea5a5a83 bfd/ieee.c +534dee991a296275abbe2ebd2c4a136c bfd/ihex.c +25509065b1ee664694b3e5c37bb433e0 bfd/init.c +d0ba25f30c1dd2ec685b8dd421d6dac3 bfd/irix-core.c +291df23cff915aea08424e59437c5b24 bfd/libaout.h +b2d73d01dc25de76e92c267cf6d34e12 bfd/libbfd-in.h +27ec1cbe10f1e22f6404da3ce3387f5b bfd/libbfd.c +de70bc4e94a5e5a6d75c754a5646ece3 bfd/libbfd.h +0686ec1e0676bf2876068370968f6ca8 bfd/libcoff-in.h +d5b97208e105b42e3ca7b913df495523 bfd/libcoff.h +08ce055f353f29b7dbbd3367cb14d8c3 bfd/libecoff.h +40fa57a36443af209d40be24fc2507bd bfd/libhppa.h +38a0dcec5fb59384c9ff6d11642746e1 bfd/libieee.h +10927f5450b2e259198eabc163385d8d bfd/libnlm.h +f9d7123c139b25de478c6221908315f5 bfd/liboasys.h +e6d8fbd8d34251787718d47c0f2b8daa bfd/libpei.h +bb3cad08f59e273f335a5cbe04404471 bfd/libxcoff.h +9697e87eaf1aabede0616a88f5e35366 bfd/linker.c +61146204dd5df9b7bf0a942be89f1676 bfd/lynx-core.c +47df372ec9d2c9f570e2377a6cd6b2d9 bfd/m68k4knetbsd.c +bc24228eedac8cd67ef03e2e89c77110 bfd/m68klinux.c +c2b3e6b9a0227a6fc3d9589f9413aa30 bfd/m68knetbsd.c +fc231dd7c10b50f7f56316db72781116 bfd/m88kmach3.c +884aa3acb0cf92f946c86305530c0cde bfd/m88kopenbsd.c +10fb1267e73e26f05b0d1edfd65941c7 bfd/mach-o-i386.c +f32bbf93e8cbbf3d1ce49315a731d643 bfd/mach-o-target.c +15fb1ab9b1ab6344b9f51d9abda19c46 bfd/mach-o-x86-64.c +ce1434b55a5438f7bb44b91ad342c05b bfd/mach-o.c +9fd5d5727de6a64085985f5e34af1703 bfd/mach-o.h +d618facc3e8ce8bf3d02ba452e1be6ab bfd/MAINTAINERS +43ff191e66ad1e3c9f4388821e873ee4 bfd/Makefile.am +93a8c8455113e3b10e7466e6a8be3fbf bfd/Makefile.in +0a2a01a5564c7bdd57d3c467e570733c bfd/makefile.vms +76a44dbc419f39a2d9cdf76d308b370f bfd/mep-relocs.pl +7783752d1f86d8464bbfc536d9129d5d bfd/merge.c +41c58646711a99f6e4b7b1b49fa91c5c bfd/mipsbsd.c +92d188e365097e030b77d3bceb4d4480 bfd/mmo.c +e728260ba314147c9534085b7c691eb3 bfd/netbsd-core.c +8d66f1b8531156a8b251161840b2cd5f bfd/netbsd.h +5ef760be50db7ca763c85e8a57576b63 bfd/newsos3.c +2260d5d5b17087621f4d22d664caca17 bfd/nlm-target.h +ada7e1273c745ce6a3446311be52471d bfd/nlm.c +e3a11b8c38f8beb8cb380d2556b1fe88 bfd/nlm32-alpha.c +6fab17bbbab49e405c5403c74c8666d4 bfd/nlm32-i386.c +15616141c4d4ce3cffcba9fd5a64af16 bfd/nlm32-ppc.c +e65fcc0e9242ddf2063b573b70bdddbd bfd/nlm32-sparc.c +6f6955a0a5e3d39a2c31c1d5d7d0ba48 bfd/nlm32.c +a3d3a8f71632020d3d15fbdc0cfbeccf bfd/nlm64.c +03ea9182aa386b08ea2c6d5cb852395c bfd/nlmcode.h +94288f2695f9ec23df20e5a82861525e bfd/nlmswap.h +7d24843968787ccead71cb5da5c21adf bfd/ns32k.h +fdbfd6f37c3c732d7b622b8fd5fdee3a bfd/ns32knetbsd.c +248874cdb74bb34c98ecea6a77b078b5 bfd/oasys.c +99e0c11af729fd8dc4c17a2688a7dddc bfd/opncls.c +c01a4933892d6b2e269ee599189401b1 bfd/osf-core.c +b2884774d5204a41e2560319db40bfae bfd/pc532-mach.c +8230605678f13811c21ee094ed61ecdd bfd/pdp11.c +c730ca7a2061acbed6f26534381508c5 bfd/pe-arm-wince.c +dc0b454eb5ac0d16f390770f3fb53c4e bfd/pe-arm.c +4dafd0eaf2359f8dd74a9ff32ba069c9 bfd/pe-i386.c +1a13a241161d4f8b7a40597b7bef00b3 bfd/pe-mcore.c +5036d14edcbb371eed50e4078541b752 bfd/pe-mips.c +855f5bdc07113a3d76ea41b5a110dd90 bfd/pe-ppc.c +de5c8e74526c4e815aecf91d0a045549 bfd/pe-sh.c +c272f56c8b5aa83b6d878809491505d4 bfd/pe-x86_64.c +12d97ba29117269a1a8cf0ca362de34f bfd/pef-traceback.h +5bd6943fcf927aeb8b0f4aa1abda4ea3 bfd/pef.c +5d711a64601f429fa483785559b743ea bfd/pef.h +3b93dbc924bcd6ca464d26c42a679909 bfd/pei-arm-wince.c +cf952c320bd31f09566ef5512192907b bfd/pei-arm.c +42ca288076eb97c9b810f7bd0c769e4e bfd/pei-i386.c +a26d0f4cc121b804db0d1296d32436b2 bfd/pei-ia64.c +99c1d8bb1c1ecacf42ea046353eded35 bfd/pei-mcore.c +2ab171f6edf98be45f0593435c1b11e4 bfd/pei-mips.c +315b1fbec795d69ae698d384f1f217bd bfd/pei-ppc.c +338d87b0cd2a666095744141782a2337 bfd/pei-sh.c +6943839a518c640cc96c2afd21dbfbcf bfd/pei-x86_64.c +1816aa7338fd2423e01d0b9db2c911dd bfd/peicode.h +7a9d44d145a7129525cc428a140d7467 bfd/peXXigen.c +11680aa1a0255ffb9a1793de6e6c68ad bfd/plugin.c +2261c135ccf79ec02dc19864386d2cca bfd/plugin.h +90a6c065395a721003b3a801bc4885e6 bfd/po/bfd.pot +d900f09c506ad5057a3fddd39e3fab7c bfd/po/BLD-POTFILES.in +af59cbed52c0a16ed933a2add351b7fd bfd/po/da.gmo +f42836fa54a22c3b715c61e6df8973ef bfd/po/da.po +428f783cf48b71cb3854cf24914975de bfd/po/es.gmo +7d00fa656ac7ba60effa913141f7e3ad bfd/po/es.po +e2ea0b79036b74441b0d1669f634d9f9 bfd/po/fi.gmo +20326bc5faafc2b416d9fe250f801e52 bfd/po/fi.po +90ed30ac694404cbbf6ac7df992ec725 bfd/po/fr.gmo +1ec22b922a3dbd420200cac12ce739ab bfd/po/fr.po +adde21abfb12b19302e8f830a86a3b71 bfd/po/id.gmo +c4d865669e1bb9105341359e764bde17 bfd/po/id.po +94d7a982350d9e5fee01037195be34a5 bfd/po/ja.gmo +56dbdfd0ca270129f18a46aca978da3d bfd/po/ja.po +912c079b0305e916b36d6bbb97438681 bfd/po/Make-in +844c1ea598f9bcc47870ecf122b15e7d bfd/po/ro.gmo +8fc4e95db5a00f800bc30c65a30f8a8a bfd/po/ro.po +7acdb654e9f9fd3cd04aaafd0952bb85 bfd/po/ru.gmo +8a3d9cf14484c113a278af53928bd1ca bfd/po/ru.po +e15c998ffa3537ef5f5c5ed225c18279 bfd/po/rw.gmo +4314f7dc707bdd16e1a3aa6318d52f8a bfd/po/rw.po +d6a6933ceb56b969e27e4c977bf6f029 bfd/po/SRC-POTFILES.in +b04862da8728ddf3c4c8a45b18ee35f7 bfd/po/sv.gmo +dfe82e26118652583a47b8f4771e7e1c bfd/po/sv.po +495dc4f4a2e82ea81d7226370e07294f bfd/po/tr.gmo +95bcedd50b1016d3de8c9f543c6b2bb9 bfd/po/tr.po +03155ac55999ea99fd93db756c85d4fc bfd/po/vi.gmo +1bbe9236287bcc2e6d317562dda6aefb bfd/po/vi.po +e0ac4c0bbc954826529362c28e86810f bfd/po/zh_CN.gmo +1ab81455a3fa63e837709d2924e5f1cf bfd/po/zh_CN.po +6455e3c85b31e588ecb75f7d3c945c8d bfd/PORTING +724476a2771f3210c19912f442659c5d bfd/ppcboot.c +aeadade463fbe3401ef73b3533100208 bfd/ptrace-core.c +2d6a5be3f5d1b33251fe9a8570e943d8 bfd/README +1f28839baed96de43492332856fae22d bfd/reloc.c +a4d110644df46c682e52deab17df66b8 bfd/reloc16.c +35a62e7106f6ca762b4afa22ea02edc5 bfd/riscix.c +390127806fd49f3cbb7ad14ea2456202 bfd/rs6000-core.c +9441258386e8e125722354c26f1f3494 bfd/sco5-core.c +b10b07f30f3f775a36ac15c4c0360308 bfd/section.c +898b0251b29e0d0333b717c5fba85f47 bfd/simple.c +a1a5148e875195c11059c023e9d903ed bfd/som.c +73be612633c59c18a5b744bdb2362978 bfd/som.h +fcc0333513e11eced6f7caf5c41bdfa7 bfd/sparclinux.c +a2a46b3d42519728843beb7307727724 bfd/sparclynx.c +7dba15a9568e388261655fac84be612a bfd/sparcnetbsd.c +39a24f4fb73be4ba6b49f262da35691c bfd/srec.c +650aac6b1948fc417523f6ab33b335a9 bfd/stab-syms.c +168eb4e7f79237249cc976f8a3d4f13d bfd/stabs.c +1ded054093de910d9786c62bc4fe8cc6 bfd/stamp-h.in +33b8a6dbb56569cb0b36a073e2630bce bfd/sunos.c +92ea3880be875c1b8378bcad7489b928 bfd/syms.c +7492d6e9f7bdddef8e51b8897b2b20ab bfd/sysdep.h +31c81ef39b597a4e47385f2def101168 bfd/targets.c +53357a9b87dd158b90cf790c316fd438 bfd/targmatch.sed +ee39822c67ebc0722fe775d2d0d92dec bfd/tekhex.c +1d5d2a98584b8f27cd2cba1b7a8aa9fa bfd/ticoff.h +cd26654c6eb30680694867e434e40044 bfd/TODO +f6744dd2c8ed7505ede5614cb352daf8 bfd/trad-core.c +16d2eaf8a4b6d5a2c90b931c5a1fd41f bfd/vax1knetbsd.c +3fe7114f6b98c45afeea1c2030f69b1b bfd/vaxbsd.c +35614e9f4a26c44ff67a78f1c2ff108c bfd/vaxnetbsd.c +88ef6962a203c349a38631b164f38708 bfd/verilog.c +c4df6dd675bd3a61a3c3ce1a5da4f280 bfd/versados.c +7fa91f8c657505b6e0ff0da5d5d5c447 bfd/version.h +7c23dec4d8799ae0e23659494830fba7 bfd/vms-alpha.c +1c94de3e3c74fb1e7d31784dcecad4fb bfd/vms-lib.c +b87c03c4dbdb7c2469bb565c0695487d bfd/vms-misc.c +546ec97623af181c29dec0b2f0a638db bfd/vms.h +120cb38c718d121d488f8106cbcdd8d9 bfd/warning.m4 +e3378d2a545225d0a7eceef2efdca7b7 bfd/xcofflink.c +38d3ff539ce63c1e7096de81bc25dbfa bfd/xsym.c +11213bf58c2136189edd119d00671f00 bfd/xsym.h +f85e635b7ec810c1df6fe8ec9bdad616 bfd/xtensa-isa.c +fc5a13a797dc463213593a836d4e2edf bfd/xtensa-modules.c +bf8744cdc68cbd134717087cf08e0f50 binutils/.gitignore +faf4c3a35a9cfcfa3bac81cef5e170eb binutils/aclocal.m4 +15c1cb17f1dd5d7666b49a9c4f273c21 binutils/addr2line.c +e8ba72588ab0a1d6e8eb190ea778f302 binutils/ar.c +241e1c3b561bf883d84aa60897595082 binutils/arlex.c +724d311dc10338d10d27e309fd57b488 binutils/arlex.l +dad180bcf3810239f066e4fac8c94e34 binutils/arparse.c +a4cbf0bec6ebfd331903376020268fa3 binutils/arparse.h +5ef790d0f760b92f754c38165f1ce8fb binutils/arparse.y +5cb21f36a0ceb86ba42dcb4920ec8255 binutils/arsup.c +e77e06e678e92fcc6fe2dc9be940b0cc binutils/arsup.h +d276afbfaf6698f8ece1db0ea1f52acb binutils/bin2c.c +12df5117000b96a3253221451ed92f55 binutils/binemul.c +445689c0dcf6a2987caf8dea1b6d9d0c binutils/binemul.h +7ade5fa13cebda2c3f4aee8527031287 binutils/BRANCHES +fae780574c7a02c6a99cf4d3ba70dfbf binutils/bucomm.c +74290145b581c48373615df3f0dddd0d binutils/bucomm.h +48357d45bd874fc265a6a2c1f3e634bc binutils/budbg.h +ef9b7bc647a79db90dab70870b7cffe3 binutils/ChangeLog +75f03b546abf41db936b3eae9ee79760 binutils/ChangeLog-0001 +ac9c338a84bd8da1d3be610a39a75c38 binutils/ChangeLog-0203 +e3940b38e6baee310a1565e098d2d9ba binutils/ChangeLog-2004 +1370cb8435695cc4e035b3b9b3256455 binutils/ChangeLog-2005 +109c2ed912ff71f331e7fc64c3fc7e03 binutils/ChangeLog-2006 +443939e0658790fe3c350e6c9d7faafb binutils/ChangeLog-2007 +8c1aedcc5374a797f183dfb167888ead binutils/ChangeLog-2008 +55e392564810ccb96f6fda031a105658 binutils/ChangeLog-2009 +865b445de9023b5aa261eda9ab1a137b binutils/ChangeLog-2010 +3803ba47ff17cbd2c60e0d28334998f8 binutils/ChangeLog-9197 +aba8ead8b90f015b862015d49357b149 binutils/ChangeLog-9899 +b625039f38b32b2d85754ca1b63e9451 binutils/coffdump.c +227223c6755798edd29c963b11e05d0a binutils/coffgrok.c +82bc4db836b3ef52719e637b8873e19b binutils/coffgrok.h +fa48d78589932d92531b4de0499d4ce4 binutils/config.in +0f589d7c257fe7206dae7e7829dce4bf binutils/configure +b49a609f6fc5e84955f76f8cb8e62b7e binutils/configure.com +e48ff54766c3dffabc9b9b6727f42eae binutils/configure.in +f418f9fb640961a24ca2b0ed1b3c2b1c binutils/configure.tgt +2f542e3cf9200b7f969e0889623ecf67 binutils/cxxfilt.c +7f4bd7f49cd521aeff62f483672aa4e2 binutils/debug.c +862268d63f628bbefd6e1f913e7bf2eb binutils/debug.h +0b925eb0eee0e32249b085b3deeab16d binutils/deflex.c +4de019a5400a7a46b3c9b8731eea6c8e binutils/deflex.l +defc75c765d8658911bbac2e855b7c12 binutils/defparse.c +ed7d783b950fb29fc4398040c2e43c7a binutils/defparse.h +28bfb42bbc63edac3cdce4dfbdc1c183 binutils/defparse.y +cec602aa7e8925e06a658a3060d42c1b binutils/dep-in.sed +914cf3215f82a8cfdea3cf8e24b956bd binutils/dlltool.c +d0b84569cd286ab3ab420824d51ef19e binutils/dlltool.h +f1109e7fca775039b20e4257af171af1 binutils/dllwrap.c +aa845f7397bbba0b488d6f2d1e50dc4b binutils/doc/addr2line.1 +ddf94af086e113cd6500f89126030506 binutils/doc/ar.1 +b2114fcaf98f40028d96a800ea784ae9 binutils/doc/binutils.info +8ebd5cdcdb1aa5b95ec596bf6b9a1ad8 binutils/doc/binutils.texi +5205d0ffe051674a485114a2932229b1 binutils/doc/cxxfilt.man +dcd4d3dc67f260131b7a3b9f4b8a7f6f binutils/doc/dlltool.1 +78aa8089457308a805057987488ae236 binutils/doc/elfedit.1 +072910d553f79906db69fa7c0e956bba binutils/doc/fdl.texi +457443da30398b19ec2156801ec079f2 binutils/doc/Makefile.am +05118f2e20d47c32c5bd88fd433151d4 binutils/doc/Makefile.in +44362ff624b6eb8f1f0e337582347904 binutils/doc/nlmconv.1 +bca4f3c54648cfdf15c20d984231f56d binutils/doc/nm.1 +120c80c30ea1821255ae26412022a751 binutils/doc/objcopy.1 +e6a1b53c8c05120ae0be15808de282c9 binutils/doc/objdump.1 +cd7ec09a0e06048366c3d8cca8f85140 binutils/doc/ranlib.1 +09fe459c423472a2aacdae0710062282 binutils/doc/readelf.1 +5d80da60351c35fa95eeeb4ea3ddd947 binutils/doc/size.1 +b12b71c3df97ffb868182be5b87ec193 binutils/doc/strings.1 +36e1a9c5281c94a00821ce6ea9d997a2 binutils/doc/strip.1 +f3c3440631afe89929b4ce601bccb1f9 binutils/doc/windmc.1 +8c54ae560f528443712f9fcee2bab692 binutils/doc/windres.1 +ce256969905215109ce473eb1b99e26e binutils/dwarf-mode.el +5806a38a763c04a07b2bb7919bbf48b6 binutils/dwarf.c +f442f6b2434bbdcaa750152487ebd959 binutils/dwarf.h +923094961e0763c075c483da68323b46 binutils/elfcomm.c +35353481d838811e1cfb43cb2c18331d binutils/elfcomm.h +a15674e3b98350f3ae7a9631f66a7d41 binutils/elfedit.c +8e9d93e95bf05c65cd38b8eb58f547b3 binutils/embedspu.sh +f4c475327193058e8c173d61eb910ecf binutils/emul_aix.c +ec9819c7cd765fd7fdc4b452fbacff63 binutils/emul_vanilla.c +406c15089c0ef118534921eaf8b2548b binutils/filemode.c +7748d0db0a27f4f55f842af1ffd36205 binutils/ieee.c +e30cdf08d8264e27b35b920b411fc763 binutils/is-ranlib.c +d2ea7edc9e4d3ca9d85e80972546170c binutils/is-strip.c +6594927ec72049c1cbad5546c1dfebba binutils/MAINTAINERS +8a9589dd0dc29f7e3f668a78d02218cd binutils/Makefile.am +aff8145a28655099b6112e37cd99cda4 binutils/Makefile.in +1fc2c9f83e824b21e1b4fbf48804361e binutils/makefile.vms +84ad11164e15c74fa941f49a2ad0278e binutils/maybe-ranlib.c +3e286ed9d2f98e9463da6760db792abb binutils/maybe-strip.c +0ea66d70682ec876032a878491019649 binutils/mclex.c +2898aeb57f849cf68d690b6c825ce7db binutils/mcparse.c +2100013c9980b3b1df35509ee0572493 binutils/mcparse.h +d332f7b72c690e7c24b1b00c92b48b42 binutils/mcparse.y +839610dceda9891495f29d9e4cfca4b1 binutils/NEWS +dd9a2a89a4ddf3b33088d49373c2623f binutils/nlmconv.c +19c1330925184f21af691f14d7b8cf4e binutils/nlmconv.h +6ea3fef39583ce44f08b843d60946b55 binutils/nlmheader.c +636cedd9104d690e26d20fbd2ec2b9a7 binutils/nlmheader.h +fb2f05720b46fc09b021f05c8e250bc6 binutils/nlmheader.y +aa65002eda108d4495d4eec36bf84c55 binutils/nm.c +41d8556bd279371fb24dd10f370d684b binutils/not-ranlib.c +f80bdc8c61ea529f54c93e682505ad79 binutils/not-strip.c +c1b82941b89f65ad1232a3fce72c5f38 binutils/objcopy.c +50e9d446a53fa4a93419d69590d986b6 binutils/objdump.c +f98b9af24f695e5a158294756ba1cca6 binutils/objdump.h +a8874836f0138c5557dcb5d706bc863a binutils/od-xcoff.c +024d27e0e050ecbb5028623014af16aa binutils/po/bg.gmo +0e25fd81191af44f98f4df531e559a77 binutils/po/bg.po +2d34b17ca7dee26e552080df73198757 binutils/po/binutils.pot +464b47c4d20bc96d8db3946e7c473a20 binutils/po/da.gmo +cff5d7523393ad62b7247c324aeee56b binutils/po/da.po +9638463ad9f240dc22a4b620e565109b binutils/po/es.gmo +d97675c3c23f18b1c12510b09ddcb41c binutils/po/es.po +36148a48493f59cc4a227ae1e3a9d20a binutils/po/fi.gmo +fe7b5752abcdd6ccba618203d7397c1b binutils/po/fi.po +66a7c50a91ce3a30ce6124b85d6a45ef binutils/po/fr.gmo +8d3a0e6f6857ed860a756c5ba7f44641 binutils/po/fr.po +6495de85ae4a9bc16de19a933544ee01 binutils/po/id.gmo +d0fd2da98fa1316894630f06818e15f4 binutils/po/id.po +aa394ecec1b8465cfe5f170279231efb binutils/po/ja.gmo +fe122f75d2b57cf7e7edfc1ac6673b0d binutils/po/ja.po +8935ae2870f3d67420c16c4b92796ceb binutils/po/Make-in +41946e0202f2493b6cb294800c88402a binutils/po/POTFILES.in +7d9d0cc039b5e637e9203e0c1fe8a282 binutils/po/ro.gmo +048a28aff20f21840e59478819f311cf binutils/po/ro.po +f0258240e9b64cf9611e1cd020985e0a binutils/po/ru.gmo +0221ef7e48463012a63562d754500ff9 binutils/po/ru.po +574d299b75e61be9de2b50beda9a138a binutils/po/rw.gmo +983ad2a28db3de55195aeb8680aff682 binutils/po/rw.po +1f61241fcdfa161fa76d4d8728e0ad37 binutils/po/sk.gmo +47d34295c07b7e482891a5a03cc3c8d0 binutils/po/sk.po +117dd5c4de6ebc8e658d21aacda82073 binutils/po/sv.gmo +d643cb6ce7c53550d77a7aae2000eed6 binutils/po/sv.po +895352681d4358a82bacec4e25a00e70 binutils/po/tr.gmo +9d11cf1296c72bb6a1189555440ffdef binutils/po/tr.po +4bd2869e9a1ff1ccb2a810f590dfc9cf binutils/po/uk.gmo +1c8599fb39ca7b86d7c798e31c167500 binutils/po/uk.po +810261257e415b8d194dfb95a28b5cf3 binutils/po/vi.gmo +a2065424532df74ed16bcd37c3c8c47b binutils/po/vi.po +e4e8cba721856bcf7d5ccf5016a7fdd4 binutils/po/zh_CN.gmo +42b95da2812ee22e0a980fd9c96d7a1b binutils/po/zh_CN.po +d66dc645567221704d9a96af2951ec0f binutils/po/zh_TW.gmo +fc31799334330cf7596de77081fcc3dd binutils/po/zh_TW.po +5ec1ff01c723ab4ec15f31f697ae2825 binutils/prdbg.c +253d92247a3802211f202f4fc8d764c9 binutils/ranlib.sh +5760344d3da073a201b876a2f016ce99 binutils/rclex.c +65d300feff90dab55877958558676497 binutils/rcparse.c +5e6a9d25a52382a7c27d837fecec6526 binutils/rcparse.h +81e87fc12351c3dbca3b8e6bd23c2bf7 binutils/rcparse.y +6c832b4a8e51d600e29fee3a6e42d510 binutils/rdcoff.c +697199e5c7baa5f2f1fba82ba6ce05de binutils/rddbg.c +8cbb05e84e1fca9e580d66e4205d6ec6 binutils/readelf.c +513698e6b21989373e4e3af16bf9af83 binutils/README +16e8266bccbca8900d8916b69971bb6d binutils/rename.c +1f7c060a46b5db465b0694b271af7736 binutils/resbin.c +8e1e7a197ebc7415c66d12d1d80810c1 binutils/rescoff.c +e7c9d8262c1267f29d0968dc2279ff87 binutils/resrc.c +5b6a095db450c2034b50652048f91c87 binutils/resres.c +6c63c0bffa2f22c651ea174b38d604f4 binutils/sanity.sh +31cb252b9399425c57e9c67473d97856 binutils/size.c +2dd7641476b40f8f5552fd10fdb258bd binutils/srconv.c +5efe36ec18c27590379bb830b0e44c07 binutils/stabs.c +1ded054093de910d9786c62bc4fe8cc6 binutils/stamp-h.in +77077460566c339fcbafa5f836e96ff2 binutils/strings.c +3c5ed03b7572b48a870ae3b0d0f2b12f binutils/sysdep.h +4b7e4aee9c1a49ac597bf34a2ddc8087 binutils/sysdump.c +ed86a52ee28b3e3c0866694570cf24e5 binutils/sysinfo.c +c3e16b5b96457e7b67e2ff09c8434b4f binutils/sysinfo.h +ac5be3005f420e5dbdc1f5079875bd74 binutils/sysinfo.y +d43e83232485fd75314425affef20a84 binutils/syslex.c +4204d6eaa85359f8c46f0ce6757f9c17 binutils/syslex.l +b3669a390c553395b6151cf5173663dd binutils/sysroff.info +c47e58a5ce3d88d074da7988605dd271 binutils/testsuite/binutils-all/add-empty-section.d +c118cd8ac033fa6204640291e2d71922 binutils/testsuite/binutils-all/add-section.d +24eb345e58fdf80d67e58d68e5bf387a binutils/testsuite/binutils-all/alias-2.def +aa7cb333b47f17c932b8e0a902de43ba binutils/testsuite/binutils-all/alias.def +128008662cfc653c01537ca8ee55b28e binutils/testsuite/binutils-all/ar.exp +f9e394b6e365932e277c92e01c38b76f binutils/testsuite/binutils-all/arm/objdump.exp +e4d6bc1d9f91e3dd9fc1bdc748097b83 binutils/testsuite/binutils-all/arm/simple.s +ce88dbe8fe34d243dc53bd29ad39ad51 binutils/testsuite/binutils-all/arm/thumb2-cond.s +89e2a629cf9f9bc36672ec97018fe79f binutils/testsuite/binutils-all/bfin/objdump.exp +0deee19f6dd6cb7ada1e41b03202e52c binutils/testsuite/binutils-all/bfin/unknown-mode.s +34d0ab842ffa4318e8cbe2bba4c565dd binutils/testsuite/binutils-all/bintest.s +ad057c5aff09eeebe89f53de09a8d6df binutils/testsuite/binutils-all/compress.exp +46f213c0bf7293623c7c95c1ae72c5cc binutils/testsuite/binutils-all/copy-1.d +7818c4638e7c83453b51ea5f50b17d62 binutils/testsuite/binutils-all/copy-1.s +ab57c3ecd68aee03109e529a8e566753 binutils/testsuite/binutils-all/copy-2.d +9d773d797841500d51b9bf635b3001fe binutils/testsuite/binutils-all/copy-3.d +c91b865a87aa795cfb14d707ceee8bb2 binutils/testsuite/binutils-all/copy-4.d +8a6214b0181ec4a73a402e359daf9034 binutils/testsuite/binutils-all/copytest.s +02d9d7f279a0984cc41028945f230280 binutils/testsuite/binutils-all/dlltool.exp +f35a6c09a5cad7ba0fb6d10559676f4c binutils/testsuite/binutils-all/dumptest.s +54bcfeb604870285ff25317f9b5482ff binutils/testsuite/binutils-all/dw2-1.S +aad696ad9190dbf893ba252118bf626c binutils/testsuite/binutils-all/dw2-2.S +290565f99df84c536a06b51c589b5e62 binutils/testsuite/binutils-all/dw2-compressed.S +c0cf290037aa0f09cb8bf5f4a0308a27 binutils/testsuite/binutils-all/elfedit-1.d +52af9f53ef810af0017ae91cb1036242 binutils/testsuite/binutils-all/elfedit-2.d +39f724358668c7476c30e7be614e72ec binutils/testsuite/binutils-all/elfedit-3.d +0ce2463e6b1a2625a5fe0c2410fc7b15 binutils/testsuite/binutils-all/elfedit-4.d +5b1c979b02a008417d2f9e325196b3e2 binutils/testsuite/binutils-all/elfedit.exp +d41d8cd98f00b204e9800998ecf8427e binutils/testsuite/binutils-all/empty-file +bb4a5bfbe0b4ad2e68e63a1765e34a2a binutils/testsuite/binutils-all/empty.s +4a5e353c23801ad5d7f1705efc5f42ed binutils/testsuite/binutils-all/exclude-1.s +753b3babcd4dddd3c9189fbe0d11d9a9 binutils/testsuite/binutils-all/exclude-1a.d +258cffb7b9a54b43feb734b692952814 binutils/testsuite/binutils-all/exclude-1b.d +1f3298e434f53fee397ccdccf71a744f binutils/testsuite/binutils-all/fastcall.def +338de0188b3bb5dce910ae34b36ba815 binutils/testsuite/binutils-all/group-2.s +0a69dc172a9856a7472d8bda038cd021 binutils/testsuite/binutils-all/group-3.s +b51c995baa976b1e05f7129907249be8 binutils/testsuite/binutils-all/group-4.s +f1f5e3551c55b9e668394a2bb6c5d369 binutils/testsuite/binutils-all/group-5.d +0fa93145faaca19a6611f2aa99a43fde binutils/testsuite/binutils-all/group-5.s +1d96cb4b074018ab36084fd8fd15ba60 binutils/testsuite/binutils-all/group-6.d +e36dde2922c493422341c9d5ee07b6ef binutils/testsuite/binutils-all/group-6.s +0f7d8b612442e7c8092eda3c7e00daea binutils/testsuite/binutils-all/group.s +8e5c9079f46f332db8bbe679b64c878b binutils/testsuite/binutils-all/hppa/addendbug.s +d91ecc8b2ba6965842cf206d8144c3e1 binutils/testsuite/binutils-all/hppa/freg.s +00d3925a24762a0bb33529653d200573 binutils/testsuite/binutils-all/hppa/objdump.exp +2f6e5da6e4d97181a14d1883d6ec8498 binutils/testsuite/binutils-all/i386/compressed-1.s +2722595c2ce6393e3f1db29e1158d3da binutils/testsuite/binutils-all/i386/compressed-1a.d +0ff8b5036fd017eeed4f4acda7e383a0 binutils/testsuite/binutils-all/i386/compressed-1b.d +cbd80207d9daa3db659084562e44d315 binutils/testsuite/binutils-all/i386/compressed-1c.d +a185ea42f87cb0065db5680fe2d445a4 binutils/testsuite/binutils-all/i386/i386.exp +b51e5445a91784acba357197cc254d5b binutils/testsuite/binutils-all/libdw2-compressed.out +a65ca36dd01e93f5ed7e0892d47ef1b4 binutils/testsuite/binutils-all/libdw2.out +4a62975b0bc7a2cacc7267c73027a6b5 binutils/testsuite/binutils-all/link-order.s +ab7bdd5c94807ca793bdd422bb7fa8cd binutils/testsuite/binutils-all/localize-hidden-1.d +870fb293e265cbdfc0b20e308cf00e1a binutils/testsuite/binutils-all/localize-hidden-1.s +3068cdd8622c3158a8d64899452655d7 binutils/testsuite/binutils-all/localize-hidden-2.d +6074603691f0b0814906a0679bd883ed binutils/testsuite/binutils-all/localize-hidden-2.s +6960b342624a796e7a6d83c844087f69 binutils/testsuite/binutils-all/m68k/fnop.s +170803871c34be39b32958baccaba4b4 binutils/testsuite/binutils-all/m68k/movem.s +450b6634be2652817af885d09a0c604e binutils/testsuite/binutils-all/m68k/objdump.exp +17e871b2195207446783ca653463607c binutils/testsuite/binutils-all/needed-by-reloc.s +0b036a1cb1ce19b648badc11f998ddf9 binutils/testsuite/binutils-all/nm.exp +871cfc4074a74627f70db8b5d65ce372 binutils/testsuite/binutils-all/note-1.d +047578440668904d8026b1add421113a binutils/testsuite/binutils-all/objcopy.exp +2732bcf2c2cdf972a2d87ac79bc1d8fe binutils/testsuite/binutils-all/objdump.exp +fd4b0cd07b3cf6a6c47fe8becb569314 binutils/testsuite/binutils-all/objdump.s +8c956691f6dbfc34fe1a6def794d6adc binutils/testsuite/binutils-all/objdump.W +dd7f18f869cb5e18bd47871da2b3b3b2 binutils/testsuite/binutils-all/readelf.exp +5e74045f7ec0119e86dc43c1fb75531b binutils/testsuite/binutils-all/readelf.h +21cb9025a426c8a27de071549d4ef28d binutils/testsuite/binutils-all/readelf.r +db24a07247dc8cd58f7d1987a549d485 binutils/testsuite/binutils-all/readelf.r-64 +e1697a4ccd84aea00d3b0f2cbce46bc8 binutils/testsuite/binutils-all/readelf.s +fb9c19e8a7ecec9f832d28e09d960cd8 binutils/testsuite/binutils-all/readelf.s-64 +d7499e152cf7fd6784399d6286b6f182 binutils/testsuite/binutils-all/readelf.ss +f837b7f5b7d54a009b6fa58736db5a36 binutils/testsuite/binutils-all/readelf.ss-64 +c0ed249ea41764285d5acfe37df52497 binutils/testsuite/binutils-all/readelf.ss-mips +1c57d7063c628e546f52d021ae710cee binutils/testsuite/binutils-all/readelf.ss-tmips +209039e1a259e87c10a258b37ab50634 binutils/testsuite/binutils-all/readelf.wa +6e35412e030ef5b40cf67252c19f8715 binutils/testsuite/binutils-all/size.exp +24f2423955980928aff6f7d49222501b binutils/testsuite/binutils-all/strip-1.d +ca7cb6a593cfba58d42c1845a61e0664 binutils/testsuite/binutils-all/strip-10.d +32197d82e15c9a7194a618fd4cf233f5 binutils/testsuite/binutils-all/strip-2.d +6ad1b94d328d1c0ff411466ed89ef4f6 binutils/testsuite/binutils-all/strip-3.d +841a6ca30c94c31c68f61b3ad2036a14 binutils/testsuite/binutils-all/strip-4.d +3ebf3bf3e2f439e58f1301d695e2783c binutils/testsuite/binutils-all/strip-5.d +60c1643408fe80e6b352270eeb5cb520 binutils/testsuite/binutils-all/strip-6.d +6d22a52a8da8cc1b325db54f34193106 binutils/testsuite/binutils-all/strip-7.d +0775b758e20e9bb93f74b8aad9a17f18 binutils/testsuite/binutils-all/strip-8.d +6ca1b0b0c7a48b40c06fe9aea045d97c binutils/testsuite/binutils-all/strip-9.d +ceb92b0ac37d5d22d79f180de017e262 binutils/testsuite/binutils-all/testprog.c +a22fc47e8c73936b6e9735589e065150 binutils/testsuite/binutils-all/testranges-ia64.d +f78ff1d70f85baa83d18c33c99cab311 binutils/testsuite/binutils-all/testranges-ia64.s +ae1382214b1ff8199f9b639ecd6fce40 binutils/testsuite/binutils-all/testranges.d +bcb9ea582b6f21eb03cbe138b7a89f4c binutils/testsuite/binutils-all/testranges.s +f61e08dca2771d5b82bafbb000bf6542 binutils/testsuite/binutils-all/unique.s +96a0eba027bdbce19f3d3e1481212e25 binutils/testsuite/binutils-all/unknown.s +d9e2cf9793263ff37e8d6c960b280e3b binutils/testsuite/binutils-all/vax/entrymask.s +435d0d9407c0453a559b69d029be8540 binutils/testsuite/binutils-all/vax/objdump.exp +7491a51f44f5a1850c80fbd6b4f2793f binutils/testsuite/binutils-all/windres/bmp1.bmp +d5611fb4c5b61e2fe34951ff33fb8418 binutils/testsuite/binutils-all/windres/bmpalign.rc +e2852a0b6c605f12dedca9103d1c3330 binutils/testsuite/binutils-all/windres/bmpalign.rsd +c9c4373f416e2d2321e55e88e7de75d8 binutils/testsuite/binutils-all/windres/capstyle.rc +2cbe0a310f92d1c5c565041be2f5afab binutils/testsuite/binutils-all/windres/capstyle.rsd +797b931bd8778c2130cda9fc846bccca binutils/testsuite/binutils-all/windres/checkbox.rc +b57be16dc0288e8c81246d1e002b580f binutils/testsuite/binutils-all/windres/checkbox.rsd +16dd4d1dd29fc42f543163e45bbe9da3 binutils/testsuite/binutils-all/windres/combobox.rc +db15330881f47c75db87a417b603999d binutils/testsuite/binutils-all/windres/combobox.rsd +ac38823599885e755f2487efa5e214f3 binutils/testsuite/binutils-all/windres/deflang.rc +ec150037bb58aed9e172b35e56641493 binutils/testsuite/binutils-all/windres/deflang.rsd +5e29fa118e3e03e87d839cd18fa13f66 binutils/testsuite/binutils-all/windres/dialog0.rc +ec150037bb58aed9e172b35e56641493 binutils/testsuite/binutils-all/windres/dialog0.rsd +ac7fafe088ed3f14887a21e8f6c3022e binutils/testsuite/binutils-all/windres/dialog1.rc +ec150037bb58aed9e172b35e56641493 binutils/testsuite/binutils-all/windres/dialog1.rsd +62158f4725046ca58344402cbba883b2 binutils/testsuite/binutils-all/windres/dialogid.rc +30bb522613334d2795e81237a5a01776 binutils/testsuite/binutils-all/windres/dialogid.rsd +c3efb314b67227f2ae24c087c3b22716 binutils/testsuite/binutils-all/windres/dialogsignature.rc +99d0d7339a83b8e7bc1442ad005028e3 binutils/testsuite/binutils-all/windres/dialogsignature.rsd +bdfda752dd00993588658c343d5db784 binutils/testsuite/binutils-all/windres/dlgfont.rc +44ded16fd8aa5d243d77021e0c63ee5c binutils/testsuite/binutils-all/windres/dlgfont.rsd +cf3cf5daf8d67b4232d6609469405d0a binutils/testsuite/binutils-all/windres/edittext.rc +25b9856dd7d85107e7aef77431530639 binutils/testsuite/binutils-all/windres/edittext.rsd +bd13c4e0cc1c8cf49e20f0f62a5d2ce0 binutils/testsuite/binutils-all/windres/escapea.rc +75762cb5686cfca0a273cd77d6034a3f binutils/testsuite/binutils-all/windres/escapea.rsd +5bb46a57c7767b1f24fe00c394f5288a binutils/testsuite/binutils-all/windres/escapex-2.rc +6bec6d3471e372d9a3f93a14a63639e7 binutils/testsuite/binutils-all/windres/escapex-2.rsd +d89135fb6f7b032a74a47b697e3cea11 binutils/testsuite/binutils-all/windres/escapex.rc +1abf5fdcd19714aa098f988aba7ff124 binutils/testsuite/binutils-all/windres/escapex.rsd +c0d302994d587d584483b7126427a11b binutils/testsuite/binutils-all/windres/html.rc +a9a27961f5d70ba85af63066155008c9 binutils/testsuite/binutils-all/windres/html.rsd +8926670e07442451d680f84a644a40a8 binutils/testsuite/binutils-all/windres/html1.hm +d8e96ae320ba7f82b4526ebcb77669b4 binutils/testsuite/binutils-all/windres/html2.hm +c6415e3e22d2e645050ff0e0b86f7c12 binutils/testsuite/binutils-all/windres/lang.rc +9b5e9e1fed319016623963a63e173904 binutils/testsuite/binutils-all/windres/lang.rsd +65492fa41b4505b7109fe11885084560 binutils/testsuite/binutils-all/windres/listbox.rc +ffc53241335562ef778e175ba35ddb4e binutils/testsuite/binutils-all/windres/listbox.rsd +7ffb700c5df7b8440174158dd7daab95 binutils/testsuite/binutils-all/windres/messagetable.rc +0554a16331bef10ba6dd0b3784b20ba9 binutils/testsuite/binutils-all/windres/messagetable.rsd +385792077de0ae3063a7ae1e5d0bb0c8 binutils/testsuite/binutils-all/windres/MSG00001.bin +9f44ebe6636dbc19b95832ee1163301b binutils/testsuite/binutils-all/windres/msupdate +ac38823599885e755f2487efa5e214f3 binutils/testsuite/binutils-all/windres/nocaption.rc +ec150037bb58aed9e172b35e56641493 binutils/testsuite/binutils-all/windres/nocaption.rsd +c895fab04cbfecb4fdb0479474afa20b binutils/testsuite/binutils-all/windres/printstyle.rc +c9677c01c151e304240fc99f06ef71c2 binutils/testsuite/binutils-all/windres/printstyle.rsd +b538b353dad0e50d7daec45b6014a7dc binutils/testsuite/binutils-all/windres/quoteclass.rc +94a00b0c688c1e2617be2234cb8fa3c0 binutils/testsuite/binutils-all/windres/README +c39f7a75add2211c8b8b16eaebb95c64 binutils/testsuite/binutils-all/windres/scrollbar.rc +fce7c71178868b81c2cf1b52493ad277 binutils/testsuite/binutils-all/windres/scrollbar.rsd +1f7bc9a6f7a05e70001fc557f9cdf976 binutils/testsuite/binutils-all/windres/strtab1.rc +453c4b4299fb6238d70482f45bd5acae binutils/testsuite/binutils-all/windres/strtab1.rsd +97b8c3c6dc29f4c499d2d75577e7ab5d binutils/testsuite/binutils-all/windres/strtab2.rc +453c4b4299fb6238d70482f45bd5acae binutils/testsuite/binutils-all/windres/strtab2.rsd +c770ff0d872ab99b2c10a936ae3186ff binutils/testsuite/binutils-all/windres/strtab3.rc +453c4b4299fb6238d70482f45bd5acae binutils/testsuite/binutils-all/windres/strtab3.rsd +a9d96ba138857d78e87ecb5facd8e77c binutils/testsuite/binutils-all/windres/sublang.rc +ec150037bb58aed9e172b35e56641493 binutils/testsuite/binutils-all/windres/sublang.rsd +86ec9f86471d9533bbeb127f3024b643 binutils/testsuite/binutils-all/windres/version.rc +aa55d0e295b56cb92284198366cb41f4 binutils/testsuite/binutils-all/windres/version.rsd +25eac986945d394de659acceeae822de binutils/testsuite/binutils-all/windres/version_cat.rc +aa55d0e295b56cb92284198366cb41f4 binutils/testsuite/binutils-all/windres/version_cat.rsd +b9f69a393bed3ce5d9d432f69092a0d3 binutils/testsuite/binutils-all/windres/windres.exp +6dccc67a6dc85c4ec2c963aca6eceaf4 binutils/testsuite/binutils-all/x86-64/compressed-1.s +7751d87bde7d74de21b64371ce6816ca binutils/testsuite/binutils-all/x86-64/compressed-1a.d +980981b01ab942f4a01283d9d850eba5 binutils/testsuite/binutils-all/x86-64/compressed-1b.d +e67867a048dbd6ce8aad92503d2b24c8 binutils/testsuite/binutils-all/x86-64/compressed-1c.d +a2273c64ceaff0e57e46ac75c8fd43f2 binutils/testsuite/binutils-all/x86-64/x86-64.exp +d1c5665197135db5081abcee29995104 binutils/testsuite/ChangeLog +5f4416ae47c627699d2fedb9f71be354 binutils/testsuite/ChangeLog-9303 +7d7b53cad398cb2db54997ab03e4f1b7 binutils/testsuite/config/default.exp +b0bf849c1b988ae9d743f55d6a748197 binutils/testsuite/config/hppa.sed +214db435855f570f9be4ff3be4196d4a binutils/testsuite/lib/binutils-common.exp +63c246e6b7b77b6f3262cd4ac06d5ae9 binutils/testsuite/lib/utils-lib.exp +af8efe2b1bb2c8456b2fb46d5470484c binutils/unwind-ia64.c +6ae90973bb7dbfbe11c6acc29eee0070 binutils/unwind-ia64.h +6a38ca7e4bdf036b38254910bd521549 binutils/version.c +7d646742cf214013c7c027c2d58b7ba6 binutils/windint.h +669843b388bfd74c6840293c52ab8cb1 binutils/windmc.c +4a301e97590dbfcc2f7e9c2850ba1bff binutils/windmc.h +d05f30b8dd7e13c407e2be56257a451d binutils/windres.c +906f283c22c019d009b11770338477aa binutils/windres.h +e32ea7016e96f326364990709363105b binutils/winduni.c +50cc01707c3b40563abe5f438a50021b binutils/winduni.h +4be2e642df6bef8d5f051c41f0552ffa binutils/wrstabs.c +0d3c238b02b9d0c1c32347dea7fc490d compile +0fcd4badfe2a2191778bdf5ab94aa40c config/acinclude.m4 +731a4c2ef07c06a2a175804e75fadc03 config/acx.m4 +3be755875df9da02eb4b0a9badd414f1 config/bootstrap-debug-big.mk +1999cda4a81e667104bc146b3968eb4d config/bootstrap-debug-ckovw.mk +57284952a449963da5b91c52608abc15 config/bootstrap-debug-lean.mk +babb6167c05386834412652e8b27239e config/bootstrap-debug-lib.mk +9a194b56c06b616528d1e76306aa78e6 config/bootstrap-debug.mk +3a8fde4ddca4059836ca7c3e22e8ffe3 config/bootstrap-lto.mk +5c6a030699353abe2ff69294a495e4cd config/bootstrap-O1.mk +4d3304310a9b7b17872d6f644e1dd7c8 config/bootstrap-O3.mk +f466ea6022e6627a2e3d94bb0cc7eeb9 config/bootstrap-time.mk +5fe078f982a106a97bb7da163f32de55 config/ChangeLog +4d893e26c58ac075bdc51f3b7fd88cb9 config/cloog.m4 +04bdbef77f5fd2e282f7dee0bde60444 config/codeset.m4 +b5a5c394536a15e50be1998bd341fd02 config/depstand.m4 +c0d1018319b14378fd98c86ba62b3be3 config/dfp.m4 +22671f4914769139799e1f72e36be555 config/elf.m4 +042203b305962ba9a8f8474ef80edeee config/enable.m4 +15b8d5adf53ad5ec75f055b193a6b1c2 config/extensions.m4 +8e54553a2c063659a749e0ef9e5348e4 config/futex.m4 +d3eafe382a46e6747e3644cf4a55d5cc config/gc++filt.m4 +1282ef4331970c26224afd363968e276 config/gettext-sister.m4 +2056dbab474e474ab2ae01a42ad5359a config/gettext.m4 +29c9c3d57667bc9e6f14d625b2cd5894 config/glibc21.m4 +c385066b0fe61ef55d44cf2619e79b26 config/gxx-include-dir.m4 +998940a8ee25ca89805ed7da63536782 config/iconv.m4 +7cdde9f19fc614304e49342c660e2d47 config/intdiv0.m4 +e32906a3177f3b368bcd56f9e86a620c config/inttypes-pri.m4 +b17ad59a69316040fae6c3b09187bcbc config/inttypes.m4 +0b63117973333c343e0d0819012b8187 config/inttypes_h.m4 +71bf002195846e85b3a96057f72ad530 config/largefile.m4 +db111161c56fa9d53a03abfb188ad1d0 config/lcmessage.m4 +cbcbd9977ef1239ccac0c5c54d214302 config/ld-symbolic.m4 +1cbbc8830601bf43a3c42ee10a01eecd config/lead-dot.m4 +77931c860806547ce9fc56097a731c6f config/lib-ld.m4 +50120e7fff340d87578219756e55a5e3 config/lib-link.m4 +4455537cdae70977a1283180062a2d8d config/lib-prefix.m4 +534dce34ae221e73e2d67d3ba07f00a3 config/lthostflags.m4 +3fe4a576c2a75736c8da3af1d0824217 config/mh-cygwin +a2628132e60b0492f8c93ce6ad8c9fea config/mh-darwin +625bacc09b9992290d94831bd7506bd0 config/mh-djgpp +9240a2b84d379e3feff49d8311072dc7 config/mh-interix +683433c6c1f829d4f0aa007dfa29c880 config/mh-mingw +cd7034dccd04e50150b14c597dd545a5 config/mh-pa +48d5107b991a0cdbe7eb7022b0dfecb2 config/mh-pa-hpux10 +59846d5e40c35f67530d476403b5838b config/mh-ppc-aix +3755b5b077053b5de54ff0f781ca9295 config/mt-alphaieee +96289d06809692c31d71e69c4bedb6d7 config/mt-d30v +945f54294ca11fd14c1aaaecde3ce7da config/mt-gnu +1d7419534d43fda437ce0a4f0719ee5f config/mt-mips-elfoabi +8d6647b6e881a11ae46d9bcaeaa0bd0f config/mt-mips-gnu +e5f16579c830ccc42e238b49e8409e99 config/mt-mips16-compat +5aa8f75c6588d513ce199e2e44c206e2 config/mt-ospace +23e56715f4bf1219d8fe216560c4f3ee config/mt-sde +9af153786999225732c95595da5ebd52 config/mt-spu +b2adad0a4a862632ab430160dc6a218c config/multi.m4 +120ec56e3aa27739a2945bc1c8a2530a config/nls.m4 +fa22f7e8f43ef5b6e9ab94ec570c2327 config/no-executables.m4 +a251aa127ad38c507c6c5d6462060dfd config/override.m4 +7632e8393bbd7e57d2e0a58e78521d3f config/picflag.m4 +734b3558fccbdc3e95eca1f1374b4016 config/plugins.m4 +1e69014355ea3f8f6aa2c91b13a7bb92 config/po.m4 +b2d511a8a77414eda79bdee0daccfea8 config/proginstall.m4 +d3cecf02bb97035177818aefbb0e0833 config/progtest.m4 +cf44bcebf16110e74cc72300706818c9 config/stdint.m4 +761497fd3445beb86a90919955d5aa20 config/stdint_h.m4 +2b708186a72f4b6d7afca4de41ae5448 config/tcl.m4 +36af806073153196c545a5a43f31bbeb config/tls.m4 +5e1e75893989d0ae3c0452451cf80280 config/uintmax_t.m4 +6b1c349fb182e74fbc464c50c88fe2ee config/ulonglong.m4 +49305b421244035f19bdccb38a800d5f config/unwind_ipinfo.m4 +3510459bb8dffa5ea06682a29bcdbfa9 config/warnings.m4 +e249d18c447a8372fd1ed5f084284d6b config/zlib.m4 +4adca919c67d00b948bf581991b79bbf config-ml.in +8385976ed3a37f278f07c10341d53876 config.guess +040359150cf11493f973a46d8a25b06b config.rpath +8bfe314d850cea1b947bffc5b434bf73 config.sub +3ec784e7d9ba16af7ac3eb99efbc1ee9 configure +0ab4bdcac62c57137e2ce70f989787f6 configure.ac +385a8c6e3d59641505e9153668eca8d1 cpu/ChangeLog +57bb884c7f43b4868dc92a9cdbb51a42 cpu/cris.cpu +5482fe4be796476228dcef116a5085ea cpu/fr30.cpu +b4ecfabcfae65cc11bf52fd29db940bc cpu/fr30.opc +2f25728eb6321969c8b21f7ce4bb9fd2 cpu/frv.cpu +4c260ef104ad0998c6a0f6677fdfc685 cpu/frv.opc +3e071f0b9c6ed8919fc0cfbd4e2c255a cpu/ip2k.cpu +2ec6a978ace41c4f6444cd841689b839 cpu/ip2k.opc +36a3725cfe5376cf5bbe2ba4ba3af92b cpu/iq10.cpu +c9ca560e22cd9a4f6386fa7d81ba9dd1 cpu/iq2000.cpu +032c5fe3ad082f7151efc1c5fed33c1b cpu/iq2000.opc +af81aea42ecf5b05a6177025e94af7d8 cpu/iq2000m.cpu +4d4be1c663de1008e839d7c600b925b1 cpu/lm32.cpu +38fbf7cb411f825e5cee1bd6f7e64680 cpu/lm32.opc +1283a75df6b64b35120fccc4c352a420 cpu/m32c.cpu +4695535b420da5ea8f9c3240e742539f cpu/m32c.opc +9079eaecdbe5e3a0ef3e27e756845a23 cpu/m32r.cpu +1a19d96dd536cdcdef47e68d897fe639 cpu/m32r.opc +e9533d2b525577101c8331e26c0625ed cpu/mep-avc.cpu +65ee6179eb425bb10ca3078a08b2a976 cpu/mep-avc2.cpu +e28d4c4ced67f70f91462403eb823e08 cpu/mep-c5.cpu +ff87656b73d5b97cf0df1ddae9e105e2 cpu/mep-core.cpu +9c2945e3977156e41da47617175ac64f cpu/mep-default.cpu +023d83d84f72b748513f5cb78c179bd5 cpu/mep-ext-cop.cpu +36dd0633e45fe6482aff65f67346b345 cpu/mep-fmax.cpu +46bc705e6b0411486ee6e5e29538173e cpu/mep-h1.cpu +5c7ab28f06eca9cd5b0fea1c4a80659e cpu/mep-ivc2.cpu +a19fd9e8443a64db1dc14972cac446ab cpu/mep-rhcop.cpu +26e93da00b3bede6107823e06631c0bc cpu/mep-sample-ucidsp.cpu +d534cf9b6b4a7e68f003dcf5d9174cb8 cpu/mep.cpu +be028971bb0055834c3612ca886b9a0f cpu/mep.opc +d131138bbb159cd94a48bbb552beeb1e cpu/mt.cpu +5f68403905e01ac34a57ec0bd0654dc4 cpu/mt.opc +ee0a9dc3f65e1227da3e29a6f2e0b103 cpu/openrisc.cpu +93a4d6e2606566a4effad67f9d4d4aea cpu/openrisc.opc +2ec1c54e8542038a6e1623a6540c6d71 cpu/sh.cpu +e9b8e80ddc3003dd30c422877d4bb767 cpu/sh.opc +16f51fbd17b7bbe501733bc197b50717 cpu/sh64-compact.cpu +3935b10637681bb2478258da8908eccf cpu/sh64-media.cpu +d186b867bf5b1d1468f0db54b209a404 cpu/simplify.inc +948e8928f44c21e4e46631023475d4c8 cpu/xc16x.cpu +489902d19fb758761a771d924f53612a cpu/xc16x.opc +3fe5de5552242be376bc227337bf95fc cpu/xstormy16.cpu +8e3b808b3f665daa3a35b5333062ea9e cpu/xstormy16.opc +21504de31981a67b5b93b265029d1865 depcomp +2fbd66ce879b3c1f9dde5a1bb1e4da93 elfcpp/arm.h +85ce66ba60e725eeb85390bdf0e1618a elfcpp/ChangeLog +bbe53a37fc6d5d8be4fb08daf8284581 elfcpp/dwarf.h +cff7cf2a7a4992ab4d4a21a8c9a1dd3f elfcpp/elfcpp.h +6d800de71808f85ef50b71fbda690bf0 elfcpp/elfcpp_file.h +405a84dd64429083e7a1b6ab06b5dd29 elfcpp/elfcpp_internal.h +75f2047addd89b7e1d9c0e4eef76a227 elfcpp/elfcpp_swap.h +5d5536c2c3f21b5d5e4d0b858c32a350 elfcpp/i386.h +ec96524676323bd37869782ba05e3c4f elfcpp/powerpc.h +293fa7cc3195d9c12479108a2a31b5dc elfcpp/README +6b1aede3fa632dc16fc154360ca41a3e elfcpp/sparc.h +625867cb35c566ef0d4c2fdbad4bc0fe elfcpp/x86_64.h +d22506533b932d8c1d49445c4f9889e7 etc/ChangeLog +a20b40a0a5d3282f6a97c627be1e38c6 etc/configbuild.ein +570746cd93c4dae506cf2a6153a2a1b3 etc/configbuild.fig +f97ac2d5e05edeb335b73f8b6beef581 etc/configbuild.jin +b2851bb6d77822adc89ffc6d323b5fea etc/configbuild.tin +e67b330b1ad623f1bd3850483cd4666f etc/configdev.ein +c1f7c41d3e596256ab5f5f933a66293f etc/configdev.fig +8e14386548b8da4c5072aa2abea55886 etc/configdev.jin +32fc10cbdbf679bd0ffc8857cf069b43 etc/configdev.tin +3730d24b1dbe4961124dc2288b6997fc etc/configure +04c402a3f17c2e0e5d13e424d617e88a etc/configure.in +2e5d03d7e059e2f8b4c14b8bae4b663d etc/configure.info +41ad927ae6285207ad5ba60aaa68c84e etc/configure.texi +ab0fe311032294b952da80585b8b90e7 etc/fdl.texi +07570ba317be730a55c952a81d92dcef etc/gnu-oids.texi +16d5de91d4a0b2dd0259cbf784de927d etc/make-stds.texi +ab62f0847c161211feecf2530c6ba60f etc/Makefile.in +416e4db8d33628997a1d97b6fc06335b etc/standards.info +2b58a4439cb76a759259bc3341b2f67f etc/standards.texi +d5faa80d97899ae08accaff400923890 etc/texi2pod.pl +df1c60e7555bd16af999e1170e594c29 gas/.gitignore +0ccf7e1ad0698f58fd8eceb1362ccfbc gas/acinclude.m4 +f2b796b5a115fc938144622cd5361773 gas/aclocal.m4 +2a5f1d9597be420bdfa50f0a6f689564 gas/app.c +9d31310c88567b4638f168f6dfc87a38 gas/as.c +2e9c10ce42cadba51ec8ec0d543adc7d gas/as.h +e25637964415c4475a64a2a5c7cb963b gas/asintl.h +6c8d6099ae64334a6bb30e8adc4083d8 gas/atof-generic.c +c6df37b6419ba5ecab16a4c31a82bf20 gas/bfin-lex.c +57f1e316f19b1f89f4b93940ef13b0a9 gas/bfin-parse.c +b153c3067dd3c07ca9abb242b372a842 gas/bfin-parse.h +c8e21390fc2415e6603e21d7e44ce2d8 gas/bignum.h +c87664d9e05462d25308624a5caf49a6 gas/bit_fix.h +18447cdc0d8c371154dde574fbbd6503 gas/cgen.c +495fcb482c46f0e459d40f50000575ab gas/cgen.h +18b604a216acce6875adc6a10def053f gas/ChangeLog +d92c3865d6ed795c892f2cba004856e1 gas/ChangeLog-0001 +f985628fdd8bed73c8948cc8496a1af1 gas/ChangeLog-0203 +7ee4a40be5732a4dc9b8f09dd534dffa gas/ChangeLog-2004 +8eedb9e8a38e7ca4e5bb584e1fe0a7cf gas/ChangeLog-2005 +d92c5b2a557f33fc367e457097257fb8 gas/ChangeLog-2006 +7d03a3dcbf7fb50df66016d49100e59c gas/ChangeLog-2007 +e9cffe807ab956e45f7cc45bf698e101 gas/ChangeLog-2008 +e8376db1e4e246b2639ee6460adb1e20 gas/ChangeLog-2009 +df53bc3528c9495e3c2db81c95896d6f gas/ChangeLog-2010 +1341d014bf9d648fff92c7815bbc7596 gas/ChangeLog-9295 +2ca0a735423063fa9757a564336be2f4 gas/ChangeLog-9697 +e6aed0ab8c1b1b6bcfdae6d97862b880 gas/ChangeLog-9899 +0963b41edc7e46fea7d776fcfb2368ed gas/compress-debug.c +5b72e9fbef33882696552d87e7ce38a5 gas/compress-debug.h +7a274ac289093d1a89223fb6ca9c1f95 gas/cond.c +a7f496f8924be2f4cf8e9c870d7b4fd3 gas/config/aout_gnu.h +beeae856d74dcefe109aee0059758db4 gas/config/atof-ieee.c +38f6e7dd8ad06d9b2bdef8019f772f6f gas/config/atof-vax.c +a9c44c515e605173ce6298ea81eeb0ea gas/config/bfin-aux.h +ec060c6c4a1cbaa48252bff5ecd87b20 gas/config/bfin-defs.h +9aad513bf660346ab10b41c8c4d5a9c6 gas/config/bfin-lex.l +704ed8270e50653ac48a6058772b1646 gas/config/bfin-parse.y +46d27aacfb59fffe2982a15b81323c4a gas/config/e-crisaout.c +3fd339133d627c50fe093c3984d4d020 gas/config/e-criself.c +9a8cfd650220df5369837a3f65ca26f2 gas/config/e-i386aout.c +991fb4f985c6cb6ffd333849c20a7bc2 gas/config/e-i386coff.c +b32a87acd5a22a9362fee074ac74c596 gas/config/e-i386elf.c +55272227032cc7a89abb3c5eba472f50 gas/config/e-mipsecoff.c +cb10da9eb9531fe5102801f2c8b8c003 gas/config/e-mipself.c +5c5a38e784e146d5c513fe860f32aa4d gas/config/itbl-mips.h +797e197f24c46a767478c28bc5dfece6 gas/config/m68k-parse.h +82ca3755ce16eb16d66b0cb0d9cbeff6 gas/config/m68k-parse.y +3829861f76e3e56a4ab283dbb08f9359 gas/config/obj-aout.c +4e0ffff4eff7f2f318fc985733d520ec gas/config/obj-aout.h +9a075d669341ff5235dd7a6e5e7a2255 gas/config/obj-coff-seh.c +3f8d5676f9f2f63384d1d43a98db7578 gas/config/obj-coff-seh.h +bec79e69a081f0b8d14f5746fb2e5c16 gas/config/obj-coff.c +e54ea319c9181941b59617f2d53d9a71 gas/config/obj-coff.h +6d5a47d0bc8ebd96700201636afa2c96 gas/config/obj-ecoff.c +2a7022ba7520b4607321abddcdb5139e gas/config/obj-ecoff.h +76856e8c2ffa30544cc91d002eb7ccfb gas/config/obj-elf.c +d6d612783f54717f1a9c2d8ec1b347b2 gas/config/obj-elf.h +fb75630f101d8eaf2a553370969c0dae gas/config/obj-evax.c +7105d3d5805b5a080b72d39ed47f9f64 gas/config/obj-evax.h +10ebc9c0079e17d556b7eafc311a472f gas/config/obj-fdpicelf.c +3a5af93d62798495841899179308deac gas/config/obj-fdpicelf.h +b15bd99506520907633f051cf3a9f485 gas/config/obj-macho.c +4beaa6bade0bc89ce1ffeb696f01da09 gas/config/obj-macho.h +09b3f329960521fad6f48800197bd140 gas/config/obj-multi.c +b76cf25d1c76e6b9b06147c811e7e618 gas/config/obj-multi.h +e51a0e267c6687a984bb5fbb5ef83e7e gas/config/obj-som.c +99b1f3015034ee964bc7348b0d55eb87 gas/config/obj-som.h +77df13b9b47c6eedd6bfa8035e96e5da gas/config/rx-defs.h +80d0d13679e0f68515bef1999feb9a9c gas/config/rx-parse.y +55944d51d9928dede6950556ce28fa8a gas/config/tc-alpha.c +096c407c69a2ceb0d13006fe1b2f3fc9 gas/config/tc-alpha.h +2b9925ed3c6565c2802a3c744c787a95 gas/config/tc-arc.c +11b936fdbc63c624d6713a01be12a049 gas/config/tc-arc.h +c5b5cd021e37dc9879410aff84c8168c gas/config/tc-arm.c +c6aae64d0b921890129826c297cff793 gas/config/tc-arm.h +a9af3f31fb714e940991c4ddbfa08675 gas/config/tc-avr.c +85a969a2c5df82c892f3aff0259b19b0 gas/config/tc-avr.h +de44dc1975bf920bdad2072511968556 gas/config/tc-bfin.c +408c3d212dd7c8d3e30765b3ca72d678 gas/config/tc-bfin.h +4085c77671ff4e22b1ee2e3f1b526b97 gas/config/tc-cr16.c +16e337635d412bdff3d59cbdb9eeb954 gas/config/tc-cr16.h +2581a3c30987111b1ae59c17d04941ae gas/config/tc-cris.c +df9261bbdee1d39086f7ff8048d935bf gas/config/tc-cris.h +993fe511fe447b322e6fe5d60704cdda gas/config/tc-crx.c +67e306cfe64c96a4797f4e06978647e8 gas/config/tc-crx.h +f8844cb249dc02eae2a6c4b13fd2cce7 gas/config/tc-d10v.c +3fd4b8aa4d965c70ef380972d732a70a gas/config/tc-d10v.h +4a0aa6b92f7413c7dbd031d8f2b60af4 gas/config/tc-d30v.c +98d2a1a66b8ace60c1fc95e4065a0f88 gas/config/tc-d30v.h +f0d4724b115a07c9d3d6dd40e5feb498 gas/config/tc-dlx.c +77b8d3dd611a1ca44eb35ae7ec9af0a3 gas/config/tc-dlx.h +4a5a7060ab2a0fecca7b3468dae10abd gas/config/tc-fr30.c +3050259b4ee050ac6d58b712674e22ba gas/config/tc-fr30.h +30d620d2d0352f47d652e9025d7d32da gas/config/tc-frv.c +121f5e4b3d7f5791c347c5308f4f8377 gas/config/tc-frv.h +1f33bef0e6ba089d1e5952b8acd94747 gas/config/tc-generic.c +7a2f6a786601e834505449bc5383f854 gas/config/tc-generic.h +e607a9614b65bbb5ce94c21e0627066a gas/config/tc-h8300.c +17190700077711741e7b153827b835fb gas/config/tc-h8300.h +a91ea59d7da7ad90f9de893cecd6d2a1 gas/config/tc-hppa.c +c76a58e2640357f838aea36277d846dc gas/config/tc-hppa.h +d61bb07f4418491d1a677c77eae67a86 gas/config/tc-i370.c +7dccf2b51236e3ef7deeaac89dfa991f gas/config/tc-i370.h +4ddd495eadaf535c00f43678adba6c40 gas/config/tc-i386-intel.c +f907ab64c54e7d2de68b440c358e2ef5 gas/config/tc-i386.c +49ba887bb6aa570e9bdbec41c1b24fcb gas/config/tc-i386.h +41f969a38a7e0814e5b10c4433ae154c gas/config/tc-i860.c +1cc39b1b19b8310594c2a43fa39c88ad gas/config/tc-i860.h +da1bf97ffec4c08aea1ba64f0faff144 gas/config/tc-i960.c +5905fb2a619cd2b1915d3b3e0887a2dc gas/config/tc-i960.h +f61d1ebef368ec14486ca75a30260164 gas/config/tc-ia64.c +83e4a795407409441cbf4a5f191ccba8 gas/config/tc-ia64.h +1b2598a7c7aa4bdeab6fc9376f78ec10 gas/config/tc-ip2k.c +7dee47fddfc7fe6644c874b61f2ac3ed gas/config/tc-ip2k.h +c3b3aa6e915f500aadd5a93d96c506ec gas/config/tc-iq2000.c +564d9c7e920d871b650d9ea9ea34b4a6 gas/config/tc-iq2000.h +03af11ca4e0b1ebc2f62219617cb91ee gas/config/tc-lm32.c +c2f3efda51c738051232915d0d7560e9 gas/config/tc-lm32.h +48a896c6e2d032c64c4aab54c6f434d5 gas/config/tc-m32c.c +192b78c8854c3618e4730d287f481add gas/config/tc-m32c.h +70bccc9b91c9ea7250c52bc94cf131c4 gas/config/tc-m32r.c +0c0a0407f136882d0321dc1ec4b39516 gas/config/tc-m32r.h +7725810e321ffec6fd146db9448e63d6 gas/config/tc-m68851.h +e4e00158e09af8a42b9617f941a39e62 gas/config/tc-m68hc11.c +0e4cbbc6ceafd46ccc91a6c580325d97 gas/config/tc-m68hc11.h +b8ef99c69980b6ea33190af8752d75f3 gas/config/tc-m68k.c +22ebe4d0cc57a8a1af63c924fc23ce8b gas/config/tc-m68k.h +02b9ae70fb2f707785a5d5588cc2ced1 gas/config/tc-mcore.c +22dce6a65547b031a610f2d96397ea87 gas/config/tc-mcore.h +4578a75756f4ff2a8a62d14de67775e0 gas/config/tc-mep.c +c1285c2279565713c1eadbb52226c3d6 gas/config/tc-mep.h +b5abc2a03f5c7cd5bca1cb03a393f1cd gas/config/tc-microblaze.c +2e4ae8a651b93205e965a45b872a127f gas/config/tc-microblaze.h +b61ac53de640423d39c5902a1201e49e gas/config/tc-mips.c +380de0347b8dfbd631d993336b0477c8 gas/config/tc-mips.h +972749ec51c47a10efea653d23bbaad0 gas/config/tc-mmix.c +9c9946ef89dc77be99368a225a024803 gas/config/tc-mmix.h +3a4089a6abed589dc9a4fc1b3962194d gas/config/tc-mn10200.c +e1fe4059bc58737d2a1a2cd70b17096c gas/config/tc-mn10200.h +8efa4d638dd7b54eb2c7f9247de6c8d4 gas/config/tc-mn10300.c +b23327a62392758125f64e8d8f071ab6 gas/config/tc-mn10300.h +e13ba96e47cdfef9dd64a862c8ded7fb gas/config/tc-moxie.c +c0f246b1b53d88033b92672a7da7520c gas/config/tc-moxie.h +b1248e373226785c89b551989cd8a070 gas/config/tc-msp430.c +323ddfbcec62e838a1bbf5a068f8a379 gas/config/tc-msp430.h +f1f171c1f333c606b83da0eae976a844 gas/config/tc-mt.c +80afaf3938f8136ac4922c3de5e48462 gas/config/tc-mt.h +906f66f29633dd42a07de0a5d59c968f gas/config/tc-ns32k.c +6bcefc8b0dd30c7c12e4349e6fa4fa90 gas/config/tc-ns32k.h +53c7f067defcff62b1e3ba59585ca56e gas/config/tc-openrisc.c +cdc0e43fe4f2e290849b55a28ebcf358 gas/config/tc-openrisc.h +9418e7f07d513cccac1d2c411a0e6292 gas/config/tc-or32.c +2352f77e742370578a89ffdca5d719e3 gas/config/tc-or32.h +4fc0b798fb72cb77461d7f5adf2f1317 gas/config/tc-pdp11.c +f9cad0069f8a7b2f076a80c6309f2ebb gas/config/tc-pdp11.h +e1448d84457dc273ffd42f8a2fbffc82 gas/config/tc-pj.c +5b7366e23ad26831a0037bd3b93d3e4e gas/config/tc-pj.h +8e1e787df618720b9939df091c8b05ee gas/config/tc-ppc.c +9026a7159b043505e9be456b6429ecc1 gas/config/tc-ppc.h +80cc1940ee7334dc40b8a350ad2b2042 gas/config/tc-rx.c +b8cd6ee2d5c0f91f7e6af6db2d7d8e94 gas/config/tc-rx.h +361ce8967941556e65b1386c945984c4 gas/config/tc-s390.c +29f545fc87e1f45334513612a0ddbf40 gas/config/tc-s390.h +31c153b4b17fdd8af620b96f66c668f3 gas/config/tc-score.c +8e6d62acf30dfed34157b0ca80896a5e gas/config/tc-score.h +fe832840a7da5c61cd39b67af032987b gas/config/tc-score7.c +cb570f60972cdcaf185bb0a45dc4c4b1 gas/config/tc-sh.c +a164375e7e73162eb39b5d2e90f2dfe5 gas/config/tc-sh.h +bf9ebe18553d7beb7584d08ea2259730 gas/config/tc-sh64.c +b31ff52a3e0405a9ce018c551399e80a gas/config/tc-sh64.h +5a41ce2bc732de21ecec7fca0c30fb5e gas/config/tc-sparc.c +965d4e3ca34f2a64e8e445aa638b2d80 gas/config/tc-sparc.h +4bd2fece53b305234c4b619b8846e8f9 gas/config/tc-spu.c +7a2c803611ef7ced54ab8c9cfeafc2fa gas/config/tc-spu.h +03bbc6fa33cd6ebec70dd5ab061c5751 gas/config/tc-tic30.c +6ba82f6abe777d7f204c60c923bbd1cb gas/config/tc-tic30.h +c19b842b6922bb8eced42872ace677dc gas/config/tc-tic4x.c +71fab4042ca37eb10fb831dea6c316f5 gas/config/tc-tic4x.h +8b58d3b74bf7b4f93cf9357b0601ddcb gas/config/tc-tic54x.c +8c571810f8b8b2001882528175733c72 gas/config/tc-tic54x.h +ece8bcbe81be5d93013d376dc4441497 gas/config/tc-tic6x.c +bed34a6cd5a73b092afb6d0cd91b99cc gas/config/tc-tic6x.h +905dcaa2e32b77ce3b2a0e37f09ed7ef gas/config/tc-tilegx.c +8dbb571a5fc7fef82f427d05f30e9727 gas/config/tc-tilegx.h +4b5ba01dad63eb15b2f7d7245757b077 gas/config/tc-tilepro.c +c47624a5e236948cba86efa034f1e16f gas/config/tc-tilepro.h +2fe941df1111d332e9d176af0afd3f5b gas/config/tc-v850.c +0c9681112da2e41d0087b4ecdb56b9c2 gas/config/tc-v850.h +6bf36860fa16a4d3945d875df3887c64 gas/config/tc-vax.c +8256b4c41eb2857c423f9a594cf2b3cc gas/config/tc-vax.h +754e98e59b3c817eea47508b36db81ac gas/config/tc-xc16x.c +b9f7c9d1143c443afd567445063d237a gas/config/tc-xc16x.h +5876a94f1c988da28e07ab1a8ddf4889 gas/config/tc-xstormy16.c +0d07ca8e159011c0d4d15db8d781855f gas/config/tc-xstormy16.h +afad24c658c6b7ee98b9dc616a9888b7 gas/config/tc-xtensa.c +8919498b090fd3ad00b7d0b6698eed0e gas/config/tc-xtensa.h +f56fdcd3a739d7a68d02c3b10899650f gas/config/tc-z80.c +dda5d59c9501688ba620f7c5c26938ef gas/config/tc-z80.h +742550db20b23687f1bc9872fdf5fd2c gas/config/tc-z8k.c +654b655e3637d9b3e4976fa4659a3425 gas/config/tc-z8k.h +846f1bd9e1ac66e299e1f5f2f0a26d28 gas/config/te-386bsd.h +82978f6c9dd082849f4c4a8ce5195874 gas/config/te-aix5.h +e901549aefb8b308ab9856c37f823b4b gas/config/te-armeabi.h +47acc24c7f9c17376db9206e51d80095 gas/config/te-armlinuxeabi.h +17d038880ac663d82d0073ce8aaf3611 gas/config/te-dragonfly.h +89b8eb84b13d921baacba0fb5cc5d94a gas/config/te-dynix.h +19a15130d5f27821bd6a33961ee0b746 gas/config/te-epoc-pe.h +ac2563d347522fa121654ca11fdeea14 gas/config/te-freebsd.h +ebd37057dfb2465eceb5f25740dc9ebc gas/config/te-generic.h +0f429c364757fe87349aee8defe34604 gas/config/te-gnu.h +34f166f075e66d3e0f5fccc1dedbdb2d gas/config/te-go32.h +a888715f1311630c88260a460af84fc2 gas/config/te-hppa.h +9a256557e990376c03c799f23447d3ad gas/config/te-hppa64.h +1dc4b217e7321782918812087dfec497 gas/config/te-hppalinux64.h +f054729d11e4bdc0d511de0c22771a84 gas/config/te-hpux.h +482879c6ae606c3b430e6826ebf8dd68 gas/config/te-i386aix.h +b0bdd8286d474201386f781932f73fa3 gas/config/te-ia64aix.h +aa8fabcf3d3093365a232271033ff216 gas/config/te-interix.h +480085f6479825238a1496c74d985737 gas/config/te-irix.h +35e986b0ca44cc9e79fa57c2d7ab0ead gas/config/te-linux.h +95a3614361330b27635b2a3f93d7c6a6 gas/config/te-lnews.h +7dd69643aa20c8174bf37930d4973eee gas/config/te-lynx.h +7a54940f07dbcf6b4eb99ab07e3faa8a gas/config/te-mach.h +f1bafdbbf6272e7496725b8302b30e79 gas/config/te-macos.h +bb0e75e1a1c031bb09a660b4360140a4 gas/config/te-nbsd.h +ded7737a8aeac92f12c4013bf0d9e453 gas/config/te-nbsd532.h +8f0bc9c855c33c453250a60b57910b8c gas/config/te-netware.h +1b08dadc1695c748f88e7f080ef28f66 gas/config/te-pc532mach.h +9b79ef8ff3b3c00dabb275eedbc13c0d gas/config/te-pe.h +0d376aa34db1e2863f3509f47027dcaf gas/config/te-pep.h +5ba13db883834de33b7a3c24116ede95 gas/config/te-psos.h +3e7327df1df473529e30df0a10a31e65 gas/config/te-riscix.h +47b89894b5e5cb88a4d4822530c1cbb7 gas/config/te-solaris.h +b3878236b9488c1a4facd0a31544aa3f gas/config/te-sparcaout.h +ddd6bf4b762e74b3b3ac1b928098f09c gas/config/te-sun3.h +e884942337b3717dcbad12574a4ba59d gas/config/te-svr4.h +03f0de9fd35c141fc5f9905942f03d15 gas/config/te-symbian.h +0d4337a94ec6ceac928e434d3f5a4c37 gas/config/te-tmips.h +67360e326453dbac4013ea8bac7c4148 gas/config/te-uclinux.h +046f5840c299eeb4ebde0f39e7b5ed81 gas/config/te-vms.c +2a76e2eca66b9d387e5b927987e2681a gas/config/te-vms.h +6ab9e45fd87c377872fd3e83abfae703 gas/config/te-vxworks.h +384a20d298a5bd6577e83e8591fa8a0f gas/config/te-wince-pe.h +fc884f4704cef426cd35179c5d922795 gas/config/vax-inst.h +1bc31c6cab3996a70557f19b791bfd2e gas/config/xtensa-istack.h +38fa59f76ece285ac497d958ddae0f1b gas/config/xtensa-relax.c +7de6470b79d43c6db28c845e141bdaef gas/config/xtensa-relax.h +a557cb7777909ddf98d654b9bba3b485 gas/config.in +019fadb34c45c331b6badff0440cef52 gas/configure +7e6b42997f912871798bbfc004339411 gas/configure.com +de3e615b66769c08efa36fb7b1fedc23 gas/configure.in +1a106b02440f264426c7d934d85600ec gas/configure.tgt +53db0ab868dc9516af2c5ab97a8450f0 gas/CONTRIBUTORS +d32239bcb673463ab874e80d47fae504 gas/COPYING +046b766092400d556fe2c48e86605010 gas/debug.c +36285069bae7f4dca379829241710bd4 gas/dep-in.sed +d2bc182dd992e21aee661917228a59a3 gas/depend.c +b452cf27e5b22a158729680670b665b1 gas/doc/all.texi +2654b2e2a287b73bfe9ba54dbb603c8c gas/doc/as.1 +dd2194e9baa7fd04953866e12df879eb gas/doc/as.info +7358435d0b4801c1c7c92c9033e8085e gas/doc/as.texinfo +b452cf27e5b22a158729680670b665b1 gas/doc/asconfig.texi +b4c9c0f1aa186794ae86366a85cfb7d6 gas/doc/c-alpha.texi +bc80ddb6294fc82e2ea4f425f38fa672 gas/doc/c-arc.texi +97e140888e939afce4e1132ff0f55dd6 gas/doc/c-arm.texi +67dc35ff653d7b8068818b47598980a8 gas/doc/c-avr.texi +aa9ea84d18e896783f89faa3a90a0fed gas/doc/c-bfin.texi +179b2db45d3622eae69f59a6de37e20b gas/doc/c-cr16.texi +8f78a32066cbf6a56e8f8c4dd571ae38 gas/doc/c-cris.texi +dff8832eec63f574612e2eab23deed7e gas/doc/c-d10v.texi +eedc75ac8669cec1a86d7ea12d34a0d5 gas/doc/c-d30v.texi +59d3e64c8f4f965b3aaf283c39c7a22c gas/doc/c-h8300.texi +c66d36fa35a14bf3cda80832c130d87e gas/doc/c-hppa.texi +737140a2ffd746cdba96fa47fec328a3 gas/doc/c-i370.texi +9f42ee3142ed56f70c04bc3f5f1cf1f1 gas/doc/c-i386.texi +9e80d5308b76432b2ba1290eb636268a gas/doc/c-i860.texi +fcb8d9d5542c91f40e11dbbb5b0399ee gas/doc/c-i960.texi +9553acbdca626eca22306c81d17f5081 gas/doc/c-ia64.texi +936a09f52577e059778d36472a6413a4 gas/doc/c-ip2k.texi +eacbb6dc4cb37bb6b8dcb771af41d7bf gas/doc/c-lm32.texi +1cc920d421ece763d3ab4ed3857e3e35 gas/doc/c-m32c.texi +0639d7eaf2dced3275e868a6ddfb759b gas/doc/c-m32r.texi +84578142e7b85437ec2d14763de255dd gas/doc/c-m68hc11.texi +e824c3e3d9490c07e40b9eef9d1940cc gas/doc/c-m68k.texi +16226640ab8e14104d363cdbad5053f5 gas/doc/c-microblaze.texi +523c4541cfee611cfce8713d1df41f4f gas/doc/c-mips.texi +a6314182d1319dd718175347b831f048 gas/doc/c-mmix.texi +f9605e25ab629d224ed8ccb80f199f00 gas/doc/c-msp430.texi +baac99e8bc5ff2ccb8dbf425b8fdf69e gas/doc/c-mt.texi +ba35f5e8ce25efb33c7de10fe31ac8e8 gas/doc/c-ns32k.texi +3fe953291dab4fece9848fd397316df4 gas/doc/c-pdp11.texi +b4410fdbed610cd23fc2fec23ebcbc03 gas/doc/c-pj.texi +8d7969cab108648c0654099181cba0ff gas/doc/c-ppc.texi +90ae7923d96f62d793e94d4835554075 gas/doc/c-rx.texi +b364e7423a4f7ca7b9bc03c9a0fa23dd gas/doc/c-s390.texi +cc1e268ae84dacd9c057111e7ff62e11 gas/doc/c-score.texi +2c0d773535b9a9d67fc1d97d4557df23 gas/doc/c-sh.texi +64b14752824bf90ea8475df2daf16b8c gas/doc/c-sh64.texi +6f48e99ff8e84d99f1b8847c1473164d gas/doc/c-sparc.texi +af8e3c8db47ec3896bc31a494d7de6b0 gas/doc/c-tic54x.texi +b989dfc942aa8ab980fa6c65b41049b4 gas/doc/c-tic6x.texi +c275694d2a7d2dd2a31a9a196d0cfdcf gas/doc/c-tilegx.texi +ca8af8a1737b3903061b098e5df4ef68 gas/doc/c-tilepro.texi +4a1d98d11c9cf2ca4461b9a50e5bb008 gas/doc/c-v850.texi +7af989936deb2e3760522fc162ec9259 gas/doc/c-vax.texi +f4e50b91977f2ee38355a827220a27e2 gas/doc/c-xc16x.texi +2c20cb5c3a5f5a5c372125bbb4b3b26a gas/doc/c-xstormy16.texi +c7c3fa486b208e927a1fc4bfdd77d840 gas/doc/c-xtensa.texi +3d2d4c31a8139814c77b20e27e972b09 gas/doc/c-z80.texi +253f83f4a9674657798fc94b823110d6 gas/doc/c-z8k.texi +072910d553f79906db69fa7c0e956bba gas/doc/fdl.texi +289febda425d8afbd046e348a08dbfff gas/doc/h8.texi +8d09e6a6866fb40f7967c09acc404f2b gas/doc/internals.texi +11ebd0feb8f394b93ae6d8118c76ab88 gas/doc/Makefile.am +a2fdf202c246bbe758e967be5223b64a gas/doc/Makefile.in +a71cafa5575a99a89cc2d321e3381267 gas/dw2gencfi.c +40b934c6fc1fcc7b41583850293dcea4 gas/dw2gencfi.h +7bb9f7555d019c7361a9b7658cc7b337 gas/dwarf2dbg.c +54364ac0f17fd7b383758cf7ab4dde09 gas/dwarf2dbg.h +24d9cae5e0cafd887166ab83fc85d67e gas/ecoff.c +5188016afd7345ccaf817fe920df1af3 gas/ecoff.h +ea78433d88fb44e6e068fcaf4a999845 gas/ehopt.c +92732c078a7acf574af9df1fbc62236b gas/emul-target.h +99a7a09433a40a316a830646e1febaba gas/emul.h +2e0da825bbc7baca039dcdc94b364041 gas/expr.c +1a232404fe1e22276ec24ff339ac0920 gas/expr.h +a8086612007d4b1398bbcd3222491afc gas/flonum-copy.c +17e961bd7664effaa115dbe1752cc76a gas/flonum-konst.c +67f204a57fdf44aeb64bfe5c900d9c87 gas/flonum-mult.c +39147fc4f0f972c0c256ff21bbebc855 gas/flonum.h +ae882e3930e09e078998b8525e50b167 gas/frags.c +e006dc9f9a1778ed1fb65597a85285d1 gas/frags.h +ae2f57545b6c7ce4a91fb749513ac6a1 gas/gdbinit.in +d4b70a92ad2683b4707e5c46e839d9d9 gas/hash.c +63a7f829b6cd1ba1174831e406a660d2 gas/hash.h +2df8cc79b06128bb6f9052ea946b98c6 gas/input-file.c +3cff7b4bbf83194380e69a1edd0e6336 gas/input-file.h +11964b69924e63a4abebc0f0dc523139 gas/input-scrub.c +63f82b532c2bd06bce7661f63fc94893 gas/itbl-lex.c +78dd7d2bc83a9ea1066d5cf81387f9db gas/itbl-lex.h +854c41c87d0d90aa26b6ee48f28baadc gas/itbl-lex.l +e916586c657a7414b19314f92765f814 gas/itbl-ops.c +e447a89687ea0ea18139f6bd905b02fa gas/itbl-ops.h +4ea7ac4d931713b4c4266bf1e01c540c gas/itbl-parse.c +86a928b05e84edab3af35f7aa489f27c gas/itbl-parse.h +0153b49dbbcf47a9cfea80fa35b93482 gas/itbl-parse.y +e441085d852276adfa2fc811df97b807 gas/listing.c +f281c30f7476482b70817dcabb52e1a2 gas/listing.h +d3d3be59b37f1add71b4f71bfc46422f gas/literal.c +64cd294a7e4390954710090b0b743b49 gas/m68k-parse.c +2e58478bd61878b077142ca597b92780 gas/macro.c +bc1cba24dd11574ee28e63c61603cf43 gas/macro.h +d618facc3e8ce8bf3d02ba452e1be6ab gas/MAINTAINERS +6aaf48e988eb44ef0c4af9d5ba0d3b79 gas/Makefile.am +b47315ea590ddfd558b906dedb7e288e gas/Makefile.in +354cf2a2fc74c71e5c771a70f35e7e26 gas/makefile.vms +c7dca5ffd79185a3d3da0c3c7c3ac80f gas/messages.c +7c636624216330e19d033da06fba83f3 gas/NEWS +37cb1fdcfd13bdeda1527a80ddc1333c gas/obj.h +6ce9540be0e657371728a69ecf5ea0e7 gas/output-file.c +2fa8189fa6fc775e05be73053a0b853d gas/output-file.h +9520a6893d16735418796e0fbbb2bd06 gas/po/es.gmo +74d253813bcfb1c212ddd215e7aa25d5 gas/po/es.po +20888a4a689d6f09aba59e93261ba117 gas/po/fi.gmo +2806dc4b95969a5908511d2ab97d1225 gas/po/fi.po +df112bde534ccee4748328baf62e143c gas/po/fr.gmo +b7e846c9e75038d1767c38f03de71485 gas/po/fr.po +7cd92bef34b0797bbfef6bae91c30d30 gas/po/gas.pot +9cee2a71c8a685f823334f2345fe6926 gas/po/id.gmo +d630cc3fe15feab4abff44e37f5d7d3f gas/po/id.po +8935ae2870f3d67420c16c4b92796ceb gas/po/Make-in +34afbfdf8c0409276df72ff59fa58501 gas/po/POTFILES.in +e21d5e731a31d115fc5685e7918e1180 gas/po/ru.gmo +3dc090bd3b622ebd9bdc07bf87868066 gas/po/ru.po +3e890a0b3ab0fdf3474873d5627b21f4 gas/po/rw.gmo +ecfefd4ef9c04f3bd2e486e73cc878db gas/po/rw.po +f921f25b46f5eda454485a4af9286c90 gas/po/tr.gmo +39462aa2819407ab236aa02d57ea5a53 gas/po/tr.po +0bcc05a5f05166cf093b95766dbfc876 gas/read.c +90ebac1027b1eaaad9f5f1488b66908d gas/read.h +7d90db3f78994d389f96376160c78e79 gas/README +b8add65d8707b4c648594ee377de406f gas/remap.c +ac7a361753c382cf1886168bddbbbf97 gas/rx-parse.c +8c2a82136f9c9030b1da1447f6a4788b gas/rx-parse.h +5ff8b777f16712e64fc85e66d3864c8b gas/sb.c +66b8e182fc92b3ad837f2c36c39f800e gas/sb.h +1b43b8ed2deefd836ecc2321be9a172d gas/stabs.c +1ded054093de910d9786c62bc4fe8cc6 gas/stamp-h.in +f466095ac8a7a01b59cce1a965b3e166 gas/struc-symbol.h +919587b23bcc5514a7c31d7c363e51eb gas/subsegs.c +fb0f91c11edf3d6da54955ca2cd59a7e gas/subsegs.h +f1cd96b3465f26c507b0224c5bbbe9b4 gas/symbols.c +c50cc83daefef2d086e32e09f874b0a7 gas/symbols.h +5e55a27d8d002eda60e10a4baaa71984 gas/tc.h +19973f8fea6f93b10dd1bba9a7b7963c gas/testsuite/ChangeLog +8f4c98fe241e3d57b357137c666fd4ba gas/testsuite/ChangeLog-2004 +6e717d4f414fd8ffacb0b5f480256270 gas/testsuite/ChangeLog-2005 +a89405fc1bad7bc620fc00b28bd62f6c gas/testsuite/ChangeLog-2006 +5de611d822d2546671c06953d8fd538d gas/testsuite/ChangeLog-2007 +c04dee8bb883614a130ec425bd11909e gas/testsuite/ChangeLog-2008 +7372b5681e8dccaafca73555adb69e3a gas/testsuite/ChangeLog-2009 +64f11faad6bab697aecc0a5339bc6544 gas/testsuite/ChangeLog-2010 +f2390f2b8917391da133b1ed67fa8607 gas/testsuite/ChangeLog-9303 +db812b65b8dbbd96d60562df3bc90c2e gas/testsuite/config/default.exp +6d40ab26009707974cd97b3f85eba886 gas/testsuite/gas/all/align.d +a60277af402def6d8b222eb7aa29fd72 gas/testsuite/gas/all/align.s +e6c304936e9061331bf04ff66f8c1eaa gas/testsuite/gas/all/align2.d +16604c070ffc1562842c0a67da3fdc4d gas/testsuite/gas/all/align2.s +69e2c29fe0d1168c47d1e8b9657659e8 gas/testsuite/gas/all/altmac2.d +f0cd1747f8e7af29724f1145a83796ed gas/testsuite/gas/all/altmac2.s +e305dbfa90f24603b18216c0f3fd2d49 gas/testsuite/gas/all/altmacro.d +1da520aefd1b26aaf3d59e3d68d4ccf3 gas/testsuite/gas/all/altmacro.s +dfded27f5745972797ed960a849888ac gas/testsuite/gas/all/assign-bad.s +ffec055967c23ae21dba22a6ac5c9e3e gas/testsuite/gas/all/assign-ok.s +48cd3944d00ffc414edc8ab100129683 gas/testsuite/gas/all/assign.d +c70d12a44da637481d77388d379a4f9f gas/testsuite/gas/all/assign.s +8e8b84ccd3bab6d4479f373267c7c935 gas/testsuite/gas/all/byte.d +0733c957af816c50298d1dd2c58f5a6d gas/testsuite/gas/all/byte.l +82e38f239dda10a87d4f131bb1a52b92 gas/testsuite/gas/all/byte.s +6fdc3af8b63d5c8dd0a98137215d3753 gas/testsuite/gas/all/cofftag.d +a18dd1c48d82b4324b3e6fe34ed50dda gas/testsuite/gas/all/cofftag.s +7642a824a63aa87c0f0c07ebab2ea9ba gas/testsuite/gas/all/comment.s +7bbedc3ae9894c93576fd06f35e70535 gas/testsuite/gas/all/cond.l +91a7dfff6d9b1fd2354096b767db4cea gas/testsuite/gas/all/cond.s +7ec8ad8becdaf04c09bde661a8ae427e gas/testsuite/gas/all/diff1.s +3725ec8088e01ec8900ad41fb2295381 gas/testsuite/gas/all/equ-bad.s +b69cfaf78110599c63010ad6d52e3920 gas/testsuite/gas/all/equ-ok.s +285b5f9762e337f80994b575f235968b gas/testsuite/gas/all/equiv1.s +1170e49707759e59d9d43a91bfaff853 gas/testsuite/gas/all/equiv2.s +772c9ce372b12eec88e8ed48afa8e095 gas/testsuite/gas/all/eqv-bad.s +be23e497c6b9c82aa5289a1d42165934 gas/testsuite/gas/all/eqv-ok.s +174595a7641ae3110964493d3087e8b5 gas/testsuite/gas/all/err-1.s +40bae500b5de820301091838b2dfaf78 gas/testsuite/gas/all/eval.d +b0d74a67fa0e0140f0f7a98e8a1a4f49 gas/testsuite/gas/all/eval.s +32b517988d18eebe13e6c54d2e0feb00 gas/testsuite/gas/all/excl.s +1e473ef749281964d4b71dfe127a5b69 gas/testsuite/gas/all/fastcall.s +a3ed4c57221d0e6ae68721825604f04d gas/testsuite/gas/all/float.s +c86b9077e248e065c0ccdcf220c5243e gas/testsuite/gas/all/forward.d +a228b061c0ecb736bad03c969baa7c26 gas/testsuite/gas/all/forward.s +4200299115c54a121ec66434dab90c6c gas/testsuite/gas/all/fwdexp.d +3a1e933959b3eb6875798141fa576771 gas/testsuite/gas/all/fwdexp.s +89ea9a171ecd4a5acb363ee33c89fd7c gas/testsuite/gas/all/gas.exp +a94f64a3485357ae737e79fdbb095859 gas/testsuite/gas/all/incbin.d +aa088c5c0e59150fbe2283dc31cd8353 gas/testsuite/gas/all/incbin.dat +3fcc9d1848f57cb6d23cbfe139e2052a gas/testsuite/gas/all/incbin.s +ff0067e6fc03e40d69f6d4a3df69c315 gas/testsuite/gas/all/itbl +382da5059713a0eb1ca0f7a012d9568a gas/testsuite/gas/all/itbl-test.c +0a1bc24fd58a8e10476fda0bd5b649ed gas/testsuite/gas/all/itbl.s +69bd077c208114555791fb58d4909e98 gas/testsuite/gas/all/octa.d +495bc721e5af37eafc554b7db83506ef gas/testsuite/gas/all/octa.s +b61a6aca515ae31b7be7abda0a152bbc gas/testsuite/gas/all/p1480.s +530c3d83c5129c3823692574ff0b07b8 gas/testsuite/gas/all/p2425.s +20f3d4b257a6efde0445b30b3a02ec98 gas/testsuite/gas/all/quad.d +94daa7db7daabe1c947773877445172e gas/testsuite/gas/all/quad.s +05ad0ca5a64fc9c53152de996bcfb72e gas/testsuite/gas/all/redef.d +15dc09b212a01e4b4548748f80ddd95e gas/testsuite/gas/all/redef.s +3fd90724c589e390efc701a02af7d3a8 gas/testsuite/gas/all/redef2.d +b2d210c45393fceb3d931963339d88ff gas/testsuite/gas/all/redef2.s +e76a753bf2534357fea9b078ef669a99 gas/testsuite/gas/all/redef3.d +ffc65f2fa231239465e4f8a7a5f426c3 gas/testsuite/gas/all/redef3.s +3f3ef7827846424857bf668b4579f90b gas/testsuite/gas/all/redef4.s +309d8b7519fa095a1057a32e1947daf7 gas/testsuite/gas/all/redef5.s +11d49bd9ae2b0f109c94e48fcf851dda gas/testsuite/gas/all/relax.d +34fd596eed3825011e6bf9eeedbd85b8 gas/testsuite/gas/all/relax.s +f87cdc714e46c3d392bb5ace50f5089d gas/testsuite/gas/all/sleb128.d +18b960297606054a20f63aa891b7e12a gas/testsuite/gas/all/sleb128.s +665502eb0715d91cc960000b623b5f6e gas/testsuite/gas/all/string.d +936648e9d1203b9af3233aec673dd9f3 gas/testsuite/gas/all/string.s +856ac38b9fe37e63d8173f9299961115 gas/testsuite/gas/all/struct.d +0b2dc0f909d4928a8de943eade54a345 gas/testsuite/gas/all/struct.s +c1c61584f5902f8d3f424c7c0ab625a7 gas/testsuite/gas/all/test-example.c +3016ff2229f0cc0ba9e8d952f0cff925 gas/testsuite/gas/all/test-gen.c +c306f31d167824da1c6b8a24af1af24e gas/testsuite/gas/all/warn-1.s +2cb2ab1bd254a01075f23574bcf76cab gas/testsuite/gas/all/weakref1.d +2ecea24bd25e45a5b2408288c88922bb gas/testsuite/gas/all/weakref1.s +1bfe06f39639f91ea299f15721ff1410 gas/testsuite/gas/all/weakref1g.d +15be263b669e47327b0ffb9dd01a5001 gas/testsuite/gas/all/weakref1l.d +54478035dc75589d7990b5cadb636632 gas/testsuite/gas/all/weakref1u.d +240460ab5e8b7dbfc5d24fcd1d02a76c gas/testsuite/gas/all/weakref1w.d +7a2be682df8fc9718f6195658ba1c976 gas/testsuite/gas/all/weakref2.s +5c3a5451b98a5cfb6c3bec7bc1710139 gas/testsuite/gas/all/weakref3.s +c244658794f4e2eb27251ec5207b9292 gas/testsuite/gas/all/weakref4.s +8ba076a868d6d446a4ab1462add54fd3 gas/testsuite/gas/all/x930509.s +61127e9f70926fe0c0e56a9f2f957051 gas/testsuite/gas/alpha/alpha.exp +879aa3491dccb8faf8dba627014571e5 gas/testsuite/gas/alpha/auto-align-1.d +0d60fd9478e783fcfe67951e4ef64d36 gas/testsuite/gas/alpha/auto-align-1.s +7caf94f0e5c9ee4a654de71ef7acde09 gas/testsuite/gas/alpha/elf-reloc-1.d +542ba778a8026db8d3b82d45c828970f gas/testsuite/gas/alpha/elf-reloc-1.s +44bc975cf505fc614b902b6d05a8cb27 gas/testsuite/gas/alpha/elf-reloc-2.l +498dd06c38f62a854337eb6e0629f562 gas/testsuite/gas/alpha/elf-reloc-2.s +8e926ed54e1cfadbf6d620943fe14e9e gas/testsuite/gas/alpha/elf-reloc-3.l +cd44e5cf1cf5d7f57c32d759623c16a5 gas/testsuite/gas/alpha/elf-reloc-3.s +48dca0e100904fd0f5f780221a50e391 gas/testsuite/gas/alpha/elf-reloc-4.d +bda565c218e80afced8a22ce13e68afa gas/testsuite/gas/alpha/elf-reloc-4.s +57d530cc16154b40cdafe2bd35f5fa9f gas/testsuite/gas/alpha/elf-reloc-5.d +280fd64660c31ce16cb67a670c130308 gas/testsuite/gas/alpha/elf-reloc-5.s +337378bf9bcfd622880b55f609cc2d82 gas/testsuite/gas/alpha/elf-reloc-6.l +f1db0194e78ed6ca547be0ce865e6bb9 gas/testsuite/gas/alpha/elf-reloc-6.s +ee3c5cca44cbbc8648d233bb9f47f386 gas/testsuite/gas/alpha/elf-reloc-7.d +9fa3e0a0d38d10c4591002d2a23874e4 gas/testsuite/gas/alpha/elf-reloc-7.s +5df5463b0a34e0632baddcfebccd5e2e gas/testsuite/gas/alpha/elf-reloc-8.d +14ae8981371d4189a9fa78cc86541e42 gas/testsuite/gas/alpha/elf-reloc-8.s +d9c79c31b22f9f59222c8407686d17bf gas/testsuite/gas/alpha/elf-tls-1.d +d3120aefa9f3d74f9a50d96702acb389 gas/testsuite/gas/alpha/elf-tls-1.s +175819424c6d7ea48da17c33b08145b7 gas/testsuite/gas/alpha/elf-tls-2.l +46336ae3d40ac88a4f205247b4e36c93 gas/testsuite/gas/alpha/elf-tls-2.s +ccc1bdfb6a205a1766cf1a6bcabb78fc gas/testsuite/gas/alpha/elf-tls-3.l +611202a8cd8fb1dfffbc7f8b9c15c22b gas/testsuite/gas/alpha/elf-tls-3.s +dd7ce23c42b5c75b7aaf68091e36ca89 gas/testsuite/gas/alpha/elf-usepv-1.d +1ecd4c2c9c9f694a311b4018fb4cc630 gas/testsuite/gas/alpha/elf-usepv-1.s +839b27fcfeb47671d83cc12070cc6538 gas/testsuite/gas/alpha/elf-usepv-2.l +a89f678c13ee68633c71d6e4f74d7cd8 gas/testsuite/gas/alpha/elf-usepv-2.s +64b455f29370bedb9edeadf7ad36c07a gas/testsuite/gas/alpha/fp.d +a81ea1f138f93fa0d561f5306bd22a4f gas/testsuite/gas/alpha/fp.s +af2181269d9de10984a7a36f3ce5e01d gas/testsuite/gas/alpha/unop.d +29fe0cde0ac8733c56f2ffef3a1651d4 gas/testsuite/gas/alpha/unop.s +19197f29a6d87e3e78495e7a47ebf496 gas/testsuite/gas/arc/adc.d +1b06ceb2288c093be970d894568fa5da gas/testsuite/gas/arc/adc.s +65084e57125295318062997e920c19af gas/testsuite/gas/arc/add.d +75e6baa15e0d53599edfd7ec770375b6 gas/testsuite/gas/arc/add.s +4927747f607ee7be7bf50e7fd6ef02ee gas/testsuite/gas/arc/alias.d +54f01e033f0d248759b8fc6fb71a06db gas/testsuite/gas/arc/alias.s +b8a7885db402fc70652f0410a5820d50 gas/testsuite/gas/arc/and.d +b8fce093a488f7b1c2e6418f7c31c9e3 gas/testsuite/gas/arc/and.s +161e452c38e82897a52e50c6887e68df gas/testsuite/gas/arc/arc.exp +aa32ccad03a6d294726c0e58e6d2250a gas/testsuite/gas/arc/asl.d +af955c8cf38c553fa4221383c64b6b13 gas/testsuite/gas/arc/asl.s +56384c65539866b6e7fc0a0a05eabce8 gas/testsuite/gas/arc/asr.d +9887c6e68d8176e71d75b9d91604e914 gas/testsuite/gas/arc/asr.s +5288b51666fdc9bb0c65a07671c3c9fd gas/testsuite/gas/arc/b.d +78b81ebb3355a47d5c478e1e56444ffb gas/testsuite/gas/arc/b.s +402522bfb20c4387e1faba27224186ac gas/testsuite/gas/arc/bic.d +ab22388e1552b8926d7b8960f9a6fe20 gas/testsuite/gas/arc/bic.s +ec7abac24fa3c402b31f624a3ff9de77 gas/testsuite/gas/arc/bl.d +e2c237cc25d1cfc82c9285818858e329 gas/testsuite/gas/arc/bl.s +1a8de6cbd6b3c02a2a483c8cd6ce42a7 gas/testsuite/gas/arc/branch.d +8432db29eb95c38348bb4216a28f43a4 gas/testsuite/gas/arc/branch.s +1165c7d246f9e1a548af4c5b7f4e5f60 gas/testsuite/gas/arc/brk.d +872c85cca67988958ef95591b4fecb7d gas/testsuite/gas/arc/brk.s +acf1eca3b061941ff367bba7654f8a2e gas/testsuite/gas/arc/extb.d +0ab2d9abcadcf93d9b6dd8eb0962d7ab gas/testsuite/gas/arc/extb.s +93872b12992b5d2775308c2541723a23 gas/testsuite/gas/arc/extensions.d +8e15242e5c6b199128ef839f8fe14144 gas/testsuite/gas/arc/extensions.s +cb8963efc4b0412d0cf5f6d2d4412d14 gas/testsuite/gas/arc/extw.d +e66a84df62389472e90d215276e87384 gas/testsuite/gas/arc/extw.s +53684f8cb4cc475d5632ffa22555b6c5 gas/testsuite/gas/arc/flag.d +2b6e2dd0335ebc45bb694de8cc2f4c6b gas/testsuite/gas/arc/flag.s +dd35c9020fa1c43318beec05e9d63dd6 gas/testsuite/gas/arc/insn3.d +c9f07db5b59a1a725b1cb520c7dfffe2 gas/testsuite/gas/arc/insn3.s +6623a00a22962dfb1afcb24a2f8920bb gas/testsuite/gas/arc/j.d +7ee6358f55317d08d08f864238c78515 gas/testsuite/gas/arc/j.s +431696fbe85080394483a455208af19c gas/testsuite/gas/arc/jl.d +4a56cf56903f8e4c25dd7865dd1a92df gas/testsuite/gas/arc/jl.s +56a1aeb2d239eb164bc0b0b3570a4d6c gas/testsuite/gas/arc/ld.d +3c857571689df36f20267c10d4eb72c0 gas/testsuite/gas/arc/ld.s +4d7ba9b754c7afdba41dfec82239bc30 gas/testsuite/gas/arc/ld2.d +28379656fb4f5c37963ed6991c582ed6 gas/testsuite/gas/arc/ld2.s +af5c07a06b5ab10049b70efc03fe4310 gas/testsuite/gas/arc/lp.d +657d876ad61daec2d6de3a4269bfeaf3 gas/testsuite/gas/arc/lp.s +0b801348feff41c1625f9c681af122c5 gas/testsuite/gas/arc/lsr.d +a9c2ebcafcfc68a8bb7014172813ee2c gas/testsuite/gas/arc/lsr.s +ae005c091f26b4ceac5b19e8c13d8835 gas/testsuite/gas/arc/math.d +c632e7e9e19d65e75557a5e42d513905 gas/testsuite/gas/arc/math.s +42cc6922491da263d6ab87fca2593794 gas/testsuite/gas/arc/mov.d +5bbe3186d21f23263b4a3743cfb1c0e5 gas/testsuite/gas/arc/mov.s +ff9e23ba171eb9fab4ae4bf71ca1964f gas/testsuite/gas/arc/nop.d +4b5a9a087212c040ef94e7cfc7c64113 gas/testsuite/gas/arc/nop.s +c596ab98be90e4fcdb2e92e35e3ca66f gas/testsuite/gas/arc/or.d +a9984178263c3d2fdc55aa82c0850038 gas/testsuite/gas/arc/or.s +152d55e75d6f7079d969d4582e98e32c gas/testsuite/gas/arc/rlc.d +7186c231f11739791f407f6ad9bfdfcd gas/testsuite/gas/arc/rlc.s +f67f42d8077195a9ed9da2cd3ff93889 gas/testsuite/gas/arc/ror.d +0f4fa90aec1e6518392567bb89d7420f gas/testsuite/gas/arc/ror.s +cce2b1054c09a0d526bc548ea162dc6c gas/testsuite/gas/arc/rrc.d +2a33859e8d1450a314390aee1eed985c gas/testsuite/gas/arc/rrc.s +7d0b42fa66729b4df6f26c5daa47c6ee gas/testsuite/gas/arc/sbc.d +6d4e549168ccb7340e4c87d6c3ca9f06 gas/testsuite/gas/arc/sbc.s +b0ae0aa5baea6246ee417710ad641653 gas/testsuite/gas/arc/sexb.d +e3e0516272a27d4fdde6e78fcfc0beae gas/testsuite/gas/arc/sexb.s +753f0757cceff8d9fba7da206607b32c gas/testsuite/gas/arc/sexw.d +505c87905fe1b3b19909f4ff658880e8 gas/testsuite/gas/arc/sexw.s +04e291c6c4227ad3ea068b33bcca2bee gas/testsuite/gas/arc/sleep.d +4b2c68f86079ddc3738d423a7d9286ec gas/testsuite/gas/arc/sleep.s +dd35c9020fa1c43318beec05e9d63dd6 gas/testsuite/gas/arc/sshift.d +285d03daf381a393d3099a8ff7ad1b92 gas/testsuite/gas/arc/sshift.s +5f8916d2369e1234cb10b4590db13ad9 gas/testsuite/gas/arc/st.d +053f3bbfd1d148584af0a8152d94a93b gas/testsuite/gas/arc/st.s +e913933835012629d5199008027146f4 gas/testsuite/gas/arc/sub.d +beca3fc3b72a58cc4eadd2369592d87f gas/testsuite/gas/arc/sub.s +f2c956a2c8d124cf6924a93a3b18641d gas/testsuite/gas/arc/swi.d +458a27c1ed4ecb3d834bc928af3a1969 gas/testsuite/gas/arc/swi.s +ca575363e502545e2e5d2a6ab64c6af8 gas/testsuite/gas/arc/warn.exp +0b65cbe50ce349cd49a0a24641241d3c gas/testsuite/gas/arc/warn.s +9020b43e63291859faac20e7065787d9 gas/testsuite/gas/arc/xor.d +c1a790a7f1cc4e88b2235b226fae54b2 gas/testsuite/gas/arc/xor.s +b6ee94bbf2780e2c24ebe268b9e3964d gas/testsuite/gas/arm/abs12.d +5d4b47a51fe92bb098297010d6ee2d12 gas/testsuite/gas/arm/abs12.s +db659b6b27540d9316465b1f7e5ac2b9 gas/testsuite/gas/arm/addsw-bad.d +82dc19e00945086993691c92b587faa3 gas/testsuite/gas/arm/addsw-bad.l +079c301370561c6e6e981f81ceb66b79 gas/testsuite/gas/arm/addsw-bad.s +4ef679f3641b0956ed83ba9cd9476c38 gas/testsuite/gas/arm/addthumb2err.d +a784b42ea52c6aaa2e5b00d9bd8eb734 gas/testsuite/gas/arm/addthumb2err.l +497e450fc0d6b17d11be385d97a06776 gas/testsuite/gas/arm/addthumb2err.s +96aa9f595c2e975dbb093e3f28d7540d gas/testsuite/gas/arm/adr-invalid.d +6e268d80f9fe0d48bc5a6700a3fdfeed gas/testsuite/gas/arm/adr-invalid.l +abbb8901aa59685f604c221386d07186 gas/testsuite/gas/arm/adr-invalid.s +12179a5c7ba40ddd7495c98be6679420 gas/testsuite/gas/arm/adrl.d +ecbb507650db5ed7620314d5ca7a13e7 gas/testsuite/gas/arm/adrl.s +a75692b7568cb2128679dbd5d13eb07e gas/testsuite/gas/arm/align.d +b43e7395b9caba63fe7c854672036d5f gas/testsuite/gas/arm/align.s +2ec620b70cb1d5e1d39714a2716820ef gas/testsuite/gas/arm/align64.d +9c1a82dac001eecac15d1101fcc4423e gas/testsuite/gas/arm/align64.s +37497ba60d9a44a935e8038094d3e9c3 gas/testsuite/gas/arm/arch4t-eabi.d +933fbb0cbf2bfa51d2fe96183743a702 gas/testsuite/gas/arm/arch4t.d +8ae0560f8be6f8f105a25e08d52d7921 gas/testsuite/gas/arm/arch4t.s +4040cb5a638a281b3e0e66831c6ad6d0 gas/testsuite/gas/arm/arch5tej.d +2f96d9641db7f61fb556c70c266efde7 gas/testsuite/gas/arm/arch5tej.s +06095b99c1fe7b15a2e7f4e2d4d68fb4 gas/testsuite/gas/arm/arch6zk.d +13ef791859fee922b2d2b2d02a468fb2 gas/testsuite/gas/arm/arch6zk.s +754004fd4a023249bcadfa965d8feb38 gas/testsuite/gas/arm/arch7.d +c0d3a679abf206a062b567c14d4a2488 gas/testsuite/gas/arm/arch7.s +a307c42894f7d574e0b9b8179400c817 gas/testsuite/gas/arm/arch7a-mp.d +f299d0db02f5148af1274d7b1acfa213 gas/testsuite/gas/arm/arch7ar-mp.s +b6c97b686c175781e4e853d017c8d335 gas/testsuite/gas/arm/arch7em-bad.d +f3bd6240c7b580e42201477ea88771cd gas/testsuite/gas/arm/arch7em-bad.l +98fa4d342db3f29a7a17b0f43498849b gas/testsuite/gas/arm/arch7em.d +581e41cc3b06a129704de3794db9e605 gas/testsuite/gas/arm/arch7em.s +24fc10e3da6b7ef78f4b55ee0b0cc2e8 gas/testsuite/gas/arm/arch7m-bad.d +b65df40b5f3e9bda2b19f6bf1fc5dfee gas/testsuite/gas/arm/arch7m-bad.l +4066147fea0f34e61ff20bb3953bbcf6 gas/testsuite/gas/arm/arch7m-bad.s +121de08a231299eb3e817d7386edf5ee gas/testsuite/gas/arm/arch7r-mp.d +07fba8591068aa4bc4fba9b9f1aaed0a gas/testsuite/gas/arm/archv6.d +b78ab7111d67ca2b1dee92635b3a9fb9 gas/testsuite/gas/arm/archv6.s +ca34df0a6bb2d547257d6c708341d4a8 gas/testsuite/gas/arm/archv6m.d +98ea15f6d249e4773d2229e09a2f7516 gas/testsuite/gas/arm/archv6m.s +6d4aa6cb100db3db9437424a4bce6fcd gas/testsuite/gas/arm/archv6s-m-bad.d +d2457d7858ddecb3d78f502f6561b010 gas/testsuite/gas/arm/archv6s-m-bad.l +d28e54c54ab960d6f26f6ab679dec6b6 gas/testsuite/gas/arm/archv6s-m.d +eee02ed70936d7bb837c21c90480dd6c gas/testsuite/gas/arm/archv6s-m.s +3223e9e789e7275d28af65a561ea4f07 gas/testsuite/gas/arm/archv6t2-bad.d +a75344a06d3ba8340cfecd4a0b571ea8 gas/testsuite/gas/arm/archv6t2-bad.l +f5dacfa0fcf2cb53a9fd091240ba1812 gas/testsuite/gas/arm/archv6t2-bad.s +03a60bc117f358d33f56c57b05e588ce gas/testsuite/gas/arm/archv6t2.d +2bfee89072c1c2e798bde7bd4aa79c9a gas/testsuite/gas/arm/archv6t2.s +de3d7b25553b98eb142160c289a939de gas/testsuite/gas/arm/arm-idiv-bad.d +9a628b19a5dbebd1a55a9bf68cde1614 gas/testsuite/gas/arm/arm-idiv-bad.l +a663bedc6462af4dab7527c4716a2f18 gas/testsuite/gas/arm/arm-idiv-bad.s +d40ddbdcb2fbeaca0505b21f2153b67b gas/testsuite/gas/arm/arm-idiv.d +e312caaaa4cd32463ed61a3abaa71fff gas/testsuite/gas/arm/arm-idiv.s +4c258121b00b8b8e31f5fc106160768b gas/testsuite/gas/arm/arm-it-auto-2.d +9f5b000dd66bc7c0db553cb6ce6975e9 gas/testsuite/gas/arm/arm-it-auto-2.s +138f287347c8ed8f01f0e7a77905dcd2 gas/testsuite/gas/arm/arm-it-auto-3.d +291da626dfa21707c7fbd22d8fec0ad4 gas/testsuite/gas/arm/arm-it-auto-3.s +a7c67b1b46b78cd4a635836487e30cbe gas/testsuite/gas/arm/arm-it-auto.d +ca845e1f677a847052f021f47accf21f gas/testsuite/gas/arm/arm-it-auto.s +d2a0cb15941b397e826744db6e57b539 gas/testsuite/gas/arm/arm-it-bad-2.d +e7fba9b31f84364a16bcfe7cbab71d84 gas/testsuite/gas/arm/arm-it-bad-2.l +68a16cb6422527dba38cdd88de01e695 gas/testsuite/gas/arm/arm-it-bad-2.s +edd144194759d0962f3319228e9b48cf gas/testsuite/gas/arm/arm-it-bad-3.d +cc4d24f6d336534b6a1e95e551db5cba gas/testsuite/gas/arm/arm-it-bad-3.l +ca7b84f437267d5b13e2b12cc1ae54cf gas/testsuite/gas/arm/arm-it-bad-3.s +877b73b29ef4ad64c4fee10d4fa9e4ec gas/testsuite/gas/arm/arm-it-bad.d +d5aa4e588ce834c553a20942efe48603 gas/testsuite/gas/arm/arm-it-bad.l +7e4022d4532c03e0c5cb53cec65d46db gas/testsuite/gas/arm/arm-it-bad.s +bae7c0e1fdf04658cdc1e41ddebd46a7 gas/testsuite/gas/arm/arm-it.d +25071337ea823ccebc86e1552ea4fab7 gas/testsuite/gas/arm/arm-it.s +d8370e411dfe323a14c671ac6f8ea3b0 gas/testsuite/gas/arm/arm.exp +8144f94b7fcd31f21441e8953217ccdf gas/testsuite/gas/arm/arm3-bad.d +a7333c25d51cfb1d3071778778ededd9 gas/testsuite/gas/arm/arm3-bad.l +2395435e948692459241f12cbfe49145 gas/testsuite/gas/arm/arm3-bad.s +37fce175e5247e64b0a51485de338c9a gas/testsuite/gas/arm/arm3.d +15137137fbd80fde4552111cbb60d514 gas/testsuite/gas/arm/arm3.s +5bdeeea8d914a577ca5d9a9cdc3c5872 gas/testsuite/gas/arm/arm6.d +9f50b26c97c490fdf7b9eabff9978181 gas/testsuite/gas/arm/arm6.s +55e5246013b06555f68dd4fbfb49954e gas/testsuite/gas/arm/arm7-bad.d +89b8f81e6edb1796a4a94ee97728f6e9 gas/testsuite/gas/arm/arm7-bad.l +91c1460ae10fec6e4df3ddd08f8ecfbf gas/testsuite/gas/arm/arm7-bad.s +186f55175eea9818ccea79b9b3f0ec8c gas/testsuite/gas/arm/arm7dm.d +be6769c4582638a0a138ed06c26168b7 gas/testsuite/gas/arm/arm7dm.s +752aefb5b36f970e207157c2feb64185 gas/testsuite/gas/arm/arm7t.d +feaf27754d47f66044badeec38a0a215 gas/testsuite/gas/arm/arm7t.s +563a746a696663b7084283c9e0af7a80 gas/testsuite/gas/arm/armv1-bad.d +0c9b4e79a9913bf3b81c9d83b9cdaf4b gas/testsuite/gas/arm/armv1-bad.l +f2c6c508b3eea079bc2448b4e5cf4ecc gas/testsuite/gas/arm/armv1-bad.s +07f094e5883aacb59eaa5fdeb3cc4fb8 gas/testsuite/gas/arm/armv1.d +3744f972effa598f45360d9b42e4a2d3 gas/testsuite/gas/arm/armv1.l +f31a9037ea3ee4c5f7694a54d8c0246e gas/testsuite/gas/arm/armv1.s +78a13200ed91875264033ec7536da9d3 gas/testsuite/gas/arm/armv2-mp-bad.d +4da5e2bdf60d3348e5b60c794b52788d gas/testsuite/gas/arm/armv2-mp-bad.l +fb828a5d097f6f7433923c95754d6150 gas/testsuite/gas/arm/armv7-a+idiv.d +780afdeacd939d05ceffd163225d383d gas/testsuite/gas/arm/armv7-a+idiv.s +3a7bd1000ee1d0747bf818c8c5880af3 gas/testsuite/gas/arm/armv7-a+virt.d +882955517e934e3ea6804e23836538df gas/testsuite/gas/arm/armv7-a+virt.s +541f06e01876973f108324d4c226e6d1 gas/testsuite/gas/arm/attr-cpu-directive.d +fc6a0392fa077c3145088ec5b821f335 gas/testsuite/gas/arm/attr-cpu-directive.s +fa3cb637faf7a084161a7fe69bedd151 gas/testsuite/gas/arm/attr-default.d +fb04b73b1d9a4234da4983828806b008 gas/testsuite/gas/arm/attr-march-all.d +63b0f5fcbd66dc6069e8cc6dc93991f3 gas/testsuite/gas/arm/attr-march-armv1.d +cc61127046382229aa35b901418fc379 gas/testsuite/gas/arm/attr-march-armv2.d +91f2a21b5ca1e423ff64e64f33160ac5 gas/testsuite/gas/arm/attr-march-armv2a.d +63e21a67abaf2b4f295bd299b7f3b513 gas/testsuite/gas/arm/attr-march-armv2s.d +a1fa198ed04605444741fb99d6f1c681 gas/testsuite/gas/arm/attr-march-armv3.d +b53a9610847990bf5aa89f2ac51e1eec gas/testsuite/gas/arm/attr-march-armv3m.d +ed35d31f4596bc2cfe5e8ebaec50f425 gas/testsuite/gas/arm/attr-march-armv4.d +ac0aba16b5be6111861562cbb4fe25bb gas/testsuite/gas/arm/attr-march-armv4t.d +9640e4cc7933f0b87c47bb15b358c374 gas/testsuite/gas/arm/attr-march-armv4txm.d +bbfdd8f69dd7fd1a92d91572f9baecde gas/testsuite/gas/arm/attr-march-armv4xm.d +a57afdbada7eb59e41b48f84deb021c0 gas/testsuite/gas/arm/attr-march-armv5.d +97b0e48a0e7a9bc4707868dde7e01e19 gas/testsuite/gas/arm/attr-march-armv5t.d +051e92622b6070bb0ae24059d159549c gas/testsuite/gas/arm/attr-march-armv5te.d +ed499168c185050c4d0a7f37b036b031 gas/testsuite/gas/arm/attr-march-armv5tej.d +94f21aa4318794e018e12f756166adc9 gas/testsuite/gas/arm/attr-march-armv5texp.d +ab5abb426699cb28b7e646dee1638a0e gas/testsuite/gas/arm/attr-march-armv5txm.d +ae9e0983ded40838cef1a5eadbff7090 gas/testsuite/gas/arm/attr-march-armv6-m+os.d +9eb6665a6e31af7178096e3e1b97048f gas/testsuite/gas/arm/attr-march-armv6-m.d +c708c05e4e91fe3fc22f77610265eee6 gas/testsuite/gas/arm/attr-march-armv6.d +734dfd67708486d118585a08cf8d36af gas/testsuite/gas/arm/attr-march-armv6j.d +b0d2fa6ea1e90d04246dc8360937f629 gas/testsuite/gas/arm/attr-march-armv6k+sec.d +e7d2d05ff5b8d8e4f4c4f2d15f766bc3 gas/testsuite/gas/arm/attr-march-armv6k.d +72b9af3cd77fb0253f20d1938170cd0a gas/testsuite/gas/arm/attr-march-armv6kt2.d +9eb6665a6e31af7178096e3e1b97048f gas/testsuite/gas/arm/attr-march-armv6s-m.d +99266a6f30b75e2225db961971646277 gas/testsuite/gas/arm/attr-march-armv6t2.d +7b6b73eb61e074af09192671ea3feb2b gas/testsuite/gas/arm/attr-march-armv6z.d +a4bcf60e13c0518ca9b75d89d538249e gas/testsuite/gas/arm/attr-march-armv6zk.d +1df728cc2ef805f9732475ea016b1a11 gas/testsuite/gas/arm/attr-march-armv6zkt2.d +cd3a7b8b6a92bbaf7155d8872fe0b683 gas/testsuite/gas/arm/attr-march-armv6zt2.d +3fbe27dfe92d3836010f5d8f5ef83063 gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d +9345aecc05f39d01090ce9238d5dd56b gas/testsuite/gas/arm/attr-march-armv7-a+mp.d +722991776f4414db2f3d783310fc9604 gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d +ab75e38ae385c86faee2b7d953cb3069 gas/testsuite/gas/arm/attr-march-armv7-a+sec.d +cdcb7d80bb1cde93b82208e585eccbeb gas/testsuite/gas/arm/attr-march-armv7-a+virt.d +c648eae620c853cb4b64c86bd45f2f79 gas/testsuite/gas/arm/attr-march-armv7-a.d +d3f89e05aff2b152463825c6e503b6fc gas/testsuite/gas/arm/attr-march-armv7-m.d +7c44ba44ecfcc0c1983adaedf9bb5549 gas/testsuite/gas/arm/attr-march-armv7-r+mp.d +02c0c6eb6a1e48395bf58f85edbac8bc gas/testsuite/gas/arm/attr-march-armv7-r.d +eaec858c47ed42167f8bf2e89e22107e gas/testsuite/gas/arm/attr-march-armv7.d +4470e004187b572681718beb32c0f1db gas/testsuite/gas/arm/attr-march-armv7a.d +0f383a32e226d8dccef2e1c3e4971e18 gas/testsuite/gas/arm/attr-march-armv7em.d +3eb27be5e93241b435ea922ef313b9d6 gas/testsuite/gas/arm/attr-march-armv7m.d +292179a0c7aacbeeb1256f0a03dc6dd0 gas/testsuite/gas/arm/attr-march-armv7r.d +fc3efe03cd1e86314fd81ed1a7fb8cf7 gas/testsuite/gas/arm/attr-march-iwmmxt.d +f15a5caa02e46a2cde0f7a561c10a443 gas/testsuite/gas/arm/attr-march-iwmmxt2.d +1406ef71f12ed0f9eb991520c5bda8b6 gas/testsuite/gas/arm/attr-march-xscale.d +a30d929ac6001a5599b7f1d59dc48a15 gas/testsuite/gas/arm/attr-mcpu.d +e4ed90abc4ecd6b11a6e37363cdd1384 gas/testsuite/gas/arm/attr-mfpu-arm1020e.d +83e06b5ada461cd7809ff5868c911f76 gas/testsuite/gas/arm/attr-mfpu-arm1020t.d +f481afac3c919b889fbe961a3cd719f0 gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d +25ee69ad72fbe2160866de3c617394e0 gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d +9974059745134094b759a1d2e9e89c20 gas/testsuite/gas/arm/attr-mfpu-arm7500fe.d +fd27a1c611e63fcfc0ee697124e032b7 gas/testsuite/gas/arm/attr-mfpu-fpa.d +57b7c41aa487cd21d16cdf220ed6d4f8 gas/testsuite/gas/arm/attr-mfpu-fpa10.d +8f22c81f5f456373a96044c41267c310 gas/testsuite/gas/arm/attr-mfpu-fpa11.d +f4f84519f6dcbf2930d26f5f3697369f gas/testsuite/gas/arm/attr-mfpu-fpe.d +0aac60ebb5e8a73ad605d45b33466929 gas/testsuite/gas/arm/attr-mfpu-fpe2.d +c31c8c86be779952692afb539a767b47 gas/testsuite/gas/arm/attr-mfpu-fpe3.d +575331c0545d8fdf02933c810ac51f0f gas/testsuite/gas/arm/attr-mfpu-maverick.d +c7385e6a22effd2a55f1839bc92f98ae gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d +1bff0d55596ed950f222803a72ab92ba gas/testsuite/gas/arm/attr-mfpu-neon.d +3262a3d64b64a047f2bc1189847c3bf1 gas/testsuite/gas/arm/attr-mfpu-softfpa.d +9df122a5f7706a32852fca235ed7da0f gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d +6ce1481a36913cea549ade7f8b45df26 gas/testsuite/gas/arm/attr-mfpu-softvfp.d +6c0f3c9f6bcf4d143312f9a5cea965ac gas/testsuite/gas/arm/attr-mfpu-vfp.d +5e0e7737770429ecfa4d63b7d49aab46 gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d +7fca3ad527115fd92f98bfa7cce285dd gas/testsuite/gas/arm/attr-mfpu-vfp10.d +a5fbea5e73ca65aaf9f740afdd2bad5e gas/testsuite/gas/arm/attr-mfpu-vfp3.d +cdf5a36f3b217983f417ebdc3a1690d5 gas/testsuite/gas/arm/attr-mfpu-vfp9.d +832bf9c511f1c57130382dc12241438a gas/testsuite/gas/arm/attr-mfpu-vfpv2.d +1a4e953ccba7bfbbf6bc5f5ba785c4ce gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d +a061b79bf0f48c6c29ef6eacf3959b03 gas/testsuite/gas/arm/attr-mfpu-vfpv3.d +197eddee7225ddd7c49fadb08ac2af74 gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d +a68615abbe6ebf856b481a518f07e952 gas/testsuite/gas/arm/attr-mfpu-vfpv4.d +61af23e3c095f453e6a4af100b9e84ee gas/testsuite/gas/arm/attr-mfpu-vfpxd.d +030c55b4c16b9aae8b3b6085ff53ffa9 gas/testsuite/gas/arm/attr-names.d +ede62cfb601f53acff505eb51ae3b71c gas/testsuite/gas/arm/attr-names.s +267846050222f0109969dc7754265517 gas/testsuite/gas/arm/attr-order.d +7e50d4600f311abf7cfc8d140b8848df gas/testsuite/gas/arm/attr-order.s +81055a8a658f4820d79c34a626864006 gas/testsuite/gas/arm/attr-override-cpu-directive.d +3e0c9c401d47612961eb7e586be30c68 gas/testsuite/gas/arm/attr-override-cpu-directive.s +66605596219f9d2d2612462c36e91a8c gas/testsuite/gas/arm/attr-override-mcpu.d +11ca779d16cb9160d46a1b1c2d78f048 gas/testsuite/gas/arm/attr-override-mcpu.s +1c96859328f0906342653fc31a296198 gas/testsuite/gas/arm/attr-syntax.d +eba3a515fefda58b152eb5da32e9c118 gas/testsuite/gas/arm/attr-syntax.s +3d673a7cd8ce5c7d9a81c7d77c1cf492 gas/testsuite/gas/arm/backslash-at.d +19dbb71962cdc1a1cc2956e10ea0e088 gas/testsuite/gas/arm/backslash-at.s +03b8acb9ec7015d82d4e1f7c65d17cef gas/testsuite/gas/arm/barrier-bad-thumb.d +0c497896b96b9bc85448e068e0797696 gas/testsuite/gas/arm/barrier-bad-thumb.l +9e1b8e33ef6f57f4235c96bf2c3fef6f gas/testsuite/gas/arm/barrier-bad-thumb.s +84759cddca9e59c2a14260af33c922e3 gas/testsuite/gas/arm/barrier-bad.d +8359d13f1e7e2c543c86d477fb527fb2 gas/testsuite/gas/arm/barrier-bad.l +c8304cea5cd0881c7328c1e0030091e6 gas/testsuite/gas/arm/barrier-bad.s +faa76c01bc8d09471ea97ab43ffa5c96 gas/testsuite/gas/arm/barrier-thumb.d +9856fdfeac538f010e78bb07ca9af627 gas/testsuite/gas/arm/barrier-thumb.s +66f63ac197796c6bfb8c61d92a4555b8 gas/testsuite/gas/arm/barrier.d +053b4ac1535e3fb5ad6b8cf849ddd95b gas/testsuite/gas/arm/barrier.s +233af5c2872f271ed24f36379bfb2cde gas/testsuite/gas/arm/bignum1.d +08269632d864fb311787d7c196186ac6 gas/testsuite/gas/arm/bignum1.s +376a039bac61bd92ae468ba5fed33bb5 gas/testsuite/gas/arm/bl-local-v4t.d +e59eb4b037d361fe5f48e44b495bd373 gas/testsuite/gas/arm/bl-local-v4t.s +1632d9677c2b9800feac355724a3d9dc gas/testsuite/gas/arm/blank.s +9804b9f9e6ef10da5c59b8fb4d4a45b1 gas/testsuite/gas/arm/blx-bad.d +0ab8f09787955cd9db7cade3ffa39ae6 gas/testsuite/gas/arm/blx-bad.s +dede5ad56b863e00e38ff1d45d9130d4 gas/testsuite/gas/arm/blx-local-thumb.l +50af86ab9b358feed8d802d758d1d830 gas/testsuite/gas/arm/blx-local.d +849e424049e3d10e64e125f2e370f822 gas/testsuite/gas/arm/blx-local.l +ff4cfc84703ae62368d353c3dd637989 gas/testsuite/gas/arm/blx-local.s +1905b4a656a3bc94ed7c9a3c70ece91f gas/testsuite/gas/arm/branch-reloc.d +30a90f3df22295b76fd0d6c07a6bf602 gas/testsuite/gas/arm/branch-reloc.l +ca024a3bc15ec962ca2183508ed14cbe gas/testsuite/gas/arm/branch-reloc.s +8c853e4ab689f0984f480b2ef90ed7be gas/testsuite/gas/arm/copro.d +885afce47943c3260e90f272e3ca9d7d gas/testsuite/gas/arm/copro.s +8b6f864d90b4689f2774bf64c2c35347 gas/testsuite/gas/arm/depr-swp.d +86501b7c6a9f0a188a2ade55860d4e41 gas/testsuite/gas/arm/depr-swp.l +a9b7b7c228a4e455b367f46f6d1c513f gas/testsuite/gas/arm/depr-swp.s +2eff9e4757131f1caf54b7a17d810148 gas/testsuite/gas/arm/dis-data.d +3c2bbd856a542eecaa9c1d9da5274465 gas/testsuite/gas/arm/dis-data.s +3e1ab583e626568568bbe18f0f41c06e gas/testsuite/gas/arm/dis-data2.d +4fe3a1cb919bdb5cc446e4677f02906e gas/testsuite/gas/arm/dis-data2.s +39f6a2095349080171660f609e57619e gas/testsuite/gas/arm/dis-data3.d +88147f4bb308accf954ed1bc63bd6ec2 gas/testsuite/gas/arm/dis-data3.s +6dc7105413632ace07999564934492d8 gas/testsuite/gas/arm/eabi_attr_1.d +aecf4a96b2a97e461607c81dfe0751de gas/testsuite/gas/arm/eabi_attr_1.s +f8d9340f61f2fdb2bd272e744c4f0942 gas/testsuite/gas/arm/el_segundo.d +f6b90cae6af764a8e5bf09eac5e3661c gas/testsuite/gas/arm/el_segundo.s +0c77a6a3842652ddcb0c68991a005c49 gas/testsuite/gas/arm/float.d +2e5a285cf87efbbc0d49c33a6148766f gas/testsuite/gas/arm/float.s +9177cdd8a4fdca4319bb40da69225b1e gas/testsuite/gas/arm/fp-save.d +d4c95e405fbe0aa44ce5d25c653c8132 gas/testsuite/gas/arm/fp-save.s +496ad498510e325f684023a10725afda gas/testsuite/gas/arm/fpa-dyadic.d +c9e2422c9042c8e48eb52239a357011e gas/testsuite/gas/arm/fpa-dyadic.s +40f2c330b41c6beb779d8e91016844ca gas/testsuite/gas/arm/fpa-mem.d +52472e5003c4d5792b2b9337482d0bba gas/testsuite/gas/arm/fpa-mem.s +a02c05e2d4ee9c5b17b5674d6ffa4b9c gas/testsuite/gas/arm/fpa-monadic.d +25450ea0b9caf1d0a58522156f083d7f gas/testsuite/gas/arm/fpa-monadic.s +25052a4649e2369f3db0f2e4d3bc5fb1 gas/testsuite/gas/arm/got_prel.d +adf77b53329675daba18c16e17a6520d gas/testsuite/gas/arm/got_prel.s +81063c8368dfd8cab51d3b6c2c5504e4 gas/testsuite/gas/arm/group-reloc-alu-encoding-bad.d +3c1de613f6fd70c6cb782fc4cfb360bc gas/testsuite/gas/arm/group-reloc-alu-encoding-bad.l +a50480226cbe9dc31083468a3871d44c gas/testsuite/gas/arm/group-reloc-alu-encoding-bad.s +c1e41a71bab8330f1b0002b1ac8746e4 gas/testsuite/gas/arm/group-reloc-alu-parsing-bad.d +f31bd62f5be6c7689096ee8ee597846a gas/testsuite/gas/arm/group-reloc-alu-parsing-bad.l +8e6f3055e4e856d4f5089b8bd32d0d96 gas/testsuite/gas/arm/group-reloc-alu-parsing-bad.s +8c10ec7b4769272b544aa7d4a19a2221 gas/testsuite/gas/arm/group-reloc-alu.d +322f8bd2f59eafc92f61844579d1825c gas/testsuite/gas/arm/group-reloc-alu.s +96706c8bc19671f7fb05d1804d432728 gas/testsuite/gas/arm/group-reloc-ldc-encoding-bad.d +0a38c63c4ff9883fcb74b046bf4ef2d8 gas/testsuite/gas/arm/group-reloc-ldc-encoding-bad.l +b51e0a85a2968c0874dd84d70ccc7e98 gas/testsuite/gas/arm/group-reloc-ldc-encoding-bad.s +2e58ab14323fdd088bb5bef0d3a0a903 gas/testsuite/gas/arm/group-reloc-ldc-parsing-bad.d +4095b26ed8e712819b13b4df2398189a gas/testsuite/gas/arm/group-reloc-ldc-parsing-bad.l +a25ae4630bcfe59c637696af6854d906 gas/testsuite/gas/arm/group-reloc-ldc-parsing-bad.s +8725f1debe93e13fbfbf2e35e35ee293 gas/testsuite/gas/arm/group-reloc-ldc.d +e6269dc8201bbc0d7536d63bfc004391 gas/testsuite/gas/arm/group-reloc-ldc.s +fbcc0b9865a919e2e396b609a38b3140 gas/testsuite/gas/arm/group-reloc-ldr-encoding-bad.d +fd7ae9bc38ba6e3c6124177067dcc11f gas/testsuite/gas/arm/group-reloc-ldr-encoding-bad.l +5d039ff31e397f54d48d6657301ddaba gas/testsuite/gas/arm/group-reloc-ldr-encoding-bad.s +817f41a953364ac010a948905bc55a2b gas/testsuite/gas/arm/group-reloc-ldr-parsing-bad.d +8d4a698306b20055783bce14acc999b4 gas/testsuite/gas/arm/group-reloc-ldr-parsing-bad.l +ddad24055724b08d0b2ad0602eeb085a gas/testsuite/gas/arm/group-reloc-ldr-parsing-bad.s +eb70b1e4a002a36f162e5b012444ff22 gas/testsuite/gas/arm/group-reloc-ldr.d +9470afbf4d15b3e6eda76240e041464b gas/testsuite/gas/arm/group-reloc-ldr.s +730f22bb1b759b38fff45191ac10099b gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.d +889183bdab1e768427f23e6054a095b6 gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.l +eb42221f52e86619ffd816975935414d gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.s +eb9637b1b579d11e322701fa993eb5bd gas/testsuite/gas/arm/group-reloc-ldrs-parsing-bad.d +d52a6c83b28c7c5fe61929262035663a gas/testsuite/gas/arm/group-reloc-ldrs-parsing-bad.l +99ea8d19fecacf0ac69265933fdc9b7b gas/testsuite/gas/arm/group-reloc-ldrs-parsing-bad.s +b3c6f63fd853c217c54d4ecab932a357 gas/testsuite/gas/arm/group-reloc-ldrs.d +e1adac14a163b6c09a57e5e540610c59 gas/testsuite/gas/arm/group-reloc-ldrs.s +5e84e674be839da4944a89a6d0b43d0f gas/testsuite/gas/arm/half-prec-neon.d +671c6b51557ad268f30b813b355fd1fb gas/testsuite/gas/arm/half-prec-neon.s +c411716b53a01dd989ea7ba06c94db33 gas/testsuite/gas/arm/half-prec-psyntax.d +67400d0f9dcc456dde55b93afc15852b gas/testsuite/gas/arm/half-prec-psyntax.s +b638d628916e6ec7e535db106186a0ac gas/testsuite/gas/arm/half-prec-vfpv3.d +33a0c3375a31232569556ef4bb009327 gas/testsuite/gas/arm/half-prec-vfpv3.s +9bcdb2621a218c5c985acd6ee22dc539 gas/testsuite/gas/arm/immed.d +6b615b131eba5ce2972ceb7452ffcf46 gas/testsuite/gas/arm/immed.s +9d5b58d931515aa3712ea07723cb7ef6 gas/testsuite/gas/arm/insn-error-a.d +86fc6b9d858e7d60045ec235e5633360 gas/testsuite/gas/arm/insn-error-a.l +78ba3194cd769394c50d38358ce909db gas/testsuite/gas/arm/insn-error-a.s +a8cf1c4ccc5e140c62ace2674871a087 gas/testsuite/gas/arm/insn-error-t.d +05938042b303717249601e3d0fc5f888 gas/testsuite/gas/arm/insn-error-t.l +e1cface84f4bb1ab52fba3267edfd23a gas/testsuite/gas/arm/insn-error-t.s +4314753a593a8f8569c706850062f917 gas/testsuite/gas/arm/inst-po-2.d +948a45af9eb40c1b116c7019e3746a3d gas/testsuite/gas/arm/inst-po-2.l +dc784af9b0779c44cfa0e66530550491 gas/testsuite/gas/arm/inst-po-2.s +2fd671853f73474877a75842379f9fa0 gas/testsuite/gas/arm/inst-po-3.d +c6fff8965f439fed5799239955763fb7 gas/testsuite/gas/arm/inst-po-3.s +354c60051fefa7b07f7afcab0bafa57a gas/testsuite/gas/arm/inst-po-be.d +470252007be8fe8ca94883b7038d29e2 gas/testsuite/gas/arm/inst-po.d +b431e65441371eaa623711974386efbd gas/testsuite/gas/arm/inst-po.s +18a51073b0babf23b798fb78f28d61fd gas/testsuite/gas/arm/inst.d +349fa5f51ab1c1f651b57e3f0ea01bc5 gas/testsuite/gas/arm/inst.s +816fc29be5cded0d14ec4c91f41aae11 gas/testsuite/gas/arm/itblock.s +a4d10ec00b5b2d3bd9e0fd9079586d5d gas/testsuite/gas/arm/iwmmxt-bad.d +daa0e8793b6d0f7a623982b72d481cdb gas/testsuite/gas/arm/iwmmxt-bad.l +0867271152e5ddc12f99cd30be0bcaac gas/testsuite/gas/arm/iwmmxt-bad.s +97be31587023ec827b51c6d7ca8e8c3f gas/testsuite/gas/arm/iwmmxt-bad2.d +9623aa2f5b29fce8cf1c5b3bffad538d gas/testsuite/gas/arm/iwmmxt-bad2.l +0a9b840ecb8d92d33f3fad2172941b36 gas/testsuite/gas/arm/iwmmxt-bad2.s +f43ad375f120bfa6442c845e08f48798 gas/testsuite/gas/arm/iwmmxt-wldsttbh.d +fcd9558879996d3702cca14dfbd7b1c2 gas/testsuite/gas/arm/iwmmxt-wldsttbh.s +07b01bf770dbf7aacf53c7f75486390d gas/testsuite/gas/arm/iwmmxt.d +18ef0fae53b1ae71010419104c5eaaa6 gas/testsuite/gas/arm/iwmmxt.s +a954076b91c04e0a3a1f0d4345ee9dc8 gas/testsuite/gas/arm/iwmmxt2.d +b6a943febc4facd9e1afe4fa4571c946 gas/testsuite/gas/arm/iwmmxt2.s +c24d721909407cb044c8e769590ccfa2 gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.d +7b950dcc29225e439d0b595a80c79d3a gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.l +67dc25ceee7eb17c2aea58410a64e749 gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.d +7b950dcc29225e439d0b595a80c79d3a gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.l +6de11a5b58a4668e3471a70e29905de2 gas/testsuite/gas/arm/ld-sp-warn-v7.d +7b950dcc29225e439d0b595a80c79d3a gas/testsuite/gas/arm/ld-sp-warn-v7.l +78e4de149f463ea430f168956c4d52aa gas/testsuite/gas/arm/ld-sp-warn-v7a.d +f77cb8d2d15aadd8085a43297cf69873 gas/testsuite/gas/arm/ld-sp-warn-v7a.l +7b950dcc29225e439d0b595a80c79d3a gas/testsuite/gas/arm/ld-sp-warn-v7e-m.l +7d3b9164add42b6e99a821b975dd2203 gas/testsuite/gas/arm/ld-sp-warn-v7em.d +5ac7b7bd60e7846be41fc8de4649d42c gas/testsuite/gas/arm/ld-sp-warn-v7m.d +7b950dcc29225e439d0b595a80c79d3a gas/testsuite/gas/arm/ld-sp-warn-v7m.l +0fa4be58d3839f9236503f22605b93a9 gas/testsuite/gas/arm/ld-sp-warn-v7r.d +f77cb8d2d15aadd8085a43297cf69873 gas/testsuite/gas/arm/ld-sp-warn-v7r.l +47f606afeb12c4870368c4d4f9703f42 gas/testsuite/gas/arm/ld-sp-warn.d +7b950dcc29225e439d0b595a80c79d3a gas/testsuite/gas/arm/ld-sp-warn.l +793e9588d044f6b38d86fff098dbccc6 gas/testsuite/gas/arm/ld-sp-warn.s +d187d857a39b9eb1481ab1d06b1e33cd gas/testsuite/gas/arm/ldconst.d +ee73fefc2ff67c1f78695ecfb1e38450 gas/testsuite/gas/arm/ldconst.s +0cf72f9deff31d281b0688b1c51299cb gas/testsuite/gas/arm/ldr-global.d +319d68cf023fde2814a3d38caf5a885a gas/testsuite/gas/arm/ldr-global.s +21364225f78254b49e7b7a4f17b167bf gas/testsuite/gas/arm/ldrd-unpredictable.d +7b3523400eda6b7484d0cd117e593228 gas/testsuite/gas/arm/ldrd-unpredictable.l +8b2cbf9d4cc96cacf061d0f4474c1e34 gas/testsuite/gas/arm/ldrd-unpredictable.s +7dabea78544bbb60309b1361fb10e37b gas/testsuite/gas/arm/ldst-offset0.d +78beecc505302906be4d478b85d739d1 gas/testsuite/gas/arm/ldst-offset0.s +8e4e0b15e93a95859b21dde0b25dde4c gas/testsuite/gas/arm/ldst-pc.d +f179f690e48f680a8faec8acfe29e71f gas/testsuite/gas/arm/ldst-pc.s +1068e8b7a4dcba95cc284038938995ee gas/testsuite/gas/arm/le-fpconst.d +01ece05c7a31cb680e04d26a1f7dc281 gas/testsuite/gas/arm/le-fpconst.s +9819f0435c0c870c8d4da2c16f9c19c2 gas/testsuite/gas/arm/local_function.d +b455c8e8b4fc02b0b05496d453636d4b gas/testsuite/gas/arm/local_function.s +d70f655ff516d305a0992587c4ef9f5e gas/testsuite/gas/arm/local_label_coff.d +d14693fceec9906fb4515a0a2255dd3c gas/testsuite/gas/arm/local_label_coff.s +4335b82228ceb5129fd7f4273a50393c gas/testsuite/gas/arm/local_label_elf.d +6355a44b26e941909f08add117d12aef gas/testsuite/gas/arm/local_label_elf.s +0f5de36e674295930c09c998d4ab690b gas/testsuite/gas/arm/local_label_wince.d +6355a44b26e941909f08add117d12aef gas/testsuite/gas/arm/local_label_wince.s +2bdc7db375674bbd8c962f77c48273df gas/testsuite/gas/arm/macro1.d +f94f70714509c698a85f5bfe10dfc5ae gas/testsuite/gas/arm/macro1.s +e9aaf90da625f89cd911838e6530e8d3 gas/testsuite/gas/arm/mapdir.d +465d0a414219012deb1286bf3a46c4ef gas/testsuite/gas/arm/mapdir.s +e27d4c340486991879dfa8aa7af571e6 gas/testsuite/gas/arm/mapmisc.d +9143f4e8bb70c861dcdb22bb9374e909 gas/testsuite/gas/arm/mapmisc.dat +26b67f2c3bd2569781f276c35c952814 gas/testsuite/gas/arm/mapmisc.s +92d78ef68895b83f71bbdf4a6afd00dd gas/testsuite/gas/arm/mapping.d +b774e08295a0b1ad5b5571f00899b7c1 gas/testsuite/gas/arm/mapping.s +20220f50cd5168155e8365645a681a19 gas/testsuite/gas/arm/mapping2.d +476e62a83b24f546978c98500d9829f2 gas/testsuite/gas/arm/mapping2.s +284d574bec8097e4c941b9ac065dd5af gas/testsuite/gas/arm/mapping3.d +dadc1f13b9721b97d37af5ae0fc2f277 gas/testsuite/gas/arm/mapping3.s +7a947fbd5cc094336fefbcacee93f84e gas/testsuite/gas/arm/mapping4.d +87f3e53a18241b91aa9f2cd87a9a20a5 gas/testsuite/gas/arm/mapping4.s +4ace6eb1a8e0e25e9877810b48c04a38 gas/testsuite/gas/arm/mapsecs.d +def73f8262f150a831c8979059596787 gas/testsuite/gas/arm/mapsecs.s +b7fe5a92a5ca41125668f60c493da6fc gas/testsuite/gas/arm/mapshort-eabi.d +bf0fcfb3cad05fb2f3596e968ed796a0 gas/testsuite/gas/arm/mapshort-elf.d +18760336bebeee857996508148bb9dbd gas/testsuite/gas/arm/mapshort.s +124d543c4a1a0b5d9a4443bf623badf4 gas/testsuite/gas/arm/maverick.c +c838211c7da60d6785efa38fbcab5d0f gas/testsuite/gas/arm/maverick.d +9733817e8baaf48af49d0ed3436c266d gas/testsuite/gas/arm/maverick.s +3eae809452a7e5020933be1912c2a139 gas/testsuite/gas/arm/missing.d +4e5e9ef32c8f8085bd7604edb5b2fc83 gas/testsuite/gas/arm/missing.l +988d5dfbf9639a19495aaf38b36fe41d gas/testsuite/gas/arm/missing.s +e316c8087a5734c802d718ccf7f36445 gas/testsuite/gas/arm/movw-local.d +28e02b70f8f2150a3aa28084aa95caba gas/testsuite/gas/arm/movw-local.s +84615392c85d7406e8f3e4f3ccdc5385 gas/testsuite/gas/arm/mrs-msr-arm-v6.d +5582ca092d910139096f6e784a6f9104 gas/testsuite/gas/arm/mrs-msr-arm-v6.s +6f314f63a905dd252a1ffa63a0df8106 gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.d +9613827c7247508ed08c5a9e0ef82626 gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.l +e7f619829adde372edf6705e5583f2e0 gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.s +bf4626f1c8e2f9a5a95ca3ac2655c2e7 gas/testsuite/gas/arm/mrs-msr-arm-v7-a.d +37decf43db393705954aedf765d8a731 gas/testsuite/gas/arm/mrs-msr-arm-v7-a.s +ba06e835aed08d8f688a57a64270af3e gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.d +c79b16465cbb552f966777db4be05b5f gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.s +9a03994ab61bdb5108ffd3576a876b99 gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.d +0798c38bb4f3640cacbc74b2a520924b gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.l +2de59464eb8191827437c7dc1a805ff5 gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.s +6a0066095176e9b964b326f87d911e44 gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.d +02efdb26a8e03140267ae76985e97ea6 gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.s +6291a36c7f5a52bad759b912f8f9e1d7 gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.d +4eb035fd2d7bcf31a2f250939dcc420c gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.s +6058e50be1984cb4f2b8335d7aa26043 gas/testsuite/gas/arm/msr-imm-bad.d +5cc86bc37d674d6998eccd7d09e18fe1 gas/testsuite/gas/arm/msr-imm-bad.l +d01c65524ef1105873380d5dad846f8a gas/testsuite/gas/arm/msr-imm.d +5cc38bc465b20586d9c07463f4902b5d gas/testsuite/gas/arm/msr-imm.s +e61a3696023e90145d275bf0a194b23c gas/testsuite/gas/arm/msr-reg-bad.d +379de63e81e79399fb07657d0aed60e9 gas/testsuite/gas/arm/msr-reg-bad.l +e7a2d5823eca4708658b3d70c01a8f38 gas/testsuite/gas/arm/msr-reg-thumb.d +c9e26f0d3d2c62175daeb1c6ac26b56f gas/testsuite/gas/arm/msr-reg.d +b1552a60b41600a63c1e968923081170 gas/testsuite/gas/arm/msr-reg.s +11772836f59a495702695b6339fa3b9b gas/testsuite/gas/arm/mul-overlap-v6.d +07bda526d2fcbf45a932337f8e29bb57 gas/testsuite/gas/arm/mul-overlap-v6.s +17fe4133ba0a85c2317831ffb24eeead gas/testsuite/gas/arm/mul-overlap.d +6c63bb3ee5fb4b78431f1317a5efcf74 gas/testsuite/gas/arm/mul-overlap.l +3df6848b00e808f03b76dbd7e9a1c5ce gas/testsuite/gas/arm/mul-overlap.s +8e9ab4429f94a012cd267f99ac69ce36 gas/testsuite/gas/arm/neon-addressing-bad.d +14f6d29877ea48e698e247b59efbcbef gas/testsuite/gas/arm/neon-addressing-bad.l +463003ace658b94c7c699ba21caf97aa gas/testsuite/gas/arm/neon-addressing-bad.s +10af148cf1ee84ed1a4108165d4ca8f4 gas/testsuite/gas/arm/neon-cond-bad-inc.s +43280fbe920432be11fb289a2b472259 gas/testsuite/gas/arm/neon-cond-bad.d +3571b5bf707f406f7576d69865e64524 gas/testsuite/gas/arm/neon-cond-bad.l +ecfa5a8faacbcc2e01ab275cfc4efdca gas/testsuite/gas/arm/neon-cond-bad.s +83bd572087f8783edbe3d1534653eb1c gas/testsuite/gas/arm/neon-cond-bad_t2.d +def57c5740ea4531f07f3d31b2c6ddb3 gas/testsuite/gas/arm/neon-cond-bad_t2.s +2fd46a301d1a952947f37884ba8f3a20 gas/testsuite/gas/arm/neon-cond.d +8646f4f19a10fbd74846ebbfa837ef8d gas/testsuite/gas/arm/neon-cond.s +770e1ae53d7e86878755c333e414175b gas/testsuite/gas/arm/neon-const.d +d4a8874be00b937d6d6dca1870280bca gas/testsuite/gas/arm/neon-const.s +f8fcf3e00228f36e07ba178c6b0a1ff6 gas/testsuite/gas/arm/neon-cov.d +f254fbc9f5f4924ab2d00e6d07d1e312 gas/testsuite/gas/arm/neon-cov.s +49f9699d779171eab1b540d4ad5b7175 gas/testsuite/gas/arm/neon-fma-cov.d +9503397bcd4a9ca5639ca36a4b242583 gas/testsuite/gas/arm/neon-fma-cov.s +d6a975348697afc594f48b52b892b8db gas/testsuite/gas/arm/neon-ldst-align-bad.d +fd0e96b63c05dd5901918a9cabe1c4da gas/testsuite/gas/arm/neon-ldst-align-bad.l +655d7b07a2b3ad09ec2c2f73ef62c42f gas/testsuite/gas/arm/neon-ldst-align-bad.s +210f964a54bb8e56eb26150fbbfaf80d gas/testsuite/gas/arm/neon-ldst-es.d +c01517e689b7c6a3099d7e7374ec1c78 gas/testsuite/gas/arm/neon-ldst-es.s +270689c14f1e09a1299f1aee6c42f8e2 gas/testsuite/gas/arm/neon-ldst-rm.d +4735641e4572ac6285603230a2ab2a8b gas/testsuite/gas/arm/neon-ldst-rm.s +4641629ed10dd7a9cd8b5f6f3e364467 gas/testsuite/gas/arm/neon-logic.d +ac7d622ce54d38f0c8af6c610a71d95f gas/testsuite/gas/arm/neon-logic.s +320af88493f5f00fca7702baaf713eb8 gas/testsuite/gas/arm/neon-omit.d +bbe7f57d3fabe58d17d1ce4a0967add5 gas/testsuite/gas/arm/neon-omit.s +8f82758d0beadda9e60befd90245b39f gas/testsuite/gas/arm/neon-psyn.d +3f378e58bd4cc94bcf47ab8639dcc786 gas/testsuite/gas/arm/neon-psyn.s +68e69dda3b36f2d23614f7eb214b398b gas/testsuite/gas/arm/neon-suffix-bad.d +f359623bc30170386dd676a0d07e9d04 gas/testsuite/gas/arm/neon-suffix-bad.l +23e7a1c60ea019c51f68e82b361684f9 gas/testsuite/gas/arm/neon-suffix-bad.s +09c399798b6f6226bc9392701984d84d gas/testsuite/gas/arm/noarm.d +61d0f35fda0421e8e186264823772ccf gas/testsuite/gas/arm/noarm.l +d49f2e2e554e5254df9e6fcc3fdee549 gas/testsuite/gas/arm/noarm.s +7919d24207a3acde2d7cf13b18c6a1ac gas/testsuite/gas/arm/nomapping.d +98619293650f7b518d3970d82a75702a gas/testsuite/gas/arm/nomapping.s +0155561984bac77cfe907a7166529d2a gas/testsuite/gas/arm/offset-1.d +0049c9a8b74b07c27b17d86bf286e53f gas/testsuite/gas/arm/offset-1.s +2fd68d8a359445574a3003262233736e gas/testsuite/gas/arm/offset.d +9e145924181e4df094b49e8f7408747b gas/testsuite/gas/arm/offset.s +1dd2705e6f363559a8906edb52cd3853 gas/testsuite/gas/arm/pic.d +70da6cc98fe9db2ec3da4610ffa695b6 gas/testsuite/gas/arm/pic.s +7ae6d895867864be78c46c5c71aaa044 gas/testsuite/gas/arm/pic_vxworks.d +f08cd74620ff8ad2e87677969eb1934d gas/testsuite/gas/arm/plt-1.d +10c7bb0182b3ce4fe78482ba8637c3b9 gas/testsuite/gas/arm/plt-1.s +c680ca444b19d490e7c12858000dbae1 gas/testsuite/gas/arm/pr12198-1.d +e8db6b50e9fb5ccb7df673d67fb6c458 gas/testsuite/gas/arm/pr12198-1.s +e2db89380e96cb8c2472aac8d5164853 gas/testsuite/gas/arm/pr12198-2.d +1262c94cb87cf6c3cb6698383546d633 gas/testsuite/gas/arm/pr12198-2.s +7d4d163463af6cf79192ecf628e50907 gas/testsuite/gas/arm/pr9722.d +27f87bc2b727386cd6b95624efbee8fe gas/testsuite/gas/arm/pr9722.s +4f3ba7a55b325bf9dc76be29a6d4af52 gas/testsuite/gas/arm/r15-bad.d +910d4a7c9bdd847365d82f1bce543e44 gas/testsuite/gas/arm/r15-bad.l +e2af0cc3247b8aca95c4032caaf5a395 gas/testsuite/gas/arm/r15-bad.s +d66f544c0118480c42bfa1ad12e3462b gas/testsuite/gas/arm/reg-alias.d +93863da4986b279dd10d2a60d366bccf gas/testsuite/gas/arm/reg-alias.s +f01377397912f2cedecaca64999eaaca gas/testsuite/gas/arm/relax_branch_align.d +ca63a1e30168e872a6b13b634ca29ff0 gas/testsuite/gas/arm/relax_branch_align.s +2221765acd4d7efc589ab8b119dce715 gas/testsuite/gas/arm/relax_load_align.d +2a7bb5938cb16f6928f3282254ce8fb4 gas/testsuite/gas/arm/relax_load_align.s +f80b6ebb48a178284a8eb418c9a70da1 gas/testsuite/gas/arm/reloc-bad.d +d0a219ab37022c81272ec727f7731dec gas/testsuite/gas/arm/reloc-bad.l +6f5d9b6a63406edfdb091d5893710641 gas/testsuite/gas/arm/reloc-bad.s +f4ef829919d79352d5b1baae0bdf2f4c gas/testsuite/gas/arm/req.d +f9da5f85d8187f85ae791f2ade434678 gas/testsuite/gas/arm/req.l +bf2947dcf18be37d50ab6bd60ac3aa2f gas/testsuite/gas/arm/req.s +136216f1dc6cd600f5ecfda9f1ff99de gas/testsuite/gas/arm/shift-bad.d +a7cdc333198864370212d61140ac2bcd gas/testsuite/gas/arm/shift-bad.l +6cba987b724a65c74661976906469ce9 gas/testsuite/gas/arm/shift-bad.s +c7c42ee91268e697ceece089a8e93eb9 gas/testsuite/gas/arm/sp-pc-usage-t.d +1141d6b3988e027b5c4f475150fbda53 gas/testsuite/gas/arm/sp-pc-usage-t.s +a2dc515af8e77f4724ee3790181e6e46 gas/testsuite/gas/arm/sp-pc-validations-bad-t.d +5de68dc2553cc0eec9d27e7977d29ae2 gas/testsuite/gas/arm/sp-pc-validations-bad-t.l +4759d227fd0d11878fc2943998caab95 gas/testsuite/gas/arm/sp-pc-validations-bad-t.s +483a92319c1910ad3b360dde1c651f12 gas/testsuite/gas/arm/sp-pc-validations-bad.d +44bf3d071e4910657aa73f6022bada47 gas/testsuite/gas/arm/sp-pc-validations-bad.l +497cc6a93e7d8ddc37895165108e1c25 gas/testsuite/gas/arm/sp-pc-validations-bad.s +3c2a1f8518fa4c23e18667fd740227a7 gas/testsuite/gas/arm/srs-arm.d +66e9637554bb4f72218c489224be3177 gas/testsuite/gas/arm/srs-arm.l +4648a976a8f5e1699596e256a3ce250d gas/testsuite/gas/arm/srs-arm.s +dd9d9e9bfd3dd04872435e114a543083 gas/testsuite/gas/arm/srs-t2.d +7ca3fbcdc2e993283f6116358dc49a0f gas/testsuite/gas/arm/srs-t2.l +b31115bcc7a52537ca0342a1a266bd61 gas/testsuite/gas/arm/srs-t2.s +6806d45994f0599762653bda12f4807b gas/testsuite/gas/arm/strex-bad-t.d +703980d4ec521843190bbab82eea1500 gas/testsuite/gas/arm/strex-bad-t.l +59db60c267064f3b01d351eabbee0d3f gas/testsuite/gas/arm/strex-bad-t.s +dd0fd7c207d00fa114e7ef7da8268cef gas/testsuite/gas/arm/strex-t.d +1cf69a8a70a52a388c9f9568ec167302 gas/testsuite/gas/arm/strex-t.s +4877f9ab7469bf9117aa5b838ca527a5 gas/testsuite/gas/arm/svc.d +cda65a85f8ee8f5cccc5dbf733e26e2e gas/testsuite/gas/arm/svc.s +bfb711d24a6452e46fba4e2d16673f36 gas/testsuite/gas/arm/t16-bad.d +991c316eeeb58d99db3840461d3f7729 gas/testsuite/gas/arm/t16-bad.l +55ac121d7d32ac4ca72eff5e098bc129 gas/testsuite/gas/arm/t16-bad.s +517c69649f8714920a56bdd12c6ecc8f gas/testsuite/gas/arm/t2-branch-global.d +ec97b7362771c52cce9cff1cddfe4821 gas/testsuite/gas/arm/t2-branch-global.s +8dfd0e82f441b176be452d05d68dac49 gas/testsuite/gas/arm/target-reloc-1.d +feb34688c490e07f5f6c5c13ba0d82f8 gas/testsuite/gas/arm/target-reloc-1.s +9bb4d2487a26e90364475db11862c204 gas/testsuite/gas/arm/tcompat.d +faa87d86afa097cd8816f747da696107 gas/testsuite/gas/arm/tcompat.s +060a1e2e0d34128ffdfb7f9943f2d37c gas/testsuite/gas/arm/tcompat2.d +a24e1db08e35323e4bc5c9f3b2865dea gas/testsuite/gas/arm/tcompat2.s +c20d33cfac995557c3f6160606a66670 gas/testsuite/gas/arm/thumb-b-bad.d +8e6fe776255925819b636d1b13e16070 gas/testsuite/gas/arm/thumb-b-bad.l +bef0f733aa2ebe8d5a78972bdbdb723e gas/testsuite/gas/arm/thumb-b-bad.s +fa606b48f97478a13b73aafda5ad1eb6 gas/testsuite/gas/arm/thumb-eabi.d +878d73a3699f79270d470f11f0b83087 gas/testsuite/gas/arm/thumb-nop.d +d9e9f6a3fd5aeefce3ed1d26a44de904 gas/testsuite/gas/arm/thumb-nop.s +74f88e1fa42785685687ee1221aaca18 gas/testsuite/gas/arm/thumb-w-bad.d +b79db477b5f3017d824b3f6520b0e0a4 gas/testsuite/gas/arm/thumb-w-bad.l +d9d877613eeb9f575af073c4200b56e7 gas/testsuite/gas/arm/thumb-w-bad.s +bfb87e3b0495eccdb975fc9266b515a2 gas/testsuite/gas/arm/thumb-w-good.d +f442cec1a0ed93f8b1b514ebaca215e7 gas/testsuite/gas/arm/thumb-w-good.s +5d64734b41b97cbdfc90c0cd97664b83 gas/testsuite/gas/arm/thumb.d +d9744626acf306931c7a1fa14863d112 gas/testsuite/gas/arm/thumb.s +92ba8d4dc031f0ce87c3b519422d7d58 gas/testsuite/gas/arm/thumb1_unified.d +145492bce7eff0e34f3db6d4074ba8c4 gas/testsuite/gas/arm/thumb1_unified.s +650e79e78f5b009e1babf78b92e996cf gas/testsuite/gas/arm/thumb2_add.d +cc6aac472725e45622aa5069c8595ba5 gas/testsuite/gas/arm/thumb2_add.s +5f8729154bebe0db4413ec3fac600a95 gas/testsuite/gas/arm/thumb2_bad_reg.d +a1da677e3965ee864c11630b1f0c5f08 gas/testsuite/gas/arm/thumb2_bad_reg.l +c1d6e7f9149d704d8d3445318f9b2e86 gas/testsuite/gas/arm/thumb2_bad_reg.s +8f12f48ba7a793f6e6a2f478e468f32c gas/testsuite/gas/arm/thumb2_bcond.d +248a5078599f1f6885f90a9f11048e51 gas/testsuite/gas/arm/thumb2_bcond.s +776810abf75e22776e2fcdcc8f39762f gas/testsuite/gas/arm/thumb2_invert.d +ca60ace6e68f37922d0193a14f4962b0 gas/testsuite/gas/arm/thumb2_invert.s +adb003113b7b7db6630f7036c3941341 gas/testsuite/gas/arm/thumb2_it.d +3417601654a28c87e83aed481d35a28b gas/testsuite/gas/arm/thumb2_it.s +256698e45231962fafaf3de21b279aac gas/testsuite/gas/arm/thumb2_it_auto.d +46e9aa183f311a36def910ba19da47ae gas/testsuite/gas/arm/thumb2_it_bad.d +973b9cf4c477d9aecbffaca70f8860b8 gas/testsuite/gas/arm/thumb2_it_bad.l +5deca957d184efc91f3eb0c6bcb04d0b gas/testsuite/gas/arm/thumb2_it_bad.s +6a8d7056c33b8cd068b89aae7448f043 gas/testsuite/gas/arm/thumb2_it_bad_auto.d +0a2e42584017248fcbe3903ef98f0ac4 gas/testsuite/gas/arm/thumb2_ldmstm.d +937df075b618d6fcd8101cd7c2130cc3 gas/testsuite/gas/arm/thumb2_ldmstm.s +fc3e939191cfdc160da1a6ed571d747f gas/testsuite/gas/arm/thumb2_ldmstm_bad.d +4d0d002b9e10a4635434345fc8978b40 gas/testsuite/gas/arm/thumb2_ldmstm_bad.l +0cc1a9dfc66f9de04db2bb30a99381c9 gas/testsuite/gas/arm/thumb2_ldmstm_bad.s +435c117c9005017199d72237ccbde734 gas/testsuite/gas/arm/thumb2_mul-bad.d +694b47dcde774bd4511a75d51c03e033 gas/testsuite/gas/arm/thumb2_mul-bad.l +903a8ffaa5e442332b3b1a79aef20830 gas/testsuite/gas/arm/thumb2_mul-bad.s +faeff9ef1f517dcbd4fa67b4ab5362f1 gas/testsuite/gas/arm/thumb2_mul.d +0d39993c01d3e40184dcb4b451129901 gas/testsuite/gas/arm/thumb2_mul.s +34e4483f8cf6f967bf6ae42c9eb7a72a gas/testsuite/gas/arm/thumb2_pool.d +b7d8a3446745fcfbb6007aff4c1513e3 gas/testsuite/gas/arm/thumb2_pool.s +7d9305fe723d2a6e6bca2555c9ce9d3a gas/testsuite/gas/arm/thumb2_relax.d +b3aa4e03076cd20cbc79591775bde8c8 gas/testsuite/gas/arm/thumb2_relax.s +31a2b98945ece896be9fac14481330a3 gas/testsuite/gas/arm/thumb32.d +f8b1e727bd11baf8ee45f11d3eb087b7 gas/testsuite/gas/arm/thumb32.l +d0be248198cc7469196f066ae0b4dc66 gas/testsuite/gas/arm/thumb32.s +b781f06f863434629a42d7ece4da1dd7 gas/testsuite/gas/arm/thumbrel.d +381b8be7fa2c2fc62279d1f1c7139d45 gas/testsuite/gas/arm/thumbrel.s +8536c857bc7e3818604337db4408c29c gas/testsuite/gas/arm/thumbv6.d +32c8c68853e9c3714f92d458c22c107b gas/testsuite/gas/arm/thumbv6.s +602b437bcb68889786d1cb4f9de7259c gas/testsuite/gas/arm/thumbv6k.d +7e0e60be4eec0eaf688f4ebded3519a1 gas/testsuite/gas/arm/thumbv6k.s +0ae6d6f5f99f95ee07412df57889d2a0 gas/testsuite/gas/arm/thumbver.d +5c7522af774e96f8d855d83a62490d55 gas/testsuite/gas/arm/thumbver.s +9d0943617b5b1f1d0df8672b6348dbf1 gas/testsuite/gas/arm/tls.d +7645c96c57962ba8a6f43ee029d84b7b gas/testsuite/gas/arm/tls.s +83daaae25c1c59a430e25610b85a87c1 gas/testsuite/gas/arm/tls_vxworks.d +81846b97b286d4da80793bf66783dfa5 gas/testsuite/gas/arm/undefined.d +3e1c1880c7c3b70297d9f4b2abc1c6f9 gas/testsuite/gas/arm/undefined.l +6890516d1ed282bcd8ffe6badad800fe gas/testsuite/gas/arm/undefined.s +c61c8553c23590cad294240c950bc2ab gas/testsuite/gas/arm/undefined_coff.d +381c68d752a39fe3b1c8e2502ae6214c gas/testsuite/gas/arm/undefined_coff.l +7f9bf611638fd7d0d6c831e6ddf5962e gas/testsuite/gas/arm/undefined_coff.s +956183f9e40e5aeb80093622994cb80f gas/testsuite/gas/arm/unpredictable.d +9a6fa12ed030e85078ea708f978159f9 gas/testsuite/gas/arm/unpredictable.s +e6f007ab71c7cd258e23b255eded45d7 gas/testsuite/gas/arm/unwind.d +2d938cd95d98fc257adbed6d744672d0 gas/testsuite/gas/arm/unwind.s +27900faafd9458945db813a9fa712ca4 gas/testsuite/gas/arm/unwind_vxworks.d +33454a43477691a1b3493e7053287e4b gas/testsuite/gas/arm/v4bx.d +3328cf20fd05dff9c4dc40267c5c783d gas/testsuite/gas/arm/v4bx.s +adb88ddc0d65aa2cfb5c13fb798b445c gas/testsuite/gas/arm/vcvt-bad.d +58498e913f66247e663bc80ec46b7848 gas/testsuite/gas/arm/vcvt-bad.l +69d248ecbe3f47b0eb6c25a5d8b6099b gas/testsuite/gas/arm/vcvt-bad.s +b6a84f98e1a19c70ec8ce96888733183 gas/testsuite/gas/arm/vcvt.d +40e340e69bfe1509c317359844e22098 gas/testsuite/gas/arm/vcvt.s +ba5e39f1a0404cf679b2d05556a1cff5 gas/testsuite/gas/arm/vfma1.d +96a659e5f8cb8cc7ec1a210de1c0ab97 gas/testsuite/gas/arm/vfma1.s +814d0fae55d79302ad95e3a713a8baec gas/testsuite/gas/arm/vfp-bad.d +f413ca5d6d3e49dd0a8acf8c2a540003 gas/testsuite/gas/arm/vfp-bad.l +5c94325ced2602ef362e4436113230a2 gas/testsuite/gas/arm/vfp-bad.s +96d08206a5c7bcea2ee723cce0052784 gas/testsuite/gas/arm/vfp-bad_t2.d +bc4cc6a09adc664ab0f7fc0c9a8db159 gas/testsuite/gas/arm/vfp-bad_t2.l +d559b5f5968972a6c28b8618149a9ec9 gas/testsuite/gas/arm/vfp-bad_t2.s +d04af89d25e2bb3b8ede4c77a13dd894 gas/testsuite/gas/arm/vfp-fma-arm.d +6f2e58670d4a8298176c9587b5dc67d8 gas/testsuite/gas/arm/vfp-fma-arm.s +894f31ac6c674cbf59f52dc02488ed8f gas/testsuite/gas/arm/vfp-fma-inc.s +f1a512c9b8271ead5f1d78bfed54f416 gas/testsuite/gas/arm/vfp-fma-thumb.d +7cb6361ba0e917ed9528dc2c8a81a402 gas/testsuite/gas/arm/vfp-fma-thumb.s +43114c92e8b7f44df4e63fe5d3db87fd gas/testsuite/gas/arm/vfp-neon-overlap.d +49ff879adf72e9b977f885f5fae15b43 gas/testsuite/gas/arm/vfp-neon-overlap.s +c711bfc8c023c16fdf54e2df13f11803 gas/testsuite/gas/arm/vfp-neon-syntax-inc.s +a69dac85d469b55d0bc7be7f83394651 gas/testsuite/gas/arm/vfp-neon-syntax.d +0c57087317ef5cd78c4135033f3309af gas/testsuite/gas/arm/vfp-neon-syntax.s +1fa245e852186c3e7958712bcce62b98 gas/testsuite/gas/arm/vfp-neon-syntax_t2.d +1e47784b14f6ff2a614926bea8e0accd gas/testsuite/gas/arm/vfp-neon-syntax_t2.s +55f192542f749e66e6a0762eaa6a9ce9 gas/testsuite/gas/arm/vfp1.d +e82b842fce34cd77d75a4138a4c504c2 gas/testsuite/gas/arm/vfp1.s +2b48069ab63774c5732679d105cab6cf gas/testsuite/gas/arm/vfp1_t2.d +3d0e2f89aeb8c1d2f335b244a5ff26f8 gas/testsuite/gas/arm/vfp1_t2.s +13a06e27e989e572477a33af811bd8b4 gas/testsuite/gas/arm/vfp1xD.d +57aa4bd0017b62016ab6586c12a9e76c gas/testsuite/gas/arm/vfp1xD.s +0f0144d8c16795a1ab7bbe2373c8479b gas/testsuite/gas/arm/vfp1xD_t2.d +1480da2f991c4b2503ac985e90508781 gas/testsuite/gas/arm/vfp1xD_t2.s +50ad9da9954eace7f9b268ddb1f6ee93 gas/testsuite/gas/arm/vfp2.d +bfd6afbdacdf57a886ad9d8530fae3ad gas/testsuite/gas/arm/vfp2.s +b49df4f483e8804f4c41dcdcdfa522ce gas/testsuite/gas/arm/vfp2_t2.d +6a5f0f0ac922d9ebf53fd12ab0085ac1 gas/testsuite/gas/arm/vfp2_t2.s +67d563edfa8e90bcc438603701b8e0f2 gas/testsuite/gas/arm/vfpv3-32drs.d +b4988a9934cfe174162bc72eb0467d52 gas/testsuite/gas/arm/vfpv3-32drs.s +b22944bb7d38947a499cea5dd8475c0d gas/testsuite/gas/arm/vfpv3-const-conv.d +36df2f2463986f5799cb982ce679d2e8 gas/testsuite/gas/arm/vfpv3-const-conv.s +15e911682d91ef19f9418f94e73142aa gas/testsuite/gas/arm/vfpv3-d16-bad.d +7e4f0b5acd8e228fb3428808f82434a3 gas/testsuite/gas/arm/vfpv3-d16-bad.l +23076fd52504b85239ddcbaeef67b5a4 gas/testsuite/gas/arm/vfpv3xd.d +d53650f58020c4cfb2ea155c3c67d92e gas/testsuite/gas/arm/vfpv3xd.s +35e731ac30c173d5fa873f68e522b748 gas/testsuite/gas/arm/vldm-arm.d +770d8810f2fbaa102502be7bb07713e6 gas/testsuite/gas/arm/vldm-thumb-bad.d +dec93ea68b2858b13a7467aeb183e5ae gas/testsuite/gas/arm/vldm-thumb-bad.l +7e21099077fa1a9f5bb5c3aab2b304f0 gas/testsuite/gas/arm/vldm.s +ecd10146f7bb08ad8124934712e30c85 gas/testsuite/gas/arm/vldmw-arm-bad.d +414fdd3db617268d1358b78646daf962 gas/testsuite/gas/arm/vldmw-bad.l +6894e0da633e5dcd9797ef7a78ca72a9 gas/testsuite/gas/arm/vldmw-bad.s +650064cfade1b2d1e0d608e2fbf7e137 gas/testsuite/gas/arm/vldmw-thumb-bad.d +df37ae8d43864e241863e1f6bee8499f gas/testsuite/gas/arm/vldr.d +05c04549362277975864175f7ff8c050 gas/testsuite/gas/arm/vldr.s +870c99417583f480398818773063e6c7 gas/testsuite/gas/arm/vstr-arm-bad.d +e67da15cbbe42f4c32940587dda180cf gas/testsuite/gas/arm/vstr-arm-bad.l +12345b0b2762761ddbd1b17b3fa98fe4 gas/testsuite/gas/arm/vstr-bad.s +f896cdd49e74db069bd1092a8ed74be7 gas/testsuite/gas/arm/vstr-thumb-bad.d +e840d784d5cc8a7e0e62ffc9798ca268 gas/testsuite/gas/arm/vstr-thumb-bad.l +c47643b23f1901bdd93d2addf127fa5a gas/testsuite/gas/arm/weakdef-1.d +3f04291ba97df3690197d442dea32f90 gas/testsuite/gas/arm/weakdef-1.s +e99d7cf8dd682d42b500568dd4ac9936 gas/testsuite/gas/arm/weakdef-2.d +7866a81443ff8b59e62809f3d37d6d8a gas/testsuite/gas/arm/weakdef-2.l +e690017471e4bbc22a86f9106d5ec084 gas/testsuite/gas/arm/weakdef-2.s +6db4b707707184c05cb9883ad84f59b9 gas/testsuite/gas/arm/wince.d +a463e0b33dd0b3291d2af948e4488c30 gas/testsuite/gas/arm/wince.s +80bd281a78ceaa6ecee1a7ce9f11f084 gas/testsuite/gas/arm/wince_inst.d +7030fbdc97a88504e0328ae9fcdd4372 gas/testsuite/gas/arm/xscale.d +66848c515a123077cd3c9ce386e1ff3e gas/testsuite/gas/arm/xscale.s +855a3b9ca08ab38bb1ba350b5d6b6b0c gas/testsuite/gas/bfin/allinsn16.d +ec9bb025ee497292ec861c57d9c6391f gas/testsuite/gas/bfin/allinsn16.s +48601b2595429ff57bac71bff0c1adbb gas/testsuite/gas/bfin/arith_mode.d +411ce7b9c39735181cfe6cb9680f67ed gas/testsuite/gas/bfin/arith_mode.s +288eb007666feec4c962c5dfaa836c9b gas/testsuite/gas/bfin/arithmetic.d +29127b65c16e5e7a549e80c4466786dd gas/testsuite/gas/bfin/arithmetic.s +02b15bae7950f8b4b2ea052633a0bee6 gas/testsuite/gas/bfin/bfin.exp +f596c0af9181f1e480c68fe8f0f2ab9d gas/testsuite/gas/bfin/bit.d +2423a518f5d1c6e3b2c2fa7fbe1f1bfd gas/testsuite/gas/bfin/bit.s +a9379c30f5de60f2caf528071d06e422 gas/testsuite/gas/bfin/bit2.d +058c76d275a75499c86d44115f573d9e gas/testsuite/gas/bfin/bit2.s +c25eac965192a8961a7543bedc3a2730 gas/testsuite/gas/bfin/cache.d +1bd724bb8ff4df410a9a84ee255bb018 gas/testsuite/gas/bfin/cache.s +d4927f98c2c5c1481231dd1e2cfd5781 gas/testsuite/gas/bfin/cache2.d +1ee626769200af147928f53ff095e2da gas/testsuite/gas/bfin/cache2.s +7adc63b3344d644b70239976289bec0e gas/testsuite/gas/bfin/control_code.d +d0bb675fcf4f27f96feb8c518907fcc4 gas/testsuite/gas/bfin/control_code.s +165a574f41080b8c866f7bdee7d62f2f gas/testsuite/gas/bfin/control_code2.d +4893b61f4d42730f53bae9093a06e7fb gas/testsuite/gas/bfin/control_code2.s +f47c6a798720885598d185fd9ea4ef4e gas/testsuite/gas/bfin/error.exp +5298d3a5bf5b960115981f15639302d2 gas/testsuite/gas/bfin/event.d +1a2bfd331853fc647d79a74468708867 gas/testsuite/gas/bfin/event.s +aec157b0fd56eda78f8bfba4fa84368d gas/testsuite/gas/bfin/event2.d +53f030f3469d4890baa352fc9bbaaf23 gas/testsuite/gas/bfin/event2.s +3c84ef5957759be4b82c41c18ca145d5 gas/testsuite/gas/bfin/expected_comparison_errors.l +6635ab1602035b65177208c6d7b2551a gas/testsuite/gas/bfin/expected_comparison_errors.s +4be9fbd5ddb23008fc5bebbc72f78ffa gas/testsuite/gas/bfin/expected_errors.l +8e47d689b926fa65b7032e9926380af7 gas/testsuite/gas/bfin/expected_errors.s +57bdb0129fdeb43e2ff729fec8895765 gas/testsuite/gas/bfin/expected_move_errors.l +e494a66f47146777b7410140f81e77ec gas/testsuite/gas/bfin/expected_move_errors.s +bbfbed204eba7aeedbf9c476c1c7538a gas/testsuite/gas/bfin/flow.d +3fc4e67254243c40ab5e1c25a6a81f63 gas/testsuite/gas/bfin/flow.s +b061426129437b38fef226b646ae1901 gas/testsuite/gas/bfin/flow2.d +09780a8e9ad4e6745f30a8cee292af53 gas/testsuite/gas/bfin/flow2.s +0df70e67b2899a9f7d9188eefe1430d6 gas/testsuite/gas/bfin/invalid_arith_mode.l +89e1cc331f3c9d957fab3cb87a11513a gas/testsuite/gas/bfin/invalid_arith_mode.s +70e77ee318335724f5c33a06f9bc2abb gas/testsuite/gas/bfin/line_number.l +75b3e45d78c9922accca7942cf6e4b0a gas/testsuite/gas/bfin/line_number.s +9f94114d4918da2355c1ebc8af88df49 gas/testsuite/gas/bfin/load.d +d69b6cf2f36e26b037cff1f1cb3ecb3f gas/testsuite/gas/bfin/load.s +2de58b5a2db55ca271c16559debcb882 gas/testsuite/gas/bfin/logical.d +2fe47567e87037449c8434d098bad4ed gas/testsuite/gas/bfin/logical.s +c05cd2663b7b1cbc0b462b5487ae25e3 gas/testsuite/gas/bfin/logical2.d +91fedd260d934e42bac56427b0bb66d9 gas/testsuite/gas/bfin/logical2.s +898ceb71b8b09c5deb2c73a94233f2b4 gas/testsuite/gas/bfin/loop.d +9cb1ef9a91cea1ee05c5fe18f7defa51 gas/testsuite/gas/bfin/loop.s +9e904d074aaaf7a1bb9ca3b5929f8a18 gas/testsuite/gas/bfin/loop2.d +122a6a3789c071346184055570d6e57b gas/testsuite/gas/bfin/loop2.s +52ef261c940962d4442e6ef02d7e724e gas/testsuite/gas/bfin/loop3.d +4e1a44b596f5f6481ad4076406df5c35 gas/testsuite/gas/bfin/loop3.s +f9f09b385cb472027447931e8f0aa68e gas/testsuite/gas/bfin/loop_label.d +7526ada3e63eeb4680573f0c0a0df185 gas/testsuite/gas/bfin/loop_label.s +9c524aea6f6add81b88df552064e15db gas/testsuite/gas/bfin/loop_label2.d +d58d75270dbc8daca3425fd79cf03533 gas/testsuite/gas/bfin/loop_label2.s +82127633d16b7051585bad25006f3c2d gas/testsuite/gas/bfin/loop_temps.d +6c61c744e11ef1952e0618f8081b43f6 gas/testsuite/gas/bfin/loop_temps.s +6b953b46d53958fa7a7ce02232a8f020 gas/testsuite/gas/bfin/misc.d +10be3b7f88b1ebca1ba82749b1da2f5b gas/testsuite/gas/bfin/misc.s +7d7516efd5d3a6f954356e1f3cd42472 gas/testsuite/gas/bfin/move.d +5d2d08592057d077be163c2b155bb0eb gas/testsuite/gas/bfin/move.s +80603951715ce9fd1cdad7a025e8d072 gas/testsuite/gas/bfin/move2.d +777c285afed0e998dca948f5f4945039 gas/testsuite/gas/bfin/move2.s +7df6f331af40c8b717a146de35510c58 gas/testsuite/gas/bfin/parallel.d +01bd82a1d8bdcb4d9dd0de8fc7929b5e gas/testsuite/gas/bfin/parallel.s +f192d3af5c598dfc645553e7e6e996c5 gas/testsuite/gas/bfin/parallel2.d +59d24a38210bb2bcb9900a1693a10c11 gas/testsuite/gas/bfin/parallel2.s +b1b34fd1286a5cbd3009a309f50da7d9 gas/testsuite/gas/bfin/parallel3.d +e03ff8c8eeeb9b9d590c88f3d88b1b38 gas/testsuite/gas/bfin/parallel3.s +c441fbe88c8a366c6f26b3f815606650 gas/testsuite/gas/bfin/parallel4.d +3cc5b04fef0c761a2d8e679f0c47b097 gas/testsuite/gas/bfin/parallel4.s +d95bd8c3417107d37edc20237e101a53 gas/testsuite/gas/bfin/parallel5.s +70aa8fb2636c9fe3e1d0506923efd767 gas/testsuite/gas/bfin/parallel_illegal.d +c4f71443f481e73a9c6b5ad2b0e61271 gas/testsuite/gas/bfin/parallel_illegal.s +e37edaea01e81b1b557030e721b41c25 gas/testsuite/gas/bfin/pseudo.d +1f6139ba7ebdd23bcb8167d4d600ca4b gas/testsuite/gas/bfin/pseudo.s +23c14fe93560edbb13f883506ecf9e8a gas/testsuite/gas/bfin/reloc.d +5057c84be940f533409912ccb929e32c gas/testsuite/gas/bfin/reloc.s +8efd003d71645708cb6062d3ce3cdeb5 gas/testsuite/gas/bfin/resource_conflict.l +139c46683952dad8d3a391c30327721d gas/testsuite/gas/bfin/resource_conflict.s +630be7f8c7f71d6e57e751bf4ba4de9b gas/testsuite/gas/bfin/shift.d +60749a1cc7d1b067aec37959e7581b9d gas/testsuite/gas/bfin/shift.s +0b4419d8ea2648c0d1c5258d9109cab1 gas/testsuite/gas/bfin/shift2.d +82334304cbea2a43feea83a2455b9c5c gas/testsuite/gas/bfin/shift2.s +50addfc0be6b78f58b42e12d0aa54531 gas/testsuite/gas/bfin/stack.d +2c0315e6dc7ff72e7ddd35ec60450354 gas/testsuite/gas/bfin/stack.s +ff3c5e0cdf2bffa239c94495b7a3242d gas/testsuite/gas/bfin/stack2.d +73b5e4051236d15608d6ab20d4dea9c4 gas/testsuite/gas/bfin/stack2.s +a6de01518793db5197c923b41aabf7f1 gas/testsuite/gas/bfin/store.d +ddcfb10fec3bd4b7831493421c881c22 gas/testsuite/gas/bfin/store.s +9d624149b67f74bafd7faa7301549e42 gas/testsuite/gas/bfin/vector.d +aa502219854811389958435e66a260fb gas/testsuite/gas/bfin/vector.s +e0baad2674334925da679897215797a3 gas/testsuite/gas/bfin/vector2.d +4cb6a375f948e1c99ccaf2efdd5d0178 gas/testsuite/gas/bfin/vector2.s +c8ac0cb1b1e5e8f6f80e3808e437ef99 gas/testsuite/gas/bfin/video.d +213f9eea8da19afe265602c0c9b123f3 gas/testsuite/gas/bfin/video.s +fb94a4da1ac483d2879bcc796e329c66 gas/testsuite/gas/bfin/video2.d +f27e1ab75da775e3a2e41c9b00e31296 gas/testsuite/gas/bfin/video2.s +066581f156f1219a1aa97c6160cd66a5 gas/testsuite/gas/cfi/cfi-alpha-1.d +c732145c7ef46cd0a6032f7e2b510061 gas/testsuite/gas/cfi/cfi-alpha-1.s +2b43ab50e2a1d940f42058f251a26d50 gas/testsuite/gas/cfi/cfi-alpha-2.d +7a903b0680f5f68cbb334bcfb8f78418 gas/testsuite/gas/cfi/cfi-alpha-2.s +ff9f9dcd55ee564c573f6d269d66546b gas/testsuite/gas/cfi/cfi-alpha-3.d +fb22d6ffbc03e216af699e438247ab89 gas/testsuite/gas/cfi/cfi-alpha-3.s +6fd2fa86d4b6c8005f8186edf8195cba gas/testsuite/gas/cfi/cfi-arm-1.d +27866105927ba075e08a1df3329c1011 gas/testsuite/gas/cfi/cfi-arm-1.s +4cbc9891a86946b14f7f363f41d2e341 gas/testsuite/gas/cfi/cfi-common-1.d +ff9a79da6f82cdbf3501bcde9eb478f1 gas/testsuite/gas/cfi/cfi-common-1.s +e41e4135e7eb851779802342ade53d51 gas/testsuite/gas/cfi/cfi-common-2.d +4e1d60f8041c1d463b0ab47d28a0b8ed gas/testsuite/gas/cfi/cfi-common-2.s +bf08ba0cf412e0416915142b01bdb8fa gas/testsuite/gas/cfi/cfi-common-3.d +e38a19aa1e2fe664fe714f357ceafb72 gas/testsuite/gas/cfi/cfi-common-3.s +8ccd0d722ce1616e66d6e7cf53e64d24 gas/testsuite/gas/cfi/cfi-common-4.d +d680108d8be37f6a0d454b5622d97001 gas/testsuite/gas/cfi/cfi-common-4.s +257f5c1149eb931d9701c2ec7f81c022 gas/testsuite/gas/cfi/cfi-common-5.d +8b67504e3fc661ce66fd7d54427c4987 gas/testsuite/gas/cfi/cfi-common-5.s +3578dc1e6b6db2bdc2e1176efc159f81 gas/testsuite/gas/cfi/cfi-common-6.d +8a8f9709b68037c0b396fc1031242b8b gas/testsuite/gas/cfi/cfi-common-6.s +da4984a421f8667465e4b54280a3bc0c gas/testsuite/gas/cfi/cfi-common-7.d +6ce2b2eed8afc779c2c773961a874930 gas/testsuite/gas/cfi/cfi-common-7.s +a20cb2990eabbc4a00fde7383f77f52a gas/testsuite/gas/cfi/cfi-diag-1.l +d9aa89632b07c90425d877d2c4fe5f21 gas/testsuite/gas/cfi/cfi-diag-1.s +da3e425a8331d0a520240173284f9c9a gas/testsuite/gas/cfi/cfi-hppa-1.d +812d7ee7b3a8d0670e63df68bf345671 gas/testsuite/gas/cfi/cfi-hppa-1.s +b7da2fc63a9502996bd88622218713a3 gas/testsuite/gas/cfi/cfi-i386-2.d +439b989fe3ccc39f216269684d8ef849 gas/testsuite/gas/cfi/cfi-i386-2.s +58ec6ff31643ced32a6edad1108b398a gas/testsuite/gas/cfi/cfi-i386.d +8425a0b2af627d17ad56297126ec1ff2 gas/testsuite/gas/cfi/cfi-i386.s +c1b5e4bb5a02f6477c17757063a0930e gas/testsuite/gas/cfi/cfi-m68k.d +ce598e227551ae3fb76ac5ec10f1e08d gas/testsuite/gas/cfi/cfi-m68k.s +a1a12c078940cdcf8454152dcc37eb55 gas/testsuite/gas/cfi/cfi-mips-1.d +8a2867da19dc676c9e3b377876b0f31f gas/testsuite/gas/cfi/cfi-mips-1.s +7e1e2f28f4c14c3c387b51691b92c467 gas/testsuite/gas/cfi/cfi-ppc-1.d +023e0a3711f8bdda382cfe17793857c1 gas/testsuite/gas/cfi/cfi-ppc-1.s +9b424e0ffcad66335d6d6c8bdc7b74bd gas/testsuite/gas/cfi/cfi-s390-1.d +b8507466edac4d850cd795fffec14f30 gas/testsuite/gas/cfi/cfi-s390-1.s +b41ed0bc3e45e67e153c8d040a586c8e gas/testsuite/gas/cfi/cfi-s390x-1.d +e4805f533c9d695511947a95cd44f743 gas/testsuite/gas/cfi/cfi-s390x-1.s +26dfe0ef330ce08533f32e18c72fb2ea gas/testsuite/gas/cfi/cfi-sh-1.d +88c8945be2bfa4de0b3c595656da7dec gas/testsuite/gas/cfi/cfi-sh-1.s +430acd77e07efd7adb56b96cffd9fe09 gas/testsuite/gas/cfi/cfi-sparc-1.d +03d5d698bd1714ce01a3bdf90202dfaf gas/testsuite/gas/cfi/cfi-sparc-1.s +f942371542b27947d6163a13ce123cd6 gas/testsuite/gas/cfi/cfi-sparc64-1.d +a1442421e2bf9301a2dd97cb67e7bb6a gas/testsuite/gas/cfi/cfi-sparc64-1.s +faa32ed81d021bd4d67a422db2069d25 gas/testsuite/gas/cfi/cfi-x86_64.d +945303be8742859327c0a797f590c3b8 gas/testsuite/gas/cfi/cfi-x86_64.s +f4850c1c1ffe9cdc75a494f9ff382798 gas/testsuite/gas/cfi/cfi.exp +8fdf465aaf385904a22cebd36470411a gas/testsuite/gas/cfi/reloc-pe-i386.d +53141d8552ddcf94bebfbf40a96b756f gas/testsuite/gas/cfi/reloc-pe-i386.s +6cbd46d2c6b6998cfbc1416c2dcc5986 gas/testsuite/gas/cr16/add_test.d +f67591ac56f7d8fa46b0af785918cf00 gas/testsuite/gas/cr16/add_test.s +3f956abd53e7b9782e157e66d0d174e4 gas/testsuite/gas/cr16/and_test.d +379fc40517c936b62bed28f7901bce6c gas/testsuite/gas/cr16/and_test.s +7d9c505b78a99a457a5cdda77eac7e18 gas/testsuite/gas/cr16/ash_test.d +0cbd8c17535ef10debf411f97977f625 gas/testsuite/gas/cr16/ash_test.s +e17c168e80ba015e19fd1a7124baf7e7 gas/testsuite/gas/cr16/bal_test.d +075c27e1a30eb002f59e0567dab5f8e9 gas/testsuite/gas/cr16/bal_test.s +7e0dfd2f99b9221cadf84abf76f66945 gas/testsuite/gas/cr16/bcc_test.d +d042fa6d08f507db0c8499ce33fd1af1 gas/testsuite/gas/cr16/bcc_test.s +439b60a124267d982b2b0e8cf0cfe40e gas/testsuite/gas/cr16/beq0_test.d +8e9b4ca059bbebc851f7e0bc63b9147d gas/testsuite/gas/cr16/beq0_test.s +10ffafc185b54ca265c5f83acf74890b gas/testsuite/gas/cr16/cbitb_test.d +f43ac50dfcef55cdee7df49759e29169 gas/testsuite/gas/cr16/cbitb_test.s +b6925985b52da977418671bde14bef75 gas/testsuite/gas/cr16/cbitw_test.d +acbc5a7921b1289f9da3b9cb2443dabb gas/testsuite/gas/cr16/cbitw_test.s +00dced57978e1399956b8741e08de14c gas/testsuite/gas/cr16/cinv_test.d +1e040daced19bdf045daadb614911ecf gas/testsuite/gas/cr16/cinv_test.s +c9cf0a7dad44d6c08d269667504c5c57 gas/testsuite/gas/cr16/cmp_test.d +fa1040afb324c21fe1becc32efaebe25 gas/testsuite/gas/cr16/cmp_test.s +d604132229b24aeb339e5218edd2b587 gas/testsuite/gas/cr16/cr16.exp +3fee67a2f1b794ac8992b1b9bd80a02f gas/testsuite/gas/cr16/excp_test.d +f268d7bd4b306dcffb4d1a736c73d1ee gas/testsuite/gas/cr16/excp_test.s +c3e21b8af3492e40c78ed9f3217a8ae5 gas/testsuite/gas/cr16/jal_test.d +a4c88339cbf41a2a648b8add558e6de3 gas/testsuite/gas/cr16/jal_test.s +111aee148b8cab1b4be9bd3e50988329 gas/testsuite/gas/cr16/jcc_test.d +f2cc7af5281128c2becd0b37d355e5a2 gas/testsuite/gas/cr16/jcc_test.s +5f23fd7b8bee081cd454fc97246353bf gas/testsuite/gas/cr16/loadb_test.d +8a58e37d8558992ce9e79f76c6665894 gas/testsuite/gas/cr16/loadb_test.s +5216cd5f7626019cbc7ecc314dfe8a79 gas/testsuite/gas/cr16/loadd_test.d +1c5070569732bb257505e91353af07b7 gas/testsuite/gas/cr16/loadd_test.s +7a274d8efc9b5fcf46388074d94f604c gas/testsuite/gas/cr16/loadm_test.d +4401e7860986aa7df7f32936766412bb gas/testsuite/gas/cr16/loadm_test.s +7c402fbfb6d1d4863cd14e84bfa820be gas/testsuite/gas/cr16/loadw_test.d +73b7f7ebbfbf7ab9063255d54155febc gas/testsuite/gas/cr16/loadw_test.s +609079c80e60aaafb706da43b16d3eef gas/testsuite/gas/cr16/lpsp_test.d +f7f73c4b947ca273d884b115e295dd13 gas/testsuite/gas/cr16/lpsp_test.s +bfcfea13614c1bb6b051ecf3fdea23db gas/testsuite/gas/cr16/lsh_test.d +f081b89311bdc9bfe4ac860bb299e508 gas/testsuite/gas/cr16/lsh_test.s +cfb43cab6c74fcaf0c5befa33e9a3128 gas/testsuite/gas/cr16/mov_test.d +ff5f3527feb5e7f90ce3d62986aa8011 gas/testsuite/gas/cr16/mov_test.s +38d96dbacf46018b5fffeba5bb084502 gas/testsuite/gas/cr16/mul_test.d +a9a379d0eeb9dddf7dbba3b974d9c60e gas/testsuite/gas/cr16/mul_test.s +904b1d9400008b6c623eea3182ed2a2a gas/testsuite/gas/cr16/or_test.d +853bf658ec740a2e9c2a7819dae101ac gas/testsuite/gas/cr16/or_test.s +0d78b6997a1c3d8a22f1bdfa9b632553 gas/testsuite/gas/cr16/pic.exp +e87b687f9789317a5e6e53f538dbc34b gas/testsuite/gas/cr16/pic1.d +d9d5fc12841faee1cf258c4f0f5d5a43 gas/testsuite/gas/cr16/pic1.s +85839a2f7b2dca815908c42acd5d66e4 gas/testsuite/gas/cr16/pic2.d +7acd81620499416cf1261402ea692cd0 gas/testsuite/gas/cr16/pic2.s +9068b2585a4a5f9ceadc882cfb12debe gas/testsuite/gas/cr16/pop_test.d +6552ddd768381fbbf2341834550f3ce1 gas/testsuite/gas/cr16/pop_test.s +36664477c638740562de1eda0b61cdc2 gas/testsuite/gas/cr16/popret_test.d +b306cf2daf9d0524d9a0981b1c39580b gas/testsuite/gas/cr16/popret_test.s +994aa0ee10f2e19ea573b9937a1201c3 gas/testsuite/gas/cr16/push_test.d +05d6aaa617be541a89400ef0c18310ed gas/testsuite/gas/cr16/push_test.s +dc5ed93acc4c6749c8ec64f89ef5b7e8 gas/testsuite/gas/cr16/sbitb_test.d +1d28f8554499bc1827f691671514a227 gas/testsuite/gas/cr16/sbitb_test.s +31848cb4dd1949e493999c46e29f0634 gas/testsuite/gas/cr16/sbitw_test.d +cae0eac1fd3b906e12b4ed54eee0c951 gas/testsuite/gas/cr16/sbitw_test.s +631b33c87ba752b507325aa2894d432c gas/testsuite/gas/cr16/scc_test.d +9e4982ccaabd6401072bf7fd3d57f7ed gas/testsuite/gas/cr16/scc_test.s +94f0142695a3c1490c41d7f3b7df66a5 gas/testsuite/gas/cr16/storb_test.d +1fd9fcbce7a1e73ff5bcca0fd8e117a7 gas/testsuite/gas/cr16/storb_test.s +b1edbea3ed56dcc9e27b2ab790a583e1 gas/testsuite/gas/cr16/stord_test.d +b1172ecdabc7fb9500e1bfd73d8e816f gas/testsuite/gas/cr16/stord_test.s +0b08e39055214b4ae15aaa2194a24a12 gas/testsuite/gas/cr16/storm_test.d +8befd9713334d89aacb0d4882112f6b3 gas/testsuite/gas/cr16/storm_test.s +566c244c7b6af7b87bd11161b10fe15c gas/testsuite/gas/cr16/storw_test.d +7557b2fbf9968d594d76754862590b8f gas/testsuite/gas/cr16/storw_test.s +33e17b2ebadac9ad2e63e732350e3df4 gas/testsuite/gas/cr16/sub_test.d +39087621c7008f2457ec219a5f45307f gas/testsuite/gas/cr16/sub_test.s +ee1c435e9826cd2643f4de5f20f42b75 gas/testsuite/gas/cr16/tbit_test.d +28d4092049100f26e101ec66816fb501 gas/testsuite/gas/cr16/tbit_test.s +109f9d4b6c6d8caa490572f923caa00a gas/testsuite/gas/cr16/tbitb_test.d +28921a7a006d4bbd78764590fb6d8c8d gas/testsuite/gas/cr16/tbitb_test.s +a534687c0dd279e1da4356add0226c4b gas/testsuite/gas/cr16/tbitw_test.d +ed50d410cc3b2d6185c3c7a9f0261df2 gas/testsuite/gas/cr16/tbitw_test.s +060603bb9c6b20292757fa2f26456872 gas/testsuite/gas/cr16/xor_test.d +9d0817f524a9be5302b574b3d6f18df5 gas/testsuite/gas/cr16/xor_test.s +18d4c4bc0430b3c84b2302d30d1dc847 gas/testsuite/gas/cris/abs32-1.s +d37874c6207817f204a1ec750ebb4071 gas/testsuite/gas/cris/addi.d +6ca0c7c8a4113b4ba0224dcdf4e6717d gas/testsuite/gas/cris/addi.s +13a10a503be033d6331a02a0f5ddcc77 gas/testsuite/gas/cris/arch-err-1.s +0d58f43aece3f51c4ca5026fbf555a14 gas/testsuite/gas/cris/arch-err-2.s +b6328fb4babda313830b0972ef82e525 gas/testsuite/gas/cris/arch-err-3.s +45891f0c0c9960eff1a6e2ca99331d0d gas/testsuite/gas/cris/arch-err-4.s +44bfb8b3f93389a8c411433c4bef2597 gas/testsuite/gas/cris/arch-err-5.s +cc7815e98e40d50319297072ed0788d2 gas/testsuite/gas/cris/binop-cmpmove.d +dc1a9682ed0b829d2af27e82ab20cf6c gas/testsuite/gas/cris/binop-cmpmovx.d +cb2d8aeb2cc4a340dbf648056d7c96b3 gas/testsuite/gas/cris/binop-extx.d +af929eb0019e7cde018a6d96e2c61325 gas/testsuite/gas/cris/binop-segref.s +725914dadc2fa064588b802c4dd23a15 gas/testsuite/gas/cris/binop.d +ce4e65752cd8c2657ef0b10cbcc00cde gas/testsuite/gas/cris/binop.s +5d7c80786055352c3129a6d9a6e3e6ff gas/testsuite/gas/cris/bork.d +67a42ca84f31bc333b785695009221fa gas/testsuite/gas/cris/bork.s +358f933cba6c213ef32385fbf17c89e1 gas/testsuite/gas/cris/bound-err-1.s +6b30f687aeb97de2c6d8cea516cd0351 gas/testsuite/gas/cris/branch-warn-1.s +0175c9f81673cc5d7f46599955bf7450 gas/testsuite/gas/cris/branch-warn-2.s +4358a854465b2097d3ee3f0161f65343 gas/testsuite/gas/cris/branch-warn-3.s +4c86b005ec93ad9aeca855715e595f75 gas/testsuite/gas/cris/branch.d +caff7842b5ef92ca805daf6782c1e414 gas/testsuite/gas/cris/branch.s +37e147e4eb514712f5b6f1ce74aaf2fb gas/testsuite/gas/cris/break.d +700be97c0689c4196f0da1842abcc231 gas/testsuite/gas/cris/break.s +67c29fc0a9c79da821c266dbda7689a0 gas/testsuite/gas/cris/brokw-1.d +c5755e65bfd257cc35eaa9cc22206a73 gas/testsuite/gas/cris/brokw-1.s +55ea6801fc6ab67be7d04335d28945bd gas/testsuite/gas/cris/brokw-2.d +fbe8c57fd8caa459cbd13aed974c0a08 gas/testsuite/gas/cris/brokw-2.s +cc16707dcac40b6e6acc5ef6ba5f99ae gas/testsuite/gas/cris/brokw-3.d +c59672ea2393738a93f000bf6a4f3dd2 gas/testsuite/gas/cris/brokw-3.s +cee1b959c4e6aa2fb7315c5713d1ba97 gas/testsuite/gas/cris/brokw-3b.s +fe98cec7789da4690999c41bcdb2d451 gas/testsuite/gas/cris/bwtest-err-1.s +7557d9513e8793d9d57b3d235f504e1c gas/testsuite/gas/cris/ccr.d +93770cdb47d3463657e205bd0fe81db4 gas/testsuite/gas/cris/ccr.s +381a9ab58435188056b2f25d7ba4357c gas/testsuite/gas/cris/clear.d +73e539453e3fd4bd9b6d8993f6552a3c gas/testsuite/gas/cris/continue.d +dd8c355ecfa0c88d8d0269609f26da37 gas/testsuite/gas/cris/continue.s +8194dd2f54a3ec0c012e0dde97171ee1 gas/testsuite/gas/cris/cris.exp +69fc8204a5ff36146165b8fc3fcea2ac gas/testsuite/gas/cris/diffexp-ovwr.d +a4827654925418a4a48b98595a402e1c gas/testsuite/gas/cris/diffexp-ovwr.s +3e68a25e4fbaee80f92c36b18f617872 gas/testsuite/gas/cris/fragtest.d +ac5f31bfb9b56f6b73e251468db85eb0 gas/testsuite/gas/cris/fragtest.s +dbcb23737c31ce04080a64583b5aa301 gas/testsuite/gas/cris/jump-type.d +35785b12fb4af7d06e1cb6c176b8d6ff gas/testsuite/gas/cris/labfloat.d +193f9aaf255857e1897a82b483b021f9 gas/testsuite/gas/cris/labfloat.s +81585babaad1f52261151015eb4a967b gas/testsuite/gas/cris/macroat.d +c4213b954433bf3aba530e1d0ae31294 gas/testsuite/gas/cris/macroat.s +ca9c91017df6f851be9fd90a69375669 gas/testsuite/gas/cris/march-err-1.s +33a5f03480ba14f340dbc635a8d03805 gas/testsuite/gas/cris/march-err-2.s +b1aed83f188faca64b30a3ea17ed25a7 gas/testsuite/gas/cris/movem-to-reg.d +16167885542a9a27143ec29a7f6d3e9d gas/testsuite/gas/cris/mulbug-err-1.s +d6c6f41d90618cfbc9a6906bc01154c1 gas/testsuite/gas/cris/nosep.d +3130381f901b0e035d9db56d3cd4a6d4 gas/testsuite/gas/cris/nosep.s +34c9d4996bda0af5eff68b50336fe1c8 gas/testsuite/gas/cris/oneop-type.d +ccb7110d35badd69f9adff1c71bbc08a gas/testsuite/gas/cris/operand-err-1.s +54190a464de7bc0ea25278f3e116ca6b gas/testsuite/gas/cris/pic-err-1.s +a9b04aa6510e199b61e3b6d29435a261 gas/testsuite/gas/cris/pic-err-2.s +a6c8fcd3276be85611bc7139abeb9a31 gas/testsuite/gas/cris/pic-err-3.s +4dc221a639f050b33118fee5c2ece649 gas/testsuite/gas/cris/prefix.d +19af9d100ff80d76593ca93c4119da01 gas/testsuite/gas/cris/prefix.s +b6aab04b800fd6556fbc8a45196fdbfb gas/testsuite/gas/cris/push-err-1.s +b52036a4d66575a330aee0806c2d3331 gas/testsuite/gas/cris/push-err-2.s +bd84b062c31622e8a00f627566c4e5bc gas/testsuite/gas/cris/pushpop-byte-sreg.d +99abd207ab982e6c4b5c538faff1493d gas/testsuite/gas/cris/pushpop-dcr1-sreg.d +03b76091d17405f7658174e77dce71fc gas/testsuite/gas/cris/pushpop-dword-sreg.d +022fee8710dcfd4dfb14d06be1cd7a68 gas/testsuite/gas/cris/pushpop-word-sreg.d +61a4f6c943509667980199db013817f7 gas/testsuite/gas/cris/pushpop.d +1ffbba2b760c1b6319dbc869060db0e4 gas/testsuite/gas/cris/pushpop.s +b7370a2013b7307040d9751520a13165 gas/testsuite/gas/cris/pushpopv32.s +8ac4149babbed9ae66a40db6ebe094a0 gas/testsuite/gas/cris/quick-s6.d +f5b3264bade3e45e54ceea8d9df00c5c gas/testsuite/gas/cris/quick-u5.d +2c932ddd6929e90f4a4780ea206b0207 gas/testsuite/gas/cris/quick-u6.d +aee73b1e0d6b950ee94745e9bc1d8586 gas/testsuite/gas/cris/quick.s +d199c4beca07600cd7ff05108419cc5e gas/testsuite/gas/cris/range-err-1.s +f4b1aa0daf09ff6d724794cbf97c2a31 gas/testsuite/gas/cris/range-err-2.s +87654b9172aa966303b7116981c57228 gas/testsuite/gas/cris/rd-abs32-1.d +fbbb8706b858763ee74eea38dae8ede4 gas/testsuite/gas/cris/rd-abs32-2.d +b06fd1821a11ee736fc8b0420aef36b7 gas/testsuite/gas/cris/rd-arch-1.d +41e1008449e9ce91acbeb34a4e6df586 gas/testsuite/gas/cris/rd-arch-2.d +3b9c63265d7fac6d6907b5dc38d34102 gas/testsuite/gas/cris/rd-arch-3.d +38de3a7dfccae7982fca66e5b07d1e7e gas/testsuite/gas/cris/rd-bcnst-pic.d +bb3d776febb87e96a08c591167f933d2 gas/testsuite/gas/cris/rd-bcnst.d +887cfb53bfffd62076d06c51c121e50a gas/testsuite/gas/cris/rd-bcnst.s +53d39e9f53e7244e5ab6634b4a50e038 gas/testsuite/gas/cris/rd-bcnst2-pic.d +1f40d077f9fb34cd31a87dd4310267fa gas/testsuite/gas/cris/rd-bcnst2.d +a41f2e43b3dc0bef72079de14608e205 gas/testsuite/gas/cris/rd-bcnst2.s +80e0dd503723bf9da8cbcceb422486bf gas/testsuite/gas/cris/rd-bkw1b.d +cbd7e8f5a14aaa74c7fb0fd5fb97dbcd gas/testsuite/gas/cris/rd-bkw2b.d +02ae58e3a53206f358a097f86db4d126 gas/testsuite/gas/cris/rd-bkw3b.d +24897332d26e514248bb5c8fe03ea80b gas/testsuite/gas/cris/rd-bkw4.d +d6d4622ed39bab9a08a0d0fdef6331df gas/testsuite/gas/cris/rd-bkw4.s +1a845c01bef1653f34626e530e307df4 gas/testsuite/gas/cris/rd-bkw4v32.d +b0e882cf4dc19eeeb123f9ac9fe8b9fc gas/testsuite/gas/cris/rd-bkw5.d +f8bd6023b56ddb4c793ffd742c2120d0 gas/testsuite/gas/cris/rd-bkw5.s +e444bb4d029956336aa111b822e9b189 gas/testsuite/gas/cris/rd-bkw5b.d +80b267bd21347bdfe9c86ca92ac28a53 gas/testsuite/gas/cris/rd-bkw5bpic.d +9ff6aa17de0ec6788d228b83d3758899 gas/testsuite/gas/cris/rd-bkw5bv32.d +4aefdc218caac8de36190a5494e1d554 gas/testsuite/gas/cris/rd-bkw5bv32pic.d +47a06af17ec80399820a8f657a213ef4 gas/testsuite/gas/cris/rd-bkw5pic.d +02adeedd3fad5082488198eb80a46ff0 gas/testsuite/gas/cris/rd-bkw5v32.d +3a75b30844c91863959b9a000f4454ca gas/testsuite/gas/cris/rd-bkw5v32pic.d +8fedf55754c77ebf28dad9da1f3bd537 gas/testsuite/gas/cris/rd-bound1.d +7e268acd25fd255f6fdac6b3aef9e2e7 gas/testsuite/gas/cris/rd-bound1.s +b718a753c99bd3535fd596957d5c0a29 gas/testsuite/gas/cris/rd-bound2.d +5a62aa3561a6210f53284a44f43854bd gas/testsuite/gas/cris/rd-bound3.d +c15f1340900e4aa4b0b9dfbf6040d603 gas/testsuite/gas/cris/rd-bound4.d +6cb9399f4097d45bf385f6262b67cf78 gas/testsuite/gas/cris/rd-branch-pic.d +aeeee72d47d9613e56027bea53449559 gas/testsuite/gas/cris/rd-break32.d +dbf7c5b8495ec0752f6ac21ddfcc63c6 gas/testsuite/gas/cris/rd-brokw-pic-1.d +4333de46ebccc54fda3e915e68786e0b gas/testsuite/gas/cris/rd-brokw-pic-2.d +77fc8d4f667372a41674a464a69ad830 gas/testsuite/gas/cris/rd-brokw-pic-3.d +2a43ca4c7bc216eb3a15a2b4b3eca0de gas/testsuite/gas/cris/rd-dtpoffd1.d +73ec340e175057c968836d75d36e9331 gas/testsuite/gas/cris/rd-dtpoffd1.s +f883d81fdb8a7d818e7773cbce82d731 gas/testsuite/gas/cris/rd-dw2-1.d +b840a286e39f0e9d98c77a3779bbb012 gas/testsuite/gas/cris/rd-dw2-10.d +469e8c9e4f6d2895184bb8b93cad1918 gas/testsuite/gas/cris/rd-dw2-11.d +d9be8f970588936acb1cc79984f2e24c gas/testsuite/gas/cris/rd-dw2-12.d +4203f32173310ca98c76585f571fff6d gas/testsuite/gas/cris/rd-dw2-13.d +9ada8fdf55f357d6eb37784821650ecb gas/testsuite/gas/cris/rd-dw2-14.d +bee6f173d0fb62f25524bcf086c444c2 gas/testsuite/gas/cris/rd-dw2-15.d +4de38ba6681210cc01ccd89bf7f24643 gas/testsuite/gas/cris/rd-dw2-2.d +99b844d0272174dc06ccfa5e27202251 gas/testsuite/gas/cris/rd-dw2-3.d +8a39a4a868db728fc820f78d73059ff5 gas/testsuite/gas/cris/rd-dw2-4.d +89faabe6c550c0248f1a42c0696f8bcb gas/testsuite/gas/cris/rd-dw2-5.d +4f3b242744fb959fcb9e929fef31b871 gas/testsuite/gas/cris/rd-dw2-6.d +1f18d3943be18bc19124a6fef9b62416 gas/testsuite/gas/cris/rd-dw2-7.d +83bc68a39958ef6bb9d3e546a2d962cf gas/testsuite/gas/cris/rd-dw2-8.d +b007b686949c2a85642fb3c7560d713d gas/testsuite/gas/cris/rd-dw2-9.d +dd4c2072ef204f706d33f37b94ae1dca gas/testsuite/gas/cris/rd-fragtest-pic.d +0c92a0ee53d0e2068874cebbed63046b gas/testsuite/gas/cris/rd-mulbug-1.d +ea81ec94bfbecb645cccaa9c380070b2 gas/testsuite/gas/cris/rd-pcplus.d +fa2429278ecbfd6c9c99686de916d5b7 gas/testsuite/gas/cris/rd-pcplus.s +e30f7a5b9965662525c1c642c2a98895 gas/testsuite/gas/cris/rd-pcrel1.d +02ca0e5e43a7c43024f98ee7db1e7957 gas/testsuite/gas/cris/rd-pcrel1.s +1d7701543665de7bac283a25ca3a6cd5 gas/testsuite/gas/cris/rd-pcrel2.d +f634c6fbd3de5d44a40b1ecb80f5029f gas/testsuite/gas/cris/rd-pcrel2.s +abdd4fe964370e37e0b84586ed7ed513 gas/testsuite/gas/cris/rd-pic-1.d +ccf5b33dcc1af17dea262cf4412b6a7c gas/testsuite/gas/cris/rd-pic-1.s +9997d9085ed3b90ecc7ce23efd068a31 gas/testsuite/gas/cris/rd-pic-2.d +315455e9aa9c47febc500f958bdb9c4b gas/testsuite/gas/cris/rd-pic-2.s +4b6b67d7cdf2d0f9d58ef94e0b27eb14 gas/testsuite/gas/cris/rd-ppv1032.d +f0f81cdede11543b30a1c53ea71c78a7 gas/testsuite/gas/cris/rd-ppv32.d +60be0bff36db7d7930a178b2deeb8f2e gas/testsuite/gas/cris/rd-regprefix-1.d +483b2b941bdac034989505d636c292bb gas/testsuite/gas/cris/rd-regprefix-1.s +1d2c07c7a5bee4af6856d5221f15dae0 gas/testsuite/gas/cris/rd-regprefix-1b.d +5b25b42b26ce4de5bb0452260411806c gas/testsuite/gas/cris/rd-spr-1.d +bc96a6e23e68c6999716695ea7a5de9c gas/testsuite/gas/cris/rd-spr-1.s +e6412235713caed6efc0c2fa5e90041c gas/testsuite/gas/cris/rd-tls-1.d +2e691298af3f23a0107fedf627cca844 gas/testsuite/gas/cris/rd-tls-1.s +5a05716ff82e7bbeb15f8f3425874c36 gas/testsuite/gas/cris/rd-tls-2.d +4200c07d3f74e0618ff211e1c63c70b2 gas/testsuite/gas/cris/rd-tls-2.s +54359bda6ad5b54ac8da19cf65849a97 gas/testsuite/gas/cris/rd-usp-1.d +4f9127ae060ba8216e152ef0c71c9645 gas/testsuite/gas/cris/rd-usp-1b.d +7d2796d5da74d021533e3c535893a004 gas/testsuite/gas/cris/rd-v10_32o-1.d +9e419f5ca2442c3c2f0fdc758cddd4f6 gas/testsuite/gas/cris/rd-v10_32o-2.d +141e2cc83b0c4d18262f3f7e5d83034a gas/testsuite/gas/cris/rd-v10_32o-2.s +c17b6c607d61d7e88dc9e85bd4e1eae2 gas/testsuite/gas/cris/rd-v32-b1.d +583d342f4ba5db90881fa7ae5db515b9 gas/testsuite/gas/cris/rd-v32-b1.s +d33ef2b6c1ae0e563ea77429a5b24a03 gas/testsuite/gas/cris/rd-v32-b2.d +d75bc4a3b0511679908c915c1bf5abd1 gas/testsuite/gas/cris/rd-v32-b2.s +2ad59b2c6c8fd6b7a76fefcb8da58368 gas/testsuite/gas/cris/rd-v32-b3.d +54dc335e99beee975da87ea6aea85343 gas/testsuite/gas/cris/rd-v32-b3.s +e5241edc51b574e736936eb11fc960ac gas/testsuite/gas/cris/rd-v32-f1.d +5a84f8fc85efcbcd6d552b383ba26b93 gas/testsuite/gas/cris/rd-v32-f1.s +199f57615b3169a9c21c729443e7df42 gas/testsuite/gas/cris/rd-v32-i1.d +35d23542a164995c117645d63cdcd8ce gas/testsuite/gas/cris/rd-v32-i1.s +83b9630e3e01575a01c820893180a62b gas/testsuite/gas/cris/rd-v32-l1.d +df1a8ccf1739f6c6fcbcadbbd194eee7 gas/testsuite/gas/cris/rd-v32-l1.s +496c90e0064eefa0cc3b13fa015aab88 gas/testsuite/gas/cris/rd-v32-l3.d +de3970326a5fc8c860a8229120a69b38 gas/testsuite/gas/cris/rd-v32-l3.s +3b2607477ce580eeb6d97109aec5ceb9 gas/testsuite/gas/cris/rd-v32-l4.d +a1709ba73388e4291e6b5ad8fa0f3fd0 gas/testsuite/gas/cris/rd-v32-l4.s +d5560ad66ae450b2ae04c8dd91dce5b4 gas/testsuite/gas/cris/rd-v32o-1.d +036b3afb258126aa97cf84ae4b737da9 gas/testsuite/gas/cris/rd-v32s-1.d +82aaa096d5b7276e9724221f3e4d9432 gas/testsuite/gas/cris/rd-v32s-2.d +584be3722f0da53d19568ff08b380304 gas/testsuite/gas/cris/rd-v32s-2.s +65e72621ee681a2f3a439b65c6e2a6bf gas/testsuite/gas/cris/rd-v32s-3.d +c06fa82f8e9e3be58811ce113dd36258 gas/testsuite/gas/cris/rd-v32s-3.s +417cf8983da991dbfbc61613c962e09d gas/testsuite/gas/cris/rd-v32s-4.d +f390e89de781fbc35861705fc43dbba1 gas/testsuite/gas/cris/rd-v32s-4.s +db856e6fc4ae72ab654b0c4f895fe4f3 gas/testsuite/gas/cris/rd-vao-1.d +5f67e0e704f6ce290303f00d51ef7c55 gas/testsuite/gas/cris/reg-to-mem.d +c36b1354d494fa3d14e0f53cbdad14d1 gas/testsuite/gas/cris/regprefix-err-1.s +a523421fc87b21ff25f964a228e6aac2 gas/testsuite/gas/cris/regreg.d +8763ceed68b5ad9786d5bb3f89360751 gas/testsuite/gas/cris/regreg.s +f0fc22a773b1b891a2606a280254433f gas/testsuite/gas/cris/return.d +618b1c16f597a8c927d63668befe360c gas/testsuite/gas/cris/return.s +b8f8d6862937a6279c42fa72c492b792 gas/testsuite/gas/cris/scc.d +41907f8e76731a8a8f634b2051a7ba39 gas/testsuite/gas/cris/scc.s +590ff33c1d17500de6e318d5c5cc182e gas/testsuite/gas/cris/sep-err-1.s +fa730ce7e78cb91f38aba30b04251950 gas/testsuite/gas/cris/sep-err-2.s +3a91d88ae724651f642323a1028dfe19 gas/testsuite/gas/cris/sep-err-3.s +951d228072201ef134c86189dd1e39cd gas/testsuite/gas/cris/separator.d +e929807163f06ba801c4d3d98eef047a gas/testsuite/gas/cris/separator.s +4ed019e17046994aef096b29d48b679c gas/testsuite/gas/cris/shexpr-1.d +b75dd310987e66aa243a2bdffc008924 gas/testsuite/gas/cris/shexpr-1.s +0b4ab8bdfecfb175308776f1b30f9267 gas/testsuite/gas/cris/sreg-to-x.d +79761ddc12c3f3bd14ed8b6133fd670f gas/testsuite/gas/cris/string-1.d +ba96569c4c3a69683f9eda2f2e804ac9 gas/testsuite/gas/cris/string-1.s +9580648fead8dc356cede71f7bfaae5b gas/testsuite/gas/cris/string-2.d +6ddd84549c2ae105a7ffc9e339d1e37e gas/testsuite/gas/cris/string-2.s +8976b9e2fc8cf3b2f9f2237caaf79ffd gas/testsuite/gas/cris/test.d +302d72eb4daf587198a5ff031318e6c3 gas/testsuite/gas/cris/tls-err-1.s +1531b311c51a36060dafd267f0b96d40 gas/testsuite/gas/cris/tls-err-2.s +979a0fe73b3772a60d9af523acb7079a gas/testsuite/gas/cris/tls-err-3.s +52f4d98cdb0aaf81048821675acc4381 gas/testsuite/gas/cris/unimplemented.d +9ff0ef66a3c7733fd200cc4317d56ad7 gas/testsuite/gas/cris/unimplemented.s +4fa062b6659daef0d47160ec64bd62a5 gas/testsuite/gas/cris/unop-mem.d +65f2499748e491be121588287a7f3e05 gas/testsuite/gas/cris/unop.s +75063b64ce4c7ce0ccb58e946587b1fb gas/testsuite/gas/cris/us-err-1.s +57983a53289a7da6c1ed399d7fe0a3e9 gas/testsuite/gas/cris/us-err-2.s +89b77f3261be6a0b6f7c2117ec573b35 gas/testsuite/gas/cris/us-err-3.s +f6b7268bebfffff3bedd6745403a94ad gas/testsuite/gas/cris/v32-err-1.s +8d4065621889f2c0f5030cb4a935ba0a gas/testsuite/gas/cris/v32-err-10.s +445af9b99d3d33f3f421bb2757e4ff9b gas/testsuite/gas/cris/v32-err-11.s +7a56b86ef049cf26c8812cc94991693d gas/testsuite/gas/cris/v32-err-2.s +2a130988c660af456beb51f57ee587c7 gas/testsuite/gas/cris/v32-err-3.s +48167e521e41a2b20e643adaf0fc653a gas/testsuite/gas/cris/v32-err-4.s +8590a58794f69782cb98bbc7b4287fd1 gas/testsuite/gas/cris/v32-err-5.s +e6775fffe200cf9bb051f4155b8d91e3 gas/testsuite/gas/cris/v32-err-6.s +5b258ee6efc6766cadf23398030e1e79 gas/testsuite/gas/cris/v32-err-7.s +cac65aedce61344d081bc1f9cbf15806 gas/testsuite/gas/cris/v32-err-8.s +c2d8c1083f8564bad89df2010a5d253a gas/testsuite/gas/cris/v32-err-9.s +2a5f4f6e4b310f1d6d19ddc58bfac9ec gas/testsuite/gas/cris/x-to-byte-sreg.d +7577002f17af669f7a8144e7858ce3f1 gas/testsuite/gas/cris/x-to-dcr1-sreg.d +8281e49c3dd60d6d278fbb9440e43e04 gas/testsuite/gas/cris/x-to-dword-sreg.d +69a3a4886bef70933479dc77967ea4a4 gas/testsuite/gas/cris/x-to-word-sreg.d +fd3826ff356aeb79099fe12ef4bfd7a2 gas/testsuite/gas/crx/allinsn.exp +3e987ea3eacfcf73365affb85a80711e gas/testsuite/gas/crx/arith_insn.d +aba23cd9217a02e80972420bccf254e2 gas/testsuite/gas/crx/arith_insn.s +b124860509067a033fa183b2ad52d2ff gas/testsuite/gas/crx/beq_insn.d +cbb2a2a8ebdd76c365b03c090d6cb349 gas/testsuite/gas/crx/beq_insn.s +7cb7bdb36a00efc14f2d9d7f5e9a4320 gas/testsuite/gas/crx/bit_insn.d +a9b88867e985c7db06ad15f8aed69fca gas/testsuite/gas/crx/bit_insn.s +2b30807be764914b1a7fbbced315558e gas/testsuite/gas/crx/br_insn.d +5792c9d2f7ece4e813e9c05f17ad8b50 gas/testsuite/gas/crx/br_insn.s +a5a2bacc16b436e31ff8f4394ae83a4a gas/testsuite/gas/crx/cmov_insn.d +63c662f08a3c53d41bdb1cd589911125 gas/testsuite/gas/crx/cmov_insn.s +4725fa0812c37cafe5665570eb980a3e gas/testsuite/gas/crx/cmpbr_insn.d +5a15f070cce2a4aaa04f05391dc94f07 gas/testsuite/gas/crx/cmpbr_insn.s +c24edb48e5f07071ef62edc096db1b92 gas/testsuite/gas/crx/cop_insn.d +8267a9f074d80bef654bc891bfbf3c4e gas/testsuite/gas/crx/cop_insn.s +3f31371f16ed2712dff17f56418fe8f1 gas/testsuite/gas/crx/gas-segfault.d +a4be774abcf6e0707218424a9c203403 gas/testsuite/gas/crx/gas-segfault.s +5a36de150e79a77e8b5f65751ba36cb6 gas/testsuite/gas/crx/jscond_insn.d +42a3455c0057de5509e92e528b5634a7 gas/testsuite/gas/crx/jscond_insn.s +b18f9705c8d99b0d9ee4e2c06aa4c45f gas/testsuite/gas/crx/list_insn.d +df6b3c2f77acba7e752cf5a1d0742608 gas/testsuite/gas/crx/list_insn.s +fc9912552067eac4342d4521f193a797 gas/testsuite/gas/crx/load_stor_insn.d +2090bee5c0dc703ebbcfb784a806a0ca gas/testsuite/gas/crx/load_stor_insn.s +bcdceae61722cbe0b8237640e2467e2d gas/testsuite/gas/crx/misc_insn.d +82dc4fb42dcadde5747959f171498f91 gas/testsuite/gas/crx/misc_insn.s +3e1001d41b139bba1668d84c1e8e6f9c gas/testsuite/gas/crx/no_op_insn.d +bc07c25881db9dc098eb887754269119 gas/testsuite/gas/crx/no_op_insn.s +a154b3ae513a0e46db59528b375bd448 gas/testsuite/gas/crx/shift_insn.d +3a16320540ca68bf9f993705955f4e7d gas/testsuite/gas/crx/shift_insn.s +a6735576ee0c12f574d2b2c059292050 gas/testsuite/gas/d10v/address-001.d +7d9144fec165ca66fe3ad1a06a5c735d gas/testsuite/gas/d10v/address-001.s +7560d23743649b2f31b7508718eb54f7 gas/testsuite/gas/d10v/address-002.l +948ab3f723a9f6081583dc3dbb570a54 gas/testsuite/gas/d10v/address-002.s +4ec4f480ca9855c2f3f88eaad03e4ee5 gas/testsuite/gas/d10v/address-003.l +9bf77c8372dd9b5ea2e9a272454cc74c gas/testsuite/gas/d10v/address-003.s +89b79f4f9098b6e93a3936283d1396d8 gas/testsuite/gas/d10v/address-004.l +4a1380df3b54fe89f70fcca01058e7a6 gas/testsuite/gas/d10v/address-004.s +7560d23743649b2f31b7508718eb54f7 gas/testsuite/gas/d10v/address-005.l +fdaa4bfe9faf758e3a0a3ce02fa4bdad gas/testsuite/gas/d10v/address-005.s +6ccc5e077b308eb4ead744a09b0f6341 gas/testsuite/gas/d10v/address-006.l +bb98abbfe16da4e235bd56dbb6a30bae gas/testsuite/gas/d10v/address-006.s +89b79f4f9098b6e93a3936283d1396d8 gas/testsuite/gas/d10v/address-007.l +7b596f346fb988718153666bf5a0895b gas/testsuite/gas/d10v/address-007.s +7560d23743649b2f31b7508718eb54f7 gas/testsuite/gas/d10v/address-008.l +0f45aff1c35f0d1d2f59af79d4ef748c gas/testsuite/gas/d10v/address-008.s +6ccc5e077b308eb4ead744a09b0f6341 gas/testsuite/gas/d10v/address-009.l +b50ad1bd41b6af810bd6b8201d2f46c9 gas/testsuite/gas/d10v/address-009.s +0a72d08339e166994805d7ab5f2c91c5 gas/testsuite/gas/d10v/address-010.l +3a4f4f6a0ffa505ba3563f71b05d3a3e gas/testsuite/gas/d10v/address-010.s +895f588aa38be710d59bb0c5b04b7de6 gas/testsuite/gas/d10v/address-011.l +685a24a9aa24fcd5d590933af5b47543 gas/testsuite/gas/d10v/address-011.s +89b79f4f9098b6e93a3936283d1396d8 gas/testsuite/gas/d10v/address-012.l +34a95c3e0aea73e7e3b6547fe793efd1 gas/testsuite/gas/d10v/address-012.s +c19dfccdd9bcb8e8a436d6747079182a gas/testsuite/gas/d10v/address-013.l +0b14438b4898eedbf765234cd480d7ff gas/testsuite/gas/d10v/address-013.s +1efed80c33066e94fdd64cbbd497fe7e gas/testsuite/gas/d10v/address-014.l +aa095fa01b6c38d02cfcc448316e9a6c gas/testsuite/gas/d10v/address-014.s +7560d23743649b2f31b7508718eb54f7 gas/testsuite/gas/d10v/address-015.l +2506f8c079a983cb132717ef73c80fa3 gas/testsuite/gas/d10v/address-015.s +6ccc5e077b308eb4ead744a09b0f6341 gas/testsuite/gas/d10v/address-016.l +4f27f1bc67b609681cbfe5f684b11b6a gas/testsuite/gas/d10v/address-016.s +0a72d08339e166994805d7ab5f2c91c5 gas/testsuite/gas/d10v/address-017.l +9262a32c20f38112a0c08e9533b5547b gas/testsuite/gas/d10v/address-017.s +895f588aa38be710d59bb0c5b04b7de6 gas/testsuite/gas/d10v/address-018.l +5cb688834e2f1a9cf56595e1a216e521 gas/testsuite/gas/d10v/address-018.s +89b79f4f9098b6e93a3936283d1396d8 gas/testsuite/gas/d10v/address-019.l +4be0863b6f79110432da78f2e973d519 gas/testsuite/gas/d10v/address-019.s +c19dfccdd9bcb8e8a436d6747079182a gas/testsuite/gas/d10v/address-020.l +d371cb2c059fb37c28c157a3f8106622 gas/testsuite/gas/d10v/address-020.s +1efed80c33066e94fdd64cbbd497fe7e gas/testsuite/gas/d10v/address-021.l +4ad7b1e71bf3ac5e7295503ead61a165 gas/testsuite/gas/d10v/address-021.s +7560d23743649b2f31b7508718eb54f7 gas/testsuite/gas/d10v/address-022.l +0f63425dd36dc9d0f9003eb66776a0ad gas/testsuite/gas/d10v/address-022.s +6ccc5e077b308eb4ead744a09b0f6341 gas/testsuite/gas/d10v/address-023.l +1f0b933d6ed26d0670764491d57675a1 gas/testsuite/gas/d10v/address-023.s +89b79f4f9098b6e93a3936283d1396d8 gas/testsuite/gas/d10v/address-024.l +fedaf4c469f76a0c29d38efb8ca976e9 gas/testsuite/gas/d10v/address-024.s +7560d23743649b2f31b7508718eb54f7 gas/testsuite/gas/d10v/address-025.l +067d35e555edcf186ffd68315f215f52 gas/testsuite/gas/d10v/address-025.s +6ccc5e077b308eb4ead744a09b0f6341 gas/testsuite/gas/d10v/address-026.l +76917214750d255c71ebdf890b8c56e6 gas/testsuite/gas/d10v/address-026.s +89b79f4f9098b6e93a3936283d1396d8 gas/testsuite/gas/d10v/address-027.l +43657705163613ef157c7912c1df27e6 gas/testsuite/gas/d10v/address-027.s +f10bfd419dd15e2a9cb5a3e58825089d gas/testsuite/gas/d10v/address-028.l +a4c4fb94bbb8320b11ec9dd48ae27d2d gas/testsuite/gas/d10v/address-028.s +f10bfd419dd15e2a9cb5a3e58825089d gas/testsuite/gas/d10v/address-029.l +25a6da12fb57ce20919d3cad3599abe5 gas/testsuite/gas/d10v/address-029.s +7560d23743649b2f31b7508718eb54f7 gas/testsuite/gas/d10v/address-030.l +d0c93960ea840e21f8780c52bb442e8f gas/testsuite/gas/d10v/address-030.s +6ccc5e077b308eb4ead744a09b0f6341 gas/testsuite/gas/d10v/address-031.l +97ea79a8423cee83fe06562c647bc94e gas/testsuite/gas/d10v/address-031.s +0a72d08339e166994805d7ab5f2c91c5 gas/testsuite/gas/d10v/address-032.l +d4e7dc3e5820dd6e0996f4893a911409 gas/testsuite/gas/d10v/address-032.s +895f588aa38be710d59bb0c5b04b7de6 gas/testsuite/gas/d10v/address-033.l +2d3547a90bf1a21b53a970794821d359 gas/testsuite/gas/d10v/address-033.s +89b79f4f9098b6e93a3936283d1396d8 gas/testsuite/gas/d10v/address-034.l +897b7c7073bd4d6031db1db40c95b179 gas/testsuite/gas/d10v/address-034.s +c19dfccdd9bcb8e8a436d6747079182a gas/testsuite/gas/d10v/address-035.l +f081717902bdff5adfb1b5325c01fb12 gas/testsuite/gas/d10v/address-035.s +1efed80c33066e94fdd64cbbd497fe7e gas/testsuite/gas/d10v/address-036.l +575f3a5fd93fe848f910e9addd328afb gas/testsuite/gas/d10v/address-036.s +7560d23743649b2f31b7508718eb54f7 gas/testsuite/gas/d10v/address-037.l +09328faa8faa3c898aca59816c077fd7 gas/testsuite/gas/d10v/address-037.s +6ccc5e077b308eb4ead744a09b0f6341 gas/testsuite/gas/d10v/address-038.l +3a9ab467bc5e75d7c5a4ea9492d1810c gas/testsuite/gas/d10v/address-038.s +0a72d08339e166994805d7ab5f2c91c5 gas/testsuite/gas/d10v/address-039.l +a278ead57d83625ded4d92bdad8f2be0 gas/testsuite/gas/d10v/address-039.s +895f588aa38be710d59bb0c5b04b7de6 gas/testsuite/gas/d10v/address-040.l +4b42438d94a456bd985090fa4033ad72 gas/testsuite/gas/d10v/address-040.s +89b79f4f9098b6e93a3936283d1396d8 gas/testsuite/gas/d10v/address-041.l +e2bf48e0e29a2b3911c5320c140896ec gas/testsuite/gas/d10v/address-041.s +96f8269730cb7b20bff497a07ccd22ae gas/testsuite/gas/d10v/control-001.d +31e42fb6ff602fa691470418a63bf019 gas/testsuite/gas/d10v/control-001.s +02b28f15b91168a0ee60fcf058251ebb gas/testsuite/gas/d10v/d10v.exp +393b4ca54f7246945a011a41161f4779 gas/testsuite/gas/d10v/error-001.d +c6fc3df219367e9406b8e9f49afb7691 gas/testsuite/gas/d10v/error-001.s +b28ba5ae138c1b9870b87d5d552ce19f gas/testsuite/gas/d10v/error-002.d +7757def524bdcdf4fb13ed30ea1313c5 gas/testsuite/gas/d10v/error-002.s +34be3bde4d7abf2a2af2360598f0439e gas/testsuite/gas/d10v/immediate-001.d +2f7c161f6a15281d77b748199d7dcdcc gas/testsuite/gas/d10v/immediate-001.s +5cfb3cbbf2cda20ef538166610ad042b gas/testsuite/gas/d10v/immediate-002.d +d1486aa919e0b677eb9471e433c71e05 gas/testsuite/gas/d10v/immediate-002.s +68c670aec179411c8fc6692ea96c4340 gas/testsuite/gas/d10v/immediate-003.d +1694322013c7bff57ff63937eec8cf91 gas/testsuite/gas/d10v/immediate-003.s +eebde16759c4128196a540f786916288 gas/testsuite/gas/d10v/immediate-004.d +d554505672cfee59b2b50ce774d85125 gas/testsuite/gas/d10v/immediate-004.s +9f62d1c8d26587caa11e52225387d546 gas/testsuite/gas/d10v/immediate-005.d +4c9cfe5e63f84990138cab6bbe7f3800 gas/testsuite/gas/d10v/immediate-005.s +557b913559a46f6a4ed22bdc33fa0d98 gas/testsuite/gas/d10v/immediate-006.d +beb3253b69a29d40b68529b496a16925 gas/testsuite/gas/d10v/immediate-006.s +cae8c0e3d71ef8fecaeac082fc3c9db9 gas/testsuite/gas/d10v/immediate-007.d +666d4c75265b6bb9d4a07d772c61fc36 gas/testsuite/gas/d10v/immediate-007.s +0004da131d3e5488db3b4b89bd259250 gas/testsuite/gas/d10v/inst.d +bbe173f89d3ad611d31b7cf43d88291c gas/testsuite/gas/d10v/inst.s +703900315d829359b771c6c7d2ce84dd gas/testsuite/gas/d10v/instruction_packing-001.d +a8a4aed02672bf45f5f2ff57b8e2522e gas/testsuite/gas/d10v/instruction_packing-001.s +bb8ed73cacebacaa465da8e059b49cd7 gas/testsuite/gas/d10v/instruction_packing-002.d +eaccafae10a88e66fe63b2519185ecd4 gas/testsuite/gas/d10v/instruction_packing-002.s +13d85864087099bb01ecd6e55e20d79d gas/testsuite/gas/d10v/instruction_packing-003.d +ad736e41ad341cfe730a1fb3e933d09c gas/testsuite/gas/d10v/instruction_packing-003.s +f4b3361179e57452f47cf5e0572d27e3 gas/testsuite/gas/d10v/instruction_packing-004.d +58ecf26d8fe2178ba5532734e55a43b0 gas/testsuite/gas/d10v/instruction_packing-004.s +c2c630337066f77375fb3628d4c755fc gas/testsuite/gas/d10v/instruction_packing-005.d +566863f704902f29a0e831a8abeb4a2c gas/testsuite/gas/d10v/instruction_packing-005.s +e6c0acb54a5f28a93b2b45178f4d1584 gas/testsuite/gas/d10v/instruction_packing-006.d +cc4a736bc152e266c2b882f9204f2022 gas/testsuite/gas/d10v/instruction_packing-006.s +aa6486f80a5da199434db5ca3215a716 gas/testsuite/gas/d10v/instruction_packing-007.d +9f04908e67fb3d025225b796d2900c5a gas/testsuite/gas/d10v/instruction_packing-007.s +2bbe1f59eea6fcea81003dddb81af982 gas/testsuite/gas/d10v/instruction_packing-008.d +db8d769826d613ef6002637c9972c97c gas/testsuite/gas/d10v/instruction_packing-009.d +d3dcf857bf3c33952c1071f8683fa604 gas/testsuite/gas/d10v/instruction_packing-010.d +d54202c4d33b6c5958d75017b61e3758 gas/testsuite/gas/d10v/instruction_packing.d +ed5a04fc691e6a2f4d4c811292306714 gas/testsuite/gas/d10v/instruction_packing.s +f5ab3a0ce647dd181e77661c66260821 gas/testsuite/gas/d10v/label-001.d +19e726902a0cd1ec9e5a2d2f9cb0d474 gas/testsuite/gas/d10v/label-001.s +f7bcb24ed525edb26ec6424d1a242848 gas/testsuite/gas/d10v/warning-001.d +8c205e27f60d4cdbb9293c8a69d47ac6 gas/testsuite/gas/d10v/warning-001.s +de9084f1a7e1dc8180d6b8204d46ce35 gas/testsuite/gas/d10v/warning-002.d +b4bad3f3fb9e81f220e4522b356eb039 gas/testsuite/gas/d10v/warning-002.s +5043c3c8800c94c125d6b9a1a6351beb gas/testsuite/gas/d10v/warning-003.d +ddb47cffbc7242287346181dd0d6da04 gas/testsuite/gas/d10v/warning-003.s +38c9412fbed21d1b63d464d26266d5e4 gas/testsuite/gas/d10v/warning-004.d +90659d9da2c0b85164b96fec93415117 gas/testsuite/gas/d10v/warning-004.s +ad9c8aad9e2e537a648abb7912129b10 gas/testsuite/gas/d10v/warning-005.d +aa87347e149cf1b8347ea1e86a2c5b3f gas/testsuite/gas/d10v/warning-005.s +97b968299e90d656d819df84b9f98fd4 gas/testsuite/gas/d10v/warning-006.d +6bd930772199c5e812b362dbaf4e19de gas/testsuite/gas/d10v/warning-006.s +66834da80e3ee27cefb5a0a9a7312c66 gas/testsuite/gas/d10v/warning-007.d +aa87347e149cf1b8347ea1e86a2c5b3f gas/testsuite/gas/d10v/warning-007.s +c52224928ec9e958cc34fc49bd846467 gas/testsuite/gas/d10v/warning-008.d +ffb56773428f111baa5d8d04866a3c45 gas/testsuite/gas/d10v/warning-008.s +99eafcb9a6d69962fc3e9faebe0d6036 gas/testsuite/gas/d10v/warning-009.d +ee0c3a9bec78dd98e564a69b3ee84854 gas/testsuite/gas/d10v/warning-009.s +ff2a03040d31cfce536106965db07150 gas/testsuite/gas/d10v/warning-010.d +f587eb6b2169718f85e6fac4a2bb5741 gas/testsuite/gas/d10v/warning-010.s +54e69f5600e8a2da615cc33a573d2777 gas/testsuite/gas/d10v/warning-011.d +09899975395b8d0ca1dcea3ead5a9a09 gas/testsuite/gas/d10v/warning-011.s +5e1b0ccfbcae985f0372c972168c0c63 gas/testsuite/gas/d10v/warning-012.d +2b735788395407f53e9cfb276465c6cf gas/testsuite/gas/d10v/warning-012.s +3ea377bcaed87eeaba53c80f3f187312 gas/testsuite/gas/d10v/warning-013.d +e7846e49161841e07c02500c7cb45f9e gas/testsuite/gas/d10v/warning-013.s +982847efd277460e4597950f90c52cd8 gas/testsuite/gas/d10v/warning-014.d +a43dda7cb4b0b5a67a8676b056d0fbd3 gas/testsuite/gas/d10v/warning-014.s +bb49a7527c2b46bd80f4b02c80183c7b gas/testsuite/gas/d10v/warning-015.d +8a64c03c9a5f8060e32a54de143aa1c4 gas/testsuite/gas/d10v/warning-016.d +9ad455587f29fa070e7fb79919fa9b36 gas/testsuite/gas/d10v/warning-016.s +70e6bc585c537af6bb111f62376591f0 gas/testsuite/gas/d10v/warning-017.d +cec23f7775944e94bef9d3c411959c8c gas/testsuite/gas/d10v/warning-017.s +75ce932b8d1229797b67ac50709200d4 gas/testsuite/gas/d10v/warning-018.d +d249a48a68cf1de5657dd22a3abd529f gas/testsuite/gas/d10v/warning-018.s +bffc20273f7fc4a8784a60c939f7ac55 gas/testsuite/gas/d10v/warning-019.d +b889bbac23357064c465d79fbef70546 gas/testsuite/gas/d10v/warning-019.s +a15d68d40c502f8fb891fb71e6a331b4 gas/testsuite/gas/d30v/align.d +8ab5843e51782cc8150825c0aed13da9 gas/testsuite/gas/d30v/align.s +8a9471a2ce14a0c94c7af09fd8cf6f7c gas/testsuite/gas/d30v/array.d +afb9ee8fc39b6c6a3b5a607f0958dd2b gas/testsuite/gas/d30v/array.s +d7768075c27bdbdff4a1347c6b1746d0 gas/testsuite/gas/d30v/bittest.d +36ccce5414200c372215e06d70d6aad0 gas/testsuite/gas/d30v/bittest.l +4b9689db23a80dfeeb4e6217aaf0a8ad gas/testsuite/gas/d30v/bittest.s +884aac41a47a3f37d3e9201099de04d7 gas/testsuite/gas/d30v/d30.exp +d57a8494033a5610ebb1ec72067db1a2 gas/testsuite/gas/d30v/guard-debug.d +739c4467a3344e1787f7b4bdbf919705 gas/testsuite/gas/d30v/guard-debug.s +24a691232054571885f6c30112e51658 gas/testsuite/gas/d30v/guard.d +59254ab788d218d38c2c0d6e71251e76 gas/testsuite/gas/d30v/guard.s +748040da85ada059191e19f00e2488f6 gas/testsuite/gas/d30v/inst.d +39cdbdd6bd65bb5930b303daa6d76dcd gas/testsuite/gas/d30v/inst.s +02e401be332104808af7c8300005fe7d gas/testsuite/gas/d30v/label-debug.d +7f982990c748276d508b09332cdae4f6 gas/testsuite/gas/d30v/label-debug.s +c483a48ce51ab77c8dee11cfab64b50a gas/testsuite/gas/d30v/label.d +7f982990c748276d508b09332cdae4f6 gas/testsuite/gas/d30v/label.s +26406f9a3cbcac3df375ce96f2bf6d60 gas/testsuite/gas/d30v/mul.d +d16bd2d8de2333b4d7ee533c7fbdb1c4 gas/testsuite/gas/d30v/mul.s +3f5d45bfe5794cd78197dab5eba2c4e6 gas/testsuite/gas/d30v/opt.d +cd67e61c7ea236940d9b65c880a564b4 gas/testsuite/gas/d30v/opt.s +7ede5044d404df6c8e7e4397218784b3 gas/testsuite/gas/d30v/reloc.d +2ed511260d2382d512257ccd75e39887 gas/testsuite/gas/d30v/reloc.s +b37a654d4656a56a2e285628e3dcc39a gas/testsuite/gas/d30v/serial.l +26005134b177b676ea077b771aa246cc gas/testsuite/gas/d30v/serial.s +d62f3b2cffd953e7c0e21545f7ca1218 gas/testsuite/gas/d30v/serial2.l +4c96fc10e8ae0de631d7681473ac66eb gas/testsuite/gas/d30v/serial2.s +2f580294b862674be54215921b4f726a gas/testsuite/gas/d30v/serial2O.l +4c96fc10e8ae0de631d7681473ac66eb gas/testsuite/gas/d30v/serial2O.s +7fc2a4f0d0ed0a1e698ef2e351bacd11 gas/testsuite/gas/d30v/warn_oddreg.l +04cb44d9a5a4e2791243c475947c1dfa gas/testsuite/gas/d30v/warn_oddreg.s +e05430230b3286dc1934d1143d7dc0c1 gas/testsuite/gas/dlx/alltests.exp +127efafe2527347fb64508e20cf7edf6 gas/testsuite/gas/dlx/branch.d +b975e32977a78732d7f30c7df8a2c435 gas/testsuite/gas/dlx/branch.s +4bbefc6e223f23c5d05239b6ca0e8332 gas/testsuite/gas/dlx/itype.d +8465c3b2b019e9a4abb4d73ce4504525 gas/testsuite/gas/dlx/itype.s +a22e2d08b6e6db063f2da8dbf367a0d8 gas/testsuite/gas/dlx/lhi.d +39d88e8c2a6293235b494d613a3915b5 gas/testsuite/gas/dlx/lhi.s +618d2e0a1cd63a9c64d4944ce69905a7 gas/testsuite/gas/dlx/load.d +d88a4c8eb6d282949b5295d826d76311 gas/testsuite/gas/dlx/load.s +17da9fc13d8f2ccbe72fc26797011a5c gas/testsuite/gas/dlx/lohi.d +7270daf39763944ec620ee05dcf2f778 gas/testsuite/gas/dlx/lohi.s +7116badc2e0160e1a8333f8995323b08 gas/testsuite/gas/dlx/rtype.d +628f043cea1680e500b5ac0c309c91e9 gas/testsuite/gas/dlx/rtype.s +6d63b30eb9f2666bb4ac2456afb427c6 gas/testsuite/gas/dlx/store.d +336400205f3c98f8a8d2200e3e6e0fc3 gas/testsuite/gas/dlx/store.s +e8b98e1895ab5aaebf5d318ba94cccc0 gas/testsuite/gas/elf/bad-group.d +e82fefdb2700a66caf0331e54e36589d gas/testsuite/gas/elf/bad-group.err +7b24bff8e309f5262d367217379123b8 gas/testsuite/gas/elf/bad-group.s +94df0a59f9d8a3fc7dc0b5b45d36060d gas/testsuite/gas/elf/bad-section-flag.d +2623eda24a8bcefd26f472707bd1c853 gas/testsuite/gas/elf/bad-section-flag.err +6430c98b054029e200685848eed745e2 gas/testsuite/gas/elf/bad-section-flag.s +5cb00dec7f4dbf738104c6107731c51f gas/testsuite/gas/elf/bad-size.d +c489049b65777ca07cb885ba8faa82e3 gas/testsuite/gas/elf/bad-size.err +0b4954500101a4643e67e2187e9d11e4 gas/testsuite/gas/elf/bad-size.s +69fd0b66a67c0e0762f791bb253fb1c4 gas/testsuite/gas/elf/dwarf2-1.d +886e868c75eeb4c7c472e9bc2a51671f gas/testsuite/gas/elf/dwarf2-1.s +15479241a11880212952fa8603ac6b96 gas/testsuite/gas/elf/dwarf2-2.d +bef888929f0f1c60b25d843d33691a5b gas/testsuite/gas/elf/dwarf2-2.s +c1be095bfef4c59f73de7624ba87ab00 gas/testsuite/gas/elf/dwarf2-3.d +4b37154778bdd05b2ded6aa8db2e8e7e gas/testsuite/gas/elf/dwarf2-3.s +a874534eea08f6e8f44db5bfb2c83533 gas/testsuite/gas/elf/dwarf2-4.d +b257e9cf74e2c36733ddd286459faf46 gas/testsuite/gas/elf/dwarf2-4.s +3aa51e33fc3c4fb00d9f02ab8b6c1412 gas/testsuite/gas/elf/ehopt0.d +67a6ccaa7bc82ccb6a932a7231db4059 gas/testsuite/gas/elf/ehopt0.s +87c6212516d01685510840b397726b02 gas/testsuite/gas/elf/elf.exp +ca117d1ef9797c2abe5802d4fa8953c4 gas/testsuite/gas/elf/equ-reloc.d +c917159b2489776acdf15f164d0905e4 gas/testsuite/gas/elf/equ-reloc.s +e0e8e71c5b48f21bddb98d7c45e5a583 gas/testsuite/gas/elf/file.d +70b6289bdadaae1b408e2805dec8f770 gas/testsuite/gas/elf/file.s +075bcea3ebc7d9e53c3f6ed79210d4bb gas/testsuite/gas/elf/group0.s +f3fe13947fc2773e330e76030688e58c gas/testsuite/gas/elf/group0a.d +199deab556037b69231c9a2a5fcd7da0 gas/testsuite/gas/elf/group0b.d +4e43d7c0ca48309f31d3275428a0d06f gas/testsuite/gas/elf/group0c.d +21207251ef2eda07347adf8e8edb60ba gas/testsuite/gas/elf/group1.s +81308e53a5378b04d84c69d13e1fe5c1 gas/testsuite/gas/elf/group1a.d +1660e7fd50797e925b14fe48f38e6a8f gas/testsuite/gas/elf/group1b.d +9fcd9e2d59191f503d33a601a36c6fc6 gas/testsuite/gas/elf/groupauto.s +87af60f43e6dd4e7057cffce97b867f3 gas/testsuite/gas/elf/groupautoa.d +b15f107f41c0ebc724111ee307897879 gas/testsuite/gas/elf/groupautob.d +8c3d9ac3c4caf973dd6a05a01e0b9876 gas/testsuite/gas/elf/ifunc-1.d +18ba3548b49775bd97fafca717aea4f2 gas/testsuite/gas/elf/ifunc-1.s +09604fea2cc552ec3892fddb19ee9bfe gas/testsuite/gas/elf/pseudo.d +b7dca28f0b423b0d369fe38bf1111166 gas/testsuite/gas/elf/pseudo.l +4aa99fb516e06d2680468c67564fd554 gas/testsuite/gas/elf/pseudo.s +3e5cf7b8de55f655bac59c3a542a01dd gas/testsuite/gas/elf/redef.d +080d4cd3dac37ed1af74006cc7d9c39f gas/testsuite/gas/elf/redef.s +4e0cecedecf31818ef0d9697bdf9caf1 gas/testsuite/gas/elf/section0.d +94799bbca15898e61e62e52d81f0bcca gas/testsuite/gas/elf/section0.s +d626bedcb06fe46beda865191bb6f8f5 gas/testsuite/gas/elf/section1.d +b892afd90c0c8f8d9b5486dcd484d815 gas/testsuite/gas/elf/section1.s +4b340c0af90ecc105a81851e1966f0ba gas/testsuite/gas/elf/section2.e +d9725bd7c385eecd7381fbf1345ef172 gas/testsuite/gas/elf/section2.e-armeabi +02b0b5ec70de7787aea2109fefce87ec gas/testsuite/gas/elf/section2.e-armelf +296c7316bca4530074ecc07e84697adf gas/testsuite/gas/elf/section2.e-m32r +1c15de91b7de7e91d980379ab5b1753d gas/testsuite/gas/elf/section2.e-mips +59905bd5c30a169359abf06bbc009e5c gas/testsuite/gas/elf/section2.e-miwmmxt +e2542a5376b2bcbcfb252c7f6e1ecc70 gas/testsuite/gas/elf/section2.e-rx +ec29409d2983f481160b1ea103fa898b gas/testsuite/gas/elf/section2.e-score +3412d0f90f486b30ef4ef1f5f42f22ee gas/testsuite/gas/elf/section2.e-tic6x +d9725bd7c385eecd7381fbf1345ef172 gas/testsuite/gas/elf/section2.e-xtensa +f3e508e3e2bbb1749ab1e9e1c23289af gas/testsuite/gas/elf/section2.l +5a42c78c814dadc7e4a11cba2a795f97 gas/testsuite/gas/elf/section2.s +4db32453c693fea535afeeecfdc98d26 gas/testsuite/gas/elf/section3.d +ad3086bd2d519f6116efe933469ccf23 gas/testsuite/gas/elf/section3.s +50efb8918f1cbba284b2e00647f6a312 gas/testsuite/gas/elf/section4.d +c8f62533d742858880692eebc43aeba6 gas/testsuite/gas/elf/section4.s +f96c6ef9cb2e1718e696c7c2a7894dc7 gas/testsuite/gas/elf/section5.e +b2537849a5f8a60a51d11c25ef8b35bb gas/testsuite/gas/elf/section5.l +171e7d89c21777c752f738470cc015d4 gas/testsuite/gas/elf/section5.s +6bd732a352cbb7fba1e53b1e713b19ca gas/testsuite/gas/elf/section6.d +c0f115cd31b453f8dc5eea69f31b3559 gas/testsuite/gas/elf/section6.s +19897bdf9f0a992019b8e84f857df064 gas/testsuite/gas/elf/section7.d +77a6f78a8e155ff7fd6a7449558288fb gas/testsuite/gas/elf/section7.s +e110e825fdacdc63909a469f293a1d24 gas/testsuite/gas/elf/section8.d +8a9c43fb38d8837da4e10eac0a5e5901 gas/testsuite/gas/elf/section8.s +e76f1f507faa639c9cb09e133f62bd80 gas/testsuite/gas/elf/section9.d +a9091ca6f2ad94c418b4c98e99aaf66b gas/testsuite/gas/elf/section9.s +f515cccf76165e218e62e79d2281c712 gas/testsuite/gas/elf/struct.d +6f56598922a76124d2a548fab88ba85b gas/testsuite/gas/elf/struct.s +8a03014dc08ca3d66c23a052bda32bcb gas/testsuite/gas/elf/symtab.d +f1c6fc0d518739e2c3b35e592d56ec44 gas/testsuite/gas/elf/symtab.s +416fc65ca0766b5c8ac9bc0ab7a587f6 gas/testsuite/gas/elf/symver.d +335a17f208c2cc7ba886bde49f02c8ca gas/testsuite/gas/elf/symver.s +6b6dbd6e6db2cd6dfa6e62fe49aa2705 gas/testsuite/gas/elf/type-noifunc.e +7f202b033c0a9f7250c05cb73d767ef0 gas/testsuite/gas/elf/type-noifunc.s +eb2637faa5af7f65ca063335b2dfe876 gas/testsuite/gas/elf/type.e +9906d2abeb8c4f046b15b957922e02b2 gas/testsuite/gas/elf/type.s +a6533781ebde6c5cb83b2aaa3e21e1df gas/testsuite/gas/elf/warn-2.s +8f760ce7cf5b0bcea1fd0c123134bc4b gas/testsuite/gas/fr30/allinsn.d +f43f517834a1bcead42dab25e75f41d0 gas/testsuite/gas/fr30/allinsn.exp +fdf34a19cb21c9273e472a9bb4c9e97f gas/testsuite/gas/fr30/allinsn.s +4a1055775cc266d1a0458ce050e653d3 gas/testsuite/gas/fr30/fr30.exp +b0855b80218f5a929ddc68a70763ee63 gas/testsuite/gas/frv/allinsn.d +860200e9c4ec6ec494622c3114aecd33 gas/testsuite/gas/frv/allinsn.exp +92314edf2be71ae28723da713527c08c gas/testsuite/gas/frv/allinsn.s +456f60acbaf3cd31306a78c6de9d687a gas/testsuite/gas/frv/fdpic.d +4a756f9eddacb55c29e7749c7d329fc6 gas/testsuite/gas/frv/fdpic.s +fbd858a348c03a817f91d1baaf188efa gas/testsuite/gas/frv/fr405-insn.d +6c750867adf0ae2771b86d450aaa4c76 gas/testsuite/gas/frv/fr405-insn.l +33aa70a706c8c1e4947c31bf4d6d7060 gas/testsuite/gas/frv/fr405-insn.s +72828c0c9b13cc77056a142cd9cd12a7 gas/testsuite/gas/frv/fr450-insn.d +12c5b76c970eef88a502b59f99ccecf3 gas/testsuite/gas/frv/fr450-insn.l +37f3a8bb1162bec7a4743a32734fa811 gas/testsuite/gas/frv/fr450-insn.s +6b0037374ce715d5ea2edf9a2dabcc83 gas/testsuite/gas/frv/fr450-media-issue.l +736a21f8dda496bd1603011ea7630639 gas/testsuite/gas/frv/fr450-media-issue.s +d8784a35ef3909a48bd09d1106ccffb3 gas/testsuite/gas/frv/fr450-spr.d +971a9c1f4690b7a705b50272aeb714a9 gas/testsuite/gas/frv/fr450-spr.s +c5885c2815100c4a3407a1451cf15e77 gas/testsuite/gas/frv/fr550-pack1.d +fc5ef29bc53543bbebe47be7f19f68bf gas/testsuite/gas/frv/fr550-pack1.s +837f9d1dd1571d4c81bf1766f9f99407 gas/testsuite/gas/frv/reloc1.d +3a06ca65e67fbb7f94e33c8c7c6b46f2 gas/testsuite/gas/frv/reloc1.s +2924c535df55b6a32889011860a29689 gas/testsuite/gas/h8300/addsub.s +8b119bf28b7ba30807a8850b9edf96d3 gas/testsuite/gas/h8300/addsubh.s +493e1fa4afffc9276ad5d14b0530d6fb gas/testsuite/gas/h8300/addsubrxcheck.s +5b8c73d8de33afa02ff707f67065a1ef gas/testsuite/gas/h8300/addsubs.s +d86b31775e7398f8bc4d446d9d0a017b gas/testsuite/gas/h8300/bitops1.s +15fd0f35907c986489fa36bddebbb526 gas/testsuite/gas/h8300/bitops1h.s +584a7cd8ad886afe1f0d2f9b5d817467 gas/testsuite/gas/h8300/bitops1s.s +30ff0841f2e26ebb8e15aa636a64e4a5 gas/testsuite/gas/h8300/bitops2.s +a741bf520d8175248d8c363dd660cad9 gas/testsuite/gas/h8300/bitops2h.s +2e137c2f7cf12903edc7dd00bfe6d409 gas/testsuite/gas/h8300/bitops2s.s +3d15e82abb0f85bdfacdbb653e083999 gas/testsuite/gas/h8300/bitops3.s +82edeaa989ae932805db0608f8cc235a gas/testsuite/gas/h8300/bitops3h.s +f5395cd9806896db584e3fbbdb548389 gas/testsuite/gas/h8300/bitops3s.s +6249a5e4419949642c98aaa14f3d8b10 gas/testsuite/gas/h8300/bitops4.s +5a394a0dbef8a7f14e4294b4dcfed8a5 gas/testsuite/gas/h8300/bitops4h.s +791083648e92754b6c62f3201681ece1 gas/testsuite/gas/h8300/bitops4s.s +23aecc0c8af29a4bf18f97a9607677d5 gas/testsuite/gas/h8300/branch-coff.s +e4b78fbf88f2a797780cdbc116842e82 gas/testsuite/gas/h8300/branch-elf.s +1f02561f75f4c45679ba42b0492cc58a gas/testsuite/gas/h8300/branchh-coff.s +1f02561f75f4c45679ba42b0492cc58a gas/testsuite/gas/h8300/branchh-elf.s +e251ed292c39572dbd1364f73d5fd32e gas/testsuite/gas/h8300/branchs-coff.s +e251ed292c39572dbd1364f73d5fd32e gas/testsuite/gas/h8300/branchs-elf.s +f0e5262ac4229fe320614df5a40f35e9 gas/testsuite/gas/h8300/cbranch.s +30d75e5d8c2ef426fe42a377456bda0b gas/testsuite/gas/h8300/cbranchh.s +5fdbcffb87056d813eafd925d9c763f0 gas/testsuite/gas/h8300/cbranchs.s +ff5dba96cd99c306ec26780fc9069d8a gas/testsuite/gas/h8300/cmpsi2.s +3be6267a929c5b26e8f4d69491d0877a gas/testsuite/gas/h8300/compare.s +b2030d679f34f4563b5a00cbe2c1d072 gas/testsuite/gas/h8300/compareh.s +94eec517c2a5cefb40f7bcc8a338a83a gas/testsuite/gas/h8300/compares.s +437e6b6cef5f904dd70a700cd486f7ea gas/testsuite/gas/h8300/decimal.s +9b32251ca7b543949470558b507ca6b3 gas/testsuite/gas/h8300/decimalh.s +56fe63d196d46b2f8dc1c4bfca0c351d gas/testsuite/gas/h8300/decimals.s +0c35be5ae497429ff49aa3076805fda3 gas/testsuite/gas/h8300/divmul.s +d37984dfb136ed1c465a17ac6ff8cbb4 gas/testsuite/gas/h8300/divmulh.s +d37984dfb136ed1c465a17ac6ff8cbb4 gas/testsuite/gas/h8300/divmuls.s +f813008dac0b658d469085e795844664 gas/testsuite/gas/h8300/extendh.s +4d7497fb959f22fd9f7b666d4c61eee6 gas/testsuite/gas/h8300/extends.s +a9838bcffe296065862a083c5cdb2072 gas/testsuite/gas/h8300/ffxx1-coff.d +1d4afbfb9c48d8842384c1908e31c40f gas/testsuite/gas/h8300/ffxx1-coff.s +a4b0d327d0a7cd6348b06fc021bdacce gas/testsuite/gas/h8300/ffxx1-elf.d +1d4afbfb9c48d8842384c1908e31c40f gas/testsuite/gas/h8300/ffxx1-elf.s +3bce55aac5e784084083b48f3c9c6cdf gas/testsuite/gas/h8300/h8300-coff.exp +a2ee2d306e1cf5965164cdb2483bdeed gas/testsuite/gas/h8300/h8300-elf.exp +7adb98483f916e844b0109048bae6af7 gas/testsuite/gas/h8300/h8300.exp +b2c1b7579c1a011689e0f84dee026841 gas/testsuite/gas/h8300/h8sx_disp2.d +24bfa8fe6c7ea23669a8b7ddbb532df3 gas/testsuite/gas/h8300/h8sx_disp2.s +55085df87374e05b6ca2887bfdad18f3 gas/testsuite/gas/h8300/h8sx_mov_imm.d +8de24eb964deaeba9ab216fe5a83ae57 gas/testsuite/gas/h8300/h8sx_mov_imm.s +180177e9b13daf5c97a907883a3b15df gas/testsuite/gas/h8300/h8sx_rtsl.d +cbf4c219011b472494b1c9886803d88b gas/testsuite/gas/h8300/h8sx_rtsl.s +d068dc8b49ea5e3a2841052399d04411 gas/testsuite/gas/h8300/incdec.s +57ef072e39a9e088908da70b650fe6b7 gas/testsuite/gas/h8300/incdech.s +68127cbf4156b232462ded46fb1eeb96 gas/testsuite/gas/h8300/incdecs.s +ad670f4be1807bfa3361ea5dfdc0658d gas/testsuite/gas/h8300/logical.s +4baf511d4fbb91925e6de834c9b49ea5 gas/testsuite/gas/h8300/logicalh.s +c4d9cba61beedae407c0c1260e6e1d5d gas/testsuite/gas/h8300/logicals.s +3c56ddac8216a69a609103570d7b3e49 gas/testsuite/gas/h8300/macs.s +fb0d77314633b62d40a4a054311960e8 gas/testsuite/gas/h8300/misc.s +0474a81ccc5b5408fc54aa171faafb52 gas/testsuite/gas/h8300/misch.s +11bb474016acda38cc0db95df94487a3 gas/testsuite/gas/h8300/miscs.s +9193c97fad2ede164c0c90d605b70f46 gas/testsuite/gas/h8300/mov32bug.s +1883f564d24d685c8dc63486f070f4a6 gas/testsuite/gas/h8300/movb.s +fcd326aa9537340e99b1100508c3aa5b gas/testsuite/gas/h8300/movbh.s +7145f97672f9645e3de195a7fdf55a1b gas/testsuite/gas/h8300/movbs.s +d8c9bc7371b9b1d46a2eefb32d90d58d gas/testsuite/gas/h8300/movlh.s +0e5f5a058fd24a750a53bfa817b326a5 gas/testsuite/gas/h8300/movls.s +3674b05426b7d9c23e487af7bb8465e2 gas/testsuite/gas/h8300/movw.s +75e9728e4f42fb7fbedbba7ed96b11db gas/testsuite/gas/h8300/movwh.s +b0068c567a3f9efc6b3b31cf95a5a318 gas/testsuite/gas/h8300/movws.s +f6cedb831b52df4b3928a3a2f77a26c9 gas/testsuite/gas/h8300/multiples.s +966c74d143895095ee54889081de41bf gas/testsuite/gas/h8300/pr3134.d +a094b8eb92e6398adc065bf2c7ff0a97 gas/testsuite/gas/h8300/pr3134.s +4393180d58ab1ed9d690f02ff183b6f6 gas/testsuite/gas/h8300/pushpop.s +4d82e273acc364dfaddc59b3a13ee22e gas/testsuite/gas/h8300/pushpoph.s +8ff1c8b35100699d39d44f67e19a5176 gas/testsuite/gas/h8300/pushpops.s +6cc6731a0e070e666e164d9163629113 gas/testsuite/gas/h8300/rotsh.s +7bc113956c8ca4ddcd42503e4bd530e3 gas/testsuite/gas/h8300/rotshh.s +811af24ecd9436d020bfaf84413f5847 gas/testsuite/gas/h8300/rotshs.s +c1d90a226053f4ce7c7adff387f20b54 gas/testsuite/gas/h8300/symaddgen.s +ce55a85d73c6a1310de2454624c136e2 gas/testsuite/gas/h8300/t01_mov.exp +a3cbe564e8d6faf41cbf463811c89e02 gas/testsuite/gas/h8300/t01_mov.s +241f2fa417c5a917fe083c7190e3b861 gas/testsuite/gas/h8300/t02_mova.exp +8384c0c60131ab5ec30e614ac5304d36 gas/testsuite/gas/h8300/t02_mova.s +4372217c1898413da0cb442d8b83774c gas/testsuite/gas/h8300/t03_add.exp +b177ab180d26977ff43d8e5c6e38c907 gas/testsuite/gas/h8300/t03_add.s +6df403b20c72718d5385aaa8de8ec6ed gas/testsuite/gas/h8300/t04_sub.exp +26cf1c6a7495448281a2626e9393d099 gas/testsuite/gas/h8300/t04_sub.s +421f2108c19848bc75c4c2a6a876f86b gas/testsuite/gas/h8300/t05_cmp.exp +80158a3d34d939766f837f9e15e8fe2d gas/testsuite/gas/h8300/t05_cmp.s +13364c83674e3c7487ec96e9518cda19 gas/testsuite/gas/h8300/t06_ari2.exp +d9fbbf75a69dc39e28564cd3dfd89e5a gas/testsuite/gas/h8300/t06_ari2.s +54e194caef15999a18c006e28d3c8de8 gas/testsuite/gas/h8300/t07_ari3.exp +fbeccdb5c7220c385d8e4aee4f4c980d gas/testsuite/gas/h8300/t07_ari3.s +e0687fc4edbab3948726261d87477db2 gas/testsuite/gas/h8300/t08_or.exp +49ac32af6d29776560d6c3df80fe3a09 gas/testsuite/gas/h8300/t08_or.s +5f9e00cc1a79212cd05863950a01d8e7 gas/testsuite/gas/h8300/t09_xor.exp +a9d861fcb5888bf017b04692c6f95372 gas/testsuite/gas/h8300/t09_xor.s +9d73fa90207efffe2171ff5a43d4cb3e gas/testsuite/gas/h8300/t10_and.exp +1d08d13909be8fd1f1aefa95f62fc34b gas/testsuite/gas/h8300/t10_and.s +43ee497fe85e8b3221220a38a10edb69 gas/testsuite/gas/h8300/t11_logs.exp +036ff295450c4dc80011e85d74bd071f gas/testsuite/gas/h8300/t11_logs.s +d8ca7ba717f5fcdd2c32f72bef137c98 gas/testsuite/gas/h8300/t12_bit.exp +85bdc6caec434dbce8666be195bab7de gas/testsuite/gas/h8300/t12_bit.s +2c19c41ef2b05680493db17768a42b35 gas/testsuite/gas/h8300/t13_otr.exp +1110071293056d18834477e3b461aebe gas/testsuite/gas/h8300/t13_otr.s +7b1625a1a6ca53e3c9dd6d06b27ee995 gas/testsuite/gas/hppa/basic/add.s +e851cf6a3db3347c6f8bd107dbdacedc gas/testsuite/gas/hppa/basic/add2.s +57ad58f96f1a781f50c99315319025b2 gas/testsuite/gas/hppa/basic/addi.s +11a0221d409845a72fa783727e783440 gas/testsuite/gas/hppa/basic/basic.exp +23cbc90c2d163ffda4b92ac5670374b7 gas/testsuite/gas/hppa/basic/branch.s +018bafaddc464bf5344056a4a6ba62aa gas/testsuite/gas/hppa/basic/branch2.s +2744044afb6af0ffe892e71482c7e83b gas/testsuite/gas/hppa/basic/comclr.s +30e98c333c6c3c41f4230609d617d4bd gas/testsuite/gas/hppa/basic/copr.s +18c064b287abc57be5f66793ce0a4ed8 gas/testsuite/gas/hppa/basic/coprmem.s +5b953b17809a50b68718cad20f6b3cd5 gas/testsuite/gas/hppa/basic/dcor.s +54b1bb4ce869350a6860eea7ef011576 gas/testsuite/gas/hppa/basic/dcor2.s +7f9d07824ecdd65dce64fdbb8ab88668 gas/testsuite/gas/hppa/basic/deposit.s +9e7936d6dca987e90acb029a0794e50c gas/testsuite/gas/hppa/basic/deposit2.s +4179bc45da0c3f5c674c51bce4f3ef42 gas/testsuite/gas/hppa/basic/deposit3.s +5532f754b3ee74d823c916f73352f531 gas/testsuite/gas/hppa/basic/ds.s +ebef581b3abd2e0a860dc45c474dcc77 gas/testsuite/gas/hppa/basic/extract.s +f0c6b56da1f75e189baf27d8c1f535fe gas/testsuite/gas/hppa/basic/extract2.s +51d8fb411be8712bd0c7ce811ad6dc38 gas/testsuite/gas/hppa/basic/extract3.s +a982fc398cedf2e44201d59012ee7066 gas/testsuite/gas/hppa/basic/fmem.s +a0babc25ea6d4372cb5eccc0ae3f4825 gas/testsuite/gas/hppa/basic/fmemLRbug.s +12d638623e2fda0109342643a918858e gas/testsuite/gas/hppa/basic/fp_comp.s +9847e0fce8c6da72b7f980b441367739 gas/testsuite/gas/hppa/basic/fp_comp2.s +698e8f34a3b345696ad42ea0fe3a42dc gas/testsuite/gas/hppa/basic/fp_conv.s +50c67d6e1a3d6914794a948be62b14f6 gas/testsuite/gas/hppa/basic/fp_fcmp.s +67b6a72f5e598098f02c322b08238380 gas/testsuite/gas/hppa/basic/fp_misc.s +bf748287a3393071018df9ef711ff79e gas/testsuite/gas/hppa/basic/imem.s +382400fc1867cc374e7a9a97620ba203 gas/testsuite/gas/hppa/basic/immed.s +2b4d0bc9df8ca71e1b7c3af01a60d9e0 gas/testsuite/gas/hppa/basic/logical.s +40808c7e14c9dd94905f168f5bd28a9d gas/testsuite/gas/hppa/basic/media.s +3f9890f5f05691d773c5252cca7c3bdb gas/testsuite/gas/hppa/basic/perf.s +5cc775342d33290ccc79a2c3392ba59c gas/testsuite/gas/hppa/basic/purge.s +585389c4c1113b467f309f8b53564ddf gas/testsuite/gas/hppa/basic/purge2.s +bc0a3320065bbb6f8c7226807fa35e7d gas/testsuite/gas/hppa/basic/sh1add.s +7682c249ad6ac5dce5a7a0d5c70b9759 gas/testsuite/gas/hppa/basic/sh2add.s +3976fa98bed24429b469cc702b660e93 gas/testsuite/gas/hppa/basic/sh3add.s +69cfdc26fc07d25504dfb30978448340 gas/testsuite/gas/hppa/basic/shift.s +f588468f60d1393a578d3147a655f303 gas/testsuite/gas/hppa/basic/shift2.s +d35888a201d29276d5f468576ce69678 gas/testsuite/gas/hppa/basic/shift3.s +1288a8d17a77098169f032cf5dd63455 gas/testsuite/gas/hppa/basic/shladd.s +8ed6a738a1fd2383dbe99d68c8cf59e4 gas/testsuite/gas/hppa/basic/shladd2.s +b8f517402a2c82b158d9e1df1a11779a gas/testsuite/gas/hppa/basic/special.s +1af275b55a5680b0a941bfdf1e5496e9 gas/testsuite/gas/hppa/basic/spop.s +4d54a793881d666296b48b0b2ac763e2 gas/testsuite/gas/hppa/basic/sub.s +f16923e9ababc303530ffa9835a0edf4 gas/testsuite/gas/hppa/basic/sub2.s +c2fd7d2c7fc3f77c944b5af56ebbcb7d gas/testsuite/gas/hppa/basic/subi.s +c8284a379fc4d3b89da889cbd99a4565 gas/testsuite/gas/hppa/basic/system.s +9dec6c8e5b94b75cb0e0fb27c16ce4ee gas/testsuite/gas/hppa/basic/system2.s +179a4ad64c7d1a3faa0d9945c41b5b35 gas/testsuite/gas/hppa/basic/unit.s +1ed85cf259a78d3d86ea435e74dfcbe6 gas/testsuite/gas/hppa/basic/unit2.s +03008cde62428d4ff2464bef8cb8bcd2 gas/testsuite/gas/hppa/basic/weird.s +d93edd3b974fa05de350f6104c63af74 gas/testsuite/gas/hppa/parse/align1.s +6a7df2ab8d1491f8f64f60fb0a359558 gas/testsuite/gas/hppa/parse/align2.s +85d6e969f063c0bee9565d096c43657e gas/testsuite/gas/hppa/parse/appbug.s +72ae2fe9c7ff74b0267402ab93c59282 gas/testsuite/gas/hppa/parse/badfmpyadd.s +324e688a23442952378a5807132d00be gas/testsuite/gas/hppa/parse/block1.s +44d0164ab1f3f2f8201ca4cac02f0a91 gas/testsuite/gas/hppa/parse/block2.s +7012f9c767f18688e051c168e218464b gas/testsuite/gas/hppa/parse/calldatabug.s +d26fcb5186e8ffda4892557ecf9d836a gas/testsuite/gas/hppa/parse/callinfobug.s +36132d401bbf31234a71915b94762a26 gas/testsuite/gas/hppa/parse/defbug.s +8355f3baa7c8bf6dfdde12165f166988 gas/testsuite/gas/hppa/parse/entrybug.s +a8c2940c51c368a14265009963ce4a7d gas/testsuite/gas/hppa/parse/exportbug.s +0aa9ab25448da72ed059168f45ee4e11 gas/testsuite/gas/hppa/parse/exprbug.s +464c7378f55821348860da76fd77ed2e gas/testsuite/gas/hppa/parse/fixup7bug.s +69d79811f23cb30bd2c536063a29c137 gas/testsuite/gas/hppa/parse/global.s +eae1949a6363097a7e2ef5bd260b9aa7 gas/testsuite/gas/hppa/parse/labelbug.s +500906f02f2d8b74365d5c87cf1c4cc4 gas/testsuite/gas/hppa/parse/linesepbug.s +adf3dd32e97d184fa3a923e977ac0f20 gas/testsuite/gas/hppa/parse/lselbug.s +e09d99b9bb0cc52546de922bf02a3a13 gas/testsuite/gas/hppa/parse/nosubspace.s +935cffd940f103074de27bfe5f50d367 gas/testsuite/gas/hppa/parse/parse.exp +030b7a7332dca245ae8a65a00ab8e169 gas/testsuite/gas/hppa/parse/procbug.s +ba4a443e4362a957c9eda52f33e9ed56 gas/testsuite/gas/hppa/parse/regpopbug.s +1e6c961fc9120126cbb70fea5a79b599 gas/testsuite/gas/hppa/parse/space.s +b19738063af645b6f2231ee644131542 gas/testsuite/gas/hppa/parse/spacebug.s +16d00a249972a7d82fd5b443a6c006ea gas/testsuite/gas/hppa/parse/ssbug.s +6e77c97c02695c15f9f54b9b531a5e2b gas/testsuite/gas/hppa/parse/stdreg.s +e4c3228c9e3a74eb9b2170caafd9cf4c gas/testsuite/gas/hppa/parse/stringer.s +b91fabc2587cd34b7543fe16032d9c3e gas/testsuite/gas/hppa/parse/undefbug.s +ad0e0513effd832ce4787671ac4c5eac gas/testsuite/gas/hppa/parse/versionbug.s +7f9b2353d22448012a9435f7b80ccf1a gas/testsuite/gas/hppa/parse/xmpyubug.s +73cbb56b2c330327d9c06ea89af0cd91 gas/testsuite/gas/hppa/README +629e685800d946a73fba78f4f9e2a342 gas/testsuite/gas/hppa/reloc/applybug.s +e7eccf3a36e653b9312fc78bb40a5022 gas/testsuite/gas/hppa/reloc/blebug.s +9c8150c0635455986ba2e99432e230ad gas/testsuite/gas/hppa/reloc/blebug2.s +cfe88051f0bd644932bc22814216e804 gas/testsuite/gas/hppa/reloc/blebug3.s +2e83d05979fd4ec0c399182ad7513423 gas/testsuite/gas/hppa/reloc/exitbug.s +a7ab875345b2ba9a0c1e6aee0c0b23cb gas/testsuite/gas/hppa/reloc/fixupbug.s +84f724d5d6335f9367de5e493847499c gas/testsuite/gas/hppa/reloc/funcrelocbug.s +8fd8e8d6557a090221c4b9382f712183 gas/testsuite/gas/hppa/reloc/labelopbug.s +79c490df3cf5ac395769cfd1378b598b gas/testsuite/gas/hppa/reloc/longcall.s +6fedcfa10d24c76dde19990cbdb53c1a gas/testsuite/gas/hppa/reloc/picreloc.s +a30d0372d62d0a448e374ed80897e3bf gas/testsuite/gas/hppa/reloc/plabelbug.s +f2f905140c0955e2a88e451fad681f42 gas/testsuite/gas/hppa/reloc/r_no_reloc.s +5042b71ae3f83b270fa17a2b7f27fc92 gas/testsuite/gas/hppa/reloc/reduce.s +bc728b6253b6c770472ed22f5def04e0 gas/testsuite/gas/hppa/reloc/reduce2.s +45668f4718492900a833f2d3ebe47e57 gas/testsuite/gas/hppa/reloc/reduce3.s +24778206aa7c2e579232a86fc6416c3f gas/testsuite/gas/hppa/reloc/reloc.exp +2813e26c00aa991fb8cc3f67b56ae4f6 gas/testsuite/gas/hppa/reloc/roundmode.s +c690211a1ccb9ebe1cda17e17b5d1cf4 gas/testsuite/gas/hppa/reloc/selectorbug.s +c0e4f0dd244fb83332f776ca09756e5b gas/testsuite/gas/hppa/unsorted/align3.s +a7b6914341e97c943a5b931b5ff724a1 gas/testsuite/gas/hppa/unsorted/align4.s +d5ecda3dffcd60591d33b1718f89d02c gas/testsuite/gas/hppa/unsorted/brlenbug.s +0854f5ede3fb810256df5394b5d17a6f gas/testsuite/gas/hppa/unsorted/common.s +563abc929a52d7539bb83a990fbfcb65 gas/testsuite/gas/hppa/unsorted/fragbug.s +3c295194b6d3754be9b7b7da67fddcb4 gas/testsuite/gas/hppa/unsorted/globalbug.s +af9e915b6ea1a8a691914d94bb230546 gas/testsuite/gas/hppa/unsorted/importbug.s +741867661d59451b7d71d392fc0d7206 gas/testsuite/gas/hppa/unsorted/labeldiffs.s +0aa46fc17784b72b21d387564dddde36 gas/testsuite/gas/hppa/unsorted/locallabel.s +f8705df6b564ae8bc51ff8255048afd1 gas/testsuite/gas/hppa/unsorted/ss_align.s +fd1722938dd9b247d2bc012816b7474f gas/testsuite/gas/hppa/unsorted/unsorted.exp +cfbacb867fc23e46eb5cc453b29e996e gas/testsuite/gas/i386/287.d +171a2a6a1a526682c97dc638228ac3d2 gas/testsuite/gas/i386/287.s +1f34c095fb15a02b950b8584dd28d6ab gas/testsuite/gas/i386/387.d +16ef730d8dc6335b7e046292d35e13bf gas/testsuite/gas/i386/387.s +202a1104702a1ab88cf1155edd6d8555 gas/testsuite/gas/i386/8087.d +e62b68bf9ccf183fcc4276aa425cfb47 gas/testsuite/gas/i386/8087.s +24010b9a4f38ef4e53794bbf69dbe9b9 gas/testsuite/gas/i386/absrel.d +44d1a7733eab035047de0217133c8049 gas/testsuite/gas/i386/absrel.s +6ca25f25d906ca4e1f42a524d56dedbb gas/testsuite/gas/i386/addr16.d +70add2d5b558cddf1c5bc90d4f7e771e gas/testsuite/gas/i386/addr16.s +4f73f8a4612da1cb112877293278ca77 gas/testsuite/gas/i386/addr32.d +74cc2d6dafabdd5075b1cbf0093a970c gas/testsuite/gas/i386/addr32.s +75d586d2a364298d7b0ac00b307483d0 gas/testsuite/gas/i386/aes-intel.d +303189f3b0a196261790b8c9c1a21187 gas/testsuite/gas/i386/aes.d +3006616545a323ecea7618dbf4a90dc7 gas/testsuite/gas/i386/aes.s +11975e08de2a2b280f20e23efea011e8 gas/testsuite/gas/i386/amd.d +490292ab4ea047011bb404ae769deba3 gas/testsuite/gas/i386/amd.s +a89088c88a88f80e5311c75c676ead59 gas/testsuite/gas/i386/amdfam10.d +aca65b19ecb300fd23ac54c091aa7c8a gas/testsuite/gas/i386/amdfam10.s +4140fffdbe1146a3111d3a455a103600 gas/testsuite/gas/i386/arch-1.d +4cd49cad88f9a8c0c16e5702f6801b6e gas/testsuite/gas/i386/arch-1.s +9029e12df192c6e7dc6f785e547818bc gas/testsuite/gas/i386/arch-10-1.l +4c7fbb695ec8e2da9b8a5b5d1285788b gas/testsuite/gas/i386/arch-10-1.s +0b1e6cfa37ae0010602cbe92c754f516 gas/testsuite/gas/i386/arch-10-2.l +4c7fbb695ec8e2da9b8a5b5d1285788b gas/testsuite/gas/i386/arch-10-2.s +82b72690964fdc58c48ebd6ac26259ba gas/testsuite/gas/i386/arch-10-3.l +4c7fbb695ec8e2da9b8a5b5d1285788b gas/testsuite/gas/i386/arch-10-3.s +a471a60b85be8a309e3fce7f7a134810 gas/testsuite/gas/i386/arch-10-4.l +4c7fbb695ec8e2da9b8a5b5d1285788b gas/testsuite/gas/i386/arch-10-4.s +bd79ef4055168d7551dd94ca5a0ad90d gas/testsuite/gas/i386/arch-10-lzcnt.d +a1b7af16b68f6d6cda343c479c545cc4 gas/testsuite/gas/i386/arch-10.d +17bcdf6f34bf0ca39d958879816fc2c1 gas/testsuite/gas/i386/arch-10.s +55e60d9a0f9c5741095a4e4cd0ff269d gas/testsuite/gas/i386/arch-11.d +a0ba0f4ee22157c7b827a05809c74252 gas/testsuite/gas/i386/arch-11.s +bd5ebc374ccc1141114d427b606893b9 gas/testsuite/gas/i386/arch-12.d +e33093a9e0e46d682d68f7e8d1879ba5 gas/testsuite/gas/i386/arch-12.s +42d0f4545615d1ee10e8838c62268b30 gas/testsuite/gas/i386/arch-2.d +98890f04f76c669902e924263f3a4388 gas/testsuite/gas/i386/arch-2.s +c643432a697f1eaca5b6c2f04d9f2f59 gas/testsuite/gas/i386/arch-3.d +51947cf37cd9d6584de752422b3fa7f4 gas/testsuite/gas/i386/arch-3.s +d715fd01a7c1e2dc76cae1231db9caa3 gas/testsuite/gas/i386/arch-4.d +dacf75da2d6832e65f00676df7c9a013 gas/testsuite/gas/i386/arch-4.s +407c9c0c081ad4ed23e3eed383bd1ca6 gas/testsuite/gas/i386/arch-5.d +881a1d13bb99416017d937e5effa8afe gas/testsuite/gas/i386/arch-5.s +7b839f7ef0a473d69e9c928ae299be80 gas/testsuite/gas/i386/arch-6.d +b3a48fb746350655b78b981634817d9d gas/testsuite/gas/i386/arch-6.s +279db54fe3dc1b2ad2706510a0a072d0 gas/testsuite/gas/i386/arch-7.d +8c0e50647ead9e7958d12dfb9fcf919f gas/testsuite/gas/i386/arch-7.s +f6136cb1d84660930a63974fafefe89f gas/testsuite/gas/i386/arch-9.d +977c4e7a3894b8727a607b5db85087e5 gas/testsuite/gas/i386/arch-9.s +d71f7aaa6431d9f97d2f252bf1f598c6 gas/testsuite/gas/i386/arch-avx-1-1.l +1d3c045b12dca5123c1f1c072760599a gas/testsuite/gas/i386/arch-avx-1-1.s +d71f7aaa6431d9f97d2f252bf1f598c6 gas/testsuite/gas/i386/arch-avx-1-2.l +1d3c045b12dca5123c1f1c072760599a gas/testsuite/gas/i386/arch-avx-1-2.s +d71f7aaa6431d9f97d2f252bf1f598c6 gas/testsuite/gas/i386/arch-avx-1-3.l +1d3c045b12dca5123c1f1c072760599a gas/testsuite/gas/i386/arch-avx-1-3.s +3213b3903043c42c1e565d662c165639 gas/testsuite/gas/i386/arch-avx-1-4.l +1d3c045b12dca5123c1f1c072760599a gas/testsuite/gas/i386/arch-avx-1-4.s +438e3620835c28a62d0d40d8fe63b86c gas/testsuite/gas/i386/arch-avx-1-5.l +1d3c045b12dca5123c1f1c072760599a gas/testsuite/gas/i386/arch-avx-1-5.s +d71f7aaa6431d9f97d2f252bf1f598c6 gas/testsuite/gas/i386/arch-avx-1-6.l +1d3c045b12dca5123c1f1c072760599a gas/testsuite/gas/i386/arch-avx-1-6.s +62fd5a3bf586aa6a49c795ba95dda468 gas/testsuite/gas/i386/arch-avx-1.d +6fd5639d4ad175fa23bd73487ecedc10 gas/testsuite/gas/i386/arch-avx-1.s +b03a4e1f362f7544d45d25e4d2bff12e gas/testsuite/gas/i386/att-regs.d +cc0d8b6d9603acdb81cc3a3b58cddedf gas/testsuite/gas/i386/att-regs.s +204308fdda1295977796d7b583fa7fde gas/testsuite/gas/i386/avx-gather-intel.d +512235971837376879c46abbda91fd90 gas/testsuite/gas/i386/avx-gather.d +067fc780fc1d8a7df5f87f6e8335a561 gas/testsuite/gas/i386/avx-gather.s +4fc048736a2c084bee1908ed33ad0178 gas/testsuite/gas/i386/avx-intel.d +a06b8f951f2c69d5430b30c43adac226 gas/testsuite/gas/i386/avx-scalar-intel.d +3e04e47b54e1889ba607c91443e22ec7 gas/testsuite/gas/i386/avx-scalar.d +627c851404d1bafd5ae9ce2649b36d44 gas/testsuite/gas/i386/avx-scalar.s +9a809d4a118138a33a385cbabd9f3efe gas/testsuite/gas/i386/avx.d +5edb3797f38fe1008d8dff820bfb17f8 gas/testsuite/gas/i386/avx.s +63e41ec69ba7585cdf8e6343bd0963ab gas/testsuite/gas/i386/avx2-intel.d +8914b2a9fc24d1e24dc3d1d58073a6a5 gas/testsuite/gas/i386/avx2.d +15c1c4db95335650a57de9d6acf12528 gas/testsuite/gas/i386/avx2.s +4fff5d800d96f132317a4e11bcab1956 gas/testsuite/gas/i386/avx256int-intel.d +c64593a8ca631f1937c9ad6a51a9a515 gas/testsuite/gas/i386/avx256int.d +f14cfb582b15f84852a900686c462ba5 gas/testsuite/gas/i386/avx256int.s +4e344296641bfd2128a5cc0827f7afba gas/testsuite/gas/i386/bad-size.d +2cb02be063b81df1a93f7aacb6e0a209 gas/testsuite/gas/i386/bad-size.s +b4d3f465c5e64ba8955ca95984516e65 gas/testsuite/gas/i386/bad-size.warn +c36066b7f07db4fcea92b62c0c8bb715 gas/testsuite/gas/i386/bmi-intel.d +5851ad2e4711f5eb46857dc958c20394 gas/testsuite/gas/i386/bmi.d +ff40be471674a3b3290eb9b699614ae5 gas/testsuite/gas/i386/bmi.s +4a93dfd1586b17c9300f7d4349fad70f gas/testsuite/gas/i386/bmi2-intel.d +0d21bb7f0cb7179d7eda89d14fb487b4 gas/testsuite/gas/i386/bmi2.d +f770ccd7151113d5dd19cdd9f2f1a0e0 gas/testsuite/gas/i386/bmi2.s +4fcdf4ddc2c648f228400a3349b3cfd2 gas/testsuite/gas/i386/bss.d +873bd22e2aefafbf190efebc31f90ba8 gas/testsuite/gas/i386/bss.s +79f73dddb88f227947e29b673f5f6d89 gas/testsuite/gas/i386/clmul-intel.d +5cbae0d2dc80c2917d1b649cd2cc5819 gas/testsuite/gas/i386/clmul.d +0bbda8b5cbddb5c69a8259affdefa47d gas/testsuite/gas/i386/clmul.s +13eb7a28fbf1022b85287860a4c1e6df gas/testsuite/gas/i386/compat-intel.d +946e035f667a16e08ae486622ddfedd1 gas/testsuite/gas/i386/compat.d +b9dc0897d5efa8fa23e144276af2fda0 gas/testsuite/gas/i386/compat.s +48ac5ede74694da5a5c30740ae07542b gas/testsuite/gas/i386/cr-err.l +682ff4e79cf55bde7df5a585334244f1 gas/testsuite/gas/i386/cr-err.s +9e528b11bf49b0271e767ce686beafc1 gas/testsuite/gas/i386/crc32-intel.d +b63fd1728be7f8ab7ad68b43d7859094 gas/testsuite/gas/i386/crc32.d +8eadf5c51b3ff6e11360e1e46341064b gas/testsuite/gas/i386/crc32.s +5fc6911024266e35d7a7c6ddd9d2dcc8 gas/testsuite/gas/i386/crx.d +cd065840b7ecff5d83aa9701a1479e35 gas/testsuite/gas/i386/crx.s +94c401fadc8b3eca17a53e475be54b63 gas/testsuite/gas/i386/debug1.d +fcb662f6083710b2db7e90393ccc75d9 gas/testsuite/gas/i386/debug1.s +f5eae70842a215bcac877e124765f9b8 gas/testsuite/gas/i386/disp-intel.d +a31dea706d02991a25bb3fa43e910339 gas/testsuite/gas/i386/disp.d +2edcd8110d38767edd6cbddbd90cdc3b gas/testsuite/gas/i386/disp.s +4e8e7c8aa970e8c747d4a649b8f3a20a gas/testsuite/gas/i386/disp32.d +0d2042e6dcbc790ca78032ed45b944d7 gas/testsuite/gas/i386/disp32.s +189be01fb122304d37ce73bc98f846c0 gas/testsuite/gas/i386/divide.d +33c0d04dc841d220224f80125d856600 gas/testsuite/gas/i386/divide.s +c6be67da74ec273b5a95bb1e074c41ba gas/testsuite/gas/i386/dw2-compress-1.d +c83938985211abdfda1de50ecadf9db5 gas/testsuite/gas/i386/dw2-compress-1.s +b04fd5e77f20a41f39d3be429d3193d6 gas/testsuite/gas/i386/dw2-compress-2.d +6adc5de214dc31900028867a47408dee gas/testsuite/gas/i386/dw2-compress-2.s +d5d131a9412b15ede69a454b650832e3 gas/testsuite/gas/i386/ept-intel.d +33d05ee98f24760dc1781feb775c639e gas/testsuite/gas/i386/ept.d +15eaf1303baff77f35818d7933ce2e0e gas/testsuite/gas/i386/ept.s +9670cfca7b529cc6b85cfb6bc1fe9bf0 gas/testsuite/gas/i386/equ.d +6790d514023dc266c846e5e3c2193d49 gas/testsuite/gas/i386/equ.s +670ca9d041e26d6ad52538f0848e25e0 gas/testsuite/gas/i386/f16c-intel.d +aea9d80d5ab333f09676da2840d527d2 gas/testsuite/gas/i386/f16c.d +709ee9724e4ab84481450a7b37995d3a gas/testsuite/gas/i386/f16c.s +481a82666e24dd35712ddbe1953070fc gas/testsuite/gas/i386/float.l +0df7ab956e3209428d665890983ef957 gas/testsuite/gas/i386/float.s +3ea2c5bd85f72208e712b4642a1f2d70 gas/testsuite/gas/i386/fma-intel.d +1b594228cefc4b5c16caad468781b1c7 gas/testsuite/gas/i386/fma-scalar-intel.d +b744639e88e21d0d19b7ec1319b71be5 gas/testsuite/gas/i386/fma-scalar.d +67e8d9ebe9297a5f7975087017bc07ca gas/testsuite/gas/i386/fma-scalar.s +d8c614d055ecfd66f4ef6ce62f3e4101 gas/testsuite/gas/i386/fma.d +305dabcbe317bc5f1549fd6d1633f02e gas/testsuite/gas/i386/fma.s +7e5e384f1b32b26958f8af641023a2c6 gas/testsuite/gas/i386/fma4.d +8d76c68f0c2de1fc309442b6c6054271 gas/testsuite/gas/i386/fma4.s +827d73ef30f7ac676b39933e05215587 gas/testsuite/gas/i386/fp.d +7bcb8a12861c81cdcb2c0bb7de330f1b gas/testsuite/gas/i386/fp.s +6a6f3f219da1517555a2e3c2d1f42c06 gas/testsuite/gas/i386/fsgs-intel.d +eb3698c46ad08724de91ff7943f743d4 gas/testsuite/gas/i386/fsgs.d +81a2842104b82fd33309bf1e53ef590f gas/testsuite/gas/i386/fsgs.s +8080d881efa149202b251d632f28cb7c gas/testsuite/gas/i386/general.l +1db75486be70699071b9a6564e5f843a gas/testsuite/gas/i386/general.s +f6f171e3ed5e8b2fb2a22b376eb49f3f gas/testsuite/gas/i386/gotpc.d +b518d2eb2658745af0bf58cbd295eec9 gas/testsuite/gas/i386/gotpc.s +c42f10e9f4ecdddcbd48ea204dec710b gas/testsuite/gas/i386/i386.d +b735130773f9b0bb9bfabba433b7de30 gas/testsuite/gas/i386/i386.exp +8eb567b76b592760d5316213b76a6d85 gas/testsuite/gas/i386/i386.s +0c804ba116de81860c5b4592ac701919 gas/testsuite/gas/i386/ifunc-2.l +f5d8fb713f7aa9f005521f9da7af1b08 gas/testsuite/gas/i386/ifunc-2.s +7eba5b9ca7814406d3c41abb2acc3b3b gas/testsuite/gas/i386/ifunc-3.d +df71a69b7aa589034050faedee8d0e44 gas/testsuite/gas/i386/ifunc-3.s +65dfa028ff8d7a64716f3669cb2f53cb gas/testsuite/gas/i386/ifunc.d +82b099704e53725014c0deae97bad932 gas/testsuite/gas/i386/ifunc.s +3df78821a0064d78577e8535c07ffcea gas/testsuite/gas/i386/ilp32/cfi/cfi-common-1.d +ab4bb667cf0e51ef13eaa6213dd84a97 gas/testsuite/gas/i386/ilp32/cfi/cfi-common-2.d +1174864a74f88e4ef8273b42f8266c8d gas/testsuite/gas/i386/ilp32/cfi/cfi-common-3.d +1c6c12c64c446a53b08c7c1aa051dd9d gas/testsuite/gas/i386/ilp32/cfi/cfi-common-4.d +79df02eb71bee33baa0e5a488272704e gas/testsuite/gas/i386/ilp32/cfi/cfi-common-5.d +97a123c12520f3e4f3c3d3052b430054 gas/testsuite/gas/i386/ilp32/cfi/cfi-common-6.d +93b0333f2a44ee2f8010c5a178daac22 gas/testsuite/gas/i386/ilp32/cfi/cfi-common-7.d +edac528bdfbe54e3bef23f6994121c95 gas/testsuite/gas/i386/ilp32/cfi/cfi-x86_64.d +8b17764a49ed0f93bb8eb1c7bc9c569b gas/testsuite/gas/i386/ilp32/cfi/ilp32.exp +5161181167c7011eb0db45cdc71943ff gas/testsuite/gas/i386/ilp32/elf/ehopt0.d +3852ff733d92251dc53294d23a41723d gas/testsuite/gas/i386/ilp32/elf/equ-reloc.d +0ffd8df241a3aab9936a19f8bb697772 gas/testsuite/gas/i386/ilp32/elf/file.d +c82aaf4c739e2b0a3bf7a81130c5433f gas/testsuite/gas/i386/ilp32/elf/group0a.d +8e5758cc5ae65c6f53d1b7a6f5d9c09b gas/testsuite/gas/i386/ilp32/elf/group0b.d +6d366d0c18e682d56ea20e160b7cc05f gas/testsuite/gas/i386/ilp32/elf/group1a.d +98b7d2f0672b9946cd3c1fbd1c559117 gas/testsuite/gas/i386/ilp32/elf/group1b.d +c1e5c6040ea899706e93bbb089a9f7c7 gas/testsuite/gas/i386/ilp32/elf/ifunc-1.d +8b17764a49ed0f93bb8eb1c7bc9c569b gas/testsuite/gas/i386/ilp32/elf/ilp32.exp +67a6bb8ea5ebc16c6bebdd0733290d3d gas/testsuite/gas/i386/ilp32/elf/redef.d +dcbf92f6a87febf4150119fb6a024d4d gas/testsuite/gas/i386/ilp32/elf/section0.d +da350bef14ac55f68e6891a7839bd793 gas/testsuite/gas/i386/ilp32/elf/section1.d +bee9d1befc23d5261aae48b05e4fb067 gas/testsuite/gas/i386/ilp32/elf/section3.d +479fa4a30b1ecb5e1af1560c981e09df gas/testsuite/gas/i386/ilp32/elf/section4.d +3194b6c4cc1b10c6c8e9663d18185cfd gas/testsuite/gas/i386/ilp32/elf/section6.d +e6fec4e140cf4ff214a7b12b6c2dcc40 gas/testsuite/gas/i386/ilp32/elf/section7.d +a1ae4a1f79c782124ebc9057fc92aba8 gas/testsuite/gas/i386/ilp32/elf/struct.d +d02f8c60e09d2949aedf1d1bd2825e0a gas/testsuite/gas/i386/ilp32/elf/symtab.d +04d2b37b4d37201b1a9fff9cbbb5ab92 gas/testsuite/gas/i386/ilp32/elf/symver.d +1d83e568aec28f15a0d64b19cea75685 gas/testsuite/gas/i386/ilp32/ilp32.exp +64e911f51146d8fa875f91152210a4a0 gas/testsuite/gas/i386/ilp32/immed64.d +2833ab469120fcf40bab61da9310e585 gas/testsuite/gas/i386/ilp32/immed64.s +8b17764a49ed0f93bb8eb1c7bc9c569b gas/testsuite/gas/i386/ilp32/lns/ilp32.exp +1ec9a904bec40029b6c55a5de818424a gas/testsuite/gas/i386/ilp32/lns/lns-common-1.d +51b92f5736b04d44b5f86b1b79413bae gas/testsuite/gas/i386/ilp32/lns/lns-duplicate.d +57781fd1330a4fdcf7ffbb2fe82d8c2d gas/testsuite/gas/i386/ilp32/mixed-mode-reloc64.d +ba62ade5841d563a4be93312ed80500f gas/testsuite/gas/i386/ilp32/quad.d +968510511922ffd73f9ce351e916d5a0 gas/testsuite/gas/i386/ilp32/quad.s +1ee9180d49c54cf4039608fab7f9728e gas/testsuite/gas/i386/ilp32/reloc64.d +0f780e1b02473c26e39590bab2c2736e gas/testsuite/gas/i386/ilp32/reloc64.l +67d2922e632ef0c4a4a699ab3ec85d65 gas/testsuite/gas/i386/ilp32/reloc64.s +94747d62265e52fd21f9768eb257044b gas/testsuite/gas/i386/ilp32/rex.d +091bf5f771ed2c13816c82c901569130 gas/testsuite/gas/i386/ilp32/rexw.d +f7c34f523157cc22bbdb4c173754d118 gas/testsuite/gas/i386/ilp32/svme64.d +c039cb81629fc6e70e10cde7baaa665f gas/testsuite/gas/i386/ilp32/x86-64-addr32-intel.d +6129948fdd6a227a875b5a09294a4f6b gas/testsuite/gas/i386/ilp32/x86-64-addr32.d +f837788a5c44c4d5609d78a30a60d527 gas/testsuite/gas/i386/ilp32/x86-64-aes-intel.d +933b8bc00c5ca2364c797a2833ba3888 gas/testsuite/gas/i386/ilp32/x86-64-aes.d +d65c86f1f7943a8ee200f514ff5e0f1c gas/testsuite/gas/i386/ilp32/x86-64-amdfam10.d +ed625b2e7d464175a5843a38c4ba9c77 gas/testsuite/gas/i386/ilp32/x86-64-arch-1.d +d544001f61622013efbdc30052fc035e gas/testsuite/gas/i386/ilp32/x86-64-arch-2.d +33b1761d7c94802f68eaf6a7a0c077dc gas/testsuite/gas/i386/ilp32/x86-64-avx-intel.d +3cbec967b6e302b8ccfe39c892b6a8eb gas/testsuite/gas/i386/ilp32/x86-64-avx-swap-intel.d +cabf474b86feb7f08177df00d87743fb gas/testsuite/gas/i386/ilp32/x86-64-avx-swap.d +d27cba0e5c504a4643dafcda752c2376 gas/testsuite/gas/i386/ilp32/x86-64-avx.d +25cb44655988f34bec1f3a50c558f1e2 gas/testsuite/gas/i386/ilp32/x86-64-branch.d +8051718ed58247a8581c69c6fd35984a gas/testsuite/gas/i386/ilp32/x86-64-cbw-intel.d +b13c4d8555f39366287af7684bf2344f gas/testsuite/gas/i386/ilp32/x86-64-cbw.d +5e5e11eca24557cc72ada9cbcbfccc5a gas/testsuite/gas/i386/ilp32/x86-64-clmul-intel.d +475308c2cf70008ff9857300c2fda523 gas/testsuite/gas/i386/ilp32/x86-64-clmul.d +a10419265e64f39133663018ac41b3e2 gas/testsuite/gas/i386/ilp32/x86-64-crc32-intel.d +c6e512e7f347f5f4f9e44dc1250d94c2 gas/testsuite/gas/i386/ilp32/x86-64-crc32.d +fd89c20e58a5932b7780b428139c3f43 gas/testsuite/gas/i386/ilp32/x86-64-crx-suffix.d +5ece27a509cd364929b7d08a02ceefa5 gas/testsuite/gas/i386/ilp32/x86-64-crx.d +683e030f7c5237f6d6ad750654ddddd4 gas/testsuite/gas/i386/ilp32/x86-64-disp-intel.d +268faa642f40031509fafa4d65b15ccc gas/testsuite/gas/i386/ilp32/x86-64-disp.d +310577f2da9b725f5c905a0d5b085691 gas/testsuite/gas/i386/ilp32/x86-64-drx-suffix.d +3dd53a565bb9d3332d493549bdac46bc gas/testsuite/gas/i386/ilp32/x86-64-drx.d +f45268bda416f4f4d43cbb136d40f688 gas/testsuite/gas/i386/ilp32/x86-64-ept-intel.d +ee3d6adde67cd3af844956e9b01db85e gas/testsuite/gas/i386/ilp32/x86-64-ept.d +f711e8466d7397bf9c293e335306610d gas/testsuite/gas/i386/ilp32/x86-64-fma-intel.d +74a1273930b2fb5a7e35fc06f0d6ded9 gas/testsuite/gas/i386/ilp32/x86-64-fma.d +4a8752c77dea49095e2ec253901d5b41 gas/testsuite/gas/i386/ilp32/x86-64-fma4.d +bae71559c8ddcd78dcdaec3d6c2d58f0 gas/testsuite/gas/i386/ilp32/x86-64-gidt.d +014193fbdf50f4329bf3ed93939da480 gas/testsuite/gas/i386/ilp32/x86-64-ifunc.d +2b6b30a70c44b1f6d7b43422cd8a3bdb gas/testsuite/gas/i386/ilp32/x86-64-intel64.d +99c2a3675c7456463244fe9c0be245cc gas/testsuite/gas/i386/ilp32/x86-64-io-intel.d +2f44168786a80f39e5d76dc4e82b296e gas/testsuite/gas/i386/ilp32/x86-64-io-suffix.d +90a62a52d0e2c2359830099f1c69cc0f gas/testsuite/gas/i386/ilp32/x86-64-io.d +407553c22d29562717fe64d4168ef21c gas/testsuite/gas/i386/ilp32/x86-64-localpic.d +40ede28427b82ae3e4658a49ff8cbeab gas/testsuite/gas/i386/ilp32/x86-64-mem-intel.d +9e634631cd34df405fd8be627b1b88d8 gas/testsuite/gas/i386/ilp32/x86-64-mem.d +703fabc67572478eb6db8a13bd74e916 gas/testsuite/gas/i386/ilp32/x86-64-movbe-intel.d +49b0f7443931b77dff720c925308a19f gas/testsuite/gas/i386/ilp32/x86-64-movbe.d +f826ef0b288ab7dd460a1431d3e24a71 gas/testsuite/gas/i386/ilp32/x86-64-nops-1-core2.d +d27a265d3f9343ac86560289681486ed gas/testsuite/gas/i386/ilp32/x86-64-nops-1-k8.d +b8c04fec6e0a3299b5fa5d0a6bee45d4 gas/testsuite/gas/i386/ilp32/x86-64-nops-1-nocona.d +fc252e86b680bcaaf1a05091eb822545 gas/testsuite/gas/i386/ilp32/x86-64-nops-1-pentium.d +26293be853ce56559b8c413379b971df gas/testsuite/gas/i386/ilp32/x86-64-nops-1.d +34a7718e4efb6c99e1d994b029a03680 gas/testsuite/gas/i386/ilp32/x86-64-nops-2.d +523c654317980a0665725745133ee502 gas/testsuite/gas/i386/ilp32/x86-64-nops-3.d +6def06e86d9a3ab76ad68e77e5569ab9 gas/testsuite/gas/i386/ilp32/x86-64-nops-4-core2.d +4c19e1081706fe9d4f358757e2d05e41 gas/testsuite/gas/i386/ilp32/x86-64-nops-4-k8.d +d46f707a4993a3d06765d169d2c89afc gas/testsuite/gas/i386/ilp32/x86-64-nops-4.d +e023edc22d6f87af8284abfdfcbfd38f gas/testsuite/gas/i386/ilp32/x86-64-nops-5-k8.d +cc0b219a4e7d5fb226806244501edfe4 gas/testsuite/gas/i386/ilp32/x86-64-nops-5.d +bef2ae89d7d5c9c4f7cd636c14e752c9 gas/testsuite/gas/i386/ilp32/x86-64-nops.d +df16126acfb56e9c8bfb55cd8828611e gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval-intel.d +4259b1cae34a4f696c010cb2a4d87e81 gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval.d +ca5321f8e0308af417a19cd3e46eba54 gas/testsuite/gas/i386/ilp32/x86-64-opcode.d +ce941c1b76388d97a77019ce753f996b gas/testsuite/gas/i386/ilp32/x86-64-opts-intel.d +787aa21140eadc2cdcfac4e9437c6852 gas/testsuite/gas/i386/ilp32/x86-64-opts.d +cbc5b15e7fc07f41496aa5e12f93e1d6 gas/testsuite/gas/i386/ilp32/x86-64-pcrel.d +7f474e4895a09cd83f21b42aee76fbad gas/testsuite/gas/i386/ilp32/x86-64-pcrel.s +71f8263c587a46434c7d63a2bed4a543 gas/testsuite/gas/i386/ilp32/x86-64-reg-intel.d +8394efdd2473ae7f9a00b01cbb21ef0e gas/testsuite/gas/i386/ilp32/x86-64-reg.d +3eab8632041a9f795247fe555af55c95 gas/testsuite/gas/i386/ilp32/x86-64-rep-suffix.d +0cfb959748d2765b026f479492302685 gas/testsuite/gas/i386/ilp32/x86-64-rep.d +cd4261d448c5661ac2160e41ec5b0995 gas/testsuite/gas/i386/ilp32/x86-64-rip-intel.d +cb412a6bedcb98fb9dd9eae289f892e9 gas/testsuite/gas/i386/ilp32/x86-64-rip.d +856a89e2121d0f890ee876875e8483df gas/testsuite/gas/i386/ilp32/x86-64-sib-intel.d +4ec74fcd08be7b4b358e8305fd0ef1ad gas/testsuite/gas/i386/ilp32/x86-64-sib.d +7a5f2dbac770eba590529953e8f5bfd3 gas/testsuite/gas/i386/ilp32/x86-64-simd-intel.d +7a96805b21ce30d177bd437f7bdba072 gas/testsuite/gas/i386/ilp32/x86-64-simd-suffix.d +03126c8bcd434c33341cc6bf9d845a82 gas/testsuite/gas/i386/ilp32/x86-64-simd.d +81ba2eb302a7cf061a8fec009c4d32f2 gas/testsuite/gas/i386/ilp32/x86-64-sse-check-none.d +0197094a9385985b1e4eb108844cb639 gas/testsuite/gas/i386/ilp32/x86-64-sse-check-warn.d +da0a46c46e1c4e1c914162f3ab2de5fe gas/testsuite/gas/i386/ilp32/x86-64-sse-check.d +9e066d0ac79e17457e5b950543b39556 gas/testsuite/gas/i386/ilp32/x86-64-sse-noavx.d +a0d817cab7c5a6e2f03e2f4222ecae5d gas/testsuite/gas/i386/ilp32/x86-64-sse2avx-opts-intel.d +2c3ca42ce824461ff18acc9b35d66014 gas/testsuite/gas/i386/ilp32/x86-64-sse2avx-opts.d +a29da9ac70bf23316f9442ee2207f2e0 gas/testsuite/gas/i386/ilp32/x86-64-sse2avx.d +82d4f03fde7ebb13d5a960da416fca21 gas/testsuite/gas/i386/ilp32/x86-64-sse3.d +0e08b57387501efff4dd240707347a13 gas/testsuite/gas/i386/ilp32/x86-64-sse4_1-intel.d +164b3f3b0bc3cfbc8f9768a0e7ce5538 gas/testsuite/gas/i386/ilp32/x86-64-sse4_1.d +9f07f2016caed1bb56c294d1f0caaf95 gas/testsuite/gas/i386/ilp32/x86-64-sse4_2-intel.d +f21e69257b122606ddc99717ccbf50e2 gas/testsuite/gas/i386/ilp32/x86-64-sse4_2.d +9cbe7bd79644371dd0a0305ad34f0453 gas/testsuite/gas/i386/ilp32/x86-64-ssse3.d +7d7cb1a556286105ba1b9ed4eb46116a gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d +6220a6c3770ca5d801d2de69c75ace72 gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d +9f282e622001e91deda7eb8014adebfd gas/testsuite/gas/i386/ilp32/x86-64-stack.d +a7e456d18941f1aa004c73051332f298 gas/testsuite/gas/i386/ilp32/x86-64-unwind.d +0362e325ae03f7841c862f1faf6569e2 gas/testsuite/gas/i386/ilp32/x86-64-vmx.d +34311f9bc61ed6aa88f4278a98d39e9c gas/testsuite/gas/i386/ilp32/x86-64-xsave-intel.d +82ccddf4546498fc3ed56ae4ccfa1759 gas/testsuite/gas/i386/ilp32/x86-64-xsave.d +86b585a4ab87c0059a40cfaccbd4c4bb gas/testsuite/gas/i386/ilp32/x86-64.d +558dfa0ff47174a56fdb77cc4abfdda9 gas/testsuite/gas/i386/ilp32/x86-64.s +ae2e0be16100f21dd7ca822d5d462e4a gas/testsuite/gas/i386/immed32.d +87fbc24db5a886748c5a92b86f0bc6b3 gas/testsuite/gas/i386/immed32.s +6272a52f78a3e539faeeb78c25efe500 gas/testsuite/gas/i386/immed64.d +1eb96aabc3d1172ecee1c818483d0caf gas/testsuite/gas/i386/immed64.s +acad3adc7150a8ab49fae5d753930d85 gas/testsuite/gas/i386/intel-expr.d +296c27ba04bdeab744e43fd92bbcd60a gas/testsuite/gas/i386/intel-expr.s +45f8fb682b27ba478df9f2d637eeb202 gas/testsuite/gas/i386/intel-got32.d +91a804c847bda059688149ce3e82abe9 gas/testsuite/gas/i386/intel-got32.s +9e4ec3f3bd3e885fc099fe387573bc0a gas/testsuite/gas/i386/intel-got64.d +80a03ddb8d21737a404a109e0db0a111 gas/testsuite/gas/i386/intel-got64.s +fd0541170c653ad47f1b91eaebe962c0 gas/testsuite/gas/i386/intel-regs.d +a8909489e3ce4f2f3a6f37415f1931d9 gas/testsuite/gas/i386/intel-regs.s +cd059a817988d83fac0bb5896c1d5c65 gas/testsuite/gas/i386/intel.d +a51910f6973ebe550d20e21bb85d34ba gas/testsuite/gas/i386/intel.e +fbed5b55122a503ae0da16c4b9a629ac gas/testsuite/gas/i386/intel.s +c6d309e665ba7201bb4410be04c96087 gas/testsuite/gas/i386/intel16.d +8ce11aeb67d3ed972d5eb3c90e5e94f4 gas/testsuite/gas/i386/intel16.s +ce49e8118193f845b50ca7d4994d5435 gas/testsuite/gas/i386/intelbad.l +8bec947baed5b06bce4cc4f951d68571 gas/testsuite/gas/i386/intelbad.s +f3f92d0c3d309edf9ec9a973c3cb08ef gas/testsuite/gas/i386/intelok.d +3e05e60b08be317dc957729c0d438e7e gas/testsuite/gas/i386/intelok.s +b83a2a0dbc42d7719c1f3773e5ece505 gas/testsuite/gas/i386/intelpic.d +8555f3b34fdffff6df460123cab004a2 gas/testsuite/gas/i386/intelpic.s +7d29d7830f6d684717aed5c27411734a gas/testsuite/gas/i386/inval-avx.l +a7b6a8c2865124822043ef0e02c71562 gas/testsuite/gas/i386/inval-avx.s +277eec2e7d58fa65cb3e60587ae96e40 gas/testsuite/gas/i386/inval-crc32.l +35b185f6b91fb6037ca025d85a808fd0 gas/testsuite/gas/i386/inval-crc32.s +3f29ec220a7adb3693a3cacb9876e6d4 gas/testsuite/gas/i386/inval-ept.l +5fc14add67d4bcc3e5622f38ac12a797 gas/testsuite/gas/i386/inval-ept.s +653c1bfa5acbed73845e9e4f0ac025bf gas/testsuite/gas/i386/inval-equ-1.l +ad64e4e52649facd07693d70163a109c gas/testsuite/gas/i386/inval-equ-1.s +58126930aef7bbe31b4dc18cb4e80d0d gas/testsuite/gas/i386/inval-equ-2.l +9d24aa6584eab0a1186f17bdb964200d gas/testsuite/gas/i386/inval-equ-2.s +a450a7a8c4535aaf595b98e8af418639 gas/testsuite/gas/i386/inval-invpcid.l +0c5fd56b405c29b473c429cff6b6e427 gas/testsuite/gas/i386/inval-invpcid.s +d78190becdda6021676d5832373afc7f gas/testsuite/gas/i386/inval-movbe.l +12f93fc08afaf9bfb6f54089f3511f37 gas/testsuite/gas/i386/inval-movbe.s +b94377afd7b01cc32db6b37e5ea630d4 gas/testsuite/gas/i386/inval-reg.l +747f53f51416cff88b86ca5c63e46445 gas/testsuite/gas/i386/inval-reg.s +f7a89c19a9f1cb3e85637ebe9f67e057 gas/testsuite/gas/i386/inval-seg.l +f021a269046335d2df67eb196fee389f gas/testsuite/gas/i386/inval-seg.s +890cfc8ddc682354d92865b8e02cc0f2 gas/testsuite/gas/i386/inval.l +380b8be614c2725ff5c127ad3b757848 gas/testsuite/gas/i386/inval.s +147e701a51e08124a3482e3899c25a71 gas/testsuite/gas/i386/invpcid-intel.d +c05bfc313bacdcc4774e2dbc4be372ce gas/testsuite/gas/i386/invpcid.d +e0ed401fc7e84ee536b96145e21e1bab gas/testsuite/gas/i386/invpcid.s +8d968c107e13ba687eb12926719adb44 gas/testsuite/gas/i386/jump.d +42b0107629a2a3d206a26a157a93e3ff gas/testsuite/gas/i386/jump.s +d5ca309d7d4537ef130eb7165376036d gas/testsuite/gas/i386/jump16.d +d7d31bb833c5765c095c612d30520833 gas/testsuite/gas/i386/jump16.s +d7f8400590524bb79c7a8b32e3ebfd94 gas/testsuite/gas/i386/k1om-inval.l +0f21416e489dae757bb03a5039e498d7 gas/testsuite/gas/i386/k1om-inval.s +31ce2d117c1ae5bf811a9bc60aba2010 gas/testsuite/gas/i386/k1om.d +ccf3a80b02bd62f291ff4a473ad72be4 gas/testsuite/gas/i386/katmai.d +184fb56a639e2576e761632f3fbd4cb9 gas/testsuite/gas/i386/katmai.s +cee3d19c62cb9bca0ac47a548f30858b gas/testsuite/gas/i386/l1om-inval.l +0f21416e489dae757bb03a5039e498d7 gas/testsuite/gas/i386/l1om-inval.s +314d1b2f054ba21e0c9aaf8bc6d32e96 gas/testsuite/gas/i386/l1om.d +a39dcd817c512ae873dff25a14c171ff gas/testsuite/gas/i386/list-1.l +fc66ec5cd46138f7cd3ead91679c9fa7 gas/testsuite/gas/i386/list-1.s +a5e2cc20cc32a456cba57a28c13c18e5 gas/testsuite/gas/i386/list-2.l +ecaf63b5fb174b39641263c157f857fa gas/testsuite/gas/i386/list-2.s +52c75ea4e411d04c5971c3e8dec8f013 gas/testsuite/gas/i386/list-3.l +7466e291420e797a803e9201ef88c039 gas/testsuite/gas/i386/list-3.s +f25b4b35620c2d7e510e811d37698fbc gas/testsuite/gas/i386/localpic.d +4e09ecab41571383910000edd7515775 gas/testsuite/gas/i386/localpic.s +74720fc7bc721c83eae64f2dc2ba94aa gas/testsuite/gas/i386/lock-1-intel.d +fdb142aa76fad022fa423552cde40462 gas/testsuite/gas/i386/lock-1.d +dfc4ac89a0fb64cc8479dd64a3267692 gas/testsuite/gas/i386/lock-1.s +bbd99783af207bd5b47b392cb5604825 gas/testsuite/gas/i386/lockbad-1.l +2ce461380f139daf73afb299c404081b gas/testsuite/gas/i386/lockbad-1.s +4438f00ef1c1e53918012bc35389d8b3 gas/testsuite/gas/i386/long-1-intel.d +4aa1a1e863966181bc432f017fe2243a gas/testsuite/gas/i386/long-1.d +ae5cb3ce2d1779fd2f32ceffa6d3a038 gas/testsuite/gas/i386/long-1.s +0a774e8f1a233946f9bd50c54305c6ac gas/testsuite/gas/i386/lwp.d +a51bccb0f43817a150bf55900f995a49 gas/testsuite/gas/i386/lwp.s +b4d5520a82ffd4a0a13f5c0d2bd8ba62 gas/testsuite/gas/i386/mem-intel.d +5fe4ae6c810ca1e91f8c8bc7630de456 gas/testsuite/gas/i386/mem.d +5926795552df7942d593482625c9c50b gas/testsuite/gas/i386/mem.s +d004208db701b4e9c43957689eb71dab gas/testsuite/gas/i386/mixed-mode-reloc.s +f4d4dceee0d93929433daba8a389ca55 gas/testsuite/gas/i386/mixed-mode-reloc32.d +397c657036288a4b0e096e37942d74cd gas/testsuite/gas/i386/mixed-mode-reloc64.d +d566afc7ce85d649e11306e09c745945 gas/testsuite/gas/i386/modrm.l +1d1696a1b6db5c16aa2463cdd8b6a045 gas/testsuite/gas/i386/modrm.s +d66566456198a09537b0816548f065a4 gas/testsuite/gas/i386/movbe-intel.d +61f6075da202c6dac27b16fa708d6fc9 gas/testsuite/gas/i386/movbe.d +a91058699397fb64756b3ef31b12f1e3 gas/testsuite/gas/i386/movbe.s +49e46a5f863be9fdb62ff21a13d0472e gas/testsuite/gas/i386/naked.d +b4fe60a42e7f416e8bcfc4c911652c79 gas/testsuite/gas/i386/naked.s +a222b072dd6dcf34da7d441b99bef225 gas/testsuite/gas/i386/no87-2.l +6dbfb50008d6f3fce14f55d98ccb5277 gas/testsuite/gas/i386/no87-2.s +c211c30a2ca8c8af5dfb9de9ed947b54 gas/testsuite/gas/i386/no87.l +40ffeadf079c8c28a36f6efcc580d508 gas/testsuite/gas/i386/no87.s +2104665d17640a64efe7b5881e419f6f gas/testsuite/gas/i386/nops-1-bdver1.d +79324c17d7a317bdeb38558fdef17d65 gas/testsuite/gas/i386/nops-1-bdver2.d +05ad0e5841a6d7bf557ff6a439f766f1 gas/testsuite/gas/i386/nops-1-core2.d +1b6d99fa9f483ca4a983e086c3bfbd86 gas/testsuite/gas/i386/nops-1-i386-i686.d +390ea68aac15a2de94c241b84fd60d83 gas/testsuite/gas/i386/nops-1-i386.d +180fb5dfeedfebbed76b3ce02867a7ed gas/testsuite/gas/i386/nops-1-i686.d +5c837a002b3c88949c904d1b3b43b25d gas/testsuite/gas/i386/nops-1-k8.d +08f3d5ceb9530c9068f2e0fa74f75834 gas/testsuite/gas/i386/nops-1.d +025026ce822ca51940d7d32199a1ac49 gas/testsuite/gas/i386/nops-1.s +fc008c47b628e4419701c15a6c1a7663 gas/testsuite/gas/i386/nops-2-core2.d +b7d7dd981c6a71fe1d9a3e31afe082f6 gas/testsuite/gas/i386/nops-2-i386.d +8e52edd48c85bf50fd9f345bda7dad2d gas/testsuite/gas/i386/nops-2.d +1e88981495159fad22fb66e99c65f80e gas/testsuite/gas/i386/nops-2.s +2bb47f6c6770c2c5eae0f0c268350d7b gas/testsuite/gas/i386/nops-3-i386.d +f2d0bfc3c44aad2ba8d26f2f0bfaa472 gas/testsuite/gas/i386/nops-3-i686.d +01ce50d52bd3841b1b4dceda08b12340 gas/testsuite/gas/i386/nops-3.d +e2e942ec18e872d0b484adccc83ecbf1 gas/testsuite/gas/i386/nops-3.s +ba2f203a1dfb65d33e88609107e446c7 gas/testsuite/gas/i386/nops-4-i386.d +0e0158a3a5deb5ae71501c21a65576b5 gas/testsuite/gas/i386/nops-4-i686.d +1b4aa6eb8ab48e67516865f2bb1d3b8c gas/testsuite/gas/i386/nops-4.d +0398244609681bda2062cb83cda985ad gas/testsuite/gas/i386/nops-4.s +be8d1c29fe2460cd77dda65b5feec594 gas/testsuite/gas/i386/nops-4a-i686.d +02e4570b8ca23c5e910fb74faa9ec631 gas/testsuite/gas/i386/nops-5-i686.d +41ac30746d51e82e4d7aef3e516f1cfc gas/testsuite/gas/i386/nops-5.d +8d916471b35b3710cce5fb2721841320 gas/testsuite/gas/i386/nops-5.s +ff3c1c93f90d9087be51e53d4025ed66 gas/testsuite/gas/i386/nops-6.d +4615c74bcbd0f731edbd5bae47389ff0 gas/testsuite/gas/i386/nops-6.s +9eb66d9f6a5447c410317912af428fff gas/testsuite/gas/i386/nops.d +49a629575fb35d8e4bf06ac877f30d5e gas/testsuite/gas/i386/nops.s +33932fd124b1f4ad06740656ba7247ce gas/testsuite/gas/i386/nops16-1.d +f32aad7991cf969bca5f315431ac3318 gas/testsuite/gas/i386/nops16-1.s +cb9b4ea0047dc619ac8138b43bc36504 gas/testsuite/gas/i386/opcode-intel.d +3cbc8c1d75684a436f58e3da7d64ae56 gas/testsuite/gas/i386/opcode-suffix.d +3909078572824bd0fb70e5fa20e5867d gas/testsuite/gas/i386/opcode.d +e31d78e87c6aba989be9ce4d285c9ccb gas/testsuite/gas/i386/opcode.s +419a77b5e4fee4bf64f776b0e0df2443 gas/testsuite/gas/i386/opts-intel.d +8df6448b4aba8bfe18866c3541c34fae gas/testsuite/gas/i386/opts.d +4727954d4a6c2602077eec2e70077137 gas/testsuite/gas/i386/opts.s +1c91055fbce0587f02a34bb69c2165bb gas/testsuite/gas/i386/padlock.d +e4a72b1d388038cb07dd34cdc0a38452 gas/testsuite/gas/i386/padlock.s +b71a7c0a1c6237878c6a6c534563445a gas/testsuite/gas/i386/pcrel.d +2a069b87359bb962df261b870b939b15 gas/testsuite/gas/i386/pcrel.s +dd5c556919ef2c377a504fa4d999a8a6 gas/testsuite/gas/i386/pr12589-1.d +4b6eb108930d23fa1f582b5a91ff251e gas/testsuite/gas/i386/pr12589-1.s +beead5b7e8679add4114a22d147ca430 gas/testsuite/gas/i386/prefix.d +3a00b6ea2b8f8f6b17136c2735787e71 gas/testsuite/gas/i386/prefix.s +f9363ec16769b2e350e2cdf930d90785 gas/testsuite/gas/i386/rdrnd-intel.d +a7a3a52e590fab01fcde1b0a17731b7e gas/testsuite/gas/i386/rdrnd.d +43766dcc6cb3491e198e4d07c9e9889d gas/testsuite/gas/i386/rdrnd.s +85d24187a437cd04fddf138f5495c0e5 gas/testsuite/gas/i386/reg-intel.d +9664bb4ff4175097f7da9fbea55a7a31 gas/testsuite/gas/i386/reg.d +dee1fc5bee092a6bfbe376415a1bef6f gas/testsuite/gas/i386/reg.s +73fc6f379a60b1c67af137c67709a8ee gas/testsuite/gas/i386/relax-1.d +298779399b17b78f52c1fdcf886b46a1 gas/testsuite/gas/i386/relax-1.s +4fae09334600a881a60a28f2c5dfc2f3 gas/testsuite/gas/i386/relax-2.d +03950f23a946b75f9accb17e47326341 gas/testsuite/gas/i386/relax-2.s +88ff146a0aed9dc67489b41b0fb6f3cb gas/testsuite/gas/i386/relax.d +af8b77b677b0bd3471e7ca21a60c445a gas/testsuite/gas/i386/relax.s +cd3c7378640156c530cbd28aa6ee9e02 gas/testsuite/gas/i386/reloc.d +785e2743dba0137e0235c3a40f7ed72b gas/testsuite/gas/i386/reloc.s +bcce880a7c30b65850e47c08f64f318b gas/testsuite/gas/i386/reloc32.d +ce14bb73228ed5e15623e58140110f06 gas/testsuite/gas/i386/reloc32.l +b4e477ea59987907644527d7bee16e72 gas/testsuite/gas/i386/reloc32.s +280669dae3c92b261776c12df35ef7e1 gas/testsuite/gas/i386/reloc64.d +659181965dae7c7eb05fb37e42c3dab8 gas/testsuite/gas/i386/reloc64.l +c1ef724b0348d32279094b876a0b2d7f gas/testsuite/gas/i386/reloc64.s +7147d515916f972e12b9b60c4757f5b2 gas/testsuite/gas/i386/rep-suffix.d +dc27e5546173842a2a19812f95a809d9 gas/testsuite/gas/i386/rep-suffix.s +165b35bf517c13862a58bf7133d403e1 gas/testsuite/gas/i386/rep.d +58db4a5760d1bc9deac225c520b3489d gas/testsuite/gas/i386/rep.s +68f136651bb2441af19136053d7f3192 gas/testsuite/gas/i386/rex.d +fcf6d1c7d088d63ac70f079baf51bae5 gas/testsuite/gas/i386/rex.s +659ad43e992ab39f00c08bf853cffd61 gas/testsuite/gas/i386/rexw.d +c73a446ebdac9845f2d0f061e6ce30d3 gas/testsuite/gas/i386/rexw.s +d72937f5ee7c1feeecf96248fe38b509 gas/testsuite/gas/i386/secrel.d +ae437b9d8fe2c177c2672e5ca17b9942 gas/testsuite/gas/i386/secrel.s +49756badbd07c6541f231a7a4a0f869a gas/testsuite/gas/i386/segment.l +c31999cdae4d3da1d2eedfd3d840b32c gas/testsuite/gas/i386/segment.s +6404e1eb22da46c6a4c172ea467bbef6 gas/testsuite/gas/i386/sib-intel.d +9a3bcd542318f16d548e4955e4645bc9 gas/testsuite/gas/i386/sib.d +b66b458374927f587de8154fba02388a gas/testsuite/gas/i386/sib.s +a992b3c02920c37bb352e29dd9349769 gas/testsuite/gas/i386/simd-intel.d +3508f1f7b92e9e7150a9a9993fae168b gas/testsuite/gas/i386/simd-suffix.d +030c1b7ab763fc84598d3f520477a33f gas/testsuite/gas/i386/simd.d +76e857d973e2cba0a8533b8948f846fb gas/testsuite/gas/i386/simd.s +210c38789f8d91dd2bb3e7e7dbed15bd gas/testsuite/gas/i386/smx.d +ab961d062b9e42924d1ce445461acdbc gas/testsuite/gas/i386/smx.s +c5940fc5532e5f9b71392c5eec523273 gas/testsuite/gas/i386/space1.l +adb7dc5186c781e6abf5370324bfabe6 gas/testsuite/gas/i386/space1.s +2acce4070701696412e9818cb64d4a8f gas/testsuite/gas/i386/sse-check-error.l +b3107e3ecbe1f95d1979dad18d08e9bd gas/testsuite/gas/i386/sse-check-error.s +d5186a3bed5e64b4747f40dfa2482300 gas/testsuite/gas/i386/sse-check-none.d +002cc480328868c3f768c18a63359ecb gas/testsuite/gas/i386/sse-check-none.s +5332e3e8b4b2f145003a96c61d344bea gas/testsuite/gas/i386/sse-check-warn.d +b62430479db336d229bd4f5a96753817 gas/testsuite/gas/i386/sse-check-warn.e +b4427b60d5725e027a564e6286de0161 gas/testsuite/gas/i386/sse-check.d +d2acfb5cec64db4d416e8802c558aae4 gas/testsuite/gas/i386/sse-check.s +d4a02ecdf169c29e7b9bc2c179d742ec gas/testsuite/gas/i386/sse-noavx.d +a9a2369892572dc748ed0b4fc41a929e gas/testsuite/gas/i386/sse-noavx.s +44bd52b79c6f71a7d20853ceb70c6469 gas/testsuite/gas/i386/sse2.d +526d36a3997a81ba5954ef83a247b2a9 gas/testsuite/gas/i386/sse2.s +4bce69df6dc7d2ed41562a539bc09b2f gas/testsuite/gas/i386/sse2avx-opts-intel.d +692e107b09e32118499d5bf32a9bc193 gas/testsuite/gas/i386/sse2avx-opts.d +37c21f9ada747da880bfb214da9e6dc6 gas/testsuite/gas/i386/sse2avx.d +0a94d8e1bb6c4a3c561f519952e1e471 gas/testsuite/gas/i386/sse2avx.s +e29d70b6aa1e695bd768f8e267849e50 gas/testsuite/gas/i386/sse3.d +5a1f10a03c575e38b20768f76809e343 gas/testsuite/gas/i386/sse3.s +a8e1a6346c7e4bc99e311492a78cc5c2 gas/testsuite/gas/i386/sse4_1-intel.d +33832b995dfbf2925f9d238e5ec3c838 gas/testsuite/gas/i386/sse4_1.d +b1b71079c7459c816607fb29cbede17a gas/testsuite/gas/i386/sse4_1.s +36eb0028140d7c6c47196b2c076723eb gas/testsuite/gas/i386/sse4_2-intel.d +93af119559a52ebf85d97cb372ad5eab gas/testsuite/gas/i386/sse4_2.d +ec5956da945fcc83b87996dcaabb37cc gas/testsuite/gas/i386/sse4_2.s +c10822c38c0829d874e2ab8397c27c4c gas/testsuite/gas/i386/ssemmx2.d +e73e0f652b697100e02db9b419b06cd0 gas/testsuite/gas/i386/ssemmx2.s +b8f4c55f5234aeb290314b2d83edd0a3 gas/testsuite/gas/i386/ssse3.d +ed0d94e9192c9372bab004595128cbde gas/testsuite/gas/i386/ssse3.s +e27241e6070578f0f8cce034161228b0 gas/testsuite/gas/i386/string-bad.l +e8f03f631e9257f500cf01931f64f707 gas/testsuite/gas/i386/string-bad.s +e5d93dde85f1490393cb8c822f498d7b gas/testsuite/gas/i386/string-ok.d +7841aac9467176a21b691ef1f40adedf gas/testsuite/gas/i386/string-ok.e +3d50d86c37dbe01fd17bb4d1218749de gas/testsuite/gas/i386/string-ok.s +63e6c02ab5f64af6dd5235e3c374ac08 gas/testsuite/gas/i386/sub.d +833f164bd60a9f7c4db8ccf2b0bf711b gas/testsuite/gas/i386/sub.s +255ecabbcbb774d2b711f9c2a6467c2b gas/testsuite/gas/i386/suffix.d +cc898efb930fe1387f95ddbc6c296877 gas/testsuite/gas/i386/suffix.s +f1360fbb543b1013b19d7262aae59e6f gas/testsuite/gas/i386/svme.d +915ae3844040d7de954451e1b08f6a57 gas/testsuite/gas/i386/svme.s +eee803f12a554f2eb62215d142149b50 gas/testsuite/gas/i386/svme64.d +16b726a0ab15c9e41d15ea931a8f789e gas/testsuite/gas/i386/tbm-intel.d +94e41da3fe5e40f88558b8d684a0c912 gas/testsuite/gas/i386/tbm.d +e329028a576c858fefba49b0529cc68b gas/testsuite/gas/i386/tbm.s +263666276bb58f1bf236a81bdec1b54b gas/testsuite/gas/i386/tlsd.d +6276d7a325e095cb7d76ae4bc0664de9 gas/testsuite/gas/i386/tlsd.s +6b3d04bba181b4c798d810f19600c76c gas/testsuite/gas/i386/tlsnopic.d +57fea1ba6cb8614eb9cf26948a633c80 gas/testsuite/gas/i386/tlsnopic.s +e014b2640b81c8867b9b28162242eccf gas/testsuite/gas/i386/tlspic.d +6e8c2126aec7e76808eef1c12cfd676d gas/testsuite/gas/i386/tlspic.s +6b5d014a42b77623734a199666d99bb1 gas/testsuite/gas/i386/vmx.d +f567d2fe791abd9688dd01e4425c5165 gas/testsuite/gas/i386/vmx.s +5e753c7bc49fa309e62b92585e011e08 gas/testsuite/gas/i386/white.l +305b7d730a90ea5ac8fb330a3bf13fec gas/testsuite/gas/i386/white.s +c3cd7c105b9a66cee5d6bc4e23c37867 gas/testsuite/gas/i386/x86-64-addr32-intel.d +2cece402fabefaf8c047415710ee45ff gas/testsuite/gas/i386/x86-64-addr32.d +4d31d6588877be06398af1634ee64f11 gas/testsuite/gas/i386/x86-64-addr32.s +896b54b9ab0a9ea541d5fc9b4b82438b gas/testsuite/gas/i386/x86-64-aes-intel.d +48a0ebaa8c9aac9ededb58da073622da gas/testsuite/gas/i386/x86-64-aes.d +3fb7db5827fe31cc0d16326df78ba65b gas/testsuite/gas/i386/x86-64-aes.s +f15f671c7bd802a582f8926994aee1d9 gas/testsuite/gas/i386/x86-64-amdfam10.d +41c630bb8d9011efd9ed2c5a9865247e gas/testsuite/gas/i386/x86-64-amdfam10.s +d511c53578d546bbd365d601bde6f476 gas/testsuite/gas/i386/x86-64-arch-1.d +5877d9937eb3a902a284a77ee38cbfc1 gas/testsuite/gas/i386/x86-64-arch-1.s +c18ed88b5b6a6d6ac493aefd79c93d0a gas/testsuite/gas/i386/x86-64-arch-2-lzcnt.d +ad3aafd7ed68b4704900f2c062b2e422 gas/testsuite/gas/i386/x86-64-arch-2.d +9fc9d686e682bea822a026377256278a gas/testsuite/gas/i386/x86-64-arch-2.s +3b42f87f3f86bd791bf6f88bab9edb02 gas/testsuite/gas/i386/x86-64-avx-gather-intel.d +98e74b0a51558787cb0572c38ee07680 gas/testsuite/gas/i386/x86-64-avx-gather.d +ab783a919c96165d6060c621ea1f369b gas/testsuite/gas/i386/x86-64-avx-gather.s +d06958988acae2d053b6192eb478a605 gas/testsuite/gas/i386/x86-64-avx-intel.d +80954342266c024ec37c5a896698d95d gas/testsuite/gas/i386/x86-64-avx-scalar-intel.d +820feabbb8a518d840d2664d1cc119e8 gas/testsuite/gas/i386/x86-64-avx-scalar.d +172024d18e68679c0b3d1c1e85290d99 gas/testsuite/gas/i386/x86-64-avx-scalar.s +05e5126338040a91e74a5ce32698e9aa gas/testsuite/gas/i386/x86-64-avx-swap-intel.d +376fde462fbfc57f900a79e05d751af4 gas/testsuite/gas/i386/x86-64-avx-swap.d +791fc7ec51e7b0a8447e4d33ba45fc7f gas/testsuite/gas/i386/x86-64-avx-swap.s +9f126e0a184cb48a11fc8afc2c7475d2 gas/testsuite/gas/i386/x86-64-avx.d +ad1c14483a554397bc4f01ca22f66aa3 gas/testsuite/gas/i386/x86-64-avx.s +b37b58fe6eef9d307c5306b0f60c8916 gas/testsuite/gas/i386/x86-64-avx2-intel.d +5313e418221d24e63c58d95f87510bee gas/testsuite/gas/i386/x86-64-avx2.d +34febabee466af149b330c64b83bd932 gas/testsuite/gas/i386/x86-64-avx2.s +a4513f45130ade2b6db37295b2fc5f3e gas/testsuite/gas/i386/x86-64-avx256int-intel.d +9ea867de6cd0be10cd7a2cbe621f9e53 gas/testsuite/gas/i386/x86-64-avx256int.d +683ac44a9918fc498de36dcd30b79395 gas/testsuite/gas/i386/x86-64-avx256int.s +00374533429542db7db8a7703a57f30a gas/testsuite/gas/i386/x86-64-bmi-intel.d +cf123707d0b94f2c2c3d4a752b804ee7 gas/testsuite/gas/i386/x86-64-bmi.d +a1a05256c61fedaffa9068350c2e649c gas/testsuite/gas/i386/x86-64-bmi.s +09eb75575fe2158c1634100977167f15 gas/testsuite/gas/i386/x86-64-bmi2-intel.d +994b20437eb312a444f54af9e5b2b997 gas/testsuite/gas/i386/x86-64-bmi2.d +fd4cf2e268fa18ad5c90aadcb0eb95c7 gas/testsuite/gas/i386/x86-64-bmi2.s +8c319f894375c4bd2f8a12f1924a3001 gas/testsuite/gas/i386/x86-64-branch.d +c4efdf33b6f56c1fddeba9bde36023a1 gas/testsuite/gas/i386/x86-64-branch.s +fd4a09f7c9d009aff7f0daf052a5d0d4 gas/testsuite/gas/i386/x86-64-cbw-intel.d +bab2814cc9341ef0bd1c5836487daafa gas/testsuite/gas/i386/x86-64-cbw.d +7cb413e2c9874960869757f756a06f23 gas/testsuite/gas/i386/x86-64-cbw.s +8a11d39ecd63e330283964f2eafc363a gas/testsuite/gas/i386/x86-64-clmul-intel.d +89e93c2801a40b41a71536cb2f480bd1 gas/testsuite/gas/i386/x86-64-clmul.d +cbcd06603aae8ae9c0cdf2608186957a gas/testsuite/gas/i386/x86-64-clmul.s +76361e45fe248ed398757ce9a8c0fa2e gas/testsuite/gas/i386/x86-64-crc32-intel.d +fed4ab27f975a72592a414b0047c50be gas/testsuite/gas/i386/x86-64-crc32.d +ed77424d334554e3af2ab65b4927029b gas/testsuite/gas/i386/x86-64-crc32.s +408a227f72aef795f76d1d6d91d2fb5b gas/testsuite/gas/i386/x86-64-crx-suffix.d +c45b4527c3859f718512fd1b7d4d59f2 gas/testsuite/gas/i386/x86-64-crx.d +c1aefb6d2c81ed0ab02401fe81cef10b gas/testsuite/gas/i386/x86-64-crx.s +1032228937b3c89c054aaa3d57409641 gas/testsuite/gas/i386/x86-64-disp-intel.d +1770f507d85c5d10503e2387e31a86de gas/testsuite/gas/i386/x86-64-disp.d +b80fd8ed96178c27c38fd768587671dc gas/testsuite/gas/i386/x86-64-disp.s +0320dd76a79dc76c2808ab1b3c969644 gas/testsuite/gas/i386/x86-64-disp32.d +b8e1d12bcddd07a2b7516cf45a695262 gas/testsuite/gas/i386/x86-64-disp32.s +7ea4308b329685e530be74addaac7c94 gas/testsuite/gas/i386/x86-64-drx-suffix.d +601a338970ce4ec3f3105cd754da7d70 gas/testsuite/gas/i386/x86-64-drx.d +3a07eba6a88df41e1026628ed70fc0f7 gas/testsuite/gas/i386/x86-64-drx.s +f1f851027fb5e26cd59acde5d67e0be1 gas/testsuite/gas/i386/x86-64-dw2-compress-2.d +8b4cd73338e8ca5b71d745d09a42ba02 gas/testsuite/gas/i386/x86-64-dw2-compress-2.s +da3dd52dd882fbeb25b06ac67e7a57c9 gas/testsuite/gas/i386/x86-64-ept-intel.d +d0bf3bf279651bd316c93ff43c463544 gas/testsuite/gas/i386/x86-64-ept.d +af5153ea1d101e1a57f06fb8084d0587 gas/testsuite/gas/i386/x86-64-ept.s +54787e1ae9043a2e9eecf6bb14ba3d23 gas/testsuite/gas/i386/x86-64-f16c-intel.d +5de961f1b201848fe38c976a0e626450 gas/testsuite/gas/i386/x86-64-f16c.d +f815bb815cb6b136cd3a3827fa9da925 gas/testsuite/gas/i386/x86-64-f16c.s +b818e0c05dfcd88bad6f2f6a945fabb7 gas/testsuite/gas/i386/x86-64-fma-intel.d +3bf22fa11ee637992ee90ffca0330390 gas/testsuite/gas/i386/x86-64-fma-scalar-intel.d +b62146f5453748b8af305f2d60226bc6 gas/testsuite/gas/i386/x86-64-fma-scalar.d +5af787ea3662a03228126d86723ad155 gas/testsuite/gas/i386/x86-64-fma-scalar.s +4b646df079f1155c762a3585445c0370 gas/testsuite/gas/i386/x86-64-fma.d +4487a492b1ccc7f563936720d6030640 gas/testsuite/gas/i386/x86-64-fma.s +d225c8cfa138a31d7d590b6e2467f9f4 gas/testsuite/gas/i386/x86-64-fma4.d +d7a5ee53a09a5ccc309e8e8ab4935d5d gas/testsuite/gas/i386/x86-64-fma4.s +bb6f2cb11b9ca6bd7036ce32b1ffd9d1 gas/testsuite/gas/i386/x86-64-fsgs-intel.d +51e77697056473e2482152a41ef64588 gas/testsuite/gas/i386/x86-64-fsgs.d +cfdeed03e85153bd0935f7e15031d9b2 gas/testsuite/gas/i386/x86-64-fsgs.s +40e721419538b1a411f0e4cc4f676926 gas/testsuite/gas/i386/x86-64-fxsave-intel.d +cd4620df6f7617d5b76aa2787bb83f22 gas/testsuite/gas/i386/x86-64-fxsave.d +514a99c306d6be131106fffaad17a286 gas/testsuite/gas/i386/x86-64-fxsave.s +f3980dbba32c8b1971090a7171fc74cf gas/testsuite/gas/i386/x86-64-gidt.d +a7520374ab1003bb34da98f1092259f4 gas/testsuite/gas/i386/x86-64-gidt.s +b991cb403890fff249f739f2c7ffc2b6 gas/testsuite/gas/i386/x86-64-ifunc.d +3e36e6d86634f92f1f6291467be0f793 gas/testsuite/gas/i386/x86-64-intel64.d +1a65340d4c294e0fa94570a988000db6 gas/testsuite/gas/i386/x86-64-intel64.s +b82675e46ad27cc7822c6d6d0a48e496 gas/testsuite/gas/i386/x86-64-inval-avx.l +d188ad45ca39e2008505d054ac718c20 gas/testsuite/gas/i386/x86-64-inval-avx.s +a3d6edef82b387f3ca0976ed140df294 gas/testsuite/gas/i386/x86-64-inval-crc32.l +79aeffa32888a76dda8bec9573539359 gas/testsuite/gas/i386/x86-64-inval-crc32.s +a2b4be01be260e759dc8d4059dce61cf gas/testsuite/gas/i386/x86-64-inval-ept.l +fd4e0c3bbf6678f11083a48810f9fe6a gas/testsuite/gas/i386/x86-64-inval-ept.s +8109306ce796d59a855ee2075aff143e gas/testsuite/gas/i386/x86-64-inval-invpcid.l +4a1fdd3f2764d0f0eace322c197d5617 gas/testsuite/gas/i386/x86-64-inval-invpcid.s +f4a31debb295755ed98dcff0d33364e3 gas/testsuite/gas/i386/x86-64-inval-movbe.l +a310f52211c8a33fa99f7b161f578ab6 gas/testsuite/gas/i386/x86-64-inval-movbe.s +162538feb667384563ddb3678c76eea7 gas/testsuite/gas/i386/x86-64-inval-seg.l +aae525360b98db49675b427a0fa29d0f gas/testsuite/gas/i386/x86-64-inval-seg.s +6a7952345cc6373e0633ada1849cb761 gas/testsuite/gas/i386/x86-64-inval.l +df5bd8c1c597a738108b55fca38ba5ce gas/testsuite/gas/i386/x86-64-inval.s +f3ef80b96f2260ec2379202332b7ca17 gas/testsuite/gas/i386/x86-64-invpcid-intel.d +3e53e9dddabf9609e1354c1a4fc6fe13 gas/testsuite/gas/i386/x86-64-invpcid.d +fa312942aa9bc43bf137f70f5ff62487 gas/testsuite/gas/i386/x86-64-invpcid.s +207f557c92d6401ba7abc31ef565b3a9 gas/testsuite/gas/i386/x86-64-io-intel.d +bc0c7c65971adbb31b6578d3735e06f8 gas/testsuite/gas/i386/x86-64-io-suffix.d +a9ba872efa989a23615d35f5714b4842 gas/testsuite/gas/i386/x86-64-io.d +b41fdb1ead1f865980afbb60003170e5 gas/testsuite/gas/i386/x86-64-io.s +a2343b7fb5016a700374004853422f2c gas/testsuite/gas/i386/x86-64-localpic.d +72d3840189715b3135f0c0f813173f51 gas/testsuite/gas/i386/x86-64-localpic.s +bb6a0e9ffcc1b7b608131bb2c950cdbb gas/testsuite/gas/i386/x86-64-lock-1-intel.d +f5c2950078d64dec53bdcc74469819ee gas/testsuite/gas/i386/x86-64-lock-1.d +f43153fb2619da317aae1ec777a4b319 gas/testsuite/gas/i386/x86-64-lock-1.s +b8f3cf2cea0a23c51931bb390fefd78a gas/testsuite/gas/i386/x86-64-lockbad-1.l +aff509f67e9046da980e945bfbe5497c gas/testsuite/gas/i386/x86-64-lockbad-1.s +facc341b4de4956c632ba17a7a3ec338 gas/testsuite/gas/i386/x86-64-long-1-intel.d +2da4e7265772248a90334877aca7dd12 gas/testsuite/gas/i386/x86-64-long-1.d +865539e94446ad4efd756579a27fba89 gas/testsuite/gas/i386/x86-64-long-1.s +f22c6294fbee5a304e5fb648792e73cd gas/testsuite/gas/i386/x86-64-lwp.d +65192bf4bfcafd84a2f687d13684141c gas/testsuite/gas/i386/x86-64-lwp.s +8c09cea912742744d023e341487caa2c gas/testsuite/gas/i386/x86-64-mem-intel.d +26bb425fdbe17360fe2d8ae648dcc112 gas/testsuite/gas/i386/x86-64-mem.d +b203d4a0600350c32fc158b31b557118 gas/testsuite/gas/i386/x86-64-mem.s +61e1b53a504761449a119ff583bbd567 gas/testsuite/gas/i386/x86-64-movbe-intel.d +ee8078df09bdd71739be7304418bb861 gas/testsuite/gas/i386/x86-64-movbe.d +901ae1e6492d264d4e0f0572ec7385d8 gas/testsuite/gas/i386/x86-64-movbe.s +fd10486938952d90b3d194faf5d7c9f6 gas/testsuite/gas/i386/x86-64-nops-1-bdver1.d +4a83154b9dc3a825c1783412e06cbc7b gas/testsuite/gas/i386/x86-64-nops-1-bdver2.d +c086871015486490e83c27be83809dfb gas/testsuite/gas/i386/x86-64-nops-1-core2.d +07b090b42d825a9705ff6ab76c32f22b gas/testsuite/gas/i386/x86-64-nops-1-g64.d +3cc072985433b4982a88772dd6bf139a gas/testsuite/gas/i386/x86-64-nops-1-k8.d +af24f4708195e759b01739728c35dc70 gas/testsuite/gas/i386/x86-64-nops-1-nocona.d +b216e15f6699624ab094d8fb795b3cfb gas/testsuite/gas/i386/x86-64-nops-1-pentium.d +8ad0e28a3aebc21f95a3a8b5cad21f2c gas/testsuite/gas/i386/x86-64-nops-1.d +ad9e8e0c32e1a6560b062553bac14943 gas/testsuite/gas/i386/x86-64-nops-2.d +a24b8011ca8a4fc24b90ea2159fbf178 gas/testsuite/gas/i386/x86-64-nops-3.d +070865f6d6683e1f111d467091298a48 gas/testsuite/gas/i386/x86-64-nops-4-core2.d +9cef0e02c0747da2fb7231aeb2178020 gas/testsuite/gas/i386/x86-64-nops-4-k8.d +3c84568dfc6dfa56129674b1242ebcc5 gas/testsuite/gas/i386/x86-64-nops-4.d +fbb38b9b2bbb0003846c9f8dac33ec41 gas/testsuite/gas/i386/x86-64-nops-5-k8.d +c31880b461e256399ff73ef4ba47aa5d gas/testsuite/gas/i386/x86-64-nops-5.d +c23c056fa6d755b9134cb8da66b25299 gas/testsuite/gas/i386/x86-64-nops.d +00d30d117160daed04e8aae9b6902e3b gas/testsuite/gas/i386/x86-64-nops.s +41de16a767ee52fe8c4b2a6079f3a334 gas/testsuite/gas/i386/x86-64-opcode-inval-intel.d +683397974ca1a61b3ed636965f138885 gas/testsuite/gas/i386/x86-64-opcode-inval.d +12f4d57eb3aeae85595763edafcbf4c4 gas/testsuite/gas/i386/x86-64-opcode-inval.s +0aaf3ce9232975532d630391d0c1ef49 gas/testsuite/gas/i386/x86-64-opcode.d +73612ec8e104e706a1ec9dcefa329317 gas/testsuite/gas/i386/x86-64-opcode.s +ece6d2dc04373d49a07edc839f22380b gas/testsuite/gas/i386/x86-64-opts-intel.d +3bdcb51cc99a9b8fe0bf3b0f5c4ba0c7 gas/testsuite/gas/i386/x86-64-opts.d +a9360f523521034d3b2b6eca492e1dff gas/testsuite/gas/i386/x86-64-opts.s +fcfa76b77a04ec8990457e98374564ce gas/testsuite/gas/i386/x86-64-pcrel.d +0102d6957be1a24ff2c324dbb1b2a850 gas/testsuite/gas/i386/x86-64-pcrel.s +7fb970b61c4a6637d1160822b9c5a7ba gas/testsuite/gas/i386/x86-64-rdrnd-intel.d +5c1b9124898c4b986a1001adfdbc3a51 gas/testsuite/gas/i386/x86-64-rdrnd.d +cbf9cf7c561c50b0984846d36eae681c gas/testsuite/gas/i386/x86-64-rdrnd.s +9b06d374617d60f3a675354cc82f715d gas/testsuite/gas/i386/x86-64-reg-intel.d +03b2d7204d96cb46b316c9311b280f4a gas/testsuite/gas/i386/x86-64-reg.d +e7a1d00ff46cd6b3c7af47e81b2c71e8 gas/testsuite/gas/i386/x86-64-reg.s +69ea2f386da120feddc84322100d86e3 gas/testsuite/gas/i386/x86-64-relax-1.d +08a56d5d3e02804c0a0e6b9654805d64 gas/testsuite/gas/i386/x86-64-relax-1.s +294a7d75648643e6d32e8e3fc60c900b gas/testsuite/gas/i386/x86-64-rep-suffix.d +3ad8098f3d537ceba97b5b8b22a406e3 gas/testsuite/gas/i386/x86-64-rep-suffix.s +ce4edb0506bfb1937b3a10a7e3e818d6 gas/testsuite/gas/i386/x86-64-rep.d +0230ea92a85352895e515489f8d1b6e2 gas/testsuite/gas/i386/x86-64-rep.s +282412e30927c979e7ec80f2ff628621 gas/testsuite/gas/i386/x86-64-rip-intel.d +fa314cbc7e9de53772c530b30157f65e gas/testsuite/gas/i386/x86-64-rip.d +722677b05d3cd317657a418b4f5ff9ed gas/testsuite/gas/i386/x86-64-rip.s +8dc4e34c9b1fe8d7582db1437973c356 gas/testsuite/gas/i386/x86-64-segment.l +93582bffb446e522b0e4c96c89d2d901 gas/testsuite/gas/i386/x86-64-segment.s +28bbb19963a9f7f45e93c2c272b50fbe gas/testsuite/gas/i386/x86-64-sib-intel.d +fac2672f643fdcf2deee16c52eaebaab gas/testsuite/gas/i386/x86-64-sib.d +9e14a1b044d5ab4cadce1af8beaff84e gas/testsuite/gas/i386/x86-64-sib.s +2afd9a88eca247565be74d977ac1e69d gas/testsuite/gas/i386/x86-64-simd-intel.d +b79357dd1880f27de5a407c43d0ac66d gas/testsuite/gas/i386/x86-64-simd-suffix.d +27b8c066889fd3aab885c6a79ac40ef0 gas/testsuite/gas/i386/x86-64-simd.d +932fb4785c354cd5757f408f7488d85a gas/testsuite/gas/i386/x86-64-simd.s +2acce4070701696412e9818cb64d4a8f gas/testsuite/gas/i386/x86-64-sse-check-error.l +b3107e3ecbe1f95d1979dad18d08e9bd gas/testsuite/gas/i386/x86-64-sse-check-error.s +661674d3bc8da3d09f060de41ffea949 gas/testsuite/gas/i386/x86-64-sse-check-none.d +d5bc96d7fccc04de9b014d9e958edf15 gas/testsuite/gas/i386/x86-64-sse-check-warn.d +8ec24ada69da5dae7ef3de0d416a3343 gas/testsuite/gas/i386/x86-64-sse-check.d +71c5eff10e0c5d7af2fc929d131dfd69 gas/testsuite/gas/i386/x86-64-sse-noavx.d +6e95bf187d1d5a90824236bec3f40f8e gas/testsuite/gas/i386/x86-64-sse-noavx.s +07b14f230e4b909755529333b0e9e959 gas/testsuite/gas/i386/x86-64-sse2avx-opts-intel.d +130bb3f6f6bf30a8f18399e97d0721b6 gas/testsuite/gas/i386/x86-64-sse2avx-opts.d +65178da268630d21977edc9ad1a27c35 gas/testsuite/gas/i386/x86-64-sse2avx.d +e737a9cde96e0acc0b05613d5623ff76 gas/testsuite/gas/i386/x86-64-sse2avx.s +a604d3babf870782b67de50cbd33af9a gas/testsuite/gas/i386/x86-64-sse3.d +5d99b531c8604a1e6bc9dbd0d7badd2c gas/testsuite/gas/i386/x86-64-sse3.s +06e6a782cf8587c1c694b5d45a4185bd gas/testsuite/gas/i386/x86-64-sse4_1-intel.d +82ee7d8d95134bcf793b0ef7dae56246 gas/testsuite/gas/i386/x86-64-sse4_1.d +2d21a1ac44c06d3cbb312bd577128cd2 gas/testsuite/gas/i386/x86-64-sse4_1.s +2cc52dd756b84bca3107ad34947a1828 gas/testsuite/gas/i386/x86-64-sse4_2-intel.d +2009480df2cc1bd49fa9fff12d5a0ab6 gas/testsuite/gas/i386/x86-64-sse4_2.d +1c30ca3e112d8d50e21868014efe7506 gas/testsuite/gas/i386/x86-64-sse4_2.s +f7de2a101d07bd6d5badf4f04a54c089 gas/testsuite/gas/i386/x86-64-ssse3.d +e626aa86fe2d9cd3c1458fcc2326bcb2 gas/testsuite/gas/i386/x86-64-ssse3.s +bd47dfa2daaf66b78a3540dc95438c2e gas/testsuite/gas/i386/x86-64-stack-intel.d +45fe23990bf360d603c91628892aae33 gas/testsuite/gas/i386/x86-64-stack-suffix.d +9a320248e1c4cf156ebd2eeb4c0ff190 gas/testsuite/gas/i386/x86-64-stack.d +c1424bba614929e99fa1271fa973035f gas/testsuite/gas/i386/x86-64-stack.s +b35fdffa4ab966fce27f87ecee3b1c00 gas/testsuite/gas/i386/x86-64-tbm-intel.d +908bdffcf04087bb53d54486dbb8b742 gas/testsuite/gas/i386/x86-64-tbm.d +e3f8369e2b62c2e731f3dd732dbf2980 gas/testsuite/gas/i386/x86-64-tbm.s +3d44f651eec84e5de4399aeda9d26bf8 gas/testsuite/gas/i386/x86-64-unwind.d +8d64d6d63476e651d51e8675349b18aa gas/testsuite/gas/i386/x86-64-unwind.s +2c6b752faa6d31fd1e4f1e37d70413d1 gas/testsuite/gas/i386/x86-64-vmx.d +993cb43ba3bb5e400fb34ce7bdec1d05 gas/testsuite/gas/i386/x86-64-vmx.s +cfe756b9e9133a917d6cde5925f527be gas/testsuite/gas/i386/x86-64-w64-pcrel.d +42b0672374dd1e60e36754c4e68fdfb7 gas/testsuite/gas/i386/x86-64-xop.d +21ccad8f83a34690bde5fb58bdeaa8a3 gas/testsuite/gas/i386/x86-64-xop.s +6864f95fc602a7e62a8547affd4aa13c gas/testsuite/gas/i386/x86-64-xsave-intel.d +96aa878f6092e2a2f81cd569d19ac20d gas/testsuite/gas/i386/x86-64-xsave.d +38ccf97adabd0fab3e1b0b9c0151f80c gas/testsuite/gas/i386/x86-64-xsave.s +dcb5db4be19f6dac9e7592a8ca287271 gas/testsuite/gas/i386/x86_64.d +e5f0729957b1ccfe5d1e53627f1ec8c4 gas/testsuite/gas/i386/x86_64.s +ae4b2b29255e275badc694c9e2a5277a gas/testsuite/gas/i386/xop.d +699962e500ee74d43bb5c8a3c5db23b9 gas/testsuite/gas/i386/xop.s +5fcc3e737c2469401a12f25e608f6146 gas/testsuite/gas/i386/xsave-intel.d +fcca61b167124ff4360bed7b09de35d2 gas/testsuite/gas/i386/xsave.d +4c4aebcb24bf60e92bdc02ebee85c740 gas/testsuite/gas/i386/xsave.s +f5ad41f835f6e2d3ba8795a4f7dec86f gas/testsuite/gas/i860/bitwise.d +2b774a4f549067873f0af07fb9de56a3 gas/testsuite/gas/i860/bitwise.s +9828012860f1606656f7f365218dc2cf gas/testsuite/gas/i860/branch.d +f16bd2426aa90da0f32896bd84435eb5 gas/testsuite/gas/i860/branch.s +7000f335c5d097a92ed25701d3fc6a18 gas/testsuite/gas/i860/bte.d +117061acc7f7acf1f514a9cd358c9db8 gas/testsuite/gas/i860/bte.s +0903b2b332fbbbe09878c4169fb4ab10 gas/testsuite/gas/i860/dir-align01.d +6ae106da9f3a85291506ce9fe6e4e3c6 gas/testsuite/gas/i860/dir-align01.s +f26e1261c99d19590548ae75623cb7f6 gas/testsuite/gas/i860/dir-intel01.d +6cc636d75ee8165da9ed09918e3199bf gas/testsuite/gas/i860/dir-intel01.s +79272e9295d72e86387d67378781c814 gas/testsuite/gas/i860/dir-intel02.d +cee730e93b3c40620622b831abb15929 gas/testsuite/gas/i860/dir-intel02.s +df4b2e4160f4fedf91c0e8fde37b0b21 gas/testsuite/gas/i860/dir-intel03-err.l +5c611081998a4ada6f2e9b03043f2716 gas/testsuite/gas/i860/dir-intel03-err.s +c6c428e83407fbf5793d5af32241f564 gas/testsuite/gas/i860/dual01.d +37fd18f754ecc8344934c71f1392633e gas/testsuite/gas/i860/dual01.s +5596264e96a68a24c9be980a60a3a117 gas/testsuite/gas/i860/dual02-err.l +69f9c17232090c9ff45f1cd69c9d2001 gas/testsuite/gas/i860/dual02-err.s +19afb4e2d3c77d070c87e221647ac664 gas/testsuite/gas/i860/dual03.d +fb14098c629da7cb9313e06eed37d807 gas/testsuite/gas/i860/dual03.s +cadcac169600d1350fcdfcb64b4ad27a gas/testsuite/gas/i860/fldst01.d +97321626bfe0c85cdcf948a32397ebb7 gas/testsuite/gas/i860/fldst01.s +686a13e797f9b6a7fe7ca9f36fd9fc3b gas/testsuite/gas/i860/fldst02.d +79878081a47eef91e7f41ae24f200330 gas/testsuite/gas/i860/fldst02.s +436e4b4af356ae63d02cd500c1f745bb gas/testsuite/gas/i860/fldst03.d +02832b2cbfa7efa88955cdf1542081c3 gas/testsuite/gas/i860/fldst03.s +45eca40b3d986f598c4ebf568268fb66 gas/testsuite/gas/i860/fldst04.d +fcff1e7676d8160f47d068e2db68819e gas/testsuite/gas/i860/fldst04.s +8b2b509a36427ef1cbf6e25e76ea6b6f gas/testsuite/gas/i860/fldst05.d +dd6941ef803c746c2c77da5da56b34f8 gas/testsuite/gas/i860/fldst05.s +2caff1d8ced86429ab5a617b991a3a0f gas/testsuite/gas/i860/fldst06.d +54597c78b75cee621a2e62fd38a99dff gas/testsuite/gas/i860/fldst06.s +cf7920c9b2405c650856f4aa0374cf25 gas/testsuite/gas/i860/fldst07.d +eda94c6341d1d271fd45fc529b88d442 gas/testsuite/gas/i860/fldst07.s +d4ba4327e97b9e951f005588457caaa5 gas/testsuite/gas/i860/fldst08.d +267d98a7ae79aa3538d5b37255ab9733 gas/testsuite/gas/i860/fldst08.s +879345c052279235a62534050fe6a506 gas/testsuite/gas/i860/float01.d +6f259108ec9a42a90991b6de65b6f308 gas/testsuite/gas/i860/float01.s +bce16a53ba73f7e46f1800374d1876db gas/testsuite/gas/i860/float02.d +da9e09037beef0d229289b7719f1d730 gas/testsuite/gas/i860/float02.s +c6c100da2e2965efaefc00a111af4185 gas/testsuite/gas/i860/float03.d +07480a0c8c5c69b52a630f94bfbaf582 gas/testsuite/gas/i860/float03.s +96c3c2fc58836a46fd9a35577da09994 gas/testsuite/gas/i860/float04.d +4b14215cdbc0a5bfc8c42ab39397164b gas/testsuite/gas/i860/float04.s +8776893d98fcb46514ef9f34fa7f0e9c gas/testsuite/gas/i860/form.d +25dc56533faa254aa5b6b15fd9469565 gas/testsuite/gas/i860/form.s +8e37d5473b134e283b76beeb06d48e2f gas/testsuite/gas/i860/i860.exp +8369d3b3ff0084e16260cbfcebe66ebe gas/testsuite/gas/i860/iarith.d +8309075608d50e06ca4a159b068211f2 gas/testsuite/gas/i860/iarith.s +ef617fda8f52baa1f59cc4b57469dc8c gas/testsuite/gas/i860/ldst01.d +2f8d0b96710ed27d3ebccc9a7c32de92 gas/testsuite/gas/i860/ldst01.s +9f84376dfdea002935eb41e0ab41e6b3 gas/testsuite/gas/i860/ldst02.d +3bbfa7720f4dbd2b5d08f284efc9d841 gas/testsuite/gas/i860/ldst02.s +24948145c80649312afc2f09cba29a6e gas/testsuite/gas/i860/ldst03.d +f2d621ee2a971085de0750d7aec9ec94 gas/testsuite/gas/i860/ldst03.s +27be67914f6cb6832442727bbd91a840 gas/testsuite/gas/i860/ldst04.d +f24b9098dbb2311dad448ba672986a85 gas/testsuite/gas/i860/ldst04.s +9abbb1f8a49b98aba5cfa073d915217e gas/testsuite/gas/i860/ldst05.d +02bdbd530696cb9509284c97ba6eb99a gas/testsuite/gas/i860/ldst05.s +e125965d3c2c889c9753706b7b311b64 gas/testsuite/gas/i860/ldst06.d +a2f062ff5a39ec0fafeaeffe8f492779 gas/testsuite/gas/i860/ldst06.s +bacafd03fff48001eeaadf13b60d375f gas/testsuite/gas/i860/pfam.d +5440ae594422d037458d87a70fb7708f gas/testsuite/gas/i860/pfam.s +389acd95b74da50abf697d8448f75a90 gas/testsuite/gas/i860/pfmam.d +3f85e5e49191d2039cd11675284eca8c gas/testsuite/gas/i860/pfmam.s +8a1d5790ec258d8d574e7c0b948f73d9 gas/testsuite/gas/i860/pfmsm.d +5ba78d272a0c2d22de071e03aa1b1aaf gas/testsuite/gas/i860/pfmsm.s +39851734f26e9eeb49b7548995830e72 gas/testsuite/gas/i860/pfsm.d +2b691612d72dc03e06b426d719622dc8 gas/testsuite/gas/i860/pfsm.s +a81a57c63b7130129d02ba0692659392 gas/testsuite/gas/i860/pseudo-ops01.d +d2572c9521bb99521ffb95f2caecc51f gas/testsuite/gas/i860/pseudo-ops01.s +212987111270138069139a2e478d5bc4 gas/testsuite/gas/i860/README.i860 +8f354a029a247621b668ba706c48949f gas/testsuite/gas/i860/regress01.d +9653c34da92fa639fc96e13206273aaa gas/testsuite/gas/i860/regress01.s +7097eb47e3d70de1cf45f2eb94283dad gas/testsuite/gas/i860/shift.d +24e2e5de98632c8c8b900d1592709397 gas/testsuite/gas/i860/shift.s +d8ac2dcdfd994b9933eae7794a6a1562 gas/testsuite/gas/i860/simd.d +369369bca7c9a1f488807234c1271ae7 gas/testsuite/gas/i860/simd.s +94bfbda029352e2eb43710295a07c02d gas/testsuite/gas/i860/system.d +b0e13677168237ff8300437ed101e4b4 gas/testsuite/gas/i860/system.s +8867d533598bda8b5fecaa99354d1d98 gas/testsuite/gas/i860/xp.d +ade8add590ef6c12e6b3ad21e52cc7c0 gas/testsuite/gas/i860/xp.s +408b32d880d4fbd661ec530b1bbcde97 gas/testsuite/gas/ia64/alias-ilp32.d +aa4bb141211ac2dab2144ab4cc61cf95 gas/testsuite/gas/ia64/alias.d +03b362d40d896c73b7ca83e014e65f54 gas/testsuite/gas/ia64/alias.s +5fed37c2d4517d6ccdb0b8214e9fbe89 gas/testsuite/gas/ia64/align.d +2b6aaf64f25203ee6d42b883877b3d29 gas/testsuite/gas/ia64/align.s +56482f48ecf5d0871055f1032761c296 gas/testsuite/gas/ia64/alloc.l +465b7817b7039151414335b624f87b50 gas/testsuite/gas/ia64/alloc.s +e455b8bd8879fe91fbb7e9a9054396c4 gas/testsuite/gas/ia64/bundling.d +6e8b4d46ad5bc8cf77ae32da0543a189 gas/testsuite/gas/ia64/bundling.s +5db8eca540fe74cf7a3c2987a4eb9854 gas/testsuite/gas/ia64/dependency-1.d +1469dfc61e75bd0ff0848df2a3d0491f gas/testsuite/gas/ia64/dependency-1.s +5eb8214dbc6a81515361f587403fb112 gas/testsuite/gas/ia64/dv-branch.d +ec058dd65d1af91fe84f41b725857462 gas/testsuite/gas/ia64/dv-branch.s +956561267da937b1be0fada7c6ea25c7 gas/testsuite/gas/ia64/dv-entry-err.l +e635d21d0f94975c7df306096506d41b gas/testsuite/gas/ia64/dv-entry-err.s +66c561db454fffc01897c1dc5d51cd8a gas/testsuite/gas/ia64/dv-imply.d +a4c835f4336ab0d7bea5c1251fe02f94 gas/testsuite/gas/ia64/dv-imply.s +719d55382abbfde4dad96f2ab530444a gas/testsuite/gas/ia64/dv-mutex-err.l +8af39c8ed0db1166ee73bcc08b4f2c16 gas/testsuite/gas/ia64/dv-mutex-err.s +aa623148bfa19343f426f1d7594acc0b gas/testsuite/gas/ia64/dv-mutex.d +ae4b264474b1d1488371dfba05a807ff gas/testsuite/gas/ia64/dv-mutex.s +502fa49f2e1cb1d1c02b4d5a4d9359a4 gas/testsuite/gas/ia64/dv-raw-err.l +5b0b0943c41ffdf3d4352f4f2e0a1810 gas/testsuite/gas/ia64/dv-raw-err.s +98c0c365a1901745072e5d9c957e3793 gas/testsuite/gas/ia64/dv-safe.d +c06a2d45e380eacc79be2946865839ea gas/testsuite/gas/ia64/dv-safe.s +cf844a278adf50073cdefda6d28b307d gas/testsuite/gas/ia64/dv-srlz.d +fcb5ba635bb6c1bf11217572aed8c194 gas/testsuite/gas/ia64/dv-srlz.s +47a1c9e8c8d646cb1276022156938aef gas/testsuite/gas/ia64/dv-war-err.l +96d62a881175a15f9d0eb1464592de82 gas/testsuite/gas/ia64/dv-war-err.s +219dc898bb30c667cc0adfdf37d0434e gas/testsuite/gas/ia64/dv-waw-err.l +eca51ba28eea7ec14dcf4b65e57b93e9 gas/testsuite/gas/ia64/dv-waw-err.s +4702e0589d4ecfea81d623654726c865 gas/testsuite/gas/ia64/fixup-dump.pl +043c181b05ead62073d60fe4f7b5bdef gas/testsuite/gas/ia64/forward.d +c8d38e32fb63d2231618bb65b2d95a44 gas/testsuite/gas/ia64/forward.s +a50ca06a252db2759c2aa74a2cf8d1dc gas/testsuite/gas/ia64/global.d +3abe04e058c73f3963c6957c842aa0c7 gas/testsuite/gas/ia64/global.s +e081822a4d9a8a6577be11efaf490dd7 gas/testsuite/gas/ia64/group-1.d +ecd81ce660f62c1ab3b2b1b89f5e37e6 gas/testsuite/gas/ia64/group-1.s +4fa99ed51f2e6df4be16ab164d3643c5 gas/testsuite/gas/ia64/group-2.d +23fd69f5c2f9e4329d761e82165d2b1c gas/testsuite/gas/ia64/group-2.s +ae4cfc6a16703b6c2586c99215ad32e2 gas/testsuite/gas/ia64/hint.b-err.l +bc38d9bf826a3c9d36e322b0fdc4b1ce gas/testsuite/gas/ia64/hint.b-err.s +53d2625d7ca78e2bf4b13272b30ae1e2 gas/testsuite/gas/ia64/hint.b-warn.l +bc38d9bf826a3c9d36e322b0fdc4b1ce gas/testsuite/gas/ia64/hint.b-warn.s +9a5848ee1ab36f03c1079eb789685e4b gas/testsuite/gas/ia64/ia64.exp +f2da605500359eb8d432dc726bffd0b3 gas/testsuite/gas/ia64/index.l +0939d8b0fe59c828407681a0a32a2274 gas/testsuite/gas/ia64/index.s +daae8c66fb42361d7a68bcacc7b61034 gas/testsuite/gas/ia64/invalid-ar.l +60080346d8ab041cc302938e65f29808 gas/testsuite/gas/ia64/invalid-ar.s +f4d82e4423f8b9465e9276e22157086a gas/testsuite/gas/ia64/label.l +f87ee9f9d1ba626560bf804ba13165f1 gas/testsuite/gas/ia64/label.s +ae7aa2fe2ba69fd12fb73ed958f135d1 gas/testsuite/gas/ia64/last.l +88f1e3a9ef6fa419edb1f9bcae711a4b gas/testsuite/gas/ia64/last.s +d45e2dd3f78812fc115b032e13df93bf gas/testsuite/gas/ia64/ldxmov-1.d +9d82fbaec119beb2b468c79b0c133608 gas/testsuite/gas/ia64/ldxmov-1.s +c7d19ca874ed086c03d6b51fcf4e1840 gas/testsuite/gas/ia64/ldxmov-2.l +277c0508ade20f90c962e8cf59208830 gas/testsuite/gas/ia64/ldxmov-2.s +393a02369db1631378b57d74a1f99193 gas/testsuite/gas/ia64/ltoff22x-1.d +aca1c86bea7050f880ec98f303f05f10 gas/testsuite/gas/ia64/ltoff22x-1.s +3e6d619d427dfee32e76df8e213271b6 gas/testsuite/gas/ia64/ltoff22x-2.d +64e1de175dcb23ad6dc5580e687f7b7d gas/testsuite/gas/ia64/ltoff22x-2.s +47c64f668a7d8b584e9d2179cf9956da gas/testsuite/gas/ia64/ltoff22x-3.d +917b987097cafc1ef21e048eb58822c9 gas/testsuite/gas/ia64/ltoff22x-3.s +1a6d95bfe578be2a2f8b98f63ae32754 gas/testsuite/gas/ia64/ltoff22x-4.d +fe9dcfc6429f362540004b9bd1144253 gas/testsuite/gas/ia64/ltoff22x-4.s +77d6d217c1d60250f98082dce2352b31 gas/testsuite/gas/ia64/ltoff22x-5.d +b8638cad333d86872c59a42fb825ceb0 gas/testsuite/gas/ia64/ltoff22x-5.s +77e40f73ba5abae861ad0694f63c1590 gas/testsuite/gas/ia64/mov-ar.d +26a8d20f240ff4a568945caab6f453f5 gas/testsuite/gas/ia64/mov-ar.s +42f96f97f58a5c2aabc914e6b56e95de gas/testsuite/gas/ia64/no-fit.l +147999e5afd9e1f4fcd30dbcad182685 gas/testsuite/gas/ia64/no-fit.s +ede15f90446f84059e1a9ec36b9b66f6 gas/testsuite/gas/ia64/nop_x.d +3ac96c6eb59cc7e0ba11f3d1ab36d4a5 gas/testsuite/gas/ia64/nop_x.s +47072d4d678212573562867320a4b168 gas/testsuite/gas/ia64/nostkreg.d +8936ee3120b0746e5f3d8f7ac460e9db gas/testsuite/gas/ia64/nostkreg.s +5cf1f05daff9171dcf5275963c6acde0 gas/testsuite/gas/ia64/opc-a-err.l +c10f248c93a66cf00810e181bcf47859 gas/testsuite/gas/ia64/opc-a-err.s +a8b761b96823d4971f5532faf0b6e808 gas/testsuite/gas/ia64/opc-a.d +7a4b4b8b83d010b15200291b7428d900 gas/testsuite/gas/ia64/opc-a.pl +25a4e13b65c5c563854c68b27850ec27 gas/testsuite/gas/ia64/opc-a.s +26a9c024547dfe3267afa0149e4683c5 gas/testsuite/gas/ia64/opc-b.d +a6e1c6d4094099abc90c4eddf392cf90 gas/testsuite/gas/ia64/opc-b.pl +28d8e6ea8a3ec4beed93c2365ca7497d gas/testsuite/gas/ia64/opc-b.s +c26da9c6f5e6a73d1b146d094ebbb496 gas/testsuite/gas/ia64/opc-f.d +e44f587f12c4e939d44570b92b5ca82b gas/testsuite/gas/ia64/opc-f.pl +5e132c425eaf71cbab3e7401b4750bf2 gas/testsuite/gas/ia64/opc-f.s +b9edfed480c2b5f01e2e5ae0cb76be81 gas/testsuite/gas/ia64/opc-i.d +6df89ea375d396efe8cd150381479c12 gas/testsuite/gas/ia64/opc-i.pl +15969b5f65383a6c5490609cf4882545 gas/testsuite/gas/ia64/opc-i.s +0a8ec8b04449de207537d0c935e610e7 gas/testsuite/gas/ia64/opc-m.d +85878e0564576b3b7bafb3eb82660f7d gas/testsuite/gas/ia64/opc-m.pl +8ee1765ede253208db01ce9942f5e248 gas/testsuite/gas/ia64/opc-m.s +7e3531997644b2ced7b435b593274057 gas/testsuite/gas/ia64/opc-x.d +254e69bf1897bb4265e21eb488dde3c4 gas/testsuite/gas/ia64/opc-x.s +e493b86e79cd1b7840768ee7dd17d09b gas/testsuite/gas/ia64/operand-or.d +c80613e26ec1eb58b400ecff241c7888 gas/testsuite/gas/ia64/operand-or.s +b549252aed96485cbe78566d3933da97 gas/testsuite/gas/ia64/operands.l +324983368e3aa0fb1f6c43d2889be129 gas/testsuite/gas/ia64/operands.s +2e9a0176afdb932248384cfd21bf0e02 gas/testsuite/gas/ia64/order.d +8a919a8db6e6db348bb9ee3988ad4793 gas/testsuite/gas/ia64/order.s +318b8c28644b4dc8b5a6a3b5ad8c2235 gas/testsuite/gas/ia64/pcrel.d +2802f15229a6741bef0e11984a2ad74e gas/testsuite/gas/ia64/pcrel.s +8234b13102e2b89a9b8e480032ba3644 gas/testsuite/gas/ia64/pound.l +eb163238d1c14067c10cfbdad2862823 gas/testsuite/gas/ia64/pound.s +31540ad89afaad27718f40ab9f0ec3fd gas/testsuite/gas/ia64/pr13167.d +8e0b9e244acda82824979cddb190549a gas/testsuite/gas/ia64/pr13167.s +2d77a6a88ef14d7c6a371b09dea5e828 gas/testsuite/gas/ia64/pred-rel.s +9d7a9d7f3a6b43c525af6c8c836cb80e gas/testsuite/gas/ia64/proc.l +68da861b5a85e3dda838bfae4f4268f1 gas/testsuite/gas/ia64/proc.s +c601f808ca38269043ad1225cb6627ee gas/testsuite/gas/ia64/pseudo.d +8faa98b105a425b150f9a6d3c14b46b7 gas/testsuite/gas/ia64/pseudo.s +2a9394f919186edb77a43fc7accd0490 gas/testsuite/gas/ia64/radix.l +5e58119bdddd1664dd77c7b8b1f5ca9c gas/testsuite/gas/ia64/radix.s +2d512ebbb3a824bfd3015573ceaf138a gas/testsuite/gas/ia64/real.d +11b022573ee9135d09a4a6415e44bc9a gas/testsuite/gas/ia64/real.s +a59ab6cf70a3161c725bfaefa0746827 gas/testsuite/gas/ia64/reg-err.l +3e5336a037f53d43a195dd49a885ec59 gas/testsuite/gas/ia64/reg-err.s +2c784ab89aa2aecdd47ca522eaeaaf1c gas/testsuite/gas/ia64/regs.d +5746998fdbaa367bda22d9fa0a7a0d5b gas/testsuite/gas/ia64/regs.pl +f5f8e77b8ef2296ae6a175af689b4291 gas/testsuite/gas/ia64/regs.s +def1a1e264aabe3865f5b91719ac6bb0 gas/testsuite/gas/ia64/regval.l +3aec93f48ade47b1ba22328aa49a521d gas/testsuite/gas/ia64/regval.s +e1fa07919615f734c4e8ffadc711b9df gas/testsuite/gas/ia64/reloc-bad.l +ebed991bbb8cac30da10846599d0abf8 gas/testsuite/gas/ia64/reloc-bad.s +2936fd2043217d53a51e8f059e9a217b gas/testsuite/gas/ia64/reloc-uw-ilp32.d +a701045f5a463b1a4e625df26718524b gas/testsuite/gas/ia64/reloc-uw.d +f6a87b3768a5c169d53a30d9b37ef686 gas/testsuite/gas/ia64/reloc-uw.s +e4ee7f44af64e924aa5272bea9c4fed1 gas/testsuite/gas/ia64/reloc.d +a0141232635833d498f3c634ce9e040a gas/testsuite/gas/ia64/reloc.s +f624e9e16c9ea00f80d7f7f8ca3806f3 gas/testsuite/gas/ia64/rotX.l +84d7e53abab60346dc101441409d2dc3 gas/testsuite/gas/ia64/rotX.s +05b7e3e645abcd447134fc1679135743 gas/testsuite/gas/ia64/secname-ilp32.d +d5f6f52389d039016fb3c421f106f981 gas/testsuite/gas/ia64/secname.d +67e890795ba55b2d84251e903e037f86 gas/testsuite/gas/ia64/secname.s +d273dc8aa1c413904f1e9bb44b22dcb1 gas/testsuite/gas/ia64/slot2.l +8515f2db3d0906171c4864bfb4529d63 gas/testsuite/gas/ia64/slot2.s +d5c8aaa0ac46df82f4b885dcc7db9b77 gas/testsuite/gas/ia64/slotcount.d +bfc2afe48b96d5505933256ac502852f gas/testsuite/gas/ia64/slotcount.s +89ba4b7622e2c68e6d20a22f99cf8b8c gas/testsuite/gas/ia64/strange.d +a5d6bfa2c1f6ab988b6d48dc46777280 gas/testsuite/gas/ia64/strange.s +c3e6542e6b17a77846eacecd2c05178b gas/testsuite/gas/ia64/tls.d +97ecd7035c79cd4143cc804ffbab35ea gas/testsuite/gas/ia64/tls.s +2fbb049aecd48365579d9cb782030908 gas/testsuite/gas/ia64/unwind-bad.l +72b9d9dd8acfcca2b9fa80d9c3c0e3eb gas/testsuite/gas/ia64/unwind-bad.s +3f56f1eee93d0c7aa2ba06039255ff07 gas/testsuite/gas/ia64/unwind-err.l +099da3b00ff767938efd408bd9e4494f gas/testsuite/gas/ia64/unwind-err.s +0606c4b397212803e71345845703cb26 gas/testsuite/gas/ia64/unwind-ilp32.d +b473c7b739dba295e4ac12c1e812dd8f gas/testsuite/gas/ia64/unwind-ok.d +b30847e1866f172dd9b6b9123228a836 gas/testsuite/gas/ia64/unwind-ok.s +cdde4f4669d489077d31d8f53c0d743e gas/testsuite/gas/ia64/unwind.d +54b7e8d3c7762c7c3c95272c2d0c0b8a gas/testsuite/gas/ia64/unwind.s +d6b0de0e58c262ebb157991b42cef765 gas/testsuite/gas/ia64/xdata-ilp32.d +2ee10569dbfbd5553f167899e75e454a gas/testsuite/gas/ia64/xdata.d +0efee14c792c025001d68ffe3c09f7a9 gas/testsuite/gas/ia64/xdata.s +3cd9cc915e08c2ea2792b9fc2ca95ab5 gas/testsuite/gas/ieee-fp/x930509a.exp +b0509b0492fd2fc8448b011ae03a41b8 gas/testsuite/gas/ieee-fp/x930509a.s +a93dccf731a42c0d3faf11b8d3b96979 gas/testsuite/gas/iq2000/allinsn.d +5fa4d4e98afb53abc8b3e453cf923c5c gas/testsuite/gas/iq2000/allinsn.exp +206095bc34484f0f35c4d8624850c5a8 gas/testsuite/gas/iq2000/allinsn.s +d3cfbfc4a609d152b16632b7a0731679 gas/testsuite/gas/iq2000/hazard0.s +4090ba0aef5f9561bae85399b661dd03 gas/testsuite/gas/iq2000/hazard1.s +8096370e741ff2148ba3dbc04d7f6f65 gas/testsuite/gas/iq2000/hazard2.s +d42820e6042ae5abe8607d7f1123267c gas/testsuite/gas/iq2000/hazard3.s +5453db52ad62f96abe48e513f0a1de98 gas/testsuite/gas/iq2000/hazard4.s +e1977723de2aa2900402d9d49f0fc3a8 gas/testsuite/gas/iq2000/hazard5.s +a3ef8bdc261d09c6e6e47f3bd7635234 gas/testsuite/gas/iq2000/load-hazards.exp +d2ca68442ebbf5c76394139ece449352 gas/testsuite/gas/iq2000/nohazard.s +a0dd34dfd76fa982804ba071ac664ca1 gas/testsuite/gas/iq2000/noyield.s +09bcfc91a01a1c522b87fa6bdfac41cb gas/testsuite/gas/iq2000/odd-ldw.exp +ab2ec0875f6420b97c4a235c0f277a65 gas/testsuite/gas/iq2000/odd-sdw.exp +e3867e77791054668d1326bec538f841 gas/testsuite/gas/iq2000/oddldw.s +da5573533b31cbcbe3f4ac6bcdc6ef1b gas/testsuite/gas/iq2000/oddsdw.s +8de426a4930bc007a732d0bd48044691 gas/testsuite/gas/iq2000/yield.exp +d69a091035a2f9e4c062c985c1c3233c gas/testsuite/gas/iq2000/yield0.s +1debd376afeb9275adfb489a8339485e gas/testsuite/gas/iq2000/yield1.s +4966d212d153760af9a23c515cb72b7e gas/testsuite/gas/iq2000/yield2.s +fbac7003d0b47cb3f5a6983acba7475c gas/testsuite/gas/lm32/all.exp +ff4502aa7dc77cf08312db254ad91645 gas/testsuite/gas/lm32/csr.d +417489f15a37a5755508e5e2673ae67e gas/testsuite/gas/lm32/csr.s +ed4c78d2b7f6be3b4d8e1e25d53ae2a1 gas/testsuite/gas/lm32/insn.d +3ae64ee4b2c7163e40b5da7d4e5be673 gas/testsuite/gas/lm32/insn.s +1dda15251a9f7565eae5b07a6ca2d8f0 gas/testsuite/gas/lns/lns-big-delta.d +61f9144503868f8a70263764471ecb48 gas/testsuite/gas/lns/lns-big-delta.s +c94a65a88ad101c3fb42f9f426c0b902 gas/testsuite/gas/lns/lns-common-1-alt.d +1c6a26bb6f6b79087960114f78b1e053 gas/testsuite/gas/lns/lns-common-1-ia64.s +cd70f28a0ac0310abfd7bff12d708541 gas/testsuite/gas/lns/lns-common-1.d +1383f4115f40b84bb075557279ce8e14 gas/testsuite/gas/lns/lns-common-1.s +a8dbe4ac283be70b5d876b90dca2424d gas/testsuite/gas/lns/lns-diag-1.l +be4c80cf566add41e4c6e4f89b90a741 gas/testsuite/gas/lns/lns-diag-1.s +954850238a93c595a847c807deb9b4cd gas/testsuite/gas/lns/lns-duplicate.d +8e96abf784afc033cf7995d6681b2e91 gas/testsuite/gas/lns/lns-duplicate.s +d53ef790c02dbff0e065b5e31ec07b78 gas/testsuite/gas/lns/lns.exp +dcba3dd13f89544c92ccc86e5dcccdeb gas/testsuite/gas/m32r/allinsn.d +239bb6ea0e35bbe2e8a5939edab2a2cb gas/testsuite/gas/m32r/allinsn.exp +5f9b6e2b9934e8a02576ba496d16ab72 gas/testsuite/gas/m32r/allinsn.s +418ea1f8c144280c2bfa54387e8beba0 gas/testsuite/gas/m32r/error.exp +d71cb8f6eee3bbdd0ccecaaca513831a gas/testsuite/gas/m32r/fslot.d +da6bcd9a061b6fdd7a4ee5b2aec6811a gas/testsuite/gas/m32r/fslot.s +da48ccf2513f4723fced3d98ee902eee gas/testsuite/gas/m32r/fslotx.d +c81e23eb3020f45236c4ef7e98a14008 gas/testsuite/gas/m32r/fslotx.s +e0a4e41d1665c5e0c4ca13ec9b548568 gas/testsuite/gas/m32r/high-1.d +0c257c8a3667fa667e99bb3cb9aff5a7 gas/testsuite/gas/m32r/high-1.s +873accfff909b6aac6b9a2e8cf961856 gas/testsuite/gas/m32r/interfere.s +ab5eeb92f7ceecff8accd6105563fb00 gas/testsuite/gas/m32r/m32r.exp +f8356fa33e1aa40f0f48046e766c07e4 gas/testsuite/gas/m32r/m32r2.d +cb569d8cd9b19f9c80158a7dcc9641c0 gas/testsuite/gas/m32r/m32r2.exp +05c2334e103e8a64c1d354b608d9c26f gas/testsuite/gas/m32r/m32r2.s +925faf7606bb992896b5d0a3fedac174 gas/testsuite/gas/m32r/m32rx.d +778e305ed7747652af13150f315591a9 gas/testsuite/gas/m32r/m32rx.exp +18de980a0f79928c1374c957b0ada6a9 gas/testsuite/gas/m32r/m32rx.s +c0b5f95ee4eec971ea74dc81435baec8 gas/testsuite/gas/m32r/outofrange.s +b6ca1e88ef4cd2485fbd0985ecbd4639 gas/testsuite/gas/m32r/parallel-2.d +f7243334f19988521763b86ec05466af gas/testsuite/gas/m32r/parallel-2.s +1a923d7008ef300fe48e715181d60b38 gas/testsuite/gas/m32r/parallel.s +aa8f2ce59d396c44db841950b4ccbc8e gas/testsuite/gas/m32r/pic.d +12fb586950543782bfbb2aebb34d2d1d gas/testsuite/gas/m32r/pic.exp +a7a53dd0986080053acfd273280e0cac gas/testsuite/gas/m32r/pic.s +5fa25afca5b586459bb9f769c043a10a gas/testsuite/gas/m32r/pic2.d +185cde387728a8a52cc89c0f2c62a88b gas/testsuite/gas/m32r/pic2.s +9aefae09c6bf69a68813bfe3b9d522c3 gas/testsuite/gas/m32r/rel32-err.s +ae60ca76e0212930ab00672ebfc161ef gas/testsuite/gas/m32r/rel32-pic.d +81e0a14fcf378b9846014f8cdbeeead1 gas/testsuite/gas/m32r/rel32-pic.s +2a9f12f6cefbb953d8484d4ad6a51eee gas/testsuite/gas/m32r/rel32.d +7dde0592afcf5178f27becd62452ca56 gas/testsuite/gas/m32r/rel32.exp +81e0a14fcf378b9846014f8cdbeeead1 gas/testsuite/gas/m32r/rel32.s +e35cfe164c66c6df8f9937607e1804f2 gas/testsuite/gas/m32r/rela-1.d +91da9eadacb178cf7af3b6367b27f076 gas/testsuite/gas/m32r/rela-1.s +e458c3261d10b7430278bedfbaf77b57 gas/testsuite/gas/m32r/relax-1.d +ee56272ade0ca1ed891d0bcdc81d1173 gas/testsuite/gas/m32r/relax-1.s +ffadebffc2057e150da0f56aa0f6d511 gas/testsuite/gas/m32r/relax-2.d +dfd4ad2ea1d8b29e222e48a671c648e1 gas/testsuite/gas/m32r/relax-2.s +da3c17f4b7848e845a19d80fa48898ec gas/testsuite/gas/m32r/seth.d +a977285fa6cb4bb433ff8d661160802b gas/testsuite/gas/m32r/seth.s +5eeabc5a49a2b873a05fdddf449913df gas/testsuite/gas/m32r/signed-relocs.d +0d78c451dfb7d578f7b5c1734ee03f3b gas/testsuite/gas/m32r/signed-relocs.s +65a3c2ab71799199c7a45459a9a87b1a gas/testsuite/gas/m32r/uppercase.d +3ad7dc32e323605aaf71cc84e39717df gas/testsuite/gas/m32r/uppercase.s +d21d472754ca0f699e8faf8c95175ec1 gas/testsuite/gas/m32r/wrongsize.s +34e89680b972896b988178cc4a253dfa gas/testsuite/gas/m68hc11/abi-m68hc11-16-32.d +5c60b03593e7a4936417e9cdd732a004 gas/testsuite/gas/m68hc11/abi-m68hc11-16-64.d +246ec931f4cac7abf9be7788326737e8 gas/testsuite/gas/m68hc11/abi-m68hc11-32-32.d +438a68daa3fbd0dabbeffcb033a9cc6b gas/testsuite/gas/m68hc11/abi-m68hc11-32-64.d +1b0ca1676265b3dd66785e9656ddd199 gas/testsuite/gas/m68hc11/abi.s +2ab706a9850050b395067c61297153d2 gas/testsuite/gas/m68hc11/all_insns.d +57022ccbd6cef54a3a8ece7847d6569f gas/testsuite/gas/m68hc11/all_insns.s +7f32a49a34b114c05a55da1eeafb4d3b gas/testsuite/gas/m68hc11/branchs12.d +17a5e088710208e31860e64eda08f969 gas/testsuite/gas/m68hc11/branchs12.s +7e59a46e650941fdb70180d8251a289d gas/testsuite/gas/m68hc11/bug-1825.d +9cb931f3ec3500c72620a735c8e03c5b gas/testsuite/gas/m68hc11/bug-1825.s +ae4a96f35d63157d5133ac82854449eb gas/testsuite/gas/m68hc11/indexed12.d +0d2b7ea9c6ed562cfc3566b68729e78b gas/testsuite/gas/m68hc11/indexed12.s +9cf492f0689b8eb9d820ec16d72514a4 gas/testsuite/gas/m68hc11/insns-dwarf2.d +7e1438d4bf83a2c1102470d47fc56846 gas/testsuite/gas/m68hc11/insns.d +c689de902a3cd3f23889c6e7e81ae737 gas/testsuite/gas/m68hc11/insns.s +4737eff61ed660da03cfdceac21f0155 gas/testsuite/gas/m68hc11/insns12.d +141b3a4c374a6000333e228ba3b9e47e gas/testsuite/gas/m68hc11/insns12.s +0b1954f09f62ef7435476b0ddc00072f gas/testsuite/gas/m68hc11/lbranch-dwarf2.d +ccb57bcbe25baef712b2a96fa9a5a3ce gas/testsuite/gas/m68hc11/lbranch.d +270514d96ae94f63ea38a4eb9fccd095 gas/testsuite/gas/m68hc11/lbranch.s +c1060a813d93b1996f80a1d4862fe7c4 gas/testsuite/gas/m68hc11/m68hc11.exp +7e3463ce5e0c47ca8bdaaf6f3d443f8d gas/testsuite/gas/m68hc11/malis-include.s +39a35b2b1583a2636a92fe70c4d055ba gas/testsuite/gas/m68hc11/malis.d +a469d5986f2366e13cba507b0314fdfd gas/testsuite/gas/m68hc11/malis.s +7db9f17261e7d7f985b870ce6f2ad9f7 gas/testsuite/gas/m68hc11/movb.d +585f39e35793807e3fded97c021bd282 gas/testsuite/gas/m68hc11/movb.s +246a84b3f7ff2215d7479d2c19faa780 gas/testsuite/gas/m68hc11/opers12-dwarf2.d +dc9b04a98a41dea42bad2049f46223cc gas/testsuite/gas/m68hc11/opers12.d +a782d69af0f936aa9fcdfc1ecbac3c57 gas/testsuite/gas/m68hc11/opers12.s +5ce2e2ebfd1f67275d61be1a00c3680d gas/testsuite/gas/m68k/all.exp +2c8cff99738cc49d98ae27854aaf533b gas/testsuite/gas/m68k/arch-cpu-1.d +a86d265e30a74bc8fdaa89c1a72e9c16 gas/testsuite/gas/m68k/arch-cpu-1.s +d36654135443b0740d6b2c78b03ad44b gas/testsuite/gas/m68k/bitfield.d +fa19c98907bd173f6de4c396ef9acd45 gas/testsuite/gas/m68k/bitfield.s +8e7bf83e13e2a12239dba9a08d6863d0 gas/testsuite/gas/m68k/br-isaa.d +041e7f276b89d95a06712b8b30458aaa gas/testsuite/gas/m68k/br-isaa.s +304c7517aff62a47078625f6612ed1ad gas/testsuite/gas/m68k/br-isab.d +6f347ccf4e15f7e8e7f0b4820b47aefe gas/testsuite/gas/m68k/br-isab.s +6cfb94a0c3a281dd912564c93c0afaaf gas/testsuite/gas/m68k/br-isac.d +918b15696e0a972ec6ff5b0b008d6bd2 gas/testsuite/gas/m68k/br-isac.s +1c229d52fdc1160c9dd9f74b19c1ec69 gas/testsuite/gas/m68k/cas.d +20e0445e36d8d9f35c6022fa7118a3da gas/testsuite/gas/m68k/cas.s +b0368605069653c8c9aa0369b591d66d gas/testsuite/gas/m68k/cpu32.d +ca551aa8a506abbc251df076ee45824a gas/testsuite/gas/m68k/cpu32.s +0ddad6a07716faf9e725ca91096138a6 gas/testsuite/gas/m68k/ctrl-1.d +820b9d7dbe0833991c6cedb6fbcdbdc3 gas/testsuite/gas/m68k/ctrl-1.s +0987622d3d08e015c32e827c55c9a847 gas/testsuite/gas/m68k/ctrl-2.d +3ee4700b8114f24f7e96d2a8639d2f5f gas/testsuite/gas/m68k/ctrl-2.s +96de03f7fc5967e5d267ae957ac508cf gas/testsuite/gas/m68k/disperr.s +ed716320dc539ce302d4b42c342d98dc gas/testsuite/gas/m68k/fido.d +d271df8524c5abe940b868ec36df598b gas/testsuite/gas/m68k/fido.s +26dfd242ac765008271e85e25d9d8446 gas/testsuite/gas/m68k/fmoveml.d +205a85d6482891f58292e065222b78fa gas/testsuite/gas/m68k/fmoveml.s +b14e11a2793fb32f7d471e31e4ecf7b9 gas/testsuite/gas/m68k/link.d +ea9ee18230b981ada48e2b69bb566220 gas/testsuite/gas/m68k/link.s +8bbf9a7c8ed981bfdf33164bc8c1795e gas/testsuite/gas/m68k/mcf-coproc.d +cc3d620bbd810b86ac329d88356c2293 gas/testsuite/gas/m68k/mcf-coproc.s +e9d65843e9ff4815317147668bb3eabc gas/testsuite/gas/m68k/mcf-emac.d +3b828ef829ca22f8225d76201d49099d gas/testsuite/gas/m68k/mcf-emac.s +04174ed46591a66a3724a8669e44bb8c gas/testsuite/gas/m68k/mcf-fpu.d +985b81bde386078023cf775e177e8398 gas/testsuite/gas/m68k/mcf-fpu.s +d4579214757fe915fc67ea05f7e7c699 gas/testsuite/gas/m68k/mcf-mac.d +98c8243f9c3e6f7b032b5ae0e1051927 gas/testsuite/gas/m68k/mcf-mac.s +c06fb50473bc5cc2ef7658e6306256bf gas/testsuite/gas/m68k/mcf-mov3q.d +dc28098ce202f2d02aeead18ddac25ca gas/testsuite/gas/m68k/mcf-mov3q.s +ff2b8dbae08361ab60a5f38c1d20c8ba gas/testsuite/gas/m68k/mcf-movsr.d +708a66c1d76c25ececc29a5e21a3eaa7 gas/testsuite/gas/m68k/mcf-movsr.s +3349dc41612e21d338aaf37aca84e2ad gas/testsuite/gas/m68k/mcf-trap.d +2f883f9901e7b4db6f38e516b45b7d75 gas/testsuite/gas/m68k/mcf-trap.s +f89fe622eac815915a29f397b204e46a gas/testsuite/gas/m68k/mcf-wdebug.d +37d85bbc31cec38641d8f89a70e5ec80 gas/testsuite/gas/m68k/mcf-wdebug.s +6e646c11198f5c995aeef425542bd408 gas/testsuite/gas/m68k/mode5.d +d4dffd0c1722e83ddbbe8fbb999107df gas/testsuite/gas/m68k/mode5.s +85e6de04e2d6138d3b0e1e3e932fc884 gas/testsuite/gas/m68k/op68000.d +d72997199e7c0cfb9dae24c9bc0347fd gas/testsuite/gas/m68k/operands.d +d5012d936b1b45db947e4a29a883fc9d gas/testsuite/gas/m68k/operands.s +91aa93e55ee135f07c4262e7cf5c282d gas/testsuite/gas/m68k/p11673.s +b334f15354ebeffb3acba502cc1dae67 gas/testsuite/gas/m68k/p2410.s +ce5152b0da290f444d58c6ef03d48e02 gas/testsuite/gas/m68k/p2663.s +4983e0937ec21aa3f61107606aa2948a gas/testsuite/gas/m68k/p3041.d +ad91a599d1015c362fa6a496fb99c4f3 gas/testsuite/gas/m68k/p3041.s +6c9fd4e21fb5f16c6d3c7b79cbae935f gas/testsuite/gas/m68k/p3041data.d +7c61363a5349ec89742e03a17aee542e gas/testsuite/gas/m68k/p3041data.s +55dbfc5435291d0f8fc2904dc7925d41 gas/testsuite/gas/m68k/p3041pcrel.d +14366dfe4862f354aa3acc8d1d0a4afe gas/testsuite/gas/m68k/p3041pcrel.s +9f97c8240a44cb8d55e355b3577f7a7d gas/testsuite/gas/m68k/pcrel.d +3bc8cba59ef27f67c6c6e2a67717db04 gas/testsuite/gas/m68k/pcrel.s +c1fce4f35335083fbf7d4538c5a7230f gas/testsuite/gas/m68k/pic1.s +feaf8891278b0160a4e8977a751c9ecf gas/testsuite/gas/m68k/pr11676.d +61047c9a4075c1ed3be31b965f0a9dff gas/testsuite/gas/m68k/pr11676.s +6ebe1f8291de253ee6ce0e469b3e03aa gas/testsuite/gas/m68k/t2.d +ba9a3e851cb31d41e5a33c44dc3ebd13 gas/testsuite/gas/m68k/t2.s +549aa5394e345619c2985ff6e8965149 gas/testsuite/gas/m68k/tls-gd-3.d +f10c7fc453a90020e6009ef0796e4815 gas/testsuite/gas/m68k/tls-gd-3.s +4117edd076cf599f92777cbfea5d59ba gas/testsuite/gas/m68k-coff/gas.exp +45f1ecda71b05960409560f553228a2d gas/testsuite/gas/m68k-coff/p2389.s +3a162ab2de5525fc4745144a511922c9 gas/testsuite/gas/m68k-coff/p2389a.s +2c65e9837c0fa5884e6d7aa8ab7f5b27 gas/testsuite/gas/m68k-coff/p2430.s +29f7789ff1bca9100fda6a1276c73f70 gas/testsuite/gas/m68k-coff/p2430a.s +9ae5a3f91535cb9ce86b48698e6096b1 gas/testsuite/gas/m68k-coff/t1.s +acda61b9872f053659f8f970762ebb6a gas/testsuite/gas/macros/altmacro.d +f7fe0f7c09603779be48d47927811570 gas/testsuite/gas/macros/altmacro.s +a7bb771f464a0b5ecf0c4d5ba774593d gas/testsuite/gas/macros/and.s +4df56374dec5a1c76dd066c3d729c85d gas/testsuite/gas/macros/app1.d +5a379b4af4da66bf04866a810b4de97b gas/testsuite/gas/macros/app1.s +33aa8d4b13e498f0d7e15beca1f27ced gas/testsuite/gas/macros/app2.d +9d06cd31170f7f48701da42df9632246 gas/testsuite/gas/macros/app2.s +c0cfe9bcc558ec1eb1f1c3a127e5f4ea gas/testsuite/gas/macros/app3.d +a4a1a4a55d0b3203d8ed8dd831826fc3 gas/testsuite/gas/macros/app3.s +74ba97a7638d2b3a01bbeb4461fb1eb5 gas/testsuite/gas/macros/app4.d +fdd040aa869c081694e5e2f65100bf19 gas/testsuite/gas/macros/app4.s +d2f0e95bde22021aa580233d12b5f859 gas/testsuite/gas/macros/app4b.s +79c4224dcaa95d47119575859a12f052 gas/testsuite/gas/macros/badarg.l +e7b8d7dc34667abdcad825d3af9e324c gas/testsuite/gas/macros/badarg.s +ef4d8ec6d2488a5bb4d83550b40ef6d1 gas/testsuite/gas/macros/dot.l +3a9f384d6f335d0422e058696f0d491f gas/testsuite/gas/macros/dot.s +24acd998ad2fbeeae147bbd23108b9e6 gas/testsuite/gas/macros/end.l +08af75c12d981d83fc2ddb9976a60205 gas/testsuite/gas/macros/end.s +06148aa2e0046074be6e05308a79b642 gas/testsuite/gas/macros/err.s +ab33edd7c59372a1fffccf5d8ec74af4 gas/testsuite/gas/macros/exit.s +f64593bf9530d575f681a8566ef216c3 gas/testsuite/gas/macros/irp.d +e284db7fba30dba3218492a95521d6b1 gas/testsuite/gas/macros/irp.s +5a989ab1c657b34af2f6423b6c25bc15 gas/testsuite/gas/macros/macros.exp +57f89b0f39596194cda700208502784d gas/testsuite/gas/macros/paren.d +645a2095f5f91978eedce3fbf6711923 gas/testsuite/gas/macros/paren.s +8a89a449aeedd42a670a4edc8c9ee377 gas/testsuite/gas/macros/purge.l +2878ce4eb08bcf5a66dfc813d10012bd gas/testsuite/gas/macros/purge.s +c1ae846d289af2aadf8628fd4065b805 gas/testsuite/gas/macros/redef.l +4a17dc932e2a386dfd63e54c978ebfdd gas/testsuite/gas/macros/redef.s +e01c1559f46ebcc9e71e12bbbe29d50a gas/testsuite/gas/macros/repeat.d +c50b4097dfec4d64d80d9d35282be338 gas/testsuite/gas/macros/repeat.s +b320acc9c113dd9d1967db7ee0857e8a gas/testsuite/gas/macros/rept.d +f5abc6437f073dff4af533a36ea9d280 gas/testsuite/gas/macros/rept.s +4bf4ec50a66311911e2120d1cdc8bbcb gas/testsuite/gas/macros/semi.d +16079c6681fc293376e83b74d4b5ffe4 gas/testsuite/gas/macros/semi.s +4441ddbad8be79e14a096f879b1ece66 gas/testsuite/gas/macros/strings.d +8990b11a483140af060adb1ff48c4cc5 gas/testsuite/gas/macros/strings.s +3468ca74d70167a37cf3e040dfedf5ac gas/testsuite/gas/macros/test1.d +78d91d34e2f43f8c90923a237fa2004e gas/testsuite/gas/macros/test1.s +ac43f2633f23586812df9e1a40627d82 gas/testsuite/gas/macros/test2.d +c881555cf20f7d8ed8635c1bf0d11b37 gas/testsuite/gas/macros/test2.s +7e8aafe277f842553e1bf935c32fa0e8 gas/testsuite/gas/macros/test3.d +1dbcc25102396060274f0b3d1268f47c gas/testsuite/gas/macros/test3.s +3b25365dfe02718a9704624a1860b9a5 gas/testsuite/gas/macros/vararg.d +4dfb839d34233c6e8f4d0873cb7adb02 gas/testsuite/gas/macros/vararg.s +fe98b2cc453fcf7a781ca1bb78913020 gas/testsuite/gas/mcore/allinsn.d +3f84389ae5d2fa1891f6db5a66746c47 gas/testsuite/gas/mcore/allinsn.exp +733e0ea4313c0aae461d17a553aed497 gas/testsuite/gas/mcore/allinsn.s +0ab81dff36829f3dd7bbd1000ad03faf gas/testsuite/gas/mep/allinsn.be.d +5f3c2e7fe192b6e4c616becfbe63a0f0 gas/testsuite/gas/mep/allinsn.exp +725eb39dcaf4cd62b058ccd8b5efa5fc gas/testsuite/gas/mep/allinsn.le.d +96a535cdd38bb7538883d0327d38be12 gas/testsuite/gas/mep/allinsn.s +5356d87f136bd7bfe2edab640c4728b4 gas/testsuite/gas/mep/branch1.be.d +1c6c48f29b74dc09f4b0a0c97219a6e5 gas/testsuite/gas/mep/branch1.le.d +35ca0818d841dc654ce874b0e5de304e gas/testsuite/gas/mep/branch1.s +3b3e148b6c63bd6f09e82ddc569ca5d8 gas/testsuite/gas/mep/complex-relocs.exp +d186d3afc3ee54e09960714a5c1fd68d gas/testsuite/gas/mep/dj1.be.d +5b33491fed5eb691c4e00c6c3becd2ef gas/testsuite/gas/mep/dj1.le.d +45b36e3d305a2889fbbed26b5e729dc8 gas/testsuite/gas/mep/dj1.s +957c407a026ec401a7bc9994f8d529ed gas/testsuite/gas/mep/dj2.be.d +2da07098a3e20b991b905f02b8bb5a85 gas/testsuite/gas/mep/dj2.le.d +87c597ad8f492dc4e3e38f48e761e40d gas/testsuite/gas/mep/dj2.s +7d315bcdac108aa66f27cf2319d818e9 gas/testsuite/gas/mep/relocs-bad3.s +beb5219eec5436d53c2b958cba6c341e gas/testsuite/gas/mep/relocs-junk1.s +f41d2f0901c9e89c07c0b9420205546f gas/testsuite/gas/mep/relocs-junk2.s +739d59546a384a25c2a60ed430171998 gas/testsuite/gas/mep/relocs-refs.s +8969af38a3bee22a2099c343ca67ebd2 gas/testsuite/gas/mep/relocs-syms.s +cc2cb034acd8c8f03940a99aa3a9075c gas/testsuite/gas/mep/relocs.d +5fdcd8929b031a5442439eaa95b83274 gas/testsuite/gas/mips/24k-branch-delay-1.d +b765fc592389e7ebc505b7f8993d3dfb gas/testsuite/gas/mips/24k-branch-delay-1.s +a0eb6b5c2c7e449beec99672da081297 gas/testsuite/gas/mips/24k-triple-stores-1.d +144715aea0b56014b54d983879544e2f gas/testsuite/gas/mips/24k-triple-stores-1.s +ac3b30f0adfa688567ead81ee3167c1c gas/testsuite/gas/mips/24k-triple-stores-10.d +5729b6e78d97fceca29ab2dad1e5277a gas/testsuite/gas/mips/24k-triple-stores-10.s +d1bea3bad326c751b5a201c336fe5a9f gas/testsuite/gas/mips/24k-triple-stores-11.d +d3acbcfede6e83b6991cd8b768603358 gas/testsuite/gas/mips/24k-triple-stores-11.s +71e234391af0fba8cc66a063df4ebb08 gas/testsuite/gas/mips/24k-triple-stores-2.d +8d772867f2e4c03ecae4a5b14c774638 gas/testsuite/gas/mips/24k-triple-stores-2.s +c4efda54c00c361d6b06621ab2abce3b gas/testsuite/gas/mips/24k-triple-stores-3.d +55b44f4e95bcf72ad60d64463bcd7d83 gas/testsuite/gas/mips/24k-triple-stores-3.s +fe5775611a762e9d8f76d8aa0966a706 gas/testsuite/gas/mips/24k-triple-stores-4.d +e23a173120673650061005bf637f693e gas/testsuite/gas/mips/24k-triple-stores-4.s +e4f053e00dcd85008f7d4562fd552686 gas/testsuite/gas/mips/24k-triple-stores-5.d +0ed14396e7b4d14a31b50b4653e9eef6 gas/testsuite/gas/mips/24k-triple-stores-5.s +6acf77ead10d3d947dada3e9b6e074f6 gas/testsuite/gas/mips/24k-triple-stores-6.d +b06f0c90767ef3eeeb87195ef0c626a2 gas/testsuite/gas/mips/24k-triple-stores-6.s +84febf75b46904b8bed3dd1ef323aae5 gas/testsuite/gas/mips/24k-triple-stores-7.d +c2b8d1b4a407ea3f00031335669b1257 gas/testsuite/gas/mips/24k-triple-stores-7.s +94d7591accec581c1c11618d147b0661 gas/testsuite/gas/mips/24k-triple-stores-8.d +43094d366c39ecd105bcd55f2cec5e88 gas/testsuite/gas/mips/24k-triple-stores-8.s +dbef5e69e724f2fcaa24295d9414dde8 gas/testsuite/gas/mips/24k-triple-stores-9.d +809a9fa5ac03a70596c8b41f3aa61d99 gas/testsuite/gas/mips/24k-triple-stores-9.s +4185980a1e50b8b935d3ee3b658b36cf gas/testsuite/gas/mips/abs.d +93b8bd81a813fed709cc6b5639d4552a gas/testsuite/gas/mips/abs.s +f98b54818883ed309062b1cbf40844e3 gas/testsuite/gas/mips/add.d +3aee944bf3dc58dded8dd88c0ef7e205 gas/testsuite/gas/mips/add.s +f78397ef61e3d8da80f298878e9283fc gas/testsuite/gas/mips/aent.d +da8f8ab41c6a1f9d1b814110b074d73c gas/testsuite/gas/mips/aent.s +4861ffe49175e7f09f5bd11de5552347 gas/testsuite/gas/mips/align.d +e9a5e259296d0f0ccd600d0126e4bcc3 gas/testsuite/gas/mips/align.s +cc90ff1dfb8c42f725f5672f67df5e5f gas/testsuite/gas/mips/align2-el.d +6682916ca021cfdcc7c316b4da832da6 gas/testsuite/gas/mips/align2.d +a3e19ffb2b473d10cc37328a4fab9623 gas/testsuite/gas/mips/align2.s +35bef725463dbf1117b375c03b7e0ed8 gas/testsuite/gas/mips/alnv_ps-swap.d +ddebd3e526fa95fd7a69806746db984b gas/testsuite/gas/mips/alnv_ps-swap.s +87fbd1425a84674f2996096bb1887a91 gas/testsuite/gas/mips/and.d +c22e6aa3e89ed73291d018a5de51a7bb gas/testsuite/gas/mips/and.s +e09ea26af6b44682876f3ea4d8e488b7 gas/testsuite/gas/mips/at-1.d +0afeecd617af15073b4492b76ed2e936 gas/testsuite/gas/mips/at-1.s +f4b5f3ed67c7aa945bc0dc52a82c9209 gas/testsuite/gas/mips/at-2.l +5aaeb070968adf05b2730ac4d0f39209 gas/testsuite/gas/mips/at-2.s +b4cc184c25e23755df2ecda7f5b1e988 gas/testsuite/gas/mips/baddata1.l +b412b27903c83a7e1d80e6ceadb05db1 gas/testsuite/gas/mips/baddata1.s +b059d4bf55162ce8ac5d0238565e030f gas/testsuite/gas/mips/beq.d +88604f6faddd89f48b7b9a32c0617dba gas/testsuite/gas/mips/beq.s +4f314b785a459560acacb3731c25a579 gas/testsuite/gas/mips/bge.d +240831523e05ebe83934eb2db885b941 gas/testsuite/gas/mips/bge.s +7d33222ee708dcb6e432682e567d9506 gas/testsuite/gas/mips/bgeu.d +17a7104bf8f6ef5362b500d8d35103ba gas/testsuite/gas/mips/bgeu.s +c49ddf090ddd24f7546b153e4e50ac3b gas/testsuite/gas/mips/blt.d +19084048b3a6573d8d8a7360567b5de0 gas/testsuite/gas/mips/blt.s +5dda29e22a9d387906f0d17f0ed8a3cc gas/testsuite/gas/mips/bltu.d +867a78155944ae35d3edd46759c4664d gas/testsuite/gas/mips/bltu.s +d872abda04111d7f21451dfd37a93159 gas/testsuite/gas/mips/branch-likely.d +a429d28dab2e28e92a8ef3f5eb1a2e1e gas/testsuite/gas/mips/branch-likely.s +47226f542b146b7fa4a41cbd47427ac5 gas/testsuite/gas/mips/branch-misc-1.d +9121204cadf61e01caeac35fbbdf4611 gas/testsuite/gas/mips/branch-misc-1.s +525dbff998fa46471531687a7ae1fc86 gas/testsuite/gas/mips/branch-misc-2-64.d +d5409d6246f40fa3132d5e4ebd0a0bc6 gas/testsuite/gas/mips/branch-misc-2.d +5c88646f3e0762f8577328b330cb94e0 gas/testsuite/gas/mips/branch-misc-2.s +5384713ad00067ea0909fc00a33e38a5 gas/testsuite/gas/mips/branch-misc-2pic-64.d +b8c0ac3c0d474923637b3c71e8bcf087 gas/testsuite/gas/mips/branch-misc-2pic.d +c759e7da1ca3460a3f3aecb62d752a57 gas/testsuite/gas/mips/branch-misc-3.d +03386ef0c29fc9cd797e867b45ccc281 gas/testsuite/gas/mips/branch-misc-3.s +033ebad4d7f779b189ff05dac2939b5d gas/testsuite/gas/mips/branch-misc-4-64.d +cb434a44cac31cf53713c222f9a50d99 gas/testsuite/gas/mips/branch-misc-4.d +c0f2d806c6c663925b39078acabcc13b gas/testsuite/gas/mips/branch-misc-4.s +1a2d5403ca9b20fad9fe48f6a88333dd gas/testsuite/gas/mips/branch-swap.d +0a639c15c4cf5d990d1e342faab9013a gas/testsuite/gas/mips/branch-swap.s +9019640b31913709f26c121174ed6f31 gas/testsuite/gas/mips/break20.d +01e30fca71ae643c6acb0e4c3d579f1c gas/testsuite/gas/mips/break20.s +f9f3fa4f557fa10b3ea3632e7f2267ad gas/testsuite/gas/mips/cache.d +69766c8b19aeb811928ae4d1e97144e5 gas/testsuite/gas/mips/cache.s +a8d3324ce7f2b736e86b0b37863c3284 gas/testsuite/gas/mips/call-nonpic-1.d +ab3d77562d7321251bb71cda5b59841a gas/testsuite/gas/mips/call-nonpic-1.s +d6fe1f527092210021dfbe21fdc8b348 gas/testsuite/gas/mips/cfi-n64-1.d +fcbbec6f83a1baf944b58b5e4d5b75e5 gas/testsuite/gas/mips/cfi-n64-1.s +30612145052e1d2fe5fb72653f2b1c21 gas/testsuite/gas/mips/cp0-names-mips32.d +f257dc9a16a2d8c1c7fa591ae1367e27 gas/testsuite/gas/mips/cp0-names-mips32r2.d +85d6bc895e6396d1220b182ee81497d1 gas/testsuite/gas/mips/cp0-names-mips64.d +3449570fae576b82c519c71630237f7e gas/testsuite/gas/mips/cp0-names-mips64r2.d +820045ce9ca1a528b336ed1613fe9ab8 gas/testsuite/gas/mips/cp0-names-numeric.d +8ccaae0bb0f23368e83025d1a176c246 gas/testsuite/gas/mips/cp0-names-r3000.d +17c6e4db198bb1467ce086a3497f1cfc gas/testsuite/gas/mips/cp0-names-r4000.d +435490224450a34be4dfd2ae5c62d629 gas/testsuite/gas/mips/cp0-names-sb1.d +0eef2b21d782da076667ee1d1be4c0b1 gas/testsuite/gas/mips/cp0-names.s +2ceebd2a22d7e2bbbd437ba81930d083 gas/testsuite/gas/mips/cp0sel-names-mips32.d +efdfebc4309127eac2ecd8db816246c3 gas/testsuite/gas/mips/cp0sel-names-mips32r2.d +fb2beb4484f7975a92f9d87f55ea7879 gas/testsuite/gas/mips/cp0sel-names-mips64.d +2fc73a454a98ea1455aa5edf1afc6fb6 gas/testsuite/gas/mips/cp0sel-names-mips64r2.d +7b656e828f45bcd53f460b5c862af427 gas/testsuite/gas/mips/cp0sel-names-numeric.d +8c78816fa436c9deae7f7c868033283f gas/testsuite/gas/mips/cp0sel-names-sb1.d +1d57095720d3c2d464ceecd3230b0b1d gas/testsuite/gas/mips/cp0sel-names.s +5382505c92fbf9f5df6e1da1307d6fc2 gas/testsuite/gas/mips/daddi.d +17d29a01ad74635f2897df923f3d65a5 gas/testsuite/gas/mips/daddi.s +03a662feca559831acdbf0a3f76f5c70 gas/testsuite/gas/mips/delay.d +538610ec904788baaf4b069afb5b75e4 gas/testsuite/gas/mips/delay.s +6ce614bbef53b14bfaae9d392f25d8e4 gas/testsuite/gas/mips/div-ilocks.d +ca695be3a404528913fa436b4773fa33 gas/testsuite/gas/mips/div.d +6da8cc8418138e9b9ee39ac970e437da gas/testsuite/gas/mips/div.s +bd708578daa50a1d48a09e757f0cbcd9 gas/testsuite/gas/mips/dli.d +cd7c76b9945bf3197f55dd60337a2a1c gas/testsuite/gas/mips/dli.s +ff1205f20042f44eab860e0933c64965 gas/testsuite/gas/mips/e32-rel2.d +f1ad67a0879b7afd28bf7364cb0834a3 gas/testsuite/gas/mips/e32-rel4.d +61726b9e6598707a9acc650e0d3a4a50 gas/testsuite/gas/mips/e32el-rel2.d +936b705835c37402172a63f006d02014 gas/testsuite/gas/mips/ecoff@ld-forward.d +ebfb58e498eaf4013d918988693816b2 gas/testsuite/gas/mips/ecoff@ld.d +d0ced5bb168c9f7d18c43f690480400e gas/testsuite/gas/mips/ecoff@sd-forward.d +e47740e421951a741cd23d1c8c7c8b53 gas/testsuite/gas/mips/ecoff@sd.d +4db6e83621d51e75691a170444580c92 gas/testsuite/gas/mips/elf-consthilo.d +7d6fc8c3c1f4707ba226b63b085eccc9 gas/testsuite/gas/mips/elf-consthilo.s +b9095f709ac8275face75cd731c7e345 gas/testsuite/gas/mips/elf-jal.d +e1a412b36896d1df31ae1a5723d913fc gas/testsuite/gas/mips/elf-rel-got-n32.d +b703fb7c98d9ca3ae7188b4ca9f7884f gas/testsuite/gas/mips/elf-rel-got-n32.s +dca717c07ec35a9a3c2e120c19509ee8 gas/testsuite/gas/mips/elf-rel-got-n64.d +c09c6e2e13ec39459171d47a0a1de0dc gas/testsuite/gas/mips/elf-rel-got-n64.s +246786fedabd1bc55678a626281d56c1 gas/testsuite/gas/mips/elf-rel-xgot-n32.d +5e43392b134b49756e570cb8d7c92dd0 gas/testsuite/gas/mips/elf-rel-xgot-n64.d +b30098857b466696409095e2f291d560 gas/testsuite/gas/mips/elf-rel.d +502a3f9d5d4d477818aa628da52d9dc7 gas/testsuite/gas/mips/elf-rel.s +fd815ecb2e693579935d3f7d528f98b3 gas/testsuite/gas/mips/elf-rel10.d +9edb23aa539a4eb538ab2ae82789cb72 gas/testsuite/gas/mips/elf-rel10.s +d9a6383654de3b0a3253251fc51545d1 gas/testsuite/gas/mips/elf-rel11.d +976f6c1629fb9665abfe19081a6e2e77 gas/testsuite/gas/mips/elf-rel11.s +45839cc4faac9e5feac6a60aea98e8ef gas/testsuite/gas/mips/elf-rel12.d +cfbd6623492939a879a8c06ec19c9782 gas/testsuite/gas/mips/elf-rel12.s +bee5e6e9059c6f9de42a09a56d4c30ad gas/testsuite/gas/mips/elf-rel13-mips16.d +5fe1d10ae49768cd2cbf2adf6b284a46 gas/testsuite/gas/mips/elf-rel13-mips16.s +1a2b7b746c809d850a52b210805534bb gas/testsuite/gas/mips/elf-rel13.d +7d15dc149c45847f3da69f237b49f75c gas/testsuite/gas/mips/elf-rel13.s +5c320d3cb1beb042486e9a8745b4c2c6 gas/testsuite/gas/mips/elf-rel14.d +f0b56f0ca5879b02a735a42d59550e96 gas/testsuite/gas/mips/elf-rel14.s +b1948a758b8a0bfdef54909a790e4548 gas/testsuite/gas/mips/elf-rel15.d +cd997153f06e3c05746f8d2660b406f3 gas/testsuite/gas/mips/elf-rel15.s +c8d2800a57b09863e267abbc84d6013b gas/testsuite/gas/mips/elf-rel16.d +c84fdf9f052ea8c6520ac0a0b3ad4a53 gas/testsuite/gas/mips/elf-rel16.s +3cb2a7baa417f6f854b5fba684329ea8 gas/testsuite/gas/mips/elf-rel17.d +a2e720638aed5afda45f03d004fb6940 gas/testsuite/gas/mips/elf-rel17.s +7dad2d4e65bdb6c66a8c66b6bad1b9e6 gas/testsuite/gas/mips/elf-rel18.d +2f9e052ff885274c4e13e6f605cab8d3 gas/testsuite/gas/mips/elf-rel18.s +3491f79ba615bc3f9bcb54d0713a6aad gas/testsuite/gas/mips/elf-rel19.d +af8416449087ed017bdfe9307e1b6500 gas/testsuite/gas/mips/elf-rel19.s +d749327fe86acaf8385049aa9770bfa9 gas/testsuite/gas/mips/elf-rel2.d +f7a0c6062a5a8fe838e93a14441b72bc gas/testsuite/gas/mips/elf-rel2.s +b044ed458368bf7bd0706a3e4a8ea1c9 gas/testsuite/gas/mips/elf-rel20.d +982048418bd0153f8c1117b51c685e2f gas/testsuite/gas/mips/elf-rel20.s +a13edfcf468e99da0de2514f1e853fdd gas/testsuite/gas/mips/elf-rel21.d +701aaa1b0c7d66a1697166b9b854245c gas/testsuite/gas/mips/elf-rel21.s +e05a3c34f7cdbed02f3c53dce1fea3d6 gas/testsuite/gas/mips/elf-rel22.d +d2bbcb6ddb42de18b0f6fdc8faf14780 gas/testsuite/gas/mips/elf-rel22.s +9be1e5f72ab920ba4f8e5554836b81b2 gas/testsuite/gas/mips/elf-rel23.d +ac83e63959938893af13b631921cbdf1 gas/testsuite/gas/mips/elf-rel23.s +a26069fba96baec6f50d247bf7ce5011 gas/testsuite/gas/mips/elf-rel23a.d +820be43d9775898d155af457141b2dde gas/testsuite/gas/mips/elf-rel23b.d +4d58f6bdbdb4b350c49d12d719d3805a gas/testsuite/gas/mips/elf-rel24.d +f8e5b9d5e57f774b7426c2834fd2dbc7 gas/testsuite/gas/mips/elf-rel24.s +b3633d6652d00fab06d8a19f602ca2c3 gas/testsuite/gas/mips/elf-rel25.d +1c736e711964110cc8f5fc80fba12af6 gas/testsuite/gas/mips/elf-rel25.s +37e4931f9f5d2b267e03aaecda86d635 gas/testsuite/gas/mips/elf-rel25a.d +b8a8ddd377f5aab5eb78d68d1a0f140a gas/testsuite/gas/mips/elf-rel26.d +25bf5299f9445d2a8b741a37d2dcc94f gas/testsuite/gas/mips/elf-rel26.s +29ddd7f71aa6ad863e9569f99e49cfb8 gas/testsuite/gas/mips/elf-rel27.d +db6328a447bd906e6310a2561a786899 gas/testsuite/gas/mips/elf-rel27.s +ef6570d063e0f2f9602f6356ccbd637a gas/testsuite/gas/mips/elf-rel28-n32.d +6e6bea48787a8d625ab6bc947fceff03 gas/testsuite/gas/mips/elf-rel28-n64.d +edbe4d68770d26bd52ca17917a51456a gas/testsuite/gas/mips/elf-rel28.s +63c3597acf4a86494166dc23ca1b5d76 gas/testsuite/gas/mips/elf-rel3.d +e410b64c4640b935f6bb831e74cd2870 gas/testsuite/gas/mips/elf-rel3.s +4b7429259a1a34ec68bd6044981bfd92 gas/testsuite/gas/mips/elf-rel4.d +1c442eac01601b144d6c4996f135529e gas/testsuite/gas/mips/elf-rel4.s +7da48a40b9c65128701389907d56e77b gas/testsuite/gas/mips/elf-rel5.d +afc1f5689df1d0e4acbdc2b757e6cb16 gas/testsuite/gas/mips/elf-rel5.s +5d94a0ffcf8dccff9a47b65329bed287 gas/testsuite/gas/mips/elf-rel6-n32.d +d646e43e35cbf157d7438aeabcdb02c2 gas/testsuite/gas/mips/elf-rel6-n64.d +72f5dbd4ceb377d2b7d838cbe58e8b3f gas/testsuite/gas/mips/elf-rel6.d +6a31d45f2d668f87dd958a3ec5818dff gas/testsuite/gas/mips/elf-rel6.s +5547d261f60275f6c55c3dae337efa6f gas/testsuite/gas/mips/elf-rel7.d +b6baa98ec9d4b2adfd3f5d39bbeae554 gas/testsuite/gas/mips/elf-rel7.s +c7fc4ade739ba6c4251429ad2ca33595 gas/testsuite/gas/mips/elf-rel8-mips16.d +171e760b94403603a29328cecfe6f02f gas/testsuite/gas/mips/elf-rel8-mips16.s +b190c96744ac9f75edb8afcd4eac2508 gas/testsuite/gas/mips/elf-rel8.d +4e472ae6748e852b7042fa1f4c93adb7 gas/testsuite/gas/mips/elf-rel8.s +21b3361ec604af7eda9b4b1371806461 gas/testsuite/gas/mips/elf-rel9-mips16.d +3e7e6755eded083db22a495f9533b414 gas/testsuite/gas/mips/elf-rel9-mips16.s +0d920384da162c2db2e07d8229712b4d gas/testsuite/gas/mips/elf-rel9.d +b2bbff55e0858b353cbab866d75a667e gas/testsuite/gas/mips/elf-rel9.s +33497173dfabd65fb6dcdd870c38284e gas/testsuite/gas/mips/elf_arch_mips1.d +2f7189968598e85e9a6d9553ad4bd98f gas/testsuite/gas/mips/elf_arch_mips2.d +a59ce8a45ea4d62efead35c03e80c946 gas/testsuite/gas/mips/elf_arch_mips3.d +24a6739368675680e62da8b43229db24 gas/testsuite/gas/mips/elf_arch_mips32.d +9a87a8c1c1e14c84eed5b0a170fe2f87 gas/testsuite/gas/mips/elf_arch_mips32r2.d +fabd38587c85d4b0d4d03161e20f80df gas/testsuite/gas/mips/elf_arch_mips4.d +1a0323806fc40e26782f9ce94d44aa3d gas/testsuite/gas/mips/elf_arch_mips5.d +cd1bdbc63429b93b91d3c926091a21d4 gas/testsuite/gas/mips/elf_arch_mips64.d +4487722fdd93cd65723774f04e4c62ae gas/testsuite/gas/mips/elf_arch_mips64r2.d +823bc814523dbcb0ca578007a4ef6b8d gas/testsuite/gas/mips/elf_ase_micromips-2.d +43326b04a96561ff2e11e1fb1a2e3125 gas/testsuite/gas/mips/elf_ase_micromips.d +f2641b7c748ae9495374e6a8bfc42a8f gas/testsuite/gas/mips/elf_ase_mips16-2.d +5c39d0cbad042e1266c9acbf55d98baf gas/testsuite/gas/mips/elf_ase_mips16.d +6531d00a109f1e0829eda1178a1b886a gas/testsuite/gas/mips/elf_e_flags.c +6bbeff5a2159c064f18894cc7bd9b7ef gas/testsuite/gas/mips/elf_e_flags.s +5195b99d09665b7ef9b71e2c53bb8fd6 gas/testsuite/gas/mips/elf_e_flags1.d +bb39999583f7c2aca308a93651cf8c68 gas/testsuite/gas/mips/elf_e_flags2.d +f63ed5c3cdbd37ab7940faa40cf8f2b5 gas/testsuite/gas/mips/elf_e_flags3.d +f63ed5c3cdbd37ab7940faa40cf8f2b5 gas/testsuite/gas/mips/elf_e_flags4.d +7ed80a5d8b87105ce7c5f0d36faeba6d gas/testsuite/gas/mips/elfel-rel.d +617e895ce1525446cfdfd10dd93f0656 gas/testsuite/gas/mips/elfel-rel2.d +ff629ca128c6d5d661058f5d9a1242a5 gas/testsuite/gas/mips/elfel-rel3.d +78bc390993b007fb9b0866209d3c30d1 gas/testsuite/gas/mips/empty.s +e3977ecfe77dc7125c939f3d9b2a12cb gas/testsuite/gas/mips/eret-1.d +daa352ee43f9804ee315eff1622faf55 gas/testsuite/gas/mips/eret-1.s +6ed7a7d5d3d0ac80f3fe3f643778e53f gas/testsuite/gas/mips/eret-2.d +6f37c89b983a95bd535c3650c398218f gas/testsuite/gas/mips/eret-2.s +5ce75bcb281795ced9c46e74f501fde1 gas/testsuite/gas/mips/eret-3.d +485d74927d6edab032af9f55a963a6e4 gas/testsuite/gas/mips/eret-3.s +bcf73183f8949a816b6901d22fbe1162 gas/testsuite/gas/mips/expr1.d +6fb3005d059cb1b45a4a86e14c56fcac gas/testsuite/gas/mips/expr1.s +32922f0496e841aa3a1bd4209a4cd901 gas/testsuite/gas/mips/fpr-names-32.d +c113920cb549a0af681b07ea67a13218 gas/testsuite/gas/mips/fpr-names-64.d +4cb09267c5e0b68305e75d7c9d1e4bd5 gas/testsuite/gas/mips/fpr-names-n32.d +a43e6c1cd7d89b4b715b852927d5135b gas/testsuite/gas/mips/fpr-names-numeric.d +824a085f211c176750127e9a311c514d gas/testsuite/gas/mips/fpr-names.s +d74dfe4a05aff75e80e09e2afad6ac01 gas/testsuite/gas/mips/gpr-names-32.d +8ea9e708ff9c7c31e60e3b46e16838aa gas/testsuite/gas/mips/gpr-names-64.d +bb6c0c7be041ec5f6406ae33c304c041 gas/testsuite/gas/mips/gpr-names-n32.d +75457dd316069b8bb3e5afce3748723e gas/testsuite/gas/mips/gpr-names-numeric.d +7500fbfda3124c0dbda33a9b704a44f5 gas/testsuite/gas/mips/gpr-names.s +f415b030a55928482057aea074f309f8 gas/testsuite/gas/mips/hwr-names-mips32r2.d +862acc414d4dda65d1e20f56cbfaf7c1 gas/testsuite/gas/mips/hwr-names-mips64r2.d +2b9a455406eb8f66f8f200bcf2ee0466 gas/testsuite/gas/mips/hwr-names-numeric.d +849a87fc73c7b8b6f65392a02df39104 gas/testsuite/gas/mips/hwr-names.s +3cc2090a29285939cfefea6406e3ffe4 gas/testsuite/gas/mips/illegal.l +75704852136f9d0d9888c8899cca307e gas/testsuite/gas/mips/illegal.s +b47234477b017d8640d0a583d17b44cb gas/testsuite/gas/mips/itbl +3be9cfa967f82e0b4325b152baf0f23a gas/testsuite/gas/mips/itbl.s +45f0c80b7327d4d02804ed71299fdc2b gas/testsuite/gas/mips/jal-mask-1.s +ef62dd730021f9ba5345eb51787de1d8 gas/testsuite/gas/mips/jal-mask-11.d +c10b3a20127cde09f5e62be66746ee8e gas/testsuite/gas/mips/jal-mask-12.d +ef2ab95e9a7924b784919de105703082 gas/testsuite/gas/mips/jal-mask-2.s +f04a4ad7e2f310d73b3152d6852d7547 gas/testsuite/gas/mips/jal-mask-21.d +02ffa077e00411500c80511d7ffdd297 gas/testsuite/gas/mips/jal-mask-22.d +806671f3ba17b750c415c62f3483b1a8 gas/testsuite/gas/mips/jal-newabi.d +05fc99b54ef095862bfb5f15fdfdbb59 gas/testsuite/gas/mips/jal-newabi.s +af73cf131e4217ded49d9937721c78ac gas/testsuite/gas/mips/jal-range.l +d37160d514747dbd273f2dae78242675 gas/testsuite/gas/mips/jal-range.s +9f76abe17eae5e832e3fe8e2561c3a7d gas/testsuite/gas/mips/jal-svr4pic-noreorder.d +69acea1a2f0dc70e2298bc9b1c22be97 gas/testsuite/gas/mips/jal-svr4pic-noreorder.s +2413cb3ebf65878045559e3180a64294 gas/testsuite/gas/mips/jal-svr4pic.d +496e5c986c5989166eba2d42de91dee3 gas/testsuite/gas/mips/jal-svr4pic.s +19c8a1209668b1d8b7e9c2dfa5c41223 gas/testsuite/gas/mips/jal-xgot.d +7d5f55558c4d32d5c46562b22e10b684 gas/testsuite/gas/mips/jal.d +c91da61468610b71bd8209d11d782b4d gas/testsuite/gas/mips/jal.s +0ae9d1d0a0e98ce6040e3939b92a53f4 gas/testsuite/gas/mips/jalr.l +d740c4cef36b7968eff6955682fafa5f gas/testsuite/gas/mips/jalr.s +eaf7641276b663bb8bd51fcb75da2fe8 gas/testsuite/gas/mips/jalr2.d +e91e123d8da933f0d9cd44baa42fc6bd gas/testsuite/gas/mips/jalr2.s +8c9d1af49f7ec6b67cbf99241cab1562 gas/testsuite/gas/mips/l_d-forward-n32.d +08d422b335a6625653d61fcdd41db149 gas/testsuite/gas/mips/l_d-forward-n64.d +2764794e60779f3ce4f29e88e30db73a gas/testsuite/gas/mips/l_d-forward.d +32d75e50f2ff5ffc25d0779fb6f68cf4 gas/testsuite/gas/mips/l_d-n32.d +d67ec836c157d20163fbef6a02e69aca gas/testsuite/gas/mips/l_d-n64.d +e4e995234f99d6f68349712c6239eaf6 gas/testsuite/gas/mips/l_d.d +15356c60bcac6e156c5f629a88d92fe0 gas/testsuite/gas/mips/la-svr4pic.d +45f6ffc8e167946c3e1d44a703cba0e4 gas/testsuite/gas/mips/la-xgot.d +11e4734b84595954b767eba5d0bb1044 gas/testsuite/gas/mips/la.d +f479612dc60112156a66a5292a60b205 gas/testsuite/gas/mips/la.s +cf4d58f62d8c3f7a1bdbfd58ba6cc86b gas/testsuite/gas/mips/lb-pic.s +d80e8d1ab0a8aabb265cc4a63fb15a17 gas/testsuite/gas/mips/lb-svr4pic-ilocks.d +28a1aeb5b798b08aeb8f41952783613e gas/testsuite/gas/mips/lb-svr4pic.d +f8212d08fb744582e87e55a54250a46a gas/testsuite/gas/mips/lb-xgot-ilocks.d +4226b46737391e95c5b2739382046806 gas/testsuite/gas/mips/lb-xgot.d +07546687a8afde203d0e83551c213a67 gas/testsuite/gas/mips/lb.d +e9d35a3d0cdd51294a858378d467574d gas/testsuite/gas/mips/lb.s +12bd768f81937939f2f0f8232a2f2dde gas/testsuite/gas/mips/lca-svr4pic.d +53cd33ce035fdad5cde09253c9ebb6f1 gas/testsuite/gas/mips/lca-xgot.d +f23be7fae2a96c3284a681a8e2207752 gas/testsuite/gas/mips/lca.s +fb73f8a70eb9198026905e3a82eaa01f gas/testsuite/gas/mips/ld-forward-n32.d +f46b2bf09beb7b80ddb70b6fbb330de2 gas/testsuite/gas/mips/ld-forward-n64.d +ac95f8fe4efde5ed904cf5ae177ad821 gas/testsuite/gas/mips/ld-forward.d +330347418e6fbfbf7884cf95bd5d5ad3 gas/testsuite/gas/mips/ld-n32.d +c97bff2f3f821b2198610ff968b0acc6 gas/testsuite/gas/mips/ld-n64.d +1040f7d178a2863a838e2a807fc50f06 gas/testsuite/gas/mips/ld-pic.s +a48027431f0a603aa97ae1688b56e5ab gas/testsuite/gas/mips/ld-svr4pic.d +db420551b3b1124e47242a855b04a348 gas/testsuite/gas/mips/ld-xgot.d +a5222f51b7aecf12f2e42c9a054293b5 gas/testsuite/gas/mips/ld.d +c3339588aceb9f9f7f4650b3156b483f gas/testsuite/gas/mips/ld.s +002631a74bfdd358e1a48431b6723c1b gas/testsuite/gas/mips/ldc1-forward-n32.d +6e35231f7b1a142dec8920d9a346bf20 gas/testsuite/gas/mips/ldc1-forward-n64.d +d7c7f14bdc9c4f05e823dd0cc196f77f gas/testsuite/gas/mips/ldc1-forward.d +71dfc20b34f768a82e9cea826d3648a2 gas/testsuite/gas/mips/ldc1-n32.d +a98204b0290fe9ed6d5020e8b7219563 gas/testsuite/gas/mips/ldc1-n64.d +667f9870ef9993dc224342147912693a gas/testsuite/gas/mips/ldc1.d +e3c5f4701fa5ef6da67ab162e0701906 gas/testsuite/gas/mips/ldstla-32-1.l +e715607a1b2e59844473eea6a28b3b3d gas/testsuite/gas/mips/ldstla-32-1.s +8f6518564ee0f0b69553f9081bcd8787 gas/testsuite/gas/mips/ldstla-32-mips3-1.l +bdfff1940f0efbe7e068b5611681b82d gas/testsuite/gas/mips/ldstla-32-mips3-1.s +a040703947672deddbb541a293c6b1a6 gas/testsuite/gas/mips/ldstla-32-mips3-shared.d +db6df3bc2b3ec66f3b66337031f2f3ae gas/testsuite/gas/mips/ldstla-32-mips3.d +67cc1f7a7b4b84eaef6c85592ca0942f gas/testsuite/gas/mips/ldstla-32-mips3.s +94b885bbc3a86cc92e817d48cd7dceb1 gas/testsuite/gas/mips/ldstla-32-shared.d +71ee7a5d7dd944b56243a89f9b283fa4 gas/testsuite/gas/mips/ldstla-32.d +424e9e3a1c37af4b60498276e4e9af35 gas/testsuite/gas/mips/ldstla-32.s +3d4151db916f1064692db92eb644cbd9 gas/testsuite/gas/mips/ldstla-eabi64.d +6076b4210a9e688df8fd43c16e493ba2 gas/testsuite/gas/mips/ldstla-n64-shared.d +3e0fa8e7e5fc151ea9fad9b2bf44c2ad gas/testsuite/gas/mips/ldstla-n64-sym32.d +eb30f1d704a4444b9000e819c618424c gas/testsuite/gas/mips/ldstla-n64.d +58dae8f6134587e036344a9428ce6586 gas/testsuite/gas/mips/ldstla-n64.s +e17dbe468d298789464c46b6e6e39d27 gas/testsuite/gas/mips/ldstla-sym32.s +a37c4b011335b468d1f281815cf5e52d gas/testsuite/gas/mips/li.d +04a3780fac2911246ce59f521b91f676 gas/testsuite/gas/mips/li.s +d5d5aaf1d8ceef401619713a7b82ddde gas/testsuite/gas/mips/lif-svr4pic.d +f0a2320bdd6af639af27993f486030bb gas/testsuite/gas/mips/lif-xgot.d +a0ca08a8353d2c7bc90c3d3a90ba541c gas/testsuite/gas/mips/lifloat.d +50ee76bc3e007e2aea14b01a980091b3 gas/testsuite/gas/mips/lifloat.s +ed5ce13048b0a45f36cbdc1fcc4d6c19 gas/testsuite/gas/mips/lineno.d +431d0cb02d76e0cee8af0a855bf15842 gas/testsuite/gas/mips/lineno.s +021781f724e40caa2371a8f4a3b95137 gas/testsuite/gas/mips/loc-swap-2.d +f67255606d6ab4fcddc6043232a8fd47 gas/testsuite/gas/mips/loc-swap-2.s +fd1c9aae935b5d7620cd4c158368f377 gas/testsuite/gas/mips/loc-swap-dis.d +b33d162eb085ff16398b2519a6e2ad13 gas/testsuite/gas/mips/loc-swap.d +fc0804db02b9b639ce307981c6c6ce6c gas/testsuite/gas/mips/loc-swap.s +2c05d6e0135964a7fb7bff8948ac903b gas/testsuite/gas/mips/loongson-2e.d +42be265f01c9dc06f443800d494c0a19 gas/testsuite/gas/mips/loongson-2e.s +fe089e57a535f00057a2e44959161caf gas/testsuite/gas/mips/loongson-2f-2.d +6ed141db25596eecbb21f66874b72440 gas/testsuite/gas/mips/loongson-2f-2.s +bd1b38ccfe2af5382f95cfce2f0f6c47 gas/testsuite/gas/mips/loongson-2f-3.d +ed330c6efd79d4a20d7d0c8200d38553 gas/testsuite/gas/mips/loongson-2f-3.s +c145fc3a2dd8a9f0eefb75f1c80a0488 gas/testsuite/gas/mips/loongson-2f.d +68b6527ca799c669b744069b7f6167f5 gas/testsuite/gas/mips/loongson-2f.s +39487ecfd545b9ba745744dfdf4dca3d gas/testsuite/gas/mips/loongson-3a-2.d +0ee2ea8a01c42a4d4983bf06eb550038 gas/testsuite/gas/mips/loongson-3a-2.s +f6c2ac39c9eb72be1c2ad621c3c1a018 gas/testsuite/gas/mips/loongson-3a-3.d +23f5fc04508fd01556b40bb66974a1c7 gas/testsuite/gas/mips/loongson-3a-3.s +9f39f193a67802ac320336d4e3a7c2bb gas/testsuite/gas/mips/loongson-3a.d +2d2c9d3248200a829ed315a1dd054f40 gas/testsuite/gas/mips/loongson-3a.s +d8456a592251a715d03edd92470bdf06 gas/testsuite/gas/mips/macro-warn-1-n32.d +773413904dd1ddfa0cdbd72042dffa1b gas/testsuite/gas/mips/macro-warn-1-n32.l +6ee48c6e65d0c8a2f7cea8071bf5c975 gas/testsuite/gas/mips/macro-warn-1.d +32fa865bbc5c3e7febd1e665068b87ea gas/testsuite/gas/mips/macro-warn-1.l +ab66485696c800a8416450e1b36f092a gas/testsuite/gas/mips/macro-warn-1.s +c92bb255d0a4b5117dbd3d089b3249fc gas/testsuite/gas/mips/macro-warn-2-n32.d +99db57727f1b9241274b974a6688e594 gas/testsuite/gas/mips/macro-warn-2.d +db8744b3c40056b50c250f4b2787539f gas/testsuite/gas/mips/macro-warn-2.l +2709f4454ddc55c88beb2b5fc524755f gas/testsuite/gas/mips/macro-warn-2.s +0e2295f4991fc3534fec5e257cfb4042 gas/testsuite/gas/mips/macro-warn-3.d +16da7d3602a7a6547d4f40c59a2eb5f2 gas/testsuite/gas/mips/macro-warn-3.l +91289ab33e95282457567256ff70bcfb gas/testsuite/gas/mips/macro-warn-3.s +45701b0c9f7fc1cdf218c256905da73b gas/testsuite/gas/mips/macro-warn-4.d +e2242cb25647a83087c9035837475bf6 gas/testsuite/gas/mips/macro-warn-4.l +1a6e68b5c63e3a7fd2c4f55e00b2f543 gas/testsuite/gas/mips/macro-warn-4.s +bbaf9a8f8265bcdc0ec57be140e791d1 gas/testsuite/gas/mips/mcu.d +eb476525339ed6d18e69d8f0a8424611 gas/testsuite/gas/mips/mcu.s +776c309bbe8786388252a44182698677 gas/testsuite/gas/mips/micromips-branch-delay.d +377b10f234f1bbce4377d5029bceef0c gas/testsuite/gas/mips/micromips-branch-delay.l +ccc65118c4fe4fbcc38a1e1a8f5273e6 gas/testsuite/gas/mips/micromips-branch-delay.s +1e45b83d06ea9ed6ee869c6987bce7ad gas/testsuite/gas/mips/micromips-branch-relax-pic.d +a51b698ca9738c1f275bd0804348e950 gas/testsuite/gas/mips/micromips-branch-relax-pic.l +57bebe5335f7848f68bf73fcbd31ae49 gas/testsuite/gas/mips/micromips-branch-relax.d +12e064bba9afbff8e7c2093a9623b0b6 gas/testsuite/gas/mips/micromips-branch-relax.l +98a90a338941b432557487fb9b2612c0 gas/testsuite/gas/mips/micromips-branch-relax.s +780c2dd67f02a89039063c3367a1e649 gas/testsuite/gas/mips/micromips-size-0.l +7f33c2a229d0a96f132f6ae0b100b632 gas/testsuite/gas/mips/micromips-size-0.s +0b619e0246da809e172e62412814b433 gas/testsuite/gas/mips/micromips-size-1.d +f22c488ff580284a425c2c86c3c3b797 gas/testsuite/gas/mips/micromips-size-1.l +bfd14976773cf4d84b3d683279dbbb15 gas/testsuite/gas/mips/micromips-size-1.s +02aa7d519682f03ee271d6c40bbcaa34 gas/testsuite/gas/mips/micromips-trap.d +0d42022d80b06483539419398aa297a9 gas/testsuite/gas/mips/micromips.d +7fa796a732cdaad43cb61cefd49b57bc gas/testsuite/gas/mips/micromips.l +6ba349895cda3a06a94523118edba070 gas/testsuite/gas/mips/micromips.s +93dbbdea7f49971fe55c2ea6f5b10e06 gas/testsuite/gas/mips/micromips@abs.d +bde3ec95a6eb673d6add604fce812e11 gas/testsuite/gas/mips/micromips@add.d +94362b3d3f6ab04ee6a39d7ad2e774e0 gas/testsuite/gas/mips/micromips@alnv_ps-swap.d +9d227311d301c41dc435667d23db692b gas/testsuite/gas/mips/micromips@and.d +4525247c28fbaa622195e1b724aae7d9 gas/testsuite/gas/mips/micromips@beq.d +6f3d0a7696d191edfd0438170e3da4c3 gas/testsuite/gas/mips/micromips@bge.d +e9cb030dd9cf179b6d0d0cc7f239e8b8 gas/testsuite/gas/mips/micromips@bgeu.d +cca307c64e8710a57428cd3b0ee798d8 gas/testsuite/gas/mips/micromips@blt.d +e6bb1bf5282d9ad3955bd46901d9f5bf gas/testsuite/gas/mips/micromips@bltu.d +149b089b2b937acde6928ba9f78c36d0 gas/testsuite/gas/mips/micromips@branch-likely.d +78745b81ec52fb53c783a0908da70abd gas/testsuite/gas/mips/micromips@branch-misc-1.d +638e5e2bf1ba771296afb2fb5966c2e3 gas/testsuite/gas/mips/micromips@branch-misc-2-64.d +d0a75d3ede5409809bfa636a011500dd gas/testsuite/gas/mips/micromips@branch-misc-2.d +46b95eedafacda78caf4fc84b97e6d2e gas/testsuite/gas/mips/micromips@branch-misc-2pic-64.d +c377558df8044fbe3d18bb74213a31d3 gas/testsuite/gas/mips/micromips@branch-misc-2pic.d +7a16cc8f6cec020b40815f67cb65f8d4 gas/testsuite/gas/mips/micromips@branch-misc-4-64.d +399294fbae619c7202f9ea840c46606e gas/testsuite/gas/mips/micromips@branch-misc-4.d +2c481ca5509f40efa33ddda4daad5a45 gas/testsuite/gas/mips/micromips@branch-self.d +42fa7746c515b34b1247e6dcf7153252 gas/testsuite/gas/mips/micromips@cache.d +adf3006245d838f2f3a18b55c9aa8a92 gas/testsuite/gas/mips/micromips@daddi.d +6d81b59c5dfe3a2eacdc21cd14adafdb gas/testsuite/gas/mips/micromips@dli.d +d19b6b342b2549abfc0911cd8dd69f55 gas/testsuite/gas/mips/micromips@elf-jal.d +926e4c7f24396ffed0e11bf8955761cd gas/testsuite/gas/mips/micromips@elf-rel2.d +18ac0da9e7433c2364887abc9ea3fdae gas/testsuite/gas/mips/micromips@elf-rel4.d +4a287489ab50b5fe99afe6ce4152e57c gas/testsuite/gas/mips/micromips@elfel-rel2.d +3e6195b177a70ae0bc181d911a09b03c gas/testsuite/gas/mips/micromips@jal-mask-11.d +e98a1cc4672ad58c154dde8a4622a55d gas/testsuite/gas/mips/micromips@jal-mask-12.d +ae39ffcb13472ac744b2ef316cd7be8f gas/testsuite/gas/mips/micromips@jal-svr4pic-noreorder.d +7813ea3aa3644a8719b62ad8d391fe6f gas/testsuite/gas/mips/micromips@jal-svr4pic.d +dffe5b53f35f0cb35bd502d6ad18cd56 gas/testsuite/gas/mips/micromips@lb-svr4pic-ilocks.d +3c8ebc042a187303e43e3ed64d3218c3 gas/testsuite/gas/mips/micromips@li.d +dd4d8a919e4df53674b6b7283b96a713 gas/testsuite/gas/mips/micromips@loc-swap-2.d +401b0819f70dba35be2ce7c9b1f5f092 gas/testsuite/gas/mips/micromips@loc-swap-dis.d +081d21c311c8ffa260639e48cdf38015 gas/testsuite/gas/mips/micromips@loc-swap.d +f5916925a29572a759288446f129668f gas/testsuite/gas/mips/micromips@mcu.d +03b6a2facab8afb47537c16dffb2c233 gas/testsuite/gas/mips/micromips@mips1-fp.d +969019e1ca47382f828354a3dc02ffd8 gas/testsuite/gas/mips/micromips@mips32-cp2.d +9c9e963126258d4d73d1d9bc3df654b5 gas/testsuite/gas/mips/micromips@mips32-cp2.s +8f201427eb39109c368b807f0e501a00 gas/testsuite/gas/mips/micromips@mips32-imm.d +7a777c36c108509ea0d4480b70311159 gas/testsuite/gas/mips/micromips@mips32-imm.s +a8c7eecbce04c426a00dd194517bb006 gas/testsuite/gas/mips/micromips@mips32-sf32.d +bc2727ae46b6b19cf7ae1af2e49b4eb2 gas/testsuite/gas/mips/micromips@mips32.d +582df2797966993d06d0081528b4b10e gas/testsuite/gas/mips/micromips@mips32r2-cp2.d +cf2e0f3efff2648195aff4c23997c2e7 gas/testsuite/gas/mips/micromips@mips32r2-cp2.s +ac8a693b166a6acd4363a896625868ff gas/testsuite/gas/mips/micromips@mips32r2-fp32.d +f9e7abb8bd762c2545d34d05ec92f1e6 gas/testsuite/gas/mips/micromips@mips32r2-sync.d +e7ac49c71c3b2c9f3dba106ddd2360b3 gas/testsuite/gas/mips/micromips@mips32r2.d +a253d46098cbee8e928d856a35694b2d gas/testsuite/gas/mips/micromips@mips4-branch-likely.d +32418bdf8808aad7f44f6250ab1b7cb0 gas/testsuite/gas/mips/micromips@mips4-fp.d +0bf951f61cd230a1efb45eb07554b926 gas/testsuite/gas/mips/micromips@mips4.d +adbd1e26b3301dbbbb9bfe13452c0164 gas/testsuite/gas/mips/micromips@mips5-fp.d +0603107bfbed6ca2f03bccd7a5fde0dc gas/testsuite/gas/mips/micromips@mips64-cp2.d +0301477066fe978986865714e775fe25 gas/testsuite/gas/mips/micromips@mips64-cp2.s +6e85ce8da66e06aadea3327b1a332c5a gas/testsuite/gas/mips/micromips@mips64.d +10b3d5a070900cd286fa5243a5477c73 gas/testsuite/gas/mips/micromips@mips64r2.d +368f104a2080700c9e53cd7d2c18f8d2 gas/testsuite/gas/mips/micromips@pref.d +69ee1cd13c91d87df2f3bd5e480242db gas/testsuite/gas/mips/micromips@relax-at.d +4688c53aea531e25142b98978ee273ab gas/testsuite/gas/mips/micromips@relax-swap3.d +bb3799f80211cb38af512a71ef731a48 gas/testsuite/gas/mips/micromips@relax.d +ba3129228b6551e19233f8c6e23d5b0e gas/testsuite/gas/mips/micromips@rol-hw.d +904cb0c3ee6f7d87e9d38ad61d08437f gas/testsuite/gas/mips/micromips@uld2-eb.d +f8c212937cc629e0420a53521cd0f31a gas/testsuite/gas/mips/micromips@uld2-el.d +7afe371c8a1cf116f658a973fb1302f5 gas/testsuite/gas/mips/micromips@ulh2-eb.d +1e1bb9897da647388d57ac6f7f51c526 gas/testsuite/gas/mips/micromips@ulh2-el.d +26b02e61544b76df2e336c755a44e61b gas/testsuite/gas/mips/micromips@ulw2-eb-ilocks.d +3eb6a45d16a7fff7b9822f6a77e17d4e gas/testsuite/gas/mips/micromips@ulw2-el-ilocks.d +f90e6665ee364e66764ad76ea38d581c gas/testsuite/gas/mips/mips-abi32-pic.d +3e79a0a6b17b839dbc4d121dd0bf0472 gas/testsuite/gas/mips/mips-abi32-pic.s +364a5dc1665c4a2a2806f357e34ff35e gas/testsuite/gas/mips/mips-abi32-pic2.d +9a43c32af8a197c8734ea9e2fb371eb1 gas/testsuite/gas/mips/mips-abi32-pic2.s +219f20a6f3faa15badcbf4b475d92b5c gas/testsuite/gas/mips/mips-abi32.d +310ea844ee3e8aced00ea6ee27db05f4 gas/testsuite/gas/mips/mips-abi32.s +be138003a03404e351e849f06bf1350d gas/testsuite/gas/mips/mips-double-float-flag.l +914dd96309b8af020441a45bd3f7bba3 gas/testsuite/gas/mips/mips-double-float-flag.s +501c37622a3a634443963259b0106b1a gas/testsuite/gas/mips/mips-gp32-fp32-pic.d +2b5da35909aae208e59ed71f01f84a00 gas/testsuite/gas/mips/mips-gp32-fp32-pic.s +ef2849bfb75296b84e13354c7023031d gas/testsuite/gas/mips/mips-gp32-fp32.d +38402d7406992c005e3d22c792095906 gas/testsuite/gas/mips/mips-gp32-fp32.s +caeac07dda2e3ba801d6a62e64ceca30 gas/testsuite/gas/mips/mips-gp32-fp64-pic.d +6fec84d1a325308f963f9813d5a9df84 gas/testsuite/gas/mips/mips-gp32-fp64-pic.s +efa5f771ebee275494762b5ca2973274 gas/testsuite/gas/mips/mips-gp32-fp64.d +795b6fd35774d1b29cefb03bc8f1a04e gas/testsuite/gas/mips/mips-gp32-fp64.l +c8b1255a48810ecd5641efd78f9fac67 gas/testsuite/gas/mips/mips-gp32-fp64.s +87f0e281b0daa59d0050d9130df7c545 gas/testsuite/gas/mips/mips-gp64-fp32-pic.d +1e84a0631149baa9435b4334b7bcdf97 gas/testsuite/gas/mips/mips-gp64-fp32-pic.l +2db2ff450b5afa36c19534edab7192b2 gas/testsuite/gas/mips/mips-gp64-fp32-pic.s +0d651402a5fbbf29f2e52cb3f7cf8f30 gas/testsuite/gas/mips/mips-gp64-fp32.d +1e6f61d7ae9ac182db762b0e4c8a9271 gas/testsuite/gas/mips/mips-gp64-fp32.l +0c487b950f2e00c12c4f3bd2d2f597a1 gas/testsuite/gas/mips/mips-gp64-fp32.s +12cec0f1bd9c11425f4eb5f7bdc5f311 gas/testsuite/gas/mips/mips-gp64-fp64-pic.d +49eaf79b46ed3df73a7bd49dda0611ed gas/testsuite/gas/mips/mips-gp64-fp64-pic.s +79b5f54ad25f04362492f4cef9d315ff gas/testsuite/gas/mips/mips-gp64-fp64.d +e6be4d9ff36fe372a5b838c914461929 gas/testsuite/gas/mips/mips-gp64-fp64.l +0bba7e49525b335ca7a88ea75cb22c73 gas/testsuite/gas/mips/mips-gp64-fp64.s +fc0703d098b9243ea2771a15a530bc69 gas/testsuite/gas/mips/mips-hard-float-flag.l +418ef1b98869ee9a5ddbffb48ec88ee6 gas/testsuite/gas/mips/mips-hard-float-flag.s +75ae19684fdab50c7312caa074a3d93d gas/testsuite/gas/mips/mips-jalx-2.d +19c174e7163ffe6a72be560e026bd6b6 gas/testsuite/gas/mips/mips-jalx-2.s +c0510bc1b6445ec158c3c85f37c19ee4 gas/testsuite/gas/mips/mips-jalx.d +1f6a560c324971ac8573be14aacc528f gas/testsuite/gas/mips/mips-jalx.s +75f06a4cc8efae4d60c9582a87640c8d gas/testsuite/gas/mips/mips-macro-ill-nofp.l +cce840b0285e8acb86caa07b81590dfb gas/testsuite/gas/mips/mips-macro-ill-nofp.s +deb1c801ef639ed932140d2dba02b95b gas/testsuite/gas/mips/mips-macro-ill-sfp.l +066c4e7b6705e4be69dee6e1a61e6aa7 gas/testsuite/gas/mips/mips-macro-ill-sfp.s +8e4e0c3501ebfef5679e4824e2e730a4 gas/testsuite/gas/mips/mips.exp +9ebbe8ac1d038076975e33308084d08d gas/testsuite/gas/mips/mips1-fp.d +2867b7b4f1e06f673fff3b9f4c1d601e gas/testsuite/gas/mips/mips1-fp.l +670af8eb95b87df0e913a4ff9891a9c7 gas/testsuite/gas/mips/mips1-fp.s +69fcac4647653e47e7cdb109987121cf gas/testsuite/gas/mips/mips16-64.d +1f16ab56eccaf7cc655d5642009788f0 gas/testsuite/gas/mips/mips16-dwarf2-n32.d +d1849362896f01c1adf09da894f75c5f gas/testsuite/gas/mips/mips16-dwarf2.d +6b805809a6f9a5b4ff587982aeb3aa57 gas/testsuite/gas/mips/mips16-dwarf2.s +3d5b6e3da111a5087aeb3b8f3ab690b9 gas/testsuite/gas/mips/mips16-e.d +4785c49a602347865df48551df7121fc gas/testsuite/gas/mips/mips16-e.s +ab3e65486a24379a8ddcfe2ebcf3c1fe gas/testsuite/gas/mips/mips16-f.d +7146e7075936aa4a1434864cf7bf6d4e gas/testsuite/gas/mips/mips16-f.s +13d5e2e012ad1c97c3227b25539936d6 gas/testsuite/gas/mips/mips16-hilo-match.d +b570359884087730d05a0aaa6c4644e9 gas/testsuite/gas/mips/mips16-hilo-match.s +f9406b9f1a2f835edaf26bdf89dd4af5 gas/testsuite/gas/mips/mips16-hilo-n32.d +67199cb41a90f4e6c33e930c6ac84ccc gas/testsuite/gas/mips/mips16-hilo.d +729ccfc0e7f073829ca7f69545469c93 gas/testsuite/gas/mips/mips16-hilo.s +fdeee05b3addaea3355019b07fc7d8f0 gas/testsuite/gas/mips/mips16-intermix.d +c2efc9d570972b526a9e277bae42879d gas/testsuite/gas/mips/mips16-intermix.s +c0332c4d7395b7941df1e9141cf038f0 gas/testsuite/gas/mips/mips16-jalx.d +c6f91156b0d13de84854f1c20c862aba gas/testsuite/gas/mips/mips16-jalx.s +de7b9c119cbf71d0e12b6643fa5dd37d gas/testsuite/gas/mips/mips16-vis-1.d +e2dbdaf3493dfa5a0b7e02e4e0dcb73d gas/testsuite/gas/mips/mips16-vis-1.s +30869d85612d49b0966673de6178997c gas/testsuite/gas/mips/mips16.d +a686ad0a2da9fe043d717c57b4580d0b gas/testsuite/gas/mips/mips16.s +b70bff395055452842cfbfec8b4d9e73 gas/testsuite/gas/mips/mips16@loc-swap-2.d +fa0e904c14899b96035b80f4fd1ef1f4 gas/testsuite/gas/mips/mips16@loc-swap-dis.d +f8c23acbceb2f65308019737540696fd gas/testsuite/gas/mips/mips16@loc-swap.d +902f307654cca653204de6f67f79f23e gas/testsuite/gas/mips/mips16@relax-swap3.d +9ae52f2c47f989d6bc2170949e96e57d gas/testsuite/gas/mips/mips16e-64.d +5ad7162a1b6a7cbe775adf4c08063c55 gas/testsuite/gas/mips/mips16e-64.l +30021283e31eada0b13da587af3bc4eb gas/testsuite/gas/mips/mips16e-64.s +d634740f3f4bc17bbf064a5317cb0260 gas/testsuite/gas/mips/mips16e-jrc.d +ecce530f17dabb5411175579862663fc gas/testsuite/gas/mips/mips16e-jrc.s +9a512a5339561a764c8938f5947a90c0 gas/testsuite/gas/mips/mips16e-save.d +9989e440758c83f4183c998e3f5840dc gas/testsuite/gas/mips/mips16e-save.s +8ca4a6199fde7381f7a42d398693af63 gas/testsuite/gas/mips/mips16e.d +214b27ce6c50ab9b455cb925a9745678 gas/testsuite/gas/mips/mips16e.s +e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/mips1@ecoff@sd-forward.d +4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/mips1@ecoff@sd.d +823c8780c34e6454d4f01ae4e3ea6b6a gas/testsuite/gas/mips/mips1@jal-svr4pic-noreorder.d +2d77e7b8cb5805b8bfe19abd8653770c gas/testsuite/gas/mips/mips1@jal-svr4pic.d +1cb61742f13c0bec9dfde377d4980f2c gas/testsuite/gas/mips/mips1@l_d-forward.d +9e3917e2b60fee8993c2baf23c8b0383 gas/testsuite/gas/mips/mips1@l_d.d +e1eab5230fb7366e300272d5b084b54f gas/testsuite/gas/mips/mips1@ld-forward.d +f9b6fc05c41b9086e807c3fbb033a9de gas/testsuite/gas/mips/mips1@ld.d +44b26dcb0f152b51a4bd37acfd78a133 gas/testsuite/gas/mips/mips1@s_d-forward.d +7032c5e82001f1c7260d8314d034cd21 gas/testsuite/gas/mips/mips1@s_d.d +ac95f8fe4efde5ed904cf5ae177ad821 gas/testsuite/gas/mips/mips2@ecoff@ld-forward.d +ec50b9a1794608609e529cfdd4e5b558 gas/testsuite/gas/mips/mips2@ecoff@ld.d +e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/mips2@ecoff@sd-forward.d +4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/mips2@ecoff@sd.d +3ac8c01b5ac399868c084635f6d51e96 gas/testsuite/gas/mips/mips32-cp2.d +cca58b2b00c7a04c1beca2a664d048d4 gas/testsuite/gas/mips/mips32-cp2.s +b4bfc16b7383c950c323d556a3f2b526 gas/testsuite/gas/mips/mips32-dsp.d +9b4d8c0efead7c0250b77d6432a28f15 gas/testsuite/gas/mips/mips32-dsp.s +90a8ce11aeceb5e8ed29ab6eb6aeddb4 gas/testsuite/gas/mips/mips32-dspr2.d +bfa27a2156914ea3ace07577e0dcd679 gas/testsuite/gas/mips/mips32-dspr2.s +114de0ff23260d1eb1bde1fee20b1e71 gas/testsuite/gas/mips/mips32-imm.d +66b2443546c844ceaf9f00c0d0ab4367 gas/testsuite/gas/mips/mips32-imm.s +64a28f6acbb4d482836d6340973cfc82 gas/testsuite/gas/mips/mips32-mt.d +ad88d7cd1ce33d00f4605c2f97d4cd40 gas/testsuite/gas/mips/mips32-mt.s +2a527714d86f6fdcf069af2c9edbbefa gas/testsuite/gas/mips/mips32-sf32.d +fb0d10a030367ce4f9425c74cbe13ffa gas/testsuite/gas/mips/mips32-sf32.l +58f9d1e3083cdee930bedb837c1ae488 gas/testsuite/gas/mips/mips32-sf32.s +e042203402e3536ca64300255432ca85 gas/testsuite/gas/mips/mips32-sync.d +f977577efe12606bfb0d5034bec79e34 gas/testsuite/gas/mips/mips32-sync.s +c9f638fb95ff4cc7f7538a49b22324f5 gas/testsuite/gas/mips/mips32.d +72bfcc15bc68c0e0a52f26c776219335 gas/testsuite/gas/mips/mips32.s +ac95f8fe4efde5ed904cf5ae177ad821 gas/testsuite/gas/mips/mips32@ecoff@ld-forward.d +ec50b9a1794608609e529cfdd4e5b558 gas/testsuite/gas/mips/mips32@ecoff@ld.d +e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/mips32@ecoff@sd-forward.d +4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/mips32@ecoff@sd.d +be0eb533ebc0379d9c0babb2185c5f07 gas/testsuite/gas/mips/mips32r2-cp2.d +43f63601c20612d60d43155640818766 gas/testsuite/gas/mips/mips32r2-cp2.s +e3a8b21bb26ed5d1b4704477725bb733 gas/testsuite/gas/mips/mips32r2-fp32.d +d8f9ae302cc28b03add0589217f0015e gas/testsuite/gas/mips/mips32r2-fp32.l +fac86714ad2220b1da5bb1a055f7cd8b gas/testsuite/gas/mips/mips32r2-fp32.s +d03f555bc073f0038562c3019d0327d6 gas/testsuite/gas/mips/mips32r2-ill-fp64.l +59658e0b3428861ed4e4ef74205fcd95 gas/testsuite/gas/mips/mips32r2-ill-fp64.s +d03f555bc073f0038562c3019d0327d6 gas/testsuite/gas/mips/mips32r2-ill-nofp.l +e73cc5c25e6b3f2e531219ef62595785 gas/testsuite/gas/mips/mips32r2-ill-nofp.s +4d93dbd622d7b77c4afb1a3e9aa1e5ef gas/testsuite/gas/mips/mips32r2-ill.l +e4bf167b7f52ae862811e7b158f205a8 gas/testsuite/gas/mips/mips32r2-ill.s +6b9fc0eb0902f23169ed72569d9385bc gas/testsuite/gas/mips/mips32r2-sync.d +7978aa13d44bd672d20166d47c60bf3e gas/testsuite/gas/mips/mips32r2-sync.s +2078bac166b96d97257a938d09d130db gas/testsuite/gas/mips/mips32r2.d +c4126d70aba28fe3b9f82f581c71a6e8 gas/testsuite/gas/mips/mips32r2.s +ac95f8fe4efde5ed904cf5ae177ad821 gas/testsuite/gas/mips/mips32r2@ecoff@ld-forward.d +ec50b9a1794608609e529cfdd4e5b558 gas/testsuite/gas/mips/mips32r2@ecoff@ld.d +e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/mips32r2@ecoff@sd-forward.d +4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/mips32r2@ecoff@sd.d +9ccc3aa4ff6b2df17149fd1b5f23b389 gas/testsuite/gas/mips/mips4-branch-likely.d +663815c07b7dc27f751e08e542959898 gas/testsuite/gas/mips/mips4-branch-likely.l +4b23881c6c4acda288472e518f42f70c gas/testsuite/gas/mips/mips4-branch-likely.s +afef3707d4e51fe43a60afbc5bae9617 gas/testsuite/gas/mips/mips4-fp.d +750ab0efe12f0b9439748323976430d8 gas/testsuite/gas/mips/mips4-fp.l +53fdf5667fb95d6d2c5983663f1462b1 gas/testsuite/gas/mips/mips4-fp.s +e474f9b093713dc5babf179126366635 gas/testsuite/gas/mips/mips4.d +235d83eb54cc54bf8ff8672570adb2c9 gas/testsuite/gas/mips/mips4.s +525b9feded73ef555e7eb94cd1459dcc gas/testsuite/gas/mips/mips4010.d +cd49d59fb8e9057e6313f5ff630015b9 gas/testsuite/gas/mips/mips4010.s +e1387d3ba60454e12f2fd65e0dc8f0f1 gas/testsuite/gas/mips/mips4100.d +f864a3faa585a344dde75972a70d1a52 gas/testsuite/gas/mips/mips4100.s +3987ab6f2aea0552dd948c4dc75be6e4 gas/testsuite/gas/mips/mips4650.d +5c10900661e0928e9a340c3c925418b1 gas/testsuite/gas/mips/mips4650.s +f3d31954c8a976ee5879965c3c9604ec gas/testsuite/gas/mips/mips5-fp.d +63e8effa871782fd33ecc97d55a2feb2 gas/testsuite/gas/mips/mips5-fp.l +0e532e8bc0d3c26c91d11ab05bc992a5 gas/testsuite/gas/mips/mips5-fp.s +351dc5d23c29961553f599c529664d16 gas/testsuite/gas/mips/mips64-cp2.d +e02ec9472963db2e6ce59b1c34ca245e gas/testsuite/gas/mips/mips64-cp2.s +134ae5f0901c0a21a3418223b3d6f4df gas/testsuite/gas/mips/mips64-dsp.d +191d27162763bdc3ed4f080cbdcac276 gas/testsuite/gas/mips/mips64-dsp.s +560bcd3d2db7bc623eb910f984ed146e gas/testsuite/gas/mips/mips64-mdmx.d +1febffb6dc592c8a10b7237347f30aa2 gas/testsuite/gas/mips/mips64-mdmx.s +9145d945fcd903fd77f64bff32cb959d gas/testsuite/gas/mips/mips64-mips3d-incl.d +6d0bc31fe00d5d9c9a4fd07e931d6d45 gas/testsuite/gas/mips/mips64-mips3d.d +f2f60961d3a921f1e20c2d386e782f09 gas/testsuite/gas/mips/mips64-mips3d.l +c2a456cf65796a255e1b157f0a487e58 gas/testsuite/gas/mips/mips64-mips3d.s +38754ef857cb66d93893cd6097cd6c31 gas/testsuite/gas/mips/mips64.d +9d99c971f911bc7cc0cbf3d35545271f gas/testsuite/gas/mips/mips64.s +786eb2843ed8ffe47e69bc81724f1c16 gas/testsuite/gas/mips/mips64r2-ill.l +813b1f7f0ece03c4c2566ee2e85529b0 gas/testsuite/gas/mips/mips64r2-ill.s +df92f25d4122d36c854f1f375992b9d3 gas/testsuite/gas/mips/mips64r2.d +bb49ade11c2fd90af659940cd085b04c gas/testsuite/gas/mips/mips64r2.s +1fbc2503a07a256c660f271994dd8066 gas/testsuite/gas/mips/mipsel16-e.d +b92a96c8cebc41672d627eb963464d34 gas/testsuite/gas/mips/mipsel16-f.d +ef0171001ae8a851199eae2014924bcd gas/testsuite/gas/mips/mul-ilocks.d +da8dbb1647cec16e39fdbef014fdc323 gas/testsuite/gas/mips/mul.d +03190409f6e3f76c2b66c8ab590d10bf gas/testsuite/gas/mips/mul.s +bf74a40c246451b61a011e5c879c7612 gas/testsuite/gas/mips/n32-consec.d +fd247b9288db956e0a2713c9f23b1ce5 gas/testsuite/gas/mips/n32-consec.s +7dfc6463d7e1cf9f73bfd449ab2b7863 gas/testsuite/gas/mips/noat-1.d +7050bff7639ba21ec7e51b3895f2c6c7 gas/testsuite/gas/mips/noat-1.s +95eca9454317755995388cb1dd49e2cf gas/testsuite/gas/mips/noat-2.l +b44500553d2ad422012f6078cc100bff gas/testsuite/gas/mips/noat-2.s +95eca9454317755995388cb1dd49e2cf gas/testsuite/gas/mips/noat-3.l +932b518a8c80d85b280867bba5dc9d4a gas/testsuite/gas/mips/noat-3.s +95eca9454317755995388cb1dd49e2cf gas/testsuite/gas/mips/noat-4.l +9a876de7280b37f5d9b43e00cb5b2894 gas/testsuite/gas/mips/noat-4.s +95eca9454317755995388cb1dd49e2cf gas/testsuite/gas/mips/noat-5.l +357277a91ad103c38e71855307ea123f gas/testsuite/gas/mips/noat-5.s +95eca9454317755995388cb1dd49e2cf gas/testsuite/gas/mips/noat-6.l +9969f029155afc0cb5a1e48dbfc0c8ea gas/testsuite/gas/mips/noat-6.s +95eca9454317755995388cb1dd49e2cf gas/testsuite/gas/mips/noat-7.l +3a02483408099325a9be213dc97b067c gas/testsuite/gas/mips/noat-7.s +bc093d7454fb79cc787981a1fda8af1f gas/testsuite/gas/mips/nodelay.d +801d14a6810ebae1f5eefda4bac2a4d8 gas/testsuite/gas/mips/nop.s +47276e7d0842efddcef6af9781e894a9 gas/testsuite/gas/mips/noreorder.d +fb2bae7dc69d4fa8ef75ea2f12131cb2 gas/testsuite/gas/mips/noreorder.s +7cb4a3257e850a426d21d4dd1bd4fc1f gas/testsuite/gas/mips/octeon-ill.l +f01de68f773c8c0971fec0c8e98bb471 gas/testsuite/gas/mips/octeon-ill.s +111dd660b24d0af1c03ab82289a6f3a1 gas/testsuite/gas/mips/octeon-pref.d +127ab9d3e2693f2274f177fa484154a9 gas/testsuite/gas/mips/octeon-pref.s +a493491c607cfbf665501980826de438 gas/testsuite/gas/mips/octeon.d +711a87dbbd5705dc78bb3582e4cbbb18 gas/testsuite/gas/mips/octeon.s +b01faab0afc57debbb4b0fb3e5ec1e3c gas/testsuite/gas/mips/octeon@mips32r2-sync.d +5761aa099e32b2fb86dce98a61bf78fc gas/testsuite/gas/mips/odd-float.d +95ed2d0da0ad874beed09ec727b4e16b gas/testsuite/gas/mips/odd-float.s +244569e0b92ee735e76258141d2a39ff gas/testsuite/gas/mips/perfcount.d +5e216e3c77bb4c99c824b308a1617395 gas/testsuite/gas/mips/perfcount.s +b6e40c562a931b741cd1282c2dc11d2e gas/testsuite/gas/mips/pr12915.d +377cb66597b8da088293a65340028f37 gas/testsuite/gas/mips/pr12915.s +b981910e16055769981d610b35544eec gas/testsuite/gas/mips/pref.d +e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/r3000@ecoff@sd-forward.d +4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/r3000@ecoff@sd.d +4ca43985c965ed9a9f0ce0ccf74b939f gas/testsuite/gas/mips/r3000@jal-svr4pic-noreorder.d +b513db2b66766dc702d2e90438349615 gas/testsuite/gas/mips/r3000@jal-svr4pic.d +1cb61742f13c0bec9dfde377d4980f2c gas/testsuite/gas/mips/r3000@l_d-forward.d +99c2ff79deb5b659bfa390975f2e8393 gas/testsuite/gas/mips/r3000@l_d.d +2e12b0aa44c03a5d09c97f9ae47df74a gas/testsuite/gas/mips/r3000@ld-forward.d +1695b23defb1235e47baf3c17b8d1d8a gas/testsuite/gas/mips/r3000@ld.d +44b26dcb0f152b51a4bd37acfd78a133 gas/testsuite/gas/mips/r3000@s_d-forward.d +4db72c66fa1c2fd7c2af7f4a4f3e2c30 gas/testsuite/gas/mips/r3000@s_d.d +ac95f8fe4efde5ed904cf5ae177ad821 gas/testsuite/gas/mips/r3900@ecoff@ld-forward.d +ec50b9a1794608609e529cfdd4e5b558 gas/testsuite/gas/mips/r3900@ecoff@ld.d +e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/r3900@ecoff@sd-forward.d +4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/r3900@ecoff@sd.d +1cb61742f13c0bec9dfde377d4980f2c gas/testsuite/gas/mips/r3900@l_d-forward.d +99c2ff79deb5b659bfa390975f2e8393 gas/testsuite/gas/mips/r3900@l_d.d +44b26dcb0f152b51a4bd37acfd78a133 gas/testsuite/gas/mips/r3900@s_d-forward.d +4db72c66fa1c2fd7c2af7f4a4f3e2c30 gas/testsuite/gas/mips/r3900@s_d.d +ceed4836c54a8bf404a1a3d82ce775e7 gas/testsuite/gas/mips/reginfo-1.s +6c578da9ac01cb3cf02739c3188e7e68 gas/testsuite/gas/mips/reginfo-1a.d +08bcb6aee0e0506c6cbd10ee558039bb gas/testsuite/gas/mips/reginfo-1b.d +b3f57ed00f3b069586a2d4030cffc62b gas/testsuite/gas/mips/relax-at.d +c6bcb1b90b7783e34a2a74e43b532d91 gas/testsuite/gas/mips/relax-bposge.l +114ce5752bffc3cbf668d0883d90f0b2 gas/testsuite/gas/mips/relax-bposge.s +f4857653176b13a84af6c6343d716c7c gas/testsuite/gas/mips/relax-swap1-mips1.d +412554087d305d51108b71c6fc71fae6 gas/testsuite/gas/mips/relax-swap1-mips2.d +d12b6a49c8eb5ac8dd27fb70f2a1d7c9 gas/testsuite/gas/mips/relax-swap1.l +ba43b08ac1e83497175b0e8b7a40e18a gas/testsuite/gas/mips/relax-swap1.s +17672430609ffd531e4dc027a286f25f gas/testsuite/gas/mips/relax-swap2.d +9fd39030ace0cd3480e0c983d878131e gas/testsuite/gas/mips/relax-swap2.l +ec1c525167ce7e482502efe31f330243 gas/testsuite/gas/mips/relax-swap2.s +52161186d7a2a5a2cfce1daa4806e255 gas/testsuite/gas/mips/relax-swap3.d +4a20cb5523b0ef23d4dc2a4bf918083e gas/testsuite/gas/mips/relax-swap3.s +70a72b5d24ef45bab4081623136ad4bb gas/testsuite/gas/mips/relax.d +5ac7ad74fdcc363065381dd52adc8e19 gas/testsuite/gas/mips/relax.l +ef04f6b27acedf43f04f236dc405867f gas/testsuite/gas/mips/relax.s +1683fa4d4b6a696380beea3012ab1723 gas/testsuite/gas/mips/rm7000.d +6e59f1b5da58f7015fa2c48d29c73445 gas/testsuite/gas/mips/rm7000.s +d95ec21282d79a677dbbade498f21838 gas/testsuite/gas/mips/rol-hw.d +209795675f9ba233ca89b305f6631b19 gas/testsuite/gas/mips/rol.d +f5fc4c2b2064d692482dc6c04c4b64c7 gas/testsuite/gas/mips/rol.s +5f65c9a166dc08f0527a93030918ae2d gas/testsuite/gas/mips/rol64-hw.d +a784263fc184c27bd9630f7b5ee7129d gas/testsuite/gas/mips/rol64.d +2b7d0f4345402303774e4fd6aa9acfd5 gas/testsuite/gas/mips/rol64.s +5258ba7786086636397572fbaf57bdd2 gas/testsuite/gas/mips/s_d-forward-n32.d +4919bbe9009cb11551fa61c7accb2679 gas/testsuite/gas/mips/s_d-forward-n64.d +61d2b3e6baba6742f3a0c230e5aa78c0 gas/testsuite/gas/mips/s_d-forward.d +0fe4f63b37df6dbabb3ac44d86361a54 gas/testsuite/gas/mips/s_d-n32.d +794feaf65f6e45a55c5d41621a43cbc3 gas/testsuite/gas/mips/s_d-n64.d +d2fbd774ca9c0d447c731fece36767a8 gas/testsuite/gas/mips/s_d.d +3d26839ae55d7f0a445d21ce0c0a6ca8 gas/testsuite/gas/mips/sb.d +15410af41b16b3678e11c8c7d4d6d7a7 gas/testsuite/gas/mips/sb.s +be616c1178a3455eaa497791ecc9048a gas/testsuite/gas/mips/sb1-ext-mdmx.d +f803ea0e2f3ddc0f8ee9e48021fcdb97 gas/testsuite/gas/mips/sb1-ext-mdmx.s +3805f0fb2ef9beb840e865a88acfaf29 gas/testsuite/gas/mips/sb1-ext-ps.d +2614c94e549a3ad9a0a0aa2ea8a351bd gas/testsuite/gas/mips/sb1-ext-ps.s +dd4fb82bb446e6ee108b64752eeb0fe1 gas/testsuite/gas/mips/sd-forward-n32.d +b2253aca46772d9bb27b28bdea9defae gas/testsuite/gas/mips/sd-forward-n64.d +e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/sd-forward.d +fa7437542d4aef669710063a2926e92b gas/testsuite/gas/mips/sd-n32.d +87d71bc3fa496aee97088759d60903cf gas/testsuite/gas/mips/sd-n64.d +5880c6e94a3765d0b348b66d53ce341c gas/testsuite/gas/mips/sd.d +5672bc2ab0c07f19403beeb3efb7dbf2 gas/testsuite/gas/mips/sdc1-forward-n32.d +d90262acbdb4dd25cfbbb0922f7d5541 gas/testsuite/gas/mips/sdc1-forward-n64.d +5ae1786b22b9c5213e2828f89d469ed0 gas/testsuite/gas/mips/sdc1-forward.d +c3c713a2f3fef70c4669aa33571d85d8 gas/testsuite/gas/mips/sdc1-n32.d +969daae3ea1d02d9e213534bdc1700c0 gas/testsuite/gas/mips/sdc1-n64.d +5966d368ce31b1011c90f4e187725813 gas/testsuite/gas/mips/sdc1.d +61e0b7643c32dabdde089aadf8f77e83 gas/testsuite/gas/mips/set-arch.d +9bd9d69167ebd4fd9f8479644f983776 gas/testsuite/gas/mips/set-arch.l +99703d8a479f56f255c88de6b9e4aad5 gas/testsuite/gas/mips/set-arch.s +07e4b7c46d6e7f1efa76f09aed05b729 gas/testsuite/gas/mips/smartmips.d +6302eb2a242d1bc67c42ed4e285702f4 gas/testsuite/gas/mips/smartmips.s +5c695a603e00085a7b10d1bba40797fc gas/testsuite/gas/mips/sync.d +ffcef95bbefaf3a59e62285fe39bda76 gas/testsuite/gas/mips/sync.s +b4313e24f964607fe9300e864defaddc gas/testsuite/gas/mips/tls-ill.l +18b2a1f39231651953b79b9d00a78cc7 gas/testsuite/gas/mips/tls-ill.s +9f54485c542c260c134cd55e3eaaa225 gas/testsuite/gas/mips/tls-o32.d +63d081834c2f6458bb42a7cba5d64585 gas/testsuite/gas/mips/tls-o32.s +b4b76f2a25aa887e2f997e5494bdc4ee gas/testsuite/gas/mips/tmips16-e.d +716d43b55d294bf024b0ff1ec6280187 gas/testsuite/gas/mips/tmips16-f.d +a0de20c8d7285243fe357bed568d89cb gas/testsuite/gas/mips/tmipsel16-e.d +0afcc057897c5e8af6d8a1e7bea9785b gas/testsuite/gas/mips/tmipsel16-f.d +c6faf677ae575fdd8391967f98b55d74 gas/testsuite/gas/mips/trap20.d +f7d1e998d2057f17dfa22040879794f5 gas/testsuite/gas/mips/trap20.s +cab593c0de28116e5e1f095538ad94d2 gas/testsuite/gas/mips/trunc.d +6206de0006f0d3b3552c2c4de6d4d40c gas/testsuite/gas/mips/trunc.s +2f5b7d1678cf1b6e1165a4b867e8dff9 gas/testsuite/gas/mips/uld.d +4dfc3d5c85518711401b4a15122c6cea gas/testsuite/gas/mips/uld.s +9ce58dbafe045ce8413548e10bdb9463 gas/testsuite/gas/mips/uld2-eb.d +99e062d0d9c5f975f916ea3b3a0661fc gas/testsuite/gas/mips/uld2-el.d +e28802806bd5ef68b52dd91e1920e9cd gas/testsuite/gas/mips/uld2.s +42668d2b953e17216dad9ff5b51a11b8 gas/testsuite/gas/mips/ulh-pic.s +c35b62f79f0859a346aa71ff356d81f1 gas/testsuite/gas/mips/ulh-svr4pic.d +71ad3063c1e7c793ed4ab3721bb8c010 gas/testsuite/gas/mips/ulh-xgot.d +6b4a6661af69823228f094c7320aaaad gas/testsuite/gas/mips/ulh.d +d4c1e8e91b66176d0dd73baa903929d9 gas/testsuite/gas/mips/ulh.s +09b2c179d09dcf2b7efe3a1bc1242d55 gas/testsuite/gas/mips/ulh2-eb.d +96c237c1e09d8b1c26630c300f5544ae gas/testsuite/gas/mips/ulh2-el.d +1a9824601df339b12b2b6b333d9736e5 gas/testsuite/gas/mips/ulh2.s +421b8bf53bb68929c956dd5dd46b1e87 gas/testsuite/gas/mips/ulw.d +ed019962f9d9264d80ac0a3ec29faaf3 gas/testsuite/gas/mips/ulw.s +114a410a05c97c0c8fe619c65636c92e gas/testsuite/gas/mips/ulw2-eb-ilocks.d +6ad67afaca99229225f074045961238d gas/testsuite/gas/mips/ulw2-eb.d +4c5dc6056ad1d321bc9c6e61e0e4a37f gas/testsuite/gas/mips/ulw2-el-ilocks.d +f7ea6b4feb2825b1d09522cb95ff16c9 gas/testsuite/gas/mips/ulw2-el.d +912b64752da5c9169377e7a2cb776ab1 gas/testsuite/gas/mips/ulw2.s +b199151899739fe3da4095dd802a0ace gas/testsuite/gas/mips/usd.d +c4f723634a0f69013515468922c55a04 gas/testsuite/gas/mips/usd.s +fe1d1ac2ee009fc930cc33e7fffe4bc4 gas/testsuite/gas/mips/ush.d +fa20601e0c404bd38a90edf5f43077bb gas/testsuite/gas/mips/ush.s +4e63b49d94ab23228fcb90c6349e8f39 gas/testsuite/gas/mips/usw.d +59b429c3b2d1ea0daf2377204cbdfdca gas/testsuite/gas/mips/usw.s +3edd410a5aa5b9f5d758b1adc1f49fb9 gas/testsuite/gas/mips/vr4111.d +30e841daffadd416efdc8d69e610f1c0 gas/testsuite/gas/mips/vr4111.s +630a9c9515c3337805d3eeb106ffc5a2 gas/testsuite/gas/mips/vr4120-2.d +5cb0c12ce626a0552294c07722d422ea gas/testsuite/gas/mips/vr4120-2.s +839e011f47b7731b49c02091ac9af98c gas/testsuite/gas/mips/vr4120.d +1e3c30fb569bbfc45123d1bd5e8fad0a gas/testsuite/gas/mips/vr4120.s +0ad5fb6419e64d84ea516918fa2dadb9 gas/testsuite/gas/mips/vr4130.d +2891c907beff2e31797795d557c22731 gas/testsuite/gas/mips/vr4130.s +ee28818ae758acdf2c080395529c25aa gas/testsuite/gas/mips/vr5400.d +786e24034bb7f726b0b9a2c655602ee4 gas/testsuite/gas/mips/vr5400.s +609370d69163331ef4f43a6c87fd4dcb gas/testsuite/gas/mips/vr5500.d +288a96b264d206269b98bac834ca2eac gas/testsuite/gas/mips/vr5500.s +bd571532865b58cabf0532fd93b135d8 gas/testsuite/gas/mips/vxworks1-el.d +7214aef9a23acc2ebca1e68761edc8e5 gas/testsuite/gas/mips/vxworks1-xgot-el.d +3e2660b36dd36e1e9b6f89dc54f33109 gas/testsuite/gas/mips/vxworks1-xgot.d +49d8ecc14ff63470df46a1a1a006e6a8 gas/testsuite/gas/mips/vxworks1.d +c967b7a1e8670a369febcfcd753e2278 gas/testsuite/gas/mips/vxworks1.s +6e9fe7b2712a73f0a416254ee174cb9e gas/testsuite/gas/mips/xlr-ext.d +1aa62a7471838fa8aa62563674ec1e31 gas/testsuite/gas/mips/xlr-ext.s +128cd247dc9b5fc1e4095be0175c68b3 gas/testsuite/gas/mmix/1cjmp1b-n.d +74c43d2897673eba56f848f3c9e582e9 gas/testsuite/gas/mmix/1cjmp1b-r.d +82a7b6f8756a9c25cf63220f51d50894 gas/testsuite/gas/mmix/1cjmp1b.d +89f0c4732be8764cdb492101c5e133fb gas/testsuite/gas/mmix/1cjmp1b.l +881ba3c8d1533c13a83890a3cf4e81ac gas/testsuite/gas/mmix/1cjmp1b.s +0c469f8d44281c440d85bce259e57c30 gas/testsuite/gas/mmix/1cjmp1brn.d +2f9164da7cf8c6ebdfd5bcdc577e240d gas/testsuite/gas/mmix/1hjmp1b.d +66b71f9ca4e8ab891eceb33d8b70edea gas/testsuite/gas/mmix/1hjmp1b.l +1fdbcd1b5b2d1e8ac693bc3930a280ef gas/testsuite/gas/mmix/1hjmp1b.s +31f69a67b9b7e148d0d728174b9bafad gas/testsuite/gas/mmix/align-1.d +539e37c235abebf695117c2a7aac792b gas/testsuite/gas/mmix/align-1.s +3d4c45f5bc305c6a14f64435f7a9ae85 gas/testsuite/gas/mmix/basep-1.d +9ff16f3fd803fbd6de4ec3c4fc1b91d5 gas/testsuite/gas/mmix/basep-1.s +fd1e7e6eee81c3d8c509281af313b55e gas/testsuite/gas/mmix/basep-10.d +1ba8130d377a89330e9a2961035698d3 gas/testsuite/gas/mmix/basep-10.s +7f349e2b425f77806eae81d24f051542 gas/testsuite/gas/mmix/basep-11.d +9df5d5188edfe9b7ecdc684ffb4bbcc9 gas/testsuite/gas/mmix/basep-11.s +c2b0896cf0de5c5865b3117e6e9a04ee gas/testsuite/gas/mmix/basep-1b.d +afc588fb075a882468e4c3298fa3d1e8 gas/testsuite/gas/mmix/basep-2.d +41ee35510d8e57395b691de4dc61af2c gas/testsuite/gas/mmix/basep-2.s +df421621dc5559b5e55c1a0648273539 gas/testsuite/gas/mmix/basep-2b.d +7157178c9b964e7bef9ba57fa4bb5ea0 gas/testsuite/gas/mmix/basep-3.d +574cafac4ef562c1d5504795856b02c8 gas/testsuite/gas/mmix/basep-3.s +2347f514fe5c947dbe8baa6623bb02fd gas/testsuite/gas/mmix/basep-3b.d +287b843c8f84ddac104ebad25e7f7b1a gas/testsuite/gas/mmix/basep-4.d +7796faaec560c84b3ef2e985ff22da9a gas/testsuite/gas/mmix/basep-5.d +fa2a52315eac56422ec4731ba486a318 gas/testsuite/gas/mmix/basep-6.d +f2ed48da2536f27d417ee6dd44afe132 gas/testsuite/gas/mmix/basep-7.d +f928a5ad8bf3feaf6e0012a112d43fb9 gas/testsuite/gas/mmix/basep-8.d +05d195120b5515ee53b3684af0886c8f gas/testsuite/gas/mmix/basep-8.s +a868944a5fb6ba375aeb1ff7a162ada8 gas/testsuite/gas/mmix/basep-9.d +a6c575e157fa1cc3b59fe0673bfdb774 gas/testsuite/gas/mmix/basep-9.s +b2ccf513d3e172062ef36001bd19004b gas/testsuite/gas/mmix/bspec-1.d +3b3451908e6ec6497534ad8235de53ed gas/testsuite/gas/mmix/bspec-1.s +16f4ef3b0b253022999a04e9fe6cf611 gas/testsuite/gas/mmix/bspec-2.d +f179d58461561c9d5fe4a315ba7279be gas/testsuite/gas/mmix/bspec-2.s +9f493737447c1fe99300fe898e942dac gas/testsuite/gas/mmix/builtin1.d +686fcfd029e0d7ae40eb9d1ebd2a555f gas/testsuite/gas/mmix/builtin1.s +6c65a8e088aecf2bb80cb6ace221eb80 gas/testsuite/gas/mmix/builtin2.d +783e769408bbf34e0bf246ba16be1a10 gas/testsuite/gas/mmix/builtin3.d +9c4981a2ff3306cbfd4a6350a0e2f201 gas/testsuite/gas/mmix/byte-1.d +213a0515cb4eabca23e4b8085a9a1541 gas/testsuite/gas/mmix/byte-1.s +02b986dd3dfa5073b6bbbaee237d17a0 gas/testsuite/gas/mmix/bz-c.d +19eb7e29b6312fb84cd4b8369206e437 gas/testsuite/gas/mmix/bz-c.s +5895af0967fa9047e444e0e99736f87d gas/testsuite/gas/mmix/comment-1.d +2b581d9ded37c949d0f9cd141cedde94 gas/testsuite/gas/mmix/comment-1.s +4dadef05d27959743a4924d0f7f7924d gas/testsuite/gas/mmix/comment-2.d +d9246d1719c9b5d96f744ae8a5d335a0 gas/testsuite/gas/mmix/comment-2.s +62ee5afe80f72260d3faadfd4639d5ff gas/testsuite/gas/mmix/comment-3.d +74e34ff3097862ae06dbfd8c742ef966 gas/testsuite/gas/mmix/comment-3.s +e44938b0115eb4a01f1c6045416ff2a8 gas/testsuite/gas/mmix/cons-1.d +0f36dac5b63ac65c4efae27fefd1a5b0 gas/testsuite/gas/mmix/cons-1.s +68dc1c1251793e1f023eacb74d2d1aab gas/testsuite/gas/mmix/cons-2.d +818d889dd03c1058405e86e7843d6a6c gas/testsuite/gas/mmix/cons-2.s +ae68ba46ad3fd3d3b84e2caebb37e266 gas/testsuite/gas/mmix/err-bpo1.s +1275b4e1c37d61021d17ce82415846ba gas/testsuite/gas/mmix/err-bpo2.s +5a8e1cadcb9e90eed7439e0a216627e2 gas/testsuite/gas/mmix/err-bpo3.s +74b2268a44f4615c6644eeefe45fb86b gas/testsuite/gas/mmix/err-bpo4.s +8283e195bad143522dc6644924732ee1 gas/testsuite/gas/mmix/err-bpo5.s +8fa6fbacee3649b1add139c544bed44d gas/testsuite/gas/mmix/err-bpo6.s +6316596656e1df8f51a8e6bdbcfeb5be gas/testsuite/gas/mmix/err-bspec-1.s +662ecee5325d52a264c4bb079d0a5fb4 gas/testsuite/gas/mmix/err-bspec-2.s +fda06bc9042df00a4a79d696fc4f7c16 gas/testsuite/gas/mmix/err-bspec-3.s +a651af237184e7463946f57a60d6be60 gas/testsuite/gas/mmix/err-bspec-4.s +adc04c51cb3a3f504e288ee68f7debc7 gas/testsuite/gas/mmix/err-bspec-5.s +b2f1d968f9de4a9e15a68e57335a2c24 gas/testsuite/gas/mmix/err-builtin.s +f3cda197e002842b0c3ce05aa49d7fca gas/testsuite/gas/mmix/err-byte1.s +8539931858377bd48fe6cf3c2ca912d8 gas/testsuite/gas/mmix/err-byte2.s +9d5e96de1ac7e0aaae3a4efdf6d78679 gas/testsuite/gas/mmix/err-case.s +59c8d12a69e35db0f258ad6bc61b0f1f gas/testsuite/gas/mmix/err-fb-1.s +ac70409b365e20a8d76cd491151b1910 gas/testsuite/gas/mmix/err-greg1.s +ba8862575d249330cf0798f6a1b4d001 gas/testsuite/gas/mmix/err-insn.s +7a3d8d8405a5b30c635a3b477d625cb4 gas/testsuite/gas/mmix/err-is-1.s +fdac5781e3da1a1ae49cac9fc82a9c5e gas/testsuite/gas/mmix/err-loc-1.s +c8d723f14ad9f6d4aa2a5e17d597a0bc gas/testsuite/gas/mmix/err-loc-10.s +549875cfbefa9e91ace5418b8c2e4685 gas/testsuite/gas/mmix/err-loc-2.s +fae8e890f6ec60834383086e4512c99d gas/testsuite/gas/mmix/err-loc-3.s +e485810c615531746f6ed3e9bc68fbc7 gas/testsuite/gas/mmix/err-loc-4.s +f0aebec806255dc6887a2874de66292b gas/testsuite/gas/mmix/err-loc-5.s +08b3644351e747e28015f9d078b3bbc2 gas/testsuite/gas/mmix/err-loc-6.s +e66b98b1e174189295e48a180225ccaf gas/testsuite/gas/mmix/err-loc-7.s +fc1de659115cb734fbff9eab020ec4ae gas/testsuite/gas/mmix/err-loc-8.s +7f7691babb2bd47ef0a700eb700e51d5 gas/testsuite/gas/mmix/err-loc-9.s +b148a5329404e262c827ea25df4a6152 gas/testsuite/gas/mmix/err-local1.s +2f3e9b4550f4465d96e5483ae03be2e7 gas/testsuite/gas/mmix/err-local2.s +4f1054a028c3a46a2d585d9e412ab7df gas/testsuite/gas/mmix/err-ser-1.s +0f418d2c4355113cc9dcd588493ef24f gas/testsuite/gas/mmix/err-set.s +8d1de4b18d36ebaffcc7ea7d6333b891 gas/testsuite/gas/mmix/err-swym1.s +b107b4f8542a6d9d1c062c1c6421dc18 gas/testsuite/gas/mmix/expr-1.d +ac2ab6118a2572de016beab5067f2b5a gas/testsuite/gas/mmix/expr-1.s +7698e6b9d14deb45266bb0ea05239c05 gas/testsuite/gas/mmix/fb-1.d +bb7f46033941ffb2e1cc3877a0da5320 gas/testsuite/gas/mmix/fb-1.s +1069e96f41887e614d981c612f1c7b7a gas/testsuite/gas/mmix/fb-2.d +4af0f1f0e1f787f3398b118b30868b8f gas/testsuite/gas/mmix/fb-2.s +3be4957a0437d6bce8245a8ab812aa37 gas/testsuite/gas/mmix/get-op-r.d +e38f71e500ffcaf19723536468a223d6 gas/testsuite/gas/mmix/get-op.d +b45d4ccee0f87bfba2e0f97d93789362 gas/testsuite/gas/mmix/get-op.l +11e3fca7cf0cb9cbdc42277fc2eee4e6 gas/testsuite/gas/mmix/get-op.s +0f58bfd23d1021aec899fc7d1ba314be gas/testsuite/gas/mmix/geta-c.d +6c55f79cc4e6ac3df0fbb2ce3b207431 gas/testsuite/gas/mmix/geta-c.s +25e0b5f18f5465d009fec57744a869a4 gas/testsuite/gas/mmix/geta-op-r.d +2fe216ed1abb558c66d43e1c16437aa5 gas/testsuite/gas/mmix/geta-op.d +b657bbecda4773680389a4c4bd9b6902 gas/testsuite/gas/mmix/geta-op.l +7c7f7a7f7171c12c7210fa2b8e80ccc5 gas/testsuite/gas/mmix/geta-op.s +4221d993bd9f8353c290f497b488d372 gas/testsuite/gas/mmix/geta-opn.d +0014085389ed74190a50d06229cac927 gas/testsuite/gas/mmix/geta-oprn.d +1873fa761a9a364894a226fa79b74cdd gas/testsuite/gas/mmix/greg1.d +4dcdef09957ba93c577caa743a2c96ed gas/testsuite/gas/mmix/greg1.s +b59a6a7c02ac8c7c5efca4c3e68af2ec gas/testsuite/gas/mmix/greg1a.d +1873fa761a9a364894a226fa79b74cdd gas/testsuite/gas/mmix/greg2.d +650cd7ff2e361240741dad80b02caa44 gas/testsuite/gas/mmix/greg2.s +13ba3aa7e3a9b720e3144e0e31688403 gas/testsuite/gas/mmix/greg2a.d +66863b0cc43aaa3cdd1e0a7a4f5d7ebf gas/testsuite/gas/mmix/greg3.d +fbccd7f708d3c8019c9ea83addc1fe52 gas/testsuite/gas/mmix/greg3.s +dcc3a1a5751220ab763ffa79d41d6e6f gas/testsuite/gas/mmix/greg4.d +cb7cc10a15aa6c6e59f1363ed8d9c289 gas/testsuite/gas/mmix/greg4.s +f17175fc300e10669f8fe527ae44dfc0 gas/testsuite/gas/mmix/greg5.d +c916fda34b8833bb842b3632f4f7f7d1 gas/testsuite/gas/mmix/greg5.s +bf0ab68484f4dd0159b9a0d4c08d818f gas/testsuite/gas/mmix/greg6.d +5225ff7b64ac1f436e34063b599fc14b gas/testsuite/gas/mmix/greg6.s +2e13249dba8af8235b9098457a446bba gas/testsuite/gas/mmix/greg7.d +942dd6a809b486ff9d5fe222a392e858 gas/testsuite/gas/mmix/greg7.s +45a8a180a1168cddd351fc14c1ae938e gas/testsuite/gas/mmix/greg8.d +4c2bdf546eec695fc77da75ea4ee00eb gas/testsuite/gas/mmix/greg8.s +10157ad0e4001dd9fa08a15848ab3b75 gas/testsuite/gas/mmix/greg9.d +9a7a1d211583d6a01c010c74d7d6bc56 gas/testsuite/gas/mmix/greg9.s +f75e30a43a1cf086fcb98936ddc8448d gas/testsuite/gas/mmix/hex-r.d +8c4fbc467f6b4539cd2cb9be8da3c582 gas/testsuite/gas/mmix/hex.d +cd4e8dca887b719af2fb05753a02cc10 gas/testsuite/gas/mmix/hex.l +18f0bccec0ea1ebbc96c0cc73f0b0d54 gas/testsuite/gas/mmix/hex.s +ffef9d561521432621d7d3755077ddb1 gas/testsuite/gas/mmix/hex2.d +5abe2a4e4b7f785802c6c1b4d23c5206 gas/testsuite/gas/mmix/hex2.s +c06a1dff5b48b8064fd1bd062449e9ed gas/testsuite/gas/mmix/is-1.d +e4e256dd068fdf987f8acbdb99aa434f gas/testsuite/gas/mmix/is-1.s +98bbfda658e53f01fcb8ce24f14a4b72 gas/testsuite/gas/mmix/jmp-op-n.d +0cad9077ab17ccf0569686e9df692e06 gas/testsuite/gas/mmix/jmp-op-r.d +2ebb9cde592cebd83ee28e5f0f67fa1a gas/testsuite/gas/mmix/jmp-op.d +b393cff736e29e563b062f5ea5685b21 gas/testsuite/gas/mmix/jmp-op.l +46c5951d3b2fc15eedc95ef05851280c gas/testsuite/gas/mmix/jmp-op.s +3259465258c4c0be7a905496dacf85bd gas/testsuite/gas/mmix/jmp-oprn.d +8896b95a48e891268d9ec6f5c2c6db2b gas/testsuite/gas/mmix/jump-c.d +a9884fc1a72db8aa308ec235f4e563bf gas/testsuite/gas/mmix/jump-c.s +bdf70a3557efcad03bd8cee4f05d0ef3 gas/testsuite/gas/mmix/list-in-n.d +329782e004db82b64e4c10c64d7eb1c7 gas/testsuite/gas/mmix/list-in-r.d +5e22741d4a07ac3c73798b525fa107dc gas/testsuite/gas/mmix/list-in-rn.d +2fe1ce272754ce0e6570de1acea60dda gas/testsuite/gas/mmix/list-insns.d +0c73a39e078a7740205f49c6c1d35d1e gas/testsuite/gas/mmix/list-insns.l +b9ffc6c91ccb57078a96ba9d4ca6ccb9 gas/testsuite/gas/mmix/list-insns.s +336901c2592954e7b98195b2b0dc0af6 gas/testsuite/gas/mmix/list-pseudoints.l +d3f1df27ab65809fcf90d66c9e1dca47 gas/testsuite/gas/mmix/list-pseudoints.s +d3ba5e5a432a80e318dbbf7c1ffcaeba gas/testsuite/gas/mmix/list-textfirst +ea622b544f91c9cac4f4c0eccb074384 gas/testsuite/gas/mmix/list-textfirst.l +cbb1d5ec86a35f9c9fb9a65cb509bbfb gas/testsuite/gas/mmix/list-textfirst.s +f3b3bc86c4b76d8c3bbee0ee678139eb gas/testsuite/gas/mmix/loc-1.d +63f7de75c9a5e51ff9ab0ad7fdb0b9f4 gas/testsuite/gas/mmix/loc-1.s +1add4b42756c41e8fba548ab513e2dd5 gas/testsuite/gas/mmix/loc-2.d +df7a8704912ff84da190cf6c74cde8bf gas/testsuite/gas/mmix/loc-2.s +337d5e73fc389f901c875ba1578f1961 gas/testsuite/gas/mmix/loc-3.d +46d704c994c961cdf0e42ed4d102473f gas/testsuite/gas/mmix/loc-3.s +611bac92266b0f73088d10ad61ce5993 gas/testsuite/gas/mmix/loc-4.d +c0be6d63230ab4cc233cb7639712a703 gas/testsuite/gas/mmix/loc-4.s +a7a91321cf3a4b8030fada3cb782c89f gas/testsuite/gas/mmix/loc-5.d +a40ae1e12f135a531776202e96ca056c gas/testsuite/gas/mmix/loc-5.s +b0c0526e93df70f14736854c7a164206 gas/testsuite/gas/mmix/loc-6.d +a012f6a9d738c51806bc9069c6ecc233 gas/testsuite/gas/mmix/loc-6.s +ea0084c7135c97a97a7817cb2c434b00 gas/testsuite/gas/mmix/loc-7.d +502e95ffb524e5c5d3a16b6fbf217eec gas/testsuite/gas/mmix/loc-7.s +6231c6e8b6d3ef4a6f029e4d901bb605 gas/testsuite/gas/mmix/local-1.d +34c218e4cb651e644775be70e617677a gas/testsuite/gas/mmix/local-1.s +213cb0057034d949a2fce44fcb4fc6f5 gas/testsuite/gas/mmix/locall1.d +06034183f0a150f972e5ae0729f907ed gas/testsuite/gas/mmix/locall1.s +ed4a9ed51e658c2c1d27a461a043501e gas/testsuite/gas/mmix/mmix-err.exp +b62d9cfb0d03ebcb0ff4649069792a81 gas/testsuite/gas/mmix/mmix-list.exp +e3f4cb38a6356be19d3d6e53eac7959a gas/testsuite/gas/mmix/mmix.exp +441c50bf582f978db4380515d9918898 gas/testsuite/gas/mmix/odd-1.d +2f7a35c2988104cc8ffc49e6b00f82a1 gas/testsuite/gas/mmix/odd-1.s +bc215b49fb312e4642d2aeaa0ba2a87f gas/testsuite/gas/mmix/op-0-1.d +241721593347f7d44d9dad3757aa4208 gas/testsuite/gas/mmix/op-0-1.s +962835a331b121a3b659bf2c199119e4 gas/testsuite/gas/mmix/op-0-1s.d +d80eac57925f764b03531287d930d748 gas/testsuite/gas/mmix/op-0-2.d +8974b44d390a07de5f2f06f48073d69f gas/testsuite/gas/mmix/pop-op-r.d +62ab5bcab4914622624e9df6a32563d9 gas/testsuite/gas/mmix/pop-op.d +5a01a6f993695b312673cef6eff040f5 gas/testsuite/gas/mmix/pop-op.l +5bed8bb92bcee70e3b7048f34f88abb8 gas/testsuite/gas/mmix/pop-op.s +820396b2a50c73167dca87af0bd9bc42 gas/testsuite/gas/mmix/prefix1.d +0e79466a08de17dab3a0e33a92e3fd71 gas/testsuite/gas/mmix/prefix1.s +fdbf170ea94d3f39f6e336345f309992 gas/testsuite/gas/mmix/prefix2.d +15ab43fbfcc930a1b55ddf5ef7479cbe gas/testsuite/gas/mmix/prefix2.s +2d8032487109e24b8140e4bef8d022a1 gas/testsuite/gas/mmix/prefix3.d +8d09c63b0c427cdcd918872021f32ac5 gas/testsuite/gas/mmix/prefix3.s +7a1f96374983984f58d50db393350e25 gas/testsuite/gas/mmix/pseudo-1.d +79522ead0cb1ef910b010d2a11f5aa50 gas/testsuite/gas/mmix/pseudo-1.s +dc644b1202b89dde4c55ad43b6918a08 gas/testsuite/gas/mmix/pushgo-op-r.d +bd8593ef76058b289d20304526f35630 gas/testsuite/gas/mmix/pushgo-op.d +69440a759f9bf3db92cef5d2b24cee49 gas/testsuite/gas/mmix/pushgo-op.l +131b9ee7dd3d141c6952e6ac02988e1b gas/testsuite/gas/mmix/pushgo-op.s +e61f87906afcf2c1ebd413ded69362d3 gas/testsuite/gas/mmix/pushj-c.d +2d9d62c614612030d82a5c36d3fb377d gas/testsuite/gas/mmix/pushj-c.s +a0c20764ef7e0b1ceb5b94bfe1bbceea gas/testsuite/gas/mmix/pushj-cs.d +fb4aae82df74f1b81679cb764bb2e597 gas/testsuite/gas/mmix/put-op-r.d +a775433aabbc28f4de55ff967b901687 gas/testsuite/gas/mmix/put-op.d +f92f56bf4cc05890b07040f5cfe025f2 gas/testsuite/gas/mmix/put-op.l +018bb9b0e95057b4decb22f5c9feacf1 gas/testsuite/gas/mmix/put-op.s +8f1f6562a9da6870378512529f91f48e gas/testsuite/gas/mmix/reg-op-r.d +f89d0ea15d7a2d1eab2840c7a9d49eaf gas/testsuite/gas/mmix/reg-op.d +582d2a7b84f54c5d54653cfbf1c0d3d1 gas/testsuite/gas/mmix/reg-op.l +745990eee9776b12c4a897d6bc3c6d6e gas/testsuite/gas/mmix/reg-op.s +c8f2963976ac4f7ce95a3495cbe28015 gas/testsuite/gas/mmix/reg3-op-r.d +e28cd26f439118017f4693c5c41863b1 gas/testsuite/gas/mmix/reg3-op.d +cbfaf1d2c8ba3064c58bbf7574f04fa6 gas/testsuite/gas/mmix/reg3-op.l +172f1341911863bdff4d2a6a239801a1 gas/testsuite/gas/mmix/reg3-op.s +5b4ce8d1dd2320e060206a1a1ee3f852 gas/testsuite/gas/mmix/regt-op-r.d +1acef71c452293140a6d5f7e97a87706 gas/testsuite/gas/mmix/regt-op.d +0850ed03f3ffa8434f98d0d681229d11 gas/testsuite/gas/mmix/regt-op.l +e302ca8bef6a6b0acf0334aaf0faf9ec gas/testsuite/gas/mmix/regt-op.s +e868589e4d591b2e298076f91c052340 gas/testsuite/gas/mmix/regx-op-r.d +c977b2c8ccbac2c67faf49d13b23b655 gas/testsuite/gas/mmix/regx-op.d +980378185cf82f1e38a36e783428455a gas/testsuite/gas/mmix/regx-op.l +90c16cb8a8af0c6a70adb99659f96766 gas/testsuite/gas/mmix/regx-op.s +69a6e5487f3416bf43b2aa2278977e72 gas/testsuite/gas/mmix/regy-op-r.d +8a395f5e533d5b4230a5144a41df4194 gas/testsuite/gas/mmix/regy-op.d +0272aed229ff57d24aa8a7c0b3469543 gas/testsuite/gas/mmix/regy-op.l +2507661cd901f97d1609ff4d932eb789 gas/testsuite/gas/mmix/regy-op.s +5a29d8701884532f845385ba34eab024 gas/testsuite/gas/mmix/relax1-n.d +d1c04da647167a2cfc16623ad19e9ddc gas/testsuite/gas/mmix/relax1-r.d +57169c96a3bee990d8e03003644ac129 gas/testsuite/gas/mmix/relax1-rn.d +d29b5176b1a13ddd482cc59101e9e9c3 gas/testsuite/gas/mmix/relax1.d +38ac570097c9cdda8d8eecaf04092601 gas/testsuite/gas/mmix/relax1.l +587232b031ce2501a918dc361c8406e1 gas/testsuite/gas/mmix/relax1.s +448d4c29937e946865b434f0f5efd21d gas/testsuite/gas/mmix/relax2.d +417ae7c1e0d143bfd2163eb33f2e5d0e gas/testsuite/gas/mmix/relax2.s +d65f74eb228073ca8269c2ae8efc41b4 gas/testsuite/gas/mmix/reloc16-n.d +0e68f5aeb91077a2ef1f0a5482675db6 gas/testsuite/gas/mmix/reloc16-r.d +863f07fe1c4e926ae8bd783966f4311b gas/testsuite/gas/mmix/reloc16.d +75561a53cf10f62341b7ca23fba9a7cc gas/testsuite/gas/mmix/reloc16.l +51355d73d525e07d1956c845b71481c9 gas/testsuite/gas/mmix/reloc16.s +b436025a6918a74cf9ca753e04ad72ca gas/testsuite/gas/mmix/reloc8-r.d +88ab983d053a9aff9ec04afa37b23c05 gas/testsuite/gas/mmix/reloc8.d +989a380fe8b838e5c80a53908e40971d gas/testsuite/gas/mmix/reloc8.l +b74d47dfcb362faa2f510011378cca7c gas/testsuite/gas/mmix/reloc8.s +4884296463db88343efd6f8a54838429 gas/testsuite/gas/mmix/relocl-n.d +a876c35b97351eb3d69074dde61e08b5 gas/testsuite/gas/mmix/reloclab-r.d +83e613f897714a4c8531742f7e350d87 gas/testsuite/gas/mmix/reloclab-rs.d +088218002fb1ecb82172820dd678e1af gas/testsuite/gas/mmix/reloclab-s.d +d5539f113c067f66a439de11e059f532 gas/testsuite/gas/mmix/reloclab.d +966ca1ba7f8f17bee81c63682a596aa5 gas/testsuite/gas/mmix/reloclab.l +f4c3a919a430c75cb8be68f5cd7c3fc3 gas/testsuite/gas/mmix/reloclab.s +173d401cb28062237e5b1560e4600f02 gas/testsuite/gas/mmix/reloclrn.d +1d9a899c4d72757bf6b0b9b6a71f1044 gas/testsuite/gas/mmix/relocxrn.d +10449c3a7fd6cc8d0594c9e6f8f5521a gas/testsuite/gas/mmix/resume-op-r.d +9a0517a889e73842824013ab2d618f69 gas/testsuite/gas/mmix/resume-op.d +c97820027f0575acea8ed1087337b7d8 gas/testsuite/gas/mmix/resume-op.l +cfcbf81639741ae8db615671a48cde7d gas/testsuite/gas/mmix/resume-op.s +56f09db3c3a16b368d12a64ed52f10d5 gas/testsuite/gas/mmix/round2-op-r.d +f44e6dfcdba0773b16440711f17ef80b gas/testsuite/gas/mmix/round2-op.d +1aef9aa7620ec2177d66895af5488615 gas/testsuite/gas/mmix/round2-op.l +30d227deb194d05c613d9f4b26a9a3f3 gas/testsuite/gas/mmix/round2-op.s +02af45b86e2f31a0b42e0a74bc9c8055 gas/testsuite/gas/mmix/roundi-op-r.d +85d7513fec13879d3cc3fa4c962c7fc3 gas/testsuite/gas/mmix/roundi-op.d +2badf0c4966760eb25394dc6c58357cc gas/testsuite/gas/mmix/roundi-op.l +161db8f66e10dc2b57c677be95904a77 gas/testsuite/gas/mmix/roundi-op.s +002d7c47d1e264de3378e4b672234fc1 gas/testsuite/gas/mmix/roundr-op-r.d +674ded804328a5865b1a8dcea25b4dc7 gas/testsuite/gas/mmix/roundr-op.d +04d09bbbab585fdb54c69b919576bde4 gas/testsuite/gas/mmix/roundr-op.l +d166315a18bdcd867def21596f0e6bf2 gas/testsuite/gas/mmix/roundr-op.s +4bd440c1a61accbe310ffa5861d020d0 gas/testsuite/gas/mmix/save-op-r.d +9a299ee55c14d36ac1e13fd7e21b7b5b gas/testsuite/gas/mmix/save-op.d +78c603b16a7e5be2c1ebdbccc0d9a1fb gas/testsuite/gas/mmix/save-op.l +999db326e26e668c1ba94d31d55ccee4 gas/testsuite/gas/mmix/save-op.s +0fdb19b2dc462b298af175eb285d2898 gas/testsuite/gas/mmix/set-r.d +7c171ada0e52fa57483a77bdcbfd1125 gas/testsuite/gas/mmix/set.d +8dff7be7e45d5eb791c4b5e27264cd34 gas/testsuite/gas/mmix/set.l +11f3a945d2d4e214bf4888fdd5c6b56b gas/testsuite/gas/mmix/set.s +a8c21be21f3bced6a45be5d01a88f780 gas/testsuite/gas/mmix/swym-op-r.d +bc60c7fcffe92acf0775a1f4304bee64 gas/testsuite/gas/mmix/swym-op.d +7612ba4cbb41c0bb297608198b8475f6 gas/testsuite/gas/mmix/swym-op.l +c266e0350f0a98e0f59ddf449a51bb63 gas/testsuite/gas/mmix/swym-op.s +b99245530dc2e11af83c3aad154c3ead gas/testsuite/gas/mmix/swym-opreg1.d +84a56d4349b75f1311b85c3a6974d28c gas/testsuite/gas/mmix/swym-opreg1.s +afb30c789d4c23ed647e32277051cac6 gas/testsuite/gas/mmix/swym-opreg2.d +98350e39352e863aa7c97decb3af66d9 gas/testsuite/gas/mmix/swym-opreg2.s +69082e0d2ad1c1f54cb86d6892cb63d6 gas/testsuite/gas/mmix/sym-1.d +0ffe574581a6090acc3369be14ded4d4 gas/testsuite/gas/mmix/sym-1.s +098846e2a99f9013d95ef10e6ec50839 gas/testsuite/gas/mmix/sync-op-r.d +040bd52ba089ab30f6291e9d3c4e278d gas/testsuite/gas/mmix/sync-op.d +e93db32d7d2c78650597fd5ed2ad7b6d gas/testsuite/gas/mmix/sync-op.l +c79a98acc47d182f9630727f61ca34f3 gas/testsuite/gas/mmix/sync-op.s +0ed09fdc04112dbc6311ad68a08c0c5f gas/testsuite/gas/mmix/two-op-r.d +406103963689254a6b360a5f1a449d6e gas/testsuite/gas/mmix/two-op.d +ca6a23d92e67c5494c7b63f332b05226 gas/testsuite/gas/mmix/two-op.l +434868110d14ace5244b3ae9dfc75a5d gas/testsuite/gas/mmix/two-op.s +5e004b78b5149d38f3c432b9ae264238 gas/testsuite/gas/mmix/unsave-op-r.d +91dbac2579bdc75ab5d604fa49c278f0 gas/testsuite/gas/mmix/unsave-op.d +5b91809e619a66d9cee34dd2280bfaee gas/testsuite/gas/mmix/unsave-op.l +f5d6823ab550c4ea97a04f14883a0c0d gas/testsuite/gas/mmix/unsave-op.s +7030c201bb92111a1da35bc8b48c84d1 gas/testsuite/gas/mmix/weak1-s.d +7124dcb9a6f4203ee9433df1cccbc17e gas/testsuite/gas/mmix/weak1.d +64ee02ee7066364e0eadac9c2c9508d6 gas/testsuite/gas/mmix/weak1.s +126c93f26971e35435da3ff524100936 gas/testsuite/gas/mmix/zerop-1.d +f2a213b73ea27ef622ba39f9ec2987ec gas/testsuite/gas/mmix/zerop-1.s +c58581edb3ac95b306f040bbc2c16678 gas/testsuite/gas/mn10200/add.s +5acee31afe42e7665198639d3ec8a999 gas/testsuite/gas/mn10200/basic.exp +9411b8190fac3aad748696ea30bba5b0 gas/testsuite/gas/mn10200/bcc.s +efa2232339233fab01e2fe7ca6c2f3cf gas/testsuite/gas/mn10200/bccx.s +aabf4d8010190b4ebadb4d4dce938282 gas/testsuite/gas/mn10200/bit.s +3f51363ea969316f726dc5529904888e gas/testsuite/gas/mn10200/cmp.s +874b6bc0f155eecbaffecb93a5642416 gas/testsuite/gas/mn10200/ext.s +b117e36f812c2eb416156d441f26185e gas/testsuite/gas/mn10200/logical.s +ea8599975d89b01f9aaba3b664947565 gas/testsuite/gas/mn10200/mov1.s +3386b14210f3cd873dde20c6166162c6 gas/testsuite/gas/mn10200/mov2.s +a0b70b1cc9ec5e2783428dcc483ee86d gas/testsuite/gas/mn10200/mov3.s +6e62837e492b9688e29de9625549b402 gas/testsuite/gas/mn10200/mov4.s +e37e1b13a06659d005a650675dcf3935 gas/testsuite/gas/mn10200/movb.s +f6ce44141165b449c3cb51ebe486e98e gas/testsuite/gas/mn10200/movbu.s +32dfde7ae5c5361c03c746481b7aee8d gas/testsuite/gas/mn10200/movx.s +1ff17a9ade34cc243a67f4e5afb1873e gas/testsuite/gas/mn10200/muldiv.s +723c642cba806a6ce6dda8c3881ef233 gas/testsuite/gas/mn10200/other.s +21b9f1644f5a62fdc603b218708648f3 gas/testsuite/gas/mn10200/shift.s +7ac2864fac53b6b778c4aba3efb1a2e1 gas/testsuite/gas/mn10200/sub.s +02ba050389aba06e510285db97af882b gas/testsuite/gas/mn10300/add.s +5eef807cd489dde2f30b1632fd6afbfe gas/testsuite/gas/mn10300/am33-2.c +07dafb504919d0d5fa6316d1dd0340b5 gas/testsuite/gas/mn10300/am33-2.d +57ded92cab96f53eab4d7545c5da40f4 gas/testsuite/gas/mn10300/am33-2.s +3bb44c38f4fbab75c570123d255c57f8 gas/testsuite/gas/mn10300/am33.s +3c5d635c4e529ba743b2062006ab8a00 gas/testsuite/gas/mn10300/am33_2.s +dfe221c89fe65738a2360f231c2b6794 gas/testsuite/gas/mn10300/am33_3.s +593bbef9992d2f23b91f4ea176b28957 gas/testsuite/gas/mn10300/am33_4.s +62ae8325beee2a8180a39e125355ba2b gas/testsuite/gas/mn10300/am33_5.s +90dcb58c5eb364963271d465adac73ef gas/testsuite/gas/mn10300/am33_6.s +ae77079066eabaa0cc3b0db53f95500b gas/testsuite/gas/mn10300/am33_7.s +631a649907d27d317cee70928c6c27fc gas/testsuite/gas/mn10300/am33_8.s +58a3b61a4e5b2332b7ccfc3345aeaca7 gas/testsuite/gas/mn10300/basic.exp +9411b8190fac3aad748696ea30bba5b0 gas/testsuite/gas/mn10300/bcc.s +b15e3790182c7ba25b21a4185f2a55e6 gas/testsuite/gas/mn10300/bit.s +647a9c89d56b470cb3fef7839a32834d gas/testsuite/gas/mn10300/cmp.s +3828018d3809076328223d9d3c1e48c5 gas/testsuite/gas/mn10300/ext.s +f6db4622ff4a88bc9ebf44aec56bc245 gas/testsuite/gas/mn10300/extend.s +f2b5260884e40bc35f8694403da505f8 gas/testsuite/gas/mn10300/logical.s +d3d15560536638ff0e38a1cd6bea678a gas/testsuite/gas/mn10300/loop.s +e554261a6559698fe2722b841dd1b5e3 gas/testsuite/gas/mn10300/mov1.s +1453d74ea0d60c24e054f9443aa26fe4 gas/testsuite/gas/mn10300/mov2.s +8d091f8bc50686881c4104f6dc9b6ab7 gas/testsuite/gas/mn10300/mov3.s +e5df57ebcca23c27b6c2399780e9a146 gas/testsuite/gas/mn10300/mov4.s +93c07b147a466794f87711cdcf29260b gas/testsuite/gas/mn10300/mov5.s +384122880cfa3e6fa4a8b08c350c62a8 gas/testsuite/gas/mn10300/movbu.s +075a3ba2756f3cf09ac1926492ccf614 gas/testsuite/gas/mn10300/movhu.s +155d5bd225998f0bf8a65d543230adc5 gas/testsuite/gas/mn10300/movm.s +c5809213cfc952d8ef5a1ba5dc19ac45 gas/testsuite/gas/mn10300/movpc.l +5ecbbe391a24afd44dd2bcb121f73a34 gas/testsuite/gas/mn10300/movpc.s +aa222b2f903cde208e2be8c3972e3c8a gas/testsuite/gas/mn10300/muldiv.s +9cbe29313848966be970cdecdc09e7b2 gas/testsuite/gas/mn10300/other.s +dfc3d45f9e6158dc60df0f11f0a5fcd8 gas/testsuite/gas/mn10300/pr11973.d +652b95875e861a99061ca410b572e2d4 gas/testsuite/gas/mn10300/pr11973.s +84f424dbb966962121e979865351bc32 gas/testsuite/gas/mn10300/pr997.l +6d91b72c1022fe9177282cbf4177a861 gas/testsuite/gas/mn10300/pr997.s +6fbf563cb5f0417f1854771c757bcc2d gas/testsuite/gas/mn10300/relax.d +db8f508c818806185ed645d0f3cc9b2d gas/testsuite/gas/mn10300/relax.s +293fa500fcb2e85940176a545801b046 gas/testsuite/gas/mn10300/shift.s +ed9edfd6a0eea176f6974376bd321b10 gas/testsuite/gas/mn10300/sub.s +961a51d51720b650cb383a6aa510d4d9 gas/testsuite/gas/mn10300/udf.s +5ffc5b9af8cd82e8ff721a39d583a9cb gas/testsuite/gas/mri/char.d +016f8a629209b7d7313c4a4e3c37c909 gas/testsuite/gas/mri/char.s +4b259d611c94c789b73572d5b0863a5b gas/testsuite/gas/mri/comment.d +84c565776c727a1f5986b5d8d39ba13e gas/testsuite/gas/mri/comment.s +aca62962ea755bbc1aaeb56b32c53974 gas/testsuite/gas/mri/common.d +7b6bfc157de809b518bb8820f293f78c gas/testsuite/gas/mri/common.s +c3db4a831aaf5f148abfde517fff14f2 gas/testsuite/gas/mri/constants.d +df9ad2212b59618793c7080d043c14e4 gas/testsuite/gas/mri/constants.s +2258c0445fb6b2005828c77b96c0520a gas/testsuite/gas/mri/empty.s +78ea402a49a07c1a325a03a28be37678 gas/testsuite/gas/mri/equ.d +83843a1d515852848a6fc1054a984792 gas/testsuite/gas/mri/equ.s +ceec8399c07b39bee0a4ea07eece6d2f gas/testsuite/gas/mri/expr.d +21255a47a57f7e00246072b10af9b641 gas/testsuite/gas/mri/expr.s +bc4dc43acfdddf49f994908c7e26abe6 gas/testsuite/gas/mri/float.d +4f7756364607bd924587f3689b8b16b7 gas/testsuite/gas/mri/float.s +913e1698712694951d89ee24192adc91 gas/testsuite/gas/mri/for.d +70d33f74b91d862f9f9b6c4dd173ce58 gas/testsuite/gas/mri/for.s +ca4307ea874afdb8a107b9d4c044ce26 gas/testsuite/gas/mri/if.d +ba2ce35b0663f91570cc0725695f2f0f gas/testsuite/gas/mri/if.s +4b03ed946465a72d469e2aeff2ddd6f5 gas/testsuite/gas/mri/immconst.d +f1f5c0c93c39409b9a82cf956d42e39e gas/testsuite/gas/mri/label.d +ed17ca77ec65b8492a436ad06a222487 gas/testsuite/gas/mri/label.s +0a83209c98b7595f7f0746456efa0243 gas/testsuite/gas/mri/moveml.d +4e57586c117d02856b0a1e2fe1e199cb gas/testsuite/gas/mri/moveml.s +18b692b0e34dbcf4e04942615cd0d9f0 gas/testsuite/gas/mri/mri.exp +8efb23fdda5c25b88340a543cfeac30f gas/testsuite/gas/mri/repeat.d +1684df3330c24639ae41d526858b2a80 gas/testsuite/gas/mri/repeat.s +67ebccbf76d5002534361af491abfddf gas/testsuite/gas/mri/semi.d +da1cdabe1af1adb9735d5d609dccca32 gas/testsuite/gas/mri/semi.s +f1f4f19cd59ca00cd8ba1bac7a168d5f gas/testsuite/gas/mri/while.d +cdd1ad74d4bb0147f32931b83c7383be gas/testsuite/gas/mri/while.s +3f1f7f6d07db2c788e7151606795585a gas/testsuite/gas/msp430/msp430.exp +9bf928c45624dccd08f6738ba89d135e gas/testsuite/gas/msp430/opcode.d +7aac268e1d72f0297f919284f1fb3502 gas/testsuite/gas/msp430/opcode.s +d7a16a3bc92230b4d592bbd4e87380c1 gas/testsuite/gas/mt/allinsn.d +7a4c57d16a6d86c35116aed72b075942 gas/testsuite/gas/mt/allinsn.s +3d9e0c76ac292498ab35ea0982abb1d6 gas/testsuite/gas/mt/badinsn.s +4d2dcdb363d2f27fbf8abe1f2ebbf5b0 gas/testsuite/gas/mt/badinsn1.s +3e442cb56c28162e51fc72327dc01c3c gas/testsuite/gas/mt/badoffsethigh.s +348a658fb73a449ee0f05dc7a0a5e66d gas/testsuite/gas/mt/badoffsetlow.s +e0b8e33d55f0908382ec2958e56746ac gas/testsuite/gas/mt/badorder.s +7341f098f821fb2bbff60760e71c69c8 gas/testsuite/gas/mt/badreg.s +be8f979079c42cd218688a06a69d5952 gas/testsuite/gas/mt/badsignedimmhigh.s +be6d01290eae0b220a95cb29c6b33459 gas/testsuite/gas/mt/badsignedimmlow.s +205b6842294d5db7cdcd6989b2ce5d0c gas/testsuite/gas/mt/badsyntax.s +7130385ceb73e9687e0f84ffc49049dc gas/testsuite/gas/mt/badsyntax1.s +fa2cf99574f4fe9a7bc377642eeb8a3c gas/testsuite/gas/mt/badunsignedimmhigh.s +421ee6bb49c170add850a3fee23441f0 gas/testsuite/gas/mt/badunsignedimmlow.s +876d751b737fa5d5b633f219294cfdc3 gas/testsuite/gas/mt/errors.exp +bc9b891086b60b59c357a0d853aa022f gas/testsuite/gas/mt/ldst.s +4f8e71e8cf331137c3f336aa91c6ad45 gas/testsuite/gas/mt/misc.d +5b80d5b239649f291fea8d4dd2a7c9d0 gas/testsuite/gas/mt/misc.s +715cbc3a022f4cab8186ef1649526e8e gas/testsuite/gas/mt/ms1-16-003.d +3aebdfcb7a46df06bea5ada46f5aecce gas/testsuite/gas/mt/ms1-16-003.s +79eea58fd131fc4a04503206807045f4 gas/testsuite/gas/mt/ms2.d +7581af9f6edce4220949225f386bd96b gas/testsuite/gas/mt/ms2.s +29bfbb076d69ac98656871de79c8dd02 gas/testsuite/gas/mt/msys.d +ed7cc04edf600fa086f611443fde050e gas/testsuite/gas/mt/msys.s +cb2ddf46ed713e3cee1a889a471db947 gas/testsuite/gas/mt/mt.exp +ce4f15550816f84e686171c52ab4caba gas/testsuite/gas/mt/relocs.d +42a48f92eaf736f7bdca950d44b5bc4e gas/testsuite/gas/mt/relocs.exp +72a6accb16fa3045da840a35c403c8af gas/testsuite/gas/mt/relocs1.s +9f35d2e0a5e23346e97fb52443fd3ee0 gas/testsuite/gas/mt/relocs2.s +0f4b7bc9edd01dc9fb590e23e45d45ba gas/testsuite/gas/openrisc/addi.d +805e669e897b3dc1b7062edc45f09d7f gas/testsuite/gas/openrisc/addi.s +745fc0a057d8ba007c88fffe2c0bb434 gas/testsuite/gas/openrisc/allinsn.d +a55077cac843dd6c1af5269546a2ab6b gas/testsuite/gas/openrisc/allinsn.exp +f3d8381e0e379835553db59cba908711 gas/testsuite/gas/openrisc/allinsn.s +974b82bc6b25c55d65c70bbd83a8d41a gas/testsuite/gas/openrisc/lohi.d +d906479f52be5937ccbcb6b59e18d265 gas/testsuite/gas/openrisc/lohi.s +c9192e457e9a372b6ee3168d396ecc69 gas/testsuite/gas/openrisc/store.d +1b1f6769e09f9c308a211891e04ff8c8 gas/testsuite/gas/openrisc/store.s +279b16c6aed695ea2c29a0f6073cf85b gas/testsuite/gas/pdp11/absreloc.d +15748007ed4702c3c820d16fe8946c98 gas/testsuite/gas/pdp11/absreloc.s +e25229a10a540fcfadebf33b23951dce gas/testsuite/gas/pdp11/opcode.d +4a2b0b7305e0d85696a3d5761dc2ace5 gas/testsuite/gas/pdp11/opcode.s +1b954c5cd69de5059a2972ddda82ae7c gas/testsuite/gas/pdp11/pdp11.exp +f87710fc72b7634b268501b2b519b7e2 gas/testsuite/gas/pe/aligncomm-a.d +4b69133546e836426d88e02b2beda29d gas/testsuite/gas/pe/aligncomm-a.s +b01266334ed3408665a7c3989d570a6e gas/testsuite/gas/pe/aligncomm-b.d +18f2ca846a66a7f8e4cec8dfa893b24c gas/testsuite/gas/pe/aligncomm-b.s +e5850882d7661e18312b7adad553ba84 gas/testsuite/gas/pe/aligncomm-c.d +022aa068d648739647e467cd768f603f gas/testsuite/gas/pe/aligncomm-c.s +d3a74136f06cb60020d9d8662b5b9702 gas/testsuite/gas/pe/aligncomm-d.d +87202c1ee6ceb1e831ae1b57d2506121 gas/testsuite/gas/pe/aligncomm-d.s +8db13f60b148d508907272f47f73a247 gas/testsuite/gas/pe/pe.exp +14b5e450c7b52ba42af8e3f5b122d024 gas/testsuite/gas/pe/peseh-x64-2.d +c83a67346c3e46e5611a265a633a5a22 gas/testsuite/gas/pe/peseh-x64-2.s +b0753685dfb74e4bb7f0be57ed939f47 gas/testsuite/gas/pe/peseh-x64-3.d +43f4160b55994ea4fa63fb39f7d16287 gas/testsuite/gas/pe/peseh-x64-3.s +8519bb15460ddbec27adeaccea61eb55 gas/testsuite/gas/pe/peseh-x64-4.d +ab50d587344a92b5d17ec3f25a41456d gas/testsuite/gas/pe/peseh-x64-4.s +491ebe2ffdd55231ea9b442af7bf51f3 gas/testsuite/gas/pe/peseh-x64-5.d +d64bddbfb416d9c12eac3c17f91e120b gas/testsuite/gas/pe/peseh-x64-6.d +00fa72a6fef11012e7948717b2524dfc gas/testsuite/gas/pe/peseh-x64.d +4f321b37833fe37deb73da16942735d3 gas/testsuite/gas/pe/peseh-x64.s +cf1138a294ab7d6e8d2ff734630730dc gas/testsuite/gas/pe/section-align-1.d +5ab659a1d28d273669e669582aa5474f gas/testsuite/gas/pe/section-align-1.s +914530c1307708d7330b54a2f5e1b113 gas/testsuite/gas/pe/section-align-3.d +579e63be19d5a83aa3edeebbcaf0d852 gas/testsuite/gas/pe/section-align-3.s +4f21032e12b25c725ee4802b8f48158e gas/testsuite/gas/pe/seh-x64-err-1.l +7ea8bc872bacd31fbb83e507025e3e1b gas/testsuite/gas/pe/seh-x64-err-1.s +f3a7124485548781ba12a81c18199e29 gas/testsuite/gas/pj/ops.d +308d2177ed3b3b087d977e46c924fc0c gas/testsuite/gas/pj/ops.s +a6667ed6fc7b116477f95ef897bc5444 gas/testsuite/gas/pj/pj.exp +7998e80131b20ddc9a87ffcbc55296e6 gas/testsuite/gas/ppc/476.d +615b428c516fa68eba4e68423890d0d6 gas/testsuite/gas/ppc/476.s +783f255e9001b203c80913c86e2fa05a gas/testsuite/gas/ppc/a2.d +ae55fc8dcb8fb87afb6d4db30c00bda3 gas/testsuite/gas/ppc/a2.s +995494cc71eaac0de2d6d0df022d432e gas/testsuite/gas/ppc/aix.exp +1144f1624f81b2bf57bc44af8e76f9bb gas/testsuite/gas/ppc/align.s +78ff04d1b9877427fac95abb3a2c09c2 gas/testsuite/gas/ppc/altivec.d +da75a2b442b5537342a3fb0ae74a0510 gas/testsuite/gas/ppc/altivec.s +5bb0cea3beaab672ecd7271c2d380d8d gas/testsuite/gas/ppc/altivec_and_spe.d +25f7266b7d2018e3d6ada872b8781bec gas/testsuite/gas/ppc/altivec_and_spe.s +a4f8e829f2bbb753b664451a0431cb97 gas/testsuite/gas/ppc/altivec_xcoff.d +01ef4fa1c9223585909c1314f1412a43 gas/testsuite/gas/ppc/altivec_xcoff.s +75d993b58f0b561c72c03e42b6c041b3 gas/testsuite/gas/ppc/altivec_xcoff64.d +87d11cb66e10ea7d6a07293cb45e8799 gas/testsuite/gas/ppc/altivec_xcoff64.s +172a30768ef125e522380000282ea0c7 gas/testsuite/gas/ppc/astest.d +5254d1fc440f434a46e97eb96b2735c1 gas/testsuite/gas/ppc/astest.s +8f377d927ab1a25ef74a404f9da39852 gas/testsuite/gas/ppc/astest2.d +679686746eeffb584f428b319e1d60e7 gas/testsuite/gas/ppc/astest2.s +7f23c4ac16d5164a642a0d9250d4d57e gas/testsuite/gas/ppc/astest2_64.d +144fe63958860bc4f47e29e6d334f7de gas/testsuite/gas/ppc/astest2_64.s +aa6e3da11bbf146a7269f12df1e53c48 gas/testsuite/gas/ppc/astest64.d +7b85234004920f7134df77e2f1931c13 gas/testsuite/gas/ppc/astest64.s +814b9384e012ee9f649e6512cd5bc73d gas/testsuite/gas/ppc/booke.d +882fec9b42306ecf5c5ca234dd38c7d4 gas/testsuite/gas/ppc/booke.s +b965e2e9b08bb26c920ddbca2d3ceae3 gas/testsuite/gas/ppc/booke_xcoff.d +2a6d0fd8f30dbe6f0a2ee6e441b5073f gas/testsuite/gas/ppc/booke_xcoff.s +fbe1c4c6def5d4e68a43405632093a2b gas/testsuite/gas/ppc/cell.d +53a63b8602866480769f214b0d02de49 gas/testsuite/gas/ppc/cell.s +6615dec72032153ab2d1c2c0ab15cc17 gas/testsuite/gas/ppc/common.d +4d4a527779dba30e1417156fe5750979 gas/testsuite/gas/ppc/common.s +5a245bc1775a0187259ad57ec31020e3 gas/testsuite/gas/ppc/e500.d +8cae9a555b49d3b88b9fa9e41c384edc gas/testsuite/gas/ppc/e500.s +6bbc9dfd706bc2ac8993f34dbabc5691 gas/testsuite/gas/ppc/e500mc.d +709c5b7abcd10261e08338d6148c307d gas/testsuite/gas/ppc/e500mc.s +05271d9cdd13ebcebd7662d04285d5af gas/testsuite/gas/ppc/generate.sh +c587e1022ddcd82f029387d1a0a27562 gas/testsuite/gas/ppc/machine.d +ff408fd5be06ddf91987583d7e49c157 gas/testsuite/gas/ppc/machine.s +889666cde90be418b342903e4c6da6d2 gas/testsuite/gas/ppc/power4.d +7e32750fd4d73ca95fc2905868e37cf0 gas/testsuite/gas/ppc/power4.s +c730a7c1697ce1b178e7ca65e6335a45 gas/testsuite/gas/ppc/power4_32.d +5db471f78c7a217e8f43a9e38e1e66de gas/testsuite/gas/ppc/power4_32.s +073d34c5f86176192cdc9c7912a3c885 gas/testsuite/gas/ppc/power6.d +2edeead6e85ba8e901425779110950cd gas/testsuite/gas/ppc/power6.s +29187993668e409cb616c535a22f339f gas/testsuite/gas/ppc/power7.d +d708d009c1d3702668c49c3373a7ed92 gas/testsuite/gas/ppc/power7.s +5292ae05d49968dd862bed7e3bb35f25 gas/testsuite/gas/ppc/ppc.exp +9f2fd57e7d204e3e0cd75d1987a95e78 gas/testsuite/gas/ppc/ppc750ps.d +8199ee4187314431099549660ceee5a1 gas/testsuite/gas/ppc/ppc750ps.s +b136c48de02880f92600e15502079cbd gas/testsuite/gas/ppc/range.l +437da5d8021d72cd229eb7b18d244451 gas/testsuite/gas/ppc/range.s +a2fd6cc4d110fec6262d9c0a97e193c1 gas/testsuite/gas/ppc/range64.l +db560f88366d3c0e44c52d438bf7fa47 gas/testsuite/gas/ppc/range64.s +adbd495a100eb239848aea6e37340a88 gas/testsuite/gas/ppc/regnames.d +b318f99332cc8875eeb2b1e63205efa4 gas/testsuite/gas/ppc/regnames.s +afc3d3ec2754e8dc184c562e4de77a4a gas/testsuite/gas/ppc/reloc.d +e2ca5089c4db50f97a3bec4e6f71854f gas/testsuite/gas/ppc/reloc.s +d2e3625ca66a7c30b9270f806c67c877 gas/testsuite/gas/ppc/simpshft.d +b09f6e7ab2e1416379f9512d1abe3afc gas/testsuite/gas/ppc/simpshft.s +52c2f10e54b1b94b494715da3c2a71f2 gas/testsuite/gas/ppc/test1elf.asm +c6c389f73289209973a4a40e2f7af221 gas/testsuite/gas/ppc/test1elf32.d +69b9dc5b20503079be857e83ad7e6d24 gas/testsuite/gas/ppc/test1elf32.s +c6ae7aea99b8f7d5b690081c72f616f4 gas/testsuite/gas/ppc/test1elf64.d +a8ab8683a00320673194096739412def gas/testsuite/gas/ppc/test1elf64.s +6b5dede6da756c49ce5fc9127d0a6510 gas/testsuite/gas/ppc/test1xcoff.asm +f34f706916a8b93f41cf7f809563ddee gas/testsuite/gas/ppc/test1xcoff32.d +68e09cd1bae67cb9bdbb378d986ebc5b gas/testsuite/gas/ppc/test1xcoff32.s +7d26a371daee8844b9a874ea29f62b16 gas/testsuite/gas/ppc/textalign-xcoff-001.d +b60a4ad89a80b60d95fc5d73ec5e02d9 gas/testsuite/gas/ppc/textalign-xcoff-001.s +b0f0a0f307149b00c01eb907197dd91e gas/testsuite/gas/ppc/textalign-xcoff-002.d +74b87caae3a9839dbb0d84ac48ebbb93 gas/testsuite/gas/ppc/titan.d +2717127e5f63eb13a54799851eedf836 gas/testsuite/gas/ppc/titan.s +5bcbd729e2c0f44f2afd013db1ba0dee gas/testsuite/gas/ppc/vsx.d +521a68b0b766533df40b6a6a6ec922bd gas/testsuite/gas/ppc/vsx.s +08ea62f057fad4130ab4496b10773187 gas/testsuite/gas/ppc/xcoff-branch-1-32.d +8e884141661fddd367c49211824ec4dc gas/testsuite/gas/ppc/xcoff-branch-1-64.d +80d642f21d1d3f314901cc58bd518132 gas/testsuite/gas/ppc/xcoff-branch-1.s +f5c9bc0a18773d1bf7f99806a00efdfb gas/testsuite/gas/ppc/xcoff-dwsect-1-32.d +d6eaed6c0ca0de13aa3cee67f499030b gas/testsuite/gas/ppc/xcoff-dwsect-1-64.d +ac5681bad739dbc93a0593b34dd4e884 gas/testsuite/gas/ppc/xcoff-dwsect-1.s +1f3ca01c9d7afa8a580c73ee371fee03 gas/testsuite/gas/ppc/xcoff-ref-1.l +1e195c4e7e61cabafec65c9c47e4a7ad gas/testsuite/gas/ppc/xcoff-ref-1.s +71c5f6565eae6138dec18a7c3133bbd8 gas/testsuite/gas/rx/abs.d +57914b62441aa5b32fb9760c2935321f gas/testsuite/gas/rx/abs.sm +b048d3c4304a81e88a3b8a664ba02721 gas/testsuite/gas/rx/adc.d +2d6940166d3de253abc100cd9a1282a6 gas/testsuite/gas/rx/adc.sm +ae3b6977397e67d3a744df524e8c7e11 gas/testsuite/gas/rx/add.d +7aa990f49aa4148434319eeb8d257d4d gas/testsuite/gas/rx/add.sm +99dc23f583f78027f3f212f87a56a59b gas/testsuite/gas/rx/and.d +ed68765a3d896b4aaa9120e4424f9665 gas/testsuite/gas/rx/and.sm +169174d211e0c66b6ce470293348a3aa gas/testsuite/gas/rx/bclr.d +deb0d8eeb4cb7fb3edea5dc757efcf32 gas/testsuite/gas/rx/bclr.sm +a89fd288ed65b1f109da51e63f86c1f9 gas/testsuite/gas/rx/bcnd.d +1b11c559ec4f7c09813f3f35310677e4 gas/testsuite/gas/rx/bcnd.sm +00749ad683564469b6ab3c84992a2b53 gas/testsuite/gas/rx/bmcnd.d +f17cd72c85ff80e16b8331c8ac2514d6 gas/testsuite/gas/rx/bmcnd.sm +bebb6132c423435536a0ae7c8f23055f gas/testsuite/gas/rx/bnot.d +bece335b9a213f01289e78a9905553c6 gas/testsuite/gas/rx/bnot.sm +ceb6c219e179ccba72ce842356e0230b gas/testsuite/gas/rx/bra.d +bcf0d139b5a7d7bf5d286921b40e8eb8 gas/testsuite/gas/rx/bra.sm +56fdc89391eed35b67c1b581225759d9 gas/testsuite/gas/rx/brk.d +210e06f27c91dfeea0b15367be8182a5 gas/testsuite/gas/rx/brk.sm +7364258a2f719f9fa11522149936caa5 gas/testsuite/gas/rx/bset.d +3803c911b7f99eef6a1188ad241d1fca gas/testsuite/gas/rx/bset.sm +cfd26e005712b4c8e6e251655444018e gas/testsuite/gas/rx/bsr.d +bcfdf7c9037623b2dc2c2f55f78ab388 gas/testsuite/gas/rx/bsr.sm +ac735f1b1f0a1634a620828ba0452aa4 gas/testsuite/gas/rx/btst.d +123735debe669e405d26224fded45a1f gas/testsuite/gas/rx/btst.sm +2070f1a4655835c842b156d761a4c3e0 gas/testsuite/gas/rx/clrpsw.d +53b580f3aaf8e173e7b407a118197ce3 gas/testsuite/gas/rx/clrpsw.sm +72434b2d6197ac4eb874435654876efc gas/testsuite/gas/rx/cmp.d +9d246f343ff85cf0e39313bc3e66f1d4 gas/testsuite/gas/rx/cmp.sm +d3d99191bf101ab81a2c5b0396b0d67b gas/testsuite/gas/rx/dbt.d +80958735878b351e5540a9e704d545f3 gas/testsuite/gas/rx/dbt.sm +897f3f117c7e9246cf52f8344349fb2a gas/testsuite/gas/rx/div.d +7aa068444f2b8c9065aa84c29d7bf4a4 gas/testsuite/gas/rx/div.sm +a5a172166694021dee0536abb39cfbb4 gas/testsuite/gas/rx/divu.d +c0fe0690acf56e1ebb2a20fcf080951b gas/testsuite/gas/rx/divu.sm +64ca82295b3e3527237595d64e2ec4fd gas/testsuite/gas/rx/emul.d +e156d3cf3cefbd71e2b94bb584f14057 gas/testsuite/gas/rx/emul.sm +4be3fb5bc2da577668fa279a0e5379ca gas/testsuite/gas/rx/emulu.d +da20d6937cb0a93d404a7f36552f598d gas/testsuite/gas/rx/emulu.sm +9a46e594c4281388165045e550e192cb gas/testsuite/gas/rx/explode +be77a9ce9fe0f3fc98b9c1a5f9dee598 gas/testsuite/gas/rx/fadd.d +ec80bf2c13f161e0e1d0eea3071b4d6d gas/testsuite/gas/rx/fadd.sm +344785c6f3789972a52648efcefe1298 gas/testsuite/gas/rx/fcmp.d +2e68fcf2ff2194fd41c776e5be3847be gas/testsuite/gas/rx/fcmp.sm +25fe18b9673181e8607c9c9a8c5a4cb7 gas/testsuite/gas/rx/fdiv.d +ce2676a80a637f40d5a58122d2fefbac gas/testsuite/gas/rx/fdiv.sm +d8a840ad93bca4bab75e270a700dae51 gas/testsuite/gas/rx/fmul.d +4f5f04b4bbb87ea99a0b7d6dc2fd7f5f gas/testsuite/gas/rx/fmul.sm +bdf7fbc45d7f9d9aef69c185a3f006ac gas/testsuite/gas/rx/fsub.d +6d8e744da2e3789c27474f208e6bcd90 gas/testsuite/gas/rx/fsub.sm +fd84cd91b0196c3ad5911af7a61f5d2e gas/testsuite/gas/rx/ftoi.d +cc153bcbcc2613a0b294874d83bb8801 gas/testsuite/gas/rx/ftoi.sm +483f744974cf5b30c0caaa2d4185b78a gas/testsuite/gas/rx/gprel.d +0b959340efd688ecd7efa4df2c1ee387 gas/testsuite/gas/rx/gprel.sm +a55f487298c5289bf22dc2c2b40aa283 gas/testsuite/gas/rx/int.d +932b876ccb68e904a163f31c112d48af gas/testsuite/gas/rx/int.sm +dd8aeadae1a4c0c09404fd8829d03b33 gas/testsuite/gas/rx/itof.d +1aa0d64b0c977f357d50740b93e1825a gas/testsuite/gas/rx/itof.sm +fa0e692161f88294c9da57e1dd50c6a8 gas/testsuite/gas/rx/jmp.d +50581a2620e3e6750c81bd889311e643 gas/testsuite/gas/rx/jmp.sm +d3f51b064682737990930c85a49607cf gas/testsuite/gas/rx/jsr.d +875b577c5716ea80ac37b10a7409b9f3 gas/testsuite/gas/rx/jsr.sm +4cadb514c54d054ee5c48964aed8fdad gas/testsuite/gas/rx/machi.d +9d0b79ce54c30af9142a81e05389ae2d gas/testsuite/gas/rx/machi.sm +716c4a0604a903373c7b8c75a0973984 gas/testsuite/gas/rx/maclo.d +80245ef6485b99eb515fa280ec4c9932 gas/testsuite/gas/rx/maclo.sm +80e574bf0a58a211c77e6bd24a40bd24 gas/testsuite/gas/rx/macros.inc +47d54c96fb80856510f0ff8bf6866fa2 gas/testsuite/gas/rx/make-d +9a862758ff038db92ecba963bc9e8f2b gas/testsuite/gas/rx/max.d +acea9f2e9d6300fe32b280ceab296313 gas/testsuite/gas/rx/max.sm +682159cd39cb1f88595265c178857b92 gas/testsuite/gas/rx/min.d +d95dfd96010938f9f79c939540f18015 gas/testsuite/gas/rx/min.sm +d9054381f9affe93f65ab35e05869af1 gas/testsuite/gas/rx/mov.d +12ad788223244fffa744ad446f307fb7 gas/testsuite/gas/rx/mov.sm +b6220779ac3784c717f342f0ae4d9779 gas/testsuite/gas/rx/movu.d +17304b659a294283fee0bb2172ea3fe6 gas/testsuite/gas/rx/movu.sm +62023c9742713644bc372ff9f67688fa gas/testsuite/gas/rx/mul.d +62a850c704ad34ca760c68500b6305bd gas/testsuite/gas/rx/mul.sm +39925b5c6445ece419613bd42466f521 gas/testsuite/gas/rx/mulhi.d +815b1ab028634144eb289a39c716a26a gas/testsuite/gas/rx/mulhi.sm +cae0c70f270750dbc742a6b048c513c5 gas/testsuite/gas/rx/mullo.d +b849b163a8607d5c65ba288da3115365 gas/testsuite/gas/rx/mullo.sm +b59bdded2bfff2e6484a2295683b2743 gas/testsuite/gas/rx/mvfachi.d +a0f4216e57978ee5c9c4d3036d381cd1 gas/testsuite/gas/rx/mvfachi.sm +8252622aaf2585e46949d0b5ab78cc72 gas/testsuite/gas/rx/mvfaclo.d +f3216eb5860608c49c1170d136b71b43 gas/testsuite/gas/rx/mvfaclo.sm +8aa008b398f233f643a3d5b45993d654 gas/testsuite/gas/rx/mvfacmi.d +30dfdae83b5a43f60e426edba343a3ee gas/testsuite/gas/rx/mvfacmi.sm +733e3b0d08ef962d3f8ae4ac4e834499 gas/testsuite/gas/rx/mvfc.d +5654b52fb25c6f0f20155e424fdce749 gas/testsuite/gas/rx/mvfc.sm +61de9c081ecf4f86ebc420bc49279a00 gas/testsuite/gas/rx/mvfcp.d +7b3a558f817438f0501d9c73e39d2921 gas/testsuite/gas/rx/mvfcp.sm +06cb093e7c94c7afc81b3e3b171ae61d gas/testsuite/gas/rx/mvtachi.d +9d499f4b523c571b1cbacd616c46af92 gas/testsuite/gas/rx/mvtachi.sm +731c1ae090efecb2187429ae52a3c618 gas/testsuite/gas/rx/mvtaclo.d +2a35618a002a919c1059cd66a198486e gas/testsuite/gas/rx/mvtaclo.sm +f31110ab1204c74f0b4ed17459e220bb gas/testsuite/gas/rx/mvtc.d +ed6e831528d0d66abae516ca14078779 gas/testsuite/gas/rx/mvtc.sm +61de9c081ecf4f86ebc420bc49279a00 gas/testsuite/gas/rx/mvtcp.d +b64e28358653987bc6d67e565b758aa5 gas/testsuite/gas/rx/mvtcp.sm +9c34af5aca08eaba86077ba8cf6fcf93 gas/testsuite/gas/rx/neg.d +1205defe5bc999ba88485b040317aeb4 gas/testsuite/gas/rx/neg.sm +c812ce4deb3e2378b3e0cb7cd22124c8 gas/testsuite/gas/rx/nop.d +801d14a6810ebae1f5eefda4bac2a4d8 gas/testsuite/gas/rx/nop.sm +7a5b7e56ad16b8d009c329b60dc95fc0 gas/testsuite/gas/rx/not.d +4d9e9ddd2a666f58f3ecdcc1d6cda308 gas/testsuite/gas/rx/not.sm +61de9c081ecf4f86ebc420bc49279a00 gas/testsuite/gas/rx/opecp.d +aabdfcba99ffe44bc380af93936e8bfc gas/testsuite/gas/rx/opecp.sm +702baf9aa1860abbb87465367e7fbf0b gas/testsuite/gas/rx/or.d +02b41e6c1928b870b5e5b218bc7a22b9 gas/testsuite/gas/rx/or.sm +086361006f946fe5b451edcb72340bc4 gas/testsuite/gas/rx/pop.d +a2d84a508769af38cd42c65899b90f4c gas/testsuite/gas/rx/pop.sm +84375b4f4560924448fcfeaad8ab4845 gas/testsuite/gas/rx/popc.d +d8dc76e252c3f2d9f914ab95f785f243 gas/testsuite/gas/rx/popc.sm +63dff8e2578028f02d0a2cf1f47be845 gas/testsuite/gas/rx/popm.d +c5feb43571cf9c69b2ede29b85cc229d gas/testsuite/gas/rx/popm.sm +1798ab935ea0e36f5e2adaf7e9b25f05 gas/testsuite/gas/rx/push.d +5fd4b35ac45d14b26132e893546309a7 gas/testsuite/gas/rx/push.sm +3789e0e50d71498be10ac56ab47a73b7 gas/testsuite/gas/rx/pushc.d +31c549753fc2cdafe0b1ea22381995d4 gas/testsuite/gas/rx/pushc.sm +897fce7adc397e67ace678380d76edf9 gas/testsuite/gas/rx/pushm.d +31e6424c05fa0118196e58df84d46c33 gas/testsuite/gas/rx/pushm.sm +fa888390f54df9caaefe5a0e6f5a7ed2 gas/testsuite/gas/rx/r-bcc.d +1a99d1947bcae0662631069327fabcf0 gas/testsuite/gas/rx/r-bcc.sm +71f21938bb576c7f6141843eb87a4456 gas/testsuite/gas/rx/r-bra.d +c6a84826af465f62a588c342941868dc gas/testsuite/gas/rx/r-bra.sm +622c76c337dbac3fb25bb7556ac1af86 gas/testsuite/gas/rx/racw.d +b115d0aa01f0ea984757c3cc45658d7a gas/testsuite/gas/rx/racw.sm +fed07e594602888169bc89562f51057f gas/testsuite/gas/rx/revl.d +c892f2d179c9e3a054792b3dd33118ab gas/testsuite/gas/rx/revl.sm +7fce081688df6feb995457faa6c75606 gas/testsuite/gas/rx/revw.d +e5a36a930e316c17e8575fbe75063ba2 gas/testsuite/gas/rx/revw.sm +474c11d100134fdd86a1d10b46c1f0de gas/testsuite/gas/rx/rmpa.d +08d26b967c211f2348569c1628ceb2a6 gas/testsuite/gas/rx/rmpa.sm +4b6b8909375e6c66164f0c76c54a4ca8 gas/testsuite/gas/rx/rolc.d +7265865f4ad692797331c14cab6c7789 gas/testsuite/gas/rx/rolc.sm +b399a4666515a870afd9747d32060bbc gas/testsuite/gas/rx/rorc.d +0553eb6304233f40fb5b12e8427bb104 gas/testsuite/gas/rx/rorc.sm +9ba511a30afbb28ae983871316ec4072 gas/testsuite/gas/rx/rotl.d +ef57b6a0c7da62c2bbf0e86fe184c808 gas/testsuite/gas/rx/rotl.sm +276f4fb95cff7811f4eeef74b387ebe9 gas/testsuite/gas/rx/rotr.d +06945679975a1cbd6bb75438fdfd0fb1 gas/testsuite/gas/rx/rotr.sm +a15fa81374d772b26ee907aabf411da4 gas/testsuite/gas/rx/round.d +0cf45b8285e5d4295f80ad8f3f7e2154 gas/testsuite/gas/rx/round.sm +e644c19442ae5298ce9b32a0221fee44 gas/testsuite/gas/rx/rte.d +2540473fb6034a8e1b586afff89ba600 gas/testsuite/gas/rx/rte.sm +4c62eafb55176b1936291784407f4609 gas/testsuite/gas/rx/rtfi.d +8edf85ae4c675d6a1585f65e5812f11a gas/testsuite/gas/rx/rtfi.sm +438cada13e53ab9998cf620935b49eb7 gas/testsuite/gas/rx/rts.d +d142e6a1ea2d9b2f64a0439381469c73 gas/testsuite/gas/rx/rts.sm +1a764aa7e92058ebc617c88ceb5a13f9 gas/testsuite/gas/rx/rtsd.d +9bc425e1e24ba5dd89eed1ed408a1d0f gas/testsuite/gas/rx/rtsd.sm +bb0ff34c3ab9c2a478cb7b8b61139a78 gas/testsuite/gas/rx/rx-asm-bad.l +61936a3f5fbdd9820e618749640e504a gas/testsuite/gas/rx/rx-asm-bad.s +335f82bc634a376dc49da142a9562b7c gas/testsuite/gas/rx/rx-asm-good.d +fa505b9a2a2bd46a898da5124274132a gas/testsuite/gas/rx/rx-asm-good.inc +7431b0d36df683582ac103ddf6cc3bc0 gas/testsuite/gas/rx/rx-asm-good.s +30e661a36185d8069e8c71902d8f641e gas/testsuite/gas/rx/rx.exp +b2a174be9eab23d04fdd7e2b9ac22f60 gas/testsuite/gas/rx/sat.d +b91e0dcd4df17a9f34e22ae004d71823 gas/testsuite/gas/rx/sat.sm +2a34fc5a5c2e863b3bc464e00bddd7dc gas/testsuite/gas/rx/satr.d +45f2eb6f90d369713a4d41cf25b7c841 gas/testsuite/gas/rx/satr.sm +f07335a0fd889644fa6a5129ef81b609 gas/testsuite/gas/rx/sbb.d +c18b15801487432cf19c5cc1f9e2e257 gas/testsuite/gas/rx/sbb.sm +215c2af504c8c549b51d5921ed7ec14e gas/testsuite/gas/rx/sccnd.d +7850ea31940e63fa1ef45abff25a89e4 gas/testsuite/gas/rx/sccnd.sm +45ffc89b0c059abfc7655ebd17945b2d gas/testsuite/gas/rx/scmpu.d +2148e7ba72bb63ff13a079c5523a610c gas/testsuite/gas/rx/scmpu.sm +d7f29b311ef64a754e51311e3ed78f38 gas/testsuite/gas/rx/setpsw.d +5d7d7b65407c898b6e132ddb9a30519a gas/testsuite/gas/rx/setpsw.sm +db59e893fde1f4f78ba4fcac475c5c6b gas/testsuite/gas/rx/shar.d +18fa908f4688b2ffd620e2d43aca938a gas/testsuite/gas/rx/shar.sm +bad9e0177093d623d9e011d7cfdf703c gas/testsuite/gas/rx/shll.d +9a55f7ee3f5f8dcb605c6191142ff73d gas/testsuite/gas/rx/shll.sm +faf9726fad02245d00b56cd0c48c8ab0 gas/testsuite/gas/rx/shlr.d +2c696e1e741fa0886eaacce00c4053a3 gas/testsuite/gas/rx/shlr.sm +5f52c9e47c7801611c9f05a5450538b0 gas/testsuite/gas/rx/smovb.d +9925cd0ed493e324ddc0717a3162e41e gas/testsuite/gas/rx/smovb.sm +2178875bb875b5ff557e40b29e8ad3ae gas/testsuite/gas/rx/smovf.d +64ce003ba8a54aa405b7013c1b0c0aa0 gas/testsuite/gas/rx/smovf.sm +62ab149d6ea0bdf5954a82b875c2f78f gas/testsuite/gas/rx/smovu.d +c450ecc9e30aaecdffab682b4a0d34a7 gas/testsuite/gas/rx/smovu.sm +649a7431df0ef24c61e6b53c677110f6 gas/testsuite/gas/rx/sstr.d +51aefed80127887cd629d888dc527fe3 gas/testsuite/gas/rx/sstr.sm +ae8608b6ebb97f867c43f55ea2517abe gas/testsuite/gas/rx/stnz.d +9fbb8be3e0e696a884133506073c80b2 gas/testsuite/gas/rx/stnz.sm +77b2c62de607bcec7c251c77997aba48 gas/testsuite/gas/rx/stz.d +e2553dbd60352f13ec9a377985d3fa28 gas/testsuite/gas/rx/stz.sm +368b8c160b4ec95a989ea8b4dc88ba0e gas/testsuite/gas/rx/sub.d +1b02e8cb4fe0984e50e625accddd8e47 gas/testsuite/gas/rx/sub.sm +63a20cd3d9aa6ea043777cc3000637d1 gas/testsuite/gas/rx/suntil.d +18f454dc532d9c87732d7a505ed9f15e gas/testsuite/gas/rx/suntil.sm +c3cbfcc3e2dd463a7384a818c39c7da7 gas/testsuite/gas/rx/swhile.d +bbdc61efa10ce63739970dbc071c623c gas/testsuite/gas/rx/swhile.sm +d6d3a369df3952b8be1297bab047884f gas/testsuite/gas/rx/tst.d +e55278f40c448972bacf359a3e83f3e4 gas/testsuite/gas/rx/tst.sm +beb0ade7b33e10c7f58571302ff64be5 gas/testsuite/gas/rx/wait.d +bb63d5a084fb1b0b55cb7a81dfde1244 gas/testsuite/gas/rx/wait.sm +93d86c44b26f0577648177fa7e89e017 gas/testsuite/gas/rx/xchg.d +84a1ad4883556028255c67db6c8fd83d gas/testsuite/gas/rx/xchg.sm +f43607cd0da97a35bf26d20aa651083e gas/testsuite/gas/rx/xor.d +1126037c4c2e5c7aec115d5a3cfe082d gas/testsuite/gas/rx/xor.sm +1b76c401c6cd50032e66cf61af09dc3f gas/testsuite/gas/s390/esa-g5.d +2289221f9f2f5966a51af63b25032174 gas/testsuite/gas/s390/esa-g5.s +049e09aef849c8721bc128ebba592aa9 gas/testsuite/gas/s390/esa-operands.d +0c35dd354b63c1f0f41821e01f0ea870 gas/testsuite/gas/s390/esa-operands.s +91fa53d723e9af491ea1e2d5226521c6 gas/testsuite/gas/s390/esa-reloc.d +837bc16ac99b9589f59da79225edfbfb gas/testsuite/gas/s390/esa-reloc.s +00b3e601216c9640b79e439522ec3e19 gas/testsuite/gas/s390/esa-z9-109.d +ffa2cb40d426d45f26754536ff6c55c7 gas/testsuite/gas/s390/esa-z9-109.s +d41597300ce4a636bda3d29a48ce744b gas/testsuite/gas/s390/esa-z900.d +34ed2f2e243cd65867ae7eead4937234 gas/testsuite/gas/s390/esa-z900.s +41ed835e38fe9d1793972b837d21af76 gas/testsuite/gas/s390/esa-z990.d +1db311482c3a68452e62bc6faa121e74 gas/testsuite/gas/s390/esa-z990.s +89a9f4b81b75562d70751cb289ea6103 gas/testsuite/gas/s390/s390.exp +9058bbee5af8d3b3cec81bf0b4dce4a3 gas/testsuite/gas/s390/zarch-machine.d +1581b062c50becf7b85a232069e4e7d8 gas/testsuite/gas/s390/zarch-machine.s +8ba9907de5d21ef3b208cfe32af15bc0 gas/testsuite/gas/s390/zarch-operands.d +4e6e317e3db9c6d28907c3c6c431ace1 gas/testsuite/gas/s390/zarch-operands.s +dd37fb6426063522f96f61085b4353f1 gas/testsuite/gas/s390/zarch-reloc.d +0eef4465981789eff7ee6d934128da4b gas/testsuite/gas/s390/zarch-reloc.s +ae7c0030f3a9f473e069dae58e318bdd gas/testsuite/gas/s390/zarch-z10.d +686c25255de2f035d4cb2d7fad54a977 gas/testsuite/gas/s390/zarch-z10.s +b78428880fa7c322e5d333a7473db26f gas/testsuite/gas/s390/zarch-z196.d +e61751b9ee411f88b550a70a3f4a97dc gas/testsuite/gas/s390/zarch-z196.s +d5ceeba8087f472509c745613dece0de gas/testsuite/gas/s390/zarch-z9-109.d +4208ff65cd0fb1b7f866eb68311b318d gas/testsuite/gas/s390/zarch-z9-109.s +4e03839ebe73d46d14c2af98220f9e90 gas/testsuite/gas/s390/zarch-z9-ec.d +81c218c7eab8f08b1613d2589cedcfbc gas/testsuite/gas/s390/zarch-z9-ec.s +a29a94bd7596d9ab4070c61f6ee00445 gas/testsuite/gas/s390/zarch-z900.d +886cc452d745a53a15f7b8ad3ab18325 gas/testsuite/gas/s390/zarch-z900.s +d4b89460c301fd7f61c3281c368e5d9a gas/testsuite/gas/s390/zarch-z990.d +8150bdbf42298de02f4a1c8eb9989161 gas/testsuite/gas/s390/zarch-z990.s +8a1c89adbb047693ca8a9e34ec23645b gas/testsuite/gas/score/addi.d +9f807c9d5872de3135bb10ec78c03d55 gas/testsuite/gas/score/addi.s +cd16adfc5cd30ec14014a689aab4ebd9 gas/testsuite/gas/score/arith_32-lt.d +5ae5ddfd989865f0275cfcad530608d1 gas/testsuite/gas/score/arith_32.d +f39662493a5a5fe1605406d4bd00a0ee gas/testsuite/gas/score/arith_32.s +09be25b16639d5258b0a231a7924cb12 gas/testsuite/gas/score/b.d +9e5400dd46eb0e0bdcddce1b68c603aa gas/testsuite/gas/score/b.s +f78a758787e84cd17a6b11c7ad5e0ea0 gas/testsuite/gas/score/bit_32-lt.d +8e56be3955cc9c17609bb4aed76bebd4 gas/testsuite/gas/score/bit_32.d +e1ba46344102ed4c52059505b90a0c43 gas/testsuite/gas/score/bit_32.s +59674b6578113897a840babf4a58ff44 gas/testsuite/gas/score/bittst.d +7ebe5068ea1b457f8a2b1e5590321485 gas/testsuite/gas/score/bittst.s +d39d9c89aff5ba9a319d63429367c58f gas/testsuite/gas/score/br.d +dbf50132189f8223e3192fc4ab7023c9 gas/testsuite/gas/score/br.s +491e4d3453ea79f21ea01b140b6880be gas/testsuite/gas/score/branch_32-lt.d +fa0db79e835f839731cbfdb6fcf4fa4f gas/testsuite/gas/score/branch_32.d +3bc4ee7caa6c938f5987fd12159fb776 gas/testsuite/gas/score/branch_32.s +973fd2449a69da20c46a7c2e2c1b79e6 gas/testsuite/gas/score/cmp_32-lt.d +6db2b6be738a4a1b8a7871f6763316cd gas/testsuite/gas/score/cmp_32.d +7e52c312976135824736792385b593ac gas/testsuite/gas/score/cmp_32.s +1ff1246a2c0f29f56b1469d28e2e5621 gas/testsuite/gas/score/ldi.d +17af7bab7eae4003148984673d54c4cb gas/testsuite/gas/score/ldi.s +b8ad1458cd3016f9d7bf119701eaa4ef gas/testsuite/gas/score/load_store_32-lt.d +0b798b22162b0ec1790a362fbeac2bfb gas/testsuite/gas/score/load_store_32.d +9f1cdff0d54b789b6651f3c5b5add09d gas/testsuite/gas/score/load_store_32.s +c72322cf27238e40202a7438b9f0fb4a gas/testsuite/gas/score/logical_32-lt.d +5c13a0409663f407b2e3f5d2da3da581 gas/testsuite/gas/score/logical_32.d +a6504948ee7984768746e8a6da48c74c gas/testsuite/gas/score/logical_32.s +0c7ff0a53c30985ff824d658386dc73c gas/testsuite/gas/score/ls32ls16.d +b14eba6473ab67646bac7791a891137f gas/testsuite/gas/score/ls32ls16.s +eee4d8c816dcb23112fbc920272b8c09 gas/testsuite/gas/score/ls32ls16p.d +1b1164c85d52444e0be834538542bbcc gas/testsuite/gas/score/ls32ls16p.s +8a39e6a858081de923317e08781fa778 gas/testsuite/gas/score/move.d +3b389721a2fb77af1dc9d313397538b9 gas/testsuite/gas/score/move.s +a550b1a71ab9b27245cb27e9a11c0f3d gas/testsuite/gas/score/mv_32-lt.d +1abdfe7d99f2ee01c17e044411b70ee0 gas/testsuite/gas/score/mv_32.d +01ae572b8fc5e87722e959c9c1167aa8 gas/testsuite/gas/score/mv_32.s +dd5b1ea842a48583633881aec13854cc gas/testsuite/gas/score/nop.d +3828587e6ac2f22ab8e87adaaaa6aa47 gas/testsuite/gas/score/nop.s +bf200398eee9c775a2ff37110c043cd1 gas/testsuite/gas/score/postlw.d +5b77f1b87e8245cc9a37d570894914a6 gas/testsuite/gas/score/postlw.s +e3062e05f17810c0b22c38d11fd2bcc8 gas/testsuite/gas/score/presw.d +7bf99e258cb450b00e7a03e9d733ed91 gas/testsuite/gas/score/presw.s +a2f278ba771fd7c290800f2228997c7f gas/testsuite/gas/score/rD_rA.d +6d7afb0614ec0f3b9bac11969a035948 gas/testsuite/gas/score/rD_rA.s +617c6c5b76e2a5ef4c70688263172042 gas/testsuite/gas/score/rD_rA_BN.d +2bd56b39ff74c73344c61cb6c5e4d7a5 gas/testsuite/gas/score/rD_rA_BN.s +f903eb0b8485b2afada9efefcae85deb gas/testsuite/gas/score/rD_rA_rB.d +51c3f04ef872ee6bd9f2461bff0c3a3e gas/testsuite/gas/score/rD_rA_rB.s +592a9514216fe1e841b427b8f4696bf5 gas/testsuite/gas/score/relax.exp +317927209aa3e0afd2d5988e55ba86ff gas/testsuite/gas/score/relax_32.exp +700303f88910ab7c3d4ca2244d4b4bb9 gas/testsuite/gas/score/relaxation_macro.h +53e6b7f4b785a41009e6b205d5d9e883 gas/testsuite/gas/score/shift_32-lt.d +b93417d720a444980d78911c82d85e5a gas/testsuite/gas/score/shift_32.d +9362659ffd0fff9876685ec35f19cc53 gas/testsuite/gas/score/shift_32.s +83623afc38654251f9190992f737167e gas/testsuite/gas/score/syscontrol_32-lt.d +250d349607a8b4890e1e45396b57c7cd gas/testsuite/gas/score/syscontrol_32.d +38150bf39bb92b2182170dbb598e6345 gas/testsuite/gas/score/syscontrol_32.s +6ef2563969fd066b1b920c087c2beb6f gas/testsuite/gas/score/tcond.d +15ce7ca423c876d27acb4bd78e298fef gas/testsuite/gas/score/tcond.s +496db8c96a1a44ae75bc8773ebbd88ae gas/testsuite/gas/sh/arch/arch.exp +9c9f92d72af037d87d5f68baa46e1b63 gas/testsuite/gas/sh/arch/arch_expected.txt +557989b111b9dab8e12592d4468c3e37 gas/testsuite/gas/sh/arch/sh-dsp.s +fad623280164b76e8e26f3fefeb21456 gas/testsuite/gas/sh/arch/sh.s +d4b973efa0a1174ecf7403b949d8fef5 gas/testsuite/gas/sh/arch/sh2.s +902449247a1f51fe8d542285c15186fe gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s +597181c5e888fec077372304556c6b14 gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s +c99858e0fe821ffaa35d9f79326782be gas/testsuite/gas/sh/arch/sh2a-nofpu.s +001175cf372c9958c8edbd1a9c673896 gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s +fcd26cad36753392667255e1206d9023 gas/testsuite/gas/sh/arch/sh2a-or-sh4.s +a58353e9d1a147699f4b511c583787f7 gas/testsuite/gas/sh/arch/sh2a.s +66b8534721a9a4642d334ca7ffaf493f gas/testsuite/gas/sh/arch/sh2e.s +ba99caf1cf49cc62487f954f25421850 gas/testsuite/gas/sh/arch/sh3-dsp.s +29d33f8568c4725231c2987e265a2368 gas/testsuite/gas/sh/arch/sh3-nommu.s +c49644b7b8370e6427f9feaf80e70b2b gas/testsuite/gas/sh/arch/sh3.s +4d36649f1200dcdb4901e2551b378729 gas/testsuite/gas/sh/arch/sh3e.s +0e5fbe5b90dc04d700fc142c0bf211ad gas/testsuite/gas/sh/arch/sh4-nofpu.s +abc2ec66346c95fa67fa4e92cbd18a02 gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s +e3ad9d8364abb400e720c763f2015f49 gas/testsuite/gas/sh/arch/sh4.s +b70176213702cb636c0e11124483c6c9 gas/testsuite/gas/sh/arch/sh4a-nofpu.s +38e54ba4a93b881e8d378cc0e93e99e4 gas/testsuite/gas/sh/arch/sh4a.s +08b3726b81639384ea64661f7b57faad gas/testsuite/gas/sh/arch/sh4al-dsp.s +03049005440a99fbf0886c408d64336f gas/testsuite/gas/sh/basic.exp +5587c33a91c8d806a2e2974a9ef6ec69 gas/testsuite/gas/sh/dsp.d +4a91ff56c55784feb5b426e1873c1b72 gas/testsuite/gas/sh/dsp.s +83d353a7646413b74d2087aa22fae13b gas/testsuite/gas/sh/err-1.s +a0ad5112c5f2c5b716feadb70e9b9b75 gas/testsuite/gas/sh/err-at.s +3d3e9ab1c01d5068d93f52aa77f72eb5 gas/testsuite/gas/sh/err-be.s +2c810a3f6741effd3db6c1a9ac7f312d gas/testsuite/gas/sh/err-le.s +1791836ba27d0f15037d2e77eb2d0c58 gas/testsuite/gas/sh/err-mova.s +f816019c871b5e6adcc42febdfb003ff gas/testsuite/gas/sh/err-sh4a-fp.s +d828b6f7773dbd15941f186102f3f6b8 gas/testsuite/gas/sh/err-sh4a.s +331a6e02a9da0ad1ec9a54be37b5bd1d gas/testsuite/gas/sh/err-sh4al-dsp.s +ed7c19de1dc911e216af593e3b2ca574 gas/testsuite/gas/sh/err.exp +5988292c3f4864af1512190686d2e22b gas/testsuite/gas/sh/fdpic.d +7a3473b5856b9ead9a8a884dc0ce9d55 gas/testsuite/gas/sh/fdpic.s +70b8c1e3f6395cf992292993dcbdf601 gas/testsuite/gas/sh/fp.s +f240f299c103126b672ea24bfab01fd1 gas/testsuite/gas/sh/pcrel-coff.d +0935a11b35249a2ef563467f6e77b5f1 gas/testsuite/gas/sh/pcrel-coff.s +7f46ac79bd9ca52a2105f00ffab0c4a1 gas/testsuite/gas/sh/pcrel-hms.d +1161c6b191d101ba7565ec2de44d7856 gas/testsuite/gas/sh/pcrel.d +bcfb9e14ef9619580a5b5245103eb424 gas/testsuite/gas/sh/pcrel.l +823af07829673a6bdd394804057aa053 gas/testsuite/gas/sh/pcrel.s +e9f94174ec8961010b05df00914d6846 gas/testsuite/gas/sh/pcrel2.d +8f223941cff6690661e5bdf8244c4698 gas/testsuite/gas/sh/pcrel2.s +aa856567dcbacd54c74725b54745760d gas/testsuite/gas/sh/pic.d +22eafa66b3775951b6e619a3e2e5c0e0 gas/testsuite/gas/sh/pic.s +bf92958f1e9c80b352a33f8c09edb46a gas/testsuite/gas/sh/reg-prefix.d +5188e7fe2ea21d2ddb6b7c16949ca6e0 gas/testsuite/gas/sh/reg-prefix.s +8f268462c23e1ff53e57ff0cf5782a49 gas/testsuite/gas/sh/renesas-1.d +136ece0d6cadeaeef5d23bc103357880 gas/testsuite/gas/sh/renesas-1.s +dfdcb4d6177fdba54fa0b33d2cf0d55e gas/testsuite/gas/sh/sh2a-pic.d +6ae8401f913088baefba363e4938f8e3 gas/testsuite/gas/sh/sh2a-pic.s +f0665e0d668ec16d2fb188dfad1d3454 gas/testsuite/gas/sh/sh2a.d +0906d437e44d69cbce59163bac3d6431 gas/testsuite/gas/sh/sh2a.s +f4c2ad14cd9d20c194b57df39f544a9d gas/testsuite/gas/sh/sh4a-dsp.d +676ee564dee670f1ca81c2c18d3475a0 gas/testsuite/gas/sh/sh4a-dsp.s +fb4380450ed880975ee81e7ae9bdea17 gas/testsuite/gas/sh/sh4a-fp.d +db8b098c222e3c21f69d415642a75b3e gas/testsuite/gas/sh/sh4a-fp.s +d7ca60046a60171eeea814558a0561a8 gas/testsuite/gas/sh/sh4a.d +deb4a9d8191424a3b2c1ab3bf2ec6dd2 gas/testsuite/gas/sh/sh4a.s +9798df68f545e2f72e6cbbcdea0edd6f gas/testsuite/gas/sh/sh4al-dsp.d +487eb47915254c0f5d9a9eed6ea79d3c gas/testsuite/gas/sh/sh4al-dsp.s +44470af9404b0991f0a8de53aaeb5961 gas/testsuite/gas/sh/sh64/abi-32.d +0749692ff0242f9f07bb4fedb31c8733 gas/testsuite/gas/sh/sh64/abi-32.s +3eb436b712f4fa178b0dd638bc6c1744 gas/testsuite/gas/sh/sh64/abi-64.d +06245a59e3a5b739e18ecbb319af197f gas/testsuite/gas/sh/sh64/abi-64.s +6aa899f57c5766b03146255ef6239d48 gas/testsuite/gas/sh/sh64/basic-1.d +1e6f51fad3cd1b1d5ab2c45eea796556 gas/testsuite/gas/sh/sh64/basic-1.s +c1f445c9c11eb4488bc89f51fe050f0e gas/testsuite/gas/sh/sh64/case-1.d +2b296b90afe0943f8333698c664fcf49 gas/testsuite/gas/sh/sh64/case-1.s +0235887659edff3be08bb5d027ddeafa gas/testsuite/gas/sh/sh64/case-noexp-1.d +b81ca12af382f0818d84ddbc86fc4c40 gas/testsuite/gas/sh/sh64/crange1-1.d +8b7d4def4f8a0794ea8afafc05807b08 gas/testsuite/gas/sh/sh64/crange1-2.d +d0c5cb7872cd00006024e62ef6167c91 gas/testsuite/gas/sh/sh64/crange1.s +2bedb9bdf5f758f990b1510797e5d8ea gas/testsuite/gas/sh/sh64/crange2-1.d +2330c6f137034bb0654cd57edab0fe66 gas/testsuite/gas/sh/sh64/crange2-2.d +760d6157b530940b62c20ddcf087fc10 gas/testsuite/gas/sh/sh64/crange2-noexp-1.d +74b54c2a8026893d9b508971db63013d gas/testsuite/gas/sh/sh64/crange2.s +ab06bd154d96e763a48d1017a0a24b2f gas/testsuite/gas/sh/sh64/crange3-1.d +dddce6ad991b22d2a332fde254163f0f gas/testsuite/gas/sh/sh64/crange3.s +618bdbf3046c133bdb19d489b1fbd20d gas/testsuite/gas/sh/sh64/crange4-1.d +c7a9cf3f74ff694be740e78caef2ac27 gas/testsuite/gas/sh/sh64/crange4.s +eebbf27928bc7a11690f561255962650 gas/testsuite/gas/sh/sh64/crange5-1.d +0364881d49d33cbe2fe09bc51a8d6c96 gas/testsuite/gas/sh/sh64/crange5.s +edcb28050f43b6494d13e9c69b9dac5e gas/testsuite/gas/sh/sh64/creg-1.d +322b2608922b8e4aa4a24dcb41bce231 gas/testsuite/gas/sh/sh64/creg-1.s +21efc2fb414915b801d5726c6466ac26 gas/testsuite/gas/sh/sh64/creg-2.d +e43ba692ffe7c41968b358f642fbe269 gas/testsuite/gas/sh/sh64/creg-2.s +841d2514094c765db5d9e6d7dba608f7 gas/testsuite/gas/sh/sh64/datal-1.s +9052931d984dcc499b11d89706a8e954 gas/testsuite/gas/sh/sh64/datal-2.d +cb0045841d83f37f4eb400eedc84bd88 gas/testsuite/gas/sh/sh64/datal-2.s +8bcac43832f5c6bfeb52f53fb371c3a2 gas/testsuite/gas/sh/sh64/datal-3.s +9ee5c29701a8d086d1009ff641ca0ed6 gas/testsuite/gas/sh/sh64/datal32-1.d +19427ccccb932e285f3237284e2e0d8c gas/testsuite/gas/sh/sh64/datal32-3.d +e9690169872c2de7dcd749d8ab3f1b7d gas/testsuite/gas/sh/sh64/datal64-1.d +e2eacd79ed4a1860c3796eb83d0beda2 gas/testsuite/gas/sh/sh64/datal64-3.d +e79cf2cd84e64f89bdf83480399ee871 gas/testsuite/gas/sh/sh64/eh-1.d +1073be6cfae9cdafff43809c055de36c gas/testsuite/gas/sh/sh64/eh-1.s +8c114620f0ef14cf3de9fdbe132b6121 gas/testsuite/gas/sh/sh64/endian-1.d +5e4c7d2bf96d59c028edefdbafb057a8 gas/testsuite/gas/sh/sh64/endian-1.s +4344249ac44ce11b32909e0627ff3f8a gas/testsuite/gas/sh/sh64/endian-2.d +5e4c7d2bf96d59c028edefdbafb057a8 gas/testsuite/gas/sh/sh64/endian-2.s +5f1257702ef4f1cf2aa7b45773be88b5 gas/testsuite/gas/sh/sh64/err-1.s +9aae56187a70428a96c3f8b63f0b298e gas/testsuite/gas/sh/sh64/err-2.s +65d1645ea1b20153be5b8f7835b6a8a1 gas/testsuite/gas/sh/sh64/err-3.s +1b65e948107dc0338e992bd9514546e6 gas/testsuite/gas/sh/sh64/err-4.s +71c4c7e159664025065628ccf021f714 gas/testsuite/gas/sh/sh64/err-abi-32.s +2b150650d4db3e862adc6a56be595791 gas/testsuite/gas/sh/sh64/err-abi-64.s +8abc3ab97b785a7ebfd4275a97b348ca gas/testsuite/gas/sh/sh64/err-dsp.s +08dc6b9013499ecd50a548efb48466fc gas/testsuite/gas/sh/sh64/err-movi-noexp-1.s +8f8f3efdf43bf2d38efd13d8553ecfbc gas/testsuite/gas/sh/sh64/err-noexp-cmd1.s +74d8b483a9ca10e22a81becf75f93688 gas/testsuite/gas/sh/sh64/err-pt-1.s +d8d83758870e2005c9ee8016fc5fd919 gas/testsuite/gas/sh/sh64/err-pt32-cmd1.s +394ffd725133deb9202ca31ee4b1affd gas/testsuite/gas/sh/sh64/err-pt32-cmd2.s +ce241d95818d7925a626fd2bb67af1b0 gas/testsuite/gas/sh/sh64/err-pt32-cmd3.s +fe313ea51eecd9687f6c9b1ea1ad437d gas/testsuite/gas/sh/sh64/err-ptb-1.s +53467e7f7bd3ee54d509f1abf897bb7b gas/testsuite/gas/sh/sh64/err-ptb-2.s +652957f30edf944c4fa37ec078dee284 gas/testsuite/gas/sh/sh64/err.exp +a302ce857f60bb21d3b5ab167c701392 gas/testsuite/gas/sh/sh64/immexpr1.s +1e551fd277888b925aa72edcc9b47245 gas/testsuite/gas/sh/sh64/immexpr2.s +c778a3f14d70c99360fd986af0cb6328 gas/testsuite/gas/sh/sh64/immexpr32-1.d +33114323bf4032165ef36d2d065df31d gas/testsuite/gas/sh/sh64/immexpr32-2.d +014665cdf46430e77619b873139aaeb0 gas/testsuite/gas/sh/sh64/immexpr64-1.d +49306968516a75177497a629cf099124 gas/testsuite/gas/sh/sh64/immexpr64-2.d +5336236826c97b8654780279b7c822c7 gas/testsuite/gas/sh/sh64/lineno.d +1906fe63cf773b8ac3eb075401c8b72a gas/testsuite/gas/sh/sh64/lineno.s +95cbdbb1e8917c7545652de0a3ec238f gas/testsuite/gas/sh/sh64/localcom-1.d +c70e2eb58f1fe991dd7d3908cbaa951d gas/testsuite/gas/sh/sh64/localcom-1.s +656cf6fdc90218a6795ca05018d54b7a gas/testsuite/gas/sh/sh64/mix-1.d +e50f90df0b060272483afbd16c103c5a gas/testsuite/gas/sh/sh64/mix-1.s +c1ce2a4b462e4d334b16320deba64423 gas/testsuite/gas/sh/sh64/mix-noexp-1.d +23823dcdcf05139e4d7252959e4fb5a9 gas/testsuite/gas/sh/sh64/movi-1.s +b80a38885a06fc68ff405564a6a9f570 gas/testsuite/gas/sh/sh64/movi-2.s +6f41450ee68e54256fa18e24b33d05ae gas/testsuite/gas/sh/sh64/movi-3.d +12ae1cdfb0bbdaaf3a126ee70fe789ab gas/testsuite/gas/sh/sh64/movi-3.s +e76eb1e8a1a9db6b1f7fd80febdd28b4 gas/testsuite/gas/sh/sh64/movi32-1.d +5047d114f091d4508aaf5e889100cd37 gas/testsuite/gas/sh/sh64/movi32-2.d +08fa128e90a5638d3165265047ba109a gas/testsuite/gas/sh/sh64/movi32-noexp-2.d +9dff88384cf4e1318198df8076e59801 gas/testsuite/gas/sh/sh64/movi64-1.d +716e0122742f29659bad2c2d9c95c4de gas/testsuite/gas/sh/sh64/movi64-2.d +b20bbf68d1532d1a7dceed831201b105 gas/testsuite/gas/sh/sh64/movi64-2.s +b5f8911ff2187db6f3487e67c6f46ec5 gas/testsuite/gas/sh/sh64/movi64-3.d +fd1344ac02580b0051598095547d35df gas/testsuite/gas/sh/sh64/movi64-noexp-2.d +b239a01074851fb2e4ff1114bc99f20c gas/testsuite/gas/sh/sh64/pt-1.d +977a0fa9b8369db70c3b38ac06f12780 gas/testsuite/gas/sh/sh64/pt-1.s +75eda68c6a7031aa1c65acd62c33c3ec gas/testsuite/gas/sh/sh64/pt-2.s +e8a236e070173d72dba8a9ff9e8ff1c4 gas/testsuite/gas/sh/sh64/pt-noexp-1.d +c9cc5ca087461fc49f082527050abe73 gas/testsuite/gas/sh/sh64/pt32-1.d +4e7e7e9fdcde076652de7863f805d749 gas/testsuite/gas/sh/sh64/pt32-noexp-2.d +4fd6da9845ac06905af82d15b4001bef gas/testsuite/gas/sh/sh64/pt64-1.d +0f8e3e9d84479a1d0f21710af01df50c gas/testsuite/gas/sh/sh64/pt64-32-1.d +c89849efcae55b728a13215ba3a74201 gas/testsuite/gas/sh/sh64/pt64-32-2.d +abdf3ef94d02116c3b7999acd6ec653c gas/testsuite/gas/sh/sh64/pt64-noexp-2.d +1a87cdae03956757559ed10057f2e640 gas/testsuite/gas/sh/sh64/ptc-1.s +487b2b8f76b946228dad904a1959c47f gas/testsuite/gas/sh/sh64/ptc32-1.d +9727dd27cc82ffc3eef1d1a6ac8a3a1e gas/testsuite/gas/sh/sh64/ptc32-noexp-1.d +3366054bae21b384dfd86d777627ad05 gas/testsuite/gas/sh/sh64/ptc64-1.d +841daec09a7f42a2e3a63931752c046b gas/testsuite/gas/sh/sh64/ptc64-32-1.d +ab2cea95b143e19a9c0e4ff3bd330316 gas/testsuite/gas/sh/sh64/ptc64-noexp-1.d +96cbd019d7ec79b3c16cda800f382b89 gas/testsuite/gas/sh/sh64/ptext-1.s +eb804d1481a46c64b61804d9c8e4f209 gas/testsuite/gas/sh/sh64/ptext32-1.d +e57efa406ea16084d014e1c26afa9d36 gas/testsuite/gas/sh/sh64/ptext32-noexp-1.d +cac5ed29c9ac5a6a0a61b7dfc7689d71 gas/testsuite/gas/sh/sh64/ptext64-1.d +5fc5a89754ea5477a34cef60004ee32a gas/testsuite/gas/sh/sh64/ptext64-32-1.d +11101bcf2008ecaec3be09cae2f8a4cc gas/testsuite/gas/sh/sh64/ptext64-noexp-1.d +4f4382a6dfe422af2b72650213c5a60e gas/testsuite/gas/sh/sh64/rel-1.s +8abb4dfaebbb20b16c4b2883b5ab7dd0 gas/testsuite/gas/sh/sh64/rel-2.s +57efdd6672d3ea92ea66001b514338df gas/testsuite/gas/sh/sh64/rel-3.s +2e0d9b5d634a0eabdcd0b15a8974c0f0 gas/testsuite/gas/sh/sh64/rel-4.s +c05e67e392648f4cb7b8f9eade0b7e3d gas/testsuite/gas/sh/sh64/rel-5.s +4228e9087a58f128e96836eeff0668f3 gas/testsuite/gas/sh/sh64/rel32-1.d +4bb108397bc9fb4eea10c4a38c448eac gas/testsuite/gas/sh/sh64/rel32-2.d +d70065fcafbe4927e41a5b4a48f8c058 gas/testsuite/gas/sh/sh64/rel32-3.d +14a03f44258d33c2a4128c092157650d gas/testsuite/gas/sh/sh64/rel32-4.d +bb0b20da50325efadd908400439ff59b gas/testsuite/gas/sh/sh64/rel32-5.d +ba7e5d433860b10e57d491ffa1e3ac03 gas/testsuite/gas/sh/sh64/rel64-1.d +abb7346f1a3066cfc0a2db0c26283ecd gas/testsuite/gas/sh/sh64/rel64-2.d +3fe577d87923cb4195c1579430b8b6c6 gas/testsuite/gas/sh/sh64/rel64-3.d +fd2c887a32ccb111e7311a9861d43e10 gas/testsuite/gas/sh/sh64/rel64-4.d +95340ee9c1127c68385d432dbd3cae3b gas/testsuite/gas/sh/sh64/rel64-5.d +740521b18881de028fee6b20f7ccd04b gas/testsuite/gas/sh/sh64/relax-1.d +839efefe10184f6e37271a4994b1b941 gas/testsuite/gas/sh/sh64/relax-1.s +51da503e7bf63bc0bd9c8a4d7303405c gas/testsuite/gas/sh/sh64/relax-2.d +ee117757e571098c2541629a6137fd5a gas/testsuite/gas/sh/sh64/relax-2.s +91af884eb0b22a4650ec8d6f8b510931 gas/testsuite/gas/sh/sh64/relax-3.d +3ee39c26dd95bfe4989cc95050a00c9c gas/testsuite/gas/sh/sh64/relax-3.s +fd4e253acf6902089f7a2387d50ca4e3 gas/testsuite/gas/sh/sh64/sh64.exp +29020352f23aeea0372f8703f586d6d1 gas/testsuite/gas/sh/sh64/shift-1.s +1faf64608ba2f0f11fbd637c7a656434 gas/testsuite/gas/sh/sh64/shift-2.s +54edab02d0536f97c10efa96cc9450da gas/testsuite/gas/sh/sh64/shift-3.s +6e742f214357147914baae64b4922857 gas/testsuite/gas/sh/sh64/shift32-1.d +b4a03634321906a242a3b4631f6f67fd gas/testsuite/gas/sh/sh64/shift32-3.d +7f046c3dabb15b56c116801e9aa80a81 gas/testsuite/gas/sh/sh64/shift32-noexp-3.d +bfa64daf3064cdd58c52e2889935c4e7 gas/testsuite/gas/sh/sh64/shift64-1.d +2c1e84f74b7a62d407c1d3cf67c37777 gas/testsuite/gas/sh/sh64/shift64-2.d +d09a37937d32f557434bdf59087e2209 gas/testsuite/gas/sh/sh64/shift64-3.d +fc0d9fcb04df441c84d2ddb4381a1193 gas/testsuite/gas/sh/sh64/shift64-noexp-3.d +a3d2bc97437c69b7d539eb7048f861d1 gas/testsuite/gas/sh/sh64/syntax-1.d +3ff1ccb03a52bb73654895d9c1dd091c gas/testsuite/gas/sh/sh64/syntax-1.s +55c187e1043e792fb85ad05e1f2cd446 gas/testsuite/gas/sh/sh64/syntax-2.d +386f5facef43a6f08df831f880a377ba gas/testsuite/gas/sh/sh64/syntax-2.s +f34ab08c5b50ac4e4f124b5ecba5ab19 gas/testsuite/gas/sh/sh64/ua-1.s +bea89df02c11369585780e6764904b5b gas/testsuite/gas/sh/sh64/ua32-1.d +99e5ceaf74ff9bfe84f74d42ecb6ac04 gas/testsuite/gas/sh/sh64/ua64-1.d +184df89aa90dea6bd7b312ab1f7178fe gas/testsuite/gas/sh/sign-extension.d +f84dabd7fffc2ac91ab7ef40494d1348 gas/testsuite/gas/sh/sign-extension.s +17982698d458ba03872085040ba1a817 gas/testsuite/gas/sh/tlsd.d +1a5dbdc955c0f79813f64148ddcd8353 gas/testsuite/gas/sh/tlsd.s +805b98d070093e9a4b8b5d92f396cc22 gas/testsuite/gas/sh/tlsnopic.d +0c7a54cecb95b9959ececc358af7d5db gas/testsuite/gas/sh/tlsnopic.s +49f0c3f99f207b7cab4a5e3554774b8e gas/testsuite/gas/sh/tlspic.d +ccef24743254119bfb0a1c84283253a9 gas/testsuite/gas/sh/tlspic.s +b22d0748affc550308490e73c740db0f gas/testsuite/gas/sh/too_large.d +314ff5a57af40c641f3b7a2ceb003074 gas/testsuite/gas/sh/too_large.s +392efaa6637a8734d3ab35e579615a53 gas/testsuite/gas/sparc/asi.d +8f35c68aef641d7cc35698d67a32557e gas/testsuite/gas/sparc/asi.s +ef3fe6155d6cd4134bc1b70632ba3312 gas/testsuite/gas/sparc/gotop32.d +5d533036b1e4c0a34a86f3595294aca5 gas/testsuite/gas/sparc/gotop32.s +80c7f659aa406ac9b5fda38c766b7827 gas/testsuite/gas/sparc/gotop64.d +4633f014f6e73296c124390a4c0c84fc gas/testsuite/gas/sparc/gotop64.s +b016659d4ba6d4c4f31841b8c46fd680 gas/testsuite/gas/sparc/hpcvis3.d +5ecb9537aba3f95a8c5513a2891fd5ee gas/testsuite/gas/sparc/hpcvis3.s +eb20cec37ba75b64cfb66ba2ef4c7248 gas/testsuite/gas/sparc/imm-plus-rreg.d +baf0d8acc429d839d582782ba995fb86 gas/testsuite/gas/sparc/imm-plus-rreg.s +4b815d3da1c2d2bceeb98994c659c492 gas/testsuite/gas/sparc/membar.d +521b5671f3aa6bae70f78b5f3d37de1a gas/testsuite/gas/sparc/membar.s +12b5e618325d4a4bc80cb8766bbfc064 gas/testsuite/gas/sparc/mism-1.s +706c79f848f389921b20f0f64dde1ecd gas/testsuite/gas/sparc/mismatch.exp +3d4fc17a8ac5ea6103ec7b199573aca6 gas/testsuite/gas/sparc/pc2210.d +a9d9b9652c9c9d90702f7be6097672a1 gas/testsuite/gas/sparc/pc2210.s +44169c5563a88510bc703438a7eae8f4 gas/testsuite/gas/sparc/pcrel.d +6065405af8fda4de18e07e1863d3e6dc gas/testsuite/gas/sparc/pcrel.s +b1342d8f5d0190f0c50f2e9321f4e58e gas/testsuite/gas/sparc/pcrel64.d +8c92147ad9a6ef778b5ccbf101ae253e gas/testsuite/gas/sparc/pcrel64.s +22d75f06f968a1d689517b3271434c7c gas/testsuite/gas/sparc/plt.d +830651a18c39323a5169f284cecfc66a gas/testsuite/gas/sparc/plt.s +8c5e60de8c40ab24b01121661c24beac gas/testsuite/gas/sparc/plt64.d +02b176ee41fceeab10ef800c7c2a8c7e gas/testsuite/gas/sparc/plt64.s +353df91c8b350e8582ada2d2e2c816e2 gas/testsuite/gas/sparc/pr4587.l +014d3e1694269604d495f7333dee9e0e gas/testsuite/gas/sparc/pr4587.s +d85c226fa388a66bd2689ba3efedf5e4 gas/testsuite/gas/sparc/prefetch.d +0b615422f6c8ad3fe5c42f2a8c7af1e4 gas/testsuite/gas/sparc/prefetch.s +3f120e259bb733ce1ef75f0a68342cc0 gas/testsuite/gas/sparc/rdhpr.d +2f411297453660c0100a244389bf7798 gas/testsuite/gas/sparc/rdhpr.s +d77dc9121f8c4bca412d9a7f3ed35361 gas/testsuite/gas/sparc/rdpr.d +3b1796f1e8b5020c05aa9f29aeba3967 gas/testsuite/gas/sparc/rdpr.s +78517d2fce6c7707fd2f09689ebc3d72 gas/testsuite/gas/sparc/reloc64.d +7d56aec0e050e09c004a33abd25a9293 gas/testsuite/gas/sparc/reloc64.s +8ba4542c7545b40e466048feedaf6a62 gas/testsuite/gas/sparc/save-args.d +cb23fd033ae0f3402a115de7507758ca gas/testsuite/gas/sparc/save-args.s +08afa18cf165a3043a6b92153526c876 gas/testsuite/gas/sparc/set64.d +1facb5655fe83c44ac900776c563e717 gas/testsuite/gas/sparc/set64.s +115f1e093e29655563d1f9fda905cd27 gas/testsuite/gas/sparc/sparc.exp +3564e46bcf53613a512e32f2633c3d05 gas/testsuite/gas/sparc/splet-2.d +69817b445f39a0e3cf591de872fa74e5 gas/testsuite/gas/sparc/splet-2.s +5fa3fb7a059f3fd315df0af21e0c9619 gas/testsuite/gas/sparc/splet.d +6236b0423a317e0a2340bdb317c54d1e gas/testsuite/gas/sparc/splet.s +a6b1a41bb26dc70e130bc42ef7133cc7 gas/testsuite/gas/sparc/synth.d +0e0dead95b89c31c1ed49b21c430bc1a gas/testsuite/gas/sparc/synth.s +b041cafa83c1f1f131ca949780217e54 gas/testsuite/gas/sparc/synth64.d +0303005116e0116e28f1dd473ca39f28 gas/testsuite/gas/sparc/synth64.s +5bce6170ac4dfffcad902214096c98ab gas/testsuite/gas/sparc/ticc-imm-reg.d +2dd64c66c5621c4848bc214ddf855e05 gas/testsuite/gas/sparc/ticc-imm-reg.s +d9387e1243975789897f80338801920f gas/testsuite/gas/sparc/unalign.d +4f0d12b16f8afe39a387c14fd41d4382 gas/testsuite/gas/sparc/unalign.s +e35e63553e1c720e4d7c4563d2f38a05 gas/testsuite/gas/sparc/v8-movwr-imm.d +eb879ffcaa07471db4ecd7754ff059c7 gas/testsuite/gas/sparc/v8-movwr-imm.s +bfd9b03ccd61839b71e47459eb40cbe0 gas/testsuite/gas/sparc/v9branch1.d +096c1cdf2aeeaa59bfcb5df0e6036889 gas/testsuite/gas/sparc/v9branch1.s +66779138a109c8fbbdd70da3f137c15d gas/testsuite/gas/sparc/v9branch2.d +fe8f31f9d59c9508c0a5b8318b3e47f1 gas/testsuite/gas/sparc/v9branch2.s +3e49e6c4b27c8e16bcd4fd910abba527 gas/testsuite/gas/sparc/v9branch3.d +4fe9de8c112ff4fea5a6570502ac4b6d gas/testsuite/gas/sparc/v9branch3.s +825979884774a5fad2259b6c7d1f11f0 gas/testsuite/gas/sparc/v9branch4.d +ff8d44d6fdff4d2ca0508c3b281373eb gas/testsuite/gas/sparc/v9branch4.s +573b3edad98d877cbcd9aa7a7ff0c744 gas/testsuite/gas/sparc/v9branch5.d +ef34f726612640b58a20eacaea77c88e gas/testsuite/gas/sparc/v9branch5.s +31b399c66449684fd71cf29e4947afe2 gas/testsuite/gas/sparc/vxworks-pic.d +a3f26463209f0178d369c6a83b31f1cb gas/testsuite/gas/sparc/vxworks-pic.s +7ce6d9aeae268f49a69d0988ace42ee6 gas/testsuite/gas/sparc/window.d +156e5bb3b40ebb2c46988c64270e5137 gas/testsuite/gas/sparc/window.s +9128a03ea2a83074a28f191ca90e896b gas/testsuite/gas/sparc/wrhpr.d +7b8495e86ce639aa561385f702e67e4f gas/testsuite/gas/sparc/wrhpr.s +8c901935caf906883529422755d1a4bf gas/testsuite/gas/sparc/wrpr.d +ad65b667840b0c204c3c8379a0b38b8c gas/testsuite/gas/sparc/wrpr.s +f65f40edb42735b8af3a4baaacd662f5 gas/testsuite/gas/sparc-solaris/addend.exp +7dd4467acc1dda3c1753ebcbfeeead33 gas/testsuite/gas/sparc-solaris/addend.s +dd2ab79e6bd90288569274206313966b gas/testsuite/gas/sparc-solaris/gas.exp +b2d813e248b8ec085ca8d551271274bf gas/testsuite/gas/sparc-solaris/sol-cc.s +2e927e8072e145441bb882a01e3ac8cd gas/testsuite/gas/sparc-solaris/sol-gcc.s +54a6b727f437bf7989e266329d0dd875 gas/testsuite/gas/sun4/addend.d +b648f70387617b14507805caeea0b6d6 gas/testsuite/gas/sun4/addend.exp +7dd4467acc1dda3c1753ebcbfeeead33 gas/testsuite/gas/sun4/addend.s +3453866e3d5ff2c0b47520e5c1bfe756 gas/testsuite/gas/symver/symver.exp +85f57708f7d8db6957900a6fb76ab4fb gas/testsuite/gas/symver/symver0.d +7f2d42503901978e4eb5bab37fd01df2 gas/testsuite/gas/symver/symver0.s +9107b44387b3b0e9184504449d6e4d84 gas/testsuite/gas/symver/symver1.d +1d6eb4d5a6cbf6ac541ca7d4c561b74f gas/testsuite/gas/symver/symver1.s +719196efd607fc7ec9ba9c876bf2f00d gas/testsuite/gas/symver/symver2.l +7214f11688ed0284f53c3c060fa973bf gas/testsuite/gas/symver/symver2.s +d37568e052e76a50c9d4775eede01585 gas/testsuite/gas/symver/symver3.l +7f58a39bd0e6eda06fa15260adaa1044 gas/testsuite/gas/symver/symver3.s +aaf2746f913c7c81f487786bd9b99543 gas/testsuite/gas/symver/symver4.l +ff40f84c77b398ca408422048eb1684e gas/testsuite/gas/symver/symver4.s +c2401f7310b24ae252e1905a90fbb133 gas/testsuite/gas/symver/symver5.l +ed56c563fc819e4c50c4160a17f8abae gas/testsuite/gas/symver/symver5.s +a3a92a55022c0edb85d34af1d1739ee8 gas/testsuite/gas/symver/symver6.l +73c983230d1435795774501e7247e78c gas/testsuite/gas/symver/symver6.s +218ceddbec7e4efdd63a6186a62fded9 gas/testsuite/gas/template +8ea79039a765caf02b0270c41d2aecea gas/testsuite/gas/tic4x/addressing.s +1d1cd32af19bf411056f0e5dc6793704 gas/testsuite/gas/tic4x/addressing_c3x.d +3a9747d4c737fcaa03d48bfb244c65d1 gas/testsuite/gas/tic4x/addressing_c4x.d +87791d8e703ba0e4a6f558667ae0b37b gas/testsuite/gas/tic4x/allopcodes.S +759572024f59fdd5f644cf67e6f534bb gas/testsuite/gas/tic4x/data.d +9d1169a0d03a6cf2c75cd4ee202a28d6 gas/testsuite/gas/tic4x/data.s +1eeee4f18eb831980279d37275498be8 gas/testsuite/gas/tic4x/float.d +7e1d0515d6c0d58e786c6eba115d7f18 gas/testsuite/gas/tic4x/float.s +edd930af223500ae3f3c8a6235859f7e gas/testsuite/gas/tic4x/opclasses.h +3f4860301a631779c7ce027dfe991eea gas/testsuite/gas/tic4x/opcodes.s +5dc32889ee5cceadaa36ed8edaa74110 gas/testsuite/gas/tic4x/opcodes_c3x.d +1897a6f02cf723ddd4767fd6d08f92dc gas/testsuite/gas/tic4x/opcodes_c4x.d +9143bb67c8b4f9c4981c736c09ad8d0e gas/testsuite/gas/tic4x/opcodes_new.d +925a40c20b5622660b057bbe1607939d gas/testsuite/gas/tic4x/rebuild.sh +749edd66d0478c88fb2fe6dbe1e43a6a gas/testsuite/gas/tic4x/registers.s +298a8cba1f2f8117ba5d67e272c9f965 gas/testsuite/gas/tic4x/registers_c3x.d +3bfcecd5b33adf2bd9b8d7def7786678 gas/testsuite/gas/tic4x/registers_c4x.d +bc620bbcb914996a6b20eb637ffcaa1d gas/testsuite/gas/tic4x/tic4x.exp +eefd3d89495af1e2d0bb45ba859d9481 gas/testsuite/gas/tic4x/zeros.d +95dc276c67e715e06ef1690e2cc33bec gas/testsuite/gas/tic4x/zeros.s +3445e4e0e63e380c58fa9a238a67aee5 gas/testsuite/gas/tic54x/address.d +78c05303f9f0cbc1a4610cafd8684961 gas/testsuite/gas/tic54x/address.s +1c273453dd66e3fe0b42ac96860cfe1c gas/testsuite/gas/tic54x/addrfar.d +04728b4642409775852f79c1d68c4f54 gas/testsuite/gas/tic54x/align.d +f705542096afe413c7ab6ffa17469af7 gas/testsuite/gas/tic54x/align.s +7d55407efacfaa48a63c6f33ce4096bf gas/testsuite/gas/tic54x/all-opcodes.d +16b138265d758ee38dbf89a41696f4b4 gas/testsuite/gas/tic54x/all-opcodes.s +fade7483f79e5beef3973e1dd59c5713 gas/testsuite/gas/tic54x/asg.d +64c9ec95e386f8e5d0040c26fee7321c gas/testsuite/gas/tic54x/asg.s +d7b5d8e349a3f2f2b36167d8aad33d40 gas/testsuite/gas/tic54x/cons.d +671f83be79acf4e42032f33d828864ac gas/testsuite/gas/tic54x/cons.s +720ded5513845bac8bffaba11faa1bda gas/testsuite/gas/tic54x/consfar.d +9d9a1c4f120f6ce8f3bd03ee0986c9c2 gas/testsuite/gas/tic54x/extaddr.d +1eff597d688aedce62a361714b4bb6aa gas/testsuite/gas/tic54x/extaddr.s +802b686cf4ec88db9eb851402427de50 gas/testsuite/gas/tic54x/field.d +534ff025c4a332a0b3a4811c889d9637 gas/testsuite/gas/tic54x/field.s +e8334221e9d81711a8120983fc654f4b gas/testsuite/gas/tic54x/in_mlib.asm +1af2989af2066c93fd7ebc8b607b8fd2 gas/testsuite/gas/tic54x/labels.d +aae9f04acb5f59969bf1f0465d7c78bd gas/testsuite/gas/tic54x/labels.inc +398343a46a08804051ef4cb0fcd926b1 gas/testsuite/gas/tic54x/labels.s +8734a1dfc7dd3bb849fe422776e761e2 gas/testsuite/gas/tic54x/loop.d +4a609e1f44de00f164f48203d5df870b gas/testsuite/gas/tic54x/loop.s +59a9b26dade4493634167731704fc899 gas/testsuite/gas/tic54x/lp.d +2c650e0c313376b80d7a6950039ff3b4 gas/testsuite/gas/tic54x/lp.s +816673a798bddfbface0f02c77beca0d gas/testsuite/gas/tic54x/macro.d +d76d2e7a0d946a16279b4eeafcfa0cc7 gas/testsuite/gas/tic54x/macro.s +09c277ba1f7d69551c473cd20cbb14bd gas/testsuite/gas/tic54x/macro1.s +ddbfc019917d779c19002992f3929367 gas/testsuite/gas/tic54x/macros.lib +0649dee6b4c28e25ae3db473f82bc0f2 gas/testsuite/gas/tic54x/math.d +1ff7d6cd1fb20b8cde42e82ea5e38dfa gas/testsuite/gas/tic54x/math.s +fb2be21a90949c70f748c2c937d6efa9 gas/testsuite/gas/tic54x/opcodes.d +03c7d9751c849b0f4a04ce24d181e494 gas/testsuite/gas/tic54x/opcodes.s +6680a6234b1ad893200ab5eb9360bc4d gas/testsuite/gas/tic54x/sections.d +fe46811cda30294230b15a91c5b47d07 gas/testsuite/gas/tic54x/sections.s +3a8e6d194159fe413ec370a0d8802c6f gas/testsuite/gas/tic54x/set.d +cdf1f13fafc4d4abd831567cdda40eff gas/testsuite/gas/tic54x/set.s +48c074b199687a4265e4bafcd7d35c9d gas/testsuite/gas/tic54x/struct.d +28bcc7e09d20e59e1ccb70e318f45324 gas/testsuite/gas/tic54x/struct.s +4563812083147c039c2b6048cdfe8b73 gas/testsuite/gas/tic54x/subsym.d +a6d4e40952285da31a31a7146766dc04 gas/testsuite/gas/tic54x/subsym.s +a3547e6b13dd61f04ad639ae18c38bb3 gas/testsuite/gas/tic54x/subsym1.s +b2df4dd8056e7236407bbc4c60b27b02 gas/testsuite/gas/tic54x/tic54x.exp +0292691d7ef542a74d2a551262b84974 gas/testsuite/gas/tic6x/align-1-be.d +314ab4f7826e2b1b4cd56d1f6ad60a0a gas/testsuite/gas/tic6x/align-1.d +e1678ba77aa41ef725bef04500901f57 gas/testsuite/gas/tic6x/align-1.s +b830b1544d7da3d16c21d0df428f2602 gas/testsuite/gas/tic6x/align-2.d +07e4448e8f279316c990d98671c88b5d gas/testsuite/gas/tic6x/align-2.s +f6979aac6dd228b4ac8a1bd63662f2bf gas/testsuite/gas/tic6x/arch-invalid-1.d +0f2b68b263d8e79b628903c269788099 gas/testsuite/gas/tic6x/arch-invalid-1.l +452d718dbef6464e6191eb06892962c1 gas/testsuite/gas/tic6x/arch-invalid-2.d +2566b7ba35e8d8294d37617ed6fe0833 gas/testsuite/gas/tic6x/arch-invalid-2.l +da531320ba80965ddd10e2106a5fb286 gas/testsuite/gas/tic6x/arch-invalid-2.s +20fddf24334ba240950cd76d0f712c7c gas/testsuite/gas/tic6x/attr-arch-directive-1.d +43aca16807762a815a07fedcba994d19 gas/testsuite/gas/tic6x/attr-arch-directive-1.s +5a7218a825f5aab2a5ce42669816fb0d gas/testsuite/gas/tic6x/attr-arch-directive-2.d +ae4ef03990822b8f56e27f2374e2ca1d gas/testsuite/gas/tic6x/attr-arch-directive-2.s +7f5f58d419517314fa89ea872db44769 gas/testsuite/gas/tic6x/attr-arch-directive-3.d +1bab1da2b97874f2baab1c1626f40a28 gas/testsuite/gas/tic6x/attr-arch-directive-3.s +c8865c853bc62a8707cc34b50f23ef46 gas/testsuite/gas/tic6x/attr-arch-directive-4.d +5eb713d19630d7601ce377575f99a766 gas/testsuite/gas/tic6x/attr-arch-directive-4.s +80599d828502a8e988bef81205eb299d gas/testsuite/gas/tic6x/attr-arch-directive-5.d +4ad91d0e9b23d9ddf8ad4e8c9a57e908 gas/testsuite/gas/tic6x/attr-arch-directive-5.s +56a2eec68fa61fa7fa42673aec41e2db gas/testsuite/gas/tic6x/attr-arch-opts-c62x.d +dee3dce64c246b022086b6c7add381ec gas/testsuite/gas/tic6x/attr-arch-opts-c64x+.d +3bd9b6ed4d8653ff669f06fbd5e2e490 gas/testsuite/gas/tic6x/attr-arch-opts-c64x.d +1b3e69b1f9e5dce56882e55436e0f3d8 gas/testsuite/gas/tic6x/attr-arch-opts-c674x.d +163cb9553f068b014ca2d521c5e534bf gas/testsuite/gas/tic6x/attr-arch-opts-c67x+.d +c759dfb7a3f7fa5685a8c86a4f53e8e8 gas/testsuite/gas/tic6x/attr-arch-opts-c67x.d +d4e4241ef156b64966ab65ac1c460378 gas/testsuite/gas/tic6x/attr-arch-opts-none-1.d +ac66c3f7977b2e4103b2f9980da4eb13 gas/testsuite/gas/tic6x/attr-arch-opts-none-2.d +3733df8484393aaa4d319d44c59d398c gas/testsuite/gas/tic6x/attr-arch-opts-override-1.d +a19ca6bb8768df1addd2d37680c2701c gas/testsuite/gas/tic6x/attr-arch-opts-override-2.d +1c29bc10eacc8c10f1ddb82331e5b439 gas/testsuite/gas/tic6x/attr-array-directive-1.d +f0dba8bccb09da415b94992e06e7a47b gas/testsuite/gas/tic6x/attr-array-directive-1.s +9a8df67f82c662c19995a762e603321b gas/testsuite/gas/tic6x/attr-array-directive-2.d +080f97096e28a9f53d92a8843d5791aa gas/testsuite/gas/tic6x/attr-array-directive-2.s +2351b5e02a4c1f13a438b69b68424549 gas/testsuite/gas/tic6x/attr-array-directive-3.d +2c802bb2185db576f2be694c37e499c1 gas/testsuite/gas/tic6x/attr-array-directive-3.s +310fc5993638cad29117cf39d51f0df5 gas/testsuite/gas/tic6x/attr-array-directive-4.d +ebc4b14180dde8322060c1244d3c1c3e gas/testsuite/gas/tic6x/attr-array-directive-4.s +d30fb58251e5d7739115b085a3d75844 gas/testsuite/gas/tic6x/attr-compatibility-directive-1.d +e886896ee5d42dc31876cf12dc9d1778 gas/testsuite/gas/tic6x/attr-compatibility-directive-1.s +6b99bbe72ede1c6dfe593a5884bc8fe8 gas/testsuite/gas/tic6x/attr-compatibility-directive-2.d +ad27bb702cd8f6c4b104296f586f9ecc gas/testsuite/gas/tic6x/attr-compatibility-directive-2.s +f7cd95e99308c8fa460e51350747b2ab gas/testsuite/gas/tic6x/attr-conformance-directive-1.d +786f3635b154df9fe6c29bab350fd463 gas/testsuite/gas/tic6x/attr-conformance-directive-1.s +d22e95764d190c4e07a30ff0d932669a gas/testsuite/gas/tic6x/attr-conformance-directive-2.d +b1680f78350f20794eb9f9541aa51b35 gas/testsuite/gas/tic6x/attr-conformance-directive-2.s +bdef20c6246f3fbdcd6690a83a5df983 gas/testsuite/gas/tic6x/attr-dsbt-directive-1.d +0fe070a48c2c9bf2fac7196d52429a66 gas/testsuite/gas/tic6x/attr-dsbt-directive-1.s +bdef20c6246f3fbdcd6690a83a5df983 gas/testsuite/gas/tic6x/attr-dsbt-directive-2.d +2b17ebffb20409aecabde431c3c9e421 gas/testsuite/gas/tic6x/attr-dsbt-directive-2.s +a3fa82ff1a51e048e375ac6b09de7aba gas/testsuite/gas/tic6x/attr-dsbt-opts-mdsbt.d +d5665f6a524c2ee75129d009fd8e2972 gas/testsuite/gas/tic6x/attr-dsbt-opts-mno-dsbt.d +4ada588fa359b7cff746e20182329713 gas/testsuite/gas/tic6x/attr-pic-directive-1.d +5d079c56a0ee00da96bf9adad4fb16b7 gas/testsuite/gas/tic6x/attr-pic-directive-1.s +9270470e6d0eb89e68f54a9782755f4d gas/testsuite/gas/tic6x/attr-pic-directive-2.d +6e9d8a9b241c7184b807b840650d0466 gas/testsuite/gas/tic6x/attr-pic-directive-2.s +b25801987b41d9518083b238ad7e6fd0 gas/testsuite/gas/tic6x/attr-pic-opts-mno-pic.d +a3be0fcc77f4854e562db86a0483c0c1 gas/testsuite/gas/tic6x/attr-pic-opts-mpic.d +2f585e5b5e480285bca1e4cd944a90a6 gas/testsuite/gas/tic6x/attr-pid-directive-1.d +c2ad71377c6220dbae8be6cc4eacfdaf gas/testsuite/gas/tic6x/attr-pid-directive-1.s +a71701b4e667d244494733acac80fb92 gas/testsuite/gas/tic6x/attr-pid-directive-2.d +ecaa62bb2c3e34c1c187a59ba8a1e452 gas/testsuite/gas/tic6x/attr-pid-directive-2.s +11f3a10ccbfd254d8d0dc595f1a9aac7 gas/testsuite/gas/tic6x/attr-pid-opts-mpid-far.d +dc3b7b460615e562f02dcc460fc56d05 gas/testsuite/gas/tic6x/attr-pid-opts-mpid-near.d +68958d93c98213ba914771927c60efc7 gas/testsuite/gas/tic6x/attr-pid-opts-mpid-no.d +ea849d8ff266b8adbb9caf2a82a32931 gas/testsuite/gas/tic6x/attr-stack-directive-1.d +27a7b1ccb09fb00e3d53c4d5c9de9c4e gas/testsuite/gas/tic6x/attr-stack-directive-1.s +f4bd95ee7b9a368df91e877d0989d188 gas/testsuite/gas/tic6x/attr-stack-directive-2.d +6cd602df51d60bf4569cd9e9956d810f gas/testsuite/gas/tic6x/attr-stack-directive-2.s +76844e58a66dae09a3976bcc562e1ed9 gas/testsuite/gas/tic6x/attr-wchar-directive-1.d +f4d640b4b71b7f6f09646f92e39c5eba gas/testsuite/gas/tic6x/attr-wchar-directive-1.s +a29cc1380e1b855fad6079a461f01312 gas/testsuite/gas/tic6x/attr-wchar-directive-2.d +aa079f042cbb63c970da97194d81bc5e gas/testsuite/gas/tic6x/attr-wchar-directive-2.s +1720cc96b91b1e8b80471a1cf755dec1 gas/testsuite/gas/tic6x/data-reloc.d +0e8fc10d4de5d1f2d9a3e1d8379ac44d gas/testsuite/gas/tic6x/data-reloc.s +90a95ea3d2fa2ccc2cfefbbd78aa78c2 gas/testsuite/gas/tic6x/dir-junk.d +a42e9541540ca650f814df716ca8924a gas/testsuite/gas/tic6x/dir-junk.l +37a0d6199b4eee9314d83459337152b4 gas/testsuite/gas/tic6x/dir-junk.s +62b3eedee55ca149b115e7fd92ddce54 gas/testsuite/gas/tic6x/dummy.s +307a9041af515f39eb2213be1d49c4a0 gas/testsuite/gas/tic6x/empty.s +5a56af2d02f2f2ccaf0fb65567120165 gas/testsuite/gas/tic6x/endian-1.d +dd5451103f901909b04672109f64767f gas/testsuite/gas/tic6x/endian-2.d +5d859821871298e682cc9bf9acc22c6c gas/testsuite/gas/tic6x/endian-3.d +a6a9f82e951ca61a4ebd8b7455c387a9 gas/testsuite/gas/tic6x/got-reloc.d +8248d8e0809a86aa4471b561448d75b2 gas/testsuite/gas/tic6x/got-reloc.s +a38f9b25ead59a336717d9302e831eaa gas/testsuite/gas/tic6x/insns-atomic.d +dbef2d1637ad40cf1f9ce546861f0c5b gas/testsuite/gas/tic6x/insns-atomic.s +c2447fff290d2bdc8fdf9637e6cbe07e gas/testsuite/gas/tic6x/insns-bad-1.d +f2b8be95bf18b62391b23f49fc86b7ba gas/testsuite/gas/tic6x/insns-bad-1.l +86e1db7b882a49c3629f650d2becaca3 gas/testsuite/gas/tic6x/insns-bad-1.s +173d499230b240e5527a0c17914bbad6 gas/testsuite/gas/tic6x/insns-bad-2.d +87f671addae18926aa640abce60ffaf3 gas/testsuite/gas/tic6x/insns-bad-2.l +a40fd236a95340d2dfa534a86b6e369a gas/testsuite/gas/tic6x/insns-bad-2.s +f78b9e4f68c8215a7488f5ee30931781 gas/testsuite/gas/tic6x/insns-c674x-pcrel.d +a557e1c7cb560f21c16e399772dae3ba gas/testsuite/gas/tic6x/insns-c674x-pcrel.s +7e04b71a0f2d922ed5b571b19711146e gas/testsuite/gas/tic6x/insns-c674x-reloc.d +348f97e32f4441c73c72e9112f0b52f8 gas/testsuite/gas/tic6x/insns-c674x-reloc.s +661acb955ac7369905391334fd33abe7 gas/testsuite/gas/tic6x/insns-c674x-sploop.d +3805027efd5ca5d8c0187e065dad0a0a gas/testsuite/gas/tic6x/insns-c674x-sploop.s +b49da0d78c8900e4c02c2a7961dc4c18 gas/testsuite/gas/tic6x/insns-c674x.d +92a255490de4241753bc11152b831e31 gas/testsuite/gas/tic6x/insns-c674x.s +7d7f7de4b59638a56e8b196b42be479e gas/testsuite/gas/tic6x/insns-parallel-be.d +0ba16ba6bd3ee7790759af2b6afaeee6 gas/testsuite/gas/tic6x/insns-parallel-le.d +e51b5004cb21d29d610392037e0d8e88 gas/testsuite/gas/tic6x/insns-parallel-multi.d +c722408d039a0eb6d616c6b1ecb98fcd gas/testsuite/gas/tic6x/insns-parallel-multi.s +459ad66f53e9cc5c8e5a5c6a6fd1e6f7 gas/testsuite/gas/tic6x/insns-parallel.s +f5267472ca3a19c098ee201ff786ce61 gas/testsuite/gas/tic6x/insns-predicate.d +a70f660f28fa4488a39e43503d4f6ee0 gas/testsuite/gas/tic6x/insns-predicate.s +f5a3a284999c79808681b012508d84ca gas/testsuite/gas/tic6x/parallel-bad-1.d +d809a198cfdf69218576cc69577bc652 gas/testsuite/gas/tic6x/parallel-bad-1.l +f36413f9e5ec3461f551fcaa51686887 gas/testsuite/gas/tic6x/parallel-bad-1.s +df65ded8be67b1c50e781d11ab4fd0bd gas/testsuite/gas/tic6x/parallel-bad-2.d +74ab5f162a462fb31f06af5f269322ed gas/testsuite/gas/tic6x/parallel-bad-2.l +1d85516e09e5177b4a27aa3c2c8a650c gas/testsuite/gas/tic6x/parallel-bad-2.s +a60003f468f96155173d0038e096b0a4 gas/testsuite/gas/tic6x/parallel-bad-3.d +278faa1dc9675aa435650f2e54b1a53d gas/testsuite/gas/tic6x/parallel-bad-3.l +207a432af1d51fef4ed7510997d7a417 gas/testsuite/gas/tic6x/parallel-bad-3.s +bd8e7dfb3d414df29defc15bdad94e2b gas/testsuite/gas/tic6x/parallel-bad-4.d +6673ba5cef14483e723c006f4b58161a gas/testsuite/gas/tic6x/parallel-bad-4.l +b4116db61c069c104754eac5ef709cca gas/testsuite/gas/tic6x/parallel-bad-4.s +c7d737c37a1a0e0271b72bc0e3e2e925 gas/testsuite/gas/tic6x/pcr-relocs-undef.d +149af792629a558aa749ee68fdc1c866 gas/testsuite/gas/tic6x/pcr-relocs-undef.s +340b81e4c642f9902866420556fa8d3b gas/testsuite/gas/tic6x/pcr-relocs.d +4c748bfffa7033a3c4eea2d24dc98a2c gas/testsuite/gas/tic6x/pcr-relocs.s +a37d644d05b070755dd5a6f02e893647 gas/testsuite/gas/tic6x/predicate-bad-1.d +5bf15cf1d8344ea46bef6b2b33784577 gas/testsuite/gas/tic6x/predicate-bad-1.l +e96f3d394d750cecab51ab53fe16f771 gas/testsuite/gas/tic6x/predicate-bad-1.s +844d491506d593cb40a9ddc61241532a gas/testsuite/gas/tic6x/predicate-bad-2.d +e8d102e3737270245af7a30b4ddde075 gas/testsuite/gas/tic6x/predicate-bad-2.l +6603efc1d375e70988c31322b3c72eba gas/testsuite/gas/tic6x/predicate-bad-2.s +f9ed74292532f3f71c62831cbfbe210d gas/testsuite/gas/tic6x/predicate-bad-3.d +8a9f49b2f4ce1e3d62cbb13031f518b2 gas/testsuite/gas/tic6x/predicate-bad-3.l +0f3f6808d72b6cf1c872bb3f6733d72d gas/testsuite/gas/tic6x/predicate-bad-3.s +e6a9692f4ababe4217f7c53eaa61ea18 gas/testsuite/gas/tic6x/reloc-bad-1.d +3c0d41c058bcd25fd4afa6b7b60e493e gas/testsuite/gas/tic6x/reloc-bad-1.l +a92fb62ec7720d4e9c944f64015d85ad gas/testsuite/gas/tic6x/reloc-bad-1.s +1fcf20be09eba994a39187ddc9e1e674 gas/testsuite/gas/tic6x/reloc-bad-2.d +b5cb2f8bf7756524e68077e29982cf57 gas/testsuite/gas/tic6x/reloc-bad-2.l +7329e886d201b3a516b575d747bd13dd gas/testsuite/gas/tic6x/reloc-bad-2.s +d2a29898101577ad60df9faa6bfaf89e gas/testsuite/gas/tic6x/reloc-bad-3.d +8691f48c0e751b835bea2b8b1ff07052 gas/testsuite/gas/tic6x/reloc-bad-3.l +661f07caa4741fcb8c4cc32862bd5d8e gas/testsuite/gas/tic6x/reloc-bad-3.s +6d8d853f4454fe22d2bc73f21d478f19 gas/testsuite/gas/tic6x/reloc-bad-4.d +5bf30d493bdc35c6bdc3a064fb9eca50 gas/testsuite/gas/tic6x/reloc-bad-4.l +633c7c4826bfff06f579048d64d850d9 gas/testsuite/gas/tic6x/reloc-bad-4.s +15af7c03daf11c8003dbe770bd60282c gas/testsuite/gas/tic6x/reloc-bad-5.d +8bf61094a5f8c36b905ac232a888afb0 gas/testsuite/gas/tic6x/reloc-bad-5.l +5cfc742bec771868c4872e4072824ace gas/testsuite/gas/tic6x/reloc-bad-5.s +8b083b96669141fb8e4aafd4384cf86e gas/testsuite/gas/tic6x/reloc-bad-6.d +3b67ac0816b1a93a56bea2973819068e gas/testsuite/gas/tic6x/reloc-bad-6.l +63ae8145d338102f2029f8c3820206f8 gas/testsuite/gas/tic6x/reloc-bad-6.s +319f1a8820a16f4d740bf087c222794d gas/testsuite/gas/tic6x/resource-func-unit-1.d +5234e446a5e922291e1729d6aabe3453 gas/testsuite/gas/tic6x/resource-func-unit-1.l +942f6857cdca34e758b9cfa46e6e72c1 gas/testsuite/gas/tic6x/resource-func-unit-1.s +04ea445a4735bb4bb8294a8707b4565e gas/testsuite/gas/tic6x/resource-func-unit-2.d +50429ccd3bea99a635218d10b35eb9bc gas/testsuite/gas/tic6x/resource-func-unit-2.l +063bec4468dad620804c43a003d442e5 gas/testsuite/gas/tic6x/resource-func-unit-2.s +8c1cfc99e396e9519813244c9ea0b511 gas/testsuite/gas/tic6x/scomm-directive-1.d +16a38e48c689f24e9ffa1f32d33588e3 gas/testsuite/gas/tic6x/scomm-directive-1.s +7138bca3184590cb1ebedde478ffbb2a gas/testsuite/gas/tic6x/scomm-directive-2.d +8db1061bb9068179a2d25ede2e3bf9c0 gas/testsuite/gas/tic6x/scomm-directive-2.s +5ac54992e1a475fc8760567206b0218f gas/testsuite/gas/tic6x/scomm-directive-3.d +ab884915e5f858e9433896d4db7c8ced gas/testsuite/gas/tic6x/scomm-directive-3.s +e7e3d15939e37b77676b50983c892735 gas/testsuite/gas/tic6x/scomm-directive-4.d +0ca18b7b621d2bc1146d651ee98705b6 gas/testsuite/gas/tic6x/scomm-directive-4.s +2d8d6e42de1587c21ce823c0a26b930e gas/testsuite/gas/tic6x/scomm-directive-5.d +2bfba7dbc8c3c09a7fcc47fa8125a199 gas/testsuite/gas/tic6x/scomm-directive-5.s +cd74dca6ee482cf6302ab0fe5af6edc7 gas/testsuite/gas/tic6x/scomm-directive-6.d +6bccd6ec9c63322b63fa4b4077fa76cb gas/testsuite/gas/tic6x/scomm-directive-6.s +83d935abbccea7045b6994c30bd0fbb0 gas/testsuite/gas/tic6x/scomm-directive-7.d +183f90899ca987840dd25a1e9fcf915b gas/testsuite/gas/tic6x/scomm-directive-7.s +7d39f97e822caf4f2e5e1d2fdd4a68c8 gas/testsuite/gas/tic6x/scomm-directive-8.d +5e8d7ca08115be47412fa2917584f787 gas/testsuite/gas/tic6x/scomm-directive-8.s +d438c15d99c89ecf97e58dc6a88e0fc8 gas/testsuite/gas/tic6x/sploop-bad-1.d +e64fd235ab54cd4e183bcf6fa0b612fd gas/testsuite/gas/tic6x/sploop-bad-1.l +dc5e79a0720607dd86bba0b739835b53 gas/testsuite/gas/tic6x/sploop-bad-1.s +001726ba669b3f22952bda6da259a372 gas/testsuite/gas/tic6x/sploop-bad-2.d +918ec190e57cb54530e80a5740345f8e gas/testsuite/gas/tic6x/sploop-bad-2.l +452b48e0f430ae7a0f9eeaa66cc04058 gas/testsuite/gas/tic6x/sploop-bad-2.s +42819d33d0098bf3dfc4583cadcbcc09 gas/testsuite/gas/tic6x/sploop-bad-3.d +ef260649f39e1fe49eb15ce708627e47 gas/testsuite/gas/tic6x/sploop-bad-3.l +5b1df4b9f9f66941a478a4fcafc42aa7 gas/testsuite/gas/tic6x/sploop-bad-3.s +20303d99e8f8df5b5b00dac2983221d9 gas/testsuite/gas/tic6x/sploop-bad-4.d +7828bf28b034b422f7aba840482b457a gas/testsuite/gas/tic6x/sploop-bad-4.l +5d912fb61a36c62334cfc2eb7ef33197 gas/testsuite/gas/tic6x/sploop-bad-4.s +d2f1ebe6d4a2b0873e69e64cb76a141e gas/testsuite/gas/tic6x/sploop-bad-5.d +0a0c272ee31f594c05de8a03a2ccb671 gas/testsuite/gas/tic6x/sploop-bad-5.l +41912b22aa2f441fd37d51b065a209be gas/testsuite/gas/tic6x/sploop-bad-5.s +d8e8c7cc5d21465f80ee188aa9c46f7e gas/testsuite/gas/tic6x/sploop-bad-6.d +f9475a6b38fe3c22d830b209a968aae7 gas/testsuite/gas/tic6x/sploop-bad-6.l +a68011cf3c6829ecdb38fb481e833959 gas/testsuite/gas/tic6x/sploop-bad-6.s +f173a1672f1736d22fa60aec50716d92 gas/testsuite/gas/tic6x/sploop-bad-7.d +2e0455de0927f225035de61e37c159a2 gas/testsuite/gas/tic6x/sploop-bad-7.l +08d8027f46982627fb96f729aac156c7 gas/testsuite/gas/tic6x/sploop-bad-7.s +a3c602f713f339f45a3115d08131de85 gas/testsuite/gas/tic6x/syntax.d +622f074e9750f32b1b3049caf28bf022 gas/testsuite/gas/tic6x/syntax.s +05cd90abed0f22506361adfc1f0c1bca gas/testsuite/gas/tic6x/tic6x.exp +7de248ac3020a9455de02a7bbdf7d195 gas/testsuite/gas/tic6x/unwind-1.d +52f861d4eb5237992dd629e51c064d54 gas/testsuite/gas/tic6x/unwind-1.s +fece3517007eb4f9306e99377e172a85 gas/testsuite/gas/tic6x/unwind-2.d +6aaeaa764a1d0bb49b97b297e2d66fdf gas/testsuite/gas/tic6x/unwind-2.s +08171ee03b37cff8afa367b15eade18b gas/testsuite/gas/tic6x/unwind-3.d +9f274d7c18497faa9fdff643efc85942 gas/testsuite/gas/tic6x/unwind-3.s +3cf151ca4cd641205959c21da387056f gas/testsuite/gas/tic6x/unwind-bad-1.d +1a546443bfdae63539184169e5d30ab1 gas/testsuite/gas/tic6x/unwind-bad-1.l +733fa46a8b460a1b397f5cfc097238b9 gas/testsuite/gas/tic6x/unwind-bad-1.s +4004feb44851aecf3ab90dc47f9461f4 gas/testsuite/gas/tic6x/unwind-bad-2.d +5356e3641cb596ee28dff24a9eacd21f gas/testsuite/gas/tic6x/unwind-bad-2.l +e31d5b10f3d263459ed7d6db8e4079da gas/testsuite/gas/tic6x/unwind-bad-2.s +4dc38895f0191487e8fb6e1e83be4ed7 gas/testsuite/gas/tilegx/t_insns.d +cfcc8d0fa3c49333c4c2661613f2fc05 gas/testsuite/gas/tilegx/t_insns.s +b0a5f5ee47ae8c2e5b01678b945df479 gas/testsuite/gas/tilegx/tilegx.exp +7517e1f64362b3580d0049ab73d26abe gas/testsuite/gas/tilepro/t_constants.d +23d4d2ce8eeacebfeed51686a24116cd gas/testsuite/gas/tilepro/t_constants.s +6ad3aebff6418f5b057cd2d052487d90 gas/testsuite/gas/tilepro/t_insns.d +04b0ea6a3eba9a7a2e11225c13bb2bdd gas/testsuite/gas/tilepro/t_insns.s +e81f5fbb964adeb73c4f2156d55d78cf gas/testsuite/gas/tilepro/tilepro.exp +b3daff1073feeab915c5d25268ab1d71 gas/testsuite/gas/v850/arith.s +e578aefe805ee5ad3ee58d0ef2832b18 gas/testsuite/gas/v850/basic.exp +fd5263cb3409650f6bb2e9b610eab2d9 gas/testsuite/gas/v850/bit.s +d33db5351243bff28f76ada8284737dc gas/testsuite/gas/v850/branch.s +e3d311e55349338e4876c3711ed91c46 gas/testsuite/gas/v850/compare.s +986292c2ba21464166aa337ab580a139 gas/testsuite/gas/v850/fepsw.s +5f8e79e5bec30791f19218a7ad23040d gas/testsuite/gas/v850/hilo.s +f7d87df456dee97f2d28be5a29afde0a gas/testsuite/gas/v850/hilo2.s +36254aabdcf9005f2dd8e7fba47de388 gas/testsuite/gas/v850/jumps.s +ee5a6da54e89a759bccef5da2ce4747e gas/testsuite/gas/v850/logical.s +79263247214c7d46c383e26aafc74d31 gas/testsuite/gas/v850/mem.s +2db16d6b7c2aa2cc17e621ac1da852eb gas/testsuite/gas/v850/misc.s +8c5fd0446e831223f93adebecec8a2b2 gas/testsuite/gas/v850/move.s +90c3465d11f275837ad5b9cac2dd51c4 gas/testsuite/gas/v850/range.s +10e8b025bce8af1b59c395fc5799236c gas/testsuite/gas/v850/reloc.s +378cfe25e8ce273611d7d2f43d70cfe9 gas/testsuite/gas/v850/split-lo16.d +eee775291469641dfa761921ed942688 gas/testsuite/gas/v850/split-lo16.s +4508b29270952dbf4203e35db3d39dbe gas/testsuite/gas/v850/v850e1.d +eedf6270a3f4501ed56b62c6a386ca44 gas/testsuite/gas/v850/v850e1.s +97c4b5a719430010c15bae2299ce58fe gas/testsuite/gas/vax/elf-rel.d +93d331c520e6b5b5b63f7010f800b523 gas/testsuite/gas/vax/elf-rel.s +c8557b4b40ce9690c81d77b9502a959c gas/testsuite/gas/vax/flonum.d +2cf8b02a3bf0517e18f9e972f496f396 gas/testsuite/gas/vax/flonum.s +aa03dd0743c96363f2bbd4a8d6bf5930 gas/testsuite/gas/vax/quad.s +b5281ff49f97d0836ede49ab60f0b84e gas/testsuite/gas/vax/quad_elf.s +5573f76fbd39f4ef631b12ccfe26082e gas/testsuite/gas/vax/vax.exp +b898eb8de608f2a58e457819a18fc6b5 gas/testsuite/gas/xc16x/add.s +5f315bec363a06d8c499bfef6a910ae4 gas/testsuite/gas/xc16x/add_test.s +1dc4db7d28ad50d346642f6dbf5df632 gas/testsuite/gas/xc16x/addb.s +d301d0d9a87958794c84ad7da238c117 gas/testsuite/gas/xc16x/addc.s +cbc27d426e01a6b1787ca0874a40ec64 gas/testsuite/gas/xc16x/addcb.s +ec736a95397739f0e5d7ebebad55f68d gas/testsuite/gas/xc16x/and.s +901d19e05a01c914be683e6ef837e9d3 gas/testsuite/gas/xc16x/andb.s +f4f8565d3423ec279b25c291c489ac5f gas/testsuite/gas/xc16x/bfldl.s +7abe30bd4385dc6cc9991dee613c31b6 gas/testsuite/gas/xc16x/bit.s +72072eaeb0ce024c58e07b6821e122f3 gas/testsuite/gas/xc16x/calla.s +c4432ec0aeee6567803279d86b2ed6c1 gas/testsuite/gas/xc16x/calli.s +81a7564b23206ef107f01041892f1a9a gas/testsuite/gas/xc16x/cmp.s +1a42e3b54e1c1f12cb59756592a4e4bd gas/testsuite/gas/xc16x/cmp_test.s +b3db7ee9fa74afda3c5a7c4563500151 gas/testsuite/gas/xc16x/cmpb.s +2c9832a9dbde30032fb81ddbd0c7e6f6 gas/testsuite/gas/xc16x/cmpi.s +af0d2186664faa9760fdd9c9b96e6237 gas/testsuite/gas/xc16x/cpl.s +fb689b8eb0e2d2948c81871e4437eb55 gas/testsuite/gas/xc16x/div.s +39a90f3f13cb6ebd7bbf254f53b1f06e gas/testsuite/gas/xc16x/jmpa.s +393bd96fab3a174b68fa2a11698517ac gas/testsuite/gas/xc16x/jmpi.s +344ed28d4ba4d16c75b7c3b3804c222e gas/testsuite/gas/xc16x/jmpr.s +78fe1a285b5a9300fd6870afc8d7a624 gas/testsuite/gas/xc16x/mov.s +14e2e5dda69ea4c34dad7fc422218333 gas/testsuite/gas/xc16x/mov_test.s +568a5a3459bce6973680b30bac821450 gas/testsuite/gas/xc16x/movb.s +84938c2fa9619b926b0cbaf47c0bad1f gas/testsuite/gas/xc16x/movbs.s +606f31c66b3eb70c5535a0d5d3c5269b gas/testsuite/gas/xc16x/movbz.s +c171a5c5b96d9090fb5c0abf5f9cdc06 gas/testsuite/gas/xc16x/mul.s +94af5bd0dbfab715edd926f4b6386997 gas/testsuite/gas/xc16x/neg.s +112290437259ed40e1d74b876e21f444 gas/testsuite/gas/xc16x/nop.s +4027f70a69e5ee51af01107f742db8db gas/testsuite/gas/xc16x/or.s +39ebd060389b04ee9b451b65d48aabdb gas/testsuite/gas/xc16x/orb.s +191945b9ed36a3dd3a8350289f1eec47 gas/testsuite/gas/xc16x/prior.s +d3d778fd4c04043cf34b85499dd25b44 gas/testsuite/gas/xc16x/pushpop.s +1b77424053fd88917ab756f4aa5b126b gas/testsuite/gas/xc16x/ret.s +06da10d686c4a6de64553c6208c87d1a gas/testsuite/gas/xc16x/scxt.s +d9d7113ce6edc188b99ac7ea87402cf7 gas/testsuite/gas/xc16x/shlrol.s +adc7510e48e55d117ea82b69328d15b4 gas/testsuite/gas/xc16x/sub.s +deaa94ee201bb59e369f29f575a897d8 gas/testsuite/gas/xc16x/sub_test.s +bd05476dae49fa2a7bbbf86e7a5c60a1 gas/testsuite/gas/xc16x/subb.s +cc52ade9bcdf936042ef42b922f19105 gas/testsuite/gas/xc16x/subc.s +49f7f3fcf66ba02d15f5ee099ac4625f gas/testsuite/gas/xc16x/subcb.s +1a0cbe2eff7809873f2845c05a13b284 gas/testsuite/gas/xc16x/syscontrol1.s +76c8d37a5a3e663f33e7899beac2bcc1 gas/testsuite/gas/xc16x/syscontrol2.s +6e499f9be2aff00b249bd7e2b8fa3454 gas/testsuite/gas/xc16x/trap.s +7d10540fbf64a1d6db6b7f179eed4b3a gas/testsuite/gas/xc16x/xc16x.exp +396543dd8f02cd8bd81a9b0a8d8358b6 gas/testsuite/gas/xc16x/xor.s +235321f531fc18a5f7156f103c618fc5 gas/testsuite/gas/xc16x/xorb.s +9bd3cbd5df41ccea979773da1a06d25e gas/testsuite/gas/xstormy16/allinsn.d +7389542aad96c9680c2964c5585bd7e1 gas/testsuite/gas/xstormy16/allinsn.exp +0578374b0231a4f3a76bceecd452af8c gas/testsuite/gas/xstormy16/allinsn.s +1e5f1e10cec9b3c80aebd2d85bf9f4ab gas/testsuite/gas/xstormy16/allinsn.sh +424739d1d4a83c8dd312ff4a255fe33a gas/testsuite/gas/xstormy16/gcc.d +34eb714356686c594ea470d037ff980d gas/testsuite/gas/xstormy16/gcc.s +2bab00917391fa8fe1dda5938f6ad558 gas/testsuite/gas/xstormy16/gcc.sh +497560cde7dc6be28345811a294871c8 gas/testsuite/gas/xstormy16/reloc-1.d +7b2f6fd28e4136ed51af9fa15bfbc87c gas/testsuite/gas/xstormy16/reloc-1.s +e2364d93d941960a57bdec88bca95f47 gas/testsuite/gas/xstormy16/reloc-2.d +688ac14ef52d1f032c6e360b5e8d2607 gas/testsuite/gas/xstormy16/reloc-2.s +14ad1e88c9c24f7a3ec9eb738af6685f gas/testsuite/gas/xtensa/all.exp +febb407b84d25094205ffd8a82c8f3f8 gas/testsuite/gas/xtensa/entry_align.s +047b105217cfb35f7b85b27982de9ee0 gas/testsuite/gas/xtensa/entry_misalign.s +98754ef2b2ad4579570fc6cff9e5f465 gas/testsuite/gas/xtensa/entry_misalign2.s +b2aff7acb77401a9e680b20148109634 gas/testsuite/gas/xtensa/err-pcrel.s +feb6bdf09b3344bce0d6638dc2c34d25 gas/testsuite/gas/xtensa/j_too_far.s +70b6a1943f31e85e4a40c7106205d6cc gas/testsuite/gas/xtensa/jlong.d +e910c7d2ee2aa41e6baf7c2eccedbecf gas/testsuite/gas/xtensa/jlong.s +ab9272fb92c36f6cc58921de84c4a0eb gas/testsuite/gas/xtensa/loop_align.s +89c5bc675c0f6e4d485383908be47831 gas/testsuite/gas/xtensa/loop_misalign.s +2c16b47ffb1bdf68123ae890f0a53d90 gas/testsuite/gas/xtensa/pcrel.d +836acd098dba389006887f1032de1d0d gas/testsuite/gas/xtensa/pcrel.s +89136e7c8b9eff77fbcb58c94a361f37 gas/testsuite/gas/xtensa/short_branch_offset.d +3050cc891aa6dc3b721df7adcc1e9e9f gas/testsuite/gas/xtensa/short_branch_offset.s +caa3c813d0d190a10143bb1726af402b gas/testsuite/gas/xtensa/weak-call.d +e9cbcae183da4f3236cf8e232960c533 gas/testsuite/gas/xtensa/weak-call.s +0b94f1ec5d4daeb9620ac56e7a5c9832 gas/testsuite/gas/xtensa/xtensa-err.exp +76096e7df8eeb0c73bd5aa7bfb34255e gas/testsuite/gas/z80/arith.d +8118fc03539fde92b0de9cae6188372c gas/testsuite/gas/z80/arith.s +e0dc1a059c74faaac5ad2ee2ccb3e36d gas/testsuite/gas/z80/atend.d +c9633957effeec0ed1dad46964e975ab gas/testsuite/gas/z80/atend.s +950e301bffae63b183aca2c8f224cb7f gas/testsuite/gas/z80/bit.d +cc6040323b82ab0d7e368abd06c1ad7b gas/testsuite/gas/z80/bit.s +21f5b15722fce227204cb650accda912 gas/testsuite/gas/z80/block.d +5a511ead974b283bdda5668428c09393 gas/testsuite/gas/z80/block.s +cb3c6c56e18d6f2710326d97939c4768 gas/testsuite/gas/z80/branch.d +8c45e2c4272f9169f12025386f007298 gas/testsuite/gas/z80/branch.s +9d9964701252eee897f484dee8ce307c gas/testsuite/gas/z80/equ.d +585c2593f699832516b10888efcb3501 gas/testsuite/gas/z80/equ.s +57f344303eafeb80a995d32b81411fb8 gas/testsuite/gas/z80/inout.d +90a1576adecaca86f780c1550872ea47 gas/testsuite/gas/z80/inout.s +2aeaecb345eaead5b7d3c61fa873603b gas/testsuite/gas/z80/ld-group.d +32f329efa727bf528ccce3f380573caf gas/testsuite/gas/z80/ld-group.s +e315baa412368a90c904c56bfd495f2f gas/testsuite/gas/z80/misc.d +68084a742592799b5a051ffbb6ee140e gas/testsuite/gas/z80/misc.s +408cc9b5ff8576a0af9a6303a060a84a gas/testsuite/gas/z80/offset.d +34d65c390eed4096165f7b9589edf9a9 gas/testsuite/gas/z80/offset.s +ed248a2dc8a185797dd5ccacae58d6bf gas/testsuite/gas/z80/quotes.d +968a4dd849f36bf8929291ec2ddb7575 gas/testsuite/gas/z80/quotes.s +6f4f086c484747ed4ddb587e56797097 gas/testsuite/gas/z80/redef.d +15faccb7602127c05c2ae5fafe5a2227 gas/testsuite/gas/z80/redef.s +fb219e51df0e277f3ac3c62283ae9cbf gas/testsuite/gas/z80/rotate.d +1b4b12e40cc8a7fc2c7dfdeb15b7e7c0 gas/testsuite/gas/z80/rotate.s +fb0806d8887b68b7f863f42c7a45a645 gas/testsuite/gas/z80/suffix.d +a738f0cca1753ef4b1c78743e366ffc3 gas/testsuite/gas/z80/suffix.s +80dc5223661a959b82224eb6067f0e3f gas/testsuite/gas/z80/z80.exp +b49428eb4ba63d8dac5690c08355ebc2 gas/testsuite/gas/z8k/calr-backf.s +6e4950abd9e763001ccc0bbc0babaf23 gas/testsuite/gas/z8k/calr-forwf.s +86577ff2937c59bafae28abe1bbb9baf gas/testsuite/gas/z8k/calr.d +541f7c8179a6e454326ce7b21bf8d7d2 gas/testsuite/gas/z8k/calr.s +b17b39612ad59025b551ce2038897c79 gas/testsuite/gas/z8k/ctrl-names.d +9af934d7ef4cc61120ac722bd3447044 gas/testsuite/gas/z8k/ctrl-names.s +28483e5b3cf53bc3ba9a9901f6f43cdd gas/testsuite/gas/z8k/dec.s +c1e81cc8fc32752bf759d6cb3f4077d5 gas/testsuite/gas/z8k/decbf.s +92c0157129bceb932434c0c3bd500365 gas/testsuite/gas/z8k/decf.s +570b5ee7aa92ae18483423aeafaf4c54 gas/testsuite/gas/z8k/djnz-backf.s +a3fe9dfe1ae7aa5b675bbaff933a172c gas/testsuite/gas/z8k/djnz-backf2.s +6bfbbe34e06a02f656a19b014d287c62 gas/testsuite/gas/z8k/djnz.d +bdae045f9b33f16fe1fa345ed1725848 gas/testsuite/gas/z8k/djnz.s +b305ef7b6f6709032524f6568266ec54 gas/testsuite/gas/z8k/eidi.s +17135d7105f96ceb57f7d2df1ceaf288 gas/testsuite/gas/z8k/eidif.s +ed322b14e46464bec51ecb589c340dc5 gas/testsuite/gas/z8k/inc.s +1b718e47798f82cc751183fb7bd1570d gas/testsuite/gas/z8k/incbf.s +5c236b616e7830fe0e367398a9126d18 gas/testsuite/gas/z8k/incf.s +cb0eeef7fe997388c62e67c9fcb4516e gas/testsuite/gas/z8k/inout.d +bc612d839839a7edd8a6edb414fcaece gas/testsuite/gas/z8k/inout.s +71c54c4ae22dbe8878b1227d49606aac gas/testsuite/gas/z8k/jmp-cc.d +31118c0ac719666949c9ca49fa349d0b gas/testsuite/gas/z8k/jmp-cc.s +fe1ac4303fe3baf72c7f534c7df60cf7 gas/testsuite/gas/z8k/jr-back.d +30a99e6ef53c4f50d1a33c8a96b24515 gas/testsuite/gas/z8k/jr-back.s +c8d698d13dfb162e769f8802fd9b0d74 gas/testsuite/gas/z8k/jr-backf.s +539854b970b0949b0aeed74e7bc5b3c3 gas/testsuite/gas/z8k/jr-forw.d +1e22a5e25eae4439cc2d1642fe4c25d7 gas/testsuite/gas/z8k/jr-forw.s +2e9d4668c8f7269b9d013e5f6acb866e gas/testsuite/gas/z8k/jr-forwf.s +e2882e18046d6c5e38967bd4a873a424 gas/testsuite/gas/z8k/ldk.s +67a6618ad1b858a214e45638cf227a5a gas/testsuite/gas/z8k/ldkf.s +0fb8a216833a93af0c8a0e5dab536925 gas/testsuite/gas/z8k/reglabel.d +98c23d4ff5397fcd6c075b365b0f8712 gas/testsuite/gas/z8k/reglabel.s +caf6a6138b956da27b9b42beabea1c2d gas/testsuite/gas/z8k/ret-cc.d +f23b1d6008927d7ae445999b7f5f0bf3 gas/testsuite/gas/z8k/ret-cc.s +a8db3b4208084b45c4116081711019fb gas/testsuite/gas/z8k/z8k.exp +5725f8e58e03bd6026f3e2721e1db22e gas/testsuite/lib/doboth +133e9f8bb4d12ac7e498f0ac5d0246c0 gas/testsuite/lib/doobjcmp +aad4965bf0067bf9fb71acc19f7877d4 gas/testsuite/lib/dostriptest +bdf5e4dee40167a92f0a45965b0375b7 gas/testsuite/lib/dotest +af650aab07403b5a05623713b613856f gas/testsuite/lib/dounsreloc +30764ced5c424e3c2c384059cbe2a227 gas/testsuite/lib/dounssym +454ecc6320ae2b041609bc729dcb6bf2 gas/testsuite/lib/gas-defs.exp +b4a303f3223f3695d37e231d7e691500 gas/testsuite/lib/gas-dg.exp +fa15c7b10accc66a51aef7768472e371 gas/write.c +3b955fb7ab2ef082f90865d180ed0ef5 gas/write.h +920138da7dbc4f3ef4ba32e27f2886a9 gold/aclocal.m4 +cfb2f43a125170e66c90d7170bbca885 gold/archive.cc +ae2022764dc7407a210d4bd795f4054a gold/archive.h +e9a57934d59bf0fb1770c13e36bffc86 gold/arm-reloc-property.cc +ae313dff2413bd2819f4ab0f6e0d0cb3 gold/arm-reloc-property.h +0c8fa104bc816e2bb99c31e3a3a04a76 gold/arm-reloc.def +3f304928f9da5dd7194793bddeff5888 gold/arm.cc +c4bdb95759b2562e84e2e3ae745bf9b9 gold/attributes.cc +106b7b5a4a9cc14109c6e36f9fbd0bce gold/attributes.h +443debdf67a99cfafda83df5229fc05f gold/binary.cc +db3d9c5c5950fe999accc7ea1c5b659a gold/binary.h +dbcabe17c3375de8e45bce5bbe0d1a70 gold/ChangeLog +bbfe76b7753e98622f708aa3fffd0c3b gold/common.cc +6fdb26c4e334a794349d0bf97a3ca52c gold/common.h +22d1af5b1f164c50043ae43a0e5dfa1d gold/compressed_output.cc +cf591901128363a830ef32628ca6b897 gold/compressed_output.h +fac10aec1128d2b5aceadd073972bea5 gold/config.in +ca0321fb64d97dfef14b178f4792bd14 gold/configure +62137e9f53aae20fb701180dca73e4ef gold/configure.ac +3be298db81c4436a57939f940ba0c51d gold/configure.tgt +9f638a42370a8550f31bc9ba277bc9fb gold/copy-relocs.cc +65af0f3de57eba50bfa65b4bb351721d gold/copy-relocs.h +359ce2e8c11d71f261e9033704859e50 gold/cref.cc +7f252be444e9576bda4a3496216280d1 gold/cref.h +1a17a3a8e4d700beb6624384b67653a7 gold/debug.h +deea133840491c307096f770a4e7cb84 gold/defstd.cc +a76f48603de929b8ed7a7a656ba630b0 gold/defstd.h +51aa13f4c42e0c49266e38716b9f40ff gold/descriptors.cc +8f1817f08b09eb28b618e3b5a8983ae6 gold/descriptors.h +498a015c853882a7db3f60c18d4d2263 gold/dirsearch.cc +76814987cdbef988686518ad901349e2 gold/dirsearch.h +e8eafdf68ee7aecb5c5d9d94abed2491 gold/dwarf_reader.cc +f0fc9ac6b6999ece3dfeb0eb0cf65120 gold/dwarf_reader.h +b27404aa89d6155a7e09c48161676246 gold/dynobj.cc +012314e00730338b1f1792bc6dea5267 gold/dynobj.h +178087b6c80f243c7d8716c889d31940 gold/ehframe.cc +08ca553efd91c9aa852f8ec8f01c9391 gold/ehframe.h +6b230b219482ec1881e61bd2fefb6c28 gold/errors.cc +502f1f3e8db45d063449d815b408ac3a gold/errors.h +fc5109bfa612a13c5d17b3a71641f08b gold/expression.cc +0d16fb621ed6640e97dbbbdf9be676e7 gold/ffsll.c +c623b09362766dc4444b8c926fc258d3 gold/fileread.cc +57aa1c270d4f542d72ef143fd1552c60 gold/fileread.h +310a31b0e99dfae0c2c96dc810033ac8 gold/freebsd.h +76b1ff3cb93502be702953b2ed781993 gold/ftruncate.c +42a796cf816f168b25e699ece6e79b82 gold/gc.cc +0f730d0302ae9d61af6fd154dd5f5977 gold/gc.h +08fc5a346abbe8bf5949c93911bf798d gold/gold-threads.cc +debf2f81aed982206e3480926240ca46 gold/gold-threads.h +a5843f95b51889701783274d1c39d7a1 gold/gold.cc +bb7785887b2d637ba758bc74de64d95d gold/gold.h +2815749b39a66699b1171db54f4cbad7 gold/i386.cc +50da54a753bb24a26a5295eb4e459aed gold/icf.cc +350f34e563eeb79e3c0cac57dc5e422b gold/icf.h +dde2d0915d47c2927b1ac1d26fa8fb6a gold/incremental-dump.cc +2c234bc06bcad20a4e8fb4b01fc26b04 gold/incremental.cc +da6e4c29aa8052bda1d1344db723a1f4 gold/incremental.h +61a997f99180a69371fb830efe2e575d gold/int_encoding.cc +884bd8912c1eda493a1f05d26086f1fe gold/int_encoding.h +bed39fe37a1fbbbd0a0820def0335399 gold/layout.cc +32f22b82f014418d043e7385a4239f0e gold/layout.h +2e6d13e4a9ddfb02d86e35926ffdc745 gold/main.cc +4c6d7c49559bbdf6dbd6a279370b6698 gold/Makefile.am +79f21660f61562f063a819bd5bb824c9 gold/Makefile.in +f6c7da31fb8c70fa4cdcfc5922b61809 gold/mapfile.cc +be05d404cabe66f01ab7133085791763 gold/mapfile.h +0c2d358d5ed3faaed479e871f3e400a6 gold/merge.cc +50d803537d079c668db7d6cb45f8ff6a gold/merge.h +1bb3bbab24172b571b72c7fb127e2b3c gold/mremap.c +d6d999c5dc1e4cc4032ee874d917f984 gold/NEWS +045f126a4a656a4188cb5b349e33708e gold/object.cc +f105a9f6e7b4948abfdc94d6be0ce2ad gold/object.h +f5777ed1ffc04741b6468ccdba5cc498 gold/options.cc +62e78dd665221763629d3085ac3cfc47 gold/options.h +f444561088c5564729f1e1ff452a6258 gold/output.cc +1f90c1b2e32fb14616b69d7bfc12614c gold/output.h +a961cd014f34ef80b3a3c86045823d1d gold/parameters.cc +63209f69ed52a0b0542d50f1b65a66cc gold/parameters.h +afbedc5f3aaa3cc3413fb629a716a853 gold/plugin.cc +00197e1366b23a0d9ff3506cf2eb1cfc gold/plugin.h +f5d465c1def148c3688d691b6676f6a1 gold/po/es.gmo +e51f6cc3911ee1349c59c6661da4e6db gold/po/es.po +e872d3ee22824820ca7746144ab3eedc gold/po/fi.gmo +922ee405bf33ff9b7e96969b86c8b927 gold/po/fi.po +2b7ec11aad5f113736fd4e91b78f3bf8 gold/po/gold.pot +7103bf2876d97b9e71f3e6b20e3a16e7 gold/po/id.gmo +b4492d1a0779dc0b6da2911fd1bcccf7 gold/po/id.po +e2216e0ba2da7ea411d167673d7009a0 gold/po/Make-in +232ba86994f5d311461c2f71232f9ff2 gold/po/POTFILES.in +0952fb13719f896dee741e4dd733e6a5 gold/po/vi.gmo +c5ec0edbb404e147aeaea802372fa8a1 gold/po/vi.po +56858b341a0d327563af83ac257b1ef3 gold/powerpc.cc +c423652afda43455ca78c502b716405e gold/pread.c +5f7f19cf26bc8107507cabe85cf27a51 gold/README +c02555882a81e8e5e20cba8bc2159c9f gold/readsyms.cc +f7fd13e96623b8a1b40354922397a8d6 gold/readsyms.h +ea0f1898029ac031868a6d029105d16e gold/reduced_debug_output.cc +f5564bad622af448481d52505f289cc1 gold/reduced_debug_output.h +c0e5fe55ab808bdd8cb47edd4786aceb gold/reloc-types.h +89614c5630f8fb5c447861ab9a62b56a gold/reloc.cc +0871e7463f1218ff84d364850a893614 gold/reloc.h +4fee05a6178b729688ab4200d9ea19eb gold/resolve.cc +46267ceb3ae8dc1be4267823e81ec980 gold/script-c.h +4169a516b6d6924432669e728c08ea4b gold/script-sections.cc +6db36bd21f208d6fa3f0990c3d7da9b1 gold/script-sections.h +0f2108e0079a1c2933614ac94951056d gold/script.cc +89c5d078ec9e3cc9b1c0a1c6c8aeda03 gold/script.h +0ce7f7dbf461652175b6e9e4df27ab10 gold/sparc.cc +f595f00790530b9d393df99edc6807a8 gold/stringpool.cc +2bdda92ce7e34717260a1d26bdcb517d gold/stringpool.h +22706de3ea04bd7b974b9dbff15aa5e4 gold/symtab.cc +764f7045526cc89c06199ac495685aba gold/symtab.h +c8e3f77291b633610ba2cd8acd642c27 gold/target-reloc.h +af45e3feab8afda96001e46b148f4869 gold/target-select.cc +32f344ac69843866c71a5205243e2e64 gold/target-select.h +73ca989c92338dc42965d2b2d6d1b98f gold/target.cc +255d45e3ef131663da5d2062f0c6f2e7 gold/target.h +80b509c91549c14b2bf6a55edd4d2143 gold/testsuite/arm_abs_global.s +eb46a49b940ea9c372ab29281d3d4946 gold/testsuite/arm_abs_global.sh +9ac09610a2d87c662a5ceeaf1b025d15 gold/testsuite/arm_abs_lib.s +80018cea4a4d102d59fcc1e8fa6f28eb gold/testsuite/arm_attr_merge.sh +20754945d78d1f5638f26634b47e8f59 gold/testsuite/arm_attr_merge_6a.s +66df9ecd840e9fe0126a9852dbee3e3e gold/testsuite/arm_attr_merge_6b.s +4c155f3e2d74bfaaee87bf34c5f9370a gold/testsuite/arm_attr_merge_7a.s +8383d587d80276d4b6a8dd6bab556839 gold/testsuite/arm_attr_merge_7b.s +e347b22d67c811662c5d61834f924831 gold/testsuite/arm_bl_in_range.s +4b002882f3ce289d3e92d29404bd773b gold/testsuite/arm_bl_out_of_range.s +3f97a52ef33dc972c572d4533ef92f90 gold/testsuite/arm_branch_in_range.sh +af46825e07ac2bdd6427457997a7d57e gold/testsuite/arm_branch_out_of_range.sh +e9ff846223ed2bbeb803610a3ca91c1f gold/testsuite/arm_branch_range.t +b2b7a67ff2a1cf5d62db786501507dd5 gold/testsuite/arm_cortex_a8.sh +652d0cde19d3d66a1725d54fc2a5b91c gold/testsuite/arm_cortex_a8_b.s +7f068ed6006aa356331a5aebfcb2b4fc gold/testsuite/arm_cortex_a8_b_cond.s +d94bd04b915e0260ae7f85bd883faf67 gold/testsuite/arm_cortex_a8_b_local.s +3aa21fc062ab2dffd7db4d368bf0a907 gold/testsuite/arm_cortex_a8_bl.s +40ddb04f944f422900dccd988911d365 gold/testsuite/arm_cortex_a8_blx.s +f8361e5ebf0488807385746412b86a21 gold/testsuite/arm_cortex_a8_local.s +1dbff22390a0dd9f90d8b32a0947f0e8 gold/testsuite/arm_cortex_a8_local_reloc.s +998e450377cb15c7882b4287b1df80d3 gold/testsuite/arm_exidx_test.s +714ea4e5bb09a41ae492683f4143b1f5 gold/testsuite/arm_exidx_test.sh +83d80a7ef45408d267162af94a007143 gold/testsuite/arm_farcall_arm_arm.s +0b96c24216f4074132f7937594b94859 gold/testsuite/arm_farcall_arm_arm.sh +feafda34a355cec86381a9424c1923e0 gold/testsuite/arm_farcall_arm_thumb.s +0ef25a2e00c3770723c30e71a6053af3 gold/testsuite/arm_farcall_arm_thumb.sh +938e05203cf88a8f3d61328da7f40b6f gold/testsuite/arm_farcall_thumb_arm.s +809e9caae992873fdeff43cbd844e699 gold/testsuite/arm_farcall_thumb_arm.sh +1748da76b5b6995c5e5246beaf550c89 gold/testsuite/arm_farcall_thumb_thumb.s +b0eacfe2d4b3e8ea6a38ff5bdf53f3b5 gold/testsuite/arm_farcall_thumb_thumb.sh +e0c37a2fccb6d4aeea259944dd0507e9 gold/testsuite/arm_fix_1176.s +1c6a16b232cb814b1d10258e768931b2 gold/testsuite/arm_fix_1176.sh +863a1a2ed16aabfcf03175997f5861a2 gold/testsuite/arm_fix_v4bx.s +b9847ccd3bf1bf55d364499f0d4d0b1b gold/testsuite/arm_fix_v4bx.sh +8c177688e29dbba293d61890595593bd gold/testsuite/arm_thm_jump11.s +f8f4052351a5f8078bb4b3ac8bbf9bf6 gold/testsuite/arm_thm_jump11.t +b1d476427b02fb14b51fac920bae98ea gold/testsuite/arm_thm_jump8.s +8eaf6d4826efe781c387711e5e0c7eab gold/testsuite/arm_thm_jump8.t +9c97f80983fba914f9dea285bb54c38f gold/testsuite/arm_unaligned_reloc.s +ba4482d8c1ff810e16aa0635f07b9613 gold/testsuite/arm_unaligned_reloc.sh +86ebe14fc53f726766fd6094c1762d17 gold/testsuite/basic_test.cc +3b0f70d2cd5589a910279456f68336df gold/testsuite/binary.in +25bc594a25d9f7b4cbdb47b027baf133 gold/testsuite/binary_test.cc +6a820f1483951e06232a40197daac6e4 gold/testsuite/binary_unittest.cc +b1ac1067b03972c85e0d1d49c900bca7 gold/testsuite/common_test_1.c +e20717f09bcc933dd470474d72c0e446 gold/testsuite/common_test_1_v1.c +d3a9dd16d78f5ebce76ad1e50121d236 gold/testsuite/common_test_1_v2.c +0e6373efe5a79c8c395b1d2ee593e9a9 gold/testsuite/common_test_2.c +8fdd7fcccb703cb70d67418105f7a4da gold/testsuite/common_test_3.c +5b81b33dbafa5458aa9ac274b163c884 gold/testsuite/constructor_test.cc +3420133aec5fd8fc5887def3d4cd1c7c gold/testsuite/copy_test.cc +7612b383879374076b3110cc006d8224 gold/testsuite/copy_test_1.cc +b3a44a7dbf5812854ae0d89dd447bd38 gold/testsuite/copy_test_2.cc +4cd88b3578712ac527d0613a5ee0e728 gold/testsuite/copy_test_v1.cc +6a8b9e7eacaff9ef2c252ead48e2f148 gold/testsuite/debug_msg.cc +8f95430c9cf2ad73430cd70162f02d0b gold/testsuite/debug_msg.sh +5b358034ecf1505d8675495e4e624623 gold/testsuite/discard_locals_relocatable_test.c +e04c1316bcdeb97e0a8595dbe92d780f gold/testsuite/discard_locals_test.c +fa32967cc44d43d4e1c73aad0f6b621d gold/testsuite/discard_locals_test.sh +c9db537eb345d2e8155e17958d9d019a gold/testsuite/dyn_weak_ref.sh +f6a22adb5ec303edd3b35c489bb0d1d3 gold/testsuite/dyn_weak_ref_1.c +a04a49c0115a84e4324919da8a59d6fe gold/testsuite/dyn_weak_ref_2.c +2fecf188d24d7c64c08c68483dd38473 gold/testsuite/dynamic_list.sh +c0e08db807c4397f49bed99938e507db gold/testsuite/dynamic_list.t +d84823c386b251a50d30b84626f2f182 gold/testsuite/exception_test.h +2db52f66cd4624f76c03bc7744e557aa gold/testsuite/exception_test_1.cc +0ad98b0e6bf2e6817f843782512e0bb0 gold/testsuite/exception_test_2.cc +2f5a4607c092a09d1088dbf423981b23 gold/testsuite/exception_test_main.cc +e64b239526003ae455fc6a2944d34ce5 gold/testsuite/exclude_libs_test.c +5e751e6115ac8ee739e510325fc360e4 gold/testsuite/exclude_libs_test.sh +740e416c0b6d2930d485ba5105130ce0 gold/testsuite/exclude_libs_test_1.c +4b3c9863720fc755f063974fbaabd4be gold/testsuite/exclude_libs_test_2.c +893351b0ec9cbfa21e0f884fcfeebf54 gold/testsuite/exclude_libs_test_3.c +d9925bfa0462085af12a2f6fd97862c7 gold/testsuite/final_layout.cc +97bfae757dbd15e1a7428f2225222833 gold/testsuite/final_layout.sh +ff6b8a56847ee596ced08c23e49c1e17 gold/testsuite/gc_comdat_test.sh +2fa43e0e436bcc6299fe05771aa1bb8c gold/testsuite/gc_comdat_test_1.cc +7cec6896b02d316149aa526a082b359f gold/testsuite/gc_comdat_test_2.cc +e61998214250c4a64e0ee91e66679999 gold/testsuite/gc_orphan_section_test.cc +0505de398c8a3a820bb025ebb35f5eea gold/testsuite/gc_orphan_section_test.sh +4dd1d6984551b2598df7d7f6220fa565 gold/testsuite/gc_tls_test.cc +dedc8fae056b79820e781eec66f44334 gold/testsuite/gc_tls_test.sh +97f6e21a09bed87161b94ce25951bb50 gold/testsuite/hidden_test.sh +7307261e8720367aba744859958b1700 gold/testsuite/hidden_test_1.c +db4a336c6c9c6120f5c0ff04097b7061 gold/testsuite/hidden_test_main.c +39cc2487a8aa8d07cd43237a02d18c81 gold/testsuite/icf_keep_unique_test.cc +6d707279237ff0073212cf18c1f63220 gold/testsuite/icf_keep_unique_test.sh +eba7bf7e0a5fb9ae780f7c255a28abfe gold/testsuite/icf_preemptible_functions_test.cc +974b10045822dcf27c1da02ead7e2277 gold/testsuite/icf_preemptible_functions_test.sh +dbe37f764ab9d017bcb0cf9080b88426 gold/testsuite/icf_safe_so_test.cc +d87cca5952715bab965e5ba705cc05c8 gold/testsuite/icf_safe_so_test.sh +894868f60fd41765a92d882d77d357ed gold/testsuite/icf_safe_test.cc +aa2529b30aec0cd7c305b9bbc5604a55 gold/testsuite/icf_safe_test.sh +7bf16735ca553cf8c8d4f2110f581e94 gold/testsuite/icf_sht_rel_addend_test.sh +c072acfe20a945d106bd1616dc126258 gold/testsuite/icf_sht_rel_addend_test_1.cc +9aeda08248fb32af6fbaedc786c9b7e7 gold/testsuite/icf_sht_rel_addend_test_2.cc +e79ceba2f1f4bee0c058fd9cd4ba6aa2 gold/testsuite/icf_string_merge_test.cc +e3cc6d79af13ecc1f7bba5336d151b0c gold/testsuite/icf_string_merge_test.sh +ead6454590ffb78112089ee878e99040 gold/testsuite/icf_test.cc +5836f93b421f3a20bccd239587234dd6 gold/testsuite/icf_test.sh +ad8de88fb33fe0412f4003774aabf0bf gold/testsuite/icf_virtual_function_folding_test.cc +b21ad12a2ad23a55c7cd878016e3df6a gold/testsuite/ifunc-sel.h +86a84ae9d37784b4fd773b0fa913e75e gold/testsuite/ifuncdep2.c +36105ea36ae78f1358061b5cafe4f049 gold/testsuite/ifuncmain1.c +3223fc2f00c6328c56e1eef47619091c gold/testsuite/ifuncmain1vis.c +7a9dc0727592c03f021d90ec4b8d7fa6 gold/testsuite/ifuncmain2.c +52b232060dd2ed88ff3fe9a1c80206fb gold/testsuite/ifuncmain3.c +35c4dfe83d3aaa038b62d46203f84396 gold/testsuite/ifuncmain4.c +d35d19a47708945bd834852e319bbb8f gold/testsuite/ifuncmain5.c +db6ee45d78f8e4e03f54bcfa642978a0 gold/testsuite/ifuncmain6pie.c +101daa6b653909395b9cbb4c597e93ed gold/testsuite/ifuncmain7.c +3e078803e18828d03059de73cba7ba1c gold/testsuite/ifuncmod1.c +7c02df556b86d56318f50afa8533aa27 gold/testsuite/ifuncmod3.c +c97a7d851dfb9625975c8b6e35b32279 gold/testsuite/ifuncmod5.c +06f48e84f9eb7409965eaadbde00af5b gold/testsuite/ifuncmod6.c +26c7bea4cf5e792bca4e2592e4cba375 gold/testsuite/ifuncvar1.c +93105bfafdabb199590707af7a834ffc gold/testsuite/ifuncvar2.c +7450022de20fad74520e5baa717f5e3c gold/testsuite/ifuncvar3.c +a34bee1d1a7b4c41cb6effbf77f97ee8 gold/testsuite/incr_comdat_test_1.cc +b10259c8bf00761efc8701d17580cb30 gold/testsuite/incr_comdat_test_2_v1.cc +50fbe3aca10cb9fdc08b4c04a362e07e gold/testsuite/incr_comdat_test_2_v2.cc +637fc5ee63af1f2f527b80020e3b6197 gold/testsuite/incr_comdat_test_2_v3.cc +045b6eb30ab2bb2b9bf3f78ec15de004 gold/testsuite/incremental_test.sh +564d56618041450f346ab976eaa61c7f gold/testsuite/incremental_test_1.c +26ebfc5653a661a125f378a2c3d1a4d9 gold/testsuite/incremental_test_2.c +9581f14249af0949a34b805eca2c220c gold/testsuite/initpri1.c +a2724cd18628c0d98d8f5beee833acbd gold/testsuite/initpri2.c +32d55772fd511b95d87ade4373a30b89 gold/testsuite/initpri3.c +066dfe40c23c09af4ceb1975b9012583 gold/testsuite/justsyms.t +367168b4efa520b855148ce3f598a8f4 gold/testsuite/justsyms_1.cc +c60367832efe45fa6723dd66e9ac5b05 gold/testsuite/justsyms_2.cc +12d0f03a590433b78d1551a220c9a4ce gold/testsuite/justsyms_exec.c +4ae956afa49ee72ad6f1df0694d1edb1 gold/testsuite/justsyms_lib.c +f56a346fc9a2bcb6a4f0cc8f11c9a982 gold/testsuite/large.c +349094e7d3a8b7733f1ddb6dd7e9163b gold/testsuite/Makefile.am +53ab2814e7934bfdae92180956b38037 gold/testsuite/Makefile.in +4fdd47206bc0385125e6d021aa14307a gold/testsuite/many_sections_test.cc +583bee06b7ae8e1ebd4785762bb24bf8 gold/testsuite/memory_test.s +6531523bfc4f5ff52f3cef93263ed798 gold/testsuite/memory_test.sh +e82261fb2abdba3fd5af311575ad8443 gold/testsuite/memory_test.t +b33adf188e54ec8bf8a8cefe2a33db59 gold/testsuite/no_version_test.c +58be382ca4285cfee5767dc4eb27cb0c gold/testsuite/no_version_test.sh +10c717dd95cada8753723d2e9a973437 gold/testsuite/object_unittest.cc +30c3b467ce9d7551092d7f3c13886bc8 gold/testsuite/odr_header1.h +810b515797a1ae720dbe559c96f6f8aa gold/testsuite/odr_header2.h +d2cd4073d022541e7fba3162c7aa540b gold/testsuite/odr_violation1.cc +d64b7cfb04ba4e60eac6db5fa9309eba gold/testsuite/odr_violation2.cc +6a6f92c7fd2e7212418adb9095d72267 gold/testsuite/plugin_common_test_1.c +d05a8a5aea99e607efcf0ba1ed948914 gold/testsuite/plugin_common_test_2.c +f3465fa6136d73af4bd00205b504308c gold/testsuite/plugin_test.c +c57bb784354b0cdffe1b6b057259a294 gold/testsuite/plugin_test_1.sh +fa4b4ad9be3db3e90a35d2831867508d gold/testsuite/plugin_test_2.sh +35b2bf95e682aa0e452aa96723c43db3 gold/testsuite/plugin_test_3.sh +bca6113628db0717e20e2c1d9c0f857d gold/testsuite/plugin_test_4.sh +babd41199703733916a4dcee04cd5a66 gold/testsuite/plugin_test_6.sh +261da0c226d78509c9dd1af8638f6af3 gold/testsuite/plugin_test_7.sh +127d7782cc0229bcbce7010945937695 gold/testsuite/plugin_test_7_1.c +c18af6e29a62fb91d780c7429cc9075d gold/testsuite/plugin_test_7_2.c +8fc0a654e08f79cd998b0aeefaacd13c gold/testsuite/pr12826.sh +f67205103ab4ed24d22d1ee8600ab7a8 gold/testsuite/pr12826_1.s +4950cb58ee8f6195869df0249101e45b gold/testsuite/pr12826_2.s +a07e5eb89ec20de023a18d3682bae916 gold/testsuite/protected_1.cc +5dbdaa63cf9fea403a320f846563b01f gold/testsuite/protected_2.cc +228f14b040be1541678cefab27814a39 gold/testsuite/protected_3.cc +647a519351194b76e6d0bef0de0214f7 gold/testsuite/protected_4.cc +7af79e8f5d339223d69a8a762941643c gold/testsuite/protected_main_1.cc +859efb322e32dee1f4f8f21c6e5fb6bf gold/testsuite/protected_main_2.cc +b35d87a1a4f5b3dfe3d864916e042967 gold/testsuite/protected_main_3.cc +5cc488b6518c24ca2409d55a3cc923a1 gold/testsuite/relro_script_test.t +a37bc67f4dbcd87bcaa6c6b220c27513 gold/testsuite/relro_test.cc +ec6697af4def9dd74a3fa4dde6e34a0d gold/testsuite/relro_test.sh +88b854e0c2b0c5319da258766af03284 gold/testsuite/relro_test_main.cc +271248ad882f12684eee0b6dbf55bce8 gold/testsuite/retain_symbols_file_test.sh +39180a068348fd1c1215a38b8d633068 gold/testsuite/script_test_1.cc +3a563adb4df0d719dd6a800daf329277 gold/testsuite/script_test_1.t +4210035cfd18d6e9d68b2718a18f8b27 gold/testsuite/script_test_10.s +c56033af9c8c34196fac9eed159b9115 gold/testsuite/script_test_10.sh +085d6ddaef797dcea9d2e1707ee361bf gold/testsuite/script_test_10.t +4411366032ece98b7c55998549f53a5c gold/testsuite/script_test_2.cc +953d49b1bfd051dd9d9f69a183443d26 gold/testsuite/script_test_2.t +19451d78fa1163268664f188e9211b78 gold/testsuite/script_test_2a.cc +7b0e5b1d445feea506abb7da9d8ef168 gold/testsuite/script_test_2b.cc +2939fbff7932bb95bf296d3e610585bd gold/testsuite/script_test_3.sh +885b1f4a24902b0c2ad06c4fb9d27196 gold/testsuite/script_test_3.t +689ea70c4e0d8f011b321a088b5323eb gold/testsuite/script_test_4.sh +d8a46620baae25402bfe41a40188362e gold/testsuite/script_test_4.t +14b92c452d67ab355f99b9525dcc9224 gold/testsuite/script_test_5.cc +066d211a0717c0d74a5eb91307d14794 gold/testsuite/script_test_5.sh +8d3e985a53460e7e9fb7ace265876e40 gold/testsuite/script_test_5.t +3c91f257078cfecb860ee6a1c64591ff gold/testsuite/script_test_6.sh +c1668bd6f86d1cff885b5e5a138d1f89 gold/testsuite/script_test_6.t +391f5ddcd92576f694447b94d92c9aef gold/testsuite/script_test_7.sh +7619a9f323c97a923fb675befc13a305 gold/testsuite/script_test_7.t +ade28ed2703c3b34f9e3d6810191363f gold/testsuite/script_test_8.sh +4e78bec9aba83de38c35529d4bde606b gold/testsuite/script_test_9.cc +edd3e81ed58f2029416bd36a17ac28e2 gold/testsuite/script_test_9.sh +059c878a569b3bfde82fb9f6877c2e5e gold/testsuite/script_test_9.t +8c915430abad523a698b45f495830f44 gold/testsuite/searched_file_test.cc +d25ad22662e92621bbd7ffc1497a76fe gold/testsuite/searched_file_test_lib.cc +5f9efd4bba4273c4f1f93c8dff3690bb gold/testsuite/split_i386.sh +92c11cdb9aea842d594b9424e9b2e3d0 gold/testsuite/split_i386_1.s +66bd8fa6475d58e4d5c1250282207149 gold/testsuite/split_i386_2.s +519c8104a43ce535996d4e2a1e1f24e8 gold/testsuite/split_i386_3.s +99f5475ec63903df570d418a0b08c728 gold/testsuite/split_i386_4.s +77b0a399acc870bc90a5338a92e2a599 gold/testsuite/split_i386_n.s +e1d576034c0c7dbc847f4c7e3df553d1 gold/testsuite/split_x86_64.sh +f63fdcb4a6e54aa57f88de09c817b52f gold/testsuite/split_x86_64_1.s +b60c470795e496998f11ece6956a2002 gold/testsuite/split_x86_64_2.s +85b4c26998b04b65acd6f6fd7801651e gold/testsuite/split_x86_64_3.s +c3580b83ac55e873bf841065173dd2e3 gold/testsuite/split_x86_64_4.s +b0c0742e6df0a34955d20797a071639a gold/testsuite/split_x86_64_n.s +fce9bf62d81837159afeea4fafac82f2 gold/testsuite/start_lib_test_1.c +c749fece8a8c8ad552933c2cdba1b73d gold/testsuite/start_lib_test_2.c +3e26e8637b2167de82f07c5258d6379a gold/testsuite/start_lib_test_3.c +b46a3e843a80ba9375dab2cfc3164a9e gold/testsuite/start_lib_test_main.c +04d742ae16a0f5f8f3213ec68971c51d gold/testsuite/strong_ref_weak_def.sh +7462c5f25ccd406fc6f9b0451cfd9b50 gold/testsuite/strong_ref_weak_def_1.c +b5addfc24c12a59a153f149fd7e34d06 gold/testsuite/strong_ref_weak_def_2.c +92a2f788eba64b331755cc0579f783c2 gold/testsuite/test.cc +61a1a39977549e93f347220686ce4f9d gold/testsuite/test.h +865cc6d89aee65b3ec22f99a866c5c34 gold/testsuite/testfile.cc +7918d8c7bd159119eedbb2aad20da05c gold/testsuite/testfile.h +5e680f660da830eeb807e760d248c887 gold/testsuite/testmain.cc +df8a86dbed6dfbb59ea786b9c22f0c10 gold/testsuite/thin_archive_main.cc +b3255ee5cd1b3c111c3c116d2f3ea14e gold/testsuite/thin_archive_test_1.cc +a6c10c3b107a5fa9b54f467bac65c5c5 gold/testsuite/thin_archive_test_2.cc +797d9b9004a5862e433154b6a19b80c0 gold/testsuite/thin_archive_test_3.cc +da392c8e272fcca3d22c3a6bc4063a0e gold/testsuite/thin_archive_test_4.cc +bf756e1012d336150378b6cfc9dfd081 gold/testsuite/thumb2_branch_range.t +9362c778a05845384fe2994a2892e9e4 gold/testsuite/thumb_bl_in_range.s +c3f11553ea12931497c562c3864aa594 gold/testsuite/thumb_bl_out_of_range.s +c8ea5705d6e982f8268f8f9a4137c150 gold/testsuite/thumb_bl_out_of_range_local.s +7d6754aa40903fb37d2b2624a193417d gold/testsuite/thumb_blx_in_range.s +f94fc31d77082d754091a1f272948813 gold/testsuite/thumb_blx_out_of_range.s +3731e95f245e102e1d863250a054b537 gold/testsuite/thumb_branch_range.t +314cac0f6d51d09ff576a5afc1445a36 gold/testsuite/tls_test.cc +e82ff898000bc8e949ed124b65de6aaf gold/testsuite/tls_test.h +2e21e4374970271ac4a65291bac0a597 gold/testsuite/tls_test_c.c +0330239e0c853bbc74e926bcc2c226ad gold/testsuite/tls_test_file2.cc +fb2c02bee4360a3c68dd84cc13e402a0 gold/testsuite/tls_test_main.cc +c0779b92c2034e44017e299b8439bd0b gold/testsuite/two_file_shared.sh +5215960d6afbb41b8e45ee0a37a19719 gold/testsuite/two_file_test.h +90b895eaa66266a27d57763d2adce03f gold/testsuite/two_file_test_1.cc +5978286c8c2ab7fc747a768c45579a52 gold/testsuite/two_file_test_1_v1.cc +bd95fd9d6127f3e1294207665cf52370 gold/testsuite/two_file_test_1b.cc +4e30b6566dfd5650fe87774ed84cbaf9 gold/testsuite/two_file_test_1b_v1.cc +d8fa3345100ea2e8255d8a16f329efb7 gold/testsuite/two_file_test_2.cc +a455fd0eb4200e45799517762de553c3 gold/testsuite/two_file_test_2_v1.cc +5b56f88017fc47926f1d9c3f5989c1e3 gold/testsuite/two_file_test_main.cc +268e374cc74b6a5ef4552288dc23daca gold/testsuite/undef_symbol.cc +3dd33a4f5afe7dd9271b34b797d0d84b gold/testsuite/undef_symbol.sh +5715070e84f62d6ee8e377046e63e366 gold/testsuite/undef_symbol_main.cc +bc58a234c75219d474aaa67e22656566 gold/testsuite/ver_matching_def.cc +a60ce5a99c12565ed5c40ddd820dd951 gold/testsuite/ver_matching_test.sh +beffa956f70cbc4a1732fa99fe909fc3 gold/testsuite/ver_test.h +384ef699a55216bb312602b164af8ca8 gold/testsuite/ver_test_1.cc +7e5064c7006e2d231f09ff08dac42c29 gold/testsuite/ver_test_1.sh +03748fb27f0867c9a57807cf993d21cd gold/testsuite/ver_test_10.script +6cab80863aca6054b92129e369543636 gold/testsuite/ver_test_10.sh +d11105a86e14720017b1e2c269c7953d gold/testsuite/ver_test_2.cc +c6c16debe9c8cc965791617baa2f47ec gold/testsuite/ver_test_2.script +06f65e3a91f1371690f279c37f3053a1 gold/testsuite/ver_test_2.sh +2fcdc5d9214ded2426b4e40af8f6d499 gold/testsuite/ver_test_3.cc +068472b6093f7e002925d6efbe499d0c gold/testsuite/ver_test_4.cc +b2d01290dcbd043c7af43d3755d6fd7c gold/testsuite/ver_test_4.script +c3a654287019a6cbefe256d2b437b8cc gold/testsuite/ver_test_4.sh +f44eab73816b100fe90be7878e8d9203 gold/testsuite/ver_test_5.cc +ebe0c7c7674f000cd9681763cc254431 gold/testsuite/ver_test_5.script +56969f9f537a373c1027bc9c1047f491 gold/testsuite/ver_test_5.sh +910f0387b9b174a4f772c8a480cd9291 gold/testsuite/ver_test_6.c +e4d053bdeedc7136f86dbccb3f4143f6 gold/testsuite/ver_test_7.cc +447c7a6d3ef5dba00f56f4a3617de313 gold/testsuite/ver_test_7.sh +b78ed4c062f3af1aa2d7d8e0af109b64 gold/testsuite/ver_test_8.script +dc1f223d30a0a313893471d6cdb65410 gold/testsuite/ver_test_9.cc +3ff3ea044c805be646385eeaab979e07 gold/testsuite/ver_test_main.cc +f05fb8eff1750298a54b0484490a571f gold/testsuite/ver_test_main_2.cc +aebe07d6e28f2c7ee5cec8d74b63dd54 gold/testsuite/version_script.map +5bf5e9fc880e5b7e93b7d8d964a900a4 gold/testsuite/weak_alias_test.script +5a714657e1f0769154be3d12f4d30473 gold/testsuite/weak_alias_test_1.cc +fe9f3172d0ed0fb2ae23ae0b142b9c5f gold/testsuite/weak_alias_test_2.cc +5d5efae0d256bb2f467ada9a855911b1 gold/testsuite/weak_alias_test_3.cc +36c37c602257cd02876083e428f56384 gold/testsuite/weak_alias_test_4.cc +b0df37e2239b69770ce3eafa9e9973e4 gold/testsuite/weak_alias_test_5.cc +43d9f83948e1689acdf6b7f7cd91b6c7 gold/testsuite/weak_alias_test_main.cc +e629f6c0e53c86f603909e751e690f9a gold/testsuite/weak_plt.sh +6931c792306748004ca9badc85818bfd gold/testsuite/weak_plt_main.cc +2cf9ee7eb929562a3275234d5ed8da59 gold/testsuite/weak_plt_shared.cc +75c3f8bbad7bbd41407f745a912a96bf gold/testsuite/weak_test.cc +2dbbc97ed424629b8db4d3edec61a0d6 gold/testsuite/weak_undef.h +eee2f2336dbd6872707ff8583eb1a5d3 gold/testsuite/weak_undef_file1.cc +8ae4b91e1cfa5b8944a13b22b6024081 gold/testsuite/weak_undef_file2.cc +fc26afb96f348fd06e66eab4f0eb5576 gold/testsuite/weak_undef_test.cc +8d96d1fbfa1c61fad71e0d371a16b067 gold/timer.cc +7e6cb7703266905dc977ccd2fc2fdf61 gold/timer.h +fb2f2b23678fd9fe40ce267f45866747 gold/tls.h +9dc53739bd66ed923d6aab774d2fbf9b gold/TODO +4e24824b3b6dcaff1d88e01e658f6d54 gold/token.h +d5ad2a6b0e7a516c8289b050fe442c6a gold/version.cc +2dc56f3a7a1ef7b914952877de97bd6e gold/workqueue-internal.h +15304cbcde24f8a4428f965b57853ea3 gold/workqueue-threads.cc +b15e7f397216d5a51dd46201ebd53567 gold/workqueue.cc +224da8f6a03c481c61cb746bafc9f401 gold/workqueue.h +6b11dc3372330d0627453f26fbce346a gold/x86_64.cc +046741ffdf19b6092e26040b060a6f3a gold/yyscript.y +b167dc5dcf583c07feecea0f8003e647 gprof/.gdbinit +8257446e682118e49bf3006a90c44bd9 gprof/.gitignore +c25e30ce37ff2c7dec4c9416e9def020 gprof/aclocal.m4 +b7f3f1dbdb1af21fadd9bad6efebe8c0 gprof/alpha.c +7a5e6b6d3e5f41055c94ac0c2aba4686 gprof/basic_blocks.c +68337233c4fbbae70f0c91b14ac23771 gprof/basic_blocks.h +f28a2937af419e630b9fa9fa69f92220 gprof/bb_exit_func.c +bb4081da1d9c7c6f056ec52fe9bc2ac6 gprof/bbconv.pl +5bbcdaebdace1394d7b9a9e664af5ccd gprof/bsd_callg_bl.c +cadeef23b67be4bb67efb8d51c426a84 gprof/bsd_callg_bl.m +dba6b3485060a9752a60203a681f9eb8 gprof/call_graph.c +5a84abf379cae2ccd9ce443822e8ca88 gprof/call_graph.h +d49a8ea21b682aa7157b90da9d415692 gprof/cg_arcs.c +e8684da93359ad97b5c235bab5c5474d gprof/cg_arcs.h +dd5eca848b88b6d2fe6f0eaa280c0fe1 gprof/cg_dfn.c +a1f9f8c6502a23c0f11956f1854376a8 gprof/cg_dfn.h +397aa6fdcf671321fa19cb131b76ab72 gprof/cg_print.c +7d0374db6f692e7a6e1fd69f2b7311e0 gprof/cg_print.h +93ca5d4377944b7ed291c35b59cc3bcd gprof/ChangeLog +a160966de58352bbe3351ef84b65cc5f gprof/ChangeLog-2004 +59394b05b4e06d2a4e779bf09e828a79 gprof/ChangeLog-2005 +6910e91285ad062c6c924f5a1dc9ca2f gprof/ChangeLog-2006 +b87ba12a146472b54416b46f18fa371d gprof/ChangeLog-2007 +40e0bc6ec4ffd8dbd114f18ce6a2abac gprof/ChangeLog-2008 +557f36e4287947ab6630317f0424188e gprof/ChangeLog-2009 +bd58b6671500d3bc2d84204f35b6a643 gprof/ChangeLog-2010 +7be7f2cec102ed4a91aba8985a704085 gprof/ChangeLog-9203 +745ff1b458c66a2bdcc3d275761355c9 gprof/config.texi +f1e822f1c45291c7ec965337ae5d543b gprof/configure +ccfe0b08eafef379d243a00d97e9d473 gprof/configure.in +16a778434d1cd5848765ca6ab255fbbe gprof/corefile.c +b0ce8fa6fde924d0e1883ade40c89573 gprof/corefile.h +cec602aa7e8925e06a658a3060d42c1b gprof/dep-in.sed +072910d553f79906db69fa7c0e956bba gprof/fdl.texi +6b0c66b9f8ad2f32fed0575bc4f10bbd gprof/flat_bl.c +d6498bb2d3ec24087785cd109c215067 gprof/flat_bl.m +845df53b262986e413ab8333f3b60463 gprof/fsf_callg_bl.c +609bbce6f5cedf6b0c8d25c3061b582a gprof/fsf_callg_bl.m +b908740cf1594cdb62130cb966e0a79d gprof/gconfig.in +2b39bf82ecbb857963231a1da2b79977 gprof/gen-c-prog.awk +15df93a147b06f0f0d8cf05f2939ba4f gprof/gmon.h +f7577744dca93e5dc3fd833e4db52c38 gprof/gmon_io.c +bc9603fc7f31fc94bb1d3f9bd69faa51 gprof/gmon_io.h +90584e94b238bb26c1dd5af55a09033c gprof/gmon_out.h +ba427b1fe36ebc7769b7b9d6df88dbff gprof/gprof.1 +4c25239e032ba1183b18941e47af0b20 gprof/gprof.c +ef2f65f1bb0fa0c98a044942eb493e15 gprof/gprof.h +5b39d86670cb03213d45f18559d5063d gprof/gprof.info +8bcf7676f463ff82f243c9c5f0a2570b gprof/gprof.texi +78367cd648e22d38195bb574293e3be5 gprof/hertz.c +24db7d8a9df2b0b4bf64f282fc3035a9 gprof/hertz.h +f9d86d11e63224ffa1dfc385797e872b gprof/hist.c +b0a33ff164aac1e9f56550c1194993bd gprof/hist.h +a6429d3de563eb0422db7c58555a7b0b gprof/i386.c +d618facc3e8ce8bf3d02ba452e1be6ab gprof/MAINTAINERS +f43a7ce0699f7a7e7bb15cd62bee00c9 gprof/Makefile.am +ed79995a32be351e6fb317e1dc76217b gprof/Makefile.in +92a358204dc90732f5c3ffc4d16ef9dc gprof/mips.c +5e484f64f2a4e94587e5a5b34a051608 gprof/po/bg.gmo +b55b2ff070169006067a250ee0221783 gprof/po/bg.po +48e64f6435b31c4a0cd11c906a0d206b gprof/po/da.gmo +8eaf82a729b46891007cb58e3028f90f gprof/po/da.po +f1c150dcdb59dfcf53610b240c629ba7 gprof/po/de.gmo +852de791b4a6f1ea1af26a44aff56361 gprof/po/de.po +0b53f02ce3a8eb7bb21dedc5b9d9a6e4 gprof/po/eo.gmo +ad78a013a4bb557eb02c0a4c68e3a0aa gprof/po/eo.po +3bd53d1b01f6bd62d97d53f552a56cf7 gprof/po/es.gmo +c64dcbad3d4cf13bfb95824e7f948f4a gprof/po/es.po +871b46017f0b1344ca87d65b49f1db6e gprof/po/fi.gmo +bedf2b91236742150e4a4b618ed9d2f4 gprof/po/fi.po +42e353d68b836d3e53533f27ca76e83b gprof/po/fr.gmo +c5e27689bcbf9e35ab33c5c495dbd242 gprof/po/fr.po +82d1a6e0345a6dc65b323f04ea1f1375 gprof/po/ga.gmo +c46ba65e8300569e05946980c1c7c9a2 gprof/po/ga.po +242b1947c33a01da9b769561d24bb37d gprof/po/gprof.pot +c45783507056bc5710c73362dbe5fb8f gprof/po/id.gmo +24c804330a015a44c58c8d307a2a3947 gprof/po/id.po +b6b3fdee1867107468c837cd28e9f2cc gprof/po/Make-in +7dfd99c4a1fcd67218ddf18e17d82cbf gprof/po/ms.gmo +9b3ec05fd4e9a4a07b6c64a7bcf9266c gprof/po/ms.po +8fbf0eb42cbc660fa4f531e95ea0827f gprof/po/nl.gmo +07e0b8bdd5cf9ccfafc671d8a18e9860 gprof/po/nl.po +954b09a7062a564dc338de22ef52c6e2 gprof/po/POTFILES.in +e3fddb2aecf0942f7a13aa5348ddd11a gprof/po/pt_BR.gmo +161f4f55fce356f7094d855fc8e5b792 gprof/po/pt_BR.po +4f7dcbcf961a162151794fbd0be3da7d gprof/po/ro.gmo +84b22161acbbfc32b35dcf3c9a4d7efa gprof/po/ro.po +4ccf806f6741dd20dbd51ad675cf4877 gprof/po/ru.gmo +6577e9d3a420b1c2a584846bca2771a5 gprof/po/ru.po +6caef4d7466f584c8a1833f08dda3a5d gprof/po/rw.gmo +d324bc814fd81a744f853d48ca2f8807 gprof/po/rw.po +6f3be1926b6465af05884a7bbef70084 gprof/po/sv.gmo +660a4c733d22fd06cafe2e5f2c75874a gprof/po/sv.po +e8a064faa7431c3994490313f73d4823 gprof/po/tr.gmo +ecb9cfdafed941c2fecc6273f53ea575 gprof/po/tr.po +6672c85403a880ff77896d264d4e1dd6 gprof/po/vi.gmo +604e0ce442e10d12a8e1b6c5c3318cfd gprof/po/vi.po +43648972d2edef291b8576a493fba059 gprof/README +b37c1ae4e02c17078cb33f195df6c840 gprof/search_list.c +45b40bf6f6d8e8ee594f0fbbacdb5626 gprof/search_list.h +82eeae5aca49920314ef3f149e5ea5a7 gprof/source.c +f5bcd857626c6d9c14653f57431c36b7 gprof/source.h +54d3572d0937665e0916878d1dc5130f gprof/sparc.c +1ded054093de910d9786c62bc4fe8cc6 gprof/stamp-h.in +49efc7499c1ec4be045bc78c1948f7f0 gprof/sym_ids.c +6ee9f7aad26dd9bd38036a6c7988f9c1 gprof/sym_ids.h +ebaa562f8fe94865131c9b04734f0c91 gprof/symtab.c +8978a1f6bb28ebf3d289f6a0b4294e43 gprof/symtab.h +737ea860b5dfbf959e6788867f07bb33 gprof/tahoe.c +84c06350a03466660f0f691ed1220657 gprof/TEST +6ad1234ccac48218eab0cd8e116d7a63 gprof/TODO +d2e2755377f12d1da4af0a2232cdea8f gprof/utils.c +69a2b7efd7466aeadfda109d360f088c gprof/utils.h +f6a3f0884b4107faf0b7000f6236e4db gprof/vax.c +34a574860b19567290ef5380ad1a2add include/alloca-conf.h +9032b8a915f567d2b568e53ac7ac5b7a include/ansidecl.h +9bf143ae20d22d602af1d3639222e405 include/aout/adobe.h +95a11765956c61fab8c3a8df4512c2cd include/aout/aout64.h +2dc6a66df1da224f7494f46a56dbf0dd include/aout/ar.h +d6a0eb4eb539859174c017274cf514a3 include/aout/ChangeLog +0c11e5e02f70aedc75c45feb5691d993 include/aout/dynix3.h +5843207325783c921dcad8f11c9fa94f include/aout/encap.h +5535a653d8c4500b71c03d39cfe0ff18 include/aout/host.h +ccbe8dbbe26ecc468e56817063dca616 include/aout/hp.h +017739730907b82915851f547d340b24 include/aout/hp300hpux.h +d82993bf02befd5682dcd44b076ad991 include/aout/hppa.h +843da52f6f139f2b0136b5d9e0648ca5 include/aout/ranlib.h +4a3bdd2dd23d30f487baf5432c8d1b20 include/aout/reloc.h +f82e6a620da3f1ed5a372941cb8aaa60 include/aout/stab.def +300c0f2ae0122d204d21af15364632c6 include/aout/stab_gnu.h +60533ae00228889f83a45c3d05e3e14f include/aout/sun4.h +1db71a14c0f6670060e4d92570413cbd include/bfdlink.h +8899f3b1094aed581ee5ce21fb77eeb5 include/binary-io.h +f3c1e3130022d959443585d2333df0e8 include/bout.h +290ba69831c663db0eba93c8df043251 include/cgen/basic-modes.h +1fc7474f7dcecfd367aca58685f80784 include/cgen/basic-ops.h +a952fcdbcbee3972d46d86c07c7d2c24 include/cgen/bitset.h +03c05a0d9d58b7b3ba805b3565ae6667 include/cgen/ChangeLog +3945456b78c6641d130fd7cc156b13c9 include/ChangeLog +4263432a72ff47ed8bf420208ee7eea5 include/ChangeLog-9103 +b912255f6e27ae91ad42e1d7ac095574 include/coff/alpha.h +76473e99ea362a19e104ac2974ddf083 include/coff/apollo.h +e4635227d1ae2326c3a255390699d71a include/coff/arm.h +3c016550ca6af194ea1339c2e6ba372e include/coff/aux-coff.h +ef82b5f6eb836c079d0ec9f2423d6878 include/coff/ChangeLog +3bad510fca185cf87d7b28b5e6bfe35a include/coff/ChangeLog-9103 +21aafdfa874270a0c1cd5fe8814e5636 include/coff/ecoff.h +a7846784c562274dd60548b6f6982a3a include/coff/external.h +16c0cbff134e50e9d1a22b00bd14ecba include/coff/go32exe.h +ee904ce85485ac8f14171530b1a8eda2 include/coff/h8300.h +68864eac4f79619d079902f9d024f771 include/coff/h8500.h +48a80341899d6027eff2eee34ed64bf4 include/coff/i386.h +4076f5d389f96789d30dafcf7bba4259 include/coff/i860.h +865b4970180497b50c10cf0d42d1971d include/coff/i960.h +b4230ed90450294aa5dfe15948e8e0a8 include/coff/ia64.h +dd821a767d324f8a5f78fa1db1267387 include/coff/internal.h +390c06c0c15fbd71ea17660f5b725895 include/coff/m68k.h +2e9bd273421296554e8e7bdaf30783d0 include/coff/m88k.h +bd63cdac412c78bd01e66d080f8db24d include/coff/mcore.h +c7f00e9cf8b40362a1d6d53ac5f72b3f include/coff/mips.h +e39fcff9b9b037210d4179939c2e5440 include/coff/mipspe.h +e04cd0508f438882b386e0d4a3ba03ac include/coff/or32.h +1df66128b6ccf64c7cee7b686fb30bef include/coff/pe.h +a455fbd246f05ebb0bf66f690adb5a25 include/coff/powerpc.h +61b3f01f01ee967546a45fc90decbf92 include/coff/rs6000.h +88ecd5e08c4c3f1a4bf9c85dcf9e6b5b include/coff/rs6k64.h +b2fe38acbabcd74e21ebb084348c6a40 include/coff/sh.h +47e28de596b5c484de7fd948f55b1d0b include/coff/sparc.h +49952fda1e759e5aa659f8f78d7e0ba0 include/coff/sym.h +9548a06f2a9fb6be7f272df74ead65b7 include/coff/symconst.h +5599c91440707355b854aded6fa13295 include/coff/ti.h +6cc38eec1b5b24b287ad375e9ae20d24 include/coff/tic30.h +f96b617a9b423ceffcb9ec89d921eac2 include/coff/tic4x.h +cef5a0d8b9fa08040372dcbeb9a44b20 include/coff/tic54x.h +d702c6ecd4ab88caaeefab21c1d47fdf include/coff/tic80.h +ac0cc9e33ae81d7800e1edb4a68be73f include/coff/w65.h +aaf4db02e2d234613e8c89ee80bff7b6 include/coff/we32k.h +c9ca24217769549d3b1a88ae2d219412 include/coff/x86_64.h +adb495746480cf5e4bec3fe6c3d3bceb include/coff/xcoff.h +2abcef5d0d6f17bc50116ce28c2a9c79 include/coff/z80.h +598577f829ade2923058b3aa70fbac61 include/coff/z8k.h +59530bdf33659b29e73d4adb9f9f6552 include/COPYING +d32239bcb673463ab874e80d47fae504 include/COPYING3 +552d5fee651e1276d17c0ad69e6e2364 include/demangle.h +00b2d16b5f1a99fc74893b0eaae554b0 include/dis-asm.h +5550f59655329d720b345cf218922666 include/dwarf2.h +7e968442c6c0231dfe2def312758e765 include/dyn-string.h +a0be754e05a23a8ec6b90db035b264fa include/elf/alpha.h +07b373cba191d679f95f44fb56ee2f62 include/elf/arc.h +f0fec15cd5722ca40e791ceb6fff0864 include/elf/arm.h +cd6e7c61fd149a7c60a81e3f3172ab6c include/elf/avr.h +6cdc5aea929775d124edd759932f0f21 include/elf/bfin.h +fb94fb544380d87e639028d2cb08d8a2 include/elf/ChangeLog +98f9c5b892b53edff47e277ff7d497f8 include/elf/ChangeLog-9103 +c7a329af90a38c1db550ad7c283cd51d include/elf/common.h +833f67e93dfac42af486802c610b6e50 include/elf/cr16.h +d557cb1da86b222f1d446100b403e863 include/elf/cr16c.h +4a1fffce3fb4620d590f27cc8f28fe6e include/elf/cris.h +2f58e940dabc8b46822bcbcd5d53a341 include/elf/crx.h +155a903657d20855f461c6f75a3739c3 include/elf/d10v.h +9be4d2fdbc9d1360c58311cdcbb3baa2 include/elf/d30v.h +019dee3ec6de49f6d0ced447a205a765 include/elf/dlx.h +3c1229f9c0cf59c62e1008761089fa45 include/elf/dwarf.h +e13648b26b8f4455ba86c4762dcbd5bd include/elf/external.h +ddcfe806124573919c45e574654f1aa3 include/elf/fr30.h +f88e15682bbe1e7510da3cd862bca8f7 include/elf/frv.h +a6628d3c5a0e2814931c9dbedc3817c6 include/elf/h8.h +ab421f84fd2c6ba63f16f7b4f64636d3 include/elf/hppa.h +9b18946aff312ca641ac8e1fc613a389 include/elf/i370.h +46664d765c43e353af19ca90fe69034b include/elf/i386.h +1aff1942cbf7aad0cc528362d5462b53 include/elf/i860.h +bd1fb91bd2d5525fc0387aa51f12061f include/elf/i960.h +a6df09804468c631260d4aae50f383aa include/elf/ia64.h +c77ae174f27c7490e252c18e2c04ef1f include/elf/internal.h +6eb429b4b795c777073550debb618c03 include/elf/ip2k.h +2232e60b45500e60610102768597b74b include/elf/iq2000.h +c419f9feca3ab0795a69b694858b8508 include/elf/lm32.h +adc2d9020e08eaab707704eec6c20168 include/elf/m32c.h +9cf7dfeb398922addf1273a9ed9a1cb8 include/elf/m32r.h +b79cab44748c89662f9ba4c8eeb5e016 include/elf/m68hc11.h +405a16584c84e60c8b230c7d1f449fa4 include/elf/m68k.h +acd354050b83b2aecf2c78e0c2fc3b12 include/elf/mcore.h +d81e7a0dca173a1ba09c1999fba38b56 include/elf/mep.h +f330b5f3671b02e554c928157c1edd6b include/elf/microblaze.h +45dd9dc4045aa4cd9019837bc8f163d9 include/elf/mips.h +b841c8ba42956d6f7e17537ce63236c8 include/elf/mmix.h +7ed67b249c64a72d05d9b4d87554dc18 include/elf/mn10200.h +ccc949431c77de0330ee3c20548b7e67 include/elf/mn10300.h +71e4a33766312419df99b0e62c39e445 include/elf/moxie.h +eb3d9aab50e9c9fb6e18ad4812db0118 include/elf/msp430.h +bbbd9d7f4e8f79f4d93e007aa07bf778 include/elf/mt.h +b63470ef405cd3627e8a4fbff6bfd5e9 include/elf/openrisc.h +8eabdfbd28ae6198beccb31177efe06e include/elf/or32.h +8adb19e5cc46d08bd2e4956e35270751 include/elf/pj.h +7c23650992c8b40893751f297da52275 include/elf/ppc.h +831ad133be87ebb0c334458ac71e9b28 include/elf/ppc64.h +b465c7a7c9368125ccd6102fafe986c5 include/elf/reloc-macros.h +ee51909dc0566fac5333286a96f7c57d include/elf/rx.h +ed1da1299b5bfacd5d3fedda42866edd include/elf/s390.h +31572c17886e82b32afee52ddac4b8c7 include/elf/score.h +fdf0c78b30e3def4265b84749ac7636b include/elf/sh.h +4d28901c9577fde21e67f7ce7c60e0d4 include/elf/sparc.h +14a24081c6a435663296024c32f2aaea include/elf/spu.h +da1403a10c2f7da13868f1995ed765f8 include/elf/tic6x-attrs.h +5d85ecbb50678de258bdfedad761475e include/elf/tic6x.h +ce8fb71e4fd9470fdc0b3c6ca2a6d620 include/elf/tilegx.h +d134e5d222ab02346e1bdc467076c9c5 include/elf/tilepro.h +668ad953ff79fab28ea63be3c5e77db9 include/elf/v850.h +cad5c91a81e838b439e530d350909b47 include/elf/vax.h +08fba636fe2637ddc5176ab120cce6f0 include/elf/vxworks.h +d12111ea734fb1577739f855f8ca6fec include/elf/x86-64.h +4bc7ecb76afcc22d26fa3b926b6daada include/elf/xc16x.h +08c0eb5204c37ddb199cbe638ff33c53 include/elf/xstormy16.h +05ae7083595b682022f2dc9eecff9877 include/elf/xtensa.h +6cd2afc8e147c2eed4404d0845dfa47a include/fibheap.h +bf41284ba32805344a0d778b39b0220c include/filenames.h +5029c34a63aebe10502a4059ffd7e427 include/floatformat.h +7d6baaede380aa3344526a4bbf8a294f include/fnmatch.h +b2cd17a9267bc2e92df461d3170cb15c include/fopen-bin.h +87444b5c85b3c2bc734f8b86157b15db include/fopen-same.h +90ae66560d6f5a60f2be1493783f4256 include/fopen-vms.h +76e89e58bf3bcb64a9a124ca1f6f79c9 include/gdb/callback.h +b06a09b21304623717f5d965810d8d74 include/gdb/ChangeLog +88890aba9ba9a379347fc0f13ad20e87 include/gdb/fileio.h +762106ad7714870a3ddaf6dd0dab581d include/gdb/remote-sim.h +1a0caaf47b41137becfee497016350db include/gdb/signals.def +7ff71ed6a6d28fa5e33ed9fb65fea692 include/gdb/signals.h +a66d1966247983edead93b50886aa02f include/gdb/sim-arm.h +3dbba30001272224cfba8454d542deb6 include/gdb/sim-bfin.h +2648dd616f0b5fa37b24d72c54986c6c include/gdb/sim-cr16.h +6568bb778a0a88e4d6cff2360d383eca include/gdb/sim-d10v.h +0a293f5480904f2f5a50fc03b8bd440e include/gdb/sim-frv.h +e2c61423df92fac36a88dbdcb259bec3 include/gdb/sim-h8300.h +657d71193f5feb019a2d4a45e60581da include/gdb/sim-lm32.h +def9cb2b62622a79033963dad3747b0c include/gdb/sim-m32c.h +ee09f0399e70412f1ea7e35060c572e4 include/gdb/sim-ppc.h +b5f795033999cf7d38f696d21da22c63 include/gdb/sim-rx.h +3e4ad006c2a0987f4bb3aa22bc71ff8b include/gdb/sim-sh.h +c6c79c7650e939987e61782932471d6f include/gdbm.h +2df953364d736c4cc07d3f3b0ff63714 include/getopt.h +b14b5907a8d21fe886487feead7161c8 include/hashtab.h +27e2b82efdf39b6ec9889dcc03468d28 include/hp-symtab.h +97a8767b7f95bd5bb7207d0215541d10 include/ieee.h +05580593c4144ecc727aec0ba59701b0 include/libiberty.h +741cac90249849bb61230ecd5fb777de include/lto-symtab.h +3835b04e73ad824ae9a82745d6a9a310 include/mach-o/ChangeLog +e47902a1febdb36ba352b012fac028b4 include/mach-o/external.h +bc5266173f3a7c58944d74ccd77ab9c1 include/mach-o/loader.h +a3be11cb068f8f33831c6f1233d92056 include/mach-o/reloc.h +246ec9592b8643e0436200783361dda0 include/mach-o/x86-64.h +d618facc3e8ce8bf3d02ba452e1be6ab include/MAINTAINERS +e994d64a5f8fff3c81791b6d8a1d09b7 include/md5.h +8987130f1c1fc6547fc26cc7dbafe0aa include/nlm/alpha-ext.h +b3429a1bc8a629a099df6e98ab939602 include/nlm/ChangeLog +daee4cce32528154a2b851cf0d306c8f include/nlm/common.h +c5c9d05c1d16379fb9f96c8ec954c5c9 include/nlm/external.h +978d7523b06b3abf40b17dfc4f5ce74e include/nlm/i386-ext.h +09f97c76b2c744131a200bdc7fa33c35 include/nlm/internal.h +ba3e2410c85ea661024a7d27360afb80 include/nlm/ppc-ext.h +555d624236f77f04e2063d455fdd3c97 include/nlm/sparc32-ext.h +9086b04095940294729fa4cb1525a519 include/oasys.h +44b3dbe9efa457af0cf4f032193dd1f5 include/objalloc.h +55eaec63943895d6e0b02bfdf96108cf include/obstack.h +deaf0df0e2d6c5a7bf0ee9caba4305b1 include/opcode/alpha.h +cee84b6ac4bf5ac5b70f37c43a47f8ec include/opcode/arc.h +7394461a9415dc18f047497f1cf3ea2b include/opcode/arm.h +a0c8eec19b02cdfe7360b3a4a8677ea2 include/opcode/avr.h +3f33fd3299b17a72ced502e07febd074 include/opcode/bfin.h +15a2fb48bf2c3ad804768e1e0d592960 include/opcode/cgen.h +8fede7d5fa6ded6ce0c1b72fe8204f63 include/opcode/ChangeLog +422ec9ceff6284c1c213760d8d847ace include/opcode/ChangeLog-9103 +fa4047908e1aff4811fe77680065510e include/opcode/convex.h +a02c23db91d70feb3bbcfd667aa8dc73 include/opcode/cr16.h +48bf08b1c7e518e2051141f5e241c998 include/opcode/cris.h +e1e2463dfebecacab2cd54043b6ad31d include/opcode/crx.h +7a4987744ef7a7f4078c5a8c576336b7 include/opcode/d10v.h +2aab9f5c7ac5de630a5ab61dffee686b include/opcode/d30v.h +f84b076cad9f87a270aa56cbea14f9ba include/opcode/dlx.h +7f63cf5dfc5ef1fc339d6c7a6fee0056 include/opcode/h8300.h +6b85b43c12d0761473e2d612dcd3d695 include/opcode/hppa.h +54cbff9b5d02dc47b71ed655ef7737ff include/opcode/i370.h +0427f68f546cb52b130235c1f6102f09 include/opcode/i386.h +df8f12dfd8d0b1451ed5c2046312ddf6 include/opcode/i860.h +a56f5898179c9fc902c6c327c783bb53 include/opcode/i960.h +482b5385aadd9b8108be5ddf3b830368 include/opcode/ia64.h +82ceedf44931bbd1f53e43446c16d98c include/opcode/m68hc11.h +de8665a54a36f8c24293459b0600a29b include/opcode/m68k.h +a7767c170cf4c03cfe45af922a9f4712 include/opcode/m88k.h +a4fa648b79bd0c6d04e4ad66f450c3e8 include/opcode/mips.h +5dcba87aeb69d978d0a18f90273f64b7 include/opcode/mmix.h +f05383f2385be4bb45c21332d96ba6fd include/opcode/mn10200.h +ea6d3f479e270d1b495da19cf71531a2 include/opcode/mn10300.h +3cddcdeee0062df87a49ac336f06564e include/opcode/moxie.h +1ee43c765dde8f3c0b837e7539a4a8a2 include/opcode/msp430.h +420f975d9f61718b373e729f0828ead2 include/opcode/np1.h +f098e4fee2a748c41d6d98adbf2400eb include/opcode/ns32k.h +a20e9cd3cfdfd503ebc3832e99ce2d3d include/opcode/or32.h +24f31cdc90efabd60c1b495ee36b4645 include/opcode/pdp11.h +59f34e20ddfb8380dd5e14669903eac4 include/opcode/pj.h +904930a6da216d930ed050e8fda269b4 include/opcode/pn.h +ce376e5c05e5f11002c2b2aff453f585 include/opcode/ppc.h +7bfc43cfb0a7db8606357492e077735c include/opcode/pyr.h +d13912548d0ed599b86d03326e8bc298 include/opcode/rx.h +3029b0bba5889b9f818db8e3e1d7cbdc include/opcode/s390.h +df0c40d81329409d82344b6d266a8de9 include/opcode/score-datadep.h +608ebdcc4ac46872571bfbe2d970d329 include/opcode/score-inst.h +568c45ae2814c0396720e01f4dd2573a include/opcode/sparc.h +4723833e3e62f9e982b99c58abb15b5d include/opcode/spu-insns.h +c14771870a5df1b422affd75b5d38086 include/opcode/spu.h +c69e19287023c929ac20ee5311acfadc include/opcode/tahoe.h +029618d1a95331f166da6eb773a843c6 include/opcode/tic30.h +8a9b5e28c9ab7622ebf89fc848ad12d4 include/opcode/tic4x.h +d7e7baabb2b1b56ff3d4d69f65d10b99 include/opcode/tic54x.h +a7e14cb11a0a5ac2e7c8d8c83c3202cb include/opcode/tic6x-control-registers.h +c5a881e7ef0b1a02009742c2020a9e60 include/opcode/tic6x-insn-formats.h +26df5941f5530c412ae5e078fa2e11c1 include/opcode/tic6x-opcode-table.h +7185a3931c3f8698b9174b081caa875f include/opcode/tic6x.h +908392f63074afd6f59631782b74b286 include/opcode/tic80.h +3bb1feae07579ad29b706d73b1f9dfe7 include/opcode/tilegx.h +6d3b86739c74f1047e9589ae4b52d9a5 include/opcode/tilepro.h +1735b8cb5147cc087b956bf9f0025f84 include/opcode/v850.h +b611a308a75056c2a8186199b92d8751 include/opcode/vax.h +10cbf87ea52bafe84a696ec172e072d5 include/os9k.h +b212dcdaf1121bd8a14b03ebb2ce5ce1 include/partition.h +f09eca32351413c6ede8d270c2944078 include/plugin-api.h +31582c91154fd42d85121c9b7dfa4404 include/progress.h +f407187879a6cc40877c4b38ee717349 include/safe-ctype.h +34b05c11cce7bd2bcc461549eb34bd09 include/sha1.h +c2d8ea6a0bcacf3a3d5128a916291424 include/simple-object.h +629ae8ac3ef91fc03af64dd1e2fbd58a include/som/aout.h +c43947b0b5de54a75109c4cee325b363 include/som/ChangeLog +085e076342ef6bf2062ba033f466ceae include/som/clock.h +652226dcecf615295764cf795a829111 include/som/internal.h +b35975811a6a1bad6e65ffcd2f5d122e include/som/lst.h +0cf7926687d5ac13f2db7e083d428f38 include/som/reloc.h +ffc879400e93c3be7e8727262ff65700 include/sort.h +a137d3d4edba8fab397dddb9f3d5ccdb include/splay-tree.h +4b6357d1d36b0981d1f437ab787cfa51 include/symcat.h +3068b9fda8210770794c36af6e3b7b5b include/vms/ChangeLog +a99f59546afadbe9e0cbb4ab49cb870a include/vms/dcx.h +7055098b5e32e0622dc5b1c498523310 include/vms/dmt.h +cb5b98595f89e309e206e03ebe3fca2a include/vms/dsc.h +7d8b8feabfab97743446f9c3e9c5060c include/vms/dst.h +c9fb0b5a672ac34a6c7e4f967c5bbaad include/vms/eeom.h +e4f3e837078643449d52c0826d48f3f3 include/vms/egps.h +13b57f463b5faf0b3f7c55b948c525b5 include/vms/egsd.h +d77a65a171afa2f593aafcbfab318d42 include/vms/egst.h +b011050578d8e742464c9247bf280a7b include/vms/egsy.h +8fb6638fa6841c62014ceb7c27c9d4e7 include/vms/eiaf.h +6e71d8901c5602633401887b010cdcfa include/vms/eicp.h +2d802b0d38c9165e355c45147340311c include/vms/eidc.h +46f2e728a1afb77bbec7f47cb668f750 include/vms/eiha.h +16f9ceefbe1ab3c514890bfe75c572db include/vms/eihd.h +7cc0a6acf771711b080d46228d2e8c3d include/vms/eihi.h +14cff957d4170ea49ad7343a0ab1d629 include/vms/eihs.h +925fb21d25b357ff5c4f716c9b42520e include/vms/eihvn.h +d0ab99fa0a52f72bdcfc0dd8b833d765 include/vms/eisd.h +a2b404dab5a3727c454c6757ce9336d9 include/vms/emh.h +692c1da832e19b2524efeed122cb45d0 include/vms/eobjrec.h +8582b500db6cab6d094dcc8527ea0b54 include/vms/esdf.h +9f00644503ffd148bf547d27ff76eb3c include/vms/esdfm.h +6686e0302854bbfa6bad267730bd2d4a include/vms/esdfv.h +e1d4167d1da2a83946c0ed659ed17b7b include/vms/esgps.h +886d6690946661bd6f445390cceb1dff include/vms/esrf.h +eb03a3ab596017df4e6a454f550d2b0d include/vms/etir.h +53f453335384805ad41365ad4cced40d include/vms/internal.h +fd11cc047dbcc31cf234ee7f8a267896 include/vms/lbr.h +b7f74b9489772248d46d28e6406d77b0 include/vms/prt.h +96729d6fd64637a732ffd525e5a3a514 include/vms/shl.h +53bdfdb5cd3c0c7831611602041cda52 include/xregex.h +0294cecbb1f66d640ccba3a5d862d05b include/xregex2.h +f648a66ed08e079e26a24c4346a3ba03 include/xtensa-config.h +e3093b56a6dcb6d5b1407a44b0cbd002 include/xtensa-isa-internal.h +919313164b5496f9ba6d24a99fc06ea8 include/xtensa-isa.h +0afce91a3daa1fdc32ee36370c1129dd install-sh +29ff905e8545642c89a94848f0bb8fed intl/aclocal.m4 +d4abe82ea322701d2385778a2fcd0804 intl/bindtextdom.c +65b9dbdad96dc624307590d3c44cb870 intl/ChangeLog +56f6438cd2c28d67b1bfa7e076f63acd intl/config.h.in +8a751062d7db9b6e8163667e5626fcb5 intl/config.intl.in +993b4622136b4ffceda016da629a45fc intl/configure +13576a23b957f53b84954feaf7908d49 intl/configure.ac +ff5c358b1507e45a2106b23b7e6c70a3 intl/dcgettext.c +81b58accbd88cd8159471d322723c42d intl/dcigettext.c +0cfc94e602bc20d958f014c77ebf357c intl/dcngettext.c +c8501675ab40fcf8fe39364ab9de0e42 intl/dgettext.c +45bd4be597b118d4bbbff6c9c6958e87 intl/dngettext.c +6e671cf01cbb93dedaf7b3688062d7b8 intl/eval-plural.h +1e4b5d6e86db4708199e0b7b61d06232 intl/explodename.c +6f008e715086ccfb7e8e44c007fc7bc9 intl/finddomain.c +24c6e42d8020a8759b3c8b13e0c37493 intl/gettext.c +27f0efcc3ff8493519140cb36aeead2a intl/gettextP.h +c6620ffc92d5853137d3ac11300de38a intl/gmo.h +049ba34a0c8d1fe665e8119e579dce4c intl/hash-string.h +7b5af5c4e777690b9851b3e85603bcc8 intl/intl-compat.c +9f41e951f166a5aedcc25268c161d1da intl/l10nflist.c +2cc2d036d8f77ec0243b3eaf942398ec intl/libgnuintl.h +0ad4083e3b5df1f764bb605dcf657b88 intl/loadinfo.h +d8e3733cf513bbf862ca090cf6403edf intl/loadmsgcat.c +0ff7bc241f5ea36688cf8bb6ac801b5d intl/localcharset.c +4d8b75dcdafb699870e4133fba5b58f0 intl/localcharset.h +bb9312cab68737125445f5932ae7140a intl/locale.alias +bdad874b80d29c70bb040f2ddeb67c5d intl/localealias.c +8179cdac0affac17e1f1ed2087b4595a intl/localename.c +78672e3784df9ceba75d1d004d6a1f78 intl/log.c +cad1d6fab2274517783de7433c0faa74 intl/Makefile.in +040acf17db43770b3eeab4337e031fc0 intl/ngettext.c +506ef276b14575f52af7a6982d58e666 intl/osdep.c +12ff40e8c89d99dc7b704bac9434124a intl/plural-exp.c +4109118983200f4aa853bf0cb466c586 intl/plural-exp.h +0f3d1bb596252bdacce100082392dedf intl/plural.c +d50a8c6c5b41089930accbdce767d3c0 intl/plural.y +6ec998bb4716c744bf8185e607f69301 intl/README +b4758a0194e3e41362b939911472ce62 intl/relocatable.c +bedade7bcfc3bc5eb09a2c6844f637f3 intl/relocatable.h +43f287d082528203fc85c1d2d81bf30d intl/textdomain.c +76ca170a525d5b84d90f0478fe788931 intl/VERSION +da73aad6396daa6072d443c12133ee0f ld/.gitignore +92d9cf05210424df1cabbde6fe85d4e9 ld/aclocal.m4 +f36fb12a33c0e28469853b14555bfe68 ld/ChangeLog +7ca725ba584a0477922ca681df841a08 ld/ChangeLog-0001 +1844c5088cd03b9246ecf58008c41d76 ld/ChangeLog-0203 +249882f8f7dd773b47dcbbe3f2aa56cc ld/ChangeLog-2004 +83dc7a007b7325a27e6f2d659558e999 ld/ChangeLog-2005 +d908d825fa1d2cd2d060d8ec9c7794d7 ld/ChangeLog-2006 +23f9e36aac04dff384e32f05281bd288 ld/ChangeLog-2007 +0175d1813c9ba7a591df78c204ce35b3 ld/ChangeLog-2008 +6b73307328980a2f623d982db89af0b8 ld/ChangeLog-2009 +bbf55c5a56e9ad5e17e15518aa95de92 ld/ChangeLog-2010 +8958c5b05a66e6b252f6978095132f7c ld/ChangeLog-9197 +b73f002c7cc445237e97e9ed358922e6 ld/ChangeLog-9899 +7b3e65b02c0a165963246bc205b3ee3c ld/config.in +7f3de5527703e20cf2da845997c4e36a ld/configdoc.texi +615bf04b4db284d47c5128f82a9e32f9 ld/configure +448f247b772b9cf7f703d44d2818cd15 ld/configure.host +95d5c2b300b625d3f338e9c0910e1adc ld/configure.in +4fc0e6539a5f9507c4b552c086690c52 ld/configure.tgt +b116956a62582d5a8ef1e1737d173eda ld/deffile.h +6a22d6c744c42d279da5b22a36f82cf7 ld/deffilep.c +b9ca5771abd362fd290e3cebfd920693 ld/deffilep.h +c055ff7b56d40b00a335738f9b7f0cef ld/deffilep.y +8d416c7b17011478442ba22d85f20c89 ld/dep-in.sed +5161fad0ffdf3b72b12a39147e1300ee ld/elf-hints-local.h +2c75cfcc19fb0ff973bddcbe5b567803 ld/emulparams/aix5ppc.sh +afb6d2ea1df283801db141ab81692a24 ld/emulparams/aix5rs6.sh +169b54f770bbc257d39ea459f48f2b00 ld/emulparams/aixppc.sh +ebbb1119f11559e515e510c9587c780a ld/emulparams/aixrs6.sh +29fda341c48f8b90fbf258b6d475867e ld/emulparams/alpha.sh +afd41d5b0484fb3c045bfd81ce15307a ld/emulparams/alphavms.sh +33a22a81f481989316591b168206ae74 ld/emulparams/arcelf.sh +e6e4692ccff9621ebe97fb3896227b05 ld/emulparams/arm_epoc_pe.sh +dbe3a08e6123cf6d11f5eedae27a31db ld/emulparams/arm_wince_pe.sh +46cdfce2fec96767f9833e7b95dff674 ld/emulparams/armaoutb.sh +db71752ff717b79212036e0ab57043eb ld/emulparams/armaoutl.sh +d7a431dc9e8878378179623ccf9bfb47 ld/emulparams/armcoff.sh +52a90d4b2874ec239d6f5efc7ac6a5ac ld/emulparams/armelf.sh +85031385ab0663ce2a9113945a9e1185 ld/emulparams/armelf_fbsd.sh +54f5793d97990666c0f63ae1e47d9f16 ld/emulparams/armelf_linux.sh +9a8401cd572759b89d491cd7575fcaf5 ld/emulparams/armelf_linux_eabi.sh +a83364fa7d65bd11812312c8d92ca64f ld/emulparams/armelf_nbsd.sh +704ee604923d8f958cd72b8f9349a629 ld/emulparams/armelf_vxworks.sh +2b5ea6fb0c548fe7f0a3903f843eef0a ld/emulparams/armelfb.sh +908d061ee41ccefcae22c23644d0bcf1 ld/emulparams/armelfb_linux.sh +de800cd350aed911b0515f2d8c6676ba ld/emulparams/armelfb_linux_eabi.sh +31ef6d790e43f46c99d521132f670b0e ld/emulparams/armelfb_nbsd.sh +a291ae3e8e735c25c2d4e86c55844730 ld/emulparams/armnbsd.sh +e9e8e61e01fdc6a50835c277658eb02e ld/emulparams/armnto.sh +5988d9ce7e8e4e5f20dc86deb1a8d5c0 ld/emulparams/armpe.sh +c6ddf82dd7dd437d00502069197dd871 ld/emulparams/armsymbian.sh +839084c3678686dacecfcfeffe2f479c ld/emulparams/avr1.sh +c74004fd5fdf15a2acac505446b5c4be ld/emulparams/avr2.sh +1356869a833a254e4ed4489493417b1b ld/emulparams/avr25.sh +06305da975da19253161abf7e7ecff06 ld/emulparams/avr3.sh +9947a5ecd1a931f1f54f424ebb681b39 ld/emulparams/avr31.sh +6d7abb647d96bfb0659e4e26e80b6dc3 ld/emulparams/avr35.sh +4e9564b0d40e69defa34a84e1caaae57 ld/emulparams/avr4.sh +0a4f5fa88510cc67fde1e1ec512f5e9c ld/emulparams/avr5.sh +4233da9ae9d1af991d81dc610e34a787 ld/emulparams/avr51.sh +b6c40b35e6a63b17ac7a46ebe7de143a ld/emulparams/avr6.sh +d0931fa9ab67d0f48df11ffbda9c4854 ld/emulparams/avrxmega1.sh +27e3af2c4491628ac2b4b4a4ac72d539 ld/emulparams/avrxmega2.sh +a4fd8920de8b91fdcb3468005224a1b0 ld/emulparams/avrxmega3.sh +6cedeab34a47c82db7252f5294b4ca17 ld/emulparams/avrxmega4.sh +101fc9d40672370f2807279d085743ce ld/emulparams/avrxmega5.sh +d347e9fababef7f46786ac43a6289e64 ld/emulparams/avrxmega6.sh +754e0415f37a441e2fa6ac510f31b885 ld/emulparams/avrxmega7.sh +74a02cad5e562cbcc31626c09dbd3108 ld/emulparams/bfin.sh +14c25a651ee75f6ff6e2c101836342fb ld/emulparams/coff_i860.sh +7db190f5aef5799d9eb885e714b1ca3a ld/emulparams/coff_sparc.sh +a28dfb57b8e1c89a1020ad7105f0cae1 ld/emulparams/crisaout.sh +b647b233dae359c31f0ae40c4884fe52 ld/emulparams/criself.sh +bacb8de12b3d71d0f165c95eade69a97 ld/emulparams/crislinux.sh +0a5a4e98354a68189a2fd28cad8a232e ld/emulparams/d10velf.sh +f03004d323541a267e123681bd285621 ld/emulparams/d30v_e.sh +0cc51d61ed4bc75ebd7222fd67bbf6da ld/emulparams/d30v_o.sh +038ce1ccec333e2db731a4ef0773525a ld/emulparams/d30velf.sh +162d7cba8938432d260e1e9321bf43ce ld/emulparams/delta68.sh +281ede04930040c8b5cdaaf27fc387c8 ld/emulparams/elf32_dlx.sh +93e6170e112854a25f6d0a7348325ccd ld/emulparams/elf32_i860.sh +6ca6c1e45e29690877676e1cfce40f6c ld/emulparams/elf32_i960.sh +14d93f840884457614e1b01da72425c6 ld/emulparams/elf32_sparc.sh +41c681403d8bd4b3dc8c258f83d115c8 ld/emulparams/elf32_sparc_sol2.sh +b4bb140a4f6f1e022fcf40cb7421607a ld/emulparams/elf32_sparc_vxworks.sh +c0c3b7d8380176026e4095e8d0f0653c ld/emulparams/elf32_spu.sh +9fc991f39d21a2723758fac65a848fc7 ld/emulparams/elf32_tic6x_be.sh +d0195b47edce309c3c06dead70f09855 ld/emulparams/elf32_tic6x_elf_be.sh +5c2936c518f586b301b336c4e8fc5e96 ld/emulparams/elf32_tic6x_elf_le.sh +5a274fc1e18a69b0670c8f922ce96333 ld/emulparams/elf32_tic6x_le.sh +e134c77e1df463b8a776c2d656739603 ld/emulparams/elf32_tic6x_linux_be.sh +90f3aa62a249159ed5b2d73957fc7209 ld/emulparams/elf32_tic6x_linux_le.sh +05aa4a49e9631ac91399e07043c57747 ld/emulparams/elf32_x86_64.sh +19fcb6f5bc2579ed99ee62162f7be002 ld/emulparams/elf32am33lin.sh +a19f32e62df659289a168c3b8bf91a26 ld/emulparams/elf32b4300.sh +f6767450cf9114d5f988594a59a0f315 ld/emulparams/elf32bfinfd.sh +82c6911967f15d544655a3b397e83ed2 ld/emulparams/elf32bmip.sh +9f509fd2413f065cdc1ddd40c4bcf870 ld/emulparams/elf32bmipn32-defs.sh +1d35ec6cf83a2f822b3b324cf61e7544 ld/emulparams/elf32bmipn32.sh +3f6bfa22dd4022cbc1b663f666405094 ld/emulparams/elf32bsmip.sh +7bf0051b2c15332bed387e0a7ede2ac4 ld/emulparams/elf32btsmip.sh +30d00579fda108701694e15ad202df85 ld/emulparams/elf32btsmip_fbsd.sh +9d25d42b83902e4b3c270b0076e00ab9 ld/emulparams/elf32btsmipn32.sh +085872893d41d25ac76a47801e321737 ld/emulparams/elf32btsmipn32_fbsd.sh +8e67420dbe22309e4b8920b42bc25432 ld/emulparams/elf32cr16.sh +ec222a2a5a57e2a67110a4a98903dc52 ld/emulparams/elf32cr16c.sh +fd0c54397da835fb1e4a9c1389ee368e ld/emulparams/elf32crx.sh +030179c4b8058c64aac3f9eb16c049a2 ld/emulparams/elf32ebmip.sh +3194fd357ff2d0fffd4eee6c41623782 ld/emulparams/elf32ebmipvxworks.sh +add91307fb4132685623c0895d6c9cca ld/emulparams/elf32elmip.sh +3c7a2a63628dd038dc17fde980df3f42 ld/emulparams/elf32elmipvxworks.sh +a2b5068c613c7030fe332e96decdd114 ld/emulparams/elf32fr30.sh +395e9319d9a7240b466fa7c40eaaf29b ld/emulparams/elf32frv.sh +c2e687126a2d9e6ee13cab2b6126a89c ld/emulparams/elf32frvfd.sh +2db7ce792a3d945d2cedf73fc3a5a0d8 ld/emulparams/elf32i370.sh +d7c61952d5f3ffbe6b9b6c3eaa30a52a ld/emulparams/elf32ip2k.sh +7d512f0f06ad5a37f6752d575a9f3aa1 ld/emulparams/elf32iq10.sh +a3d9317241b1de1ee98a1ef1db0fd484 ld/emulparams/elf32iq2000.sh +ecd586db2a0021421401571e654fea1f ld/emulparams/elf32l4300.sh +4d4025c885ffbed823c0ccb7e9af4ab3 ld/emulparams/elf32lm32.sh +93bb669752491e62440a2bf79ee28c1f ld/emulparams/elf32lm32fd.sh +61e10da892c21325ede0f1bee9358ad0 ld/emulparams/elf32lmip.sh +6be422cbcb87234b6276db46559955e6 ld/emulparams/elf32lppc.sh +7ef8f635c484537cc3265c9f9a254575 ld/emulparams/elf32lppcnto.sh +0f1aa1d48d4fd1423bd74e566a9c774d ld/emulparams/elf32lppcsim.sh +39123a7e34db239ef585e08f2ada9159 ld/emulparams/elf32lsmip.sh +c85d16c23057685613ac3c770175421e ld/emulparams/elf32ltsmip.sh +c2640a7d40d90413ddf7120400b7323d ld/emulparams/elf32ltsmip_fbsd.sh +6524015c1e2e591fa0bb19f87f93151a ld/emulparams/elf32ltsmipn32.sh +86016fb4e97f6dad75c7d282b3d83157 ld/emulparams/elf32ltsmipn32_fbsd.sh +e4e39855d3ec1ad061c91ec9bf481016 ld/emulparams/elf32m32c.sh +b308a0ea260bd6c2df2158f0981520bd ld/emulparams/elf32mb_linux.sh +bd60bab0227b259fa0ef82986655cbd1 ld/emulparams/elf32mcore.sh +b8edc45b52edec8507574609822d9245 ld/emulparams/elf32mep.sh +1ea7a1c2c097d50dc05cefd47d51a630 ld/emulparams/elf32microblaze.sh +1f512f809ac3a1ed6a7a3d8821047e83 ld/emulparams/elf32mipswindiss.sh +a02b2f0bb1fe8e2040c70b3ace22f434 ld/emulparams/elf32moxie.sh +2cd4f7e87711443ac0b3c0895804ef74 ld/emulparams/elf32mt.sh +6537ae56ab1c8dbd3a13d6e77f4f2835 ld/emulparams/elf32openrisc.sh +2b65c14e03c9354106a84acac55855a9 ld/emulparams/elf32ppc.sh +e670625a198b1d6ef4813cc1131ef31b ld/emulparams/elf32ppc_fbsd.sh +38bf9e30856b996dff2e9f7ef135a0b3 ld/emulparams/elf32ppccommon.sh +e96923ed2cfd947005b4f2e01656094e ld/emulparams/elf32ppclinux.sh +afe686ca1924108e64de174304e8ed13 ld/emulparams/elf32ppcnto.sh +e6dc727c9b2f7c7a71c6076d46912861 ld/emulparams/elf32ppcsim.sh +ff63cb22df9592464516a4fb36e511a6 ld/emulparams/elf32ppcvxworks.sh +b2d4bd5d0c711e6b9372053f85303ad7 ld/emulparams/elf32ppcwindiss.sh +cff0ae9d8fb3bf6ad12b075ce79f7414 ld/emulparams/elf32rx.sh +7fdee88dfb8da06c4bd21c131f7c759b ld/emulparams/elf32tilegx.sh +d6be6f81c5f218c06cbe1f428c47e6d1 ld/emulparams/elf32tilepro.sh +86e5165609b36a444c0e3969b4495d8d ld/emulparams/elf32vax.sh +485af2face9b02bf0fa49843691af836 ld/emulparams/elf32xc16x.sh +57c65a0982bea3c70f8796e567990b6e ld/emulparams/elf32xc16xl.sh +ee26e3e7d51c35186d4177393fe7dbda ld/emulparams/elf32xc16xs.sh +4c1ee8cfc760d7253ebc5d80dc3650ef ld/emulparams/elf32xstormy16.sh +e59def63f76fe88b1c463cd095639ef9 ld/emulparams/elf32xtensa.sh +4bbff852e871cbef260a9b6b36fc424d ld/emulparams/elf64_aix.sh +88a7fec714dc3c29ff9ab3602fff1873 ld/emulparams/elf64_ia64.sh +a04b0f94c285057c4328da812b709ef5 ld/emulparams/elf64_ia64_fbsd.sh +10dc541828463de1538cecccddecfcaa ld/emulparams/elf64_s390.sh +bcaf1c0bb6008669b5e0b7a03ee83047 ld/emulparams/elf64_sparc.sh +d2fba26c990c98b231a5d2d73d489965 ld/emulparams/elf64_sparc_fbsd.sh +19ae478b4af6b7673eb0d5a6526e2db6 ld/emulparams/elf64_sparc_sol2.sh +451a3b8e55d6665546582cf10855b48a ld/emulparams/elf64alpha.sh +05b020ea8c063d832c43502bbf25a583 ld/emulparams/elf64alpha_fbsd.sh +5ba3708f410eee98bd62896166a9f542 ld/emulparams/elf64alpha_nbsd.sh +1b96840cab57c0e99d5cdaa3d33805c5 ld/emulparams/elf64bmip-defs.sh +227184294d26af42ab50d948642ebd5c ld/emulparams/elf64bmip.sh +45c8a91846eee7402bfb681984c0ebd6 ld/emulparams/elf64btsmip.sh +119a650d6fe2c70509b59a4d88b18abf ld/emulparams/elf64btsmip_fbsd.sh +03a3e4cc59750603e7edf00024b28531 ld/emulparams/elf64hppa.sh +d969989e47badd85ab444fefa84656eb ld/emulparams/elf64lppc.sh +5b2cfd0917902083166727b03fbd07c2 ld/emulparams/elf64ltsmip.sh +072aac14506526ff6444c9d7eb6efe0f ld/emulparams/elf64ltsmip_fbsd.sh +5b79366aa223913e714e04f4303594fc ld/emulparams/elf64mmix.sh +7eede8d71c27b69ae9aa14766b377926 ld/emulparams/elf64ppc.sh +879ef6b88a4346fa857bff264b2794e4 ld/emulparams/elf64tilegx.sh +261c3ee23f1baba72638358c8121b622 ld/emulparams/elf_fbsd.sh +f8a2111f9f189b492c833ead98a79e6d ld/emulparams/elf_i386.sh +9d2ba4f316494a2bc26e467db70950f4 ld/emulparams/elf_i386_be.sh +51f54951cbef8732065f16b6e250a0b6 ld/emulparams/elf_i386_chaos.sh +df1ac3a0c604e72b025d24417ca1444a ld/emulparams/elf_i386_fbsd.sh +0151824d82deaf4aeffa7b5f78bf1b60 ld/emulparams/elf_i386_ldso.sh +22bc954c7382ad8ac04ce89b96ddcfc8 ld/emulparams/elf_i386_sol2.sh +a284d97c3b89ab4c69706f18caa3efec ld/emulparams/elf_i386_vxworks.sh +6f21c5e81a6a2e1ef8c31ec8230d1435 ld/emulparams/elf_k1om.sh +70088dbfe7e6ea410bde8360f3b791c4 ld/emulparams/elf_k1om_fbsd.sh +82eaa27d44e440f931bce0dd5c61b97c ld/emulparams/elf_l1om.sh +136375a3d9165c866bf7074b12f2e24d ld/emulparams/elf_l1om_fbsd.sh +9565483cf23ab9768056de0d3e35a9de ld/emulparams/elf_s390.sh +7e289cfa68c6cfd257f54e9f019fb08f ld/emulparams/elf_x86_64.sh +da938f85dc50f8f17dee922772db163b ld/emulparams/elf_x86_64_fbsd.sh +df7d3c451969de5d9633859f4f185db9 ld/emulparams/elf_x86_64_sol2.sh +f32127527a05a962f2608260b6989d2a ld/emulparams/gld960.sh +9e9a98ed6d60b81d3c02fcaff209e48e ld/emulparams/gld960coff.sh +87e6b58221679e6f984210beed2b30ea ld/emulparams/h8300.sh +9b599accad5c3e7fdefeda498bd7fbb4 ld/emulparams/h8300elf.sh +38e60b173489d53692974c5b6a04cfb9 ld/emulparams/h8300h.sh +a6bc102b9076b326ed7f5d455a28ac90 ld/emulparams/h8300helf.sh +6ddecfbf7937f059d93259f716d61d6d ld/emulparams/h8300hn.sh +4a7f2b46d388252aabee2d2c52f6dfb8 ld/emulparams/h8300hnelf.sh +f9d708a8c553ed19183a1f638fe633b4 ld/emulparams/h8300s.sh +7034b51cf218f8977ba97e1131ac50cb ld/emulparams/h8300self.sh +12989f4121fea14e6fc290662753febe ld/emulparams/h8300sn.sh +29871377f4c035e1e74d454a3e62272f ld/emulparams/h8300snelf.sh +7ff8cec0e8d6c8ff1e1c87372ebdbdb7 ld/emulparams/h8300sx.sh +511bcbd2d3fe01774624774b25cdadeb ld/emulparams/h8300sxelf.sh +15655df939874c463eff61983c973c90 ld/emulparams/h8300sxn.sh +b870624012b66c296b1928232395b5f9 ld/emulparams/h8300sxnelf.sh +b3b0d0be943fd5517fbc171778f63de0 ld/emulparams/h8500.sh +6dabd6ffde56b2445c38969243d3575e ld/emulparams/h8500b.sh +6d71814235108ce0faa35813c1959495 ld/emulparams/h8500c.sh +e8b9174ddad38feceda59af2dbec0d09 ld/emulparams/h8500m.sh +f0a112f331b4c6bfbfbb1895cdd63eff ld/emulparams/h8500s.sh +54b7e862187330b80b6314b2c1c1b05e ld/emulparams/hp300bsd.sh +4bbb1b67f14d1e124683aecbd19e69cf ld/emulparams/hp3hpux.sh +3f03d94dd5a21e066de9e24fbd565113 ld/emulparams/hppa64linux.sh +7af6e1ad74bc71f864b9c04412f1bebc ld/emulparams/hppaelf.sh +361bce4513491c8a3189d414f3279f67 ld/emulparams/hppalinux.sh +191811b4e0d736f8cea0156126b8a8cd ld/emulparams/hppanbsd.sh +077c0ed6da091c491ec9e7046cd626dd ld/emulparams/hppaobsd.sh +ce79eacf5f726c9c068a8f7265617861 ld/emulparams/i386aout.sh +5ed1f528a6752f2ed12d48977cc43da1 ld/emulparams/i386beos.sh +1ae0b0429ea988f07f3030f9b32daefc ld/emulparams/i386bsd.sh +d05a50688386622b8ad4e4c1f2286662 ld/emulparams/i386coff.sh +17f4c71862e163f04d7d090d954dbe33 ld/emulparams/i386go32.sh +1feb75a206e03a8f90f86ae7a8116344 ld/emulparams/i386linux.sh +677f9fe5ab33ec64ad5700337fa418ef ld/emulparams/i386lynx.sh +7ccc33d344e06889c1a5ce446dc4f32a ld/emulparams/i386mach.sh +8ec60ace7f9279b8b584e59bd6583fbd ld/emulparams/i386moss.sh +2bfeb760ea387887b4d7cdb735a8e8c2 ld/emulparams/i386msdos.sh +fd44b883579ad95580bf3cae88bd91b4 ld/emulparams/i386nbsd.sh +db82cac7b140e1aa2bc1383d9bf58477 ld/emulparams/i386nto.sh +7735ddb4fefb33a6fa7a1799d7aedae7 ld/emulparams/i386nw.sh +c15181d7923108bc59c1898d2fa2a436 ld/emulparams/i386pe.sh +8621077c937c52c0d192b76b507ad83a ld/emulparams/i386pe_posix.sh +a670046af207e1887d4baf88075531f0 ld/emulparams/i386pep.sh +8c809011235ff8bd5e0a1d9ba085ee46 ld/emulparams/lnk960.sh +6435fc04027f0caf3844f0d3d6e88fe3 ld/emulparams/m32relf.sh +beb5ec2ad3d2ca98aef07d55d5c479ef ld/emulparams/m32relf_linux.sh +4caea040768fd3f34eb29f616a64f6d1 ld/emulparams/m32rlelf.sh +ef322baa3cadee776415875de38be1a8 ld/emulparams/m32rlelf_linux.sh +049218c3ff85b972beee9ab88e1b9fd9 ld/emulparams/m68hc11elf.sh +cabb1e9932de933a5d006b14e50f41c3 ld/emulparams/m68hc11elfb.sh +99f9a9c7dbc4e5d16cd7c346de7c8daa ld/emulparams/m68hc12elf.sh +e6b6fc6ccd03411b402f3a6072588bad ld/emulparams/m68hc12elfb.sh +7f51d23517a73cea7b0c13fea29d9030 ld/emulparams/m68k4knbsd.sh +3d2234e0fc82b67e234d790ae94dbaac ld/emulparams/m68kaout.sh +00b17c39c4dcf1058751dc07f30dbea3 ld/emulparams/m68kaux.sh +f0580d8a518bcc77032874c9cb72809d ld/emulparams/m68kcoff.sh +e5482539582a4e8b00f28dfca6676587 ld/emulparams/m68kelf.sh +d5ca0a9aeac878263aa6caf077fa1826 ld/emulparams/m68kelfnbsd.sh +0f785269424f5deab4437f29fc3fb1c2 ld/emulparams/m68klinux.sh +1715e52513257034b76793cee27559ec ld/emulparams/m68knbsd.sh +33685d637a1cce6d622232b066197510 ld/emulparams/m68kpsos.sh +83963319b0e9d1a26022d42c1ded3dfd ld/emulparams/m88kbcs.sh +9445dc4bcff8b854185fa5215b74f9b9 ld/emulparams/mcorepe.sh +6c5efc2d80801d3ab24a03f11d108e39 ld/emulparams/mipsbig.sh +8589776726fb0a88568b9dbda5660c35 ld/emulparams/mipsbsd.sh +18c4e0d8ca8ec6e02035b574cb8b9844 ld/emulparams/mipsidt.sh +c320c6fc627c281bc28fcfc7a9bcad5b ld/emulparams/mipsidtl.sh +60661603c73c5ec9883d1f65e561e2d6 ld/emulparams/mipslit.sh +8cb42fe6977ca6c642cb7b96a9b0fda0 ld/emulparams/mipslnews.sh +9faffafc9a8c3244ba97da25c5082a56 ld/emulparams/mipspe.sh +4ae7b44c630b4c5f2ab982d81f1df8f6 ld/emulparams/mmo.sh +145049c7f07b5f03972e986b1d119603 ld/emulparams/mn10200.sh +6305ae286ec175ee2d4c96f85a1371c9 ld/emulparams/mn10300.sh +9519af2786e0d04b5608f84239418fac ld/emulparams/msp430all.sh +49337298ecef7c4e2569237b614c9675 ld/emulparams/news.sh +91f9caf89990024398fd3c30d545f77c ld/emulparams/ns32knbsd.sh +7d4c113f2900a29c3d25a4ba5e00d8f0 ld/emulparams/or32.sh +dfc530c215e98898cf75c555e374a3ab ld/emulparams/or32elf.sh +520ec8503cf2ff801a48395e338729aa ld/emulparams/pc532macha.sh +456a880b2bf36d968e2f2af383cc1abf ld/emulparams/pdp11.sh +aaf0d6c989a8e24b28f8106c195874f1 ld/emulparams/pjelf.sh +dcb56a623dfddf98dddac81206fabbf1 ld/emulparams/pjlelf.sh +6f8d170c60825e65e555b527324c82bc ld/emulparams/plt_unwind.sh +f8fe27e4766e815b076ccedba3821ee6 ld/emulparams/ppclynx.sh +120c2ee7cc0cea78311c4d9e980e939a ld/emulparams/ppcmacos.sh +52f9da7df47411bc7ee5dd90a1883114 ld/emulparams/ppcnw.sh +59c040c18e2b3a9fc6fb06d435d05bdd ld/emulparams/ppcpe.sh +2e897117043ad88f2c7bcf35a606d76b ld/emulparams/README +ff7570d6bf2e39ba10e74a394052028b ld/emulparams/riscix.sh +f0faf13830257f4689cae383838580d7 ld/emulparams/scoreelf.sh +908fd348c9d3fd9c12647643d88b31c3 ld/emulparams/sh.sh +55e7361b8eca765040b9c62d173fefa7 ld/emulparams/shelf.sh +5bcbbb59a566bd8395d41bd8323e3a61 ld/emulparams/shelf32.sh +291331616850dd83790ab2c24f992c2c ld/emulparams/shelf32_linux.sh +622331d976e1c07c7d48e5c6ac03c2f1 ld/emulparams/shelf32_nbsd.sh +32518a86aec278581dbb4174838aef74 ld/emulparams/shelf64.sh +d31180db1f9253b62c3d9e1c121366cf ld/emulparams/shelf64_nbsd.sh +145e7853413a3ef62c62a5b58414f422 ld/emulparams/shelf_fd.sh +4b61937c3bfb4a5470c72eeb0bfd224b ld/emulparams/shelf_linux.sh +39e939a626d83705198fc70fe5ecad12 ld/emulparams/shelf_nbsd.sh +1bbc2f89e23821f9cc79898ab5586cb9 ld/emulparams/shelf_nto.sh +7e5793bdfb27513e159f608cea15c050 ld/emulparams/shelf_uclinux.sh +bb746254c72382f1234d821ad5580a9f ld/emulparams/shelf_vxworks.sh +c7ccb5f7fe5f62d92dca7e1a71b02aff ld/emulparams/shl.sh +a8e5e931e19cca314ba30a312884c2d5 ld/emulparams/shlelf.sh +147ddbb0207d4b730f3ff45851cc3022 ld/emulparams/shlelf32.sh +50e34d968b4ce95745e97ca5e24ee2c9 ld/emulparams/shlelf32_linux.sh +414d3af83e84f7afd6dcc3afa2184fa7 ld/emulparams/shlelf32_nbsd.sh +90c225b85052cd8cdf4ab8871bda1b20 ld/emulparams/shlelf64.sh +2169ae2a71b4a6875eaa305168d042d1 ld/emulparams/shlelf64_nbsd.sh +8cb196945623a9ffdbb37ac046644c09 ld/emulparams/shlelf_fd.sh +ff9adc94a91c76bb6d8a113595061171 ld/emulparams/shlelf_linux.sh +744f886f4baf1d4fe15ce1d0595dfc84 ld/emulparams/shlelf_nbsd.sh +9b599e50c1edc57824ecfa5b37a55839 ld/emulparams/shlelf_nto.sh +162898060928e895f8ab2a3452cab99c ld/emulparams/shlelf_vxworks.sh +2b7af20012f444e77e36fe2340b966b2 ld/emulparams/shlsymbian.sh +0e5bf12ecd3b1de4e0690b57870afb1a ld/emulparams/shpe.sh +9df098ef8ecb368874c44df7fb248538 ld/emulparams/solaris2.sh +34bc316904c6401355d6970a04f2574d ld/emulparams/sparcaout.sh +a42336688d6d1fa719478caa5efc6e2d ld/emulparams/sparclinux.sh +957bd3e925d255ac965dde1aa7303f40 ld/emulparams/sparcnbsd.sh +8f86834d923d64e45861594e4dc8c457 ld/emulparams/st2000.sh +34fa41ca09712e70f3719053d3d82ab2 ld/emulparams/sun3.sh +b8f001f8578debcd12f5b61634f002ec ld/emulparams/sun4.sh +5d10f221cc393b1ae1719132de13f3da ld/emulparams/tic30aout.sh +4fc903e37671053625509f7486c63816 ld/emulparams/tic30coff.sh +62d8066c77800eafa442197f8f07cade ld/emulparams/tic3xcoff.sh +7bb0ad11ce41e9dfc28e690468c0770d ld/emulparams/tic3xcoff_onchip.sh +e2ba12f737f075c7e880925f10dc19ec ld/emulparams/tic4xcoff.sh +aead097a3385a27cba7210470e150a10 ld/emulparams/tic54xcoff.sh +91cc82ae46f2254281e38817caa9f141 ld/emulparams/tic80coff.sh +420ddfcb9cd84cd0898880dd72280f8e ld/emulparams/v850.sh +829acdbee172341c4342095d82e19511 ld/emulparams/vanilla.sh +4e93bfd2da37b36233e047a4bf15854e ld/emulparams/vax.sh +7daece209bea326cdc906d0640ea017e ld/emulparams/vaxnbsd.sh +ba6f9f82315ce20a64ec93bf3c2bee0d ld/emulparams/vsta.sh +ff0ee3ea192be9116c08ca656cdc1337 ld/emulparams/vxworks.sh +7efc4f8c9d1eca2e14084bcd65535b9a ld/emulparams/w65.sh +88233c4b283975ba080bbb9738aa0a23 ld/emulparams/z80.sh +cd93ec9e7e74cadfaf8044cca1581111 ld/emulparams/z8001.sh +8890ef4fad0e25044c8d3200a9e77ee7 ld/emulparams/z8002.sh +85712545e9dbaf7ed269122bbb77c375 ld/emultempl/aix.em +a9d1ff6c62567cfe7f30bf671cd68a6b ld/emultempl/alphaelf.em +605d6b9f4f0bdeb87945a943d27b0a18 ld/emultempl/armcoff.em +f14927baf7693df53ddfdf25b3c64398 ld/emultempl/armelf.em +995bbfc228460e4eef6eef52a09384a9 ld/emultempl/astring.sed +b195c43933289b93e4d4ba8055964c81 ld/emultempl/avrelf.em +4aff627620fbde4c8db9445bd04f0cc6 ld/emultempl/beos.em +902891733be879da00dd41609bb3f2b4 ld/emultempl/bfin.em +8c3a0d70721c730524a506a441c45155 ld/emultempl/cr16elf.em +ce7d0f0b14a3b63a2cb10afc74da0999 ld/emultempl/crxelf.em +8c679290e5df491294d8a4ec33c62b0a ld/emultempl/elf-generic.em +6824ba103343f743721a20623c751881 ld/emultempl/elf32.em +f161d20c137eedc9ebd1c716caff30a9 ld/emultempl/genelf.em +8b1bb9cf0fdceee86785eb3f506855e8 ld/emultempl/generic.em +38e9f8cb1a488c36bdf32df4caca8ec5 ld/emultempl/gld960.em +18878e88fadd0c0124973091bd92e77a ld/emultempl/gld960c.em +8fbc592f1b86f19c7341f566d9d11a56 ld/emultempl/hppaelf.em +b567d5e4180bdf03e99d43beae69af51 ld/emultempl/ia64elf.em +2ddf12b7a7e85f5260b019279bb00043 ld/emultempl/irix.em +3a368fe9b04f91683dfa77c3e97debe7 ld/emultempl/linux.em +558fc9279afea8366e8660167b813b72 ld/emultempl/lnk960.em +4424030548811ff3cf002d324030e8b6 ld/emultempl/m68hc1xelf.em +0f7dfd260376aff557939f9f9b0026ca ld/emultempl/m68kcoff.em +907245fc4d9760679ec286585649b64d ld/emultempl/m68kelf.em +b0ecbf9661634fe1d0b3153429b7d673 ld/emultempl/mipsecoff.em +2cc2271a6594e680b581357e9f9e3173 ld/emultempl/mipself.em +5d0343ade251326184c3a72f45360574 ld/emultempl/mmix-elfnmmo.em +571de72fe5a66d0b44af003775cbebc5 ld/emultempl/mmixelf.em +655a476a4517b93c050c4cfb5fde1fed ld/emultempl/mmo.em +c027ffd86e4d75fc1df32edbd78ab8d3 ld/emultempl/needrelax.em +7fd72a36cbd152af568f6c4dcc7a778f ld/emultempl/netbsd.em +a8190e4a0b5cca5b8677d8bb2d39940f ld/emultempl/ostring.sed +e8724f22a01df60528b910d27cef982e ld/emultempl/pe.em +55ba4a985dfaf146af43af1cc8d0f044 ld/emultempl/pep.em +3c27aed68da5d0374498d7a2e32d9b4c ld/emultempl/ppc32elf.em +f7ae6fc7c9358ea0ba353ecae92a628b ld/emultempl/ppc64elf.em +b812a798c37d8d5f5901f1821a8a648a ld/emultempl/README +f9c5b909500dd0fe865f60f2c81c5319 ld/emultempl/rxelf.em +ce0094a0aa88fefe12182d071d67d646 ld/emultempl/scoreelf.em +8890876ee133f90c0426c4fc8ea83b5c ld/emultempl/sh64elf.em +8c18b038e264514d353c5b109b68b080 ld/emultempl/solaris2.em +218eb0caab01d73df5711094091dadb8 ld/emultempl/spu_icache.o_c +93aab45b5b187873b67c127f02649429 ld/emultempl/spu_icache.S +cb3ac7332c931570c921fe527c188d83 ld/emultempl/spu_ovl.o_c +297ab6cf12270790536a64ec0ab49fbb ld/emultempl/spu_ovl.S +7fd9d3c4a23b1ddb27d0e46ad0d048a1 ld/emultempl/spuelf.em +b81a8a2926af643ec1359eb1a451e824 ld/emultempl/sunos.em +f5e65d5d7173c6cd2a7d2bd83e5e12c7 ld/emultempl/tic6xdsbt.em +a1e44428a80727b027cf3e187d094e33 ld/emultempl/ticoff.em +2b93c5dc10438986805d040f0edf4b11 ld/emultempl/vanilla.em +c5fd6427ee3885ffb9b9950457bee53a ld/emultempl/vms.em +f539dfe654d52ba0f332048373d2355e ld/emultempl/vxworks.em +fdb26042471456f3e3d990ab3ee89785 ld/emultempl/xtensaelf.em +7fbba22460bb83ff451daf49d80fcd96 ld/emultempl/z80.em +ab0fe311032294b952da80585b8b90e7 ld/fdl.texi +7f3de5527703e20cf2da845997c4e36a ld/gen-doc.texi +351c85fba3e46d48e9752dc51e2a0cac ld/genscrba.sh +797aec8b606b9b48533c39356e3782a6 ld/genscripts.sh +981d9fc565e24a50734af5902eb7c52e ld/h8-doc.texi +c214b5973e81e2bbd397d3553a4b22e4 ld/ld.1 +59b3d878cf4fa65f9258cbc666c2e1b9 ld/ld.h +79af4d31c25b791ac087898b07687999 ld/ld.info +f6137f35adb067065dc34727fd512d8b ld/ld.texinfo +67dde8616fb18b7af1fae96a239a52a9 ld/ldcref.c +dff9a89bd49eb0176843e49c7ad7c0e2 ld/ldctor.c +84414136f84aeaab8033428d4a0a330a ld/ldctor.h +861dc78a5f1f967c0df792cb5736a150 ld/ldemul.c +73feb06b0b17d058db587d5d6a5b3104 ld/ldemul.h +6b4d33ab6e6612d92ededc353a37e4cc ld/ldexp.c +fd7a51bab2155b9993d9968dc72ecc9f ld/ldexp.h +c250222eb5e10657518baa64004bb173 ld/ldfile.c +a6206a9e784f5dfa829372e92aa1eef7 ld/ldfile.h +9687977fba92f6d94db6ae99347f847e ld/ldgram.c +214d3eab15ebab9e5c1dfa92eb917f00 ld/ldgram.h +9510f5190778fe5c725444c786eb839c ld/ldgram.y +0973631ee12d99daed3e97216545aa9f ld/ldint.texinfo +6b9cc202bd835fbdbb177d88887a78b6 ld/ldlang.c +ab3a3a76c192957d4acb76c1f77636b2 ld/ldlang.h +c9360e41eeba0f5febd651e1298c4c0b ld/ldlex-wrapper.c +b348e41ce74d00d873495cde61e5bb94 ld/ldlex.c +baeb3e241736fb852f797a5cbf9c163b ld/ldlex.h +f8da75f665e0da400d43b5b609c2f37c ld/ldlex.l +21b458ca5d2381eea4c87a6832d9bac3 ld/ldmain.c +d80bce31760c2ec2d4ccf3499d8df452 ld/ldmain.h +f668a8604f5ceb810e6c5ee78754587b ld/ldmisc.c +a2bbb9a3e5ce870051999d5cbd4ffc22 ld/ldmisc.h +6a03fbfc2360f93eb8e515d1728d564a ld/ldver.c +f1d1d110b9e89a17eca7116545d66e79 ld/ldver.h +66147726a96c958a6a63918d709d1a93 ld/ldwrite.c +1d0ab77dd5d124786b3142aea0d9e88b ld/ldwrite.h +0c112748c0e348937034915404256427 ld/lexsup.c +d618facc3e8ce8bf3d02ba452e1be6ab ld/MAINTAINERS +d75e83897707519666d34e55790eb45e ld/Makefile.am +5c20ef99fab04255b7301c6c05476689 ld/Makefile.in +942ad1e3f0e1e190714d2b7fda53bc4f ld/mri.c +32569346651ca50342ad97f07baca5cf ld/mri.h +40bc9bd51a44806f688c04c68ed6e897 ld/NEWS +c8cc1a5a500ff6785ebc6e94f3ab2ad2 ld/pe-dll.c +763a817ac4bf83bc5064f4dec8ac3f0d ld/pe-dll.h +8b087227bfd826e425b9bc88f9a9c2e6 ld/pep-dll.c +416b818dfa9c359535b00117ae94659a ld/pep-dll.h +4f3fb0fe6f84a1808da36048c32cd85a ld/plugin.c +36af6eb06e6aa087e9d75190fa942649 ld/plugin.h +f6d8f46230eb87af11b5ec0b6b5b399d ld/po/bg.gmo +5097dc0ebfb7addda287833496c3b348 ld/po/bg.po +aa3f5b6b19d37fd67dae7c5f9d67c868 ld/po/da.gmo +cdfef74e675d16fda762c677f6757811 ld/po/da.po +a137a04abad2a023cb269e774e1d4a63 ld/po/es.gmo +de24056abf1e2efb772e30aedbd01d08 ld/po/es.po +b594a802f243ab42bf3ff5a27c39a22b ld/po/fi.gmo +cab5733f1ae1160fd730552487201a8f ld/po/fi.po +d5a10269096e204ee0ba6696952df9f4 ld/po/fr.gmo +4e69484f40b02ed13933f43c576538fd ld/po/fr.po +fc40639db7883536c193350b81dd7cc8 ld/po/ga.gmo +6b597ac040f231ea3ed037773cf89082 ld/po/ga.po +53c1557e853cab0747c7be2c851a7a36 ld/po/id.gmo +8e978c7b22e7d2345dfaef2c4cbddd92 ld/po/id.po +593c3d8483eeaffa54d5ac135f45f219 ld/po/ja.gmo +94fbae08f056207fde9be4c61ed7561b ld/po/ja.po +d4d9ac5897a4fd2b4228f52282dfeeb4 ld/po/ld.pot +7cb7553c50642d63ccb14f30f66ca155 ld/po/Make-in +7a287179b7f4c67f1b618821002ad5b9 ld/po/POTFILES.in +1458a539ab520ec9ecde71e95b38d325 ld/po/sv.gmo +6c881a8bbe72addbfc0267a9efda3850 ld/po/sv.po +3d1ef990f300fb1817b57310a731db3e ld/po/tr.gmo +a44c2934ddeb120e2f08ca74572a7573 ld/po/tr.po +a5d95d7d9cb740c6063a10a39d0d38e5 ld/po/vi.gmo +b7ef0492eef2d663197efdfdaba9aac4 ld/po/vi.po +3efd8d4a930e84f4ad64bb4ccfab32aa ld/po/zh_CN.gmo +e7c8a19b119746a607460fe98af06531 ld/po/zh_CN.po +83c6d4c200b0dbaca4a92d64305ef342 ld/po/zh_TW.gmo +a3966a60cb929bb5b812c3914663d7a6 ld/po/zh_TW.po +305f3d03c641bc73c2e6ba871fdfe318 ld/README +51b49fc4acb5799b7561eff69cdfc5de ld/scripttempl/aix.sc +cca3acb2dbc409fd6ff5f17da85f0478 ld/scripttempl/alpha.sc +b7af2fe723d10d9f922854eb3d14a056 ld/scripttempl/alphavms.sc +11e720b2d4fbd6b8ad9ce26f980acd6a ld/scripttempl/aout.sc +a354ffa3178f947e907c1d89c536fd8c ld/scripttempl/armaout.sc +f9df9b9a472c5c7e214261e210b944fb ld/scripttempl/armbpabi.sc +d95bfff20786bc2880153aec35544b13 ld/scripttempl/armcoff.sc +299f28c30f8a19322df6025800766709 ld/scripttempl/avr.sc +8980da56643d667c0ff54d23919a5cf3 ld/scripttempl/crisaout.sc +206c75cbd7e5185b3ee0c11b5528baa1 ld/scripttempl/delta68.sc +756f010bc1fcebe9cb08b1c8afa66389 ld/scripttempl/dlx.sc +2e61c0376f967446aaeeab33c5298c29 ld/scripttempl/elf.sc +2fbe76192c4153c98b995e8cbd0bb119 ld/scripttempl/elf32cr16.sc +8222028cb2706153489bff8d5a823387 ld/scripttempl/elf32cr16c.sc +03fa4a27215925af3a39d23023313935 ld/scripttempl/elf32crx.sc +8563cd5ab5a5691bb99f61ac3b1c0649 ld/scripttempl/elf32msp430.sc +40a02e3a1d0c83fd555f3089ccf49196 ld/scripttempl/elf32msp430_3.sc +31577e0de0f8f3f08c1cca134a808d14 ld/scripttempl/elf32sh-symbian.sc +1f4f2ecf763c7a8cae379d44080d27ce ld/scripttempl/elf32xc16x.sc +26183dc800d2445fc9783faeb7f4a09c ld/scripttempl/elf32xc16xl.sc +26183dc800d2445fc9783faeb7f4a09c ld/scripttempl/elf32xc16xs.sc +f7c5795424490af39b3e6207e3f6c5c8 ld/scripttempl/elf64hppa.sc +55c48d31a367874103ee640d1b8cad38 ld/scripttempl/elf_chaos.sc +5fa4ee9418f39438deec99573812c3ab ld/scripttempl/elfd10v.sc +2c41bd1ff6d91d6076eb31134dac238c ld/scripttempl/elfd30v.sc +9b243fb72fdcbb010fd362927abd9bd0 ld/scripttempl/elfi370.sc +1b3554b76eba2a91dfc4b4148839e92e ld/scripttempl/elfm68hc11.sc +1388afffa87dba99cc3d42eaed3c5e73 ld/scripttempl/elfm68hc12.sc +15697433a3af5d3bd995697fc56ef15b ld/scripttempl/elfmicroblaze.sc +e4f897aa6f97dc7696d6cffd5f38ea77 ld/scripttempl/elfxtensa.sc +558cf311f2393d6785ca38f20dac542e ld/scripttempl/epocpe.sc +cda2a85ad5bebf3d42b9f0219e185d42 ld/scripttempl/h8300.sc +a31cc1aeff826b4f48605fae2c9e7a17 ld/scripttempl/h8300h.sc +c544c999740a0943c5c0fa48d43fd036 ld/scripttempl/h8300hn.sc +0c68b8546d6279b5f564ce2dea8b915f ld/scripttempl/h8300s.sc +ebc60b1d61cbb77823d945dec94d0d7a ld/scripttempl/h8300sn.sc +381ce17048d5d91f113654cc4e8a29f5 ld/scripttempl/h8300sx.sc +541328f18c8ae4ac182784e817c54b99 ld/scripttempl/h8300sxn.sc +6c57b9f11a6f50c46ecce9df62061dbf ld/scripttempl/h8500.sc +39da8240aa7f5aca7b23d93bcf243bb8 ld/scripttempl/h8500b.sc +a1235b4e692307533adc69d75c98da06 ld/scripttempl/h8500c.sc +45c5f295e421e663e1843207ae13951a ld/scripttempl/h8500m.sc +b6ce335a288c23cf897c944a84aafe3b ld/scripttempl/h8500s.sc +345bdda73fb357a6ae58654860af5778 ld/scripttempl/hppaelf.sc +9cabd59c88eccf17f3ba4aed399fb8cc ld/scripttempl/i386beos.sc +b83d2090c526ea76244fb001060b87aa ld/scripttempl/i386coff.sc +781996f0bc02303778e28cca826ead23 ld/scripttempl/i386go32.sc +dd4667c5e75a68e5bcc4b0769830974b ld/scripttempl/i386msdos.sc +0acb5ea28c8feeee6aae68de5fb62a67 ld/scripttempl/i860coff.sc +f14aed79776fb856704487766477ef6b ld/scripttempl/i960.sc +56c554544d555716dbaa542dd8be6141 ld/scripttempl/ip2k.sc +dc5d4ade67ff549a0ee0a727075a5d93 ld/scripttempl/iq2000.sc +e540fae4addb8cf1d5c85f7e2386ccb3 ld/scripttempl/m68kaux.sc +0acb5ea28c8feeee6aae68de5fb62a67 ld/scripttempl/m68kcoff.sc +c6b7f25c2a22e109fe31d19e927a904c ld/scripttempl/m88kbcs.sc +7145b5d7ef97d4349ec0a4ab8dfc4cb4 ld/scripttempl/mcorepe.sc +5b68eb3b0430d858ea927ccb39b009e4 ld/scripttempl/mep.sc +60543996ddabef7bf15c4e659e4715cc ld/scripttempl/mips.sc +756f010bc1fcebe9cb08b1c8afa66389 ld/scripttempl/mipsbsd.sc +511fa627b86fe9c3a20302b16b398e38 ld/scripttempl/mmo.sc +5e33868aa49cdc31363e63450fa7cbb8 ld/scripttempl/moxie.sc +ca0b5bbcf601b895d149c90dc54be768 ld/scripttempl/nw.sc +fdcbfdd0b93aa6b73e1b73127b28bdae ld/scripttempl/or32.sc +2b85ea488dec1f2ab3e4ad4af324e891 ld/scripttempl/pe.sc +e43c1377e62f7ccf7c3b09e9e89d6ade ld/scripttempl/pep.sc +47e02e8254495a858dbef6c19c1ac173 ld/scripttempl/pj.sc +34e9e3ff43defb7975f446f017511ab8 ld/scripttempl/ppcpe.sc +ab0f8d8220dc084233dee358c5e57433 ld/scripttempl/psos.sc +01c6e3598e372d510730e381dd25c2cd ld/scripttempl/README +1ca280b61dcc707ecc1128cfa80b8243 ld/scripttempl/riscix.sc +e492e9686199c4307073777a09fe3652 ld/scripttempl/sh.sc +9a6c27dca93759ca536b40f12d4d5ba6 ld/scripttempl/sparccoff.sc +6277ea502afc8c184eeccce4362d538b ld/scripttempl/st2000.sc +f9f56c0b4c0548aadba5f30ee7f105fe ld/scripttempl/tic30aout.sc +581d4b5a31b2f67b8274aa96b201af92 ld/scripttempl/tic30coff.sc +daa356e0072cd7638fa0b155ce9c5f52 ld/scripttempl/tic4xcoff.sc +8b0583aa9c80a4bad0ee29ec99696b02 ld/scripttempl/tic54xcoff.sc +55bb06a75d32be990c5e17654403970c ld/scripttempl/tic80coff.sc +8aa6f8d6effa49d2f288870329e485cc ld/scripttempl/v850.sc +922fccd6995f0a119365fd7ceb7b25ce ld/scripttempl/vanilla.sc +9ef634e16ac4537117ea157867e85207 ld/scripttempl/w65.sc +ad6aabb9d8a04c2828a9cd3a4005658e ld/scripttempl/xstormy16.sc +40b944db8315cb484a442a7e3447da39 ld/scripttempl/z80.sc +60b2f678a8887cae18760d0013bffa20 ld/scripttempl/z8000.sc +1ded054093de910d9786c62bc4fe8cc6 ld/stamp-h.in +436d69f69f4db1ef1fa178674525e4cf ld/sysdep.h +4e3baa769dc8f858b1fc3ecf8e11fbe0 ld/testplug.c +06262c57474646fa1934cd2e6c143e26 ld/testsuite/ChangeLog +43821ec3e01aa56c69d031c9cb7aaac6 ld/testsuite/ChangeLog-2004 +0593940197fddd34e72d34ad4681e18d ld/testsuite/ChangeLog-2005 +13ed49b06cc49649e67f1df2f524946a ld/testsuite/ChangeLog-2006 +fdc85b5e1c70442c643dfd0338ef699f ld/testsuite/ChangeLog-2007 +aae40f3c4e2976bcc04690dcafecaee5 ld/testsuite/ChangeLog-2008 +ea60b8fb6103ed796041aa41c43334e3 ld/testsuite/ChangeLog-2009 +c74a5ff0059033a1ac5e743ee5e70ed9 ld/testsuite/ChangeLog-2010 +f6131533875b285cb0449a348fffaeea ld/testsuite/ChangeLog-9303 +94afe0fe97944ac401236e398bdb28e4 ld/testsuite/config/default.exp +18325ab257cc940dcb70d61b6715538c ld/testsuite/ld-alpha/align.s +cd84bd576f301ddb989ca9704571ab38 ld/testsuite/ld-alpha/alpha.exp +8bf554efdd7f5c93133dfc8ba7151052 ld/testsuite/ld-alpha/emptygot.nm +0149a5d2fce532f4a8e6476f1b999d7a ld/testsuite/ld-alpha/emptygot.s +c4730c79b491970b9e7aa8e9bbe6c317 ld/testsuite/ld-alpha/tlsbin.dd +2a7f751ec3b31fbc8706caf61ae3d95f ld/testsuite/ld-alpha/tlsbin.rd +e4cc0945bf729834783cc392d04e8929 ld/testsuite/ld-alpha/tlsbin.s +471ff630e1eb88135b396eb8077cf101 ld/testsuite/ld-alpha/tlsbin.sd +0fdd3c7d51da0c6a74ad3818834ed2b6 ld/testsuite/ld-alpha/tlsbin.td +f54f88a171d4a1a0502508fb4ba08259 ld/testsuite/ld-alpha/tlsbinpic.s +556976926e9d8990df2467c2cbcf11d0 ld/testsuite/ld-alpha/tlsbinr.dd +3bba5d5864c7a1727faea16a4f7372d6 ld/testsuite/ld-alpha/tlsbinr.rd +d625489891d77ff8c6310f5f05486c77 ld/testsuite/ld-alpha/tlsbinr.sd +4a8162da94dcca517a86059466c554ff ld/testsuite/ld-alpha/tlsg.s +643df4e4ff122f2f6a1804aff730c793 ld/testsuite/ld-alpha/tlsg.sd +b87c24c0e610b3ccf34b009a7280eefa ld/testsuite/ld-alpha/tlslib.s +a802cac9f534fb99d25bc95cfc9a2ad3 ld/testsuite/ld-alpha/tlspic.dd +4a90eb141aa0b858f420ee35ab0fc5dc ld/testsuite/ld-alpha/tlspic.rd +d799d7afe5a44a1032c8a7b495b71f3b ld/testsuite/ld-alpha/tlspic.sd +fa4f4d2a9aa095262c026d8b386826ce ld/testsuite/ld-alpha/tlspic.td +66fa8fd9968bb830ab985fbaf9e9a7b2 ld/testsuite/ld-alpha/tlspic1.s +1be6d8e1547c710f7bc12028c6522832 ld/testsuite/ld-alpha/tlspic2.s +0c939da922c88b31326633cd4ac9b0b9 ld/testsuite/ld-arm/abs-call-1.d +bc7a0100095ba568f92c5b4cb573c76e ld/testsuite/ld-arm/abs-call-1.s +7895b15c6266c18505e625262eea54f0 ld/testsuite/ld-arm/arch-v6.s +6aa37e1d35526c4d4eb5629eafe109e8 ld/testsuite/ld-arm/arch-v6k.s +e1e08792660eae6fa0f4165f8320c73b ld/testsuite/ld-arm/arch-v6t2.s +77d705dc1cb85b55d60a1a5ef372dda1 ld/testsuite/ld-arm/arm-app-abs32.d +565634b571c9c9e088fb3416a62705f0 ld/testsuite/ld-arm/arm-app-abs32.r +abe5df1b29a8c0085e2b425276030a2b ld/testsuite/ld-arm/arm-app-abs32.s +44189b55bc98f5f1bde3d79507cc5877 ld/testsuite/ld-arm/arm-app-movw.s +0e012f2cb1efd99af6b30be23fdade93 ld/testsuite/ld-arm/arm-app.d +b0831c8e38b6165af9e9d82e1a242fbd ld/testsuite/ld-arm/arm-app.r +20303773d7a50761a78fb7a3536407b5 ld/testsuite/ld-arm/arm-app.s +5f2a54452016678abd05e0456b6a9e77 ld/testsuite/ld-arm/arm-be8.d +9bd7893b6bd0aaee2575654eeb7b2806 ld/testsuite/ld-arm/arm-be8.s +d7525ccd8931c32c432a3f3aa14174c5 ld/testsuite/ld-arm/arm-call.d +a787400b6bcc43f49aa58957d81b56b9 ld/testsuite/ld-arm/arm-call1.s +5e27a3edfbfbf3a12d65e227fab0c447 ld/testsuite/ld-arm/arm-call2.s +62568113ccbc67acbec0b553c0ac27d9 ld/testsuite/ld-arm/arm-dyn.ld +330686e07cf77888b9215b639186aa3c ld/testsuite/ld-arm/arm-elf.exp +2a3abc273f1a81034c2252c1593c803a ld/testsuite/ld-arm/arm-lib-plt-2.dd +57b6eb19e18b93ead28a446db8622778 ld/testsuite/ld-arm/arm-lib-plt-2.rd +24d760eeef99d12b084bcad76b2f82c9 ld/testsuite/ld-arm/arm-lib-plt-2a.s +73bf22104860bd41102419e3a4695235 ld/testsuite/ld-arm/arm-lib-plt-2b.s +b04b3e1b69a55141a0ebfd7ae824ef8c ld/testsuite/ld-arm/arm-lib-plt32.d +a167e469316cdd1ed8af41301205f0a0 ld/testsuite/ld-arm/arm-lib-plt32.r +72d35e1785ba54a876601fb0dbeeab24 ld/testsuite/ld-arm/arm-lib-plt32.s +14268c6b6cc4a710e8a2982a44641441 ld/testsuite/ld-arm/arm-lib.d +0708cc1adcc6baf63231589c4ec9d60e ld/testsuite/ld-arm/arm-lib.ld +cf684a9a844dd5b8f1e9e0059bd54fd1 ld/testsuite/ld-arm/arm-lib.r +c4c6f3c32d459e57dbc71322834068c1 ld/testsuite/ld-arm/arm-lib.s +f278856f60aa2e92fef6f8efcb95cd87 ld/testsuite/ld-arm/arm-movwt.d +b426a92fe21a99c3863c6101c2313fdf ld/testsuite/ld-arm/arm-movwt.s +d8a05038cb85c454ed420fb6915da278 ld/testsuite/ld-arm/arm-pic-veneer.d +899b6abee6b02dc13cce6c0ddccd883e ld/testsuite/ld-arm/arm-pic-veneer.s +c4ff75c0232f3b2256bc7aafc3bc8e40 ld/testsuite/ld-arm/arm-rel31.d +8cebae8ee9a229083227e603191c0391 ld/testsuite/ld-arm/arm-rel31.s +09ee606ddacc2f55cc25902f2a6d5515 ld/testsuite/ld-arm/arm-rel32.d +1e2ce4555be8588f9ae73d3d59424e5c ld/testsuite/ld-arm/arm-rel32.s +9fc3aef29b8fbf55de40dd3dc788b94c ld/testsuite/ld-arm/arm-static-app.d +31e63d6e3b7ba27e293f96df500359d9 ld/testsuite/ld-arm/arm-static-app.r +bf32a1e13602b56dbc2ccd6d3cc7075a ld/testsuite/ld-arm/arm-static-app.s +a69a7159f61904208e6b1cc0d5b3c263 ld/testsuite/ld-arm/arm-target1-abs.d +9614e4d603f01aa481ea9b010921613d ld/testsuite/ld-arm/arm-target1-rel.d +4f25ab9246a0db32d11a546d9125b081 ld/testsuite/ld-arm/arm-target1.s +db7bf3b0f71d8c6db5ba1593a29e2e4c ld/testsuite/ld-arm/arm-target2-abs.d +bafd45e2fb70ed3e7636147857fb38a6 ld/testsuite/ld-arm/arm-target2-got-rel.d +3450245b99e8b9ad0a7c1faa69461146 ld/testsuite/ld-arm/arm-target2-rel.d +9cf9947ecc7d9790a8559eaf8ae700d4 ld/testsuite/ld-arm/arm-target2.s +fe849e07c75e05d399efc326b296c435 ld/testsuite/ld-arm/arm.ld +44893e5a5afc38ad27167c030ee5c958 ld/testsuite/ld-arm/armthumb-lib.d +2bc49ee8cf149c8a9ee254d14f8385c0 ld/testsuite/ld-arm/armthumb-lib.sym +efbfb53e4bea0790c927b2a3e318ca43 ld/testsuite/ld-arm/armv4-bx.d +e2dadb7d750471c27af1efd41b48a882 ld/testsuite/ld-arm/armv4-bx.s +e3663adf291034687f2310d8c36235a6 ld/testsuite/ld-arm/attr-merge-2.attr +5f12936f87e1ed4b81d2a70331d30421 ld/testsuite/ld-arm/attr-merge-2a.s +c8bd90e167a02533a37e59f8c5e4dbe2 ld/testsuite/ld-arm/attr-merge-2b.s +4a5365fbbe1c0ebf6ef9b9716a8f862d ld/testsuite/ld-arm/attr-merge-3.attr +1ba5e1d384cc9aff15613343d46585d4 ld/testsuite/ld-arm/attr-merge-3a.s +08eb07a082249955d132e6c7039848de ld/testsuite/ld-arm/attr-merge-3b.s +6da714aa56c470a02600e1d60c412e28 ld/testsuite/ld-arm/attr-merge-4.attr +6f0ae206678ea57ff2000af1db378299 ld/testsuite/ld-arm/attr-merge-4a.s +899f45463773d5eb3c444646029ce5f9 ld/testsuite/ld-arm/attr-merge-4b.s +702d1f2815531ce86e0d10e88be0aa5b ld/testsuite/ld-arm/attr-merge-5.attr +62f80cb0667f1f4f15b674a8af29dab4 ld/testsuite/ld-arm/attr-merge-5.s +76c3e5190262fcaabbcd8a47e791c7b9 ld/testsuite/ld-arm/attr-merge-6.attr +072e2bbfcbf5398506cd91cf59cfd204 ld/testsuite/ld-arm/attr-merge-6a.s +92105a7efb116e4e72d261e1127a711c ld/testsuite/ld-arm/attr-merge-6b.s +76c3e5190262fcaabbcd8a47e791c7b9 ld/testsuite/ld-arm/attr-merge-7.attr +2e18644e38bb3e56b3f8810232878f50 ld/testsuite/ld-arm/attr-merge-7a.s +43be1b33b4ba036cc07b070486447a6e ld/testsuite/ld-arm/attr-merge-7b.s +a6f56cbf4b9ff50c842051a67ddc4114 ld/testsuite/ld-arm/attr-merge-arch-1.attr +079f1aaeb79045c44b450ae046ad70bf ld/testsuite/ld-arm/attr-merge-arch-2.attr +fe15ddce74851e7fbc2865200b34df67 ld/testsuite/ld-arm/attr-merge-incompatible.d +fc3daa1b534d41b11840efff5c4c170a ld/testsuite/ld-arm/attr-merge-incompatiblea.s +62f80cb0667f1f4f15b674a8af29dab4 ld/testsuite/ld-arm/attr-merge-incompatibleb.s +0d80c6d12051d67b1b304bea1cdbbf55 ld/testsuite/ld-arm/attr-merge-unknown-1.d +a0de730b63d5dfb48cf9cd87a0b7cb08 ld/testsuite/ld-arm/attr-merge-unknown-1.s +564fc214fee68b50a10fe6c7617eee8c ld/testsuite/ld-arm/attr-merge-unknown-2.d +e6d53a8df83263f9ddb77d774170ab4d ld/testsuite/ld-arm/attr-merge-unknown-2.s +7b754df1f42c142b78e720da0ba254e2 ld/testsuite/ld-arm/attr-merge-unknown-2r.d +cd4290118ac4cc3d77ec922696ca8d2b ld/testsuite/ld-arm/attr-merge-unknown-3.d +bb7873ee1d585090f26689eb2c4014c7 ld/testsuite/ld-arm/attr-merge-vfp-1.d +2eb41ed7bed45aad91bcdeacce7a8aa0 ld/testsuite/ld-arm/attr-merge-vfp-1r.d +4e9dbd7dc5c977f7fd9dd43ec933d7e3 ld/testsuite/ld-arm/attr-merge-vfp-2.d +f8b0584fc86faffed19d1130fc34dc93 ld/testsuite/ld-arm/attr-merge-vfp-2.s +6741b604f0d2859db4903a2b8bec0828 ld/testsuite/ld-arm/attr-merge-vfp-2r.d +f28af5c6a13398cbeac6f0c860d2dcd6 ld/testsuite/ld-arm/attr-merge-vfp-3-d16.s +d52893c369f5394c56e38f653de48e8d ld/testsuite/ld-arm/attr-merge-vfp-3.d +4c48ddba2fcd22187f0226a2012d5595 ld/testsuite/ld-arm/attr-merge-vfp-3.s +2187bb1f951eded643ff496f0331c598 ld/testsuite/ld-arm/attr-merge-vfp-3r.d +285bf2f43dcf84d9d2b6c39f34b357c4 ld/testsuite/ld-arm/attr-merge-vfp-4-d16.s +d19dddc8dddc6e7b80627c63d2494f84 ld/testsuite/ld-arm/attr-merge-vfp-4.d +8de7869cf10231747ddf8ead86b8b046 ld/testsuite/ld-arm/attr-merge-vfp-4.s +44ee3543f69e1831b0a3f448abe0c85d ld/testsuite/ld-arm/attr-merge-vfp-4r.d +02452b478b79db96253056986747ee16 ld/testsuite/ld-arm/attr-merge-vfp-5.d +32cc70e21f3b5675d8a8f8ec8e4c2fce ld/testsuite/ld-arm/attr-merge-vfp-5r.d +668996480394f949a3943b906b482feb ld/testsuite/ld-arm/attr-merge-vfp-6.d +ab1d0c0d11a1d914975b7ae8200f7364 ld/testsuite/ld-arm/attr-merge-vfp-6r.d +c50abc378811fb009b68ec103f8be197 ld/testsuite/ld-arm/attr-merge-vfpv3xd.s +b4360e3265d2af1e542fed5b6fbccd53 ld/testsuite/ld-arm/attr-merge-wchar-0.s +7fb29658bd9bc28063a58d7e8d570f92 ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d +f0f1d81df0769ada7748d424d85f0f97 ld/testsuite/ld-arm/attr-merge-wchar-00.d +2b4a11110a04738d50457042148c288f ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d +d339f951c00ab9f2676ece4477d16a5b ld/testsuite/ld-arm/attr-merge-wchar-02.d +d5448e3d00cfb657ae55ccaeb13654d9 ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d +d74677e3dd4e57f22e01e609be12e4de ld/testsuite/ld-arm/attr-merge-wchar-04.d +2c296cb445843717d76f0e456347e416 ld/testsuite/ld-arm/attr-merge-wchar-2.s +ecf839ea72713f6d3465f5f06c30ce4c ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d +844b927260ce385379bf83c79d6d83f5 ld/testsuite/ld-arm/attr-merge-wchar-20.d +3b27a22c667e04291a9a80bcb68a437d ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d +766d16be48c8d68ce16c0b30b0dc4e00 ld/testsuite/ld-arm/attr-merge-wchar-22.d +958586afae8bb2eff5887a4a09a85375 ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d +797c7798987c3a88b6728b08baa1d289 ld/testsuite/ld-arm/attr-merge-wchar-24.d +e25c78be043d14cf8a3025dfafec8d7a ld/testsuite/ld-arm/attr-merge-wchar-4.s +dd65ac98876c9fbfbbe7a9560a18d516 ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d +6d52dd393e397056682f562957478b23 ld/testsuite/ld-arm/attr-merge-wchar-40.d +66b391040463dfa7c28843537b17ef4f ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d +d64d5b8c690cbc57d414656ea5259b4b ld/testsuite/ld-arm/attr-merge-wchar-42.d +bdc41fca047e0ae8d657d30f9c2ef64c ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d +295dd091a506a3e4b1770cc8b7b9c8d5 ld/testsuite/ld-arm/attr-merge-wchar-44.d +1d5222dd7f07618dae4fe1d52728376d ld/testsuite/ld-arm/attr-merge.attr +8769cbbf0c802d7f2c4b4364ba841b4b ld/testsuite/ld-arm/attr-merge.s +1632d9677c2b9800feac355724a3d9dc ld/testsuite/ld-arm/blank.s +ba2e9f916e17ba98c1ce3d06e3221320 ld/testsuite/ld-arm/callweak-2.d +1ff473794b52b3c0372dde027b120ebb ld/testsuite/ld-arm/callweak-2.s +48ac319a0e3e64039e9fede6a80e386d ld/testsuite/ld-arm/callweak.d +2e3b64e093e12c6da2f693266d058577 ld/testsuite/ld-arm/callweak.s +7e22f1277033cc08b8fa53289b0779c6 ld/testsuite/ld-arm/cortex-a8-arm-target.s +bab664f9cbbe460a870357a8fa8c8245 ld/testsuite/ld-arm/cortex-a8-far-1.s +be27d10903245210f7ba901f98244343 ld/testsuite/ld-arm/cortex-a8-far-2.s +6302f37d4b07b405a0d1741b0398365a ld/testsuite/ld-arm/cortex-a8-far-3.s +948af81f56a6ef8c3f4872264f6d087f ld/testsuite/ld-arm/cortex-a8-far.d +1ffe502271a5f68dc515a82af764d8fa ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d +b50c2ae6aba4a0202cc17ff8e8b775ca ld/testsuite/ld-arm/cortex-a8-fix-b-plt.s +01bba47886edfb28947408e14f5ec8f7 ld/testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d +045519d3c449489440e9ea52dae4e515 ld/testsuite/ld-arm/cortex-a8-fix-b-rel-thumb.d +6b22eb67a82b0807b682a0e71c5502ca ld/testsuite/ld-arm/cortex-a8-fix-b-rel.s +fb6ef44a33f7e0761ddaeae2c30ead18 ld/testsuite/ld-arm/cortex-a8-fix-b.d +36631979a7237c784288b48a4d7d4d32 ld/testsuite/ld-arm/cortex-a8-fix-b.s +0890156477a2ae6fd8c2650be3031f0d ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d +2adbba2039a01ab3a6d57086fd991b78 ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.s +11f72b8789056c492dc9c8b8d359e304 ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel-thumb.d +e451296a2ef78f15f6cf2fddb05237da ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel.s +d617939309f9ba77893f0621bbaf14d2 ld/testsuite/ld-arm/cortex-a8-fix-bcc.d +6ef3522d14ec39cd532099e0302784f3 ld/testsuite/ld-arm/cortex-a8-fix-bcc.s +28823d7677e078fe67736d3bc47bffec ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d +e6c4fa37fc21418e2a20576d38ef0347 ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.s +f4045f402dfc1b574e9ca159f55d841c ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-arm.d +cd0e6988625aed95688ccbc5339306f7 ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d +73aaf1bc6445754cbb9abbf7f2f92e73 ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-thumb.d +475faa739e8d5a8a44e123dc086001d0 ld/testsuite/ld-arm/cortex-a8-fix-bl-rel.s +c94c625b4d0121a79118a8d8b96b4b02 ld/testsuite/ld-arm/cortex-a8-fix-bl.d +2181cf399ebb5a864e48ad9199a00ec1 ld/testsuite/ld-arm/cortex-a8-fix-bl.s +0dc55dd25c8252492a84ed229e7250da ld/testsuite/ld-arm/cortex-a8-fix-blx-bcond.d +291f8743a6f9543a45f9bcd3638abd25 ld/testsuite/ld-arm/cortex-a8-fix-blx-bcond.s +28823d7677e078fe67736d3bc47bffec ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d +790d8a4a3d218060ad43a77255798379 ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.s +f4045f402dfc1b574e9ca159f55d841c ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-arm.d +73aaf1bc6445754cbb9abbf7f2f92e73 ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-thumb.d +af72dc49b413d92ed9667b4d63ed9ddf ld/testsuite/ld-arm/cortex-a8-fix-blx-rel.s +6873878cb2ebaa1bf46010dabc5727f7 ld/testsuite/ld-arm/cortex-a8-fix-blx.d +1e25975b509deb838f6e0d2254ff499f ld/testsuite/ld-arm/cortex-a8-fix-blx.s +ce7c7287491dece28e98da1c3efe773d ld/testsuite/ld-arm/cortex-a8-fix-hdr.d +48784d08956228e0d16b89ac340ea6ab ld/testsuite/ld-arm/cortex-a8-fix-hdr.s +864221fec407b2c37533593c55894f02 ld/testsuite/ld-arm/cortex-a8-fix-hdr.t +80854a8a9c4500cc20738d200a77b006 ld/testsuite/ld-arm/cortex-a8-fix-plt.ld +a9dac8d0925445e9d10ce4f596b22e2a ld/testsuite/ld-arm/cortex-a8-thumb-target.s +b88dcc9e56e2728d412f0d5743d028b0 ld/testsuite/ld-arm/data-only-map.d +3e5794d866ad28c00e03cfc572e2c705 ld/testsuite/ld-arm/data-only-map.ld +eb5f0ce3abd8b00466907d473b245d54 ld/testsuite/ld-arm/data-only-map.s +560401691ef9f717d32d73bc749fbe16 ld/testsuite/ld-arm/discard-unwind.ld +d3572717a33b9984a0736abd439301fb ld/testsuite/ld-arm/emit-relocs1-vxworks.d +dc068f97c1fa2716277fa6e58f1b3fee ld/testsuite/ld-arm/emit-relocs1.d +060f69d9ec279b88a035babbd2638197 ld/testsuite/ld-arm/emit-relocs1.s +cd4c31e1aa87e9987fe51b559459c8a9 ld/testsuite/ld-arm/exec-got-1.d +4a6620f5ffdf80120288d531181e52f9 ld/testsuite/ld-arm/exec-got-1a.s +b434422e46503615e91cf825c828c2f5 ld/testsuite/ld-arm/exec-got-1b.s +90320e8531ecf52267551ed492347720 ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d +759037c784bbc000f3fb6494333fdd34 ld/testsuite/ld-arm/farcall-arm-arm.d +83d80a7ef45408d267162af94a007143 ld/testsuite/ld-arm/farcall-arm-arm.s +da263ec380f531417f9934070f7d83d5 ld/testsuite/ld-arm/farcall-arm-thumb-blx-pic-veneer.d +37ac132fdbf7a1e97348862517ba5412 ld/testsuite/ld-arm/farcall-arm-thumb-blx.d +da263ec380f531417f9934070f7d83d5 ld/testsuite/ld-arm/farcall-arm-thumb-pic-veneer.d +612fa477003bb6c3d2fd4305c8590242 ld/testsuite/ld-arm/farcall-arm-thumb.d +feafda34a355cec86381a9424c1923e0 ld/testsuite/ld-arm/farcall-arm-thumb.s +aed25e01070077e10df302eb4d39259a ld/testsuite/ld-arm/farcall-data.d +77a25d7840b7eea965802b011cce6bf7 ld/testsuite/ld-arm/farcall-data.s +bc8342bacca85509c43a781286219175 ld/testsuite/ld-arm/farcall-group-limit.d +2f5489361a2dcfadb6f944f9cca65ae6 ld/testsuite/ld-arm/farcall-group-size2.d +a0a58aad96873c94862b773f4af7c5df ld/testsuite/ld-arm/farcall-group.d +dfaec37784ca0c2f25d2f04ebb05fdf9 ld/testsuite/ld-arm/farcall-group.s +d61430b77747464e5d48aa940be39580 ld/testsuite/ld-arm/farcall-group2.s +349d0f252076dfdc0de2b81a072b940f ld/testsuite/ld-arm/farcall-group3.s +3cbbaa21c86c5e0cbf97d31c735740b8 ld/testsuite/ld-arm/farcall-group4.s +fa28a8361a3595002a208780a18848d0 ld/testsuite/ld-arm/farcall-mix.d +1017db2c56473761890b4d633b7f8699 ld/testsuite/ld-arm/farcall-mix.s +38454c9e76cf1a3878147a0ba367ce6e ld/testsuite/ld-arm/farcall-mix2.d +a90dede13396e671d72c9d9fa580deeb ld/testsuite/ld-arm/farcall-mix2.s +8264d6b2f5abd02c1bc753d150d54fdc ld/testsuite/ld-arm/farcall-mixed-app-v5.d +cbcb7b567114381e559938f0020cfbac ld/testsuite/ld-arm/farcall-mixed-app.d +8655055d07990ff809303c4475e4a434 ld/testsuite/ld-arm/farcall-mixed-app.r +c889e945f1869d0b5ed8ef8f51a83da2 ld/testsuite/ld-arm/farcall-mixed-app.s +0a6c2d1e1c9c4b9b9e5ab3c83be5820e ld/testsuite/ld-arm/farcall-mixed-app.sym +3828f51461c36d5c623d2cb4c99ffb19 ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d +90afc5525996d122c0b23a31f4f43096 ld/testsuite/ld-arm/farcall-mixed-lib.d +38b363bcc83b5cef3b3f8f2a9a434185 ld/testsuite/ld-arm/farcall-mixed-lib.r +b459c568af8f35839ef4077ae253512a ld/testsuite/ld-arm/farcall-mixed-lib1.s +686cbdd2bd1f1c30c9631b49c25ebf43 ld/testsuite/ld-arm/farcall-mixed-lib2.s +12c6cdcef0c645a44f0f118ce884014a ld/testsuite/ld-arm/farcall-section.d +3c4d686c3c049de14838a526694239a1 ld/testsuite/ld-arm/farcall-section.s +be48864e107495efc288f0640e224e3b ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d +e09e2081dad65507e45d9528b05d6954 ld/testsuite/ld-arm/farcall-thumb-arm-blx.d +0dc2d82344eaac7fec38a680a346f5df ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d +cec9550efcffd7c281d7370ee105f3a5 ld/testsuite/ld-arm/farcall-thumb-arm-short.d +60c1e55d3ce000d9efab15dad7d9c387 ld/testsuite/ld-arm/farcall-thumb-arm-short.s +d3b1918fe27953b249ca9e60b9a3ac23 ld/testsuite/ld-arm/farcall-thumb-arm.d +938e05203cf88a8f3d61328da7f40b6f ld/testsuite/ld-arm/farcall-thumb-arm.s +06fb862ae70622ddd9eae326873a6ee6 ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d +389328084a5f337f3e8a4a519c58f0ca ld/testsuite/ld-arm/farcall-thumb-thumb-blx.d +cea8612792533d221576548b5aa3d717 ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d +22a1e68933b8eec505a19b19d88950f5 ld/testsuite/ld-arm/farcall-thumb-thumb-m.d +62776a7479e8115771ae878aaa1aa860 ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d +9a04dc62282034e81d8ab40d6fbbaba6 ld/testsuite/ld-arm/farcall-thumb-thumb.d +1748da76b5b6995c5e5246beaf550c89 ld/testsuite/ld-arm/farcall-thumb-thumb.s +5301164970cf5b3dfa9ebd66c1df0ae1 ld/testsuite/ld-arm/fix-arm1176-off.d +9a783801d73e0f6e6756c32781e5a34c ld/testsuite/ld-arm/fix-arm1176-on.d +e0c37a2fccb6d4aeea259944dd0507e9 ld/testsuite/ld-arm/fix-arm1176.s +8c02ba56f0c8f3588233afedca05a14f ld/testsuite/ld-arm/gc-thumb-lib.s +1c765050a71f5bf432d17b21156bfc2f ld/testsuite/ld-arm/gc-thumb.d +6ffb0ee4ab2aa38ab7bcb4c8c3be6c1e ld/testsuite/ld-arm/gc-thumb.s +bbcf9d024d1ee8f2d47abb91f42ba9e8 ld/testsuite/ld-arm/gc-unwind.d +4bbe9404ed0e79bc734d7271a6635aad ld/testsuite/ld-arm/gc-unwind.s +fcd7254515aeb9da7a9cc34316757871 ld/testsuite/ld-arm/group-relocs-alu-bad.d +76c773939a0441f44c6bc6dbc081815d ld/testsuite/ld-arm/group-relocs-alu-bad.s +00b5026469825891d84525fc4a61a2b4 ld/testsuite/ld-arm/group-relocs-ldc-bad.d +bb9334a2ba26dcdce07f514ab138ae31 ld/testsuite/ld-arm/group-relocs-ldc-bad.s +8ef803d391e047e300b8b10b635802b2 ld/testsuite/ld-arm/group-relocs-ldr-bad.d +e96fa91669ff6054ee35c92122768211 ld/testsuite/ld-arm/group-relocs-ldr-bad.s +28fa43dc8bcb87721103002b3f58673f ld/testsuite/ld-arm/group-relocs-ldrs-bad.d +9693aef33aa3f5ee3818dc2204efce12 ld/testsuite/ld-arm/group-relocs-ldrs-bad.s +ee4ef770572061ed1059a6c047237cfe ld/testsuite/ld-arm/group-relocs.d +03e7c32feaf0a78ccde5ee5389ffffbd ld/testsuite/ld-arm/group-relocs.s +a6710411b398ee9595e1ccc85c5ca1da ld/testsuite/ld-arm/ifunc-1.dd +8df0f6d6af5f8ad2dd377e406417421c ld/testsuite/ld-arm/ifunc-1.gd +aab57a58ead091719749e52bc9b0288f ld/testsuite/ld-arm/ifunc-1.rd +0d4de4218e3ca91dc988e8e6b1e3ef20 ld/testsuite/ld-arm/ifunc-1.s +baa3d9d8f85b5dbf35255f3f724ae6dd ld/testsuite/ld-arm/ifunc-10.dd +91f972e1fd57d1b97f1e99c455bf6679 ld/testsuite/ld-arm/ifunc-10.gd +0494c06eeb2dac556c5f489089760eb8 ld/testsuite/ld-arm/ifunc-10.rd +476d1fd97b14dfc080a90d893793b963 ld/testsuite/ld-arm/ifunc-10.s +d3e16de902b7a18de2d6a590a5ee1a37 ld/testsuite/ld-arm/ifunc-11.dd +b02712f5fc11e5b12588309428dbdb6f ld/testsuite/ld-arm/ifunc-11.gd +73211ce48cb17600d2cde81afbe05b59 ld/testsuite/ld-arm/ifunc-11.rd +5189107445e618cf2d459e80c0f442c1 ld/testsuite/ld-arm/ifunc-11.s +d3e16de902b7a18de2d6a590a5ee1a37 ld/testsuite/ld-arm/ifunc-12.dd +58d38e6171844a187d90880c6efa541c ld/testsuite/ld-arm/ifunc-12.gd +c5111eeaec95bafdf37189a7edfbd675 ld/testsuite/ld-arm/ifunc-12.rd +27565857472e6dfb6f5f0d1e0eb9e9ed ld/testsuite/ld-arm/ifunc-12.s +4c083076902479b27c6858c33f1015de ld/testsuite/ld-arm/ifunc-13.dd +874a3e56ccc429ffcb496aff0ece4869 ld/testsuite/ld-arm/ifunc-13.gd +1f2a12faccac07fa4906d13ef08aa104 ld/testsuite/ld-arm/ifunc-13.rd +177a35974fd1f166319b424bed1614da ld/testsuite/ld-arm/ifunc-13.s +bc3819b9826ba589526f8b2f19f27a07 ld/testsuite/ld-arm/ifunc-14.dd +2c5d3d9cfe517b28252071905c6089ee ld/testsuite/ld-arm/ifunc-14.gd +be9dd722aa5e320899f179719896127e ld/testsuite/ld-arm/ifunc-14.rd +ece4f00edd71c05270d18832b1860afa ld/testsuite/ld-arm/ifunc-14.s +6db8d15204bc93456ae8e630c92c0be4 ld/testsuite/ld-arm/ifunc-15.dd +2c5d3d9cfe517b28252071905c6089ee ld/testsuite/ld-arm/ifunc-15.gd +be9dd722aa5e320899f179719896127e ld/testsuite/ld-arm/ifunc-15.rd +3deab62a36968e37b8c2fa75f8ff1862 ld/testsuite/ld-arm/ifunc-15.s +f9487bea5bfb6cd151ef0977ed0835f2 ld/testsuite/ld-arm/ifunc-16.dd +2f2d8fb64449091818ddd90679ee69ad ld/testsuite/ld-arm/ifunc-16.gd +30eb42b09208249590397a29ede51b06 ld/testsuite/ld-arm/ifunc-16.rd +1c0566c3d09e6f8041e6d59f9d8b62aa ld/testsuite/ld-arm/ifunc-16.s +3be7270b7005ce0311c6e3a1357637e3 ld/testsuite/ld-arm/ifunc-2.dd +0a17cc422e125bab358d4cf57732391e ld/testsuite/ld-arm/ifunc-2.gd +9ab6e95fe2bf2c9c3ea298f8acd5b80b ld/testsuite/ld-arm/ifunc-2.rd +ffe494ca12faae825c0c61d3cb152ab2 ld/testsuite/ld-arm/ifunc-2.s +061b687be09f2437889f98675a3234a2 ld/testsuite/ld-arm/ifunc-3.dd +57d6988d83210075134bb6cfe13f32f9 ld/testsuite/ld-arm/ifunc-3.gd +3af3806cb0fff3a84a1c5647d28f4b78 ld/testsuite/ld-arm/ifunc-3.rd +422cfa798bbc5f772caf833c9e3d6c47 ld/testsuite/ld-arm/ifunc-3.s +54955a7c2c7776a91bb8e359948f671e ld/testsuite/ld-arm/ifunc-4.dd +da59c76249f34e3da4c0c7fbddc7b271 ld/testsuite/ld-arm/ifunc-4.gd +ab54c17ae17ff0a5d5e2a9665e45cb38 ld/testsuite/ld-arm/ifunc-4.rd +1294b3289faaf0f4a2a491c0701146cd ld/testsuite/ld-arm/ifunc-4.s +5921f04a50e20e64d364b50dd3b39a83 ld/testsuite/ld-arm/ifunc-5.dd +67d3344e3680aeecf7e07d9a241de09a ld/testsuite/ld-arm/ifunc-5.gd +aab57a58ead091719749e52bc9b0288f ld/testsuite/ld-arm/ifunc-5.rd +185ce84137e9ca77d9f7f71b210b3af5 ld/testsuite/ld-arm/ifunc-5.s +b9553f59feafdc8563558df5aa7f25b1 ld/testsuite/ld-arm/ifunc-6.dd +80c067d92a3d84f410aa67cda4706699 ld/testsuite/ld-arm/ifunc-6.gd +058fcecb8256e8885de3e6f8d0e433d6 ld/testsuite/ld-arm/ifunc-6.rd +7d16c8d83ce6606675deb0f74ecc1176 ld/testsuite/ld-arm/ifunc-6.s +41c4a428caf69fb31ac3aeb1f5f01200 ld/testsuite/ld-arm/ifunc-7.dd +509a265d4fe0d75472a1cdf9d96b69e1 ld/testsuite/ld-arm/ifunc-7.gd +e7a45e746b52e017922d8165e5093419 ld/testsuite/ld-arm/ifunc-7.rd +200eae4c0be923c69e3840550fbc6c13 ld/testsuite/ld-arm/ifunc-7.s +8e1cc904545be437d63158cf44f97442 ld/testsuite/ld-arm/ifunc-8.dd +ef63be7f0b9483d7cdf79f030ec57c77 ld/testsuite/ld-arm/ifunc-8.gd +b5cf2a0d3f6dfc9c7abf18e554ee7f56 ld/testsuite/ld-arm/ifunc-8.rd +d6a1afb52dcb2f346938856b0de9b605 ld/testsuite/ld-arm/ifunc-8.s +6b9e131e4ad668348819d153a1a528f5 ld/testsuite/ld-arm/ifunc-9.dd +814d8b7972b856563e6c355ab0356864 ld/testsuite/ld-arm/ifunc-9.gd +477a9683c43e87d8cfa6d746ee74f25b ld/testsuite/ld-arm/ifunc-9.rd +62f7d0a0298f7800c2f674e364db1222 ld/testsuite/ld-arm/ifunc-9.s +d597cf67123031a82eee9b1da9f869c1 ld/testsuite/ld-arm/ifunc-dynamic.ld +101b4e65b6bc57296c808833b2ec7f82 ld/testsuite/ld-arm/ifunc-static.ld +bb5e58349f11b25d307ad765a8a87a5b ld/testsuite/ld-arm/jump-reloc-veneers-long.d +5119a2190ddc593f4a8bf5950b7f6f0d ld/testsuite/ld-arm/jump-reloc-veneers-short1.d +7620283ae66569c459a5b78921e6a0b5 ld/testsuite/ld-arm/jump-reloc-veneers-short2.d +c3a49e9c9c7b1a702e6ab9c83690636c ld/testsuite/ld-arm/jump-reloc-veneers.s +aaeacb4c7723efa0592090d8e28aa38b ld/testsuite/ld-arm/jump19.d +5fdb667b4eeed2b5a5e365f6157f7f53 ld/testsuite/ld-arm/jump19.s +df7218912027fcf0e0f3f4faadca956e ld/testsuite/ld-arm/mixed-app-v5.d +8151f417c87740a964fe3c72a4045469 ld/testsuite/ld-arm/mixed-app.d +aefaac7192d3e47c827da951f89d2bae ld/testsuite/ld-arm/mixed-app.r +7b3c6bc9827724b36f7df270af0ec4f5 ld/testsuite/ld-arm/mixed-app.s +fc0e72844d705d53a0759effb558cc33 ld/testsuite/ld-arm/mixed-app.sym +cf233c6eea8b0a23470d56a668f7c16f ld/testsuite/ld-arm/mixed-lib.d +5ca1ed7123c1056cecf2efef0273bab5 ld/testsuite/ld-arm/mixed-lib.r +d01eec610829680bb4e52a46bed255bc ld/testsuite/ld-arm/mixed-lib.s +4b64293ae091d7fd6a1bf20ce11c3050 ld/testsuite/ld-arm/mixed-lib.sym +20050f6942c1fc5bfdfdcd1b03dbfa8b ld/testsuite/ld-arm/movw-merge.d +b79bc8448d795012b328ada735e12bee ld/testsuite/ld-arm/movw-merge.s +53c96f044e7c3b502316c9f7f71e4bff ld/testsuite/ld-arm/movw-shared-1.d +0bb28944ba6ceccc86437d91e86f7e26 ld/testsuite/ld-arm/movw-shared-1.s +44c6dee9296cd27e5715b8175d18a234 ld/testsuite/ld-arm/movw-shared-2.d +0a3da298be90f8c762211f45c7b68480 ld/testsuite/ld-arm/movw-shared-2.s +98075e266e56c001a5e76a193b4a5241 ld/testsuite/ld-arm/movw-shared-3.d +b943013da10e5665a271e33dbb520a58 ld/testsuite/ld-arm/movw-shared-3.s +1aeba25e0021ee087a2b313ad603c0d2 ld/testsuite/ld-arm/movw-shared-4.d +26671559674ff919a52ed229aadcb0c5 ld/testsuite/ld-arm/movw-shared-4.s +4e3e9b2de84e9e9e6e81f7a3b2343cf4 ld/testsuite/ld-arm/preempt-app.s +b63a115e69a4b335d3861f55c8f19568 ld/testsuite/ld-arm/preempt-app.sym +38f453d1542cd24062978039b7c38765 ld/testsuite/ld-arm/reloc-boundaries.d +baff38a8a30acb8c72fd4e7acafc2360 ld/testsuite/ld-arm/reloc-boundaries.s +0c32e8b3b51d8548cdf9c775ee4797ca ld/testsuite/ld-arm/rodata-merge-map.ld +1dfbf8ddc172e11c1d7dea588d0dcb28 ld/testsuite/ld-arm/rodata-merge-map.sym +c1d6d8c92f02883092e4e8e85637ae8d ld/testsuite/ld-arm/rodata-merge-map1.s +4a214a61ded90df27f5185a5ccffc5bf ld/testsuite/ld-arm/rodata-merge-map2.s +bd696fad986a54fe1a3319d818b2ccf5 ld/testsuite/ld-arm/rodata-merge-map3.s +ad5f1e26b66959f573e3bafa40758fd0 ld/testsuite/ld-arm/script-type.ld +1d6496cff1fd71f774eb4cd7314249ac ld/testsuite/ld-arm/script-type.s +1037f3c433338a4151ab923181aa8cb3 ld/testsuite/ld-arm/script-type.sym +4efee958adfc0ada1f44fe3586a51db0 ld/testsuite/ld-arm/symbian-seg1.d +2408cc9c760cf2059e964dff9f670006 ld/testsuite/ld-arm/symbian-seg1.s +73ca4e992f5c70fb94a749aa53dbfb0d ld/testsuite/ld-arm/thumb-entry.d +d4dd7676d18d8440e8dc78137276c2ba ld/testsuite/ld-arm/thumb-entry.s +b0c5e71c9db3f59925be321612cf76dd ld/testsuite/ld-arm/thumb-rel32.d +7f7c412a10dcd39feff7bfecbf3f875d ld/testsuite/ld-arm/thumb-rel32.s +c5f7da09b76dfa38dc2ec27d2c83aeb0 ld/testsuite/ld-arm/thumb1-bl.d +03eb0ba2c48ae2667d7a6ca898ea3beb ld/testsuite/ld-arm/thumb1-bl.s +fa468fe009f1677ac87319602ae33155 ld/testsuite/ld-arm/thumb2-b-interwork.d +ea814a50dd2b1f41b064d29387e4334f ld/testsuite/ld-arm/thumb2-b-interwork.s +84a965aac564bb8b945b73ea75d6be8f ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d +aec7fd23eaaa64face2517c737c668a2 ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d +892983309cd404fe52d55aa6979846fa ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.s +84a965aac564bb8b945b73ea75d6be8f ld/testsuite/ld-arm/thumb2-bl-bad-noeabi.d +22ec46a0ec640631ff7fa0088354ede6 ld/testsuite/ld-arm/thumb2-bl-bad.d +ddfacb39f8a0959e97c0d694a9f8c315 ld/testsuite/ld-arm/thumb2-bl-bad.s +e6163d43f2569f249ff2b44adb24cd88 ld/testsuite/ld-arm/thumb2-bl-blx-interwork.d +f637f4d61a039a90caa5d1aff2d1976d ld/testsuite/ld-arm/thumb2-bl-blx-interwork.s +49fb48a76716c00fe6475c76c647c986 ld/testsuite/ld-arm/thumb2-bl-undefweak.d +ba0a6eb7d3d568f8fe1d9293b5420aea ld/testsuite/ld-arm/thumb2-bl-undefweak.s +ea21f941569b3de3ec0437495eefc779 ld/testsuite/ld-arm/thumb2-bl-undefweak1.d +98fad64aa58fb2a2eb75d6eb58917adb ld/testsuite/ld-arm/thumb2-bl-undefweak1.s +48deddf7c68baac25325992849fe5814 ld/testsuite/ld-arm/thumb2-bl.d +9aba264c21b5441d2084b6e18b0aeaca ld/testsuite/ld-arm/thumb2-bl.s +f0cc25e5eb5c416520f7c835abd1f32d ld/testsuite/ld-arm/tls-app.d +d56bf5cfb58a3c8990894de5e0e0a5bc ld/testsuite/ld-arm/tls-app.r +bc4dc7515cb97050d78993226b2fedb8 ld/testsuite/ld-arm/tls-app.s +e48dc88517162bab90d0825db6b298c8 ld/testsuite/ld-arm/tls-descrelax-be32.d +e26ad13f6391672c2cf17129d383bc92 ld/testsuite/ld-arm/tls-descrelax-be32.s +5240c9e8d92aab0f960a67e693ef800a ld/testsuite/ld-arm/tls-descrelax-be8.d +55af24eb165c542fdcb17f75e4c05af3 ld/testsuite/ld-arm/tls-descrelax-be8.s +5240c9e8d92aab0f960a67e693ef800a ld/testsuite/ld-arm/tls-descrelax-v7.d +55af24eb165c542fdcb17f75e4c05af3 ld/testsuite/ld-arm/tls-descrelax-v7.s +6374aa68ce57f26b79d5d1dfd141cbb0 ld/testsuite/ld-arm/tls-descrelax.d +1a44773a87c9dd55baf70236b7f36bbf ld/testsuite/ld-arm/tls-descrelax.s +e9941c02499b4c5cee6880b1e04f3bd9 ld/testsuite/ld-arm/tls-descseq.d +eea69985e64d1d536f68be2a4b0d2805 ld/testsuite/ld-arm/tls-descseq.r +10beea88b85a552ae9434a9c77c6feb2 ld/testsuite/ld-arm/tls-descseq.s +1cd746b24bf84348bebb78feecb93f9b ld/testsuite/ld-arm/tls-gdesc-got.d +4e23daed336ff2ba1865770eec0ef661 ld/testsuite/ld-arm/tls-gdesc-got.s +e81c93c74608053df30afa8a74f43f8c ld/testsuite/ld-arm/tls-gdesc-nlazy.g +2192d8df89dfa1b5c93d4ad23a4e6586 ld/testsuite/ld-arm/tls-gdesc-nlazy.s +9d0b90cbe9c9d3b2527695568edfe6c7 ld/testsuite/ld-arm/tls-gdesc.d +bef27081b67787e0d42ae61f07b70849 ld/testsuite/ld-arm/tls-gdesc.r +26f4d32f325082f087b8db9c219114c1 ld/testsuite/ld-arm/tls-gdesc.s +65464899069a5af5f066f76718f13be6 ld/testsuite/ld-arm/tls-gdierelax.d +cf62b197248ab9d838409e15d6ee2f30 ld/testsuite/ld-arm/tls-gdierelax.s +ba4e19d10bceac591a7eeee7d11eacc6 ld/testsuite/ld-arm/tls-gdierelax2.d +3b489e07b4e5e83033c20e1a75fb9370 ld/testsuite/ld-arm/tls-gdierelax2.s +a18d98fc16de076317a8c50b7a75b8d5 ld/testsuite/ld-arm/tls-gdlerelax.d +21143a3750a8bdadde7606fc95c357dc ld/testsuite/ld-arm/tls-gdlerelax.s +15871e53d47bb4d23b2b187ac59e3cfa ld/testsuite/ld-arm/tls-lib-loc.d +a944a12e800e231aa6cd77fe3275c993 ld/testsuite/ld-arm/tls-lib-loc.r +4117623b509f123c9d526ac1afe9696f ld/testsuite/ld-arm/tls-lib-loc.s +3c149ee6b006a1d5257be8b708f437ea ld/testsuite/ld-arm/tls-lib.d +a3b71f6b593b007133a9d485c840d289 ld/testsuite/ld-arm/tls-lib.r +b938da503cc6ccc3e40f0fd0651aeecf ld/testsuite/ld-arm/tls-lib.s +2481238e1b7c2aa834c7cc697cb58c39 ld/testsuite/ld-arm/tls-longplt-lib.d +4968ac3a96a401547e95a5a259caeca8 ld/testsuite/ld-arm/tls-longplt-lib.s +30b46a546a6bec9f6c8a88b66f6afe1c ld/testsuite/ld-arm/tls-longplt.d +72558e033ac20ff5f99511c5209bd01b ld/testsuite/ld-arm/tls-longplt.s +870dd314c9f6decb751fc33626b65ad0 ld/testsuite/ld-arm/tls-mixed.r +8d8c37619852fada3b1c587ce2548776 ld/testsuite/ld-arm/tls-mixed.s +181d153cf20c1c761349a3c0d340f0b3 ld/testsuite/ld-arm/tls-thumb1.d +24eed11e2f5ae18adb26a781288e0783 ld/testsuite/ld-arm/tls-thumb1.s +d6c5be1332f3c510766e9c2e60f8dccf ld/testsuite/ld-arm/unresolved-1-dyn.d +4d6f6ddc10a1b7d5c359a0ba2b1cb60e ld/testsuite/ld-arm/unresolved-1.d +814783ce65d5180dbc97af88aa6ef3c2 ld/testsuite/ld-arm/unresolved-1.s +98155639616ff023b84fc16a39af4d68 ld/testsuite/ld-arm/unwind-1.d +a08d4fbc9da6302600541688e261923b ld/testsuite/ld-arm/unwind-1.s +5d6f851cedb14ff9b6c9f767cb12111a ld/testsuite/ld-arm/unwind-2.d +138558e0008e2e92277834247000ecd7 ld/testsuite/ld-arm/unwind-2.s +92a18d52f70c07434af5a6b84a535f43 ld/testsuite/ld-arm/unwind-3.d +6802a9d6b277b3b6a1fdf5e742ac5ede ld/testsuite/ld-arm/unwind-3.s +4ae8b36ad194d5d581a09f41c0980fa4 ld/testsuite/ld-arm/unwind-4.d +64efc6e0e87353b819851d03aa3d7b79 ld/testsuite/ld-arm/unwind-4.s +9988e93507bcb10423cf8ecd2f1522cf ld/testsuite/ld-arm/unwind-5.d +d428b81188e7ad0fefeacd7cd445f162 ld/testsuite/ld-arm/unwind-5.s +fb429475715715627aafc8a32e2320f1 ld/testsuite/ld-arm/use-thumb-lib.s +04931de298951b43360f67418be6ac25 ld/testsuite/ld-arm/use-thumb-lib.sym +d05cf65a4bf68d1269500f3c0a331561 ld/testsuite/ld-arm/vfp11-fix-none.d +5fd7b4a3fe5eb83c567f709b955c8469 ld/testsuite/ld-arm/vfp11-fix-none.s +077270d01ab3ff154291a1c6bd576600 ld/testsuite/ld-arm/vfp11-fix-scalar.d +cfa0eb1c39adcd6d90a8a20419966b3b ld/testsuite/ld-arm/vfp11-fix-scalar.s +c49f3775666d12290e32b7ec2839acbc ld/testsuite/ld-arm/vfp11-fix-vector.d +a843e8a871249735f03a3e0e9ed4514a ld/testsuite/ld-arm/vfp11-fix-vector.s +a92f6f2d81ed7ababe27bb765db07789 ld/testsuite/ld-arm/vxworks1-lib.dd +e79bf538427185b3ca75d00211102266 ld/testsuite/ld-arm/vxworks1-lib.nd +ec444a82eab88a95636abf290c7ac6b7 ld/testsuite/ld-arm/vxworks1-lib.rd +5f4070589555cbed355250f9deb0093f ld/testsuite/ld-arm/vxworks1-lib.s +6dbdc5d4346169b9a3af98707d77be72 ld/testsuite/ld-arm/vxworks1-lib.td +57e13e14adacc62cab22da622bbcb01e ld/testsuite/ld-arm/vxworks1-static.d +6ab0beb8dd54b101c447b75ed090a3b2 ld/testsuite/ld-arm/vxworks1.dd +ff6cb82bd3dda9cb4328b50f2d88614e ld/testsuite/ld-arm/vxworks1.ld +b2237cabfb8182cf4769e450cb67a95f ld/testsuite/ld-arm/vxworks1.rd +045aed3105ae55b645a8715f198c3860 ld/testsuite/ld-arm/vxworks1.s +165ed1561458c0973255f985be876845 ld/testsuite/ld-arm/vxworks2-static.sd +e191cf28ec5e3f69a0d89dd051130471 ld/testsuite/ld-arm/vxworks2.s +7afb4e2fc8be35ad985dcb2e21b7cbef ld/testsuite/ld-arm/vxworks2.sd +0b6c7ae053acc7186dacf752dd1dc367 ld/testsuite/ld-auto-import/auto-import.exp +870d0c9532413d40575e2e793eaf0f48 ld/testsuite/ld-auto-import/client.c +bc025b399dc1bf0e5fe050e08b235dff ld/testsuite/ld-auto-import/dll.c +19339110affdee3fe8f8341e17989a1f ld/testsuite/ld-bootstrap/bootstrap.exp +4b9f7ea09166acbf0b5d72c88c5b3956 ld/testsuite/ld-cdtest/cdtest-bar.cc +74c52f98695bf1f3c1a15e820e785464 ld/testsuite/ld-cdtest/cdtest-foo.cc +0329b786063f247527a5f98c53a3ea66 ld/testsuite/ld-cdtest/cdtest-foo.h +42bc325afd7f1f937f20faa53c9f1490 ld/testsuite/ld-cdtest/cdtest-main.cc +cc8e7cf87148e04a2dd8f166c3f3cfaa ld/testsuite/ld-cdtest/cdtest-nrv.dat +cfb423f4424fe65c2fe45d99c49ff558 ld/testsuite/ld-cdtest/cdtest.dat +c858af1140e2f6b05a7c89c75cb910c3 ld/testsuite/ld-cdtest/cdtest.exp +328c5cac80b76bd422b0b77d5517d175 ld/testsuite/ld-checks/asm.s +6903795a135ff658efd5d5e470d27451 ld/testsuite/ld-checks/checks.exp +536a4d2e63692344109849b984f9da06 ld/testsuite/ld-checks/script +028a3391ab77669d3571d4f6756e6e24 ld/testsuite/ld-cris/badgotr1.d +330f51428dc34d1de15e854517e1db7e ld/testsuite/ld-cris/comref1.s +87ee1f75d0ce21f1354697084feafac9 ld/testsuite/ld-cris/cris.exp +bd2d934b7debc19ede2cb90e437186e7 ld/testsuite/ld-cris/def2.d +aa4bf9d2db3ecc2102472e46f0495504 ld/testsuite/ld-cris/def3.d +0ecfc29d8b495c3dbade6c4ec9e66613 ld/testsuite/ld-cris/dso-1.s +8f2d8ccdebc59ed5edeed9a38532f222 ld/testsuite/ld-cris/dso-1b.s +f73d09ac7bd8fdc83362c30cec088e28 ld/testsuite/ld-cris/dso-2.s +0963170a19c851b655a44c694bdc09d2 ld/testsuite/ld-cris/dso-3.s +555778245510ec8cd1e0fe59059905d5 ld/testsuite/ld-cris/dso12-pltdis.d +9b4414953bd917a57878326c0303aebb ld/testsuite/ld-cris/dsofnf.s +d7d2a11598bb675c9e852af7bf18f915 ld/testsuite/ld-cris/dsofnf2.s +77b561688e2547f8d68e5cd9260c172e ld/testsuite/ld-cris/dsov32-1.s +b3d1c880e11c1d592e10fb5aedb655f5 ld/testsuite/ld-cris/dsov32-2.s +434758c86f0a616b126186d73a6895f7 ld/testsuite/ld-cris/dsov32-3.s +bba3177ca04b5c1a8fab36de034931e1 ld/testsuite/ld-cris/dsov32-4.s +5e0cd72ef03ae66100a223c3ac1ff509 ld/testsuite/ld-cris/euwref1.s +5918576f278343302911679d578b1f23 ld/testsuite/ld-cris/expalltst3 +1023eb64e4465edf00138aaf8d7280ca ld/testsuite/ld-cris/expdref1.s +c4996b40bccabdff3eb66c4ed510bd21 ld/testsuite/ld-cris/expdref2.s +107917d9538f44957dfa2240c5ec058e ld/testsuite/ld-cris/expdref3.s +ed035711171f1f7d20f0d20828fe5e50 ld/testsuite/ld-cris/expdref4.s +f66bb017aa48f260a1111b20ff3b2ed0 ld/testsuite/ld-cris/expdyn1.d +b40cfb11612986fe52121f5141810bb3 ld/testsuite/ld-cris/expdyn1.s +eec3aa679c6a20c50efb060106717e8f ld/testsuite/ld-cris/expdyn1w.s +a5cd0b3efb27eaa4893540fec9130357 ld/testsuite/ld-cris/expdyn2.d +53bdb4432f1b5bf2af64a42900a59fbf ld/testsuite/ld-cris/expdyn2.s +b136e897cab9add18604fa48cd5e6462 ld/testsuite/ld-cris/expdyn3.d +47647f67fceb63ae3022ecdd1272680f ld/testsuite/ld-cris/expdyn4.d +c59ef5bb4570c9ab1da147ed9c4e8a78 ld/testsuite/ld-cris/expdyn5.d +531df4286483200742350c41e7fa25e2 ld/testsuite/ld-cris/expdyn6.d +195c4ab4f311be98df9f88092201e9a7 ld/testsuite/ld-cris/expdyn7.d +5e78e7ddf1b5aa917ea617a17235447f ld/testsuite/ld-cris/globsym1ref.s +7d59c2f5e9279b6ace5aa4a9b7ad4db5 ld/testsuite/ld-cris/globsymw1.s +bbdcdd1bad770e5eb3cf979eda64fa56 ld/testsuite/ld-cris/globsymw2.s +5c651c2af895d93abf210b3ab6171465 ld/testsuite/ld-cris/got7.s +680f085d12e3a89850ae59aeea73309c ld/testsuite/ld-cris/gotplt1.d +c7799e2cd7102cb6c0575d9d85567503 ld/testsuite/ld-cris/gotplt2.d +86bb0aa4b5c096a2ffdf95982b1fd2ea ld/testsuite/ld-cris/gotplt3.d +beb4c53051cda32749a8b4628fb19f16 ld/testsuite/ld-cris/gotrel1.s +16ac0aa5032e8dc85780bb8073131840 ld/testsuite/ld-cris/gotrel2.s +d39e08b23d313014d2f12c4d29cb7e8a ld/testsuite/ld-cris/hiddef1.d +2aeafbfc344edf57eff2027c2cfbe1d7 ld/testsuite/ld-cris/hiddef1.s +0a2c0b67fcb79af873992b8aa6721e5b ld/testsuite/ld-cris/hide1 +5ba5524fb07f1ca49873a2746cab764a ld/testsuite/ld-cris/hidedsofns2468 +dcfc7b3526cca37684a42864dee9ed18 ld/testsuite/ld-cris/hidrefgotplt1.s +fb1117b690962188968b5f2eb57211b8 ld/testsuite/ld-cris/init.s +d0a2619e753e772735ce264e008ae124 ld/testsuite/ld-cris/ldsym1.d +1ed92df704f4d4b8981af6c0a96b6da9 ld/testsuite/ld-cris/libdso-1.d +757a5599ed4e5b03bf2defff6d25cbb1 ld/testsuite/ld-cris/libdso-10.d +49bd70b15a95ac22ab5b3d8cd6f660de ld/testsuite/ld-cris/libdso-11.d +4b4cb09269c192dda508bc10c140e903 ld/testsuite/ld-cris/libdso-12.d +da70ad049e99c494df72e4635cfc5bc9 ld/testsuite/ld-cris/libdso-12b.d +e896fe8c9f77152e2e3e0a1d5a1ed4aa ld/testsuite/ld-cris/libdso-12c.d +5dc6af549ead00e0438dffdb7081a7a7 ld/testsuite/ld-cris/libdso-13.d +00e56354e0d53d7c1aedc4f0f31d851d ld/testsuite/ld-cris/libdso-13b.d +a8c3eedaaf75d72b3d2f58fa1e737ef8 ld/testsuite/ld-cris/libdso-14.d +11740ef0d10f19c9cf5e51f5f38c889c ld/testsuite/ld-cris/libdso-15.d +e7dff018a7d4e890e31c9b048c280178 ld/testsuite/ld-cris/libdso-15b.d +08d349d68dae38f19732600cb6f2c92c ld/testsuite/ld-cris/libdso-1b.d +1d92d10ce3151f36e6b0ffc0eeab1e11 ld/testsuite/ld-cris/libdso-1c.d +0aff47ebdec98ce75841046c25913506 ld/testsuite/ld-cris/libdso-1d.d +9b34e20b935565486f8345974db5db02 ld/testsuite/ld-cris/libdso-2.d +aab518362b600fa763c58722941fa94e ld/testsuite/ld-cris/libdso-3.d +3c92543c2f334c154ac36ccf470b0ef1 ld/testsuite/ld-cris/libdso-4.d +592765f9d065627f0d3b5791347a54f0 ld/testsuite/ld-cris/locref1.d +390593b2a658117399e7dbea69f03f64 ld/testsuite/ld-cris/locref1.s +7814db4a10eb8a2c258605bdf2795e27 ld/testsuite/ld-cris/locref2.d +fc2217195f7483a3ca55f8e9c1b05ee0 ld/testsuite/ld-cris/locref2.s +689a0e95a0903b7673ee4db103ac323f ld/testsuite/ld-cris/move-1.s +bc987ce36b491f13c24922047c76a1a3 ld/testsuite/ld-cris/nodyn4.d +938de1a906afab6b795f7c4b709adc72 ld/testsuite/ld-cris/nodyn5.d +7713000ae79494a9864d233f100b51d8 ld/testsuite/ld-cris/noglob1.d +a4f4d34c69e2ee06e8e6cd8f6d564f9c ld/testsuite/ld-cris/noglob1.s +8aa847fbe970d2b7c0eb26e36c0cac6f ld/testsuite/ld-cris/noov.d +fb7be150fec11a8e315c5a9e92434af9 ld/testsuite/ld-cris/noov.s +b35b21ec86ab9f821fae71a3888db73b ld/testsuite/ld-cris/pcrelcp-1.d +f05b5e947853c848ce3b16ea72f89956 ld/testsuite/ld-cris/pcrelcp-1.s +60783e487d9ed3277baed67d9a3ff8a2 ld/testsuite/ld-cris/pic-gc-72.d +2e9ff32adf3155417cb25ee10251e6ec ld/testsuite/ld-cris/pic-gc-72.s +15f4451f37cab28561dc61aca124ee3b ld/testsuite/ld-cris/pic-gc-73.d +3096bcd8f2a8aac9637f270fcc05ea83 ld/testsuite/ld-cris/pic-gc-73.s +30b9687806ce0305c161bb5c7128bd48 ld/testsuite/ld-cris/pv32-1.d +151fbc0352fdf4668c9973dd14737265 ld/testsuite/ld-cris/pv32.s +e589a68be11f502a3cf9e1d56fc8bca2 ld/testsuite/ld-cris/stabs1.s +393141b1e937eeaf51caf8f49c50c3a8 ld/testsuite/ld-cris/start1.s +302d5ad7fcd24be5673cddacba2f5303 ld/testsuite/ld-cris/tls-commx.s +64cec56cb5f36b713d11787bae5d2a48 ld/testsuite/ld-cris/tls-dso-dtpoffd2.d +33be652cd4e71798bf35fc31a113a311 ld/testsuite/ld-cris/tls-dso-dtpoffd4.d +f500c9e0c1fc83ca25df07e515eca113 ld/testsuite/ld-cris/tls-dso-x1x2-1.d +dc6a7771a81b22e57b5cc2723dd73819 ld/testsuite/ld-cris/tls-dso-xz-1.d +d812a514a905d85452cb5d34e99c0b69 ld/testsuite/ld-cris/tls-dtpoffdx.s +3da8008017f62a902040791e3996d1e3 ld/testsuite/ld-cris/tls-dtprelm.s +da2557694d5684950af27d35ac4183a8 ld/testsuite/ld-cris/tls-e-20.d +6ff1dec1d7491654e5dde42cbca47d3d ld/testsuite/ld-cris/tls-e-20a.d +550a13c4e70ae123db6f471fbcb96ca1 ld/testsuite/ld-cris/tls-e-21.d +23f2ffdceafd751d6db07fda526ef9a4 ld/testsuite/ld-cris/tls-e-22.d +5699e4ea4ad88563da8ae26484bd289e ld/testsuite/ld-cris/tls-e-23.d +45680291556e5a4ba2313535a7d73029 ld/testsuite/ld-cris/tls-e-66.d +f8a9f502d5519161ef4d2ee8ab111e17 ld/testsuite/ld-cris/tls-e-80.d +20471f1fcc2d0ae22084287775c19148 ld/testsuite/ld-cris/tls-e-dtpoffd1.d +bfe76a492985c63a7ab23578af135953 ld/testsuite/ld-cris/tls-e-dtpoffd3.d +7d282e67cadfe47360fd57b5f93b84c4 ld/testsuite/ld-cris/tls-e-tpoffcomm1.d +50342aefaed14ebfd9238897c30e7168 ld/testsuite/ld-cris/tls-e-tpoffcomm1.s +d25fd14c85c538cf35c5ff8f326d580f ld/testsuite/ld-cris/tls-err-20x.d +fd84a9d934bc33bf2a0899abb35119ea ld/testsuite/ld-cris/tls-err-24.d +ac2f392c56e121a2992568a8ec5685b9 ld/testsuite/ld-cris/tls-err-25.d +249ae728a964f72799d794decaf0f97e ld/testsuite/ld-cris/tls-err-26.d +2000384372d793465e8407a01dede5f1 ld/testsuite/ld-cris/tls-err-27.d +e75648da1cb679edcd6097b483c69f38 ld/testsuite/ld-cris/tls-err-28.d +40aba2abf4871c67fe605c2e3f524f6b ld/testsuite/ld-cris/tls-err-29.d +0a6bdf8b30dc849717d88df3d2285ea5 ld/testsuite/ld-cris/tls-err-31.d +cc6455910643b8309875795ef56a889f ld/testsuite/ld-cris/tls-err-33.d +82a5120fd71f8d7f0e55082587f6ba46 ld/testsuite/ld-cris/tls-err-35.d +cb48040bea3a21299a82197556b490eb ld/testsuite/ld-cris/tls-err-37.d +a23c3ae051822709a0240ef9dd6e4bae ld/testsuite/ld-cris/tls-err-39.d +ea9218010773966f0e2e804756f2727e ld/testsuite/ld-cris/tls-err-40.d +8e04344e983d9443faa4f128ac989355 ld/testsuite/ld-cris/tls-err-41.d +8feda78e2647cc3ad4e72bc5401e251e ld/testsuite/ld-cris/tls-err-43.d +7669ac8d48e9a4647a9bd55efc25fa8e ld/testsuite/ld-cris/tls-err-44.d +7407258e4f28144cc60d17ca52b18568 ld/testsuite/ld-cris/tls-err-45.d +a900fae48f50140f33938acc5d2a8098 ld/testsuite/ld-cris/tls-err-47.d +7fb36c6ab26bc63467d44558268235b9 ld/testsuite/ld-cris/tls-err-48.d +a845720bddc125b9d3b668ef7d6e0662 ld/testsuite/ld-cris/tls-err-49.d +9925f0c8c091f67358d5df5ccaecc3a0 ld/testsuite/ld-cris/tls-err-51.d +efbc061f20d37c11c641f7b5a9f469bf ld/testsuite/ld-cris/tls-err-52.d +1ae5a636fd8f939babf5e4791a634ea0 ld/testsuite/ld-cris/tls-err-53.d +d1e2c235bd6da8173eca1754c937cfa8 ld/testsuite/ld-cris/tls-err-55.d +d94645c2ec7630ea559ffdfb83353bfb ld/testsuite/ld-cris/tls-err-55.s +6d9956249704da51d6f7bb503173e034 ld/testsuite/ld-cris/tls-err-56.d +e886bfad99234c127ce82d391daac54c ld/testsuite/ld-cris/tls-err-56.s +cd50a67b19a87416f40193b60c8c8825 ld/testsuite/ld-cris/tls-err-62.d +9cea49f0088bd8d2226d69c83c8172d4 ld/testsuite/ld-cris/tls-err-62.s +b9f4c772858366872f8725bab1f38a94 ld/testsuite/ld-cris/tls-err-65.d +df2f4c172fbf7f7cb669fe49f1ccceee ld/testsuite/ld-cris/tls-err-67.d +2b7b5d592cce606b75e3080ce6aef07c ld/testsuite/ld-cris/tls-err-77.d +20655696d21d18bef060b7bd00099498 ld/testsuite/ld-cris/tls-gc-68.d +80929f16eabf0d775b863ef38ba1b236 ld/testsuite/ld-cris/tls-gc-69.d +23457c141d1f55486946097916b66566 ld/testsuite/ld-cris/tls-gc-70.d +5dfc1223fc31c9204e1dfc27bbdb86e7 ld/testsuite/ld-cris/tls-gc-71.d +1d334e4fd0ce9bb55b12f88888b5a502 ld/testsuite/ld-cris/tls-gc-71.s +43a06d9019d1442de0ecbaa62c2eefa1 ld/testsuite/ld-cris/tls-gc-75.d +4d0e9b1919f2a65d32cf9f8fa23d4069 ld/testsuite/ld-cris/tls-gc-76.d +77931d8d14cb883d864cf6f6eeb28aeb ld/testsuite/ld-cris/tls-gc-76.s +9ffeef549454abf1fc505765aef024ef ld/testsuite/ld-cris/tls-gc-79.d +9dbcc4e2aa2a2bfadcc47e3aabb4821d ld/testsuite/ld-cris/tls-gd-1.d +a2271e5313c908cec57856570e5ce4ec ld/testsuite/ld-cris/tls-gd-1.s +bcc014751d82a34435b277d6d103e0d1 ld/testsuite/ld-cris/tls-gd-1h.d +013ab22b01c3a2e7addabc40ccfdd635 ld/testsuite/ld-cris/tls-gd-2.d +0928af50e393da67c7675370e241fd4b ld/testsuite/ld-cris/tls-gd-2.s +2f488f3319797e402be4a9e9d5770e17 ld/testsuite/ld-cris/tls-gd-2h.d +5aef151f40a450075aac047e3c9b2a25 ld/testsuite/ld-cris/tls-gd-3.d +858c4140c6d2cde73e0219c69448aafb ld/testsuite/ld-cris/tls-gd-3.s +82ba41c6703cd9b4800d512ac9c0b348 ld/testsuite/ld-cris/tls-gd-3h.d +cb0345dba3852c34c011ac9b6da4f6b2 ld/testsuite/ld-cris/tls-gdgotrelm.s +3db5f93b09db85fabad8b000e3748640 ld/testsuite/ld-cris/tls-global-74.d +6518ab26a2deb12bbb04f8289b9c24a4 ld/testsuite/ld-cris/tls-gottprelm.s +f2bf540024ba0fe56c607163131bc430 ld/testsuite/ld-cris/tls-hx.s +668cd5cd04546080138484945ce7cecf ld/testsuite/ld-cris/tls-hx1x2.s +adf684bb117f6d02cdb37445d5f7f232 ld/testsuite/ld-cris/tls-ie-10.d +e207125a60e56c2e4c8101e668efe438 ld/testsuite/ld-cris/tls-ie-10.s +e63067ed8857e6876262122ddc1d10cd ld/testsuite/ld-cris/tls-ie-11.d +ccc553a960af1b2e18aa479f63b11980 ld/testsuite/ld-cris/tls-ie-11.s +e4e75df63a89532bfde872582fd69378 ld/testsuite/ld-cris/tls-ie-78.d +db1276dec83b53fda274ef3fd7d6e91f ld/testsuite/ld-cris/tls-ie-8.d +ad0737dc62f589dcdcd74c47eee58e47 ld/testsuite/ld-cris/tls-ie-8.s +fc54d68c890df7735b5e1e8c4990fd0b ld/testsuite/ld-cris/tls-ie-8e.s +0583bc0aaf5bb2d6824ca8b08e83471d ld/testsuite/ld-cris/tls-ie-8e1.d +26540a7b797011e40c4be2e7e37a1b4b ld/testsuite/ld-cris/tls-ie-9.d +c25a5e09a76b70b58e92c63f7d752a29 ld/testsuite/ld-cris/tls-ie-9.s +f1a3d405e57145ffb9e5efa444f4d490 ld/testsuite/ld-cris/tls-js1.d +098d95ca99ad85464ddbbf22aac5245f ld/testsuite/ld-cris/tls-ld-4.d +6d1a352e54fc0c6b169cc21bb0772013 ld/testsuite/ld-cris/tls-ld-4.s +f0b3914545cae5bbad6b39b763369725 ld/testsuite/ld-cris/tls-ld-5.d +6bced6cf5e82a90f165749c584a55261 ld/testsuite/ld-cris/tls-ld-5.s +4320d87e90254c722a99c3c898b2cac1 ld/testsuite/ld-cris/tls-ld-6.d +7e58dc96f6a97a2274d7c716bf7c15e7 ld/testsuite/ld-cris/tls-ld-6.s +530cb9100fc390888b5b76d08480a5f0 ld/testsuite/ld-cris/tls-ld-7.d +894b89a4cffadd26d735eaa3366bd014 ld/testsuite/ld-cris/tls-ld-7.s +4f58d5b9672cebff975bed7a0c21dc8e ld/testsuite/ld-cris/tls-ldgd-14.d +679fc1b710b09d032741fd6731445578 ld/testsuite/ld-cris/tls-ldgd-14.s +96ce57b0500c9cbe580671d5cfe04dae ld/testsuite/ld-cris/tls-ldgd-15.d +9797d6ca1f85e6324277c45b4a58601d ld/testsuite/ld-cris/tls-ldgd-15.s +d973bab15935e4e25edced51c1f5a01f ld/testsuite/ld-cris/tls-ldgde-14.d +0cd1e25768b29a2a5747b0bb6cad0651 ld/testsuite/ld-cris/tls-ldgde-15.d +3fa67c64792bec501fb1db6e84bd34e1 ld/testsuite/ld-cris/tls-ldgdex-14.d +0e7a22ba54362bde08475773967bb6a6 ld/testsuite/ld-cris/tls-ldgdex-15.d +72f8b3d05ca40293b779dedb62650d95 ld/testsuite/ld-cris/tls-ldgdx-14.d +0c27b3f4594dc269931e211405d20e35 ld/testsuite/ld-cris/tls-ldgdx-15.d +d88ce0a5efe8a0b8cfe57e055411488c ld/testsuite/ld-cris/tls-le-12.d +4640724276d2f40c90d12dffdc45ddd9 ld/testsuite/ld-cris/tls-le-12.s +9972aa58ba49c913b16b5edde9b55dc0 ld/testsuite/ld-cris/tls-le-12s.d +c1560db52d7629b28cacb1185f5a2711 ld/testsuite/ld-cris/tls-le-12s.s +def01c8bde71ee583cba402a7a0508c9 ld/testsuite/ld-cris/tls-le-13.d +d2772b6bc8dc511b37e72de179c8b901 ld/testsuite/ld-cris/tls-le-13.s +1b1dece4a94a821d039c77258129116f ld/testsuite/ld-cris/tls-le-13s.d +b48f5cda2e4bc1a02b0c0ec83363bef6 ld/testsuite/ld-cris/tls-le-13s.s +cfd5ca14d3b9c67630913f6f556f6e01 ld/testsuite/ld-cris/tls-legd-16.d +924ef2d81181b9a2870dd90a113a9723 ld/testsuite/ld-cris/tls-legd-16.s +2691dca3d6824a6b26fd7722f8ee4740 ld/testsuite/ld-cris/tls-legd-17.d +1b1167930e705405da3c2773e86dede1 ld/testsuite/ld-cris/tls-legdx-16.d +7371c767359bead9ea2a9916193d8750 ld/testsuite/ld-cris/tls-legdx-17.d +79d00e807ecfa98de4d7fe40d03a6925 ld/testsuite/ld-cris/tls-leie-18.d +14265ec140d4a3e86f2ac5ff3c9d401e ld/testsuite/ld-cris/tls-leie-19.d +3b30fa40c56ef891e60237ed38036a76 ld/testsuite/ld-cris/tls-leie-19.s +74d9462640882b9e83c1056cc84edfa5 ld/testsuite/ld-cris/tls-local-54.d +0fb2c91adbdcb3206ae06870de126ede ld/testsuite/ld-cris/tls-local-54.s +27ccd8d59b26dff43911763c80597c65 ld/testsuite/ld-cris/tls-local-57.d +7357194b45b00da3f4a3368f07173709 ld/testsuite/ld-cris/tls-local-57.s +d5dd9368c65533e2ee958588cf4310e2 ld/testsuite/ld-cris/tls-local-58.d +fc4152ffcff2e383c0c9423036a9ebdd ld/testsuite/ld-cris/tls-local-58.s +578ae53d358085af655d374f1b423f7d ld/testsuite/ld-cris/tls-local-59.d +43fae325509d5bb8b3bde1f46d313005 ld/testsuite/ld-cris/tls-local-59.s +b1f59664795255cb3e72cdac9091703c ld/testsuite/ld-cris/tls-local-60.d +0d00ea75131fd21f76af0443680d851d ld/testsuite/ld-cris/tls-local-61.d +5377cb16b287b10ca274e216e76ee017 ld/testsuite/ld-cris/tls-local-63.d +e3c2d64ec9c60dfc5e1f4380c2e643ba ld/testsuite/ld-cris/tls-local-64.d +5fe92b73df12285d048b84b49011ef26 ld/testsuite/ld-cris/tls-ok-30.d +5266df748d476261b3f50375e9deb7f3 ld/testsuite/ld-cris/tls-ok-32.d +9d01f78de61c3ef6018352be477b0908 ld/testsuite/ld-cris/tls-ok-34.d +703573ed2b2da6077075e1337da0b36e ld/testsuite/ld-cris/tls-ok-36.d +a186fd4a36652812640d662133184bc2 ld/testsuite/ld-cris/tls-tbss64.s +f98cb18cd863da89209e9351870421da ld/testsuite/ld-cris/tls-tprelm.s +229a5d7ef3ce59d55cd458cdd9bc7382 ld/testsuite/ld-cris/tls-und-38.d +7f27376ee3b1492321f4129cc0e3b3c6 ld/testsuite/ld-cris/tls-und-42.d +a27afaec9ec9e1f38ca71a877ba2ab2a ld/testsuite/ld-cris/tls-und-46.d +87c6780c84b2dc48348b4f84c4fcdab5 ld/testsuite/ld-cris/tls-und-50.d +310058ccfc4424f5887c50144e3aff6e ld/testsuite/ld-cris/tls-x.s +b7b2951b01f82a9fa108819ab29d15bd ld/testsuite/ld-cris/tls-x1x2.s +20188daeeb47edbf2abda804d72c772d ld/testsuite/ld-cris/tls-z.s +e10d3dcc56b936d6f1b62a178b0b3222 ld/testsuite/ld-cris/tls128.s +9b5f4ba7330d0b65a374ce4ef37f5852 ld/testsuite/ld-cris/tls128g.s +0397aade193de820b7a3d2012e71655e ld/testsuite/ld-cris/undef1.d +c58ca745186c4bece924a88f288b02ec ld/testsuite/ld-cris/undef2.d +5fd3e1533841a223eaf9fbd36b233b79 ld/testsuite/ld-cris/undef3.d +2e48731f84bdc880610e6ca843b9d5b5 ld/testsuite/ld-cris/v10-v32.d +4f95b9c42d7d9f9fbc0b62acc6b5883b ld/testsuite/ld-cris/v10-va.d +af80ea10a64ea1db2e3e175cc54f4e9c ld/testsuite/ld-cris/v32-ba-1.d +6fe1978274028b15612b8c29e55094e1 ld/testsuite/ld-cris/v32-ba-1.s +aacc56a9cf2df86d1248ccc8017e9047 ld/testsuite/ld-cris/v32-bin-1.d +6e1f1a177b0ddee8ddefc3d445d9c7d8 ld/testsuite/ld-cris/v32-bin-1.s +4dd961002adb00a33b78ea6803442126 ld/testsuite/ld-cris/v32-v10.d +752f3b5be6be178266b8316a9a88a82d ld/testsuite/ld-cris/v32-va.d +ba34a95bf2c66e449608ee6617642633 ld/testsuite/ld-cris/va-v10.d +48af179aaf1af4fec96516a80cc9c6cf ld/testsuite/ld-cris/va-v32.d +b9288b16a367283e15a37e333fd97297 ld/testsuite/ld-cris/warn1.d +d45bec3bf85d2aaf4821b0ffdccc0d12 ld/testsuite/ld-cris/warn2.d +3a166d60129bbd19c207498e3844c09f ld/testsuite/ld-cris/warn3.d +5df413483daafe5459511b97199f9511 ld/testsuite/ld-cris/warn4.d +15419c07897ceba2e7f39ea0f173b12e ld/testsuite/ld-cris/weakhid.s +47a48ebba48a5cb8d360306f283a9de4 ld/testsuite/ld-cris/weakhiddso.d +0327bbd232bb585aea5c5461b9ffae26 ld/testsuite/ld-cris/weakref1.d +98dd707805424be642ace5cb35055b58 ld/testsuite/ld-cris/weakref2.d +c33fb1a1e0bd8782eadd7ee557666f5d ld/testsuite/ld-cris/weakref3.d +0d1059f8894c2b812e0bb921a5b8ffb0 ld/testsuite/ld-cris/weakref4.d +6886655aeb07410f4a344e7cf7c65447 ld/testsuite/ld-crx/crx.exp +158760ac80129c2252f3042fef109f0c ld/testsuite/ld-crx/crx.ld +e53f074773b19a4eccc59cb8a6a1d047 ld/testsuite/ld-crx/reloc-abs32.d +af866ead95f29dac5b4f5c611888f53d ld/testsuite/ld-crx/reloc-abs32.s +07ec95f0bb08e6c659d2057d79dcdeb6 ld/testsuite/ld-crx/reloc-imm16.d +0084b8ad872c12e2a7be00eb8f98e91d ld/testsuite/ld-crx/reloc-imm16.s +a5c9c0b54cad1488e914499c55278eb7 ld/testsuite/ld-crx/reloc-imm32.d +1922ef2f5dc94a1fa330ac39838d1344 ld/testsuite/ld-crx/reloc-imm32.s +94eba9a936aa6c422ad4e1145ae6ba30 ld/testsuite/ld-crx/reloc-num16.d +182190b715b027b5a6c1d540c2f30f5c ld/testsuite/ld-crx/reloc-num16.s +a3c38f5bef3c4f3393d89706ee257d8e ld/testsuite/ld-crx/reloc-num32.d +3b171daa66954b0e4275a2553b3f7dcb ld/testsuite/ld-crx/reloc-num32.s +06ecce975fa9296eefa5ae4808018565 ld/testsuite/ld-crx/reloc-num8.d +e0d78086742196af5f70b2913df4ab9a ld/testsuite/ld-crx/reloc-num8.s +09c4cacdf1025cc747cc0f35d7b64572 ld/testsuite/ld-crx/reloc-regrel12.d +e7856861e2f6965e4e5064f21c4174c5 ld/testsuite/ld-crx/reloc-regrel12.s +77b86ca3fc51bee6fd5b373482720500 ld/testsuite/ld-crx/reloc-regrel22.d +12321019a8582ea1cf50f6e3af92d803 ld/testsuite/ld-crx/reloc-regrel22.s +5f5e518bb54cbdbd53ec30c650984a73 ld/testsuite/ld-crx/reloc-regrel28.d +cb3159e28c00f922bb551d0ed9d3bde1 ld/testsuite/ld-crx/reloc-regrel28.s +44b40e9c2c37bb33120070a689253204 ld/testsuite/ld-crx/reloc-regrel32.d +6a88a24f0d02fbca35b2ce3298b7ac38 ld/testsuite/ld-crx/reloc-regrel32.s +01f6f4551c686de2fb0d397e8a4e6bf4 ld/testsuite/ld-crx/reloc-rel16.d +dbb4d600f3ba3c9f8dc5581043812869 ld/testsuite/ld-crx/reloc-rel16.s +8b8b1af61b3d471ef8bcb8df5bbf4494 ld/testsuite/ld-crx/reloc-rel24.d +70b11bcd4b6100b4b4f459fd6cf683da ld/testsuite/ld-crx/reloc-rel24.s +703d4e4e2ea36d634a0022cc44592335 ld/testsuite/ld-crx/reloc-rel32.d +84ef401fcde006c9458e73efe2bdc3fe ld/testsuite/ld-crx/reloc-rel32.s +0bb2340f51e8e31790c044611073539d ld/testsuite/ld-crx/reloc-rel4.d +0474e638123f267f7c77bf7e6859e94f ld/testsuite/ld-crx/reloc-rel4.s +952af075711bf5c0bd635ce9720648cb ld/testsuite/ld-crx/reloc-rel8-cmp.d +d9692a48c3da7fe1f9e0454e2eaa3269 ld/testsuite/ld-crx/reloc-rel8-cmp.s +2727f9d73da1e140e5d505f435359009 ld/testsuite/ld-crx/reloc-rel8.d +817521c14f843019d77ce0d52fd53b5d ld/testsuite/ld-crx/reloc-rel8.s +94efa5919eebf89b70f9a718d325c3bd ld/testsuite/ld-cygwin/exe-export.exp +af0825aade69062e48c52ae8282d8834 ld/testsuite/ld-cygwin/testdll.c +63d1aac1b038020ed973cfc29569732e ld/testsuite/ld-cygwin/testdll.def +db019a3fc1cb1f9f59a6edfb1f73e957 ld/testsuite/ld-cygwin/testexe.c +5f86698b1509034bc4f87f7d258217e9 ld/testsuite/ld-cygwin/testexe.def +996184474b07558d10f2d05d6a69b592 ld/testsuite/ld-d10v/d10v.exp +b4ead20b861eba109050533ef40db394 ld/testsuite/ld-d10v/default_layout.d +c59c68825ca903db1904078c8e77f033 ld/testsuite/ld-d10v/linktest-001.s +260cb1183491105181eded4c34963a9f ld/testsuite/ld-d10v/linktest-002.lt +7232ced2d73d4bac32cf583a3d9d7a5a ld/testsuite/ld-d10v/linktest-002.s +de046023db57d12594a89878e1caa893 ld/testsuite/ld-d10v/regression-001.lt +01ffcb3c21fda44963dfafbd75b79da2 ld/testsuite/ld-d10v/regression-001.s +4cdae0fb3d013dbd49153b555db35e74 ld/testsuite/ld-d10v/reloc-001.d +a9cbb2de1956f46bf23bdbf3a39fb6b2 ld/testsuite/ld-d10v/reloc-001.ld +96aac4fa15afbb40824d52d7f616aed1 ld/testsuite/ld-d10v/reloc-001.s +22382460f767a35f7e3ee3e29082eb14 ld/testsuite/ld-d10v/reloc-002.d +dcb59cfd3bc1ddd9661c33cec7111e62 ld/testsuite/ld-d10v/reloc-002.ld +0b5fffa79db80b241c0c58105932d9bb ld/testsuite/ld-d10v/reloc-003.d +3befa2048653d125ef17be9bcc94806b ld/testsuite/ld-d10v/reloc-003.ld +89b112cc2cd58ae58999a5a105c33f5b ld/testsuite/ld-d10v/reloc-004.d +bad4f70dce484b364577b7793db92505 ld/testsuite/ld-d10v/reloc-004.ld +065a76f098ef26e7b2fe5f84a56f4193 ld/testsuite/ld-d10v/reloc-005.d +5ff2e76a04204073ea7c50ee788a7034 ld/testsuite/ld-d10v/reloc-005.ld +823a84ae7b851b134c9b94ab71d6f21a ld/testsuite/ld-d10v/reloc-005.s +46dbf37acbdf0eadb8cc31ac2d3034f1 ld/testsuite/ld-d10v/reloc-006.d +52632233b997a5226faff15567653f35 ld/testsuite/ld-d10v/reloc-006.ld +e1b026019516bd1813ea6b33b3035ac8 ld/testsuite/ld-d10v/reloc-007.d +ae9e1f771120fc9bad087de039bd10ad ld/testsuite/ld-d10v/reloc-007.ld +aec120339e7ea93d7cba32b3be3c3899 ld/testsuite/ld-d10v/reloc-008.d +c36d03bdbe812d34d81baa1df645be0f ld/testsuite/ld-d10v/reloc-008.ld +4074889b9455b4f68f6e5fc23f265b32 ld/testsuite/ld-d10v/reloc-009.d +5357ca9e709865a49021a2ad944f735e ld/testsuite/ld-d10v/reloc-009.ld +778af85308c7cf5e618819f1089919bd ld/testsuite/ld-d10v/reloc-009.s +2a269a1b6b912fbc838d30338721c4ce ld/testsuite/ld-d10v/reloc-010.d +320d8cb2224a8c0d770c6c53fe56fa2a ld/testsuite/ld-d10v/reloc-010.ld +c0db32e1b6970df36a2e01fc22a687c8 ld/testsuite/ld-d10v/reloc-011.d +e4281f7304f32d7f2e355b4acdfa0f11 ld/testsuite/ld-d10v/reloc-011.ld +d41b0a45b441f5bf3249edf3b2ffba89 ld/testsuite/ld-d10v/reloc-012.d +36e865b7fd1320f476f20033b26aa23c ld/testsuite/ld-d10v/reloc-012.ld +d1e67034df65b21f46e22414411a58bc ld/testsuite/ld-d10v/reloc-013.d +88128837f15e0d761f24263bf4edf04a ld/testsuite/ld-d10v/reloc-013.ld +4f315c84a8e4f35a0440568f2663eb87 ld/testsuite/ld-d10v/reloc-014.d +f947210d3beb88287ce8b83f4ea0be06 ld/testsuite/ld-d10v/reloc-014.ld +8ddc5315682698be2ec3a1c97299feac ld/testsuite/ld-d10v/reloc-015.d +12e0f6ef50e603dd29670a80de467f0d ld/testsuite/ld-d10v/reloc-015.ld +a07c508b520b6b9d14acc43aee99e066 ld/testsuite/ld-d10v/reloc-016.d +24c58a8fa81d8b23eef3d2df94588713 ld/testsuite/ld-d10v/reloc-016.ld +643376f9cf25b4ffa2a621b4ac850ff5 ld/testsuite/ld-d10v/simple.s +d6e1861b929db9d7308a678c4f4f49a7 ld/testsuite/ld-discard/discard.exp +74f98f91da03fdfbe4b598fa78509f21 ld/testsuite/ld-discard/discard.ld +ad7a2ef376a2dbe50a1bbd332e0b351e ld/testsuite/ld-discard/exit.s +c45aefbefada85ceaa983f3a2b9f4096 ld/testsuite/ld-discard/extern.d +7db75ecbbac3202bb8ac52c4f75c4f4d ld/testsuite/ld-discard/extern.s +db8d2d2a6b691737c9f546b83a907438 ld/testsuite/ld-discard/start.d +859d4022d83abdfea3a6baa088067abd ld/testsuite/ld-discard/start.s +594c1c727bd7a02d324d651dcd0d85c9 ld/testsuite/ld-discard/static.d +f7164cd0e6027fe322ff8cc52dfaed98 ld/testsuite/ld-discard/static.s +289a67ba76925e77ad96a6353f218680 ld/testsuite/ld-discard/zero-range.d +b3aacae2cdc875e2ed0d13a699e8e27f ld/testsuite/ld-discard/zero-range.s +d5a71e32cf583a65c3a8dca272678c04 ld/testsuite/ld-discard/zero-rel.d +cdabdc56ea5e0ca66839a132e07d3f3f ld/testsuite/ld-discard/zero-rel.s +f76b8ca85a9264bd80251fa2d31f50ab ld/testsuite/ld-elf/audit.exp +d127dfb9d3bee4b01447fd7973244ac2 ld/testsuite/ld-elf/audit.rd +5201888d2abb62612325556e633e001d ld/testsuite/ld-elf/begin.c +500602556f86e18553ceb755366463be ld/testsuite/ld-elf/beginwarn.c +5049b9807b5a7785f2482e385d7b668f ld/testsuite/ld-elf/binutils.exp +b2ad7b75694dfd051322ff022289bf11 ld/testsuite/ld-elf/comm1.c +62a6c175439b573fa477ec9d02c926c0 ld/testsuite/ld-elf/commonpage1.d +e8c77fb65c093cf6d134a26be7ccca0b ld/testsuite/ld-elf/commonpage2.d +effe3963d5b9a8ea4327d030aad908a9 ld/testsuite/ld-elf/compress.exp +a01319306da910cb4d132877d84ae79a ld/testsuite/ld-elf/compress1.s +24e773742b2290d1dedd7d19dcdf0cf5 ld/testsuite/ld-elf/compress1a.d +dcf933a6a39b4cf2e648408d13399f21 ld/testsuite/ld-elf/compress1b.d +0eb33d24f26607d364dfce52b8f63f15 ld/testsuite/ld-elf/compress1c.d +deaa743c21343d50005ce2368a63da9f ld/testsuite/ld-elf/data1.c +a89103ea5407b5013209fbcbec167652 ld/testsuite/ld-elf/data1.h +92bc82dae4c7e3bcb8dc60d1fe19f914 ld/testsuite/ld-elf/del.cc +95839eb1016346ee2559c3e5333d0fe3 ld/testsuite/ld-elf/depaudit.rd +ee4280d9cc3ebd6a311813a827af1ab3 ld/testsuite/ld-elf/depaudit2.rd +2346a5689cb09476d36961aaacb75bf6 ld/testsuite/ld-elf/discard.ld +0aa8bc44a09aebea4521d19f6d677af3 ld/testsuite/ld-elf/discard1.d +7276479d5b8d77364a20783c42127ba1 ld/testsuite/ld-elf/discard1.s +5d9d3815f29613d5c4b4e3eec4b09d63 ld/testsuite/ld-elf/discard2.d +050c530dc76004b149d0774320823d11 ld/testsuite/ld-elf/discard2.s +241ee2db60ad7e0095c63dbcc15597cf ld/testsuite/ld-elf/discard3.d +3cc896db0a5c046306e8f59d6e338b61 ld/testsuite/ld-elf/dl1.c +a55c99379e6cc8b409bf78abfd503b06 ld/testsuite/ld-elf/dl1.list +d36f8f9425c4a8000ad9c4a97185aca5 ld/testsuite/ld-elf/dl1.out +533e1f48c93d2fb02d9bd9e13e6c7b0d ld/testsuite/ld-elf/dl1main.c +f8635969b890926291bedaf59dfa6339 ld/testsuite/ld-elf/dl2.c +3e3a30a7d2c4bc161dfbcabd0da3eddf ld/testsuite/ld-elf/dl2.list +1b6856433525ea3368fe34b038dac9e7 ld/testsuite/ld-elf/dl2a.list +1e62995e8f12105c3d0644164029a52a ld/testsuite/ld-elf/dl2a.out +acec79ecf3be622edb219306d94e8d9e ld/testsuite/ld-elf/dl2b.out +34ec9767ef0c38cceec85498ae831565 ld/testsuite/ld-elf/dl2main.c +d3ea46a01e213097cc0cdfe32b2e2b40 ld/testsuite/ld-elf/dl2xxx.c +92b988475bdc3be9578c6763845493a9 ld/testsuite/ld-elf/dl2xxx.list +ca356d17104d231717f47294765a3426 ld/testsuite/ld-elf/dl3.cc +01a200fcbd530ec075bce1c4ed6dfb62 ld/testsuite/ld-elf/dl3.list +d36f8f9425c4a8000ad9c4a97185aca5 ld/testsuite/ld-elf/dl3a.out +f27833e18c477308ac846ff6d845c9ff ld/testsuite/ld-elf/dl3b.out +7e432ad95bb69e76cd8603cdeab45021 ld/testsuite/ld-elf/dl3header.h +2b4c778842950d5668e79d84f7ff883e ld/testsuite/ld-elf/dl3main.cc +423147404239d19016eac8564a27dc64 ld/testsuite/ld-elf/dl4.c +fa0611727f18b1ff9fddbe7223e534ba ld/testsuite/ld-elf/dl4.list +094e83b0e8a3bac549e59194f55b5747 ld/testsuite/ld-elf/dl4a.out +cc0424b00e5ffac450f7ea94766f8f6b ld/testsuite/ld-elf/dl4b.out +aecc359e727f1b704b0c8ef5009f00c4 ld/testsuite/ld-elf/dl4main.c +e8f2fdaed4cd6335fcd46c96509c0002 ld/testsuite/ld-elf/dl4xxx.c +6a46a6e4b285e54db50cc2ca5034c64b ld/testsuite/ld-elf/dl4xxx.list +5086c214d0535229169bcfba11ea7354 ld/testsuite/ld-elf/dl5.cc +32c0be4fb7f3030bf9c74c0a836d4f2e ld/testsuite/ld-elf/dl5.out +a4eca8bb3aa1f7e3c370f372e05c734b ld/testsuite/ld-elf/dl6.c +3710cccd088c153f04dd7c488c39fd72 ld/testsuite/ld-elf/dl6a.out +9558d14ff0a86e0f246c0fcc5a42d572 ld/testsuite/ld-elf/dl6amain.c +1bcbfa290fbebc90d1ef73c5cb502c35 ld/testsuite/ld-elf/dl6b.out +bf078a4b794fc06301fe8be1d2f084c8 ld/testsuite/ld-elf/dl6bmain.c +453f7a0d46db3f224fe0727d1c676272 ld/testsuite/ld-elf/dl6cmain.c +70de1cbbabd01c363da28133752d0e2f ld/testsuite/ld-elf/dl6dmain.c +d7e6a283405222184227df7278927181 ld/testsuite/ld-elf/dummy.c +9cc77b49f8fb5963d7f789a4d47d0127 ld/testsuite/ld-elf/dwarf.exp +b7e6c2837b679948cb3f9c13b128ca7b ld/testsuite/ld-elf/dwarf1.c +e5c2a68d935b5a0f16a8862d9f8b1710 ld/testsuite/ld-elf/dwarf1.h +d36f8f9425c4a8000ad9c4a97185aca5 ld/testsuite/ld-elf/dwarf1.out +4453124c8ea473d5979542ecf254fc4c ld/testsuite/ld-elf/dwarf1main.c +7fde0888ca02f48d9564fb66438db1cb ld/testsuite/ld-elf/dynamic1.d +9527e1fa3e8f91ecd8d5763cf1b783bb ld/testsuite/ld-elf/dynamic1.ld +f13be5703a6443b8b437e8b19da77d90 ld/testsuite/ld-elf/dynamic1.s +7cb82de908ccd7e34102a6f59bf6cf85 ld/testsuite/ld-elf/dynbss1.c +b206cae2bd509b452dfa45efa2588c9a ld/testsuite/ld-elf/dynsym1.d +ff532fbbc995fb84bfa5f75487292d64 ld/testsuite/ld-elf/eh-frame-hdr.d +1a78e931c5f561f9da30149889d4475d ld/testsuite/ld-elf/eh-frame-hdr.s +103ebd89774fd14b8d18184ecc16759a ld/testsuite/ld-elf/eh-group.exp +164c878d499cc8bbd09205f9d97e1201 ld/testsuite/ld-elf/eh-group1.s +aaf2beebc700bda44248ece6cf722c87 ld/testsuite/ld-elf/eh-group2.s +1cf82d74f5ee2530c06088223323c16f ld/testsuite/ld-elf/eh1.d +b5fd9f6ef9840069748fe7913c2cc775 ld/testsuite/ld-elf/eh1.s +febb082ba0de2ef03a9e8320a6ff1651 ld/testsuite/ld-elf/eh1a.s +8bb11f090c5268476f25fc5e46098cdd ld/testsuite/ld-elf/eh2.d +bc78ade1174bc87302d5ae6f3c9b04a4 ld/testsuite/ld-elf/eh2a.s +ca3c2dc459e167d6c6a6714a0891589c ld/testsuite/ld-elf/eh3.d +601c783a8ec20e9f09a919e68b46827c ld/testsuite/ld-elf/eh3.s +f7edc6e0e0f66ffc923349b2a8c8a074 ld/testsuite/ld-elf/eh3a.s +fcd105eeb574c28c886f5816b409c084 ld/testsuite/ld-elf/eh4.d +f67e8b62d5d54fa2dc0b56021cd809d7 ld/testsuite/ld-elf/eh4.s +f7edc6e0e0f66ffc923349b2a8c8a074 ld/testsuite/ld-elf/eh4a.s +47cd5ff6c10d2faff913171db99bff3e ld/testsuite/ld-elf/eh5.d +5b52059e5372224dfa7a7f020b6e1f12 ld/testsuite/ld-elf/eh5.s +4487cbe51165a079690c15647948b499 ld/testsuite/ld-elf/eh5a.s +097b4882179741247a872e38c2d84818 ld/testsuite/ld-elf/eh5b.s +a106c5d2246e737fba1638c6b9c601f9 ld/testsuite/ld-elf/eh6.d +302f5f1ee4503ca80d2eaa839c11e690 ld/testsuite/ld-elf/eh6.s +628cd6f3a9e8d1319d2761b536f0cb1c ld/testsuite/ld-elf/elf.exp +26b29b567247fd1f09aac7f76458d0ce ld/testsuite/ld-elf/empty.d +9882073b563bb0a8e90d2902ebe358d7 ld/testsuite/ld-elf/empty.s +bb2c54879ba74bae7e28696fb6c69d46 ld/testsuite/ld-elf/empty2.d +ee46964160f0308864b3c9f673805ae4 ld/testsuite/ld-elf/empty2.s +76a20654ee65488dea99f04f2245411f ld/testsuite/ld-elf/end.c +09ad7a4b25e4d3a09e491665034b9e42 ld/testsuite/ld-elf/endhidden.c +cd3620335344d83a9021beb69e1c5148 ld/testsuite/ld-elf/endprotected.c +aed2239d5850bff270478a0044dc16d3 ld/testsuite/ld-elf/exclude.exp +1cd4e62a9fc5452a45960a19f3e1f006 ld/testsuite/ld-elf/exclude1.s +8226b1db9eb7e3f6257547fba8c4f6a2 ld/testsuite/ld-elf/exclude2.s +4a5e353c23801ad5d7f1705efc5f42ed ld/testsuite/ld-elf/exclude3.s +d46cb8ede74aa1da2a09041b9c352c80 ld/testsuite/ld-elf/exclude3a.d +87bad70ffa3162708a50da90ce75dc44 ld/testsuite/ld-elf/exclude3b.d +1222a0ac943a41a7c63e3196a4f5b6f0 ld/testsuite/ld-elf/exclude3c.d +f6895fc216226ff34a085e826903203b ld/testsuite/ld-elf/exclude3d.d +11a332bd6a41c9a9a278fbd0467e6d2c ld/testsuite/ld-elf/expr1.d +12f308c92a57632db3ba119e9a8746a5 ld/testsuite/ld-elf/expr1.s +5444084211e53b093674d4082c0d2707 ld/testsuite/ld-elf/expr1.t +ee6a88046a68a434d178bc8cf8a19a1e ld/testsuite/ld-elf/extract-symbol-1.ld +363de60328a3b2317105dc82c255a74c ld/testsuite/ld-elf/extract-symbol-1.s +12275c75e6d7ffb03b76c871d2627b90 ld/testsuite/ld-elf/extract-symbol-1sec.d +97b10ffd2ce490b280ca09b4f9e97f0b ld/testsuite/ld-elf/extract-symbol-1sym.d +b9312be0ac0540e1bed7c423d7e86b7e ld/testsuite/ld-elf/fini.c +6c870ef46ccd9128eef86ca8e23210f2 ld/testsuite/ld-elf/fini.out +21b885380fd780b267b3b9b55e39189b ld/testsuite/ld-elf/flags1.d +6d00ee0db5f5c13af13b690b2c33d642 ld/testsuite/ld-elf/flags1.ld +7ac5a670ed46639acca959e753f7bb73 ld/testsuite/ld-elf/flags1.s +e23b8d902b46d50011563346bcdef9cd ld/testsuite/ld-elf/foo.c +b6c669a20974ba5592c2d3d61ca7139f ld/testsuite/ld-elf/foo.map +f4a6c767448cc547d98cde1846c53b8d ld/testsuite/ld-elf/frame.exp +849fea883bafed1cbcbaebbe323e7783 ld/testsuite/ld-elf/frame.s +f5eb79eb13454634e50e29bfcf9127c8 ld/testsuite/ld-elf/func1.c +c7759dae9e015b9ae60e349a19e57b8c ld/testsuite/ld-elf/group.ld +0a972894292670bfc69c455a635cf111 ld/testsuite/ld-elf/group1.d +d55510177d6c0bc3366c5a7a9f5b2bbf ld/testsuite/ld-elf/group10.d +ee3a05cb416c169218e9a5a0cbdf2e93 ld/testsuite/ld-elf/group10.s +1ec9a1e59acd27511474e69e4055d7e0 ld/testsuite/ld-elf/group1a.s +d9f1334c22ad7c92426c95b7aa8a3049 ld/testsuite/ld-elf/group1b.s +9d7adfffe33ba6445be5804bb5915cc4 ld/testsuite/ld-elf/group2.d +e8f102e04a371d81bde7078c089fae5f ld/testsuite/ld-elf/group3a.d +1de0968c385d41dca2452b5833f6a681 ld/testsuite/ld-elf/group3a.s +d7c54a9b5cc48ca845828718fc515fd8 ld/testsuite/ld-elf/group3b.d +57519cc08ef99dc4ef115ccc182382f0 ld/testsuite/ld-elf/group3b.s +51760003b97fbb46fad9a7616ce4710d ld/testsuite/ld-elf/group4.d +d9c70323dfd104f347d45b6ed4352925 ld/testsuite/ld-elf/group5.d +23c9e928e2f6ef30893e1473f2084654 ld/testsuite/ld-elf/group6.d +b8ffc5b4d4f9a053dea025d80a0226c3 ld/testsuite/ld-elf/group7.d +558795e9087cb1bbd0ec5e825d26cc71 ld/testsuite/ld-elf/group8.s +1a8c19fe7dbb384c45d35f9741745cb1 ld/testsuite/ld-elf/group8a.d +df228f039cdaf757741fb9912b9d7b70 ld/testsuite/ld-elf/group8b.d +48c8a06528948d58b5e80f4694c29fe1 ld/testsuite/ld-elf/group9.s +b479c3d799754a4afdd1707fa3277f5e ld/testsuite/ld-elf/group9a.d +88e0d80b525c08fbd1678f70e02e6f67 ld/testsuite/ld-elf/group9b.d +d541c1b0473dadc5fe3632cae0051b7a ld/testsuite/ld-elf/hash.d +b7e0a7a1b2d167a4459dcb79f6390efb ld/testsuite/ld-elf/header.d +d20a232b867adf1bef08b4ce03cf1430 ld/testsuite/ld-elf/header.s +9982da84d54af70ca2e81e3979251435 ld/testsuite/ld-elf/header.t +89178798ccc30d52ff0924e01b5571bd ld/testsuite/ld-elf/hidden.out +366c57f43172b2e431b341fbadf9892b ld/testsuite/ld-elf/init-fini-arrays.d +39a2d240cb93d759b09a1dcf1f11d270 ld/testsuite/ld-elf/init-fini-arrays.s +c014b107d3fe11b47a8b6033b9f97cfe ld/testsuite/ld-elf/init-mixed.c +d36f8f9425c4a8000ad9c4a97185aca5 ld/testsuite/ld-elf/init-mixed.out +95bcdb1f797589520105dd68e9af0c58 ld/testsuite/ld-elf/init.c +f2e75103bd836ab4be11fd869823de13 ld/testsuite/ld-elf/init.out +d2d2837a4a4461ffab6f30eaebe973d9 ld/testsuite/ld-elf/linkonce1.d +5fe9a69bec87726ba46817b8f1ee2b75 ld/testsuite/ld-elf/linkonce1a.s +ebb33a94c7a5b164956799b79385ca91 ld/testsuite/ld-elf/linkonce1b.s +d93b0136e812b175d99e9de8d2d0f2db ld/testsuite/ld-elf/linkonce2.d +74cfe401f62645cd60e07cf0480e9267 ld/testsuite/ld-elf/linkoncerdiff.d +fe5bf27901db70ca55ed14c19833aa69 ld/testsuite/ld-elf/linkoncerdiff1.s +f91dea4c322a581acfb738c6c194bef4 ld/testsuite/ld-elf/linkoncerdiff2.s +5888bd99973e3054a85bc8270d625989 ld/testsuite/ld-elf/lma.lnk +40dadc4124e56bdb402d4fd07200b825 ld/testsuite/ld-elf/lma.s +afe8fcb284e3648437d0ab70fa59fcc3 ld/testsuite/ld-elf/loadaddr.s +50559945e0e551693b7fc52a088bad25 ld/testsuite/ld-elf/loadaddr.t +a4c87a4c61451a9fbadb42642ced68b5 ld/testsuite/ld-elf/loadaddr1.d +40b0e64bed68782eeafc8dc4c92789f5 ld/testsuite/ld-elf/loadaddr1.t +bd0d2a4f71e65e78f4011cb2dee33d75 ld/testsuite/ld-elf/loadaddr2.d +6209e66373cc8cd7c4f45d2bd747037f ld/testsuite/ld-elf/loadaddr2.t +97b5e122b2d1ad02ea731a7a0f1ba0f1 ld/testsuite/ld-elf/loadaddr3.t +422cf93ab84a15f4fed963a32957e4ab ld/testsuite/ld-elf/loadaddr3a.d +653cbbbc2a1d3baa3a0c7be0706645e5 ld/testsuite/ld-elf/loadaddr3b.d +aeaf80a937a99f8af20a6a70cf83f86d ld/testsuite/ld-elf/local1.d +6af340a84430524a5da1d524826433e6 ld/testsuite/ld-elf/local1.map +d1d4e30dbf8ca0ca0ae2856357fd2a25 ld/testsuite/ld-elf/local1.s +32c581c1cb0e39759bf16610383605ec ld/testsuite/ld-elf/main.c +25b8360b78c9d21fc1365a3bf9a56008 ld/testsuite/ld-elf/maxpage1.d +8e4fb0c70c9656f2c5a45b27727c46ca ld/testsuite/ld-elf/maxpage1.s +95c6bf0eb1c1167c17739beb16812bde ld/testsuite/ld-elf/maxpage2.d +f6c21b3d32c6aad6eba30f7e1f1b72a2 ld/testsuite/ld-elf/maxpage3.t +ddfae0f52a1467975b1d3af6131b6268 ld/testsuite/ld-elf/maxpage3a.d +e6697a3f5c6e26d60fb02ae070b455c2 ld/testsuite/ld-elf/maxpage3b.d +a549e03f399fa2b8f48f28b0c7d30dbf ld/testsuite/ld-elf/maxpage3c.d +27b3b015586e17eb3be7d5aef05d908d ld/testsuite/ld-elf/maxpage4.d +e472066dbdc81546104875b2c59d5d17 ld/testsuite/ld-elf/maxpage4.t +5a98fc137e3f3e38b4dd537407a8ca93 ld/testsuite/ld-elf/merge.d +3adca40a51e300bbf27293c07b0b899b ld/testsuite/ld-elf/merge.ld +4595be81b4985c3114128c2c50497ed7 ld/testsuite/ld-elf/merge.s +c8f0bcccda3a4893d6ecf1e3acd7dfdd ld/testsuite/ld-elf/merge2.d +82b53a1be4af0e7b9932bc4bac4a1f5b ld/testsuite/ld-elf/merge2.s +dab8d983f764005be0d56e5e71c6d74b ld/testsuite/ld-elf/multibss1.d +95739864db0e20752f2a8621045e2770 ld/testsuite/ld-elf/multibss1.s +87b1cd84b94813d3f879e4bb66307a93 ld/testsuite/ld-elf/new.cc +737e07c9b710b026cd01c38105c450b2 ld/testsuite/ld-elf/nobits-1.d +1448d0c396a7540c385a6c24427dc8a8 ld/testsuite/ld-elf/nobits-1.s +e933fe9c4ee897ce8767297ecd0f2676 ld/testsuite/ld-elf/nobits-1.t +530a4ea166a9a853590f63c768d79a5f ld/testsuite/ld-elf/noload-1.d +3171f16ade59868ff70aab3502f42649 ld/testsuite/ld-elf/noload-1.s +68efb3156c20aeb9a95bcc40d679299f ld/testsuite/ld-elf/noload-1.t +a7cdc4a0d7968b7b51299f35b4421fdd ld/testsuite/ld-elf/noload-2.d +03e9267b196ec4b40bcc056e48f97851 ld/testsuite/ld-elf/noload-3.d +cde0fc55cbb25aa66ccde74b87aa1a3a ld/testsuite/ld-elf/noload-3.s +29cfe39333ea541949c52fa3568a7195 ld/testsuite/ld-elf/noload-3.t +401fcac11c36214cce1f28d56bbf5fe8 ld/testsuite/ld-elf/normal.out +a6dcf60520567b2d37489b9b13e0b287 ld/testsuite/ld-elf/note-1.d +629568b7f4d00dcae1c48feb55a7efd5 ld/testsuite/ld-elf/note-1.s +399dc17ec028793197a0e19a2dabda3c ld/testsuite/ld-elf/note-1.t +1ac47c89082509561450496d0e4dcf36 ld/testsuite/ld-elf/note-2.d +40682549e4c351b892bdb471e60b6a3c ld/testsuite/ld-elf/note-2.s +5b3a8506065e6ef3b6b0098889c249b4 ld/testsuite/ld-elf/note-2.t +c5006d0ccbb0c2aee724238c81fd084e ld/testsuite/ld-elf/note-3.l +cc1ff6f126e817e915075e36dd88d7c0 ld/testsuite/ld-elf/note-3.s +76fa31ee0dd00d4807f0ae9347046f23 ld/testsuite/ld-elf/note-3.t +2b9125b2b5c18f81dedfacfeda5e58e5 ld/testsuite/ld-elf/orphan-region.d +63fc2bb84bbec40616f2976aec073894 ld/testsuite/ld-elf/orphan-region.ld +7edf13f9914b682c83f9d0cfa6ef7430 ld/testsuite/ld-elf/orphan-region.s +24a338e873b210f2f1726c828a0ab1fd ld/testsuite/ld-elf/orphan.d +d53032637c8ece91ff80d8c48b8d39c1 ld/testsuite/ld-elf/orphan.ld +e10c2d6fb7b1862d72e784b3d68cad31 ld/testsuite/ld-elf/orphan.s +65b282379c61547c696f167a12ca56e5 ld/testsuite/ld-elf/orphan2.d +e7a16e18e2efc9cfdbbe32abaab5edca ld/testsuite/ld-elf/orphan2.s +57569c6d1b06b57547c826a7facc2894 ld/testsuite/ld-elf/orphan3.d +6154f0eca898629c83b18499fab900c5 ld/testsuite/ld-elf/orphan3a.s +84b13c2a26dd0d005bde1604e5b2d19a ld/testsuite/ld-elf/orphan3b.s +1e655a7d980456f14cf24ce85540cb81 ld/testsuite/ld-elf/orphan3c.s +9a466c84001ebb48e1aaa0a73ae388f4 ld/testsuite/ld-elf/orphan3d.s +0027c0b1504bc8b51d1caeebd687dd8c ld/testsuite/ld-elf/orphan3e.s +d93b5a03df564c13648d5c4dc1104ba2 ld/testsuite/ld-elf/orphan3f.s +3b2265dab8325ee291177829d4f62bf0 ld/testsuite/ld-elf/orphan4.d +24f21dc4791f0eec749a165fbff9bb24 ld/testsuite/ld-elf/orphan4.ld +299c87c84cff73c8fd133b27164d9ea1 ld/testsuite/ld-elf/orphan4.s +8485c54fabb0e82155e1ee7a3c2ef43d ld/testsuite/ld-elf/overlay.d +d4820191dbce8256c3f1f80984b67160 ld/testsuite/ld-elf/overlay.s +2d997de1ae57807bbab493d208ca44ac ld/testsuite/ld-elf/overlay.t +32c0be4fb7f3030bf9c74c0a836d4f2e ld/testsuite/ld-elf/pass.out +93810c21d02634b47e6b0d68d8e2fbc6 ld/testsuite/ld-elf/pr11138-1.c +2945ea31a0113cc212d6f38d344705a7 ld/testsuite/ld-elf/pr11138-1.map +6d2633d6710838d2e3ea63c0b0ecec47 ld/testsuite/ld-elf/pr11138-2.c +8d55e3e0f15eb6dd48dfa18a00f9efd4 ld/testsuite/ld-elf/pr11138-2.map +b5a8b50ff530cdd3d3d9967312e02ab9 ld/testsuite/ld-elf/pr11138.out +066dc12b5611d379e3f138ca0c0304a3 ld/testsuite/ld-elf/pr11304.d +59a4b624ca0384784b4c88c5cbcbeaed ld/testsuite/ld-elf/pr11304a.s +59a4b624ca0384784b4c88c5cbcbeaed ld/testsuite/ld-elf/pr11304b.s +c83ddb75c46a371e1185f84f36d8dc97 ld/testsuite/ld-elf/pr12851.d +a0e306b2e7e71bfcd446864ba0f72536 ld/testsuite/ld-elf/pr12851.s +a2ea691d0ea70e481e7eee9079490d58 ld/testsuite/ld-elf/pr12975.d +f1b24564683b83c422576e0762aaebcc ld/testsuite/ld-elf/pr12975.s +db23ab87a9e5dd863e49d869df40bb2d ld/testsuite/ld-elf/pr12975.t +8a1b43bb1b98d47569c87c7daeccf062 ld/testsuite/ld-elf/pr13195.c +32cce9b7862b5c4d5f52e2256f1bc58b ld/testsuite/ld-elf/pr13195.d +54cac995f6b307c9e6627262b3c5b979 ld/testsuite/ld-elf/pr13195.s +bf1422584b0f4807d623c533360a3ae8 ld/testsuite/ld-elf/pr13195.t +dfd511b4a96937c4de97a99a639288a4 ld/testsuite/ld-elf/pr13250-1.c +8bfedd08090446f98f5d9ed8fd45a49e ld/testsuite/ld-elf/pr13250-2.c +cfb926b6ab195c2cc31097e3cab41c87 ld/testsuite/ld-elf/pr13250-3.c +9eaa52574b09fc06a3a9133e8ab494af ld/testsuite/ld-elf/pr349-1.s +603b78df700993f74de4efe8300dea2c ld/testsuite/ld-elf/pr349-2.s +815000c1d4742e802b83a8da90950409 ld/testsuite/ld-elf/pr349.d +bd6e47747c9d2c55f67637c0cb446316 ld/testsuite/ld-elf/pr9676-1.c +3cfd62244d92db0a1323beb5487ad025 ld/testsuite/ld-elf/pr9676-2.c +f7a17bf2af3c100c51c7cc8bdba25530 ld/testsuite/ld-elf/pr9676-3.c +779db82e3b226d53a48c1530a626c4eb ld/testsuite/ld-elf/pr9676-4.c +d5e659c345d1806a8333d24938bc677b ld/testsuite/ld-elf/pr9676.rd +4d9088ef903809d06d118353352bb3f3 ld/testsuite/ld-elf/pr9679-1.c +01403fc34f8a10bf3c815d5d76fa6b38 ld/testsuite/ld-elf/pr9679-2.c +d5e659c345d1806a8333d24938bc677b ld/testsuite/ld-elf/pr9679.rd +9e0d2e1541e26e362a40a3d869af16d9 ld/testsuite/ld-elf/preinit.c +2f7e06fc320d375e4bef8dad7a69e6e8 ld/testsuite/ld-elf/preinit.out +39629aca7739c945da31396959581688 ld/testsuite/ld-elf/relocatable.d +3dfb6f0bb7b61490710f87231b84a61a ld/testsuite/ld-elf/relocatable.t +c4aa34f3eee6d09ecaa75450e25d2f78 ld/testsuite/ld-elf/relro1.s +4e4b53efdd5a66a8f66f78fd45cddaed ld/testsuite/ld-elf/relro2.s +7e91a461691ba9fd341b5767b14e2b22 ld/testsuite/ld-elf/sec-to-seg-script-adjoining-pages.t +c1ac88f05a284d2ee7032528375ea0c0 ld/testsuite/ld-elf/sec-to-seg-script-disjoint-pages.t +0a5529647d14f9b30d5bdfb3f622e3a2 ld/testsuite/ld-elf/sec-to-seg-script-same-page.t +bddbe3cf3633af8f745bc173c9266f58 ld/testsuite/ld-elf/sec-to-seg.exp +4feab35f04a5962d0f6f6642609234b3 ld/testsuite/ld-elf/sec-to-seg1.s +484ab9249c42669aae8eaa5ce0073831 ld/testsuite/ld-elf/sec-to-seg2.s +1d68645c6f5875e03f98bcf79bef64c0 ld/testsuite/ld-elf/sec64k.exp +2172991a0be7bbcc919dd018cb3e1984 ld/testsuite/ld-elf/seg.d +366d0c0a5413780d911830f52009bd84 ld/testsuite/ld-elf/seg.s +33df9bb4b3d304089bbc3721861a181b ld/testsuite/ld-elf/seg.t +d58dc176d4f19648ce82e752c715ec3f ld/testsuite/ld-elf/shared.exp +6f4d84a169cac8e0dd19b4b396d69de4 ld/testsuite/ld-elf/simple.s +bca204cb5e2f9dfd81723b0cf322fa76 ld/testsuite/ld-elf/stab.d +3767ef0dfe3d8e6020018b6b438224be ld/testsuite/ld-elf/start.s +f968d87a813716b366294f2338d3efb6 ld/testsuite/ld-elf/symbol1ref.s +118d8abd984db821efeff9e387685685 ld/testsuite/ld-elf/symbol1w.s +feb641ceead5630278338f34271c3f70 ld/testsuite/ld-elf/symbol2ref.s +12ae3af7465ed5e608619f85e3bb1511 ld/testsuite/ld-elf/symbol2w.s +bf10f94f4c2a0f312297f582b20fd617 ld/testsuite/ld-elf/symbol3.s +348983f305353d8771aa5757ebc71baf ld/testsuite/ld-elf/symbol3w.s +3726d33be7e71970731526d25c45b15b ld/testsuite/ld-elf/table.s +2e5f0a039d8fe3b31bcbb1d924874abd ld/testsuite/ld-elf/tbss.s +1814ada7f088af77312ac0b0da7df970 ld/testsuite/ld-elf/tbss1.s +eb37b66eb5d253b3c2e97b3eea174ecd ld/testsuite/ld-elf/tbss2.s +905e900305dc6bc49814c3d1f538ec90 ld/testsuite/ld-elf/tbss3.s +a71ab05c910f1f346324725f36681373 ld/testsuite/ld-elf/tdata1.s +1090d6567927a64cfb2f53974769536a ld/testsuite/ld-elf/tdata2.s +e9da8cae86b12f3c9ffc28179dbebf76 ld/testsuite/ld-elf/tdata3.s +e8cbccbf4eaaeadb30a740ca3a93d1af ld/testsuite/ld-elf/textaddr1.d +81744aa1bb9f760ee8b5389a3149e744 ld/testsuite/ld-elf/textaddr2.d +6a9cb314edd45ee5b4ae406daae14c22 ld/testsuite/ld-elf/textaddr3.d +b61f2f154a3214936b06381ca0c1b987 ld/testsuite/ld-elf/textaddr4.d +171deb77778587c381207a1fdf5eeca2 ld/testsuite/ld-elf/textaddr5.d +912a76ba6752015a5860a43f7308049d ld/testsuite/ld-elf/textaddr6.d +c5c1369478ecb9fdcd459a621d15c5af ld/testsuite/ld-elf/textaddr7.d +231d80716b4f61bff66d55a981ee3ae3 ld/testsuite/ld-elf/tls_common.exp +acfdcd6f073b4107aaf9525474caad57 ld/testsuite/ld-elf/tls_common.s +08635fd0f8e8bfe1f48dfe1dcb64b8de ld/testsuite/ld-elf/tls_gc.s +22d8dd6f061259f9e320ed5854e01cf5 ld/testsuite/ld-elf/unknown.d +09ddd4fa5b27a4db72b0736b1ece2f51 ld/testsuite/ld-elf/unknown2.d +5006410a4ea18cc1dde77669583c65c9 ld/testsuite/ld-elf/unknown2.s +adda635e6bdb4ef98fa0edbeb39fe7f6 ld/testsuite/ld-elf/warn.out +77cc2c6e2782ff44b42d0ecfeff62515 ld/testsuite/ld-elf/warn1.d +5966c2b7435a8b360b573ccbf546b81f ld/testsuite/ld-elf/warn2.d +ede420b2b8f9080185eef75d653326fc ld/testsuite/ld-elf/warn3.d +f36aba062ff28f6008dc3639314814f5 ld/testsuite/ld-elf/weak-dyn-1.ld +50dca04d1d979e25a207fb8b53cc5151 ld/testsuite/ld-elf/weak-dyn-1.rd +5c7ae357b88eb28f90e2d856ed0714a0 ld/testsuite/ld-elf/weak-dyn-1a.s +f77d9b90ac5ac50068dcf529303593e1 ld/testsuite/ld-elf/weak-dyn-1b.s +24e3ead9346194e7d47603837170d315 ld/testsuite/ld-elf/wrap.exp +a3f498bb3a5ca268b09eba5569b0f1ee ld/testsuite/ld-elf/wrap1.c +b93d3de03fbdd2161586328bec0b9432 ld/testsuite/ld-elf/wrap1.out +3bc7f7c7c0704dbeba179115cf844dcc ld/testsuite/ld-elf/wrap1a.c +f1d243e2bd35acde0bfbdfcd126a2635 ld/testsuite/ld-elf/wrap1b.c +4fd4394e0fffbea332fd110afa670884 ld/testsuite/ld-elfcomm/common1a.c +1ded50eb4cc3807ba226bca7ed76082c ld/testsuite/ld-elfcomm/common1b.c +0020d419b9a31d00ed6998fb7fb4b885 ld/testsuite/ld-elfcomm/elfcomm.exp +8eb6a8cf48d79df5287e9493d40cf94d ld/testsuite/ld-elfcomm/sort-common.s +011baf0e22ddb7097cb9f386b4bd2082 ld/testsuite/ld-elfvers/vers.exp +4270927e9c2f6165646a82d996632ab2 ld/testsuite/ld-elfvers/vers.h +d58a9a73fbbd753a66bbcca36dfc8cf4 ld/testsuite/ld-elfvers/vers1.c +3671b7ddb61a0544b750dbb786402454 ld/testsuite/ld-elfvers/vers1.dsym +e313fc6c0ab900457222aee483b85e3e ld/testsuite/ld-elfvers/vers1.map +f5eb2d61f488f5c5d5a4867498b488db ld/testsuite/ld-elfvers/vers1.sym +3adb6c27dcdea2d455db59cb811ccf1b ld/testsuite/ld-elfvers/vers1.ver +ca85484e74a669868fc7e52fe11d7fb4 ld/testsuite/ld-elfvers/vers13.asym +7457753bd762dab50560ce3773e3d987 ld/testsuite/ld-elfvers/vers15.c +82a2ab777efc2bae6e2170f8a62f02d1 ld/testsuite/ld-elfvers/vers15.dsym +543e6abbef56d4d71820bf2d7f7ff433 ld/testsuite/ld-elfvers/vers15.sym +f13a39514754b4838f1309e21b00fe48 ld/testsuite/ld-elfvers/vers15.ver +d71d95fe36a6bc2f88c952ac37cb990a ld/testsuite/ld-elfvers/vers16.c +20063b9a96b0498c3363934929a47134 ld/testsuite/ld-elfvers/vers16.dsym +d057681641b9fc14e87f35c677b6243d ld/testsuite/ld-elfvers/vers16.map +92e6d0ae0c0aef2c17de9ef04d6bf7f2 ld/testsuite/ld-elfvers/vers16a.c +f09fff1d10d49e948f5794e9d02b0f2a ld/testsuite/ld-elfvers/vers16a.dsym +ba77ee63cb0c9441745f678371e8c573 ld/testsuite/ld-elfvers/vers16a.ver +a2e06e03cf5f45c27839f309a5388b81 ld/testsuite/ld-elfvers/vers17.c +fb96a6647ba7b667f7d36ea828bd35f1 ld/testsuite/ld-elfvers/vers17.dsym +db62e32b4b422023390633f11005c406 ld/testsuite/ld-elfvers/vers17.map +3f61673d5b6aded9b54d5a6d50bbe9db ld/testsuite/ld-elfvers/vers17.ver +3eba3e7c2f298addf831ff2dda5ce4e5 ld/testsuite/ld-elfvers/vers18.c +879ada875b24b80dda514c7e2e2af7b3 ld/testsuite/ld-elfvers/vers18.dsym +ff664f0bcb51460658f2bd68559e58ce ld/testsuite/ld-elfvers/vers18.map +29ff86c9e1e6ef2c71260ba2d1469708 ld/testsuite/ld-elfvers/vers18.sym +922422137a8d9727622d676c21a89be5 ld/testsuite/ld-elfvers/vers18.ver +039a925919afb81dc1ee342704f38935 ld/testsuite/ld-elfvers/vers19.c +cf3aefa02697e84e0e6c2868b6f5c680 ld/testsuite/ld-elfvers/vers19.dsym +8b010e222b5e868705f82bbb23e9ecae ld/testsuite/ld-elfvers/vers19.ver +0a2838d86e28cda599478f48e5b5bdfd ld/testsuite/ld-elfvers/vers2.c +9e68402a4985b7a4b4dc5ba50b229992 ld/testsuite/ld-elfvers/vers2.dsym +0f243904b21ec2e5cda0083a35f9708e ld/testsuite/ld-elfvers/vers2.map +74f7411e32fe765dc6a26a1b8b0fb023 ld/testsuite/ld-elfvers/vers2.ver +4469f357ebf3ae54a6b7d3ac4dd45e02 ld/testsuite/ld-elfvers/vers20.c +5ea20d0221b73c72bb641c79065d08ea ld/testsuite/ld-elfvers/vers20.dsym +8bc8f7d4944729dc8b93a7411039edab ld/testsuite/ld-elfvers/vers20.map +32f1fbc9d25386a28a726ba8213b0c50 ld/testsuite/ld-elfvers/vers20.ver +46d437dd2ea257791fdff7e14e326256 ld/testsuite/ld-elfvers/vers20a.ver +302adc31b972ff2d933201c8f4b84abe ld/testsuite/ld-elfvers/vers21.c +bbfcf81776040e057fce57d60d68d5c1 ld/testsuite/ld-elfvers/vers21.dsym +1d171dba2a073a9f452c6dc9738d9ab5 ld/testsuite/ld-elfvers/vers21.map +1c785fd67664055b80771ed6cdd5825c ld/testsuite/ld-elfvers/vers21.sym +9502301f11d072e0021a4c36a6a55871 ld/testsuite/ld-elfvers/vers21.ver +f14e2a97a506acb8ccb16ae8169e02f0 ld/testsuite/ld-elfvers/vers22.c +a3d23562ca52431974f3fa10acc9942e ld/testsuite/ld-elfvers/vers22.dsym +73bdadb2bf334d7215bed4b3bbf79386 ld/testsuite/ld-elfvers/vers22.map +5d2c09668da017aaa1a398b2866f7651 ld/testsuite/ld-elfvers/vers22.ver +5422f7f0e7ee89007aa881bf34744156 ld/testsuite/ld-elfvers/vers22a.c +cace02d0bb3e824647423b833370b72e ld/testsuite/ld-elfvers/vers22a.dsym +0248e44186a26078d64b6f395b97fffc ld/testsuite/ld-elfvers/vers22a.sym +d2dbe45f18e4edc221fa05515c8f87f3 ld/testsuite/ld-elfvers/vers22a.ver +4f7246f39713bbd895f864c0575ba407 ld/testsuite/ld-elfvers/vers22b.c +3de0eddf476f0be654f0e5918cb4e757 ld/testsuite/ld-elfvers/vers22b.dsym +23a2621b4322026f42215399979cf422 ld/testsuite/ld-elfvers/vers22b.ver +bbc9fc509cd541c3693ee9eccfbd5b9d ld/testsuite/ld-elfvers/vers23.c +a5ebf070c6fc1bf2f3db91018bc1f649 ld/testsuite/ld-elfvers/vers23.dsym +633a3d837043afb4e2e529e4c3e90935 ld/testsuite/ld-elfvers/vers23.ver +fae2a28abdecb1706f8f3011f441045a ld/testsuite/ld-elfvers/vers23a.c +744cd1ebd356a20b1ea8a90ee2947990 ld/testsuite/ld-elfvers/vers23a.dsym +8343a077e30c61911ce93c6effc40152 ld/testsuite/ld-elfvers/vers23a.map +0248e44186a26078d64b6f395b97fffc ld/testsuite/ld-elfvers/vers23a.sym +68dbe79c82488593a3a00c5d4f254629 ld/testsuite/ld-elfvers/vers23a.ver +60fc3d9c482fe99a2b93cb18e7e80609 ld/testsuite/ld-elfvers/vers23b.c +3de0eddf476f0be654f0e5918cb4e757 ld/testsuite/ld-elfvers/vers23b.dsym +73bdadb2bf334d7215bed4b3bbf79386 ld/testsuite/ld-elfvers/vers23b.map +97b6652b41cf7947f6d77856bc082c38 ld/testsuite/ld-elfvers/vers23b.ver +a3c80128cbd69d851c37fc62d70a1bbe ld/testsuite/ld-elfvers/vers23c.ver +6df1e37b6ca916c4d1c8ec5813eaf507 ld/testsuite/ld-elfvers/vers23d.dsym +e9fda16fba73fb7725109a8dbc9b602b ld/testsuite/ld-elfvers/vers24.map +b8aafc5a20dfe2e23b770ee2e59bcc2c ld/testsuite/ld-elfvers/vers24.rd +dcd045d4d5696948726cd1964a9817a7 ld/testsuite/ld-elfvers/vers24a.c +9a260b109ac2c5d9b67c179a743164d2 ld/testsuite/ld-elfvers/vers24b.c +793997d59be62b943c1aae95eaef6b99 ld/testsuite/ld-elfvers/vers24c.c +0523f9af999af91bcc588cad64caa834 ld/testsuite/ld-elfvers/vers25a.c +59aa7f567e00c4925219abdc39e1de42 ld/testsuite/ld-elfvers/vers25a.dsym +57f961fd2476ec908ae22cca5bdc232d ld/testsuite/ld-elfvers/vers25a.map +81e3c1cf35a071eb13a27e374dec7221 ld/testsuite/ld-elfvers/vers25a.ver +12e05f0c04c3fe45dd5f8a9ce22f9f78 ld/testsuite/ld-elfvers/vers25b.c +7d2a38f57ff8f9292dd32d86db3f1465 ld/testsuite/ld-elfvers/vers25b.dsym +b8347f91cfb6122afdab80b966752a2c ld/testsuite/ld-elfvers/vers25b.ver +e98c326ae1d6de1a6f02bbec6be09dd9 ld/testsuite/ld-elfvers/vers26a.c +59aa7f567e00c4925219abdc39e1de42 ld/testsuite/ld-elfvers/vers26a.dsym +57f961fd2476ec908ae22cca5bdc232d ld/testsuite/ld-elfvers/vers26a.map +1a56e75735dd914b028707398606d9f1 ld/testsuite/ld-elfvers/vers26a.ver +47bb2e0fbb87fcb4c863dfa911a22aec ld/testsuite/ld-elfvers/vers26b.c +b8347f91cfb6122afdab80b966752a2c ld/testsuite/ld-elfvers/vers26b.dsym +b8347f91cfb6122afdab80b966752a2c ld/testsuite/ld-elfvers/vers26b.ver +0523f9af999af91bcc588cad64caa834 ld/testsuite/ld-elfvers/vers27a.c +59aa7f567e00c4925219abdc39e1de42 ld/testsuite/ld-elfvers/vers27a.dsym +57f961fd2476ec908ae22cca5bdc232d ld/testsuite/ld-elfvers/vers27a.map +d60856e7654583644f69d753c28b6ff5 ld/testsuite/ld-elfvers/vers27a.ver +5266024b8076b5b26794b09939d37166 ld/testsuite/ld-elfvers/vers27b.c +b8347f91cfb6122afdab80b966752a2c ld/testsuite/ld-elfvers/vers27b.dsym +b8347f91cfb6122afdab80b966752a2c ld/testsuite/ld-elfvers/vers27b.ver +12e05f0c04c3fe45dd5f8a9ce22f9f78 ld/testsuite/ld-elfvers/vers27c.c +b8347f91cfb6122afdab80b966752a2c ld/testsuite/ld-elfvers/vers27c.dsym +b8347f91cfb6122afdab80b966752a2c ld/testsuite/ld-elfvers/vers27c.ver +829aae1ccec6537f91efd3ea305f9e66 ld/testsuite/ld-elfvers/vers27d.dsym +6b4020e10fb889eb3c832588997c8b67 ld/testsuite/ld-elfvers/vers27d.sym +9f6f5bf5a47965e44de4c07fdc6660d5 ld/testsuite/ld-elfvers/vers27d.ver +83c538703e21419330e9a2a91572dc38 ld/testsuite/ld-elfvers/vers27d1.c +1ceed1e236c346112bd60a798bc5bee1 ld/testsuite/ld-elfvers/vers27d2.c +88a2654d0eec5305a3c68d0592b793a7 ld/testsuite/ld-elfvers/vers27d3.c +a5ebf070c6fc1bf2f3db91018bc1f649 ld/testsuite/ld-elfvers/vers27d4.dsym +174698c458f46bd70b8accf50820f3d2 ld/testsuite/ld-elfvers/vers27d4.ver +0523f9af999af91bcc588cad64caa834 ld/testsuite/ld-elfvers/vers28a.c +b8347f91cfb6122afdab80b966752a2c ld/testsuite/ld-elfvers/vers28a.dsym +b8347f91cfb6122afdab80b966752a2c ld/testsuite/ld-elfvers/vers28a.ver +149133883cb0fb36026df232ff8a23d1 ld/testsuite/ld-elfvers/vers28b.c +0569b27808decda4fbcdf7717e617d4a ld/testsuite/ld-elfvers/vers28b.dsym +57f961fd2476ec908ae22cca5bdc232d ld/testsuite/ld-elfvers/vers28b.map +72effba67ac2aab0b4eb6b36ef25358f ld/testsuite/ld-elfvers/vers28b.ver +48737299e30907008d88fa0f1990de62 ld/testsuite/ld-elfvers/vers28c.c +c50f9e28fc0fec9c7924fc471430c0aa ld/testsuite/ld-elfvers/vers28c.dsym +9c5cf2b1eb3f0c7e801b91829ef5081b ld/testsuite/ld-elfvers/vers28c.ver +47fef54f84aa89c6c41f11914aee3d65 ld/testsuite/ld-elfvers/vers29.c +9f70d4b1ea9dbb73b07733538f41189a ld/testsuite/ld-elfvers/vers29.dsym +40722f8e631cbf28b20f03c5cbfe38b9 ld/testsuite/ld-elfvers/vers29.ver +2198856c8569cc7494ffe89650a9e63b ld/testsuite/ld-elfvers/vers3.c +cf3aefa02697e84e0e6c2868b6f5c680 ld/testsuite/ld-elfvers/vers3.dsym +8a491b80ca3b80c98fb3ef4b89144e65 ld/testsuite/ld-elfvers/vers3.ver +f5c281cfb038224a4d4d58aef1722ea5 ld/testsuite/ld-elfvers/vers30.c +7d31903e73639c4d55b43ad71b54bae8 ld/testsuite/ld-elfvers/vers30.dsym +80c39498d585c4ed1e673c9913baad4c ld/testsuite/ld-elfvers/vers30.map +5c50a408e839ce394d6afefc99c05f03 ld/testsuite/ld-elfvers/vers30.ver +6e5a4cce520eb1d178d64b496ff8ecdb ld/testsuite/ld-elfvers/vers31.c +b8b281ab353872a431ea8acefc969c08 ld/testsuite/ld-elfvers/vers31.dsym +16b25cba9740f9d81f00ccd060795fb5 ld/testsuite/ld-elfvers/vers31.map +4e6cd894f98b3986f8186c14b0f2e3d7 ld/testsuite/ld-elfvers/vers31.ver +6b0b0fa55c95439cd34b997ab63b1d4a ld/testsuite/ld-elfvers/vers32.map +95828e8bc4f7404dbf7526fb7bd0f192 ld/testsuite/ld-elfvers/vers32a.c +a2d7608047175f1f9985a2f3b55fa352 ld/testsuite/ld-elfvers/vers32a.dsym +11069de249c4f4a64927901070167be9 ld/testsuite/ld-elfvers/vers32a.ver +a863ef5f1c11831afdaf974a863a0a63 ld/testsuite/ld-elfvers/vers32b.c +4ca14c34fad7aee9f54ba020f0783562 ld/testsuite/ld-elfvers/vers32b.dsym +db9c79e40e7fdca3d52eebe59cabf8af ld/testsuite/ld-elfvers/vers32b.ver +ccd32291f12843a2fa3eef56c741404e ld/testsuite/ld-elfvers/vers4.c +19bfa47f645607d5e10812a1da0f90f1 ld/testsuite/ld-elfvers/vers4.sym +e3993b8a2e4f48f58b5d0ada10ba4561 ld/testsuite/ld-elfvers/vers4a.dsym +19bfa47f645607d5e10812a1da0f90f1 ld/testsuite/ld-elfvers/vers4a.sym +ce2400c96d4fc6123be2ef21d26463f5 ld/testsuite/ld-elfvers/vers4a.ver +d1cfe9c70723b380ef055a682437ba30 ld/testsuite/ld-elfvers/vers5.c +fc0867daf0fa30de46d2abacb8f9235f ld/testsuite/ld-elfvers/vers6.c +89061a89d2c9496e0e97880d8c8c8c71 ld/testsuite/ld-elfvers/vers6.dsym +5efeda74a14424e32fa46037c5d20d0d ld/testsuite/ld-elfvers/vers6.sym +c6dda7839f06ae8858d0d413c6b436dc ld/testsuite/ld-elfvers/vers6.ver +8c6338ab91836afb2918ef463e5e899a ld/testsuite/ld-elfvers/vers7.c +9a7ae246a7154e67158fc0cdcda850d8 ld/testsuite/ld-elfvers/vers7.map +141ee51799ca768deea7fb6747fbbfa2 ld/testsuite/ld-elfvers/vers7a.c +3c7917b4f34e11502212e2c2ff5df713 ld/testsuite/ld-elfvers/vers7a.dsym +0816eae48bb08edb4157eca3adf87f8e ld/testsuite/ld-elfvers/vers7a.sym +ef725ba6c6212223dd638cc330f8ea07 ld/testsuite/ld-elfvers/vers7a.ver +258f61144bcd39b444b75dba182129e6 ld/testsuite/ld-elfvers/vers8.c +5eadb3d448dc734491d4524e07f15f63 ld/testsuite/ld-elfvers/vers8.map +d7293eed499f910aaea96045a2ed2802 ld/testsuite/ld-elfvers/vers8.ver +b4a26e17bd6950fc9e4bb0ab58b328fb ld/testsuite/ld-elfvers/vers9.c +46706cabbc61aa28af8cc4e10e8ff65b ld/testsuite/ld-elfvers/vers9.dsym +b376f4050a07745b5a27d5745e95135b ld/testsuite/ld-elfvers/vers9.sym +98b81d902db96eca605162be67983d1f ld/testsuite/ld-elfvers/vers9.ver +e7c2a2db4675513e62d8ffee0261114b ld/testsuite/ld-elfvsb/common.c +4bb9ca85a1469d2af2ac23d7a8f540a0 ld/testsuite/ld-elfvsb/define.s +ab58dd4aea8894af968cae07e98cce1c ld/testsuite/ld-elfvsb/elf-offset.ld +311acb2b4478311b5dd7d43553e4167c ld/testsuite/ld-elfvsb/elfvsb.dat +76478eabb555fa06acded5c157d6523b ld/testsuite/ld-elfvsb/elfvsb.exp +77ac30a27063e4b52eabf74341e5a86e ld/testsuite/ld-elfvsb/hidden0.d +976bd30c73849900caaed88cfb7244d7 ld/testsuite/ld-elfvsb/hidden1.d +7a01224f5809d7cd3febff67ae8a633c ld/testsuite/ld-elfvsb/hidden2.d +ab59f9746bcefe5b7366026573457d50 ld/testsuite/ld-elfvsb/hidden2.ld +89ab48379336c8ecd7ea7cffdfe97ad3 ld/testsuite/ld-elfvsb/hidden2.s +4bbbe82c403526fec859f0d13515aed8 ld/testsuite/ld-elfvsb/internal0.d +6dd8cfa1fff25df3562ce03a8f44c837 ld/testsuite/ld-elfvsb/internal1.d +c6bb503e50cc239732b047b2a912e731 ld/testsuite/ld-elfvsb/main.c +66d400efff5fb93230ad8fcffe2bb186 ld/testsuite/ld-elfvsb/protected0.d +facb8b5e9d55edeccf6658623ff6f56e ld/testsuite/ld-elfvsb/protected1.d +61b7dea099eb11429588869780156a37 ld/testsuite/ld-elfvsb/sh1.c +90812ab2b20216b53074ec98d6b410c3 ld/testsuite/ld-elfvsb/sh2.c +164bf9fa3225c27578caf6a12ecc5779 ld/testsuite/ld-elfvsb/sh3.c +44ad79da0c181cbfb55b2f36aac6a201 ld/testsuite/ld-elfvsb/test.c +2f0256a43da423922ed1929bea438972 ld/testsuite/ld-elfvsb/undef.s +046e158fe0af59748019e9d9d86bad4d ld/testsuite/ld-elfweak/bar.c +96221199fd09def3e578f62aaa264c39 ld/testsuite/ld-elfweak/bar1a.c +0e4106aabff604c09aa201ce238d54dd ld/testsuite/ld-elfweak/bar1b.c +9f3b2607071ce0deb9d70f4e65b9cf9e ld/testsuite/ld-elfweak/bar1c.c +e6ea1a4e59b88aef8402a40810ee14d7 ld/testsuite/ld-elfweak/dso.dsym +ea0dc3c0c096c41a760230c1dbba5b5b ld/testsuite/ld-elfweak/dsodata.dsym +671a2a5813ffb5b60a15d52b169f774f ld/testsuite/ld-elfweak/dsow.dsym +494629f57fb3c0f4ca6336a5971875ef ld/testsuite/ld-elfweak/dsowdata.dsym +a5217834af746e0716006ecdbab2c370 ld/testsuite/ld-elfweak/elfweak.exp +0675dd6a498ed0fe35607abf03517c33 ld/testsuite/ld-elfweak/foo.c +61ce595ea3b7dda0bed97536cc50991f ld/testsuite/ld-elfweak/foo1a.c +d999331c477d9e594cdbe6642952da5a ld/testsuite/ld-elfweak/foo1b.c +8ab030ac10dd0340d51ce6e293aa31b0 ld/testsuite/ld-elfweak/main.c +d082bc04bb367593bf0d9403824584ac ld/testsuite/ld-elfweak/main1.c +c0710d6b4f15dfa88f600b0e6b624077 ld/testsuite/ld-elfweak/size.dat +ca873fa02ef818fdf7cadbf28d5830e9 ld/testsuite/ld-elfweak/size2.d +7f8709337349165a691bfb796d9ba358 ld/testsuite/ld-elfweak/size2a.s +3d27e4cedeb4cd50d6a3f4f56d3c6f6f ld/testsuite/ld-elfweak/size2b.s +bb8fccf253fe11bdc128fb40ec1a1821 ld/testsuite/ld-elfweak/size_bar.c +007464380f12ed6e882f8074a930292c ld/testsuite/ld-elfweak/size_foo.c +79bafe4b4c71963e9efe1a2a99474fc6 ld/testsuite/ld-elfweak/size_main.c +6ff9ed6df35266db3df63a42222569ff ld/testsuite/ld-elfweak/strong.dat +60ee89049e15280964cd994ae23f4656 ld/testsuite/ld-elfweak/strong.sym +7c19a4469f1f8e7fdf4bb5baa9a90223 ld/testsuite/ld-elfweak/strongcomm.sym +5a6dd36b14499e59820a074213e6c5df ld/testsuite/ld-elfweak/strongdata.dat +ca112024604c5006b1e1079eb9a110eb ld/testsuite/ld-elfweak/strongdata.sym +dcf5e53a281f26dbad477cdba407e168 ld/testsuite/ld-elfweak/weak.dat +671a2a5813ffb5b60a15d52b169f774f ld/testsuite/ld-elfweak/weak.dsym +40040714fbc533439a8346bed87f39be ld/testsuite/ld-elfweak/weakdata.dat +494629f57fb3c0f4ca6336a5971875ef ld/testsuite/ld-elfweak/weakdata.dsym +740e6c75a141a24eb7156f293adc9c31 ld/testsuite/ld-fastcall/export.s +85fb1bcd5f2d2732164c14cee7ad5fa1 ld/testsuite/ld-fastcall/fastcall.exp +398cd605e80d06f2edbaa7bb1b81ee32 ld/testsuite/ld-fastcall/import.s +cc41507ba2036874052bbab955b769b6 ld/testsuite/ld-frv/fdpic-pie-1.d +c6a403fab71ad34af64723536c018756 ld/testsuite/ld-frv/fdpic-pie-2.d +036f2e58a8bbbf45a822e963824e9eef ld/testsuite/ld-frv/fdpic-pie-5.d +968734d40a8c4556b11608cedf60bc2d ld/testsuite/ld-frv/fdpic-pie-6-fail.d +6e95984441beeca5f56bf0910b606fab ld/testsuite/ld-frv/fdpic-pie-6.d +e288de935e2088c24012d910539e7aa8 ld/testsuite/ld-frv/fdpic-pie-7.d +de5c6fce807f3bf3ea05d72e64847dc6 ld/testsuite/ld-frv/fdpic-pie-8.d +e38d66851473ccb9acdb382ddf545173 ld/testsuite/ld-frv/fdpic-shared-1.d +44f78d9d02ec25a226af8a0153d7f3ca ld/testsuite/ld-frv/fdpic-shared-2-fail.d +2b1ecf50cb0ae530f538e41e534257e0 ld/testsuite/ld-frv/fdpic-shared-2.d +cbb3d2f0bceb9c3d430f15b8157ac36a ld/testsuite/ld-frv/fdpic-shared-3.d +c64f1ffc25ddabf83b05145828e6d973 ld/testsuite/ld-frv/fdpic-shared-4.d +9eff95cea03ee8944f5ec4e22dc373bf ld/testsuite/ld-frv/fdpic-shared-5.d +47129de7d81b57da3a558829c929a0e8 ld/testsuite/ld-frv/fdpic-shared-6-fail.d +51002d66ea2bf42abadad053904a7dbe ld/testsuite/ld-frv/fdpic-shared-6.d +3736ec9bc2505562d566f737de13d335 ld/testsuite/ld-frv/fdpic-shared-7.d +df883e86ef4001df59397b1deddf779b ld/testsuite/ld-frv/fdpic-shared-8-fail.d +4b0caf7ae0d50f59f001dd47aa8f791e ld/testsuite/ld-frv/fdpic-shared-8.d +9400d6cc06da7cc32296226e84c3ff78 ld/testsuite/ld-frv/fdpic-shared-local-2.d +d3d29fa692ee1b23ef350080de143c23 ld/testsuite/ld-frv/fdpic-shared-local-8.d +ab6c75ef5e03df3b89c91ea68fbc803f ld/testsuite/ld-frv/fdpic-static-1.d +62ce6d41d5c5e6ef2bd5852a7f173d41 ld/testsuite/ld-frv/fdpic-static-2.d +38da2b407d6a293dcf365cac941194c8 ld/testsuite/ld-frv/fdpic-static-5.d +7995cc7e9cd3d51c1854028567ddbd0e ld/testsuite/ld-frv/fdpic-static-6.d +cc1097db4cd49675213230866ee591af ld/testsuite/ld-frv/fdpic-static-7.d +930cf511857f462a346d097c88f7ffa0 ld/testsuite/ld-frv/fdpic-static-8.d +2b882da98beaf0e3f6be9af4b2413dc3 ld/testsuite/ld-frv/fdpic.exp +05e4f28acb84feeaf5710145293999db ld/testsuite/ld-frv/fdpic1.s +c6d87683d1fa4888efa7ddc918099749 ld/testsuite/ld-frv/fdpic2.ldv +cfa8675017dda6a3ec48235022d86a36 ld/testsuite/ld-frv/fdpic2.s +d3a945e4376ce0ad93d1099a8dd3d1fc ld/testsuite/ld-frv/fdpic2min.ldv +e455be96f7634ac1d9e36603b080db76 ld/testsuite/ld-frv/fdpic3.s +63a031ad889a71153cb467efe899eb91 ld/testsuite/ld-frv/fdpic4.s +cfb53b605cad0eede6f786417b40363d ld/testsuite/ld-frv/fdpic5.s +5b6860c160aff69dfaedc50d8a0a6391 ld/testsuite/ld-frv/fdpic6.ldv +a395bf06c37a4615ba0d0bcce7da833b ld/testsuite/ld-frv/fdpic6.s +88ba83aa62acc75b0d9b601f2176e799 ld/testsuite/ld-frv/fdpic7.s +d2006465db117fb02c0c9f1b5f6bd73c ld/testsuite/ld-frv/fdpic8.ldv +ef0ec67da07de5b9741c96073f814175 ld/testsuite/ld-frv/fdpic8.s +906b49e106ec05d8fd119a49bba35044 ld/testsuite/ld-frv/fdpic8min.ldv +2aab41e05d636fa2c0c57d293674e41b ld/testsuite/ld-frv/fr450-link.d +801d14a6810ebae1f5eefda4bac2a4d8 ld/testsuite/ld-frv/fr450-linka.s +801d14a6810ebae1f5eefda4bac2a4d8 ld/testsuite/ld-frv/fr450-linkb.s +801d14a6810ebae1f5eefda4bac2a4d8 ld/testsuite/ld-frv/fr450-linkc.s +08403deb1fd72dd5f15a32a7d3d13503 ld/testsuite/ld-frv/frv-elf.exp +98f770864b645ad0c0d7446ea2e654c8 ld/testsuite/ld-frv/tls-1-dep.s +6237447698468c17c8cd3726671adc56 ld/testsuite/ld-frv/tls-1-shared.lds +37fdb5cb8586d27c2d5465cd79a92132 ld/testsuite/ld-frv/tls-1.s +e1f7b6df59d7016724ec121bb551bf0d ld/testsuite/ld-frv/tls-2.s +f865508510be9a71fc6c039e3b113f7d ld/testsuite/ld-frv/tls-3.s +44ba36d385d1535f2d4d3afc6924af55 ld/testsuite/ld-frv/tls-dynamic-1.d +0a2cf2f8a22dd44afbd789b6dd0d9cee ld/testsuite/ld-frv/tls-dynamic-2.d +2467f5b3a52c414033a73ca4b7b5de5e ld/testsuite/ld-frv/tls-dynamic-3.d +e4c7efbfa45749da4fb80c9315bb4a5d ld/testsuite/ld-frv/tls-initial-shared-2.d +840cf4a069daac4120e1b9f98aad9849 ld/testsuite/ld-frv/tls-pie-1.d +f1685e112150f1c7e45762585ada9951 ld/testsuite/ld-frv/tls-pie-3.d +8961a52a62db16458dc6252a46f492db ld/testsuite/ld-frv/tls-relax-dynamic-1.d +cb0936e98f159cbf53a17c09049496e5 ld/testsuite/ld-frv/tls-relax-dynamic-2.d +4c18cc9e6ebf9a3f2033bed06ad75b08 ld/testsuite/ld-frv/tls-relax-dynamic-3.d +fc1ffa5981afb282539567848710be83 ld/testsuite/ld-frv/tls-relax-initial-shared-2.d +d1d3a8cb2105a3fb2e6c55f91c1e8d7b ld/testsuite/ld-frv/tls-relax-pie-1.d +ad57d800fd5554dea9ad46d4b417f6d8 ld/testsuite/ld-frv/tls-relax-pie-3.d +1cc0150eec83ecbdc031b76cb7e26e8b ld/testsuite/ld-frv/tls-relax-shared-1.d +abe458eed1c73c883f8d2a27a66fbb30 ld/testsuite/ld-frv/tls-relax-shared-2.d +8a695eaaed5f713bb697bf511ffb9964 ld/testsuite/ld-frv/tls-relax-shared-3.d +ae1bf958e55ae4c6f551d37a4b266e97 ld/testsuite/ld-frv/tls-relax-static-1.d +dd8c28c9d4492ceca5c3ded82cc0921a ld/testsuite/ld-frv/tls-relax-static-3.d +1ec18ca37d8187658f5a325dc3a6615a ld/testsuite/ld-frv/tls-shared-1-fail.d +d9b11cc2a0549b9c6d4395d70a2267c1 ld/testsuite/ld-frv/tls-shared-1.d +8874cc86dfb3de63a6861db32ab47bb0 ld/testsuite/ld-frv/tls-shared-2.d +90b3609662b7b159ba82919e26480ca4 ld/testsuite/ld-frv/tls-shared-3.d +6d6ed8c232b234daad8364fc28448526 ld/testsuite/ld-frv/tls-static-1.d +ed3ef3320f222fa04b4b169e2476dd46 ld/testsuite/ld-frv/tls-static-3.d +9c8894ae8e7c235c0285eb19d023557d ld/testsuite/ld-frv/tls.exp +113edf8cd0e33b158a7971a13258deaf ld/testsuite/ld-gc/abi-note.d +3fad837915c245c79835b1ee410092cd ld/testsuite/ld-gc/abi-note.s +8374b35f68412379bade5bfa6ce108b2 ld/testsuite/ld-gc/dummy.s +1280581bf96a5504b9f5b4c53f3eac57 ld/testsuite/ld-gc/gc.c +8b398b7bbec6acc0aac9a98fb75962e4 ld/testsuite/ld-gc/gc.exp +f358a4953dab53dfdbcd4468252eede5 ld/testsuite/ld-gc/noent.d +6e9525f24877a300540fc764dc060c83 ld/testsuite/ld-gc/noent.s +3bb07aab20b4927ea79436574a2cca57 ld/testsuite/ld-gc/pr11218-1.c +f26c8add3dcc0793d01755e5bbb03024 ld/testsuite/ld-gc/pr11218-2.c +d9baed37c81f7b2c2afe56409a56aa7b ld/testsuite/ld-gc/pr11218.d +98e4b933ed2f369f8e11ef7283dd7a9e ld/testsuite/ld-gc/start.d +d4b6668928d4109f8367ed06994cd9bd ld/testsuite/ld-gc/start.s +98c4a6fd6872bcd109e317822e8a76b0 ld/testsuite/ld-h8300/gcsection.d +6fe0410a922b80e1abc7ca25bf822f97 ld/testsuite/ld-h8300/gcsection.s +cecd4ded0bc74aea9ffbb21f55ff43f1 ld/testsuite/ld-h8300/h8300.exp +e6a00aab6e0b5068195989a402c44d69 ld/testsuite/ld-h8300/relax-2.d +4f488bd30141b1f3cea35bd59a56bc2d ld/testsuite/ld-h8300/relax-2.s +dfb37fd13b0c076c375d173f915b344d ld/testsuite/ld-h8300/relax-3-coff.d +97c8bdda98b7d9c79d9c8fda62d56489 ld/testsuite/ld-h8300/relax-3.d +a2e9dec4641c7321bc8b3a2425a2ef4e ld/testsuite/ld-h8300/relax-3.s +6695dd115983f75263961b8f46393d1d ld/testsuite/ld-h8300/relax-4-coff.d +5792d761c4b0c3456a39001785b73f87 ld/testsuite/ld-h8300/relax-4.d +1dba717565a0240b28da4a5ad6ea175d ld/testsuite/ld-h8300/relax-4.s +8e23d5349b426ea3bd58b6461dbfa3f0 ld/testsuite/ld-h8300/relax-5-coff.d +d461ec778d28c967a8d80eb4453ffe04 ld/testsuite/ld-h8300/relax-5.d +e99729d992d349d8efacc4be17ffc728 ld/testsuite/ld-h8300/relax-5.s +6fc6e5f4f2d011f032d967d2c5c47a9b ld/testsuite/ld-h8300/relax-6-coff.d +f03ce5f2426f3b9c3712d3ba8f266e30 ld/testsuite/ld-h8300/relax-6.d +71494a5071587d58c44881ddba8f98b8 ld/testsuite/ld-h8300/relax-6.s +a6d0a3d0032213f8a5f6a37259b4dad1 ld/testsuite/ld-h8300/relax.d +cf8d1ef781c6a11ee4c2c65408f52849 ld/testsuite/ld-h8300/relax.s +4eab08278dc62388fa451c0d215263f0 ld/testsuite/ld-i386/abs.d +4223c02660ef295874b7f46e534bb756 ld/testsuite/ld-i386/abs.s +abbd4c0e6060fa01f7f17ecdddf529b9 ld/testsuite/ld-i386/alloc.d +170462078f6b736209d66144d5298673 ld/testsuite/ld-i386/alloc.s +2a89bceef227b5ae12bb10f9d0904a4c ld/testsuite/ld-i386/alloc.t +3514d60eeebcfc8f7d93239d00a042fa ld/testsuite/ld-i386/combreloc.d +bfad8fd9caab1c503c3e547132bba8e3 ld/testsuite/ld-i386/combreloc.s +3d3179e084e0db2e7dfa246916ca8b9f ld/testsuite/ld-i386/compressed1.d +09a2601cf50aa61814ade41b8f3bc213 ld/testsuite/ld-i386/compressed1.s +315a02c2a12f88930a0356cb4c14212d ld/testsuite/ld-i386/discarded1.d +abd0b94a0fe91990730795e06e681e3b ld/testsuite/ld-i386/discarded1.s +932839e2d4e600dcdc966010e4965a31 ld/testsuite/ld-i386/discarded1.t +6a24bf2c11edfd744205734d0d2776f1 ld/testsuite/ld-i386/emit-relocs.d +47a609aa14618023c1317f741f3810de ld/testsuite/ld-i386/emit-relocs.s +e0b4ac393b55aa6dde9eeb2eac8dd281 ld/testsuite/ld-i386/hidden1.d +d3e5ca870e218a1b1dcb656e0bfaa3ce ld/testsuite/ld-i386/hidden1.s +fd28ba522821f5d534e85cafc8e5eac4 ld/testsuite/ld-i386/hidden2.d +ecab80f3eb47cc5bc5871e947f9b395e ld/testsuite/ld-i386/hidden2.s +e0b4ac393b55aa6dde9eeb2eac8dd281 ld/testsuite/ld-i386/hidden3.d +d9d64e8ca2b43c851eacaa021767eafa ld/testsuite/ld-i386/hidden3.s +051f784ea9318b8e384a43f178c1208a ld/testsuite/ld-i386/i386.exp +74112f5d00b1bc8acfb9165b1b9ddd0c ld/testsuite/ld-i386/nogot1.d +6578c6fdcd635f9a6f10174cc27f5125 ld/testsuite/ld-i386/nogot1.s +1fe6ae6b1583214e2d42d6b94b234708 ld/testsuite/ld-i386/nogot2.d +adf3d3417bacbbbbd44af52a3a9d1879 ld/testsuite/ld-i386/nogot2.s +55da47cb01da3536927b36f6abf83bbc ld/testsuite/ld-i386/pcrel16.d +86c55cbae78801844b5fbab4a5134989 ld/testsuite/ld-i386/pcrel16.s +b5c9f63c2f1ee687e18c29a5560da724 ld/testsuite/ld-i386/pcrel16abs.d +c28929bb26afb7e6e572ea7a94b2c468 ld/testsuite/ld-i386/pcrel16abs.s +4d55687220a930ac78d5153b16fa70ad ld/testsuite/ld-i386/pcrel8.d +72a801ea2498c750a89388b264ee332f ld/testsuite/ld-i386/pcrel8.s +588029a62ada206efa182d3931deb519 ld/testsuite/ld-i386/pr12627.d +01fbdaad0c2dd99a3c9a5aed298331b7 ld/testsuite/ld-i386/pr12627.s +6efefb3ab9456a4a3f199f20488107fb ld/testsuite/ld-i386/pr12627.t +aaea65b76e9800110d84072052355f06 ld/testsuite/ld-i386/pr12718.d +f2aa8181f8bb6e72317ba9cf91579fa6 ld/testsuite/ld-i386/pr12718.s +e3d30671954e979de708a6c0ef1b3dc6 ld/testsuite/ld-i386/pr12921.d +9bc8273e473647c31df4d698250c1af1 ld/testsuite/ld-i386/pr12921.s +92de073b153a3be8e4c2e986b9bc785d ld/testsuite/ld-i386/protected1.d +538ea3fd8f05afd6d0dc78414f610d00 ld/testsuite/ld-i386/protected1.s +339ba4f5757c67ee3e47afe85ecb3617 ld/testsuite/ld-i386/protected2.d +3c225f378aa9175db095f949d3da69ee ld/testsuite/ld-i386/protected2.s +e674277f637c3f35089da7167f4af13f ld/testsuite/ld-i386/protected3.d +1a8d3bf27adc1c5b4d3a8332787b13d8 ld/testsuite/ld-i386/protected3.s +d582159967d9ddbb79a87bedf04bfb45 ld/testsuite/ld-i386/reloc.d +ee1b7cbb64cf7c75b90dc73e1c708915 ld/testsuite/ld-i386/reloc.s +17cf5ec4f90f397f7ec1cb7bb8e9fac0 ld/testsuite/ld-i386/tlsbin.dd +ee38fb15d66d91ca144cf419142bc1ad ld/testsuite/ld-i386/tlsbin.rd +f1f22d7f610addfd37d52a7882ff0f9e ld/testsuite/ld-i386/tlsbin.s +592ac2866623f1aaaede2fb4fbd4ca8f ld/testsuite/ld-i386/tlsbin.sd +c918c7d05392fcad4b7ce29e9dee9bd2 ld/testsuite/ld-i386/tlsbin.td +72e94d1daa0ef284f9d26c200f42fa52 ld/testsuite/ld-i386/tlsbindesc.dd +19cff7f0908f26e8d80fb4b574a40bff ld/testsuite/ld-i386/tlsbindesc.rd +c8e339bd9d5127a625f86dbf904aae86 ld/testsuite/ld-i386/tlsbindesc.s +a1972e936a45133bfe60151ad66506a6 ld/testsuite/ld-i386/tlsbindesc.sd +7106b1457d00c4cf9d6c8b6999843711 ld/testsuite/ld-i386/tlsbindesc.td +f9c933eed17694eb542d9e7f42100728 ld/testsuite/ld-i386/tlsbinpic.s +1d1a8f085cb88f347e6437da6ee8d8bf ld/testsuite/ld-i386/tlsdesc.dd +56e48a5bc09a2b38419fca204ead7f0c ld/testsuite/ld-i386/tlsdesc.rd +4ec4e709a96a11f0ed0cf6be12ab5fff ld/testsuite/ld-i386/tlsdesc.s +1b77cde328a2a4224b9c5beebb573b18 ld/testsuite/ld-i386/tlsdesc.sd +40510d27f6f5e766cdd9c4881e958ced ld/testsuite/ld-i386/tlsdesc.td +4bb8cd4266640900774fe1b4ea80b868 ld/testsuite/ld-i386/tlsg.s +52f26819c8f6efd2cd9d5b378518d949 ld/testsuite/ld-i386/tlsg.sd +534ab7075af497c71c5d52d741b2955b ld/testsuite/ld-i386/tlsgd1.dd +63026313b9fbc91347fd5886a87bc353 ld/testsuite/ld-i386/tlsgd1.s +9ed97b84890d783b4d7831dd37adf3d5 ld/testsuite/ld-i386/tlsgd2.d +2d9d0b02593ede41b0a823be4445cc9b ld/testsuite/ld-i386/tlsgd2.s +0f868a0a5f9cae4adb6a4d76e88940fa ld/testsuite/ld-i386/tlsgdesc.dd +38914ff1571c535bfd90c870b4feab08 ld/testsuite/ld-i386/tlsgdesc.rd +085d73ea85a181ebdc323e641e36d1cb ld/testsuite/ld-i386/tlsgdesc.s +a8274a590c125fa47d4c01ad12097b05 ld/testsuite/ld-i386/tlsie1.dd +4d5c62f626a9092729a89456caef56e5 ld/testsuite/ld-i386/tlsie1.s +0c53cf2b848a225ea05de9ce327469ea ld/testsuite/ld-i386/tlsie2.d +305f1b6124b40a0bd5d46380336613bb ld/testsuite/ld-i386/tlsie2.s +2ebeb06b9e469679c1137f8dd88648e5 ld/testsuite/ld-i386/tlsie3.d +4f8063ce23f7412837909b1679da6002 ld/testsuite/ld-i386/tlsie3.s +3c1230917a4bd2133b4fd0e4392ba5eb ld/testsuite/ld-i386/tlsie4.d +be1c017c2ef4b96e45141b7623f44f25 ld/testsuite/ld-i386/tlsie4.s +2472189eb7d10de2b023266f3cd2b430 ld/testsuite/ld-i386/tlsie5.d +bfb250693eb4f19f41d0e22612740f41 ld/testsuite/ld-i386/tlsie5.s +2e74682a19e57586b9823e31ecf73198 ld/testsuite/ld-i386/tlsindntpoff.dd +eb49cc94ea6fe44f33898f97f42637f2 ld/testsuite/ld-i386/tlsindntpoff.s +a2258ef6fa985a63e188695313feafc2 ld/testsuite/ld-i386/tlsld1.dd +8c31e6d117eb25b1940b227863d86626 ld/testsuite/ld-i386/tlsld1.s +1bdd583619347d5963aaad2762e13865 ld/testsuite/ld-i386/tlslib.s +131b46a77cfbdd6dca5bcc9fa4988cdd ld/testsuite/ld-i386/tlsnopic.dd +d323de8df6f10c7acdd9b6d9e94a01f5 ld/testsuite/ld-i386/tlsnopic.rd +f74baa6eb70c0242343eeeb2ddba7017 ld/testsuite/ld-i386/tlsnopic.sd +fd79d8e39eadeb4103c9d00fe0db5fe0 ld/testsuite/ld-i386/tlsnopic1.s +aaa7d0d4d8b25c5f3462865cc7574b49 ld/testsuite/ld-i386/tlsnopic2.s +458d207e2a9c36e3c4140f9fa80d6f09 ld/testsuite/ld-i386/tlspic.dd +0682da90f3e1a1a3719df380835feec0 ld/testsuite/ld-i386/tlspic.rd +a87e2c1b0b73ba2e42e339c317f289ba ld/testsuite/ld-i386/tlspic.sd +4e485196fb484d720e6512187e28dfc4 ld/testsuite/ld-i386/tlspic.td +4b385578f91c4d3a011c1b67e781f755 ld/testsuite/ld-i386/tlspic1.s +1be6d8e1547c710f7bc12028c6522832 ld/testsuite/ld-i386/tlspic2.s +e20febaba77d2da3c9261f1e3d8a84c3 ld/testsuite/ld-i386/tlspie1.d +bf844d037f8c9ed6f64a640bfb1598fc ld/testsuite/ld-i386/tlspie1.s +1d373c4f9365fedc0b3ab9009f548c82 ld/testsuite/ld-i386/tlspie2.d +7eacd5087c13cbe24eb858f83a9be514 ld/testsuite/ld-i386/tlspie2.s +b7f82843784cba881b7ea4785c86f790 ld/testsuite/ld-i386/vxworks1-lib.dd +e79bf538427185b3ca75d00211102266 ld/testsuite/ld-i386/vxworks1-lib.nd +a0819073ff1965a830139df2e13fed37 ld/testsuite/ld-i386/vxworks1-lib.rd +5c0f0bd45acc45bbd63ef60c5c244d8f ld/testsuite/ld-i386/vxworks1-lib.s +6dbdc5d4346169b9a3af98707d77be72 ld/testsuite/ld-i386/vxworks1-lib.td +57e13e14adacc62cab22da622bbcb01e ld/testsuite/ld-i386/vxworks1-static.d +8240644ff6e564425c5c3ed86538e298 ld/testsuite/ld-i386/vxworks1.dd +fe0833150ad45b3187eaec9f4ee96ccd ld/testsuite/ld-i386/vxworks1.ld +1f702480f27e22a8cae404bd9288c974 ld/testsuite/ld-i386/vxworks1.rd +94b6da333cef7b619c459007a7afbbe5 ld/testsuite/ld-i386/vxworks1.s +165ed1561458c0973255f985be876845 ld/testsuite/ld-i386/vxworks2-static.sd +3f44beb3168341e8a45bfef5bb7e4076 ld/testsuite/ld-i386/vxworks2.s +7afb4e2fc8be35ad985dcb2e21b7cbef ld/testsuite/ld-i386/vxworks2.sd +75d3de90ae0af66942afe3c19de40dfd ld/testsuite/ld-i386/warn1.d +cdf75144fa202701e59c77afe5e9adae ld/testsuite/ld-i386/warn1.s +3a4d9e7d99555e90d70ca58fb8d82cd1 ld/testsuite/ld-i386/zero.s +1909c12b33ef9687eb6af854ae5fb6bf ld/testsuite/ld-ia64/ia64.exp +ef16f67383acdaaea0d59b046f51d940 ld/testsuite/ld-ia64/line.exp +f58ac156c302a4a37579dd871018c503 ld/testsuite/ld-ia64/link-order.d +6d0f24ad075bbdb8e8f0c39bd9eafbc0 ld/testsuite/ld-ia64/local1.d +9f911aada66fa0c166c34664d8ae58c6 ld/testsuite/ld-ia64/local1.map +45c2ee7ef4a936af8792999bc0ccf44d ld/testsuite/ld-ia64/local1.s +06ef53a0168a0c91bb4c68dc3afc293b ld/testsuite/ld-ia64/merge1.d +beb0c44acd970fe4c427256cd7d831a2 ld/testsuite/ld-ia64/merge1.s +98e0b78c20d0cd7801cb7e515c3a68e5 ld/testsuite/ld-ia64/merge2.d +a868b7b0681c6c238417e4bec0633bd2 ld/testsuite/ld-ia64/merge2.s +d83f6380e0e28fdd3a1fbbbe7ad4bdcb ld/testsuite/ld-ia64/merge3.d +3d3e06880036e684aeed1a68d7ef0f95 ld/testsuite/ld-ia64/merge3.s +c9dd12b089e1aeb0c0a88a1a294f8576 ld/testsuite/ld-ia64/merge4.d +f508927ed0b65390c57a6a996644a8eb ld/testsuite/ld-ia64/merge4.s +b2b540be1a334a363a1fc9c8a40173f9 ld/testsuite/ld-ia64/merge5.d +7fb26d27806c80c93a886bfbf89daeda ld/testsuite/ld-ia64/merge5.s +8ec174d922ffce784b6c99f95dda9d3c ld/testsuite/ld-ia64/tlsbin.dd +717ad7a3d785354a0f72a2273b7ce6f5 ld/testsuite/ld-ia64/tlsbin.rd +e493af684ae154e5de6c44ac33c9b9bf ld/testsuite/ld-ia64/tlsbin.s +1dd796f756e270667007008752d2e9ee ld/testsuite/ld-ia64/tlsbin.sd +5425837cb644916b8fe5160eb7cac50a ld/testsuite/ld-ia64/tlsbin.td +6351909433c62754cacb97095fbce3cb ld/testsuite/ld-ia64/tlsbinpic.s +e0b0a05afe5e6efd10bc9fa42a6a0731 ld/testsuite/ld-ia64/tlsg.s +7dbb29f667fa0797b82d97e60dea87ba ld/testsuite/ld-ia64/tlsg.sd +1b26633dd00cb298fda05dd396fa6d88 ld/testsuite/ld-ia64/tlslib.s +c3768bbbc35442a51b419997baf497da ld/testsuite/ld-ia64/tlspic.dd +afea8bcec5e1cb7941be064ba247f43e ld/testsuite/ld-ia64/tlspic.rd +1bac51ec2817188e77fcf070995210c7 ld/testsuite/ld-ia64/tlspic.sd +4a995a6ff0cbe574e7514ac741408eac ld/testsuite/ld-ia64/tlspic.td +0d107c5a1c032fcfa98538191696c5d4 ld/testsuite/ld-ia64/tlspic1.s +1be6d8e1547c710f7bc12028c6522832 ld/testsuite/ld-ia64/tlspic2.s +cb7eab87f6359afcce07348873f889ef ld/testsuite/ld-ia64/undefined.s +54a3f0e6956e0ba92dc756b923be63c7 ld/testsuite/ld-ifunc/binutils.exp +9cc79490ef74911c65bf9175cf722c6f ld/testsuite/ld-ifunc/ifunc-1-local-x86.d +ace31ba9f2c7654cf96162af09051cf6 ld/testsuite/ld-ifunc/ifunc-1-local-x86.s +d0464020e48e8dc0eaed21fefd1e659f ld/testsuite/ld-ifunc/ifunc-1-x86.d +1ef34c7eba10038c97f00445717c80f7 ld/testsuite/ld-ifunc/ifunc-1-x86.s +944d8592dc4a7c764677faf63a207602 ld/testsuite/ld-ifunc/ifunc-10-i386.d +a8ed4afd6fad414bee6c05ed27794fc5 ld/testsuite/ld-ifunc/ifunc-10-i386.s +2e5476a79546fb8c24820be4a316ab81 ld/testsuite/ld-ifunc/ifunc-10-x86-64.d +bea1bb1dfc873471c7aaa3c88618d5a6 ld/testsuite/ld-ifunc/ifunc-10-x86-64.s +944d8592dc4a7c764677faf63a207602 ld/testsuite/ld-ifunc/ifunc-11-i386.d +1a0b0e1d75aaa2649329fa1a7d30c2ce ld/testsuite/ld-ifunc/ifunc-11-i386.s +2e5476a79546fb8c24820be4a316ab81 ld/testsuite/ld-ifunc/ifunc-11-x86-64.d +1b0289afa3a43a53b5f79d2f3bf4d73a ld/testsuite/ld-ifunc/ifunc-11-x86-64.s +1571bc7a00b4b6a6c842e0c18680ea21 ld/testsuite/ld-ifunc/ifunc-12-i386.d +51f087f6b851251109eaaedf229d49eb ld/testsuite/ld-ifunc/ifunc-12-i386.s +0379f2fafebec90c929c970bc893ca04 ld/testsuite/ld-ifunc/ifunc-12-x86-64.d +c5d904e46a444774c06e39c03bec94e5 ld/testsuite/ld-ifunc/ifunc-12-x86-64.s +e3665cae20b295a927e787bae8b9c017 ld/testsuite/ld-ifunc/ifunc-13-i386.d +fb55cd07e81221f0233e3efc7e83e88b ld/testsuite/ld-ifunc/ifunc-13-x86-64.d +8f25b51a30ab1a2d47a6699bf6a7de72 ld/testsuite/ld-ifunc/ifunc-13a-i386.s +b9572b418294bff5a7551c45d1485af9 ld/testsuite/ld-ifunc/ifunc-13a-x86-64.s +a064bb4c91988373ef0548639f5e689f ld/testsuite/ld-ifunc/ifunc-13b-i386.s +a064bb4c91988373ef0548639f5e689f ld/testsuite/ld-ifunc/ifunc-13b-x86-64.s +d0f1714e4d80e23af3d3fc28e6c72b4c ld/testsuite/ld-ifunc/ifunc-14-i386.d +d9883f726e8bbfbd7203affe7233db8a ld/testsuite/ld-ifunc/ifunc-14-x86-64.d +fb6d109c14fc66d6234c2c7c539fe095 ld/testsuite/ld-ifunc/ifunc-14a.s +b5aff5ef073fa09a0dbbfd555e4ff66c ld/testsuite/ld-ifunc/ifunc-14b.s +3196233b7dd59c8abf0a4d102348d8c5 ld/testsuite/ld-ifunc/ifunc-15-i386.d +ddb73d1cd99a95fe800cc099a7f627da ld/testsuite/ld-ifunc/ifunc-15-i386.s +975ba252afac4003cc5afb81e8341b3e ld/testsuite/ld-ifunc/ifunc-15-x86-64.d +24590608e6a9d6df360f4a007924b8ed ld/testsuite/ld-ifunc/ifunc-15-x86-64.s +b14911e14aa4147c7e48720c958dd9fd ld/testsuite/ld-ifunc/ifunc-2-i386.d +5450011e55e527e9c41f747e20d93356 ld/testsuite/ld-ifunc/ifunc-2-i386.s +b14911e14aa4147c7e48720c958dd9fd ld/testsuite/ld-ifunc/ifunc-2-local-i386.d +0ed85769aaa30ec681de3f44e8b763b1 ld/testsuite/ld-ifunc/ifunc-2-local-i386.s +ea70d3f901e675db719d68d665efc0f3 ld/testsuite/ld-ifunc/ifunc-2-local-x86-64.d +1c39b0c1b74d581411debed0c6eb67e6 ld/testsuite/ld-ifunc/ifunc-2-local-x86-64.s +ea70d3f901e675db719d68d665efc0f3 ld/testsuite/ld-ifunc/ifunc-2-x86-64.d +1c39b0c1b74d581411debed0c6eb67e6 ld/testsuite/ld-ifunc/ifunc-2-x86-64.s +cec051f23f977dd374cdf989a646d79d ld/testsuite/ld-ifunc/ifunc-3-x86.s +31905fb416818a1606133ae70d675464 ld/testsuite/ld-ifunc/ifunc-3a-x86.d +6e0c8a146aeb44cdd145452d5884e9e3 ld/testsuite/ld-ifunc/ifunc-3b-x86.d +330efae2c2c55b0bb8cd97893a7768cb ld/testsuite/ld-ifunc/ifunc-4-local-x86.d +0d74f7f1a3e809fa3c19babc8e826e2e ld/testsuite/ld-ifunc/ifunc-4-local-x86.s +330efae2c2c55b0bb8cd97893a7768cb ld/testsuite/ld-ifunc/ifunc-4-x86.d +24e5b658bf605597f36312d4d57c1d52 ld/testsuite/ld-ifunc/ifunc-4-x86.s +46a17e657ce4e8c7105e7f96aeb8809d ld/testsuite/ld-ifunc/ifunc-4a-x86.d +b6f602ca474976d6c3a5f501303fa026 ld/testsuite/ld-ifunc/ifunc-5-i386.s +19fe7c13fb1d09f10a797eb2ef7b614a ld/testsuite/ld-ifunc/ifunc-5-local-i386.s +34166ca01692e76c29f009ceb28cf455 ld/testsuite/ld-ifunc/ifunc-5-local-x86-64.s +cb32ce224186652e3e17cc21090aa914 ld/testsuite/ld-ifunc/ifunc-5-x86-64.s +4c7e11d13f7849ad3843d8c5843e1dec ld/testsuite/ld-ifunc/ifunc-5a-i386.d +68b83eafc3e282540f275a94ef698316 ld/testsuite/ld-ifunc/ifunc-5a-local-i386.d +00d3f6b3a8d2647bf9caab9474572c4f ld/testsuite/ld-ifunc/ifunc-5a-local-x86-64.d +ab6453df0fcce699fa14e3f16ac08764 ld/testsuite/ld-ifunc/ifunc-5a-x86-64.d +40a7b582f5f0ae2d19ddaafe9eaa9d97 ld/testsuite/ld-ifunc/ifunc-5b-i386.d +6d16ccf06c97a5c7727e397aa7bfcfbc ld/testsuite/ld-ifunc/ifunc-5b-local-i386.d +103356fa54f7510ebb11e1796d3fe237 ld/testsuite/ld-ifunc/ifunc-5b-local-x86-64.d +3d1a94dda9922568a16ad8b32c3664b9 ld/testsuite/ld-ifunc/ifunc-5b-x86-64.d +0a6d3eff262d42539ba730775a9b40e2 ld/testsuite/ld-ifunc/ifunc-5r-local-i386.d +a4c4f736d7099b3cd5aaf89d1d354677 ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d +c33bd20b84debeef306fbac51829d907 ld/testsuite/ld-ifunc/ifunc-6-i386.s +fcb22cf8a1f82a48942ed7db399e8991 ld/testsuite/ld-ifunc/ifunc-6-x86-64.s +9e9cddc515d5c76e1d37ada15625ac4f ld/testsuite/ld-ifunc/ifunc-6a-i386.d +dd69dff6d6f29a2fb47fb84bef86d39e ld/testsuite/ld-ifunc/ifunc-6a-x86-64.d +aa56268b6d3699099403c9671116b33b ld/testsuite/ld-ifunc/ifunc-6b-i386.d +982979daf8108fdd178362630417119a ld/testsuite/ld-ifunc/ifunc-6b-x86-64.d +d2bc7a98e1ad3f5facb4df516e58643f ld/testsuite/ld-ifunc/ifunc-7-i386.s +6e017e80c10f7b0ceb5e6d93357a836a ld/testsuite/ld-ifunc/ifunc-7-x86-64.s +b0367de66362fb419d7d15833b4171ed ld/testsuite/ld-ifunc/ifunc-7a-i386.d +ad222808f38f3f529802c8bfd986c915 ld/testsuite/ld-ifunc/ifunc-7a-x86-64.d +f071da74779f564eb421eaf7ee0f294c ld/testsuite/ld-ifunc/ifunc-7b-i386.d +2509498bbd43a843b1912cefd2b9d3e9 ld/testsuite/ld-ifunc/ifunc-7b-x86-64.d +a08d86190092c51c1e03fab075dfdda6 ld/testsuite/ld-ifunc/ifunc-8-i386.d +8ceeb8e10866511cd86eff1fc0de5c3b ld/testsuite/ld-ifunc/ifunc-8-x86-64.d +ff52b26ccf21a1a818028ec0c49d21b0 ld/testsuite/ld-ifunc/ifunc-8a-i386.s +c33bfa83931c45521c6e26ea02d5210c ld/testsuite/ld-ifunc/ifunc-8a-x86-64.s +4b342a6f2f139f8ee1cdd8467c882b33 ld/testsuite/ld-ifunc/ifunc-8b-i386.s +4b342a6f2f139f8ee1cdd8467c882b33 ld/testsuite/ld-ifunc/ifunc-8b-x86-64.s +44a06231c791259992a3a242397c2b69 ld/testsuite/ld-ifunc/ifunc-9-x86.d +b8920736ffb9e4c897a1c81ab98b35f0 ld/testsuite/ld-ifunc/ifunc-9-x86.s +d12ae37b8e1f5b9019c1e3e2afb8153f ld/testsuite/ld-ifunc/ifunc.exp +8a7b88909ed4d84e3d7f3062637e9b79 ld/testsuite/ld-ifunc/lib.c +701455d51e8774d020b357d1c3b38367 ld/testsuite/ld-ifunc/prog.c +a6407fc06c5f396064f2b3438cdbc266 ld/testsuite/ld-ifunc/test-1.c +b5cd1bbd02a9b99f7f210a24255ffd0c ld/testsuite/ld-ifunc/test-2.c +5e692e5e97c771d0e2e5048b44fd0854 ld/testsuite/ld-libs/lib-1.s +ebb73d4ce0e23c5f2bd2771f10f3505b ld/testsuite/ld-libs/lib-2.d +dbb96155f844adc2ad44b4cb85c1fd97 ld/testsuite/ld-libs/lib-2.s +fc7d5109e6b60e7d53e9cccb81d1d359 ld/testsuite/ld-libs/libs.exp +05a3d3ea0d652f9bc4bc1d813e085927 ld/testsuite/ld-linkonce/linkonce.exp +5193ef30618a2f1f3af9019b7f4f62de ld/testsuite/ld-linkonce/x.s +0f2ec669dedf9925f6ae0db3b1a43506 ld/testsuite/ld-linkonce/y.s +525c44e6b03ce4357317f7dd3731d299 ld/testsuite/ld-linkonce/zeroeh.ld +3402fd8f52353a44ac4a9011314bbdbf ld/testsuite/ld-linkonce/zeroehl32.d +d4849e6542dd8b7ca3142e235d2b144b ld/testsuite/ld-m68hc11/adj-brset.d +d064b67c8fa10a7c428de1ea6b9a1834 ld/testsuite/ld-m68hc11/adj-brset.s +23949bf947540228ba8d72007abbd334 ld/testsuite/ld-m68hc11/adj-jump.d +f8a56fc695e6ebcf52992449c5d76123 ld/testsuite/ld-m68hc11/adj-jump.s +f2536953f333e9c10fd61191bd035e1b ld/testsuite/ld-m68hc11/bug-1403.d +062e1dc7481f152c9b001e94f92b296a ld/testsuite/ld-m68hc11/bug-1403.s +f3d845900cf3e345e78e8c3bec1ba8d1 ld/testsuite/ld-m68hc11/bug-1417.d +4f8edafd4ad832f9189f7314a7b5f362 ld/testsuite/ld-m68hc11/bug-1417.s +9d7f22b8c0e82bbde0bac7d72d89c4f6 ld/testsuite/ld-m68hc11/bug-3331.d +6c76f540acdb2c2c1146f9445b6d85a7 ld/testsuite/ld-m68hc11/bug-3331.s +1a8ffcaad7f9e84c1a1d1bd304ad8557 ld/testsuite/ld-m68hc11/far-hc11.d +1361ee4f406e378eadeb5c629ba2d8a3 ld/testsuite/ld-m68hc11/far-hc11.s +8aa3bad7129045a65da13eb15c286a54 ld/testsuite/ld-m68hc11/far-hc12.d +abab65605cd8069cfb12e2bfb6ed0d7a ld/testsuite/ld-m68hc11/far-hc12.ld +c66bf3caa9a73d1c7af542339777d150 ld/testsuite/ld-m68hc11/far-hc12.s +062d67e556aa82cb73f9c74135511aed ld/testsuite/ld-m68hc11/link-hc12.s +21f1eac8547085190c61077bf5de4016 ld/testsuite/ld-m68hc11/link-hcs12.d +8f9300e38e9f0e03d41c02ab51a6fe94 ld/testsuite/ld-m68hc11/link-hcs12.s +1c5d08d78e010248731f156f853fa4c4 ld/testsuite/ld-m68hc11/m68hc11.exp +bdfe2be8c102635c96318d5b5a441e70 ld/testsuite/ld-m68hc11/relax-direct.d +4b6225fc6c3bd84cfb4756daa73871b0 ld/testsuite/ld-m68hc11/relax-direct.s +7d4b0b484e170fa223129467648ce61c ld/testsuite/ld-m68hc11/relax-group.d +5f6185c53d79c83c661fbf096788bf1b ld/testsuite/ld-m68hc11/relax-group.s +bd0d77a42707a1a30aa30a4d4cba1fce ld/testsuite/ld-m68k/got-1.d +cc5e380add576706205ea6d7ff57ea74 ld/testsuite/ld-m68k/got-1.s +c9743fc977113ae4f3981ea8bf789e03 ld/testsuite/ld-m68k/got-multigot-12-13-14-34-35-ok.d +64597ba24c8a3a527ab4d86cea9071db ld/testsuite/ld-m68k/got-multigot-14-ok.d +d1a55a1211bde7cc2542b745250bc4e0 ld/testsuite/ld-m68k/got-multigot-15-er.d +295cec24b15d83ee5ea92ddfb240602c ld/testsuite/ld-m68k/got-negative-12-13-14-34-ok.d +d73589a3a0e02601aa50066f14028cc1 ld/testsuite/ld-m68k/got-negative-12-13-14-35-er.d +295cec24b15d83ee5ea92ddfb240602c ld/testsuite/ld-m68k/got-negative-14-ok.d +681d4d181a9e9d1c1b34ebf47bdd8381 ld/testsuite/ld-m68k/got-negative-15-er.d +5d1e61d3323d8e159922912c824ac209 ld/testsuite/ld-m68k/got-single-12-ok.d +7603fdc8f523e8e5b1a2609688aa400f ld/testsuite/ld-m68k/got-single-13-er.d +be898d22bfd9f57e761859dee750a7ba ld/testsuite/ld-m68k/got-xgot-12-13-14-15-34-35-ok.d +4bcbba04fa72a8cf0c4d36e5cf41c655 ld/testsuite/ld-m68k/got-xgot-15-ok.d +3d66b1dcb169ee2296a57f40470d3d03 ld/testsuite/ld-m68k/isaa-mac.d +fd09cc020dd5e6330dfdc9b18283bc6d ld/testsuite/ld-m68k/isaa-mac.s +7788f747bf8978d7dd787ec4e3a64c4e ld/testsuite/ld-m68k/isaa-nodiv.s +70ebca0c69ece585152b92e085c7a2c4 ld/testsuite/ld-m68k/isaa.d +bc863c4af78043879d4732211b98990f ld/testsuite/ld-m68k/isaa.s +e1ea1dd9c58d7c05a5afa9ed9060a960 ld/testsuite/ld-m68k/isaaplus.d +59604ffeea6bd5959eebc26fcfca4007 ld/testsuite/ld-m68k/isaaplus.s +fbf6b20c03d4581ffadd57ad9d4b37df ld/testsuite/ld-m68k/isab-float.d +40046811c312fa8b71a312e12c0a9d70 ld/testsuite/ld-m68k/isab-float.s +4dc937ce9efa1cbfe790ec4319865ab9 ld/testsuite/ld-m68k/isab-nousp.s +00af175e146ef2a68df76cfebb4842b8 ld/testsuite/ld-m68k/isab.d +1941399b05bb80ea485c3ea8d1fba8ff ld/testsuite/ld-m68k/isab.s +c8ad52290dc7441c67fa1ff519a5da46 ld/testsuite/ld-m68k/m68k-got.exp +14c2b62e1ad6eb34f775d126fa1608aa ld/testsuite/ld-m68k/m68k.exp +f2230989919c0fb529bad36510c345d2 ld/testsuite/ld-m68k/merge-error-1a.d +d142e6a1ea2d9b2f64a0439381469c73 ld/testsuite/ld-m68k/merge-error-1a.s +dbcf9fdd939e827f4f1858c21dfa0e8c ld/testsuite/ld-m68k/merge-error-1b.d +d142e6a1ea2d9b2f64a0439381469c73 ld/testsuite/ld-m68k/merge-error-1b.s +336f5a8bee8267818dfe299f1fdf4a73 ld/testsuite/ld-m68k/merge-error-1c.d +1bf9feb7409956c01a54844d96a4bffd ld/testsuite/ld-m68k/merge-error-1d.d +2177520e7c8602f768de1624768bc451 ld/testsuite/ld-m68k/merge-error-1e.d +ea81ec679d10bdfb7d108ac2b9f7a14a ld/testsuite/ld-m68k/merge-ok-1a.d +4abb166e0b29817f7db4f89b7596fc84 ld/testsuite/ld-m68k/merge-ok-1b.d +6017935bb4fcfb908ca563c4d8b0e76c ld/testsuite/ld-m68k/merge-ok-1c.d +1748e88a9ed6471d81aaf84f8f11480f ld/testsuite/ld-m68k/merge.ld +86d0bd6729da092642038e3ba4125135 ld/testsuite/ld-m68k/plt1-68020.d +446754b2bdb238ef7e6f47acdcc42358 ld/testsuite/ld-m68k/plt1-cpu32.d +843ed92b08210cb34ef543decc158313 ld/testsuite/ld-m68k/plt1-empty.s +95b5c59d6c7572a1116b51c8d576799b ld/testsuite/ld-m68k/plt1-isab.d +40e382a0efaf53c44faf348d84cdc7e5 ld/testsuite/ld-m68k/plt1-isac.d +d76b655b64da150400465e7439eeb011 ld/testsuite/ld-m68k/plt1.ld +b4b0a11671663569fc42bc967928eaff ld/testsuite/ld-m68k/plt1.s +21a9da34bb8287450f9f555a65e648f8 ld/testsuite/ld-m68k/tls-def-1.d +32e644a0075a072f97f55ab5ca949e68 ld/testsuite/ld-m68k/tls-def-1.s +f2d632d504e939807d932a7e3757533e ld/testsuite/ld-m68k/tls-gd-1.d +365b9991f1c8d86f60a630da61fb3428 ld/testsuite/ld-m68k/tls-gd-1.d2 +d43277a919b054856cd85f8613256ab2 ld/testsuite/ld-m68k/tls-gd-1.d3 +8acb4be54e9fee56736afe1b4ed98fe1 ld/testsuite/ld-m68k/tls-gd-1.s +71bc92ab15ef0972288548b39ceb1aa8 ld/testsuite/ld-m68k/tls-gd-2.d +dee8f41e45f307bb18b81cd60b76d4b2 ld/testsuite/ld-m68k/tls-gd-2.s +ea47f7f63370018679732154c0be8d23 ld/testsuite/ld-m68k/tls-gd-3.d +c27927fb3d8790f40e5a4f1a1e77dd44 ld/testsuite/ld-m68k/tls-gd-3.s +ba928ec8b9212d44ec4cb469f5cf33b2 ld/testsuite/ld-m68k/tls-gd-ie-1.d +51230d2891dc4d2aafa75b9d9d5cd85c ld/testsuite/ld-m68k/tls-gd-ie-1.s +c6c19d50f1adf38984593e5f5451520a ld/testsuite/ld-m68k/tls-ie-1.d +2cb92a892bc92a77abef6336ba5bbf3c ld/testsuite/ld-m68k/tls-ie-1.s +50b3f81fc20aa4d8575dd10f2fb68b16 ld/testsuite/ld-m68k/tls-ld-1.d +8116727480004c58ce0214cbf6578e85 ld/testsuite/ld-m68k/tls-ld-1.s +0b2a3c63cb7f0e6a6393f77c6f496033 ld/testsuite/ld-m68k/tls-ld-2.d +b7323a3d641be4410896a46800c93169 ld/testsuite/ld-m68k/tls-ld-2.s +09e69e02f38846954cca2fa11957f2ac ld/testsuite/ld-m68k/tls-le-1.s +cc0dc2a05a96e8112c810ca453b05c07 ld/testsuite/ld-m68k/tls-main-1.d +cce0a9f3976a215a65ada87c775006b5 ld/testsuite/ld-m68k/tls-main-1.s +31387110658a3d1fa295871df8e7fe4d ld/testsuite/ld-m68k/tls-no-1.s +c466907d99c3f78545808a0e0e1a20e3 ld/testsuite/ld-mep/mep.exp +d20b99dce905a2312874fa91b13336f3 ld/testsuite/ld-mep/mep1.ld +1793b72c9eb6d9aba1a29c524673b1de ld/testsuite/ld-mep/mep1.s +eaab780bec027c6ef6ac334619ba2b18 ld/testsuite/ld-mips-elf/attr-gnu-4-0.s +b164f9c15b6a8b4c06a300710e728fdd ld/testsuite/ld-mips-elf/attr-gnu-4-00.d +863ad8cfba6fb8589a69ad00a90cea56 ld/testsuite/ld-mips-elf/attr-gnu-4-01.d +a183f9aeacdb839c9570848ea62877b4 ld/testsuite/ld-mips-elf/attr-gnu-4-02.d +3d26e1a9bdd16a3576c0ff42075721a6 ld/testsuite/ld-mips-elf/attr-gnu-4-03.d +13cf2bf7c8d4c906b47e8e98fbbc24d9 ld/testsuite/ld-mips-elf/attr-gnu-4-04.d +295bd66ae2d39f17210c3da92b24d5aa ld/testsuite/ld-mips-elf/attr-gnu-4-05.d +018b97f0a56402eb7f0edfcc26b8cd1d ld/testsuite/ld-mips-elf/attr-gnu-4-1.s +cc93c85d1686dafa0b5c435b1fee7a26 ld/testsuite/ld-mips-elf/attr-gnu-4-10.d +d0b748e08daab28b520a79ec87cb90dc ld/testsuite/ld-mips-elf/attr-gnu-4-11.d +6e817802a60026e48c4e3378e709049e ld/testsuite/ld-mips-elf/attr-gnu-4-12.d +3da861eed3fe21344d4b2c49810916a9 ld/testsuite/ld-mips-elf/attr-gnu-4-13.d +7e9c2cdf5ec01a659d2f59d45e9a4e91 ld/testsuite/ld-mips-elf/attr-gnu-4-14.d +070b8382d6efd13336a5a9f7ded3de2b ld/testsuite/ld-mips-elf/attr-gnu-4-15.d +eac9dfdfc46cc5dd33f029ec52ee6793 ld/testsuite/ld-mips-elf/attr-gnu-4-2.s +b610c8981ebcf1fec15126ac7bfeccef ld/testsuite/ld-mips-elf/attr-gnu-4-20.d +1a5e16d50a54250400809fbf9e06783a ld/testsuite/ld-mips-elf/attr-gnu-4-21.d +817ac60707ec06f10501520d8a734499 ld/testsuite/ld-mips-elf/attr-gnu-4-22.d +6c016688b2dfbc7357c868b789bb4c0f ld/testsuite/ld-mips-elf/attr-gnu-4-23.d +72a6905754eca80e73876a16fe59966f ld/testsuite/ld-mips-elf/attr-gnu-4-24.d +b3c2d69ab3d55c11d024f47dac76dcab ld/testsuite/ld-mips-elf/attr-gnu-4-25.d +7fd562a8f705fa9e3d082842773a9fd7 ld/testsuite/ld-mips-elf/attr-gnu-4-3.s +2cab259c1924ac7329f6f5ebba5d0588 ld/testsuite/ld-mips-elf/attr-gnu-4-30.d +205972f6d1a117960675cd65448502d0 ld/testsuite/ld-mips-elf/attr-gnu-4-31.d +889deb9006c21284a8a8d1920826ca48 ld/testsuite/ld-mips-elf/attr-gnu-4-32.d +f5b41bd73f8127f5def3a3a96bf6fe2e ld/testsuite/ld-mips-elf/attr-gnu-4-33.d +080c5281707b74db7fc2ccd811e79fc8 ld/testsuite/ld-mips-elf/attr-gnu-4-34.d +2d1f48cfe6cbbb0b81cb5e411d9ae4cd ld/testsuite/ld-mips-elf/attr-gnu-4-35.d +bd99d860c5949dcff583df0a100a0ab3 ld/testsuite/ld-mips-elf/attr-gnu-4-4.s +275e6f85cd22392edc20ccb85051dbc5 ld/testsuite/ld-mips-elf/attr-gnu-4-40.d +416240e316cfc790fd260645c90c80bd ld/testsuite/ld-mips-elf/attr-gnu-4-41.d +0f60ca57e348fe60fa213c9bcec4d0da ld/testsuite/ld-mips-elf/attr-gnu-4-42.d +e2e3335d240655d0b7012f2c920c3b29 ld/testsuite/ld-mips-elf/attr-gnu-4-43.d +8445e0be7fa62bf2092053d873aa0d4a ld/testsuite/ld-mips-elf/attr-gnu-4-44.d +90e19887141bf237b75245459136e874 ld/testsuite/ld-mips-elf/attr-gnu-4-45.d +45482e1b49bd87067a3336f5f3c22c8b ld/testsuite/ld-mips-elf/attr-gnu-4-5.s +92a344630c8ce051d1d15829aedfadd8 ld/testsuite/ld-mips-elf/attr-gnu-4-51.d +1e32a0a0418596e4b5f7a413d7c5a3da ld/testsuite/ld-mips-elf/branch-misc-1.d +6724eb67d96033cd62f6f0bbb0ba0357 ld/testsuite/ld-mips-elf/dyn-sec64.d +a2e54355612fa6e667578c480a23b2ba ld/testsuite/ld-mips-elf/dyn-sec64.ld +38213eb1f211f160b6ccc4e962fea3d7 ld/testsuite/ld-mips-elf/dyn-sec64.s +1187adc6c3afe730321bec7d7cfa8cb9 ld/testsuite/ld-mips-elf/eh-frame1-n32.d +aec5a394a5d64425e1a7d8d392a45606 ld/testsuite/ld-mips-elf/eh-frame1-n64.d +6533ce16a794d9ef136aa92cc3fe72c5 ld/testsuite/ld-mips-elf/eh-frame1.ld +e6e05cd9d53743932b95addc3b98a8d8 ld/testsuite/ld-mips-elf/eh-frame1.s +af9ffb598ffd241e5518223b8351ea66 ld/testsuite/ld-mips-elf/eh-frame2-n32.d +b82d1135c4cb8e6a0660e3aeca4f0567 ld/testsuite/ld-mips-elf/eh-frame2-n64.d +f675e0b8a1309bdc2c534f69597abc5f ld/testsuite/ld-mips-elf/eh-frame3.d +e1c0b3a142460f9e96bb95d86709a813 ld/testsuite/ld-mips-elf/eh-frame4.d +df75730bfb47ed23d00d0275a59fc88e ld/testsuite/ld-mips-elf/eh-frame5.d +c9d3ca0439a89dfe4bc3ab7145f30fbe ld/testsuite/ld-mips-elf/eh-frame5.ld +35773ee20ada8ff563ed5b30a96e76fc ld/testsuite/ld-mips-elf/eh-frame5.s +845d1331d4ff9abf9b039b5df0c5e9bf ld/testsuite/ld-mips-elf/elf-rel-got-n32.d +2f1a2aac8769aa32876e430a94b53f3b ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d +cbde251997630b9d83f7ef3505e886aa ld/testsuite/ld-mips-elf/elf-rel-got-n64.d +a8c10403e44be8caf8560c95471b3353 ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d +1437216c9c999f056a639d9d277761ac ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d +f781c834948bf54e9a88db3a1e4ccdb6 ld/testsuite/ld-mips-elf/elf-rel-xgot-n64.d +1c056f99cf7b167a12a16c864667d56a ld/testsuite/ld-mips-elf/emit-relocs-1.d +68726c174e72036ac5088bf9b1f81f96 ld/testsuite/ld-mips-elf/emit-relocs-1.ld +9070e987231eb3b31f390146b225c6d6 ld/testsuite/ld-mips-elf/emit-relocs-1a.s +04aea5d092fa2db166839099d0bc5491 ld/testsuite/ld-mips-elf/emit-relocs-1b.s +54a45de7a7c51616578a54ecb6ef8c45 ld/testsuite/ld-mips-elf/got-dump-1.d +b8d3e047cf470489e6c153167577b516 ld/testsuite/ld-mips-elf/got-dump-1.ld +525b1ae7d8a1a97cc8f1bfcc6dc920f3 ld/testsuite/ld-mips-elf/got-dump-1.s +0f8c9b9c799944f80acb18a157e2d453 ld/testsuite/ld-mips-elf/got-dump-2.d +9fcd4b8fef5231301f105b69b472f41c ld/testsuite/ld-mips-elf/got-dump-2.ld +fa6b3d99eefa3a6aa98b71a637eefe35 ld/testsuite/ld-mips-elf/got-dump-2.s +6fcc05e871317e5207248b70d9705422 ld/testsuite/ld-mips-elf/got-page-1.d +a04d9e05c18665e618d7955d0144c4be ld/testsuite/ld-mips-elf/got-page-1.ld +f776dca2e6f11f44989f2005ecb58c2f ld/testsuite/ld-mips-elf/got-page-1.s +d1e4058580919ef3d515f1610569e646 ld/testsuite/ld-mips-elf/got-page-2.d +7798b57c7ebb2cab4e917c7e4b1cc989 ld/testsuite/ld-mips-elf/got-page-2.s +5e2545fe4e4a7f2876696a309f7a9cca ld/testsuite/ld-mips-elf/got-page-3.d +ed4f44b1dfbf7c5261938737527f3f7e ld/testsuite/ld-mips-elf/got-page-3a.s +1c026072dacc0d7337f714103bd5f946 ld/testsuite/ld-mips-elf/got-page-3b.s +0507b477c2a903398fa809ab11cdaf1d ld/testsuite/ld-mips-elf/got-page-3c.s +59ae2f3f0063c59ae3fbb5a7b4bdbf36 ld/testsuite/ld-mips-elf/got-vers-1.dd +bc27bd383137bf4d9952e46f5687659b ld/testsuite/ld-mips-elf/got-vers-1.rd +5b03f8316a8828f397651f1b1202d608 ld/testsuite/ld-mips-elf/got-vers-1.sd +5e8c20a9046a75510e6dcc5c44d828fd ld/testsuite/ld-mips-elf/got-vers-1.ver +1df2d1e1679f721b863066c708fde7e0 ld/testsuite/ld-mips-elf/got-vers-1a.s +c5f62e7b8a40978cfca1c566b1c91d0e ld/testsuite/ld-mips-elf/got-vers-1b.s +801d14a6810ebae1f5eefda4bac2a4d8 ld/testsuite/ld-mips-elf/hash1.s +5b31b1eb31a18306ebe610d93aaa547c ld/testsuite/ld-mips-elf/hash1a.d +e0e0a1c03d1c09706bb585fa0b7607b4 ld/testsuite/ld-mips-elf/hash1b.d +4099340571fa39b3c75cf24ea3bab07d ld/testsuite/ld-mips-elf/hash1c.d +fa9a8631c53e918392527840fab7e3b6 ld/testsuite/ld-mips-elf/jalbal.d +f37571577f21fbd2380b2d67bec2003c ld/testsuite/ld-mips-elf/jalbal.s +1e46ae19324e1987c86e98f4d23952d2 ld/testsuite/ld-mips-elf/jaloverflow-2.d +0f97678bd905b0f04380729e167f36ba ld/testsuite/ld-mips-elf/jaloverflow-2.s +3e51ac18ee129575a0a23f91113cf311 ld/testsuite/ld-mips-elf/jaloverflow.d +00610e4306ae3ff6e932f3554c8bbb0c ld/testsuite/ld-mips-elf/jaloverflow.s +1538f1355aa100216daf62bcbf585535 ld/testsuite/ld-mips-elf/jalx-1.d +2c106983bca32c56265a2e006793b712 ld/testsuite/ld-mips-elf/jalx-1.ld +624a4512f6e70a1e07a4af46a74b84f8 ld/testsuite/ld-mips-elf/jalx-1.s +9a24eb94b7e65a6dc1a373aad8d55341 ld/testsuite/ld-mips-elf/jalx-2-ex.s +93b27f7f26409214bf2834dc33f8e296 ld/testsuite/ld-mips-elf/jalx-2-main.s +6aaef432cfe83553dcf6814d5c74771a ld/testsuite/ld-mips-elf/jalx-2-printf.s +438cb0c7848d2350dcb0911f7adf442e ld/testsuite/ld-mips-elf/jalx-2.dd +25987c1715acb5400f204c95574a0cb7 ld/testsuite/ld-mips-elf/jalx-2.ld +8afcb555ac802fbc018887f8f4ae23d3 ld/testsuite/ld-mips-elf/jr-to-b-1.d +30792c630ceace95d660dde6e00dd8f2 ld/testsuite/ld-mips-elf/jr-to-b-1.s +432f84db6dae443d96e55bdcaf87963f ld/testsuite/ld-mips-elf/jr-to-b-2.d +016b338411caa57dffb40e8ef3431cf2 ld/testsuite/ld-mips-elf/jr-to-b-2.s +01cd283c225235f48e77375210951566 ld/testsuite/ld-mips-elf/jr.s +aab541cd224ffdc668cde05593710d3c ld/testsuite/ld-mips-elf/mips-dyn.ld +760db145de029bfc7dff35652e11585f ld/testsuite/ld-mips-elf/mips-elf-flags.exp +c35bd2fc7cf0d5dc9c9e56bec1e91404 ld/testsuite/ld-mips-elf/mips-elf.exp +368075c3db254e6302fcf5b9e9d1ec7d ld/testsuite/ld-mips-elf/mips-lib.ld +92f2128a15a5d4593d402ff9d7023bcd ld/testsuite/ld-mips-elf/mips16-1.d +bda3e92a35c420f4d0cf101be022eb7e ld/testsuite/ld-mips-elf/mips16-1a.s +785be539d405d32d87e61e6719da890d ld/testsuite/ld-mips-elf/mips16-1b.s +440ab43a0b0b2ee2de48388555a628f8 ld/testsuite/ld-mips-elf/mips16-and-micromips.d +7c0dc0f214de744dfb19ad53e6d15562 ld/testsuite/ld-mips-elf/mips16-call-global-1.s +261041546ae359e0cc90968f8ded97c8 ld/testsuite/ld-mips-elf/mips16-call-global-2.s +83396521c10e6e0eaa1894df2fdb4837 ld/testsuite/ld-mips-elf/mips16-call-global-3.s +bb7450279b5abaafc0cf67515d6bbeb1 ld/testsuite/ld-mips-elf/mips16-call-global.d +e692a3c6a1d69cb438a1e5c1868af8f0 ld/testsuite/ld-mips-elf/mips16-hilo-n32.d +09cde5e4cfc3ffba30c68e880df660d3 ld/testsuite/ld-mips-elf/mips16-hilo.d +545fcec307a4e45f2b26b40ce0700269 ld/testsuite/ld-mips-elf/mips16-hilo.ld +b3e4b204fc6c603a0ea6eb1ce3c29fae ld/testsuite/ld-mips-elf/mips16-hilo.s +06d124f197762fbed190c66d11bc6921 ld/testsuite/ld-mips-elf/mips16-intermix-1.s +8646625108bdd2dcc23ad1e1a5d501a7 ld/testsuite/ld-mips-elf/mips16-intermix-2.s +bdd2151726a6ac27b61020851bfc90e0 ld/testsuite/ld-mips-elf/mips16-intermix.d +dbecde5b6f77ded6a957039faf0f1067 ld/testsuite/ld-mips-elf/mips16-local-stubs-1.d +2241ceca1ee392127d41dbc282fbfa1d ld/testsuite/ld-mips-elf/mips16-local-stubs-1.s +81d37d76ce20ba52b220318eddd5e03f ld/testsuite/ld-mips-elf/mips16-pic-1-dummy.s +dfc2b6f52de2391e2e17693253d33e9e ld/testsuite/ld-mips-elf/mips16-pic-1.dd +c1e7ade5eafb7acd1602588df4c246a9 ld/testsuite/ld-mips-elf/mips16-pic-1.gd +49625eea24fe06727d25b1d58bca504b ld/testsuite/ld-mips-elf/mips16-pic-1.inc +ad35d0afe62d0d68963b08a08fd8ad32 ld/testsuite/ld-mips-elf/mips16-pic-1.ld +863b5b5184faaa52d04a96ad41cdc0f1 ld/testsuite/ld-mips-elf/mips16-pic-1a.s +5aa79de6989506714f0c1ac7b7eba4da ld/testsuite/ld-mips-elf/mips16-pic-1b.s +8e557fb7902b49ce9b26de7f8b85e34f ld/testsuite/ld-mips-elf/mips16-pic-2.ad +3dd7d7801ff75d5e6560e3160b6138e9 ld/testsuite/ld-mips-elf/mips16-pic-2.dd +3faf2dd2ece00efcf0e37044825927af ld/testsuite/ld-mips-elf/mips16-pic-2.gd +25c144f6871cc08cc46f488caac42d00 ld/testsuite/ld-mips-elf/mips16-pic-2.nd +cc3510c0142aff6f61ff5013f5843fcd ld/testsuite/ld-mips-elf/mips16-pic-2.rd +4ede35108518b6b38ff791576a5ef2cf ld/testsuite/ld-mips-elf/mips16-pic-2a.s +b912c77f560fdec4351994c7f9513d5e ld/testsuite/ld-mips-elf/mips16-pic-2b.s +b543eacce1d2bec3d10693f2055d2ace ld/testsuite/ld-mips-elf/mips16-pic-3.dd +842060d2f54ac6bcef9e9f0bea9b6dec ld/testsuite/ld-mips-elf/mips16-pic-3.gd +489813beddf523f1092a863c1708ac0b ld/testsuite/ld-mips-elf/mips16-pic-3.inc +121a964d1332fe5cc9add7791515ddf9 ld/testsuite/ld-mips-elf/mips16-pic-3.rd +a7e494cd288947d2c18fef7be4faebc8 ld/testsuite/ld-mips-elf/mips16-pic-3a.s +203c5259e6bfec00f0a0c8fb8553ce21 ld/testsuite/ld-mips-elf/mips16-pic-3b.s +46f23a15e7425e67aabacb465dab31e5 ld/testsuite/ld-mips-elf/mips16-pic-4.ver +c491ed165d94555361d6fab5d010db01 ld/testsuite/ld-mips-elf/mips16-pic-4a.dd +6e2b8bebe6cb536361b58a7f520a8ce0 ld/testsuite/ld-mips-elf/mips16-pic-4a.gd +4b0f332e30127295e94516f41ca78ba3 ld/testsuite/ld-mips-elf/mips16-pic-4a.nd +229965c1b80e1827c7e9b2e6bd080f23 ld/testsuite/ld-mips-elf/mips16-pic-4a.s +fa8e0bdd2a55b5385e0a4af39c21b510 ld/testsuite/ld-mips-elf/mips16-pic-4b.dd +9a6f8118e779f27cc3aa197cf3a2c608 ld/testsuite/ld-mips-elf/mips16-pic-4b.s +8ebf7377448e525d7f43a2bff0f51dbd ld/testsuite/ld-mips-elf/mips16-pic-4c.s +2d378cca3ffbc36424f9f2837589e911 ld/testsuite/ld-mips-elf/mode-change-error-1.d +d862a9d3c5154d7d8a0f685e9b500cfc ld/testsuite/ld-mips-elf/mode-change-error-1a.s +7155073aa28e0464fe88d592604e583b ld/testsuite/ld-mips-elf/mode-change-error-1b.s +ae026e1e5ffd2a267ebfe4d636059d42 ld/testsuite/ld-mips-elf/multi-got-1-1.s +547edd71875ed91b371f99af69c969fb ld/testsuite/ld-mips-elf/multi-got-1-2.s +6bd9212db2700881be03f65cdc1f60cb ld/testsuite/ld-mips-elf/multi-got-1.d +da39823dd9ec88c55b245d79fcbb19bc ld/testsuite/ld-mips-elf/multi-got-hidden-1.d +9eb8263a7b17cc5f8f3f268cab6fd731 ld/testsuite/ld-mips-elf/multi-got-hidden-1.s +0dfb48236919cce7fd8eb1d3aef98489 ld/testsuite/ld-mips-elf/multi-got-hidden-2.d +99c68de31a553ed4556f6440f19f8615 ld/testsuite/ld-mips-elf/multi-got-hidden-2.s +b0180cb7263b7943ec787e18ef17c0f5 ld/testsuite/ld-mips-elf/multi-got-no-shared-1.s +ce39cc1939c286dd4991e0cfb54f9304 ld/testsuite/ld-mips-elf/multi-got-no-shared-2.s +efbed788948cb30382ba0515961aad34 ld/testsuite/ld-mips-elf/multi-got-no-shared.d +30a8a2f767dd0f081b746172c00544d5 ld/testsuite/ld-mips-elf/no-shared-1-n32.d +c01d7a4c05171314b95ddfd8a7807f74 ld/testsuite/ld-mips-elf/no-shared-1-n64.d +75f385bfa7b2c0ea116ab7dfd9c9d0e7 ld/testsuite/ld-mips-elf/no-shared-1-n64.s +aadfbb91d834f9dea1576463eb929f1e ld/testsuite/ld-mips-elf/no-shared-1-o32.d +a60f9d4df6e56988bab95b2e313efbc0 ld/testsuite/ld-mips-elf/no-shared-1-o32.s +9a0eb2758e0aeb72d632e46fb01f9fd4 ld/testsuite/ld-mips-elf/no-shared-1.ld +b349d3e330560678a5e33c7dab0433f7 ld/testsuite/ld-mips-elf/pic-and-nonpic-1-rel.dd +e53d909c95b7ecefacb3a8f7161cc866 ld/testsuite/ld-mips-elf/pic-and-nonpic-1-rel.nd +5f361d6c916ff126b290651084d08fe6 ld/testsuite/ld-mips-elf/pic-and-nonpic-1.dd +2e247c0a2b5057df818fcd3d0556982d ld/testsuite/ld-mips-elf/pic-and-nonpic-1.ld +6df59b03045bb5d0e4e98907336897bf ld/testsuite/ld-mips-elf/pic-and-nonpic-1.nd +636df59b96847177efff7e4dbf85fe12 ld/testsuite/ld-mips-elf/pic-and-nonpic-1a.s +8f8066be39378af8ecd26b5d8ac11753 ld/testsuite/ld-mips-elf/pic-and-nonpic-1b.s +35d5a8331571e5d69489dd665ece02ff ld/testsuite/ld-mips-elf/pic-and-nonpic-2.d +0234a0ddb572718f66bae8d63fc6d021 ld/testsuite/ld-mips-elf/pic-and-nonpic-2a.s +6764e6db67e3a914ad463c69f2915f86 ld/testsuite/ld-mips-elf/pic-and-nonpic-2b.s +326ab1fd4f743f19e06207587fb1ab7e ld/testsuite/ld-mips-elf/pic-and-nonpic-3-error.d +7ed0f6f4892ec292b505a22877575215 ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.dd +4df312642c14c7d3bdf98c604d5c97b6 ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.gd +06a5efd6ffd2d5633435531309eaf936 ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.ld +ed84c5b0970802fd5cc5c1d58892c646 ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.s +5dbd2e45c4dd3c3c5dc4a73e5effc8a7 ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.sd +e5233a5bca870fc6f5452a9a175b94ef ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ad +3076d15d6c14e03911b70a8d9b2b6023 ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.dd +9a72343289dbd65e5b1f8626fba1992d ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.gd +575fea85123a8c2803e6cfe73aadea02 ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ld +99e1951a1a3cdfdfd3f928c10fe220c9 ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.nd +a62c39fed21d31568febb508114eedce ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.pd +888172a03e85765eeca2c9aae3b2b9f7 ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.rd +ebfedb2c710e4bc2d7114f3615babf07 ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.s +be1b9b9a4a7a7db1453b66c93484ad0a ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.sd +67d0fe8c82542da8c2e095051647ed6a ld/testsuite/ld-mips-elf/pic-and-nonpic-4-error.d +c5beb74efb5aab7afb9cd4179bc54ed6 ld/testsuite/ld-mips-elf/pic-and-nonpic-4a.s +41ffc74513f399800903d28bd0fd726c ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ad +c94b0c21bf21e4f106db3e3b83263a77 ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.dd +788c0d0e591998726ecc5518ab48488d ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.gd +1986c5ae746dd9168359eb2f172b4590 ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ld +32f332d8fee124c1be3ea91206b9e23c ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.nd +39731da008f5bb0a2bb0c77802a0370a ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.rd +eaf6964fc9fa4386f24c396a561f9a0f ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.s +a364f769d45910b0bfc71fccee583053 ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.sd +98398b97dd636c86168f01e369af97d5 ld/testsuite/ld-mips-elf/pic-and-nonpic-5a.s +be45e58a2b688c1cc6cdd351a316d75b ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ad +3488ff77fadbcbc985e404479884c659 ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.dd +1603051c5bb87ab95bb42bb0e3e78a82 ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.gd +02e4fadf6cae47bd2b71ff68c831ece4 ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ld +93ebab355919ce36b53b4d3fad38e600 ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.nd +c0561a7f93214272ba5a10ad0eb58f28 ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.pd +43e52f191e4bf227cc00c4dcc4ed1ba7 ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.rd +4def8c8a21ee2da9282483648295fd88 ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.s +1f59d8393264a23e75648fd64f332dcf ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.sd +830a2fbfb96054d5b6816f42c946f580 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.ad +64f9532f113d349bc895577f6e5ef3e9 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.dd +7a5634a4e2ea01989208cb48f32a8d8e ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.gd +3bf64cf9feb417fbd8c9999f2e467e3c ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.nd +ad99d90f41c2c466855f2632fb06c209 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.pd +d6b199287e84a6690bcba1fe9203ab52 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.rd +8aaa1d586c63c85d8901aed5d53b5e33 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.sd +34dd5961805d999d712253770313d077 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32a.s +bb52fe4127e0c17d6de7e6ead15511c4 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32b.s +3d69c8ab5a72235e7b60bb18f8f40b15 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s +377485f8e8164931b1d04e7c3a2fe543 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.ad +f3094954aa7472f0d4fe695159938882 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd +0011c68b572e93e49d96a05ff81a93e7 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.gd +6ae475c23b08901a546b6753ba4cbc7f ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.nd +a78f62b8afe08a2be5646bdfd9f25ceb ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.pd +78690a72d4db7b219a4405edf2aaf39c ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.rd +030ad44ee088b245c526bb1cb8ecfdae ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.sd +34dd5961805d999d712253770313d077 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64a.s +103c17ccd1c838002f3de6e9803012d9 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64b.s +3d69c8ab5a72235e7b60bb18f8f40b15 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s +830a2fbfb96054d5b6816f42c946f580 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.ad +1f143938c970a5143219dc4c7cf3dc3f ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.dd +7a5634a4e2ea01989208cb48f32a8d8e ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.gd +3bf64cf9feb417fbd8c9999f2e467e3c ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.nd +ad99d90f41c2c466855f2632fb06c209 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.pd +d6b199287e84a6690bcba1fe9203ab52 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.rd +8aaa1d586c63c85d8901aed5d53b5e33 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.sd +34dd5961805d999d712253770313d077 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32a.s +c77015d0f24de1fcbaa8a703ce6f3479 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32b.s +3d69c8ab5a72235e7b60bb18f8f40b15 ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s +a63578b0085dfd84d8e6f929f44c1eeb ld/testsuite/ld-mips-elf/pic-and-nonpic-6.ld +7520418cc156dc2eb353a7c527d0b7bc ld/testsuite/ld-mips-elf/region1.d +8bddba546baafcfd0c720e84198b224a ld/testsuite/ld-mips-elf/region1.t +19a77e97e16088a5a83b3916b5c9406f ld/testsuite/ld-mips-elf/region1a.s +dbaca5ab0c56146533bcb91837e1ec4c ld/testsuite/ld-mips-elf/region1b.s +d70bf451f5570cc8a71f1b92aab421d2 ld/testsuite/ld-mips-elf/rel32-n32.d +0b2322ea91cf1abe07305e4afaacc2d7 ld/testsuite/ld-mips-elf/rel32-o32.d +ddaac36abb5634e6b2fd1ed710875f2a ld/testsuite/ld-mips-elf/rel32.s +c7aebba022efb0ce03977ce3ef07d756 ld/testsuite/ld-mips-elf/rel64.d +36bb8fc0b193491dbdcab5452d411825 ld/testsuite/ld-mips-elf/rel64.s +37f70b74c9562c8a28c72145a36a9893 ld/testsuite/ld-mips-elf/relax-jalr-n32-shared.d +ee55093b6504613d255c4fd06ff46d20 ld/testsuite/ld-mips-elf/relax-jalr-n32.d +c9b07aa5eb8bc72ee659dd6aded85554 ld/testsuite/ld-mips-elf/relax-jalr-n64-shared.d +73f2e464c48afdd595353e7de102e014 ld/testsuite/ld-mips-elf/relax-jalr-n64.d +f5a605435fe5054c5d7563852b8f52c6 ld/testsuite/ld-mips-elf/relax-jalr.s +3e150097276b85ca1b466977321bd2eb ld/testsuite/ld-mips-elf/reloc-1-n32.d +7d89dbf41e9f1db0ec7acf3a45ab20ea ld/testsuite/ld-mips-elf/reloc-1-n64.d +616ac739ba5a655d578f1d1962761589 ld/testsuite/ld-mips-elf/reloc-1-rel.d +35fedd85b8edee7ba5015139e03d7345 ld/testsuite/ld-mips-elf/reloc-1a.s +db2a8158231f72fdc62917388227398c ld/testsuite/ld-mips-elf/reloc-1b.s +ca8216c82884ad811b7edb3e9fbe9d72 ld/testsuite/ld-mips-elf/reloc-2.d +ea87f337407d724f0873ca78cf340d58 ld/testsuite/ld-mips-elf/reloc-2.ld +0adb1722a72e9a9a054f9a6b92b56e8d ld/testsuite/ld-mips-elf/reloc-2a.s +f051089b05fc01590658e2bc45fa6cf1 ld/testsuite/ld-mips-elf/reloc-2b.s +299f6c59760876195ff15972265c1c64 ld/testsuite/ld-mips-elf/reloc-3-n32.d +30b4b2b4144a328e31d9ceebfc7c4e3f ld/testsuite/ld-mips-elf/reloc-3.d +3ac472addfc5eb7cb6ec433e5644e6b4 ld/testsuite/ld-mips-elf/reloc-4.d +d9d108ea9d1774ea9146f17ec8820099 ld/testsuite/ld-mips-elf/reloc-4.s +f1dd265eb61abcd9887f645d33a22134 ld/testsuite/ld-mips-elf/reloc-5.d +69f27006c1fefb9a60d0b877402a74ef ld/testsuite/ld-mips-elf/reloc-5.s +5ecb4e10cfd2f6b4de9ee74c1ea2c975 ld/testsuite/ld-mips-elf/reloc-6a.s +e1fdd53bd7febfd655245d57cdaf8962 ld/testsuite/ld-mips-elf/reloc-6b.s +819a1ac49e774ccc8b68332aed02026e ld/testsuite/ld-mips-elf/reloc-estimate-1.d +32f73a472ac5388b9e5554712552cd10 ld/testsuite/ld-mips-elf/reloc-estimate-1.ld +6263ce38363c899a10f2cd9c833103ae ld/testsuite/ld-mips-elf/reloc-estimate-1a.s +c5f62e7b8a40978cfca1c566b1c91d0e ld/testsuite/ld-mips-elf/reloc-estimate-1b.s +5e53d69afb16b0aa1111842113ab9a4d ld/testsuite/ld-mips-elf/reloc-merge-lo16.d +9053fa49eb5a350f5eb6ff68429b4b1c ld/testsuite/ld-mips-elf/reloc-merge-lo16.ld +ca0f2383e1abaa4194db6d328616a283 ld/testsuite/ld-mips-elf/reloc-merge-lo16.s +1d6f7a3dc089864de5e234e81880f984 ld/testsuite/ld-mips-elf/stub-dynsym-1-10000.d +88f241289f9c5dbb15595f56e3bcbf6e ld/testsuite/ld-mips-elf/stub-dynsym-1-2fe80.d +82b76bfd94c016f538e5a45536840144 ld/testsuite/ld-mips-elf/stub-dynsym-1-7fff.d +019989e23ec375399af67c17ec061cd1 ld/testsuite/ld-mips-elf/stub-dynsym-1-8000.d +ace95ceba6066d15c02d749bccb5c35a ld/testsuite/ld-mips-elf/stub-dynsym-1-fff0.d +17472fd6bd43f7e0a0bbee7bec4b56d1 ld/testsuite/ld-mips-elf/stub-dynsym-1.ld +771e5b7a77527a92c59bb09aacc2245b ld/testsuite/ld-mips-elf/stub-dynsym-1.s +593b58531898d49f21950b0f1cb0028e ld/testsuite/ld-mips-elf/textrel-1.d +5018b9cc7ffa201db975a01c554aa5d3 ld/testsuite/ld-mips-elf/textrel-1.s +3366b6a082b650516fd6734b3f96d391 ld/testsuite/ld-mips-elf/tls-hidden2-got.d +d0d03e116e69348f69f764e7cf07f65c ld/testsuite/ld-mips-elf/tls-hidden2.d +8da4ca44d8d4d64da2f924f77f16ebff ld/testsuite/ld-mips-elf/tls-hidden2a.s +28ebb08fa8f0f0384c6f6e94b017b6c4 ld/testsuite/ld-mips-elf/tls-hidden2b.s +17a7c0117e9da22a28096e807e8f7a1a ld/testsuite/ld-mips-elf/tls-hidden3.d +32e7a2e0848cd82eec644f4a53f3d82f ld/testsuite/ld-mips-elf/tls-hidden3.got +4eeb160900459146ef2406dac1677b38 ld/testsuite/ld-mips-elf/tls-hidden3.ld +987684d120f6213287cfe205e0bd173b ld/testsuite/ld-mips-elf/tls-hidden3.r +596cb16541a279aea4116f695673985c ld/testsuite/ld-mips-elf/tls-hidden3a.s +29d61123d595b387ed26211c5aeac27d ld/testsuite/ld-mips-elf/tls-hidden3b.s +59bff5c0e2b3a11aa1872751d5200f00 ld/testsuite/ld-mips-elf/tls-hidden4.got +6605a99a8dccc8e3b31db4d74deff5a7 ld/testsuite/ld-mips-elf/tls-hidden4.r +18ce86b8cf6084e6197d64c86b95d9ad ld/testsuite/ld-mips-elf/tls-hidden4a.s +bb0771146a19efa38c6dbab03a6677c5 ld/testsuite/ld-mips-elf/tls-hidden4b.s +dcf6ae3878ee8bbe288194214b1cf4b8 ld/testsuite/ld-mips-elf/tls-multi-got-1-1.s +e27dfdf2d9f50b3a1c3405c0928464f9 ld/testsuite/ld-mips-elf/tls-multi-got-1-2.s +750508d078ee33a8416b8c61d31a6983 ld/testsuite/ld-mips-elf/tls-multi-got-1.d +41bea7f9e24f1cf8d870aec4a3173ca0 ld/testsuite/ld-mips-elf/tls-multi-got-1.got +586bb1ee2c39286e5309a52593be34cd ld/testsuite/ld-mips-elf/tls-multi-got-1.r +3e3447a7625350bcb3a358526e3153a1 ld/testsuite/ld-mips-elf/tlsbin-o32.d +c86a9ef2529736cdad96e9ca05707688 ld/testsuite/ld-mips-elf/tlsbin-o32.got +c792434d81806a231d8c427cb4080159 ld/testsuite/ld-mips-elf/tlsbin-o32.s +5e0d7ec5909fe5c8c577a04021165e39 ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d +c42a07f58b0fe77cd7af1f56818a28f2 ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got +530965bd6a985f0e94ecd0855dd5625d ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d +b2f5027a892621ff983a13f2c3240f5b ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got +fbdeab37b3ee0ec10ee1ef69f15c2fff ld/testsuite/ld-mips-elf/tlsdyn-o32-2.s +00e982c2e86055bb322802c5add3c93c ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d +cc5c4d0ef65b6c81033d3d7769c8f29f ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got +b5d101e6cbeb4474a32c50f41d3d1ad8 ld/testsuite/ld-mips-elf/tlsdyn-o32.d +1697af6e7fa1e547babbba1eedf80a32 ld/testsuite/ld-mips-elf/tlsdyn-o32.got +2f7c87e5cb0941155de927c09a22f82a ld/testsuite/ld-mips-elf/tlsdyn-o32.s +e04425f26450dde17dc78fd219a95744 ld/testsuite/ld-mips-elf/tlslib-hidden.ver +70026058b0f598790d0b531c5982fb07 ld/testsuite/ld-mips-elf/tlslib-o32-hidden.got +6d6da92087e5b37926abe8594d6b9175 ld/testsuite/ld-mips-elf/tlslib-o32-ver.got +f486d96c706505877702cf6738edd6c4 ld/testsuite/ld-mips-elf/tlslib-o32.d +f129dd016866df5151e6306b69af6f09 ld/testsuite/ld-mips-elf/tlslib-o32.got +73d7902bba1b0277980dd7077187132d ld/testsuite/ld-mips-elf/tlslib-o32.s +e79ddbda95735cce0f98745385b37e44 ld/testsuite/ld-mips-elf/tlslib.ver +2836095ce053cfc7a2375672903484a6 ld/testsuite/ld-mips-elf/undefined.d +74e832da3c27e918dcc12f23c88d7653 ld/testsuite/ld-mips-elf/undefined.s +c28e9ba79d2a44a6345b6091aff6964c ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d +575c413b96d44bb8ec8ff7ac576ed0d8 ld/testsuite/ld-mips-elf/vxworks-forced-local-1.s +73733e00bc2f549dd17e11ddcf5977a5 ld/testsuite/ld-mips-elf/vxworks-forced-local-1.ver +135c05a549bb6dad013ee2ad7266feeb ld/testsuite/ld-mips-elf/vxworks1-lib.dd +b074b2bbf5dfaf1b0c748786aaa5d748 ld/testsuite/ld-mips-elf/vxworks1-lib.nd +5f45b6c9413d7836dfca685969f1955b ld/testsuite/ld-mips-elf/vxworks1-lib.rd +32b8872e821ae6654c0b8b93831b090b ld/testsuite/ld-mips-elf/vxworks1-lib.s +6dbdc5d4346169b9a3af98707d77be72 ld/testsuite/ld-mips-elf/vxworks1-lib.td +2430b3e2167b5d1d1b8d6a75435a9522 ld/testsuite/ld-mips-elf/vxworks1-static.d +45ff6994e80bfdd76f565ab15bd740fc ld/testsuite/ld-mips-elf/vxworks1.dd +6eda7ca5e2b8a998f716b2914d22ca4c ld/testsuite/ld-mips-elf/vxworks1.ld +d2de293548a76b5b287297fa26f82bdb ld/testsuite/ld-mips-elf/vxworks1.rd +82bc233897ef8651545c08a78fc4199a ld/testsuite/ld-mips-elf/vxworks1.s +165ed1561458c0973255f985be876845 ld/testsuite/ld-mips-elf/vxworks2-static.sd +d0f1c70f160b4a40447679957bb43902 ld/testsuite/ld-mips-elf/vxworks2.s +7afb4e2fc8be35ad985dcb2e21b7cbef ld/testsuite/ld-mips-elf/vxworks2.sd +75e57156fec82444f8b081057aa3dd34 ld/testsuite/ld-misc/defsym.exp +29b85abb584c499fb7c6e3c7d7c8d1ad ld/testsuite/ld-misc/defsym1.d +68b329da9893e34099c7d8ad5cb9c940 ld/testsuite/ld-misc/dummy.s +d3e2facb8eb14eb25571b0ba1978a5f2 ld/testsuite/ld-misc/foo.s +8b7d482ede3ffef086e697dc7758e45c ld/testsuite/ld-misc/start.s +29bbc00fcf8488cdcda5c967947c9abd ld/testsuite/ld-mmix/a.s +832fb8cae0b098878fed53d48e807ce5 ld/testsuite/ld-mmix/areg-256.s +92c2c53d6e192bf5692ce25b44285e67 ld/testsuite/ld-mmix/areg-t.s +9c3467333c3017bb3487458a63a6a443 ld/testsuite/ld-mmix/aregm.s +bbc12b910148056242b16ac06ffe658e ld/testsuite/ld-mmix/b-badfil1.d +5757a79cbdb495ad2ebdb65ae1baee63 ld/testsuite/ld-mmix/b-badfil1.s +d3539629793229e1bedc30fca7ebab4e ld/testsuite/ld-mmix/b-badfil2.d +4d945d415b8a0b5d0d1960ae0aad8dd5 ld/testsuite/ld-mmix/b-badfil2.s +6d361444d04985a9d6ffcd79ab0d9102 ld/testsuite/ld-mmix/b-badfixo.d +696b375abc32c3e05c78864742e8ed0f ld/testsuite/ld-mmix/b-badfixo.s +0ecd244dbb6bfba1aab4fd1c9ba36fed ld/testsuite/ld-mmix/b-badloc.d +ca07c72cc90fe7958c01e45d0b299c07 ld/testsuite/ld-mmix/b-badloc.s +03b06dbe7e50760382702f5cf5506e83 ld/testsuite/ld-mmix/b-badlop.d +c0eda3287e093d9baa1a9976fc611109 ld/testsuite/ld-mmix/b-badlop.s +cfa814a7c613f75d100f82cf82cd6082 ld/testsuite/ld-mmix/b-badm.d +bece4f048fbf06e4397d09a0e8cf3f84 ld/testsuite/ld-mmix/b-badm2.s +308e34a5c6526b3bc77c958a0be05e0f ld/testsuite/ld-mmix/b-badmain.s +d372faf0a14a0dfcc1553deb051f94db ld/testsuite/ld-mmix/b-badquot.d +27a23d67dc01f3c9ead4adb018ca1754 ld/testsuite/ld-mmix/b-badquot.s +3f655a8b08008f054fdfa2a96de54a40 ld/testsuite/ld-mmix/b-badrx1.d +b6dd30dc8691d22e1f65f4021f05c56b ld/testsuite/ld-mmix/b-badrx1.s +cb9c0accff2b737374ca055f980dbe13 ld/testsuite/ld-mmix/b-badrx2.d +93f541fd556713ab6d8d21db803d1b66 ld/testsuite/ld-mmix/b-badrx2.s +c379ff543ab01fedc4ad86f98bbb5273 ld/testsuite/ld-mmix/b-badrx3.d +bf429322a5db6134c31b0ad125e1fe47 ld/testsuite/ld-mmix/b-badrx3.s +5d616c70e041440600527855ebae7cae ld/testsuite/ld-mmix/b-bend.s +5ef90eb6d01c9c1e1f2a0d2262ae6b2e ld/testsuite/ld-mmix/b-bend1.d +43b9f66679d171e04c8cd8945a8c9072 ld/testsuite/ld-mmix/b-bend2.d +c6cded6f15b9f640cbdab924ee44c4e7 ld/testsuite/ld-mmix/b-bend3.d +19278040a3ad12dfbb86423a42ee4944 ld/testsuite/ld-mmix/b-bstab1.d +7f057b266c6e915c24c78e4914988a18 ld/testsuite/ld-mmix/b-bstab1.s +6648449ade42be2fa0b9bfd929d0be34 ld/testsuite/ld-mmix/b-fixo2.d +afd9d7783cf499b4bb54e673aa66cc9b ld/testsuite/ld-mmix/b-fixo2.s +c70f1e9df4056a081a049a5e574504b7 ld/testsuite/ld-mmix/b-goodmain.s +821bd78c586bcbbfcd74404cf57bb857 ld/testsuite/ld-mmix/b-loc64k.d +22737b84a0ff00ce8bbbac51ba455171 ld/testsuite/ld-mmix/b-loc64k.s +c6b46403437c6ee2562708fa1c475313 ld/testsuite/ld-mmix/b-nosym.d +38dd1c80284932429686552b07d13ffb ld/testsuite/ld-mmix/b-nosym.s +8d063312ad02da3debded99026386d32 ld/testsuite/ld-mmix/b-offloc.s +3f86c44e8b8817e5c663f2d27f3bd115 ld/testsuite/ld-mmix/b-post1.s +86f53aed3df4b314f3ed60fc1bc5390c ld/testsuite/ld-mmix/b-twoinsn.s +19e58b2f38b76337bcaf380353b8b083 ld/testsuite/ld-mmix/b-widec.s +be278fd0e2be7d211f9b9f01e9da153f ld/testsuite/ld-mmix/b-widec1.d +b5acafcf483d63a9f77a5bfd3aa6268c ld/testsuite/ld-mmix/b-widec2.d +c611d61d69d4f6525b97bf73f8ceb803 ld/testsuite/ld-mmix/b-widec2.s +b0e738d0cadbba73f2fcb8d0e5db1017 ld/testsuite/ld-mmix/b-widec3.d +538c648f35ef9b9744f3451d4b634614 ld/testsuite/ld-mmix/b-widec3.s +0e3bd5d365022be3c1548dd5777bfcaa ld/testsuite/ld-mmix/bpo-1.d +727b1769bece675574da8a7fe3fd7c78 ld/testsuite/ld-mmix/bpo-1.s +a4bc144eea63cbf4af7e585bd0edc95e ld/testsuite/ld-mmix/bpo-10.d +7806bfb4f80d0b995147abaef5043324 ld/testsuite/ld-mmix/bpo-10.s +57d5eda861d87af042f47186f145543a ld/testsuite/ld-mmix/bpo-11.d +6ffe6aa6c222b341fd60298d70f6c096 ld/testsuite/ld-mmix/bpo-11.s +77b4f4eb49346620239ae760d080a897 ld/testsuite/ld-mmix/bpo-12.d +8de7a3ef3b7bd942d63c83ee837ab9ef ld/testsuite/ld-mmix/bpo-12m.d +3dedc8a556ca8e2e36516b6d401573ec ld/testsuite/ld-mmix/bpo-13.d +548c55bffd4c89b7677633e176ce7642 ld/testsuite/ld-mmix/bpo-13m.d +02f65eea305cdd049de3449497f212a2 ld/testsuite/ld-mmix/bpo-14.d +c643669175f64da8335666d98707d371 ld/testsuite/ld-mmix/bpo-14m.d +8f6569e3f528d5faa6667c06e373d4e6 ld/testsuite/ld-mmix/bpo-15.d +98df5bb5f63901bb65b4da989825bee6 ld/testsuite/ld-mmix/bpo-15m.d +6ec318d675955648a56a6831e299dc72 ld/testsuite/ld-mmix/bpo-16.d +46c733f1f9d6891c280bd33a7a8ee49e ld/testsuite/ld-mmix/bpo-16m.d +85d2f23d3507c87f82c322191238a7be ld/testsuite/ld-mmix/bpo-17.d +2bd56eebb6f7f2557192b4218267e936 ld/testsuite/ld-mmix/bpo-17m.d +53defe5eff096dddb5b90166160c491f ld/testsuite/ld-mmix/bpo-18.d +75e497cf13bf228105b337ee5c9e4812 ld/testsuite/ld-mmix/bpo-18m.d +b997daa1845ef49de1c27ae192a667eb ld/testsuite/ld-mmix/bpo-19.d +2ab4fef8dc7d80065a78ea7b0e9ed0b3 ld/testsuite/ld-mmix/bpo-19m.d +b2f2ffc9ebee61c08b8536ee393bf60d ld/testsuite/ld-mmix/bpo-1m.d +60145581d35cf70b131bfb05287a92af ld/testsuite/ld-mmix/bpo-2.d +941fdc1afbccc34132056c79cffd53a7 ld/testsuite/ld-mmix/bpo-2.s +0fb61489c12f3b583e2c08ade6e8d653 ld/testsuite/ld-mmix/bpo-20.d +fffb35a7fced3331a800461bc1ce9094 ld/testsuite/ld-mmix/bpo-20m.d +5e8683bae8c6b6898f64e06e23abbccd ld/testsuite/ld-mmix/bpo-21.d +73573410160cb6b280768902b3043b90 ld/testsuite/ld-mmix/bpo-21m.d +c5d01652ee53ab129f2e03e352231dce ld/testsuite/ld-mmix/bpo-22.d +263c76b6afbb38eab584434d4d6c6c2b ld/testsuite/ld-mmix/bpo-2m.d +1b5307afa9a6f06cc02330c659d3365b ld/testsuite/ld-mmix/bpo-3.d +18a744b115278b7722c291d0ffb50d7f ld/testsuite/ld-mmix/bpo-3.s +bcdf1e512c4aee70c59fdd3660145af7 ld/testsuite/ld-mmix/bpo-3m.d +b780d689f2a2f70c22fd43aa91fef18b ld/testsuite/ld-mmix/bpo-4.d +27298e0392d3668044115ab5ab2d8f96 ld/testsuite/ld-mmix/bpo-4.s +dd0d4ed3e462ccc4d407b1bf742d14be ld/testsuite/ld-mmix/bpo-4m.d +8e5a3e3f230fc8f92300d241fd828acb ld/testsuite/ld-mmix/bpo-5.d +7dbb13569ce91e34215372124be85954 ld/testsuite/ld-mmix/bpo-5.s +ee7b15e113e1e43245843f5a67e4bd06 ld/testsuite/ld-mmix/bpo-5m.d +7df5351a845c3b49a88cc8e98bdbd6c9 ld/testsuite/ld-mmix/bpo-6.d +f2cceac4fc47fe392c8e4dc429f07561 ld/testsuite/ld-mmix/bpo-6.s +2d7d7f08884d9c6f8b665361608621a0 ld/testsuite/ld-mmix/bpo-6m.d +8bf2119bfa9a8f8ab1ad3a31ecc33e99 ld/testsuite/ld-mmix/bpo-7.d +2baded74ed785888b38d2327cf0b292c ld/testsuite/ld-mmix/bpo-7.s +973234218e86e5019e31fe579e3771f3 ld/testsuite/ld-mmix/bpo-7m.d +4015cf8cce9a13b50227b5182b063c63 ld/testsuite/ld-mmix/bpo-8.d +ebfa497b551fca4227045bd9c52591d7 ld/testsuite/ld-mmix/bpo-8.s +1cb46b3bff8a3455f444bf47be753ebe ld/testsuite/ld-mmix/bpo-8m.d +6a4bad3d3d3e7e47472c8bca3a180413 ld/testsuite/ld-mmix/bpo-9.d +e6417328f720ed4af73d532d5578d4dc ld/testsuite/ld-mmix/bpo-9.s +3f41674c05910b601b6428d93d075bf8 ld/testsuite/ld-mmix/bpo-9m.d +31df213f14a88392ba820c0d322b2bf1 ld/testsuite/ld-mmix/bpo64addr.ld +2f86e0f2ab9bdae57aa1cfff6e2bd250 ld/testsuite/ld-mmix/bspec1.d +819de3680e13af74f5cc05450ba88c45 ld/testsuite/ld-mmix/bspec1.s +9e65233ea9e683673fca19c9a7ac4146 ld/testsuite/ld-mmix/bspec1m.d +b5287dc1f7bb2c618fb338cd51552771 ld/testsuite/ld-mmix/bspec2.d +39f50619e3525dbc7bb1a57004fa7af8 ld/testsuite/ld-mmix/bspec2.s +2264252fbee703755ad9ef0a84805b6e ld/testsuite/ld-mmix/bspec2m.d +bf1d3c052201115389f9bf0d72b01dd1 ld/testsuite/ld-mmix/bspec801.s +11b7fccb5486483850799cc7f3531c75 ld/testsuite/ld-mmix/bspec802.s +22de3233920da1dfe5c1a59869059167 ld/testsuite/ld-mmix/bspec803.s +48aa9f881a98497446e5127b530cbc0b ld/testsuite/ld-mmix/bspec804.s +ef5ba77ef818567f2363a64a61136d07 ld/testsuite/ld-mmix/bspec805.s +17e99c51f9fa5ef8f9dbf96b77ceb859 ld/testsuite/ld-mmix/bspec806.s +f410482e950d36d3493dbde6ac0fa801 ld/testsuite/ld-mmix/bspec807.s +0ef3802570112a82a32152b8615812a1 ld/testsuite/ld-mmix/bspec808.s +a085e5ee962603b54dc4f79c8c194ee8 ld/testsuite/ld-mmix/bza-1b.d +14eb18f6d6f609ada3232e30185e6ecd ld/testsuite/ld-mmix/bza-1f.d +27f3762fa59df67c0890e5450cd4e2d5 ld/testsuite/ld-mmix/bza-2b.d +2dde578feed1feed4f3d2656dc5cc096 ld/testsuite/ld-mmix/bza-2f.d +89e214c7b44550c8c6e0516a73136d24 ld/testsuite/ld-mmix/bza-7b.d +bacb69bdb70ce627aa3b9616c163501d ld/testsuite/ld-mmix/bza-7f.d +6d9d599df19d65dd9733089fdcbd49ec ld/testsuite/ld-mmix/bza-8b.d +12f488f003ac547001f13eaaa119da19 ld/testsuite/ld-mmix/bza-8f.d +9da6a6460ebe9fa4649bf1066400630c ld/testsuite/ld-mmix/bza.s +1174557b17ce40bbf65d516763faa9f5 ld/testsuite/ld-mmix/data1.s +3c6cb0cb624868efe21dcb90b2a234ff ld/testsuite/ld-mmix/dloc1.s +139ef9ed9aeef66b603b49b28a4b7cd3 ld/testsuite/ld-mmix/dloc2.s +232026219508f7b71f6ee431840c6433 ld/testsuite/ld-mmix/ext1-254.s +3a7cd12a9f3c4885d04f1c0813847708 ld/testsuite/ld-mmix/ext1.s +7da77ff68e0bf805f728c01fe4970428 ld/testsuite/ld-mmix/ext1g.s +c00696319193078a3f54bee1e3c13245 ld/testsuite/ld-mmix/ext1l.s +f778d456be4ce9d20cc4f82b909cc799 ld/testsuite/ld-mmix/getaa-1b.d +81cbf4605355e835ff6909c9499c8932 ld/testsuite/ld-mmix/getaa-1f.d +4ac2b7156cc86e1da126405840d6a77c ld/testsuite/ld-mmix/getaa-2b.d +0171fc55ec2e6b96fa7449ded4308e9d ld/testsuite/ld-mmix/getaa-2f.d +ec5e997656fa82a54deace1a49af4006 ld/testsuite/ld-mmix/getaa-4b.d +4e33bb67a21b0925e2f67da6b497667a ld/testsuite/ld-mmix/getaa-4f.d +57065ae45a55d7b177b6c7e570143f37 ld/testsuite/ld-mmix/getaa-6b.d +fcb94cf8adc18ff997bb67111d93fd38 ld/testsuite/ld-mmix/getaa-6f.d +03d4176debdd643f4346b38381232e95 ld/testsuite/ld-mmix/getaa-7b.d +603f2f3a78e12c0e620b56e4af943053 ld/testsuite/ld-mmix/getaa-7f.d +6493dd727ad7957aa7cbd84f2042e569 ld/testsuite/ld-mmix/getaa-8b.d +3ea37a2af736602c0607e73aebf6f32b ld/testsuite/ld-mmix/getaa-8f.d +db60b0f96a0ecc05d8b34582430930cf ld/testsuite/ld-mmix/getaa.s +cd9b942d75b2cd9f16f3e2a97421cf30 ld/testsuite/ld-mmix/getaa12b.d +955393ce5664bd2add2eb31ba04ad921 ld/testsuite/ld-mmix/getaa12f.d +55735ac048b10ea2324d0dd89d4802bc ld/testsuite/ld-mmix/getaa14b.d +3a66b9fccc865bc6698401aec03638da ld/testsuite/ld-mmix/getaa14f.d +d15a667ae769b6fdb599e2fafcf18901 ld/testsuite/ld-mmix/greg-1.d +09bdeabfdc8bad2aa2102a69f2acec6c ld/testsuite/ld-mmix/greg-1.s +3e8753750bd03d1b8cc47973bf0c5fa8 ld/testsuite/ld-mmix/greg-10.d +52fbd6227f7f3e5728b8350c69d33742 ld/testsuite/ld-mmix/greg-11.d +6fe8e51b99e9625c021dc8b50da3f7e8 ld/testsuite/ld-mmix/greg-11b.d +c08a75bfc1dbf3d5076fc4e61dfcf362 ld/testsuite/ld-mmix/greg-12.d +7462e0377d376b0bd47753854a6a407f ld/testsuite/ld-mmix/greg-13.d +0f5ca7c06e9079441da2c7a84b922e76 ld/testsuite/ld-mmix/greg-14.d +7e20aba7bfc285ad4569f7dbf995f575 ld/testsuite/ld-mmix/greg-14s.d +172c9bc30b96bbc7f5d47dc3f2c3d7fb ld/testsuite/ld-mmix/greg-15.d +a3ff1f310992ee435c7e2635d8d29460 ld/testsuite/ld-mmix/greg-16.d +d01503c2c69d7f452f4eefacaa68899d ld/testsuite/ld-mmix/greg-17.d +b11ff19d10f01e1e3f56e46144a2221f ld/testsuite/ld-mmix/greg-18.d +467ea26fedbd20ac06f1f535006faa9a ld/testsuite/ld-mmix/greg-19.d +4547d19a8920b5f63dccc18e0b02b270 ld/testsuite/ld-mmix/greg-2.d +d32fe386de0bb7cbeae911f55b74f28c ld/testsuite/ld-mmix/greg-2.s +f7a8dad75521d024520597ea106b9aea ld/testsuite/ld-mmix/greg-20.d +13fe89a7dd43832d54cc0db06cb5b99d ld/testsuite/ld-mmix/greg-3.d +fd8c230efbb1e8e9644f278fc55956d1 ld/testsuite/ld-mmix/greg-3.s +620f140d5c613e86521a64ff9b30ff09 ld/testsuite/ld-mmix/greg-4.d +ca83717a845f3471de058678cd3d768d ld/testsuite/ld-mmix/greg-4.s +517a41ee10b02ecbe9842f014bc4a895 ld/testsuite/ld-mmix/greg-5.d +6480362111f72bcd1075662b96302bda ld/testsuite/ld-mmix/greg-5.s +9935d0deb3efa07e81f8b2c5a6b7380b ld/testsuite/ld-mmix/greg-5s.d +ce16f9bb5d81df7ab48c501599413eac ld/testsuite/ld-mmix/greg-6.d +418b000655af054b390b8bb2b874c60e ld/testsuite/ld-mmix/greg-7.d +59e0e7eb634040c0b9cbd93f668ccc98 ld/testsuite/ld-mmix/greg-8.d +d93fac49ebe47c54143f6d735cbd0d2b ld/testsuite/ld-mmix/greg-9.d +52303123f40dff47906913e8da9c286e ld/testsuite/ld-mmix/gregbza1.s +7f3142883e0933aff11c0c1cb95a77fa ld/testsuite/ld-mmix/gregget1.s +2cb7950e0a1953d2b987a9f8cc7c4512 ld/testsuite/ld-mmix/gregget2.s +e550195681ad09a232fe5aee1377329d ld/testsuite/ld-mmix/gregldo1.s +ca8df40c1626e176553bb89a9e763fdb ld/testsuite/ld-mmix/gregpsj1.s +9ab537a0341b7c4352c8611cceea62ef ld/testsuite/ld-mmix/hdr-1.d +947dee63abfc6e1d2189ad4fd9b66eb6 ld/testsuite/ld-mmix/jumpa-1b.d +d584fc102026b000a7fc6b96d9963230 ld/testsuite/ld-mmix/jumpa-1f.d +c40d746d73d8ea03d1af670cf0396d1a ld/testsuite/ld-mmix/jumpa-2b.d +e1307a32eda7c8432b3f989be35b6b8c ld/testsuite/ld-mmix/jumpa-2f.d +f0604395727a87a9f44e5f3a2022ae6f ld/testsuite/ld-mmix/jumpa-3b.d +de6787c0fa3a5822645c9842f381bcd9 ld/testsuite/ld-mmix/jumpa-3f.d +df9824fc96665a5167b94df1372d7d66 ld/testsuite/ld-mmix/jumpa-4b.d +414791dc7016ab49289b99a78cb6e102 ld/testsuite/ld-mmix/jumpa-4f.d +296124a282e0d1c7b934f6ed800ecdaa ld/testsuite/ld-mmix/jumpa-5b.d +beac115e902f66a613fbbf078136347b ld/testsuite/ld-mmix/jumpa-5f.d +130046ec10144296bd85ff47bcca6dae ld/testsuite/ld-mmix/jumpa-6b.d +f4ca5428c16dc7044eba616c88060283 ld/testsuite/ld-mmix/jumpa-6f.d +883c0287f9033fab6803c32c4eda1c69 ld/testsuite/ld-mmix/jumpa-7b.d +4b126c7bae3abfc161abbf89974ee8c5 ld/testsuite/ld-mmix/jumpa-7f.d +c30b409fdc294bae9f080af0c0f0e2ff ld/testsuite/ld-mmix/jumpa-8b.d +2a744a21150001b4cd0ede5b110709ae ld/testsuite/ld-mmix/jumpa-8f.d +f00db713cea505b97fbb93faa65e3d45 ld/testsuite/ld-mmix/jumpa-9b.d +e53bb3803346e92f0ec97bbc784c1eac ld/testsuite/ld-mmix/jumpa-9f.d +1d6c21fd3ef1c8d793380a2691b6eb7c ld/testsuite/ld-mmix/jumpa.s +7153d676cf0b92abceb49b341d0853ea ld/testsuite/ld-mmix/jumpa12b.d +8462c80cfea74bf25bcf6f8c278db269 ld/testsuite/ld-mmix/jumpa12f.d +01b18bcede2c8d9ef1d4e69be534211e ld/testsuite/ld-mmix/jumpa13b.d +ddb26bcaaaaa6d50847383e563b4d3bc ld/testsuite/ld-mmix/jumpa13f.d +5c43f0af321e1389d47b9006502018e1 ld/testsuite/ld-mmix/jumpa14b.d +0e314b43bc6d623eff2df40b7a85c520 ld/testsuite/ld-mmix/jumpa14f.d +3cdf6375ecfea7039ec8dfa92143a20d ld/testsuite/ld-mmix/loc1.d +b56a23c50b6ddbff1f3794283f3277f1 ld/testsuite/ld-mmix/loc1.s +6408168fece5456b214bc70c861189a5 ld/testsuite/ld-mmix/loc10.d +7f5b22219f4a9814515a346f6cdc5c27 ld/testsuite/ld-mmix/loc10.s +986e92c55c1c527e3a8f5a9bd0d80a13 ld/testsuite/ld-mmix/loc10m.d +fb75bea1a25c34bbf8e30d990a432d97 ld/testsuite/ld-mmix/loc1m.d +2df3f3c439ce03002c2bcb3ec3e46a8e ld/testsuite/ld-mmix/loc2.d +3c356ecff8149f5f58b96419632abe2d ld/testsuite/ld-mmix/loc2.s +499e0b02ab9cde3ceb84ef08a360c969 ld/testsuite/ld-mmix/loc2m.d +86cc9188574d2dfc8219e7b500e816a9 ld/testsuite/ld-mmix/loc3.d +d57db0d8ece842d7e871c26f0165ace0 ld/testsuite/ld-mmix/loc3m.d +9fcbe63857ba71b4e0f7c6d0ffddd504 ld/testsuite/ld-mmix/loc4.d +0ca8c4e7244194dc55fa159ebee2778f ld/testsuite/ld-mmix/loc4m.d +6bce3b0517b052d03c4c4f6ff493fa86 ld/testsuite/ld-mmix/loc5.d +b5bb17720ffd70fe284c562e7302dd3f ld/testsuite/ld-mmix/loc5m.d +51a32dda96fb3b78968d38a7388776cb ld/testsuite/ld-mmix/loc6.d +10b39e63d1856e7c9fd0bfc29a04160b ld/testsuite/ld-mmix/loc6m.d +82f045e44234bb0c8c17b511462c5ea9 ld/testsuite/ld-mmix/loc7.d +9c15aa64a5b8f8693882f01d28db4ef0 ld/testsuite/ld-mmix/loc7m.d +539b8691781ad828f208654d832c709c ld/testsuite/ld-mmix/loc8.d +b5663cc70c64e49e309a75a50c829297 ld/testsuite/ld-mmix/loc8.s +5bc559fd76d2eefd610ad12f54cc7b94 ld/testsuite/ld-mmix/loc8m.d +a952551f22addd80069b6c3d3a02ada3 ld/testsuite/ld-mmix/loc9.d +f884ac0f1a4e95b1b472092333f11075 ld/testsuite/ld-mmix/loc9.s +4946a9228800b29bef3d2ae70cb063d6 ld/testsuite/ld-mmix/loc9m.d +c508652e70247edc0d111d3659682447 ld/testsuite/ld-mmix/local1.d +d707f849fbe9f63a5f2c01fd2566e038 ld/testsuite/ld-mmix/local1.s +7ece63c1f6d1bf57eb22577253170a37 ld/testsuite/ld-mmix/local10.d +04997ac752692c6b8804cd4e39a0ea58 ld/testsuite/ld-mmix/local10m.d +099da77c40cba26141817d4091e7db2c ld/testsuite/ld-mmix/local11.d +d325c8975956aa1752219b1a535cf285 ld/testsuite/ld-mmix/local11m.d +05be1f62230e543b5b8c655ab9caecc0 ld/testsuite/ld-mmix/local12.d +a5a00cd4518d7bd4241630424826ff15 ld/testsuite/ld-mmix/local12m.d +2092cd703c3f9100f9e0ff053d8ce46a ld/testsuite/ld-mmix/local1m.d +509fc476ca1023f3ccf69f809616de98 ld/testsuite/ld-mmix/local2.d +e162c55691230b3ef6099eace547e1b4 ld/testsuite/ld-mmix/local2.s +f9779e43410c476cfa2b2450f8b2639d ld/testsuite/ld-mmix/local2m.d +8c64e08c74d8b411548eb5bde2c2c6a0 ld/testsuite/ld-mmix/local3.d +84414c509524b98f37bc39f6bcb0403c ld/testsuite/ld-mmix/local3m.d +18cc28d324964767918c7071b53b80df ld/testsuite/ld-mmix/local4.d +06f51156a11dc9114232e16ea38ee99a ld/testsuite/ld-mmix/local4m.d +3679ef1e0f41dcab5034cd1aa0f41700 ld/testsuite/ld-mmix/local5.d +f025bba412c428db6d7fe5d4e90528c4 ld/testsuite/ld-mmix/local5m.d +eb4d717d242d7cd8ccc98b6350c95fd2 ld/testsuite/ld-mmix/local6.d +f355a139634c881acf82d620115d829a ld/testsuite/ld-mmix/local6m.d +b27ac036cc770615c18abb33e871301e ld/testsuite/ld-mmix/local7.d +b7ed816019fd284d6e048ebfd47420dc ld/testsuite/ld-mmix/local7m.d +099f86d65a29acd85ad462039776b43f ld/testsuite/ld-mmix/local8.d +d779355656462b041e143cc4e2b98726 ld/testsuite/ld-mmix/local8m.d +133c44093006e1390646457d69e680c5 ld/testsuite/ld-mmix/local9.d +ab244ec4c684d78029caca3dc30d9bfb ld/testsuite/ld-mmix/local9m.d +74c39421284fcce93a5401326a5b0999 ld/testsuite/ld-mmix/locdo-1.d +d6727f0db8cd2c9e50ae8bf7b22eaeaa ld/testsuite/ld-mmix/locdo.s +25d6ea5c55773af722fd4b86198207e0 ld/testsuite/ld-mmix/loct-1.d +022fa8e6f9b0b5e7125cf1ef50101a2b ld/testsuite/ld-mmix/loct.s +b68fbe623d9d44bb2a01d70e3de91be9 ld/testsuite/ld-mmix/locto-1.d +3d1a25d72e6ab244d8e39098981c9740 ld/testsuite/ld-mmix/locto.s +64980a23a389e2541da0ffe38b717379 ld/testsuite/ld-mmix/main1.s +329fb8a6ca411733a8dcdcbe27e81a5d ld/testsuite/ld-mmix/mmix.exp +d20704a169ec8e219c96ad37791c9b78 ld/testsuite/ld-mmix/mmohdr1.ld +09f5e63cab9e137df35586cc1751ed89 ld/testsuite/ld-mmix/mmosec1.ld +b1edc5d09d1437afe67f3b9acce38480 ld/testsuite/ld-mmix/mmosec2.ld +c862b5cb256b14f3b80a3b0cb6fb8308 ld/testsuite/ld-mmix/nop123.s +bf8eb179f03ef8f7b10763e10511c52d ld/testsuite/ld-mmix/pad16.s +be8023f28e5f203322f381ff7d58ae34 ld/testsuite/ld-mmix/pad2p18m32.s +81b17ca511569ebb10d6a6830d2a2cd3 ld/testsuite/ld-mmix/pad2p26m32.s +3a61e1bd72b667553611dd950a466a58 ld/testsuite/ld-mmix/pad4.s +cb2e36a26f1c70b8b7448540e0daeeb6 ld/testsuite/ld-mmix/pr12815-1.d +af8b064d3035251407d3a70749af564e ld/testsuite/ld-mmix/pr12815-1.ld +3eb5638b02efe71633e3369d2d3c7ffb ld/testsuite/ld-mmix/pr12815-1.s +a7d5729c66b793a8f645459563b5c4ef ld/testsuite/ld-mmix/pr12815-2.d +fb6449a01ff11bbe2faa5f300096de2c ld/testsuite/ld-mmix/pr12815-2.s +3dc512ff8407897ee38c5fa85a492dee ld/testsuite/ld-mmix/pushja.s +5020f79a75091e672b04c38fc0c0f632 ld/testsuite/ld-mmix/pushja1b-s.d +b3669a0c5355bdb89bec1e20bd818192 ld/testsuite/ld-mmix/pushja1b.d +41a518887b979d1cb707e16a62a07fa3 ld/testsuite/ld-mmix/pushja1f-s.d +a28b0ed5b9bcc826918ca21a220931bc ld/testsuite/ld-mmix/pushja1f.d +0469afb2478be33584e0a39b366e21f9 ld/testsuite/ld-mmix/pushja2b.d +f36af7e7017293f1a8ef06c21db3defd ld/testsuite/ld-mmix/pushja2f.d +cf60b693a7c7300bd2fdfea2840f4c32 ld/testsuite/ld-mmix/pushja7b-s.d +a51c4d52b6009de0529b462bd331b056 ld/testsuite/ld-mmix/pushja7b.d +a93ceca5e988078b6cfd5bb87488b00f ld/testsuite/ld-mmix/pushja7f-s.d +7ca3d6d32d8bf1fe0c0fa2dfd5d3bac7 ld/testsuite/ld-mmix/pushja7f.d +5ca57868e3251f1d3266878cf4bd9c86 ld/testsuite/ld-mmix/pushja8b.d +55ef82ed26376647664ab8be845439a5 ld/testsuite/ld-mmix/pushja8f.d +f0291d64464843bb9d1c20f11491fd76 ld/testsuite/ld-mmix/pushjs1.d +6136250bae3eb327a6b4dc10bf7311a8 ld/testsuite/ld-mmix/pushjs1b.d +229b0052b5762f655f800004f8f9131d ld/testsuite/ld-mmix/pushjs1bm.d +4b21f4f0f21ed691e0e4abe3fd290f98 ld/testsuite/ld-mmix/pushjs1m.d +3263ef0b06f7a6789787e0ae26cf778d ld/testsuite/ld-mmix/pushjs1r.d +8dc08526c346b0c2949d717f026727be ld/testsuite/ld-mmix/pushjs2.d +f1474c6fb67624c679b9c63365b92657 ld/testsuite/ld-mmix/pushjs2b.d +00442b5dd5c4b626b5e9e629dec76b65 ld/testsuite/ld-mmix/pushjs2bm.d +4661fb2fc41eeeef64b817711af25a25 ld/testsuite/ld-mmix/pushjs2m.d +cc7873bb5868cb9695805db68cbc67e4 ld/testsuite/ld-mmix/pushjs2r.d +c117c4fe9906809ffca078ffbc48d163 ld/testsuite/ld-mmix/pushjs3.d +3007b0afe39473c82e78365f4da3c488 ld/testsuite/ld-mmix/pushjs3b.d +e828e56802bbbfd1a3b53cff43fb28b3 ld/testsuite/ld-mmix/pushjs3bm.d +697593e94a267bf2aba1f02e529854ae ld/testsuite/ld-mmix/pushjs3m.d +c6552b7876f5c1928de731cc7608a507 ld/testsuite/ld-mmix/pushjs3r.d +3a51c60a88ee993a8af188406df050d2 ld/testsuite/ld-mmix/pushjs4.d +8339f07bf2171e19c82569c0783f9ea3 ld/testsuite/ld-mmix/pushjs4b.d +6367bb7d4d3761e60d40bb6d91361498 ld/testsuite/ld-mmix/pushjs4bm.d +883382cfd9016d49f7bb6f3d4febc771 ld/testsuite/ld-mmix/pushjs4m.d +8218b27d50327ef3dcf53ec0f747a724 ld/testsuite/ld-mmix/pushjs4r.d +21d7dbfa3ce2bb14bf3a09c65ed670eb ld/testsuite/ld-mmix/reg-1.d +f5826a00432ff4882e1366d68db516c4 ld/testsuite/ld-mmix/reg-1m.d +0c57becb827f2718163d3834ac0eda1e ld/testsuite/ld-mmix/reg-2.d +2dc0d2fad390f27aced1bb6b2d605948 ld/testsuite/ld-mmix/reg-2m.d +23286b28cfff45deec5e81c3e9002928 ld/testsuite/ld-mmix/regext1.s +69e4b9f6bebc733c9d115ffe73073757 ld/testsuite/ld-mmix/sec-1.d +1b441f0c92b01fbf76e01724e766206c ld/testsuite/ld-mmix/sec-1.s +d75bbbc9b76652e82c593e8021a788a5 ld/testsuite/ld-mmix/sec-2.d +6d236a9289815d56433dcd7178318aeb ld/testsuite/ld-mmix/sec-2.s +ced9dd7695a2b6ba5af87f739be18165 ld/testsuite/ld-mmix/sec-3.d +c2fe6cf6eac2927c283a454b0b86cbab ld/testsuite/ld-mmix/sec-4.d +5a0ea2f638ec8f036edca789bba8451b ld/testsuite/ld-mmix/sec-5.d +f44baed1e2692684d280f4f87721efec ld/testsuite/ld-mmix/sec-6.d +d843e0c48ae3ee12a22ec7d31b8f06df ld/testsuite/ld-mmix/sec-6.s +779977e27f6f62a9d866cb5910d827a0 ld/testsuite/ld-mmix/sec-6m.d +33c42176cf1ac4503f9bde3425413478 ld/testsuite/ld-mmix/sec-7a.s +844abe2f3679b2af13e8e7f44914f609 ld/testsuite/ld-mmix/sec-7b.s +bfabfa85f8df5f46a04fcc6e84d66e62 ld/testsuite/ld-mmix/sec-7c.s +f57ffaf24002d2183b8ac914845be685 ld/testsuite/ld-mmix/sec-7d.s +8a1740e8f0a98d2b3eba20aee81ff409 ld/testsuite/ld-mmix/sec-7e.s +18c464e2b826280b8be2267a9ffe91d5 ld/testsuite/ld-mmix/sec-7m.d +46fe8846ab4dcf70c53008ef4b13298a ld/testsuite/ld-mmix/sec-8a.s +384f320ac9806b341089b1d9c0e07831 ld/testsuite/ld-mmix/sec-8b.s +7d0699e43412bf704bd591e4dcc37cf0 ld/testsuite/ld-mmix/sec-8d.s +9f11ec06925dc6056aa786981c8e21e2 ld/testsuite/ld-mmix/sec-8m.d +19025901dfe14ecc1734484e58975bca ld/testsuite/ld-mmix/sec-8m.s +6b54cd31a1680ed2811f6a6cfda9db6e ld/testsuite/ld-mmix/sec-9.d +ce62b12138d3784ec93a3a8240dba2e5 ld/testsuite/ld-mmix/spec801.d +1e856c201fa2a4cbec995adebafe098e ld/testsuite/ld-mmix/spec802.d +1236260a16fea1321acac9742be6406d ld/testsuite/ld-mmix/spec803.d +2b52ae4ff8779df81116bacf67daaaa4 ld/testsuite/ld-mmix/spec804.d +870d203eabbeb05b6e7f11f5698d7f38 ld/testsuite/ld-mmix/spec805.d +53cbba5fe3fc3f7555eafbf029a83290 ld/testsuite/ld-mmix/spec806.d +6f72403f26862050d862b991a32859b1 ld/testsuite/ld-mmix/spec807.d +4e3034fe7c34cb8275c7ec8ef88b93e3 ld/testsuite/ld-mmix/spec808.d +eef70afe74e16e078ccf5dbf2dab0eff ld/testsuite/ld-mmix/start-1.d +4be3976267833ea3c34b0f798a8c1485 ld/testsuite/ld-mmix/start-2.d +be36292d5a752d8e3594c19f02c2438a ld/testsuite/ld-mmix/start.s +c99cb759a47ad31cda97850838a8521d ld/testsuite/ld-mmix/start2.s +b98323b2049052463fe47f60a1d71402 ld/testsuite/ld-mmix/start3.s +d97c85895c64e2800341eb264ec6c712 ld/testsuite/ld-mmix/start4.s +837a9fc70319cce38647e27afea26552 ld/testsuite/ld-mmix/sym-1.d +d6f7823c96d07d63eff9a4377a3d1197 ld/testsuite/ld-mmix/sym-2.d +5a3543a015c57b95e141c3e542415ad7 ld/testsuite/ld-mmix/sym-2.s +6da9e787afba836a409158b5e1f05682 ld/testsuite/ld-mmix/undef-1.d +6ac82fe0ffb7d83ec7d663b5d78e8a33 ld/testsuite/ld-mmix/undef-1.s +a4e3f736b38cbe5268a76e8290aecfc0 ld/testsuite/ld-mmix/undef-1m.d +442d8e36bccc5a0b2c509ae050688162 ld/testsuite/ld-mmix/undef-2.d +a41b27d14532da2a3129fcc4caf5c055 ld/testsuite/ld-mmix/undef-2.s +8f55b70c5902ca731fa760d513930a89 ld/testsuite/ld-mmix/undef-2m.d +c05df34ccf0e6e24e899048bf055c71a ld/testsuite/ld-mmix/undef-3.d +0c0fa2fe0d0853b92b35546f57987868 ld/testsuite/ld-mmix/undef-3m.d +7f9adc03c95979a593ef1a63b3eb0185 ld/testsuite/ld-mmix/x.s +9eb68df78fb71ad881ebdbaabcbe9e64 ld/testsuite/ld-mmix/y.s +eec04ab77a221898170a779328cf4470 ld/testsuite/ld-mmix/zeroeh.ld +23ef0a6ffc77b189f325690c67cd44ab ld/testsuite/ld-mmix/zeroehelf.d +4ead9079acee42775e41e21b02bcf7f1 ld/testsuite/ld-mmix/zeroehmmo.d +27f159f029022aef43fbd30384995471 ld/testsuite/ld-mn10300/i112045-1.d +44360d9de8d834a50e42eae4e472367b ld/testsuite/ld-mn10300/i112045-1.s +a8484f9973bea2ff58705fa33b4920ee ld/testsuite/ld-mn10300/i112045-2.d +ee1e79eaa54d07274b6d42fda10523a4 ld/testsuite/ld-mn10300/i112045-2.s +9a79c8b3a779faf10b6e78c95f8dd5b9 ld/testsuite/ld-mn10300/i112045-3.d +37537d7a6464bc0ac12d91db7182d6b2 ld/testsuite/ld-mn10300/i112045-3.s +6cd608b8ae1960cd3c52237e87bb867d ld/testsuite/ld-mn10300/i126256-1.c +7fef111f3c90cfa4bec9e66625627376 ld/testsuite/ld-mn10300/i126256-2.c +ea54ef98068eca5fa0d02ad0731e36a2 ld/testsuite/ld-mn10300/i127740.d +5cad82902fb28333769ac6429ef2edcd ld/testsuite/ld-mn10300/i127740.s +4b90148c5bdaf10fd4cb3221bcf2d6bd ld/testsuite/ld-mn10300/i135409-1.d +3fa3331eafa989b61dbc8ec6b14b1e38 ld/testsuite/ld-mn10300/i135409-1.s +f476bf2dcfc8f0cb48030527695a9bf0 ld/testsuite/ld-mn10300/i135409-2.d +4496e0bce8d72f30a840f131da99f2d5 ld/testsuite/ld-mn10300/i135409-2.s +da646c61848b8482377e536ee568a678 ld/testsuite/ld-mn10300/i135409-3.d +4db30e5d483cbea98f48fd574f8c6a8b ld/testsuite/ld-mn10300/i135409-3.s +34163fdd45bf946f3bda2b70bbdc8546 ld/testsuite/ld-mn10300/i135409-4.d +da40960452ce9a0d687ecf6dfccfa7d3 ld/testsuite/ld-mn10300/i135409-4.s +bd852f419af093869c324a1c8b703f1a ld/testsuite/ld-mn10300/i135409-4.t +50da2909e7609ec153f370302fa7d112 ld/testsuite/ld-mn10300/i135409-5.d +6e9e360a2e7379f68cd59fff6509686b ld/testsuite/ld-mn10300/i135409-5.s +ce143e60b2aeee5790b0e617dbb14fb9 ld/testsuite/ld-mn10300/i135409-5.t +d8cea70ea6dc1b040e19c7ee1dc89991 ld/testsuite/ld-mn10300/i143317.d +7f187c7d458b688d75a746755011f384 ld/testsuite/ld-mn10300/i143317.s +5213998d7ac3670a20fb4917ca5386a1 ld/testsuite/ld-mn10300/i143317.t +2f5dfdc78602f4589b91011586bbee08 ld/testsuite/ld-mn10300/i36434-2.s +7a83647077d83988424e2cda3284621a ld/testsuite/ld-mn10300/i36434.d +c26780f90e85d894b5be292c4ce1f2d3 ld/testsuite/ld-mn10300/i36434.s +4cdd20d24214ce1cba693f2581332765 ld/testsuite/ld-mn10300/mn10300.exp +8ac7120f192bc4249e36b8d5f2e07412 ld/testsuite/ld-pe/aligncomm-1.c +1ed11da2764b5effe30755ad549c3915 ld/testsuite/ld-pe/aligncomm-2.c +c66da35da31a929199359aa772b7bf9f ld/testsuite/ld-pe/aligncomm-3.c +96b2b3c2e438bbfab2caf084a81581c6 ld/testsuite/ld-pe/aligncomm-4.c +4876910c8e205ffa2f0dc314fedf08be ld/testsuite/ld-pe/aligncomm.d +8cbc3f7e387846b7dc11a49431b3498b ld/testsuite/ld-pe/basefile1.s +425a249a4b3d03149936d01e197fd44e ld/testsuite/ld-pe/cfi.d +0330f9e9e0a2298753b743e6ad494ba3 ld/testsuite/ld-pe/cfi32.d +50bd2f2922a50e4110eebcd79dabeb7e ld/testsuite/ld-pe/cfia.s +728380297572aa28bb93922358a3fa82 ld/testsuite/ld-pe/cfib.s +48d3b3bc21dc061eca7594f0d592379b ld/testsuite/ld-pe/direct2_client.c +071ad6aff7e8b6037c283aa608e73191 ld/testsuite/ld-pe/direct2_dll.c +51a6ee1bf718258f33ea39a8c0a805a7 ld/testsuite/ld-pe/direct2_dll.def +04b6a5d2a9436d64c0b254e9477df3f9 ld/testsuite/ld-pe/direct_client.c +2ee4aa16665e7dac812ddcfcdfa898d2 ld/testsuite/ld-pe/direct_dll.c +03562dddef0ae3b65968e86ac10d94aa ld/testsuite/ld-pe/export_dynamic_warning.d +508afe660308a34e7b5a4c0577da2c42 ld/testsuite/ld-pe/export_dynamic_warning.s +4398638dc02ea6a1283779ffedcb2ff0 ld/testsuite/ld-pe/exports.d +63895f68d2f6c0b605b27975378f8101 ld/testsuite/ld-pe/exports.s +013993ec18b595fec0c2c2b9da23d635 ld/testsuite/ld-pe/exports64.d +9d6429fb0bed32ab4f21b92e58af9e76 ld/testsuite/ld-pe/image_size.d +bfdf01cbcdcc47293ad59e8ead5fbb51 ld/testsuite/ld-pe/image_size.s +62eb5a4d84b6685b97571577a518f44f ld/testsuite/ld-pe/image_size.t +2e2af98f972cfcea63aa373f9c84ea86 ld/testsuite/ld-pe/longsecn-1.d +5ded97bd96ae772c83818e16a0a062fb ld/testsuite/ld-pe/longsecn-2.d +cf525ed0245ed796222e8ae6542f191d ld/testsuite/ld-pe/longsecn-3.d +d649c9769f98d66f95553f610e5f0e34 ld/testsuite/ld-pe/longsecn-4.d +5bb4e76cfba0a8ca65b0c41c05f23159 ld/testsuite/ld-pe/longsecn-5.d +483193dc97d2131b375e5a3782d0a21d ld/testsuite/ld-pe/longsecn.d +0a2abc0eb25882699c7cb00521f36122 ld/testsuite/ld-pe/longsecn.s +892d645217319214a646ada0d5d309d7 ld/testsuite/ld-pe/non-c-lang-syms.d +1dea19421cfb9f1a5874ac9f8b073c5a ld/testsuite/ld-pe/non-c-lang-syms.s +c4bdcbcfed3d4ba8a7c10e355f198f42 ld/testsuite/ld-pe/orphan.d +841430a2f57ec958fdaac4cfa1194b31 ld/testsuite/ld-pe/orphan_nu.d +cf0d8bce642b4fa4a75fd5d41a9a03d7 ld/testsuite/ld-pe/orphana.s +b9eb88417dbdaa3dbbd3803aa0312c4f ld/testsuite/ld-pe/orphana_nu.s +f38c9ff46a607c6d053bd1bcc5769d3c ld/testsuite/ld-pe/orphanb.s +969af8da47cb3c0f1eea7219d39366c6 ld/testsuite/ld-pe/orphand.s +4c6643fbe84663ac33cc7925b67714aa ld/testsuite/ld-pe/orphane.s +d2fa93bd92732445cd9213dc133633c0 ld/testsuite/ld-pe/pe-compile.exp +24a8c439f77b8b1765c78c92a8c04e25 ld/testsuite/ld-pe/pe-run.exp +a1325eb2ba48dde18c8a6ea12c7244ed ld/testsuite/ld-pe/pe-run2.exp +7128de19cd6e146eb1225e3e9cf9930a ld/testsuite/ld-pe/pe.exp +11d410b535f9ff474c475dc0a1f85115 ld/testsuite/ld-pe/secrel.d +ae437b9d8fe2c177c2672e5ca17b9942 ld/testsuite/ld-pe/secrel1.s +819c1330d03d03cf5d7201562b28b589 ld/testsuite/ld-pe/secrel2.s +cd518cd34e7a57806204a62d5574772a ld/testsuite/ld-pe/secrel_64.d +3ede606ef91fcb4122b82978940e43cc ld/testsuite/ld-pe/tlssec.s +860c233449c16465d94991686fc08335 ld/testsuite/ld-pe/tlssec32.d +fd9c5ae6eca86b7b841e08641e1199f5 ld/testsuite/ld-pe/tlssec64.d +96fb34184ce8ecd9dc8d6f48d0a3c8c1 ld/testsuite/ld-pe/vers-script-1.d +720e7fb1c57e0b2e4ad729a33ea9077e ld/testsuite/ld-pe/vers-script-1.ver +d41d8cd98f00b204e9800998ecf8427e ld/testsuite/ld-pe/vers-script-2.d +1084f86390f69166e2d7c825eec7a20e ld/testsuite/ld-pe/vers-script-2.ver +c790ee9582d666570b5a431c381875fc ld/testsuite/ld-pe/vers-script-3.d +13fc127864a775b5feed8f9c90cef50f ld/testsuite/ld-pe/vers-script-3.ver +c790ee9582d666570b5a431c381875fc ld/testsuite/ld-pe/vers-script-4.d +c920dab590e529f9847e35df7d95646c ld/testsuite/ld-pe/vers-script-4.ver +6448c7b3e321945b8f898f09bd7078bf ld/testsuite/ld-pe/vers-script-dll.c +8a1b43bb1b98d47569c87c7daeccf062 ld/testsuite/ld-pie/pie.c +0a05ace6d4ddf25938ada7e2c9ae1857 ld/testsuite/ld-pie/pie.exp +978f320127c9134b539647f14ba3b730 ld/testsuite/ld-pie/start.d +0aa89fa11067e1cf8802e998bf394ec0 ld/testsuite/ld-pie/start.s +359398aa508714182f5126243220aef5 ld/testsuite/ld-pie/weakundef-data.c +b0684fc70a8cbc0afdcb316aafcc024b ld/testsuite/ld-pie/weakundef.c +15de982d1dc99ce52d089868a579de34 ld/testsuite/ld-pie/weakundef.out +dc4d9b0657141afdfd01a9dfb03d9c3e ld/testsuite/ld-plugin/func.c +e6f0c2a8972646b01ce62774b99d26c3 ld/testsuite/ld-plugin/main.c +fb31ad0f6fc416467c52448e09a6ed0d ld/testsuite/ld-plugin/plugin-1.d +28c7b559aee809b24c5dad11f763e833 ld/testsuite/ld-plugin/plugin-10.d +8b3ee384b0c95292a0028ba41c07cf45 ld/testsuite/ld-plugin/plugin-11.d +1ab5c99c40a35f2bc5efe3360f1235b2 ld/testsuite/ld-plugin/plugin-12.d +ba527e9546ed402c82aa2d22b86236ba ld/testsuite/ld-plugin/plugin-2.d +dd2a4e0fce19c8632dbc3ac8ebc2fa96 ld/testsuite/ld-plugin/plugin-3.d +9ba70ecfadb8125e25978153f892168c ld/testsuite/ld-plugin/plugin-4.d +ca9d90be38d69cca59a3ff326d8b741e ld/testsuite/ld-plugin/plugin-5.d +2dfd3cbce76916d83f9279a40e5032ff ld/testsuite/ld-plugin/plugin-6.d +dcea5cc67a08002b575339520b77d6c8 ld/testsuite/ld-plugin/plugin-7.d +62b6584dc254c60e32f1559a5b038685 ld/testsuite/ld-plugin/plugin-8.d +30fc063d93e8867c473add20ef7ff9d5 ld/testsuite/ld-plugin/plugin-9.d +48f18574de4fff28a22869be67319452 ld/testsuite/ld-plugin/plugin-vis-1.d +3a47945536988c5881e695e9f71028eb ld/testsuite/ld-plugin/plugin.exp +72544f1d7add23af2c711066174c8423 ld/testsuite/ld-plugin/text.c +2056fa7643066f49946ba8d45630009d ld/testsuite/ld-powerpc/aix-abs-branch-1.dd +d3b07384d113edec49eaa6238ad5ff00 ld/testsuite/ld-powerpc/aix-abs-branch-1.ex +ca3964932af48f40a9f48fc85e8f513d ld/testsuite/ld-powerpc/aix-abs-branch-1.im +aae7827ef2c1c6392ae6c362e7201589 ld/testsuite/ld-powerpc/aix-abs-branch-1.nd +875bb8d63ebec84d15bd3e3f0ad53bb7 ld/testsuite/ld-powerpc/aix-abs-branch-1.s +d3b07384d113edec49eaa6238ad5ff00 ld/testsuite/ld-powerpc/aix-abs-reloc-1.ex +9fd2efd79e26dd704a262391abfbd37c ld/testsuite/ld-powerpc/aix-abs-reloc-1.im +d4578c2dd6929a44a9dd1b6b630c9885 ld/testsuite/ld-powerpc/aix-abs-reloc-1.nd +37de35f964e0f7eb7fb312f31eab3394 ld/testsuite/ld-powerpc/aix-abs-reloc-1.od +a585648b05335ce9c7cfdd1201a98265 ld/testsuite/ld-powerpc/aix-abs-reloc-1.s +d3b07384d113edec49eaa6238ad5ff00 ld/testsuite/ld-powerpc/aix-core-sec-1.ex +d2b3cf652e19c6f173e6ceadeccbe145 ld/testsuite/ld-powerpc/aix-core-sec-1.hd +46728f3c273cf2d3fb2fe7f3362d1f98 ld/testsuite/ld-powerpc/aix-core-sec-1.s +d3b07384d113edec49eaa6238ad5ff00 ld/testsuite/ld-powerpc/aix-core-sec-2.ex +020d961bc2bd12358e53b141b9b25aa4 ld/testsuite/ld-powerpc/aix-core-sec-2.hd +97c6402a48ec2effe24d4cec14311c3d ld/testsuite/ld-powerpc/aix-core-sec-2.s +d3b07384d113edec49eaa6238ad5ff00 ld/testsuite/ld-powerpc/aix-core-sec-3.ex +598bf428e975d5338cc63cc0dcbffbe3 ld/testsuite/ld-powerpc/aix-core-sec-3.hd +ac4da05215010119028f4a88dbe82413 ld/testsuite/ld-powerpc/aix-core-sec-3.s +892dc50861c06e15d06e4a9a5e7bfb70 ld/testsuite/ld-powerpc/aix-export-1-all.dd +b47146af1a449575aa5f1dc04f7a3cd1 ld/testsuite/ld-powerpc/aix-export-1-full.dd +efebc89e74f58c173184ae6ec08a3871 ld/testsuite/ld-powerpc/aix-export-1a.s +e4be8450cada8f513c4415abef021c68 ld/testsuite/ld-powerpc/aix-export-1b.s +da869956a689192845cf202356a38b7f ld/testsuite/ld-powerpc/aix-export-2.nd +8d9dfe3f3af5571d02728bebdc85aed3 ld/testsuite/ld-powerpc/aix-export-2.s +db020c9f352b71cf48739e2b629a8eb2 ld/testsuite/ld-powerpc/aix-gc-1-32.dd +661a3654fa373008a8d4521cccaa599b ld/testsuite/ld-powerpc/aix-gc-1-64.dd +f5954e709b76aa5882eb2e5dd8e90a41 ld/testsuite/ld-powerpc/aix-gc-1.ex +29c8a25c59d0dd1b825d3f9d06d7f47a ld/testsuite/ld-powerpc/aix-gc-1.nd +2954aa54466f09a5b6e0df1abd5254f4 ld/testsuite/ld-powerpc/aix-gc-1.s +1b843204f845302062a05189aecb4b29 ld/testsuite/ld-powerpc/aix-glink-1-32.d +95af44d4ebc06505379fc0d20e130182 ld/testsuite/ld-powerpc/aix-glink-1-32.dd +6c8d4e83517afc5b6bc62fe71fa7b375 ld/testsuite/ld-powerpc/aix-glink-1-64.d +1258981d11030d426a9b638267e1a2bf ld/testsuite/ld-powerpc/aix-glink-1-64.dd +5918d3170fd91d138640e5fe9e016f7e ld/testsuite/ld-powerpc/aix-glink-1.ex +644cee7428b3d6ed0d84a6da92f02fb3 ld/testsuite/ld-powerpc/aix-glink-1.s +62234ddf0b3034af7ed1d468d2eaf012 ld/testsuite/ld-powerpc/aix-glink-2-32.dd +909532b05b88cb16852f12103b254d75 ld/testsuite/ld-powerpc/aix-glink-2-64.dd +a78cf83e5427170c21b55ba4a1106454 ld/testsuite/ld-powerpc/aix-glink-2a.ex +41836333e421268f5c945cad02181c4d ld/testsuite/ld-powerpc/aix-glink-2a.s +866f7aaf0441b9006bdd636a86074a8d ld/testsuite/ld-powerpc/aix-glink-2b.s +cbf3c02328a6322b59037fc4837edcb4 ld/testsuite/ld-powerpc/aix-glink-2c.ex +aaab138c73a56e0d51a845129e531690 ld/testsuite/ld-powerpc/aix-glink-2c.s +d3c9a419b5e0dfe645f6cb581879d7e6 ld/testsuite/ld-powerpc/aix-glink-2d.s +9fca27bf59573703866b04c76ca122c9 ld/testsuite/ld-powerpc/aix-glink-3-32.d +b005bf2cee284894bc19d339789bbbbf ld/testsuite/ld-powerpc/aix-glink-3-64.d +1277e97ff2a6e720d7495a403bf2cab4 ld/testsuite/ld-powerpc/aix-glink-3.dd +45e865ab7bf05bfca290bba1bb66d8e6 ld/testsuite/ld-powerpc/aix-glink-3.s +e5dbc2d619226db19ee0af91d94c0e0f ld/testsuite/ld-powerpc/aix-glink-3a.s +3ea5b3e158ff935afa068f59addbb208 ld/testsuite/ld-powerpc/aix-glink-3b.s +bbd7e73e7e570476791242f63e0c2d71 ld/testsuite/ld-powerpc/aix-lineno-1.s +865a609d25ae921a90e55a8694faecdd ld/testsuite/ld-powerpc/aix-lineno-1.txt +b94eb10e645ddbec7c212988a90c0bf6 ld/testsuite/ld-powerpc/aix-lineno-1a.dd +cfec9e3308bb2d6ae7fa2e85b8fea04c ld/testsuite/ld-powerpc/aix-lineno-1a.nd +cb66c732360a0e5c19be21538f028089 ld/testsuite/ld-powerpc/aix-lineno-1b.dd +d49ecdc3e607c266e7f5e7d80105de69 ld/testsuite/ld-powerpc/aix-lineno-1b.nd +e0ea0cb320a3c7db3dd1701cc2719c93 ld/testsuite/ld-powerpc/aix-no-dup-syms-1-dso.dnd +74e7cdcfcc462b2c8ff8ef932821593d ld/testsuite/ld-powerpc/aix-no-dup-syms-1-dso.drd +354b92ddc596eac96df0a47192b56add ld/testsuite/ld-powerpc/aix-no-dup-syms-1-dso.nd +ba9aab21b2c3be0d32cd1ee743d573d0 ld/testsuite/ld-powerpc/aix-no-dup-syms-1-dso.rd +58bb3bd507ae3ad020445678a4177257 ld/testsuite/ld-powerpc/aix-no-dup-syms-1-rel.nd +425a8cff195f7c50810e3bd888c8abb1 ld/testsuite/ld-powerpc/aix-no-dup-syms-1-rel.rd +f0ad8727f2f07b861e795c4cfe1013af ld/testsuite/ld-powerpc/aix-no-dup-syms-1.ex +d3b07384d113edec49eaa6238ad5ff00 ld/testsuite/ld-powerpc/aix-no-dup-syms-1.im +88e303b5f362d2bed5a0b9ac890b55a6 ld/testsuite/ld-powerpc/aix-no-dup-syms-1a.s +c8af874076ad726683033347509fa7ac ld/testsuite/ld-powerpc/aix-no-dup-syms-1b.s +995efaf46f9360c2de42cc707df57cbe ld/testsuite/ld-powerpc/aix-ref-1-32.od +4125c347dab35b4ee206d2634f9a0011 ld/testsuite/ld-powerpc/aix-ref-1-64.od +5604bf2bd9a113169fbaf5ef75e7a56d ld/testsuite/ld-powerpc/aix-ref-1.s +d976c55ada460fa272497cc689c6e36f ld/testsuite/ld-powerpc/aix-rel-1.od +55a6057fd2b9eb2daa176789f35e3b68 ld/testsuite/ld-powerpc/aix-rel-1.s +4237df48b26069a7f09cc9c38b10844e ld/testsuite/ld-powerpc/aix-toc-1-32.dd +0d68cec016043bfcf7aca4b10bd602d0 ld/testsuite/ld-powerpc/aix-toc-1-64.dd +60cdcd95a55e7d16dafb9d6bc2ecb69a ld/testsuite/ld-powerpc/aix-toc-1.ex +2150ba398cab0572cc59e49a82fb2773 ld/testsuite/ld-powerpc/aix-toc-1a.s +c4e0f5ac18cb5e7ae52026f8e5f2cc81 ld/testsuite/ld-powerpc/aix-toc-1b.s +86b105fc9e69dff5ae3e4fca87255d64 ld/testsuite/ld-powerpc/aix-weak-1-dso.dnd +7b18007de5e106eda4406e6843114ae6 ld/testsuite/ld-powerpc/aix-weak-1-dso.hd +14606039aa1d861835e0f15f6e834651 ld/testsuite/ld-powerpc/aix-weak-1-dso.nd +2f56cfa02e5c35436905ce2039a1ece2 ld/testsuite/ld-powerpc/aix-weak-1-gcdso.dnd +b8a7a968f1738ff42345b75945f4b122 ld/testsuite/ld-powerpc/aix-weak-1-gcdso.hd +1d608a8199923e08585e21915785d613 ld/testsuite/ld-powerpc/aix-weak-1-gcdso.nd +2e7db668e32486f08f1854b6fb5df933 ld/testsuite/ld-powerpc/aix-weak-1-rel.hd +8acd8ea8c67e5be3946058ca30146544 ld/testsuite/ld-powerpc/aix-weak-1-rel.nd +3915237e72677da8915c41d8235f3852 ld/testsuite/ld-powerpc/aix-weak-1.ex +8f33bad768aa59fc27214ef339e320eb ld/testsuite/ld-powerpc/aix-weak-1a.s +8a580e9b39f76b71f777a41fdf62c3b1 ld/testsuite/ld-powerpc/aix-weak-1b.s +7762baf695abf911054e8619e19c3940 ld/testsuite/ld-powerpc/aix-weak-2a.ex +221290f732e87dafc314eb0daeb648b8 ld/testsuite/ld-powerpc/aix-weak-2a.nd +262475e31ed62d489a26dcd389be840f ld/testsuite/ld-powerpc/aix-weak-2a.s +70842d820c3e29ae7eae1f297de1e806 ld/testsuite/ld-powerpc/aix-weak-2b.nd +39c0dd3f29505cb6855a5ea501b1b29f ld/testsuite/ld-powerpc/aix-weak-2b.s +d3b07384d113edec49eaa6238ad5ff00 ld/testsuite/ld-powerpc/aix-weak-2c.ex +748dbeb15f66cfd60128c9ac65a2a55a ld/testsuite/ld-powerpc/aix-weak-2c.nd +def2f718936bb8a76625b2d10ca3212a ld/testsuite/ld-powerpc/aix-weak-2c.od +586e92b7b58010225fd38b1d426343d2 ld/testsuite/ld-powerpc/aix-weak-2c.s +006645063f102b6c7a297d4a7c4f6386 ld/testsuite/ld-powerpc/aix-weak-3-32.d +58828abbaffd055354277ec238820a7f ld/testsuite/ld-powerpc/aix-weak-3-32.dd +56deffed984fd9131dd96226aea2091d ld/testsuite/ld-powerpc/aix-weak-3-64.d +123061df52af683bb91dcb4a84c3d83c ld/testsuite/ld-powerpc/aix-weak-3-64.dd +be4252948c7ed64eb66b79344e1653af ld/testsuite/ld-powerpc/aix-weak-3a.ex +374aa6a557b88260efd096cf5efb9daf ld/testsuite/ld-powerpc/aix-weak-3a.s +009520053b00386d1173f3988c55d192 ld/testsuite/ld-powerpc/aix-weak-3b.ex +e9279b52fb9ad49703e8c667bc97c2f6 ld/testsuite/ld-powerpc/aix-weak-3b.s +19847f90e5f5e4ed64aac571cd9e9a57 ld/testsuite/ld-powerpc/aix52.exp +ee62f5cb3e7690e27455b15c3a57634f ld/testsuite/ld-powerpc/apuinfo-nul.rd +519a83f6661f4e92b4f1cd2404e97f90 ld/testsuite/ld-powerpc/apuinfo-nul.s +3cebbf08302b7c7cddff45df86c79629 ld/testsuite/ld-powerpc/apuinfo-nul1.s +010e15de7d73110844ad854708e55cec ld/testsuite/ld-powerpc/apuinfo.rd +787da85c4090a2cd214e445bf01ed784 ld/testsuite/ld-powerpc/apuinfo1.s +122c70dca18f0a00814d752c8ac134bf ld/testsuite/ld-powerpc/apuinfo2.s +88f68a8288d53e408300f8b822bbbae4 ld/testsuite/ld-powerpc/attr-gnu-12-1.s +562248d60d1c84e7abdb186ffc6aadfe ld/testsuite/ld-powerpc/attr-gnu-12-11.d +a6c72ffd9c53e62bc4800c6b5ce6f7a6 ld/testsuite/ld-powerpc/attr-gnu-12-2.s +c4e457c71ba66d0ce624a03b507ee5aa ld/testsuite/ld-powerpc/attr-gnu-12-21.d +eaab780bec027c6ef6ac334619ba2b18 ld/testsuite/ld-powerpc/attr-gnu-4-0.s +a8680b3b7cad2d388fabcc5994a00076 ld/testsuite/ld-powerpc/attr-gnu-4-00.d +48a6491909160de24ed692f6f1e2ee2d ld/testsuite/ld-powerpc/attr-gnu-4-01.d +35b0780c5391a8ad2fb0bafb93826996 ld/testsuite/ld-powerpc/attr-gnu-4-02.d +e6d088a574710ce388eb63689c8ee78f ld/testsuite/ld-powerpc/attr-gnu-4-03.d +018b97f0a56402eb7f0edfcc26b8cd1d ld/testsuite/ld-powerpc/attr-gnu-4-1.s +c2bacf49b6e6a98768dd05f4db91d1b5 ld/testsuite/ld-powerpc/attr-gnu-4-10.d +07aadb81c2adc048aa6fc92c1d591068 ld/testsuite/ld-powerpc/attr-gnu-4-11.d +6e61359374a55284e9083895aa00196c ld/testsuite/ld-powerpc/attr-gnu-4-12.d +417988625e2bef49e568497fe0753583 ld/testsuite/ld-powerpc/attr-gnu-4-13.d +c6bbc186b1a46762256a92672c76c43d ld/testsuite/ld-powerpc/attr-gnu-4-14.d +eac9dfdfc46cc5dd33f029ec52ee6793 ld/testsuite/ld-powerpc/attr-gnu-4-2.s +ab1b8c9d73249300efb3b0e79494fbcb ld/testsuite/ld-powerpc/attr-gnu-4-20.d +a4a11190c7363d8aa1f641d8072110b7 ld/testsuite/ld-powerpc/attr-gnu-4-21.d +353d68e8db93ad913fa7c72ee33e1e2f ld/testsuite/ld-powerpc/attr-gnu-4-22.d +dd77181fcbba065c28b5711b2ed015d6 ld/testsuite/ld-powerpc/attr-gnu-4-23.d +8b43b66063286aa42c897efb8775ea8f ld/testsuite/ld-powerpc/attr-gnu-4-24.d +7fd562a8f705fa9e3d082842773a9fd7 ld/testsuite/ld-powerpc/attr-gnu-4-3.s +baa8db7def2ab7e74508e42246b79d98 ld/testsuite/ld-powerpc/attr-gnu-4-31.d +5a339372f1afc9d7daab5c77e414b319 ld/testsuite/ld-powerpc/attr-gnu-4-32.d +2f679e4a6ceef1fbb873ab57e8fa12cb ld/testsuite/ld-powerpc/attr-gnu-4-33.d +0cb23b2934471b6640dcf76aa298dcae ld/testsuite/ld-powerpc/attr-gnu-4-34.d +bd99d860c5949dcff583df0a100a0ab3 ld/testsuite/ld-powerpc/attr-gnu-4-4.s +69daeab8e5bdf7168f9657661f8a0281 ld/testsuite/ld-powerpc/attr-gnu-4-41.d +78d5b5b1579969eeb0c2adc4435ceba6 ld/testsuite/ld-powerpc/attr-gnu-8-1.s +1dc00156e17bc28841f31d0ac1135be9 ld/testsuite/ld-powerpc/attr-gnu-8-11.d +02808fe5f9efcbe94fa262dcef9ea031 ld/testsuite/ld-powerpc/attr-gnu-8-2.s +7c19ff4820069ee6b10040038b621ead ld/testsuite/ld-powerpc/attr-gnu-8-23.d +786fb2f305ce54b247bea7cdfc29b5a9 ld/testsuite/ld-powerpc/attr-gnu-8-3.s +39d9306ef744cdecdf7376c38241d3fc ld/testsuite/ld-powerpc/attr-gnu-8-31.d +d10db0d5e0fc0f02abcba0a28e1b4f1a ld/testsuite/ld-powerpc/oldtlslib.s +f0a3eb083d43ce486aa5db8c7d4e2e57 ld/testsuite/ld-powerpc/plt1.d +427bc64abfbbca294d753753cf4b3573 ld/testsuite/ld-powerpc/plt1.s +2d7168f016d466361a0f37058520f2fa ld/testsuite/ld-powerpc/powerpc.exp +3cc62e496eb86a99bc9232546628fb3a ld/testsuite/ld-powerpc/relax.d +fb7e959e27d0729bfa5e91a3d4c082a7 ld/testsuite/ld-powerpc/relax.s +b74f226a07844cd8969ed2e84a1b7d25 ld/testsuite/ld-powerpc/relaxr.d +f541ad37869dde03dc5885dd50c1481b ld/testsuite/ld-powerpc/relbrlt.d +fed89963c6094ee31776b29c918d6a24 ld/testsuite/ld-powerpc/relbrlt.s +d0c078412690065f88a1d02ceafdeccf ld/testsuite/ld-powerpc/reloc.d +53652025c67e058e17ee2f5b68f62577 ld/testsuite/ld-powerpc/reloc.s +faf25052dc4eb831cb4cbdcc617eaa51 ld/testsuite/ld-powerpc/sdadyn.d +b11b5807e7a6fa381d608f06a71e0bb1 ld/testsuite/ld-powerpc/sdadyn.s +4291ceef5a9a5101e6b9694d18484709 ld/testsuite/ld-powerpc/sdalib.s +d87aa302fd5305f712767b6d3679220b ld/testsuite/ld-powerpc/symtocbase-1.s +495885b7a4b9c45d264ac690a0196b22 ld/testsuite/ld-powerpc/symtocbase-2.s +aa5f4942eac1d2661d7d178713906bcd ld/testsuite/ld-powerpc/symtocbase.d +bfecc74ae4a9b993f413069c788cd0ac ld/testsuite/ld-powerpc/tls.d +863594542395bb4a79591b3639d5f63c ld/testsuite/ld-powerpc/tls.g +8301929a8722e78f7597ceda20b84e87 ld/testsuite/ld-powerpc/tls.s +bd2bacee052020afd7dac82cf8d2d3f3 ld/testsuite/ld-powerpc/tls.t +1913f185dc8a5675aea58c1ac7f3c2da ld/testsuite/ld-powerpc/tls32.d +e49d066c8c8b5e3295e1b525859e5660 ld/testsuite/ld-powerpc/tls32.g +bea8413d63541a8a7dbdc303790f9127 ld/testsuite/ld-powerpc/tls32.s +c0ef4eee1944a09ab22b782d89a8c699 ld/testsuite/ld-powerpc/tls32.t +e13035e08ed4a1bc79222b5d4e2540af ld/testsuite/ld-powerpc/tlsexe.d +c527d11b8f61281657a889bc9c0b2e0b ld/testsuite/ld-powerpc/tlsexe.g +5f828b678ab7a002f54f02e4a7b938d7 ld/testsuite/ld-powerpc/tlsexe.r +646bb364341f301973ce098ae2f8039c ld/testsuite/ld-powerpc/tlsexe.t +7ba76e58197f73d6a0ae1fa7a6260fab ld/testsuite/ld-powerpc/tlsexe32.d +c1c88919bd566096b68d8f9bfc9e52a7 ld/testsuite/ld-powerpc/tlsexe32.g +e020efe9a1c03e9100d8fc456193163f ld/testsuite/ld-powerpc/tlsexe32.r +f97543e5816cc551d4a2213ec82f0f70 ld/testsuite/ld-powerpc/tlsexe32.t +08450fa24f4f7560b2530d570ec848cd ld/testsuite/ld-powerpc/tlsexetoc.d +6a5da004bb4e186a7426471e71c5f3b2 ld/testsuite/ld-powerpc/tlsexetoc.g +78b985c3ef30729e9c8262265d64ce77 ld/testsuite/ld-powerpc/tlsexetoc.r +4a7fe05f8c468454f0be009dec3fdc19 ld/testsuite/ld-powerpc/tlsexetoc.t +9a42b93947f1b17acefde9b84ece4632 ld/testsuite/ld-powerpc/tlslib.s +a6dccb915f964db461b164a90787e0aa ld/testsuite/ld-powerpc/tlslib32.s +65400fa0ec0a37bff5dec4387ec01d43 ld/testsuite/ld-powerpc/tlsmark.d +405adb1e2e31fe70c4f643fb942f78f4 ld/testsuite/ld-powerpc/tlsmark.s +530e96abe77e8ec63d1ead037b890f6e ld/testsuite/ld-powerpc/tlsmark32.d +09a50a7db03c8b6bae854c9426b8ee51 ld/testsuite/ld-powerpc/tlsmark32.s +5a0d7616ccb01ee8d0a04f5743c62922 ld/testsuite/ld-powerpc/tlsopt1.d +218a7083014093b0da1ec318e619b074 ld/testsuite/ld-powerpc/tlsopt1.s +99a7359245ecf7421bc80aa951fd6d93 ld/testsuite/ld-powerpc/tlsopt1_32.d +f724bd21a670becef25deb108ba036f3 ld/testsuite/ld-powerpc/tlsopt1_32.s +e6ca35bbc098f95517d65a56320e5e20 ld/testsuite/ld-powerpc/tlsopt2.d +e9f2f43970c51117c39bd368b6b78be4 ld/testsuite/ld-powerpc/tlsopt2.s +e739949354e3c1961c599a0c371fbb1b ld/testsuite/ld-powerpc/tlsopt2_32.d +4a3264168519b972800f38adf985b35f ld/testsuite/ld-powerpc/tlsopt2_32.s +3cb4e439af9f0d7c9b32ec4ec05399cd ld/testsuite/ld-powerpc/tlsopt3.d +51add6cacf0d82d46cbd6945a39f8ee3 ld/testsuite/ld-powerpc/tlsopt3.s +e1cb5270ff6cbcf16668b353138f3c24 ld/testsuite/ld-powerpc/tlsopt3_32.d +d44c161b121d1b249d5b05533020a54f ld/testsuite/ld-powerpc/tlsopt3_32.s +a681f7ee9504ec5cef0c5e77f56d1ed0 ld/testsuite/ld-powerpc/tlsopt4.d +f3f4d3a1dd2ecf6f44b5bc3333d2d79f ld/testsuite/ld-powerpc/tlsopt4.s +b658e6cf2cde708a36242d0fd23745d4 ld/testsuite/ld-powerpc/tlsopt4_32.d +9f34854a67102932713ec55fc2f3f3c6 ld/testsuite/ld-powerpc/tlsopt4_32.s +0a8ee8073547fc6d62a9430071960505 ld/testsuite/ld-powerpc/tlsso.d +1a433ed6c72afabe588d99e37cb9e39d ld/testsuite/ld-powerpc/tlsso.g +83aebe87e90bdfb8bc83d007fd5e5116 ld/testsuite/ld-powerpc/tlsso.r +f036e7b2b51f16236c81590e2e4a6697 ld/testsuite/ld-powerpc/tlsso.t +9b010d01487d7fb0663b61c712d6035c ld/testsuite/ld-powerpc/tlsso32.d +c0ebc9ec6eca79f46f5819ed66ba577a ld/testsuite/ld-powerpc/tlsso32.g +5dd404684085c860d6acb89fb0b3fb98 ld/testsuite/ld-powerpc/tlsso32.r +33abdf51a1e378a2087e888d309f988b ld/testsuite/ld-powerpc/tlsso32.t +cd04cfbb301f112f9090369d128f2688 ld/testsuite/ld-powerpc/tlstoc.d +bd5eec94c235419cf306a2c7fe11e11b ld/testsuite/ld-powerpc/tlstoc.g +4891ee12248bc36790947b84a88cd9c0 ld/testsuite/ld-powerpc/tlstoc.s +38d558bbfd10a333ed6122dc7123571b ld/testsuite/ld-powerpc/tlstoc.t +c533cac4281a599096475aa6b2970916 ld/testsuite/ld-powerpc/tlstocso.d +be2d0e53f3a73ddb42037f1fb7bedaf9 ld/testsuite/ld-powerpc/tlstocso.g +87aa0d9262a14b02c8303bd3a6116a5c ld/testsuite/ld-powerpc/tlstocso.r +dc1545b0e1300fa2e532d355d1023452 ld/testsuite/ld-powerpc/tlstocso.t +69d0f49425b3c4da6d33725f2bdadf91 ld/testsuite/ld-powerpc/tocopt.d +42cea1c68584019b5b89d2f03cddc1ce ld/testsuite/ld-powerpc/tocopt.out +6bb54eb5b47043ad92883d4858f7def2 ld/testsuite/ld-powerpc/tocopt.s +c9a4c6fd1b8b63a309ce1dfc89f6b78c ld/testsuite/ld-powerpc/tocopt2.d +03ec73a6aa0f52943bef08d648f2cefb ld/testsuite/ld-powerpc/tocopt2.out +b6ea6463608234d456d35f3cc9c372a9 ld/testsuite/ld-powerpc/tocopt2.s +c9a4c6fd1b8b63a309ce1dfc89f6b78c ld/testsuite/ld-powerpc/tocopt3.d +33e083640e64441f7c796d89634b81e7 ld/testsuite/ld-powerpc/tocopt3.s +a1a754c4ee7caf10faee283860f8f552 ld/testsuite/ld-powerpc/tocopt4.d +702b412d8c6002e9efbe7b9760029306 ld/testsuite/ld-powerpc/tocopt4a.s +a807e3ff17c2c9d22ae7d46cf7ccbb4c ld/testsuite/ld-powerpc/tocopt4b.s +e721d782b4f3267f9933b0b804cd8b9f ld/testsuite/ld-powerpc/tocopt5.d +7c769079034dfee8d28d7d7292311d4e ld/testsuite/ld-powerpc/tocopt5.s +ea572ffd48301e37ce8ff8863793697c ld/testsuite/ld-powerpc/vxworks-relax-2.rd +756b1282ce6a23e3b07addc9a54392ab ld/testsuite/ld-powerpc/vxworks-relax-2.s +846faeee15c72e202fd5132030173f42 ld/testsuite/ld-powerpc/vxworks-relax.rd +a5e5962ef075b6977f71f32a74dcbd72 ld/testsuite/ld-powerpc/vxworks-relax.s +dabafb6400d1624b1bf5d0e7599ceb2c ld/testsuite/ld-powerpc/vxworks1-lib.dd +acca061d87c83f585ea88472d89d554d ld/testsuite/ld-powerpc/vxworks1-lib.nd +b99f04c5e9db566e3653b61070ef62c7 ld/testsuite/ld-powerpc/vxworks1-lib.rd +986a11fc7eac3ba90472ab1c8a1ad3d4 ld/testsuite/ld-powerpc/vxworks1-lib.s +b5760134e083c35f414fe5e4308a070e ld/testsuite/ld-powerpc/vxworks1-lib.sd +6dbdc5d4346169b9a3af98707d77be72 ld/testsuite/ld-powerpc/vxworks1-lib.td +ac0b4d23d8c88db1538c122df4279799 ld/testsuite/ld-powerpc/vxworks1-static.d +6498ea121cb6fe7240ffc9e254fe6f09 ld/testsuite/ld-powerpc/vxworks1.dd +20cf5642bf6ad5bc6d0b0abb0afe4b75 ld/testsuite/ld-powerpc/vxworks1.ld +020c5534bb71fa061939f607193cebf6 ld/testsuite/ld-powerpc/vxworks1.rd +66e3ac39954536d122375680de218509 ld/testsuite/ld-powerpc/vxworks1.s +70a3a63caaa6294e72a21f3af93d802c ld/testsuite/ld-powerpc/vxworks2-static.sd +59945c589f97dc856c251f390437b5ec ld/testsuite/ld-powerpc/vxworks2.s +a59d05b41e3dd040fb4e12e434cff21d ld/testsuite/ld-powerpc/vxworks2.sd +2f7e5f1bf217d02d323ef077dd5cf1d8 ld/testsuite/ld-s390/s390.exp +c40e8c0331c6d98637583ea1e30e91e9 ld/testsuite/ld-s390/tlsbin.dd +b9a52eb541a7a4d08bc53674954b18da ld/testsuite/ld-s390/tlsbin.rd +dfc5a09a574f7db9aa5c609b2b61d663 ld/testsuite/ld-s390/tlsbin.s +129de764f451a6e38ff8e91c1de856e1 ld/testsuite/ld-s390/tlsbin.sd +2e6c6964734ec81f6ed203568d2cf8bc ld/testsuite/ld-s390/tlsbin.td +88e1883b94e53d199350ed7be57f1db5 ld/testsuite/ld-s390/tlsbin_64.dd +fdea4789d34d342352c5790d964666c7 ld/testsuite/ld-s390/tlsbin_64.rd +92972a9e8ed73263fe9dd260a972a00f ld/testsuite/ld-s390/tlsbin_64.s +5083c5af007cc9a18444cba7aec7d685 ld/testsuite/ld-s390/tlsbin_64.sd +ec34e31021e910030b56a53077269534 ld/testsuite/ld-s390/tlsbin_64.td +df1bb4542623cb92c3544cf083bd0d40 ld/testsuite/ld-s390/tlsbinpic.s +b6275de1b0e1a08a2b3fa24ee85d230c ld/testsuite/ld-s390/tlsbinpic_64.s +63d5514386005c2b68e0f502e0deda14 ld/testsuite/ld-s390/tlslib.s +63d5514386005c2b68e0f502e0deda14 ld/testsuite/ld-s390/tlslib_64.s +5eb0a3c451edc240fc5eda47dd557769 ld/testsuite/ld-s390/tlspic.dd +fa04b281fb074f8b4ad08a0075a92854 ld/testsuite/ld-s390/tlspic.rd +bcbc04334a471aca9e71c0cc99c7e131 ld/testsuite/ld-s390/tlspic.sd +54dbf2b658b06137f674825d8474c8af ld/testsuite/ld-s390/tlspic.td +7db72b84a4c88ca6b985e09ddcdbf995 ld/testsuite/ld-s390/tlspic1.s +ec81ab04e19a45347ef1a423d9ddbfd7 ld/testsuite/ld-s390/tlspic1_64.s +1be6d8e1547c710f7bc12028c6522832 ld/testsuite/ld-s390/tlspic2.s +1be6d8e1547c710f7bc12028c6522832 ld/testsuite/ld-s390/tlspic2_64.s +979c84647c473fedcc1a6511336d84dd ld/testsuite/ld-s390/tlspic_64.dd +8970de00cc92bb403d233f310ea3f521 ld/testsuite/ld-s390/tlspic_64.rd +ab9872b24c3c97aaf099a081de993709 ld/testsuite/ld-s390/tlspic_64.sd +2f047623197dae3f539aea80b15120e4 ld/testsuite/ld-s390/tlspic_64.td +b8b9611632f9b31fc9d8d68da9320c31 ld/testsuite/ld-scripts/align.exp +8a219a0fc5ea21ec757cf630c69f6bf6 ld/testsuite/ld-scripts/align.s +efeb8e6f0a3f40f9920e2030bf854b18 ld/testsuite/ld-scripts/align.t +1bc6194419a61faf0aaf28eb2c343962 ld/testsuite/ld-scripts/align2.t +a19364e9d2dc7c585b2d91c72cd806b3 ld/testsuite/ld-scripts/align2a.d +aab55ad4c7de88d6b2781ab6e273346a ld/testsuite/ld-scripts/align2a.s +528c3b955e569ae445d0ba4e712b7fe8 ld/testsuite/ld-scripts/align2b.d +aab55ad4c7de88d6b2781ab6e273346a ld/testsuite/ld-scripts/align2b.s +7c3f8de8c952c3a5d74b76e5e9b08f96 ld/testsuite/ld-scripts/align2c.d +aab55ad4c7de88d6b2781ab6e273346a ld/testsuite/ld-scripts/align2c.s +60c07eeb2d012d17b5df27e2f32d98e8 ld/testsuite/ld-scripts/alignof.exp +efd86cba421ee94f32bacfa0d471a45b ld/testsuite/ld-scripts/alignof.s +b4aa3cb7bf860b7a59b6479a93814279 ld/testsuite/ld-scripts/alignof.t +7534c8f58680bbd0c85a46bb89e5f21c ld/testsuite/ld-scripts/assert.exp +68b329da9893e34099c7d8ad5cb9c940 ld/testsuite/ld-scripts/assert.s +0b8d03508f04bd878e18f47361a77a91 ld/testsuite/ld-scripts/assert.t +d976d3bb48e57b0a7bd099c01e5efef0 ld/testsuite/ld-scripts/assert2.d +d5fdb2d409325be02826cf16b82b5816 ld/testsuite/ld-scripts/assert2.t +e882253a7b0f660986d5794a36239b1b ld/testsuite/ld-scripts/cross1.c +8bcf5c1294efdc1276b8ecd0820dba3b ld/testsuite/ld-scripts/cross1.t +2bad1250e1d3998f3c2d678b1b90d275 ld/testsuite/ld-scripts/cross2.c +8688dcf616adf0952098881c826c77b8 ld/testsuite/ld-scripts/cross2.t +6cda0a6cae6d6fe585c175aa49c2578e ld/testsuite/ld-scripts/cross3.c +24ca67fb6299b75886b829db50f09f18 ld/testsuite/ld-scripts/cross3.t +be2d98503c3e3a02a41eca2fe813a310 ld/testsuite/ld-scripts/cross4.c +fa086879d31c4e72e572178185ad8379 ld/testsuite/ld-scripts/crossref.exp +2b95fbcecb9b6b61edab9de8fb73d139 ld/testsuite/ld-scripts/data.d +d6d0e0bdcb41b6dd1efcce7dce8bcb9b ld/testsuite/ld-scripts/data.exp +68b329da9893e34099c7d8ad5cb9c940 ld/testsuite/ld-scripts/data.s +0731e98ca5673229486cfcf5058fec31 ld/testsuite/ld-scripts/data.t +8cca496097801b6515c7a5b518d6afe6 ld/testsuite/ld-scripts/default-script.exp +dab92d62194ce975a2a9b09cbf5bd62d ld/testsuite/ld-scripts/default-script.s +1f054fba217a65109aca9010a3afad97 ld/testsuite/ld-scripts/default-script.t +b063b394ee6c4ec1fe0878ff0a5cdd66 ld/testsuite/ld-scripts/default-script1.d +743d87bab1e74e0c640c260273c79367 ld/testsuite/ld-scripts/default-script2.d +c7a8b8fabda933b7d2707867c228f333 ld/testsuite/ld-scripts/default-script3.d +def46387fdbd4736a39b973f982486da ld/testsuite/ld-scripts/default-script4.d +eb19f866cc44d6d2535b7f86e692f939 ld/testsuite/ld-scripts/defined.exp +19b93ed474627147af50ef5dd4913b3d ld/testsuite/ld-scripts/defined.s +d3b1800f46a71805045a3a5732fd42bc ld/testsuite/ld-scripts/defined.t +898a5ade6aa8f7eaf68f1f700d64799b ld/testsuite/ld-scripts/defined2.d +44e50acb685e014b85b6f6d140487f89 ld/testsuite/ld-scripts/defined2.t +9e5f7ff90002487a36c98aab00769086 ld/testsuite/ld-scripts/defined3.d +0117741095baa2e563ab8014b71135c3 ld/testsuite/ld-scripts/defined3.t +1aa7e13d84c9ab15c53fb91aca325ba5 ld/testsuite/ld-scripts/defined4.d +80bc9c86d1e83e005c3f08ed5c6e5d94 ld/testsuite/ld-scripts/defined4.s +efbb1e72751b5c74e87643442098d38e ld/testsuite/ld-scripts/defined4.t +a8f026788510671d09d2cf62cfcd2123 ld/testsuite/ld-scripts/defined5.d +fa2a527dcfdfa14594c3fbe845724ad5 ld/testsuite/ld-scripts/defined5.s +634c89f141d8740d7641be42e6a938b9 ld/testsuite/ld-scripts/defined5.t +dbaca5ab0c56146533bcb91837e1ec4c ld/testsuite/ld-scripts/dynamic-sections-1.s +0f1ac5c77c696c7314db13212177296a ld/testsuite/ld-scripts/dynamic-sections-2.s +31258b14a9fe381a3b20a81aa0943441 ld/testsuite/ld-scripts/dynamic-sections.d +efbbd41c97599d90deba7f4e41c9ab3e ld/testsuite/ld-scripts/dynamic-sections.exp +cda22c60c0c5a23d00b019cc2a1deeb8 ld/testsuite/ld-scripts/dynamic-sections.t +782d1e1185e81a64808009b693496f87 ld/testsuite/ld-scripts/empty-address-1.d +37e305b6a8b6a5992478afb73a0aa3ef ld/testsuite/ld-scripts/empty-address-1.s +5a2f0df9be51622946dbb43e056c8d2d ld/testsuite/ld-scripts/empty-address-1.t +f6eaab7211c7a02da0c2d639e9d065fb ld/testsuite/ld-scripts/empty-address-2.s +15cc5bcae78e4aa1bdaaf794acf5c9b5 ld/testsuite/ld-scripts/empty-address-2a.d +441c812f4a1779b8fc7130f7f50f4a41 ld/testsuite/ld-scripts/empty-address-2a.t +cad53ff86321fee6771dc7a2f11ff323 ld/testsuite/ld-scripts/empty-address-2b.d +5c9c456d2657e87e99a29c87617299e0 ld/testsuite/ld-scripts/empty-address-2b.t +e41e9eb346bd6a273d3689973089af39 ld/testsuite/ld-scripts/empty-address-3.s +5b85a1298326abae8a4d46b0a3038e7c ld/testsuite/ld-scripts/empty-address-3a.d +229a146cac0eb2ae6f520113b1a8e3bb ld/testsuite/ld-scripts/empty-address-3a.t +960f13391ac4f8a45700c5d286aecbab ld/testsuite/ld-scripts/empty-address-3b.d +61b68acf1d4c0bbd5a0a9958746cc568 ld/testsuite/ld-scripts/empty-address-3b.t +314a6abe67053be2de44e65b2e212ffd ld/testsuite/ld-scripts/empty-address-3c.d +f19afb7f2928a588627868fd9f746c94 ld/testsuite/ld-scripts/empty-address-3c.t +9c11b3f87746abae2592133a0f2b78de ld/testsuite/ld-scripts/empty-address.exp +9eb676e81d317240bcb8eb272286acba ld/testsuite/ld-scripts/empty-aligned.d +e213ecad495055cff4ee37775f8b893f ld/testsuite/ld-scripts/empty-aligned.exp +c95f2f24f30fd409b48e6c65aed7e7b8 ld/testsuite/ld-scripts/empty-aligned.s +cadba576e289814de613ad9a36e37b28 ld/testsuite/ld-scripts/empty-aligned.t +4ec32cb171d7c5decdeda38902757e89 ld/testsuite/ld-scripts/empty-orphan.d +8923667f51cc724d30750fff98be3010 ld/testsuite/ld-scripts/empty-orphan.exp +2b91402df2ee759463e5c198571e9067 ld/testsuite/ld-scripts/empty-orphan.s +1f2cc701ae44978ae698ba85fb7ab2d1 ld/testsuite/ld-scripts/empty-orphan.t +0d5079fdad6823f9b5dc902a1c20c1ba ld/testsuite/ld-scripts/expr.exp +53b5c57797ed048cf0081b27f6f6ad43 ld/testsuite/ld-scripts/expr1.d +c026c9f5a94ccb87670ef9454c4b4457 ld/testsuite/ld-scripts/expr1.s +72dc3d110471195e8c2c2e12890a63a0 ld/testsuite/ld-scripts/expr1.t +4b54037586964b45440c1d83b1df28d4 ld/testsuite/ld-scripts/expr2.d +80bc9c86d1e83e005c3f08ed5c6e5d94 ld/testsuite/ld-scripts/expr2.s +5e2872afc8e941664adda38529c2728f ld/testsuite/ld-scripts/expr2.t +2af50d4a4afc61c7cbb803aad3c1826b ld/testsuite/ld-scripts/extern.exp +77c5ad60254674e9c8dc4adb9885680d ld/testsuite/ld-scripts/extern.s +33b9171e28d59c070a8ea1a1f023eaae ld/testsuite/ld-scripts/extern.t +b53c8d61e9a04a89474e9a9ade3b7e2f ld/testsuite/ld-scripts/include-1.d +81982091322b6f1040ad5e943560a629 ld/testsuite/ld-scripts/include-1.t +faf7d431f075db11ad96dcb61da5ff94 ld/testsuite/ld-scripts/include-data.t +12c329294118963ae97cbf0acea91b73 ld/testsuite/ld-scripts/include-mem.t +ce9fd1b956119308237b29b59314a492 ld/testsuite/ld-scripts/include-ram.t +5c3b2699f5da90ad83b0f80ffa47ef1d ld/testsuite/ld-scripts/include-sections.t +c25b58f6e971a5d5e2ffd9acaeba5c2c ld/testsuite/ld-scripts/include-subdata.t +f1e343b6a00b81ad3b7739b7f636df0c ld/testsuite/ld-scripts/include.exp +d82eab8a7c540b70a9d42c4d5f8ad5e9 ld/testsuite/ld-scripts/include.s +dad1d5a88aa3057b44cab5ed057bd0f8 ld/testsuite/ld-scripts/map-address.d +d0445e0d3c4c74f8dae6be662ceb2208 ld/testsuite/ld-scripts/map-address.exp +ee9133459395cc83547a90f71607a2e7 ld/testsuite/ld-scripts/map-address.t +38b10c0ac2168cabc2e2136b06641345 ld/testsuite/ld-scripts/memory.t +69f8c2a613c10d3d7240ba41dce31d86 ld/testsuite/ld-scripts/overlay-size-map.d +c13d85cd086921f0c99d9096753d5b59 ld/testsuite/ld-scripts/overlay-size.d +49eff27234370d5b4a3ee64be5a6b6ed ld/testsuite/ld-scripts/overlay-size.exp +2b01a21989d86f594965069b9db1a687 ld/testsuite/ld-scripts/overlay-size.s +465efb6158dbe625e28635d490c72e06 ld/testsuite/ld-scripts/overlay-size.t +9bb28244ed6f1001e8a6ebcf98c11621 ld/testsuite/ld-scripts/phdrs.exp +9af38df1b2580b0ee309b0acfb185537 ld/testsuite/ld-scripts/phdrs.s +56a4859269de48bfbf859d4d0a327e9f ld/testsuite/ld-scripts/phdrs.t +50797575ad3ddcd8fae40e26f7b93679 ld/testsuite/ld-scripts/phdrs2.exp +bbdb3e701421ecc295aca863f590193b ld/testsuite/ld-scripts/phdrs2.s +10ce00070bb4eb5f81bcde7d2f448717 ld/testsuite/ld-scripts/phdrs2.t +777551924a367d55841a9eeb6a7f84c5 ld/testsuite/ld-scripts/phdrs3.d +5dfa5ca91a88f2134aae004411e57863 ld/testsuite/ld-scripts/phdrs3.exp +6bbc947df54c8d075812ecb6de0e6dde ld/testsuite/ld-scripts/phdrs3.t +b0df290c73d331897b616c5e6cc13b17 ld/testsuite/ld-scripts/phdrs3a.d +b2f3e21cb331ff60113f9a54794a600a ld/testsuite/ld-scripts/phdrs3a.t +e9fefb7de97b4937234f4f72ed5b3406 ld/testsuite/ld-scripts/provide-1.d +252d36bfea703ce0d2506e236f2f3db3 ld/testsuite/ld-scripts/provide-1.s +a29f1a3f99b5fca57b47a0c79e570c44 ld/testsuite/ld-scripts/provide-1.t +54dbd4232cd3eac2e29209e757f7782e ld/testsuite/ld-scripts/provide-2.d +11d70d7ac52d4044cec8d6e9f12c754d ld/testsuite/ld-scripts/provide-2.s +c75f381e3417a08d872ae204c2b8627f ld/testsuite/ld-scripts/provide-2.t +0f2e46274037262a991b96738b30a16e ld/testsuite/ld-scripts/provide-3.d +252d36bfea703ce0d2506e236f2f3db3 ld/testsuite/ld-scripts/provide-3.s +f78db69d068819fd77beecf6ee3b91b0 ld/testsuite/ld-scripts/provide-3.t +6a2f60d04dcb58a2c16747768a94c647 ld/testsuite/ld-scripts/provide.exp +fb6c05c867db1b969daca1d830f3bb17 ld/testsuite/ld-scripts/region-alias-1.t +53f2c50706ceb0f728816e769ad766dd ld/testsuite/ld-scripts/region-alias-2.t +24c24801461d9cec5d704b5c208afb3f ld/testsuite/ld-scripts/region-alias-3.t +dc1f50c60034f324016cbf789f431836 ld/testsuite/ld-scripts/region-alias-4.t +f0a2370e05e263570d85f04b36bf3a18 ld/testsuite/ld-scripts/rgn-at.exp +da2cb6b70163cfb23cef6b1908f923f5 ld/testsuite/ld-scripts/rgn-at.s +8857d53753ad8a9a69ac2f457a6ff830 ld/testsuite/ld-scripts/rgn-at1.d +e56df4116cc3a635ace207e3e189c58d ld/testsuite/ld-scripts/rgn-at1.t +a3dd4b1b3b059ff5a43e4f5c980d111a ld/testsuite/ld-scripts/rgn-at2.d +0b77db3e0cc95ef37de335174d35a3e2 ld/testsuite/ld-scripts/rgn-at2.t +589aaa26a4c3fd5279ab20d6ef88af91 ld/testsuite/ld-scripts/rgn-at3.d +942fe0360820a3e6618ad426317ed940 ld/testsuite/ld-scripts/rgn-at3.t +f7d1da70dc15a99802d5d100357c5552 ld/testsuite/ld-scripts/rgn-at4.d +d3e36eb38d25f61fe0e7e199b81cc839 ld/testsuite/ld-scripts/rgn-at4.t +54ad9a22cc4ab9cb41a011f1d2fdfb27 ld/testsuite/ld-scripts/rgn-at5.d +583bee06b7ae8e1ebd4785762bb24bf8 ld/testsuite/ld-scripts/rgn-at5.s +e82261fb2abdba3fd5af311575ad8443 ld/testsuite/ld-scripts/rgn-at5.t +afdffd4c10488414310425809494d1f1 ld/testsuite/ld-scripts/rgn-over.exp +7a2042cc7b75ed2d99c10434557fe53b ld/testsuite/ld-scripts/rgn-over.s +7b762eac6aaa4c6717a4851629ec430a ld/testsuite/ld-scripts/rgn-over1.d +d042ba15e789862844d3567d5c34590e ld/testsuite/ld-scripts/rgn-over1.t +2929ff5083173e3e630305962837185c ld/testsuite/ld-scripts/rgn-over2.d +633f6209ac58ff68f2ce07a1f49abad3 ld/testsuite/ld-scripts/rgn-over2.t +319193fbf2749b42b1fcc0cbb1ac3f21 ld/testsuite/ld-scripts/rgn-over3.d +249d6556eb3a260814ad9c300ed93ce0 ld/testsuite/ld-scripts/rgn-over3.t +34ab8cad75650ce6463f5c4ba36b96f5 ld/testsuite/ld-scripts/rgn-over4.d +a70a2128a6e2c1726f52556fbb83b44b ld/testsuite/ld-scripts/rgn-over4.t +dab2d9e3e6ce1aee26cc40017cbfce3e ld/testsuite/ld-scripts/rgn-over5.d +f2331c87b67cdcfad3af88986f0bb5d5 ld/testsuite/ld-scripts/rgn-over5.t +f52439f1c6d6f9b03c330137a3c49ed3 ld/testsuite/ld-scripts/rgn-over6.d +ea1b5252b852c1614f04e6cadc34cd75 ld/testsuite/ld-scripts/rgn-over6.t +7d862740a9220373229b5385d5f0fe54 ld/testsuite/ld-scripts/rgn-over7.d +bfe38970de830574ee079fb1c710c517 ld/testsuite/ld-scripts/rgn-over7.t +f0e3279ba6ca61906e6cbea50d2b5c91 ld/testsuite/ld-scripts/rgn-over8-ok.d +3dd2c945738f89259e8b3482e3e6c3dd ld/testsuite/ld-scripts/rgn-over8.s +748d4af6cc8c930a5c83de09e5a524c4 ld/testsuite/ld-scripts/rgn-over8.t +1cb29be0c0615225fb7a56f862fe1b78 ld/testsuite/ld-scripts/sane1.d +032ac062bfb635fe38448d913cca4766 ld/testsuite/ld-scripts/sane1.t +4dc72a7b31fb891e5ac50c49358b4d92 ld/testsuite/ld-scripts/script.exp +8ef222fed2cbd6222ef9c4bfb5caceb3 ld/testsuite/ld-scripts/script.s +b9bc56b095f61ceef7cb9a948be41609 ld/testsuite/ld-scripts/script.t +a673788e6a586931f65fee9d8964d0b8 ld/testsuite/ld-scripts/scriptm.t +9d3529fa043f75f30a4e2990493956c4 ld/testsuite/ld-scripts/section-flags-1.s +d7487d8924eab1630b0d8131069345f9 ld/testsuite/ld-scripts/section-flags-1.t +9d3529fa043f75f30a4e2990493956c4 ld/testsuite/ld-scripts/section-flags-2.s +c019b57229b0871f58f68f5688133ff1 ld/testsuite/ld-scripts/section-flags-2.t +468e21a078b40951fcc68f05a671153f ld/testsuite/ld-scripts/section-flags.exp +df1bf4fee3afe7e9a4e97c14692d7522 ld/testsuite/ld-scripts/section-match-1.d +755dfef5103770186ec46d3a94537c65 ld/testsuite/ld-scripts/section-match-1.s +9256bc51ef1b557e1c8c629dd3cb2dfc ld/testsuite/ld-scripts/section-match-1.t +c99e63386e43db3aa484eaccc80f34af ld/testsuite/ld-scripts/section-match.exp +e2756a97ddf7bb419a571e8d4b429770 ld/testsuite/ld-scripts/size-1.d +17de08fa9310489af79bed8573e8580f ld/testsuite/ld-scripts/size-1.s +ba30176f3ba8f8598896e2af7928cbdc ld/testsuite/ld-scripts/size-1.t +de78df3229d27e6b870edaf7151a9d69 ld/testsuite/ld-scripts/size-2.d +e578260bc547df59e5b871c5024c0dbf ld/testsuite/ld-scripts/size-2.s +00e961a746e3d2e2b5f03d09c95fcf32 ld/testsuite/ld-scripts/size-2.t +31a18bc9a5835ced1936b274703597c7 ld/testsuite/ld-scripts/size.exp +9cbd10fa233d61e42b3f7c85ddf6b2f0 ld/testsuite/ld-scripts/sizeof.exp +de2cf65f9506880e63f0fdd46bb23c12 ld/testsuite/ld-scripts/sizeof.s +feffaafc250ae18dfdd493f8a6c4f2c6 ld/testsuite/ld-scripts/sizeof.t +dbff5d620a5e5c880adc1bbc3dda0bdb ld/testsuite/ld-scripts/sort.exp +0c8a78259c126ecd88cda54315baa73b ld/testsuite/ld-scripts/sort.t +5536ed80165d30d382a59d846a58b1e3 ld/testsuite/ld-scripts/sort_b_a-1.d +14683b60bd34c5a064bcc88222128e22 ld/testsuite/ld-scripts/sort_b_a-1.s +da4242bab81d89c1682637ca128c27fb ld/testsuite/ld-scripts/sort_b_a.d +2a7ba0612ef2af4e245c31f61df233c7 ld/testsuite/ld-scripts/sort_b_a.s +36cc8d4f65a52fb4e1eaf36bc7bbe44a ld/testsuite/ld-scripts/sort_b_a.t +2a0f1118c7d3cb58105b2afd481ad0e7 ld/testsuite/ld-scripts/sort_b_a_a-1.d +2b902d918a3dd70faf4f2ca72ed0a4df ld/testsuite/ld-scripts/sort_b_a_a-2.d +df004b656eab6b649c18a0fa872836e7 ld/testsuite/ld-scripts/sort_b_a_a-3.d +d473185f8d72002be55218833f37bcf4 ld/testsuite/ld-scripts/sort_b_a_a.t +4f0d46f4163b36e3be334118dec07c6b ld/testsuite/ld-scripts/sort_b_a_n-1.d +4ba7f5856092bbc604d90a25a82d9002 ld/testsuite/ld-scripts/sort_b_a_n-2.d +06945d92dab23a6ad33325b013714ea0 ld/testsuite/ld-scripts/sort_b_a_n-3.d +6f540fc89fed53206b9f9733abe128e6 ld/testsuite/ld-scripts/sort_b_a_n.t +43f980803c99479bf2938b422a890450 ld/testsuite/ld-scripts/sort_b_n-1.d +a1bbd77fcfc41ef745c58d9c4c81d609 ld/testsuite/ld-scripts/sort_b_n-1.s +7eeadbe2fcb152148ec269ae0dc79844 ld/testsuite/ld-scripts/sort_b_n.d +c55eb84613680619dda395823061937a ld/testsuite/ld-scripts/sort_b_n.s +40cea4acf0dfcb3e6815b18b86f34abb ld/testsuite/ld-scripts/sort_b_n.t +111e404949e70caf1b806b4d3448a598 ld/testsuite/ld-scripts/sort_b_n_a-1.d +0024b8b67af6d9e9a8a558a9c2d73c26 ld/testsuite/ld-scripts/sort_b_n_a-2.d +6a88ea9875b61ef99419c6fb888420bf ld/testsuite/ld-scripts/sort_b_n_a-3.d +1a767732a300cd1c1ed8f4a7f8460d60 ld/testsuite/ld-scripts/sort_b_n_a.t +18a68bd595fd68ed40f09c6676b5b878 ld/testsuite/ld-scripts/sort_b_n_n-1.d +4760dad5a36247b10293d1c4b54697a2 ld/testsuite/ld-scripts/sort_b_n_n-2.d +b50d7df963ca79009ad9aaa5991eddda ld/testsuite/ld-scripts/sort_b_n_n-3.d +84b350ab758b1aa07651cf48b7be57f9 ld/testsuite/ld-scripts/sort_b_n_n.t +b78a0c1ba0c480990053d50a6b85174a ld/testsuite/ld-scripts/sort_n_a-a.s +8f250dd3d26296f2f6783e2c554ad5db ld/testsuite/ld-scripts/sort_n_a-b.s +fede375092520c3488fd72b37a015940 ld/testsuite/ld-scripts/sort_no-1.d +259f809dfa3e7cc13b023f5997a33377 ld/testsuite/ld-scripts/sort_no-2.d +dd867dcc221b34eac130495d74555792 ld/testsuite/ld-scripts/sort_no.t +f3706a7d96cddce61177e371c3dd08cb ld/testsuite/ld-scripts/weak.exp +3591b42540bac07bfbb66f7f0ce59d88 ld/testsuite/ld-scripts/weak.t +409c80a8100bab5cf2d2e4d49d270eff ld/testsuite/ld-scripts/weak1.s +6907d9f57513ed7b3a49ea61ba43b270 ld/testsuite/ld-scripts/weak2.s +3f6043e6b6bd49e760b9e753b6aaf9ac ld/testsuite/ld-selective/1.c +237d849095a360c8cad108dd7c84812b ld/testsuite/ld-selective/2.c +33a18955ad41f28b49c5cbe7a8ec6f90 ld/testsuite/ld-selective/3.cc +7a88a85be95ddb758a06f65387cf61e3 ld/testsuite/ld-selective/4.cc +30057150e6799981d84c149803078de1 ld/testsuite/ld-selective/5.cc +76de65cf7643a5a9d830781a6ddb4ec2 ld/testsuite/ld-selective/keepdot.d +271e265ec183206674aa523fd3758fe8 ld/testsuite/ld-selective/keepdot.ld +ee25e606252413aba69f02431147ff1c ld/testsuite/ld-selective/keepdot.s +d38b74170368286b6fd747373a2ecdf5 ld/testsuite/ld-selective/keepdot0.d +cd27e66eaeaab29aa416b21a3aeb060d ld/testsuite/ld-selective/keepdot0.ld +a8872b0001c7265e2af69fe8fb5ca4e8 ld/testsuite/ld-selective/sel-dump.exp +47e014d02b1864575790fb78782f08d7 ld/testsuite/ld-selective/selective.exp +73a915d57966bbb8dcc25ced0576fc29 ld/testsuite/ld-sh/arch/arch.exp +78ec6e7ed56d41b67e395d890b2b9a19 ld/testsuite/ld-sh/arch/arch_expected.txt +557989b111b9dab8e12592d4468c3e37 ld/testsuite/ld-sh/arch/sh-dsp.s +fad623280164b76e8e26f3fefeb21456 ld/testsuite/ld-sh/arch/sh.s +d4b973efa0a1174ecf7403b949d8fef5 ld/testsuite/ld-sh/arch/sh2.s +902449247a1f51fe8d542285c15186fe ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s +597181c5e888fec077372304556c6b14 ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s +c99858e0fe821ffaa35d9f79326782be ld/testsuite/ld-sh/arch/sh2a-nofpu.s +001175cf372c9958c8edbd1a9c673896 ld/testsuite/ld-sh/arch/sh2a-or-sh3e.s +fcd26cad36753392667255e1206d9023 ld/testsuite/ld-sh/arch/sh2a-or-sh4.s +a58353e9d1a147699f4b511c583787f7 ld/testsuite/ld-sh/arch/sh2a.s +66b8534721a9a4642d334ca7ffaf493f ld/testsuite/ld-sh/arch/sh2e.s +ba99caf1cf49cc62487f954f25421850 ld/testsuite/ld-sh/arch/sh3-dsp.s +29d33f8568c4725231c2987e265a2368 ld/testsuite/ld-sh/arch/sh3-nommu.s +c49644b7b8370e6427f9feaf80e70b2b ld/testsuite/ld-sh/arch/sh3.s +4d36649f1200dcdb4901e2551b378729 ld/testsuite/ld-sh/arch/sh3e.s +0e5fbe5b90dc04d700fc142c0bf211ad ld/testsuite/ld-sh/arch/sh4-nofpu.s +abc2ec66346c95fa67fa4e92cbd18a02 ld/testsuite/ld-sh/arch/sh4-nommu-nofpu.s +e3ad9d8364abb400e720c763f2015f49 ld/testsuite/ld-sh/arch/sh4.s +b70176213702cb636c0e11124483c6c9 ld/testsuite/ld-sh/arch/sh4a-nofpu.s +38e54ba4a93b881e8d378cc0e93e99e4 ld/testsuite/ld-sh/arch/sh4a.s +08b3726b81639384ea64661f7b57faad ld/testsuite/ld-sh/arch/sh4al-dsp.s +08e0e7cab61e86f66674a1cfeee1569a ld/testsuite/ld-sh/fdpic-funcdesc-shared.d +b7ca2c0d25ef8ea5c7ebd3219fc3c046 ld/testsuite/ld-sh/fdpic-funcdesc-shared.s +8f05b64441d35be356191cf18922185e ld/testsuite/ld-sh/fdpic-funcdesc-static.d +00c8da60675cafd24c971037bfdd388f ld/testsuite/ld-sh/fdpic-funcdesc-static.s +3144f0b16f27b5b9a646595be2e6b38c ld/testsuite/ld-sh/fdpic-gotfuncdesc-shared.d +1f703764ffec03825caa562c9bef63f7 ld/testsuite/ld-sh/fdpic-gotfuncdesc-shared.s +ccb5b7420339c46917d9dd3144649fed ld/testsuite/ld-sh/fdpic-gotfuncdesc-static.d +68061bb5d09636f5a5becd032d4def35 ld/testsuite/ld-sh/fdpic-gotfuncdesc-static.s +d5f2eee9ddf9a7fcf42a3791856621f1 ld/testsuite/ld-sh/fdpic-gotfuncdesci20-shared.d +f32fddd42f500422533c2386817df2a4 ld/testsuite/ld-sh/fdpic-gotfuncdesci20-shared.s +53f10f89b608a1ec9adaed658eea0cd7 ld/testsuite/ld-sh/fdpic-gotfuncdesci20-static.d +2995890abbe703706e5efe71973b4277 ld/testsuite/ld-sh/fdpic-gotfuncdesci20-static.s +173607afdfc9f75cca209a1711e93755 ld/testsuite/ld-sh/fdpic-goti20-shared.d +21b52dcd8978b83fea8dc4bb36ff357f ld/testsuite/ld-sh/fdpic-goti20-shared.s +12b7d3aae861169f0415bef32883169a ld/testsuite/ld-sh/fdpic-goti20-static.d +fee031495d05dba39b0f59202b343ec1 ld/testsuite/ld-sh/fdpic-goti20-static.s +d4366fdad6611f79acccbd05a876aab5 ld/testsuite/ld-sh/fdpic-gotofffuncdesc-shared.d +753be37534a209985aaa37f31c17f892 ld/testsuite/ld-sh/fdpic-gotofffuncdesc-shared.s +e9c0ab7fc9e3dbe37f7c4f80113e0743 ld/testsuite/ld-sh/fdpic-gotofffuncdesc-static.d +3304f51acbfd50a4009764b5b2830dac ld/testsuite/ld-sh/fdpic-gotofffuncdesc-static.s +9cf60942cb1c0f498dc2799b02151299 ld/testsuite/ld-sh/fdpic-gotofffuncdesci20-shared.d +a919fef130c2da2de8ddd7a1ba67cd88 ld/testsuite/ld-sh/fdpic-gotofffuncdesci20-shared.s +b4ac940b1b06970c887dd3d365c694d0 ld/testsuite/ld-sh/fdpic-gotofffuncdesci20-static.d +eee2a25c20104abb341d7b72b569ddc6 ld/testsuite/ld-sh/fdpic-gotofffuncdesci20-static.s +59fd22efb0f5253c17c4c627faae4e2b ld/testsuite/ld-sh/fdpic-gotoffi20-shared.d +cd08a3ae64807ed0c93b91a753390983 ld/testsuite/ld-sh/fdpic-gotoffi20-shared.s +4339ea2ee1513cbb54e7f0430e057975 ld/testsuite/ld-sh/fdpic-gotoffi20-static.d +5d49bfa39d2a669ae7efd38d4240f8d5 ld/testsuite/ld-sh/fdpic-gotoffi20-static.s +79c5c77b067370eab8005cf02f649cc1 ld/testsuite/ld-sh/fdpic-plt-be.d +54bfceff3d3d49f509d1dc3eff7b68bf ld/testsuite/ld-sh/fdpic-plt-le.d +8d75b12c5e4608c97885a53fc27f2e25 ld/testsuite/ld-sh/fdpic-plt.s +a75fec2fd070c93a53aaf2380a1c229a ld/testsuite/ld-sh/fdpic-plti20-be.d +280c5f991a4027dcfcf53788a913a9d4 ld/testsuite/ld-sh/fdpic-plti20-le.d +b967c170071a0f150a82ff19d16f128b ld/testsuite/ld-sh/fdpic-stack-default.d +46e4de8ad6e333029397cb1d9e8d889f ld/testsuite/ld-sh/fdpic-stack-size.d +a9cc0bc39eb06a4ce1b7c4d1312e2ed4 ld/testsuite/ld-sh/fdpic-stack.s +43e8d60f2a62e4ece8534aea455162a4 ld/testsuite/ld-sh/ld-r-1.d +fcbd70b5e55afc67cf17a5dba6a0290f ld/testsuite/ld-sh/ldr1.s +6217cc9778d5febfad3e5024c6962262 ld/testsuite/ld-sh/ldr2.s +f993034a5f3b4230308fa7a3ec1db5b1 ld/testsuite/ld-sh/rd-sh.exp +e9e3ce39a4375e74b04f76bc399e99d9 ld/testsuite/ld-sh/refdbg-0-dso.d +c2ba4cf7fc6b62779e73289f6f51a673 ld/testsuite/ld-sh/refdbg-1.d +0d52d82e4d568ef945cfa6703f03abd7 ld/testsuite/ld-sh/refdbg.s +b82d1cf4ae77e96d5e1e611ee68c70f1 ld/testsuite/ld-sh/refdbglib.s +19d71cb628de2ed19de5d64c8b26c11f ld/testsuite/ld-sh/reloc1.d +7d4b394df1b77a9a50bf939780228499 ld/testsuite/ld-sh/reloc1.s +c382624fa00089b4604f1650402f70e3 ld/testsuite/ld-sh/sh-vxworks.exp +fdf3c2cc461c1e384d1530fe5c3dea97 ld/testsuite/ld-sh/sh.exp +1480d5643c4a3a7456700440e9f108dc ld/testsuite/ld-sh/sh1.s +4a6b928d31480c42bc368db1a2d729b3 ld/testsuite/ld-sh/sh2.c +0c9bfb09d4093045c3990998fa1df825 ld/testsuite/ld-sh/sh64/abi32.sd +c0ace4859c99c559854cbf35c20ac9ed ld/testsuite/ld-sh/sh64/abi32.xd +d343449d8a4c030206c31db085d733fd ld/testsuite/ld-sh/sh64/abi64.sd +8bf79bf1db98c6439cdd28c89f52d143 ld/testsuite/ld-sh/sh64/abi64.xd +7388fb47e1ddc604bc9d87535eb410a7 ld/testsuite/ld-sh/sh64/abixx-noexp.sd +ad7ca775ab56187b50c88f7a58466375 ld/testsuite/ld-sh/sh64/cmpct1.sd +d60df39955633a62106ca5a322f314f0 ld/testsuite/ld-sh/sh64/cmpct1.xd +c73961a0fad1d2fd62629de1fe0c70b1 ld/testsuite/ld-sh/sh64/crange-1.s +328b703c9b5066d401795ff6de9bc0bd ld/testsuite/ld-sh/sh64/crange-2a.s +e69fa9d1375fcd6ccd984389dba319ce ld/testsuite/ld-sh/sh64/crange-2b.s +3b4485d90727fe240d30e5a24bc087e5 ld/testsuite/ld-sh/sh64/crange-2c.s +ae8e3795860a4b62529c938fee840d4e ld/testsuite/ld-sh/sh64/crange-2d.s +27c04cbc6a54fa6b2ca6457bb17afd6c ld/testsuite/ld-sh/sh64/crange-2e.s +06ec994967c3e725e37aebb6fb2b54c4 ld/testsuite/ld-sh/sh64/crange-2f.s +e38d05441f7886533954e1385c29387c ld/testsuite/ld-sh/sh64/crange-2g.s +9689bde27dc2484a1a938f1fef07ded9 ld/testsuite/ld-sh/sh64/crange-2h.s +1462c3fa6661a753105fe81a4c6db1dc ld/testsuite/ld-sh/sh64/crange-2i.s +960bca806da7375f03d5e11ec2c1c13a ld/testsuite/ld-sh/sh64/crange1.rd +675205a897d5cf02f4d964e047712436 ld/testsuite/ld-sh/sh64/crange2.rd +bb0d93f60c79043447e61cff26d6a538 ld/testsuite/ld-sh/sh64/crange3-cmpct.rd +b14b3dd3637dca6b1b32875e1d2d887e ld/testsuite/ld-sh/sh64/crange3-media.rd +3ffebeae6c08139aa36e21265106298e ld/testsuite/ld-sh/sh64/crange3.dd +81a3531cd9b16acc87fe347db72a11c0 ld/testsuite/ld-sh/sh64/crange3.rd +58e072dfd80d2cd694d4ad0f0f97acbd ld/testsuite/ld-sh/sh64/crangerel1.rd +2d94cdec959aa9069ba61085ea176a2e ld/testsuite/ld-sh/sh64/crangerel2.rd +f94546e3da61ec674a5b48991732a50c ld/testsuite/ld-sh/sh64/dlsection-1.s +e2633ad84cbe5531e77222843f9fd304 ld/testsuite/ld-sh/sh64/dlsection.sd +60b3ba2f0c4a5ca923893a894a582ac9 ld/testsuite/ld-sh/sh64/endian.dbd +41884e5b1b3e647fe52be17cf58e47ad ld/testsuite/ld-sh/sh64/endian.dld +439a304e3df929f85ebb3859142504f2 ld/testsuite/ld-sh/sh64/endian.ld +5e4c7d2bf96d59c028edefdbafb057a8 ld/testsuite/ld-sh/sh64/endian.s +3f58d6c1b5b4570ad625f96257c7c075 ld/testsuite/ld-sh/sh64/endian.sbd +0261b327b1e190bd7466855c6c73d527 ld/testsuite/ld-sh/sh64/endian.sld +21c057a0221ab44ce372fe73e1c317e6 ld/testsuite/ld-sh/sh64/gotplt.d +647197c48fed383b904f232572a2bb5b ld/testsuite/ld-sh/sh64/gotplt.map +ccb113dc467f4239cc25eb43b6adfd80 ld/testsuite/ld-sh/sh64/gotplt.s +76ed01a76f418c6db9d67d67b3074643 ld/testsuite/ld-sh/sh64/init-cmpct.d +3188da7e8915725e3af3ff13f57e02b7 ld/testsuite/ld-sh/sh64/init-media.d +22383ca3faac1674e7e8421c0ba7112f ld/testsuite/ld-sh/sh64/init.s +66f1379b6447cac03fea20a698e2eba1 ld/testsuite/ld-sh/sh64/init64.d +b2901603c0c019a5d4cf0b7ed51b006c ld/testsuite/ld-sh/sh64/mix1-noexp.sd +5c7c4d0f5810013fb5c35ad744d6feb2 ld/testsuite/ld-sh/sh64/mix1.sd +6f19d7165de8745c558390ef2d42d3ca ld/testsuite/ld-sh/sh64/mix1.xd +46b3cfa7c4d7934f4097735882648405 ld/testsuite/ld-sh/sh64/mix2-noexp.sd +67bf07be014e835273718d75e3e00949 ld/testsuite/ld-sh/sh64/mix2.sd +b1fc40b02731641c993b9d2786b63422 ld/testsuite/ld-sh/sh64/mix2.xd +dea5072d0a6835059b328f8cf0189d72 ld/testsuite/ld-sh/sh64/rd-sh64.exp +1166b5637fcaa5ab2f65d7604c8e0dea ld/testsuite/ld-sh/sh64/rel-1.s +dc52fd286f5e3e3ba2a0453bb7be7cf8 ld/testsuite/ld-sh/sh64/rel-2.s +009b175a14c6322db0227ded1bf1bbe9 ld/testsuite/ld-sh/sh64/rel32.xd +88aeed77160b92aad6fb63d90847cf49 ld/testsuite/ld-sh/sh64/rel64.xd +027d20a3fba198f5cf9416edcbb018a2 ld/testsuite/ld-sh/sh64/relax.exp +ad76cea000fec5b3c623528c4f90f28f ld/testsuite/ld-sh/sh64/relax1.s +82c91e0d07cc0794161fd6919925329c ld/testsuite/ld-sh/sh64/relax2.s +558087d48e4ae36850b1b6c8b769e0f2 ld/testsuite/ld-sh/sh64/relax3.s +a2dffd9f6049f25cbf6c6daf57da3672 ld/testsuite/ld-sh/sh64/relax4.s +428b3202ce30a114bbb92ece7d8fcc86 ld/testsuite/ld-sh/sh64/reldl-1.s +861e2f1ff73cc48552826aa5b007ccf8 ld/testsuite/ld-sh/sh64/reldl-2.s +7bbce83842ce15d9355f8134c959aaa7 ld/testsuite/ld-sh/sh64/reldl32.rd +991f96b93383296bd226439a5a17f01a ld/testsuite/ld-sh/sh64/reldl64.rd +3c1b9582e5213c1da0868e346fb303aa ld/testsuite/ld-sh/sh64/relfail.exp +dcb15c3eaafdd677a4bed69b52d8fd20 ld/testsuite/ld-sh/sh64/relfail.s +4a9f958e1de298410352eacfc2790042 ld/testsuite/ld-sh/sh64/sh64-1.s +e57b411a1bd1e2c3492480270ab84327 ld/testsuite/ld-sh/sh64/sh64-2.s +883f632ee1028b121dd01c1346117aac ld/testsuite/ld-sh/sh64/sh64.exp +6d672ac557ea34ee06eb8cb94b8f78d4 ld/testsuite/ld-sh/sh64/shcmp-1.s +92a5607059e99b0b7a7121305ce083e7 ld/testsuite/ld-sh/sh64/shdl-1.s +70a7a20b4381c32e89e9dd7615393ec2 ld/testsuite/ld-sh/sh64/shdl-2.s +c605c8c517ccebb827b1c819a77d95a9 ld/testsuite/ld-sh/sh64/shdl32.xd +2d4cbb3a76469076a359f59724cf3dcb ld/testsuite/ld-sh/sh64/shdl64.sd +f237169788ef3bb7c9a0ea485b3cb05a ld/testsuite/ld-sh/sh64/shdl64.xd +225a060f4b88eb8436ca23e73d7e06ec ld/testsuite/ld-sh/sh64/shmix-1.s +19c270c7b2605695a6fb613668c202c8 ld/testsuite/ld-sh/sh64/shmix-2.s +faf5405f3d08893ba5e6a20f7f9928b0 ld/testsuite/ld-sh/sh64/shmix-3.s +b0ab0fbf8d440fa329d565a5ccbba1e1 ld/testsuite/ld-sh/sh64/stobin-0-dso.d +6771e1b630e85e22e0634aa1d166e81c ld/testsuite/ld-sh/sh64/stobin-1.d +2e309ebf433520a9f601ac736fdacb9d ld/testsuite/ld-sh/sh64/stobin.s +51780faee227e3a457101e3a7d2fde0e ld/testsuite/ld-sh/sh64/stolib.s +cacd2a6c0809a38683c3ebcf941eb098 ld/testsuite/ld-sh/shared-1.d +af8dee7b2a6f9c36b48c981da8fd4ef3 ld/testsuite/ld-sh/shared-2.d +486895674299bb2c523133e56a567c1f ld/testsuite/ld-sh/start.s +6bc448baf0ba7a42eb02cb25dcffbce2 ld/testsuite/ld-sh/sub2l-1.d +e28a2e0da19c4548dff752131cc9c4ef ld/testsuite/ld-sh/sub2l.s +f7e4c5f7cd622652943bd47ebc9a5a23 ld/testsuite/ld-sh/textrel1.s +68cf0838e9de11a99ab1720e6d05fc00 ld/testsuite/ld-sh/textrel2.s +452b14908770e945a2bce149204fc59a ld/testsuite/ld-sh/tlsbin-0-dso.d +da0a5cefe3b71f1b9090aaa7da861753 ld/testsuite/ld-sh/tlsbin-1.d +29c061857bc4b38869b3a7db8f589978 ld/testsuite/ld-sh/tlsbin-2.d +94528c95120b315ec999bfdf77044934 ld/testsuite/ld-sh/tlsbin-3.d +158222b1966ec79c1ece1a6f9721207c ld/testsuite/ld-sh/tlsbin-4.d +ad4606e3e2ff81551d474deb3bc1f9bd ld/testsuite/ld-sh/tlsbin.s +34f93fd97a11c009cae4ff7574890043 ld/testsuite/ld-sh/tlsbinpic.s +ec3e44acc84eb03c62466be835ee927f ld/testsuite/ld-sh/tlslib.s +653138b34fe1965b2b01867cf1599306 ld/testsuite/ld-sh/tlspic-1.d +0cdf8200d895d533006ae6c7468bff48 ld/testsuite/ld-sh/tlspic-2.d +0fba19a4394a0643eff7462e9ca89d6e ld/testsuite/ld-sh/tlspic-3.d +d37960962cb3bc48f6638db2bb7353a0 ld/testsuite/ld-sh/tlspic-4.d +a97a184577f5d28dd41b482b6f128426 ld/testsuite/ld-sh/tlspic1.s +e43032ce8828ef5065ea1bb6480a92fe ld/testsuite/ld-sh/tlspic2.s +ea63dd2c251319d01e9e2fbe165f3e3d ld/testsuite/ld-sh/tlstpoff-1.d +06496514e5705479dc0185db500a3d19 ld/testsuite/ld-sh/tlstpoff-2.d +eaf0ef9de13413ca33a79cb688c72a2f ld/testsuite/ld-sh/tlstpoff1.s +21e7feeb0b7856ed94bc352c7169925a ld/testsuite/ld-sh/tlstpoff2.s +1e03ac52aa0f8ed98dcb600cd74ede8a ld/testsuite/ld-sh/vxworks1-le.dd +cc8c72280792e66cb1fd8a2cd81f4d11 ld/testsuite/ld-sh/vxworks1-lib-le.dd +9d59315c381b523e07e2e39cd84d99aa ld/testsuite/ld-sh/vxworks1-lib.dd +2ed93b7c8314a1e06fb6a3b7d652f4ca ld/testsuite/ld-sh/vxworks1-lib.nd +9d066d0b81f0652e2477b47374c4f001 ld/testsuite/ld-sh/vxworks1-lib.rd +f6abfedd8af59f438fcd169e2f34c389 ld/testsuite/ld-sh/vxworks1-lib.s +6dbdc5d4346169b9a3af98707d77be72 ld/testsuite/ld-sh/vxworks1-lib.td +b9df1b5a4946b883b92ea5354df78679 ld/testsuite/ld-sh/vxworks1-static.d +1af56805c06364621dd866e34a4e573d ld/testsuite/ld-sh/vxworks1.dd +ff6cb82bd3dda9cb4328b50f2d88614e ld/testsuite/ld-sh/vxworks1.ld +99596da509153a5dfb0d4dd0e1e7ec33 ld/testsuite/ld-sh/vxworks1.rd +6de131fbfcb4ab6079a4ec80394d8b6b ld/testsuite/ld-sh/vxworks1.s +165ed1561458c0973255f985be876845 ld/testsuite/ld-sh/vxworks2-static.sd +9ffae98b2aab1eed51a33b3b0bcdcb1d ld/testsuite/ld-sh/vxworks2.s +7afb4e2fc8be35ad985dcb2e21b7cbef ld/testsuite/ld-sh/vxworks2.sd +87e691828effe17e730b1515714437df ld/testsuite/ld-sh/vxworks3-le.dd +1067992266f34cef766f380d7fc1ead7 ld/testsuite/ld-sh/vxworks3-lib-le.dd +14fa3604ffe3103ad305a399f975b0ea ld/testsuite/ld-sh/vxworks3-lib.dd +109d3f60a868184e51e6885ef65907c2 ld/testsuite/ld-sh/vxworks3-lib.s +47350b95b323a67ada1c85af73dea2c8 ld/testsuite/ld-sh/vxworks3.dd +9f85716a9ae373e4e73bf7ee89fc5e01 ld/testsuite/ld-sh/vxworks3.s +b56ed270ed90ba5b27712d7984f7959b ld/testsuite/ld-sh/vxworks4.d +af10740ee3a0625ebcbc85074ad64b11 ld/testsuite/ld-sh/vxworks4a.s +d5d5e008f55ee9e9e2574ed81e76f7fe ld/testsuite/ld-sh/vxworks4b.s +f4202fe02285184a2211e0467471ddb3 ld/testsuite/ld-sh/weak1.d +89c396121b4c938815e9d8009f25ee37 ld/testsuite/ld-sh/weak1.s +ddd798dc8d3f3ac1d32ac854229d259d ld/testsuite/ld-shared/elf-offset.ld +b3eebcd693dc11f3c180628d1ac95de6 ld/testsuite/ld-shared/main.c +20161dcba239652c4c9434662685a545 ld/testsuite/ld-shared/sh1.c +63f2b4674ec691e3ec08f14f48fb1eb5 ld/testsuite/ld-shared/sh2.c +7ac9ed1cf3e4b23bd77743315f0560d5 ld/testsuite/ld-shared/shared.dat +470a83a634408ccc558a2cf3580c9836 ld/testsuite/ld-shared/shared.exp +8b38128b19d7be0a9f143a3fae14669f ld/testsuite/ld-shared/sun4.dat +e8d8c5ef094b26b46377375f8ef076c3 ld/testsuite/ld-shared/symbolic.dat +bf16787cbff593c9377800bda68bc12b ld/testsuite/ld-shared/xcoff.dat +a15f70e96ad2a54e081863c040468da9 ld/testsuite/ld-sparc/gotop32.dd +a9e4db33afb06eb11e404411744aeda8 ld/testsuite/ld-sparc/gotop32.rd +01c8d6c8a11f0671d2138c7359ed9060 ld/testsuite/ld-sparc/gotop32.s +3bbe5dbb9d0b1ecdb97f16d55f587ef8 ld/testsuite/ld-sparc/gotop32.sd +a319e3cc93a6858774e449a4ea8d5a62 ld/testsuite/ld-sparc/gotop32.td +342f2bebf768aca33754cf700d772318 ld/testsuite/ld-sparc/gotop64.dd +4f5157e16bd71200aa9479ad2845ba59 ld/testsuite/ld-sparc/gotop64.rd +68eff3160bb0e8b5437674b29637cfa2 ld/testsuite/ld-sparc/gotop64.s +cb763c8c9d111eacfe9a31279c1df6cd ld/testsuite/ld-sparc/gotop64.sd +2ee5cbf57479046f5a4f68e9324d6de5 ld/testsuite/ld-sparc/gotop64.td +c08cd49224f7e0291eec92677d5bc316 ld/testsuite/ld-sparc/sparc.exp +f2cc7e2a6d73ba0523e4152cfca6b713 ld/testsuite/ld-sparc/tlsg32.s +b129627f00eb462a2166203641df5770 ld/testsuite/ld-sparc/tlsg32.sd +bd716e9b7672e56e96e7f293350410c2 ld/testsuite/ld-sparc/tlsg64.s +3610c4fe70c3ab356210a60748475f43 ld/testsuite/ld-sparc/tlsg64.sd +f45983dd004da37020dc6f85bff8d99e ld/testsuite/ld-sparc/tlslib.s +2edea12bda9f42749ee9ae86f8fb3f7f ld/testsuite/ld-sparc/tlsnopic.s +236a8f451d38469c389f471b4529d5c3 ld/testsuite/ld-sparc/tlspic.s +9189506eedfeac2033b0e7c4de0a2680 ld/testsuite/ld-sparc/tlssunbin32.dd +4a296b942cbb139ca89f7e0025080617 ld/testsuite/ld-sparc/tlssunbin32.rd +36f2e351f3a028ca81a679221131a0cd ld/testsuite/ld-sparc/tlssunbin32.s +16aeb0a48713e4bf89d2065bfe20839f ld/testsuite/ld-sparc/tlssunbin32.sd +176ea661341925d2f0f24b88dcc219dd ld/testsuite/ld-sparc/tlssunbin32.td +7749b2785b0d78eccdcbf916e72da0e7 ld/testsuite/ld-sparc/tlssunbin64.dd +0114d03caccfe739efa177a4e208f973 ld/testsuite/ld-sparc/tlssunbin64.rd +9b23cbeb85df66899de9aa841d41a6d8 ld/testsuite/ld-sparc/tlssunbin64.s +bd37fb5e377d86212f801b19c152989a ld/testsuite/ld-sparc/tlssunbin64.sd +ed39d3a0f0c9b484064abda9325c770b ld/testsuite/ld-sparc/tlssunbin64.td +2d0ba1b70aa80b977b1153e86a41eda2 ld/testsuite/ld-sparc/tlssunbinpic32.s +4f54433140a83203f9612a17f1f68a7c ld/testsuite/ld-sparc/tlssunbinpic64.s +a503661ad3d089c3b0bcf3982ad2faea ld/testsuite/ld-sparc/tlssunnopic32.dd +f2696cb7fbe45db35c94226f923123e7 ld/testsuite/ld-sparc/tlssunnopic32.rd +163ff743ffacb4dd2e35ff15849a0ea4 ld/testsuite/ld-sparc/tlssunnopic32.s +cb3ff5e802147194875afde5b1d146b1 ld/testsuite/ld-sparc/tlssunnopic32.sd +53bb5587a45c84b08d869098aa8c3912 ld/testsuite/ld-sparc/tlssunnopic64.dd +c2008aa26f4dff2b66c2da02bfa59817 ld/testsuite/ld-sparc/tlssunnopic64.rd +a6c8ed5af43f5482d3d7bcf74e7684e5 ld/testsuite/ld-sparc/tlssunnopic64.s +2c3b7a1c1531fe831d15b7180461e338 ld/testsuite/ld-sparc/tlssunnopic64.sd +517c35cd6001117a10cb2eb311736018 ld/testsuite/ld-sparc/tlssunpic32.dd +c838fd83ba4d0459926a81002d73a5cb ld/testsuite/ld-sparc/tlssunpic32.rd +e103f3b429288a84d8e5c47bdbd5697e ld/testsuite/ld-sparc/tlssunpic32.s +957929ffafe2d2cee185a0841b0d1ec7 ld/testsuite/ld-sparc/tlssunpic32.sd +79ba66a090beb7c8eb24102878fcd2b8 ld/testsuite/ld-sparc/tlssunpic32.td +a3d9018bb1ed11cd7b2db3d50d7a6304 ld/testsuite/ld-sparc/tlssunpic64.dd +e08d551d645c65077e7909ae17fbb511 ld/testsuite/ld-sparc/tlssunpic64.rd +92725610c233ff43c7684b099ad1f63c ld/testsuite/ld-sparc/tlssunpic64.s +f85a523e8c664433001e7ba2591ef011 ld/testsuite/ld-sparc/tlssunpic64.sd +d09d4fbfa24bef5a3f4fd2efab45a217 ld/testsuite/ld-sparc/tlssunpic64.td +d4b99a8da6449380ef31dd03ebdbf4e1 ld/testsuite/ld-sparc/vxworks1-lib.dd +4d0018309d753aeb7489523e8fc2b582 ld/testsuite/ld-sparc/vxworks1-lib.nd +516cca5142fcc8be501d6b4aa6365c34 ld/testsuite/ld-sparc/vxworks1-lib.rd +d7d3679cbd81499e584cf78e950e72d6 ld/testsuite/ld-sparc/vxworks1-lib.s +6dbdc5d4346169b9a3af98707d77be72 ld/testsuite/ld-sparc/vxworks1-lib.td +57e13e14adacc62cab22da622bbcb01e ld/testsuite/ld-sparc/vxworks1-static.d +eff6bd323ed07e997b4d697536a4994b ld/testsuite/ld-sparc/vxworks1.dd +65436e479e11025c3b995c7941bb58a3 ld/testsuite/ld-sparc/vxworks1.ld +012a01423074a17c346bf377a74264ba ld/testsuite/ld-sparc/vxworks1.rd +8c0216be7e3b38ae166e4359b6338008 ld/testsuite/ld-sparc/vxworks1.s +70a3a63caaa6294e72a21f3af93d802c ld/testsuite/ld-sparc/vxworks2-static.sd +01ec404ce50fbffc8aa2a12f3466b101 ld/testsuite/ld-sparc/vxworks2.s +a59d05b41e3dd040fb4e12e434cff21d ld/testsuite/ld-sparc/vxworks2.sd +f49e2394e1cca686fa3327d81c64e3fa ld/testsuite/ld-spu/ear.d +117a909e130058b91afa95f31fbb874e ld/testsuite/ld-spu/ear.s +2b4ac0f83f0ff5440c950826eac5dcbb ld/testsuite/ld-spu/embed.rd +b8b915bffd8bf82ae39b363cd5b39e0b ld/testsuite/ld-spu/fixup.d +8c1c476f04f50f0a472450b0226854bb ld/testsuite/ld-spu/fixup.s +cd48872ab912171ef6a74a2371b52c3b ld/testsuite/ld-spu/icache1.d +5069a040bb8d323b66a5d86773cf3c66 ld/testsuite/ld-spu/icache1.s +a2ccc6efb582f7a9225c555243e82014 ld/testsuite/ld-spu/ovl.d +f518e3aa7768f47c7594b2b03ec51b5d ld/testsuite/ld-spu/ovl.lnk +d4c871b26497cb32152f49127636d300 ld/testsuite/ld-spu/ovl.s +644ddc01ba535fe2a7028f00bb31f66e ld/testsuite/ld-spu/ovl1.lnk +9fed82e10b9fe30f4742d8aecc46ecc8 ld/testsuite/ld-spu/ovl2.d +e4fd482d44defe77b13f0d97531f80f1 ld/testsuite/ld-spu/ovl2.lnk +26a2105b677352ed3b8bafca0f88185b ld/testsuite/ld-spu/ovl2.s +2cb2d6f1f9d0d193ac2f3af869291120 ld/testsuite/ld-spu/pic.d +751c3e3f4a8dfb43f4977a58962f3d11 ld/testsuite/ld-spu/pic.s +eda70149d50ac85c7dc96fc3d5ed4202 ld/testsuite/ld-spu/picdef.s +705aed57b1a7feaf1366598911bafd29 ld/testsuite/ld-spu/spu.exp +ff2b78b0df3a6bc56644e35ec4f068bd ld/testsuite/ld-srec/sr1.c +6524623299b50b9299f4b3fca543b0fa ld/testsuite/ld-srec/sr2.c +76a4cb76d59f235af5e567ccb024de2c ld/testsuite/ld-srec/sr3.cc +90187dd7d22e3638e585172693019489 ld/testsuite/ld-srec/srec.exp +2095186b157bb04030b2974b68c47ade ld/testsuite/ld-tic6x/attr-arch-c62x-c62x.d +012b48c308ed21b346ffca5a22f9a921 ld/testsuite/ld-tic6x/attr-arch-c62x-c64x+.d +c1c54aafeb5ef8674bd033cd5d98b087 ld/testsuite/ld-tic6x/attr-arch-c62x-c64x.d +3268a53c624163e76b1bc03aa377fae4 ld/testsuite/ld-tic6x/attr-arch-c62x-c674x.d +9375d10ff6b18685b695c7725ded2e71 ld/testsuite/ld-tic6x/attr-arch-c62x-c67x+.d +90877dbc04d4915268b530427afe0db2 ld/testsuite/ld-tic6x/attr-arch-c62x-c67x.d +a4ed1a052c2e13035ff7dba21686c279 ld/testsuite/ld-tic6x/attr-arch-c62x.s +e3e12b151e736a071c96b21b96af62ec ld/testsuite/ld-tic6x/attr-arch-c64x+-c62x.d +da5586e6af1edbd7c442c93d455176f9 ld/testsuite/ld-tic6x/attr-arch-c64x+-c64x+.d +e33e2c5ed2db16176028b082fd315664 ld/testsuite/ld-tic6x/attr-arch-c64x+-c64x.d +6ca936a62504bb81209dbb450c2f2920 ld/testsuite/ld-tic6x/attr-arch-c64x+-c674x.d +d7c24e2f39a5318cc7357f9b6cca0229 ld/testsuite/ld-tic6x/attr-arch-c64x+-c67x+.d +dad6c70af119a8b34de4d3dde6f73109 ld/testsuite/ld-tic6x/attr-arch-c64x+-c67x.d +d68127136817bb75c3169bb32ad35f2b ld/testsuite/ld-tic6x/attr-arch-c64x+.s +77915fb8e7fd14c9bc48873083b7f5fe ld/testsuite/ld-tic6x/attr-arch-c64x-c62x.d +3d2ddd7611c691b4fbb978e37c8db824 ld/testsuite/ld-tic6x/attr-arch-c64x-c64x+.d +e926a9331f3642af87f44cfd6eae0ff7 ld/testsuite/ld-tic6x/attr-arch-c64x-c64x.d +cc484259a527b7c6940e2825454e441f ld/testsuite/ld-tic6x/attr-arch-c64x-c674x.d +7c4237632cbc92020308c55f1a5ffcee ld/testsuite/ld-tic6x/attr-arch-c64x-c67x+.d +b2361276ac56389b62a27138d39c9bdf ld/testsuite/ld-tic6x/attr-arch-c64x-c67x.d +204750fa68714136532941c335706af8 ld/testsuite/ld-tic6x/attr-arch-c64x.s +cf9d5a445a0bdaf06898e9aae73f7e13 ld/testsuite/ld-tic6x/attr-arch-c674x-c62x.d +447e335686baf213f6a75c49ad7b1c9e ld/testsuite/ld-tic6x/attr-arch-c674x-c64x+.d +4d2849bd8721c0cc128fa94141219638 ld/testsuite/ld-tic6x/attr-arch-c674x-c64x.d +167ea510f35eb92767df1296bdc25a7f ld/testsuite/ld-tic6x/attr-arch-c674x-c674x.d +6aa28cd9f614b4a89f970492b0c037eb ld/testsuite/ld-tic6x/attr-arch-c674x-c67x+.d +77c9c86fe6dbe86385bfa1a2589fdac3 ld/testsuite/ld-tic6x/attr-arch-c674x-c67x.d +309b44b71f7cba00f581434aae06f203 ld/testsuite/ld-tic6x/attr-arch-c674x.s +e73f79b702cc91084c8e20b55cd20d45 ld/testsuite/ld-tic6x/attr-arch-c67x+-c62x.d +0899a878f81fde629575e58a16215f8e ld/testsuite/ld-tic6x/attr-arch-c67x+-c64x+.d +a056fe881ed3770f974afb5db6285ab2 ld/testsuite/ld-tic6x/attr-arch-c67x+-c64x.d +70ea92797e684dac70923921f67a6720 ld/testsuite/ld-tic6x/attr-arch-c67x+-c674x.d +70499b06f97ef16839f2feb5efb2163c ld/testsuite/ld-tic6x/attr-arch-c67x+-c67x+.d +fe0044a62b4dfcebcd68d7e9c19816d2 ld/testsuite/ld-tic6x/attr-arch-c67x+-c67x.d +1b3c629121eece9c6b5ecfc676e5fbad ld/testsuite/ld-tic6x/attr-arch-c67x+.s +839ffebb6e3758a0c80efeeb0144bad5 ld/testsuite/ld-tic6x/attr-arch-c67x-c62x.d +836edc087c9fca83e68ad8153e6dbcbd ld/testsuite/ld-tic6x/attr-arch-c67x-c64x+.d +8d78b2368daaefc055156c313cbebd52 ld/testsuite/ld-tic6x/attr-arch-c67x-c64x.d +c26b0412869122cb91a5d63be54db50d ld/testsuite/ld-tic6x/attr-arch-c67x-c674x.d +436c2a27d1278ac1a1f80dfdd55393c5 ld/testsuite/ld-tic6x/attr-arch-c67x-c67x+.d +02d52b08b67b4a67759028ae39156617 ld/testsuite/ld-tic6x/attr-arch-c67x-c67x.d +a36dea43f43314aa5cdd90e4863bcd6a ld/testsuite/ld-tic6x/attr-arch-c67x.s +97f9c37b51f068f860f107ea9f2e063a ld/testsuite/ld-tic6x/attr-array-16-16.d +7a819fdc22499bbe43bae2549987022a ld/testsuite/ld-tic6x/attr-array-16-4.d +2cb63358cee1c3f03379a921a61df357 ld/testsuite/ld-tic6x/attr-array-16-416.d +0f0907ba405cd8e646dbcc50984fdefa ld/testsuite/ld-tic6x/attr-array-16-48.d +c96433474ea9167d49fd61086d3500b4 ld/testsuite/ld-tic6x/attr-array-16-8.d +5005a2e968ac02bca5e1887bd9700df2 ld/testsuite/ld-tic6x/attr-array-16-816.d +930335b39411d1b89cde4a13b3580d9c ld/testsuite/ld-tic6x/attr-array-16.s +6decf37396de9d2666137d8446096cac ld/testsuite/ld-tic6x/attr-array-4-16.d +17ae392d4690b3ac0b74fd9f9798f785 ld/testsuite/ld-tic6x/attr-array-4-4.d +aa683ee23dc1888c3beb34dfd8315be9 ld/testsuite/ld-tic6x/attr-array-4-416.d +58b564dcda58ffff77a0d4b355b72dba ld/testsuite/ld-tic6x/attr-array-4-48.d +d8497f196fabf1e8a70492d444927f5a ld/testsuite/ld-tic6x/attr-array-4-8.d +9b6f92d1d8c143983043efc9f058a328 ld/testsuite/ld-tic6x/attr-array-4-816.d +7825d4fdc3f5cda3097cda6b363dbba0 ld/testsuite/ld-tic6x/attr-array-4.s +9a8e935f8b0ae45968700829016db6ed ld/testsuite/ld-tic6x/attr-array-416-16.d +1a61e40c386028757618c7e178f1cf06 ld/testsuite/ld-tic6x/attr-array-416-4.d +3c0c6ae87c348da908ac5a13ce9a0a83 ld/testsuite/ld-tic6x/attr-array-416-416.d +44069d969eedda0bdf89efbd5723e5e8 ld/testsuite/ld-tic6x/attr-array-416-48.d +5d7b52d4fe0840f2b08cd0b67fea67de ld/testsuite/ld-tic6x/attr-array-416-8.d +d25da551430eb8a3d37951f6bb1eb63c ld/testsuite/ld-tic6x/attr-array-416-816.d +607d01b7ed543f177c914bf149f75aa8 ld/testsuite/ld-tic6x/attr-array-416.s +5e9fb086e962d004895a2192be66403e ld/testsuite/ld-tic6x/attr-array-48-16.d +0cc6e4aba094efb4fcd56e4b6e3045cb ld/testsuite/ld-tic6x/attr-array-48-4.d +cd694dd4953bfe0b560f4336cf44185e ld/testsuite/ld-tic6x/attr-array-48-416.d +6a69f5dd066f760013534ef20326bd56 ld/testsuite/ld-tic6x/attr-array-48-48.d +656bd55abd838fc9553534c478e4ea5a ld/testsuite/ld-tic6x/attr-array-48-8.d +cdfd6eaf81c6bc30d10edbb29da86c85 ld/testsuite/ld-tic6x/attr-array-48-816.d +a5d5d29a61d47b5db4ac41c2b996e877 ld/testsuite/ld-tic6x/attr-array-48.s +e00970b4d00522b59ff5e97fd4110ab2 ld/testsuite/ld-tic6x/attr-array-8-16.d +bbe0573378e2829db9b4d97c735c6f09 ld/testsuite/ld-tic6x/attr-array-8-4.d +90f63065325bf42e2aa13c4d8a85342f ld/testsuite/ld-tic6x/attr-array-8-416.d +23425f82a69a7b4b2b2a6f30bc34b53b ld/testsuite/ld-tic6x/attr-array-8-48.d +3cdd17b922aadf3c47037b37cb218b09 ld/testsuite/ld-tic6x/attr-array-8-8.d +c8b24bf510abeb089237e711cc1e6ac7 ld/testsuite/ld-tic6x/attr-array-8-816.d +be23a53c3c0480fef62fa6e2c93c91d6 ld/testsuite/ld-tic6x/attr-array-8.s +e0d12c45ebf303530548e01bc79588f1 ld/testsuite/ld-tic6x/attr-array-816-16.d +3922aa0f799247fc4d5b149d5ace2c50 ld/testsuite/ld-tic6x/attr-array-816-4.d +b0d60627f1f756ddd194644ef7cbd2a3 ld/testsuite/ld-tic6x/attr-array-816-416.d +54ca87257305b54e0e9f2a70169ed5e4 ld/testsuite/ld-tic6x/attr-array-816-48.d +e8508f0060e3e647d744233aa5a83127 ld/testsuite/ld-tic6x/attr-array-816-8.d +07366a3f3a512fd9a9af1c41cd743d4f ld/testsuite/ld-tic6x/attr-array-816-816.d +63cc4286156149f61345e9a4d6d0e135 ld/testsuite/ld-tic6x/attr-array-816.s +701fb32b48aea036671fcead441ad6e9 ld/testsuite/ld-tic6x/attr-compatibility-gnu-gnu.d +605f6f4df607c64b295d4ef4e9e48d4d ld/testsuite/ld-tic6x/attr-compatibility-gnu-other.d +e886896ee5d42dc31876cf12dc9d1778 ld/testsuite/ld-tic6x/attr-compatibility-gnu.s +90af5c84f170125ecac17eb34932266f ld/testsuite/ld-tic6x/attr-compatibility-other-gnu.d +fdf7dbc1065ac3f9d5934e28a73dca56 ld/testsuite/ld-tic6x/attr-compatibility-other-other.d +49881bed5369cb91c8adb7d3a77a1c0a ld/testsuite/ld-tic6x/attr-compatibility-other.s +2450b1a313c0c9aeab2509a72aeb6992 ld/testsuite/ld-tic6x/attr-conformance-10-10.d +0f7db5d7006c24e55ed21bab45448641 ld/testsuite/ld-tic6x/attr-conformance-10-11.d +beb12c8149f332043a5dd1a194a82c42 ld/testsuite/ld-tic6x/attr-conformance-10-none.d +786f3635b154df9fe6c29bab350fd463 ld/testsuite/ld-tic6x/attr-conformance-10.s +be1111fc9736aa21b54a1dc3f2991fb1 ld/testsuite/ld-tic6x/attr-conformance-11-10.d +ac50be9f18745ac07e16850dd8804c6b ld/testsuite/ld-tic6x/attr-conformance-11-11.d +d0535910f89cba304f17106f97efe8f3 ld/testsuite/ld-tic6x/attr-conformance-11-none.d +3d0661294fa0c18373f613652a91dcde ld/testsuite/ld-tic6x/attr-conformance-11.s +42de3358520aaf852ffd5d5970d3e190 ld/testsuite/ld-tic6x/attr-conformance-none-10.d +0c6921058ce49cb26f154edb60512ffc ld/testsuite/ld-tic6x/attr-conformance-none-11.d +e278efdec59748d93fa819c5273f4c1d ld/testsuite/ld-tic6x/attr-conformance-none-none.d +5a9361fe09df01504f9bfffcffd8ff16 ld/testsuite/ld-tic6x/attr-conformance-none.s +28e41d90503bb829beeee240264d61b8 ld/testsuite/ld-tic6x/attr-dsbt-0.s +e6bdebca3543f33e8ed79b08e36f1ae0 ld/testsuite/ld-tic6x/attr-dsbt-00.d +67f918b2f20d282dff0ce7eaff39ca21 ld/testsuite/ld-tic6x/attr-dsbt-01.d +39b5e11207a1ec8b8be558f8234fa15b ld/testsuite/ld-tic6x/attr-dsbt-1.s +c10015eaead1f3f33f5f757b49758ac3 ld/testsuite/ld-tic6x/attr-dsbt-10.d +356eab6b0a2625c3736ee30bbd69a525 ld/testsuite/ld-tic6x/attr-dsbt-11.d +ffac3d7a0022b35e98fb6d940051071f ld/testsuite/ld-tic6x/attr-pic-0.s +195c1e87a92f45ef578c4c884b6b8330 ld/testsuite/ld-tic6x/attr-pic-00.d +929109db7540b8d2d1cfea40587e9745 ld/testsuite/ld-tic6x/attr-pic-01.d +5d079c56a0ee00da96bf9adad4fb16b7 ld/testsuite/ld-tic6x/attr-pic-1.s +6b4d02c9327924c237eb9dd26c3fea9e ld/testsuite/ld-tic6x/attr-pic-10.d +ebe3291ae4d1eef2c6a664d7eb93608b ld/testsuite/ld-tic6x/attr-pic-11.d +9b207ba5eaa5de6c35327e8229301c44 ld/testsuite/ld-tic6x/attr-pid-0.s +508aae2035e3febb6135380ddbfc3cc5 ld/testsuite/ld-tic6x/attr-pid-00.d +0bfeecceac3cc39a9613129bcd8479cc ld/testsuite/ld-tic6x/attr-pid-01.d +e50f7c2ed6d403cbe0064e8f1ea2a868 ld/testsuite/ld-tic6x/attr-pid-02.d +c2ad71377c6220dbae8be6cc4eacfdaf ld/testsuite/ld-tic6x/attr-pid-1.s +b5235148c5d3ff2ea79c4468a9cda651 ld/testsuite/ld-tic6x/attr-pid-10.d +db0edd7dd62ce0186bb5347e7cd30f5d ld/testsuite/ld-tic6x/attr-pid-11.d +efccc8254d6b34e0a5797e4afd6c4a73 ld/testsuite/ld-tic6x/attr-pid-12.d +5a539bf30c7b0c32070e73a43d513d2f ld/testsuite/ld-tic6x/attr-pid-2.s +0fdbab51ef9789e9fd6fb58a5a8e769f ld/testsuite/ld-tic6x/attr-pid-20.d +0d2ed2afc641129b22979e79ab9b0794 ld/testsuite/ld-tic6x/attr-pid-21.d +278bb771d688a11dfc504ac1da095072 ld/testsuite/ld-tic6x/attr-pid-22.d +2716191a442fe258113bb9b2747b8a11 ld/testsuite/ld-tic6x/attr-stack-16-16.d +2c6708d3d0f53ed6f93ebcf6b08cdb5e ld/testsuite/ld-tic6x/attr-stack-16-8.d +05d225947aa564bdd18504946e768796 ld/testsuite/ld-tic6x/attr-stack-16-816.d +7b230e2538e7b7c9b479f328708c1fa2 ld/testsuite/ld-tic6x/attr-stack-16.s +b7c16a3c69e24b77af8cc04a25568c63 ld/testsuite/ld-tic6x/attr-stack-8-16.d +74e762204c994bf9c7daa299733a2c12 ld/testsuite/ld-tic6x/attr-stack-8-8.d +46247074e6474cb3862b290e53ad971f ld/testsuite/ld-tic6x/attr-stack-8-816.d +3b57dcaa29fb001f6a3acb4cb50d9c03 ld/testsuite/ld-tic6x/attr-stack-8.s +27c91ae2ca3eeead25545874b2c1dd90 ld/testsuite/ld-tic6x/attr-stack-816-16.d +9430f0595c0cdce3e960b16a258d5e23 ld/testsuite/ld-tic6x/attr-stack-816-8.d +a23308722fb5567ec72b0336b7d17055 ld/testsuite/ld-tic6x/attr-stack-816-816.d +27a7b1ccb09fb00e3d53c4d5c9de9c4e ld/testsuite/ld-tic6x/attr-stack-816.s +3b1a6ba9d1467cd48b3391ee5ab1d682 ld/testsuite/ld-tic6x/attr-unknown-1.d +da34c8ed4ae878957b0e96db7e90c71a ld/testsuite/ld-tic6x/attr-unknown-1000-1.s +2976774dbe83171a934099ff00f47e20 ld/testsuite/ld-tic6x/attr-unknown-1000-2.s +9414cb9180f54845eee9fcee767d0099 ld/testsuite/ld-tic6x/attr-unknown-1024-1.s +a917a22a566f5148e60143fdd2f646de ld/testsuite/ld-tic6x/attr-unknown-2.d +a73f2ffa82ec19174019e75149136ba6 ld/testsuite/ld-tic6x/attr-unknown-3.d +2f7a2e3c495c3609fbd6c0c1d9a89c4b ld/testsuite/ld-tic6x/attr-unknown-4.d +f4aee681dd34592fb7b484b0236ef5bc ld/testsuite/ld-tic6x/attr-unknown-5.d +c9034d478156fc343f2e099e40e1fdef ld/testsuite/ld-tic6x/attr-unknown-54-1.s +5e9ad35eaa0f045cf5e46a35d5a77ab9 ld/testsuite/ld-tic6x/attr-unknown-55-a.s +44ef8370faf31736281dd89fdc2b1aa1 ld/testsuite/ld-tic6x/attr-unknown-6.d +cba4da524c4a94bd8c4b919e7b7a54ac ld/testsuite/ld-tic6x/attr-unknown-7.d +3b6e96a9d515f5a2b4cf9a7a55e24409 ld/testsuite/ld-tic6x/attr-unknown-71-a.s +81f955fcdc30386866f74711da5cf9f0 ld/testsuite/ld-tic6x/attr-unknown-71-b.s +354d6e7ea3615fa9c80c22d33a6c1f1a ld/testsuite/ld-tic6x/attr-wchar-0.s +a56a93fb1fb2fbf749c42da84307beff ld/testsuite/ld-tic6x/attr-wchar-00.d +885239ffa9ae00edfc08624e088afbfa ld/testsuite/ld-tic6x/attr-wchar-01.d +9b506e7d4b1dfa337fb09cf1322d8fe8 ld/testsuite/ld-tic6x/attr-wchar-02.d +f4d640b4b71b7f6f09646f92e39c5eba ld/testsuite/ld-tic6x/attr-wchar-1.s +8b214bd1a71846e43080f71f02f4a777 ld/testsuite/ld-tic6x/attr-wchar-10.d +21ec5b719b6f48a5a851c49c8da4c58d ld/testsuite/ld-tic6x/attr-wchar-11.d +1afe79866f10a55f794e9a84d195bc01 ld/testsuite/ld-tic6x/attr-wchar-12.d +371427a7cd66a6a87159187cba7ccef1 ld/testsuite/ld-tic6x/attr-wchar-2.s +0bb7e3a85adab6dd8d1828cdc614760b ld/testsuite/ld-tic6x/attr-wchar-20.d +de4224ed1dafc03dbb373f71da912b36 ld/testsuite/ld-tic6x/attr-wchar-21.d +cd5216a6ee3f5948dd2880f29a52f2fd ld/testsuite/ld-tic6x/attr-wchar-22.d +1011fd5f483ec81317355c1c557a9670 ld/testsuite/ld-tic6x/common.d +aaf614bf94d1d62caab60fcd7a483fc6 ld/testsuite/ld-tic6x/common.ld +fa6ea6c51cd6801c8fa4835d759a2d39 ld/testsuite/ld-tic6x/common.s +33fbc3e345f78369897dd6fab2382465 ld/testsuite/ld-tic6x/data-reloc-global-rel.d +8fea45b8f5c430a4a5c9f7874b9a727a ld/testsuite/ld-tic6x/data-reloc-global-rel.s +0aded1595e05f1a9ded13c758d3455ec ld/testsuite/ld-tic6x/data-reloc-global.d +c0afbeeb06e26caa4efbb07357b4e68b ld/testsuite/ld-tic6x/data-reloc-global.s +7543bc1ad4960d1f70db0ea56744584b ld/testsuite/ld-tic6x/data-reloc-local-1.s +2a9af063994a3e5d821dc497e7276d7d ld/testsuite/ld-tic6x/data-reloc-local-2.s +5ab068bc7d8f61b401ed34a8a3ab92df ld/testsuite/ld-tic6x/data-reloc-local-r-rel.d +7cfc3444f62beda302b625330b72f496 ld/testsuite/ld-tic6x/data-reloc-local-r.d +3534c00a3340865bc29cf4c2548f48d5 ld/testsuite/ld-tic6x/data-reloc-local-rel.d +5eca75d03c0abd15030f7b33be0a4152 ld/testsuite/ld-tic6x/data-reloc-local.d +2880f188d82b99d45623121c3d066df7 ld/testsuite/ld-tic6x/discard-unwind.ld +789ef98e0566260f8d28d7f3f907952a ld/testsuite/ld-tic6x/dsbt-be.ld +64924d882820c0a879cd164397754f9e ld/testsuite/ld-tic6x/dsbt-index-error.d +16a80b53f8ee6be4d2bc24d0730ece8d ld/testsuite/ld-tic6x/dsbt-index.d +b47ee20e6509551cbd89995077d6af97 ld/testsuite/ld-tic6x/dsbt-index.s +31367c26dbcd2e4a2230f13c68ecbec3 ld/testsuite/ld-tic6x/dsbt-inrange.ld +ce018c5adb55cd79c07d578d7814268e ld/testsuite/ld-tic6x/dsbt-overflow.ld +4362bea56b3d89c28f9e266e7ad6cddc ld/testsuite/ld-tic6x/dsbt.ld +a2254599887554c5e41e2535ff768fdb ld/testsuite/ld-tic6x/ehtype-reloc-1-rel.d +61a1c6ba089b629ebbdae0b82ea584f1 ld/testsuite/ld-tic6x/ehtype-reloc-1.d +33aa7605231a5cacc4f4ed0e80466f3a ld/testsuite/ld-tic6x/ehtype-reloc-1.s +b2d8147fea67ffe57dbf9d62a6b03d1c ld/testsuite/ld-tic6x/generic.ld +df16d82e20441cad7ed2a5c3115cf298 ld/testsuite/ld-tic6x/got-reloc-global-addend-1.d +7ce854f84204786ba0119cecf3bbcbcb ld/testsuite/ld-tic6x/got-reloc-global-addend-1.s +408cb51c863f72f91d69e7b2d22a8b13 ld/testsuite/ld-tic6x/got-reloc-global-addend-2.d +f7a9b5790f74f89d13de47423765da43 ld/testsuite/ld-tic6x/got-reloc-global-addend-2.s +d338ad5c93944f759749b39c3c067955 ld/testsuite/ld-tic6x/got-reloc-global.s +c1929202c643382983c24604c0acab3b ld/testsuite/ld-tic6x/got-reloc-inrange.d +9723cf61d99cf99852804c60e5914e29 ld/testsuite/ld-tic6x/got-reloc-local-1.s +9e172205e8b9a6943cf33e04178bbfe4 ld/testsuite/ld-tic6x/got-reloc-local-2.s +7020fd7c0190636b5b87f613df09595a ld/testsuite/ld-tic6x/got-reloc-local-r.d +edf23d6269586ce76e7d72a0123e1ba6 ld/testsuite/ld-tic6x/got-reloc-overflow.d +d664da78e92f42a29b7e372f32d76682 ld/testsuite/ld-tic6x/mvk-reloc-global-rel.d +0947c5318e69241421e3412e238c1524 ld/testsuite/ld-tic6x/mvk-reloc-global-rel.s +41b8e12437671a229cc5e9071130ccaf ld/testsuite/ld-tic6x/mvk-reloc-global.d +537d94935f90baca59527fc7454ae47e ld/testsuite/ld-tic6x/mvk-reloc-global.s +51ef912513eb1a90dba94ac032206348 ld/testsuite/ld-tic6x/mvk-reloc-local-1-rel.s +0cf64db7c8c80d4be06a90c8248709f5 ld/testsuite/ld-tic6x/mvk-reloc-local-1.s +cb834a6428f5a5b17e8ad426615007d9 ld/testsuite/ld-tic6x/mvk-reloc-local-2-rel.s +48a17611d607a358d1c635cc9e61863f ld/testsuite/ld-tic6x/mvk-reloc-local-2.s +859328ca90c059a3f896c53b45ce9642 ld/testsuite/ld-tic6x/mvk-reloc-local-r-rel.d +2a6661150feecda288aebd9986e62a54 ld/testsuite/ld-tic6x/mvk-reloc-local-r.d +729dcb93d55525932e57cf33b6c87292 ld/testsuite/ld-tic6x/mvk-reloc-local-rel.d +b97245c038cf8104c43c9e59ceb4fc7c ld/testsuite/ld-tic6x/mvk-reloc-local.d +6316bbbe723e245116bea366b1e92565 ld/testsuite/ld-tic6x/pcr-reloc.d +6e1541d8e9790877f4a14d41e35952d9 ld/testsuite/ld-tic6x/pcr-reloc.s +e9cb5844280604078e73fc7686313723 ld/testsuite/ld-tic6x/pcrel-reloc-global-rel.d +823c2c691c9b69e50d9797d295b52724 ld/testsuite/ld-tic6x/pcrel-reloc-global.d +98f2fb54d954e3fbaea9a0407e2e152c ld/testsuite/ld-tic6x/pcrel-reloc-global.s +b8ca5c31624033f3f34ab9daddf39d4f ld/testsuite/ld-tic6x/pcrel-reloc-local-1.s +ef1ea1d68bc2d28b733c06a6fa9ca9ba ld/testsuite/ld-tic6x/pcrel-reloc-local-2.s +1e92207a794d9f947d8187965206eaf9 ld/testsuite/ld-tic6x/pcrel-reloc-local-r-rel-rela.d +7561d47eaea1890d4d563ddd7674a32f ld/testsuite/ld-tic6x/pcrel-reloc-local-r-rel.d +4e2cb3d5ec6bc665bc1a8462c10bf83f ld/testsuite/ld-tic6x/pcrel-reloc-local-r.d +d8244bfae014091f2ec49deee3ab3738 ld/testsuite/ld-tic6x/pcrel-reloc-local-rel.d +eb2797e490905d72604c6deb53127301 ld/testsuite/ld-tic6x/pcrel-reloc-local.d +02a22274cbf121c8a3bf72341480b9e1 ld/testsuite/ld-tic6x/reloc-overflow-abs-s16-1.d +5c263460b87cc93fde685056d353ffb4 ld/testsuite/ld-tic6x/reloc-overflow-abs-s16-2.d +0961aa23957f931be8bdfda5bd8c5abf ld/testsuite/ld-tic6x/reloc-overflow-abs-s16.s +68b0d21b341d0180ac466a2dbf93a5c3 ld/testsuite/ld-tic6x/reloc-overflow-abs16-1.d +ddf8f8a3573a4b2f95c92c7c8b192e78 ld/testsuite/ld-tic6x/reloc-overflow-abs16-2.d +efeb4e75c03171a37a444dcd75801489 ld/testsuite/ld-tic6x/reloc-overflow-abs16.s +862fc957cde77b31235ff88d2a627b01 ld/testsuite/ld-tic6x/reloc-overflow-abs8-1.d +241ecc9f1d1c0916e75393651313c670 ld/testsuite/ld-tic6x/reloc-overflow-abs8-2.d +0b6af80e4bb13f712dc494cdaca78eea ld/testsuite/ld-tic6x/reloc-overflow-abs8.s +e7d495ccbccf8c38c09f253f167e9b6e ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10-1.d +87d9f31fbca0e117600cc152d03c4f6a ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10-2.d +a0948ab8df6a5c1f288d88fe19b0905a ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10.s +9b92d263995f327f72968a90c01aeed4 ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12-1.d +0afde406a50d87f1ab64aef3fa5f5d3a ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12-2.d +68597677c4b5c279e7d533fe58a988ab ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12.s +80db5907f425dc8085b2fe7a819a5108 ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21-1.d +213da08f023a5de9377ad1d4f3a1d515 ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21-2.d +b2ebf6a670f9a191498e3fd0bff15b15 ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21.s +a30e14936c45357bb591a38fc1bb9681 ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7-1.d +de23aaaf7afde769a90e5a887181bc3e ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7-2.d +04cb3565676d6c958b937f720dc98fef ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7.s +c4238f86c0471a7750dd516613b1110e ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16-1.d +bfa1923dd3c44eb30e87029ec332ab6c ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16-2.d +3c0521528fc06ccb4e157992933a86b7 ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16.s +40e2d847b0f3480fbeaa9b4744c79817 ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b-1.d +01ef15b94458363c2600be293f1bde39 ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b-2.d +57286ec40cedfb47d5244590b7f6cde5 ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b.s +604196f474b1f2612c19159982cb7348 ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h-1.d +ce330bdd3d5902af146a6eae5f58f84b ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h-2.d +d8e097b52d0d093376f2561bf30facb8 ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h.s +c40bdfab5e944064ef0965a477f34e4c ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w-1.d +d67d7f6a38f096152db2be9b450ccc8c ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w-2.d +92fdc5018a201aa37b9e2aa2e0703043 ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w.s +f500736e14e627105a01f829a4aa09df ld/testsuite/ld-tic6x/sbr-reloc-global-rel.d +59653767d6a2a1dba26b429484aab39e ld/testsuite/ld-tic6x/sbr-reloc-global-rel.s +46c65d33d39108197b6e8518ba19b428 ld/testsuite/ld-tic6x/sbr-reloc-global.d +e6bbc0afaa76d74d1ff472fd9e11de80 ld/testsuite/ld-tic6x/sbr-reloc-global.s +cafb4943bf9f15e245fcda7cf895e44b ld/testsuite/ld-tic6x/sbr-reloc-local-1-rel.s +192bb3e35463eab658966d8e0986fdaf ld/testsuite/ld-tic6x/sbr-reloc-local-1.s +15159bee3511e902f60dc83a353b72a9 ld/testsuite/ld-tic6x/sbr-reloc-local-2-rel.s +6a609669201a8ac39e16a8e7dd33b5ec ld/testsuite/ld-tic6x/sbr-reloc-local-2.s +bfe54ed0fa4772855132a681e10158b8 ld/testsuite/ld-tic6x/sbr-reloc-local-r-rel.d +a4d4ed6e46ae2863082a9f6de88d6729 ld/testsuite/ld-tic6x/sbr-reloc-local-r.d +9a160dc098db8e4a9cf72faf7d56f583 ld/testsuite/ld-tic6x/sbr-reloc-local-rel.d +4e800a563b8dd4f46bf50388c39d1fcf ld/testsuite/ld-tic6x/sbr-reloc-local.d +c7d209ff13ff769c856a163fd8419482 ld/testsuite/ld-tic6x/sbr.ld +5a8931d6a711d7c493425f1542a21ce7 ld/testsuite/ld-tic6x/shared-nopic.d +a1a282f3dd336cb819d5210dc5829622 ld/testsuite/ld-tic6x/shared-nopid.d +2c49ea81bc2fa5a7a8ce750064bc4864 ld/testsuite/ld-tic6x/shlib-1.dd +9c926db12a207e70ce319094ef7c7f15 ld/testsuite/ld-tic6x/shlib-1.rd +ba4c2781f1aae7da41b38a35ad80b413 ld/testsuite/ld-tic6x/shlib-1.s +534837d58ddf0a6c4ca5d4d9e1d7a850 ld/testsuite/ld-tic6x/shlib-1.sd +94e947b5a8445420da44ceaa1ba32499 ld/testsuite/ld-tic6x/shlib-1b.dd +9c926db12a207e70ce319094ef7c7f15 ld/testsuite/ld-tic6x/shlib-1b.rd +315b9de6afe4b72f2d2f47c370b23a53 ld/testsuite/ld-tic6x/shlib-1b.sd +22a8336d7f90a3805ab2d7442d6fecc4 ld/testsuite/ld-tic6x/shlib-1r.dd +9c926db12a207e70ce319094ef7c7f15 ld/testsuite/ld-tic6x/shlib-1r.rd +9988713ff06d8cecfc28c2119088cca7 ld/testsuite/ld-tic6x/shlib-1r.sd +c4527e90119335709d1b0c21949263b4 ld/testsuite/ld-tic6x/shlib-1rb.dd +9c926db12a207e70ce319094ef7c7f15 ld/testsuite/ld-tic6x/shlib-1rb.rd +19570627a419c6b0cfc6612710233ad6 ld/testsuite/ld-tic6x/shlib-1rb.sd +e6d71ec8092d8de0f0b2ecce74129061 ld/testsuite/ld-tic6x/shlib-2.s +825cb3781cf865a84a7d9ddd25edfb7b ld/testsuite/ld-tic6x/shlib-app-1.dd +9c09ceb4e36bc18874fe14d70fddc865 ld/testsuite/ld-tic6x/shlib-app-1.od +d2097e515dcb3c5c2ef355d205ffc012 ld/testsuite/ld-tic6x/shlib-app-1.rd +18be9f62ac9c98015a30527cf96e3b51 ld/testsuite/ld-tic6x/shlib-app-1.s +358195e0793db1b0395665d0e26d6017 ld/testsuite/ld-tic6x/shlib-app-1.sd +2ee7cfe401113b0de53189068050ca2e ld/testsuite/ld-tic6x/shlib-app-1b.dd +7862c745e8dd65709c6993d6d696b566 ld/testsuite/ld-tic6x/shlib-app-1b.od +1fc458f83e2e4348acc1f3a1fdddf932 ld/testsuite/ld-tic6x/shlib-app-1b.rd +7c01a3346cc95f8b3a8cebce79c703df ld/testsuite/ld-tic6x/shlib-app-1b.sd +511fc6118b9630cd65d0825927bc0f2c ld/testsuite/ld-tic6x/shlib-app-1r.dd +cbf3e063b2f27590c62561db0b8a5b3a ld/testsuite/ld-tic6x/shlib-app-1r.od +46bfc8f947f196f1bcd22b3e6ea3b53f ld/testsuite/ld-tic6x/shlib-app-1r.rd +52736411fbb219b0fa608bfea5462432 ld/testsuite/ld-tic6x/shlib-app-1r.s +e47dbf089371dac82b2ea945238a4264 ld/testsuite/ld-tic6x/shlib-app-1r.sd +2106d1ff4e16914ddcefb6d657ea00de ld/testsuite/ld-tic6x/shlib-app-1rb.dd +fd5e5c77f06813387a997ade1a061370 ld/testsuite/ld-tic6x/shlib-app-1rb.od +2e56ce49ca5d94683a5e442bd4686435 ld/testsuite/ld-tic6x/shlib-app-1rb.rd +74403975b77d3b4361a3b4295b137b81 ld/testsuite/ld-tic6x/shlib-app-1rb.sd +1e0ffb0ee7b6cf509b7b0f88513c2542 ld/testsuite/ld-tic6x/shlib-noindex.dd +260312cb690f6754ac5c8d3162998617 ld/testsuite/ld-tic6x/shlib-noindex.rd +785fba189962e01b3de350de26e70ab7 ld/testsuite/ld-tic6x/shlib-noindex.sd +62d0396522a95cf63b22bec16951397b ld/testsuite/ld-tic6x/static-app-1.dd +dcaf6b12df26c19fd395d81e3e201b7b ld/testsuite/ld-tic6x/static-app-1.od +5098b7022b265751a682860a902e8af5 ld/testsuite/ld-tic6x/static-app-1.rd +3bc09e4d8a44306d74257808cabe705d ld/testsuite/ld-tic6x/static-app-1.sd +8dcb89e19ae6fba3c53ec81267c6c399 ld/testsuite/ld-tic6x/static-app-1b.dd +c0fde86098efc73ea20b1b29f5e100ac ld/testsuite/ld-tic6x/static-app-1b.od +5098b7022b265751a682860a902e8af5 ld/testsuite/ld-tic6x/static-app-1b.rd +b3abfdc8907a4c2e2ed9ad8a20d1c00e ld/testsuite/ld-tic6x/static-app-1b.sd +a40282934b10bc99ea12c3434564f57a ld/testsuite/ld-tic6x/static-app-1r.dd +949bea92e1d78bf237a3d4427bcfa2ed ld/testsuite/ld-tic6x/static-app-1r.od +cadef7ed576d4cf05f8174a6552e7c40 ld/testsuite/ld-tic6x/static-app-1r.rd +c8af2b7255507d3df4ac1eff73ba9153 ld/testsuite/ld-tic6x/static-app-1r.sd +5a6414112339a134a300283c090071fe ld/testsuite/ld-tic6x/static-app-1rb.dd +8043c4e442024b039371f383d3494a20 ld/testsuite/ld-tic6x/static-app-1rb.od +cadef7ed576d4cf05f8174a6552e7c40 ld/testsuite/ld-tic6x/static-app-1rb.rd +087a16baa670ac7cadadfdd3828bf545 ld/testsuite/ld-tic6x/static-app-1rb.sd +46c374ec3fae0a2d599f56d5f8d8f7e3 ld/testsuite/ld-tic6x/tic6x.exp +5494c33057bd10c5bc47c1510f6968d8 ld/testsuite/ld-tic6x/unwind-1.d +76e30dbae2eaf3ccace1dde7d557205c ld/testsuite/ld-tic6x/unwind-1.s +5494c33057bd10c5bc47c1510f6968d8 ld/testsuite/ld-tic6x/unwind-2.d +5c8efaa157056ec372adcc746b6e3ad3 ld/testsuite/ld-tic6x/unwind-2.s +c80224aaf4cf91c99e3744b5c23ea6f9 ld/testsuite/ld-tic6x/unwind-3.d +58266d35ac486fe1184dae719b5a0279 ld/testsuite/ld-tic6x/unwind-3.s +3776325134f6a06c368eeb47ad29ecfa ld/testsuite/ld-tic6x/unwind-4.d +bcda87b5776c051590e80e33f8c2912b ld/testsuite/ld-tic6x/unwind-4.s +9988e93507bcb10423cf8ecd2f1522cf ld/testsuite/ld-tic6x/unwind-5.d +86f4bc21f549263c0e7fc3c79ade02e7 ld/testsuite/ld-tic6x/unwind-5.s +694ecdecc1b3700980be429c8d625322 ld/testsuite/ld-tic6x/unwind-6.d +dd28a8d24d461e137e251a18225d37e5 ld/testsuite/ld-tic6x/unwind.ld +c61f908e229f41f73556fbf66c58eaaa ld/testsuite/ld-tic6x/weak-be.d +adb17e705ba8c21190b76ac749fa605a ld/testsuite/ld-tic6x/weak-data.d +7c312ff79166b1e46786bd9a69bab054 ld/testsuite/ld-tic6x/weak.d +365596105c86ec044029367238a9a6ac ld/testsuite/ld-tic6x/weak.s +d94104e66d3658e489574c123c4ddf87 ld/testsuite/ld-tilegx/external.s +ae6c82a20eb6419a56c445af79168199 ld/testsuite/ld-tilegx/reloc.d +4452ac066a7386a9e85937b209d6b062 ld/testsuite/ld-tilegx/reloc.s +bd0588f3e1ab2827f5fb6a914a4d0c59 ld/testsuite/ld-tilegx/tilegx.exp +948e95e71afa6e4d3d074f44816ecc40 ld/testsuite/ld-tilepro/external.s +bd3a4811eee54388e211bb94fc012130 ld/testsuite/ld-tilepro/reloc.d +0a36ef1e9b323ee31dc60e5f4186f625 ld/testsuite/ld-tilepro/reloc.s +5fd5b0f48b093ef694cf1bec5c5b2c95 ld/testsuite/ld-tilepro/tilepro.exp +f68dabffc8ec3de820f924c2ed2c8f14 ld/testsuite/ld-undefined/dummy.s +2cab6ca246439db5767314636708f4a6 ld/testsuite/ld-undefined/entry-1.d +e97dbb10a457815908608a1bcfe1bb9a ld/testsuite/ld-undefined/entry-2.d +7ed08e64ed6ef0a7a0b2398921233bc7 ld/testsuite/ld-undefined/entry-3.d +46d3ba31998cc4fa75342fb7694c7004 ld/testsuite/ld-undefined/entry-4.d +0ba68826a2effe4beeedf04d422533db ld/testsuite/ld-undefined/entry-5.d +3a0153f11f590f1f89778082ee7c726c ld/testsuite/ld-undefined/entry-6.d +5b546b08a024613ce3ebbcc5df960d1b ld/testsuite/ld-undefined/entry-7.d +48f8ad0c56fe32ee613a6203fb3d330d ld/testsuite/ld-undefined/entry.exp +0aa89fa11067e1cf8802e998bf394ec0 ld/testsuite/ld-undefined/entry.s +b619c6e42cb950ef08a2be4baed7e558 ld/testsuite/ld-undefined/undefined.c +48720358775cc5a0e0c9b6d98bdf3849 ld/testsuite/ld-undefined/undefined.exp +06823040cd3afcca3a129392190cd666 ld/testsuite/ld-undefined/weak-undef.exp +7453216dfa4d1a7223a1d7b7064c1242 ld/testsuite/ld-undefined/weak-undef.s +ff2b7f892a6ef004c2076f2bab575ec0 ld/testsuite/ld-undefined/weak-undef.t +6ef80b197e0a25a9ebde7d78d531cc57 ld/testsuite/ld-unique/unique.exp +29d5f69aca84db5516a20b67b284b7ea ld/testsuite/ld-unique/unique.s +e619cad10e65613353ffa73b0d5171e5 ld/testsuite/ld-unique/unique_empty.s +b0c9c3a174140a79739bb028541bac8d ld/testsuite/ld-unique/unique_shared.s +0a7542c4cd6da2ebfeb36c7394f7e9bd ld/testsuite/ld-v850/split-lo16.d +ed0ddb6caa20106cbc5b60ab5e9aac8e ld/testsuite/ld-v850/split-lo16.ld +087975db2e2095342de4570a8829f4bf ld/testsuite/ld-v850/split-lo16.s +cbdd08a087899b24d673cccf878f3be9 ld/testsuite/ld-v850/v850.exp +a3dd5e83356444e20dfff2b6986f9701 ld/testsuite/ld-versados/t1-1.ro +20fa39afdcf19846ef54b8c8a63c09fa ld/testsuite/ld-versados/t1-2.ro +750043b1377753643d66f2ea010d1d64 ld/testsuite/ld-versados/t1.ld +1ea1a397873490e5a225282b08911b79 ld/testsuite/ld-versados/t1.ook +b73a148ff92b3b9f50118dedddc8e9aa ld/testsuite/ld-versados/t2-1.ro +6521d61c4bf4f500cb868ded9a47044e ld/testsuite/ld-versados/t2-2.ro +ed2b6b448335acf507dc34b5a01710d8 ld/testsuite/ld-versados/t2-3.ro +7020c6c2928c89ca798f517226862f1c ld/testsuite/ld-versados/t2.ld +fb1e9ddf26ad5af0d34950d762f68ed9 ld/testsuite/ld-versados/t2.ook +3415c5263545bdf01296e35ee86fecfa ld/testsuite/ld-versados/versados.exp +0ac6d96980ebb6b81c69774ffc697c63 ld/testsuite/ld-vxworks/plt-mips1.d +357d34584d0ce544d104968913d82663 ld/testsuite/ld-vxworks/plt-mips1.s +0ceeb13aa35a9b3f811619f9e81b008c ld/testsuite/ld-vxworks/rpath-1.d +926d3c71162f104f484e498814083cd8 ld/testsuite/ld-vxworks/rpath-1.s +158dba230909371ac9a0a10d47d5dffd ld/testsuite/ld-vxworks/tls-1.d +029facb94904524927ba5651a93ff46a ld/testsuite/ld-vxworks/tls-1.s +266b4c711778e9a25f4e7e1de3ba1c8a ld/testsuite/ld-vxworks/tls-2.d +029facb94904524927ba5651a93ff46a ld/testsuite/ld-vxworks/tls-2.s +d37080e69a6df409c1d42f3cf866fd19 ld/testsuite/ld-vxworks/tls-3.d +6d47989df8b18f1c4fc1a3f75da74605 ld/testsuite/ld-vxworks/tls-3.s +502197b67c0367179cc75e2c5729d119 ld/testsuite/ld-vxworks/vxworks.exp +9a6d2be9e1eec47f9eae75552f420bbf ld/testsuite/ld-x86-64/abs-k1om.d +151f4eb16cb1586fe6ede9ac93f9614e ld/testsuite/ld-x86-64/abs-l1om.d +cef5f0e760808d3d311df39bc5c74a7d ld/testsuite/ld-x86-64/abs.d +91a199ecf6afe1be369939ed9c9e78d2 ld/testsuite/ld-x86-64/compressed1.d +f05168212b4b926d40f433c53fba8a2b ld/testsuite/ld-x86-64/compressed1.s +babdbe781c8d5be6c3dbbff7d988aef8 ld/testsuite/ld-x86-64/discarded1.d +1bfcc1f21b66eca2b04e589e1e4d8d78 ld/testsuite/ld-x86-64/discarded1.s +932839e2d4e600dcdc966010e4965a31 ld/testsuite/ld-x86-64/discarded1.t +8374b35f68412379bade5bfa6ce108b2 ld/testsuite/ld-x86-64/dummy.s +64f2c2f7de3c7a2d635a5cb20953a723 ld/testsuite/ld-x86-64/dwarfreloc.exp +0fa0abb32b3a08f7d4064c80ea7b2dfc ld/testsuite/ld-x86-64/dwarfreloc.rd +7f5acf37270de8f8b40fabdf0012b323 ld/testsuite/ld-x86-64/dwarfreloc1.s +9ef00e83851b860927383972f8a30bba ld/testsuite/ld-x86-64/dwarfreloc2.s +9b4555015075d610d1ab4a1d5b0a8365 ld/testsuite/ld-x86-64/foo.s +8aee9f93efb12b66efb79d5f29dac642 ld/testsuite/ld-x86-64/hidden1.d +4e2a98726d8bfdb8233e273a0eac2a98 ld/testsuite/ld-x86-64/hidden1.s +62daaced3e457349cb516b978b27d7d4 ld/testsuite/ld-x86-64/hidden2.d +ecab80f3eb47cc5bc5871e947f9b395e ld/testsuite/ld-x86-64/hidden2.s +8aee9f93efb12b66efb79d5f29dac642 ld/testsuite/ld-x86-64/hidden3.d +567392b63521a6cd13dda8dd82746f26 ld/testsuite/ld-x86-64/hidden3.s +1eccb618d95e721641240b74ed62c642 ld/testsuite/ld-x86-64/ia32-1.d +e1af01c2db8c562a357a68a604928342 ld/testsuite/ld-x86-64/ia32-2.d +38b012e85b1add2a7c3212cbd0d79a3b ld/testsuite/ld-x86-64/ia32-3.d +b101982f5a86318d2375f4f4da017759 ld/testsuite/ld-x86-64/ilp32-1.d +268bc1942a1e755cd3c654d0e508b92f ld/testsuite/ld-x86-64/ilp32-2.d +bcb275308c6dfdac7471864d730d5c52 ld/testsuite/ld-x86-64/ilp32-3.d +651d8691eecc472a06e578e4beee5864 ld/testsuite/ld-x86-64/ilp32-4.d +d7079a3fd5a0a111ba2ea5dd55616d3d ld/testsuite/ld-x86-64/ilp32-5.d +7954dde5079359f5cd824b28d50a9196 ld/testsuite/ld-x86-64/ilp32-5.s +8b506013901cb32409281cd64fb392cb ld/testsuite/ld-x86-64/ilp32-6.d +ec4b4e4478b21427988b01b59820265e ld/testsuite/ld-x86-64/ilp32-6.s +8b506013901cb32409281cd64fb392cb ld/testsuite/ld-x86-64/ilp32-7.d +76ecf90c40aca9fca8981605664c59d5 ld/testsuite/ld-x86-64/ilp32-7.s +bf21ba63bd85e5adf70cae5b669acbf5 ld/testsuite/ld-x86-64/ilp32-8.d +8ccd01fe31d327e874036b52261bd457 ld/testsuite/ld-x86-64/ilp32-8.s +da5feba68009b050645270242e4012bb ld/testsuite/ld-x86-64/ilp32-9.d +c5f029cfbe1c37c21600a3f33317e23c ld/testsuite/ld-x86-64/ilp32-9.s +146038f22f812e2e9950a251d511ecda ld/testsuite/ld-x86-64/line.exp +8b905a91280feb6457ea181fd73a323e ld/testsuite/ld-x86-64/lp64-1.d +d420a618c8e584b2e5f144dc4a758b26 ld/testsuite/ld-x86-64/lp64-2.d +4f05291bce52713286c80fdd0addaec0 ld/testsuite/ld-x86-64/lp64-3.d +d2cc20922f8c13552d8408937c0dc359 ld/testsuite/ld-x86-64/mixed1a.s +4d0dbcb04007c40051f880f7284a923c ld/testsuite/ld-x86-64/mixed1b.s +abdcc69d97f8ebee73023595bce7025b ld/testsuite/ld-x86-64/mixed2a.s +798ce3b5d7f9cb57bb5e96b3b872b894 ld/testsuite/ld-x86-64/mixed2b.s +a956e939a802d200c7d34d52a64a10ca ld/testsuite/ld-x86-64/nogot1.d +b87c72722f3341ed9b3757e163aedca4 ld/testsuite/ld-x86-64/nogot1.s +14e17be79014d34039412c205d75a578 ld/testsuite/ld-x86-64/nogot2.d +648f81bd49c5e890089548cbd33b3da4 ld/testsuite/ld-x86-64/nogot2.s +af0ad14af8840e67e77697fb7d8be877 ld/testsuite/ld-x86-64/pcrel16.d +21deaf5784d704c09916457834ccb87a ld/testsuite/ld-x86-64/pcrel8.d +0b512eff08b19c348d6537b2c39f78cd ld/testsuite/ld-x86-64/pr12718.d +f2aa8181f8bb6e72317ba9cf91579fa6 ld/testsuite/ld-x86-64/pr12718.s +765aaf0af5e659d562db0e513f9f3fc1 ld/testsuite/ld-x86-64/pr12921.d +9bc8273e473647c31df4d698250c1af1 ld/testsuite/ld-x86-64/pr12921.s +ae9d4260c075a5b000efe2347793b99e ld/testsuite/ld-x86-64/pr13082-1.s +827689a23417745c409460a8e2f2e7c5 ld/testsuite/ld-x86-64/pr13082-1a.d +32f55c0d58b44ead4c720f62c8cbe64e ld/testsuite/ld-x86-64/pr13082-1b.d +fb16aff9e960af23796cfca20399c98b ld/testsuite/ld-x86-64/pr13082-2.s +9a6519aa5b01812fe791fca2b4175faf ld/testsuite/ld-x86-64/pr13082-2a.d +73452a50c642ee8c9d5d855cbca7b27f ld/testsuite/ld-x86-64/pr13082-2b.d +6b1f8ceeebdaa745f4e0ae66ee8a1376 ld/testsuite/ld-x86-64/pr13082-3.s +644a943e0c220c3d0d4e8fdaacead4b1 ld/testsuite/ld-x86-64/pr13082-3a.d +f4af2676d566c059ed73c98171df7137 ld/testsuite/ld-x86-64/pr13082-3b.d +a1b3726a623a9e74441e9582fdcd9e46 ld/testsuite/ld-x86-64/pr13082-4.s +3aa77baad0c9bfe54851369dfbbb6fbe ld/testsuite/ld-x86-64/pr13082-4a.d +410dba88987e77744c3308292d1cefb9 ld/testsuite/ld-x86-64/pr13082-4b.d +efc1aac9c36a384bba00eee40d3d59ed ld/testsuite/ld-x86-64/pr13082-5.s +97a42d3b47757ae5be6874e3ef88fd9b ld/testsuite/ld-x86-64/pr13082-5a.d +0cb0e2c204b4698305726329007e19cc ld/testsuite/ld-x86-64/pr13082-5b.d +2a7869db05a1555203636430f48fc788 ld/testsuite/ld-x86-64/pr13082-6.s +dfb5e1f1422ba64d52cc62b45b04c97d ld/testsuite/ld-x86-64/pr13082-6a.d +3bf4af4b7fc51ffdd1caa35e99d98f1e ld/testsuite/ld-x86-64/pr13082-6b.d +5a16c8b33f7fc14a778a75390211d675 ld/testsuite/ld-x86-64/protected1.d +72464b10c9ddf08d601e6e1981160a76 ld/testsuite/ld-x86-64/protected1.s +799b5e6cfeb966e6f8ab5e471149673f ld/testsuite/ld-x86-64/protected2-k1om.d +bca876ebf90770ff539ec16381261433 ld/testsuite/ld-x86-64/protected2-l1om.d +78fffea07873d857eb20ff893f9b5514 ld/testsuite/ld-x86-64/protected2.d +3c225f378aa9175db095f949d3da69ee ld/testsuite/ld-x86-64/protected2.s +27707fa0dff0b02118f4264682383999 ld/testsuite/ld-x86-64/protected3-k1om.d +56d19515835d0e1768a8bdbad75b69e7 ld/testsuite/ld-x86-64/protected3-l1om.d +7ec2436cba802c53cccdb664a1ec2d7a ld/testsuite/ld-x86-64/protected3.d +b048982979e3a6bf526c3d15561c82dd ld/testsuite/ld-x86-64/protected3.s +85c94ea018000b40db5b1d5f4918e69f ld/testsuite/ld-x86-64/simple.c +124c1bc62998388d007a06a440c61b1a ld/testsuite/ld-x86-64/split-by-file.rd +a25bbb47f09f886630069fa0ede05e01 ld/testsuite/ld-x86-64/split-by-file1.s +092551c720d9237b2142c771156f85bc ld/testsuite/ld-x86-64/split-by-file2.s +603c560dc71d0192f0a9f4ffb1ed9f5e ld/testsuite/ld-x86-64/start.s +de7c811fe61d3d4236ccc56a2ac59b4b ld/testsuite/ld-x86-64/tlsbin.dd +7624337f6af913251d93230cd6039df3 ld/testsuite/ld-x86-64/tlsbin.rd +075abf636588564a63ffebddb4678817 ld/testsuite/ld-x86-64/tlsbin.s +f61a7f8b7d85d67804e36cd0d3058fe3 ld/testsuite/ld-x86-64/tlsbin.sd +cdb541667d6d911d35375bf3330da611 ld/testsuite/ld-x86-64/tlsbin.td +3d672e3839bbd66e086ca684f48af482 ld/testsuite/ld-x86-64/tlsbindesc.dd +18e9de9ffe6472d4be5936c2de7d7274 ld/testsuite/ld-x86-64/tlsbindesc.rd +28cd3b7eae777449d9f558eb5822d108 ld/testsuite/ld-x86-64/tlsbindesc.s +6f53084d69c6d7685024742940045abf ld/testsuite/ld-x86-64/tlsbindesc.sd +a1fd1ad23666d0e4fa820ff948af0c3e ld/testsuite/ld-x86-64/tlsbindesc.td +5f275de647d9dd02072a59dd6c4dd2cf ld/testsuite/ld-x86-64/tlsbinpic.s +fd6b4b2c38dafc8b42436dea4454b440 ld/testsuite/ld-x86-64/tlsdesc.dd +b0ef250d81116456b7baf3ce9a3d3c5b ld/testsuite/ld-x86-64/tlsdesc.pd +2af7661e23605750c2c876c7dfdc6275 ld/testsuite/ld-x86-64/tlsdesc.rd +a247554344f5bad8c449d63434ac20e5 ld/testsuite/ld-x86-64/tlsdesc.s +6d5ccbf7a53882f245ede0f0ad0724b5 ld/testsuite/ld-x86-64/tlsdesc.sd +012b54770105b042c8227783f5520292 ld/testsuite/ld-x86-64/tlsdesc.td +62d4929ce74fe4c87164c5548e80d3cf ld/testsuite/ld-x86-64/tlsg.s +6ae3f3a98488e4cba405bf68cc7b742a ld/testsuite/ld-x86-64/tlsg.sd +63883ee90e3d4bc6bb43145575b8d379 ld/testsuite/ld-x86-64/tlsgd1.dd +40f13ae560cff413e2572c65c56318f9 ld/testsuite/ld-x86-64/tlsgd1.s +5b7629fd8f67ca705fea4869a164779c ld/testsuite/ld-x86-64/tlsgd2.d +f0cdbf9cc3ba566313b4bc11de68a57d ld/testsuite/ld-x86-64/tlsgd2.s +5c83de12625c5c81b84b67dbc775e8c2 ld/testsuite/ld-x86-64/tlsgd3.d +1c1c53433eb7999c0e421cfcdd4f3448 ld/testsuite/ld-x86-64/tlsgd3.s +ad977355db53c511e88846e4014a9f7e ld/testsuite/ld-x86-64/tlsgd4.dd +934257c43f7852f50a49aa497e98cd34 ld/testsuite/ld-x86-64/tlsgd4.s +4aa08273fde18fe9f922bb53e1fff0cb ld/testsuite/ld-x86-64/tlsgd5.dd +1be55a9c7f6158dfe9dccd5bda9cead2 ld/testsuite/ld-x86-64/tlsgd5a.s +473c03031e2c7147bdc54b0b4c7f0b72 ld/testsuite/ld-x86-64/tlsgd5b.s +ed7c309fc96ff106114984ab2ea3987a ld/testsuite/ld-x86-64/tlsgd6.dd +3e764b037d14a88f8038f643a6838d1b ld/testsuite/ld-x86-64/tlsgd6a.s +473c03031e2c7147bdc54b0b4c7f0b72 ld/testsuite/ld-x86-64/tlsgd6b.s +c162fb4f43877c4341fc5b070390ab07 ld/testsuite/ld-x86-64/tlsgdesc.dd +e51142d067f71f748e2d50482644491d ld/testsuite/ld-x86-64/tlsgdesc.rd +210b96ca733b3982a77955970b126e5f ld/testsuite/ld-x86-64/tlsgdesc.s +7080a1e97e7d1681e5a1e9da28ccc65e ld/testsuite/ld-x86-64/tlsie1.dd +4732b2d3b38a90890896eccd0356a0f7 ld/testsuite/ld-x86-64/tlsie1.s +e9d4de113c5b49a3bdc4cf5e3ba9e5a7 ld/testsuite/ld-x86-64/tlsie2.d +d9240622cc20d0919532be278ad7402e ld/testsuite/ld-x86-64/tlsie2.s +e5bceeea7613b8d9c157210660cadcb1 ld/testsuite/ld-x86-64/tlsie3.d +c7b4057f12b94f3abf30c4f84a54854e ld/testsuite/ld-x86-64/tlsie3.s +9ce9e68f90fbdcca31155898a8108198 ld/testsuite/ld-x86-64/tlsie4.dd +a37c4da98dcec520ab5444678bcd3456 ld/testsuite/ld-x86-64/tlsie4.s +7b60a69b4c2ca65fccc94ef6cc2be2bb ld/testsuite/ld-x86-64/tlsld1.dd +0556743c96e0ca791f9e7cf0d8afaf39 ld/testsuite/ld-x86-64/tlsld1.s +48210a07f215c11eed171deaa6001619 ld/testsuite/ld-x86-64/tlsld2.dd +0556743c96e0ca791f9e7cf0d8afaf39 ld/testsuite/ld-x86-64/tlsld2.s +bddcc18e778b7c77d37c46fd8e45378b ld/testsuite/ld-x86-64/tlsle1.d +263b1c7934263353824c403da30eb39f ld/testsuite/ld-x86-64/tlsle1.s +8c2ec5a661ed74565c24b65f22a230ad ld/testsuite/ld-x86-64/tlslib.s +5f50aa593bd6af28fd745c7332ba9401 ld/testsuite/ld-x86-64/tlspic.dd +21498fa99df841710b17f18bea0547d2 ld/testsuite/ld-x86-64/tlspic.rd +38e156962136c462ac355e9bab80be2c ld/testsuite/ld-x86-64/tlspic.sd +550560267d7a0f6a31490ee4c9c7603f ld/testsuite/ld-x86-64/tlspic.td +ee7691553eed047cd215df33232e3a67 ld/testsuite/ld-x86-64/tlspic1.s +1be6d8e1547c710f7bc12028c6522832 ld/testsuite/ld-x86-64/tlspic2.s +5bbecf9422892b0498f9640c06054e11 ld/testsuite/ld-x86-64/tlspie1.d +86983dbba838659fbfb4cbdfdb7c0324 ld/testsuite/ld-x86-64/tlspie1.s +f7cb6b2e0f6ec97f125fe2d8345e0263 ld/testsuite/ld-x86-64/undefined.s +4a99ed2c60633e8c95293670abbb1d6a ld/testsuite/ld-x86-64/unique1.d +e0d78f0f8725bde6333bcd56ccb083b8 ld/testsuite/ld-x86-64/unique1.s +6c5efb94140f6bea6d1e05ddd22d9ce3 ld/testsuite/ld-x86-64/x86-64-x32.rd +53bc305eeb616ce59cdd20b57de52534 ld/testsuite/ld-x86-64/x86-64.exp +6f577583952be3de543260d5fb8bbb16 ld/testsuite/ld-xc16x/absrel.d +3998ca79d045f299d12bbd0cf1e6205f ld/testsuite/ld-xc16x/absrel.s +01a0b5ff12180f56fd3e59aca1729442 ld/testsuite/ld-xc16x/offset.d +1f6dbcccb182d6b602c350c41af6da1b ld/testsuite/ld-xc16x/offset.s +c79d7034cdc00b1ef5f6063eb95f5c0c ld/testsuite/ld-xc16x/pcreloc.d +7aefa0a8f34a16164d08456ec76b6fc3 ld/testsuite/ld-xc16x/pcreloc.s +049fad93eab7776029ac7ce488ac7ea0 ld/testsuite/ld-xc16x/pcrelocl.d +7cdd42697f1d7b6cc687e770974595e3 ld/testsuite/ld-xc16x/xc16x.exp +c672c9391c0476202146864913baf1cf ld/testsuite/ld-xstormy16/external.s +3105964d5d4b7fb1c6827105fc30d4f6 ld/testsuite/ld-xstormy16/pcrel.d +a8dbf5f9838a94e3e1d6bb3ac1ffb031 ld/testsuite/ld-xstormy16/pcrel.s +73ab4af181f6f013c8f6a9ec508d4884 ld/testsuite/ld-xstormy16/xstormy16.exp +9832dc58c2691b416bbfb53c352fc610 ld/testsuite/ld-xtensa/coalesce.exp +f242f65208286ce6c777e52159a52efe ld/testsuite/ld-xtensa/coalesce.t +86df88ae4915f743772325ebdb29c512 ld/testsuite/ld-xtensa/coalesce1.s +ebdcd6e72a4579e5cecbc5bea6ff3410 ld/testsuite/ld-xtensa/coalesce2.s +3de3229a4a332e3e139cb39f0eeb068d ld/testsuite/ld-xtensa/lcall.exp +f242f65208286ce6c777e52159a52efe ld/testsuite/ld-xtensa/lcall.t +94cc8713eb0fe35038d64fdd1b12cb88 ld/testsuite/ld-xtensa/lcall1.s +f3bb78e2bbd6bac90e08899f09dab316 ld/testsuite/ld-xtensa/lcall2.s +ec444c64504b1bc179bc2dad83c7a2ba ld/testsuite/ld-xtensa/tlsbin.dd +222173cad9ca2b0795c7a472c79b73cc ld/testsuite/ld-xtensa/tlsbin.rd +2585ef8283af0fca55d9284792e5ec0a ld/testsuite/ld-xtensa/tlsbin.s +19584892dff40a9a565a9368496b4172 ld/testsuite/ld-xtensa/tlsbin.sd +bc01f211012e4da49bef7d1f6fe1fd60 ld/testsuite/ld-xtensa/tlsbin.td +451eacc338064e33179318c085a7c7a1 ld/testsuite/ld-xtensa/tlslib.s +ebcd7d779b67f5256d84598e2a1c34d7 ld/testsuite/ld-xtensa/tlspic.dd +6c72b6411a86d2641e0b997d3c099454 ld/testsuite/ld-xtensa/tlspic.rd +9a499e239e3af1548836ce06df663d4d ld/testsuite/ld-xtensa/tlspic.sd +af6ef4c448967808937e6f2fcd6fa1f0 ld/testsuite/ld-xtensa/tlspic.td +4708405ca88b87cf00e84d231c449689 ld/testsuite/ld-xtensa/tlspic1.s +74dc12cdbe5ac4b2c634e5dc8b770127 ld/testsuite/ld-xtensa/tlspic2.s +2f4d300c622bfb7444899f021a279fae ld/testsuite/ld-xtensa/xtensa.exp +dcac57a49ba303c93e673658c261be6e ld/testsuite/lib/ld-lib.exp +01627b664c7e61ab5dc202bb72913e0a ld/TODO +99c2e5e712b990ee07be10f53e41f3fb libiberty/.gitignore +8797cb1a6faa84f3c7fe3d12164a4b13 libiberty/_doprnt.c +9e0fa3abcd04ba6712cbd50ec7ea1bb8 libiberty/aclocal.m4 +e60c2e7c5dcdd19510066c13f1a527d3 libiberty/alloca.c +e5732ad77f36bdaa7590cb9e822b78ab libiberty/argv.c +1ff1c82c53060dceecc901cf0b63c950 libiberty/asprintf.c +a16ea056b95fd70c21333db132da14ff libiberty/at-file.texi +c34119797a13e71989722851c14b711b libiberty/atexit.c +ab8d4cd68aa4892e2318d2c71864cc56 libiberty/basename.c +17a1f1d7f5acf01ce922d98210067542 libiberty/bcmp.c +a707d2e5daa09d204d4441e8713048ca libiberty/bcopy.c +76888d9a6ed315d1e12029016d96672e libiberty/bsearch.c +4a0acb9356a52f3bcfd67efa26997b58 libiberty/bzero.c +5bd055836a440051d7c561a9f591ecbb libiberty/calloc.c +99353c8570e7b21e3e74461782ae7c8b libiberty/ChangeLog +c67a6e0ba850ef5fb86522ddb2e87e5c libiberty/choose-temp.c +a8391a5d7431a4e11f61be41386a3356 libiberty/clock.c +5d5d14621573984e4b94b1ceb9299fc3 libiberty/concat.c +4004fdcde347fda58406b4b84a995c66 libiberty/config/mh-aix +7b65854f594c84e80295173de277b3dc libiberty/config/mh-cxux7 +044204f5b4bcac5eae2face0602129ae libiberty/config/mh-fbsd21 +904bdcd9daf97fa55a9ca8901ffe7435 libiberty/config/mh-openedition +38e76da568ab25260754fdb9d5080513 libiberty/config/mh-windows +83565a31c7f296b3013daf383cd03ee9 libiberty/config.h-vms +44d9a67ca74e0a4744f9c751d345b849 libiberty/config.in +b112c3ae14be9d020a1cdd185bcc9099 libiberty/configure +5d9a5592c3884692916e7456817c0a72 libiberty/configure.ac +5824bd0f9be9f4fa74bb3bdc7fd9431c libiberty/configure.com +a8959f1d1758eb14819753023f89d199 libiberty/copying-lib.texi +a916467b91076e631dd8edb7424769c7 libiberty/COPYING.LIB +fe053283d3559af3ec5cac45f8ead009 libiberty/copysign.c +38c8a79391576c3fb3d7a0578505a598 libiberty/cp-demangle.c +4aaee5f46bac9e50f23fabebe62cded5 libiberty/cp-demangle.h +6af921a6efcb5621c06ff9b2a8769b01 libiberty/cp-demint.c +37193048466b1b0934121905ff3f534f libiberty/cplus-dem.c +7c69a6c6a36925e0ca6f068473e6d858 libiberty/crc32.c +d31a55379aa2dc43eb6858a26c4a6c76 libiberty/dyn-string.c +d7cc74911527c672bba716c9a793ed94 libiberty/fdmatch.c +0c2635175b975823b40980974dfc2110 libiberty/ffs.c +14fdd881914e69080c65de413c7b6ecd libiberty/fibheap.c +1c0244e5edb10602e11b34716b1edff7 libiberty/filename_cmp.c +c324184243607652409c3844f262f040 libiberty/floatformat.c +aa0f79d836563e6a0cd92ab678b07aaf libiberty/fnmatch.c +145debe2f28f470878f95b1255f5537c libiberty/fnmatch.txh +5bc3cf9b5b331ec27790ba0599f2875f libiberty/fopen_unlocked.c +dd3cd06b4589a4a3b3ea8b7a14bedb8d libiberty/functions.texi +8b8ae14c1fbedeb88355f09bc7a7ecfc libiberty/gather-docs +754c5ef42440c5d1b62146174a6636e4 libiberty/getcwd.c +eb843075f87d187630f6a3d849b93e64 libiberty/getopt.c +7c932073da197aa34eb3383960a114fd libiberty/getopt1.c +bb0043d92c716691cc17b80c845c336b libiberty/getpagesize.c +5e520e600636a692f52e62dcfb01921c libiberty/getpwd.c +5c0eb869d31323424849c0aab9247722 libiberty/getruntime.c +0c70ad1e35bb090b52ed593865025741 libiberty/gettimeofday.c +171e310576a238212ac4b6ac6ec3ccaa libiberty/hashtab.c +048d9004ba3a2badb7abe6e0afd8f663 libiberty/hex.c +4d485e7735be430b22aea0abb4938e26 libiberty/index.c +9d0471286f21d9027bbf1b7c67b87856 libiberty/insque.c +5b4506ce60bb3446f083b9542af3fce0 libiberty/lbasename.c +9905223327acad708d5b0a28e8047cdc libiberty/libiberty.texi +2c56f9552603480f87b7136972894128 libiberty/lrealpath.c +fe4e25fb7df7cacdc921eaf39ce595af libiberty/maint-tool +661dd1cfd866f16a426aafedaae4523a libiberty/make-relative-prefix.c +0172f6488e44155e35d94e3f2c5c3c5c libiberty/make-temp-file.c +4e7c755ba4f1af30dd32d8ecde424293 libiberty/Makefile.in +379561229f99437be05ede87fbcf8533 libiberty/makefile.vms +87d1087d1cd8bdec7e57bcdf147a9cc5 libiberty/md5.c +de9bd20436bf2cb64d8c374c110ce315 libiberty/memchr.c +33320d312ab390ca0eb5c43c9e349d57 libiberty/memcmp.c +c90c2f09bdcbd65b4732a4be25a56d12 libiberty/memcpy.c +abdf0787024ad239a36f6c8377a8c29e libiberty/memmem.c +99bfeaeb76e8e725dd8766f33810ccb1 libiberty/memmove.c +ac4d94d7fedc8abaa75b57da06101b03 libiberty/mempcpy.c +c44adc5ac09bdc782a8e13086ffa9367 libiberty/memset.c +3c555b2960666ff51ab2faa4fb9ed0d5 libiberty/mkstemps.c +7897e43bedd2def4beb6eb73003efa68 libiberty/msdos.c +684ab2f5de6b46501aac279f2bd2f92b libiberty/objalloc.c +ab0f43a6703e0705b4e8bac274635b56 libiberty/obstack.c +100e19ca9daa12d591302f5292108378 libiberty/obstacks.texi +f4ec5461a2fdb28214092b95b39ef186 libiberty/partition.c +96a77c36aeb901544290055a6c9afd0f libiberty/pex-common.c +91d9c98c4feb994b1f62f5fd7124fe41 libiberty/pex-common.h +9c9f332011572cd3bc1b606c878bd707 libiberty/pex-djgpp.c +581ca82c700722ff2cdd7fd93c0a0c11 libiberty/pex-msdos.c +d67a9b0906ffa961fdc411aa936fdfb1 libiberty/pex-one.c +452d4245168d96c6e66637ad1f9a382f libiberty/pex-unix.c +8228d61a0df6bccc7444c1e331bd6fd2 libiberty/pex-win32.c +fa294b254945587548ca6b32d7922d03 libiberty/pexecute.c +a6b1581efa83a4072727b38d6fef4230 libiberty/pexecute.txh +af9bee5d1912e623defe1a7ee0ebc296 libiberty/physmem.c +f7e45d3f23f83574372065030595efa7 libiberty/putenv.c +94f22680349b4ae73ad658495d2eb542 libiberty/random.c +c68dbf7834af4281ebd84caa3fd54680 libiberty/README +cb83524b0a7871563f11d52efec54a62 libiberty/regex.c +24eab3d83825c3be13549dc62b6d63d6 libiberty/rename.c +74850488731148a9c9f410042144f37d libiberty/rindex.c +b91dd39a7b9d4c9d03edc8a6cdf81978 libiberty/safe-ctype.c +67aa86d16c993dddfdf9c2d91b910578 libiberty/setenv.c +5cce049df0e7ecfbe8d9f43dec4f9110 libiberty/setproctitle.c +7e177a54e64c2b7cead1b03ef3354e91 libiberty/sha1.c +cafcb336a6d21898592c5cdaa7c5a3a7 libiberty/sigsetmask.c +98b261f5b750c15964376543f20ce838 libiberty/simple-object-coff.c +46cc2dd9ee3647f96b12b4147a56ea3d libiberty/simple-object-common.h +6a644ae380b64c2263b8c5070340c1ee libiberty/simple-object-elf.c +505f7cf4bc24a21d7ade77a8c84cfcbb libiberty/simple-object-mach-o.c +5038f5b200deaf5a04ba42e010085d5d libiberty/simple-object.c +4863a11e04a2021af582edf86f156954 libiberty/simple-object.txh +e34c9d634af52457ef9c7973d9879d48 libiberty/snprintf.c +32ea90e5aded75d1cbed83fc52123753 libiberty/sort.c +2a636db0be7babf70662b1387ae73354 libiberty/spaces.c +60612038a3f96d55b6be45cb8b5cf217 libiberty/splay-tree.c +8ee69b2d3c5fac2cf556666eb0c26b9e libiberty/stack-limit.c +bac20c1a198662917e6bc775ad9bd0cf libiberty/stpcpy.c +6d8293add4026ed6717d39608786d5f6 libiberty/stpncpy.c +0c900e9180d750a26ac0ddb237151832 libiberty/strcasecmp.c +13cce636dd9882e42c9fc5d607351f4f libiberty/strchr.c +9f681e91439ac44c9df8e1b1deef33b5 libiberty/strdup.c +b3aaeed201f3c6fd293e9f9618350bfe libiberty/strerror.c +2d414e20c053293f373a5306192db8f5 libiberty/strncasecmp.c +cc534c2ea00ea0b5e49ba8f61c6e467d libiberty/strncmp.c +2d92725e49581d86d7cf06fb40def19d libiberty/strndup.c +5b0eb0000c746fc4c1854f00bb80b53d libiberty/strrchr.c +f214096086d1747033efa505022dd89c libiberty/strsignal.c +e2f3721273c7ef1ab0194aad78ffa3aa libiberty/strstr.c +0cf8d9985fc4c93d80dd1b0f95431a96 libiberty/strtod.c +c9bd3841bbde6d8ae680f62523f00ab0 libiberty/strtol.c +26196a9a92fae743a06d65f0e081084b libiberty/strtoul.c +9e1bb6fe95ebb6415672ddf1da29ec65 libiberty/strverscmp.c +3f2a11482f621359c5a0fd1c59fc294c libiberty/testsuite/demangle-expected +8f24f8939540ed6d58ad0dcdf1132562 libiberty/testsuite/Makefile.in +85c7215f6a2d5dde81ab2e8211a4becc libiberty/testsuite/test-demangle.c +d4cc425bb97dbff240fe7c804bdc00f4 libiberty/testsuite/test-expandargv.c +e9e958dbfc45a08dbbbbe48c83d3987e libiberty/testsuite/test-pexecute.c +6b513119d8c36af928821e8ec24265d7 libiberty/tmpnam.c +fed47804d20d26873d480f5166e7d864 libiberty/unlink-if-ordinary.c +39c4dae2cfe62dd9172b48cbbb969d93 libiberty/vasprintf.c +8e71982d77e91c0e3c57ca86c8a1b548 libiberty/vfork.c +dc973aeb02b4545e42f179263612a4d6 libiberty/vfprintf.c +28af0a1bf222ed2a5a87d9e170ef4a46 libiberty/vprintf.c +88518587b4d0a0245a21ef3ae29de3bf libiberty/vsnprintf.c +9e789d58cebe756b96be30941debb05e libiberty/vsprintf.c +9c22926d0b260822786460b98e517ad8 libiberty/waitpid.c +f32b581d10bcc500277b6f4b4f923a4e libiberty/xatexit.c +22389f4e282e4b739e0c1d70cba66cc1 libiberty/xexit.c +cdc140ce93944c5bb2ac62cd3dfd86d6 libiberty/xmalloc.c +72b25900bd3d95decf7ff7990061ef29 libiberty/xmemdup.c +4746095b1b67693ab6e78ed72ead1235 libiberty/xstrdup.c +6f774a92661ca4a067f1691a7925524b libiberty/xstrerror.c +c6e7ef53b4ff115a136d917511222656 libiberty/xstrndup.c +d65d47d2ff82eaf7b39fbf26d000eb96 libtool.m4 +247597a3fcc5b5aa8bd923351c59d853 ltgcc.m4 +01d0921596c9fa4d9a7add89fd6fc1f1 ltmain.sh +dee72a6a60e99528b0d17bf3ff9a1e15 ltoptions.m4 +bc2f6032c98896249eadb56177c7d357 ltsugar.m4 +c30cd33c496505f13d9fbdb6970c7c33 ltversion.m4 +293853a13b7e218e3a4342cf85fbbf25 lt~obsolete.m4 +734690a438420e8479e15d8ee6971792 makefile.vms +9d9668fb32d0542b712be2c34ca79bd7 missing +fbe2467afef81c41c166173adeb0ee20 mkdep +766574f467c38d27fc7604ca8eb6734c mkinstalldirs +f1fff2ea196cbf6fe4634bc3edc5af4d move-if-change +ef6602b963f2a903ab9c81134c6b8d29 opcodes/.gitignore +1eabaeb9aa44234d9977c09f3ed932e5 opcodes/aclocal.m4 +0d183fbfd7a3b3bbb706594c41604ace opcodes/alpha-dis.c +b2c7455ac27ff79f81ccb4aee922e6a1 opcodes/alpha-opc.c +f7637eb4db64ff973cf56bc4e2ca4d06 opcodes/arc-dis.c +6d22b958c28df865e858391b44aa0532 opcodes/arc-dis.h +c68a361ec50354fc6b61bf73aaf01acf opcodes/arc-ext.c +b3d65ebfe89e547896663c61def89981 opcodes/arc-ext.h +e016668afed76e3602ac2c0b9c8c5f9d opcodes/arc-opc.c +552442f3ef866c85329850b942ed0fc9 opcodes/arm-dis.c +6556c6c47ae03ad7481e97718ca99152 opcodes/avr-dis.c +f26dec5aa530f30f80b4f22c96391719 opcodes/bfin-dis.c +45cea674fa428a0345e51f278752257c opcodes/cgen-asm.c +d92cf67612895b65ff62ddb82f9b5543 opcodes/cgen-asm.in +2e26c2d5bcab8c834c3f8748325f7367 opcodes/cgen-bitset.c +4ffab65c39d688bd5e8078e10b92df4c opcodes/cgen-dis.c +3f344b4342a0f690134a85b456e303e0 opcodes/cgen-dis.in +a270403bead8816e5e9a909aa991e2b1 opcodes/cgen-ibld.in +3f509397dc42868fd6b3b4369364f3c6 opcodes/cgen-opc.c +bc080d7ab00992593cfa8b975cd771a9 opcodes/cgen.sh +09f0226ee274cb289f0046634c0c6f63 opcodes/ChangeLog +1b4b8646bdc7ad5a2f9071d8ac8b024e opcodes/ChangeLog-0001 +83ac14eead5eda1862cc926b82d35cea opcodes/ChangeLog-0203 +d4cca6dd9882292b6f2e17604bed6cbd opcodes/ChangeLog-2004 +95966cf6bc7711aae732addbfd33ce65 opcodes/ChangeLog-2005 +7ba43e2b6e32ab09a694143b260d7f93 opcodes/ChangeLog-2006 +066e38fddf56239fcd4ab773798695c3 opcodes/ChangeLog-2007 +aaf7e24e3596c794e506477ee65123ab opcodes/ChangeLog-2008 +caa6c6acfe99f77e960674fab34611f2 opcodes/ChangeLog-2009 +9f388ebefba474c0479df23b8458d128 opcodes/ChangeLog-2010 +568db2b4641150f46a18da55529d8d3b opcodes/ChangeLog-9297 +fc3adcd099179b77d2adb79ada21a89c opcodes/ChangeLog-9899 +42a395f87f37d432f30615448f2e9dde opcodes/config.in +ddd88b6577a9126dec274d4a3eb91412 opcodes/configure +70a452d27d058e90c3d5ea0c77390d74 opcodes/configure.com +6c6e3727ea511308f0d72b6c9a45ae39 opcodes/configure.in +d5ffc6e2dece475d856226677a75965e opcodes/cr16-dis.c +8e6fb5d34ee9e13ea581ba43962baeef opcodes/cr16-opc.c +35feef6702a5237816c99597b77a40bd opcodes/cris-dis.c +24a976b6e3d0dedc20abd0ff680ae63a opcodes/cris-opc.c +e079337376f6eb8d13442f65b8b9e2c8 opcodes/crx-dis.c +78cb9b6b05693f19de9e7f6f5c7c5922 opcodes/crx-opc.c +9f37ca078c8fbbc619657203997c305d opcodes/d10v-dis.c +d32690dc533892cbdede583b5e166b0f opcodes/d10v-opc.c +9706bc2f17f3927f1b59e09a3ab3acee opcodes/d30v-dis.c +fa8f5111930e274b56b6ca49e0304e7f opcodes/d30v-opc.c +574537d9972c9161d297dcfd7eca0282 opcodes/dep-in.sed +0b5893bc5b9e2225c5271f9c177863f0 opcodes/dis-buf.c +ece66b3e9256a52ed11137f296b8ae2c opcodes/dis-init.c +10380118f891b962fb4691d5d65c5a98 opcodes/disassemble.c +750e7500febd896381af0445f2d2f671 opcodes/dlx-dis.c +8a86519ed6859aefa53d5775a34e8efc opcodes/fr30-asm.c +cfe6923b5d541653e2f44ab124d2ed29 opcodes/fr30-desc.c +5e78b4e732da2ec165862f1bbcda6ae0 opcodes/fr30-desc.h +ed406e7ae99699b9d4dd8e53aad11c4a opcodes/fr30-dis.c +9a83bbdb6f1c0816a6a03cd4180bb438 opcodes/fr30-ibld.c +dce3dc85831bd7368b85f6fb4c5ca93d opcodes/fr30-opc.c +006ba74072ac247a26a5dca66fa99eb7 opcodes/fr30-opc.h +e4ff1a5a63af8bb51dcad7eeb1c890dc opcodes/frv-asm.c +432f09661ca978fdfd790d2d314e01b4 opcodes/frv-desc.c +5339efb6ca9f1055b0e07064fa64db35 opcodes/frv-desc.h +8b55d5b3e9d33d047e4649446acfce1b opcodes/frv-dis.c +cfabe82140ce4eb2addfcb21b986c86a opcodes/frv-ibld.c +8d6fe830106fcbda822c06a6763b1f28 opcodes/frv-opc.c +ed96c9379698ac3715e6440ae6d9c3fb opcodes/frv-opc.h +977f791ef7c4744f7e86948ef4c81d16 opcodes/h8300-dis.c +7dc426bed3d4409dfde9c431f5351994 opcodes/h8500-dis.c +a90d1cf88e8ca000d2fe045d2757c929 opcodes/h8500-opc.h +2d54299521f9bd96064004cec7c26523 opcodes/hppa-dis.c +c86a545a6e8fe8ac8cec0f3d8d09a82d opcodes/i370-dis.c +218308bad0ffc625fd4598939457dc2e opcodes/i370-opc.c +a8b862ba2c3876144ff22aedb3b38ebc opcodes/i386-dis.c +a5caede2127e3720973c2017499ecdb7 opcodes/i386-gen.c +dce9f1d2e3c3c2eb460b101e3b3f3062 opcodes/i386-init.h +b349e449b7242ffccadc2905ba3bf302 opcodes/i386-opc.c +ea0debad6159115c95c8dc4103de2b26 opcodes/i386-opc.h +961c33d947e88722a4883a2fa688ebef opcodes/i386-opc.tbl +d916194e78f00cc94c8d848e6f64b8ef opcodes/i386-reg.tbl +3af24642c732155e8f291832760e30b4 opcodes/i386-tbl.h +d332fee7f16c258c245719be4e3b42d2 opcodes/i860-dis.c +6f95da0087252987fc36375464b53b25 opcodes/i960-dis.c +0ccdc17aead3327c15b4fa800790d302 opcodes/ia64-asmtab.c +71ba420c878d2fd0eb4d2ac36e8970e0 opcodes/ia64-asmtab.h +2249ba833158c5faccc1ee90e2c43906 opcodes/ia64-dis.c +9c2874445493c3819b8e1d09897c590c opcodes/ia64-gen.c +3ba50a7c1fd5801e7580330288cc725d opcodes/ia64-ic.tbl +8f9a2aed093833e5731816035917e414 opcodes/ia64-opc-a.c +4f8035ad5d22b8fbcc34d2e25f7ab579 opcodes/ia64-opc-b.c +361797efc92da6617137cf96553b9ed1 opcodes/ia64-opc-d.c +f2d2c6a73919ad50bfe2e45fe88ee660 opcodes/ia64-opc-f.c +13cb7cd8ba9ed01df363cb584a2ba842 opcodes/ia64-opc-i.c +06a95f9a4099de3fe81b2f60baf5d2cd opcodes/ia64-opc-m.c +a1ce2021835faa950844ba29d355ce5f opcodes/ia64-opc-x.c +479a02992c0c32054c66a67a595bd60f opcodes/ia64-opc.c +34c13118bf7c1f27ed2413588449c811 opcodes/ia64-opc.h +53c4ff8b528feccdd43a51b2031d9855 opcodes/ia64-raw.tbl +b3d7452b4310332b7974b34b09f65a6d opcodes/ia64-war.tbl +43d7bb09153ca5484f9e163a618c6328 opcodes/ia64-waw.tbl +98fe5aa93bfef9588406f7ddc7358e27 opcodes/ip2k-asm.c +5cabeff9c6311270be353a97ab451778 opcodes/ip2k-desc.c +ac2bf5a1711a374e124bebc7b77d7036 opcodes/ip2k-desc.h +f1f09223557d8405ccd6038f82064488 opcodes/ip2k-dis.c +0e81286d5ab261cd87d46aaf4b3fa03d opcodes/ip2k-ibld.c +948f39ae51c9ddcc8f4e328cc4425106 opcodes/ip2k-opc.c +4306a0e1c37315e842a079af635e19e3 opcodes/ip2k-opc.h +73fc04e2f5f07cd6843ed32752302727 opcodes/iq2000-asm.c +27c50d1d8efc7d958b8357d69cd47fd1 opcodes/iq2000-desc.c +8578971c11de4eac82b6a23613e78b9f opcodes/iq2000-desc.h +9e6df7320c072abd0d962139ef7391ab opcodes/iq2000-dis.c +a65e9e23415bc5162f3fdf569015da48 opcodes/iq2000-ibld.c +71b3368e10ef92e6bbc551b0d20db82e opcodes/iq2000-opc.c +a7fcc51b1065248503975116e60ee28d opcodes/iq2000-opc.h +82dbf3fedabee96a990f4096c9836a44 opcodes/lm32-asm.c +0edaac3c0e63e8f7d9515103eea20f53 opcodes/lm32-desc.c +ccced39416c4bc64fee833c133213b66 opcodes/lm32-desc.h +796bf959dd98214bb8a3b1110e3c2670 opcodes/lm32-dis.c +3e7e949d979ea280c1c6ba53550fafbe opcodes/lm32-ibld.c +5601b608a19d4e7c19b134a458df22d7 opcodes/lm32-opc.c +4040795b40e856e403a736b7203f8c00 opcodes/lm32-opc.h +465fca89973240988d539b7965f54034 opcodes/lm32-opinst.c +6cd99590cdb5cc96648741f375819ee1 opcodes/m10200-dis.c +2537fd35553e9abc7f73b09a9dcc8448 opcodes/m10200-opc.c +6fa875346f1ecf4d6769949d0b077238 opcodes/m10300-dis.c +3d215d208dbcadd93eeb6081f02f430c opcodes/m10300-opc.c +06bb0f0061213535accab5622a35f351 opcodes/m32c-asm.c +fa21aa9c6fa0ee3c65707a2107f4a8d7 opcodes/m32c-desc.c +0fb3ac51dae47688313a569d8de4f428 opcodes/m32c-desc.h +0496693c42f793ba7937f31550e43ed9 opcodes/m32c-dis.c +018c5daa636e0f4d8314c9b28d8a53ba opcodes/m32c-ibld.c +4748be6f2f7d4d7a235f63cc4811c0ed opcodes/m32c-opc.c +e5988e4840e03c87f4d66d0b39795c13 opcodes/m32c-opc.h +3243c0c46a1d3e2fd24774a641e1e55e opcodes/m32r-asm.c +96aed3db7a72a80f1ec90ac29ef8e1a8 opcodes/m32r-desc.c +c4a5df1a398db76fa7547a9aff9897bf opcodes/m32r-desc.h +2468ce49a9c806bdfbaf94ba8c7902c9 opcodes/m32r-dis.c +2f35ebaa942b414631c2b55aedc1531c opcodes/m32r-ibld.c +64ae4f82595cb61b72149e7e22a42f27 opcodes/m32r-opc.c +4f37bce53e8b1a1d85fb3ed8b9b7cf15 opcodes/m32r-opc.h +9485c677e8907524837c1e6064a50a31 opcodes/m32r-opinst.c +c884a02c786bb9ae35cc4e436b6b882c opcodes/m68hc11-dis.c +59906efbf7a9eee5f8382a8b30e133da opcodes/m68hc11-opc.c +e579c07b45c41fee680a1eafdb382f04 opcodes/m68k-dis.c +a80c93744c8a702c60a837c98f209c9e opcodes/m68k-opc.c +a8a5e99b9b9176f9a932a252fd9ab2a1 opcodes/m88k-dis.c +d618facc3e8ce8bf3d02ba452e1be6ab opcodes/MAINTAINERS +cd3de51e510afe3a415518fd34e10df3 opcodes/Makefile.am +a06b6c979978772beb0aca907b746289 opcodes/Makefile.in +3efef7dad61a0eb561346d3047fb7ed8 opcodes/makefile.vms +5e74f56bfccffa3c7f07f1c90582ca00 opcodes/mcore-dis.c +4f2dbdd0a873c6ed42373f53f8b07d15 opcodes/mcore-opc.h +ec40300857408c1294bd36197498f6aa opcodes/mep-asm.c +cf75c26734d23b64b24c1f601bec1aa1 opcodes/mep-desc.c +cb47a206279475ce8c1c2c04b6323556 opcodes/mep-desc.h +c16e1131cccd650b8d653acfff29cf86 opcodes/mep-dis.c +cf295dec03869cdad4c38f0398ce247e opcodes/mep-ibld.c +49b8de9d8d114222ce4160bea178d4fa opcodes/mep-opc.c +053b324ec00ecbe2657583171b8ee60e opcodes/mep-opc.h +88aeb8fc5a60fbd8eb32f42fa1964a7d opcodes/microblaze-dis.c +adf720ae7611c9ed19989e9d6428f638 opcodes/microblaze-dis.h +6e58e9f9e87531e0295d9277266f25b4 opcodes/microblaze-opc.h +2146cb07dc8b4c05bc3dad6bc04dcc72 opcodes/microblaze-opcm.h +8a663e1e504f6a221cb006c8db847d63 opcodes/micromips-opc.c +f5624a1c2820f12f6f69cd427f7f56a9 opcodes/mips-dis.c +661e2777783e3a3e925d0e4595ac223a opcodes/mips-opc.c +4d4dad5b6ae89dc8c2b4398b1f4d9bdd opcodes/mips16-opc.c +70059e50d54f0a65c674d08a3c5650e0 opcodes/mmix-dis.c +5d3ce00c0af1e8be47a84b7a0b24b237 opcodes/mmix-opc.c +7d36a0b59192414bfc95f9f924f9fa7f opcodes/moxie-dis.c +a026dda6f88b66ca94ba83599b8f717c opcodes/moxie-opc.c +e7ce22020a7dbebf739b04a1aaf94967 opcodes/msp430-dis.c +d51d9a5a27aabe5c992e2bda4657b73f opcodes/mt-asm.c +67a08e35431b47d3fd02fa6672e87b52 opcodes/mt-desc.c +c50d1471d263342c49d33f6d4237c703 opcodes/mt-desc.h +e4f21e1b452a0c14ca01c65f181531ad opcodes/mt-dis.c +e1a2f3897ca5248d5c164e47f725b20f opcodes/mt-ibld.c +c18b2d837279ebf8a89ab05db8b952b3 opcodes/mt-opc.c +9892e9aa135881086dae669b8bc3d733 opcodes/mt-opc.h +38cff44b34c951a39dc2e3cff10595f2 opcodes/ns32k-dis.c +15666d286846ee3492843dcb4642df12 opcodes/opc2c.c +6311a9f7c625e9f417286a3490f39d4d opcodes/openrisc-asm.c +a636d91f3e2b5c8340fa91e4eb11a8d5 opcodes/openrisc-desc.c +3ce025c4ac4f565d5decc09b2965d5fe opcodes/openrisc-desc.h +3bd3592ada34ee1b8c9c1fc1b9a3d8bc opcodes/openrisc-dis.c +99aac5d9a6a4263c8bf14244df8b1a7e opcodes/openrisc-ibld.c +b703a698570619af12334f30eeffd41c opcodes/openrisc-opc.c +a0ba79c35d1a39d977e6019ba1cedfd9 opcodes/openrisc-opc.h +ddb3324288d8b89a8d21cc42936fd320 opcodes/opintl.h +e1ef1b7be22c0bb600c200c402a1ca03 opcodes/or32-dis.c +084b26c55650090e5ea056ea4364a16e opcodes/or32-opc.c +2e878a17084801b0c09d6edae4e65862 opcodes/pdp11-dis.c +546f13ebe3df55e2efcbca2e76695a7c opcodes/pdp11-opc.c +7c044dbd081ea712eb68d6fbffe19b00 opcodes/pj-dis.c +f9282da1105aa1d5aaa561bad2ec6e31 opcodes/pj-opc.c +40631143014bf28aa6c4c18fb42c7e3f opcodes/po/da.gmo +08644663c098c4faa0a75ef257ff85de opcodes/po/da.po +6881ecf19052fe945c5dfefc588207ab opcodes/po/de.gmo +baba2506d17c4e2214d6fdd5868e6699 opcodes/po/de.po +4fc385a3d1a922817163a002c5351ffc opcodes/po/es.gmo +7572cc997d245129c25487fe7540d0ac opcodes/po/es.po +ea02e3cbcae7924813b49db479c2faf0 opcodes/po/fi.gmo +c7a095e4298b4afc1a68ca0a32e9c636 opcodes/po/fi.po +0354d8ebde8359a359d0703d9d897ba8 opcodes/po/fr.gmo +8784d443527b3837ccdbd6baab60763a opcodes/po/fr.po +aaa7913c4672954f5afe196a57bea399 opcodes/po/ga.gmo +a5961a0281569011fb2468afebe4c4d8 opcodes/po/ga.po +bbdc560c49ae729616af290d86d1801a opcodes/po/id.gmo +9b0083cb5b9854569bfd39fb4e432099 opcodes/po/id.po +ae6d82cae94b6dbf83af04ece662faf8 opcodes/po/Make-in +6b7f6db13ec1f340c587ccd58c898e8b opcodes/po/nl.gmo +55b6639559777f04aadc075e51744b12 opcodes/po/nl.po +46e9a8a86e5042957d02f97f1a74fd4a opcodes/po/opcodes.pot +05992528e39c82065c58f8a092b34b54 opcodes/po/POTFILES.in +1b79e075af1926ef6736fa317f054702 opcodes/po/pt_BR.gmo +30f5fa421474edf39ae99a8985bd42e9 opcodes/po/pt_BR.po +e216f1583ca03a04f8849dfb96b59c3f opcodes/po/ro.gmo +27e9fec6ee5c546b5d5f4afb80b287ed opcodes/po/ro.po +d7c42d78dd00ae4c8b71fecb736fd17c opcodes/po/sv.gmo +45db317868bfb202300160e0657f06ea opcodes/po/sv.po +179cd41f0e8af51dd577fd5d7ab36c79 opcodes/po/tr.gmo +8ddcec300546b39bc1d9a13098637b64 opcodes/po/tr.po +d47776e427a062eaf76832cfe02c122b opcodes/po/vi.gmo +0205ef8d6d910165612939b103d9ccf7 opcodes/po/vi.po +6e7ae21e20fe177fba4c9c7fe8afa55a opcodes/po/zh_CN.gmo +0928658424d3439f5dcaa21464ac43b6 opcodes/po/zh_CN.po +6a498da450dd7dd90801d79074190f23 opcodes/ppc-dis.c +62fdb8d0bc7f57c922dfb073678818e6 opcodes/ppc-opc.c +8c4cce1349402f40f44be6d6967d9c7f opcodes/rx-decode.c +fad0cf8f9da36f320dd8a4c56a9f6743 opcodes/rx-decode.opc +dc4ea6e70e4d38be3e566aae78971374 opcodes/rx-dis.c +7c424942718f1a04585a8fdbb5ff7744 opcodes/s390-dis.c +056a82808818c3d02e5220f1604304f1 opcodes/s390-mkopc.c +db37da8a908aea2ec57ee6cec5757fed opcodes/s390-opc.c +e9dde8054000defabe4827d4191bf107 opcodes/s390-opc.txt +9dc03a304cf6c2651ec5edcf970ee417 opcodes/score-dis.c +84efbd963f1573bab84ce05f7ad4e58d opcodes/score-opc.h +a91452ca1d7ab6a941a364d974149852 opcodes/score7-dis.c +87f89485f60a37d02ce5c4df842ecb26 opcodes/sh-dis.c +aea44dd53e979c11216c7c3fc7848fe0 opcodes/sh-opc.h +a4ff1ccc184718e2866819ee8abd273b opcodes/sh64-dis.c +ba68ff46225ffa4fc3cf57c14bc5d09e opcodes/sh64-opc.c +4500a9749b3a81ef89fb50be85a4bedf opcodes/sh64-opc.h +25038d14a858f8b0c89c550c67e1fe08 opcodes/sparc-dis.c +abd258660a482d4f53178ccabf20202e opcodes/sparc-opc.c +d46eddeb5c24a897ece9911d8e7775f3 opcodes/spu-dis.c +d2cd7ae58ae776e075b0d64bb18a5f76 opcodes/spu-opc.c +1ded054093de910d9786c62bc4fe8cc6 opcodes/stamp-h.in +e8ec6515ba869ddb5a4f64987448830e opcodes/sysdep.h +b6c8df366df6d1bf517368283a3e83bc opcodes/tic30-dis.c +d8bd324a75e601ace2b2d2eb4a525e52 opcodes/tic4x-dis.c +e9fab875e373c0f0509849a0c4311a22 opcodes/tic54x-dis.c +ea7d1d4700e2cc534f624f3ae366117d opcodes/tic54x-opc.c +d8b41e742a6b046ccffae75f9d22f1cf opcodes/tic6x-dis.c +0b799451ba231a6be1a404f1d6b2be41 opcodes/tic80-dis.c +0bffeecc20e5f0456dc2f1ba689d9fa9 opcodes/tic80-opc.c +0c2c4900730316dfad0cc55b494d85c3 opcodes/tilegx-dis.c +8361ba1f35dd1f074e3eb46d2e900807 opcodes/tilegx-opc.c +43a724eca5dc465cb67a13338f93d68d opcodes/tilepro-dis.c +bd957ced2786a05389ebf9156ac2b2ac opcodes/tilepro-opc.c +c290d133df7afa3924a02d6db20e2fb0 opcodes/v850-dis.c +5f4f1836a2c8fcc24a3d1ce5304c150b opcodes/v850-opc.c +0f83318013675dffa18582b207263449 opcodes/vax-dis.c +4760e70a223de43a1a22033ca2e21dda opcodes/w65-dis.c +072127e2c22b9ea5599f349c097ebbc1 opcodes/w65-opc.h +9760faa524bc333d3d8ea4cbff08e2aa opcodes/xc16x-asm.c +61ee16ff3ea71974250aa3f3b6fbddc1 opcodes/xc16x-desc.c +d2d8d28ec86ecb0ad1138e8bbc71a99e opcodes/xc16x-desc.h +7d4951c78448cb3d3f7d85842a619153 opcodes/xc16x-dis.c +f1a8c5a5233adec0f43885f0967f5c5c opcodes/xc16x-ibld.c +886733cd9cd944bd6b70785e53b0f69b opcodes/xc16x-opc.c +0483c849ed60ff25db78f503bd8a84e0 opcodes/xc16x-opc.h +3a6f9d4b824578571fcd952ffbfe589b opcodes/xstormy16-asm.c +41ee4e0a4f42e0d396adfce5d0ca7d5f opcodes/xstormy16-desc.c +10713cd53a68ad189219343ae17bb441 opcodes/xstormy16-desc.h +2156873e893b64e765646887bb056324 opcodes/xstormy16-dis.c +18d5a80d2b4910d879a88197eb1627ad opcodes/xstormy16-ibld.c +953957d3d7b43d96528448b2044227c4 opcodes/xstormy16-opc.c +099f445cf3df0fb0724aaf81ab3a3ff9 opcodes/xstormy16-opc.h +05434a9d71725aeef1d877bbf65fee25 opcodes/xtensa-dis.c +48a1de2a08d81135c59cce49900c06bd opcodes/z80-dis.c +b73735f570dac4f2ad37d5e3848d01a0 opcodes/z8k-dis.c +e349344d63e18942681c442ad564c34c opcodes/z8k-opc.h +d41e0b39d53a131bb560583587e3dadf opcodes/z8kgen.c +9ded84c8fb1840e68c467da08880fe07 setup.com +9bb037294df2451327cdaf73d040a851 src-release +cf2baa0854f564a7785307e79f155efc symlink-tree +6ffd0f415aea2960cac41434e6d904bb texinfo/texinfo.tex +69678e72941d681665c3731bfb3044ab ylwrap diff --git a/opcodes/.gitignore b/opcodes/.gitignore new file mode 100644 index 0000000..94ece5d --- /dev/null +++ b/opcodes/.gitignore @@ -0,0 +1,2 @@ +/s390-mkopc +/s390-opc.tab diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index cb51573..a445030 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,439 @@ +2011-10-27 Peter Bergner + + * ppc-opc.c (powerpc_opcodes) : Use FRT, FRA, FRB and FRBp repsectively on DFP quad + instructions. + +2011-10-25 Alan Modra + + Apply mainline patches + 2011-09-28 Jan Beulich + * ppc-opc.c (insert_nbi, insert_rbx, FRAp, FRBp, FRSp, FRTp, NBI, RAX, + RBX): New. + (insert_bo, insert_boe): Reject bcctr with bit 2 in bo unset. + (powerpc_opcodes): Use RAX for second and RBXC for third operand of + lswx. Use NBI for third operand of lswi. Use FRTp for first operand of + lfdp and lfdpx. Use FRSp for first operand of stfdp and stfdpx, and + mark them as invalid on POWER7. Use FRTp, FRAp, and FRBp repsectively + on DFP quad instructions. + +2011-09-21 David S. Miller + + * sparc-opc.c (sparc_opcodes): Annotate table with HWCAP flag + bits. Fix "fchksm16" mnemonic. + +2011-09-08 Mark Fortescue + + The changes below bring 'mov' and 'ticc' instructions into line + with the V8 SPARC Architecture Manual. + * sparc-opc.c (sparc_opcodes): Add entry for 'ticc imm + regrs1'. + * sparc-opc.c (sparc_opcodes): Add alias entries for + 'mov regrs2,%asrX'; 'mov regrs2,%y'; 'mov regrs2,%prs'; + 'mov regrs2,%wim' and 'mov regrs2,%tbr'. + * sparc-opc.c (sparc_opcodes): Move/Change entries for + 'mov imm,%asrX'; 'mov imm,%y'; 'mov imm,%prs'; 'mov imm,%wim' + and 'mov imm,%tbr'. + * sparc-opc.c (sparc_opcodes): Add wr alias entries to match above + mov aliases. + + * sparc-opc.c (sparc_opcodes): Add entry for 'save simm13,regrs1,regrd' + This has been reported as being accepted by the Sun assmebler. + +2011-09-08 David S. Miller + + * sparc-opc.c (pdistn): Destination is integer not float register. + +2011-09-07 Andreas Schwab + + PR gas/13145 + * m68k-opc.c: Use "y" in moveml pattern for mcfisa_a. + +2011-08-26 Nick Clifton + + * po/es.po: Updated Spanish translation. + +2011-08-22 Nick Clifton + + * Makefile.am (CPUDIR): Redfine to point to top level cpu + directory. + (stamp-frv): Use CPUDIR. + (stamp-iq2000): Likewise. + (stamp-lm32): Likewise. + (stamp-m32c): Likewise. + (stamp-mt): Likewise. + (stamp-xc16x): Likewise. + * Makefile.in: Regenerate. + +2011-08-09 Chao-ying Fu + Maciej W. Rozycki + + * mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2" + and "mips64r2". + (print_insn_args, print_insn_micromips): Handle MCU. + * micromips-opc.c (MC): New macro. + (micromips_opcodes): Add "aclr", "aset" and "iret". + * mips-opc.c (MC): New macro. + (mips_builtin_opcodes): Add "aclr", "aset" and "iret". + +2011-08-09 Maciej W. Rozycki + + * micromips-opc.c (MOD_mb, MOD_mc, MOD_md): Remove macros. + (MOD_me, MOD_mf, MOD_mg, MOD_mhi, MOD_mj, MOD_ml): Likewise. + (MOD_mm, MOD_mn, MOD_mp, MOD_mq, MOD_sp): Likewise. + (WR_mb, RD_mc, RD_md, WR_md, RD_me, RD_mf, WR_mf): New macros. + (RD_mg, WR_mhi, RD_mj, WR_mj, RD_ml, RD_mmn): Likewise. + (RD_mp, WR_mp, RD_mq, RD_sp, WR_sp): Likewise. + (WR_s): Update macro. + (micromips_opcodes): Update register use flags of: "addiu", + "addiupc", "addiur1sp", "addiur2", "addius5", "addiusp", "addu", + "and", "andi", "beq", "beqz", "bne", "bnez", "di", "ei", "j", + "jalr", "jalrs", "jr", "jraddiusp", "jrc", "lbu", "lhu", "li", + "lui", "lw", "lwm", "mfhi", "mflo", "move", "movep", "not", + "nor", "or", "ori", "sb", "sh", "sll", "srl", "subu", "sw", + "swm" and "xor" instructions. + +2011-08-05 David S. Miller + + * sparc-dis.c (v9a_ast_reg_names): Add "cps". + (X_RS3): New macro. + (print_insn_sparc): Handle '4', '5', and '(' format codes. + Accept %asr numbers below 28. + * sparc-opc.c (sparc_opcodes): Add entries for HPC and VIS3 + instructions. + +2011-08-02 Quentin Neill + + * i386-dis.c (xop_table): Remove spurious bextr insn. + +2011-08-01 H.J. Lu + + PR ld/13048 + * i386-dis.c (print_insn): Optimize info->mach check. + +2011-08-01 H.J. Lu + + PR gas/13046 + * i386-opc.tbl: Add Disp32S to 64bit call. + * i386-tbl.h: Regenerated. + +2011-07-24 Chao-ying Fu + Maciej W. Rozycki + + * micromips-opc.c: New file. + * mips-dis.c (micromips_to_32_reg_b_map): New array. + (micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise. + (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise. + (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise. + (micromips_to_32_reg_q_map): Likewise. + (micromips_imm_b_map, micromips_imm_c_map): Likewise. + (micromips_ase): New variable. + (is_micromips): New function. + (set_default_mips_dis_options): Handle microMIPS ASE. + (print_insn_micromips): New function. + (is_compressed_mode_p): Likewise. + (_print_insn_mips): Handle microMIPS instructions. + * Makefile.am (CFILES): Add micromips-opc.c. + * configure.in (bfd_mips_arch): Add micromips-opc.lo. + * Makefile.in: Regenerate. + * configure: Regenerate. + + * mips-dis.c (micromips_to_32_reg_h_map): New variable. + (micromips_to_32_reg_i_map): Likewise. + (micromips_to_32_reg_m_map): Likewise. + (micromips_to_32_reg_n_map): New macro. + +2011-07-24 Maciej W. Rozycki + + * mips-opc.c (NODS): New macro. + (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. + (DSP_VOLA): Likewise. + (mips_builtin_opcodes): Add NODS annotation to "deret" and + "eret". Replace INSN_SYNC with NODS throughout. Use NODS in + place of TRAP for "wait", "waiti" and "yield". + * mips16-opc.c (NODS): New macro. + (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. + (mips16_opcodes): Use NODS in place of TRAP for "jalrc", "jrc", + "restore" and "save". + +2011-07-22 H.J. Lu + + * configure.in: Handle bfd_k1om_arch. + * configure: Regenerated. + + * disassemble.c (disassembler): Handle bfd_k1om_arch. + + * i386-dis.c (print_insn): Handle bfd_mach_k1om and + bfd_mach_k1om_intel_syntax. + + * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to + ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. + (cpu_flags): Add CpuK1OM. + + * i386-opc.h (CpuK1OM): New. + (i386_cpu_flags): Add cpuk1om. + + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2011-07-12 Nick Clifton + + * arm-dis.c (print_insn_arm): Revert previous, undocumented, + accidental change. + +2011-07-01 Nick Clifton + + PR binutils/12329 + * avr-dis.c (avr_operand): Fix disassembly of ELPM, LPM and SPM + insns using post-increment addressing. + +2011-06-30 H.J. Lu + + * i386-dis.c (vex_len_table): Update rorxS. + +2011-06-30 H.J. Lu + + AVX Programming Reference (June, 2011) + * i386-dis.c (vex_len_table): Correct rorxS. + + * i386-opc.tbl: Correct rorx. + * i386-tbl.h: Regenerated. + +2011-06-29 H.J. Lu + + * tilegx-opc.c (find_opcode): Replace "index" with "i". + * tilepro-opc.c (find_opcode): Likewise. + +2011-06-29 Richard Sandiford + + * mips16-opc.c (jalrc, jrc): Move earlier in file. + +2011-06-21 H.J. Lu + + * i386-dis.c (prefix_table): Re-indent PREFIX_VEX_0F388C and + PREFIX_VEX_0F388E. + +2011-06-17 Andreas Schwab + + * Makefile.am (MAINTAINERCLEANFILES): Move s390-opc.tab ... + (MOSTLYCLEANFILES): ... here. + * Makefile.in: Regenerate. + +2011-06-14 Alan Modra + + * Makefile.in: Regenerate. + +2011-06-13 Walter Lee + + * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, + tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. + * Makefile.in: Regenerate. + * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. + * configure: Regenerate. + * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. + * po/POTFILES.in: Regenerate. + * tilegx-dis.c: New file. + * tilegx-opc.c: New file. + * tilepro-dis.c: New file. + * tilepro-opc.c: New file. + +2011-06-10 H.J. Lu + + AVX Programming Reference (June, 2011) + * i386-dis.c (XMGatherQ): New. + * i386-dis.c (EXxmm_mb): New. + (EXxmm_mb): Likewise. + (EXxmm_mw): Likewise. + (EXxmm_md): Likewise. + (EXxmm_mq): Likewise. + (EXxmmdw): Likewise. + (EXxmmqd): Likewise. + (VexGatherQ): Likewise. + (MVexVSIBDWpX): Likewise. + (MVexVSIBQWpX): Likewise. + (xmm_mb_mode): Likewise. + (xmm_mw_mode): Likewise. + (xmm_md_mode): Likewise. + (xmm_mq_mode): Likewise. + (xmmdw_mode): Likewise. + (xmmqd_mode): Likewise. + (ymmxmm_mode): Likewise. + (vex_vsib_d_w_dq_mode): Likewise. + (vex_vsib_q_w_dq_mode): Likewise. + (MOD_VEX_0F385A_PREFIX_2): Likewise. + (MOD_VEX_0F388C_PREFIX_2): Likewise. + (MOD_VEX_0F388E_PREFIX_2): Likewise. + (PREFIX_0F3882): Likewise. + (PREFIX_VEX_0F3816): Likewise. + (PREFIX_VEX_0F3836): Likewise. + (PREFIX_VEX_0F3845): Likewise. + (PREFIX_VEX_0F3846): Likewise. + (PREFIX_VEX_0F3847): Likewise. + (PREFIX_VEX_0F3858): Likewise. + (PREFIX_VEX_0F3859): Likewise. + (PREFIX_VEX_0F385A): Likewise. + (PREFIX_VEX_0F3878): Likewise. + (PREFIX_VEX_0F3879): Likewise. + (PREFIX_VEX_0F388C): Likewise. + (PREFIX_VEX_0F388E): Likewise. + (PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise. + (PREFIX_VEX_0F38F5): Likewise. + (PREFIX_VEX_0F38F6): Likewise. + (PREFIX_VEX_0F3A00): Likewise. + (PREFIX_VEX_0F3A01): Likewise. + (PREFIX_VEX_0F3A02): Likewise. + (PREFIX_VEX_0F3A38): Likewise. + (PREFIX_VEX_0F3A39): Likewise. + (PREFIX_VEX_0F3A46): Likewise. + (PREFIX_VEX_0F3AF0): Likewise. + (VEX_LEN_0F3816_P_2): Likewise. + (VEX_LEN_0F3819_P_2): Likewise. + (VEX_LEN_0F3836_P_2): Likewise. + (VEX_LEN_0F385A_P_2_M_0): Likewise. + (VEX_LEN_0F38F5_P_0): Likewise. + (VEX_LEN_0F38F5_P_1): Likewise. + (VEX_LEN_0F38F5_P_3): Likewise. + (VEX_LEN_0F38F6_P_3): Likewise. + (VEX_LEN_0F38F7_P_1): Likewise. + (VEX_LEN_0F38F7_P_2): Likewise. + (VEX_LEN_0F38F7_P_3): Likewise. + (VEX_LEN_0F3A00_P_2): Likewise. + (VEX_LEN_0F3A01_P_2): Likewise. + (VEX_LEN_0F3A38_P_2): Likewise. + (VEX_LEN_0F3A39_P_2): Likewise. + (VEX_LEN_0F3A46_P_2): Likewise. + (VEX_LEN_0F3AF0_P_3): Likewise. + (VEX_W_0F3816_P_2): Likewise. + (VEX_W_0F3818_P_2): Likewise. + (VEX_W_0F3819_P_2): Likewise. + (VEX_W_0F3836_P_2): Likewise. + (VEX_W_0F3846_P_2): Likewise. + (VEX_W_0F3858_P_2): Likewise. + (VEX_W_0F3859_P_2): Likewise. + (VEX_W_0F385A_P_2_M_0): Likewise. + (VEX_W_0F3878_P_2): Likewise. + (VEX_W_0F3879_P_2): Likewise. + (VEX_W_0F3A00_P_2): Likewise. + (VEX_W_0F3A01_P_2): Likewise. + (VEX_W_0F3A02_P_2): Likewise. + (VEX_W_0F3A38_P_2): Likewise. + (VEX_W_0F3A39_P_2): Likewise. + (VEX_W_0F3A46_P_2): Likewise. + (MOD_VEX_0F3818_PREFIX_2): Removed. + (MOD_VEX_0F3819_PREFIX_2): Likewise. + (VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise. + (VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise. + (VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise. + (VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise. + (VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise. + (VEX_LEN_0F3A0E_P_2): Likewise. + (VEX_LEN_0F3A0F_P_2): Likewise. + (VEX_LEN_0F3A42_P_2): Likewise. + (VEX_LEN_0F3A4C_P_2): Likewise. + (VEX_W_0F3818_P_2_M_0): Likewise. + (VEX_W_0F3819_P_2_M_0): Likewise. + (prefix_table): Updated. + (three_byte_table): Likewise. + (vex_table): Likewise. + (vex_len_table): Likewise. + (vex_w_table): Likewise. + (mod_table): Likewise. + (putop): Handle "LW". + (intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode, + xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode, + vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode. + (OP_EX): Likewise. + (OP_E_memory): Handle vex_vsib_d_w_dq_mode and + vex_vsib_q_w_dq_mode. + (OP_XMM): Handle vex_vsib_q_w_dq_mode. + (OP_VEX): Likewise. + + * i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS + and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS, + CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS. + (cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID. + (opcode_modifiers): Add VecSIB. + + * i386-opc.h (CpuAVX2): New. + (CpuBMI2): Likewise. + (CpuLZCNT): Likewise. + (CpuINVPCID): Likewise. + (VecSIB128): Likewise. + (VecSIB256): Likewise. + (VecSIB): Likewise. + (i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid. + (i386_opcode_modifier): Add vecsib. + + * i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2011-06-03 Quentin Neill + + * i386-gen.c (cpu_flag_init): Add CpuF16C to CPU_BDVER2_FLAGS. + * i386-init.h: Regenerated. + +2011-06-03 Nick Clifton + + PR binutils/12752 + * arm-dis.c (print_insn_coprocessor): Use bfd_vma type for + computing address offsets. + (print_arm_address): Likewise. + (print_insn_arm): Likewise. + (print_insn_thumb16): Likewise. + (print_insn_thumb32): Likewise. + +2011-06-02 Jie Zhang + Nathan Sidwell + Maciej Rozycki + + * arm-dis.c (print_insn_coprocessor): Explicitly print #-0 + as address offset. + (print_arm_address): Likewise. Elide positive #0 appropriately. + (print_insn_arm): Likewise. + +2011-06-02 Nick Clifton + + PR gas/12752 + * arm-dis.c (print_insn_thumb32): Do not sign extend addresses + passed to print_address_func. + +2011-06-02 Nick Clifton + + * arm-dis.c: Fix spelling mistakes. + * op/opcodes.pot: Regenerate. + +2011-05-24 Andreas Krebbel + + * s390-opc.c: Replace S390_OPERAND_REG_EVEN with + S390_OPERAND_REG_PAIR. Fix INSTR_RRF_0UFEF instruction type. + * s390-opc.txt: Fix cxr instruction type. + +2011-05-24 Andreas Krebbel + + * s390-opc.c: Add new instruction types marking register pair + operands. + * s390-opc.txt: Match instructions having register pair operands + to the new instruction types. + +2011-05-19 Nick Clifton + + * v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2 + operands. + +2011-05-10 Quentin Neill + + * i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS. + * i386-init.h: Regenerated. + +2011-04-27 Nick Clifton + + * po/da.po: Updated Danish translation. + +2011-04-26 Anton Blanchard + + * ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7. + 2011-04-21 DJ Delorie * rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs. @@ -133,7 +569,7 @@ 2011-02-09 Michael Snyder - * i386-dis.c (OP_J): Parenthesize expression to prevent + * i386-dis.c (OP_J): Parenthesize expression to prevent truncated addresses. (print_insn): Fix indentation off-by-one. diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index 668085c..ec7fa3e 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -159,6 +159,7 @@ TARGET_LIBOPCODES_CFILES = \ mep-ibld.c \ mep-opc.c \ microblaze-dis.c \ + micromips-opc.c \ mips-dis.c \ mips-opc.c \ mips16-opc.c \ @@ -206,6 +207,10 @@ TARGET_LIBOPCODES_CFILES = \ tic6x-dis.c \ tic80-dis.c \ tic80-opc.c \ + tilegx-dis.c \ + tilegx-opc.c \ + tilepro-dis.c \ + tilepro-opc.c \ v850-dis.c \ v850-opc.c \ vax-dis.c \ @@ -313,7 +318,7 @@ CLEANFILES = \ CGENDIR = @cgendir@ -CPUDIR = $(CGENDIR)/cpu +CPUDIR = $(srcdir)/../cpu CGEN = "`if test -f ../guile/libguile/guile ; then echo ../guile/libguile/guile; else echo guile ; fi` -l ${cgendir}/guile.scm -s" CGENFLAGS = -v @@ -379,9 +384,9 @@ stamp-fr30: $(CGENDEPS) $(CPUDIR)/fr30.cpu $(CPUDIR)/fr30.opc $(srcdir)/frv-desc.h $(srcdir)/frv-desc.c $(srcdir)/frv-opc.h $(srcdir)/frv-opc.c $(srcdir)/frv-ibld.c $(srcdir)/frv-asm.c $(srcdir)/frv-dis.c: $(FRV_DEPS) @true -stamp-frv: $(CGENDEPS) $(srcdir)/../cpu/frv.cpu $(srcdir)/../cpu/frv.opc +stamp-frv: $(CGENDEPS) $(CPUDIR)/frv.cpu $(CPUDIR)/frv.opc $(MAKE) run-cgen arch=frv prefix=frv options= \ - archfile=$(srcdir)/../cpu/frv.cpu opcfile=$(srcdir)/../cpu/frv.opc extrafiles= + archfile=$(CPUDIR)/frv.cpu opcfile=$(CPUDIR)/frv.opc extrafiles= $(srcdir)/ip2k-desc.h $(srcdir)/ip2k-desc.c $(srcdir)/ip2k-opc.h $(srcdir)/ip2k-opc.c $(srcdir)/ip2k-ibld.c $(srcdir)/ip2k-asm.c $(srcdir)/ip2k-dis.c: $(IP2K_DEPS) @true @@ -391,34 +396,34 @@ stamp-ip2k: $(CGENDEPS) $(CPUDIR)/ip2k.cpu $(CPUDIR)/ip2k.opc $(srcdir)/iq2000-desc.h $(srcdir)/iq2000-desc.c $(srcdir)/iq2000-opc.h $(srcdir)/iq2000-opc.c $(srcdir)/iq2000-ibld.c $(srcdir)/iq2000-asm.c $(srcdir)/iq2000-dis.c: $(IQ2000_DEPS) @true -stamp-iq2000: $(CGENDEPS) $(srcdir)/../cpu/iq2000.cpu \ - $(srcdir)/../cpu/iq2000.opc $(srcdir)/../cpu/iq2000m.cpu \ - $(srcdir)/../cpu/iq10.cpu +stamp-iq2000: $(CGENDEPS) $(CPUDIR)/iq2000.cpu \ + $(CPUDIR)/iq2000.opc $(CPUDIR)/iq2000m.cpu \ + $(CPUDIR)/iq10.cpu $(MAKE) run-cgen arch=iq2000 prefix=iq2000 options= \ - archfile=$(srcdir)/../cpu/iq2000.cpu \ - opcfile=$(srcdir)/../cpu/iq2000.opc extrafiles= + archfile=$(CPUDIR)/iq2000.cpu \ + opcfile=$(CPUDIR)/iq2000.opc extrafiles= $(srcdir)lm32-desc.h $(srcdir)/lm32-desc.c $(srcdir)/lm32-opc.h $(srcdir)/lm32-opc.c $(srcdir)/lm32-ibld.c $(srcdir)/lm32-opinst.c $(srcdir)/lm32-asm.c $(srcdir)/lm32-dis.c: $(LM32_DEPS) @true -stamp-lm32: $(CGENDEPS) $(srcdir)/../cpu/lm32.cpu $(srcdir)/../cpu/lm32.opc +stamp-lm32: $(CGENDEPS) $(CPUDIR)/lm32.cpu $(CPUDIR)/lm32.opc $(MAKE) run-cgen arch=lm32 prefix=lm32 options=opinst \ - archfile=$(srcdir)/../cpu/lm32.cpu \ - opcfile=$(srcdir)/../cpu/lm32.opc \ + archfile=$(CPUDIR)/lm32.cpu \ + opcfile=$(CPUDIR)/lm32.opc \ extrafiles=opinst $(srcdir)/m32c-desc.h $(srcdir)/m32c-desc.c $(srcdir)/m32c-opc.h $(srcdir)/m32c-opc.c $(srcdir)/m32c-ibld.c $(srcdir)/m32c-asm.c $(srcdir)/m32c-dis.c: $(M32C_DEPS) # @true -stamp-m32c: $(CGENDEPS) $(srcdir)/../cpu/m32c.cpu $(srcdir)/../cpu/m32c.opc +stamp-m32c: $(CGENDEPS) $(CPUDIR)/m32c.cpu $(CPUDIR)/m32c.opc $(MAKE) run-cgen arch=m32c prefix=m32c options= \ - archfile=$(srcdir)/../cpu/m32c.cpu \ - opcfile=$(srcdir)/../cpu/m32c.opc extrafiles= + archfile=$(CPUDIR)/m32c.cpu \ + opcfile=$(CPUDIR)/m32c.opc extrafiles= $(srcdir)/m32r-desc.h $(srcdir)/m32r-desc.c $(srcdir)/m32r-opc.h $(srcdir)/m32r-opc.c $(srcdir)/m32r-ibld.c $(srcdir)/m32r-opinst.c $(srcdir)/m32r-asm.c $(srcdir)/m32r-dis.c: $(M32R_DEPS) @true -stamp-m32r: $(CGENDEPS) $(srcdir)/../cpu/m32r.cpu $(srcdir)/../cpu/m32r.opc +stamp-m32r: $(CGENDEPS) $(CPUDIR)/m32r.cpu $(CPUDIR)/m32r.opc $(MAKE) run-cgen arch=m32r prefix=m32r options=opinst \ - archfile=$(srcdir)/../cpu/m32r.cpu \ - opcfile=$(srcdir)/../cpu/m32r.opc extrafiles=opinst + archfile=$(CPUDIR)/m32r.cpu \ + opcfile=$(CPUDIR)/m32r.opc extrafiles=opinst $(srcdir)/mep-desc.h $(srcdir)/mep-desc.c $(srcdir)/mep-opc.h $(srcdir)/mep-opc.c $(srcdir)/mep-ibld.c $(srcdir)/mep-asm.c $(srcdir)/mep-dis.c: $(MEP_DEPS) @true @@ -428,10 +433,10 @@ stamp-mep: $(CGENDEPS) $(CPUDIR)/mep.cpu $(CPUDIR)/mep-default.cpu $(CPUDIR)/mep $(srcdir)/mt-desc.h $(srcdir)/mt-desc.c $(srcdir)/mt-opc.h $(srcdir)/mt-opc.c $(srcdir)/mt-ibld.c $(srcdir)/mt-asm.c $(srcdir)/mt-dis.c: $(MT_DEPS) @true -stamp-mt: $(CGENDEPS) $(srcdir)/../cpu/mt.cpu $(srcdir)/../cpu/mt.opc +stamp-mt: $(CGENDEPS) $(CPUDIR)/mt.cpu $(CPUDIR)/mt.opc $(MAKE) run-cgen arch=mt prefix=mt options= \ - archfile=$(srcdir)/../cpu/mt.cpu \ - opcfile=$(srcdir)/../cpu/mt.opc extrafiles= + archfile=$(CPUDIR)/mt.cpu \ + opcfile=$(CPUDIR)/mt.opc extrafiles= $(srcdir)/openrisc-desc.h $(srcdir)/openrisc-desc.c $(srcdir)/openrisc-opc.h $(srcdir)/openrisc-opc.c $(srcdir)/openrisc-ibld.c $(srcdir)/openrisc-asm.c $(srcdir)/openrisc-dis.c: $(OPENRISC_DEPS) @true @@ -441,10 +446,10 @@ stamp-openrisc: $(CGENDEPS) $(CPUDIR)/openrisc.cpu $(CPUDIR)/openrisc.opc $(srcdir)/xc16x-desc.h $(srcdir)/xc16x-desc.c $(srcdir)/xc16x-opc.h $(srcdir)/xc16x-opc.c $(srcdir)/xc16x-ibld.c $(srcdir)/xc16x-asm.c $(srcdir)/xc16x-dis.c: $(XC16X_DEPS) @true -stamp-xc16x: $(CGENDEPS) $(srcdir)/../cpu/xc16x.cpu $(srcdir)/../cpu/xc16x.opc +stamp-xc16x: $(CGENDEPS) $(CPUDIR)/xc16x.cpu $(CPUDIR)/xc16x.opc $(MAKE) run-cgen arch=xc16x prefix=xc16x options= \ - archfile=$(srcdir)/../cpu/xc16x.cpu \ - opcfile=$(srcdir)/../cpu/xc16x.opc \ + archfile=$(CPUDIR)/xc16x.cpu \ + opcfile=$(CPUDIR)/xc16x.opc \ extrafiles= $(srcdir)/xstormy16-desc.h $(srcdir)/xstormy16-desc.c $(srcdir)/xstormy16-opc.h $(srcdir)/xstormy16-opc.c $(srcdir)/xstormy16-ibld.c $(srcdir)/xstormy16-asm.c $(srcdir)/xstormy16-dis.c: $(XSTORMY16_DEPS) @@ -454,11 +459,11 @@ stamp-xstormy16: $(CGENDEPS) $(CPUDIR)/xstormy16.cpu $(CPUDIR)/xstormy16.opc archfile=$(CPUDIR)/xstormy16.cpu opcfile=$(CPUDIR)/xstormy16.opc extrafiles= MOSTLYCLEANFILES = i386-gen$(EXEEXT_FOR_BUILD) ia64-gen$(EXEEXT_FOR_BUILD) \ - s390-mkopc$(EXEEXT_FOR_BUILD) z8kgen$(EXEEXT_FOR_BUILD) \ + s390-mkopc$(EXEEXT_FOR_BUILD) s390-opc.tab z8kgen$(EXEEXT_FOR_BUILD) \ opc2c$(EXEEXT_FOR_BUILD) MAINTAINERCLEANFILES = $(srcdir)/i386-tbl.h $(srcdir)/i386-init.h \ - $(srcdir)/ia64-asmtab.c s390-opc.tab $(srcdir)/z8k-opc.h \ + $(srcdir)/ia64-asmtab.c $(srcdir)/z8k-opc.h \ $(srcdir)/rx-decode.c i386-gen$(EXEEXT_FOR_BUILD): i386-gen.o $(BUILD_LIB_DEPS) diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index 8928b1b..7d260a7 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -429,6 +429,7 @@ TARGET_LIBOPCODES_CFILES = \ mep-ibld.c \ mep-opc.c \ microblaze-dis.c \ + micromips-opc.c \ mips-dis.c \ mips-opc.c \ mips16-opc.c \ @@ -476,6 +477,10 @@ TARGET_LIBOPCODES_CFILES = \ tic6x-dis.c \ tic80-dis.c \ tic80-opc.c \ + tilegx-dis.c \ + tilegx-opc.c \ + tilepro-dis.c \ + tilepro-opc.c \ v850-dis.c \ v850-opc.c \ vax-dis.c \ @@ -551,7 +556,7 @@ CLEANFILES = \ libopcodes.a stamp-lib CGENDIR = @cgendir@ -CPUDIR = $(CGENDIR)/cpu +CPUDIR = $(srcdir)/../cpu CGEN = "`if test -f ../guile/libguile/guile ; then echo ../guile/libguile/guile; else echo guile ; fi` -l ${cgendir}/guile.scm -s" CGENFLAGS = -v CGENDEPS = \ @@ -587,11 +592,11 @@ CGEN_CPUS = fr30 frv ip2k iq2000 lm32 m32c m32r mep mt openrisc xc16x xstormy16 @CGEN_MAINT_FALSE@XSTORMY16_DEPS = @CGEN_MAINT_TRUE@XSTORMY16_DEPS = stamp-xstormy16 MOSTLYCLEANFILES = i386-gen$(EXEEXT_FOR_BUILD) ia64-gen$(EXEEXT_FOR_BUILD) \ - s390-mkopc$(EXEEXT_FOR_BUILD) z8kgen$(EXEEXT_FOR_BUILD) \ + s390-mkopc$(EXEEXT_FOR_BUILD) s390-opc.tab z8kgen$(EXEEXT_FOR_BUILD) \ opc2c$(EXEEXT_FOR_BUILD) MAINTAINERCLEANFILES = $(srcdir)/i386-tbl.h $(srcdir)/i386-init.h \ - $(srcdir)/ia64-asmtab.c s390-opc.tab $(srcdir)/z8k-opc.h \ + $(srcdir)/ia64-asmtab.c $(srcdir)/z8k-opc.h \ $(srcdir)/rx-decode.c @@ -800,6 +805,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-ibld.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/microblaze-dis.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/micromips-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mips-dis.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mips-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mips16-opc.Plo@am__quote@ @@ -847,6 +853,10 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tic6x-dis.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tic80-dis.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tic80-opc.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tilegx-dis.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tilegx-opc.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tilepro-dis.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tilepro-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/v850-dis.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/v850-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vax-dis.Plo@am__quote@ @@ -1227,9 +1237,9 @@ stamp-fr30: $(CGENDEPS) $(CPUDIR)/fr30.cpu $(CPUDIR)/fr30.opc $(srcdir)/frv-desc.h $(srcdir)/frv-desc.c $(srcdir)/frv-opc.h $(srcdir)/frv-opc.c $(srcdir)/frv-ibld.c $(srcdir)/frv-asm.c $(srcdir)/frv-dis.c: $(FRV_DEPS) @true -stamp-frv: $(CGENDEPS) $(srcdir)/../cpu/frv.cpu $(srcdir)/../cpu/frv.opc +stamp-frv: $(CGENDEPS) $(CPUDIR)/frv.cpu $(CPUDIR)/frv.opc $(MAKE) run-cgen arch=frv prefix=frv options= \ - archfile=$(srcdir)/../cpu/frv.cpu opcfile=$(srcdir)/../cpu/frv.opc extrafiles= + archfile=$(CPUDIR)/frv.cpu opcfile=$(CPUDIR)/frv.opc extrafiles= $(srcdir)/ip2k-desc.h $(srcdir)/ip2k-desc.c $(srcdir)/ip2k-opc.h $(srcdir)/ip2k-opc.c $(srcdir)/ip2k-ibld.c $(srcdir)/ip2k-asm.c $(srcdir)/ip2k-dis.c: $(IP2K_DEPS) @true @@ -1239,34 +1249,34 @@ stamp-ip2k: $(CGENDEPS) $(CPUDIR)/ip2k.cpu $(CPUDIR)/ip2k.opc $(srcdir)/iq2000-desc.h $(srcdir)/iq2000-desc.c $(srcdir)/iq2000-opc.h $(srcdir)/iq2000-opc.c $(srcdir)/iq2000-ibld.c $(srcdir)/iq2000-asm.c $(srcdir)/iq2000-dis.c: $(IQ2000_DEPS) @true -stamp-iq2000: $(CGENDEPS) $(srcdir)/../cpu/iq2000.cpu \ - $(srcdir)/../cpu/iq2000.opc $(srcdir)/../cpu/iq2000m.cpu \ - $(srcdir)/../cpu/iq10.cpu +stamp-iq2000: $(CGENDEPS) $(CPUDIR)/iq2000.cpu \ + $(CPUDIR)/iq2000.opc $(CPUDIR)/iq2000m.cpu \ + $(CPUDIR)/iq10.cpu $(MAKE) run-cgen arch=iq2000 prefix=iq2000 options= \ - archfile=$(srcdir)/../cpu/iq2000.cpu \ - opcfile=$(srcdir)/../cpu/iq2000.opc extrafiles= + archfile=$(CPUDIR)/iq2000.cpu \ + opcfile=$(CPUDIR)/iq2000.opc extrafiles= $(srcdir)lm32-desc.h $(srcdir)/lm32-desc.c $(srcdir)/lm32-opc.h $(srcdir)/lm32-opc.c $(srcdir)/lm32-ibld.c $(srcdir)/lm32-opinst.c $(srcdir)/lm32-asm.c $(srcdir)/lm32-dis.c: $(LM32_DEPS) @true -stamp-lm32: $(CGENDEPS) $(srcdir)/../cpu/lm32.cpu $(srcdir)/../cpu/lm32.opc +stamp-lm32: $(CGENDEPS) $(CPUDIR)/lm32.cpu $(CPUDIR)/lm32.opc $(MAKE) run-cgen arch=lm32 prefix=lm32 options=opinst \ - archfile=$(srcdir)/../cpu/lm32.cpu \ - opcfile=$(srcdir)/../cpu/lm32.opc \ + archfile=$(CPUDIR)/lm32.cpu \ + opcfile=$(CPUDIR)/lm32.opc \ extrafiles=opinst $(srcdir)/m32c-desc.h $(srcdir)/m32c-desc.c $(srcdir)/m32c-opc.h $(srcdir)/m32c-opc.c $(srcdir)/m32c-ibld.c $(srcdir)/m32c-asm.c $(srcdir)/m32c-dis.c: $(M32C_DEPS) # @true -stamp-m32c: $(CGENDEPS) $(srcdir)/../cpu/m32c.cpu $(srcdir)/../cpu/m32c.opc +stamp-m32c: $(CGENDEPS) $(CPUDIR)/m32c.cpu $(CPUDIR)/m32c.opc $(MAKE) run-cgen arch=m32c prefix=m32c options= \ - archfile=$(srcdir)/../cpu/m32c.cpu \ - opcfile=$(srcdir)/../cpu/m32c.opc extrafiles= + archfile=$(CPUDIR)/m32c.cpu \ + opcfile=$(CPUDIR)/m32c.opc extrafiles= $(srcdir)/m32r-desc.h $(srcdir)/m32r-desc.c $(srcdir)/m32r-opc.h $(srcdir)/m32r-opc.c $(srcdir)/m32r-ibld.c $(srcdir)/m32r-opinst.c $(srcdir)/m32r-asm.c $(srcdir)/m32r-dis.c: $(M32R_DEPS) @true -stamp-m32r: $(CGENDEPS) $(srcdir)/../cpu/m32r.cpu $(srcdir)/../cpu/m32r.opc +stamp-m32r: $(CGENDEPS) $(CPUDIR)/m32r.cpu $(CPUDIR)/m32r.opc $(MAKE) run-cgen arch=m32r prefix=m32r options=opinst \ - archfile=$(srcdir)/../cpu/m32r.cpu \ - opcfile=$(srcdir)/../cpu/m32r.opc extrafiles=opinst + archfile=$(CPUDIR)/m32r.cpu \ + opcfile=$(CPUDIR)/m32r.opc extrafiles=opinst $(srcdir)/mep-desc.h $(srcdir)/mep-desc.c $(srcdir)/mep-opc.h $(srcdir)/mep-opc.c $(srcdir)/mep-ibld.c $(srcdir)/mep-asm.c $(srcdir)/mep-dis.c: $(MEP_DEPS) @true @@ -1276,10 +1286,10 @@ stamp-mep: $(CGENDEPS) $(CPUDIR)/mep.cpu $(CPUDIR)/mep-default.cpu $(CPUDIR)/mep $(srcdir)/mt-desc.h $(srcdir)/mt-desc.c $(srcdir)/mt-opc.h $(srcdir)/mt-opc.c $(srcdir)/mt-ibld.c $(srcdir)/mt-asm.c $(srcdir)/mt-dis.c: $(MT_DEPS) @true -stamp-mt: $(CGENDEPS) $(srcdir)/../cpu/mt.cpu $(srcdir)/../cpu/mt.opc +stamp-mt: $(CGENDEPS) $(CPUDIR)/mt.cpu $(CPUDIR)/mt.opc $(MAKE) run-cgen arch=mt prefix=mt options= \ - archfile=$(srcdir)/../cpu/mt.cpu \ - opcfile=$(srcdir)/../cpu/mt.opc extrafiles= + archfile=$(CPUDIR)/mt.cpu \ + opcfile=$(CPUDIR)/mt.opc extrafiles= $(srcdir)/openrisc-desc.h $(srcdir)/openrisc-desc.c $(srcdir)/openrisc-opc.h $(srcdir)/openrisc-opc.c $(srcdir)/openrisc-ibld.c $(srcdir)/openrisc-asm.c $(srcdir)/openrisc-dis.c: $(OPENRISC_DEPS) @true @@ -1289,10 +1299,10 @@ stamp-openrisc: $(CGENDEPS) $(CPUDIR)/openrisc.cpu $(CPUDIR)/openrisc.opc $(srcdir)/xc16x-desc.h $(srcdir)/xc16x-desc.c $(srcdir)/xc16x-opc.h $(srcdir)/xc16x-opc.c $(srcdir)/xc16x-ibld.c $(srcdir)/xc16x-asm.c $(srcdir)/xc16x-dis.c: $(XC16X_DEPS) @true -stamp-xc16x: $(CGENDEPS) $(srcdir)/../cpu/xc16x.cpu $(srcdir)/../cpu/xc16x.opc +stamp-xc16x: $(CGENDEPS) $(CPUDIR)/xc16x.cpu $(CPUDIR)/xc16x.opc $(MAKE) run-cgen arch=xc16x prefix=xc16x options= \ - archfile=$(srcdir)/../cpu/xc16x.cpu \ - opcfile=$(srcdir)/../cpu/xc16x.opc \ + archfile=$(CPUDIR)/xc16x.cpu \ + opcfile=$(CPUDIR)/xc16x.opc \ extrafiles= $(srcdir)/xstormy16-desc.h $(srcdir)/xstormy16-desc.c $(srcdir)/xstormy16-opc.h $(srcdir)/xstormy16-opc.c $(srcdir)/xstormy16-ibld.c $(srcdir)/xstormy16-asm.c $(srcdir)/xstormy16-dis.c: $(XSTORMY16_DEPS) diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 8e27d60..fafa7f6 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -1873,7 +1873,7 @@ print_insn_coprocessor (bfd_vma pc, case 'A': { int rn = (given >> 16) & 0xf; - int offset = given & 0xff; + bfd_vma offset = given & 0xff; func (stream, "[%s", arm_regnames [(given >> 16) & 0xf]); @@ -1893,6 +1893,8 @@ print_insn_coprocessor (bfd_vma pc, func (stream, ", #%d]%s", offset, WRITEBACK_BIT_SET ? "!" : ""); + else if (NEGATIVE_BIT_SET) + func (stream, ", #-0]"); else func (stream, "]"); } @@ -1904,10 +1906,14 @@ print_insn_coprocessor (bfd_vma pc, { if (offset) func (stream, ", #%d", offset); + else if (NEGATIVE_BIT_SET) + func (stream, ", #-0"); } else { - func (stream, ", {%d}", offset); + func (stream, ", {%s%d}", + (NEGATIVE_BIT_SET && !offset) ? "-" : "", + offset); value_in_comment = offset; } } @@ -2329,7 +2335,7 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given) { void *stream = info->stream; fprintf_ftype func = info->fprintf_func; - int offset = 0; + bfd_vma offset = 0; if (((given & 0x000f0000) == 0x000f0000) && ((given & 0x02000000) == 0)) @@ -2338,13 +2344,15 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given) func (stream, "[pc"); - if (NEGATIVE_BIT_SET) - offset = - offset; - if (PRE_BIT_SET) { - /* Pre-indexed. */ - func (stream, ", #%d]", offset); + /* Pre-indexed. Elide offset of positive zero when + non-writeback. */ + if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset) + func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset); + + if (NEGATIVE_BIT_SET) + offset = -offset; offset += pc + 8; @@ -2352,12 +2360,11 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given) being used. Probably a very dangerous thing for the programmer to do, but who are we to argue ? */ - if (WRITEBACK_BIT_SET) - func (stream, "!"); + func (stream, "]%s", WRITEBACK_BIT_SET ? "!" : ""); } else /* Post indexed. */ { - func (stream, "], #%d", offset); + func (stream, "], #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset); /* Ie ignore the offset. */ offset = pc + 8; @@ -2376,15 +2383,14 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given) { if ((given & 0x02000000) == 0) { + /* Elide offset of positive zero when non-writeback. */ offset = given & 0xfff; - if (offset) - func (stream, ", #%s%d", - NEGATIVE_BIT_SET ? "-" : "", offset); + if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset) + func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset); } else { - func (stream, ", %s", - NEGATIVE_BIT_SET ? "-" : ""); + func (stream, ", %s", NEGATIVE_BIT_SET ? "-" : ""); arm_decode_shift (given, func, stream, TRUE); } @@ -2395,12 +2401,10 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given) { if ((given & 0x02000000) == 0) { + /* Always show offset. */ offset = given & 0xfff; - if (offset) - func (stream, "], #%s%d", - NEGATIVE_BIT_SET ? "-" : "", offset); - else - func (stream, "]"); + func (stream, "], #%s%d", + NEGATIVE_BIT_SET ? "-" : "", offset); } else { @@ -2991,22 +2995,25 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) if ((given & 0x004f0000) == 0x004f0000) { /* PC relative with immediate offset. */ - int offset = ((given & 0xf00) >> 4) | (given & 0xf); - - if (NEGATIVE_BIT_SET) - offset = - offset; + bfd_vma offset = ((given & 0xf00) >> 4) | (given & 0xf); if (PRE_BIT_SET) { - if (offset) - func (stream, "[pc, #%d]\t; ", offset); + /* Elide positive zero offset. */ + if (offset || NEGATIVE_BIT_SET) + func (stream, "[pc, #%s%d]\t; ", + NEGATIVE_BIT_SET ? "-" : "", offset); else - func (stream, "[pc]\t; "); + func (stream, "[pc]\t; "); + if (NEGATIVE_BIT_SET) + offset = -offset; info->print_address_func (offset + pc + 8, info); } else { - func (stream, "[pc], #%d", offset); + /* Always show the offset. */ + func (stream, "[pc], #%s%d", + NEGATIVE_BIT_SET ? "-" : "", offset); if (! allow_unpredictable) is_unpredictable = TRUE; } @@ -3015,9 +3022,6 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) { int offset = ((given & 0xf00) >> 4) | (given & 0xf); - if (NEGATIVE_BIT_SET) - offset = - offset; - func (stream, "[%s", arm_regnames[(given >> 16) & 0xf]); @@ -3025,13 +3029,15 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) { if (IMMEDIATE_BIT_SET) { - if (WRITEBACK_BIT_SET) - /* Immediate Pre-indexed. */ - /* PR 10924: Offset must be printed, even if it is zero. */ - func (stream, ", #%d", offset); - else if (offset) - /* Immediate Offset: printing zero offset is optional. */ - func (stream, ", #%d", offset); + /* Elide offset for non-writeback + positive zero. */ + if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET + || offset) + func (stream, ", #%s%d", + NEGATIVE_BIT_SET ? "-" : "", offset); + + if (NEGATIVE_BIT_SET) + offset = -offset; value_in_comment = offset; } @@ -3059,7 +3065,10 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) { /* Immediate Post-indexed. */ /* PR 10924: Offset must be printed, even if it is zero. */ - func (stream, "], #%d", offset); + func (stream, "], #%s%d", + NEGATIVE_BIT_SET ? "-" : "", offset); + if (NEGATIVE_BIT_SET) + offset = -offset; value_in_comment = offset; } else @@ -3093,7 +3102,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) case 'b': { - int disp = (((given & 0xffffff) ^ 0x800000) - 0x800000); + bfd_vma disp = (((given & 0xffffff) ^ 0x800000) - 0x800000); info->print_address_func (disp * 4 + pc + 8, info); } break; @@ -3610,7 +3619,7 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given) { case '-': { - long reg; + bfd_vma reg; c++; while (*c >= '0' && *c <= '9') @@ -3899,7 +3908,7 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) unsigned int i12 = (given & 0x00000fff); unsigned int i8 = (given & 0x000000ff); bfd_boolean writeback = FALSE, postind = FALSE; - int offset = 0; + bfd_vma offset = 0; func (stream, "[%s", arm_regnames[Rn]); if (U) /* 12-bit positive immediate offset. */ @@ -4076,7 +4085,7 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) unsigned int S = (given & 0x04000000u) >> 26; unsigned int J1 = (given & 0x00002000u) >> 13; unsigned int J2 = (given & 0x00000800u) >> 11; - int offset = 0; + bfd_vma offset = 0; offset |= !S << 20; offset |= J2 << 19; @@ -4094,7 +4103,7 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) unsigned int S = (given & 0x04000000u) >> 26; unsigned int I1 = (given & 0x00002000u) >> 13; unsigned int I2 = (given & 0x00000800u) >> 11; - int offset = 0; + bfd_vma offset = 0; offset |= !S << 24; offset |= !(I1 ^ S) << 23; @@ -4702,7 +4711,7 @@ print_insn (bfd_vma pc, struct disassemble_info *info, bfd_boolean little) if (!found) { /* No mapping symbol found at this address. Look backwards - for a preceeding one. */ + for a preceding one. */ for (n = start - 1; n >= 0; n--) { if (get_map_sym_type (info, n, &type)) @@ -4762,7 +4771,7 @@ print_insn (bfd_vma pc, struct disassemble_info *info, bfd_boolean little) if (!found) { /* No mapping symbol found at this address. Look backwards - for a preceeding one. */ + for a preceding one. */ for (n = start - 1; n >= 0; n--) { if (get_sym_code_type (info, n, &type)) @@ -4984,5 +4993,5 @@ the -M switch:\n")); regnames[i].description); fprintf (stream, " force-thumb Assume all insns are Thumb insns\n"); - fprintf (stream, " no-force-thumb Examine preceeding label to determine an insn's type\n\n"); + fprintf (stream, " no-force-thumb Examine preceding label to determine an insn's type\n\n"); } diff --git a/opcodes/avr-dis.c b/opcodes/avr-dis.c index 85d7ab3..b895ad5 100644 --- a/opcodes/avr-dis.c +++ b/opcodes/avr-dis.c @@ -125,7 +125,8 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra { if (*s == '+') { - *buf++ = '+'; + if (insn & (1 << (15 - (s - opcode_str)))) + *buf++ = '+'; break; } } diff --git a/opcodes/configure b/opcodes/configure index 83ac9ae..746070e 100755 --- a/opcodes/configure +++ b/opcodes/configure @@ -12423,7 +12423,7 @@ if test x${all_targets} = xfalse ; then bfd_h8500_arch) ta="$ta h8500-dis.lo" ;; bfd_hppa_arch) ta="$ta hppa-dis.lo" ;; bfd_i370_arch) ta="$ta i370-dis.lo i370-opc.lo" ;; - bfd_i386_arch|bfd_l1om_arch) + bfd_i386_arch|bfd_l1om_arch|bfd_k1om_arch) ta="$ta i386-dis.lo i386-opc.lo" ;; bfd_i860_arch) ta="$ta i860-dis.lo" ;; bfd_i960_arch) ta="$ta i960-dis.lo" ;; @@ -12440,7 +12440,7 @@ if test x${all_targets} = xfalse ; then bfd_mcore_arch) ta="$ta mcore-dis.lo" ;; bfd_mep_arch) ta="$ta mep-asm.lo mep-desc.lo mep-dis.lo mep-ibld.lo mep-opc.lo" using_cgen=yes ;; bfd_microblaze_arch) ta="$ta microblaze-dis.lo" ;; - bfd_mips_arch) ta="$ta mips-dis.lo mips-opc.lo mips16-opc.lo" ;; + bfd_mips_arch) ta="$ta mips-dis.lo mips-opc.lo mips16-opc.lo micromips-opc.lo" ;; bfd_mmix_arch) ta="$ta mmix-dis.lo mmix-opc.lo" ;; bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;; bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;; @@ -12482,6 +12482,8 @@ if test x${all_targets} = xfalse ; then bfd_tic54x_arch) ta="$ta tic54x-dis.lo tic54x-opc.lo" ;; bfd_tic6x_arch) ta="$ta tic6x-dis.lo" ;; bfd_tic80_arch) ta="$ta tic80-dis.lo tic80-opc.lo" ;; + bfd_tilegx_arch) ta="$ta tilegx-dis.lo tilegx-opc.lo" ;; + bfd_tilepro_arch) ta="$ta tilepro-dis.lo tilepro-opc.lo" ;; bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; bfd_v850e_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; bfd_v850ea_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; diff --git a/opcodes/configure.in b/opcodes/configure.in index 0518781..3776be3 100644 --- a/opcodes/configure.in +++ b/opcodes/configure.in @@ -237,7 +237,7 @@ if test x${all_targets} = xfalse ; then bfd_h8500_arch) ta="$ta h8500-dis.lo" ;; bfd_hppa_arch) ta="$ta hppa-dis.lo" ;; bfd_i370_arch) ta="$ta i370-dis.lo i370-opc.lo" ;; - bfd_i386_arch|bfd_l1om_arch) + bfd_i386_arch|bfd_l1om_arch|bfd_k1om_arch) ta="$ta i386-dis.lo i386-opc.lo" ;; bfd_i860_arch) ta="$ta i860-dis.lo" ;; bfd_i960_arch) ta="$ta i960-dis.lo" ;; @@ -254,7 +254,7 @@ if test x${all_targets} = xfalse ; then bfd_mcore_arch) ta="$ta mcore-dis.lo" ;; bfd_mep_arch) ta="$ta mep-asm.lo mep-desc.lo mep-dis.lo mep-ibld.lo mep-opc.lo" using_cgen=yes ;; bfd_microblaze_arch) ta="$ta microblaze-dis.lo" ;; - bfd_mips_arch) ta="$ta mips-dis.lo mips-opc.lo mips16-opc.lo" ;; + bfd_mips_arch) ta="$ta mips-dis.lo mips-opc.lo mips16-opc.lo micromips-opc.lo" ;; bfd_mmix_arch) ta="$ta mmix-dis.lo mmix-opc.lo" ;; bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;; bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;; @@ -296,6 +296,8 @@ if test x${all_targets} = xfalse ; then bfd_tic54x_arch) ta="$ta tic54x-dis.lo tic54x-opc.lo" ;; bfd_tic6x_arch) ta="$ta tic6x-dis.lo" ;; bfd_tic80_arch) ta="$ta tic80-dis.lo tic80-opc.lo" ;; + bfd_tilegx_arch) ta="$ta tilegx-dis.lo tilegx-opc.lo" ;; + bfd_tilepro_arch) ta="$ta tilepro-dis.lo tilepro-opc.lo" ;; bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; bfd_v850e_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; bfd_v850ea_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index 0fb35ac..2919271 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -1,6 +1,6 @@ /* Select disassembly routine for specified architecture. Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, - 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of the GNU opcodes library. @@ -81,6 +81,8 @@ #define ARCH_tic54x #define ARCH_tic6x #define ARCH_tic80 +#define ARCH_tilegx +#define ARCH_tilepro #define ARCH_v850 #define ARCH_vax #define ARCH_w65 @@ -198,6 +200,7 @@ disassembler (abfd) #ifdef ARCH_i386 case bfd_arch_i386: case bfd_arch_l1om: + case bfd_arch_k1om: disassemble = print_insn_i386; break; #endif @@ -467,6 +470,16 @@ disassembler (abfd) disassemble = print_insn_m32c; break; #endif +#ifdef ARCH_tilegx + case bfd_arch_tilegx: + disassemble = print_insn_tilegx; + break; +#endif +#ifdef ARCH_tilepro + case bfd_arch_tilepro: + disassemble = print_insn_tilepro; + break; +#endif default: return 0; } diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 9834098..85b63ea 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -336,6 +336,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define MX { OP_MMX, 0 } #define XM { OP_XMM, 0 } #define XMScalar { OP_XMM, scalar_mode } +#define XMGatherQ { OP_XMM, vex_vsib_q_w_dq_mode } #define XMM { OP_XMM, xmm_mode } #define EM { OP_EM, v_mode } #define EMS { OP_EM, v_swap_mode } @@ -353,6 +354,12 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define EXxS { OP_EX, x_swap_mode } #define EXxmm { OP_EX, xmm_mode } #define EXxmmq { OP_EX, xmmq_mode } +#define EXxmm_mb { OP_EX, xmm_mb_mode } +#define EXxmm_mw { OP_EX, xmm_mw_mode } +#define EXxmm_md { OP_EX, xmm_md_mode } +#define EXxmm_mq { OP_EX, xmm_mq_mode } +#define EXxmmdw { OP_EX, xmmdw_mode } +#define EXxmmqd { OP_EX, xmmqd_mode } #define EXymmq { OP_EX, ymmq_mode } #define EXVexWdq { OP_EX, vex_w_dq_mode } #define EXVexWdqScalar { OP_EX, vex_scalar_w_dq_mode } @@ -369,6 +376,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define Vex { OP_VEX, vex_mode } #define VexScalar { OP_VEX, vex_scalar_mode } +#define VexGatherQ { OP_VEX, vex_vsib_q_w_dq_mode } #define Vex128 { OP_VEX, vex128_mode } #define Vex256 { OP_VEX, vex256_mode } #define VexGdq { OP_VEX, dq_mode } @@ -391,6 +399,9 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define VZERO { VZERO_Fixup, 0 } #define VCMP { VCMP_Fixup, 0 } +#define MVexVSIBDWpX { OP_M, vex_vsib_d_w_dq_mode } +#define MVexVSIBQWpX { OP_M, vex_vsib_q_w_dq_mode } + /* Used handle "rep" prefix for string instructions. */ #define Xbr { REP_Fixup, eSI_reg } #define Xvr { REP_Fixup, eSI_reg } @@ -441,8 +452,22 @@ enum xmm_mode, /* 16-byte XMM or quad word operand */ xmmq_mode, + /* XMM register or byte memory operand */ + xmm_mb_mode, + /* XMM register or word memory operand */ + xmm_mw_mode, + /* XMM register or double word memory operand */ + xmm_md_mode, + /* XMM register or quad word memory operand */ + xmm_mq_mode, + /* 16-byte XMM, word or double word operand */ + xmmdw_mode, + /* 16-byte XMM, double word or quad word operand */ + xmmqd_mode, /* 32-byte YMM or quad word operand */ ymmq_mode, + /* 32-byte YMM or 16-byte word operand */ + ymmxmm_mode, /* d_mode in 32bit, q_mode in 64bit mode. */ m_mode, /* pair of v_mode operands */ @@ -475,6 +500,11 @@ enum /* operand size depends on the VEX.W bit. */ vex_w_dq_mode, + /* Similar to vex_w_dq_mode, with VSIB dword indices. */ + vex_vsib_d_w_dq_mode, + /* Similar to vex_w_dq_mode, with VSIB qword indices. */ + vex_vsib_q_w_dq_mode, + /* scalar, ignore vector length. */ scalar_mode, /* like d_mode, ignore vector length. */ @@ -687,14 +717,15 @@ enum MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2, MOD_VEX_0FF0_PREFIX_3, - MOD_VEX_0F3818_PREFIX_2, - MOD_VEX_0F3819_PREFIX_2, MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2, MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2, MOD_VEX_0F382E_PREFIX_2, - MOD_VEX_0F382F_PREFIX_2 + MOD_VEX_0F382F_PREFIX_2, + MOD_VEX_0F385A_PREFIX_2, + MOD_VEX_0F388C_PREFIX_2, + MOD_VEX_0F388E_PREFIX_2, }; enum @@ -797,6 +828,7 @@ enum PREFIX_0F3841, PREFIX_0F3880, PREFIX_0F3881, + PREFIX_0F3882, PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, @@ -949,6 +981,7 @@ enum PREFIX_VEX_0F380E, PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, + PREFIX_VEX_0F3816, PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819, @@ -976,6 +1009,7 @@ enum PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835, + PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838, PREFIX_VEX_0F3839, @@ -987,6 +1021,20 @@ enum PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841, + PREFIX_VEX_0F3845, + PREFIX_VEX_0F3846, + PREFIX_VEX_0F3847, + PREFIX_VEX_0F3858, + PREFIX_VEX_0F3859, + PREFIX_VEX_0F385A, + PREFIX_VEX_0F3878, + PREFIX_VEX_0F3879, + PREFIX_VEX_0F388C, + PREFIX_VEX_0F388E, + PREFIX_VEX_0F3890, + PREFIX_VEX_0F3891, + PREFIX_VEX_0F3892, + PREFIX_VEX_0F3893, PREFIX_VEX_0F3896, PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, @@ -1026,7 +1074,12 @@ enum PREFIX_VEX_0F38F3_REG_1, PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3, + PREFIX_VEX_0F38F5, + PREFIX_VEX_0F38F6, PREFIX_VEX_0F38F7, + PREFIX_VEX_0F3A00, + PREFIX_VEX_0F3A01, + PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04, PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, @@ -1048,10 +1101,13 @@ enum PREFIX_VEX_0F3A20, PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, + PREFIX_VEX_0F3A38, + PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40, PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44, + PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49, PREFIX_VEX_0F3A4A, @@ -1081,7 +1137,8 @@ enum PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F, - PREFIX_VEX_0F3ADF + PREFIX_VEX_0F3ADF, + PREFIX_VEX_0F3AF0 }; enum @@ -1179,37 +1236,7 @@ enum VEX_LEN_0F5E_P_3, VEX_LEN_0F5F_P_1, VEX_LEN_0F5F_P_3, - VEX_LEN_0F60_P_2, - VEX_LEN_0F61_P_2, - VEX_LEN_0F62_P_2, - VEX_LEN_0F63_P_2, - VEX_LEN_0F64_P_2, - VEX_LEN_0F65_P_2, - VEX_LEN_0F66_P_2, - VEX_LEN_0F67_P_2, - VEX_LEN_0F68_P_2, - VEX_LEN_0F69_P_2, - VEX_LEN_0F6A_P_2, - VEX_LEN_0F6B_P_2, - VEX_LEN_0F6C_P_2, - VEX_LEN_0F6D_P_2, VEX_LEN_0F6E_P_2, - VEX_LEN_0F70_P_1, - VEX_LEN_0F70_P_2, - VEX_LEN_0F70_P_3, - VEX_LEN_0F71_R_2_P_2, - VEX_LEN_0F71_R_4_P_2, - VEX_LEN_0F71_R_6_P_2, - VEX_LEN_0F72_R_2_P_2, - VEX_LEN_0F72_R_4_P_2, - VEX_LEN_0F72_R_6_P_2, - VEX_LEN_0F73_R_2_P_2, - VEX_LEN_0F73_R_3_P_2, - VEX_LEN_0F73_R_6_P_2, - VEX_LEN_0F73_R_7_P_2, - VEX_LEN_0F74_P_2, - VEX_LEN_0F75_P_2, - VEX_LEN_0F76_P_2, VEX_LEN_0F7E_P_1, VEX_LEN_0F7E_P_2, VEX_LEN_0FAE_R_2_M_0, @@ -1218,93 +1245,14 @@ enum VEX_LEN_0FC2_P_3, VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, - VEX_LEN_0FD1_P_2, - VEX_LEN_0FD2_P_2, - VEX_LEN_0FD3_P_2, - VEX_LEN_0FD4_P_2, - VEX_LEN_0FD5_P_2, VEX_LEN_0FD6_P_2, - VEX_LEN_0FD7_P_2_M_1, - VEX_LEN_0FD8_P_2, - VEX_LEN_0FD9_P_2, - VEX_LEN_0FDA_P_2, - VEX_LEN_0FDB_P_2, - VEX_LEN_0FDC_P_2, - VEX_LEN_0FDD_P_2, - VEX_LEN_0FDE_P_2, - VEX_LEN_0FDF_P_2, - VEX_LEN_0FE0_P_2, - VEX_LEN_0FE1_P_2, - VEX_LEN_0FE2_P_2, - VEX_LEN_0FE3_P_2, - VEX_LEN_0FE4_P_2, - VEX_LEN_0FE5_P_2, - VEX_LEN_0FE8_P_2, - VEX_LEN_0FE9_P_2, - VEX_LEN_0FEA_P_2, - VEX_LEN_0FEB_P_2, - VEX_LEN_0FEC_P_2, - VEX_LEN_0FED_P_2, - VEX_LEN_0FEE_P_2, - VEX_LEN_0FEF_P_2, - VEX_LEN_0FF1_P_2, - VEX_LEN_0FF2_P_2, - VEX_LEN_0FF3_P_2, - VEX_LEN_0FF4_P_2, - VEX_LEN_0FF5_P_2, - VEX_LEN_0FF6_P_2, VEX_LEN_0FF7_P_2, - VEX_LEN_0FF8_P_2, - VEX_LEN_0FF9_P_2, - VEX_LEN_0FFA_P_2, - VEX_LEN_0FFB_P_2, - VEX_LEN_0FFC_P_2, - VEX_LEN_0FFD_P_2, - VEX_LEN_0FFE_P_2, - VEX_LEN_0F3800_P_2, - VEX_LEN_0F3801_P_2, - VEX_LEN_0F3802_P_2, - VEX_LEN_0F3803_P_2, - VEX_LEN_0F3804_P_2, - VEX_LEN_0F3805_P_2, - VEX_LEN_0F3806_P_2, - VEX_LEN_0F3807_P_2, - VEX_LEN_0F3808_P_2, - VEX_LEN_0F3809_P_2, - VEX_LEN_0F380A_P_2, - VEX_LEN_0F380B_P_2, - VEX_LEN_0F3819_P_2_M_0, + VEX_LEN_0F3816_P_2, + VEX_LEN_0F3819_P_2, VEX_LEN_0F381A_P_2_M_0, - VEX_LEN_0F381C_P_2, - VEX_LEN_0F381D_P_2, - VEX_LEN_0F381E_P_2, - VEX_LEN_0F3820_P_2, - VEX_LEN_0F3821_P_2, - VEX_LEN_0F3822_P_2, - VEX_LEN_0F3823_P_2, - VEX_LEN_0F3824_P_2, - VEX_LEN_0F3825_P_2, - VEX_LEN_0F3828_P_2, - VEX_LEN_0F3829_P_2, - VEX_LEN_0F382A_P_2_M_0, - VEX_LEN_0F382B_P_2, - VEX_LEN_0F3830_P_2, - VEX_LEN_0F3831_P_2, - VEX_LEN_0F3832_P_2, - VEX_LEN_0F3833_P_2, - VEX_LEN_0F3834_P_2, - VEX_LEN_0F3835_P_2, - VEX_LEN_0F3837_P_2, - VEX_LEN_0F3838_P_2, - VEX_LEN_0F3839_P_2, - VEX_LEN_0F383A_P_2, - VEX_LEN_0F383B_P_2, - VEX_LEN_0F383C_P_2, - VEX_LEN_0F383D_P_2, - VEX_LEN_0F383E_P_2, - VEX_LEN_0F383F_P_2, - VEX_LEN_0F3840_P_2, + VEX_LEN_0F3836_P_2, VEX_LEN_0F3841_P_2, + VEX_LEN_0F385A_P_2_M_0, VEX_LEN_0F38DB_P_2, VEX_LEN_0F38DC_P_2, VEX_LEN_0F38DD_P_2, @@ -1314,12 +1262,19 @@ enum VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0, VEX_LEN_0F38F3_R_3_P_0, + VEX_LEN_0F38F5_P_0, + VEX_LEN_0F38F5_P_1, + VEX_LEN_0F38F5_P_3, + VEX_LEN_0F38F6_P_3, VEX_LEN_0F38F7_P_0, + VEX_LEN_0F38F7_P_1, + VEX_LEN_0F38F7_P_2, + VEX_LEN_0F38F7_P_3, + VEX_LEN_0F3A00_P_2, + VEX_LEN_0F3A01_P_2, VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A0A_P_2, VEX_LEN_0F3A0B_P_2, - VEX_LEN_0F3A0E_P_2, - VEX_LEN_0F3A0F_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2, VEX_LEN_0F3A16_P_2, @@ -1329,10 +1284,11 @@ enum VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2, VEX_LEN_0F3A22_P_2, + VEX_LEN_0F3A38_P_2, + VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, - VEX_LEN_0F3A42_P_2, VEX_LEN_0F3A44_P_2, - VEX_LEN_0F3A4C_P_2, + VEX_LEN_0F3A46_P_2, VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2, @@ -1346,6 +1302,7 @@ enum VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2, VEX_LEN_0F3ADF_P_2, + VEX_LEN_0F3AF0_P_3, VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81 }; @@ -1533,9 +1490,10 @@ enum VEX_W_0F380D_P_2, VEX_W_0F380E_P_2, VEX_W_0F380F_P_2, + VEX_W_0F3816_P_2, VEX_W_0F3817_P_2, - VEX_W_0F3818_P_2_M_0, - VEX_W_0F3819_P_2_M_0, + VEX_W_0F3818_P_2, + VEX_W_0F3819_P_2, VEX_W_0F381A_P_2_M_0, VEX_W_0F381C_P_2, VEX_W_0F381D_P_2, @@ -1560,6 +1518,7 @@ enum VEX_W_0F3833_P_2, VEX_W_0F3834_P_2, VEX_W_0F3835_P_2, + VEX_W_0F3836_P_2, VEX_W_0F3837_P_2, VEX_W_0F3838_P_2, VEX_W_0F3839_P_2, @@ -1571,11 +1530,20 @@ enum VEX_W_0F383F_P_2, VEX_W_0F3840_P_2, VEX_W_0F3841_P_2, + VEX_W_0F3846_P_2, + VEX_W_0F3858_P_2, + VEX_W_0F3859_P_2, + VEX_W_0F385A_P_2_M_0, + VEX_W_0F3878_P_2, + VEX_W_0F3879_P_2, VEX_W_0F38DB_P_2, VEX_W_0F38DC_P_2, VEX_W_0F38DD_P_2, VEX_W_0F38DE_P_2, VEX_W_0F38DF_P_2, + VEX_W_0F3A00_P_2, + VEX_W_0F3A01_P_2, + VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2, VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2, @@ -1593,10 +1561,13 @@ enum VEX_W_0F3A19_P_2, VEX_W_0F3A20_P_2, VEX_W_0F3A21_P_2, + VEX_W_0F3A38_P_2, + VEX_W_0F3A39_P_2, VEX_W_0F3A40_P_2, VEX_W_0F3A41_P_2, VEX_W_0F3A42_P_2, VEX_W_0F3A44_P_2, + VEX_W_0F3A46_P_2, VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, VEX_W_0F3A4A_P_2, @@ -1665,6 +1636,7 @@ struct dis386 { "LB" => print "abs" in 64bit mode and behave as 'B' otherwise "LS" => print "abs" in 64bit mode and behave as 'S' otherwise "LV" => print "abs" for 64bit operand and behave as 'S' otherwise + "LW" => print 'd', 'q' depending on the VEX.W bit Many of the above letters print nothing in Intel mode. See "putop" for the details. @@ -3426,6 +3398,13 @@ static const struct dis386 prefix_table[][4] = { { "invvpid", { Gm, Mo } }, }, + /* PREFIX_0F3882 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "invpcid", { Gm, M } }, + }, + /* PREFIX_0F38DB */ { { Bad_Opcode }, @@ -3794,98 +3773,98 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F60_P_2) }, + { VEX_W_TABLE (VEX_W_0F60_P_2) }, }, /* PREFIX_VEX_0F61 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F61_P_2) }, + { VEX_W_TABLE (VEX_W_0F61_P_2) }, }, /* PREFIX_VEX_0F62 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F62_P_2) }, + { VEX_W_TABLE (VEX_W_0F62_P_2) }, }, /* PREFIX_VEX_0F63 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F63_P_2) }, + { VEX_W_TABLE (VEX_W_0F63_P_2) }, }, /* PREFIX_VEX_0F64 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F64_P_2) }, + { VEX_W_TABLE (VEX_W_0F64_P_2) }, }, /* PREFIX_VEX_0F65 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F65_P_2) }, + { VEX_W_TABLE (VEX_W_0F65_P_2) }, }, /* PREFIX_VEX_0F66 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F66_P_2) }, + { VEX_W_TABLE (VEX_W_0F66_P_2) }, }, /* PREFIX_VEX_0F67 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F67_P_2) }, + { VEX_W_TABLE (VEX_W_0F67_P_2) }, }, /* PREFIX_VEX_0F68 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F68_P_2) }, + { VEX_W_TABLE (VEX_W_0F68_P_2) }, }, /* PREFIX_VEX_0F69 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F69_P_2) }, + { VEX_W_TABLE (VEX_W_0F69_P_2) }, }, /* PREFIX_VEX_0F6A */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F6A_P_2) }, + { VEX_W_TABLE (VEX_W_0F6A_P_2) }, }, /* PREFIX_VEX_0F6B */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F6B_P_2) }, + { VEX_W_TABLE (VEX_W_0F6B_P_2) }, }, /* PREFIX_VEX_0F6C */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F6C_P_2) }, + { VEX_W_TABLE (VEX_W_0F6C_P_2) }, }, /* PREFIX_VEX_0F6D */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F6D_P_2) }, + { VEX_W_TABLE (VEX_W_0F6D_P_2) }, }, /* PREFIX_VEX_0F6E */ @@ -3905,100 +3884,100 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_VEX_0F70 */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F70_P_1) }, - { VEX_LEN_TABLE (VEX_LEN_0F70_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_0F70_P_3) }, + { VEX_W_TABLE (VEX_W_0F70_P_1) }, + { VEX_W_TABLE (VEX_W_0F70_P_2) }, + { VEX_W_TABLE (VEX_W_0F70_P_3) }, }, /* PREFIX_VEX_0F71_REG_2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F71_R_2_P_2) }, + { VEX_W_TABLE (VEX_W_0F71_R_2_P_2) }, }, /* PREFIX_VEX_0F71_REG_4 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F71_R_4_P_2) }, + { VEX_W_TABLE (VEX_W_0F71_R_4_P_2) }, }, /* PREFIX_VEX_0F71_REG_6 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F71_R_6_P_2) }, + { VEX_W_TABLE (VEX_W_0F71_R_6_P_2) }, }, /* PREFIX_VEX_0F72_REG_2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F72_R_2_P_2) }, + { VEX_W_TABLE (VEX_W_0F72_R_2_P_2) }, }, /* PREFIX_VEX_0F72_REG_4 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F72_R_4_P_2) }, + { VEX_W_TABLE (VEX_W_0F72_R_4_P_2) }, }, /* PREFIX_VEX_0F72_REG_6 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F72_R_6_P_2) }, + { VEX_W_TABLE (VEX_W_0F72_R_6_P_2) }, }, /* PREFIX_VEX_0F73_REG_2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F73_R_2_P_2) }, + { VEX_W_TABLE (VEX_W_0F73_R_2_P_2) }, }, /* PREFIX_VEX_0F73_REG_3 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F73_R_3_P_2) }, + { VEX_W_TABLE (VEX_W_0F73_R_3_P_2) }, }, /* PREFIX_VEX_0F73_REG_6 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F73_R_6_P_2) }, + { VEX_W_TABLE (VEX_W_0F73_R_6_P_2) }, }, /* PREFIX_VEX_0F73_REG_7 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F73_R_7_P_2) }, + { VEX_W_TABLE (VEX_W_0F73_R_7_P_2) }, }, /* PREFIX_VEX_0F74 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F74_P_2) }, + { VEX_W_TABLE (VEX_W_0F74_P_2) }, }, /* PREFIX_VEX_0F75 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F75_P_2) }, + { VEX_W_TABLE (VEX_W_0F75_P_2) }, }, /* PREFIX_VEX_0F76 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F76_P_2) }, + { VEX_W_TABLE (VEX_W_0F76_P_2) }, }, /* PREFIX_VEX_0F77 */ @@ -4070,35 +4049,35 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FD1_P_2) }, + { VEX_W_TABLE (VEX_W_0FD1_P_2) }, }, /* PREFIX_VEX_0FD2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FD2_P_2) }, + { VEX_W_TABLE (VEX_W_0FD2_P_2) }, }, /* PREFIX_VEX_0FD3 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FD3_P_2) }, + { VEX_W_TABLE (VEX_W_0FD3_P_2) }, }, /* PREFIX_VEX_0FD4 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FD4_P_2) }, + { VEX_W_TABLE (VEX_W_0FD4_P_2) }, }, /* PREFIX_VEX_0FD5 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FD5_P_2) }, + { VEX_W_TABLE (VEX_W_0FD5_P_2) }, }, /* PREFIX_VEX_0FD6 */ @@ -4119,98 +4098,98 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FD8_P_2) }, + { VEX_W_TABLE (VEX_W_0FD8_P_2) }, }, /* PREFIX_VEX_0FD9 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FD9_P_2) }, + { VEX_W_TABLE (VEX_W_0FD9_P_2) }, }, /* PREFIX_VEX_0FDA */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FDA_P_2) }, + { VEX_W_TABLE (VEX_W_0FDA_P_2) }, }, /* PREFIX_VEX_0FDB */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FDB_P_2) }, + { VEX_W_TABLE (VEX_W_0FDB_P_2) }, }, /* PREFIX_VEX_0FDC */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FDC_P_2) }, + { VEX_W_TABLE (VEX_W_0FDC_P_2) }, }, /* PREFIX_VEX_0FDD */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FDD_P_2) }, + { VEX_W_TABLE (VEX_W_0FDD_P_2) }, }, /* PREFIX_VEX_0FDE */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FDE_P_2) }, + { VEX_W_TABLE (VEX_W_0FDE_P_2) }, }, /* PREFIX_VEX_0FDF */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FDF_P_2) }, + { VEX_W_TABLE (VEX_W_0FDF_P_2) }, }, /* PREFIX_VEX_0FE0 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FE0_P_2) }, + { VEX_W_TABLE (VEX_W_0FE0_P_2) }, }, /* PREFIX_VEX_0FE1 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FE1_P_2) }, + { VEX_W_TABLE (VEX_W_0FE1_P_2) }, }, /* PREFIX_VEX_0FE2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FE2_P_2) }, + { VEX_W_TABLE (VEX_W_0FE2_P_2) }, }, /* PREFIX_VEX_0FE3 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FE3_P_2) }, + { VEX_W_TABLE (VEX_W_0FE3_P_2) }, }, /* PREFIX_VEX_0FE4 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FE4_P_2) }, + { VEX_W_TABLE (VEX_W_0FE4_P_2) }, }, /* PREFIX_VEX_0FE5 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FE5_P_2) }, + { VEX_W_TABLE (VEX_W_0FE5_P_2) }, }, /* PREFIX_VEX_0FE6 */ @@ -4232,56 +4211,56 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FE8_P_2) }, + { VEX_W_TABLE (VEX_W_0FE8_P_2) }, }, /* PREFIX_VEX_0FE9 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FE9_P_2) }, + { VEX_W_TABLE (VEX_W_0FE9_P_2) }, }, /* PREFIX_VEX_0FEA */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FEA_P_2) }, + { VEX_W_TABLE (VEX_W_0FEA_P_2) }, }, /* PREFIX_VEX_0FEB */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FEB_P_2) }, + { VEX_W_TABLE (VEX_W_0FEB_P_2) }, }, /* PREFIX_VEX_0FEC */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FEC_P_2) }, + { VEX_W_TABLE (VEX_W_0FEC_P_2) }, }, /* PREFIX_VEX_0FED */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FED_P_2) }, + { VEX_W_TABLE (VEX_W_0FED_P_2) }, }, /* PREFIX_VEX_0FEE */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FEE_P_2) }, + { VEX_W_TABLE (VEX_W_0FEE_P_2) }, }, /* PREFIX_VEX_0FEF */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FEF_P_2) }, + { VEX_W_TABLE (VEX_W_0FEF_P_2) }, }, /* PREFIX_VEX_0FF0 */ @@ -4296,42 +4275,42 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FF1_P_2) }, + { VEX_W_TABLE (VEX_W_0FF1_P_2) }, }, /* PREFIX_VEX_0FF2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FF2_P_2) }, + { VEX_W_TABLE (VEX_W_0FF2_P_2) }, }, /* PREFIX_VEX_0FF3 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FF3_P_2) }, + { VEX_W_TABLE (VEX_W_0FF3_P_2) }, }, /* PREFIX_VEX_0FF4 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FF4_P_2) }, + { VEX_W_TABLE (VEX_W_0FF4_P_2) }, }, /* PREFIX_VEX_0FF5 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FF5_P_2) }, + { VEX_W_TABLE (VEX_W_0FF5_P_2) }, }, /* PREFIX_VEX_0FF6 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FF6_P_2) }, + { VEX_W_TABLE (VEX_W_0FF6_P_2) }, }, /* PREFIX_VEX_0FF7 */ @@ -4345,133 +4324,133 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FF8_P_2) }, + { VEX_W_TABLE (VEX_W_0FF8_P_2) }, }, /* PREFIX_VEX_0FF9 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FF9_P_2) }, + { VEX_W_TABLE (VEX_W_0FF9_P_2) }, }, /* PREFIX_VEX_0FFA */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FFA_P_2) }, + { VEX_W_TABLE (VEX_W_0FFA_P_2) }, }, /* PREFIX_VEX_0FFB */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FFB_P_2) }, + { VEX_W_TABLE (VEX_W_0FFB_P_2) }, }, /* PREFIX_VEX_0FFC */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FFC_P_2) }, + { VEX_W_TABLE (VEX_W_0FFC_P_2) }, }, /* PREFIX_VEX_0FFD */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FFD_P_2) }, + { VEX_W_TABLE (VEX_W_0FFD_P_2) }, }, /* PREFIX_VEX_0FFE */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FFE_P_2) }, + { VEX_W_TABLE (VEX_W_0FFE_P_2) }, }, /* PREFIX_VEX_0F3800 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3800_P_2) }, + { VEX_W_TABLE (VEX_W_0F3800_P_2) }, }, /* PREFIX_VEX_0F3801 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3801_P_2) }, + { VEX_W_TABLE (VEX_W_0F3801_P_2) }, }, /* PREFIX_VEX_0F3802 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3802_P_2) }, + { VEX_W_TABLE (VEX_W_0F3802_P_2) }, }, /* PREFIX_VEX_0F3803 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3803_P_2) }, + { VEX_W_TABLE (VEX_W_0F3803_P_2) }, }, /* PREFIX_VEX_0F3804 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3804_P_2) }, + { VEX_W_TABLE (VEX_W_0F3804_P_2) }, }, /* PREFIX_VEX_0F3805 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3805_P_2) }, + { VEX_W_TABLE (VEX_W_0F3805_P_2) }, }, /* PREFIX_VEX_0F3806 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3806_P_2) }, + { VEX_W_TABLE (VEX_W_0F3806_P_2) }, }, /* PREFIX_VEX_0F3807 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3807_P_2) }, + { VEX_W_TABLE (VEX_W_0F3807_P_2) }, }, /* PREFIX_VEX_0F3808 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3808_P_2) }, + { VEX_W_TABLE (VEX_W_0F3808_P_2) }, }, /* PREFIX_VEX_0F3809 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3809_P_2) }, + { VEX_W_TABLE (VEX_W_0F3809_P_2) }, }, /* PREFIX_VEX_0F380A */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F380A_P_2) }, + { VEX_W_TABLE (VEX_W_0F380A_P_2) }, }, /* PREFIX_VEX_0F380B */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F380B_P_2) }, + { VEX_W_TABLE (VEX_W_0F380B_P_2) }, }, /* PREFIX_VEX_0F380C */ @@ -4509,6 +4488,13 @@ static const struct dis386 prefix_table[][4] = { { "vcvtph2ps", { XM, EXxmmq } }, }, + /* PREFIX_VEX_0F3816 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3816_P_2) }, + }, + /* PREFIX_VEX_0F3817 */ { { Bad_Opcode }, @@ -4520,14 +4506,14 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_0F3818_PREFIX_2) }, + { VEX_W_TABLE (VEX_W_0F3818_P_2) }, }, /* PREFIX_VEX_0F3819 */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_0F3819_PREFIX_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3819_P_2) }, }, /* PREFIX_VEX_0F381A */ @@ -4541,77 +4527,77 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F381C_P_2) }, + { VEX_W_TABLE (VEX_W_0F381C_P_2) }, }, /* PREFIX_VEX_0F381D */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F381D_P_2) }, + { VEX_W_TABLE (VEX_W_0F381D_P_2) }, }, /* PREFIX_VEX_0F381E */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F381E_P_2) }, + { VEX_W_TABLE (VEX_W_0F381E_P_2) }, }, /* PREFIX_VEX_0F3820 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3820_P_2) }, + { VEX_W_TABLE (VEX_W_0F3820_P_2) }, }, /* PREFIX_VEX_0F3821 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3821_P_2) }, + { VEX_W_TABLE (VEX_W_0F3821_P_2) }, }, /* PREFIX_VEX_0F3822 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3822_P_2) }, + { VEX_W_TABLE (VEX_W_0F3822_P_2) }, }, /* PREFIX_VEX_0F3823 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3823_P_2) }, + { VEX_W_TABLE (VEX_W_0F3823_P_2) }, }, /* PREFIX_VEX_0F3824 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3824_P_2) }, + { VEX_W_TABLE (VEX_W_0F3824_P_2) }, }, /* PREFIX_VEX_0F3825 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3825_P_2) }, + { VEX_W_TABLE (VEX_W_0F3825_P_2) }, }, /* PREFIX_VEX_0F3828 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3828_P_2) }, + { VEX_W_TABLE (VEX_W_0F3828_P_2) }, }, /* PREFIX_VEX_0F3829 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3829_P_2) }, + { VEX_W_TABLE (VEX_W_0F3829_P_2) }, }, /* PREFIX_VEX_0F382A */ @@ -4625,7 +4611,7 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F382B_P_2) }, + { VEX_W_TABLE (VEX_W_0F382B_P_2) }, }, /* PREFIX_VEX_0F382C */ @@ -4660,112 +4646,119 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3830_P_2) }, + { VEX_W_TABLE (VEX_W_0F3830_P_2) }, }, /* PREFIX_VEX_0F3831 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3831_P_2) }, + { VEX_W_TABLE (VEX_W_0F3831_P_2) }, }, /* PREFIX_VEX_0F3832 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3832_P_2) }, + { VEX_W_TABLE (VEX_W_0F3832_P_2) }, }, /* PREFIX_VEX_0F3833 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3833_P_2) }, + { VEX_W_TABLE (VEX_W_0F3833_P_2) }, }, /* PREFIX_VEX_0F3834 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3834_P_2) }, + { VEX_W_TABLE (VEX_W_0F3834_P_2) }, }, /* PREFIX_VEX_0F3835 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3835_P_2) }, + { VEX_W_TABLE (VEX_W_0F3835_P_2) }, + }, + + /* PREFIX_VEX_0F3836 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3836_P_2) }, }, /* PREFIX_VEX_0F3837 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3837_P_2) }, + { VEX_W_TABLE (VEX_W_0F3837_P_2) }, }, /* PREFIX_VEX_0F3838 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3838_P_2) }, + { VEX_W_TABLE (VEX_W_0F3838_P_2) }, }, /* PREFIX_VEX_0F3839 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3839_P_2) }, + { VEX_W_TABLE (VEX_W_0F3839_P_2) }, }, /* PREFIX_VEX_0F383A */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F383A_P_2) }, + { VEX_W_TABLE (VEX_W_0F383A_P_2) }, }, /* PREFIX_VEX_0F383B */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F383B_P_2) }, + { VEX_W_TABLE (VEX_W_0F383B_P_2) }, }, /* PREFIX_VEX_0F383C */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F383C_P_2) }, + { VEX_W_TABLE (VEX_W_0F383C_P_2) }, }, /* PREFIX_VEX_0F383D */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F383D_P_2) }, + { VEX_W_TABLE (VEX_W_0F383D_P_2) }, }, /* PREFIX_VEX_0F383E */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F383E_P_2) }, + { VEX_W_TABLE (VEX_W_0F383E_P_2) }, }, /* PREFIX_VEX_0F383F */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F383F_P_2) }, + { VEX_W_TABLE (VEX_W_0F383F_P_2) }, }, /* PREFIX_VEX_0F3840 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3840_P_2) }, + { VEX_W_TABLE (VEX_W_0F3840_P_2) }, }, /* PREFIX_VEX_0F3841 */ @@ -4775,6 +4768,104 @@ static const struct dis386 prefix_table[][4] = { { VEX_LEN_TABLE (VEX_LEN_0F3841_P_2) }, }, + /* PREFIX_VEX_0F3845 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vpsrlv%LW", { XM, Vex, EXx } }, + }, + + /* PREFIX_VEX_0F3846 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3846_P_2) }, + }, + + /* PREFIX_VEX_0F3847 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vpsllv%LW", { XM, Vex, EXx } }, + }, + + /* PREFIX_VEX_0F3858 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3858_P_2) }, + }, + + /* PREFIX_VEX_0F3859 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3859_P_2) }, + }, + + /* PREFIX_VEX_0F385A */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { MOD_TABLE (MOD_VEX_0F385A_PREFIX_2) }, + }, + + /* PREFIX_VEX_0F3878 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3878_P_2) }, + }, + + /* PREFIX_VEX_0F3879 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3879_P_2) }, + }, + + /* PREFIX_VEX_0F388C */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { MOD_TABLE (MOD_VEX_0F388C_PREFIX_2) }, + }, + + /* PREFIX_VEX_0F388E */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { MOD_TABLE (MOD_VEX_0F388E_PREFIX_2) }, + }, + + /* PREFIX_VEX_0F3890 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vpgatherd%LW", { XM, MVexVSIBDWpX, Vex } }, + }, + + /* PREFIX_VEX_0F3891 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vpgatherq%LW", { XMGatherQ, MVexVSIBQWpX, VexGatherQ } }, + }, + + /* PREFIX_VEX_0F3892 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vgatherdp%XW", { XM, MVexVSIBDWpX, Vex } }, + }, + + /* PREFIX_VEX_0F3893 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vgatherqp%XW", { XMGatherQ, MVexVSIBQWpX, VexGatherQ } }, + }, + /* PREFIX_VEX_0F3896 */ { { Bad_Opcode }, @@ -5041,9 +5132,49 @@ static const struct dis386 prefix_table[][4] = { { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_3_P_0) }, }, + /* PREFIX_VEX_0F38F5 */ + { + { VEX_LEN_TABLE (VEX_LEN_0F38F5_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F38F5_P_1) }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F38F5_P_3) }, + }, + + /* PREFIX_VEX_0F38F6 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F38F6_P_3) }, + }, + /* PREFIX_VEX_0F38F7 */ { { VEX_LEN_TABLE (VEX_LEN_0F38F7_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F38F7_P_1) }, + { VEX_LEN_TABLE (VEX_LEN_0F38F7_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F38F7_P_3) }, + }, + + /* PREFIX_VEX_0F3A00 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3A00_P_2) }, + }, + + /* PREFIX_VEX_0F3A01 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3A01_P_2) }, + }, + + /* PREFIX_VEX_0F3A02 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3A02_P_2) }, }, /* PREFIX_VEX_0F3A04 */ @@ -5113,14 +5244,14 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3A0E_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A0E_P_2) }, }, /* PREFIX_VEX_0F3A0F */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3A0F_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A0F_P_2) }, }, /* PREFIX_VEX_0F3A14 */ @@ -5193,6 +5324,20 @@ static const struct dis386 prefix_table[][4] = { { VEX_LEN_TABLE (VEX_LEN_0F3A22_P_2) }, }, + /* PREFIX_VEX_0F3A38 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3A38_P_2) }, + }, + + /* PREFIX_VEX_0F3A39 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3A39_P_2) }, + }, + /* PREFIX_VEX_0F3A40 */ { { Bad_Opcode }, @@ -5211,7 +5356,7 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3A42_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A42_P_2) }, }, /* PREFIX_VEX_0F3A44 */ @@ -5221,6 +5366,13 @@ static const struct dis386 prefix_table[][4] = { { VEX_LEN_TABLE (VEX_LEN_0F3A44_P_2) }, }, + /* PREFIX_VEX_0F3A46 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3A46_P_2) }, + }, + /* PREFIX_VEX_0F3A48 */ { { Bad_Opcode }, @@ -5253,7 +5405,7 @@ static const struct dis386 prefix_table[][4] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F3A4C_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A4C_P_2) }, }, /* PREFIX_VEX_0F3A5C */ @@ -5432,6 +5584,14 @@ static const struct dis386 prefix_table[][4] = { { Bad_Opcode }, { VEX_LEN_TABLE (VEX_LEN_0F3ADF_P_2) }, }, + + /* PREFIX_VEX_0F3AF0 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3AF0_P_3) }, + }, }; static const struct dis386 x86_64_table[][2] = { @@ -5736,7 +5896,7 @@ static const struct dis386 three_byte_table[][256] = { /* 80 */ { PREFIX_TABLE (PREFIX_0F3880) }, { PREFIX_TABLE (PREFIX_0F3881) }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_0F3882) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -6485,7 +6645,7 @@ static const struct dis386 xop_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 10 */ - { "bextr", { Gv, Ev, Iq } }, + { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -7658,7 +7818,7 @@ static const struct dis386 vex_table[][256] = { { PREFIX_TABLE (PREFIX_VEX_0F3813) }, { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3816) }, { PREFIX_TABLE (PREFIX_VEX_0F3817) }, /* 18 */ { PREFIX_TABLE (PREFIX_VEX_0F3818) }, @@ -7694,7 +7854,7 @@ static const struct dis386 vex_table[][256] = { { PREFIX_TABLE (PREFIX_VEX_0F3833) }, { PREFIX_TABLE (PREFIX_VEX_0F3834) }, { PREFIX_TABLE (PREFIX_VEX_0F3835) }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3836) }, { PREFIX_TABLE (PREFIX_VEX_0F3837) }, /* 38 */ { PREFIX_TABLE (PREFIX_VEX_0F3838) }, @@ -7711,9 +7871,9 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3845) }, + { PREFIX_TABLE (PREFIX_VEX_0F3846) }, + { PREFIX_TABLE (PREFIX_VEX_0F3847) }, /* 48 */ { Bad_Opcode }, { Bad_Opcode }, @@ -7733,15 +7893,15 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 58 */ + { PREFIX_TABLE (PREFIX_VEX_0F3858) }, + { PREFIX_TABLE (PREFIX_VEX_0F3859) }, + { PREFIX_TABLE (PREFIX_VEX_0F385A) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - /* 60 */ + /* 60 */ { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -7769,8 +7929,8 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 78 */ - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3878) }, + { PREFIX_TABLE (PREFIX_VEX_0F3879) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -7791,15 +7951,15 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F388C) }, { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F388E) }, { Bad_Opcode }, /* 90 */ - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3890) }, + { PREFIX_TABLE (PREFIX_VEX_0F3891) }, + { PREFIX_TABLE (PREFIX_VEX_0F3892) }, + { PREFIX_TABLE (PREFIX_VEX_0F3893) }, { Bad_Opcode }, { Bad_Opcode }, { PREFIX_TABLE (PREFIX_VEX_0F3896) }, @@ -7909,8 +8069,8 @@ static const struct dis386 vex_table[][256] = { { PREFIX_TABLE (PREFIX_VEX_0F38F2) }, { REG_TABLE (REG_VEX_0F38F3) }, { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F38F5) }, + { PREFIX_TABLE (PREFIX_VEX_0F38F6) }, { PREFIX_TABLE (PREFIX_VEX_0F38F7) }, /* f8 */ { Bad_Opcode }, @@ -7925,9 +8085,9 @@ static const struct dis386 vex_table[][256] = { /* VEX_0F3A */ { /* 00 */ - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3A00) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A01) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A02) }, { Bad_Opcode }, { PREFIX_TABLE (PREFIX_VEX_0F3A04) }, { PREFIX_TABLE (PREFIX_VEX_0F3A05) }, @@ -7988,8 +8148,8 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 38 */ - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3A38) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A39) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -8003,7 +8163,7 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { PREFIX_TABLE (PREFIX_VEX_0F3A44) }, { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3A46) }, { Bad_Opcode }, /* 48 */ { PREFIX_TABLE (PREFIX_VEX_0F3A48) }, @@ -8195,7 +8355,7 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* f0 */ - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3AF0) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -8448,162 +8608,12 @@ static const struct dis386 vex_len_table[][2] = { { VEX_W_TABLE (VEX_W_0F5F_P_3) }, }, - /* VEX_LEN_0F60_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F60_P_2) }, - }, - - /* VEX_LEN_0F61_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F61_P_2) }, - }, - - /* VEX_LEN_0F62_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F62_P_2) }, - }, - - /* VEX_LEN_0F63_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F63_P_2) }, - }, - - /* VEX_LEN_0F64_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F64_P_2) }, - }, - - /* VEX_LEN_0F65_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F65_P_2) }, - }, - - /* VEX_LEN_0F66_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F66_P_2) }, - }, - - /* VEX_LEN_0F67_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F67_P_2) }, - }, - - /* VEX_LEN_0F68_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F68_P_2) }, - }, - - /* VEX_LEN_0F69_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F69_P_2) }, - }, - - /* VEX_LEN_0F6A_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F6A_P_2) }, - }, - - /* VEX_LEN_0F6B_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F6B_P_2) }, - }, - - /* VEX_LEN_0F6C_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F6C_P_2) }, - }, - - /* VEX_LEN_0F6D_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F6D_P_2) }, - }, - /* VEX_LEN_0F6E_P_2 */ { { "vmovK", { XMScalar, Edq } }, { "vmovK", { XMScalar, Edq } }, }, - /* VEX_LEN_0F70_P_1 */ - { - { VEX_W_TABLE (VEX_W_0F70_P_1) }, - }, - - /* VEX_LEN_0F70_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F70_P_2) }, - }, - - /* VEX_LEN_0F70_P_3 */ - { - { VEX_W_TABLE (VEX_W_0F70_P_3) }, - }, - - /* VEX_LEN_0F71_R_2_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F71_R_2_P_2) }, - }, - - /* VEX_LEN_0F71_R_4_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F71_R_4_P_2) }, - }, - - /* VEX_LEN_0F71_R_6_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F71_R_6_P_2) }, - }, - - /* VEX_LEN_0F72_R_2_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F72_R_2_P_2) }, - }, - - /* VEX_LEN_0F72_R_4_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F72_R_4_P_2) }, - }, - - /* VEX_LEN_0F72_R_6_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F72_R_6_P_2) }, - }, - - /* VEX_LEN_0F73_R_2_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F73_R_2_P_2) }, - }, - - /* VEX_LEN_0F73_R_3_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F73_R_3_P_2) }, - }, - - /* VEX_LEN_0F73_R_6_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F73_R_6_P_2) }, - }, - - /* VEX_LEN_0F73_R_7_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F73_R_7_P_2) }, - }, - - /* VEX_LEN_0F74_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F74_P_2) }, - }, - - /* VEX_LEN_0F75_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F75_P_2) }, - }, - - /* VEX_LEN_0F76_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F76_P_2) }, - }, - /* VEX_LEN_0F7E_P_1 */ { { VEX_W_TABLE (VEX_W_0F7E_P_1) }, @@ -8632,453 +8642,55 @@ static const struct dis386 vex_len_table[][2] = { { VEX_W_TABLE (VEX_W_0FC2_P_1) }, }, - /* VEX_LEN_0FC2_P_3 */ - { - { VEX_W_TABLE (VEX_W_0FC2_P_3) }, - { VEX_W_TABLE (VEX_W_0FC2_P_3) }, - }, - - /* VEX_LEN_0FC4_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FC4_P_2) }, - }, - - /* VEX_LEN_0FC5_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FC5_P_2) }, - }, - - /* VEX_LEN_0FD1_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FD1_P_2) }, - }, - - /* VEX_LEN_0FD2_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FD2_P_2) }, - }, - - /* VEX_LEN_0FD3_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FD3_P_2) }, - }, - - /* VEX_LEN_0FD4_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FD4_P_2) }, - }, - - /* VEX_LEN_0FD5_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FD5_P_2) }, - }, - - /* VEX_LEN_0FD6_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FD6_P_2) }, - { VEX_W_TABLE (VEX_W_0FD6_P_2) }, - }, - - /* VEX_LEN_0FD7_P_2_M_1 */ - { - { VEX_W_TABLE (VEX_W_0FD7_P_2_M_1) }, - }, - - /* VEX_LEN_0FD8_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FD8_P_2) }, - }, - - /* VEX_LEN_0FD9_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FD9_P_2) }, - }, - - /* VEX_LEN_0FDA_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FDA_P_2) }, - }, - - /* VEX_LEN_0FDB_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FDB_P_2) }, - }, - - /* VEX_LEN_0FDC_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FDC_P_2) }, - }, - - /* VEX_LEN_0FDD_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FDD_P_2) }, - }, - - /* VEX_LEN_0FDE_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FDE_P_2) }, - }, - - /* VEX_LEN_0FDF_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FDF_P_2) }, - }, - - /* VEX_LEN_0FE0_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FE0_P_2) }, - }, - - /* VEX_LEN_0FE1_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FE1_P_2) }, - }, - - /* VEX_LEN_0FE2_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FE2_P_2) }, - }, - - /* VEX_LEN_0FE3_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FE3_P_2) }, - }, - - /* VEX_LEN_0FE4_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FE4_P_2) }, - }, - - /* VEX_LEN_0FE5_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FE5_P_2) }, - }, - - /* VEX_LEN_0FE8_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FE8_P_2) }, - }, - - /* VEX_LEN_0FE9_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FE9_P_2) }, - }, - - /* VEX_LEN_0FEA_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FEA_P_2) }, - }, - - /* VEX_LEN_0FEB_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FEB_P_2) }, - }, - - /* VEX_LEN_0FEC_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FEC_P_2) }, - }, - - /* VEX_LEN_0FED_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FED_P_2) }, - }, - - /* VEX_LEN_0FEE_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FEE_P_2) }, - }, - - /* VEX_LEN_0FEF_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FEF_P_2) }, - }, - - /* VEX_LEN_0FF1_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FF1_P_2) }, - }, - - /* VEX_LEN_0FF2_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FF2_P_2) }, - }, - - /* VEX_LEN_0FF3_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FF3_P_2) }, - }, - - /* VEX_LEN_0FF4_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FF4_P_2) }, - }, - - /* VEX_LEN_0FF5_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FF5_P_2) }, - }, - - /* VEX_LEN_0FF6_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FF6_P_2) }, - }, - - /* VEX_LEN_0FF7_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FF7_P_2) }, - }, - - /* VEX_LEN_0FF8_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FF8_P_2) }, - }, - - /* VEX_LEN_0FF9_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FF9_P_2) }, - }, - - /* VEX_LEN_0FFA_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FFA_P_2) }, - }, - - /* VEX_LEN_0FFB_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FFB_P_2) }, - }, - - /* VEX_LEN_0FFC_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FFC_P_2) }, - }, - - /* VEX_LEN_0FFD_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FFD_P_2) }, - }, - - /* VEX_LEN_0FFE_P_2 */ - { - { VEX_W_TABLE (VEX_W_0FFE_P_2) }, - }, - - /* VEX_LEN_0F3800_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3800_P_2) }, - }, - - /* VEX_LEN_0F3801_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3801_P_2) }, - }, - - /* VEX_LEN_0F3802_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3802_P_2) }, - }, - - /* VEX_LEN_0F3803_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3803_P_2) }, - }, - - /* VEX_LEN_0F3804_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3804_P_2) }, - }, - - /* VEX_LEN_0F3805_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3805_P_2) }, - }, - - /* VEX_LEN_0F3806_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3806_P_2) }, - }, - - /* VEX_LEN_0F3807_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3807_P_2) }, - }, - - /* VEX_LEN_0F3808_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3808_P_2) }, - }, - - /* VEX_LEN_0F3809_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3809_P_2) }, - }, - - /* VEX_LEN_0F380A_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F380A_P_2) }, - }, - - /* VEX_LEN_0F380B_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F380B_P_2) }, - }, - - /* VEX_LEN_0F3819_P_2_M_0 */ - { - { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_0F3819_P_2_M_0) }, - }, - - /* VEX_LEN_0F381A_P_2_M_0 */ - { - { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_0F381A_P_2_M_0) }, - }, - - /* VEX_LEN_0F381C_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F381C_P_2) }, - }, - - /* VEX_LEN_0F381D_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F381D_P_2) }, - }, - - /* VEX_LEN_0F381E_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F381E_P_2) }, - }, - - /* VEX_LEN_0F3820_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3820_P_2) }, - }, - - /* VEX_LEN_0F3821_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3821_P_2) }, - }, - - /* VEX_LEN_0F3822_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3822_P_2) }, - }, - - /* VEX_LEN_0F3823_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3823_P_2) }, - }, - - /* VEX_LEN_0F3824_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3824_P_2) }, - }, - - /* VEX_LEN_0F3825_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3825_P_2) }, - }, - - /* VEX_LEN_0F3828_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3828_P_2) }, - }, - - /* VEX_LEN_0F3829_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3829_P_2) }, - }, - - /* VEX_LEN_0F382A_P_2_M_0 */ - { - { VEX_W_TABLE (VEX_W_0F382A_P_2_M_0) }, - }, - - /* VEX_LEN_0F382B_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F382B_P_2) }, - }, - - /* VEX_LEN_0F3830_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3830_P_2) }, - }, - - /* VEX_LEN_0F3831_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3831_P_2) }, - }, - - /* VEX_LEN_0F3832_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3832_P_2) }, - }, - - /* VEX_LEN_0F3833_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3833_P_2) }, - }, - - /* VEX_LEN_0F3834_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3834_P_2) }, - }, - - /* VEX_LEN_0F3835_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3835_P_2) }, - }, - - /* VEX_LEN_0F3837_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3837_P_2) }, - }, - - /* VEX_LEN_0F3838_P_2 */ + /* VEX_LEN_0FC2_P_3 */ { - { VEX_W_TABLE (VEX_W_0F3838_P_2) }, + { VEX_W_TABLE (VEX_W_0FC2_P_3) }, + { VEX_W_TABLE (VEX_W_0FC2_P_3) }, }, - /* VEX_LEN_0F3839_P_2 */ + /* VEX_LEN_0FC4_P_2 */ { - { VEX_W_TABLE (VEX_W_0F3839_P_2) }, + { VEX_W_TABLE (VEX_W_0FC4_P_2) }, }, - /* VEX_LEN_0F383A_P_2 */ + /* VEX_LEN_0FC5_P_2 */ { - { VEX_W_TABLE (VEX_W_0F383A_P_2) }, + { VEX_W_TABLE (VEX_W_0FC5_P_2) }, }, - /* VEX_LEN_0F383B_P_2 */ + /* VEX_LEN_0FD6_P_2 */ { - { VEX_W_TABLE (VEX_W_0F383B_P_2) }, + { VEX_W_TABLE (VEX_W_0FD6_P_2) }, + { VEX_W_TABLE (VEX_W_0FD6_P_2) }, }, - /* VEX_LEN_0F383C_P_2 */ + /* VEX_LEN_0FF7_P_2 */ { - { VEX_W_TABLE (VEX_W_0F383C_P_2) }, + { VEX_W_TABLE (VEX_W_0FF7_P_2) }, }, - /* VEX_LEN_0F383D_P_2 */ + /* VEX_LEN_0F3816_P_2 */ { - { VEX_W_TABLE (VEX_W_0F383D_P_2) }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3816_P_2) }, }, - /* VEX_LEN_0F383E_P_2 */ + /* VEX_LEN_0F3819_P_2 */ { - { VEX_W_TABLE (VEX_W_0F383E_P_2) }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3819_P_2) }, }, - /* VEX_LEN_0F383F_P_2 */ + /* VEX_LEN_0F381A_P_2_M_0 */ { - { VEX_W_TABLE (VEX_W_0F383F_P_2) }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F381A_P_2_M_0) }, }, - /* VEX_LEN_0F3840_P_2 */ + /* VEX_LEN_0F3836_P_2 */ { - { VEX_W_TABLE (VEX_W_0F3840_P_2) }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3836_P_2) }, }, /* VEX_LEN_0F3841_P_2 */ @@ -9086,6 +8698,12 @@ static const struct dis386 vex_len_table[][2] = { { VEX_W_TABLE (VEX_W_0F3841_P_2) }, }, + /* VEX_LEN_0F385A_P_2_M_0 */ + { + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F385A_P_2_M_0) }, + }, + /* VEX_LEN_0F38DB_P_2 */ { { VEX_W_TABLE (VEX_W_0F38DB_P_2) }, @@ -9131,11 +8749,58 @@ static const struct dis386 vex_len_table[][2] = { { "blsiS", { VexGdq, Edq } }, }, + /* VEX_LEN_0F38F5_P_0 */ + { + { "bzhiS", { Gdq, Edq, VexGdq } }, + }, + + /* VEX_LEN_0F38F5_P_1 */ + { + { "pextS", { Gdq, VexGdq, Edq } }, + }, + + /* VEX_LEN_0F38F5_P_3 */ + { + { "pdepS", { Gdq, VexGdq, Edq } }, + }, + + /* VEX_LEN_0F38F6_P_3 */ + { + { "mulxS", { Gdq, VexGdq, Edq } }, + }, + /* VEX_LEN_0F38F7_P_0 */ { { "bextrS", { Gdq, Edq, VexGdq } }, }, + /* VEX_LEN_0F38F7_P_1 */ + { + { "sarxS", { Gdq, Edq, VexGdq } }, + }, + + /* VEX_LEN_0F38F7_P_2 */ + { + { "shlxS", { Gdq, Edq, VexGdq } }, + }, + + /* VEX_LEN_0F38F7_P_3 */ + { + { "shrxS", { Gdq, Edq, VexGdq } }, + }, + + /* VEX_LEN_0F3A00_P_2 */ + { + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3A00_P_2) }, + }, + + /* VEX_LEN_0F3A01_P_2 */ + { + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3A01_P_2) }, + }, + /* VEX_LEN_0F3A06_P_2 */ { { Bad_Opcode }, @@ -9154,16 +8819,6 @@ static const struct dis386 vex_len_table[][2] = { { VEX_W_TABLE (VEX_W_0F3A0B_P_2) }, }, - /* VEX_LEN_0F3A0E_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3A0E_P_2) }, - }, - - /* VEX_LEN_0F3A0F_P_2 */ - { - { VEX_W_TABLE (VEX_W_0F3A0F_P_2) }, - }, - /* VEX_LEN_0F3A14_P_2 */ { { VEX_W_TABLE (VEX_W_0F3A14_P_2) }, @@ -9211,14 +8866,21 @@ static const struct dis386 vex_len_table[][2] = { { "vpinsrK", { XM, Vex128, Edq, Ib } }, }, - /* VEX_LEN_0F3A41_P_2 */ + /* VEX_LEN_0F3A38_P_2 */ { - { VEX_W_TABLE (VEX_W_0F3A41_P_2) }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3A38_P_2) }, }, - /* VEX_LEN_0F3A42_P_2 */ + /* VEX_LEN_0F3A39_P_2 */ { - { VEX_W_TABLE (VEX_W_0F3A42_P_2) }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3A39_P_2) }, + }, + + /* VEX_LEN_0F3A41_P_2 */ + { + { VEX_W_TABLE (VEX_W_0F3A41_P_2) }, }, /* VEX_LEN_0F3A44_P_2 */ @@ -9226,9 +8888,10 @@ static const struct dis386 vex_len_table[][2] = { { VEX_W_TABLE (VEX_W_0F3A44_P_2) }, }, - /* VEX_LEN_0F3A4C_P_2 */ + /* VEX_LEN_0F3A46_P_2 */ { - { VEX_W_TABLE (VEX_W_0F3A4C_P_2) }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3A46_P_2) }, }, /* VEX_LEN_0F3A60_P_2 */ @@ -9296,6 +8959,11 @@ static const struct dis386 vex_len_table[][2] = { { VEX_W_TABLE (VEX_W_0F3ADF_P_2) }, }, + /* VEX_LEN_0F3AF0_P_3 */ + { + { "rorxS", { Gdq, Edq, Ib } }, + }, + /* VEX_LEN_0FXOP_09_80 */ { { "vfrczps", { XM, EXxmm } }, @@ -9580,59 +9248,59 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F60_P_2 */ - { "vpunpcklbw", { XM, Vex128, EXx } }, + { "vpunpcklbw", { XM, Vex, EXx } }, }, { /* VEX_W_0F61_P_2 */ - { "vpunpcklwd", { XM, Vex128, EXx } }, + { "vpunpcklwd", { XM, Vex, EXx } }, }, { /* VEX_W_0F62_P_2 */ - { "vpunpckldq", { XM, Vex128, EXx } }, + { "vpunpckldq", { XM, Vex, EXx } }, }, { /* VEX_W_0F63_P_2 */ - { "vpacksswb", { XM, Vex128, EXx } }, + { "vpacksswb", { XM, Vex, EXx } }, }, { /* VEX_W_0F64_P_2 */ - { "vpcmpgtb", { XM, Vex128, EXx } }, + { "vpcmpgtb", { XM, Vex, EXx } }, }, { /* VEX_W_0F65_P_2 */ - { "vpcmpgtw", { XM, Vex128, EXx } }, + { "vpcmpgtw", { XM, Vex, EXx } }, }, { /* VEX_W_0F66_P_2 */ - { "vpcmpgtd", { XM, Vex128, EXx } }, + { "vpcmpgtd", { XM, Vex, EXx } }, }, { /* VEX_W_0F67_P_2 */ - { "vpackuswb", { XM, Vex128, EXx } }, + { "vpackuswb", { XM, Vex, EXx } }, }, { /* VEX_W_0F68_P_2 */ - { "vpunpckhbw", { XM, Vex128, EXx } }, + { "vpunpckhbw", { XM, Vex, EXx } }, }, { /* VEX_W_0F69_P_2 */ - { "vpunpckhwd", { XM, Vex128, EXx } }, + { "vpunpckhwd", { XM, Vex, EXx } }, }, { /* VEX_W_0F6A_P_2 */ - { "vpunpckhdq", { XM, Vex128, EXx } }, + { "vpunpckhdq", { XM, Vex, EXx } }, }, { /* VEX_W_0F6B_P_2 */ - { "vpackssdw", { XM, Vex128, EXx } }, + { "vpackssdw", { XM, Vex, EXx } }, }, { /* VEX_W_0F6C_P_2 */ - { "vpunpcklqdq", { XM, Vex128, EXx } }, + { "vpunpcklqdq", { XM, Vex, EXx } }, }, { /* VEX_W_0F6D_P_2 */ - { "vpunpckhqdq", { XM, Vex128, EXx } }, + { "vpunpckhqdq", { XM, Vex, EXx } }, }, { /* VEX_W_0F6F_P_1 */ @@ -9656,55 +9324,55 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F71_R_2_P_2 */ - { "vpsrlw", { Vex128, XS, Ib } }, + { "vpsrlw", { Vex, XS, Ib } }, }, { /* VEX_W_0F71_R_4_P_2 */ - { "vpsraw", { Vex128, XS, Ib } }, + { "vpsraw", { Vex, XS, Ib } }, }, { /* VEX_W_0F71_R_6_P_2 */ - { "vpsllw", { Vex128, XS, Ib } }, + { "vpsllw", { Vex, XS, Ib } }, }, { /* VEX_W_0F72_R_2_P_2 */ - { "vpsrld", { Vex128, XS, Ib } }, + { "vpsrld", { Vex, XS, Ib } }, }, { /* VEX_W_0F72_R_4_P_2 */ - { "vpsrad", { Vex128, XS, Ib } }, + { "vpsrad", { Vex, XS, Ib } }, }, { /* VEX_W_0F72_R_6_P_2 */ - { "vpslld", { Vex128, XS, Ib } }, + { "vpslld", { Vex, XS, Ib } }, }, { /* VEX_W_0F73_R_2_P_2 */ - { "vpsrlq", { Vex128, XS, Ib } }, + { "vpsrlq", { Vex, XS, Ib } }, }, { /* VEX_W_0F73_R_3_P_2 */ - { "vpsrldq", { Vex128, XS, Ib } }, + { "vpsrldq", { Vex, XS, Ib } }, }, { /* VEX_W_0F73_R_6_P_2 */ - { "vpsllq", { Vex128, XS, Ib } }, + { "vpsllq", { Vex, XS, Ib } }, }, { /* VEX_W_0F73_R_7_P_2 */ - { "vpslldq", { Vex128, XS, Ib } }, + { "vpslldq", { Vex, XS, Ib } }, }, { /* VEX_W_0F74_P_2 */ - { "vpcmpeqb", { XM, Vex128, EXx } }, + { "vpcmpeqb", { XM, Vex, EXx } }, }, { /* VEX_W_0F75_P_2 */ - { "vpcmpeqw", { XM, Vex128, EXx } }, + { "vpcmpeqw", { XM, Vex, EXx } }, }, { /* VEX_W_0F76_P_2 */ - { "vpcmpeqd", { XM, Vex128, EXx } }, + { "vpcmpeqd", { XM, Vex, EXx } }, }, { /* VEX_W_0F77_P_0 */ @@ -9780,23 +9448,23 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0FD1_P_2 */ - { "vpsrlw", { XM, Vex128, EXx } }, + { "vpsrlw", { XM, Vex, EXxmm } }, }, { /* VEX_W_0FD2_P_2 */ - { "vpsrld", { XM, Vex128, EXx } }, + { "vpsrld", { XM, Vex, EXxmm } }, }, { /* VEX_W_0FD3_P_2 */ - { "vpsrlq", { XM, Vex128, EXx } }, + { "vpsrlq", { XM, Vex, EXxmm } }, }, { /* VEX_W_0FD4_P_2 */ - { "vpaddq", { XM, Vex128, EXx } }, + { "vpaddq", { XM, Vex, EXx } }, }, { /* VEX_W_0FD5_P_2 */ - { "vpmullw", { XM, Vex128, EXx } }, + { "vpmullw", { XM, Vex, EXx } }, }, { /* VEX_W_0FD6_P_2 */ @@ -9808,59 +9476,59 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0FD8_P_2 */ - { "vpsubusb", { XM, Vex128, EXx } }, + { "vpsubusb", { XM, Vex, EXx } }, }, { /* VEX_W_0FD9_P_2 */ - { "vpsubusw", { XM, Vex128, EXx } }, + { "vpsubusw", { XM, Vex, EXx } }, }, { /* VEX_W_0FDA_P_2 */ - { "vpminub", { XM, Vex128, EXx } }, + { "vpminub", { XM, Vex, EXx } }, }, { /* VEX_W_0FDB_P_2 */ - { "vpand", { XM, Vex128, EXx } }, + { "vpand", { XM, Vex, EXx } }, }, { /* VEX_W_0FDC_P_2 */ - { "vpaddusb", { XM, Vex128, EXx } }, + { "vpaddusb", { XM, Vex, EXx } }, }, { /* VEX_W_0FDD_P_2 */ - { "vpaddusw", { XM, Vex128, EXx } }, + { "vpaddusw", { XM, Vex, EXx } }, }, { /* VEX_W_0FDE_P_2 */ - { "vpmaxub", { XM, Vex128, EXx } }, + { "vpmaxub", { XM, Vex, EXx } }, }, { /* VEX_W_0FDF_P_2 */ - { "vpandn", { XM, Vex128, EXx } }, + { "vpandn", { XM, Vex, EXx } }, }, { /* VEX_W_0FE0_P_2 */ - { "vpavgb", { XM, Vex128, EXx } }, + { "vpavgb", { XM, Vex, EXx } }, }, { /* VEX_W_0FE1_P_2 */ - { "vpsraw", { XM, Vex128, EXx } }, + { "vpsraw", { XM, Vex, EXxmm } }, }, { /* VEX_W_0FE2_P_2 */ - { "vpsrad", { XM, Vex128, EXx } }, + { "vpsrad", { XM, Vex, EXxmm } }, }, { /* VEX_W_0FE3_P_2 */ - { "vpavgw", { XM, Vex128, EXx } }, + { "vpavgw", { XM, Vex, EXx } }, }, { /* VEX_W_0FE4_P_2 */ - { "vpmulhuw", { XM, Vex128, EXx } }, + { "vpmulhuw", { XM, Vex, EXx } }, }, { /* VEX_W_0FE5_P_2 */ - { "vpmulhw", { XM, Vex128, EXx } }, + { "vpmulhw", { XM, Vex, EXx } }, }, { /* VEX_W_0FE6_P_1 */ @@ -9880,35 +9548,35 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0FE8_P_2 */ - { "vpsubsb", { XM, Vex128, EXx } }, + { "vpsubsb", { XM, Vex, EXx } }, }, { /* VEX_W_0FE9_P_2 */ - { "vpsubsw", { XM, Vex128, EXx } }, + { "vpsubsw", { XM, Vex, EXx } }, }, { /* VEX_W_0FEA_P_2 */ - { "vpminsw", { XM, Vex128, EXx } }, + { "vpminsw", { XM, Vex, EXx } }, }, { /* VEX_W_0FEB_P_2 */ - { "vpor", { XM, Vex128, EXx } }, + { "vpor", { XM, Vex, EXx } }, }, { /* VEX_W_0FEC_P_2 */ - { "vpaddsb", { XM, Vex128, EXx } }, + { "vpaddsb", { XM, Vex, EXx } }, }, { /* VEX_W_0FED_P_2 */ - { "vpaddsw", { XM, Vex128, EXx } }, + { "vpaddsw", { XM, Vex, EXx } }, }, { /* VEX_W_0FEE_P_2 */ - { "vpmaxsw", { XM, Vex128, EXx } }, + { "vpmaxsw", { XM, Vex, EXx } }, }, { /* VEX_W_0FEF_P_2 */ - { "vpxor", { XM, Vex128, EXx } }, + { "vpxor", { XM, Vex, EXx } }, }, { /* VEX_W_0FF0_P_3_M_0 */ @@ -9916,27 +9584,27 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0FF1_P_2 */ - { "vpsllw", { XM, Vex128, EXx } }, + { "vpsllw", { XM, Vex, EXxmm } }, }, { /* VEX_W_0FF2_P_2 */ - { "vpslld", { XM, Vex128, EXx } }, + { "vpslld", { XM, Vex, EXxmm } }, }, { /* VEX_W_0FF3_P_2 */ - { "vpsllq", { XM, Vex128, EXx } }, + { "vpsllq", { XM, Vex, EXxmm } }, }, { /* VEX_W_0FF4_P_2 */ - { "vpmuludq", { XM, Vex128, EXx } }, + { "vpmuludq", { XM, Vex, EXx } }, }, { /* VEX_W_0FF5_P_2 */ - { "vpmaddwd", { XM, Vex128, EXx } }, + { "vpmaddwd", { XM, Vex, EXx } }, }, { /* VEX_W_0FF6_P_2 */ - { "vpsadbw", { XM, Vex128, EXx } }, + { "vpsadbw", { XM, Vex, EXx } }, }, { /* VEX_W_0FF7_P_2 */ @@ -9944,79 +9612,79 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0FF8_P_2 */ - { "vpsubb", { XM, Vex128, EXx } }, + { "vpsubb", { XM, Vex, EXx } }, }, { /* VEX_W_0FF9_P_2 */ - { "vpsubw", { XM, Vex128, EXx } }, + { "vpsubw", { XM, Vex, EXx } }, }, { /* VEX_W_0FFA_P_2 */ - { "vpsubd", { XM, Vex128, EXx } }, + { "vpsubd", { XM, Vex, EXx } }, }, { /* VEX_W_0FFB_P_2 */ - { "vpsubq", { XM, Vex128, EXx } }, + { "vpsubq", { XM, Vex, EXx } }, }, { /* VEX_W_0FFC_P_2 */ - { "vpaddb", { XM, Vex128, EXx } }, + { "vpaddb", { XM, Vex, EXx } }, }, { /* VEX_W_0FFD_P_2 */ - { "vpaddw", { XM, Vex128, EXx } }, + { "vpaddw", { XM, Vex, EXx } }, }, { /* VEX_W_0FFE_P_2 */ - { "vpaddd", { XM, Vex128, EXx } }, + { "vpaddd", { XM, Vex, EXx } }, }, { /* VEX_W_0F3800_P_2 */ - { "vpshufb", { XM, Vex128, EXx } }, + { "vpshufb", { XM, Vex, EXx } }, }, { /* VEX_W_0F3801_P_2 */ - { "vphaddw", { XM, Vex128, EXx } }, + { "vphaddw", { XM, Vex, EXx } }, }, { /* VEX_W_0F3802_P_2 */ - { "vphaddd", { XM, Vex128, EXx } }, + { "vphaddd", { XM, Vex, EXx } }, }, { /* VEX_W_0F3803_P_2 */ - { "vphaddsw", { XM, Vex128, EXx } }, + { "vphaddsw", { XM, Vex, EXx } }, }, { /* VEX_W_0F3804_P_2 */ - { "vpmaddubsw", { XM, Vex128, EXx } }, + { "vpmaddubsw", { XM, Vex, EXx } }, }, { /* VEX_W_0F3805_P_2 */ - { "vphsubw", { XM, Vex128, EXx } }, + { "vphsubw", { XM, Vex, EXx } }, }, { /* VEX_W_0F3806_P_2 */ - { "vphsubd", { XM, Vex128, EXx } }, + { "vphsubd", { XM, Vex, EXx } }, }, { /* VEX_W_0F3807_P_2 */ - { "vphsubsw", { XM, Vex128, EXx } }, + { "vphsubsw", { XM, Vex, EXx } }, }, { /* VEX_W_0F3808_P_2 */ - { "vpsignb", { XM, Vex128, EXx } }, + { "vpsignb", { XM, Vex, EXx } }, }, { /* VEX_W_0F3809_P_2 */ - { "vpsignw", { XM, Vex128, EXx } }, + { "vpsignw", { XM, Vex, EXx } }, }, { /* VEX_W_0F380A_P_2 */ - { "vpsignd", { XM, Vex128, EXx } }, + { "vpsignd", { XM, Vex, EXx } }, }, { /* VEX_W_0F380B_P_2 */ - { "vpmulhrsw", { XM, Vex128, EXx } }, + { "vpmulhrsw", { XM, Vex, EXx } }, }, { /* VEX_W_0F380C_P_2 */ @@ -10035,16 +9703,20 @@ static const struct dis386 vex_w_table[][2] = { { "vtestpd", { XM, EXx } }, }, { + /* VEX_W_0F3816_P_2 */ + { "vpermps", { XM, Vex, EXx } }, + }, + { /* VEX_W_0F3817_P_2 */ { "vptest", { XM, EXx } }, }, { - /* VEX_W_0F3818_P_2_M_0 */ - { "vbroadcastss", { XM, Md } }, + /* VEX_W_0F3818_P_2 */ + { "vbroadcastss", { XM, EXxmm_md } }, }, { - /* VEX_W_0F3819_P_2_M_0 */ - { "vbroadcastsd", { XM, Mq } }, + /* VEX_W_0F3819_P_2 */ + { "vbroadcastsd", { XM, EXxmm_mq } }, }, { /* VEX_W_0F381A_P_2_M_0 */ @@ -10064,35 +9736,35 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F3820_P_2 */ - { "vpmovsxbw", { XM, EXq } }, + { "vpmovsxbw", { XM, EXxmmq } }, }, { /* VEX_W_0F3821_P_2 */ - { "vpmovsxbd", { XM, EXd } }, + { "vpmovsxbd", { XM, EXxmmqd } }, }, { /* VEX_W_0F3822_P_2 */ - { "vpmovsxbq", { XM, EXw } }, + { "vpmovsxbq", { XM, EXxmmdw } }, }, { /* VEX_W_0F3823_P_2 */ - { "vpmovsxwd", { XM, EXq } }, + { "vpmovsxwd", { XM, EXxmmq } }, }, { /* VEX_W_0F3824_P_2 */ - { "vpmovsxwq", { XM, EXd } }, + { "vpmovsxwq", { XM, EXxmmqd } }, }, { /* VEX_W_0F3825_P_2 */ - { "vpmovsxdq", { XM, EXq } }, + { "vpmovsxdq", { XM, EXxmmq } }, }, { /* VEX_W_0F3828_P_2 */ - { "vpmuldq", { XM, Vex128, EXx } }, + { "vpmuldq", { XM, Vex, EXx } }, }, { /* VEX_W_0F3829_P_2 */ - { "vpcmpeqq", { XM, Vex128, EXx } }, + { "vpcmpeqq", { XM, Vex, EXx } }, }, { /* VEX_W_0F382A_P_2_M_0 */ @@ -10100,7 +9772,7 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F382B_P_2 */ - { "vpackusdw", { XM, Vex128, EXx } }, + { "vpackusdw", { XM, Vex, EXx } }, }, { /* VEX_W_0F382C_P_2_M_0 */ @@ -10120,73 +9792,101 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F3830_P_2 */ - { "vpmovzxbw", { XM, EXq } }, + { "vpmovzxbw", { XM, EXxmmq } }, }, { /* VEX_W_0F3831_P_2 */ - { "vpmovzxbd", { XM, EXd } }, + { "vpmovzxbd", { XM, EXxmmqd } }, }, { /* VEX_W_0F3832_P_2 */ - { "vpmovzxbq", { XM, EXw } }, + { "vpmovzxbq", { XM, EXxmmdw } }, }, { /* VEX_W_0F3833_P_2 */ - { "vpmovzxwd", { XM, EXq } }, + { "vpmovzxwd", { XM, EXxmmq } }, }, { /* VEX_W_0F3834_P_2 */ - { "vpmovzxwq", { XM, EXd } }, + { "vpmovzxwq", { XM, EXxmmqd } }, }, { /* VEX_W_0F3835_P_2 */ - { "vpmovzxdq", { XM, EXq } }, + { "vpmovzxdq", { XM, EXxmmq } }, + }, + { + /* VEX_W_0F3836_P_2 */ + { "vpermd", { XM, Vex, EXx } }, }, { /* VEX_W_0F3837_P_2 */ - { "vpcmpgtq", { XM, Vex128, EXx } }, + { "vpcmpgtq", { XM, Vex, EXx } }, }, { /* VEX_W_0F3838_P_2 */ - { "vpminsb", { XM, Vex128, EXx } }, + { "vpminsb", { XM, Vex, EXx } }, }, { /* VEX_W_0F3839_P_2 */ - { "vpminsd", { XM, Vex128, EXx } }, + { "vpminsd", { XM, Vex, EXx } }, }, { /* VEX_W_0F383A_P_2 */ - { "vpminuw", { XM, Vex128, EXx } }, + { "vpminuw", { XM, Vex, EXx } }, }, { /* VEX_W_0F383B_P_2 */ - { "vpminud", { XM, Vex128, EXx } }, + { "vpminud", { XM, Vex, EXx } }, }, { /* VEX_W_0F383C_P_2 */ - { "vpmaxsb", { XM, Vex128, EXx } }, + { "vpmaxsb", { XM, Vex, EXx } }, }, { /* VEX_W_0F383D_P_2 */ - { "vpmaxsd", { XM, Vex128, EXx } }, + { "vpmaxsd", { XM, Vex, EXx } }, }, { /* VEX_W_0F383E_P_2 */ - { "vpmaxuw", { XM, Vex128, EXx } }, + { "vpmaxuw", { XM, Vex, EXx } }, }, { /* VEX_W_0F383F_P_2 */ - { "vpmaxud", { XM, Vex128, EXx } }, + { "vpmaxud", { XM, Vex, EXx } }, }, { /* VEX_W_0F3840_P_2 */ - { "vpmulld", { XM, Vex128, EXx } }, + { "vpmulld", { XM, Vex, EXx } }, }, { /* VEX_W_0F3841_P_2 */ { "vphminposuw", { XM, EXx } }, }, { + /* VEX_W_0F3846_P_2 */ + { "vpsravd", { XM, Vex, EXx } }, + }, + { + /* VEX_W_0F3858_P_2 */ + { "vpbroadcastd", { XM, EXxmm_md } }, + }, + { + /* VEX_W_0F3859_P_2 */ + { "vpbroadcastq", { XM, EXxmm_mq } }, + }, + { + /* VEX_W_0F385A_P_2_M_0 */ + { "vbroadcasti128", { XM, Mxmm } }, + }, + { + /* VEX_W_0F3878_P_2 */ + { "vpbroadcastb", { XM, EXxmm_mb } }, + }, + { + /* VEX_W_0F3879_P_2 */ + { "vpbroadcastw", { XM, EXxmm_mw } }, + }, + { /* VEX_W_0F38DB_P_2 */ { "vaesimc", { XM, EXx } }, }, @@ -10207,6 +9907,20 @@ static const struct dis386 vex_w_table[][2] = { { "vaesdeclast", { XM, Vex128, EXx } }, }, { + /* VEX_W_0F3A00_P_2 */ + { Bad_Opcode }, + { "vpermq", { XM, EXx, Ib } }, + }, + { + /* VEX_W_0F3A01_P_2 */ + { Bad_Opcode }, + { "vpermpd", { XM, EXx, Ib } }, + }, + { + /* VEX_W_0F3A02_P_2 */ + { "vpblendd", { XM, Vex, EXx, Ib } }, + }, + { /* VEX_W_0F3A04_P_2 */ { "vpermilps", { XM, EXx, Ib } }, }, @@ -10244,11 +9958,11 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F3A0E_P_2 */ - { "vpblendw", { XM, Vex128, EXx, Ib } }, + { "vpblendw", { XM, Vex, EXx, Ib } }, }, { /* VEX_W_0F3A0F_P_2 */ - { "vpalignr", { XM, Vex128, EXx, Ib } }, + { "vpalignr", { XM, Vex, EXx, Ib } }, }, { /* VEX_W_0F3A14_P_2 */ @@ -10275,6 +9989,14 @@ static const struct dis386 vex_w_table[][2] = { { "vinsertps", { XM, Vex128, EXd, Ib } }, }, { + /* VEX_W_0F3A38_P_2 */ + { "vinserti128", { XM, Vex256, EXxmm, Ib } }, + }, + { + /* VEX_W_0F3A39_P_2 */ + { "vextracti128", { EXxmm, XM, Ib } }, + }, + { /* VEX_W_0F3A40_P_2 */ { "vdpps", { XM, Vex, EXx, Ib } }, }, @@ -10284,13 +10006,17 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F3A42_P_2 */ - { "vmpsadbw", { XM, Vex128, EXx, Ib } }, + { "vmpsadbw", { XM, Vex, EXx, Ib } }, }, { /* VEX_W_0F3A44_P_2 */ { "vpclmulqdq", { XM, Vex128, EXx, PCLMUL } }, }, { + /* VEX_W_0F3A46_P_2 */ + { "vperm2i128", { XM, Vex256, EXx, Ib } }, + }, + { /* VEX_W_0F3A48_P_2 */ { "vpermil2ps", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW } }, { "vpermil2ps", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW } }, @@ -10310,7 +10036,7 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F3A4C_P_2 */ - { "vpblendvb", { XM, Vex128, EXx, XMVexI4 } }, + { "vpblendvb", { XM, Vex, EXx, XMVexI4 } }, }, { /* VEX_W_0F3A60_P_2 */ @@ -10678,7 +10404,7 @@ static const struct dis386 mod_table[][2] = { { /* MOD_VEX_0FD7_PREFIX_2 */ { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0FD7_P_2_M_1) }, + { VEX_W_TABLE (VEX_W_0FD7_P_2_M_1) }, }, { /* MOD_VEX_0FE7_PREFIX_2 */ @@ -10689,20 +10415,12 @@ static const struct dis386 mod_table[][2] = { { VEX_W_TABLE (VEX_W_0FF0_P_3_M_0) }, }, { - /* MOD_VEX_0F3818_PREFIX_2 */ - { VEX_W_TABLE (VEX_W_0F3818_P_2_M_0) }, - }, - { - /* MOD_VEX_0F3819_PREFIX_2 */ - { VEX_LEN_TABLE (VEX_LEN_0F3819_P_2_M_0) }, - }, - { /* MOD_VEX_0F381A_PREFIX_2 */ { VEX_LEN_TABLE (VEX_LEN_0F381A_P_2_M_0) }, }, { /* MOD_VEX_0F382A_PREFIX_2 */ - { VEX_LEN_TABLE (VEX_LEN_0F382A_P_2_M_0) }, + { VEX_W_TABLE (VEX_W_0F382A_P_2_M_0) }, }, { /* MOD_VEX_0F382C_PREFIX_2 */ @@ -10720,6 +10438,18 @@ static const struct dis386 mod_table[][2] = { /* MOD_VEX_0F382F_PREFIX_2 */ { VEX_W_TABLE (VEX_W_0F382F_P_2_M_0) }, }, + { + /* MOD_VEX_0F385A_PREFIX_2 */ + { VEX_LEN_TABLE (VEX_LEN_0F385A_P_2_M_0) }, + }, + { + /* MOD_VEX_0F388C_PREFIX_2 */ + { "vpmaskmov%LW", { XM, Vex, Mx } }, + }, + { + /* MOD_VEX_0F388E_PREFIX_2 */ + { "vpmaskmov%LW", { Mx, Vex, XM } }, + }, }; static const struct dis386 rm_table[][8] = { @@ -11431,35 +11161,19 @@ print_insn (bfd_vma pc, disassemble_info *info) int prefix_length; int default_prefixes; - if (info->mach == bfd_mach_x86_64_intel_syntax - || info->mach == bfd_mach_x86_64 - || info->mach == bfd_mach_x64_32_intel_syntax - || info->mach == bfd_mach_x64_32 - || info->mach == bfd_mach_l1om - || info->mach == bfd_mach_l1om_intel_syntax) - address_mode = mode_64bit; - else + priv.orig_sizeflag = AFLAG | DFLAG; + if ((info->mach & bfd_mach_i386_i386) != 0) address_mode = mode_32bit; - - if (intel_syntax == (char) -1) - intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax - || info->mach == bfd_mach_x86_64_intel_syntax - || info->mach == bfd_mach_x64_32_intel_syntax - || info->mach == bfd_mach_l1om_intel_syntax); - - if (info->mach == bfd_mach_i386_i386 - || info->mach == bfd_mach_x86_64 - || info->mach == bfd_mach_x64_32 - || info->mach == bfd_mach_l1om - || info->mach == bfd_mach_i386_i386_intel_syntax - || info->mach == bfd_mach_x86_64_intel_syntax - || info->mach == bfd_mach_x64_32_intel_syntax - || info->mach == bfd_mach_l1om_intel_syntax) - priv.orig_sizeflag = AFLAG | DFLAG; else if (info->mach == bfd_mach_i386_i8086) - priv.orig_sizeflag = 0; + { + address_mode = mode_16bit; + priv.orig_sizeflag = 0; + } else - abort (); + address_mode = mode_64bit; + + if (intel_syntax == (char) -1) + intel_syntax = (info->mach & bfd_mach_i386_intel_syntax) != 0; for (p = info->disassembler_options; p != NULL; ) { @@ -11564,8 +11278,7 @@ print_insn (bfd_vma pc, disassemble_info *info) /* The output looks better if we put 7 bytes on a line, since that puts most long word instructions on a single line. Use 8 bytes for Intel L1OM. */ - if (info->mach == bfd_mach_l1om - || info->mach == bfd_mach_l1om_intel_syntax) + if ((info->mach & bfd_mach_l1om) != 0) info->bytes_per_line = 8; else info->bytes_per_line = 7; @@ -12702,14 +12415,20 @@ case_S: } else { - if (l != 1 || len != 2 || last[0] != 'X') + if (l != 1 + || len != 2 + || (last[0] != 'X' + && last[0] != 'L')) { SAVE_LAST (*p); break; } if (!need_vex) abort (); - *obufp++ = vex.w ? 'd': 's'; + if (last[0] == 'X') + *obufp++ = vex.w ? 'd': 's'; + else + *obufp++ = vex.w ? 'q': 'd'; } break; } @@ -12987,6 +12706,94 @@ intel_operand_size (int bytemode, int sizeflag) abort (); } break; + case xmm_mb_mode: + if (!need_vex) + abort (); + + switch (vex.length) + { + case 128: + case 256: + oappend ("BYTE PTR "); + break; + default: + abort (); + } + break; + case xmm_mw_mode: + if (!need_vex) + abort (); + + switch (vex.length) + { + case 128: + case 256: + oappend ("WORD PTR "); + break; + default: + abort (); + } + break; + case xmm_md_mode: + if (!need_vex) + abort (); + + switch (vex.length) + { + case 128: + case 256: + oappend ("DWORD PTR "); + break; + default: + abort (); + } + break; + case xmm_mq_mode: + if (!need_vex) + abort (); + + switch (vex.length) + { + case 128: + case 256: + oappend ("QWORD PTR "); + break; + default: + abort (); + } + break; + case xmmdw_mode: + if (!need_vex) + abort (); + + switch (vex.length) + { + case 128: + oappend ("WORD PTR "); + break; + case 256: + oappend ("DWORD PTR "); + break; + default: + abort (); + } + break; + case xmmqd_mode: + if (!need_vex) + abort (); + + switch (vex.length) + { + case 128: + oappend ("DWORD PTR "); + break; + case 256: + oappend ("QWORD PTR "); + break; + default: + abort (); + } + break; case ymmq_mode: if (!need_vex) abort (); @@ -13003,11 +12810,27 @@ intel_operand_size (int bytemode, int sizeflag) abort (); } break; + case ymmxmm_mode: + if (!need_vex) + abort (); + + switch (vex.length) + { + case 128: + case 256: + oappend ("XMMWORD PTR "); + break; + default: + abort (); + } + break; case o_mode: oappend ("OWORD PTR "); break; case vex_w_dq_mode: case vex_scalar_w_dq_mode: + case vex_vsib_d_w_dq_mode: + case vex_vsib_q_w_dq_mode: if (!need_vex) abort (); @@ -13117,6 +12940,8 @@ OP_E_memory (int bytemode, int sizeflag) int base, rbase; int vindex = 0; int scale = 0; + const char **indexes64 = names64; + const char **indexes32 = names32; havesib = 0; havebase = 1; @@ -13127,12 +12952,38 @@ OP_E_memory (int bytemode, int sizeflag) { havesib = 1; vindex = sib.index; - scale = sib.scale; - base = sib.base; USED_REX (REX_X); if (rex & REX_X) vindex += 8; - haveindex = vindex != 4; + switch (bytemode) + { + case vex_vsib_d_w_dq_mode: + case vex_vsib_q_w_dq_mode: + if (!need_vex) + abort (); + + haveindex = 1; + switch (vex.length) + { + case 128: + indexes64 = indexes32 = names_xmm; + break; + case 256: + if (!vex.w || bytemode == vex_vsib_q_w_dq_mode) + indexes64 = indexes32 = names_ymm; + else + indexes64 = indexes32 = names_xmm; + break; + default: + abort (); + } + break; + default: + haveindex = vindex != 4; + break; + } + scale = sib.scale; + base = sib.base; codep++; } rbase = base + add; @@ -13216,7 +13067,7 @@ OP_E_memory (int bytemode, int sizeflag) if (haveindex) oappend (address_mode == mode_64bit && (sizeflag & AFLAG) - ? names64[vindex] : names32[vindex]); + ? indexes64[vindex] : indexes32[vindex]); else oappend (address_mode == mode_64bit && (sizeflag & AFLAG) @@ -14082,7 +13933,10 @@ OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED) names = names_xmm; break; case 256: - names = names_ymm; + if (vex.w || bytemode != vex_vsib_q_w_dq_mode) + names = names_ymm; + else + names = names_xmm; break; default: abort (); @@ -14195,6 +14049,12 @@ OP_EX (int bytemode, int sizeflag) if (need_vex && bytemode != xmm_mode + && bytemode != xmmdw_mode + && bytemode != xmmqd_mode + && bytemode != xmm_mb_mode + && bytemode != xmm_mw_mode + && bytemode != xmm_md_mode + && bytemode != xmm_mq_mode && bytemode != xmmq_mode && bytemode != d_scalar_mode && bytemode != d_scalar_swap_mode @@ -14652,6 +14512,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED) { case vex_mode: case vex128_mode: + case vex_vsib_q_w_dq_mode: names = names_xmm; break; case dq_mode: @@ -14670,13 +14531,15 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED) { case vex_mode: case vex256_mode: + names = names_ymm; + break; + case vex_vsib_q_w_dq_mode: + names = vex.w ? names_ymm : names_xmm; break; default: abort (); return; } - - names = names_ymm; break; default: abort (); diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index d4adcf8..4dd75a2 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -43,7 +43,7 @@ typedef struct initializer static initializer cpu_flag_init[] = { { "CPU_UNKNOWN_FLAGS", - "~CpuL1OM" }, + "~(CpuL1OM|CpuK1OM)" }, { "CPU_GENERIC32_FLAGS", "Cpu186|Cpu286|Cpu386" }, { "CPU_GENERIC64_FLAGS", @@ -90,6 +90,8 @@ static initializer cpu_flag_init[] = "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" }, { "CPU_BDVER1_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" }, + { "CPU_BDVER2_FLAGS", + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C" }, { "CPU_8087_FLAGS", "Cpu8087" }, { "CPU_287_FLAGS", @@ -119,7 +121,7 @@ static initializer cpu_flag_init[] = { "CPU_SSE4_2_FLAGS", "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2" }, { "CPU_ANY_SSE_FLAGS", - "CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuAVX" }, + "CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuAVX|CpuAVX2" }, { "CPU_VMX_FLAGS", "CpuVMX" }, { "CPU_SMX_FLAGS", @@ -156,6 +158,12 @@ static initializer cpu_flag_init[] = "CpuRdRnd" }, { "CPU_F16C_FLAGS", "CpuF16C" }, + { "CPU_BMI2_FLAGS", + "CpuBMI2" }, + { "CPU_LZCNT_FLAGS", + "CpuLZCNT" }, + { "CPU_INVPCID_FLAGS", + "CpuINVPCID" }, { "CPU_3DNOW_FLAGS", "CpuMMX|Cpu3dnow" }, { "CPU_3DNOWA_FLAGS", @@ -170,10 +178,14 @@ static initializer cpu_flag_init[] = "CpuABM" }, { "CPU_AVX_FLAGS", "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX" }, + { "CPU_AVX2_FLAGS", + "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2" }, { "CPU_ANY_AVX_FLAGS", - "CpuAVX" }, + "CpuAVX|CpuAVX2" }, { "CPU_L1OM_FLAGS", "unknown" }, + { "CPU_K1OM_FLAGS", + "unknown" }, }; static initializer operand_type_init[] = @@ -307,7 +319,9 @@ static bitfield cpu_flags[] = BITFIELD (CpuSSE4_1), BITFIELD (CpuSSE4_2), BITFIELD (CpuAVX), + BITFIELD (CpuAVX2), BITFIELD (CpuL1OM), + BITFIELD (CpuK1OM), BITFIELD (CpuSSE4a), BITFIELD (Cpu3dnow), BITFIELD (Cpu3dnowA), @@ -333,6 +347,9 @@ static bitfield cpu_flags[] = BITFIELD (CpuFSGSBase), BITFIELD (CpuRdRnd), BITFIELD (CpuF16C), + BITFIELD (CpuBMI2), + BITFIELD (CpuLZCNT), + BITFIELD (CpuINVPCID), BITFIELD (Cpu64), BITFIELD (CpuNo64), #ifdef CpuUnused @@ -386,6 +403,7 @@ static bitfield opcode_modifiers[] = BITFIELD (VexOpcode), BITFIELD (VexSources), BITFIELD (VexImmExt), + BITFIELD (VecSIB), BITFIELD (SSE2AVX), BITFIELD (NoAVX), BITFIELD (OldGcc), diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index d8edd1a..69f0e94 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -21,333 +21,363 @@ #define CPU_UNKNOWN_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ - 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } } + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, \ + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } } #define CPU_GENERIC32_FLAGS \ { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_GENERIC64_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } #define CPU_NONE_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I186_FLAGS \ { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I286_FLAGS \ { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I386_FLAGS \ { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I486_FLAGS \ { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I586_FLAGS \ { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I686_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_PENTIUMPRO_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_P2_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_P3_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_P4_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_NOCONA_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } #define CPU_CORE_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_CORE2_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } #define CPU_COREI7_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } #define CPU_K6_FLAGS \ { { 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_K6_2_FLAGS \ { { 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_ATHLON_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_K8_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } #define CPU_AMDFAM10_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } #define CPU_BDVER1_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ - 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \ - 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } + 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \ + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } + +#define CPU_BDVER2_FLAGS \ + { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ + 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \ + 1, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } #define CPU_8087_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_287_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_387_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_ANY87_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_CLFLUSH_FLAGS \ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_NOP_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SYSCALL_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_MMX_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE2_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE3_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSSE3_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE4_1_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE4_2_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_ANY_SSE_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, \ - 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_VMX_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SMX_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_XSAVE_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_XSAVEOPT_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_AES_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ - 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_PCLMUL_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ - 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_FMA_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ - 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_FMA4_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ - 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_XOP_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ - 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_LWP_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_BMI_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_TBM_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_MOVBE_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_RDTSCP_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_EPT_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_FSGSBASE_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_RDRND_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_F16C_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } } + +#define CPU_BMI2_FLAGS \ + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } } + +#define CPU_LZCNT_FLAGS \ + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } + +#define CPU_INVPCID_FLAGS \ + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } } #define CPU_3DNOW_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_3DNOWA_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_PADLOCK_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SVME_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE4A_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_ABM_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_AVX_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + +#define CPU_AVX2_FLAGS \ + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ + 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_ANY_AVX_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_L1OM_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ - 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } } + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } } + +#define CPU_K1OM_FLAGS \ + { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } } #define OPERAND_TYPE_NONE \ diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index f90dff5..8d5dade 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -92,8 +92,12 @@ enum CpuSSE4_2, /* AVX support required */ CpuAVX, + /* AVX2 support required */ + CpuAVX2, /* Intel L1OM support required */ CpuL1OM, + /* Intel K1OM support required */ + CpuK1OM, /* Xsave/xrstor New Instructions support required */ CpuXsave, /* Xsaveopt New Instructions support required */ @@ -126,6 +130,12 @@ enum CpuRdRnd, /* F16C Instructions required */ CpuF16C, + /* Intel BMI2 support required */ + CpuBMI2, + /* LZCNT support required */ + CpuLZCNT, + /* INVPCID Instructions required */ + CpuINVPCID, /* 64bit support available, used by -march= in assembler. */ CpuLM, /* 64bit support required */ @@ -181,7 +191,9 @@ typedef union i386_cpu_flags unsigned int cpusse4_1:1; unsigned int cpusse4_2:1; unsigned int cpuavx:1; + unsigned int cpuavx2:1; unsigned int cpul1om:1; + unsigned int cpuk1om:1; unsigned int cpuxsave:1; unsigned int cpuxsaveopt:1; unsigned int cpuaes:1; @@ -198,6 +210,9 @@ typedef union i386_cpu_flags unsigned int cpufsgsbase:1; unsigned int cpurdrnd:1; unsigned int cpuf16c:1; + unsigned int cpubmi2:1; + unsigned int cpulzcnt:1; + unsigned int cpuinvpcid:1; unsigned int cpulm:1; unsigned int cpu64:1; unsigned int cpuno64:1; @@ -307,9 +322,12 @@ enum VEX.DDS. The second register operand is encoded in VEX.vvvv where the content of first source register will be overwritten by the result. - For assembler, there are no difference between VEX.NDS and - VEX.DDS. - 2. VEX.NDD. Register destination is encoded in VEX.vvvv. + VEX.NDD2. The second destination register operand is encoded in + VEX.vvvv for instructions with 2 destination register operands. + For assembler, there are no difference between VEX.NDS, VEX.DDS + and VEX.NDD2. + 2. VEX.NDD. Register destination is encoded in VEX.vvvv for + instructions with 1 destination register operand. 3. VEX.LWP. Register destination is encoded in VEX.vvvv and one of the operands can access a memory location. */ @@ -350,6 +368,13 @@ enum VexSources, /* instruction has VEX 8 bit imm */ VexImmExt, + /* Instruction with vector SIB byte: + 1: 128bit vector register. + 2: 256bit vector register. + */ +#define VecSIB128 1 +#define VecSIB256 2 + VecSIB, /* SSE to AVX support required */ SSE2AVX, /* No AVX equivalent */ @@ -412,6 +437,7 @@ typedef struct i386_opcode_modifier unsigned int vexopcode:3; unsigned int vexsources:2; unsigned int veximmext:1; + unsigned int vecsib:2; unsigned int sse2avx:1; unsigned int noavx:1; unsigned int oldgcc:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index bffe134..eb7dae9 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -320,7 +320,7 @@ shrd, 2, 0xfad, None, 2, Cpu386, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, { // Control transfer instructions. call, 1, 0xe8, None, 1, CpuNo64, JumpDword|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp16|Disp32 } -call, 1, 0xe8, None, 1, Cpu64, JumpDword|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { Disp16|Disp32 } +call, 1, 0xe8, None, 1, Cpu64, JumpDword|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { Disp16|Disp32|Disp32S } call, 1, 0xff, 0x2, 1, CpuNo64, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32|Word|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|JumpAbsolute } call, 1, 0xff, 0x2, 1, Cpu64, Modrm|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { Reg16|Reg64|Word|Qword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S|JumpAbsolute } // Intel Syntax @@ -1572,6 +1572,11 @@ invept, 2, 0x660f3880, None, 3, CpuEPT|Cpu64, Modrm|IgnoreSize|No_bSuf|No_wSuf|N invvpid, 2, 0x660f3881, None, 3, CpuEPT|CpuNo64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_qSuf|No_sSuf|No_ldSuf, { Oword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32 } invvpid, 2, 0x660f3881, None, 3, CpuEPT|Cpu64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_qSuf|No_sSuf|No_ldSuf|NoRex64, { Oword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg64 } +// INVPCID instruction + +invpcid, 2, 0x660f3882, None, 3, CpuINVPCID|CpuNo64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_qSuf|No_sSuf|No_ldSuf, { Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32 } +invpcid, 2, 0x660f3882, None, 3, CpuINVPCID|Cpu64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_qSuf|No_sSuf|No_ldSuf|NoRex64, { Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg64 } + // SSSE3 instructions. phaddw, 2, 0x6601, None, 1, CpuAVX, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } @@ -2375,6 +2380,185 @@ vxorps, 3, 0x57, None, 1, CpuAVX, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|Ignor vzeroall, 0, 0x77, None, 1, CpuAVX, Vex=2|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } vzeroupper, 0, 0x77, None, 1, CpuAVX, Vex|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } +// 256bit integer AVX2 instructions. + +vmpsadbw, 4, 0x6642, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpabsb, 2, 0x661c, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM } +vpabsd, 2, 0x661e, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM } +vpabsw, 2, 0x661d, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM } +vpackssdw, 3, 0x666b, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpacksswb, 3, 0x6663, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpackusdw, 3, 0x662b, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpackuswb, 3, 0x6667, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpaddsb, 3, 0x66ec, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpaddsw, 3, 0x66ed, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpaddb, 3, 0x66fc, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpaddd, 3, 0x66fe, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpaddq, 3, 0x66d4, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpaddw, 3, 0x66fd, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpaddusb, 3, 0x66dc, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpaddusw, 3, 0x66dd, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpalignr, 4, 0x660f, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpand, 3, 0x66db, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpandn, 3, 0x66df, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpavgb, 3, 0x66e0, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpavgw, 3, 0x66e3, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpblendvb, 4, 0x664c, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexVVVV=1|VexSources=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VexImmExt, { RegYMM, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpblendw, 4, 0x660e, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpcmpeqb, 3, 0x6674, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpcmpeqd, 3, 0x6676, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpcmpeqq, 3, 0x6629, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpcmpeqw, 3, 0x6675, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpcmpgtb, 3, 0x6664, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpcmpgtd, 3, 0x6666, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpcmpgtq, 3, 0x6637, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpcmpgtw, 3, 0x6665, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vphaddd, 3, 0x6602, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vphaddsw, 3, 0x6603, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vphaddw, 3, 0x6601, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vphsubd, 3, 0x6606, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vphsubsw, 3, 0x6607, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vphsubw, 3, 0x6605, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmaddubsw, 3, 0x6604, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmaddwd, 3, 0x66f5, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmaxsb, 3, 0x663c, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmaxsd, 3, 0x663d, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmaxsw, 3, 0x66ee, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmaxub, 3, 0x66de, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmaxud, 3, 0x663f, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmaxuw, 3, 0x663e, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpminsb, 3, 0x6638, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpminsd, 3, 0x6639, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpminsw, 3, 0x66ea, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpminub, 3, 0x66da, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpminud, 3, 0x663b, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpminuw, 3, 0x663a, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmovmskb, 2, 0x66d7, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|NoRex64, { RegYMM, Reg32|Reg64 } +vpmovsxbd, 2, 0x6621, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmovsxbq, 2, 0x6622, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { DWord|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmovsxbw, 2, 0x6620, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmovsxdq, 2, 0x6625, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmovsxwd, 2, 0x6623, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmovsxwq, 2, 0x6624, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmovzxbd, 2, 0x6631, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmovzxbq, 2, 0x6632, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmovzxbw, 2, 0x6630, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmovzxdq, 2, 0x6635, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmovzxwd, 2, 0x6633, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmovzxwq, 2, 0x6634, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpmuldq, 3, 0x6628, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmulhrsw, 3, 0x660b, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmulhuw, 3, 0x66e4, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmulhw, 3, 0x66e5, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmulld, 3, 0x6640, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmullw, 3, 0x66d5, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpmuludq, 3, 0x66f4, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpor, 3, 0x66eb, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsadbw, 3, 0x66f6, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpshufb, 3, 0x6600, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpshufd, 3, 0x6670, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM } +vpshufhw, 3, 0xf370, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM } +vpshuflw, 3, 0xf270, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM } +vpsignb, 3, 0x6608, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsignd, 3, 0x660a, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsignw, 3, 0x6609, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpslld, 3, 0x6672, 0x6, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegYMM, RegYMM } +vpslld, 3, 0x66f2, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM, RegYMM } +vpslldq, 3, 0x6673, 0x7, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegYMM, RegYMM } +vpsllq, 3, 0x6673, 0x6, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegYMM, RegYMM } +vpsllq, 3, 0x66f3, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM, RegYMM } +vpsllw, 3, 0x6671, 0x6, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegYMM, RegYMM } +vpsllw, 3, 0x66f1, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM, RegYMM } +vpsrad, 3, 0x6672, 0x4, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegYMM, RegYMM } +vpsrad, 3, 0x66e2, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM, RegYMM } +vpsraw, 3, 0x6671, 0x4, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegYMM, RegYMM } +vpsraw, 3, 0x66e1, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM, RegYMM } +vpsrld, 3, 0x6672, 0x2, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegYMM, RegYMM } +vpsrld, 3, 0x66d2, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM, RegYMM } +vpsrldq, 3, 0x6673, 0x3, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegYMM, RegYMM } +vpsrlq, 3, 0x6673, 0x2, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegYMM, RegYMM } +vpsrlq, 3, 0x66d3, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM, RegYMM } +vpsrlw, 3, 0x6671, 0x2, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegYMM, RegYMM } +vpsrlw, 3, 0x66d1, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM, RegYMM } +vpsubb, 3, 0x66f8, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsubd, 3, 0x66fa, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsubq, 3, 0x66fb, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsubsb, 3, 0x66e8, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsubsw, 3, 0x66e9, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsubusb, 3, 0x66d8, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsubusw, 3, 0x66d9, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsubw, 3, 0x66f9, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpunpckhbw, 3, 0x6668, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpunpckhdq, 3, 0x666a, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpunpckhqdq, 3, 0x666d, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpunpckhwd, 3, 0x6669, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpunpcklbw, 3, 0x6660, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpunpckldq, 3, 0x6662, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpunpcklqdq, 3, 0x666c, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpunpcklwd, 3, 0x6661, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpxor, 3, 0x66ef, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } + +// New AVX2 instructions. + +vbroadcasti128, 2, 0x665A, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM } +vbroadcastsd, 2, 0x6619, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegYMM } +vbroadcastss, 2, 0x6618, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM } +vbroadcastss, 2, 0x6618, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegYMM } +vmovntdqa, 2, 0x662a, None, 1, CpuAVX, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM } +vpblendd, 4, 0x6602, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } +vpblendd, 4, 0x6602, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpbroadcastb, 2, 0x6678, None, 1, CpuAVX2, Modrm|Vex=1|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } +vpbroadcastb, 2, 0x6678, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpbroadcastd, 2, 0x6658, None, 1, CpuAVX2, Modrm|Vex=1|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } +vpbroadcastd, 2, 0x6658, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpbroadcastq, 2, 0x6659, None, 1, CpuAVX2, Modrm|Vex=1|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { QWord|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } +vpbroadcastq, 2, 0x6659, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { QWord|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vpbroadcastw, 2, 0x6679, None, 1, CpuAVX2, Modrm|Vex=1|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Word|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } +vpbroadcastw, 2, 0x6679, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Word|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM } +vperm2i128, 4, 0x6646, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpermd, 3, 0x6636, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpermpd, 3, 0x6601, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM } +vpermps, 3, 0x6616, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpermq, 3, 0x6600, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM } +vextracti128, 3, 0x6639, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM } +vinserti128, 4, 0x6638, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegYMM, RegYMM } +vpmaskmovd, 3, 0x668e, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S } +vpmaskmovd, 3, 0x668e, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, RegYMM, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S } +vpmaskmovd, 3, 0x668c, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM, RegXMM } +vpmaskmovd, 3, 0x668c, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM, RegYMM } +vpmaskmovq, 3, 0x668e, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S } +vpmaskmovq, 3, 0x668e, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, RegYMM, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S } +vpmaskmovq, 3, 0x668c, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM, RegXMM } +vpmaskmovq, 3, 0x668c, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM, RegYMM } +vpsllvd, 3, 0x6647, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } +vpsllvd, 3, 0x6647, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsllvq, 3, 0x6647, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } +vpsllvq, 3, 0x6647, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsravd, 3, 0x6646, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } +vpsravd, 3, 0x6646, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsrlvd, 3, 0x6645, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } +vpsrlvd, 3, 0x6645, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } +vpsrlvq, 3, 0x6645, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } +vpsrlvq, 3, 0x6645, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } + +// AVX gather instructions +vgatherdpd, 3, 0x6692, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=1, { RegXMM, Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } +vgatherdpd, 3, 0x6692, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=1, { RegYMM, Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM } +vgatherdps, 3, 0x6692, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=1, { RegXMM, Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } +vgatherdps, 3, 0x6692, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=2, { RegYMM, Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM } +vgatherqpd, 3, 0x6693, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=1, { RegXMM, Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } +vgatherqpd, 3, 0x6693, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=2, { RegYMM, Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM } +vgatherqps, 3, 0x6693, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=1, { RegXMM, Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } +vgatherqps, 3, 0x6693, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=2, { RegXMM, Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } +vpgatherdd, 3, 0x6690, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=1, { RegXMM, Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } +vpgatherdd, 3, 0x6690, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=2, { RegYMM, Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM } +vpgatherdq, 3, 0x6690, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=1, { RegXMM, Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } +vpgatherdq, 3, 0x6690, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=1, { RegYMM, Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM } +vpgatherqd, 3, 0x6691, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=1, { RegXMM, Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } +vpgatherqd, 3, 0x6691, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=2, { RegXMM, Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } +vpgatherqq, 3, 0x6691, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=1, { RegXMM, Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } +vpgatherqq, 3, 0x6691, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VecSIB=2, { RegYMM, Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM } + // AES + AVX vaesdec, 3, 0x66de, None, 1, CpuAVX|CpuAES, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } @@ -2503,6 +2687,16 @@ vfnmsub213ss, 3, 0x66af, None, 1, CpuFMA, Modrm|Vex=3|VexOpcode=1|VexVVVV=1|VexW vfnmsub231sd, 3, 0x66bf, None, 1, CpuFMA, Modrm|Vex=3|VexOpcode=1|VexVVVV=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } vfnmsub231ss, 3, 0x66bf, None, 1, CpuFMA, Modrm|Vex=3|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } +// BMI2 instructions. +bzhi, 3, 0xf5, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 } +mulx, 3, 0xf2f6, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 } +pdep, 3, 0xf2f5, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 } +pext, 3, 0xf3f5, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 } +rorx, 3, 0xf2f0, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=2|VexVVVV=0|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Imm8, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 } +sarx, 3, 0xf3f7, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 } +shlx, 3, 0x66f7, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 } +shrx, 3, 0xf2f7, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 } + // FMA4 instructions vfmaddpd, 4, 0x6669, None, 1, CpuFMA4, Modrm|Vex|VexOpcode=2|VexVVVV=1|VexW=2|VexSources=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VexImmExt, {Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM, RegXMM } @@ -2823,7 +3017,7 @@ insertq, 4, 0xf20f78, None, 2, CpuSSE4a, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSu // ABM instructions popcnt, 2, 0xf30fb8, None, 2, CpuABM|CpuSSE4_2, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf|NoAVX, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 } -lzcnt, 2, 0xf30fbd, None, 2, CpuABM, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 } +lzcnt, 2, 0xf30fbd, None, 2, CpuABM|CpuLZCNT, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 } // VIA PadLock extensions. xstore-rng, 0, 0xfa7, 0xc0, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsString|ImmExt, { 0 } diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index c86f77d..795f71d 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -26,10 +26,10 @@ const insn_template i386_optab[] = { "mov", 2, 0xa0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -39,10 +39,10 @@ const insn_template i386_optab[] = { "mov", 2, 0xa0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -52,10 +52,10 @@ const insn_template i386_optab[] = { "mov", 2, 0x88, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -65,10 +65,10 @@ const insn_template i386_optab[] = { "mov", 2, 0xb0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -78,10 +78,10 @@ const insn_template i386_optab[] = { "mov", 2, 0xc6, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -91,10 +91,10 @@ const insn_template i386_optab[] = { "mov", 2, 0xb0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -104,10 +104,10 @@ const insn_template i386_optab[] = { "mov", 2, 0x8c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -117,10 +117,10 @@ const insn_template i386_optab[] = { "mov", 2, 0x8c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -130,10 +130,10 @@ const insn_template i386_optab[] = { "mov", 2, 0x8c, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -143,10 +143,10 @@ const insn_template i386_optab[] = { "mov", 2, 0x8c, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -156,10 +156,10 @@ const insn_template i386_optab[] = { "mov", 2, 0x8e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -169,10 +169,10 @@ const insn_template i386_optab[] = { "mov", 2, 0x8e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -182,10 +182,10 @@ const insn_template i386_optab[] = { "mov", 2, 0x8e, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -195,10 +195,10 @@ const insn_template i386_optab[] = { "mov", 2, 0x8e, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -208,10 +208,10 @@ const insn_template i386_optab[] = { "mov", 2, 0xf20, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -221,10 +221,10 @@ const insn_template i386_optab[] = { "mov", 2, 0xf20, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -234,10 +234,10 @@ const insn_template i386_optab[] = { "mov", 2, 0xf21, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -247,10 +247,10 @@ const insn_template i386_optab[] = { "mov", 2, 0xf21, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -260,10 +260,10 @@ const insn_template i386_optab[] = { "mov", 2, 0xf24, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -273,10 +273,10 @@ const insn_template i386_optab[] = { "movabs", 2, 0xa0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -286,10 +286,10 @@ const insn_template i386_optab[] = { "movabs", 2, 0xb0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -299,10 +299,10 @@ const insn_template i386_optab[] = { "movbe", 2, 0x0f38f0, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -312,10 +312,10 @@ const insn_template i386_optab[] = { "movbe", 2, 0x0f38f1, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -325,10 +325,10 @@ const insn_template i386_optab[] = { "movsbl", 2, 0xfbe, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -338,10 +338,10 @@ const insn_template i386_optab[] = { "movsbw", 2, 0xfbe, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -351,10 +351,10 @@ const insn_template i386_optab[] = { "movswl", 2, 0xfbf, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -364,10 +364,10 @@ const insn_template i386_optab[] = { "movsbq", 2, 0xfbe, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -377,10 +377,10 @@ const insn_template i386_optab[] = { "movswq", 2, 0xfbf, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -390,10 +390,10 @@ const insn_template i386_optab[] = { "movslq", 2, 0x63, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -403,10 +403,10 @@ const insn_template i386_optab[] = { "movsx", 2, 0xfbe, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -416,10 +416,10 @@ const insn_template i386_optab[] = { "movsx", 2, 0xfbf, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -429,10 +429,10 @@ const insn_template i386_optab[] = { "movsx", 2, 0x63, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -442,10 +442,10 @@ const insn_template i386_optab[] = { "movsx", 2, 0xfbe, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -455,10 +455,10 @@ const insn_template i386_optab[] = { "movsx", 2, 0xfbf, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -468,10 +468,10 @@ const insn_template i386_optab[] = { "movsx", 2, 0x63, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -481,10 +481,10 @@ const insn_template i386_optab[] = { "movsxd", 2, 0x63, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -494,10 +494,10 @@ const insn_template i386_optab[] = { "movzb", 2, 0xfb6, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -507,10 +507,10 @@ const insn_template i386_optab[] = { "movzbl", 2, 0xfb6, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -520,10 +520,10 @@ const insn_template i386_optab[] = { "movzbw", 2, 0xfb6, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -533,10 +533,10 @@ const insn_template i386_optab[] = { "movzwl", 2, 0xfb7, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -546,10 +546,10 @@ const insn_template i386_optab[] = { "movzbq", 2, 0xfb6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -559,10 +559,10 @@ const insn_template i386_optab[] = { "movzwq", 2, 0xfb7, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -572,10 +572,10 @@ const insn_template i386_optab[] = { "movzx", 2, 0xfb6, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -585,10 +585,10 @@ const insn_template i386_optab[] = { "movzx", 2, 0xfb7, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -598,10 +598,10 @@ const insn_template i386_optab[] = { "movzx", 2, 0xfb6, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -611,10 +611,10 @@ const insn_template i386_optab[] = { "movzx", 2, 0xfb7, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -624,210 +624,210 @@ const insn_template i386_optab[] = { "push", 1, 0x50, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "push", 1, 0xff, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "push", 1, 0x6a, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "push", 1, 0x68, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "push", 1, 0x6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "push", 1, 0xfa0, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "push", 1, 0x50, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "push", 1, 0xff, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "push", 1, 0x6a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "push", 1, 0x68, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "push", 1, 0xfa0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "pusha", 0, 0x60, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "pop", 1, 0x58, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "pop", 1, 0x8f, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "pop", 1, 0x7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "pop", 1, 0xfa1, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "pop", 1, 0x58, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "pop", 1, 0x8f, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "pop", 1, 0xfa1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "popa", 0, 0x61, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xchg", 2, 0x90, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -837,10 +837,10 @@ const insn_template i386_optab[] = { "xchg", 2, 0x90, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, @@ -850,10 +850,10 @@ const insn_template i386_optab[] = { "xchg", 2, 0x86, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -863,10 +863,10 @@ const insn_template i386_optab[] = { "xchg", 2, 0x86, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -876,10 +876,10 @@ const insn_template i386_optab[] = { "in", 2, 0xe4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -889,10 +889,10 @@ const insn_template i386_optab[] = { "in", 2, 0xec, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -902,30 +902,30 @@ const insn_template i386_optab[] = { "in", 1, 0xe4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "in", 1, 0xec, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "out", 2, 0xe6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -935,10 +935,10 @@ const insn_template i386_optab[] = { "out", 2, 0xee, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -948,30 +948,30 @@ const insn_template i386_optab[] = { "out", 1, 0xe6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "out", 1, 0xee, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "lea", 2, 0x8d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, @@ -981,10 +981,10 @@ const insn_template i386_optab[] = { "lds", 2, 0xc5, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -994,10 +994,10 @@ const insn_template i386_optab[] = { "les", 2, 0xc4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -1007,10 +1007,10 @@ const insn_template i386_optab[] = { "lfs", 2, 0xfb4, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0 } }, @@ -1020,10 +1020,10 @@ const insn_template i386_optab[] = { "lgs", 2, 0xfb5, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0 } }, @@ -1033,10 +1033,10 @@ const insn_template i386_optab[] = { "lss", 2, 0xfb2, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0 } }, @@ -1046,150 +1046,150 @@ const insn_template i386_optab[] = { "clc", 0, 0xf8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cld", 0, 0xfc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cli", 0, 0xfa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "clts", 0, 0xf06, None, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cmc", 0, 0xf5, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "lahf", 0, 0x9f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "sahf", 0, 0x9e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "pushf", 0, 0x9c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "pushf", 0, 0x9c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "popf", 0, 0x9d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "popf", 0, 0x9d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "stc", 0, 0xf9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "std", 0, 0xfd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "sti", 0, 0xfb, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "add", 2, 0x0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1199,10 +1199,10 @@ const insn_template i386_optab[] = { "add", 2, 0x83, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1212,10 +1212,10 @@ const insn_template i386_optab[] = { "add", 2, 0x4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1225,10 +1225,10 @@ const insn_template i386_optab[] = { "add", 2, 0x80, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1238,30 +1238,30 @@ const insn_template i386_optab[] = { "inc", 1, 0x40, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "inc", 1, 0xfe, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "sub", 2, 0x28, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1271,10 +1271,10 @@ const insn_template i386_optab[] = { "sub", 2, 0x83, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1284,10 +1284,10 @@ const insn_template i386_optab[] = { "sub", 2, 0x2c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1297,10 +1297,10 @@ const insn_template i386_optab[] = { "sub", 2, 0x80, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1310,30 +1310,30 @@ const insn_template i386_optab[] = { "dec", 1, 0x48, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "dec", 1, 0xfe, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "sbb", 2, 0x18, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1343,10 +1343,10 @@ const insn_template i386_optab[] = { "sbb", 2, 0x83, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1356,10 +1356,10 @@ const insn_template i386_optab[] = { "sbb", 2, 0x1c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1369,10 +1369,10 @@ const insn_template i386_optab[] = { "sbb", 2, 0x80, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1382,10 +1382,10 @@ const insn_template i386_optab[] = { "cmp", 2, 0x38, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1395,10 +1395,10 @@ const insn_template i386_optab[] = { "cmp", 2, 0x83, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1408,10 +1408,10 @@ const insn_template i386_optab[] = { "cmp", 2, 0x3c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1421,10 +1421,10 @@ const insn_template i386_optab[] = { "cmp", 2, 0x80, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1434,10 +1434,10 @@ const insn_template i386_optab[] = { "test", 2, 0x84, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1447,10 +1447,10 @@ const insn_template i386_optab[] = { "test", 2, 0x84, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -1460,10 +1460,10 @@ const insn_template i386_optab[] = { "test", 2, 0xa8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1473,10 +1473,10 @@ const insn_template i386_optab[] = { "test", 2, 0xf6, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1486,10 +1486,10 @@ const insn_template i386_optab[] = { "and", 2, 0x20, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1499,10 +1499,10 @@ const insn_template i386_optab[] = { "and", 2, 0x83, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1512,10 +1512,10 @@ const insn_template i386_optab[] = { "and", 2, 0x24, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1525,10 +1525,10 @@ const insn_template i386_optab[] = { "and", 2, 0x80, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1538,10 +1538,10 @@ const insn_template i386_optab[] = { "or", 2, 0x8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1551,10 +1551,10 @@ const insn_template i386_optab[] = { "or", 2, 0x83, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1564,10 +1564,10 @@ const insn_template i386_optab[] = { "or", 2, 0xc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1577,10 +1577,10 @@ const insn_template i386_optab[] = { "or", 2, 0x80, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1590,10 +1590,10 @@ const insn_template i386_optab[] = { "xor", 2, 0x30, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1603,10 +1603,10 @@ const insn_template i386_optab[] = { "xor", 2, 0x83, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1616,10 +1616,10 @@ const insn_template i386_optab[] = { "xor", 2, 0x34, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1629,10 +1629,10 @@ const insn_template i386_optab[] = { "xor", 2, 0x80, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1642,20 +1642,20 @@ const insn_template i386_optab[] = { "clr", 1, 0x30, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "adc", 2, 0x10, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1665,10 +1665,10 @@ const insn_template i386_optab[] = { "adc", 2, 0x83, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1678,10 +1678,10 @@ const insn_template i386_optab[] = { "adc", 2, 0x14, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1691,10 +1691,10 @@ const insn_template i386_optab[] = { "adc", 2, 0x80, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1704,250 +1704,250 @@ const insn_template i386_optab[] = { "neg", 1, 0xf6, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "not", 1, 0xf6, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "aaa", 0, 0x37, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "aas", 0, 0x3f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "daa", 0, 0x27, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "das", 0, 0x2f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "aad", 0, 0xd50a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "aad", 1, 0xd5, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "aam", 0, 0xd40a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "aam", 1, 0xd4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cbw", 0, 0x98, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cdqe", 0, 0x98, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cwde", 0, 0x98, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cwd", 0, 0x99, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cdq", 0, 0x99, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cqo", 0, 0x99, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cbtw", 0, 0x98, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cltq", 0, 0x98, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cwtl", 0, 0x98, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cwtd", 0, 0x99, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cltd", 0, 0x99, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cqto", 0, 0x99, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "mul", 1, 0xf6, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "imul", 1, 0xf6, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "imul", 2, 0xfaf, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -1957,10 +1957,10 @@ const insn_template i386_optab[] = { "imul", 3, 0x6b, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1973,10 +1973,10 @@ const insn_template i386_optab[] = { "imul", 3, 0x69, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1989,10 +1989,10 @@ const insn_template i386_optab[] = { "imul", 2, 0x6b, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2002,10 +2002,10 @@ const insn_template i386_optab[] = { "imul", 2, 0x69, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2015,20 +2015,20 @@ const insn_template i386_optab[] = { "div", 1, 0xf6, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "div", 2, 0xf6, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -2038,20 +2038,20 @@ const insn_template i386_optab[] = { "idiv", 1, 0xf6, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "idiv", 2, 0xf6, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -2061,10 +2061,10 @@ const insn_template i386_optab[] = { "rol", 2, 0xd0, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2074,10 +2074,10 @@ const insn_template i386_optab[] = { "rol", 2, 0xc0, 0x0, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2087,10 +2087,10 @@ const insn_template i386_optab[] = { "rol", 2, 0xd2, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2100,20 +2100,20 @@ const insn_template i386_optab[] = { "rol", 1, 0xd0, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "ror", 2, 0xd0, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2123,10 +2123,10 @@ const insn_template i386_optab[] = { "ror", 2, 0xc0, 0x1, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2136,10 +2136,10 @@ const insn_template i386_optab[] = { "ror", 2, 0xd2, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2149,20 +2149,20 @@ const insn_template i386_optab[] = { "ror", 1, 0xd0, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "rcl", 2, 0xd0, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2172,10 +2172,10 @@ const insn_template i386_optab[] = { "rcl", 2, 0xc0, 0x2, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2185,10 +2185,10 @@ const insn_template i386_optab[] = { "rcl", 2, 0xd2, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2198,20 +2198,20 @@ const insn_template i386_optab[] = { "rcl", 1, 0xd0, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "rcr", 2, 0xd0, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2221,10 +2221,10 @@ const insn_template i386_optab[] = { "rcr", 2, 0xc0, 0x3, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2234,10 +2234,10 @@ const insn_template i386_optab[] = { "rcr", 2, 0xd2, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2247,20 +2247,20 @@ const insn_template i386_optab[] = { "rcr", 1, 0xd0, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "sal", 2, 0xd0, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2270,10 +2270,10 @@ const insn_template i386_optab[] = { "sal", 2, 0xc0, 0x4, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2283,10 +2283,10 @@ const insn_template i386_optab[] = { "sal", 2, 0xd2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2296,20 +2296,20 @@ const insn_template i386_optab[] = { "sal", 1, 0xd0, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "shl", 2, 0xd0, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2319,10 +2319,10 @@ const insn_template i386_optab[] = { "shl", 2, 0xc0, 0x4, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2332,10 +2332,10 @@ const insn_template i386_optab[] = { "shl", 2, 0xd2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2345,20 +2345,20 @@ const insn_template i386_optab[] = { "shl", 1, 0xd0, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "shr", 2, 0xd0, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2368,10 +2368,10 @@ const insn_template i386_optab[] = { "shr", 2, 0xc0, 0x5, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2381,10 +2381,10 @@ const insn_template i386_optab[] = { "shr", 2, 0xd2, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2394,20 +2394,20 @@ const insn_template i386_optab[] = { "shr", 1, 0xd0, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "sar", 2, 0xd0, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2417,10 +2417,10 @@ const insn_template i386_optab[] = { "sar", 2, 0xc0, 0x7, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2430,10 +2430,10 @@ const insn_template i386_optab[] = { "sar", 2, 0xd2, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2443,20 +2443,20 @@ const insn_template i386_optab[] = { "sar", 1, 0xd0, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "shld", 3, 0xfa4, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2469,10 +2469,10 @@ const insn_template i386_optab[] = { "shld", 3, 0xfa5, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2485,10 +2485,10 @@ const insn_template i386_optab[] = { "shld", 2, 0xfa5, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2498,10 +2498,10 @@ const insn_template i386_optab[] = { "shrd", 3, 0xfac, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2514,10 +2514,10 @@ const insn_template i386_optab[] = { "shrd", 3, 0xfad, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2530,10 +2530,10 @@ const insn_template i386_optab[] = { "shrd", 2, 0xfad, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2543,50 +2543,50 @@ const insn_template i386_optab[] = { "call", 1, 0xe8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "call", 1, 0xe8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "call", 1, 0xff, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "call", 1, 0xff, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "call", 2, 0x9a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2596,20 +2596,20 @@ const insn_template i386_optab[] = { "call", 1, 0xff, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "lcall", 2, 0x9a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2619,50 +2619,50 @@ const insn_template i386_optab[] = { "lcall", 1, 0xff, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "jmp", 1, 0xeb, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jmp", 1, 0xff, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "jmp", 1, 0xff, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "jmp", 2, 0xea, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2672,20 +2672,20 @@ const insn_template i386_optab[] = { "jmp", 1, 0xff, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "ljmp", 2, 0xea, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2695,100 +2695,100 @@ const insn_template i386_optab[] = { "ljmp", 1, 0xff, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "ret", 0, 0xc3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ret", 1, 0xc2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ret", 0, 0xc3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ret", 1, 0xc2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "lret", 0, 0xcb, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "lret", 1, 0xca, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "retf", 0, 0xcb, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "retf", 1, 0xca, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "enter", 2, 0xc8, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2798,10 +2798,10 @@ const insn_template i386_optab[] = { "enter", 2, 0xc8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -2811,780 +2811,780 @@ const insn_template i386_optab[] = { "leave", 0, 0xc9, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "leave", 0, 0xc9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jo", 1, 0x70, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jno", 1, 0x71, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jb", 1, 0x72, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jc", 1, 0x72, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jnae", 1, 0x72, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jnb", 1, 0x73, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jnc", 1, 0x73, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jae", 1, 0x73, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "je", 1, 0x74, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jz", 1, 0x74, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jne", 1, 0x75, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jnz", 1, 0x75, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jbe", 1, 0x76, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jna", 1, 0x76, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jnbe", 1, 0x77, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ja", 1, 0x77, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "js", 1, 0x78, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jns", 1, 0x79, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jp", 1, 0x7a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jpe", 1, 0x7a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jnp", 1, 0x7b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jpo", 1, 0x7b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jl", 1, 0x7c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jnge", 1, 0x7c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jnl", 1, 0x7d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jge", 1, 0x7d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jle", 1, 0x7e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jng", 1, 0x7e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jnle", 1, 0x7f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jg", 1, 0x7f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jcxz", 1, 0xe3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jecxz", 1, 0xe3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jecxz", 1, 0x67e3, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "jrcxz", 1, 0xe3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "loop", 1, 0xe2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "loop", 1, 0xe2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "loopz", 1, 0xe1, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "loopz", 1, 0xe1, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "loope", 1, 0xe1, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "loope", 1, 0xe1, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "loopnz", 1, 0xe0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "loopnz", 1, 0xe0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "loopne", 1, 0xe0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "loopne", 1, 0xe0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "seto", 1, 0xf90, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setno", 1, 0xf91, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setb", 1, 0xf92, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setc", 1, 0xf92, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setnae", 1, 0xf92, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setnb", 1, 0xf93, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setnc", 1, 0xf93, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setae", 1, 0xf93, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "sete", 1, 0xf94, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setz", 1, 0xf94, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setne", 1, 0xf95, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setnz", 1, 0xf95, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setbe", 1, 0xf96, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setna", 1, 0xf96, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setnbe", 1, 0xf97, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "seta", 1, 0xf97, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "sets", 1, 0xf98, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setns", 1, 0xf99, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setp", 1, 0xf9a, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setpe", 1, 0xf9a, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setnp", 1, 0xf9b, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setpo", 1, 0xf9b, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setl", 1, 0xf9c, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setnge", 1, 0xf9c, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setnl", 1, 0xf9d, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setge", 1, 0xf9d, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setle", 1, 0xf9e, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setng", 1, 0xf9e, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setnle", 1, 0xf9f, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "setg", 1, 0xf9f, 0x0, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "cmps", 0, 0xa6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cmps", 2, 0xa6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -3594,20 +3594,20 @@ const insn_template i386_optab[] = { "scmp", 0, 0xa6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "scmp", 2, 0xa6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -3617,20 +3617,20 @@ const insn_template i386_optab[] = { "ins", 0, 0x6c, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ins", 2, 0x6c, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -3640,20 +3640,20 @@ const insn_template i386_optab[] = { "outs", 0, 0x6e, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "outs", 2, 0x6e, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -3663,30 +3663,30 @@ const insn_template i386_optab[] = { "lods", 0, 0xac, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "lods", 1, 0xac, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "lods", 2, 0xac, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -3696,30 +3696,30 @@ const insn_template i386_optab[] = { "slod", 0, 0xac, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "slod", 1, 0xac, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "slod", 2, 0xac, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -3729,20 +3729,20 @@ const insn_template i386_optab[] = { "movs", 0, 0xa4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "movs", 2, 0xa4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -3752,20 +3752,20 @@ const insn_template i386_optab[] = { "smov", 0, 0xa4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "smov", 2, 0xa4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -3775,30 +3775,30 @@ const insn_template i386_optab[] = { "scas", 0, 0xae, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "scas", 1, 0xae, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "scas", 2, 0xae, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -3808,30 +3808,30 @@ const insn_template i386_optab[] = { "ssca", 0, 0xae, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ssca", 1, 0xae, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "ssca", 2, 0xae, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -3841,30 +3841,30 @@ const insn_template i386_optab[] = { "stos", 0, 0xaa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "stos", 1, 0xaa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "stos", 2, 0xaa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, @@ -3874,30 +3874,30 @@ const insn_template i386_optab[] = { "ssto", 0, 0xaa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ssto", 1, 0xaa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "ssto", 2, 0xaa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, @@ -3907,30 +3907,30 @@ const insn_template i386_optab[] = { "xlat", 0, 0xd7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xlat", 1, 0xd7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "bsf", 2, 0xfbc, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -3940,10 +3940,10 @@ const insn_template i386_optab[] = { "bsr", 2, 0xfbd, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -3953,10 +3953,10 @@ const insn_template i386_optab[] = { "bt", 2, 0xfa3, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -3966,10 +3966,10 @@ const insn_template i386_optab[] = { "bt", 2, 0xfba, 0x4, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -3979,10 +3979,10 @@ const insn_template i386_optab[] = { "btc", 2, 0xfbb, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -3992,10 +3992,10 @@ const insn_template i386_optab[] = { "btc", 2, 0xfba, 0x7, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -4005,10 +4005,10 @@ const insn_template i386_optab[] = { "btr", 2, 0xfb3, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -4018,10 +4018,10 @@ const insn_template i386_optab[] = { "btr", 2, 0xfba, 0x6, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -4031,10 +4031,10 @@ const insn_template i386_optab[] = { "bts", 2, 0xfab, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -4044,10 +4044,10 @@ const insn_template i386_optab[] = { "bts", 2, 0xfba, 0x5, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -4057,60 +4057,60 @@ const insn_template i386_optab[] = { "int", 1, 0xcd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "int3", 0, 0xcc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "into", 0, 0xce, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "iret", 0, 0xcf, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rsm", 0, 0xfaa, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "bound", 2, 0x62, None, 1, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -4120,40 +4120,40 @@ const insn_template i386_optab[] = { "hlt", 0, 0xf4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "nop", 1, 0xf1f, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "nop", 0, 0x90, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "arpl", 2, 0x63, None, 1, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -4163,10 +4163,10 @@ const insn_template i386_optab[] = { "lar", 2, 0xf02, None, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -4176,70 +4176,70 @@ const insn_template i386_optab[] = { "lgdt", 1, 0xf01, 0x2, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0 } } } }, { "lgdt", 1, 0xf01, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } } } }, { "lidt", 1, 0xf01, 0x3, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "lidt", 1, 0xf01, 0x3, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } } } }, { "lldt", 1, 0xf00, 0x2, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "lmsw", 1, 0xf01, 0x6, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "lsl", 2, 0xf03, None, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -4249,630 +4249,630 @@ const insn_template i386_optab[] = { "ltr", 1, 0xf00, 0x3, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "sgdt", 1, 0xf01, 0x0, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "sgdt", 1, 0xf01, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } } } }, { "sidt", 1, 0xf01, 0x1, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "sidt", 1, 0xf01, 0x1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } } } }, { "sldt", 1, 0xf00, 0x0, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "sldt", 1, 0xf00, 0x0, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "smsw", 1, 0xf01, 0x4, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "smsw", 1, 0xf01, 0x4, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "str", 1, 0xf00, 0x1, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "str", 1, 0xf00, 0x1, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "verr", 1, 0xf00, 0x4, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "verw", 1, 0xf00, 0x5, 2, { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fld", 1, 0xd9c0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fld", 1, 0xd9, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fld", 1, 0xd9c0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fld", 1, 0xdb, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } } } }, { "fild", 1, 0xdf, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fild", 1, 0xdf, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fildll", 1, 0xdf, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fldt", 1, 0xdb, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } } } }, { "fbld", 1, 0xdf, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } } } }, { "fst", 1, 0xddd0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fst", 1, 0xd9, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fst", 1, 0xddd0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fist", 1, 0xdf, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fstp", 1, 0xddd8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fstp", 1, 0xd9, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fstp", 1, 0xddd8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fstp", 1, 0xdb, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } } } }, { "fistp", 1, 0xdf, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fistp", 1, 0xdf, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fistpll", 1, 0xdf, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fstpt", 1, 0xdb, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } } } }, { "fbstp", 1, 0xdf, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } } } }, { "fxch", 1, 0xd9c8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fxch", 0, 0xd9c9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fcom", 1, 0xd8d0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fcom", 0, 0xd8d1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fcom", 1, 0xd8, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fcom", 1, 0xd8d0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ficom", 1, 0xde, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fcomp", 1, 0xd8d8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fcomp", 0, 0xd8d9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fcomp", 1, 0xd8, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fcomp", 1, 0xd8d8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ficomp", 1, 0xde, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fcompp", 0, 0xded9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fucom", 1, 0xdde0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fucom", 0, 0xdde1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fucomp", 1, 0xdde8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fucomp", 0, 0xdde9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fucompp", 0, 0xdae9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ftst", 0, 0xd9e4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fxam", 0, 0xd9e5, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fld1", 0, 0xd9e8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fldl2t", 0, 0xd9e9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fldl2e", 0, 0xd9ea, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fldpi", 0, 0xd9eb, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fldlg2", 0, 0xd9ec, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fldln2", 0, 0xd9ed, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fldz", 0, 0xd9ee, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fadd", 2, 0xd8c0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -4882,50 +4882,50 @@ const insn_template i386_optab[] = { "fadd", 1, 0xd8c0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fadd", 0, 0xdec1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fadd", 1, 0xd8, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fiadd", 1, 0xde, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "faddp", 2, 0xdec0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -4935,30 +4935,30 @@ const insn_template i386_optab[] = { "faddp", 1, 0xdec0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "faddp", 0, 0xdec1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "faddp", 2, 0xdec0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -4968,20 +4968,20 @@ const insn_template i386_optab[] = { "fsub", 1, 0xd8e0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsub", 2, 0xd8e0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -4991,30 +4991,30 @@ const insn_template i386_optab[] = { "fsub", 0, 0xdee1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsub", 0, 0xdee9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsub", 2, 0xd8e0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5024,30 +5024,30 @@ const insn_template i386_optab[] = { "fsub", 1, 0xd8, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fisub", 1, 0xde, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fsubp", 2, 0xdee0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5057,30 +5057,30 @@ const insn_template i386_optab[] = { "fsubp", 1, 0xdee0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsubp", 0, 0xdee1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsubp", 2, 0xdee0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5090,10 +5090,10 @@ const insn_template i386_optab[] = { "fsubp", 2, 0xdee9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5103,10 +5103,10 @@ const insn_template i386_optab[] = { "fsubp", 2, 0xdee8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5116,40 +5116,40 @@ const insn_template i386_optab[] = { "fsubp", 1, 0xdee8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsubp", 0, 0xdee9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsubr", 1, 0xd8e8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsubr", 2, 0xd8e8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5159,30 +5159,30 @@ const insn_template i386_optab[] = { "fsubr", 0, 0xdee9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsubr", 0, 0xdee1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsubr", 2, 0xd8e8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5192,30 +5192,30 @@ const insn_template i386_optab[] = { "fsubr", 1, 0xd8, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fisubr", 1, 0xde, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fsubrp", 2, 0xdee8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5225,30 +5225,30 @@ const insn_template i386_optab[] = { "fsubrp", 1, 0xdee8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsubrp", 0, 0xdee9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsubrp", 2, 0xdee8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5258,10 +5258,10 @@ const insn_template i386_optab[] = { "fsubrp", 2, 0xdee0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5271,10 +5271,10 @@ const insn_template i386_optab[] = { "fsubrp", 2, 0xdee0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5284,30 +5284,30 @@ const insn_template i386_optab[] = { "fsubrp", 1, 0xdee0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsubrp", 0, 0xdee1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fmul", 2, 0xd8c8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5317,50 +5317,50 @@ const insn_template i386_optab[] = { "fmul", 1, 0xd8c8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fmul", 0, 0xdec9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fmul", 1, 0xd8, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fimul", 1, 0xde, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fmulp", 2, 0xdec8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5370,30 +5370,30 @@ const insn_template i386_optab[] = { "fmulp", 1, 0xdec8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fmulp", 0, 0xdec9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fmulp", 2, 0xdec8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5403,20 +5403,20 @@ const insn_template i386_optab[] = { "fdiv", 1, 0xd8f0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdiv", 2, 0xd8f0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5426,30 +5426,30 @@ const insn_template i386_optab[] = { "fdiv", 0, 0xdef1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdiv", 0, 0xdef9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdiv", 2, 0xd8f0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5459,30 +5459,30 @@ const insn_template i386_optab[] = { "fdiv", 1, 0xd8, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fidiv", 1, 0xde, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fdivp", 2, 0xdef0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5492,30 +5492,30 @@ const insn_template i386_optab[] = { "fdivp", 1, 0xdef0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdivp", 0, 0xdef1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdivp", 2, 0xdef0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5525,10 +5525,10 @@ const insn_template i386_optab[] = { "fdivp", 2, 0xdef8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5538,10 +5538,10 @@ const insn_template i386_optab[] = { "fdivp", 2, 0xdef8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5551,40 +5551,40 @@ const insn_template i386_optab[] = { "fdivp", 1, 0xdef8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdivp", 0, 0xdef9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdivr", 1, 0xd8f8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdivr", 2, 0xd8f8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5594,30 +5594,30 @@ const insn_template i386_optab[] = { "fdivr", 0, 0xdef9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdivr", 0, 0xdef1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdivr", 2, 0xd8f8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5627,30 +5627,30 @@ const insn_template i386_optab[] = { "fdivr", 1, 0xd8, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fidivr", 1, 0xde, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fdivrp", 2, 0xdef8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5660,30 +5660,30 @@ const insn_template i386_optab[] = { "fdivrp", 1, 0xdef8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdivrp", 0, 0xdef9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdivrp", 2, 0xdef8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 1, 1, 0 }, + 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5693,10 +5693,10 @@ const insn_template i386_optab[] = { "fdivrp", 2, 0xdef0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5706,10 +5706,10 @@ const insn_template i386_optab[] = { "fdivrp", 2, 0xdef0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -5719,1060 +5719,1060 @@ const insn_template i386_optab[] = { "fdivrp", 1, 0xdef0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdivrp", 0, 0xdef1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "f2xm1", 0, 0xd9f0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fyl2x", 0, 0xd9f1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fptan", 0, 0xd9f2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fpatan", 0, 0xd9f3, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fxtract", 0, 0xd9f4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fprem1", 0, 0xd9f5, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdecstp", 0, 0xd9f6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fincstp", 0, 0xd9f7, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fprem", 0, 0xd9f8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fyl2xp1", 0, 0xd9f9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsqrt", 0, 0xd9fa, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsincos", 0, 0xd9fb, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "frndint", 0, 0xd9fc, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fscale", 0, 0xd9fd, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsin", 0, 0xd9fe, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fcos", 0, 0xd9ff, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fchs", 0, 0xd9e0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fabs", 0, 0xd9e1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fninit", 0, 0xdbe3, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "finit", 0, 0xdbe3, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fldcw", 1, 0xd9, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fnstcw", 1, 0xd9, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fstcw", 1, 0xd9, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fnstsw", 1, 0xdfe0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fnstsw", 1, 0xdd, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fnstsw", 0, 0xdfe0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fstsw", 1, 0xdfe0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fstsw", 1, 0xdd, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fstsw", 0, 0xdfe0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fnclex", 0, 0xdbe2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fclex", 0, 0xdbe2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fnstenv", 1, 0xd9, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fstenv", 1, 0xd9, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fldenv", 1, 0xd9, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fnsave", 1, 0xdd, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fsave", 1, 0xdd, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "frstor", 1, 0xdd, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fneni", 0, 0xdbe0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "feni", 0, 0xdbe0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fndisi", 0, 0xdbe1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fdisi", 0, 0xdbe1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fnsetpm", 0, 0xdbe4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fsetpm", 0, 0xdbe4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "frstpm", 0, 0xdbe5, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ffree", 1, 0xddc0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ffreep", 1, 0xdfc0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fnop", 0, 0xd9d0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fwait", 0, 0x9b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "addr16", 0, 0x67, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "addr32", 0, 0x67, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "aword", 0, 0x67, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "adword", 0, 0x67, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "data16", 0, 0x66, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "data32", 0, 0x66, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "word", 0, 0x66, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "dword", 0, 0x66, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "lock", 0, 0xf0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "wait", 0, 0x9b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cs", 0, 0x2e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ds", 0, 0x3e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "es", 0, 0x26, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fs", 0, 0x64, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "gs", 0, 0x65, None, 1, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ss", 0, 0x36, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rep", 0, 0xf3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "repe", 0, 0xf3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "repz", 0, 0xf3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "repne", 0, 0xf2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "repnz", 0, 0xf2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ht", 0, 0x3e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "hnt", 0, 0x2e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex", 0, 0x40, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rexz", 0, 0x41, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rexy", 0, 0x42, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rexyz", 0, 0x43, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rexx", 0, 0x44, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rexxz", 0, 0x45, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rexxy", 0, 0x46, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rexxyz", 0, 0x47, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex64", 0, 0x48, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex64z", 0, 0x49, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex64y", 0, 0x4a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex64yz", 0, 0x4b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex64x", 0, 0x4c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex64xz", 0, 0x4d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex64xy", 0, 0x4e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex64xyz", 0, 0x4f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.b", 0, 0x41, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.x", 0, 0x42, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.xb", 0, 0x43, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.r", 0, 0x44, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.rb", 0, 0x45, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.rx", 0, 0x46, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.rxb", 0, 0x47, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.w", 0, 0x48, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.wb", 0, 0x49, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.wx", 0, 0x4a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.wxb", 0, 0x4b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.wr", 0, 0x4c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.wrb", 0, 0x4d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.wrx", 0, 0x4e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rex.wrxb", 0, 0x4f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "bswap", 1, 0xfc8, None, 2, { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xadd", 2, 0xfc0, None, 2, { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -6782,10 +6782,10 @@ const insn_template i386_optab[] = { "cmpxchg", 2, 0xfb0, None, 2, { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -6795,200 +6795,200 @@ const insn_template i386_optab[] = { "invd", 0, 0xf08, None, 2, { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "wbinvd", 0, 0xf09, None, 2, { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "invlpg", 1, 0xf01, 0x7, 2, { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "cpuid", 0, 0xfa2, None, 2, { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "wrmsr", 0, 0xf30, None, 2, { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rdtsc", 0, 0xf31, None, 2, { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rdmsr", 0, 0xf32, None, 2, { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cmpxchg8b", 1, 0xfc7, 0x1, 2, { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "sysenter", 0, 0xf34, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "sysexit", 0, 0xf35, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fxsave", 1, 0xfae, 0x0, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fxsave64", 1, 0xfae, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fxrstor", 1, 0xfae, 0x1, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fxrstor64", 1, 0xfae, 0x1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "rdpmc", 0, 0xf33, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ud2", 0, 0xf0b, None, 2, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ud2a", 0, 0xf0b, None, 2, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ud1", 0, 0xfb9, None, 2, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "ud2b", 0, 0xfb9, None, 2, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cmovo", 2, 0xf40, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -6998,10 +6998,10 @@ const insn_template i386_optab[] = { "cmovno", 2, 0xf41, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7011,10 +7011,10 @@ const insn_template i386_optab[] = { "cmovb", 2, 0xf42, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7024,10 +7024,10 @@ const insn_template i386_optab[] = { "cmovc", 2, 0xf42, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7037,10 +7037,10 @@ const insn_template i386_optab[] = { "cmovnae", 2, 0xf42, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7050,10 +7050,10 @@ const insn_template i386_optab[] = { "cmovae", 2, 0xf43, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7063,10 +7063,10 @@ const insn_template i386_optab[] = { "cmovnc", 2, 0xf43, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7076,10 +7076,10 @@ const insn_template i386_optab[] = { "cmovnb", 2, 0xf43, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7089,10 +7089,10 @@ const insn_template i386_optab[] = { "cmove", 2, 0xf44, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7102,10 +7102,10 @@ const insn_template i386_optab[] = { "cmovz", 2, 0xf44, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7115,10 +7115,10 @@ const insn_template i386_optab[] = { "cmovne", 2, 0xf45, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7128,10 +7128,10 @@ const insn_template i386_optab[] = { "cmovnz", 2, 0xf45, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7141,10 +7141,10 @@ const insn_template i386_optab[] = { "cmovbe", 2, 0xf46, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7154,10 +7154,10 @@ const insn_template i386_optab[] = { "cmovna", 2, 0xf46, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7167,10 +7167,10 @@ const insn_template i386_optab[] = { "cmova", 2, 0xf47, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7180,10 +7180,10 @@ const insn_template i386_optab[] = { "cmovnbe", 2, 0xf47, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7193,10 +7193,10 @@ const insn_template i386_optab[] = { "cmovs", 2, 0xf48, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7206,10 +7206,10 @@ const insn_template i386_optab[] = { "cmovns", 2, 0xf49, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7219,10 +7219,10 @@ const insn_template i386_optab[] = { "cmovp", 2, 0xf4a, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7232,10 +7232,10 @@ const insn_template i386_optab[] = { "cmovnp", 2, 0xf4b, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7245,10 +7245,10 @@ const insn_template i386_optab[] = { "cmovl", 2, 0xf4c, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7258,10 +7258,10 @@ const insn_template i386_optab[] = { "cmovnge", 2, 0xf4c, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7271,10 +7271,10 @@ const insn_template i386_optab[] = { "cmovge", 2, 0xf4d, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7284,10 +7284,10 @@ const insn_template i386_optab[] = { "cmovnl", 2, 0xf4d, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7297,10 +7297,10 @@ const insn_template i386_optab[] = { "cmovle", 2, 0xf4e, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7310,10 +7310,10 @@ const insn_template i386_optab[] = { "cmovng", 2, 0xf4e, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7323,10 +7323,10 @@ const insn_template i386_optab[] = { "cmovg", 2, 0xf4f, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7336,10 +7336,10 @@ const insn_template i386_optab[] = { "cmovnle", 2, 0xf4f, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7349,10 +7349,10 @@ const insn_template i386_optab[] = { "cmovpe", 2, 0xf4a, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7362,10 +7362,10 @@ const insn_template i386_optab[] = { "cmovpo", 2, 0xf4b, None, 2, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7375,10 +7375,10 @@ const insn_template i386_optab[] = { "fcmovb", 2, 0xdac0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7388,10 +7388,10 @@ const insn_template i386_optab[] = { "fcmovnae", 2, 0xdac0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7401,10 +7401,10 @@ const insn_template i386_optab[] = { "fcmove", 2, 0xdac8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7414,10 +7414,10 @@ const insn_template i386_optab[] = { "fcmovbe", 2, 0xdad0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7427,10 +7427,10 @@ const insn_template i386_optab[] = { "fcmovna", 2, 0xdad0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7440,10 +7440,10 @@ const insn_template i386_optab[] = { "fcmovu", 2, 0xdad8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7453,10 +7453,10 @@ const insn_template i386_optab[] = { "fcmovae", 2, 0xdbc0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7466,10 +7466,10 @@ const insn_template i386_optab[] = { "fcmovnb", 2, 0xdbc0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7479,10 +7479,10 @@ const insn_template i386_optab[] = { "fcmovne", 2, 0xdbc8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7492,10 +7492,10 @@ const insn_template i386_optab[] = { "fcmova", 2, 0xdbd0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7505,10 +7505,10 @@ const insn_template i386_optab[] = { "fcmovnbe", 2, 0xdbd0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7518,10 +7518,10 @@ const insn_template i386_optab[] = { "fcmovnu", 2, 0xdbd8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7531,10 +7531,10 @@ const insn_template i386_optab[] = { "fcomi", 2, 0xdbf0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7544,30 +7544,30 @@ const insn_template i386_optab[] = { "fcomi", 0, 0xdbf1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fcomi", 1, 0xdbf0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fucomi", 2, 0xdbe8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7577,30 +7577,30 @@ const insn_template i386_optab[] = { "fucomi", 0, 0xdbe9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fucomi", 1, 0xdbe8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fcomip", 2, 0xdff0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7610,30 +7610,30 @@ const insn_template i386_optab[] = { "fcomip", 0, 0xdff1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fcomip", 1, 0xdff0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fcompi", 2, 0xdff0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7643,30 +7643,30 @@ const insn_template i386_optab[] = { "fcompi", 0, 0xdff1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fcompi", 1, 0xdff0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fucomip", 2, 0xdfe8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7676,30 +7676,30 @@ const insn_template i386_optab[] = { "fucomip", 0, 0xdfe9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fucomip", 1, 0xdfe8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fucompi", 2, 0xdfe8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7709,30 +7709,30 @@ const insn_template i386_optab[] = { "fucompi", 0, 0xdfe9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "fucompi", 1, 0xdfe8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "movnti", 2, 0xfc3, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7742,60 +7742,60 @@ const insn_template i386_optab[] = { "clflush", 1, 0xfae, 0x7, 2, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "lfence", 0, 0xfae, 0xe8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "mfence", 0, 0xfae, 0xf0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "pause", 0, 0xf390, None, 2, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "emms", 0, 0xf77, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "movd", 2, 0x666e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7805,10 +7805,10 @@ const insn_template i386_optab[] = { "movd", 2, 0x666e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 3, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7818,10 +7818,10 @@ const insn_template i386_optab[] = { "movd", 2, 0x667e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7831,10 +7831,10 @@ const insn_template i386_optab[] = { "movd", 2, 0x667e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 3, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7844,10 +7844,10 @@ const insn_template i386_optab[] = { "movd", 2, 0x660f6e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7857,10 +7857,10 @@ const insn_template i386_optab[] = { "movd", 2, 0x660f6e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7870,10 +7870,10 @@ const insn_template i386_optab[] = { "movd", 2, 0x660f7e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7883,10 +7883,10 @@ const insn_template i386_optab[] = { "movd", 2, 0x660f7e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7896,10 +7896,10 @@ const insn_template i386_optab[] = { "movd", 2, 0xf6e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7909,10 +7909,10 @@ const insn_template i386_optab[] = { "movd", 2, 0xf6e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7922,10 +7922,10 @@ const insn_template i386_optab[] = { "movd", 2, 0xf7e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7935,10 +7935,10 @@ const insn_template i386_optab[] = { "movd", 2, 0xf7e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7948,10 +7948,10 @@ const insn_template i386_optab[] = { "movq", 2, 0xa0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -7961,10 +7961,10 @@ const insn_template i386_optab[] = { "movq", 2, 0x88, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7974,10 +7974,10 @@ const insn_template i386_optab[] = { "movq", 2, 0xc6, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -7987,10 +7987,10 @@ const insn_template i386_optab[] = { "movq", 2, 0xb0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -8000,10 +8000,10 @@ const insn_template i386_optab[] = { "movq", 2, 0xf37e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8013,10 +8013,10 @@ const insn_template i386_optab[] = { "movq", 2, 0x66d6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -8026,10 +8026,10 @@ const insn_template i386_optab[] = { "movq", 2, 0x666e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8039,10 +8039,10 @@ const insn_template i386_optab[] = { "movq", 2, 0x667e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -8052,10 +8052,10 @@ const insn_template i386_optab[] = { "movq", 2, 0xf30f7e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8065,10 +8065,10 @@ const insn_template i386_optab[] = { "movq", 2, 0x660fd6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -8078,10 +8078,10 @@ const insn_template i386_optab[] = { "movq", 2, 0x660f6e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8091,10 +8091,10 @@ const insn_template i386_optab[] = { "movq", 2, 0x660f7e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -8104,10 +8104,10 @@ const insn_template i386_optab[] = { "movq", 2, 0xf6f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8117,10 +8117,10 @@ const insn_template i386_optab[] = { "movq", 2, 0xf7f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -8130,10 +8130,10 @@ const insn_template i386_optab[] = { "movq", 2, 0xf6e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8143,10 +8143,10 @@ const insn_template i386_optab[] = { "movq", 2, 0xf7e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -8156,10 +8156,10 @@ const insn_template i386_optab[] = { "movq", 2, 0x8c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -8169,10 +8169,10 @@ const insn_template i386_optab[] = { "movq", 2, 0x8e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -8182,10 +8182,10 @@ const insn_template i386_optab[] = { "movq", 2, 0xf20, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -8195,10 +8195,10 @@ const insn_template i386_optab[] = { "movq", 2, 0xf21, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -8208,10 +8208,10 @@ const insn_template i386_optab[] = { "packssdw", 2, 0x666b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8221,10 +8221,10 @@ const insn_template i386_optab[] = { "packssdw", 2, 0x660f6b, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8234,10 +8234,10 @@ const insn_template i386_optab[] = { "packssdw", 2, 0xf6b, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8247,10 +8247,10 @@ const insn_template i386_optab[] = { "packsswb", 2, 0x6663, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8260,10 +8260,10 @@ const insn_template i386_optab[] = { "packsswb", 2, 0x660f63, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8273,10 +8273,10 @@ const insn_template i386_optab[] = { "packsswb", 2, 0xf63, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8286,10 +8286,10 @@ const insn_template i386_optab[] = { "packuswb", 2, 0x6667, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8299,10 +8299,10 @@ const insn_template i386_optab[] = { "packuswb", 2, 0x660f67, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8312,10 +8312,10 @@ const insn_template i386_optab[] = { "packuswb", 2, 0xf67, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8325,10 +8325,10 @@ const insn_template i386_optab[] = { "paddb", 2, 0x66fc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8338,10 +8338,10 @@ const insn_template i386_optab[] = { "paddb", 2, 0x660ffc, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8351,10 +8351,10 @@ const insn_template i386_optab[] = { "paddb", 2, 0xffc, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8364,10 +8364,10 @@ const insn_template i386_optab[] = { "paddw", 2, 0x66fd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8377,10 +8377,10 @@ const insn_template i386_optab[] = { "paddw", 2, 0x660ffd, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8390,10 +8390,10 @@ const insn_template i386_optab[] = { "paddw", 2, 0xffd, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8403,10 +8403,10 @@ const insn_template i386_optab[] = { "paddd", 2, 0x66fe, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8416,10 +8416,10 @@ const insn_template i386_optab[] = { "paddd", 2, 0x660ffe, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8429,10 +8429,10 @@ const insn_template i386_optab[] = { "paddd", 2, 0xffe, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8442,10 +8442,10 @@ const insn_template i386_optab[] = { "paddq", 2, 0x66d4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8455,10 +8455,10 @@ const insn_template i386_optab[] = { "paddq", 2, 0x660fd4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8468,10 +8468,10 @@ const insn_template i386_optab[] = { "paddq", 2, 0xfd4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8481,10 +8481,10 @@ const insn_template i386_optab[] = { "paddsb", 2, 0x66ec, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8494,10 +8494,10 @@ const insn_template i386_optab[] = { "paddsb", 2, 0x660fec, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8507,10 +8507,10 @@ const insn_template i386_optab[] = { "paddsb", 2, 0xfec, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8520,10 +8520,10 @@ const insn_template i386_optab[] = { "paddsw", 2, 0x66ed, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8533,10 +8533,10 @@ const insn_template i386_optab[] = { "paddsw", 2, 0x660fed, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8546,10 +8546,10 @@ const insn_template i386_optab[] = { "paddsw", 2, 0xfed, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8559,10 +8559,10 @@ const insn_template i386_optab[] = { "paddusb", 2, 0x66dc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8572,10 +8572,10 @@ const insn_template i386_optab[] = { "paddusb", 2, 0x660fdc, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8585,10 +8585,10 @@ const insn_template i386_optab[] = { "paddusb", 2, 0xfdc, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8598,10 +8598,10 @@ const insn_template i386_optab[] = { "paddusw", 2, 0x66dd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8611,10 +8611,10 @@ const insn_template i386_optab[] = { "paddusw", 2, 0x660fdd, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8624,10 +8624,10 @@ const insn_template i386_optab[] = { "paddusw", 2, 0xfdd, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8637,10 +8637,10 @@ const insn_template i386_optab[] = { "pand", 2, 0x66db, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8650,10 +8650,10 @@ const insn_template i386_optab[] = { "pand", 2, 0x660fdb, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8663,10 +8663,10 @@ const insn_template i386_optab[] = { "pand", 2, 0xfdb, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8676,10 +8676,10 @@ const insn_template i386_optab[] = { "pandn", 2, 0x66df, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8689,10 +8689,10 @@ const insn_template i386_optab[] = { "pandn", 2, 0x660fdf, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8702,10 +8702,10 @@ const insn_template i386_optab[] = { "pandn", 2, 0xfdf, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8715,10 +8715,10 @@ const insn_template i386_optab[] = { "pcmpeqb", 2, 0x6674, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8728,10 +8728,10 @@ const insn_template i386_optab[] = { "pcmpeqb", 2, 0x660f74, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8741,10 +8741,10 @@ const insn_template i386_optab[] = { "pcmpeqb", 2, 0xf74, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8754,10 +8754,10 @@ const insn_template i386_optab[] = { "pcmpeqw", 2, 0x6675, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8767,10 +8767,10 @@ const insn_template i386_optab[] = { "pcmpeqw", 2, 0x660f75, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8780,10 +8780,10 @@ const insn_template i386_optab[] = { "pcmpeqw", 2, 0xf75, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8793,10 +8793,10 @@ const insn_template i386_optab[] = { "pcmpeqd", 2, 0x6676, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8806,10 +8806,10 @@ const insn_template i386_optab[] = { "pcmpeqd", 2, 0x660f76, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8819,10 +8819,10 @@ const insn_template i386_optab[] = { "pcmpeqd", 2, 0xf76, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8832,10 +8832,10 @@ const insn_template i386_optab[] = { "pcmpgtb", 2, 0x6664, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8845,10 +8845,10 @@ const insn_template i386_optab[] = { "pcmpgtb", 2, 0x660f64, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8858,10 +8858,10 @@ const insn_template i386_optab[] = { "pcmpgtb", 2, 0xf64, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8871,10 +8871,10 @@ const insn_template i386_optab[] = { "pcmpgtw", 2, 0x6665, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8884,10 +8884,10 @@ const insn_template i386_optab[] = { "pcmpgtw", 2, 0x660f65, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8897,10 +8897,10 @@ const insn_template i386_optab[] = { "pcmpgtw", 2, 0xf65, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8910,10 +8910,10 @@ const insn_template i386_optab[] = { "pcmpgtd", 2, 0x6666, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8923,10 +8923,10 @@ const insn_template i386_optab[] = { "pcmpgtd", 2, 0x660f66, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8936,10 +8936,10 @@ const insn_template i386_optab[] = { "pcmpgtd", 2, 0xf66, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8949,10 +8949,10 @@ const insn_template i386_optab[] = { "pmaddwd", 2, 0x66f5, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8962,10 +8962,10 @@ const insn_template i386_optab[] = { "pmaddwd", 2, 0x660ff5, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -8975,10 +8975,10 @@ const insn_template i386_optab[] = { "pmaddwd", 2, 0xff5, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -8988,10 +8988,10 @@ const insn_template i386_optab[] = { "pmulhw", 2, 0x66e5, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9001,10 +9001,10 @@ const insn_template i386_optab[] = { "pmulhw", 2, 0x660fe5, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9014,10 +9014,10 @@ const insn_template i386_optab[] = { "pmulhw", 2, 0xfe5, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9027,10 +9027,10 @@ const insn_template i386_optab[] = { "pmullw", 2, 0x66d5, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9040,10 +9040,10 @@ const insn_template i386_optab[] = { "pmullw", 2, 0x660fd5, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9053,10 +9053,10 @@ const insn_template i386_optab[] = { "pmullw", 2, 0xfd5, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9066,10 +9066,10 @@ const insn_template i386_optab[] = { "por", 2, 0x66eb, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9079,10 +9079,10 @@ const insn_template i386_optab[] = { "por", 2, 0x660feb, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9092,10 +9092,10 @@ const insn_template i386_optab[] = { "por", 2, 0xfeb, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9105,10 +9105,10 @@ const insn_template i386_optab[] = { "psllw", 2, 0x6671, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9118,10 +9118,10 @@ const insn_template i386_optab[] = { "psllw", 2, 0x66f1, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9131,10 +9131,10 @@ const insn_template i386_optab[] = { "psllw", 2, 0x660f71, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9144,10 +9144,10 @@ const insn_template i386_optab[] = { "psllw", 2, 0x660ff1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9157,10 +9157,10 @@ const insn_template i386_optab[] = { "psllw", 2, 0xf71, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9170,10 +9170,10 @@ const insn_template i386_optab[] = { "psllw", 2, 0xff1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9183,10 +9183,10 @@ const insn_template i386_optab[] = { "pslld", 2, 0x6672, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9196,10 +9196,10 @@ const insn_template i386_optab[] = { "pslld", 2, 0x66f2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9209,10 +9209,10 @@ const insn_template i386_optab[] = { "pslld", 2, 0x660f72, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9222,10 +9222,10 @@ const insn_template i386_optab[] = { "pslld", 2, 0x660ff2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9235,10 +9235,10 @@ const insn_template i386_optab[] = { "pslld", 2, 0xf72, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9248,10 +9248,10 @@ const insn_template i386_optab[] = { "pslld", 2, 0xff2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9261,10 +9261,10 @@ const insn_template i386_optab[] = { "psllq", 2, 0x6673, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9274,10 +9274,10 @@ const insn_template i386_optab[] = { "psllq", 2, 0x66f3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9287,10 +9287,10 @@ const insn_template i386_optab[] = { "psllq", 2, 0x660f73, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9300,10 +9300,10 @@ const insn_template i386_optab[] = { "psllq", 2, 0x660ff3, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9313,10 +9313,10 @@ const insn_template i386_optab[] = { "psllq", 2, 0xf73, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9326,10 +9326,10 @@ const insn_template i386_optab[] = { "psllq", 2, 0xff3, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9339,10 +9339,10 @@ const insn_template i386_optab[] = { "psraw", 2, 0x6671, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9352,10 +9352,10 @@ const insn_template i386_optab[] = { "psraw", 2, 0x66e1, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9365,10 +9365,10 @@ const insn_template i386_optab[] = { "psraw", 2, 0x660f71, 0x4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9378,10 +9378,10 @@ const insn_template i386_optab[] = { "psraw", 2, 0x660fe1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9391,10 +9391,10 @@ const insn_template i386_optab[] = { "psraw", 2, 0xf71, 0x4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9404,10 +9404,10 @@ const insn_template i386_optab[] = { "psraw", 2, 0xfe1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9417,10 +9417,10 @@ const insn_template i386_optab[] = { "psrad", 2, 0x6672, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9430,10 +9430,10 @@ const insn_template i386_optab[] = { "psrad", 2, 0x66e2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9443,10 +9443,10 @@ const insn_template i386_optab[] = { "psrad", 2, 0x660f72, 0x4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9456,10 +9456,10 @@ const insn_template i386_optab[] = { "psrad", 2, 0x660fe2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9469,10 +9469,10 @@ const insn_template i386_optab[] = { "psrad", 2, 0xf72, 0x4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9482,10 +9482,10 @@ const insn_template i386_optab[] = { "psrad", 2, 0xfe2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9495,10 +9495,10 @@ const insn_template i386_optab[] = { "psrlw", 2, 0x6671, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9508,10 +9508,10 @@ const insn_template i386_optab[] = { "psrlw", 2, 0x66d1, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9521,10 +9521,10 @@ const insn_template i386_optab[] = { "psrlw", 2, 0x660f71, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9534,10 +9534,10 @@ const insn_template i386_optab[] = { "psrlw", 2, 0x660fd1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9547,10 +9547,10 @@ const insn_template i386_optab[] = { "psrlw", 2, 0xf71, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9560,10 +9560,10 @@ const insn_template i386_optab[] = { "psrlw", 2, 0xfd1, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9573,10 +9573,10 @@ const insn_template i386_optab[] = { "psrld", 2, 0x6672, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9586,10 +9586,10 @@ const insn_template i386_optab[] = { "psrld", 2, 0x66d2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9599,10 +9599,10 @@ const insn_template i386_optab[] = { "psrld", 2, 0x660f72, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9612,10 +9612,10 @@ const insn_template i386_optab[] = { "psrld", 2, 0x660fd2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9625,10 +9625,10 @@ const insn_template i386_optab[] = { "psrld", 2, 0xf72, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9638,10 +9638,10 @@ const insn_template i386_optab[] = { "psrld", 2, 0xfd2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9651,10 +9651,10 @@ const insn_template i386_optab[] = { "psrlq", 2, 0x6673, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9664,10 +9664,10 @@ const insn_template i386_optab[] = { "psrlq", 2, 0x66d3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9677,10 +9677,10 @@ const insn_template i386_optab[] = { "psrlq", 2, 0x660f73, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9690,10 +9690,10 @@ const insn_template i386_optab[] = { "psrlq", 2, 0x660fd3, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9703,10 +9703,10 @@ const insn_template i386_optab[] = { "psrlq", 2, 0xf73, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -9716,10 +9716,10 @@ const insn_template i386_optab[] = { "psrlq", 2, 0xfd3, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9729,10 +9729,10 @@ const insn_template i386_optab[] = { "psubb", 2, 0x66f8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9742,10 +9742,10 @@ const insn_template i386_optab[] = { "psubb", 2, 0x660ff8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9755,10 +9755,10 @@ const insn_template i386_optab[] = { "psubb", 2, 0xff8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9768,10 +9768,10 @@ const insn_template i386_optab[] = { "psubw", 2, 0x66f9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9781,10 +9781,10 @@ const insn_template i386_optab[] = { "psubw", 2, 0x660ff9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9794,10 +9794,10 @@ const insn_template i386_optab[] = { "psubw", 2, 0xff9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9807,10 +9807,10 @@ const insn_template i386_optab[] = { "psubd", 2, 0x66fa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9820,10 +9820,10 @@ const insn_template i386_optab[] = { "psubd", 2, 0x660ffa, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9833,10 +9833,10 @@ const insn_template i386_optab[] = { "psubd", 2, 0xffa, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9846,10 +9846,10 @@ const insn_template i386_optab[] = { "psubq", 2, 0x66fb, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9859,10 +9859,10 @@ const insn_template i386_optab[] = { "psubq", 2, 0x660ffb, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9872,10 +9872,10 @@ const insn_template i386_optab[] = { "psubq", 2, 0xffb, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9885,10 +9885,10 @@ const insn_template i386_optab[] = { "psubsb", 2, 0x66e8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9898,10 +9898,10 @@ const insn_template i386_optab[] = { "psubsb", 2, 0x660fe8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9911,10 +9911,10 @@ const insn_template i386_optab[] = { "psubsb", 2, 0xfe8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9924,10 +9924,10 @@ const insn_template i386_optab[] = { "psubsw", 2, 0x66e9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9937,10 +9937,10 @@ const insn_template i386_optab[] = { "psubsw", 2, 0x660fe9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9950,10 +9950,10 @@ const insn_template i386_optab[] = { "psubsw", 2, 0xfe9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -9963,10 +9963,10 @@ const insn_template i386_optab[] = { "psubusb", 2, 0x66d8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9976,10 +9976,10 @@ const insn_template i386_optab[] = { "psubusb", 2, 0x660fd8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -9989,10 +9989,10 @@ const insn_template i386_optab[] = { "psubusb", 2, 0xfd8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10002,10 +10002,10 @@ const insn_template i386_optab[] = { "psubusw", 2, 0x66d9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10015,10 +10015,10 @@ const insn_template i386_optab[] = { "psubusw", 2, 0x660fd9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10028,10 +10028,10 @@ const insn_template i386_optab[] = { "psubusw", 2, 0xfd9, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10041,10 +10041,10 @@ const insn_template i386_optab[] = { "punpckhbw", 2, 0x6668, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10054,10 +10054,10 @@ const insn_template i386_optab[] = { "punpckhbw", 2, 0x660f68, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10067,10 +10067,10 @@ const insn_template i386_optab[] = { "punpckhbw", 2, 0xf68, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10080,10 +10080,10 @@ const insn_template i386_optab[] = { "punpckhwd", 2, 0x6669, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10093,10 +10093,10 @@ const insn_template i386_optab[] = { "punpckhwd", 2, 0x660f69, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10106,10 +10106,10 @@ const insn_template i386_optab[] = { "punpckhwd", 2, 0xf69, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10119,10 +10119,10 @@ const insn_template i386_optab[] = { "punpckhdq", 2, 0x666a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10132,10 +10132,10 @@ const insn_template i386_optab[] = { "punpckhdq", 2, 0x660f6a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10145,10 +10145,10 @@ const insn_template i386_optab[] = { "punpckhdq", 2, 0xf6a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10158,10 +10158,10 @@ const insn_template i386_optab[] = { "punpcklbw", 2, 0x6660, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10171,10 +10171,10 @@ const insn_template i386_optab[] = { "punpcklbw", 2, 0x660f60, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10184,10 +10184,10 @@ const insn_template i386_optab[] = { "punpcklbw", 2, 0xf60, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10197,10 +10197,10 @@ const insn_template i386_optab[] = { "punpcklwd", 2, 0x6661, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10210,10 +10210,10 @@ const insn_template i386_optab[] = { "punpcklwd", 2, 0x660f61, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10223,10 +10223,10 @@ const insn_template i386_optab[] = { "punpcklwd", 2, 0xf61, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10236,10 +10236,10 @@ const insn_template i386_optab[] = { "punpckldq", 2, 0x6662, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10249,10 +10249,10 @@ const insn_template i386_optab[] = { "punpckldq", 2, 0x660f62, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10262,10 +10262,10 @@ const insn_template i386_optab[] = { "punpckldq", 2, 0xf62, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10275,10 +10275,10 @@ const insn_template i386_optab[] = { "pxor", 2, 0x66ef, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10288,10 +10288,10 @@ const insn_template i386_optab[] = { "pxor", 2, 0x660fef, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10301,10 +10301,10 @@ const insn_template i386_optab[] = { "pxor", 2, 0xfef, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10314,10 +10314,10 @@ const insn_template i386_optab[] = { "addps", 2, 0x58, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10327,10 +10327,10 @@ const insn_template i386_optab[] = { "addps", 2, 0xf58, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10340,10 +10340,10 @@ const insn_template i386_optab[] = { "addss", 2, 0xf358, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10353,10 +10353,10 @@ const insn_template i386_optab[] = { "addss", 2, 0xf30f58, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10366,10 +10366,10 @@ const insn_template i386_optab[] = { "andnps", 2, 0x55, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10379,10 +10379,10 @@ const insn_template i386_optab[] = { "andnps", 2, 0xf55, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10392,10 +10392,10 @@ const insn_template i386_optab[] = { "andps", 2, 0x54, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10405,10 +10405,10 @@ const insn_template i386_optab[] = { "andps", 2, 0xf54, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10418,10 +10418,10 @@ const insn_template i386_optab[] = { "cmpeqps", 2, 0xc2, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10431,10 +10431,10 @@ const insn_template i386_optab[] = { "cmpeqps", 2, 0xfc2, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10444,10 +10444,10 @@ const insn_template i386_optab[] = { "cmpeqss", 2, 0xf3c2, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10457,10 +10457,10 @@ const insn_template i386_optab[] = { "cmpeqss", 2, 0xf30fc2, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10470,10 +10470,10 @@ const insn_template i386_optab[] = { "cmpleps", 2, 0xc2, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10483,10 +10483,10 @@ const insn_template i386_optab[] = { "cmpleps", 2, 0xfc2, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10496,10 +10496,10 @@ const insn_template i386_optab[] = { "cmpless", 2, 0xf3c2, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10509,10 +10509,10 @@ const insn_template i386_optab[] = { "cmpless", 2, 0xf30fc2, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10522,10 +10522,10 @@ const insn_template i386_optab[] = { "cmpltps", 2, 0xc2, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10535,10 +10535,10 @@ const insn_template i386_optab[] = { "cmpltps", 2, 0xfc2, 0x1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10548,10 +10548,10 @@ const insn_template i386_optab[] = { "cmpltss", 2, 0xf3c2, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10561,10 +10561,10 @@ const insn_template i386_optab[] = { "cmpltss", 2, 0xf30fc2, 0x1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10574,10 +10574,10 @@ const insn_template i386_optab[] = { "cmpneqps", 2, 0xc2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10587,10 +10587,10 @@ const insn_template i386_optab[] = { "cmpneqps", 2, 0xfc2, 0x4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10600,10 +10600,10 @@ const insn_template i386_optab[] = { "cmpneqss", 2, 0xf3c2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10613,10 +10613,10 @@ const insn_template i386_optab[] = { "cmpneqss", 2, 0xf30fc2, 0x4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10626,10 +10626,10 @@ const insn_template i386_optab[] = { "cmpnleps", 2, 0xc2, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10639,10 +10639,10 @@ const insn_template i386_optab[] = { "cmpnleps", 2, 0xfc2, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10652,10 +10652,10 @@ const insn_template i386_optab[] = { "cmpnless", 2, 0xf3c2, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10665,10 +10665,10 @@ const insn_template i386_optab[] = { "cmpnless", 2, 0xf30fc2, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10678,10 +10678,10 @@ const insn_template i386_optab[] = { "cmpnltps", 2, 0xc2, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10691,10 +10691,10 @@ const insn_template i386_optab[] = { "cmpnltps", 2, 0xfc2, 0x5, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10704,10 +10704,10 @@ const insn_template i386_optab[] = { "cmpnltss", 2, 0xf3c2, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10717,10 +10717,10 @@ const insn_template i386_optab[] = { "cmpnltss", 2, 0xf30fc2, 0x5, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10730,10 +10730,10 @@ const insn_template i386_optab[] = { "cmpordps", 2, 0xc2, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10743,10 +10743,10 @@ const insn_template i386_optab[] = { "cmpordps", 2, 0xfc2, 0x7, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10756,10 +10756,10 @@ const insn_template i386_optab[] = { "cmpordss", 2, 0xf3c2, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10769,10 +10769,10 @@ const insn_template i386_optab[] = { "cmpordss", 2, 0xf30fc2, 0x7, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10782,10 +10782,10 @@ const insn_template i386_optab[] = { "cmpunordps", 2, 0xc2, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10795,10 +10795,10 @@ const insn_template i386_optab[] = { "cmpunordps", 2, 0xfc2, 0x3, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -10808,10 +10808,10 @@ const insn_template i386_optab[] = { "cmpunordss", 2, 0xf3c2, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10821,10 +10821,10 @@ const insn_template i386_optab[] = { "cmpunordss", 2, 0xf30fc2, 0x3, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10834,10 +10834,10 @@ const insn_template i386_optab[] = { "cmpps", 3, 0xc2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -10850,10 +10850,10 @@ const insn_template i386_optab[] = { "cmpps", 3, 0xfc2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -10866,10 +10866,10 @@ const insn_template i386_optab[] = { "cmpss", 3, 0xf3c2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -10882,10 +10882,10 @@ const insn_template i386_optab[] = { "cmpss", 3, 0xf30fc2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -10898,10 +10898,10 @@ const insn_template i386_optab[] = { "comiss", 2, 0x2f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10911,10 +10911,10 @@ const insn_template i386_optab[] = { "comiss", 2, 0xf2f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10924,10 +10924,10 @@ const insn_template i386_optab[] = { "cvtpi2ps", 2, 0xf2a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10937,10 +10937,10 @@ const insn_template i386_optab[] = { "cvtps2pi", 2, 0xf2d, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10950,10 +10950,10 @@ const insn_template i386_optab[] = { "cvtsi2ss", 2, 0xf32a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10963,10 +10963,10 @@ const insn_template i386_optab[] = { "cvtsi2ss", 2, 0xf32a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10976,10 +10976,10 @@ const insn_template i386_optab[] = { "cvtsi2ss", 2, 0xf30f2a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -10989,10 +10989,10 @@ const insn_template i386_optab[] = { "cvtsi2ss", 2, 0xf30f2a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11002,10 +11002,10 @@ const insn_template i386_optab[] = { "cvtss2si", 2, 0xf32d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11015,10 +11015,10 @@ const insn_template i386_optab[] = { "cvtss2si", 2, 0xf30f2d, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11028,10 +11028,10 @@ const insn_template i386_optab[] = { "cvttps2pi", 2, 0xf2c, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11041,10 +11041,10 @@ const insn_template i386_optab[] = { "cvttss2si", 2, 0xf32c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11054,10 +11054,10 @@ const insn_template i386_optab[] = { "cvttss2si", 2, 0xf30f2c, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11067,10 +11067,10 @@ const insn_template i386_optab[] = { "divps", 2, 0x5e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11080,10 +11080,10 @@ const insn_template i386_optab[] = { "divps", 2, 0xf5e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11093,10 +11093,10 @@ const insn_template i386_optab[] = { "divss", 2, 0xf35e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11106,10 +11106,10 @@ const insn_template i386_optab[] = { "divss", 2, 0xf30f5e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11119,30 +11119,30 @@ const insn_template i386_optab[] = { "ldmxcsr", 1, 0xae, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "ldmxcsr", 1, 0xfae, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "maskmovq", 2, 0xff7, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11152,10 +11152,10 @@ const insn_template i386_optab[] = { "maxps", 2, 0x5f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11165,10 +11165,10 @@ const insn_template i386_optab[] = { "maxps", 2, 0xf5f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11178,10 +11178,10 @@ const insn_template i386_optab[] = { "maxss", 2, 0xf35f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11191,10 +11191,10 @@ const insn_template i386_optab[] = { "maxss", 2, 0xf30f5f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11204,10 +11204,10 @@ const insn_template i386_optab[] = { "minps", 2, 0x5d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11217,10 +11217,10 @@ const insn_template i386_optab[] = { "minps", 2, 0xf5d, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11230,10 +11230,10 @@ const insn_template i386_optab[] = { "minss", 2, 0xf35d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11243,10 +11243,10 @@ const insn_template i386_optab[] = { "minss", 2, 0xf30f5d, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11256,10 +11256,10 @@ const insn_template i386_optab[] = { "movaps", 2, 0x28, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11269,10 +11269,10 @@ const insn_template i386_optab[] = { "movaps", 2, 0x29, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11282,10 +11282,10 @@ const insn_template i386_optab[] = { "movaps", 2, 0xf28, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11295,10 +11295,10 @@ const insn_template i386_optab[] = { "movaps", 2, 0xf29, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11308,10 +11308,10 @@ const insn_template i386_optab[] = { "movhlps", 2, 0x12, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11321,10 +11321,10 @@ const insn_template i386_optab[] = { "movhlps", 2, 0xf12, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11334,10 +11334,10 @@ const insn_template i386_optab[] = { "movhps", 2, 0x16, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11347,10 +11347,10 @@ const insn_template i386_optab[] = { "movhps", 2, 0x17, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11360,10 +11360,10 @@ const insn_template i386_optab[] = { "movhps", 2, 0xf16, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11373,10 +11373,10 @@ const insn_template i386_optab[] = { "movhps", 2, 0xf17, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11386,10 +11386,10 @@ const insn_template i386_optab[] = { "movlhps", 2, 0x16, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11399,10 +11399,10 @@ const insn_template i386_optab[] = { "movlhps", 2, 0xf16, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11412,10 +11412,10 @@ const insn_template i386_optab[] = { "movlps", 2, 0x12, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11425,10 +11425,10 @@ const insn_template i386_optab[] = { "movlps", 2, 0x13, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11438,10 +11438,10 @@ const insn_template i386_optab[] = { "movlps", 2, 0xf12, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11451,10 +11451,10 @@ const insn_template i386_optab[] = { "movlps", 2, 0xf13, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11464,10 +11464,10 @@ const insn_template i386_optab[] = { "movmskps", 2, 0x50, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11477,10 +11477,10 @@ const insn_template i386_optab[] = { "movmskps", 2, 0xf50, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11490,10 +11490,10 @@ const insn_template i386_optab[] = { "movntps", 2, 0x2b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11503,10 +11503,10 @@ const insn_template i386_optab[] = { "movntps", 2, 0xf2b, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11516,10 +11516,10 @@ const insn_template i386_optab[] = { "movntq", 2, 0xfe7, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11529,10 +11529,10 @@ const insn_template i386_optab[] = { "movntdq", 2, 0x66e7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11542,10 +11542,10 @@ const insn_template i386_optab[] = { "movntdq", 2, 0x660fe7, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11555,10 +11555,10 @@ const insn_template i386_optab[] = { "movss", 2, 0xf311, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11568,10 +11568,10 @@ const insn_template i386_optab[] = { "movss", 2, 0xf310, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11581,10 +11581,10 @@ const insn_template i386_optab[] = { "movss", 2, 0xf310, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11594,10 +11594,10 @@ const insn_template i386_optab[] = { "movss", 2, 0xf311, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11607,10 +11607,10 @@ const insn_template i386_optab[] = { "movss", 2, 0xf30f10, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11620,10 +11620,10 @@ const insn_template i386_optab[] = { "movss", 2, 0xf30f11, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11633,10 +11633,10 @@ const insn_template i386_optab[] = { "movups", 2, 0x10, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11646,10 +11646,10 @@ const insn_template i386_optab[] = { "movups", 2, 0x11, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11659,10 +11659,10 @@ const insn_template i386_optab[] = { "movups", 2, 0xf10, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11672,10 +11672,10 @@ const insn_template i386_optab[] = { "movups", 2, 0xf11, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11685,10 +11685,10 @@ const insn_template i386_optab[] = { "mulps", 2, 0x59, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11698,10 +11698,10 @@ const insn_template i386_optab[] = { "mulps", 2, 0xf59, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11711,10 +11711,10 @@ const insn_template i386_optab[] = { "mulss", 2, 0xf359, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11724,10 +11724,10 @@ const insn_template i386_optab[] = { "mulss", 2, 0xf30f59, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11737,10 +11737,10 @@ const insn_template i386_optab[] = { "orps", 2, 0x56, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11750,10 +11750,10 @@ const insn_template i386_optab[] = { "orps", 2, 0xf56, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11763,10 +11763,10 @@ const insn_template i386_optab[] = { "pavgb", 2, 0xfe0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11776,10 +11776,10 @@ const insn_template i386_optab[] = { "pavgb", 2, 0x66e0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11789,10 +11789,10 @@ const insn_template i386_optab[] = { "pavgb", 2, 0x660fe0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11802,10 +11802,10 @@ const insn_template i386_optab[] = { "pavgw", 2, 0xfe3, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -11815,10 +11815,10 @@ const insn_template i386_optab[] = { "pavgw", 2, 0x66e3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11828,10 +11828,10 @@ const insn_template i386_optab[] = { "pavgw", 2, 0x660fe3, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11841,10 +11841,10 @@ const insn_template i386_optab[] = { "pextrw", 3, 0x66c5, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11857,10 +11857,10 @@ const insn_template i386_optab[] = { "pextrw", 3, 0x6615, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11873,10 +11873,10 @@ const insn_template i386_optab[] = { "pextrw", 3, 0x660fc5, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11889,10 +11889,10 @@ const insn_template i386_optab[] = { "pextrw", 3, 0x660f3a15, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11905,10 +11905,10 @@ const insn_template i386_optab[] = { "pextrw", 3, 0xfc5, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11921,10 +11921,10 @@ const insn_template i386_optab[] = { "pinsrw", 3, 0x66c4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11937,10 +11937,10 @@ const insn_template i386_optab[] = { "pinsrw", 3, 0x660fc4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11953,10 +11953,10 @@ const insn_template i386_optab[] = { "pinsrw", 3, 0xfc4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -11969,10 +11969,10 @@ const insn_template i386_optab[] = { "pmaxsw", 2, 0x66ee, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11982,10 +11982,10 @@ const insn_template i386_optab[] = { "pmaxsw", 2, 0x660fee, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -11995,10 +11995,10 @@ const insn_template i386_optab[] = { "pmaxsw", 2, 0xfee, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12008,10 +12008,10 @@ const insn_template i386_optab[] = { "pmaxub", 2, 0x66de, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12021,10 +12021,10 @@ const insn_template i386_optab[] = { "pmaxub", 2, 0x660fde, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12034,10 +12034,10 @@ const insn_template i386_optab[] = { "pmaxub", 2, 0xfde, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12047,10 +12047,10 @@ const insn_template i386_optab[] = { "pminsw", 2, 0x66ea, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12060,10 +12060,10 @@ const insn_template i386_optab[] = { "pminsw", 2, 0x660fea, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12073,10 +12073,10 @@ const insn_template i386_optab[] = { "pminsw", 2, 0xfea, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12086,10 +12086,10 @@ const insn_template i386_optab[] = { "pminub", 2, 0x66da, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12099,10 +12099,10 @@ const insn_template i386_optab[] = { "pminub", 2, 0x660fda, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12112,10 +12112,10 @@ const insn_template i386_optab[] = { "pminub", 2, 0xfda, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12125,10 +12125,10 @@ const insn_template i386_optab[] = { "pmovmskb", 2, 0x66d7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -12138,10 +12138,10 @@ const insn_template i386_optab[] = { "pmovmskb", 2, 0x660fd7, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -12151,10 +12151,10 @@ const insn_template i386_optab[] = { "pmovmskb", 2, 0xfd7, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -12164,10 +12164,10 @@ const insn_template i386_optab[] = { "pmulhuw", 2, 0x66e4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12177,10 +12177,10 @@ const insn_template i386_optab[] = { "pmulhuw", 2, 0x660fe4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12190,10 +12190,10 @@ const insn_template i386_optab[] = { "pmulhuw", 2, 0xfe4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12203,50 +12203,50 @@ const insn_template i386_optab[] = { "prefetchnta", 1, 0xf18, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "prefetcht0", 1, 0xf18, 0x1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "prefetcht1", 1, 0xf18, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "prefetcht2", 1, 0xf18, 0x3, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "psadbw", 2, 0xff6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12256,10 +12256,10 @@ const insn_template i386_optab[] = { "psadbw", 2, 0x66f6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12269,10 +12269,10 @@ const insn_template i386_optab[] = { "psadbw", 2, 0x660ff6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12282,10 +12282,10 @@ const insn_template i386_optab[] = { "pshufw", 3, 0xf70, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -12298,10 +12298,10 @@ const insn_template i386_optab[] = { "rcpps", 2, 0x53, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12311,10 +12311,10 @@ const insn_template i386_optab[] = { "rcpps", 2, 0xf53, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12324,10 +12324,10 @@ const insn_template i386_optab[] = { "rcpss", 2, 0xf353, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12337,10 +12337,10 @@ const insn_template i386_optab[] = { "rcpss", 2, 0xf30f53, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12350,10 +12350,10 @@ const insn_template i386_optab[] = { "rsqrtps", 2, 0x52, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12363,10 +12363,10 @@ const insn_template i386_optab[] = { "rsqrtps", 2, 0xf52, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12376,10 +12376,10 @@ const insn_template i386_optab[] = { "rsqrtss", 2, 0xf352, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12389,10 +12389,10 @@ const insn_template i386_optab[] = { "rsqrtss", 2, 0xf30f52, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12402,20 +12402,20 @@ const insn_template i386_optab[] = { "sfence", 0, 0xfae, 0xf8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "shufps", 3, 0xc6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -12428,10 +12428,10 @@ const insn_template i386_optab[] = { "shufps", 3, 0xfc6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -12444,10 +12444,10 @@ const insn_template i386_optab[] = { "sqrtps", 2, 0x51, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12457,10 +12457,10 @@ const insn_template i386_optab[] = { "sqrtps", 2, 0xf51, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12470,10 +12470,10 @@ const insn_template i386_optab[] = { "sqrtss", 2, 0xf351, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12483,10 +12483,10 @@ const insn_template i386_optab[] = { "sqrtss", 2, 0xf30f51, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12496,30 +12496,30 @@ const insn_template i386_optab[] = { "stmxcsr", 1, 0xae, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "stmxcsr", 1, 0xfae, 0x3, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "subps", 2, 0x5c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12529,10 +12529,10 @@ const insn_template i386_optab[] = { "subps", 2, 0xf5c, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12542,10 +12542,10 @@ const insn_template i386_optab[] = { "subss", 2, 0xf35c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12555,10 +12555,10 @@ const insn_template i386_optab[] = { "subss", 2, 0xf30f5c, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12568,10 +12568,10 @@ const insn_template i386_optab[] = { "ucomiss", 2, 0x2e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12581,10 +12581,10 @@ const insn_template i386_optab[] = { "ucomiss", 2, 0xf2e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12594,10 +12594,10 @@ const insn_template i386_optab[] = { "unpckhps", 2, 0x15, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12607,10 +12607,10 @@ const insn_template i386_optab[] = { "unpckhps", 2, 0xf15, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12620,10 +12620,10 @@ const insn_template i386_optab[] = { "unpcklps", 2, 0x14, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12633,10 +12633,10 @@ const insn_template i386_optab[] = { "unpcklps", 2, 0xf14, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12646,10 +12646,10 @@ const insn_template i386_optab[] = { "xorps", 2, 0x57, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12659,10 +12659,10 @@ const insn_template i386_optab[] = { "xorps", 2, 0xf57, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12672,10 +12672,10 @@ const insn_template i386_optab[] = { "addpd", 2, 0x6658, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12685,10 +12685,10 @@ const insn_template i386_optab[] = { "addpd", 2, 0x660f58, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12698,10 +12698,10 @@ const insn_template i386_optab[] = { "addsd", 2, 0xf258, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12711,10 +12711,10 @@ const insn_template i386_optab[] = { "addsd", 2, 0xf20f58, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12724,10 +12724,10 @@ const insn_template i386_optab[] = { "andnpd", 2, 0x6655, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12737,10 +12737,10 @@ const insn_template i386_optab[] = { "andnpd", 2, 0x660f55, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12750,10 +12750,10 @@ const insn_template i386_optab[] = { "andpd", 2, 0x6654, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12763,10 +12763,10 @@ const insn_template i386_optab[] = { "andpd", 2, 0x660f54, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12776,10 +12776,10 @@ const insn_template i386_optab[] = { "cmpeqpd", 2, 0x66c2, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12789,10 +12789,10 @@ const insn_template i386_optab[] = { "cmpeqpd", 2, 0x660fc2, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12802,10 +12802,10 @@ const insn_template i386_optab[] = { "cmpeqsd", 2, 0xf2c2, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12815,10 +12815,10 @@ const insn_template i386_optab[] = { "cmpeqsd", 2, 0xf20fc2, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12828,10 +12828,10 @@ const insn_template i386_optab[] = { "cmplepd", 2, 0x66c2, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12841,10 +12841,10 @@ const insn_template i386_optab[] = { "cmplepd", 2, 0x660fc2, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12854,10 +12854,10 @@ const insn_template i386_optab[] = { "cmplesd", 2, 0xf2c2, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12867,10 +12867,10 @@ const insn_template i386_optab[] = { "cmplesd", 2, 0xf20fc2, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12880,10 +12880,10 @@ const insn_template i386_optab[] = { "cmpltpd", 2, 0x66c2, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12893,10 +12893,10 @@ const insn_template i386_optab[] = { "cmpltpd", 2, 0x660fc2, 0x1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12906,10 +12906,10 @@ const insn_template i386_optab[] = { "cmpltsd", 2, 0xf2c2, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12919,10 +12919,10 @@ const insn_template i386_optab[] = { "cmpltsd", 2, 0xf20fc2, 0x1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12932,10 +12932,10 @@ const insn_template i386_optab[] = { "cmpneqpd", 2, 0x66c2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12945,10 +12945,10 @@ const insn_template i386_optab[] = { "cmpneqpd", 2, 0x660fc2, 0x4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12958,10 +12958,10 @@ const insn_template i386_optab[] = { "cmpneqsd", 2, 0xf2c2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12971,10 +12971,10 @@ const insn_template i386_optab[] = { "cmpneqsd", 2, 0xf20fc2, 0x4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12984,10 +12984,10 @@ const insn_template i386_optab[] = { "cmpnlepd", 2, 0x66c2, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -12997,10 +12997,10 @@ const insn_template i386_optab[] = { "cmpnlepd", 2, 0x660fc2, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13010,10 +13010,10 @@ const insn_template i386_optab[] = { "cmpnlesd", 2, 0xf2c2, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13023,10 +13023,10 @@ const insn_template i386_optab[] = { "cmpnlesd", 2, 0xf20fc2, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13036,10 +13036,10 @@ const insn_template i386_optab[] = { "cmpnltpd", 2, 0x66c2, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13049,10 +13049,10 @@ const insn_template i386_optab[] = { "cmpnltpd", 2, 0x660fc2, 0x5, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13062,10 +13062,10 @@ const insn_template i386_optab[] = { "cmpnltsd", 2, 0xf2c2, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13075,10 +13075,10 @@ const insn_template i386_optab[] = { "cmpnltsd", 2, 0xf20fc2, 0x5, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13088,10 +13088,10 @@ const insn_template i386_optab[] = { "cmpordpd", 2, 0x66c2, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13101,10 +13101,10 @@ const insn_template i386_optab[] = { "cmpordpd", 2, 0x660fc2, 0x7, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13114,10 +13114,10 @@ const insn_template i386_optab[] = { "cmpordsd", 2, 0xf2c2, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13127,10 +13127,10 @@ const insn_template i386_optab[] = { "cmpordsd", 2, 0xf20fc2, 0x7, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13140,10 +13140,10 @@ const insn_template i386_optab[] = { "cmpunordpd", 2, 0x66c2, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13153,10 +13153,10 @@ const insn_template i386_optab[] = { "cmpunordpd", 2, 0x660fc2, 0x3, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13166,10 +13166,10 @@ const insn_template i386_optab[] = { "cmpunordsd", 2, 0xf2c2, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13179,10 +13179,10 @@ const insn_template i386_optab[] = { "cmpunordsd", 2, 0xf20fc2, 0x3, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13192,10 +13192,10 @@ const insn_template i386_optab[] = { "cmppd", 3, 0x66c2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13208,10 +13208,10 @@ const insn_template i386_optab[] = { "cmppd", 3, 0x660fc2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13224,20 +13224,20 @@ const insn_template i386_optab[] = { "cmpsd", 0, 0xa7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "cmpsd", 2, 0xa7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13247,10 +13247,10 @@ const insn_template i386_optab[] = { "cmpsd", 3, 0xf2c2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13263,10 +13263,10 @@ const insn_template i386_optab[] = { "cmpsd", 3, 0xf20fc2, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13279,10 +13279,10 @@ const insn_template i386_optab[] = { "comisd", 2, 0x662f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13292,10 +13292,10 @@ const insn_template i386_optab[] = { "comisd", 2, 0x660f2f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13305,10 +13305,10 @@ const insn_template i386_optab[] = { "cvtpi2pd", 2, 0x660f2a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13318,10 +13318,10 @@ const insn_template i386_optab[] = { "cvtsi2sd", 2, 0xf22a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13331,10 +13331,10 @@ const insn_template i386_optab[] = { "cvtsi2sd", 2, 0xf22a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13344,10 +13344,10 @@ const insn_template i386_optab[] = { "cvtsi2sd", 2, 0xf20f2a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13357,10 +13357,10 @@ const insn_template i386_optab[] = { "cvtsi2sd", 2, 0xf20f2a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13370,10 +13370,10 @@ const insn_template i386_optab[] = { "divpd", 2, 0x665e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13383,10 +13383,10 @@ const insn_template i386_optab[] = { "divpd", 2, 0x660f5e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13396,10 +13396,10 @@ const insn_template i386_optab[] = { "divsd", 2, 0xf25e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13409,10 +13409,10 @@ const insn_template i386_optab[] = { "divsd", 2, 0xf20f5e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13422,10 +13422,10 @@ const insn_template i386_optab[] = { "maxpd", 2, 0x665f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13435,10 +13435,10 @@ const insn_template i386_optab[] = { "maxpd", 2, 0x660f5f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13448,10 +13448,10 @@ const insn_template i386_optab[] = { "maxsd", 2, 0xf25f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13461,10 +13461,10 @@ const insn_template i386_optab[] = { "maxsd", 2, 0xf20f5f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13474,10 +13474,10 @@ const insn_template i386_optab[] = { "minpd", 2, 0x665d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13487,10 +13487,10 @@ const insn_template i386_optab[] = { "minpd", 2, 0x660f5d, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13500,10 +13500,10 @@ const insn_template i386_optab[] = { "minsd", 2, 0xf25d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13513,10 +13513,10 @@ const insn_template i386_optab[] = { "minsd", 2, 0xf20f5d, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13526,10 +13526,10 @@ const insn_template i386_optab[] = { "movapd", 2, 0x6628, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13539,10 +13539,10 @@ const insn_template i386_optab[] = { "movapd", 2, 0x6629, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13552,10 +13552,10 @@ const insn_template i386_optab[] = { "movapd", 2, 0x660f28, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13565,10 +13565,10 @@ const insn_template i386_optab[] = { "movapd", 2, 0x660f29, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13578,10 +13578,10 @@ const insn_template i386_optab[] = { "movhpd", 2, 0x6616, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13591,10 +13591,10 @@ const insn_template i386_optab[] = { "movhpd", 2, 0x6617, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13604,10 +13604,10 @@ const insn_template i386_optab[] = { "movhpd", 2, 0x660f16, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13617,10 +13617,10 @@ const insn_template i386_optab[] = { "movhpd", 2, 0x660f17, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13630,10 +13630,10 @@ const insn_template i386_optab[] = { "movlpd", 2, 0x6612, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13643,10 +13643,10 @@ const insn_template i386_optab[] = { "movlpd", 2, 0x6613, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13656,10 +13656,10 @@ const insn_template i386_optab[] = { "movlpd", 2, 0x660f12, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13669,10 +13669,10 @@ const insn_template i386_optab[] = { "movlpd", 2, 0x660f13, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13682,10 +13682,10 @@ const insn_template i386_optab[] = { "movmskpd", 2, 0x6650, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13695,10 +13695,10 @@ const insn_template i386_optab[] = { "movmskpd", 2, 0x660f50, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13708,10 +13708,10 @@ const insn_template i386_optab[] = { "movntpd", 2, 0x662b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13721,10 +13721,10 @@ const insn_template i386_optab[] = { "movntpd", 2, 0x660f2b, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13734,20 +13734,20 @@ const insn_template i386_optab[] = { "movsd", 0, 0xa5, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "movsd", 2, 0xa5, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13757,10 +13757,10 @@ const insn_template i386_optab[] = { "movsd", 2, 0xf211, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13770,10 +13770,10 @@ const insn_template i386_optab[] = { "movsd", 2, 0xf210, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13783,10 +13783,10 @@ const insn_template i386_optab[] = { "movsd", 2, 0xf210, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13796,10 +13796,10 @@ const insn_template i386_optab[] = { "movsd", 2, 0xf211, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13809,10 +13809,10 @@ const insn_template i386_optab[] = { "movsd", 2, 0xf20f10, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13822,10 +13822,10 @@ const insn_template i386_optab[] = { "movsd", 2, 0xf20f11, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13835,10 +13835,10 @@ const insn_template i386_optab[] = { "movupd", 2, 0x6610, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13848,10 +13848,10 @@ const insn_template i386_optab[] = { "movupd", 2, 0x6611, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13861,10 +13861,10 @@ const insn_template i386_optab[] = { "movupd", 2, 0x660f10, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13874,10 +13874,10 @@ const insn_template i386_optab[] = { "movupd", 2, 0x660f11, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13887,10 +13887,10 @@ const insn_template i386_optab[] = { "mulpd", 2, 0x6659, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13900,10 +13900,10 @@ const insn_template i386_optab[] = { "mulpd", 2, 0x660f59, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13913,10 +13913,10 @@ const insn_template i386_optab[] = { "mulsd", 2, 0xf259, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13926,10 +13926,10 @@ const insn_template i386_optab[] = { "mulsd", 2, 0xf20f59, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -13939,10 +13939,10 @@ const insn_template i386_optab[] = { "orpd", 2, 0x6656, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13952,10 +13952,10 @@ const insn_template i386_optab[] = { "orpd", 2, 0x660f56, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13965,10 +13965,10 @@ const insn_template i386_optab[] = { "shufpd", 3, 0x66c6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13981,10 +13981,10 @@ const insn_template i386_optab[] = { "shufpd", 3, 0x660fc6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -13997,10 +13997,10 @@ const insn_template i386_optab[] = { "sqrtpd", 2, 0x6651, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14010,10 +14010,10 @@ const insn_template i386_optab[] = { "sqrtpd", 2, 0x660f51, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14023,10 +14023,10 @@ const insn_template i386_optab[] = { "sqrtsd", 2, 0xf251, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14036,10 +14036,10 @@ const insn_template i386_optab[] = { "sqrtsd", 2, 0xf20f51, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14049,10 +14049,10 @@ const insn_template i386_optab[] = { "subpd", 2, 0x665c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14062,10 +14062,10 @@ const insn_template i386_optab[] = { "subpd", 2, 0x660f5c, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14075,10 +14075,10 @@ const insn_template i386_optab[] = { "subsd", 2, 0xf25c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14088,10 +14088,10 @@ const insn_template i386_optab[] = { "subsd", 2, 0xf20f5c, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14101,10 +14101,10 @@ const insn_template i386_optab[] = { "ucomisd", 2, 0x662e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14114,10 +14114,10 @@ const insn_template i386_optab[] = { "ucomisd", 2, 0x660f2e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14127,10 +14127,10 @@ const insn_template i386_optab[] = { "unpckhpd", 2, 0x6615, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14140,10 +14140,10 @@ const insn_template i386_optab[] = { "unpckhpd", 2, 0x660f15, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14153,10 +14153,10 @@ const insn_template i386_optab[] = { "unpcklpd", 2, 0x6614, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14166,10 +14166,10 @@ const insn_template i386_optab[] = { "unpcklpd", 2, 0x660f14, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14179,10 +14179,10 @@ const insn_template i386_optab[] = { "xorpd", 2, 0x6657, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14192,10 +14192,10 @@ const insn_template i386_optab[] = { "xorpd", 2, 0x660f57, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14205,10 +14205,10 @@ const insn_template i386_optab[] = { "cvtdq2pd", 2, 0xf3e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14218,10 +14218,10 @@ const insn_template i386_optab[] = { "cvtdq2pd", 2, 0xf30fe6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14231,10 +14231,10 @@ const insn_template i386_optab[] = { "cvtpd2dq", 2, 0xf2e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14244,10 +14244,10 @@ const insn_template i386_optab[] = { "cvtpd2dq", 2, 0xf20fe6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14257,10 +14257,10 @@ const insn_template i386_optab[] = { "cvtdq2ps", 2, 0x5b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14270,10 +14270,10 @@ const insn_template i386_optab[] = { "cvtdq2ps", 2, 0xf5b, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14283,10 +14283,10 @@ const insn_template i386_optab[] = { "cvtpd2pi", 2, 0x660f2d, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14296,10 +14296,10 @@ const insn_template i386_optab[] = { "cvtpd2ps", 2, 0x665a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14309,10 +14309,10 @@ const insn_template i386_optab[] = { "cvtpd2ps", 2, 0x660f5a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14322,10 +14322,10 @@ const insn_template i386_optab[] = { "cvtps2pd", 2, 0x5a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14335,10 +14335,10 @@ const insn_template i386_optab[] = { "cvtps2pd", 2, 0xf5a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14348,10 +14348,10 @@ const insn_template i386_optab[] = { "cvtps2dq", 2, 0x665b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14361,10 +14361,10 @@ const insn_template i386_optab[] = { "cvtps2dq", 2, 0x660f5b, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14374,10 +14374,10 @@ const insn_template i386_optab[] = { "cvtsd2si", 2, 0xf22d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14387,10 +14387,10 @@ const insn_template i386_optab[] = { "cvtsd2si", 2, 0xf20f2d, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14400,10 +14400,10 @@ const insn_template i386_optab[] = { "cvtsd2ss", 2, 0xf25a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14413,10 +14413,10 @@ const insn_template i386_optab[] = { "cvtsd2ss", 2, 0xf20f5a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14426,10 +14426,10 @@ const insn_template i386_optab[] = { "cvtss2sd", 2, 0xf35a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14439,10 +14439,10 @@ const insn_template i386_optab[] = { "cvtss2sd", 2, 0xf30f5a, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14452,10 +14452,10 @@ const insn_template i386_optab[] = { "cvttpd2pi", 2, 0x660f2c, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14465,10 +14465,10 @@ const insn_template i386_optab[] = { "cvttsd2si", 2, 0xf22c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14478,10 +14478,10 @@ const insn_template i386_optab[] = { "cvttsd2si", 2, 0xf20f2c, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14491,10 +14491,10 @@ const insn_template i386_optab[] = { "cvttpd2dq", 2, 0x66e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14504,10 +14504,10 @@ const insn_template i386_optab[] = { "cvttpd2dq", 2, 0x660fe6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14517,10 +14517,10 @@ const insn_template i386_optab[] = { "cvttps2dq", 2, 0xf35b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14530,10 +14530,10 @@ const insn_template i386_optab[] = { "cvttps2dq", 2, 0xf30f5b, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14543,10 +14543,10 @@ const insn_template i386_optab[] = { "maskmovdqu", 2, 0x66f7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14556,10 +14556,10 @@ const insn_template i386_optab[] = { "maskmovdqu", 2, 0x660ff7, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14569,10 +14569,10 @@ const insn_template i386_optab[] = { "movdqa", 2, 0x666f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14582,10 +14582,10 @@ const insn_template i386_optab[] = { "movdqa", 2, 0x667f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14595,10 +14595,10 @@ const insn_template i386_optab[] = { "movdqa", 2, 0x660f6f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14608,10 +14608,10 @@ const insn_template i386_optab[] = { "movdqa", 2, 0x660f7f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14621,10 +14621,10 @@ const insn_template i386_optab[] = { "movdqu", 2, 0xf36f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14634,10 +14634,10 @@ const insn_template i386_optab[] = { "movdqu", 2, 0xf37f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14647,10 +14647,10 @@ const insn_template i386_optab[] = { "movdqu", 2, 0xf30f6f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14660,10 +14660,10 @@ const insn_template i386_optab[] = { "movdqu", 2, 0xf30f7f, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14673,10 +14673,10 @@ const insn_template i386_optab[] = { "movdq2q", 2, 0xf20fd6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14686,10 +14686,10 @@ const insn_template i386_optab[] = { "movq2dq", 2, 0xf30fd6, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14699,10 +14699,10 @@ const insn_template i386_optab[] = { "pmuludq", 2, 0x66f4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14712,10 +14712,10 @@ const insn_template i386_optab[] = { "pmuludq", 2, 0x660ff4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14725,10 +14725,10 @@ const insn_template i386_optab[] = { "pmuludq", 2, 0xff4, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -14738,10 +14738,10 @@ const insn_template i386_optab[] = { "pshufd", 3, 0x6670, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14754,10 +14754,10 @@ const insn_template i386_optab[] = { "pshufd", 3, 0x660f70, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14770,10 +14770,10 @@ const insn_template i386_optab[] = { "pshufhw", 3, 0xf370, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14786,10 +14786,10 @@ const insn_template i386_optab[] = { "pshufhw", 3, 0xf30f70, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14802,10 +14802,10 @@ const insn_template i386_optab[] = { "pshuflw", 3, 0xf270, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14818,10 +14818,10 @@ const insn_template i386_optab[] = { "pshuflw", 3, 0xf20f70, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14834,10 +14834,10 @@ const insn_template i386_optab[] = { "pslldq", 2, 0x6673, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14847,10 +14847,10 @@ const insn_template i386_optab[] = { "pslldq", 2, 0x660f73, 0x7, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14860,10 +14860,10 @@ const insn_template i386_optab[] = { "psrldq", 2, 0x6673, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14873,10 +14873,10 @@ const insn_template i386_optab[] = { "psrldq", 2, 0x660f73, 0x3, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -14886,10 +14886,10 @@ const insn_template i386_optab[] = { "punpckhqdq", 2, 0x666d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14899,10 +14899,10 @@ const insn_template i386_optab[] = { "punpckhqdq", 2, 0x660f6d, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14912,10 +14912,10 @@ const insn_template i386_optab[] = { "punpcklqdq", 2, 0x666c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14925,10 +14925,10 @@ const insn_template i386_optab[] = { "punpcklqdq", 2, 0x660f6c, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14938,10 +14938,10 @@ const insn_template i386_optab[] = { "addsubpd", 2, 0x66d0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14951,10 +14951,10 @@ const insn_template i386_optab[] = { "addsubpd", 2, 0x660fd0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14964,10 +14964,10 @@ const insn_template i386_optab[] = { "addsubps", 2, 0xf2d0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14977,10 +14977,10 @@ const insn_template i386_optab[] = { "addsubps", 2, 0xf20fd0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -14990,50 +14990,50 @@ const insn_template i386_optab[] = { "cmpxchg16b", 1, 0xfc7, 0x1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } } } }, { "fisttp", 1, 0xdf, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fisttp", 1, 0xdd, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "fisttpll", 1, 0xdd, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "haddpd", 2, 0x667c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15043,10 +15043,10 @@ const insn_template i386_optab[] = { "haddpd", 2, 0x660f7c, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15056,10 +15056,10 @@ const insn_template i386_optab[] = { "haddps", 2, 0xf27c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15069,10 +15069,10 @@ const insn_template i386_optab[] = { "haddps", 2, 0xf20f7c, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15082,10 +15082,10 @@ const insn_template i386_optab[] = { "hsubpd", 2, 0x667d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15095,10 +15095,10 @@ const insn_template i386_optab[] = { "hsubpd", 2, 0x660f7d, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15108,10 +15108,10 @@ const insn_template i386_optab[] = { "hsubps", 2, 0xf27d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15121,10 +15121,10 @@ const insn_template i386_optab[] = { "hsubps", 2, 0xf20f7d, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15134,10 +15134,10 @@ const insn_template i386_optab[] = { "lddqu", 2, 0xf2f0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15147,10 +15147,10 @@ const insn_template i386_optab[] = { "lddqu", 2, 0xf20ff0, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15160,20 +15160,20 @@ const insn_template i386_optab[] = { "monitor", 0, 0xf01, 0xc8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "monitor", 3, 0xf01, 0xc8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -15186,10 +15186,10 @@ const insn_template i386_optab[] = { "monitor", 3, 0xf01, 0xc8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -15202,10 +15202,10 @@ const insn_template i386_optab[] = { "movddup", 2, 0xf212, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15215,10 +15215,10 @@ const insn_template i386_optab[] = { "movddup", 2, 0xf20f12, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15228,10 +15228,10 @@ const insn_template i386_optab[] = { "movshdup", 2, 0xf316, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15241,10 +15241,10 @@ const insn_template i386_optab[] = { "movshdup", 2, 0xf30f16, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15254,10 +15254,10 @@ const insn_template i386_optab[] = { "movsldup", 2, 0xf312, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15267,10 +15267,10 @@ const insn_template i386_optab[] = { "movsldup", 2, 0xf30f12, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15280,20 +15280,20 @@ const insn_template i386_optab[] = { "mwait", 0, 0xf01, 0xc9, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "mwait", 2, 0xf01, 0xc9, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -15303,10 +15303,10 @@ const insn_template i386_optab[] = { "mwait", 2, 0xf01, 0xc9, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -15316,70 +15316,70 @@ const insn_template i386_optab[] = { "vmcall", 0, 0xf01, 0xc1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vmclear", 1, 0x660fc7, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "vmlaunch", 0, 0xf01, 0xc2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vmresume", 0, 0xf01, 0xc3, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vmptrld", 1, 0xfc7, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "vmptrst", 1, 0xfc7, 0x7, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "vmread", 2, 0xf78, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -15389,10 +15389,10 @@ const insn_template i386_optab[] = { "vmread", 2, 0xf78, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -15402,10 +15402,10 @@ const insn_template i386_optab[] = { "vmwrite", 2, 0xf79, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15415,10 +15415,10 @@ const insn_template i386_optab[] = { "vmwrite", 2, 0xf79, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15428,40 +15428,40 @@ const insn_template i386_optab[] = { "vmxoff", 0, 0xf01, 0xc4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vmxon", 1, 0xf30fc7, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } } } }, { "getsec", 0, 0xf37, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "invept", 2, 0x660f3880, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15471,10 +15471,10 @@ const insn_template i386_optab[] = { "invept", 2, 0x660f3880, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15484,10 +15484,10 @@ const insn_template i386_optab[] = { "invvpid", 2, 0x660f3881, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15497,23 +15497,49 @@ const insn_template i386_optab[] = { "invvpid", 2, 0x660f3881, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, + { "invpcid", 2, 0x660f3882, None, 3, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "invpcid", 2, 0x660f3882, None, 3, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, { "phaddw", 2, 0x6601, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15523,10 +15549,10 @@ const insn_template i386_optab[] = { "phaddw", 2, 0x660f3801, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15536,10 +15562,10 @@ const insn_template i386_optab[] = { "phaddw", 2, 0xf3801, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15549,10 +15575,10 @@ const insn_template i386_optab[] = { "phaddd", 2, 0x6602, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15562,10 +15588,10 @@ const insn_template i386_optab[] = { "phaddd", 2, 0x660f3802, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15575,10 +15601,10 @@ const insn_template i386_optab[] = { "phaddd", 2, 0xf3802, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15588,10 +15614,10 @@ const insn_template i386_optab[] = { "phaddsw", 2, 0x6603, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15601,10 +15627,10 @@ const insn_template i386_optab[] = { "phaddsw", 2, 0x660f3803, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15614,10 +15640,10 @@ const insn_template i386_optab[] = { "phaddsw", 2, 0xf3803, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15627,10 +15653,10 @@ const insn_template i386_optab[] = { "phsubw", 2, 0x6605, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15640,10 +15666,10 @@ const insn_template i386_optab[] = { "phsubw", 2, 0x660f3805, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15653,10 +15679,10 @@ const insn_template i386_optab[] = { "phsubw", 2, 0xf3805, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15666,10 +15692,10 @@ const insn_template i386_optab[] = { "phsubd", 2, 0x6606, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15679,10 +15705,10 @@ const insn_template i386_optab[] = { "phsubd", 2, 0x660f3806, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15692,10 +15718,10 @@ const insn_template i386_optab[] = { "phsubd", 2, 0xf3806, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15705,10 +15731,10 @@ const insn_template i386_optab[] = { "phsubsw", 2, 0x6607, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15718,10 +15744,10 @@ const insn_template i386_optab[] = { "phsubsw", 2, 0x660f3807, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15731,10 +15757,10 @@ const insn_template i386_optab[] = { "phsubsw", 2, 0xf3807, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15744,10 +15770,10 @@ const insn_template i386_optab[] = { "pmaddubsw", 2, 0x6604, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15757,10 +15783,10 @@ const insn_template i386_optab[] = { "pmaddubsw", 2, 0x660f3804, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15770,10 +15796,10 @@ const insn_template i386_optab[] = { "pmaddubsw", 2, 0xf3804, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15783,10 +15809,10 @@ const insn_template i386_optab[] = { "pmulhrsw", 2, 0x660b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15796,10 +15822,10 @@ const insn_template i386_optab[] = { "pmulhrsw", 2, 0x660f380b, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15809,10 +15835,10 @@ const insn_template i386_optab[] = { "pmulhrsw", 2, 0xf380b, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15822,10 +15848,10 @@ const insn_template i386_optab[] = { "pshufb", 2, 0x6600, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15835,10 +15861,10 @@ const insn_template i386_optab[] = { "pshufb", 2, 0x660f3800, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15848,10 +15874,10 @@ const insn_template i386_optab[] = { "pshufb", 2, 0xf3800, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15861,10 +15887,10 @@ const insn_template i386_optab[] = { "psignb", 2, 0x6608, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15874,10 +15900,10 @@ const insn_template i386_optab[] = { "psignb", 2, 0x660f3808, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15887,10 +15913,10 @@ const insn_template i386_optab[] = { "psignb", 2, 0xf3808, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15900,10 +15926,10 @@ const insn_template i386_optab[] = { "psignw", 2, 0x6609, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15913,10 +15939,10 @@ const insn_template i386_optab[] = { "psignw", 2, 0x660f3809, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15926,10 +15952,10 @@ const insn_template i386_optab[] = { "psignw", 2, 0xf3809, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15939,10 +15965,10 @@ const insn_template i386_optab[] = { "psignd", 2, 0x660a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15952,10 +15978,10 @@ const insn_template i386_optab[] = { "psignd", 2, 0x660f380a, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -15965,10 +15991,10 @@ const insn_template i386_optab[] = { "psignd", 2, 0xf380a, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -15978,10 +16004,10 @@ const insn_template i386_optab[] = { "palignr", 3, 0x660f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -15994,10 +16020,10 @@ const insn_template i386_optab[] = { "palignr", 3, 0x660f3a0f, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16010,10 +16036,10 @@ const insn_template i386_optab[] = { "palignr", 3, 0xf3a0f, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16026,10 +16052,10 @@ const insn_template i386_optab[] = { "pabsb", 2, 0x661c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16039,10 +16065,10 @@ const insn_template i386_optab[] = { "pabsb", 2, 0x660f381c, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16052,10 +16078,10 @@ const insn_template i386_optab[] = { "pabsb", 2, 0xf381c, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -16065,10 +16091,10 @@ const insn_template i386_optab[] = { "pabsw", 2, 0x661d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16078,10 +16104,10 @@ const insn_template i386_optab[] = { "pabsw", 2, 0x660f381d, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16091,10 +16117,10 @@ const insn_template i386_optab[] = { "pabsw", 2, 0xf381d, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -16104,10 +16130,10 @@ const insn_template i386_optab[] = { "pabsd", 2, 0x661e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16117,10 +16143,10 @@ const insn_template i386_optab[] = { "pabsd", 2, 0x660f381e, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16130,10 +16156,10 @@ const insn_template i386_optab[] = { "pabsd", 2, 0xf381e, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -16143,10 +16169,10 @@ const insn_template i386_optab[] = { "blendpd", 3, 0x660d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16159,10 +16185,10 @@ const insn_template i386_optab[] = { "blendpd", 3, 0x660f3a0d, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16175,10 +16201,10 @@ const insn_template i386_optab[] = { "blendps", 3, 0x660c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16191,10 +16217,10 @@ const insn_template i386_optab[] = { "blendps", 3, 0x660f3a0c, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16207,10 +16233,10 @@ const insn_template i386_optab[] = { "blendvpd", 3, 0x664b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 1, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16223,10 +16249,10 @@ const insn_template i386_optab[] = { "blendvpd", 2, 0x664b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 1, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16236,10 +16262,10 @@ const insn_template i386_optab[] = { "blendvpd", 3, 0x660f3815, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16252,10 +16278,10 @@ const insn_template i386_optab[] = { "blendvpd", 2, 0x660f3815, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16265,10 +16291,10 @@ const insn_template i386_optab[] = { "blendvps", 3, 0x664a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 1, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16281,10 +16307,10 @@ const insn_template i386_optab[] = { "blendvps", 2, 0x664a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 1, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16294,10 +16320,10 @@ const insn_template i386_optab[] = { "blendvps", 3, 0x660f3814, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16310,10 +16336,10 @@ const insn_template i386_optab[] = { "blendvps", 2, 0x660f3814, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16323,10 +16349,10 @@ const insn_template i386_optab[] = { "dppd", 3, 0x6641, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16339,10 +16365,10 @@ const insn_template i386_optab[] = { "dppd", 3, 0x660f3a41, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16355,10 +16381,10 @@ const insn_template i386_optab[] = { "dpps", 3, 0x6640, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16371,10 +16397,10 @@ const insn_template i386_optab[] = { "dpps", 3, 0x660f3a40, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16387,10 +16413,10 @@ const insn_template i386_optab[] = { "extractps", 3, 0x6617, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 0, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16403,10 +16429,10 @@ const insn_template i386_optab[] = { "extractps", 3, 0x660f3a17, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16419,10 +16445,10 @@ const insn_template i386_optab[] = { "insertps", 3, 0x6621, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16435,10 +16461,10 @@ const insn_template i386_optab[] = { "insertps", 3, 0x660f3a21, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16451,10 +16477,10 @@ const insn_template i386_optab[] = { "movntdqa", 2, 0x662a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16464,10 +16490,10 @@ const insn_template i386_optab[] = { "movntdqa", 2, 0x660f382a, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16477,10 +16503,10 @@ const insn_template i386_optab[] = { "mpsadbw", 3, 0x6642, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16493,10 +16519,10 @@ const insn_template i386_optab[] = { "mpsadbw", 3, 0x660f3a42, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16509,10 +16535,10 @@ const insn_template i386_optab[] = { "packusdw", 2, 0x662b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16522,10 +16548,10 @@ const insn_template i386_optab[] = { "packusdw", 2, 0x660f382b, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16535,10 +16561,10 @@ const insn_template i386_optab[] = { "pblendvb", 3, 0x664c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 1, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16551,10 +16577,10 @@ const insn_template i386_optab[] = { "pblendvb", 2, 0x664c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 1, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16564,10 +16590,10 @@ const insn_template i386_optab[] = { "pblendvb", 3, 0x660f3810, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16580,10 +16606,10 @@ const insn_template i386_optab[] = { "pblendvb", 2, 0x660f3810, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16593,10 +16619,10 @@ const insn_template i386_optab[] = { "pblendw", 3, 0x660e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16609,10 +16635,10 @@ const insn_template i386_optab[] = { "pblendw", 3, 0x660f3a0e, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16625,10 +16651,10 @@ const insn_template i386_optab[] = { "pcmpeqq", 2, 0x6629, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16638,10 +16664,10 @@ const insn_template i386_optab[] = { "pcmpeqq", 2, 0x660f3829, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16651,10 +16677,10 @@ const insn_template i386_optab[] = { "pextrb", 3, 0x6614, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16667,10 +16693,10 @@ const insn_template i386_optab[] = { "pextrb", 3, 0x660f3a14, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16683,10 +16709,10 @@ const insn_template i386_optab[] = { "pextrd", 3, 0x6616, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16699,10 +16725,10 @@ const insn_template i386_optab[] = { "pextrd", 3, 0x660f3a16, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16715,10 +16741,10 @@ const insn_template i386_optab[] = { "pextrq", 3, 0x6616, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16731,10 +16757,10 @@ const insn_template i386_optab[] = { "pextrq", 3, 0x660f3a16, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16747,10 +16773,10 @@ const insn_template i386_optab[] = { "phminposuw", 2, 0x6641, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16760,10 +16786,10 @@ const insn_template i386_optab[] = { "phminposuw", 2, 0x660f3841, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16773,10 +16799,10 @@ const insn_template i386_optab[] = { "pinsrb", 3, 0x6620, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16789,10 +16815,10 @@ const insn_template i386_optab[] = { "pinsrb", 3, 0x660f3a20, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16805,10 +16831,10 @@ const insn_template i386_optab[] = { "pinsrd", 3, 0x6622, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 0, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16821,10 +16847,10 @@ const insn_template i386_optab[] = { "pinsrd", 3, 0x660f3a22, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16837,10 +16863,10 @@ const insn_template i386_optab[] = { "pinsrq", 3, 0x6622, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 0, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 0, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16853,10 +16879,10 @@ const insn_template i386_optab[] = { "pinsrq", 3, 0x660f3a22, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -16869,10 +16895,10 @@ const insn_template i386_optab[] = { "pmaxsb", 2, 0x663c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16882,10 +16908,10 @@ const insn_template i386_optab[] = { "pmaxsb", 2, 0x660f383c, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16895,10 +16921,10 @@ const insn_template i386_optab[] = { "pmaxsd", 2, 0x663d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16908,10 +16934,10 @@ const insn_template i386_optab[] = { "pmaxsd", 2, 0x660f383d, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16921,10 +16947,10 @@ const insn_template i386_optab[] = { "pmaxud", 2, 0x663f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16934,10 +16960,10 @@ const insn_template i386_optab[] = { "pmaxud", 2, 0x660f383f, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16947,10 +16973,10 @@ const insn_template i386_optab[] = { "pmaxuw", 2, 0x663e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16960,10 +16986,10 @@ const insn_template i386_optab[] = { "pmaxuw", 2, 0x660f383e, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16973,10 +16999,10 @@ const insn_template i386_optab[] = { "pminsb", 2, 0x6638, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16986,10 +17012,10 @@ const insn_template i386_optab[] = { "pminsb", 2, 0x660f3838, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -16999,10 +17025,10 @@ const insn_template i386_optab[] = { "pminsd", 2, 0x6639, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17012,10 +17038,10 @@ const insn_template i386_optab[] = { "pminsd", 2, 0x660f3839, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17025,10 +17051,10 @@ const insn_template i386_optab[] = { "pminud", 2, 0x663b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17038,10 +17064,10 @@ const insn_template i386_optab[] = { "pminud", 2, 0x660f383b, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17051,10 +17077,10 @@ const insn_template i386_optab[] = { "pminuw", 2, 0x663a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17064,10 +17090,10 @@ const insn_template i386_optab[] = { "pminuw", 2, 0x660f383a, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17077,10 +17103,10 @@ const insn_template i386_optab[] = { "pmovsxbw", 2, 0x6620, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17090,10 +17116,10 @@ const insn_template i386_optab[] = { "pmovsxbw", 2, 0x660f3820, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17103,10 +17129,10 @@ const insn_template i386_optab[] = { "pmovsxbd", 2, 0x6621, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17116,10 +17142,10 @@ const insn_template i386_optab[] = { "pmovsxbd", 2, 0x660f3821, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17129,10 +17155,10 @@ const insn_template i386_optab[] = { "pmovsxbq", 2, 0x6622, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17142,10 +17168,10 @@ const insn_template i386_optab[] = { "pmovsxbq", 2, 0x660f3822, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17155,10 +17181,10 @@ const insn_template i386_optab[] = { "pmovsxwd", 2, 0x6623, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17168,10 +17194,10 @@ const insn_template i386_optab[] = { "pmovsxwd", 2, 0x660f3823, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17181,10 +17207,10 @@ const insn_template i386_optab[] = { "pmovsxwq", 2, 0x6624, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17194,10 +17220,10 @@ const insn_template i386_optab[] = { "pmovsxwq", 2, 0x660f3824, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17207,10 +17233,10 @@ const insn_template i386_optab[] = { "pmovsxdq", 2, 0x6625, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17220,10 +17246,10 @@ const insn_template i386_optab[] = { "pmovsxdq", 2, 0x660f3825, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17233,10 +17259,10 @@ const insn_template i386_optab[] = { "pmovzxbw", 2, 0x6630, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17246,10 +17272,10 @@ const insn_template i386_optab[] = { "pmovzxbw", 2, 0x660f3830, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17259,10 +17285,10 @@ const insn_template i386_optab[] = { "pmovzxbd", 2, 0x6631, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17272,10 +17298,10 @@ const insn_template i386_optab[] = { "pmovzxbd", 2, 0x660f3831, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17285,10 +17311,10 @@ const insn_template i386_optab[] = { "pmovzxbq", 2, 0x6632, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17298,10 +17324,10 @@ const insn_template i386_optab[] = { "pmovzxbq", 2, 0x660f3832, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17311,10 +17337,10 @@ const insn_template i386_optab[] = { "pmovzxwd", 2, 0x6633, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17324,10 +17350,10 @@ const insn_template i386_optab[] = { "pmovzxwd", 2, 0x660f3833, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17337,10 +17363,10 @@ const insn_template i386_optab[] = { "pmovzxwq", 2, 0x6634, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17350,10 +17376,10 @@ const insn_template i386_optab[] = { "pmovzxwq", 2, 0x660f3834, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17363,10 +17389,10 @@ const insn_template i386_optab[] = { "pmovzxdq", 2, 0x6635, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17376,10 +17402,10 @@ const insn_template i386_optab[] = { "pmovzxdq", 2, 0x660f3835, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17389,10 +17415,10 @@ const insn_template i386_optab[] = { "pmuldq", 2, 0x6628, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17402,10 +17428,10 @@ const insn_template i386_optab[] = { "pmuldq", 2, 0x660f3828, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17415,10 +17441,10 @@ const insn_template i386_optab[] = { "pmulld", 2, 0x6640, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17428,10 +17454,10 @@ const insn_template i386_optab[] = { "pmulld", 2, 0x660f3840, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17441,10 +17467,10 @@ const insn_template i386_optab[] = { "ptest", 2, 0x6617, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17454,10 +17480,10 @@ const insn_template i386_optab[] = { "ptest", 2, 0x660f3817, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17467,10 +17493,10 @@ const insn_template i386_optab[] = { "roundpd", 3, 0x6609, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17483,10 +17509,10 @@ const insn_template i386_optab[] = { "roundpd", 3, 0x660f3a09, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17499,10 +17525,10 @@ const insn_template i386_optab[] = { "roundps", 3, 0x6608, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17515,10 +17541,10 @@ const insn_template i386_optab[] = { "roundps", 3, 0x660f3a08, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17531,10 +17557,10 @@ const insn_template i386_optab[] = { "roundsd", 3, 0x660b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 3, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17547,10 +17573,10 @@ const insn_template i386_optab[] = { "roundsd", 3, 0x660f3a0b, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17563,10 +17589,10 @@ const insn_template i386_optab[] = { "roundss", 3, 0x660a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17579,10 +17605,10 @@ const insn_template i386_optab[] = { "roundss", 3, 0x660f3a0a, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17595,10 +17621,10 @@ const insn_template i386_optab[] = { "pcmpgtq", 2, 0x6637, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17608,10 +17634,10 @@ const insn_template i386_optab[] = { "pcmpgtq", 2, 0x660f3837, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17621,10 +17647,10 @@ const insn_template i386_optab[] = { "pcmpestri", 3, 0x6661, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17637,10 +17663,10 @@ const insn_template i386_optab[] = { "pcmpestri", 3, 0x660f3a61, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17653,10 +17679,10 @@ const insn_template i386_optab[] = { "pcmpestrm", 3, 0x6660, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17669,10 +17695,10 @@ const insn_template i386_optab[] = { "pcmpestrm", 3, 0x660f3a60, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17685,10 +17711,10 @@ const insn_template i386_optab[] = { "pcmpistri", 3, 0x6663, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17701,10 +17727,10 @@ const insn_template i386_optab[] = { "pcmpistri", 3, 0x660f3a63, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17717,10 +17743,10 @@ const insn_template i386_optab[] = { "pcmpistrm", 3, 0x6662, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17733,10 +17759,10 @@ const insn_template i386_optab[] = { "pcmpistrm", 3, 0x660f3a62, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -17749,10 +17775,10 @@ const insn_template i386_optab[] = { "crc32", 2, 0xf20f38f1, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17762,10 +17788,10 @@ const insn_template i386_optab[] = { "crc32", 2, 0xf20f38f1, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17775,10 +17801,10 @@ const insn_template i386_optab[] = { "crc32", 2, 0xf20f38f0, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17788,10 +17814,10 @@ const insn_template i386_optab[] = { "crc32", 2, 0xf20f38f0, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -17800,91 +17826,91 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "xsave", 1, 0xfae, 0x4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "xsave64", 1, 0xfae, 0x4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "xrstor", 1, 0xfae, 0x5, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "xrstor64", 1, 0xfae, 0x5, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "xgetbv", 0, 0xf01, 0xd0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xsetbv", 0, 0xf01, 0xd1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xsaveopt", 1, 0xfae, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "xsaveopt64", 1, 0xfae, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "aesdec", 2, 0x66de, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17893,11 +17919,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "aesdec", 2, 0x660f38de, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17906,11 +17932,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "aesdeclast", 2, 0x66df, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17919,11 +17945,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "aesdeclast", 2, 0x660f38df, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17932,11 +17958,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "aesenc", 2, 0x66dc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17945,11 +17971,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "aesenc", 2, 0x660f38dc, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17958,11 +17984,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "aesenclast", 2, 0x66dd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17971,11 +17997,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "aesenclast", 2, 0x660f38dd, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17984,11 +18010,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "aesimc", 2, 0x66db, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -17997,11 +18023,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "aesimc", 2, 0x660f38db, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18010,11 +18036,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "aeskeygenassist", 3, 0x66df, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18026,11 +18052,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "aeskeygenassist", 3, 0x660f3adf, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18042,11 +18068,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "pclmulqdq", 3, 0x6644, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18058,11 +18084,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "pclmulqdq", 3, 0x660f3a44, None, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18074,11 +18100,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "pclmullqlqdq", 2, 0x6644, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18087,11 +18113,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "pclmullqlqdq", 2, 0x660f3a44, 0x0, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18100,11 +18126,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "pclmulhqlqdq", 2, 0x6644, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18113,11 +18139,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "pclmulhqlqdq", 2, 0x660f3a44, 0x1, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18126,11 +18152,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "pclmullqhqdq", 2, 0x6644, 0x10, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18139,11 +18165,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "pclmullqhqdq", 2, 0x660f3a44, 0x10, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18152,11 +18178,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "pclmulhqhqdq", 2, 0x6644, 0x11, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 1, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18165,11 +18191,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "pclmulhqhqdq", 2, 0x660f3a44, 0x11, 3, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18179,10 +18205,10 @@ const insn_template i386_optab[] = { "vaddpd", 3, 0x6658, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18195,10 +18221,10 @@ const insn_template i386_optab[] = { "vaddpd", 3, 0x6658, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18211,10 +18237,10 @@ const insn_template i386_optab[] = { "vaddps", 3, 0x58, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18227,10 +18253,10 @@ const insn_template i386_optab[] = { "vaddps", 3, 0x58, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18243,10 +18269,10 @@ const insn_template i386_optab[] = { "vaddsd", 3, 0xf258, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -18259,10 +18285,10 @@ const insn_template i386_optab[] = { "vaddss", 3, 0xf358, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -18275,10 +18301,10 @@ const insn_template i386_optab[] = { "vaddsubpd", 3, 0x66d0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18291,10 +18317,10 @@ const insn_template i386_optab[] = { "vaddsubpd", 3, 0x66d0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18307,10 +18333,10 @@ const insn_template i386_optab[] = { "vaddsubps", 3, 0xf2d0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18323,10 +18349,10 @@ const insn_template i386_optab[] = { "vaddsubps", 3, 0xf2d0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18339,10 +18365,10 @@ const insn_template i386_optab[] = { "vandnpd", 3, 0x6655, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18355,10 +18381,10 @@ const insn_template i386_optab[] = { "vandnpd", 3, 0x6655, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18371,10 +18397,10 @@ const insn_template i386_optab[] = { "vandnps", 3, 0x55, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18387,10 +18413,10 @@ const insn_template i386_optab[] = { "vandnps", 3, 0x55, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18403,10 +18429,10 @@ const insn_template i386_optab[] = { "vandpd", 3, 0x6654, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18419,10 +18445,10 @@ const insn_template i386_optab[] = { "vandpd", 3, 0x6654, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18435,10 +18461,10 @@ const insn_template i386_optab[] = { "vandps", 3, 0x54, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18451,10 +18477,10 @@ const insn_template i386_optab[] = { "vandps", 3, 0x54, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18467,10 +18493,10 @@ const insn_template i386_optab[] = { "vblendpd", 4, 0x660d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18486,10 +18512,10 @@ const insn_template i386_optab[] = { "vblendpd", 4, 0x660d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18505,10 +18531,10 @@ const insn_template i386_optab[] = { "vblendps", 4, 0x660c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18524,10 +18550,10 @@ const insn_template i386_optab[] = { "vblendps", 4, 0x660c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18543,10 +18569,10 @@ const insn_template i386_optab[] = { "vblendvpd", 4, 0x664b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18562,10 +18588,10 @@ const insn_template i386_optab[] = { "vblendvpd", 4, 0x664b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18581,10 +18607,10 @@ const insn_template i386_optab[] = { "vblendvps", 4, 0x664a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18600,10 +18626,10 @@ const insn_template i386_optab[] = { "vblendvps", 4, 0x664a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -18619,10 +18645,10 @@ const insn_template i386_optab[] = { "vbroadcastf128", 2, 0x661a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18632,23 +18658,36 @@ const insn_template i386_optab[] = { "vbroadcastsd", 2, 0x6619, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, + { "vbroadcastsd", 2, 0x6619, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, { "vbroadcastss", 2, 0x6618, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -18658,23 +18697,49 @@ const insn_template i386_optab[] = { "vbroadcastss", 2, 0x6618, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, + { "vbroadcastss", 2, 0x6618, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vbroadcastss", 2, 0x6618, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, { "vcmpeq_ospd", 3, 0x66c2, 0x10, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18687,10 +18752,10 @@ const insn_template i386_optab[] = { "vcmpeq_ospd", 3, 0x66c2, 0x10, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18703,10 +18768,10 @@ const insn_template i386_optab[] = { "vcmpeq_osps", 3, 0xc2, 0x10, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18719,10 +18784,10 @@ const insn_template i386_optab[] = { "vcmpeq_osps", 3, 0xc2, 0x10, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18735,10 +18800,10 @@ const insn_template i386_optab[] = { "vcmpeq_ossd", 3, 0xf2c2, 0x10, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -18751,10 +18816,10 @@ const insn_template i386_optab[] = { "vcmpeq_osss", 3, 0xf3c2, 0x10, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -18767,10 +18832,10 @@ const insn_template i386_optab[] = { "vcmpeqpd", 3, 0x66c2, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18783,10 +18848,10 @@ const insn_template i386_optab[] = { "vcmpeqpd", 3, 0x66c2, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18799,10 +18864,10 @@ const insn_template i386_optab[] = { "vcmpeqps", 3, 0xc2, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18815,10 +18880,10 @@ const insn_template i386_optab[] = { "vcmpeqps", 3, 0xc2, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18831,10 +18896,10 @@ const insn_template i386_optab[] = { "vcmpeqsd", 3, 0xf2c2, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -18847,10 +18912,10 @@ const insn_template i386_optab[] = { "vcmpeqss", 3, 0xf3c2, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -18863,10 +18928,10 @@ const insn_template i386_optab[] = { "vcmpeq_uqpd", 3, 0x66c2, 0x8, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18879,10 +18944,10 @@ const insn_template i386_optab[] = { "vcmpeq_uqpd", 3, 0x66c2, 0x8, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18895,10 +18960,10 @@ const insn_template i386_optab[] = { "vcmpeq_uqps", 3, 0xc2, 0x8, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18911,10 +18976,10 @@ const insn_template i386_optab[] = { "vcmpeq_uqps", 3, 0xc2, 0x8, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18927,10 +18992,10 @@ const insn_template i386_optab[] = { "vcmpeq_uqsd", 3, 0xf2c2, 0x8, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -18943,10 +19008,10 @@ const insn_template i386_optab[] = { "vcmpeq_uqss", 3, 0xf3c2, 0x8, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -18959,10 +19024,10 @@ const insn_template i386_optab[] = { "vcmpeq_uspd", 3, 0x66c2, 0x18, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -18975,10 +19040,10 @@ const insn_template i386_optab[] = { "vcmpeq_uspd", 3, 0x66c2, 0x18, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -18991,10 +19056,10 @@ const insn_template i386_optab[] = { "vcmpeq_usps", 3, 0xc2, 0x18, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19007,10 +19072,10 @@ const insn_template i386_optab[] = { "vcmpeq_usps", 3, 0xc2, 0x18, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19023,10 +19088,10 @@ const insn_template i386_optab[] = { "vcmpeq_ussd", 3, 0xf2c2, 0x18, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19039,10 +19104,10 @@ const insn_template i386_optab[] = { "vcmpeq_usss", 3, 0xf3c2, 0x18, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19055,10 +19120,10 @@ const insn_template i386_optab[] = { "vcmpfalse_ospd", 3, 0x66c2, 0x1b, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19071,10 +19136,10 @@ const insn_template i386_optab[] = { "vcmpfalse_ospd", 3, 0x66c2, 0x1b, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19087,10 +19152,10 @@ const insn_template i386_optab[] = { "vcmpfalse_osps", 3, 0xc2, 0x1b, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19103,10 +19168,10 @@ const insn_template i386_optab[] = { "vcmpfalse_osps", 3, 0xc2, 0x1b, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19119,10 +19184,10 @@ const insn_template i386_optab[] = { "vcmpfalse_ossd", 3, 0xf2c2, 0x1b, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19135,10 +19200,10 @@ const insn_template i386_optab[] = { "vcmpfalse_osss", 3, 0xf3c2, 0x1b, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19151,10 +19216,10 @@ const insn_template i386_optab[] = { "vcmpfalsepd", 3, 0x66c2, 0xb, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19167,10 +19232,10 @@ const insn_template i386_optab[] = { "vcmpfalsepd", 3, 0x66c2, 0xb, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19183,10 +19248,10 @@ const insn_template i386_optab[] = { "vcmpfalseps", 3, 0xc2, 0xb, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19199,10 +19264,10 @@ const insn_template i386_optab[] = { "vcmpfalseps", 3, 0xc2, 0xb, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19215,10 +19280,10 @@ const insn_template i386_optab[] = { "vcmpfalsesd", 3, 0xf2c2, 0xb, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19231,10 +19296,10 @@ const insn_template i386_optab[] = { "vcmpfalsess", 3, 0xf3c2, 0xb, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19247,10 +19312,10 @@ const insn_template i386_optab[] = { "vcmpge_oqpd", 3, 0x66c2, 0x1d, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19263,10 +19328,10 @@ const insn_template i386_optab[] = { "vcmpge_oqpd", 3, 0x66c2, 0x1d, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19279,10 +19344,10 @@ const insn_template i386_optab[] = { "vcmpge_oqps", 3, 0xc2, 0x1d, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19295,10 +19360,10 @@ const insn_template i386_optab[] = { "vcmpge_oqps", 3, 0xc2, 0x1d, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19311,10 +19376,10 @@ const insn_template i386_optab[] = { "vcmpge_oqsd", 3, 0xf2c2, 0x1d, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19327,10 +19392,10 @@ const insn_template i386_optab[] = { "vcmpge_oqss", 3, 0xf3c2, 0x1d, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19343,10 +19408,10 @@ const insn_template i386_optab[] = { "vcmpgepd", 3, 0x66c2, 0xd, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19359,10 +19424,10 @@ const insn_template i386_optab[] = { "vcmpgepd", 3, 0x66c2, 0xd, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19375,10 +19440,10 @@ const insn_template i386_optab[] = { "vcmpgeps", 3, 0xc2, 0xd, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19391,10 +19456,10 @@ const insn_template i386_optab[] = { "vcmpgeps", 3, 0xc2, 0xd, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19407,10 +19472,10 @@ const insn_template i386_optab[] = { "vcmpgesd", 3, 0xf2c2, 0xd, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19423,10 +19488,10 @@ const insn_template i386_optab[] = { "vcmpgess", 3, 0xf3c2, 0xd, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19439,10 +19504,10 @@ const insn_template i386_optab[] = { "vcmpgt_oqpd", 3, 0x66c2, 0x1e, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19455,10 +19520,10 @@ const insn_template i386_optab[] = { "vcmpgt_oqpd", 3, 0x66c2, 0x1e, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19471,10 +19536,10 @@ const insn_template i386_optab[] = { "vcmpgt_oqps", 3, 0xc2, 0x1e, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19487,10 +19552,10 @@ const insn_template i386_optab[] = { "vcmpgt_oqps", 3, 0xc2, 0x1e, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19503,10 +19568,10 @@ const insn_template i386_optab[] = { "vcmpgt_oqsd", 3, 0xf2c2, 0x1e, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19519,10 +19584,10 @@ const insn_template i386_optab[] = { "vcmpgt_oqss", 3, 0xf3c2, 0x1e, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19535,10 +19600,10 @@ const insn_template i386_optab[] = { "vcmpgtpd", 3, 0x66c2, 0xe, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19551,10 +19616,10 @@ const insn_template i386_optab[] = { "vcmpgtpd", 3, 0x66c2, 0xe, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19567,10 +19632,10 @@ const insn_template i386_optab[] = { "vcmpgtps", 3, 0xc2, 0xe, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19583,10 +19648,10 @@ const insn_template i386_optab[] = { "vcmpgtps", 3, 0xc2, 0xe, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19599,10 +19664,10 @@ const insn_template i386_optab[] = { "vcmpgtsd", 3, 0xf2c2, 0xe, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19615,10 +19680,10 @@ const insn_template i386_optab[] = { "vcmpgtss", 3, 0xf3c2, 0xe, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19631,10 +19696,10 @@ const insn_template i386_optab[] = { "vcmple_oqpd", 3, 0x66c2, 0x12, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19647,10 +19712,10 @@ const insn_template i386_optab[] = { "vcmple_oqpd", 3, 0x66c2, 0x12, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19663,10 +19728,10 @@ const insn_template i386_optab[] = { "vcmple_oqps", 3, 0xc2, 0x12, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19679,10 +19744,10 @@ const insn_template i386_optab[] = { "vcmple_oqps", 3, 0xc2, 0x12, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19695,10 +19760,10 @@ const insn_template i386_optab[] = { "vcmple_oqsd", 3, 0xf2c2, 0x12, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19711,10 +19776,10 @@ const insn_template i386_optab[] = { "vcmple_oqss", 3, 0xf3c2, 0x12, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19727,10 +19792,10 @@ const insn_template i386_optab[] = { "vcmplepd", 3, 0x66c2, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19743,10 +19808,10 @@ const insn_template i386_optab[] = { "vcmplepd", 3, 0x66c2, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19759,10 +19824,10 @@ const insn_template i386_optab[] = { "vcmpleps", 3, 0xc2, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19775,10 +19840,10 @@ const insn_template i386_optab[] = { "vcmpleps", 3, 0xc2, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19791,10 +19856,10 @@ const insn_template i386_optab[] = { "vcmplesd", 3, 0xf2c2, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19807,10 +19872,10 @@ const insn_template i386_optab[] = { "vcmpless", 3, 0xf3c2, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19823,10 +19888,10 @@ const insn_template i386_optab[] = { "vcmplt_oqpd", 3, 0x66c2, 0x11, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19839,10 +19904,10 @@ const insn_template i386_optab[] = { "vcmplt_oqpd", 3, 0x66c2, 0x11, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19855,10 +19920,10 @@ const insn_template i386_optab[] = { "vcmplt_oqps", 3, 0xc2, 0x11, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19871,10 +19936,10 @@ const insn_template i386_optab[] = { "vcmplt_oqps", 3, 0xc2, 0x11, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19887,10 +19952,10 @@ const insn_template i386_optab[] = { "vcmplt_oqsd", 3, 0xf2c2, 0x11, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19903,10 +19968,10 @@ const insn_template i386_optab[] = { "vcmplt_oqss", 3, 0xf3c2, 0x11, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19919,10 +19984,10 @@ const insn_template i386_optab[] = { "vcmpltpd", 3, 0x66c2, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19935,10 +20000,10 @@ const insn_template i386_optab[] = { "vcmpltpd", 3, 0x66c2, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19951,10 +20016,10 @@ const insn_template i386_optab[] = { "vcmpltps", 3, 0xc2, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -19967,10 +20032,10 @@ const insn_template i386_optab[] = { "vcmpltps", 3, 0xc2, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -19983,10 +20048,10 @@ const insn_template i386_optab[] = { "vcmpltsd", 3, 0xf2c2, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -19999,10 +20064,10 @@ const insn_template i386_optab[] = { "vcmpltss", 3, 0xf3c2, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20015,10 +20080,10 @@ const insn_template i386_optab[] = { "vcmpneq_oqpd", 3, 0x66c2, 0xc, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20031,10 +20096,10 @@ const insn_template i386_optab[] = { "vcmpneq_oqpd", 3, 0x66c2, 0xc, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20047,10 +20112,10 @@ const insn_template i386_optab[] = { "vcmpneq_oqps", 3, 0xc2, 0xc, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20063,10 +20128,10 @@ const insn_template i386_optab[] = { "vcmpneq_oqps", 3, 0xc2, 0xc, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20079,10 +20144,10 @@ const insn_template i386_optab[] = { "vcmpneq_oqsd", 3, 0xf2c2, 0xc, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20095,10 +20160,10 @@ const insn_template i386_optab[] = { "vcmpneq_oqss", 3, 0xf3c2, 0xc, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20111,10 +20176,10 @@ const insn_template i386_optab[] = { "vcmpneq_ospd", 3, 0x66c2, 0x1c, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20127,10 +20192,10 @@ const insn_template i386_optab[] = { "vcmpneq_ospd", 3, 0x66c2, 0x1c, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20143,10 +20208,10 @@ const insn_template i386_optab[] = { "vcmpneq_osps", 3, 0xc2, 0x1c, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20159,10 +20224,10 @@ const insn_template i386_optab[] = { "vcmpneq_osps", 3, 0xc2, 0x1c, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20175,10 +20240,10 @@ const insn_template i386_optab[] = { "vcmpneq_ossd", 3, 0xf2c2, 0x1c, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20191,10 +20256,10 @@ const insn_template i386_optab[] = { "vcmpneq_osss", 3, 0xf3c2, 0x1c, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20207,10 +20272,10 @@ const insn_template i386_optab[] = { "vcmpneqpd", 3, 0x66c2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20223,10 +20288,10 @@ const insn_template i386_optab[] = { "vcmpneqpd", 3, 0x66c2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20239,10 +20304,10 @@ const insn_template i386_optab[] = { "vcmpneqps", 3, 0xc2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20255,10 +20320,10 @@ const insn_template i386_optab[] = { "vcmpneqps", 3, 0xc2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20271,10 +20336,10 @@ const insn_template i386_optab[] = { "vcmpneqsd", 3, 0xf2c2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20287,10 +20352,10 @@ const insn_template i386_optab[] = { "vcmpneqss", 3, 0xf3c2, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20303,10 +20368,10 @@ const insn_template i386_optab[] = { "vcmpneq_uspd", 3, 0x66c2, 0x14, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20319,10 +20384,10 @@ const insn_template i386_optab[] = { "vcmpneq_uspd", 3, 0x66c2, 0x14, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20335,10 +20400,10 @@ const insn_template i386_optab[] = { "vcmpneq_usps", 3, 0xc2, 0x14, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20351,10 +20416,10 @@ const insn_template i386_optab[] = { "vcmpneq_usps", 3, 0xc2, 0x14, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20367,10 +20432,10 @@ const insn_template i386_optab[] = { "vcmpneq_ussd", 3, 0xf2c2, 0x14, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20383,10 +20448,10 @@ const insn_template i386_optab[] = { "vcmpneq_usss", 3, 0xf3c2, 0x14, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20399,10 +20464,10 @@ const insn_template i386_optab[] = { "vcmpngepd", 3, 0x66c2, 0x9, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20415,10 +20480,10 @@ const insn_template i386_optab[] = { "vcmpngepd", 3, 0x66c2, 0x9, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20431,10 +20496,10 @@ const insn_template i386_optab[] = { "vcmpngeps", 3, 0xc2, 0x9, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20447,10 +20512,10 @@ const insn_template i386_optab[] = { "vcmpngeps", 3, 0xc2, 0x9, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20463,10 +20528,10 @@ const insn_template i386_optab[] = { "vcmpngesd", 3, 0xf2c2, 0x9, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20479,10 +20544,10 @@ const insn_template i386_optab[] = { "vcmpngess", 3, 0xf3c2, 0x9, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20495,10 +20560,10 @@ const insn_template i386_optab[] = { "vcmpnge_uqpd", 3, 0x66c2, 0x19, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20511,10 +20576,10 @@ const insn_template i386_optab[] = { "vcmpnge_uqpd", 3, 0x66c2, 0x19, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20527,10 +20592,10 @@ const insn_template i386_optab[] = { "vcmpnge_uqps", 3, 0xc2, 0x19, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20543,10 +20608,10 @@ const insn_template i386_optab[] = { "vcmpnge_uqps", 3, 0xc2, 0x19, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20559,10 +20624,10 @@ const insn_template i386_optab[] = { "vcmpnge_uqsd", 3, 0xf2c2, 0x19, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20575,10 +20640,10 @@ const insn_template i386_optab[] = { "vcmpnge_uqss", 3, 0xf3c2, 0x19, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20591,10 +20656,10 @@ const insn_template i386_optab[] = { "vcmpngtpd", 3, 0x66c2, 0xa, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20607,10 +20672,10 @@ const insn_template i386_optab[] = { "vcmpngtpd", 3, 0x66c2, 0xa, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20623,10 +20688,10 @@ const insn_template i386_optab[] = { "vcmpngtps", 3, 0xc2, 0xa, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20639,10 +20704,10 @@ const insn_template i386_optab[] = { "vcmpngtps", 3, 0xc2, 0xa, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20655,10 +20720,10 @@ const insn_template i386_optab[] = { "vcmpngtsd", 3, 0xf2c2, 0xa, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20671,10 +20736,10 @@ const insn_template i386_optab[] = { "vcmpngtss", 3, 0xf3c2, 0xa, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20687,10 +20752,10 @@ const insn_template i386_optab[] = { "vcmpngt_uqpd", 3, 0x66c2, 0x1a, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20703,10 +20768,10 @@ const insn_template i386_optab[] = { "vcmpngt_uqpd", 3, 0x66c2, 0x1a, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20719,10 +20784,10 @@ const insn_template i386_optab[] = { "vcmpngt_uqps", 3, 0xc2, 0x1a, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20735,10 +20800,10 @@ const insn_template i386_optab[] = { "vcmpngt_uqps", 3, 0xc2, 0x1a, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20751,10 +20816,10 @@ const insn_template i386_optab[] = { "vcmpngt_uqsd", 3, 0xf2c2, 0x1a, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20767,10 +20832,10 @@ const insn_template i386_optab[] = { "vcmpngt_uqss", 3, 0xf3c2, 0x1a, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20783,10 +20848,10 @@ const insn_template i386_optab[] = { "vcmpnlepd", 3, 0x66c2, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20799,10 +20864,10 @@ const insn_template i386_optab[] = { "vcmpnlepd", 3, 0x66c2, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20815,10 +20880,10 @@ const insn_template i386_optab[] = { "vcmpnleps", 3, 0xc2, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20831,10 +20896,10 @@ const insn_template i386_optab[] = { "vcmpnleps", 3, 0xc2, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20847,10 +20912,10 @@ const insn_template i386_optab[] = { "vcmpnlesd", 3, 0xf2c2, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20863,10 +20928,10 @@ const insn_template i386_optab[] = { "vcmpnless", 3, 0xf3c2, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20879,10 +20944,10 @@ const insn_template i386_optab[] = { "vcmpnle_uqpd", 3, 0x66c2, 0x16, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20895,10 +20960,10 @@ const insn_template i386_optab[] = { "vcmpnle_uqpd", 3, 0x66c2, 0x16, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20911,10 +20976,10 @@ const insn_template i386_optab[] = { "vcmpnle_uqps", 3, 0xc2, 0x16, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20927,10 +20992,10 @@ const insn_template i386_optab[] = { "vcmpnle_uqps", 3, 0xc2, 0x16, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -20943,10 +21008,10 @@ const insn_template i386_optab[] = { "vcmpnle_uqsd", 3, 0xf2c2, 0x16, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20959,10 +21024,10 @@ const insn_template i386_optab[] = { "vcmpnle_uqss", 3, 0xf3c2, 0x16, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -20975,10 +21040,10 @@ const insn_template i386_optab[] = { "vcmpnltpd", 3, 0x66c2, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20991,10 +21056,10 @@ const insn_template i386_optab[] = { "vcmpnltpd", 3, 0x66c2, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21007,10 +21072,10 @@ const insn_template i386_optab[] = { "vcmpnltps", 3, 0xc2, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21023,10 +21088,10 @@ const insn_template i386_optab[] = { "vcmpnltps", 3, 0xc2, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21039,10 +21104,10 @@ const insn_template i386_optab[] = { "vcmpnltsd", 3, 0xf2c2, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21055,10 +21120,10 @@ const insn_template i386_optab[] = { "vcmpnltss", 3, 0xf3c2, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21071,10 +21136,10 @@ const insn_template i386_optab[] = { "vcmpnlt_uqpd", 3, 0x66c2, 0x15, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21087,10 +21152,10 @@ const insn_template i386_optab[] = { "vcmpnlt_uqpd", 3, 0x66c2, 0x15, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21103,10 +21168,10 @@ const insn_template i386_optab[] = { "vcmpnlt_uqps", 3, 0xc2, 0x15, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21119,10 +21184,10 @@ const insn_template i386_optab[] = { "vcmpnlt_uqps", 3, 0xc2, 0x15, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21135,10 +21200,10 @@ const insn_template i386_optab[] = { "vcmpnlt_uqsd", 3, 0xf2c2, 0x15, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21151,10 +21216,10 @@ const insn_template i386_optab[] = { "vcmpnlt_uqss", 3, 0xf3c2, 0x15, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21167,10 +21232,10 @@ const insn_template i386_optab[] = { "vcmpordpd", 3, 0x66c2, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21183,10 +21248,10 @@ const insn_template i386_optab[] = { "vcmpordpd", 3, 0x66c2, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21199,10 +21264,10 @@ const insn_template i386_optab[] = { "vcmpordps", 3, 0xc2, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21215,10 +21280,10 @@ const insn_template i386_optab[] = { "vcmpordps", 3, 0xc2, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21231,10 +21296,10 @@ const insn_template i386_optab[] = { "vcmpordsd", 3, 0xf2c2, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21247,10 +21312,10 @@ const insn_template i386_optab[] = { "vcmpord_spd", 3, 0x66c2, 0x17, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21263,10 +21328,10 @@ const insn_template i386_optab[] = { "vcmpord_spd", 3, 0x66c2, 0x17, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21279,10 +21344,10 @@ const insn_template i386_optab[] = { "vcmpord_sps", 3, 0xc2, 0x17, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21295,10 +21360,10 @@ const insn_template i386_optab[] = { "vcmpord_sps", 3, 0xc2, 0x17, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21311,10 +21376,10 @@ const insn_template i386_optab[] = { "vcmpordss", 3, 0xf3c2, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21327,10 +21392,10 @@ const insn_template i386_optab[] = { "vcmpord_ssd", 3, 0xf2c2, 0x17, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21343,10 +21408,10 @@ const insn_template i386_optab[] = { "vcmpord_sss", 3, 0xf3c2, 0x17, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21359,10 +21424,10 @@ const insn_template i386_optab[] = { "vcmppd", 4, 0x66c2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -21378,10 +21443,10 @@ const insn_template i386_optab[] = { "vcmppd", 4, 0x66c2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -21397,10 +21462,10 @@ const insn_template i386_optab[] = { "vcmpps", 4, 0xc2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -21416,10 +21481,10 @@ const insn_template i386_optab[] = { "vcmpps", 4, 0xc2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -21435,10 +21500,10 @@ const insn_template i386_optab[] = { "vcmpsd", 4, 0xf2c2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -21454,10 +21519,10 @@ const insn_template i386_optab[] = { "vcmpss", 4, 0xf3c2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -21473,10 +21538,10 @@ const insn_template i386_optab[] = { "vcmptruepd", 3, 0x66c2, 0xf, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21489,10 +21554,10 @@ const insn_template i386_optab[] = { "vcmptruepd", 3, 0x66c2, 0xf, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21505,10 +21570,10 @@ const insn_template i386_optab[] = { "vcmptrueps", 3, 0xc2, 0xf, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21521,10 +21586,10 @@ const insn_template i386_optab[] = { "vcmptrueps", 3, 0xc2, 0xf, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21537,10 +21602,10 @@ const insn_template i386_optab[] = { "vcmptruesd", 3, 0xf2c2, 0xf, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21553,10 +21618,10 @@ const insn_template i386_optab[] = { "vcmptruess", 3, 0xf3c2, 0xf, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21569,10 +21634,10 @@ const insn_template i386_optab[] = { "vcmptrue_uspd", 3, 0x66c2, 0x1f, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21585,10 +21650,10 @@ const insn_template i386_optab[] = { "vcmptrue_uspd", 3, 0x66c2, 0x1f, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21601,10 +21666,10 @@ const insn_template i386_optab[] = { "vcmptrue_usps", 3, 0xc2, 0x1f, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21617,10 +21682,10 @@ const insn_template i386_optab[] = { "vcmptrue_usps", 3, 0xc2, 0x1f, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21633,10 +21698,10 @@ const insn_template i386_optab[] = { "vcmptrue_ussd", 3, 0xf2c2, 0x1f, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21649,10 +21714,10 @@ const insn_template i386_optab[] = { "vcmptrue_usss", 3, 0xf3c2, 0x1f, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21665,10 +21730,10 @@ const insn_template i386_optab[] = { "vcmpunordpd", 3, 0x66c2, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21681,10 +21746,10 @@ const insn_template i386_optab[] = { "vcmpunordpd", 3, 0x66c2, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21697,10 +21762,10 @@ const insn_template i386_optab[] = { "vcmpunordps", 3, 0xc2, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21713,10 +21778,10 @@ const insn_template i386_optab[] = { "vcmpunordps", 3, 0xc2, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21729,10 +21794,10 @@ const insn_template i386_optab[] = { "vcmpunordsd", 3, 0xf2c2, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21745,10 +21810,10 @@ const insn_template i386_optab[] = { "vcmpunord_spd", 3, 0x66c2, 0x13, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21761,10 +21826,10 @@ const insn_template i386_optab[] = { "vcmpunord_spd", 3, 0x66c2, 0x13, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21777,10 +21842,10 @@ const insn_template i386_optab[] = { "vcmpunord_sps", 3, 0xc2, 0x13, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21793,10 +21858,10 @@ const insn_template i386_optab[] = { "vcmpunord_sps", 3, 0xc2, 0x13, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21809,10 +21874,10 @@ const insn_template i386_optab[] = { "vcmpunordss", 3, 0xf3c2, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21825,10 +21890,10 @@ const insn_template i386_optab[] = { "vcmpunord_ssd", 3, 0xf2c2, 0x13, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21841,10 +21906,10 @@ const insn_template i386_optab[] = { "vcmpunord_sss", 3, 0xf3c2, 0x13, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21857,10 +21922,10 @@ const insn_template i386_optab[] = { "vcomisd", 2, 0x662f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21870,10 +21935,10 @@ const insn_template i386_optab[] = { "vcomiss", 2, 0x2f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21883,10 +21948,10 @@ const insn_template i386_optab[] = { "vcvtdq2pd", 2, 0xf3e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -21896,10 +21961,10 @@ const insn_template i386_optab[] = { "vcvtdq2pd", 2, 0xf3e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21909,10 +21974,10 @@ const insn_template i386_optab[] = { "vcvtdq2ps", 2, 0x5b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -21922,10 +21987,10 @@ const insn_template i386_optab[] = { "vcvtdq2ps", 2, 0x5b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -21935,10 +22000,10 @@ const insn_template i386_optab[] = { "vcvtpd2dq", 2, 0xf2e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -21948,10 +22013,10 @@ const insn_template i386_optab[] = { "vcvtpd2dq", 2, 0xf2e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } }, @@ -21961,10 +22026,10 @@ const insn_template i386_optab[] = { "vcvtpd2dq", 2, 0xf2e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -21974,10 +22039,10 @@ const insn_template i386_optab[] = { "vcvtpd2dq", 2, 0xf2e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } }, @@ -21987,10 +22052,10 @@ const insn_template i386_optab[] = { "vcvtpd2dqx", 2, 0xf2e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22000,10 +22065,10 @@ const insn_template i386_optab[] = { "vcvtpd2dqy", 2, 0xf2e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22013,10 +22078,10 @@ const insn_template i386_optab[] = { "vcvtpd2ps", 2, 0x665a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22026,10 +22091,10 @@ const insn_template i386_optab[] = { "vcvtpd2ps", 2, 0x665a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } }, @@ -22039,10 +22104,10 @@ const insn_template i386_optab[] = { "vcvtpd2ps", 2, 0x665a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22052,10 +22117,10 @@ const insn_template i386_optab[] = { "vcvtpd2ps", 2, 0x665a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } }, @@ -22065,10 +22130,10 @@ const insn_template i386_optab[] = { "vcvtpd2psx", 2, 0x665a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22078,10 +22143,10 @@ const insn_template i386_optab[] = { "vcvtpd2psy", 2, 0x665a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22091,10 +22156,10 @@ const insn_template i386_optab[] = { "vcvtps2dq", 2, 0x665b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22104,10 +22169,10 @@ const insn_template i386_optab[] = { "vcvtps2dq", 2, 0x665b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22117,10 +22182,10 @@ const insn_template i386_optab[] = { "vcvtps2pd", 2, 0x5a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22130,10 +22195,10 @@ const insn_template i386_optab[] = { "vcvtps2pd", 2, 0x5a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22143,10 +22208,10 @@ const insn_template i386_optab[] = { "vcvtsd2si", 2, 0xf22d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22156,10 +22221,10 @@ const insn_template i386_optab[] = { "vcvtsd2ss", 3, 0xf25a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22172,10 +22237,10 @@ const insn_template i386_optab[] = { "vcvtsi2sd", 3, 0xf22a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22188,10 +22253,10 @@ const insn_template i386_optab[] = { "vcvtsi2sd", 3, 0xf22a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22204,10 +22269,10 @@ const insn_template i386_optab[] = { "vcvtsi2ss", 3, 0xf32a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22220,10 +22285,10 @@ const insn_template i386_optab[] = { "vcvtsi2ss", 3, 0xf32a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22236,10 +22301,10 @@ const insn_template i386_optab[] = { "vcvtss2sd", 3, 0xf35a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22252,10 +22317,10 @@ const insn_template i386_optab[] = { "vcvtss2si", 2, 0xf32d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22265,10 +22330,10 @@ const insn_template i386_optab[] = { "vcvttpd2dq", 2, 0x66e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22278,10 +22343,10 @@ const insn_template i386_optab[] = { "vcvttpd2dq", 2, 0x66e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } }, @@ -22291,10 +22356,10 @@ const insn_template i386_optab[] = { "vcvttpd2dq", 2, 0x66e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22304,10 +22369,10 @@ const insn_template i386_optab[] = { "vcvttpd2dq", 2, 0x66e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } }, @@ -22317,10 +22382,10 @@ const insn_template i386_optab[] = { "vcvttpd2dqx", 2, 0x66e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22330,10 +22395,10 @@ const insn_template i386_optab[] = { "vcvttpd2dqy", 2, 0x66e6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22343,10 +22408,10 @@ const insn_template i386_optab[] = { "vcvttps2dq", 2, 0xf35b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22356,10 +22421,10 @@ const insn_template i386_optab[] = { "vcvttps2dq", 2, 0xf35b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22369,10 +22434,10 @@ const insn_template i386_optab[] = { "vcvttsd2si", 2, 0xf22c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22382,10 +22447,10 @@ const insn_template i386_optab[] = { "vcvttss2si", 2, 0xf32c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22395,10 +22460,10 @@ const insn_template i386_optab[] = { "vdivpd", 3, 0x665e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22411,10 +22476,10 @@ const insn_template i386_optab[] = { "vdivpd", 3, 0x665e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22427,10 +22492,10 @@ const insn_template i386_optab[] = { "vdivps", 3, 0x5e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22443,10 +22508,10 @@ const insn_template i386_optab[] = { "vdivps", 3, 0x5e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22459,10 +22524,10 @@ const insn_template i386_optab[] = { "vdivsd", 3, 0xf25e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22475,10 +22540,10 @@ const insn_template i386_optab[] = { "vdivss", 3, 0xf35e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -22491,10 +22556,10 @@ const insn_template i386_optab[] = { "vdppd", 4, 0x6641, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22510,10 +22575,10 @@ const insn_template i386_optab[] = { "vdpps", 4, 0x6640, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22529,10 +22594,10 @@ const insn_template i386_optab[] = { "vdpps", 4, 0x6640, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22548,10 +22613,10 @@ const insn_template i386_optab[] = { "vextractf128", 3, 0x6619, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22564,10 +22629,10 @@ const insn_template i386_optab[] = { "vextractps", 3, 0x6617, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 0, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22580,10 +22645,10 @@ const insn_template i386_optab[] = { "vhaddpd", 3, 0x667c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22596,10 +22661,10 @@ const insn_template i386_optab[] = { "vhaddpd", 3, 0x667c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22612,10 +22677,10 @@ const insn_template i386_optab[] = { "vhaddps", 3, 0xf27c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22628,10 +22693,10 @@ const insn_template i386_optab[] = { "vhaddps", 3, 0xf27c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22644,10 +22709,10 @@ const insn_template i386_optab[] = { "vhsubpd", 3, 0x667d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22660,10 +22725,10 @@ const insn_template i386_optab[] = { "vhsubpd", 3, 0x667d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22676,10 +22741,10 @@ const insn_template i386_optab[] = { "vhsubps", 3, 0xf27d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22692,10 +22757,10 @@ const insn_template i386_optab[] = { "vhsubps", 3, 0xf27d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22708,10 +22773,10 @@ const insn_template i386_optab[] = { "vinsertf128", 4, 0x6618, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22727,10 +22792,10 @@ const insn_template i386_optab[] = { "vinsertps", 4, 0x6621, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22746,10 +22811,10 @@ const insn_template i386_optab[] = { "vlddqu", 2, 0xf2f0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22759,10 +22824,10 @@ const insn_template i386_optab[] = { "vlddqu", 2, 0xf2f0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22772,20 +22837,20 @@ const insn_template i386_optab[] = { "vldmxcsr", 1, 0xae, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "vmaskmovdqu", 2, 0x66f7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22795,10 +22860,10 @@ const insn_template i386_optab[] = { "vmaskmovpd", 3, 0x662f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22811,10 +22876,10 @@ const insn_template i386_optab[] = { "vmaskmovpd", 3, 0x662f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22827,10 +22892,10 @@ const insn_template i386_optab[] = { "vmaskmovpd", 3, 0x662d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22843,10 +22908,10 @@ const insn_template i386_optab[] = { "vmaskmovpd", 3, 0x662d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22859,10 +22924,10 @@ const insn_template i386_optab[] = { "vmaskmovps", 3, 0x662e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22875,10 +22940,10 @@ const insn_template i386_optab[] = { "vmaskmovps", 3, 0x662e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -22891,10 +22956,10 @@ const insn_template i386_optab[] = { "vmaskmovps", 3, 0x662c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22907,10 +22972,10 @@ const insn_template i386_optab[] = { "vmaskmovps", 3, 0x662c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22923,10 +22988,10 @@ const insn_template i386_optab[] = { "vmaxpd", 3, 0x665f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22939,10 +23004,10 @@ const insn_template i386_optab[] = { "vmaxpd", 3, 0x665f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22955,10 +23020,10 @@ const insn_template i386_optab[] = { "vmaxps", 3, 0x5f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -22971,10 +23036,10 @@ const insn_template i386_optab[] = { "vmaxps", 3, 0x5f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -22987,10 +23052,10 @@ const insn_template i386_optab[] = { "vmaxsd", 3, 0xf25f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23003,10 +23068,10 @@ const insn_template i386_optab[] = { "vmaxss", 3, 0xf35f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23019,10 +23084,10 @@ const insn_template i386_optab[] = { "vminpd", 3, 0x665d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -23035,10 +23100,10 @@ const insn_template i386_optab[] = { "vminpd", 3, 0x665d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -23051,10 +23116,10 @@ const insn_template i386_optab[] = { "vminps", 3, 0x5d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -23067,10 +23132,10 @@ const insn_template i386_optab[] = { "vminps", 3, 0x5d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -23083,10 +23148,10 @@ const insn_template i386_optab[] = { "vminsd", 3, 0xf25d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23099,10 +23164,10 @@ const insn_template i386_optab[] = { "vminss", 3, 0xf35d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23115,10 +23180,10 @@ const insn_template i386_optab[] = { "vmovapd", 2, 0x6628, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -23128,10 +23193,10 @@ const insn_template i386_optab[] = { "vmovapd", 2, 0x6629, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23141,10 +23206,10 @@ const insn_template i386_optab[] = { "vmovapd", 2, 0x6628, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -23154,10 +23219,10 @@ const insn_template i386_optab[] = { "vmovapd", 2, 0x6629, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23167,10 +23232,10 @@ const insn_template i386_optab[] = { "vmovaps", 2, 0x28, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -23180,10 +23245,10 @@ const insn_template i386_optab[] = { "vmovaps", 2, 0x29, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23193,10 +23258,10 @@ const insn_template i386_optab[] = { "vmovaps", 2, 0x28, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -23206,10 +23271,10 @@ const insn_template i386_optab[] = { "vmovaps", 2, 0x29, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23219,10 +23284,10 @@ const insn_template i386_optab[] = { "vmovd", 2, 0x666e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23232,10 +23297,10 @@ const insn_template i386_optab[] = { "vmovd", 2, 0x666e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 3, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23245,10 +23310,10 @@ const insn_template i386_optab[] = { "vmovd", 2, 0x667e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23258,10 +23323,10 @@ const insn_template i386_optab[] = { "vmovd", 2, 0x667e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 3, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23271,10 +23336,10 @@ const insn_template i386_optab[] = { "vmovddup", 2, 0xf212, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23284,10 +23349,10 @@ const insn_template i386_optab[] = { "vmovddup", 2, 0xf212, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -23297,10 +23362,10 @@ const insn_template i386_optab[] = { "vmovdqa", 2, 0x666f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -23310,10 +23375,10 @@ const insn_template i386_optab[] = { "vmovdqa", 2, 0x667f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23323,10 +23388,10 @@ const insn_template i386_optab[] = { "vmovdqa", 2, 0x666f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -23336,10 +23401,10 @@ const insn_template i386_optab[] = { "vmovdqa", 2, 0x667f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23349,10 +23414,10 @@ const insn_template i386_optab[] = { "vmovdqu", 2, 0xf36f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -23362,10 +23427,10 @@ const insn_template i386_optab[] = { "vmovdqu", 2, 0xf37f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23375,10 +23440,10 @@ const insn_template i386_optab[] = { "vmovdqu", 2, 0xf36f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -23388,10 +23453,10 @@ const insn_template i386_optab[] = { "vmovdqu", 2, 0xf37f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23401,10 +23466,10 @@ const insn_template i386_optab[] = { "vmovhlps", 3, 0x12, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23417,10 +23482,10 @@ const insn_template i386_optab[] = { "vmovhpd", 3, 0x6616, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23433,10 +23498,10 @@ const insn_template i386_optab[] = { "vmovhpd", 2, 0x6617, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23446,10 +23511,10 @@ const insn_template i386_optab[] = { "vmovhps", 3, 0x16, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23462,10 +23527,10 @@ const insn_template i386_optab[] = { "vmovhps", 2, 0x17, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23475,10 +23540,10 @@ const insn_template i386_optab[] = { "vmovlhps", 3, 0x16, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23491,10 +23556,10 @@ const insn_template i386_optab[] = { "vmovlpd", 3, 0x6612, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23507,10 +23572,10 @@ const insn_template i386_optab[] = { "vmovlpd", 2, 0x6613, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23520,10 +23585,10 @@ const insn_template i386_optab[] = { "vmovlps", 3, 0x12, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23536,10 +23601,10 @@ const insn_template i386_optab[] = { "vmovlps", 2, 0x13, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23549,10 +23614,10 @@ const insn_template i386_optab[] = { "vmovmskpd", 2, 0x6650, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23562,10 +23627,10 @@ const insn_template i386_optab[] = { "vmovmskpd", 2, 0x6650, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23575,10 +23640,10 @@ const insn_template i386_optab[] = { "vmovmskps", 2, 0x50, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23588,10 +23653,10 @@ const insn_template i386_optab[] = { "vmovmskps", 2, 0x50, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23601,10 +23666,10 @@ const insn_template i386_optab[] = { "vmovntdq", 2, 0x66e7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23614,10 +23679,10 @@ const insn_template i386_optab[] = { "vmovntdq", 2, 0x66e7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23627,23 +23692,36 @@ const insn_template i386_optab[] = { "vmovntdqa", 2, 0x662a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, + { "vmovntdqa", 2, 0x662a, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, { "vmovntpd", 2, 0x662b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23653,10 +23731,10 @@ const insn_template i386_optab[] = { "vmovntpd", 2, 0x662b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23666,10 +23744,10 @@ const insn_template i386_optab[] = { "vmovntps", 2, 0x2b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23679,10 +23757,10 @@ const insn_template i386_optab[] = { "vmovntps", 2, 0x2b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23692,10 +23770,10 @@ const insn_template i386_optab[] = { "vmovq", 2, 0xf37e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23705,10 +23783,10 @@ const insn_template i386_optab[] = { "vmovq", 2, 0x66d6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23718,10 +23796,10 @@ const insn_template i386_optab[] = { "vmovq", 2, 0x666e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23731,10 +23809,10 @@ const insn_template i386_optab[] = { "vmovq", 2, 0x667e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23744,10 +23822,10 @@ const insn_template i386_optab[] = { "vmovsd", 2, 0xf211, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23757,10 +23835,10 @@ const insn_template i386_optab[] = { "vmovsd", 2, 0xf210, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23770,10 +23848,10 @@ const insn_template i386_optab[] = { "vmovsd", 3, 0xf210, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23786,10 +23864,10 @@ const insn_template i386_optab[] = { "vmovsd", 3, 0xf211, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23802,10 +23880,10 @@ const insn_template i386_optab[] = { "vmovshdup", 2, 0xf316, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -23815,10 +23893,10 @@ const insn_template i386_optab[] = { "vmovshdup", 2, 0xf316, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -23828,10 +23906,10 @@ const insn_template i386_optab[] = { "vmovsldup", 2, 0xf312, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -23841,10 +23919,10 @@ const insn_template i386_optab[] = { "vmovsldup", 2, 0xf312, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -23854,10 +23932,10 @@ const insn_template i386_optab[] = { "vmovss", 2, 0xf311, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23867,10 +23945,10 @@ const insn_template i386_optab[] = { "vmovss", 2, 0xf310, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -23880,10 +23958,10 @@ const insn_template i386_optab[] = { "vmovss", 3, 0xf310, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23896,10 +23974,10 @@ const insn_template i386_optab[] = { "vmovss", 3, 0xf311, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23912,10 +23990,10 @@ const insn_template i386_optab[] = { "vmovupd", 2, 0x6610, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -23925,10 +24003,10 @@ const insn_template i386_optab[] = { "vmovupd", 2, 0x6611, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23938,10 +24016,10 @@ const insn_template i386_optab[] = { "vmovupd", 2, 0x6610, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -23951,10 +24029,10 @@ const insn_template i386_optab[] = { "vmovupd", 2, 0x6611, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23964,10 +24042,10 @@ const insn_template i386_optab[] = { "vmovups", 2, 0x10, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -23977,10 +24055,10 @@ const insn_template i386_optab[] = { "vmovups", 2, 0x11, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -23990,10 +24068,10 @@ const insn_template i386_optab[] = { "vmovups", 2, 0x10, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -24003,10 +24081,10 @@ const insn_template i386_optab[] = { "vmovups", 2, 0x11, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -24016,10 +24094,10 @@ const insn_template i386_optab[] = { "vmpsadbw", 4, 0x6642, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -24032,13 +24110,32 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, + { "vmpsadbw", 4, 0x6642, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, { "vmulpd", 3, 0x6659, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24051,10 +24148,10 @@ const insn_template i386_optab[] = { "vmulpd", 3, 0x6659, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -24067,10 +24164,10 @@ const insn_template i386_optab[] = { "vmulps", 3, 0x59, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24083,10 +24180,10 @@ const insn_template i386_optab[] = { "vmulps", 3, 0x59, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -24099,10 +24196,10 @@ const insn_template i386_optab[] = { "vmulsd", 3, 0xf259, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -24115,10 +24212,10 @@ const insn_template i386_optab[] = { "vmulss", 3, 0xf359, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -24131,10 +24228,10 @@ const insn_template i386_optab[] = { "vorpd", 3, 0x6656, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24147,10 +24244,10 @@ const insn_template i386_optab[] = { "vorpd", 3, 0x6656, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -24163,10 +24260,10 @@ const insn_template i386_optab[] = { "vorps", 3, 0x56, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24179,10 +24276,10 @@ const insn_template i386_optab[] = { "vorps", 3, 0x56, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -24195,65 +24292,88 @@ const insn_template i386_optab[] = { "vpabsb", 2, 0x661c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, + { "vpabsb", 2, 0x661c, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, { "vpabsd", 2, 0x661e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, + { "vpabsd", 2, 0x661e, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, { "vpabsw", 2, 0x661d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpackssdw", 3, 0x666b, None, 1, + { "vpabsw", 2, 0x661d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpacksswb", 3, 0x6663, None, 1, + { "vpackssdw", 3, 0x666b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24263,29 +24383,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpackusdw", 3, 0x662b, None, 1, + { "vpackssdw", 3, 0x666b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpackuswb", 3, 0x6667, None, 1, + { "vpacksswb", 3, 0x6663, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24295,29 +24415,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpaddsb", 3, 0x66ec, None, 1, + { "vpacksswb", 3, 0x6663, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpaddsw", 3, 0x66ed, None, 1, + { "vpackusdw", 3, 0x662b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24327,29 +24447,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpaddb", 3, 0x66fc, None, 1, + { "vpackusdw", 3, 0x662b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpaddd", 3, 0x66fe, None, 1, + { "vpackuswb", 3, 0x6667, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24359,29 +24479,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpaddq", 3, 0x66d4, None, 1, + { "vpackuswb", 3, 0x6667, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpaddw", 3, 0x66fd, None, 1, + { "vpaddsb", 3, 0x66ec, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24391,29 +24511,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpaddusb", 3, 0x66dc, None, 1, + { "vpaddsb", 3, 0x66ec, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpaddusw", 3, 0x66dd, None, 1, + { "vpaddsw", 3, 0x66ed, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24423,32 +24543,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpalignr", 4, 0x660f, None, 1, + { "vpaddsw", 3, 0x66ed, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpand", 3, 0x66db, None, 1, + { "vpaddb", 3, 0x66fc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24458,29 +24575,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpandn", 3, 0x66df, None, 1, + { "vpaddb", 3, 0x66fc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpavgb", 3, 0x66e0, None, 1, + { "vpaddd", 3, 0x66fe, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24490,33 +24607,30 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpavgw", 3, 0x66e3, None, 1, + { "vpaddd", 3, 0x66fe, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpblendvb", 4, 0x664c, None, 1, + { "vpaddq", 3, 0x66d4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -24525,32 +24639,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpblendw", 4, 0x660e, None, 1, + { "vpaddq", 3, 0x66d4, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpeqb", 3, 0x6674, None, 1, + { "vpaddw", 3, 0x66fd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24560,29 +24671,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpeqd", 3, 0x6676, None, 1, + { "vpaddw", 3, 0x66fd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpeqq", 3, 0x6629, None, 1, + { "vpaddusb", 3, 0x66dc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24592,13 +24703,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpeqw", 3, 0x6675, None, 1, + { "vpaddusb", 3, 0x66dc, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpaddusw", 3, 0x66dd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24608,13 +24735,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpestri", 3, 0x6661, None, 1, + { "vpaddusw", 3, 0x66dd, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpalignr", 4, 0x660f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -24623,30 +24766,36 @@ const insn_template i386_optab[] = 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpestrm", 3, 0x6660, None, 1, + { "vpalignr", 4, 0x660f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpgtb", 3, 0x6664, None, 1, + { "vpand", 3, 0x66db, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24656,13 +24805,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpgtd", 3, 0x6666, None, 1, + { "vpand", 3, 0x66db, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpandn", 3, 0x66df, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24672,13 +24837,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpgtq", 3, 0x6637, None, 1, + { "vpandn", 3, 0x66df, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpavgb", 3, 0x66e0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24688,13 +24869,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpgtw", 3, 0x6665, None, 1, + { "vpavgb", 3, 0x66e0, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpavgw", 3, 0x66e3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24704,14 +24901,30 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpistri", 3, 0x6663, None, 1, + { "vpavgw", 3, 0x66e3, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpblendvb", 4, 0x664c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -24719,14 +24932,36 @@ const insn_template i386_optab[] = 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpcmpistrm", 3, 0x6662, None, 1, + { "vpblendvb", 4, 0x664c, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpblendw", 4, 0x660e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -24735,14 +24970,17 @@ const insn_template i386_optab[] = 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vperm2f128", 4, 0x6606, None, 1, + { "vpblendw", 4, 0x660e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -24755,13 +24993,13 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpermilpd", 3, 0x660d, None, 1, + { "vpcmpeqb", 3, 0x6674, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24771,13 +25009,13 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpermilpd", 3, 0x660d, None, 1, + { "vpcmpeqb", 3, 0x6674, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -24787,45 +25025,77 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpermilpd", 3, 0x6605, None, 1, + { "vpcmpeqd", 3, 0x6676, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpcmpeqd", 3, 0x6676, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpermilpd", 3, 0x6605, None, 1, + { "vpcmpeqq", 3, 0x6629, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpcmpeqq", 3, 0x6629, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpermilps", 3, 0x660c, None, 1, + { "vpcmpeqw", 3, 0x6675, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24835,13 +25105,13 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpermilps", 3, 0x660c, None, 1, + { "vpcmpeqw", 3, 0x6675, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -24851,13 +25121,13 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpermilps", 3, 0x6604, None, 1, + { "vpcmpestri", 3, 0x6661, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -24867,109 +25137,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpermilps", 3, 0x6604, None, 1, + { "vpcmpestrm", 3, 0x6660, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } } } }, - { "vpextrb", 3, 0x6614, None, 1, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } } } }, - { "vpextrd", 3, 0x6616, None, 1, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } } } }, - { "vpextrq", 3, 0x6616, None, 1, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 1, 0, 0, 0 } } } }, - { "vpextrw", 3, 0x66c5, None, 1, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, + 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpextrw", 3, 0x6615, None, 1, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } } } }, - { "vphaddd", 3, 0x6602, None, 1, + { "vpcmpgtb", 3, 0x6664, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -24979,29 +25169,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vphaddsw", 3, 0x6603, None, 1, + { "vpcmpgtb", 3, 0x6664, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vphaddw", 3, 0x6601, None, 1, + { "vpcmpgtd", 3, 0x6666, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25011,26 +25201,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vphminposuw", 2, 0x6641, None, 1, + { "vpcmpgtd", 3, 0x6666, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vphsubd", 3, 0x6606, None, 1, + { "vpcmpgtq", 3, 0x6637, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25040,29 +25233,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vphsubsw", 3, 0x6607, None, 1, + { "vpcmpgtq", 3, 0x6637, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vphsubw", 3, 0x6605, None, 1, + { "vpcmpgtw", 3, 0x6665, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25072,89 +25265,80 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpinsrb", 4, 0x6620, None, 1, + { "vpcmpgtw", 3, 0x6665, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpinsrd", 4, 0x6622, None, 1, + { "vpcmpistri", 3, 0x6663, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 0, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpinsrq", 4, 0x6622, None, 1, + { "vpcmpistrm", 3, 0x6662, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 0, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpinsrw", 4, 0x66c4, None, 1, + { "vperm2f128", 4, 0x6606, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmaddubsw", 3, 0x6604, None, 1, + { "vpermilpd", 3, 0x660d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25164,61 +25348,61 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmaddwd", 3, 0x66f5, None, 1, + { "vpermilpd", 3, 0x660d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmaxsb", 3, 0x663c, None, 1, + { "vpermilpd", 3, 0x6605, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmaxsd", 3, 0x663d, None, 1, + { "vpermilpd", 3, 0x6605, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmaxsw", 3, 0x66ee, None, 1, + { "vpermilps", 3, 0x660c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25228,61 +25412,2328 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmaxub", 3, 0x66de, None, 1, + { "vpermilps", 3, 0x660c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmaxud", 3, 0x663f, None, 1, + { "vpermilps", 3, 0x6604, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmaxuw", 3, 0x663e, None, 1, + { "vpermilps", 3, 0x6604, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpminsb", 3, 0x6638, None, 1, + { "vpextrb", 3, 0x6614, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } } } }, + { "vpextrd", 3, 0x6616, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } } } }, + { "vpextrq", 3, 0x6616, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } } } }, + { "vpextrw", 3, 0x66c5, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpextrw", 3, 0x6615, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } } } }, + { "vphaddd", 3, 0x6602, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphaddd", 3, 0x6602, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphaddsw", 3, 0x6603, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphaddsw", 3, 0x6603, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphaddw", 3, 0x6601, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphaddw", 3, 0x6601, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphminposuw", 2, 0x6641, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphsubd", 3, 0x6606, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphsubd", 3, 0x6606, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphsubsw", 3, 0x6607, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphsubsw", 3, 0x6607, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphsubw", 3, 0x6605, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vphsubw", 3, 0x6605, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpinsrb", 4, 0x6620, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpinsrd", 4, 0x6622, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpinsrq", 4, 0x6622, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpinsrw", 4, 0x66c4, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaddubsw", 3, 0x6604, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaddubsw", 3, 0x6604, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaddwd", 3, 0x66f5, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaddwd", 3, 0x66f5, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxsb", 3, 0x663c, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxsb", 3, 0x663c, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxsd", 3, 0x663d, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxsd", 3, 0x663d, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxsw", 3, 0x66ee, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxsw", 3, 0x66ee, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxub", 3, 0x66de, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxub", 3, 0x66de, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxud", 3, 0x663f, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxud", 3, 0x663f, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxuw", 3, 0x663e, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmaxuw", 3, 0x663e, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminsb", 3, 0x6638, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminsb", 3, 0x6638, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminsd", 3, 0x6639, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminsd", 3, 0x6639, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminsw", 3, 0x66ea, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminsw", 3, 0x66ea, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminub", 3, 0x66da, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminub", 3, 0x66da, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminud", 3, 0x663b, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminud", 3, 0x663b, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminuw", 3, 0x663a, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpminuw", 3, 0x663a, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovmskb", 2, 0x66d7, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovmskb", 2, 0x66d7, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxbd", 2, 0x6621, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxbd", 2, 0x6621, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxbq", 2, 0x6622, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxbq", 2, 0x6622, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxbw", 2, 0x6620, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxbw", 2, 0x6620, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxdq", 2, 0x6625, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxdq", 2, 0x6625, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxwd", 2, 0x6623, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxwd", 2, 0x6623, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxwq", 2, 0x6624, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovsxwq", 2, 0x6624, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxbd", 2, 0x6631, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxbd", 2, 0x6631, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxbq", 2, 0x6632, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxbq", 2, 0x6632, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxbw", 2, 0x6630, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxbw", 2, 0x6630, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxdq", 2, 0x6635, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxdq", 2, 0x6635, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxwd", 2, 0x6633, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxwd", 2, 0x6633, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxwq", 2, 0x6634, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmovzxwq", 2, 0x6634, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmuldq", 3, 0x6628, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmuldq", 3, 0x6628, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmulhrsw", 3, 0x660b, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmulhrsw", 3, 0x660b, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmulhuw", 3, 0x66e4, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmulhuw", 3, 0x66e4, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmulhw", 3, 0x66e5, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmulhw", 3, 0x66e5, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmulld", 3, 0x6640, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmulld", 3, 0x6640, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmullw", 3, 0x66d5, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmullw", 3, 0x66d5, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmuludq", 3, 0x66f4, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpmuludq", 3, 0x66f4, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpor", 3, 0x66eb, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpor", 3, 0x66eb, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsadbw", 3, 0x66f6, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsadbw", 3, 0x66f6, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpshufb", 3, 0x6600, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpshufb", 3, 0x6600, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpshufd", 3, 0x6670, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpshufd", 3, 0x6670, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpshufhw", 3, 0xf370, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpshufhw", 3, 0xf370, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpshuflw", 3, 0xf270, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpshuflw", 3, 0xf270, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsignb", 3, 0x6608, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsignb", 3, 0x6608, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsignd", 3, 0x660a, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsignd", 3, 0x660a, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsignw", 3, 0x6609, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsignw", 3, 0x6609, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpslld", 3, 0x6672, 0x6, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpslld", 3, 0x66f2, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpslld", 3, 0x6672, 0x6, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpslld", 3, 0x66f2, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpslldq", 3, 0x6673, 0x7, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpslldq", 3, 0x6673, 0x7, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsllq", 3, 0x6673, 0x6, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsllq", 3, 0x66f3, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsllq", 3, 0x6673, 0x6, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsllq", 3, 0x66f3, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsllw", 3, 0x6671, 0x6, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsllw", 3, 0x66f1, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsllw", 3, 0x6671, 0x6, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsllw", 3, 0x66f1, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrad", 3, 0x6672, 0x4, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrad", 3, 0x66e2, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrad", 3, 0x6672, 0x4, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrad", 3, 0x66e2, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsraw", 3, 0x6671, 0x4, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsraw", 3, 0x66e1, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsraw", 3, 0x6671, 0x4, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsraw", 3, 0x66e1, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrld", 3, 0x6672, 0x2, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrld", 3, 0x66d2, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrld", 3, 0x6672, 0x2, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrld", 3, 0x66d2, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrldq", 3, 0x6673, 0x3, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrldq", 3, 0x6673, 0x3, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrlq", 3, 0x6673, 0x2, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrlq", 3, 0x66d3, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrlq", 3, 0x6673, 0x2, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrlq", 3, 0x66d3, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrlw", 3, 0x6671, 0x2, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrlw", 3, 0x66d1, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrlw", 3, 0x6671, 0x2, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsrlw", 3, 0x66d1, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsubb", 3, 0x66f8, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsubb", 3, 0x66f8, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsubd", 3, 0x66fa, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25292,13 +27743,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpminsd", 3, 0x6639, None, 1, + { "vpsubd", 3, 0x66fa, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsubq", 3, 0x66fb, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25308,13 +27775,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpminsw", 3, 0x66ea, None, 1, + { "vpsubq", 3, 0x66fb, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsubsb", 3, 0x66e8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25324,13 +27807,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpminub", 3, 0x66da, None, 1, + { "vpsubsb", 3, 0x66e8, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsubsw", 3, 0x66e9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25340,13 +27839,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpminud", 3, 0x663b, None, 1, + { "vpsubsw", 3, 0x66e9, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsubusb", 3, 0x66d8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25356,13 +27871,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpminuw", 3, 0x663a, None, 1, + { "vpsubusb", 3, 0x66d8, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsubusw", 3, 0x66d9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25372,182 +27903,247 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovmskb", 2, 0x66d7, None, 1, + { "vpsubusw", 3, 0x66d9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovsxbd", 2, 0x6621, None, 1, + { "vpsubw", 3, 0x66f9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovsxbq", 2, 0x6622, None, 1, + { "vpsubw", 3, 0x66f9, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vptest", 2, 0x6617, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovsxbw", 2, 0x6620, None, 1, + { "vptest", 2, 0x6617, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovsxdq", 2, 0x6625, None, 1, + { "vpunpckhbw", 3, 0x6668, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovsxwd", 2, 0x6623, None, 1, + { "vpunpckhbw", 3, 0x6668, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovsxwq", 2, 0x6624, None, 1, + { "vpunpckhdq", 3, 0x666a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovzxbd", 2, 0x6631, None, 1, + { "vpunpckhdq", 3, 0x666a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovzxbq", 2, 0x6632, None, 1, + { "vpunpckhqdq", 3, 0x666d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovzxbw", 2, 0x6630, None, 1, + { "vpunpckhqdq", 3, 0x666d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovzxdq", 2, 0x6635, None, 1, + { "vpunpckhwd", 3, 0x6669, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovzxwd", 2, 0x6633, None, 1, + { "vpunpckhwd", 3, 0x6669, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpunpcklbw", 3, 0x6660, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmovzxwq", 2, 0x6634, None, 1, + { "vpunpcklbw", 3, 0x6660, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmuldq", 3, 0x6628, None, 1, + { "vpunpckldq", 3, 0x6662, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25557,29 +28153,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmulhrsw", 3, 0x660b, None, 1, + { "vpunpckldq", 3, 0x6662, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmulhuw", 3, 0x66e4, None, 1, + { "vpunpcklqdq", 3, 0x666c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25589,29 +28185,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmulhw", 3, 0x66e5, None, 1, + { "vpunpcklqdq", 3, 0x666c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmulld", 3, 0x6640, None, 1, + { "vpunpcklwd", 3, 0x6661, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25621,29 +28217,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmullw", 3, 0x66d5, None, 1, + { "vpunpcklwd", 3, 0x6661, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpmuludq", 3, 0x66f4, None, 1, + { "vpxor", 3, 0x66ef, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -25653,61 +28249,71 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpor", 3, 0x66eb, None, 1, + { "vpxor", 3, 0x66ef, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsadbw", 3, 0x66f6, None, 1, + { "vrcpps", 2, 0x53, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vrcpps", 2, 0x53, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpshufb", 3, 0x6600, None, 1, + { "vrcpss", 3, 0xf353, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpshufd", 3, 0x6670, None, 1, + { "vroundpd", 3, 0x6609, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -25717,29 +28323,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpshufhw", 3, 0xf370, None, 1, + { "vroundpd", 3, 0x6609, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpshuflw", 3, 0xf270, None, 1, + { "vroundps", 3, 0x6608, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -25749,126 +28355,113 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsignb", 3, 0x6608, None, 1, + { "vroundps", 3, 0x6608, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsignd", 3, 0x660a, None, 1, + { "vroundsd", 4, 0x660b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 3, 1, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } } } }, - { "vpsignw", 3, 0x6609, None, 1, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpslld", 3, 0x6672, 0x6, 1, + { "vroundss", 4, 0x660a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpslld", 3, 0x66f2, None, 1, + { "vrsqrtps", 2, 0x52, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpslldq", 3, 0x6673, 0x7, 1, + { "vrsqrtps", 2, 0x52, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsllq", 3, 0x6673, 0x6, 1, + { "vrsqrtss", 3, 0xf352, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsllq", 3, 0x66f3, None, 1, + { "vshufpd", 4, 0x66c6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -25877,30 +28470,36 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsllw", 3, 0x6671, 0x6, 1, + { "vshufpd", 4, 0x66c6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsllw", 3, 0x66f1, None, 1, + { "vshufps", 4, 0xc6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -25909,141 +28508,126 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsrad", 3, 0x6672, 0x4, 1, + { "vshufps", 4, 0xc6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsrad", 3, 0x66e2, None, 1, + { "vsqrtpd", 2, 0x6651, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsraw", 3, 0x6671, 0x4, 1, + { "vsqrtpd", 2, 0x6651, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsraw", 3, 0x66e1, None, 1, + { "vsqrtps", 2, 0x51, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsrld", 3, 0x6672, 0x2, 1, + { "vsqrtps", 2, 0x51, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsrld", 3, 0x66d2, None, 1, + { "vsqrtsd", 3, 0xf251, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsrldq", 3, 0x6673, 0x3, 1, + { "vsqrtss", 3, 0xf351, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsrlq", 3, 0x6673, 0x2, 1, + { "vstmxcsr", 1, 0xae, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } } } }, - { "vpsrlq", 3, 0x66d3, None, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } } } }, + { "vsubpd", 3, 0x665c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -26053,29 +28637,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsrlw", 3, 0x6671, 0x2, 1, + { "vsubpd", 3, 0x665c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsrlw", 3, 0x66d1, None, 1, + { "vsubps", 3, 0x5c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -26085,167 +28669,171 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsubb", 3, 0x66f8, None, 1, + { "vsubps", 3, 0x5c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsubd", 3, 0x66fa, None, 1, + { "vsubsd", 3, 0xf25c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsubq", 3, 0x66fb, None, 1, + { "vsubss", 3, 0xf35c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsubsb", 3, 0x66e8, None, 1, + { "vtestpd", 2, 0x660f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsubsw", 3, 0x66e9, None, 1, + { "vtestpd", 2, 0x660f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsubusb", 3, 0x66d8, None, 1, + { "vtestps", 2, 0x660e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsubusw", 3, 0x66d9, None, 1, + { "vtestps", 2, 0x660e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpsubw", 3, 0x66f9, None, 1, + { "vucomisd", 2, 0x662e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0 } } } }, + { "vucomiss", 2, 0x2e, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vptest", 2, 0x6617, None, 1, + { "vunpckhpd", 3, 0x6615, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vptest", 2, 0x6617, None, 1, + { "vunpckhpd", 3, 0x6615, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpunpckhbw", 3, 0x6668, None, 1, + { "vunpckhps", 3, 0x15, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -26255,29 +28843,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpunpckhdq", 3, 0x666a, None, 1, + { "vunpckhps", 3, 0x15, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpunpckhqdq", 3, 0x666d, None, 1, + { "vunpcklpd", 3, 0x6614, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -26287,29 +28875,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpunpckhwd", 3, 0x6669, None, 1, + { "vunpcklpd", 3, 0x6614, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpunpcklbw", 3, 0x6660, None, 1, + { "vunpcklps", 3, 0x14, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -26319,29 +28907,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpunpckldq", 3, 0x6662, None, 1, + { "vunpcklps", 3, 0x14, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpunpcklqdq", 3, 0x666c, None, 1, + { "vxorpd", 3, 0x6657, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -26351,29 +28939,29 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpunpcklwd", 3, 0x6661, None, 1, + { "vxorpd", 3, 0x6657, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vpxor", 3, 0x66ef, None, 1, + { "vxorps", 3, 0x57, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -26383,55 +28971,62 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vrcpps", 2, 0x53, None, 1, + { "vxorps", 3, 0x57, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vzeroall", 0, 0x77, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vzeroupper", 0, 0x77, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vrcpps", 2, 0x53, None, 1, + { "vbroadcasti128", 2, 0x665A, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, + 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vrcpss", 3, 0xf353, None, 1, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } } } }, - { "vroundpd", 3, 0x6609, None, 1, + { "vpblendd", 4, 0x6602, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -26440,14 +29035,17 @@ const insn_template i386_optab[] = 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vroundpd", 3, 0x6609, None, 1, + { "vpblendd", 4, 0x6602, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -26456,145 +29054,156 @@ const insn_template i386_optab[] = 0, 1, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vroundps", 3, 0x6608, None, 1, + { "vpbroadcastb", 2, 0x6678, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vroundps", 3, 0x6608, None, 1, + { "vpbroadcastb", 2, 0x6678, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vroundsd", 4, 0x660b, None, 1, + { "vpbroadcastd", 2, 0x6658, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 3, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vroundss", 4, 0x660a, None, 1, + { "vpbroadcastd", 2, 0x6658, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vrsqrtps", 2, 0x52, None, 1, + { "vpbroadcastq", 2, 0x6659, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vrsqrtps", 2, 0x52, None, 1, + { "vpbroadcastq", 2, 0x6659, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vrsqrtss", 3, 0xf352, None, 1, + { "vpbroadcastw", 2, 0x6679, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpbroadcastw", 2, 0x6679, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vshufpd", 4, 0x66c6, None, 1, + { "vperm2i128", 4, 0x6646, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vshufpd", 4, 0x66c6, None, 1, + { "vpermd", 3, 0x6636, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpermpd", 3, 0x6601, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -26603,149 +29212,209 @@ const insn_template i386_optab[] = 0, 1, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpermps", 3, 0x6616, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vshufps", 4, 0xc6, None, 1, + { "vpermq", 3, 0x6600, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vextracti128", 3, 0x6639, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } } } }, - { "vshufps", 4, 0xc6, None, 1, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } } } }, + { "vinserti128", 4, 0x6638, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, + 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vsqrtpd", 2, 0x6651, None, 1, + { "vpmaskmovd", 3, 0x668e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } } } }, - { "vsqrtpd", 2, 0x6651, None, 1, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } } } }, + { "vpmaskmovd", 3, 0x668e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } } } }, - { "vsqrtps", 2, 0x51, None, 1, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } } } }, + { "vpmaskmovd", 3, 0x668c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vsqrtps", 2, 0x51, None, 1, + { "vpmaskmovd", 3, 0x668c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vsqrtsd", 3, 0xf251, None, 1, + { "vpmaskmovq", 3, 0x668e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0 } } } }, - { "vsqrtss", 3, 0xf351, None, 1, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } } } }, + { "vpmaskmovq", 3, 0x668e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } } } }, + { "vpmaskmovq", 3, 0x668c, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vstmxcsr", 1, 0xae, 0x3, 1, + { "vpmaskmovq", 3, 0x668c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } } } }, - { "vsubpd", 3, 0x665c, None, 1, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vpsllvd", 3, 0x6647, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -26755,13 +29424,13 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vsubpd", 3, 0x665c, None, 1, + { "vpsllvd", 3, 0x6647, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -26771,13 +29440,13 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vsubps", 3, 0x5c, None, 1, + { "vpsllvq", 3, 0x6647, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -26787,13 +29456,13 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vsubps", 3, 0x5c, None, 1, + { "vpsllvq", 3, 0x6647, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -26803,335 +29472,365 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vsubsd", 3, 0xf25c, None, 1, + { "vpsravd", 3, 0x6646, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 1, 0, 0, 0 } }, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vsubss", 3, 0xf35c, None, 1, + { "vpsravd", 3, 0x6646, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vtestpd", 2, 0x660f, None, 1, + { "vpsrlvd", 3, 0x6645, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vtestpd", 2, 0x660f, None, 1, + { "vpsrlvd", 3, 0x6645, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vtestps", 2, 0x660e, None, 1, + { "vpsrlvq", 3, 0x6645, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vtestps", 2, 0x660e, None, 1, + { "vpsrlvq", 3, 0x6645, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vucomisd", 2, 0x662e, None, 1, + { "vgatherdpd", 3, 0x6692, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 2, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vucomiss", 2, 0x2e, None, 1, + { "vgatherdpd", 3, 0x6692, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 2, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vunpckhpd", 3, 0x6615, None, 1, + { "vgatherdps", 3, 0x6692, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vunpckhpd", 3, 0x6615, None, 1, + { "vgatherdps", 3, 0x6692, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vunpckhps", 3, 0x15, None, 1, + { "vgatherqpd", 3, 0x6693, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vunpckhps", 3, 0x15, None, 1, + { "vgatherqpd", 3, 0x6693, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vunpcklpd", 3, 0x6614, None, 1, + { "vgatherqps", 3, 0x6693, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vunpcklpd", 3, 0x6614, None, 1, + { "vgatherqps", 3, 0x6693, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vunpcklps", 3, 0x14, None, 1, + { "vpgatherdd", 3, 0x6690, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vunpcklps", 3, 0x14, None, 1, + { "vpgatherdd", 3, 0x6690, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vxorpd", 3, 0x6657, None, 1, + { "vpgatherdq", 3, 0x6690, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vxorpd", 3, 0x6657, None, 1, + { "vpgatherdq", 3, 0x6690, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vxorps", 3, 0x57, None, 1, + { "vpgatherqd", 3, 0x6691, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vxorps", 3, 0x57, None, 1, + { "vpgatherqd", 3, 0x6691, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vzeroall", 0, 0x77, None, 1, + { "vpgatherqq", 3, 0x6691, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, + 2, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vzeroupper", 0, 0x77, None, 1, + { "vpgatherqq", 3, 0x6691, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, + 2, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vaesdec", 3, 0x66de, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27143,11 +29842,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vaesdeclast", 3, 0x66df, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27159,11 +29858,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vaesenc", 3, 0x66dc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27175,11 +29874,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vaesenclast", 3, 0x66dd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27191,11 +29890,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vaesimc", 2, 0x66db, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27204,11 +29903,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vaeskeygenassist", 3, 0x66df, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -27220,11 +29919,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpclmulqdq", 4, 0x6644, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -27239,11 +29938,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpclmullqlqdq", 3, 0x6644, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27255,11 +29954,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpclmulhqlqdq", 3, 0x6644, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27271,11 +29970,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpclmullqhqdq", 3, 0x6644, 0x10, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27287,11 +29986,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpclmulhqhqdq", 3, 0x6644, 0x11, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27304,60 +30003,60 @@ const insn_template i386_optab[] = { "rdfsbase", 1, 0xf30fae, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rdgsbase", 1, 0xf30fae, 0x1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rdrand", 1, 0xfc7, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "wrfsbase", 1, 0xf30fae, 0x2, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "wrgsbase", 1, 0xf30fae, 0x3, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vcvtph2ps", 2, 0x6613, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -27367,10 +30066,10 @@ const insn_template i386_optab[] = { "vcvtph2ps", 2, 0x6613, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27380,10 +30079,10 @@ const insn_template i386_optab[] = { "vcvtps2ph", 3, 0x661d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -27396,10 +30095,10 @@ const insn_template i386_optab[] = { "vcvtps2ph", 3, 0x661d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 2, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -27411,11 +30110,11 @@ const insn_template i386_optab[] = 1, 0, 1, 0, 0, 0 } } } }, { "vfmadd132pd", 3, 0x6698, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27427,11 +30126,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd132pd", 3, 0x6698, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27443,11 +30142,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd132ps", 3, 0x6698, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27459,11 +30158,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd132ps", 3, 0x6698, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27475,11 +30174,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd213pd", 3, 0x66a8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27491,11 +30190,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd213pd", 3, 0x66a8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27507,11 +30206,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd213ps", 3, 0x66a8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27523,11 +30222,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd213ps", 3, 0x66a8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27539,11 +30238,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd231pd", 3, 0x66b8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27555,11 +30254,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd231pd", 3, 0x66b8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27571,11 +30270,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd231ps", 3, 0x66b8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27587,11 +30286,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd231ps", 3, 0x66b8, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27603,11 +30302,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd132sd", 3, 0x6699, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -27619,11 +30318,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd132ss", 3, 0x6699, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -27635,11 +30334,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd213sd", 3, 0x66a9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -27651,11 +30350,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd213ss", 3, 0x66a9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -27667,11 +30366,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd231sd", 3, 0x66b9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -27683,11 +30382,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd231ss", 3, 0x66b9, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -27699,11 +30398,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub132pd", 3, 0x6696, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27715,11 +30414,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub132pd", 3, 0x6696, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27731,11 +30430,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub132ps", 3, 0x6696, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27747,11 +30446,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub132ps", 3, 0x6696, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27763,11 +30462,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub213pd", 3, 0x66a6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27779,11 +30478,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub213pd", 3, 0x66a6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27795,11 +30494,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub213ps", 3, 0x66a6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27811,11 +30510,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub213ps", 3, 0x66a6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27827,11 +30526,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub231pd", 3, 0x66b6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27843,11 +30542,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub231pd", 3, 0x66b6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27859,11 +30558,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub231ps", 3, 0x66b6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27875,11 +30574,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsub231ps", 3, 0x66b6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27891,11 +30590,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd132pd", 3, 0x6697, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27907,11 +30606,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd132pd", 3, 0x6697, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27923,11 +30622,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd132ps", 3, 0x6697, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27939,11 +30638,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd132ps", 3, 0x6697, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27955,11 +30654,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd213pd", 3, 0x66a7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -27971,11 +30670,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd213pd", 3, 0x66a7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -27987,11 +30686,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd213ps", 3, 0x66a7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28003,11 +30702,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd213ps", 3, 0x66a7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28019,11 +30718,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd231pd", 3, 0x66b7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28035,11 +30734,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd231pd", 3, 0x66b7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28051,11 +30750,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd231ps", 3, 0x66b7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28067,11 +30766,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubadd231ps", 3, 0x66b7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28083,11 +30782,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub132pd", 3, 0x669a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28099,11 +30798,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub132pd", 3, 0x669a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28115,11 +30814,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub132ps", 3, 0x669a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28131,11 +30830,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub132ps", 3, 0x669a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28147,11 +30846,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub213pd", 3, 0x66aa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28163,11 +30862,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub213pd", 3, 0x66aa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28179,11 +30878,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub213ps", 3, 0x66aa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28195,11 +30894,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub213ps", 3, 0x66aa, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28211,11 +30910,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub231pd", 3, 0x66ba, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28227,11 +30926,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub231pd", 3, 0x66ba, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28243,11 +30942,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub231ps", 3, 0x66ba, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28259,11 +30958,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub231ps", 3, 0x66ba, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28275,11 +30974,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub132sd", 3, 0x669b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28291,11 +30990,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub132ss", 3, 0x669b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28307,11 +31006,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub213sd", 3, 0x66ab, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28323,11 +31022,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub213ss", 3, 0x66ab, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28339,11 +31038,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub231sd", 3, 0x66bb, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28355,11 +31054,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsub231ss", 3, 0x66bb, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28371,11 +31070,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd132pd", 3, 0x669c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28387,11 +31086,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd132pd", 3, 0x669c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28403,11 +31102,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd132ps", 3, 0x669c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28419,11 +31118,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd132ps", 3, 0x669c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28435,11 +31134,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd213pd", 3, 0x66ac, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28451,11 +31150,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd213pd", 3, 0x66ac, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28467,11 +31166,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd213ps", 3, 0x66ac, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28483,11 +31182,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd213ps", 3, 0x66ac, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28499,11 +31198,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd231pd", 3, 0x66bc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28515,11 +31214,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd231pd", 3, 0x66bc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28531,11 +31230,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd231ps", 3, 0x66bc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28547,11 +31246,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd231ps", 3, 0x66bc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28563,11 +31262,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd132sd", 3, 0x669d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28579,11 +31278,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd132ss", 3, 0x669d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28595,11 +31294,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd213sd", 3, 0x66ad, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28611,11 +31310,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd213ss", 3, 0x66ad, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28627,11 +31326,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd231sd", 3, 0x66bd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28643,11 +31342,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmadd231ss", 3, 0x66bd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28659,11 +31358,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub132pd", 3, 0x669e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28675,11 +31374,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub132pd", 3, 0x669e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28691,11 +31390,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub132ps", 3, 0x669e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28707,11 +31406,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub132ps", 3, 0x669e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28723,11 +31422,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub213pd", 3, 0x66ae, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28739,11 +31438,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub213pd", 3, 0x66ae, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28755,11 +31454,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub213ps", 3, 0x66ae, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28771,11 +31470,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub213ps", 3, 0x66ae, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28787,11 +31486,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub231pd", 3, 0x66be, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28803,11 +31502,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub231pd", 3, 0x66be, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28819,11 +31518,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub231ps", 3, 0x66be, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28835,11 +31534,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub231ps", 3, 0x66be, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -28851,11 +31550,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub132sd", 3, 0x669f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28867,11 +31566,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub132ss", 3, 0x669f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -28883,75 +31582,203 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsub213sd", 3, 0x66af, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vfnmsub213ss", 3, 0x66af, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vfnmsub231sd", 3, 0x66bf, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "vfnmsub231ss", 3, 0x66bf, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, + 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "bzhi", 3, 0xf5, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "mulx", 3, 0xf2f6, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "pdep", 3, 0xf2f5, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "pext", 3, 0xf3f5, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } } } }, + { "rorx", 3, 0xf2f0, None, 1, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, + 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vfnmsub213ss", 3, 0x66af, None, 1, + { "sarx", 3, 0xf3f7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vfnmsub231sd", 3, 0x66bf, None, 1, + { "shlx", 3, 0x66f7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 2, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "vfnmsub231ss", 3, 0x66bf, None, 1, + { "shrx", 3, 0xf2f7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 1, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, + 0, 0, 1, 0, 0, 0 } }, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddpd", 4, 0x6669, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -28966,11 +31793,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddpd", 4, 0x6669, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -28985,11 +31812,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddpd", 4, 0x6669, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -29004,11 +31831,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddpd", 4, 0x6669, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29023,11 +31850,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddps", 4, 0x6668, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -29042,11 +31869,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddps", 4, 0x6668, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29061,11 +31888,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddps", 4, 0x6668, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -29080,11 +31907,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddps", 4, 0x6668, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29099,11 +31926,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsd", 4, 0x666b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -29118,11 +31945,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsd", 4, 0x666b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29137,11 +31964,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddss", 4, 0x666a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -29156,11 +31983,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddss", 4, 0x666a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29175,11 +32002,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsubpd", 4, 0x665d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -29194,11 +32021,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsubpd", 4, 0x665d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29213,11 +32040,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsubpd", 4, 0x665d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -29232,11 +32059,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsubpd", 4, 0x665d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29251,11 +32078,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsubps", 4, 0x665c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -29270,11 +32097,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsubps", 4, 0x665c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29289,11 +32116,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsubps", 4, 0x665c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -29308,11 +32135,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmaddsubps", 4, 0x665c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29327,11 +32154,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubaddpd", 4, 0x665f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -29346,11 +32173,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubaddpd", 4, 0x665f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29365,11 +32192,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubaddpd", 4, 0x665f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -29384,11 +32211,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubaddpd", 4, 0x665f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29403,11 +32230,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubaddps", 4, 0x665e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -29422,11 +32249,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubaddps", 4, 0x665e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29441,11 +32268,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubaddps", 4, 0x665e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -29460,11 +32287,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubaddps", 4, 0x665e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29479,11 +32306,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubpd", 4, 0x666d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -29498,11 +32325,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubpd", 4, 0x666d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29517,11 +32344,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubpd", 4, 0x666d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -29536,11 +32363,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubpd", 4, 0x666d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29555,11 +32382,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubps", 4, 0x666c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -29574,11 +32401,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubps", 4, 0x666c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29593,11 +32420,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubps", 4, 0x666c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -29612,11 +32439,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubps", 4, 0x666c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29631,11 +32458,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubsd", 4, 0x666f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -29650,11 +32477,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubsd", 4, 0x666f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29669,11 +32496,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubss", 4, 0x666e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -29688,11 +32515,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfmsubss", 4, 0x666e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29707,11 +32534,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddpd", 4, 0x6679, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -29726,11 +32553,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddpd", 4, 0x6679, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29745,11 +32572,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddpd", 4, 0x6679, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -29764,11 +32591,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddpd", 4, 0x6679, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29783,11 +32610,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddps", 4, 0x6678, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -29802,11 +32629,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddps", 4, 0x6678, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29821,11 +32648,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddps", 4, 0x6678, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -29840,11 +32667,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddps", 4, 0x6678, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29859,11 +32686,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddsd", 4, 0x667b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -29878,11 +32705,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddsd", 4, 0x667b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29897,11 +32724,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddss", 4, 0x667a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -29916,11 +32743,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmaddss", 4, 0x667a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29935,11 +32762,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubpd", 4, 0x667d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -29954,11 +32781,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubpd", 4, 0x667d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -29973,11 +32800,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubpd", 4, 0x667d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -29992,11 +32819,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubpd", 4, 0x667d, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30011,11 +32838,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubps", 4, 0x667c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30030,11 +32857,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubps", 4, 0x667c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30049,11 +32876,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubps", 4, 0x667c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -30068,11 +32895,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubps", 4, 0x667c, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30087,11 +32914,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubsd", 4, 0x667f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -30106,11 +32933,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubsd", 4, 0x667f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30125,11 +32952,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubss", 4, 0x667e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -30144,11 +32971,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfnmsubss", 4, 0x667e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30163,11 +32990,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfrczpd", 2, 0x81, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30176,11 +33003,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfrczpd", 2, 0x81, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -30189,11 +33016,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfrczps", 2, 0x80, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30202,11 +33029,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfrczps", 2, 0x80, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, - 1, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -30215,11 +33042,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfrczsd", 2, 0x83, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -30228,11 +33055,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vfrczss", 2, 0x82, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, @@ -30241,11 +33068,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcmov", 4, 0xa2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30260,11 +33087,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcmov", 4, 0xa2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30279,11 +33106,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcmov", 4, 0xa2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30298,11 +33125,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcmov", 4, 0xa2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } }, @@ -30317,11 +33144,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomb", 4, 0xcc, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30336,11 +33163,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomd", 4, 0xce, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30355,11 +33182,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomq", 4, 0xcf, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30374,11 +33201,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomub", 4, 0xec, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30393,11 +33220,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomud", 4, 0xee, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30412,11 +33239,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomuq", 4, 0xef, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30431,11 +33258,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomuw", 4, 0xed, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30450,11 +33277,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomw", 4, 0xcd, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -30469,11 +33296,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpermil2pd", 5, 0x6649, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, @@ -30491,11 +33318,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpermil2pd", 5, 0x6649, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, @@ -30513,11 +33340,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpermil2pd", 5, 0x6649, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, @@ -30535,11 +33362,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpermil2pd", 5, 0x6649, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, @@ -30557,11 +33384,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpermil2ps", 5, 0x6648, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, @@ -30579,11 +33406,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpermil2ps", 5, 0x6648, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, @@ -30601,11 +33428,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpermil2ps", 5, 0x6648, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 1, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, @@ -30623,11 +33450,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpermil2ps", 5, 0x6648, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, - 2, 2, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 2, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, @@ -30645,11 +33472,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomltb", 3, 0xcc, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30661,11 +33488,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomltd", 3, 0xce, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30677,11 +33504,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomltq", 3, 0xcf, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30693,11 +33520,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomltub", 3, 0xec, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30709,11 +33536,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomltud", 3, 0xee, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30725,11 +33552,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomltuq", 3, 0xef, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30741,11 +33568,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomltuw", 3, 0xed, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30757,11 +33584,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomltw", 3, 0xcd, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30773,11 +33600,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomleb", 3, 0xcc, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30789,11 +33616,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomled", 3, 0xce, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30805,11 +33632,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomleq", 3, 0xcf, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30821,11 +33648,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomleub", 3, 0xec, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30837,11 +33664,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomleud", 3, 0xee, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30853,11 +33680,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomleuq", 3, 0xef, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30869,11 +33696,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomleuw", 3, 0xed, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30885,11 +33712,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomlew", 3, 0xcd, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30901,11 +33728,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgtb", 3, 0xcc, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30917,11 +33744,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgtd", 3, 0xce, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30933,11 +33760,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgtq", 3, 0xcf, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30949,11 +33776,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgtub", 3, 0xec, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30965,11 +33792,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgtud", 3, 0xee, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30981,11 +33808,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgtuq", 3, 0xef, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -30997,11 +33824,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgtuw", 3, 0xed, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31013,11 +33840,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgtw", 3, 0xcd, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31029,11 +33856,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgeb", 3, 0xcc, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31045,11 +33872,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomged", 3, 0xce, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31061,11 +33888,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgeq", 3, 0xcf, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31077,11 +33904,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgeub", 3, 0xec, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31093,11 +33920,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgeud", 3, 0xee, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31109,11 +33936,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgeuq", 3, 0xef, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31125,11 +33952,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgeuw", 3, 0xed, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31141,11 +33968,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomgew", 3, 0xcd, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31157,11 +33984,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomeqb", 3, 0xcc, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31173,11 +34000,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomeqd", 3, 0xce, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31189,11 +34016,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomeqq", 3, 0xcf, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31205,11 +34032,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomequb", 3, 0xec, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31221,11 +34048,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomequd", 3, 0xee, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31237,11 +34064,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomequq", 3, 0xef, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31253,11 +34080,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomequw", 3, 0xed, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31269,11 +34096,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomeqw", 3, 0xcd, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31285,11 +34112,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomneqb", 3, 0xcc, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31301,11 +34128,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomneqd", 3, 0xce, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31317,11 +34144,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomneqq", 3, 0xcf, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31333,11 +34160,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomnequb", 3, 0xec, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31349,11 +34176,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomnequd", 3, 0xee, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31365,11 +34192,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomnequq", 3, 0xef, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31381,11 +34208,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomnequw", 3, 0xed, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31397,11 +34224,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomneqw", 3, 0xcd, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31413,11 +34240,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomfalseb", 3, 0xcc, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31429,11 +34256,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomfalsed", 3, 0xce, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31445,11 +34272,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomfalseq", 3, 0xcf, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31461,11 +34288,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomfalseub", 3, 0xec, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31477,11 +34304,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomfalseud", 3, 0xee, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31493,11 +34320,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomfalseuq", 3, 0xef, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31509,11 +34336,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomfalseuw", 3, 0xed, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31525,11 +34352,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomfalsew", 3, 0xcd, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31541,11 +34368,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomtrueb", 3, 0xcc, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31557,11 +34384,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomtrued", 3, 0xce, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31573,11 +34400,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomtrueq", 3, 0xcf, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31589,11 +34416,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomtrueub", 3, 0xec, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31605,11 +34432,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomtrueud", 3, 0xee, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31621,11 +34448,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomtrueuq", 3, 0xef, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31637,11 +34464,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomtrueuw", 3, 0xed, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31653,11 +34480,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpcomtruew", 3, 0xcd, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, - 1, 3, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31669,11 +34496,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphaddbd", 2, 0xc2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31682,11 +34509,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphaddbq", 2, 0xc3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31695,11 +34522,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphaddbw", 2, 0xc1, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31708,11 +34535,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphadddq", 2, 0xcb, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31721,11 +34548,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphaddubd", 2, 0xd2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31734,11 +34561,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphaddubq", 2, 0xd3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31747,11 +34574,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphaddubw", 2, 0xd1, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31760,11 +34587,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphaddudq", 2, 0xdb, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31773,11 +34600,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphadduwd", 2, 0xd6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31786,11 +34613,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphadduwq", 2, 0xd7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31799,11 +34626,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphaddwd", 2, 0xc6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31812,11 +34639,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphaddwq", 2, 0xc7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31825,11 +34652,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphsubbw", 2, 0xe1, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31838,11 +34665,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphsubdq", 2, 0xe3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31851,11 +34678,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vphsubwd", 2, 0xe2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -31864,11 +34691,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmacsdd", 4, 0x9e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -31883,11 +34710,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmacsdqh", 4, 0x9f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -31902,11 +34729,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmacsdql", 4, 0x97, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -31921,11 +34748,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmacssdd", 4, 0x8e, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -31940,11 +34767,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmacssdqh", 4, 0x8f, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -31959,11 +34786,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmacssdql", 4, 0x87, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -31978,11 +34805,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmacsswd", 4, 0x86, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -31997,11 +34824,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmacssww", 4, 0x85, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32016,11 +34843,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmacswd", 4, 0x96, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32035,11 +34862,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmacsww", 4, 0x95, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32054,11 +34881,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmadcsswd", 4, 0xa6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32073,11 +34900,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpmadcswd", 4, 0xb6, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32092,11 +34919,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpperm", 4, 0xa3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 1, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32111,11 +34938,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpperm", 4, 0xa3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 2, 3, 2, 1, 0, 0, 0, 0, 0, 0 }, + 2, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32130,11 +34957,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotb", 3, 0x90, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32146,11 +34973,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotb", 3, 0x90, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32162,11 +34989,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotb", 3, 0xc0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 3, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32178,11 +35005,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotd", 3, 0x92, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32194,11 +35021,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotd", 3, 0x92, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32210,11 +35037,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotd", 3, 0xc2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 3, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32226,11 +35053,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotq", 3, 0x93, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32242,11 +35069,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotq", 3, 0x93, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32258,11 +35085,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotq", 3, 0xc3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 3, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32274,11 +35101,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotw", 3, 0x91, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32290,11 +35117,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotw", 3, 0x91, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32306,11 +35133,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vprotw", 3, 0xc1, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 3, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32322,11 +35149,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshab", 3, 0x98, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32338,11 +35165,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshab", 3, 0x98, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32354,11 +35181,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshad", 3, 0x9a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32370,11 +35197,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshad", 3, 0x9a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32386,11 +35213,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshaq", 3, 0x9b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32402,11 +35229,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshaq", 3, 0x9b, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32418,11 +35245,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshaw", 3, 0x99, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32434,11 +35261,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshaw", 3, 0x99, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32450,11 +35277,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshlb", 3, 0x94, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32466,11 +35293,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshlb", 3, 0x94, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32482,11 +35309,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshld", 3, 0x96, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32498,11 +35325,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshld", 3, 0x96, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32514,11 +35341,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshlq", 3, 0x97, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32530,11 +35357,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshlq", 3, 0x97, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32546,11 +35373,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshlw", 3, 0x95, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32562,11 +35389,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vpshlw", 3, 0x95, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 2, 4, 1, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -32578,51 +35405,51 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "llwpcb", 1, 0x12, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "llwpcb", 1, 0x12, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 2, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "slwpcb", 1, 0x12, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 1, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "slwpcb", 1, 0x12, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, - 2, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "lwpval", 3, 0x12, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 3, - 1, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32634,11 +35461,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "lwpval", 3, 0x12, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 3, - 2, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32650,11 +35477,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "lwpins", 3, 0x12, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 3, - 1, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, + 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32666,11 +35493,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "lwpins", 3, 0x12, 0x0, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 3, - 2, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, + 2, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32682,11 +35509,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "andn", 3, 0xf2, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32698,11 +35525,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "bextr", 3, 0xf7, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1, - 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32715,10 +35542,10 @@ const insn_template i386_optab[] = { "bextr", 3, 0x10, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, - 0, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -32730,11 +35557,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "blsi", 2, 0xf3, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32743,11 +35570,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "blsmsk", 2, 0xf3, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32756,11 +35583,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "blsr", 2, 0xf3, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32769,11 +35596,11 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "tzcnt", 2, 0xf30fbc, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32783,10 +35610,10 @@ const insn_template i386_optab[] = { "blcfill", 2, 0x01, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32796,10 +35623,10 @@ const insn_template i386_optab[] = { "blci", 2, 0x02, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32809,10 +35636,10 @@ const insn_template i386_optab[] = { "blcic", 2, 0x01, 0x5, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32822,10 +35649,10 @@ const insn_template i386_optab[] = { "blcmsk", 2, 0x02, 0x1, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32835,10 +35662,10 @@ const insn_template i386_optab[] = { "blcs", 2, 0x01, 0x3, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32848,10 +35675,10 @@ const insn_template i386_optab[] = { "blsfill", 2, 0x01, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32861,10 +35688,10 @@ const insn_template i386_optab[] = { "blsic", 2, 0x01, 0x6, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32874,10 +35701,10 @@ const insn_template i386_optab[] = { "t1mskc", 2, 0x01, 0x7, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32887,10 +35714,10 @@ const insn_template i386_optab[] = { "tzmsk", 2, 0x01, 0x4, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, - 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32900,40 +35727,40 @@ const insn_template i386_optab[] = { "prefetch", 1, 0xf0d, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "prefetchw", 1, 0xf0d, 0x1, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } }, { "femms", 0, 0xf0e, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "pavgusb", 2, 0xf0f, 0xbf, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32943,10 +35770,10 @@ const insn_template i386_optab[] = { "pf2id", 2, 0xf0f, 0x1d, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32956,10 +35783,10 @@ const insn_template i386_optab[] = { "pf2iw", 2, 0xf0f, 0x1c, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32969,10 +35796,10 @@ const insn_template i386_optab[] = { "pfacc", 2, 0xf0f, 0xae, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32982,10 +35809,10 @@ const insn_template i386_optab[] = { "pfadd", 2, 0xf0f, 0x9e, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -32995,10 +35822,10 @@ const insn_template i386_optab[] = { "pfcmpeq", 2, 0xf0f, 0xb0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33008,10 +35835,10 @@ const insn_template i386_optab[] = { "pfcmpge", 2, 0xf0f, 0x90, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33021,10 +35848,10 @@ const insn_template i386_optab[] = { "pfcmpgt", 2, 0xf0f, 0xa0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33034,10 +35861,10 @@ const insn_template i386_optab[] = { "pfmax", 2, 0xf0f, 0xa4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33047,10 +35874,10 @@ const insn_template i386_optab[] = { "pfmin", 2, 0xf0f, 0x94, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33060,10 +35887,10 @@ const insn_template i386_optab[] = { "pfmul", 2, 0xf0f, 0xb4, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33073,10 +35900,10 @@ const insn_template i386_optab[] = { "pfnacc", 2, 0xf0f, 0x8a, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33086,10 +35913,10 @@ const insn_template i386_optab[] = { "pfpnacc", 2, 0xf0f, 0x8e, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33099,10 +35926,10 @@ const insn_template i386_optab[] = { "pfrcp", 2, 0xf0f, 0x96, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33112,10 +35939,10 @@ const insn_template i386_optab[] = { "pfrcpit1", 2, 0xf0f, 0xa6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33125,10 +35952,10 @@ const insn_template i386_optab[] = { "pfrcpit2", 2, 0xf0f, 0xb6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33138,10 +35965,10 @@ const insn_template i386_optab[] = { "pfrsqit1", 2, 0xf0f, 0xa7, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33151,10 +35978,10 @@ const insn_template i386_optab[] = { "pfrsqrt", 2, 0xf0f, 0x97, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33164,10 +35991,10 @@ const insn_template i386_optab[] = { "pfsub", 2, 0xf0f, 0x9a, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33177,10 +36004,10 @@ const insn_template i386_optab[] = { "pfsubr", 2, 0xf0f, 0xaa, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33190,10 +36017,10 @@ const insn_template i386_optab[] = { "pi2fd", 2, 0xf0f, 0xd, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33203,10 +36030,10 @@ const insn_template i386_optab[] = { "pi2fw", 2, 0xf0f, 0xc, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33216,10 +36043,10 @@ const insn_template i386_optab[] = { "pmulhrw", 2, 0xf0f, 0xb7, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33229,10 +36056,10 @@ const insn_template i386_optab[] = { "pswapd", 2, 0xf0f, 0xbb, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33242,90 +36069,90 @@ const insn_template i386_optab[] = { "syscall", 0, 0xf05, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "syscall", 0, 0xf05, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "sysret", 0, 0xf07, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "sysret", 0, 0xf07, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "swapgs", 0, 0xf01, 0xf8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "rdtscp", 0, 0xf01, 0xf9, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "clgi", 0, 0xf01, 0xdd, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "invlpga", 0, 0xf01, 0xdf, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "invlpga", 2, 0xf01, 0xdf, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -33335,110 +36162,110 @@ const insn_template i386_optab[] = { "skinit", 0, 0xf01, 0xde, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "skinit", 1, 0xf01, 0xde, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "stgi", 0, 0xf01, 0xdc, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vmload", 0, 0xf01, 0xda, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vmload", 1, 0xf01, 0xda, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vmmcall", 0, 0xf01, 0xd9, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vmrun", 0, 0xf01, 0xd8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vmrun", 1, 0xf01, 0xd8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vmsave", 0, 0xf01, 0xdb, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vmsave", 1, 0xf01, 0xdb, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "movntsd", 2, 0xf20f2b, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -33448,10 +36275,10 @@ const insn_template i386_optab[] = { "movntss", 2, 0xf30f2b, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -33461,10 +36288,10 @@ const insn_template i386_optab[] = { "extrq", 3, 0x660f78, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -33477,10 +36304,10 @@ const insn_template i386_optab[] = { "extrq", 2, 0x660f79, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -33490,10 +36317,10 @@ const insn_template i386_optab[] = { "insertq", 2, 0xf20f79, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -33503,10 +36330,10 @@ const insn_template i386_optab[] = { "insertq", 4, 0xf20f78, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -33522,10 +36349,10 @@ const insn_template i386_optab[] = { "popcnt", 2, 0xf30fb8, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33535,10 +36362,10 @@ const insn_template i386_optab[] = { "lzcnt", 2, 0xf30fbd, None, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -33548,170 +36375,170 @@ const insn_template i386_optab[] = { "xstore-rng", 0, 0xfa7, 0xc0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xcrypt-ecb", 0, 0xf30fa7, 0xc8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xcrypt-cbc", 0, 0xf30fa7, 0xd0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xcrypt-ctr", 0, 0xf30fa7, 0xd8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xcrypt-cfb", 0, 0xf30fa7, 0xe0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xcrypt-ofb", 0, 0xf30fa7, 0xe8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "montmul", 0, 0xf30fa6, 0xc0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xsha1", 0, 0xf30fa6, 0xc8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xsha256", 0, 0xf30fa6, 0xd0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xstorerng", 0, 0xfa7, 0xc0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xcryptecb", 0, 0xf30fa7, 0xc8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xcryptcbc", 0, 0xf30fa7, 0xd0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xcryptctr", 0, 0xf30fa7, 0xd8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xcryptcfb", 0, 0xf30fa7, 0xe0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xcryptofb", 0, 0xf30fa7, 0xe8, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "xstore", 0, 0xfa7, 0xc0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { NULL, 0, 0, 0, 0, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } } diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c index 0f6852f..9463668 100644 --- a/opcodes/m68k-opc.c +++ b/opcodes/m68k-opc.c @@ -1,6 +1,6 @@ /* Opcode table for m680[012346]0/m6888[12]/m68851/mcf5200. Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2003, 2004, 2005, 2006, 2007, 2009, 2010 + 2000, 2001, 2003, 2004, 2005, 2006, 2007, 2009, 2010, 2011 Free Software Foundation, Inc. This file is part of the GNU opcodes library. @@ -1553,15 +1553,10 @@ const struct m68k_opcode m68k_opcodes[] = {"moveml", 4, one(0044300), one(0177700), "#w>s", m68000up }, {"moveml", 4, one(0046300), one(0177700), " +#include "sysdep.h" +#include "opcode/mips.h" + +#define UBD INSN_UNCOND_BRANCH_DELAY +#define CBD INSN_COND_BRANCH_DELAY +#define NODS INSN_NO_DELAY_SLOT +#define TRAP INSN_NO_DELAY_SLOT +#define SM INSN_STORE_MEMORY +#define BD16 INSN2_BRANCH_DELAY_16BIT /* Used in pinfo2. */ +#define BD32 INSN2_BRANCH_DELAY_32BIT /* Used in pinfo2. */ + +/* For 16-bit/32-bit microMIPS instructions. They are used in pinfo2. */ +#define UBR INSN2_UNCOND_BRANCH +#define CBR INSN2_COND_BRANCH +#define WR_mb INSN2_WRITE_GPR_MB +#define RD_mc INSN2_READ_GPR_MC +#define RD_md INSN2_MOD_GPR_MD +#define WR_md INSN2_MOD_GPR_MD +#define RD_me INSN2_READ_GPR_ME +#define RD_mf INSN2_MOD_GPR_MF +#define WR_mf INSN2_MOD_GPR_MF +#define RD_mg INSN2_READ_GPR_MG +#define WR_mhi INSN2_WRITE_GPR_MHI +#define RD_mj INSN2_READ_GPR_MJ +#define WR_mj INSN2_WRITE_GPR_MJ +#define RD_ml RD_mc /* Reuse, since the bit position is the same. */ +#define RD_mmn INSN2_READ_GPR_MMN +#define RD_mp INSN2_READ_GPR_MP +#define WR_mp INSN2_WRITE_GPR_MP +#define RD_mq INSN2_READ_GPR_MQ +#define RD_sp INSN2_MOD_SP +#define WR_sp INSN2_MOD_SP +#define RD_31 INSN2_READ_GPR_31 +#define RD_gp INSN2_READ_GP +#define RD_pc INSN2_READ_PC + +/* For 32-bit microMIPS instructions. */ +#define WR_s INSN_WRITE_GPR_S +#define WR_d INSN_WRITE_GPR_D +#define WR_t INSN_WRITE_GPR_T +#define WR_31 INSN_WRITE_GPR_31 +#define WR_D INSN_WRITE_FPR_D +#define WR_T INSN_WRITE_FPR_T +#define WR_S INSN_WRITE_FPR_S +#define WR_CC INSN_WRITE_COND_CODE + +#define RD_s INSN_READ_GPR_S +#define RD_b INSN_READ_GPR_S +#define RD_t INSN_READ_GPR_T +#define RD_T INSN_READ_FPR_T +#define RD_S INSN_READ_FPR_S +#define RD_R INSN_READ_FPR_R +#define RD_D INSN2_READ_FPR_D /* Used in pinfo2. */ +#define RD_CC INSN_READ_COND_CODE +#define RD_C0 INSN_COP +#define RD_C1 INSN_COP +#define RD_C2 INSN_COP +#define WR_C0 INSN_COP +#define WR_C1 INSN_COP +#define WR_C2 INSN_COP +#define CP INSN_COP + +#define WR_HI INSN_WRITE_HI +#define RD_HI INSN_READ_HI + +#define WR_LO INSN_WRITE_LO +#define RD_LO INSN_READ_LO + +#define WR_HILO WR_HI|WR_LO +#define RD_HILO RD_HI|RD_LO +#define MOD_HILO WR_HILO|RD_HILO + +/* Reuse INSN_ISA1 for 32-bit microMIPS ISA. All instructions in I1 + are accepted as 32-bit microMIPS ISA. + Reuse INSN_ISA3 for 64-bit microMIPS ISA. All instructions in I3 + are accepted as 64-bit microMIPS ISA. */ +#define I1 INSN_ISA1 +#define I3 INSN_ISA3 + +/* MIPS MCU (MicroController) ASE support. */ +#define MC INSN_MCU + +const struct mips_opcode micromips_opcodes[] = +{ +/* These instructions appear first so that the disassembler will find + them first. The assemblers uses a hash table based on the + instruction name anyhow. */ +/* name, args, match, mask, pinfo, pinfo2, membership */ +{"pref", "k,~(b)", 0x60002000, 0xfc00f000, RD_b, 0, I1 }, +{"pref", "k,o(b)", 0, (int) M_PREF_OB, INSN_MACRO, 0, I1 }, +{"pref", "k,A(b)", 0, (int) M_PREF_AB, INSN_MACRO, 0, I1 }, +{"prefx", "h,t(b)", 0x540001a0, 0xfc0007ff, RD_b|RD_t|FP_S, 0, I1 }, +{"nop", "", 0x0c00, 0xffff, 0, INSN2_ALIAS, I1 }, +{"nop", "", 0x00000000, 0xffffffff, 0, INSN2_ALIAS, I1 }, /* sll */ +{"ssnop", "", 0x00000800, 0xffffffff, 0, INSN2_ALIAS, I1 }, /* sll */ +{"ehb", "", 0x00001800, 0xffffffff, 0, INSN2_ALIAS, I1 }, /* sll */ +{"pause", "", 0x00002800, 0xffffffff, 0, INSN2_ALIAS, I1 }, /* sll */ +{"li", "md,mI", 0xec00, 0xfc00, 0, WR_md, I1 }, +{"li", "t,j", 0x30000000, 0xfc1f0000, WR_t, INSN2_ALIAS, I1 }, /* addiu */ +{"li", "t,i", 0x50000000, 0xfc1f0000, WR_t, INSN2_ALIAS, I1 }, /* ori */ +#if 0 +/* Disabled until we can handle 48-bit opcodes. */ +{"li", "s,I", 0x7c0000010000, 0xfc00001f0000, WR_t, 0, I3 }, /* li48 */ +#endif +{"li", "t,I", 0, (int) M_LI, INSN_MACRO, 0, I1 }, +{"move", "d,s", 0, (int) M_MOVE, INSN_MACRO, 0, I1 }, +{"move", "mp,mj", 0x0c00, 0xfc00, 0, WR_mp|RD_mj, I1 }, +{"move", "d,s", 0x58000150, 0xffe007ff, WR_d|RD_s, INSN2_ALIAS, I3 }, /* daddu */ +{"move", "d,s", 0x00000150, 0xffe007ff, WR_d|RD_s, INSN2_ALIAS, I1 }, /* addu */ +{"move", "d,s", 0x00000290, 0xffe007ff, WR_d|RD_s, INSN2_ALIAS, I1 }, /* or */ +{"b", "mD", 0xcc00, 0xfc00, UBD, 0, I1 }, +{"b", "p", 0x94000000, 0xffff0000, UBD, INSN2_ALIAS, I1 }, /* beq 0, 0 */ +{"b", "p", 0x40400000, 0xffff0000, UBD, INSN2_ALIAS, I1 }, /* bgez 0 */ +{"bal", "p", 0x40600000, 0xffff0000, UBD|WR_31, INSN2_ALIAS|BD32, I1 }, /* bgezal 0 */ +{"bals", "p", 0x42600000, 0xffff0000, UBD|WR_31, INSN2_ALIAS|BD16, I1 }, /* bgezals 0 */ +{"bc", "p", 0x40e00000, 0xffff0000, NODS, INSN2_ALIAS|UBR, I1 }, /* beqzc 0 */ + +{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, 0, I1 }, +{"abs.d", "T,V", 0x5400237b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"abs.s", "T,V", 0x5400037b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"abs.ps", "T,V", 0x5400437b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"aclr", "\\,~(b)", 0x2000b000, 0xff00f000, SM|RD_b|NODS, 0, MC }, +{"aclr", "\\,o(b)", 0, (int) M_ACLR_OB, INSN_MACRO, 0, MC }, +{"aclr", "\\,A(b)", 0, (int) M_ACLR_AB, INSN_MACRO, 0, MC }, +{"add", "d,v,t", 0x00000110, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, 0, I1 }, +{"add.d", "D,V,T", 0x54000130, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D, 0, I1 }, +{"add.s", "D,V,T", 0x54000030, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S, 0, I1 }, +{"add.ps", "D,V,T", 0x54000230, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D, 0, I1 }, +{"addi", "t,r,j", 0x10000000, 0xfc000000, WR_t|RD_s, 0, I1 }, +{"addiu", "mp,mj,mZ", 0x0c00, 0xfc00, 0, WR_mp|RD_mj, I1 }, /* move */ +{"addiu", "md,ms,mW", 0x6c01, 0xfc01, 0, WR_md|RD_sp, I1 }, /* addiur1sp */ +{"addiu", "md,mc,mB", 0x6c00, 0xfc01, 0, WR_md|RD_mc, I1 }, /* addiur2 */ +{"addiu", "ms,mt,mY", 0x4c01, 0xfc01, 0, WR_sp|RD_sp, I1 }, /* addiusp */ +{"addiu", "mp,mt,mX", 0x4c00, 0xfc01, 0, WR_mp|RD_mp, I1 }, /* addius5 */ +{"addiu", "mb,mr,mQ", 0x78000000, 0xfc000000, 0, WR_mb|RD_pc, I1 }, /* addiupc */ +{"addiu", "t,r,j", 0x30000000, 0xfc000000, WR_t|RD_s, 0, I1 }, +{"addiupc", "mb,mQ", 0x78000000, 0xfc000000, 0, WR_mb|RD_pc, I1 }, +{"addiur1sp", "md,mW", 0x6c01, 0xfc01, 0, WR_md|RD_sp, I1 }, +{"addiur2", "md,mc,mB", 0x6c00, 0xfc01, 0, WR_md|RD_mc, I1 }, +{"addiusp", "mY", 0x4c01, 0xfc01, 0, WR_sp|RD_sp, I1 }, +{"addius5", "mp,mX", 0x4c00, 0xfc01, 0, WR_mp|RD_mp, I1 }, +{"addu", "mp,mj,mz", 0x0c00, 0xfc00, 0, WR_mp|RD_mj, I1 }, /* move */ +{"addu", "mp,mz,mj", 0x0c00, 0xfc00, 0, WR_mp|RD_mj, I1 }, /* move */ +{"addu", "md,me,ml", 0x0400, 0xfc01, 0, WR_md|RD_me|RD_ml, I1 }, +{"addu", "d,v,t", 0x00000150, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, 0, I1 }, +/* We have no flag to mark the read from "y", so we use TRAP to disable + delay slot scheduling of ALNV.PS altogether. */ +{"alnv.ps", "D,V,T,y", 0x54000019, 0xfc00003f, TRAP|WR_D|RD_S|RD_T|FP_D, 0, I1 }, +{"and", "mf,mt,mg", 0x4480, 0xffc0, 0, WR_mf|RD_mf|RD_mg, I1 }, +{"and", "mf,mg,mx", 0x4480, 0xffc0, 0, WR_mf|RD_mf|RD_mg, I1 }, +{"and", "d,v,t", 0x00000250, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, 0, I1 }, +{"andi", "md,mc,mC", 0x2c00, 0xfc00, 0, WR_md|RD_mc, I1 }, +{"andi", "t,r,i", 0xd0000000, 0xfc000000, WR_t|RD_s, 0, I1 }, +{"aset", "\\,~(b)", 0x20003000, 0xff00f000, SM|RD_b|NODS, 0, MC }, +{"aset", "\\,o(b)", 0, (int) M_ASET_OB, INSN_MACRO, 0, MC }, +{"aset", "\\,A(b)", 0, (int) M_ASET_AB, INSN_MACRO, 0, MC }, +/* b is at the top of the table. */ +/* bal is at the top of the table. */ +{"bc1f", "p", 0x43800000, 0xffff0000, CBD|RD_CC|FP_S, 0, I1 }, +{"bc1f", "N,p", 0x43800000, 0xffe30000, CBD|RD_CC|FP_S, 0, I1 }, +{"bc1fl", "p", 0, (int) M_BC1FL, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"bc1fl", "N,p", 0, (int) M_BC1FL, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"bc2f", "p", 0x42800000, 0xffff0000, CBD|RD_CC, 0, I1 }, +{"bc2f", "N,p", 0x42800000, 0xffe30000, CBD|RD_CC, 0, I1 }, +{"bc2fl", "p", 0, (int) M_BC2FL, INSN_MACRO, 0, I1 }, +{"bc2fl", "N,p", 0, (int) M_BC2FL, INSN_MACRO, 0, I1 }, +{"bc1t", "p", 0x43a00000, 0xffff0000, CBD|RD_CC|FP_S, 0, I1 }, +{"bc1t", "N,p", 0x43a00000, 0xffe30000, CBD|RD_CC|FP_S, 0, I1 }, +{"bc1tl", "p", 0, (int) M_BC1TL, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"bc1tl", "N,p", 0, (int) M_BC1TL, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"bc2t", "p", 0x42a00000, 0xffff0000, CBD|RD_CC, 0, I1 }, +{"bc2t", "N,p", 0x42a00000, 0xffe30000, CBD|RD_CC, 0, I1 }, +{"bc2tl", "p", 0, (int) M_BC2TL, INSN_MACRO, 0, I1 }, +{"bc2tl", "N,p", 0, (int) M_BC2TL, INSN_MACRO, 0, I1 }, +{"beqz", "md,mE", 0x8c00, 0xfc00, CBD, RD_md, I1 }, +{"beqz", "s,p", 0x94000000, 0xffe00000, CBD|RD_s, 0, I1 }, +{"beqzc", "s,p", 0x40e00000, 0xffe00000, NODS|RD_s, CBR, I1 }, +{"beqzl", "s,p", 0, (int) M_BEQL, INSN_MACRO, 0, I1 }, +{"beq", "md,mz,mE", 0x8c00, 0xfc00, CBD, RD_md, I1 }, /* beqz */ +{"beq", "mz,md,mE", 0x8c00, 0xfc00, CBD, RD_md, I1 }, /* beqz */ +{"beq", "s,t,p", 0x94000000, 0xfc000000, CBD|RD_s|RD_t, 0, I1 }, +{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, 0, I1 }, +{"beql", "s,t,p", 0, (int) M_BEQL, INSN_MACRO, 0, I1 }, +{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, 0, I1 }, +{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, 0, I1 }, +{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, 0, I1 }, +{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, 0, I1 }, +{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, 0, I1 }, +{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, 0, I1 }, +{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, 0, I1 }, +{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, 0, I1 }, +{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, 0, I1 }, +{"bgez", "s,p", 0x40400000, 0xffe00000, CBD|RD_s, 0, I1 }, +{"bgezl", "s,p", 0, (int) M_BGEZL, INSN_MACRO, 0, I1 }, +{"bgezal", "s,p", 0x40600000, 0xffe00000, CBD|RD_s|WR_31, BD32, I1 }, +{"bgezals", "s,p", 0x42600000, 0xffe00000, CBD|RD_s|WR_31, BD16, I1 }, +{"bgezall", "s,p", 0, (int) M_BGEZALL, INSN_MACRO, 0, I1 }, +{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, 0, I1 }, +{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, 0, I1 }, +{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, 0, I1 }, +{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, 0, I1 }, +{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, 0, I1 }, +{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, 0, I1 }, +{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, 0, I1 }, +{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, 0, I1 }, +{"bgtz", "s,p", 0x40c00000, 0xffe00000, CBD|RD_s, 0, I1 }, +{"bgtzl", "s,p", 0, (int) M_BGTZL, INSN_MACRO, 0, I1 }, +{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, 0, I1 }, +{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, 0, I1 }, +{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, 0, I1 }, +{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, 0, I1 }, +{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, 0, I1 }, +{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, 0, I1 }, +{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, 0, I1 }, +{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, 0, I1 }, +{"blez", "s,p", 0x40800000, 0xffe00000, CBD|RD_s, 0, I1 }, +{"blezl", "s,p", 0, (int) M_BLEZL, INSN_MACRO, 0, I1 }, +{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, 0, I1 }, +{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, 0, I1 }, +{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, 0, I1 }, +{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, 0, I1 }, +{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, 0, I1 }, +{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, 0, I1 }, +{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, 0, I1 }, +{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, 0, I1 }, +{"bltz", "s,p", 0x40000000, 0xffe00000, CBD|RD_s, 0, I1 }, +{"bltzl", "s,p", 0, (int) M_BLTZL, INSN_MACRO, 0, I1 }, +{"bltzal", "s,p", 0x40200000, 0xffe00000, CBD|RD_s|WR_31, BD32, I1 }, +{"bltzals", "s,p", 0x42200000, 0xffe00000, CBD|RD_s|WR_31, BD16, I1 }, +{"bltzall", "s,p", 0, (int) M_BLTZALL, INSN_MACRO, 0, I1 }, +{"bnez", "md,mE", 0xac00, 0xfc00, CBD, RD_md, I1 }, +{"bnez", "s,p", 0xb4000000, 0xffe00000, CBD|RD_s, 0, I1 }, +{"bnezc", "s,p", 0x40a00000, 0xffe00000, NODS|RD_s, CBR, I1 }, +{"bnezl", "s,p", 0, (int) M_BNEL, INSN_MACRO, 0, I1 }, +{"bne", "md,mz,mE", 0xac00, 0xfc00, CBD, RD_md, I1 }, /* bnez */ +{"bne", "mz,md,mE", 0xac00, 0xfc00, CBD, RD_md, I1 }, /* bnez */ +{"bne", "s,t,p", 0xb4000000, 0xfc000000, CBD|RD_s|RD_t, 0, I1 }, +{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, 0, I1 }, +{"bnel", "s,t,p", 0, (int) M_BNEL, INSN_MACRO, 0, I1 }, +{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, 0, I1 }, +{"break", "", 0x4680, 0xffff, TRAP, 0, I1 }, +{"break", "", 0x00000007, 0xffffffff, TRAP, 0, I1 }, +{"break", "mF", 0x4680, 0xfff0, TRAP, 0, I1 }, +{"break", "c", 0x00000007, 0xfc00ffff, TRAP, 0, I1 }, +{"break", "c,q", 0x00000007, 0xfc00003f, TRAP, 0, I1 }, +{"c.f.d", "S,T", 0x5400043c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.f.d", "M,S,T", 0x5400043c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.f.s", "S,T", 0x5400003c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.f.s", "M,S,T", 0x5400003c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.f.ps", "S,T", 0x5400083c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.f.ps", "M,S,T", 0x5400083c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.un.d", "S,T", 0x5400047c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.un.d", "M,S,T", 0x5400047c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.un.s", "S,T", 0x5400007c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.un.s", "M,S,T", 0x5400007c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.un.ps", "S,T", 0x5400087c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.un.ps", "M,S,T", 0x5400087c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.eq.d", "S,T", 0x540004bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.eq.d", "M,S,T", 0x540004bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.eq.s", "S,T", 0x540000bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.eq.s", "M,S,T", 0x540000bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.eq.ps", "S,T", 0x540008bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.eq.ps", "M,S,T", 0x540008bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ueq.d", "S,T", 0x540004fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ueq.d", "M,S,T", 0x540004fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ueq.s", "S,T", 0x540000fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ueq.s", "M,S,T", 0x540000fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ueq.ps", "S,T", 0x540008fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ueq.ps", "M,S,T", 0x540008fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.olt.d", "S,T", 0x5400053c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.olt.d", "M,S,T", 0x5400053c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.olt.s", "S,T", 0x5400013c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.olt.s", "M,S,T", 0x5400013c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.olt.ps", "S,T", 0x5400093c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.olt.ps", "M,S,T", 0x5400093c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ult.d", "S,T", 0x5400057c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ult.d", "M,S,T", 0x5400057c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ult.s", "S,T", 0x5400017c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ult.s", "M,S,T", 0x5400017c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ult.ps", "S,T", 0x5400097c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ult.ps", "M,S,T", 0x5400097c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ole.d", "S,T", 0x540005bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ole.d", "M,S,T", 0x540005bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ole.s", "S,T", 0x540001bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ole.s", "M,S,T", 0x540001bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ole.ps", "S,T", 0x540009bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ole.ps", "M,S,T", 0x540009bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ule.d", "S,T", 0x540005fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ule.d", "M,S,T", 0x540005fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ule.s", "S,T", 0x540001fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ule.s", "M,S,T", 0x540001fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ule.ps", "S,T", 0x540009fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ule.ps", "M,S,T", 0x540009fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.sf.d", "S,T", 0x5400063c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.sf.d", "M,S,T", 0x5400063c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.sf.s", "S,T", 0x5400023c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.sf.s", "M,S,T", 0x5400023c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.sf.ps", "S,T", 0x54000a3c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.sf.ps", "M,S,T", 0x54000a3c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngle.d", "S,T", 0x5400067c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngle.d", "M,S,T", 0x5400067c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngle.s", "S,T", 0x5400027c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ngle.s", "M,S,T", 0x5400027c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ngle.ps", "S,T", 0x54000a7c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngle.ps", "M,S,T", 0x54000a7c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.seq.d", "S,T", 0x540006bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.seq.d", "M,S,T", 0x540006bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.seq.s", "S,T", 0x540002bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.seq.s", "M,S,T", 0x540002bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.seq.ps", "S,T", 0x54000abc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.seq.ps", "M,S,T", 0x54000abc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngl.d", "S,T", 0x540006fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngl.d", "M,S,T", 0x540006fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngl.s", "S,T", 0x540002fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ngl.s", "M,S,T", 0x540002fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ngl.ps", "S,T", 0x54000afc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngl.ps", "M,S,T", 0x54000afc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.lt.d", "S,T", 0x5400073c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.lt.d", "M,S,T", 0x5400073c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.lt.s", "S,T", 0x5400033c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.lt.s", "M,S,T", 0x5400033c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.lt.ps", "S,T", 0x54000b3c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.lt.ps", "M,S,T", 0x54000b3c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.nge.d", "S,T", 0x5400077c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.nge.d", "M,S,T", 0x5400077c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.nge.s", "S,T", 0x5400037c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.nge.s", "M,S,T", 0x5400037c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.nge.ps", "S,T", 0x54000b7c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.nge.ps", "M,S,T", 0x54000b7c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.le.d", "S,T", 0x540007bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.le.d", "M,S,T", 0x540007bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.le.s", "S,T", 0x540003bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.le.s", "M,S,T", 0x540003bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.le.ps", "S,T", 0x54000bbc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.le.ps", "M,S,T", 0x54000bbc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngt.d", "S,T", 0x540007fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngt.d", "M,S,T", 0x540007fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngt.s", "S,T", 0x540003fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ngt.s", "M,S,T", 0x540003fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S, 0, I1 }, +{"c.ngt.ps", "S,T", 0x54000bfc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"c.ngt.ps", "M,S,T", 0x54000bfc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +{"cache", "k,~(b)", 0x20006000, 0xfc00f000, RD_b, 0, I1 }, +{"cache", "k,o(b)", 0, (int) M_CACHE_OB, INSN_MACRO, 0, I1 }, +{"cache", "k,A(b)", 0, (int) M_CACHE_AB, INSN_MACRO, 0, I1 }, +{"ceil.l.d", "T,S", 0x5400533b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"ceil.l.s", "T,S", 0x5400133b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"ceil.w.d", "T,S", 0x54005b3b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"ceil.w.s", "T,S", 0x54001b3b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"cfc1", "t,G", 0x5400103b, 0xfc00ffff, WR_t|RD_C1|FP_S, 0, I1 }, +{"cfc1", "t,S", 0x5400103b, 0xfc00ffff, WR_t|RD_C1|FP_S, 0, I1 }, +{"cfc2", "t,G", 0x0000cd3c, 0xfc00ffff, WR_t|RD_C2, 0, I1 }, +{"clo", "t,s", 0x00004b3c, 0xfc00ffff, WR_t|RD_s, 0, I1 }, +{"clz", "t,s", 0x00005b3c, 0xfc00ffff, WR_t|RD_s, 0, I1 }, +{"cop2", "C", 0x00000002, 0xfc000007, CP, 0, I1 }, +{"ctc1", "t,G", 0x5400183b, 0xfc00ffff, RD_t|WR_CC|FP_S, 0, I1 }, +{"ctc1", "t,S", 0x5400183b, 0xfc00ffff, RD_t|WR_CC|FP_S, 0, I1 }, +{"ctc2", "t,G", 0x0000dd3c, 0xfc00ffff, RD_t|WR_C2|WR_CC, 0, I1 }, +{"cvt.d.l", "T,S", 0x5400537b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"cvt.d.s", "T,S", 0x5400137b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"cvt.d.w", "T,S", 0x5400337b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"cvt.l.d", "T,S", 0x5400413b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"cvt.l.s", "T,S", 0x5400013b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"cvt.s.l", "T,S", 0x54005b7b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"cvt.s.d", "T,S", 0x54001b7b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"cvt.s.w", "T,S", 0x54003b7b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"cvt.s.pl", "T,S", 0x5400213b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"cvt.s.pu", "T,S", 0x5400293b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"cvt.w.d", "T,S", 0x5400493b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"cvt.w.s", "T,S", 0x5400093b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"cvt.ps.s", "D,V,T", 0x54000180, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S|FP_D, 0, I1 }, +{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, 0, I3 }, +{"dadd", "d,v,t", 0x58000110, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I3 }, +{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, 0, I3 }, +{"daddi", "t,r,.", 0x5800001c, 0xfc00003f, WR_t|RD_s, 0, I3 }, +{"daddi", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, 0, I3 }, +{"daddiu", "t,r,j", 0x5c000000, 0xfc000000, WR_t|RD_s, 0, I3 }, +{"daddu", "d,v,t", 0x58000150, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I3 }, +{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, 0, I3 }, +{"dclo", "t,s", 0x58004b3c, 0xfc00ffff, WR_t|RD_s, 0, I3 }, +{"dclz", "t,s", 0x58005b3c, 0xfc00ffff, WR_t|RD_s, 0, I3 }, +{"deret", "", 0x0000e37c, 0xffffffff, NODS, 0, I1 }, +{"dext", "t,r,I,+I", 0, (int) M_DEXT, INSN_MACRO, 0, I3 }, +{"dext", "t,r,+A,+C",0x5800002c, 0xfc00003f, WR_t|RD_s, 0, I3 }, +{"dextm", "t,r,+A,+G",0x58000024, 0xfc00003f, WR_t|RD_s, 0, I3 }, +{"dextu", "t,r,+E,+H",0x58000014, 0xfc00003f, WR_t|RD_s, 0, I3 }, +/* For ddiv, see the comments about div. */ +{"ddiv", "z,s,t", 0x5800ab3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I3 }, +{"ddiv", "z,t", 0x5800ab3c, 0xfc1fffff, RD_s|RD_t|WR_HILO, 0, I3 }, +{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, 0, I3 }, +{"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, 0, I3 }, +/* For ddivu, see the comments about div. */ +{"ddivu", "z,s,t", 0x5800bb3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I3 }, +{"ddivu", "z,t", 0x5800bb3c, 0xfc1fffff, RD_s|RD_t|WR_HILO, 0, I3 }, +{"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, 0, I3 }, +{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, 0, I3 }, +{"di", "", 0x0000477c, 0xffffffff, WR_s|RD_C0, 0, I1 }, +{"di", "s", 0x0000477c, 0xffe0ffff, WR_s|RD_C0, 0, I1 }, +{"dins", "t,r,I,+I", 0, (int) M_DINS, INSN_MACRO, 0, I3 }, +{"dins", "t,r,+A,+B",0x5800000c, 0xfc00003f, WR_t|RD_s, 0, I3 }, +{"dinsm", "t,r,+A,+F",0x58000004, 0xfc00003f, WR_t|RD_s, 0, I3 }, +{"dinsu", "t,r,+E,+F",0x58000034, 0xfc00003f, WR_t|RD_s, 0, I3 }, +/* The MIPS assembler treats the div opcode with two operands as + though the first operand appeared twice (the first operand is both + a source and a destination). To get the div machine instruction, + you must use an explicit destination of $0. */ +{"div", "z,s,t", 0x0000ab3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I1 }, +{"div", "z,t", 0x0000ab3c, 0xfc1fffff, RD_s|RD_t|WR_HILO, 0, I1 }, +{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, 0, I1 }, +{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, 0, I1 }, +{"div.d", "D,V,T", 0x540001f0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D, 0, I1 }, +{"div.s", "D,V,T", 0x540000f0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S, 0, I1 }, +/* For divu, see the comments about div. */ +{"divu", "z,s,t", 0x0000bb3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I1 }, +{"divu", "z,t", 0x0000bb3c, 0xfc1fffff, RD_s|RD_t|WR_HILO, 0, I1 }, +{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, 0, I1 }, +{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, 0, I1 }, +{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, 0, I3 }, +{"dlca", "t,A(b)", 0, (int) M_DLCA_AB, INSN_MACRO, 0, I3 }, +{"dli", "t,j", 0x30000000, 0xfc1f0000, WR_t, 0, I3 }, /* addiu */ +{"dli", "t,i", 0x50000000, 0xfc1f0000, WR_t, 0, I3 }, /* ori */ +{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, 0, I3 }, +{"dmfc0", "t,G", 0x580000fc, 0xfc00ffff, WR_t|RD_C0, 0, I3 }, +{"dmfc0", "t,+D", 0x580000fc, 0xfc00c7ff, WR_t|RD_C0, 0, I3 }, +{"dmfc0", "t,G,H", 0x580000fc, 0xfc00c7ff, WR_t|RD_C0, 0, I3 }, +{"dmtc0", "t,G", 0x580002fc, 0xfc00ffff, RD_t|WR_C0|WR_CC, 0, I3 }, +{"dmtc0", "t,+D", 0x580002fc, 0xfc00c7ff, RD_t|WR_C0|WR_CC, 0, I3 }, +{"dmtc0", "t,G,H", 0x580002fc, 0xfc00c7ff, RD_t|WR_C0|WR_CC, 0, I3 }, +{"dmfc1", "t,S", 0x5400243b, 0xfc00ffff, WR_t|RD_S|FP_S, 0, I3 }, +{"dmfc1", "t,G", 0x5400243b, 0xfc00ffff, WR_t|RD_S|FP_S, 0, I3 }, +{"dmtc1", "t,G", 0x54002c3b, 0xfc00ffff, RD_t|WR_S|FP_S, 0, I3 }, +{"dmtc1", "t,S", 0x54002c3b, 0xfc00ffff, RD_t|WR_S|FP_S, 0, I3 }, +{"dmfc2", "t,G", 0x00006d3c, 0xfc00ffff, WR_t|RD_C2, 0, I3 }, +/*{"dmfc2", "t,G,H", 0x58000283, 0xfc001fff, WR_t|RD_C2, 0, I3 },*/ +{"dmtc2", "t,G", 0x00007d3c, 0xfc00ffff, RD_t|WR_C2|WR_CC, 0, I3 }, +/*{"dmtc2", "t,G,H", 0x58000683, 0xfc001fff, RD_t|WR_C2|WR_CC, 0, I3 },*/ +{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, 0, I3 }, +{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, 0, I3 }, +{"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, 0, I3 }, +{"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, 0, I3 }, +{"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, 0, I3 }, +{"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, 0, I3 }, +{"dmult", "s,t", 0x58008b3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I3 }, +{"dmultu", "s,t", 0x58009b3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I3 }, +{"dneg", "d,w", 0x58000190, 0xfc1f07ff, WR_d|RD_t, 0, I3 }, /* dsub 0 */ +{"dnegu", "d,w", 0x580001d0, 0xfc1f07ff, WR_d|RD_t, 0, I3 }, /* dsubu 0 */ +{"drem", "z,s,t", 0x5800ab3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I3 }, +{"drem", "d,v,t", 0, (int) M_DREM_3, INSN_MACRO, 0, I3 }, +{"drem", "d,v,I", 0, (int) M_DREM_3I, INSN_MACRO, 0, I3 }, +{"dremu", "z,s,t", 0x5800bb3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I3 }, +{"dremu", "d,v,t", 0, (int) M_DREMU_3, INSN_MACRO, 0, I3 }, +{"dremu", "d,v,I", 0, (int) M_DREMU_3I, INSN_MACRO, 0, I3 }, +{"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, 0, I3 }, +{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, 0, I3 }, +{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, 0, I3 }, +{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, 0, I3 }, +{"dror", "t,r,<", 0x580000c0, 0xfc0007ff, WR_t|RD_s, 0, I3 }, +{"drorv", "d,t,s", 0x580000d0, 0xfc0007ff, RD_t|RD_s|WR_d, 0, I3 }, +{"dror32", "t,r,<", 0x580000c8, 0xfc0007ff, WR_t|RD_s, 0, I3 }, +{"drotl", "d,v,t", 0, (int) M_DROL, INSN_MACRO, 0, I3 }, +{"drotl", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, 0, I3 }, +{"drotr", "d,v,t", 0, (int) M_DROR, INSN_MACRO, 0, I3 }, +{"drotr", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, 0, I3 }, +{"drotrv", "d,t,s", 0x580000d0, 0xfc0007ff, RD_t|RD_s|WR_d, 0, I3 }, +{"drotr32", "t,r,<", 0x580000c8, 0xfc0007ff, WR_t|RD_s, 0, I3 }, +{"dsbh", "t,r", 0x58007b3c, 0xfc00ffff, WR_t|RD_s, 0, I3 }, +{"dshd", "t,r", 0x5800fb3c, 0xfc00ffff, WR_t|RD_s, 0, I3 }, +{"dsllv", "d,t,s", 0x58000010, 0xfc0007ff, WR_d|RD_t|RD_s, 0, I3 }, +{"dsll32", "t,r,<", 0x58000008, 0xfc0007ff, WR_t|RD_s, 0, I3 }, +{"dsll", "d,t,s", 0x58000010, 0xfc0007ff, WR_d|RD_t|RD_s, 0, I3 }, /* dsllv */ +{"dsll", "t,r,>", 0x58000008, 0xfc0007ff, WR_t|RD_s, 0, I3 }, /* dsll32 */ +{"dsll", "t,r,<", 0x58000000, 0xfc0007ff, WR_t|RD_s, 0, I3 }, +{"dsrav", "d,t,s", 0x58000090, 0xfc0007ff, WR_d|RD_t|RD_s, 0, I3 }, +{"dsra32", "t,r,<", 0x58000088, 0xfc0007ff, WR_t|RD_s, 0, I3 }, +{"dsra", "d,t,s", 0x58000090, 0xfc0007ff, WR_d|RD_t|RD_s, 0, I3 }, /* dsrav */ +{"dsra", "t,r,>", 0x58000088, 0xfc0007ff, WR_t|RD_s, 0, I3 }, /* dsra32 */ +{"dsra", "t,r,<", 0x58000080, 0xfc0007ff, WR_t|RD_s, 0, I3 }, +{"dsrlv", "d,t,s", 0x58000050, 0xfc0007ff, WR_d|RD_t|RD_s, 0, I3 }, +{"dsrl32", "t,r,<", 0x58000048, 0xfc0007ff, WR_t|RD_s, 0, I3 }, +{"dsrl", "d,t,s", 0x58000050, 0xfc0007ff, WR_d|RD_t|RD_s, 0, I3 }, /* dsrlv */ +{"dsrl", "t,r,>", 0x58000048, 0xfc0007ff, WR_t|RD_s, 0, I3 }, /* dsrl32 */ +{"dsrl", "t,r,<", 0x58000040, 0xfc0007ff, WR_t|RD_s, 0, I3 }, +{"dsub", "d,v,t", 0x58000190, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I3 }, +{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, 0, I3 }, +{"dsubu", "d,v,t", 0x580001d0, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I3 }, +{"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, 0, I3 }, +{"ei", "", 0x0000577c, 0xffffffff, WR_s|WR_C0, 0, I1 }, +{"ei", "s", 0x0000577c, 0xffe0ffff, WR_s|WR_C0, 0, I1 }, +{"eret", "", 0x0000f37c, 0xffffffff, NODS, 0, I1 }, +{"ext", "t,r,+A,+C", 0x0000002c, 0xfc00003f, WR_t|RD_s, 0, I1 }, +{"floor.l.d", "T,V", 0x5400433b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"floor.l.s", "T,V", 0x5400033b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"floor.w.d", "T,V", 0x54004b3b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"floor.w.s", "T,V", 0x54000b3b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"ins", "t,r,+A,+B", 0x0000000c, 0xfc00003f, WR_t|RD_s, 0, I1 }, +{"iret", "", 0x0000d37c, 0xffffffff, NODS, 0, MC }, +{"jr", "mj", 0x4580, 0xffe0, UBD, RD_mj, I1 }, +{"jr", "s", 0x00000f3c, 0xffe0ffff, UBD|RD_s, BD32, I1 }, /* jalr */ +{"jrs", "s", 0x00004f3c, 0xffe0ffff, UBD|RD_s, BD16, I1 }, /* jalrs */ +{"jraddiusp", "mP", 0x4700, 0xffe0, NODS, UBR|RD_31|WR_sp|RD_sp, I1 }, +{"jrc", "mj", 0x45a0, 0xffe0, NODS, UBR|RD_mj, I1 }, +{"jr.hb", "s", 0x00001f3c, 0xffe0ffff, UBD|RD_s, BD32, I1 }, /* jalr.hb */ +{"jrs.hb", "s", 0x00005f3c, 0xffe0ffff, UBD|RD_s, BD16, I1 }, /* jalrs.hb */ +{"j", "mj", 0x4580, 0xffe0, UBD, RD_mj, I1 }, /* jr */ +{"j", "s", 0x00000f3c, 0xffe0ffff, UBD|RD_s, BD32, I1 }, /* jr */ +/* SVR4 PIC code requires special handling for j, so it must be a + macro. */ +{"j", "a", 0, (int) M_J_A, INSN_MACRO, 0, I1 }, +/* This form of j is used by the disassembler and internally by the + assembler, but will never match user input (because the line above + will match first). */ +{"j", "a", 0xd4000000, 0xfc000000, UBD, 0, I1 }, +{"jalr", "mj", 0x45c0, 0xffe0, UBD|WR_31, RD_mj|BD32, I1 }, +{"jalr", "my,mj", 0x45c0, 0xffe0, UBD|WR_31, RD_mj|BD32, I1 }, +{"jalr", "s", 0x03e00f3c, 0xffe0ffff, UBD|RD_s|WR_t, BD32, I1 }, +{"jalr", "t,s", 0x00000f3c, 0xfc00ffff, UBD|RD_s|WR_t, BD32, I1 }, +{"jalr.hb", "s", 0x03e01f3c, 0xffe0ffff, UBD|RD_s|WR_t, BD32, I1 }, +{"jalr.hb", "t,s", 0x00001f3c, 0xfc00ffff, UBD|RD_s|WR_t, BD32, I1 }, +{"jalrs", "mj", 0x45e0, 0xffe0, UBD|WR_31, RD_mj|BD16, I1 }, +{"jalrs", "my,mj", 0x45e0, 0xffe0, UBD|WR_31, RD_mj|BD16, I1 }, +{"jalrs", "s", 0x03e04f3c, 0xffe0ffff, UBD|RD_s|WR_t, BD16, I1 }, +{"jalrs", "t,s", 0x00004f3c, 0xfc00ffff, UBD|RD_s|WR_t, BD16, I1 }, +{"jalrs.hb", "s", 0x03e05f3c, 0xffe0ffff, UBD|RD_s|WR_t, BD16, I1 }, +{"jalrs.hb", "t,s", 0x00005f3c, 0xfc00ffff, UBD|RD_s|WR_t, BD16, I1 }, +/* SVR4 PIC code requires special handling for jal, so it must be a + macro. */ +{"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, 0, I1 }, +{"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, 0, I1 }, +{"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, 0, I1 }, +/* This form of jal is used by the disassembler and internally by the + assembler, but will never match user input (because the line above + will match first). */ +{"jal", "a", 0xf4000000, 0xfc000000, UBD|WR_31, BD32, I1 }, +{"jals", "d,s", 0, (int) M_JALS_2, INSN_MACRO, 0, I1 }, +{"jals", "s", 0, (int) M_JALS_1, INSN_MACRO, 0, I1 }, +{"jals", "a", 0, (int) M_JALS_A, INSN_MACRO, 0, I1 }, +{"jals", "a", 0x74000000, 0xfc000000, UBD|WR_31, BD16, I1 }, +{"jalx", "a", 0xf0000000, 0xfc000000, UBD|WR_31, BD32, I1 }, +{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, 0, I1 }, +{"lb", "t,o(b)", 0x1c000000, 0xfc000000, RD_b|WR_t, 0, I1 }, +{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, 0, I1 }, +{"lbu", "md,mG(ml)", 0x0800, 0xfc00, 0, WR_md|RD_ml, I1 }, +{"lbu", "t,o(b)", 0x14000000, 0xfc000000, RD_b|WR_t, 0, I1 }, +{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, 0, I1 }, +{"lca", "t,A(b)", 0, (int) M_LCA_AB, INSN_MACRO, 0, I1 }, +/* The macro has to be first to handle o32 correctly. */ +{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, 0, I1 }, +{"ld", "t,o(b)", 0xdc000000, 0xfc000000, RD_b|WR_t, 0, I3 }, +{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, 0, I1 }, +{"ldc1", "T,o(b)", 0xbc000000, 0xfc000000, RD_b|WR_T|FP_D, 0, I1 }, +{"ldc1", "E,o(b)", 0xbc000000, 0xfc000000, RD_b|WR_T|FP_D, 0, I1 }, +{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, +{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, +{"ldc2", "E,~(b)", 0x20002000, 0xfc00f000, RD_b|WR_CC, 0, I1 }, +{"ldc2", "E,o(b)", 0, (int) M_LDC2_OB, INSN_MACRO, 0, I1 }, +{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, 0, I1 }, +{"l.d", "T,o(b)", 0xbc000000, 0xfc000000, RD_b|WR_T|FP_D, 0, I1 }, /* ldc1 */ +{"l.d", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, +{"ldl", "t,~(b)", 0x60004000, 0xfc00f000, WR_t|RD_b, 0, I3 }, +{"ldl", "t,o(b)", 0, (int) M_LDL_OB, INSN_MACRO, 0, I3 }, +{"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, 0, I3 }, +{"ldm", "n,~(b)", 0x20007000, 0xfc00f000, RD_b, 0, I3 }, +{"ldm", "n,o(b)", 0, (int) M_LDM_OB, INSN_MACRO, 0, I3 }, +{"ldm", "n,A(b)", 0, (int) M_LDM_AB, INSN_MACRO, 0, I3 }, +{"ldp", "t,~(b)", 0x20004000, 0xfc00f000, RD_b|WR_t, 0, I3 }, +{"ldp", "t,o(b)", 0, (int) M_LDP_OB, INSN_MACRO, 0, I3 }, +{"ldp", "t,A(b)", 0, (int) M_LDP_AB, INSN_MACRO, 0, I3 }, +{"ldr", "t,~(b)", 0x60005000, 0xfc00f000, WR_t|RD_b, 0, I3 }, +{"ldr", "t,o(b)", 0, (int) M_LDR_OB, INSN_MACRO, 0, I3 }, +{"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, 0, I3 }, +{"ldxc1", "D,t(b)", 0x540000c8, 0xfc0007ff, WR_D|RD_t|RD_b|FP_D, 0, I1 }, +{"lh", "t,o(b)", 0x3c000000, 0xfc000000, RD_b|WR_t, 0, I1 }, +{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, 0, I1 }, +{"lhu", "md,mH(ml)", 0x2800, 0xfc00, 0, WR_md|RD_ml, I1 }, +{"lhu", "t,o(b)", 0x34000000, 0xfc000000, RD_b|WR_t, 0, I1 }, +{"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, 0, I1 }, +/* li is at the start of the table. */ +{"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, INSN2_M_FP_D, I1 }, +{"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, INSN2_M_FP_D, I1 }, +{"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"ll", "t,~(b)", 0x60003000, 0xfc00f000, RD_b|WR_t, 0, I1 }, +{"ll", "t,o(b)", 0, (int) M_LL_OB, INSN_MACRO, 0, I1 }, +{"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, 0, I1 }, +{"lld", "t,~(b)", 0x60007000, 0xfc00f000, RD_b|WR_t, 0, I3 }, +{"lld", "t,o(b)", 0, (int) M_LLD_OB, INSN_MACRO, 0, I3 }, +{"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, 0, I3 }, +{"lui", "s,u", 0x41a00000, 0xffe00000, WR_s, 0, I1 }, +{"luxc1", "D,t(b)", 0x54000148, 0xfc0007ff, WR_D|RD_t|RD_b|FP_D, 0, I1 }, +{"lw", "md,mJ(ml)", 0x6800, 0xfc00, 0, WR_md|RD_ml, I1 }, +{"lw", "mp,mU(ms)", 0x4800, 0xfc00, 0, WR_mp|RD_sp, I1 }, /* lwsp */ +{"lw", "md,mA(ma)", 0x6400, 0xfc00, 0, WR_md|RD_gp, I1 }, /* lwgp */ +{"lw", "t,o(b)", 0xfc000000, 0xfc000000, RD_b|WR_t, 0, I1 }, +{"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, 0, I1 }, +{"lwc1", "T,o(b)", 0x9c000000, 0xfc000000, RD_b|WR_T|FP_S, 0, I1 }, +{"lwc1", "E,o(b)", 0x9c000000, 0xfc000000, RD_b|WR_T|FP_S, 0, I1 }, +{"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"lwc2", "E,~(b)", 0x20000000, 0xfc00f000, RD_b|WR_CC, 0, I1 }, +{"lwc2", "E,o(b)", 0, (int) M_LWC2_OB, INSN_MACRO, 0, I1 }, +{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, 0, I1 }, +{"l.s", "T,o(b)", 0x9c000000, 0xfc000000, RD_b|WR_T|FP_S, 0, I1 }, /* lwc1 */ +{"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"lwl", "t,~(b)", 0x60000000, 0xfc00f000, RD_b|WR_t, 0, I1 }, +{"lwl", "t,o(b)", 0, (int) M_LWL_OB, INSN_MACRO, 0, I1 }, +{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, 0, I1 }, +{"lcache", "t,~(b)", 0x60000000, 0xfc00f000, RD_b|WR_t, 0, I1 }, /* same */ +{"lcache", "t,o(b)", 0, (int) M_LWL_OB, INSN_MACRO, 0, I1 }, +{"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, 0, I1 }, +{"lwm", "mN,mJ(ms)", 0x4500, 0xffc0, NODS, RD_sp, I1 }, +{"lwm", "n,~(b)", 0x20005000, 0xfc00f000, RD_b|NODS, 0, I1 }, +{"lwm", "n,o(b)", 0, (int) M_LWM_OB, INSN_MACRO, 0, I1 }, +{"lwm", "n,A(b)", 0, (int) M_LWM_AB, INSN_MACRO, 0, I1 }, +{"lwp", "t,~(b)", 0x20001000, 0xfc00f000, RD_b|WR_t|NODS, 0, I1 }, +{"lwp", "t,o(b)", 0, (int) M_LWP_OB, INSN_MACRO, 0, I1 }, +{"lwp", "t,A(b)", 0, (int) M_LWP_AB, INSN_MACRO, 0, I1 }, +{"lwr", "t,~(b)", 0x60001000, 0xfc00f000, RD_b|WR_t, 0, I1 }, +{"lwr", "t,o(b)", 0, (int) M_LWR_OB, INSN_MACRO, 0, I1 }, +{"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, 0, I1 }, +{"lwu", "t,~(b)", 0x6000e000, 0xfc00f000, RD_b|WR_t, 0, I3 }, +{"lwu", "t,o(b)", 0, (int) M_LWU_OB, INSN_MACRO, 0, I3 }, +{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, 0, I3 }, +{"lwxc1", "D,t(b)", 0x54000048, 0xfc0007ff, WR_D|RD_t|RD_b|FP_S, 0, I1 }, +{"flush", "t,~(b)", 0x60001000, 0xfc00f000, RD_b|WR_t, 0, I1 }, /* same */ +{"flush", "t,o(b)", 0, (int) M_LWR_OB, INSN_MACRO, 0, I1 }, +{"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, 0, I1 }, +{"lwxs", "d,t(b)", 0x00000118, 0xfc0007ff, RD_b|RD_t|WR_d, 0, I1 }, +{"madd", "s,t", 0x0000cb3c, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, I1 }, +{"madd.d", "D,R,S,T", 0x54000009, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I1 }, +{"madd.s", "D,R,S,T", 0x54000001, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I1 }, +{"madd.ps", "D,R,S,T", 0x54000011, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I1 }, +{"maddu", "s,t", 0x0000db3c, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, I1 }, +{"mfc0", "t,G", 0x000000fc, 0xfc00ffff, WR_t|RD_C0, 0, I1 }, +{"mfc0", "t,+D", 0x000000fc, 0xfc00c7ff, WR_t|RD_C0, 0, I1 }, +{"mfc0", "t,G,H", 0x000000fc, 0xfc00c7ff, WR_t|RD_C0, 0, I1 }, +{"mfc1", "t,S", 0x5400203b, 0xfc00ffff, WR_t|RD_S|FP_S, 0, I1 }, +{"mfc1", "t,G", 0x5400203b, 0xfc00ffff, WR_t|RD_S|FP_S, 0, I1 }, +{"mfc2", "t,G", 0x00004d3c, 0xfc00ffff, WR_t|RD_C2, 0, I1 }, +{"mfhc1", "t,S", 0x5400303b, 0xfc00ffff, WR_t|RD_S|FP_D, 0, I1 }, +{"mfhc1", "t,G", 0x5400303b, 0xfc00ffff, WR_t|RD_S|FP_D, 0, I1 }, +{"mfhc2", "t,G", 0x00008d3c, 0xfc00ffff, WR_t|RD_C2, 0, I1 }, +{"mfhi", "mj", 0x4600, 0xffe0, RD_HI, WR_mj, I1 }, +{"mfhi", "s", 0x00000d7c, 0xffe0ffff, WR_s|RD_HI, 0, I1 }, +{"mflo", "mj", 0x4640, 0xffe0, RD_LO, WR_mj, I1 }, +{"mflo", "s", 0x00001d7c, 0xffe0ffff, WR_s|RD_LO, 0, I1 }, +{"mov.d", "T,S", 0x5400207b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"mov.s", "T,S", 0x5400007b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"mov.ps", "T,S", 0x5400407b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"movep", "mh,mi,mm,mn", 0x8400, 0xfc01, NODS, WR_mhi|RD_mmn, I1 }, +{"movf", "t,s,M", 0x5400017b, 0xfc001fff, WR_t|RD_s|RD_CC|FP_S|FP_D, 0, I1 }, +{"movf.d", "T,S,M", 0x54000220, 0xfc001fff, WR_T|RD_S|RD_CC|FP_D, 0, I1 }, +{"movf.s", "T,S,M", 0x54000020, 0xfc001fff, WR_T|RD_S|RD_CC|FP_S, 0, I1 }, +{"movf.ps", "T,S,M", 0x54000420, 0xfc001fff, WR_T|RD_S|RD_CC|FP_D, 0, I1 }, +{"movn", "d,v,t", 0x00000018, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"movn.d", "D,S,t", 0x54000138, 0xfc0007ff, WR_D|RD_S|RD_t|FP_D, 0, I1 }, +{"movn.s", "D,S,t", 0x54000038, 0xfc0007ff, WR_D|RD_S|RD_t|FP_S, 0, I1 }, +{"movn.ps", "D,S,t", 0x54000238, 0xfc0007ff, WR_D|RD_S|RD_t|FP_D, 0, I1 }, +{"movt", "t,s,M", 0x5400097b, 0xfc001fff, WR_t|RD_s|RD_CC|FP_S|FP_D, 0, I1 }, +{"movt.d", "T,S,M", 0x54000260, 0xfc001fff, WR_T|RD_S|RD_CC|FP_D, 0, I1 }, +{"movt.s", "T,S,M", 0x54000060, 0xfc001fff, WR_T|RD_S|RD_CC|FP_S, 0, I1 }, +{"movt.ps", "T,S,M", 0x54000460, 0xfc001fff, WR_T|RD_S|RD_CC|FP_D, 0, I1 }, +{"movz", "d,v,t", 0x00000058, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"movz.d", "D,S,t", 0x54000178, 0xfc0007ff, WR_D|RD_S|RD_t|FP_D, 0, I1 }, +{"movz.s", "D,S,t", 0x54000078, 0xfc0007ff, WR_D|RD_S|RD_t|FP_S, 0, I1 }, +{"movz.ps", "D,S,t", 0x54000278, 0xfc0007ff, WR_D|RD_S|RD_t|FP_D, 0, I1 }, +{"msub", "s,t", 0x0000eb3c, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, I1 }, +{"msub.d", "D,R,S,T", 0x54000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I1 }, +{"msub.s", "D,R,S,T", 0x54000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I1 }, +{"msub.ps", "D,R,S,T", 0x54000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I1 }, +{"msubu", "s,t", 0x0000fb3c, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, I1 }, +{"mtc0", "t,G", 0x000002fc, 0xfc00ffff, RD_t|WR_C0|WR_CC, 0, I1 }, +{"mtc0", "t,+D", 0x000002fc, 0xfc00c7ff, RD_t|WR_C0|WR_CC, 0, I1 }, +{"mtc0", "t,G,H", 0x000002fc, 0xfc00c7ff, RD_t|WR_C0|WR_CC, 0, I1 }, +{"mtc1", "t,S", 0x5400283b, 0xfc00ffff, RD_t|WR_S|FP_S, 0, I1 }, +{"mtc1", "t,G", 0x5400283b, 0xfc00ffff, RD_t|WR_S|FP_S, 0, I1 }, +{"mtc2", "t,G", 0x00005d3c, 0xfc00ffff, RD_t|WR_C2|WR_CC, 0, I1 }, +{"mthc1", "t,S", 0x5400383b, 0xfc00ffff, RD_t|WR_S|FP_D, 0, I1 }, +{"mthc1", "t,G", 0x5400383b, 0xfc00ffff, RD_t|WR_S|FP_D, 0, I1 }, +{"mthc2", "t,G", 0x00009d3c, 0xfc00ffff, RD_t|WR_C2|WR_CC, 0, I1 }, +{"mthi", "s", 0x00002d7c, 0xffe0ffff, RD_s|WR_HI, 0, I1 }, +{"mtlo", "s", 0x00003d7c, 0xffe0ffff, RD_s|WR_LO, 0, I1 }, +{"mul", "d,v,t", 0x00000210, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, 0, I1 }, +{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, 0, I1 }, +{"mul.d", "D,V,T", 0x540001b0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D, 0, I1 }, +{"mul.s", "D,V,T", 0x540000b0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S, 0, I1 }, +{"mul.ps", "D,V,T", 0x540002b0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D, 0, I1 }, +{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, 0, I1 }, +{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, 0, I1 }, +{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, 0, I1 }, +{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, 0, I1 }, +{"mult", "s,t", 0x00008b3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I1 }, +{"multu", "s,t", 0x00009b3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I1 }, +{"neg", "d,w", 0x00000190, 0xfc1f07ff, WR_d|RD_t, 0, I1 }, /* sub 0 */ +{"negu", "d,w", 0x000001d0, 0xfc1f07ff, WR_d|RD_t, 0, I1 }, /* subu 0 */ +{"neg.d", "T,V", 0x54002b7b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"neg.s", "T,V", 0x54000b7b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"neg.ps", "T,V", 0x54004b7b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"nmadd.d", "D,R,S,T", 0x5400000a, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I1 }, +{"nmadd.s", "D,R,S,T", 0x54000002, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I1 }, +{"nmadd.ps", "D,R,S,T", 0x54000012, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I1 }, +{"nmsub.d", "D,R,S,T", 0x5400002a, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I1 }, +{"nmsub.s", "D,R,S,T", 0x54000022, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I1 }, +{"nmsub.ps", "D,R,S,T", 0x54000032, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I1 }, +/* nop is at the start of the table. */ +{"not", "mf,mg", 0x4400, 0xffc0, 0, WR_mf|RD_mg, I1 }, /* put not before nor */ +{"not", "d,v", 0x000002d0, 0xffe007ff, WR_d|RD_s|RD_t, 0, I1 }, /* nor d,s,0 */ +{"nor", "mf,mz,mg", 0x4400, 0xffc0, 0, WR_mf|RD_mg, I1 }, /* not */ +{"nor", "mf,mg,mz", 0x4400, 0xffc0, 0, WR_mf|RD_mg, I1 }, /* not */ +{"nor", "d,v,t", 0x000002d0, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, 0, I1 }, +{"or", "mp,mj,mz", 0x0c00, 0xfc00, 0, WR_mp|RD_mj, I1 }, /* move */ +{"or", "mp,mz,mj", 0x0c00, 0xfc00, 0, WR_mp|RD_mj, I1 }, /* move */ +{"or", "mf,mt,mg", 0x44c0, 0xffc0, 0, WR_mf|RD_mf|RD_mg, I1 }, +{"or", "mf,mg,mx", 0x44c0, 0xffc0, 0, WR_mf|RD_mf|RD_mg, I1 }, +{"or", "d,v,t", 0x00000290, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, 0, I1 }, +{"ori", "mp,mj,mZ", 0x0c00, 0xfc00, 0, WR_mp|RD_mj, I1 }, /* move */ +{"ori", "t,r,i", 0x50000000, 0xfc000000, WR_t|RD_s, 0, I1 }, +{"pll.ps", "D,V,T", 0x54000080, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D, 0, I1 }, +{"plu.ps", "D,V,T", 0x540000c0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D, 0, I1 }, +{"pul.ps", "D,V,T", 0x54000100, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D, 0, I1 }, +{"puu.ps", "D,V,T", 0x54000140, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D, 0, I1 }, +/* pref is at the start of the table. */ +{"recip.d", "T,S", 0x5400523b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"recip.s", "T,S", 0x5400123b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"rem", "z,s,t", 0x0000ab3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I1 }, +{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, 0, I1 }, +{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, 0, I1 }, +{"remu", "z,s,t", 0x0000bb3c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I1 }, +{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, 0, I1 }, +{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, 0, I1 }, +{"rdhwr", "t,K", 0x00006b3c, 0xfc00ffff, 0, WR_t, I1 }, +{"rdpgpr", "t,r", 0x0000e17c, 0xfc00ffff, WR_t, 0, I1 }, +{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, 0, I1 }, +{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, 0, I1 }, +{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, 0, I1 }, +{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, 0, I1 }, +{"ror", "t,r,<", 0x000000c0, 0xfc0007ff, WR_t|RD_s, 0, I1 }, +{"rorv", "d,t,s", 0x000000d0, 0xfc0007ff, RD_t|RD_s|WR_d, 0, I1 }, +{"rotl", "d,v,t", 0, (int) M_ROL, INSN_MACRO, 0, I1 }, +{"rotl", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, 0, I1 }, +{"rotr", "d,v,t", 0, (int) M_ROR, INSN_MACRO, 0, I1 }, +{"rotr", "t,r,<", 0x000000c0, 0xfc0007ff, WR_t|RD_s, 0, I1 }, +{"rotrv", "d,t,s", 0x000000d0, 0xfc0007ff, RD_t|RD_s|WR_d, 0, I1 }, +{"round.l.d", "T,S", 0x5400733b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"round.l.s", "T,S", 0x5400333b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"round.w.d", "T,S", 0x54007b3b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"round.w.s", "T,S", 0x54003b3b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"rsqrt.d", "T,S", 0x5400423b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"rsqrt.s", "T,S", 0x5400023b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"sb", "mq,mL(ml)", 0x8800, 0xfc00, SM, RD_mq|RD_ml, I1 }, +{"sb", "t,o(b)", 0x18000000, 0xfc000000, SM|RD_t|RD_b, 0, I1 }, +{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, 0, I1 }, +{"sc", "t,~(b)", 0x6000b000, 0xfc00f000, SM|RD_t|WR_t|RD_b, 0, I1 }, +{"sc", "t,o(b)", 0, (int) M_SC_OB, INSN_MACRO, 0, I1 }, +{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, 0, I1 }, +{"scd", "t,~(b)", 0x6000f000, 0xfc00f000, SM|RD_t|WR_t|RD_b, 0, I3 }, +{"scd", "t,o(b)", 0, (int) M_SCD_OB, INSN_MACRO, 0, I3 }, +{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, 0, I3 }, +/* The macro has to be first to handle o32 correctly. */ +{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, 0, I1 }, +{"sd", "t,o(b)", 0xd8000000, 0xfc000000, SM|RD_t|RD_b, 0, I3 }, +{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, 0, I1 }, +{"sdbbp", "", 0x46c0, 0xffff, TRAP, 0, I1 }, +{"sdbbp", "", 0x0000db7c, 0xffffffff, TRAP, 0, I1 }, +{"sdbbp", "mO", 0x46c0, 0xfff0, TRAP, 0, I1 }, +{"sdbbp", "B", 0x0000db7c, 0xfc00ffff, TRAP, 0, I1 }, +{"sdc1", "T,o(b)", 0xb8000000, 0xfc000000, SM|RD_T|RD_b|FP_D, 0, I1 }, +{"sdc1", "E,o(b)", 0xb8000000, 0xfc000000, SM|RD_T|RD_b|FP_D, 0, I1 }, +{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, +{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, +{"sdc2", "E,~(b)", 0x2000a000, 0xfc00f000, SM|RD_C2|RD_b, 0, I1 }, +{"sdc2", "E,o(b)", 0, (int) M_SDC2_OB, INSN_MACRO, 0, I1 }, +{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, 0, I1 }, +{"s.d", "T,o(b)", 0xb8000000, 0xfc000000, SM|RD_T|RD_b|FP_D, 0, I1 }, /* sdc1 */ +{"s.d", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, +{"sdl", "t,~(b)", 0x6000c000, 0xfc00f000, SM|RD_t|RD_b, 0, I3 }, +{"sdl", "t,o(b)", 0, (int) M_SDL_OB, INSN_MACRO, 0, I3 }, +{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, 0, I3 }, +{"sdm", "n,~(b)", 0x2000f000, 0xfc00f000, SM|RD_b, 0, I3 }, +{"sdm", "n,o(b)", 0, (int) M_SDM_OB, INSN_MACRO, 0, I3 }, +{"sdm", "n,A(b)", 0, (int) M_SDM_AB, INSN_MACRO, 0, I3 }, +{"sdp", "t,~(b)", 0x2000c000, 0xfc00f000, SM|RD_t|RD_b, 0, I3 }, +{"sdp", "t,o(b)", 0, (int) M_SDP_OB, INSN_MACRO, 0, I3 }, +{"sdp", "t,A(b)", 0, (int) M_SDP_AB, INSN_MACRO, 0, I3 }, +{"sdr", "t,~(b)", 0x6000d000, 0xfc00f000, SM|RD_t|RD_b, 0, I3 }, +{"sdr", "t,o(b)", 0, (int) M_SDR_OB, INSN_MACRO, 0, I3 }, +{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, 0, I3 }, +{"sdxc1", "D,t(b)", 0x54000108, 0xfc0007ff, SM|RD_t|RD_b|FP_D, RD_D, I1 }, +{"seb", "t,r", 0x00002b3c, 0xfc00ffff, WR_t|RD_s, 0, I1 }, +{"seh", "t,r", 0x00003b3c, 0xfc00ffff, WR_t|RD_s, 0, I1 }, +{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, 0, I1 }, +{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, 0, I1 }, +{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, 0, I1 }, +{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, 0, I1 }, +{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, 0, I1 }, +{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, 0, I1 }, +{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, 0, I1 }, +{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, 0, I1 }, +{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, 0, I1 }, +{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, 0, I1 }, +{"sh", "mq,mH(ml)", 0xa800, 0xfc00, SM, RD_mq|RD_ml, I1 }, +{"sh", "t,o(b)", 0x38000000, 0xfc000000, SM|RD_t|RD_b, 0, I1 }, +{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, 0, I1 }, +{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, 0, I1 }, +{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, 0, I1 }, +{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, 0, I1 }, +{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, 0, I1 }, +{"sllv", "d,t,s", 0x00000010, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"sll", "md,mc,mM", 0x2400, 0xfc01, 0, WR_md|RD_mc, I1 }, +{"sll", "d,w,s", 0x00000010, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, /* sllv */ +{"sll", "t,r,<", 0x00000000, 0xfc0007ff, WR_t|RD_s, 0, I1 }, +{"slt", "d,v,t", 0x00000350, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, 0, I1 }, +{"slti", "t,r,j", 0x90000000, 0xfc000000, WR_t|RD_s, 0, I1 }, +{"sltiu", "t,r,j", 0xb0000000, 0xfc000000, WR_t|RD_s, 0, I1 }, +{"sltu", "d,v,t", 0x00000390, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, 0, I1 }, +{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, 0, I1 }, +{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, 0, I1 }, +{"sqrt.d", "T,S", 0x54004a3b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"sqrt.s", "T,S", 0x54000a3b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"srav", "d,t,s", 0x00000090, 0xfc0007ff, WR_d|RD_t|RD_s, 0, I1 }, +{"sra", "d,w,s", 0x00000090, 0xfc0007ff, WR_d|RD_t|RD_s, 0, I1 }, /* srav */ +{"sra", "t,r,<", 0x00000080, 0xfc0007ff, WR_t|RD_s, 0, I1 }, +{"srlv", "d,t,s", 0x00000050, 0xfc0007ff, WR_d|RD_t|RD_s, 0, I1 }, +{"srl", "md,mc,mM", 0x2401, 0xfc01, 0, WR_md|RD_mc, I1 }, +{"srl", "d,w,s", 0x00000050, 0xfc0007ff, WR_d|RD_t|RD_s, 0, I1 }, /* srlv */ +{"srl", "t,r,<", 0x00000040, 0xfc0007ff, WR_t|RD_s, 0, I1 }, +/* ssnop is at the start of the table. */ +{"sub", "d,v,t", 0x00000190, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, 0, I1 }, +{"sub.d", "D,V,T", 0x54000170, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D, 0, I1 }, +{"sub.s", "D,V,T", 0x54000070, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S, 0, I1 }, +{"sub.ps", "D,V,T", 0x54000270, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D, 0, I1 }, +{"subu", "md,me,ml", 0x0401, 0xfc01, 0, WR_md|RD_me|RD_ml, I1 }, +{"subu", "d,v,t", 0x000001d0, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, 0, I1 }, +{"suxc1", "D,t(b)", 0x54000188, 0xfc0007ff, SM|RD_t|RD_b|FP_D, RD_D, I1 }, +{"sw", "mq,mJ(ml)", 0xe800, 0xfc00, SM, RD_mq|RD_ml, I1 }, +{"sw", "mp,mU(ms)", 0xc800, 0xfc00, SM, RD_mp|RD_sp, I1 }, /* swsp */ +{"sw", "t,o(b)", 0xf8000000, 0xfc000000, SM|RD_t|RD_b, 0, I1 }, +{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, 0, I1 }, +{"swc1", "T,o(b)", 0x98000000, 0xfc000000, SM|RD_T|RD_b|FP_S, 0, I1 }, +{"swc1", "E,o(b)", 0x98000000, 0xfc000000, SM|RD_T|RD_b|FP_S, 0, I1 }, +{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"swc2", "E,~(b)", 0x20008000, 0xfc00f000, SM|RD_C2|RD_b, 0, I1 }, +{"swc2", "E,o(b)", 0, (int) M_SWC2_OB, INSN_MACRO, 0, I1 }, +{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, 0, I1 }, +{"s.s", "T,o(b)", 0x98000000, 0xfc000000, SM|RD_T|RD_b|FP_S, 0, I1 }, /* swc1 */ +{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, +{"swl", "t,~(b)", 0x60008000, 0xfc00f000, SM|RD_t|RD_b, 0, I1 }, +{"swl", "t,o(b)", 0, (int) M_SWL_OB, INSN_MACRO, 0, I1 }, +{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, 0, I1 }, +{"scache", "t,~(b)", 0x60008000, 0xfc00f000, SM|RD_t|RD_b, 0, I1 }, /* same */ +{"scache", "t,o(b)", 0, (int) M_SWL_OB, INSN_MACRO, 0, I1 }, +{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, 0, I1 }, +{"swm", "mN,mJ(ms)", 0x4540, 0xffc0, NODS, RD_sp, I1 }, +{"swm", "n,~(b)", 0x2000d000, 0xfc00f000, SM|RD_b|NODS, 0, I1 }, +{"swm", "n,o(b)", 0, (int) M_SWM_OB, INSN_MACRO, 0, I1 }, +{"swm", "n,A(b)", 0, (int) M_SWM_AB, INSN_MACRO, 0, I1 }, +{"swp", "t,~(b)", 0x20009000, 0xfc00f000, SM|RD_t|RD_b|NODS, 0, I1 }, +{"swp", "t,o(b)", 0, (int) M_SWP_OB, INSN_MACRO, 0, I1 }, +{"swp", "t,A(b)", 0, (int) M_SWP_AB, INSN_MACRO, 0, I1 }, +{"swr", "t,~(b)", 0x60009000, 0xfc00f000, SM|RD_b|RD_t, 0, I1 }, +{"swr", "t,o(b)", 0, (int) M_SWR_OB, INSN_MACRO, 0, I1 }, +{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, 0, I1 }, +{"invalidate", "t,~(b)",0x60009000, 0xfc00f000, SM|RD_b|RD_t, 0, I1 }, /* same */ +{"invalidate", "t,o(b)",0, (int) M_SWR_OB, INSN_MACRO, 0, I1 }, +{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, 0, I1 }, +{"swxc1", "D,t(b)", 0x54000048, 0xfc0007ff, SM|RD_t|RD_b|FP_S, RD_D, I1 }, +{"sync_acquire", "", 0x00116b7c, 0xffffffff, NODS, 0, I1 }, +{"sync_mb", "", 0x00106b7c, 0xffffffff, NODS, 0, I1 }, +{"sync_release", "", 0x00126b7c, 0xffffffff, NODS, 0, I1 }, +{"sync_rmb", "", 0x00136b7c, 0xffffffff, NODS, 0, I1 }, +{"sync_wmb", "", 0x00046b7c, 0xffffffff, NODS, 0, I1 }, +{"sync", "", 0x00006b7c, 0xffffffff, NODS, 0, I1 }, +{"sync", "1", 0x00006b7c, 0xffe0ffff, NODS, 0, I1 }, +{"synci", "o(b)", 0x42000000, 0xffe00000, SM|RD_b, 0, I1 }, +{"syscall", "", 0x00008b7c, 0xffffffff, TRAP, 0, I1 }, +{"syscall", "B", 0x00008b7c, 0xfc00ffff, TRAP, 0, I1 }, +{"teqi", "s,j", 0x41c00000, 0xffe00000, RD_s|TRAP, 0, I1 }, +{"teq", "s,t", 0x0000003c, 0xfc00ffff, RD_s|RD_t|TRAP, 0, I1 }, +{"teq", "s,t,|", 0x0000003c, 0xfc000fff, RD_s|RD_t|TRAP, 0, I1 }, +{"teq", "s,j", 0x41c00000, 0xffe00000, RD_s|TRAP, 0, I1 }, /* teqi */ +{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, 0, I1 }, +{"tgei", "s,j", 0x41200000, 0xffe00000, RD_s|TRAP, 0, I1 }, +{"tge", "s,t", 0x0000023c, 0xfc00ffff, RD_s|RD_t|TRAP, 0, I1 }, +{"tge", "s,t,|", 0x0000023c, 0xfc000fff, RD_s|RD_t|TRAP, 0, I1 }, +{"tge", "s,j", 0x41200000, 0xffe00000, RD_s|TRAP, 0, I1 }, /* tgei */ +{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, 0, I1 }, +{"tgeiu", "s,j", 0x41600000, 0xffe00000, RD_s|TRAP, 0, I1 }, +{"tgeu", "s,t", 0x0000043c, 0xfc00ffff, RD_s|RD_t|TRAP, 0, I1 }, +{"tgeu", "s,t,|", 0x0000043c, 0xfc000fff, RD_s|RD_t|TRAP, 0, I1 }, +{"tgeu", "s,j", 0x41600000, 0xffe00000, RD_s|TRAP, 0, I1 }, /* tgeiu */ +{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, 0, I1 }, +{"tlbp", "", 0x0000037c, 0xffffffff, INSN_TLB, 0, I1 }, +{"tlbr", "", 0x0000137c, 0xffffffff, INSN_TLB, 0, I1 }, +{"tlbwi", "", 0x0000237c, 0xffffffff, INSN_TLB, 0, I1 }, +{"tlbwr", "", 0x0000337c, 0xffffffff, INSN_TLB, 0, I1 }, +{"tlti", "s,j", 0x41000000, 0xffe00000, RD_s|TRAP, 0, I1 }, +{"tlt", "s,t", 0x0000083c, 0xfc00ffff, RD_s|RD_t|TRAP, 0, I1 }, +{"tlt", "s,t,|", 0x0000083c, 0xfc000fff, RD_s|RD_t|TRAP, 0, I1 }, +{"tlt", "s,j", 0x41000000, 0xffe00000, RD_s|TRAP, 0, I1 }, /* tlti */ +{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, 0, I1 }, +{"tltiu", "s,j", 0x41400000, 0xffe00000, RD_s|TRAP, 0, I1 }, +{"tltu", "s,t", 0x00000a3c, 0xfc00ffff, RD_s|RD_t|TRAP, 0, I1 }, +{"tltu", "s,t,|", 0x00000a3c, 0xfc000fff, RD_s|RD_t|TRAP, 0, I1 }, +{"tltu", "s,j", 0x41400000, 0xffe00000, RD_s|TRAP, 0, I1 }, /* tltiu */ +{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, 0, I1 }, +{"tnei", "s,j", 0x41800000, 0xffe00000, RD_s|TRAP, 0, I1 }, +{"tne", "s,t", 0x00000c3c, 0xfc00ffff, RD_s|RD_t|TRAP, 0, I1 }, +{"tne", "s,t,|", 0x00000c3c, 0xfc000fff, RD_s|RD_t|TRAP, 0, I1 }, +{"tne", "s,j", 0x41800000, 0xffe00000, RD_s|TRAP, 0, I1 }, /* tnei */ +{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, 0, I1 }, +{"trunc.l.d", "T,S", 0x5400633b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, +{"trunc.l.s", "T,S", 0x5400233b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"trunc.w.d", "T,S", 0x54006b3b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, +{"trunc.w.s", "T,S", 0x54002b3b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, +{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, 0, I3 }, +{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, 0, I3 }, +{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, 0, I1 }, +{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, 0, I1 }, +{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, 0, I1 }, +{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, 0, I1 }, +{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, 0, I1 }, +{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, 0, I1 }, +{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, 0, I1 }, +{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, 0, I1 }, +{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, 0, I1 }, +{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, 0, I1 }, +{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, 0, I1 }, +{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, 0, I1 }, +{"wait", "", 0x0000937c, 0xffffffff, NODS, 0, I1 }, +{"wait", "B", 0x0000937c, 0xfc00ffff, NODS, 0, I1 }, +{"wrpgpr", "t,r", 0x0000f17c, 0xfc00ffff, RD_s, 0, I1 }, +{"wsbh", "t,r", 0x00007b3c, 0xfc00ffff, WR_t|RD_s, 0, I1 }, +{"xor", "mf,mt,mg", 0x4440, 0xffc0, 0, WR_mf|RD_mf|RD_mg, I1 }, +{"xor", "mf,mg,mx", 0x4440, 0xffc0, 0, WR_mf|RD_mf|RD_mg, I1 }, +{"xor", "d,v,t", 0x00000310, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, +{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, 0, I1 }, +{"xori", "t,r,i", 0x70000000, 0xfc000000, WR_t|RD_s, 0, I1 }, +}; + +const int bfd_micromips_num_opcodes = + ((sizeof micromips_opcodes) / (sizeof (micromips_opcodes[0]))); diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index c38a7e1..4e18d8a 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -57,6 +57,91 @@ static const unsigned int mips16_to_32_reg_map[] = 16, 17, 2, 3, 4, 5, 6, 7 }; +/* The microMIPS registers with type b. */ +#define micromips_to_32_reg_b_map mips16_to_32_reg_map + +/* The microMIPS registers with type c. */ +#define micromips_to_32_reg_c_map mips16_to_32_reg_map + +/* The microMIPS registers with type d. */ +#define micromips_to_32_reg_d_map mips16_to_32_reg_map + +/* The microMIPS registers with type e. */ +#define micromips_to_32_reg_e_map mips16_to_32_reg_map + +/* The microMIPS registers with type f. */ +#define micromips_to_32_reg_f_map mips16_to_32_reg_map + +/* The microMIPS registers with type g. */ +#define micromips_to_32_reg_g_map mips16_to_32_reg_map + +/* The microMIPS registers with type h. */ +static const unsigned int micromips_to_32_reg_h_map[] = +{ + 5, 5, 6, 4, 4, 4, 4, 4 +}; + +/* The microMIPS registers with type i. */ +static const unsigned int micromips_to_32_reg_i_map[] = +{ + 6, 7, 7, 21, 22, 5, 6, 7 +}; + +/* The microMIPS registers with type j: 32 registers. */ + +/* The microMIPS registers with type l. */ +#define micromips_to_32_reg_l_map mips16_to_32_reg_map + +/* The microMIPS registers with type m. */ +static const unsigned int micromips_to_32_reg_m_map[] = +{ + 0, 17, 2, 3, 16, 18, 19, 20 +}; + +/* The microMIPS registers with type n. */ +#define micromips_to_32_reg_n_map micromips_to_32_reg_m_map + +/* The microMIPS registers with type p: 32 registers. */ + +/* The microMIPS registers with type q. */ +static const unsigned int micromips_to_32_reg_q_map[] = +{ + 0, 17, 2, 3, 4, 5, 6, 7 +}; + +/* reg type s is $29. */ + +/* reg type t is the same as the last register. */ + +/* reg type y is $31. */ + +/* reg type z is $0. */ + +/* micromips imm B type. */ +static const int micromips_imm_b_map[8] = +{ + 1, 4, 8, 12, 16, 20, 24, -1 +}; + +/* micromips imm C type. */ +static const int micromips_imm_c_map[16] = +{ + 128, 1, 2, 3, 4, 7, 8, 15, 16, 31, 32, 63, 64, 255, 32768, 65535 +}; + +/* micromips imm D type: (-512..511)<<1. */ +/* micromips imm E type: (-64..63)<<1. */ +/* micromips imm F type: (0..63). */ +/* micromips imm G type: (-1..14). */ +/* micromips imm H type: (0..15)<<1. */ +/* micromips imm I type: (-1..126). */ +/* micromips imm J type: (0..15)<<2. */ +/* micromips imm L type: (0..15). */ +/* micromips imm M type: (1..8). */ +/* micromips imm W type: (0..63)<<2. */ +/* micromips imm X type: (-8..7). */ +/* micromips imm Y type: (-258..-3, 2..257)<<2. */ + #define mips16_reg_names(rn) mips_gpr_names[mips16_to_32_reg_map[rn]] @@ -479,7 +564,7 @@ const struct mips_arch_choice mips_arch_choices[] = { "mips32r2", 1, bfd_mach_mipsisa32r2, CPU_MIPS32R2, (ISA_MIPS32R2 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2 - | INSN_MIPS3D | INSN_MT), + | INSN_MIPS3D | INSN_MT | INSN_MCU), mips_cp0_names_mips3264r2, mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2), mips_hwr_names_mips3264r2 }, @@ -493,7 +578,7 @@ const struct mips_arch_choice mips_arch_choices[] = { "mips64r2", 1, bfd_mach_mipsisa64r2, CPU_MIPS64R2, (ISA_MIPS64R2 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2 - | INSN_DSP64 | INSN_MT | INSN_MDMX), + | INSN_DSP64 | INSN_MT | INSN_MDMX | INSN_MCU), mips_cp0_names_mips3264r2, mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2), mips_hwr_names_mips3264r2 }, @@ -537,6 +622,7 @@ const struct mips_arch_choice mips_arch_choices[] = values. */ static int mips_processor; static int mips_isa; +static int micromips_ase; static const char * const *mips_gpr_names; static const char * const *mips_fpr_names; static const char * const *mips_cp0_names; @@ -619,15 +705,28 @@ is_newabi (Elf_Internal_Ehdr *header) return 0; } +/* Check if the object has microMIPS ASE code. */ + +static int +is_micromips (Elf_Internal_Ehdr *header) +{ + if ((header->e_flags & EF_MIPS_ARCH_ASE_MICROMIPS) != 0) + return 1; + + return 0; +} + static void set_default_mips_dis_options (struct disassemble_info *info) { const struct mips_arch_choice *chosen_arch; - /* Defaults: mipsIII/r3000 (?!), (o)32-style ("oldabi") GPR names, - and numeric FPR, CP0 register, and HWR names. */ + /* Defaults: mipsIII/r3000 (?!), no microMIPS ASE (any compressed code + is MIPS16 ASE) (o)32-style ("oldabi") GPR names, and numeric FPR, + CP0 register, and HWR names. */ mips_isa = ISA_MIPS3; - mips_processor = CPU_R3000; + mips_processor = CPU_R3000; + micromips_ase = 0; mips_gpr_names = mips_gpr_names_oldabi; mips_fpr_names = mips_fpr_names_numeric; mips_cp0_names = mips_cp0_names_numeric; @@ -636,14 +735,17 @@ set_default_mips_dis_options (struct disassemble_info *info) mips_hwr_names = mips_hwr_names_numeric; no_aliases = 0; - /* If an ELF "newabi" binary, use the n32/(n)64 GPR names. */ + /* Update settings according to the ELF file header flags. */ if (info->flavour == bfd_target_elf_flavour && info->section != NULL) { Elf_Internal_Ehdr *header; header = elf_elfheader (info->section->owner); + /* If an ELF "newabi" binary, use the n32/(n)64 GPR names. */ if (is_newabi (header)) mips_gpr_names = mips_gpr_names_newabi; + /* If a microMIPS binary, then don't use MIPS16 bindings. */ + micromips_ase = is_micromips (header); } /* Set ISA, architecture, and cp0 register names as best we can. */ @@ -1068,6 +1170,18 @@ print_insn_args (const char *d, (*info->fprintf_func) (info->stream, "%d", delta); break; + case '~': + delta = (l >> OP_SH_OFFSET12) & OP_MASK_OFFSET12; + if (delta & 0x800) + delta |= ~0x7ff; + (*info->fprintf_func) (info->stream, "%d", delta); + break; + + case '\\': + (*info->fprintf_func) (info->stream, "0x%lx", + (l >> OP_SH_3BITPOS) & OP_MASK_3BITPOS); + break; + case '\'': (*info->fprintf_func) (info->stream, "0x%lx", (l >> OP_SH_RDDSP) & OP_MASK_RDDSP); @@ -2141,6 +2255,727 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info) return length; } +/* Disassemble microMIPS instructions. */ + +static int +print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) +{ + const fprintf_ftype iprintf = info->fprintf_func; + const struct mips_opcode *op, *opend; + unsigned int lsb, msbd, msb; + void *is = info->stream; + unsigned int regno; + bfd_byte buffer[2]; + int lastregno = 0; + int higher; + int length; + int status; + int delta; + int immed; + int insn; + + lsb = 0; + + info->bytes_per_chunk = 2; + info->display_endian = info->endian; + info->insn_info_valid = 1; + info->branch_delay_insns = 0; + info->data_size = 0; + info->insn_type = dis_nonbranch; + info->target = 0; + info->target2 = 0; + + status = (*info->read_memory_func) (memaddr, buffer, 2, info); + if (status != 0) + { + (*info->memory_error_func) (status, memaddr, info); + return -1; + } + + length = 2; + + if (info->endian == BFD_ENDIAN_BIG) + insn = bfd_getb16 (buffer); + else + insn = bfd_getl16 (buffer); + + if ((insn & 0xfc00) == 0x7c00) + { + /* This is a 48-bit microMIPS instruction. */ + higher = insn; + + status = (*info->read_memory_func) (memaddr + 2, buffer, 2, info); + if (status != 0) + { + iprintf (is, "micromips 0x%x", higher); + (*info->memory_error_func) (status, memaddr + 2, info); + return -1; + } + if (info->endian == BFD_ENDIAN_BIG) + insn = bfd_getb16 (buffer); + else + insn = bfd_getl16 (buffer); + higher = (higher << 16) | insn; + + status = (*info->read_memory_func) (memaddr + 4, buffer, 2, info); + if (status != 0) + { + iprintf (is, "micromips 0x%x", higher); + (*info->memory_error_func) (status, memaddr + 4, info); + return -1; + } + if (info->endian == BFD_ENDIAN_BIG) + insn = bfd_getb16 (buffer); + else + insn = bfd_getl16 (buffer); + iprintf (is, "0x%x%04x (48-bit insn)", higher, insn); + + info->insn_type = dis_noninsn; + return 6; + } + else if ((insn & 0x1c00) == 0x0000 || (insn & 0x1000) == 0x1000) + { + /* This is a 32-bit microMIPS instruction. */ + higher = insn; + + status = (*info->read_memory_func) (memaddr + 2, buffer, 2, info); + if (status != 0) + { + iprintf (is, "micromips 0x%x", higher); + (*info->memory_error_func) (status, memaddr + 2, info); + return -1; + } + + if (info->endian == BFD_ENDIAN_BIG) + insn = bfd_getb16 (buffer); + else + insn = bfd_getl16 (buffer); + + insn = insn | (higher << 16); + + length += 2; + } + + /* FIXME: Should probably use a hash table on the major opcode here. */ + +#define GET_OP(insn, field) \ + (((insn) >> MICROMIPSOP_SH_##field) & MICROMIPSOP_MASK_##field) + opend = micromips_opcodes + bfd_micromips_num_opcodes; + for (op = micromips_opcodes; op < opend; op++) + { + if (op->pinfo != INSN_MACRO + && !(no_aliases && (op->pinfo2 & INSN2_ALIAS)) + && (insn & op->mask) == op->match + && ((length == 2 && (op->mask & 0xffff0000) == 0) + || (length == 4 && (op->mask & 0xffff0000) != 0))) + { + const char *s; + + iprintf (is, "%s", op->name); + if (op->args[0] != '\0') + iprintf (is, "\t"); + + for (s = op->args; *s != '\0'; s++) + { + switch (*s) + { + case ',': + case '(': + case ')': + iprintf (is, "%c", *s); + break; + + case '.': + delta = GET_OP (insn, OFFSET10); + if (delta & 0x200) + delta |= ~0x3ff; + iprintf (is, "%d", delta); + break; + + case '1': + iprintf (is, "0x%lx", GET_OP (insn, STYPE)); + break; + + case '<': + iprintf (is, "0x%lx", GET_OP (insn, SHAMT)); + break; + + case '\\': + iprintf (is, "0x%lx", GET_OP (insn, 3BITPOS)); + break; + + case '|': + iprintf (is, "0x%lx", GET_OP (insn, TRAP)); + break; + + case '~': + delta = GET_OP (insn, OFFSET12); + if (delta & 0x800) + delta |= ~0x7ff; + iprintf (is, "%d", delta); + break; + + case 'a': + if (strcmp (op->name, "jalx") == 0) + info->target = (((memaddr + 4) & ~(bfd_vma) 0x0fffffff) + | (GET_OP (insn, TARGET) << 2)); + else + info->target = (((memaddr + 4) & ~(bfd_vma) 0x07ffffff) + | ((GET_OP (insn, TARGET)) << 1)); + /* For gdb disassembler, force odd address on jalx. */ + if (info->flavour == bfd_target_unknown_flavour + && strcmp (op->name, "jalx") == 0) + info->target |= 1; + (*info->print_address_func) (info->target, info); + break; + + case 'b': + case 'r': + case 's': + case 'v': + iprintf (is, "%s", mips_gpr_names[GET_OP (insn, RS)]); + break; + + case 'c': + iprintf (is, "0x%lx", GET_OP (insn, CODE)); + break; + + case 'd': + iprintf (is, "%s", mips_gpr_names[GET_OP (insn, RD)]); + break; + + case 'h': + iprintf (is, "0x%lx", GET_OP (insn, PREFX)); + break; + + case 'i': + case 'u': + iprintf (is, "0x%lx", GET_OP (insn, IMMEDIATE)); + break; + + case 'j': /* Same as i, but sign-extended. */ + case 'o': + delta = (GET_OP (insn, DELTA) ^ 0x8000) - 0x8000; + iprintf (is, "%d", delta); + break; + + case 'k': + iprintf (is, "0x%x", GET_OP (insn, CACHE)); + break; + + case 'n': + { + int s_reg_encode; + + immed = GET_OP (insn, RT); + s_reg_encode = immed & 0xf; + if (s_reg_encode != 0) + { + if (s_reg_encode == 1) + iprintf (is, "%s", mips_gpr_names[16]); + else if (s_reg_encode < 9) + iprintf (is, "%s-%s", + mips_gpr_names[16], + mips_gpr_names[15 + s_reg_encode]); + else if (s_reg_encode == 9) + iprintf (is, "%s-%s,%s", + mips_gpr_names[16], + mips_gpr_names[23], + mips_gpr_names[30]); + else + iprintf (is, "UNKNOWN"); + } + + if (immed & 0x10) /* For ra. */ + { + if (s_reg_encode == 0) + iprintf (is, "%s", mips_gpr_names[31]); + else + iprintf (is, ",%s", mips_gpr_names[31]); + } + break; + } + + case 'p': + /* Sign-extend the displacement. */ + delta = (GET_OP (insn, DELTA) ^ 0x8000) - 0x8000; + info->target = (delta << 1) + memaddr + length; + (*info->print_address_func) (info->target, info); + break; + + case 'q': + iprintf (is, "0x%lx", GET_OP (insn, CODE2)); + break; + + case 't': + case 'w': + iprintf (is, "%s", mips_gpr_names[GET_OP (insn, RT)]); + break; + + case 'y': + iprintf (is, "%s", mips_gpr_names[GET_OP (insn, RS3)]); + break; + + case 'z': + iprintf (is, "%s", mips_gpr_names[0]); + break; + + case 'B': + iprintf (is, "0x%lx", GET_OP (insn, CODE10)); + break; + + case 'C': + iprintf (is, "0x%lx", GET_OP (insn, COPZ)); + break; + + case 'D': + iprintf (is, "%s", mips_fpr_names[GET_OP (insn, FD)]); + break; + + case 'E': + /* Coprocessor register for lwcN instructions, et al. + + Note that there is no load/store cp0 instructions, and + that FPU (cp1) instructions disassemble this field using + 'T' format. Therefore, until we gain understanding of + cp2 register names, we can simply print the register + numbers. */ + iprintf (is, "$%ld", GET_OP (insn, RT)); + break; + + case 'G': + /* Coprocessor register for mtcN instructions, et al. Note + that FPU (cp1) instructions disassemble this field using + 'S' format. Therefore, we only need to worry about cp0, + cp2, and cp3. + The microMIPS encoding does not have a coprocessor + identifier field as such, so we must work out the + coprocessor number by looking at the opcode. */ + switch (insn + & ~((MICROMIPSOP_MASK_RT << MICROMIPSOP_SH_RT) + | (MICROMIPSOP_MASK_RS << MICROMIPSOP_SH_RS))) + { + case 0x000000fc: /* mfc0 */ + case 0x000002fc: /* mtc0 */ + case 0x580000fc: /* dmfc0 */ + case 0x580002fc: /* dmtc0 */ + iprintf (is, "%s", mips_cp0_names[GET_OP (insn, RS)]); + break; + default: + iprintf (is, "$%ld", GET_OP (insn, RS)); + break; + } + break; + + case 'H': + iprintf (is, "%ld", GET_OP (insn, SEL)); + break; + + case 'K': + iprintf (is, "%s", mips_hwr_names[GET_OP (insn, RS)]); + break; + + case 'M': + iprintf (is, "$fcc%ld", GET_OP (insn, CCC)); + break; + + case 'N': + iprintf (is, + (op->pinfo & (FP_D | FP_S)) != 0 + ? "$fcc%ld" : "$cc%ld", + GET_OP (insn, BCC)); + break; + + case 'R': + iprintf (is, "%s", mips_fpr_names[GET_OP (insn, FR)]); + break; + + case 'S': + case 'V': + iprintf (is, "%s", mips_fpr_names[GET_OP (insn, FS)]); + break; + + case 'T': + iprintf (is, "%s", mips_fpr_names[GET_OP (insn, FT)]); + break; + + case '+': + /* Extension character; switch for second char. */ + s++; + switch (*s) + { + case 'A': + lsb = GET_OP (insn, EXTLSB); + iprintf (is, "0x%x", lsb); + break; + + case 'B': + msb = GET_OP (insn, INSMSB); + iprintf (is, "0x%x", msb - lsb + 1); + break; + + case 'C': + case 'H': + msbd = GET_OP (insn, EXTMSBD); + iprintf (is, "0x%x", msbd + 1); + break; + + case 'D': + { + const struct mips_cp0sel_name *n; + unsigned int cp0reg, sel; + + cp0reg = GET_OP (insn, RS); + sel = GET_OP (insn, SEL); + + /* CP0 register including 'sel' code for mtcN + (et al.), to be printed textually if known. + If not known, print both CP0 register name and + sel numerically since CP0 register with sel 0 may + have a name unrelated to register being printed. */ + n = lookup_mips_cp0sel_name (mips_cp0sel_names, + mips_cp0sel_names_len, + cp0reg, sel); + if (n != NULL) + iprintf (is, "%s", n->name); + else + iprintf (is, "$%d,%d", cp0reg, sel); + break; + } + + case 'E': + lsb = GET_OP (insn, EXTLSB) + 32; + iprintf (is, "0x%x", lsb); + break; + + case 'F': + msb = GET_OP (insn, INSMSB) + 32; + iprintf (is, "0x%x", msb - lsb + 1); + break; + + case 'G': + msbd = GET_OP (insn, EXTMSBD) + 32; + iprintf (is, "0x%x", msbd + 1); + break; + + default: + /* xgettext:c-format */ + iprintf (is, + _("# internal disassembler error, " + "unrecognized modifier (+%c)"), + *s); + abort (); + } + break; + + case 'm': + /* Extension character; switch for second char. */ + s++; + switch (*s) + { + case 'a': /* global pointer. */ + iprintf (is, "%s", mips_gpr_names[28]); + break; + + case 'b': + regno = micromips_to_32_reg_b_map[GET_OP (insn, MB)]; + iprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'c': + regno = micromips_to_32_reg_c_map[GET_OP (insn, MC)]; + iprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'd': + regno = micromips_to_32_reg_d_map[GET_OP (insn, MD)]; + iprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'e': + regno = micromips_to_32_reg_e_map[GET_OP (insn, ME)]; + iprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'f': + /* Save lastregno for "mt" to print out later. */ + lastregno = micromips_to_32_reg_f_map[GET_OP (insn, MF)]; + iprintf (is, "%s", mips_gpr_names[lastregno]); + break; + + case 'g': + regno = micromips_to_32_reg_g_map[GET_OP (insn, MG)]; + iprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'h': + regno = micromips_to_32_reg_h_map[GET_OP (insn, MH)]; + iprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'i': + regno = micromips_to_32_reg_i_map[GET_OP (insn, MI)]; + iprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'j': + iprintf (is, "%s", mips_gpr_names[GET_OP (insn, MJ)]); + break; + + case 'l': + regno = micromips_to_32_reg_l_map[GET_OP (insn, ML)]; + iprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'm': + regno = micromips_to_32_reg_m_map[GET_OP (insn, MM)]; + iprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'n': + regno = micromips_to_32_reg_n_map[GET_OP (insn, MN)]; + iprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'p': + /* Save lastregno for "mt" to print out later. */ + lastregno = GET_OP (insn, MP); + iprintf (is, "%s", mips_gpr_names[lastregno]); + break; + + case 'q': + regno = micromips_to_32_reg_q_map[GET_OP (insn, MQ)]; + iprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'r': /* program counter. */ + iprintf (is, "$pc"); + break; + + case 's': /* stack pointer. */ + lastregno = 29; + iprintf (is, "%s", mips_gpr_names[29]); + break; + + case 't': + iprintf (is, "%s", mips_gpr_names[lastregno]); + break; + + case 'z': /* $0. */ + iprintf (is, "%s", mips_gpr_names[0]); + break; + + case 'A': + /* Sign-extend the immediate. */ + immed = ((GET_OP (insn, IMMA) ^ 0x40) - 0x40) << 2; + iprintf (is, "%d", immed); + break; + + case 'B': + immed = micromips_imm_b_map[GET_OP (insn, IMMB)]; + iprintf (is, "%d", immed); + break; + + case 'C': + immed = micromips_imm_c_map[GET_OP (insn, IMMC)]; + iprintf (is, "0x%lx", immed); + break; + + case 'D': + /* Sign-extend the displacement. */ + delta = (GET_OP (insn, IMMD) ^ 0x200) - 0x200; + info->target = (delta << 1) + memaddr + length; + (*info->print_address_func) (info->target, info); + break; + + case 'E': + /* Sign-extend the displacement. */ + delta = (GET_OP (insn, IMME) ^ 0x40) - 0x40; + info->target = (delta << 1) + memaddr + length; + (*info->print_address_func) (info->target, info); + break; + + case 'F': + immed = GET_OP (insn, IMMF); + iprintf (is, "0x%x", immed); + break; + + case 'G': + immed = (insn >> MICROMIPSOP_SH_IMMG) + 1; + immed = (immed & MICROMIPSOP_MASK_IMMG) - 1; + iprintf (is, "%d", immed); + break; + + case 'H': + immed = GET_OP (insn, IMMH) << 1; + iprintf (is, "%d", immed); + break; + + case 'I': + immed = (insn >> MICROMIPSOP_SH_IMMI) + 1; + immed = (immed & MICROMIPSOP_MASK_IMMI) - 1; + iprintf (is, "%d", immed); + break; + + case 'J': + immed = GET_OP (insn, IMMJ) << 2; + iprintf (is, "%d", immed); + break; + + case 'L': + immed = GET_OP (insn, IMML); + iprintf (is, "%d", immed); + break; + + case 'M': + immed = (insn >> MICROMIPSOP_SH_IMMM) - 1; + immed = (immed & MICROMIPSOP_MASK_IMMM) + 1; + iprintf (is, "%d", immed); + break; + + case 'N': + immed = GET_OP (insn, IMMN); + if (immed == 0) + iprintf (is, "%s,%s", + mips_gpr_names[16], + mips_gpr_names[31]); + else + iprintf (is, "%s-%s,%s", + mips_gpr_names[16], + mips_gpr_names[16 + immed], + mips_gpr_names[31]); + break; + + case 'O': + immed = GET_OP (insn, IMMO); + iprintf (is, "0x%x", immed); + break; + + case 'P': + immed = GET_OP (insn, IMMP) << 2; + iprintf (is, "%d", immed); + break; + + case 'Q': + /* Sign-extend the immediate. */ + immed = (GET_OP (insn, IMMQ) ^ 0x400000) - 0x400000; + immed <<= 2; + iprintf (is, "%d", immed); + break; + + case 'U': + immed = GET_OP (insn, IMMU) << 2; + iprintf (is, "%d", immed); + break; + + case 'W': + immed = GET_OP (insn, IMMW) << 2; + iprintf (is, "%d", immed); + break; + + case 'X': + /* Sign-extend the immediate. */ + immed = (GET_OP (insn, IMMX) ^ 0x8) - 0x8; + iprintf (is, "%d", immed); + break; + + case 'Y': + /* Sign-extend the immediate. */ + immed = (GET_OP (insn, IMMY) ^ 0x100) - 0x100; + if (immed >= -2 && immed <= 1) + immed ^= 0x100; + immed = immed << 2; + iprintf (is, "%d", immed); + break; + + default: + /* xgettext:c-format */ + iprintf (is, + _("# internal disassembler error, " + "unrecognized modifier (m%c)"), + *s); + abort (); + } + break; + + default: + /* xgettext:c-format */ + iprintf (is, + _("# internal disassembler error, " + "unrecognized modifier (%c)"), + *s); + abort (); + } + } + + /* Figure out instruction type and branch delay information. */ + if ((op->pinfo + & (INSN_UNCOND_BRANCH_DELAY | INSN_COND_BRANCH_DELAY)) != 0) + info->branch_delay_insns = 1; + if (((op->pinfo & INSN_UNCOND_BRANCH_DELAY) + | (op->pinfo2 & INSN2_UNCOND_BRANCH)) != 0) + { + if ((op->pinfo & (INSN_WRITE_GPR_31 | INSN_WRITE_GPR_T)) != 0) + info->insn_type = dis_jsr; + else + info->insn_type = dis_branch; + } + else if (((op->pinfo & INSN_COND_BRANCH_DELAY) + | (op->pinfo2 & INSN2_COND_BRANCH)) != 0) + { + if ((op->pinfo & INSN_WRITE_GPR_31) != 0) + info->insn_type = dis_condjsr; + else + info->insn_type = dis_condbranch; + } + else if ((op->pinfo + & (INSN_STORE_MEMORY | INSN_LOAD_MEMORY_DELAY)) != 0) + info->insn_type = dis_dref; + + return length; + } + } +#undef GET_OP + + iprintf (is, "0x%x", insn); + info->insn_type = dis_noninsn; + + return length; +} + +/* Return 1 if a symbol associated with the location being disassembled + indicates a compressed (MIPS16 or microMIPS) mode. We iterate over + all the symbols at the address being considered assuming if at least + one of them indicates code compression, then such code has been + genuinely produced here (other symbols could have been derived from + function symbols defined elsewhere or could define data). Otherwise, + return 0. */ + +static bfd_boolean +is_compressed_mode_p (struct disassemble_info *info) +{ + elf_symbol_type *symbol; + int pos; + int i; + + for (i = 0; i < info->num_symbols; i++) + { + pos = info->symtab_pos + i; + + if (bfd_asymbol_flavour (info->symtab[pos]) != bfd_target_elf_flavour) + continue; + + symbol = (elf_symbol_type *) info->symtab[pos]; + if ((!micromips_ase + && ELF_ST_IS_MIPS16 (symbol->internal_elf_sym.st_other)) + || (micromips_ase + && ELF_ST_IS_MICROMIPS (symbol->internal_elf_sym.st_other))) + return 1; + } + + return 0; +} + /* In an environment where we do not know the symbol type of the instruction we are forced to assume that the low order bit of the instructions' address may mark it as a mips16 instruction. If we @@ -2152,26 +2987,30 @@ _print_insn_mips (bfd_vma memaddr, struct disassemble_info *info, enum bfd_endian endianness) { + int (*print_insn_compr) (bfd_vma, struct disassemble_info *); bfd_byte buffer[INSNLEN]; int status; set_default_mips_dis_options (info); parse_mips_dis_options (info->disassembler_options); + if (info->mach == bfd_mach_mips16) + return print_insn_mips16 (memaddr, info); + if (info->mach == bfd_mach_mips_micromips) + return print_insn_micromips (memaddr, info); + + print_insn_compr = !micromips_ase ? print_insn_mips16 : print_insn_micromips; + #if 1 - /* FIXME: If odd address, this is CLEARLY a mips 16 instruction. */ + /* FIXME: If odd address, this is CLEARLY a compressed instruction. */ /* Only a few tools will work this way. */ if (memaddr & 0x01) - return print_insn_mips16 (memaddr, info); + return print_insn_compr (memaddr, info); #endif #if SYMTAB_AVAILABLE - if (info->mach == bfd_mach_mips16 - || (info->symbols != NULL - && bfd_asymbol_flavour (*info->symbols) == bfd_target_elf_flavour - && ELF_ST_IS_MIPS16 ((*(elf_symbol_type **) info->symbols) - ->internal_elf_sym.st_other))) - return print_insn_mips16 (memaddr, info); + if (is_compressed_mode_p (info)) + return print_insn_compr (memaddr, info); #endif status = (*info->read_memory_func) (memaddr, buffer, INSNLEN, info); diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 8f51643..7adf337 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -37,7 +37,8 @@ #define COD INSN_COPROC_MOVE_DELAY #define CLD INSN_COPROC_MEMORY_DELAY #define CBL INSN_COND_BRANCH_LIKELY -#define TRAP INSN_TRAP +#define NODS INSN_NO_DELAY_SLOT +#define TRAP INSN_NO_DELAY_SLOT #define SM INSN_STORE_MEMORY #define WR_d INSN_WRITE_GPR_D @@ -150,13 +151,14 @@ to track dependencies of these fields. However, "bposge32" is a branch instruction that depends on the "pos" field. In order to make sure that GAS does not reorder DSP instructions - that writes the "pos" field and "bposge32", we add DSP_VOLA (INSN_TRAP) - attribute to those instructions that write the "pos" field. */ + that writes the "pos" field and "bposge32", we add DSP_VOLA + (INSN_NO_DELAY_SLOT) attribute to those instructions that write the "pos" + field. */ #define WR_a WR_HILO /* Write dsp accumulators (reuse WR_HILO) */ #define RD_a RD_HILO /* Read dsp accumulators (reuse RD_HILO) */ #define MOD_a WR_a|RD_a -#define DSP_VOLA INSN_TRAP +#define DSP_VOLA INSN_NO_DELAY_SLOT #define D32 INSN_DSP #define D33 INSN_DSPR2 #define D64 INSN_DSP64 @@ -171,6 +173,9 @@ #define RD_Z INSN2_READ_FPR_Z #define RD_d INSN2_READ_GPR_D +/* MIPS MCU (MicroController) ASE support. */ +#define MC INSN_MCU + /* The order of overloaded instructions matters. Label arguments and register arguments look the same. Instructions that can have either for arguments must apear in the correct order in this table for the @@ -270,6 +275,9 @@ const struct mips_opcode mips_builtin_opcodes[] = {"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D|RD_S|FP_D, 0, I1 }, {"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_D|RD_S|FP_D, 0, I5_33|IL2F }, {"abs.ps", "D,V", 0x45600005, 0xffff003f, WR_D|RD_S|FP_D, 0, IL2E }, +{"aclr", "\\,~(b)", 0x04070000, 0xfc1f8000, SM|RD_b|NODS, 0, MC }, +{"aclr", "\\,o(b)", 0, (int) M_ACLR_OB, INSN_MACRO, 0, MC }, +{"aclr", "\\,A(b)", 0, (int) M_ACLR_AB, INSN_MACRO, 0, MC }, {"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, {"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, 0, I1 }, {"add", "D,S,T", 0x45c00000, 0xffe0003f, RD_S|RD_T|WR_D|FP_S, 0, IL2E }, @@ -310,6 +318,9 @@ const struct mips_opcode mips_builtin_opcodes[] = {"and.ob", "D,S,k", 0x4bc0000c, 0xffe0003f, WR_D|RD_S|RD_T, 0, N54 }, {"and.qh", "X,Y,Q", 0x7820000c, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, MX }, {"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, 0, I1 }, +{"aset", "\\,~(b)", 0x04078000, 0xfc1f8000, SM|RD_b|NODS, 0, MC }, +{"aset", "\\,o(b)", 0, (int) M_ASET_OB, INSN_MACRO, 0, MC }, +{"aset", "\\,A(b)", 0, (int) M_ASET_AB, INSN_MACRO, 0, MC }, {"baddu", "d,v,t", 0x70000028, 0xfc0007ff, WR_d|RD_s|RD_t, 0, IOCT }, /* b is at the top of the table. */ /* bal is at the top of the table. */ @@ -631,7 +642,7 @@ const struct mips_opcode mips_builtin_opcodes[] = /* dctr and dctw are used on the r5000. */ {"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, 0, I3 }, {"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, 0, I3 }, -{"deret", "", 0x4200001f, 0xffffffff, 0, 0, I32|G2 }, +{"deret", "", 0x4200001f, 0xffffffff, NODS, 0, I32|G2 }, {"dext", "t,r,I,+I", 0, (int) M_DEXT, INSN_MACRO, 0, I65 }, {"dext", "t,r,+A,+C", 0x7c000003, 0xfc00003f, WR_t|RD_s, 0, I65 }, {"dextm", "t,r,+A,+G", 0x7c000001, 0xfc00003f, WR_t|RD_s, 0, I65 }, @@ -763,7 +774,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"ei", "t", 0x41606020, 0xffe0ffff, WR_t|WR_C0, 0, I33|IOCT}, {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 }, {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 }, -{"eret", "", 0x42000018, 0xffffffff, 0, 0, I3_32 }, +{"eret", "", 0x42000018, 0xffffffff, NODS, 0, I3_32 }, {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 }, {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 }, {"ext", "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_t|RD_s, 0, I33 }, @@ -776,6 +787,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, 0, I2 }, {"hibernate","", 0x42000023, 0xffffffff, 0, 0, V1 }, {"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t|RD_s, 0, I33 }, +{"iret", "", 0x42000038, 0xffffffff, NODS, 0, MC }, {"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, 0, I1 }, /* jr.hb is officially MIPS{32,64}R2, but it works on R1 as jr with the same hazard barrier effect. */ @@ -1400,19 +1412,19 @@ const struct mips_opcode mips_builtin_opcodes[] = {"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, 0, I2 }, /* same */ {"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, 0, I2 }, /* as swr */ {"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b|FP_S, 0, I4_33 }, -{"synciobdma", "", 0x0000008f, 0xffffffff, INSN_SYNC, 0, IOCT }, -{"syncs", "", 0x0000018f, 0xffffffff, INSN_SYNC, 0, IOCT }, -{"syncw", "", 0x0000010f, 0xffffffff, INSN_SYNC, 0, IOCT }, -{"syncws", "", 0x0000014f, 0xffffffff, INSN_SYNC, 0, IOCT }, -{"sync_acquire", "", 0x0000044f, 0xffffffff, INSN_SYNC, 0, I33 }, -{"sync_mb", "", 0x0000040f, 0xffffffff, INSN_SYNC, 0, I33 }, -{"sync_release", "", 0x0000048f, 0xffffffff, INSN_SYNC, 0, I33 }, -{"sync_rmb", "", 0x000004cf, 0xffffffff, INSN_SYNC, 0, I33 }, -{"sync_wmb", "", 0x0000010f, 0xffffffff, INSN_SYNC, 0, I33 }, -{"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, 0, I2|G1 }, -{"sync", "1", 0x0000000f, 0xfffff83f, INSN_SYNC, 0, I32 }, -{"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, 0, I2 }, -{"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, 0, I2 }, +{"synciobdma", "", 0x0000008f, 0xffffffff, NODS, 0, IOCT }, +{"syncs", "", 0x0000018f, 0xffffffff, NODS, 0, IOCT }, +{"syncw", "", 0x0000010f, 0xffffffff, NODS, 0, IOCT }, +{"syncws", "", 0x0000014f, 0xffffffff, NODS, 0, IOCT }, +{"sync_acquire", "", 0x0000044f, 0xffffffff, NODS, 0, I33 }, +{"sync_mb", "", 0x0000040f, 0xffffffff, NODS, 0, I33 }, +{"sync_release", "", 0x0000048f, 0xffffffff, NODS, 0, I33 }, +{"sync_rmb", "", 0x000004cf, 0xffffffff, NODS, 0, I33 }, +{"sync_wmb", "", 0x0000010f, 0xffffffff, NODS, 0, I33 }, +{"sync", "", 0x0000000f, 0xffffffff, NODS, 0, I2|G1 }, +{"sync", "1", 0x0000000f, 0xfffff83f, NODS, 0, I32 }, +{"sync.p", "", 0x0000040f, 0xffffffff, NODS, 0, I2 }, +{"sync.l", "", 0x0000000f, 0xffffffff, NODS, 0, I2 }, {"synci", "o(b)", 0x041f0000, 0xfc1f0000, SM|RD_b, 0, I33 }, {"syscall", "", 0x0000000c, 0xffffffff, TRAP, 0, I1 }, {"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, 0, I1 }, @@ -1481,9 +1493,9 @@ const struct mips_opcode mips_builtin_opcodes[] = {"wacl.ob", "Y,Z", 0x7800003e, 0xffe007ff, RD_S|RD_T|FP_D, WR_MACC, MX|SB1 }, {"wacl.ob", "S,T", 0x4800003e, 0xffe007ff, RD_S|RD_T, 0, N54 }, {"wacl.qh", "Y,Z", 0x7820003e, 0xffe007ff, RD_S|RD_T|FP_D, WR_MACC, MX }, -{"wait", "", 0x42000020, 0xffffffff, TRAP, 0, I3_32 }, -{"wait", "J", 0x42000020, 0xfe00003f, TRAP, 0, I32|N55 }, -{"waiti", "", 0x42000020, 0xffffffff, TRAP, 0, L1 }, +{"wait", "", 0x42000020, 0xffffffff, NODS, 0, I3_32 }, +{"wait", "J", 0x42000020, 0xfe00003f, NODS, 0, I32|N55 }, +{"waiti", "", 0x42000020, 0xffffffff, NODS, 0, L1 }, {"wrpgpr", "d,w", 0x41c00000, 0xffe007ff, RD_t, 0, I33 }, {"wsbh", "d,w", 0x7c0000a0, 0xffe007ff, WR_d|RD_t, 0, I33 }, {"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, @@ -1496,8 +1508,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"xor.ob", "D,S,k", 0x4bc0000d, 0xffe0003f, WR_D|RD_S|RD_T, 0, N54 }, {"xor.qh", "X,Y,Q", 0x7820000d, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, MX }, {"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, 0, I1 }, -{"yield", "s", 0x7c000009, 0xfc1fffff, TRAP|RD_s, 0, MT32 }, -{"yield", "d,s", 0x7c000009, 0xfc1f07ff, TRAP|WR_d|RD_s, 0, MT32 }, +{"yield", "s", 0x7c000009, 0xfc1fffff, NODS|RD_s, 0, MT32 }, +{"yield", "d,s", 0x7c000009, 0xfc1f07ff, NODS|WR_d|RD_s, 0, MT32 }, /* User Defined Instruction. */ {"udi0", "s,t,d,+1",0x70000010, 0xfc00003f, WR_d|RD_s|RD_t, 0, I33 }, diff --git a/opcodes/mips16-opc.c b/opcodes/mips16-opc.c index c42ab27..f46cf28 100644 --- a/opcodes/mips16-opc.c +++ b/opcodes/mips16-opc.c @@ -58,7 +58,8 @@ #define RD_HI INSN_READ_HI #define RD_LO INSN_READ_LO -#define TRAP INSN_TRAP +#define NODS INSN_NO_DELAY_SLOT +#define TRAP INSN_NO_DELAY_SLOT #define I1 INSN_ISA1 #define I3 INSN_ISA3 @@ -171,6 +172,13 @@ const struct mips_opcode mips16_opcodes[] = {"jr", "R", 0xe820, 0xffff, UBD|RD_31, 0, I1 }, {"j", "x", 0xe800, 0xf8ff, UBD|RD_x, 0, I1 }, {"j", "R", 0xe820, 0xffff, UBD|RD_31, 0, I1 }, +/* MIPS16e compact branches. We keep them near the ordinary branches + so that we easily find them when converting a normal branch to a + compact one. */ +{"jalrc", "x", 0xe8c0, 0xf8ff, UBR|WR_31|RD_x|NODS, 0, I32 }, +{"jalrc", "R,x", 0xe8c0, 0xf8ff, UBR|WR_31|RD_x|NODS, 0, I32 }, +{"jrc", "x", 0xe880, 0xf8ff, UBR|RD_x|NODS, 0, I32 }, +{"jrc", "R", 0xe8a0, 0xffff, UBR|RD_31|NODS, 0, I32 }, {"lb", "y,5(x)", 0x8000, 0xf800, WR_y|RD_x, 0, I1 }, {"lbu", "y,5(x)", 0xa000, 0xf800, WR_y|RD_x, 0, I1 }, {"ld", "y,D(x)", 0x3800, 0xf800, WR_y|RD_x, 0, I3 }, @@ -227,12 +235,8 @@ const struct mips_opcode mips16_opcodes[] = {"sw", "R,V(S)", 0x6200, 0xff00, RD_31|RD_SP, 0, I1 }, {"xor", "x,y", 0xe80e, 0xf81f, WR_x|RD_x|RD_y, 0, I1 }, /* MIPS16e additions */ -{"jalrc", "x", 0xe8c0, 0xf8ff, UBR|WR_31|RD_x|TRAP, 0, I32 }, -{"jalrc", "R,x", 0xe8c0, 0xf8ff, UBR|WR_31|RD_x|TRAP, 0, I32 }, -{"jrc", "x", 0xe880, 0xf8ff, UBR|RD_x|TRAP, 0, I32 }, -{"jrc", "R", 0xe8a0, 0xffff, UBR|RD_31|TRAP, 0, I32 }, -{"restore", "M", 0x6400, 0xff80, WR_31|RD_SP|WR_SP|TRAP, 0, I32 }, -{"save", "m", 0x6480, 0xff80, RD_31|RD_SP|WR_SP|TRAP, 0, I32 }, +{"restore", "M", 0x6400, 0xff80, WR_31|RD_SP|WR_SP|NODS, 0, I32 }, +{"save", "m", 0x6480, 0xff80, RD_31|RD_SP|WR_SP|NODS, 0, I32 }, {"sdbbp", "6", 0xe801, 0xf81f, TRAP, 0, I32 }, {"seb", "x", 0xe891, 0xf8ff, WR_x|RD_x, 0, I32 }, {"seh", "x", 0xe8b1, 0xf8ff, WR_x|RD_x, 0, I32 }, diff --git a/opcodes/po/.cvsignore b/opcodes/po/.cvsignore deleted file mode 100644 index becd153..0000000 --- a/opcodes/po/.cvsignore +++ /dev/null @@ -1 +0,0 @@ -*.gmo diff --git a/opcodes/po/POTFILES.in b/opcodes/po/POTFILES.in index 9496c87..bf9bf04 100644 --- a/opcodes/po/POTFILES.in +++ b/opcodes/po/POTFILES.in @@ -177,6 +177,10 @@ tic54x-opc.c tic6x-dis.c tic80-dis.c tic80-opc.c +tilegx-dis.c +tilegx-opc.c +tilepro-dis.c +tilepro-opc.c v850-dis.c v850-opc.c vax-dis.c diff --git a/opcodes/po/da.gmo b/opcodes/po/da.gmo new file mode 100644 index 0000000000000000000000000000000000000000..2f18a0030b173e7d31a8e046cedd034f47f5a6bd GIT binary patch literal 17528 zcmc(lYm^*Eb;pa?1Z!+;<0lVemt`%xYiU-yE3LFzWJPOB#zGQS^fC_v>YeGCZB5Vg z(%rM#6_}U72J?Q0C*ipp5rlK`D13gIN!5c6bbw@x0UF zUx32@QKLBMtO8k?44uMRq+6!uM29*BY4oW{B1er?p z9gwc6$3a9xl~`=1N?iqNaMGn;21)nOb!YN+InGf-+w( zarh>O4}qKc{un6wb_JD4xjmrh_be#=c^@e2^m$PF@dHrW`6XBe&!>?Wg4;onlLd$G z1-Fs@3@G;IU%+R8KL%x8e&O(Jlu6260?IsW0HvK5ff{@%DD5qR6jAR7!>1|r74TNl zFJSTS0B;A6fu(DedMnrf?*V@Xirl=7e}WG={AW=5e;$LE@lH9cfHK~9g2Ml>!+!@y zNI#cC@_i4u32cL+XZO4GUxT8D{{>2a*Hh@3;6dQPYS=K=;h3GMS2%*T+ zE^rF;K(f?_L6MWc0k?zaz$|>bK}1u{fER;zI=mMYd-Vl}k2w6E!(V_bxjL852yOwV zK@Su;`UEKR@Kq31QU3(Wyq(3Oiyc`D%KGo)-^JjY!3)59Kq+@0DCNEhG6m`A7EtE-E{6|*B9Gq%WqzK<P=jYNnZmyglU%3F^ZO^@KJf2A8OPNu%BA2zQ2I9u z-VA;S6nXz4DC4>WWfz=w*a9X0UQp)y>!7srbBF6#RB8VxDD(FQP}=`Ecp>;T@VVf( zL8<58Kv{>&ud_Jqu;K7-5Y<;-1Et=_K&kh_9ag_Kfl|-);N@ToybQbpl=eOXUIcy~ zly&?oP{w@;7UpsdH`zh(7c2PoeUfuc8&!}oz#kbV#pIr%mydj124KL<5wwbS z`4}kc@aN!8@NrP)dGrQbZZ9bH2Ve>OH29m~m%#JEuQ>b$DD(IoP{#W>cma6cE?eIf zpv>o1Q1sx%;L|{P<}Dcc5*~TPHk^c>0sS7d0LgO>6hpG6+4CV@PC!*i`jkLlfU-yW zzs4nGtj~dtLtk>=YTyjS(ABG=5Mry|54{e$6}lTb8@daUN7hUpk*)VYPlsLuJqwcO0q7Dalmw5+usrXD zHbRJH{=C?|i5|Wdx)b_C=p9h@?B?a!&>l$SL!Mda^U#ze3eQJ)#|)|)A(0Vz?tw%e z#-W!%w?OZM0_alcbI^w Vz6dMWf0=sxJvkUWQ=H$hvW%b+(ypMo$sMs|M(%$^r! zFQDw-pMlPT+K@aI3q}Xmy7zq!Q}7sc0dxSm0+QzsEU3>q6nMFNe;fD~=%X(EMTY{S zKj%RgLp!0%A$dLqc~A>_1@tcH1JKQo4>h2J(Cyb}6-=#9|*kUYcCl~4(KCnV2d z=zfR`-N>B?bx*8;2lK9P;(2sRAmj+QQ(O&H9 zq&+tm#i?JVWUSkXuTKQ&Y$>IxGUZ8BW~WNMb?@JE;Lua4yd;(DuFCaLvmK_vTWt^ zFuA3?W%K`Ir?mE})p%@+HqUgDw41&j+cFcRCc{q>odhTSlCq4O#=96djW5T@po%qa z+1!^gO)VGycLm8@=q>7?m85aIB4W+Eo<977!#Y`PrQU+{q3Wex-_A-#-cw2R?P(X6 zpLoUAGo_MNcORNYr7E*Q>Q~Y>y48%TW)5W0vO@H@SjNsp&Nw-mbM`RW+07YSsUNy3 zmzje-hNUwJPH0S_p1SQkXLX;HF?8xK_V(n)>80blMsKeMiT2|-il_9z=w!ICLtVp! zq<-A;!fw-JxHjl^EA}f(ijP1|o( zd_A=OOoh6uU$?#8a@Fln1Eb>$Yt~%bZZ%rbiPp7hAeqv;?KsT)EneKhlul_iwCljI zj%u~UPj%FWYC85>b$>(+9a=WW)jO=R7O-$W#j1%;7w3E?t9osocdZ&9D~r7MX+>?X zwOdxYE65b(cBt(^82WYQw;=n4uX9XrAX6pZmS2iuu9;cl6veGbTZ*@M@cbp zW}0;D*Mo$`HQkuT5Qx5yF2IKvxXGD`nC4`pq^8r8{ zy5h0x3{+YEWLTPK6$Yv$lNB_Zel=hNVCflAA_FoRc^}}Pi;^^GRbs#Cx6-A#vA;}a z%WL}T`b8=iYbJw;k*Xl}t0TIso9!f(Ey$nuTO(>$)EZ0?+o~TYDJv-BUC7UA)ThCnjaehrGueIRfT1`x}^5x1MAG05hz_A8=sWf8XMob64$2jty>JAysXGM zF*YvsO^l7LRNq$NnOup(w6;=9qf*6|iHS`UN{r7k%HPQ|@;0UQ3^I_g&sWM;@J42* z^xA=B?FKz?%?Q>cLuM_j))if@q`vMtQ^V>@WNl>FDLJKI61B=zf2LipV}guk45faO zmW|vt1B9|w9~M19Y}Gz*2FqNDTD35!q>1q{^s$2rgZ*=IIX1$$-&UpvuNl;cdo5T{ z`KOVkpXR*!RG+U=tBrOQ^5MW>7?kEny0eF-r$VpCdCs^`5hsCKe4?aXS4 zN43-tZ(V_9(z1+Aba-0r<_w0ctBpfV2A)}JeZsTtdpH)k&e~$?ka*Wv;JJ2;4e~pN zu~ThvuTV#v0mTNg--T6?nNt4MnqRSeM~b^6duz4@XP$djuCRx8$q~C_+QV~F)=}CN zLwjO2z}uc_2VqqX3RtEVmO5{>4{w#-dbPZDKgAqNwd`e91kO-2ER@AP~Dx1f?H=PYL-(^Nc>BiJ8y5TRL zh~g@Tb4twmr<~FI)_eq?S&u=ytvbJv8Q^LEmDaMFYJx_*ucod zXfn9W_mPnin{~Y1oYS??t0!U_+SC)I8)n3l=-E&^8AV+*MlD%v&P1V_!7}0TI$33t zcgvP#u&YJYs`JaTkET&G8dk{e++u)M;4L<CwmiuqVbs6KT)z&@<&}##8ch=4)(B{(sm3P^@lzEB zA;K()d9(`NtW{#oy+%W24n30Gm6l5xD#YgD-_H7ppD0#nYNd5rb_Mlld8?FmUUkp< z>ap_pin)_3_b9Am*}p<3{JUr_;D)>FL6fD!K$TXtL2J0p}8(q!HG`9woBM z#af0D2E`~OnRbc?veVPhu(df^25wq4kV^wLaeFD2mmy0WeHJWRCzi-=q4}r0S@DqI z#t?hes@ zq(^Ev0)9*N$ujaN!f7*SWv}koz2ltpw3lihgNERRoV^vEL)IDNs3_<7>SM!$o%dIE z-kUAI8MU~2WKHZX1XCoEuZ-_zZzdP@$Z;x;rMsoK6$WD=sWoRmQc;z%YYg{*7;rNy4p=geCtZ{z^s>3DN%t^eS*1_Q?U8KEyk#kHkLV3Dmgj$j4>}AqPln zSfl_vg{CO!Zl-uMS1lQ?VVOtA!-cN&=1$sH8hfI~GWd)ypG>+~lOqAwp@mxfIqa)i!O9y?4LX`I>^`Kh5zFkkshodPBS)D7fRyz&CWM{qA9*N?5>A=m0%QxVg zirp^n;%;b4kB^RxmdD1*qZ4{;Y--c^deWmXmJj;#<`S&K2h-;A_?RBuHnnNO^6le# zrhJ$!Bf;5_JIuXuPC67|z7ky9?G2JUNymAQuEmu4Cq)tpHsL%RbmpzFV z^iYlPlrNfsAN54cZkja2E5cOJlZM29O!z1729clt^Imj~(}aJPYoarazn)?4BAl14 zW+CwNYwAwdXjYj0p5PBbmb#7ols$8c%GKBtF^+q(H2!0FO~_+e-aG_kcui!YKW`xl zbo3`;OeF%;un`~=04kd;qQMPIPXwsYV+rkabyq&*L7+l+moWB^1O14*B#8r+y|}^I zyg?X9i}8{xW9i4Tks$8AP~UPF?{dK)H``sjn2;5zJK@Eu`-g+f zKwrMG?=WpZD8IC-`Nuw5anCOYO?eC zF?K8TQyURlDc=rM!a}xV&gDspK_S-*8xtZ_UrSEokYi1ITQspDBlk%oj}74oH{?E{ zpcO=V+Vw>?u{u}Fr+Z>UW}*K1cDZNta;RoPgQ-c^KOjdR7Z$n3P!$gj##Eib(462C7jK@s0t7*L0korwl-p9a&j~Xs~)Q=%P9kiCqZ+Y`X zqzEEqR!TSG)AN2RA*7_ixpMwAI~wCAR49W>PhlctKVBL@I^vc`4rk>;0Eq~7m3Uim zF^M2`1}9BagTBInICce;R$r(mzO?#+g>ciV3h6STrywNuv`Tj3P_S=Z9lK1xlDJeR z&fU`PqDv-|s8sb-%&I-9z?3VxLdo91)R{|U0jUhLz!cuRh>|P^_7>(#dxjHwc;bs=Pit4?QD+yc?ImTLBmF@(bIwrx@LEwt=#kkdSEQPog zcRo#O=g*iDXE)S7@s;y4AN!TfmW{Gt2~#i3B3Dd7^HeBtZyV9?)Z1?c)DdgnF~~JP z%py$on{3VIH0gMXs?~8UWv?L6)V)oJRLM|~D{gvws}1E+T+bW#zu@9|*%8(3d=dxB z`q3%i)zAp}{RX>d(RlXfCW?_}%(D#73lk?0XXYmaWUotF)&9(B6gH&t{<&?AIWY(H zRrQmtke@qnRc6Pvny&T~>F%xBJdk;}H5-9qpQQ;L>eHAQGE%dFaU7FhN%-oh*>9NC z>1@=6t!~t5CBdw6>j{jHM6;Y8;E)ueS)6kDiHM@584lAj1@qYgxR$K^I)zn8YsWVT zPZt8N8_@Y!H?Rr~;_H_%g05U)H;sC~NM6=CvHGQ?#+_2t2i5R3n5{NP85uZTB6)5=W4N(?#{1cBjqE}cf=6;LOYoN(Q48-J)a9p z7Y|FRVT;9-n#8cJva%&Z7Dru#C2Pe>hunvWm^BuS z;YhOn^(cpJ)M-OM{;uxJ;0osh>HSlvukQ$4z^-H7SMUXu3*J2m=FNqT<4iSAu9BD8 z;G`!0N+H0PNlSNp@64>d;k{Lr=!)(YO61YKLT|c*d#JkR+{4L)B{jO`3{_ctb{pH{ z0xRG5wFLLd63p{ecKD(W`++*lQAF&5SbiJdBfJ+&42K1BMTqf+dI!*}zu9kDP zKD&elm(-bSA4=9SiA(wV87$G>B^55w5Lm=M=(^vOjYZj0q;+=W`arZ4&8%YJC7+)# zbPn;^a`nUxvt^W+rn7y4mZGS@V`F#e?TN1XdcLfWs%W)z^#$}Yeu$s9M${ttb)ITU;MRU|J zDFTbxA)^ymv~k5of}`TIyvA|1UZe>t+S7q7D&f#J?o7ZXm;@I&u^6*2HptwFFx@u7 zSVjqz*_upzQ3OQJ>dcDsu~FLY5TlrOnYD&Q8TmPK|1cvA%ZRa!Ic5#HLjmDN*(HEH zwD(kN=tLA(uAyzTK?a-mp>6xnRl^b;lLPjUjZT`Wa;43wrYAVrzihG8n6%g@Mwtt* z4N^An8kdbyW>ZPOdg7GsbkjLs$u_PCFjW1rG|W+mYZrSG%KRK0pZwIv+GEJ^yeX9n zFQFsHtDKp!PD7y_vS$O34I(xilQ^RDtFRQWuCi84fY}ZSh7q#ln%I7KAk5bYA> zEBK7V;>VcdKetaPg*ovX(ry)<7X_x6xhCjLfpZ7s*KJ}$ z^UHU|D$9@cv9GFa&SVZcF--H-Buxm@9^7X9dVHE6BBD)ZVqB^0G)o+)W(){NNC{%v nLaY{PiDB9_-D~z7qOz=F7rp#0*90!@j%{l&fy-h5tEB!H4RaJ{ literal 0 HcmV?d00001 diff --git a/opcodes/po/da.po b/opcodes/po/da.po index 253f228..6211457 100644 --- a/opcodes/po/da.po +++ b/opcodes/po/da.po @@ -9,9 +9,10 @@ msgstr "" "Project-Id-Version: opcodes 2.20.90\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" "POT-Creation-Date: 2010-11-05 11:32+0100\n" -"PO-Revision-Date: 2011-01-26 09:35+0100\n" +"PO-Revision-Date: 2011-04-21 09:35+0100\n" "Last-Translator: Keld Simonsen \n" "Language-Team: Danish \n" +"Language: da\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=iso-8859-1\n" "Content-Transfer-Encoding: 8bit\n" @@ -30,12 +31,11 @@ msgstr "Ugyldig limm-reference i sidste instruktion!\n" #: arc-opc.c:386 msgid "unable to fit different valued constants into instruction" -msgstr "" +msgstr "kunne ikke få konstant med forskellig værdi ned i instruktion" #: arc-opc.c:395 -#, fuzzy msgid "auxiliary register not allowed here" -msgstr "indeksregistret er i indlæsningsintervallet" +msgstr "ydre register ikke tilladt her" #: arc-opc.c:401 arc-opc.c:418 msgid "attempt to set readonly register" @@ -56,25 +56,24 @@ msgstr "for mange lange konstanter" #: arc-opc.c:668 msgid "too many shimms in load" -msgstr "" +msgstr "for mange shimms i indlæsning" #. Do we have a limm already? #: arc-opc.c:781 msgid "impossible store" -msgstr "" +msgstr "umulig gemning" #: arc-opc.c:814 msgid "st operand error" -msgstr "" +msgstr "fejl ved st-operand" #: arc-opc.c:818 arc-opc.c:860 msgid "address writeback not allowed" -msgstr "" +msgstr "tilbageskrivning af adresse ikke tilladt" #: arc-opc.c:822 -#, fuzzy msgid "store value must be zero" -msgstr "umiddelbar værdi skal være lige" +msgstr "gemningsværdi skal være nul" #: arc-opc.c:847 msgid "invalid load/shimm insn" @@ -82,27 +81,27 @@ msgstr "" #: arc-opc.c:856 msgid "ld operand error" -msgstr "fejl bed ld-operand" +msgstr "fejl ved ld-operand" #: arc-opc.c:943 msgid "jump flags, but no .f seen" -msgstr "" +msgstr "hoppeflag, men ingen .f set" #: arc-opc.c:946 msgid "jump flags, but no limm addr" -msgstr "" +msgstr "hoppeflag, men ingen limm-adresse" #: arc-opc.c:949 msgid "flag bits of jump address limm lost" -msgstr "" +msgstr "flagbit tabt for hoppeadresse-limm" #: arc-opc.c:952 msgid "attempt to set HR bits" -msgstr "" +msgstr "forsøg på at sætte HR-bit" #: arc-opc.c:955 msgid "bad jump flags value" -msgstr "" +msgstr "dårlig værdi på hoppeflag" #: arc-opc.c:988 msgid "branch address not on 4 byte boundary" @@ -110,7 +109,7 @@ msgstr "" #: arc-opc.c:1024 msgid "must specify .jd or no nullify suffix" -msgstr "" +msgstr "skal angive .jd eller intet nulstil-suffiks" #: arm-dis.c:1990 msgid "" @@ -343,9 +342,8 @@ msgid "missing `]'" msgstr "manglende ']'" #: frv-asm.c:611 frv-asm.c:621 -#, fuzzy msgid "Special purpose register number is out of range" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "Specialformåls registernummer er uden for intervallet" #: frv-asm.c:908 msgid "Value of A operand must be 0 or 1" @@ -390,40 +388,40 @@ msgid "" msgstr "" #: i386-dis.c:10968 -#, fuzzy, c-format +#, c-format msgid "" "\n" "The following i386/x86-64 specific disassembler options are supported for use\n" "with the -M switch (multiple options should be separated by commas):\n" msgstr "" "\n" -"Følgende ARM-specifikke disassembleralternativ understøttes for brug\n" -"sammen med flaget -M:\n" +"De følgende i386/x86-64-specifikke disassembleralternativer understøttes for brug\n" +"sammen med flaget -M (flere alternativer bør adskilles med komma):\n" #: i386-dis.c:10972 #, c-format msgid " x86-64 Disassemble in 64bit mode\n" -msgstr "" +msgstr " x86-64 Disassemble i 64bit-tilstand\n" #: i386-dis.c:10973 #, c-format msgid " i386 Disassemble in 32bit mode\n" -msgstr "" +msgstr " i386 Disassemble i 32bit-tilstand\n" #: i386-dis.c:10974 #, c-format msgid " i8086 Disassemble in 16bit mode\n" -msgstr "" +msgstr " i8086 Disassemble i 16bit-tilstand\n" #: i386-dis.c:10975 #, c-format msgid " att Display instruction in AT&T syntax\n" -msgstr "" +msgstr " att Vís instruktion i AT&T-syntaks\n" #: i386-dis.c:10976 #, c-format msgid " intel Display instruction in Intel syntax\n" -msgstr "" +msgstr " intel Vís instruktion i Intel-syntaks\n" #: i386-dis.c:10977 #, c-format @@ -442,27 +440,27 @@ msgstr "" #: i386-dis.c:10981 #, c-format msgid " addr64 Assume 64bit address size\n" -msgstr "" +msgstr " addr64 Antag 64bit-adressestørrelse\n" #: i386-dis.c:10982 #, c-format msgid " addr32 Assume 32bit address size\n" -msgstr "" +msgstr " addr32 Antag 32bit-adressestørrelse\n" #: i386-dis.c:10983 #, c-format msgid " addr16 Assume 16bit address size\n" -msgstr "" +msgstr " addr16 Antag 16bit-adressestørrelse\n" #: i386-dis.c:10984 #, c-format msgid " data32 Assume 32bit data size\n" -msgstr "" +msgstr " data32 Antag 32bit-datastørrelse\n" #: i386-dis.c:10985 #, c-format msgid " data16 Assume 16bit data size\n" -msgstr "" +msgstr " data16 Antag 16bit-datastørrelse\n" #: i386-dis.c:10986 #, c-format @@ -472,7 +470,7 @@ msgstr "" #: i386-gen.c:459 ia64-gen.c:307 #, c-format msgid "%s: Error: " -msgstr "" +msgstr "%s: Fejl: " #: i386-gen.c:591 #, c-format @@ -480,9 +478,9 @@ msgid "%s: %d: Unknown bitfield: %s\n" msgstr "" #: i386-gen.c:593 -#, fuzzy, c-format +#, c-format msgid "Unknown bitfield: %s\n" -msgstr "Ukendt fejl %d\n" +msgstr "Ukendt bitfelt: %s\n" #: i386-gen.c:649 #, c-format @@ -527,7 +525,7 @@ msgstr "" #: ia64-gen.c:320 #, c-format msgid "%s: Warning: " -msgstr "" +msgstr "%s: Advarsel: " #: ia64-gen.c:506 ia64-gen.c:737 #, c-format @@ -623,51 +621,47 @@ msgstr "" #: ia64-gen.c:2497 #, c-format msgid "opcode %s has no class (ops %d %d %d)\n" -msgstr "" +msgstr "opcode %s har ingen klasse (ops %d %d %d)\n" #. We've been passed a w. Return with an error message so that #. cgen will try the next parsing option. #: ip2k-asm.c:81 msgid "W keyword invalid in FR operand slot." -msgstr "" +msgstr "W-nøgleord ugyldigt i FR operandplads." #. Invalid offset present. #: ip2k-asm.c:106 -#, fuzzy msgid "offset(IP) is not a valid form" -msgstr "afsæt ikke et produkt af 4" +msgstr "afsæt(IP) er ikke en gyldig form" #. Found something there in front of (DP) but it's out #. of range. #: ip2k-asm.c:154 -#, fuzzy msgid "(DP) offset out of range." -msgstr "værdien er uden for intervallet" +msgstr "(DP) afset uden for intervallet" #. Found something there in front of (SP) but it's out #. of range. #: ip2k-asm.c:195 -#, fuzzy msgid "(SP) offset out of range." -msgstr "værdien er uden for intervallet" +msgstr "(SP) afset uden for intervallet" #: ip2k-asm.c:211 msgid "illegal use of parentheses" -msgstr "" +msgstr "forkert brug af parenteser" #: ip2k-asm.c:218 -#, fuzzy msgid "operand out of range (not between 1 and 255)" -msgstr "operanden uden for intervallet (%lu ikke mellem 0 og %lu)" +msgstr "operand uden for intervallet (ikke mellem 1 og 255)" #. Something is very wrong. opindex has to be one of the above. #: ip2k-asm.c:242 msgid "parse_addr16: invalid opindex." -msgstr "" +msgstr "parse_addr16: ugyldigt opindeks." #: ip2k-asm.c:296 msgid "Byte address required. - must be even." -msgstr "" +msgstr "Byte-adresse krævet. - skal være lige." #: ip2k-asm.c:305 msgid "cgen_parse_address returned a symbol. Literal required." @@ -675,42 +669,39 @@ msgstr "" #: ip2k-asm.c:360 msgid "percent-operator operand is not a symbol" -msgstr "" +msgstr "percent-operator operand er ikke et symbol" #: ip2k-asm.c:413 msgid "Attempt to find bit index of 0" -msgstr "" +msgstr "Forsøg på at finde bit-indeks på 0" #: iq2000-asm.c:112 iq2000-asm.c:142 -#, fuzzy msgid "immediate value cannot be register" -msgstr "umiddelbar værdi skal være lige" +msgstr "umiddelbar værdi kan ikke være register" #: iq2000-asm.c:123 iq2000-asm.c:153 lm32-asm.c:70 -#, fuzzy msgid "immediate value out of range" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "umiddelbar værdi uden for interval" #: iq2000-asm.c:182 -#, fuzzy msgid "21-bit offset out of range" -msgstr "værdien er uden for intervallet" +msgstr "21-bits afsæt er uden for interval" #: lm32-asm.c:166 msgid "expecting gp relative address: gp(symbol)" -msgstr "" +msgstr "forventet gp relativ adresse: gp(symbol)" #: lm32-asm.c:196 msgid "expecting got relative address: got(symbol)" -msgstr "" +msgstr "forventet got relativ adresse: got(symbol)" #: lm32-asm.c:226 msgid "expecting got relative address: gotoffhi16(symbol)" -msgstr "" +msgstr "forventet got relativ adresse: gotoffhi16(symbol)" #: lm32-asm.c:256 msgid "expecting got relative address: gotofflo16(symbol)" -msgstr "" +msgstr "forventet got relativ adresse: gotofflo16(symbol)" #: m10200-dis.c:158 m10300-dis.c:582 #, c-format @@ -718,14 +709,13 @@ msgid "unknown\t0x%04lx" msgstr "ukendt\t0x%04lx" #: m10200-dis.c:328 -#, fuzzy, c-format +#, c-format msgid "unknown\t0x%02lx" -msgstr "ukendt\t0x%02x" +msgstr "ukendt\t0x%02lx" #: m32c-asm.c:117 -#, fuzzy msgid "imm:6 immediate is out of range" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "imm:6 umiddelbar værdi er uden for interval" #: m32c-asm.c:145 #, c-format @@ -733,19 +723,16 @@ msgid "%dsp8() takes a symbolic address, not a number" msgstr "" #: m32c-asm.c:159 m32c-asm.c:163 m32c-asm.c:253 -#, fuzzy msgid "dsp:8 immediate is out of range" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "dsp:8 umiddelbar værdi er uden for interval" #: m32c-asm.c:184 m32c-asm.c:188 -#, fuzzy msgid "Immediate is out of range -8 to 7" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "umiddelbar værdi er uden for interval -8 til 7" #: m32c-asm.c:209 m32c-asm.c:213 -#, fuzzy msgid "Immediate is out of range -7 to 8" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "umiddelbar værdi er uden for interval -7 til 8" #: m32c-asm.c:281 #, c-format @@ -753,57 +740,48 @@ msgid "%dsp16() takes a symbolic address, not a number" msgstr "" #: m32c-asm.c:305 m32c-asm.c:312 m32c-asm.c:373 -#, fuzzy msgid "dsp:16 immediate is out of range" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "dsp:16 umiddelbar værdi er uden for interval" #: m32c-asm.c:399 -#, fuzzy msgid "dsp:20 immediate is out of range" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "dsp:20 umiddelbar værdi er uden for interval" #: m32c-asm.c:425 m32c-asm.c:445 -#, fuzzy msgid "dsp:24 immediate is out of range" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "dsp:24 umiddelbar værdi er uden for interval" #: m32c-asm.c:478 -#, fuzzy msgid "immediate is out of range 1-2" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "umiddelbar værdi er uden for interval 1-2" #: m32c-asm.c:496 -#, fuzzy msgid "immediate is out of range 1-8" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "umiddelbar værdi er uden for interval 1-8" #: m32c-asm.c:514 -#, fuzzy msgid "immediate is out of range 0-7" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "umiddelbar værdi er uden for interval 0-7" #: m32c-asm.c:550 -#, fuzzy msgid "immediate is out of range 2-9" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "umiddelbar værdi er uden for interval 2-9" #: m32c-asm.c:568 msgid "Bit number for indexing general register is out of range 0-15" msgstr "" #: m32c-asm.c:606 m32c-asm.c:662 -#, fuzzy msgid "bit,base is out of range" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "bit,base er uden for interval" #: m32c-asm.c:613 m32c-asm.c:618 m32c-asm.c:666 -#, fuzzy msgid "bit,base out of range for symbol" -msgstr "værdien er uden for intervallet" +msgstr "bit,base er uden for interval for symbol" #: m32c-asm.c:802 msgid "not a valid r0l/r0h pair" -msgstr "" +msgstr "ikke et gyldigt r0l/r0h-par" #: m32c-asm.c:832 msgid "Invalid size specifier" @@ -820,61 +798,56 @@ msgid "\n" msgstr "\n" #: m88k-dis.c:679 -#, fuzzy, c-format +#, c-format msgid "# " -msgstr "# " +msgstr "# " #: mep-asm.c:129 msgid "Only $tp or $13 allowed for this opcode" -msgstr "" +msgstr "Kun $tp eller $13 tilladt for denne opcode" #: mep-asm.c:143 msgid "Only $sp or $15 allowed for this opcode" -msgstr "" +msgstr "Kun $tp eller $15 tilladt for denne opcode" #: mep-asm.c:308 mep-asm.c:504 #, c-format msgid "invalid %function() here" -msgstr "" +msgstr "ugyldig %function() her" #: mep-asm.c:336 -#, fuzzy msgid "Immediate is out of range -32768 to 32767" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "umiddelbar værdi er uden for intervallet -32768 to 32767" #: mep-asm.c:356 -#, fuzzy msgid "Immediate is out of range 0 to 65535" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "umiddelbar værdi er uden for intervallet 0 to 65535" #: mep-asm.c:549 mep-asm.c:562 -#, fuzzy msgid "Immediate is out of range -512 to 511" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "umiddelbar værdi er uden for intervallet -512 to 511" #: mep-asm.c:554 mep-asm.c:563 -#, fuzzy msgid "Immediate is out of range -128 to 127" -msgstr "umiddelbar værdi er uden for intervallet" +msgstr "umiddelbar værdi er uden for intervallet -128 to 127" #: mep-asm.c:558 -#, fuzzy msgid "Value is not aligned enough" -msgstr "forskydningsværdien ligger ikke på lige adresse" +msgstr "værdien ligger ikke på tilstrækkeligt lige adresse" #: mips-dis.c:841 msgid "# internal error, incomplete extension sequence (+)" msgstr "" #: mips-dis.c:975 -#, fuzzy, c-format +#, c-format msgid "# internal error, undefined extension sequence (+%c)" -msgstr "# intern fejl, ukendt modifikator(%c)" +msgstr "# intern fejl, udefineret udvidelsessekvens (+%c)" #: mips-dis.c:1335 -#, fuzzy, c-format +#, c-format msgid "# internal error, undefined modifier (%c)" -msgstr "# intern fejl, ukendt modifikator(%c)" +msgstr "# intern fejl, ukendt modifikator (%c)" #: mips-dis.c:1939 #, c-format @@ -882,15 +855,15 @@ msgid "# internal disassembler error, unrecognised modifier (%c)" msgstr "# intern disassembler-fejl, ukendt modifikator (%c)" #: mips-dis.c:2177 -#, fuzzy, c-format +#, c-format msgid "" "\n" "The following MIPS specific disassembler options are supported for use\n" "with the -M switch (multiple options should be separated by commas):\n" msgstr "" "\n" -"Følgende ARM-specifikke disassembleralternativ understøttes for brug\n" -"sammen med flaget -M:\n" +"Følgende MIPS-specifikke disassemblervalgmuligheder understøttes for brug\n" +"sammen med flaget -M (flere valg bør adskilles med komma):\n" #: mips-dis.c:2181 #, c-format @@ -992,9 +965,8 @@ msgid "Illegal as 2-op instr" msgstr "" #: mt-asm.c:110 mt-asm.c:190 -#, fuzzy msgid "Operand out of range. Must be between -32768 and 32767." -msgstr "operanden uden for intervallet (%lu ikke mellem 0 og %lu)" +msgstr "operanden uden for intervallet. Skal være mellem -32768 og 32767." #: mt-asm.c:149 msgid "Biiiig Trouble in parse_imm16!" @@ -1021,17 +993,17 @@ msgstr "$" #: ppc-dis.c:234 #, c-format msgid "warning: ignoring unknown -M%s option\n" -msgstr "" +msgstr "advarsel: ignorerer ukendt -M%s valgmulighed\n" #: ppc-dis.c:523 -#, fuzzy, c-format +#, c-format msgid "" "\n" "The following PPC specific disassembler options are supported for use with\n" "the -M switch:\n" msgstr "" "\n" -"Følgende ARM-specifikke disassembleralternativ understøttes for brug\n" +"Følgende PPC-specifikke disassemblervalgmuligheder understøttes for brug\n" "sammen med flaget -M:\n" #: ppc-opc.c:878 ppc-opc.c:906 @@ -1044,11 +1016,11 @@ msgstr "fors #: ppc-opc.c:940 msgid "invalid mask field" -msgstr "" +msgstr "ugyldigt maskefelt" #: ppc-opc.c:966 msgid "ignoring invalid mfcr mask" -msgstr "" +msgstr "ignorerer ugyldig mfcr-maske" #: ppc-opc.c:1016 ppc-opc.c:1051 msgid "illegal bitmask" @@ -1060,7 +1032,7 @@ msgstr "indeksregistret er i indl #: ppc-opc.c:1187 msgid "source and target register operands must be different" -msgstr "" +msgstr "kilde- og mål-registeroperander skal være forskellige" #: ppc-opc.c:1202 msgid "invalid register operand when updating" @@ -1068,39 +1040,37 @@ msgstr "ugyldig registeroperand ved opdatering" #: ppc-opc.c:1281 msgid "invalid sprg number" -msgstr "" +msgstr "ugyldigt sprg-nummer" #: ppc-opc.c:1451 -#, fuzzy msgid "invalid constant" -msgstr "ugyldigt betinget flag" +msgstr "ugyldig konstant" #: s390-dis.c:301 -#, fuzzy, c-format +#, c-format msgid "" "\n" "The following S/390 specific disassembler options are supported for use\n" "with the -M switch (multiple options should be separated by commas):\n" msgstr "" "\n" -"Følgende ARM-specifikke disassembleralternativ understøttes for brug\n" -"sammen med flaget -M:\n" +"Følgende S/390-specifikke disassembleralternativer understøttes for brug\n" +"sammen med flaget -M (flere valg bør adskilles med komma):\n" #: s390-dis.c:305 #, c-format msgid " esa Disassemble in ESA architecture mode\n" -msgstr "" +msgstr " esa Disassemblér i ESA-arkitektur tilstand\n" #: s390-dis.c:306 #, c-format msgid " zarch Disassemble in z/Architecture mode\n" -msgstr "" +msgstr " zarch Disassemblér i Z/arkitektur tilstand\n" #: score-dis.c:662 score-dis.c:869 score-dis.c:1030 score-dis.c:1144 #: score-dis.c:1151 score-dis.c:1158 score7-dis.c:694 score7-dis.c:857 -#, fuzzy msgid "" -msgstr "" +msgstr "" #: sparc-dis.c:283 #, c-format @@ -1128,9 +1098,9 @@ msgid "unknown operand shift: %x\n" msgstr "ukendt operandskiftning: %x\n" #: v850-dis.c:377 -#, fuzzy, c-format +#, c-format msgid "unknown reg: %d\n" -msgstr "ukendt pop-register: %d\n" +msgstr "ukendt reg: %d\n" #. The functions used to insert and extract complicated operands. #. Note: There is a conspiracy between these functions and @@ -1170,33 +1140,32 @@ msgid "invalid register for stack adjustment" msgstr "ugyldigt register for stakjustering" #: v850-opc.c:518 -#, fuzzy msgid "invalid register name" -msgstr "Forkert registernavn" +msgstr "Ugyldigt registernavn" #: xc16x-asm.c:66 msgid "Missing '#' prefix" -msgstr "" +msgstr "Mangler '#'-prefiks" #: xc16x-asm.c:82 msgid "Missing '.' prefix" -msgstr "" +msgstr "Mangler '.'-prefiks" #: xc16x-asm.c:98 msgid "Missing 'pof:' prefix" -msgstr "" +msgstr "Mangler 'pof:'-prefiks" #: xc16x-asm.c:114 msgid "Missing 'pag:' prefix" -msgstr "" +msgstr "Mangler 'pag:'-prefiks" #: xc16x-asm.c:130 msgid "Missing 'sof:' prefix" -msgstr "" +msgstr "Mangler 'sof:'-prefiks" #: xc16x-asm.c:146 msgid "Missing 'seg:' prefix" -msgstr "" +msgstr "Mangler 'seg:'-prefiks" #: xstormy16-asm.c:71 msgid "Bad register in preincrement" diff --git a/opcodes/po/de.gmo b/opcodes/po/de.gmo new file mode 100644 index 0000000000000000000000000000000000000000..acd983f25e6427c1252ef5c52275a7edee3f35a5 GIT binary patch literal 16919 zcmd6udyr&TUB^$9huaB(ghzPiB+D=}yVFh2>}InWHcMt_9~pKxJIwB8LjvsH?!MD~ zGu^j4_uift8bdHZ5>Sa!Qe~U>Zic(fp>xJXDRg#@Xx_#gJ-W& z>LxG*cYz-OcY}Wqj)2d*S}BH7uL9{p9RsfeUk6?e-U~9cdI)?0_->0I0%ZxG1YZPx z-adaDd?C+20Qsk`VG=Tr9sGF-xF3{pUk5%Hd;q)_{AKW^;CWEme-V5>_+3!iUHP1t zeq$h0S2N(t!Mng6;Qin=;0M4Q_)+j6_-Sw&d@h6S1YZkEy9dBA@cp37{|n$G_+4-u zEIu!$TM695^P`}w|Fhur;6H&vr)M#!j61=fQSjBE%r^pMo{xY-;A7x+@DrfS)>hdzrgQ+r`V+Xz*`~4pMW0+zX3in%-p~?BJ@84 zeha(@Y_s_Hf?o$&l6nV1{3`H+;9l@wK;gd;Hc#Z^94PB~1iT7-56D0D1b;3E{}vQI z_DxXu{QDM%A-a6O9Ta{j+2{K}q1)R*S?2{%*8M3^>V3n0e;P!W{n!KU24_LphX?q> z($o{6(D6$kOH==9-(Sllgs+Z(EJeKml=VFbO8*}RbKuv(v*5SE*MoCRO4j>3AX89Z z0e6AVgo%VdromglbD+@aJ@)yF;2xe|L}Qk&=0M?}dqLr|-vg!nmqC%I{{Usa*TJ+h z&sT$Nv2rXv01AD66Qrv80?0pgIg=6G56Zgk0U2673i40=DSzbqWe{s0xEs6)yazlA zJ`M^!zX!^Eu40l>zW{2`0bc{&Z}Bfc>G$OZw{ zfXBi6KzaXX{J8~u8bs6J5m44w1D_4P8$=Y;`$1XPr$Fid-$5B~m_^(S9tCB+4}wD1 z-v?#?zhxH^AqC9|Nxj{{|F#d<(n`e1P(Nid-v{Uodyr0dSha zG}Vt$Rw*(cS+nfR6_iIP$tAQpNBKF*-IRwYPo>E9Vv4L`fg-eBro4@^NV%UP*9_%$ z$~}}Chbb?V2YbB{e7e1VC;0Oe;Sb^2?UXsnTPSh~UuCatJj_yl zky59eq3ox;hO(Q|riiR3m(R`HDTgR6$}Wo7s3nT%4!J~DucACx9=P5?5k8koQ-lX! zO8E)OgA}=%l*1H6*7y{{pLbCzlq%&QWrA`oCAo&Uc^74jawp|=6uDjsty+3ME z;6Ud78Qhf1u6|%yjxHw~Be+X}ICdG6n-A z*KFYVk)EC{>cFjfVdMtd)YDG6+zcu*->4}w>UV`Lx9rV(EWruNH7|0@Q9E!8n>9J; z&O7aTG^tBYNV}%5OP=opE4t*$coi>n!q9D$>TacA$U5H&lGz`a$xbAm{o&cU9+TFc znN1y-8Eis+yWs|2IUcpT`KU*FkNU$5J18A$ODP?C?c%LxwxC09+qP|x??<;$@X%%( zB_wnFitfE(o3YHgy%h1tjMa-6T`Vnw_NLBYgLYF)<+=rWYVLTl>*Xx>1|2=HLDt)$ ztCzf}mJ@N#)1HTNZ4!3x?)&)6?8zUd^PF^UbWz&59%&$TUaQ{GPhqXuu2+yd9l9+i za6}W8R&=@9XgJ|0v)QiqA&%M&f@UzOhl+cb_wx>w;Re1_?_R8_G^X2r;FgAh!@-UD?S zB~vmpdfC48!+teXoLJtrZAaT*@S98i4mH$lxzGg7Y;NEoNZ~gl?dWi&QEJxJP&la% z#k4W^XPm%Cg-vQTa&UH3H|OU=H`2{EWnKr4Uv&#=UFournT4~PY5mV`tM}+tJy8Ko%xvl zA_wKnbVB~^&nbv#NY=3-GT>CD61ZWgi_1gHLODx@QWKJgsMx6}avQA(`=Z%S7>~7p z?y?Z8s17(4UB*B#dAKJWmEocHP$g$Rd5wl!@!(jvfE9(ZAoC%$W7Kao!w41&+=lB% z8@~qFo1P!V1gZlobne(i1n{I6V32fPH`-w&GUG0~enA~<`oocy_3Iji)x^qbMQ_&? zx8<@Tzr4cKbGE8*To6X0lMHEc>edFAc~CRc!eM67;u2VTL+Fv2=}DnNx#`c>y>b*9 z^#R4hW;;MusA3!DvYmAH?2`LnIDOYp_S*bFOt3<2QeQt5UO%RX zwiou+mlMo%Yn%3Ksc*j7^e}jfWQ+tmEhqJDO+R08OYLeEtz{%=Byz(jZ}_|6!MuKT zROAWvR>z!@TVKD==jN7&dw)s!-7xKKO(NXF6x9RwH~_cq^Xx^ zx+Sycs5-yXRO23%+(4aN@grwBF$#@IAl4ZouBWpWA>-X8_E8qT zu2$EgFbFt{U3FHWBX$Mbg?3n~dDyg4+p8OY6+ZG&FX^Z~>Q=B&gVwFO5jvy_d!lM% z+HKK$(qggU4A=tJ6&Bc{-{4AtbxRStl*JXMIL5xGPIU0<53F#S_$r=aO~l zu-=RcDz$q-7?ed78HH{2M!B{S%H}y8eJ@rKcOQknRC9gZmc{FxqF2za)@4v4ni-v- z&kYrBD2Bs*-WLi5KEc`LS~|Hl+RCfqDI_0I&dmxDhq0K+OB0V7yUx;#kv2{$bz%NX zsot+{*8Z!qBj%zEC&db!6}mwL8|UmNV+$dn$Zp^|!lqrHJZI1DJTXdCs;{e4b^Wu# zN$%N>)gl-ZPbu+O3i=o!T7Vaj8Z>3pxNI6WI`OPZxGdu7;HEM$WVTgz%EpSu;cMy% zS^D;`(M8k5f7-NF7r82Zt?SUxdh^OwHxUsL)tFTq^W{L}$u6k$Q{5F)6Y`8-%3ff| zJ!~nnOn4{ejl@~vYutggUE;UnokjTq@hVeI`-Wi&^%*p12Z zIA#ZrAUipE7H0<>z2qk3(E5$iUN=hHjxunQ;#Li^s~9(xCvLcb2`#!o9bObQXC0t0 zzhBr-zAOa@FJEYELI`sRkUZE3BBwewVtmge{2dd&NuLB?1(gbV?Cy1iJF1s~rvc;J zI7Fx&IRQRUs{XX4B2r`{Ck_RS_a7y#(lHZ)CpC>;v(g@Wlq1A@$RNU4t~mi-L3wx# z&LOHY_oHgi+E(9WT#QlGXXfd|&2&&*gukK!m;o`p)e22cFnJfp9n2MdaI;Yi=@Emn zadLv&i2pcq=z82;U-z6oN=SeTb3}W}s*`33d39Lx=EYH7&ZVDP&6aEfFHvUc$&B%c zku{CF%`CsWLiR)KB4tHQ%?8c8*@pZ~C4W2NEGA=;iAZb{>WRYmZlaLluHud36S>(F zr}ERHOG23BJxB;#5ogwn@Dg|A8|-bDY0+A%IhGA4(pcnm%E21l%mS0Y?Pp z6X*JTlBY8`g`D$Cn~Ue=%>Lrzx-B7b7_D81R-;aq;D6EWfth~2_RSX@@k){{V58z} zfdrjCraKDdSP5H?jl`IVSXAAT>%0DDC#+L(%3uL6RXc4Cg|dhH>+Vm=iHQ?bCdsPQ z)*kb#?DZlCTr%7N&tH2iz{haCF(Kq;{d59Q&Ls&zykM&=gRGe&>-=rK)=DC$vsO)} z;Sv@SryIg@jlhp7_f0s+1UNf?@+a^kqGaDZg)D?~_}&Zof6X-*S0^Ap6=BypEQ4z8 zo$p9?44F0Qj@~N{H{;WuY_)0PLk7*trWw3Hxd$G6y^yNhLDX1BSCRk7bLP29Lf|w2E-P}3$xjh&eG8?ZNG{=sMXy} z?qtTCYqHS8=7aVcUF4c%)7)Tz5K@S7+?<6hm>h)7psZ^z`IbfIhgo=x&<$tgP_QIy z8V@e^#HLYtG&Iq^Xu;mC;!Mh>?RrcxO{qx7nWRd|HLKd84zjQl)_d=ySaA5rGr=7v zO=^WRKaaz8NwCC(nl$%v&;(T{AO*M7wf;GYt#6zb~Q1%ehbqSkfQK3#uIqQ+6jpS0?BxyrT zxg~LPN*us;xi)6@ugaka4hkCqF^q*S>eV*kBB>aWLVJ48O6e8o9~zk4QeLy=T%&qC3TXJ7qIVE`claJT1C!L85+icA8uosB&k& zIY(+Va8pg3xhiKyG7_0)Sku>2K1wo#f@!9Sj~gYcu#s6iBLw>7ES`Bjrq1RGCwfn~ zee(|1=bZ*_n53N&OwvyzpM-~C);IwrW@TD(!Xu}U$a%>Pi57{{^wY_fn2v@MEV%s{ z=;HY~*i#KuSIm2&V@!@J78R66oq$XRi+OmVZbT>+b&P7{s>Dq6G7jpfso$|BOPmHE zVn|`!#i~=Q7i_XhmMB(Oh9-VM*6W^&)gaaik(yD~lGXF^UYVe|^SX;a*mcp|Nm?q= zrdUGF%17-ms^{nos`0b={) zErH?dYZuTibrM^mk-Zch^v5Ij6GAMltoUm4&TM|JLwEjHBK?NSWz*p@}q;) zUd0R}ieHjruyLO+q{mWuP4?5QIW`JdRzy)01@X;DdNw~=kXf&yE2|==PJ3QRVay&@ zAPU z_(@33xL-+rFZN1=Nsk&!Dl8&%TxxULgxry46bF3_Z3u(KGe;uZ*hf|+KKfM2{75C< z0uhgmtirEfdR5%gXEYqJvAcnK!{6E9-p3YY5a)}mVNdVNqz)zOOGVw)l0M8ICw+(~ zIFnX@Y?Z*P;;4y(OX{$pvm(%prQ&p=F-$E8F?sEhv^10!nUW(cb_mZnK&}sA zo?`3Ov=Nd7O-7rfro}p(9Xq+T#2LbN_iIdQmj`<(9cDH#?n8C=z9k2UXGOMw1C;nj z$58Q@gNG7FYXKY{*oKpE!`BJPu#hwbRgtSQr8p=sR70m!ga>A+L;^f$A1lgl9tM zG@;4)he>GKeC9z6MC_@`FUlpIX@yr}6l}Pro_H2PY!bw!;a6F49fbEd2N?4XRWpu! zmxfyG9A=3I6Q9W15fO8-Ly1S8CmOI#D<%YE#H!2BL3~%##2`&gvJ=I#p}n$!GKaeJ zR<~4xwGT@yZ`MOD)Uf(i^~jA5RBz8jSGClqyq(_>8FGb27{~VvRBf=%x>wL|$nN=@ zTF8Svy)cuCldL6JQIf30Hk_{e31NCRFgaIgAUW5h!Nv2jdXnTTTOzw1J1VJw3BMKa zyWigV8V^yl>7-_Cu_0*r z;^Sk)&itHO28dsbu4~y{o!>>q9gSI~iYJKnC;H>y*!4%v1hY%&J3r$##$FN{T8JTz zhRls0*C%RuiL4uujL+fQ#+0*oc&eR5o}If+;@JkJ=0%)(?s~I~-Av+EjdLOl#X++< zdy0vXt&naX28Nm*zj&2MNfOeXZbE*Q-AeO^ab~*nHKCdLDM;rvDLxY!t1|;d80voj D-S(Y< literal 0 HcmV?d00001 diff --git a/opcodes/po/es.gmo b/opcodes/po/es.gmo new file mode 100644 index 0000000000000000000000000000000000000000..510536b2eadf02e39d1e09276f48664704e1b30c GIT binary patch literal 25994 zcmc(n3z!^Nb?2|a8?VRa=@&L&mnDxivem7b(Zi#$B&??`uxza)+ZYGiHQhBcEp>Ob ztGXqPfdp6_)+Rg?6Ot^6y@Y@PF9AD=*BD3`g2`eCj}Tx3Ar1-b8e)Inve|4N-?G2| zy|=2XdwNDAeei94KKgf6o%=fX+;h)8b;f`7!c*@xTt9?f0<}*wX45IgJn>vTHRkuu zGKO38G4NXOA@CJ?akep^1g-@;;Lth7yc2vqcpvz}bB#F+J_NoFyy!e*ZUNs5z7_l@ zfB)te8S^&ozX$#*n4E9S2zc5B4o5xS436>qjo^0hVQ?7yM~^Rku`%no-vO%pQIGe5 z z@CD!pLGeEdZUMgqUJ9Ofu`!o{TS2DK)W9L|4d71jm%$z2SHR1`a}bWoZ3ETcSy1En z1#k`c>!9TJIZ*Qbk-tB8r7=`tHha7klpJ3VN-pmQC&51kHGlsKYTn8)Z3JgQRL}f2 zDEa;YNY&=cpyc;sk3UD_>eu-m*LvLL@fJ}1xC2}T{))#>fExezz$?Ii0X4353|8%2 z2ht^T2PnDT3u=5H2c;k11||11sZ@G$8K{2T3`+hnNR{Rdpz8SmD0zOt<3EBL_ev&P zcmpW@H-qAP&_Dl{$1`YLa@zuGJU4^le+{Vq-VbVCKMSf~&-mxh;i2R>3I^cSp!z=x zs$cH`C5OjAjsMRDQ@rCIDXws=ckCo>xKfy$<9*^Dh3;JbemOJ>LYy|6`D; zGUuZ#dcGAL1#k9v52${80@OTw7u5L9D>>W*Zs7hFP~&_jNR{ScFaZDB<0(vn?pJ_X zFFQc-RY2K~w|o2yh-l0|fNJ+5grR=z0G|im>hGJN>bV<~JRk7*xW~Wq_-qEFeq9WT zebiIi$KY5KPbIA2CCk-fvBGO zFetn6RZ#VP-@iYF!g_w8$8k{Y>;}&OZ}M0HCFdBt5_~79aefh0yFUaazZYOc8LHU= zs{aj8cIB5q_2c~@tmX-iKk+z@(Uske_=hPqzX3`=9tS1=CqdP729t}5o6A6r?*J&i z7RZ0*9{y4P{|Hq3UjdnN^AxClzX)R?`5p9F2i4yJ)j5fhfgLK{8dX>X_Jw5@_gn9Nh zx4&-%Q3dlBkDmlp?io;WzI408>p{uy7fy(bZ1BZUjfUZ-LU!`$4VW zFM(PIPlK0&XI|sh!#eQA+}{kUz7BX0d=H4qo4*Go_lx(q_78wV+}FSOa!z0ZNtiywhZl{x!H z#}|SZbN>!d{rxy7J@^i&exG)eThC=s{Wt`wpC14v*KdI0zu=Y5uI~i(yalQs4}s(0 z-+=1>IX64p>Tw2Czup0E1RnvVSI>AXy~@qkVNmVg2dZD+0nY8gBdGVc zdc4cyM?8KFyqx#{42u8KpLcj2_#*C)fRfkS!3)6O2d& zS5%$7jy=8xl-%F!@i)Pja{p0K^Y}$j_52g4`8+Ff>-tJidipBx6j0X==m++f`{y@- z-!9xgi{DQ|PeJRUiy&Q(K`S9dYIRHc-hZi2x_$}L_#cA44QXz&>uvl%4eY*-c`<(r z9flaXc>>b)KcH7ae+B(9^fgHHq3ik3srHwf+mG{m5A+%6wa|B=FG9NZL-#?CL%#=U z&i(?*u3zEDFG7C`eHM~#AS(0w&h5YysbO_R#xgF9q=fM73=ijeDzW^PxPmK95;2QrMGiqWeg__VK&|T2i zp;<`RqtFEON!@V$cSvhlc3amb=$E0lLetQfpm#y%K)U`AdIvNG{YU8MpjSbwpj)B$ zLc0Fi{)x|z5`tX{U_+ZLYG6YfU@i7`LO{y-#_?a z_M#7uaDNB%KIohN-OD}R4{m|(hTiF)Sr{@yL9jbcg7$0_#I1HMZl*yv6(5P#1P6IE z9oOse(OPpRI1<)75$}>HNIR`ooV24VuajWKw*5P#6pMQzYPcI``Q&33S3-)N9TGqtoGC4uD&!b&Ahs_Jh$R*x3D(pFTdP1hJgm{ewK z?Wof3BvE;(B0Hn$uv2eO22){5xwsij)tX^47feNJuUbpPG>sZl^{865Vx4X!S?{;+ zDR#v5e)qop13Ddad$w)+p5=9@*=a;ct>RjpS-RD$2e*1M%`R6Cvqy6|44TDjZaR(} zhE6~Ibj0_wn<#W>sfm)v!e%uXJYh?zOy68;c@)|jB#a)FR-=QZv%E%oC1!?t7xcFM zd$U=u6ty?$+JOaYy^}`4(OP?UNXxlId2TARlc;-d-Fx@!J8&|U52Q&ZVkVdUA31x|<=7LJxXoTtNg}vFgZ^y}WW?3UWuy)<1(UYnDXEW5= zx`~Zzk4q#5AAlT(To~# zvsUR_SxZ%r7coIl4cp%g`iI~X+LsuiQ=Ju5_? zi)EZRbH<6$oU@P7O;FC*Y)5rp2GL1<|o~)J&zW zX>>;?YF46PK5wl(j}YoH(Sl{==ibIPrt0wJlu?rHZL>7 zRYt=GfUT{yQ)#1=?zT#+bK7)1oJny%7Ga57QNmt!TYIjBiv?HO8rwLsI%tQ7_RRnxGkDDFXbOsVK4h6DPo)GC9@BU~er=<(S>RdX+j$r;&Y~7sDxi@Ju(j z(G7UJ%T2T8yeUkYR5clxk)8Wi2l4cD8nuJC15F1EZ6+$4kpqjq@giJpGGVgAT8X5A zM569qmcP5qjE|LM*9Np=Hcxk&&Wcr7_>|jfHrML)Xa@Bw*to*e7W!9{BI()Unp%8o zwNWCATeg*Uh)*lA@!!@VgN|5@=(^tO#x@MT?E2_2_*f-gI8!kiCDqv0Zbyw)8@D__ zU9Aq$L^V1l5ssSeVKu1WS2HA5N4i?gGe^VKA^WPuQtTH$ifi5Y6&o#|ek{qkVQgIWZ5SI{s=h14GqDthZEdNRMpebe z4I9>NFxqk#*|56rtPz+DIP6x@LUu~TENf7noeWkCrz_S3!z;_|fEgmStXf}mv68`- zEw+Z`m&n@4uv>C6xGrv%s?k(uW`>Q)nyZm^l(tLOm^9oLuv*3oTS6C!V$>KA&S&Nx zM~S&MoWj-VTMoDHKelS{o80DD!;x(>t5&WGFip5FCVy03_^1`mOb&P&PY-ySMuT|M zBJXuE+FXw-PS>^0(?(clGsslfT;HtE1(&2PEwxL=HUzwlk0LAawr8c_c3wSS+w-kk zoX>4tvhi-0cDuK^-aqfz6@$Irz)eN%qfyihN^WV$V%fD(Hv6*xPMtVTR;!(+?yJm9 zX0;@v_CTIou>{M6W5N37EjWLow~YfcABVb z^1Ia*$8HYT^F`(^GEwa$tktz?tXjRw=)8=?Dr{A(EcTFgoUGDhSjQmiW9A!~!G22i z)a}^XEN>|Kn|Q04Q=1*?o%hqj)uYb1n?$&@!{j`7N?GJNX>UF{TVr>e>eT8s$cEi* zvbitCTgCrfF7Hg#W(S|a9OM2tNgSv4ti+Kk)E@1Y;L>v=j>@c zZkJ8&$tG!1(N1rjEx#>SW)Cy*$7NA_C=INcOLH_Kf;tse4m*?JEQ|@eE?*L{jaaT& z<|tFSB8xogYxdi-MgL=!Ua}l9Sp2i2vly6;_4zMXA91hzfy;!QV=O%dYqO?{Jq>1Y z2aNWsf)5?sK3v`~nyy;pdAVG6uMTw@t-v0DT!`Gzl{E^DY9@OOLjI!o)Y@ThLZ@&U zIgw^km3id=xSrS+Zk+X`8G-R!nWgC9M_EVBVKsAl$gVL_EE(0eXSEf15iOWRsLcd^pfT z%}jMUxR%A>&II1kH`cw?YC|Qm~&&r zy*+cw(pu!yF+ALV?BL`+Ntmmne7{*7B$FTl53=>Pd=K#pZ8ky!9q=)l^>vJSO zT}|rgh+9vq%`$jdCbKo75hqrp9uF?k8q}dyUb)PKwQxH0TEmg4kv*5xIlvm$a?IwV zP0*R~#&jhK2y7oV*-0Nm(sQq~hIs)?Ul$g z-kLyOIuQ?NVHKiGb}z_Ya3-kMbd1FBb6-dEGQ85sn+fxksNS{dEV84Ow3$EGR5=GK zf0X$)fsOw#xpN$OQDQ3-Vkm3I){JBN>vQG2NInAV@E%UL;h z-A(Hd(WD@32Lv~y!}!OM!PU$-Gi^w!sQmB^P zZ0!{dT3R)nt{Mtktq4aD4}ou7L_Xlgs4xZXS$u!XV)E}!XlND{VV;^*zVHt5mYTEp zO!*L9<{Na3i0bv)^c+zQMX?P}qzp8q7OTXF=}a3Jh@Cf!f&@frQd%_^g*dTwOf`n>&gW*B9<0 zljBybJJ9J~o&>o1go|_*FVg92rQ=&!vephD01p881wT9(Jc+&n}y=-o81qyEXYSWHmR!?&d!;R20 zvzvCGTbpY?NXP^mY>Ui43yjVXn)hoi#`))&i(M66(=PushlpGjZqSM;IXkZgC|~Fr zEqP~-Up6G3;pr&d=y?5D&;9!Dy{nXP09HxD%J_2OGo)#q!}&bvtJd`K0K?PCj`;Rq z&VrWR?CqBS<|KyVi=)|RjNHe_DlhHDIdvP{klB~ShcHs5J=M~UgqPX&Z@x@dOVwR(EhOtVvtlbNA?*B>nHkmFB9 zrJbA-CWGYJKE>@w2p!e1+t;^e=O1bYd&8tX|6nt^Gob%ru(>kbnF+75|CSrawo*ZJrW4LY zrGrt}m<$fILcY(<2AiYws(MX*?y^hEX%_%T*)2C5++CXJ@~OA1vC=L+@##b}8BE~CkvE~7kbUGZC=M+tBP7I(UqMC> zdsDiGeU+WQ!I?s?i$0vsbZWE>7bZn4IO+XKSU;5-mz9aNm!vQPTefS>xH0AXZJCd6n##mS;RaTWPIsf2vjqfR%QJXZD z8>AteoRA2HzLaWD(~4tHV|VSeu*_tLDH-eJTXSh-C(v9l(ql#&^N+gJF@~$5O<@#V z%2;B%OS*+m7(4ks+T^mli>h|$rz{1ZVwSgYe5oH_3`2v(a3F8Q?ni~a<^*&^0Xm<9 zHZ)Kvj^Dk(v(%qfrmV6~lQfb>IRCL&>S>Qxm71IY?rcKS!X&ff6|)IbS+Q=)+3||m z+Ll^+SIlqmk_@qGQqb`Dm5_FvOthtI(g~PRv!iq?Q&L$sCv8CY@t*9W z&gG;M-TbsAO5`Hy$yMv_u-bhIzS}wJu|y=WX`E7#Oh!8g6wB+c71PxQFy>vC*~!w? zmKIem^gSwKd!rwV<*hAUSyAqJeZ>s612xiKh%q$0pF}5lT{~n&lWT+&cA!G^B(n_| zf39>r$!r4{Sq{BPZ9^oWZFa{uEu3x<%svN=EW6EdNV*EYW$F{xB!fHyF7)Yc%Phy7QWMes8ZBP#lHU4?_IFB) zFDqj%*<85GQ{Nb=9aOCv+w?a)cI}(`$iyiZ6_*u?C zX{|9e{}7oup%pF`t~viG8UC?R=A6xhJF!we*KK!LCl{6Klo99L<4Q=pRCAzSyYIeP zX55bAD_C+-blG+lQslOAaKrgFFme*QGi>OL5(hS4ZW`a;&a|Sgad`ocGUxhvMhY#G zI7b4w?WdQcwOhp=DS@tABD}1>4Tk8`>UtY8n=A7VRckZ0az%md-r@45=Owga?nO3wVJjJw<|Bs|w0WxSRA zl%nDgbs#-8ZO`A|6{lRt`uu}BKPnB64PI-x*`9w06+pW=yCu>I&db#r%h&0GVASmJ z33+s$@kY$1(#Gh#&&=CpbMdUiYEAdWfJ2*O4t?4MN5H(e)485By?Al9LcU&XuCrdS zx|Pc!tJZwx{;QLas~HfvAoRnEq9qr9BO0&ty3cC`_7z;|XvLMfoQUo7E8%3_F6^2hXQ&+9KDkY7|vj0?{b=qwXAX=jR#|os< zNzz!XwpxXpdYf?5_)~4brTy6yLADduwJbay5f{mm1c}D@9KmJq6&J8g6OSNOg zLz_jo9B!X8>v z(jhx0&qCalFL^mgyw46Wd?c8^pZvsFc0Fp>Nc?AA4_v4|JMlPN^udJ>)JkUQjPnC{ zXVVq&L`hv7@R0nLg`75hanN%mB@TFQQy2$5xBS?)S-yQHQD+Ko#~+NW1o9)4;J$rl1SAb#dmTCv}@QFtI}$F+?szVt>OK-&5dv8 zy=KsDqJH7CbTE;8e66sayh4y5N&cz+P#~M?o>&24{CSFkwxq7qFz5?`=O_VR%44o2L6Tq2p27>nD=A8snOH_+gG!RfxQvp8ZZ3mc zpYCN(mnj1+H=Mu9NsVcd!fseB4Ev?UshRe3o!~3>BaE^yh?yyEf#a@Lg=5trAYV<} z&<5`WlB`LtCYsd>>miwZ0jXhR9o!`S&CI`bUtz)3WJ95Bp{m{c%f=tIc--^(x0yLk zE{$_JTyzG_M3E_r=4YmrwmI(cm0QivVwd?Y(@y5^w+EE&LDf(sKTOmk1dpZ2G+hfI zwKhAis)wJG=M)KcOpiDV$2JQ*?4UFsr7Aqfjq(0CktuC4l2tMT)eD3Qx5K5 zt&sLwY|T6O9*cS2Pxp;5~_z>`0#siKp)I~({6+JSX1 zU?h`vnT+d~$v82XkJ*r~W}Uqr>*4cj*#MMS>$7XU|4UlW2^7l{ZBMqe%eg(V(k*&S z`fafgqpb2b*jNFD#_ZOEaVR=^-AF7ioT1j?->GnlkA>fk5;xcox#5Qrbo0&I ztM?&?4u?S>Ki~}uZ2kd!hqRXVDhMr+xqJL+@8!rM3(DT@QKP|ZO5lNaoVW{~qmDgvJi1XetT7Trv*4Y}lpxK6iTU?%AibtV? zzE3B1owl-*wOhMIpM`7}`Ly)To-H+e1cD2M`)=^YTs$TpTfJ&rFbC~b?s4~qGRl$WV~;&QxKv}NiGxe_25-|QBgX*&AfJou z_DIqoqeIsC*wAdA-e9*GyTjTrL6$XTSDpXbXfu?x{rLoC6u`z_&{vn8%=sn6!MFLz z{6V}s)+nf)#bGngL1I6lQdzb#Mongb!3J5nau)9@WGvG!%NM$Q?I2q=NN~}RGi7{~ z%sLi}WHR^1X|iNyZ)_Pd3qtwK{E2-boB4!_b<>jv6;o1kUuzxP+ET@oz`UTK!aw9Y z=XuQwTkC6Si~=^d*_j_s)?`n%lqfgsQ=8GBG{z>_^BQ`@!tfsetj}DyT_ndjGqNly zyMh$m%olrEOCVoZ+54q~IFuMpMo>nj{~NSK5N>ZVe@y2+)2~tf_Ul> z5!WL+OS&u}BC|D@6&+H?y>64M4u9@!61k>--fW^m*3$_@O*& z6pU`V{U|%l(~7eo{0WniE?3z9Qvh9u+5I74p%h0+ZA%IQV0j7+qd?i#)|~@yTZUr^G+hrqYsVwbGqY4%1 t4d2e(fb;YSmXZBC6jjZ<6Pv%??G&e|{|CGsB1ZrK literal 0 HcmV?d00001 diff --git a/opcodes/po/es.po b/opcodes/po/es.po index 4c4751a..05ca986 100644 --- a/opcodes/po/es.po +++ b/opcodes/po/es.po @@ -1,23 +1,24 @@ -# Mensajes en español para opcodes-2.20.90. -# Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +# Mensajes en español para opcodes-2.20.90. +# Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. # This file is distributed under the same license as the binutils package. -# Cristian Othón Martínez Vera , 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010. +# Cristian Othón Martínez Vera , 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011. # msgid "" msgstr "" "Project-Id-Version: opcodes 2.20.90\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" "POT-Creation-Date: 2010-11-05 11:32+0100\n" -"PO-Revision-Date: 2010-11-18 11:53-0600\n" -"Last-Translator: Cristian Othón Martínez Vera \n" +"PO-Revision-Date: 2011-08-24 11:53-0500\n" +"Last-Translator: Cristian Othón Martínez Vera \n" "Language-Team: Spanish \n" +"Language: es\n" "MIME-Version: 1.0\n" -"Content-Type: text/plain; charset=ISO-8859-1\n" +"Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" #: alpha-opc.c:155 msgid "branch operand unaligned" -msgstr "operando de ramificación sin alinear" +msgstr "operando de ramificación sin alinear" #: alpha-opc.c:171 alpha-opc.c:187 msgid "jump hint unaligned" @@ -25,28 +26,28 @@ msgstr "pista de salto sin alinear" #: arc-dis.c:77 msgid "Illegal limm reference in last instruction!\n" -msgstr "¡Referencia limm ilegal en la última instrucción!\n" +msgstr "¡Referencia limm ilegal en la última instrucción!\n" #: arc-opc.c:386 msgid "unable to fit different valued constants into instruction" -msgstr "no se pueden ajustar las constantes de valores diferentes en la instrucción" +msgstr "no se pueden ajustar las constantes de valores diferentes en la instrucción" #: arc-opc.c:395 msgid "auxiliary register not allowed here" -msgstr "no se permite un registro auxiliar aquí" +msgstr "no se permite un registro auxiliar aquí" #: arc-opc.c:401 arc-opc.c:418 msgid "attempt to set readonly register" -msgstr "se intentó cambiar un registro de sólo lectura" +msgstr "se intentó cambiar un registro de sólo lectura" #: arc-opc.c:406 arc-opc.c:423 msgid "attempt to read writeonly register" -msgstr "se intentó leer un registro de sólo escritura" +msgstr "se intentó leer un registro de sólo escritura" #: arc-opc.c:428 #, c-format msgid "invalid register number `%d'" -msgstr "número de registro `%d' inválido" +msgstr "número de registro `%d' inválido" #: arc-opc.c:594 arc-opc.c:645 arc-opc.c:673 msgid "too many long constants" @@ -67,7 +68,7 @@ msgstr "error de operando st" #: arc-opc.c:818 arc-opc.c:860 msgid "address writeback not allowed" -msgstr "no se permite la escritura hacia atrás de dirección" +msgstr "no se permite la escritura hacia atrás de dirección" #: arc-opc.c:822 msgid "store value must be zero" @@ -75,7 +76,7 @@ msgstr "el valor de almacenamiento debe ser cero" #: arc-opc.c:847 msgid "invalid load/shimm insn" -msgstr "instrucción load/shimm inválida" +msgstr "instrucción load/shimm inválida" #: arc-opc.c:856 msgid "ld operand error" @@ -87,23 +88,23 @@ msgstr "opciones de salto, pero no se ve .f" #: arc-opc.c:946 msgid "jump flags, but no limm addr" -msgstr "opciones de salto, pero no hay una dirección limm" +msgstr "opciones de salto, pero no hay una dirección limm" #: arc-opc.c:949 msgid "flag bits of jump address limm lost" -msgstr "se perdieron los bits de opción de dirección de salto limm" +msgstr "se perdieron los bits de opción de dirección de salto limm" #: arc-opc.c:952 msgid "attempt to set HR bits" -msgstr "se intentó cambiar los bits HR" +msgstr "se intentó cambiar los bits HR" #: arc-opc.c:955 msgid "bad jump flags value" -msgstr "valor de opciones de salto erróneo" +msgstr "valor de opciones de salto erróneo" #: arc-opc.c:988 msgid "branch address not on 4 byte boundary" -msgstr "la dirección de ramificación no está en un límite de 4 bytes" +msgstr "la dirección de ramificación no está en un límite de 4 bytes" #: arc-opc.c:1024 msgid "must specify .jd or no nullify suffix" @@ -111,7 +112,7 @@ msgstr "se debe especificar un sufijo .jd o no nullify" #: arm-dis.c:1990 msgid "" -msgstr "" +msgstr "" #. XXX - should break 'option' at following delimiter. #: arm-dis.c:4357 @@ -123,7 +124,7 @@ msgstr "No se reconoce el conjunto de nombres de registro: %s\n" #: arm-dis.c:4365 #, c-format msgid "Unrecognised disassembler option: %s\n" -msgstr "No se reconoce la opción de desensamblador: %s\n" +msgstr "No se reconoce la opción de desensamblador: %s\n" #: arm-dis.c:4950 #, c-format @@ -133,7 +134,7 @@ msgid "" "the -M switch:\n" msgstr "" "\n" -"Las siguientes opciones de desensamblador específicas de ARM se admiten\n" +"Las siguientes opciones de desensamblador específicas de ARM se admiten\n" "para usarse con el interruptor -M:\n" #: avr-dis.c:115 avr-dis.c:125 @@ -149,7 +150,7 @@ msgstr "Error interno del desensamblador" #: avr-dis.c:236 #, c-format msgid "unknown constraint `%c'" -msgstr "restricción `%c' desconocida" +msgstr "restricción `%c' desconocida" #: cgen-asm.c:336 fr30-ibld.c:201 frv-ibld.c:201 ip2k-ibld.c:201 #: iq2000-ibld.c:201 lm32-ibld.c:201 m32c-ibld.c:201 m32r-ibld.c:201 @@ -157,12 +158,12 @@ msgstr "restricci #: xstormy16-ibld.c:201 #, c-format msgid "operand out of range (%ld not between %ld and %ld)" -msgstr "operando fuera de rango (%ld no está entre %ld y %ld)" +msgstr "operando fuera de rango (%ld no está entre %ld y %ld)" #: cgen-asm.c:358 #, c-format msgid "operand out of range (%lu not between %lu and %lu)" -msgstr "operando fuera de rango (%lu no está entre %lu y %lu)" +msgstr "operando fuera de rango (%lu no está entre %lu y %lu)" #: d30v-dis.c:255 #, c-format @@ -178,11 +179,11 @@ msgstr "Error desconocido %d\n" #: dis-buf.c:69 #, c-format msgid "Address 0x%s is out of bounds.\n" -msgstr "La dirección 0x%s está fuera de los límites.\n" +msgstr "La dirección 0x%s está fuera de los límites.\n" #: fr30-asm.c:93 m32c-asm.c:872 m32c-asm.c:879 msgid "Register number is not valid" -msgstr "El número de registro no es válido" +msgstr "El número de registro no es válido" #: fr30-asm.c:95 msgid "Register must be between r0 and r7" @@ -194,20 +195,20 @@ msgstr "El registro debe estar entre r8 y r15" #: fr30-asm.c:116 m32c-asm.c:910 msgid "Register list is not valid" -msgstr "La lista de registros no es válida" +msgstr "La lista de registros no es válida" #: fr30-asm.c:310 frv-asm.c:1263 ip2k-asm.c:511 iq2000-asm.c:459 #: lm32-asm.c:349 m32c-asm.c:1584 m32r-asm.c:328 mep-asm.c:1286 mt-asm.c:595 #: openrisc-asm.c:241 xc16x-asm.c:376 xstormy16-asm.c:276 #, c-format msgid "Unrecognized field %d while parsing.\n" -msgstr "No se reconoció el campo %d al decodificar.\n" +msgstr "No se reconoció el campo %d al decodificar.\n" #: fr30-asm.c:361 frv-asm.c:1314 ip2k-asm.c:562 iq2000-asm.c:510 #: lm32-asm.c:400 m32c-asm.c:1635 m32r-asm.c:379 mep-asm.c:1337 mt-asm.c:646 #: openrisc-asm.c:292 xc16x-asm.c:427 xstormy16-asm.c:327 msgid "missing mnemonic in syntax string" -msgstr "falta el mnemónico en la cadena sintáctica" +msgstr "falta el mnemónico en la cadena sintáctica" #. We couldn't parse it. #: fr30-asm.c:496 fr30-asm.c:500 fr30-asm.c:589 fr30-asm.c:696 frv-asm.c:1449 @@ -223,47 +224,47 @@ msgstr "falta el mnem #: xstormy16-asm.c:462 xstormy16-asm.c:466 xstormy16-asm.c:555 #: xstormy16-asm.c:662 msgid "unrecognized instruction" -msgstr "no se reconoce la instrucción" +msgstr "no se reconoce la instrucción" #: fr30-asm.c:543 frv-asm.c:1496 ip2k-asm.c:744 iq2000-asm.c:692 #: lm32-asm.c:582 m32c-asm.c:1817 m32r-asm.c:561 mep-asm.c:1519 mt-asm.c:828 #: openrisc-asm.c:474 xc16x-asm.c:609 xstormy16-asm.c:509 #, c-format msgid "syntax error (expected char `%c', found `%c')" -msgstr "error sintáctico (se esperaba el carácter `%c', se encontró `%c')" +msgstr "error sintáctico (se esperaba el carácter `%c', se encontró `%c')" #: fr30-asm.c:553 frv-asm.c:1506 ip2k-asm.c:754 iq2000-asm.c:702 #: lm32-asm.c:592 m32c-asm.c:1827 m32r-asm.c:571 mep-asm.c:1529 mt-asm.c:838 #: openrisc-asm.c:484 xc16x-asm.c:619 xstormy16-asm.c:519 #, c-format msgid "syntax error (expected char `%c', found end of instruction)" -msgstr "error sintáctico (se esperaba el carácter `%c', se encontró el final de la instrucción)" +msgstr "error sintáctico (se esperaba el carácter `%c', se encontró el final de la instrucción)" #: fr30-asm.c:583 frv-asm.c:1536 ip2k-asm.c:784 iq2000-asm.c:732 #: lm32-asm.c:622 m32c-asm.c:1857 m32r-asm.c:601 mep-asm.c:1559 mt-asm.c:868 #: openrisc-asm.c:514 xc16x-asm.c:649 xstormy16-asm.c:549 msgid "junk at end of line" -msgstr "basura al final de la línea" +msgstr "basura al final de la línea" #: fr30-asm.c:695 frv-asm.c:1648 ip2k-asm.c:896 iq2000-asm.c:844 #: lm32-asm.c:734 m32c-asm.c:1969 m32r-asm.c:713 mep-asm.c:1671 mt-asm.c:980 #: openrisc-asm.c:626 xc16x-asm.c:761 xstormy16-asm.c:661 msgid "unrecognized form of instruction" -msgstr "no se reconoce la forma de instrucción" +msgstr "no se reconoce la forma de instrucción" #: fr30-asm.c:709 frv-asm.c:1662 ip2k-asm.c:910 iq2000-asm.c:858 #: lm32-asm.c:748 m32c-asm.c:1983 m32r-asm.c:727 mep-asm.c:1685 mt-asm.c:994 #: openrisc-asm.c:640 xc16x-asm.c:775 xstormy16-asm.c:675 #, c-format msgid "bad instruction `%.50s...'" -msgstr "instrucción errónea `%.50s...'" +msgstr "instrucción errónea `%.50s...'" #: fr30-asm.c:712 frv-asm.c:1665 ip2k-asm.c:913 iq2000-asm.c:861 #: lm32-asm.c:751 m32c-asm.c:1986 m32r-asm.c:730 mep-asm.c:1688 mt-asm.c:997 #: openrisc-asm.c:643 xc16x-asm.c:778 xstormy16-asm.c:678 #, c-format msgid "bad instruction `%.50s'" -msgstr "instrucción errónea `%.50s'" +msgstr "instrucción errónea `%.50s'" #. Default text to print if an instruction isn't recognized. #: fr30-dis.c:41 frv-dis.c:41 ip2k-dis.c:41 iq2000-dis.c:41 lm32-dis.c:41 @@ -277,63 +278,63 @@ msgstr "*desconocida*" #: openrisc-dis.c:135 xc16x-dis.c:420 xstormy16-dis.c:168 #, c-format msgid "Unrecognized field %d while printing insn.\n" -msgstr "No se reconoció el campo %d al mostrar insn.\n" +msgstr "No se reconoció el campo %d al mostrar insn.\n" #: fr30-ibld.c:164 frv-ibld.c:164 ip2k-ibld.c:164 iq2000-ibld.c:164 #: lm32-ibld.c:164 m32c-ibld.c:164 m32r-ibld.c:164 mep-ibld.c:164 #: mt-ibld.c:164 openrisc-ibld.c:164 xc16x-ibld.c:164 xstormy16-ibld.c:164 #, c-format msgid "operand out of range (%ld not between %ld and %lu)" -msgstr "operando fuera de rango (%ld no está entre %ld y %lu)" +msgstr "operando fuera de rango (%ld no está entre %ld y %lu)" #: fr30-ibld.c:185 frv-ibld.c:185 ip2k-ibld.c:185 iq2000-ibld.c:185 #: lm32-ibld.c:185 m32c-ibld.c:185 m32r-ibld.c:185 mep-ibld.c:185 #: mt-ibld.c:185 openrisc-ibld.c:185 xc16x-ibld.c:185 xstormy16-ibld.c:185 #, c-format msgid "operand out of range (0x%lx not between 0 and 0x%lx)" -msgstr "operando fuera de rango (0x%lu no está entre 0 y %lx)" +msgstr "operando fuera de rango (0x%lu no está entre 0 y %lx)" #: fr30-ibld.c:727 frv-ibld.c:853 ip2k-ibld.c:604 iq2000-ibld.c:710 #: lm32-ibld.c:631 m32c-ibld.c:1728 m32r-ibld.c:662 mep-ibld.c:1205 #: mt-ibld.c:746 openrisc-ibld.c:630 xc16x-ibld.c:749 xstormy16-ibld.c:675 #, c-format msgid "Unrecognized field %d while building insn.\n" -msgstr "No se reconoció el campo %d al construir insn.\n" +msgstr "No se reconoció el campo %d al construir insn.\n" #: fr30-ibld.c:932 frv-ibld.c:1170 ip2k-ibld.c:679 iq2000-ibld.c:885 #: lm32-ibld.c:735 m32c-ibld.c:2889 m32r-ibld.c:799 mep-ibld.c:1804 #: mt-ibld.c:966 openrisc-ibld.c:730 xc16x-ibld.c:969 xstormy16-ibld.c:821 #, c-format msgid "Unrecognized field %d while decoding insn.\n" -msgstr "No se reconoció el campo %d al decodificar insn.\n" +msgstr "No se reconoció el campo %d al decodificar insn.\n" #: fr30-ibld.c:1078 frv-ibld.c:1448 ip2k-ibld.c:753 iq2000-ibld.c:1016 #: lm32-ibld.c:824 m32c-ibld.c:3506 m32r-ibld.c:912 mep-ibld.c:2274 #: mt-ibld.c:1166 openrisc-ibld.c:807 xc16x-ibld.c:1190 xstormy16-ibld.c:931 #, c-format msgid "Unrecognized field %d while getting int operand.\n" -msgstr "No se reconoció el campo %d al obtener el operando int.\n" +msgstr "No se reconoció el campo %d al obtener el operando int.\n" #: fr30-ibld.c:1206 frv-ibld.c:1708 ip2k-ibld.c:809 iq2000-ibld.c:1129 #: lm32-ibld.c:895 m32c-ibld.c:4105 m32r-ibld.c:1007 mep-ibld.c:2726 #: mt-ibld.c:1348 openrisc-ibld.c:866 xc16x-ibld.c:1393 xstormy16-ibld.c:1023 #, c-format msgid "Unrecognized field %d while getting vma operand.\n" -msgstr "No se reconoció el campo %d al obtener el operando vma.\n" +msgstr "No se reconoció el campo %d al obtener el operando vma.\n" #: fr30-ibld.c:1337 frv-ibld.c:1975 ip2k-ibld.c:868 iq2000-ibld.c:1249 #: lm32-ibld.c:973 m32c-ibld.c:4692 m32r-ibld.c:1108 mep-ibld.c:3139 #: mt-ibld.c:1537 openrisc-ibld.c:932 xc16x-ibld.c:1597 xstormy16-ibld.c:1122 #, c-format msgid "Unrecognized field %d while setting int operand.\n" -msgstr "No se reconoció el campo %d al establecer el operando int.\n" +msgstr "No se reconoció el campo %d al establecer el operando int.\n" #: fr30-ibld.c:1458 frv-ibld.c:2232 ip2k-ibld.c:917 iq2000-ibld.c:1359 #: lm32-ibld.c:1041 m32c-ibld.c:5269 m32r-ibld.c:1199 mep-ibld.c:3542 #: mt-ibld.c:1716 openrisc-ibld.c:988 xc16x-ibld.c:1791 xstormy16-ibld.c:1211 #, c-format msgid "Unrecognized field %d while setting vma operand.\n" -msgstr "No se reconoció el campo %d al establecer el operando vma.\n" +msgstr "No se reconoció el campo %d al establecer el operando vma.\n" #: frv-asm.c:608 msgid "missing `]'" @@ -341,7 +342,7 @@ msgstr "falta un `]'" #: frv-asm.c:611 frv-asm.c:621 msgid "Special purpose register number is out of range" -msgstr "El número de registro de propósito especial está fuera de rango" +msgstr "El número de registro de propósito especial está fuera de rango" #: frv-asm.c:908 msgid "Value of A operand must be 0 or 1" @@ -349,7 +350,7 @@ msgstr "El valor del operando A debe ser 0 o 1" #: frv-asm.c:944 msgid "register number must be even" -msgstr "el número de registro debe ser par" +msgstr "el número de registro debe ser par" #. -- assembler routines inserted here. #. -- asm.c @@ -393,8 +394,8 @@ msgid "" "with the -M switch (multiple options should be separated by commas):\n" msgstr "" "\n" -"Se admiten las siguientes opciones de desensamblador específicas de i386/x86-64\n" -"con el interruptor -M (las opciones múltiples se deben separar con comas):\n" +"Se admiten las siguientes opciones de desensamblador específicas de i386/x86-64\n" +"con el interruptor -M (las opciones múltiples se deben separar con comas):\n" #: i386-dis.c:10972 #, c-format @@ -428,7 +429,7 @@ msgid "" " Display instruction in AT&T mnemonic\n" msgstr "" " att-mnemonic\n" -" Muestra las instrucciones con mnemónicos AT&T\n" +" Muestra las instrucciones con mnemónicos AT&T\n" #: i386-dis.c:10979 #, c-format @@ -437,37 +438,37 @@ msgid "" " Display instruction in Intel mnemonic\n" msgstr "" " intel-mnemonic\n" -" Muestra las instrucciones con mnemónicos Intel\n" +" Muestra las instrucciones con mnemónicos Intel\n" #: i386-dis.c:10981 #, c-format msgid " addr64 Assume 64bit address size\n" -msgstr " addr64 Asume un tamaño de dirección de 64bit\n" +msgstr " addr64 Asume un tamaño de dirección de 64bit\n" #: i386-dis.c:10982 #, c-format msgid " addr32 Assume 32bit address size\n" -msgstr " addr32 Asume un tamaño de dirección de 32bit\n" +msgstr " addr32 Asume un tamaño de dirección de 32bit\n" #: i386-dis.c:10983 #, c-format msgid " addr16 Assume 16bit address size\n" -msgstr " addr16 Asume un tamaño de dirección de 16bit\n" +msgstr " addr16 Asume un tamaño de dirección de 16bit\n" #: i386-dis.c:10984 #, c-format msgid " data32 Assume 32bit data size\n" -msgstr " data32 Asume un tamaño de datos de 32bit\n" +msgstr " data32 Asume un tamaño de datos de 32bit\n" #: i386-dis.c:10985 #, c-format msgid " data16 Assume 16bit data size\n" -msgstr " data16 Asume un tamaño de datos de 16bit\n" +msgstr " data16 Asume un tamaño de datos de 16bit\n" #: i386-dis.c:10986 #, c-format msgid " suffix Always display instruction suffix in AT&T syntax\n" -msgstr " suffix Siempre muestra el sufijo de instrucción con sintaxis AT&T\n" +msgstr " suffix Siempre muestra el sufijo de instrucción con sintaxis AT&T\n" #: i386-gen.c:459 ia64-gen.c:307 #, c-format @@ -532,7 +533,7 @@ msgstr "%s: Aviso: " #: ia64-gen.c:506 ia64-gen.c:737 #, c-format msgid "multiple note %s not handled\n" -msgstr "no se maneja la nota múltiple %s\n" +msgstr "no se maneja la nota múltiple %s\n" #: ia64-gen.c:617 msgid "can't find ia64-ic.tbl for reading\n" @@ -549,8 +550,8 @@ msgid "" "most recent format '%s'\n" "appears more restrictive than '%s'\n" msgstr "" -"el formato más reciente '%s'\n" -"parece más restrictivo que '%s'\n" +"el formato más reciente '%s'\n" +"parece más restrictivo que '%s'\n" #: ia64-gen.c:1054 #, c-format @@ -565,12 +566,12 @@ msgstr "se sobreescribe la nota %d con la nota %d (IC:%s)\n" #: ia64-gen.c:1456 #, c-format msgid "don't know how to specify %% dependency %s\n" -msgstr "no se sabe cómo especificar la dependencia %% %s\n" +msgstr "no se sabe cómo especificar la dependencia %% %s\n" #: ia64-gen.c:1478 #, c-format msgid "Don't know how to specify # dependency %s\n" -msgstr "No se sabe cómo especificar la dependencia # %s\n" +msgstr "No se sabe cómo especificar la dependencia # %s\n" #: ia64-gen.c:1517 #, c-format @@ -615,28 +616,28 @@ msgstr "el rsrc %s (%s) no tiene registros\n" #: ia64-gen.c:2455 #, c-format msgid "IC note %d in opcode %s (IC:%s) conflicts with resource %s note %d\n" -msgstr "la nota IC %d en el código de operación %s (IC:%s) tiene conflictos con el recurso %s nota %d\n" +msgstr "la nota IC %d en el código de operación %s (IC:%s) tiene conflictos con el recurso %s nota %d\n" #: ia64-gen.c:2483 #, c-format msgid "IC note %d for opcode %s (IC:%s) conflicts with resource %s note %d\n" -msgstr "la nota IC %d para el código de operación %s (IC:%s) tiene conflictos con el recurso %s nota %d\n" +msgstr "la nota IC %d para el código de operación %s (IC:%s) tiene conflictos con el recurso %s nota %d\n" #: ia64-gen.c:2497 #, c-format msgid "opcode %s has no class (ops %d %d %d)\n" -msgstr "el código de operación %s no tiene clase (ops %d %d %d)\n" +msgstr "el código de operación %s no tiene clase (ops %d %d %d)\n" #. We've been passed a w. Return with an error message so that #. cgen will try the next parsing option. #: ip2k-asm.c:81 msgid "W keyword invalid in FR operand slot." -msgstr "la palabra clave W es inválida en la ranura del operando FR." +msgstr "la palabra clave W es inválida en la ranura del operando FR." #. Invalid offset present. #: ip2k-asm.c:106 msgid "offset(IP) is not a valid form" -msgstr "offset(IP) no es una forma válida" +msgstr "offset(IP) no es una forma válida" #. Found something there in front of (DP) but it's out #. of range. @@ -652,32 +653,32 @@ msgstr "desplazamiento (SP) fuera de rango." #: ip2k-asm.c:211 msgid "illegal use of parentheses" -msgstr "uso ilegal de paréntesis" +msgstr "uso ilegal de paréntesis" #: ip2k-asm.c:218 msgid "operand out of range (not between 1 and 255)" -msgstr "operando fuera de rango (no está entre 1 y 255)" +msgstr "operando fuera de rango (no está entre 1 y 255)" #. Something is very wrong. opindex has to be one of the above. #: ip2k-asm.c:242 msgid "parse_addr16: invalid opindex." -msgstr "parse_addr16: índice de operador inválido." +msgstr "parse_addr16: índice de operador inválido." #: ip2k-asm.c:296 msgid "Byte address required. - must be even." -msgstr "Se requiere una dirección de byte. - debe ser par." +msgstr "Se requiere una dirección de byte. - debe ser par." #: ip2k-asm.c:305 msgid "cgen_parse_address returned a symbol. Literal required." -msgstr "cgen_parse_address devolvió un símbolo. Se requiere una literal." +msgstr "cgen_parse_address devolvió un símbolo. Se requiere una literal." #: ip2k-asm.c:360 msgid "percent-operator operand is not a symbol" -msgstr "el operando operador-porcentaje no es un símbolo" +msgstr "el operando operador-porcentaje no es un símbolo" #: ip2k-asm.c:413 msgid "Attempt to find bit index of 0" -msgstr "Se intentó encontrar un índice de bit de 0" +msgstr "Se intentó encontrar un índice de bit de 0" #: iq2000-asm.c:112 iq2000-asm.c:142 msgid "immediate value cannot be register" @@ -685,7 +686,7 @@ msgstr "el valor inmediato no puede ser un registro" #: iq2000-asm.c:123 iq2000-asm.c:153 lm32-asm.c:70 msgid "immediate value out of range" -msgstr "el valor inmediato está fuera de rango" +msgstr "el valor inmediato está fuera de rango" #: iq2000-asm.c:182 msgid "21-bit offset out of range" @@ -693,19 +694,19 @@ msgstr "desplazamiento de 21-bit fuera de rango" #: lm32-asm.c:166 msgid "expecting gp relative address: gp(symbol)" -msgstr "se espera una dirección relativa a gp: gp(símbolo)" +msgstr "se espera una dirección relativa a gp: gp(símbolo)" #: lm32-asm.c:196 msgid "expecting got relative address: got(symbol)" -msgstr "se espera una dirección relativa a got: got(símbolo)" +msgstr "se espera una dirección relativa a got: got(símbolo)" #: lm32-asm.c:226 msgid "expecting got relative address: gotoffhi16(symbol)" -msgstr "se espera una dirección relativa a got: gotoffhi16(símbolo)" +msgstr "se espera una dirección relativa a got: gotoffhi16(símbolo)" #: lm32-asm.c:256 msgid "expecting got relative address: gotofflo16(symbol)" -msgstr "se espera una dirección relativa a got: gotofflo16(símbolo)" +msgstr "se espera una dirección relativa a got: gotofflo16(símbolo)" #: m10200-dis.c:158 m10300-dis.c:582 #, c-format @@ -719,87 +720,87 @@ msgstr "desconocido\t0x%02lx" #: m32c-asm.c:117 msgid "imm:6 immediate is out of range" -msgstr "el inmediato imm:6 está fuera de rango" +msgstr "el inmediato imm:6 está fuera de rango" #: m32c-asm.c:145 #, c-format msgid "%dsp8() takes a symbolic address, not a number" -msgstr "%dsp8() toma una dirección simbólica, no un número" +msgstr "%dsp8() toma una dirección simbólica, no un número" #: m32c-asm.c:159 m32c-asm.c:163 m32c-asm.c:253 msgid "dsp:8 immediate is out of range" -msgstr "el inmediato dsp:8 está fuera de rango" +msgstr "el inmediato dsp:8 está fuera de rango" #: m32c-asm.c:184 m32c-asm.c:188 msgid "Immediate is out of range -8 to 7" -msgstr "El inmediato está fuera del rango -8 a 7" +msgstr "El inmediato está fuera del rango -8 a 7" #: m32c-asm.c:209 m32c-asm.c:213 msgid "Immediate is out of range -7 to 8" -msgstr "El inmediato está fuera del rango -7 a 8" +msgstr "El inmediato está fuera del rango -7 a 8" #: m32c-asm.c:281 #, c-format msgid "%dsp16() takes a symbolic address, not a number" -msgstr "%dsp16() toma una dirección simbólica, no un número" +msgstr "%dsp16() toma una dirección simbólica, no un número" #: m32c-asm.c:305 m32c-asm.c:312 m32c-asm.c:373 msgid "dsp:16 immediate is out of range" -msgstr "el inmediato dsp:16 está fuera de rango" +msgstr "el inmediato dsp:16 está fuera de rango" #: m32c-asm.c:399 msgid "dsp:20 immediate is out of range" -msgstr "el inmediato dsp:20 está fuera de rango" +msgstr "el inmediato dsp:20 está fuera de rango" #: m32c-asm.c:425 m32c-asm.c:445 msgid "dsp:24 immediate is out of range" -msgstr "el inmediato dsp:24 está fuera de rango" +msgstr "el inmediato dsp:24 está fuera de rango" #: m32c-asm.c:478 msgid "immediate is out of range 1-2" -msgstr "el inmediato está fuera del rango 1-2" +msgstr "el inmediato está fuera del rango 1-2" #: m32c-asm.c:496 msgid "immediate is out of range 1-8" -msgstr "el inmediato está fuera del rango 1-8" +msgstr "el inmediato está fuera del rango 1-8" #: m32c-asm.c:514 msgid "immediate is out of range 0-7" -msgstr "el inmediato está fuera del rango 0-7" +msgstr "el inmediato está fuera del rango 0-7" #: m32c-asm.c:550 msgid "immediate is out of range 2-9" -msgstr "el inmediato está fuera del rango 2-9" +msgstr "el inmediato está fuera del rango 2-9" #: m32c-asm.c:568 msgid "Bit number for indexing general register is out of range 0-15" -msgstr "El número de bit para el registro general de indización está fuera del rango 0-15" +msgstr "El número de bit para el registro general de indización está fuera del rango 0-15" #: m32c-asm.c:606 m32c-asm.c:662 msgid "bit,base is out of range" -msgstr "bit,base está fuera de rango" +msgstr "bit,base está fuera de rango" #: m32c-asm.c:613 m32c-asm.c:618 m32c-asm.c:666 msgid "bit,base out of range for symbol" -msgstr "bit,base está fuera de rango para el símbolo" +msgstr "bit,base está fuera de rango para el símbolo" #: m32c-asm.c:802 msgid "not a valid r0l/r0h pair" -msgstr "no es un par r0l/r0h válido" +msgstr "no es un par r0l/r0h válido" #: m32c-asm.c:832 msgid "Invalid size specifier" -msgstr "Especificador de tamaño inválido" +msgstr "Especificador de tamaño inválido" #: m68k-dis.c:1281 #, c-format msgid "" -msgstr "" +msgstr "" #: m68k-dis.c:1440 #, c-format msgid "\n" -msgstr "\n" +msgstr "\n" #: m88k-dis.c:679 #, c-format @@ -808,45 +809,45 @@ msgstr "# " #: mep-asm.c:129 msgid "Only $tp or $13 allowed for this opcode" -msgstr "Sólo se permite $tp o $13 para este código de operación" +msgstr "Sólo se permite $tp o $13 para este código de operación" #: mep-asm.c:143 msgid "Only $sp or $15 allowed for this opcode" -msgstr "Sólo se permite $sp o $15 para este código de operación" +msgstr "Sólo se permite $sp o $15 para este código de operación" #: mep-asm.c:308 mep-asm.c:504 #, c-format msgid "invalid %function() here" -msgstr "%funcion() inválida aquí" +msgstr "%funcion() inválida aquí" #: mep-asm.c:336 msgid "Immediate is out of range -32768 to 32767" -msgstr "El inmediato está fuera del rango -32768 a 32767" +msgstr "El inmediato está fuera del rango -32768 a 32767" #: mep-asm.c:356 msgid "Immediate is out of range 0 to 65535" -msgstr "El inmediato está fuera del rango 0 a 65535" +msgstr "El inmediato está fuera del rango 0 a 65535" #: mep-asm.c:549 mep-asm.c:562 msgid "Immediate is out of range -512 to 511" -msgstr "El inmediato está fuera del rango -512 a 511" +msgstr "El inmediato está fuera del rango -512 a 511" #: mep-asm.c:554 mep-asm.c:563 msgid "Immediate is out of range -128 to 127" -msgstr "El inmediato está fuera del rango -128 a 127" +msgstr "El inmediato está fuera del rango -128 a 127" #: mep-asm.c:558 msgid "Value is not aligned enough" -msgstr "El valor no está suficientemente alineado" +msgstr "El valor no está suficientemente alineado" #: mips-dis.c:841 msgid "# internal error, incomplete extension sequence (+)" -msgstr "# error interno, secuencia de extensión incompleta (+)" +msgstr "# error interno, secuencia de extensión incompleta (+)" #: mips-dis.c:975 #, c-format msgid "# internal error, undefined extension sequence (+%c)" -msgstr "# error interno, secuencia de extensión sin definir (+%c)" +msgstr "# error interno, secuencia de extensión sin definir (+%c)" #: mips-dis.c:1335 #, c-format @@ -866,8 +867,8 @@ msgid "" "with the -M switch (multiple options should be separated by commas):\n" msgstr "" "\n" -"Las siguientes opciones de desensamblador específicas de MIPS se admiten\n" -"para usarse con el interruptor -M (las opciones múltiples se deben separar con comas):\n" +"Las siguientes opciones de desensamblador específicas de MIPS se admiten\n" +"para usarse con el interruptor -M (las opciones múltiples se deben separar con comas):\n" #: mips-dis.c:2181 #, c-format @@ -889,7 +890,7 @@ msgid "" msgstr "" "\n" " fpr-names=ABI Muestra los nombres FPR de acuerdo a la ABI especificada.\n" -" Por defecto: numérico.\n" +" Por defecto: numérico.\n" #: mips-dis.c:2189 #, c-format @@ -969,12 +970,12 @@ msgstr "" #: mmix-dis.c:35 #, c-format msgid "Bad case %d (%s) in %s:%d\n" -msgstr "Case %d erróneo (%s) en %s:%d\n" +msgstr "Case %d erróneo (%s) en %s:%d\n" #: mmix-dis.c:45 #, c-format msgid "Internal: Non-debugged code (test-case missing): %s:%d" -msgstr "Interno: Código sin depurar (falta el caso de prueba): %s:%d" +msgstr "Interno: Código sin depurar (falta el caso de prueba): %s:%d" #: mmix-dis.c:54 msgid "(unknown)" @@ -987,12 +988,12 @@ msgstr "*tipo de operandos desconocido: %d*" #: msp430-dis.c:328 msgid "Illegal as emulation instr" -msgstr "Instrucción de emulación as ilegal" +msgstr "Instrucción de emulación as ilegal" #. R2/R3 are illegal as dest: may be data section. #: msp430-dis.c:379 msgid "Illegal as 2-op instr" -msgstr "Instrucción 2-op as ilegal" +msgstr "Instrucción 2-op as ilegal" #: mt-asm.c:110 mt-asm.c:190 msgid "Operand out of range. Must be between -32768 and 32767." @@ -1000,15 +1001,15 @@ msgstr "Operando fuera de rango. Debe estar entre -32768 y 32767." #: mt-asm.c:149 msgid "Biiiig Trouble in parse_imm16!" -msgstr "¡Graaaan Problema en parse_imm16!" +msgstr "¡Graaaan Problema en parse_imm16!" #: mt-asm.c:157 msgid "The percent-operator's operand is not a symbol" -msgstr "el operando de operador-porcentaje no es un símbolo" +msgstr "el operando de operador-porcentaje no es un símbolo" #: mt-asm.c:395 msgid "invalid operand. type may have values 0,1,2 only." -msgstr "operando inválid. El tipo sólo puede tener valores 0,1,2." +msgstr "operando inválid. El tipo sólo puede tener valores 0,1,2." #. I and Z are output operands and can`t be immediate #. A is an address and we can`t have the address of @@ -1023,7 +1024,7 @@ msgstr "$" #: ppc-dis.c:234 #, c-format msgid "warning: ignoring unknown -M%s option\n" -msgstr "aviso: se descarta la opción -M%s desconocida\n" +msgstr "aviso: se descarta la opción -M%s desconocida\n" #: ppc-dis.c:523 #, c-format @@ -1033,32 +1034,32 @@ msgid "" "the -M switch:\n" msgstr "" "\n" -"Las siguientes opciones de desensamblador específicas de PPC se admiten con\n" +"Las siguientes opciones de desensamblador específicas de PPC se admiten con\n" "el interruptor -M:\n" #: ppc-opc.c:878 ppc-opc.c:906 msgid "invalid conditional option" -msgstr "opción condicional inválida" +msgstr "opción condicional inválida" #: ppc-opc.c:908 msgid "attempt to set y bit when using + or - modifier" -msgstr "intento de establecer el bit y al usar el modificador + ó -" +msgstr "intento de establecer el bit y al usar el modificador + ó -" #: ppc-opc.c:940 msgid "invalid mask field" -msgstr "campo de máscara inválido" +msgstr "campo de máscara inválido" #: ppc-opc.c:966 msgid "ignoring invalid mfcr mask" -msgstr "se descarta la máscara mfcr inválida" +msgstr "se descarta la máscara mfcr inválida" #: ppc-opc.c:1016 ppc-opc.c:1051 msgid "illegal bitmask" -msgstr "máscara de bits ilegal" +msgstr "máscara de bits ilegal" #: ppc-opc.c:1171 msgid "index register in load range" -msgstr "registro índice en el rango de carga" +msgstr "registro índice en el rango de carga" #: ppc-opc.c:1187 msgid "source and target register operands must be different" @@ -1066,15 +1067,15 @@ msgstr "los operandos de registros fuente y objetivo deben ser diferentes" #: ppc-opc.c:1202 msgid "invalid register operand when updating" -msgstr "operando de registro inválido al actualizar" +msgstr "operando de registro inválido al actualizar" #: ppc-opc.c:1281 msgid "invalid sprg number" -msgstr "número sprg inválido" +msgstr "número sprg inválido" #: ppc-opc.c:1451 msgid "invalid constant" -msgstr "constante inválida" +msgstr "constante inválida" #: s390-dis.c:301 #, c-format @@ -1084,8 +1085,8 @@ msgid "" "with the -M switch (multiple options should be separated by commas):\n" msgstr "" "\n" -"Las siguientes opciones de desensamblador específicas de S/390 se admiten\n" -"para usarse con el interruptor -M (las opciones múltiples se deben\n" +"Las siguientes opciones de desensamblador específicas de S/390 se admiten\n" +"para usarse con el interruptor -M (las opciones múltiples se deben\n" "separar con comas):\n" #: s390-dis.c:305 @@ -1101,22 +1102,22 @@ msgstr " zarch Desensambla en modo de z/Architecture\n" #: score-dis.c:662 score-dis.c:869 score-dis.c:1030 score-dis.c:1144 #: score-dis.c:1151 score-dis.c:1158 score7-dis.c:694 score7-dis.c:857 msgid "" -msgstr "" +msgstr "" #: sparc-dis.c:283 #, c-format msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n" -msgstr "Error interno: sparc-opcode.h erróneo: \"%s\", %#.8lx, %#.8lx\n" +msgstr "Error interno: sparc-opcode.h erróneo: \"%s\", %#.8lx, %#.8lx\n" #: sparc-dis.c:294 #, c-format msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n" -msgstr "Error interno: sparc-opcode.h erróneo: \"%s\", %#.8lx, %#.8lx\n" +msgstr "Error interno: sparc-opcode.h erróneo: \"%s\", %#.8lx, %#.8lx\n" #: sparc-dis.c:344 #, c-format msgid "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n" -msgstr "Error interno: sparc-opcode.h erróneo: \"%s\" == \"%s\"\n" +msgstr "Error interno: sparc-opcode.h erróneo: \"%s\" == \"%s\"\n" #. Mark as non-valid instruction. #: sparc-dis.c:1015 @@ -1140,39 +1141,39 @@ msgstr "registro desconocido: %d\n" #. specific command line option is given to GAS. #: v850-opc.c:55 msgid "displacement value is not in range and is not aligned" -msgstr "el valor de desubicación no está en el rango y no está alineado" +msgstr "el valor de desubicación no está en el rango y no está alineado" #: v850-opc.c:56 msgid "displacement value is out of range" -msgstr "el valor de desubicación está fuera de rango" +msgstr "el valor de desubicación está fuera de rango" #: v850-opc.c:57 msgid "displacement value is not aligned" -msgstr "el valor de desubicación no está alineado" +msgstr "el valor de desubicación no está alineado" #: v850-opc.c:59 msgid "immediate value is out of range" -msgstr "el valor inmediato está fuera de rango" +msgstr "el valor inmediato está fuera de rango" #: v850-opc.c:60 msgid "branch value out of range" -msgstr "el valor de ramificación está fuera de rango" +msgstr "el valor de ramificación está fuera de rango" #: v850-opc.c:61 msgid "branch value not in range and to odd offset" -msgstr "el valor de ramificación no está en rango e indica un desplazamiento impar" +msgstr "el valor de ramificación no está en rango e indica un desplazamiento impar" #: v850-opc.c:62 msgid "branch to odd offset" -msgstr "ramificación a un desplazamiento impar" +msgstr "ramificación a un desplazamiento impar" #: v850-opc.c:497 msgid "invalid register for stack adjustment" -msgstr "registro inválido para el ajuste de la pila" +msgstr "registro inválido para el ajuste de la pila" #: v850-opc.c:518 msgid "invalid register name" -msgstr "nombre de registro inválido" +msgstr "nombre de registro inválido" #: xc16x-asm.c:66 msgid "Missing '#' prefix" @@ -1200,15 +1201,15 @@ msgstr "Falta el prefijo 'seg:'" #: xstormy16-asm.c:71 msgid "Bad register in preincrement" -msgstr "Registro erróneo en el preincremento" +msgstr "Registro erróneo en el preincremento" #: xstormy16-asm.c:76 msgid "Bad register in postincrement" -msgstr "Registro erróneo en el postincremento" +msgstr "Registro erróneo en el postincremento" #: xstormy16-asm.c:78 msgid "Bad register name" -msgstr "Nombre de registro erróneo" +msgstr "Nombre de registro erróneo" #: xstormy16-asm.c:82 msgid "Label conflicts with register name" @@ -1220,7 +1221,7 @@ msgstr "La etiqueta tiene conflictos con `Rx'" #: xstormy16-asm.c:88 msgid "Bad immediate expression" -msgstr "Expresión inmediata errónea" +msgstr "Expresión inmediata errónea" #: xstormy16-asm.c:109 msgid "No relocation for small immediate" @@ -1228,54 +1229,54 @@ msgstr "No hay reubicaciones para inmediatos small" #: xstormy16-asm.c:119 msgid "Small operand was not an immediate number" -msgstr "El operando small no era un número inmediato" +msgstr "El operando small no era un número inmediato" #: xstormy16-asm.c:157 msgid "Operand is not a symbol" -msgstr "El operando no es un símbolo" +msgstr "El operando no es un símbolo" #: xstormy16-asm.c:165 msgid "Syntax error: No trailing ')'" -msgstr "Error sintáctico: No hay ')' al final" +msgstr "Error sintáctico: No hay ')' al final" #~ msgid "branch value not in range and to an odd offset" -#~ msgstr "el valor de ramificación no está en rango e indica un desplazamiento impar" +#~ msgstr "el valor de ramificación no está en rango e indica un desplazamiento impar" #~ msgid "immediate value not in range and not even" -#~ msgstr "el valor inmediato no está en rango y no es par" +#~ msgstr "el valor inmediato no está en rango y no es par" #~ msgid "immediate value must be even" #~ msgstr "el valor inmediato debe ser par" #~ msgid "%operator operand is not a symbol" -#~ msgstr "el operando %operator no es un símbolo" +#~ msgstr "el operando %operator no es un símbolo" #~ msgid "offset not a multiple of 16" -#~ msgstr "el desplazamiento no es un múltiplo de 16" +#~ msgstr "el desplazamiento no es un múltiplo de 16" #~ msgid "offset not a multiple of 2" -#~ msgstr "el desplazamiento no es un múltiplo de 2" +#~ msgstr "el desplazamiento no es un múltiplo de 2" #~ msgid "offset greater than 62" #~ msgstr "el desplazamiento es mayor que 62" #~ msgid "offset not a multiple of 4" -#~ msgstr "el desplazamiento no es un múltiplo de 4" +#~ msgstr "el desplazamiento no es un múltiplo de 4" #~ msgid "offset greater than 124" #~ msgstr "el desplazamiento es mayor que 124" #~ msgid "offset not a multiple of 8" -#~ msgstr "el desplazamiento no es un múltiplo de 8" +#~ msgstr "el desplazamiento no es un múltiplo de 8" #~ msgid "offset greater than 248" #~ msgstr "el desplazamiento es mayor que 248" #~ msgid "offset not between -2048 and 2047" -#~ msgstr "el desplazamiento no está entre -2048 y 2047" +#~ msgstr "el desplazamiento no está entre -2048 y 2047" #~ msgid "offset not between -8192 and 8191" -#~ msgstr "el desplazamiento no está entre -8192 y 8191" +#~ msgstr "el desplazamiento no está entre -8192 y 8191" #~ msgid "ignoring least significant bits in branch offset" #~ msgstr "ignorando los bits menos significativos en el desplazamiento de la rama" diff --git a/opcodes/po/fi.gmo b/opcodes/po/fi.gmo new file mode 100644 index 0000000000000000000000000000000000000000..e7973141b475a051fb354267971ec5542759b30d GIT binary patch literal 26403 zcmc(n378yLb?>i%1l+bU7>uzU+hxmx)^5#=w$WIUt<{!o$rDMoqA13y>8_bB^-@h& z)ktmQ#B6a4!NCynVjfNi5dln`K=2cJEJ;9NOPmCUYzDG`fyZMB`9fYomha>J&Rwdj zd%8y>K|cD^>3>(<{oHfUJ@?!*`n!vs^=8HA8_vrD^{u)>skPt{a5?y9@O<$1!3)7Bz-z!SfYP7u zfvdrhE0rpNw}aP$uLem{?*`8UKM7s{eimfN>Wdct6Fisai?33OuBxj*dA<&0sA?y8 z5qJcI)hY&=67>Km^*;j2xISdlzYOwE{RdxEtuFISJsUw-t`2}wt^qP+^*ZqR;JZM{ z|3Ppw_!RgO@RF;QS^;hWnL-tU1@IN%4)Eu}?ckH(O7LQsBjvV&(%&j594)USfV-;*F! ztIvSKzwcQ5Q5u(iU21W)#hn%pgVK+eflI+RS^N+v<9{050RAT^<66UDrJcPXT~aRt zg|BZ0WqiK_ihO(l6uzHNr6MOQK!ne(!jOP$2`R@UxzrO~`y#665{ra|je*rIrkE5Um-Uv$ntDyAj zmqFpfhd~+tUx2cXz72|eJ&VqG;1!^>w*{2<6;Sfs3-V9BkuRC2-vgzdzX2uxcR;2} zU5c>C`z_!oc*x>wLFvbbK$(ZX2W5Ph6b)_!*YSK9lyN=;Ql)wv^uT|xcn*^w&)0ym zUbcghuMCR*_yvm}17VH&f1tE`70i%+Z3iy|UuvJ5pw#mKDExf4#ZOxNip6I#80pv5 zpyb~Hio8_7=Yg-V&u;{UZ@&#nd!GWI2R;o7|NjLPxjr9Zkp5l;3jg+jB3H*jsrNw; z(NpgMMQ{8$DD{2Srk_J$d4HwFaZuXX1)c{Uv{(j(&k=YX_z)=L{1Z^x{RSxfdp=5( zp{mWG^uGa$Uin#2`tc5stm+Ai-?KQ5(iOcM@Wqs>w}2uap9F>fUj(I|^O#&jT&)0Q zeEUJk*8=&cUdxyC{|`WE|4EQ3S6>IE-!Dd42>%XPtb@|uSA!eD$H8;Ke*~WmeiytD z6k!v59w_BKQ200jN_+c353GRF?rT69@2`N*e}+;Y2hZX8uW4jE_!PJeykb(RKLw9~ z_kyeGLf!_u12ls6;&z}Q-j_0-4oBj18AR?=7y}{r; z79RzL|4)Hi!SneNe($w-56G0LcY!jWU$FQbIxFwjf;+$}NE7NYQ1X4treDh7uHbnO zNY_;jWN7MLpyYoVWGd7WDtQrj2)qbvfv{S=3WPQ4gP^qcFQD{y*-kT$hrw%kegG8t z{4Mag;0Hk&$EPj+D|kN7OLm!cHVVq~6e#uG2}-+f051lA9lQkm-=N6ZlOQTh{S$a8 zc=?T{+&WO&uYw{suLqZc9|2zie#JhYf0G&CTJUP#-vSCh8laSW6qJ5^4itV}u-ojb zE5U<2uLotG9|Wb`*FZ!_jofU;bEn07!M(hH1Vkj%H$kRMt+>TJ*FoXuqZYpmN_|(} zYSzzTkS?g>AXB403Ni%sBYVvA9#G``AyC%QZ(95uD13PijSF4_{usE);vtK37T*L) zKi&(<_`h!PvfE6#n?YWwSy1?Y5?l%XCAbPaXUgO&fv7HZ3n=y73zonSfRgX4p!DMf zKW_G$QBdY*C%6P`fFf59fx`cfgQ6F{Yu~TkXZD*aDCrM_!q+E2k=w$4qknDyrM?i9 z_FoT5`iDW`-#>%WpUDHJo>}m6p5FpWzfXcv?>~VeAEnz(`V=VRuY*^CuLDQG_khyQ zlc30-y2IcIxSYqEL7G$vD028Ia0U2na2Tl_pI?Y!_O%zB*! zM|n=cW#Dgsh@kp2Q2KG{A;ZU;zzsaV+~VUFzX`7A{k1=7#(x;x$n%4sy#Ev^^?wgU zWYy?lQ|~?CB|JY0%J@G9O8zf_(*H|;%HUp$ud?{Npv>2|K&jWe(~SGa!58v;Ke!rv zE9ikwfKvarz>B~OUTW5b2VTnao#1ugF;L{^{orNb=RukGe+8wz%kDDzeh(<~Faur> zz5%=f{0u1V|05{npLxXWBUf51fl~h#P}biJcoq04DE<8-P}cK*fT%RJ$v6FbB`EE^ z6_kE_0u;IXcZ*x6&GQ4`Zr(o$ZU!$eoADn4rQF@1%wf~jntOf*zrP559TFK5{>taW&=Tk_ z=p~Twv;QM=D4(B&r2Y3pUw~u{xX*+9xD!H!s43{nPz{2W>Iq0b{}*EEsK0|g3Vjw5 zIhBv_^;!Ct;o2u(mAkq16sgGA@8kOw{+ zp`V9d56wV-3cV4!7?RHipf^C%&|9G&g?l^k(Qspk>g7kbKq{==t{S)8{Sj0p9_=5;_lh9J&uW7y1S0eCW@i z--8~58qn3y<e;GJ?!N7m!J97cnee}^)ITjZM(a5m0P35rr!wS&C&)9xX)BOY$o3JsZp;T z%!Y9iv^|~A^ULL^U6KAKk@RTTCvFAha3*93e!E-^lc1cW?Vz+!ksZN|pVpH}Z`zM3 z7d5@bPKJPjWT=bn2m?ECMVC}e1%i4vCi&5Ad8 z!WI&lzPXg;k!x!ZGkQc?8Xe4?#WmW?F;(bY&|CNIakE~|OK-cY2j;EyG!DFDVNxx~ zaxPMyhjMiiaqq2r&+e)HXH$7WD%ZLwtK3`GVAX}KdRITi)hMl3Sa)6=wEVU&nrOP? zm7_+(kC)Hy&D7NPv+2yDM!J9XnvJ7pQ~Q6sKG2SYKSf_J`Oh7Hg%_9$Rme z-qtuqL3v~Ar^7@i1aa)e;oU(&nT%`3dor#WAC{3p>5r{({n~*Ulf>lWdq)_z>VC%y zn{m=k%d)-k+uM5JB?r8?(@gy1x(`WGY&3&L)C|jgD{G+&vLed!Dt_V*9Iqr~gO!JY zgYC%`#D0DNZdZ|x@7%w&M-O_9sG`{@^X>}K=X@E%&Mf1^XqK}tqnV&AV>1crw#p$~ z*sZg4`N*Ce)X$KUrj9%-<8)>wJZ@UvT0iD@V$n|XrqO1bKbuzibp?GRGy>yBc(>@s z?g;ZdyLYjo1^V58!0c(m$aF~CMpa?mjqsLJPDeyh-)0YEDf6Fz+1L*P?@w@31-43wGS*Z zxS?*L-Y#9cDNEU+Mn=bvpL_0#v{`FL$C@kDNQKd`0ibKcBo=8Dp}VWxO7EJf`?E3T z$B-;hD`>Nq-Ia7&m{{bBTVv~&E%y??CKe?tu`wOh!?IHjtGs4}rtq+9rh~T5KXC@x zVFo*QSPZix%a=-L=`_5rlQ0s~2b<}3Gr9q(JIyrfoCp1Old2{?wQR@Kaxa>h ziG#$8QfS6wXtO~{E!#gd#j|kCHih+iFpK!*bX@Lj3;7F0kmTKPNzJEfX%v=4E!|4uW77)T__w8?kP$5rUDI2- zu@!|cdVTab`B){EInxmmC8Du4NrFZz!7TR>S1m&{Q3;L<3rE#9zv7j#s~HljBVI1e zGe;wpf=&t>ji3^;(Ie%Ih>4AwIw3Rv$={0NgeBAt8bLFepW4PuADAd72emEaGwU5_ zM=7I~=CLf|;4WGoTYojli4{kE=FvSD;hGJa%w)aGi|)|1TzI3!v2|)&hn~xpC>(0D zpu;wY1h42d(l`-2CYTGFCAA}JE=@dPu2+R%l`$YY-V(18v;x@GEO+2b!Df}!+Kv;k z6XE-Dub^&f@X-%y_jXxEnxk?|vy;i}EZe<(QdnG$nlr3A*0Q#`=v=bRI_;}bG3W8)hZ%C%;E!+M=h zek_=C-PpL)w{C1~q53vRo{5EW=++i$X;i9Mzi!={bxO9}AsbdVO)G&(kHc;SDP*UF z&7uuT)k*J~k@%Wb-pG;?JD@|j=Bl+thn4g;Z`L&|zJzPTVYlR@w>N4QE5UR+JIltT z)zz{jh?AmLCJnO%EEna4E}@HfF+v7}@#)OtpsjB8r!jTjzq$&cg=hfy*Y`!(a^O>znbiCQ6&F-ykv+sL$MQ@K)aMM9@ zEC`xj(JT$oSbA-g)IR6HspH3Swd!f=COI|fYH5$^19^MH0$Co)3cC}xhFPyo^L?vxMtjngcboo*x z=VdrnW~*Xlv4owljXTvghebT*_)45Lw3jMG^}eU8+y0N=Dtwg3ij_}^UekdJNPW>81u();xx6p z5_1iIktJkXr;XFp+Y$$(>B?zG2+Pi}*RDiwukR2KYc})sa8_IO%_yC%DwBq(wABqW zvmHidWsj+YUM=Vx!}$sKjFw|_+qEyt9@nF!q%upk9kP7HJQm zA*(ZKj2paz$5GiEC75vPU6g3Hi5L4_g&FjmgM~)NxhRD+j=}__i?Pv?a|5l+EQdMT#Az zMa3ns&qo#f)B2F&ULq05mehz;7|T?2@B(@Bom6FCEYmV=8e0)Q1?>cdP;g1i5uKD1 zVKHomNvXO@G#|F!X01(Z1-V?wbbW9peLO%iWrLELXBE0ubdqj^O{+u=`AmZv>=t0& z7hk|%zqW`!y{`d!fw_N|ITyG|Y6n~#$U=3hy5!x;VlZa{Yv?O&-pXo2B;0X*n$x4q zhn%Pj%6K@+`siZhs810rkfUct-L`CHVsO1ZbIZ~ia_Sfv=|6UGa-YP_)!iHWWn40h zkDe~W+S6p1SRkDPAeS|wnrGo2#t){?Tz0yel();wdRnd)k(Xss4e>^tS&@1)xJYYI zhgws+xUs>wSMI&*0pwaxISdL^wDJgTkTL|XR9ooU$NUz%r@G>C5;qj+2U4v)>*>c zEpHX3pr|pgG=t?BG}VA4E!raICb25UU3b$uiZ{vg6A$Nx$T0SCpfELEXS8Lj>^aWE zmDl}!XZN>rAA3x%aYr-zvWQfJC532-nJs%ogO-+##7hf)s}*1fVj*zHh3A9ZC>5q4 zsbc%n#R@)R zI+I`mvGY1Fh=->}EbhhU)y@?1i<8tyaC@}Ax;}d% z>c@KunM0y}KdhbnNXB#v@1$fbzMn(ULXh_@!Oq4$npCM#t;Nd!E;JpG~E>1JFvs zESE21K0}(3b2!(NwrZI^UZ8kVcf{8Ra~8Dd&E9U=J15DIPdMhTF)|y&RbJeKacVZW zf|_baM^RG6-Id}UxR=@eCP@?D8s65@_-JY4XklL<5kSQ~@oZQrZcAt5;(>_Bm~@t_ zi)NaH_4tO_W?G8cvxTYK4ivYG;ZH@y9h?#-z46g8{NiK9(RJR~*yNh=l{}A)y1ZpC9;JirbfWBbWf+|8ocy<7bDT-4+UxT$7;m5xfn4YLjW zE+wwkwotS=oBFds@j&1=CcRx@lbgA!w+Yvbu1&g_kW`!rZxDY}Tr%qjy~!ONZ}!HPUsw2v;*I*^K@b0yZQ6f1 zRvH^CjgvGLVZ0?pH`Z*J-K6a-&7|ESW%u4&x9;81P1&!n0JgJ=>G!0UCNp%LkTtHw z57q0ZPDFK?A+EGVongA^-(R}#5sA+NydSw`W3)iu2_adqo z8WVOP75mwjsIX!?sL?ZmqMBhNNc!&d?Uk>A#;FshPKf)WUhg#NZmq`eYLcduMM2hl zZf?0&S}+jnHm+<_rVO2qMom+ch;h8tqcHL3d@Kr9g>8tKGrAc?;y0sXLxaTJaELl8 z>QQ*TT_rkf@{D^Zkz&FXZku%LLxaU!>%>0&;98%@pXo&~XlV49>mm_SgSwbSjr~Ap zbTK_fQx6U&b3GQOdPjW;C>z-G9s%urm_O?a29>!Md)9WB zOHi4s8hd7b)lD)*b9_nlNlH7qei}G+vN@=JV#|p6F{+GWtuT>AisLFu=pN7Y8s@yO zL&~}%B%I83;|DxK9Zcrx{-F&KPKb}qhLQcyy3-p(b{oMWF{(9+(WyZ#ifVC)Q6S!w zBt&{tZz$Qo?1WzRWp@E(1GAHu&z=h_+bd#gWCaO}YwR2nQdZPPF&#s6PZL+R$QmRr z%!QS?KFYg+%T{a+d@91+uW;?QLq9~LIvtrLm$Cl%CsK+Bx;Z#CTp*7gF97XGQ~K>*wdiesZB^0~oVglKXj!={!8vY_XN(L(S%u(TPkZRspdJ11ETJs2PLA zf85WIe6*RwCEA-gGE1;oZj;KGXyVPX8@%FN*se+(jte|P&Q6_>y}VBqO14$#K(TET zAD0K02$}8RV$ZsTb+tIpTc=JS(wz#Hkgl}u`$vN&5npjoi#s@fOh8-A)M$N`;2ML&p*YakTzp!KTN2WC zCPi$-+Ekjdx6Sz;w(@eZm$jhPIDnvu5D0U7>*CuEWSr^dBV#wy9Y&~>6u850qg=(3 z)p2gcI1CAbi;c>a?qmJqIX%kp5I>tppBxEH=-c8mcPER0xbA~H`-VxUgXcxgx&*~_ z(_LH~t{2_v)R71myRL)g}ntg96n zVmnCqLy@$GBia{6^H0L&xV zed;78l$b4}M(1$7vIq_S58hc`-1q7t|^iK!cX;E;DiPNaV#)&ER2W3N@__bPex_lgWLbW@N2(_ql zus5DG{OW8ShQA``R};-6oUsaHfT)R0qBm^Cv-P!r}G5={jABX&6qiT=Wi zE!QKTHO#@#FbZP`FA4%DYtqTD1OP^G)aHRTq~i?WR3cNMj~?1^>scD&Vk{a3q_s@{ zBEb2E9pC3l8M*imitpv+rg&})-3<(;?nfmqo%s{hJ0N^@=n;i zW9x=w?%AkKt5Y%=nNes)TIaHPfMH_xd9@Rxs1wF8UJmCc^Rn4f|2%G)P)(%MDvx@^ z24C~p{o@o55NqLKENz6?EH1eq!L-Nx(kBA8egZa35GT9azW$&n4=%*}V&j zm${Q$uh}VH_e5KjI-foDbS*J4osLE+>)M$3y>-bcL3U)Z5wxMo??xJlLz;>A#cbm! zbow&bU8o)ge)=M;rY5dH%;D6YpYWMg{lzp#bY#ZW#g;)y%G97ES;KO2#}-=Lm=b+` zu$X>{hL}GlBK{V|#NJW$mAXBZ<2R>8rIWUFEpfuYF+$X24mA_APHFnGi%&Vo^z9eiDNfcvqr5-W?sru-o&u;X| zCzQO~MH!{pMDUNBv%F$@I5x0K&2rU7hD4>ZF%M0{*3-%PoxjSFx`VT$rB9S1FiN`( zR>}4b&n$!IYsNvjtY#Z_OdJC|JRueY6P$?TgJHL=QlWM;}r`btpQ{;V44on5r6Fp1y z1GB9%`l6>Rx*%6uIx6;z3g)6|hm{)`THE5#i2Va2jXSMb^17#X+#`f1u^pC_K3M9b zIBGCkVfCcL-p0UX?Pza3N#dF$f?}~+cEODEMJ$lRrbvR%AIK7clGE2`R#R87Mi%dG z7+@Ib6=7p`Vf{e&om!|Ip}c2TZtdBXn;2dUD+P5bN`MI8Vw{Te3g?WhHKS~p>U{KX zNEp{*i}VHo4=*V`0n?aniDJ1x;ND`b;azm`z!b>&8^m1EQz4i7awO9Yi8HNxtyMo92MH@l2UYk8d;X{gtN zkUuo-H5u$0IyqEY@Tw4Se8$4kSAgJS){k{84{fWj5HZPTQz-A#7`6ubS|WnEza``` zH(hX>Kt<~X5`C}zh}kB;*b()yV1YIUFX@I~Mf3?vVylq@EI)i@-NIRC#9}0X3TKuW z=kv5#uY}|yq%-3rZ(#(qXfKY;HNW3m0ozX)^}aHV6EZE4WD7anjPcW3SWBxt&-A9a zV@8SK>JH(SWy?8T=3!5=#9tTfLDyMxX|l?0aiy7Jw((^P9xuiGoOz8S znn6o`kE36V1-p<<`MI!qls{27`$v9L;~2~-nH_2lmU3v8t2BbQt&<*AY3)0!OB8(2 zH&*T(&GVg5cCL2U=i<$-ag1dK=!(s4ml<~lFvd7?W$7X2ay}P#-opjFyzX9JbH#UrV@|Y!VKo1(fMm1oac#i5@bB-p1``x+1Hp@8;kr394wby^9O&S1 zJEca>^sTMtr!wo!-4obc#>(<>H|i@jiM1K2n19`1@vO;t>cm8j+qwuAHy$DLBXdP% zVcKV2Pn!2EEwY}}F=(VN#W^9EA7|Dd6L@Y%X1!wi-5K|YI>t;th(hlzt)&J{USn?b z1!(5Vv4QDk&1lb#IX@d)$y^M{YgdE2QRkRx|rJSbIUbnnwqI;oc zE!<%~2B$5pa{wNB15lj1SVxj~3?Bnp?aK2hyme~0W@%4~{+ z^NN0$??BP(+r+FpryzeFp^Zs>GO%;a!TB)}9 zi-&p`iVdJQbb{1KrE$HZCMeuoVty};7f|nYUwiKuJlnJ%60OHAIozxAKl0%5knmJJ z3~@B*MWQ{D>7a8VY!-t@7;U>m0ag&6+GsAcj*CuHx&0{@zoC-MH=6sI1= z@4nL4;wbBk+xfKa#v@8E5nm{g^!dV0fF#VIU=^O*PRQ5wze=g@lN}B`bG|axtX3Cn c+{}qUCu{96dV`e;qB#&bZwp-mLsb^YU z?XK<_$;8BFc|X^HNx}vKVM%ZtHW(AKYXc?;!~{$TkX>M7h=GJyh7a~z$g&Ax+28-( zTh-N4OQV@2yW8I!{ky8peVu#mx#ylbJ>NLzR%SpyOafa?1^PzK% z;nF+=?gbwPU#JJ?8S`;qFW3aT&Nt>h@E-6z;5iod()>bzsj6jLCyHftP`=1bJj008axS2cHdo8Dz-jn;w4xp33$47aK!Y&BdUuuL2pW z*$tip-T@+N6N5~Nc^#NsE;WWK%vO)Lfs*4rpycv?a1{I_Q1kaspyn+P(-?0ZM*9^!W2Mu6|wUah=EA9&ZKJk2}F$@NFI+1vUO}gPXyhfEw3&2CH^%1nH8w z6O>%<2Q|JAgVK*DLCO7eDwUpG0jeLjfRcX%Ql+^UR6V}~N}iwd_+wDxzLd!p-UN#O zHK6!D=V63n-`ybp%v<@RdHMvXdcF#Z|A!z`WiCWn zbbmWI2;SoH^`QFkD5!b(Yf$5RPR`*La3j~Zf*R+2AXS==fC2cF$CH=@U3Y_8FFQf; z6+zjLw|M+x5Yd>w2i5My2t)na37!ew=C7-u>UkX~c|PFragTrN@mUN;{kjAc|1MDa zQUcEc@AcPj1tquN2i4wZz_Y+_gOdM`K;4No4ufjvTJSXRW{*Wsa*n{O!23Xr^YftE{Vpi^osAJ?sAe0e{?CE3 zE3XFCkN1PHnkPK|%;PXdS9Uk#4^wL12}(a62POY+f~w~yhLeo>Gzgd%(a25U1b7g90Q?jv+Rqr-~_04o1pj}0G|gw21-Bw3RJznaGle` zUa*JjUEpQlA@Bn5EnootHptYO$3e;aWP~rhTL)eU-VUAyE`ZXDS9yFA)OuOJ$LaAj zsCD;tQ0;selw7|8s@^khaPr*(>UtKu9DEzt3qAt&gWm!ruhW^#F>nAx^-LAK27CaN z{GS2Ecky0_SA!b=?V#lKMvw0WpTqS>J^s1J?|A&*p!#{iJ~!@t9`6Pv#}9&f{sgG; zJ?lm{j!Qtv=>Vwv_kfr_^KS4;@C%^E^Amr+XTO`LgW$Q`uY*^BuLd82vRo@H7o&0VB)!sY6b>PQ9 z>DBi@t%oxv7!$Y))I8n~YJ87?0r*u=cH|#G>Bl*fZkz)i4}#s?zX#NMcpqr>3sgHN z-{kIJ4i0dA11NbN1tqWd`TL*u_>bT)_j?aIJ$Nx_`vt1LN5J*qlm7awo1H!mgW|ix zsLQ-vECRJQE|S@&n+x;0@qr@HX%w@Eu?PJ_MczehE}R{ti4FJPV_`1?&b@?@Pdo zz&C-C`v<@w@N=O0^;0kaFMf%W?=_&taR^kodqK7H8{o6Shde$8s-Dk-+rXcJ&jYu; z)UCH$K02RJ%V0bKr%yIsLoNdf*Q|z zK#lWHK+Wfm{QV2>aQ^*PQ2oCLRJ-?sTfsjBZvcM;YMfUWocv!5N`6PdZQw(o#{C2E z6!53unc&Y&IXoX!`5y2R@ETC^n*sxH0emj_PEg~07(5BoXD9S`_M7|j?}6XUT>l%s ze-nBJ+5lY)>GLs2I?7P3jnukW`gy*;@oG@xe;9fa%0tQL&3s`R%!?qc>A!&vLq+Hb zNS{Rrl{Vji{s{UqBzfy|7Id=x=4AI_zVCtl82V-Cuc6OF`d~iHd!Wam4?&v4{|Y6a zxAEmypg)5?1&u->^as!fpo7rakUk%EV2*;Xf!+XN7VSrK`){GYfG`c_*P(Yqm|625 zp?5-eL3cwhfX;yQ`82cx>W0pRu7-XMx)=I3)PQ~)(&v@XFF?|Z--nWq>}DDI0`wi| zccAMbef|>q6KEIoGU!*KYoO0Sr$EW)zwzZNXePMMd;jxJqX7qWx9gk+Nd5hX2T$=HOf&n4hmDzk#HcG{(lfs?E8uUM{*;XI5|Zy3VbhNV98|!|c&i4xMK4`kRj-hptmk zJr(i&>rE6owAw^TWQA%e=saPosmzkO)bhx*)kzp_Dy>F4OJ{A3woA-(wJ+$g@qNjx z7qi-1Z`pxmYrPqV!O?PKwoA)7M|m!av!kecd)@o?9GEzf%DYs#wMA*=LEjv!u3W3M z>{C1&H7h07T@Z)0LcJhMG_?>Eqq(_4+`qgx2M+8!kGLz|q@8;fHMR4}w@s@$*-!Z;4%@?Bw&7!t9z6WEImrn-qLbXwtw|!_da&y&iE~=J` zOIFru6{JN>5R?jyLdWsyK{{AnbR29OR~Q$v14woib$s{4SeqRT=Ax1nqvky+M4z)| zoH$d)k-?O638R~!l(E_fE56DVq_D@bwB*R199E7~lCF-dDC6ezba~#jJXSecScqkv zmQAB)TRxj!`)vhFM(7kK8R1>BkF61AWp>xPv5Z^brF?0ym5u~qy&ly^gPy^W%KUb7 zDbs@cQ7u&3ZK&lM2%6P;Sd3<>Ww{JAET5wu^z{_`vn4%qxrzzH&^5v!oNt8HSn3*w zcQ(UnF%0^y>{O;%ErrwNDz$ek(z&5lq4q9awl#gS-Si9&&!2kg70v45YIL-Eh3P3V z8a4oIZMhLk8>Mu&7i-Pirz?e-824iZmZ%oi*~@NkEYxtZ;EHQQoBH~LM&YnLN><|B zR8%P!6XP%tR3j`!fL}8e)-C_Yaj?fsPH8mQSB_&jW_R@Ws42flgn839vEmai!hVwolO5JdBn~7J zb@z(&*%fAZC?~ttp%t@rx>{F|a z5?NHUtuzYwv=STtws#qH#A-y#^;S2=F!-|TgY)pQO1yBUA~Z^>G1h2=bF~I;d4RfF z9ioX+I4=nN9W)o*+7rJtm@TO80E0Ql*{On>)HzK~ z<%$(qU&dv-wgxt@^HevSi)u_4`@7lGx*Os&7W{UfeN8XotJebceff*oimJ z^4=Js&6TL=bY1H_o-0(?3=$PK`>U0O;Ig=;rFPlS#(<~MQDi0F#;g?F&a3BZc)s;3 z^SP}{Hs0;hZud6({r$FGG1%t~+*H^&8iv&%=az;nmR%cpGoA!+D#US;TJ1Eo9wlZn zsii(>59IaDtFVkX7OZdDg7YWZ+nBK8^80ac)Y>O}51gAsf{7b4p^y=#zSgX>(}XRP z->Nn{b~9nm7m2&bL^bM#az&d)Z-1}Rc^Qcn*{WDs>>-V)-mA&5jzQAL#5XdX{gmXc z+p)D--jww>@m3S3HaXNg@28EcO`UN!iEwF$NqO#)vdDAN-h6bn%&h`lh{%q!*GY-? zULRD1HJ$lNdB%G6)u=f$YuqzjrLkm~sqZkTl|5u`4i1M4M+tr+J!j?E+^!u@+2cyo z$eYxYt;hAEc6#e<`E9v4dzgtoCX3obX<$uUnxl0hs8faFVP_JYg)xPe%U2KCMl4q( zbCjrDmPH=*_2c$zvGle|uUd{6EdJTiSqx0m`uta_kGNO=*e#!jC)tOpU>yrqeIQPT3`=AE<|qV%78+nn#neUkUq%XwRYH>&?#I- zPNa!cWnMV|ZXmXW8)rRfMqoTwVkw&VQC3xw2ki4viTJcVq$D@d2y{y|q7}|Fl?`5n zH`_^5EXXr0(x&qjkyBW2U=X^JN6ZnO)QK=xu9h45*#TKTe7$Yfn)nJbT#czpXC`|* zKr^*LY35mlNh|h|ZG%lKPYqe7P7SsSFz;(GP}sB~M?8H=1M~uS|8{pSNG7Qs^5Q@X zH8IusU@wcooe8|7Z>)Q()rLwW$Mq>rkD3pisJo1da1`y)#p%%!L$C@*+l(gLve${u z^|s9|OKXKwM^DevV+SYqQNmoUy>Y3Ii(z>1SPUDE!7#GQa}I#KtdVJ+L3%hpxIRbH z)77Z%_PO=cZ`Q!eGMOzCjX1s{m8f%(TBi=x(#mBftcBB|*BXvQjqJIk!U5K>mLoPF zZGz5>&rKKW0fFtqCOPS2NZPIym8U`!6K`TRiGtnzd?w%K)$~s2k_qn&DX&D~ruN;WwOWWHh=;&CE+QXrV^o-e#w@C3&hTwL_q=~HS)OE&TE4y@GD5_ zG`K!kSyvyN#Rin?#%=w5dk9Ffc(QB~foVm862DK;m!L1I5#h65eov{t3pRHY$*wQl zMJC6sSa+b)wLA&1|G0}ZS1!_A(n`~}vSJYeV3ql{Lhg`g@2}KOb|gc#h2f1GVLlSp zD@>Tous{05x$T-GJ&_-)Clt2PH5)xkE_`sU%e35tp-rPGft#m@IthB_4Z>|Z`=uJ6 z&X{)!TT9w4-sCK-kfG`1#Z!Qe`dFTI@(Oj1NvVNNT0$rN;heV;HXzn8sB|*zZsl1c z>K&4V{jRVc8NbZj$+ORGwCHznwou2u6nh6)ZiFZ8_x?3=dn=G}!~0Dmida3>1q?Sr zPt0!Ix^Hc+eIX$eY_Kgd|12;%LulTwxd`Wa+I*0Rm(pRnN;|7MOnH=%$ z!JGvxyV>3?|ISGa*#}3H*BGgfkyM`BhjZ#SxGr;`9v#9+<@S_v2MI5;`;GEUu{ENt z`QgF*mcg#^P#HkEeeq1Wl-tpqiF1xsCI4h}iKy+mwtlkDIz zzMo#j-B>P0n6QA3ACbM^TCKTn*WB4Gl zMmBEA4YionM^;vDH!t>dju{O`@ZGu&RGOR*a@R6}9-d_^QBt-PTtPwg*G~ zSCLntoRI^><%0^+PZG3>Wn!MZRgVYkZA?qpWHXDK7x~3YIBx?N& z)mrK8CQ)e(Ia_0Fh()|B+vRFBr=yVGhA4lF9oS}b#l$kJOJ2eIH?$5az1gG|_TNRN zaV@T%xpe@WR9Yl^s}b1jtwltmZs3Yn*)OpWi%Fntk+=};ub8^Ed=SbCvfU0Uy$B-h z(yFOjZ9O7>xL7aqme;ktVglFlww0Om&ug1N#j&NaVglFl9w}YP^(gRZTmP443_a?c z!?nDRk{bKrl8IYQ>k>6{6O?JHJ%wv|Q_D46QLaQrt2Mc@*i6@6R!d?EeAm#PIItOA zE7|}K7)5kc#+kUVeK$t#NTt`+L^hWar&g-kCUljWnU#XYS!QOA*+kHnHDif`jU|Zi zy)jwOUCc* zYw@N+ZO`9E8zNe*;aMe-AS{| z)DwDdv&^(|Ik&itYLU6Zi|&|fwlbqX#4gJ?;{`ou(k2r1W+=%$LpTEjPhy@S&ABNe zhe}gZ+SzfH(RwC^G8!oBj8iKI5T?)#0Rza1l($7JPTO@@v1dstTKh9E5LIV+__BL^ zeD_V`e4z+`#}4iupWHJsv3uX{8z*(Qv{)<r6g^B}c&q+?N5+?tY#Fm^p(xJH|HoG^u zB)050aQr6mPu!~pMpF+Z8O0WQQ5Y9v<~Fmc$sII1(Ik2mRTrfV_8qI$VxQ8sJ56E> z2p2E<%r?s(`g8^SAYXwkNGnNt+oFy5j{9@dGOqd}vr~6WH%4>m^CZHKW?whHe*(3R zrYcX9mu>5J(JDHFQMcJ{{>*5H=Fe=2$l_pTvC8n9^KA+i^eNY^pG-g}MAWC)uyH3| zgYkwUCoj*tcnVXJGr6Y~tw(I$m9?z})elLMrA1}E@m5svSEc;1o1)dd+ArX#Xs`Zcy%x>Hv6)sb)71_T~ zwdxQZv*~fw-hwqkj64kvM>yTcCThk$OAax(B5UL(LrSqMyBPEn39V*M+Rn87=*;-y^rB0cv%&miaeA{>po8ScK8?y|HdXTI4%)axM#ZyBD(JJxbWbUluK$>< zE^X*3mo#*2cBR!lrL4MRvu=iQWHmN^U54J|M&LVkM+f1uS$6$qx7*@Z+QOGUC)ch$ z&n{WHqrrnRTaPB$ZwYoSuVM8Hlz8W=I_{!Ln+YZvc=B27(sEn+R5a6E3~T~ky7~3n z^`<{1GvUHD*7HHd-Jw85ZE!p^MA_^@ME4rd_H(Ic`o;D2?K_nZCfiP zu~LLF@lxi)v?D?HrQIEF=36(rm7Ld|7D$=9Yoy$Dx~~Mij`!R7$C^dC94=8WJ$&1k zobK1c1{<_wAi<;?f|&@LWXRgoy{1jwvr#>wSiB#O@r$gvDq>-sc}w_}!YBUq?s&d3 z|K8UAUhS1T;Qb%};$eTX`Da#bKG>Doa2Zgnx?7p_!sqkt)z2}r6QMUy=?w2>o)qqi zvK*O>!Bt9rpEi!oW{vD4mVIcWxp8^j?TuSmBQWpRRMDdXmcPyOOQ)byb#{~DZLk%J zd<*YhC5utE+9v*KX{cImknd-Y81|K5Xfkr=p|%lvWBvG^puT1{JBMLQLdp?jh2PEc06x?1LEdvRAxFaug3r2z`Dq>9QSy! z!pkT1pyyFqdSx^cj8}BMlNrZ%9uFyPE;MH}h zULdi8lL1;2(||!1E*o;0!Cdi)^V*S-+lWGwoYkq*B|o|}IgKF+A*;QiO(tC=9ax=` z`-DhWgWW-CC_ToKKBNQ+zZEa3B(o1{zd7N;OO8D=xYoRlQb3BFN?A17@Ju2T-QYk6 z&x+ZVD>8RTvTWyV@Ovjx8suPFe*|OhwQ*?|?25?dUbg33wpZI?);gybt1%~iC}+|x zmvyE?>ZJ~94J-(U?3S|F^vebts(zEDgJ<4lU)ltoByKe)Rh9bq7*p7lnR3pYm4eU2 zw9BNEam+F;(Ti-EmLjcC0GE~%nO@d<*O;m3NvERi_#0fE_A>Pm1D}wY=|Y?grJaeS z%r!7=SOe2YJ5RDW(@f0k_D_<~g*7daah%P^4ExiSyb5!BLgt#wWHK^4mO0SYrz9m4 zRuXZXznYpZr+di`ky!oI)ll!LT1WlYREw3TibZ6WD?&hC=t|cX^b2jUgK9fX32p#JE{(6uuQGpJ*DneM>8U)cT)M( z`zQotW`=}3^s2?UkX_22oRnG>n{oRl(A?MlgX_qWdPq3M2UcPnadTJMbNyh1PAe-XyO>KZNb!ga;B{{r@kgrb+;(DDNpLJY`*z@9&bDdBXH{^9N6PTM^OvGm^La!rqq-{qSYqo)2B zmL%0QJFouDgH1U_=04Ll!=W>85`)deE#2>aJEWfa^Ld*YbGfH!q=H3(Bdh#VOt4Qs zJ^o@gpLB&{5O=Jr#2D_=w@oA}VxM%-bI^NR{3;deioon&8W zb#Tz|ro|t6lV#mkWVIF>ifMBSDh7`xD{UZ1ZbXVepa;iQI5A4uU4kEm;)E~ai}1z1 z9aN^P5_;0jhiq5>$hsEpR|Ze{J+992tXQb|w_UnP)~hmSutV~0*ieWrlF8X2`L*3` zpX2OJ!9<>IJ?ON(X@NVRx{u!bm{Edh60E;(uayMLsCf0Fb2kQyiz*h-3E89vv5b}W zJPJjT4x1=UQdGA&F3I9x?ApYt-X-BKI@L0bZ4Wrcaq80l+=d3(HDS+SHX}Cep7Zdq G!~X~1SuDB$ literal 0 HcmV?d00001 diff --git a/opcodes/po/ga.gmo b/opcodes/po/ga.gmo new file mode 100644 index 0000000000000000000000000000000000000000..fef67102cebd653e592a6b9ff27fe337e27b41bb GIT binary patch literal 24028 zcmd6v3zQsJdFQWz7&I7Tj4>EvC|e$nBu}?yMz7Hz3ymH|VafSyn!r>VRI&%oUC#fvaGVZ=V-(3 z{=WODuI}j`NrpX}KDzU-$9;bHd)==-`#)X&tY1|8zDs!-5G&)3Vs@V6F7FIQm+S3fo}&d zda+XP0N)9|7kv3klv)FR+~RjE{=`*EP4c`9?gWp3qu_5^d;;9S{Xc-xe)UTY?gOW| z?|^&2$G}&C-?#6}SDSwC0GYCS2;2%j0!n}10ylz}K$NxMEO-fc6ns8-0=y1<5S00R z1Y8e336{Z&u2G7AYJxw{1rLBi(z`&Wsu~u58eGNw2SA2YkJ|e`2AQh*3JA&7-+_=) zodqGey6okq|LZ|n_fAmW9|d0lz7^!3`VIa_Kc533sd@^e3-ym6Q&pE!`32y5kVk43 zya_x4-T*!Vt^>aavQ_H8f+OH_Jf(JnF9dgiuLExcKLAR*FN5RYKY-VQFXNBkcK*mZ zkAO4a8$sFMKLmyTr@_tOYKRM~sJlR+*L|SS`(geFJw9sj^PsHz8y5fGqFQa9UkTEs z8VAR~0~U{gvYto4E#N0Wq0{$4x=^dGXAa;vD0Dgq3LmsU+2{9zLdP$GvfqCT3LUS2 z8H68h;E%N52MS%<7C!*WdcSP(EXY4K4$-9EAyD4G+2Z4%%>S=JsrM`vA@f@Y%D(Ie zWgaK&^Y?*5w@-l{_;pa``vXwsb1lpw>)r#(dhZ5>|4)FzA8!Xe@KI34`;vXW1WLV& zA%d*;YEb5T3n=?@43z%f1xmY*fRIEzX`lZOaDw|6FloV^pv)%)h5qjcWu0HM_yceg z_b+4+S??Su<2Cu?fxl$&Qx?As!kX%Tfzt2QFrUolRiMc0UH1N7Q0o0GD0Dkz@e39g zE&d-+#=WLw>hA!B4~~E=MZL-1{}y-|_kUvVzX=K*{~IXdKNn&Ny>9@8Z?}U};A=sl z(*vON``aK}tiA+_e19L5_RnDRu`Tr0o^Y}a{^ZYLsuZAh*{s1U?@vR^vQl9{2|Nk>6bon7D z{fto=mQgo@GXEHqdT#?|Umpc81HS{x_)8!pQx~IrW!@V>p)FMM`}Z1k?n|=T2}6d>!~U@T=h8 zf^P;t4zoTY@28;=_#_yE?_pB!0-rf!?B099k8v-H`4I4X;3vV`wi&uydXvE|7LR}o zp&kPFfS&^qS#|MtgJqDdP`87!e?MpO;~-N~e+BLZU;HYgmydu_?-VHQo&>K1pRvQ( z(W^k&ho1zQs`>?sUj<*l{c~mwz7&*w9S3E&U?Cz=uJZ*GIvt z!Kdu|{|O4;UAo(hcOxiv;udfcVQ*ayn}TP%JUde^e3TpR?~ za(^E<2L39z2K)jjbp9SFbiC>{X1w*F)PJqTp8}=7Q=rV_8=%PTrTdKj*$zrSHBk8O z-JtO2SM2j2f{34S#;9Z=rC6C4L02X6$w3*G>( zf=Q&^gvBPfp8LnZ9pJY>k-Mu7nSH+%l=}!2e*dt&|07WN=f7Kg(P4AH2^4<04V(Zo zQ2IXw%07P+^uQm0Qt$G4v#v>t2P_`7_#jxO-YHP%@(obdvt;qA+syMl;N?7j11NlU zA9xM;9#H1_G5h>UQ2IFoqQcZAw;MjV1r)h^0NemR2FkvC2V4jKBPjd!iaQM7?*?T( zuLq^xaq#)zJ1zb?DD(VX5K&Z5fg&H*zRu9)mEbh@O;Gml6e#ci8kBbb1PWiRxzp@p z)#AG>eg+h}{Jq7i?lSY(3kts<0cGAlZ}0yAEOGx=pseG0uQ%tNDe%SIzXKFGdK8rT zd<}%v)g?b^_We#!-e;h^|20tb#<#&s!E5d|_HG<}0r#6N?gg*p{w`4V;XY9I{oUY8 z!N* z*=Hnc7ECp88KUA=m#bcnz)((o$@Ew#7Q2vl2 zw0)BDN{aB^zov+ue25~yM=8(NSKU9S?B&l`Y=gf=`EAOdQxG++dwvo81Ion|`N{qZ zk3B(oFXb&1*~|A)j#8SGdnvP&af={sk8s?ag0U{8ymJLTc~txA+-w zHRaRx{#x)^6ybCEeU$QH%FS|9_`SbyUA%mRo8y#GN=W$@?6TFQhtH*N0h55*HeCp;(l}X z;tq>n2d|?%VDJB}#oq<%l*ry+VR1kBMtgk?_#S)xTJRpqf1vy^<(DZP%2tZ}DwHo% zK1R8d;(qVq;-@GZDBIja@J}d{l;5NL8O8k$a`7t4wX z34T&-gjrC{I!RDosmbnO!S6J)8L#4}w2LFJ5=MS<(yIhAUM)=hG!0snW>70@vM#g} zH~XD)#fg~N-+b`UfJuAZna%E;JHH7TKohONXheS0b5Q5b6wF?v{91|3YD^Bc66VrryU zpl1*5ce`FKa&OYr1IuK+lLp@LFl&s6IG1S8O|>xtyZ83Jf9~Mnr_=d}bgp$#-nqA? zh17-ZW>-I@jkwdSA$MLHwEe^vO;kDQRpVC6PuDJ=&EfSMwod%>nNGN2dh_}d)0<11 zH~xQ|6arPNC6k+tVwz1;l!!OExe{jjMUbXm8r~m_C{uC6R8PeXQ^P8c@yP% zH9zwQu2){ve_Z*(>(N$h6u4yvLzPm=ux!A^#Gp{&3k=N|2 zXf`OX7-d1zb~%I!bGk~Gj@Zqhd4ZHPeH2NVb`}=G6K3Su=5haIDjHp zs_o7_3r)YC;vx*G61Rf{dvi~AvW*)=t+YM4dCgic^N)(xha|QtaWkws^&Nf^;bP5rYR&G0YrS}3Aq_Gw z?obvyW?c`;YR%!HZ!C4zDn};_oL+3|$!cXL>+*N&)YN22RMvn|)V76AWE4~tnWo)# zwJmHmgF2j5P+x_oZCEQ59+79mnXvd)Gn#B&+}5LHJ}#vYhJV{f6x**iyX*PNG-lD| zqOvDWP!9pH#HqwEi|qPrmIbYLhF9#tiJCnaq86MG5>BX{e$A`m*0LlRKV2)svkRlO z5&bG`wSroRorQr}Q7Q}4FLLjj`t3N)kd7p11yQ#AZGx9P@TEBJYG=r=?#(B0ht@c6yjx+)2D^w#m%cr8VT+?n6E;aW%vDO&rYKg{rKfft)hy39*&YbG5F}drF-1Dc*uC76 zUrV1k^Ym{{X^RkfdZilEQe%q}3p7N3ci(BjnejNE)z~=NVAd_z*dNKMfJ5J z@W>xicwYXlA3Ee}oWrZqckOYmDk6_Ge?-++QxvUNIj%%656l3ch z1)WtsEKv^BW4n`}orA8L>~>pRyE?4hZRb6)QCZ@LO;NOCYsZuv@t{~0^^Rnrce6Md zlg-e^)XmYk3d-4bW6#8t+*Wk7aMPSO=T4l)`uEi8VO;zy!Y`tK^E&qnTZrc%mg{&U z#CB9VVN*wdP(u->Z>7359KZ9eTMshqTOI9&b70ndj^161V=ezYTZqwPjC1tcmgtw6 z$~jjE$u4l#u0`*xZJ_? zSVerwy@#~p-2Yfwuh@j7w}zB(g`m^B2XZTB}-xSix!HxaFuS z%97K~MuICiGTN791U?b{oJZ=ik8Jys@%o2U7+#}?0h~=< zu~pCBB8fxX^wH6NKb=$T3?ZMcVeA(PsW3Hht_mB^QDJ(8_ad2EsfhB_vg)=%d(TZy zO$zae(dlAajOJ`DR1=S2=27L2m&k645=P?O<#ge)Dt%K}_TG6{a&TMra+#8m2Lo&N@KxBt zM@mCEex`UffimY~H%HN1%@`G}l@~9~PK~;d0KpHf#oY^h^I9k_F8-JKu$H%xZq}y_ zC{Cv-3vj#6h8u4tf8-nuPlqaCiIbepjs@;(+{F0g_!K(2d9s{0$tSE`>r9NIU%MBl zR-en=Sa~h$3LY7)jV3Cz=+Jr#i(!5&QPU_Cp>{_95JTOreUU>nBjr|$$O0&Mm zfqB^wpQ>v|?j^+G`Ro}60v^W!4HO=pn~ZiSl|3kVNAOJZ>$|(xE?nucZzlZ7wu+Fc z79t1hi61NaxW!0gqv_a)-);x^Ul?t^dvF}5Ho+c8P-fDn(LE^209{4l(EKZ=7^FZT*Yca0@V#qI9E(U0^XXqP1s30*Q2$yBUCfK zeo=7n;Mg4L(VcbVUW_}q_JW&qhBxW-jnc8B3~fSGrg@^LkvWCw=flP+u4Gb=FtuqD zm5&8UlMNF!ZBHC&X}j!^yb;$@-q2Wwd~`_1-PnlFi0Yc+$;~q`f!U{+K8eJY6~yg1 zT;&{}@0j(|`h~Yg9S(A=X~0BnfJysZe!}S_SHNy0c+#GJiGu5}PNraKx9vvqw05*c z-&MaqNMdEh%pCaE5GsVN;qPk0PjF_dW8;V$F*AL=_PlFbEl}``*QzXzk)G%z8X2Oa zY9$JnrQPRRyXpYAC|iYY5xtIpF&W~;R_0>-ah{prP|^MC)?dJ{&uL*6EkPSQAbUvr z!qgbaI!s*YIIY7~Fx|vd^F+`6#_ql8l=C)PNr>g@<-})63v&GBbC?SOx8t^KArDbL z9e29cXJUj}bZ76>>~{{SP<(MPiSK2rN^`Z+?F2NjSu>0(k*U<1Do;+Aw@!>43MA#D zv_GwfwbIT`JuS`0q(XG+1k0mN7BdPWnz`2R%enj+#8htr9Kh~ayB;?HPo1Z(hXLi@# zdC!~o`S=$svL{dk!zDVXN4UjU0+C2Z8R4XuXZ|GOt9ZxZK>8+irKN2=}PJ(3jhDUKG>g4VIYUAK56v!pPp5ijSb5L966T3*(kwJKOX}e6P|7B%KK3pj7~?srs!mb>E~2{a9wK zQ;UAoDMJ>f=+_#M_QyWO5s5#!bfX`Qwj++V*q)VW+nZYS>ZV_1=fq|;Gk=L3qf$ML zv&E=CwWz=1hN-@aF14t?BGIoxkA>8tuB2y45W^)-uyGL@VvGWvW^|7HqM^MY53Ms1 zGLiQpIYKVQD4(TRvA$(XJ(pzESFdN)J!wX{1@l6$b%rBW(N>amB+HP^cJ_34w*lEo ztp-hcIuDC!M$7B=>=RyTo@q3c9$l)=Np(FRxfqsiG_<2GVe^iP8AsiAMATc2CHX4I z{wA^$p;vd)Fezm6fK6JG+4Q6xEnjgDAN6D&Ew6ijX|_QA5i*6g;i@H~D~WvKk-O9* z_Y}vd5iDwMDQd)VuO%@e7N9*BVN#qr)K)}KHV0{W7vo4%SZ%<6xQ_A{$!snX=vac@ zHVbLxR;FehWh$Brn4^%*T(T+$waUlyxK;6~K$JgP^6Cv+H$5$isUdzDA(CPblFM|# z9Z24iWHlW+9kvM1=4#i@#wUThY|j>8I3FHUqi%PFtAuD3^$o-Cd7k_}p18ShHvc*ahryX;MbtjI-B9>w~ z6bKRdCy7ubMl~dHAYYT7=KLZLw6T$$=g>`-mjoa(Q4kOU-}?~2^idYUo znwpKm*C9-VdTpiQS+zT1+)}l%r~_dpIf@DB+$jAnZ4iVYHoVB*>643T!k}h)Ft*PQ zR1=OKBu42rg_nsOVESH*M9LY)Ra5gx7+0D?iP@;czx|Cf2@+%CNyL#QN9s1s#W1%R zSJoh$?T(jreP=mTnn~5gnM)Qi$c~Rps?=eOv{0rJ^0^H1b7;yMk}8GRuwh>9OxN~T zV-_5@%Id%po8T=lFo)5)-;z)UY=m3W(6&z>V#y8-7C9HDWK)S899WWrZdeaZzEp4W z)PXZhOhTZwo@G>fc|lmgWm9RrA4YQ8)H|wIUu|)q6rBKTN{dnj>l+5(@SEgo!XX-wQ-Ej4MM(pmrM8 zUn0e7p9BU99GLGZ8CLa}WB3wTR>LbzyGmQs9&5vfSgQf=Nx14wwvx^oakDxs>1z29 zGb{GcO}@I&mM;0qp(J5BBRu1YeiLg|TUroN%`kseggjeJvqf|d;-}RE3NTN`I_v@x zVy5-}AWdNt(KsE}0<|w}pO$a<;)3+DqRGq}`dYZOWn`1@eM;;HPK~5z6=sn?CPiz| zW0R&e@QqHt8uZ4bYYlv}tc~FxbbY}tcEjb^lXkom=~ zc90WP9F#+eS$|4X+!0$Qr?0WHUiCERn;J$a@3m;7F~Ab)q=oZyiw?2zk|cIf^n`0; zA|i;KL>4m>RWvo1Ia|hN5Z+~5&eTPeiFIqU-|vV<@(q!y#z7wtYJv6c`f{dNUNhsd>X31Io0{3@ z4XU|N=>WCk1lfSuu8>WLG*2ptWQ&(*6(;btCt`Ogc*RU(8vpjL0^&C?|7bh{qf>SXTD z+n$YXS$2rKQFf&y;XQp06X7nB!0EN>S^hgL)H$Cs(AG6^iS>~iz3H;l20YX$YKA9@ zd(Mg~9CxKdzF{Dgfih>0aU#@Kt2wPS>_v}TC?7=h36JzoCA*|OSn>8bg=quj)Uqa~ zJqSo%8>g5gQ@KEs+171?lIKh;`D^Bx@uPaqVf?qoi82dx)$GI#x!ptSgPmvF@e67U zX9_j-939oz#RWVPcBh6%%7+>37^eYrM7pS*;BJLN1{_>iZ6uwnake)#t*^39ggbX# zd~UK{32YK3F$P2|u9gLHgxv&tvf~gMedy||zv6TV^6SL63vFA-nHxUO+8C!Aj+g@y z=^V$EJx-kUMIkWfoO&Zcc{M|FN8~$?a>13Q7@vc!l4F77jj+dvQ?x{a2=0W@CnnPF zb2c(8Ra-K)9hb$jv1LiZ^>j6$lHGsHKoD6x6|x&?e|k`-U4B8Yp8o-kJUcnTnF$p9 z51Vc0dL8(lWV@B$Z(R93PLg$4gtIv8L06|pjaFI0Q|Sf(w0_ZNCxyP(Cngs&!)N92 ziAvy?sS@+ zA+XA)sRmNSnK$#5GfdcG9k>Z~n9OT-Bt|3*uZoFzJ=RB?F!SxI_#D5N&iF(uVM2vE z6$x{_*=)T+eU%t*vhawElrXJ!tx4fk*+bTQEUOlO^kM!oCQmUG@@ME-$}+-O1$=vNZ|#4r|2xKn6o z5x>fKsigmjrKgX9Rdt})+G+`HC{B4qd&C_uHaoY!9r-$jP1Gk4E$}QGy%s14p(E~M z+;St{tSNE=dydFQ?(V%88kr9_bnH&~IG?p#gS&4CWPzrHvr_poiWRRk7Wl7AMEl~h zCN2GCG#xQ<7@Z*~DxLpuJ_&_Omn0Ts@&?1E2|y8I6yaOs)R2l@)}~Mg);c5_Ny;Gp z7&FpeHKeNEPKnLiXxdrCm^)qdT8dZO`v5B+19>zfCTkqGm%D#|LK2{df0cE_twaI zB-KzmIy&c2j?X6P@VqNa?%9WFj@;2XPckilL2O>N8`UxI+nS?_LZ|F*NG2s1z)1%Vsk;*W>|{?zx=C_*I>0kntgXnW4K^cObcFezJ!SXTFy`N4!W@rG7U%{(t3^MXmtSfZBk=L z=NF{^aPdinf#R`ka5Ovr9yOb+AAmdF^n-7-{{fT?)xs8jxLOfttj zQmwS6$H_Gx8JV|iJ)bwbS9xw^{!TxU>_|3546>KM(NtCtrRm2QjP7&G*F=TLkj#0{ h4d%6*afQ|LnvVbr1aNWv@|QSn_B^X>cs+lo{x4P-9x4C; literal 0 HcmV?d00001 diff --git a/opcodes/po/id.gmo b/opcodes/po/id.gmo new file mode 100644 index 0000000000000000000000000000000000000000..4ad376403f6e86244cfb21131ecfb712476e609e GIT binary patch literal 25350 zcmc(n37lnDUFQ!&1iK&vNC*%Ta(gMNtGixxRrOY>bT{cO=_cuP(+gn>>09sJs(Ss_ zy!&2vSBz0-l7Xl}7-2|oA_Nc}g$Riw0b$f&6vPmak>^`61>Op_z^NA*^LFqf;CsP67aLOo9|wOBJp5u~-T*!d-USZ7#JztE zd@Ju4zSNj^fbRp>gWE50c+%sY;5gqO0QZ330tdmNmpMEHZst7&mH%fwegT}|{r`ab z!4W$7O0WTn?*UNd{ys=o%=woYa|O5tRC#X%w}5X0hrvg{=YoF;UI6|*xCVUg%UwG* zftz?g0gi%qfa}0t0%0{@1D^x_EqFfo%*&0T%jN|hH-f8p-w)DcbJ)L^K)P&N;0wXG zfr#3?A7n_($3d0}!Tq4}-3+R|cY~_`esBc*EU0n( z-=O4s>00-GHAqpW?D4Ij`3fj`{$Gzn46^!t%;O!P_&)}U?+^X= zRa7dzD?!Pv0;)fEg5v)LQ0@I9sB!&kQ0=;$7k%FeN{%PN2s{I-{da?E*JnV<;VDr4 zKaa{ak1hwLUt7QkJOrw~s{j5DP<$T-)&GY<{xg5YKN_#gP!5&19aO%fAVX-*`tSFG zW4u4)@kvnaxg_VtV;87?p7wY*xRv)$fa=$GLDhF5l}F$!J)ZRVBcSHZ`#|wM49brD zg~!zh0a2Obpz6I1RD0hCUI2c|zds79oF_oZ_4{eG@D(2Sd7K8-t{(=)|9((<^J!4^ ze8ayFFqqHheF#+gBq%wb09Ak0r{4)`T;2^z&mREQ{zpK`^LwE3znqV#q`4B59hnAI z&S_BTZ};Et_xLcV`o9c52mCXS{|l77{~vfIxEkZBe%=VGz8?T3$NNA;VIBq5?tcJf zXD-IbsvTQFiZE~V_!Ax<2KmqY4gWCIW&?vMJ-Gptd~OC+&QF1;zWD^G_CF4aPey^C z<`PitKLV=$7(^A!Euh-{bD-q*EsuW>s=XI6$*%zSfvdpVz-NPR0WSdG=JCDYi+TSD zC^>!xya;?8jKJ@Ks`sUnuD=st>lwzp4g}0&RI(fVB6t;e;gm7I10Dx&1y|F^`@o+D zKMY>A!>zx60p7uTVJ9*HzYYF4xMvq-gO7oCfy1wK>+Hus$?>|Y9L{_EASgL~3EU5^ zqA^TubJ*i8pvK{6K#k|uJw9uXv%3@E0lpW(ec%J2^8YQUd~5c){@(!7L{kS*0dqe{ z7tA+7L}4x`^Tpt6!54uwP~&t5$W$;7g8XN`#Xrh7Ok<@#GvFY27byLF5Y%}8D)>_H z3m(4>YTVAd+KtOapx(EF8n^wR@|^@<4BqVD?*ygS?*^q84}mWOp8z#)&%4Iy-#Sq5 zhrmn03b+RRQ7{5O3|%cBh<6HOd9|V=}s~(?qt>fPUYCa|4Rp9L)s%strQ62LS zAS!BhUgzfh8Bp@Q2UI^F1YZDt+2a$S=E2{2yx@@Q*E&$&r@-~#VGz?~&U*ZLQ1bl) z5EVAx^Y7cQcl^h|VZPrAYTP~uZUBEB+z37et^;3!&_=+WpyYE3RJm^fCGQV_;`u6ZjCA1D^mT$BU1;@wpyU z`)i=a`5tfx{6$dn;47fo@%&>>4|js<=Lt~rqYf(Hn?dp23##7V1~ndk14_OZ9Cz(o z2WosyfEwSkU-Vcb$#ou7|K0^g z;A5cX=Xb%iVD1KoulCpi)t-Amwf~dgX7EXmm%Y~Y=hdLb=~htXydQiX_*=#5T~_kx%3UIta}o5AOU_ksi9 z{T@FKN>6_SoCKc)SA%PAbpG%@a2xMG1nvfZ8I-)f2P)sCZ*t?c8u;1=)${{3s9 z@}GZ`QN$(Q}dw}7`mpYZR3hat_opN1sQ{|-qneisVQQGS&D zOC7}Y+2@NM9|J!FY23qeEkFJc`Y+Hu(3_zG)PnSU(}9@-pXq;}1TTW_hHiv@9{MEo z>(Gawvyh$#9N2%i^Y88cU3xzW9fLjs{Uj8gulgSmsQIqvYUtOX)6mDE{|M>%3Y3R_ z5PB{2QRoPy=Z~SUL4OXt5qdEsee8U0a_B@mt_8``_;fi5|7Cgy%|rTm}6%=zeG)^!w0HKze=@ zx()i2UU+^MYC=B;?Sj@pdS36q{4n@Z=-beLh28`WLx-T7p&iisAU)rJUZo#AJE04q z2cb7We*%T)t^P;J;~n64plhIM=nS+Lsz7%^pN4LLo&!A>`VUZep5#XgjfD^3JE1F} zclmGs9{e0M0-b<<3es~5x)ZtpszNi6o}vTmXZfGz)%iTBDg1NNz-Hb|2k)V9gZe zL`xK=@>f*Yo`dbO^7XM?HLfJ-PSrsL;W^SMR-4h@BV$n`nJuQxq!C%ZD9-0=je^?S ztf@tdJ!w737iWreA#UX7ip?b7Y&DY6rLycxX5v=4ITcOEDfw#EXu4R98}re0qWTKO zG)~i`GF?szqgJdl^+ss@o`anYajn1l$k9HHj@m8Tz31S{8dPmnl14G_YMouW)@%CL z`gE#YsT}6cWOC>?iU)33Mh*k3R;@yO|8fI`4lOlM5?Nd=MEwVBDV6CNOHGfCy7~#D zOQlt5f9b5O(r$^Ff$j;t`{iJIXZM5ycg1O#GljuybIX9r`oFhLk`MD|7y}Rr~ z2ag|)YD^|HeWIJbV~o1>1uKFdHp?zW+pYb0t_8%e%4TP@0EpknzPjcEN~ zez-HIXD(JTVHmn*5+!GwNi~(arpe8%q?%8n^&9);X;ll!OtDJoeY5nhsGX_1N$YlG zDZ9+z*u>dYt2VT%rE2X=b%Pl!&>I#2Y;CcbN*kqgH|6WCn`X-KY>NA_2urP=G+4`S zYR=bjvEWMU zj@ilKAvKmpBl|K5gDGwBOeb9L`lRl6!)!Tkh#OUknu^T&eMg3)+RRLvG^1Jznu+Mz zY%*%rA6qoVi*VQkVY0$niKLN4qULVM(l(fh@to{hpIXe0nO4e7nq!V!52m zqJAAVuH$PR{VPh5^lfoX?M$`WD3R6bww7j$Pb;zU->w0Jj#!OoyWVQXZVbNc`q)|c zm?d5~(={|osDAHhd2Gw2T(e1)ku0}m(eAp{i)bu2zSZoRr{!7_C7}iry4YZo5apsu zD{ab;Nlqu#QM0dB9co4rZZroWD(67XM{A=(Qcn<9H9wDB20W`~Ya?ySPekr#qXBcE z!ed{|!M&PBR-)Rb`N3p#)*swEB@yRq)fr|TbJ==bG_KZaU}#|R83#HGX)DAzmqB&W z8wS%Gqq$gRM;Ocsd#5sL(qK0^oy(VHed(8N+6vgb&Qsh(u2yHbSl`XT_SXcbG4{)S zXHuE*WCUiChPA2miJF@(zw-}P(}+yldPg%iJ~63r8K2m`6xZg7?b|G$ek{qkb$mkQ zZ5$(q_&Y zlZsmchGo34B{Y#!j3OPv`3&xH(lFP>)3`c4)8XXNvqSw;GMi%!M_6Wt)(%COCR`Vj zeHvZ(sUFWx_4!(x>GL&B`thcnyw}&z=5j6XbY1g2t;A&(gP_9ZaJ4)itxM~gYU{?g zMx@rxAS>}U=cM3vTs>dY^KD+7&n;cD@otrNtG7Aqzjv*Q(IIc(rjzEGB&kL@H#KCj z?A#bNN5cV5nRA>_svV|wQZSRDl*X9dkTNwphmhB-McDKsnz7%f(|97Rlvq_T`d=_(z`{N|BOz9!V=}Nr999q_? zW0`X6I$(57S+<9W>>OJia&)))H9BF{cj#v3JB(>&kDD8! zQZj#r!%w8=tQ?Em)kib-v|MYBn#_}Jq>a2*dh2ZYWjQ}rV&Io$QGF;4tih!@)8GVk zI?k7zNpKd%#BGV0bZg=fb`iZ)cxOK9(b!r-{zBM65}piTxM|Nen4{(greD ztQMQ2b0ad8xQ08e@$m(8a5bmP{h91;0!7w(CPiV=hFWZrt%EggloC3b`c>G@fSRm4 zL%eNEj^p>93TOqpgPYtoB8+Jx;hsVBI#~A6=sM<(+d}w#fwA7OCMOyccK6e4HZ^?O zfDagVAdduO)*xz+Z0$@?BfE_$v)?sL{TgeP)=X#hD>L~<#5s7$go6R>PS?8*@hK3+#QB&@ z*moI5Xlki(T66^2-)>iKzdP?4-)KBHv1IDx5~&lpD>_o00mCk660lV%HWv(aWQ zSkZEFGcrCh!GcqsAI-94J+M2ArdIg4a0;K^9|D^qaEWtr9@~rJDNd`Rm_cNl*z@}|bv97dzqFwV7De~<%D zW?LtlL}1z{O~J3!=}xr1R_6rK?ji;Y!vnCntxo4m!X0IBRASib>0O=*IDF1oT8n3C z_0-bxwJe&21Ge(nu1szdYQHa5PiIfYZ4DD!x59inX_Of-*=@hIN^`q3MoN*NtQ0ca z(>r@Q7he3~-GFKP7315cPy#njHOk~rb<`l-uDxZZ@!5!Zr?YqRcG<^%y96@OP=8iv zoyfSsHY~Hqp(b?FZ~nRUum^5UgGz^CcQenLOYgx1_FIxh&G>2NcDC!?%8Y*J=i&yQ zd46bw>BjM={XM*5Zf^xT-27qFtksx3)p<-bLJtNuZGX4c)n0hW*cxn$3_TN!#&GoS z=Uk1=1>fA+Sf?-B=AU7clF7n#T4z?yqN@V(cQlQfy!Xd1d*mK)6-qZYQ9j%CzNP){ z3gx%~t0Z9szD)RZX-4~eu0MUzoSw@Y;f_OIdMg|w*v&taTDG&hY5rbI44nyQ!c|G; zn1l*)hwy0KayDR&G-{_XRJntN+-o?(X04kdP3L!<=#EZ|4IE7rVw5|S&K3)~J+0X^ zcf3aEO>36Bk!q`1ET>n^R$HUB#_Yh6!^d-bwN;>$+&=adQ_;lO*cCbbw>=u)GBq~2 zaf~l8=8h((?QKXW-}rcLd^{Q-pBfw6IJOo^k59cQsl@fLO0x4TiCiT001*SBUH zwYgffBj&?RC{v?$)qFfxtBrDTw~Kt$*;YK8b5i?h|ZZBi5#gUius&^DdlG?NnhsGhre zf0gTCp0S`CETAcOuBAAIII8O6>3-Q0ms)68(kR3!My9|R<9rk0Rg7$5Y`k2V;Y@A0 zFt47@D10dNfzU2j=+kH+PL@WA11x&8XtY;P<%(hY=cxSL#j|MiS5FHS=oDJmF~m0Z z>tAm$v4H(U!FpONd7=(BCM>i%4C+!!ws5?c3<~S1HCwASA5?vZ(3YyTEziZY&I}y3 z!JnEkTHX}K*oaDVt+bU!iWCc$fzz5^>rg1pvc_rBaz8m6R|i~F81Z2W#X6E1nuP`1 zFtKwfIan>C!`6r2)L7s&CBZXjrPcYE=GE!MT)RP0saA7v9I28Q)#wxLadxg8wV zpVaC`5M@V>B3FRkNY?&aj#S6(cj-eCyCji^~H#3gK9DbX>}A`xYBm=Hx$ zB1E2WGR2VjjAcx9DX!C$g*A?N9_qIn5Ip9nr=;~8U1ZtHGS`W%ROp-BFx%2~J3{kA z1z77WbAZ8&{@_Wfqg^R?J0=Gf8RD zhNqPfOVW(%c!e#kErCgLG>U0cjN0;L^vmpn(GK8)v z(cRlBvTc7y?Aj5WMf!yrw8PhQ*H$P-Lj$v9WDLrzz@7ddT%N!EStLYaVxP&Rq#J zrYkjk^dcpg4eR8#ni3fQDW)y+th(B6o3z_$0b6bbqB^0SVw_5GOFIg4h)AN^bnLfE zC;+iX(hq5&I|sH~i7~TRmx9wwq!Q)2i&r}Nw+_7XY^d3R2xO7NoT|BeAt{6)Lu8Zf}F~<*HhYR7g^%y zuD53jnKp;X)1x0Yrmn=_2M|-Y!W=G$h&(R7ZiTrNYeyc%+PTw?Wm~pg{F5u?o)q^= z`!FVE7ms&srz^0)n3;BRFlB`0b%*3RtFl;NUcUks&)*KuJGXoxI4@vlklwYj^4MJr z1}963){E9VrH$FTW$}7hoZbnyCBV3JOnko}*mG{4-Y1+CnF-So=6`Q6~8XrL<15zUu~#6I}gqM~Ay)jxiOrIkeXkQ;{>B5=z)#D8w(+ zjhwr$V){vZk9YO@J9X`;=sFkNex22Ko@oS6sEf<_g~#yux~4%#P3#~X)73W4uPe9K z$~0zY&T3@i{i{Zup#`-{A0ms-OSNxkS7N4t6k?|Zj*pO{6hdK_^h zDF?v@1M(~42tOYjX?H*9R_g^}fk!$v30-%7u1%RE;vxjkh1<1=xrw(T=MqI~M+*i; zE1tqfjjKj|?R2Fp#1wYi0yJA(ndH*=RGe{=L-Loeec)*J)mcZMme~ar=5kA1oDe$K z(r4#N-D!DsHtaA%_+Yfr^&;1Hu{lwgrhsZTiO}H8ICF+7lic=+oI@T03j2Sz0fo*l z!9&HA*iZ-Oq|-fx6!sV)|5X=|&NlTpR!$1uqI=or<7sU%z2Nl`Kcrl&qb(uQ&;;e` z;w3;iCV0>0_J5g#dwhzu%C*@ig{HLKe_8V-GIX{i%d||HCS;=7njiEi=2#lJhA6{s z2J9A$HV`lb8&>VE#@#Nvki$i@_{hWMa)fOkPQ4R6haS>6&cl1#>oc|?@yG!r z&XOsjoc=_`3qM>W5UXOh4!SKV$3D!_@mM`vG}W26OpmOGuynqlu-3!z1GVh_lSs!t z8&DtZ=o+_RZ{aHN0gub`Y>AfTnOvGhLxk%T*Cl5^{ayUyjG`WW=%YQ`8kXf;mN|=k zJhwb9_;Dq9>a>aIN6+f4pe(z!YrY58D%$-ge~G}vw=KskIc>spVcl#9q#JhUb5e*R zApPMHu`$lZOaJVFL)gi3)$3}lC(R-Olr}1I$#GaDvBwfCNOEPI3Yc6e=SnxG3Z(2Q z({;NL%Yb^{AuN-++ryjQe4z?0G5scF-%Q<=x!@pI5H1KuJtgNSgtlVx zb@YUSsFp&E>qLkeoLbII7GH_Y(Sqy;+o?pjJ!GS(R2ysQYI5m(w}F;yPpyi$ukvPX zD5np(>`ZGq<@2rRObH8W$G1_6_LExknOVtU-YE`8%lr{Mdg;ov_CDqQhLJ@(?EZ?g!A3F7`a*=DT_%mQ2s%H{ zekzF5{hu95kxzEY;^H^MEuZnRn{^g63<%}7T#%-2j@Sv5lj$P=UlM#gG)wx1rEo!< z;Xn`%gx<5hxn>i;>%5WyPf#dEvR&#oP+RecVHIpWocs1F70i~{XqpC(j^QFIfgeIDu> zm8rP%2NsJ7B{jR7a5162PwvD)L80<1yMjWyY{!zBI$}I~E6PSARMhenb>!)($OVRW zwa=Yl^hAdCWb4W>Zfmizq27LQDlbh$Z3r%xV!8OxplCarA{@W$VH;CA{5)8)1Y z_&fF%$_cC84lh*-a+PLn_r|8nJsdIlvf-#U z{4@&V-cA41QEk~59jdWJEN|D3)W z^9Rp1hF9|;a6kBA@J1y($C!@;`@s%4a-lKzfv*N1057=6n0fHS;48t)E;i;4@Lk}& z;NSW8*FV>oxA6W1_$y$1i7{i~nU^}8^mscs#rM~MyTFIRQSeERFL<6Y8+hLhD*vL# z2f%6GKL_pwe*(T3+(l=__Zm>;J_OPg^B3S&@NYnsx9$bTYy^*j%q|%8Z!aj0$vHe79`2MA3O_u3_J(?3P_jDcRc<*xQh1+FEfUwn#(}F zUjx!rvlqMoJPIOe(*_w5^9E4mzYA2q9`Whl1^H+GH~&$zxioO)Yy}ayIRYwQ1EkC5 zP2l<9?||a}7`Pq$8u%jc;?>5i1$Tf9p{ao*;630T@Xg?E@JrxT;DrcB`F4V8ZxvKO zUInfL-vLT)p8+M`|LWf_y22QWFxx!743r#S4N5NW1!urVL5<%}K#ki3Oq;+xAsu6AAGalOaA9`69vj=RA%;M+Yu0;>N{fLDWm52{}q=&b6w z38YEpZcuW)A5{PT5Y+tm1}M3oO`)16YeBW+c2M$Giujr zQ2cv9&6hHG9(a#`e;X*deGpWAp9RkYp8zHQ{|;(ipUq@YdoKeezeAwr)p1bez6E6J znTJ5>jW2^L?|VM|3^MEc3q4MQs^>cJEbumuB~WsXz-z$!K=tzrpz8f0DEXa_5~ZtV zJE-9{<7PG)h-`H{?Ht)Vvea{CEtM{J#ULoU<5Qrnp%Ps(*(; z@wGtynK$yE+W#p~^?wOu$juKxwfng!3(4<@$2zF?z82gHJ`An`e*~Th{x9%cP?Jq~ z9;o~QC^>EcRo`JS0L!52{UuQSeK+{_GmQBY5HPn>$wBZA@MiD>;9rA30gr<}nt>Or z(AYl(3)>w3{{ipe{if~46u~co?*ylJxc4uBzrp+Z7qhm(&x4Y4<64Igc>D?|c|2>U z+aEWAOa*h&;|D;RYQ71I@1k7}_kb(`6N5K^4}vto{J^J=?RNX;t>Cly{zj0ln0Nc{ zU-R$h>~ZqG0elYW$3e;OUJw;$-VLHk%x6HlVE!7UYi4S%n`bRh^X^x{5%6K~Z19ud zCE(*8zvt7)=Z2$3mm=D`cW2SBy&BcS*m1#bk;-RH*V z4p8gjUQpxkF>np|eNg3`|ML#71Gn)0a{vA?I4M4lmr^K8&fEw}|NJ5-Ill+gxPQyP zU%cPF-v+9GZv`dy-v`zH$3e;KZ#6yYWI6MXhyuS}ryFLq!fj{!^7awx#Wjm;OFb__F z_kscVNf4D{z6~<9&Bccu-%G*g@%}1M@_r|%`Sejx^ZFa0+W$X6mAm?g-%9;KkrgU;&&1&j9tXwV1!MzubSn0lX*o z{!jS*9q0#;WN{g!=Z~N(Ai8YVyyj{DBU$Kq9i(yoF!T*beM_IW@PlD7r~tdSe;1sG zO3>qwp6^3UZSzg&QRpj>Of-Ut0L^a|)(&=(**hoA?b$Dlueq+9+2 zls<3g$1g&kgFX$-Kq2(6px=R5wssr<^AY{Wvk1K&dK08Mre_=U&!8_tr~>m2=-m+N z*8D#7PUs}`O6Y~q&p~?r1lk2%4rv{|82WYS9_R@uf&L|==e3aLg4V+aq4XK$M-BQ@ z=zGxnpc^1Pe+Kd!<_8)`!T2KpuF&!H-$ z=VQZzkdMyRp@@`XP`0YTu9Fb2R;7>{_Q_`JOI8I zdJS|I^f2^lXchEU=xpfA&?lhZgBs9k=y}i%=nm*Jke*LL4?(v>{}K8S6hjw5*Fzns z1?8XhxtG2C{?E`O(ABx``uPlK1bQQMDWvBwpevz&0sTAZD(FTieO}6sP0%I&!w=Jh zK3w4aZs@n5ullr~_xK>V9eM+FpZ{iI#Eb;Nbx|B7)i8)!NiAx&gW_zo5UvZ3@M$ip z*Q3Q+vl1*6>z$CaI1JjIRx65=uuO6sT)y+r?i((jp`2iu!c_i>3fr}>TUMzxS!fm; zVSBskpn~){7}uIfu>0U-5QmjoI|<{!@&(0GDT>Q#ZxX3R!=834EY;>}bfFlRs+r?tzB%l!^UhqEKgXm&b8vS^}F`v z8{%4j-N8cx8Xa_7wsY6Ml{Ki@X@qgD8O|Tvp4SQfhB9b(+-2hT2dX+axRdcmr`|x>E2uRfqe%LKb68qRJheeS>eH0gH=~+ z)w}wsU5z^RGV3mAhpl22$TW zVaw+A$G2=QY~J|)uu&}5ayg#b?3CWlb{hp1Ol_X6B{m^!w}W==WH@3R$u=B`^js)!!&7^qTwjoIhjb_-0 znzd5j%37{~EQ<+(axp0m?5`5C&gx}gXM4E9b}`?9bXQTs_a5HaqX&aVRJLN&xTl$D zb3Ts~XU4c?GUM!HbOV$zHj}XKiyR__eU_ywNA~2fewvbWW#mQK?##{Aj=P$7))$K> z+R{!-hS9Sv9Zf&`Z2^5fbQ31+;YsPoZV&S^JGp*m&Mfd!z9QI0LxM1lqj)A5o!nAC zzQbI>uwZ^Pi}hX|YPr@0on{=CqDr$SlYxq5bHu^eXlXp3(=*qas4x^=5(eS%By6@d zUEAT^ov>L7gR!dy<>@rb;asgr=>xM2uBe--w@FuS%Tjij(aGuKt5&V;H0PVqVsot- zEz=t|0Ca6FX=^rW(%n^Rb?%z07b|Vdk0C5kD~#F8?n+LyFtOljx286ajR#3_UKS-Q zu`wIfYo$~A2k27W1#BiKK7CXKFsx z&PItWYS~(nA~vnW#=jjShB;zqMA!6IGj^izrPn8q!^bM|!kLYjQJNY%lO$}k63p^| z>1yW?Rg}Zy65*uTRV)W3>}tBi>S&Lvdd6t9JYth-jYe3mvC%Wj=@A1PHElv>{=?sj z+6hZ24jW-JS(+MSrVmWi$-(TZ@l=8%anzx=svgUt9o|LFQ=3mSX+)btjO%hdGM%W-X(zIwCe(~o62H%(2eyiHS6%awPvc(yFZVQX8irb!jC zdDEs1n~b*HAsbdV%_@PJfWvN?S;$U_n57LSsx!gmqwUMr1*2C?umh%u)Y4*o)?qn= z?b~e$E6)`ibDmc1ug`%Bf8OsnH^`5^qw~1h?br`4Z2! zVK|@Lx}@XXF70-2bF=^6vnvJ%yn>qzlf^J>1_ie?q_OPUm@tP@2TmP7PFkuRrfyQI zCeu>lNqZoVuU>{_i(^6iW;Hl_qPLF2R$P8R4i>F`!uG(pNhO$?A&2EMLe;lAF*{Az zRr%dw^L;mm?fD`#7a6D|F4pSWG}er-F*+|Ju@YMqD~mlOiQ+XH3~LyqZA@(=GuTc^ zzq%b;o8>KedlPFlHEPpCy|aFLxO%2D<|ZC4?Jyb7Nlg}6PTHFnt2K7V*-ou)oowjc zCY$?myk+d)mGV}?gdMzsI>!8Qk~l@_X^w?PafLawty9M-%5BNP=$dlM9wM^SY;~HW zx7D}G!Y>ZD(y_Wnb{7LTG>Bj%MqaG7G~I7?5?+O+C?OM@!r zfYE-Hv!R2dqZ6AZ+iQk=pO~0%Nyj>kR$vc6&P8r$$~w75HIh9FAxp@AwR+gA&{<4I zPNb<+rCvDzZp62R8D}kNdSE$gFUdsdVr% zy!l3&Qc;#^i8`IFh@8SWK_QH!NsJMV)QPZAYu1v9>N;sYY`yJPoA?59T*+*GFq1tV zFf+A5Y2;ajX)QL%*1@JVK?!-LK^1m0FzzeQP~5z+fIq#j0$PE&f0sKKq=OWPTpVbj zrmA`(*w12cX992N8*AQbwJ{~qSodY13HB!wLq=)f?>9dfX zu4eRg%&n(!vjSe0NwtPI;`FlAqrq8PgBsMz3YVI&8cv5^t2okWWX~ma4zPx`9I^Rm z6Lf04F;|KM9NY6IJ?W!Jdfw%gr$8nq)IPy;`~bal3DPgQ>#w zvZ-5^Nu4fi&80exgkI1h;0T;5<|QnBO<0oNGns1*Y_oPvNBA}tRcM@#AuU|muO6Z3 ztqLU3iFh=1tKem_dqJAOnV?+LF%rAa-Hv8?NYcrh0rQ2Z-1Y4$vZI!EGyATgat2iP zDYb0^>;GYJPjKXA5?h(zLs>VqZW`5JKQWPI$$DUI{6u?gv3v~c+B!SZHe_7(XtMOH zb*QnkmDemSINea(Hrm1^%`D8=+O4>fTEg8eZylzf)L1YvhvgVH&4463wKdOOVpYan zchfqCHz_D40nQE0VeI43U}~m~v6ijz=ePh@UibH%-QTJEIAD04JDSngA~Fq@6jMuP zw)Tn!HLV$KuNf(}S|NrY76Nx%cs}4psW1dd72DsknC#w(8Jc=U7^h~L8{QF8DLM7e zOdO-h+(Ac(s9vwloxrOhFSg-}CIc0z#xg!)8k1lGvGb;0kN{7OEbf)_T4xIUa+10k z98cEQ$CFibKrJ?I>mS>PLz2alXOjp_*AtZ5ee%8pV^IqapSAKw%i|-kxuZyaePJ## zIBvzd1D)PwNr2<0ouxB8OQ)}vj<02C793#p<2{+&A<=#xR!_bsQ?`cbO`Bj|2;({f zCN=DjKJCH|jgeAh$0~))*1KlCXX%S~u8o+knJ~3^hDqSYDWXiAo)ZS)_MH8)8J~@q zHwwE;+AZGnEG(Cy8Dzzifrffto;C7{F~_7#!KO7aC;j1^TM6qBOAJ#w9d@_!tP=GG zNy>gQj3eWhnLBxoxs8_jU8)vi^h;^YI+h#mN&9^dh)fo))AA`fJ+BJLpKBU5 zd1H=W)+L_eDkk0Jbp3eG`^N6OD-?GCT1mo6`7+_tr8%9$xt{bzYxwwp;_0MEe0wlw zK}&D;Hp|~Ri6Nh`m|kOKHbz=_;Q+>|+u%mb!8kgGk}B*g7jDJ9%(G910ZyR5;MC)XIfjol3iKBqB1VQ{n2O*-2{k_O+E}XCjI#BL{CjQrIoSpMnZ| zI3>&k)00#9#it6Bn}VsSnGMrd@jeM-;ZV3>FDv@^aFR|<&TR60`|;Qoj~Gb1|1N?14&78^6co(|y) z!8R6k!YQg*xppD09c!1WG2&O_cZ?j^cVKT<3{w-6BfBFUop^1I*sGg_Yq#}WPS%>& z*vZc^c6%q8D{SfVsimy1!d|ZTbefq7w&;Rq znfqe3o{j=n6tA@>?#%auYso%o2E{p=Rp(HpV-a(#5>}+v`tIQU6|IAAOiL$THahCC zu0_;$js*B7uugD|a8*!66)JG676-HJ`%;jYI?GjwXPGN`AKRr;41_R z97&dq3Wlx%$xhKPJ1v$C7qbQCqs82cqVyqBTW*GDD=!yZqUB{q_HZb%E0py~z*r%T zXq(rznk|YL7j{xZ3u$H0gq#9$dWR_#cWUz^3$>zFI>B8wgF?0PH7IQCX|96sF|B+Y ze6C8F`~+B_E2R(T6*7j~y%M7I!}hUUf9Gu^+0$Id)75+V+Z2><> zjq}xjz_XrUwKUHFzOkzaP;)iO%EDb=leS(`-GG+$@L##jwl@DQ3t)?yv!VK6BiJ}X zx~+)yV^=Oh7!<}fl+PcJm&CF$O%{u#Dvm6ak2|{8*i)ST;WAx+IZ+`DwwbJBw}FQv zd9iL33#Zt&r<&b|u_?xlW65kBhVyn{>DvNVw(cr74R*WPOF}*GO})-e6C=j`jQY*3 zzEC$Ve6?p1jThGDdqUm%Qc_{#LrE)Bh#PyabtZ)zC5gjWnSf|-fOlD;BW`s0x@r4UDD&9V&2jQcfBYs=#9-K z3wiS`XZ_PzW*qj@!KflnQG%y#L5?4eVeC(cpGz{uzUgg}(2KN3LqgyV*F&b34t9-N zxg6GO$FRTBNVqV|-)$VTx;Gjwt)iDD9}<^xbUpFSVzFVaXX|uN65trXvl7a`y(Bu0 z(+Pis;;cO#v26boWtHv7gF@wc20Iv2u-v$fmMhqOTgxIOEX0P&VYb;gIeXNdF#F~M zB1&*RTQwCi8|I~YuOJ#I7b$10J!YRfS1QwNSmBJ{ashM7yfkQz(ZUaE56oR(X&N=h z;+=D=9M6!Ap9>l^qc?iamOz-2LhxK^i0mI*RyT^yHoxB#S;XLO-@iDLDn z-P}q%RTCAtmjqi@oq(#K3+t1B8J>CVzsraCx$;k) zzdz7#rTNwk2`!unb}Q)FE_m(qcpC{8?ne7%8(>P-(XikAz0be~($J&QRP z`!^sp^~hWO*bV#ZZopRN z=-W5kdNO-LVj#Ur(kfKIpS4{S0yt+w1yKh>*{)34Hb`q^(SJ-LtCy@!it5?-o~1hx z9FQ_kI{4JGkU)Ofh(Httv7AIhAM$~LEHSPnC^+)lWR~KTyDx^AK=uD>pMMC`7Ry8! zq^l+4^4nLwmK(k7oX)eMfwpV;rSGk{oBZa-Zf+eUcy*UV2~u>A5PW=~GtlkWwd+_} z)nak}SXZ7h5NJT}RnZb5r>0hqU3atp>eYd+4su5?@3QH!@}0Gq%3af23i~9kS{t@# z7oI;5IM!P+#I#lBQ?PE1Sto1MB4lZiF-ec)Yzwl9md#|N1$)efmE?+A)gnIrTunZx zvZ+7CUADshtc2vbc+BBhb;^^=x=2*OiMIZtW!V~vb7j2W*n_#|omvpuLqk?%KG%vn zwKQ{Yw{Ej{0&Y!ljw?qTk3zXmutT{=C=&yyO9R{BovAq7Y9rckE|{`5m`MW;Z_BSv zZS3AoC@AKT7(|nvDSEFfyM~DiJX{HvYDfR#R7fLdaYEN8dSNIz?Bo z*F49#Zpdune2!ibrh$pMBAt=jKS;i8S6RAIq~%79z(pz|B5a;C?;)LFl?T-m+yLUDn9c{ZP#^Gr;k}*y8#+H^W zJJ&HQCS$+>7p z#|mGAziHztFn__EvD%QwQ*z>23FBFRHH86h8{tlmBgU51!_gBCnd2SMhNbzKPd3W& zbn@kbBXijX21i!7;LDA^B3?S2hV3DsZd3SUM_zlZXn*EIr%V`kmeDcX?s;7g5fK4Q z0J|`pfYQa%8%kO5vw_^Ut+|PW>x*k!7jfCo)-!Kbp0{@baULCXKph=j_Jo?ZF4D_e ztB2Fj%YHLr*$fKBJiQDXPcs9dn*9~Hn9Oiap_tusy!DRd!ZV}#xH%PPPjKc6Gju~U zdo#3_HpK^Kicd-oHO3K$b#2w2b3oYOHM{Cm=I+pII>?VY&oVnK~alm;}ZQ<0cK+b*{59IIXl0$`)4fF5BN;8+9Mh=C!Z~Z}{X=&&)&7%bj>KwP<1ShgM(Mozsb0MN~D|-!B4QFR{ zYRU@Cx@ZrAICV<%1@@;Ffeg4`a*mml(H>`S_Pxt&B7ZPCs*usN?5>M2vkhhRcN8<) z?JP&3nA>oBG_s+esU^WhgOs-&dE!PZ;mMkh938~b8$MdF;iLV!JmwmgJ0NY-a)>#@ zRhDcnl(e9emg#Yno1=H;+~y{WBF!8LvSr=Pkpe`Knv6c~le3soovjEeO`}RR4=jUX zOPmu}(Ir_xDXL*1>R8{k^9#BgbMM5oUP?u*;k(l%bzq}PB_LTZF0QoTFOvpRq?CoI)I%|(#{-(QQgIx%GpB*5eGPTqdM}BDa-zGZ(o7Nw#hA) zAdOF*j|hXUo8Ac39Haaey&<0Wxj5I&#)Ju~hn!05g|sAJ zJ)eE}hU=34BBGg#T6K$@KxVdcuNZCRtR8n{b*tH4e~wXvHA*;oxQNvS;#Ta>G+=c( zKBq_(9b&syU68l}Ru!!p$o%O2<0i3p z3$;g+oIGfY>$@)#CDv^lKeYuQHCtc)#uWYTZc4KsSsZJcVm~O5HT@7S31#i3_%SQw yf?3l\n" "Language-Team: LANGUAGE \n" +"Language: \n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=CHARSET\n" "Content-Transfer-Encoding: 8bit\n" @@ -110,23 +111,23 @@ msgstr "" msgid "must specify .jd or no nullify suffix" msgstr "" -#: arm-dis.c:1990 +#: arm-dis.c:1994 msgid "" msgstr "" #. XXX - should break 'option' at following delimiter. -#: arm-dis.c:4357 +#: arm-dis.c:4376 #, c-format msgid "Unrecognised register name set: %s\n" msgstr "" #. XXX - should break 'option' at following delimiter. -#: arm-dis.c:4365 +#: arm-dis.c:4384 #, c-format msgid "Unrecognised disassembler option: %s\n" msgstr "" -#: arm-dis.c:4950 +#: arm-dis.c:4976 #, c-format msgid "" "\n" @@ -134,17 +135,17 @@ msgid "" "the -M switch:\n" msgstr "" -#: avr-dis.c:115 avr-dis.c:125 +#: avr-dis.c:115 avr-dis.c:135 #, c-format msgid "undefined" msgstr "" -#: avr-dis.c:187 +#: avr-dis.c:197 #, c-format msgid "Internal disassembler error" msgstr "" -#: avr-dis.c:236 +#: avr-dis.c:250 #, c-format msgid "unknown constraint `%c'" msgstr "" @@ -379,11 +380,11 @@ msgstr "" msgid "%02x\t\t*unknown*" msgstr "" -#: i386-dis.c:10671 +#: i386-dis.c:10774 msgid "" msgstr "" -#: i386-dis.c:10968 +#: i386-dis.c:11071 #, c-format msgid "" "\n" @@ -392,126 +393,126 @@ msgid "" "with the -M switch (multiple options should be separated by commas):\n" msgstr "" -#: i386-dis.c:10972 +#: i386-dis.c:11075 #, c-format msgid " x86-64 Disassemble in 64bit mode\n" msgstr "" -#: i386-dis.c:10973 +#: i386-dis.c:11076 #, c-format msgid " i386 Disassemble in 32bit mode\n" msgstr "" -#: i386-dis.c:10974 +#: i386-dis.c:11077 #, c-format msgid " i8086 Disassemble in 16bit mode\n" msgstr "" -#: i386-dis.c:10975 +#: i386-dis.c:11078 #, c-format msgid " att Display instruction in AT&T syntax\n" msgstr "" -#: i386-dis.c:10976 +#: i386-dis.c:11079 #, c-format msgid " intel Display instruction in Intel syntax\n" msgstr "" -#: i386-dis.c:10977 +#: i386-dis.c:11080 #, c-format msgid "" " att-mnemonic\n" " Display instruction in AT&T mnemonic\n" msgstr "" -#: i386-dis.c:10979 +#: i386-dis.c:11082 #, c-format msgid "" " intel-mnemonic\n" " Display instruction in Intel mnemonic\n" msgstr "" -#: i386-dis.c:10981 +#: i386-dis.c:11084 #, c-format msgid " addr64 Assume 64bit address size\n" msgstr "" -#: i386-dis.c:10982 +#: i386-dis.c:11085 #, c-format msgid " addr32 Assume 32bit address size\n" msgstr "" -#: i386-dis.c:10983 +#: i386-dis.c:11086 #, c-format msgid " addr16 Assume 16bit address size\n" msgstr "" -#: i386-dis.c:10984 +#: i386-dis.c:11087 #, c-format msgid " data32 Assume 32bit data size\n" msgstr "" -#: i386-dis.c:10985 +#: i386-dis.c:11088 #, c-format msgid " data16 Assume 16bit data size\n" msgstr "" -#: i386-dis.c:10986 +#: i386-dis.c:11089 #, c-format msgid " suffix Always display instruction suffix in AT&T syntax\n" msgstr "" -#: i386-gen.c:459 ia64-gen.c:307 +#: i386-gen.c:467 ia64-gen.c:307 #, c-format msgid "%s: Error: " msgstr "" -#: i386-gen.c:591 +#: i386-gen.c:599 #, c-format msgid "%s: %d: Unknown bitfield: %s\n" msgstr "" -#: i386-gen.c:593 +#: i386-gen.c:601 #, c-format msgid "Unknown bitfield: %s\n" msgstr "" -#: i386-gen.c:649 +#: i386-gen.c:657 #, c-format msgid "%s: %d: Missing `)' in bitfield: %s\n" msgstr "" -#: i386-gen.c:914 +#: i386-gen.c:922 #, c-format msgid "can't find i386-opc.tbl for reading, errno = %s\n" msgstr "" -#: i386-gen.c:1045 +#: i386-gen.c:1053 #, c-format msgid "can't find i386-reg.tbl for reading, errno = %s\n" msgstr "" -#: i386-gen.c:1122 +#: i386-gen.c:1130 #, c-format msgid "can't create i386-init.h, errno = %s\n" msgstr "" -#: i386-gen.c:1211 ia64-gen.c:2820 +#: i386-gen.c:1219 ia64-gen.c:2820 #, c-format msgid "unable to change directory to \"%s\", errno = %s\n" msgstr "" -#: i386-gen.c:1218 +#: i386-gen.c:1226 #, c-format msgid "%d unused bits in i386_cpu_flags.\n" msgstr "" -#: i386-gen.c:1225 +#: i386-gen.c:1233 #, c-format msgid "%d unused bits in i386_operand_type.\n" msgstr "" -#: i386-gen.c:1239 +#: i386-gen.c:1247 #, c-format msgid "can't create i386-tbl.h, errno = %s\n" msgstr "" @@ -829,26 +830,26 @@ msgstr "" msgid "Value is not aligned enough" msgstr "" -#: mips-dis.c:841 +#: mips-dis.c:845 msgid "# internal error, incomplete extension sequence (+)" msgstr "" -#: mips-dis.c:975 +#: mips-dis.c:1011 #, c-format msgid "# internal error, undefined extension sequence (+%c)" msgstr "" -#: mips-dis.c:1335 +#: mips-dis.c:1371 #, c-format msgid "# internal error, undefined modifier (%c)" msgstr "" -#: mips-dis.c:1939 +#: mips-dis.c:1975 #, c-format msgid "# internal disassembler error, unrecognised modifier (%c)" msgstr "" -#: mips-dis.c:2177 +#: mips-dis.c:2213 #, c-format msgid "" "\n" @@ -856,7 +857,7 @@ msgid "" "with the -M switch (multiple options should be separated by commas):\n" msgstr "" -#: mips-dis.c:2181 +#: mips-dis.c:2217 #, c-format msgid "" "\n" @@ -864,7 +865,7 @@ msgid "" " Default: based on binary being disassembled.\n" msgstr "" -#: mips-dis.c:2185 +#: mips-dis.c:2221 #, c-format msgid "" "\n" @@ -872,7 +873,7 @@ msgid "" " Default: numeric.\n" msgstr "" -#: mips-dis.c:2189 +#: mips-dis.c:2225 #, c-format msgid "" "\n" @@ -881,7 +882,7 @@ msgid "" " Default: based on binary being disassembled.\n" msgstr "" -#: mips-dis.c:2194 +#: mips-dis.c:2230 #, c-format msgid "" "\n" @@ -890,7 +891,7 @@ msgid "" " Default: based on binary being disassembled.\n" msgstr "" -#: mips-dis.c:2199 +#: mips-dis.c:2235 #, c-format msgid "" "\n" @@ -898,7 +899,7 @@ msgid "" " specified ABI.\n" msgstr "" -#: mips-dis.c:2203 +#: mips-dis.c:2239 #, c-format msgid "" "\n" @@ -906,7 +907,7 @@ msgid "" " specified architecture.\n" msgstr "" -#: mips-dis.c:2207 +#: mips-dis.c:2243 #, c-format msgid "" "\n" @@ -914,12 +915,12 @@ msgid "" " " msgstr "" -#: mips-dis.c:2212 mips-dis.c:2220 mips-dis.c:2222 +#: mips-dis.c:2248 mips-dis.c:2256 mips-dis.c:2258 #, c-format msgid "\n" msgstr "" -#: mips-dis.c:2214 +#: mips-dis.c:2250 #, c-format msgid "" "\n" @@ -994,43 +995,43 @@ msgid "" "the -M switch:\n" msgstr "" -#: ppc-opc.c:878 ppc-opc.c:906 +#: ppc-opc.c:879 ppc-opc.c:907 msgid "invalid conditional option" msgstr "" -#: ppc-opc.c:908 +#: ppc-opc.c:909 msgid "attempt to set y bit when using + or - modifier" msgstr "" -#: ppc-opc.c:940 +#: ppc-opc.c:941 msgid "invalid mask field" msgstr "" -#: ppc-opc.c:966 +#: ppc-opc.c:967 msgid "ignoring invalid mfcr mask" msgstr "" -#: ppc-opc.c:1016 ppc-opc.c:1051 +#: ppc-opc.c:1017 ppc-opc.c:1052 msgid "illegal bitmask" msgstr "" -#: ppc-opc.c:1171 +#: ppc-opc.c:1172 msgid "index register in load range" msgstr "" -#: ppc-opc.c:1187 +#: ppc-opc.c:1188 msgid "source and target register operands must be different" msgstr "" -#: ppc-opc.c:1202 +#: ppc-opc.c:1203 msgid "invalid register operand when updating" msgstr "" -#: ppc-opc.c:1281 +#: ppc-opc.c:1282 msgid "invalid sprg number" msgstr "" -#: ppc-opc.c:1451 +#: ppc-opc.c:1452 msgid "invalid constant" msgstr "" @@ -1077,12 +1078,12 @@ msgstr "" msgid "unknown" msgstr "" -#: v850-dis.c:365 +#: v850-dis.c:372 #, c-format msgid "unknown operand shift: %x\n" msgstr "" -#: v850-dis.c:377 +#: v850-dis.c:384 #, c-format msgid "unknown reg: %d\n" msgstr "" diff --git a/opcodes/po/pt_BR.gmo b/opcodes/po/pt_BR.gmo new file mode 100644 index 0000000000000000000000000000000000000000..083e8f42199b2cefcaafcaed1d421bb0b5fd0a78 GIT binary patch literal 8467 zcmbuDZHygN8GsL8Vy_=SEg)ZdT3FgGz1zFnUAn#9)|OIWm3~lK&`6ZoJ7@1snLBft zkKJwkVT>Ws06&PD=nsMkiHXK&42cPWUqt>GLyRFYF_EOfhM*LG6ivVwecp3s?wz|I zu&a}ueeTTpde8g5=RN10H#T1W1I6_)_s!g|U#iqM;Zs-ekLx>ED)m+PUHBPz9`1qf z!)z8qe+!D7&%tZp%TU_A2I)fm1@3?spp1WGO{pfl6OO{ip~(L{yc7Nz-T*g!La8lq z1P;Rop!EL@I0T=Dx55|T9q^9@FJto3@6LiAl=|O;Qt!p${rQ5|e~P-ipN7}NGf?LF z43v5P9BzWI!V&lF;My+lJ< z7rp>7k@`EtmDKwXk<}$Q2}7%^p*(9SdfEwP+rnjmJlp}_h2pn2F=^4$Za4;0*n~fUlkgmr zer{y)V$TUE`u#dY6!kO|J3bGk{cqs}{5PD0yAV$75*B~-ng0`T6#fz-x;h6%&VNA}Zxcew`kjK?;iCnggrb*U z7ksDS7KD}gei=&nQ}7^s1rjpU<=Vx)tDvlto1yqoqj)|HnWFj%l<{&X^Z7Bf>lBKd z=b^O!54;2(=ibZxMeZxO<=XFH{dckyDY=vvsOYAVkE#sEgJ^YaQ zhzyrrrg^K=D%6 zlU$;w`?*hXi|xcu<xir$GF8#hq>jtllz4I#U52qAU-M=Zf7r9V@J97 za6fF{IDagD+8FRLd8nP7GkP`-!+0Tx+WO#$BRcJxRxlg1v>&8inwri`Xc8TFvmlOA z?IlL1dAA!Unel0v=sY!gA;{)x8C}(B&qHgjSyQ*_DZ0=mN#dlbhZ>WM`*{~cnMooq z9PHj!+M)9(F|D{A1u30(Vjnped)rWJxZ1K;**CL6RH1 zJr>0a(RQ`1_%*D`cg)NrUgW1bJJU7D>2L3qZC6vXdDN1b>sIU=3iqq2APh~L33QP) zNGX$dtIw)hY9&Vn3~Kw!Je13rDS!KG3dyaUIx+1aMNf9XgT9}bG}Vp8p+${C<2=*x zte%OPXF5_-cX_^Ud01h{M^)*t^gom~hkREQbUMZlyv%5`h{&l(Y}@n(p?)_`vmk0E zremUPd1+!+DU7_1QFq7D)(qSECP_0?sgbj$?(1;zQ%x883Xz1F&6>nSEhAEfUYfx) zOLD8^%{4W>x+42!g-hufW}bGvq*ZtN9GPqCEko&+9eU{2k;!neWTo4p>1r+YzJ0cb zwYMn8DA{k>)JNl}?wgss-Ns3+!M9~5&Fa=#od8or?O`!L#!~ltGbW@~G#du3EVXM& zKYC(u>&hiP>sb>#*zv-!bY;EZr8p9pSaTQCFzz69m>;w{0>!SGr|YxTX9N zy_YTKJKh>w;9_E`kLb6XAj2AGh|1O}b=hK2YA?%7r<>_47Axp8dM3zFxQPhMBFY__ z2wm@mQYC(0S#bK%p^=G3x^ z#`+-3oDSLsXY@r(d~!Y2SF2kDLEE)zc@ltHnBT1$W@wTO->WJ7xf^;d8`rdxiV$iS zM=_1nYYd3Krd9(|p`{p?XzS2OoJ)C@ebvKJu~Ld1bg5gXyK-ZpwBx0Zss7sS2|hSL zFS5JxPR=kh#QAv>Eo&@O9+;54a5V|si~TK!N@0wfIMoIbeFqY~B0rFgkd4os1yoto z3kGr;U;}79rak{Ove><3S*>D`7GB!*Jy{6qbl&OeIa$Pg2RqGns6C{_bJ*}g_Ig!B zP2Gu1CyqF!AZ~gl%DhE}7Huo%h|a{ilZRQ*CH&BSyjnD4vIWC3sgE_rC#`StWA}O`SsxAJUv!q6XHcawbeCi#+4@?w-VH)-@66l!xD!8Q&D zrX^>()|{6R7g}3)aJ*wvx4(zgT5A`^ssx!~)jN>!%N}q_Zs1JA32oqUJY4eJdlVLiSQZ6?aBvlKpfMwR5j+>L-oYY3jQY?`#kTgyrL$>GO7O zI7v>0ez!i89GLOWdI>EfCK}B5`#3UveQY}wooTsB@!+(qN`Vp6(i0_NaDg)pt zMW$j4@io#FDh)`nqu5bfRwPL~?9h_DL~~>XeoVenZNEZ;z-1{?_crneo3ilG%UO`A z*BgmT^^xp_sAeTE!cmN#D)m$Gck&qbP6YDEWm*^gplw@`)rcBwI^)t9o;anE){w4L z1z$4prKORl$ze?Bi56Y|B8gj(41pYFZsWFz#A=LFVO8Ay>aZja=B?NzIh>KtNp4B6 zOpLrC;MmOR>rj#9ARyhiWXF(WxMb(BOK)T*F5~gU1UP{@Vbdu$bkP=*b}y#&URo2c zRw;SATIp!qv1_b48P}sa%D}7u;vb3~NPtdA&hyu(6?ih2PN8Ux?ml35;uPv44eBBR zIxH@^veyliHT9Cz$4wTEubcr@`)z($(|!uH<|bwCQ?kr~5ay8cIa!##>E_OE{Um7C z3ngQWds)yiom|ZFP?oDCLYZgRtxbbgE{c|0L>+VfCzj}%$8&?RMF8@Aop*HfLC1)W zos+~)t4lnxrjFS_F}UojPV0$l+J#XU}yA?+u$)wI`M#)p2+{Y*v?@6k1 zU01zT%VET3QDwMUS|DjuS=Q4vmPK9jfy^T1h#k!l(p2%v?rgX!k73;68;f|@g$}P3 zClPi*=a8!MZXNyO3YEH({8x%}*9XB^e$B|#k2eNW%2b1rSkxdZ#z=5E(4 z%u>b_PAR<|tPoqpl73>kULBw8i-SudCR^Hmsa0jhZ`+E4u|;1XE#qSvdx>)Z#6mnO zIj2$XyhAXhn#D{^{v%5YBmYVn31Ea8$ICJ<9gO%OY%f zS&lK!O86n|Zn>pIe6M=Ar@~;7XpG+m_9HMK1d_+|U_Mro(Y;4TM^UjU$gEsaC)(zF z23ej_0}kr+g1dKQEA6sxP;-2F9cvF(5$EJ38Q-$*s#RA^{mM1RhjY8;T=Iv3DlH}d z!lrqM5`6KK9}v!-UWB$SdZe`{LkSeJJz8W$z?OT>f$qpB9Ia4N$~n#9qgq)bGb1 xWT|*{ua+EG$sVgqLo&!pKT?BKk_F1atvaJ6+quUCi@7cvOS;tQlguNl*oj`!l>}Ikvo4v!#>}Io>Y?kb9c9VhZgWU}aCM4;(w`Zoa z_jX^p`_9g+JQU;^0uoJOl~|=^N-Y!-QA&eRs}QJCuuxD0ABDMEmRh7NEd-QW{QXa# z?%Vgyoyjah*|lf>xBI-l^PTT?&bNR6oTof&c=YGRls|roF`ornTlmBCu4fo?3HWaC z4)6i+Rp4KPkAc@*W=t1+9Q*+I+RKgk1@K?Nv)}{IH0Dj6nrzt)aE_l3&Edt_*i<>n1>iS8^}GCe zIsbNokZ$I{Yr(s~9pGERE5VO|HSp8mt>72HL*Vn7>^ksup!&TX+zI|VDEhww&Vt_n zr@^T!a=y)jdwBm4sP%sl+zNgj6rY~Oq?&hzKNH|9LD8FmqVpke415IK2L1^sI-YQN z6^qn-M;xwzYX4zS?Y`i?f5+h@M5z8g@EY(P;LE{Z0~yl%4JiKoCrB4_IWMrlYzHU7 zeW1oY3(~}V5agfvn8VM3qVu1@8^B9pj@Eg|VE|sw`#VAL;W1F-eGSw&&p^nh!0n*q z>9wG~FM(?RHcK0N@6PoH%7MUbsD{|2%I^Ft7)d9QYOqr=mn#*ZC-0Hllg zI4HXQ0-OQA?Qo};zuyar9}j_&w@-oM`@e%)ca1?c&TdfaJ_V}21B%b@0kzM61lGZS z0=2&9!c2WX4r*N)D1Cecd>Z&0ASS|m0@OZy+P(iJsP+FNsC9k^lzd#trhDK{P;zq= zl>RP&r!O&P6$H$mG3jaW3*aemjLmrrTm{d8H^7XCz>k7I4<6i(tpmRXz6m^v^4|^q zDfoVH942V~-v#%9p9i(>8cHqsy9Lz#t$?yqkASGC`4}j^f7X3}0+hb}4+x9QWpon0 z98|wogC2MfD1N*Jlw7?Z#8jH!0kz)GfNY`p3Mf1EZBYE!%I1mBH-Vb>EGYSU2!u7} zHywTngr(+Npw{&wHcji90vXCIfYvU6HQpZqZwEgL9tOV!vIMgqW!3(MpyquasQLZ? zyczskP~%=jrTBINRJ#ZHqj??!Zv_7ZlzrKT5NaKFg1f;8)H;6&l>C1R)O=qB#h34b z>Nmz8y`KSDl6jNE4};>*mtDPtUvyvV@YNtoF>eIb?!(|g@Qa}2{EA)qe(VAz@25fO zK?J@6e9+W2|0<|;Tmo|>Ki7iNi+ezgvjnRD!=U*6 zaqx2R+wS|*_vHM!7K8=nE>L`ZFE|VSzWe@75Ro?HOrr5lfLdn+>iY-X_df(Bhkpl( zj_-ofyDfY3{kaAd-|hi5&$~gEY<>?EU%n1r0X~h*d;xehsC~Nu6u-_mTz2>{sP+H0 z!>@oI?-xMv>!mD0@^S>^lX;tae++~)^WUK6pTWpn2`+$I*PB7j_bZ^r`3!g!_;qkU z_;d!9+}#GU1ttZLg1-uikN*W~-0f`EGr+sR%fKb@dEhemeDDGH{)^yCc>e^beftt9 zdM;ry@$-eC_;C}ccBjEhz_(NMUC%1zr|mEN0C>Mc?wIlG1oIe(ex0dctrDk zl=oBar@V*qREnM#Q!b^PrD(5LDDR>yQ{GC^Ge>z1d~IuM)4^rrFh=Rk2kxQhQs%P;>Dfr-P#X+|1jlc?wcT^ypY0{nAcNYOVK0# zq6XGZOE&bpjS|>jxxK%K-wPD!OpP*6c_-yKyp<;N*{P?3Qrac{BH%4&x4c+`zzP0=kWV#%F`+DcHd+02nE%!F@^NyE=rTK zNV%0VLy;aA&lo=*rbyO*lyWyk&nt7VHek~Iew9PP!OHK;_d@hU@y=A}E4X8^3FYR_Zagqg1suOSP zfs==B-#W`U-Ufqd{7nsZaIQaAqcc^H{C1GutT~vVcupi?lzE3vOnFJL7^Yc}c($GA zHyUx$6unt2iq?D5PS6M!LYCksjioRP8d*09CO7JGYp~#VTiL8P@2B*OBX2&8{AAUe z4>VshO#L(s+VicTIceFt&`ApF56)Ey$*Dhb;^YXTy*_0J4$f_kps3pplCY7_y14PI zw~e0ldzp5#d{{bH@?q32-hSpu_)y!jWee>4!EF>Ww9!V1Wq#E3MsL_gA~Up?Qjf}9 zqnI%u(wcNMcQ!ZaAjeE?P@xZ;JX-8}qbj{g-wv$N^==w?=fZ5MCUvgUpO?ncEaE;m z_R+Z$r@oiLYZ~0zqH=I=yp7g{omSsIrAu+Q)kN>SH0bz=FH1DP>NVna+fOH;W}CMU zb@YNHiIZ7xY-;bye!gKcf+X@=gNwC|c6!|?2^#TY6iT<-aZ|=2@y5p*6V;xsaTqZd z6lH-ItYkryVm6`W4c#DW1m5^{qxy8CX0Q-Oj6Sl<=!yEB3X&{E*X%1R_M5S(nUyVD zc66h&QG71iVaDQ408g;Y_6ITqE222_d@o&X&&Mq@md<*IbKcnBXZ$3>gw1+p{MHi_ zUc9i72ALOkDGOfWM~lIv89%jdjhlJG6f_hQr(U+&3D|(Z3JDy)Vf6Uip;>XE5l0KHu#u(Ke8BNE?k4C8Oe$QF&SRB=x!F+dd5vyf2XgmwjtZwDI9U{EZ;)L`G@iuq(^FeEPpYJ=l zvVC+-DeqQjkHv7d6*qjV{1TzG?YCN9sV?TYjM@lWcFMLZEZsS~=a{;v-_;{Lnhz3l zYBkFImBJ}7W0v?~OQGBLiS6c2XA5$hA$7g8>Jci@UEv?K@S#=%i^3rgEDp3e4 z_%5u&xup=FHs1|fHeN-JBFsxU>xi~ZJk(~}E(RGkWD)Vi)aJZ|#IQLLVm@}w(-Wfw_x(PNP6Gv3)?^&BSw*3ZEu6naNa7VGlTR-8?m((ff{(vT^# z2HV+<#?skTo9FlKy}TmfJ_i5XQV@AvE#A9Mb_MI|LIxw%tk?wazOl*cr_$}~e4m`0 zqzcJyES1D{u~y+CkwQ^{agLjuIIPDkKHBq`_3JFnI%ylE(iY*rnC9!Xt@?k{@Z~NV zNK$UVSz(Z5h;hwTSzibXrMpSsOH2o@%yW?Y+wk1issc|sONI)teZhR$|ce#3gv{PUYEs^bOW6w?d5ABC%0hN>*(ib~ zYV!e{?^4`OcmkV=D3$`;pD9hNV-2HIZ> zr-?&~7R~+LcE?+iDedd#{X~zR&k}G-uog!W80Qnc`*0}5?{*Zl<0x#1^fY%t1PmIr zO_&F>8*GVGqRn92$I|UJztaiO2TTg*FCryc6J9I_oQqIx+r*S-BDh#YQG_y4liP=y zA?%SmVF-=Ys$5lb3WH6LW>0*rTkW@`6dYcct8Lv_ls#op-~XKV|8 zOuH82a~y*TdmzohwP^25Kjba^hrJnnGXu>O9mIZ>lo9>!E<9JfP6P$f?93UHCQ3J+sJn&it4$Iebl;Qql8pZ{WCNMmcyoFuyy8h})T;5CfIw4@+YA z3N3OcCoTnS^q&>I$~lW|Em~T;=CnPJD91VPp@S%6W64j53L4vYA~~F@?C%M)+1Ae9 zR6>jivkv7Y;g%ds7sp?j04U&0@2o=14JP06a|g6y4{o-Gp}b-+?wnlU7S4a%ISjn+ zZVkPcuR0Q7!hBgzt-9z|u-8kM!UYA&E48w!6L+)?e8iZQH#0UOM%O&dZDsj`4XPD+ zh*VWIb0UfFXB+Bs&H8IN&f+p=Aw*}J)SH={-pwgwYS+{a(=)Xb$4}P}$;i>Bek-dct5?O#jd{?)K3R~d)7M{xBV!@ z4eW!Zb|jIPQCCmmTUuO&r<1uzW0knKiGpl@?daUm!~Nw>Pfpbi#hgUe$c-s^9y&-5E>MiiianCmYEc(dMK0u3(zbg_AY@scjgybyLH zoou+kY5O5Z?v&d#dAFG8gYWDL@ebb+2r>yI5_BEHjf1)mB@@11gKjFRa9|;PH1N;& zbYK*rEI49~0E^8ees^Zo!E zxFsS6(smTQU;$#qx_O0Rl5~e&k~FYGF17H3*eFD2bW&lMIx+0g&}J73BEyYDY z%qoonb-gosj(vDNPZ^2}NQli%*qp?9-tc$iD0(Cx z2KhTA3Tx|`iL3+{r+E+pc|~$U3QOEX$ljNjJU_va(9iGStzGQczuZo9MS@W0S(`jv zF@d2x6|kHJ2g*jzTkKgq(;BUg<%et7Gi46>=RMAJkFt7>E0xTJjlmAvWCaV&Pm;ay z^7dfD_3D|E1;K6@mNt;cVEae5siZU1D=VHX?IMypC&Bz01PBaAM{&2O{O?y)Xx();3w^v1C`^X+-L zS;Q&*<6e>B5Sz>EZ<#fy>?Z6KJIYxGB$llV#Pn{{)#9Q?$rBeg$-xp~T6w5vk$x8g zJKxgvSiohz(l1iUk*!=Ko78|CJ#I0`aX4YtdUP)5I@kr(GM52Kj>EYL9BuA~YDshC zyqa8M1CT+omd(>CTtSyhd5kwu3S~UtODFA3uu;l% z9L~bVQjq!MEottAM9W`j^@jJ~<~}yrb}-_U+M8po)dvpMSnLt_uuKO)|=(N5yUR5*D^G zp`6Y(OXg5hM`U;TagJVyF!u5cbJ>fOW${*N5u~Kxz>$-aX24YsT%$OnQsha{g3{0A z^ZKQqS=HcWm{*O5Le7GuP-M00rfOyix5Ax4o82^I!D1hr6m9w77 zYsT}d@(I$m+#uNhd=R$T6QcvEI6Bk}lGlbJiq!u<`y05v;5R6;*48p}Nk!~zm5)k} z5Z2AhsW_9t*%G1RrngdCO~(v1YphMk_!thQWH_CcQQf3hb;_+gKQn35GS=r=15}2e zP42v+AQyqGS1Wk#%N66P5PO|Sa;sJDo7tSAwsQdNJxISrkV2O5MwtUcljfu zt8)U|@>Ht`kpH!EK5i}h^F(*!E>T22g2YrPotA5~=^|7-mjhXsB3Fb@D6&Nt)qWsj zWFr?*o|9V18C7b$O3JA6S!*kkMwI}^EwL-smWiWv>Wk#jI@Lu2X`SjKiBze6f*Z@g zC6bWwN*-x#Bb!U2Q6-hsZP{cJiY%rmiPZC)!1hlUu2z9M=bCkrNu$*+&nh{an$xPh z5=0E7mCDZf2~z%eqn?#iQQ5Q5NqeTGGiTPJX)(i^c2wtqX@`4GZK~hkY_^ZhIyDqP za>bnZ9im>epuRsh^!k)G68?uLL1=z9(}}J4xlYQ-rJ4%6qVpx8Gkaaw7hPMewU~p+ zr+h;d*DL#!8=3PsKaF8;nssRGY1yPC$cp*8Y#17pJQV-m`$FitH!CEtTy-DnpeQFO z?yU*~0u#*3Q-my{aONp1YRlY&T>%c^#*n7eAwR;DGZ}%km6ulB?3n)PVa;2S#Tsa0KPs0s;_HgZ zGg*(5JCod$*D}34ujL5jTw*g?6S7G$|M5(z#Y$t&He|Y7hO1J+cP%bU%dbT literal 0 HcmV?d00001 diff --git a/opcodes/po/sv.gmo b/opcodes/po/sv.gmo new file mode 100644 index 0000000000000000000000000000000000000000..2347bdcdad1204497037e0598e95888db63f3591 GIT binary patch literal 16004 zcmc(ldyE}deaBBI3HV|l2@nX6aSsP=cs@yaIpv$rH0JNX`?v6m=dZUKa~b$` z@C5h`@OJPe&o$;Rz$VxS$DU`*$H7m54}&|OZ%haL2KX-U#w(4v7yJVFQShp(jCle0 zJK#;==fK_Ili(ikx~q-Z0p1NVrFj5kDDx5UI`GrrbHJ~HkYN4>ycYaUjz0pmgsn{S zGVmHu?=#>_!2=*o%sn7K<{ZCX0lpj5yq^YN1U?475_|&udGN=e`oHvr@BrKks^1-; z_!odI!F&k39{eqEC-^A%V(>|@242qKw}MxKN5H$l8^GTH)$cKI7x)8E^j~|8F|*)a za2o7^;@czOKJcGFt^Wl~G6vQ`@#z$(d1HP}fDeMA_w%6W{5Ciau7KOX8jBJglR3T_ z)O_#H@k^lE|7%`=eQMSh|cZcjo|H|*7@EXe-GTt`{SVa@IRo&vuuvWIRQ?AEl~3G zsr>sNf@=RYQ2YJQAV1~`m?ge#1ND9~$8(^@`v538dIZ$EzW{3go&XUQ^9+PWcn$a* za3?5w_kphg-w4vwd;%1mp9RIQ?}6gi^B_ieJ;)ZDLm*2scY&J!?KyrV$3Fly{-Zgr zfDC1>uo+$B;0*64a(p1i&w}F11yFK#4TFgPM?kIrt)RyF04P5EeqR4IQ2hQbsQrEc zOss?ZL9K5d)b~d~t?O}6diY=9v%t&POiYH^0%|{AlE3c&weA~1t@BP$a&iu|-~*uK z=V4I%|1x;`GVB)!m{+nHH-XpXcrW-p-X8*&z?4n;JoqH|DEP>BbQknd{yz9^@ILSu zi~kt-N1*t=A7z%jp9Lka?+3N6FMwL-1yJj$v6-?<*Mg8_wu4&t?fLh+K*>oX#|J_2 z<1?W4`OEqHw?IfX-vOnsKLIfb=1Mlng4cuEuh;QQa+ZRk=Yyc={St@>n7;?LZ~p;m zysOwG(RCxJ`R>i%V^H;<1U25DgEjD5;2Xgwz`MacEM9W-VUSPetDxrn0Vp|nIWGsm z*MPghB~bG4C!pl)`ye7%lXi`0(4HYH9RD)M ze*rarjX{Jnpy+xtsPP{FZvnrU4)_)Da`16*EBLpdia=Zd_N1m0-Ogg10{=ke$oBTew_f`mcL6TpFx4WPM+=uwcqceyoe%M(IZ}H ze9`(|$~!4OMb8^DaKC?@-yfs&Dbfeg0?W*U6g}EoJ#VDEpQ61#MtLixOOcFfJ;n3( z;t%j;6!H95DYA8Xw1@AYgnHqT%)i|Ig)V^y^S=eR<$r&u@=beGea`Z7KL2oaj`x8d zr$|oLdn6;Dq@1QKQ(i|oN;yvX6-x2QCP)rY19OJ*Op2Zb%CAx0Lir#?I)w_GU!W9^ z~FXbQJl%oX^R~J7n zfiI=Jka90YPekdsztF!N&w=luAa><*7k|B;GDk@%cTi9-^8iK9vnfr=yD5v5>Qk$} z@b}#mOri4`cY^Pu=y_EJPG_Wd9_7mX+e2VNIYpVL^e8_^xrcH&aBqg9+p_iJeS$i~!ZMxvwsF${*FtOfTwCL}$XZbWA1wnMa9k%SE7xaDVV&5kH zUN4GMze#m$$8I@&NnDU>`!jg*>j&wqo%0g< zMWLN*hhDsF=X}lAY$sll_}#g{Z%#V4&iCSi`oqVogk;noJ#~5n(RM)DEr*Y9j-asL z_2YIUo3*v^tgjnA>(iNbvwT=MU-DtpE*`t*B7CTA*|G)p{p>ah8QN&0#4;~z+R+=f zk;tstOQ}a?u2IYw5@}63nme1DbeLnNHmuOMoIY9XdZQ}6@xTtO(e-}f+w<*op(b^% z)1Q~d!YtxGJod@sr_MZ`!D|}a*`jiAyQ7QNwR^$9J|zoLKWL(NHt~C2?8y?%E!#%a z?Rv=s)NHc{P)F;>aTL$m@u~ewhxmrc@Z-=6h8OD^?Xvwa_8UKpM)m23O@F=}GWy6aqbC}4DoAn^z3M<& zamb8M%`9!%va=s{!svXs(~L(wAD&>D-5}A2#HJ*vqC*zeDCgI|%$1o7Q80+G4c6t-q7iTDMzlJM_5mQV-({ISD_9 zY6d1cmJNJ}CcLHDjQu3BQ%kgib2%I4B3PbaVsA-PzuQakFP7~@@K_7zFNs-G=CIea z4IBi-BR$E4rib6-&6=xfce{SGjl?1atSHffTt(@}Xy1#H6cLO4t{N_e?WxuJ?E;0>WX5XQZnI6l=d+@)u?*?8 zys0EEPEy$B?ZJa?gw6LT<|uH`bJpGwh4rRC*Kf73T26y@q<)gtoqTuO2yfV$kUk;a=7cxr z2dnq_zSB$FN7t0{?u7P^2+jsk!*j|n5lXsV5ZF>(%$+i7BW&3j*RHU1=iQ!T>cT-+ zOL#Qr$L7p(n0iZvQ((q4_S%6$x9t<#&0V=I$ZUqx^{%Q%s6=;#f7HTPwHjI!4uN2C zsLeazBYp+ng>^W;(8j0D_1l4qSCOL-^HR<_qHPlowb`~UKgEW$5Kl~P#=DD*Ui4V( zdYkNl=t=}GGHy??dPd4cR|v~4k?NwyFxB_ij=y}KlK|`I;L;Y_qo<2?*(8Y4NmKg0 zIEfoFMb2R7cB8S-Nwj(1z~0L%67FO0&oB6)?Q8M&2H6#?YaTKfsb<9{*!#vO_f93- z*ZDp7z>tn6jEh2@Y0^=MtIdM3TS$uToG3VD=nsd@FNTn^pe<{t^Yg_gI zrs2t5G?1jsfU`nBP7&i;UgdltER^oXz9%sqs%m@t_S89}q;tWlHZ4DVnQhOj#B9ay1F>#HH*7j=YU8g~~#9 zGTA7CC2F$)a^I!6o$v%U6HzSqxIa^x)|@qrD%KGo6jp3alR-4(`|vTv-`&vf zMq#_5)g+l$B8JeYT_QjD-(Z)dC0z#FKAvo^dA**GieP0pk`X-7nuuf3=ct6XyC$YQ zCc)Suup+t%n_NiL43UsL3`1zFCTAd~NrPoYenp663FBn)Hs97oS|$(WTj)JQWi(CC z>>2reX3zeS-}lWFpCuO_(Q0w%o43>Z*00;3TS>s$5lb3WHRq@2ee8LCW@^uVXGHnq z#_E)1i~Z9#&A1l)F`c*Aah#J;VIrhVcpL4V8AQQ_OHt%$cSJo7AT9(LZ%))`mPIyI zvBwh;BvgshyW$^k;*z`c*YDC_HA_FAWz$`zF4m#CifPw)X764ITJ+-pS(N3=W1^&f zNaClO^D+8N4V~So!rcoLFZrROW(IC!dfzPaoiRUROwMDIrc~i90vtL4nNdEU4$Pk) zO~mcgiwTQLi->V?dxaL|hbis}+<_o1dX;k)+gh}ArY_g^EXdr!5fB|j85;{;OrX%% zz6;6WpymFaFq>_i+nY+%F=5uByd>O_gX!W#EE50)9P@Ll5OJx=x9lhat=NNu&M=g> z4kkZ37r2EZA=eN?uX}=3@8zpb379ZX)>Er4x)toT$wGTxvGY=`tm;KQZ37=MX60p# z3zE?_i@B{Vf4D)lB8!@;s%B2b(K)uEe!N+~n-eZxWEMhn+)3=rr;FAb9VR44bxM*r)XF| z?Jv6Pi$S}6^{JWq^lm#dGrM>H4O7!oQ?(Pg`TAL$TN3C7XV%{8g`5}c9m@gYh;2R4 zi(cDw-@^RUWa1y9U)btNAaY4am`O2KY80= zvD1@NwIdM+*O0m0g-yy8)vJk}+Tm-QY!dh$Y$s8D|Ngx<)u#uIMJVE5zm5AaMSQb% zKamHwfi4m7RBY!1uhojUbhFVSjw(r?Y7!zo6`a#*?BYtyErab{P!8et!L|Rr#TU5ZlyhFNWSmm#bdfArkEV~J z&*-MaiCj#iubWgTC+3p;r!ujU3O^-oRr3y`g@McURYaFUV9Tt-|L2AysiQL! zLwvUpr^gL;ej_oOwyQYa-WHAtd$w6FzaBkFm&q~i_U z(0c(vWr&SkEbT{(OfRm4P2F18QVuB!H?%`B~x0s|CSV^jmeN5^+u0aFDICAnY zd0t`@%^XFfC^A;&*kbOL2gsp{xfZ0W{rR_D?;QXWGbOfV`~AfNDFJV-C(ayTlLQRjZeZ#as@g-qmh$?tYX zqZL_=Y#iHh$&F5?>}*IM`QaclGz|CZM^+8o&O_G!>#&uKhgQ|{$^$*ZAR$5|U_;z- ziH}&6sEf`Vn`wP#DcZ__5Ing950_8eN0ASzF2WDX6i6Y{Ra+*Z&$A$|niL3z%L&~j zeL=)7bmcI?{bLp|gmZC*< zWuh<(2=Ww3KIBTEJ7v4b6$(l<&^d3hDrOk6we7t{Hbzzk(|ys#3oG5UXuIGCa4*Su zGji-|a}o`OHyhbDjRI#nMppLIgoDUDG5N)5ls8xjf=eKCRgYmx@2Q6vYLaXuMWR-l z+chkGo1{pwnxNn4co@;b1FyOu$&CfulE(Z~m>+9rv5kd4am30R*k$k%~4ApA#;4Lo#aAx%=Vj2 zJV6##xEgl|b@7Gk+76?x(~UgBaIv-PDP8%Q^)7t2Xvk+aiXEJc5LLPT=Gz(c)VB*8OF!giy2%Z2HQ#QH&Y#}Bu#ygq;YlppTQtY z!#=TTXaf4g<{^uISjgQVTBP0$GWaq$*~my_85_d**i`JaW2P-7!G%DDc^$O#vI~~= zV&@SJS4C9mh$b6uiIY}oUZrQ6QL#<{Z(Qt|(H^rG8Xif{#hC=_KphIsFQUesC}#Wf zqn;_vnOHfG4;g$ZxZ;$AXr+OO>EA`sm7-C3yIXokybu53N}?xgw-ELC$Jm~-zw65! zc73Ji99I(b<(#oW(xlMfF>Mwlu-Ji1%RVWJav2~hR-lQJ!>m$345q8t z8rR|-B#{60gk;*c2^<$;S(yLJN0u_dD^~+g#d%^Pr%^Gp1`Py=6+#$IDIqDnazX?+ z&f3w%{o71E&j~%PZdrP0=yb*vV9fayqLm?9r%Fkpb*jh{4b?c2!}1Ikzo>lCMcZs* zm{sJBnrRi8u1Oa!r|SooP14Pb%ObLR9Z@g(Z1iKnMK!XT-%;Rt3&9*UKfUp2`zdF8q~sf#q4EO0gW3RxO5ALDMa-F1AX}i{Bt+;}fMOl zwUNwuo{3V#&&h|Qu`@}HFJKIH^z$O)h4?PY-UBYC(POftf8!Q zf^*Bb+m1&lALXH5mcN1mI4Pr<<*+K(RYo@|&FpuP!E&G6i}F{MxBP`{vAa%jVYyc7 v+LZre#myhbC5}C$uGASn5cSH01K)|@+@MtxoMh=@5mWta2BGN)NjLusRgFlS literal 0 HcmV?d00001 diff --git a/opcodes/po/tr.gmo b/opcodes/po/tr.gmo new file mode 100644 index 0000000000000000000000000000000000000000..98b9df15351bb968b81b4e2d65c0bf9170d80498 GIT binary patch literal 16094 zcmd6tYmgjQb;mEn#Ay7$53sQT`&!nryOL(TyLwn&B!OPGWl6T8hacEj>Y3@CZBI}4 zxF6Ea226k$8#_*7CnQwjiueFgK_Ib6;SV4RD!am!lq&_HVhnj2LZw2=u2fq^Zz6gE|Ty>FBDfk2MN$~EAmHIUJW3T}}{uZS^1pYgCFPL7U)Dz&h!OOuT zmnwA=7=!D;FM{jAm%t(Lip!K@DD_^DF4SJ|I`BU50`MV_q19vHRp6&AehHK*JP*DD ze8Il|D|j{UuYvqiSHgtwv6?^c0=I%P?tS3fz=y$W!QTb10lx}L`|pEq2Y&)eyNlnN z$!{$P>uNXnZtz}kHTY5RO7M$d2|NSt1iuCD0N=)7YruOzY4a1a!I zx*L@5Q=ruU7%1!g`yl_+H~AxS`=Ncm2;s^1)u6Py1(f+#Kv}m(K~zHhk;Pf?0^Yw1 z3ZFj&-vho0W#XsW1`2;iK#|kqpvdW~7QX|slBrl8&kb29EV7H_h62$cRqi%)_y zQGW~yUw;9Pga2u9t2234utV(@Y~>Lz-W-UfLF5VKL|bw z9s%FPPo0*~1VNm4O21Rc_56ZfK4-~#$2CoBUaZA8TQ0!P4WC_#+ zDC_@z`+eGef7rf%78Jeu5_k#tA}DhBCs2bw1sOtJ%c2Q?w}GC5 zgKI$fz84gId&Itf1-y~>pMauIWrQd5+Y8G05h(iodmu}qzGCqQpvbj^5rPGE4Jh;5 z3yS`Q;70JX_WiFdUdG^3ek&;D4}t5!FI)UE$Uk-Mx=im6fHJQSgQ8zw2Zf&(LDBnH zLH?;r>0}SM%i@!u%;#@FsrMQv>v|P~i=1x+ZvyWJrTwQsncwr^X7E)|)^Q9bW&Ha< z(XXdLss9b|GVoRV{d|Nd{+|O8z50=Tzk*4?f?5yC{%(L*f+sD09lV0~?}9SkE1>M(3s45ZcY{}f z+d$##UW*?E*{bSupseqogAA!&17(~I{1JX11QC_`94K=6J5cz)93cu{{Nai#RJqjIzJ_^aR8@dyE5SoHM0*M}q>~DqSVXH29 z#`tm%Br=mn*5($-fnq3sKFE)U>`T?+uYw|@!}eX)-GhD(y3T$RNFb3dOQk*l-3`ej z`X)N?A?PMZo{vGU`IXtH`}sWyT@1ozpUA$59?J7p=yB+3 zd9lwgg6G@cPlCS=iN4$pT@M|AJ`TwvcCq`B{k0$ZO~{Atf=~-%Uqwe#=yE830)G4o zvc9f$To@`&zOLQjvFRQcdyE}bVTchQ`X}a+i8G`}xXMf}ciQch)R7Y;zixW4}rk-}H)iA0F zzey+@E%wAMx9UxLOu>n&Q(od$lQeQimTI!oope$^na~v{rd=55iWfLhTUT5euja*0 z9J|em@76|)SSMRi&i(e?-Hc@1-@N}oAEtGOvu)dVFOQ)hZMu{jy#|t_1Tg6-NI*S}iD^{#PeE)k3g$^yXP$DuXsOkO-wv@`uTT9s(YYRKvg^E--?2~eRG9iT_MML1mJ>N*i7IVf4Vz6T9)_Fi^=7uCcB3ea zCiKAQrs=JG!(_No;P}0hHI>%tG>F`4SPwke+s&{h#v#%}1J&W~mbS7NFcusou6Cyr zH;6Ht@bX~l231!Nt?Ab$4QlSB7tnj(CjAHMG|E{r9Ie`16l_%kqvO*nR;*5gMi3qk zR;z)qv8vl9AhAfC{>GTE5lcR5jj37gPrXy^W69ZpWhZlc2! zn$(dK)ZGy^ba2rUJMyr~dB_Kjb<%FREI@5_QMOu*kCiK)biH5{wRtiPs^WuK%bH8O zt!lI9`)-{@Yq36_2wJ`^zLMRgX0=#$_%Zz@4#pXFV*YI{DTHW5*6|@S;I>*Va^qN! zP7h3rkX(Vlo%hDY85wUR0F znoYOnp|NNIGm2$Grl9a+)Nh4xf{I0M(+!e^r4jz7Z=twAwY^Q}j-5n=PI?gzNtbmq zjT6~3?lCtQQ9Hw6Fwru9Jq0nF%viPc^}6P^TxJwh+pu1;RYl{XI1!sJ+ynrgh-(p29v&5O=4p{ka!%X5qpIywqdEelg^r*a~}++?;VIg zpr;(^TeIhz_-UV&jEGz+<*F}!nt2)4mQl?rpwHUD_@o<|T@H(MBx@fhQEIgII{I8( zGdpEQFDEpCL=CB9rOTPXMy4k8%7J+0T0L<6$R>X}$F6Q|)5TiqEn7?v%Wsj7kz=Rj zguXot$~Cu=*6Ua;vx9~bH%`h%zndP)8`OtoKcU`guTydT`Rjc2!1Q4Ml0x5&(%v2- zSwE~gX7h^*#ZAZeb+KL49b(k_*s_DBUT*1*n>EMO1)Zjv@TlTO>R>xaoax*tFk%up zo-d)>;P9Y2Y;8eiGi19S?)C^>(OvEzW#aQ{^-KzfK(N?TX9hXqSMXg}hvQQoKCO~^ zzKK`SqX6?#jM}Ge4G*>4x^*|fhSX6{Ol>B+v-F;~IM#HQ*#gxS6*x=3Es51LR?a#@ zM0So`=Pi1RJH8f?kd^P^HF{*4$4^VP>Je9MQSUl1FyFnh z)FE3$wrZxT&Bp+#@F}#KE8fa-|rj8^UtCL4xwp&!kg4w z$=e|omMzh&U|?aZf(I$8xXE!B<6RyfUBAg#On%(hJ!Da1)7VYprUpO8Y>lDa9D{Ou zAUg-wB5S8QA#d(KB+S%9VT;p-@%IC@;S$xdFs56_aXUl=-OS0m1UumHIX6icZ<5X% zCAFh0yUFO;8g$QM%v2uVumOgSxsi`9ikY(kP+ZL(?~BQ`H3G&V;Fa|w{Y*b_ua zb$rCw#tHO06Mjga9KJ?WvC*?|ujja<`Z;(SFupy9h_n+YA_gkVAC|Eie+CIAjN(_5<$a)ZgY?A!sb*n=&`Fcen|%AS*RT*3K|JBOav_5Qr~;#H0W zm@r4Ir_4HUmWx-%Q{JQm%G0Hys1>$k8Tg1XD{f{?M9f~(nA@)D_g3gG$U>yV>3wEvDn`6SLbLNCIcfwY#xpOD56L=MtBaudd7Zr(xvvy17 z;M{xdq!{+iJ+p7yfw^ajoBHjp??nlRv_Ln#rW1MXdiz8|1_!$R_CLR{!K&ZU8-0@gnTCo^)n>4yxAB z>0@5R3^;dbr;Qc#xu3$k&7F#DV&W)=&Ot);#EE5-+vEh+u-~L@wY9`1#w<8N(`n9~ zI&%UG$;8i`NHXE%c?x=wCTq3Zh_MstjKet)M?b?7C{}cElLuGr_VSHB2jypitb1zccoo5 zXP+gLW_n&&Pu)_;G;is!{v=A;9450V*NHb8z9)GP;*3e|PQ+K~Fx!qJ^P@tsv#uNU#}fTh)t41PT&*1h{b8j_&o^`b81<)ip)pYk~JI{ zUuEP)$dlztP>-=yHN?1{f`-!$vOxwmtTIQzw2e(cygr(c4Y_!aWXfJ=pJYHp4w5bz zBmoxIAjo8$?V9PLbGk4$L!i+{j!;j?m+E_z}T zESdE#GAp|hui++ZwIoxFtD8OPG%|aKGOE0|doN_#(_L%N?CIH)v!@%nvpG!w-ga?f zxhrY9vaU$f8fA2zOiYhmF8VQxhvDvYm~AoBo39Sy$;Iz9JFbo;XSU)Bk06B0s(jy7gS6-IzTs)+?)W59Y+>T*UrQ@tGJhpK}zvXM0+F z5*iLySU0R6rZ&Yk7OfE6vorK(&Ld}Sc9fIupj@+gP5cvBSnQdY@$<`Q)HAPTHX>6~sF$Q_jPJV(gX>Ij)qy9) zOo(GE?8b=71B9NN9vqZ7C%kBoM8p;-w^5ljnNcg}1}}@EjPuLGNHa5&>=Bp9cI|eF z#kkglaj}slc@`-!S)Lk~)A_7CZj)y+uPU3*R}>mcfZjARUnMTrL>sP=hSQ3jW|wbghW|hNQrysFsUzZ*mT0c=pmV2;W5pYVjTDpEut#~b z9difUokUuqT6JMcsoRjD{WZcoXha|6w2+`jS+t-S-g-Ht--%>R#69UWxS`MWgFwOr z;w6Oz?b0JmXuc+9i3{_-c)h-B_qrP^GE6^HY}3)ipr7&&Z3)n&9azx>9!h~a$(8;QX;=K$i=Cy%$}BoExwcA8k8%5`QJB=_x(J! zanPJFup@Gw$}E3A#<&Ti`xdPqWNk6=eOhfABy8_nk|nrMUdeBX8j4{<1?LT0Hd!vJ zNs?>PY9{TKsS@r;R+JN7X6bNVVzlLylLjeEKJS#UAO*Ik$5my4l1YIPDUX}m7S-(O zn9B$5U=c6JOs;sch}7oEI6!6xLvwDFJz}JtwF-#aof#9x;YG9mbSH<;`AM^mG04(p zjd(=mW}(~0*<*5V+RRuU7CmoZc9%K1He^;)F8>RoD9op9PLPvM)R1r{@76ZTJId>N zJ$5#)Y|V$9(oiiuRHV;z#byX3wwBCN9=glTjxjlBX=BE1TGN(A{llvNH2Sk9IWu#) z#@RVL#BvcS|G#ssIm;B8v`!$A#SHM5Uxju3%+qR}Li0s3Yx6%%t8BhSH@PjvrF80A vZAID=ku4e)n8OnJwyshuq3lv@VS%x&;^ccT;naTvc58;7 literal 0 HcmV?d00001 diff --git a/opcodes/po/vi.gmo b/opcodes/po/vi.gmo new file mode 100644 index 0000000000000000000000000000000000000000..28974e4c82ba6c15fe58492472b920a065748603 GIT binary patch literal 27675 zcmd6v3!L0lmFKUkj;6&yUMh(2htQ;(q&nT5SJQcr_d^oMBmo4(P+j%!t|HY{MLm*k zbPxs=S>)xDEV7VfGYA+Ur~{;B*`)z>Ty~t%86Pvw+M@H)Vb_lUp;3}F80s6K!$9p;ECX! zAfz@2K&Hez1*-lRL5=ID{`<*+G2EK-K$o2boH<7iKlXuhz;Ta11vUPY7~B$YE~s&(K(%u{NY~6hP;`AB)cAe` zia(B{GSPh*C_cFYR6lM3MgRLinlOh!)$<)t^!z^_=P=0{_jZpT0hRv=Q2Bn~-_N2^ zs=d5_|0z)U4uKl~vmpP>&-tVIdN<6W`j&tyw+&okZgSc!9^OJ>Cdv-RuXI?^#fCemgR@*e=jH{+n%`JsPq zV=~{y^Bhp$`#{n85>V~u{r6iy&C9<7#pjQM>i_eg==sl}%AdhYSkf#7B}WE8)w3Ja z_q+W2M?5|Ys{OwJ-va)v$6tV=_rHKk!Ltya8s}A@+WP<~I_?7@g?SNFzkdx%&b%EV zt9~p3slvR^;~gHK1^H)w$seZLoX2E}Pc8#RpKC$Ya}NmXn@qX|fJU<4Cj$Z>$ z244aL@Sj1odupE>Z!h?T*BNs;2$ zT(cY*0)7(wAow!)IJj$tdp_d=)(X$}fJeX`E8RLdeib~#^9GMMfTF`w;N{>iLAq=% zUhVK^kSR0IfSS)=csz3rvW({o!S{h51Gj-c0hOA(Q1ti=NKx}JsP9RR* zoiQuH40sCoAgK9!2Gl%%57hj>em%Mj>;^Z19{^b*=6SFkd<7JLp1#5He+PIr&r3bN zA3Tod8$t2Q?cj;v6X0y{kHNQsFN13TS03NK(aFPZ5Yn0rpuT?;L9Pk=Y?R^3iUmpZ71iuezKF(!u=Yu;z(Q7X_3w#93fKP(gfM-#Np_-3_ zOqKZ-C_X=Bv!4%8{rni%3w{-ZrOp5L&plflf2Tcu3Pd!R=Rmdl3b+z{%SEnVn?XH) z1Y~ID1+W7=9wrRHK2YPl9DEmegU8Q-XYl-_$M1N2#p5Yk-FO#*>Sx~LK2Y=aZICH2 z{{*W33x3bhaS&Adw}S!rgn$2C5LUNLD7viNh7JP%0DL$2O;F=|85F;~e!JtJPEh%; z09S&a14Z8-fa1?{b~ySDfa2S`LG|m~py+)1C9c0$g7bO49u&PF0q2500T+TNTmiKLLISdM9(Q{DD7b*{hd||@0M)OzU2V)o;7U;az5_fH{0b=k`YTZH-5=@O<#30oUIx;4+@C2j2ybf#SRGfIZ-^LA5hK<@o2l;3+(R z0Mz{61*)At0{g%pf*Zk8)9(EMD1P}k2r12 z$8Uk+=TnE=`bmOk@w^XQ3XX$x)%**%797a9aXjGhMQ{!8e*tQoOR`SCZU@!wjUY?T zd;@$pcm_hO9b5)(00+SLfDeHug1-dYz&G!5&nJ027YulRJ}A0h0lovg5u6R~1y2W` z23LaL2VVz@2KSSmB>g!_G*-WK{VnNH(!U|W7WR6Azt52FC2b~MO!^zr-;v%-`Z!6K zc)Wwea<%*5RiMTPnGB-A%A(%|A0~-!CSP-T@fZH($H41INBpzkS(5nw-;>@>`i~^h z<-tj%=1;({k;MPebs;xDAbpOsmvl1;*0Fnf!2C#mxH6>I+dIcs zCv$%{=_=Agq_2?vGwBPY5t6RQ9oWB1`1@i1oB;bsh*a|!>64`B`mVnTK+UVJ^`!qq z+D&?j^ih(o?~qcY-zUA7beM#Cu-62CzeoB1jQ1JwU3EK2KUfI)|j|3J2x}@Kn-2kRBwxpVUd( zLb{f;jI^Jm>xZQG=!R=K=_Jw@Nmr77LW-{2{mm|q9|3<#+CUm0?IF!34U=vojgu}T zy@hlf=_XQi{XI8jQg`$M{50u&(r5jqsic=}rY#887fL}T69$E1C0odsgXBPAcQ`ND!K=YSE?3x-%?|~;leuch zw^A6CtHolWR0-33E(K?=+O}rn+5OZLOjDWapHXG2H`VJ(6}uDp6Yj;ozhqC2LSPE>uAel-PN@?}CQc#atUFBk!$_{23Lb8;~WGi8+QZ0pD(-m18 z4koL)N`EkrEK{zK4+gUNWN9=Q2-RLXTTYhC;qX8%Om|tb4i-yM?^kb%cf|F6{nl+w zIvvz|wrcgJnRO^%9S%#`lxuZp`c^kIZ}rtQJ5xGj_SERmY!)|Ob`(0a&6+g}^1XHw z1rJR(Q6gC~pAMQ&*mNv2X)d)qVr?}eMgvQ$(dN{dS)+{Ii2sd6ieYLy2a!>qb&F;|yQbREg3cMQ6c&qFXPBr z%h=al%Q-2do1j|8d?n2JDqB!tlg(16BRV9ubD1tAs%~QVH{Av1>WJ zwi@PBVbC$RS($1+9S&ym)ZVm6^M>k$8oPAPvf7swroFp&WY(K7BR8NRW9}{?&u6E$z8H2S&72~ zgzJR0%uxkdwlFi?D4B5*}PP#wXk}a2Im|fjDN1dh9&_2h9_A-6&nJ#go zYw~rSn`WEyvScYwRsDhKSi7||C=3pk!%9%7k_H2YHWYT5j_obKcoKG+h?rl~~Z(5}Sk|5e!$$71=T2?l9kF))w+}DuIX_ zWJr+88IYsF>>wQ$L&%j+jY5|;pH-{1RIbQQgzh6jo7p(bWgpC@HCjfNqS~hU$z*mq zHm&IwiBpCAAghkGY^^RjSE!Z{G-UAw+v1hf8RD4hpt<16_VQIhCaJmu1m-Y%ryOij zVmCRENaZAb8JF$a46=Eir@G!mp~!Th-_54_+YqBM>D7JwQ;zv$1_r~Dm8p!0mMgBj zvk%Uq6E$v|Je!H0-agGsPw$fHaxLgxve@R+&9pfe_4KN~MLj*!)we`>`licaTbr(> zZdI{((V_*5j8tw5g;oD%g+PD6W;YENqA4M>q(N7vKRCO+eD=JceRdZbFhZynRqKnk zDj6(aZflr%iKvYT>m~bxiwgNfIvl7D4WXEmCQjq6yQ*)LwN>eN{{j^*4E27;N&k z95%~aj_19o05|6fDaY$t=jGvK4rLIru(>#&8x77W7q!&R=~)!;wXg?TDQ_hs2DkI- z^HqGl1+DWr)g>A4w6xRS=3@W8K`RDZynq`BD|^B)A0*t;ki@cUqswfI95^}rI8m*3 zn(Ch-F&WiT>b4v5(voSi^tmiZ-&zaKo@i`iyCs*`$H5*epRheJZXyasX2^EAj1cw3 zY6(pf)Jw4&7SWJ?64tS2(%{=O@&2QV!*| zep@YjIajE3nVKbADwk5y^w!w&YB`nJ#l#;qi`s)}$Qqe6drEjv2a>5>P9!)9W0G}~ zuN0z2Y_5XDQN(ibEV8IKZnJxf$*)y<+H&|{vCsBo5HMA1^UqZuF|YiF%OtBKEIm1E zqo(6M4KkPmM*1pdLkCy4cP;8J&uQ_#tEx~4i@4D1HTxyTJ&nJ3q%X0kyb)IP-D zS~=`R=l~`oJJN`%60d9k7vkH(jI)+BBQQQ!Bq^%cQI=Jr59s+q8vnH2q(m>_2zX01 z!WGUkl?)~?qV8C-x5^tIlSw6I$foF`Gc6%&SgIgD+M-WPDPz(GGLg+^D_xm+5|o&R z%dPP76~uB?26D|a+1&(;EPWr=^f{2CeHzvUdfWSvzhE;r9i`TEkkLa8R_nA7Hbo>C*OlH@~B4_gUKX?JZi)~~l6ZuxbZ8RTVEWwJOgj;%^3IHe%G+{3+O88Oegh+2UDd0Klm;aIR=nB4bO7oQz49r@sSDHcNu1=f4X^U zIfLwPm#DPgollzIpeNBg?bp6(zV;^0k9~Cl47s31z>YbR<5RLs>cW)oku9k$_mq!Q z1f*Ux&DpRfvcp(}<*XbBW$d`nIL}7ZN6Fk=0rg@9FCX1ZwMWhzd|OrnMIYFSq_f(* zVr{xJ*;*MsX}{0B`$|;r{BnjVpp`Nsir4@SaAsTWRb){G*6Re1jIz;YEm+dxxtZ59 zuNQ@r8||tUsg1zyEGp9Q$@DeY^wz}^wN=aIE#a%%({rX)5h*OEri-||VcS}^a-SgH?<4ngz(hKCH}kAjXNFmW@S@CkDVJedn$upM)0Qk2LkvwU5YEu>tdJWi z1hFd_6t2x;YUf%oS>$zLM)GM+klXl5&5{47>l(Vu8Fv8^<#O4dk>q&lgUs&A!b z5gcr}k%mHU6KdbLY9~ID9@|3iqD5rh9hP!TnB=zKT9p$kG)MX(J6T^SY`u5ZI~P58 z=Utnr+Z8>F`(Xk%PX+44soG^AZo}TP#__co^G4_7#oHhso9z-PKu5i=&>E4+65Ftv zM2=d5C;jH1QxEHKs~A{1ns&GHthn?ROqBh)uv9R9nYo>9httgPcPf)CVVS4q%wxIX z{G*;R_W0jVTn zMfqyPXGnwE=X3n&tHygSYlJfnS?SftjbJzbENaQl#;*BuEoF#**b^O<)C`lTfy5Rp zTBpw1%+^xj8U$5hQ#x@eE^KsNKi}lP!=u~P+uhaEwk=eUQDRGZD4R~Kt`3zGI|>Bf zREIbn$yY1cTzTbCzS>nN4Yh5(ct>K5HVf2~Sj*0$Kj`i5=}vSn;9t{SFf|B{6YH}z{>*`eK>FRDxgL#G^~l)FSk_cr+0jOC+Ai|TH@>oALGi3u zw^DlHF{wzFtb)gEeXUov82u)(&>^wHL7#F4}FKRt2eV3kEWapb{K8)i0hdMO0$Si5`_dhMtS z*3|eHYohn)^m8F=&4lrkDf?HZntXRrG~4vlYn#&bX{h(AC%hr9Z38;sfaC97m! z)Wq06C*IK+tfX5Ac~d0E?_*1xT6HbO<&b>ce%xb{y$QbQEGZD}qo2w}k#k2cS0`UQmTnu8Y+~#_&CQW#>_qJi8WcIvbsD|6E>heoQz_YvL9A50 z{%kCqu6f=%4`7YgBI>3mV|_+8sf_KEZd%3GOALyxX=)>KZW;Xh*({qWg>glJc<6$$c?pt#%B8N0n(z3y)vr$Bzt0G=JJ$_&`7#7=L&F;0@?}f*b#OI9PuLZ^5 zjE~HlS~itY))Cpt5>Hrt!IbJc=DHBQ8I^9`^>da@Z7d4m3x0IN{)h~isCqQ`VUQCn z1@$mJ{uBdqY%b=X9Md;VPQRO<656LVcCZ*x-HtvIij@~0dtsk#Pu4_jf}~atu(MFe zBRobA%SA=~{T6ESv3@&X=OfQlWps36bNB(vsF@hMmku#Zck~?v2VUq{M>K1ZYqQvp zut1eqL;soKf$@EXAc_>!0z!_7eey$vi6i@D;{(IN?yL_PJW3YNzVxBfOqxd)#n??U zRJ0e9nWeqEo!vGTp=`2gHfkBW5n0@jk9~HG2x?&i#(7a1 z9f_ESGUE>o+kV_;7nyVy9PiwP921~@pB?Km+ci`zY-c#Zm17502lS|uIF+eVIzMsb z@Njd&y6{Fg{{eMMgLW0x=0r!={g&rh+c~x*mc&}qUnbzuFR%eu(AnR9BTdNTwN+f@ z^y_Aor+3k=RDM!lQe4dvVCEJ4I5Eb^b#FGnA299_>-v`0kTY=?%sPq5bjljVLn6(; z5R7QVmh&s#f~<_+FS=GoMR~HTgSKut$|g1BruVgJ%7sSSFiO83WcEiYA+Dktlv75> zJct~Ig={5sPQjm%I(Stzc-q%C5ZI0n7K6076xR@&B-<8Kc8eY!&f5^pXvStZJr&ba!{~?IcRQ3fnvXgn2 zTSw8IGb!R?*?b`v>N%5Qiuv?~6!#g;;B=i^5*3)+H>3Q0wfr+0Nq3ap1&B5i;%2jx zFEz^wZPOSRDrwg*Q3HEDI~K)iM%Z?&71YB-f8&<%EO>K}PCJulNP9ImPHCMEC%jOm zHERI=J-`+QI8=)t)vU=6g4zmVdp^G$T?s0^*<6$vKag)COQ6oS5vbELL#08yqZJ&p zdre@CZ|az>Dq4K&n&z8=PpA7#Wa%`Y6^=UHXJ6Wj2Z1Il~s=1Oy^>eqa2 zJKG;MB<675G;0=HxA^!Mouy)JbGQSNg$1*tFuqS#fKw{gN~_pc*5Xx%WqOpJyJv^+0Fim*QTPVG0#;8f zi{t!SUslC!>TWCYddv>(aCTw+?F)zocAM9_QmQc(XVFPGFigZPIO~JQUt4Q z;PN4j?v{fw+ z%E@y$a7L>OlWtYk2TRYSsQe++E(wp_E+XD!|K66WcP*C3c8&e54R(&_Uh1apC>@<# z6Y}A=P*W`aI^LzG0oWbNQRD8IRtXfX-O1R|lX!8k@SUwX*@n;-V*K$ur#+2M4_1KP zVP>9t&me;Gx;n~q<>SjF z_PV)fuxn*fgYhug^2cOP^6RiZh?M0~hSn-x3tyz9T$B!-l!eh(d*E&1@ zS%mWwVOlk?ROH^)%bH{(%G`yTBW8CxG1p1#=&PwBia`IZ)MNwGe}kHejH=ktPywPO zrkt(z;t$SM>#%7cm2Bz*qox+`a)%fOqh0Eqt<}E3#c>{s<|>!M0`W7&9f;qen#15Q>As8rk!q`J+|qxS_hGWhqrb9diC-OsI)y3vC_$R*H?Lr)#-o* zFX8U2*{zLfN^%;8w0ra*P6!ObXh)uUVV~Dt_N2Go8!=(gxD%0Bu>KT|w4&CUg(ki` zjHXuyH8-6)OobhV4vx8?R3MskN{Q*#cuByLDbS9j7ZK zE1s!l&uw?=gc>7$@lf)sf+;OPUiLF}yLuj*8d}Zj9S-jtDFb>;0`ca*Q22c0K)&x1YKn=KpJfpIK{~KkabZM5Nu= z@y>mtzfZBX>&4v_8fO?|E(;76fyZP6-c zZAFYJojOPDSq`YXQ=p4)*6wyjqC@#2yPLo=mv*=XHxBgmG?tYTt8}Ov4ySU(d zG$MqLey4!~i^-YT4>meto2<@==hb09lkrk5Pt0QDguG&a4(8rQ{?=D3YuNtdryli} zb-5oq33tEx@Rh>xoHlx&s($?;=coPk$8Vt)e%&#HTB;FUCiSK2`!bVSIELisBF)C+ z+`0Dq40_Y7h927w`%99#_?NW(Br_p5TTu%zv4X#xec5PYd0dbZpJx-wDW;zM5hjbo z>Y(_m7QZoRxpm@yL~=hn2|An(aem^-@d-6{tMeG@r0&eE&y4u{Slqf+*4MQ|Y+$QBC(+7rFH=MET=& z#C225Y1L`2t>S5n;$@jK*)q2CX(-+J)%`-zX%lalS=APaOmA`c9WAVi3r!~gFFYoR zdyr7{B$cao?r_mI)6x~<)KR=gl5jCwrao6%qKC9$skw-~7LV(hsF$1x#BOW9!f|t@ z@PGSCKg6lO;x)cpez(F|1heDkD4v0_9M@w*)3Rw&dTG9U`!%x*o22+4Jc2Eg2sqotF=saC!2xYneEK3B%Im? zPy#}D2;rGvKt$w`L_o|Fs(%dRJ5%Aw&92~frvEAVG ziHvoF?|^H;1`lJ;gIB<(!DW*eD+5o0w}2mjw}Kym_+x*^zpsM-0>2C1j84SKAf{wB zHkW|k!+RZg8@Lv{9sDKuL-1vg*69Q90RI5q34RQI2fP)FP`@&e_PGT71{eVE1>+z@ zX5HZT!PB50d>@AR}DBB?<>J?gDoJ|7gEY zfN<3RZjki%07!DygQUl1o7+LMOE*aCp8-k!D>jqhxA6WMNP4;hlhM4DHka89fi!-j z&EsGd-ruwNsm*Cv+=u#~fh6}X@NV!d=mmcZ-Vc(psJ;fA4oV>T$8HcV$qs{1HG35# z{hYJk-vvqj4?z5}4E}NOGmz|XC!7VMuxfDSb&Nd%0_+$zc>p{Pt_SC05_<2q`8Wns z{a?WqpbVou1P+4aPuD{!a6RS)NiM(5TANRSBu@w=`F;T+q}X1YT_FD03H*bq**i9W zXV;tHG}Mz3XuKCByDSFr$DYAIlB3z?t02Y26_ETT0g}H@fYPxAb{n`DoNDvuAkF(W zh_386Hva~a-%Nnh!?lJ>;g#s z`Ys5UV+os|fF#!~T=?gmAgy0x^C_D#ko2<4=0%X=`a_$OFgd;ZL9&|y(meY>lIt8e z1N=RBA2(Fl zEC#Ow7ob$5Jc>g8un6UT6nd7REJwMXUht5A(?fnmK1um%E(%0uvr$OyIVdEz^E`|n zl_->(X>hSUe3fb9t9>EXNE8Nu5H`$0D(m6dfD6_0zjNJp0&MAKA zp}2p*`j!1hx~GS79aL{U6z@MpS%%_Ac^0J}g&y)@vRf?*`4!R%`w7ZTC{Ln1hC&b7 zm>%+}c_?0#l_=yh^h^+7Pk{?jmZDI8hp|1J2ckZ&Dn(>t?)>_NOL_LG(-k$w7uNZ> zE{7B&ChOel$E83((}Ri{;xP>q6n%`S98ek+ImjhF(4@rVKrF7y6=MxqBsWU&aLmse zBm?6#l{YA=q_^+}nbr#`hGZCWq#-N^D=g_7qq-ygg4$e3g!D`5>PHcpXC<4zpmux$ zsqu)cD*>@;XzW!V8hzC-vg~;E(6r9g!)R7qy6S)E!838GYtfjZ zsRlGIb0Z#&YI+O~->B(4ZpeI{5^M6rFqIeM@e*kAd)O3?fRuGr3UgW4HGLY7t3kO@ zQ86&01u4|@vXVeKySv71n8!+dRm~G8-Wylfs@gjBURGlG`C=OG=hp94lCDBjyp=7g zE9Y8cqanw*7Ds91x}=8W3Rd<+(H48&a+Y18s?yt_(C}+!Vl|C%H9#BZ0WB!=lHfd6 zqlCk92z!d^NEZg$sLt7FPQ>eC*SW2h8lV+u)0!_PAv5@SiGja)9tJg7o6aUMT5x_a zsLO`Iea+~n7|vE3G$_qLd@qoKT!}>Fpd!U&E;mCigT%5L+*F7~qnZ&@)POEWWHoke ztB#a4Y9nP)wn$S;W1Pg}O(-$V_LCMqg$L!R49lv47VN{rmPYW9xXrA#xL&etmR9^6 zIW&k#;heEuW6*o^K?!XqxQ_(y`n-qB}kqgR49QVVF~AAP802v zBL|0rZk6k0l-G@z6j;lp;2MZ$WsEiPNR&6xM^@Hp)*xkZ2@)YJpeZ=L%pwZ%51fBB zoZtB!QRRrHDgoMyA;JY-i(br5yCGdh`qFu<2_98hHFMPZs+rZJ*3YhTszqEz@J*&f z!Gr6uoKt1>z>iAi1YoY& zcv(p}XoZ)9_u7I&manbyeeYtxWBHy)gR#cQ_G;AUUrE@zMV9da8)!pikGR;O!gurqIM(7RIB z>8rsH3(>cU!K*4NXI0FZ?WvdPW6!(X2q{7Df_TXAuF(A4Q}@^k??MV%4Dv2Q?D~0? z&o|5Ko8k4%!cYH1AhTEv}wo%r-i&d!1`Y5f&5rT`}m>1P#_dv3}C%L`N>^YP= z^g{B;#pIC}l3Vwf?S0nu)$D!2JbS=Ac+%X}{+HH`V|~|Wh7P2Aj(*xr3Fjp>4Yw;=F8iyJ8GeBm?zP{&D^rzx@M-f4ha8uJr=8H zTDNA74w#)M6C;;lb-GTP!>#6v=ac&{nmc<@1z)F|rMdaV%%+o>y$931y&n&6Pj;Td zWQl>T@x zZ9CH!UrKds7dOj-O85{f6LaEP=}cZ#nHXu$bXvRf z^i7?+WDcIdr7>46xw}PEa!-3=q!TlwkDg5QpEcVCQ#<-{`#^m6PATLeDV(%ot!Q@k znO&{oQYrRkg@Vuq$#Hs{*?wNEk-l`v9Nx*yT{}`EJ?XYn=CLDKR+uO;xY-@!uE5N# z?c?ow?P#PumgsMXi834Zm?t(SMmj{Y#8oqKsVn`~KI_!Yxn>sA6)RARyH>$H6Z*Q^ z+F4>;ZS8_HiQA_8!}BH0lI(6XcfOtI-*L6|Kz;Mo)`RBebE#7sm|O3v4+?PF97{tV z$pgKK{?aAu zdpDa~PLo$S=Y<=6mh*U6VL!)vAYAJ8zRcmxc0X6Auu)>@IM%i9ptN?8CR{_Q)!ec< zxwqH#We95a4rE4lvGm*L(<5ixph@%(nyW2i2me`H*oB->jYUm(^ zx)Yd%y`T}{CFX{Uq%F6jJqa1KV++Jcb{)mZCsM6tW>ISii?ce}^A> 21; + long ravalue = (insn & RA_MASK) >> 16; + + if (value == 0) + value = 32; + if (rtvalue + (value + 3) / 4 > (rtvalue > ravalue ? ravalue + 32 + : ravalue)) + *errmsg = _("address register in load range"); + return insn | ((value & 0x1f) << 11); +} + /* The NSI field in a D form instruction. This is the same as the SI field, only negated. The extraction function always marks it as invalid, since we never want to recognize an instruction which uses @@ -1173,7 +1224,7 @@ insert_ram (unsigned long insn, return insn | ((value & 0x1f) << 16); } -/* The RA field in the DQ form lq instruction, which has special +/* The RA field in the DQ form lq or an lswx instruction, which have special value restrictions. */ static unsigned long @@ -1229,6 +1280,22 @@ extract_rbs (unsigned long insn, return 0; } +/* The RB field in an lswx instruction, which has special value + restrictions. */ + +static unsigned long +insert_rbx (unsigned long insn, + long value, + ppc_cpu_t dialect ATTRIBUTE_UNUSED, + const char **errmsg) +{ + long rtvalue = (insn & RT_MASK) >> 21; + + if (value == rtvalue) + *errmsg = _("source and target register operands must be different"); + return insn | ((value & 0x1f) << 11); +} + /* The SH field in an MD form instruction. This is split. */ static unsigned long @@ -4124,8 +4191,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"slbmte", X(31,402), XRA_MASK, PPC64, PPCNONE, {RS, RB}}, -{"icswx", XRC(31,406,0), X_MASK, PPCA2, PPCNONE, {RS, RA, RB}}, -{"icswx.", XRC(31,406,1), X_MASK, PPCA2, PPCNONE, {RS, RA, RB}}, +{"icswx", XRC(31,406,0), X_MASK, POWER7|PPCA2, PPCNONE, {RS, RA, RB}}, +{"icswx.", XRC(31,406,1), X_MASK, POWER7|PPCA2, PPCNONE, {RS, RA, RB}}, {"sthx", X(31,407), X_MASK, COM, PPCNONE, {RS, RA0, RB}}, @@ -4421,7 +4488,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"ldbrx", X(31,532), X_MASK, CELL|POWER7|PPCA2, PPCNONE, {RT, RA0, RB}}, -{"lswx", X(31,533), X_MASK, PPCCOM, E500|E500MC, {RT, RA0, RB}}, +{"lswx", X(31,533), X_MASK, PPCCOM, E500|E500MC, {RT, RAX, RBX}}, {"lsx", X(31,533), X_MASK, PWRCOM, PPCNONE, {RT, RA, RB}}, {"lwbrx", X(31,534), X_MASK, PPCCOM, PPCNONE, {RT, RA0, RB}}, @@ -4467,7 +4534,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"mfsr", X(31,595), XRB_MASK|(1<<20), COM, NON32, {RT, SR}}, -{"lswi", X(31,597), X_MASK, PPCCOM, E500|E500MC, {RT, RA0, NB}}, +{"lswi", X(31,597), X_MASK, PPCCOM, E500|E500MC, {RT, RA0, NBI}}, {"lsi", X(31,597), X_MASK, PWRCOM, PPCNONE, {RT, RA0, NB}}, {"lwsync", XSYNC(31,598,1), 0xffffffff, PPC, E500, {0}}, @@ -4625,7 +4692,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"lhbrx", X(31,790), X_MASK, COM, PPCNONE, {RT, RA0, RB}}, -{"lfdpx", X(31,791), X_MASK, POWER6, POWER7, {FRT, RA, RB}}, +{"lfdpx", X(31,791), X_MASK, POWER6, POWER7, {FRTp, RA, RB}}, {"lfqx", X(31,791), X_MASK, POWER2, PPCNONE, {FRT, RA, RB}}, {"sraw", XRC(31,792,0), X_MASK, PPCCOM, PPCNONE, {RA, RS, RB}}, @@ -4705,7 +4772,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"sthbrx", X(31,918), X_MASK, COM, PPCNONE, {RS, RA0, RB}}, -{"stfdpx", X(31,919), X_MASK, POWER6, PPCNONE, {FRS, RA, RB}}, +{"stfdpx", X(31,919), X_MASK, POWER6, POWER7, {FRSp, RA, RB}}, {"stfqx", X(31,919), X_MASK, POWER2, PPCNONE, {FRS, RA, RB}}, {"sraq", XRC(31,920,0), X_MASK, M601, PPCNONE, {RA, RS, RB}}, @@ -4869,7 +4936,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"psq_l", OP(56), OP_MASK, PPCPS, PPCNONE, {FRT,PSD,RA,PSW,PSQ}}, {"lfq", OP(56), OP_MASK, POWER2, PPCNONE, {FRT, D, RA0}}, -{"lfdp", OP(57), OP_MASK, POWER6, POWER7, {FRT, D, RA0}}, +{"lfdp", OP(57), OP_MASK, POWER6, POWER7, {FRTp, D, RA0}}, {"psq_lu", OP(57), OP_MASK, PPCPS, PPCNONE, {FRT,PSD,RA,PSW,PSQ}}, {"lfqu", OP(57), OP_MASK, POWER2, PPCNONE, {FRT, D, RA0}}, @@ -5132,7 +5199,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"psq_st", OP(60), OP_MASK, PPCPS, PPCNONE, {FRS,PSD,RA,PSW,PSQ}}, {"stfq", OP(60), OP_MASK, POWER2, PPCNONE, {FRS, D, RA}}, -{"stfdp", OP(61), OP_MASK, POWER6, PPCNONE, {FRT, D, RA0}}, +{"stfdp", OP(61), OP_MASK, POWER6, POWER7, {FRSp, D, RA0}}, {"psq_stu", OP(61), OP_MASK, PPCPS, PPCNONE, {FRS,PSD,RA,PSW,PSQ}}, {"stfqu", OP(61), OP_MASK, POWER2, PPCNONE, {FRS, D, RA}}, @@ -5142,11 +5209,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"fcmpu", X(63,0), X_MASK|(3<<21), COM, PPCEFS, {BF, FRA, FRB}}, -{"daddq", XRC(63,2,0), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}}, -{"daddq.", XRC(63,2,1), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}}, +{"daddq", XRC(63,2,0), X_MASK, POWER6, PPCNONE, {FRTp, FRAp, FRBp}}, +{"daddq.", XRC(63,2,1), X_MASK, POWER6, PPCNONE, {FRTp, FRAp, FRBp}}, -{"dquaq", ZRC(63,3,0), Z2_MASK, POWER6, PPCNONE, {FRT, FRA, FRB, RMC}}, -{"dquaq.", ZRC(63,3,1), Z2_MASK, POWER6, PPCNONE, {FRT, FRA, FRB, RMC}}, +{"dquaq", ZRC(63,3,0), Z2_MASK, POWER6, PPCNONE, {FRTp, FRAp, FRBp, RMC}}, +{"dquaq.", ZRC(63,3,1), Z2_MASK, POWER6, PPCNONE, {FRTp, FRAp, FRBp, RMC}}, {"fcpsgn", XRC(63,8,0), X_MASK, POWER6|PPCA2|PPC476, PPCNONE, {FRT, FRA, FRB}}, {"fcpsgn.", XRC(63,8,1), X_MASK, POWER6|PPCA2|PPC476, PPCNONE, {FRT, FRA, FRB}}, @@ -5222,11 +5289,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"fcmpo", X(63,32), X_MASK|(3<<21), COM, PPCEFS, {BF, FRA, FRB}}, -{"dmulq", XRC(63,34,0), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}}, -{"dmulq.", XRC(63,34,1), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}}, +{"dmulq", XRC(63,34,0), X_MASK, POWER6, PPCNONE, {FRTp, FRAp, FRBp}}, +{"dmulq.", XRC(63,34,1), X_MASK, POWER6, PPCNONE, {FRTp, FRAp, FRBp}}, -{"drrndq", ZRC(63,35,0), Z2_MASK, POWER6, PPCNONE, {FRT, FRA, FRB, RMC}}, -{"drrndq.", ZRC(63,35,1), Z2_MASK, POWER6, PPCNONE, {FRT, FRA, FRB, RMC}}, +{"drrndq", ZRC(63,35,0), Z2_MASK, POWER6, PPCNONE, {FRTp, FRA, FRBp, RMC}}, +{"drrndq.", ZRC(63,35,1), Z2_MASK, POWER6, PPCNONE, {FRTp, FRA, FRBp, RMC}}, {"mtfsb1", XRC(63,38,0), XRARB_MASK, COM, PPCNONE, {BT}}, {"mtfsb1.", XRC(63,38,1), XRARB_MASK, COM, PPCNONE, {BT}}, @@ -5236,11 +5303,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"mcrfs", X(63,64), XRB_MASK|(3<<21)|(3<<16), COM, PPCNONE, {BF, BFA}}, -{"dscliq", ZRC(63,66,0), Z_MASK, POWER6, PPCNONE, {FRT, FRA, SH16}}, -{"dscliq.", ZRC(63,66,1), Z_MASK, POWER6, PPCNONE, {FRT, FRA, SH16}}, +{"dscliq", ZRC(63,66,0), Z_MASK, POWER6, PPCNONE, {FRTp, FRAp, SH16}}, +{"dscliq.", ZRC(63,66,1), Z_MASK, POWER6, PPCNONE, {FRTp, FRAp, SH16}}, -{"dquaiq", ZRC(63,67,0), Z2_MASK, POWER6, PPCNONE, {TE, FRT, FRB, RMC}}, -{"dquaiq.", ZRC(63,67,1), Z2_MASK, POWER6, PPCNONE, {TE, FRT, FRB, RMC}}, +{"dquaiq", ZRC(63,67,0), Z2_MASK, POWER6, PPCNONE, {TE, FRTp, FRBp, RMC}}, +{"dquaiq.", ZRC(63,67,1), Z2_MASK, POWER6, PPCNONE, {TE, FRTp, FRBp, RMC}}, {"mtfsb0", XRC(63,70,0), XRARB_MASK, COM, PPCNONE, {BT}}, {"mtfsb0.", XRC(63,70,1), XRARB_MASK, COM, PPCNONE, {BT}}, @@ -5248,15 +5315,15 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"fmr", XRC(63,72,0), XRA_MASK, COM, PPCEFS, {FRT, FRB}}, {"fmr.", XRC(63,72,1), XRA_MASK, COM, PPCEFS, {FRT, FRB}}, -{"dscriq", ZRC(63,98,0), Z_MASK, POWER6, PPCNONE, {FRT, FRA, SH16}}, -{"dscriq.", ZRC(63,98,1), Z_MASK, POWER6, PPCNONE, {FRT, FRA, SH16}}, +{"dscriq", ZRC(63,98,0), Z_MASK, POWER6, PPCNONE, {FRTp, FRAp, SH16}}, +{"dscriq.", ZRC(63,98,1), Z_MASK, POWER6, PPCNONE, {FRTp, FRAp, SH16}}, -{"drintxq", ZRC(63,99,0), Z2_MASK, POWER6, PPCNONE, {R, FRT, FRB, RMC}}, -{"drintxq.", ZRC(63,99,1), Z2_MASK, POWER6, PPCNONE, {R, FRT, FRB, RMC}}, +{"drintxq", ZRC(63,99,0), Z2_MASK, POWER6, PPCNONE, {R, FRTp, FRBp, RMC}}, +{"drintxq.", ZRC(63,99,1), Z2_MASK, POWER6, PPCNONE, {R, FRTp, FRBp, RMC}}, {"ftdiv", X(63,128), X_MASK|(3<<21), POWER7, PPCNONE, {BF, FRA, FRB}}, -{"dcmpoq", X(63,130), X_MASK, POWER6, PPCNONE, {BF, FRA, FRB}}, +{"dcmpoq", X(63,130), X_MASK, POWER6, PPCNONE, {BF, FRAp, FRBp}}, {"mtfsfi", XRC(63,134,0), XWRA_MASK|(3<<21)|(1<<11), POWER6|PPCA2|PPC476, PPCNONE, {BFF, U, W}}, {"mtfsfi", XRC(63,134,0), XRA_MASK|(3<<21)|(1<<11), COM, POWER6|PPCA2|PPC476, {BFF, U}}, @@ -5273,27 +5340,27 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"ftsqrt", X(63,160), X_MASK|(3<<21|FRA_MASK), POWER7, PPCNONE, {BF, FRB}}, -{"dtstexq", X(63,162), X_MASK, POWER6, PPCNONE, {BF, FRA, FRB}}, -{"dtstdcq", Z(63,194), Z_MASK, POWER6, PPCNONE, {BF, FRA, DCM}}, -{"dtstdgq", Z(63,226), Z_MASK, POWER6, PPCNONE, {BF, FRA, DGM}}, +{"dtstexq", X(63,162), X_MASK, POWER6, PPCNONE, {BF, FRAp, FRBp}}, +{"dtstdcq", Z(63,194), Z_MASK, POWER6, PPCNONE, {BF, FRAp, DCM}}, +{"dtstdgq", Z(63,226), Z_MASK, POWER6, PPCNONE, {BF, FRAp, DGM}}, -{"drintnq", ZRC(63,227,0), Z2_MASK, POWER6, PPCNONE, {R, FRT, FRB, RMC}}, -{"drintnq.", ZRC(63,227,1), Z2_MASK, POWER6, PPCNONE, {R, FRT, FRB, RMC}}, +{"drintnq", ZRC(63,227,0), Z2_MASK, POWER6, PPCNONE, {R, FRTp, FRBp, RMC}}, +{"drintnq.", ZRC(63,227,1), Z2_MASK, POWER6, PPCNONE, {R, FRTp, FRBp, RMC}}, -{"dctqpq", XRC(63,258,0), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, -{"dctqpq.", XRC(63,258,1), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, +{"dctqpq", XRC(63,258,0), X_MASK, POWER6, PPCNONE, {FRTp, FRB}}, +{"dctqpq.", XRC(63,258,1), X_MASK, POWER6, PPCNONE, {FRTp, FRB}}, {"fabs", XRC(63,264,0), XRA_MASK, COM, PPCEFS, {FRT, FRB}}, {"fabs.", XRC(63,264,1), XRA_MASK, COM, PPCEFS, {FRT, FRB}}, -{"dctfixq", XRC(63,290,0), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, -{"dctfixq.", XRC(63,290,1), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, +{"dctfixq", XRC(63,290,0), X_MASK, POWER6, PPCNONE, {FRT, FRBp}}, +{"dctfixq.", XRC(63,290,1), X_MASK, POWER6, PPCNONE, {FRT, FRBp}}, -{"ddedpdq", XRC(63,322,0), X_MASK, POWER6, PPCNONE, {SP, FRT, FRB}}, -{"ddedpdq.", XRC(63,322,1), X_MASK, POWER6, PPCNONE, {SP, FRT, FRB}}, +{"ddedpdq", XRC(63,322,0), X_MASK, POWER6, PPCNONE, {SP, FRTp, FRBp}}, +{"ddedpdq.", XRC(63,322,1), X_MASK, POWER6, PPCNONE, {SP, FRTp, FRBp}}, -{"dxexq", XRC(63,354,0), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, -{"dxexq.", XRC(63,354,1), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, +{"dxexq", XRC(63,354,0), X_MASK, POWER6, PPCNONE, {FRT, FRBp}}, +{"dxexq.", XRC(63,354,1), X_MASK, POWER6, PPCNONE, {FRT, FRBp}}, {"frin", XRC(63,392,0), XRA_MASK, POWER5, PPCNONE, {FRT, FRB}}, {"frin.", XRC(63,392,1), XRA_MASK, POWER5, PPCNONE, {FRT, FRB}}, @@ -5304,29 +5371,29 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"frim", XRC(63,488,0), XRA_MASK, POWER5, PPCNONE, {FRT, FRB}}, {"frim.", XRC(63,488,1), XRA_MASK, POWER5, PPCNONE, {FRT, FRB}}, -{"dsubq", XRC(63,514,0), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}}, -{"dsubq.", XRC(63,514,1), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}}, +{"dsubq", XRC(63,514,0), X_MASK, POWER6, PPCNONE, {FRTp, FRAp, FRBp}}, +{"dsubq.", XRC(63,514,1), X_MASK, POWER6, PPCNONE, {FRTp, FRAp, FRBp}}, -{"ddivq", XRC(63,546,0), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}}, -{"ddivq.", XRC(63,546,1), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}}, +{"ddivq", XRC(63,546,0), X_MASK, POWER6, PPCNONE, {FRTp, FRAp, FRBp}}, +{"ddivq.", XRC(63,546,1), X_MASK, POWER6, PPCNONE, {FRTp, FRAp, FRBp}}, {"mffs", XRC(63,583,0), XRARB_MASK, COM, PPCEFS, {FRT}}, {"mffs.", XRC(63,583,1), XRARB_MASK, COM, PPCEFS, {FRT}}, -{"dcmpuq", X(63,642), X_MASK, POWER6, PPCNONE, {BF, FRA, FRB}}, +{"dcmpuq", X(63,642), X_MASK, POWER6, PPCNONE, {BF, FRAp, FRBp}}, -{"dtstsfq", X(63,674), X_MASK, POWER6, PPCNONE, {BF, FRA, FRB}}, +{"dtstsfq", X(63,674), X_MASK, POWER6, PPCNONE, {BF, FRA, FRBp}}, {"mtfsf", XFL(63,711,0), XFL_MASK, POWER6|PPCA2|PPC476, PPCNONE, {FLM, FRB, XFL_L, W}}, {"mtfsf", XFL(63,711,0), XFL_MASK, COM, POWER6|PPCA2|PPC476|PPCEFS, {FLM, FRB}}, {"mtfsf.", XFL(63,711,1), XFL_MASK, POWER6|PPCA2|PPC476, PPCNONE, {FLM, FRB, XFL_L, W}}, {"mtfsf.", XFL(63,711,1), XFL_MASK, COM, POWER6|PPCA2|PPC476|PPCEFS, {FLM, FRB}}, -{"drdpq", XRC(63,770,0), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, -{"drdpq.", XRC(63,770,1), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, +{"drdpq", XRC(63,770,0), X_MASK, POWER6, PPCNONE, {FRTp, FRBp}}, +{"drdpq.", XRC(63,770,1), X_MASK, POWER6, PPCNONE, {FRTp, FRBp}}, -{"dcffixq", XRC(63,802,0), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, -{"dcffixq.", XRC(63,802,1), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, +{"dcffixq", XRC(63,802,0), X_MASK, POWER6, PPCNONE, {FRTp, FRB}}, +{"dcffixq.", XRC(63,802,1), X_MASK, POWER6, PPCNONE, {FRTp, FRB}}, {"fctid", XRC(63,814,0), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}}, {"fctid", XRC(63,814,0), XRA_MASK, PPC476, PPCNONE, {FRT, FRB}}, @@ -5338,16 +5405,16 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"fctidz.", XRC(63,815,1), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}}, {"fctidz.", XRC(63,815,1), XRA_MASK, PPC476, PPCNONE, {FRT, FRB}}, -{"denbcdq", XRC(63,834,0), X_MASK, POWER6, PPCNONE, {S, FRT, FRB}}, -{"denbcdq.", XRC(63,834,1), X_MASK, POWER6, PPCNONE, {S, FRT, FRB}}, +{"denbcdq", XRC(63,834,0), X_MASK, POWER6, PPCNONE, {S, FRTp, FRBp}}, +{"denbcdq.", XRC(63,834,1), X_MASK, POWER6, PPCNONE, {S, FRTp, FRBp}}, {"fcfid", XRC(63,846,0), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}}, {"fcfid", XRC(63,846,0), XRA_MASK, PPC476, PPCNONE, {FRT, FRB}}, {"fcfid.", XRC(63,846,1), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}}, {"fcfid.", XRC(63,846,1), XRA_MASK, PPC476, PPCNONE, {FRT, FRB}}, -{"diexq", XRC(63,866,0), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}}, -{"diexq.", XRC(63,866,1), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}}, +{"diexq", XRC(63,866,0), X_MASK, POWER6, PPCNONE, {FRTp, FRA, FRBp}}, +{"diexq.", XRC(63,866,1), X_MASK, POWER6, PPCNONE, {FRTp, FRA, FRBp}}, {"fctidu", XRC(63,942,0), XRA_MASK, POWER7|PPCA2, PPCNONE, {FRT, FRB}}, {"fctidu.", XRC(63,942,1), XRA_MASK, POWER7|PPCA2, PPCNONE, {FRT, FRB}}, diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c index 2f1487d..282298b 100644 --- a/opcodes/s390-opc.c +++ b/opcodes/s390-opc.c @@ -50,7 +50,7 @@ const struct s390_operand s390_operands[] = #define R_12 2 /* GPR starting at position 12 */ { 4, 12, S390_OPERAND_GPR }, #define RO_12 3 /* optional GPR starting at position 12 */ - { 4, 12, S390_OPERAND_GPR|S390_OPERAND_OPTIONAL }, + { 4, 12, S390_OPERAND_GPR | S390_OPERAND_OPTIONAL }, #define R_16 4 /* GPR starting at position 16 */ { 4, 16, S390_OPERAND_GPR }, #define R_20 5 /* GPR starting at position 20 */ @@ -64,121 +64,157 @@ const struct s390_operand s390_operands[] = #define R_32 9 /* GPR starting at position 32 */ { 4, 32, S390_OPERAND_GPR }, +/* General purpose register pair operands. */ + +#define RE_8 10 /* GPR starting at position 8 */ + { 4, 8, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR }, +#define RE_12 11 /* GPR starting at position 12 */ + { 4, 12, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR }, +#define RE_16 12 /* GPR starting at position 16 */ + { 4, 16, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR }, +#define RE_20 13 /* GPR starting at position 20 */ + { 4, 20, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR }, +#define RE_24 14 /* GPR starting at position 24 */ + { 4, 24, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR }, +#define RE_28 15 /* GPR starting at position 28 */ + { 4, 28, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR }, +#define RE_32 16 /* GPR starting at position 32 */ + { 4, 32, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR }, + + /* Floating point register operands. */ -#define F_8 10 /* FPR starting at position 8 */ +#define F_8 17 /* FPR starting at position 8 */ { 4, 8, S390_OPERAND_FPR }, -#define F_12 11 /* FPR starting at position 12 */ +#define F_12 18 /* FPR starting at position 12 */ { 4, 12, S390_OPERAND_FPR }, -#define F_16 12 /* FPR starting at position 16 */ +#define F_16 19 /* FPR starting at position 16 */ { 4, 16, S390_OPERAND_FPR }, -#define F_20 13 /* FPR starting at position 16 */ +#define F_20 20 /* FPR starting at position 16 */ { 4, 16, S390_OPERAND_FPR }, -#define F_24 14 /* FPR starting at position 24 */ +#define F_24 21 /* FPR starting at position 24 */ { 4, 24, S390_OPERAND_FPR }, -#define F_28 15 /* FPR starting at position 28 */ +#define F_28 22 /* FPR starting at position 28 */ { 4, 28, S390_OPERAND_FPR }, -#define F_32 16 /* FPR starting at position 32 */ +#define F_32 23 /* FPR starting at position 32 */ { 4, 32, S390_OPERAND_FPR }, +/* Floating point register pair operands. */ + +#define FE_8 24 /* FPR starting at position 8 */ + { 4, 8, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR }, +#define FE_12 25 /* FPR starting at position 12 */ + { 4, 12, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR }, +#define FE_16 26 /* FPR starting at position 16 */ + { 4, 16, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR }, +#define FE_20 27 /* FPR starting at position 16 */ + { 4, 16, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR }, +#define FE_24 28 /* FPR starting at position 24 */ + { 4, 24, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR }, +#define FE_28 29 /* FPR starting at position 28 */ + { 4, 28, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR }, +#define FE_32 30 /* FPR starting at position 32 */ + { 4, 32, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR }, + + /* Access register operands. */ -#define A_8 17 /* Access reg. starting at position 8 */ +#define A_8 31 /* Access reg. starting at position 8 */ { 4, 8, S390_OPERAND_AR }, -#define A_12 18 /* Access reg. starting at position 12 */ +#define A_12 32 /* Access reg. starting at position 12 */ { 4, 12, S390_OPERAND_AR }, -#define A_24 19 /* Access reg. starting at position 24 */ +#define A_24 33 /* Access reg. starting at position 24 */ { 4, 24, S390_OPERAND_AR }, -#define A_28 20 /* Access reg. starting at position 28 */ +#define A_28 34 /* Access reg. starting at position 28 */ { 4, 28, S390_OPERAND_AR }, /* Control register operands. */ -#define C_8 21 /* Control reg. starting at position 8 */ +#define C_8 35 /* Control reg. starting at position 8 */ { 4, 8, S390_OPERAND_CR }, -#define C_12 22 /* Control reg. starting at position 12 */ +#define C_12 36 /* Control reg. starting at position 12 */ { 4, 12, S390_OPERAND_CR }, /* Base register operands. */ -#define B_16 23 /* Base register starting at position 16 */ - { 4, 16, S390_OPERAND_BASE|S390_OPERAND_GPR }, -#define B_32 24 /* Base register starting at position 32 */ - { 4, 32, S390_OPERAND_BASE|S390_OPERAND_GPR }, +#define B_16 37 /* Base register starting at position 16 */ + { 4, 16, S390_OPERAND_BASE | S390_OPERAND_GPR }, +#define B_32 38 /* Base register starting at position 32 */ + { 4, 32, S390_OPERAND_BASE | S390_OPERAND_GPR }, -#define X_12 25 /* Index register starting at position 12 */ - { 4, 12, S390_OPERAND_INDEX|S390_OPERAND_GPR }, +#define X_12 39 /* Index register starting at position 12 */ + { 4, 12, S390_OPERAND_INDEX | S390_OPERAND_GPR }, /* Address displacement operands. */ -#define D_20 26 /* Displacement starting at position 20 */ +#define D_20 40 /* Displacement starting at position 20 */ { 12, 20, S390_OPERAND_DISP }, -#define DO_20 27 /* optional Displ. starting at position 20 */ - { 12, 20, S390_OPERAND_DISP|S390_OPERAND_OPTIONAL }, -#define D_36 28 /* Displacement starting at position 36 */ +#define DO_20 41 /* optional Displ. starting at position 20 */ + { 12, 20, S390_OPERAND_DISP | S390_OPERAND_OPTIONAL }, +#define D_36 42 /* Displacement starting at position 36 */ { 12, 36, S390_OPERAND_DISP }, -#define D20_20 29 /* 20 bit displacement starting at 20 */ - { 20, 20, S390_OPERAND_DISP|S390_OPERAND_SIGNED }, +#define D20_20 43 /* 20 bit displacement starting at 20 */ + { 20, 20, S390_OPERAND_DISP | S390_OPERAND_SIGNED }, /* Length operands. */ -#define L4_8 30 /* 4 bit length starting at position 8 */ +#define L4_8 44 /* 4 bit length starting at position 8 */ { 4, 8, S390_OPERAND_LENGTH }, -#define L4_12 31 /* 4 bit length starting at position 12 */ +#define L4_12 45 /* 4 bit length starting at position 12 */ { 4, 12, S390_OPERAND_LENGTH }, -#define L8_8 32 /* 8 bit length starting at position 8 */ +#define L8_8 46 /* 8 bit length starting at position 8 */ { 8, 8, S390_OPERAND_LENGTH }, /* Signed immediate operands. */ -#define I8_8 33 /* 8 bit signed value starting at 8 */ +#define I8_8 47 /* 8 bit signed value starting at 8 */ { 8, 8, S390_OPERAND_SIGNED }, -#define I8_32 34 /* 8 bit signed value starting at 32 */ +#define I8_32 48 /* 8 bit signed value starting at 32 */ { 8, 32, S390_OPERAND_SIGNED }, -#define I16_16 35 /* 16 bit signed value starting at 16 */ +#define I16_16 49 /* 16 bit signed value starting at 16 */ { 16, 16, S390_OPERAND_SIGNED }, -#define I16_32 36 /* 16 bit signed value starting at 32 */ +#define I16_32 50 /* 16 bit signed value starting at 32 */ { 16, 32, S390_OPERAND_SIGNED }, -#define I32_16 37 /* 32 bit signed value starting at 16 */ +#define I32_16 51 /* 32 bit signed value starting at 16 */ { 32, 16, S390_OPERAND_SIGNED }, /* Unsigned immediate operands. */ -#define U4_8 38 /* 4 bit unsigned value starting at 8 */ +#define U4_8 52 /* 4 bit unsigned value starting at 8 */ { 4, 8, 0 }, -#define U4_12 39 /* 4 bit unsigned value starting at 12 */ +#define U4_12 53 /* 4 bit unsigned value starting at 12 */ { 4, 12, 0 }, -#define U4_16 40 /* 4 bit unsigned value starting at 16 */ +#define U4_16 54 /* 4 bit unsigned value starting at 16 */ { 4, 16, 0 }, -#define U4_20 41 /* 4 bit unsigned value starting at 20 */ +#define U4_20 55 /* 4 bit unsigned value starting at 20 */ { 4, 20, 0 }, -#define U4_32 42 /* 4 bit unsigned value starting at 32 */ +#define U4_32 56 /* 4 bit unsigned value starting at 32 */ { 4, 32, 0 }, -#define U8_8 43 /* 8 bit unsigned value starting at 8 */ +#define U8_8 57 /* 8 bit unsigned value starting at 8 */ { 8, 8, 0 }, -#define U8_16 44 /* 8 bit unsigned value starting at 16 */ +#define U8_16 58 /* 8 bit unsigned value starting at 16 */ { 8, 16, 0 }, -#define U8_24 45 /* 8 bit unsigned value starting at 24 */ +#define U8_24 59 /* 8 bit unsigned value starting at 24 */ { 8, 24, 0 }, -#define U8_32 46 /* 8 bit unsigned value starting at 32 */ +#define U8_32 60 /* 8 bit unsigned value starting at 32 */ { 8, 32, 0 }, -#define U16_16 47 /* 16 bit unsigned value starting at 16 */ +#define U16_16 61 /* 16 bit unsigned value starting at 16 */ { 16, 16, 0 }, -#define U16_32 48 /* 16 bit unsigned value starting at 32 */ +#define U16_32 62 /* 16 bit unsigned value starting at 32 */ { 16, 32, 0 }, -#define U32_16 49 /* 32 bit unsigned value starting at 16 */ +#define U32_16 63 /* 32 bit unsigned value starting at 16 */ { 32, 16, 0 }, /* PC-relative address operands. */ -#define J16_16 50 /* PC relative jump offset at 16 */ +#define J16_16 64 /* PC relative jump offset at 16 */ { 16, 16, S390_OPERAND_PCREL }, -#define J32_16 51 /* PC relative long offset at 16 */ +#define J32_16 65 /* PC relative long offset at 16 */ { 32, 16, S390_OPERAND_PCREL }, /* Conditional mask operands. */ -#define M_16OPT 52 /* 4 bit optional mask starting at 16 */ +#define M_16OPT 66 /* 4 bit optional mask starting at 16 */ { 4, 16, S390_OPERAND_OPTIONAL }, }; @@ -204,10 +240,13 @@ const struct s390_operand s390_operands[] = c - control register d - displacement, 12 bit f - floating pointer register + fe - even numbered floating point register operand i - signed integer, 4, 8, 16 or 32 bit l - length, 4 or 8 bit p - pc relative r - general purpose register + ro - optional register operand + re - even numbered register operand u - unsigned integer, 4, 8, 16 or 32 bit m - mode field, 4 bit 0 - operand skipped. @@ -260,49 +299,78 @@ const struct s390_operand s390_operands[] = #define INSTR_RRE_AA 4, { A_24,A_28,0,0,0,0 } /* e.g. cpya */ #define INSTR_RRE_AR 4, { A_24,R_28,0,0,0,0 } /* e.g. sar */ #define INSTR_RRE_F0 4, { F_24,0,0,0,0,0 } /* e.g. sqer */ +#define INSTR_RRE_FE0 4, { FE_24,0,0,0,0,0 } /* e.g. lzxr */ #define INSTR_RRE_FF 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */ +#define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } /* e.g. lxdbr */ +#define INSTR_RRE_FFE 4, { F_24,FE_28,0,0,0,0 } /* e.g. lexr */ +#define INSTR_RRE_FEFE 4, { FE_24,FE_28,0,0,0,0 } /* e.g. dxr */ #define INSTR_RRE_R0 4, { R_24,0,0,0,0,0 } /* e.g. ipm */ #define INSTR_RRE_RA 4, { R_24,A_28,0,0,0,0 } /* e.g. ear */ #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. cefbr */ +#define INSTR_RRE_RFE 4, { R_24,FE_28,0,0,0,0 } /* e.g. csxtr */ #define INSTR_RRE_RR 4, { R_24,R_28,0,0,0,0 } /* e.g. lura */ +#define INSTR_RRE_RER 4, { RE_24,R_28,0,0,0,0 } /* e.g. tre */ +#define INSTR_RRE_RERE 4, { RE_24,RE_28,0,0,0,0 } /* e.g. cuse */ #define INSTR_RRE_FR 4, { F_24,R_28,0,0,0,0 } /* e.g. ldgr */ +#define INSTR_RRE_FER 4, { FE_24,R_28,0,0,0,0 } /* e.g. cxfbr */ /* Actually efpc and sfpc do not take an optional operand. This is just a workaround for existing code e.g. glibc. */ #define INSTR_RRE_RR_OPT 4, { R_24,RO_28,0,0,0,0 } /* efpc, sfpc */ #define INSTR_RRF_F0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr */ +#define INSTR_RRF_FE0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. myr */ #define INSTR_RRF_F0FF2 4, { F_24,F_16,F_28,0,0,0 } /* e.g. cpsdr */ #define INSTR_RRF_F0FR 4, { F_24,F_16,R_28,0,0,0 } /* e.g. iedtr */ +#define INSTR_RRF_FE0FER 4, { FE_24,FE_16,R_28,0,0,0 } /* e.g. iextr */ #define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */ +#define INSTR_RRF_FEUFEFE 4, { FE_24,FE_16,FE_28,U4_20,0,0 } /* e.g. qaxtr */ #define INSTR_RRF_FUFF2 4, { F_24,F_28,F_16,U4_20,0,0 } /* e.g. adtra */ +#define INSTR_RRF_FEUFEFE2 4, { FE_24,FE_28,FE_16,U4_20,0,0 } /* e.g. axtra */ #define INSTR_RRF_RURR 4, { R_24,R_28,R_16,U4_20,0,0 } /* e.g. .insn */ #define INSTR_RRF_R0RR 4, { R_24,R_16,R_28,0,0,0 } /* e.g. idte */ #define INSTR_RRF_R0RR2 4, { R_24,R_28,R_16,0,0,0 } /* e.g. ark */ #define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } /* e.g. fixr */ +#define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } /* e.g. fixbr */ #define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } /* e.g. cfebr */ +#define INSTR_RRF_U0RFE 4, { R_24,U4_16,FE_28,0,0,0 } /* e.g. cfxbr */ #define INSTR_RRF_UUFF 4, { F_24,U4_16,F_28,U4_20,0,0 } /* e.g. fidtr */ +#define INSTR_RRF_UUFFE 4, { F_24,U4_16,FE_28,U4_20,0,0 } /* e.g. ldxtr */ +#define INSTR_RRF_UUFEFE 4, { FE_24,U4_16,FE_28,U4_20,0,0 } /* e.g. fixtr */ #define INSTR_RRF_0UFF 4, { F_24,F_28,U4_20,0,0,0 } /* e.g. ldetr */ +#define INSTR_RRF_0UFEF 4, { FE_24,F_28,U4_20,0,0,0 } /* e.g. lxdtr */ #define INSTR_RRF_FFRU 4, { F_24,F_16,R_28,U4_20,0,0 } /* e.g. rrdtr */ +#define INSTR_RRF_FEFERU 4, { FE_24,FE_16,R_28,U4_20,0,0 } /* e.g. rrxtr */ #define INSTR_RRF_M0RR 4, { R_24,R_28,M_16OPT,0,0,0 } /* e.g. sske */ +#define INSTR_RRF_M0RER 4, { RE_24,R_28,M_16OPT,0,0,0 } /* e.g. trte */ +#define INSTR_RRF_M0RERE 4, { RE_24,RE_28,M_16OPT,0,0,0 } /* e.g. troo */ #define INSTR_RRF_U0RR 4, { R_24,R_28,U4_16,0,0,0 } /* e.g. clrt */ #define INSTR_RRF_00RR 4, { R_24,R_28,0,0,0,0 } /* e.g. clrtne */ #define INSTR_RRF_UUFR 4, { F_24,U4_16,R_28,U4_20,0,0 } /* e.g. cdgtra */ +#define INSTR_RRF_UUFER 4, { FE_24,U4_16,R_28,U4_20,0,0 } /* e.g. cxfbra */ #define INSTR_RRF_UURF 4, { R_24,U4_16,F_28,U4_20,0,0 } /* e.g. cgdtra */ +#define INSTR_RRF_UURFE 4, { R_24,U4_16,FE_28,U4_20,0,0 } /* e.g. cfxbra */ #define INSTR_RR_0R 2, { R_12, 0,0,0,0,0 } /* e.g. br */ #define INSTR_RR_0R_OPT 2, { RO_12, 0,0,0,0,0 } /* e.g. nopr */ #define INSTR_RR_FF 2, { F_8,F_12,0,0,0,0 } /* e.g. adr */ +#define INSTR_RR_FEF 2, { FE_8,F_12,0,0,0,0 } /* e.g. mxdr */ +#define INSTR_RR_FFE 2, { F_8,FE_12,0,0,0,0 } /* e.g. ldxr */ +#define INSTR_RR_FEFE 2, { FE_8,FE_12,0,0,0,0 } /* e.g. axr */ #define INSTR_RR_R0 2, { R_8, 0,0,0,0,0 } /* e.g. spm */ #define INSTR_RR_RR 2, { R_8,R_12,0,0,0,0 } /* e.g. lr */ +#define INSTR_RR_RER 2, { RE_8,R_12,0,0,0,0 } /* e.g. dr */ #define INSTR_RR_U0 2, { U8_8, 0,0,0,0,0 } /* e.g. svc */ #define INSTR_RR_UR 2, { U4_8,R_12,0,0,0,0 } /* e.g. bcr */ #define INSTR_RRR_F0FF 4, { F_24,F_28,F_16,0,0,0 } /* e.g. ddtr */ +#define INSTR_RRR_FE0FEFE 4, { FE_24,FE_28,FE_16,0,0,0 } /* e.g. axtr */ #define INSTR_RRS_RRRDU 6, { R_8,R_12,U4_32,D_20,B_16 } /* e.g. crb */ #define INSTR_RRS_RRRD0 6, { R_8,R_12,D_20,B_16,0 } /* e.g. crbne */ #define INSTR_RSE_RRRD 6, { R_8,R_12,D_20,B_16,0,0 } /* e.g. lmh */ +#define INSTR_RSE_RERERD 6, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. mvclu */ #define INSTR_RSE_CCRD 6, { C_8,C_12,D_20,B_16,0,0 } /* e.g. lmh */ #define INSTR_RSE_RURD 6, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icmh */ #define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */ #define INSTR_RSI_RRP 4, { R_8,R_12,J16_16,0,0,0 } /* e.g. brxh */ #define INSTR_RSY_RRRD 6, { R_8,R_12,D20_20,B_16,0,0 } /* e.g. stmy */ +#define INSTR_RSY_RERERD 6, { RE_8,RE_12,D20_20,B_16,0,0 } /* e.g. cdsy */ #define INSTR_RSY_RURD 6, { R_8,U4_12,D20_20,B_16,0,0 } /* e.g. icmh */ #define INSTR_RSY_AARD 6, { A_8,A_12,D20_20,B_16,0,0 } /* e.g. lamy */ #define INSTR_RSY_CCRD 6, { C_8,C_12,D20_20,B_16,0,0 } /* e.g. lamy */ @@ -311,19 +379,28 @@ const struct s390_operand s390_operands[] = #define INSTR_RS_AARD 4, { A_8,A_12,D_20,B_16,0,0 } /* e.g. lam */ #define INSTR_RS_CCRD 4, { C_8,C_12,D_20,B_16,0,0 } /* e.g. lctl */ #define INSTR_RS_R0RD 4, { R_8,D_20,B_16,0,0,0 } /* e.g. sll */ +#define INSTR_RS_RE0RD 4, { RE_8,D_20,B_16,0,0,0 } /* e.g. slda */ #define INSTR_RS_RRRD 4, { R_8,R_12,D_20,B_16,0,0 } /* e.g. cs */ +#define INSTR_RS_RERERD 4, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. cds */ #define INSTR_RS_RURD 4, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icm */ #define INSTR_RXE_FRRD 6, { F_8,D_20,X_12,B_16,0,0 } /* e.g. axbr */ +#define INSTR_RXE_FERRD 6, { FE_8,D_20,X_12,B_16,0,0 } /* e.g. lxdb */ #define INSTR_RXE_RRRD 6, { R_8,D_20,X_12,B_16,0,0 } /* e.g. lg */ +#define INSTR_RXE_RERRD 6, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. dsg */ #define INSTR_RXF_FRRDF 6, { F_32,F_8,D_20,X_12,B_16,0 } /* e.g. madb */ +#define INSTR_RXF_FRRDFE 6, { FE_32,F_8,D_20,X_12,B_16,0 } /* e.g. my */ +#define INSTR_RXF_FERRDFE 6, { FE_32,FE_8,D_20,X_12,B_16,0 } /* e.g. slxt */ #define INSTR_RXF_RRRDR 6, { R_32,R_8,D_20,X_12,B_16,0 } /* e.g. .insn */ #define INSTR_RXY_RRRD 6, { R_8,D20_20,X_12,B_16,0,0 } /* e.g. ly */ +#define INSTR_RXY_RERRD 6, { RE_8,D20_20,X_12,B_16,0,0 } /* e.g. dsg */ #define INSTR_RXY_FRRD 6, { F_8,D20_20,X_12,B_16,0,0 } /* e.g. ley */ #define INSTR_RXY_URRD 6, { U4_8,D20_20,X_12,B_16,0,0 } /* e.g. pfd */ #define INSTR_RX_0RRD 4, { D_20,X_12,B_16,0,0,0 } /* e.g. be */ #define INSTR_RX_0RRD_OPT 4, { DO_20,X_12,B_16,0,0,0 } /* e.g. nop */ #define INSTR_RX_FRRD 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. ae */ +#define INSTR_RX_FERRD 4, { FE_8,D_20,X_12,B_16,0,0 } /* e.g. mxd */ #define INSTR_RX_RRRD 4, { R_8,D_20,X_12,B_16,0,0 } /* e.g. l */ +#define INSTR_RX_RERRD 4, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. d */ #define INSTR_RX_URRD 4, { U4_8,D_20,X_12,B_16,0,0 } /* e.g. bc */ #define INSTR_SI_URD 4, { D_20,B_16,U8_8,0,0,0 } /* e.g. cli */ #define INSTR_SIY_URD 6, { D20_20,B_16,U8_8,0,0,0 } /* e.g. tmy */ @@ -339,7 +416,8 @@ const struct s390_operand s390_operands[] = #define INSTR_SS_RRRDRD2 6, { R_8,D_20,B_16,R_12,D_36,B_32 } /* e.g. plo */ #define INSTR_SS_RRRDRD3 6, { R_8,R_12,D_20,B_16,D_36,B_32 } /* e.g. lmd */ #define INSTR_SSF_RRDRD 6, { D_20,B_16,D_36,B_32,R_8,0 } /* e.g. mvcos */ -#define INSTR_SSF_RRDRD2 6, { R_8,D_20,B_16,D_36,B_32,0 } /* e.g. lpd */ +#define INSTR_SSF_RRDRD2 6, { R_8,D_20,B_16,D_36,B_32,0 } +#define INSTR_SSF_RERDRD2 6, { RE_8,D_20,B_16,D_36,B_32,0 } /* e.g. lpd */ #define INSTR_S_00 4, { 0,0,0,0,0,0 } /* e.g. hsch */ #define INSTR_S_RD 4, { D_20,B_16,0,0,0,0 } /* e.g. lpsw */ @@ -376,42 +454,70 @@ const struct s390_operand s390_operands[] = #define MASK_RRE_AA { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } #define MASK_RRE_AR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } #define MASK_RRE_F0 { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 } +#define MASK_RRE_FE0 { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 } #define MASK_RRE_FF { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } +#define MASK_RRE_FEF { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } +#define MASK_RRE_FFE { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } +#define MASK_RRE_FEFE { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } #define MASK_RRE_R0 { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 } #define MASK_RRE_RA { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } #define MASK_RRE_RF { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } +#define MASK_RRE_RFE { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } #define MASK_RRE_RR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } +#define MASK_RRE_RER { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } +#define MASK_RRE_RERE { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } #define MASK_RRE_FR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } +#define MASK_RRE_FER { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } #define MASK_RRE_RR_OPT { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } #define MASK_RRF_F0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } +#define MASK_RRF_FE0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } #define MASK_RRF_F0FF2 { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } #define MASK_RRF_F0FR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } +#define MASK_RRF_FE0FER { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } #define MASK_RRF_FUFF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RRF_FEUFEFE { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } #define MASK_RRF_FUFF2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RRF_FEUFEFE2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } #define MASK_RRF_RURR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } #define MASK_RRF_R0RR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } #define MASK_RRF_R0RR2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } #define MASK_RRF_U0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } +#define MASK_RRF_U0FEFE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } #define MASK_RRF_U0RF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } +#define MASK_RRF_U0RFE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } #define MASK_RRF_UUFF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RRF_UUFFE { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RRF_UUFEFE { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } #define MASK_RRF_0UFF { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 } +#define MASK_RRF_0UFEF { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 } #define MASK_RRF_FFRU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RRF_FEFERU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } #define MASK_RRF_M0RR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } +#define MASK_RRF_M0RER { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } +#define MASK_RRF_M0RERE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } #define MASK_RRF_U0RR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } #define MASK_RRF_00RR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } #define MASK_RRF_UUFR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RRF_UUFER { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } #define MASK_RRF_UURF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RRF_UURFE { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } #define MASK_RR_0R { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 } #define MASK_RR_0R_OPT { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 } #define MASK_RR_FF { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RR_FEF { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RR_FFE { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RR_FEFE { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_RR_R0 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } #define MASK_RR_RR { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RR_RER { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_RR_U0 { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_RR_UR { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_RRR_F0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } +#define MASK_RRR_FE0FEFE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } #define MASK_RRS_RRRDU { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff } #define MASK_RRS_RRRD0 { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } #define MASK_RSE_RRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } +#define MASK_RSE_RERERD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } #define MASK_RSE_CCRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } #define MASK_RSL_R0RD { 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff } @@ -419,25 +525,35 @@ const struct s390_operand s390_operands[] = #define MASK_RS_AARD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_RS_CCRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_RS_R0RD { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RS_RE0RD { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } #define MASK_RS_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RS_RERERD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_RS_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_RSY_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } +#define MASK_RSY_RERERD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } #define MASK_RSY_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } #define MASK_RSY_AARD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } #define MASK_RSY_CCRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } #define MASK_RSY_RDRM { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } #define MASK_RSY_RDR0 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff } #define MASK_RXE_FRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } +#define MASK_RXE_FERRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } #define MASK_RXE_RRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } +#define MASK_RXE_RERRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } #define MASK_RXF_FRRDF { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff } +#define MASK_RXF_FRRDFE { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff } +#define MASK_RXF_FERRDFE { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff } #define MASK_RXF_RRRDR { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff } #define MASK_RXY_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } +#define MASK_RXY_RERRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } #define MASK_RXY_FRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } #define MASK_RXY_URRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } #define MASK_RX_0RRD { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 } #define MASK_RX_0RRD_OPT { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 } #define MASK_RX_FRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RX_FERRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_RX_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } +#define MASK_RX_RERRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_RX_URRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_SI_URD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_SIY_URD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } @@ -454,6 +570,7 @@ const struct s390_operand s390_operands[] = #define MASK_SS_RRRDRD3 { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } #define MASK_SSF_RRDRD { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } #define MASK_SSF_RRDRD2 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } +#define MASK_SSF_RERDRD2 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } #define MASK_S_00 { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 } #define MASK_S_RD { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt index 4aa0da7..be44e90 100644 --- a/opcodes/s390-opc.txt +++ b/opcodes/s390-opc.txt @@ -16,7 +16,7 @@ fa ap SS_LLRDRD "add decimal" g5 esa,zarch 3e aur RR_FF "add unnormalized (short)" g5 esa,zarch 6e aw RX_FRRD "add unnormalized (long)" g5 esa,zarch 2e awr RR_FF "add unnormalized (long)" g5 esa,zarch -36 axr RR_FF "add normalized" g5 esa,zarch +36 axr RR_FEFE "add normalized" g5 esa,zarch b240 bakr RRE_RR "branch and stack" g5 esa,zarch 45 bal RX_RRRD "branch and link" g5 esa,zarch 05 balr RR_RR "branch and link" g5 esa,zarch @@ -34,7 +34,7 @@ b258 bsg RRE_RR "branch in subspace group" g5 esa,zarch 59 c RX_RRRD "compare" g5 esa,zarch 69 cd RX_FRRD "compare (long)" g5 esa,zarch 29 cdr RR_FF "compare (long)" g5 esa,zarch -bb cds RS_RRRD "compare double and swap" g5 esa,zarch +bb cds RS_RERERD "compare double and swap" g5 esa,zarch 79 ce RX_FRRD "compare (short)" g5 esa,zarch 39 cer RR_FF "compare (short)" g5 esa,zarch b21a cfc S_RD "compare and form codeword" g5 esa,zarch @@ -51,19 +51,19 @@ b24d cpya RRE_AA "copy access" g5 esa,zarch 19 cr RR_RR "compare" g5 esa,zarch ba cs RS_RRRD "compare and swap" g5 esa,zarch b230 csch S_00 "clear subchannel" g5 esa,zarch -b257 cuse RRE_RR "compare until substring equal" g5 esa,zarch +b257 cuse RRE_RERE "compare until substring equal" g5 esa,zarch b250 csp RRE_RR "compare and swap and purge" g5 esa,zarch 4f cvb RX_RRRD "convert to binary" g5 esa,zarch 4e cvd RX_RRRD "convert to decimal" g5 esa,zarch -5d d RX_RRRD "divide" g5 esa,zarch +5d d RX_RERRD "divide" g5 esa,zarch 6d dd RX_FRRD "divide (long)" g5 esa,zarch 2d ddr RR_FF "divide (long)" g5 esa,zarch 7d de RX_FRRD "divide (short)" g5 esa,zarch 3d der RR_FF "divide (short)" g5 esa,zarch 83 diag RS_RRRD "diagnose" g5 esa,zarch fd dp SS_LLRDRD "divide decimal" g5 esa,zarch -1d dr RR_RR "divide" g5 esa,zarch -b22d dxr RRE_FF "divide (ext.)" g5 esa,zarch +1d dr RR_RER "divide" g5 esa,zarch +b22d dxr RRE_FEFE "divide (ext.)" g5 esa,zarch b24f ear RRE_RA "extract access" g5 esa,zarch de ed SS_L0RDRD "edit" g5 esa,zarch df edmk SS_L0RDRD "edit and mark" g5 esa,zarch @@ -107,15 +107,15 @@ b7 lctl RS_CCRD "load control" g5 esa,zarch 82 lpsw S_RD "load PSW" g5 esa,zarch 18 lr RR_RR "load" g5 esa,zarch b1 lra RX_RRRD "load real address" g5 esa,zarch -25 ldxr RR_FF "load rounded (ext. to long)" g5 esa,zarch -25 lrdr RR_FF "load rounded (ext. to long)" g5 esa,zarch +25 ldxr RR_FFE "load rounded (ext. to long)" g5 esa,zarch +25 lrdr RR_FFE "load rounded (ext. to long)" g5 esa,zarch 35 ledr RR_FF "load rounded (long to short)" g5 esa,zarch 35 lrer RR_FF "load rounded (long to short)" g5 esa,zarch 22 ltdr RR_FF "load and test (long)" g5 esa,zarch 32 lter RR_FF "load and test (short)" g5 esa,zarch 12 ltr RR_RR "load and test" g5 esa,zarch b24b lura RRE_RR "load using real address" g5 esa,zarch -5c m RX_RRRD "multiply" g5 esa,zarch +5c m RX_RERRD "multiply" g5 esa,zarch af mc SI_URD "monitor call" g5 esa,zarch 6c md RX_FRRD "multiply (long)" g5 esa,zarch 2c mdr RR_FF "multiply (long)" g5 esa,zarch @@ -125,7 +125,7 @@ af mc SI_URD "monitor call" g5 esa,zarch 3c mer RR_FF "multiply (short to long)" g5 esa,zarch 4c mh RX_RRRD "multiply halfword" g5 esa,zarch fc mp SS_LLRDRD "multiply decimal" g5 esa,zarch -1c mr RR_RR "multiply" g5 esa,zarch +1c mr RR_RER "multiply" g5 esa,zarch b232 msch S_RD "modify subchannel" g5 esa,zarch b247 msta RRE_R0 "modify stacked state" g5 esa,zarch d2 mvc SS_L0RDRD "move" g5 esa,zarch @@ -142,9 +142,9 @@ f1 mvo SS_LLRDRD "move with offset" g5 esa,zarch b254 mvpg RRE_RR "move page" g5 esa,zarch b255 mvst RRE_RR "move string" g5 esa,zarch d3 mvz SS_L0RDRD "move zones" g5 esa,zarch -67 mxd RX_FRRD "multiply (long to ext.)" g5 esa,zarch -27 mxdr RR_FF "multiply (long to ext.)" g5 esa,zarch -26 mxr RR_FF "multiply (ext.)" g5 esa,zarch +67 mxd RX_FERRD "multiply (long to ext.)" g5 esa,zarch +27 mxdr RR_FEF "multiply (long to ext.)" g5 esa,zarch +26 mxr RR_FEFE "multiply (ext.)" g5 esa,zarch 54 n RX_RRRD "AND" g5 esa,zarch d4 nc SS_L0RDRD "AND" g5 esa,zarch 94 ni SI_URD "AND" g5 esa,zarch @@ -179,8 +179,8 @@ b214 sie S_RD "start interpretive execution" g5 esa,zarch ae sigp RS_RRRD "signal processor" g5 esa,zarch 5f sl RX_RRRD "subtract logical" g5 esa,zarch 8b sla RS_R0RD "shift left single" g5 esa,zarch -8f slda RS_R0RD "shift left double (long)" g5 esa,zarch -8d sldl RS_R0RD "shift left double logical (long)" g5 esa,zarch +8f slda RS_RE0RD "shift left double (long)" g5 esa,zarch +8d sldl RS_RE0RD "shift left double logical (long)" g5 esa,zarch 89 sll RS_R0RD "shift left single logical" g5 esa,zarch 1f slr RR_RR "subtract logical" g5 esa,zarch fb sp SS_LLRDRD "subtract decimal" g5 esa,zarch @@ -192,8 +192,8 @@ b244 sqdr RRE_FF "square root (long)" g5 esa,zarch b245 sqer RRE_FF "square root (short)" g5 esa,zarch 1b sr RR_RR "subtract" g5 esa,zarch 8a sra RS_R0RD "shift right single" g5 esa,zarch -8e srda RS_R0RD "shift right double (long)" g5 esa,zarch -8c srdl RS_R0RD "shift right double logical (long)" g5 esa,zarch +8e srda RS_RE0RD "shift right double (long)" g5 esa,zarch +8c srdl RS_RE0RD "shift right double logical (long)" g5 esa,zarch 88 srl RS_R0RD "shift right single logical" g5 esa,zarch f0 srp SS_LIRDRD "shift and round decimal" g5 esa,zarch b25e srst RRE_RR "search string" g5 esa,zarch @@ -227,7 +227,7 @@ b246 stura RRE_RR "store using real address" g5 esa,zarch 0a svc RR_U0 "supervisor call" g5 esa,zarch 6f sw RX_FRRD "subtract unnormalized (long)" g5 esa,zarch 2f swr RR_FF "subtract unnormalized (long)" g5 esa,zarch -37 sxr RR_FF "subtract normalized (ext.)" g5 esa,zarch +37 sxr RR_FEFE "subtract normalized (ext.)" g5 esa,zarch b24c tar RRE_AR "test access" g5 esa,zarch b22c tb RRE_0R "test block" g5 esa,zarch 91 tm SI_URD "test under mask" g5 esa,zarch @@ -255,7 +255,7 @@ b241 cksm RRE_RR "checksum" g5 esa,zarch a70e chi RI_RI "compare halfword immediate" g5 esa,zarch a9 clcle RS_RRRD "compare logical long extended" g5 esa,zarch a708 lhi RI_RI "load halfword immediate" g5 esa,zarch -a8 mvcle RS_RRRD "move long extended" g5 esa,zarch +a8 mvcle RS_RERERD "move long extended" g5 esa,zarch a70c mhi RI_RI "multiply halfword immediate" g5 esa,zarch b252 msr RRE_RR "multiply single" g5 esa,zarch 71 ms RX_RRRD "multiply single" g5 esa,zarch @@ -271,12 +271,12 @@ a701 tml RI_RU "test under mask low" g5 esa,zarch 47f0 b RX_0RRD "unconditional branch" g5 esa,zarch a704 j*8 RI_0P "conditional jump" g5 esa,zarch a7f4 j RI_0P "unconditional jump" g5 esa,zarch -b34a axbr RRE_FF "add extended bfp" g5 esa,zarch +b34a axbr RRE_FEFE "add extended bfp" g5 esa,zarch b31a adbr RRE_FF "add long bfp" g5 esa,zarch ed000000001a adb RXE_FRRD "add long bfp" g5 esa,zarch b30a aebr RRE_FF "add short bfp" g5 esa,zarch ed000000000a aeb RXE_FRRD "add short bfp" g5 esa,zarch -b349 cxbr RRE_FF "compare extended bfp" g5 esa,zarch +b349 cxbr RRE_FEFE "compare extended bfp" g5 esa,zarch b319 cdbr RRE_FF "compare long bfp" g5 esa,zarch ed0000000019 cdb RXE_FRRD "compare long bfp" g5 esa,zarch b309 cebr RRE_FF "compare short bfp" g5 esa,zarch @@ -286,13 +286,13 @@ b318 kdbr RRE_FF "compare and signal long bfp" g5 esa,zarch ed0000000018 kdb RXE_FRRD "compare and signal long bfp" g5 esa,zarch b308 kebr RRE_FF "compare and signal short bfp" g5 esa,zarch ed0000000008 keb RXE_FRRD "compare and signal short bfp" g5 esa,zarch -b396 cxfbr RRE_FR "convert from fixed 32 to extended bfp" g5 esa,zarch +b396 cxfbr RRE_FER "convert from fixed 32 to extended bfp" g5 esa,zarch b395 cdfbr RRE_FR "convert from fixed 32 to long bfp" g5 esa,zarch b394 cefbr RRE_FR "convert from fixed 32 to short bfp" g5 esa,zarch -b39a cfxbr RRF_U0RF "convert to fixed extended bfp to 32" g5 esa,zarch +b39a cfxbr RRF_U0RFE "convert to fixed extended bfp to 32" g5 esa,zarch b399 cfdbr RRF_U0RF "convert to fixed long bfp to 32" g5 esa,zarch b398 cfebr RRF_U0RF "convert to fixed short bfp to 32" g5 esa,zarch -b34d dxbr RRE_FF "divide extended bfp" g5 esa,zarch +b34d dxbr RRE_FEFE "divide extended bfp" g5 esa,zarch b31d ddbr RRE_FF "divide long bfp" g5 esa,zarch ed000000001d ddb RXE_FRRD "divide long bfp" g5 esa,zarch b30d debr RRE_FF "divide short bfp" g5 esa,zarch @@ -300,36 +300,36 @@ ed000000000d deb RXE_FRRD "divide short bfp" g5 esa,zarch b35b didbr RRF_FUFF "divide to integer long bfp" g5 esa,zarch b353 diebr RRF_FUFF "divide to integer short bfp" g5 esa,zarch b38c efpc RRE_RR_OPT "extract fpc" g5 esa,zarch -b342 ltxbr RRE_FF "load and test extended bfp" g5 esa,zarch +b342 ltxbr RRE_FEFE "load and test extended bfp" g5 esa,zarch b312 ltdbr RRE_FF "load and test long bfp" g5 esa,zarch b302 ltebr RRE_FF "load and test short bfp" g5 esa,zarch -b343 lcxbr RRE_FF "load complement extended bfp" g5 esa,zarch +b343 lcxbr RRE_FEFE "load complement extended bfp" g5 esa,zarch b313 lcdbr RRE_FF "load complement long bfp" g5 esa,zarch b303 lcebr RRE_FF "load complement short bfp" g5 esa,zarch -b347 fixbr RRF_U0FF "load fp integer extended bfp" g5 esa,zarch +b347 fixbr RRF_U0FEFE "load fp integer extended bfp" g5 esa,zarch b35f fidbr RRF_U0FF "load fp integer long bfp" g5 esa,zarch b357 fiebr RRF_U0FF "load fp integer short bfp" g5 esa,zarch b29d lfpc S_RD "load fpc" g5 esa,zarch -b305 lxdbr RRE_FF "load lengthened long to extended bfp" g5 esa,zarch -ed0000000005 lxdb RXE_FRRD "load lengthened long to extended bfp" g5 esa,zarch -b306 lxebr RRE_FF "load lengthened short to extended bfp" g5 esa,zarch -ed0000000006 lxeb RXE_FRRD "load lengthened short to extended bfp" g5 esa,zarch +b305 lxdbr RRE_FEF "load lengthened long to extended bfp" g5 esa,zarch +ed0000000005 lxdb RXE_FERRD "load lengthened long to extended bfp" g5 esa,zarch +b306 lxebr RRE_FEF "load lengthened short to extended bfp" g5 esa,zarch +ed0000000006 lxeb RXE_FERRD "load lengthened short to extended bfp" g5 esa,zarch b304 ldebr RRE_FF "load lengthened short to long bfp" g5 esa,zarch ed0000000004 ldeb RXE_FRRD "load lengthened short to long bfp" g5 esa,zarch -b341 lnxbr RRE_FF "load negative extended bfp" g5 esa,zarch +b341 lnxbr RRE_FEFE "load negative extended bfp" g5 esa,zarch b311 lndbr RRE_FF "load negative long bfp" g5 esa,zarch b301 lnebr RRE_FF "load negative short bfp" g5 esa,zarch -b340 lpxbr RRE_FF "load positive extended bfp" g5 esa,zarch +b340 lpxbr RRE_FEFE "load positive extended bfp" g5 esa,zarch b310 lpdbr RRE_FF "load positive long bfp" g5 esa,zarch b300 lpebr RRE_FF "load positive short bfp" g5 esa,zarch -b345 ldxbr RRE_FF "load rounded extended to long bfp" g5 esa,zarch -b346 lexbr RRE_FF "load rounded extended to short bfp" g5 esa,zarch +b345 ldxbr RRE_FEFE "load rounded extended to long bfp" g5 esa,zarch +b346 lexbr RRE_FEFE "load rounded extended to short bfp" g5 esa,zarch b344 ledbr RRE_FF "load rounded long to short bfp" g5 esa,zarch -b34c mxbr RRE_FF "multiply extended bfp" g5 esa,zarch +b34c mxbr RRE_FEFE "multiply extended bfp" g5 esa,zarch b31c mdbr RRE_FF "multiply long bfp" g5 esa,zarch ed000000001c mdb RXE_FRRD "multiply long bfp" g5 esa,zarch -b307 mxdbr RRE_FF "multiply long to extended bfp" g5 esa,zarch -ed0000000007 mxdb RXE_FRRD "multiply long to extended bfp" g5 esa,zarch +b307 mxdbr RRE_FEF "multiply long to extended bfp" g5 esa,zarch +ed0000000007 mxdb RXE_FERRD "multiply long to extended bfp" g5 esa,zarch b317 meebr RRE_FF "multiply short bfp" g5 esa,zarch ed0000000017 meeb RXE_FRRD "multiply short bfp" g5 esa,zarch b30c mdebr RRE_FF "multiply short to long bfp" g5 esa,zarch @@ -344,22 +344,22 @@ b30f msebr RRF_F0FF "multiply and subtract short bfp" g5 esa,zarch ed000000000f mseb RXF_FRRDF "multiply and subtract short bfp" g5 esa,zarch b384 sfpc RRE_RR_OPT "set fpc" g5 esa,zarch b299 srnm S_RD "set rounding mode" g5 esa,zarch -b316 sqxbr RRE_FF "square root extended bfp" g5 esa,zarch +b316 sqxbr RRE_FEFE "square root extended bfp" g5 esa,zarch b315 sqdbr RRE_FF "square root long bfp" g5 esa,zarch ed0000000015 sqdb RXE_FRRD "square root long bfp" g5 esa,zarch b314 sqebr RRE_FF "square root short bfp" g5 esa,zarch ed0000000014 sqeb RXE_FRRD "square root short bfp" g5 esa,zarch b29c stfpc S_RD "store fpc" g5 esa,zarch -b34b sxbr RRE_FF "subtract extended bfp" g5 esa,zarch +b34b sxbr RRE_FEFE "subtract extended bfp" g5 esa,zarch b31b sdbr RRE_FF "subtract long bfp" g5 esa,zarch ed000000001b sdb RXE_FRRD "subtract long bfp" g5 esa,zarch b30b sebr RRE_FF "subtract short bfp" g5 esa,zarch ed000000000b seb RXE_FRRD "subtract short bfp" g5 esa,zarch -ed0000000012 tcxb RXE_FRRD "test data class extended bfp" g5 esa,zarch +ed0000000012 tcxb RXE_FERRD "test data class extended bfp" g5 esa,zarch ed0000000011 tcdb RXE_FRRD "test data class long bfp" g5 esa,zarch ed0000000010 tceb RXE_FRRD "test data class short bfp" g5 esa,zarch b274 siga S_RD "signal adapter" g5 esa,zarch -b2a6 cuutf RRE_RR "convert unicode to utf-8" g5 esa,zarch +b2a6 cuutf RRE_RERE "convert unicode to utf-8" g5 esa,zarch b2a7 cutfu RRE_RR "convert utf-8 to unicode" g5 esa,zarch ee plo SS_RRRDRD2 "perform locked operation" g5 esa,zarch b25a bsa RRE_RR "branch and set authority" g5 esa,zarch @@ -369,14 +369,14 @@ b27d stsi S_RD "store system information" g5 esa,zarch 01ff trap2 E "trap" g5 esa,zarch b2ff trap4 S_RD "trap4" g5 esa,zarch b278 stcke S_RD "store clock extended" g5 esa,zarch -b2a5 tre RRE_RR "translate extended" g5 esa,zarch -eb000000008e mvclu RSE_RRRD "move long unicode" g5 esa,zarch +b2a5 tre RRE_RER "translate extended" g5 esa,zarch +eb000000008e mvclu RSE_RERERD "move long unicode" g5 esa,zarch e9 pka SS_L2RDRD "pack ascii" g5 esa,zarch e1 pku SS_L0RDRD "pack unicode" g5 esa,zarch -b993 troo RRE_RR "translate one to one" g5 esa,zarch -b992 trot RRE_RR "translate one to two" g5 esa,zarch -b991 trto RRE_RR "translate two to one" g5 esa,zarch -b990 trtt RRE_RR "translate two to two" g5 esa,zarch +b993 troo RRE_RER "translate one to one" g5 esa,zarch +b992 trot RRE_RER "translate one to two" g5 esa,zarch +b991 trto RRE_RER "translate two to one" g5 esa,zarch +b990 trtt RRE_RER "translate two to two" g5 esa,zarch ea unpka SS_L0RDRD "unpack ascii" g5 esa,zarch e2 unpku SS_L0RDRD "unpack unicode" g5 esa,zarch b358 thder RRE_FF "convert short bfp to long hfp" g5 esa,zarch @@ -385,7 +385,7 @@ b350 tbedr RRF_U0FF "convert long hfp to short bfp" g5 esa,zarch b351 tbdr RRF_U0FF "convert long hfp to long bfp" g5 esa,zarch b374 lzer RRE_F0 "load short zero" g5 esa,zarch b375 lzdr RRE_F0 "load long zero" g5 esa,zarch -b376 lzxr RRE_F0 "load extended zero" g5 esa,zarch +b376 lzxr RRE_FE0 "load extended zero" g5 esa,zarch # Here are the new esame instructions: b946 bctgr RRE_RR "branch on count 64" z900 zarch b900 lpgr RRE_RR "load positive 64" z900 zarch @@ -456,7 +456,7 @@ e50000000002 strag SSE_RDRD "store read address" z900 zarch eb0000000025 stctg RSE_CCRD "store control 64" z900 zarch eb000000002f lctlg RSE_CCRD "load control 64" z900 zarch eb0000000030 csg RSE_RRRD "compare and swap 64" z900 zarch -eb000000003e cdsg RSE_RRRD "compare double and swap 64" z900 zarch +eb000000003e cdsg RSE_RERERD "compare double and swap 64" z900 zarch eb0000000020 clmh RSE_RURD "compare logical characters under mask high" z900 zarch eb000000002c stcmh RSE_RURD "store characters under mask high" z900 zarch eb0000000080 icmh RSE_RURD "insert characters under mask high" z900 zarch @@ -478,16 +478,16 @@ b90c msgr RRE_RR "multiply single 64" z900 zarch b91c msgfr RRE_RR "multiply single 64<32" z900 zarch b3a4 cegbr RRE_FR "convert from fixed 64 to short bfp" z900 zarch b3a5 cdgbr RRE_FR "convert from fixed 64 to long bfp" z900 zarch -b3a6 cxgbr RRE_FR "convert from fixed 64 to extended bfp" z900 zarch +b3a6 cxgbr RRE_FER "convert from fixed 64 to extended bfp" z900 zarch b3a8 cgebr RRF_U0RF "convert to fixed short bfd to 64" z900 zarch b3a9 cgdbr RRF_U0RF "convert to fixed long bfp to 64" z900 zarch -b3aa cgxbr RRF_U0RF "convert to fixed extended bfp to 64" z900 zarch +b3aa cgxbr RRF_U0RFE "convert to fixed extended bfp to 64" z900 zarch b3c4 cegr RRE_FR "convert from fixed 64 to short hfp" z900 zarch b3c5 cdgr RRE_FR "convert from fixed 64 to long hfp" z900 zarch -b3c6 cxgr RRE_FR "convert from fixed 64 to extended hfp" z900 zarch +b3c6 cxgr RRE_FER "convert from fixed 64 to extended hfp" z900 zarch b3c8 cger RRF_U0RF "convert to fixed short hfp to 64" z900 zarch b3c9 cgdr RRF_U0RF "convert to fixed long hfp to 64" z900 zarch -b3ca cgxr RRF_U0RF "convert to fixed extended hfp to 64" z900 zarch +b3ca cgxr RRF_U0RFE "convert to fixed extended hfp to 64" z900 zarch 010b tam E "test addressing mode" z900 esa,zarch 010c sam24 E "set addressing mode 24" z900 esa,zarch 010d sam31 E "set addressing mode 31" z900 esa,zarch @@ -510,76 +510,76 @@ a50e llilh RI_RU "load logical immediate low high" z900 zarch a50f llill RI_RU "load logical immediate low low" z900 zarch b2b1 stfl S_RD "store facility list" z900 esa,zarch b2b2 lpswe S_RD "load psw extended" z900 zarch -b90d dsgr RRE_RR "divide single 64" z900 zarch +b90d dsgr RRE_RER "divide single 64" z900 zarch b90f lrvgr RRE_RR "load reversed 64" z900 zarch b916 llgfr RRE_RR "load logical 64<32" z900 zarch b917 llgtr RRE_RR "load logical thirty one bits" z900 zarch -b91d dsgfr RRE_RR "divide single 64<32" z900 zarch +b91d dsgfr RRE_RER "divide single 64<32" z900 zarch b91f lrvr RRE_RR "load reversed 32" z900 esa,zarch -b986 mlgr RRE_RR "multiply logical 64" z900 zarch -b987 dlgr RRE_RR "divide logical 64" z900 zarch +b986 mlgr RRE_RER "multiply logical 64" z900 zarch +b987 dlgr RRE_RER "divide logical 64" z900 zarch b988 alcgr RRE_RR "add logical with carry 64" z900 zarch b989 slbgr RRE_RR "subtract logical with borrow 64" z900 zarch b98d epsw RRE_RR "extract psw" z900 esa,zarch -b996 mlr RRE_RR "multiply logical 32" z900 esa,zarch -b997 dlr RRE_RR "divide logical 32" z900 esa,zarch +b996 mlr RRE_RER "multiply logical 32" z900 esa,zarch +b997 dlr RRE_RER "divide logical 32" z900 esa,zarch b998 alcr RRE_RR "add logical with carry 32" z900 esa,zarch b999 slbr RRE_RR "subtract logical with borrow 32" z900 esa,zarch b99d esea RRE_R0 "extract and set extended authority" z900 zarch c000 larl RIL_RP "load address relative long" z900 esa,zarch -e3000000000d dsg RXE_RRRD "divide single 64" z900 zarch +e3000000000d dsg RXE_RERRD "divide single 64" z900 zarch e3000000000f lrvg RXE_RRRD "load reversed 64" z900 zarch e30000000016 llgf RXE_RRRD "load logical 64<32" z900 zarch e30000000017 llgt RXE_RRRD "load logical thirty one bits" z900 zarch -e3000000001d dsgf RXE_RRRD "divide single 64<32" z900 zarch +e3000000001d dsgf RXE_RERRD "divide single 64<32" z900 zarch e3000000001e lrv RXE_RRRD "load reversed 32" z900 esa,zarch e3000000001f lrvh RXE_RRRD "load reversed 16" z900 esa,zarch e3000000002f strvg RXE_RRRD "store reversed 64" z900 zarch e3000000003e strv RXE_RRRD "store reversed 32" z900 esa,zarch e3000000003f strvh RXE_RRRD "store reversed 64" z900 esa,zarch -e30000000086 mlg RXE_RRRD "multiply logical 64" z900 zarch -e30000000087 dlg RXE_RRRD "divide logical 64" z900 zarch +e30000000086 mlg RXE_RERRD "multiply logical 64" z900 zarch +e30000000087 dlg RXE_RERRD "divide logical 64" z900 zarch e30000000088 alcg RXE_RRRD "add logical with carry 64" z900 zarch e30000000089 slbg RXE_RRRD "subtract logical with borrow 64" z900 zarch e3000000008e stpq RXE_RRRD "store pair to quadword" z900 zarch -e3000000008f lpq RXE_RRRD "load pair from quadword" z900 zarch -e30000000096 ml RXE_RRRD "multiply logical 32" z900 esa,zarch -e30000000097 dl RXE_RRRD "divide logical 32" z900 esa,zarch +e3000000008f lpq RXE_RERRD "load pair from quadword" z900 zarch +e30000000096 ml RXE_RERRD "multiply logical 32" z900 esa,zarch +e30000000097 dl RXE_RERRD "divide logical 32" z900 esa,zarch e30000000098 alc RXE_RRRD "add logical with carry 32" z900 esa,zarch e30000000099 slb RXE_RRRD "subtract logical with borrow 32" z900 esa,zarch e30000000090 llgc RXE_RRRD "load logical character" z900 zarch e30000000091 llgh RXE_RRRD "load logical halfword" z900 zarch eb000000001c rllg RSE_RRRD "rotate left single logical 64" z900 zarch eb000000001d rll RSE_RRRD "rotate left single logical 32" z900 esa,zarch -b369 cxr RRE_FF "compare extended hfp" g5 esa,zarch -b3b6 cxfr RRE_FR "convert from fixed 32 to extended hfp" g5 esa,zarch +b369 cxr RRE_FEFE "compare extended hfp" g5 esa,zarch +b3b6 cxfr RRE_FER "convert from fixed 32 to extended hfp" g5 esa,zarch b3b5 cdfr RRE_FR "convert from fixed 32 to long hfp" g5 esa,zarch b3b4 cefr RRE_FR "convert from fixed 32 to short hfp" g5 esa,zarch -b3ba cfxr RRF_U0RF "convert to fixed extended hfp to 32" g5 esa,zarch +b3ba cfxr RRF_U0RFE "convert to fixed extended hfp to 32" g5 esa,zarch b3b9 cfdr RRF_U0RF "convert to fixed long hfp to 32" g5 esa,zarch b3b8 cfer RRF_U0RF "convert to fixed short hfp to 32" g5 esa,zarch -b362 ltxr RRE_FF "load and test extended hfp" g5 esa,zarch -b363 lcxr RRE_FF "load complement extended hfp" g5 esa,zarch -b367 fixr RRE_FF "load fp integer extended hfp" g5 esa,zarch +b362 ltxr RRE_FEFE "load and test extended hfp" g5 esa,zarch +b363 lcxr RRE_FEFE "load complement extended hfp" g5 esa,zarch +b367 fixr RRE_FEFE "load fp integer extended hfp" g5 esa,zarch b37f fidr RRE_FF "load fp integer long hfp" g5 esa,zarch b377 fier RRE_FF "load fp integer short hfp" g5 esa,zarch -b325 lxdr RRE_FF "load lengthened long to extended hfp" g5 esa,zarch -ed0000000025 lxd RXE_FRRD "load lengthened long to extended hfp" g5 esa,zarch -b326 lxer RRE_FF "load lengthened short to extended hfp" g5 esa,zarch -ed0000000026 lxe RXE_FRRD "load lengthened short to extended hfp" g5 esa,zarch +b325 lxdr RRE_FEF "load lengthened long to extended hfp" g5 esa,zarch +ed0000000025 lxd RXE_FERRD "load lengthened long to extended hfp" g5 esa,zarch +b326 lxer RRE_FEF "load lengthened short to extended hfp" g5 esa,zarch +ed0000000026 lxe RXE_FERRD "load lengthened short to extended hfp" g5 esa,zarch b324 lder RRE_FF "load lengthened short to long hfp" g5 esa,zarch ed0000000024 lde RXE_FRRD "load lengthened short to long hfp" g5 esa,zarch -b361 lnxr RRE_FF "load negative long hfp" g5 esa,zarch -b360 lpxr RRE_FF "load positive long hfp" g5 esa,zarch -b366 lexr RRE_FF "load rounded extended to short hfp" g5 esa,zarch +b361 lnxr RRE_FEFE "load negative extended hfp" g5 esa,zarch +b360 lpxr RRE_FEFE "load positive extended hfp" g5 esa,zarch +b366 lexr RRE_FFE "load rounded extended to short hfp" g5 esa,zarch b337 meer RRE_FF "multiply short hfp" g5 esa,zarch ed0000000037 mee RXE_FRRD "multiply short hfp" g5 esa,zarch -b336 sqxr RRE_FF "square root extended hfp" g5 esa,zarch +b336 sqxr RRE_FEFE "square root extended hfp" g5 esa,zarch ed0000000034 sqe RXE_FRRD "square root short hfp" g5 esa,zarch ed0000000035 sqd RXE_FRRD "square root long hfp" g5 esa,zarch b263 cmpsc RRE_RR "compression call" g5 esa,zarch eb00000000c0 tp RSL_R0RD "test decimal" g5 esa,zarch -b365 lxr RRE_FF "load extended fp" g5 esa,zarch +b365 lxr RRE_FEFE "load extended fp" g5 esa,zarch b22e pgin RRE_RR "page in" g5 esa,zarch b22f pgout RRE_RR "page out" g5 esa,zarch b276 xsch S_00 "cancel subchannel" g5 esa,zarch @@ -591,7 +591,7 @@ eb0000000054 niy SIY_URD "and immediate with long offset" z990 zarch e30000000054 ny RXY_RRRD "and with long offset" z990 zarch e30000000059 cy RXY_RRRD "compare with long offset" z990 zarch eb0000000014 csy RSY_RRRD "compare and swap with long offset" z990 zarch -eb0000000031 cdsy RSY_RRRD "compare double and swap with long offset" z990 zarch +eb0000000031 cdsy RSY_RERERD "compare double and swap with long offset" z990 zarch e30000000079 chy RXY_RRRD "compare halfword with long offset" z990 zarch e30000000055 cly RXY_RRRD "compare logical with long offset" z990 zarch eb0000000055 cliy SIY_URD "compare logical immediate with long offset" z990 zarch @@ -637,7 +637,7 @@ e30000000009 sg RXY_RRRD "subtract with long offset 64" z990 zarch e3000000000a alg RXY_RRRD "add logical with long offset 64" z990 zarch e3000000000b slg RXY_RRRD "subtract logical with long offset 64" z990 zarch e3000000000c msg RXY_RRRD "multiply single with long offset 64" z990 zarch -e3000000000d dsg RXY_RRRD "divide single 64" z990 zarch +e3000000000d dsg RXY_RERRD "divide single 64" z990 zarch e3000000000e cvbg RXY_RRRD "convert to binary with long offset 64" z990 zarch e3000000000f lrvg RXY_RRRD "load reversed 64" z990 zarch e30000000014 lgf RXY_RRRD "load 64<32" z990 zarch @@ -649,7 +649,7 @@ e30000000019 sgf RXY_RRRD "subtract with long offset 64<32" z990 zarch e3000000001a algf RXY_RRRD "add logical with long offset 64<32" z990 zarch e3000000001b slgf RXY_RRRD "subtract logical with long offset 64<32" z990 zarch e3000000001c msgf RXY_RRRD "multiply single with long offset 64<32" z990 zarch -e3000000001d dsgf RXY_RRRD "divide single 64<32" z990 zarch +e3000000001d dsgf RXY_RERRD "divide single 64<32" z990 zarch e3000000001e lrv RXY_RRRD "load reversed 32" z990 esa,zarch e3000000001f lrvh RXY_RRRD "load reversed 16" z990 esa,zarch e30000000020 cg RXY_RRRD "compare with long offset 64" z990 zarch @@ -665,16 +665,16 @@ e30000000046 bctg RXY_RRRD "branch on count 64" z990 zarch e30000000080 ng RXY_RRRD "and with long offset 64" z990 zarch e30000000081 og RXY_RRRD "or with long offset 64" z990 zarch e30000000082 xg RXY_RRRD "exclusive or with long offset 64" z990 zarch -e30000000086 mlg RXY_RRRD "multiply logical 64" z990 zarch -e30000000087 dlg RXY_RRRD "divide logical 64" z990 zarch +e30000000086 mlg RXY_RERRD "multiply logical 64" z990 zarch +e30000000087 dlg RXY_RERRD "divide logical 64" z990 zarch e30000000088 alcg RXY_RRRD "add logical with carry 64" z990 zarch e30000000089 slbg RXY_RRRD "subtract logical with borrow 64" z990 zarch e3000000008e stpq RXY_RRRD "store pair to quadword" z990 zarch -e3000000008f lpq RXY_RRRD "load pair from quadword" z990 zarch +e3000000008f lpq RXY_RERRD "load pair from quadword" z990 zarch e30000000090 llgc RXY_RRRD "load logical character" z990 zarch e30000000091 llgh RXY_RRRD "load logical halfword" z990 zarch -e30000000096 ml RXY_RRRD "multiply logical 32" z990 esa,zarch -e30000000097 dl RXY_RRRD "divide logical 32" z990 esa,zarch +e30000000096 ml RXY_RERRD "multiply logical 32" z990 esa,zarch +e30000000097 dl RXY_RERRD "divide logical 32" z990 esa,zarch e30000000098 alc RXY_RRRD "add logical with carry 32" z990 esa,zarch e30000000099 slb RXY_RRRD "subtract logical with borrow 32" z990 esa,zarch eb0000000004 lmg RSY_RRRD "load multiple with long offset 64" z990 zarch @@ -692,11 +692,11 @@ eb0000000026 stmh RSY_RRRD "store multiple high" z990 zarch eb000000002c stcmh RSY_RURD "store characters under mask high with long offset" z990 zarch eb000000002f lctlg RSY_CCRD "load control 64" z990 zarch eb0000000030 csg RSY_RRRD "compare and swap with long offset 64" z990 zarch -eb000000003e cdsg RSY_RRRD "compare double and swap with long offset 64" z990 zarch +eb000000003e cdsg RSY_RERERD "compare double and swap with long offset 64" z990 zarch eb0000000044 bxhg RSY_RRRD "branch on index high 64" z990 zarch eb0000000045 bxleg RSY_RRRD "branch on index low or equal 64" z990 zarch eb0000000080 icmh RSY_RURD "insert characters under mask high with long offset" z990 zarch -eb000000008e mvclu RSY_RRRD "move long unicode" z990 esa,zarch +eb000000008e mvclu RSY_RERERD "move long unicode" z990 esa,zarch eb000000008f clclu RSY_RRRD "compare logical long unicode with long offset" z990 esa,zarch eb0000000096 lmh RSY_RRRD "load multiple high" z990 zarch # new z990 instructions @@ -763,26 +763,26 @@ b9aa lptea RRF_RURR "load page-table-entry address" z9-109 zarch # z9-109 conditional sske facility, sske instruction entered twice b22b sske RRF_M0RR "set storage key extended" z9-109 zarch # z9-109 etf2-enhancement facility, instructions entered twice -b993 troo RRF_M0RR "translate one to one" z9-109 esa,zarch -b992 trot RRF_M0RR "translate one to two" z9-109 esa,zarch -b991 trto RRF_M0RR "translate two to one" z9-109 esa,zarch -b990 trtt RRF_M0RR "translate two to two" z9-109 esa,zarch +b993 troo RRF_M0RERE "translate one to one" z9-109 esa,zarch +b992 trot RRF_M0RERE "translate one to two" z9-109 esa,zarch +b991 trto RRF_M0RERE "translate two to one" z9-109 esa,zarch +b990 trtt RRF_M0RERE "translate two to two" z9-109 esa,zarch # z9-109 etf3-enhancement facility, some instructions entered twice -b9b1 cu24 RRF_M0RR "convert utf-16 to utf-32" z9-109 zarch -b2a6 cu21 RRF_M0RR "convert utf-16 to utf-8" z9-109 zarch -b2a6 cuutf RRF_M0RR "convert unicode to utf-8" z9-109 zarch -b9b3 cu42 RRE_RR "convert utf-32 to utf-16" z9-109 zarch -b9b2 cu41 RRE_RR "convert utf-32 to utf-8" z9-109 zarch -b2a7 cu12 RRF_M0RR "convert utf-8 to utf-16" z9-109 zarch -b2a7 cutfu RRF_M0RR "convert utf-8 to unicode" z9-109 zarch -b9b0 cu14 RRF_M0RR "convert utf-8 to utf-32" z9-109 zarch +b9b1 cu24 RRF_M0RERE "convert utf-16 to utf-32" z9-109 zarch +b2a6 cu21 RRF_M0RERE "convert utf-16 to utf-8" z9-109 zarch +b2a6 cuutf RRF_M0RERE "convert unicode to utf-8" z9-109 zarch +b9b3 cu42 RRE_RERE "convert utf-32 to utf-16" z9-109 zarch +b9b2 cu41 RRE_RERE "convert utf-32 to utf-8" z9-109 zarch +b2a7 cu12 RRF_M0RERE "convert utf-8 to utf-16" z9-109 zarch +b2a7 cutfu RRF_M0RERE "convert utf-8 to unicode" z9-109 zarch +b9b0 cu14 RRF_M0RERE "convert utf-8 to utf-32" z9-109 zarch b9eb srstu RRE_RR "search string unicode" z9-109 zarch d0 trtr SS_L0RDRD "tranlate and test reverse" z9-109 zarch # z9-109 unnormalized hfp multiply & multiply and add -b33b myr RRF_F0FF "multiply unnormalized long hfp" z9-109 zarch +b33b myr RRF_FE0FF "multiply unnormalized long hfp" z9-109 zarch b33d myhr RRF_F0FF "multiply unnormalized long hfp high" z9-109 zarch b339 mylr RRF_F0FF "multiply unnormalized long hfp low" z9-109 zarch -ed000000003b my RXF_FRRDF "multiply unnormalized long hfp" z9-109 zarch +ed000000003b my RXF_FRRDFE "multiply unnormalized long hfp" z9-109 zarch ed000000003d myh RXF_FRRDF "multiply unnormalized long hfp high" z9-109 zarch ed0000000039 myl RXF_FRRDF "multiply unnormalized long hfp low" z9-109 zarch b33a mayr RRF_F0FF "multiply and add unnormalized long hfp" z9-109 zarch @@ -798,62 +798,62 @@ b373 lcdfr RRE_FF "load complement no cc" z9-ec zarch b3c1 ldgr RRE_FR "load fpr from gr" z9-ec zarch b3cd lgdr RRE_RF "load gr from fpr" z9-ec zarch b3d2 adtr RRR_F0FF "add long dfp" z9-ec zarch -b3da axtr RRR_F0FF "add extended dfp" z9-ec zarch +b3da axtr RRR_FE0FEFE "add extended dfp" z9-ec zarch b3e4 cdtr RRE_FF "compare long dfp" z9-ec zarch -b3ec cxtr RRE_FF "compare extended dfp" z9-ec zarch +b3ec cxtr RRE_FEFE "compare extended dfp" z9-ec zarch b3e0 kdtr RRE_FF "compare and signal long dfp" z9-ec zarch b3e8 kxtr RRE_FF "compare and signal extended dfp" z9-ec zarch b3f4 cedtr RRE_FF "compare exponent long dfp" z9-ec zarch -b3fc cextr RRE_FF "compare exponent extended dfp" z9-ec zarch +b3fc cextr RRE_FEFE "compare exponent extended dfp" z9-ec zarch b3f1 cdgtr RRE_FR "convert from fixed long dfp" z9-ec zarch -b3f9 cxgtr RRE_FR "convert from fixed extended dfp" z9-ec zarch +b3f9 cxgtr RRE_FER "convert from fixed extended dfp" z9-ec zarch b3f3 cdstr RRE_FR "convert from signed bcd long dfp" z9-ec zarch b3fb cxstr RRE_FR "convert from signed bcd extended dfp" z9-ec zarch b3f2 cdutr RRE_FR "convert from unsigned bcd to long dfp" z9-ec zarch -b3fa cxutr RRE_FR "convert from unsigned bcd to extended dfp" z9-ec zarch +b3fa cxutr RRE_FER "convert from unsigned bcd to extended dfp" z9-ec zarch b3e1 cgdtr RRF_U0RF "convert from long dfp to fixed" z9-ec zarch -b3e9 cgxtr RRF_U0RF "convert from extended dfp to fixed" z9-ec zarch +b3e9 cgxtr RRF_U0RFE "convert from extended dfp to fixed" z9-ec zarch b3e3 csdtr RRE_RF "convert from long dfp to signed bcd" z9-ec zarch -b3eb csxtr RRE_RF "convert from extended dfp to signed bcd" z9-ec zarch +b3eb csxtr RRE_RFE "convert from extended dfp to signed bcd" z9-ec zarch b3e2 cudtr RRE_RF "convert from long dfp to unsigned bcd" z9-ec zarch -b3ea cuxtr RRE_RF "convert from extended dfp to unsigned bcd" z9-ec zarch +b3ea cuxtr RRE_RFE "convert from extended dfp to unsigned bcd" z9-ec zarch b3d1 ddtr RRR_F0FF "divide long dfp" z9-ec zarch -b3d9 dxtr RRR_F0FF "divide extended dfp" z9-ec zarch +b3d9 dxtr RRR_FE0FEFE "divide extended dfp" z9-ec zarch b3e5 eedtr RRE_RF "extract biased exponent from long dfp" z9-ec zarch -b3ed eextr RRE_RF "extract biased exponent from extended dfp" z9-ec zarch +b3ed eextr RRE_RFE "extract biased exponent from extended dfp" z9-ec zarch b3e7 esdtr RRE_RF "extract significance from long dfp" z9-ec zarch -b3ef esxtr RRE_RF "extract significance from extended dfp" z9-ec zarch +b3ef esxtr RRE_RFE "extract significance from extended dfp" z9-ec zarch b3f6 iedtr RRF_F0FR "insert biased exponent long dfp" z9-ec zarch -b3fe iextr RRF_F0FR "insert biased exponent extended dfp" z9-ec zarch +b3fe iextr RRF_FE0FER "insert biased exponent extended dfp" z9-ec zarch b3d6 ltdtr RRE_FF "load and test long dfp" z9-ec zarch -b3de ltxtr RRE_FF "load and test extended dfp" z9-ec zarch +b3de ltxtr RRE_FEFE "load and test extended dfp" z9-ec zarch b3d7 fidtr RRF_UUFF "load fp integer long dfp" z9-ec zarch -b3df fixtr RRF_UUFF "load fp integer extended dfp" z9-ec zarch +b3df fixtr RRF_UUFEFE "load fp integer extended dfp" z9-ec zarch b2bd lfas S_RD "load fpd and signal" z9-ec zarch b3d4 ldetr RRF_0UFF "load lengthened long dfp" z9-ec zarch -b3dc lxdtr RRF_0UFF "load lengthened extended dfp" z9-ec zarch +b3dc lxdtr RRF_0UFEF "load lengthened extended dfp" z9-ec zarch b3d5 ledtr RRF_UUFF "load rounded long dfp" z9-ec zarch -b3dd ldxtr RRF_UUFF "load rounded extended dfp" z9-ec zarch +b3dd ldxtr RRF_UUFFE "load rounded extended dfp" z9-ec zarch b3d0 mdtr RRR_F0FF "multiply long dfp" z9-ec zarch -b3d8 mxtr RRR_F0FF "multiply extended dfp" z9-ec zarch +b3d8 mxtr RRR_FE0FEFE "multiply extended dfp" z9-ec zarch b3f5 qadtr RRF_FUFF "Quantize long dfp" z9-ec zarch -b3fd qaxtr RRF_FUFF "Quantize extended dfp" z9-ec zarch +b3fd qaxtr RRF_FEUFEFE "Quantize extended dfp" z9-ec zarch b3f7 rrdtr RRF_FFRU "Reround long dfp" z9-ec zarch -b3ff rrxtr RRF_FFRU "Reround extended dfp" z9-ec zarch +b3ff rrxtr RRF_FEFERU "Reround extended dfp" z9-ec zarch b2b9 srnmt S_RD "set rounding mode dfp" z9-ec zarch b385 sfasr RRE_R0 "set fpc and signal" z9-ec zarch ed0000000040 sldt RXF_FRRDF "shift coefficient left long dfp" z9-ec zarch -ed0000000048 slxt RXF_FRRDF "shift coefficient left extended dfp" z9-ec zarch +ed0000000048 slxt RXF_FERRDFE "shift coefficient left extended dfp" z9-ec zarch ed0000000041 srdt RXF_FRRDF "shift coefficient right long dfp" z9-ec zarch -ed0000000049 srxt RXF_FRRDF "shift coefficient right extended dfp" z9-ec zarch +ed0000000049 srxt RXF_FERRDFE "shift coefficient right extended dfp" z9-ec zarch b3d3 sdtr RRR_F0FF "subtract long dfp" z9-ec zarch -b3db sxtr RRR_F0FF "subtract extended dfp" z9-ec zarch +b3db sxtr RRR_FE0FEFE "subtract extended dfp" z9-ec zarch ed0000000050 tdcet RXE_FRRD "test data class short dfp" z9-ec zarch ed0000000054 tdcdt RXE_FRRD "test data class long dfp" z9-ec zarch -ed0000000058 tdcxt RXE_FRRD "test data class extended dfp" z9-ec zarch +ed0000000058 tdcxt RXE_FERRD "test data class extended dfp" z9-ec zarch ed0000000051 tdget RXE_FRRD "test data group short dfp" z9-ec zarch ed0000000055 tdgdt RXE_FRRD "test data group long dfp" z9-ec zarch -ed0000000059 tdgxt RXE_FRRD "test data group extended dfp" z9-ec zarch +ed0000000059 tdgxt RXE_FERRD "test data group extended dfp" z9-ec zarch 010a pfpo E "perform floating point operation" z9-ec zarch c801 ectg SSF_RRDRD "extract cpu time" z9-ec zarch c802 csst SSF_RRDRD "compare and swap and store" z9-ec zarch @@ -941,7 +941,7 @@ c406 llghrl RIL_RP "load logical halfword relative long (64<16)" z10 zarch e544 mvhhi SIL_RDI "move (16<16)" z10 zarch e54c mvhi SIL_RDI "move (32<16)" z10 zarch e548 mvghi SIL_RDI "move (64<16)" z10 zarch -e3000000005c mfy RXY_RRRD "multiply" z10 zarch +e3000000005c mfy RXY_RERRD "multiply" z10 zarch e3000000007c mhy RXY_RRRD "multiply halfword" z10 zarch c201 msfi RIL_RI "multiply single immediate (32)" z10 zarch c200 msgfi RIL_RI "multiply single immediate (64)" z10 zarch @@ -958,8 +958,8 @@ c600 exrl RIL_RP "execute relative long" z10 zarch af00 mc SI_URD "monitor call" z10 zarch b9a2 ptf RRE_R0 "perform topology function" z10 zarch b9af pfmf RRE_RR "perform frame management function" z10 zarch -b9bf trte RRF_M0RR "translate and test extended" z10 zarch -b9bd trtre RRF_M0RR "translate and test reverse extended" z10 zarch +b9bf trte RRF_M0RER "translate and test extended" z10 zarch +b9bd trtre RRF_M0RER "translate and test reverse extended" z10 zarch b9c8 ahhhr RRF_R0RR2 "add high high" z196 zarch b9d8 ahhlr RRF_R0RR2 "add high low" z196 zarch cc08 aih RIL_RI "add immediate high" z196 zarch @@ -1000,8 +1000,8 @@ eb00000000f7 lax RSY_RRRD "load and exclusive or 32 bit" z196 zarch eb00000000e7 laxg RSY_RRRD "load and exclusive or 64 bit" z196 zarch eb00000000f6 lao RSY_RRRD "load and or 32 bit" z196 zarch eb00000000e6 laog RSY_RRRD "load and or 64 bit" z196 zarch -c804 lpd SSF_RRDRD2 "load pair disjoint 32 bit" z196 zarch -c805 lpdg SSF_RRDRD2 "load pair disjoint 64 bit" z196 zarch +c804 lpd SSF_RERDRD2 "load pair disjoint 32 bit" z196 zarch +c805 lpdg SSF_RERDRD2 "load pair disjoint 64 bit" z196 zarch b9f2 locr RRF_U0RR "load on condition 32 bit" z196 zarch b9f200000000 locr*16 RRF_00RR "load on condition 32 bit" z196 zarch b9e2 locgr RRF_U0RR "load on condition 64 bit" z196 zarch @@ -1040,56 +1040,56 @@ b9e1 popcnt RRE_RR "population count" z196 zarch b9ae rrbm RRE_RR "reset reference bits multiple" z196 zarch b394 cefbra RRF_UUFR "convert from 32 bit fixed to short bfp with rounding mode" z196 zarch b395 cdfbra RRF_UUFR "convert from 32 bit fixed to long bfp with rounding mode" z196 zarch -b396 cxfbra RRF_UUFR "convert from 32 bit fixed to extended bfp with rounding mode" z196 zarch +b396 cxfbra RRF_UUFER "convert from 32 bit fixed to extended bfp with rounding mode" z196 zarch b3a4 cegbra RRF_UUFR "convert from 64 bit fixed to short bfp with rounding mode" z196 zarch b3a5 cdgbra RRF_UUFR "convert from 64 bit fixed to long bfp with rounding mode" z196 zarch -b3a6 cxgbra RRF_UUFR "convert from 64 bit fixed to extended bfp with rounding mode" z196 zarch +b3a6 cxgbra RRF_UUFER "convert from 64 bit fixed to extended bfp with rounding mode" z196 zarch b390 celfbr RRF_UUFR "convert from 32 bit logical fixed to short bfp with rounding mode" z196 zarch b391 cdlfbr RRF_UUFR "convert from 32 bit logical fixed to long bfp with rounding mode" z196 zarch -b392 cxlfbr RRF_UUFR "convert from 32 bit logical fixed to extended bfp with rounding mode" z196 zarch +b392 cxlfbr RRF_UUFER "convert from 32 bit logical fixed to extended bfp with rounding mode" z196 zarch b3a0 celgbr RRF_UUFR "convert from 64 bit logical fixed to short bfp with rounding mode" z196 zarch b3a1 cdlgbr RRF_UUFR "convert from 64 bit logical fixed to long bfp with rounding mode" z196 zarch -b3a2 cxlgbr RRF_UUFR "convert from 64 bit logical fixed to extended bfp with rounding mode" z196 zarch +b3a2 cxlgbr RRF_UUFER "convert from 64 bit logical fixed to extended bfp with rounding mode" z196 zarch b398 cfebra RRF_UURF "convert to 32 bit fixed from short bfp with rounding mode" z196 zarch b399 cfdbra RRF_UURF "convert to 32 bit fixed from long bfp with rounding mode" z196 zarch -b39a cfxbra RRF_UURF "convert to 32 bit fixed from extended bfp with rounding mode" z196 zarch +b39a cfxbra RRF_UURFE "convert to 32 bit fixed from extended bfp with rounding mode" z196 zarch b3a8 cgebra RRF_UURF "convert to 64 bit fixed from short bfp with rounding mode" z196 zarch b3a9 cgdbra RRF_UURF "convert to 64 bit fixed from long bfp with rounding mode" z196 zarch -b3aa cgxbra RRF_UURF "convert to 64 bit fixed from extended bfp with rounding mode" z196 zarch +b3aa cgxbra RRF_UURFE "convert to 64 bit fixed from extended bfp with rounding mode" z196 zarch b39c clfebr RRF_UURF "convert to 32 bit fixed logical from short bfp with rounding mode" z196 zarch b39d clfdbr RRF_UURF "convert to 32 bit fixed logical from long bfp with rounding mode" z196 zarch -b39e clfxbr RRF_UURF "convert to 32 bit fixed logical from extended bfp with rounding mode" z196 zarch +b39e clfxbr RRF_UURFE "convert to 32 bit fixed logical from extended bfp with rounding mode" z196 zarch b3ac clgebr RRF_UURF "convert to 64 bit fixed logical from short bfp with rounding mode" z196 zarch b3ad clgdbr RRF_UURF "convert to 64 bit fixed logical from long bfp with rounding mode" z196 zarch -b3ae clgxbr RRF_UURF "convert to 64 bit fixed logical from extended bfp with rounding mode" z196 zarch +b3ae clgxbr RRF_UURFE "convert to 64 bit fixed logical from extended bfp with rounding mode" z196 zarch b357 fiebra RRF_UUFF "load fp integer short bfp with rounding mode" z196 zarch b35f fidbra RRF_UUFF "load fp integer long bfp with rounding mode" z196 zarch -b347 fixbra RRF_UUFF "load fp integer extended bfp with rounding mode" z196 zarch +b347 fixbra RRF_UUFEFE "load fp integer extended bfp with rounding mode" z196 zarch b344 ledbra RRF_UUFF "load rounded short/long bfp to short/long bfp with rounding mode" z196 zarch -b345 ldxbra RRF_UUFF "load rounded long/extended bfp to long/extended bfp with rounding mode" z196 zarch -b346 lexbra RRF_UUFF "load rounded short/extended bfp to short/extended bfp with rounding mode" z196 zarch +b345 ldxbra RRF_UUFEFE "load rounded long/extended bfp to long/extended bfp with rounding mode" z196 zarch +b346 lexbra RRF_UUFEFE "load rounded short/extended bfp to short/extended bfp with rounding mode" z196 zarch b3d2 adtra RRF_FUFF2 "add long dfp with rounding mode" z196 zarch -b3da axtra RRF_FUFF2 "add extended dfp with rounding mode" z196 zarch +b3da axtra RRF_FEUFEFE2 "add extended dfp with rounding mode" z196 zarch b3f1 cdgtra RRF_UUFR "convert from fixed long dfp with rounding mode" z196 zarch b951 cdftr RRF_UUFR "convert from 32 bit fixed to long dfp with rounding mode" z196 zarch -b959 cxftr RRF_UUFR "convert from 32 bit fixed to extended dfp with rounding mode" z196 zarch -b3f9 cxgtra RRF_UUFR "convert from fixed extended dfp with rounding mode" z196 zarch +b959 cxftr RRF_UUFER "convert from 32 bit fixed to extended dfp with rounding mode" z196 zarch +b3f9 cxgtra RRF_UUFER "convert from fixed extended dfp with rounding mode" z196 zarch b952 cdlgtr RRF_UUFR "convert from 64 bit fixed logical to long dfp with rounding mode" z196 zarch -b95a cxlgtr RRF_UUFR "convert from 64 bit fixed logical to extended dfp with rounding mode" z196 zarch +b95a cxlgtr RRF_UUFER "convert from 64 bit fixed logical to extended dfp with rounding mode" z196 zarch b953 cdlftr RRF_UUFR "convert from 32 bit fixed logical to long dfp with rounding mode" z196 zarch b95b cxlftr RRF_UUFR "convert from 32 bit fixed logical to extended dfp with rounding mode" z196 zarch b3e1 cgdtra RRF_UURF "convert to 64 bit fixed from long dfp with rounding mode" z196 zarch -b3e9 cgxtra RRF_UURF "convert to 64 bit fixed from extended dfp with rounding mode" z196 zarch +b3e9 cgxtra RRF_UURFE "convert to 64 bit fixed from extended dfp with rounding mode" z196 zarch b941 cfdtr RRF_UURF "convert to 32 bit fixed from long dfp source with rounding mode" z196 zarch b949 cfxtr RRF_UURF "convert to 32 bit fixed from extended dfp source with rounding mode" z196 zarch b942 clgdtr RRF_UURF "convert to 64 bit fixed logical from long dfp with rounding mode" z196 zarch -b94a clgxtr RRF_UURF "convert to 64 bit fixed logical from extended dfp with rounding mode" z196 zarch +b94a clgxtr RRF_UURFE "convert to 64 bit fixed logical from extended dfp with rounding mode" z196 zarch b943 clfdtr RRF_UURF "convert to 32 bit fixed logical from long dfp with rounding mode" z196 zarch -b94b clfxtr RRF_UURF "convert to 32 bit fixed logical from extended dfp with rounding mode" z196 zarch +b94b clfxtr RRF_UURFE "convert to 32 bit fixed logical from extended dfp with rounding mode" z196 zarch b3d1 ddtra RRF_FUFF2 "divide long dfp with rounding mode" z196 zarch -b3d9 dxtra RRF_FUFF2 "divide extended dfp with rounding mode" z196 zarch +b3d9 dxtra RRF_FEUFEFE2 "divide extended dfp with rounding mode" z196 zarch b3d0 mdtra RRF_FUFF2 "multiply long dfp with rounding mode" z196 zarch -b3d8 mxtra RRF_FUFF2 "multiply extended dfp with rounding mode" z196 zarch +b3d8 mxtra RRF_FEUFEFE2 "multiply extended dfp with rounding mode" z196 zarch b3d3 sdtra RRF_FUFF2 "subtract long dfp with rounding mode" z196 zarch -b3db sxtra RRF_FUFF2 "subtract extended dfp with rounding mode" z196 zarch +b3db sxtra RRF_FEUFEFE2 "subtract extended dfp with rounding mode" z196 zarch b2b8 srnmb S_RD "set 3 bit bfp rounding mode" z196 zarch diff --git a/opcodes/sparc-dis.c b/opcodes/sparc-dis.c index 8dec272..b7f0cc2 100644 --- a/opcodes/sparc-dis.c +++ b/opcodes/sparc-dis.c @@ -108,7 +108,8 @@ static char *v9_hpriv_reg_names[] = static char *v9a_asr_reg_names[] = { "pcr", "pic", "dcr", "gsr", "set_softint", "clear_softint", - "softint", "tick_cmpr", "stick", "stick_cmpr" + "softint", "tick_cmpr", "stick", "stick_cmpr", "resv26", + "resv27", "cps" }; /* Macros used to extract instruction fields. Not all fields have @@ -119,6 +120,7 @@ static char *v9a_asr_reg_names[] = #define X_LDST_I(i) (((i) >> 13) & 1) #define X_ASI(i) (((i) >> 5) & 0xff) #define X_RS2(i) (((i) >> 0) & 0x1f) +#define X_RS3(i) (((i) >> 9) & 0x1f) #define X_IMM(i,n) (((i) >> 0) & ((1 << (n)) - 1)) #define X_SIMM(i,n) SEX (X_IMM ((i), (n)), (n)) #define X_DISP22(i) (((i) >> 0) & 0x3fffff) @@ -634,6 +636,13 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info) fregx (X_RS2 (insn)); break; + case '4': + freg (X_RS3 (insn)); + break; + case '5': /* Double/even. */ + fregx (X_RS3 (insn)); + break; + case 'g': freg (X_RD (insn)); break; @@ -814,7 +823,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info) break; case '/': - if (X_RS1 (insn) < 16 || X_RS1 (insn) > 25) + if (X_RS1 (insn) < 16 || X_RS1 (insn) > 28) (*info->fprintf_func) (stream, "%%reserved"); else (*info->fprintf_func) (stream, "%%%s", @@ -822,7 +831,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info) break; case '_': - if (X_RD (insn) < 16 || X_RD (insn) > 25) + if (X_RD (insn) < 16 || X_RD (insn) > 28) (*info->fprintf_func) (stream, "%%reserved"); else (*info->fprintf_func) (stream, "%%%s", @@ -882,6 +891,10 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info) (*info->fprintf_func) (stream, "%%fsr"); break; + case '(': + (*info->fprintf_func) (stream, "%%efsr"); + break; + case 'p': (*info->fprintf_func) (stream, "%%psr"); break; diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c index ad29dac..5cfb4d5 100644 --- a/opcodes/sparc-opc.c +++ b/opcodes/sparc-opc.c @@ -1,6 +1,6 @@ /* Table of opcodes for the sparc. Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2002, 2004, 2005, 2006, 2007, 2008 + 2000, 2002, 2004, 2005, 2006, 2007, 2008, 2011 Free Software Foundation, Inc. This file is part of the GNU opcodes library. @@ -298,6 +298,13 @@ const struct sparc_opcode sparc_opcodes[] = { { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RS1_G0|RD(~1), "[i],F", 0, v9 }, { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~1),"[1],F", 0, v9 }, /* ld [rs1+0],d */ +{ "ldx", F3(3, 0x21, 0)|RD(3), F3(~3, ~0x21, ~0)|RD(~3), "[1+2],(", 0, v9b }, +{ "ldx", F3(3, 0x21, 0)|RD(3), F3(~3, ~0x21, ~0)|RS2_G0|RD(~3),"[1],(", 0, v9b }, +{ "ldx", F3(3, 0x21, 1)|RD(3), F3(~3, ~0x21, ~1)|RD(~3), "[1+i],(", 0, v9b }, +{ "ldx", F3(3, 0x21, 1)|RD(3), F3(~3, ~0x21, ~1)|RD(~3), "[i+1],(", 0, v9b }, +{ "ldx", F3(3, 0x21, 1)|RD(3), F3(~3, ~0x21, ~1)|RS1_G0|RD(~3),"[i],(", 0, v9b }, +{ "ldx", F3(3, 0x21, 1)|RD(3), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~3),"[1],(", 0, v9b }, + { "lda", F3(3, 0x10, 0), F3(~3, ~0x10, ~0), "[1+2]A,d", 0, v6 }, { "lda", F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* lda [rs1+%g0],d */ { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[1+i]o,d", 0, v9 }, @@ -677,6 +684,7 @@ const struct sparc_opcode sparc_opcodes[] = { { "save", F3(2, 0x3c, 0), F3(~2, ~0x3c, ~0)|ASI(~0), "1,2,d", 0, v6 }, { "save", F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1), "1,i,d", 0, v6 }, +{ "save", F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1), "i,1,d", 0, v6 }, /* Sun assembler compatibility */ { "save", 0x81e00000, ~0x81e00000, "", F_ALIAS, v6 }, { "ret", F3(2, 0x38, 1)|RS1(0x1f)|SIMM13(8), F3(~2, ~0x38, ~1)|SIMM13(~8), "", F_UNBR|F_DELAYED, v6 }, /* jmpl %i7+8,%g0 */ @@ -762,8 +770,8 @@ const struct sparc_opcode sparc_opcodes[] = { { "scan", F3(2, 0x2c, 0), F3(~2, ~0x2c, ~0)|ASI(~0), "1,2,d", 0, sparclet|sparclite }, { "scan", F3(2, 0x2c, 1), F3(~2, ~0x2c, ~1), "1,i,d", 0, sparclet|sparclite }, -{ "popc", F3(2, 0x2e, 0), F3(~2, ~0x2e, ~0)|RS1_G0|ASI(~0),"2,d", 0, v9 }, -{ "popc", F3(2, 0x2e, 1), F3(~2, ~0x2e, ~1)|RS1_G0, "i,d", 0, v9 }, +{ "popc", F3(2, 0x2e, 0), F3(~2, ~0x2e, ~0)|RS1_G0|ASI(~0),"2,d", F_POPC, v9 }, +{ "popc", F3(2, 0x2e, 1), F3(~2, ~0x2e, ~1)|RS1_G0, "i,d", F_POPC, v9 }, { "clr", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RD_G0|RS1_G0|ASI_RS2(~0), "d", F_ALIAS, v6 }, /* or %g0,%g0,d */ { "clr", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0|SIMM13(~0), "d", F_ALIAS, v6 }, /* or %g0,0,d */ @@ -813,18 +821,28 @@ const struct sparc_opcode sparc_opcodes[] = { { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", 0, v8 }, /* wr r,r,%asrX */ { "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", 0, v8 }, /* wr r,i,%asrX */ +{ "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RS1_G0|ASI(~0), "2,m", F_ALIAS, v8 }, /* wr %g0,rs2,%asrX */ +{ "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RS1_G0, "i,m", F_ALIAS, v8 }, /* wr %g0,i,%asrX */ { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI_RS2(~0), "1,m", F_ALIAS, v8 }, /* wr rs1,%g0,%asrX */ { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|ASI(~0), "1,2,y", 0, v6 }, /* wr r,r,%y */ { "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0, "1,i,y", 0, v6 }, /* wr r,i,%y */ +{ "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|RS1_G0|ASI(~0), "2,y", F_ALIAS, v6 }, /* wr %g0,rs2,%y */ +{ "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0|RS1_G0, "i,y", F_ALIAS, v6 }, /* wr %g0,i,%y */ { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|ASI_RS2(~0), "1,y", F_ALIAS, v6 }, /* wr rs1,%g0,%y */ { "wr", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|ASI(~0), "1,2,p", 0, v6notv9 }, /* wr r,r,%psr */ { "wr", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0, "1,i,p", 0, v6notv9 }, /* wr r,i,%psr */ +{ "wr", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|RS1_G0|ASI(~0), "2,p", F_ALIAS, v6notv9 }, /* wr %g0,rs2,%psr */ +{ "wr", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0|RS1_G0, "i,p", F_ALIAS, v6notv9 }, /* wr %g0,i,%psr */ { "wr", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|ASI_RS2(~0), "1,p", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%psr */ { "wr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|ASI(~0), "1,2,w", 0, v6notv9 }, /* wr r,r,%wim */ { "wr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0, "1,i,w", 0, v6notv9 }, /* wr r,i,%wim */ +{ "wr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|RS1_G0|ASI(~0), "2,w", F_ALIAS, v6notv9 }, /* wr %g0,rs2,%wim */ +{ "wr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0|RS1_G0, "i,w", F_ALIAS, v6notv9 }, /* wr %g0,i,%wim */ { "wr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|ASI_RS2(~0), "1,w", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%wim */ { "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI(~0), "1,2,t", 0, v6notv9 }, /* wr r,r,%tbr */ { "wr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0, "1,i,t", 0, v6notv9 }, /* wr r,i,%tbr */ +{ "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|RS1_G0|ASI(~0), "2,t", F_ALIAS, v6notv9 }, /* wr %g0,rs2,%tbr */ +{ "wr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0|RS1_G0, "i,t", F_ALIAS, v6notv9 }, /* wr %g0,i,%tbr */ { "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI_RS2(~0), "1,t", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%tbr */ { "wr", F3(2, 0x30, 0)|RD(2), F3(~2, ~0x30, ~0)|RD(~2)|ASI(~0), "1,2,E", 0, v9 }, /* wr r,r,%ccr */ @@ -834,26 +852,28 @@ const struct sparc_opcode sparc_opcodes[] = { { "wr", F3(2, 0x30, 0)|RD(6), F3(~2, ~0x30, ~0)|RD(~6)|ASI(~0), "1,2,s", 0, v9 }, /* wr r,r,%fprs */ { "wr", F3(2, 0x30, 1)|RD(6), F3(~2, ~0x30, ~1)|RD(~6), "1,i,s", 0, v9 }, /* wr r,i,%fprs */ -{ "wr", F3(2, 0x30, 0)|RD(16), F3(~2, ~0x30, ~0)|RD(~16)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%pcr */ -{ "wr", F3(2, 0x30, 1)|RD(16), F3(~2, ~0x30, ~1)|RD(~16), "1,i,_", 0, v9a }, /* wr r,i,%pcr */ -{ "wr", F3(2, 0x30, 0)|RD(17), F3(~2, ~0x30, ~0)|RD(~17)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%pic */ -{ "wr", F3(2, 0x30, 1)|RD(17), F3(~2, ~0x30, ~1)|RD(~17), "1,i,_", 0, v9a }, /* wr r,i,%pic */ -{ "wr", F3(2, 0x30, 0)|RD(18), F3(~2, ~0x30, ~0)|RD(~18)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%dcr */ -{ "wr", F3(2, 0x30, 1)|RD(18), F3(~2, ~0x30, ~1)|RD(~18), "1,i,_", 0, v9a }, /* wr r,i,%dcr */ -{ "wr", F3(2, 0x30, 0)|RD(19), F3(~2, ~0x30, ~0)|RD(~19)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%gsr */ -{ "wr", F3(2, 0x30, 1)|RD(19), F3(~2, ~0x30, ~1)|RD(~19), "1,i,_", 0, v9a }, /* wr r,i,%gsr */ -{ "wr", F3(2, 0x30, 0)|RD(20), F3(~2, ~0x30, ~0)|RD(~20)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%set_softint */ -{ "wr", F3(2, 0x30, 1)|RD(20), F3(~2, ~0x30, ~1)|RD(~20), "1,i,_", 0, v9a }, /* wr r,i,%set_softint */ -{ "wr", F3(2, 0x30, 0)|RD(21), F3(~2, ~0x30, ~0)|RD(~21)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%clear_softint */ -{ "wr", F3(2, 0x30, 1)|RD(21), F3(~2, ~0x30, ~1)|RD(~21), "1,i,_", 0, v9a }, /* wr r,i,%clear_softint */ -{ "wr", F3(2, 0x30, 0)|RD(22), F3(~2, ~0x30, ~0)|RD(~22)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%softint */ -{ "wr", F3(2, 0x30, 1)|RD(22), F3(~2, ~0x30, ~1)|RD(~22), "1,i,_", 0, v9a }, /* wr r,i,%softint */ -{ "wr", F3(2, 0x30, 0)|RD(23), F3(~2, ~0x30, ~0)|RD(~23)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%tick_cmpr */ -{ "wr", F3(2, 0x30, 1)|RD(23), F3(~2, ~0x30, ~1)|RD(~23), "1,i,_", 0, v9a }, /* wr r,i,%tick_cmpr */ -{ "wr", F3(2, 0x30, 0)|RD(24), F3(~2, ~0x30, ~0)|RD(~24)|ASI(~0), "1,2,_", 0, v9b }, /* wr r,r,%sys_tick */ -{ "wr", F3(2, 0x30, 1)|RD(24), F3(~2, ~0x30, ~1)|RD(~24), "1,i,_", 0, v9b }, /* wr r,i,%sys_tick */ -{ "wr", F3(2, 0x30, 0)|RD(25), F3(~2, ~0x30, ~0)|RD(~25)|ASI(~0), "1,2,_", 0, v9b }, /* wr r,r,%sys_tick_cmpr */ -{ "wr", F3(2, 0x30, 1)|RD(25), F3(~2, ~0x30, ~1)|RD(~25), "1,i,_", 0, v9b }, /* wr r,i,%sys_tick_cmpr */ +{ "wr", F3(2, 0x30, 0)|RD(16), F3(~2, ~0x30, ~0)|RD(~16)|ASI(~0), "1,2,_", F_VIS, v9a }, /* wr r,r,%pcr */ +{ "wr", F3(2, 0x30, 1)|RD(16), F3(~2, ~0x30, ~1)|RD(~16), "1,i,_", F_VIS, v9a }, /* wr r,i,%pcr */ +{ "wr", F3(2, 0x30, 0)|RD(17), F3(~2, ~0x30, ~0)|RD(~17)|ASI(~0), "1,2,_", F_VIS, v9a }, /* wr r,r,%pic */ +{ "wr", F3(2, 0x30, 1)|RD(17), F3(~2, ~0x30, ~1)|RD(~17), "1,i,_", F_VIS, v9a }, /* wr r,i,%pic */ +{ "wr", F3(2, 0x30, 0)|RD(18), F3(~2, ~0x30, ~0)|RD(~18)|ASI(~0), "1,2,_", F_VIS, v9a }, /* wr r,r,%dcr */ +{ "wr", F3(2, 0x30, 1)|RD(18), F3(~2, ~0x30, ~1)|RD(~18), "1,i,_", F_VIS, v9a }, /* wr r,i,%dcr */ +{ "wr", F3(2, 0x30, 0)|RD(19), F3(~2, ~0x30, ~0)|RD(~19)|ASI(~0), "1,2,_", F_VIS, v9a }, /* wr r,r,%gsr */ +{ "wr", F3(2, 0x30, 1)|RD(19), F3(~2, ~0x30, ~1)|RD(~19), "1,i,_", F_VIS, v9a }, /* wr r,i,%gsr */ +{ "wr", F3(2, 0x30, 0)|RD(20), F3(~2, ~0x30, ~0)|RD(~20)|ASI(~0), "1,2,_", F_VIS, v9a }, /* wr r,r,%set_softint */ +{ "wr", F3(2, 0x30, 1)|RD(20), F3(~2, ~0x30, ~1)|RD(~20), "1,i,_", F_VIS, v9a }, /* wr r,i,%set_softint */ +{ "wr", F3(2, 0x30, 0)|RD(21), F3(~2, ~0x30, ~0)|RD(~21)|ASI(~0), "1,2,_", F_VIS, v9a }, /* wr r,r,%clear_softint */ +{ "wr", F3(2, 0x30, 1)|RD(21), F3(~2, ~0x30, ~1)|RD(~21), "1,i,_", F_VIS, v9a }, /* wr r,i,%clear_softint */ +{ "wr", F3(2, 0x30, 0)|RD(22), F3(~2, ~0x30, ~0)|RD(~22)|ASI(~0), "1,2,_", F_VIS, v9a }, /* wr r,r,%softint */ +{ "wr", F3(2, 0x30, 1)|RD(22), F3(~2, ~0x30, ~1)|RD(~22), "1,i,_", F_VIS, v9a }, /* wr r,i,%softint */ +{ "wr", F3(2, 0x30, 0)|RD(23), F3(~2, ~0x30, ~0)|RD(~23)|ASI(~0), "1,2,_", F_VIS, v9a }, /* wr r,r,%tick_cmpr */ +{ "wr", F3(2, 0x30, 1)|RD(23), F3(~2, ~0x30, ~1)|RD(~23), "1,i,_", F_VIS, v9a }, /* wr r,i,%tick_cmpr */ +{ "wr", F3(2, 0x30, 0)|RD(24), F3(~2, ~0x30, ~0)|RD(~24)|ASI(~0), "1,2,_", F_VIS2, v9b }, /* wr r,r,%sys_tick */ +{ "wr", F3(2, 0x30, 1)|RD(24), F3(~2, ~0x30, ~1)|RD(~24), "1,i,_", F_VIS2, v9b }, /* wr r,i,%sys_tick */ +{ "wr", F3(2, 0x30, 0)|RD(25), F3(~2, ~0x30, ~0)|RD(~25)|ASI(~0), "1,2,_", F_VIS2, v9b }, /* wr r,r,%sys_tick_cmpr */ +{ "wr", F3(2, 0x30, 1)|RD(25), F3(~2, ~0x30, ~1)|RD(~25), "1,i,_", F_VIS2, v9b }, /* wr r,i,%sys_tick_cmpr */ +{ "wr", F3(2, 0x30, 0)|RD(28), F3(~2, ~0x30, ~0)|RD(~28)|ASI(~0), "1,2,_", F_VIS3, v9b }, /* wr r,r,%cps */ +{ "wr", F3(2, 0x30, 1)|RD(28), F3(~2, ~0x30, ~1)|RD(~28), "1,i,_", F_VIS3, v9b }, /* wr r,i,%cps */ { "rd", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|SIMM13(~0), "M,d", 0, v8 }, /* rd %asrX,r */ { "rd", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|RS1_G0|SIMM13(~0), "y,d", 0, v6 }, /* rd %y,r */ @@ -867,14 +887,15 @@ const struct sparc_opcode sparc_opcodes[] = { { "rd", F3(2, 0x28, 0)|RS1(5), F3(~2, ~0x28, ~0)|RS1(~5)|SIMM13(~0), "P,d", 0, v9 }, /* rd %pc,r */ { "rd", F3(2, 0x28, 0)|RS1(6), F3(~2, ~0x28, ~0)|RS1(~6)|SIMM13(~0), "s,d", 0, v9 }, /* rd %fprs,r */ -{ "rd", F3(2, 0x28, 0)|RS1(16), F3(~2, ~0x28, ~0)|RS1(~16)|SIMM13(~0), "/,d", 0, v9a }, /* rd %pcr,r */ -{ "rd", F3(2, 0x28, 0)|RS1(17), F3(~2, ~0x28, ~0)|RS1(~17)|SIMM13(~0), "/,d", 0, v9a }, /* rd %pic,r */ -{ "rd", F3(2, 0x28, 0)|RS1(18), F3(~2, ~0x28, ~0)|RS1(~18)|SIMM13(~0), "/,d", 0, v9a }, /* rd %dcr,r */ -{ "rd", F3(2, 0x28, 0)|RS1(19), F3(~2, ~0x28, ~0)|RS1(~19)|SIMM13(~0), "/,d", 0, v9a }, /* rd %gsr,r */ -{ "rd", F3(2, 0x28, 0)|RS1(22), F3(~2, ~0x28, ~0)|RS1(~22)|SIMM13(~0), "/,d", 0, v9a }, /* rd %softint,r */ -{ "rd", F3(2, 0x28, 0)|RS1(23), F3(~2, ~0x28, ~0)|RS1(~23)|SIMM13(~0), "/,d", 0, v9a }, /* rd %tick_cmpr,r */ -{ "rd", F3(2, 0x28, 0)|RS1(24), F3(~2, ~0x28, ~0)|RS1(~24)|SIMM13(~0), "/,d", 0, v9b }, /* rd %sys_tick,r */ -{ "rd", F3(2, 0x28, 0)|RS1(25), F3(~2, ~0x28, ~0)|RS1(~25)|SIMM13(~0), "/,d", 0, v9b }, /* rd %sys_tick_cmpr,r */ +{ "rd", F3(2, 0x28, 0)|RS1(16), F3(~2, ~0x28, ~0)|RS1(~16)|SIMM13(~0), "/,d", F_VIS, v9a }, /* rd %pcr,r */ +{ "rd", F3(2, 0x28, 0)|RS1(17), F3(~2, ~0x28, ~0)|RS1(~17)|SIMM13(~0), "/,d", F_VIS, v9a }, /* rd %pic,r */ +{ "rd", F3(2, 0x28, 0)|RS1(18), F3(~2, ~0x28, ~0)|RS1(~18)|SIMM13(~0), "/,d", F_VIS, v9a }, /* rd %dcr,r */ +{ "rd", F3(2, 0x28, 0)|RS1(19), F3(~2, ~0x28, ~0)|RS1(~19)|SIMM13(~0), "/,d", F_VIS, v9a }, /* rd %gsr,r */ +{ "rd", F3(2, 0x28, 0)|RS1(22), F3(~2, ~0x28, ~0)|RS1(~22)|SIMM13(~0), "/,d", F_VIS, v9a }, /* rd %softint,r */ +{ "rd", F3(2, 0x28, 0)|RS1(23), F3(~2, ~0x28, ~0)|RS1(~23)|SIMM13(~0), "/,d", F_VIS, v9a }, /* rd %tick_cmpr,r */ +{ "rd", F3(2, 0x28, 0)|RS1(24), F3(~2, ~0x28, ~0)|RS1(~24)|SIMM13(~0), "/,d", F_VIS2, v9b }, /* rd %sys_tick,r */ +{ "rd", F3(2, 0x28, 0)|RS1(25), F3(~2, ~0x28, ~0)|RS1(~25)|SIMM13(~0), "/,d", F_VIS2, v9b }, /* rd %sys_tick_cmpr,r */ +{ "rd", F3(2, 0x28, 0)|RS1(28), F3(~2, ~0x28, ~0)|RS1(~28)|SIMM13(~0), "/,d", F_VIS3, v9b }, /* rd %cps,r */ { "rdpr", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|SIMM13(~0), "?,d", 0, v9 }, /* rdpr %priv,r */ { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0), "1,2,!", 0, v9 }, /* wrpr r1,r2,%priv */ @@ -908,20 +929,25 @@ const struct sparc_opcode sparc_opcodes[] = { { "mov", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|RS1_G0|SIMM13(~0), "w,d", F_ALIAS, v6notv9 }, /* rd %wim,r */ { "mov", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RS1_G0|SIMM13(~0), "t,d", F_ALIAS, v6notv9 }, /* rd %tbr,r */ +{ "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RS1_G0|ASI(~0), "2,m", F_ALIAS, v8 }, /* wr %g0,rs2,%asrX */ +{ "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RS1_G0, "i,m", F_ALIAS, v8 }, /* wr %g0,i,%asrX */ { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI_RS2(~0), "1,m", F_ALIAS, v8 }, /* wr rs1,%g0,%asrX */ -{ "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "i,m", F_ALIAS, v8 }, /* wr %g0,i,%asrX */ { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|SIMM13(~0), "1,m", F_ALIAS, v8 }, /* wr rs1,0,%asrX */ +{ "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|RS1_G0|ASI(~0), "2,y", F_ALIAS, v6 }, /* wr %g0,rs2,%y */ +{ "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0|RS1_G0, "i,y", F_ALIAS, v6 }, /* wr %g0,i,%y */ { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|ASI_RS2(~0), "1,y", F_ALIAS, v6 }, /* wr rs1,%g0,%y */ -{ "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0, "i,y", F_ALIAS, v6 }, /* wr %g0,i,%y */ { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0|SIMM13(~0), "1,y", F_ALIAS, v6 }, /* wr rs1,0,%y */ +{ "mov", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|RS1_G0|ASI(~0), "2,p", F_ALIAS, v6notv9 }, /* wr %g0,rs2,%psr */ +{ "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0|RS1_G0, "i,p", F_ALIAS, v6notv9 }, /* wr %g0,i,%psr */ { "mov", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|ASI_RS2(~0), "1,p", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%psr */ -{ "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0, "i,p", F_ALIAS, v6notv9 }, /* wr %g0,i,%psr */ { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0|SIMM13(~0), "1,p", F_ALIAS, v6notv9 }, /* wr rs1,0,%psr */ +{ "mov", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|RS1_G0|ASI(~0), "2,w", F_ALIAS, v6notv9 }, /* wr %g0,rs2,%wim */ +{ "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0|RS1_G0, "i,w", F_ALIAS, v6notv9 }, /* wr %g0,i,%wim */ { "mov", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|ASI_RS2(~0), "1,w", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%wim */ -{ "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0, "i,w", F_ALIAS, v6notv9 }, /* wr %g0,i,%wim */ { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0|SIMM13(~0), "1,w", F_ALIAS, v6notv9 }, /* wr rs1,0,%wim */ +{ "mov", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|RS1_G0|ASI(~0), "2,t", F_ALIAS, v6notv9 }, /* wr %g0,rs2,%tbr */ +{ "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0|RS1_G0, "i,t", F_ALIAS, v6notv9 }, /* wr %g0,i,%tbr */ { "mov", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI_RS2(~0), "1,t", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%tbr */ -{ "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0, "i,t", F_ALIAS, v6notv9 }, /* wr %g0,i,%tbr */ { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0|SIMM13(~0), "1,t", F_ALIAS, v6notv9 }, /* wr rs1,0,%tbr */ { "mov", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RS1_G0|ASI(~0), "2,d", 0, v6 }, /* or %g0,rs2,d */ @@ -1010,30 +1036,30 @@ const struct sparc_opcode sparc_opcodes[] = { { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "1,i,d", 0, v9 }, { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "i,1,d", 0, v9 }, -{ "smul", F3(2, 0x0b, 0), F3(~2, ~0x0b, ~0)|ASI(~0), "1,2,d", 0, v8 }, -{ "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "1,i,d", 0, v8 }, -{ "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "i,1,d", 0, v8 }, -{ "smulcc", F3(2, 0x1b, 0), F3(~2, ~0x1b, ~0)|ASI(~0), "1,2,d", 0, v8 }, -{ "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "1,i,d", 0, v8 }, -{ "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "i,1,d", 0, v8 }, -{ "umul", F3(2, 0x0a, 0), F3(~2, ~0x0a, ~0)|ASI(~0), "1,2,d", 0, v8 }, -{ "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "1,i,d", 0, v8 }, -{ "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "i,1,d", 0, v8 }, -{ "umulcc", F3(2, 0x1a, 0), F3(~2, ~0x1a, ~0)|ASI(~0), "1,2,d", 0, v8 }, -{ "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "1,i,d", 0, v8 }, -{ "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "i,1,d", 0, v8 }, -{ "sdiv", F3(2, 0x0f, 0), F3(~2, ~0x0f, ~0)|ASI(~0), "1,2,d", 0, v8 }, -{ "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "1,i,d", 0, v8 }, -{ "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "i,1,d", 0, v8 }, -{ "sdivcc", F3(2, 0x1f, 0), F3(~2, ~0x1f, ~0)|ASI(~0), "1,2,d", 0, v8 }, -{ "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "1,i,d", 0, v8 }, -{ "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "i,1,d", 0, v8 }, -{ "udiv", F3(2, 0x0e, 0), F3(~2, ~0x0e, ~0)|ASI(~0), "1,2,d", 0, v8 }, -{ "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "1,i,d", 0, v8 }, -{ "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "i,1,d", 0, v8 }, -{ "udivcc", F3(2, 0x1e, 0), F3(~2, ~0x1e, ~0)|ASI(~0), "1,2,d", 0, v8 }, -{ "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "1,i,d", 0, v8 }, -{ "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "i,1,d", 0, v8 }, +{ "smul", F3(2, 0x0b, 0), F3(~2, ~0x0b, ~0)|ASI(~0), "1,2,d", F_MUL32, v8 }, +{ "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "1,i,d", F_MUL32, v8 }, +{ "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "i,1,d", F_MUL32, v8 }, +{ "smulcc", F3(2, 0x1b, 0), F3(~2, ~0x1b, ~0)|ASI(~0), "1,2,d", F_MUL32, v8 }, +{ "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "1,i,d", F_MUL32, v8 }, +{ "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "i,1,d", F_MUL32, v8 }, +{ "umul", F3(2, 0x0a, 0), F3(~2, ~0x0a, ~0)|ASI(~0), "1,2,d", F_MUL32, v8 }, +{ "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "1,i,d", F_MUL32, v8 }, +{ "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "i,1,d", F_MUL32, v8 }, +{ "umulcc", F3(2, 0x1a, 0), F3(~2, ~0x1a, ~0)|ASI(~0), "1,2,d", F_MUL32, v8 }, +{ "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "1,i,d", F_MUL32, v8 }, +{ "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "i,1,d", F_MUL32, v8 }, +{ "sdiv", F3(2, 0x0f, 0), F3(~2, ~0x0f, ~0)|ASI(~0), "1,2,d", F_DIV32, v8 }, +{ "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "1,i,d", F_DIV32, v8 }, +{ "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "i,1,d", F_DIV32, v8 }, +{ "sdivcc", F3(2, 0x1f, 0), F3(~2, ~0x1f, ~0)|ASI(~0), "1,2,d", F_DIV32, v8 }, +{ "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "1,i,d", F_DIV32, v8 }, +{ "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "i,1,d", F_DIV32, v8 }, +{ "udiv", F3(2, 0x0e, 0), F3(~2, ~0x0e, ~0)|ASI(~0), "1,2,d", F_DIV32, v8 }, +{ "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "1,i,d", F_DIV32, v8 }, +{ "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "i,1,d", F_DIV32, v8 }, +{ "udivcc", F3(2, 0x1e, 0), F3(~2, ~0x1e, ~0)|ASI(~0), "1,2,d", F_DIV32, v8 }, +{ "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "1,i,d", F_DIV32, v8 }, +{ "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "i,1,d", F_DIV32, v8 }, { "mulx", F3(2, 0x09, 0), F3(~2, ~0x09, ~0)|ASI(~0), "1,2,d", 0, v9 }, { "mulx", F3(2, 0x09, 1), F3(~2, ~0x09, ~1), "1,i,d", 0, v9 }, @@ -1058,6 +1084,7 @@ const struct sparc_opcode sparc_opcodes[] = { { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|SIMM13(~0), "1", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+0,%o7 */ { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|SIMM13(~0), "1,#", F_JSR|F_DELAYED, v6 }, +{ "chkpt", F2(0, 1)|CONDA|ANNUL|(1<<20), F2(~0, ~1)|((~CONDA)&COND(~0)), "G", F_TRANS, v9b }, /* Conditional instructions. @@ -1096,6 +1123,7 @@ const struct sparc_opcode sparc_opcodes[] = { { opcode, (mask), IMMED|(lose)|RS2_G0, "z,1", (flags)|F_ALIAS, v9 }, /* rs1 + %g0 */ \ { opcode, (mask)|IMMED, (lose)|RS1_G0, "i", (flags), v6 }, /* %g0 + imm */ \ { opcode, (mask)|IMMED, (lose), "1+i", (flags), v6 }, /* rs1 + imm */ \ + { opcode, (mask)|IMMED, (lose), "i+1", (flags), v6 }, /* imm + rs1 */ \ { opcode, (mask), IMMED|(lose), "1+2", (flags), v6 }, /* rs1 + rs2 */ \ { opcode, (mask), IMMED|(lose)|RS2_G0, "1", (flags), v6 } /* rs1 + %g0 */ @@ -1525,7 +1553,7 @@ CONDFC ("fbule", "cb013", 0xe, F_CONDBR), { "fdmulq", F3F(2, 0x34, 0x06e), F3F(~2, ~0x34, ~0x06e), "v,B,J", F_FLOAT, v8 }, { "fdmulx", F3F(2, 0x34, 0x06e), F3F(~2, ~0x34, ~0x06e), "v,B,J", F_FLOAT|F_ALIAS, v8 }, -{ "fsmuld", F3F(2, 0x34, 0x069), F3F(~2, ~0x34, ~0x069), "e,f,H", F_FLOAT, v8 }, +{ "fsmuld", F3F(2, 0x34, 0x069), F3F(~2, ~0x34, ~0x069), "e,f,H", F_FLOAT|F_FSMULD, v8 }, { "fsqrtd", F3F(2, 0x34, 0x02a), F3F(~2, ~0x34, ~0x02a)|RS1_G0, "B,H", F_FLOAT, v7 }, { "fsqrtq", F3F(2, 0x34, 0x02b), F3F(~2, ~0x34, ~0x02b)|RS1_G0, "R,J", F_FLOAT, v8 }, @@ -1710,104 +1738,181 @@ SLCBCC("cbnefr", 15), { "casxl", F3(3, 0x3e, 0)|ASI(0x88), F3(~3, ~0x3e, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS, v9 }, /* casxa [rs1]ASI_P_L,rs2,rd */ /* Ultrasparc extensions */ -{ "shutdown", F3F(2, 0x36, 0x080), F3F(~2, ~0x36, ~0x080)|RD_G0|RS1_G0|RS2_G0, "", 0, v9a }, +{ "shutdown", F3F(2, 0x36, 0x080), F3F(~2, ~0x36, ~0x080)|RD_G0|RS1_G0|RS2_G0, "", F_VIS, v9a }, /* FIXME: Do we want to mark these as F_FLOAT, or something similar? */ -{ "fpadd16", F3F(2, 0x36, 0x050), F3F(~2, ~0x36, ~0x050), "v,B,H", 0, v9a }, -{ "fpadd16s", F3F(2, 0x36, 0x051), F3F(~2, ~0x36, ~0x051), "e,f,g", 0, v9a }, -{ "fpadd32", F3F(2, 0x36, 0x052), F3F(~2, ~0x36, ~0x052), "v,B,H", 0, v9a }, -{ "fpadd32s", F3F(2, 0x36, 0x053), F3F(~2, ~0x36, ~0x053), "e,f,g", 0, v9a }, -{ "fpsub16", F3F(2, 0x36, 0x054), F3F(~2, ~0x36, ~0x054), "v,B,H", 0, v9a }, -{ "fpsub16s", F3F(2, 0x36, 0x055), F3F(~2, ~0x36, ~0x055), "e,f,g", 0, v9a }, -{ "fpsub32", F3F(2, 0x36, 0x056), F3F(~2, ~0x36, ~0x056), "v,B,H", 0, v9a }, -{ "fpsub32s", F3F(2, 0x36, 0x057), F3F(~2, ~0x36, ~0x057), "e,f,g", 0, v9a }, - -{ "fpack32", F3F(2, 0x36, 0x03a), F3F(~2, ~0x36, ~0x03a), "v,B,H", 0, v9a }, -{ "fpack16", F3F(2, 0x36, 0x03b), F3F(~2, ~0x36, ~0x03b)|RS1_G0, "B,g", 0, v9a }, -{ "fpackfix", F3F(2, 0x36, 0x03d), F3F(~2, ~0x36, ~0x03d)|RS1_G0, "B,g", 0, v9a }, -{ "fexpand", F3F(2, 0x36, 0x04d), F3F(~2, ~0x36, ~0x04d)|RS1_G0, "f,H", 0, v9a }, -{ "fpmerge", F3F(2, 0x36, 0x04b), F3F(~2, ~0x36, ~0x04b), "e,f,H", 0, v9a }, +{ "fpadd16", F3F(2, 0x36, 0x050), F3F(~2, ~0x36, ~0x050), "v,B,H", F_VIS, v9a }, +{ "fpadd16s", F3F(2, 0x36, 0x051), F3F(~2, ~0x36, ~0x051), "e,f,g", F_VIS, v9a }, +{ "fpadd32", F3F(2, 0x36, 0x052), F3F(~2, ~0x36, ~0x052), "v,B,H", F_VIS, v9a }, +{ "fpadd32s", F3F(2, 0x36, 0x053), F3F(~2, ~0x36, ~0x053), "e,f,g", F_VIS, v9a }, +{ "fpsub16", F3F(2, 0x36, 0x054), F3F(~2, ~0x36, ~0x054), "v,B,H", F_VIS, v9a }, +{ "fpsub16s", F3F(2, 0x36, 0x055), F3F(~2, ~0x36, ~0x055), "e,f,g", F_VIS, v9a }, +{ "fpsub32", F3F(2, 0x36, 0x056), F3F(~2, ~0x36, ~0x056), "v,B,H", F_VIS, v9a }, +{ "fpsub32s", F3F(2, 0x36, 0x057), F3F(~2, ~0x36, ~0x057), "e,f,g", F_VIS, v9a }, + +{ "fpack32", F3F(2, 0x36, 0x03a), F3F(~2, ~0x36, ~0x03a), "v,B,H", F_VIS, v9a }, +{ "fpack16", F3F(2, 0x36, 0x03b), F3F(~2, ~0x36, ~0x03b)|RS1_G0, "B,g", F_VIS, v9a }, +{ "fpackfix", F3F(2, 0x36, 0x03d), F3F(~2, ~0x36, ~0x03d)|RS1_G0, "B,g", F_VIS, v9a }, +{ "fexpand", F3F(2, 0x36, 0x04d), F3F(~2, ~0x36, ~0x04d)|RS1_G0, "f,H", F_VIS, v9a }, +{ "fpmerge", F3F(2, 0x36, 0x04b), F3F(~2, ~0x36, ~0x04b), "e,f,H", F_VIS, v9a }, /* Note that the mixing of 32/64 bit regs is intentional. */ -{ "fmul8x16", F3F(2, 0x36, 0x031), F3F(~2, ~0x36, ~0x031), "e,B,H", 0, v9a }, -{ "fmul8x16au", F3F(2, 0x36, 0x033), F3F(~2, ~0x36, ~0x033), "e,f,H", 0, v9a }, -{ "fmul8x16al", F3F(2, 0x36, 0x035), F3F(~2, ~0x36, ~0x035), "e,f,H", 0, v9a }, -{ "fmul8sux16", F3F(2, 0x36, 0x036), F3F(~2, ~0x36, ~0x036), "v,B,H", 0, v9a }, -{ "fmul8ulx16", F3F(2, 0x36, 0x037), F3F(~2, ~0x36, ~0x037), "v,B,H", 0, v9a }, -{ "fmuld8sux16", F3F(2, 0x36, 0x038), F3F(~2, ~0x36, ~0x038), "e,f,H", 0, v9a }, -{ "fmuld8ulx16", F3F(2, 0x36, 0x039), F3F(~2, ~0x36, ~0x039), "e,f,H", 0, v9a }, - -{ "alignaddr", F3F(2, 0x36, 0x018), F3F(~2, ~0x36, ~0x018), "1,2,d", 0, v9a }, -{ "alignaddrl", F3F(2, 0x36, 0x01a), F3F(~2, ~0x36, ~0x01a), "1,2,d", 0, v9a }, -{ "faligndata", F3F(2, 0x36, 0x048), F3F(~2, ~0x36, ~0x048), "v,B,H", 0, v9a }, - -{ "fzero", F3F(2, 0x36, 0x060), F3F(~2, ~0x36, ~0x060), "H", 0, v9a }, -{ "fzeros", F3F(2, 0x36, 0x061), F3F(~2, ~0x36, ~0x061), "g", 0, v9a }, -{ "fone", F3F(2, 0x36, 0x07e), F3F(~2, ~0x36, ~0x07e), "H", 0, v9a }, -{ "fones", F3F(2, 0x36, 0x07f), F3F(~2, ~0x36, ~0x07f), "g", 0, v9a }, -{ "fsrc1", F3F(2, 0x36, 0x074), F3F(~2, ~0x36, ~0x074), "v,H", 0, v9a }, -{ "fsrc1s", F3F(2, 0x36, 0x075), F3F(~2, ~0x36, ~0x075), "e,g", 0, v9a }, -{ "fsrc2", F3F(2, 0x36, 0x078), F3F(~2, ~0x36, ~0x078), "B,H", 0, v9a }, -{ "fsrc2s", F3F(2, 0x36, 0x079), F3F(~2, ~0x36, ~0x079), "f,g", 0, v9a }, -{ "fnot1", F3F(2, 0x36, 0x06a), F3F(~2, ~0x36, ~0x06a), "v,H", 0, v9a }, -{ "fnot1s", F3F(2, 0x36, 0x06b), F3F(~2, ~0x36, ~0x06b), "e,g", 0, v9a }, -{ "fnot2", F3F(2, 0x36, 0x066), F3F(~2, ~0x36, ~0x066), "B,H", 0, v9a }, -{ "fnot2s", F3F(2, 0x36, 0x067), F3F(~2, ~0x36, ~0x067), "f,g", 0, v9a }, -{ "for", F3F(2, 0x36, 0x07c), F3F(~2, ~0x36, ~0x07c), "v,B,H", 0, v9a }, -{ "fors", F3F(2, 0x36, 0x07d), F3F(~2, ~0x36, ~0x07d), "e,f,g", 0, v9a }, -{ "fnor", F3F(2, 0x36, 0x062), F3F(~2, ~0x36, ~0x062), "v,B,H", 0, v9a }, -{ "fnors", F3F(2, 0x36, 0x063), F3F(~2, ~0x36, ~0x063), "e,f,g", 0, v9a }, -{ "fand", F3F(2, 0x36, 0x070), F3F(~2, ~0x36, ~0x070), "v,B,H", 0, v9a }, -{ "fands", F3F(2, 0x36, 0x071), F3F(~2, ~0x36, ~0x071), "e,f,g", 0, v9a }, -{ "fnand", F3F(2, 0x36, 0x06e), F3F(~2, ~0x36, ~0x06e), "v,B,H", 0, v9a }, -{ "fnands", F3F(2, 0x36, 0x06f), F3F(~2, ~0x36, ~0x06f), "e,f,g", 0, v9a }, -{ "fxor", F3F(2, 0x36, 0x06c), F3F(~2, ~0x36, ~0x06c), "v,B,H", 0, v9a }, -{ "fxors", F3F(2, 0x36, 0x06d), F3F(~2, ~0x36, ~0x06d), "e,f,g", 0, v9a }, -{ "fxnor", F3F(2, 0x36, 0x072), F3F(~2, ~0x36, ~0x072), "v,B,H", 0, v9a }, -{ "fxnors", F3F(2, 0x36, 0x073), F3F(~2, ~0x36, ~0x073), "e,f,g", 0, v9a }, -{ "fornot1", F3F(2, 0x36, 0x07a), F3F(~2, ~0x36, ~0x07a), "v,B,H", 0, v9a }, -{ "fornot1s", F3F(2, 0x36, 0x07b), F3F(~2, ~0x36, ~0x07b), "e,f,g", 0, v9a }, -{ "fornot2", F3F(2, 0x36, 0x076), F3F(~2, ~0x36, ~0x076), "v,B,H", 0, v9a }, -{ "fornot2s", F3F(2, 0x36, 0x077), F3F(~2, ~0x36, ~0x077), "e,f,g", 0, v9a }, -{ "fandnot1", F3F(2, 0x36, 0x068), F3F(~2, ~0x36, ~0x068), "v,B,H", 0, v9a }, -{ "fandnot1s", F3F(2, 0x36, 0x069), F3F(~2, ~0x36, ~0x069), "e,f,g", 0, v9a }, -{ "fandnot2", F3F(2, 0x36, 0x064), F3F(~2, ~0x36, ~0x064), "v,B,H", 0, v9a }, -{ "fandnot2s", F3F(2, 0x36, 0x065), F3F(~2, ~0x36, ~0x065), "e,f,g", 0, v9a }, - -{ "fcmpgt16", F3F(2, 0x36, 0x028), F3F(~2, ~0x36, ~0x028), "v,B,d", 0, v9a }, -{ "fcmpgt32", F3F(2, 0x36, 0x02c), F3F(~2, ~0x36, ~0x02c), "v,B,d", 0, v9a }, -{ "fcmple16", F3F(2, 0x36, 0x020), F3F(~2, ~0x36, ~0x020), "v,B,d", 0, v9a }, -{ "fcmple32", F3F(2, 0x36, 0x024), F3F(~2, ~0x36, ~0x024), "v,B,d", 0, v9a }, -{ "fcmpne16", F3F(2, 0x36, 0x022), F3F(~2, ~0x36, ~0x022), "v,B,d", 0, v9a }, -{ "fcmpne32", F3F(2, 0x36, 0x026), F3F(~2, ~0x36, ~0x026), "v,B,d", 0, v9a }, -{ "fcmpeq16", F3F(2, 0x36, 0x02a), F3F(~2, ~0x36, ~0x02a), "v,B,d", 0, v9a }, -{ "fcmpeq32", F3F(2, 0x36, 0x02e), F3F(~2, ~0x36, ~0x02e), "v,B,d", 0, v9a }, - -{ "edge8", F3F(2, 0x36, 0x000), F3F(~2, ~0x36, ~0x000), "1,2,d", 0, v9a }, -{ "edge8l", F3F(2, 0x36, 0x002), F3F(~2, ~0x36, ~0x002), "1,2,d", 0, v9a }, -{ "edge16", F3F(2, 0x36, 0x004), F3F(~2, ~0x36, ~0x004), "1,2,d", 0, v9a }, -{ "edge16l", F3F(2, 0x36, 0x006), F3F(~2, ~0x36, ~0x006), "1,2,d", 0, v9a }, -{ "edge32", F3F(2, 0x36, 0x008), F3F(~2, ~0x36, ~0x008), "1,2,d", 0, v9a }, -{ "edge32l", F3F(2, 0x36, 0x00a), F3F(~2, ~0x36, ~0x00a), "1,2,d", 0, v9a }, - -{ "pdist", F3F(2, 0x36, 0x03e), F3F(~2, ~0x36, ~0x03e), "v,B,H", 0, v9a }, - -{ "array8", F3F(2, 0x36, 0x010), F3F(~2, ~0x36, ~0x010), "1,2,d", 0, v9a }, -{ "array16", F3F(2, 0x36, 0x012), F3F(~2, ~0x36, ~0x012), "1,2,d", 0, v9a }, -{ "array32", F3F(2, 0x36, 0x014), F3F(~2, ~0x36, ~0x014), "1,2,d", 0, v9a }, +{ "fmul8x16", F3F(2, 0x36, 0x031), F3F(~2, ~0x36, ~0x031), "e,B,H", F_VIS, v9a }, +{ "fmul8x16au", F3F(2, 0x36, 0x033), F3F(~2, ~0x36, ~0x033), "e,f,H", F_VIS, v9a }, +{ "fmul8x16al", F3F(2, 0x36, 0x035), F3F(~2, ~0x36, ~0x035), "e,f,H", F_VIS, v9a }, +{ "fmul8sux16", F3F(2, 0x36, 0x036), F3F(~2, ~0x36, ~0x036), "v,B,H", F_VIS, v9a }, +{ "fmul8ulx16", F3F(2, 0x36, 0x037), F3F(~2, ~0x36, ~0x037), "v,B,H", F_VIS, v9a }, +{ "fmuld8sux16", F3F(2, 0x36, 0x038), F3F(~2, ~0x36, ~0x038), "e,f,H", F_VIS, v9a }, +{ "fmuld8ulx16", F3F(2, 0x36, 0x039), F3F(~2, ~0x36, ~0x039), "e,f,H", F_VIS, v9a }, + +{ "alignaddr", F3F(2, 0x36, 0x018), F3F(~2, ~0x36, ~0x018), "1,2,d", F_VIS, v9a }, +{ "alignaddrl", F3F(2, 0x36, 0x01a), F3F(~2, ~0x36, ~0x01a), "1,2,d", F_VIS, v9a }, +{ "faligndata", F3F(2, 0x36, 0x048), F3F(~2, ~0x36, ~0x048), "v,B,H", F_VIS, v9a }, + +{ "fzero", F3F(2, 0x36, 0x060), F3F(~2, ~0x36, ~0x060), "H", F_VIS, v9a }, +{ "fzeros", F3F(2, 0x36, 0x061), F3F(~2, ~0x36, ~0x061), "g", F_VIS, v9a }, +{ "fone", F3F(2, 0x36, 0x07e), F3F(~2, ~0x36, ~0x07e), "H", F_VIS, v9a }, +{ "fones", F3F(2, 0x36, 0x07f), F3F(~2, ~0x36, ~0x07f), "g", F_VIS, v9a }, +{ "fsrc1", F3F(2, 0x36, 0x074), F3F(~2, ~0x36, ~0x074), "v,H", F_VIS, v9a }, +{ "fsrc1s", F3F(2, 0x36, 0x075), F3F(~2, ~0x36, ~0x075), "e,g", F_VIS, v9a }, +{ "fsrc2", F3F(2, 0x36, 0x078), F3F(~2, ~0x36, ~0x078), "B,H", F_VIS, v9a }, +{ "fsrc2s", F3F(2, 0x36, 0x079), F3F(~2, ~0x36, ~0x079), "f,g", F_VIS, v9a }, +{ "fnot1", F3F(2, 0x36, 0x06a), F3F(~2, ~0x36, ~0x06a), "v,H", F_VIS, v9a }, +{ "fnot1s", F3F(2, 0x36, 0x06b), F3F(~2, ~0x36, ~0x06b), "e,g", F_VIS, v9a }, +{ "fnot2", F3F(2, 0x36, 0x066), F3F(~2, ~0x36, ~0x066), "B,H", F_VIS, v9a }, +{ "fnot2s", F3F(2, 0x36, 0x067), F3F(~2, ~0x36, ~0x067), "f,g", F_VIS, v9a }, +{ "for", F3F(2, 0x36, 0x07c), F3F(~2, ~0x36, ~0x07c), "v,B,H", F_VIS, v9a }, +{ "fors", F3F(2, 0x36, 0x07d), F3F(~2, ~0x36, ~0x07d), "e,f,g", F_VIS, v9a }, +{ "fnor", F3F(2, 0x36, 0x062), F3F(~2, ~0x36, ~0x062), "v,B,H", F_VIS, v9a }, +{ "fnors", F3F(2, 0x36, 0x063), F3F(~2, ~0x36, ~0x063), "e,f,g", F_VIS, v9a }, +{ "fand", F3F(2, 0x36, 0x070), F3F(~2, ~0x36, ~0x070), "v,B,H", F_VIS, v9a }, +{ "fands", F3F(2, 0x36, 0x071), F3F(~2, ~0x36, ~0x071), "e,f,g", F_VIS, v9a }, +{ "fnand", F3F(2, 0x36, 0x06e), F3F(~2, ~0x36, ~0x06e), "v,B,H", F_VIS, v9a }, +{ "fnands", F3F(2, 0x36, 0x06f), F3F(~2, ~0x36, ~0x06f), "e,f,g", F_VIS, v9a }, +{ "fxor", F3F(2, 0x36, 0x06c), F3F(~2, ~0x36, ~0x06c), "v,B,H", F_VIS, v9a }, +{ "fxors", F3F(2, 0x36, 0x06d), F3F(~2, ~0x36, ~0x06d), "e,f,g", F_VIS, v9a }, +{ "fxnor", F3F(2, 0x36, 0x072), F3F(~2, ~0x36, ~0x072), "v,B,H", F_VIS, v9a }, +{ "fxnors", F3F(2, 0x36, 0x073), F3F(~2, ~0x36, ~0x073), "e,f,g", F_VIS, v9a }, +{ "fornot1", F3F(2, 0x36, 0x07a), F3F(~2, ~0x36, ~0x07a), "v,B,H", F_VIS, v9a }, +{ "fornot1s", F3F(2, 0x36, 0x07b), F3F(~2, ~0x36, ~0x07b), "e,f,g", F_VIS, v9a }, +{ "fornot2", F3F(2, 0x36, 0x076), F3F(~2, ~0x36, ~0x076), "v,B,H", F_VIS, v9a }, +{ "fornot2s", F3F(2, 0x36, 0x077), F3F(~2, ~0x36, ~0x077), "e,f,g", F_VIS, v9a }, +{ "fandnot1", F3F(2, 0x36, 0x068), F3F(~2, ~0x36, ~0x068), "v,B,H", F_VIS, v9a }, +{ "fandnot1s", F3F(2, 0x36, 0x069), F3F(~2, ~0x36, ~0x069), "e,f,g", F_VIS, v9a }, +{ "fandnot2", F3F(2, 0x36, 0x064), F3F(~2, ~0x36, ~0x064), "v,B,H", F_VIS, v9a }, +{ "fandnot2s", F3F(2, 0x36, 0x065), F3F(~2, ~0x36, ~0x065), "e,f,g", F_VIS, v9a }, + +{ "fcmpgt16", F3F(2, 0x36, 0x028), F3F(~2, ~0x36, ~0x028), "v,B,d", F_VIS, v9a }, +{ "fcmpgt32", F3F(2, 0x36, 0x02c), F3F(~2, ~0x36, ~0x02c), "v,B,d", F_VIS, v9a }, +{ "fcmple16", F3F(2, 0x36, 0x020), F3F(~2, ~0x36, ~0x020), "v,B,d", F_VIS, v9a }, +{ "fcmple32", F3F(2, 0x36, 0x024), F3F(~2, ~0x36, ~0x024), "v,B,d", F_VIS, v9a }, +{ "fcmpne16", F3F(2, 0x36, 0x022), F3F(~2, ~0x36, ~0x022), "v,B,d", F_VIS, v9a }, +{ "fcmpne32", F3F(2, 0x36, 0x026), F3F(~2, ~0x36, ~0x026), "v,B,d", F_VIS, v9a }, +{ "fcmpeq16", F3F(2, 0x36, 0x02a), F3F(~2, ~0x36, ~0x02a), "v,B,d", F_VIS, v9a }, +{ "fcmpeq32", F3F(2, 0x36, 0x02e), F3F(~2, ~0x36, ~0x02e), "v,B,d", F_VIS, v9a }, + +{ "edge8", F3F(2, 0x36, 0x000), F3F(~2, ~0x36, ~0x000), "1,2,d", F_VIS, v9a }, +{ "edge8l", F3F(2, 0x36, 0x002), F3F(~2, ~0x36, ~0x002), "1,2,d", F_VIS, v9a }, +{ "edge16", F3F(2, 0x36, 0x004), F3F(~2, ~0x36, ~0x004), "1,2,d", F_VIS, v9a }, +{ "edge16l", F3F(2, 0x36, 0x006), F3F(~2, ~0x36, ~0x006), "1,2,d", F_VIS, v9a }, +{ "edge32", F3F(2, 0x36, 0x008), F3F(~2, ~0x36, ~0x008), "1,2,d", F_VIS, v9a }, +{ "edge32l", F3F(2, 0x36, 0x00a), F3F(~2, ~0x36, ~0x00a), "1,2,d", F_VIS, v9a }, + +{ "pdist", F3F(2, 0x36, 0x03e), F3F(~2, ~0x36, ~0x03e), "v,B,H", F_VIS, v9a }, + +{ "array8", F3F(2, 0x36, 0x010), F3F(~2, ~0x36, ~0x010), "1,2,d", F_VIS, v9a }, +{ "array16", F3F(2, 0x36, 0x012), F3F(~2, ~0x36, ~0x012), "1,2,d", F_VIS, v9a }, +{ "array32", F3F(2, 0x36, 0x014), F3F(~2, ~0x36, ~0x014), "1,2,d", F_VIS, v9a }, /* Cheetah instructions */ -{ "edge8n", F3F(2, 0x36, 0x001), F3F(~2, ~0x36, ~0x001), "1,2,d", 0, v9b }, -{ "edge8ln", F3F(2, 0x36, 0x003), F3F(~2, ~0x36, ~0x003), "1,2,d", 0, v9b }, -{ "edge16n", F3F(2, 0x36, 0x005), F3F(~2, ~0x36, ~0x005), "1,2,d", 0, v9b }, -{ "edge16ln", F3F(2, 0x36, 0x007), F3F(~2, ~0x36, ~0x007), "1,2,d", 0, v9b }, -{ "edge32n", F3F(2, 0x36, 0x009), F3F(~2, ~0x36, ~0x009), "1,2,d", 0, v9b }, -{ "edge32ln", F3F(2, 0x36, 0x00b), F3F(~2, ~0x36, ~0x00b), "1,2,d", 0, v9b }, - -{ "bmask", F3F(2, 0x36, 0x019), F3F(~2, ~0x36, ~0x019), "1,2,d", 0, v9b }, -{ "bshuffle", F3F(2, 0x36, 0x04c), F3F(~2, ~0x36, ~0x04c), "v,B,H", 0, v9b }, - -{ "siam", F3F(2, 0x36, 0x081), F3F(~2, ~0x36, ~0x081)|RD_G0|RS1_G0|RS2(~7), "3", 0, v9b }, +{ "edge8n", F3F(2, 0x36, 0x001), F3F(~2, ~0x36, ~0x001), "1,2,d", F_VIS2, v9b }, +{ "edge8ln", F3F(2, 0x36, 0x003), F3F(~2, ~0x36, ~0x003), "1,2,d", F_VIS2, v9b }, +{ "edge16n", F3F(2, 0x36, 0x005), F3F(~2, ~0x36, ~0x005), "1,2,d", F_VIS2, v9b }, +{ "edge16ln", F3F(2, 0x36, 0x007), F3F(~2, ~0x36, ~0x007), "1,2,d", F_VIS2, v9b }, +{ "edge32n", F3F(2, 0x36, 0x009), F3F(~2, ~0x36, ~0x009), "1,2,d", F_VIS2, v9b }, +{ "edge32ln", F3F(2, 0x36, 0x00b), F3F(~2, ~0x36, ~0x00b), "1,2,d", F_VIS2, v9b }, + +{ "bmask", F3F(2, 0x36, 0x019), F3F(~2, ~0x36, ~0x019), "1,2,d", F_VIS2, v9b }, +{ "bshuffle", F3F(2, 0x36, 0x04c), F3F(~2, ~0x36, ~0x04c), "v,B,H", F_VIS2, v9b }, + +{ "siam", F3F(2, 0x36, 0x081), F3F(~2, ~0x36, ~0x081)|RD_G0|RS1_G0|RS2(~7), "3", F_VIS2, v9b }, + +{ "commit", F3(2, 0x3e, 0)|RD(30), F3(~2, ~0x3e, ~0)|RD(~30)|RS1_G0|SIMM13(~0), "", F_TRANS, v9b }, +{ "fnadds", F3F(2, 0x34, 0x051), F3F(~2, ~0x34, ~0x051), "e,f,g", F_FLOAT|F_HPC, v9b }, +{ "fnaddd", F3F(2, 0x34, 0x052), F3F(~2, ~0x34, ~0x052), "v,B,H", F_FLOAT|F_HPC, v9b }, +{ "fnmuls", F3F(2, 0x34, 0x059), F3F(~2, ~0x34, ~0x059), "e,f,g", F_FLOAT|F_HPC, v9b }, +{ "fnmuld", F3F(2, 0x34, 0x05a), F3F(~2, ~0x34, ~0x05a), "v,B,H", F_FLOAT|F_HPC, v9b }, +{ "fhadds", F3F(2, 0x34, 0x061), F3F(~2, ~0x34, ~0x061), "e,f,g", F_FLOAT|F_HPC, v9b }, +{ "fhaddd", F3F(2, 0x34, 0x062), F3F(~2, ~0x34, ~0x062), "v,B,H", F_FLOAT|F_HPC, v9b }, +{ "fhsubs", F3F(2, 0x34, 0x065), F3F(~2, ~0x34, ~0x065), "e,f,g", F_FLOAT|F_HPC, v9b }, +{ "fhsubd", F3F(2, 0x34, 0x066), F3F(~2, ~0x34, ~0x066), "v,B,H", F_FLOAT|F_HPC, v9b }, +{ "fnhadds", F3F(2, 0x34, 0x071), F3F(~2, ~0x34, ~0x071), "e,f,g", F_FLOAT|F_HPC, v9b }, +{ "fnhaddd", F3F(2, 0x34, 0x072), F3F(~2, ~0x34, ~0x072), "v,B,H", F_FLOAT|F_HPC, v9b }, +{ "fnsmuld", F3F(2, 0x34, 0x079), F3F(~2, ~0x34, ~0x079), "e,f,H", F_FLOAT|F_HPC, v9b }, +{ "fmadds", F3(2, 0x37, 0)|OPF_LOW4(1), F3(~2, ~0x37, 0)|OPF_LOW4(~1), "e,f,4,g", F_FLOAT|F_FMAF, v9b }, +{ "fmaddd", F3(2, 0x37, 0)|OPF_LOW4(2), F3(~2, ~0x37, 0)|OPF_LOW4(~2), "v,B,5,H", F_FLOAT|F_FMAF, v9b }, +{ "fmsubs", F3(2, 0x37, 0)|OPF_LOW4(5), F3(~2, ~0x37, 0)|OPF_LOW4(~5), "e,f,4,g", F_FLOAT|F_FMAF, v9b }, +{ "fmsubd", F3(2, 0x37, 0)|OPF_LOW4(6), F3(~2, ~0x37, 0)|OPF_LOW4(~6), "v,B,5,H", F_FLOAT|F_FMAF, v9b }, +{ "fnmsubs", F3(2, 0x37, 0)|OPF_LOW4(9), F3(~2, ~0x37, 0)|OPF_LOW4(~9), "e,f,4,g", F_FLOAT|F_FMAF, v9b }, +{ "fnmsubd", F3(2, 0x37, 0)|OPF_LOW4(10), F3(~2, ~0x37, 0)|OPF_LOW4(~10), "v,B,5,H", F_FLOAT|F_FMAF, v9b }, +{ "fnmadds", F3(2, 0x37, 0)|OPF_LOW4(13), F3(~2, ~0x37, 0)|OPF_LOW4(~13), "e,f,4,g", F_FLOAT|F_FMAF, v9b }, +{ "fnmaddd", F3(2, 0x37, 0)|OPF_LOW4(14), F3(~2, ~0x37, 0)|OPF_LOW4(~14), "v,B,5,H", F_FLOAT|F_FMAF, v9b }, +{ "fumadds", F3(2, 0x3f, 0)|OPF_LOW4(1), F3(~2, ~0x3f, 0)|OPF_LOW4(~1), "e,f,4,g", F_FLOAT|F_FJFMAU, v9b }, +{ "fumaddd", F3(2, 0x3f, 0)|OPF_LOW4(2), F3(~2, ~0x3f, 0)|OPF_LOW4(~2), "v,B,5,H", F_FLOAT|F_FJFMAU, v9b }, +{ "fumsubs", F3(2, 0x3f, 0)|OPF_LOW4(5), F3(~2, ~0x3f, 0)|OPF_LOW4(~5), "e,f,4,g", F_FLOAT|F_FJFMAU, v9b }, +{ "fumsubd", F3(2, 0x3f, 0)|OPF_LOW4(6), F3(~2, ~0x3f, 0)|OPF_LOW4(~6), "v,B,5,H", F_FLOAT|F_FJFMAU, v9b }, +{ "fnumsubs", F3(2, 0x3f, 0)|OPF_LOW4(9), F3(~2, ~0x3f, 0)|OPF_LOW4(~9), "e,f,4,g", F_FLOAT|F_FJFMAU, v9b }, +{ "fnumsubd", F3(2, 0x3f, 0)|OPF_LOW4(10), F3(~2, ~0x3f, 0)|OPF_LOW4(~10), "v,B,5,H", F_FLOAT|F_FJFMAU, v9b }, +{ "fnumadds", F3(2, 0x3f, 0)|OPF_LOW4(13), F3(~2, ~0x3f, 0)|OPF_LOW4(~13), "e,f,4,g", F_FLOAT|F_FJFMAU, v9b }, +{ "fnumaddd", F3(2, 0x3f, 0)|OPF_LOW4(14), F3(~2, ~0x3f, 0)|OPF_LOW4(~14), "v,B,5,H", F_FLOAT|F_FJFMAU, v9b }, +{ "addxc", F3F(2, 0x36, 0x011), F3F(~2, ~0x36, ~0x011), "1,2,d", F_VIS3, v9b }, +{ "addxccc", F3F(2, 0x36, 0x013), F3F(~2, ~0x36, ~0x013), "1,2,d", F_VIS3, v9b }, +{ "random", F3F(2, 0x36, 0x015), F3F(~2, ~0x36, ~0x015), "d", F_RANDOM, v9b }, +{ "umulxhi", F3F(2, 0x36, 0x016), F3F(~2, ~0x36, ~0x016), "1,2,d", F_VIS3, v9b }, +{ "lzd", F3F(2, 0x36, 0x017), F3F(~2, ~0x36, ~0x017), "2,d", F_VIS3, v9b }, +{ "cmask8", F3F(2, 0x36, 0x01b), F3F(~2, ~0x36, ~0x01b), "2", F_VIS3, v9b }, +{ "cmask16", F3F(2, 0x36, 0x01d), F3F(~2, ~0x36, ~0x01d), "2", F_VIS3, v9b }, +{ "cmask32", F3F(2, 0x36, 0x01f), F3F(~2, ~0x36, ~0x01f), "2", F_VIS3, v9b }, +{ "fsll16", F3F(2, 0x36, 0x021), F3F(~2, ~0x36, ~0x021), "v,B,H", F_VIS3, v9b }, +{ "fsrl16", F3F(2, 0x36, 0x023), F3F(~2, ~0x36, ~0x023), "v,B,H", F_VIS3, v9b }, +{ "fsll32", F3F(2, 0x36, 0x025), F3F(~2, ~0x36, ~0x025), "v,B,H", F_VIS3, v9b }, +{ "fsrl32", F3F(2, 0x36, 0x027), F3F(~2, ~0x36, ~0x027), "v,B,H", F_VIS3, v9b }, +{ "fslas16", F3F(2, 0x36, 0x029), F3F(~2, ~0x36, ~0x029), "v,B,H", F_VIS3, v9b }, +{ "fsra16", F3F(2, 0x36, 0x02b), F3F(~2, ~0x36, ~0x02b), "v,B,H", F_VIS3, v9b }, +{ "fslas32", F3F(2, 0x36, 0x02d), F3F(~2, ~0x36, ~0x02d), "v,B,H", F_VIS3, v9b }, +{ "fsra32", F3F(2, 0x36, 0x02f), F3F(~2, ~0x36, ~0x02f), "v,B,H", F_VIS3, v9b }, +{ "pdistn", F3F(2, 0x36, 0x03f), F3F(~2, ~0x36, ~0x03f), "v,B,d", F_VIS3, v9b }, +{ "fmean16", F3F(2, 0x36, 0x040), F3F(~2, ~0x36, ~0x040), "v,B,H", F_VIS3, v9b }, +{ "fpadd64", F3F(2, 0x36, 0x042), F3F(~2, ~0x36, ~0x042), "v,B,H", F_VIS3, v9b }, +{ "fchksm16", F3F(2, 0x36, 0x044), F3F(~2, ~0x36, ~0x044), "v,B,H", F_VIS3, v9b }, +{ "fpsub64", F3F(2, 0x36, 0x046), F3F(~2, ~0x36, ~0x046), "v,B,H", F_VIS3, v9b }, +{ "fpadds16", F3F(2, 0x36, 0x058), F3F(~2, ~0x36, ~0x058), "v,B,H", F_VIS3, v9b }, +{ "fpadds16s", F3F(2, 0x36, 0x059), F3F(~2, ~0x36, ~0x059), "e,f,g", F_VIS3, v9b }, +{ "fpadds32", F3F(2, 0x36, 0x05a), F3F(~2, ~0x36, ~0x05a), "v,B,H", F_VIS3, v9b }, +{ "fpadds32s", F3F(2, 0x36, 0x05b), F3F(~2, ~0x36, ~0x05b), "e,f,g", F_VIS3, v9b }, +{ "fpsubs16", F3F(2, 0x36, 0x05c), F3F(~2, ~0x36, ~0x05c), "v,B,H", F_VIS3, v9b }, +{ "fpsubs16s", F3F(2, 0x36, 0x05d), F3F(~2, ~0x36, ~0x05d), "e,f,g", F_VIS3, v9b }, +{ "fpsubs32", F3F(2, 0x36, 0x05e), F3F(~2, ~0x36, ~0x05e), "v,B,H", F_VIS3, v9b }, +{ "fpsubs32s", F3F(2, 0x36, 0x05f), F3F(~2, ~0x36, ~0x05f), "e,f,g", F_VIS3, v9b }, +{ "movdtox", F3F(2, 0x36, 0x110), F3F(~2, ~0x36, ~0x110), "B,d", F_FLOAT|F_VIS3, v9b }, +{ "movstouw", F3F(2, 0x36, 0x111), F3F(~2, ~0x36, ~0x111), "f,d", F_FLOAT|F_VIS3, v9b }, +{ "movstosw", F3F(2, 0x36, 0x113), F3F(~2, ~0x36, ~0x113), "f,d", F_FLOAT|F_VIS3, v9b }, +{ "movxtod", F3F(2, 0x36, 0x118), F3F(~2, ~0x36, ~0x118), "2,H", F_FLOAT|F_VIS3, v9b }, +{ "movwtos", F3F(2, 0x36, 0x119), F3F(~2, ~0x36, ~0x119), "2,g", F_FLOAT|F_VIS3, v9b }, +{ "xmulx", F3F(2, 0x36, 0x115), F3F(~2, ~0x36, ~0x115), "1,2,d", F_VIS3, v9b }, +{ "xmulxhi", F3F(2, 0x36, 0x116), F3F(~2, ~0x36, ~0x116), "1,2,d", F_VIS3, v9b }, +{ "fucmple8", F3F(2, 0x36, 0x120), F3F(~2, ~0x36, ~0x120), "v,B,d", F_VIS3, v9b }, +{ "fucmpne8", F3F(2, 0x36, 0x122), F3F(~2, ~0x36, ~0x122), "v,B,d", F_VIS3, v9b }, +{ "fucmpgt8", F3F(2, 0x36, 0x128), F3F(~2, ~0x36, ~0x128), "v,B,d", F_VIS3, v9b }, +{ "fucmpeq8", F3F(2, 0x36, 0x12a), F3F(~2, ~0x36, ~0x12a), "v,B,d", F_VIS3, v9b }, +{ "flcmps", CMPFCC(0)|F3F(2, 0x36, 0x151), CMPFCC(~0)|F3F(~2, ~0x36, ~0x151), "6,e,f", F_FLOAT|F_HPC, v9b }, +{ "flcmps", CMPFCC(1)|F3F(2, 0x36, 0x151), CMPFCC(~1)|F3F(~2, ~0x36, ~0x151), "7,e,f", F_FLOAT|F_HPC, v9b }, +{ "flcmps", CMPFCC(2)|F3F(2, 0x36, 0x151), CMPFCC(~2)|F3F(~2, ~0x36, ~0x151), "8,e,f", F_FLOAT|F_HPC, v9b }, +{ "flcmps", CMPFCC(3)|F3F(2, 0x36, 0x151), CMPFCC(~3)|F3F(~2, ~0x36, ~0x151), "9,e,f", F_FLOAT|F_HPC, v9b }, +{ "flcmpd", CMPFCC(0)|F3F(2, 0x36, 0x152), CMPFCC(~0)|F3F(~2, ~0x36, ~0x152), "6,v,B", F_FLOAT|F_HPC, v9b }, +{ "flcmpd", CMPFCC(1)|F3F(2, 0x36, 0x152), CMPFCC(~1)|F3F(~2, ~0x36, ~0x152), "7,v,B", F_FLOAT|F_HPC, v9b }, +{ "flcmpd", CMPFCC(2)|F3F(2, 0x36, 0x152), CMPFCC(~2)|F3F(~2, ~0x36, ~0x152), "8,v,B", F_FLOAT|F_HPC, v9b }, +{ "flcmpd", CMPFCC(3)|F3F(2, 0x36, 0x152), CMPFCC(~3)|F3F(~2, ~0x36, ~0x152), "9,v,B", F_FLOAT|F_HPC, v9b }, /* More v9 specific insns, these need to come last so they do not clash with v9a instructions such as "edge8" which looks like impdep1. */ diff --git a/opcodes/tilegx-dis.c b/opcodes/tilegx-dis.c new file mode 100644 index 0000000..3754756 --- /dev/null +++ b/opcodes/tilegx-dis.c @@ -0,0 +1,135 @@ +/* tilegx-dis.c. Disassembly routines for the TILE-Gx architecture. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of the GNU opcodes library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include +#include +#include "bfd.h" +#include "elf/tilegx.h" +#include "elf-bfd.h" +#include "sysdep.h" +#include "dis-asm.h" +#include "opcode/tilegx.h" + + +int +print_insn_tilegx (bfd_vma memaddr, disassemble_info *info) +{ + struct tilegx_decoded_instruction + decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]; + bfd_byte opbuf[TILEGX_BUNDLE_SIZE_IN_BYTES]; + int status, i, num_instructions, num_printed; + tilegx_mnemonic padding_mnemonic; + + status = (*info->read_memory_func) (memaddr, opbuf, + TILEGX_BUNDLE_SIZE_IN_BYTES, info); + if (status != 0) + { + (*info->memory_error_func) (status, memaddr, info); + return -1; + } + + info->bytes_per_line = TILEGX_BUNDLE_SIZE_IN_BYTES; + info->bytes_per_chunk = TILEGX_BUNDLE_SIZE_IN_BYTES; + info->octets_per_byte = 1; + info->display_endian = BFD_ENDIAN_LITTLE; + + /* Parse the instructions in the bundle. */ + num_instructions = + parse_insn_tilegx (bfd_getl64 (opbuf), memaddr, decoded); + + /* Print the instructions in the bundle. */ + info->fprintf_func (info->stream, "{ "); + num_printed = 0; + + /* Determine which nop opcode is used for padding and should be skipped. */ + padding_mnemonic = TILEGX_OPC_FNOP; + for (i = 0; i < num_instructions; i++) + { + if (!decoded[i].opcode->can_bundle) + { + /* Instructions that cannot be bundled are padded out with nops, + rather than fnops. Displaying them is always clutter. */ + padding_mnemonic = TILEGX_OPC_NOP; + break; + } + } + + for (i = 0; i < num_instructions; i++) + { + const struct tilegx_opcode *opcode = decoded[i].opcode; + const char *name; + int j; + + /* Do not print out fnops, unless everything is an fnop, in + which case we will print out just the last one. */ + if (opcode->mnemonic == padding_mnemonic + && (num_printed > 0 || i + 1 < num_instructions)) + continue; + + if (num_printed > 0) + info->fprintf_func (info->stream, " ; "); + ++num_printed; + + name = opcode->name; + if (name == NULL) + name = ""; + info->fprintf_func (info->stream, "%s", name); + + for (j = 0; j < opcode->num_operands; j++) + { + bfd_vma num; + const struct tilegx_operand *op; + const char *spr_name; + + if (j > 0) + info->fprintf_func (info->stream, ","); + info->fprintf_func (info->stream, " "); + + num = decoded[i].operand_values[j]; + + op = decoded[i].operands[j]; + switch (op->type) + { + case TILEGX_OP_TYPE_REGISTER: + info->fprintf_func (info->stream, "%s", + tilegx_register_names[(int) num]); + break; + case TILEGX_OP_TYPE_SPR: + spr_name = get_tilegx_spr_name (num); + if (spr_name != NULL) + info->fprintf_func (info->stream, "%s", spr_name); + else + info->fprintf_func (info->stream, "%d", (int)num); + break; + case TILEGX_OP_TYPE_IMMEDIATE: + info->fprintf_func (info->stream, "%d", (int)num); + break; + case TILEGX_OP_TYPE_ADDRESS: + info->print_address_func (num, info); + break; + default: + abort (); + } + } + } + info->fprintf_func (info->stream, " }"); + + return TILEGX_BUNDLE_SIZE_IN_BYTES; +} diff --git a/opcodes/tilegx-opc.c b/opcodes/tilegx-opc.c new file mode 100644 index 0000000..4f97019 --- /dev/null +++ b/opcodes/tilegx-opc.c @@ -0,0 +1,8055 @@ +/* TILE-Gx opcode information. + + Copyright 2011 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +/* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else. */ +#define BFD_RELOC(x) BFD_RELOC_##x + +#include "bfd.h" + +/* Special registers. */ +#define TREG_LR 55 +#define TREG_SN 56 +#define TREG_ZERO 63 + +#if defined(__KERNEL__) || defined(_LIBC) +/* FIXME: Rename this. */ +#include +#define DISASM_ONLY +#else +#include "opcode/tilegx.h" +#endif + +#ifdef __KERNEL__ +#include +#else +#include +#endif + +const struct tilegx_opcode tilegx_opcodes[334] = +{ + { "bpt", TILEGX_OPC_BPT, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffffffff80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286a44ae00000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "info", TILEGX_OPC_INFO, 0xf, 1, TREG_ZERO, 1, + { { 0 }, { 1 }, { 2 }, { 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00fffULL, + 0xfff807ff80000000ULL, + 0x0000000078000fffULL, + 0x3c0007ff80000000ULL, + 0ULL + }, + { + 0x0000000040300fffULL, + 0x181807ff80000000ULL, + 0x0000000010000fffULL, + 0x0c0007ff80000000ULL, + -1ULL + } +#endif + }, + { "infol", TILEGX_OPC_INFOL, 0x3, 1, TREG_ZERO, 1, + { { 4 }, { 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc000000070000fffULL, + 0xf80007ff80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070000fffULL, + 0x380007ff80000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "move", TILEGX_OPC_MOVE, 0xf, 2, TREG_ZERO, 1, + { { 6, 7 }, { 8, 9 }, { 10, 11 }, { 12, 13 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0xfffff80000000000ULL, + 0x00000000780ff000ULL, + 0x3c07f80000000000ULL, + 0ULL + }, + { + 0x000000005107f000ULL, + 0x283bf80000000000ULL, + 0x00000000500bf000ULL, + 0x2c05f80000000000ULL, + -1ULL + } +#endif + }, + { "movei", TILEGX_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1, + { { 6, 0 }, { 8, 1 }, { 10, 2 }, { 12, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00fc0ULL, + 0xfff807e000000000ULL, + 0x0000000078000fc0ULL, + 0x3c0007e000000000ULL, + 0ULL + }, + { + 0x0000000040100fc0ULL, + 0x180807e000000000ULL, + 0x0000000000000fc0ULL, + 0x040007e000000000ULL, + -1ULL + } +#endif + }, + { "moveli", TILEGX_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1, + { { 6, 4 }, { 8, 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc000000070000fc0ULL, + 0xf80007e000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000010000fc0ULL, + 0x000007e000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "prefetch", TILEGX_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff81f80000000ULL, + 0ULL, + 0ULL, + 0xc3f8000004000000ULL + }, + { + -1ULL, + 0x286a801f80000000ULL, + -1ULL, + -1ULL, + 0x41f8000004000000ULL + } +#endif + }, + { "prefetch_add_l1", TILEGX_OPC_PREFETCH_ADD_L1, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8001f80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1840001f80000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "prefetch_add_l1_fault", TILEGX_OPC_PREFETCH_ADD_L1_FAULT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8001f80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1838001f80000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "prefetch_add_l2", TILEGX_OPC_PREFETCH_ADD_L2, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8001f80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1850001f80000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "prefetch_add_l2_fault", TILEGX_OPC_PREFETCH_ADD_L2_FAULT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8001f80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1848001f80000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "prefetch_add_l3", TILEGX_OPC_PREFETCH_ADD_L3, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8001f80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1860001f80000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "prefetch_add_l3_fault", TILEGX_OPC_PREFETCH_ADD_L3_FAULT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8001f80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1858001f80000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "prefetch_l1", TILEGX_OPC_PREFETCH_L1, 0x12, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff81f80000000ULL, + 0ULL, + 0ULL, + 0xc3f8000004000000ULL + }, + { + -1ULL, + 0x286a801f80000000ULL, + -1ULL, + -1ULL, + 0x41f8000004000000ULL + } +#endif + }, + { "prefetch_l1_fault", TILEGX_OPC_PREFETCH_L1_FAULT, 0x12, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff81f80000000ULL, + 0ULL, + 0ULL, + 0xc3f8000004000000ULL + }, + { + -1ULL, + 0x286a781f80000000ULL, + -1ULL, + -1ULL, + 0x41f8000000000000ULL + } +#endif + }, + { "prefetch_l2", TILEGX_OPC_PREFETCH_L2, 0x12, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff81f80000000ULL, + 0ULL, + 0ULL, + 0xc3f8000004000000ULL + }, + { + -1ULL, + 0x286a901f80000000ULL, + -1ULL, + -1ULL, + 0x43f8000004000000ULL + } +#endif + }, + { "prefetch_l2_fault", TILEGX_OPC_PREFETCH_L2_FAULT, 0x12, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff81f80000000ULL, + 0ULL, + 0ULL, + 0xc3f8000004000000ULL + }, + { + -1ULL, + 0x286a881f80000000ULL, + -1ULL, + -1ULL, + 0x43f8000000000000ULL + } +#endif + }, + { "prefetch_l3", TILEGX_OPC_PREFETCH_L3, 0x12, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff81f80000000ULL, + 0ULL, + 0ULL, + 0xc3f8000004000000ULL + }, + { + -1ULL, + 0x286aa01f80000000ULL, + -1ULL, + -1ULL, + 0x83f8000000000000ULL + } +#endif + }, + { "prefetch_l3_fault", TILEGX_OPC_PREFETCH_L3_FAULT, 0x12, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff81f80000000ULL, + 0ULL, + 0ULL, + 0xc3f8000004000000ULL + }, + { + -1ULL, + 0x286a981f80000000ULL, + -1ULL, + -1ULL, + 0x81f8000004000000ULL + } +#endif + }, + { "raise", TILEGX_OPC_RAISE, 0x2, 0, TREG_ZERO, 1, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffffffff80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286a44ae80000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "add", TILEGX_OPC_ADD, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x00000000500c0000ULL, + 0x2806000000000000ULL, + 0x0000000028040000ULL, + 0x1802000000000000ULL, + -1ULL + } +#endif + }, + { "addi", TILEGX_OPC_ADDI, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0x0000000078000000ULL, + 0x3c00000000000000ULL, + 0ULL + }, + { + 0x0000000040100000ULL, + 0x1808000000000000ULL, + 0ULL, + 0x0400000000000000ULL, + -1ULL + } +#endif + }, + { "addli", TILEGX_OPC_ADDLI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 4 }, { 8, 9, 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc000000070000000ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000010000000ULL, + 0ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addx", TILEGX_OPC_ADDX, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000050080000ULL, + 0x2804000000000000ULL, + 0x0000000028000000ULL, + 0x1800000000000000ULL, + -1ULL + } +#endif + }, + { "addxi", TILEGX_OPC_ADDXI, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0x0000000078000000ULL, + 0x3c00000000000000ULL, + 0ULL + }, + { + 0x0000000040200000ULL, + 0x1810000000000000ULL, + 0x0000000008000000ULL, + 0x0800000000000000ULL, + -1ULL + } +#endif + }, + { "addxli", TILEGX_OPC_ADDXLI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 4 }, { 8, 9, 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc000000070000000ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000020000000ULL, + 0x0800000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addxsc", TILEGX_OPC_ADDXSC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050040000ULL, + 0x2802000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "and", TILEGX_OPC_AND, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000050100000ULL, + 0x2808000000000000ULL, + 0x0000000050000000ULL, + 0x2c00000000000000ULL, + -1ULL + } +#endif + }, + { "andi", TILEGX_OPC_ANDI, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0x0000000078000000ULL, + 0x3c00000000000000ULL, + 0ULL + }, + { + 0x0000000040300000ULL, + 0x1818000000000000ULL, + 0x0000000010000000ULL, + 0x0c00000000000000ULL, + -1ULL + } +#endif + }, + { "beqz", TILEGX_OPC_BEQZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1440000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "beqzt", TILEGX_OPC_BEQZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1400000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bfexts", TILEGX_OPC_BFEXTS, 0x1, 4, TREG_ZERO, 1, + { { 6, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007f000000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000034000000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bfextu", TILEGX_OPC_BFEXTU, 0x1, 4, TREG_ZERO, 1, + { { 6, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007f000000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000035000000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bfins", TILEGX_OPC_BFINS, 0x1, 4, TREG_ZERO, 1, + { { 23, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007f000000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000036000000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgez", TILEGX_OPC_BGEZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x14c0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgezt", TILEGX_OPC_BGEZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1480000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgtz", TILEGX_OPC_BGTZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1540000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgtzt", TILEGX_OPC_BGTZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1500000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blbc", TILEGX_OPC_BLBC, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x15c0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blbct", TILEGX_OPC_BLBCT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1580000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blbs", TILEGX_OPC_BLBS, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1640000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blbst", TILEGX_OPC_BLBST, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1600000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blez", TILEGX_OPC_BLEZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x16c0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blezt", TILEGX_OPC_BLEZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1680000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bltz", TILEGX_OPC_BLTZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1740000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bltzt", TILEGX_OPC_BLTZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1700000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bnez", TILEGX_OPC_BNEZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x17c0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bnezt", TILEGX_OPC_BNEZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xffc0000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1780000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "clz", TILEGX_OPC_CLZ, 0x5, 2, TREG_ZERO, 1, + { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0ULL, + 0x00000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051481000ULL, + -1ULL, + 0x00000000300c1000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmoveqz", TILEGX_OPC_CMOVEQZ, 0x5, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050140000ULL, + -1ULL, + 0x0000000048000000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmovnez", TILEGX_OPC_CMOVNEZ, 0x5, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050180000ULL, + -1ULL, + 0x0000000048040000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmpeq", TILEGX_OPC_CMPEQ, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x00000000501c0000ULL, + 0x280a000000000000ULL, + 0x0000000040000000ULL, + 0x2404000000000000ULL, + -1ULL + } +#endif + }, + { "cmpeqi", TILEGX_OPC_CMPEQI, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0x0000000078000000ULL, + 0x3c00000000000000ULL, + 0ULL + }, + { + 0x0000000040400000ULL, + 0x1820000000000000ULL, + 0x0000000018000000ULL, + 0x1000000000000000ULL, + -1ULL + } +#endif + }, + { "cmpexch", TILEGX_OPC_CMPEXCH, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x280e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmpexch4", TILEGX_OPC_CMPEXCH4, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x280c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmples", TILEGX_OPC_CMPLES, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000050200000ULL, + 0x2810000000000000ULL, + 0x0000000038000000ULL, + 0x2000000000000000ULL, + -1ULL + } +#endif + }, + { "cmpleu", TILEGX_OPC_CMPLEU, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000050240000ULL, + 0x2812000000000000ULL, + 0x0000000038040000ULL, + 0x2002000000000000ULL, + -1ULL + } +#endif + }, + { "cmplts", TILEGX_OPC_CMPLTS, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000050280000ULL, + 0x2814000000000000ULL, + 0x0000000038080000ULL, + 0x2004000000000000ULL, + -1ULL + } +#endif + }, + { "cmpltsi", TILEGX_OPC_CMPLTSI, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0x0000000078000000ULL, + 0x3c00000000000000ULL, + 0ULL + }, + { + 0x0000000040500000ULL, + 0x1828000000000000ULL, + 0x0000000020000000ULL, + 0x1400000000000000ULL, + -1ULL + } +#endif + }, + { "cmpltu", TILEGX_OPC_CMPLTU, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x00000000502c0000ULL, + 0x2816000000000000ULL, + 0x00000000380c0000ULL, + 0x2006000000000000ULL, + -1ULL + } +#endif + }, + { "cmpltui", TILEGX_OPC_CMPLTUI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040600000ULL, + 0x1830000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmpne", TILEGX_OPC_CMPNE, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000050300000ULL, + 0x2818000000000000ULL, + 0x0000000040040000ULL, + 0x2406000000000000ULL, + -1ULL + } +#endif + }, + { "cmul", TILEGX_OPC_CMUL, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000504c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmula", TILEGX_OPC_CMULA, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050380000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmulaf", TILEGX_OPC_CMULAF, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050340000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmulf", TILEGX_OPC_CMULF, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050400000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmulfr", TILEGX_OPC_CMULFR, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000503c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmulh", TILEGX_OPC_CMULH, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050480000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "cmulhr", TILEGX_OPC_CMULHR, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050440000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "crc32_32", TILEGX_OPC_CRC32_32, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050500000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "crc32_8", TILEGX_OPC_CRC32_8, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050540000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ctz", TILEGX_OPC_CTZ, 0x5, 2, TREG_ZERO, 1, + { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0ULL, + 0x00000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051482000ULL, + -1ULL, + 0x00000000300c2000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "dblalign", TILEGX_OPC_DBLALIGN, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050640000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "dblalign2", TILEGX_OPC_DBLALIGN2, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050580000ULL, + 0x281a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "dblalign4", TILEGX_OPC_DBLALIGN4, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000505c0000ULL, + 0x281c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "dblalign6", TILEGX_OPC_DBLALIGN6, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050600000ULL, + 0x281e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "drain", TILEGX_OPC_DRAIN, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286a080000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "dtlbpr", TILEGX_OPC_DTLBPR, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286a100000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "exch", TILEGX_OPC_EXCH, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2822000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "exch4", TILEGX_OPC_EXCH4, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2820000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fdouble_add_flags", TILEGX_OPC_FDOUBLE_ADD_FLAGS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000506c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fdouble_addsub", TILEGX_OPC_FDOUBLE_ADDSUB, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050680000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fdouble_mul_flags", TILEGX_OPC_FDOUBLE_MUL_FLAGS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050700000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fdouble_pack1", TILEGX_OPC_FDOUBLE_PACK1, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050740000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fdouble_pack2", TILEGX_OPC_FDOUBLE_PACK2, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050780000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fdouble_sub_flags", TILEGX_OPC_FDOUBLE_SUB_FLAGS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000507c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fdouble_unpack_max", TILEGX_OPC_FDOUBLE_UNPACK_MAX, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050800000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fdouble_unpack_min", TILEGX_OPC_FDOUBLE_UNPACK_MIN, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050840000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fetchadd", TILEGX_OPC_FETCHADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x282a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fetchadd4", TILEGX_OPC_FETCHADD4, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2824000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fetchaddgez", TILEGX_OPC_FETCHADDGEZ, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2828000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fetchaddgez4", TILEGX_OPC_FETCHADDGEZ4, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2826000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fetchand", TILEGX_OPC_FETCHAND, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x282e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fetchand4", TILEGX_OPC_FETCHAND4, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x282c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fetchor", TILEGX_OPC_FETCHOR, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2832000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fetchor4", TILEGX_OPC_FETCHOR4, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2830000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "finv", TILEGX_OPC_FINV, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286a180000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "flush", TILEGX_OPC_FLUSH, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286a280000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "flushwb", TILEGX_OPC_FLUSHWB, 0x2, 0, TREG_ZERO, 1, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286a200000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fnop", TILEGX_OPC_FNOP, 0xf, 0, TREG_ZERO, 1, + { { }, { }, { }, { }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0xfffff80000000000ULL, + 0x00000000780ff000ULL, + 0x3c07f80000000000ULL, + 0ULL + }, + { + 0x0000000051483000ULL, + 0x286a300000000000ULL, + 0x00000000300c3000ULL, + 0x1c06400000000000ULL, + -1ULL + } +#endif + }, + { "fsingle_add1", TILEGX_OPC_FSINGLE_ADD1, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050880000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fsingle_addsub2", TILEGX_OPC_FSINGLE_ADDSUB2, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000508c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fsingle_mul1", TILEGX_OPC_FSINGLE_MUL1, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050900000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fsingle_mul2", TILEGX_OPC_FSINGLE_MUL2, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050940000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fsingle_pack1", TILEGX_OPC_FSINGLE_PACK1, 0x5, 2, TREG_ZERO, 1, + { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0ULL, + 0x00000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051484000ULL, + -1ULL, + 0x00000000300c4000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fsingle_pack2", TILEGX_OPC_FSINGLE_PACK2, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050980000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fsingle_sub1", TILEGX_OPC_FSINGLE_SUB1, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000509c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "icoh", TILEGX_OPC_ICOH, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286a380000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ill", TILEGX_OPC_ILL, 0xa, 0, TREG_ZERO, 1, + { { 0, }, { }, { 0, }, { }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0x3c07f80000000000ULL, + 0ULL + }, + { + -1ULL, + 0x286a400000000000ULL, + -1ULL, + 0x1c06480000000000ULL, + -1ULL + } +#endif + }, + { "inv", TILEGX_OPC_INV, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286a480000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "iret", TILEGX_OPC_IRET, 0x2, 0, TREG_ZERO, 1, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286a500000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "j", TILEGX_OPC_J, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 25 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2400000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "jal", TILEGX_OPC_JAL, 0x2, 1, TREG_LR, 1, + { { 0, }, { 25 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2000000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "jalr", TILEGX_OPC_JALR, 0xa, 1, TREG_LR, 1, + { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0x3c07f80000000000ULL, + 0ULL + }, + { + -1ULL, + 0x286a600000000000ULL, + -1ULL, + 0x1c06580000000000ULL, + -1ULL + } +#endif + }, + { "jalrp", TILEGX_OPC_JALRP, 0xa, 1, TREG_LR, 1, + { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0x3c07f80000000000ULL, + 0ULL + }, + { + -1ULL, + 0x286a580000000000ULL, + -1ULL, + 0x1c06500000000000ULL, + -1ULL + } +#endif + }, + { "jr", TILEGX_OPC_JR, 0xa, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0x3c07f80000000000ULL, + 0ULL + }, + { + -1ULL, + 0x286a700000000000ULL, + -1ULL, + 0x1c06680000000000ULL, + -1ULL + } +#endif + }, + { "jrp", TILEGX_OPC_JRP, 0xa, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0x3c07f80000000000ULL, + 0ULL + }, + { + -1ULL, + 0x286a680000000000ULL, + -1ULL, + 0x1c06600000000000ULL, + -1ULL + } +#endif + }, + { "ld", TILEGX_OPC_LD, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0xc200000004000000ULL + }, + { + -1ULL, + 0x286ae80000000000ULL, + -1ULL, + -1ULL, + 0x8200000004000000ULL + } +#endif + }, + { "ld1s", TILEGX_OPC_LD1S, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0xc200000004000000ULL + }, + { + -1ULL, + 0x286a780000000000ULL, + -1ULL, + -1ULL, + 0x4000000000000000ULL + } +#endif + }, + { "ld1s_add", TILEGX_OPC_LD1S_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1838000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ld1u", TILEGX_OPC_LD1U, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0xc200000004000000ULL + }, + { + -1ULL, + 0x286a800000000000ULL, + -1ULL, + -1ULL, + 0x4000000004000000ULL + } +#endif + }, + { "ld1u_add", TILEGX_OPC_LD1U_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1840000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ld2s", TILEGX_OPC_LD2S, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0xc200000004000000ULL + }, + { + -1ULL, + 0x286a880000000000ULL, + -1ULL, + -1ULL, + 0x4200000000000000ULL + } +#endif + }, + { "ld2s_add", TILEGX_OPC_LD2S_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1848000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ld2u", TILEGX_OPC_LD2U, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0xc200000004000000ULL + }, + { + -1ULL, + 0x286a900000000000ULL, + -1ULL, + -1ULL, + 0x4200000004000000ULL + } +#endif + }, + { "ld2u_add", TILEGX_OPC_LD2U_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1850000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ld4s", TILEGX_OPC_LD4S, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0xc200000004000000ULL + }, + { + -1ULL, + 0x286a980000000000ULL, + -1ULL, + -1ULL, + 0x8000000004000000ULL + } +#endif + }, + { "ld4s_add", TILEGX_OPC_LD4S_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1858000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ld4u", TILEGX_OPC_LD4U, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0xc200000004000000ULL + }, + { + -1ULL, + 0x286aa00000000000ULL, + -1ULL, + -1ULL, + 0x8200000000000000ULL + } +#endif + }, + { "ld4u_add", TILEGX_OPC_LD4U_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1860000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ld_add", TILEGX_OPC_LD_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x18a0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldna", TILEGX_OPC_LDNA, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286aa80000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldna_add", TILEGX_OPC_LDNA_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x18a8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt", TILEGX_OPC_LDNT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286ae00000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt1s", TILEGX_OPC_LDNT1S, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286ab00000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt1s_add", TILEGX_OPC_LDNT1S_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1868000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt1u", TILEGX_OPC_LDNT1U, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286ab80000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt1u_add", TILEGX_OPC_LDNT1U_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1870000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt2s", TILEGX_OPC_LDNT2S, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286ac00000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt2s_add", TILEGX_OPC_LDNT2S_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1878000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt2u", TILEGX_OPC_LDNT2U, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286ac80000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt2u_add", TILEGX_OPC_LDNT2U_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1880000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt4s", TILEGX_OPC_LDNT4S, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286ad00000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt4s_add", TILEGX_OPC_LDNT4S_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1888000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt4u", TILEGX_OPC_LDNT4U, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286ad80000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt4u_add", TILEGX_OPC_LDNT4U_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1890000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ldnt_add", TILEGX_OPC_LDNT_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1898000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lnk", TILEGX_OPC_LNK, 0xa, 1, TREG_ZERO, 1, + { { 0, }, { 8 }, { 0, }, { 12 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0x3c07f80000000000ULL, + 0ULL + }, + { + -1ULL, + 0x286af00000000000ULL, + -1ULL, + 0x1c06700000000000ULL, + -1ULL + } +#endif + }, + { "mf", TILEGX_OPC_MF, 0x2, 0, TREG_ZERO, 1, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286af80000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mfspr", TILEGX_OPC_MFSPR, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 8, 27 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x18b0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mm", TILEGX_OPC_MM, 0x1, 4, TREG_ZERO, 1, + { { 23, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007f000000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000037000000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mnz", TILEGX_OPC_MNZ, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000050a00000ULL, + 0x2834000000000000ULL, + 0x0000000048080000ULL, + 0x2804000000000000ULL, + -1ULL + } +#endif + }, + { "mtspr", TILEGX_OPC_MTSPR, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 28, 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x18b8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mul_hs_hs", TILEGX_OPC_MUL_HS_HS, 0x5, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050d40000ULL, + -1ULL, + 0x0000000068000000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mul_hs_hu", TILEGX_OPC_MUL_HS_HU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050d80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mul_hs_ls", TILEGX_OPC_MUL_HS_LS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050dc0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mul_hs_lu", TILEGX_OPC_MUL_HS_LU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050e00000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mul_hu_hu", TILEGX_OPC_MUL_HU_HU, 0x5, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050e40000ULL, + -1ULL, + 0x0000000068040000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mul_hu_ls", TILEGX_OPC_MUL_HU_LS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050e80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mul_hu_lu", TILEGX_OPC_MUL_HU_LU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050ec0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mul_ls_ls", TILEGX_OPC_MUL_LS_LS, 0x5, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050f00000ULL, + -1ULL, + 0x0000000068080000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mul_ls_lu", TILEGX_OPC_MUL_LS_LU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050f40000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mul_lu_lu", TILEGX_OPC_MUL_LU_LU, 0x5, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050f80000ULL, + -1ULL, + 0x00000000680c0000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mula_hs_hs", TILEGX_OPC_MULA_HS_HS, 0x5, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050a80000ULL, + -1ULL, + 0x0000000070000000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mula_hs_hu", TILEGX_OPC_MULA_HS_HU, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050ac0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mula_hs_ls", TILEGX_OPC_MULA_HS_LS, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050b00000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mula_hs_lu", TILEGX_OPC_MULA_HS_LU, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050b40000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mula_hu_hu", TILEGX_OPC_MULA_HU_HU, 0x5, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050b80000ULL, + -1ULL, + 0x0000000070040000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mula_hu_ls", TILEGX_OPC_MULA_HU_LS, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050bc0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mula_hu_lu", TILEGX_OPC_MULA_HU_LU, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050c00000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mula_ls_ls", TILEGX_OPC_MULA_LS_LS, 0x5, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050c40000ULL, + -1ULL, + 0x0000000070080000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mula_ls_lu", TILEGX_OPC_MULA_LS_LU, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050c80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mula_lu_lu", TILEGX_OPC_MULA_LU_LU, 0x5, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050cc0000ULL, + -1ULL, + 0x00000000700c0000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulax", TILEGX_OPC_MULAX, 0x5, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050a40000ULL, + -1ULL, + 0x0000000040080000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulx", TILEGX_OPC_MULX, 0x5, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0x00000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050d00000ULL, + -1ULL, + 0x00000000400c0000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mz", TILEGX_OPC_MZ, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000050fc0000ULL, + 0x2836000000000000ULL, + 0x00000000480c0000ULL, + 0x2806000000000000ULL, + -1ULL + } +#endif + }, + { "nap", TILEGX_OPC_NAP, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286b000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "nop", TILEGX_OPC_NOP, 0xf, 0, TREG_ZERO, 1, + { { }, { }, { }, { }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0xfffff80000000000ULL, + 0x00000000780ff000ULL, + 0x3c07f80000000000ULL, + 0ULL + }, + { + 0x0000000051485000ULL, + 0x286b080000000000ULL, + 0x00000000300c5000ULL, + 0x1c06780000000000ULL, + -1ULL + } +#endif + }, + { "nor", TILEGX_OPC_NOR, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000051000000ULL, + 0x2838000000000000ULL, + 0x0000000050040000ULL, + 0x2c02000000000000ULL, + -1ULL + } +#endif + }, + { "or", TILEGX_OPC_OR, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000051040000ULL, + 0x283a000000000000ULL, + 0x0000000050080000ULL, + 0x2c04000000000000ULL, + -1ULL + } +#endif + }, + { "ori", TILEGX_OPC_ORI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040700000ULL, + 0x18c0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "pcnt", TILEGX_OPC_PCNT, 0x5, 2, TREG_ZERO, 1, + { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0ULL, + 0x00000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051486000ULL, + -1ULL, + 0x00000000300c6000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "revbits", TILEGX_OPC_REVBITS, 0x5, 2, TREG_ZERO, 1, + { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0ULL, + 0x00000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051487000ULL, + -1ULL, + 0x00000000300c7000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "revbytes", TILEGX_OPC_REVBYTES, 0x5, 2, TREG_ZERO, 1, + { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0ULL, + 0x00000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051488000ULL, + -1ULL, + 0x00000000300c8000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "rotl", TILEGX_OPC_ROTL, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000051080000ULL, + 0x283c000000000000ULL, + 0x0000000058000000ULL, + 0x3000000000000000ULL, + -1ULL + } +#endif + }, + { "rotli", TILEGX_OPC_ROTLI, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000060040000ULL, + 0x3002000000000000ULL, + 0x0000000078000000ULL, + 0x3800000000000000ULL, + -1ULL + } +#endif + }, + { "shl", TILEGX_OPC_SHL, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000051280000ULL, + 0x284c000000000000ULL, + 0x0000000058040000ULL, + 0x3002000000000000ULL, + -1ULL + } +#endif + }, + { "shl16insli", TILEGX_OPC_SHL16INSLI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 4 }, { 8, 9, 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc000000070000000ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070000000ULL, + 0x3800000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shl1add", TILEGX_OPC_SHL1ADD, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000051100000ULL, + 0x2840000000000000ULL, + 0x0000000030000000ULL, + 0x1c00000000000000ULL, + -1ULL + } +#endif + }, + { "shl1addx", TILEGX_OPC_SHL1ADDX, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x00000000510c0000ULL, + 0x283e000000000000ULL, + 0x0000000060040000ULL, + 0x3402000000000000ULL, + -1ULL + } +#endif + }, + { "shl2add", TILEGX_OPC_SHL2ADD, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000051180000ULL, + 0x2844000000000000ULL, + 0x0000000030040000ULL, + 0x1c02000000000000ULL, + -1ULL + } +#endif + }, + { "shl2addx", TILEGX_OPC_SHL2ADDX, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000051140000ULL, + 0x2842000000000000ULL, + 0x0000000060080000ULL, + 0x3404000000000000ULL, + -1ULL + } +#endif + }, + { "shl3add", TILEGX_OPC_SHL3ADD, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000051200000ULL, + 0x2848000000000000ULL, + 0x0000000030080000ULL, + 0x1c04000000000000ULL, + -1ULL + } +#endif + }, + { "shl3addx", TILEGX_OPC_SHL3ADDX, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x00000000511c0000ULL, + 0x2846000000000000ULL, + 0x00000000600c0000ULL, + 0x3406000000000000ULL, + -1ULL + } +#endif + }, + { "shli", TILEGX_OPC_SHLI, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000060080000ULL, + 0x3004000000000000ULL, + 0x0000000078040000ULL, + 0x3802000000000000ULL, + -1ULL + } +#endif + }, + { "shlx", TILEGX_OPC_SHLX, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051240000ULL, + 0x284a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shlxi", TILEGX_OPC_SHLXI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000600c0000ULL, + 0x3006000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shrs", TILEGX_OPC_SHRS, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x00000000512c0000ULL, + 0x284e000000000000ULL, + 0x0000000058080000ULL, + 0x3004000000000000ULL, + -1ULL + } +#endif + }, + { "shrsi", TILEGX_OPC_SHRSI, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000060100000ULL, + 0x3008000000000000ULL, + 0x0000000078080000ULL, + 0x3804000000000000ULL, + -1ULL + } +#endif + }, + { "shru", TILEGX_OPC_SHRU, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000051340000ULL, + 0x2852000000000000ULL, + 0x00000000580c0000ULL, + 0x3006000000000000ULL, + -1ULL + } +#endif + }, + { "shrui", TILEGX_OPC_SHRUI, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000060140000ULL, + 0x300a000000000000ULL, + 0x00000000780c0000ULL, + 0x3806000000000000ULL, + -1ULL + } +#endif + }, + { "shrux", TILEGX_OPC_SHRUX, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051300000ULL, + 0x2850000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shruxi", TILEGX_OPC_SHRUXI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000060180000ULL, + 0x300c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shufflebytes", TILEGX_OPC_SHUFFLEBYTES, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051380000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "st", TILEGX_OPC_ST, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0xc200000004000000ULL + }, + { + -1ULL, + 0x2862000000000000ULL, + -1ULL, + -1ULL, + 0xc200000004000000ULL + } +#endif + }, + { "st1", TILEGX_OPC_ST1, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0xc200000004000000ULL + }, + { + -1ULL, + 0x2854000000000000ULL, + -1ULL, + -1ULL, + 0xc000000000000000ULL + } +#endif + }, + { "st1_add", TILEGX_OPC_ST1_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x18c8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "st2", TILEGX_OPC_ST2, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0xc200000004000000ULL + }, + { + -1ULL, + 0x2856000000000000ULL, + -1ULL, + -1ULL, + 0xc000000004000000ULL + } +#endif + }, + { "st2_add", TILEGX_OPC_ST2_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x18d0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "st4", TILEGX_OPC_ST4, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0xc200000004000000ULL + }, + { + -1ULL, + 0x2858000000000000ULL, + -1ULL, + -1ULL, + 0xc200000000000000ULL + } +#endif + }, + { "st4_add", TILEGX_OPC_ST4_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x18d8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "st_add", TILEGX_OPC_ST_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x1900000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "stnt", TILEGX_OPC_STNT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2860000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "stnt1", TILEGX_OPC_STNT1, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x285a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "stnt1_add", TILEGX_OPC_STNT1_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x18e0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "stnt2", TILEGX_OPC_STNT2, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x285c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "stnt2_add", TILEGX_OPC_STNT2_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x18e8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "stnt4", TILEGX_OPC_STNT4, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x285e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "stnt4_add", TILEGX_OPC_STNT4_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x18f0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "stnt_add", TILEGX_OPC_STNT_ADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x18f8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sub", TILEGX_OPC_SUB, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000051440000ULL, + 0x2868000000000000ULL, + 0x00000000280c0000ULL, + 0x1806000000000000ULL, + -1ULL + } +#endif + }, + { "subx", TILEGX_OPC_SUBX, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000051400000ULL, + 0x2866000000000000ULL, + 0x0000000028080000ULL, + 0x1804000000000000ULL, + -1ULL + } +#endif + }, + { "subxsc", TILEGX_OPC_SUBXSC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000513c0000ULL, + 0x2864000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "swint0", TILEGX_OPC_SWINT0, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286b100000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "swint1", TILEGX_OPC_SWINT1, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286b180000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "swint2", TILEGX_OPC_SWINT2, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286b200000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "swint3", TILEGX_OPC_SWINT3, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286b280000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb0", TILEGX_OPC_TBLIDXB0, 0x5, 2, TREG_ZERO, 1, + { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0ULL, + 0x00000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051489000ULL, + -1ULL, + 0x00000000300c9000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb1", TILEGX_OPC_TBLIDXB1, 0x5, 2, TREG_ZERO, 1, + { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0ULL, + 0x00000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x000000005148a000ULL, + -1ULL, + 0x00000000300ca000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb2", TILEGX_OPC_TBLIDXB2, 0x5, 2, TREG_ZERO, 1, + { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0ULL, + 0x00000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x000000005148b000ULL, + -1ULL, + 0x00000000300cb000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb3", TILEGX_OPC_TBLIDXB3, 0x5, 2, TREG_ZERO, 1, + { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffff000ULL, + 0ULL, + 0x00000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x000000005148c000ULL, + -1ULL, + 0x00000000300cc000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1add", TILEGX_OPC_V1ADD, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051500000ULL, + 0x286e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1addi", TILEGX_OPC_V1ADDI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040800000ULL, + 0x1908000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1adduc", TILEGX_OPC_V1ADDUC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000514c0000ULL, + 0x286c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1adiffu", TILEGX_OPC_V1ADIFFU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051540000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1avgu", TILEGX_OPC_V1AVGU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051580000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1cmpeq", TILEGX_OPC_V1CMPEQ, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000515c0000ULL, + 0x2870000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1cmpeqi", TILEGX_OPC_V1CMPEQI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040900000ULL, + 0x1910000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1cmples", TILEGX_OPC_V1CMPLES, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051600000ULL, + 0x2872000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1cmpleu", TILEGX_OPC_V1CMPLEU, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051640000ULL, + 0x2874000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1cmplts", TILEGX_OPC_V1CMPLTS, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051680000ULL, + 0x2876000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1cmpltsi", TILEGX_OPC_V1CMPLTSI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040a00000ULL, + 0x1918000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1cmpltu", TILEGX_OPC_V1CMPLTU, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000516c0000ULL, + 0x2878000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1cmpltui", TILEGX_OPC_V1CMPLTUI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040b00000ULL, + 0x1920000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1cmpne", TILEGX_OPC_V1CMPNE, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051700000ULL, + 0x287a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1ddotpu", TILEGX_OPC_V1DDOTPU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052880000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1ddotpua", TILEGX_OPC_V1DDOTPUA, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052840000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1ddotpus", TILEGX_OPC_V1DDOTPUS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051780000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1ddotpusa", TILEGX_OPC_V1DDOTPUSA, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051740000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1dotp", TILEGX_OPC_V1DOTP, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051880000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1dotpa", TILEGX_OPC_V1DOTPA, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000517c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1dotpu", TILEGX_OPC_V1DOTPU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052900000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1dotpua", TILEGX_OPC_V1DOTPUA, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000528c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1dotpus", TILEGX_OPC_V1DOTPUS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051840000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1dotpusa", TILEGX_OPC_V1DOTPUSA, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051800000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1int_h", TILEGX_OPC_V1INT_H, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000518c0000ULL, + 0x287c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1int_l", TILEGX_OPC_V1INT_L, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051900000ULL, + 0x287e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1maxu", TILEGX_OPC_V1MAXU, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051940000ULL, + 0x2880000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1maxui", TILEGX_OPC_V1MAXUI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040c00000ULL, + 0x1928000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1minu", TILEGX_OPC_V1MINU, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051980000ULL, + 0x2882000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1minui", TILEGX_OPC_V1MINUI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040d00000ULL, + 0x1930000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1mnz", TILEGX_OPC_V1MNZ, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000519c0000ULL, + 0x2884000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1multu", TILEGX_OPC_V1MULTU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051a00000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1mulu", TILEGX_OPC_V1MULU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051a80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1mulus", TILEGX_OPC_V1MULUS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051a40000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1mz", TILEGX_OPC_V1MZ, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051ac0000ULL, + 0x2886000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1sadau", TILEGX_OPC_V1SADAU, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051b00000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1sadu", TILEGX_OPC_V1SADU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051b40000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1shl", TILEGX_OPC_V1SHL, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051b80000ULL, + 0x2888000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1shli", TILEGX_OPC_V1SHLI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000601c0000ULL, + 0x300e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1shrs", TILEGX_OPC_V1SHRS, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051bc0000ULL, + 0x288a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1shrsi", TILEGX_OPC_V1SHRSI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000060200000ULL, + 0x3010000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1shru", TILEGX_OPC_V1SHRU, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051c00000ULL, + 0x288c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1shrui", TILEGX_OPC_V1SHRUI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000060240000ULL, + 0x3012000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1sub", TILEGX_OPC_V1SUB, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051c80000ULL, + 0x2890000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v1subuc", TILEGX_OPC_V1SUBUC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051c40000ULL, + 0x288e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2add", TILEGX_OPC_V2ADD, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051d00000ULL, + 0x2894000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2addi", TILEGX_OPC_V2ADDI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040e00000ULL, + 0x1938000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2addsc", TILEGX_OPC_V2ADDSC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051cc0000ULL, + 0x2892000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2adiffs", TILEGX_OPC_V2ADIFFS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051d40000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2avgs", TILEGX_OPC_V2AVGS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051d80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2cmpeq", TILEGX_OPC_V2CMPEQ, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051dc0000ULL, + 0x2896000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2cmpeqi", TILEGX_OPC_V2CMPEQI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040f00000ULL, + 0x1940000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2cmples", TILEGX_OPC_V2CMPLES, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051e00000ULL, + 0x2898000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2cmpleu", TILEGX_OPC_V2CMPLEU, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051e40000ULL, + 0x289a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2cmplts", TILEGX_OPC_V2CMPLTS, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051e80000ULL, + 0x289c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2cmpltsi", TILEGX_OPC_V2CMPLTSI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000041000000ULL, + 0x1948000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2cmpltu", TILEGX_OPC_V2CMPLTU, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051ec0000ULL, + 0x289e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2cmpltui", TILEGX_OPC_V2CMPLTUI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000041100000ULL, + 0x1950000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2cmpne", TILEGX_OPC_V2CMPNE, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051f00000ULL, + 0x28a0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2dotp", TILEGX_OPC_V2DOTP, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051f80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2dotpa", TILEGX_OPC_V2DOTPA, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051f40000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2int_h", TILEGX_OPC_V2INT_H, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000051fc0000ULL, + 0x28a2000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2int_l", TILEGX_OPC_V2INT_L, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052000000ULL, + 0x28a4000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2maxs", TILEGX_OPC_V2MAXS, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052040000ULL, + 0x28a6000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2maxsi", TILEGX_OPC_V2MAXSI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000041200000ULL, + 0x1958000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2mins", TILEGX_OPC_V2MINS, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052080000ULL, + 0x28a8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2minsi", TILEGX_OPC_V2MINSI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000041300000ULL, + 0x1960000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2mnz", TILEGX_OPC_V2MNZ, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000520c0000ULL, + 0x28aa000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2mulfsc", TILEGX_OPC_V2MULFSC, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052100000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2muls", TILEGX_OPC_V2MULS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052140000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2mults", TILEGX_OPC_V2MULTS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052180000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2mz", TILEGX_OPC_V2MZ, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000521c0000ULL, + 0x28ac000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2packh", TILEGX_OPC_V2PACKH, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052200000ULL, + 0x28ae000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2packl", TILEGX_OPC_V2PACKL, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052240000ULL, + 0x28b0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2packuc", TILEGX_OPC_V2PACKUC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052280000ULL, + 0x28b2000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2sadas", TILEGX_OPC_V2SADAS, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000522c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2sadau", TILEGX_OPC_V2SADAU, 0x1, 3, TREG_ZERO, 1, + { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052300000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2sads", TILEGX_OPC_V2SADS, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052340000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2sadu", TILEGX_OPC_V2SADU, 0x1, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052380000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2shl", TILEGX_OPC_V2SHL, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052400000ULL, + 0x28b6000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2shli", TILEGX_OPC_V2SHLI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000060280000ULL, + 0x3014000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2shlsc", TILEGX_OPC_V2SHLSC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000523c0000ULL, + 0x28b4000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2shrs", TILEGX_OPC_V2SHRS, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052440000ULL, + 0x28b8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2shrsi", TILEGX_OPC_V2SHRSI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000602c0000ULL, + 0x3016000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2shru", TILEGX_OPC_V2SHRU, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052480000ULL, + 0x28ba000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2shrui", TILEGX_OPC_V2SHRUI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000060300000ULL, + 0x3018000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2sub", TILEGX_OPC_V2SUB, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052500000ULL, + 0x28be000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v2subsc", TILEGX_OPC_V2SUBSC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000524c0000ULL, + 0x28bc000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v4add", TILEGX_OPC_V4ADD, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052580000ULL, + 0x28c2000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v4addsc", TILEGX_OPC_V4ADDSC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052540000ULL, + 0x28c0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v4int_h", TILEGX_OPC_V4INT_H, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000525c0000ULL, + 0x28c4000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v4int_l", TILEGX_OPC_V4INT_L, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052600000ULL, + 0x28c6000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v4packsc", TILEGX_OPC_V4PACKSC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052640000ULL, + 0x28c8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v4shl", TILEGX_OPC_V4SHL, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000526c0000ULL, + 0x28cc000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v4shlsc", TILEGX_OPC_V4SHLSC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052680000ULL, + 0x28ca000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v4shrs", TILEGX_OPC_V4SHRS, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052700000ULL, + 0x28ce000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v4shru", TILEGX_OPC_V4SHRU, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052740000ULL, + 0x28d0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v4sub", TILEGX_OPC_V4SUB, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000527c0000ULL, + 0x28d4000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "v4subsc", TILEGX_OPC_V4SUBSC, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000052780000ULL, + 0x28d2000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "wh64", TILEGX_OPC_WH64, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x286b300000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "xor", TILEGX_OPC_XOR, 0xf, 3, TREG_ZERO, 1, + { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x00000000780c0000ULL, + 0x3c06000000000000ULL, + 0ULL + }, + { + 0x0000000052800000ULL, + 0x28d6000000000000ULL, + 0x00000000500c0000ULL, + 0x2c06000000000000ULL, + -1ULL + } +#endif + }, + { "xori", TILEGX_OPC_XORI, 0x3, 3, TREG_ZERO, 1, + { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0xc00000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000041400000ULL, + 0x1968000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { NULL, TILEGX_OPC_NONE, 0, 0, TREG_ZERO, 0, { { 0, } }, +#ifndef DISASM_ONLY + { 0, }, { 0, } +#endif + } +}; +#define BITFIELD(start, size) ((start) | (((1 << (size)) - 1) << 6)) +#define CHILD(array_index) (TILEGX_OPC_NONE + (array_index)) + +static const unsigned short decode_X0_fsm[936] = +{ + BITFIELD(22, 9) /* index 0 */, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_BFEXTS, + TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTU, + TILEGX_OPC_BFEXTU, TILEGX_OPC_BFEXTU, TILEGX_OPC_BFEXTU, TILEGX_OPC_BFINS, + TILEGX_OPC_BFINS, TILEGX_OPC_BFINS, TILEGX_OPC_BFINS, TILEGX_OPC_MM, + TILEGX_OPC_MM, TILEGX_OPC_MM, TILEGX_OPC_MM, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(528), CHILD(578), + CHILD(583), CHILD(588), CHILD(593), CHILD(598), TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, CHILD(603), CHILD(620), CHILD(637), CHILD(654), CHILD(671), + CHILD(703), CHILD(797), CHILD(814), CHILD(831), CHILD(848), CHILD(865), + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, CHILD(889), TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), + CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), + CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), + CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), + CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), + CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), + CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), + CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), + CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), + CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), + CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), + BITFIELD(6, 2) /* index 513 */, + TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(518), + BITFIELD(8, 2) /* index 518 */, + TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(523), + BITFIELD(10, 2) /* index 523 */, + TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_MOVELI, + BITFIELD(20, 2) /* index 528 */, + TILEGX_OPC_NONE, CHILD(533), TILEGX_OPC_ADDXI, CHILD(548), + BITFIELD(6, 2) /* index 533 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(538), + BITFIELD(8, 2) /* index 538 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(543), + BITFIELD(10, 2) /* index 543 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI, + BITFIELD(0, 2) /* index 548 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(553), + BITFIELD(2, 2) /* index 553 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(558), + BITFIELD(4, 2) /* index 558 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(563), + BITFIELD(6, 2) /* index 563 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(568), + BITFIELD(8, 2) /* index 568 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(573), + BITFIELD(10, 2) /* index 573 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO, + BITFIELD(20, 2) /* index 578 */, + TILEGX_OPC_CMPEQI, TILEGX_OPC_CMPLTSI, TILEGX_OPC_CMPLTUI, TILEGX_OPC_ORI, + BITFIELD(20, 2) /* index 583 */, + TILEGX_OPC_V1ADDI, TILEGX_OPC_V1CMPEQI, TILEGX_OPC_V1CMPLTSI, + TILEGX_OPC_V1CMPLTUI, + BITFIELD(20, 2) /* index 588 */, + TILEGX_OPC_V1MAXUI, TILEGX_OPC_V1MINUI, TILEGX_OPC_V2ADDI, + TILEGX_OPC_V2CMPEQI, + BITFIELD(20, 2) /* index 593 */, + TILEGX_OPC_V2CMPLTSI, TILEGX_OPC_V2CMPLTUI, TILEGX_OPC_V2MAXSI, + TILEGX_OPC_V2MINSI, + BITFIELD(20, 2) /* index 598 */, + TILEGX_OPC_XORI, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(18, 4) /* index 603 */, + TILEGX_OPC_NONE, TILEGX_OPC_ADDXSC, TILEGX_OPC_ADDX, TILEGX_OPC_ADD, + TILEGX_OPC_AND, TILEGX_OPC_CMOVEQZ, TILEGX_OPC_CMOVNEZ, TILEGX_OPC_CMPEQ, + TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU, + TILEGX_OPC_CMPNE, TILEGX_OPC_CMULAF, TILEGX_OPC_CMULA, TILEGX_OPC_CMULFR, + BITFIELD(18, 4) /* index 620 */, + TILEGX_OPC_CMULF, TILEGX_OPC_CMULHR, TILEGX_OPC_CMULH, TILEGX_OPC_CMUL, + TILEGX_OPC_CRC32_32, TILEGX_OPC_CRC32_8, TILEGX_OPC_DBLALIGN2, + TILEGX_OPC_DBLALIGN4, TILEGX_OPC_DBLALIGN6, TILEGX_OPC_DBLALIGN, + TILEGX_OPC_FDOUBLE_ADDSUB, TILEGX_OPC_FDOUBLE_ADD_FLAGS, + TILEGX_OPC_FDOUBLE_MUL_FLAGS, TILEGX_OPC_FDOUBLE_PACK1, + TILEGX_OPC_FDOUBLE_PACK2, TILEGX_OPC_FDOUBLE_SUB_FLAGS, + BITFIELD(18, 4) /* index 637 */, + TILEGX_OPC_FDOUBLE_UNPACK_MAX, TILEGX_OPC_FDOUBLE_UNPACK_MIN, + TILEGX_OPC_FSINGLE_ADD1, TILEGX_OPC_FSINGLE_ADDSUB2, + TILEGX_OPC_FSINGLE_MUL1, TILEGX_OPC_FSINGLE_MUL2, TILEGX_OPC_FSINGLE_PACK2, + TILEGX_OPC_FSINGLE_SUB1, TILEGX_OPC_MNZ, TILEGX_OPC_MULAX, + TILEGX_OPC_MULA_HS_HS, TILEGX_OPC_MULA_HS_HU, TILEGX_OPC_MULA_HS_LS, + TILEGX_OPC_MULA_HS_LU, TILEGX_OPC_MULA_HU_HU, TILEGX_OPC_MULA_HU_LS, + BITFIELD(18, 4) /* index 654 */, + TILEGX_OPC_MULA_HU_LU, TILEGX_OPC_MULA_LS_LS, TILEGX_OPC_MULA_LS_LU, + TILEGX_OPC_MULA_LU_LU, TILEGX_OPC_MULX, TILEGX_OPC_MUL_HS_HS, + TILEGX_OPC_MUL_HS_HU, TILEGX_OPC_MUL_HS_LS, TILEGX_OPC_MUL_HS_LU, + TILEGX_OPC_MUL_HU_HU, TILEGX_OPC_MUL_HU_LS, TILEGX_OPC_MUL_HU_LU, + TILEGX_OPC_MUL_LS_LS, TILEGX_OPC_MUL_LS_LU, TILEGX_OPC_MUL_LU_LU, + TILEGX_OPC_MZ, + BITFIELD(18, 4) /* index 671 */, + TILEGX_OPC_NOR, CHILD(688), TILEGX_OPC_ROTL, TILEGX_OPC_SHL1ADDX, + TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADDX, TILEGX_OPC_SHL2ADD, + TILEGX_OPC_SHL3ADDX, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHLX, TILEGX_OPC_SHL, + TILEGX_OPC_SHRS, TILEGX_OPC_SHRUX, TILEGX_OPC_SHRU, TILEGX_OPC_SHUFFLEBYTES, + TILEGX_OPC_SUBXSC, + BITFIELD(12, 2) /* index 688 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(693), + BITFIELD(14, 2) /* index 693 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(698), + BITFIELD(16, 2) /* index 698 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE, + BITFIELD(18, 4) /* index 703 */, + TILEGX_OPC_SUBX, TILEGX_OPC_SUB, CHILD(720), TILEGX_OPC_V1ADDUC, + TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADIFFU, TILEGX_OPC_V1AVGU, + TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLEU, + TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPNE, + TILEGX_OPC_V1DDOTPUSA, TILEGX_OPC_V1DDOTPUS, TILEGX_OPC_V1DOTPA, + BITFIELD(12, 4) /* index 720 */, + TILEGX_OPC_NONE, CHILD(737), CHILD(742), CHILD(747), CHILD(752), CHILD(757), + CHILD(762), CHILD(767), CHILD(772), CHILD(777), CHILD(782), CHILD(787), + CHILD(792), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 737 */, + TILEGX_OPC_CLZ, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 742 */, + TILEGX_OPC_CTZ, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 747 */, + TILEGX_OPC_FNOP, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 752 */, + TILEGX_OPC_FSINGLE_PACK1, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 757 */, + TILEGX_OPC_NOP, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 762 */, + TILEGX_OPC_PCNT, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 767 */, + TILEGX_OPC_REVBITS, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 772 */, + TILEGX_OPC_REVBYTES, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 777 */, + TILEGX_OPC_TBLIDXB0, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 782 */, + TILEGX_OPC_TBLIDXB1, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 787 */, + TILEGX_OPC_TBLIDXB2, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(16, 2) /* index 792 */, + TILEGX_OPC_TBLIDXB3, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(18, 4) /* index 797 */, + TILEGX_OPC_V1DOTPUSA, TILEGX_OPC_V1DOTPUS, TILEGX_OPC_V1DOTP, + TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1MAXU, + TILEGX_OPC_V1MINU, TILEGX_OPC_V1MNZ, TILEGX_OPC_V1MULTU, TILEGX_OPC_V1MULUS, + TILEGX_OPC_V1MULU, TILEGX_OPC_V1MZ, TILEGX_OPC_V1SADAU, TILEGX_OPC_V1SADU, + TILEGX_OPC_V1SHL, TILEGX_OPC_V1SHRS, + BITFIELD(18, 4) /* index 814 */, + TILEGX_OPC_V1SHRU, TILEGX_OPC_V1SUBUC, TILEGX_OPC_V1SUB, TILEGX_OPC_V2ADDSC, + TILEGX_OPC_V2ADD, TILEGX_OPC_V2ADIFFS, TILEGX_OPC_V2AVGS, + TILEGX_OPC_V2CMPEQ, TILEGX_OPC_V2CMPLES, TILEGX_OPC_V2CMPLEU, + TILEGX_OPC_V2CMPLTS, TILEGX_OPC_V2CMPLTU, TILEGX_OPC_V2CMPNE, + TILEGX_OPC_V2DOTPA, TILEGX_OPC_V2DOTP, TILEGX_OPC_V2INT_H, + BITFIELD(18, 4) /* index 831 */, + TILEGX_OPC_V2INT_L, TILEGX_OPC_V2MAXS, TILEGX_OPC_V2MINS, TILEGX_OPC_V2MNZ, + TILEGX_OPC_V2MULFSC, TILEGX_OPC_V2MULS, TILEGX_OPC_V2MULTS, TILEGX_OPC_V2MZ, + TILEGX_OPC_V2PACKH, TILEGX_OPC_V2PACKL, TILEGX_OPC_V2PACKUC, + TILEGX_OPC_V2SADAS, TILEGX_OPC_V2SADAU, TILEGX_OPC_V2SADS, + TILEGX_OPC_V2SADU, TILEGX_OPC_V2SHLSC, + BITFIELD(18, 4) /* index 848 */, + TILEGX_OPC_V2SHL, TILEGX_OPC_V2SHRS, TILEGX_OPC_V2SHRU, TILEGX_OPC_V2SUBSC, + TILEGX_OPC_V2SUB, TILEGX_OPC_V4ADDSC, TILEGX_OPC_V4ADD, TILEGX_OPC_V4INT_H, + TILEGX_OPC_V4INT_L, TILEGX_OPC_V4PACKSC, TILEGX_OPC_V4SHLSC, + TILEGX_OPC_V4SHL, TILEGX_OPC_V4SHRS, TILEGX_OPC_V4SHRU, TILEGX_OPC_V4SUBSC, + TILEGX_OPC_V4SUB, + BITFIELD(18, 3) /* index 865 */, + CHILD(874), CHILD(877), CHILD(880), CHILD(883), CHILD(886), TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(21, 1) /* index 874 */, + TILEGX_OPC_XOR, TILEGX_OPC_NONE, + BITFIELD(21, 1) /* index 877 */, + TILEGX_OPC_V1DDOTPUA, TILEGX_OPC_NONE, + BITFIELD(21, 1) /* index 880 */, + TILEGX_OPC_V1DDOTPU, TILEGX_OPC_NONE, + BITFIELD(21, 1) /* index 883 */, + TILEGX_OPC_V1DOTPUA, TILEGX_OPC_NONE, + BITFIELD(21, 1) /* index 886 */, + TILEGX_OPC_V1DOTPU, TILEGX_OPC_NONE, + BITFIELD(18, 4) /* index 889 */, + TILEGX_OPC_NONE, TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHLXI, + TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, TILEGX_OPC_SHRUXI, TILEGX_OPC_V1SHLI, + TILEGX_OPC_V1SHRSI, TILEGX_OPC_V1SHRUI, TILEGX_OPC_V2SHLI, + TILEGX_OPC_V2SHRSI, TILEGX_OPC_V2SHRUI, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, + BITFIELD(0, 2) /* index 906 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + CHILD(911), + BITFIELD(2, 2) /* index 911 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + CHILD(916), + BITFIELD(4, 2) /* index 916 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + CHILD(921), + BITFIELD(6, 2) /* index 921 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + CHILD(926), + BITFIELD(8, 2) /* index 926 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + CHILD(931), + BITFIELD(10, 2) /* index 931 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + TILEGX_OPC_INFOL, +}; + +static const unsigned short decode_X1_fsm[1206] = +{ + BITFIELD(53, 9) /* index 0 */, + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), + CHILD(513), CHILD(513), CHILD(513), CHILD(513), TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, + TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_BEQZT, + TILEGX_OPC_BEQZT, TILEGX_OPC_BEQZ, TILEGX_OPC_BEQZ, TILEGX_OPC_BGEZT, + TILEGX_OPC_BGEZT, TILEGX_OPC_BGEZ, TILEGX_OPC_BGEZ, TILEGX_OPC_BGTZT, + TILEGX_OPC_BGTZT, TILEGX_OPC_BGTZ, TILEGX_OPC_BGTZ, TILEGX_OPC_BLBCT, + TILEGX_OPC_BLBCT, TILEGX_OPC_BLBC, TILEGX_OPC_BLBC, TILEGX_OPC_BLBST, + TILEGX_OPC_BLBST, TILEGX_OPC_BLBS, TILEGX_OPC_BLBS, TILEGX_OPC_BLEZT, + TILEGX_OPC_BLEZT, TILEGX_OPC_BLEZ, TILEGX_OPC_BLEZ, TILEGX_OPC_BLTZT, + TILEGX_OPC_BLTZT, TILEGX_OPC_BLTZ, TILEGX_OPC_BLTZ, TILEGX_OPC_BNEZT, + TILEGX_OPC_BNEZT, TILEGX_OPC_BNEZ, TILEGX_OPC_BNEZ, CHILD(528), CHILD(578), + CHILD(598), CHILD(663), CHILD(683), CHILD(688), CHILD(693), CHILD(698), + CHILD(703), CHILD(708), CHILD(713), CHILD(718), TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_JAL, + TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, + TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, + TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, + TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, + TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, + TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, + TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, + TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_J, TILEGX_OPC_J, + TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, + TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, + TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, + TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, + TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, + TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, + CHILD(723), CHILD(740), CHILD(772), CHILD(789), CHILD(1108), CHILD(1125), + CHILD(1142), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(1159), TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), + CHILD(1176), + BITFIELD(37, 2) /* index 513 */, + TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(518), + BITFIELD(39, 2) /* index 518 */, + TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(523), + BITFIELD(41, 2) /* index 523 */, + TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_MOVELI, + BITFIELD(51, 2) /* index 528 */, + TILEGX_OPC_NONE, CHILD(533), TILEGX_OPC_ADDXI, CHILD(548), + BITFIELD(37, 2) /* index 533 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(538), + BITFIELD(39, 2) /* index 538 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(543), + BITFIELD(41, 2) /* index 543 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI, + BITFIELD(31, 2) /* index 548 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(553), + BITFIELD(33, 2) /* index 553 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(558), + BITFIELD(35, 2) /* index 558 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(563), + BITFIELD(37, 2) /* index 563 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(568), + BITFIELD(39, 2) /* index 568 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(573), + BITFIELD(41, 2) /* index 573 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO, + BITFIELD(51, 2) /* index 578 */, + TILEGX_OPC_CMPEQI, TILEGX_OPC_CMPLTSI, TILEGX_OPC_CMPLTUI, CHILD(583), + BITFIELD(31, 2) /* index 583 */, + TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, CHILD(588), + BITFIELD(33, 2) /* index 588 */, + TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, CHILD(593), + BITFIELD(35, 2) /* index 593 */, + TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, + TILEGX_OPC_PREFETCH_ADD_L1_FAULT, + BITFIELD(51, 2) /* index 598 */, + CHILD(603), CHILD(618), CHILD(633), CHILD(648), + BITFIELD(31, 2) /* index 603 */, + TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, CHILD(608), + BITFIELD(33, 2) /* index 608 */, + TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, CHILD(613), + BITFIELD(35, 2) /* index 613 */, + TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, + TILEGX_OPC_PREFETCH_ADD_L1, + BITFIELD(31, 2) /* index 618 */, + TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, CHILD(623), + BITFIELD(33, 2) /* index 623 */, + TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, CHILD(628), + BITFIELD(35, 2) /* index 628 */, + TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, + TILEGX_OPC_PREFETCH_ADD_L2_FAULT, + BITFIELD(31, 2) /* index 633 */, + TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, CHILD(638), + BITFIELD(33, 2) /* index 638 */, + TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, CHILD(643), + BITFIELD(35, 2) /* index 643 */, + TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, + TILEGX_OPC_PREFETCH_ADD_L2, + BITFIELD(31, 2) /* index 648 */, + TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, CHILD(653), + BITFIELD(33, 2) /* index 653 */, + TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, CHILD(658), + BITFIELD(35, 2) /* index 658 */, + TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, + TILEGX_OPC_PREFETCH_ADD_L3_FAULT, + BITFIELD(51, 2) /* index 663 */, + CHILD(668), TILEGX_OPC_LDNT1S_ADD, TILEGX_OPC_LDNT1U_ADD, + TILEGX_OPC_LDNT2S_ADD, + BITFIELD(31, 2) /* index 668 */, + TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, CHILD(673), + BITFIELD(33, 2) /* index 673 */, + TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, CHILD(678), + BITFIELD(35, 2) /* index 678 */, + TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, + TILEGX_OPC_PREFETCH_ADD_L3, + BITFIELD(51, 2) /* index 683 */, + TILEGX_OPC_LDNT2U_ADD, TILEGX_OPC_LDNT4S_ADD, TILEGX_OPC_LDNT4U_ADD, + TILEGX_OPC_LDNT_ADD, + BITFIELD(51, 2) /* index 688 */, + TILEGX_OPC_LD_ADD, TILEGX_OPC_LDNA_ADD, TILEGX_OPC_MFSPR, TILEGX_OPC_MTSPR, + BITFIELD(51, 2) /* index 693 */, + TILEGX_OPC_ORI, TILEGX_OPC_ST1_ADD, TILEGX_OPC_ST2_ADD, TILEGX_OPC_ST4_ADD, + BITFIELD(51, 2) /* index 698 */, + TILEGX_OPC_STNT1_ADD, TILEGX_OPC_STNT2_ADD, TILEGX_OPC_STNT4_ADD, + TILEGX_OPC_STNT_ADD, + BITFIELD(51, 2) /* index 703 */, + TILEGX_OPC_ST_ADD, TILEGX_OPC_V1ADDI, TILEGX_OPC_V1CMPEQI, + TILEGX_OPC_V1CMPLTSI, + BITFIELD(51, 2) /* index 708 */, + TILEGX_OPC_V1CMPLTUI, TILEGX_OPC_V1MAXUI, TILEGX_OPC_V1MINUI, + TILEGX_OPC_V2ADDI, + BITFIELD(51, 2) /* index 713 */, + TILEGX_OPC_V2CMPEQI, TILEGX_OPC_V2CMPLTSI, TILEGX_OPC_V2CMPLTUI, + TILEGX_OPC_V2MAXSI, + BITFIELD(51, 2) /* index 718 */, + TILEGX_OPC_V2MINSI, TILEGX_OPC_XORI, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(49, 4) /* index 723 */, + TILEGX_OPC_NONE, TILEGX_OPC_ADDXSC, TILEGX_OPC_ADDX, TILEGX_OPC_ADD, + TILEGX_OPC_AND, TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPEXCH4, TILEGX_OPC_CMPEXCH, + TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU, + TILEGX_OPC_CMPNE, TILEGX_OPC_DBLALIGN2, TILEGX_OPC_DBLALIGN4, + TILEGX_OPC_DBLALIGN6, + BITFIELD(49, 4) /* index 740 */, + TILEGX_OPC_EXCH4, TILEGX_OPC_EXCH, TILEGX_OPC_FETCHADD4, + TILEGX_OPC_FETCHADDGEZ4, TILEGX_OPC_FETCHADDGEZ, TILEGX_OPC_FETCHADD, + TILEGX_OPC_FETCHAND4, TILEGX_OPC_FETCHAND, TILEGX_OPC_FETCHOR4, + TILEGX_OPC_FETCHOR, TILEGX_OPC_MNZ, TILEGX_OPC_MZ, TILEGX_OPC_NOR, + CHILD(757), TILEGX_OPC_ROTL, TILEGX_OPC_SHL1ADDX, + BITFIELD(43, 2) /* index 757 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(762), + BITFIELD(45, 2) /* index 762 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(767), + BITFIELD(47, 2) /* index 767 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE, + BITFIELD(49, 4) /* index 772 */, + TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADDX, TILEGX_OPC_SHL2ADD, + TILEGX_OPC_SHL3ADDX, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHLX, TILEGX_OPC_SHL, + TILEGX_OPC_SHRS, TILEGX_OPC_SHRUX, TILEGX_OPC_SHRU, TILEGX_OPC_ST1, + TILEGX_OPC_ST2, TILEGX_OPC_ST4, TILEGX_OPC_STNT1, TILEGX_OPC_STNT2, + TILEGX_OPC_STNT4, + BITFIELD(46, 7) /* index 789 */, + TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, + TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, + TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, + TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_SUBXSC, + TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, + TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBX, + TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, + TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUB, + TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, + TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, CHILD(918), CHILD(927), + CHILD(1006), CHILD(1090), CHILD(1099), TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, + TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, + TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, + TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, + TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, + TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, + TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, + TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, + TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, + TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLEU, + TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, + TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, + TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, + TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, + TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, + TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, + TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, + TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPNE, + TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, + TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, + TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, + TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, + TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, + TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, + TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, + TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, + BITFIELD(43, 3) /* index 918 */, + TILEGX_OPC_NONE, TILEGX_OPC_DRAIN, TILEGX_OPC_DTLBPR, TILEGX_OPC_FINV, + TILEGX_OPC_FLUSHWB, TILEGX_OPC_FLUSH, TILEGX_OPC_FNOP, TILEGX_OPC_ICOH, + BITFIELD(43, 3) /* index 927 */, + CHILD(936), TILEGX_OPC_INV, TILEGX_OPC_IRET, TILEGX_OPC_JALRP, + TILEGX_OPC_JALR, TILEGX_OPC_JRP, TILEGX_OPC_JR, CHILD(991), + BITFIELD(31, 2) /* index 936 */, + CHILD(941), CHILD(966), TILEGX_OPC_ILL, TILEGX_OPC_ILL, + BITFIELD(33, 2) /* index 941 */, + TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_ILL, CHILD(946), + BITFIELD(35, 2) /* index 946 */, + TILEGX_OPC_ILL, CHILD(951), TILEGX_OPC_ILL, TILEGX_OPC_ILL, + BITFIELD(37, 2) /* index 951 */, + TILEGX_OPC_ILL, CHILD(956), TILEGX_OPC_ILL, TILEGX_OPC_ILL, + BITFIELD(39, 2) /* index 956 */, + TILEGX_OPC_ILL, CHILD(961), TILEGX_OPC_ILL, TILEGX_OPC_ILL, + BITFIELD(41, 2) /* index 961 */, + TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_BPT, TILEGX_OPC_ILL, + BITFIELD(33, 2) /* index 966 */, + TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_ILL, CHILD(971), + BITFIELD(35, 2) /* index 971 */, + TILEGX_OPC_ILL, CHILD(976), TILEGX_OPC_ILL, TILEGX_OPC_ILL, + BITFIELD(37, 2) /* index 976 */, + TILEGX_OPC_ILL, CHILD(981), TILEGX_OPC_ILL, TILEGX_OPC_ILL, + BITFIELD(39, 2) /* index 981 */, + TILEGX_OPC_ILL, CHILD(986), TILEGX_OPC_ILL, TILEGX_OPC_ILL, + BITFIELD(41, 2) /* index 986 */, + TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_RAISE, TILEGX_OPC_ILL, + BITFIELD(31, 2) /* index 991 */, + TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(996), + BITFIELD(33, 2) /* index 996 */, + TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(1001), + BITFIELD(35, 2) /* index 1001 */, + TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, + TILEGX_OPC_PREFETCH_L1_FAULT, + BITFIELD(43, 3) /* index 1006 */, + CHILD(1015), CHILD(1030), CHILD(1045), CHILD(1060), CHILD(1075), + TILEGX_OPC_LDNA, TILEGX_OPC_LDNT1S, TILEGX_OPC_LDNT1U, + BITFIELD(31, 2) /* index 1015 */, + TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(1020), + BITFIELD(33, 2) /* index 1020 */, + TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(1025), + BITFIELD(35, 2) /* index 1025 */, + TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_PREFETCH, + BITFIELD(31, 2) /* index 1030 */, + TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(1035), + BITFIELD(33, 2) /* index 1035 */, + TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(1040), + BITFIELD(35, 2) /* index 1040 */, + TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, + TILEGX_OPC_PREFETCH_L2_FAULT, + BITFIELD(31, 2) /* index 1045 */, + TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(1050), + BITFIELD(33, 2) /* index 1050 */, + TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(1055), + BITFIELD(35, 2) /* index 1055 */, + TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_PREFETCH_L2, + BITFIELD(31, 2) /* index 1060 */, + TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(1065), + BITFIELD(33, 2) /* index 1065 */, + TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(1070), + BITFIELD(35, 2) /* index 1070 */, + TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, + TILEGX_OPC_PREFETCH_L3_FAULT, + BITFIELD(31, 2) /* index 1075 */, + TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(1080), + BITFIELD(33, 2) /* index 1080 */, + TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(1085), + BITFIELD(35, 2) /* index 1085 */, + TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_PREFETCH_L3, + BITFIELD(43, 3) /* index 1090 */, + TILEGX_OPC_LDNT2S, TILEGX_OPC_LDNT2U, TILEGX_OPC_LDNT4S, TILEGX_OPC_LDNT4U, + TILEGX_OPC_LDNT, TILEGX_OPC_LD, TILEGX_OPC_LNK, TILEGX_OPC_MF, + BITFIELD(43, 3) /* index 1099 */, + TILEGX_OPC_NAP, TILEGX_OPC_NOP, TILEGX_OPC_SWINT0, TILEGX_OPC_SWINT1, + TILEGX_OPC_SWINT2, TILEGX_OPC_SWINT3, TILEGX_OPC_WH64, TILEGX_OPC_NONE, + BITFIELD(49, 4) /* index 1108 */, + TILEGX_OPC_V1MAXU, TILEGX_OPC_V1MINU, TILEGX_OPC_V1MNZ, TILEGX_OPC_V1MZ, + TILEGX_OPC_V1SHL, TILEGX_OPC_V1SHRS, TILEGX_OPC_V1SHRU, TILEGX_OPC_V1SUBUC, + TILEGX_OPC_V1SUB, TILEGX_OPC_V2ADDSC, TILEGX_OPC_V2ADD, TILEGX_OPC_V2CMPEQ, + TILEGX_OPC_V2CMPLES, TILEGX_OPC_V2CMPLEU, TILEGX_OPC_V2CMPLTS, + TILEGX_OPC_V2CMPLTU, + BITFIELD(49, 4) /* index 1125 */, + TILEGX_OPC_V2CMPNE, TILEGX_OPC_V2INT_H, TILEGX_OPC_V2INT_L, + TILEGX_OPC_V2MAXS, TILEGX_OPC_V2MINS, TILEGX_OPC_V2MNZ, TILEGX_OPC_V2MZ, + TILEGX_OPC_V2PACKH, TILEGX_OPC_V2PACKL, TILEGX_OPC_V2PACKUC, + TILEGX_OPC_V2SHLSC, TILEGX_OPC_V2SHL, TILEGX_OPC_V2SHRS, TILEGX_OPC_V2SHRU, + TILEGX_OPC_V2SUBSC, TILEGX_OPC_V2SUB, + BITFIELD(49, 4) /* index 1142 */, + TILEGX_OPC_V4ADDSC, TILEGX_OPC_V4ADD, TILEGX_OPC_V4INT_H, + TILEGX_OPC_V4INT_L, TILEGX_OPC_V4PACKSC, TILEGX_OPC_V4SHLSC, + TILEGX_OPC_V4SHL, TILEGX_OPC_V4SHRS, TILEGX_OPC_V4SHRU, TILEGX_OPC_V4SUBSC, + TILEGX_OPC_V4SUB, TILEGX_OPC_XOR, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(49, 4) /* index 1159 */, + TILEGX_OPC_NONE, TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHLXI, + TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, TILEGX_OPC_SHRUXI, TILEGX_OPC_V1SHLI, + TILEGX_OPC_V1SHRSI, TILEGX_OPC_V1SHRUI, TILEGX_OPC_V2SHLI, + TILEGX_OPC_V2SHRSI, TILEGX_OPC_V2SHRUI, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, + BITFIELD(31, 2) /* index 1176 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + CHILD(1181), + BITFIELD(33, 2) /* index 1181 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + CHILD(1186), + BITFIELD(35, 2) /* index 1186 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + CHILD(1191), + BITFIELD(37, 2) /* index 1191 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + CHILD(1196), + BITFIELD(39, 2) /* index 1196 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + CHILD(1201), + BITFIELD(41, 2) /* index 1201 */, + TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, + TILEGX_OPC_INFOL, +}; + +static const unsigned short decode_Y0_fsm[178] = +{ + BITFIELD(27, 4) /* index 0 */, + CHILD(17), TILEGX_OPC_ADDXI, CHILD(32), TILEGX_OPC_CMPEQI, + TILEGX_OPC_CMPLTSI, CHILD(62), CHILD(67), CHILD(118), CHILD(123), + CHILD(128), CHILD(133), CHILD(153), CHILD(158), CHILD(163), CHILD(168), + CHILD(173), + BITFIELD(6, 2) /* index 17 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(22), + BITFIELD(8, 2) /* index 22 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(27), + BITFIELD(10, 2) /* index 27 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI, + BITFIELD(0, 2) /* index 32 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(37), + BITFIELD(2, 2) /* index 37 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(42), + BITFIELD(4, 2) /* index 42 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(47), + BITFIELD(6, 2) /* index 47 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(52), + BITFIELD(8, 2) /* index 52 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(57), + BITFIELD(10, 2) /* index 57 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO, + BITFIELD(18, 2) /* index 62 */, + TILEGX_OPC_ADDX, TILEGX_OPC_ADD, TILEGX_OPC_SUBX, TILEGX_OPC_SUB, + BITFIELD(15, 5) /* index 67 */, + TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, + TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, + TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADD, + TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, + TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, + TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, + TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, + TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, CHILD(100), + CHILD(109), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(12, 3) /* index 100 */, + TILEGX_OPC_NONE, TILEGX_OPC_CLZ, TILEGX_OPC_CTZ, TILEGX_OPC_FNOP, + TILEGX_OPC_FSINGLE_PACK1, TILEGX_OPC_NOP, TILEGX_OPC_PCNT, + TILEGX_OPC_REVBITS, + BITFIELD(12, 3) /* index 109 */, + TILEGX_OPC_REVBYTES, TILEGX_OPC_TBLIDXB0, TILEGX_OPC_TBLIDXB1, + TILEGX_OPC_TBLIDXB2, TILEGX_OPC_TBLIDXB3, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + TILEGX_OPC_NONE, + BITFIELD(18, 2) /* index 118 */, + TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU, + BITFIELD(18, 2) /* index 123 */, + TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPNE, TILEGX_OPC_MULAX, TILEGX_OPC_MULX, + BITFIELD(18, 2) /* index 128 */, + TILEGX_OPC_CMOVEQZ, TILEGX_OPC_CMOVNEZ, TILEGX_OPC_MNZ, TILEGX_OPC_MZ, + BITFIELD(18, 2) /* index 133 */, + TILEGX_OPC_AND, TILEGX_OPC_NOR, CHILD(138), TILEGX_OPC_XOR, + BITFIELD(12, 2) /* index 138 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(143), + BITFIELD(14, 2) /* index 143 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(148), + BITFIELD(16, 2) /* index 148 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE, + BITFIELD(18, 2) /* index 153 */, + TILEGX_OPC_ROTL, TILEGX_OPC_SHL, TILEGX_OPC_SHRS, TILEGX_OPC_SHRU, + BITFIELD(18, 2) /* index 158 */, + TILEGX_OPC_NONE, TILEGX_OPC_SHL1ADDX, TILEGX_OPC_SHL2ADDX, + TILEGX_OPC_SHL3ADDX, + BITFIELD(18, 2) /* index 163 */, + TILEGX_OPC_MUL_HS_HS, TILEGX_OPC_MUL_HU_HU, TILEGX_OPC_MUL_LS_LS, + TILEGX_OPC_MUL_LU_LU, + BITFIELD(18, 2) /* index 168 */, + TILEGX_OPC_MULA_HS_HS, TILEGX_OPC_MULA_HU_HU, TILEGX_OPC_MULA_LS_LS, + TILEGX_OPC_MULA_LU_LU, + BITFIELD(18, 2) /* index 173 */, + TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, +}; + +static const unsigned short decode_Y1_fsm[167] = +{ + BITFIELD(58, 4) /* index 0 */, + TILEGX_OPC_NONE, CHILD(17), TILEGX_OPC_ADDXI, CHILD(32), TILEGX_OPC_CMPEQI, + TILEGX_OPC_CMPLTSI, CHILD(62), CHILD(67), CHILD(117), CHILD(122), + CHILD(127), CHILD(132), CHILD(152), CHILD(157), CHILD(162), TILEGX_OPC_NONE, + BITFIELD(37, 2) /* index 17 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(22), + BITFIELD(39, 2) /* index 22 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(27), + BITFIELD(41, 2) /* index 27 */, + TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI, + BITFIELD(31, 2) /* index 32 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(37), + BITFIELD(33, 2) /* index 37 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(42), + BITFIELD(35, 2) /* index 42 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(47), + BITFIELD(37, 2) /* index 47 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(52), + BITFIELD(39, 2) /* index 52 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(57), + BITFIELD(41, 2) /* index 57 */, + TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO, + BITFIELD(49, 2) /* index 62 */, + TILEGX_OPC_ADDX, TILEGX_OPC_ADD, TILEGX_OPC_SUBX, TILEGX_OPC_SUB, + BITFIELD(47, 4) /* index 67 */, + TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, + TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, + TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL3ADD, + TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, CHILD(84), + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, + BITFIELD(43, 3) /* index 84 */, + CHILD(93), CHILD(96), CHILD(99), CHILD(102), CHILD(105), CHILD(108), + CHILD(111), CHILD(114), + BITFIELD(46, 1) /* index 93 */, + TILEGX_OPC_NONE, TILEGX_OPC_FNOP, + BITFIELD(46, 1) /* index 96 */, + TILEGX_OPC_NONE, TILEGX_OPC_ILL, + BITFIELD(46, 1) /* index 99 */, + TILEGX_OPC_NONE, TILEGX_OPC_JALRP, + BITFIELD(46, 1) /* index 102 */, + TILEGX_OPC_NONE, TILEGX_OPC_JALR, + BITFIELD(46, 1) /* index 105 */, + TILEGX_OPC_NONE, TILEGX_OPC_JRP, + BITFIELD(46, 1) /* index 108 */, + TILEGX_OPC_NONE, TILEGX_OPC_JR, + BITFIELD(46, 1) /* index 111 */, + TILEGX_OPC_NONE, TILEGX_OPC_LNK, + BITFIELD(46, 1) /* index 114 */, + TILEGX_OPC_NONE, TILEGX_OPC_NOP, + BITFIELD(49, 2) /* index 117 */, + TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU, + BITFIELD(49, 2) /* index 122 */, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPNE, + BITFIELD(49, 2) /* index 127 */, + TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_MNZ, TILEGX_OPC_MZ, + BITFIELD(49, 2) /* index 132 */, + TILEGX_OPC_AND, TILEGX_OPC_NOR, CHILD(137), TILEGX_OPC_XOR, + BITFIELD(43, 2) /* index 137 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(142), + BITFIELD(45, 2) /* index 142 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(147), + BITFIELD(47, 2) /* index 147 */, + TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE, + BITFIELD(49, 2) /* index 152 */, + TILEGX_OPC_ROTL, TILEGX_OPC_SHL, TILEGX_OPC_SHRS, TILEGX_OPC_SHRU, + BITFIELD(49, 2) /* index 157 */, + TILEGX_OPC_NONE, TILEGX_OPC_SHL1ADDX, TILEGX_OPC_SHL2ADDX, + TILEGX_OPC_SHL3ADDX, + BITFIELD(49, 2) /* index 162 */, + TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, +}; + +static const unsigned short decode_Y2_fsm[118] = +{ + BITFIELD(62, 2) /* index 0 */, + TILEGX_OPC_NONE, CHILD(5), CHILD(66), CHILD(109), + BITFIELD(55, 3) /* index 5 */, + CHILD(14), CHILD(14), CHILD(14), CHILD(17), CHILD(40), CHILD(40), CHILD(40), + CHILD(43), + BITFIELD(26, 1) /* index 14 */, + TILEGX_OPC_LD1S, TILEGX_OPC_LD1U, + BITFIELD(26, 1) /* index 17 */, + CHILD(20), CHILD(30), + BITFIELD(51, 2) /* index 20 */, + TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(25), + BITFIELD(53, 2) /* index 25 */, + TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, + TILEGX_OPC_PREFETCH_L1_FAULT, + BITFIELD(51, 2) /* index 30 */, + TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(35), + BITFIELD(53, 2) /* index 35 */, + TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_PREFETCH, + BITFIELD(26, 1) /* index 40 */, + TILEGX_OPC_LD2S, TILEGX_OPC_LD2U, + BITFIELD(26, 1) /* index 43 */, + CHILD(46), CHILD(56), + BITFIELD(51, 2) /* index 46 */, + TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(51), + BITFIELD(53, 2) /* index 51 */, + TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, + TILEGX_OPC_PREFETCH_L2_FAULT, + BITFIELD(51, 2) /* index 56 */, + TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(61), + BITFIELD(53, 2) /* index 61 */, + TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_PREFETCH_L2, + BITFIELD(56, 2) /* index 66 */, + CHILD(71), CHILD(74), CHILD(90), CHILD(93), + BITFIELD(26, 1) /* index 71 */, + TILEGX_OPC_NONE, TILEGX_OPC_LD4S, + BITFIELD(26, 1) /* index 74 */, + TILEGX_OPC_NONE, CHILD(77), + BITFIELD(51, 2) /* index 77 */, + TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(82), + BITFIELD(53, 2) /* index 82 */, + TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(87), + BITFIELD(55, 1) /* index 87 */, + TILEGX_OPC_LD4S, TILEGX_OPC_PREFETCH_L3_FAULT, + BITFIELD(26, 1) /* index 90 */, + TILEGX_OPC_LD4U, TILEGX_OPC_LD, + BITFIELD(26, 1) /* index 93 */, + CHILD(96), TILEGX_OPC_LD, + BITFIELD(51, 2) /* index 96 */, + TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(101), + BITFIELD(53, 2) /* index 101 */, + TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(106), + BITFIELD(55, 1) /* index 106 */, + TILEGX_OPC_LD4U, TILEGX_OPC_PREFETCH_L3, + BITFIELD(26, 1) /* index 109 */, + CHILD(112), CHILD(115), + BITFIELD(57, 1) /* index 112 */, + TILEGX_OPC_ST1, TILEGX_OPC_ST4, + BITFIELD(57, 1) /* index 115 */, + TILEGX_OPC_ST2, TILEGX_OPC_ST, +}; + +#undef BITFIELD +#undef CHILD +const unsigned short * const +tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS] = +{ + decode_X0_fsm, + decode_X1_fsm, + decode_Y0_fsm, + decode_Y1_fsm, + decode_Y2_fsm +}; +const struct tilegx_operand tilegx_operands[35] = +{ + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_X0), + 8, 1, 0, 0, 0, 0, + create_Imm8_X0, get_Imm8_X0 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_X1), + 8, 1, 0, 0, 0, 0, + create_Imm8_X1, get_Imm8_X1 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_Y0), + 8, 1, 0, 0, 0, 0, + create_Imm8_Y0, get_Imm8_Y0 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_Y1), + 8, 1, 0, 0, 0, 0, + create_Imm8_Y1, get_Imm8_Y1 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM16_X0_HW0_LAST), + 16, 1, 0, 0, 0, 0, + create_Imm16_X0, get_Imm16_X0 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM16_X1_HW0_LAST), + 16, 1, 0, 0, 0, 0, + create_Imm16_X1, get_Imm16_X1 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 0, 1, 0, 0, + create_Dest_X0, get_Dest_X0 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcA_X0, get_SrcA_X0 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 0, 1, 0, 0, + create_Dest_X1, get_Dest_X1 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcA_X1, get_SrcA_X1 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 0, 1, 0, 0, + create_Dest_Y0, get_Dest_Y0 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcA_Y0, get_SrcA_Y0 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 0, 1, 0, 0, + create_Dest_Y1, get_Dest_Y1 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcA_Y1, get_SrcA_Y1 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcA_Y2, get_SrcA_Y2 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 1, 0, 0, + create_SrcA_X1, get_SrcA_X1 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcB_X0, get_SrcB_X0 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcB_X1, get_SrcB_X1 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcB_Y0, get_SrcB_Y0 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcB_Y1, get_SrcB_Y1 + }, + { + TILEGX_OP_TYPE_ADDRESS, BFD_RELOC(TILEGX_BROFF_X1), + 17, 1, 0, 0, 1, TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, + create_BrOff_X1, get_BrOff_X1 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_MMSTART_X0), + 6, 0, 0, 0, 0, 0, + create_BFStart_X0, get_BFStart_X0 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_MMEND_X0), + 6, 0, 0, 0, 0, 0, + create_BFEnd_X0, get_BFEnd_X0 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 1, 0, 0, + create_Dest_X0, get_Dest_X0 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 1, 0, 0, + create_Dest_Y0, get_Dest_Y0 + }, + { + TILEGX_OP_TYPE_ADDRESS, BFD_RELOC(TILEGX_JUMPOFF_X1), + 27, 1, 0, 0, 1, TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, + create_JumpOff_X1, get_JumpOff_X1 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 0, 1, 0, 0, + create_SrcBDest_Y2, get_SrcBDest_Y2 + }, + { + TILEGX_OP_TYPE_SPR, BFD_RELOC(TILEGX_MF_IMM14_X1), + 14, 0, 0, 0, 0, 0, + create_MF_Imm14_X1, get_MF_Imm14_X1 + }, + { + TILEGX_OP_TYPE_SPR, BFD_RELOC(TILEGX_MT_IMM14_X1), + 14, 0, 0, 0, 0, 0, + create_MT_Imm14_X1, get_MT_Imm14_X1 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_X0), + 6, 0, 0, 0, 0, 0, + create_ShAmt_X0, get_ShAmt_X0 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_X1), + 6, 0, 0, 0, 0, 0, + create_ShAmt_X1, get_ShAmt_X1 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_Y0), + 6, 0, 0, 0, 0, 0, + create_ShAmt_Y0, get_ShAmt_Y0 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_Y1), + 6, 0, 0, 0, 0, 0, + create_ShAmt_Y1, get_ShAmt_Y1 + }, + { + TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcBDest_Y2, get_SrcBDest_Y2 + }, + { + TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_DEST_IMM8_X1), + 8, 1, 0, 0, 0, 0, + create_Dest_Imm8_X1, get_Dest_Imm8_X1 + } +}; + +#ifndef DISASM_ONLY +const struct tilegx_spr tilegx_sprs[] = { + { 0, "MPL_MEM_ERROR_SET_0" }, + { 1, "MPL_MEM_ERROR_SET_1" }, + { 2, "MPL_MEM_ERROR_SET_2" }, + { 3, "MPL_MEM_ERROR_SET_3" }, + { 4, "MPL_MEM_ERROR" }, + { 5, "MEM_ERROR_CBOX_ADDR" }, + { 6, "MEM_ERROR_CBOX_STATUS" }, + { 7, "MEM_ERROR_ENABLE" }, + { 8, "MEM_ERROR_MBOX_ADDR" }, + { 9, "MEM_ERROR_MBOX_STATUS" }, + { 10, "SBOX_ERROR" }, + { 11, "XDN_DEMUX_ERROR" }, + { 256, "MPL_SINGLE_STEP_3_SET_0" }, + { 257, "MPL_SINGLE_STEP_3_SET_1" }, + { 258, "MPL_SINGLE_STEP_3_SET_2" }, + { 259, "MPL_SINGLE_STEP_3_SET_3" }, + { 260, "MPL_SINGLE_STEP_3" }, + { 261, "SINGLE_STEP_CONTROL_3" }, + { 512, "MPL_SINGLE_STEP_2_SET_0" }, + { 513, "MPL_SINGLE_STEP_2_SET_1" }, + { 514, "MPL_SINGLE_STEP_2_SET_2" }, + { 515, "MPL_SINGLE_STEP_2_SET_3" }, + { 516, "MPL_SINGLE_STEP_2" }, + { 517, "SINGLE_STEP_CONTROL_2" }, + { 768, "MPL_SINGLE_STEP_1_SET_0" }, + { 769, "MPL_SINGLE_STEP_1_SET_1" }, + { 770, "MPL_SINGLE_STEP_1_SET_2" }, + { 771, "MPL_SINGLE_STEP_1_SET_3" }, + { 772, "MPL_SINGLE_STEP_1" }, + { 773, "SINGLE_STEP_CONTROL_1" }, + { 1024, "MPL_SINGLE_STEP_0_SET_0" }, + { 1025, "MPL_SINGLE_STEP_0_SET_1" }, + { 1026, "MPL_SINGLE_STEP_0_SET_2" }, + { 1027, "MPL_SINGLE_STEP_0_SET_3" }, + { 1028, "MPL_SINGLE_STEP_0" }, + { 1029, "SINGLE_STEP_CONTROL_0" }, + { 1280, "MPL_IDN_COMPLETE_SET_0" }, + { 1281, "MPL_IDN_COMPLETE_SET_1" }, + { 1282, "MPL_IDN_COMPLETE_SET_2" }, + { 1283, "MPL_IDN_COMPLETE_SET_3" }, + { 1284, "MPL_IDN_COMPLETE" }, + { 1285, "IDN_COMPLETE_PENDING" }, + { 1536, "MPL_UDN_COMPLETE_SET_0" }, + { 1537, "MPL_UDN_COMPLETE_SET_1" }, + { 1538, "MPL_UDN_COMPLETE_SET_2" }, + { 1539, "MPL_UDN_COMPLETE_SET_3" }, + { 1540, "MPL_UDN_COMPLETE" }, + { 1541, "UDN_COMPLETE_PENDING" }, + { 1792, "MPL_ITLB_MISS_SET_0" }, + { 1793, "MPL_ITLB_MISS_SET_1" }, + { 1794, "MPL_ITLB_MISS_SET_2" }, + { 1795, "MPL_ITLB_MISS_SET_3" }, + { 1796, "MPL_ITLB_MISS" }, + { 1797, "ITLB_TSB_BASE_ADDR_0" }, + { 1798, "ITLB_TSB_BASE_ADDR_1" }, + { 1920, "ITLB_CURRENT_ATTR" }, + { 1921, "ITLB_CURRENT_PA" }, + { 1922, "ITLB_CURRENT_VA" }, + { 1923, "ITLB_INDEX" }, + { 1924, "ITLB_MATCH_0" }, + { 1925, "ITLB_PERF" }, + { 1926, "ITLB_PR" }, + { 1927, "ITLB_TSB_ADDR_0" }, + { 1928, "ITLB_TSB_ADDR_1" }, + { 1929, "ITLB_TSB_FILL_CURRENT_ATTR" }, + { 1930, "ITLB_TSB_FILL_MATCH" }, + { 1931, "NUMBER_ITLB" }, + { 1932, "REPLACEMENT_ITLB" }, + { 1933, "WIRED_ITLB" }, + { 2048, "MPL_ILL_SET_0" }, + { 2049, "MPL_ILL_SET_1" }, + { 2050, "MPL_ILL_SET_2" }, + { 2051, "MPL_ILL_SET_3" }, + { 2052, "MPL_ILL" }, + { 2304, "MPL_GPV_SET_0" }, + { 2305, "MPL_GPV_SET_1" }, + { 2306, "MPL_GPV_SET_2" }, + { 2307, "MPL_GPV_SET_3" }, + { 2308, "MPL_GPV" }, + { 2309, "GPV_REASON" }, + { 2560, "MPL_IDN_ACCESS_SET_0" }, + { 2561, "MPL_IDN_ACCESS_SET_1" }, + { 2562, "MPL_IDN_ACCESS_SET_2" }, + { 2563, "MPL_IDN_ACCESS_SET_3" }, + { 2564, "MPL_IDN_ACCESS" }, + { 2565, "IDN_DEMUX_COUNT_0" }, + { 2566, "IDN_DEMUX_COUNT_1" }, + { 2567, "IDN_FLUSH_EGRESS" }, + { 2568, "IDN_PENDING" }, + { 2569, "IDN_ROUTE_ORDER" }, + { 2570, "IDN_SP_FIFO_CNT" }, + { 2688, "IDN_DATA_AVAIL" }, + { 2816, "MPL_UDN_ACCESS_SET_0" }, + { 2817, "MPL_UDN_ACCESS_SET_1" }, + { 2818, "MPL_UDN_ACCESS_SET_2" }, + { 2819, "MPL_UDN_ACCESS_SET_3" }, + { 2820, "MPL_UDN_ACCESS" }, + { 2821, "UDN_DEMUX_COUNT_0" }, + { 2822, "UDN_DEMUX_COUNT_1" }, + { 2823, "UDN_DEMUX_COUNT_2" }, + { 2824, "UDN_DEMUX_COUNT_3" }, + { 2825, "UDN_FLUSH_EGRESS" }, + { 2826, "UDN_PENDING" }, + { 2827, "UDN_ROUTE_ORDER" }, + { 2828, "UDN_SP_FIFO_CNT" }, + { 2944, "UDN_DATA_AVAIL" }, + { 3072, "MPL_SWINT_3_SET_0" }, + { 3073, "MPL_SWINT_3_SET_1" }, + { 3074, "MPL_SWINT_3_SET_2" }, + { 3075, "MPL_SWINT_3_SET_3" }, + { 3076, "MPL_SWINT_3" }, + { 3328, "MPL_SWINT_2_SET_0" }, + { 3329, "MPL_SWINT_2_SET_1" }, + { 3330, "MPL_SWINT_2_SET_2" }, + { 3331, "MPL_SWINT_2_SET_3" }, + { 3332, "MPL_SWINT_2" }, + { 3584, "MPL_SWINT_1_SET_0" }, + { 3585, "MPL_SWINT_1_SET_1" }, + { 3586, "MPL_SWINT_1_SET_2" }, + { 3587, "MPL_SWINT_1_SET_3" }, + { 3588, "MPL_SWINT_1" }, + { 3840, "MPL_SWINT_0_SET_0" }, + { 3841, "MPL_SWINT_0_SET_1" }, + { 3842, "MPL_SWINT_0_SET_2" }, + { 3843, "MPL_SWINT_0_SET_3" }, + { 3844, "MPL_SWINT_0" }, + { 4096, "MPL_ILL_TRANS_SET_0" }, + { 4097, "MPL_ILL_TRANS_SET_1" }, + { 4098, "MPL_ILL_TRANS_SET_2" }, + { 4099, "MPL_ILL_TRANS_SET_3" }, + { 4100, "MPL_ILL_TRANS" }, + { 4101, "ILL_TRANS_REASON" }, + { 4102, "ILL_VA_PC" }, + { 4352, "MPL_UNALIGN_DATA_SET_0" }, + { 4353, "MPL_UNALIGN_DATA_SET_1" }, + { 4354, "MPL_UNALIGN_DATA_SET_2" }, + { 4355, "MPL_UNALIGN_DATA_SET_3" }, + { 4356, "MPL_UNALIGN_DATA" }, + { 4608, "MPL_DTLB_MISS_SET_0" }, + { 4609, "MPL_DTLB_MISS_SET_1" }, + { 4610, "MPL_DTLB_MISS_SET_2" }, + { 4611, "MPL_DTLB_MISS_SET_3" }, + { 4612, "MPL_DTLB_MISS" }, + { 4613, "DTLB_TSB_BASE_ADDR_0" }, + { 4614, "DTLB_TSB_BASE_ADDR_1" }, + { 4736, "AAR" }, + { 4737, "CACHE_PINNED_WAYS" }, + { 4738, "DTLB_BAD_ADDR" }, + { 4739, "DTLB_BAD_ADDR_REASON" }, + { 4740, "DTLB_CURRENT_ATTR" }, + { 4741, "DTLB_CURRENT_PA" }, + { 4742, "DTLB_CURRENT_VA" }, + { 4743, "DTLB_INDEX" }, + { 4744, "DTLB_MATCH_0" }, + { 4745, "DTLB_PERF" }, + { 4746, "DTLB_TSB_ADDR_0" }, + { 4747, "DTLB_TSB_ADDR_1" }, + { 4748, "DTLB_TSB_FILL_CURRENT_ATTR" }, + { 4749, "DTLB_TSB_FILL_MATCH" }, + { 4750, "NUMBER_DTLB" }, + { 4751, "REPLACEMENT_DTLB" }, + { 4752, "WIRED_DTLB" }, + { 4864, "MPL_DTLB_ACCESS_SET_0" }, + { 4865, "MPL_DTLB_ACCESS_SET_1" }, + { 4866, "MPL_DTLB_ACCESS_SET_2" }, + { 4867, "MPL_DTLB_ACCESS_SET_3" }, + { 4868, "MPL_DTLB_ACCESS" }, + { 5120, "MPL_IDN_FIREWALL_SET_0" }, + { 5121, "MPL_IDN_FIREWALL_SET_1" }, + { 5122, "MPL_IDN_FIREWALL_SET_2" }, + { 5123, "MPL_IDN_FIREWALL_SET_3" }, + { 5124, "MPL_IDN_FIREWALL" }, + { 5125, "IDN_DIRECTION_PROTECT" }, + { 5376, "MPL_UDN_FIREWALL_SET_0" }, + { 5377, "MPL_UDN_FIREWALL_SET_1" }, + { 5378, "MPL_UDN_FIREWALL_SET_2" }, + { 5379, "MPL_UDN_FIREWALL_SET_3" }, + { 5380, "MPL_UDN_FIREWALL" }, + { 5381, "UDN_DIRECTION_PROTECT" }, + { 5632, "MPL_TILE_TIMER_SET_0" }, + { 5633, "MPL_TILE_TIMER_SET_1" }, + { 5634, "MPL_TILE_TIMER_SET_2" }, + { 5635, "MPL_TILE_TIMER_SET_3" }, + { 5636, "MPL_TILE_TIMER" }, + { 5637, "TILE_TIMER_CONTROL" }, + { 5888, "MPL_AUX_TILE_TIMER_SET_0" }, + { 5889, "MPL_AUX_TILE_TIMER_SET_1" }, + { 5890, "MPL_AUX_TILE_TIMER_SET_2" }, + { 5891, "MPL_AUX_TILE_TIMER_SET_3" }, + { 5892, "MPL_AUX_TILE_TIMER" }, + { 5893, "AUX_TILE_TIMER_CONTROL" }, + { 6144, "MPL_IDN_TIMER_SET_0" }, + { 6145, "MPL_IDN_TIMER_SET_1" }, + { 6146, "MPL_IDN_TIMER_SET_2" }, + { 6147, "MPL_IDN_TIMER_SET_3" }, + { 6148, "MPL_IDN_TIMER" }, + { 6149, "IDN_DEADLOCK_COUNT" }, + { 6150, "IDN_DEADLOCK_TIMEOUT" }, + { 6400, "MPL_UDN_TIMER_SET_0" }, + { 6401, "MPL_UDN_TIMER_SET_1" }, + { 6402, "MPL_UDN_TIMER_SET_2" }, + { 6403, "MPL_UDN_TIMER_SET_3" }, + { 6404, "MPL_UDN_TIMER" }, + { 6405, "UDN_DEADLOCK_COUNT" }, + { 6406, "UDN_DEADLOCK_TIMEOUT" }, + { 6656, "MPL_IDN_AVAIL_SET_0" }, + { 6657, "MPL_IDN_AVAIL_SET_1" }, + { 6658, "MPL_IDN_AVAIL_SET_2" }, + { 6659, "MPL_IDN_AVAIL_SET_3" }, + { 6660, "MPL_IDN_AVAIL" }, + { 6661, "IDN_AVAIL_EN" }, + { 6912, "MPL_UDN_AVAIL_SET_0" }, + { 6913, "MPL_UDN_AVAIL_SET_1" }, + { 6914, "MPL_UDN_AVAIL_SET_2" }, + { 6915, "MPL_UDN_AVAIL_SET_3" }, + { 6916, "MPL_UDN_AVAIL" }, + { 6917, "UDN_AVAIL_EN" }, + { 7168, "MPL_IPI_3_SET_0" }, + { 7169, "MPL_IPI_3_SET_1" }, + { 7170, "MPL_IPI_3_SET_2" }, + { 7171, "MPL_IPI_3_SET_3" }, + { 7172, "MPL_IPI_3" }, + { 7173, "IPI_EVENT_3" }, + { 7174, "IPI_EVENT_RESET_3" }, + { 7175, "IPI_EVENT_SET_3" }, + { 7176, "IPI_MASK_3" }, + { 7177, "IPI_MASK_RESET_3" }, + { 7178, "IPI_MASK_SET_3" }, + { 7424, "MPL_IPI_2_SET_0" }, + { 7425, "MPL_IPI_2_SET_1" }, + { 7426, "MPL_IPI_2_SET_2" }, + { 7427, "MPL_IPI_2_SET_3" }, + { 7428, "MPL_IPI_2" }, + { 7429, "IPI_EVENT_2" }, + { 7430, "IPI_EVENT_RESET_2" }, + { 7431, "IPI_EVENT_SET_2" }, + { 7432, "IPI_MASK_2" }, + { 7433, "IPI_MASK_RESET_2" }, + { 7434, "IPI_MASK_SET_2" }, + { 7680, "MPL_IPI_1_SET_0" }, + { 7681, "MPL_IPI_1_SET_1" }, + { 7682, "MPL_IPI_1_SET_2" }, + { 7683, "MPL_IPI_1_SET_3" }, + { 7684, "MPL_IPI_1" }, + { 7685, "IPI_EVENT_1" }, + { 7686, "IPI_EVENT_RESET_1" }, + { 7687, "IPI_EVENT_SET_1" }, + { 7688, "IPI_MASK_1" }, + { 7689, "IPI_MASK_RESET_1" }, + { 7690, "IPI_MASK_SET_1" }, + { 7936, "MPL_IPI_0_SET_0" }, + { 7937, "MPL_IPI_0_SET_1" }, + { 7938, "MPL_IPI_0_SET_2" }, + { 7939, "MPL_IPI_0_SET_3" }, + { 7940, "MPL_IPI_0" }, + { 7941, "IPI_EVENT_0" }, + { 7942, "IPI_EVENT_RESET_0" }, + { 7943, "IPI_EVENT_SET_0" }, + { 7944, "IPI_MASK_0" }, + { 7945, "IPI_MASK_RESET_0" }, + { 7946, "IPI_MASK_SET_0" }, + { 8192, "MPL_PERF_COUNT_SET_0" }, + { 8193, "MPL_PERF_COUNT_SET_1" }, + { 8194, "MPL_PERF_COUNT_SET_2" }, + { 8195, "MPL_PERF_COUNT_SET_3" }, + { 8196, "MPL_PERF_COUNT" }, + { 8197, "PERF_COUNT_0" }, + { 8198, "PERF_COUNT_1" }, + { 8199, "PERF_COUNT_CTL" }, + { 8200, "PERF_COUNT_DN_CTL" }, + { 8201, "PERF_COUNT_STS" }, + { 8202, "WATCH_MASK" }, + { 8203, "WATCH_VAL" }, + { 8448, "MPL_AUX_PERF_COUNT_SET_0" }, + { 8449, "MPL_AUX_PERF_COUNT_SET_1" }, + { 8450, "MPL_AUX_PERF_COUNT_SET_2" }, + { 8451, "MPL_AUX_PERF_COUNT_SET_3" }, + { 8452, "MPL_AUX_PERF_COUNT" }, + { 8453, "AUX_PERF_COUNT_0" }, + { 8454, "AUX_PERF_COUNT_1" }, + { 8455, "AUX_PERF_COUNT_CTL" }, + { 8456, "AUX_PERF_COUNT_STS" }, + { 8704, "MPL_INTCTRL_3_SET_0" }, + { 8705, "MPL_INTCTRL_3_SET_1" }, + { 8706, "MPL_INTCTRL_3_SET_2" }, + { 8707, "MPL_INTCTRL_3_SET_3" }, + { 8708, "MPL_INTCTRL_3" }, + { 8709, "INTCTRL_3_STATUS" }, + { 8710, "INTERRUPT_MASK_3" }, + { 8711, "INTERRUPT_MASK_RESET_3" }, + { 8712, "INTERRUPT_MASK_SET_3" }, + { 8713, "INTERRUPT_VECTOR_BASE_3" }, + { 8714, "SINGLE_STEP_EN_0_3" }, + { 8715, "SINGLE_STEP_EN_1_3" }, + { 8716, "SINGLE_STEP_EN_2_3" }, + { 8717, "SINGLE_STEP_EN_3_3" }, + { 8832, "EX_CONTEXT_3_0" }, + { 8833, "EX_CONTEXT_3_1" }, + { 8834, "SYSTEM_SAVE_3_0" }, + { 8835, "SYSTEM_SAVE_3_1" }, + { 8836, "SYSTEM_SAVE_3_2" }, + { 8837, "SYSTEM_SAVE_3_3" }, + { 8960, "MPL_INTCTRL_2_SET_0" }, + { 8961, "MPL_INTCTRL_2_SET_1" }, + { 8962, "MPL_INTCTRL_2_SET_2" }, + { 8963, "MPL_INTCTRL_2_SET_3" }, + { 8964, "MPL_INTCTRL_2" }, + { 8965, "INTCTRL_2_STATUS" }, + { 8966, "INTERRUPT_MASK_2" }, + { 8967, "INTERRUPT_MASK_RESET_2" }, + { 8968, "INTERRUPT_MASK_SET_2" }, + { 8969, "INTERRUPT_VECTOR_BASE_2" }, + { 8970, "SINGLE_STEP_EN_0_2" }, + { 8971, "SINGLE_STEP_EN_1_2" }, + { 8972, "SINGLE_STEP_EN_2_2" }, + { 8973, "SINGLE_STEP_EN_3_2" }, + { 9088, "EX_CONTEXT_2_0" }, + { 9089, "EX_CONTEXT_2_1" }, + { 9090, "SYSTEM_SAVE_2_0" }, + { 9091, "SYSTEM_SAVE_2_1" }, + { 9092, "SYSTEM_SAVE_2_2" }, + { 9093, "SYSTEM_SAVE_2_3" }, + { 9216, "MPL_INTCTRL_1_SET_0" }, + { 9217, "MPL_INTCTRL_1_SET_1" }, + { 9218, "MPL_INTCTRL_1_SET_2" }, + { 9219, "MPL_INTCTRL_1_SET_3" }, + { 9220, "MPL_INTCTRL_1" }, + { 9221, "INTCTRL_1_STATUS" }, + { 9222, "INTERRUPT_MASK_1" }, + { 9223, "INTERRUPT_MASK_RESET_1" }, + { 9224, "INTERRUPT_MASK_SET_1" }, + { 9225, "INTERRUPT_VECTOR_BASE_1" }, + { 9226, "SINGLE_STEP_EN_0_1" }, + { 9227, "SINGLE_STEP_EN_1_1" }, + { 9228, "SINGLE_STEP_EN_2_1" }, + { 9229, "SINGLE_STEP_EN_3_1" }, + { 9344, "EX_CONTEXT_1_0" }, + { 9345, "EX_CONTEXT_1_1" }, + { 9346, "SYSTEM_SAVE_1_0" }, + { 9347, "SYSTEM_SAVE_1_1" }, + { 9348, "SYSTEM_SAVE_1_2" }, + { 9349, "SYSTEM_SAVE_1_3" }, + { 9472, "MPL_INTCTRL_0_SET_0" }, + { 9473, "MPL_INTCTRL_0_SET_1" }, + { 9474, "MPL_INTCTRL_0_SET_2" }, + { 9475, "MPL_INTCTRL_0_SET_3" }, + { 9476, "MPL_INTCTRL_0" }, + { 9477, "INTCTRL_0_STATUS" }, + { 9478, "INTERRUPT_MASK_0" }, + { 9479, "INTERRUPT_MASK_RESET_0" }, + { 9480, "INTERRUPT_MASK_SET_0" }, + { 9481, "INTERRUPT_VECTOR_BASE_0" }, + { 9482, "SINGLE_STEP_EN_0_0" }, + { 9483, "SINGLE_STEP_EN_1_0" }, + { 9484, "SINGLE_STEP_EN_2_0" }, + { 9485, "SINGLE_STEP_EN_3_0" }, + { 9600, "EX_CONTEXT_0_0" }, + { 9601, "EX_CONTEXT_0_1" }, + { 9602, "SYSTEM_SAVE_0_0" }, + { 9603, "SYSTEM_SAVE_0_1" }, + { 9604, "SYSTEM_SAVE_0_2" }, + { 9605, "SYSTEM_SAVE_0_3" }, + { 9728, "MPL_BOOT_ACCESS_SET_0" }, + { 9729, "MPL_BOOT_ACCESS_SET_1" }, + { 9730, "MPL_BOOT_ACCESS_SET_2" }, + { 9731, "MPL_BOOT_ACCESS_SET_3" }, + { 9732, "MPL_BOOT_ACCESS" }, + { 9733, "BIG_ENDIAN_CONFIG" }, + { 9734, "CACHE_INVALIDATION_COMPRESSION_MODE" }, + { 9735, "CACHE_INVALIDATION_MASK_0" }, + { 9736, "CACHE_INVALIDATION_MASK_1" }, + { 9737, "CACHE_INVALIDATION_MASK_2" }, + { 9738, "CBOX_CACHEASRAM_CONFIG" }, + { 9739, "CBOX_CACHE_CONFIG" }, + { 9740, "CBOX_HOME_MAP_ADDR" }, + { 9741, "CBOX_HOME_MAP_DATA" }, + { 9742, "CBOX_MMAP_0" }, + { 9743, "CBOX_MMAP_1" }, + { 9744, "CBOX_MMAP_2" }, + { 9745, "CBOX_MMAP_3" }, + { 9746, "CBOX_MSR" }, + { 9747, "DIAG_BCST_CTL" }, + { 9748, "DIAG_BCST_MASK" }, + { 9749, "DIAG_BCST_TRIGGER" }, + { 9750, "DIAG_MUX_CTL" }, + { 9751, "DIAG_TRACE_CTL" }, + { 9752, "DIAG_TRACE_DATA" }, + { 9753, "DIAG_TRACE_STS" }, + { 9754, "IDN_DEMUX_BUF_THRESH" }, + { 9755, "L1_I_PIN_WAY_0" }, + { 9756, "MEM_ROUTE_ORDER" }, + { 9757, "MEM_STRIPE_CONFIG" }, + { 9758, "PERF_COUNT_PLS" }, + { 9759, "PSEUDO_RANDOM_NUMBER_MODIFY" }, + { 9760, "QUIESCE_CTL" }, + { 9761, "RSHIM_COORD" }, + { 9762, "SBOX_CONFIG" }, + { 9763, "UDN_DEMUX_BUF_THRESH" }, + { 9764, "XDN_CORE_STARVATION_COUNT" }, + { 9765, "XDN_ROUND_ROBIN_ARB_CTL" }, + { 9856, "CYCLE_MODIFY" }, + { 9857, "I_AAR" }, + { 9984, "MPL_WORLD_ACCESS_SET_0" }, + { 9985, "MPL_WORLD_ACCESS_SET_1" }, + { 9986, "MPL_WORLD_ACCESS_SET_2" }, + { 9987, "MPL_WORLD_ACCESS_SET_3" }, + { 9988, "MPL_WORLD_ACCESS" }, + { 9989, "DONE" }, + { 9990, "DSTREAM_PF" }, + { 9991, "FAIL" }, + { 9992, "INTERRUPT_CRITICAL_SECTION" }, + { 9993, "PASS" }, + { 9994, "PSEUDO_RANDOM_NUMBER" }, + { 9995, "TILE_COORD" }, + { 9996, "TILE_RTF_HWM" }, + { 10112, "CMPEXCH_VALUE" }, + { 10113, "CYCLE" }, + { 10114, "EVENT_BEGIN" }, + { 10115, "EVENT_END" }, + { 10116, "PROC_STATUS" }, + { 10117, "SIM_CONTROL" }, + { 10118, "SIM_SOCKET" }, + { 10119, "STATUS_SATURATE" }, + { 10240, "MPL_I_ASID_SET_0" }, + { 10241, "MPL_I_ASID_SET_1" }, + { 10242, "MPL_I_ASID_SET_2" }, + { 10243, "MPL_I_ASID_SET_3" }, + { 10244, "MPL_I_ASID" }, + { 10245, "I_ASID" }, + { 10496, "MPL_D_ASID_SET_0" }, + { 10497, "MPL_D_ASID_SET_1" }, + { 10498, "MPL_D_ASID_SET_2" }, + { 10499, "MPL_D_ASID_SET_3" }, + { 10500, "MPL_D_ASID" }, + { 10501, "D_ASID" }, + { 10752, "MPL_DOUBLE_FAULT_SET_0" }, + { 10753, "MPL_DOUBLE_FAULT_SET_1" }, + { 10754, "MPL_DOUBLE_FAULT_SET_2" }, + { 10755, "MPL_DOUBLE_FAULT_SET_3" }, + { 10756, "MPL_DOUBLE_FAULT" }, + { 10757, "LAST_INTERRUPT_REASON" }, +}; + +const int tilegx_num_sprs = 441; + +#endif /* DISASM_ONLY */ + +#ifndef DISASM_ONLY + +#include + +static int +tilegx_spr_compare (const void *a_ptr, const void *b_ptr) +{ + const struct tilegx_spr *a = (const struct tilegx_spr *) a_ptr; + const struct tilegx_spr *b = (const struct tilegx_spr *) b_ptr; + return (a->number - b->number); +} + +const char * +get_tilegx_spr_name (int num) +{ + void *result; + struct tilegx_spr key; + + key.number = num; + result = bsearch ((const void *) &key, (const void *) tilegx_sprs, + tilegx_num_sprs, sizeof (struct tilegx_spr), + tilegx_spr_compare); + + if (result == NULL) + return NULL; + + { + struct tilegx_spr *result_ptr = (struct tilegx_spr *) result; + + return result_ptr->name; + } +} + +/* Canonical name of each register. */ +const char * const tilegx_register_names[] = +{ + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", + "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", + "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", + "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", + "r48", "r49", "r50", "r51", "r52", "tp", "sp", "lr", + "sn", "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero" +}; + +#endif /* not DISASM_ONLY */ + + +/* Given a set of bundle bits and the lookup FSM for a specific pipe, + returns which instruction the bundle contains in that pipe. */ + +static const struct tilegx_opcode * +find_opcode (tilegx_bundle_bits bits, const unsigned short *table) +{ + int i = 0; + + while (1) + { + unsigned short bitspec = table[i]; + unsigned int bitfield = + ((unsigned int)(bits >> (bitspec & 63))) & (bitspec >> 6); + + unsigned short next = table[i + 1 + bitfield]; + if (next <= TILEGX_OPC_NONE) + return & tilegx_opcodes[next]; + + i = next - TILEGX_OPC_NONE; + } +} + +int +parse_insn_tilegx (tilegx_bundle_bits bits, + unsigned long long pc, + struct tilegx_decoded_instruction + decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]) +{ + int num_instructions = 0; + int pipe; + int min_pipe, max_pipe; + + if ((bits & TILEGX_BUNDLE_MODE_MASK) == 0) + { + min_pipe = TILEGX_PIPELINE_X0; + max_pipe = TILEGX_PIPELINE_X1; + } + else + { + min_pipe = TILEGX_PIPELINE_Y0; + max_pipe = TILEGX_PIPELINE_Y2; + } + + /* For each pipe, find an instruction that fits. */ + for (pipe = min_pipe; pipe <= max_pipe; pipe++) + { + const struct tilegx_opcode *opc; + struct tilegx_decoded_instruction *d; + int i; + + d = &decoded[num_instructions++]; + opc = find_opcode (bits, tilegx_bundle_decoder_fsms[pipe]); + d->opcode = opc; + + /* Decode each operand, sign extending, etc. as appropriate. */ + for (i = 0; i < opc->num_operands; i++) + { + const struct tilegx_operand *op = + &tilegx_operands[opc->operands[pipe][i]]; + int raw_opval = op->extract (bits); + long long opval; + + if (op->is_signed) + { + /* Sign-extend the operand. */ + int shift = (int)((sizeof(int) * 8) - op->num_bits); + raw_opval = (raw_opval << shift) >> shift; + } + + /* Adjust PC-relative scaled branch offsets. */ + if (op->type == TILEGX_OP_TYPE_ADDRESS) + opval = (raw_opval * TILEGX_BUNDLE_SIZE_IN_BYTES) + pc; + else + opval = raw_opval; + + /* Record the final value. */ + d->operands[i] = op; + d->operand_values[i] = opval; + } + } + + return num_instructions; +} diff --git a/opcodes/tilepro-dis.c b/opcodes/tilepro-dis.c new file mode 100644 index 0000000..bf9910c --- /dev/null +++ b/opcodes/tilepro-dis.c @@ -0,0 +1,232 @@ +/* tilepro-dis.c. Disassembly routines for the TILEPro architecture. + Copyright 2011 Free Software Foundation, Inc. + + This file is part of the GNU opcodes library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include +#include +#include "bfd.h" +#include "elf/tilepro.h" +#include "elf-bfd.h" +#include "sysdep.h" +#include "dis-asm.h" +#include "opcode/tilepro.h" + + +#define TREG_ZERO 63 + +static int +contains_insn (tilepro_mnemonic expected_mnemonic, + int expected_first_operand, + int expected_second_operand, + bfd_vma memaddr, + int *last_operand_ret, + disassemble_info *info) +{ + struct tilepro_decoded_instruction + decoded[TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE]; + bfd_byte opbuf[TILEPRO_BUNDLE_SIZE_IN_BYTES]; + int i, num_instructions; + + if ((*info->read_memory_func) (memaddr, opbuf, + TILEPRO_BUNDLE_SIZE_IN_BYTES, info) != 0) + /* If we cannot even read the memory, it obviously does not have the + instruction for which we are looking. */ + return 0; + + /* Parse the instructions in the bundle. */ + num_instructions = parse_insn_tilepro (bfd_getl64 (opbuf), memaddr, decoded); + + for (i = 0; i < num_instructions; i++) + { + const struct tilepro_opcode *opcode = decoded[i].opcode; + + if (opcode->mnemonic != expected_mnemonic) + continue; + + if (expected_first_operand != -1 + && decoded[i].operand_values[0] != expected_first_operand) + continue; + + if (expected_second_operand != -1 + && decoded[i].operand_values[1] != expected_second_operand) + continue; + + *last_operand_ret = decoded[i].operand_values[opcode->num_operands - 1]; + return 1; + } + + /* No match. */ + return 0; +} + + +int +print_insn_tilepro (bfd_vma memaddr, disassemble_info *info) +{ + struct tilepro_decoded_instruction + decoded[TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE]; + bfd_byte opbuf[TILEPRO_BUNDLE_SIZE_IN_BYTES]; + int status, i, num_instructions, num_printed; + tilepro_mnemonic padding_mnemonic; + + status = (*info->read_memory_func) (memaddr, opbuf, + TILEPRO_BUNDLE_SIZE_IN_BYTES, info); + if (status != 0) + { + (*info->memory_error_func) (status, memaddr, info); + return -1; + } + + info->bytes_per_line = TILEPRO_BUNDLE_SIZE_IN_BYTES; + info->bytes_per_chunk = TILEPRO_BUNDLE_SIZE_IN_BYTES; + info->octets_per_byte = 1; + info->display_endian = BFD_ENDIAN_LITTLE; + + /* Parse the instructions in the bundle. */ + num_instructions = parse_insn_tilepro (bfd_getl64 (opbuf), memaddr, decoded); + + /* Print the instructions in the bundle. */ + info->fprintf_func (info->stream, "{ "); + num_printed = 0; + + /* Determine which nop opcode is used for padding and should be skipped. */ + padding_mnemonic = TILEPRO_OPC_FNOP; + for (i = 0; i < num_instructions; i++) + { + if (!decoded[i].opcode->can_bundle) + { + /* Instructions that cannot be bundled are padded out with nops, + rather than fnops. Displaying them is always clutter. */ + padding_mnemonic = TILEPRO_OPC_NOP; + break; + } + } + + for (i = 0; i < num_instructions; i++) + { + const struct tilepro_opcode *opcode = decoded[i].opcode; + const char *name; + int j; + + /* Do not print out fnops, unless everything is an fnop, in + which case we will print out just the last one. */ + if (opcode->mnemonic == padding_mnemonic + && (num_printed > 0 || i + 1 < num_instructions)) + continue; + + if (num_printed > 0) + info->fprintf_func (info->stream, " ; "); + ++num_printed; + + name = opcode->name; + if (name == NULL) + name = ""; + info->fprintf_func (info->stream, "%s", name); + + for (j = 0; j < opcode->num_operands; j++) + { + int num; + const struct tilepro_operand *op; + const char *spr_name; + + if (j > 0) + info->fprintf_func (info->stream, ","); + info->fprintf_func (info->stream, " "); + + num = decoded[i].operand_values[j]; + + op = decoded[i].operands[j]; + switch (op->type) + { + case TILEPRO_OP_TYPE_REGISTER: + info->fprintf_func (info->stream, "%s", + tilepro_register_names[num]); + break; + + case TILEPRO_OP_TYPE_SPR: + spr_name = get_tilepro_spr_name(num); + if (spr_name != NULL) + info->fprintf_func (info->stream, "%s", spr_name); + else + info->fprintf_func (info->stream, "%d", num); + break; + + case TILEPRO_OP_TYPE_IMMEDIATE: + { + bfd_vma addr = 0; + int found_addr = 0; + int addr_piece; + + switch (opcode->mnemonic) + { + case TILEPRO_OPC_ADDLI: + if (contains_insn (TILEPRO_OPC_AULI, + decoded[i].operand_values[1], + TREG_ZERO, + memaddr - TILEPRO_BUNDLE_SIZE_IN_BYTES, + &addr_piece, + info)) + { + addr = num + (addr_piece << 16); + found_addr = 1; + } + break; + + case TILEPRO_OPC_AULI: + if (contains_insn (TILEPRO_OPC_MOVELI, + decoded[i].operand_values[1], + -1, + memaddr - TILEPRO_BUNDLE_SIZE_IN_BYTES, + &addr_piece, + info)) + { + addr = (num << 16) + addr_piece; + found_addr = 1; + } + break; + + default: + /* Operand does not look like a constructed address. */ + break; + } + + info->fprintf_func (info->stream, "%d", num); + + if (found_addr) + { + info->fprintf_func (info->stream, " /* "); + info->print_address_func (addr, info); + info->fprintf_func (info->stream, " */"); + } + } + break; + + case TILEPRO_OP_TYPE_ADDRESS: + info->print_address_func ((bfd_vma)(unsigned int) num, info); + break; + + default: + abort (); + } + } + } + info->fprintf_func (info->stream, " }"); + + return TILEPRO_BUNDLE_SIZE_IN_BYTES; +} diff --git a/opcodes/tilepro-opc.c b/opcodes/tilepro-opc.c new file mode 100644 index 0000000..c3f6be4 --- /dev/null +++ b/opcodes/tilepro-opc.c @@ -0,0 +1,10183 @@ +/* TILEPro opcode information. + + Copyright 2011 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +/* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else. */ +#define BFD_RELOC(x) BFD_RELOC_##x + +#include "bfd.h" + +/* Special registers. */ +#define TREG_LR 55 +#define TREG_SN 56 +#define TREG_ZERO 63 + +#if defined(__KERNEL__) || defined(_LIBC) +/* FIXME: Rename this. */ +#include +#define DISASM_ONLY +#else +#include "opcode/tilepro.h" +#endif + +#ifdef __KERNEL__ +#include +#else +#include +#endif + +const struct tilepro_opcode tilepro_opcodes[395] = +{ + { "bpt", TILEPRO_OPC_BPT, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbffffff80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b3cae00000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "info", TILEPRO_OPC_INFO, 0xf, 1, TREG_ZERO, 1, + { { 0 }, { 1 }, { 2 }, { 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00fffULL, + 0xfff807ff80000000ULL, + 0x8000000078000fffULL, + 0xf80007ff80000000ULL, + 0ULL + }, + { + 0x0000000050100fffULL, + 0x302007ff80000000ULL, + 0x8000000050000fffULL, + 0xc00007ff80000000ULL, + -1ULL + } +#endif + }, + { "infol", TILEPRO_OPC_INFOL, 0x3, 1, TREG_ZERO, 1, + { { 4 }, { 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x8000000070000fffULL, + 0xf80007ff80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000030000fffULL, + 0x200007ff80000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "j", TILEPRO_OPC_J, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 6 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xf000000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x5000000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "jal", TILEPRO_OPC_JAL, 0x2, 1, TREG_LR, 1, + { { 0, }, { 6 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xf000000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x6000000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "move", TILEPRO_OPC_MOVE, 0xf, 2, TREG_ZERO, 1, + { { 7, 8 }, { 9, 10 }, { 11, 12 }, { 13, 14 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0xfffff80000000000ULL, + 0x80000000780ff000ULL, + 0xf807f80000000000ULL, + 0ULL + }, + { + 0x0000000000cff000ULL, + 0x0833f80000000000ULL, + 0x80000000180bf000ULL, + 0x9805f80000000000ULL, + -1ULL + } +#endif + }, + { "move.sn", TILEPRO_OPC_MOVE_SN, 0x3, 2, TREG_SN, 1, + { { 7, 8 }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008cff000ULL, + 0x0c33f80000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "movei", TILEPRO_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1, + { { 7, 0 }, { 9, 1 }, { 11, 2 }, { 13, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00fc0ULL, + 0xfff807e000000000ULL, + 0x8000000078000fc0ULL, + 0xf80007e000000000ULL, + 0ULL + }, + { + 0x0000000040800fc0ULL, + 0x305807e000000000ULL, + 0x8000000058000fc0ULL, + 0xc80007e000000000ULL, + -1ULL + } +#endif + }, + { "movei.sn", TILEPRO_OPC_MOVEI_SN, 0x3, 2, TREG_SN, 1, + { { 7, 0 }, { 9, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00fc0ULL, + 0xfff807e000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048800fc0ULL, + 0x345807e000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "moveli", TILEPRO_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1, + { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x8000000070000fc0ULL, + 0xf80007e000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000020000fc0ULL, + 0x180007e000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "moveli.sn", TILEPRO_OPC_MOVELI_SN, 0x3, 2, TREG_SN, 1, + { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x8000000070000fc0ULL, + 0xf80007e000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000010000fc0ULL, + 0x100007e000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "movelis", TILEPRO_OPC_MOVELIS, 0x3, 2, TREG_SN, 1, + { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x8000000070000fc0ULL, + 0xf80007e000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000010000fc0ULL, + 0x100007e000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "prefetch", TILEPRO_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 15 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff81f80000000ULL, + 0ULL, + 0ULL, + 0x8700000003f00000ULL + }, + { + -1ULL, + 0x400b501f80000000ULL, + -1ULL, + -1ULL, + 0x8000000003f00000ULL + } +#endif + }, + { "raise", TILEPRO_OPC_RAISE, 0x2, 0, TREG_ZERO, 1, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbffffff80000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b3cae80000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "add", TILEPRO_OPC_ADD, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x00000000000c0000ULL, + 0x0806000000000000ULL, + 0x8000000008000000ULL, + 0x8800000000000000ULL, + -1ULL + } +#endif + }, + { "add.sn", TILEPRO_OPC_ADD_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000080c0000ULL, + 0x0c06000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addb", TILEPRO_OPC_ADDB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000040000ULL, + 0x0802000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addb.sn", TILEPRO_OPC_ADDB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008040000ULL, + 0x0c02000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addbs_u", TILEPRO_OPC_ADDBS_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001880000ULL, + 0x0888000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addbs_u.sn", TILEPRO_OPC_ADDBS_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009880000ULL, + 0x0c88000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addh", TILEPRO_OPC_ADDH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000080000ULL, + 0x0804000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addh.sn", TILEPRO_OPC_ADDH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008080000ULL, + 0x0c04000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addhs", TILEPRO_OPC_ADDHS, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000018c0000ULL, + 0x088a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addhs.sn", TILEPRO_OPC_ADDHS_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000098c0000ULL, + 0x0c8a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addi", TILEPRO_OPC_ADDI, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0x8000000078000000ULL, + 0xf800000000000000ULL, + 0ULL + }, + { + 0x0000000040300000ULL, + 0x3018000000000000ULL, + 0x8000000048000000ULL, + 0xb800000000000000ULL, + -1ULL + } +#endif + }, + { "addi.sn", TILEPRO_OPC_ADDI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048300000ULL, + 0x3418000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addib", TILEPRO_OPC_ADDIB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040100000ULL, + 0x3008000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addib.sn", TILEPRO_OPC_ADDIB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048100000ULL, + 0x3408000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addih", TILEPRO_OPC_ADDIH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040200000ULL, + 0x3010000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addih.sn", TILEPRO_OPC_ADDIH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048200000ULL, + 0x3410000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addli", TILEPRO_OPC_ADDLI, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x8000000070000000ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000020000000ULL, + 0x1800000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addli.sn", TILEPRO_OPC_ADDLI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x8000000070000000ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000010000000ULL, + 0x1000000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "addlis", TILEPRO_OPC_ADDLIS, 0x3, 3, TREG_SN, 1, + { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x8000000070000000ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000010000000ULL, + 0x1000000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "adds", TILEPRO_OPC_ADDS, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001800000ULL, + 0x0884000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "adds.sn", TILEPRO_OPC_ADDS_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009800000ULL, + 0x0c84000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "adiffb_u", TILEPRO_OPC_ADIFFB_U, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000100000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "adiffb_u.sn", TILEPRO_OPC_ADIFFB_U_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008100000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "adiffh", TILEPRO_OPC_ADIFFH, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000140000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "adiffh.sn", TILEPRO_OPC_ADIFFH_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008140000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "and", TILEPRO_OPC_AND, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000000180000ULL, + 0x0808000000000000ULL, + 0x8000000018000000ULL, + 0x9800000000000000ULL, + -1ULL + } +#endif + }, + { "and.sn", TILEPRO_OPC_AND_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008180000ULL, + 0x0c08000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "andi", TILEPRO_OPC_ANDI, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0x8000000078000000ULL, + 0xf800000000000000ULL, + 0ULL + }, + { + 0x0000000050100000ULL, + 0x3020000000000000ULL, + 0x8000000050000000ULL, + 0xc000000000000000ULL, + -1ULL + } +#endif + }, + { "andi.sn", TILEPRO_OPC_ANDI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000058100000ULL, + 0x3420000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "auli", TILEPRO_OPC_AULI, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x8000000070000000ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000030000000ULL, + 0x2000000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "avgb_u", TILEPRO_OPC_AVGB_U, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000001c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "avgb_u.sn", TILEPRO_OPC_AVGB_U_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000081c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "avgh", TILEPRO_OPC_AVGH, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000200000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "avgh.sn", TILEPRO_OPC_AVGH_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008200000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bbns", TILEPRO_OPC_BBNS, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000700000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bbns.sn", TILEPRO_OPC_BBNS_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000700000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bbnst", TILEPRO_OPC_BBNST, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000780000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bbnst.sn", TILEPRO_OPC_BBNST_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000780000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bbs", TILEPRO_OPC_BBS, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000600000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bbs.sn", TILEPRO_OPC_BBS_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000600000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bbst", TILEPRO_OPC_BBST, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000680000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bbst.sn", TILEPRO_OPC_BBST_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000680000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgez", TILEPRO_OPC_BGEZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000300000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgez.sn", TILEPRO_OPC_BGEZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000300000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgezt", TILEPRO_OPC_BGEZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000380000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgezt.sn", TILEPRO_OPC_BGEZT_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000380000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgz", TILEPRO_OPC_BGZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000200000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgz.sn", TILEPRO_OPC_BGZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000200000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgzt", TILEPRO_OPC_BGZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000280000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bgzt.sn", TILEPRO_OPC_BGZT_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000280000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bitx", TILEPRO_OPC_BITX, 0x5, 2, TREG_ZERO, 1, + { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0x80000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070161000ULL, + -1ULL, + 0x80000000680a1000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bitx.sn", TILEPRO_OPC_BITX_SN, 0x1, 2, TREG_SN, 1, + { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078161000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blez", TILEPRO_OPC_BLEZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000500000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blez.sn", TILEPRO_OPC_BLEZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000500000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blezt", TILEPRO_OPC_BLEZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000580000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blezt.sn", TILEPRO_OPC_BLEZT_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000580000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blz", TILEPRO_OPC_BLZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000400000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blz.sn", TILEPRO_OPC_BLZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000400000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blzt", TILEPRO_OPC_BLZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000480000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "blzt.sn", TILEPRO_OPC_BLZT_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000480000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bnz", TILEPRO_OPC_BNZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000100000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bnz.sn", TILEPRO_OPC_BNZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000100000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bnzt", TILEPRO_OPC_BNZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000180000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bnzt.sn", TILEPRO_OPC_BNZT_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000180000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bytex", TILEPRO_OPC_BYTEX, 0x5, 2, TREG_ZERO, 1, + { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0x80000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070162000ULL, + -1ULL, + 0x80000000680a2000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bytex.sn", TILEPRO_OPC_BYTEX_SN, 0x1, 2, TREG_SN, 1, + { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078162000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bz", TILEPRO_OPC_BZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bz.sn", TILEPRO_OPC_BZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bzt", TILEPRO_OPC_BZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2800000080000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "bzt.sn", TILEPRO_OPC_BZT_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfc00000780000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x2c00000080000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "clz", TILEPRO_OPC_CLZ, 0x5, 2, TREG_ZERO, 1, + { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0x80000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070163000ULL, + -1ULL, + 0x80000000680a3000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "clz.sn", TILEPRO_OPC_CLZ_SN, 0x1, 2, TREG_SN, 1, + { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078163000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "crc32_32", TILEPRO_OPC_CRC32_32, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000240000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "crc32_32.sn", TILEPRO_OPC_CRC32_32_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008240000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "crc32_8", TILEPRO_OPC_CRC32_8, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000280000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "crc32_8.sn", TILEPRO_OPC_CRC32_8_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008280000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ctz", TILEPRO_OPC_CTZ, 0x5, 2, TREG_ZERO, 1, + { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0x80000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070164000ULL, + -1ULL, + 0x80000000680a4000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ctz.sn", TILEPRO_OPC_CTZ_SN, 0x1, 2, TREG_SN, 1, + { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078164000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "drain", TILEPRO_OPC_DRAIN, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b080000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "dtlbpr", TILEPRO_OPC_DTLBPR, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b100000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "dword_align", TILEPRO_OPC_DWORD_ALIGN, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000017c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "dword_align.sn", TILEPRO_OPC_DWORD_ALIGN_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000097c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "finv", TILEPRO_OPC_FINV, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b180000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "flush", TILEPRO_OPC_FLUSH, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b200000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "fnop", TILEPRO_OPC_FNOP, 0xf, 0, TREG_ZERO, 1, + { { }, { }, { }, { }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x8000000077fff000ULL, + 0xfbfff80000000000ULL, + 0x80000000780ff000ULL, + 0xf807f80000000000ULL, + 0ULL + }, + { + 0x0000000070165000ULL, + 0x400b280000000000ULL, + 0x80000000680a5000ULL, + 0xd805080000000000ULL, + -1ULL + } +#endif + }, + { "icoh", TILEPRO_OPC_ICOH, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b300000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ill", TILEPRO_OPC_ILL, 0xa, 0, TREG_ZERO, 1, + { { 0, }, { }, { 0, }, { }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0xf807f80000000000ULL, + 0ULL + }, + { + -1ULL, + 0x400b380000000000ULL, + -1ULL, + 0xd805100000000000ULL, + -1ULL + } +#endif + }, + { "inthb", TILEPRO_OPC_INTHB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000002c0000ULL, + 0x080a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "inthb.sn", TILEPRO_OPC_INTHB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000082c0000ULL, + 0x0c0a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "inthh", TILEPRO_OPC_INTHH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000300000ULL, + 0x080c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "inthh.sn", TILEPRO_OPC_INTHH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008300000ULL, + 0x0c0c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "intlb", TILEPRO_OPC_INTLB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000340000ULL, + 0x080e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "intlb.sn", TILEPRO_OPC_INTLB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008340000ULL, + 0x0c0e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "intlh", TILEPRO_OPC_INTLH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000380000ULL, + 0x0810000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "intlh.sn", TILEPRO_OPC_INTLH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008380000ULL, + 0x0c10000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "inv", TILEPRO_OPC_INV, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b400000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "iret", TILEPRO_OPC_IRET, 0x2, 0, TREG_ZERO, 1, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b480000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "jalb", TILEPRO_OPC_JALB, 0x2, 1, TREG_LR, 1, + { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x6800000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "jalf", TILEPRO_OPC_JALF, 0x2, 1, TREG_LR, 1, + { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x6000000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "jalr", TILEPRO_OPC_JALR, 0x2, 1, TREG_LR, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x0814000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "jalrp", TILEPRO_OPC_JALRP, 0x2, 1, TREG_LR, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x0812000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "jb", TILEPRO_OPC_JB, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x5800000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "jf", TILEPRO_OPC_JF, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x5000000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "jr", TILEPRO_OPC_JR, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x0818000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "jrp", TILEPRO_OPC_JRP, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x0816000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lb", TILEPRO_OPC_LB, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 23, 15 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0x8700000000000000ULL + }, + { + -1ULL, + 0x400b500000000000ULL, + -1ULL, + -1ULL, + 0x8000000000000000ULL + } +#endif + }, + { "lb.sn", TILEPRO_OPC_LB_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x440b500000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lb_u", TILEPRO_OPC_LB_U, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 23, 15 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0x8700000000000000ULL + }, + { + -1ULL, + 0x400b580000000000ULL, + -1ULL, + -1ULL, + 0x8100000000000000ULL + } +#endif + }, + { "lb_u.sn", TILEPRO_OPC_LB_U_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x440b580000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lbadd", TILEPRO_OPC_LBADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x30b0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lbadd.sn", TILEPRO_OPC_LBADD_SN, 0x2, 3, TREG_SN, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x34b0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lbadd_u", TILEPRO_OPC_LBADD_U, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x30b8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lbadd_u.sn", TILEPRO_OPC_LBADD_U_SN, 0x2, 3, TREG_SN, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x34b8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lh", TILEPRO_OPC_LH, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 23, 15 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0x8700000000000000ULL + }, + { + -1ULL, + 0x400b600000000000ULL, + -1ULL, + -1ULL, + 0x8200000000000000ULL + } +#endif + }, + { "lh.sn", TILEPRO_OPC_LH_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x440b600000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lh_u", TILEPRO_OPC_LH_U, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 23, 15 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0x8700000000000000ULL + }, + { + -1ULL, + 0x400b680000000000ULL, + -1ULL, + -1ULL, + 0x8300000000000000ULL + } +#endif + }, + { "lh_u.sn", TILEPRO_OPC_LH_U_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x440b680000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lhadd", TILEPRO_OPC_LHADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x30c0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lhadd.sn", TILEPRO_OPC_LHADD_SN, 0x2, 3, TREG_SN, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x34c0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lhadd_u", TILEPRO_OPC_LHADD_U, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x30c8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lhadd_u.sn", TILEPRO_OPC_LHADD_U_SN, 0x2, 3, TREG_SN, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x34c8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lnk", TILEPRO_OPC_LNK, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x081a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lnk.sn", TILEPRO_OPC_LNK_SN, 0x2, 1, TREG_SN, 1, + { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x0c1a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lw", TILEPRO_OPC_LW, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 23, 15 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0x8700000000000000ULL + }, + { + -1ULL, + 0x400b700000000000ULL, + -1ULL, + -1ULL, + 0x8400000000000000ULL + } +#endif + }, + { "lw.sn", TILEPRO_OPC_LW_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x440b700000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lw_na", TILEPRO_OPC_LW_NA, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400bc00000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lw_na.sn", TILEPRO_OPC_LW_NA_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x440bc00000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lwadd", TILEPRO_OPC_LWADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x30d0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lwadd.sn", TILEPRO_OPC_LWADD_SN, 0x2, 3, TREG_SN, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x34d0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lwadd_na", TILEPRO_OPC_LWADD_NA, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x30d8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "lwadd_na.sn", TILEPRO_OPC_LWADD_NA_SN, 0x2, 3, TREG_SN, 1, + { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x34d8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "maxb_u", TILEPRO_OPC_MAXB_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000003c0000ULL, + 0x081c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "maxb_u.sn", TILEPRO_OPC_MAXB_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000083c0000ULL, + 0x0c1c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "maxh", TILEPRO_OPC_MAXH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000400000ULL, + 0x081e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "maxh.sn", TILEPRO_OPC_MAXH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008400000ULL, + 0x0c1e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "maxib_u", TILEPRO_OPC_MAXIB_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040400000ULL, + 0x3028000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "maxib_u.sn", TILEPRO_OPC_MAXIB_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048400000ULL, + 0x3428000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "maxih", TILEPRO_OPC_MAXIH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040500000ULL, + 0x3030000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "maxih.sn", TILEPRO_OPC_MAXIH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048500000ULL, + 0x3430000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mf", TILEPRO_OPC_MF, 0x2, 0, TREG_ZERO, 1, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b780000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mfspr", TILEPRO_OPC_MFSPR, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 25 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbf8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x3038000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "minb_u", TILEPRO_OPC_MINB_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000440000ULL, + 0x0820000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "minb_u.sn", TILEPRO_OPC_MINB_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008440000ULL, + 0x0c20000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "minh", TILEPRO_OPC_MINH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000480000ULL, + 0x0822000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "minh.sn", TILEPRO_OPC_MINH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008480000ULL, + 0x0c22000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "minib_u", TILEPRO_OPC_MINIB_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040600000ULL, + 0x3040000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "minib_u.sn", TILEPRO_OPC_MINIB_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048600000ULL, + 0x3440000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "minih", TILEPRO_OPC_MINIH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040700000ULL, + 0x3048000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "minih.sn", TILEPRO_OPC_MINIH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048700000ULL, + 0x3448000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mm", TILEPRO_OPC_MM, 0x3, 5, TREG_ZERO, 1, + { { 7, 8, 16, 26, 27 }, { 9, 10, 17, 28, 29 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x8000000070000000ULL, + 0xf800000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000060000000ULL, + 0x3800000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mnz", TILEPRO_OPC_MNZ, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000000540000ULL, + 0x0828000000000000ULL, + 0x8000000010000000ULL, + 0x9002000000000000ULL, + -1ULL + } +#endif + }, + { "mnz.sn", TILEPRO_OPC_MNZ_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008540000ULL, + 0x0c28000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mnzb", TILEPRO_OPC_MNZB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000004c0000ULL, + 0x0824000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mnzb.sn", TILEPRO_OPC_MNZB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000084c0000ULL, + 0x0c24000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mnzh", TILEPRO_OPC_MNZH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000500000ULL, + 0x0826000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mnzh.sn", TILEPRO_OPC_MNZH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008500000ULL, + 0x0c26000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mtspr", TILEPRO_OPC_MTSPR, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 30, 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbf8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x3050000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhh_ss", TILEPRO_OPC_MULHH_SS, 0x5, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0x80000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000680000ULL, + -1ULL, + 0x8000000038000000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhh_ss.sn", TILEPRO_OPC_MULHH_SS_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008680000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhh_su", TILEPRO_OPC_MULHH_SU, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000006c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhh_su.sn", TILEPRO_OPC_MULHH_SU_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000086c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhh_uu", TILEPRO_OPC_MULHH_UU, 0x5, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0x80000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000700000ULL, + -1ULL, + 0x8000000038040000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhh_uu.sn", TILEPRO_OPC_MULHH_UU_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008700000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhha_ss", TILEPRO_OPC_MULHHA_SS, 0x5, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0x80000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000580000ULL, + -1ULL, + 0x8000000040000000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhha_ss.sn", TILEPRO_OPC_MULHHA_SS_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008580000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhha_su", TILEPRO_OPC_MULHHA_SU, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000005c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhha_su.sn", TILEPRO_OPC_MULHHA_SU_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000085c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhha_uu", TILEPRO_OPC_MULHHA_UU, 0x5, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0x80000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000600000ULL, + -1ULL, + 0x8000000040040000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhha_uu.sn", TILEPRO_OPC_MULHHA_UU_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008600000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhhsa_uu", TILEPRO_OPC_MULHHSA_UU, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000640000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhhsa_uu.sn", TILEPRO_OPC_MULHHSA_UU_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008640000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhl_ss", TILEPRO_OPC_MULHL_SS, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000880000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhl_ss.sn", TILEPRO_OPC_MULHL_SS_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008880000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhl_su", TILEPRO_OPC_MULHL_SU, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000008c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhl_su.sn", TILEPRO_OPC_MULHL_SU_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000088c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhl_us", TILEPRO_OPC_MULHL_US, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000900000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhl_us.sn", TILEPRO_OPC_MULHL_US_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008900000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhl_uu", TILEPRO_OPC_MULHL_UU, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000940000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhl_uu.sn", TILEPRO_OPC_MULHL_UU_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008940000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhla_ss", TILEPRO_OPC_MULHLA_SS, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000740000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhla_ss.sn", TILEPRO_OPC_MULHLA_SS_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008740000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhla_su", TILEPRO_OPC_MULHLA_SU, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000780000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhla_su.sn", TILEPRO_OPC_MULHLA_SU_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008780000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhla_us", TILEPRO_OPC_MULHLA_US, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000007c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhla_us.sn", TILEPRO_OPC_MULHLA_US_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000087c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhla_uu", TILEPRO_OPC_MULHLA_UU, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000800000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhla_uu.sn", TILEPRO_OPC_MULHLA_UU_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008800000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhlsa_uu", TILEPRO_OPC_MULHLSA_UU, 0x5, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0x80000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000840000ULL, + -1ULL, + 0x8000000030000000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulhlsa_uu.sn", TILEPRO_OPC_MULHLSA_UU_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008840000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulll_ss", TILEPRO_OPC_MULLL_SS, 0x5, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0x80000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000a80000ULL, + -1ULL, + 0x8000000038080000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulll_ss.sn", TILEPRO_OPC_MULLL_SS_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008a80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulll_su", TILEPRO_OPC_MULLL_SU, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000ac0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulll_su.sn", TILEPRO_OPC_MULLL_SU_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008ac0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulll_uu", TILEPRO_OPC_MULLL_UU, 0x5, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0x80000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000b00000ULL, + -1ULL, + 0x80000000380c0000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulll_uu.sn", TILEPRO_OPC_MULLL_UU_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008b00000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mullla_ss", TILEPRO_OPC_MULLLA_SS, 0x5, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0x80000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000980000ULL, + -1ULL, + 0x8000000040080000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mullla_ss.sn", TILEPRO_OPC_MULLLA_SS_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008980000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mullla_su", TILEPRO_OPC_MULLLA_SU, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000009c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mullla_su.sn", TILEPRO_OPC_MULLLA_SU_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000089c0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mullla_uu", TILEPRO_OPC_MULLLA_UU, 0x5, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0x80000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000a00000ULL, + -1ULL, + 0x80000000400c0000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mullla_uu.sn", TILEPRO_OPC_MULLLA_UU_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008a00000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulllsa_uu", TILEPRO_OPC_MULLLSA_UU, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000a40000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mulllsa_uu.sn", TILEPRO_OPC_MULLLSA_UU_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008a40000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mvnz", TILEPRO_OPC_MVNZ, 0x5, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0x80000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000b40000ULL, + -1ULL, + 0x8000000010040000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mvnz.sn", TILEPRO_OPC_MVNZ_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008b40000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mvz", TILEPRO_OPC_MVZ, 0x5, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0x80000000780c0000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000b80000ULL, + -1ULL, + 0x8000000010080000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mvz.sn", TILEPRO_OPC_MVZ_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008b80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mz", TILEPRO_OPC_MZ, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000000c40000ULL, + 0x082e000000000000ULL, + 0x80000000100c0000ULL, + 0x9004000000000000ULL, + -1ULL + } +#endif + }, + { "mz.sn", TILEPRO_OPC_MZ_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008c40000ULL, + 0x0c2e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mzb", TILEPRO_OPC_MZB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000bc0000ULL, + 0x082a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mzb.sn", TILEPRO_OPC_MZB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008bc0000ULL, + 0x0c2a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mzh", TILEPRO_OPC_MZH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000c00000ULL, + 0x082c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "mzh.sn", TILEPRO_OPC_MZH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008c00000ULL, + 0x0c2c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "nap", TILEPRO_OPC_NAP, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b800000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "nop", TILEPRO_OPC_NOP, 0xf, 0, TREG_ZERO, 1, + { { }, { }, { }, { }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x8000000077fff000ULL, + 0xfbfff80000000000ULL, + 0x80000000780ff000ULL, + 0xf807f80000000000ULL, + 0ULL + }, + { + 0x0000000070166000ULL, + 0x400b880000000000ULL, + 0x80000000680a6000ULL, + 0xd805180000000000ULL, + -1ULL + } +#endif + }, + { "nor", TILEPRO_OPC_NOR, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000000c80000ULL, + 0x0830000000000000ULL, + 0x8000000018040000ULL, + 0x9802000000000000ULL, + -1ULL + } +#endif + }, + { "nor.sn", TILEPRO_OPC_NOR_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008c80000ULL, + 0x0c30000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "or", TILEPRO_OPC_OR, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000000cc0000ULL, + 0x0832000000000000ULL, + 0x8000000018080000ULL, + 0x9804000000000000ULL, + -1ULL + } +#endif + }, + { "or.sn", TILEPRO_OPC_OR_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008cc0000ULL, + 0x0c32000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "ori", TILEPRO_OPC_ORI, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0x8000000078000000ULL, + 0xf800000000000000ULL, + 0ULL + }, + { + 0x0000000040800000ULL, + 0x3058000000000000ULL, + 0x8000000058000000ULL, + 0xc800000000000000ULL, + -1ULL + } +#endif + }, + { "ori.sn", TILEPRO_OPC_ORI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048800000ULL, + 0x3458000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "packbs_u", TILEPRO_OPC_PACKBS_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000019c0000ULL, + 0x0892000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "packbs_u.sn", TILEPRO_OPC_PACKBS_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000099c0000ULL, + 0x0c92000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "packhb", TILEPRO_OPC_PACKHB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000d00000ULL, + 0x0834000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "packhb.sn", TILEPRO_OPC_PACKHB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008d00000ULL, + 0x0c34000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "packhs", TILEPRO_OPC_PACKHS, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001980000ULL, + 0x0890000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "packhs.sn", TILEPRO_OPC_PACKHS_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009980000ULL, + 0x0c90000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "packlb", TILEPRO_OPC_PACKLB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000d40000ULL, + 0x0836000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "packlb.sn", TILEPRO_OPC_PACKLB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008d40000ULL, + 0x0c36000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "pcnt", TILEPRO_OPC_PCNT, 0x5, 2, TREG_ZERO, 1, + { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0x80000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070167000ULL, + -1ULL, + 0x80000000680a7000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "pcnt.sn", TILEPRO_OPC_PCNT_SN, 0x1, 2, TREG_SN, 1, + { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078167000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "rl", TILEPRO_OPC_RL, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000000d80000ULL, + 0x0838000000000000ULL, + 0x8000000020000000ULL, + 0xa000000000000000ULL, + -1ULL + } +#endif + }, + { "rl.sn", TILEPRO_OPC_RL_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008d80000ULL, + 0x0c38000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "rli", TILEPRO_OPC_RLI, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0x80000000780e0000ULL, + 0xf807000000000000ULL, + 0ULL + }, + { + 0x0000000070020000ULL, + 0x4001000000000000ULL, + 0x8000000068020000ULL, + 0xd801000000000000ULL, + -1ULL + } +#endif + }, + { "rli.sn", TILEPRO_OPC_RLI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078020000ULL, + 0x4401000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "s1a", TILEPRO_OPC_S1A, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000000dc0000ULL, + 0x083a000000000000ULL, + 0x8000000008040000ULL, + 0x8802000000000000ULL, + -1ULL + } +#endif + }, + { "s1a.sn", TILEPRO_OPC_S1A_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008dc0000ULL, + 0x0c3a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "s2a", TILEPRO_OPC_S2A, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000000e00000ULL, + 0x083c000000000000ULL, + 0x8000000008080000ULL, + 0x8804000000000000ULL, + -1ULL + } +#endif + }, + { "s2a.sn", TILEPRO_OPC_S2A_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008e00000ULL, + 0x0c3c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "s3a", TILEPRO_OPC_S3A, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000000e40000ULL, + 0x083e000000000000ULL, + 0x8000000030040000ULL, + 0xb002000000000000ULL, + -1ULL + } +#endif + }, + { "s3a.sn", TILEPRO_OPC_S3A_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008e40000ULL, + 0x0c3e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadab_u", TILEPRO_OPC_SADAB_U, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000e80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadab_u.sn", TILEPRO_OPC_SADAB_U_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008e80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadah", TILEPRO_OPC_SADAH, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000ec0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadah.sn", TILEPRO_OPC_SADAH_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008ec0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadah_u", TILEPRO_OPC_SADAH_U, 0x1, 3, TREG_ZERO, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000f00000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadah_u.sn", TILEPRO_OPC_SADAH_U_SN, 0x1, 3, TREG_SN, 1, + { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008f00000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadb_u", TILEPRO_OPC_SADB_U, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000f40000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadb_u.sn", TILEPRO_OPC_SADB_U_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008f40000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadh", TILEPRO_OPC_SADH, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000f80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadh.sn", TILEPRO_OPC_SADH_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008f80000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadh_u", TILEPRO_OPC_SADH_U, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000000fc0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sadh_u.sn", TILEPRO_OPC_SADH_U_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000008fc0000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sb", TILEPRO_OPC_SB, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 10, 17 }, { 0, }, { 0, }, { 15, 36 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfe000000000000ULL, + 0ULL, + 0ULL, + 0x8700000000000000ULL + }, + { + -1ULL, + 0x0840000000000000ULL, + -1ULL, + -1ULL, + 0x8500000000000000ULL + } +#endif + }, + { "sbadd", TILEPRO_OPC_SBADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 24, 17, 37 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbf8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x30e0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "seq", TILEPRO_OPC_SEQ, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000001080000ULL, + 0x0846000000000000ULL, + 0x8000000030080000ULL, + 0xb004000000000000ULL, + -1ULL + } +#endif + }, + { "seq.sn", TILEPRO_OPC_SEQ_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009080000ULL, + 0x0c46000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "seqb", TILEPRO_OPC_SEQB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001000000ULL, + 0x0842000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "seqb.sn", TILEPRO_OPC_SEQB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009000000ULL, + 0x0c42000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "seqh", TILEPRO_OPC_SEQH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001040000ULL, + 0x0844000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "seqh.sn", TILEPRO_OPC_SEQH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009040000ULL, + 0x0c44000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "seqi", TILEPRO_OPC_SEQI, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0x8000000078000000ULL, + 0xf800000000000000ULL, + 0ULL + }, + { + 0x0000000040b00000ULL, + 0x3070000000000000ULL, + 0x8000000060000000ULL, + 0xd000000000000000ULL, + -1ULL + } +#endif + }, + { "seqi.sn", TILEPRO_OPC_SEQI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048b00000ULL, + 0x3470000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "seqib", TILEPRO_OPC_SEQIB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040900000ULL, + 0x3060000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "seqib.sn", TILEPRO_OPC_SEQIB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048900000ULL, + 0x3460000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "seqih", TILEPRO_OPC_SEQIH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040a00000ULL, + 0x3068000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "seqih.sn", TILEPRO_OPC_SEQIH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048a00000ULL, + 0x3468000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sh", TILEPRO_OPC_SH, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 10, 17 }, { 0, }, { 0, }, { 15, 36 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfe000000000000ULL, + 0ULL, + 0ULL, + 0x8700000000000000ULL + }, + { + -1ULL, + 0x0854000000000000ULL, + -1ULL, + -1ULL, + 0x8600000000000000ULL + } +#endif + }, + { "shadd", TILEPRO_OPC_SHADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 24, 17, 37 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbf8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x30e8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shl", TILEPRO_OPC_SHL, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000001140000ULL, + 0x084c000000000000ULL, + 0x8000000020040000ULL, + 0xa002000000000000ULL, + -1ULL + } +#endif + }, + { "shl.sn", TILEPRO_OPC_SHL_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009140000ULL, + 0x0c4c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shlb", TILEPRO_OPC_SHLB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000010c0000ULL, + 0x0848000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shlb.sn", TILEPRO_OPC_SHLB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000090c0000ULL, + 0x0c48000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shlh", TILEPRO_OPC_SHLH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001100000ULL, + 0x084a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shlh.sn", TILEPRO_OPC_SHLH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009100000ULL, + 0x0c4a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shli", TILEPRO_OPC_SHLI, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0x80000000780e0000ULL, + 0xf807000000000000ULL, + 0ULL + }, + { + 0x0000000070080000ULL, + 0x4004000000000000ULL, + 0x8000000068040000ULL, + 0xd802000000000000ULL, + -1ULL + } +#endif + }, + { "shli.sn", TILEPRO_OPC_SHLI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078080000ULL, + 0x4404000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shlib", TILEPRO_OPC_SHLIB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070040000ULL, + 0x4002000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shlib.sn", TILEPRO_OPC_SHLIB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078040000ULL, + 0x4402000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shlih", TILEPRO_OPC_SHLIH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070060000ULL, + 0x4003000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shlih.sn", TILEPRO_OPC_SHLIH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078060000ULL, + 0x4403000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shr", TILEPRO_OPC_SHR, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000001200000ULL, + 0x0852000000000000ULL, + 0x8000000020080000ULL, + 0xa004000000000000ULL, + -1ULL + } +#endif + }, + { "shr.sn", TILEPRO_OPC_SHR_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009200000ULL, + 0x0c52000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shrb", TILEPRO_OPC_SHRB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001180000ULL, + 0x084e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shrb.sn", TILEPRO_OPC_SHRB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009180000ULL, + 0x0c4e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shrh", TILEPRO_OPC_SHRH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000011c0000ULL, + 0x0850000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shrh.sn", TILEPRO_OPC_SHRH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000091c0000ULL, + 0x0c50000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shri", TILEPRO_OPC_SHRI, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0x80000000780e0000ULL, + 0xf807000000000000ULL, + 0ULL + }, + { + 0x00000000700e0000ULL, + 0x4007000000000000ULL, + 0x8000000068060000ULL, + 0xd803000000000000ULL, + -1ULL + } +#endif + }, + { "shri.sn", TILEPRO_OPC_SHRI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000780e0000ULL, + 0x4407000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shrib", TILEPRO_OPC_SHRIB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000700a0000ULL, + 0x4005000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shrib.sn", TILEPRO_OPC_SHRIB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000780a0000ULL, + 0x4405000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shrih", TILEPRO_OPC_SHRIH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000700c0000ULL, + 0x4006000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "shrih.sn", TILEPRO_OPC_SHRIH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000780c0000ULL, + 0x4406000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slt", TILEPRO_OPC_SLT, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x00000000014c0000ULL, + 0x086a000000000000ULL, + 0x8000000028080000ULL, + 0xa804000000000000ULL, + -1ULL + } +#endif + }, + { "slt.sn", TILEPRO_OPC_SLT_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000094c0000ULL, + 0x0c6a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slt_u", TILEPRO_OPC_SLT_U, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000001500000ULL, + 0x086c000000000000ULL, + 0x80000000280c0000ULL, + 0xa806000000000000ULL, + -1ULL + } +#endif + }, + { "slt_u.sn", TILEPRO_OPC_SLT_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009500000ULL, + 0x0c6c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltb", TILEPRO_OPC_SLTB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001240000ULL, + 0x0856000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltb.sn", TILEPRO_OPC_SLTB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009240000ULL, + 0x0c56000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltb_u", TILEPRO_OPC_SLTB_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001280000ULL, + 0x0858000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltb_u.sn", TILEPRO_OPC_SLTB_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009280000ULL, + 0x0c58000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slte", TILEPRO_OPC_SLTE, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x00000000013c0000ULL, + 0x0862000000000000ULL, + 0x8000000028000000ULL, + 0xa800000000000000ULL, + -1ULL + } +#endif + }, + { "slte.sn", TILEPRO_OPC_SLTE_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000093c0000ULL, + 0x0c62000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slte_u", TILEPRO_OPC_SLTE_U, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000001400000ULL, + 0x0864000000000000ULL, + 0x8000000028040000ULL, + 0xa802000000000000ULL, + -1ULL + } +#endif + }, + { "slte_u.sn", TILEPRO_OPC_SLTE_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009400000ULL, + 0x0c64000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slteb", TILEPRO_OPC_SLTEB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000012c0000ULL, + 0x085a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slteb.sn", TILEPRO_OPC_SLTEB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000092c0000ULL, + 0x0c5a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slteb_u", TILEPRO_OPC_SLTEB_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001300000ULL, + 0x085c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slteb_u.sn", TILEPRO_OPC_SLTEB_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009300000ULL, + 0x0c5c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slteh", TILEPRO_OPC_SLTEH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001340000ULL, + 0x085e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slteh.sn", TILEPRO_OPC_SLTEH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009340000ULL, + 0x0c5e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slteh_u", TILEPRO_OPC_SLTEH_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001380000ULL, + 0x0860000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slteh_u.sn", TILEPRO_OPC_SLTEH_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009380000ULL, + 0x0c60000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slth", TILEPRO_OPC_SLTH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001440000ULL, + 0x0866000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slth.sn", TILEPRO_OPC_SLTH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009440000ULL, + 0x0c66000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slth_u", TILEPRO_OPC_SLTH_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001480000ULL, + 0x0868000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slth_u.sn", TILEPRO_OPC_SLTH_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009480000ULL, + 0x0c68000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slti", TILEPRO_OPC_SLTI, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0x8000000078000000ULL, + 0xf800000000000000ULL, + 0ULL + }, + { + 0x0000000041000000ULL, + 0x3098000000000000ULL, + 0x8000000070000000ULL, + 0xe000000000000000ULL, + -1ULL + } +#endif + }, + { "slti.sn", TILEPRO_OPC_SLTI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000049000000ULL, + 0x3498000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "slti_u", TILEPRO_OPC_SLTI_U, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0x8000000078000000ULL, + 0xf800000000000000ULL, + 0ULL + }, + { + 0x0000000041100000ULL, + 0x30a0000000000000ULL, + 0x8000000078000000ULL, + 0xe800000000000000ULL, + -1ULL + } +#endif + }, + { "slti_u.sn", TILEPRO_OPC_SLTI_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000049100000ULL, + 0x34a0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltib", TILEPRO_OPC_SLTIB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040c00000ULL, + 0x3078000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltib.sn", TILEPRO_OPC_SLTIB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048c00000ULL, + 0x3478000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltib_u", TILEPRO_OPC_SLTIB_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040d00000ULL, + 0x3080000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltib_u.sn", TILEPRO_OPC_SLTIB_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048d00000ULL, + 0x3480000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltih", TILEPRO_OPC_SLTIH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040e00000ULL, + 0x3088000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltih.sn", TILEPRO_OPC_SLTIH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048e00000ULL, + 0x3488000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltih_u", TILEPRO_OPC_SLTIH_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000040f00000ULL, + 0x3090000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sltih_u.sn", TILEPRO_OPC_SLTIH_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000048f00000ULL, + 0x3490000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sne", TILEPRO_OPC_SNE, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x00000000015c0000ULL, + 0x0872000000000000ULL, + 0x80000000300c0000ULL, + 0xb006000000000000ULL, + -1ULL + } +#endif + }, + { "sne.sn", TILEPRO_OPC_SNE_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000095c0000ULL, + 0x0c72000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sneb", TILEPRO_OPC_SNEB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001540000ULL, + 0x086e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sneb.sn", TILEPRO_OPC_SNEB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009540000ULL, + 0x0c6e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sneh", TILEPRO_OPC_SNEH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001580000ULL, + 0x0870000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sneh.sn", TILEPRO_OPC_SNEH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009580000ULL, + 0x0c70000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sra", TILEPRO_OPC_SRA, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000001680000ULL, + 0x0878000000000000ULL, + 0x80000000200c0000ULL, + 0xa006000000000000ULL, + -1ULL + } +#endif + }, + { "sra.sn", TILEPRO_OPC_SRA_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009680000ULL, + 0x0c78000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "srab", TILEPRO_OPC_SRAB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001600000ULL, + 0x0874000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "srab.sn", TILEPRO_OPC_SRAB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009600000ULL, + 0x0c74000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "srah", TILEPRO_OPC_SRAH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001640000ULL, + 0x0876000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "srah.sn", TILEPRO_OPC_SRAH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009640000ULL, + 0x0c76000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "srai", TILEPRO_OPC_SRAI, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0x80000000780e0000ULL, + 0xf807000000000000ULL, + 0ULL + }, + { + 0x0000000070140000ULL, + 0x400a000000000000ULL, + 0x8000000068080000ULL, + 0xd804000000000000ULL, + -1ULL + } +#endif + }, + { "srai.sn", TILEPRO_OPC_SRAI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078140000ULL, + 0x440a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sraib", TILEPRO_OPC_SRAIB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070100000ULL, + 0x4008000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sraib.sn", TILEPRO_OPC_SRAIB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078100000ULL, + 0x4408000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sraih", TILEPRO_OPC_SRAIH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070120000ULL, + 0x4009000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sraih.sn", TILEPRO_OPC_SRAIH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffe0000ULL, + 0xffff000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078120000ULL, + 0x4409000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sub", TILEPRO_OPC_SUB, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000001740000ULL, + 0x087e000000000000ULL, + 0x80000000080c0000ULL, + 0x8806000000000000ULL, + -1ULL + } +#endif + }, + { "sub.sn", TILEPRO_OPC_SUB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009740000ULL, + 0x0c7e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "subb", TILEPRO_OPC_SUBB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000016c0000ULL, + 0x087a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "subb.sn", TILEPRO_OPC_SUBB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x00000000096c0000ULL, + 0x0c7a000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "subbs_u", TILEPRO_OPC_SUBBS_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001900000ULL, + 0x088c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "subbs_u.sn", TILEPRO_OPC_SUBBS_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009900000ULL, + 0x0c8c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "subh", TILEPRO_OPC_SUBH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001700000ULL, + 0x087c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "subh.sn", TILEPRO_OPC_SUBH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009700000ULL, + 0x0c7c000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "subhs", TILEPRO_OPC_SUBHS, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001940000ULL, + 0x088e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "subhs.sn", TILEPRO_OPC_SUBHS_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009940000ULL, + 0x0c8e000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "subs", TILEPRO_OPC_SUBS, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000001840000ULL, + 0x0886000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "subs.sn", TILEPRO_OPC_SUBS_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009840000ULL, + 0x0c86000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "sw", TILEPRO_OPC_SW, 0x12, 2, TREG_ZERO, 1, + { { 0, }, { 10, 17 }, { 0, }, { 0, }, { 15, 36 } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfe000000000000ULL, + 0ULL, + 0ULL, + 0x8700000000000000ULL + }, + { + -1ULL, + 0x0880000000000000ULL, + -1ULL, + -1ULL, + 0x8700000000000000ULL + } +#endif + }, + { "swadd", TILEPRO_OPC_SWADD, 0x2, 3, TREG_ZERO, 1, + { { 0, }, { 24, 17, 37 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbf8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x30f0000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "swint0", TILEPRO_OPC_SWINT0, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b900000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "swint1", TILEPRO_OPC_SWINT1, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400b980000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "swint2", TILEPRO_OPC_SWINT2, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400ba00000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "swint3", TILEPRO_OPC_SWINT3, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400ba80000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb0", TILEPRO_OPC_TBLIDXB0, 0x5, 2, TREG_ZERO, 1, + { { 21, 8 }, { 0, }, { 31, 12 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0x80000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070168000ULL, + -1ULL, + 0x80000000680a8000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb0.sn", TILEPRO_OPC_TBLIDXB0_SN, 0x1, 2, TREG_SN, 1, + { { 21, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078168000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb1", TILEPRO_OPC_TBLIDXB1, 0x5, 2, TREG_ZERO, 1, + { { 21, 8 }, { 0, }, { 31, 12 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0x80000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x0000000070169000ULL, + -1ULL, + 0x80000000680a9000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb1.sn", TILEPRO_OPC_TBLIDXB1_SN, 0x1, 2, TREG_SN, 1, + { { 21, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000078169000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb2", TILEPRO_OPC_TBLIDXB2, 0x5, 2, TREG_ZERO, 1, + { { 21, 8 }, { 0, }, { 31, 12 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0x80000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x000000007016a000ULL, + -1ULL, + 0x80000000680aa000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb2.sn", TILEPRO_OPC_TBLIDXB2_SN, 0x1, 2, TREG_SN, 1, + { { 21, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x000000007816a000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb3", TILEPRO_OPC_TBLIDXB3, 0x5, 2, TREG_ZERO, 1, + { { 21, 8 }, { 0, }, { 31, 12 }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0x80000000780ff000ULL, + 0ULL, + 0ULL + }, + { + 0x000000007016b000ULL, + -1ULL, + 0x80000000680ab000ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tblidxb3.sn", TILEPRO_OPC_TBLIDXB3_SN, 0x1, 2, TREG_SN, 1, + { { 21, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffff000ULL, + 0ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x000000007816b000ULL, + -1ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tns", TILEPRO_OPC_TNS, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400bb00000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "tns.sn", TILEPRO_OPC_TNS_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfffff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x440bb00000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "wh64", TILEPRO_OPC_WH64, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0ULL, + 0xfbfff80000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + -1ULL, + 0x400bb80000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "xor", TILEPRO_OPC_XOR, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0x80000000780c0000ULL, + 0xf806000000000000ULL, + 0ULL + }, + { + 0x0000000001780000ULL, + 0x0882000000000000ULL, + 0x80000000180c0000ULL, + 0x9806000000000000ULL, + -1ULL + } +#endif + }, + { "xor.sn", TILEPRO_OPC_XOR_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ffc0000ULL, + 0xfffe000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000009780000ULL, + 0x0c82000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "xori", TILEPRO_OPC_XORI, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000050200000ULL, + 0x30a8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { "xori.sn", TILEPRO_OPC_XORI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, +#ifndef DISASM_ONLY + { + 0x800000007ff00000ULL, + 0xfff8000000000000ULL, + 0ULL, + 0ULL, + 0ULL + }, + { + 0x0000000058200000ULL, + 0x34a8000000000000ULL, + -1ULL, + -1ULL, + -1ULL + } +#endif + }, + { NULL, TILEPRO_OPC_NONE, 0, 0, TREG_ZERO, 0, { { 0, } }, +#ifndef DISASM_ONLY + { 0, }, { 0, } +#endif + } +}; + +#define BITFIELD(start, size) ((start) | (((1 << (size)) - 1) << 6)) +#define CHILD(array_index) (TILEPRO_OPC_NONE + (array_index)) + +static const unsigned short decode_X0_fsm[1153] = +{ + BITFIELD(22, 9) /* index 0 */, + CHILD(513), CHILD(530), CHILD(547), CHILD(564), CHILD(596), CHILD(613), + CHILD(630), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(663), CHILD(680), CHILD(697), + CHILD(714), CHILD(746), CHILD(763), CHILD(780), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), + CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), + CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), + CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), + CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), + CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), + CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), + CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), + CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), + CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), + CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(828), CHILD(828), + CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), + CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), + CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), + CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), + CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), + CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), + CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), + CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), + CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), + CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), + CHILD(828), CHILD(828), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(873), CHILD(878), CHILD(883), CHILD(903), CHILD(908), + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(913), + CHILD(918), CHILD(923), CHILD(943), CHILD(948), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(953), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(988), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, CHILD(993), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(1076), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(18, 4) /* index 513 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB, TILEPRO_OPC_ADDH, TILEPRO_OPC_ADD, + TILEPRO_OPC_ADIFFB_U, TILEPRO_OPC_ADIFFH, TILEPRO_OPC_AND, + TILEPRO_OPC_AVGB_U, TILEPRO_OPC_AVGH, TILEPRO_OPC_CRC32_32, + TILEPRO_OPC_CRC32_8, TILEPRO_OPC_INTHB, TILEPRO_OPC_INTHH, + TILEPRO_OPC_INTLB, TILEPRO_OPC_INTLH, TILEPRO_OPC_MAXB_U, + BITFIELD(18, 4) /* index 530 */, + TILEPRO_OPC_MAXH, TILEPRO_OPC_MINB_U, TILEPRO_OPC_MINH, TILEPRO_OPC_MNZB, + TILEPRO_OPC_MNZH, TILEPRO_OPC_MNZ, TILEPRO_OPC_MULHHA_SS, + TILEPRO_OPC_MULHHA_SU, TILEPRO_OPC_MULHHA_UU, TILEPRO_OPC_MULHHSA_UU, + TILEPRO_OPC_MULHH_SS, TILEPRO_OPC_MULHH_SU, TILEPRO_OPC_MULHH_UU, + TILEPRO_OPC_MULHLA_SS, TILEPRO_OPC_MULHLA_SU, TILEPRO_OPC_MULHLA_US, + BITFIELD(18, 4) /* index 547 */, + TILEPRO_OPC_MULHLA_UU, TILEPRO_OPC_MULHLSA_UU, TILEPRO_OPC_MULHL_SS, + TILEPRO_OPC_MULHL_SU, TILEPRO_OPC_MULHL_US, TILEPRO_OPC_MULHL_UU, + TILEPRO_OPC_MULLLA_SS, TILEPRO_OPC_MULLLA_SU, TILEPRO_OPC_MULLLA_UU, + TILEPRO_OPC_MULLLSA_UU, TILEPRO_OPC_MULLL_SS, TILEPRO_OPC_MULLL_SU, + TILEPRO_OPC_MULLL_UU, TILEPRO_OPC_MVNZ, TILEPRO_OPC_MVZ, TILEPRO_OPC_MZB, + BITFIELD(18, 4) /* index 564 */, + TILEPRO_OPC_MZH, TILEPRO_OPC_MZ, TILEPRO_OPC_NOR, CHILD(581), + TILEPRO_OPC_PACKHB, TILEPRO_OPC_PACKLB, TILEPRO_OPC_RL, TILEPRO_OPC_S1A, + TILEPRO_OPC_S2A, TILEPRO_OPC_S3A, TILEPRO_OPC_SADAB_U, TILEPRO_OPC_SADAH, + TILEPRO_OPC_SADAH_U, TILEPRO_OPC_SADB_U, TILEPRO_OPC_SADH, + TILEPRO_OPC_SADH_U, + BITFIELD(12, 2) /* index 581 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(586), + BITFIELD(14, 2) /* index 586 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(591), + BITFIELD(16, 2) /* index 591 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE, + BITFIELD(18, 4) /* index 596 */, + TILEPRO_OPC_SEQB, TILEPRO_OPC_SEQH, TILEPRO_OPC_SEQ, TILEPRO_OPC_SHLB, + TILEPRO_OPC_SHLH, TILEPRO_OPC_SHL, TILEPRO_OPC_SHRB, TILEPRO_OPC_SHRH, + TILEPRO_OPC_SHR, TILEPRO_OPC_SLTB, TILEPRO_OPC_SLTB_U, TILEPRO_OPC_SLTEB, + TILEPRO_OPC_SLTEB_U, TILEPRO_OPC_SLTEH, TILEPRO_OPC_SLTEH_U, + TILEPRO_OPC_SLTE, + BITFIELD(18, 4) /* index 613 */, + TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLTH, TILEPRO_OPC_SLTH_U, TILEPRO_OPC_SLT, + TILEPRO_OPC_SLT_U, TILEPRO_OPC_SNEB, TILEPRO_OPC_SNEH, TILEPRO_OPC_SNE, + TILEPRO_OPC_SRAB, TILEPRO_OPC_SRAH, TILEPRO_OPC_SRA, TILEPRO_OPC_SUBB, + TILEPRO_OPC_SUBH, TILEPRO_OPC_SUB, TILEPRO_OPC_XOR, TILEPRO_OPC_DWORD_ALIGN, + BITFIELD(18, 3) /* index 630 */, + CHILD(639), CHILD(642), CHILD(645), CHILD(648), CHILD(651), CHILD(654), + CHILD(657), CHILD(660), + BITFIELD(21, 1) /* index 639 */, + TILEPRO_OPC_ADDS, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 642 */, + TILEPRO_OPC_SUBS, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 645 */, + TILEPRO_OPC_ADDBS_U, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 648 */, + TILEPRO_OPC_ADDHS, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 651 */, + TILEPRO_OPC_SUBBS_U, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 654 */, + TILEPRO_OPC_SUBHS, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 657 */, + TILEPRO_OPC_PACKHS, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 660 */, + TILEPRO_OPC_PACKBS_U, TILEPRO_OPC_NONE, + BITFIELD(18, 4) /* index 663 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB_SN, TILEPRO_OPC_ADDH_SN, + TILEPRO_OPC_ADD_SN, TILEPRO_OPC_ADIFFB_U_SN, TILEPRO_OPC_ADIFFH_SN, + TILEPRO_OPC_AND_SN, TILEPRO_OPC_AVGB_U_SN, TILEPRO_OPC_AVGH_SN, + TILEPRO_OPC_CRC32_32_SN, TILEPRO_OPC_CRC32_8_SN, TILEPRO_OPC_INTHB_SN, + TILEPRO_OPC_INTHH_SN, TILEPRO_OPC_INTLB_SN, TILEPRO_OPC_INTLH_SN, + TILEPRO_OPC_MAXB_U_SN, + BITFIELD(18, 4) /* index 680 */, + TILEPRO_OPC_MAXH_SN, TILEPRO_OPC_MINB_U_SN, TILEPRO_OPC_MINH_SN, + TILEPRO_OPC_MNZB_SN, TILEPRO_OPC_MNZH_SN, TILEPRO_OPC_MNZ_SN, + TILEPRO_OPC_MULHHA_SS_SN, TILEPRO_OPC_MULHHA_SU_SN, + TILEPRO_OPC_MULHHA_UU_SN, TILEPRO_OPC_MULHHSA_UU_SN, + TILEPRO_OPC_MULHH_SS_SN, TILEPRO_OPC_MULHH_SU_SN, TILEPRO_OPC_MULHH_UU_SN, + TILEPRO_OPC_MULHLA_SS_SN, TILEPRO_OPC_MULHLA_SU_SN, + TILEPRO_OPC_MULHLA_US_SN, + BITFIELD(18, 4) /* index 697 */, + TILEPRO_OPC_MULHLA_UU_SN, TILEPRO_OPC_MULHLSA_UU_SN, + TILEPRO_OPC_MULHL_SS_SN, TILEPRO_OPC_MULHL_SU_SN, TILEPRO_OPC_MULHL_US_SN, + TILEPRO_OPC_MULHL_UU_SN, TILEPRO_OPC_MULLLA_SS_SN, TILEPRO_OPC_MULLLA_SU_SN, + TILEPRO_OPC_MULLLA_UU_SN, TILEPRO_OPC_MULLLSA_UU_SN, + TILEPRO_OPC_MULLL_SS_SN, TILEPRO_OPC_MULLL_SU_SN, TILEPRO_OPC_MULLL_UU_SN, + TILEPRO_OPC_MVNZ_SN, TILEPRO_OPC_MVZ_SN, TILEPRO_OPC_MZB_SN, + BITFIELD(18, 4) /* index 714 */, + TILEPRO_OPC_MZH_SN, TILEPRO_OPC_MZ_SN, TILEPRO_OPC_NOR_SN, CHILD(731), + TILEPRO_OPC_PACKHB_SN, TILEPRO_OPC_PACKLB_SN, TILEPRO_OPC_RL_SN, + TILEPRO_OPC_S1A_SN, TILEPRO_OPC_S2A_SN, TILEPRO_OPC_S3A_SN, + TILEPRO_OPC_SADAB_U_SN, TILEPRO_OPC_SADAH_SN, TILEPRO_OPC_SADAH_U_SN, + TILEPRO_OPC_SADB_U_SN, TILEPRO_OPC_SADH_SN, TILEPRO_OPC_SADH_U_SN, + BITFIELD(12, 2) /* index 731 */, + TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(736), + BITFIELD(14, 2) /* index 736 */, + TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(741), + BITFIELD(16, 2) /* index 741 */, + TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, + TILEPRO_OPC_MOVE_SN, + BITFIELD(18, 4) /* index 746 */, + TILEPRO_OPC_SEQB_SN, TILEPRO_OPC_SEQH_SN, TILEPRO_OPC_SEQ_SN, + TILEPRO_OPC_SHLB_SN, TILEPRO_OPC_SHLH_SN, TILEPRO_OPC_SHL_SN, + TILEPRO_OPC_SHRB_SN, TILEPRO_OPC_SHRH_SN, TILEPRO_OPC_SHR_SN, + TILEPRO_OPC_SLTB_SN, TILEPRO_OPC_SLTB_U_SN, TILEPRO_OPC_SLTEB_SN, + TILEPRO_OPC_SLTEB_U_SN, TILEPRO_OPC_SLTEH_SN, TILEPRO_OPC_SLTEH_U_SN, + TILEPRO_OPC_SLTE_SN, + BITFIELD(18, 4) /* index 763 */, + TILEPRO_OPC_SLTE_U_SN, TILEPRO_OPC_SLTH_SN, TILEPRO_OPC_SLTH_U_SN, + TILEPRO_OPC_SLT_SN, TILEPRO_OPC_SLT_U_SN, TILEPRO_OPC_SNEB_SN, + TILEPRO_OPC_SNEH_SN, TILEPRO_OPC_SNE_SN, TILEPRO_OPC_SRAB_SN, + TILEPRO_OPC_SRAH_SN, TILEPRO_OPC_SRA_SN, TILEPRO_OPC_SUBB_SN, + TILEPRO_OPC_SUBH_SN, TILEPRO_OPC_SUB_SN, TILEPRO_OPC_XOR_SN, + TILEPRO_OPC_DWORD_ALIGN_SN, + BITFIELD(18, 3) /* index 780 */, + CHILD(789), CHILD(792), CHILD(795), CHILD(798), CHILD(801), CHILD(804), + CHILD(807), CHILD(810), + BITFIELD(21, 1) /* index 789 */, + TILEPRO_OPC_ADDS_SN, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 792 */, + TILEPRO_OPC_SUBS_SN, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 795 */, + TILEPRO_OPC_ADDBS_U_SN, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 798 */, + TILEPRO_OPC_ADDHS_SN, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 801 */, + TILEPRO_OPC_SUBBS_U_SN, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 804 */, + TILEPRO_OPC_SUBHS_SN, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 807 */, + TILEPRO_OPC_PACKHS_SN, TILEPRO_OPC_NONE, + BITFIELD(21, 1) /* index 810 */, + TILEPRO_OPC_PACKBS_U_SN, TILEPRO_OPC_NONE, + BITFIELD(6, 2) /* index 813 */, + TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, + CHILD(818), + BITFIELD(8, 2) /* index 818 */, + TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, + CHILD(823), + BITFIELD(10, 2) /* index 823 */, + TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, + TILEPRO_OPC_MOVELI_SN, + BITFIELD(6, 2) /* index 828 */, + TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(833), + BITFIELD(8, 2) /* index 833 */, + TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(838), + BITFIELD(10, 2) /* index 838 */, + TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_MOVELI, + BITFIELD(0, 2) /* index 843 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(848), + BITFIELD(2, 2) /* index 848 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(853), + BITFIELD(4, 2) /* index 853 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(858), + BITFIELD(6, 2) /* index 858 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(863), + BITFIELD(8, 2) /* index 863 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(868), + BITFIELD(10, 2) /* index 868 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_INFOL, + BITFIELD(20, 2) /* index 873 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB, TILEPRO_OPC_ADDIH, TILEPRO_OPC_ADDI, + BITFIELD(20, 2) /* index 878 */, + TILEPRO_OPC_MAXIB_U, TILEPRO_OPC_MAXIH, TILEPRO_OPC_MINIB_U, + TILEPRO_OPC_MINIH, + BITFIELD(20, 2) /* index 883 */, + CHILD(888), TILEPRO_OPC_SEQIB, TILEPRO_OPC_SEQIH, TILEPRO_OPC_SEQI, + BITFIELD(6, 2) /* index 888 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(893), + BITFIELD(8, 2) /* index 893 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(898), + BITFIELD(10, 2) /* index 898 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI, + BITFIELD(20, 2) /* index 903 */, + TILEPRO_OPC_SLTIB, TILEPRO_OPC_SLTIB_U, TILEPRO_OPC_SLTIH, + TILEPRO_OPC_SLTIH_U, + BITFIELD(20, 2) /* index 908 */, + TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(20, 2) /* index 913 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB_SN, TILEPRO_OPC_ADDIH_SN, + TILEPRO_OPC_ADDI_SN, + BITFIELD(20, 2) /* index 918 */, + TILEPRO_OPC_MAXIB_U_SN, TILEPRO_OPC_MAXIH_SN, TILEPRO_OPC_MINIB_U_SN, + TILEPRO_OPC_MINIH_SN, + BITFIELD(20, 2) /* index 923 */, + CHILD(928), TILEPRO_OPC_SEQIB_SN, TILEPRO_OPC_SEQIH_SN, TILEPRO_OPC_SEQI_SN, + BITFIELD(6, 2) /* index 928 */, + TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(933), + BITFIELD(8, 2) /* index 933 */, + TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(938), + BITFIELD(10, 2) /* index 938 */, + TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, + TILEPRO_OPC_MOVEI_SN, + BITFIELD(20, 2) /* index 943 */, + TILEPRO_OPC_SLTIB_SN, TILEPRO_OPC_SLTIB_U_SN, TILEPRO_OPC_SLTIH_SN, + TILEPRO_OPC_SLTIH_U_SN, + BITFIELD(20, 2) /* index 948 */, + TILEPRO_OPC_SLTI_SN, TILEPRO_OPC_SLTI_U_SN, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, + BITFIELD(20, 2) /* index 953 */, + TILEPRO_OPC_NONE, CHILD(958), TILEPRO_OPC_XORI, TILEPRO_OPC_NONE, + BITFIELD(0, 2) /* index 958 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(963), + BITFIELD(2, 2) /* index 963 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(968), + BITFIELD(4, 2) /* index 968 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(973), + BITFIELD(6, 2) /* index 973 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(978), + BITFIELD(8, 2) /* index 978 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(983), + BITFIELD(10, 2) /* index 983 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO, + BITFIELD(20, 2) /* index 988 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_ANDI_SN, TILEPRO_OPC_XORI_SN, + TILEPRO_OPC_NONE, + BITFIELD(17, 5) /* index 993 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_RLI, TILEPRO_OPC_SHLIB, TILEPRO_OPC_SHLIH, + TILEPRO_OPC_SHLI, TILEPRO_OPC_SHRIB, TILEPRO_OPC_SHRIH, TILEPRO_OPC_SHRI, + TILEPRO_OPC_SRAIB, TILEPRO_OPC_SRAIH, TILEPRO_OPC_SRAI, CHILD(1026), + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(12, 4) /* index 1026 */, + TILEPRO_OPC_NONE, CHILD(1043), CHILD(1046), CHILD(1049), CHILD(1052), + CHILD(1055), CHILD(1058), CHILD(1061), CHILD(1064), CHILD(1067), + CHILD(1070), CHILD(1073), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1043 */, + TILEPRO_OPC_BITX, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1046 */, + TILEPRO_OPC_BYTEX, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1049 */, + TILEPRO_OPC_CLZ, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1052 */, + TILEPRO_OPC_CTZ, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1055 */, + TILEPRO_OPC_FNOP, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1058 */, + TILEPRO_OPC_NOP, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1061 */, + TILEPRO_OPC_PCNT, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1064 */, + TILEPRO_OPC_TBLIDXB0, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1067 */, + TILEPRO_OPC_TBLIDXB1, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1070 */, + TILEPRO_OPC_TBLIDXB2, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1073 */, + TILEPRO_OPC_TBLIDXB3, TILEPRO_OPC_NONE, + BITFIELD(17, 5) /* index 1076 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_RLI_SN, TILEPRO_OPC_SHLIB_SN, + TILEPRO_OPC_SHLIH_SN, TILEPRO_OPC_SHLI_SN, TILEPRO_OPC_SHRIB_SN, + TILEPRO_OPC_SHRIH_SN, TILEPRO_OPC_SHRI_SN, TILEPRO_OPC_SRAIB_SN, + TILEPRO_OPC_SRAIH_SN, TILEPRO_OPC_SRAI_SN, CHILD(1109), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(12, 4) /* index 1109 */, + TILEPRO_OPC_NONE, CHILD(1126), CHILD(1129), CHILD(1132), CHILD(1135), + CHILD(1055), CHILD(1058), CHILD(1138), CHILD(1141), CHILD(1144), + CHILD(1147), CHILD(1150), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1126 */, + TILEPRO_OPC_BITX_SN, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1129 */, + TILEPRO_OPC_BYTEX_SN, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1132 */, + TILEPRO_OPC_CLZ_SN, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1135 */, + TILEPRO_OPC_CTZ_SN, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1138 */, + TILEPRO_OPC_PCNT_SN, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1141 */, + TILEPRO_OPC_TBLIDXB0_SN, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1144 */, + TILEPRO_OPC_TBLIDXB1_SN, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1147 */, + TILEPRO_OPC_TBLIDXB2_SN, TILEPRO_OPC_NONE, + BITFIELD(16, 1) /* index 1150 */, + TILEPRO_OPC_TBLIDXB3_SN, TILEPRO_OPC_NONE, +}; + +static const unsigned short decode_X1_fsm[1540] = +{ + BITFIELD(54, 9) /* index 0 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + CHILD(513), CHILD(561), CHILD(594), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(641), + CHILD(689), CHILD(722), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(766), + CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), + CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), + CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), + CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), + CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), + CHILD(766), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), + CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), + CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), + CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), + CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), + CHILD(781), CHILD(781), CHILD(781), CHILD(796), CHILD(796), CHILD(796), + CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), + CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), + CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), + CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), + CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(826), + CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826), + CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826), + CHILD(826), CHILD(826), CHILD(826), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), + CHILD(843), CHILD(860), CHILD(899), CHILD(923), CHILD(932), + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + CHILD(941), CHILD(950), CHILD(974), CHILD(983), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, + TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, CHILD(992), + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(1334), + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, + TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, + TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(49, 5) /* index 513 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB, TILEPRO_OPC_ADDH, TILEPRO_OPC_ADD, + TILEPRO_OPC_AND, TILEPRO_OPC_INTHB, TILEPRO_OPC_INTHH, TILEPRO_OPC_INTLB, + TILEPRO_OPC_INTLH, TILEPRO_OPC_JALRP, TILEPRO_OPC_JALR, TILEPRO_OPC_JRP, + TILEPRO_OPC_JR, TILEPRO_OPC_LNK, TILEPRO_OPC_MAXB_U, TILEPRO_OPC_MAXH, + TILEPRO_OPC_MINB_U, TILEPRO_OPC_MINH, TILEPRO_OPC_MNZB, TILEPRO_OPC_MNZH, + TILEPRO_OPC_MNZ, TILEPRO_OPC_MZB, TILEPRO_OPC_MZH, TILEPRO_OPC_MZ, + TILEPRO_OPC_NOR, CHILD(546), TILEPRO_OPC_PACKHB, TILEPRO_OPC_PACKLB, + TILEPRO_OPC_RL, TILEPRO_OPC_S1A, TILEPRO_OPC_S2A, TILEPRO_OPC_S3A, + BITFIELD(43, 2) /* index 546 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(551), + BITFIELD(45, 2) /* index 551 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(556), + BITFIELD(47, 2) /* index 556 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE, + BITFIELD(49, 5) /* index 561 */, + TILEPRO_OPC_SB, TILEPRO_OPC_SEQB, TILEPRO_OPC_SEQH, TILEPRO_OPC_SEQ, + TILEPRO_OPC_SHLB, TILEPRO_OPC_SHLH, TILEPRO_OPC_SHL, TILEPRO_OPC_SHRB, + TILEPRO_OPC_SHRH, TILEPRO_OPC_SHR, TILEPRO_OPC_SH, TILEPRO_OPC_SLTB, + TILEPRO_OPC_SLTB_U, TILEPRO_OPC_SLTEB, TILEPRO_OPC_SLTEB_U, + TILEPRO_OPC_SLTEH, TILEPRO_OPC_SLTEH_U, TILEPRO_OPC_SLTE, + TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLTH, TILEPRO_OPC_SLTH_U, TILEPRO_OPC_SLT, + TILEPRO_OPC_SLT_U, TILEPRO_OPC_SNEB, TILEPRO_OPC_SNEH, TILEPRO_OPC_SNE, + TILEPRO_OPC_SRAB, TILEPRO_OPC_SRAH, TILEPRO_OPC_SRA, TILEPRO_OPC_SUBB, + TILEPRO_OPC_SUBH, TILEPRO_OPC_SUB, + BITFIELD(49, 4) /* index 594 */, + CHILD(611), CHILD(614), CHILD(617), CHILD(620), CHILD(623), CHILD(626), + CHILD(629), CHILD(632), CHILD(635), CHILD(638), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 611 */, + TILEPRO_OPC_SW, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 614 */, + TILEPRO_OPC_XOR, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 617 */, + TILEPRO_OPC_ADDS, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 620 */, + TILEPRO_OPC_SUBS, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 623 */, + TILEPRO_OPC_ADDBS_U, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 626 */, + TILEPRO_OPC_ADDHS, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 629 */, + TILEPRO_OPC_SUBBS_U, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 632 */, + TILEPRO_OPC_SUBHS, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 635 */, + TILEPRO_OPC_PACKHS, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 638 */, + TILEPRO_OPC_PACKBS_U, TILEPRO_OPC_NONE, + BITFIELD(49, 5) /* index 641 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB_SN, TILEPRO_OPC_ADDH_SN, + TILEPRO_OPC_ADD_SN, TILEPRO_OPC_AND_SN, TILEPRO_OPC_INTHB_SN, + TILEPRO_OPC_INTHH_SN, TILEPRO_OPC_INTLB_SN, TILEPRO_OPC_INTLH_SN, + TILEPRO_OPC_JALRP, TILEPRO_OPC_JALR, TILEPRO_OPC_JRP, TILEPRO_OPC_JR, + TILEPRO_OPC_LNK_SN, TILEPRO_OPC_MAXB_U_SN, TILEPRO_OPC_MAXH_SN, + TILEPRO_OPC_MINB_U_SN, TILEPRO_OPC_MINH_SN, TILEPRO_OPC_MNZB_SN, + TILEPRO_OPC_MNZH_SN, TILEPRO_OPC_MNZ_SN, TILEPRO_OPC_MZB_SN, + TILEPRO_OPC_MZH_SN, TILEPRO_OPC_MZ_SN, TILEPRO_OPC_NOR_SN, CHILD(674), + TILEPRO_OPC_PACKHB_SN, TILEPRO_OPC_PACKLB_SN, TILEPRO_OPC_RL_SN, + TILEPRO_OPC_S1A_SN, TILEPRO_OPC_S2A_SN, TILEPRO_OPC_S3A_SN, + BITFIELD(43, 2) /* index 674 */, + TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(679), + BITFIELD(45, 2) /* index 679 */, + TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(684), + BITFIELD(47, 2) /* index 684 */, + TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, + TILEPRO_OPC_MOVE_SN, + BITFIELD(49, 5) /* index 689 */, + TILEPRO_OPC_SB, TILEPRO_OPC_SEQB_SN, TILEPRO_OPC_SEQH_SN, + TILEPRO_OPC_SEQ_SN, TILEPRO_OPC_SHLB_SN, TILEPRO_OPC_SHLH_SN, + TILEPRO_OPC_SHL_SN, TILEPRO_OPC_SHRB_SN, TILEPRO_OPC_SHRH_SN, + TILEPRO_OPC_SHR_SN, TILEPRO_OPC_SH, TILEPRO_OPC_SLTB_SN, + TILEPRO_OPC_SLTB_U_SN, TILEPRO_OPC_SLTEB_SN, TILEPRO_OPC_SLTEB_U_SN, + TILEPRO_OPC_SLTEH_SN, TILEPRO_OPC_SLTEH_U_SN, TILEPRO_OPC_SLTE_SN, + TILEPRO_OPC_SLTE_U_SN, TILEPRO_OPC_SLTH_SN, TILEPRO_OPC_SLTH_U_SN, + TILEPRO_OPC_SLT_SN, TILEPRO_OPC_SLT_U_SN, TILEPRO_OPC_SNEB_SN, + TILEPRO_OPC_SNEH_SN, TILEPRO_OPC_SNE_SN, TILEPRO_OPC_SRAB_SN, + TILEPRO_OPC_SRAH_SN, TILEPRO_OPC_SRA_SN, TILEPRO_OPC_SUBB_SN, + TILEPRO_OPC_SUBH_SN, TILEPRO_OPC_SUB_SN, + BITFIELD(49, 4) /* index 722 */, + CHILD(611), CHILD(739), CHILD(742), CHILD(745), CHILD(748), CHILD(751), + CHILD(754), CHILD(757), CHILD(760), CHILD(763), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 739 */, + TILEPRO_OPC_XOR_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 742 */, + TILEPRO_OPC_ADDS_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 745 */, + TILEPRO_OPC_SUBS_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 748 */, + TILEPRO_OPC_ADDBS_U_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 751 */, + TILEPRO_OPC_ADDHS_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 754 */, + TILEPRO_OPC_SUBBS_U_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 757 */, + TILEPRO_OPC_SUBHS_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 760 */, + TILEPRO_OPC_PACKHS_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 763 */, + TILEPRO_OPC_PACKBS_U_SN, TILEPRO_OPC_NONE, + BITFIELD(37, 2) /* index 766 */, + TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, + CHILD(771), + BITFIELD(39, 2) /* index 771 */, + TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, + CHILD(776), + BITFIELD(41, 2) /* index 776 */, + TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, + TILEPRO_OPC_MOVELI_SN, + BITFIELD(37, 2) /* index 781 */, + TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(786), + BITFIELD(39, 2) /* index 786 */, + TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(791), + BITFIELD(41, 2) /* index 791 */, + TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_MOVELI, + BITFIELD(31, 2) /* index 796 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(801), + BITFIELD(33, 2) /* index 801 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(806), + BITFIELD(35, 2) /* index 806 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(811), + BITFIELD(37, 2) /* index 811 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(816), + BITFIELD(39, 2) /* index 816 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(821), + BITFIELD(41, 2) /* index 821 */, + TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_INFOL, + BITFIELD(31, 4) /* index 826 */, + TILEPRO_OPC_BZ, TILEPRO_OPC_BZT, TILEPRO_OPC_BNZ, TILEPRO_OPC_BNZT, + TILEPRO_OPC_BGZ, TILEPRO_OPC_BGZT, TILEPRO_OPC_BGEZ, TILEPRO_OPC_BGEZT, + TILEPRO_OPC_BLZ, TILEPRO_OPC_BLZT, TILEPRO_OPC_BLEZ, TILEPRO_OPC_BLEZT, + TILEPRO_OPC_BBS, TILEPRO_OPC_BBST, TILEPRO_OPC_BBNS, TILEPRO_OPC_BBNST, + BITFIELD(31, 4) /* index 843 */, + TILEPRO_OPC_BZ_SN, TILEPRO_OPC_BZT_SN, TILEPRO_OPC_BNZ_SN, + TILEPRO_OPC_BNZT_SN, TILEPRO_OPC_BGZ_SN, TILEPRO_OPC_BGZT_SN, + TILEPRO_OPC_BGEZ_SN, TILEPRO_OPC_BGEZT_SN, TILEPRO_OPC_BLZ_SN, + TILEPRO_OPC_BLZT_SN, TILEPRO_OPC_BLEZ_SN, TILEPRO_OPC_BLEZT_SN, + TILEPRO_OPC_BBS_SN, TILEPRO_OPC_BBST_SN, TILEPRO_OPC_BBNS_SN, + TILEPRO_OPC_BBNST_SN, + BITFIELD(51, 3) /* index 860 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB, TILEPRO_OPC_ADDIH, TILEPRO_OPC_ADDI, + CHILD(869), TILEPRO_OPC_MAXIB_U, TILEPRO_OPC_MAXIH, TILEPRO_OPC_MFSPR, + BITFIELD(31, 2) /* index 869 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(874), + BITFIELD(33, 2) /* index 874 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(879), + BITFIELD(35, 2) /* index 879 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(884), + BITFIELD(37, 2) /* index 884 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(889), + BITFIELD(39, 2) /* index 889 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(894), + BITFIELD(41, 2) /* index 894 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO, + BITFIELD(51, 3) /* index 899 */, + TILEPRO_OPC_MINIB_U, TILEPRO_OPC_MINIH, TILEPRO_OPC_MTSPR, CHILD(908), + TILEPRO_OPC_SEQIB, TILEPRO_OPC_SEQIH, TILEPRO_OPC_SEQI, TILEPRO_OPC_SLTIB, + BITFIELD(37, 2) /* index 908 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(913), + BITFIELD(39, 2) /* index 913 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(918), + BITFIELD(41, 2) /* index 918 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI, + BITFIELD(51, 3) /* index 923 */, + TILEPRO_OPC_SLTIB_U, TILEPRO_OPC_SLTIH, TILEPRO_OPC_SLTIH_U, + TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U, TILEPRO_OPC_XORI, TILEPRO_OPC_LBADD, + TILEPRO_OPC_LBADD_U, + BITFIELD(51, 3) /* index 932 */, + TILEPRO_OPC_LHADD, TILEPRO_OPC_LHADD_U, TILEPRO_OPC_LWADD, + TILEPRO_OPC_LWADD_NA, TILEPRO_OPC_SBADD, TILEPRO_OPC_SHADD, + TILEPRO_OPC_SWADD, TILEPRO_OPC_NONE, + BITFIELD(51, 3) /* index 941 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB_SN, TILEPRO_OPC_ADDIH_SN, + TILEPRO_OPC_ADDI_SN, TILEPRO_OPC_ANDI_SN, TILEPRO_OPC_MAXIB_U_SN, + TILEPRO_OPC_MAXIH_SN, TILEPRO_OPC_MFSPR, + BITFIELD(51, 3) /* index 950 */, + TILEPRO_OPC_MINIB_U_SN, TILEPRO_OPC_MINIH_SN, TILEPRO_OPC_MTSPR, CHILD(959), + TILEPRO_OPC_SEQIB_SN, TILEPRO_OPC_SEQIH_SN, TILEPRO_OPC_SEQI_SN, + TILEPRO_OPC_SLTIB_SN, + BITFIELD(37, 2) /* index 959 */, + TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(964), + BITFIELD(39, 2) /* index 964 */, + TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(969), + BITFIELD(41, 2) /* index 969 */, + TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, + TILEPRO_OPC_MOVEI_SN, + BITFIELD(51, 3) /* index 974 */, + TILEPRO_OPC_SLTIB_U_SN, TILEPRO_OPC_SLTIH_SN, TILEPRO_OPC_SLTIH_U_SN, + TILEPRO_OPC_SLTI_SN, TILEPRO_OPC_SLTI_U_SN, TILEPRO_OPC_XORI_SN, + TILEPRO_OPC_LBADD_SN, TILEPRO_OPC_LBADD_U_SN, + BITFIELD(51, 3) /* index 983 */, + TILEPRO_OPC_LHADD_SN, TILEPRO_OPC_LHADD_U_SN, TILEPRO_OPC_LWADD_SN, + TILEPRO_OPC_LWADD_NA_SN, TILEPRO_OPC_SBADD, TILEPRO_OPC_SHADD, + TILEPRO_OPC_SWADD, TILEPRO_OPC_NONE, + BITFIELD(46, 7) /* index 992 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + CHILD(1121), CHILD(1121), CHILD(1121), CHILD(1121), CHILD(1124), + CHILD(1124), CHILD(1124), CHILD(1124), CHILD(1127), CHILD(1127), + CHILD(1127), CHILD(1127), CHILD(1130), CHILD(1130), CHILD(1130), + CHILD(1130), CHILD(1133), CHILD(1133), CHILD(1133), CHILD(1133), + CHILD(1136), CHILD(1136), CHILD(1136), CHILD(1136), CHILD(1139), + CHILD(1139), CHILD(1139), CHILD(1139), CHILD(1142), CHILD(1142), + CHILD(1142), CHILD(1142), CHILD(1145), CHILD(1145), CHILD(1145), + CHILD(1145), CHILD(1148), CHILD(1148), CHILD(1148), CHILD(1148), + CHILD(1151), CHILD(1242), CHILD(1290), CHILD(1323), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1121 */, + TILEPRO_OPC_RLI, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1124 */, + TILEPRO_OPC_SHLIB, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1127 */, + TILEPRO_OPC_SHLIH, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1130 */, + TILEPRO_OPC_SHLI, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1133 */, + TILEPRO_OPC_SHRIB, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1136 */, + TILEPRO_OPC_SHRIH, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1139 */, + TILEPRO_OPC_SHRI, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1142 */, + TILEPRO_OPC_SRAIB, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1145 */, + TILEPRO_OPC_SRAIH, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1148 */, + TILEPRO_OPC_SRAI, TILEPRO_OPC_NONE, + BITFIELD(43, 3) /* index 1151 */, + TILEPRO_OPC_NONE, CHILD(1160), CHILD(1163), CHILD(1166), CHILD(1169), + CHILD(1172), CHILD(1175), CHILD(1178), + BITFIELD(53, 1) /* index 1160 */, + TILEPRO_OPC_DRAIN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1163 */, + TILEPRO_OPC_DTLBPR, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1166 */, + TILEPRO_OPC_FINV, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1169 */, + TILEPRO_OPC_FLUSH, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1172 */, + TILEPRO_OPC_FNOP, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1175 */, + TILEPRO_OPC_ICOH, TILEPRO_OPC_NONE, + BITFIELD(31, 2) /* index 1178 */, + CHILD(1183), CHILD(1211), CHILD(1239), CHILD(1239), + BITFIELD(53, 1) /* index 1183 */, + CHILD(1186), TILEPRO_OPC_NONE, + BITFIELD(33, 2) /* index 1186 */, + TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, CHILD(1191), + BITFIELD(35, 2) /* index 1191 */, + TILEPRO_OPC_ILL, CHILD(1196), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, + BITFIELD(37, 2) /* index 1196 */, + TILEPRO_OPC_ILL, CHILD(1201), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, + BITFIELD(39, 2) /* index 1201 */, + TILEPRO_OPC_ILL, CHILD(1206), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, + BITFIELD(41, 2) /* index 1206 */, + TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_BPT, TILEPRO_OPC_ILL, + BITFIELD(53, 1) /* index 1211 */, + CHILD(1214), TILEPRO_OPC_NONE, + BITFIELD(33, 2) /* index 1214 */, + TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, CHILD(1219), + BITFIELD(35, 2) /* index 1219 */, + TILEPRO_OPC_ILL, CHILD(1224), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, + BITFIELD(37, 2) /* index 1224 */, + TILEPRO_OPC_ILL, CHILD(1229), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, + BITFIELD(39, 2) /* index 1229 */, + TILEPRO_OPC_ILL, CHILD(1234), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, + BITFIELD(41, 2) /* index 1234 */, + TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_RAISE, TILEPRO_OPC_ILL, + BITFIELD(53, 1) /* index 1239 */, + TILEPRO_OPC_ILL, TILEPRO_OPC_NONE, + BITFIELD(43, 3) /* index 1242 */, + CHILD(1251), CHILD(1254), CHILD(1257), CHILD(1275), CHILD(1278), + CHILD(1281), CHILD(1284), CHILD(1287), + BITFIELD(53, 1) /* index 1251 */, + TILEPRO_OPC_INV, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1254 */, + TILEPRO_OPC_IRET, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1257 */, + CHILD(1260), TILEPRO_OPC_NONE, + BITFIELD(31, 2) /* index 1260 */, + TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(1265), + BITFIELD(33, 2) /* index 1265 */, + TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(1270), + BITFIELD(35, 2) /* index 1270 */, + TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_PREFETCH, + BITFIELD(53, 1) /* index 1275 */, + TILEPRO_OPC_LB_U, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1278 */, + TILEPRO_OPC_LH, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1281 */, + TILEPRO_OPC_LH_U, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1284 */, + TILEPRO_OPC_LW, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1287 */, + TILEPRO_OPC_MF, TILEPRO_OPC_NONE, + BITFIELD(43, 3) /* index 1290 */, + CHILD(1299), CHILD(1302), CHILD(1305), CHILD(1308), CHILD(1311), + CHILD(1314), CHILD(1317), CHILD(1320), + BITFIELD(53, 1) /* index 1299 */, + TILEPRO_OPC_NAP, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1302 */, + TILEPRO_OPC_NOP, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1305 */, + TILEPRO_OPC_SWINT0, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1308 */, + TILEPRO_OPC_SWINT1, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1311 */, + TILEPRO_OPC_SWINT2, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1314 */, + TILEPRO_OPC_SWINT3, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1317 */, + TILEPRO_OPC_TNS, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1320 */, + TILEPRO_OPC_WH64, TILEPRO_OPC_NONE, + BITFIELD(43, 2) /* index 1323 */, + CHILD(1328), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(45, 1) /* index 1328 */, + CHILD(1331), TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1331 */, + TILEPRO_OPC_LW_NA, TILEPRO_OPC_NONE, + BITFIELD(46, 7) /* index 1334 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + CHILD(1463), CHILD(1463), CHILD(1463), CHILD(1463), CHILD(1466), + CHILD(1466), CHILD(1466), CHILD(1466), CHILD(1469), CHILD(1469), + CHILD(1469), CHILD(1469), CHILD(1472), CHILD(1472), CHILD(1472), + CHILD(1472), CHILD(1475), CHILD(1475), CHILD(1475), CHILD(1475), + CHILD(1478), CHILD(1478), CHILD(1478), CHILD(1478), CHILD(1481), + CHILD(1481), CHILD(1481), CHILD(1481), CHILD(1484), CHILD(1484), + CHILD(1484), CHILD(1484), CHILD(1487), CHILD(1487), CHILD(1487), + CHILD(1487), CHILD(1490), CHILD(1490), CHILD(1490), CHILD(1490), + CHILD(1151), CHILD(1493), CHILD(1517), CHILD(1529), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1463 */, + TILEPRO_OPC_RLI_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1466 */, + TILEPRO_OPC_SHLIB_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1469 */, + TILEPRO_OPC_SHLIH_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1472 */, + TILEPRO_OPC_SHLI_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1475 */, + TILEPRO_OPC_SHRIB_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1478 */, + TILEPRO_OPC_SHRIH_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1481 */, + TILEPRO_OPC_SHRI_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1484 */, + TILEPRO_OPC_SRAIB_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1487 */, + TILEPRO_OPC_SRAIH_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1490 */, + TILEPRO_OPC_SRAI_SN, TILEPRO_OPC_NONE, + BITFIELD(43, 3) /* index 1493 */, + CHILD(1251), CHILD(1254), CHILD(1502), CHILD(1505), CHILD(1508), + CHILD(1511), CHILD(1514), CHILD(1287), + BITFIELD(53, 1) /* index 1502 */, + TILEPRO_OPC_LB_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1505 */, + TILEPRO_OPC_LB_U_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1508 */, + TILEPRO_OPC_LH_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1511 */, + TILEPRO_OPC_LH_U_SN, TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1514 */, + TILEPRO_OPC_LW_SN, TILEPRO_OPC_NONE, + BITFIELD(43, 3) /* index 1517 */, + CHILD(1299), CHILD(1302), CHILD(1305), CHILD(1308), CHILD(1311), + CHILD(1314), CHILD(1526), CHILD(1320), + BITFIELD(53, 1) /* index 1526 */, + TILEPRO_OPC_TNS_SN, TILEPRO_OPC_NONE, + BITFIELD(43, 2) /* index 1529 */, + CHILD(1534), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(45, 1) /* index 1534 */, + CHILD(1537), TILEPRO_OPC_NONE, + BITFIELD(53, 1) /* index 1537 */, + TILEPRO_OPC_LW_NA_SN, TILEPRO_OPC_NONE, +}; + +static const unsigned short decode_Y0_fsm[168] = +{ + BITFIELD(27, 4) /* index 0 */, + TILEPRO_OPC_NONE, CHILD(17), CHILD(22), CHILD(27), CHILD(47), CHILD(52), + CHILD(57), CHILD(62), CHILD(67), TILEPRO_OPC_ADDI, CHILD(72), CHILD(102), + TILEPRO_OPC_SEQI, CHILD(117), TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U, + BITFIELD(18, 2) /* index 17 */, + TILEPRO_OPC_ADD, TILEPRO_OPC_S1A, TILEPRO_OPC_S2A, TILEPRO_OPC_SUB, + BITFIELD(18, 2) /* index 22 */, + TILEPRO_OPC_MNZ, TILEPRO_OPC_MVNZ, TILEPRO_OPC_MVZ, TILEPRO_OPC_MZ, + BITFIELD(18, 2) /* index 27 */, + TILEPRO_OPC_AND, TILEPRO_OPC_NOR, CHILD(32), TILEPRO_OPC_XOR, + BITFIELD(12, 2) /* index 32 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(37), + BITFIELD(14, 2) /* index 37 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(42), + BITFIELD(16, 2) /* index 42 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE, + BITFIELD(18, 2) /* index 47 */, + TILEPRO_OPC_RL, TILEPRO_OPC_SHL, TILEPRO_OPC_SHR, TILEPRO_OPC_SRA, + BITFIELD(18, 2) /* index 52 */, + TILEPRO_OPC_SLTE, TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLT, TILEPRO_OPC_SLT_U, + BITFIELD(18, 2) /* index 57 */, + TILEPRO_OPC_MULHLSA_UU, TILEPRO_OPC_S3A, TILEPRO_OPC_SEQ, TILEPRO_OPC_SNE, + BITFIELD(18, 2) /* index 62 */, + TILEPRO_OPC_MULHH_SS, TILEPRO_OPC_MULHH_UU, TILEPRO_OPC_MULLL_SS, + TILEPRO_OPC_MULLL_UU, + BITFIELD(18, 2) /* index 67 */, + TILEPRO_OPC_MULHHA_SS, TILEPRO_OPC_MULHHA_UU, TILEPRO_OPC_MULLLA_SS, + TILEPRO_OPC_MULLLA_UU, + BITFIELD(0, 2) /* index 72 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(77), + BITFIELD(2, 2) /* index 77 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(82), + BITFIELD(4, 2) /* index 82 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(87), + BITFIELD(6, 2) /* index 87 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(92), + BITFIELD(8, 2) /* index 92 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(97), + BITFIELD(10, 2) /* index 97 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO, + BITFIELD(6, 2) /* index 102 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(107), + BITFIELD(8, 2) /* index 107 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(112), + BITFIELD(10, 2) /* index 112 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI, + BITFIELD(15, 5) /* index 117 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_RLI, TILEPRO_OPC_RLI, TILEPRO_OPC_RLI, TILEPRO_OPC_RLI, + TILEPRO_OPC_SHLI, TILEPRO_OPC_SHLI, TILEPRO_OPC_SHLI, TILEPRO_OPC_SHLI, + TILEPRO_OPC_SHRI, TILEPRO_OPC_SHRI, TILEPRO_OPC_SHRI, TILEPRO_OPC_SHRI, + TILEPRO_OPC_SRAI, TILEPRO_OPC_SRAI, TILEPRO_OPC_SRAI, TILEPRO_OPC_SRAI, + CHILD(150), CHILD(159), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(12, 3) /* index 150 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_BITX, TILEPRO_OPC_BYTEX, TILEPRO_OPC_CLZ, + TILEPRO_OPC_CTZ, TILEPRO_OPC_FNOP, TILEPRO_OPC_NOP, TILEPRO_OPC_PCNT, + BITFIELD(12, 3) /* index 159 */, + TILEPRO_OPC_TBLIDXB0, TILEPRO_OPC_TBLIDXB1, TILEPRO_OPC_TBLIDXB2, + TILEPRO_OPC_TBLIDXB3, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, +}; + +static const unsigned short decode_Y1_fsm[140] = +{ + BITFIELD(59, 4) /* index 0 */, + TILEPRO_OPC_NONE, CHILD(17), CHILD(22), CHILD(27), CHILD(47), CHILD(52), + CHILD(57), TILEPRO_OPC_ADDI, CHILD(62), CHILD(92), TILEPRO_OPC_SEQI, + CHILD(107), TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U, TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, + BITFIELD(49, 2) /* index 17 */, + TILEPRO_OPC_ADD, TILEPRO_OPC_S1A, TILEPRO_OPC_S2A, TILEPRO_OPC_SUB, + BITFIELD(49, 2) /* index 22 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_MNZ, TILEPRO_OPC_MZ, TILEPRO_OPC_NONE, + BITFIELD(49, 2) /* index 27 */, + TILEPRO_OPC_AND, TILEPRO_OPC_NOR, CHILD(32), TILEPRO_OPC_XOR, + BITFIELD(43, 2) /* index 32 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(37), + BITFIELD(45, 2) /* index 37 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(42), + BITFIELD(47, 2) /* index 42 */, + TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE, + BITFIELD(49, 2) /* index 47 */, + TILEPRO_OPC_RL, TILEPRO_OPC_SHL, TILEPRO_OPC_SHR, TILEPRO_OPC_SRA, + BITFIELD(49, 2) /* index 52 */, + TILEPRO_OPC_SLTE, TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLT, TILEPRO_OPC_SLT_U, + BITFIELD(49, 2) /* index 57 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_S3A, TILEPRO_OPC_SEQ, TILEPRO_OPC_SNE, + BITFIELD(31, 2) /* index 62 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(67), + BITFIELD(33, 2) /* index 67 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(72), + BITFIELD(35, 2) /* index 72 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(77), + BITFIELD(37, 2) /* index 77 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(82), + BITFIELD(39, 2) /* index 82 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(87), + BITFIELD(41, 2) /* index 87 */, + TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO, + BITFIELD(37, 2) /* index 92 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(97), + BITFIELD(39, 2) /* index 97 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(102), + BITFIELD(41, 2) /* index 102 */, + TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI, + BITFIELD(48, 3) /* index 107 */, + TILEPRO_OPC_NONE, TILEPRO_OPC_RLI, TILEPRO_OPC_SHLI, TILEPRO_OPC_SHRI, + TILEPRO_OPC_SRAI, CHILD(116), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(43, 3) /* index 116 */, + TILEPRO_OPC_NONE, CHILD(125), CHILD(130), CHILD(135), TILEPRO_OPC_NONE, + TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(46, 2) /* index 125 */, + TILEPRO_OPC_FNOP, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(46, 2) /* index 130 */, + TILEPRO_OPC_ILL, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, + BITFIELD(46, 2) /* index 135 */, + TILEPRO_OPC_NOP, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, +}; + +static const unsigned short decode_Y2_fsm[24] = +{ + BITFIELD(56, 3) /* index 0 */, + CHILD(9), TILEPRO_OPC_LB_U, TILEPRO_OPC_LH, TILEPRO_OPC_LH_U, + TILEPRO_OPC_LW, TILEPRO_OPC_SB, TILEPRO_OPC_SH, TILEPRO_OPC_SW, + BITFIELD(20, 2) /* index 9 */, + TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(14), + BITFIELD(22, 2) /* index 14 */, + TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(19), + BITFIELD(24, 2) /* index 19 */, + TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_PREFETCH, +}; + +#undef BITFIELD +#undef CHILD + +const unsigned short * const +tilepro_bundle_decoder_fsms[TILEPRO_NUM_PIPELINE_ENCODINGS] = +{ + decode_X0_fsm, + decode_X1_fsm, + decode_Y0_fsm, + decode_Y1_fsm, + decode_Y2_fsm +}; + +#ifndef DISASM_ONLY +const struct tilepro_sn_opcode tilepro_sn_opcodes[23] = +{ + { "bz", TILEPRO_SN_OPC_BZ, + 1 /* num_operands */, + /* operands */ + { 38 }, + /* fixed_bit_mask */ + 0xfc00, + /* fixed_bit_value */ + 0xe000 + }, + { "bnz", TILEPRO_SN_OPC_BNZ, + 1 /* num_operands */, + /* operands */ + { 38 }, + /* fixed_bit_mask */ + 0xfc00, + /* fixed_bit_value */ + 0xe400 + }, + { "jrr", TILEPRO_SN_OPC_JRR, + 1 /* num_operands */, + /* operands */ + { 39 }, + /* fixed_bit_mask */ + 0xff00, + /* fixed_bit_value */ + 0x0600 + }, + { "fnop", TILEPRO_SN_OPC_FNOP, + 0 /* num_operands */, + /* operands */ + { 0, }, + /* fixed_bit_mask */ + 0xffff, + /* fixed_bit_value */ + 0x0003 + }, + { "blz", TILEPRO_SN_OPC_BLZ, + 1 /* num_operands */, + /* operands */ + { 38 }, + /* fixed_bit_mask */ + 0xfc00, + /* fixed_bit_value */ + 0xf000 + }, + { "nop", TILEPRO_SN_OPC_NOP, + 0 /* num_operands */, + /* operands */ + { 0, }, + /* fixed_bit_mask */ + 0xffff, + /* fixed_bit_value */ + 0x0002 + }, + { "movei", TILEPRO_SN_OPC_MOVEI, + 1 /* num_operands */, + /* operands */ + { 40 }, + /* fixed_bit_mask */ + 0xff00, + /* fixed_bit_value */ + 0x0400 + }, + { "move", TILEPRO_SN_OPC_MOVE, + 2 /* num_operands */, + /* operands */ + { 41, 42 }, + /* fixed_bit_mask */ + 0xfff0, + /* fixed_bit_value */ + 0x0080 + }, + { "bgez", TILEPRO_SN_OPC_BGEZ, + 1 /* num_operands */, + /* operands */ + { 38 }, + /* fixed_bit_mask */ + 0xfc00, + /* fixed_bit_value */ + 0xf400 + }, + { "jr", TILEPRO_SN_OPC_JR, + 1 /* num_operands */, + /* operands */ + { 42 }, + /* fixed_bit_mask */ + 0xfff0, + /* fixed_bit_value */ + 0x0040 + }, + { "blez", TILEPRO_SN_OPC_BLEZ, + 1 /* num_operands */, + /* operands */ + { 38 }, + /* fixed_bit_mask */ + 0xfc00, + /* fixed_bit_value */ + 0xec00 + }, + { "bbns", TILEPRO_SN_OPC_BBNS, + 1 /* num_operands */, + /* operands */ + { 38 }, + /* fixed_bit_mask */ + 0xfc00, + /* fixed_bit_value */ + 0xfc00 + }, + { "jalrr", TILEPRO_SN_OPC_JALRR, + 1 /* num_operands */, + /* operands */ + { 39 }, + /* fixed_bit_mask */ + 0xff00, + /* fixed_bit_value */ + 0x0700 + }, + { "bpt", TILEPRO_SN_OPC_BPT, + 0 /* num_operands */, + /* operands */ + { 0, }, + /* fixed_bit_mask */ + 0xffff, + /* fixed_bit_value */ + 0x0001 + }, + { "jalr", TILEPRO_SN_OPC_JALR, + 1 /* num_operands */, + /* operands */ + { 42 }, + /* fixed_bit_mask */ + 0xfff0, + /* fixed_bit_value */ + 0x0050 + }, + { "shr1", TILEPRO_SN_OPC_SHR1, + 2 /* num_operands */, + /* operands */ + { 41, 42 }, + /* fixed_bit_mask */ + 0xfff0, + /* fixed_bit_value */ + 0x0090 + }, + { "bgz", TILEPRO_SN_OPC_BGZ, + 1 /* num_operands */, + /* operands */ + { 38 }, + /* fixed_bit_mask */ + 0xfc00, + /* fixed_bit_value */ + 0xe800 + }, + { "bbs", TILEPRO_SN_OPC_BBS, + 1 /* num_operands */, + /* operands */ + { 38 }, + /* fixed_bit_mask */ + 0xfc00, + /* fixed_bit_value */ + 0xf800 + }, + { "shl8ii", TILEPRO_SN_OPC_SHL8II, + 1 /* num_operands */, + /* operands */ + { 39 }, + /* fixed_bit_mask */ + 0xff00, + /* fixed_bit_value */ + 0x0300 + }, + { "addi", TILEPRO_SN_OPC_ADDI, + 1 /* num_operands */, + /* operands */ + { 40 }, + /* fixed_bit_mask */ + 0xff00, + /* fixed_bit_value */ + 0x0500 + }, + { "halt", TILEPRO_SN_OPC_HALT, + 0 /* num_operands */, + /* operands */ + { 0, }, + /* fixed_bit_mask */ + 0xffff, + /* fixed_bit_value */ + 0x0000 + }, + { "route", TILEPRO_SN_OPC_ROUTE, 0, { 0, }, 0, 0, + }, + { 0, TILEPRO_SN_OPC_NONE, 0, { 0, }, 0, 0, + } +}; + +const unsigned char tilepro_sn_route_encode[6 * 6 * 6] = +{ + 0xdf, + 0xde, + 0xdd, + 0xdc, + 0xdb, + 0xda, + 0xb9, + 0xb8, + 0xa1, + 0xa0, + 0x11, + 0x10, + 0x9f, + 0x9e, + 0x9d, + 0x9c, + 0x9b, + 0x9a, + 0x79, + 0x78, + 0x61, + 0x60, + 0xb, + 0xa, + 0x5f, + 0x5e, + 0x5d, + 0x5c, + 0x5b, + 0x5a, + 0x1f, + 0x1e, + 0x1d, + 0x1c, + 0x1b, + 0x1a, + 0xd7, + 0xd6, + 0xd5, + 0xd4, + 0xd3, + 0xd2, + 0xa7, + 0xa6, + 0xb1, + 0xb0, + 0x13, + 0x12, + 0x97, + 0x96, + 0x95, + 0x94, + 0x93, + 0x92, + 0x67, + 0x66, + 0x71, + 0x70, + 0x9, + 0x8, + 0x57, + 0x56, + 0x55, + 0x54, + 0x53, + 0x52, + 0x17, + 0x16, + 0x15, + 0x14, + 0x19, + 0x18, + 0xcf, + 0xce, + 0xcd, + 0xcc, + 0xcb, + 0xca, + 0xaf, + 0xae, + 0xad, + 0xac, + 0xab, + 0xaa, + 0x8f, + 0x8e, + 0x8d, + 0x8c, + 0x8b, + 0x8a, + 0x6f, + 0x6e, + 0x6d, + 0x6c, + 0x6b, + 0x6a, + 0x4f, + 0x4e, + 0x4d, + 0x4c, + 0x4b, + 0x4a, + 0x2f, + 0x2e, + 0x2d, + 0x2c, + 0x2b, + 0x2a, + 0xc9, + 0xc8, + 0xc5, + 0xc4, + 0xc3, + 0xc2, + 0xa9, + 0xa8, + 0xa5, + 0xa4, + 0xa3, + 0xa2, + 0x89, + 0x88, + 0x85, + 0x84, + 0x83, + 0x82, + 0x69, + 0x68, + 0x65, + 0x64, + 0x63, + 0x62, + 0x47, + 0x46, + 0x45, + 0x44, + 0x43, + 0x42, + 0x27, + 0x26, + 0x25, + 0x24, + 0x23, + 0x22, + 0xd9, + 0xd8, + 0xc1, + 0xc0, + 0x3b, + 0x3a, + 0xbf, + 0xbe, + 0xbd, + 0xbc, + 0xbb, + 0xba, + 0x99, + 0x98, + 0x81, + 0x80, + 0x31, + 0x30, + 0x7f, + 0x7e, + 0x7d, + 0x7c, + 0x7b, + 0x7a, + 0x59, + 0x58, + 0x3d, + 0x3c, + 0x49, + 0x48, + 0xf, + 0xe, + 0xd, + 0xc, + 0x29, + 0x28, + 0xc7, + 0xc6, + 0xd1, + 0xd0, + 0x39, + 0x38, + 0xb7, + 0xb6, + 0xb5, + 0xb4, + 0xb3, + 0xb2, + 0x87, + 0x86, + 0x91, + 0x90, + 0x33, + 0x32, + 0x77, + 0x76, + 0x75, + 0x74, + 0x73, + 0x72, + 0x3f, + 0x3e, + 0x51, + 0x50, + 0x41, + 0x40, + 0x37, + 0x36, + 0x35, + 0x34, + 0x21, + 0x20 +}; + +const signed char tilepro_sn_route_decode[256][3] = +{ + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { 5, 3, 1 }, + { 4, 3, 1 }, + { 5, 3, 0 }, + { 4, 3, 0 }, + { 3, 5, 4 }, + { 2, 5, 4 }, + { 1, 5, 4 }, + { 0, 5, 4 }, + { 5, 1, 0 }, + { 4, 1, 0 }, + { 5, 1, 1 }, + { 4, 1, 1 }, + { 3, 5, 1 }, + { 2, 5, 1 }, + { 1, 5, 1 }, + { 0, 5, 1 }, + { 5, 5, 1 }, + { 4, 5, 1 }, + { 5, 5, 0 }, + { 4, 5, 0 }, + { 3, 5, 0 }, + { 2, 5, 0 }, + { 1, 5, 0 }, + { 0, 5, 0 }, + { 5, 5, 5 }, + { 4, 5, 5 }, + { 5, 5, 3 }, + { 4, 5, 3 }, + { 3, 5, 3 }, + { 2, 5, 3 }, + { 1, 5, 3 }, + { 0, 5, 3 }, + { 5, 5, 4 }, + { 4, 5, 4 }, + { 5, 5, 2 }, + { 4, 5, 2 }, + { 3, 5, 2 }, + { 2, 5, 2 }, + { 1, 5, 2 }, + { 0, 5, 2 }, + { 5, 2, 4 }, + { 4, 2, 4 }, + { 5, 2, 5 }, + { 4, 2, 5 }, + { 3, 5, 5 }, + { 2, 5, 5 }, + { 1, 5, 5 }, + { 0, 5, 5 }, + { 5, 0, 5 }, + { 4, 0, 5 }, + { 5, 0, 4 }, + { 4, 0, 4 }, + { 3, 4, 4 }, + { 2, 4, 4 }, + { 1, 4, 5 }, + { 0, 4, 5 }, + { 5, 4, 5 }, + { 4, 4, 5 }, + { 5, 4, 3 }, + { 4, 4, 3 }, + { 3, 4, 3 }, + { 2, 4, 3 }, + { 1, 4, 3 }, + { 0, 4, 3 }, + { 5, 4, 4 }, + { 4, 4, 4 }, + { 5, 4, 2 }, + { 4, 4, 2 }, + { 3, 4, 2 }, + { 2, 4, 2 }, + { 1, 4, 2 }, + { 0, 4, 2 }, + { 3, 4, 5 }, + { 2, 4, 5 }, + { 5, 4, 1 }, + { 4, 4, 1 }, + { 3, 4, 1 }, + { 2, 4, 1 }, + { 1, 4, 1 }, + { 0, 4, 1 }, + { 1, 4, 4 }, + { 0, 4, 4 }, + { 5, 4, 0 }, + { 4, 4, 0 }, + { 3, 4, 0 }, + { 2, 4, 0 }, + { 1, 4, 0 }, + { 0, 4, 0 }, + { 3, 3, 0 }, + { 2, 3, 0 }, + { 5, 3, 3 }, + { 4, 3, 3 }, + { 3, 3, 3 }, + { 2, 3, 3 }, + { 1, 3, 1 }, + { 0, 3, 1 }, + { 1, 3, 3 }, + { 0, 3, 3 }, + { 5, 3, 2 }, + { 4, 3, 2 }, + { 3, 3, 2 }, + { 2, 3, 2 }, + { 1, 3, 2 }, + { 0, 3, 2 }, + { 3, 3, 1 }, + { 2, 3, 1 }, + { 5, 3, 5 }, + { 4, 3, 5 }, + { 3, 3, 5 }, + { 2, 3, 5 }, + { 1, 3, 5 }, + { 0, 3, 5 }, + { 1, 3, 0 }, + { 0, 3, 0 }, + { 5, 3, 4 }, + { 4, 3, 4 }, + { 3, 3, 4 }, + { 2, 3, 4 }, + { 1, 3, 4 }, + { 0, 3, 4 }, + { 3, 2, 4 }, + { 2, 2, 4 }, + { 5, 2, 3 }, + { 4, 2, 3 }, + { 3, 2, 3 }, + { 2, 2, 3 }, + { 1, 2, 5 }, + { 0, 2, 5 }, + { 1, 2, 3 }, + { 0, 2, 3 }, + { 5, 2, 2 }, + { 4, 2, 2 }, + { 3, 2, 2 }, + { 2, 2, 2 }, + { 1, 2, 2 }, + { 0, 2, 2 }, + { 3, 2, 5 }, + { 2, 2, 5 }, + { 5, 2, 1 }, + { 4, 2, 1 }, + { 3, 2, 1 }, + { 2, 2, 1 }, + { 1, 2, 1 }, + { 0, 2, 1 }, + { 1, 2, 4 }, + { 0, 2, 4 }, + { 5, 2, 0 }, + { 4, 2, 0 }, + { 3, 2, 0 }, + { 2, 2, 0 }, + { 1, 2, 0 }, + { 0, 2, 0 }, + { 3, 1, 0 }, + { 2, 1, 0 }, + { 5, 1, 3 }, + { 4, 1, 3 }, + { 3, 1, 3 }, + { 2, 1, 3 }, + { 1, 1, 1 }, + { 0, 1, 1 }, + { 1, 1, 3 }, + { 0, 1, 3 }, + { 5, 1, 2 }, + { 4, 1, 2 }, + { 3, 1, 2 }, + { 2, 1, 2 }, + { 1, 1, 2 }, + { 0, 1, 2 }, + { 3, 1, 1 }, + { 2, 1, 1 }, + { 5, 1, 5 }, + { 4, 1, 5 }, + { 3, 1, 5 }, + { 2, 1, 5 }, + { 1, 1, 5 }, + { 0, 1, 5 }, + { 1, 1, 0 }, + { 0, 1, 0 }, + { 5, 1, 4 }, + { 4, 1, 4 }, + { 3, 1, 4 }, + { 2, 1, 4 }, + { 1, 1, 4 }, + { 0, 1, 4 }, + { 3, 0, 4 }, + { 2, 0, 4 }, + { 5, 0, 3 }, + { 4, 0, 3 }, + { 3, 0, 3 }, + { 2, 0, 3 }, + { 1, 0, 5 }, + { 0, 0, 5 }, + { 1, 0, 3 }, + { 0, 0, 3 }, + { 5, 0, 2 }, + { 4, 0, 2 }, + { 3, 0, 2 }, + { 2, 0, 2 }, + { 1, 0, 2 }, + { 0, 0, 2 }, + { 3, 0, 5 }, + { 2, 0, 5 }, + { 5, 0, 1 }, + { 4, 0, 1 }, + { 3, 0, 1 }, + { 2, 0, 1 }, + { 1, 0, 1 }, + { 0, 0, 1 }, + { 1, 0, 4 }, + { 0, 0, 4 }, + { 5, 0, 0 }, + { 4, 0, 0 }, + { 3, 0, 0 }, + { 2, 0, 0 }, + { 1, 0, 0 }, + { 0, 0, 0 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 }, + { -1, -1, -1 } +}; + +const char tilepro_sn_direction_names[6][5] = +{ + "w", + "c", + "acc", + "n", + "e", + "s" +}; + +const signed char tilepro_sn_dest_map[6][6] = +{ + { -1, 3, 4, 5, 1, 2 } /* val -> w */, + { -1, 3, 4, 5, 0, 2 } /* val -> c */, + { -1, 3, 4, 5, 0, 1 } /* val -> acc */, + { -1, 4, 5, 0, 1, 2 } /* val -> n */, + { -1, 3, 5, 0, 1, 2 } /* val -> e */, + { -1, 3, 4, 0, 1, 2 } /* val -> s */ +}; +#endif /* DISASM_ONLY */ + +const struct tilepro_operand tilepro_operands[43] = +{ + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_X0), + 8, 1, 0, 0, 0, 0, + create_Imm8_X0, get_Imm8_X0 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_X1), + 8, 1, 0, 0, 0, 0, + create_Imm8_X1, get_Imm8_X1 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_Y0), + 8, 1, 0, 0, 0, 0, + create_Imm8_Y0, get_Imm8_Y0 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_Y1), + 8, 1, 0, 0, 0, 0, + create_Imm8_Y1, get_Imm8_Y1 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM16_X0), + 16, 1, 0, 0, 0, 0, + create_Imm16_X0, get_Imm16_X0 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM16_X1), + 16, 1, 0, 0, 0, 0, + create_Imm16_X1, get_Imm16_X1 + }, + { + TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(TILEPRO_JOFFLONG_X1), + 29, 1, 0, 0, 1, TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, + create_JOffLong_X1, get_JOffLong_X1 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 0, 1, 0, 0, + create_Dest_X0, get_Dest_X0 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcA_X0, get_SrcA_X0 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 0, 1, 0, 0, + create_Dest_X1, get_Dest_X1 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcA_X1, get_SrcA_X1 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 0, 1, 0, 0, + create_Dest_Y0, get_Dest_Y0 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcA_Y0, get_SrcA_Y0 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 0, 1, 0, 0, + create_Dest_Y1, get_Dest_Y1 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcA_Y1, get_SrcA_Y1 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcA_Y2, get_SrcA_Y2 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcB_X0, get_SrcB_X0 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcB_X1, get_SrcB_X1 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcB_Y0, get_SrcB_Y0 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcB_Y1, get_SrcB_Y1 + }, + { + TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(TILEPRO_BROFF_X1), + 17, 1, 0, 0, 1, TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, + create_BrOff_X1, get_BrOff_X1 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 1, 0, 0, + create_Dest_X0, get_Dest_X0 + }, + { + TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(NONE), + 28, 1, 0, 0, 1, TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, + create_JOff_X1, get_JOff_X1 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 0, 1, 0, 0, + create_SrcBDest_Y2, get_SrcBDest_Y2 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 1, 0, 0, + create_SrcA_X1, get_SrcA_X1 + }, + { + TILEPRO_OP_TYPE_SPR, BFD_RELOC(TILEPRO_MF_IMM15_X1), + 15, 0, 0, 0, 0, 0, + create_MF_Imm15_X1, get_MF_Imm15_X1 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMSTART_X0), + 5, 0, 0, 0, 0, 0, + create_MMStart_X0, get_MMStart_X0 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMEND_X0), + 5, 0, 0, 0, 0, 0, + create_MMEnd_X0, get_MMEnd_X0 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMSTART_X1), + 5, 0, 0, 0, 0, 0, + create_MMStart_X1, get_MMStart_X1 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMEND_X1), + 5, 0, 0, 0, 0, 0, + create_MMEnd_X1, get_MMEnd_X1 + }, + { + TILEPRO_OP_TYPE_SPR, BFD_RELOC(TILEPRO_MT_IMM15_X1), + 15, 0, 0, 0, 0, 0, + create_MT_Imm15_X1, get_MT_Imm15_X1 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 1, 0, 0, + create_Dest_Y0, get_Dest_Y0 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_X0), + 5, 0, 0, 0, 0, 0, + create_ShAmt_X0, get_ShAmt_X0 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_X1), + 5, 0, 0, 0, 0, 0, + create_ShAmt_X1, get_ShAmt_X1 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_Y0), + 5, 0, 0, 0, 0, 0, + create_ShAmt_Y0, get_ShAmt_Y0 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_Y1), + 5, 0, 0, 0, 0, 0, + create_ShAmt_Y1, get_ShAmt_Y1 + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 6, 0, 1, 0, 0, 0, + create_SrcBDest_Y2, get_SrcBDest_Y2 + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_DEST_IMM8_X1), + 8, 1, 0, 0, 0, 0, + create_Dest_Imm8_X1, get_Dest_Imm8_X1 + }, + { + TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(NONE), + 10, 1, 0, 0, 1, TILEPRO_LOG2_SN_INSTRUCTION_SIZE_IN_BYTES, + create_BrOff_SN, get_BrOff_SN + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(NONE), + 8, 0, 0, 0, 0, 0, + create_Imm8_SN, get_Imm8_SN + }, + { + TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(NONE), + 8, 1, 0, 0, 0, 0, + create_Imm8_SN, get_Imm8_SN + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 2, 0, 0, 1, 0, 0, + create_Dest_SN, get_Dest_SN + }, + { + TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), + 2, 0, 1, 0, 0, 0, + create_Src_SN, get_Src_SN + } +}; + +#ifndef DISASM_ONLY +const struct tilepro_spr tilepro_sprs[] = +{ + { 0, "MPL_ITLB_MISS_SET_0" }, + { 1, "MPL_ITLB_MISS_SET_1" }, + { 2, "MPL_ITLB_MISS_SET_2" }, + { 3, "MPL_ITLB_MISS_SET_3" }, + { 4, "MPL_ITLB_MISS" }, + { 256, "ITLB_CURRENT_0" }, + { 257, "ITLB_CURRENT_1" }, + { 258, "ITLB_CURRENT_2" }, + { 259, "ITLB_CURRENT_3" }, + { 260, "ITLB_INDEX" }, + { 261, "ITLB_MATCH_0" }, + { 262, "ITLB_PR" }, + { 263, "NUMBER_ITLB" }, + { 264, "REPLACEMENT_ITLB" }, + { 265, "WIRED_ITLB" }, + { 266, "ITLB_PERF" }, + { 512, "MPL_MEM_ERROR_SET_0" }, + { 513, "MPL_MEM_ERROR_SET_1" }, + { 514, "MPL_MEM_ERROR_SET_2" }, + { 515, "MPL_MEM_ERROR_SET_3" }, + { 516, "MPL_MEM_ERROR" }, + { 517, "L1_I_ERROR" }, + { 518, "MEM_ERROR_CBOX_ADDR" }, + { 519, "MEM_ERROR_CBOX_STATUS" }, + { 520, "MEM_ERROR_ENABLE" }, + { 521, "MEM_ERROR_MBOX_ADDR" }, + { 522, "MEM_ERROR_MBOX_STATUS" }, + { 523, "SNIC_ERROR_LOG_STATUS" }, + { 524, "SNIC_ERROR_LOG_VA" }, + { 525, "XDN_DEMUX_ERROR" }, + { 1024, "MPL_ILL_SET_0" }, + { 1025, "MPL_ILL_SET_1" }, + { 1026, "MPL_ILL_SET_2" }, + { 1027, "MPL_ILL_SET_3" }, + { 1028, "MPL_ILL" }, + { 1536, "MPL_GPV_SET_0" }, + { 1537, "MPL_GPV_SET_1" }, + { 1538, "MPL_GPV_SET_2" }, + { 1539, "MPL_GPV_SET_3" }, + { 1540, "MPL_GPV" }, + { 1541, "GPV_REASON" }, + { 2048, "MPL_SN_ACCESS_SET_0" }, + { 2049, "MPL_SN_ACCESS_SET_1" }, + { 2050, "MPL_SN_ACCESS_SET_2" }, + { 2051, "MPL_SN_ACCESS_SET_3" }, + { 2052, "MPL_SN_ACCESS" }, + { 2053, "SNCTL" }, + { 2054, "SNFIFO_DATA" }, + { 2055, "SNFIFO_SEL" }, + { 2056, "SNIC_INVADDR" }, + { 2057, "SNISTATE" }, + { 2058, "SNOSTATE" }, + { 2059, "SNPC" }, + { 2060, "SNSTATIC" }, + { 2304, "SN_DATA_AVAIL" }, + { 2560, "MPL_IDN_ACCESS_SET_0" }, + { 2561, "MPL_IDN_ACCESS_SET_1" }, + { 2562, "MPL_IDN_ACCESS_SET_2" }, + { 2563, "MPL_IDN_ACCESS_SET_3" }, + { 2564, "MPL_IDN_ACCESS" }, + { 2565, "IDN_DEMUX_CA_COUNT" }, + { 2566, "IDN_DEMUX_COUNT_0" }, + { 2567, "IDN_DEMUX_COUNT_1" }, + { 2568, "IDN_DEMUX_CTL" }, + { 2569, "IDN_DEMUX_CURR_TAG" }, + { 2570, "IDN_DEMUX_QUEUE_SEL" }, + { 2571, "IDN_DEMUX_STATUS" }, + { 2572, "IDN_DEMUX_WRITE_FIFO" }, + { 2573, "IDN_DEMUX_WRITE_QUEUE" }, + { 2574, "IDN_PENDING" }, + { 2575, "IDN_SP_FIFO_DATA" }, + { 2576, "IDN_SP_FIFO_SEL" }, + { 2577, "IDN_SP_FREEZE" }, + { 2578, "IDN_SP_STATE" }, + { 2579, "IDN_TAG_0" }, + { 2580, "IDN_TAG_1" }, + { 2581, "IDN_TAG_VALID" }, + { 2582, "IDN_TILE_COORD" }, + { 2816, "IDN_CA_DATA" }, + { 2817, "IDN_CA_REM" }, + { 2818, "IDN_CA_TAG" }, + { 2819, "IDN_DATA_AVAIL" }, + { 3072, "MPL_UDN_ACCESS_SET_0" }, + { 3073, "MPL_UDN_ACCESS_SET_1" }, + { 3074, "MPL_UDN_ACCESS_SET_2" }, + { 3075, "MPL_UDN_ACCESS_SET_3" }, + { 3076, "MPL_UDN_ACCESS" }, + { 3077, "UDN_DEMUX_CA_COUNT" }, + { 3078, "UDN_DEMUX_COUNT_0" }, + { 3079, "UDN_DEMUX_COUNT_1" }, + { 3080, "UDN_DEMUX_COUNT_2" }, + { 3081, "UDN_DEMUX_COUNT_3" }, + { 3082, "UDN_DEMUX_CTL" }, + { 3083, "UDN_DEMUX_CURR_TAG" }, + { 3084, "UDN_DEMUX_QUEUE_SEL" }, + { 3085, "UDN_DEMUX_STATUS" }, + { 3086, "UDN_DEMUX_WRITE_FIFO" }, + { 3087, "UDN_DEMUX_WRITE_QUEUE" }, + { 3088, "UDN_PENDING" }, + { 3089, "UDN_SP_FIFO_DATA" }, + { 3090, "UDN_SP_FIFO_SEL" }, + { 3091, "UDN_SP_FREEZE" }, + { 3092, "UDN_SP_STATE" }, + { 3093, "UDN_TAG_0" }, + { 3094, "UDN_TAG_1" }, + { 3095, "UDN_TAG_2" }, + { 3096, "UDN_TAG_3" }, + { 3097, "UDN_TAG_VALID" }, + { 3098, "UDN_TILE_COORD" }, + { 3328, "UDN_CA_DATA" }, + { 3329, "UDN_CA_REM" }, + { 3330, "UDN_CA_TAG" }, + { 3331, "UDN_DATA_AVAIL" }, + { 3584, "MPL_IDN_REFILL_SET_0" }, + { 3585, "MPL_IDN_REFILL_SET_1" }, + { 3586, "MPL_IDN_REFILL_SET_2" }, + { 3587, "MPL_IDN_REFILL_SET_3" }, + { 3588, "MPL_IDN_REFILL" }, + { 3589, "IDN_REFILL_EN" }, + { 4096, "MPL_UDN_REFILL_SET_0" }, + { 4097, "MPL_UDN_REFILL_SET_1" }, + { 4098, "MPL_UDN_REFILL_SET_2" }, + { 4099, "MPL_UDN_REFILL_SET_3" }, + { 4100, "MPL_UDN_REFILL" }, + { 4101, "UDN_REFILL_EN" }, + { 4608, "MPL_IDN_COMPLETE_SET_0" }, + { 4609, "MPL_IDN_COMPLETE_SET_1" }, + { 4610, "MPL_IDN_COMPLETE_SET_2" }, + { 4611, "MPL_IDN_COMPLETE_SET_3" }, + { 4612, "MPL_IDN_COMPLETE" }, + { 4613, "IDN_REMAINING" }, + { 5120, "MPL_UDN_COMPLETE_SET_0" }, + { 5121, "MPL_UDN_COMPLETE_SET_1" }, + { 5122, "MPL_UDN_COMPLETE_SET_2" }, + { 5123, "MPL_UDN_COMPLETE_SET_3" }, + { 5124, "MPL_UDN_COMPLETE" }, + { 5125, "UDN_REMAINING" }, + { 5632, "MPL_SWINT_3_SET_0" }, + { 5633, "MPL_SWINT_3_SET_1" }, + { 5634, "MPL_SWINT_3_SET_2" }, + { 5635, "MPL_SWINT_3_SET_3" }, + { 5636, "MPL_SWINT_3" }, + { 6144, "MPL_SWINT_2_SET_0" }, + { 6145, "MPL_SWINT_2_SET_1" }, + { 6146, "MPL_SWINT_2_SET_2" }, + { 6147, "MPL_SWINT_2_SET_3" }, + { 6148, "MPL_SWINT_2" }, + { 6656, "MPL_SWINT_1_SET_0" }, + { 6657, "MPL_SWINT_1_SET_1" }, + { 6658, "MPL_SWINT_1_SET_2" }, + { 6659, "MPL_SWINT_1_SET_3" }, + { 6660, "MPL_SWINT_1" }, + { 7168, "MPL_SWINT_0_SET_0" }, + { 7169, "MPL_SWINT_0_SET_1" }, + { 7170, "MPL_SWINT_0_SET_2" }, + { 7171, "MPL_SWINT_0_SET_3" }, + { 7172, "MPL_SWINT_0" }, + { 7680, "MPL_UNALIGN_DATA_SET_0" }, + { 7681, "MPL_UNALIGN_DATA_SET_1" }, + { 7682, "MPL_UNALIGN_DATA_SET_2" }, + { 7683, "MPL_UNALIGN_DATA_SET_3" }, + { 7684, "MPL_UNALIGN_DATA" }, + { 8192, "MPL_DTLB_MISS_SET_0" }, + { 8193, "MPL_DTLB_MISS_SET_1" }, + { 8194, "MPL_DTLB_MISS_SET_2" }, + { 8195, "MPL_DTLB_MISS_SET_3" }, + { 8196, "MPL_DTLB_MISS" }, + { 8448, "AER_0" }, + { 8449, "AER_1" }, + { 8450, "DTLB_BAD_ADDR" }, + { 8451, "DTLB_BAD_ADDR_REASON" }, + { 8452, "DTLB_CURRENT_0" }, + { 8453, "DTLB_CURRENT_1" }, + { 8454, "DTLB_CURRENT_2" }, + { 8455, "DTLB_CURRENT_3" }, + { 8456, "DTLB_INDEX" }, + { 8457, "DTLB_MATCH_0" }, + { 8458, "NUMBER_DTLB" }, + { 8459, "PHYSICAL_MEMORY_MODE" }, + { 8460, "REPLACEMENT_DTLB" }, + { 8461, "WIRED_DTLB" }, + { 8462, "CACHE_RED_WAY_OVERRIDDEN" }, + { 8463, "DTLB_PERF" }, + { 8704, "MPL_DTLB_ACCESS_SET_0" }, + { 8705, "MPL_DTLB_ACCESS_SET_1" }, + { 8706, "MPL_DTLB_ACCESS_SET_2" }, + { 8707, "MPL_DTLB_ACCESS_SET_3" }, + { 8708, "MPL_DTLB_ACCESS" }, + { 9216, "MPL_DMATLB_MISS_SET_0" }, + { 9217, "MPL_DMATLB_MISS_SET_1" }, + { 9218, "MPL_DMATLB_MISS_SET_2" }, + { 9219, "MPL_DMATLB_MISS_SET_3" }, + { 9220, "MPL_DMATLB_MISS" }, + { 9472, "DMA_BAD_ADDR" }, + { 9473, "DMA_STATUS" }, + { 9728, "MPL_DMATLB_ACCESS_SET_0" }, + { 9729, "MPL_DMATLB_ACCESS_SET_1" }, + { 9730, "MPL_DMATLB_ACCESS_SET_2" }, + { 9731, "MPL_DMATLB_ACCESS_SET_3" }, + { 9732, "MPL_DMATLB_ACCESS" }, + { 10240, "MPL_SNITLB_MISS_SET_0" }, + { 10241, "MPL_SNITLB_MISS_SET_1" }, + { 10242, "MPL_SNITLB_MISS_SET_2" }, + { 10243, "MPL_SNITLB_MISS_SET_3" }, + { 10244, "MPL_SNITLB_MISS" }, + { 10245, "NUMBER_SNITLB" }, + { 10246, "REPLACEMENT_SNITLB" }, + { 10247, "SNITLB_CURRENT_0" }, + { 10248, "SNITLB_CURRENT_1" }, + { 10249, "SNITLB_CURRENT_2" }, + { 10250, "SNITLB_CURRENT_3" }, + { 10251, "SNITLB_INDEX" }, + { 10252, "SNITLB_MATCH_0" }, + { 10253, "SNITLB_PR" }, + { 10254, "WIRED_SNITLB" }, + { 10255, "SNITLB_STATUS" }, + { 10752, "MPL_SN_NOTIFY_SET_0" }, + { 10753, "MPL_SN_NOTIFY_SET_1" }, + { 10754, "MPL_SN_NOTIFY_SET_2" }, + { 10755, "MPL_SN_NOTIFY_SET_3" }, + { 10756, "MPL_SN_NOTIFY" }, + { 10757, "SN_NOTIFY_STATUS" }, + { 11264, "MPL_SN_FIREWALL_SET_0" }, + { 11265, "MPL_SN_FIREWALL_SET_1" }, + { 11266, "MPL_SN_FIREWALL_SET_2" }, + { 11267, "MPL_SN_FIREWALL_SET_3" }, + { 11268, "MPL_SN_FIREWALL" }, + { 11269, "SN_DIRECTION_PROTECT" }, + { 11776, "MPL_IDN_FIREWALL_SET_0" }, + { 11777, "MPL_IDN_FIREWALL_SET_1" }, + { 11778, "MPL_IDN_FIREWALL_SET_2" }, + { 11779, "MPL_IDN_FIREWALL_SET_3" }, + { 11780, "MPL_IDN_FIREWALL" }, + { 11781, "IDN_DIRECTION_PROTECT" }, + { 12288, "MPL_UDN_FIREWALL_SET_0" }, + { 12289, "MPL_UDN_FIREWALL_SET_1" }, + { 12290, "MPL_UDN_FIREWALL_SET_2" }, + { 12291, "MPL_UDN_FIREWALL_SET_3" }, + { 12292, "MPL_UDN_FIREWALL" }, + { 12293, "UDN_DIRECTION_PROTECT" }, + { 12800, "MPL_TILE_TIMER_SET_0" }, + { 12801, "MPL_TILE_TIMER_SET_1" }, + { 12802, "MPL_TILE_TIMER_SET_2" }, + { 12803, "MPL_TILE_TIMER_SET_3" }, + { 12804, "MPL_TILE_TIMER" }, + { 12805, "TILE_TIMER_CONTROL" }, + { 13312, "MPL_IDN_TIMER_SET_0" }, + { 13313, "MPL_IDN_TIMER_SET_1" }, + { 13314, "MPL_IDN_TIMER_SET_2" }, + { 13315, "MPL_IDN_TIMER_SET_3" }, + { 13316, "MPL_IDN_TIMER" }, + { 13317, "IDN_DEADLOCK_COUNT" }, + { 13318, "IDN_DEADLOCK_TIMEOUT" }, + { 13824, "MPL_UDN_TIMER_SET_0" }, + { 13825, "MPL_UDN_TIMER_SET_1" }, + { 13826, "MPL_UDN_TIMER_SET_2" }, + { 13827, "MPL_UDN_TIMER_SET_3" }, + { 13828, "MPL_UDN_TIMER" }, + { 13829, "UDN_DEADLOCK_COUNT" }, + { 13830, "UDN_DEADLOCK_TIMEOUT" }, + { 14336, "MPL_DMA_NOTIFY_SET_0" }, + { 14337, "MPL_DMA_NOTIFY_SET_1" }, + { 14338, "MPL_DMA_NOTIFY_SET_2" }, + { 14339, "MPL_DMA_NOTIFY_SET_3" }, + { 14340, "MPL_DMA_NOTIFY" }, + { 14592, "DMA_BYTE" }, + { 14593, "DMA_CHUNK_SIZE" }, + { 14594, "DMA_CTR" }, + { 14595, "DMA_DST_ADDR" }, + { 14596, "DMA_DST_CHUNK_ADDR" }, + { 14597, "DMA_SRC_ADDR" }, + { 14598, "DMA_SRC_CHUNK_ADDR" }, + { 14599, "DMA_STRIDE" }, + { 14600, "DMA_USER_STATUS" }, + { 14848, "MPL_IDN_CA_SET_0" }, + { 14849, "MPL_IDN_CA_SET_1" }, + { 14850, "MPL_IDN_CA_SET_2" }, + { 14851, "MPL_IDN_CA_SET_3" }, + { 14852, "MPL_IDN_CA" }, + { 15360, "MPL_UDN_CA_SET_0" }, + { 15361, "MPL_UDN_CA_SET_1" }, + { 15362, "MPL_UDN_CA_SET_2" }, + { 15363, "MPL_UDN_CA_SET_3" }, + { 15364, "MPL_UDN_CA" }, + { 15872, "MPL_IDN_AVAIL_SET_0" }, + { 15873, "MPL_IDN_AVAIL_SET_1" }, + { 15874, "MPL_IDN_AVAIL_SET_2" }, + { 15875, "MPL_IDN_AVAIL_SET_3" }, + { 15876, "MPL_IDN_AVAIL" }, + { 15877, "IDN_AVAIL_EN" }, + { 16384, "MPL_UDN_AVAIL_SET_0" }, + { 16385, "MPL_UDN_AVAIL_SET_1" }, + { 16386, "MPL_UDN_AVAIL_SET_2" }, + { 16387, "MPL_UDN_AVAIL_SET_3" }, + { 16388, "MPL_UDN_AVAIL" }, + { 16389, "UDN_AVAIL_EN" }, + { 16896, "MPL_PERF_COUNT_SET_0" }, + { 16897, "MPL_PERF_COUNT_SET_1" }, + { 16898, "MPL_PERF_COUNT_SET_2" }, + { 16899, "MPL_PERF_COUNT_SET_3" }, + { 16900, "MPL_PERF_COUNT" }, + { 16901, "PERF_COUNT_0" }, + { 16902, "PERF_COUNT_1" }, + { 16903, "PERF_COUNT_CTL" }, + { 16904, "PERF_COUNT_STS" }, + { 16905, "WATCH_CTL" }, + { 16906, "WATCH_MASK" }, + { 16907, "WATCH_VAL" }, + { 16912, "PERF_COUNT_DN_CTL" }, + { 17408, "MPL_INTCTRL_3_SET_0" }, + { 17409, "MPL_INTCTRL_3_SET_1" }, + { 17410, "MPL_INTCTRL_3_SET_2" }, + { 17411, "MPL_INTCTRL_3_SET_3" }, + { 17412, "MPL_INTCTRL_3" }, + { 17413, "EX_CONTEXT_3_0" }, + { 17414, "EX_CONTEXT_3_1" }, + { 17415, "INTERRUPT_MASK_3_0" }, + { 17416, "INTERRUPT_MASK_3_1" }, + { 17417, "INTERRUPT_MASK_RESET_3_0" }, + { 17418, "INTERRUPT_MASK_RESET_3_1" }, + { 17419, "INTERRUPT_MASK_SET_3_0" }, + { 17420, "INTERRUPT_MASK_SET_3_1" }, + { 17432, "INTCTRL_3_STATUS" }, + { 17664, "SYSTEM_SAVE_3_0" }, + { 17665, "SYSTEM_SAVE_3_1" }, + { 17666, "SYSTEM_SAVE_3_2" }, + { 17667, "SYSTEM_SAVE_3_3" }, + { 17920, "MPL_INTCTRL_2_SET_0" }, + { 17921, "MPL_INTCTRL_2_SET_1" }, + { 17922, "MPL_INTCTRL_2_SET_2" }, + { 17923, "MPL_INTCTRL_2_SET_3" }, + { 17924, "MPL_INTCTRL_2" }, + { 17925, "EX_CONTEXT_2_0" }, + { 17926, "EX_CONTEXT_2_1" }, + { 17927, "INTCTRL_2_STATUS" }, + { 17928, "INTERRUPT_MASK_2_0" }, + { 17929, "INTERRUPT_MASK_2_1" }, + { 17930, "INTERRUPT_MASK_RESET_2_0" }, + { 17931, "INTERRUPT_MASK_RESET_2_1" }, + { 17932, "INTERRUPT_MASK_SET_2_0" }, + { 17933, "INTERRUPT_MASK_SET_2_1" }, + { 18176, "SYSTEM_SAVE_2_0" }, + { 18177, "SYSTEM_SAVE_2_1" }, + { 18178, "SYSTEM_SAVE_2_2" }, + { 18179, "SYSTEM_SAVE_2_3" }, + { 18432, "MPL_INTCTRL_1_SET_0" }, + { 18433, "MPL_INTCTRL_1_SET_1" }, + { 18434, "MPL_INTCTRL_1_SET_2" }, + { 18435, "MPL_INTCTRL_1_SET_3" }, + { 18436, "MPL_INTCTRL_1" }, + { 18437, "EX_CONTEXT_1_0" }, + { 18438, "EX_CONTEXT_1_1" }, + { 18439, "INTCTRL_1_STATUS" }, + { 18440, "INTCTRL_3_STATUS_REV0" }, + { 18441, "INTERRUPT_MASK_1_0" }, + { 18442, "INTERRUPT_MASK_1_1" }, + { 18443, "INTERRUPT_MASK_RESET_1_0" }, + { 18444, "INTERRUPT_MASK_RESET_1_1" }, + { 18445, "INTERRUPT_MASK_SET_1_0" }, + { 18446, "INTERRUPT_MASK_SET_1_1" }, + { 18688, "SYSTEM_SAVE_1_0" }, + { 18689, "SYSTEM_SAVE_1_1" }, + { 18690, "SYSTEM_SAVE_1_2" }, + { 18691, "SYSTEM_SAVE_1_3" }, + { 18944, "MPL_INTCTRL_0_SET_0" }, + { 18945, "MPL_INTCTRL_0_SET_1" }, + { 18946, "MPL_INTCTRL_0_SET_2" }, + { 18947, "MPL_INTCTRL_0_SET_3" }, + { 18948, "MPL_INTCTRL_0" }, + { 18949, "EX_CONTEXT_0_0" }, + { 18950, "EX_CONTEXT_0_1" }, + { 18951, "INTCTRL_0_STATUS" }, + { 18952, "INTERRUPT_MASK_0_0" }, + { 18953, "INTERRUPT_MASK_0_1" }, + { 18954, "INTERRUPT_MASK_RESET_0_0" }, + { 18955, "INTERRUPT_MASK_RESET_0_1" }, + { 18956, "INTERRUPT_MASK_SET_0_0" }, + { 18957, "INTERRUPT_MASK_SET_0_1" }, + { 19200, "SYSTEM_SAVE_0_0" }, + { 19201, "SYSTEM_SAVE_0_1" }, + { 19202, "SYSTEM_SAVE_0_2" }, + { 19203, "SYSTEM_SAVE_0_3" }, + { 19456, "MPL_BOOT_ACCESS_SET_0" }, + { 19457, "MPL_BOOT_ACCESS_SET_1" }, + { 19458, "MPL_BOOT_ACCESS_SET_2" }, + { 19459, "MPL_BOOT_ACCESS_SET_3" }, + { 19460, "MPL_BOOT_ACCESS" }, + { 19461, "CBOX_CACHEASRAM_CONFIG" }, + { 19462, "CBOX_CACHE_CONFIG" }, + { 19463, "CBOX_MMAP_0" }, + { 19464, "CBOX_MMAP_1" }, + { 19465, "CBOX_MMAP_2" }, + { 19466, "CBOX_MMAP_3" }, + { 19467, "CBOX_MSR" }, + { 19468, "CBOX_SRC_ID" }, + { 19469, "CYCLE_HIGH_MODIFY" }, + { 19470, "CYCLE_LOW_MODIFY" }, + { 19471, "DIAG_BCST_CTL" }, + { 19472, "DIAG_BCST_MASK" }, + { 19473, "DIAG_BCST_TRIGGER" }, + { 19474, "DIAG_MUX_CTL" }, + { 19475, "DIAG_TRACE_CTL" }, + { 19476, "DIAG_TRACE_STS" }, + { 19477, "IDN_DEMUX_BUF_THRESH" }, + { 19478, "SBOX_CONFIG" }, + { 19479, "TILE_COORD" }, + { 19480, "UDN_DEMUX_BUF_THRESH" }, + { 19481, "CBOX_HOME_MAP_ADDR" }, + { 19482, "CBOX_HOME_MAP_DATA" }, + { 19483, "CBOX_MSR1" }, + { 19484, "BIG_ENDIAN_CONFIG" }, + { 19485, "MEM_STRIPE_CONFIG" }, + { 19486, "DIAG_TRACE_WAY" }, + { 19487, "VDN_SNOOP_SHIM_CTL" }, + { 19488, "PERF_COUNT_PLS" }, + { 19489, "DIAG_TRACE_DATA" }, + { 19712, "I_AER_0" }, + { 19713, "I_AER_1" }, + { 19714, "I_PHYSICAL_MEMORY_MODE" }, + { 19968, "MPL_WORLD_ACCESS_SET_0" }, + { 19969, "MPL_WORLD_ACCESS_SET_1" }, + { 19970, "MPL_WORLD_ACCESS_SET_2" }, + { 19971, "MPL_WORLD_ACCESS_SET_3" }, + { 19972, "MPL_WORLD_ACCESS" }, + { 19973, "SIM_SOCKET" }, + { 19974, "CYCLE_HIGH" }, + { 19975, "CYCLE_LOW" }, + { 19976, "DONE" }, + { 19977, "FAIL" }, + { 19978, "INTERRUPT_CRITICAL_SECTION" }, + { 19979, "PASS" }, + { 19980, "SIM_CONTROL" }, + { 19981, "EVENT_BEGIN" }, + { 19982, "EVENT_END" }, + { 19983, "TILE_WRITE_PENDING" }, + { 19984, "TILE_RTF_HWM" }, + { 20224, "PROC_STATUS" }, + { 20225, "STATUS_SATURATE" }, + { 20480, "MPL_I_ASID_SET_0" }, + { 20481, "MPL_I_ASID_SET_1" }, + { 20482, "MPL_I_ASID_SET_2" }, + { 20483, "MPL_I_ASID_SET_3" }, + { 20484, "MPL_I_ASID" }, + { 20485, "I_ASID" }, + { 20992, "MPL_D_ASID_SET_0" }, + { 20993, "MPL_D_ASID_SET_1" }, + { 20994, "MPL_D_ASID_SET_2" }, + { 20995, "MPL_D_ASID_SET_3" }, + { 20996, "MPL_D_ASID" }, + { 20997, "D_ASID" }, + { 21504, "MPL_DMA_ASID_SET_0" }, + { 21505, "MPL_DMA_ASID_SET_1" }, + { 21506, "MPL_DMA_ASID_SET_2" }, + { 21507, "MPL_DMA_ASID_SET_3" }, + { 21508, "MPL_DMA_ASID" }, + { 21509, "DMA_ASID" }, + { 22016, "MPL_SNI_ASID_SET_0" }, + { 22017, "MPL_SNI_ASID_SET_1" }, + { 22018, "MPL_SNI_ASID_SET_2" }, + { 22019, "MPL_SNI_ASID_SET_3" }, + { 22020, "MPL_SNI_ASID" }, + { 22021, "SNI_ASID" }, + { 22528, "MPL_DMA_CPL_SET_0" }, + { 22529, "MPL_DMA_CPL_SET_1" }, + { 22530, "MPL_DMA_CPL_SET_2" }, + { 22531, "MPL_DMA_CPL_SET_3" }, + { 22532, "MPL_DMA_CPL" }, + { 23040, "MPL_SN_CPL_SET_0" }, + { 23041, "MPL_SN_CPL_SET_1" }, + { 23042, "MPL_SN_CPL_SET_2" }, + { 23043, "MPL_SN_CPL_SET_3" }, + { 23044, "MPL_SN_CPL" }, + { 23552, "MPL_DOUBLE_FAULT_SET_0" }, + { 23553, "MPL_DOUBLE_FAULT_SET_1" }, + { 23554, "MPL_DOUBLE_FAULT_SET_2" }, + { 23555, "MPL_DOUBLE_FAULT_SET_3" }, + { 23556, "MPL_DOUBLE_FAULT" }, + { 23557, "LAST_INTERRUPT_REASON" }, + { 24064, "MPL_SN_STATIC_ACCESS_SET_0" }, + { 24065, "MPL_SN_STATIC_ACCESS_SET_1" }, + { 24066, "MPL_SN_STATIC_ACCESS_SET_2" }, + { 24067, "MPL_SN_STATIC_ACCESS_SET_3" }, + { 24068, "MPL_SN_STATIC_ACCESS" }, + { 24069, "SN_STATIC_CTL" }, + { 24070, "SN_STATIC_FIFO_DATA" }, + { 24071, "SN_STATIC_FIFO_SEL" }, + { 24073, "SN_STATIC_ISTATE" }, + { 24074, "SN_STATIC_OSTATE" }, + { 24076, "SN_STATIC_STATIC" }, + { 24320, "SN_STATIC_DATA_AVAIL" }, + { 24576, "MPL_AUX_PERF_COUNT_SET_0" }, + { 24577, "MPL_AUX_PERF_COUNT_SET_1" }, + { 24578, "MPL_AUX_PERF_COUNT_SET_2" }, + { 24579, "MPL_AUX_PERF_COUNT_SET_3" }, + { 24580, "MPL_AUX_PERF_COUNT" }, + { 24581, "AUX_PERF_COUNT_0" }, + { 24582, "AUX_PERF_COUNT_1" }, + { 24583, "AUX_PERF_COUNT_CTL" }, + { 24584, "AUX_PERF_COUNT_STS" }, +}; + +const int tilepro_num_sprs = 499; + +#endif /* DISASM_ONLY */ + +#ifndef DISASM_ONLY + +#include + +static int +tilepro_spr_compare (const void *a_ptr, const void *b_ptr) +{ + const struct tilepro_spr *a = (const struct tilepro_spr *) a_ptr; + const struct tilepro_spr *b = (const struct tilepro_spr *) b_ptr; + + return a->number - b->number; +} + +const char * +get_tilepro_spr_name (int num) +{ + void *result; + struct tilepro_spr key; + + key.number = num; + result = bsearch ((const void *) &key, (const void *) tilepro_sprs, + tilepro_num_sprs, sizeof (struct tilepro_spr), + tilepro_spr_compare); + + if (result == NULL) + return NULL; + + { + struct tilepro_spr *result_ptr = (struct tilepro_spr *) result; + + return result_ptr->name; + } +} + + +/* Canonical name of each register. */ +const char * const tilepro_register_names[] = +{ + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", + "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", + "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", + "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", + "r48", "r49", "r50", "r51", "r52", "tp", "sp", "lr", + "sn", "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero" +}; + +#endif /* not DISASM_ONLY */ + + +/* Given a set of bundle bits and a specific pipe, returns which + instruction the bundle contains in that pipe. */ + +const struct tilepro_opcode * +find_opcode (tilepro_bundle_bits bits, tilepro_pipeline pipe) +{ + const unsigned short *table = tilepro_bundle_decoder_fsms[pipe]; + int i = 0; + + while (1) + { + unsigned short bitspec = table[i]; + unsigned int bitfield = + ((unsigned int) (bits >> (bitspec & 63))) & (bitspec >> 6); + unsigned short next = table[i + 1 + bitfield]; + + if (next <= TILEPRO_OPC_NONE) + return &tilepro_opcodes[next]; + + i = next - TILEPRO_OPC_NONE; + } +} + + +int +parse_insn_tilepro (tilepro_bundle_bits bits, + unsigned int pc, + struct tilepro_decoded_instruction + decoded[TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE]) +{ + int num_instructions = 0; + int pipe; + int min_pipe, max_pipe; + + if ((bits & TILEPRO_BUNDLE_Y_ENCODING_MASK) == 0) + { + min_pipe = TILEPRO_PIPELINE_X0; + max_pipe = TILEPRO_PIPELINE_X1; + } + else + { + min_pipe = TILEPRO_PIPELINE_Y0; + max_pipe = TILEPRO_PIPELINE_Y2; + } + + /* For each pipe, find an instruction that fits. */ + for (pipe = min_pipe; pipe <= max_pipe; pipe++) + { + const struct tilepro_opcode *opc; + struct tilepro_decoded_instruction *d; + int i; + + d = &decoded[num_instructions++]; + opc = find_opcode (bits, (tilepro_pipeline)pipe); + d->opcode = opc; + + /* Decode each operand, sign extending, etc. as appropriate. */ + for (i = 0; i < opc->num_operands; i++) + { + const struct tilepro_operand *op = + &tilepro_operands[opc->operands[pipe][i]]; + int opval = op->extract (bits); + + if (op->is_signed) + { + /* Sign-extend the operand. */ + int shift = (int)((sizeof(int) * 8) - op->num_bits); + opval = (opval << shift) >> shift; + } + + /* Adjust PC-relative scaled branch offsets. */ + if (op->type == TILEPRO_OP_TYPE_ADDRESS) + { + opval *= TILEPRO_BUNDLE_SIZE_IN_BYTES; + opval += (int)pc; + } + + /* Record the final value. */ + d->operands[i] = op; + d->operand_values[i] = opval; + } + } + + return num_instructions; +} diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c index eea427c..67ba562 100644 --- a/opcodes/v850-opc.c +++ b/opcodes/v850-opc.c @@ -1205,10 +1205,10 @@ const struct v850_opcode v850_opcodes[] = { "cmovf.s", two (0x07e0, 0x0400), two (0x07e0, 0x07f1), {FFF, R1, R2, R3_NOTR0}, 0, PROCESSOR_V850E2V3 }, /* Default value for FFF is 0(not defined in spec). */ { "cmovf.s", two (0x07e0, 0x0400), two (0x07e0, 0x07ff), {R1, R2, R3_NOTR0}, 0, PROCESSOR_V850E2V3 }, -{ "cmpf.d", two (0x07e0, 0x0430), two (0x0fe1, 0x87f1), {FLOAT_CCCC, R1_EVEN, R2_EVEN, FFF}, 0, PROCESSOR_V850E2V3 }, -{ "cmpf.d", two (0x07e0, 0x0430), two (0x0fe1, 0x87ff), {FLOAT_CCCC, R1_EVEN, R2_EVEN}, 0, PROCESSOR_V850E2V3 }, -{ "cmpf.s", two (0x07e0, 0x0420), two (0x07e0, 0x87f1), {FLOAT_CCCC, R1, R2, FFF}, 0, PROCESSOR_V850E2V3 }, -{ "cmpf.s", two (0x07e0, 0x0420), two (0x07e0, 0x87ff), {FLOAT_CCCC, R1, R2}, 0, PROCESSOR_V850E2V3 }, +{ "cmpf.d", two (0x07e0, 0x0430), two (0x0fe1, 0x87f1), {FLOAT_CCCC, R2_EVEN, R1_EVEN, FFF}, 0, PROCESSOR_V850E2V3 }, +{ "cmpf.d", two (0x07e0, 0x0430), two (0x0fe1, 0x87ff), {FLOAT_CCCC, R2_EVEN, R1_EVEN}, 0, PROCESSOR_V850E2V3 }, +{ "cmpf.s", two (0x07e0, 0x0420), two (0x07e0, 0x87f1), {FLOAT_CCCC, R2, R1, FFF}, 0, PROCESSOR_V850E2V3 }, +{ "cmpf.s", two (0x07e0, 0x0420), two (0x07e0, 0x87ff), {FLOAT_CCCC, R2, R1}, 0, PROCESSOR_V850E2V3 }, { "cvtf.dl", two (0x07e4, 0x0454), two (0x0fff, 0x0fff), {R2_EVEN, R3_EVEN}, 0, PROCESSOR_V850E2V3 }, { "cvtf.ds", two (0x07e3, 0x0452), two (0x0fff, 0x07ff), {R2_EVEN, R3}, 0, PROCESSOR_V850E2V3 }, { "cvtf.dul", two (0x07f4, 0x0454), two (0x0fff, 0x0fff), {R2_EVEN, R3_EVEN}, 0, PROCESSOR_V850E2V3 }, diff --git a/packaging/001_ld_makefile_patch.patch b/packaging/001_ld_makefile_patch.patch deleted file mode 100644 index 67160fe..0000000 --- a/packaging/001_ld_makefile_patch.patch +++ /dev/null @@ -1,27 +0,0 @@ -Author: -Description: Description: correct where ld scripts are installed -Author: Chris Chimelis -Upstream status: N/A -Date: ?? ---- a/ld/Makefile.am -+++ b/ld/Makefile.am -@@ -24,7 +24,7 @@ - # We put the scripts in the directory $(scriptdir)/ldscripts. - # We can't put the scripts in $(datadir) because the SEARCH_DIR - # directives need to be different for native and cross linkers. --scriptdir = $(tooldir)/lib -+scriptdir = $(libdir) - - EMUL = @EMUL@ - EMULATION_OFILES = @EMULATION_OFILES@ ---- a/ld/Makefile.in -+++ b/ld/Makefile.in -@@ -337,7 +337,7 @@ - # We put the scripts in the directory $(scriptdir)/ldscripts. - # We can't put the scripts in $(datadir) because the SEARCH_DIR - # directives need to be different for native and cross linkers. --scriptdir = $(tooldir)/lib -+scriptdir = $(libdir) - BASEDIR = $(srcdir)/.. - BFDDIR = $(BASEDIR)/bfd - INCDIR = $(BASEDIR)/include diff --git a/packaging/006_better_file_error.patch b/packaging/006_better_file_error.patch deleted file mode 100644 index 3cd9e00..0000000 --- a/packaging/006_better_file_error.patch +++ /dev/null @@ -1,19 +0,0 @@ -Author: David Kimdon -Description: Specify which filename is causing an error if the filename is a -directory. (#45832) ---- a/bfd/opncls.c -+++ b/bfd/opncls.c -@@ -183,6 +183,13 @@ - { - bfd *nbfd; - const bfd_target *target_vec; -+ struct stat s; -+ -+ if (stat (filename, &s) == 0) -+ if (S_ISDIR(s.st_mode)) { -+ bfd_set_error (bfd_error_file_not_recognized); -+ return NULL; -+ } - - nbfd = _bfd_new_bfd (); - if (nbfd == NULL) diff --git a/packaging/012_check_ldrunpath_length.patch b/packaging/012_check_ldrunpath_length.patch deleted file mode 100644 index 5a35abc..0000000 --- a/packaging/012_check_ldrunpath_length.patch +++ /dev/null @@ -1,23 +0,0 @@ -Author: Chris Chimelis -Description: Only generate an RPATH entry if LD_RUN_PATH is not empty, for -cases where -rpath isn't specified. (#151024) ---- a/ld/emultempl/elf32.em -+++ b/ld/emultempl/elf32.em -@@ -1266,6 +1266,8 @@ - && command_line.rpath == NULL) - { - lib_path = (const char *) getenv ("LD_RUN_PATH"); -+ if ((lib_path) && (strlen (lib_path) == 0)) -+ lib_path = NULL; - if (gld${EMULATION_NAME}_search_needed (lib_path, &n, - force)) - break; -@@ -1493,6 +1495,8 @@ - rpath = command_line.rpath; - if (rpath == NULL) - rpath = (const char *) getenv ("LD_RUN_PATH"); -+ if ((rpath) && (strlen (rpath) == 0)) -+ rpath = NULL; - - for (abfd = link_info.input_bfds; abfd; abfd = abfd->link_next) - if (bfd_get_flavour (abfd) == bfd_target_elf_flavour) diff --git a/packaging/013_bash_in_ld_testsuite.patch b/packaging/013_bash_in_ld_testsuite.patch deleted file mode 100644 index f9e555c..0000000 --- a/packaging/013_bash_in_ld_testsuite.patch +++ /dev/null @@ -1,26 +0,0 @@ -Author: Matthias Klose -Description: Explicitely use bash for the ld testsuite. ---- a/ld/testsuite/config/default.exp -+++ b/ld/testsuite/config/default.exp -@@ -119,10 +119,10 @@ - #makefile rules, with embedded shell variable expansions. - #make wants $$shell_var, we want $shell_var ... - set cmd "host='$target_triplet' && . $srcdir/../configure.host && sed -e 's,\\\$\\\$,\$,g' < -Upstream status: Debian specific ---- a/ld/emulparams/elf_i386.sh -+++ b/ld/emulparams/elf_i386.sh -@@ -13,3 +13,13 @@ - NO_SMALL_DATA=yes - SEPARATE_GOTPLT=12 - IREL_IN_PLT= -+ -+# Linux modify the default library search path to first include -+# a 32-bit specific directory. -+case "$target" in -+ x86_64*-linux* | i[3-7]86*-linux* | x86_64*-kfreebsd*-gnu | i[3-7]86*-kfreebsd*-gnu) -+ case "$EMULATION_NAME" in -+ *i386*) LIBPATH_SUFFIX=32 ;; -+ esac -+ ;; -+esac diff --git a/packaging/129_ld_mulitarch_dirs.patch b/packaging/129_ld_mulitarch_dirs.patch deleted file mode 100644 index 2beedf6..0000000 --- a/packaging/129_ld_mulitarch_dirs.patch +++ /dev/null @@ -1,72 +0,0 @@ -# DP: Add multiarch directories to linker search path. - -Index: binutils-2.21.0.20110322/ld/genscripts.sh -=================================================================== ---- binutils-2.21.0.20110322.orig/ld/genscripts.sh 2011-03-27 18:45:12.283057003 +0000 -+++ binutils-2.21.0.20110322/ld/genscripts.sh 2011-03-27 18:51:20.623057182 +0000 -@@ -240,6 +240,65 @@ - fi - - LIB_SEARCH_DIRS=`echo ${LIB_PATH} | sed -e 's/:/ /g' -e 's/\([^ ][^ ]*\)/SEARCH_DIR(\\"\1\\");/g'` -+if [ -n "$DEB_HOST_MULTIARCH" ]; then -+ temp_dirs=' ' -+ for dir in `echo ${LIB_PATH} | sed -e 's/:/ /g'`; do -+ case "$dir" in -+ ${tool_lib}*|*/${target_alias}/*) -+ ;; -+ */lib) -+ if [ -n "$DEB_HOST_MULTIARCH32" ]; then -+ case $EMULATION_NAME in -+ elf_i386|elf32*) -+ temp_dirs="${temp_dirs}${dir}/$DEB_HOST_MULTIARCH32 ";; -+ *) -+ temp_dirs="${temp_dirs}${dir}/$DEB_HOST_MULTIARCH " -+ esac -+ elif [ -n "$DEB_HOST_MULTIARCH64" ]; then -+ case $EMULATION_NAME in -+ elf*_64|elf64*) -+ temp_dirs="${temp_dirs}${dir}/$DEB_HOST_MULTIARCH64 ";; -+ *) -+ temp_dirs="${temp_dirs}${dir}/$DEB_HOST_MULTIARCH " -+ esac -+ else -+ temp_dirs="${temp_dirs}${dir}/$DEB_HOST_MULTIARCH " -+ fi -+ ;; -+ */lib32) -+ if [ -n "$DEB_HOST_MULTIARCH32" ]; then -+ dir2=$(echo $dir | sed "s,32$,,") -+ temp_dirs="${temp_dirs}${dir2}/$DEB_HOST_MULTIARCH32 " -+ fi -+ ;; -+ */lib64) -+ case "${target}" in -+ powerpc64-*-*|s390x-*-*|sparc64-*-*|x86_64-*-linux*) -+ #dir=$(echo $dir | sed "s,64$,,") -+ dir2=$(echo $dir | sed "s,64$,,") -+ temp_dirs="${temp_dirs}${dir2}/$DEB_HOST_MULTIARCH " -+ ;; -+ *) -+ if [ -n "$DEB_HOST_MULTIARCH64" ]; then -+ dir2=$(echo $dir | sed "s,64$,,") -+ temp_dirs="${temp_dirs}${dir2}/$DEB_HOST_MULTIARCH64 " -+ fi -+ ;; -+ esac -+ ;; -+ *) -+ ;; -+ esac -+ temp_dirs="${temp_dirs}${dir} " -+ done -+ LIB_SEARCH_DIRS= -+ for dir in $temp_dirs; do -+ if echo "$LIB_SEARCH_DIRS" | fgrep -q "\"$dir\""; then -+ continue -+ fi -+ LIB_SEARCH_DIRS="${LIB_SEARCH_DIRS}SEARCH_DIR(\"$dir\"); " -+ done -+fi - - # We need it for testsuite. - set $EMULATION_LIBPATH diff --git a/packaging/130_gold_disable_testsuite_build.patch b/packaging/130_gold_disable_testsuite_build.patch deleted file mode 100644 index 0d00033..0000000 --- a/packaging/130_gold_disable_testsuite_build.patch +++ /dev/null @@ -1,26 +0,0 @@ -Author: -Description: Description: Disable build of gold/testsuite -Author: Matthias Klose -Upstream status: local ---- a/gold/Makefile.am -+++ b/gold/Makefile.am -@@ -2,7 +2,7 @@ - - AUTOMAKE_OPTIONS = foreign - --SUBDIRS = po testsuite -+SUBDIRS = po - - tooldir = $(exec_prefix)/$(target_alias) - ---- a/gold/Makefile.in -+++ b/gold/Makefile.in -@@ -355,7 +355,7 @@ - top_builddir = @top_builddir@ - top_srcdir = @top_srcdir@ - AUTOMAKE_OPTIONS = foreign --SUBDIRS = po testsuite -+SUBDIRS = po - tooldir = $(exec_prefix)/$(target_alias) - ACLOCAL_AMFLAGS = -I ../bfd -I ../config - AM_CFLAGS = $(WARN_CFLAGS) $(LFS_CFLAGS) $(RANDOM_SEED_CFLAGS) diff --git a/packaging/131_ld_bootstrap_testsuite.patch b/packaging/131_ld_bootstrap_testsuite.patch deleted file mode 100644 index 0c53a7b..0000000 --- a/packaging/131_ld_bootstrap_testsuite.patch +++ /dev/null @@ -1,45 +0,0 @@ -Author: -Description: Description: Fix ld-bootstrap testsuite when configured with --enable-plugins -Author: Rafael Espindola -Upstream status: proposed patch ---- a/ld/testsuite/ld-bootstrap/bootstrap.exp -+++ b/ld/testsuite/ld-bootstrap/bootstrap.exp -@@ -40,6 +40,15 @@ - set plugins "no" - } - -+remote_exec host "$nm --help" "" "/dev/null" "plugin-support" -+set tmp [file_contents "plugin-support"] -+regexp ".*\(--plugin\).*\n" $tmp foo plugins -+if [info exists plugins] then { -+ set plugins "yes" -+} else { -+ set plugins "no" -+} -+ - # Bootstrap ld. First link the object files together using -r, in - # order to test -r. Then link the result into an executable, ld1, to - # really test -r. Use ld1 to link a fresh ld, ld2. Use ld2 to link a -@@ -78,6 +87,11 @@ - continue - } - -+ if { $flags == "--static" && $plugins == "yes" } then { -+ untested $testname -+ continue -+ } -+ - # If we only have a shared libbfd, we probably can't run the - # --static test.will fail. - if { $flags == "--static" && ! [string match "*libbfd.a*" $BFDLIB] } then { -@@ -112,6 +126,10 @@ - if { $plugins == "yes" } { - set extralibs "$extralibs -ldl" - } -+ -+ if { $plugins == "yes" } { -+ set extralibs "$extralibs -ldl" -+ } - - # On Irix 5, linking with --static only works if all the files are - # compiled using -non_shared. diff --git a/packaging/134_gold_no_spu.patch b/packaging/134_gold_no_spu.patch deleted file mode 100644 index 88cfc75..0000000 --- a/packaging/134_gold_no_spu.patch +++ /dev/null @@ -1,13 +0,0 @@ -Author: -Description: Description: Don't configure gold for spu target. ---- a/Makefile.in -+++ b/Makefile.in -@@ -21929,7 +21929,7 @@ - srcdiroption="--srcdir=$${topdir}/gold"; \ - libsrcdir="$$s/gold"; \ - $(SHELL) $${libsrcdir}/configure \ -- $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ -+ $$(echo $(HOST_CONFIGARGS) |sed 's/,spu//') --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - || exit 1 - @endif gold diff --git a/packaging/135_bfd_version.patch b/packaging/135_bfd_version.patch deleted file mode 100644 index 1e11ceb..0000000 --- a/packaging/135_bfd_version.patch +++ /dev/null @@ -1,47 +0,0 @@ -Author: -Description: Description: Fix bfd version handling for extra builds - -Index: binutils-2.21.0.20110216/bfd/Makefile.am -=================================================================== ---- binutils-2.21.0.20110216.orig/bfd/Makefile.am 2011-02-01 12:25:32.000000000 +0000 -+++ binutils-2.21.0.20110216/bfd/Makefile.am 2011-02-16 18:28:14.568229030 +0000 -@@ -948,14 +948,14 @@ - - bfdver.h: $(srcdir)/version.h $(srcdir)/Makefile.in - @echo "creating $@" -- @bfd_version=`echo "$(VERSION)" | sed -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\ -- bfd_version_string="\"$(VERSION)\"" ;\ -+ @bfd_version=`echo "$(VERSION)" | sed -e 's/-.*$$//' | sed -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\ -+ bfd_version_string="\"`echo $(VERSION) | sed -e 's/-.*$$//'`\"" ;\ - bfd_soversion="$(VERSION)" ;\ - bfd_version_package="\"$(PKGVERSION)\"" ;\ - report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\ - if test "x$(RELEASE)" = x ; then \ - bfd_version_date=`sed -n -e 's/.*DATE //p' < $(srcdir)/version.h` ;\ -- bfd_version_string="\"$(VERSION).$${bfd_version_date}\"" ;\ -+ bfd_version_string="\"`echo $(VERSION) | sed -e 's/-.*$$//'`.$${bfd_version_date}\"" ;\ - bfd_soversion="$(VERSION).$${bfd_version_date}" ;\ - fi ;\ - sed -e "s,@bfd_version@,$$bfd_version," \ -Index: binutils-2.21.0.20110216/bfd/Makefile.in -=================================================================== ---- binutils-2.21.0.20110216.orig/bfd/Makefile.in 2011-02-01 12:25:32.000000000 +0000 -+++ binutils-2.21.0.20110216/bfd/Makefile.in 2011-02-16 18:28:34.248228995 +0000 -@@ -1980,14 +1980,14 @@ - - bfdver.h: $(srcdir)/version.h $(srcdir)/Makefile.in - @echo "creating $@" -- @bfd_version=`echo "$(VERSION)" | sed -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\ -- bfd_version_string="\"$(VERSION)\"" ;\ -+ @bfd_version=`echo "$(VERSION)" | sed -e 's/-.*$$//' | sed -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\ -+ bfd_version_string="\"`echo $(VERSION) | sed -e 's/-.*$$//'`\"" ;\ - bfd_soversion="$(VERSION)" ;\ - bfd_version_package="\"$(PKGVERSION)\"" ;\ - report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\ - if test "x$(RELEASE)" = x ; then \ - bfd_version_date=`sed -n -e 's/.*DATE //p' < $(srcdir)/version.h` ;\ -- bfd_version_string="\"$(VERSION).$${bfd_version_date}\"" ;\ -+ bfd_version_string="\"`echo $(VERSION) | sed -e 's/-.*$$//'`.$${bfd_version_date}\"" ;\ - bfd_soversion="$(VERSION).$${bfd_version_date}" ;\ - fi ;\ - sed -e "s,@bfd_version@,$$bfd_version," \ diff --git a/packaging/140_pr10340.patch b/packaging/140_pr10340.patch deleted file mode 100644 index 349d863..0000000 --- a/packaging/140_pr10340.patch +++ /dev/null @@ -1,35 +0,0 @@ -# DP: Proposed patch for PR ld/10340, ld doesn't honor sysroot prefix for ldscripts - -Signed-off-by: Sven Rebhan - -Always try to prepend the sysroot prefix to absolute filenames first. - ---- a/ld/ldfile.c -+++ b/ld/ldfile.c -@@ -308,18 +308,24 @@ - directory first. */ - if (! entry->is_archive) - { -- if (entry->sysrooted && IS_ABSOLUTE_PATH (entry->filename)) -+ /* For absolute pathnames, try to always open the file in the -+ sysroot first. If this fails, try to open the file at the -+ given location. */ -+ entry->sysrooted = is_sysrooted_pathname(entry->filename, FALSE); -+ if (IS_ABSOLUTE_PATH (entry->filename) && ld_sysroot && ! entry->sysrooted) - { - char *name = concat (ld_sysroot, entry->filename, - (const char *) NULL); - if (ldfile_try_open_bfd (name, entry)) - { - entry->filename = name; -+ entry->sysrooted = TRUE; - return TRUE; - } - free (name); - } -- else if (ldfile_try_open_bfd (entry->filename, entry)) -+ -+ if (ldfile_try_open_bfd (entry->filename, entry)) - { - entry->sysrooted = IS_ABSOLUTE_PATH (entry->filename) - && is_sysrooted_pathname (entry->filename, TRUE); diff --git a/packaging/157_ar_scripts_with_tilde.patch b/packaging/157_ar_scripts_with_tilde.patch deleted file mode 100644 index 0d3427e..0000000 --- a/packaging/157_ar_scripts_with_tilde.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/binutils/arlex.l -+++ b/binutils/arlex.l -@@ -77,7 +77,7 @@ - "(" { return '('; } - ")" { return ')'; } - "," { return ','; } --[A-Za-z0-9/\\$:.\-\_]+ { -+[A-Za-z0-9/\\$:.\-\_~]+ { - yylval.name = xstrdup (yytext); - return FILENAME; - } diff --git a/packaging/158_ld_system_root.patch b/packaging/158_ld_system_root.patch deleted file mode 100644 index c04c72c..0000000 --- a/packaging/158_ld_system_root.patch +++ /dev/null @@ -1,36 +0,0 @@ ---- a/ld/configure.in -+++ b/ld/configure.in -@@ -38,7 +38,9 @@ - *) TARGET_SYSTEM_ROOT=$with_sysroot ;; - esac - -+ if test "x$TARGET_SYSTEM_ROOT" != x/; then - TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"' -+ fi - use_sysroot=yes - - if test "x$prefix" = xNONE; then ---- a/ld/configure -+++ b/ld/configure -@@ -4139,7 +4139,9 @@ - *) TARGET_SYSTEM_ROOT=$with_sysroot ;; - esac - -+ if test "x$TARGET_SYSTEM_ROOT" != x/; then - TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"' -+ fi - use_sysroot=yes - - if test "x$prefix" = xNONE; then ---- a/ld/ldmain.c -+++ b/ld/ldmain.c -@@ -214,8 +214,8 @@ - { - if (*TARGET_SYSTEM_ROOT == 0) - { -- einfo ("%P%F: this linker was not configured to use sysroots\n"); - ld_sysroot = ""; -+ ld_canon_sysroot = ""; - } - else - ld_canon_sysroot = lrealpath (ld_sysroot); diff --git a/packaging/159_gas-i8775.diff b/packaging/159_gas-i8775.diff deleted file mode 100644 index 8b9c957..0000000 --- a/packaging/159_gas-i8775.diff +++ /dev/null @@ -1,91 +0,0 @@ -# DP: Fix assembler bug blocking Thumb-2 kernel builds (CS issue #8775). - -2010-06-02 Paul Brook - - Issue #8775 - PC relative LDR from global symbol. - gas/ - * config/tc-arm.c (arm_force_relocation): Resolve all pc-relative - loads. - - gas/testsuite/ - * gas/arm/ldr-global.d: New test. - * gas/arm/ldr-global.s: New test. - -Index: binutils-2.21.0.20110216/gas/testsuite/gas/arm/ldr-global.d -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ binutils-2.21.0.20110216/gas/testsuite/gas/arm/ldr-global.d 2011-02-16 18:25:14.528229049 +0000 -@@ -0,0 +1,14 @@ -+#objdump: -dr --prefix-addresses --show-raw-insn -+#name: PC-relative LDR from global -+ -+.*: +file format .*arm.* -+ -+Disassembly of section .text: -+0+00 <[^>]*> e59f0010 ? ldr r0, \[pc, #16\] ; 0+18 <[^>]*> -+0+04 <[^>]*> e1df00fc ? ldrsh r0, \[pc, #12\] ; 0+18 <[^>]*> -+0+08 <[^>]*> ed9f0a02 ? vldr s0, \[pc, #8\] ; 0+18 <[^>]*> -+0+0c <[^>]*> 4802 ? ldr r0, \[pc, #8\] ; \(0+18 <[^>]*>\) -+0+0e <[^>]*> 4802 ? ldr r0, \[pc, #8\] ; \(0+18 <[^>]*>\) -+0+10 <[^>]*> ed9f 0a01 ? vldr s0, \[pc, #4\] ; 0+18 <[^>]*> -+0+14 <[^>]*> f8df 0000 ? ldr\.w r0, \[pc\] ; 0+18 <[^>]*> -+#... -Index: binutils-2.21.0.20110216/gas/testsuite/gas/arm/ldr-global.s -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ binutils-2.21.0.20110216/gas/testsuite/gas/arm/ldr-global.s 2011-02-16 18:25:14.528229049 +0000 -@@ -0,0 +1,22 @@ -+@ Test pc-relative loads from global objects defined in the same text segment. -+@ See tc-arm.c:arm_force_relocation. -+.arch armv7-a -+.fpu vfp -+.syntax unified -+.text -+foo_arm: -+ ldr r0, bar -+ ldrsh r0, bar -+ vldr s0, bar -+.thumb -+foo_thumb: -+ ldr r0, bar -+ ldr.n r0, bar -+ vldr s0, bar -+ ldr.w r0, bar -+ -+.align 2 -+.globl bar -+bar: -+ .word 42 -+ -Index: binutils-2.21.0.20110216/gas/config/tc-arm.c -=================================================================== ---- binutils-2.21.0.20110216.orig/gas/config/tc-arm.c 2011-02-16 18:23:21.728228999 +0000 -+++ binutils-2.21.0.20110216/gas/config/tc-arm.c 2011-02-16 18:25:14.538229024 +0000 -@@ -21675,14 +21675,25 @@ - } - #endif - -- /* Resolve these relocations even if the symbol is extern or weak. */ -+ /* Resolve these relocations even if the symbol is extern or weak. -+ Technically this is probably wrong due to symbol preemption. -+ In practice these relocations do not have enough range to be useful -+ at dynamic link time, and some code (e.g. in the Linux kernel) -+ expects these references to be resolved. */ - if (fixp->fx_r_type == BFD_RELOC_ARM_IMMEDIATE - || fixp->fx_r_type == BFD_RELOC_ARM_OFFSET_IMM -+ || fixp->fx_r_type == BFD_RELOC_ARM_OFFSET_IMM8 - || fixp->fx_r_type == BFD_RELOC_ARM_ADRL_IMMEDIATE -+ || fixp->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM -+ || fixp->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM_S2 -+ || fixp->fx_r_type == BFD_RELOC_ARM_THUMB_OFFSET - || fixp->fx_r_type == BFD_RELOC_ARM_T32_ADD_IMM - || fixp->fx_r_type == BFD_RELOC_ARM_T32_IMMEDIATE - || fixp->fx_r_type == BFD_RELOC_ARM_T32_IMM12 -- || fixp->fx_r_type == BFD_RELOC_ARM_T32_ADD_PC12) -+ || fixp->fx_r_type == BFD_RELOC_ARM_T32_OFFSET_IMM -+ || fixp->fx_r_type == BFD_RELOC_ARM_T32_ADD_PC12 -+ || fixp->fx_r_type == BFD_RELOC_ARM_T32_CP_OFF_IMM -+ || fixp->fx_r_type == BFD_RELOC_ARM_T32_CP_OFF_IMM_S2) - return 0; - - /* Always leave these relocations for the linker. */ diff --git a/packaging/160_gas_pr12698.diff b/packaging/160_gas_pr12698.diff deleted file mode 100644 index 3dd5869..0000000 --- a/packaging/160_gas_pr12698.diff +++ /dev/null @@ -1,54 +0,0 @@ -# DP: Proposed patch for PR gas/12698 - -2011-04-15 Bernd Schmidt - - gas/ - * config/tc-arm.c (m_profile_p): New function. - (parse_psr, do_t_mrs, do_t_msr): Use m_profile_p. - - ---- a/gas/config/tc-arm.c -+++ b/gas/config/tc-arm.c -@@ -234,6 +234,15 @@ - static const arm_feature_set fpu_neon_ext_fma = ARM_FEATURE (0, FPU_NEON_EXT_FMA); - static const arm_feature_set fpu_vfp_ext_fma = ARM_FEATURE (0, FPU_VFP_EXT_FMA); - -+/* Return whether FEATURES indicates an M profile CPU, without getting -+ confused by ARM_ANY. */ -+static int -+m_profile_p (arm_feature_set features) -+{ -+ return (ARM_CPU_HAS_FEATURE (features, arm_ext_v6m) -+ && !ARM_CPU_HAS_FEATURE (features, arm_ext_v7a)); -+} -+ - static int mfloat_abi_opt = -1; - /* Record user cpu selection for object attributes. */ - static arm_feature_set selected_cpu = ARM_ARCH_NONE; -@@ -5354,7 +5363,7 @@ - const struct asm_psr *psr; - char *start; - bfd_boolean is_apsr = FALSE; -- bfd_boolean m_profile = ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_m); -+ bfd_boolean m_profile = m_profile_p (selected_cpu); - - /* CPSR's and SPSR's can now be lowercase. This is just a convenience - feature for ease of use and backwards compatibility. */ -@@ -10947,7 +10956,7 @@ - { - int flags = inst.operands[1].imm & (PSR_c|PSR_x|PSR_s|PSR_f|SPSR_BIT); - -- if (ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_m)) -+ if (m_profile_p (selected_cpu)) - constraint (flags != 0, _("selected processor does not support " - "requested special purpose register")); - else -@@ -10979,7 +10988,7 @@ - else - flags = inst.operands[0].imm; - -- if (ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_m)) -+ if (m_profile_p (selected_cpu)) - { - int bits = inst.operands[0].imm & (PSR_c|PSR_x|PSR_s|PSR_f|SPSR_BIT); - diff --git a/packaging/161_ar_delete_members.diff b/packaging/161_ar_delete_members.diff deleted file mode 100644 index 5de3dc2..0000000 --- a/packaging/161_ar_delete_members.diff +++ /dev/null @@ -1,41 +0,0 @@ ---- a/binutils/ar.c -+++ b/binutils/ar.c -@@ -1069,7 +1069,6 @@ - - if (smart_rename (new_name, old_name, 0) != 0) - xexit (1); -- free (old_name); - } - - /* Return a pointer to the pointer to the entry which should be rplacd'd -@@ -1119,7 +1118,6 @@ - bfd_boolean found; - bfd_boolean something_changed = FALSE; - int match_count; -- const char * tmp = NULL; - - for (; *files_to_delete != NULL; ++files_to_delete) - { -@@ -1141,10 +1139,8 @@ - current_ptr_ptr = &(arch->archive_next); - while (*current_ptr_ptr) - { -- if (tmp != NULL) -- free ((char *) tmp); -- tmp = normalize (*files_to_delete, arch); -- if (FILENAME_CMP (tmp, (*current_ptr_ptr)->filename) == 0) -+ if (FILENAME_CMP (normalize (*files_to_delete, arch), -+ (*current_ptr_ptr)->filename) == 0) - { - ++match_count; - if (counted_name_mode -@@ -1181,9 +1177,6 @@ - write_archive (arch); - else - output_filename = NULL; -- -- if (tmp != NULL) -- free ((char *) tmp); - } - - diff --git a/packaging/162_ld_cortex_a8_erratum.diff b/packaging/162_ld_cortex_a8_erratum.diff deleted file mode 100644 index 0b20554..0000000 --- a/packaging/162_ld_cortex_a8_erratum.diff +++ /dev/null @@ -1,311 +0,0 @@ -# DP: Cortex A8 workarounds for PLT tail calls - -bfd/ - * elf32-arm.c (cortex_a8_erratum_scan): If the stub is a Thumb - branch to a PLT entry, redirect it to the PLT's Thumb entry point. - -ld/testsuite/ - * ld-arm/cortex-a8-fix-b-plt.s, ld-arm/cortex-a8-fix-b-plt.d, - ld-arm/cortex-a8-fix-bcc-plt.s, ld-arm/cortex-a8-fix-bcc-plt.d, - ld-arm/cortex-a8-fix-bl-plt.s, ld-arm/cortex-a8-fix-bl-plt.d, - ld-arm/cortex-a8-fix-blx-plt.s, ld-arm/cortex-a8-fix-blx-plt.d, - ld-arm/cortex-a8-fix-plt.ld: New tests. - * ld-arm/arm-elf.exp: Run them. - -Index: bfd/elf32-arm.c -=================================================================== ---- ./bfd/elf32-arm.c 2011-04-11 16:23:04.000000000 +0100 -+++ ./bfd/elf32-arm.c 2011-04-12 09:22:06.000000000 +0100 -@@ -4556,6 +4556,7 @@ cortex_a8_erratum_scan (bfd *input_bfd, - bfd_vma target; - enum elf32_arm_stub_type stub_type = arm_stub_none; - struct a8_erratum_reloc key, *found; -+ bfd_boolean use_plt = FALSE; - - key.from = base_vma + i; - found = (struct a8_erratum_reloc *) -@@ -4567,7 +4568,6 @@ cortex_a8_erratum_scan (bfd *input_bfd, - { - char *error_message = NULL; - struct elf_link_hash_entry *entry; -- bfd_boolean use_plt = FALSE; - - /* We don't care about the error returned from this - function, only if there is glue or not. */ -@@ -4671,6 +4671,12 @@ cortex_a8_erratum_scan (bfd *input_bfd, - offset = - (bfd_signed_vma) (found->destination - pc_for_insn); - -+ /* If the stub will use a Thumb-mode branch to a -+ PLT target, redirect it to the preceding Thumb -+ entry point. */ -+ if (stub_type != arm_stub_a8_veneer_blx && use_plt) -+ offset -= PLT_THUMB_STUB_SIZE; -+ - target = pc_for_insn + offset; - - /* The BLX stub is ARM-mode code. Adjust the offset to -Index: ld/testsuite/ld-arm/cortex-a8-fix-b-plt.s -=================================================================== ---- /dev/null 2011-03-23 08:42:11.268792848 +0000 -+++ ./ld/testsuite/ld-arm/cortex-a8-fix-b-plt.s 2011-04-11 16:23:18.000000000 +0100 -@@ -0,0 +1,10 @@ -+ .syntax unified -+ .globl foo -+ .type foo,%function -+ .thumb_func -+foo: -+ nop @ 0x00 -+ movw r0,#0 @ 0x02 -+ movw r0,#0 @ 0x06 -+ movw r0,#0 @ 0x0a -+ b.w bar(PLT) @ 0x0e -Index: ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d -=================================================================== ---- /dev/null 2011-03-23 08:42:11.268792848 +0000 -+++ ./ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d 2011-04-11 16:23:18.000000000 +0100 -@@ -0,0 +1,30 @@ -+ -+.* -+ -+ -+Disassembly of section \.plt: -+ -+00008000 <\.plt>: -+ 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) -+ 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 -+ 8008: e08fe00e add lr, pc, lr -+ 800c: e5bef008 ldr pc, \[lr, #8\]! -+ 8010: 00000ffc \.word 0x00000ffc -+ 8014: 4778 bx pc -+ 8016: 46c0 nop ; \(mov r8, r8\) -+ 8018: e28fc600 add ip, pc, #0 -+ 801c: e28cca00 add ip, ip, #0 -+ 8020: e5bcfff8 ldr pc, \[ip, #4088\]! ; 0xff8 -+ -+Disassembly of section \.text: -+ -+00008ff0 : -+ 8ff0: 46c0 nop ; \(mov r8, r8\) -+ 8ff2: f240 0000 movw r0, #0 -+ 8ff6: f240 0000 movw r0, #0 -+ 8ffa: f240 0000 movw r0, #0 -+ 8ffe: f000 b803 b\.w 9008 -+ 9002: 0000 movs r0, r0 -+ 9004: 0000 movs r0, r0 -+ 9006: 0000 movs r0, r0 -+ 9008: f7ff b804 b\.w 8014 -Index: ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.s -=================================================================== ---- /dev/null 2011-03-23 08:42:11.268792848 +0000 -+++ ./ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.s 2011-04-11 16:23:18.000000000 +0100 -@@ -0,0 +1,10 @@ -+ .syntax unified -+ .globl foo -+ .type foo,%function -+ .thumb_func -+foo: -+ nop @ 0x00 -+ movw r0,#0 @ 0x02 -+ movw r0,#0 @ 0x06 -+ movw r0,#0 @ 0x0a -+ beq.w bar(PLT) @ 0x0e -Index: ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d -=================================================================== ---- /dev/null 2011-03-23 08:42:11.268792848 +0000 -+++ ./ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d 2011-04-11 16:23:18.000000000 +0100 -@@ -0,0 +1,32 @@ -+ -+.* -+ -+ -+Disassembly of section \.plt: -+ -+00008000 <\.plt>: -+ 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) -+ 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 -+ 8008: e08fe00e add lr, pc, lr -+ 800c: e5bef008 ldr pc, \[lr, #8\]! -+ 8010: 00001004 \.word 0x00001004 -+ 8014: 4778 bx pc -+ 8016: 46c0 nop ; \(mov r8, r8\) -+ 8018: e28fc600 add ip, pc, #0 -+ 801c: e28cca01 add ip, ip, #4096 ; 0x1000 -+ 8020: e5bcf000 ldr pc, \[ip\]! -+ -+Disassembly of section \.text: -+ -+00008ff0 : -+ 8ff0: 46c0 nop ; \(mov r8, r8\) -+ 8ff2: f240 0000 movw r0, #0 -+ 8ff6: f240 0000 movw r0, #0 -+ 8ffa: f240 0000 movw r0, #0 -+ 8ffe: f000 b803 b\.w 9008 -+ 9002: 0000 movs r0, r0 -+ 9004: 0000 movs r0, r0 -+ 9006: 0000 movs r0, r0 -+ 9008: d001 beq\.n 900e -+ 900a: f7ff bffa b\.w 9002 -+ 900e: f7ff b801 b\.w 8014 -Index: ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.s -=================================================================== ---- /dev/null 2011-03-23 08:42:11.268792848 +0000 -+++ ./ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.s 2011-04-11 16:23:18.000000000 +0100 -@@ -0,0 +1,10 @@ -+ .syntax unified -+ .globl foo -+ .type foo,%function -+ .thumb_func -+foo: -+ nop @ 0x00 -+ movw r0,#0 @ 0x02 -+ movw r0,#0 @ 0x06 -+ movw r0,#0 @ 0x0a -+ bl bar(PLT) @ 0x0e -Index: ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d -=================================================================== ---- /dev/null 2011-03-23 08:42:11.268792848 +0000 -+++ ./ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d 2011-04-11 16:23:18.000000000 +0100 -@@ -0,0 +1,28 @@ -+ -+.* -+ -+ -+Disassembly of section \.plt: -+ -+00008000 <\.plt>: -+ 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) -+ 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 -+ 8008: e08fe00e add lr, pc, lr -+ 800c: e5bef008 ldr pc, \[lr, #8\]! -+ 8010: 00000ffc \.word 0x00000ffc -+ 8014: e28fc600 add ip, pc, #0 -+ 8018: e28cca00 add ip, ip, #0 -+ 801c: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc -+ -+Disassembly of section \.text: -+ -+00008ff0 : -+ 8ff0: 46c0 nop ; \(mov r8, r8\) -+ 8ff2: f240 0000 movw r0, #0 -+ 8ff6: f240 0000 movw r0, #0 -+ 8ffa: f240 0000 movw r0, #0 -+ 8ffe: f000 e804 blx 9008 -+ 9002: 0000 movs r0, r0 -+ 9004: 0000 movs r0, r0 -+ 9006: 0000 movs r0, r0 -+ 9008: eafffc01 b 8014 -Index: ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.s -=================================================================== ---- /dev/null 2011-03-23 08:42:11.268792848 +0000 -+++ ./ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.s 2011-04-11 16:23:18.000000000 +0100 -@@ -0,0 +1,10 @@ -+ .syntax unified -+ .globl foo -+ .type foo,%function -+ .thumb_func -+foo: -+ nop @ 0x00 -+ movw r0,#0 @ 0x02 -+ movw r0,#0 @ 0x06 -+ movw r0,#0 @ 0x0a -+ blx bar @ 0x0e -Index: ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d -=================================================================== ---- /dev/null 2011-03-23 08:42:11.268792848 +0000 -+++ ./ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d 2011-04-11 16:23:18.000000000 +0100 -@@ -0,0 +1,28 @@ -+ -+.* -+ -+ -+Disassembly of section \.plt: -+ -+00008000 <\.plt>: -+ 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) -+ 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 -+ 8008: e08fe00e add lr, pc, lr -+ 800c: e5bef008 ldr pc, \[lr, #8\]! -+ 8010: 00000ffc \.word 0x00000ffc -+ 8014: e28fc600 add ip, pc, #0 -+ 8018: e28cca00 add ip, ip, #0 -+ 801c: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc -+ -+Disassembly of section \.text: -+ -+00008ff0 : -+ 8ff0: 46c0 nop ; \(mov r8, r8\) -+ 8ff2: f240 0000 movw r0, #0 -+ 8ff6: f240 0000 movw r0, #0 -+ 8ffa: f240 0000 movw r0, #0 -+ 8ffe: f000 e804 blx 9008 -+ 9002: 0000 movs r0, r0 -+ 9004: 0000 movs r0, r0 -+ 9006: 0000 movs r0, r0 -+ 9008: eafffc01 b 8014 -Index: ld/testsuite/ld-arm/cortex-a8-fix-plt.ld -=================================================================== ---- /dev/null 2011-03-23 08:42:11.268792848 +0000 -+++ ./ld/testsuite/ld-arm/cortex-a8-fix-plt.ld 2011-04-11 16:23:18.000000000 +0100 -@@ -0,0 +1,18 @@ -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x07000; -+ .hash : { *(.hash) } -+ .gnu.hash : { *(.gnu.hash) } -+ .dynsym : { *(.dynsym) } -+ .dynstr : { *(.dynstr) } -+ .rel.dyn : { *(.rel.dyn) } -+ .rel.plt : { *(.rel.plt) } -+ . = 0x08000; -+ .plt : { *(.plt) } -+ . = 0x08ff0; -+ .text : { *(.text) } -+ . = 0x10000; -+ .dynamic : { *(.dynamic) } -+} -Index: ld/testsuite/ld-arm/arm-elf.exp -=================================================================== ---- ld/testsuite/ld-arm/arm-elf.exp 2011-04-11 16:23:04.000000000 +0100 -+++ ./ld/testsuite/ld-arm/arm-elf.exp 2011-04-11 16:23:18.000000000 +0100 -@@ -210,18 +210,38 @@ set armelftests { - "-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-b.s} - {{objdump -dr cortex-a8-fix-b.d}} - "cortex-a8-fix-b"} -+ {"Cortex-A8 erratum fix, b.w to PLT" -+ "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL" -+ {cortex-a8-fix-b-plt.s} -+ {{objdump -dr cortex-a8-fix-b-plt.d}} -+ "cortex-a8-fix-b-plt"} - {"Cortex-A8 erratum fix, bl.w" - "-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-bl.s} - {{objdump -dr cortex-a8-fix-bl.d}} - "cortex-a8-fix-bl"} -+ {"Cortex-A8 erratum fix, bl.w to PLT" -+ "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL" -+ {cortex-a8-fix-bl-plt.s} -+ {{objdump -dr cortex-a8-fix-bl-plt.d}} -+ "cortex-a8-fix-bl-plt"} - {"Cortex-A8 erratum fix, bcc.w" - "-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-bcc.s} - {{objdump -dr cortex-a8-fix-bcc.d}} - "cortex-a8-fix-bcc"} -+ {"Cortex-A8 erratum fix, bcc.w to PLT" -+ "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL" -+ {cortex-a8-fix-bcc-plt.s} -+ {{objdump -dr cortex-a8-fix-bcc-plt.d}} -+ "cortex-a8-fix-bcc-plt"} - {"Cortex-A8 erratum fix, blx.w" - "-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-blx.s} - {{objdump -dr cortex-a8-fix-blx.d}} - "cortex-a8-fix-blx"} -+ {"Cortex-A8 erratum fix, blx.w to PLT" -+ "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL" -+ {cortex-a8-fix-blx-plt.s} -+ {{objdump -dr cortex-a8-fix-blx-plt.d}} -+ "cortex-a8-fix-blx-plt"} - {"Cortex-A8 erratum fix, relocate b.w to ARM" - "-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-arm-target.s cortex-a8-fix-b-rel.s} - {{objdump -dr cortex-a8-fix-b-rel-arm.d}} diff --git a/packaging/162_pr12730.diff b/packaging/162_pr12730.diff deleted file mode 100644 index 744ae55..0000000 --- a/packaging/162_pr12730.diff +++ /dev/null @@ -1,392 +0,0 @@ -# DP: Fix PR ld/12730, taken from the trunk - -2011-05-07 H.J. Lu - - PR ld/12730 - * elf.c (_bfd_elf_section_offset): Check SEC_ELF_REVERSE_COPY. - - * elflink.c (elf_link_input_bfd): Reverse copy .ctors/.dtors - sections if needed. - - * section.c (SEC_ELF_REVERSE_COPY): New. - * bfd-in2.h: Regenerated. - -2011-05-07 H.J. Lu - - PR ld/12730 - * ld-elf/elf.exp (array_tests): Add "pr12730". - (array_tests_pie): New. - (array_tests_static): Add -static for "static init array mixed". - Add "static pr12730". Run array_tests_pie for Linux. - - * ld-elf/init-mixed.c (ctor1007): Renamed to ... - (ctor1007a): This. - (ctor1007b): New. - (ctors1007): Remove ctor1007. Add ctor1007b and ctor1007a. - (dtor1007): Renamed to ... - (dtor1007a): This. - (dtor1007b): New. - (dtors1007): Remove dtor1007. Add dtor1007b and dtor1007a. - (ctor65535): Renamed to ... - (ctor65535a): This. - (ctor65535b): New. - (ctors65535): Remove ctor65535. Add ctor65535b and ctor65535a. - (dtor65535): Renamed to ... - (dtor65535a): This. - (dtor65535b): New. - (dtors65535): Remove dtor65535. Add dtor65535b and dtor65535a. - - * ld-elf/pr12730.cc: New. - * ld-elf/pr12730.out: Likewise. - -diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index aa12c8a..5076ccf 100644 ---- a/bfd/bfd-in2.h -+++ b/bfd/bfd-in2.h -@@ -1320,6 +1320,11 @@ typedef struct bfd_section - sections. */ - #define SEC_COFF_SHARED_LIBRARY 0x4000000 - -+ /* This input section should be copied to output in reverse order -+ as an array of pointers. This is for ELF linker internal use -+ only. */ -+#define SEC_ELF_REVERSE_COPY 0x4000000 -+ - /* This section contains data which may be shared with other - executables or shared objects. This is for COFF only. */ - #define SEC_COFF_SHARED 0x8000000 -diff --git a/bfd/elf.c b/bfd/elf.c -index b5a1952..6fccf42 100644 ---- a/bfd/elf.c -+++ b/bfd/elf.c -@@ -9379,6 +9379,12 @@ _bfd_elf_section_offset (bfd *abfd, - case ELF_INFO_TYPE_EH_FRAME: - return _bfd_elf_eh_frame_section_offset (abfd, info, sec, offset); - default: -+ if ((sec->flags & SEC_ELF_REVERSE_COPY) != 0) -+ { -+ const struct elf_backend_data *bed = get_elf_backend_data (abfd); -+ bfd_size_type address_size = bed->s->arch_size / 8; -+ offset = sec->size - offset - address_size; -+ } - return offset; - } - } -diff --git a/bfd/elflink.c b/bfd/elflink.c -index 082355d..e4f728d 100644 ---- a/bfd/elflink.c -+++ b/bfd/elflink.c -@@ -9120,6 +9120,9 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) - asection *o; - const struct elf_backend_data *bed; - struct elf_link_hash_entry **sym_hashes; -+ bfd_size_type address_size; -+ bfd_vma r_type_mask; -+ int r_sym_shift; - - output_bfd = finfo->output_bfd; - bed = get_elf_backend_data (output_bfd); -@@ -9290,6 +9293,19 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) - *pindex = indx; - } - -+ if (bed->s->arch_size == 32) -+ { -+ r_type_mask = 0xff; -+ r_sym_shift = 8; -+ address_size = 4; -+ } -+ else -+ { -+ r_type_mask = 0xffffffff; -+ r_sym_shift = 32; -+ address_size = 8; -+ } -+ - /* Relocate the contents of each section. */ - sym_hashes = elf_sym_hashes (input_bfd); - for (o = input_bfd->sections; o != NULL; o = o->next) -@@ -9394,8 +9410,6 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) - { - Elf_Internal_Rela *internal_relocs; - Elf_Internal_Rela *rel, *relend; -- bfd_vma r_type_mask; -- int r_sym_shift; - int action_discarded; - int ret; - -@@ -9407,15 +9421,27 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) - && o->reloc_count > 0) - return FALSE; - -- if (bed->s->arch_size == 32) -+ /* We need to reverse-copy input .ctors/.dtors sections if -+ they are placed in .init_array/.finit_array for output. */ -+ if (o->size > address_size -+ && ((strncmp (o->name, ".ctors", 6) == 0 -+ && strcmp (o->output_section->name, -+ ".init_array") == 0) -+ || (strncmp (o->name, ".dtors", 6) == 0 -+ && strcmp (o->output_section->name, -+ ".fini_array") == 0)) -+ && (o->name[6] == 0 || o->name[6] == '.')) - { -- r_type_mask = 0xff; -- r_sym_shift = 8; -- } -- else -- { -- r_type_mask = 0xffffffff; -- r_sym_shift = 32; -+ if (o->size != o->reloc_count * address_size) -+ { -+ (*_bfd_error_handler) -+ (_("error: %B: size of section %A is not " -+ "multiple of address size"), -+ input_bfd, o); -+ bfd_set_error (bfd_error_on_input); -+ return FALSE; -+ } -+ o->flags |= SEC_ELF_REVERSE_COPY; - } - - action_discarded = -1; -@@ -9876,12 +9902,34 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) - default: - { - /* FIXME: octets_per_byte. */ -- if (! (o->flags & SEC_EXCLUDE) -- && ! bfd_set_section_contents (output_bfd, o->output_section, -- contents, -- (file_ptr) o->output_offset, -- o->size)) -- return FALSE; -+ if (! (o->flags & SEC_EXCLUDE)) -+ { -+ file_ptr offset = (file_ptr) o->output_offset; -+ bfd_size_type todo = o->size; -+ if ((o->flags & SEC_ELF_REVERSE_COPY)) -+ { -+ /* Reverse-copy input section to output. */ -+ do -+ { -+ todo -= address_size; -+ if (! bfd_set_section_contents (output_bfd, -+ o->output_section, -+ contents + todo, -+ offset, -+ address_size)) -+ return FALSE; -+ if (todo == 0) -+ break; -+ offset += address_size; -+ } -+ while (1); -+ } -+ else if (! bfd_set_section_contents (output_bfd, -+ o->output_section, -+ contents, -+ offset, todo)) -+ return FALSE; -+ } - } - break; - } -diff --git a/bfd/section.c b/bfd/section.c -index 65ac5e6..3cd7e65 100644 ---- a/bfd/section.c -+++ b/bfd/section.c -@@ -327,6 +327,11 @@ CODE_FRAGMENT - . sections. *} - .#define SEC_COFF_SHARED_LIBRARY 0x4000000 - . -+. {* This input section should be copied to output in reverse order -+. as an array of pointers. This is for ELF linker internal use -+. only. *} -+.#define SEC_ELF_REVERSE_COPY 0x4000000 -+. - . {* This section contains data which may be shared with other - . executables or shared objects. This is for COFF only. *} - .#define SEC_COFF_SHARED 0x8000000 -diff --git a/ld/testsuite/ld-elf/elf.exp b/ld/testsuite/ld-elf/elf.exp -index 73a417c..6808d8a 100644 ---- a/ld/testsuite/ld-elf/elf.exp -+++ b/ld/testsuite/ld-elf/elf.exp -@@ -81,17 +81,32 @@ set array_tests { - {"init array" "" "" {init.c} "init" "init.out"} - {"fini array" "" "" {fini.c} "fini" "fini.out"} - {"init array mixed" "" "" {init-mixed.c} "init-mixed" "init-mixed.out" "-I."} -+ {"pr12730" "" "" {pr12730.cc} "pr12730" "pr12730.out" "" "c++"} -+} -+set array_tests_pie { -+ {"PIE preinit array" "-pie" "" {preinit.c} "preinit" "preinit.out" "-fPIE" } -+ {"PIE init array" "-pie" "" {init.c} "init" "init.out" "-fPIE"} -+ {"PIE fini array" "-pie" "" {fini.c} "fini" "fini.out" "-fPIE"} -+ {"PIE init array mixed" "-pie" "" {init-mixed.c} "init-mixed" "init-mixed.out" "-I. -fPIE"} -+ {"PIE pr12730" "-pie" "" {pr12730.cc} "pr12730" "pr12730.out" "-fPIE" "c++"} - } - set array_tests_static { - {"static preinit array" "-static" "" {preinit.c} "preinit" "preinit.out"} - {"static init array" "-static" "" {init.c} "init" "init.out"} - {"static fini array" "-static" "" {fini.c} "fini" "fini.out"} -- {"static init array mixed" "" "" {init-mixed.c} "init-mixed" "init-mixed.out" "-I."} -+ {"static init array mixed" "-static" "" {init-mixed.c} "init-mixed" "init-mixed.out" "-I."} -+ {"static pr12730" "-static" "" {pr12730.cc} "pr12730" "pr12730.out" "" "c++"} - } - - # NetBSD ELF systems do not currently support the .*_array sections. - set xfails [list "*-*-netbsdelf*"] - run_ld_link_exec_tests $xfails $array_tests -+ -+# Run PIE tests only on Linux. -+if { [istarget "*-*-linux*"] } { -+ run_ld_link_exec_tests $xfails $array_tests_pie -+} -+ - # Be cautious to not XFAIL for *-*-linux-gnu*, *-*-kfreebsd-gnu*, etc. - switch -regexp $target_triplet { - ^\[^-\]*-\[^-\]*-gnu.*$ { -diff --git a/ld/testsuite/ld-elf/init-mixed.c b/ld/testsuite/ld-elf/init-mixed.c -index 1d0c727..770a4b5 100644 ---- a/ld/testsuite/ld-elf/init-mixed.c -+++ b/ld/testsuite/ld-elf/init-mixed.c -@@ -27,25 +27,39 @@ void (*const fini_array1005[]) () - = { fini1005 }; - - static void --ctor1007 () -+ctor1007a () - { - if (count != 1005) - abort (); -+ count = 1006; -+} -+static void -+ctor1007b () -+{ -+ if (count != 1006) -+ abort (); - count = 1007; - } - void (*const ctors1007[]) () - __attribute__ ((section (".ctors.64528"), aligned (sizeof (void *)))) -- = { ctor1007 }; -+ = { ctor1007b, ctor1007a }; - static void --dtor1007 () -+dtor1007a () - { -- if (count != 1007) -+ if (count != 1006) - abort (); - count = 1005; - } -+static void -+dtor1007b () -+{ -+ if (count != 1007) -+ abort (); -+ count = 1006; -+} - void (*const dtors1007[]) () - __attribute__ ((section (".dtors.64528"), aligned (sizeof (void *)))) -- = { dtor1007 }; -+ = { dtor1007b, dtor1007a }; - - static void - init65530 () -@@ -69,17 +83,31 @@ void (*const fini_array65530[]) () - = { fini65530 }; - - static void --ctor65535 () -+ctor65535a () - { - if (count != 65530) - abort (); - count = 65535; - } -+static void -+ctor65535b () -+{ -+ if (count != 65535) -+ abort (); -+ count = 65536; -+} - void (*const ctors65535[]) () - __attribute__ ((section (".ctors"), aligned (sizeof (void *)))) -- = { ctor65535 }; -+ = { ctor65535b, ctor65535a }; -+static void -+dtor65535b () -+{ -+ if (count != 65536) -+ abort (); -+ count = 65535; -+} - static void --dtor65535 () -+dtor65535a () - { - if (count != 65535) - abort (); -@@ -87,7 +115,7 @@ dtor65535 () - } - void (*const dtors65535[]) () - __attribute__ ((section (".dtors"), aligned (sizeof (void *)))) -- = { dtor65535 }; -+ = { dtor65535b, dtor65535a }; - #endif - - int -diff --git a/ld/testsuite/ld-elf/pr12730.cc b/ld/testsuite/ld-elf/pr12730.cc -new file mode 100644 -index 0000000..69f57f9 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr12730.cc -@@ -0,0 +1,38 @@ -+#include -+ -+class Hello -+{ -+public: -+ Hello () -+ {} -+ -+ ~Hello () -+ {} -+ -+ void act () -+ { std::cout << "Hello, world!" << std::endl; } -+}; -+ -+ -+template -+struct Foo -+{ -+ T* _M_allocate_single_object () -+ { -+ return new T; -+ } -+}; -+ -+static void __attribute__ (( constructor )) PWLIB_StaticLoader() { -+ Foo allocator; -+ Hello* salut = allocator._M_allocate_single_object (); -+ salut->act (); -+} -+ -+ -+int -+main (int /*argc*/, -+ char* /*argv*/[]) -+{ -+ return 0; -+} -diff --git a/ld/testsuite/ld-elf/pr12730.out b/ld/testsuite/ld-elf/pr12730.out -new file mode 100644 -index 0000000..af5626b ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr12730.out -@@ -0,0 +1 @@ -+Hello, world! diff --git a/packaging/163_pr12726.diff b/packaging/163_pr12726.diff deleted file mode 100644 index da6b478..0000000 --- a/packaging/163_pr12726.diff +++ /dev/null @@ -1,135 +0,0 @@ -ld/ - -2011-05-04 Alan Modra - - PR ld/12726 - * ldexp.h (lang_phase_type): Add lang_assigning_phase_enum. - * ldexp.c (exp_fold_tree_1): Correct assign to dot comment. Don't - assign to dot when lang_assigning_phase_enum. - * ldlang.h (lang_do_assignments): Update prototype. - * ldlang.c (lang_do_assignments): Add phase parameter. Update all - callers. - * pe-dll.c (pe_dll_fill_sections, pe_exe_fill_sections): Update - lang_do_assignments calls. - - PR ld/12614 -diff --git a/ld/ldexp.c b/ld/ldexp.c -index fc18601..f70634c 100644 ---- a/ld/ldexp.c -+++ b/ld/ldexp.c -@@ -783,12 +783,15 @@ exp_fold_tree_1 (etree_type *tree) - case etree_provided: - if (tree->assign.dst[0] == '.' && tree->assign.dst[1] == 0) - { -- /* Assignment to dot can only be done during allocation. */ - if (tree->type.node_class != etree_assign) - einfo (_("%F%S can not PROVIDE assignment to location counter\n")); -+ /* After allocation, assignment to dot should not be done inside -+ an output section since allocation adds a padding statement -+ that effectively duplicates the assignment. */ - if (expld.phase == lang_mark_phase_enum - || expld.phase == lang_allocating_phase_enum -- || (expld.phase == lang_final_phase_enum -+ || ((expld.phase == lang_assigning_phase_enum -+ || expld.phase == lang_final_phase_enum) - && expld.section == bfd_abs_section_ptr)) - { - /* Notify the folder that this is an assignment to dot. */ -diff --git a/ld/ldexp.h b/ld/ldexp.h -index 6d98e75..4ea13c2 100644 ---- a/ld/ldexp.h -+++ b/ld/ldexp.h -@@ -97,6 +97,7 @@ typedef enum { - lang_first_phase_enum, - lang_mark_phase_enum, - lang_allocating_phase_enum, -+ lang_assigning_phase_enum, - lang_final_phase_enum - } lang_phase_type; - -diff --git a/ld/ldlang.c b/ld/ldlang.c -index 2c07fa4..c291fd9 100644 ---- a/ld/ldlang.c -+++ b/ld/ldlang.c -@@ -5606,8 +5606,9 @@ lang_do_assignments_1 (lang_statement_union_type *s, - } - - void --lang_do_assignments (void) -+lang_do_assignments (lang_phase_type phase) - { -+ expld.phase = phase; - lang_statement_iteration++; - lang_do_assignments_1 (statement_list.head, abs_output_section, NULL, 0); - } -@@ -6403,7 +6404,7 @@ lang_relax_sections (bfd_boolean need_layout) - - /* Do all the assignments with our current guesses as to - section sizes. */ -- lang_do_assignments (); -+ lang_do_assignments (lang_assigning_phase_enum); - - /* We must do this after lang_do_assignments, because it uses - size. */ -@@ -6424,7 +6425,7 @@ lang_relax_sections (bfd_boolean need_layout) - if (need_layout) - { - /* Final extra sizing to report errors. */ -- lang_do_assignments (); -+ lang_do_assignments (lang_assigning_phase_enum); - lang_reset_memory_regions (); - lang_size_sections (NULL, TRUE); - } -@@ -6666,8 +6667,7 @@ lang_process (void) - - /* Do all the assignments, now that we know the final resting places - of all the symbols. */ -- expld.phase = lang_final_phase_enum; -- lang_do_assignments (); -+ lang_do_assignments (lang_final_phase_enum); - - ldemul_finish (); - -diff --git a/ld/ldlang.h b/ld/ldlang.h -index db47af8..d172c34 100644 ---- a/ld/ldlang.h -+++ b/ld/ldlang.h -@@ -543,7 +543,7 @@ extern void lang_for_each_file - extern void lang_reset_memory_regions - (void); - extern void lang_do_assignments -- (void); -+ (lang_phase_type); - - #define LANG_FOR_EACH_INPUT_STATEMENT(statement) \ - lang_input_statement_type *statement; \ -diff --git a/ld/pe-dll.c b/ld/pe-dll.c -index c8abf4d..682ce46 100644 ---- a/ld/pe-dll.c -+++ b/ld/pe-dll.c -@@ -1,6 +1,6 @@ - /* Routines to help build PEI-format DLLs (Win32 etc) - Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, -- 2008, 2009, 2010 Free Software Foundation, Inc. -+ 2008, 2009, 2010, 2011 Free Software Foundation, Inc. - Written by DJ Delorie - - This file is part of the GNU Binutils. -@@ -3232,7 +3232,7 @@ pe_dll_fill_sections (bfd *abfd, struct bfd_link_info *info) - ldemul_after_allocation (); - - /* Do the assignments again. */ -- lang_do_assignments (); -+ lang_do_assignments (lang_final_phase_enum); - } - - fill_edata (abfd, info); -@@ -3264,7 +3264,7 @@ pe_exe_fill_sections (bfd *abfd, struct bfd_link_info *info) - ldemul_after_allocation (); - - /* Do the assignments again. */ -- lang_do_assignments (); -+ lang_do_assignments (lang_final_phase_enum); - } - reloc_s->contents = reloc_d; - } diff --git a/packaging/200_pr12715.diff b/packaging/200_pr12715.diff deleted file mode 100644 index 4337645..0000000 --- a/packaging/200_pr12715.diff +++ /dev/null @@ -1,34 +0,0 @@ -# DP: Fix PR gas/12715, taken from the trunk - -diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c -index af8c4aa..33c5deb 100644 ---- a/gas/config/tc-arm.c -+++ b/gas/config/tc-arm.c -@@ -4450,7 +4450,7 @@ parse_big_immediate (char **str, int i) - /* If we're on a 64-bit host, then a 64-bit number can be returned using - O_constant. We have to be careful not to break compilation for - 32-bit X_add_number, though. */ -- if ((exp.X_add_number & ~0xffffffffl) != 0) -+ if ((exp.X_add_number & ~(offsetT)(0xffffffffU)) != 0) - { - /* X >> 32 is illegal if sizeof (exp.X_add_number) == 4. */ - inst.operands[i].reg = ((exp.X_add_number >> 16) >> 16) & 0xffffffff; -diff --git a/gas/testsuite/gas/arm/neon-const.d b/gas/testsuite/gas/arm/neon-const.d -index a1bc97c..6c46930 100644 ---- a/gas/testsuite/gas/arm/neon-const.d -+++ b/gas/testsuite/gas/arm/neon-const.d -@@ -263,3 +263,4 @@ Disassembly of section .text: - 0[0-9a-f]+ <[^>]+> f3850f5f vmov\.f32 q0, #-0\.484375 ; 0xbef80000 - 0[0-9a-f]+ <[^>]+> f3860f5f vmov\.f32 q0, #-0\.96875 ; 0xbf780000 - 0[0-9a-f]+ <[^>]+> f3870f5f vmov\.f32 q0, #-1\.9375 ; 0xbff80000 -+0[0-9a-f]+ <[^>]+> f3879e3f vmov\.i64 d9, #0xffffffffffffffff -diff --git a/gas/testsuite/gas/arm/neon-const.s b/gas/testsuite/gas/arm/neon-const.s -index a6fb550..aaaf144 100644 ---- a/gas/testsuite/gas/arm/neon-const.s -+++ b/gas/testsuite/gas/arm/neon-const.s -@@ -295,3 +295,5 @@ - vmov.f32 q0, -0.484375 - vmov.f32 q0, -0.96875 - vmov.f32 q0, -1.9375 -+ -+ vmov.i64 d9, #0xffffffffffffffff diff --git a/packaging/201_pr12778.diff b/packaging/201_pr12778.diff deleted file mode 100644 index 977c6de..0000000 --- a/packaging/201_pr12778.diff +++ /dev/null @@ -1,37 +0,0 @@ -# DP: Fix PR ld/12778, proposed patch by Rafal Krypa - -diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c -index faf18d0..89bb94e 100644 ---- a/bfd/elf32-arm.c -+++ b/bfd/elf32-arm.c -@@ -12027,29 +12027,29 @@ elf32_arm_gc_sweep_hook (bfd * abfd, - if (h != NULL) - pp = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs; - else - { - Elf_Internal_Sym *isym; - - isym = bfd_sym_from_r_symndx (&globals->sym_cache, - abfd, r_symndx); - if (isym == NULL) - return FALSE; - pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); - if (pp == NULL) - return FALSE; - } -- for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next) -+ for (; (p = *pp) != NULL; pp = &p->next) - if (p->sec == sec) - { - /* Everything must go for SEC. */ - *pp = p->next; - break; - } - } - } - - return TRUE; - } - - /* Look through the relocs for a section during the first phase. */ - diff --git a/packaging/Disable-info.patch b/packaging/Disable-info.patch deleted file mode 100644 index e770e58..0000000 --- a/packaging/Disable-info.patch +++ /dev/null @@ -1,110 +0,0 @@ -diff -ruNa binutils-2.21.51.20110421.orig//bfd/Makefile.in binutils-2.21.51.20110421/bfd/Makefile.in ---- binutils-2.21.51.20110421.orig//bfd/Makefile.in 2011-08-10 10:52:06.737372000 +0900 -+++ binutils-2.21.51.20110421/bfd/Makefile.in 2011-08-10 11:16:21.663372000 +0900 -@@ -323,7 +323,7 @@ - # RELEASE=y - INCDIR = $(srcdir)/../include - CSEARCH = -I. -I$(srcdir) -I$(INCDIR) --SUBDIRS = doc po -+SUBDIRS = po - bfddocdir = doc - libbfd_la_LDFLAGS = $(am__append_1) -release `cat libtool-soversion` \ - @SHARED_LDFLAGS@ $(am__empty) -@@ -1738,7 +1738,7 @@ - - html-am: - --info: info-recursive -+#info: info-recursive - - info-am: - -diff -ruNa binutils-2.21.51.20110421.orig//binutils/Makefile.in binutils-2.21.51.20110421/binutils/Makefile.in ---- binutils-2.21.51.20110421.orig//binutils/Makefile.in 2011-08-10 10:52:10.436372000 +0900 -+++ binutils-2.21.51.20110421/binutils/Makefile.in 2011-08-10 11:22:16.121372001 +0900 -@@ -378,7 +378,7 @@ - top_srcdir = @top_srcdir@ - AUTOMAKE_OPTIONS = dejagnu no-dist foreign - ACLOCAL_AMFLAGS = -I .. -I ../config -I ../bfd --SUBDIRS = doc po -+SUBDIRS = po - tooldir = $(exec_prefix)/$(target_alias) - - # Automake 1.10+ disables lex and yacc output file regeneration if -@@ -1086,7 +1086,7 @@ - - html-am: - --info: info-recursive -+#info: info-recursive - - info-am: - -diff -ruNa binutils-2.21.51.20110421.orig//etc/Makefile.in binutils-2.21.51.20110421/etc/Makefile.in ---- binutils-2.21.51.20110421.orig//etc/Makefile.in 2011-08-10 10:52:15.528372002 +0900 -+++ binutils-2.21.51.20110421/etc/Makefile.in 2011-08-10 11:26:52.247372002 +0900 -@@ -63,8 +63,8 @@ - PDFFILES = standards.pdf configure.pdf - HTMLFILES = standards.html configure.html - --all: info --install install-strip: install-info -+all: -+install install-strip: - - uninstall: - -diff -ruNa binutils-2.21.51.20110421.orig//gas/Makefile.in binutils-2.21.51.20110421/gas/Makefile.in ---- binutils-2.21.51.20110421.orig//gas/Makefile.in 2011-08-10 10:51:59.234372002 +0900 -+++ binutils-2.21.51.20110421/gas/Makefile.in 2011-08-10 11:22:52.492372001 +0900 -@@ -281,7 +281,7 @@ - top_srcdir = @top_srcdir@ - AUTOMAKE_OPTIONS = 1.11 dejagnu foreign no-dist - ACLOCAL_AMFLAGS = -I .. -I ../config -I ../bfd --SUBDIRS = doc po -+SUBDIRS = po - tooldir = $(exec_prefix)/$(target_alias) - - # Automake 1.10+ disables lex and yacc output file regeneration if -diff -ruNa binutils-2.21.51.20110421.orig//gprof/Makefile.in binutils-2.21.51.20110421/gprof/Makefile.in ---- binutils-2.21.51.20110421.orig//gprof/Makefile.in 2011-08-10 10:52:09.935372001 +0900 -+++ binutils-2.21.51.20110421/gprof/Makefile.in 2011-08-10 11:44:28.280371999 +0900 -@@ -93,7 +93,7 @@ - --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \ - $(LDFLAGS) -o $@ - SOURCES = $(gprof_SOURCES) --INFO_DEPS = gprof.info -+INFO_DEPS = - am__TEXINFO_TEX_DIR = $(srcdir)/$(top_srcdir)/../texinfo - DVIS = gprof.dvi - PDFS = gprof.pdf -@@ -802,7 +802,7 @@ - check-am: all-am - check: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) check-recursive --all-am: Makefile $(INFO_DEPS) $(PROGRAMS) $(MANS) $(HEADERS) gconfig.h -+all-am: Makefile $(PROGRAMS) $(MANS) $(HEADERS) gconfig.h - installdirs: installdirs-recursive - installdirs-am: - for dir in "$(DESTDIR)$(bindir)" "$(DESTDIR)$(infodir)" "$(DESTDIR)$(man1dir)"; do \ -diff -ruNa binutils-2.21.51.20110421.orig//ld/Makefile.in binutils-2.21.51.20110421/ld/Makefile.in ---- binutils-2.21.51.20110421.orig//ld/Makefile.in 2011-08-10 10:52:11.370372002 +0900 -+++ binutils-2.21.51.20110421/ld/Makefile.in 2011-08-10 11:44:58.931372000 +0900 -@@ -117,7 +117,7 @@ - --mode=compile $(YACC) $(YFLAGS) $(AM_YFLAGS) - SOURCES = $(libldtestplug_la_SOURCES) $(ld_new_SOURCES) \ - $(EXTRA_ld_new_SOURCES) --INFO_DEPS = ld.info -+INFO_DEPS = - am__TEXINFO_TEX_DIR = $(srcdir)/$(top_srcdir)/../texinfo - DVIS = ld.dvi - PDFS = ld.pdf -@@ -1775,7 +1775,7 @@ - $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU - check: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) check-recursive --all-am: Makefile $(INFO_DEPS) $(LTLIBRARIES) $(PROGRAMS) $(MANS) \ -+all-am: Makefile $(LTLIBRARIES) $(PROGRAMS) $(MANS) \ - config.h - installdirs: installdirs-recursive - installdirs-am: diff --git a/packaging/Fix-gold-libopcode.patch b/packaging/Fix-gold-libopcode.patch deleted file mode 100644 index 1f57b7e..0000000 --- a/packaging/Fix-gold-libopcode.patch +++ /dev/null @@ -1,29 +0,0 @@ -diff -ruNa binutils-2.21.51.20110421.orig/Makefile.def binutils-2.21.51.20110421/Makefile.def ---- binutils-2.21.51.20110421.orig/Makefile.def 2011-08-10 06:42:05.538939781 +0800 -+++ binutils-2.21.51.20110421/Makefile.def 2011-08-10 06:47:40.166938656 +0800 -@@ -403,6 +403,7 @@ - dependencies = { module=all-gold; on=all-libiberty; }; - dependencies = { module=all-gold; on=all-intl; }; - dependencies = { module=all-gold; on=all-bfd; }; -+dependencies = { module=all-gold; on=all-opcodes; }; - dependencies = { module=all-gold; on=all-build-bison; }; - dependencies = { module=check-gold; on=all-binutils; }; - dependencies = { module=check-gold; on=all-gas; }; -diff -ruNa binutils-2.21.51.20110421.orig/Makefile.in binutils-2.21.51.20110421/Makefile.in ---- binutils-2.21.51.20110421.orig/Makefile.in 2011-08-10 06:42:05.534940354 +0800 -+++ binutils-2.21.51.20110421/Makefile.in 2011-08-10 06:46:11.326938663 +0800 -@@ -43299,6 +43299,14 @@ - all-stage4-gold: maybe-all-stage4-bfd - all-stageprofile-gold: maybe-all-stageprofile-bfd - all-stagefeedback-gold: maybe-all-stagefeedback-bfd -+all-gold: maybe-all-opcodes -+ -+all-stage1-gold: maybe-all-stage1-opcodes -+all-stage2-gold: maybe-all-stage2-opcodes -+all-stage3-gold: maybe-all-stage3-opcodes -+all-stage4-gold: maybe-all-stage4-opcodes -+all-stageprofile-gold: maybe-all-stageprofile-opcodes -+all-stagefeedback-gold: maybe-all-stagefeedback-opcodes - all-gold: maybe-all-build-bison - - all-stage1-gold: maybe-all-build-bison diff --git a/packaging/baselibs.conf b/packaging/baselibs.conf index cdd3d5f..7e5b1a3 100644 --- a/packaging/baselibs.conf +++ b/packaging/baselibs.conf @@ -1,16 +1,22 @@ -arch i586 targets armv5tel:armv5tel armv7l:armv7l armv7hl:armv7hl armv7nhl:armv7nhl +arch i586 targets armv5tel:armv5tel armv6l:armv6l armv7l:armv7l armv7hl:armv7hl armv7nhl:armv7nhl mipsel:mipsel +arch x86_64 targets armv5tel:armv5tel armv6l:armv6l armv7l:armv7l armv7hl:armv7hl armv7nhl:armv7nhl mipsel:mipsel -cross-armv5tel-binutils-accel + +cross-armv5tel-binutils-accel-@X86@ targettype x86 block! targettype 32bit block! + targettype armv6l block! targettype armv7l block! targettype armv7hl block! targettype armv7nhl block! + targettype mipsel block! targettype armv5tel autoreqprov off targettype armv5tel provides "cross-arm-binutils-accel" - targettype armv5tel requires "glibc-x86-arm" - targettype armv5tel requires "zlib-x86-arm" + targettype armv5tel provides "cross-armv5tel-binutils-accel-armv5tel" + targettype armv5tel requires "cross-arm-gcc-accel" + targettype armv5tel requires "eglibc-@X86@-arm" + targettype armv5tel requires "zlib-@X86@-arm" targettype armv5tel requires "binutils" targettype armv5tel prefix /emul/ia32-linux targettype armv5tel extension -arm @@ -19,38 +25,106 @@ cross-armv5tel-binutils-accel targettype armv5tel -/usr/share/doc targettype armv5tel requires "tizen-accelerator" - - - targettype armv5tel post " for bin in addr2line ar as c++filt gprov ld nm objcopy objdump ranlib readelf size strings strip ; do" + targettype armv5tel post "#set -x" + targettype armv5tel post " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype armv5tel post " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" targettype armv5tel post " binary="/usr/bin/${bin}" " - targettype armv5tel post " if test -e ${binary} -a ! -e ${binary}.orig-arm ; then" - targettype armv5tel post " mv ${binary} ${binary}.orig-arm && ln -s ${binary} ${binary}" - targettype armv5tel post " else " + targettype armv5tel post " if test -L ${binary} -a -e ${binary}.orig-arm ; then" targettype armv5tel post " echo "${binary} not installed or ${binary}.orig-arm already present !" " + targettype armv5tel post " else " + targettype armv5tel post " mv ${binary} ${binary}.orig-arm && ln -s ${binary} ${binary}" + targettype armv5tel post " ln -s ${binary} /usr/lib/gcc/armv5tel-tizen-linux-gnueabi/${GCCVER}/${bin}" targettype armv5tel post " fi " targettype armv5tel post " done " + targettype armv5tel post " ln -sf /usr/bin/ld /usr/lib/gcc/armv5tel-tizen-linux-gnueabi/${GCCVER}/ld" + targettype armv5tel post " ln -sf /usr/bin/ld.bfd /usr/lib/gcc/armv5tel-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype armv5tel post " ln -sf /usr/bin/ld.gold /usr/lib/gcc/armv5tel-tizen-linux-gnueabi/${GCCVER}/ld.gold" - targettype armv5tel preun " for bin in addr2line ar as c++filt gprov ld nm objcopy objdump ranlib readelf size strings strip ; do" + targettype armv5tel preun " set -x" + targettype armv5tel preun " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype armv5tel preun " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" targettype armv5tel preun " binary="/usr/bin/${bin}" " targettype armv5tel preun " if test -e ${binary}.orig-arm ; then" targettype armv5tel preun " rm ${binary} && mv ${binary}.orig-arm ${binary}" + targettype armv5tel preun " rm /usr/lib/gcc/armv5tel-tizen-linux-gnueabi/${GCCVER}/${bin}" targettype armv5tel preun " else " targettype armv5tel preun " echo "${binary}.orig-arm not present !" " targettype armv5tel preun " fi " targettype armv5tel preun " done " + targettype armv5tel preun " rm -f /usr/lib/gcc/armv5tel-tizen-linux-gnueabi/${GCCVER}/ld" + targettype armv5tel preun " rm -f /usr/lib/gcc/armv5tel-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype armv5tel preun " rm -f /usr/lib/gcc/armv5tel-tizen-linux-gnueabi/${GCCVER}/ld.gold" + + +cross-armv6l-binutils-accel-@X86@ + targettype x86 block! + targettype 32bit block! + targettype armv5tel block! + targettype armv7l block! + targettype armv7hl block! + targettype armv7nhl block! + targettype mipsel block! + + targettype armv6l autoreqprov off + targettype armv6l provides "cross-arm-binutils-accel" + targettype armv6l provides "cross-armv6l-binutils-accel-armv6l" + targettype armv6l requires "cross-arm-gcc-accel" + targettype armv6l requires "eglibc-@X86@-arm" + targettype armv6l requires "zlib-@X86@-arm" + targettype armv6l requires "binutils" + targettype armv6l prefix /emul/ia32-linux + targettype armv6l extension -arm + targettype armv6l +/ + targettype armv6l -/usr/share/man + targettype armv6l -/usr/share/doc + targettype armv6l requires "tizen-accelerator" + + targettype armv6l post "#set -x" + targettype armv6l post " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype armv6l post " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" + targettype armv6l post " binary="/usr/bin/${bin}" " + targettype armv6l post " if test -L ${binary} -a -e ${binary}.orig-arm ; then" + targettype armv6l post " echo "${binary} not installed or ${binary}.orig-arm already present !" " + targettype armv6l post " else " + targettype armv6l post " mv ${binary} ${binary}.orig-arm && ln -s ${binary} ${binary}" + targettype armv6l post " ln -s ${binary} /usr/lib/gcc/armv6l-tizen-linux-gnueabi/${GCCVER}/${bin}" + targettype armv6l post " fi " + targettype armv6l post " done " + targettype armv6l post " ln -sf /usr/bin/ld /usr/lib/gcc/armv6l-tizen-linux-gnueabi/${GCCVER}/ld" + targettype armv6l post " ln -sf /usr/bin/ld.bfd /usr/lib/gcc/armv6l-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype armv6l post " ln -sf /usr/bin/ld.gold /usr/lib/gcc/armv6l-tizen-linux-gnueabi/${GCCVER}/ld.gold" + + targettype armv6l preun " set -x" + targettype armv6l preun " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype armv6l preun " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" + targettype armv6l preun " binary="/usr/bin/${bin}" " + targettype armv6l preun " if test -e ${binary}.orig-arm ; then" + targettype armv6l preun " rm ${binary} && mv ${binary}.orig-arm ${binary}" + targettype armv6l preun " rm /usr/lib/gcc/armv6l-tizen-linux-gnueabi/${GCCVER}/${bin}" + targettype armv6l preun " else " + targettype armv6l preun " echo "${binary}.orig-arm not present !" " + targettype armv6l preun " fi " + targettype armv6l preun " done " + targettype armv6l preun " rm -f /usr/lib/gcc/armv6l-tizen-linux-gnueabi/${GCCVER}/ld" + targettype armv6l preun " rm -f /usr/lib/gcc/armv6l-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype armv6l preun " rm -f /usr/lib/gcc/armv6l-tizen-linux-gnueabi/${GCCVER}/ld.gold" -cross-armv7l-binutils-accel +cross-armv7l-binutils-accel-@X86@ targettype x86 block! targettype 32bit block! targettype armv5tel block! + targettype armv6l block! targettype armv7hl block! targettype armv7nhl block! + targettype mipsel block! targettype armv7l autoreqprov off targettype armv7l provides "cross-arm-binutils-accel" - targettype armv7l requires "glibc-x86-arm" - targettype armv7l requires "zlib-x86-arm" + targettype armv7l provides "cross-armv7l-binutils-accel-armv7l" + targettype armv7l requires "cross-arm-gcc-accel" + targettype armv7l requires "eglibc-@X86@-arm" + targettype armv7l requires "zlib-@X86@-arm" targettype armv7l requires "binutils" targettype armv7l prefix /emul/ia32-linux targettype armv7l extension -arm @@ -59,38 +133,52 @@ cross-armv7l-binutils-accel targettype armv7l -/usr/share/doc targettype armv7l requires "tizen-accelerator" - - - targettype armv7l post " for bin in addr2line ar as c++filt gprov ld nm objcopy objdump ranlib readelf size strings strip ; do" + targettype armv7l post "#set -x" + targettype armv7l post " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype armv7l post " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" targettype armv7l post " binary="/usr/bin/${bin}" " - targettype armv7l post " if test -e ${binary} -a ! -e ${binary}.orig-arm ; then" - targettype armv7l post " mv ${binary} ${binary}.orig-arm && ln -s ${binary} ${binary}" - targettype armv7l post " else " + targettype armv7l post " if test -L ${binary} -a -e ${binary}.orig-arm ; then" targettype armv7l post " echo "${binary} not installed or ${binary}.orig-arm already present !" " + targettype armv7l post " else " + targettype armv7l post " mv ${binary} ${binary}.orig-arm && ln -s ${binary} ${binary}" + targettype armv7l post " ln -s ${binary} /usr/lib/gcc/armv7l-tizen-linux-gnueabi/${GCCVER}/${bin}" targettype armv7l post " fi " targettype armv7l post " done " + targettype armv7l post " ln -sf /usr/bin/ld /usr/lib/gcc/armv7l-tizen-linux-gnueabi/${GCCVER}/ld" + targettype armv7l post " ln -sf /usr/bin/ld.bfd /usr/lib/gcc/armv7l-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype armv7l post " ln -sf /usr/bin/ld.gold /usr/lib/gcc/armv7l-tizen-linux-gnueabi/${GCCVER}/ld.gold" - targettype armv7l preun " for bin in addr2line ar as c++filt gprov ld nm objcopy objdump ranlib readelf size strings strip ; do" + targettype armv7l preun " set -x" + targettype armv7l preun " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype armv7l preun " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" targettype armv7l preun " binary="/usr/bin/${bin}" " targettype armv7l preun " if test -e ${binary}.orig-arm ; then" targettype armv7l preun " rm ${binary} && mv ${binary}.orig-arm ${binary}" + targettype armv7l preun " rm /usr/lib/gcc/armv7l-tizen-linux-gnueabi/${GCCVER}/${bin}" targettype armv7l preun " else " targettype armv7l preun " echo "${binary}.orig-arm not present !" " targettype armv7l preun " fi " targettype armv7l preun " done " + targettype armv7l preun " rm -f /usr/lib/gcc/armv7l-tizen-linux-gnueabi/${GCCVER}/ld" + targettype armv7l preun " rm -f /usr/lib/gcc/armv7l-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype armv7l preun " rm -f /usr/lib/gcc/armv7l-tizen-linux-gnueabi/${GCCVER}/ld.gold" -cross-armv7hl-binutils-accel +cross-armv7hl-binutils-accel-@X86@ targettype x86 block! targettype 32bit block! targettype armv5tel block! + targettype armv6l block! targettype armv7l block! targettype armv7nhl block! + targettype mipsel block! targettype armv7hl autoreqprov off targettype armv7hl provides "cross-arm-binutils-accel" - targettype armv7hl requires "glibc-x86-arm" - targettype armv7hl requires "zlib-x86-arm" + targettype armv7hl provides "cross-armv7hl-binutils-accel-armv7hl" + targettype armv7hl requires "cross-arm-gcc-accel" + targettype armv7hl requires "eglibc-@X86@-arm" + targettype armv7hl requires "zlib-@X86@-arm" targettype armv7hl requires "binutils" targettype armv7hl prefix /emul/ia32-linux targettype armv7hl extension -arm @@ -99,38 +187,52 @@ cross-armv7hl-binutils-accel targettype armv7hl -/usr/share/doc targettype armv7hl requires "tizen-accelerator" - - - targettype armv7hl post " for bin in addr2line ar as c++filt gprov ld nm objcopy objdump ranlib readelf size strings strip ; do" + targettype armv7hl post "#set -x" + targettype armv7hl post " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype armv7hl post " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" targettype armv7hl post " binary="/usr/bin/${bin}" " - targettype armv7hl post " if test -e ${binary} -a ! -e ${binary}.orig-arm ; then" - targettype armv7hl post " mv ${binary} ${binary}.orig-arm && ln -s ${binary} ${binary}" - targettype armv7hl post " else " + targettype armv7hl post " if test -L ${binary} -a -e ${binary}.orig-arm ; then" targettype armv7hl post " echo "${binary} not installed or ${binary}.orig-arm already present !" " + targettype armv7hl post " else " + targettype armv7hl post " mv ${binary} ${binary}.orig-arm && ln -s ${binary} ${binary}" + targettype armv7hl post " ln -s ${binary} /usr/lib/gcc/armv7hl-tizen-linux-gnueabi/${GCCVER}/${bin}" targettype armv7hl post " fi " targettype armv7hl post " done " + targettype armv7hl post " ln -sf /usr/bin/ld /usr/lib/gcc/armv7hl-tizen-linux-gnueabi/${GCCVER}/ld" + targettype armv7hl post " ln -sf /usr/bin/ld.bfd /usr/lib/gcc/armv7hl-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype armv7hl post " ln -sf /usr/bin/ld.gold /usr/lib/gcc/armv7hl-tizen-linux-gnueabi/${GCCVER}/ld.gold" - targettype armv7hl preun " for bin in addr2line ar as c++filt gprov ld nm objcopy objdump ranlib readelf size strings strip ; do" + targettype armv7hl preun " set -x" + targettype armv7hl preun " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype armv7hl preun " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" targettype armv7hl preun " binary="/usr/bin/${bin}" " targettype armv7hl preun " if test -e ${binary}.orig-arm ; then" targettype armv7hl preun " rm ${binary} && mv ${binary}.orig-arm ${binary}" + targettype armv7hl preun " rm /usr/lib/gcc/armv7hl-tizen-linux-gnueabi/${GCCVER}/${bin}" targettype armv7hl preun " else " targettype armv7hl preun " echo "${binary}.orig-arm not present !" " targettype armv7hl preun " fi " targettype armv7hl preun " done " + targettype armv7hl preun " rm -f /usr/lib/gcc/armv7hl-tizen-linux-gnueabi/${GCCVER}/ld" + targettype armv7hl preun " rm -f /usr/lib/gcc/armv7hl-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype armv7hl preun " rm -f /usr/lib/gcc/armv7hl-tizen-linux-gnueabi/${GCCVER}/ld.gold" -cross-armv7nhl-binutils-accel +cross-armv7nhl-binutils-accel-@X86@ targettype x86 block! targettype 32bit block! targettype armv5tel block! + targettype armv6l block! targettype armv7l block! targettype armv7hl block! + targettype mipsel block! targettype armv7nhl autoreqprov off targettype armv7nhl provides "cross-arm-binutils-accel" - targettype armv7nhl requires "glibc-x86-arm" - targettype armv7nhl requires "zlib-x86-arm" + targettype armv7nhl provides "cross-armv7nhl-binutils-accel-armv7nhl" + targettype armv7nhl requires "cross-arm-gcc-accel" + targettype armv7nhl requires "eglibc-@X86@-arm" + targettype armv7nhl requires "zlib-@X86@-arm" targettype armv7nhl requires "binutils" targettype armv7nhl prefix /emul/ia32-linux targettype armv7nhl extension -arm @@ -139,23 +241,87 @@ cross-armv7nhl-binutils-accel targettype armv7nhl -/usr/share/doc targettype armv7nhl requires "tizen-accelerator" - - - targettype armv7nhl post " for bin in addr2line ar as c++filt gprov ld nm objcopy objdump ranlib readelf size strings strip ; do" + targettype armv7nhl post "#set -x" + targettype armv7nhl post " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype armv7nhl post " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" targettype armv7nhl post " binary="/usr/bin/${bin}" " - targettype armv7nhl post " if test -e ${binary} -a ! -e ${binary}.orig-arm ; then" - targettype armv7nhl post " mv ${binary} ${binary}.orig-arm && ln -s ${binary} ${binary}" - targettype armv7nhl post " else " + targettype armv7nhl post " if test -L ${binary} -a -e ${binary}.orig-arm ; then" targettype armv7nhl post " echo "${binary} not installed or ${binary}.orig-arm already present !" " + targettype armv7nhl post " else " + targettype armv7nhl post " mv ${binary} ${binary}.orig-arm && ln -s ${binary} ${binary}" + targettype armv7nhl post " ln -s ${binary} /usr/lib/gcc/armv7nhl-tizen-linux-gnueabi/${GCCVER}/${bin}" targettype armv7nhl post " fi " targettype armv7nhl post " done " + targettype armv7nhl post " ln -sf /usr/bin/ld /usr/lib/gcc/armv7nhl-tizen-linux-gnueabi/${GCCVER}/ld" + targettype armv7nhl post " ln -sf /usr/bin/ld.bfd /usr/lib/gcc/armv7nhl-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype armv7nhl post " ln -sf /usr/bin/ld.gold /usr/lib/gcc/armv7nhl-tizen-linux-gnueabi/${GCCVER}/ld.gold" - targettype armv7nhl preun " for bin in addr2line ar as c++filt gprov ld nm objcopy objdump ranlib readelf size strings strip ; do" + targettype armv7nhl preun " set -x" + targettype armv7nhl preun " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype armv7nhl preun " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" targettype armv7nhl preun " binary="/usr/bin/${bin}" " targettype armv7nhl preun " if test -e ${binary}.orig-arm ; then" targettype armv7nhl preun " rm ${binary} && mv ${binary}.orig-arm ${binary}" + targettype armv7nhl preun " rm /usr/lib/gcc/armv7nhl-tizen-linux-gnueabi/${GCCVER}/${bin}" targettype armv7nhl preun " else " targettype armv7nhl preun " echo "${binary}.orig-arm not present !" " targettype armv7nhl preun " fi " targettype armv7nhl preun " done " + targettype armv7nhl preun " rm -f /usr/lib/gcc/armv7nhl-tizen-linux-gnueabi/${GCCVER}/ld" + targettype armv7nhl preun " rm -f /usr/lib/gcc/armv7nhl-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype armv7nhl preun " rm -f /usr/lib/gcc/armv7nhl-tizen-linux-gnueabi/${GCCVER}/ld.gold" + + +cross-mipsel-binutils-accel-@X86@ + targettype x86 block! + targettype 32bit block! + targettype armv5tel block! + targettype armv6l block! + targettype armv7l block! + targettype armv7hl block! + targettype armv7nhl block! + + targettype mipsel autoreqprov off + targettype mipsel provides "cross-arm-binutils-accel" + targettype mipsel provides "cross-mipsel-binutils-accel-mipsel" + targettype mipsel requires "cross-arm-gcc-accel" + targettype mipsel requires "eglibc-@X86@-arm" + targettype mipsel requires "zlib-@X86@-arm" + targettype mipsel requires "binutils" + targettype mipsel prefix /emul/ia32-linux + targettype mipsel extension -arm + targettype mipsel +/ + targettype mipsel -/usr/share/man + targettype mipsel -/usr/share/doc + targettype mipsel requires "tizen-accelerator" + + targettype mipsel post "#set -x" + targettype mipsel post " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype mipsel post " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" + targettype mipsel post " binary="/usr/bin/${bin}" " + targettype mipsel post " if test -L ${binary} -a -e ${binary}.orig-arm ; then" + targettype mipsel post " echo "${binary} not installed or ${binary}.orig-arm already present !" " + targettype mipsel post " else " + targettype mipsel post " mv ${binary} ${binary}.orig-arm && ln -s ${binary} ${binary}" + targettype mipsel post " ln -s ${binary} /usr/lib/gcc/mipsel-tizen-linux-gnueabi/${GCCVER}/${bin}" + targettype mipsel post " fi " + targettype mipsel post " done " + targettype mipsel post " ln -sf /usr/bin/ld /usr/lib/gcc/mipsel-tizen-linux-gnueabi/${GCCVER}/ld" + targettype mipsel post " ln -sf /usr/bin/ld.bfd /usr/lib/gcc/mipsel-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype mipsel post " ln -sf /usr/bin/ld.gold /usr/lib/gcc/mipsel-tizen-linux-gnueabi/${GCCVER}/ld.gold" + + targettype mipsel preun " set -x" + targettype mipsel preun " export GCCVER=$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype mipsel preun " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" + targettype mipsel preun " binary="/usr/bin/${bin}" " + targettype mipsel preun " if test -e ${binary}.orig-arm ; then" + targettype mipsel preun " rm ${binary} && mv ${binary}.orig-arm ${binary}" + targettype mipsel preun " rm /usr/lib/gcc/mipsel-tizen-linux-gnueabi/${GCCVER}/${bin}" + targettype mipsel preun " else " + targettype mipsel preun " echo "${binary}.orig-arm not present !" " + targettype mipsel preun " fi " + targettype mipsel preun " done " + targettype mipsel preun " rm -f /usr/lib/gcc/mipsel-tizen-linux-gnueabi/${GCCVER}/ld" + targettype mipsel preun " rm -f /usr/lib/gcc/mipsel-tizen-linux-gnueabi/${GCCVER}/ld.bfd" + targettype mipsel preun " rm -f /usr/lib/gcc/mipsel-tizen-linux-gnueabi/${GCCVER}/ld.gold" diff --git a/packaging/binutils-2.20.51.0.10-copy-osabi.patch b/packaging/binutils-2.20.51.0.10-copy-osabi.patch new file mode 100644 index 0000000..86cb447 --- /dev/null +++ b/packaging/binutils-2.20.51.0.10-copy-osabi.patch @@ -0,0 +1,19 @@ +*** ../binutils-2.20.51.0.10.original/bfd/elf.c 2010-08-10 15:04:55.000000000 +0100 +--- bfd/elf.c 2010-08-10 15:05:42.000000000 +0100 +*************** _bfd_elf_copy_private_bfd_data (bfd *ibf +*** 1074,1079 **** +--- 1074,1087 ---- + + /* Copy object attributes. */ + _bfd_elf_copy_obj_attributes (ibfd, obfd); ++ ++ /* If the input BFD has the OSABI field set and the ++ output BFD does not, then copy the value. */ ++ if (elf_elfheader (ibfd)->e_ident [EI_OSABI] != ELFOSABI_NONE ++ && elf_elfheader (obfd)->e_ident [EI_OSABI] == ELFOSABI_NONE) ++ elf_elfheader (obfd)->e_ident [EI_OSABI] = ++ elf_elfheader (ibfd)->e_ident [EI_OSABI]; ++ + return TRUE; + } + diff --git a/packaging/binutils-2.20.51.0.10-sec-merge-emit.patch b/packaging/binutils-2.20.51.0.10-sec-merge-emit.patch new file mode 100644 index 0000000..388e143 --- /dev/null +++ b/packaging/binutils-2.20.51.0.10-sec-merge-emit.patch @@ -0,0 +1,24 @@ +*** ../binutils-2.20.51.0.10.orig/bfd/merge.c 2010-08-20 12:19:33.000000000 +0100 +--- bfd/merge.c 2010-08-20 12:18:01.000000000 +0100 +*************** sec_merge_emit (bfd *abfd, struct sec_me +*** 307,312 **** +--- 307,315 ---- + len = -off & (entry->alignment - 1); + if (len != 0) + { ++ /* We should never have an entry with an alignment ++ greater than the section's alignment. */ ++ BFD_ASSERT (len <= (bfd_size_type) (1 << alignment_power)); + if (bfd_bwrite (pad, len, abfd) != len) + goto err; + off += len; +*************** sec_merge_emit (bfd *abfd, struct sec_me +*** 324,329 **** +--- 327,333 ---- + /* Trailing alignment needed? */ + off = sec->size - off; + if (off != 0 ++ && alignment_power + && bfd_bwrite (pad, off, abfd) != off) + goto err; + diff --git a/packaging/128_build_id.patch b/packaging/binutils-2.20.51.0.2-build-id.patch similarity index 51% rename from packaging/128_build_id.patch rename to packaging/binutils-2.20.51.0.2-build-id.patch index cba02de..f602583 100644 --- a/packaging/128_build_id.patch +++ b/packaging/binutils-2.20.51.0.2-build-id.patch @@ -1,10 +1,6 @@ -Author: -Description: Description: Fix ld corrupt build ID generation -Author: Nick Clifton -Upstream status: Taken from Fedora (BZ 501582) ---- a/bfd/compress.c -+++ b/bfd/compress.c -@@ -174,7 +174,7 @@ +--- bfd/compress.c.jj 2010-12-24 11:40:19.000000000 +0100 ++++ bfd/compress.c 2011-01-28 15:40:19.869777126 +0100 +@@ -174,7 +174,7 @@ bfd_get_full_section_contents (bfd *abfd case COMPRESS_SECTION_NONE: if (p == NULL) { @@ -12,10 +8,19 @@ Upstream status: Taken from Fedora (BZ 501582) + p = (bfd_byte *) bfd_zmalloc (sz); if (p == NULL) return FALSE; - need_free = TRUE; ---- a/bfd/elfcode.h -+++ b/bfd/elfcode.h -@@ -1158,6 +1158,24 @@ + } +@@ -214,7 +214,7 @@ bfd_get_full_section_contents (bfd *abfd + if (!ret) + goto fail_compressed; + +- uncompressed_buffer = (bfd_byte *) bfd_malloc (uncompressed_size); ++ uncompressed_buffer = (bfd_byte *) bfd_zmalloc (uncompressed_size); + if (uncompressed_buffer == NULL) + goto fail_compressed; + +--- bfd/elfcode.h.jj 2010-12-31 03:43:21.000000000 +0100 ++++ bfd/elfcode.h 2011-01-28 15:34:39.055388479 +0100 +@@ -1158,6 +1158,24 @@ elf_checksum_contents (bfd *abfd, if (i_shdr.contents) (*process) (i_shdr.contents, i_shdr.sh_size, arg); diff --git a/packaging/binutils-2.20.51.0.2-libtool-lib64.patch b/packaging/binutils-2.20.51.0.2-libtool-lib64.patch new file mode 100644 index 0000000..0c61a11 --- /dev/null +++ b/packaging/binutils-2.20.51.0.2-libtool-lib64.patch @@ -0,0 +1,302 @@ +diff -rcp ../binutils-2.20.51.0.7.original/bfd/configure ./bfd/configure +*** ../binutils-2.20.51.0.7.original/bfd/configure 2010-04-08 14:53:48.000000000 +0100 +--- ./bfd/configure 2010-04-08 14:56:50.000000000 +0100 +*************** fi +*** 10762,10771 **** + # before this can be enabled. + hardcode_into_libs=yes + + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +--- 10762,10795 ---- + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +diff -rcp ../binutils-2.20.51.0.7.original/binutils/configure ./binutils/configure +*** ../binutils-2.20.51.0.7.original/binutils/configure 2010-04-08 14:53:45.000000000 +0100 +--- ./binutils/configure 2010-04-08 14:56:21.000000000 +0100 +*************** fi +*** 10560,10569 **** + # before this can be enabled. + hardcode_into_libs=yes + + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +--- 10560,10593 ---- + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +diff -rcp ../binutils-2.20.51.0.7.original/gas/configure ./gas/configure +*** ../binutils-2.20.51.0.7.original/gas/configure 2010-04-08 14:53:47.000000000 +0100 +--- ./gas/configure 2010-04-08 14:57:24.000000000 +0100 +*************** fi +*** 10547,10556 **** + # before this can be enabled. + hardcode_into_libs=yes + + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +--- 10547,10580 ---- + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +diff -rcp ../binutils-2.20.51.0.7.original/gprof/configure ./gprof/configure +*** ../binutils-2.20.51.0.7.original/gprof/configure 2010-04-08 14:53:45.000000000 +0100 +--- ./gprof/configure 2010-04-08 14:57:50.000000000 +0100 +*************** fi +*** 10485,10494 **** + # before this can be enabled. + hardcode_into_libs=yes + + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +--- 10485,10518 ---- + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +diff -rcp ../binutils-2.20.51.0.7.original/ld/configure ./ld/configure +*** ../binutils-2.20.51.0.7.original/ld/configure 2010-04-08 14:53:44.000000000 +0100 +--- ./ld/configure 2010-04-08 14:58:21.000000000 +0100 +*************** fi +*** 10966,10975 **** + # before this can be enabled. + hardcode_into_libs=yes + + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +--- 10966,10999 ---- + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +Only in .: .#libtool.m4 +Only in .: #libtool.m4# +diff -rcp ../binutils-2.20.51.0.7.original/opcodes/configure ./opcodes/configure +*** ../binutils-2.20.51.0.7.original/opcodes/configure 2010-04-08 14:53:45.000000000 +0100 +--- ./opcodes/configure 2010-04-08 14:59:10.000000000 +0100 +*************** fi +*** 10496,10505 **** + # before this can be enabled. + hardcode_into_libs=yes + + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +--- 10496,10529 ---- + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +! sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on diff --git a/packaging/binutils-2.20.51.0.2-set-long-long.patch b/packaging/binutils-2.20.51.0.2-set-long-long.patch new file mode 100644 index 0000000..8d8a2c5 --- /dev/null +++ b/packaging/binutils-2.20.51.0.2-set-long-long.patch @@ -0,0 +1,38 @@ +diff -rup ../binutils-2.20.51.0.2.orig/bfd/configure bfd/configure +--- ../binutils-2.20.51.0.2.orig/bfd/configure 2009-10-12 11:45:05.000000000 +0100 ++++ bfd/configure 2009-10-12 11:45:13.000000000 +0100 +@@ -12694,11 +12694,13 @@ if test "x${ac_cv_sizeof_long}" = "x8"; + BFD_HOST_64BIT_LONG=1 + test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long" + test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long" +-elif test "x${ac_cv_sizeof_long_long}" = "x8"; then ++fi ++if test "x${ac_cv_sizeof_long_long}" = "x8"; then + BFD_HOST_64BIT_LONG_LONG=1 + test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long long" + test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long long" +- if test "x${ac_cv_sizeof_void_p}" = "x8"; then ++ if test "x${ac_cv_sizeof_void_p}" = "x8" \ ++ -a "x${ac_cv_sizeof_long}" != "x8"; then + BFD_HOSTPTR_T="unsigned long long" + fi + fi +diff -rup ../binutils-2.20.51.0.2.orig/bfd/configure.in bfd/configure.in +--- ../binutils-2.20.51.0.2.orig/bfd/configure.in 2009-10-12 11:45:05.000000000 +0100 ++++ bfd/configure.in 2009-10-12 11:45:13.000000000 +0100 +@@ -172,11 +172,13 @@ if test "x${ac_cv_sizeof_long}" = "x8"; + BFD_HOST_64BIT_LONG=1 + test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long" + test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long" +-elif test "x${ac_cv_sizeof_long_long}" = "x8"; then ++fi ++if test "x${ac_cv_sizeof_long_long}" = "x8"; then + BFD_HOST_64BIT_LONG_LONG=1 + test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long long" + test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long long" +- if test "x${ac_cv_sizeof_void_p}" = "x8"; then ++ if test "x${ac_cv_sizeof_void_p}" = "x8" \ ++ -a "x${ac_cv_sizeof_long}" != "x8"; then + BFD_HOSTPTR_T="unsigned long long" + fi + fi diff --git a/packaging/binutils-2.20.51.0.2-version.patch b/packaging/binutils-2.20.51.0.2-version.patch new file mode 100644 index 0000000..ad61e37 --- /dev/null +++ b/packaging/binutils-2.20.51.0.2-version.patch @@ -0,0 +1,36 @@ +--- ../binutils-2.20.51.0.2.orig/bfd/Makefile.am 2009-10-12 11:28:45.000000000 +0100 ++++ bfd/Makefile.am 2009-10-12 11:42:24.000000000 +0100 +@@ -951,12 +951,12 @@ bfdver.h: $(srcdir)/version.h $(srcdir)/ + report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\ + if test "x$(RELEASE)" = x ; then \ + bfd_version_date=`sed -n -e 's/.*DATE //p' < $(srcdir)/version.h` ;\ +- bfd_version_string="\"$(VERSION).$${bfd_version_date}\"" ;\ +- bfd_soversion="$(VERSION).$${bfd_version_date}" ;\ ++ bfd_version_string="\"$(VERSION)-%{release} $${bfd_version_date}\"" ;\ ++ bfd_soversion="$(VERSION)-%{release}" ;\ + fi ;\ + sed -e "s,@bfd_version@,$$bfd_version," \ + -e "s,@bfd_version_string@,$$bfd_version_string," \ +- -e "s,@bfd_version_package@,$$bfd_version_package," \ ++ -e "s,@bfd_version_package@,\"version \"," \ + -e "s,@report_bugs_to@,$$report_bugs_to," \ + < $(srcdir)/version.h > $@; \ + echo "$${bfd_soversion}" > libtool-soversion +--- ../binutils-2.20.51.0.2.orig/bfd/Makefile.in 2009-10-12 11:28:45.000000000 +0100 ++++ bfd/Makefile.in 2009-10-12 11:42:24.000000000 +0100 +@@ -1978,12 +1978,12 @@ bfdver.h: $(srcdir)/version.h $(srcdir)/ + report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\ + if test "x$(RELEASE)" = x ; then \ + bfd_version_date=`sed -n -e 's/.*DATE //p' < $(srcdir)/version.h` ;\ +- bfd_version_string="\"$(VERSION).$${bfd_version_date}\"" ;\ +- bfd_soversion="$(VERSION).$${bfd_version_date}" ;\ ++ bfd_version_string="\"$(VERSION)-%{release} $${bfd_version_date}\"" ;\ ++ bfd_soversion="$(VERSION)-%{release}" ;\ + fi ;\ + sed -e "s,@bfd_version@,$$bfd_version," \ + -e "s,@bfd_version_string@,$$bfd_version_string," \ +- -e "s,@bfd_version_package@,$$bfd_version_package," \ ++ -e "s,@bfd_version_package@,\"version \"," \ + -e "s,@report_bugs_to@,$$report_bugs_to," \ + < $(srcdir)/version.h > $@; \ + echo "$${bfd_soversion}" > libtool-soversion diff --git a/packaging/156_pr10144.patch b/packaging/binutils-2.22-156-pr10144.patch similarity index 100% rename from packaging/156_pr10144.patch rename to packaging/binutils-2.22-156-pr10144.patch diff --git a/packaging/binutils-2.22-branch-updates.patch b/packaging/binutils-2.22-branch-updates.patch new file mode 100644 index 0000000..5767470 --- /dev/null +++ b/packaging/binutils-2.22-branch-updates.patch @@ -0,0 +1,978 @@ +# DP: updates from the binutils-2.22 branch + +diff --git a/bfd/ChangeLog b/bfd/ChangeLog +index 0059346..a7199ae 100644 +--- a/bfd/ChangeLog ++++ b/bfd/ChangeLog +@@ -1,3 +1,49 @@ ++2011-12-10 David Daney ++ ++ Backport from mainline: ++ ++ 2011-12-10 David Daney ++ ++ * elfxx-mips.c (mips_elf_link_hash_table.rld_value): Remove. ++ (mips_elf_link_hash_table.rld_symbol): New field; ++ (MIPS_ELF_RLD_MAP_SIZE): New macro. ++ (_bfd_mips_elf_add_symbol_hook): Remember __rld_obj_head symbol ++ in rld_symbol. ++ (_bfd_mips_elf_create_dynamic_sections): Remember __rld_map symbol ++ in rld_symbol. ++ (_bfd_mips_elf_size_dynamic_sections): Set correct size for .rld_map. ++ (_bfd_mips_elf_finish_dynamic_symbol): Remove .rld_map handling. ++ (_bfd_mips_elf_finish_dynamic_sections): Use rld_symbol to ++ calculate DT_MIPS_RLD_MAP value. ++ (_bfd_mips_elf_link_hash_table_create): Initialize rld_symbol, ++ quit initializing rld_value. ++ ++2011-12-03 Alan Modra ++ ++ PR ld/13468 ++ * elflink.c (bfd_elf_final_link): Don't segfault when checking ++ for DT_TEXTREL and .dynamic does not exist. ++ ++2011-12-03 Alan Modra ++ ++ PR ld/13470 ++ * elf32-ppc.c (ppc_elf_copy_indirect_symbol): Revert substantive ++ change in 2011-07-01 commit. Comment. ++ * elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Likewise. ++ ++2011-12-01 Mikael Pettersson ++ ++ Apply mainline patches ++ * elf32-m68k.c (elf_m68k_check_relocs) : For ++ non-SEC_ALLOC sections break before GOT and PLT accounting. ++ ++2011-12-01 Hans-Peter Nilsson ++ ++ Apply mainline patches ++ * elf32-cris.c (cris_elf_check_relocs) : Move early break for ++ non-SEC_ALLOC sections before GOT and PLT accounting. ++ + 2011-11-21 Tristan Gingold + + * configure.in: Bump version to 2.22.0 +diff --git a/bfd/elf32-cris.c b/bfd/elf32-cris.c +index 243a8ec..310f6d1 100644 +--- a/bfd/elf32-cris.c ++++ b/bfd/elf32-cris.c +@@ -3579,6 +3579,12 @@ cris_elf_check_relocs (bfd *abfd, + sec, + cris_elf_howto_table[r_type].name); + } ++ ++ /* We don't need to handle relocs into sections not going into ++ the "real" output. */ ++ if ((sec->flags & SEC_ALLOC) == 0) ++ break; ++ + if (h != NULL) + { + h->non_got_ref = 1; +@@ -3608,11 +3614,6 @@ cris_elf_check_relocs (bfd *abfd, + if (! info->shared) + break; + +- /* We don't need to handle relocs into sections not going into +- the "real" output. */ +- if ((sec->flags & SEC_ALLOC) == 0) +- break; +- + /* We may need to create a reloc section in the dynobj and made room + for this reloc. */ + if (sreloc == NULL) +diff --git a/bfd/elf32-m68k.c b/bfd/elf32-m68k.c +index 612525c..3e9ada9 100644 +--- a/bfd/elf32-m68k.c ++++ b/bfd/elf32-m68k.c +@@ -2816,6 +2816,11 @@ elf_m68k_check_relocs (abfd, info, sec, relocs) + case R_68K_8: + case R_68K_16: + case R_68K_32: ++ /* We don't need to handle relocs into sections not going into ++ the "real" output. */ ++ if ((sec->flags & SEC_ALLOC) == 0) ++ break; ++ + if (h != NULL) + { + /* Make sure a plt entry is created for this symbol if it +@@ -2829,8 +2834,7 @@ elf_m68k_check_relocs (abfd, info, sec, relocs) + + /* If we are creating a shared library, we need to copy the + reloc into the shared library. */ +- if (info->shared +- && (sec->flags & SEC_ALLOC) != 0) ++ if (info->shared) + { + /* When creating a shared object, we must copy these + reloc types into the output file. We create a reloc +diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c +index 0c25c3e..574cd98 100644 +--- a/bfd/elf32-ppc.c ++++ b/bfd/elf32-ppc.c +@@ -2987,10 +2987,6 @@ ppc_elf_copy_indirect_symbol (struct bfd_link_info *info, + edir->elf.needs_plt |= eind->elf.needs_plt; + edir->elf.pointer_equality_needed |= eind->elf.pointer_equality_needed; + +- /* If we were called to copy over info for a weak sym, that's all. */ +- if (eind->elf.root.type != bfd_link_hash_indirect) +- return; +- + if (eind->dyn_relocs != NULL) + { + if (edir->dyn_relocs != NULL) +@@ -3022,6 +3018,16 @@ ppc_elf_copy_indirect_symbol (struct bfd_link_info *info, + eind->dyn_relocs = NULL; + } + ++ /* If we were called to copy over info for a weak sym, that's all. ++ You might think dyn_relocs need not be copied over; After all, ++ both syms will be dynamic or both non-dynamic so we're just ++ moving reloc accounting around. However, ELIMINATE_COPY_RELOCS ++ code in ppc_elf_adjust_dynamic_symbol needs to check for ++ dyn_relocs in read-only sections, and it does so on what is the ++ DIR sym here. */ ++ if (eind->elf.root.type != bfd_link_hash_indirect) ++ return; ++ + /* Copy over the GOT refcount entries that we may have already seen to + the symbol which just became indirect. */ + edir->elf.got.refcount += eind->elf.got.refcount; +diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c +index 93d1314..32a3430 100644 +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -4435,10 +4435,6 @@ ppc64_elf_copy_indirect_symbol (struct bfd_link_info *info, + edir->elf.ref_regular_nonweak |= eind->elf.ref_regular_nonweak; + edir->elf.needs_plt |= eind->elf.needs_plt; + +- /* If we were called to copy over info for a weak sym, that's all. */ +- if (eind->elf.root.type != bfd_link_hash_indirect) +- return; +- + /* Copy over any dynamic relocs we may have on the indirect sym. */ + if (eind->dyn_relocs != NULL) + { +@@ -4471,6 +4467,16 @@ ppc64_elf_copy_indirect_symbol (struct bfd_link_info *info, + eind->dyn_relocs = NULL; + } + ++ /* If we were called to copy over info for a weak sym, that's all. ++ You might think dyn_relocs need not be copied over; After all, ++ both syms will be dynamic or both non-dynamic so we're just ++ moving reloc accounting around. However, ELIMINATE_COPY_RELOCS ++ code in ppc64_elf_adjust_dynamic_symbol needs to check for ++ dyn_relocs in read-only sections, and it does so on what is the ++ DIR sym here. */ ++ if (eind->elf.root.type != bfd_link_hash_indirect) ++ return; ++ + /* Copy over got entries that we may have already seen to the + symbol which just became indirect. */ + if (eind->elf.got.glist != NULL) +diff --git a/bfd/elflink.c b/bfd/elflink.c +index fc4266b..8556cec 100644 +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -11188,15 +11188,12 @@ bfd_elf_final_link (bfd *abfd, struct bfd_link_info *info) + goto error_return; + + /* Check for DT_TEXTREL (late, in case the backend removes it). */ +- if ((info->warn_shared_textrel && info->shared) +- || info->error_textrel) ++ if (((info->warn_shared_textrel && info->shared) ++ || info->error_textrel) ++ && (o = bfd_get_section_by_name (dynobj, ".dynamic")) != NULL) + { + bfd_byte *dyncon, *dynconend; + +- /* Fix up .dynamic entries. */ +- o = bfd_get_section_by_name (dynobj, ".dynamic"); +- BFD_ASSERT (o != NULL); +- + dyncon = o->contents; + dynconend = o->contents + o->size; + for (; dyncon < dynconend; dyncon += bed->s->sizeof_dyn) +diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c +index 33a454d..6b908ad 100644 +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -436,8 +436,8 @@ struct mips_elf_link_hash_table + entry is set to the address of __rld_obj_head as in IRIX5. */ + bfd_boolean use_rld_obj_head; + +- /* This is the value of the __rld_map or __rld_obj_head symbol. */ +- bfd_vma rld_value; ++ /* The __rld_map or __rld_obj_head symbol. */ ++ struct elf_link_hash_entry *rld_symbol; + + /* This is set if we see any mips16 stub sections. */ + bfd_boolean mips16_stubs_seen; +@@ -768,6 +768,10 @@ static bfd *reldyn_sorting_bfd; + #define MIPS_ELF_GOT_SIZE(abfd) \ + (get_elf_backend_data (abfd)->s->arch_size / 8) + ++/* The size of the .rld_map section. */ ++#define MIPS_ELF_RLD_MAP_SIZE(abfd) \ ++ (get_elf_backend_data (abfd)->s->arch_size / 8) ++ + /* The size of a symbol-table entry. */ + #define MIPS_ELF_SYM_SIZE(abfd) \ + (get_elf_backend_data (abfd)->s->sizeof_sym) +@@ -7081,6 +7085,7 @@ _bfd_mips_elf_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, + return FALSE; + + mips_elf_hash_table (info)->use_rld_obj_head = TRUE; ++ mips_elf_hash_table (info)->rld_symbol = h; + } + + /* If this is a mips16 text symbol, add 1 to the value to make it +@@ -7266,6 +7271,7 @@ _bfd_mips_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) + + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + return FALSE; ++ mips_elf_hash_table (info)->rld_symbol = h; + } + } + +@@ -9027,7 +9033,7 @@ _bfd_mips_elf_size_dynamic_sections (bfd *output_bfd, + { + /* We add a room for __rld_map. It will be filled in by the + rtld to contain a pointer to the _r_debug structure. */ +- s->size += 4; ++ s->size += MIPS_ELF_RLD_MAP_SIZE (output_bfd); + } + else if (SGI_COMPAT (output_bfd) + && CONST_STRNEQ (name, ".compact_rel")) +@@ -10030,31 +10036,6 @@ _bfd_mips_elf_finish_dynamic_symbol (bfd *output_bfd, + if (IRIX_COMPAT (output_bfd) == ict_irix6) + mips_elf_irix6_finish_dynamic_symbol (output_bfd, name, sym); + +- if (! info->shared) +- { +- if (! mips_elf_hash_table (info)->use_rld_obj_head +- && (strcmp (name, "__rld_map") == 0 +- || strcmp (name, "__RLD_MAP") == 0)) +- { +- asection *s = bfd_get_section_by_name (dynobj, ".rld_map"); +- BFD_ASSERT (s != NULL); +- sym->st_value = s->output_section->vma + s->output_offset; +- bfd_put_32 (output_bfd, 0, s->contents); +- if (mips_elf_hash_table (info)->rld_value == 0) +- mips_elf_hash_table (info)->rld_value = sym->st_value; +- } +- else if (mips_elf_hash_table (info)->use_rld_obj_head +- && strcmp (name, "__rld_obj_head") == 0) +- { +- /* IRIX6 does not use a .rld_map section. */ +- if (IRIX_COMPAT (output_bfd) == ict_irix5 +- || IRIX_COMPAT (output_bfd) == ict_none) +- BFD_ASSERT (bfd_get_section_by_name (dynobj, ".rld_map") +- != NULL); +- mips_elf_hash_table (info)->rld_value = sym->st_value; +- } +- } +- + /* Keep dynamic MIPS16 symbols odd. This allows the dynamic linker to + treat MIPS16 symbols like any other. */ + if (ELF_ST_IS_MIPS16 (sym->st_other)) +@@ -10517,7 +10498,19 @@ _bfd_mips_elf_finish_dynamic_sections (bfd *output_bfd, + break; + + case DT_MIPS_RLD_MAP: +- dyn.d_un.d_ptr = mips_elf_hash_table (info)->rld_value; ++ { ++ struct elf_link_hash_entry *h; ++ h = mips_elf_hash_table (info)->rld_symbol; ++ if (!h) ++ { ++ dyn_to_skip = MIPS_ELF_DYN_SIZE (dynobj); ++ swap_out_p = FALSE; ++ break; ++ } ++ s = h->root.u.def.section; ++ dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset ++ + h->root.u.def.value); ++ } + break; + + case DT_MIPS_OPTIONS: +@@ -12794,7 +12787,7 @@ _bfd_mips_elf_link_hash_table_create (bfd *abfd) + ret->procedure_count = 0; + ret->compact_rel_size = 0; + ret->use_rld_obj_head = FALSE; +- ret->rld_value = 0; ++ ret->rld_symbol = NULL; + ret->mips16_stubs_seen = FALSE; + ret->use_plts_and_copy_relocs = FALSE; + ret->is_vxworks = FALSE; +diff --git a/bfd/version.h b/bfd/version.h +index c6800ec..cb20c1b 100644 +--- a/bfd/version.h ++++ b/bfd/version.h +@@ -1,4 +1,4 @@ +-#define BFD_VERSION_DATE 20111121 ++#define BFD_VERSION_DATE 20111211 + #define BFD_VERSION @bfd_version@ + #define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@ + #define REPORT_BUGS_TO @report_bugs_to@ +diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog +index 233d962..1b84638 100644 +--- a/ld/testsuite/ChangeLog ++++ b/ld/testsuite/ChangeLog +@@ -1,3 +1,8 @@ ++2011-12-01 Hans-Peter Nilsson ++ ++ * ld-cris/pic-gc-72.d: Revert last change to adjust for reverted ++ cause for last change. ++ + 2011-11-10 Matthew Gretton-Dann + + Apply mainline patches. +diff --git a/ld/testsuite/ld-cris/pic-gc-72.d b/ld/testsuite/ld-cris/pic-gc-72.d +index 7e72752..7c30980 100644 +--- a/ld/testsuite/ld-cris/pic-gc-72.d ++++ b/ld/testsuite/ld-cris/pic-gc-72.d +@@ -19,11 +19,10 @@ Contents of section .dynsym: + Contents of section .dynstr: + #... + Contents of section .text: +- 016e 0f050f05 .* ++ 0188 0f050f05 .* + Contents of section .dynamic: +- 2174 .* + #... + Contents of section .got: +- 21cc 74210000 00000000 00000000 .* ++ 21e4 8c210000 00000000 00000000 .* + Contents of section .data: +- 21d8 00000000 .* ++ 21f0 00000000 .* +diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog +index a445030..26f759e 100644 +--- a/opcodes/ChangeLog ++++ b/opcodes/ChangeLog +@@ -1,3 +1,8 @@ ++2011-11-25 Pierre Muller ++ ++ * mips-dis.c (print_insn_micromips): Rename local variable iprintf ++ to infprintf to avoid shadow warning. ++ + 2011-10-27 Peter Bergner + + * ppc-opc.c (powerpc_opcodes) fprintf_func; ++ const fprintf_ftype infprintf = info->fprintf_func; + const struct mips_opcode *op, *opend; + unsigned int lsb, msbd, msb; + void *is = info->stream; +@@ -2307,7 +2307,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + status = (*info->read_memory_func) (memaddr + 2, buffer, 2, info); + if (status != 0) + { +- iprintf (is, "micromips 0x%x", higher); ++ infprintf (is, "micromips 0x%x", higher); + (*info->memory_error_func) (status, memaddr + 2, info); + return -1; + } +@@ -2320,7 +2320,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + status = (*info->read_memory_func) (memaddr + 4, buffer, 2, info); + if (status != 0) + { +- iprintf (is, "micromips 0x%x", higher); ++ infprintf (is, "micromips 0x%x", higher); + (*info->memory_error_func) (status, memaddr + 4, info); + return -1; + } +@@ -2328,7 +2328,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + insn = bfd_getb16 (buffer); + else + insn = bfd_getl16 (buffer); +- iprintf (is, "0x%x%04x (48-bit insn)", higher, insn); ++ infprintf (is, "0x%x%04x (48-bit insn)", higher, insn); + + info->insn_type = dis_noninsn; + return 6; +@@ -2341,7 +2341,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + status = (*info->read_memory_func) (memaddr + 2, buffer, 2, info); + if (status != 0) + { +- iprintf (is, "micromips 0x%x", higher); ++ infprintf (is, "micromips 0x%x", higher); + (*info->memory_error_func) (status, memaddr + 2, info); + return -1; + } +@@ -2371,9 +2371,9 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + { + const char *s; + +- iprintf (is, "%s", op->name); ++ infprintf (is, "%s", op->name); + if (op->args[0] != '\0') +- iprintf (is, "\t"); ++ infprintf (is, "\t"); + + for (s = op->args; *s != '\0'; s++) + { +@@ -2382,37 +2382,37 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + case ',': + case '(': + case ')': +- iprintf (is, "%c", *s); ++ infprintf (is, "%c", *s); + break; + + case '.': + delta = GET_OP (insn, OFFSET10); + if (delta & 0x200) + delta |= ~0x3ff; +- iprintf (is, "%d", delta); ++ infprintf (is, "%d", delta); + break; + + case '1': +- iprintf (is, "0x%lx", GET_OP (insn, STYPE)); ++ infprintf (is, "0x%lx", GET_OP (insn, STYPE)); + break; + + case '<': +- iprintf (is, "0x%lx", GET_OP (insn, SHAMT)); ++ infprintf (is, "0x%lx", GET_OP (insn, SHAMT)); + break; + + case '\\': +- iprintf (is, "0x%lx", GET_OP (insn, 3BITPOS)); ++ infprintf (is, "0x%lx", GET_OP (insn, 3BITPOS)); + break; + + case '|': +- iprintf (is, "0x%lx", GET_OP (insn, TRAP)); ++ infprintf (is, "0x%lx", GET_OP (insn, TRAP)); + break; + + case '~': + delta = GET_OP (insn, OFFSET12); + if (delta & 0x800) + delta |= ~0x7ff; +- iprintf (is, "%d", delta); ++ infprintf (is, "%d", delta); + break; + + case 'a': +@@ -2433,34 +2433,34 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + case 'r': + case 's': + case 'v': +- iprintf (is, "%s", mips_gpr_names[GET_OP (insn, RS)]); ++ infprintf (is, "%s", mips_gpr_names[GET_OP (insn, RS)]); + break; + + case 'c': +- iprintf (is, "0x%lx", GET_OP (insn, CODE)); ++ infprintf (is, "0x%lx", GET_OP (insn, CODE)); + break; + + case 'd': +- iprintf (is, "%s", mips_gpr_names[GET_OP (insn, RD)]); ++ infprintf (is, "%s", mips_gpr_names[GET_OP (insn, RD)]); + break; + + case 'h': +- iprintf (is, "0x%lx", GET_OP (insn, PREFX)); ++ infprintf (is, "0x%lx", GET_OP (insn, PREFX)); + break; + + case 'i': + case 'u': +- iprintf (is, "0x%lx", GET_OP (insn, IMMEDIATE)); ++ infprintf (is, "0x%lx", GET_OP (insn, IMMEDIATE)); + break; + + case 'j': /* Same as i, but sign-extended. */ + case 'o': + delta = (GET_OP (insn, DELTA) ^ 0x8000) - 0x8000; +- iprintf (is, "%d", delta); ++ infprintf (is, "%d", delta); + break; + + case 'k': +- iprintf (is, "0x%x", GET_OP (insn, CACHE)); ++ infprintf (is, "0x%x", GET_OP (insn, CACHE)); + break; + + case 'n': +@@ -2472,26 +2472,26 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + if (s_reg_encode != 0) + { + if (s_reg_encode == 1) +- iprintf (is, "%s", mips_gpr_names[16]); ++ infprintf (is, "%s", mips_gpr_names[16]); + else if (s_reg_encode < 9) +- iprintf (is, "%s-%s", ++ infprintf (is, "%s-%s", + mips_gpr_names[16], + mips_gpr_names[15 + s_reg_encode]); + else if (s_reg_encode == 9) +- iprintf (is, "%s-%s,%s", ++ infprintf (is, "%s-%s,%s", + mips_gpr_names[16], + mips_gpr_names[23], + mips_gpr_names[30]); + else +- iprintf (is, "UNKNOWN"); ++ infprintf (is, "UNKNOWN"); + } + + if (immed & 0x10) /* For ra. */ + { + if (s_reg_encode == 0) +- iprintf (is, "%s", mips_gpr_names[31]); ++ infprintf (is, "%s", mips_gpr_names[31]); + else +- iprintf (is, ",%s", mips_gpr_names[31]); ++ infprintf (is, ",%s", mips_gpr_names[31]); + } + break; + } +@@ -2504,32 +2504,32 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + break; + + case 'q': +- iprintf (is, "0x%lx", GET_OP (insn, CODE2)); ++ infprintf (is, "0x%lx", GET_OP (insn, CODE2)); + break; + + case 't': + case 'w': +- iprintf (is, "%s", mips_gpr_names[GET_OP (insn, RT)]); ++ infprintf (is, "%s", mips_gpr_names[GET_OP (insn, RT)]); + break; + + case 'y': +- iprintf (is, "%s", mips_gpr_names[GET_OP (insn, RS3)]); ++ infprintf (is, "%s", mips_gpr_names[GET_OP (insn, RS3)]); + break; + + case 'z': +- iprintf (is, "%s", mips_gpr_names[0]); ++ infprintf (is, "%s", mips_gpr_names[0]); + break; + + case 'B': +- iprintf (is, "0x%lx", GET_OP (insn, CODE10)); ++ infprintf (is, "0x%lx", GET_OP (insn, CODE10)); + break; + + case 'C': +- iprintf (is, "0x%lx", GET_OP (insn, COPZ)); ++ infprintf (is, "0x%lx", GET_OP (insn, COPZ)); + break; + + case 'D': +- iprintf (is, "%s", mips_fpr_names[GET_OP (insn, FD)]); ++ infprintf (is, "%s", mips_fpr_names[GET_OP (insn, FD)]); + break; + + case 'E': +@@ -2540,7 +2540,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + 'T' format. Therefore, until we gain understanding of + cp2 register names, we can simply print the register + numbers. */ +- iprintf (is, "$%ld", GET_OP (insn, RT)); ++ infprintf (is, "$%ld", GET_OP (insn, RT)); + break; + + case 'G': +@@ -2559,44 +2559,44 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + case 0x000002fc: /* mtc0 */ + case 0x580000fc: /* dmfc0 */ + case 0x580002fc: /* dmtc0 */ +- iprintf (is, "%s", mips_cp0_names[GET_OP (insn, RS)]); ++ infprintf (is, "%s", mips_cp0_names[GET_OP (insn, RS)]); + break; + default: +- iprintf (is, "$%ld", GET_OP (insn, RS)); ++ infprintf (is, "$%ld", GET_OP (insn, RS)); + break; + } + break; + + case 'H': +- iprintf (is, "%ld", GET_OP (insn, SEL)); ++ infprintf (is, "%ld", GET_OP (insn, SEL)); + break; + + case 'K': +- iprintf (is, "%s", mips_hwr_names[GET_OP (insn, RS)]); ++ infprintf (is, "%s", mips_hwr_names[GET_OP (insn, RS)]); + break; + + case 'M': +- iprintf (is, "$fcc%ld", GET_OP (insn, CCC)); ++ infprintf (is, "$fcc%ld", GET_OP (insn, CCC)); + break; + + case 'N': +- iprintf (is, ++ infprintf (is, + (op->pinfo & (FP_D | FP_S)) != 0 + ? "$fcc%ld" : "$cc%ld", + GET_OP (insn, BCC)); + break; + + case 'R': +- iprintf (is, "%s", mips_fpr_names[GET_OP (insn, FR)]); ++ infprintf (is, "%s", mips_fpr_names[GET_OP (insn, FR)]); + break; + + case 'S': + case 'V': +- iprintf (is, "%s", mips_fpr_names[GET_OP (insn, FS)]); ++ infprintf (is, "%s", mips_fpr_names[GET_OP (insn, FS)]); + break; + + case 'T': +- iprintf (is, "%s", mips_fpr_names[GET_OP (insn, FT)]); ++ infprintf (is, "%s", mips_fpr_names[GET_OP (insn, FT)]); + break; + + case '+': +@@ -2606,18 +2606,18 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + { + case 'A': + lsb = GET_OP (insn, EXTLSB); +- iprintf (is, "0x%x", lsb); ++ infprintf (is, "0x%x", lsb); + break; + + case 'B': + msb = GET_OP (insn, INSMSB); +- iprintf (is, "0x%x", msb - lsb + 1); ++ infprintf (is, "0x%x", msb - lsb + 1); + break; + + case 'C': + case 'H': + msbd = GET_OP (insn, EXTMSBD); +- iprintf (is, "0x%x", msbd + 1); ++ infprintf (is, "0x%x", msbd + 1); + break; + + case 'D': +@@ -2637,30 +2637,30 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + mips_cp0sel_names_len, + cp0reg, sel); + if (n != NULL) +- iprintf (is, "%s", n->name); ++ infprintf (is, "%s", n->name); + else +- iprintf (is, "$%d,%d", cp0reg, sel); ++ infprintf (is, "$%d,%d", cp0reg, sel); + break; + } + + case 'E': + lsb = GET_OP (insn, EXTLSB) + 32; +- iprintf (is, "0x%x", lsb); ++ infprintf (is, "0x%x", lsb); + break; + + case 'F': + msb = GET_OP (insn, INSMSB) + 32; +- iprintf (is, "0x%x", msb - lsb + 1); ++ infprintf (is, "0x%x", msb - lsb + 1); + break; + + case 'G': + msbd = GET_OP (insn, EXTMSBD) + 32; +- iprintf (is, "0x%x", msbd + 1); ++ infprintf (is, "0x%x", msbd + 1); + break; + + default: + /* xgettext:c-format */ +- iprintf (is, ++ infprintf (is, + _("# internal disassembler error, " + "unrecognized modifier (+%c)"), + *s); +@@ -2674,111 +2674,111 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + switch (*s) + { + case 'a': /* global pointer. */ +- iprintf (is, "%s", mips_gpr_names[28]); ++ infprintf (is, "%s", mips_gpr_names[28]); + break; + + case 'b': + regno = micromips_to_32_reg_b_map[GET_OP (insn, MB)]; +- iprintf (is, "%s", mips_gpr_names[regno]); ++ infprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'c': + regno = micromips_to_32_reg_c_map[GET_OP (insn, MC)]; +- iprintf (is, "%s", mips_gpr_names[regno]); ++ infprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'd': + regno = micromips_to_32_reg_d_map[GET_OP (insn, MD)]; +- iprintf (is, "%s", mips_gpr_names[regno]); ++ infprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'e': + regno = micromips_to_32_reg_e_map[GET_OP (insn, ME)]; +- iprintf (is, "%s", mips_gpr_names[regno]); ++ infprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'f': + /* Save lastregno for "mt" to print out later. */ + lastregno = micromips_to_32_reg_f_map[GET_OP (insn, MF)]; +- iprintf (is, "%s", mips_gpr_names[lastregno]); ++ infprintf (is, "%s", mips_gpr_names[lastregno]); + break; + + case 'g': + regno = micromips_to_32_reg_g_map[GET_OP (insn, MG)]; +- iprintf (is, "%s", mips_gpr_names[regno]); ++ infprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'h': + regno = micromips_to_32_reg_h_map[GET_OP (insn, MH)]; +- iprintf (is, "%s", mips_gpr_names[regno]); ++ infprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'i': + regno = micromips_to_32_reg_i_map[GET_OP (insn, MI)]; +- iprintf (is, "%s", mips_gpr_names[regno]); ++ infprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'j': +- iprintf (is, "%s", mips_gpr_names[GET_OP (insn, MJ)]); ++ infprintf (is, "%s", mips_gpr_names[GET_OP (insn, MJ)]); + break; + + case 'l': + regno = micromips_to_32_reg_l_map[GET_OP (insn, ML)]; +- iprintf (is, "%s", mips_gpr_names[regno]); ++ infprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'm': + regno = micromips_to_32_reg_m_map[GET_OP (insn, MM)]; +- iprintf (is, "%s", mips_gpr_names[regno]); ++ infprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'n': + regno = micromips_to_32_reg_n_map[GET_OP (insn, MN)]; +- iprintf (is, "%s", mips_gpr_names[regno]); ++ infprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'p': + /* Save lastregno for "mt" to print out later. */ + lastregno = GET_OP (insn, MP); +- iprintf (is, "%s", mips_gpr_names[lastregno]); ++ infprintf (is, "%s", mips_gpr_names[lastregno]); + break; + + case 'q': + regno = micromips_to_32_reg_q_map[GET_OP (insn, MQ)]; +- iprintf (is, "%s", mips_gpr_names[regno]); ++ infprintf (is, "%s", mips_gpr_names[regno]); + break; + + case 'r': /* program counter. */ +- iprintf (is, "$pc"); ++ infprintf (is, "$pc"); + break; + + case 's': /* stack pointer. */ + lastregno = 29; +- iprintf (is, "%s", mips_gpr_names[29]); ++ infprintf (is, "%s", mips_gpr_names[29]); + break; + + case 't': +- iprintf (is, "%s", mips_gpr_names[lastregno]); ++ infprintf (is, "%s", mips_gpr_names[lastregno]); + break; + + case 'z': /* $0. */ +- iprintf (is, "%s", mips_gpr_names[0]); ++ infprintf (is, "%s", mips_gpr_names[0]); + break; + + case 'A': + /* Sign-extend the immediate. */ + immed = ((GET_OP (insn, IMMA) ^ 0x40) - 0x40) << 2; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'B': + immed = micromips_imm_b_map[GET_OP (insn, IMMB)]; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'C': + immed = micromips_imm_c_map[GET_OP (insn, IMMC)]; +- iprintf (is, "0x%lx", immed); ++ infprintf (is, "0x%lx", immed); + break; + + case 'D': +@@ -2797,50 +2797,50 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + + case 'F': + immed = GET_OP (insn, IMMF); +- iprintf (is, "0x%x", immed); ++ infprintf (is, "0x%x", immed); + break; + + case 'G': + immed = (insn >> MICROMIPSOP_SH_IMMG) + 1; + immed = (immed & MICROMIPSOP_MASK_IMMG) - 1; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'H': + immed = GET_OP (insn, IMMH) << 1; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'I': + immed = (insn >> MICROMIPSOP_SH_IMMI) + 1; + immed = (immed & MICROMIPSOP_MASK_IMMI) - 1; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'J': + immed = GET_OP (insn, IMMJ) << 2; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'L': + immed = GET_OP (insn, IMML); +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'M': + immed = (insn >> MICROMIPSOP_SH_IMMM) - 1; + immed = (immed & MICROMIPSOP_MASK_IMMM) + 1; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'N': + immed = GET_OP (insn, IMMN); + if (immed == 0) +- iprintf (is, "%s,%s", ++ infprintf (is, "%s,%s", + mips_gpr_names[16], + mips_gpr_names[31]); + else +- iprintf (is, "%s-%s,%s", ++ infprintf (is, "%s-%s,%s", + mips_gpr_names[16], + mips_gpr_names[16 + immed], + mips_gpr_names[31]); +@@ -2848,35 +2848,35 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + + case 'O': + immed = GET_OP (insn, IMMO); +- iprintf (is, "0x%x", immed); ++ infprintf (is, "0x%x", immed); + break; + + case 'P': + immed = GET_OP (insn, IMMP) << 2; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'Q': + /* Sign-extend the immediate. */ + immed = (GET_OP (insn, IMMQ) ^ 0x400000) - 0x400000; + immed <<= 2; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'U': + immed = GET_OP (insn, IMMU) << 2; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'W': + immed = GET_OP (insn, IMMW) << 2; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'X': + /* Sign-extend the immediate. */ + immed = (GET_OP (insn, IMMX) ^ 0x8) - 0x8; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + case 'Y': +@@ -2885,12 +2885,12 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + if (immed >= -2 && immed <= 1) + immed ^= 0x100; + immed = immed << 2; +- iprintf (is, "%d", immed); ++ infprintf (is, "%d", immed); + break; + + default: + /* xgettext:c-format */ +- iprintf (is, ++ infprintf (is, + _("# internal disassembler error, " + "unrecognized modifier (m%c)"), + *s); +@@ -2900,7 +2900,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + + default: + /* xgettext:c-format */ +- iprintf (is, ++ infprintf (is, + _("# internal disassembler error, " + "unrecognized modifier (%c)"), + *s); +@@ -2937,7 +2937,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) + } + #undef GET_OP + +- iprintf (is, "0x%x", insn); ++ infprintf (is, "0x%x", insn); + info->insn_type = dis_noninsn; + + return length; diff --git a/packaging/binutils.changes b/packaging/binutils.changes deleted file mode 100644 index d88596b..0000000 --- a/packaging/binutils.changes +++ /dev/null @@ -1,52 +0,0 @@ -* Tue Aug 2 2011 Junfeng Dong - 2.21.51.20110421 -- Import 2.21.51.20110421 from SLP. - -* Sun Apr 24 08:02:35 UTC 2011 - Jan-Simon Möller - 1.0 -- Add baselibs.conf to src.rpm - -* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 -- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 - -* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 -- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 - -* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 -- Bugfixing: - BMC#10336 - Error when installing binutils with --excludedocs in .ks - -* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 -- enable LTO (link time optimization) - -* Mon May 03 2010 Jan-Simon Möller - 2.20.51.0.2 -- Add precheckin.sh, README.packager -- add cross-binutils-* packages (cross-compiler) - -* Thu Mar 04 2010 Anas Nashif - 2.20.51.0.2 -- Use %{_target_platform} as the build target - -* Fri Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 -- add the LD_AS_NEEDED env variable back, and get us closer to upstream - -* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 -- Update to 2.20.51.0.2 - -* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 -- Update to 2.19.51.0.14 - -* Wed May 06 2009 Arjan van de Ven 2.19 -- Add LD_AS_NEEDED environment variable - -* Tue Jan 13 2009 Anas Nashif 2.19 -- Fixed source tag - -* Thu Jan 08 2009 Anas Nashif 2.19 -- Update to 2.19 - -* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 -- Fixed rpmlint errors in Summary tag - -* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 -- Do not check for ia64 - -* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 -- add check for the info file before installation diff --git a/packaging/binutils.spec b/packaging/binutils.spec index 3310937..96a0644 100644 --- a/packaging/binutils.spec +++ b/packaging/binutils.spec @@ -3,57 +3,56 @@ %define enable_shared 1 %define run_testsuite 0 %define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif Summary: A GNU collection of binary utilities Name: binutils -Version: 2.21.51.20110421 -Release: 5 +Version: 2.22 +Release: 1.21.Mer License: GPLv3+ Group: Development/Tools URL: http://sources.redhat.com/binutils -Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.gz +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 Source2: binutils-2.19.50.0.1-output-format.sed Source100: baselibs.conf Source200: precheckin.sh Source201: README.PACKAGER -Patch1: 001_ld_makefile_patch.patch -Patch2: 006_better_file_error.patch -Patch3: 012_check_ldrunpath_length.patch -Patch4: 013_bash_in_ld_testsuite.patch -Patch5: 127_x86_64_i386_biarch.patch -Patch6: 128_build_id.patch -Patch7: 129_ld_mulitarch_dirs.patch -Patch8: 130_gold_disable_testsuite_build.patch -Patch9: 131_ld_bootstrap_testsuite.patch -Patch10: 134_gold_no_spu.patch -Patch11: 135_bfd_version.patch -Patch12: 140_pr10340.patch -Patch13: 156_pr10144.patch -Patch14: 157_ar_scripts_with_tilde.patch -Patch15: 158_ld_system_root.patch -Patch16: 159_gas-i8775.diff -Patch17: 160_gas_pr12698.diff -Patch18: 161_ar_delete_members.diff -Patch19: 162_pr12730.diff -Patch20: 162_ld_cortex_a8_erratum.diff -Patch21: 163_pr12726.diff -Patch22: 200_pr12715.diff -Patch23: 201_pr12778.diff -Patch24: Fix-gold-libopcode.patch -Patch25: Disable-info.patch +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch %if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" %define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif %define _prefix /opt/cross %define enable_shared 0 %define isnative 0 %define run_testsuite 0 %define cross %{binutils_target}- # single target atm. -ExclusiveArch: %ix86 -# special handling for ARM build acceleration -%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)/\\1/")" == "accel" -%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel/\\1/")-tizen-linux-gnueabi +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi %define _prefix /usr %define cross "" %define accelerator_crossbuild 1 @@ -62,17 +61,16 @@ AutoReqProv: 0 %endif %endif -#BuildRequires: gettext -BuildRequires: flex -BuildRequires: bison -BuildRequires: zlib-devel -BuildRequires: elfutils-libelf-devel +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel # Required for: ld-bootstrap/bootstrap.exp bootstrap with --static # It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array %if %{run_testsuite} BuildRequires: dejagnu, zlib-static, glibc-static, sharutils %endif +BuildRequires: elfutils-libelf-devel Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info # On ARM EABI systems, we do want -gnueabi to be part of the # target triple. @@ -97,6 +95,8 @@ converting addresses to file and line). Summary: BFD and opcodes static libraries and header files Group: System/Libraries Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info Requires: zlib-devel %description devel @@ -107,32 +107,22 @@ to consider using libelf instead of BFD. %prep %setup -q -n binutils-%{version} -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 -%patch4 -p1 -%patch5 -p1 -%patch6 -p1 -%patch7 -p1 -%patch8 -p1 -%patch9 -p1 -%patch10 -p1 -%patch11 -p1 -%patch12 -p1 -%patch13 -p1 -%patch14 -p1 -%patch15 -p1 +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 %patch16 -p1 %patch17 -p1 -%patch18 -p1 -%patch19 -p1 -%patch20 -p1 -%patch21 -p1 -%patch22 -p1 -%patch23 -p1 -%patch24 -p1 -%patch25 -p1 - # We cannot run autotools as there is an exact requirement of autoconf-2.59. @@ -175,7 +165,7 @@ CFLAGS="$CFLAGS -O0 -ggdb2" # We could optimize the cross builds size by --enable-shared but the produced # binaries may be less convenient in the embedded environment. %if %{accelerator_crossbuild} -export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib:/usr/lib:/lib" +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" %endif %configure \ --build=%{_target_platform} --host=%{_target_platform} \ @@ -196,13 +186,16 @@ export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib: --disable-shared \ %endif $CARGS \ - --enable-plugins \ --disable-werror \ - --enable-ld=default \ - --disable-info \ - --enable-gold - + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info # Do not use %%check as it is run after %%install where libbfd.so is rebuild # with -fvisibility=hidden no longer being usable in its shared form. @@ -226,6 +219,7 @@ rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,l rm -rf %{buildroot} make install DESTDIR=%{buildroot} %if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info # Rebuild libiberty.a with -fPIC. # Future: Remove it together with its header file, projects should bundle it. @@ -301,6 +295,8 @@ INPUT ( %{_libdir}/libopcodes.a -lbfd ) EOH %else # !%{isnative} +# For cross-binutils we drop the documentation. +rm -rf %{buildroot}%{_infodir} # We keep these as one can have native + cross binutils of different versions. #rm -rf %{buildroot}%{_prefix}/share/locale #rm -rf %{buildroot}%{_mandir} @@ -311,15 +307,68 @@ rm -rf %{buildroot}%{_prefix}/%{_lib}/libiberty.a rm -f %{buildroot}%{_infodir}/dir rm -rf %{buildroot}%{_prefix}/%{binutils_target} -# As gas/README points out (search for --enable-targets), -# multi-arch gas is not ready yet. -rm -rf %{buildroot}%{_libdir}/ldscripts +%if !%{disable_nls} +%find_lang %{?cross}binutils +%find_lang %{?cross}opcodes +%find_lang %{?cross}bfd +%find_lang %{?cross}gas +%find_lang %{?cross}ld +%find_lang %{?cross}gprof +cat %{?cross}opcodes.lang >> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 %postun -p /sbin/ldconfig -%files +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif %defattr(-,root,root,-) +%doc README %{_prefix}/bin/* %{_mandir}/man1/* %if %{enable_shared} @@ -328,6 +377,8 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %exclude %{_prefix}/%{_lib}/libopcodes.so %endif %if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* %files devel %defattr(-,root,root,-) @@ -335,5 +386,60 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %{_prefix}/%{_lib}/libbfd.so %{_prefix}/%{_lib}/libopcodes.so %{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* %endif # %{isnative} +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-armv5tel-binutils-accel.spec b/packaging/cross-armv5tel-binutils-accel.spec index dce2fee..1f2921e 100644 --- a/packaging/cross-armv5tel-binutils-accel.spec +++ b/packaging/cross-armv5tel-binutils-accel.spec @@ -3,57 +3,56 @@ %define enable_shared 1 %define run_testsuite 0 %define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif Summary: A GNU collection of binary utilities -Name: cross-armv5tel-binutils-accel -Version: 2.21.51.20110421 -Release: 5 +Name: cross-armv5tel-binutils-accel-%{!?x64:x86}%{?x64} +Version: 2.22 +Release: 1.21.Mer License: GPLv3+ Group: Development/Tools URL: http://sources.redhat.com/binutils -Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.gz +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 Source2: binutils-2.19.50.0.1-output-format.sed Source100: baselibs.conf Source200: precheckin.sh Source201: README.PACKAGER -Patch1: 001_ld_makefile_patch.patch -Patch2: 006_better_file_error.patch -Patch3: 012_check_ldrunpath_length.patch -Patch4: 013_bash_in_ld_testsuite.patch -Patch5: 127_x86_64_i386_biarch.patch -Patch6: 128_build_id.patch -Patch7: 129_ld_mulitarch_dirs.patch -Patch8: 130_gold_disable_testsuite_build.patch -Patch9: 131_ld_bootstrap_testsuite.patch -Patch10: 134_gold_no_spu.patch -Patch11: 135_bfd_version.patch -Patch12: 140_pr10340.patch -Patch13: 156_pr10144.patch -Patch14: 157_ar_scripts_with_tilde.patch -Patch15: 158_ld_system_root.patch -Patch16: 159_gas-i8775.diff -Patch17: 160_gas_pr12698.diff -Patch18: 161_ar_delete_members.diff -Patch19: 162_pr12730.diff -Patch20: 162_ld_cortex_a8_erratum.diff -Patch21: 163_pr12726.diff -Patch22: 200_pr12715.diff -Patch23: 201_pr12778.diff -Patch24: Fix-gold-libopcode.patch -Patch25: Disable-info.patch +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch %if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" %define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif %define _prefix /opt/cross %define enable_shared 0 %define isnative 0 %define run_testsuite 0 %define cross %{binutils_target}- # single target atm. -ExclusiveArch: %ix86 -# special handling for ARM build acceleration -%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)/\\1/")" == "accel" -%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel/\\1/")-tizen-linux-gnueabi +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi %define _prefix /usr %define cross "" %define accelerator_crossbuild 1 @@ -62,17 +61,16 @@ AutoReqProv: 0 %endif %endif -#BuildRequires: gettext -BuildRequires: flex -BuildRequires: bison -BuildRequires: zlib-devel -BuildRequires: elfutils-libelf-devel +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel # Required for: ld-bootstrap/bootstrap.exp bootstrap with --static # It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array %if %{run_testsuite} BuildRequires: dejagnu, zlib-static, glibc-static, sharutils %endif +BuildRequires: elfutils-libelf-devel Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info # On ARM EABI systems, we do want -gnueabi to be part of the # target triple. @@ -97,6 +95,8 @@ converting addresses to file and line). Summary: BFD and opcodes static libraries and header files Group: System/Libraries Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info Requires: zlib-devel %description devel @@ -107,32 +107,22 @@ to consider using libelf instead of BFD. %prep %setup -q -n binutils-%{version} -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 -%patch4 -p1 -%patch5 -p1 -%patch6 -p1 -%patch7 -p1 -%patch8 -p1 -%patch9 -p1 -%patch10 -p1 -%patch11 -p1 -%patch12 -p1 -%patch13 -p1 -%patch14 -p1 -%patch15 -p1 +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 %patch16 -p1 %patch17 -p1 -%patch18 -p1 -%patch19 -p1 -%patch20 -p1 -%patch21 -p1 -%patch22 -p1 -%patch23 -p1 -%patch24 -p1 -%patch25 -p1 - # We cannot run autotools as there is an exact requirement of autoconf-2.59. @@ -175,7 +165,7 @@ CFLAGS="$CFLAGS -O0 -ggdb2" # We could optimize the cross builds size by --enable-shared but the produced # binaries may be less convenient in the embedded environment. %if %{accelerator_crossbuild} -export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib:/usr/lib:/lib" +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" %endif %configure \ --build=%{_target_platform} --host=%{_target_platform} \ @@ -196,13 +186,16 @@ export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib: --disable-shared \ %endif $CARGS \ - --enable-plugins \ --disable-werror \ - --enable-ld=default \ - --disable-info \ - --enable-gold - + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info # Do not use %%check as it is run after %%install where libbfd.so is rebuild # with -fvisibility=hidden no longer being usable in its shared form. @@ -226,6 +219,7 @@ rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,l rm -rf %{buildroot} make install DESTDIR=%{buildroot} %if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info # Rebuild libiberty.a with -fPIC. # Future: Remove it together with its header file, projects should bundle it. @@ -301,6 +295,8 @@ INPUT ( %{_libdir}/libopcodes.a -lbfd ) EOH %else # !%{isnative} +# For cross-binutils we drop the documentation. +rm -rf %{buildroot}%{_infodir} # We keep these as one can have native + cross binutils of different versions. #rm -rf %{buildroot}%{_prefix}/share/locale #rm -rf %{buildroot}%{_mandir} @@ -311,15 +307,68 @@ rm -rf %{buildroot}%{_prefix}/%{_lib}/libiberty.a rm -f %{buildroot}%{_infodir}/dir rm -rf %{buildroot}%{_prefix}/%{binutils_target} -# As gas/README points out (search for --enable-targets), -# multi-arch gas is not ready yet. -rm -rf %{buildroot}%{_libdir}/ldscripts +%if !%{disable_nls} +%find_lang %{?cross}binutils +%find_lang %{?cross}opcodes +%find_lang %{?cross}bfd +%find_lang %{?cross}gas +%find_lang %{?cross}ld +%find_lang %{?cross}gprof +cat %{?cross}opcodes.lang >> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 %postun -p /sbin/ldconfig -%files +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif %defattr(-,root,root,-) +%doc README %{_prefix}/bin/* %{_mandir}/man1/* %if %{enable_shared} @@ -328,6 +377,8 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %exclude %{_prefix}/%{_lib}/libopcodes.so %endif %if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* %files devel %defattr(-,root,root,-) @@ -335,5 +386,60 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %{_prefix}/%{_lib}/libbfd.so %{_prefix}/%{_lib}/libopcodes.so %{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* %endif # %{isnative} +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-armv5tel-binutils.spec b/packaging/cross-armv5tel-binutils.spec index 185e989..54de277 100644 --- a/packaging/cross-armv5tel-binutils.spec +++ b/packaging/cross-armv5tel-binutils.spec @@ -3,57 +3,56 @@ %define enable_shared 1 %define run_testsuite 0 %define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif Summary: A GNU collection of binary utilities Name: cross-armv5tel-binutils -Version: 2.21.51.20110421 -Release: 5 +Version: 2.22 +Release: 1.21.Mer License: GPLv3+ Group: Development/Tools URL: http://sources.redhat.com/binutils -Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.gz +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 Source2: binutils-2.19.50.0.1-output-format.sed Source100: baselibs.conf Source200: precheckin.sh Source201: README.PACKAGER -Patch1: 001_ld_makefile_patch.patch -Patch2: 006_better_file_error.patch -Patch3: 012_check_ldrunpath_length.patch -Patch4: 013_bash_in_ld_testsuite.patch -Patch5: 127_x86_64_i386_biarch.patch -Patch6: 128_build_id.patch -Patch7: 129_ld_mulitarch_dirs.patch -Patch8: 130_gold_disable_testsuite_build.patch -Patch9: 131_ld_bootstrap_testsuite.patch -Patch10: 134_gold_no_spu.patch -Patch11: 135_bfd_version.patch -Patch12: 140_pr10340.patch -Patch13: 156_pr10144.patch -Patch14: 157_ar_scripts_with_tilde.patch -Patch15: 158_ld_system_root.patch -Patch16: 159_gas-i8775.diff -Patch17: 160_gas_pr12698.diff -Patch18: 161_ar_delete_members.diff -Patch19: 162_pr12730.diff -Patch20: 162_ld_cortex_a8_erratum.diff -Patch21: 163_pr12726.diff -Patch22: 200_pr12715.diff -Patch23: 201_pr12778.diff -Patch24: Fix-gold-libopcode.patch -Patch25: Disable-info.patch +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch %if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" %define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif %define _prefix /opt/cross %define enable_shared 0 %define isnative 0 %define run_testsuite 0 %define cross %{binutils_target}- # single target atm. -ExclusiveArch: %ix86 -# special handling for ARM build acceleration -%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)/\\1/")" == "accel" -%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel/\\1/")-tizen-linux-gnueabi +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi %define _prefix /usr %define cross "" %define accelerator_crossbuild 1 @@ -62,17 +61,16 @@ AutoReqProv: 0 %endif %endif -#BuildRequires: gettext -BuildRequires: flex -BuildRequires: bison -BuildRequires: zlib-devel -BuildRequires: elfutils-libelf-devel +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel # Required for: ld-bootstrap/bootstrap.exp bootstrap with --static # It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array %if %{run_testsuite} BuildRequires: dejagnu, zlib-static, glibc-static, sharutils %endif +BuildRequires: elfutils-libelf-devel Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info # On ARM EABI systems, we do want -gnueabi to be part of the # target triple. @@ -97,6 +95,8 @@ converting addresses to file and line). Summary: BFD and opcodes static libraries and header files Group: System/Libraries Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info Requires: zlib-devel %description devel @@ -107,32 +107,22 @@ to consider using libelf instead of BFD. %prep %setup -q -n binutils-%{version} -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 -%patch4 -p1 -%patch5 -p1 -%patch6 -p1 -%patch7 -p1 -%patch8 -p1 -%patch9 -p1 -%patch10 -p1 -%patch11 -p1 -%patch12 -p1 -%patch13 -p1 -%patch14 -p1 -%patch15 -p1 +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 %patch16 -p1 %patch17 -p1 -%patch18 -p1 -%patch19 -p1 -%patch20 -p1 -%patch21 -p1 -%patch22 -p1 -%patch23 -p1 -%patch24 -p1 -%patch25 -p1 - # We cannot run autotools as there is an exact requirement of autoconf-2.59. @@ -175,7 +165,7 @@ CFLAGS="$CFLAGS -O0 -ggdb2" # We could optimize the cross builds size by --enable-shared but the produced # binaries may be less convenient in the embedded environment. %if %{accelerator_crossbuild} -export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib:/usr/lib:/lib" +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" %endif %configure \ --build=%{_target_platform} --host=%{_target_platform} \ @@ -196,13 +186,16 @@ export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib: --disable-shared \ %endif $CARGS \ - --enable-plugins \ --disable-werror \ - --enable-ld=default \ - --disable-info \ - --enable-gold - + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info # Do not use %%check as it is run after %%install where libbfd.so is rebuild # with -fvisibility=hidden no longer being usable in its shared form. @@ -226,6 +219,7 @@ rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,l rm -rf %{buildroot} make install DESTDIR=%{buildroot} %if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info # Rebuild libiberty.a with -fPIC. # Future: Remove it together with its header file, projects should bundle it. @@ -301,6 +295,8 @@ INPUT ( %{_libdir}/libopcodes.a -lbfd ) EOH %else # !%{isnative} +# For cross-binutils we drop the documentation. +rm -rf %{buildroot}%{_infodir} # We keep these as one can have native + cross binutils of different versions. #rm -rf %{buildroot}%{_prefix}/share/locale #rm -rf %{buildroot}%{_mandir} @@ -311,15 +307,68 @@ rm -rf %{buildroot}%{_prefix}/%{_lib}/libiberty.a rm -f %{buildroot}%{_infodir}/dir rm -rf %{buildroot}%{_prefix}/%{binutils_target} -# As gas/README points out (search for --enable-targets), -# multi-arch gas is not ready yet. -rm -rf %{buildroot}%{_libdir}/ldscripts +%if !%{disable_nls} +%find_lang %{?cross}binutils +%find_lang %{?cross}opcodes +%find_lang %{?cross}bfd +%find_lang %{?cross}gas +%find_lang %{?cross}ld +%find_lang %{?cross}gprof +cat %{?cross}opcodes.lang >> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 %postun -p /sbin/ldconfig -%files +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif %defattr(-,root,root,-) +%doc README %{_prefix}/bin/* %{_mandir}/man1/* %if %{enable_shared} @@ -328,6 +377,8 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %exclude %{_prefix}/%{_lib}/libopcodes.so %endif %if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* %files devel %defattr(-,root,root,-) @@ -335,5 +386,60 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %{_prefix}/%{_lib}/libbfd.so %{_prefix}/%{_lib}/libopcodes.so %{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* %endif # %{isnative} +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-armv6l-binutils-accel.spec b/packaging/cross-armv6l-binutils-accel.spec new file mode 100644 index 0000000..f709dba --- /dev/null +++ b/packaging/cross-armv6l-binutils-accel.spec @@ -0,0 +1,445 @@ +%define binutils_target %{_target_platform} +%define isnative 1 +%define enable_shared 1 +%define run_testsuite 0 +%define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif + +Summary: A GNU collection of binary utilities +Name: cross-armv6l-binutils-accel-%{!?x64:x86}%{?x64} +Version: 2.22 +Release: 1.21.Mer +License: GPLv3+ +Group: Development/Tools +URL: http://sources.redhat.com/binutils +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 +Source2: binutils-2.19.50.0.1-output-format.sed +Source100: baselibs.conf +Source200: precheckin.sh +Source201: README.PACKAGER +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch + +%if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif +%define _prefix /opt/cross +%define enable_shared 0 +%define isnative 0 +%define run_testsuite 0 +%define cross %{binutils_target}- +# single target atm. +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi +%define _prefix /usr +%define cross "" +%define accelerator_crossbuild 1 +AutoReqProv: 0 +%define _build_name_fmt %%{ARCH}/%%{NAME}-%%{VERSION}-%%{RELEASE}.%%{ARCH}.dontuse.rpm +%endif +%endif + +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel +# Required for: ld-bootstrap/bootstrap.exp bootstrap with --static +# It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array +%if %{run_testsuite} +BuildRequires: dejagnu, zlib-static, glibc-static, sharutils +%endif +BuildRequires: elfutils-libelf-devel +Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info + +# On ARM EABI systems, we do want -gnueabi to be part of the +# target triple. +%ifnarch %{arm} +%define _gnu %{nil} +%endif + +%description +Binutils is a collection of binary utilities, including ar (for +creating, modifying and extracting from archives), as (a family of GNU +assemblers), gprof (for displaying call graph profile data), ld (the +GNU linker), nm (for listing symbols from object files), objcopy (for +copying and translating object files), objdump (for displaying +information from object files), ranlib (for generating an index for +the contents of an archive), readelf (for displaying detailed +information about binary files), size (for listing the section sizes +of an object or archive file), strings (for listing printable strings +from files), strip (for discarding symbols), and addr2line (for +converting addresses to file and line). + +%package devel +Summary: BFD and opcodes static libraries and header files +Group: System/Libraries +Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info +Requires: zlib-devel + +%description devel +This package contains BFD and opcodes static libraries and associated +header files. Only *.a libraries are included, because BFD doesn't +have a stable ABI. Developers starting new projects are strongly encouraged +to consider using libelf instead of BFD. + +%prep +%setup -q -n binutils-%{version} +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 +%patch16 -p1 +%patch17 -p1 + +# We cannot run autotools as there is an exact requirement of autoconf-2.59. + +# On ppc64 we might use 64KiB pages +sed -i -e '/#define.*ELF_COMMONPAGESIZE/s/0x1000$/0x10000/' bfd/elf*ppc.c +# LTP sucks +perl -pi -e 's/i\[3-7\]86/i[34567]86/g' */conf* +sed -i -e 's/%''{release}/%{release}/g' bfd/Makefile{.am,.in} +sed -i -e '/^libopcodes_la_\(DEPENDENCIES\|LIBADD\)/s,$, ../bfd/libbfd.la,' opcodes/Makefile.{am,in} +# Build libbfd.so and libopcodes.so with -Bsymbolic-functions if possible. +if gcc %{optflags} -v --help 2>&1 | grep -q -- -Bsymbolic-functions; then +sed -i -e 's/^libbfd_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' bfd/Makefile.{am,in} +sed -i -e 's/^libopcodes_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' opcodes/Makefile.{am,in} +fi +# $PACKAGE is used for the gettext catalog name. +sed -i -e 's/^ PACKAGE=/ PACKAGE=%{?cross}/' */configure +# Undo the name change to run the testsuite. +for tool in binutils gas ld +do + sed -i -e "2aDEJATOOL = $tool" $tool/Makefile.am + sed -i -e "s/^DEJATOOL = .*/DEJATOOL = $tool/" $tool/Makefile.in +done +touch */configure + +%build +echo target is %{binutils_target} +export CFLAGS="$RPM_OPT_FLAGS" +CARGS= + +case %{binutils_target} in i?86*) + CARGS="$CARGS --enable-64-bit-bfd" + ;; +esac + +%if 0%{?_with_debug:1} +CFLAGS="$CFLAGS -O0 -ggdb2" +%define enable_shared 0 +%endif + +# We could optimize the cross builds size by --enable-shared but the produced +# binaries may be less convenient in the embedded environment. +%if %{accelerator_crossbuild} +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" +%endif +%configure \ + --build=%{_target_platform} --host=%{_target_platform} \ + --target=%{binutils_target} \ +%if !%{isnative} +%if !%{accelerator_crossbuild} + --enable-targets=%{_host} \ + --with-sysroot=%{_prefix}/%{binutils_target}/sys-root \ + --program-prefix=%{cross} \ +%else + --with-sysroot=/ \ + --program-prefix="" \ +%endif +%endif +%if %{enable_shared} + --enable-shared \ +%else + --disable-shared \ +%endif + $CARGS \ + --disable-werror \ + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com +make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info + +# Do not use %%check as it is run after %%install where libbfd.so is rebuild +# with -fvisibility=hidden no longer being usable in its shared form. +%if !%{run_testsuite} +echo ====================TESTSUITE DISABLED========================= +%else +make -k check < /dev/null || : +echo ====================TESTING========================= +cat {gas/testsuite/gas,ld/ld,binutils/binutils}.sum +echo ====================TESTING END===================== +for file in {gas/testsuite/gas,ld/ld,binutils/binutils}.{sum,log} +do + ln $file binutils-%{_target_platform}-$(basename $file) || : +done +tar cjf binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log} +uuencode binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}.tar.bz2 +rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log} +%endif + +%install +rm -rf %{buildroot} +make install DESTDIR=%{buildroot} +%if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info + +# Rebuild libiberty.a with -fPIC. +# Future: Remove it together with its header file, projects should bundle it. +make -C libiberty clean +make CFLAGS="-g -fPIC $RPM_OPT_FLAGS" -C libiberty + +# Rebuild libbfd.a with -fPIC. +# Without the hidden visibility the 3rd party shared libraries would export +# the bfd non-stable ABI. +make -C bfd clean +make CFLAGS="-g -fPIC $RPM_OPT_FLAGS -fvisibility=hidden" -C bfd + +install -m 644 bfd/libbfd.a %{buildroot}%{_prefix}/%{_lib} +install -m 644 libiberty/libiberty.a %{buildroot}%{_prefix}/%{_lib} +install -m 644 include/libiberty.h %{buildroot}%{_prefix}/include +# Remove Windows/Novell only man pages +rm -f %{buildroot}%{_mandir}/man1/{dlltool,nlmconv,windres}* + +%if %{enable_shared} +chmod +x %{buildroot}%{_prefix}/%{_lib}/lib*.so* +%endif + +# Prevent programs to link against libbfd and libopcodes dynamically, +# they are changing far too often +rm -f %{buildroot}%{_prefix}/%{_lib}/lib{bfd,opcodes}.so + +# Remove libtool files, which reference the .so libs +rm -f %{buildroot}%{_prefix}/%{_lib}/lib{bfd,opcodes}.la + +%if "%{__isa_bits}" == "64" +# Sanity check --enable-64-bit-bfd really works. +grep '^#define BFD_ARCH_SIZE 64$' %{buildroot}%{_prefix}/include/bfd.h +%endif +# Fix multilib conflicts of generated values by __WORDSIZE-based expressions. +%ifarch %{ix86} x86_64 +sed -i -e '/^#include "ansidecl.h"/{p;s~^.*$~#include ~;}' \ + -e 's/^#define BFD_DEFAULT_TARGET_SIZE \(32\|64\) *$/#define BFD_DEFAULT_TARGET_SIZE __WORDSIZE/' \ + -e 's/^#define BFD_HOST_64BIT_LONG [01] *$/#define BFD_HOST_64BIT_LONG (__WORDSIZE == 64)/' \ + -e 's/^#define BFD_HOST_64_BIT \(long \)\?long *$/#if __WORDSIZE == 32\ +#define BFD_HOST_64_BIT long long\ +#else\ +#define BFD_HOST_64_BIT long\ +#endif/' \ + -e 's/^#define BFD_HOST_U_64_BIT unsigned \(long \)\?long *$/#define BFD_HOST_U_64_BIT unsigned BFD_HOST_64_BIT/' \ + %{buildroot}%{_prefix}/include/bfd.h +%endif +touch -r bfd/bfd-in2.h %{buildroot}%{_prefix}/include/bfd.h + +# Generate .so linker scripts for dependencies; imported from glibc/Makerules: + +# This fragment of linker script gives the OUTPUT_FORMAT statement +# for the configuration we are building. +OUTPUT_FORMAT="\ +/* Ensure this .so library will not be used by a link for a different format + on a multi-architecture system. */ +$(gcc $CFLAGS $LDFLAGS -shared -x c /dev/null -o /dev/null -Wl,--verbose -v 2>&1 | sed -n -f "%{SOURCE2}")" + +tee %{buildroot}%{_prefix}/%{_lib}/libbfd.so <> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif + +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 + +%postun -p /sbin/ldconfig + +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif +%defattr(-,root,root,-) +%doc README +%{_prefix}/bin/* +%{_mandir}/man1/* +%if %{enable_shared} +%{_prefix}/%{_lib}/lib*.so +%exclude %{_prefix}/%{_lib}/libbfd.so +%exclude %{_prefix}/%{_lib}/libopcodes.so +%endif +%if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* + +%files devel +%defattr(-,root,root,-) +%{_prefix}/include/* +%{_prefix}/%{_lib}/libbfd.so +%{_prefix}/%{_lib}/libopcodes.so +%{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* +%endif # %{isnative} + +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-armv6l-binutils.spec b/packaging/cross-armv6l-binutils.spec new file mode 100644 index 0000000..85740a1 --- /dev/null +++ b/packaging/cross-armv6l-binutils.spec @@ -0,0 +1,445 @@ +%define binutils_target %{_target_platform} +%define isnative 1 +%define enable_shared 1 +%define run_testsuite 0 +%define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif + +Summary: A GNU collection of binary utilities +Name: cross-armv6l-binutils +Version: 2.22 +Release: 1.21.Mer +License: GPLv3+ +Group: Development/Tools +URL: http://sources.redhat.com/binutils +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 +Source2: binutils-2.19.50.0.1-output-format.sed +Source100: baselibs.conf +Source200: precheckin.sh +Source201: README.PACKAGER +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch + +%if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif +%define _prefix /opt/cross +%define enable_shared 0 +%define isnative 0 +%define run_testsuite 0 +%define cross %{binutils_target}- +# single target atm. +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi +%define _prefix /usr +%define cross "" +%define accelerator_crossbuild 1 +AutoReqProv: 0 +%define _build_name_fmt %%{ARCH}/%%{NAME}-%%{VERSION}-%%{RELEASE}.%%{ARCH}.dontuse.rpm +%endif +%endif + +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel +# Required for: ld-bootstrap/bootstrap.exp bootstrap with --static +# It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array +%if %{run_testsuite} +BuildRequires: dejagnu, zlib-static, glibc-static, sharutils +%endif +BuildRequires: elfutils-libelf-devel +Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info + +# On ARM EABI systems, we do want -gnueabi to be part of the +# target triple. +%ifnarch %{arm} +%define _gnu %{nil} +%endif + +%description +Binutils is a collection of binary utilities, including ar (for +creating, modifying and extracting from archives), as (a family of GNU +assemblers), gprof (for displaying call graph profile data), ld (the +GNU linker), nm (for listing symbols from object files), objcopy (for +copying and translating object files), objdump (for displaying +information from object files), ranlib (for generating an index for +the contents of an archive), readelf (for displaying detailed +information about binary files), size (for listing the section sizes +of an object or archive file), strings (for listing printable strings +from files), strip (for discarding symbols), and addr2line (for +converting addresses to file and line). + +%package devel +Summary: BFD and opcodes static libraries and header files +Group: System/Libraries +Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info +Requires: zlib-devel + +%description devel +This package contains BFD and opcodes static libraries and associated +header files. Only *.a libraries are included, because BFD doesn't +have a stable ABI. Developers starting new projects are strongly encouraged +to consider using libelf instead of BFD. + +%prep +%setup -q -n binutils-%{version} +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 +%patch16 -p1 +%patch17 -p1 + +# We cannot run autotools as there is an exact requirement of autoconf-2.59. + +# On ppc64 we might use 64KiB pages +sed -i -e '/#define.*ELF_COMMONPAGESIZE/s/0x1000$/0x10000/' bfd/elf*ppc.c +# LTP sucks +perl -pi -e 's/i\[3-7\]86/i[34567]86/g' */conf* +sed -i -e 's/%''{release}/%{release}/g' bfd/Makefile{.am,.in} +sed -i -e '/^libopcodes_la_\(DEPENDENCIES\|LIBADD\)/s,$, ../bfd/libbfd.la,' opcodes/Makefile.{am,in} +# Build libbfd.so and libopcodes.so with -Bsymbolic-functions if possible. +if gcc %{optflags} -v --help 2>&1 | grep -q -- -Bsymbolic-functions; then +sed -i -e 's/^libbfd_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' bfd/Makefile.{am,in} +sed -i -e 's/^libopcodes_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' opcodes/Makefile.{am,in} +fi +# $PACKAGE is used for the gettext catalog name. +sed -i -e 's/^ PACKAGE=/ PACKAGE=%{?cross}/' */configure +# Undo the name change to run the testsuite. +for tool in binutils gas ld +do + sed -i -e "2aDEJATOOL = $tool" $tool/Makefile.am + sed -i -e "s/^DEJATOOL = .*/DEJATOOL = $tool/" $tool/Makefile.in +done +touch */configure + +%build +echo target is %{binutils_target} +export CFLAGS="$RPM_OPT_FLAGS" +CARGS= + +case %{binutils_target} in i?86*) + CARGS="$CARGS --enable-64-bit-bfd" + ;; +esac + +%if 0%{?_with_debug:1} +CFLAGS="$CFLAGS -O0 -ggdb2" +%define enable_shared 0 +%endif + +# We could optimize the cross builds size by --enable-shared but the produced +# binaries may be less convenient in the embedded environment. +%if %{accelerator_crossbuild} +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" +%endif +%configure \ + --build=%{_target_platform} --host=%{_target_platform} \ + --target=%{binutils_target} \ +%if !%{isnative} +%if !%{accelerator_crossbuild} + --enable-targets=%{_host} \ + --with-sysroot=%{_prefix}/%{binutils_target}/sys-root \ + --program-prefix=%{cross} \ +%else + --with-sysroot=/ \ + --program-prefix="" \ +%endif +%endif +%if %{enable_shared} + --enable-shared \ +%else + --disable-shared \ +%endif + $CARGS \ + --disable-werror \ + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com +make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info + +# Do not use %%check as it is run after %%install where libbfd.so is rebuild +# with -fvisibility=hidden no longer being usable in its shared form. +%if !%{run_testsuite} +echo ====================TESTSUITE DISABLED========================= +%else +make -k check < /dev/null || : +echo ====================TESTING========================= +cat {gas/testsuite/gas,ld/ld,binutils/binutils}.sum +echo ====================TESTING END===================== +for file in {gas/testsuite/gas,ld/ld,binutils/binutils}.{sum,log} +do + ln $file binutils-%{_target_platform}-$(basename $file) || : +done +tar cjf binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log} +uuencode binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}.tar.bz2 +rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log} +%endif + +%install +rm -rf %{buildroot} +make install DESTDIR=%{buildroot} +%if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info + +# Rebuild libiberty.a with -fPIC. +# Future: Remove it together with its header file, projects should bundle it. +make -C libiberty clean +make CFLAGS="-g -fPIC $RPM_OPT_FLAGS" -C libiberty + +# Rebuild libbfd.a with -fPIC. +# Without the hidden visibility the 3rd party shared libraries would export +# the bfd non-stable ABI. +make -C bfd clean +make CFLAGS="-g -fPIC $RPM_OPT_FLAGS -fvisibility=hidden" -C bfd + +install -m 644 bfd/libbfd.a %{buildroot}%{_prefix}/%{_lib} +install -m 644 libiberty/libiberty.a %{buildroot}%{_prefix}/%{_lib} +install -m 644 include/libiberty.h %{buildroot}%{_prefix}/include +# Remove Windows/Novell only man pages +rm -f %{buildroot}%{_mandir}/man1/{dlltool,nlmconv,windres}* + +%if %{enable_shared} +chmod +x %{buildroot}%{_prefix}/%{_lib}/lib*.so* +%endif + +# Prevent programs to link against libbfd and libopcodes dynamically, +# they are changing far too often +rm -f %{buildroot}%{_prefix}/%{_lib}/lib{bfd,opcodes}.so + +# Remove libtool files, which reference the .so libs +rm -f %{buildroot}%{_prefix}/%{_lib}/lib{bfd,opcodes}.la + +%if "%{__isa_bits}" == "64" +# Sanity check --enable-64-bit-bfd really works. +grep '^#define BFD_ARCH_SIZE 64$' %{buildroot}%{_prefix}/include/bfd.h +%endif +# Fix multilib conflicts of generated values by __WORDSIZE-based expressions. +%ifarch %{ix86} x86_64 +sed -i -e '/^#include "ansidecl.h"/{p;s~^.*$~#include ~;}' \ + -e 's/^#define BFD_DEFAULT_TARGET_SIZE \(32\|64\) *$/#define BFD_DEFAULT_TARGET_SIZE __WORDSIZE/' \ + -e 's/^#define BFD_HOST_64BIT_LONG [01] *$/#define BFD_HOST_64BIT_LONG (__WORDSIZE == 64)/' \ + -e 's/^#define BFD_HOST_64_BIT \(long \)\?long *$/#if __WORDSIZE == 32\ +#define BFD_HOST_64_BIT long long\ +#else\ +#define BFD_HOST_64_BIT long\ +#endif/' \ + -e 's/^#define BFD_HOST_U_64_BIT unsigned \(long \)\?long *$/#define BFD_HOST_U_64_BIT unsigned BFD_HOST_64_BIT/' \ + %{buildroot}%{_prefix}/include/bfd.h +%endif +touch -r bfd/bfd-in2.h %{buildroot}%{_prefix}/include/bfd.h + +# Generate .so linker scripts for dependencies; imported from glibc/Makerules: + +# This fragment of linker script gives the OUTPUT_FORMAT statement +# for the configuration we are building. +OUTPUT_FORMAT="\ +/* Ensure this .so library will not be used by a link for a different format + on a multi-architecture system. */ +$(gcc $CFLAGS $LDFLAGS -shared -x c /dev/null -o /dev/null -Wl,--verbose -v 2>&1 | sed -n -f "%{SOURCE2}")" + +tee %{buildroot}%{_prefix}/%{_lib}/libbfd.so <> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif + +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 + +%postun -p /sbin/ldconfig + +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif +%defattr(-,root,root,-) +%doc README +%{_prefix}/bin/* +%{_mandir}/man1/* +%if %{enable_shared} +%{_prefix}/%{_lib}/lib*.so +%exclude %{_prefix}/%{_lib}/libbfd.so +%exclude %{_prefix}/%{_lib}/libopcodes.so +%endif +%if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* + +%files devel +%defattr(-,root,root,-) +%{_prefix}/include/* +%{_prefix}/%{_lib}/libbfd.so +%{_prefix}/%{_lib}/libopcodes.so +%{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* +%endif # %{isnative} + +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-armv7hl-binutils-accel.spec b/packaging/cross-armv7hl-binutils-accel.spec index f19b6e3..1ed52c8 100644 --- a/packaging/cross-armv7hl-binutils-accel.spec +++ b/packaging/cross-armv7hl-binutils-accel.spec @@ -3,57 +3,56 @@ %define enable_shared 1 %define run_testsuite 0 %define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif Summary: A GNU collection of binary utilities -Name: cross-armv7hl-binutils-accel -Version: 2.21.51.20110421 -Release: 5 +Name: cross-armv7hl-binutils-accel-%{!?x64:x86}%{?x64} +Version: 2.22 +Release: 1.21.Mer License: GPLv3+ Group: Development/Tools URL: http://sources.redhat.com/binutils -Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.gz +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 Source2: binutils-2.19.50.0.1-output-format.sed Source100: baselibs.conf Source200: precheckin.sh Source201: README.PACKAGER -Patch1: 001_ld_makefile_patch.patch -Patch2: 006_better_file_error.patch -Patch3: 012_check_ldrunpath_length.patch -Patch4: 013_bash_in_ld_testsuite.patch -Patch5: 127_x86_64_i386_biarch.patch -Patch6: 128_build_id.patch -Patch7: 129_ld_mulitarch_dirs.patch -Patch8: 130_gold_disable_testsuite_build.patch -Patch9: 131_ld_bootstrap_testsuite.patch -Patch10: 134_gold_no_spu.patch -Patch11: 135_bfd_version.patch -Patch12: 140_pr10340.patch -Patch13: 156_pr10144.patch -Patch14: 157_ar_scripts_with_tilde.patch -Patch15: 158_ld_system_root.patch -Patch16: 159_gas-i8775.diff -Patch17: 160_gas_pr12698.diff -Patch18: 161_ar_delete_members.diff -Patch19: 162_pr12730.diff -Patch20: 162_ld_cortex_a8_erratum.diff -Patch21: 163_pr12726.diff -Patch22: 200_pr12715.diff -Patch23: 201_pr12778.diff -Patch24: Fix-gold-libopcode.patch -Patch25: Disable-info.patch +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch %if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" %define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif %define _prefix /opt/cross %define enable_shared 0 %define isnative 0 %define run_testsuite 0 %define cross %{binutils_target}- # single target atm. -ExclusiveArch: %ix86 -# special handling for ARM build acceleration -%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)/\\1/")" == "accel" -%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel/\\1/")-tizen-linux-gnueabi +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi %define _prefix /usr %define cross "" %define accelerator_crossbuild 1 @@ -62,17 +61,16 @@ AutoReqProv: 0 %endif %endif -#BuildRequires: gettext -BuildRequires: flex -BuildRequires: bison -BuildRequires: zlib-devel -BuildRequires: elfutils-libelf-devel +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel # Required for: ld-bootstrap/bootstrap.exp bootstrap with --static # It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array %if %{run_testsuite} BuildRequires: dejagnu, zlib-static, glibc-static, sharutils %endif +BuildRequires: elfutils-libelf-devel Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info # On ARM EABI systems, we do want -gnueabi to be part of the # target triple. @@ -97,6 +95,8 @@ converting addresses to file and line). Summary: BFD and opcodes static libraries and header files Group: System/Libraries Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info Requires: zlib-devel %description devel @@ -107,32 +107,22 @@ to consider using libelf instead of BFD. %prep %setup -q -n binutils-%{version} -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 -%patch4 -p1 -%patch5 -p1 -%patch6 -p1 -%patch7 -p1 -%patch8 -p1 -%patch9 -p1 -%patch10 -p1 -%patch11 -p1 -%patch12 -p1 -%patch13 -p1 -%patch14 -p1 -%patch15 -p1 +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 %patch16 -p1 %patch17 -p1 -%patch18 -p1 -%patch19 -p1 -%patch20 -p1 -%patch21 -p1 -%patch22 -p1 -%patch23 -p1 -%patch24 -p1 -%patch25 -p1 - # We cannot run autotools as there is an exact requirement of autoconf-2.59. @@ -175,7 +165,7 @@ CFLAGS="$CFLAGS -O0 -ggdb2" # We could optimize the cross builds size by --enable-shared but the produced # binaries may be less convenient in the embedded environment. %if %{accelerator_crossbuild} -export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib:/usr/lib:/lib" +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" %endif %configure \ --build=%{_target_platform} --host=%{_target_platform} \ @@ -196,13 +186,16 @@ export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib: --disable-shared \ %endif $CARGS \ - --enable-plugins \ --disable-werror \ - --enable-ld=default \ - --disable-info \ - --enable-gold - + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info # Do not use %%check as it is run after %%install where libbfd.so is rebuild # with -fvisibility=hidden no longer being usable in its shared form. @@ -226,6 +219,7 @@ rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,l rm -rf %{buildroot} make install DESTDIR=%{buildroot} %if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info # Rebuild libiberty.a with -fPIC. # Future: Remove it together with its header file, projects should bundle it. @@ -301,6 +295,8 @@ INPUT ( %{_libdir}/libopcodes.a -lbfd ) EOH %else # !%{isnative} +# For cross-binutils we drop the documentation. +rm -rf %{buildroot}%{_infodir} # We keep these as one can have native + cross binutils of different versions. #rm -rf %{buildroot}%{_prefix}/share/locale #rm -rf %{buildroot}%{_mandir} @@ -311,15 +307,68 @@ rm -rf %{buildroot}%{_prefix}/%{_lib}/libiberty.a rm -f %{buildroot}%{_infodir}/dir rm -rf %{buildroot}%{_prefix}/%{binutils_target} -# As gas/README points out (search for --enable-targets), -# multi-arch gas is not ready yet. -rm -rf %{buildroot}%{_libdir}/ldscripts +%if !%{disable_nls} +%find_lang %{?cross}binutils +%find_lang %{?cross}opcodes +%find_lang %{?cross}bfd +%find_lang %{?cross}gas +%find_lang %{?cross}ld +%find_lang %{?cross}gprof +cat %{?cross}opcodes.lang >> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 %postun -p /sbin/ldconfig -%files +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif %defattr(-,root,root,-) +%doc README %{_prefix}/bin/* %{_mandir}/man1/* %if %{enable_shared} @@ -328,6 +377,8 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %exclude %{_prefix}/%{_lib}/libopcodes.so %endif %if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* %files devel %defattr(-,root,root,-) @@ -335,5 +386,60 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %{_prefix}/%{_lib}/libbfd.so %{_prefix}/%{_lib}/libopcodes.so %{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* %endif # %{isnative} +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-armv7hl-binutils.spec b/packaging/cross-armv7hl-binutils.spec index c5c0f9b..b49af18 100644 --- a/packaging/cross-armv7hl-binutils.spec +++ b/packaging/cross-armv7hl-binutils.spec @@ -3,57 +3,56 @@ %define enable_shared 1 %define run_testsuite 0 %define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif Summary: A GNU collection of binary utilities Name: cross-armv7hl-binutils -Version: 2.21.51.20110421 -Release: 5 +Version: 2.22 +Release: 1.21.Mer License: GPLv3+ Group: Development/Tools URL: http://sources.redhat.com/binutils -Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.gz +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 Source2: binutils-2.19.50.0.1-output-format.sed Source100: baselibs.conf Source200: precheckin.sh Source201: README.PACKAGER -Patch1: 001_ld_makefile_patch.patch -Patch2: 006_better_file_error.patch -Patch3: 012_check_ldrunpath_length.patch -Patch4: 013_bash_in_ld_testsuite.patch -Patch5: 127_x86_64_i386_biarch.patch -Patch6: 128_build_id.patch -Patch7: 129_ld_mulitarch_dirs.patch -Patch8: 130_gold_disable_testsuite_build.patch -Patch9: 131_ld_bootstrap_testsuite.patch -Patch10: 134_gold_no_spu.patch -Patch11: 135_bfd_version.patch -Patch12: 140_pr10340.patch -Patch13: 156_pr10144.patch -Patch14: 157_ar_scripts_with_tilde.patch -Patch15: 158_ld_system_root.patch -Patch16: 159_gas-i8775.diff -Patch17: 160_gas_pr12698.diff -Patch18: 161_ar_delete_members.diff -Patch19: 162_pr12730.diff -Patch20: 162_ld_cortex_a8_erratum.diff -Patch21: 163_pr12726.diff -Patch22: 200_pr12715.diff -Patch23: 201_pr12778.diff -Patch24: Fix-gold-libopcode.patch -Patch25: Disable-info.patch +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch %if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" %define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif %define _prefix /opt/cross %define enable_shared 0 %define isnative 0 %define run_testsuite 0 %define cross %{binutils_target}- # single target atm. -ExclusiveArch: %ix86 -# special handling for ARM build acceleration -%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)/\\1/")" == "accel" -%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel/\\1/")-tizen-linux-gnueabi +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi %define _prefix /usr %define cross "" %define accelerator_crossbuild 1 @@ -62,17 +61,16 @@ AutoReqProv: 0 %endif %endif -#BuildRequires: gettext -BuildRequires: flex -BuildRequires: bison -BuildRequires: zlib-devel -BuildRequires: elfutils-libelf-devel +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel # Required for: ld-bootstrap/bootstrap.exp bootstrap with --static # It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array %if %{run_testsuite} BuildRequires: dejagnu, zlib-static, glibc-static, sharutils %endif +BuildRequires: elfutils-libelf-devel Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info # On ARM EABI systems, we do want -gnueabi to be part of the # target triple. @@ -97,6 +95,8 @@ converting addresses to file and line). Summary: BFD and opcodes static libraries and header files Group: System/Libraries Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info Requires: zlib-devel %description devel @@ -107,32 +107,22 @@ to consider using libelf instead of BFD. %prep %setup -q -n binutils-%{version} -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 -%patch4 -p1 -%patch5 -p1 -%patch6 -p1 -%patch7 -p1 -%patch8 -p1 -%patch9 -p1 -%patch10 -p1 -%patch11 -p1 -%patch12 -p1 -%patch13 -p1 -%patch14 -p1 -%patch15 -p1 +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 %patch16 -p1 %patch17 -p1 -%patch18 -p1 -%patch19 -p1 -%patch20 -p1 -%patch21 -p1 -%patch22 -p1 -%patch23 -p1 -%patch24 -p1 -%patch25 -p1 - # We cannot run autotools as there is an exact requirement of autoconf-2.59. @@ -175,7 +165,7 @@ CFLAGS="$CFLAGS -O0 -ggdb2" # We could optimize the cross builds size by --enable-shared but the produced # binaries may be less convenient in the embedded environment. %if %{accelerator_crossbuild} -export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib:/usr/lib:/lib" +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" %endif %configure \ --build=%{_target_platform} --host=%{_target_platform} \ @@ -196,13 +186,16 @@ export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib: --disable-shared \ %endif $CARGS \ - --enable-plugins \ --disable-werror \ - --enable-ld=default \ - --disable-info \ - --enable-gold - + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info # Do not use %%check as it is run after %%install where libbfd.so is rebuild # with -fvisibility=hidden no longer being usable in its shared form. @@ -226,6 +219,7 @@ rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,l rm -rf %{buildroot} make install DESTDIR=%{buildroot} %if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info # Rebuild libiberty.a with -fPIC. # Future: Remove it together with its header file, projects should bundle it. @@ -301,6 +295,8 @@ INPUT ( %{_libdir}/libopcodes.a -lbfd ) EOH %else # !%{isnative} +# For cross-binutils we drop the documentation. +rm -rf %{buildroot}%{_infodir} # We keep these as one can have native + cross binutils of different versions. #rm -rf %{buildroot}%{_prefix}/share/locale #rm -rf %{buildroot}%{_mandir} @@ -311,15 +307,68 @@ rm -rf %{buildroot}%{_prefix}/%{_lib}/libiberty.a rm -f %{buildroot}%{_infodir}/dir rm -rf %{buildroot}%{_prefix}/%{binutils_target} -# As gas/README points out (search for --enable-targets), -# multi-arch gas is not ready yet. -rm -rf %{buildroot}%{_libdir}/ldscripts +%if !%{disable_nls} +%find_lang %{?cross}binutils +%find_lang %{?cross}opcodes +%find_lang %{?cross}bfd +%find_lang %{?cross}gas +%find_lang %{?cross}ld +%find_lang %{?cross}gprof +cat %{?cross}opcodes.lang >> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 %postun -p /sbin/ldconfig -%files +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif %defattr(-,root,root,-) +%doc README %{_prefix}/bin/* %{_mandir}/man1/* %if %{enable_shared} @@ -328,6 +377,8 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %exclude %{_prefix}/%{_lib}/libopcodes.so %endif %if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* %files devel %defattr(-,root,root,-) @@ -335,5 +386,60 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %{_prefix}/%{_lib}/libbfd.so %{_prefix}/%{_lib}/libopcodes.so %{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* %endif # %{isnative} +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-armv7l-binutils-accel.spec b/packaging/cross-armv7l-binutils-accel.spec index e69de29..190067e 100644 --- a/packaging/cross-armv7l-binutils-accel.spec +++ b/packaging/cross-armv7l-binutils-accel.spec @@ -0,0 +1,445 @@ +%define binutils_target %{_target_platform} +%define isnative 1 +%define enable_shared 1 +%define run_testsuite 0 +%define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif + +Summary: A GNU collection of binary utilities +Name: cross-armv7l-binutils-accel-%{!?x64:x86}%{?x64} +Version: 2.22 +Release: 1.21.Mer +License: GPLv3+ +Group: Development/Tools +URL: http://sources.redhat.com/binutils +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 +Source2: binutils-2.19.50.0.1-output-format.sed +Source100: baselibs.conf +Source200: precheckin.sh +Source201: README.PACKAGER +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch + +%if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif +%define _prefix /opt/cross +%define enable_shared 0 +%define isnative 0 +%define run_testsuite 0 +%define cross %{binutils_target}- +# single target atm. +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi +%define _prefix /usr +%define cross "" +%define accelerator_crossbuild 1 +AutoReqProv: 0 +%define _build_name_fmt %%{ARCH}/%%{NAME}-%%{VERSION}-%%{RELEASE}.%%{ARCH}.dontuse.rpm +%endif +%endif + +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel +# Required for: ld-bootstrap/bootstrap.exp bootstrap with --static +# It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array +%if %{run_testsuite} +BuildRequires: dejagnu, zlib-static, glibc-static, sharutils +%endif +BuildRequires: elfutils-libelf-devel +Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info + +# On ARM EABI systems, we do want -gnueabi to be part of the +# target triple. +%ifnarch %{arm} +%define _gnu %{nil} +%endif + +%description +Binutils is a collection of binary utilities, including ar (for +creating, modifying and extracting from archives), as (a family of GNU +assemblers), gprof (for displaying call graph profile data), ld (the +GNU linker), nm (for listing symbols from object files), objcopy (for +copying and translating object files), objdump (for displaying +information from object files), ranlib (for generating an index for +the contents of an archive), readelf (for displaying detailed +information about binary files), size (for listing the section sizes +of an object or archive file), strings (for listing printable strings +from files), strip (for discarding symbols), and addr2line (for +converting addresses to file and line). + +%package devel +Summary: BFD and opcodes static libraries and header files +Group: System/Libraries +Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info +Requires: zlib-devel + +%description devel +This package contains BFD and opcodes static libraries and associated +header files. Only *.a libraries are included, because BFD doesn't +have a stable ABI. Developers starting new projects are strongly encouraged +to consider using libelf instead of BFD. + +%prep +%setup -q -n binutils-%{version} +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 +%patch16 -p1 +%patch17 -p1 + +# We cannot run autotools as there is an exact requirement of autoconf-2.59. + +# On ppc64 we might use 64KiB pages +sed -i -e '/#define.*ELF_COMMONPAGESIZE/s/0x1000$/0x10000/' bfd/elf*ppc.c +# LTP sucks +perl -pi -e 's/i\[3-7\]86/i[34567]86/g' */conf* +sed -i -e 's/%''{release}/%{release}/g' bfd/Makefile{.am,.in} +sed -i -e '/^libopcodes_la_\(DEPENDENCIES\|LIBADD\)/s,$, ../bfd/libbfd.la,' opcodes/Makefile.{am,in} +# Build libbfd.so and libopcodes.so with -Bsymbolic-functions if possible. +if gcc %{optflags} -v --help 2>&1 | grep -q -- -Bsymbolic-functions; then +sed -i -e 's/^libbfd_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' bfd/Makefile.{am,in} +sed -i -e 's/^libopcodes_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' opcodes/Makefile.{am,in} +fi +# $PACKAGE is used for the gettext catalog name. +sed -i -e 's/^ PACKAGE=/ PACKAGE=%{?cross}/' */configure +# Undo the name change to run the testsuite. +for tool in binutils gas ld +do + sed -i -e "2aDEJATOOL = $tool" $tool/Makefile.am + sed -i -e "s/^DEJATOOL = .*/DEJATOOL = $tool/" $tool/Makefile.in +done +touch */configure + +%build +echo target is %{binutils_target} +export CFLAGS="$RPM_OPT_FLAGS" +CARGS= + +case %{binutils_target} in i?86*) + CARGS="$CARGS --enable-64-bit-bfd" + ;; +esac + +%if 0%{?_with_debug:1} +CFLAGS="$CFLAGS -O0 -ggdb2" +%define enable_shared 0 +%endif + +# We could optimize the cross builds size by --enable-shared but the produced +# binaries may be less convenient in the embedded environment. +%if %{accelerator_crossbuild} +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" +%endif +%configure \ + --build=%{_target_platform} --host=%{_target_platform} \ + --target=%{binutils_target} \ +%if !%{isnative} +%if !%{accelerator_crossbuild} + --enable-targets=%{_host} \ + --with-sysroot=%{_prefix}/%{binutils_target}/sys-root \ + --program-prefix=%{cross} \ +%else + --with-sysroot=/ \ + --program-prefix="" \ +%endif +%endif +%if %{enable_shared} + --enable-shared \ +%else + --disable-shared \ +%endif + $CARGS \ + --disable-werror \ + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com +make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info + +# Do not use %%check as it is run after %%install where libbfd.so is rebuild +# with -fvisibility=hidden no longer being usable in its shared form. +%if !%{run_testsuite} +echo ====================TESTSUITE DISABLED========================= +%else +make -k check < /dev/null || : +echo ====================TESTING========================= +cat {gas/testsuite/gas,ld/ld,binutils/binutils}.sum +echo ====================TESTING END===================== +for file in {gas/testsuite/gas,ld/ld,binutils/binutils}.{sum,log} +do + ln $file binutils-%{_target_platform}-$(basename $file) || : +done +tar cjf binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log} +uuencode binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}.tar.bz2 +rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log} +%endif + +%install +rm -rf %{buildroot} +make install DESTDIR=%{buildroot} +%if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info + +# Rebuild libiberty.a with -fPIC. +# Future: Remove it together with its header file, projects should bundle it. +make -C libiberty clean +make CFLAGS="-g -fPIC $RPM_OPT_FLAGS" -C libiberty + +# Rebuild libbfd.a with -fPIC. +# Without the hidden visibility the 3rd party shared libraries would export +# the bfd non-stable ABI. +make -C bfd clean +make CFLAGS="-g -fPIC $RPM_OPT_FLAGS -fvisibility=hidden" -C bfd + +install -m 644 bfd/libbfd.a %{buildroot}%{_prefix}/%{_lib} +install -m 644 libiberty/libiberty.a %{buildroot}%{_prefix}/%{_lib} +install -m 644 include/libiberty.h %{buildroot}%{_prefix}/include +# Remove Windows/Novell only man pages +rm -f %{buildroot}%{_mandir}/man1/{dlltool,nlmconv,windres}* + +%if %{enable_shared} +chmod +x %{buildroot}%{_prefix}/%{_lib}/lib*.so* +%endif + +# Prevent programs to link against libbfd and libopcodes dynamically, +# they are changing far too often +rm -f %{buildroot}%{_prefix}/%{_lib}/lib{bfd,opcodes}.so + +# Remove libtool files, which reference the .so libs +rm -f %{buildroot}%{_prefix}/%{_lib}/lib{bfd,opcodes}.la + +%if "%{__isa_bits}" == "64" +# Sanity check --enable-64-bit-bfd really works. +grep '^#define BFD_ARCH_SIZE 64$' %{buildroot}%{_prefix}/include/bfd.h +%endif +# Fix multilib conflicts of generated values by __WORDSIZE-based expressions. +%ifarch %{ix86} x86_64 +sed -i -e '/^#include "ansidecl.h"/{p;s~^.*$~#include ~;}' \ + -e 's/^#define BFD_DEFAULT_TARGET_SIZE \(32\|64\) *$/#define BFD_DEFAULT_TARGET_SIZE __WORDSIZE/' \ + -e 's/^#define BFD_HOST_64BIT_LONG [01] *$/#define BFD_HOST_64BIT_LONG (__WORDSIZE == 64)/' \ + -e 's/^#define BFD_HOST_64_BIT \(long \)\?long *$/#if __WORDSIZE == 32\ +#define BFD_HOST_64_BIT long long\ +#else\ +#define BFD_HOST_64_BIT long\ +#endif/' \ + -e 's/^#define BFD_HOST_U_64_BIT unsigned \(long \)\?long *$/#define BFD_HOST_U_64_BIT unsigned BFD_HOST_64_BIT/' \ + %{buildroot}%{_prefix}/include/bfd.h +%endif +touch -r bfd/bfd-in2.h %{buildroot}%{_prefix}/include/bfd.h + +# Generate .so linker scripts for dependencies; imported from glibc/Makerules: + +# This fragment of linker script gives the OUTPUT_FORMAT statement +# for the configuration we are building. +OUTPUT_FORMAT="\ +/* Ensure this .so library will not be used by a link for a different format + on a multi-architecture system. */ +$(gcc $CFLAGS $LDFLAGS -shared -x c /dev/null -o /dev/null -Wl,--verbose -v 2>&1 | sed -n -f "%{SOURCE2}")" + +tee %{buildroot}%{_prefix}/%{_lib}/libbfd.so <> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif + +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 + +%postun -p /sbin/ldconfig + +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif +%defattr(-,root,root,-) +%doc README +%{_prefix}/bin/* +%{_mandir}/man1/* +%if %{enable_shared} +%{_prefix}/%{_lib}/lib*.so +%exclude %{_prefix}/%{_lib}/libbfd.so +%exclude %{_prefix}/%{_lib}/libopcodes.so +%endif +%if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* + +%files devel +%defattr(-,root,root,-) +%{_prefix}/include/* +%{_prefix}/%{_lib}/libbfd.so +%{_prefix}/%{_lib}/libopcodes.so +%{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* +%endif # %{isnative} + +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-armv7l-binutils.spec b/packaging/cross-armv7l-binutils.spec index 0d5db8d..4b23869 100644 --- a/packaging/cross-armv7l-binutils.spec +++ b/packaging/cross-armv7l-binutils.spec @@ -3,57 +3,56 @@ %define enable_shared 1 %define run_testsuite 0 %define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif Summary: A GNU collection of binary utilities Name: cross-armv7l-binutils -Version: 2.21.51.20110421 -Release: 5 +Version: 2.22 +Release: 1.21.Mer License: GPLv3+ Group: Development/Tools URL: http://sources.redhat.com/binutils -Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.gz +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 Source2: binutils-2.19.50.0.1-output-format.sed Source100: baselibs.conf Source200: precheckin.sh Source201: README.PACKAGER -Patch1: 001_ld_makefile_patch.patch -Patch2: 006_better_file_error.patch -Patch3: 012_check_ldrunpath_length.patch -Patch4: 013_bash_in_ld_testsuite.patch -Patch5: 127_x86_64_i386_biarch.patch -Patch6: 128_build_id.patch -Patch7: 129_ld_mulitarch_dirs.patch -Patch8: 130_gold_disable_testsuite_build.patch -Patch9: 131_ld_bootstrap_testsuite.patch -Patch10: 134_gold_no_spu.patch -Patch11: 135_bfd_version.patch -Patch12: 140_pr10340.patch -Patch13: 156_pr10144.patch -Patch14: 157_ar_scripts_with_tilde.patch -Patch15: 158_ld_system_root.patch -Patch16: 159_gas-i8775.diff -Patch17: 160_gas_pr12698.diff -Patch18: 161_ar_delete_members.diff -Patch19: 162_pr12730.diff -Patch20: 162_ld_cortex_a8_erratum.diff -Patch21: 163_pr12726.diff -Patch22: 200_pr12715.diff -Patch23: 201_pr12778.diff -Patch24: Fix-gold-libopcode.patch -Patch25: Disable-info.patch +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch %if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" %define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif %define _prefix /opt/cross %define enable_shared 0 %define isnative 0 %define run_testsuite 0 %define cross %{binutils_target}- # single target atm. -ExclusiveArch: %ix86 -# special handling for ARM build acceleration -%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)/\\1/")" == "accel" -%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel/\\1/")-tizen-linux-gnueabi +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi %define _prefix /usr %define cross "" %define accelerator_crossbuild 1 @@ -62,17 +61,16 @@ AutoReqProv: 0 %endif %endif -#BuildRequires: gettext -BuildRequires: flex -BuildRequires: bison -BuildRequires: zlib-devel -BuildRequires: elfutils-libelf-devel +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel # Required for: ld-bootstrap/bootstrap.exp bootstrap with --static # It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array %if %{run_testsuite} BuildRequires: dejagnu, zlib-static, glibc-static, sharutils %endif +BuildRequires: elfutils-libelf-devel Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info # On ARM EABI systems, we do want -gnueabi to be part of the # target triple. @@ -97,6 +95,8 @@ converting addresses to file and line). Summary: BFD and opcodes static libraries and header files Group: System/Libraries Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info Requires: zlib-devel %description devel @@ -107,32 +107,22 @@ to consider using libelf instead of BFD. %prep %setup -q -n binutils-%{version} -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 -%patch4 -p1 -%patch5 -p1 -%patch6 -p1 -%patch7 -p1 -%patch8 -p1 -%patch9 -p1 -%patch10 -p1 -%patch11 -p1 -%patch12 -p1 -%patch13 -p1 -%patch14 -p1 -%patch15 -p1 +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 %patch16 -p1 %patch17 -p1 -%patch18 -p1 -%patch19 -p1 -%patch20 -p1 -%patch21 -p1 -%patch22 -p1 -%patch23 -p1 -%patch24 -p1 -%patch25 -p1 - # We cannot run autotools as there is an exact requirement of autoconf-2.59. @@ -175,7 +165,7 @@ CFLAGS="$CFLAGS -O0 -ggdb2" # We could optimize the cross builds size by --enable-shared but the produced # binaries may be less convenient in the embedded environment. %if %{accelerator_crossbuild} -export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib:/usr/lib:/lib" +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" %endif %configure \ --build=%{_target_platform} --host=%{_target_platform} \ @@ -196,13 +186,16 @@ export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib: --disable-shared \ %endif $CARGS \ - --enable-plugins \ --disable-werror \ - --enable-ld=default \ - --disable-info \ - --enable-gold - + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info # Do not use %%check as it is run after %%install where libbfd.so is rebuild # with -fvisibility=hidden no longer being usable in its shared form. @@ -226,6 +219,7 @@ rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,l rm -rf %{buildroot} make install DESTDIR=%{buildroot} %if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info # Rebuild libiberty.a with -fPIC. # Future: Remove it together with its header file, projects should bundle it. @@ -301,6 +295,8 @@ INPUT ( %{_libdir}/libopcodes.a -lbfd ) EOH %else # !%{isnative} +# For cross-binutils we drop the documentation. +rm -rf %{buildroot}%{_infodir} # We keep these as one can have native + cross binutils of different versions. #rm -rf %{buildroot}%{_prefix}/share/locale #rm -rf %{buildroot}%{_mandir} @@ -311,15 +307,68 @@ rm -rf %{buildroot}%{_prefix}/%{_lib}/libiberty.a rm -f %{buildroot}%{_infodir}/dir rm -rf %{buildroot}%{_prefix}/%{binutils_target} -# As gas/README points out (search for --enable-targets), -# multi-arch gas is not ready yet. -rm -rf %{buildroot}%{_libdir}/ldscripts +%if !%{disable_nls} +%find_lang %{?cross}binutils +%find_lang %{?cross}opcodes +%find_lang %{?cross}bfd +%find_lang %{?cross}gas +%find_lang %{?cross}ld +%find_lang %{?cross}gprof +cat %{?cross}opcodes.lang >> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 %postun -p /sbin/ldconfig -%files +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif %defattr(-,root,root,-) +%doc README %{_prefix}/bin/* %{_mandir}/man1/* %if %{enable_shared} @@ -328,6 +377,8 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %exclude %{_prefix}/%{_lib}/libopcodes.so %endif %if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* %files devel %defattr(-,root,root,-) @@ -335,5 +386,60 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %{_prefix}/%{_lib}/libbfd.so %{_prefix}/%{_lib}/libopcodes.so %{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* %endif # %{isnative} +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-armv7nhl-binutils-accel.spec b/packaging/cross-armv7nhl-binutils-accel.spec index 556880d..b75bab8 100644 --- a/packaging/cross-armv7nhl-binutils-accel.spec +++ b/packaging/cross-armv7nhl-binutils-accel.spec @@ -3,57 +3,56 @@ %define enable_shared 1 %define run_testsuite 0 %define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif Summary: A GNU collection of binary utilities -Name: cross-armv7nhl-binutils-accel -Version: 2.21.51.20110421 -Release: 5 +Name: cross-armv7nhl-binutils-accel-%{!?x64:x86}%{?x64} +Version: 2.22 +Release: 1.21.Mer License: GPLv3+ Group: Development/Tools URL: http://sources.redhat.com/binutils -Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.gz +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 Source2: binutils-2.19.50.0.1-output-format.sed Source100: baselibs.conf Source200: precheckin.sh Source201: README.PACKAGER -Patch1: 001_ld_makefile_patch.patch -Patch2: 006_better_file_error.patch -Patch3: 012_check_ldrunpath_length.patch -Patch4: 013_bash_in_ld_testsuite.patch -Patch5: 127_x86_64_i386_biarch.patch -Patch6: 128_build_id.patch -Patch7: 129_ld_mulitarch_dirs.patch -Patch8: 130_gold_disable_testsuite_build.patch -Patch9: 131_ld_bootstrap_testsuite.patch -Patch10: 134_gold_no_spu.patch -Patch11: 135_bfd_version.patch -Patch12: 140_pr10340.patch -Patch13: 156_pr10144.patch -Patch14: 157_ar_scripts_with_tilde.patch -Patch15: 158_ld_system_root.patch -Patch16: 159_gas-i8775.diff -Patch17: 160_gas_pr12698.diff -Patch18: 161_ar_delete_members.diff -Patch19: 162_pr12730.diff -Patch20: 162_ld_cortex_a8_erratum.diff -Patch21: 163_pr12726.diff -Patch22: 200_pr12715.diff -Patch23: 201_pr12778.diff -Patch24: Fix-gold-libopcode.patch -Patch25: Disable-info.patch +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch %if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" %define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif %define _prefix /opt/cross %define enable_shared 0 %define isnative 0 %define run_testsuite 0 %define cross %{binutils_target}- # single target atm. -ExclusiveArch: %ix86 -# special handling for ARM build acceleration -%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)/\\1/")" == "accel" -%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel/\\1/")-tizen-linux-gnueabi +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi %define _prefix /usr %define cross "" %define accelerator_crossbuild 1 @@ -62,17 +61,16 @@ AutoReqProv: 0 %endif %endif -#BuildRequires: gettext -BuildRequires: flex -BuildRequires: bison -BuildRequires: zlib-devel -BuildRequires: elfutils-libelf-devel +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel # Required for: ld-bootstrap/bootstrap.exp bootstrap with --static # It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array %if %{run_testsuite} BuildRequires: dejagnu, zlib-static, glibc-static, sharutils %endif +BuildRequires: elfutils-libelf-devel Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info # On ARM EABI systems, we do want -gnueabi to be part of the # target triple. @@ -97,6 +95,8 @@ converting addresses to file and line). Summary: BFD and opcodes static libraries and header files Group: System/Libraries Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info Requires: zlib-devel %description devel @@ -107,32 +107,22 @@ to consider using libelf instead of BFD. %prep %setup -q -n binutils-%{version} -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 -%patch4 -p1 -%patch5 -p1 -%patch6 -p1 -%patch7 -p1 -%patch8 -p1 -%patch9 -p1 -%patch10 -p1 -%patch11 -p1 -%patch12 -p1 -%patch13 -p1 -%patch14 -p1 -%patch15 -p1 +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 %patch16 -p1 %patch17 -p1 -%patch18 -p1 -%patch19 -p1 -%patch20 -p1 -%patch21 -p1 -%patch22 -p1 -%patch23 -p1 -%patch24 -p1 -%patch25 -p1 - # We cannot run autotools as there is an exact requirement of autoconf-2.59. @@ -175,7 +165,7 @@ CFLAGS="$CFLAGS -O0 -ggdb2" # We could optimize the cross builds size by --enable-shared but the produced # binaries may be less convenient in the embedded environment. %if %{accelerator_crossbuild} -export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib:/usr/lib:/lib" +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" %endif %configure \ --build=%{_target_platform} --host=%{_target_platform} \ @@ -196,13 +186,16 @@ export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib: --disable-shared \ %endif $CARGS \ - --enable-plugins \ --disable-werror \ - --enable-ld=default \ - --disable-info \ - --enable-gold - + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info # Do not use %%check as it is run after %%install where libbfd.so is rebuild # with -fvisibility=hidden no longer being usable in its shared form. @@ -226,6 +219,7 @@ rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,l rm -rf %{buildroot} make install DESTDIR=%{buildroot} %if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info # Rebuild libiberty.a with -fPIC. # Future: Remove it together with its header file, projects should bundle it. @@ -301,6 +295,8 @@ INPUT ( %{_libdir}/libopcodes.a -lbfd ) EOH %else # !%{isnative} +# For cross-binutils we drop the documentation. +rm -rf %{buildroot}%{_infodir} # We keep these as one can have native + cross binutils of different versions. #rm -rf %{buildroot}%{_prefix}/share/locale #rm -rf %{buildroot}%{_mandir} @@ -311,15 +307,68 @@ rm -rf %{buildroot}%{_prefix}/%{_lib}/libiberty.a rm -f %{buildroot}%{_infodir}/dir rm -rf %{buildroot}%{_prefix}/%{binutils_target} -# As gas/README points out (search for --enable-targets), -# multi-arch gas is not ready yet. -rm -rf %{buildroot}%{_libdir}/ldscripts +%if !%{disable_nls} +%find_lang %{?cross}binutils +%find_lang %{?cross}opcodes +%find_lang %{?cross}bfd +%find_lang %{?cross}gas +%find_lang %{?cross}ld +%find_lang %{?cross}gprof +cat %{?cross}opcodes.lang >> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 %postun -p /sbin/ldconfig -%files +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif %defattr(-,root,root,-) +%doc README %{_prefix}/bin/* %{_mandir}/man1/* %if %{enable_shared} @@ -328,6 +377,8 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %exclude %{_prefix}/%{_lib}/libopcodes.so %endif %if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* %files devel %defattr(-,root,root,-) @@ -335,5 +386,60 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %{_prefix}/%{_lib}/libbfd.so %{_prefix}/%{_lib}/libopcodes.so %{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* %endif # %{isnative} +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-armv7nhl-binutils.spec b/packaging/cross-armv7nhl-binutils.spec index 9ecc063..af73e99 100644 --- a/packaging/cross-armv7nhl-binutils.spec +++ b/packaging/cross-armv7nhl-binutils.spec @@ -3,57 +3,56 @@ %define enable_shared 1 %define run_testsuite 0 %define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif Summary: A GNU collection of binary utilities Name: cross-armv7nhl-binutils -Version: 2.21.51.20110421 -Release: 5 +Version: 2.22 +Release: 1.21.Mer License: GPLv3+ Group: Development/Tools URL: http://sources.redhat.com/binutils -Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.gz +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 Source2: binutils-2.19.50.0.1-output-format.sed Source100: baselibs.conf Source200: precheckin.sh Source201: README.PACKAGER -Patch1: 001_ld_makefile_patch.patch -Patch2: 006_better_file_error.patch -Patch3: 012_check_ldrunpath_length.patch -Patch4: 013_bash_in_ld_testsuite.patch -Patch5: 127_x86_64_i386_biarch.patch -Patch6: 128_build_id.patch -Patch7: 129_ld_mulitarch_dirs.patch -Patch8: 130_gold_disable_testsuite_build.patch -Patch9: 131_ld_bootstrap_testsuite.patch -Patch10: 134_gold_no_spu.patch -Patch11: 135_bfd_version.patch -Patch12: 140_pr10340.patch -Patch13: 156_pr10144.patch -Patch14: 157_ar_scripts_with_tilde.patch -Patch15: 158_ld_system_root.patch -Patch16: 159_gas-i8775.diff -Patch17: 160_gas_pr12698.diff -Patch18: 161_ar_delete_members.diff -Patch19: 162_pr12730.diff -Patch20: 162_ld_cortex_a8_erratum.diff -Patch21: 163_pr12726.diff -Patch22: 200_pr12715.diff -Patch23: 201_pr12778.diff -Patch24: Fix-gold-libopcode.patch -Patch25: Disable-info.patch +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch %if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" %define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif %define _prefix /opt/cross %define enable_shared 0 %define isnative 0 %define run_testsuite 0 %define cross %{binutils_target}- # single target atm. -ExclusiveArch: %ix86 -# special handling for ARM build acceleration -%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)/\\1/")" == "accel" -%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel/\\1/")-tizen-linux-gnueabi +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi %define _prefix /usr %define cross "" %define accelerator_crossbuild 1 @@ -62,17 +61,16 @@ AutoReqProv: 0 %endif %endif -#BuildRequires: gettext -BuildRequires: flex -BuildRequires: bison -BuildRequires: zlib-devel -BuildRequires: elfutils-libelf-devel +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel # Required for: ld-bootstrap/bootstrap.exp bootstrap with --static # It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array %if %{run_testsuite} BuildRequires: dejagnu, zlib-static, glibc-static, sharutils %endif +BuildRequires: elfutils-libelf-devel Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info # On ARM EABI systems, we do want -gnueabi to be part of the # target triple. @@ -97,6 +95,8 @@ converting addresses to file and line). Summary: BFD and opcodes static libraries and header files Group: System/Libraries Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info Requires: zlib-devel %description devel @@ -107,32 +107,22 @@ to consider using libelf instead of BFD. %prep %setup -q -n binutils-%{version} -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 -%patch4 -p1 -%patch5 -p1 -%patch6 -p1 -%patch7 -p1 -%patch8 -p1 -%patch9 -p1 -%patch10 -p1 -%patch11 -p1 -%patch12 -p1 -%patch13 -p1 -%patch14 -p1 -%patch15 -p1 +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 %patch16 -p1 %patch17 -p1 -%patch18 -p1 -%patch19 -p1 -%patch20 -p1 -%patch21 -p1 -%patch22 -p1 -%patch23 -p1 -%patch24 -p1 -%patch25 -p1 - # We cannot run autotools as there is an exact requirement of autoconf-2.59. @@ -175,7 +165,7 @@ CFLAGS="$CFLAGS -O0 -ggdb2" # We could optimize the cross builds size by --enable-shared but the produced # binaries may be less convenient in the embedded environment. %if %{accelerator_crossbuild} -export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib:/usr/lib:/lib" +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" %endif %configure \ --build=%{_target_platform} --host=%{_target_platform} \ @@ -196,13 +186,16 @@ export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/lib:/emul/ia32-linux/lib: --disable-shared \ %endif $CARGS \ - --enable-plugins \ --disable-werror \ - --enable-ld=default \ - --disable-info \ - --enable-gold - + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info # Do not use %%check as it is run after %%install where libbfd.so is rebuild # with -fvisibility=hidden no longer being usable in its shared form. @@ -226,6 +219,7 @@ rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,l rm -rf %{buildroot} make install DESTDIR=%{buildroot} %if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info # Rebuild libiberty.a with -fPIC. # Future: Remove it together with its header file, projects should bundle it. @@ -301,6 +295,8 @@ INPUT ( %{_libdir}/libopcodes.a -lbfd ) EOH %else # !%{isnative} +# For cross-binutils we drop the documentation. +rm -rf %{buildroot}%{_infodir} # We keep these as one can have native + cross binutils of different versions. #rm -rf %{buildroot}%{_prefix}/share/locale #rm -rf %{buildroot}%{_mandir} @@ -311,15 +307,68 @@ rm -rf %{buildroot}%{_prefix}/%{_lib}/libiberty.a rm -f %{buildroot}%{_infodir}/dir rm -rf %{buildroot}%{_prefix}/%{binutils_target} -# As gas/README points out (search for --enable-targets), -# multi-arch gas is not ready yet. -rm -rf %{buildroot}%{_libdir}/ldscripts +%if !%{disable_nls} +%find_lang %{?cross}binutils +%find_lang %{?cross}opcodes +%find_lang %{?cross}bfd +%find_lang %{?cross}gas +%find_lang %{?cross}ld +%find_lang %{?cross}gprof +cat %{?cross}opcodes.lang >> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 %postun -p /sbin/ldconfig -%files +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif %defattr(-,root,root,-) +%doc README %{_prefix}/bin/* %{_mandir}/man1/* %if %{enable_shared} @@ -328,6 +377,8 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %exclude %{_prefix}/%{_lib}/libopcodes.so %endif %if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* %files devel %defattr(-,root,root,-) @@ -335,5 +386,60 @@ rm -rf %{buildroot}%{_libdir}/ldscripts %{_prefix}/%{_lib}/libbfd.so %{_prefix}/%{_lib}/libopcodes.so %{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* %endif # %{isnative} +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-mipsel-binutils-accel.spec b/packaging/cross-mipsel-binutils-accel.spec new file mode 100644 index 0000000..543bdcc --- /dev/null +++ b/packaging/cross-mipsel-binutils-accel.spec @@ -0,0 +1,445 @@ +%define binutils_target %{_target_platform} +%define isnative 1 +%define enable_shared 1 +%define run_testsuite 0 +%define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif + +Summary: A GNU collection of binary utilities +Name: cross-mipsel-binutils-accel-%{!?x64:x86}%{?x64} +Version: 2.22 +Release: 1.21.Mer +License: GPLv3+ +Group: Development/Tools +URL: http://sources.redhat.com/binutils +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 +Source2: binutils-2.19.50.0.1-output-format.sed +Source100: baselibs.conf +Source200: precheckin.sh +Source201: README.PACKAGER +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch + +%if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif +%define _prefix /opt/cross +%define enable_shared 0 +%define isnative 0 +%define run_testsuite 0 +%define cross %{binutils_target}- +# single target atm. +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi +%define _prefix /usr +%define cross "" +%define accelerator_crossbuild 1 +AutoReqProv: 0 +%define _build_name_fmt %%{ARCH}/%%{NAME}-%%{VERSION}-%%{RELEASE}.%%{ARCH}.dontuse.rpm +%endif +%endif + +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel +# Required for: ld-bootstrap/bootstrap.exp bootstrap with --static +# It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array +%if %{run_testsuite} +BuildRequires: dejagnu, zlib-static, glibc-static, sharutils +%endif +BuildRequires: elfutils-libelf-devel +Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info + +# On ARM EABI systems, we do want -gnueabi to be part of the +# target triple. +%ifnarch %{arm} +%define _gnu %{nil} +%endif + +%description +Binutils is a collection of binary utilities, including ar (for +creating, modifying and extracting from archives), as (a family of GNU +assemblers), gprof (for displaying call graph profile data), ld (the +GNU linker), nm (for listing symbols from object files), objcopy (for +copying and translating object files), objdump (for displaying +information from object files), ranlib (for generating an index for +the contents of an archive), readelf (for displaying detailed +information about binary files), size (for listing the section sizes +of an object or archive file), strings (for listing printable strings +from files), strip (for discarding symbols), and addr2line (for +converting addresses to file and line). + +%package devel +Summary: BFD and opcodes static libraries and header files +Group: System/Libraries +Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info +Requires: zlib-devel + +%description devel +This package contains BFD and opcodes static libraries and associated +header files. Only *.a libraries are included, because BFD doesn't +have a stable ABI. Developers starting new projects are strongly encouraged +to consider using libelf instead of BFD. + +%prep +%setup -q -n binutils-%{version} +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 +%patch16 -p1 +%patch17 -p1 + +# We cannot run autotools as there is an exact requirement of autoconf-2.59. + +# On ppc64 we might use 64KiB pages +sed -i -e '/#define.*ELF_COMMONPAGESIZE/s/0x1000$/0x10000/' bfd/elf*ppc.c +# LTP sucks +perl -pi -e 's/i\[3-7\]86/i[34567]86/g' */conf* +sed -i -e 's/%''{release}/%{release}/g' bfd/Makefile{.am,.in} +sed -i -e '/^libopcodes_la_\(DEPENDENCIES\|LIBADD\)/s,$, ../bfd/libbfd.la,' opcodes/Makefile.{am,in} +# Build libbfd.so and libopcodes.so with -Bsymbolic-functions if possible. +if gcc %{optflags} -v --help 2>&1 | grep -q -- -Bsymbolic-functions; then +sed -i -e 's/^libbfd_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' bfd/Makefile.{am,in} +sed -i -e 's/^libopcodes_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' opcodes/Makefile.{am,in} +fi +# $PACKAGE is used for the gettext catalog name. +sed -i -e 's/^ PACKAGE=/ PACKAGE=%{?cross}/' */configure +# Undo the name change to run the testsuite. +for tool in binutils gas ld +do + sed -i -e "2aDEJATOOL = $tool" $tool/Makefile.am + sed -i -e "s/^DEJATOOL = .*/DEJATOOL = $tool/" $tool/Makefile.in +done +touch */configure + +%build +echo target is %{binutils_target} +export CFLAGS="$RPM_OPT_FLAGS" +CARGS= + +case %{binutils_target} in i?86*) + CARGS="$CARGS --enable-64-bit-bfd" + ;; +esac + +%if 0%{?_with_debug:1} +CFLAGS="$CFLAGS -O0 -ggdb2" +%define enable_shared 0 +%endif + +# We could optimize the cross builds size by --enable-shared but the produced +# binaries may be less convenient in the embedded environment. +%if %{accelerator_crossbuild} +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" +%endif +%configure \ + --build=%{_target_platform} --host=%{_target_platform} \ + --target=%{binutils_target} \ +%if !%{isnative} +%if !%{accelerator_crossbuild} + --enable-targets=%{_host} \ + --with-sysroot=%{_prefix}/%{binutils_target}/sys-root \ + --program-prefix=%{cross} \ +%else + --with-sysroot=/ \ + --program-prefix="" \ +%endif +%endif +%if %{enable_shared} + --enable-shared \ +%else + --disable-shared \ +%endif + $CARGS \ + --disable-werror \ + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com +make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info + +# Do not use %%check as it is run after %%install where libbfd.so is rebuild +# with -fvisibility=hidden no longer being usable in its shared form. +%if !%{run_testsuite} +echo ====================TESTSUITE DISABLED========================= +%else +make -k check < /dev/null || : +echo ====================TESTING========================= +cat {gas/testsuite/gas,ld/ld,binutils/binutils}.sum +echo ====================TESTING END===================== +for file in {gas/testsuite/gas,ld/ld,binutils/binutils}.{sum,log} +do + ln $file binutils-%{_target_platform}-$(basename $file) || : +done +tar cjf binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log} +uuencode binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}.tar.bz2 +rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log} +%endif + +%install +rm -rf %{buildroot} +make install DESTDIR=%{buildroot} +%if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info + +# Rebuild libiberty.a with -fPIC. +# Future: Remove it together with its header file, projects should bundle it. +make -C libiberty clean +make CFLAGS="-g -fPIC $RPM_OPT_FLAGS" -C libiberty + +# Rebuild libbfd.a with -fPIC. +# Without the hidden visibility the 3rd party shared libraries would export +# the bfd non-stable ABI. +make -C bfd clean +make CFLAGS="-g -fPIC $RPM_OPT_FLAGS -fvisibility=hidden" -C bfd + +install -m 644 bfd/libbfd.a %{buildroot}%{_prefix}/%{_lib} +install -m 644 libiberty/libiberty.a %{buildroot}%{_prefix}/%{_lib} +install -m 644 include/libiberty.h %{buildroot}%{_prefix}/include +# Remove Windows/Novell only man pages +rm -f %{buildroot}%{_mandir}/man1/{dlltool,nlmconv,windres}* + +%if %{enable_shared} +chmod +x %{buildroot}%{_prefix}/%{_lib}/lib*.so* +%endif + +# Prevent programs to link against libbfd and libopcodes dynamically, +# they are changing far too often +rm -f %{buildroot}%{_prefix}/%{_lib}/lib{bfd,opcodes}.so + +# Remove libtool files, which reference the .so libs +rm -f %{buildroot}%{_prefix}/%{_lib}/lib{bfd,opcodes}.la + +%if "%{__isa_bits}" == "64" +# Sanity check --enable-64-bit-bfd really works. +grep '^#define BFD_ARCH_SIZE 64$' %{buildroot}%{_prefix}/include/bfd.h +%endif +# Fix multilib conflicts of generated values by __WORDSIZE-based expressions. +%ifarch %{ix86} x86_64 +sed -i -e '/^#include "ansidecl.h"/{p;s~^.*$~#include ~;}' \ + -e 's/^#define BFD_DEFAULT_TARGET_SIZE \(32\|64\) *$/#define BFD_DEFAULT_TARGET_SIZE __WORDSIZE/' \ + -e 's/^#define BFD_HOST_64BIT_LONG [01] *$/#define BFD_HOST_64BIT_LONG (__WORDSIZE == 64)/' \ + -e 's/^#define BFD_HOST_64_BIT \(long \)\?long *$/#if __WORDSIZE == 32\ +#define BFD_HOST_64_BIT long long\ +#else\ +#define BFD_HOST_64_BIT long\ +#endif/' \ + -e 's/^#define BFD_HOST_U_64_BIT unsigned \(long \)\?long *$/#define BFD_HOST_U_64_BIT unsigned BFD_HOST_64_BIT/' \ + %{buildroot}%{_prefix}/include/bfd.h +%endif +touch -r bfd/bfd-in2.h %{buildroot}%{_prefix}/include/bfd.h + +# Generate .so linker scripts for dependencies; imported from glibc/Makerules: + +# This fragment of linker script gives the OUTPUT_FORMAT statement +# for the configuration we are building. +OUTPUT_FORMAT="\ +/* Ensure this .so library will not be used by a link for a different format + on a multi-architecture system. */ +$(gcc $CFLAGS $LDFLAGS -shared -x c /dev/null -o /dev/null -Wl,--verbose -v 2>&1 | sed -n -f "%{SOURCE2}")" + +tee %{buildroot}%{_prefix}/%{_lib}/libbfd.so <> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif + +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 + +%postun -p /sbin/ldconfig + +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif +%defattr(-,root,root,-) +%doc README +%{_prefix}/bin/* +%{_mandir}/man1/* +%if %{enable_shared} +%{_prefix}/%{_lib}/lib*.so +%exclude %{_prefix}/%{_lib}/libbfd.so +%exclude %{_prefix}/%{_lib}/libopcodes.so +%endif +%if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* + +%files devel +%defattr(-,root,root,-) +%{_prefix}/include/* +%{_prefix}/%{_lib}/libbfd.so +%{_prefix}/%{_lib}/libopcodes.so +%{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* +%endif # %{isnative} + +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/cross-mipsel-binutils.spec b/packaging/cross-mipsel-binutils.spec new file mode 100644 index 0000000..43213c66 --- /dev/null +++ b/packaging/cross-mipsel-binutils.spec @@ -0,0 +1,445 @@ +%define binutils_target %{_target_platform} +%define isnative 1 +%define enable_shared 1 +%define run_testsuite 0 +%define accelerator_crossbuild 0 +%define disable_nls 1 + +%ifarch x86_64 +%define x64 x64 +%endif + +Summary: A GNU collection of binary utilities +Name: cross-mipsel-binutils +Version: 2.22 +Release: 1.21.Mer +License: GPLv3+ +Group: Development/Tools +URL: http://sources.redhat.com/binutils +Source: ftp://ftp.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 +Source2: binutils-2.19.50.0.1-output-format.sed +Source100: baselibs.conf +Source200: precheckin.sh +Source201: README.PACKAGER +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch +Patch04: binutils-2.20.51.0.2-version.patch +Patch05: binutils-2.20.51.0.2-set-long-long.patch +Patch06: binutils-2.20.51.0.10-copy-osabi.patch +Patch07: binutils-2.20.51.0.10-sec-merge-emit.patch +Patch08: binutils-2.20.51.0.2-build-id.patch +Patch09: binutils-2.22-branch-updates.patch +Patch10: binutils-2.22-156-pr10144.patch +Patch11: fixbug13534_1.patch +Patch12: fixbug13534_2.patch +Patch13: fixbug13534_3.patch +Patch14: fixbug13534_4.patch +Patch15: fixbug13534_5.patch +Patch16: pr_13990_14189.patch +Patch17: pr_13177.patch + +%if "%{name}" != "binutils" +%if "%{name}" != "cross-mipsel-binutils" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnueabi +%else +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils/\\1/")-tizen-linux-gnu +%endif +%define _prefix /opt/cross +%define enable_shared 0 +%define isnative 0 +%define run_testsuite 0 +%define cross %{binutils_target}- +# single target atm. +ExclusiveArch: %ix86 x86_64 +# special handling for Tizen ARM build acceleration +%if "%(echo %{name} | sed -e "s/cross-.*-binutils-\\(.*\\)-.*/\\1/")" == "accel" +%define binutils_target %(echo %{name} | sed -e "s/cross-\\(.*\\)-binutils-accel-.*/\\1/")-tizen-linux-gnueabi +%define _prefix /usr +%define cross "" +%define accelerator_crossbuild 1 +AutoReqProv: 0 +%define _build_name_fmt %%{ARCH}/%%{NAME}-%%{VERSION}-%%{RELEASE}.%%{ARCH}.dontuse.rpm +%endif +%endif + +BuildRequires: texinfo >= 4.0, gettext, flex, bison, zlib-devel +# Required for: ld-bootstrap/bootstrap.exp bootstrap with --static +# It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array +%if %{run_testsuite} +BuildRequires: dejagnu, zlib-static, glibc-static, sharutils +%endif +BuildRequires: elfutils-libelf-devel +Conflicts: gcc-c++ < 4.0.0 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info + +# On ARM EABI systems, we do want -gnueabi to be part of the +# target triple. +%ifnarch %{arm} +%define _gnu %{nil} +%endif + +%description +Binutils is a collection of binary utilities, including ar (for +creating, modifying and extracting from archives), as (a family of GNU +assemblers), gprof (for displaying call graph profile data), ld (the +GNU linker), nm (for listing symbols from object files), objcopy (for +copying and translating object files), objdump (for displaying +information from object files), ranlib (for generating an index for +the contents of an archive), readelf (for displaying detailed +information about binary files), size (for listing the section sizes +of an object or archive file), strings (for listing printable strings +from files), strip (for discarding symbols), and addr2line (for +converting addresses to file and line). + +%package devel +Summary: BFD and opcodes static libraries and header files +Group: System/Libraries +Conflicts: binutils < 2.17.50.0.3-4 +Requires(post): /sbin/install-info +Requires(preun): /sbin/install-info +Requires: zlib-devel + +%description devel +This package contains BFD and opcodes static libraries and associated +header files. Only *.a libraries are included, because BFD doesn't +have a stable ABI. Developers starting new projects are strongly encouraged +to consider using libelf instead of BFD. + +%prep +%setup -q -n binutils-%{version} +%patch01 -p0 -b .libtool-lib64~ +# Causes build churn --cvm +#%patch04 -p0 -b .version~ +%patch05 -p0 -b .set-long-long~ +%patch06 -p0 -b .copy-osabi~ +%patch07 -p0 -b .sec-merge-emit~ +%patch08 -p0 -b .build-id~ +%patch09 -p1 -b .branchupdates +%patch10 -p1 -b .pr10144 +%patch11 -p1 -b .fixbug13534_1 +%patch12 -p1 -b .fixbug13534_2 +%patch13 -p1 -b .fixbug13534_3 +%patch14 -p1 -b .fixbug13534_4 +%patch15 -p1 -b .fixbug13534_5 +%patch16 -p1 +%patch17 -p1 + +# We cannot run autotools as there is an exact requirement of autoconf-2.59. + +# On ppc64 we might use 64KiB pages +sed -i -e '/#define.*ELF_COMMONPAGESIZE/s/0x1000$/0x10000/' bfd/elf*ppc.c +# LTP sucks +perl -pi -e 's/i\[3-7\]86/i[34567]86/g' */conf* +sed -i -e 's/%''{release}/%{release}/g' bfd/Makefile{.am,.in} +sed -i -e '/^libopcodes_la_\(DEPENDENCIES\|LIBADD\)/s,$, ../bfd/libbfd.la,' opcodes/Makefile.{am,in} +# Build libbfd.so and libopcodes.so with -Bsymbolic-functions if possible. +if gcc %{optflags} -v --help 2>&1 | grep -q -- -Bsymbolic-functions; then +sed -i -e 's/^libbfd_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' bfd/Makefile.{am,in} +sed -i -e 's/^libopcodes_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' opcodes/Makefile.{am,in} +fi +# $PACKAGE is used for the gettext catalog name. +sed -i -e 's/^ PACKAGE=/ PACKAGE=%{?cross}/' */configure +# Undo the name change to run the testsuite. +for tool in binutils gas ld +do + sed -i -e "2aDEJATOOL = $tool" $tool/Makefile.am + sed -i -e "s/^DEJATOOL = .*/DEJATOOL = $tool/" $tool/Makefile.in +done +touch */configure + +%build +echo target is %{binutils_target} +export CFLAGS="$RPM_OPT_FLAGS" +CARGS= + +case %{binutils_target} in i?86*) + CARGS="$CARGS --enable-64-bit-bfd" + ;; +esac + +%if 0%{?_with_debug:1} +CFLAGS="$CFLAGS -O0 -ggdb2" +%define enable_shared 0 +%endif + +# We could optimize the cross builds size by --enable-shared but the produced +# binaries may be less convenient in the embedded environment. +%if %{accelerator_crossbuild} +export CFLAGS="$CFLAGS -Wl,-rpath,/emul/ia32-linux/usr/%{_lib}:/emul/ia32-linux/%{_lib}:/usr/%{_lib}:/%{_lib}:/usr/lib:/lib" +%endif +%configure \ + --build=%{_target_platform} --host=%{_target_platform} \ + --target=%{binutils_target} \ +%if !%{isnative} +%if !%{accelerator_crossbuild} + --enable-targets=%{_host} \ + --with-sysroot=%{_prefix}/%{binutils_target}/sys-root \ + --program-prefix=%{cross} \ +%else + --with-sysroot=/ \ + --program-prefix="" \ +%endif +%endif +%if %{enable_shared} + --enable-shared \ +%else + --disable-shared \ +%endif + $CARGS \ + --disable-werror \ + --enable-lto \ + --enable-gold=yes \ + --enable-plugins \ +%if %{disable_nls} + --disable-nls \ +%endif + --with-bugurl=http://bugzilla.tizen.com +make %{_smp_mflags} tooldir=%{_prefix} all +make %{_smp_mflags} tooldir=%{_prefix} info + +# Do not use %%check as it is run after %%install where libbfd.so is rebuild +# with -fvisibility=hidden no longer being usable in its shared form. +%if !%{run_testsuite} +echo ====================TESTSUITE DISABLED========================= +%else +make -k check < /dev/null || : +echo ====================TESTING========================= +cat {gas/testsuite/gas,ld/ld,binutils/binutils}.sum +echo ====================TESTING END===================== +for file in {gas/testsuite/gas,ld/ld,binutils/binutils}.{sum,log} +do + ln $file binutils-%{_target_platform}-$(basename $file) || : +done +tar cjf binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log} +uuencode binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}.tar.bz2 +rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log} +%endif + +%install +rm -rf %{buildroot} +make install DESTDIR=%{buildroot} +%if %{isnative} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info + +# Rebuild libiberty.a with -fPIC. +# Future: Remove it together with its header file, projects should bundle it. +make -C libiberty clean +make CFLAGS="-g -fPIC $RPM_OPT_FLAGS" -C libiberty + +# Rebuild libbfd.a with -fPIC. +# Without the hidden visibility the 3rd party shared libraries would export +# the bfd non-stable ABI. +make -C bfd clean +make CFLAGS="-g -fPIC $RPM_OPT_FLAGS -fvisibility=hidden" -C bfd + +install -m 644 bfd/libbfd.a %{buildroot}%{_prefix}/%{_lib} +install -m 644 libiberty/libiberty.a %{buildroot}%{_prefix}/%{_lib} +install -m 644 include/libiberty.h %{buildroot}%{_prefix}/include +# Remove Windows/Novell only man pages +rm -f %{buildroot}%{_mandir}/man1/{dlltool,nlmconv,windres}* + +%if %{enable_shared} +chmod +x %{buildroot}%{_prefix}/%{_lib}/lib*.so* +%endif + +# Prevent programs to link against libbfd and libopcodes dynamically, +# they are changing far too often +rm -f %{buildroot}%{_prefix}/%{_lib}/lib{bfd,opcodes}.so + +# Remove libtool files, which reference the .so libs +rm -f %{buildroot}%{_prefix}/%{_lib}/lib{bfd,opcodes}.la + +%if "%{__isa_bits}" == "64" +# Sanity check --enable-64-bit-bfd really works. +grep '^#define BFD_ARCH_SIZE 64$' %{buildroot}%{_prefix}/include/bfd.h +%endif +# Fix multilib conflicts of generated values by __WORDSIZE-based expressions. +%ifarch %{ix86} x86_64 +sed -i -e '/^#include "ansidecl.h"/{p;s~^.*$~#include ~;}' \ + -e 's/^#define BFD_DEFAULT_TARGET_SIZE \(32\|64\) *$/#define BFD_DEFAULT_TARGET_SIZE __WORDSIZE/' \ + -e 's/^#define BFD_HOST_64BIT_LONG [01] *$/#define BFD_HOST_64BIT_LONG (__WORDSIZE == 64)/' \ + -e 's/^#define BFD_HOST_64_BIT \(long \)\?long *$/#if __WORDSIZE == 32\ +#define BFD_HOST_64_BIT long long\ +#else\ +#define BFD_HOST_64_BIT long\ +#endif/' \ + -e 's/^#define BFD_HOST_U_64_BIT unsigned \(long \)\?long *$/#define BFD_HOST_U_64_BIT unsigned BFD_HOST_64_BIT/' \ + %{buildroot}%{_prefix}/include/bfd.h +%endif +touch -r bfd/bfd-in2.h %{buildroot}%{_prefix}/include/bfd.h + +# Generate .so linker scripts for dependencies; imported from glibc/Makerules: + +# This fragment of linker script gives the OUTPUT_FORMAT statement +# for the configuration we are building. +OUTPUT_FORMAT="\ +/* Ensure this .so library will not be used by a link for a different format + on a multi-architecture system. */ +$(gcc $CFLAGS $LDFLAGS -shared -x c /dev/null -o /dev/null -Wl,--verbose -v 2>&1 | sed -n -f "%{SOURCE2}")" + +tee %{buildroot}%{_prefix}/%{_lib}/libbfd.so <> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}ld.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang +%endif + +%if %{accelerator_crossbuild} +# Fixed x86 dependencies +sed "s/@X86@/%{!?x64:x86}%{?x64}/g" -i %{_sourcedir}/baselibs.conf +%endif + +%clean +rm -rf %{buildroot} + +%if %{isnative} +%post +/sbin/ldconfig +%install_info --info-dir=%{_infodir} %{_infodir}/as.info +%install_info --info-dir=%{_infodir} %{_infodir}/binutils.info +%install_info --info-dir=%{_infodir} %{_infodir}/gprof.info +%install_info --info-dir=%{_infodir} %{_infodir}/ld.info +%install_info --info-dir=%{_infodir} %{_infodir}/standards.info +%install_info --info-dir=%{_infodir} %{_infodir}/configure.info +exit 0 + +%preun +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/as.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/ld.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/standards.info + %install_info --delete --info-dir=%{_infodir} %{_infodir}/configure.info +fi +exit 0 + +%postun -p /sbin/ldconfig + +%post devel +%install_info --info-dir=%{_infodir} %{_infodir}/bfd.info + +%preun devel +if [ $1 = 0 ] ;then + %install_info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info +fi +%endif # %{isnative} + +%if %{disable_nls} +%files +%else +%files -f %{?cross}binutils.lang +%endif +%defattr(-,root,root,-) +%doc README +%{_prefix}/bin/* +%{_mandir}/man1/* +%if %{enable_shared} +%{_prefix}/%{_lib}/lib*.so +%exclude %{_prefix}/%{_lib}/libbfd.so +%exclude %{_prefix}/%{_lib}/libopcodes.so +%endif +%if %{isnative} +%{_infodir}/[^b]*info* +%{_infodir}/binutils*info* + +%files devel +%defattr(-,root,root,-) +%{_prefix}/include/* +%{_prefix}/%{_lib}/libbfd.so +%{_prefix}/%{_lib}/libopcodes.so +%{_prefix}/%{_lib}/lib*.a +%{_infodir}/bfd*info* +%endif # %{isnative} + +%changelog +* Tue Feb 7 2012 Carsten Munk - 2.22 +- Pull some patches relevant to MIPS from branch update, and + fix for PR10144 +* Mon Dec 12 2011 Ray Donnelly - 2.22 +- Updated to binutils 2.22 +* Tue Jun 28 2011 Junfeng Dong - 2.21.51.0.8 +- Add patch binutils-2.21.51.0.8-pr12778.patch to fix dbus failure on arm. +* Tue May 3 2011 Junfeng Dong - 2.21.51.0.8 +- Update to latest version 2.21.51.0.8. +- Clean unused patch files. +- Drop binutils.spec.diff. +* Sun Apr 24 2011 Jan-Simon Möller - 1.0 +- Add baselibs.conf to src.rpm +* Thu Mar 10 2011 Junfeng Dong -2.21 +- Update to 2.21. The changes include: +- Drop the following patch which have been merged into 2.21 already. + binutils-2.20.51.0.2-ifunc-ld-s.patch, binutils-2.20.51.0.2-lwp.patch + binutils-2.20.51.0.2-tag-div-use.patch +- Drop binutils-2.20.51.0.2-build-id.patch because of the code evolvement. +- Recreate binutils-2.20.51.0.2-libtool-lib64.patch for 2.21 and rename + the new patch as binutils-2.21-libtool-lib64.patch. +* Fri Jan 7 2011 Carsten Munk - 2.20.51.0.2 +- Add armv7hl, armv7nhl cross-binutils- packages. Part of fix for BMC#11463 +* Fri Dec 31 2010 Carsten Munk - 2.20.51.0.2 +- Add support for Tag_MPextension_use and Tag_DIV_use. Fixes BMC#11431 +* Wed Dec 29 2010 Austin Zhang - 2.20.51.0.2 +- Bugfixing: + BMC#10336 - Error when installing binutils with --excludedocs in .ks +* Tue May 25 2010 Austin Zhang - 2.20.51.0.2 +- enable LTO (link time optimization) +* Mon May 3 2010 Jan-Simon Möller - 2.20.51.0.2 +- Add precheckin.sh, README.packager +- add cross-binutils-* packages (cross-compiler) +* Thu Mar 4 2010 Anas Nashif - 2.20.51.0.2 +- Use %%{_target_platform} as the build target +* Sat Dec 12 2009 Arjan van de Ven - 2.20.51.0.2 +- add the LD_AS_NEEDED env variable back, and get us closer to upstream +* Fri Nov 27 2009 Austin Zhang - 2.20.51.0.2 +- Update to 2.20.51.0.2 +* Sat Aug 22 2009 Anas Nashif - 2.19.51.0.14 +- Update to 2.19.51.0.14 +* Wed May 6 2009 Arjan van de Ven 2.19 +- Add LD_AS_NEEDED environment variable +* Tue Jan 13 2009 Anas Nashif 2.19 +- Fixed source tag +* Thu Jan 8 2009 Anas Nashif 2.19 +- Update to 2.19 +* Tue Dec 16 2008 Anas Nashif 2.18.50.0.6 +- Fixed rpmlint errors in Summary tag +* Thu Dec 11 2008 Anas Nashif 2.18.50.0.6 +- Do not check for ia64 +* Thu Sep 18 2008 Austin Zhang 2.18.50.0.6 +- add check for the info file before installation diff --git a/packaging/fixbug13534_1.patch b/packaging/fixbug13534_1.patch new file mode 100644 index 0000000..a9df84c --- /dev/null +++ b/packaging/fixbug13534_1.patch @@ -0,0 +1,118 @@ +commit 75bf1d978bc03a07ad59a3f983c806bb5899c28c +Author: Francois Gouget +Date: Tue Dec 20 18:37:16 2011 +0100 + + bfd: Fix writing the size of 2+GB elements in the archive. + +diff --git a/bfd/archive.c b/bfd/archive.c +index 3e333c7..5c5b3d4 100644 +--- a/bfd/archive.c ++++ b/bfd/archive.c +@@ -179,6 +179,22 @@ _bfd_ar_spacepad (char *p, size_t n, const char *fmt, long val) + memcpy (p, buf, n); + } + ++void ++_bfd_ar_sizepad (char *p, size_t n, bfd_size_type size) ++{ ++ static char buf[21]; ++ size_t len; ++ snprintf (buf, sizeof (buf), "%-10" BFD_VMA_FMT "u", size); ++ len = strlen (buf); ++ if (len < n) ++ { ++ memcpy (p, buf, len); ++ memset (p + len, ' ', n - len); ++ } ++ else ++ memcpy (p, buf, n); ++} ++ + bfd_boolean + _bfd_generic_mkarchive (bfd *abfd) + { +@@ -1770,7 +1786,7 @@ _bfd_bsd44_write_ar_hdr (bfd *archive, bfd *abfd) + + BFD_ASSERT (padded_len == arch_eltdata (abfd)->extra_size); + +- _bfd_ar_spacepad (hdr->ar_size, sizeof (hdr->ar_size), "%-10ld", ++ _bfd_ar_sizepad (hdr->ar_size, sizeof (hdr->ar_size), + arch_eltdata (abfd)->parsed_size + padded_len); + + if (bfd_bwrite (hdr, sizeof (*hdr), archive) != sizeof (*hdr)) +@@ -1891,7 +1907,7 @@ bfd_ar_hdr_from_filesystem (bfd *abfd, const char *filename, bfd *member) + status.st_gid); + _bfd_ar_spacepad (hdr->ar_mode, sizeof (hdr->ar_mode), "%-8lo", + status.st_mode); +- _bfd_ar_spacepad (hdr->ar_size, sizeof (hdr->ar_size), "%-10ld", ++ _bfd_ar_sizepad (hdr->ar_size, sizeof (hdr->ar_size), + status.st_size); + memcpy (hdr->ar_fmag, ARFMAG, 2); + ared->parsed_size = status.st_size; +@@ -2132,7 +2148,7 @@ _bfd_write_archive_contents (bfd *arch) + memset (&hdr, ' ', sizeof (struct ar_hdr)); + memcpy (hdr.ar_name, ename, strlen (ename)); + /* Round size up to even number in archive header. */ +- _bfd_ar_spacepad (hdr.ar_size, sizeof (hdr.ar_size), "%-10ld", ++ _bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), + (elength + 1) & ~(bfd_size_type) 1); + memcpy (hdr.ar_fmag, ARFMAG, 2); + if ((bfd_bwrite (&hdr, sizeof (struct ar_hdr), arch) +@@ -2409,7 +2425,7 @@ bsd_write_armap (bfd *arch, + bfd_ardata (arch)->armap_timestamp); + _bfd_ar_spacepad (hdr.ar_uid, sizeof (hdr.ar_uid), "%ld", uid); + _bfd_ar_spacepad (hdr.ar_gid, sizeof (hdr.ar_gid), "%ld", gid); +- _bfd_ar_spacepad (hdr.ar_size, sizeof (hdr.ar_size), "%-10ld", mapsize); ++ _bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), mapsize); + memcpy (hdr.ar_fmag, ARFMAG, 2); + if (bfd_bwrite (&hdr, sizeof (struct ar_hdr), arch) + != sizeof (struct ar_hdr)) +@@ -2564,8 +2580,7 @@ coff_write_armap (bfd *arch, + + memset (&hdr, ' ', sizeof (struct ar_hdr)); + hdr.ar_name[0] = '/'; +- _bfd_ar_spacepad (hdr.ar_size, sizeof (hdr.ar_size), "%-10ld", +- mapsize); ++ _bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), mapsize); + _bfd_ar_spacepad (hdr.ar_date, sizeof (hdr.ar_date), "%ld", + ((arch->flags & BFD_DETERMINISTIC_OUTPUT) == 0 + ? time (NULL) : 0)); +diff --git a/bfd/archive64.c b/bfd/archive64.c +index bbc4c3f..a906508 100644 +--- a/bfd/archive64.c ++++ b/bfd/archive64.c +@@ -169,7 +169,7 @@ bfd_elf64_archive_write_armap (bfd *arch, + + memset (&hdr, ' ', sizeof (struct ar_hdr)); + memcpy (hdr.ar_name, "/SYM64/", strlen ("/SYM64/")); +- _bfd_ar_spacepad (hdr.ar_size, sizeof (hdr.ar_size), "%-10ld", ++ _bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), + mapsize); + _bfd_ar_spacepad (hdr.ar_date, sizeof (hdr.ar_date), "%ld", + time (NULL)); +diff --git a/bfd/libbfd-in.h b/bfd/libbfd-in.h +index 7db09e4..57197ac 100644 +--- a/bfd/libbfd-in.h ++++ b/bfd/libbfd-in.h +@@ -203,6 +203,8 @@ extern void *_bfd_generic_read_ar_hdr + (bfd *); + extern void _bfd_ar_spacepad + (char *, size_t, const char *, long); ++extern void _bfd_ar_sizepad ++ (char *, size_t, bfd_size_type); + + extern void *_bfd_generic_read_ar_hdr_mag + (bfd *, const char *); +diff --git a/bfd/libbfd.h b/bfd/libbfd.h +index 0beddb6..121e865 100644 +--- a/bfd/libbfd.h ++++ b/bfd/libbfd.h +@@ -208,6 +208,8 @@ extern void *_bfd_generic_read_ar_hdr + (bfd *); + extern void _bfd_ar_spacepad + (char *, size_t, const char *, long); ++extern void _bfd_ar_sizepad ++ (char *, size_t, bfd_size_type); + + extern void *_bfd_generic_read_ar_hdr_mag + (bfd *, const char *); diff --git a/packaging/fixbug13534_2.patch b/packaging/fixbug13534_2.patch new file mode 100644 index 0000000..227bbbe --- /dev/null +++ b/packaging/fixbug13534_2.patch @@ -0,0 +1,137 @@ +commit 433cc73f9df08a1435b4d07a7bd3eed20f0c3dcd +Author: Francois Gouget +Date: Tue Dec 20 19:39:41 2011 +0100 + + bfd: Refuse to create an invalid archive when an archive element is too big. + + The archive format stores element sizes as a 10 character string and thus cannot handle anything 10GB or more. + +diff --git a/bfd/archive.c b/bfd/archive.c +index 5c5b3d4..05aba6c 100644 +--- a/bfd/archive.c ++++ b/bfd/archive.c +@@ -179,13 +179,18 @@ _bfd_ar_spacepad (char *p, size_t n, const char *fmt, long val) + memcpy (p, buf, n); + } + +-void ++int + _bfd_ar_sizepad (char *p, size_t n, bfd_size_type size) + { + static char buf[21]; + size_t len; + snprintf (buf, sizeof (buf), "%-10" BFD_VMA_FMT "u", size); + len = strlen (buf); ++ if (len > n) ++ { ++ bfd_set_error(bfd_error_file_too_big); ++ return 0; ++ } + if (len < n) + { + memcpy (p, buf, len); +@@ -193,6 +198,7 @@ _bfd_ar_sizepad (char *p, size_t n, bfd_size_type size) + } + else + memcpy (p, buf, n); ++ return 1; + } + + bfd_boolean +@@ -1786,8 +1792,9 @@ _bfd_bsd44_write_ar_hdr (bfd *archive, bfd *abfd) + + BFD_ASSERT (padded_len == arch_eltdata (abfd)->extra_size); + +- _bfd_ar_sizepad (hdr->ar_size, sizeof (hdr->ar_size), +- arch_eltdata (abfd)->parsed_size + padded_len); ++ if (!_bfd_ar_sizepad (hdr->ar_size, sizeof (hdr->ar_size), ++ arch_eltdata (abfd)->parsed_size + padded_len)) ++ return FALSE; + + if (bfd_bwrite (hdr, sizeof (*hdr), archive) != sizeof (*hdr)) + return FALSE; +@@ -1907,8 +1914,8 @@ bfd_ar_hdr_from_filesystem (bfd *abfd, const char *filename, bfd *member) + status.st_gid); + _bfd_ar_spacepad (hdr->ar_mode, sizeof (hdr->ar_mode), "%-8lo", + status.st_mode); +- _bfd_ar_sizepad (hdr->ar_size, sizeof (hdr->ar_size), +- status.st_size); ++ if (!_bfd_ar_sizepad (hdr->ar_size, sizeof (hdr->ar_size), status.st_size)) ++ return NULL; + memcpy (hdr->ar_fmag, ARFMAG, 2); + ared->parsed_size = status.st_size; + ared->arch_header = (char *) hdr; +@@ -2148,8 +2155,9 @@ _bfd_write_archive_contents (bfd *arch) + memset (&hdr, ' ', sizeof (struct ar_hdr)); + memcpy (hdr.ar_name, ename, strlen (ename)); + /* Round size up to even number in archive header. */ +- _bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), +- (elength + 1) & ~(bfd_size_type) 1); ++ if (!_bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), ++ (elength + 1) & ~(bfd_size_type) 1)) ++ return FALSE; + memcpy (hdr.ar_fmag, ARFMAG, 2); + if ((bfd_bwrite (&hdr, sizeof (struct ar_hdr), arch) + != sizeof (struct ar_hdr)) +@@ -2425,7 +2433,8 @@ bsd_write_armap (bfd *arch, + bfd_ardata (arch)->armap_timestamp); + _bfd_ar_spacepad (hdr.ar_uid, sizeof (hdr.ar_uid), "%ld", uid); + _bfd_ar_spacepad (hdr.ar_gid, sizeof (hdr.ar_gid), "%ld", gid); +- _bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), mapsize); ++ if (!_bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), mapsize)) ++ return FALSE; + memcpy (hdr.ar_fmag, ARFMAG, 2); + if (bfd_bwrite (&hdr, sizeof (struct ar_hdr), arch) + != sizeof (struct ar_hdr)) +@@ -2580,7 +2589,8 @@ coff_write_armap (bfd *arch, + + memset (&hdr, ' ', sizeof (struct ar_hdr)); + hdr.ar_name[0] = '/'; +- _bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), mapsize); ++ if (!_bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), mapsize)) ++ return FALSE; + _bfd_ar_spacepad (hdr.ar_date, sizeof (hdr.ar_date), "%ld", + ((arch->flags & BFD_DETERMINISTIC_OUTPUT) == 0 + ? time (NULL) : 0)); +diff --git a/bfd/archive64.c b/bfd/archive64.c +index a906508..bdbda0a 100644 +--- a/bfd/archive64.c ++++ b/bfd/archive64.c +@@ -169,8 +169,8 @@ bfd_elf64_archive_write_armap (bfd *arch, + + memset (&hdr, ' ', sizeof (struct ar_hdr)); + memcpy (hdr.ar_name, "/SYM64/", strlen ("/SYM64/")); +- _bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), +- mapsize); ++ if (!_bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), mapsize)) ++ return FALSE; + _bfd_ar_spacepad (hdr.ar_date, sizeof (hdr.ar_date), "%ld", + time (NULL)); + /* This, at least, is what Intel coff sets the values to.: */ +diff --git a/bfd/libbfd-in.h b/bfd/libbfd-in.h +index 57197ac..a4ba4b6 100644 +--- a/bfd/libbfd-in.h ++++ b/bfd/libbfd-in.h +@@ -203,7 +203,7 @@ extern void *_bfd_generic_read_ar_hdr + (bfd *); + extern void _bfd_ar_spacepad + (char *, size_t, const char *, long); +-extern void _bfd_ar_sizepad ++extern int _bfd_ar_sizepad + (char *, size_t, bfd_size_type); + + extern void *_bfd_generic_read_ar_hdr_mag +diff --git a/bfd/libbfd.h b/bfd/libbfd.h +index 121e865..7f142d0 100644 +--- a/bfd/libbfd.h ++++ b/bfd/libbfd.h +@@ -208,7 +208,7 @@ extern void *_bfd_generic_read_ar_hdr + (bfd *); + extern void _bfd_ar_spacepad + (char *, size_t, const char *, long); +-extern void _bfd_ar_sizepad ++extern int _bfd_ar_sizepad + (char *, size_t, bfd_size_type); + + extern void *_bfd_generic_read_ar_hdr_mag + diff --git a/packaging/fixbug13534_3.patch b/packaging/fixbug13534_3.patch new file mode 100644 index 0000000..454ccae --- /dev/null +++ b/packaging/fixbug13534_3.patch @@ -0,0 +1,29 @@ +commit 23a979dc1779ac63cd799bfa2f6c2aed1f1bff66 +Author: Francois Gouget +Date: Tue Dec 20 18:41:35 2011 +0100 + + bfd: Fix parsing the size of archive elements larger than 2GB. + +diff --git a/bfd/archive.c b/bfd/archive.c +index 05aba6c..01acf98 100644 +--- a/bfd/archive.c ++++ b/bfd/archive.c +@@ -446,7 +446,7 @@ _bfd_generic_read_ar_hdr_mag (bfd *abfd, const char *mag) + { + struct ar_hdr hdr; + char *hdrp = (char *) &hdr; +- size_t parsed_size; ++ bfd_size_type parsed_size; + struct areltdata *ared; + char *filename = NULL; + bfd_size_type namelen = 0; +@@ -470,8 +470,7 @@ _bfd_generic_read_ar_hdr_mag (bfd *abfd, const char *mag) + } + + errno = 0; +- parsed_size = strtol (hdr.ar_size, NULL, 10); +- if (errno != 0) ++ if (sscanf(hdr.ar_size, "%" BFD_VMA_FMT "u", &parsed_size) != 1) + { + bfd_set_error (bfd_error_malformed_archive); + return NULL; diff --git a/packaging/fixbug13534_4.patch b/packaging/fixbug13534_4.patch new file mode 100644 index 0000000..c368a3e --- /dev/null +++ b/packaging/fixbug13534_4.patch @@ -0,0 +1,83 @@ +commit 70ed6152e1e163b9ca240fe8b91aa3feb942ac84 +Author: Francois Gouget +Date: Tue Dec 20 18:45:18 2011 +0100 + + bfd: Always use bfd_size_type to manipulate the size of an archive element. + + Other types may not be able to deal with archive elements larger than 2GB. + +diff --git a/bfd/archive.c b/bfd/archive.c +index 01acf98..c1438ef 100644 +--- a/bfd/archive.c ++++ b/bfd/archive.c +@@ -748,7 +748,7 @@ bfd_generic_openr_next_archived_file (bfd *archive, bfd *last_file) + filestart = bfd_ardata (archive)->first_file_filepos; + else + { +- unsigned int size = arelt_size (last_file); ++ bfd_size_type size = arelt_size (last_file); + + filestart = last_file->proxy_origin; + if (! bfd_is_thin_archive (archive)) +@@ -946,7 +946,7 @@ do_slurp_coff_armap (bfd *abfd) + struct artdata *ardata = bfd_ardata (abfd); + char *stringbase; + bfd_size_type stringsize; +- unsigned int parsed_size; ++ bfd_size_type parsed_size; + carsym *carsyms; + bfd_size_type nsymz; /* Number of symbols in armap. */ + bfd_vma (*swap) (const void *); +@@ -2174,7 +2174,7 @@ _bfd_write_archive_contents (bfd *arch) + current = current->archive_next) + { + char buffer[DEFAULT_BUFFERSIZE]; +- unsigned int remaining = arelt_size (current); ++ bfd_size_type remaining = arelt_size (current); + + /* Write ar header. */ + if (!_bfd_write_ar_hdr (arch, current)) +diff --git a/bfd/bfdio.c b/bfd/bfdio.c +index 841c781..5bc8061 100644 +--- a/bfd/bfdio.c ++++ b/bfd/bfdio.c +@@ -185,7 +185,7 @@ bfd_bread (void *ptr, bfd_size_type size, bfd *abfd) + this element. */ + if (abfd->arelt_data != NULL) + { +- size_t maxbytes = ((struct areltdata *) abfd->arelt_data)->parsed_size; ++ bfd_size_type maxbytes = arelt_size (abfd); + if (abfd->where + size > maxbytes) + { + if (abfd->where >= maxbytes) +diff --git a/bfd/libbfd-in.h b/bfd/libbfd-in.h +index a4ba4b6..683c1cc 100644 +--- a/bfd/libbfd-in.h ++++ b/bfd/libbfd-in.h +@@ -90,8 +90,8 @@ struct artdata { + /* Goes in bfd's arelt_data slot */ + struct areltdata { + char * arch_header; /* it's actually a string */ +- unsigned int parsed_size; /* octets of filesize not including ar_hdr */ +- unsigned int extra_size; /* BSD4.4: extra bytes after the header. */ ++ bfd_size_type parsed_size; /* octets of filesize not including ar_hdr */ ++ bfd_size_type extra_size; /* BSD4.4: extra bytes after the header. */ + char *filename; /* null-terminated */ + file_ptr origin; /* for element of a thin archive */ + }; +diff --git a/bfd/libbfd.h b/bfd/libbfd.h +index 7f142d0..6d27901 100644 +--- a/bfd/libbfd.h ++++ b/bfd/libbfd.h +@@ -95,8 +95,8 @@ struct artdata { + /* Goes in bfd's arelt_data slot */ + struct areltdata { + char * arch_header; /* it's actually a string */ +- unsigned int parsed_size; /* octets of filesize not including ar_hdr */ +- unsigned int extra_size; /* BSD4.4: extra bytes after the header. */ ++ bfd_size_type parsed_size; /* octets of filesize not including ar_hdr */ ++ bfd_size_type extra_size; /* BSD4.4: extra bytes after the header. */ + char *filename; /* null-terminated */ + file_ptr origin; /* for element of a thin archive */ + }; + diff --git a/packaging/fixbug13534_5.patch b/packaging/fixbug13534_5.patch new file mode 100644 index 0000000..2eeaa6f --- /dev/null +++ b/packaging/fixbug13534_5.patch @@ -0,0 +1,62 @@ +commit 1c9170065b107672a47e467abb6807bba8adf28e +Author: Francois Gouget +Date: Tue Dec 20 18:48:52 2011 +0100 + + ar: Fix handling of archive elements larger than 2GB. + +diff --git a/binutils/ar.c b/binutils/ar.c +index 0310b6f..e47779f 100644 +--- a/binutils/ar.c ++++ b/binutils/ar.c +@@ -927,10 +927,10 @@ open_inarch (const char *archive_filename, const char *file) + static void + print_contents (bfd *abfd) + { +- size_t ncopied = 0; ++ bfd_size_type ncopied = 0; + char *cbuf = (char *) xmalloc (BUFSIZE); + struct stat buf; +- size_t size; ++ bfd_size_type size; + if (bfd_stat_arch_elt (abfd, &buf) != 0) + /* xgettext:c-format */ + fatal (_("internal stat error on %s"), bfd_get_filename (abfd)); +@@ -944,12 +944,12 @@ print_contents (bfd *abfd) + while (ncopied < size) + { + +- size_t nread; +- size_t tocopy = size - ncopied; ++ bfd_size_type nread; ++ bfd_size_type tocopy = size - ncopied; + if (tocopy > BUFSIZE) + tocopy = BUFSIZE; + +- nread = bfd_bread (cbuf, (bfd_size_type) tocopy, abfd); ++ nread = bfd_bread (cbuf, tocopy, abfd); + if (nread != tocopy) + /* xgettext:c-format */ + fatal (_("%s is not a valid archive"), +@@ -980,9 +980,9 @@ extract_file (bfd *abfd) + { + FILE *ostream; + char *cbuf = (char *) xmalloc (BUFSIZE); +- size_t nread, tocopy; +- size_t ncopied = 0; +- size_t size; ++ bfd_size_type nread, tocopy; ++ bfd_size_type ncopied = 0; ++ bfd_size_type size; + struct stat buf; + + if (bfd_stat_arch_elt (abfd, &buf) != 0) +@@ -1017,7 +1017,7 @@ extract_file (bfd *abfd) + if (tocopy > BUFSIZE) + tocopy = BUFSIZE; + +- nread = bfd_bread (cbuf, (bfd_size_type) tocopy, abfd); ++ nread = bfd_bread (cbuf, tocopy, abfd); + if (nread != tocopy) + /* xgettext:c-format */ + fatal (_("%s is not a valid archive"), + diff --git a/packaging/pr_13177.patch b/packaging/pr_13177.patch new file mode 100644 index 0000000..209a0cd --- /dev/null +++ b/packaging/pr_13177.patch @@ -0,0 +1,57 @@ +diff --git a/bfd/elflink.c b/bfd/elflink.c +index 1f6c1a0..8daebe5 100644 +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -11721,10 +11721,15 @@ + static bfd_boolean + elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) + { +- if ((h->root.type == bfd_link_hash_defined +- || h->root.type == bfd_link_hash_defweak) +- && !h->root.u.def.section->gc_mark +- && !(h->root.u.def.section->owner->flags & DYNAMIC)) ++ if (((h->root.type == bfd_link_hash_defined ++ || h->root.type == bfd_link_hash_defweak) ++ && !h->root.u.def.section->gc_mark ++ && (!(h->root.u.def.section->owner->flags & DYNAMIC) ++ || (h->plt.refcount <= 0 ++ && h->got.refcount <= 0))) ++ || (h->root.type == bfd_link_hash_undefined ++ && h->plt.refcount <= 0 ++ && h->got.refcount <= 0)) + { + struct elf_gc_sweep_symbol_info *inf = + (struct elf_gc_sweep_symbol_info *) data; + +diff --git a/ld/testsuite/ld-elf/pr13177.d b/ld/testsuite/ld-elf/pr13177.d +new file mode 100644 +index 0000000..b58623a +--- /dev/null ++++ b/ld/testsuite/ld-elf/pr13177.d +@@ -0,0 +1,11 @@ ++#source: pr13177.s ++#ld: --gc-sections -shared ++#readelf: -s -D --wide ++#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-* ++#notarget: hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-* ++# generic linker targets don't support --gc-sections, nor do a bunch of others ++ ++#failif ++#... ++.*: 0+0 +0 +NOTYPE +GLOBAL +DEFAULT +UND bar ++#... +diff --git a/ld/testsuite/ld-elf/pr13177.s b/ld/testsuite/ld-elf/pr13177.s +new file mode 100644 +index 0000000..acc36ab +--- /dev/null ++++ b/ld/testsuite/ld-elf/pr13177.s +@@ -0,0 +1,9 @@ ++ .section .text.foo,"ax",%progbits ++ .globl foo ++ .type foo, %function ++foo: ++ .byte 0 ++ .section .text.opt_out,"ax",%progbits ++ .type opt_out, %function ++opt_out: ++ .dc.a bar diff --git a/packaging/pr_13990_14189.patch b/packaging/pr_13990_14189.patch new file mode 100644 index 0000000..e60acf8 --- /dev/null +++ b/packaging/pr_13990_14189.patch @@ -0,0 +1,145 @@ +diff --git a/bfd/ChangeLog b/bfd/ChangeLog +index 1f6c1a0..0c81318 100644 +--- a/bfd/ChangeLog ++++ b/bfd/ChangeLog +@@ -1,3 +1,15 @@ ++2012-06-29 Nick Clifton ++ ++ PR ld/14189 ++ * elf32-arm.c (elf32_arm_check_relocs): Do not increment refcount ++ for locally bound symbols. ++ ++2012-04-24 Hans-Peter Nilsson ++ ++ PR ld/13990 ++ * elf32-arm.c (elf32_arm_gc_sweep_hook): Handle a forced-local ++ symbol, where PLT refcount is set to -1. ++ + 2011-12-10 David Daney + + Backport from mainline: +diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c +index 1f6c1a0..8daebe5 100644 +--- a/bfd/elf32-arm.c ++++ b/bfd/elf32-arm.c +@@ -12046,9 +12046,19 @@ elf32_arm_gc_sweep_hook (bfd * abfd, + if (may_need_local_target_p + && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt)) + { +- BFD_ASSERT (root_plt->refcount > 0); +- root_plt->refcount -= 1; +- ++ /* If PLT refcount book-keeping is wrong and too low, we'll ++ see a zero value (going to -1) for the root PLT reference ++ count. */ ++ if (root_plt->refcount >= 0) ++ { ++ BFD_ASSERT (root_plt->refcount != 0); ++ root_plt->refcount -= 1; ++ } ++ else ++ /* A value of -1 means the symbol has become local, forced ++ or seeing a hidden definition. Any other negative value ++ is an error. */ ++ BFD_ASSERT (root_plt->refcount == -1); + if (!call_reloc_p) + arm_plt->noncall_refcount--; + +@@ -12408,7 +12418,8 @@ elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info, + + /* If the symbol is a function that doesn't bind locally, + this relocation will need a PLT entry. */ +- root_plt->refcount += 1; ++ if (root_plt->refcount != -1) ++ root_plt->refcount += 1; + + if (!call_reloc_p) + arm_plt->noncall_refcount++; +diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp +index c7a0b2c..8631466 100644 +--- a/ld/testsuite/ld-arm/arm-elf.exp ++++ b/ld/testsuite/ld-arm/arm-elf.exp +@@ -733,3 +733,4 @@ run_dump_test "attr-merge-vfp-6r" + run_dump_test "attr-merge-incompatible" + run_dump_test "unresolved-1" + run_dump_test "unresolved-1-dyn" ++run_dump_test "gc-hidden-1" +diff --git a/ld/testsuite/ld-arm/gc-hidden-1.d b/ld/testsuite/ld-arm/gc-hidden-1.d +new file mode 100644 +index 0000000..80c7e9e +--- /dev/null ++++ b/ld/testsuite/ld-arm/gc-hidden-1.d +@@ -0,0 +1,25 @@ ++#target: arm*-*-*eabi ++#source: main.s ++#source: gcdfn.s ++#source: hidfn.s ++#ld: --gc-sections --shared --version-script hideall.ld ++#objdump: -dRT ++ ++# See PR ld/13990: a forced-local PLT reference to a ++# forced-local symbol is GC'ed, trigging a BFD_ASSERT. ++ ++.*: file format elf32-.* ++ ++DYNAMIC SYMBOL TABLE: ++0+124 l d .text 0+ .text ++0+ g DO \*ABS\* 0+ NS NS ++ ++Disassembly of section .text: ++ ++0+124 <_start>: ++ 124: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) ++ 128: eb000000 bl 130 ++ 12c: e8bd8000 pop {pc} ++ ++0+130 : ++ 130: e8bd8000 pop {pc} +diff --git a/ld/testsuite/ld-arm/gcdfn.s b/ld/testsuite/ld-arm/gcdfn.s +new file mode 100644 +index 0000000..f2afae7 +--- /dev/null ++++ b/ld/testsuite/ld-arm/gcdfn.s +@@ -0,0 +1,8 @@ ++ .text ++ .globl gcdfn ++ .type gcdfn, %function ++gcdfn: ++ str lr, [sp, #-4]! ++ bl hidfn(PLT) ++ ldmfd sp!, {pc} ++ .size gcdfn, . - gcdfn +diff --git a/ld/testsuite/ld-arm/hideall.ld b/ld/testsuite/ld-arm/hideall.ld +new file mode 100644 +index 0000000..077d6b5 +--- /dev/null ++++ b/ld/testsuite/ld-arm/hideall.ld +@@ -0,0 +1 @@ ++NS { local: *; }; +diff --git a/ld/testsuite/ld-arm/hidfn.s b/ld/testsuite/ld-arm/hidfn.s +new file mode 100644 +index 0000000..a66b558 +--- /dev/null ++++ b/ld/testsuite/ld-arm/hidfn.s +@@ -0,0 +1,7 @@ ++ .text ++ .globl hidfn ++ .hidden hidfn ++ .type hidfn, %function ++hidfn: ++ ldmfd sp!, {pc} ++ .size hidfn, . - hidfn +diff --git a/ld/testsuite/ld-arm/main.s b/ld/testsuite/ld-arm/main.s +new file mode 100644 +index 0000000..046d19d +--- /dev/null ++++ b/ld/testsuite/ld-arm/main.s +@@ -0,0 +1,8 @@ ++ .text ++ .globl _start ++ .type _start, %function ++_start: ++ str lr, [sp, #-4]! ++ bl hidfn(PLT) ++ ldmfd sp!, {pc} ++ .size _start, . - _start diff --git a/packaging/precheckin.sh b/packaging/precheckin.sh index acf9326..74c1717 100644 --- a/packaging/precheckin.sh +++ b/packaging/precheckin.sh @@ -2,7 +2,7 @@ NAME=binutils SPECNAME=${NAME}.spec -ARCHES="armv5tel armv7l armv7hl armv7nhl" +ARCHES="armv5tel armv6l armv7l armv7hl armv7nhl mipsel" TOBASELIBS="" TOBASELIBS_ARCH="" @@ -15,16 +15,19 @@ echo -n "arch i586 targets " > baselibs.conf for i in ${ARCHES} ; do # cross spec files cat ./${SPECNAME} | sed -e "s#Name: .*#Name: cross-${i}-${NAME}#" > ./cross-${i}-${NAME}.spec - cat ./${SPECNAME} | sed -e "s#Name: .*#Name: cross-${i}-${NAME}-accel#" > ./cross-${i}-${NAME}-accel.spec + cat ./${SPECNAME} | sed -e "s#Name: .*#Name: cross-${i}-${NAME}-accel-%{!?x64:x86}%{?x64}#" > ./cross-${i}-${NAME}-accel.spec # baselibs.conf - part 2 test ! x"$i" = x"" && echo -n "${i}:${i} " >> baselibs.conf done +echo "" >> baselibs.conf +cat baselibs.conf | sed -e "s/i586/x86_64/" >> baselibs.conf + # baselibs.conf - part 3 echo "" >> baselibs.conf for i in ${ARCHES} ; do echo "" >> baselibs.conf -echo "cross-${i}-${NAME}-accel +echo "cross-${i}-${NAME}-accel-@X86@ targettype x86 block! targettype 32bit block!" >> baselibs.conf for j in ${ARCHES//${i}} ; do @@ -34,8 +37,10 @@ cat >> baselibs.conf << EOF targettype ${i} autoreqprov off targettype ${i} provides "cross-arm-binutils-accel" - targettype ${i} requires "glibc-x86-arm" - targettype ${i} requires "zlib-x86-arm" + targettype ${i} provides "cross-${i}-binutils-accel-${i}" + targettype ${i} requires "cross-arm-gcc-accel" + targettype ${i} requires "eglibc-@X86@-arm" + targettype ${i} requires "zlib-@X86@-arm" targettype ${i} requires "binutils" targettype ${i} prefix /emul/ia32-linux targettype ${i} extension -arm @@ -44,25 +49,35 @@ cat >> baselibs.conf << EOF targettype ${i} -/usr/share/doc targettype ${i} requires "tizen-accelerator" - - - targettype ${i} post " for bin in addr2line ar as c++filt gprov ld nm objcopy objdump ranlib readelf size strings strip ; do" + targettype ${i} post "#set -x" + targettype ${i} post " export GCCVER=\$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype ${i} post " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" targettype ${i} post " binary="/usr/bin/\${bin}" " - targettype ${i} post " if test -e \${binary} -a ! -e \${binary}.orig-arm ; then" - targettype ${i} post " mv \${binary} \${binary}.orig-arm && ln -s \${binary} \${binary}" - targettype ${i} post " else " + targettype ${i} post " if test -L \${binary} -a -e \${binary}.orig-arm ; then" targettype ${i} post " echo "\${binary} not installed or \${binary}.orig-arm already present !" " + targettype ${i} post " else " + targettype ${i} post " mv \${binary} \${binary}.orig-arm && ln -s \${binary} \${binary}" + targettype ${i} post " ln -s \${binary} /usr/lib/gcc/${i}-tizen-linux-gnueabi/\${GCCVER}/\${bin}" targettype ${i} post " fi " targettype ${i} post " done " + targettype ${i} post " ln -sf /usr/bin/ld /usr/lib/gcc/${i}-tizen-linux-gnueabi/\${GCCVER}/ld" + targettype ${i} post " ln -sf /usr/bin/ld.bfd /usr/lib/gcc/${i}-tizen-linux-gnueabi/\${GCCVER}/ld.bfd" + targettype ${i} post " ln -sf /usr/bin/ld.gold /usr/lib/gcc/${i}-tizen-linux-gnueabi/\${GCCVER}/ld.gold" - targettype ${i} preun " for bin in addr2line ar as c++filt gprov ld nm objcopy objdump ranlib readelf size strings strip ; do" + targettype ${i} preun " set -x" + targettype ${i} preun " export GCCVER=\$(LANG=C gcc --version | head -1 | cut -d" " -f5) " + targettype ${i} preun " for bin in addr2line ar as c++filt elfedit gprof ld ld.bfd ld.gold nm objcopy objdump ranlib readelf size strings strip ; do" targettype ${i} preun " binary="/usr/bin/\${bin}" " targettype ${i} preun " if test -e \${binary}.orig-arm ; then" targettype ${i} preun " rm \${binary} && mv \${binary}.orig-arm \${binary}" + targettype ${i} preun " rm /usr/lib/gcc/${i}-tizen-linux-gnueabi/\${GCCVER}/\${bin}" targettype ${i} preun " else " targettype ${i} preun " echo "\${binary}.orig-arm not present !" " targettype ${i} preun " fi " targettype ${i} preun " done " + targettype ${i} preun " rm -f /usr/lib/gcc/${i}-tizen-linux-gnueabi/\${GCCVER}/ld" + targettype ${i} preun " rm -f /usr/lib/gcc/${i}-tizen-linux-gnueabi/\${GCCVER}/ld.bfd" + targettype ${i} preun " rm -f /usr/lib/gcc/${i}-tizen-linux-gnueabi/\${GCCVER}/ld.gold" EOF diff --git a/src-release b/src-release index 8c25e6b..cba4384 100644 --- a/src-release +++ b/src-release @@ -269,7 +269,7 @@ gnats.tar.bz2: $(DIST_SUPPORT) $(GNATS_SUPPORT_DIRS) gnats SUPPORT_FILES="$(GNATS_SUPPORT_DIRS)" .PHONY: gdb.tar.bz2 -GDB_SUPPORT_DIRS= bfd include libiberty opcodes readline sim intl libdecnumber +GDB_SUPPORT_DIRS= bfd include libiberty opcodes readline sim intl libdecnumber cpu gdb.tar.bz2: $(DIST_SUPPORT) $(GDB_SUPPORT_DIRS) gdb $(MAKE) -f $(SELF) gdb-taz TOOL=gdb \ MD5PROG="$(MD5PROG)" \ -- 2.7.4

bRonZek3>t9g@SNm&!P{vGpMU}kW~wPK&>)Q+306U*zDYo(HdIrHJ}#|L^fPr~ zh@E?cetF4)euwlkn)JPK+u81eZP(mh3RjK-1G-!D1!Ss|&?@J%I~<k zTn(OH+U~QeR$FY)X^o8=;6ORpp$fMF5HfTQS5Ln&$j8#{X^tQVbru1X@)1s$|b*-%`9mK&mU=VPyM2KnXH5joaR9f`&>e*`}x zQXiikoJodaUa%r?w_ki7pt~8LVz!$>YR33;4<{$DWu+NS$X9&yh9IbW-~Rr#Cwzac zjPGy$#=Yu)AMB0(L3W<={o5$nG5nSmf#|`D{_6)Plkq^Nv2!SL^kpL`zkG~24*iW$ zi}3j481i%Z$HU&DitG&k8f|#Bx|{Y2?2M~CWmas(m%6E9TwC*#ZyHgVNVkPjKkCIG z*S1yhNb_J8pRb)AUZ<780DHxN&;_~ETIk$lYHsB_!cGR1Ty`^_a$V?$U=6)&q3Cv; z@pc$a2BJWHSf4`EK*l~8-Gc7dF{jM+Ktjc%{-5D}0etu$d@uSBoRSjw+EkNI#z2G1 zn*IKom!6J}XOr2x90_deGVFX)7pDy_lzRJ#>5&>Y*zOmj(@&$l;hv5gmtaSc!hw*` z0^sG{(P+xd6n{fLWte*L9evWx6CuWFs3yjJ!t^RtT+WdzCBGZ822v@QiZ15fIAP@M zsOwHA?FoKIbm1`9Bo6y07Rm$`;~bhvhOLxbl94I*#f;M)Ppy)YwsKV8nq(NpOjqv9b84GlNG5kOO2BLxuweP>nr5Fr8eKIQS zldJw+Ibs*okXwujsrG@~9NhiZS$I{MKQVE9tM2?cMG}c`*rx4tO zjON0fFkv>c7_oc0f0oMeye)V^&msp4@cMNyJ2;yhkwgXqNDfXm^0{#v(_;YSSHZ?; z6@J6+K0qa?mG)V0kMVRHp9B#Y3|wD0pkUNWgMaWm`4sfM|LG7VeYFvfg??Y)Lhzwl zqlGl0-~WH{MVX@!hQp$V>(GZ~yrTCnP+&TtNN}R6A?Sar#umi39J63I1F1KC+JoQy z`ic=hSXC6hM7m5QME)3{j$@UlDps0Bs1CQC&^Xn34C`YZl>nh?AHVD1jyAq)c63pd znq^4{&k+(%KH@Hi!C&iHeXo-wJvUQV0$bkK85pu;|GLRVH zQyO&o(LuA%M<0e4;x`iSg514e)Lf@#;rt%>>IIdX%dsj1g$ZH`H`ct1qahRK5linht5k@w zY}4GYrq@yTRc>|bZ^IsRBm!MK=Fs*^ogz<|1D?wf-o&MK!3Z->Qflxem{*%!AIuor z4|HL0jyqrLGj|NMd8w+1%EK7ne+v_}M`M?BHnB-gfx7%n3mW%nC$V*nbo(hBEymZu zcn_5F#O!GjLn z5Ds!4E(ptV|Fw8XGcEaiB+VL|VIln0j4q+TWSW{3CN2uru2LD+% zQXf=fcdkCC@RUB3JN>2K%1nR!+gqA$kN@uS=@*PivYmA)=B}(5B_k;`Mv&EMSl{YMqF&0~lhAkA7z*48_n(B|1oq9<@5CjpcLbyLy$kD8^FDp$SX5}=U^ zH3C-cmSg1jt}=k%qEE^H2LH~Fd#Pa2V|%wV`(@^mpq0FP$EsLosu{n%nfWHl`>GjJ zUif&IOb=3n^qGvXx|50}y2TKee9MO@=H$Z>*Gs$d;$V!%ZTM~`!?~AkWuI$nANu`k z>ARX1&L0tk0MGGx9ogVJPV7R`)UT-%0<#1hxE2;vHW>{0aPXI)C8`EyVi=DxM{A}E zYLfFn2=3TKg_*Suh#8zGwRkDt(;7@eD&Gr~wV$NTXBx%)Npbr$%XAFVdBT|w3DJWDTtiM<9Fl!w|Dw7M<0O`Y3kQw8MSJ2P--vsx2d%_jH~{UxgAQ!t1EEN`3%oc;FkGL_ zZ2dO7XPWMu3iFU7hBa$YEs1O4m;!y}1Sq$AP^ z9DD#k(dLcHShZij(55o54brVm!fS#7t$Ul$Q&jedb>>7x3D8uEW;yemtRy774}8)R z1s*05HoOvMmuO3V3cEIEl{Ar2@hP^5=Kb(UgWO_}6O4B6$%Gir)h!v@?Gf$a84Ofo z8%Si7spMSNh}OFK4{s!`F3ou>(%WgVBx_8Er8yh^T!ZcAyiC=U4>s4#$Azo4U**zj ztldyFk+h`fK+PW~E!`U5Mj2mJX{}h1zR*~GGO%ftT0E|>QHAvHWm-d>`w=R+#htLr z`|<{c6tt#sorbHK(rJM35jXES*tG_-txZRrW#%-&arWEnv29OI+S198r#3t?TW$Gf z$nPnj?E+$cZVo_F1o|S<(BOLpW#frfI;)?YxovzZ2)s-V!)nVOP?-jEEU~U$+ZjRbva0oY>C{G1LB+?z*XRp(rO4nkzSp8a?FM@pZ2HNv^X0aHLpQU zBB@31_&};gU?A8LlvQ&riW8C9+LtV4Qf2a_OW ztwzy|Az%1djF0)-!@qy^_rX76`+fC0^Y8pL1gblCH3(hm>+EKWIa&-NxgXBM431I4 zJIeVl45GvJgyy~tnw@@`{eP`rP5QI_0)MYj*}aL*BhW#cVUGhC^YK5fv+^&IC_zRwQ$WG?23;C7{v@T{)!nU_2r|74^BrP9=*ODb9&P^IJE`IaSJnv zaYsTKPG)7au|wc#Q37F&Ndb8$N+Iy%Fu;niQFi_+xi>~;Z2H2soNTnJ`Pm5~R|rtF zB;hrZWHY(hNrO`#L&%Q`qW82af$l{~OwtjOkijJ;A7fA37A#ysM`ZUj<_3el)(DYB z3)Js#MdnWzhHWu}UGjqSi&?jZCOLQA7E~LDm4ZwG;wpluCogi2J4l-jmrc0r3$!Hk z89vnnnVi`a+c{2&y4RpXd{H0{6}?fMqYZ~`D@1d0Fij7OG|jZy0~Yp2+xNO-iuNw# zHdr^-ZA&Y*eXq1=0-1A_td?sVVxJLVoR7>EY8ch4XKih!Fcth;ZiRQ;9en$D%88vO zJ~Nu@w7htmDmkIM1`;IxsYNIfz=E}frT?ee^kdp^?Db#=!TB|BJAGU+b#J%XsDJ_( z`hRMe&STFtXL}4||4+3^PK`8V;WmJl5Kc&1ae-=Dc`5}|s*$pg`Aa0sTVhW6AYw!L z*fGzU?t6^W1@Sor+ot$r@i#E$7c<0|Y)xuCQ{c=u=9=`&TC-MU#(|Ehzk(0X6*hXw zC&uSHv|xnDBN#N4Q0^cHh`H#}20zoBSIvgph}P_D7~yQB6^knRGQ>6to-tBm$S9_*)X*%0)IDu%|3th6p@%WlulbKclVb^JK!6;3;04eos zoKT61#){t|!9whGQ%Kx{%H>Q6ltEl`%j!t%hY~f8FSta<)v~k^FTeIT%IkNo-6@s6 zzRvKo-R!salMAt@tZ0nA@{hCrLL4YVPidf;T(bhD3B_0nw^yWJ28G~z@k?d+M^A}V~8+lxxSPcU*2kCDd{v9Ya-bC)s~XM^~@V>YeoZFVeH^s}mY?x#BU#lpP_|o2_8B)3 zLUG$V_u8~U8^1!K4zE&cz~^=9wI#xGt+jWcSRx2W!FrX_m2HJ~u%k%tR{rl)qzB&e zA*k>FA8J*9VsBD4Ydn6(1{hoJ9*5Z6&vB*i`sc~J6=j5M)&C{bZtZsQ`~NzIZu=$} z@LmH!FGkIdw%Z7rMS?OqY&05()_8hzczYa)Ty0YzNPY3e7YvOHtg;~@6k)9F^CIFHT>eOrC*4rxIeL0X{zP;* zo&&&<2`wo{h~G9BLwYrtnYt|o!7>ry#s7YE zT2b+7c@@q4GCLISK9JY?0B3~p$A?=htLr~`)s)5jk&Aj*9~-8?e6hT#GIE#J9&(Kl zab{~Y)Cso;SP6c{vVIklR#ei6W*SjRzv9>P)eMOn(PJ8Jzy(UmcGAL6{d?c+a$j@% zvsChd+@hO5Jzm@Ter3B|MCu&kjasg6UQPphr-9A6`ZU1S;Oy`%`9T$en`}C2DqPB1 z8Eg+#I{=Gr6@zX7(bR7`jAD`NTZ4V8+9sG(RT)H88?{vkb#BEAyzS-H#<|*vD-sru zptYqLKxp|a<{Gord!4evn=+~e1B!@~W*{GJDR9FrwR|}j)J^8Osf-();rhIoICr95 z8EcYf?5Hwf_zh!HF=#bbJME-N?}~PEFwPjM5kpv!87l{(zfU+?c-&b28Wah3qj(rU z&Z|TnYQj(zHwYf1LGe7r-cWlS@OK2gw)fZ7`+=4TE8$vY+B>v)&AZlA?G@K*=b{`D z#}3_z0#{0& zmk-i*w(%?T4bprK$rpms%(-eRkpXK?BARrlUlpFs49#xb2jzbV4^1E zX;SEtkD%#2J;2f(Wp25*>QPipUDZS;t#Rvxc|oxjm&(oan7?outl)bMU=Een%Wx?& zr}kL27jRP{<^C!r>N~YHM}_KMsxwEP6Au14GJT>pjqY5a^FuZH@WtBp z`bIR`X)_eLm1;MYu~tbi`it5N^6;<;RFC$)Gtaq;!hke$bmk;ThU%%Y7itXtK5_nJ z5J{9DZob@U;!R9HtS5-O4VqO0YjTzJoSYB$#)r97@wf5ojIC3V$l#gokp*j8bI+UR z$h~?&n$+qu*IX32qD9pX`fhFsP78_}Jb6aqBW#XF2O2eQpzfuhFoSJzM1yrL8r}@Y zvxCvY)%C4vgnZ?wh4%uB6^0{-49+cbW>j(CiD(K(hNEQJ-YoqiWsUIKA zg~~HUgA!a*YwGAbWdgPNRBak}<4Nfkw;4k*w{o`F-Bv3uwg8cue4-{vfCB_;@SkKrEAF@9jd!fTOdJDI z$$JY*DN%MWla|Faj7w1J4|h>{xbhqfuw!F$lo2~+`J$XYnqQIp7au+Bd-1BRGu&F| zn<89G6|QLO!CYHmW{K9yBx^+N`gTjxe`Nkq@@10WZi9==tzXj#cMmR1`+&Iifpa=d zf5e6ezQg{6S2=jk+eslw;lY;bt;{ssMsQ(yxcT(y_L?sl{WQlso^#rhjg9dJt_?o2 z;N;RaazI;xwe8@aJnJzmlNZeUO8y1$P&u^1D94WmvHxrYwB8v%c}{`vNFR!(wMySu;F=p&?7hXtZHe)IIU2?^o^(G*t9x zatZjmYKK82XIuY$?8`rw>91A0$1XP>BXxEE{z6Vkp3yR9SH)K=kBqrJO!k@arCg3$ zx|-9uN~hmI+QN92tBeXw)q-_B$*nDI$9&tG`>S*L=%vw^-P0lRU?XVQcJ!q6iW zrxOO^9NyB z-(>>4fOsz)@5z20AaIkca=f)TDlP9^0SlXi$bPoqFBW^}y6L&n-xJLrnKrw#$lo66 z_2g8^l`VMf`!nfGOPgi#T z_{Tr?msaHzB(HLFGLH5h>ba#4ja-j=x zY%@D?oAp?l?-AsAW!cY`i2|!i_2UO&ekpuRVj_-)3bM2F(k|vjUMTBE`$aQc|CU>R zI6hLrUWrj9&y)y&0*+s>I45MD<-NDNV-_LF->E<}3P(z97Gkrb)3bouQ(+dN87=5LdcS~GA#0wSlT`BY+VfX0z?*n=q7lL^ z+|v(B_Y9V>q?Hu2(B2Jh)_OeKx5aS?V0Qj-XpeYXkDFZ>Zo8m~Us2V1c98ULV-y?E z*B*hiBDVdVm1kN>kLz_rl9LJzs5L_a0XKC?R}4~1E1Bi2Bu#E^e|;r(R+AQN+f5d> z-nM0Tl8^Z$w#O&SG*D86*^2+SG}Ny%jd_bMGX)rt(}Bo2(k{Lw>9~CgZSc}*Txk_- zmuZ&DTgZRsN)ex|tg-#)M52KyX8nxh_GHo=mIii}gmmJ`t^909!s%>0{|3HE++{jH z%Tvt3jE4u9;v%C9P)#m`oz2bXhT+I`tdsJ^7mo?TRUX%i;TNl;=@H>fek5NW_A)yp z+15^HkXt+U(R*|riGN>`v-#|BMppLf<3+ZW&J;PJ8cMNGG!}L{be6dbZUNU&3l$HL z5AB;HhS)p@SXPo-YUCqg7{JprFE1Mm#rg7Qi^hc?feui~wLQxGMcNF9lpWLiRi%s$ zQ*nKJ#aNBwSw7hVlO1{V2Lm!E1qpbaQX`O{)@gTdM98LIf;TNik!l1fu{uUe^bq;V ztDyL(E5!VaV~9oZLASs)&U#(=a;(r_GH+*N0qPo;V~5Yw0E4zyp8R}O9|8L*@`&ya z58e-T(}44Oi+DFy*9f@-S_h~2!~9np_qCxJr!lRhqg@LBaI80x$Sz zyVeCxp_hy(Mn=1;L3W=n3^6aUo4O0-*Veg4`Ohp!@Gv&^ ztBZm%eD$tTwh)KQ%R1_OJ^1O~H>qzMAjI3n4R!&~Q6E#TUG+ekOBKVkYbCiRl0X*F znp>1fnkL0zt8kQL-@9#6y0m$i9jlnXDB>nTu4Bul`+Bu0MX|J7Njc?e0>ll8qaHP3 zLz#^areAa6hj9$AHx|~{y?}-WUc0RIhMH*2PC3tlrPmviHzl7)`N4duPv;Qj;jT(} z!qirK^;%Z2t1`<>8C$UtnulGJzbB`F;lTOY463Rbi9rT#0*W))v z<6iH#8jHoCOgj*a2PG{t_oz&io){0eA@{5><+rUi&d)B;Y86hxw#6r9h0j`re<76} zH@z`E(Cct|Y@*QXX{$`V-r;eR%f7V#cDax7l$=UFoms1Li?p9{WZ+gQbC} z;K}P@v%LcZMlgrv(Jl>3Ct9@}9!Y)sfcXl%Wrfb&4pr5^)*EM4GkJuMY=0!%Ly7=Z z#fb(<<=0wmP+qRDLoA}EXQ|AI#z<_f7qr&W@zpcXmUI{LyS8>9{U6h)iim9oGmL8_BI7pm%IR>mMGoe58a`orjyiW4?XF!3--5N zt(E;s8$%(}D?fbLH_m}1NB-bZ`TgML!J`LcGKv7xPHd3R9s$!B-pB}Unu#hpynUBWIq0ARAXh@u_d_MSCD6ZrYOY>~sLXnOX`p8S zPlj6OE|-`)M}9y6R=lrk8=mBp$e3XGG&a&HH?l#X*^SY~kGebj`5DlK-%bAo*K>*d z(sSh3XgOJX)*0obi4-q7cQHtl#D+RXVYh)rrzP}-FIJwcZ#>;3VTxi1foxePx!Fs4 zEspKc#J&p6SA~&Dc4cvFKQ-g4Jul5zD=LY(Q{USa%(1PMy}C>8d^?*oxfDz3& z1+NjRBf%8Svp5AEG}?8o124E{D$iFedf2SVS#fDyJC43NslV0^)*ZF9S7yCD81JKW zlF?3!{@Qzc13|jL8H63SJh)0osIyi#HLJWdQ@#UY)k+LGvI|kok*YxSaYdekTsR{J zGYuVctmdhE0I&vIL=$}vms3lBR+b=fa+D_lL`5fYNEsEK)QSYSh3DMhtG=^uGKiq9?kqlejU; zW;jXutG0K=Td#M;b~uQZ;-Pe@R{zP$4*%P@p6c;jfguZYk5?)kzqhNxv`CrgPYlc@ zpT}n$pdAkzG1-`UMKsMzJm&dXwN{jH`mQd}$8jUv^&2q#owrgqKy#J)?HYrzCYEWf z8HbkspR3vGJau6}u~H_=CT7WO=Mpt-YyK|f-Z#71F|LWY7RmsrkP0k$|`9`CNxlJ6l$Vmb5AoA=r)C)TqCevx zOS`8EO110EMm0Xth%MMR6=&ya?>uc0pJqfYQODj{dEmd*{GtVy-=Mni+_BwkX-yY) zAq>}Y;_9$uStWo%^D6?R-2Jcasv27{V6>~vs1|oI*?|3@roV>LMX7dm1qL0s-{QjR zh0s7d;a1v}D@%6ex7YL?l|i-8)^=6PrA|1&0K&0P203?nY^pZHPRaspDk=AxwwAT# z%K99Xi*X!qcbz^>V^c$6Uk5!2D(EDtEx4+&RV^r)Alj>vuKvxqIxEu%*M-UOZq=qz z9K9QT{58H1tGG=xJV|s`J3@#Vw9MxvYmq|QoZtAL>B!qQDECM=g#=xU4*q9)^E?|t z^b`2Cm>*srKgT>bIeGhZdbah(q$@pluWB32{{@fZ2HFZEnGgcHICSg0t|w>;Is{s- zD7Z9n~^@9lV|mh?bGP}J2dPGw=i4a=SV zeQ@x1&I8-!;WU5y_V0J^{Qd6lX(K+(0=b;z%XD_c4U%{OVwJ|6>>{-}a>WxtK#`qs zPw zsIHr33H`>#^A}njF>=VpWEg(P4L$l>MeZfxC~q7(R8BevL_$I@)QVAJLlw53?SGoR z;nGROCGI}LEGqp$N>_0K1}(LGt=i4x#4tK8%397Su5u2m;JsOj0wI@!Mpdr^8w)_= z5>{OEcqzq;vOl8G)m?Rt*bt;lZ{ym{g7_4*GtgZM9`|UxIXp~yls5~?Lzw&qQHrjb z#u%Nmk^?%`qcL%IMwA|sQVa)+Mictn(qg#Wds-H24%6wwFEM21!!8V}g z15VdqLAs>aHMg5(Z<+im@an&Dsep6Lfk@A8AKd=92#tEy4xeM_BOIs7L_O_)d%J)4 zjw95&zo*GdvkhRxHX?+!jB5*0((vBTsHg)K;S&!cQZWv~cKar*#aPamd0gemD13Sd zg}J?bd++w~?Z>yD|0BptXh6zBh|*zd7)4NlB)Q8!)BeN$zmwOQD4%V9! z=iT4OZ|m+M_AULsan)hE3gKRHjvC1893n+WR~&UclctW7#Lpk25NW6T<1r2`bzAyw zLl1U1QEOo*o%XD3KUrTFUNTPI+L4~6{n=4&AW)EHZCA$ZCi`lsZ@Dx{|819Cw5!*u z&;Bx)S!x`V$W1GDIAfs8C;R;=j{g|rXDD3@=f6*y$+Ht>+H1EiBEa!O|9)g8iUE?* zYGQsV(*bJz!x3xr@WK1xaUyQjwNQq4(ysw#g}o=d1K(AK5~EV!h+1>>y)WiumxgAQ zD|?0iTuqFkt*V_ojardBiz0J$Di_;_56V}KOJfScQ=YS6X=3#wjc$Me>Ds91!E31P zCXYs+1cH;pQI$5db3h{ysSr&+>(x=S#dlhvh+8!J4<8h-@EmM;kk@Z|GtG!xb{#7u za1KbX0iv&Vo(f_02f8W=kg#^TKzap;mim5i%tzTtFW%v+Ugu`js-x_7u9K|GvIz#n zhio$Tto<5@3ID{Lg6&T@4%k|n&n7@h#Ku(gAuLNAIoVk~a-$F$VPH5D68Ufs>Mo*a z(+1y?pGX^8|GTZV?N`rt484;T7HC(-Ff{HLerqZO+EO+d$D}1PcxRdFiO#`$z!h=# z898c4y#ia!*K`*9^SiGRtI10sAX+gWe3Oko9_$@<0LUi2%5mc6>l_2#A0GZgfGU^R z?H%@?ph~q!EJkzX#|0~{%+m$&+@5MEYkie-?MTRF_3;tr5NR0~aI6++ZXSZQ3aP=& z_Ue#C49bsIg@zK%w15d|>do;V6+&+DA+CpI)m;|rPS=!PY0xf$+TK*D(IRZi9K02_ zwY~F~=WB2J5w3Lsy*=V;I=`0K#^cKYOi3GVPqI+Di(kIr*7≈W9b#))f(49^uvh zZwlZVwgR`bjB(qO+}|_gP!7_-$w4d`Y{n&Pq}BD9_pTPL+2UNy5^IZ3rB3Rpgy|}b z*vI1bwu4ORP>Y$)<3@8JnM48_L>o;cbhOhsM7{%;;h%19MG#oxl;Fz>+V>L6{V3Uv zz5}wZin{w*8iFsKt^E0%tNuQIxeVXYC8GB*>=d^?6>8JwvNN zrZ8h;lb>U@8`Vw+iuLs##1%60b?Pd4C{*Xq?6Y5J6Y8)B{?{0vg`!T?VRdKCThM@dR+U`DH$n}{d!1#NoT}-!8-fil02kD)y^MN z{}`$?LtJUeDvU_H7Ca?h^402?pi=J`1>Lk^*9V$4l1K4LtQmMQ>Xj=38}{-Xf8T~J zG;zqmD_ffXn`cLNBKn@4DdwGzQC?YF=7#hNSit* zpAIqUN}O~TS<^kcX^t^)*Mvmkz?EFKtIH&kBG}6W{BYz61u(+ZFXVs%X}{HubTxJj z#%hooRouMA)>tfMnfDQ236n&s7E;UE8v9HOY^XYg5T3t=Xwo|$bTE5p!;|*kALbkgVI;yIL z$M~OuivNX?zD9k-vBkY@WoOrdVt2JoZ+dKEL{26Hhf5ryq`9$yAbh9It>0(_AS3U~ z065v*sz9e{a12G2ulK3ex9_2?kMPL*eS2TEkWs3MFx=#(s%eD*Vqu#>eX=t4OlgW& z+%Xx$4Cctg$4>>MnT2g%iTUEejoxqE(7+6PHwX8AryDKr;_Z9$H+Lz2qeno|eUx`^ zrE6oc;)H~}4Rb4fo)>aG{lWNvq!H}bRqXE^dsEyS=uh4qTwJ=eBmfz*9|3w zU=YRqTh&`HqgEds;P{|dnIrl(MmB|rJiZgz!{r|7rza4lmxJyyDJ# z+)Payc78rm;2jHNSn5!UGenXvZ%)5lwkq2ud-c^s+L=RjX|>#|-5h$G&b==fH(-;+ zj+L+uV(PhKdq`0+w~+qyAb{<@=Vf4cQjsXJHP?cYA6r?>Rm{2xh>wjqjo9TRKXTdy zXBhb34*;(=9C8yS7Z=Iq0>&J?y3GKq7UiG7rp1i;EgGQ+l-*~NN6Kd)t@4R6Nuhww zC9-2~pzbhGMS5v_N5^0V{fpBpi(qr27%d`tW(+XdMbbV~gy2r3)0W zwuj@5EGn1djq(N^?PG3u`e=q6D_Fj&je5X~%0;^Y-ah~6|MJES{-R21nZp~+!d&NT zPDdlcOO+2^e!Io>K0wC3k{vj&=-hQ7NELN{RurJ~Yv3i@>n$pEfmnU*@>p&yO9xuk z%j?uf@iP@7WbpE(E(d5KlJ+sY)uk4`<2G-&G*(vB9FlDtT#kI0Z_c=KfFlvGXkG;8 zaqt}NYxyoI3*lkQ{8%-GJCgp~do!}mJ@qa;<3Du$I^&ryym&x9Kq)CLlT4l;my2eW zYo@{NQxB1>5tBng^X>9hBL-EhxUHRVhMXsCP=OJf z{yohaxcbwuGinDNd)Ol5aeiE5Th-ae2F)FPP>#6E*WLjP#p|y#pbD^(fExA@aA^{d zG$op_EHgd~@LB=5%I7hxO`gc#NozpOf;T}07re={0w;JboTue?G!f{=Nvb2U;-v1p zUGg8+EOp<_xWE%$uC8BW$AlUtuG9jC{-tyc3>nEcV%=ShYD*CBv-(lEzUx%wvnVnh zSyYaKSV|`_q{%6j@t4>M5$ix=FvQ2`3IINfT~+G=TS>1EM&^Wx)`$yo(mw8^A*fdI zh~*l!8a8RzSlqSEr#2n1WSiNjAMm{}lZw<;%v5I_v3Le_K0?ZwSr5?B4Wo0t#B`gZ zVt2p?et0_`u|hw?M8(G86Ef3H)@nu}_rY%H>kFx;Bg%LRh}TnQ^5KKTShDVdLKUqy zNg|8B!_0~;wWfT$pXF{- zjC+l)QRGH%$(?&ZZ@DWRT3gOr<(+92#n-kIDxIBEq%dA2)gYp0Nx(5WI)*i;e8QCL z6W9)UK===;UR5;CPNU%J5m+ac1@$8Bq`Up79TN}A>rQN4C$#RjUfM|0Z+lhhh)R9o zIkN(K3i}!B11_}GAfljg(w@A6rTFGc1T?sNZm1n$DQR+ncHgwpdiIi#YB6S^roO?` z5FpfU$pvc$f5f3-F`$=MmBt#f|aCAm)$%3GacXgL3Uf<*1!`=g5 zA4i)CL%PsyeglZpmnkWEp{Z9GE^|Jd7hvsp_+ov1J; zf=z<{t`Ner9%7 zN?x5+sgnhz9>Z(Ga_zD3wEWnerldpwrBBDG2M9);&R9H8lVHeiAmqnw3463px^Tk_ zc8Qu$utOZX*glWd$-U8g^3_-3vGAJkTdI6(tsPGVcS(st-lAqgy@P$cQ4uKdP^0T09$TW|*f_ zrZY0@K$sB^3L6`0TjHn%bp&J=;+dD z+VwJ^`iLhv9p8G@!S3Z z5q}k5k<6vdD4+lUev6BpsC93h#kS&wK1HdoOM&k;hrrwP(0H`*Gw6vh3syGf{u+%N}B{n1rOf6 z*%&q9sn(-vERmqT4tO7^micV51W(_%77SS_@ zAhFG+MXzLq=xZtKJ=7H8z%8)ONS`q=)|}9&I|@|4~0VK3W(=v7uk@1N;woQ!WPE7-m0&#h@Y`J#$w^yj7uX(lRg?H#3d7g&5+JT z%(LiHL6c$;p@Lzn&S*Owj*0*|wwB!wHt?8jwe*^1G+>IW$(?7~VP%P*R=hxnB}b!A zAGr2;xu=lm@9e@Jh~V1R*5=mze&VIrJkz9;r{tjj2m;FHMX}sdsog!mIJmC5=uc}; z3NSk@JQ%a=reMC+tK@-K7N)^g?~FM~sXOTR%u<3utW0d}rsc-l%RCOIu`&v3@5 z4Pt|fplqrPd%U(#q1`iwx~)V-n5z&Yn!F>E{o5EzxWL9ZiG6bS-)0o_$hKkOQdU(1 zQ$r$7FK+lT;Elx;C(G03$d~)Uy;l|c7l46f8xoP}-p&{sxO~HjX(L8+J+W^skF1)K zS1`!Y+aczj{$zi-KUXEVdgjqo!sOnnb))yJWs<@YbYUP=9qinEj9W0Hb2Z8tkV^@c zcYM^s*4-`Y_AV!`5e;bTx;NVgr$QgvW4Ww&jw3h*@$xq0pw~%&%yYzLI;pE-i;PEu z+UBS^kuT>Zqp>E5l1ZliKeRq2B(PhsYy$xZb zXxvTu3;x|OF8DE+-TV+%WQ1_m>_+b?^n5fa;@6G>G42ObCOCqMhf<8p{(IwheYXrW zNC;wL!5il$56#O#tN}8Rw8GCecLKpq$HyYmOi(bm4P`n&!QDfZ1doLYG{I|K%$y|Q#uN$$zYm$I z702PcLB1>%RU@^298wemPS_C-+&R>ujGX6n2`|c*X{>SDjs3zb#}wcAuY|OC} z-h_=%KLSk$b8Wjl5|P<_00IcZOi+B<64xyD4na5we-rP}G=cpu2RHZ8act=d#F(bN z&=E2o$x_$F!IP3<0gKcsLXOZbhg84U4z=EYkH^y(9<%S51ka`)`%8AK{H@#l6%vGn zy7PAbr~Z=reT{hYqQ8U!8yd&=Z6#R}*0E6Zb)_PEd&cwUFwGvR3C@8Sno;AF7tg4S zeur-#>C46RqWxtAoAhKU*MQR#Q|WO!(J409-QMb-^_MCwBTb$6m*&)efKx4=Yf%9@ z*i62C3|1upP0Ayd#u+&WDQed$unBTMIlEuqoWAM2nBk$b_|^0bf`ZSFRf?2I88baqA^)_~PSGJyf$6+X`QvBhopMKzB(TTo?XFi+QtEVrw)}C=NCZwNMWCeP8S!Fap z*OgYKxc=rd<(_T4+9fmmE~)4HOLkC0N5(^INCh6hT7SN}3rR&(h27?hF7m-=iB5^R z^&?tJKii}*V)FL-CbFq(+~DV?rNDPTK3RFmr54+p1ENE*5Fq+aQ}f|3?VM|Mp8xog z%h#TAZt2BrUj5?_q&Ei->|R)lDnTl*SB@*1A{I^;WnR8~virje&`eph^YeYEo}4`Q ztraV=-7WFM_D}wHD@SoY@y_M#WPQc^9K!iTib~@6I`4n7ZL4O13-x68<6CTIAUDl4 zd&r7??!ez(IgPTD4EArCx7=!$Uru`0+)8P>y zxR%JGUFjbNnEI+qLgdXzWVbPWwqh=tOAUf-lVfln5SXkpaJ84qI1 zVzEi>&Vath!DUYuX25y~-s&g8@;a{(;8=?--nsbmZYw5bM|ERHEMENrEuvp^W1`N2 z-Zco*_t{YnSE3Yo{S=0}V?m#xrv?e_pY6$C#|$4wX>5+5!>gx;z zy+f+Zo1yruqLJ=MUJ_j|9mC6=-KXnY+dCx2{q8G-FMdB;+er?p;CrLOx8kjHSLGe_ z8IoDy<(EU^jqs8U;UbR7pMf7;a~;0W;l=J79sFRrK?muB%XP1duj2X#L2zVMV#&F zIQ*5Q(Y@7c$~(gK9xMy4gHp(?B+hG2CK^Ue5AJ&9Via2OxX#R<(^tHBfda4 zC7nk?IU!^bZh!A~m9i8Am25Bp?5tKS*#SWDieE<^K!8aV72qdRo>wG+&N z{n4!=EtZ?JQFZ+eyLGAH$F@_W#Rx^sZpRn+l&WV|47`4IdpD=;5&W9E%~+&@M8MN6 zO2%Oc>B#3@E)a=JOwRa&vk4=Ag#0_pV+JsGCtJ%w8h&(@d)TieQ6p#0 zjXi7DCcI$bd_=4z7bVQsb4N8BesLeF8K7!mg)85NSo@TV9j3inRmy(Pq7moXD`6HY2GH(&FolTYR#8vO5 zdtO-msmG^&i6N_7KzqhKQy0}#2Y^t!019`$MfGBZeln*#&~B?#V>NR>q83wX*X6-V zIMVO}t=c+mh^Z;>38!a#eyiM#-i5{)&T@yBmU?VBu{}aqSlrjd-D2aKol4e+{d*7w zhe!R$m@_bZfpdIQPNVBTfZUT<$1ibt)W>lnf6W)|wz;6SQp68U`jgDH^*RkAxEkti z;5S@uH#k3@>9WiRLfwz_PR{>|vi##exQuC^)FvBeFQ?nH_gp{LzA~&|E|80k z(>=p~+Et;QnJ*f`|4N69UF_)af{V^B852c(;MXYPYn&AZF#hPM-dwxl@buRd?R0Z> zJA{jMMT-0XB~J3IZ&##s)nIFH@r%3RIr-MDZzCj%nU!do_o2f ztv%9z0<0XveYY03IMmn#3mt0}ee4S1vH|r1NJwE@5kZtyLp#yfU2PXzEotKB=pDLq zo0juVC3i?Y$ej*nioyBIe4~Q*x8;6_JE9vh>wqABdh?LyV}= zJY!#aLLI^cWj2`E#d{7bFu|Cl;Unr9TWKz0Z;$B2?>{6+L0Q(1VLDvpWhyCv>SOP9 z6@8SUN_z38_p^bdrojFT(J?^q+%_E^DnEZz3?oPMfP@e~&ji3%m0rD8sfkL_aJ|*t zG`mSP*u?R4xu^THju|3W^SnMTMFeOR&;Ic##Que( ze8iB_BS1gN!C(OEO+}Iy51Z+GAdc#|iA6p!Xr2L&J?BGw6hu%un>dE?C6CjtJX?41 z&Dg~=fr6Fpvh|jHaPx01+Pw01YDAgh{?B>=IN&G*Us+Zy@Lr}osfl`~L&A>_$O^RQ zb{C5Vb|^LB?RYeNKk9{eF1?dq1L*sDIs&VW-?B8dWL0F@=7{(!%N?XJZTuMQ>Yb2Az-8LK$eNk5JKA{_d3z2@u^o8&}=&I$&ZHnNK#Eh zP@NvmBmBeGrU(f{+U=rK-+Z#W^}|Z1O&57NOX_b?lfvXR)y(OYvTP^D59y<=XlzE2 zbr(16)cle@rJdr;08|HX!uJ=q0N7f>uW*VE?5dzb4TuY`s91z|QWMp(pQ zY}kVR@C}tGw9M*$coTOqJijb*DI62IqNUSQMm0DQoqO4sC~O$%iobXq?2(99*%aM? zxL{Y3_`q9rAjkG@;YeVTNH5@a`$o-WlqQx2=<#zKERb^Y5zy_refJ)P>yVw6hI%0q z$InW*bp>f?kZXTX${>u$A$wmJP=5XX3~yUq_a-GTj%v8Fdbqp#xF7(E$)gf6hz!cQ zy1w#!^V!-@z06((ozzO2OI|{Z{UFp-&SNxDio{YmnR(NcZa-&q^vWb^MSUZ>gBzP* z(u_K5?kii2EancA0~x?&?wmGK?@;Qy^UkI&K$VVagQ}tJU(juX?3=VseYUs;WLsK! zJWqRgG81dvi;?;-Us_)tUigV)N1|+ijb9wlOPJK2rT@0=AH(a}Iot(L?_Qkk?$0Ke zsxEc`hSBtVxQ|Dr_aO>Ymdfu_j+!W4ccD`IkXRNiP2=!eN;qI%j@m7HCawTtHeaji zK+V8~&$aLQE3+G~K%?->7L9L7;d~w%4biRJeh zk-UGjTLhx0jncnS;DpiLi)-hiP_?k>7SdYT$%wVJ1Z203v*uASiFBx1Kr`c9?Rvx3KKQCXv2{e7MIl-jTgN> zycl*lo!Lp*sbuy<^jl9$0!!NDe<}e{6I3_X7ACnd4*$`Jn*$?IL8hC z#+l*lu=&XWrHnmum2g4y{?Okg>waO8W^bVdy)=V%+OwadkG%%GRXV!hc@>O;HSGepV~@tQE88Dy!NW zmz!V=OKgnUuDbIPy9{e{cnUNvdgp@gqBrkPhA!P^^IerijzQY{t4q3SyKe<`PQp5D z8Fx4k7>=b3!ytfTg3csIF8{jAEh3J&re3rkOMz3K_yOoy`jFr`s_&6F$6t@ZB+a*c z#qPOt4afQjByxN%Px^%nWt?gJ9Te=Je2|*Gj0>_Z*@L2~bDz?oLi)JY28lOi*BV6* z2K}4+FnD0jFiux*WuP)5v*=ytuu7$qz#3gw^0ZhO_cp2N@LF*`OpN256G+Z9f_pr~${nUDs8RA(3Y zH~l<~F7?cJC4hW+Z#r#1I6XcI!L;?F2YAn#!*n|1*5Ejldc!Z1g{+uJfBBN7qC<0) z>qRcJ3ik8S%JxROY^4&lyfS59EJ}G9?ULSkcHDEFl;KT_5y~Ac;-7cW#>o-<_!R zydg(K!lYoReBq2GBjeX$CV==^+Kb9})1b&KRta33+;=4gFO?JU)I=kSi+4sk&{JIS z7Wl|n3F%{#844v(i)l1;Zn~achHMueE3kF%sN-Rewip*o`cLKLjb7G)h*+u>5X2{L zXTw7uYLUexr4zk^TFFo=<`!3Qo1oj@5mhtLn1y*sBM92b#zh*9*)sIp5E(#%z~^ zZ`C(8AFuChE8d2+g~5&{OamzQcJv1SUuReMTGtK3&!2K(8?3astQ})8#^AO~p)?y| zODTH_`CLQO<{`O({`dQRNVawExewh-n`_ImY|D}?%R1VmiQ)&4L;)nD=<*8n2$lTq zr!DTFqd)x;R87X_^50OSlT7<|-@exEg_XK;>xhaJ1%ap6HVQD5Bu4Y+6^o81+On`p zks2Qwi9h1jW-VA2(CM`9>Zt(rVmIFShys%U{KHf|L~sm=2BQdU>Cg_ArTILPVWZUp z8G9K@#sf=?82rr0XDGf%vz&|+UP2KP3u&9eOBT)PfoV<6LQY2kiSN}%2a5f6vxZ%x zVcvJH|A_4D44=LjAFU(YE}jA`g|9kF1T%$0Eb{j~gr6Xm0m&15&*f8DZgE1xht^MA zvebMKGDRVOaWnS`dz~^)#@Ps$-&|j=)wlwS&h!-r&2C=%J1cNd8+$o~9UGLRIjH9C z_9=3leK@_nyJL=G(Hx|)ay-hdY>bjP(2AcYRAjnxsreK3KPTUFR(0T=JXd4_INe9>h|Psnk*AQjEwBZA zb^7V-;sd;StF!a_yW8yp?hEi13e?n3g2u<3?irN1#^fSjN?duTlE>h+_Yox>@6a5B zFpZLxyp#%sx=P!yZM0_S=NkhGl3~NmFxlAg1KsfCI6dQ>O{PMi*7zO7iOA?Ap8+;{L4fE35tApN-AE+1Fb}nyBc) zT=W7co}n%kXV9B5N6jZCZpCk+Y0@gn3Jym`gJaVQ8{NlTkMXvX%d*!1BnIT@<9|=} zZ$-Da&94i`t62HKr>y(3O?188Tw#+R%se4Xo4u$T*8zKppdv?6`% zh|~HosjKYcitrIT7%3@k9=<5dq*uCq`R>ZBvinSSc9_VFDB6K0hUomuV7G|ArCCm0 zJAk-bwT}>+WdQ4tJmem}ely1*>Qbmn3Z-(2Flialvms6WH$6|#B~YungAp z1QV~bK4MQf#4pa5_`=l%I#GJ07z-(*J6q=ia0XMUvb{zx)yT5X$LT4f{=Cg`T$Hl##k^3HJJ*|S|I2D&6hylWSx9#l0un~cmZ~BL5xv%*4us1x zMc1u?&Ccg0}QHiQliPN#U8!w@%1g_ zy?XQZ?+rc;ij?@5c=cY6hiP=lKOZgL9v;2h{Ph(LUcWm+p1I>0L;V70GfZzNw1YpU z5&ubZESi5jlsLHX%z=$l8f@Ngj=qANVA>x1gsXtCs(VP<;AsN4I>FVm65ukDTv1|b zdt^4%$Qqu4rQFPA6!0T`fhd3n5pp5u;meo%CrG|pDnsPBvfv1nm};-wx-W*w6zKie%|UF$oDJfOHZ-jR>1$6Bd%)u$uq@M6rt%EB4#o zyQrwQyxfmR)FLC zEdzl);PpKMfeTv&0(q0=8wlJS2?RRATc8IYfjh#F;4bi2xF_6UULepF4uHMkbhsB> z0XxA<;P!AW><*uTyTR{ad$`Sft7li};ocW2-a*d2z`0L{WHE3pYy)3}%EudUDEtr1 zhq*OY?>yKV_d>WGTn;B;hk_F_yLq1 zJJi|u9+dqD!d`G148mn_S9mS#2_J#7_g8QLY_lK`=m+gehr{Ji_PP)Dhd;uBut&n?vkc0PwXhW424%lC_0&1+21mjHa0FZki{M(Q zdi)J4{(cRCz=7~^I1s)H_k~+83R=+($#{TMGxnpWslKdzf`s zLZx#a+!sCzm5$UtBMj6=Eahf3#XD7k%(viUj; z4##~LEP%hjd^q%I>u!KUaNiDPr!S!N^*qMra}JdMxsDs)INUoNYun2#D1FyM<@pu$?;XWTK{kLF8xX1C9eWB7D0aXu6;Lh+y*cmElCOel=PTe|a24DN-r{&C?27x} zum^k>ev(DMJ<-|RW|MNM*426 zKp=Dr_H0f4-x&xnv;_Ly9|(K~FNJI2Ne=`9ZDH|)uHV3(xR=6q@N&32ya~!~Pr)wm zGuR!rf5^rg0M&nHLB&5AD*hdCZ}=c28-b5tSNIi_{B{pp`9i34A}|LY165zwL5<@N zLFs!IO3!OB2;YMgKd|j1wtjj+#mk3Erxa>@T?F@rmq8Cc?!rHHZ2zduM<1y4WJ(JJfi!*E*Y@QYiZz1{Lp2sQz&~ z+#Y@krT+`n0CPLNIQmAp^5||6uK-uGcSO|A~ z!H!SUq0%`Msyq+FA@D0W6?S{ku8S7J{91C0FKG-n?cfvgv?f{oV)z9g$Eqn^9Trb0I;cu`5Z2z*&&u(yg-1|Yb z%ki)^tb~eR17+8Ra3^>p91I_U^8XbMhXXcPd&S{SxG#qN;2Nm<{1^^|9bd8YL@|_o zkAnNdo8ch%C2R+~ylU$?7b<^;K-o14mHq=z?d2!f7j}8guB)a(4|h3~osNP-;Yv6H zJ_N_ZtzNg|@Kh-O6Jb9J{wyrS{nvZ8UJKv1cAW=1;=de@&St!aJHl5!ME@4#`(wuT zt*H0UnOo_&!EXYAdgOEd!6rl4Kf})d1gP=mB1m=v zmpS)UQ1-tbDxLeF^0gkSeS86TgFiy)-R>{TUQq3E1l$$QfNFnrQ0W{2JHun32QPzN z;3H7w`WWsBzlVFl?E_iH4*j9z4uaj_QmB0W3u-*L1FC(z1J&Mk%E~hJKMtxNtZ=*v zYTS4R$`1d5z2Gj{S!TQ+0adOkQ1w0^Dj&cfra?b zgnPi%uq#{xhrw5&%Cp0kS!O&L4Ey7*goW^ID7~*h<@XP${?u)&EYtp{K!q=bD*q)= z`Fj#>2S0-ve}9E4=gzIH-G)Kc%WSCnZFK%8Lg~91D!&_`+SLzGdfK$M@w-8_%W+V4 zSO7JyoB-7hRzun47AU(u4W;iVsBw9RHrDMywWoZ?Qdog|KGgW|9F*OEhqK`xZL>^& zUj|h#*TZe#{V*Rs12tZ@ZQ^zE<>yw~wjsC+&PRi4kBf9q|m{C1AJK(#{;s{TeomAecoUKFYx zPlC$-6;S!R9V*^q(6ledU!m;MzJulNQ043mrGKzssQ&W_RDa!Od)r?IL6z?ysC42`b~zQQ zA6^Be_dz%sz6fQPT{_zO?FQ9ugHZ7&K;<*y+{ZxayA;ZD^ zRo}-$rGGwD{580Jk<_X{`zZn>)+ug5^O^CMwzcskU0b{|x^pMn|} zzlAFAF1y+G)fY;x2=;=LpxV!3D7lm2i|}%&cC%=ATb_%c^giU=pFq`X`#r3E$HE}) zgB*{8YCmhB`ps`p{jFW+EVEAA9&UkqDpb1Dq1tT?RC_xPs{Cg_*=3F6dZ>2w15~?d zy{DDm4ay$fq3US}^xzbzax8$#|7z#{H=Km~L#TQjxR-5LaVR~Pz)|oP=)s?$^3%z) z^|~KazU!d+_i<43-d#|7--BvT{kqtE7DMIxAgJ=xLbdCY9Iu6M<9-5u2CwRB>t)s6 zHr*?s;y(eU_f4pJ`yLL1t-INIY6L989fPvxEwB_m4V7+}oGi1xErc3x8lbT^RC&&T zigzuPy&i?K-{;VS+jqC)&;ZBjP;!f%`$DL69)Oa6$1%{u%5{P2*TqnB6;S>7NT_~u zHB>u#8p^J}Ldo^+Y0G;6RJ)xGW$zQ9^xX=#gwMe_a6Oy?2luk=^H|sx_c>7Q;}WQG z<{qg2^%7J$zl55nci6|;xxld$s-Mk+>Q`q&rFS3P3O)?gAJ)MkuvKrXHyfvH2d#r=%kKaMH z&n^2|`|bwSt_C>wI4FCEoc|IiJ*%MXdyn(~1Zp1o6H4#4{cZd23e_%#K-FJ0lpPOu zTmy&V{sOAM>^;D?tD#W)k20u!Qw7y-mcqVpHB>pCfa(w5LfQ9ssP@@@pv`xGsQerN zwceTK+*MHaYlM^GYACyZ3ipLQ2if`!L8W&#R6ZYrvg@C4e>h-pmbsr6g^O^%3m=9D z4zcyL$55MoE>u2;L*;WkRC_!aYMh!4wQg7eWyi~*?6C%_KG(ql_!CsRgZH)b)B>n} zbvc{{pMe^uy#1`b3ZV3sLDkoCsQ!N~)cW{2sQBMN^`~8i+4>m{72W`4r?Z^5`8K`5Q2lWtRQal*+Q%u-gSSK3|7FLYVI%Hc3$g;$ z@C@j|-yHWCZta*4m0kpD9dk02o$iOS!`o2pwN0UIr#VpdKM|__4}!A$T&VG96;!=G z0adOoi|jnn4XWN|LyZR~LfPX{sB&z88vlNWlItMMbLaIb{2_gbj-^fXlaco%B? z`V%Vtz>zlop-}c)36t z|HGiMy&FvF$Pssy?Pd)z<h^G`y`wHVko;!hiZor zsCrxmRh~1T+T$fqcD@z1g-=6`FB_oj_yttE-)6FHmm{G1=`<*PF(~^>7`O z+>=oG{sgK$Y(K@8XBbrfJk)VDR6bsG{1R$BY&F%k=Ppp?%!g|4v!Kd*v~%C&+#8_U zMbGd13egrD&H9{d<|5;eFCcf--WH=H&Ax`87hAJ5*ywbYM+q{6}}%- zdzlC&cc2TO2UV^`&bZcDtjc4l|UxP~TGbp{kLzQ>?nKnN?q3kjgDnB!ve+^W; zrBMCj6sU3KZm9I%fvUeRpxVtA2WFY)?R!FvH*u)^t%j1j((yj1^fy42=PM|Eze1(c z>L9!B7y$Ee4~5EK15|yS3Du9*LA96Hp~kuQq3S1aux;;spvp51${ur_|6-_eTmV&1 z4?>McZ$stdBdC0T2UY&Rp!9Ssv*A5qG44UI5H5A@d!gFJ7Khk;=fF|8E1>dwHB@=m zLgnW%=iUI-E=T^xr(wTFpN`er+K9aMif5=zh6P~+bfQ2BfdYToX4 zsI8|tP;yJ5^05+XygLud9``|&;|=Hk2UNbh%(iy!17(*9Q0;QIb2mcO(@BokLFMa7 z7ydR>eSHVj4*v^_V23$2pHtv4+~+{$_eH37)gfg2Z!f5IZwXZWo#c26RQ+#&8t?w& z+?~s9IrfK2ZmD&NOJ+4~ZxeBTY#?_Yx&FS07^ywV$L{40YR508XO?^3AxcmS$B zzv%owgBmAWS6Y1opwc@S_J{RQ;a9@G@CB%HW`%7%>;Yw`La2Hk3sp}CLFG3BmEMug zeXa|?6{?&MLFMli7yctuy>_Uw<>(F7&Zj}i9SWs?8C3aCg390RQ00CHDj%(?ZTUMv zr9TuZ{v^j5sB~6B_5Z7!`xz*^eGb*G+Re50&V_0p4Q0>c9M6RsKd*zT@5i0{ zOIV1zO~m$(aZu%%?KmH*y)J^X*U`>>p$oqjs=RkV+5Iu7apgUzcstLtcHG->U&o1# z`YH-U})pj{yYs@x|-jW3tLe(*IH-fn>%e}hoTmT2f zZ8@%lt#RK9Wyiar^gjtT9{dJ-!=Z_+KonLuz6fXFE~>Zve>K$j^dMCF>tP9O)sSW0 z<2o2>KDrc^!@J=`*m&37gybj7PcR;n57vTi>6`TTxEy^5?ac_W1 zulHgb?{LTSq2{MM;X&{tI1mnRwDpsK%I{fF_3=1Vxxat~u*VXc|0>5D;Q{#n1QlMi zG%GL%9sxD)ya(03x-ZKLEQXU{C4Ag5_pq$MJlw0G`t$Fw4DPTzD=;0#pvwIy+#bFM zRqh|)SXg+tE&mB{H15}-?C2el6<7wNQ2t*))ldHwS?0O%@o+BgKj2JQb)Az#^dE<6 zfBlZN>9S>E$FQLYlVW(#WmcYeu68r(G{f{`qKDW34D*n$<;N3Dw`S&bIzD;8NUIL*=vEIaz^PxDpP5zd)taceTy;B53LZ?udV5FXrce*$$ z@CNQuIFtFJ-@mXk2_An*mU$m<{R3Hn&=&Nc$9P`Tnt5nlR$xUN#=jS`0!I=r_&Vz% z;@u2C!TtIhcK`a&n|Azp8V2!i|CSwp_k+sM1h@~ZgMHxn(2VO)?fEyT`tA3&9pC4{ zZE&9rH6C6Lw}u;F5BLF8yJ-K8m7fH)K3D=Je=(H(UV!TVUqj6Y+3(u%d?%>%J*aq7 z;jVBYR6U&rHBVj*Ri5Wy4*Ualg?qne-NjJxYhZ7<3TmAEH&lH*2bJI7q1tt~_iewZ zgBl<1gCk-45A3`(8LHfip~`VARDZn7g?|Y(KJWCQ9mf~I{c&%AO0VNb*3QGB@;wjk z3s*b;7of`dyL0dSu`Op2+!Ft}&Rq*t-ZP=bjk}@x&(Bch?emE(R|(X(wG?)NFF>uM ze}Jm@j-T3m41tPQ31z1f;9$507Q!!}#);g|Y&)6<)&H)66X6eV7%ckS+HD!sxU&vw zo$h^M^&J3J?jxYu(~VH}`_#Gj_|m#(z`ppeglY$OJAMI`&pp1f<6{w2J*{x=XB|6y zZR>3k)OdC}RR4SrDqr70%}-;$vGsHn)Ht*Cx7ME1q4Ie;l${=cvhRm*6x{tgJFd-v zRk+tcwf8-~xA~n7)oxCM5x5?ze-->-%N=pN%<(P9PXDpxnhKXAzY3~9Zug_rI~>Yx zbx{51TBv#OamQz&+QrLo8~7Vk`)K=DwrhSw{wYMwb*6?Sjacs-JR(~Hj688kC z{&gBuzMp|=hd)A%mpT2i%{)~Bi*T=mW8l+J@;mmo`Okx@*9JHku7i^M3#y!B24tIc z)9FxpI}FSY6v7Em`92vcKkJ?UE`zd7e>(`OepW-(|I<+Q^9@u!yARGb4>6r=D4o-&B{{UP9zlE~L{QYeEybU(uUJq4IlZIuRdF^7T`nnGu44;ByVfX#B z%|0;(3vn-jY9IGNK#c=i;}C;+wVt1<*N*Khx48L zbjM4f#_d}jAA~CB^HAf$YtFw-k@fEcrN@KPI|gcempR^uGc%o_+7wW~8;po-h~xDXCYNt+vz~4daH)&XD7m*@J{FdE}V>e%dvKxD20++4VC^QQ0?*usP$p1akhLp zjw7M`LvRi}0xI5nP~*;a2V|RdK`ESu`x+?!-<`W~ye-!mQ2l-_RQ|t%vhUs#vdwyI z3RJth3GM-(fa-4_LA8fJU_ZF)#B8%ZI{<3jTnwf6X{h$P^#k;vp-b(JsGNe z7edwdb5P^!mL;}5c7v+lfl%|uM5y{&36;)m@Wd>}1*md`rdxZS3#Ioh$8Be1oAq}Q z+yVbnp~`a^oB+Rqs`p_tt^HO)jWbt5t+Q@{Tfhzn+IG|tD!;{0`CSS%E}sw8US4qg z0}jL8>maMQ5~|!sIQMB#U5husgh^VMuvi2F)d3O|9PU|yNE;|eH!FTpbS z0aX0qhuHib1?S+t3#$F>I?L8aF;x4w05-s9pvp1wP}|QdpxV`PD7&5yRo^ecLYOr> zJMax00e^)9=Gb})hHN@xp!z{Q^xzp#`frC?hpvYzNAGf5FLh9MxDT#?-$Rw7z9QS~ z8}5P{*Y>Kk^M1U$FCZwap5WF?h>>9N5E?Q-+`5IOr34#*F)v|PpJH~T43$GGt|5^7^?qF zfvSfSq009JoC9;>Hb2M0$++);Jz%SZ?U#L^#_0o~>aP(>?`ju*8&o@a4yxUL2bJEC zdTZ|mQ02PIV-%<@;SY2L1&#{*7t0<544&-L8Nd|JJ}lxDJM4yCt?h>R=J> z$6yI;vot#}0v-aT_hL8;egb9R(aW*}=fg`K3l7UR@8i7=WxtD-Tf41=ny=n~YR~_H zTfh#7+y2uLs@%ijb}$Y*!lU4Dcs863H$bfuh8$s8?|3WJIQA`6Kd4$^%Y6aVzUK+3 zaV+adTVMM@_5WHZeP=+m>lfgD@GmGm`yFNV#GvebK2&~QhbqTzM`s&54ua}$4N&&E z7iwJC?HIf683Q}vo&{B(4N&9RDi?k=^l;zj_zu)~6*$)JKlg@;zb};DDNyb2FsSm~ z1rLDVLCtG<$JzF9EL6F!fSQ+Hf*Ozhf*Rj?9dGS0$*~?DhW~kRKHTL5D|fWxHBkNf zS*ZT=CzPGKueA9+1S-A5p$Bh(O7~f~6Z{pbpKN!cZBIdXAnpcuu;ifHZLgDT`znK` zd{E)vLAB!vC)@HL0{6##4%B@75>z{FbBZ08ra<+h3!(CR6C46xfok_1PPOApJ)DXA zF{t$RJk92JCRD$xg{rr+p~lf$p~i!?P~+blQ03~m%BC|K%FeY=a_2zxhqX}oTn~$2 z+taPR#yd7bjW1U@ehJkc`=4Rk-F&F={W>@Yz5`W{g=bnlVW@U~29(@W&i^l{^nz#E z{KTNjxe99BcoM3dpF!1M$FpsH7DBbN3Mji?1oPm>Q03VB96LT72+MGv4>cbB?EE{e zwst!hO8-LG9bOC*@G&TR4m;P5%SBM>uYx1t{ZQ>;i}S1<21B)j7*s!e5-MNq&bR4I zgInW{LXEFWo&S?i?dD^se)khpylpP9>yPPB_P7knZf`=h>+LSIa>b6PK=tzta5U_E zk&RaY$Kt*Ks(*Y0WuKicw)s8)YWz4F%AOBH>HiZ-&!B%<`6W>GcN0`TK7ndKyI*40 zGx<>McrMiX?KHRxd=P3pd)+Z`sU1JNL$%xepys#fa6CL3sy{vtrSD^?cF^H68!rfD zuR>S~r$E{J3aEDU5mdf=TyD!-3lGA5q2td`?Q-fBwj2u`uZ3zqZ#(zySK53{h8q8u zJNGTl{Vr5~ceu*xn+=uUqoKyf>!IxZoa0|mxB_Y%J;Cu3sPSPf zlpUXfviFD1-Rc_a-V3(HzX+<{#zV=kfNE#wL6!G2#}3z8_duxp9tdTxBcR&ZWAH%u zmvbL@oo)ZC;Qsi(2i49xUvJxgB~<;L4b^@gh3aR48*IIMQ1w*|_l7f|>URlLx~D{!LK!c>=1vd=9nFZhMm*?*>7Q_lH7- zuY`(!4U~P>LFxJ0xm(|C`&TX;g?~Mio!3Iu>%&mv!4L3C*yR@6ex88Rx7Dq-AME2; z2IYSeRQk6-rT;usfBY6|yve!Ej`z7x`9B)UPB%ICk5KmXZnyohA5{OI3pF0y0%eB} zpvtq=8e5J%q2`w=sPr#{D$l)8`W}O-mklobOUL$i*mc=Ha4O*iQ0@LSsB!X5I0jC+ z)2@$K!y|DA?y~70<#>VP8mM;vEL6R|2bG_npzN{JT3f$^q5LO9l_%vC zLgo7tSOfonS|`lA+pZfwg{t?0du)Bob37kv{CFCUfL-pj{iPBX;l2%Oy#5j9!t8(B zboxT2I~poqheGv-BcSZ_I8^`N^*&q9JSaVrp~l5Spw`tV!w`JixeM>N>!elCjPp?W z+U@}>R|3_))?K+W@CLG{~C4_WyVsD8f;YFxV<4u`M6 ze91j*+tGBWc6l6BJHHpIJ$?>l|D7JO>Gg-o?+mDZu@cH&cSEJ~2~_&qK5F%khjO0) zrSDOw@#9;l_P^I-b{y;uH6Iqh?r=KP_^=Fm@I0t>%{@@<Zc5)HuBT zlQ!RDpzIKZ%HP>g`F;kfK0k+QpE*xiPK5=y4}+4w7iwPm0hYmjPg{K_LG_p0q4ceX z8W+EVs-O1H*ml|js(%zh`OkoACvm9ub&d;v9ZKJ~j@vzJ<@!Ozo9^5T;BL6jcK)|O zjUUgzHt;Pdy&psMqh8P1ec^n#KkkR1!vBQju;_W)A1;T5xPOEy|Bx5l`WtGzc^0bQ z?e?O*4=@mB;hvq%y*0Sq7Oa`J+d)>aIPloYGkh9JOuZ)gkO!^OI)AM zsiOfu|Crz|KEm&1u74!{cF4cUxjTOU;he$s!%psZM~0rjWt>NFHlTMhyomDvWYdoi z32Ve-5A+V^dLh)Y)FQC2lkWo;aQ-VT{z517u=9I>_+7dFi}Oht`p9^BXSctTXU{MA{+n3r1Kl@Jg&QN9!h*2%kY~(n2uTSW86AsyYSudYwPqL z>Ua@hpL5=BMFR{~fgUcNymE-M9pR5k#_0~in~*ud$z2EUMBjGKeGc)Sz)klH%;EY< z=g+0NA8;2;prf5UI4(ffzi?f|^%bN~7fl|^aIeJu96oz< z?uyLo$Y*ipab1reQ%>N0I2PGz>2UEE!@Y2`WC*Exz9K!am_0&=2^XhPsUG2AII~oGth;! zYw^1d_XEgxb!li%5X1j?&aaWVkT8uiuREUa|hz}aA6-C-_)P`2zw7b^YPjT{strX6>&WZE+yV%n11X@*iPuzc&lTn zOY30dcuml}pEjC!yvh-{5ZP0anb<_fD%^(?<{#_O(c9@6P1r?g@(-fxcFrooPa;B` z>m_M%Tj94A@`vFUu2UTglipJ!EKQ{8~@XwQxiCmu)AO2=b>AzZaaNb6VK* zTz7Nv_02CGKe==|!CP=YOZbJHZ0`ag7gj{P9|=1Wf0l27_Qbt~vl9O!p!OSG3G1P> zoL;U1C*Zda=NSBWeKT+sd=>xc=-@TIKnJJ)Eo634T#i@qTV^lK-v<2e;B148j{D#{ z@C^JeM)nFgjdL*PIw$jQ$BRji<+51^-@)}Y$ec~w5rl7v|1X?xa=wk5*XU??v^ma0 zkkxU8({r$M%kLKCO7Q;|eqA`f;4CK2FwRd2f0}bQt_L7f%Jq53Zx7$X??X-<(}=Sx zr<}XMDy7Y_Ki4`Malgj(8P2W!la56efg=cilCvk_C&RNz>wd0Jb@`RpH=IKW8_xMY zVdG&}7hmX1;`b{q+!^;rE^Y|F$z0DP&Pz`IE&R^JJ<-V=gImX=j$QCS7Co2Xz6t*b zviHI*p^od}XN2Ft^-%Z5J8VHsg(;P*494iCS7Ii0)W_dRaU>AVU5 zZ}I!Lb3aR%f3)V}3(mF33_(Ww&e_Nv@AQ6-?0-3LaJsj^|7F~~iW_*F>!X~ap15zt ze}CsLcWJdnrWpU>oUfvz4EH&l{&6nXdKX|Z9__ha>*8IC>?64M!~L2|JIeJ|$n{0n zG^b!cWS-&rXu=*tZWJf4uWe~MBpo@tB$Z0oVTKD1AbGTzpvvB;=M=s0Qia1{Wvmb za!$j4Hhydo&G9b$nX3()3%S0Llh>yM^Ee;nx;2bK-Cr0&+>uF zAvz<-Oy&9&{N~_3h4Tp9t8w3ptd7p`JmendIt%~1aKGom6#kX|a2$-xeeid}u1C)f zX)=?!t|e>%GCHp39E2_%GvJHJ>v#mNL3Raxxz;OChTqZn#hiRM{KGDc+a-bL(YYh; zsPhxPAU*57$R>9Ve`s^F{p9k5z=-PFx+MIN#v`!!)Yj>i27=e?Z%aiI(I z-5rT{2H_*{C?M<@7v2W{F`OOIr{ivmz=1COdg83b?^n(m{5Ejz#d#6#^~AZ7xO;Iu zlCuK;58+h&0-UE3{sxzabDl=n9k_2+m^*I3Pe%`U87v@dEa^Q6SL2?}wSV+YyS~Q7 zQ&=6c%Q%WxmyWODKU8o%zGZz3DyJd(U!0)OJXpL1^~dndBz z;$DsH=g8=|0X~BNPMkW%IoX+9ALp(wM`i?PjClU>rVEq%GUtCSGW$6HIP8!Aj!y5n zu!``rkpGzLn>mMb_UHT$vTt$TOxSyzZ8-Bd??zt7YmPJF2k2~1oI!93e1v%CyYLct zfsJDR9*)fU$h79%lk3HtGdb&s^R<(kfO`<(o#4U5--<9D?>hblhZ6q0^$xt{cmmvs zIO_@1@f_FbM<@L6=6uZg{|MW;>s|2wjE%k}go@oVv`B>W=MpTQZyeKhW^ zxjv8UhhRIX<9>7;$9Wp=m!XbXa0_&v&-J#Pg~;!N`(d~@a;HEYUpZch{7S-0aBqYE z0AxnP-V)*%LwG-@y9##a9D;mX!fqqZ82A|6jq_dnbvy-kL+)6(6Z)pWV+lWi>l>Xe zE6G^L#W(m3BYY62j#0=hak`%8TF0S;wc+|0&b^Tzhu@key7tAr-o?vD?ryHDkh_)Z z@0@Pw%6IV+Tt6WXj$&m0ohBo{Ea(22u-;DZW%#`$S;CjXa&&*f_2rxgajl~t{J>tC zzpoQ#cNgFHF2Q{vjso)XoJ(gUtRZfmb3Z`%O3vGm3E}qwae5M7f?qG(A38alfynZr1VSHFOz(-yB zm*U@>^A#tb1=kZ^&e;wBLtUIhxgO4WHt|*?(-;5U$jeX{{ySld2s;H{NBHi}e2!3&<7(tq5f*|u@G;I6 zPVfRJcQSs%xZWP#guYtme*td)Xhr-|{9ofd9nbN&pGJ0T_ykRZ!Gv8x{2p9;oG0L3k|sY0KmS;X|JN?9VmuGWy$9(m=k$+ugipuu z8)>xV`f<*|grDVf?(NdP)Q#>0t(jb{H&2uG{y=aS7P;TisutEwn++ex9?u#qgO55?=f zSXDB)x#3VHb{dw_jKT>N&70IvTON*k#HbI~hNJb^grLcFvZcK)30Kr(V6Q&rm4vG$ zL`s7Eu9ur*B$t!us~XmYEq9d?tBS>IL-m;41XRak4RtgZTf(xO z!40##IXQ_Qo~qERh(+r|k!ZrpY4Bx?!XA={hihULA!8XoK6+!OCcJ)&b7~f+#jmOK z${XvgLHj6MWxadPA_sXni2}93qIkvJ$U+Q9i(9Nb7bOzm+VYx4ud<=GPBrPLVKP24 z6zx&(Rfp?M5~?+oD=DM=$@HTliIA@+LxoZp)ff%cMk+|MDn?9Ou^TTzrAIRHh%JI2 z*U!|(qcyY`&GaUdvMNK3ixv}&)qA0Zp-7EsLMl&XBvDrrYBaTMJD^H6x~9rARaxIy zXPTNZi5iM}5&~nxi<_BECQ+%!MiTY52P%O%eX64keddM|b9;E@4Hfe-Xbl2hjp=k= z&-z$>s7BV$scCQmiC)ds{G+JjYBfTc)}zc$h?K`ebR3heZ%@;}Qmv1~(~LhU=8t(9 z7OaXjL@V*}>gQri8A!&O6rfWmi)rU03sKG1eEy{$;8>*|-9weP1 z)dzD`)kG@ld!%=}48tWg_Nj@K%ie!4Y6~mN_>t3!UqXLSR+{uszp2@|#;Z5YxrsG0 zYqYtfY!dPkb7!k>N0x-u2A726u`bGq?LAhnS~1mB9X5GP4SBom{WEbTE7yw* z+;>Q>S6jhKuq+s^shYJkSQB0rEDs-+>($j&tZkEOlX>LQpuG$UCh*XRj4A&WNIc=CJ5!+^Mb+f;)3%pS=Eu_MW z>td{ztzUW^c?XpjKN>Y-W${cVO>X+o@lp{Zl?>aFsz!a9BmCfAr`8nJF^R{3s*#{BILu$q_ROx1fvZ#LElor zNUf=AGyW#L>4~tJZBv$vXuZ*G5awiwWv&PN#ta4<8!NRgv8kv1Ep3QLJ=V5$p?HEV zmJ!n8#pT0a`K871ywV7JAvR+y`jf}Vx#5cWiH2G{{Bhn4DFGw#zgFY2!!DIvE(}-B zvU7|aQqZ1)^9n>S?%?Q;rF!&|ib{nj?|2H&KGKQmYw9?uwnZ$^&njy#NO$JHA zj3V0Tv-2@paw^*f@XewBnuF04R>ws?kk5uNM z8mft~v~-b;gE2{)fmlPmSC|(q@DogUdF&6v1(Nj-^$X{#<)qtNhT|?yd5CVMguOgn z>Z-t-#<<0J9Gy=Os18TNaqcrPG7)a}C@v~vj+e(D8^@(*?h8bsb>vLrYleJHjdJJb z#zrvmEPHJfS%wi-v6&cR9tG4jQ-kff!5|X#u~<#eYH}{-1Uvp2Yj$#W zRc0ZQXHeix#w*UKo*X%;MiZ17$t7bnG)bkpq9T<-V=&%e8j^2zn)ck-BBlpcgLb7x zaTpyDb15+0uu;o1NY+@18UC08YPiW1#q63=%to@&tBYY1KXS`c<7hYhyP4A5F-uN! znowJq9RGHDWcJf$C1~p3v=WnDKdUCtHV#$->LD(VjL%e@mq#VajJAv=jnP=NvDV!B z2nKEa1`%^{T9{~LQI=NmMpJ&f2~Mpm{C44%k*W2hQ&`KySJ7C_HXv0q-pF`Zrk%*R zzDNdkvMtW9o_BDlF4;<2nqPy#&6r&KV3~?~?iRUKNh(P*H4RG3on7Df{mxBYgZxcQ zlZb==F5=+k5nD2H6ANo(Nf|krW@WgByPs)EdfxbOxX$A?WS!~iZuOI_*~~G*c6QsR zn~n~yDbPgITFe+X`1nhd^bs=Ec3O&H#}gWsZq)dVWI;nDT%YR&7o?Y9CYue67R707Xi3g8!J>aU8MwlZBwj_Vwk}k!g_1g=J6z*04^_-x6pB}J=S4zhGiFy* znJe+&C=`)1I})ZkvS)7rZ*=I+SlGKf6{E^dD@{h@DNIYAKQuE?Y9(j|UCeRBOs>K6 zY=O*xGR-c=6~W|?{ODSvCOTsk5i@m}J7<10r*c9vGnq4zSxLGXlWDhERwfe9>`ApH zO>25oVyr^jr&M69d>)7TA$T=Eq}XVf-hZ~74GHkVBX-{ctTVpkH|3^3Y{rLTeP09Tb-`e-$ySzimPh@N** z&S046n;!1i0XAO~RuL_fXwq|Jx0ZTOa-HYWoJ-`n;hMA^iehr4s*2lSdamH^?z?#N ztyGi0<0I5iAuCV&P|oI+C8D~ZoBrpM;C#e_EPyhOO~!Sp)}$Hy1@O@ahQ&ZO9H{->*w{{N00kz_UWZ^%Bw$K)itql z=O?eiyo~(|KK@~LLH6OKd-!Zct@e$?+gK!%qoVTiczB`P;nL1(?0(cf7EV6rwReqs z<|KNVNIdK{L2k$F=g!>P^LN-I7)A-0K^Hd1q{_u+dTvR<=0}{O4TqjHbGwu*AZ%+xHU;fX5t z(QW69Aa%}^-xMBsux`q!%(at$GM>q)i_<1~>sHw|n)dUDGs`Cvwk&^?GAW)0YjtoHO@n21DK z4)KVmo|}{94J^SI>i!9tu30QOe>&2zmm1VObCj@>wX0!&P^{N|X9kMo=*N2s$*$Uh z3Tdz%nU@I6-FmNO6?RTEVR`zS+}3)jOqhZuqZ_I8EY%7qSY6~&bQf(>bM(5Lw&!|e!jlIox0O`@pFlh%n(NxI2(mxaJcJ(dbdeKggt1 z!^=F4u?Bl{BvQ}az)D7%YN^=hiZYopGn6q++EPUwFQ^>?57FI=0*IT#U)`iaux0Z{ z{|Ti%6Ag=WODN;uJ~#JqT=OTGNAPqV?gQ}n&D*!1S1~sf4^=QsO2vZKQG)x{daXsb-b{}(D?=@A^cGH@ zFD;u*P7NIXrr8fRR`h3i?y1{tzttCQQP~KTl}Dm%*n=UxTT{>GiFwA$lZ(uybxHZ; z+J`STpJY*fJRs!$6B*N1v&9^_%9XD27?o+G>luNcLt9LZkA6{5$iX%^`6`3cl7^A7 zC{2@1d{QQ@+IW`9dtL6Cr?RJ|pj#q_gFKtyhHl0&GFI2<)y68#qmaI#3bV1S=Q#t< zWozrqZBA`WZI-2Q9tvYT%nAArcbkk5=0Q(|v^Ei7insgiq%JaIcZ$4cV~ebPa4p)Ve;jV?ig90hOKH-za0%NqwdS%`~RzOI54?Sh2gGVYN37KWhz9 z-S1^^$T-qe`3m&zloRElUn-ZT{Z2~iv*MW+W44Hycdu-X+E+-d-CE9!dl>4pSecCc zHFIn<0qzT`lclo0IoiA?rZKG9Ww1%SaLI+>6w)u)6hJgRQn!1q1bcbetR-K*+e!i$lTxZRkcu- z;#i!g?wJ7$1>CLR4YK*PUpA*977Ap>&zapiDQlV0l(o%MXEmTNIL0@#^=hVZg3CIO zLQ>DmHSN|h1)14OTFjgs4$Tion<+5%+PqvXLW5sMT{khh(UdBqGGsIDHyaIi8Fq6D zgNrESqDT$zMsTCGg=0!MUK^?BnT8YLUYoP5xhorwBzV|JF|`q|j3lI{#i1{4bm8$z zFf(^jaA2AO+e9*R<12_Zn)|`D-FVQy36^}5T8bhlGP^<^BJeb$EYB`c3(Rf~ovC?d zl4d8p17|uhb!OJG1@@g<-`XivT6!@ZC&lb^KgrxuNl#LlFgO2rHP=Y{EB&+rmGGE? z+aG#+*NI?Qn~hY0JkZ1v$$GC2)#+YhjhDyPs)^2G`6Ix95w2eprg^w|%sz&-QT!s+ zg(`zuJaDfy-b4>~>g-z%H6dPD_2)ufW=3A(8dhyQUs)o|fTnF?3;MK#(fnw`{rJhG zjf$l_1ehC&^7PI~Ez`t4uOZ=-9_Hmmq7`vX(tmqs(znveZL@Tnq~>xHPNY&?SR4AE zr#E3@QLZ;*Vv(89GYZW8M&&)NpmvF&d)+c*pZvPKcm+h5_qo%STKQ9_yR8W@d3NnjVH6)bMEg_RP$@%uEiSZJeZxG2RyrsnB z{mW&{Du!C|Y*tN-Wvj%kDydASYE@E{kulyov`@Ww5^TnlWc&A@I%~t69Bu6UY|HKT zgqYchruNp1ag8;)$H0-?OSGuaO=QhAnC(QfiP7oPO$A%Dzo}1C+0E*aUqmI< z=y|DWH`2i&v!p`Jw3%8t@j6>1p73mTto+9Ry7vH+Ez>VVf;Sl0U(;aysXV1)8XHsd z+N1_2_e%`Mr_>UngvhaYWooY^WmQ^&mJCd(u~!+&%niX7RmnUh1CzNk`$D^VYGxa| zj7ZsoCT3rDY+gvC#^1xaMWwHAbL`i28|be~DQm`3)@ERHG0B)(uize zT28CE8nY5iE$1^-1?>~E&9Ry7RW0iYy2WTJG?}|*wl}4+%9U~;wDc;y@_nPj7~Qg8WFZ&ejHzi?&O&pJuT{(Z}XL|LkjeMF+VEeHf5!+ zr%rd)HgYu0iv}8P2P?z1x>2T|YbN#ZF2+VRZA_1ilgx>E^*L2v{-aD~&a66p5Bj@Z z`Y{~X)x6s*X~=A<%})Q+j30Y5wAnajiP1zI-5^%sPoXKLR%#H4`;1?hQmb=3USGh+(VLT1Wndm}d`f-Q}duYq6k@ZuElsp2~g{>m#Q z(zN)rtBU!lqGXi6<>K2I|LgK68p;!mym!yCK&`l-Y*?Na9K0b`Fl%${>6b96#*|E& zyt3}>Lo#*QSHh^UguUgKYSC(}BY6`{Vcw{jMbnDyoov6kCA@}&Zo@6n`$VQ?>vp*A zQnajXR5ENcwE2%TT6}V(#3nFXo7pqtjVk~CIQiMggBO!g^Jk;a<(XPG_0UO?Q;$}7 z%HUpSV$658_3UbhOawRaP|#!|Ls8~pUpF+3ObdTZ>HU(MrxOXUyLsH`9>i<`dc$z5tM~`??k7b%@am7}1{wI%R{?9*1Y5uT+9f9djHj7PeCA+W| z9#-gQL*_Pbi+Aj_?$;BMv^C-1Kdj*Shh9CiTAMzyNYnTK^TP@Z^MCMWez57Ik4*b- z`q4+zyZ24w{$IU&|Nr3aUiYl|e?Bn(KQ_41(piFJY`opbmBf@9{hHDA(K?=@xTUyx zIAbH45xRtT#CZaYcQC=;$i=oVR~Qf0xOO|Aar-@yipI}nS+bd9T-5&R&umc42FKqc znQ_THOxJFNuT!udaLWqD5wj`NuPEJ7qH8}Yw=pGTl z%o!_cZDQlwSEEv;w0pGt5yhk2&kg+_uB0|_?v|A-r#Bo(-$^SA4a$OEnl@jRF%Q|v zg`azE#mp}yOsH=I#XHa&IAHdW^dEL8^F7^{ZS=ISuz1{r(Y8eCf158=Bqx=;^3cMI zIeu1JdRJtIV)zS{WFi?cHoBlO?KC6>t^x5*koh8w^!O_Lwq=93#b9lyAIXv7D#bRN zleDO5u~h}hhq1JH({9MF?mC!Fr;R36by7uD^GYpGMw@3OV}0cRjI<(MOERUTDa-u5 z!>pu2zg#Wl%-=>hVX0Yc%)?vGNd?x(8&ji#rA6n(Me|_Ke_Pu|PP4B45)AKPrduhz zI9$x@kHOVab>YBX|VD8DL zet4lQ=?6J>!=s<_@?KE29lIXFgY*!Pt;d0EF-)02@e9$I9EkzTCk z8oiRzq7fygQz%!a0bx%t{- z@iK{ZsCVV&hs;~Vx%qVsD=`ye6_!hKG*Ohu>$N$n#(@LI} zo})Bv>0108{H?Z)ZgHE>7jB(Fds?U*G#md@1B{t7HaY{KAR+~((lQOv(w2d>Se(FO8E@$R7h)VY>D49FRm-D7U{%7qH<@Te)LN064$dVP|gxJN?K{PIZCFB`ZWzXGg`zt}M!ut@1*d^E}? zq?FY}>g&1xn|3&5E?_hCDXv=xm^-+3YDnG#_g9i;!ob(8T8*F{a+`%fPczj7OSEnZ zj+4Q7b3tDR$saXtT3Xh))D2g8Vy6V(#^8;3Jt?r3xAU4bnklnJiZr(JWeKx3&d}s% zO9JjL53fYg$Q9oVy=Ja4FSaUM#nPs*Adf*4VcsuGKYVSbIKF^yegBhbX-!2MM@pl) z>t0;sG^|2ng-W=Zb?2$gJY)tW-nudx!bEXzF=!!@R8>t7)i>nz~DXkW@^x8X`{XxeEpnDjF`Q5uEyy=oZxwyDwbg8ech(W>mFfM4h zNnX_J)Lqgj_A%i7JtGhZhw-)jzjGi%ig3C^cd0Cb(ywtNnr(pWjfIjSL$0%c> z624eTiR|lpXyE68Oh-ZG(!BA&je%tn-^9By)Q3MqnF%Plyr*OMCUma`I8{n9^{$7@ zY#PSdue_Q{R14J4&?C$$jrJ=K@d}E*(PfYHY-;JVshjckK8soWH2o3FrXB{^X#R34 zeXI^p(&TNFv=aK4)9dt-zcHIxQ!EVg0Kv5s-Ns42+E0l$`50jnIdA!QAvOn_%(=cL zIbgAV$(Ld5p#9l$3%`I=Q__#AX4t1o{?GgT!uqs77^H>sxm@!FxuVL2p(y*x3F^7r zU&`Ta$e8Azkf(~Q;*w&;8yQjg{8 z%!euL25KWVx9UdCoISF*X!h{o!};l;{eG3bFQt#Ov8csq2I;^=6&VrrNxW!?Y2b%j7RPlONsk?QDKG&IIHdv$5+q_bXH0%yu`N}g@#ZiShw4K;EEG_UFV-^mvv&G_tQmOhdpjS&qdWB&KU$fG&bAh{^D zUsNu5&@HI=2T_gXOtW#xy5D3^qF)6}{`6Vy(xNe@M9JT7y8X3(<1b}@YBv=v zZ5DNR2%8E{F6qmtoAPy;NQdnQlkE_a3>e1-H0elM$@eK~tnHJsr*Wx3D#QN~MHwGo za~jR#kUr+#ow>c_FCc8;lEeN+q>*YOvJs;+lj67E`jWC{p!qc42G9SQz5RGP{oB)L zd;vd=G=0GZwA}e@f3dGZ7sx`=P8wQZ}>*F0ls zJ1T5HSgPCRn0-pM{$&38-mfiaQ=Jlz)x@g#h+eX*H4~Y}TbUF@%Sn@shN%C_gntvE zhP`70uXA~o<`ZX1yu_`BZ6kEO(tQ!xJYdprt#<2wSl&fQ^yy>1jF9xEOJ-J!&9@%$ zYt*+t^=FdjmsqS-F}b@fmb-F#MP{{7(_nMSivpnpL%RJHhZCwW`@1G` zVWwDFYIeE#+#gA@{x$7ed2yq=iDTwudD3NV6y_{rD?ft98G0&44Jp4ZHeoktn}G${ zjdp)(lCRG7G&>tJ9s4o-)pWCQV52eIQdW;=GHu>GhTYPnPs1U%EYnI&um5OembPq? zY5#E~Eux568cN=Xa$~dC;-LYjuNh5MxlKfyjzVad5sB9;yJ^a%%xz4_Yf}o+qWR)z zP=mwtp8xsc;+pEz$9|QUrY22GRhM?q^*_~+T;JGDjD9e{JtG!|0nhVg{0eqAyv#u3 z7Iu2->xCK?tIzVY2AW@LVo=f2#LR||9r52t>NlpFqtVE1TGyrxVf*(+7N|0mf6&*h z%{D_eIfQRq)}~t)JaFIu|K?cG{RfeR#}n9c*46Gu39_IO2{QX=W?)%u)AM+-(v2<>nCoheY@9 z0vN0$BTl9Lg>`uYKhD%mr?dx7M!GaZx|Uy!>Q^Bs%c$#8KKRLh9H9qt10ZB}s%0}W zV!HcK=H9?UyP@`9DO9FH8N&W28F=L7g{t&%o-+GZhxs6?RbRf*80BH^1<_d2qj)_N zjJI3lfUjY*;XCP5ZCLZdIg#1p%EU|>UNgCj$jn?-(8YN(6dR>XMKB<0`KR0Ju9mE z@EDd4=9Jsw@b6)gN00|7ys*LNy3AWT%8EYmrwDG{cS)#=4y2z}0?5ao#Ys*5Z8Vzzg z8{_!u+=?kpS;hz6g7)2*qMW>_Ve&FG|1Lauehh%-_q(ZCy!k#*2_{#8yhY%?8ErSjxeV&MBjhK{@|!y&J?-PM{Cq7D zlvC?2aL&A(%7Q#T4#mG!a339G=ga0)YxjnL$6NUEctf3TL-ilTF9y?ncyyv^1nXCa z3DDpxi&*M5UXlLSjus~|?l>T+%533ZJJs?tV?8~prjbRp?cpCF#i9}JM0wSG7@5AN&Wu0($Eq<}B*_CwU1vrx zuc0MnH=QI_uZ+cK>z76hmj3-vqu(~HWHwuPOdTp$Gf>T@cQSo+Le^opR2EGcTZn81 zIae*_RRp?SfohE>2zumVM?TJKeUl|Ng4Umm@V%&~3RB#f0R4UWex|c1%>%G3GOYW*BxF#<8|a z{!U+wh!*BO)H!o-(xN zdZ9k52z}kie3ePulJm5t-ba>`=n{X&*ysvH0SKS)?80> z&8IczT)uJKxC?6>c;LVh5!4Q|Ju|IkIRFvRA7QJMIQ6E_=Y9n|54$1CEVa~gnraoI zk*Y3F>Sb=C;yc#?a(ohuR9_TCZk}2LEOjNA{j67O??qG1O5?$11O{x=F_5Lm1$C;Q z-Ee1!Cq@$xc$*y-O%-h-1Bf@!QK*HpkTiO4JW0~F3hs#kQrw2ZSKHE*2uw+p0EeTc zUAUIHHRhFS77Z%#kvEK8NSAT*9SCQZ<rmAg9gki#eHx2f{Eo7Vp*1_g?B80b z7{RJFOZepWt#-I&3RwBjqGs-IRY!SOBdGBXcMFoeuDMQlt4d1o8>}}Jj-NhjrwXiI z?z0wZRC<;xAokvB*wvV^0Tj6EjCXN^6Zkf6X1(xp@X-&A8h~_rpK5vz+&!g65R&AxapFnI}xeyJe|$SzGP$qwS+4Tj|q7J&FPPKgaWy1R&XOEB_Q z46l@!2w#s|^CQsRdul8fEn4!oRS!Adjd$4+K+)JWA`ou*t9k z5Fye~&-8N+mK(Hn<;(XFHaxgJH({^p9>GGG+w~QW+oFyecJO^S!k{i}idzlg!JQgL z3vPh}$0c5wOo{&B*Yx^nBO1zRG4%bR!?^$C$^rm9WG*^lxXCTTcS$XZxtyffJxjT4 zGzEBj}dP?UsZ5gGk^19 zAjrOw{getCNHdSO#~&vb7#qPuVt#b*<6AaAzU3Z3gioA8v@j#QjkDxF!~Z739N^i{TZX&kz=HKW#= z)O7DhquX_@x}{~%)zV0_ftAQjs|T@wYZqWBBWrYq&Sxb~h-(s!)6$!%H4ngz00IU! zLl`z%uOlXNaxIe^X;e0)AuvwD-hqAlgS=LsA&Hl0N8Bwn$Tda!n*#nhAi)@(o(hhl zC{#)|TBgC6y3qlf%IZIHUBEpwEbezQF5_*$Y)ZupNd1u`jV5knQ`vlI#)emOEK982 z4&-`pqd!t)6`Qc487a^Zm`oin)ILM<+|{N`>X?v9%sP>6AeDn8G=2zqpai3IR!})qp`BVqfUmRwN%;EtjVEP-Ss@$n^aRXfcqjzj5D>Bj-qCH+KRyjqY+)B)~LgD=Cxx zKV7Z@{CCnW6NEFw*L(fzk7(h?{M>R+_-(BXa;Bx<0PMeiRwu4~sA}B0eYQ;|iDx4z zS1%}}B^fPGP@0ITY1ZAb$w_=qGI;jYx?h@PB!cc3+PQbH?IA6siS$-kmYM43At%QPOAJioU<5=CQhBGtZOMqos^Fs zvLT#g<_z;0Fe4;#(*Vp0K+tBQ)fs;6AUZ_RO=I%@MAo*$>{w7FRfbmg?GvaOhI4{b zKJ2<9I{VH)V*lSgynE;fSK6C>-LJ*gF}IAT&}K~Lr{=qGbHBPVxIhT5Qqk+Np)m85 zkF|orhBA^Zlo?BCoKR6<%w#dvyVUBY!1P`2Ip3d2Ej~MbY@&uPHq?jgvUcVq9AFCI zCdw8&;Wi$}AJ8|SnV#=4M_l-H7DfaGy{%L2O=u8r1W_BDFMFc~(-C^2^B26+e zS`3V7m6E?hBas+;8WF@jJ2TC+esZxk2n)W$jdlelnvu~cDj?>PSHSwF*>=sSKDZ$X zA5hJtF&*nF#G_9*R0x9tb;(Y6x)T!-gkyd?O=8LC!b|n9s%TVO*EHQc7^)c1vc=Xj2l{?cbdb^A>saK?#qzY(rqyp= zcgWM(?#8Sim6RXhEo|VNPT#_jtOngI@TPsbLuD*O19^WFZ0l(Zq*H@hv5bryGBUyo z?(4CrAFGgnMsta+h#Ck%+0vBBq#8#MGqf6T4yH_bupgA@L-*<`TwJ|A;%6m-`nIJ` zkG(>LuWHUV=mVm7CAst|k9RWlmbc;&_k-~DUo5Xdi1W7HcZJC*LB|L!*ltoA+4U`6 zn5OI{m1^>lKUbwvs2c1mRPB_p%|$Az@Dac0gmd&6#Hb*#)6OA3Y7)XjruC;RSp=r4 zX59i}43c1Jm&7zSePTFXDS(;Hx&)-%mBEq`+{sa~9fZ8^s0$0GsP6J}{h{ygcVV|L z5SPnxFy0ycdj#{mxd+@FObFX*OtJLf+HOtK!9Wy!2J!81A;>2uE+hTXQMyS^5|K2e zQ`Czd;JLV@5lGgF@2XONIgb?c!vwpRP;^Q)!$+hIhd6F5oH1uHd!6x+Sv+G+Hk3Bu zND`~|{?&di7Xsqu$RBYFssrx$^@w>l)CX@Tnp1UVJuJpiJ8b z3x-`F4*NOQ5ek#}RSVane47pthm_f?w8;N2XkAYS^A+ve*~XRW1FA0&Mr`VRawm#S z+kNcG%SbaLT|Am(;#E(jkiUv8=4?l*X-vW+S{W3Bl7hRxQp7rQ;E*SW;gB-|vFj*t ztB*&fxuje{5PE^52yT-K3p9Mu?M~rfBFkuJa}XZum=zsNj*}txK(^H?qYhV3ojP^S z?R`E!`{lo?T^6_s4qlV;g`5d)D{MJCX0h%_GCwxj4LK0f1X~nxNrI!KZKlOEoLIWB z^@xvMSl6P+5)nn$qvWX}?>l69mog8NK-ay<@YvJhi8chb+X0mY`$oYS* zyIIJwT^0nDWkJ!*qRWT8oQ^8321_o-wjIMG79l#Kr6qVnR>XahDHRV=M(X1H}9W#GL9lYC7*P+pVG9mo7A{pMvW)-r%@U+?^A|ZfY?00|7KPtGnjFhRwZSPC%wMheRiR=3w zv&l(Cye6Y@wV7_GLuU3FzjDiVQ618}NB5Uq(Moxt{UN|W7D0?;-EB68{YYYyB;0_w znw;onE}6I7`{t|byI-|}2edTPY0DyvoSD_l`|gXQ*sh>mSUabg9grB7fh!!&dLeG{YJ@0r1^> zM|SSpF*IZ@rU8ZIz^WcqO4)s?tC#AGgw**rD|X7lv)02m9goWfQ$}QU?7`iKhxQ&k z&;(6a%OG0?>=Mk)^wk$Yb+7BppDnZQUmB$-}tNuJA!dLxXjt~l{Jib98+?6D2V&$ zGq0J?y7_2m9>YlLO-AYy2kNmqYb%A>SDUZa8#;0vH+m2#FoWiKj}61tZmDQ(*JO<= zmr`sq5W0Mpr9NiNC&l%IL4bM?Fhe6BRqUYT4u78Td~(`RTfzix{C4VOXEHi|9G$iL ztCV4##vZE_3Vg|lc;$^9@m8ON2&PqAjbToCp|aVGQ(JZzOe4l(tQ}q&$*3Sqd{||m zK6QHMx9_IechL)?eXbLD28DD*&%`utIRvZeOhCypA!|NpwsLHpzIz_EK%3%oUsI=y zqB5h&ozU?;lv7me%>2ZOc-k#b1ba0r_XAUNn_AD;-f)3^q@|zha7nN~9+Q>2U0zHfYQg9|wcPUs3p#h{07dCyhN zoU_6RojjOOFhdV8{7*UjdAmYPgiUFrve__M6Jg;DUo7Sb&*s7J1{h3T-IX_Lp?`}qiRH-RC|8;|546ec^A85ydtr1wRs0y`PTi?JzN2bR&z5~gkh3k9$m3J6bQit84kY?=__(*{yY z%EicU(TDP_GsYOqR*hx5GZ5-KTN{h*VQKHq3Ob?Trr9l63!}phxW#3vGYif zt>DMhv0PhntRdoXU5hAkT|37Y)DX$+Qytym!&XeGI(uGK5^uH$aCZpb3?T90G0^_k z*39o1T|aJbJc5T@OzT=+WFt@PVqILSju%6R*0r{=rDvxI*24g5EJ}~k?qyWOGeO>C zrn$zq0=BNTeYcB}TKD_-d2lEx{sbqYoW@whiWtSLy2)Uxq7!2g%6qtC{@_1qCF;L< zO|v235m->su$&NrsLFVaVuD@1S9mVd^N=UPhfufbT~v?4Izw$zHU; zow%$<^HULM(PP@KeT%?|y|ed2_Sz>2_L(Yn-m`i0=GOgAfZ6EL+=c1mev-<-aHq$~ z_sV4o$ACW}Qv!b7BC#SOOk!y-W3knIPE3LXwXU`E8{cqGLrAVJSBE?XBHi>V1#*Yp zbmpv-`E4z;mrbXgp4uLFG0|7kW^> z)CjD7s|10UgV1Txw#+lBOznx8@z&0Rhj$kPJC&0_%etWjrL0a@oNcDv0+w||KR;ax zXb};TUOo=;?mVJZybA^&zw3*s;=$);6If?Ws-XT4ujz$d^c-?4METb1n(VP}@BN2& z9R9v-7G-@76-^-T2i0D(nyJOSlHs%Pm`0o_2BT$~tWwX9GG#Pyx@4w+=unv#(RIV&}Nd~#xb&f_iA z02Q&l%Jd{5J(&%+VF=CNg!$DPRGv!$&1dZpI8gFC;qYMx;e&&hR;{7NrX7d(Z$d{OJ(eJcU87Ys8O3@} zLo!Cmaum;32st9V2`ZP-TwtR*iDbpy;SU5RQ0WYVRa9@fr{>G8)Y=)+X5PTEy_6P`XaB2S|c(cODB%$zit2ZB@(w!i={kcu_6SZ_BJ z{|85FfQIVG3$yV|C5RgIU8fSezJH(?7;!}_CfmFliw6!4qgl^6 zk=TXkxAtn&WLGb&ibZ6|QlLo)q*@8YeOcq!d>>E(tzrTeX^B=sk+>;LXS0Izq#xL@ zub5b87-FpQx#GkD!So!ucGRgN*nv=GQ1gmz<35AfIi$D($K-qC?U8E5n&KiVk1v4G zz4T`=Z7ERiruUKHgZoXdk)CWf`D;Jjgc8V}$P5YdN`|cVo!XA!l~oa>!a1jP4XU}? zI3iq3KIL_RkcM3|q6<=)Suf7Lru(rL+e?KlPQy!-IsgNL_~;uKlVrN)wYju-c#C$MOFA?~~EU+&@E zJBxwc>44tmc|&WrD{{EyU)rC z$%vm>fkkLq-dx?_-3p$FEU8XUz_htBsjgg-17ROS#bA?&E$DJxvF>n2BMxY|WycSO z+kVKP926{HwBO;UxC1+fAC1F!69SpxC}xY=v<_=Q@C{QTTC)@siVAeEpt&(1QOL!7 zi|-1hcv300uC*r}z)8kc><$^Bln;g|6j+Jxw7i(v^=K+0x%Lpw3MjuND6{BMJJ5b6 z>e&3)W89&zdLe64Wi%{AhPZW-@tEt1NaP~>h2o{hT*g9q9rsiu9m$JUc}G-RBD5rW zlDF0m>r!wu3XVvDOb=@)ot>Y=(zeZ$Cq(a;eVWrS6}%nN(Vm(N6yLhc)JL}5^2Eoj zJ@a$YPqDk1RgK6K+t0@u^pv2cfCwmA;G=OlctOiDC7Tow^*iBVe5_9R^HLP}?kIcO zRJV1l@_R9`fA688t#{AeO-ell4HbJ19bpsaCB|pwm7PZ?>XRX%Nd7wDbAuP$f4q{X{MHPRyFxHAxtaN!1eN4K@N+=ix%?X^wF-j2$MlrN>)vSq{0 zyD`|*%%CM%S#&V465DPd&|XEsI&qY-G;Vnj5N*ht7GT3?ARaXkb`JrvgKPQuNdYOR zlr^2rwux%|Ij-9sAM`U{moV+IGS!*1zAfB$4B|M&c4mI}#$u}`=bP3%aIy+Vg1tKO z*m$Px4Q2)XluJg%pvU^LMY5b>h))@oEPspmZghdsu+jKA@O7!TxTC#(?2huO9c0B3 zc|pu75{E#zb*=ApNTVyNmmE4P0#NVkT>j~On~Oi+BS{itaw3Kg*h9sDU0T0kBg}0; zK}lnLeYhC#L*))X_7?+e;0b*lQobn594_a&z2pHw4(0j2V!#YONF1Fxem_tQnBj-7 z!^Obxz9GI~eZcamYlQeg>cC(&6QF~7MNWePgJrPvY52OE4y)(*hJuVEnJtt0v&BHK zNf3nn(uTLOm|{$lo&SG2(qJ4B5}7fJFK1i(BpP7<;nqA6XPxH6U?B7AS=ZVZ(n-!K zJLk6I==$y><+J(ehNs;banM*)VZ{=>Bv-1Xz$j7D)`py@{hG z$fQTxx;$m(ia$2nnOTI8<1-_|E1ep0T$hRr?-)KpuT{o^ z5_<|AI<#}-!Tr#!+1WAJue@`|Sj>D>R%9p?d5|x)*N04)DN&$W zVR*;T_lAZKAK3{Cof_>vR-1$1Ayy3JnDEfv16%Jt6ej?OBd+uft6i)9@V)npJgkCj zg|qkGQ#?Gh;V2j#6HKC554=P(`_SmkP ziNA*>Fvd?Q9fl{SO2nfWbY8U*3zvUm18V@>2+-6k$ifs3|ydVfhgB-|-TG+wN7(ri!~$TY+lh^CN= z;2=j8^11Y)Ghs99cJEC|r0Ec(AppjPD?)TNa(0dS~3c z31l!7kq^0YhLIue36-f~1kTe_BMM2jxV6o;(LR8LhRylSO*H*UXLp%Y#yvIvvWWsUhJYli}!44Q7# zuD6Osj>#+KVd1CnzI9M3|4m;HX8fQcadQpUM_!w>LO>fs=NJX;*Ys^I8y=f(W@O>r zS=vQ>q)Tztw-46(Al^tGQB&@bVLMKmGCJp~Lwv_C6#^TK8p4c9Qc zoul3owAFJ!)V(3|eOqq2O4@nD{L%GK2I2K)Cq&SXB6e80L*L@Yr2gmR~K)s zeoxCu(F}GYMKBtr^3Fytkw@jTbBL4$vY#9p9@(=OuB@wKzkz!LzaQ8=oJ1S|=*%R^ z68_rdpZY5VNVH0!m7Db-K_%X|R(J9aVq5g^J`^sK(GDc%XuPAveg?sK6tPR`&p{>> zdDhzlU2i|Vn%C#1PL9C*7+LwCEee2xMl?}58V+FD^_HL>a%1s>2+sfvdn8wx&=pT9 z>ruSnG%A-=%^rnp5Z(AxSQbm#&J3l)^LlaiUrFDzQ$z8}bEA8Qxq5NnaK~7UNg7(D z4XwkXR3+WdI2`<62b4*dILtNSYdw279Clii+}#S$I@~!9nHF*OESNkn;|z|QcBG~a z-t&k_JRDQm1rrylKC;CsXOv1NB`3YyYguG&C>Y?^`<+SApSCm_h}ubu4pA|F@{-k( zd!TSy69Fn5gAQs$@V@GSAIv(|GKuHr*(EZdU@K{$R3 zC!j&+9AZ95t1H@VmP-)4G=dJ{=xnxs+t4U1-3xaD=P%Lj!-i(V{O&v~0qvsI! zevIpe)lRWvcD6Nyv0O{UjxnxfNB$Z9@mwnw`D}%Larj=oNFJ|4p67T|i!VwDTbaRg zgnV)2W~bADj(dzY@TqJK8}ssAs{vCY;x1j%y#k}8CIoS@!-vB{0$aobVlhaP4nl*k zso<3i`L^mKJB;!_s2ZCHtG`jAd85IArKjOo5fyQMT4GV4QY@l6jDjzM8G&k*yb>dT zauPvY9Cgmyb`JcAW}{pf_Tw7L_li=LdU%M!MW?t%bnR`eTBlEYjL9u%wh1Iv{r=xx_0wl8I+AC~Wegi}&uN;6xiCElSd{D{h!(aeFznd`V54 z@DO^~(=PpzA}JZ|xI9C2;vmnEZx`og=FuEi-MQ_XcXIUJ3Jur}{U1pcJj_0sd@h)s0V(tJBo6!|$XSon9jsWWZVk%sr zEakMCppw6Z#g%W(Sx44xUwhhO!cq)3GmkiK9I!1Rml3zxM3Z zJi%?ncJYk+^yHBrjh~$TAtv;*Kjv1eG1@vXbErEsf1116s@J8(oA!dy!Cht4H@p6{ z9A0zF|AKbX9MDtwhcJ!Y1DACqFAyfNe}OQK#ZfrDjqQ=u%3>h#LVX)F^66y^=1psa z4)g=q+rNgATof0UC%ufKV~)chmGz7nQ#t8RkNRe`@0u%NYIs%2SA-B&X0r+y9$}Q6 zP!L=kLD@0Rw^}ur4Ow2Wig<1_Nyu8MlAzDWd9w}N!htoxoet|68?r836giX$ax5Dd|)|=U} zgo7tLqq5L&#ihF|N^p7ftcUbGI!7SPBlO^0~YXn;MQ?CQWaH5CsaNn@bb zhH-+TE_g^wI?hu8lrlAiFyPL~d@(b|%q$9yUDzt$ScE>3PmRbIbc9Vk!V$R`x?A}S zDJ!oTNW*Ir;e&gSeXqFXCn$NbxlX@=P=?2F((YhwVil1;bsMCGxVB`Xjp|M$HaJ0o z+DMDAeY921DNZx@4F$RWuRYzF;5>o?po<&-k`Jj(XAsVfYJS^JJA})ecsL5H8r~I9 zGaR!l3@v*StuPit>ji_K6c}c-*y7x@VsJM&5k#(1%;YkQdJmwguOoaRNO*$ z`;h9d8<$XA_mwGFuztJkoZT+V)2Q}#xSU` z-ZiuZx3HzkjUps667Z~6)f^KENf>c7P02UG8WIJu)d~ebcB&PR)#j z!|o9=rS2?lr`u%X3s2pI;pH(fjD(wOVU|h&p*bF#;znY=%tFbP728UL7P1-{$a)E7 zPnnsHpoQZIZ62Q9iG3BM=)zL%UkoNK`&gFi&S0Ii=DG!Ej<6JMb#*wxm9@-9&QzEp zp7m2ML7dbWl~kNv7?hYN3pEugj7`ps&EqWzozlHgnbpMTgNUl1Bsn|O&P6Xy zR${lb7QG!3&IDjCEmWt(n}KYa4s0?82fI_%8k{_JrZj_1vmBsGdZ~Ah}IQHgcze$RDG&>tMD?Wuwc^ED{r~2%iCD&AuDM z2}D89MPMppsGC&iE(tT?MI2t%vY-VWyIK?a8=jM;AXaqCX%FZYrdu3LEN*}{5xe2W zmR_&-O^jUWeIrt4K`pH;UO>z^POf-P{!ZL2C4P;|TGlmISu$iTjd33nXVzA1^`g2{ zbqx?J#cB{40{R$BRUXA?_sH4Ygp?Gkkd0e%EM6!R(^9Bv&uuf8V^h)7Cz&*eqtWje z24EY>EWIZAtyaM0b4r{=(2Xa5A^|PCuZPG~0%rZvZZ2LDd(!i+3bf#vx zYy=`?p%9r+Xm26{36!m>ONc%4k-axmOtuy+;Hd7H;WjX(GBy)SD^hOP0I|aq>&MbV zBjsWfe)IYp^Rm%ka{$APtM9_uaWmqDFWE# z-RoM8(@7q2DI`3FIa%hv@Us$Ei3ql-1m=7ij;=jjK8|fD6LCZ;1Tu3PjYc?MQ96PS z6KM|LT^d3&18B1DH$Mk?|BtG}P8F_L*X}quR>%uTx-%+v%tTCn$0m?>hqeiu-tzCu z$$O#(i~-!NzdW9A(=|TU_Fkr-_;Lq7cRl~ zKm=uMbgf7*n~ahOK^-bsG)wSN3;j18HuJ!f-Q9?rW;-)WwWhfR%p6?8m5rz%+EHQa z@LCto>bTmyIUyO*)Da0SwusZu2xx8?i1+k#>XRPbw;PlO~-J7{L)Q3Ueq zDMrV2w`F?o6EQl0DvrxBG{-zD+|244<^9owYyCIFe0e-0IL`k!wW6niZ{luC!iL_1 zi(yZxll<}uMjFdRNJ%4;wO(^CM_VJh0J1|ENwj7Twi3}m>Z7DgNVd6mSNYx8W_pus z2xS4oh-g%wBm5|C{@CI5^V^g)%PeZ;NyfZ-kZ0$pid3O8Qy;;Y$SmnV1rHp&fA8>+ zVRTZD*(h?m;_jsn-h>Gv<2UAMp zYoetHtx^&20`yUYjzwrh}HlF z(q_VT=whizxa+liZ7M2GJn;|@>b6crdBkpa47^lso)A9WN2IKZDK&mLfexWS)U_yj zj16!Yojb?do0u9BGbBAHlP&_A&4iNq*W-C19do=7Bih{^0)mtG_knb`d#*RJ$hC)C)VDw0j)WdZWUTxCY93S_I+Bj^mOsyZFMT!`*xKa@0wx49>5OZ1{*gS~19Y z8bUIQhybLfp~~rdAV7Tp1{#=3#|)>qCHZairXzET=SP3oHyqnWj89RyC_Tv z0C_5Igk5JKam7wf8p&-6suz2+6BH-74E1Yh1UY~o;w?A{W~oWLkj|8p@ZHSS;d@|y zSvvXT#vo_pNOi1w`q4RFz91nkzE1h?cm^LgRjd|C9{Cz$dUZP$VNrr|9818HVkHH) zSAM9qV&Lu#4G*{09@aY$NW2d@HW0Lt$^hXiC^FdeW1)=Av`%+tvFz(#=L}~?C!IR6 zP<{)-&hPHt`902Q5TwU-GXP4CB<3J=v{Jd<5APjbL$N(a_L0i#P&7OwEcv!VunRa; zdw&V@0Q@rWx*&K?V1u773y|I7@LF2EnKMU-0*{A*BD@b`r(4{;>F&*&{$ukxj|Oh&(#SovY0HkpYunj zzJr;5a%vNL;(gSco|wm2-yZIa5~}cDqqC!gg>{PUq~S! z4>0jhcer#Q!q`^)V07JnlF*cMv}M!gbvxZi)gFeE;K7T#!Cj=MoSgo)5?bQ#duouZ z`0abka%!0~qxNo`IAsXjR@{q*zwXc!DX^#7d%zc5y{54y@UuI(<=fLtpzE3dytYuEny$D0G{U(}P!9KHU|!pff)Lx&fiUApk<(uMbz7XP$# z;g3rf-dtLITRmO;+@8P37l~_+v`D~K6ibW0w>kKqrNxiSR5itom;VkpM%7TJ_Krzr zqCQ=^aAE1f#jh;C`26zI&s)WMHx{nkc;(sUOLXs-R`~q3tigh&uK(`2YcIdI{KDVq z%hH7>ZFw#(UHF~N^F>Z)*U?>?`*m8o@a$6?YbdvL;kO3<7dGfWEiHUxt3{a)Y^sF_ zUhl$FON(zUU0~=R(DkJYfc8dTVNHbxfBYoF7#d%-LV(F!{LW_lGE;F=fPG6Fw5y-~ z;p#`vTK7LTm`w2k9kW?@HI2qQsTwgOKVN)uZEa$IKKuRhKVD$ztsqkgeq6Rm22^Ew z@GiuzYr24Y9nz-q+AN><&QuC7Exxq;BGdJ`ZxwaJ`d11svyzc=h=u0!rcjfa z(b9_6Yj#DR!WIzWTV-L3<>wccpLqYq`Tt#cnW+w#pe1^Aleo6*x?q5C^3O{~?}RZT zRu_#ZURnO+9cnILd~*4t3&p_l6YrWWGHjcy+6G(p?7)Y*-J8^zz+f)d#~n#7P2$T;xTk3Lm;AfMYR3rsABDrt`DbD^DB z-L+xI_uXo%Pfj0T39$lRi(x-ya|H&!wDKGj{w+g)r*HjfO6;9gXSOdGNxwZ%NP_O^ zE(*tZZwnjh1J-3Nk{7=`n5FC>1h2NY+PjG7S5{tmYWe+FmoI`I=bg|Sx@5v!&a-2+ z{u3f;aCKr^(mlvs1b9UU!#cIqS=Z9SbH!%<6~Q7>iE))1TH7n@93Z^El@djTJT=x3 zMXXKN!gDnNr{pI!0W$8MrSl8OZ`UAr62r2cN}n4j0Sx5>r~c)ZTR@^l1nAlNeX5I| z=b~)t2}01Vz{xs5x1U1>Sz1J3zQWYs5}f)RF2W|F4D|&;-EwtS0g;|f|H1O#KZQZA zT;$(Zm0(#mr40@1eM>`)e7iys`_0#ydVq{yN1PtfFb5>@z@#^Jjme8fnUD)_hf`JA zQB=JugNvJ!-QL{7%{Ke;=TD%D)i_@bWxjADJ>W|M)4!?PlN5u#maB-H&$e={t-|^j z|0>G0_(?2aQVHtidrS2#}y}!Jwnj*)_d>S=ofJv)lFQF{HQ(EdAxnB^J8*3&W>&5@EBLA1QiC+K{s z0b2g;v-w+nw;9BYQBmRR8!c4QV#pToLF!o#zzVp7y465U#HHOm#Ls!q4CbaVQ+-c((d>G!Jf<2tzgw|3jUnMHCj4aN7NiIw0*7 zwc|ZB(j1EXBHJ241XL)`&~X_3Wi$hm@G88$59D7}I)_gseq6`TF+JR^amr`*`rA)Q zVPVYN&n0of2t9H(t)Mqu#-ljav$ynLDgjgX5}M`m&)~*tWoeOtJZV~bwNb*2WrNF? z0-T`E!p9B6KyQ8G;*B@o2T(rO3(whHBh;GePIKyBwV~;mb~y8jtI(w(NyjWUJ%-iN z#Y;DS_4e}H(LkquXA8Xe66U+5g%4Ds&lpzxB|P~SPcEZ)9Pk-h$@y`qRtLfKZ5y+3eQ#c7i3M(Z(jieLNd;?+-{^s0WWHHY7db-QxP)$@$t4S%-2z2#oN7f`kOu!O|246^^z!xXG~ zxyzQ%zwHI{{er#Ihy8z{Ax`&}pLr9a*W98DE_Bi7a7~45K)X|LnAKT7{*@Nbz{wdSTdxq@;{Ez@J{3N zo$b^2vHd_8HaeVxM$iHgt}rOF0UF_uC`z6S_rY;RL2>A_GK23aRePkXohVM9D7MeX^R|r!LW1EEUy0LigaoY+^Y%akMYX#?#or3r&+qRlt6;U!t8W*?(R zzjz~(G_mP0NA%08e5(fr($U&sG_C3?OBw`)RabQye?RU}?PMJjnw($x)uKtzkpm(2 zKm81gQB_+K8dgcNW9!Xnalm2ZY!VmFpK`X-upBu#FQ+&|r))EnfSh30iF#vwB4#_> zr`i5tJ`Fd1gSH|HhFQx9UDjamBTsw5>dCecw!+rC*_F5fydnFOJtwAe;>^~&142OI zkC9e`CQp}5E zaW0;OvnEE{ODA^qW7q+fMEKRzdM(})e{kzzSN~CVui`g`hhCU zTD=ns*aX&Pu>HU(Z=EmqM!w$`KFThpH$fa(>!YPb4*uN9p(2khKlRSF7t#33%`ik8 zh?^CG%6fZSQsa?`MwP!h7Lv%6Q@bYd^@#d{CCFla+ydlq)`&1}2Wqyp)LXCGf!Yt! zboA7#^c@wmav&is_U1cvG>qi7RRtyA776K56^;S|CctLw-MGL_DR&c}J_*nsF;pEd`7k)7L)6u=dRL&wrtZ zrXZ2lmOi&|YvzUa~E%`kw%bXI8KgLW&PJS-*eU*@P}RuxHT$N9+zw@4@B&t`mK?J~F#y!^(IQ+qR z!URjNGpkV*a7`#tS+#m6*5LSm```JoHJXR*@s`c@-bSTj;kVbRl{d?%yy=Q!Ao}&@ zvL#jreg?N-OTnz0NhqA0vkBs`EI!MB{w`U3SfyVLpi;lq2C1*Gw7R&&>IFvBt1yGo-3D#BuiRC; zmB0`x{S$4HZoo#&U-cNR1T}jfxeso!@^?YWM!}KZL{};dj5znOgY5LGCPbFABGW?} zL;T_#ntomV3>L; zC6o2_cmIqBNziL`a?;3vdl@crzMpHD6Lp3C(yiu2TTRq2SE+`(ikHV>r2%(i1VnXh zT0k=E#I!DVhz2W?mS?9sVPlKzMnfM*@#gezdpwmkPeU`}EWCU5(<^p%90}#Yl2$gh z683!F25r$qBIo&-w$9yphoA;wJV9~x9b-SeJvjRQLLMEif!3RL4>gHICH+gi4@+sJ$jUufB)q?oY)15X)_MISX#RgVh`*7uzKi#D% zmBR|&ZXd6_`UjbVS+p>O%N9*Tw9G%!ejzy!9Fu(5?HJ2fvj=5$s~&WroS6yT9M6GI z1-4CvtU5T<`;^F9H(2h_v;}eYK!}jDlH0~2;R;$z&D6f86))t*KVl1^R>k{D4U73a z%(&;c;F;NM9C;i!v=hT$^UwhqjO!8gWmA*8&aAvo;?iV)`&g)g=S6Z|E%BlTeaSC4qJ1C@ zCxm>~kS{;?iH1sgnxSz}=^Z8F+{gX~cdSrzEoigKm~Q-vSP&MfoXf07Yk>`4RUo2o zky^iP2R_#6%=$j5%yTcnAXrRJQ7l<*zp+YYnoz2QIQA;2Dk8IYuYUCY^-rJ+mDQJ9 z+4+Ths2qo2A+dmki0a>C?X1VmOUGavXDaKm8Cp1N3mrFLV#=8pUF^MS7>U)%Fz*yB zZ=^aOHQ8xdb(ZvpDN%gCcDpzVN~&|m}!nuJ#@ z{lq`0>e^ESZl0`l52=BUjfHz)N+w|lk&u7UHtcn z0CV(M>`A(CYCD;JYA|ce6DKd0^~SG%r7zO4tp*sd{08C!g!I`6lv{S%qz>GUR5VwE zS**N%o+DVvQ#C3rhKHaW{k}tGBSRRlA#@yAU-G7V8pP^{K%(2yd)w^w`M1t{-+G1R zqWBRf$9AKvgM3_PcFGd!KYv_oC+ou8eLmJ~_8Y!7G%aJb)vt?cdAsTx8QnYGvTgD@ z-b%}4@Yq;9xPJ$9B}iSj+m|3V>fBO&Dti=Pc+X62`_bUz-*~+JV?&I!%+F50xR=ga zT37X#jZ+g;xwj?*SgwudV`@*4o!JTaZMLp_eCok1x6Hu5c*|=TGx&IvQ=mrzQien) zS_yj`kTX91@mePSA#%qQlcdrK`Fi7&r%XAWvsf_VcDCIWraL(P*>a=fDB1j)wnA;U zhlv9{F?+shtm|i{9=~OqGx`E>AA0cn8YXRw33L$ zCd?JHTl|Q2$q4hf?&;89iH2)hzMUL&&>@t`sxO2BF0a^;2Oiix-Cek{^7NnO^<|VQ zZKUY7rMxAHhLMki%rZVr;zeXmxB@^1vCjKV`(6F{>e_;BlUQ?;7l500B{avf-l zHe%m>fQ;~Jfx^xD1n;!icWbJqGRHR8GRL>ypS3`@>22y_??^IjH1;nP1FY*^@ z>Y?7IxHu*Htl%!m0R_S-_n#PiLin2kE}J}fl_o-gAayQM`}fQ-kH;!oKZQa?CeCqi&9nsTM1SB*L+NhZ13 zKsH^!fvUPj7np=3mpU{T)mX0#+|8hQ9TNv@;NVCzV^MM`fqJPvvlt%Vq)~%RSRTl- z7HCCe;+0;SDGkGs-^dgMfzZBGY0}B62pAiSNHdkV5XVV6Q9Qg+Zgl7%kxy6hOrA2` zK0pXB@A5agab;GVELFN|E&Y#hW4n1I#;9voi9LsQ{VFxNLt1mORD=)&T{&m<3_n1K zvT#|XK78QE01gU;a-F8D)|MAiCKmM8;icSTM$LAVRva4PF z{L0GvoIrA}iXjH;T8|=8Jq`6lOBHwhzDLk%$UnDw7`@t2y&wiXaS=l&fzxlA=Ex$H zk+97N&G3#@{4}hqs~>n%M20vrgZKH!SF08Ti@B<2Qp3TuBG4MngV%!aQbvfRQ`W1> zVzlUC{VaX3JiE4T@8}XetSfudr9$|zp)R;?M<`f0d8Z%ko+I-bFw5}?MNP_;5!gP! z%CqMhlrWnjF?JW4cdaLfsu8}tcQ-pC-lxtGvzq zfUeFmkHi#r+Gta%Ow?Vw&2<$ zWwzC9`53gF!UX~vX#Ie+I{!tni(9Yk4iHv0$UVLas$4svtJjT{Z3=s8GyHJAXL3Xw zdpS9wX|HW~?qvpWA*JrkPD~DU<`5+?I)pWY?GaW@jSV`shwl*Fyp* zEyzvJKq3HcLQ=~}M04#@(+}eopuRrRVNUkRwMi%(vXN^}xEL|)H$k`=A&-tzcI63K zjpbE^b`iLBxQtVPZbr8&fYN@pC0&hP+X!OsL!Rb;^V{K0AqFGTa}$!^ykfF`8$nN_ zOu|`-9scdm6!&Z+pNDJ4gXX}IOROlL()JMHbojRLxNS+&ylylZC0?8z-06(uukMI! zI${r<7ZtzD*Pi}(<;pV_dysXgu^;EAAsDA7$9!PO zFE3tkVVA#I5z>_8a#U&)0E39k!PrQ=$xq-b;tl8e5U(dl4b-A`$~ z&2fo#8?z>BX-S5Xhf*^Bhl{OukKFUkICJ6e03K&$9_YnqMZvzaXYan?YM*^=B6kncf9>P?v28D}>?VNvkM6t{U9vLs0haHh>y&4%b4&j_Pl3e&cI@eR1Wt$}16QAG&8sypAF3 z@0go-`%ZmMjanb)8cdYVaJ`|mQ^|C`@Wv{GSibU{y?rlbYp%C3VKdX~l-Y}I6-3q% zT&d9Z-5m-CFI_(IC*_)Hea7rtqHd8|N?%?R+y?{~+5A}DYa`nNJ%O)GI>FViq|O!t z#6^LPQOUZrf#mB|e)-VRseO~9vvVhp@9EAQKJ`d3GbeOvk8^T*{OI7^=otlXY#fxX z&ONXGLvqB%LBG^y!y1YrDxNA5K;yKxZlVB;W` zw2gy@Lsg*Zprl%h8w$oc|*-uIdwG%rbH6*njbWl0#ER zvm5h-*Fg*$Zk%IsCNUL8rq5oteBZYKXik9qvYfIbe5(zqbYRT0g7ngg!+F0luyt_O z%{2o3PCsF=foCRby`-=@*F3Gx^)Nuj8dAr;x_Vr8UvtN#;5G=rOTBiA6g<&STIpl0 zKq|^my|PmNqmCfoRiAn!ggDk_)NHXkkExy?KxDF3Y_KkKiG8d|?5Yb~C)G^u#Xq=z z$IkEWJ>Zg2Q!@=F944iR)e!CKZTvuO1O`1==DG`GsqyK;3czKO4``Sp6ZdLjtH{`X zL6;*z;I?z^a8Kjl!9&BnYz!wjJoU;mm_nrh8)Cr$xLffJeht{*vB`-z<*~aLelB4O zV_evPcJqV`Tii+VuBAlBLs~qbmxCr7th#Ywf2 zq$|eVd{8_(I)7@0+oT>Pl;Vz@h4%vUCy!3ek4=uN28y@-oS46gg(ym}`&sZD7pVWX zwJ1qLTURcpz?$Cusc0J96gM+zmV-+2A+k8$#cX&@qp(=fOe{P*oc|OI5yokvoYKVl zf!5%TUAy8Yk!T;?I~DO}ui_wF21S47))loHF(F%Jfu14cq!%*#rXOhhM%M&7oWus; zX?BX@kSsQ4GqWTNp#T;z{JFXc=_`ruxikmnnAbfqa|R>C8R$hfy5dKZ)rrp841}BC zuyi!RQf>DV9(-u;uHo+{tc0Z}h0$pbRM$-7ue`b~v#Hqk^*_u8V^Q_v{(k zJshF!;IuhB!E7b_9(_@KBYr^X4AE!46D+`h>#_4haJk5rE+%lq3KpPDxD?gvF+=%+ z3?4en9h$*@KqY#Us z0KS1Jd$Zu*)vU&Aj?_&y%if8KRv^ehj(Xv4Er{5a6iDbnhKa*`x#JA>^;-C>_jj%1 zB)h}ryU!{=M@1QFuW<#-)X6*U-;0=4IYsrv54HL8gb_KFRRRRsmy;c0FNqttV+a(} zH$y)rRQJqj3vmysmC-E+7oQB}JQK&-iymD+u48;Rm{uWULYKYPZg^P}{QebIYvr|1 zs3#rDGlQ(9ITP*(y8pOwQsW$Z&Izt6Vid}2p*gFDtXy7x{+Cxjd%pM%&(Uv6vCH#( zaDhswp{P6kh<*zFSJs=^_0Y)9Jv&DJ^FRNy7+AXSj-96eEgVVE4C1MTtv8o{hGW)W zY~#PW^7H43gr=WgJ8MZ)%*G?Wy@oMz*}&Ynuk4zf`wFaJ`QoQvNz<9G+0#H=+DGzd ztT82uEb1kX&)Qs4&e@YqUS``{(vHEF6m%7`?%vYKA!;Lu(0xXOzh zumQJ}KXt-trCc4(D%8`+=b}UyZ{?9Ehx%8+uH=j-tu)yf%yQf_Q<8Zqe8VRsC5g)G z8e;klqqQpJGIB;!d!EgYe~oZ^8YKbLyQPfL&_6t51mj8*3_lI zy1iQ(XHy}3UmPT6)|&y$w`gq*ZoK(Ri;>RfJTPftc@vRs#6*!oJIs^3sOS_;^#6|%66$tq>RxNLoNi}MRDSdV+1G)RbRfRrl* zf@ZAsPjuNn8KaGlDu12*-352>jgr`Mtj_4b_h3gYtCGiP<-%VucI4XswWt3`dSg9o z0#>89MFm7zl{WU^&cwA}#s1Do{VDcLO>p@YPUN;5e*0|0@|Hc*Hy6fI=DX{^zr6B~ zUtGKLDh}C}{1bDr^PI}U6(*6VS~Wb5I!}2j;e)IYoNIQ6Oo$+_YOb!gTz~8J}u5t-i@Q}hqvAxt@-T& zKcgi-4ib9+ovT5qq{SLh$(+l#GUwAM05Xl?NZ-q&N*;Q6o+C0xjb$(%fa-8fk6O%^#F{TeJ zEyBd!-vIfjdX#Al2P!bQF2gt>R2U%%TRW}}_GRHxadd2Eej4Wm#O`aaApx+<&_(!H zKtneEqr7}19I^<_^50BS_GuzsIYlgs)@aKugRMYqx;9TFsB#To|6bRnaHh0m2dT?z zYvfRE=5;W|d`eq?>O*Gr`g_bOOYm&)4Rj|Qr4r#`KIcOfK)DuRu_;l2L3-uF*$+6s zLV&SzlNJj!T&aBh6%ywBq(8w+lt(^nDbi;4FFL&gzn*h-auLh(TI67&@J~qPA!Y@q_ zIXYGWY6chf2Lc_zAkIQ#;-u;xjo1GGDP#z=oY9xqH`m{P$F2&@SK@f3nU&{0CpTUh zDN~b7Ik%`Rg(bBFV^C09P;Z46Q z@Y-irQqDd@k<*oyR?D1S$sq)341JL=OrQ{0nEMiLyT3;V2Ev*O%Bn?F37VNI;Lw1AbWRAkiP zhi|UDisQu#^-B-t)MsEE)gs3F-shE9f3Jk?H9*;tkUE|Mw%7rU)4?{Ac>NvNSADBR zq>db{;sVevB7Oy1`#bgfWh!SZvA0@-M&~f5=WM7bkbXJj@afw?&(m@Wnf!-aktiD&33?kgW{Uq61|cFZnZ73>+#qp^*dX%*YAz4_tFi_Zgb z%Qs0`kv(vOE6MYCnDa)>TlKdNak#bQ`ny~TfDi#sgQ#9uy0E}c{DW~Wz+!s!v!B8b zmliOxeh|Hy9NA!l&{fC>4C`lRj(BZp@#nIq5Ma3S$t%SJhYBBDoD}dB}!#-tdMkfLk#e5_>M3SayV% zi!{I&@PKO1^fDAvO;Sq3(4V-`F588o#8Z-q_yhM_u&KM8d}3>D`B*r6!CP$afjtMw z->K{)Z2dGXXi74V$S{t7(EIu+Gi6o>o56_uc&bm$b;+LR&;qb>ha^0b{XGL}F$a0g zoA={19hsRMQLKL(-)=jKv-Z+vh@Ds3!RVh`CB}((^!mG%KAqV@^(q+|7WgSP@mcpt zV(BC59M#lO<`HdV1Sh5jIRZ4fC>($HSKzLa;y&}*1`>dhjQNVw{Fs~Iy)-z(Wp^~r zI@kx33>3&`f=G?tX#4$D+i&rcCYbrDnD&?Ulbmr-jz7L}{*C2N-l5j=i$CL{MN?SV zhtJvp1v~k2SXfg@w;fSDm-> z>-jga;9mRbQ~tooC6iiWg$M*LDUcq9ByoxJA7p7p57{F# z!Nu0GMwrrp=i=wZzyk-4gu_hLaieXn}u3Y+M^sX^SO^?C}>nkE!*(mYcEF&5w*wH?% z5PW3um02jyQeT^JB^J)Tn&h!OagqyBGa<1TDD-jp;va+tv}(zrJ)KD2YA?C#-*d*Q zhRxxs(r}D#ih)U$hAnG!Xn107W}aAYK6SZnkz)$zJW>FwRUfh4M-&?w@0=Q)oDz^4 zjO%~=%e4=65LHnG=(8^Kid|FN{z(g7SzZekFC!&F*&O45-rEM{n3{7ZkIh)mLN$NZ z6~ikRqCI}jveITVNb%;7jNY+K1CyZZ%o9>=MV~{3a+4dZqquB}43JAunKVEYbCU+G zJ&L2!b{1e!nYv;isxZP_=N$%S9x(IM+}&EyB=bImw-)VC?}P&9nF7V6#A(XLU$H9J z=DBZ&GAFex!lGtfsbR}nVcX@GB=C2q%HyHaOJcQ{b#S-EE{-g?uyo%Z5cWDs~nd|y~64j}c4<^a;m8}?0S8Dr!Em{#JJRxV9Y@h9#RPU>w zT)g%nt-5@T<5NXZ@S)`5PmnP4M_|Q{$J_VY3J`;0nHL6sL<*?WkFyycBYE|?AH$#Q z7LTMl-&pu)<(c35ZfumWb(b5EXC7~lKTc|KFwf)ue{}ETTQ)zw-wO5f7 zkYXT?Q#6Ml2lc%CSU#$gc<}dp?%a8B|DDWnNu|Z;S8b~XIfT%qG(WM4em0LZ|53LK zlMw6GJdexAd^5Bz7oG{PI+oYtAWy{FjS+(O@+PSS(k<1E@stjsCiOD^+P834tU{Mi z?p&*?ajkXIf!UdsEEPpXQf)JE#F7rVws>#VO zaAd?%F^Dtaa_YhD{x{2#Vsg?V`HuQRvK0BWBJM8&_MdMHL~l-x!Kj_e~r zC^?siqw6Sg>4)>3X=Sn|*SYeUw;S>x$7vyNHK~nK8!5>(>J0|k(fO%U#Wy!>5)j>5 z8@SBO#_^436OSo}iuwGr=Q%rLu0lSUdp8zaHbeLWvnjUR!;c;&(>KdpY;i`sqg3*= z#UpVKd1ZVD<^-ZL$MOEO8f7=-mAN93)AR&vdE?N=V;iS7-oJ6*kJH6;k*y)o2L8`M z^jk|(QP}2{@JgXx|4+9VEdHI_(?~rq#MgWM>yK#g$Nb!KPxx((58@!A-vI2tZPygJ z6yjc3z`k4d=G!$>0kiSlbgMSAmsT;XRCKe7EbEejsuOoC_jr#@PU6j*wP9Z)7b!Ol z6JP8Y+PN3=QMQ##-$ELEr%tg=%{1ULp;kXtoT*1_#a5y|gZju(dO4|fJqcO-<~Yqj z5UYGPaZ{d!QyXO<^`Mtxi;`Pz)5)>)Zp4D`=BFpMamn0g`%UWW7&matoYcht6~GL- z+E0!K2g%Foq|fL59Rb_rU&yIQ0P$}9-q%_IiU-mdqkr# zBMeH|$bTI~ir&_owT+R{b!vo*Q|5ESipQ9Srvx=xienK{=0R_xf| z_ViWzU0D=^oiIHwP|(K<mE}6uH)xo@_c`7E8`gf z;==eol7K-7<>2-dM;W^$Gf`+gy)!VuN~V6ek!MmX(Sz@YN&1}UtRxZhk>Nd1&Nzr8 z%n8V1mFxKY5Q(TegN96hTwQ%LO0 z8Rjzp3JLQC#VloH_DOsvL(m{5A5APm2vTqoy;J|QFRD;@^wRiSS1HIWAc=PiT|t`wAqGl#GK|#eybMQx!McT*lKNA0Zpnbvkp6YM}8_ z_slh|7q%%SG%`-K23wwS4i9jG4fP z)r!g81gQY=+$ds{5bOPmze9S4s_+m`)?;pl9>ssdYH1ogk3;cgWoalSwv?SgotJey zWw`LstUiaDK+k*ePfW8HBvgjX7pxDQTIZ(PAD-W=Vpjz`y5{mnAJx$1>Zb@_FPILR z?5gFW_2QxT+r16OV_HE>F6KS8@)4G%9$YpAucLF7F!|sMQgHRA7i=FF<_BBPo`Z+? z?-*9`nvtgnZ_qWJJ#%219)Sel@al;<9+eg84(2fm*N@K5bSKZ=0UYcRJqP>_QIkEP z?uld0O_%dg;5l>S0y1tkmyPq#oSvm;TZel|EFoGcw`osR6Sb`T^!FNmRJ-Y4-%n15 z`WnxtH8@nJ&YZGx#f+YnVJVph(mRq1p{aOPUy_mR{M&wIV@PKspNOdEHLE9_URFqq zr9EVOq&96FJq@Sap&9lcGD=Bbx#yjfK<9i05(?R}RvQZ`!<0xX%UhcD{mP9upG5p- zJ1EOSM6qV7Usnunt`Af)crD#bWACE|G%+AgJVCnds@cXSq?bd0O~Pjh5b*cLTG4P+ zK|xjeFDhB~?YL35`-YVi=Pe}*Q(bAyELCBXmvw8Kyk51GKL>l{&z)`_$L}2j-TyAh zE`?RKqG0;&5LfMR#;qjZGf1G}xSO6I@`GB@ z4pqvoXHIaJQVB>BQU*(>VoqI)?Z_DS9d$X&>=nw(k?Uu0gEHTdwwF7Y7en927RO7Y z$>qj#K{p5PJ4658B4}N!8K4Jpt9b}{DH?ANa3^2$?|MTSAH=S3c0+o3);0*FvPa}G zoh@irgIs;#dX~>@ogyb`A=97g=rYCJPLVlr9w|N-Uz;bul{7HW2r6=#91BCFWRGqJ z2tUo_E{a*RlnQA0NbKf1G2YC~ao4-avANJaJ2MMPfL^+w#*s2s?folxw!|L9Y~QO9 zmm!(pDh8}tH@podIk%Vg3PsTgr?gg^B>O`~_rv)~F8T1!!1AXTR^I`^5=W2Wr$#V=UA5YlO8Vk?VfX(dy3S5s^XWm)7<2Tw75i3Qo#AAw?~z5HM(f?a z+4Rcv6RnWP!c7tqyvnnVoc1MdQn$#sg@f(gIolbVw~K)w7>&$M6eqLi^lSzO9h~p9 z{LV``c*w0TEDp}jC@R6RarwDd()lJy9z523`R`b{pI^BsTel$nfRP3Vq3ouCrHT-B zC6~+VXRi1+69>UXb;1lbMF{-Vcxq=W@(|M1KT=XlKN{1n-ZFU&Z;*>RMsnq>Jhy#8 z9hF7?`22Luhsww0HEMgTEqhqhNsf}QmYW^nTwx|M1$4PVe~I#8eV;iFU;XqMO9>fx zM!#Jic~C7k(oKab&0Vf=_tL@J*aEk*;~EHz58TB^J6c06e)V5J@E-TTg)4U5dpg}? zu3~yC2rlZ9QZyaK1$@Wwh$S%|5y}N$(??oaf~PXRdc9c`l50Ky25Q*sd5Jb4sFS}z zd7sWh<}s3#P6O@?Oe~zG^k*L+RTz3$pYV*m{@&Y53RvRUuvEj`9|`wz<<!L3RpQ z&CJ3bM>pR3C*jEMEM1oK-*n`bv%7377^z%;FaD3|NAFeIxccd*D?fR`r51PWeN{0C zi?|zd68UDJH45eAIm*cAt*;?U$;-dBzP$?hO&^KE?kE(b#Mt~7@ z@;e(@&8wV&fUj>@HRba38^6#FX!K)GC2{GR#fC?`EQ=%Mevo|Kf=gRZ*KFJrjO-vr z7HWz(z)sT{has4+KfU}6ix7i@`xdSFzRDh*lyx-d&9NIM*wbj=Zq$2^X@&FZVxZgUJSMWV z_KL54Xu*gL6@6D^l+3)UXYro2?oZF|;n z53xO5d$*&HtO3fwAxm)hMWA#>!u6(KtTUYvyA%1A2DG&JS7i^99i8R$ zS(K4j^Yh^D!$W%y9=NqmdAxJj--*8l%9z(bc-3(a;D&jUyshq`cfEkY0iumFuGnEJ6{tatO??)0k(k|J!YG5n9PezH^y!*=s^3D_nkqycnbSA~{O2SVFK&yBjW#ISZ-ZXwDd&7@LBtb)%+iJMKp~F)I%0 z%^x}30c&Kx5E}_wEfp|v&FoJxfoM~I88K*w5F$vSJ4px=;r?rg$%ndzTwoOYsasaO z@q?zjB#L@ZG~XR za#&PddHpgQIuvJR$_zM6WNNfbY?R@-ar8Q_#%@}E9$Q~dHZ#5A+Fuv1UH+gLU?s$8 zZDi7%TS0yPfOIEv&q3YJYFWWLQCnwqG!2%*brIDLbg0#skYGCEhD6c2Mqu zGqW37154FZ?>%orQt#X%MFN6>NfJ+yreyibTb!giL*dlVpFQ^qaO01xfOZ3WHTMi! zcq1!n^-}MqxLlZ*oKOeA`ti!M}(HbCjM+DCF$tbk0rHDo6rx)!9y24wp z%YY0OzVP!UL>mm&!AxKJ_N!W@BpK|t;M8I_|wi~ohgbO#P53KY5 zUvuaFq-AyO`S)l3iYGOP3LM2K)NyhcCo{;!P~le48d8?kHqamuXr?b5oJ&>HL<5Lg znkaHGf+103$8L?miFo0UX}TN!i}`%l+WUF--p}*C-Cm~ZROLdy&%W=q*ZQu@UK>ja z&3pEcFO2u;RI4aGEq?M%G=g;&dd$EPHfT<-RBJ}|vo*cP_8zGGYBmX*)*k7F1Wi7g zR4;UiL77d;+f?RpO8)-W{Cn{yAL-PyK+#Mf6~c*28k1bhE!Y%?5n?PbnRP{jknqw! z3TmV-xnXR98o{Sx#=q`<`IhE-mcPNo@^_d&bLLjI4g=<1A2{AUgAQqnbXUD_h+BU( zpXxGUsl%za8nJp9S^bG4akkflrq;nGtd1ZqRvsYMx#~feX_qXm(`O;z+}s%-^a0zR zohks$OaRys5psrBqA3p$aOZ1#<_+-{Y%sm=RJlI&S9^<}zPmL2LBU&C4J_2l*KX>r zRt^n%p1HRC_3^FSs-;_Vz;w_K`#~}o0i>BWL=A|g$E70~eZ>}F= zlsu?wK;MjxtPzO(Pwzk&QFjZpvZlB7fd?vXl`Y-|jKR%_Ux0&MjzL}g$Z@Y}!_>3x z8g>>i_`I}m{*tZyYy-%G+n}!9fXBv4#JQpNw`qW}q0c}87mPcj@XCGZeHSdsX4zp2 zeHpDZhFXYDln2jM@B*R)k_e=+8-h%3+a^!3nJ#n-; z!u?x@67#NQZG=VU9Kjb^#>@}wX5PEs{6Tp@Yc4pbEa*8e9s;G3;q`1`vRzG>+L~Um zd^^9?NMs%-2ojLZ^gHT)=NY z-cmt)v)Z;;4O79J?y4o!8`3LhBx60R9P}siiSPwn{KkS1xm%2|<%8zoG;;Nd#Mblx zKw>zYSv|KnT|KmA|L%vl{V;NfA9HHx)9;#|!^W-{Fqb>mEq&)5H>3$Z^zo9_Gg#9b zz>s`bHBk;Wa?U()nxOO1z*y-caxjY4lFx)Xv>XL}asUR_@a)N@Eq3PRXkx+>EfBzl zKyHIs`nH|hDVZ85#JJOBu5M`5A}N`(5m+;UHNE&O4a*+mL47ad2kSqH__dARwtpuc zVx@pDD*5l-bq+i}1Q`^}=Z@WS^R2DNB~ZZ7R$qa2nmGPHN4cZ8Zi?%x$4+sPQV*!E zuYSbsZ&ql|Z_+9ksV@Eub4Ew>`ylAa2tsL8p3@9HldW3ymfphBDYk0culA7Q%PnTA zm7AgyGC^WDHnU=7bh|(2vxCcKY06#8vwvq;l(H9w>})H3F8IbRx0l9p*tcdb#f<=)g+rrx zt!fZm5NXb{dJ5F#T&r3a@_qhSRTFa!$~njV-shxoMP09n*v@V?ct6(IIGe#a&Ziyy zD6nf1+O6N`r`@W%nV30(Pej3}4`R14;|BFvtDNtU;yhzep`OC#tHE`^Ojlzs@c2Td zTy1v)*tYX^)-*;GvQs5QW}b#aD8dtX-FjuYC9W@ZuBlw^e?q&V8>V+7$G9CV$FNom zsU=ghD#kQmV6&bKT|_wHOFjvS(qBwycXY^t6E1a7SzGR5z>UO zJ%UlTtA@qnWRzW0+J12RRv4hgdW4k52?ee1@g9~R9nP+$Kmt@i`C6`6V4?oCN9LZ<5 z?Xl_e+*LWs0pk>l21we30)t{jT#SXspAXi(X;O%9QhNwp8dnPzeC42&> zgQqr5HfLwa!E+lPXFB-}n#7>(BXj3@ZA`W0VO8FeK_y^%e020d_mUSYwUqI&>~RfO z5C$}sAj^m_lmEv<=f;ToH+SMJB?xqbMV_OF9Z3*<#C!2eIHo3uc|EkVh%@?cO zc2?!4Grv=YHSgv4%FF!HrPsOkmLAVFJs^`YvHtRum5oX}r!|TKvE6S`Cukz)UyI^_ zZ0($kKc=QuEy$qn)wWGNw1wPW9tk^n2zTAY4m`ETD4mAjg$jwOM2s2VLGmKE2G?9WwZ^++dK@^t z)#BD~#s&wQxviH+z5)Og_;8i>z+2!oi#1^J2vy?-@n^9+{Kg~Qw`mx zV#o5S-COG8>HpZ(`eg^Xg2*g$wBmKZW2buGrqQOcq7fGe%_8O}KSmT>-pHLHyS9ij zG#AZhiQKH${c6wka^Y;?Iw-37o2t>*ruSkx?jb$MrZzCdVqBVF2EWDxEeDS#C#WsX zs}KVaa@;Fr&Y$XJG#UbGAu!P>ML#eK{E9kx=c z6v`sJs*OOyO<*tPBGysiAeM+KSHKk&0Gz4``TX#Rb+3IQ)_ac{LQdRgZx`Q?B6J};+2 zkp3Rr`f99NSG((}d|JH%G)oV*2~A|p4>;cks}t3_6C+xQ|L9W>UL2iy&UP?v@Yh+m zML7CmvDf}?*AAeDXlm8hpfO6V&3Qaks`1k!lh19go?bigOy}pRQ-cdkjOki*Y#=xN zMYe598L>lRJ~K*hrF@)Xk?=Hx_vK{^+=zg%rtq5OYSOuZiIKOP$+`3BePT4Rji^>6YeC>hK2v;8kfIV5?vn4KrqO7tZn89xej>ve3Y)o-XU{*|K|k2f6Rr zy9ZVS_XhK=@9h~H-m-t|&&8HHtWW;^$%9Y9g6uJ3og7f`%pLo(W8ePmPly2~VHV3G zNuV+bzI1|;a@%2bE0yG#pkcz*hKIJmDecBvF0xJJe`1ZQ=o5Q)ZL2SktvfabE-GZa z72WmAeFyY98NBM>PEY8Cjp50vjs>lY3~d>DlG&(?r5|h++P81(@Kd`H1gB3Q21ZUE zKQpRSIK^zO)PYdyDgMzeu|JOI^tg|w7|p)@2f|=ZkB3x<`Ed8`KWK}O6Jla?eE959 zvYZfeQ4|W3?(U-Qp|gVnoBs9T;jKgaS&s?+$-DBOFMb2)D&}g%hIa18L*wOagD{i4 zYXYvb^xkb-ckc_uhxQVrGynU0U!CvM^xkcvv7~eqZ3t0d;EibWD|#B*a^M#ShW0!BZXh?+_P!pzPLO**}@CYfg*}#4*vAf;e#s3fjaxsN2`Me zwmgNF_wsv-U)@^1^!d_@FVo=gF2V=4a>55ih(u>(@JXiH3>stlC(Hqqj12!G{0jG~ zzZZH@_#G}(a(_&r&a>*O^*`$VR^QQ}4x-Y6&Jz1{+|Bcbk001Z4xzEb_U27ZyS*-9 zRWf5H;99tI;BYD4c>Zi2LtV>2Qi64G*7iHVEQ}`+;I`wk=c(F@or; zZ%%t6Obe>TAiB>5VDGj2h5c5JD6GR zy(6a!&Jsu4Kn`}}{5s4krtFW-rEsJeyQIAY-j(owYl63+u|9T!1ZC;sg=yqSj4LwC zfJTN2k8=8sb`UH$haPX5)1n#4rnkU}W&+hM;}CLS(HO-YJ(k zULDNIfc%jI5R!lZ1+)g>A;sw4y)8Ljtdp&E4dplEcs#qlXJCMpih))k@&SD`5F+YH zdAw^rpuo?T)6%-xa1boS%k_|&C4S9}L3GDxYtp~kt6yO@R|6h~R|4o#IQ69vUb>02 z-=sB@7PxYga(PS7&Ksa+b$aTM=Lzy=Le~SwhoTyviLM8Tvfio5R~sL!q{YWk#}#0M zf)ja=Y0Tqeqk5YVaEQ%vn>b4Cb#Xc0JThs!(Vu6pZkjeoV0shi;_<~4Cl5@4{3?4% zZ{7_i(Pc6hO-FD7*PiD+4O)c%(v8{UG#(=JH zqLx0L3C64X@bzyj4wRF{bWn(V(At1#Ju{);j`s3~Gb6^ULatahb+yO3ism)z#O~(u zjvqrb7e<=DaF9qeV#kTl8(tySbHtbc8s5^iCNV}QYhD(g&b!?|a6dnECtY4V^oS0f zBbZIixFtgFcdu(7$;0LI*f%u1V<&i-7l?oU09O_G`-$yCQ8h7OoWeH$?0O5BIs3#* z1r`R|9Bab@t58e{VN!@vu%8ksc5(G7NFe^`h?YU~R%a&tc~+|jK?h)@{vjCam+->{ad zIf597VM#SV!4ug1jupo{FgY-#CjdR)Y#NL%+Q_`1xIrv8=v&`5>S?(5D|DGP)f8br zJFIVkzjuE!LBD@H_QJ*};b!+_Nb5U+@mw2y4YuNRTQJNGA5aktlN$k07~aB~F)K8v zs7i@u>-wZp>LpnRuP9_rPhhS`N5U`rJ}ZUjKp4KUeD$`)j%uf%i0ZMm6F);n&tgYi zd>xj~@9*17RZ&_k-}&<1hX|3zY!li#H~$z<;+>i}VWF`kARRfm;nySoUDxp@9-0`N z8b3Tr_RnLZ51ksF{8`b1$&g$m{s$jlZt`*=?MjfR0*H{{x_J*-yg8|ND@W`a4#^;` zOyx29-*he*ba**Qn^Sx0OCpI0&7vbA^%j75Fm#7(ZZv<{+!!!6rP{NgH@QbzbmvXZ zCu$zjKg222^crU#jd$|Yh`OYU6ss0*zWz`Rdhi48{=AJYQ0fV>>Hfc4Qz);x%VX;!?C7togATmf#@F&Rr2 zr_)4ybv>CROo<;{-8|!=};$(%6~36=p&Ku=NzY6#O{ac(s(+*EGiQ|kgK+Sma#%;^|2eXA_vMYVnhrw?Z@ z|J!c5ZH}U;JYl4;C#mFH#1hmFipwxcapeR&b19uhK?=Z>urykHUzqN&SWOJH{*o=j zRn+XFz9e}^hJZ#x;`>eXr>G;g+Y4rgY*ZZUu2!+($DEpZ@%knn0eNl)=%QlzWXjpw z-DDi0;hycR$Rn7BqoPu4=JLRGw<-h#BdO9jT8zg8qa`)jGL{(Pb z^r`;pxpU~)7EI7u>eo)6p%9Je3Xi4fi#NtdzHSrx0Y)j|x^f=_M$gU|9fWYlguKP! zWqOFNnDjuoXF{Z@AZ7kTXdl`otjZ)rRHFZ4j{s}Nj~|-ifgz%(xDYftZZ8e#U8V`bUDhZ~ zJD!s237#MuN4eQI#r4d?)vn`*d3+Kmra1?EZ zau2P^M)n*pP>md#7&}4#CtkpySaCB6@HP2@-9|#0VdHMNBgnS$N-+Hn?+-TdIn!OZ z-hi zbkG;uD|;ftT(QcNdw#KJ?=QJ=vG$)I`ezV|Y=BE|zshC(H~%jL05Flj{`2CcYw1WJ zEo0%<7ZxB170fGd$U-20VMd$L%-dwDvWOumqF69P)M-{jzB`{u4Ca!1fM1BF#6^Nc zr}(^)>u>%W5z#NdNzUIoW+4l`1yS}3C4pfz0*;w#L;DO=wXaxQ z0tRO}Z^F10r^D|E_&cs|x2};19Tom(*_u8!C)35BxR@j!e(7D}moH;$NHfuJ+CzpC zGhI0{$wdu>7T%}MR@V4Lmp3B1&QV-0eqn*qSv>(c9HrtKI71tfWMMk*c}lMJ1>4<~ zjO2qE5_%G{gS^;r2YStIvaSxJEw96b$4b-&v4kr@)*({amjPv$^Nc$y z_5}5WGwRTlLuq+qf@f(pL)|mH{ovMJ;(AJ&6kbSSh=fe#xwAQM#Jdc*OH-Y}ra!Lh z{F)-b=**^y3|cznIhlCwctuUBD4Y$YJr}RXLv?4BPZzh(MG5wM&=Fk+ZcxHM<8YZ8^H zMmuXr?NmTY6N@-k;Yi!Hcgr@!4*VK4@Sd|>#z9PD#41SR+B7T>Z-_cvW12pfT&TPr z?^(k3)*g9Kft`TsJhZ=8S4<_Md6gWV%-=uv;^LQ|m+Fvi`LvmEHm=aLC`JE8&kV^Z zqiuNgSrO~1CSB3|ZfQI-x0#QLBn##Be_6&4X@D#fun=^WciSg(1&df!gn%#q{!=6E zSSch-_Y6E6HjIz@Lz0JHm>d;;Gt<9C%t{%&_kMXnweB47pz>HdE^61$@^67wS_qkP zXv#9>xYt}HcmX5jrF(xtc)K=mwfA()UZ|@~YcY}ap3X|)A(j1*)5f9X9xK`l5%Cvc zY)^OXmP96@ySQV3CKhQ>)C)w;6RT%M?ATx^^;z}o5&lxqG@SOsyI9vBLi@1{27Eq$ZsGh*ffQCFLRrDP?t-Gz z2dj|Ut+!=p&!hiRsqMJ!th5?YIx}lT39O8T-!!ryRsx6m?*tIfUx>T~nq(#HZ2JK_ zH>(?!Gna~OYu;Z9I_ykiuuzuT$~-aby)!GDjpbE~0XH_H`m!cg8$NIWgixmwqwD4N zk9wyHB8FmKw(8{Zi4Y$gs5{J#Y*Y6^l|dhALRU$I>k~(P|Jo*dF{Ut>Gj7snf_0B^ z#Nj%(V$Sko0(ZWD?&JICej9m?)Fl+oLr0Gc>t^}zvC+xlk*TxX=V4>}rBu&K^E&9t zrR`-&?F$;C%sm(?8f6*=QdlW$oiwz_kZpk9yAkUb0ycABGZ_C<`8AAqX4}c5do|}V zd*!@dh#Vb1F*)@ha~QkaoJAM+Y# z*P^^~X4f2aC+{ZctLNN2aBVP9NaY9>H>Prq^Ou=x$pvD+(&7in&V~e(2nYjOcF^$H zqvmFC11%{D$}D<>I^q?!!6SRt;$!=l?!&*rpr+w!sU2k4cTZ+5R*W1 zm?)0DTZi{QwWYCC)QY(zWuIqOYEW3LjU9sL~!d4_t zrvMv9*Q8UI^Z}L$8i|oKw0k9ZIZ9(ixy!~EN z7N~H=f>+@@zfO5Y+=laxy&;$lN9O(D|JAyND4;qCPgd3zK08Y*4Zl0(VLarW#Mtt0 zFe)u(QMhM+!*1}lBV0jJt)YhD22iKFVzk0RRJeChxL^v_W$mp{ya)=zxepdE{tdQk zIFtTTb_^D3SWa(w_H(?Z(Waf?f!rGs(%^e((SERZc3U0S^ms>jV)7?v#$@ck3PYT( zBIC%Z0>}OjJm+O~7cuDwreKgiU=WlvkmTC`m4 z85Qd0Aw>+Yr$2B7tENAgziSv?z!6(ftNF3BrW;i)Sv6fbc8~3Il} zqYw6n%>kIrW`AS?&z9GKPE)$sR`|ct6{hhg4iEG+mm{Ma1*JPT5>bS#6G>~gT(iW` zc%*m4lB;8L8lD^*K0Gx(4k#P8IQr8ghq+za1jr}y*^Z^7o`_Vu9TJiZAL3%c^PAz} z5Gc4C!wI?oUM(gDe2Xwji;6Sw?HEzwIGWb9GhtLoYsoN@M#LTZ4dd|GNgm~nqml5v zNvJ8LMVD~AV^ip} zJ)xl!BZo#$@MP?YL=ekkH%n+>g*6YAPUG=9ISRf{YOX*%p(ehv<0FSoq+O=Wq3>pM z19N;bQuwz!Azt;{o)NF*(XgAV@46|IBgX<&-2M8h1yLcHFlF?JC>oiVz}a$Qbol5gA&)w?g)yKc z@`x0yCT^-RrpCC`!J)uD*LY6m6^j*^=3zg)TeNEQ0**+O@_9N8s4UXJ)vjPZr)L!u%A;?>NWN;ACw<~U{UZ^rTa{R=% z=wX$`gEDC+S9)490aJ~f#d&yI65}+j#q3E8b28GWwhP9Q-bI(+vYEGsxuT?E1AX`}9Cl&dI zk37iku#SN|^%EX3jmC?3a0!9eN5@W09yvZ9|DRfhPi2kg`PNsG-fd^=i zV!`>rQPZeSu#xT$H4`mLzzpbxk$=|rLsQk#ol5Uua*Tv-uT)Cvw_5GHu2l*failno zbQhz!3p;pPpph@#>LE9Im#*RIHa4BPMQa5}$*}6@U@%#w?k-Ua*=4G=hkK?@<3VGA z=+u~;xN+`$QCzB`I9Dv^mY{PVIuVMgQw>Qp^Kv@r7SpZm7tT*x_9VtrJ-K7(kw@7H z#vVdfqk^f~m>an*hWwD&_P=X$MBKPM$CdYCwR6wDCx>(j@BZUGa0rd(=D~<*65~F- zn^S6ak~XUtqV{y&w35KSH`oL@V>PYFD}Yk{C3n)^x0d<@;H7EpwEr;~L_r?&gVZT+ z#*>-UKtda2!0&@L=;>`B&&K#kLdnHd=UG!(gm5@}p1CrQT$5qWwvF@8p24IrcmNuU zJiiUK8v)df!l{LXEG#h$OboL5P99(0fQr};KpX6ZSt&O>HMI)2akb&7HjXMuTD-K) z-s$m?W3c(dV@F1ZPmfq0ga#ScgE7EXOe|2I%_@>CmIln`>=nlaadts(OXwD3Rri@1 zD|-(enwY2xJ|t5AS|;V*L#IxhoFIIRSpNZ~WGyJ$=;7U)g0t70T7e#%??1CgrkC{p zBG)5~-(qbTzlDf|nt}f*Q}2zwABs-lRy1XVk>i?Pn^gs~VcY2H`30i==z6u~z#eAY zWu9%7bfk;U`PS#PRGJhq3EVuR^7O(CzW^>J!|W5L zWYi#jL^^vTCIJ^_`dGi4%gwd5ue~8%;@o4N>GaubS_(o&MN&~{OIx*^TCT<*0Fe`RL zP!b0NZXgt3QDZ$_P6+8vJG3uOC&B}xjoJ7lE^jn4qrT+PeK&aJ)CDM%Tmt1TfxTu_ z=N-nv$>PIM93SgXKj2a%j5GKNiuV+3OD|ivM{Q;y2W0%r1R7qB_L2Qu!E{V$y>J5&R;wtf1!O_LT4@ z5nN53pdsc3qfuzS+OzlZokJw9jrSXr*em3in7@1Hz56%t0MJBptopWfx!Uk+W&)vQ z3Qo+3R5NEepEPs}Rc$K@((uHG^DWDD&1}+Scm0%z zI~)JWTf&4>etN_{5xuX6Cs^H9flZ-qT<`DIkND1&KiZTAwG;cCC9Q#(ero~Q-g4NV zZ)`~m2_ff`YR;%wKkCFbppm-%F zLyv53kzB|MS63`{L(o>rC5It4U6yEf-esDMwX-bRmyND`o8#+V8MTxPoTmOTx=vKC z$ZG7|a6|$i*SwX$YhiktIS3^wxbwV@R_RPEW@e00i?3es)1x`@9)fK~`c4t2t4uAi zFw=;5*g?$OutM*iO`u@(U@HCMTVSRN);r=nm-=v(9JZyTix2D&FY->7KBbyw?3o1T zpSC!}E(NRbYD6!qnO0cY+WR|Odw?*e3)=(;ESg}W-Du7gaStLRDJp4d*Ru~DqA^%Q zf0!l^td7yYcXJx?x{Vt1<$6x_f?IG4#P@z9EIC_+!>QIYN#>SqX zl2@Z&)T$R|*AUja@Uu2+lxAaxlp zFG&_)`%#{Y*O=Yw4kSBWXo6R2zae9^7nYv?gs=g>>5)84Nj`AITus>5P+Ayz+60@1 z3iJ3)PF8Ro@)2Mxz%{I4p7AG3lV%!knSbK?66_Jq3m+Cro1#Q9I+fV}S%>^^8#g_-gtb|P61}L^Yqji@m1`*OJ`{p~%p{X